From 24ee676b1397dad534f37c891c65d6e64a77a9d1 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Wed, 13 Jul 2022 01:04:01 +0200 Subject: [PATCH 001/386] qt: switch to polling for status bar updating --- src/86box.c | 3 + src/CMakeLists.txt | 2 +- src/include/86box/machine_status.h | 32 ++++++ src/include/86box/plat.h | 2 + src/include/86box/ui.h | 4 +- src/machine_status.c | 52 ++++++++++ src/qt/qt_machinestatus.cpp | 159 ++++++++++++++--------------- src/qt/qt_machinestatus.hpp | 4 +- src/qt/qt_mainwindow.cpp | 2 - src/qt/qt_progsettings.cpp | 2 - src/qt/qt_ui.cpp | 79 +++++++++++++- 11 files changed, 242 insertions(+), 99 deletions(-) create mode 100644 src/include/86box/machine_status.h create mode 100644 src/machine_status.c diff --git a/src/86box.c b/src/86box.c index 24f74b04a..449588c5d 100644 --- a/src/86box.c +++ b/src/86box.c @@ -96,6 +96,7 @@ #include <86box/thread.h> #include <86box/version.h> #include <86box/gdbstub.h> +#include <86box/machine_status.h> // Disable c99-designator to avoid the warnings about int ng #ifdef __clang__ @@ -891,6 +892,8 @@ pc_init_modules(void) video_reset_close(); + machine_status_init(); + return(1); } diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 36df54404..d1da45172 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -17,7 +17,7 @@ add_executable(86Box 86box.c config.c log.c random.c timer.c io.c acpi.c apm.c dma.c ddma.c discord.c nmi.c pic.c pit.c port_6x.c port_92.c ppi.c pci.c - mca.c usb.c fifo8.c device.c nvr.c nvr_at.c nvr_ps2.c) + mca.c usb.c fifo8.c device.c nvr.c nvr_at.c nvr_ps2.c machine_status.c) if(CMAKE_SYSTEM_NAME MATCHES "Linux") add_compile_definitions(_FILE_OFFSET_BITS=64 _LARGEFILE_SOURCE=1 _LARGEFILE64_SOURCE=1) diff --git a/src/include/86box/machine_status.h b/src/include/86box/machine_status.h new file mode 100644 index 000000000..2afed078e --- /dev/null +++ b/src/include/86box/machine_status.h @@ -0,0 +1,32 @@ +#ifndef EMU_MACHINE_STATUS_H +#define EMU_MACHINE_STATUS_H + +typedef struct { + atomic_bool_t empty; + atomic_bool_t active; +} dev_status_empty_active_t; + +typedef struct { + atomic_bool_t active; +} dev_status_active_t; + +typedef struct { + atomic_bool_t empty; +} dev_status_empty_t; + +typedef struct { + dev_status_empty_active_t fdd[FDD_NUM]; + dev_status_empty_active_t cdrom[CDROM_NUM]; + dev_status_empty_active_t zip[ZIP_NUM]; + dev_status_empty_active_t mo[MO_NUM]; + dev_status_empty_active_t cassette; + dev_status_active_t hdd[HDD_BUS_USB]; + dev_status_active_t net; + dev_status_empty_t cartridge[2]; +} machine_status_t; + +extern machine_status_t machine_status; + +extern void machine_status_init(); + +#endif /*EMU_MACHINE_STATUS_H*/ \ No newline at end of file diff --git a/src/include/86box/plat.h b/src/include/86box/plat.h index 5b810ed22..d4b50e0a5 100644 --- a/src/include/86box/plat.h +++ b/src/include/86box/plat.h @@ -68,10 +68,12 @@ extern int strnicmp(const char* s1, const char* s2, size_t n); #ifdef __cplusplus #include #define atomic_flag_t std::atomic_flag +#define atomic_bool_t std::atomic_bool extern "C" { #else #include #define atomic_flag_t atomic_flag +#define atomic_bool_t atomic_bool #endif /* Global variables residing in the platform module. */ diff --git a/src/include/86box/ui.h b/src/include/86box/ui.h index 847b8c706..adfb84581 100644 --- a/src/include/86box/ui.h +++ b/src/include/86box/ui.h @@ -70,8 +70,8 @@ extern void ui_sb_update_panes(void); extern void ui_sb_update_text(void); extern void ui_sb_update_tip(int meaning); extern void ui_sb_timer_callback(int pane); -extern void ui_sb_update_icon(int tag, int val); -extern void ui_sb_update_icon_state(int tag, int active); +extern void ui_sb_update_icon(int tag, int active); +extern void ui_sb_update_icon_state(int tag, int state); extern void ui_sb_set_text_w(wchar_t *wstr); extern void ui_sb_set_text(char *str); extern void ui_sb_bugui(char *str); diff --git a/src/machine_status.c b/src/machine_status.c new file mode 100644 index 000000000..258c16821 --- /dev/null +++ b/src/machine_status.c @@ -0,0 +1,52 @@ +#include +#include +#include +#include +#include + +#include <86box/86box.h> +#include <86box/plat.h> +#include <86box/ui.h> +#include <86box/timer.h> +#include <86box/device.h> +#include <86box/fdd.h> +#include <86box/hdc.h> +#include <86box/scsi.h> +#include <86box/scsi_device.h> +#include <86box/cartridge.h> +#include <86box/cassette.h> +#include <86box/cdrom.h> +#include <86box/zip.h> +#include <86box/mo.h> +#include <86box/hdd.h> +#include <86box/machine_status.h> + +machine_status_t machine_status; + +void +machine_status_init() { + for (size_t i = 0; i < FDD_NUM; ++i) { + machine_status.fdd[i].empty = (strlen(floppyfns[i]) == 0); + machine_status.fdd[i].active = false; + } + for (size_t i = 0; i < CDROM_NUM; ++i) { + machine_status.cdrom[i].empty = cdrom[i].host_drive != 200 || (strlen(cdrom[i].image_path) == 0); + machine_status.cdrom[i].active = false; + } + for (size_t i = 0; i < ZIP_NUM; i++) { + machine_status.zip[i].empty = (strlen(zip_drives[i].image_path) == 0); + machine_status.zip[i].active = false; + } + for (size_t i = 0; i < MO_NUM; i++) { + machine_status.mo[i].empty = (strlen(mo_drives[i].image_path) == 0); + machine_status.mo[i].active = false; + } + + machine_status.cassette.empty = (strlen(cassette_fname) == 0); + + for (size_t i = 0; i < HDD_BUS_USB; i++) { + machine_status.hdd[i].active = false; + } + + machine_status.net.active = false; +} \ No newline at end of file diff --git a/src/qt/qt_machinestatus.cpp b/src/qt/qt_machinestatus.cpp index bd0e491f1..773566319 100644 --- a/src/qt/qt_machinestatus.cpp +++ b/src/qt/qt_machinestatus.cpp @@ -39,6 +39,7 @@ extern uint64_t tsc; #include <86box/machine.h> #include <86box/network.h> #include <86box/ui.h> +#include <86box/machine_status.h> }; #include @@ -92,17 +93,21 @@ namespace { struct StateActive { std::unique_ptr label; - QTimer timer; PixmapSetActive* pixmaps = nullptr; bool active = false; void setActive(bool b) { - active = b; - if (! label) { + if (!label || b == active) + return; + active = b; + + refresh(); + } + + void refresh() { + if (!label) return; - } label->setPixmap(active ? pixmaps->active : pixmaps->normal); - timer.start(75); } }; struct StateEmpty { @@ -111,33 +116,42 @@ namespace { bool empty = false; void setEmpty(bool e) { - empty = e; - if (! label) { + if (!label || e == empty) + return; + empty = e; + + refresh(); + } + + void refresh() { + if (!label) return; - } label->setPixmap(empty ? pixmaps->empty : pixmaps->normal); } }; struct StateEmptyActive { std::unique_ptr label; - QTimer timer; PixmapSetEmptyActive* pixmaps = nullptr; bool empty = false; bool active = false; void setActive(bool b) { + if (!label || b == active) + return; + active = b; refresh(); - timer.start(75); } void setEmpty(bool b) { + if (!label || b == empty) + return; + empty = b; refresh(); } void refresh() { - if (! label) { + if (!label) return; - } if (empty) { label->setPixmap(active ? pixmaps->empty_active : pixmaps->empty); } else { @@ -190,26 +204,20 @@ struct MachineStatus::States { cartridge[0].pixmaps = &pixmaps.cartridge; cartridge[1].pixmaps = &pixmaps.cartridge; cassette.pixmaps = &pixmaps.cassette; - QObject::connect(&cassette.timer, &QTimer::timeout, parent, [&]{ cassette.setActive(false); }); for (auto& f : fdd) { f.pixmaps = &pixmaps.floppy_disabled; - QObject::connect(&f.timer, &QTimer::timeout, parent, [&]{ f.setActive(false); }); } for (auto& c : cdrom) { c.pixmaps = &pixmaps.cdrom; - QObject::connect(&c.timer, &QTimer::timeout, parent, [&]{ c.setActive(false); }); } for (auto& z : zip) { z.pixmaps = &pixmaps.zip; - QObject::connect(&z.timer, &QTimer::timeout, parent, [&]{ z.setActive(false); }); } for (auto& m : mo) { m.pixmaps = &pixmaps.mo; - QObject::connect(&m.timer, &QTimer::timeout, parent, [&]{ m.setActive(false); }); } for (auto& h : hdds) { h.pixmaps = &pixmaps.hd; - QObject::connect(&h.timer, &QTimer::timeout, parent, [&]{ h.setActive(false); }); } net.pixmaps = &pixmaps.net; } @@ -227,9 +235,12 @@ struct MachineStatus::States { }; MachineStatus::MachineStatus(QObject *parent) : - QObject(parent) + QObject(parent), + refreshTimer(new QTimer(this)) { d = std::make_unique(this); + connect(refreshTimer, &QTimer::timeout, this, &MachineStatus::refreshIcons); + refreshTimer->start(75); } MachineStatus::~MachineStatus() = default; @@ -321,6 +332,38 @@ static int hdd_count(int bus) { return(c); } +void MachineStatus::refreshIcons() { + for (size_t i = 0; i < FDD_NUM; ++i) { + d->fdd[i].setActive(machine_status.fdd[i].active); + d->fdd[i].setEmpty(machine_status.fdd[i].empty); + } + for (size_t i = 0; i < CDROM_NUM; ++i) { + d->cdrom[i].setActive(machine_status.cdrom[i].active); + d->cdrom[i].setEmpty(machine_status.cdrom[i].empty); + } + for (size_t i = 0; i < ZIP_NUM; i++) { + d->zip[i].setActive(machine_status.zip[i].active); + d->zip[i].setEmpty(machine_status.zip[i].empty); + } + for (size_t i = 0; i < MO_NUM; i++) { + d->mo[i].setActive(machine_status.mo[i].active); + d->mo[i].setEmpty(machine_status.mo[i].empty); + } + + d->cassette.setEmpty(machine_status.cassette.empty); + + for (size_t i = 0; i < HDD_BUS_USB; i++) { + d->hdds[i].setActive(machine_status.hdd[i].active); + } + + d->net.setActive(machine_status.net.active); + + for (int i = 0; i < 2; ++i) { + d->cartridge[i].setEmpty(machine_status.cartridge[i].empty); + } + +} + void MachineStatus::refresh(QStatusBar* sbar) { bool has_mfm = machine_has_flags(machine, MACHINE_MFM) > 0; bool has_xta = machine_has_flags(machine, MACHINE_XTA) > 0; @@ -358,6 +401,7 @@ void MachineStatus::refresh(QStatusBar* sbar) { if (cassette_enable) { d->cassette.label = std::make_unique(); d->cassette.setEmpty(QString(cassette_fname).isEmpty()); + d->cassette.refresh(); connect((ClickableLabel*)d->cassette.label.get(), &ClickableLabel::clicked, [](QPoint pos) { MediaMenu::ptr->cassetteMenu->popup(pos - QPoint(0, MediaMenu::ptr->cassetteMenu->sizeHint().height())); }); @@ -373,6 +417,7 @@ void MachineStatus::refresh(QStatusBar* sbar) { for (int i = 0; i < 2; ++i) { d->cartridge[i].label = std::make_unique(); d->cartridge[i].setEmpty(QString(cart_fns[i]).isEmpty()); + d->cartridge[i].refresh(); connect((ClickableLabel*)d->cartridge[i].label.get(), &ClickableLabel::clicked, [i](QPoint pos) { MediaMenu::ptr->cartridgeMenus[i]->popup(pos - QPoint(0, MediaMenu::ptr->cartridgeMenus[i]->sizeHint().height())); }); @@ -397,6 +442,7 @@ void MachineStatus::refresh(QStatusBar* sbar) { d->fdd[i].label = std::make_unique(); d->fdd[i].setEmpty(QString(floppyfns[i]).isEmpty()); d->fdd[i].setActive(false); + d->fdd[i].refresh(); connect((ClickableLabel*)d->fdd[i].label.get(), &ClickableLabel::clicked, [i](QPoint pos) { MediaMenu::ptr->floppyMenus[i]->popup(pos - QPoint(0, MediaMenu::ptr->floppyMenus[i]->sizeHint().height())); }); @@ -412,6 +458,7 @@ void MachineStatus::refresh(QStatusBar* sbar) { d->cdrom[i].label = std::make_unique(); d->cdrom[i].setEmpty(cdrom[i].host_drive != 200 || QString(cdrom[i].image_path).isEmpty()); d->cdrom[i].setActive(false); + d->cdrom[i].refresh(); connect((ClickableLabel*)d->cdrom[i].label.get(), &ClickableLabel::clicked, [i](QPoint pos) { MediaMenu::ptr->cdromMenus[i]->popup(pos - QPoint(0, MediaMenu::ptr->cdromMenus[i]->sizeHint().height())); }); @@ -427,6 +474,7 @@ void MachineStatus::refresh(QStatusBar* sbar) { d->zip[i].label = std::make_unique(); d->zip[i].setEmpty(QString(zip_drives[i].image_path).isEmpty()); d->zip[i].setActive(false); + d->zip[i].refresh(); connect((ClickableLabel*)d->zip[i].label.get(), &ClickableLabel::clicked, [i](QPoint pos) { MediaMenu::ptr->zipMenus[i]->popup(pos - QPoint(0, MediaMenu::ptr->zipMenus[i]->sizeHint().height())); }); @@ -442,6 +490,7 @@ void MachineStatus::refresh(QStatusBar* sbar) { d->mo[i].label = std::make_unique(); d->mo[i].setEmpty(QString(mo_drives[i].image_path).isEmpty()); d->mo[i].setActive(false); + d->mo[i].refresh(); connect((ClickableLabel*)d->mo[i].label.get(), &ClickableLabel::clicked, [i](QPoint pos) { MediaMenu::ptr->moMenus[i]->popup(pos - QPoint(0, MediaMenu::ptr->moMenus[i]->sizeHint().height())); }); @@ -457,24 +506,28 @@ void MachineStatus::refresh(QStatusBar* sbar) { if ((has_mfm || hdc_name.left(5) == QStringLiteral("st506")) && c_mfm > 0) { d->hdds[HDD_BUS_MFM].label = std::make_unique(); d->hdds[HDD_BUS_MFM].setActive(false); + d->hdds[HDD_BUS_MFM].refresh(); d->hdds[HDD_BUS_MFM].label->setToolTip(tr("Hard disk (%s)").replace("%s", "MFM/RLL")); sbar->addWidget(d->hdds[HDD_BUS_MFM].label.get()); } if ((has_esdi || hdc_name.left(4) == QStringLiteral("esdi")) && c_esdi > 0) { d->hdds[HDD_BUS_ESDI].label = std::make_unique(); d->hdds[HDD_BUS_ESDI].setActive(false); + d->hdds[HDD_BUS_ESDI].refresh(); d->hdds[HDD_BUS_ESDI].label->setToolTip(tr("Hard disk (%s)").replace("%s", "ESDI")); sbar->addWidget(d->hdds[HDD_BUS_ESDI].label.get()); } if ((has_xta || hdc_name.left(3) == QStringLiteral("xta")) && c_xta > 0) { d->hdds[HDD_BUS_XTA].label = std::make_unique(); d->hdds[HDD_BUS_XTA].setActive(false); + d->hdds[HDD_BUS_XTA].refresh(); d->hdds[HDD_BUS_XTA].label->setToolTip(tr("Hard disk (%s)").replace("%s", "XTA")); sbar->addWidget(d->hdds[HDD_BUS_XTA].label.get()); } if ((hasIDE() || hdc_name.left(5) == QStringLiteral("xtide") || hdc_name.left(3) == QStringLiteral("ide")) && c_ide > 0) { d->hdds[HDD_BUS_IDE].label = std::make_unique(); d->hdds[HDD_BUS_IDE].setActive(false); + d->hdds[HDD_BUS_IDE].refresh(); d->hdds[HDD_BUS_IDE].label->setToolTip(tr("Hard disk (%s)").replace("%s", "IDE")); sbar->addWidget(d->hdds[HDD_BUS_IDE].label.get()); } @@ -482,6 +535,7 @@ void MachineStatus::refresh(QStatusBar* sbar) { (scsi_card_current[2] != 0) || (scsi_card_current[3] != 0)) && c_scsi > 0) { d->hdds[HDD_BUS_SCSI].label = std::make_unique(); d->hdds[HDD_BUS_SCSI].setActive(false); + d->hdds[HDD_BUS_SCSI].refresh(); d->hdds[HDD_BUS_SCSI].label->setToolTip(tr("Hard disk (%s)").replace("%s", "SCSI")); sbar->addWidget(d->hdds[HDD_BUS_SCSI].label.get()); } @@ -489,6 +543,7 @@ void MachineStatus::refresh(QStatusBar* sbar) { if (do_net) { d->net.label = std::make_unique(); d->net.setActive(false); + d->net.refresh(); d->net.label->setToolTip(tr("Network")); sbar->addWidget(d->net.label.get()); } @@ -505,72 +560,6 @@ void MachineStatus::refresh(QStatusBar* sbar) { sbar->addWidget(d->text.get()); } -void MachineStatus::setActivity(int tag, bool active) { - int category = tag & 0xfffffff0; - int item = tag & 0xf; - switch (category) { - case SB_CASSETTE: - break; - case SB_CARTRIDGE: - break; - case SB_FLOPPY: - d->fdd[item].setActive(active); - break; - case SB_CDROM: - d->cdrom[item].setActive(active); - break; - case SB_ZIP: - d->zip[item].setActive(active); - break; - case SB_MO: - d->mo[item].setActive(active); - break; - case SB_HDD: - d->hdds[item].setActive(active); - break; - case SB_NETWORK: - d->net.setActive(active); - break; - case SB_SOUND: - break; - case SB_TEXT: - break; - } -} - -void MachineStatus::setEmpty(int tag, bool empty) { - int category = tag & 0xfffffff0; - int item = tag & 0xf; - switch (category) { - case SB_CASSETTE: - d->cassette.setEmpty(empty); - break; - case SB_CARTRIDGE: - d->cartridge[item].setEmpty(empty); - break; - case SB_FLOPPY: - d->fdd[item].setEmpty(empty); - break; - case SB_CDROM: - d->cdrom[item].setEmpty(empty); - break; - case SB_ZIP: - d->zip[item].setEmpty(empty); - break; - case SB_MO: - d->mo[item].setEmpty(empty); - break; - case SB_HDD: - break; - case SB_NETWORK: - break; - case SB_SOUND: - break; - case SB_TEXT: - break; - } -} - void MachineStatus::message(const QString &msg) { d->text->setText(msg); } diff --git a/src/qt/qt_machinestatus.hpp b/src/qt/qt_machinestatus.hpp index ba30d36f2..8c31dd238 100644 --- a/src/qt/qt_machinestatus.hpp +++ b/src/qt/qt_machinestatus.hpp @@ -70,14 +70,14 @@ public: QString getMessage(); public slots: void refresh(QStatusBar* sbar); - void setActivity(int tag, bool active); - void setEmpty(int tag, bool active); void message(const QString& msg); void updateTip(int tag); + void refreshIcons(); private: struct States; std::unique_ptr d; + QTimer *refreshTimer; }; #endif // QT_MACHINESTATUS_HPP diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 31ab4886b..d0549311b 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -266,8 +266,6 @@ MainWindow::MainWindow(QWidget *parent) : }); connect(this, &MainWindow::updateStatusBarPanes, this, &MainWindow::refreshMediaMenu); connect(this, &MainWindow::updateStatusBarTip, status.get(), &MachineStatus::updateTip); - connect(this, &MainWindow::updateStatusBarActivity, status.get(), &MachineStatus::setActivity); - connect(this, &MainWindow::updateStatusBarEmpty, status.get(), &MachineStatus::setEmpty); connect(this, &MainWindow::statusBarMessage, status.get(), &MachineStatus::message, Qt::QueuedConnection); ui->actionKeyboard_requires_capture->setChecked(kbd_req_capture); diff --git a/src/qt/qt_progsettings.cpp b/src/qt/qt_progsettings.cpp index 803fddc24..b11466c08 100644 --- a/src/qt/qt_progsettings.cpp +++ b/src/qt/qt_progsettings.cpp @@ -132,8 +132,6 @@ void ProgSettings::accept() main_window->refreshMediaMenu(); main_window->status->message(msg); connect(main_window, &MainWindow::updateStatusBarTip, main_window->status.get(), &MachineStatus::updateTip); - connect(main_window, &MainWindow::updateStatusBarActivity, main_window->status.get(), &MachineStatus::setActivity); - connect(main_window, &MainWindow::updateStatusBarEmpty, main_window->status.get(), &MachineStatus::setEmpty); connect(main_window, &MainWindow::statusBarMessage, main_window->status.get(), &MachineStatus::message, Qt::QueuedConnection); mouse_sensitivity = mouseSensitivity; QDialog::accept(); diff --git a/src/qt/qt_ui.cpp b/src/qt/qt_ui.cpp index 128631282..74cc88ebf 100644 --- a/src/qt/qt_ui.cpp +++ b/src/qt/qt_ui.cpp @@ -25,6 +25,7 @@ #include #include "qt_mainwindow.hpp" +#include "qt_machinestatus.hpp" MainWindow* main_window = nullptr; @@ -35,6 +36,20 @@ extern "C" { #include <86box/plat.h> #include <86box/ui.h> #include <86box/mouse.h> +#include <86box/timer.h> +#include <86box/86box.h> +#include <86box/device.h> +#include <86box/fdd.h> +#include <86box/hdc.h> +#include <86box/scsi.h> +#include <86box/scsi_device.h> +#include <86box/cartridge.h> +#include <86box/cassette.h> +#include <86box/cdrom.h> +#include <86box/zip.h> +#include <86box/mo.h> +#include <86box/hdd.h> +#include <86box/machine_status.h> void plat_delay_ms(uint32_t count) @@ -161,16 +176,70 @@ void ui_sb_set_ready(int ready) { void ui_sb_update_icon_state(int tag, int state) { - if (main_window == nullptr) { - return; + int category = tag & 0xfffffff0; + int item = tag & 0xf; + switch (category) { + case SB_CASSETTE: + machine_status.cassette.empty = state > 0 ? true : false; + break; + case SB_CARTRIDGE: + machine_status.cartridge[item].empty = state > 0 ? true : false; + break; + case SB_FLOPPY: + machine_status.fdd[item].empty = state > 0 ? true : false; + break; + case SB_CDROM: + machine_status.cdrom[item].empty = state > 0 ? true : false; + break; + case SB_ZIP: + machine_status.zip[item].empty = state > 0 ? true : false; + break; + case SB_MO: + machine_status.mo[item].empty = state > 0 ? true : false; + break; + case SB_HDD: + break; + case SB_NETWORK: + break; + case SB_SOUND: + break; + case SB_TEXT: + break; } - main_window->updateStatusBarEmpty(tag, state > 0 ? true : false); } void ui_sb_update_icon(int tag, int active) { - if (!update_icons) return; - main_window->updateStatusBarActivity(tag, active > 0 ? true : false); + int category = tag & 0xfffffff0; + int item = tag & 0xf; + switch (category) { + case SB_CASSETTE: + break; + case SB_CARTRIDGE: + break; + case SB_FLOPPY: + machine_status.fdd[item].active = active > 0 ? true : false; + break; + case SB_CDROM: + machine_status.cdrom[item].active = active > 0 ? true : false; + break; + case SB_ZIP: + machine_status.zip[item].active = active > 0 ? true : false; + break; + case SB_MO: + machine_status.mo[item].active = active > 0 ? true : false; + break; + case SB_HDD: + machine_status.hdd[item].active = active > 0 ? true : false; + break; + case SB_NETWORK: + machine_status.net.active = active > 0 ? true : false; + break; + case SB_SOUND: + break; + case SB_TEXT: + break; + } } } From 2f9597d13a760f39c401cad7b65e68cbea365d5f Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Wed, 13 Jul 2022 01:04:40 +0200 Subject: [PATCH 002/386] Fix IDE activity status updating --- src/disk/hdc_ide.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/src/disk/hdc_ide.c b/src/disk/hdc_ide.c index a4a9f2ddc..b005cbd6d 100644 --- a/src/disk/hdc_ide.c +++ b/src/disk/hdc_ide.c @@ -1642,9 +1642,6 @@ ide_writeb(uint16_t addr, uint8_t val, void *priv) disabled, the Read Multiple operation is rejected with an Aborted Com- mand error. */ ide->blockcount = 0; - /* Turn on the activity indicator *here* so that it gets turned on - less times. */ - ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1); /*FALLTHROUGH*/ case WIN_READ: @@ -1658,6 +1655,7 @@ ide_writeb(uint16_t addr, uint8_t val, void *priv) ide->atastat = BSY_STAT; if (ide->type == IDE_HDD) { + ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1); uint32_t sec_count; double wait_time; if ((val == WIN_READ_DMA) || (val == WIN_READ_DMA_ALT)) { @@ -1908,7 +1906,7 @@ ide_read_data(ide_t *ide, int length) double xfer_time = ide_get_xfer_time(ide, 512); ide_set_callback(ide, seek_time + xfer_time); } - } else if (ide->command != WIN_READ_MULTIPLE) + } else ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0); } } From aa9fc2d44a21cac19ec70d624597938b24058725 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 12 Jul 2022 19:41:44 -0400 Subject: [PATCH 003/386] Fix accidental removal of rtmidi --- .github/workflows/cmake.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/workflows/cmake.yml b/.github/workflows/cmake.yml index c6ac100f7..5606f1342 100644 --- a/.github/workflows/cmake.yml +++ b/.github/workflows/cmake.yml @@ -77,6 +77,7 @@ jobs: ${{ matrix.environment.prefix }}-libpng ${{ matrix.environment.prefix }}-libvncserver ${{ matrix.environment.prefix }}-openal + ${{ matrix.environment.prefix }}-rtmidi - uses: actions/checkout@v2 - name: Configure CMake run: >- From 7430df2cc30258e4244576ed8a97beaa33e3883b Mon Sep 17 00:00:00 2001 From: richardg867 Date: Tue, 12 Jul 2022 22:22:00 -0300 Subject: [PATCH 004/386] Add incomplete (and standalone for now) 8042 emulator --- src/upi42.c | 903 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 903 insertions(+) create mode 100644 src/upi42.c diff --git a/src/upi42.c b/src/upi42.c new file mode 100644 index 000000000..e98af5496 --- /dev/null +++ b/src/upi42.c @@ -0,0 +1,903 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Intel UPI-42/MCS-48 microcontroller emulation. + * + * + * + * Authors: RichardG, + * + * Copyright 2022 RichardG. + */ +#include +#include +#include +#include +#define fatal printf +#define pclog printf + +enum { + UPI42_8042 = 0, + UPI42_80C42 +}; + +typedef struct _upi42_ { + int (*ops[256])(struct _upi42_ *upi42, uint32_t fetchdat); + uint8_t ram[256], rom[4096], /* memory */ + ports[7], /* I/O ports */ + dbb_in, dbb_out; /* UPI-42 data buffer */ + + uint8_t rammask, + a, /* accumulator */ + t, /* timer counter */ + psw, /* program status word */ + sts; /* UPI-42 status */ + + uint16_t pc; /* program counter */ + + unsigned int prescaler : 5, tf : 1, tcnti : 1, run_timer : 1, run_counter : 1, skip_timer_inc : 1, /* timer/counter */ + i : 1, i_asserted : 1, tcnti_asserted : 1, irq_mask : 1, /* interrupts */ + dbf : 1, /* ROM bank */ + t0 : 1, t1 : 1, /* T0/T1 signals */ + flags : 1, /* buffer flag pins */ + suspend : 1; /* 80C42 suspend flag */ + + int cycs; /* cycle counter */ +} upi42_t; + +#define UPI42_REG_READ(upi42, r) ((upi42->psw & 0x10) ? (upi42->ram[24 + ((r) &7)]) : (upi42->ram[(r) &7])) +#define UPI42_REG_WRITE(upi42, r, op) ((upi42->psw & 0x10) ? (upi42->ram[24 + ((r) &7)] op) : (upi42->ram[(r) &7] op)) + +static inline void +upi42_mirror_f0(upi42_t *upi42) +{ + /* Update status register F0 flag to match PSW F0 flag. */ + upi42->sts = ((upi42->psw & 0x20) >> 3) | (upi42->sts & ~0x04); +} + +static int +upi42_op_MOV_A_Rr(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a = UPI42_REG_READ(upi42, fetchdat); + return 1; +} + +static int +upi42_op_MOV_Rr_A(upi42_t *upi42, uint32_t fetchdat) +{ + UPI42_REG_WRITE(upi42, fetchdat, = upi42->a); + return 1; +} + +static int +upi42_op_MOV_A_indRr(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a = upi42->ram[upi42->ram[fetchdat & 1] & upi42->rammask]; + return 1; +} + +static int +upi42_op_MOV_indRr_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->ram[upi42->ram[fetchdat & 1] & upi42->rammask] = upi42->a; + return 1; +} + +static int +upi42_op_MOV_Rr_imm(upi42_t *upi42, uint32_t fetchdat) +{ + UPI42_REG_WRITE(upi42, fetchdat, = fetchdat >> 8); + upi42->cycs--; + return 2; +} + +static int +upi42_op_MOV_indRr_imm(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->ram[upi42->ram[fetchdat & 1] & upi42->rammask] = fetchdat >> 8; + upi42->cycs--; + return 2; +} + +static int +upi42_op_MOV_A_imm(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a = fetchdat >> 8; + upi42->cycs--; + return 2; +} + +static int +upi42_op_MOV_A_PSW(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a = upi42->psw; + upi42_mirror_f0(upi42); + return 1; +} + +static int +upi42_op_MOV_PSW_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->psw = upi42->a; + upi42_mirror_f0(upi42); + return 1; +} + +static int +upi42_op_MOV_A_T(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a = upi42->t; + return 1; +} + +static int +upi42_op_MOV_T_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->t = upi42->a; + return 1; +} + +static int +upi42_op_MOV_STS_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->sts = (upi42->a & 0xf0) | (upi42->sts & 0x0f); + return 1; +} + +static int +upi42_op_MOVP_A_indA(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a = upi42->rom[(upi42->pc & 0xff00) | upi42->a]; + upi42->cycs--; + return 1; +} + +static int +upi42_op_MOVP3_A_indA(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a = upi42->rom[0x300 | upi42->a]; + upi42->cycs--; + return 1; +} + +static int +upi42_op_XCH_A_Rr(upi42_t *upi42, uint32_t fetchdat) +{ + uint8_t temp = upi42->a; + upi42->a = UPI42_REG_READ(upi42, fetchdat); + UPI42_REG_WRITE(upi42, fetchdat, = temp); + return 1; +} + +static int +upi42_op_XCH_A_indRr(upi42_t *upi42, uint32_t fetchdat) +{ + uint8_t temp = upi42->a, addr = upi42->ram[fetchdat & 1] & upi42->rammask; + upi42->a = upi42->ram[addr]; + upi42->ram[addr] = temp; + return 1; +} + +static int +upi42_op_XCHD_A_indRr(upi42_t *upi42, uint32_t fetchdat) +{ + uint8_t temp = upi42->a, addr = upi42->ram[fetchdat & 1] & upi42->rammask; + upi42->a = (upi42->a & 0xf0) | (upi42->ram[addr] & 0x0f); + upi42->ram[addr] = (upi42->ram[addr] & 0xf0) | (temp & 0x0f); + return 1; +} + +static int +upi42_op_SWAP_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a = (upi42->a << 4) | (upi42->a >> 4); + return 1; +} + +static int +upi42_op_IN_A_Pp(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a = upi42->ports[fetchdat & 3]; + upi42->cycs--; + return 1; +} + +static int +upi42_op_IN_A_DBB(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a = upi42->dbb_in; + return 1; +} + +static int +upi42_op_OUTL_Pp_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->ports[fetchdat & 3] = upi42->a; + upi42->cycs--; + return 1; +} + +static int +upi42_op_OUT_DBB_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->dbb_out = upi42->a; + upi42->sts |= 0x01; + return 1; +} + +static int +upi42_op_MOVD_A_Pp(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a = upi42->ports[4 | (fetchdat & 3)] & 0x0f; + upi42->cycs--; + return 1; +} + +static int +upi42_op_MOVD_Pp_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->ports[4 | (fetchdat & 3)] = upi42->a & 0x0f; + upi42->cycs--; + return 1; +} + +static int +upi42_op_ANL_A_Rr(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a &= UPI42_REG_READ(upi42, fetchdat); + return 1; +} + +static int +upi42_op_ORL_A_Rr(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a |= UPI42_REG_READ(upi42, fetchdat); + return 1; +} + +static int +upi42_op_XRL_A_Rr(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a ^= UPI42_REG_READ(upi42, fetchdat); + return 1; +} + +static int +upi42_op_ANL_A_indRr(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a &= upi42->ram[upi42->ram[fetchdat & 1] & upi42->rammask]; + return 1; +} + +static int +upi42_op_ORL_A_indRr(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a |= upi42->ram[upi42->ram[fetchdat & 1] & upi42->rammask]; + return 1; +} + +static int +upi42_op_XRL_A_indRr(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a ^= upi42->ram[upi42->ram[fetchdat & 1] & upi42->rammask]; + return 1; +} + +static int +upi42_op_ANL_A_imm(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a &= fetchdat >> 8; + upi42->cycs--; + return 2; +} + +static int +upi42_op_ORL_A_imm(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a |= fetchdat >> 8; + upi42->cycs--; + return 2; +} + +static int +upi42_op_XRL_A_imm(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a ^= fetchdat >> 8; + upi42->cycs--; + return 2; +} + +static int +upi42_op_ANL_Pp_imm(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->ports[fetchdat & 3] &= fetchdat >> 8; + upi42->cycs--; + return 2; +} + +static int +upi42_op_ORL_Pp_imm(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->ports[fetchdat & 3] |= fetchdat >> 8; + upi42->cycs--; + return 2; +} + +static int +upi42_op_ANLD_Pp_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->ports[4 | (fetchdat & 3)] &= upi42->a; + upi42->cycs--; + return 1; +} + +static int +upi42_op_ORLD_Pp_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->ports[4 | (fetchdat & 3)] |= upi42->a; + upi42->cycs--; + return 1; +} + +static int +upi42_op_RR_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a = (upi42->a << 7) | (upi42->a >> 1); + return 1; +} + +static int +upi42_op_RL_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a = (upi42->a >> 7) | (upi42->a << 1); + return 1; +} + +static int +upi42_op_RRC_A(upi42_t *upi42, uint32_t fetchdat) +{ + uint8_t temp = upi42->a; + upi42->a = (upi42->psw & 0x80) | (temp >> 1); + upi42->psw = (temp << 7) | (upi42->psw & ~0x80); + return 1; +} + +static int +upi42_op_RLC_A(upi42_t *upi42, uint32_t fetchdat) +{ + uint8_t temp = upi42->a; + upi42->a = (temp << 1) | (upi42->psw >> 7); + upi42->psw = (temp & 0x80) | (upi42->psw & ~0x80); + return 1; +} + +static int +upi42_op_INC_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a++; + return 1; +} + +static int +upi42_op_INC_Rr(upi42_t *upi42, uint32_t fetchdat) +{ + UPI42_REG_WRITE(upi42, fetchdat, ++); + return 1; +} + +static int +upi42_op_INC_indRr(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->ram[upi42->ram[fetchdat & 1] & upi42->rammask]++; + return 1; +} + +static int +upi42_op_DEC_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a--; + return 1; +} + +static int +upi42_op_DEC_Rr(upi42_t *upi42, uint32_t fetchdat) +{ + UPI42_REG_WRITE(upi42, fetchdat, --); + return 1; +} + +static int +upi42_op_DJNZ_Rr_imm(upi42_t *upi42, uint32_t fetchdat) +{ + UPI42_REG_WRITE(upi42, fetchdat, --); + if (UPI42_REG_READ(upi42, fetchdat)) { + upi42->pc = (upi42->pc & 0xff00) | ((fetchdat >> 8) & 0xff); + return 0; + } else { + return 2; + } +} + +static int +upi42_op_ADD_A_Rr(upi42_t *upi42, uint32_t fetchdat) +{ + int res = upi42->a + UPI42_REG_READ(upi42, fetchdat); + upi42->a = res; + upi42->psw = ((res >> 1) & 0x80) | (upi42->psw & ~0x80); + return 1; +} + +static int +upi42_op_ADDC_A_Rr(upi42_t *upi42, uint32_t fetchdat) +{ + int res = upi42->a + (upi42->psw >> 7) + UPI42_REG_READ(upi42, fetchdat); + upi42->a = res; + upi42->psw = ((res >> 1) & 0x80) | (upi42->psw & ~0x80); + return 1; +} + +static int +upi42_op_ADD_A_indRr(upi42_t *upi42, uint32_t fetchdat) +{ + int res = upi42->a + upi42->ram[UPI42_REG_READ(upi42, fetchdat) & upi42->rammask]; + upi42->a = res; + upi42->psw = ((res >> 1) & 0x80) | (upi42->psw & ~0x80); + return 1; +} + +static int +upi42_op_ADDC_A_indRr(upi42_t *upi42, uint32_t fetchdat) +{ + int res = upi42->a + (upi42->psw >> 7) + upi42->ram[UPI42_REG_READ(upi42, fetchdat) & upi42->rammask]; + upi42->a = res; + upi42->psw = ((res >> 1) & 0x80) | (upi42->psw & ~0x80); + return 1; +} + +static int +upi42_op_ADD_A_imm(upi42_t *upi42, uint32_t fetchdat) +{ + int res = upi42->a + (fetchdat >> 8); + upi42->a = res; + upi42->psw = ((res >> 1) & 0x80) | (upi42->psw & ~0x80); + upi42->cycs--; + return 2; +} + +static int +upi42_op_ADDC_A_imm(upi42_t *upi42, uint32_t fetchdat) +{ + int res = upi42->a + (upi42->psw >> 7) + (fetchdat >> 8); + upi42->a = res; + upi42->psw = ((res >> 1) & 0x80) | (upi42->psw & ~0x80); + upi42->cycs--; + return 2; +} + +static int +upi42_op_CLR_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a = 0; + return 1; +} + +static int +upi42_op_CPL_A(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->a = ~upi42->a; + return 1; +} + +static int +upi42_op_DA_A(upi42_t *upi42, uint32_t fetchdat) +{ + if (((upi42->a & 0x0f) > 9) || (upi42->psw & 0x40)) + upi42->a += 6; + if (((upi42->a >> 4) > 9) || (upi42->psw & 0x80)) { + int res = upi42->a + (6 << 4); + upi42->a = res; + upi42->psw = ((res >> 1) & 0x80) | (upi42->psw & ~0x80); + } + return 1; +} + +static int +upi42_op_CLR_C(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->psw &= ~0x80; + return 1; +} + +static int +upi42_op_CPL_C(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->psw ^= 0x80; + return 1; +} + +static int +upi42_op_CLR_F0(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->psw &= ~0x20; + upi42_mirror_f0(upi42); + return 1; +} + +static int +upi42_op_CPL_F0(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->psw ^= 0x20; + upi42_mirror_f0(upi42); + return 1; +} + +static int +upi42_op_CLR_F1(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->sts &= ~0x08; + return 1; +} + +static int +upi42_op_CPL_F1(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->sts ^= 0x08; + return 1; +} + +static int +upi42_op_EN_I(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->i = 1; + upi42->skip_timer_inc = 1; + return 1; +} + +static int +upi42_op_DIS_I(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->i = 0; + upi42->skip_timer_inc = 1; + return 1; +} + +static int +upi42_op_EN_TCNTI(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->tcnti = 1; + return 1; +} + +static int +upi42_op_DIS_TCNTI(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->tcnti = upi42->tcnti_asserted = 0; + return 1; +} + +static int +upi42_op_STRT_T(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->run_timer = 1; + upi42->prescaler = 0; + upi42->skip_timer_inc = 1; + return 1; +} + +static int +upi42_op_STRT_CNT(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->run_counter = 1; + upi42->skip_timer_inc = 1; + return 1; +} + +static int +upi42_op_STOP_TCNT(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->run_timer = upi42->run_counter = 0; + upi42->skip_timer_inc = 1; + return 1; +} + +static int +upi42_op_SEL_PMB0(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->dbf = 0; + return 1; +} + +static int +upi42_op_SEL_PMB1(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->dbf = 1; + return 1; +} + +static int +upi42_op_SEL_RB0(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->psw &= ~0x10; + return 1; +} + +static int +upi42_op_SEL_RB1(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->psw |= 0x10; + return 1; +} + +static int +upi42_op_NOP(upi42_t *upi42, uint32_t fetchdat) +{ + return 1; +} + +static int +upi42_op_CALL_imm(upi42_t *upi42, uint32_t fetchdat) +{ + /* Push new frame onto stack. */ + uint8_t sp = (upi42->psw & 0x07) << 1; + upi42->ram[8 + sp++] = upi42->pc; /* stack frame format is undocumented! */ + upi42->ram[8 + sp++] = (upi42->psw & 0xf0) | ((upi42->pc >> 8) & 0x07); + upi42->psw = (upi42->psw & 0xf8) | (sp >> 1); + + /* Load new program counter. */ + upi42->pc = (upi42->dbf << 11) | ((fetchdat << 3) & 0x0700) | ((fetchdat >> 8) & 0x00ff); + + /* Don't decrease cycle counter if this is an interrupt call. */ + if (fetchdat & 0xff) + upi42->cycs--; + return 0; +} + +static int +upi42_op_RET(upi42_t *upi42, uint32_t fetchdat) +{ + /* Pop frame off the stack. */ + uint8_t sp = (upi42->psw & 0x07) << 1; + uint8_t frame1 = upi42->ram[8 + --sp]; + uint8_t frame0 = upi42->ram[8 + --sp]; + upi42->psw = (upi42->psw & 0xf8) | (sp >> 1); + + /* Load new program counter. */ + upi42->pc = ((frame1 & 0x0f) << 8) | frame0; + + /* Load new Program Status Word and unmask interrupts if this is RETR. */ + if (fetchdat & 0x10) { + upi42->psw = (frame1 & 0xf0) | (upi42->psw & 0x0f); + upi42_mirror_f0(upi42); + + upi42->irq_mask = 0; + } + + upi42->cycs--; + return 0; +} + +static int +upi42_op_JMP_imm(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->pc = (upi42->dbf << 11) | ((fetchdat << 3) & 0x0700) | ((fetchdat >> 8) & 0x00ff); + upi42->cycs--; + return 0; +} + +static int +upi42_op_JMPP_indA(upi42_t *upi42, uint32_t fetchdat) +{ + upi42->pc = (upi42->pc & 0xff00) | upi42->a; + upi42->cycs--; + return 0; +} + +#define UPI42_COND_JMP_IMM(insn, cond, post) \ + static int \ + upi42_op_##insn##_imm(upi42_t *upi42, uint32_t fetchdat) \ + { \ + if (cond) \ + upi42->pc = (upi42->pc & 0xff00) | ((fetchdat >> 8) & 0x00ff); \ + post \ + upi42->cycs--; \ + return 2 * !(cond); \ + } +UPI42_COND_JMP_IMM(JC, upi42->psw & 0x80, ;) +UPI42_COND_JMP_IMM(JNC, !(upi42->psw & 0x80), ;) +UPI42_COND_JMP_IMM(JZ, !upi42->a, ;) +UPI42_COND_JMP_IMM(JNZ, upi42->a, ;) +UPI42_COND_JMP_IMM(JT0, upi42->t0, ;) +UPI42_COND_JMP_IMM(JNT0, !upi42->t0, ;) +UPI42_COND_JMP_IMM(JT1, upi42->t1, ;) +UPI42_COND_JMP_IMM(JNT1, !upi42->t1, ;) +UPI42_COND_JMP_IMM(JF0, upi42->psw & 0x20, ;) +UPI42_COND_JMP_IMM(JF1, upi42->sts & 0x08, ;) +UPI42_COND_JMP_IMM(JTF, !upi42->tf, upi42->tf = 0;) +UPI42_COND_JMP_IMM(JBb, upi42->a &(1 << ((fetchdat >> 5) & 7)), ;) +UPI42_COND_JMP_IMM(JNIBF, !(upi42->sts & 0x02), ;) +UPI42_COND_JMP_IMM(JOBF, upi42->sts & 0x01, ;) + +static int +upi42_op_EN_A20(upi42_t *upi42, uint32_t fetchdat) +{ + /* Enable fast A20 until reset. */ + return 1; +} + +static int +upi42_op_EN_DMA(upi42_t *upi42, uint32_t fetchdat) +{ + return 1; +} + +static int +upi42_op_EN_FLAGS(upi42_t *upi42, uint32_t fetchdat) +{ + return 1; +} + +static int +upi42_op_SUSPEND(upi42_t *upi42, uint32_t fetchdatr) +{ + /* Inhibit execution until reset. */ + upi42->suspend = 1; + return 1; +} + +static void +upi42_exec(void *priv) +{ + upi42_t *upi42 = (upi42_t *) priv; + + /* Skip interrupt handling and code execution if we're suspended or in a multi-cycle instruction. */ + if (upi42->suspend || ++upi42->cycs < 0) + return; + + /* Trigger interrupt if requested. */ + if (upi42->irq_mask) { + /* Masked, we're currently in an ISR. */ + } else if (upi42->i_asserted) { + /* External interrupt. Higher priority than the timer interrupt. */ + upi42->irq_mask = 1; + upi42->i_asserted = 0; + upi42_op_CALL_imm(upi42, 3 << 8); + return; + } else if (upi42->tcnti_asserted) { + /* Timer interrupt. */ + upi42->irq_mask = 1; + upi42->tcnti_asserted = 0; + upi42_op_CALL_imm(upi42, 7 << 8); + return; + } + + /* Fetch instruction. */ + uint32_t fetchdat = *((uint32_t *) &upi42->rom[upi42->pc]); + pclog("%04X @ %04X R0=%02X", fetchdat & 0xffff, upi42->pc, upi42->ram[0]); + + /* Decode instruction. */ + uint8_t insn = fetchdat & 0xff; + if (upi42->ops[insn]) { + /* Execute instruction and increment program counter. */ + upi42->pc += upi42->ops[insn](upi42, fetchdat); + + /* Decrement cycle counter. Multi-cycle instructions also decrement within their code. */ + upi42->cycs--; + } else { + fatal("UPI42: Unknown opcode %02X (%08X)\n", insn, fetchdat); + return; + } + + /* Some instructions don't increment the timer. */ + if (upi42->skip_timer_inc) { + upi42->skip_timer_inc = 0; + } else { + /* Increment counter once the prescaler overflows, + and set timer flag once the main value overflows. */ + if ((++upi42->prescaler == 0) && (++upi42->t == 0)) { + upi42->tf = 1; + + /* Fire counter interrupt if enabled. */ + if (upi42->tcnti) + upi42->tcnti_asserted = 1; + } + } +} + +static const int (*ops_80c42[256])(upi42_t *upi42, uint32_t fetchdat) = { + // clang-format off + /* 0 / 8 */ /* 1 / 9 */ /* 2 / a */ /* 3 / b */ /* 4 / c */ /* 5 / d */ /* 6 / e */ /* 7 / f */ + /* 00 */ upi42_op_NOP, NULL, upi42_op_OUT_DBB_A, upi42_op_ADD_A_imm, upi42_op_JMP_imm, upi42_op_EN_I, NULL, upi42_op_DEC_A, + /* 08 */ upi42_op_IN_A_Pp, upi42_op_IN_A_Pp, upi42_op_IN_A_Pp, NULL, upi42_op_MOVD_A_Pp, upi42_op_MOVD_A_Pp, upi42_op_MOVD_A_Pp, upi42_op_MOVD_A_Pp, + /* 10 */ upi42_op_INC_indRr, upi42_op_INC_indRr, upi42_op_JBb_imm, upi42_op_ADDC_A_imm, upi42_op_CALL_imm, upi42_op_DIS_I, upi42_op_JTF_imm, upi42_op_INC_A, + /* 18 */ upi42_op_INC_Rr, upi42_op_INC_Rr, upi42_op_INC_Rr, upi42_op_INC_Rr, upi42_op_INC_Rr, upi42_op_INC_Rr, upi42_op_INC_Rr, upi42_op_INC_Rr, + /* 20 */ upi42_op_XCH_A_indRr, upi42_op_XCH_A_indRr, upi42_op_IN_A_DBB, upi42_op_MOV_A_imm, upi42_op_JMP_imm, upi42_op_EN_TCNTI, upi42_op_JNT0_imm, upi42_op_CLR_A, + /* 28 */ upi42_op_XCH_A_Rr, upi42_op_XCH_A_Rr, upi42_op_XCH_A_Rr, upi42_op_XCH_A_Rr, upi42_op_XCH_A_Rr, upi42_op_XCH_A_Rr, upi42_op_XCH_A_Rr, upi42_op_XCH_A_Rr, + /* 30 */ upi42_op_XCHD_A_indRr, upi42_op_XCHD_A_indRr, upi42_op_JBb_imm, upi42_op_EN_A20, upi42_op_CALL_imm, upi42_op_DIS_TCNTI, upi42_op_JT0_imm, upi42_op_CPL_A, + /* 38 */ upi42_op_OUTL_Pp_A, upi42_op_OUTL_Pp_A, upi42_op_OUTL_Pp_A, upi42_op_OUTL_Pp_A, upi42_op_MOVD_Pp_A, upi42_op_MOVD_Pp_A, upi42_op_MOVD_Pp_A, upi42_op_MOVD_Pp_A, + /* 40 */ upi42_op_ORL_A_indRr, upi42_op_ORL_A_indRr, upi42_op_MOV_A_T, upi42_op_ORL_A_imm, upi42_op_JMP_imm, upi42_op_STRT_CNT, upi42_op_JNT1_imm, upi42_op_SWAP_A, + /* 48 */ upi42_op_ORL_A_Rr, upi42_op_ORL_A_Rr, upi42_op_ORL_A_Rr, upi42_op_ORL_A_Rr, upi42_op_ORL_A_Rr, upi42_op_ORL_A_Rr, upi42_op_ORL_A_Rr, upi42_op_ORL_A_Rr, + /* 50 */ upi42_op_ANL_A_indRr, upi42_op_ANL_A_indRr, upi42_op_JBb_imm, upi42_op_ANL_A_imm, upi42_op_CALL_imm, upi42_op_STRT_T, upi42_op_JT1_imm, upi42_op_DA_A, + /* 58 */ upi42_op_ANL_A_Rr, upi42_op_ANL_A_Rr, upi42_op_ANL_A_Rr, upi42_op_ANL_A_Rr, upi42_op_ANL_A_Rr, upi42_op_ANL_A_Rr, upi42_op_ANL_A_Rr, upi42_op_ANL_A_Rr, + /* 60 */ upi42_op_ADD_A_indRr, upi42_op_ADD_A_indRr, upi42_op_MOV_T_A, NULL, upi42_op_JMP_imm, upi42_op_STOP_TCNT, NULL, upi42_op_RRC_A, + /* 68 */ upi42_op_ADD_A_Rr, upi42_op_ADD_A_Rr, upi42_op_ADD_A_Rr, upi42_op_ADD_A_Rr, upi42_op_ADD_A_Rr, upi42_op_ADD_A_Rr, upi42_op_ADD_A_Rr, upi42_op_ADD_A_Rr, + /* 70 */ upi42_op_ADDC_A_indRr, upi42_op_ADDC_A_indRr, upi42_op_JBb_imm, NULL, upi42_op_CALL_imm, NULL, upi42_op_JF1_imm, upi42_op_RR_A, + /* 78 */ upi42_op_ADDC_A_Rr, upi42_op_ADDC_A_Rr, upi42_op_ADDC_A_Rr, upi42_op_ADDC_A_Rr, upi42_op_ADDC_A_Rr, upi42_op_ADDC_A_Rr, upi42_op_ADDC_A_Rr, upi42_op_ADDC_A_Rr, + /* 80 */ NULL, NULL, upi42_op_SUSPEND, upi42_op_RET, upi42_op_JMP_imm, upi42_op_CLR_F0, upi42_op_JOBF_imm, NULL, + /* 88 */ upi42_op_ORL_Pp_imm, upi42_op_ORL_Pp_imm, upi42_op_ORL_Pp_imm, upi42_op_ORL_Pp_imm, upi42_op_ORLD_Pp_A, upi42_op_ORLD_Pp_A, upi42_op_ORLD_Pp_A, upi42_op_ORLD_Pp_A, + /* 90 */ upi42_op_MOV_STS_A, NULL, upi42_op_JBb_imm, upi42_op_RET, upi42_op_CALL_imm, upi42_op_CPL_F0, upi42_op_JNZ_imm, upi42_op_CLR_C, + /* 98 */ upi42_op_ANL_Pp_imm, upi42_op_ANL_Pp_imm, upi42_op_ANL_Pp_imm, upi42_op_ANL_Pp_imm, upi42_op_ANLD_Pp_A, upi42_op_ANLD_Pp_A, upi42_op_ANLD_Pp_A, upi42_op_ANLD_Pp_A, + /* a0 */ upi42_op_MOV_indRr_A, upi42_op_MOV_indRr_A, NULL, upi42_op_MOVP_A_indA, upi42_op_JMP_imm, upi42_op_CLR_F1, NULL, upi42_op_CPL_C, + /* a8 */ upi42_op_MOV_Rr_A, upi42_op_MOV_Rr_A, upi42_op_MOV_Rr_A, upi42_op_MOV_Rr_A, upi42_op_MOV_Rr_A, upi42_op_MOV_Rr_A, upi42_op_MOV_Rr_A, upi42_op_MOV_Rr_A, + /* b0 */ upi42_op_MOV_indRr_imm,upi42_op_MOV_indRr_imm,upi42_op_JBb_imm, upi42_op_JMPP_indA, upi42_op_CALL_imm, upi42_op_CPL_F1, upi42_op_JF0_imm, NULL, + /* b8 */ upi42_op_MOV_Rr_imm, upi42_op_MOV_Rr_imm, upi42_op_MOV_Rr_imm, upi42_op_MOV_Rr_imm, upi42_op_MOV_Rr_imm, upi42_op_MOV_Rr_imm, upi42_op_MOV_Rr_imm, upi42_op_MOV_Rr_imm, + /* c0 */ NULL, NULL, NULL, NULL, upi42_op_JMP_imm, NULL, upi42_op_JZ_imm, upi42_op_MOV_A_PSW, + /* c8 */ upi42_op_DEC_Rr, upi42_op_DEC_Rr, upi42_op_DEC_Rr, upi42_op_DEC_Rr, upi42_op_DEC_Rr, upi42_op_DEC_Rr, upi42_op_DEC_Rr, upi42_op_DEC_Rr, + /* d0 */ upi42_op_XRL_A_indRr, upi42_op_XRL_A_indRr, upi42_op_JBb_imm, upi42_op_XRL_A_imm, upi42_op_CALL_imm, NULL, upi42_op_JNIBF_imm, upi42_op_MOV_PSW_A, + /* d8 */ upi42_op_XRL_A_Rr, upi42_op_XRL_A_Rr, upi42_op_XRL_A_Rr, upi42_op_XRL_A_Rr, upi42_op_XRL_A_Rr, upi42_op_XRL_A_Rr, upi42_op_XRL_A_Rr, upi42_op_XRL_A_Rr, + /* e0 */ NULL, NULL, upi42_op_SUSPEND, upi42_op_MOVP3_A_indA, upi42_op_JMP_imm, upi42_op_EN_DMA, upi42_op_JNC_imm, upi42_op_RL_A, + /* e8 */ upi42_op_DJNZ_Rr_imm, upi42_op_DJNZ_Rr_imm, upi42_op_DJNZ_Rr_imm, upi42_op_DJNZ_Rr_imm, upi42_op_DJNZ_Rr_imm, upi42_op_DJNZ_Rr_imm, upi42_op_DJNZ_Rr_imm, upi42_op_DJNZ_Rr_imm, + /* f0 */ upi42_op_MOV_A_indRr, upi42_op_MOV_A_indRr, upi42_op_JBb_imm, NULL, upi42_op_CALL_imm, upi42_op_EN_FLAGS, upi42_op_JC_imm, upi42_op_RLC_A, + /* f8 */ upi42_op_MOV_A_Rr, upi42_op_MOV_A_Rr, upi42_op_MOV_A_Rr, upi42_op_MOV_A_Rr, upi42_op_MOV_A_Rr, upi42_op_MOV_A_Rr, upi42_op_MOV_A_Rr, upi42_op_MOV_A_Rr + // clang-format on +}; + +static void +upi42_reset(upi42_t *upi42) +{ + upi42->pc = 0; /* program counter */ + upi42->psw = 0; /* stack pointer, register bank and F0 */ + upi42->dbf = 0; /* memory bank */ + upi42->i = upi42->tcnti = 0; /* both interrupts */ + upi42->tf = 0; /* timer flag */ + upi42->sts = 0; /* F1 */ + upi42->suspend = 0; /* 80C42 suspend flag */ +} + +static upi42_t * +upi42_init(int type) +{ + /* Allocate state structure. */ + upi42_t *upi42 = (upi42_t *) malloc(sizeof(upi42_t)); + memset(upi42, 0, sizeof(upi42_t)); + + /* Build instruction table. */ + memcpy(upi42->ops, ops_80c42, sizeof(ops_80c42)); + if (type < UPI42_80C42) { + /* Remove 80C42-only instructions. */ + upi42->ops[0x33] = NULL; /* EN A20 */ + upi42->ops[0x63] = NULL; /* SEL PMB0 */ + upi42->ops[0x73] = NULL; /* SEL PMB1 */ + upi42->ops[0x42] = NULL; /* SUSPEND */ + upi42->ops[0xe2] = NULL; /* SUSPEND */ + } + + return upi42; +} + +int +main(int argc, char **argv) +{ + upi42_t *upi42 = upi42_init(UPI42_8042); + + /* Load ROM. */ + FILE *f = fopen("1503033.bin", "rb"); + fread(upi42->rom, 1, sizeof(upi42->rom), f); + fclose(f); + + /* Start execution. */ + char buf[256]; + while (1) { + upi42->sts |= 0x02; + upi42->sts |= 0x08; + upi42->dbb_in = 0xaa; + upi42->cycs = 0; + + upi42_exec(upi42); + fgets(buf, 256, stdin); + } +} From f47b20a82405d157b5148805b8ac951304ae7604 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 13 Jul 2022 03:32:42 +0200 Subject: [PATCH 005/386] Attempt to optimize hard disk timings by reducing if's. --- src/disk/hdd.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/src/disk/hdd.c b/src/disk/hdd.c index 1b63a83e9..b66474098 100644 --- a/src/disk/hdd.c +++ b/src/disk/hdd.c @@ -165,6 +165,12 @@ hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_ break; } +#ifndef OLD_CODE + double continuous_times[2][2] = { { hdd->head_switch_usec, hdd->cyl_switch_usec }, + { zone->sector_time_usec, zone->sector_time_usec } }; + double times[2] = { 50.0, hdd->avg_rotation_lat_usec }; +#endif + uint32_t new_track = zone->start_track + ((dst_addr - zone->start_sector) / zone->sectors_per_track); uint32_t new_cylinder = new_track / hdd->phy_heads; uint32_t cylinder_diff = abs((int)hdd->cur_cylinder - (int)new_cylinder); @@ -174,6 +180,7 @@ hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_ double seek_time = 0.0; if (continuous) { +#ifdef OLD_CODE if (new_track == hdd->cur_track) { // Same track seek_time = zone->sector_time_usec; @@ -184,19 +191,31 @@ hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_ // Sequential cylinder seek_time = hdd->cyl_switch_usec; } +#else + seek_time = continuous_times[new_track == hdd->cur_track][!!cylinder_diff]; +#endif } else { if (!cylinder_diff) { +#ifdef OLD_CODE if (operation != HDD_OP_SEEK) { seek_time = hdd->avg_rotation_lat_usec; } else { //seek_time = hdd->cyl_switch_usec; seek_time = 50.0; } +#else + seek_time = times[operation != HDD_OP_SEEK]; +#endif } else { +#ifdef OLD_CODE seek_time = hdd->cyl_switch_usec + (hdd->full_stroke_usec * (double)cylinder_diff / (double)hdd->phy_cyl); if (operation != HDD_OP_SEEK) { seek_time += hdd->avg_rotation_lat_usec; } +#else + seek_time = hdd->cyl_switch_usec + (hdd->full_stroke_usec * (double)cylinder_diff / (double)hdd->phy_cyl) + + ((operation != HDD_OP_SEEK) * hdd->avg_rotation_lat_usec); +#endif } } From b164db81feebfb3f8680a420cf73499ef0e33471 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 13 Jul 2022 04:04:36 +0200 Subject: [PATCH 006/386] Added machine_status.o to Makefile.mingw. --- src/win/Makefile.mingw | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index c7c3df7d6..b4b802bbb 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -526,7 +526,7 @@ CXXFLAGS := $(CFLAGS) ######################################################################### MAINOBJ := 86box.o config.o log.o random.o timer.o io.o acpi.o apm.o dma.o ddma.o \ nmi.o pic.o pit.o port_6x.o port_92.o ppi.o pci.o mca.o fifo8.o \ - usb.o device.o nvr.o nvr_at.o nvr_ps2.o \ + usb.o device.o nvr.o nvr_at.o nvr_ps2.o machine_status.o \ $(VNCOBJ) MEMOBJ := catalyst_flash.o i2c_eeprom.o intel_flash.o mem.o rom.o smram.o spd.o sst_flash.o From d1bc26c3ae63f2f86da7c76bd9b311fcda9760db Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20Hrdli=C4=8Dka?= Date: Wed, 13 Jul 2022 15:56:12 +0200 Subject: [PATCH 007/386] vcpkg: fix OpenAL discovery --- CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index b78e4efe4..f9e856faf 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -27,7 +27,7 @@ if(NOT DEFINED QT OR QT) list(APPEND VCPKG_MANIFEST_FEATURES "qt-ui") endif() -if(OPENAL) +if(NOT DEFINED OPENAL OR OPENAL) list(APPEND VCPKG_MANIFEST_FEATURES "openal") endif() From 6821c03d0a314131ea0b9715c50b0e957774725f Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Wed, 13 Jul 2022 20:39:29 +0600 Subject: [PATCH 008/386] qt: restore fixed window size property --- src/qt/qt_mainwindow.cpp | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 17c91c9a0..72876c61c 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -1437,12 +1437,7 @@ void MainWindow::on_actionFullscreen_triggered() { if (!hide_tool_bar) ui->toolBar->show(); video_fullscreen = 0; if (vid_resize != 1) { - if (vid_resize == 2) setFixedSize(fixed_size_x, fixed_size_y - + menuBar()->height() - + (!hide_status_bar ? statusBar()->height() : 0) - + (!hide_tool_bar ? ui->toolBar->height() : 0)); - - emit resizeContents(monitors[0].mon_scrnsz_x, monitors[0].mon_scrnsz_y); + emit resizeContents(vid_resize == 2 ? fixed_size_x : monitors[0].mon_scrnsz_x, vid_resize == 2 ? fixed_size_y : monitors[0].mon_scrnsz_y); } } else { if (video_fullscreen_first) From a61f10fe55cb1eee2dfbd37b5ff89d598ac1df93 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Wed, 13 Jul 2022 23:55:37 +0600 Subject: [PATCH 009/386] qt: Fix double free when multi-monitor is enabled and evdev is used --- src/qt/evdev_mouse.cpp | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/qt/evdev_mouse.cpp b/src/qt/evdev_mouse.cpp index 8d708d3a1..120f4572c 100644 --- a/src/qt/evdev_mouse.cpp +++ b/src/qt/evdev_mouse.cpp @@ -70,6 +70,7 @@ void evdev_thread_func() for (unsigned int i = 0; i < evdev_mice.size(); i++) { libevdev_free(evdev_mice[i].second); + evdev_mice[i].second = nullptr; close(evdev_mice[i].first); } evdev_mice.clear(); @@ -77,12 +78,16 @@ void evdev_thread_func() void evdev_stop() { - stopped = true; - evdev_thread->wait(); + if (evdev_thread) { + stopped = true; + evdev_thread->wait(); + evdev_thread = nullptr; + } } void evdev_init() { + if (evdev_thread) return; for (int i = 0; i < 256; i++) { std::string evdev_device_path = "/dev/input/event" + std::to_string(i); From 16690b520330ccb65b8d4cef15af2070ef47bee0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20Hrdli=C4=8Dka?= Date: Wed, 13 Jul 2022 17:03:21 +0200 Subject: [PATCH 010/386] Actions: Fix macOS build --- .github/workflows/cmake.yml | 7 ++++--- src/sound/CMakeLists.txt | 7 ++++--- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/.github/workflows/cmake.yml b/.github/workflows/cmake.yml index 5606f1342..475a5bc35 100644 --- a/.github/workflows/cmake.yml +++ b/.github/workflows/cmake.yml @@ -275,11 +275,12 @@ jobs: run: brew install freetype sdl2 libpng rtmidi qt@5 openal-soft ninja - name: Configure CMake run: >- - PATH=/usr/local/opt/qt@5/bin:$PATH cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }} - --toolchain cmake/flags-gcc-x86_64.cmake + --toolchain cmake/flags-gcc-x86_64.cmake --debug-find -D NEW_DYNAREC=${{ matrix.build.new-dynarec }} - -D CMAKE_FIND_ROOT_PATH=/usr/local/opt/qt@5 + -D Qt5_ROOT=$(brew --prefix qt@5) + -D Qt5LinguistTools_ROOT=$(brew --prefix qt@5) + -D OpenAL_ROOT=$(brew --prefix openal-soft) - name: Build run: cmake --build build - name: Generate package diff --git a/src/sound/CMakeLists.txt b/src/sound/CMakeLists.txt index 087f62cb1..c0aaa2790 100644 --- a/src/sound/CMakeLists.txt +++ b/src/sound/CMakeLists.txt @@ -31,10 +31,11 @@ if(OPENAL) if(TARGET OpenAL::OpenAL) target_link_libraries(86Box OpenAL::OpenAL) else() - include_directories(${OPENAL_INCLUDE_DIR}) target_link_libraries(86Box ${OPENAL_LIBRARY}) endif() + include_directories(${OPENAL_INCLUDE_DIR}) + target_sources(snd PRIVATE openal.c) else() if(WIN32) @@ -49,16 +50,16 @@ else() # Use FAudio, a reimplementation of XAudio2 pkg_check_modules(FAUDIO IMPORTED_TARGET FAudio) if(FAUDIO_FOUND) - include_directories(${FAUDIO_INCLUDE_DIRS}) target_link_libraries(86Box PkgConfig::FAUDIO) else() find_path(FAUDIO_INCLUDE_DIR NAMES "FAudio.h") find_library(FAUDIO_LIBRARY FAudio) - include_directories(${FAUDIO_INCLUDE_DIR}) target_link_libraries(86Box ${FAUDIO_LIBRARY}) endif() + include_directories(${FAUDIO_INCLUDE_DIRS}) + set_property(SOURCE xaudio2.c PROPERTY COMPILE_DEFINITIONS USE_FAUDIO) endif() endif() From d4e22bcedb1180d409c524f7067a74d7c9bedc9b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20Hrdli=C4=8Dka?= Date: Wed, 13 Jul 2022 21:53:21 +0200 Subject: [PATCH 011/386] Actions: Remove a leftover debug parameter --- .github/workflows/cmake.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/cmake.yml b/.github/workflows/cmake.yml index 475a5bc35..a1b9b4d5b 100644 --- a/.github/workflows/cmake.yml +++ b/.github/workflows/cmake.yml @@ -276,7 +276,7 @@ jobs: - name: Configure CMake run: >- cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }} - --toolchain cmake/flags-gcc-x86_64.cmake --debug-find + --toolchain cmake/flags-gcc-x86_64.cmake -D NEW_DYNAREC=${{ matrix.build.new-dynarec }} -D Qt5_ROOT=$(brew --prefix qt@5) -D Qt5LinguistTools_ROOT=$(brew --prefix qt@5) From cddd0302a5844be51db652f6b921915decd28dfa Mon Sep 17 00:00:00 2001 From: richardg867 Date: Wed, 13 Jul 2022 19:06:52 -0300 Subject: [PATCH 012/386] Another day of work on the 8042 emulator --- src/upi42.c | 528 +++++++++++++++++++++++++++++++++++++--------------- 1 file changed, 374 insertions(+), 154 deletions(-) diff --git a/src/upi42.c b/src/upi42.c index e98af5496..216f87c73 100644 --- a/src/upi42.c +++ b/src/upi42.c @@ -18,41 +18,52 @@ #include #include #include -#define fatal printf -#define pclog printf -enum { - UPI42_8042 = 0, - UPI42_80C42 -}; +#ifdef UPI42_STANDALONE +# define fatal(...) \ + upi42_log(__VA_ARGS__); \ + abort(); +# define upi42_log printf +#endif + +#define UPI42_REG(upi42, r, op) ((upi42->psw & 0x10) ? (upi42->ram[24 + ((r) &7)] op) : (upi42->ram[(r) &7] op)) + +#define UPI42_ROM_SHIFT 0 /* actually the mask */ +#define UPI42_RAM_SHIFT 16 /* actually the mask */ +#define UPI42_TYPE_MCS (0 << 24) +#define UPI42_TYPE_UPI (1 << 24) +#define UPI42_EXT_C42 (1 << 25) + +#define UPI42_8048 ((1023 << UPI42_ROM_SHIFT) | (63 << UPI42_RAM_SHIFT) | UPI42_TYPE_MCS) +#define UPI42_8049 ((2047 << UPI42_ROM_SHIFT) | (127 << UPI42_RAM_SHIFT) | UPI42_TYPE_MCS) +#define UPI42_8041 ((1023 << UPI42_ROM_SHIFT) | (127 << UPI42_RAM_SHIFT) | UPI42_TYPE_UPI) +#define UPI42_8042 ((2047 << UPI42_ROM_SHIFT) | (255 << UPI42_RAM_SHIFT) | UPI42_TYPE_UPI) +#define UPI42_80C42 ((4095 << UPI42_ROM_SHIFT) | (255 << UPI42_RAM_SHIFT) | UPI42_TYPE_UPI | UPI42_EXT_C42) typedef struct _upi42_ { int (*ops[256])(struct _upi42_ *upi42, uint32_t fetchdat); - uint8_t ram[256], rom[4096], /* memory */ - ports[7], /* I/O ports */ - dbb_in, dbb_out; /* UPI-42 data buffer */ + uint32_t type; + uint8_t ram[256], *rom, /* memory */ + ports_in[8], ports_out[8], /* I/O ports */ + dbb_in, dbb_out; /* UPI-42 data buffer */ - uint8_t rammask, - a, /* accumulator */ - t, /* timer counter */ - psw, /* program status word */ - sts; /* UPI-42 status */ + uint8_t rammask, /* RAM mask */ + a, /* accumulator */ + t, /* timer counter */ + psw, /* program status word */ + sts; /* UPI-42 status */ - uint16_t pc; /* program counter */ + uint16_t pc, rommask; /* program counter and ROM mask */ - unsigned int prescaler : 5, tf : 1, tcnti : 1, run_timer : 1, run_counter : 1, skip_timer_inc : 1, /* timer/counter */ - i : 1, i_asserted : 1, tcnti_asserted : 1, irq_mask : 1, /* interrupts */ - dbf : 1, /* ROM bank */ - t0 : 1, t1 : 1, /* T0/T1 signals */ - flags : 1, /* buffer flag pins */ - suspend : 1; /* 80C42 suspend flag */ + unsigned int prescaler : 5, tf : 1, skip_timer_inc : 1, /* timer/counter */ + run_timer : 1, run_counter : 1, tcnti : 1, /* timer/counter enables */ + i : 1, i_raise : 1, tcnti_raise : 1, irq_mask : 1, /* interrupts */ + t0 : 1, t1 : 1, /* T0/T1 signals */ + flags : 1, dbf : 1, suspend : 1; /* UPI-42 flags */ int cycs; /* cycle counter */ } upi42_t; -#define UPI42_REG_READ(upi42, r) ((upi42->psw & 0x10) ? (upi42->ram[24 + ((r) &7)]) : (upi42->ram[(r) &7])) -#define UPI42_REG_WRITE(upi42, r, op) ((upi42->psw & 0x10) ? (upi42->ram[24 + ((r) &7)] op) : (upi42->ram[(r) &7] op)) - static inline void upi42_mirror_f0(upi42_t *upi42) { @@ -63,14 +74,14 @@ upi42_mirror_f0(upi42_t *upi42) static int upi42_op_MOV_A_Rr(upi42_t *upi42, uint32_t fetchdat) { - upi42->a = UPI42_REG_READ(upi42, fetchdat); + upi42->a = UPI42_REG(upi42, fetchdat, ); return 1; } static int upi42_op_MOV_Rr_A(upi42_t *upi42, uint32_t fetchdat) { - UPI42_REG_WRITE(upi42, fetchdat, = upi42->a); + UPI42_REG(upi42, fetchdat, = upi42->a); return 1; } @@ -91,7 +102,7 @@ upi42_op_MOV_indRr_A(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_MOV_Rr_imm(upi42_t *upi42, uint32_t fetchdat) { - UPI42_REG_WRITE(upi42, fetchdat, = fetchdat >> 8); + UPI42_REG(upi42, fetchdat, = fetchdat >> 8); upi42->cycs--; return 2; } @@ -169,8 +180,8 @@ static int upi42_op_XCH_A_Rr(upi42_t *upi42, uint32_t fetchdat) { uint8_t temp = upi42->a; - upi42->a = UPI42_REG_READ(upi42, fetchdat); - UPI42_REG_WRITE(upi42, fetchdat, = temp); + upi42->a = UPI42_REG(upi42, fetchdat, ); + UPI42_REG(upi42, fetchdat, = temp); return 1; } @@ -202,7 +213,8 @@ upi42_op_SWAP_A(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_IN_A_Pp(upi42_t *upi42, uint32_t fetchdat) { - upi42->a = upi42->ports[fetchdat & 3]; + int port = fetchdat & 3; + upi42->a = upi42->ports_in[port] & upi42->ports_out[port]; upi42->cycs--; return 1; } @@ -211,13 +223,14 @@ static int upi42_op_IN_A_DBB(upi42_t *upi42, uint32_t fetchdat) { upi42->a = upi42->dbb_in; + upi42->sts &= ~0x02; /* clear IBF */ return 1; } static int upi42_op_OUTL_Pp_A(upi42_t *upi42, uint32_t fetchdat) { - upi42->ports[fetchdat & 3] = upi42->a; + upi42->ports_out[fetchdat & 3] = upi42->a; upi42->cycs--; return 1; } @@ -226,14 +239,15 @@ static int upi42_op_OUT_DBB_A(upi42_t *upi42, uint32_t fetchdat) { upi42->dbb_out = upi42->a; - upi42->sts |= 0x01; + upi42->sts |= 0x01; /* set OBF */ return 1; } static int upi42_op_MOVD_A_Pp(upi42_t *upi42, uint32_t fetchdat) { - upi42->a = upi42->ports[4 | (fetchdat & 3)] & 0x0f; + int port = 4 | (fetchdat & 3); + upi42->a = (upi42->ports_in[port] & upi42->ports_out[port]) & 0x0f; upi42->cycs--; return 1; } @@ -241,7 +255,7 @@ upi42_op_MOVD_A_Pp(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_MOVD_Pp_A(upi42_t *upi42, uint32_t fetchdat) { - upi42->ports[4 | (fetchdat & 3)] = upi42->a & 0x0f; + upi42->ports_out[4 | (fetchdat & 3)] = upi42->a & 0x0f; upi42->cycs--; return 1; } @@ -249,21 +263,21 @@ upi42_op_MOVD_Pp_A(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_ANL_A_Rr(upi42_t *upi42, uint32_t fetchdat) { - upi42->a &= UPI42_REG_READ(upi42, fetchdat); + upi42->a &= UPI42_REG(upi42, fetchdat, ); return 1; } static int upi42_op_ORL_A_Rr(upi42_t *upi42, uint32_t fetchdat) { - upi42->a |= UPI42_REG_READ(upi42, fetchdat); + upi42->a |= UPI42_REG(upi42, fetchdat, ); return 1; } static int upi42_op_XRL_A_Rr(upi42_t *upi42, uint32_t fetchdat) { - upi42->a ^= UPI42_REG_READ(upi42, fetchdat); + upi42->a ^= UPI42_REG(upi42, fetchdat, ); return 1; } @@ -315,7 +329,7 @@ upi42_op_XRL_A_imm(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_ANL_Pp_imm(upi42_t *upi42, uint32_t fetchdat) { - upi42->ports[fetchdat & 3] &= fetchdat >> 8; + upi42->ports_out[fetchdat & 3] &= fetchdat >> 8; upi42->cycs--; return 2; } @@ -323,7 +337,7 @@ upi42_op_ANL_Pp_imm(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_ORL_Pp_imm(upi42_t *upi42, uint32_t fetchdat) { - upi42->ports[fetchdat & 3] |= fetchdat >> 8; + upi42->ports_out[fetchdat & 3] |= fetchdat >> 8; upi42->cycs--; return 2; } @@ -331,7 +345,7 @@ upi42_op_ORL_Pp_imm(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_ANLD_Pp_A(upi42_t *upi42, uint32_t fetchdat) { - upi42->ports[4 | (fetchdat & 3)] &= upi42->a; + upi42->ports_out[4 | (fetchdat & 3)] &= upi42->a; upi42->cycs--; return 1; } @@ -339,7 +353,7 @@ upi42_op_ANLD_Pp_A(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_ORLD_Pp_A(upi42_t *upi42, uint32_t fetchdat) { - upi42->ports[4 | (fetchdat & 3)] |= upi42->a; + upi42->ports_out[4 | (fetchdat & 3)] |= upi42->a; upi42->cycs--; return 1; } @@ -386,7 +400,7 @@ upi42_op_INC_A(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_INC_Rr(upi42_t *upi42, uint32_t fetchdat) { - UPI42_REG_WRITE(upi42, fetchdat, ++); + UPI42_REG(upi42, fetchdat, ++); return 1; } @@ -407,15 +421,16 @@ upi42_op_DEC_A(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_DEC_Rr(upi42_t *upi42, uint32_t fetchdat) { - UPI42_REG_WRITE(upi42, fetchdat, --); + UPI42_REG(upi42, fetchdat, --); return 1; } static int upi42_op_DJNZ_Rr_imm(upi42_t *upi42, uint32_t fetchdat) { - UPI42_REG_WRITE(upi42, fetchdat, --); - if (UPI42_REG_READ(upi42, fetchdat)) { + upi42->cycs--; + UPI42_REG(upi42, fetchdat, --); + if (UPI42_REG(upi42, fetchdat, )) { upi42->pc = (upi42->pc & 0xff00) | ((fetchdat >> 8) & 0xff); return 0; } else { @@ -426,7 +441,7 @@ upi42_op_DJNZ_Rr_imm(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_ADD_A_Rr(upi42_t *upi42, uint32_t fetchdat) { - int res = upi42->a + UPI42_REG_READ(upi42, fetchdat); + int res = upi42->a + UPI42_REG(upi42, fetchdat, ); upi42->a = res; upi42->psw = ((res >> 1) & 0x80) | (upi42->psw & ~0x80); return 1; @@ -435,7 +450,7 @@ upi42_op_ADD_A_Rr(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_ADDC_A_Rr(upi42_t *upi42, uint32_t fetchdat) { - int res = upi42->a + (upi42->psw >> 7) + UPI42_REG_READ(upi42, fetchdat); + int res = upi42->a + (upi42->psw >> 7) + UPI42_REG(upi42, fetchdat, ); upi42->a = res; upi42->psw = ((res >> 1) & 0x80) | (upi42->psw & ~0x80); return 1; @@ -444,7 +459,7 @@ upi42_op_ADDC_A_Rr(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_ADD_A_indRr(upi42_t *upi42, uint32_t fetchdat) { - int res = upi42->a + upi42->ram[UPI42_REG_READ(upi42, fetchdat) & upi42->rammask]; + int res = upi42->a + upi42->ram[UPI42_REG(upi42, fetchdat, ) & upi42->rammask]; upi42->a = res; upi42->psw = ((res >> 1) & 0x80) | (upi42->psw & ~0x80); return 1; @@ -453,7 +468,7 @@ upi42_op_ADD_A_indRr(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_ADDC_A_indRr(upi42_t *upi42, uint32_t fetchdat) { - int res = upi42->a + (upi42->psw >> 7) + upi42->ram[UPI42_REG_READ(upi42, fetchdat) & upi42->rammask]; + int res = upi42->a + (upi42->psw >> 7) + upi42->ram[UPI42_REG(upi42, fetchdat, ) & upi42->rammask]; upi42->a = res; upi42->psw = ((res >> 1) & 0x80) | (upi42->psw & ~0x80); return 1; @@ -576,7 +591,7 @@ upi42_op_EN_TCNTI(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_DIS_TCNTI(upi42_t *upi42, uint32_t fetchdat) { - upi42->tcnti = upi42->tcnti_asserted = 0; + upi42->tcnti = upi42->tcnti_raise = 0; return 1; } @@ -644,16 +659,14 @@ upi42_op_CALL_imm(upi42_t *upi42, uint32_t fetchdat) { /* Push new frame onto stack. */ uint8_t sp = (upi42->psw & 0x07) << 1; - upi42->ram[8 + sp++] = upi42->pc; /* stack frame format is undocumented! */ + upi42->ram[8 + sp++] = upi42->pc + 2; /* stack frame format is undocumented! */ upi42->ram[8 + sp++] = (upi42->psw & 0xf0) | ((upi42->pc >> 8) & 0x07); upi42->psw = (upi42->psw & 0xf8) | (sp >> 1); /* Load new program counter. */ upi42->pc = (upi42->dbf << 11) | ((fetchdat << 3) & 0x0700) | ((fetchdat >> 8) & 0x00ff); - /* Don't decrease cycle counter if this is an interrupt call. */ - if (fetchdat & 0xff) - upi42->cycs--; + upi42->cycs--; return 0; } @@ -703,24 +716,24 @@ upi42_op_JMPP_indA(upi42_t *upi42, uint32_t fetchdat) { \ if (cond) \ upi42->pc = (upi42->pc & 0xff00) | ((fetchdat >> 8) & 0x00ff); \ - post \ - upi42->cycs--; \ + post; \ + upi42->cycs--; \ return 2 * !(cond); \ } -UPI42_COND_JMP_IMM(JC, upi42->psw & 0x80, ;) -UPI42_COND_JMP_IMM(JNC, !(upi42->psw & 0x80), ;) -UPI42_COND_JMP_IMM(JZ, !upi42->a, ;) -UPI42_COND_JMP_IMM(JNZ, upi42->a, ;) -UPI42_COND_JMP_IMM(JT0, upi42->t0, ;) -UPI42_COND_JMP_IMM(JNT0, !upi42->t0, ;) -UPI42_COND_JMP_IMM(JT1, upi42->t1, ;) -UPI42_COND_JMP_IMM(JNT1, !upi42->t1, ;) -UPI42_COND_JMP_IMM(JF0, upi42->psw & 0x20, ;) -UPI42_COND_JMP_IMM(JF1, upi42->sts & 0x08, ;) -UPI42_COND_JMP_IMM(JTF, !upi42->tf, upi42->tf = 0;) -UPI42_COND_JMP_IMM(JBb, upi42->a &(1 << ((fetchdat >> 5) & 7)), ;) -UPI42_COND_JMP_IMM(JNIBF, !(upi42->sts & 0x02), ;) -UPI42_COND_JMP_IMM(JOBF, upi42->sts & 0x01, ;) +UPI42_COND_JMP_IMM(JC, upi42->psw & 0x80, ) +UPI42_COND_JMP_IMM(JNC, !(upi42->psw & 0x80), ) +UPI42_COND_JMP_IMM(JZ, !upi42->a, ) +UPI42_COND_JMP_IMM(JNZ, upi42->a, ) +UPI42_COND_JMP_IMM(JT0, upi42->t0, ) +UPI42_COND_JMP_IMM(JNT0, !upi42->t0, ) +UPI42_COND_JMP_IMM(JT1, upi42->t1, ) +UPI42_COND_JMP_IMM(JNT1, !upi42->t1, ) +UPI42_COND_JMP_IMM(JF0, upi42->psw & 0x20, ) +UPI42_COND_JMP_IMM(JF1, upi42->sts & 0x08, ) +UPI42_COND_JMP_IMM(JTF, !upi42->tf, upi42->tf = 0) +UPI42_COND_JMP_IMM(JBb, upi42->a &(1 << ((fetchdat >> 5) & 7)), ) +UPI42_COND_JMP_IMM(JNIBF, !(upi42->sts & 0x02), ) +UPI42_COND_JMP_IMM(JOBF, upi42->sts & 0x01, ) static int upi42_op_EN_A20(upi42_t *upi42, uint32_t fetchdat) @@ -738,6 +751,7 @@ upi42_op_EN_DMA(upi42_t *upi42, uint32_t fetchdat) static int upi42_op_EN_FLAGS(upi42_t *upi42, uint32_t fetchdat) { + upi42->flags = 1; return 1; } @@ -749,65 +763,6 @@ upi42_op_SUSPEND(upi42_t *upi42, uint32_t fetchdatr) return 1; } -static void -upi42_exec(void *priv) -{ - upi42_t *upi42 = (upi42_t *) priv; - - /* Skip interrupt handling and code execution if we're suspended or in a multi-cycle instruction. */ - if (upi42->suspend || ++upi42->cycs < 0) - return; - - /* Trigger interrupt if requested. */ - if (upi42->irq_mask) { - /* Masked, we're currently in an ISR. */ - } else if (upi42->i_asserted) { - /* External interrupt. Higher priority than the timer interrupt. */ - upi42->irq_mask = 1; - upi42->i_asserted = 0; - upi42_op_CALL_imm(upi42, 3 << 8); - return; - } else if (upi42->tcnti_asserted) { - /* Timer interrupt. */ - upi42->irq_mask = 1; - upi42->tcnti_asserted = 0; - upi42_op_CALL_imm(upi42, 7 << 8); - return; - } - - /* Fetch instruction. */ - uint32_t fetchdat = *((uint32_t *) &upi42->rom[upi42->pc]); - pclog("%04X @ %04X R0=%02X", fetchdat & 0xffff, upi42->pc, upi42->ram[0]); - - /* Decode instruction. */ - uint8_t insn = fetchdat & 0xff; - if (upi42->ops[insn]) { - /* Execute instruction and increment program counter. */ - upi42->pc += upi42->ops[insn](upi42, fetchdat); - - /* Decrement cycle counter. Multi-cycle instructions also decrement within their code. */ - upi42->cycs--; - } else { - fatal("UPI42: Unknown opcode %02X (%08X)\n", insn, fetchdat); - return; - } - - /* Some instructions don't increment the timer. */ - if (upi42->skip_timer_inc) { - upi42->skip_timer_inc = 0; - } else { - /* Increment counter once the prescaler overflows, - and set timer flag once the main value overflows. */ - if ((++upi42->prescaler == 0) && (++upi42->t == 0)) { - upi42->tf = 1; - - /* Fire counter interrupt if enabled. */ - if (upi42->tcnti) - upi42->tcnti_asserted = 1; - } - } -} - static const int (*ops_80c42[256])(upi42_t *upi42, uint32_t fetchdat) = { // clang-format off /* 0 / 8 */ /* 1 / 9 */ /* 2 / a */ /* 3 / b */ /* 4 / c */ /* 5 / d */ /* 6 / e */ /* 7 / f */ @@ -823,9 +778,9 @@ static const int (*ops_80c42[256])(upi42_t *upi42, uint32_t fetchdat) = { /* 48 */ upi42_op_ORL_A_Rr, upi42_op_ORL_A_Rr, upi42_op_ORL_A_Rr, upi42_op_ORL_A_Rr, upi42_op_ORL_A_Rr, upi42_op_ORL_A_Rr, upi42_op_ORL_A_Rr, upi42_op_ORL_A_Rr, /* 50 */ upi42_op_ANL_A_indRr, upi42_op_ANL_A_indRr, upi42_op_JBb_imm, upi42_op_ANL_A_imm, upi42_op_CALL_imm, upi42_op_STRT_T, upi42_op_JT1_imm, upi42_op_DA_A, /* 58 */ upi42_op_ANL_A_Rr, upi42_op_ANL_A_Rr, upi42_op_ANL_A_Rr, upi42_op_ANL_A_Rr, upi42_op_ANL_A_Rr, upi42_op_ANL_A_Rr, upi42_op_ANL_A_Rr, upi42_op_ANL_A_Rr, - /* 60 */ upi42_op_ADD_A_indRr, upi42_op_ADD_A_indRr, upi42_op_MOV_T_A, NULL, upi42_op_JMP_imm, upi42_op_STOP_TCNT, NULL, upi42_op_RRC_A, + /* 60 */ upi42_op_ADD_A_indRr, upi42_op_ADD_A_indRr, upi42_op_MOV_T_A, upi42_op_SEL_PMB0, upi42_op_JMP_imm, upi42_op_STOP_TCNT, NULL, upi42_op_RRC_A, /* 68 */ upi42_op_ADD_A_Rr, upi42_op_ADD_A_Rr, upi42_op_ADD_A_Rr, upi42_op_ADD_A_Rr, upi42_op_ADD_A_Rr, upi42_op_ADD_A_Rr, upi42_op_ADD_A_Rr, upi42_op_ADD_A_Rr, - /* 70 */ upi42_op_ADDC_A_indRr, upi42_op_ADDC_A_indRr, upi42_op_JBb_imm, NULL, upi42_op_CALL_imm, NULL, upi42_op_JF1_imm, upi42_op_RR_A, + /* 70 */ upi42_op_ADDC_A_indRr, upi42_op_ADDC_A_indRr, upi42_op_JBb_imm, upi42_op_SEL_PMB1, upi42_op_CALL_imm, NULL, upi42_op_JF1_imm, upi42_op_RR_A, /* 78 */ upi42_op_ADDC_A_Rr, upi42_op_ADDC_A_Rr, upi42_op_ADDC_A_Rr, upi42_op_ADDC_A_Rr, upi42_op_ADDC_A_Rr, upi42_op_ADDC_A_Rr, upi42_op_ADDC_A_Rr, upi42_op_ADDC_A_Rr, /* 80 */ NULL, NULL, upi42_op_SUSPEND, upi42_op_RET, upi42_op_JMP_imm, upi42_op_CLR_F0, upi42_op_JOBF_imm, NULL, /* 88 */ upi42_op_ORL_Pp_imm, upi42_op_ORL_Pp_imm, upi42_op_ORL_Pp_imm, upi42_op_ORL_Pp_imm, upi42_op_ORLD_Pp_A, upi42_op_ORLD_Pp_A, upi42_op_ORLD_Pp_A, upi42_op_ORLD_Pp_A, @@ -847,27 +802,184 @@ static const int (*ops_80c42[256])(upi42_t *upi42, uint32_t fetchdat) = { }; static void -upi42_reset(upi42_t *upi42) +upi42_exec(void *priv) { - upi42->pc = 0; /* program counter */ - upi42->psw = 0; /* stack pointer, register bank and F0 */ - upi42->dbf = 0; /* memory bank */ - upi42->i = upi42->tcnti = 0; /* both interrupts */ - upi42->tf = 0; /* timer flag */ - upi42->sts = 0; /* F1 */ - upi42->suspend = 0; /* 80C42 suspend flag */ + upi42_t *upi42 = (upi42_t *) priv; + + /* Skip everything if we're suspended, or just process timer if we're in a multi-cycle instruction. */ + if (upi42->suspend) + return; + else if (++upi42->cycs < 0) + goto timer; + + /* Trigger interrupt if requested. */ + if (upi42->irq_mask) { + /* Masked, we're currently in an ISR. */ + } else if (upi42->i_raise) { + /* External interrupt. Higher priority than the timer interrupt. */ + upi42->irq_mask = 1; + upi42->i_raise = 0; + + upi42->pc -= 2; + upi42->cycs++; + upi42_op_CALL_imm(upi42, 3 << 8); + return; + } else if (upi42->tcnti_raise) { + /* Timer interrupt. */ + upi42->irq_mask = 1; + upi42->tcnti_raise = 0; + + upi42->pc -= 2; + upi42->cycs++; + upi42_op_CALL_imm(upi42, 7 << 8); + return; + } + + /* Fetch instruction. */ + uint32_t fetchdat = *((uint32_t *) &upi42->rom[upi42->pc]); + + /* Decode instruction. */ + uint8_t insn = fetchdat & 0xff; + if (upi42->ops[insn]) { + /* Execute instruction. */ + int pc_inc = upi42->ops[insn](upi42, fetchdat); + + /* Increment lower 11 bits of the program counter. */ + upi42->pc = (upi42->pc & 0xf800) | ((upi42->pc + pc_inc) & 0x07ff); + + /* Decrement cycle counter. Multi-cycle instructions also decrement within their code. */ + upi42->cycs--; + } else { + fatal("UPI42: Unknown opcode %02X (%08X)\n", insn, fetchdat); + return; + } + +timer: + /* Process timer. */ + if (!upi42->run_timer) { + /* Timer disabled. */ + } else if (upi42->skip_timer_inc) { + /* Some instructions don't increment the timer. */ + upi42->skip_timer_inc = 0; + } else { + /* Increment counter once the prescaler overflows, + and set timer flag once the main value overflows. */ + if ((++upi42->prescaler == 0) && (++upi42->t == 0)) { + upi42->tf = 1; + + /* Fire counter interrupt if enabled. */ + if (upi42->tcnti) + upi42->tcnti_raise = 1; + } + } } -static upi42_t * -upi42_init(int type) +uint8_t +upi42_port_read(void *priv, int port) +{ + upi42_t *upi42 = (upi42_t *) priv; + + /* Read base port value. */ + port &= 7; + uint8_t ret = upi42->ports_in[port] & upi42->ports_out[port]; + + /* Apply special meanings. */ + switch (port) { + } + + upi42_log("UPI42: port_read(%d) = %02X\n", port, ret); + return ret; +} + +void +upi42_port_write(void *priv, int port, uint8_t val) +{ + upi42_t *upi42 = (upi42_t *) priv; + + port &= 7; + upi42_log("UPI42: port_write(%d, %02X)\n", port, val); + + /* Set input level. */ + upi42->ports_in[port] = val; +} + +/* NOTE: The dbb/sts/cmd functions use I/O handler signatures; port is ignored. */ + +uint8_t +upi42_dbb_read(uint16_t port, void *priv) +{ + upi42_t *upi42 = (upi42_t *) priv; + + uint8_t ret = upi42->dbb_out; + upi42_log("UPI42: dbb_read(%04X) = %02X\n", port, ret); + upi42->sts &= ~0x01; /* clear OBF */ + return ret; +} + +void +upi42_dbb_write(uint16_t port, uint8_t val, void *priv) +{ + upi42_t *upi42 = (upi42_t *) priv; + + upi42_log("UPI42: dbb_write(%04X, %02X)\n", port, val); + upi42->dbb_in = val; + upi42->sts = (upi42->sts & ~0x08) | 0x02; /* clear F1 and set IBF */ + if (upi42->i) /* fire IBF interrupt if enabled */ + upi42->i_raise = 1; +} + +uint8_t +upi42_sts_read(uint16_t port, void *priv) +{ + upi42_t *upi42 = (upi42_t *) priv; + + uint8_t ret = upi42->sts; + upi42_log("UPI42: sts_read(%04X) = %02X\n", port, ret); + return ret; +} + +void +upi42_cmd_write(uint16_t port, uint8_t val, void *priv) +{ + upi42_t *upi42 = (upi42_t *) priv; + + upi42_log("UPI42: cmd_write(%04X, %02X)\n", port, val); + upi42->dbb_in = val; + upi42->sts |= 0x0a; /* set F1 and IBF */ + if (upi42->i) /* fire IBF interrupt if enabled */ + upi42->i_raise = 1; +} + +void +upi42_reset(upi42_t *upi42) +{ + upi42->pc = 0; /* program counter */ + upi42->psw = 0; /* stack pointer, register bank and F0 */ + upi42->dbf = 0; /* ROM bank */ + upi42->i = 0; /* external interrupt */ + upi42->tcnti = 0; /* timer/counter interrupt */ + upi42->tf = 0; /* timer flag */ + upi42->sts = 0; /* F1 */ + upi42->flags = 0; /* UPI-42 buffer interrupts */ + upi42->suspend = 0; /* 80C42 suspend flag */ +} + +void * +upi42_init(uint32_t type, uint8_t *rom) { /* Allocate state structure. */ upi42_t *upi42 = (upi42_t *) malloc(sizeof(upi42_t)); memset(upi42, 0, sizeof(upi42_t)); + upi42->rom = rom; + + /* Set chip type. */ + upi42->type = type; + upi42->rommask = type >> UPI42_ROM_SHIFT; + upi42->rammask = type >> UPI42_RAM_SHIFT; /* Build instruction table. */ memcpy(upi42->ops, ops_80c42, sizeof(ops_80c42)); - if (type < UPI42_80C42) { + if (!(type & UPI42_EXT_C42)) { /* Remove 80C42-only instructions. */ upi42->ops[0x33] = NULL; /* EN A20 */ upi42->ops[0x63] = NULL; /* SEL PMB0 */ @@ -879,25 +991,133 @@ upi42_init(int type) return upi42; } +#ifdef UPI42_STANDALONE +static const char *flags_8042[] = { "OBF", "IBF", "F0", "F1", "ST4", "ST5", "ST6", "ST7" }; + int main(int argc, char **argv) { - upi42_t *upi42 = upi42_init(UPI42_8042); + /* Check arguments. */ + if (argc < 2) { + upi42_log("Specify a ROM file to execute.\n"); + return 1; + } /* Load ROM. */ - FILE *f = fopen("1503033.bin", "rb"); - fread(upi42->rom, 1, sizeof(upi42->rom), f); + uint8_t rom[4096] = { 0 }; + FILE *f = fopen(argv[1], "rb"); + if (!f) { + upi42_log("Could not read ROM file.\n"); + return 2; + } + size_t rom_size = fread(rom, sizeof(rom[0]), sizeof(rom), f); fclose(f); - /* Start execution. */ - char buf[256]; - while (1) { - upi42->sts |= 0x02; - upi42->sts |= 0x08; - upi42->dbb_in = 0xaa; - upi42->cycs = 0; + /* Determine chip type from ROM. */ + upi42_log("%d-byte ROM, ", rom_size); + uint32_t type; + switch (rom_size) { + case 0 ... 1024: + upi42_log("emulating 8041"); + type = UPI42_8041; + break; - upi42_exec(upi42); - fgets(buf, 256, stdin); + case 1025 ... 2048: + upi42_log("emulating 8042"); + type = UPI42_8042; + break; + + case 2049 ... 4096: + upi42_log("emulating 80C42"); + type = UPI42_80C42; + break; + + default: + upi42_log("unknown!\n"); + return 3; } + upi42_log(".\n"); + + /* Initialize emulator. */ + upi42_t *upi42 = (upi42_t *) upi42_init(type, rom); + + /* Start execution. */ + char cmd, cmd_buf[256]; + int val, go_until = -1; + while (1) { + /* Output status. */ + upi42_log("PC=%04X I=%02X(%02X) A=%02X", upi42->pc, upi42->rom[upi42->pc], upi42->rom[upi42->pc + 1], upi42->a); + for (val = 0; val < 8; val++) + upi42_log(" R%d=%02X", val, UPI42_REG(upi42, val, )); + upi42_log(" T=%02X PSW=%02X TF=%d I=%d TCNTI=%d", upi42->t, upi42->psw, upi42->tf, upi42->i, upi42->tcnti); + if (type & UPI42_TYPE_UPI) { + upi42_log(" STS=%02X", upi42->sts); + for (val = 0; val < 8; val++) { + if (upi42->sts & (1 << val)) + upi42_log(" [%s]", flags_8042[val]); + else + upi42_log(" %s ", flags_8042[val]); + } + } + upi42_log("\n"); + + /* Break for command only if stepping. */ + if ((go_until < 0) || (upi42->pc == go_until)) { +retry: + go_until = -1; + upi42_log("> "); + + /* Read command. */ + cmd = '\0'; + scanf("%c", &cmd); + + /* Execute command. */ + switch (cmd) { + case 'c': /* write command */ + if (scanf("%X%*c", &val, &cmd_buf)) + upi42_cmd_write(0, val, upi42); + goto retry; + + case 'd': /* write data */ + if (scanf("%X%*c", &val, &cmd_buf)) + upi42_dbb_write(0, val, upi42); + goto retry; + + case 'g': /* go until */ + if (!scanf("%X%*c", &go_until, &cmd_buf)) + go_until = -1; + break; + + case 'r': /* read data */ + upi42_dbb_read(0, upi42); /* return value will be logged */ + goto skip_and_retry; + + case 'q': /* exit */ + return 0; + + case '\r': /* step */ + case '\n': + case '\0': + break; + + default: + upi42_log("Monitor commands:\n"); + upi42_log("- Return (no command) - Step execution\n"); + upi42_log("- q (or Ctrl+C) - Exit\n"); + upi42_log("- gXXXX - Execute until PC is hex value XXXX\n"); + upi42_log("- dXX - Write hex value XX to data port\n"); + upi42_log("- cXX - Write hex value XX to command port\n"); + upi42_log("- r - Read from data port and reset OBF\n"); +skip_and_retry: + scanf("%*c", &cmd_buf); + goto retry; + } + } + + /* Execute a cycle. */ + upi42_exec(upi42); + } + + return 0; } +#endif From ebca2da32a3ea34f8d19b5652761d72f76a87fe9 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Wed, 13 Jul 2022 19:10:56 -0300 Subject: [PATCH 013/386] Fix 8042 emulator under MSYS2 --- src/upi42.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/src/upi42.c b/src/upi42.c index 216f87c73..77d580004 100644 --- a/src/upi42.c +++ b/src/upi42.c @@ -20,10 +20,16 @@ #include #ifdef UPI42_STANDALONE -# define fatal(...) \ - upi42_log(__VA_ARGS__); \ - abort(); -# define upi42_log printf +# define fatal(...) \ + { \ + upi42_log(__VA_ARGS__); \ + abort(); \ + } +# define upi42_log(...) \ + { \ + printf(__VA_ARGS__); \ + fflush(stdout); \ + } #endif #define UPI42_REG(upi42, r, op) ((upi42->psw & 0x10) ? (upi42->ram[24 + ((r) &7)] op) : (upi42->ram[(r) &7] op)) @@ -1053,10 +1059,11 @@ main(int argc, char **argv) if (type & UPI42_TYPE_UPI) { upi42_log(" STS=%02X", upi42->sts); for (val = 0; val < 8; val++) { - if (upi42->sts & (1 << val)) + if (upi42->sts & (1 << val)) { upi42_log(" [%s]", flags_8042[val]); - else + } else { upi42_log(" %s ", flags_8042[val]); + } } } upi42_log("\n"); From 6b63feb6ac7d4c5f721bbdcefb8053f8e2ebbf70 Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 14 Jul 2022 02:31:59 +0200 Subject: [PATCH 014/386] Preliminary code for UPI42 integration into 86Box. --- src/upi42.c | 332 +++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 328 insertions(+), 4 deletions(-) diff --git a/src/upi42.c b/src/upi42.c index 77d580004..8b8e4b72e 100644 --- a/src/upi42.c +++ b/src/upi42.c @@ -30,6 +30,33 @@ printf(__VA_ARGS__); \ fflush(stdout); \ } +#else +#include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include <86box/device.h> +#include <86box/io.h> +#include <86box/timer.h> + + +#ifdef ENABLE_UPI42_LOG +int upi42_do_log = ENABLE_UPI42_LOG; + + +void +upi42_log(const char *fmt, ...) +{ + va_list ap; + + if (upi42_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +#define upi42_log(fmt, ...) +#endif #endif #define UPI42_REG(upi42, r, op) ((upi42->psw & 0x10) ? (upi42->ram[24 + ((r) &7)] op) : (upi42->ram[(r) &7] op)) @@ -68,6 +95,11 @@ typedef struct _upi42_ { flags : 1, dbf : 1, suspend : 1; /* UPI-42 flags */ int cycs; /* cycle counter */ + +#ifndef UPI42_STANDALONE + uint8_t ram_index; + uint16_t rom_index; +#endif } upi42_t; static inline void @@ -970,11 +1002,9 @@ upi42_reset(upi42_t *upi42) upi42->suspend = 0; /* 80C42 suspend flag */ } -void * -upi42_init(uint32_t type, uint8_t *rom) +void +upi42_do_init(upi32_t type, uint8_t *rom) { - /* Allocate state structure. */ - upi42_t *upi42 = (upi42_t *) malloc(sizeof(upi42_t)); memset(upi42, 0, sizeof(upi42_t)); upi42->rom = rom; @@ -994,6 +1024,18 @@ upi42_init(uint32_t type, uint8_t *rom) upi42->ops[0xe2] = NULL; /* SUSPEND */ } + memset(upi42_t->ports_in, 0xff, 0x08); + upi42_t->t0 = 1; + upi42_t->t1 = 1; +} + +void * +upi42_init(uint32_t type, uint8_t *rom) +{ + /* Allocate state structure. */ + upi42_t *upi42 = (upi42_t *) malloc(sizeof(upi42_t)); + upi42_do_init(type, rom); + return upi42; } @@ -1127,4 +1169,286 @@ skip_and_retry: return 0; } +#else +static void +upi42_write(uint16_t port, uint8_t val, void *priv) +{ + upi42_t *upi42 = (upi42_t *) priv; + uint32_t temp_type, uint8_t *temp_rom; + int i; + + switch (port) { + /* Write to data port. */ + case 0x0060: + case 0x0160: + upi42_dbb_write(0, val, upi42); + break; + + /* RAM Index. */ + case 0x0162: + upi42->ram_index = val & upi42->rammask; + break; + + /* RAM. */ + case 0x0163: + upi42->ram[upi42->ram_index & upi42->rammask] = val; + break; + + /* Write to command port. */ + case 0x0064: + case 0x0164: + upi42_cmd_write(0, val, upi42); + break; + + /* Input ports. */ + case 0x0180 ... 0x0187: + upi42->ports_in[addr & 0x0007] = val; + break; + + /* Output ports. */ + case 0x0188 ... 0x018f: + upi42->ports_out[addr & 0x0007] = val; + break; + + /* 4 = T0, 5 = T1. */ + case 0x0194: + upi42->t0 = (val >> 4) & 0x01; + upi42->t1 = (val >> 5) & 0x01; + break; + + /* Program counter. */ + case 0x0196: + upi42->pc = (upi42->pc & 0xff00) | val; + break; + case 0x0197: + upi42->pc = (upi42->pc & 0x00ff) | (val << 8); + break; + + /* Input data buffer. */ + case 0x019a: + upi42->dbb_in = val; + break; + + /* Output data buffer. */ + case 0x019b: + upi42->dbb_out = val; + break; + + /* ROM Index. */ + case 0x01a0: + upi42->rom_index = (upi42->rom_index & 0xff00) | val; + break; + case 0x01a1: + upi42->rom_index = (upi42->rom_index & 0x00ff) | (val << 8); + break; + + /* Hard reset. */ + case 0x01a2: + temp_type = upi42->type; + temp_rom = upi42->rom; + upi42_do_init(temp_type, temp_rom); + break; + + /* Soft reset. */ + case 0x01a3: + upi42_reset(upi42); + break; + + /* ROM. */ + case 0x01a4: + upi42->rom[upi42->rom_index & upi42->rommask] = val; + break; + case 0x01a5: + upi42->rom[(upi42->rom_index + 1) & upi42->rommask] = val; + break; + case 0x01a6: + upi42->rom[(upi42->rom_index + 2) & upi42->rommask] = val; + break; + case 0x01a7: + upi42->rom[(upi42->rom_index + 3) & upi42->rommask] = val; + break; + + /* Pause. */ + case 0x01a8: + break; + + /* Resume. */ + case 0x01a9: + break; + + /* Bus master ROM: 0 = direction (0 = to memory, 1 = from memory). */ + case 0x01aa: + if (val & 0x01) { + for (i = 0; i <= upi42->rommask; i += 4) + *(uint32_t *) &(upi42->rom[i]) = mem_readl_phys(upi42->ram_addr + i); + } else { + for (i = 0; i <= upi42->rommask; i += 4) + mem_writel_phys(upi42->ram_addr + i, *(uint32_t *) &(upi42->rom[i])); + } + upi42->bm_stat = (val & 0x01) | 0x02; + break; + } +} + + +static uint8_t +upi42_read(uint16_t port, void *priv) +{ + upi42_t *upi42 = (upi42_t *) priv; + uint8_t ret = 0xff; + + switch (port) { + /* Type. */ + case 0x015c: + ret = upi42->type & 0xff; + break; + case 0x015d: + ret = upi42->type >> 8; + break; + case 0x015e: + ret = upi42->type >> 16; + break; + case 0x015f: + ret = upi42->type >> 24; + break; + + /* Read from data port and reset OBF. */ + case 0x0060: + case 0x0160: + ret = upi42->dbb_out; + upi42->sts &= ~0x01; /* clear OBF */ + break; + + /* RAM Mask. */ + case 0x0161: + ret = upi42->rammask; + break; + + /* RAM Index. */ + case 0x0162: + ret = upi42->ram_index; + break; + + /* RAM. */ + case 0x0163: + ret = upi42->ram[upi42->ram_index & upi42->rammask]; + break; + + /* Read status. */ + case 0x0064: + case 0x0164: + ret = upi42->sts; + break; + + /* Input ports. */ + case 0x0180 ... 0x0187: + ret = upi42->ports_in[addr & 0x0007]; + break; + + /* Output ports. */ + case 0x0188 ... 0x018f: + ret = upi42->ports_out[addr & 0x0007]; + break; + + /* Accumulator. */ + case 0x0190: + ret = upi42->a; + break; + + /* Timer counter. */ + case 0x0191: + ret = upi42->t; + break; + + /* Program status word. */ + case 0x0192: + ret = upi42->psw; + break; + + /* 0-4 = Prescaler, 5 = TF, 6 = Skip Timer Inc, 7 = Run Timer. */ + case 0x0193: + ret = (upi42->prescaler & 0x1f) || ((upi42->tf & 0x01) << 5) || ((upi42->skip_timer_inc & 0x01) << 6) || ((upi42->run_timer & 0x01) << 7); + break; + + /* 0 = I, 1 = I Raise, 2 = TCNTI Raise, 3 = IRQ Mask, 4 = T0, 5 = T1, 6 = Flags, 7 = DBF. */ + case 0x0194: + ret = (upi42->i & 0x01) || ((upi42->i_raise & 0x01) << 1) || ((upi42->tcnti_raise & 0x01) << 2) || ((upi42->irq_mask & 0x01) << 3) || + ((upi42->t0 & 0x01) << 4) || ((upi42->t1 & 0x01) << 5) || ((upi42->flags & 0x01) << 6) || ((upi42->dbf & 0x01) << 7); + break; + + /* 0 = Suspend. */ + case 0x0195: + ret = (upi42->suspend & 0x01); + break; + + /* Program counter. */ + case 0x0196: + ret = upi42->pc & 0xff; + break; + case 0x0197: + ret = upi42->pc >> 8; + break; + + /* ROM Mask. */ + case 0x0198: + ret = upi42->rommask & 0xff; + break; + case 0x0199: + ret = upi42->rommask >> 8; + break; + + /* Input data buffer. */ + case 0x019a: + ret = upi42->dbb_in; + break; + + /* Output data buffer. */ + case 0x019b: + ret = upi42->dbb_out; + break; + + /* Cycle counter. */ + case 0x019c: + ret = upi42->cycs & 0xff; + break; + case 0x019d: + ret = upi42->cycs >> 8; + break; + case 0x019e: + ret = upi42->cycs >> 16; + break; + case 0x019f: + ret = upi42->cycs >> 24; + break; + + /* ROM Index. */ + case 0x01a0: + ret = upi42->rom_index & 0xff; + break; + case 0x01a1: + ret = upi42->rom_index >> 8; + break; + + /* ROM. */ + case 0x01a4: + ret = upi42->rom[upi42->rom_index & upi42->rommask]; + break; + case 0x01a5: + ret = upi42->rom[(upi42->rom_index + 1) & upi42->rommask]; + break; + case 0x01a6: + ret = upi42->rom[(upi42->rom_index + 2) & upi42->rommask]; + break; + case 0x01a7: + ret = upi42->rom[(upi42->rom_index + 3) & upi42->rommask]; + break; + + /* Bus master status: 0 = direction, 1 = finished. */ + case 0x01ab: + ret = upi42->bm_stat; + break; + } + + return ret; +} #endif From a10e010a93dfb704addc9adb6d2caaeba9854237 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Thu, 14 Jul 2022 22:16:53 -0400 Subject: [PATCH 015/386] Don't shut down when second display is closed --- src/qt/qt_rendererstack.cpp | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/qt/qt_rendererstack.cpp b/src/qt/qt_rendererstack.cpp index ae451db6c..795c31fe7 100644 --- a/src/qt/qt_rendererstack.cpp +++ b/src/qt/qt_rendererstack.cpp @@ -447,7 +447,11 @@ RendererStack::blitCommon(int x, int y, int w, int h) void RendererStack::closeEvent(QCloseEvent* event) { - if (cpu_thread_run == 0 || is_quit == 1) { event->accept(); return; } + if (cpu_thread_run == 0 || is_quit == 0) { + event->accept(); + show_second_monitors = 0; // TODO: This isn't actually the right fix, so fix this properly. + return; + } event->ignore(); main_window->close(); } From b80fda4280318ac3d54524cb7998b190db84a567 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Fri, 15 Jul 2022 12:34:41 +0200 Subject: [PATCH 016/386] The IBM 386/486 cpu's are based on modified Intel 386 designs and, as such, should behave like the them on the x86 flag ops. --- src/cpu/x86_ops_flag.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/cpu/x86_ops_flag.h b/src/cpu/x86_ops_flag.h index 24c97339e..ce0cb4cd6 100644 --- a/src/cpu/x86_ops_flag.h +++ b/src/cpu/x86_ops_flag.h @@ -266,11 +266,11 @@ static int opPOPFD(uint32_t fetchdat) else if (IOPLp) cpu_state.flags = (cpu_state.flags & 0x3000) | (templ & 0x4fd5) | 2; else cpu_state.flags = (cpu_state.flags & 0x3200) | (templ & 0x4dd5) | 2; - templ &= (is486 || isibm486) ? 0x3c0000 : 0; + templ &= (is486) ? 0x3c0000 : 0; templ |= ((cpu_state.eflags&3) << 16); if (cpu_CR4_mask & CR4_VME) cpu_state.eflags = (templ >> 16) & 0x3f; else if (CPUID) cpu_state.eflags = (templ >> 16) & 0x27; - else if (is486 || isibm486) cpu_state.eflags = (templ >> 16) & 7; + else if (is486) cpu_state.eflags = (templ >> 16) & 7; else cpu_state.eflags = (templ >> 16) & 3; flags_extract(); From 5f8d5dbe9039a61ddbba7a798a9c942aa0fe5a86 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20Hrdli=C4=8Dka?= Date: Fri, 15 Jul 2022 16:01:24 +0200 Subject: [PATCH 017/386] Discord: Target the latest SDK, fixes #2455 --- src/discord.c | 127 +++++------ src/include/discord_game_sdk.h | 399 ++++++++++++++++++++------------- 2 files changed, 300 insertions(+), 226 deletions(-) diff --git a/src/discord.c b/src/discord.c index 27b8c6fdf..d1966a93d 100644 --- a/src/discord.c +++ b/src/discord.c @@ -15,69 +15,68 @@ * Copyright 2019 David Hrdlička. */ #include -#include #include +#include #include #include #include #define HAVE_STDARG_H -#include <86box/86box.h> #include "cpu/cpu.h" +#include <86box/86box.h> +#include <86box/discord.h> #include <86box/machine.h> #include <86box/plat.h> #include <86box/plat_dynld.h> -#include <86box/discord.h> #include #ifdef _WIN32 -#define PATH_DISCORD_DLL "discord_game_sdk.dll" +# define PATH_DISCORD_DLL "discord_game_sdk.dll" #elif defined __APPLE__ -#define PATH_DISCORD_DLL "discord_game_sdk.dylib" +# define PATH_DISCORD_DLL "discord_game_sdk.dylib" #else -#define PATH_DISCORD_DLL "discord_game_sdk.so" +# define PATH_DISCORD_DLL "discord_game_sdk.so" #endif -int discord_loaded = 0; +int discord_loaded = 0; -static void *discord_handle = NULL; -static struct IDiscordCore *discord_core = NULL; -static struct IDiscordActivityManager *discord_activities = NULL; +static void *discord_handle = NULL; +static struct IDiscordCore *discord_core = NULL; +static struct IDiscordActivityManager *discord_activities = NULL; -static enum EDiscordResult (*discord_create)(DiscordVersion version, struct DiscordCreateParams* params, struct IDiscordCore** result); +static enum EDiscordResult(DISCORD_API *discord_create)(DiscordVersion version, struct DiscordCreateParams *params, struct IDiscordCore **result); static dllimp_t discord_imports[] = { - { "DiscordCreate", &discord_create }, - { NULL, NULL } + {"DiscordCreate", &discord_create}, + { NULL, NULL } }; #ifdef ENABLE_DISCORD_LOG int discord_do_log = 1; - static void discord_log(const char *fmt, ...) { va_list ap; if (discord_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define discord_log(fmt, ...) +# define discord_log(fmt, ...) #endif void discord_update_activity(int paused) { struct DiscordActivity activity; - char cpufamily[1024]; - char *paren; + char cpufamily[1024]; + char *paren; - if(discord_activities == NULL) - return; + if (discord_activities == NULL) + return; discord_log("discord: discord_update_activity(paused=%d)\n", paused); @@ -86,53 +85,47 @@ discord_update_activity(int paused) strncpy(cpufamily, cpu_f->name, sizeof(cpufamily) - 1); paren = strchr(cpufamily, '('); if (paren) - *(paren - 1) = '\0'; + *(paren - 1) = '\0'; #pragma GCC diagnostic push #if defined(__GNUC__) -#pragma GCC diagnostic ignored "-Wformat-truncation" +# pragma GCC diagnostic ignored "-Wformat-truncation" #endif - if (strlen(vm_name) < 100) - { - snprintf(activity.details, sizeof(activity.details), "Running \"%s\"", vm_name); - snprintf(activity.state, sizeof(activity.state), "%s (%s/%s)", strchr(machine_getname(), ']') + 2, cpufamily, cpu_s->name); - } - else - { - strncpy(activity.details, strchr(machine_getname(), ']') + 2, sizeof(activity.details) - 1); - snprintf(activity.state, sizeof(activity.state), "%s/%s", cpufamily, cpu_s->name); + if (strlen(vm_name) < 100) { + snprintf(activity.details, sizeof(activity.details), "Running \"%s\"", vm_name); + snprintf(activity.state, sizeof(activity.state), "%s (%s/%s)", strchr(machine_getname(), ']') + 2, cpufamily, cpu_s->name); + } else { + strncpy(activity.details, strchr(machine_getname(), ']') + 2, sizeof(activity.details) - 1); + snprintf(activity.state, sizeof(activity.state), "%s/%s", cpufamily, cpu_s->name); } #pragma GCC diagnostic pop activity.timestamps.start = time(NULL); -/* Icon choosing for Discord based on 86Box.rc */ + /* Icon choosing for Discord based on 86Box.rc */ #ifdef RELEASE_BUILD -/* Icon by OBattler and laciba96 (green for release builds)*/ + /* Icon by OBattler and laciba96 (green for release builds)*/ strcpy(activity.assets.large_image, "86box-green"); #elif BETA_BUILD -/* Icon by OBattler and laciba96 (yellow for beta builds done by Jenkins)*/ + /* Icon by OBattler and laciba96 (yellow for beta builds done by Jenkins)*/ strcpy(activity.assets.large_image, "86box-yellow"); #elif ALPHA_BUILD -/* Icon by OBattler and laciba96 (red for alpha builds done by Jenkins)*/ + /* Icon by OBattler and laciba96 (red for alpha builds done by Jenkins)*/ strcpy(activity.assets.large_image, "86box-red"); #else -/* Icon by OBattler and laciba96 (gray for builds of branches and from the git master)*/ + /* Icon by OBattler and laciba96 (gray for builds of branches and from the git master)*/ strcpy(activity.assets.large_image, "86box"); #endif -/* End of icon choosing */ + /* End of icon choosing */ - if (paused) - { - strcpy(activity.assets.small_image, "status-paused"); - strcpy(activity.assets.small_text, "Paused"); - } - else - { - strcpy(activity.assets.small_image, "status-running"); - strcpy(activity.assets.small_text, "Running"); + if (paused) { + strcpy(activity.assets.small_image, "status-paused"); + strcpy(activity.assets.small_text, "Paused"); + } else { + strcpy(activity.assets.small_image, "status-running"); + strcpy(activity.assets.small_text, "Running"); } discord_activities->update_activity(discord_activities, &activity, NULL, NULL); @@ -142,42 +135,40 @@ int discord_load() { if (discord_handle != NULL) - return(1); + return (1); // Try to load the DLL discord_handle = dynld_module(PATH_DISCORD_DLL, discord_imports); - if (discord_handle == NULL) - { - discord_log("discord: couldn't load " PATH_DISCORD_DLL "\n"); - discord_close(); + if (discord_handle == NULL) { + discord_log("discord: couldn't load " PATH_DISCORD_DLL "\n"); + discord_close(); - return(0); + return (0); } discord_loaded = 1; - return(1); + return (1); } void discord_init() { - enum EDiscordResult result; + enum EDiscordResult result; struct DiscordCreateParams params; - if(discord_handle == NULL) - return; + if (discord_handle == NULL) + return; DiscordCreateParamsSetDefault(¶ms); params.client_id = 906956844956782613; - params.flags = DiscordCreateFlags_NoRequireDiscord; + params.flags = DiscordCreateFlags_NoRequireDiscord; result = discord_create(DISCORD_VERSION, ¶ms, &discord_core); - if (result != DiscordResult_Ok) - { - discord_log("discord: DiscordCreate returned %d\n", result); - discord_close(); - return; + if (result != DiscordResult_Ok) { + discord_log("discord: DiscordCreate returned %d\n", result); + discord_close(); + return; } discord_activities = discord_core->get_activity_manager(discord_core); @@ -189,17 +180,17 @@ void discord_close() { if (discord_core != NULL) - discord_core->destroy(discord_core); + discord_core->destroy(discord_core); - discord_core = NULL; + discord_core = NULL; discord_activities = NULL; } void discord_run_callbacks() { - if(discord_core == NULL) - return; + if (discord_core == NULL) + return; discord_core->run_callbacks(discord_core); } diff --git a/src/include/discord_game_sdk.h b/src/include/discord_game_sdk.h index e3779a7cc..62ea8418e 100644 --- a/src/include/discord_game_sdk.h +++ b/src/include/discord_game_sdk.h @@ -8,6 +8,23 @@ #ifndef _DISCORD_GAME_SDK_H_ #define _DISCORD_GAME_SDK_H_ +#ifdef _WIN32 +#include +#include +#endif + +#ifdef _WIN32 +# ifdef _WIN64 +# define DISCORD_API +# else +# define DISCORD_API __stdcall +# endif +#else +# define DISCORD_API +#endif + +#define DISCORD_CALLBACK DISCORD_API + #ifdef __cplusplus extern "C" { #endif @@ -18,7 +35,7 @@ extern "C" { #include #endif -#define DISCORD_VERSION 2 +#define DISCORD_VERSION 3 #define DISCORD_APPLICATION_MANAGER_VERSION 1 #define DISCORD_USER_MANAGER_VERSION 1 #define DISCORD_IMAGE_MANAGER_VERSION 1 @@ -26,7 +43,7 @@ extern "C" { #define DISCORD_RELATIONSHIP_MANAGER_VERSION 1 #define DISCORD_LOBBY_MANAGER_VERSION 1 #define DISCORD_NETWORK_MANAGER_VERSION 1 -#define DISCORD_OVERLAY_MANAGER_VERSION 1 +#define DISCORD_OVERLAY_MANAGER_VERSION 2 #define DISCORD_STORAGE_MANAGER_VERSION 1 #define DISCORD_STORE_MANAGER_VERSION 1 #define DISCORD_VOICE_MANAGER_VERSION 1 @@ -77,6 +94,7 @@ enum EDiscordResult { DiscordResult_InvalidGiftCode = 41, DiscordResult_PurchaseError = 42, DiscordResult_TransactionAborted = 43, + DiscordResult_DrawingInitFailed = 44, }; enum EDiscordCreateFlags { @@ -109,6 +127,11 @@ enum EDiscordImageType { DiscordImageType_User, }; +enum EDiscordActivityPartyPrivacy { + DiscordActivityPartyPrivacy_Private = 0, + DiscordActivityPartyPrivacy_Public = 1, +}; + enum EDiscordActivityType { DiscordActivityType_Playing, DiscordActivityType_Streaming, @@ -121,6 +144,12 @@ enum EDiscordActivityActionType { DiscordActivityActionType_Spectate, }; +enum EDiscordActivitySupportedPlatformFlags { + DiscordActivitySupportedPlatformFlags_Desktop = 1, + DiscordActivitySupportedPlatformFlags_Android = 2, + DiscordActivitySupportedPlatformFlags_iOS = 4, +}; + enum EDiscordActivityJoinRequestReply { DiscordActivityJoinRequestReply_No, DiscordActivityJoinRequestReply_Yes, @@ -169,6 +198,18 @@ enum EDiscordLobbySearchDistance { DiscordLobbySearchDistance_Global, }; +enum EDiscordKeyVariant { + DiscordKeyVariant_Normal, + DiscordKeyVariant_Right, + DiscordKeyVariant_Left, +}; + +enum EDiscordMouseButton { + DiscordMouseButton_Left, + DiscordMouseButton_Middle, + DiscordMouseButton_Right, +}; + enum EDiscordEntitlementType { DiscordEntitlementType_Purchase = 1, DiscordEntitlementType_PremiumSubscription, @@ -204,6 +245,18 @@ typedef char DiscordMetadataKey[256]; typedef char DiscordMetadataValue[4096]; typedef uint64_t DiscordNetworkPeerId; typedef uint8_t DiscordNetworkChannelId; +#ifdef __APPLE__ +typedef void IDXGISwapChain; +#endif +#ifdef __linux__ +typedef void IDXGISwapChain; +#endif +#ifdef __APPLE__ +typedef void MSG; +#endif +#ifdef __linux__ +typedef void MSG; +#endif typedef char DiscordPath[4096]; typedef char DiscordDateTime[64]; @@ -252,6 +305,7 @@ struct DiscordPartySize { struct DiscordActivityParty { char id[128]; struct DiscordPartySize size; + enum EDiscordActivityPartyPrivacy privacy; }; struct DiscordActivitySecrets { @@ -271,6 +325,7 @@ struct DiscordActivity { struct DiscordActivityParty party; struct DiscordActivitySecrets secrets; bool instance; + uint32_t supported_platforms; }; struct DiscordPresence { @@ -293,6 +348,21 @@ struct DiscordLobby { bool locked; }; +struct DiscordImeUnderline { + int32_t from; + int32_t to; + uint32_t color; + uint32_t background_color; + bool thick; +}; + +struct DiscordRect { + int32_t left; + int32_t top; + int32_t right; + int32_t bottom; +}; + struct DiscordFileStat { char filename[260]; uint64_t size; @@ -330,265 +400,278 @@ struct DiscordUserAchievement { }; struct IDiscordLobbyTransaction { - enum EDiscordResult (*set_type)(struct IDiscordLobbyTransaction* lobby_transaction, enum EDiscordLobbyType type); - enum EDiscordResult (*set_owner)(struct IDiscordLobbyTransaction* lobby_transaction, DiscordUserId owner_id); - enum EDiscordResult (*set_capacity)(struct IDiscordLobbyTransaction* lobby_transaction, uint32_t capacity); - enum EDiscordResult (*set_metadata)(struct IDiscordLobbyTransaction* lobby_transaction, DiscordMetadataKey key, DiscordMetadataValue value); - enum EDiscordResult (*delete_metadata)(struct IDiscordLobbyTransaction* lobby_transaction, DiscordMetadataKey key); - enum EDiscordResult (*set_locked)(struct IDiscordLobbyTransaction* lobby_transaction, bool locked); + enum EDiscordResult (DISCORD_API *set_type)(struct IDiscordLobbyTransaction* lobby_transaction, enum EDiscordLobbyType type); + enum EDiscordResult (DISCORD_API *set_owner)(struct IDiscordLobbyTransaction* lobby_transaction, DiscordUserId owner_id); + enum EDiscordResult (DISCORD_API *set_capacity)(struct IDiscordLobbyTransaction* lobby_transaction, uint32_t capacity); + enum EDiscordResult (DISCORD_API *set_metadata)(struct IDiscordLobbyTransaction* lobby_transaction, DiscordMetadataKey key, DiscordMetadataValue value); + enum EDiscordResult (DISCORD_API *delete_metadata)(struct IDiscordLobbyTransaction* lobby_transaction, DiscordMetadataKey key); + enum EDiscordResult (DISCORD_API *set_locked)(struct IDiscordLobbyTransaction* lobby_transaction, bool locked); }; struct IDiscordLobbyMemberTransaction { - enum EDiscordResult (*set_metadata)(struct IDiscordLobbyMemberTransaction* lobby_member_transaction, DiscordMetadataKey key, DiscordMetadataValue value); - enum EDiscordResult (*delete_metadata)(struct IDiscordLobbyMemberTransaction* lobby_member_transaction, DiscordMetadataKey key); + enum EDiscordResult (DISCORD_API *set_metadata)(struct IDiscordLobbyMemberTransaction* lobby_member_transaction, DiscordMetadataKey key, DiscordMetadataValue value); + enum EDiscordResult (DISCORD_API *delete_metadata)(struct IDiscordLobbyMemberTransaction* lobby_member_transaction, DiscordMetadataKey key); }; struct IDiscordLobbySearchQuery { - enum EDiscordResult (*filter)(struct IDiscordLobbySearchQuery* lobby_search_query, DiscordMetadataKey key, enum EDiscordLobbySearchComparison comparison, enum EDiscordLobbySearchCast cast, DiscordMetadataValue value); - enum EDiscordResult (*sort)(struct IDiscordLobbySearchQuery* lobby_search_query, DiscordMetadataKey key, enum EDiscordLobbySearchCast cast, DiscordMetadataValue value); - enum EDiscordResult (*limit)(struct IDiscordLobbySearchQuery* lobby_search_query, uint32_t limit); - enum EDiscordResult (*distance)(struct IDiscordLobbySearchQuery* lobby_search_query, enum EDiscordLobbySearchDistance distance); + enum EDiscordResult (DISCORD_API *filter)(struct IDiscordLobbySearchQuery* lobby_search_query, DiscordMetadataKey key, enum EDiscordLobbySearchComparison comparison, enum EDiscordLobbySearchCast cast, DiscordMetadataValue value); + enum EDiscordResult (DISCORD_API *sort)(struct IDiscordLobbySearchQuery* lobby_search_query, DiscordMetadataKey key, enum EDiscordLobbySearchCast cast, DiscordMetadataValue value); + enum EDiscordResult (DISCORD_API *limit)(struct IDiscordLobbySearchQuery* lobby_search_query, uint32_t limit); + enum EDiscordResult (DISCORD_API *distance)(struct IDiscordLobbySearchQuery* lobby_search_query, enum EDiscordLobbySearchDistance distance); }; typedef void* IDiscordApplicationEvents; struct IDiscordApplicationManager { - void (*validate_or_exit)(struct IDiscordApplicationManager* manager, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*get_current_locale)(struct IDiscordApplicationManager* manager, DiscordLocale* locale); - void (*get_current_branch)(struct IDiscordApplicationManager* manager, DiscordBranch* branch); - void (*get_oauth2_token)(struct IDiscordApplicationManager* manager, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result, struct DiscordOAuth2Token* oauth2_token)); - void (*get_ticket)(struct IDiscordApplicationManager* manager, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result, const char* data)); + void (DISCORD_API *validate_or_exit)(struct IDiscordApplicationManager* manager, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *get_current_locale)(struct IDiscordApplicationManager* manager, DiscordLocale* locale); + void (DISCORD_API *get_current_branch)(struct IDiscordApplicationManager* manager, DiscordBranch* branch); + void (DISCORD_API *get_oauth2_token)(struct IDiscordApplicationManager* manager, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result, struct DiscordOAuth2Token* oauth2_token)); + void (DISCORD_API *get_ticket)(struct IDiscordApplicationManager* manager, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result, const char* data)); }; struct IDiscordUserEvents { - void (*on_current_user_update)(void* event_data); + void (DISCORD_API *on_current_user_update)(void* event_data); }; struct IDiscordUserManager { - enum EDiscordResult (*get_current_user)(struct IDiscordUserManager* manager, struct DiscordUser* current_user); - void (*get_user)(struct IDiscordUserManager* manager, DiscordUserId user_id, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result, struct DiscordUser* user)); - enum EDiscordResult (*get_current_user_premium_type)(struct IDiscordUserManager* manager, enum EDiscordPremiumType* premium_type); - enum EDiscordResult (*current_user_has_flag)(struct IDiscordUserManager* manager, enum EDiscordUserFlag flag, bool* has_flag); + enum EDiscordResult (DISCORD_API *get_current_user)(struct IDiscordUserManager* manager, struct DiscordUser* current_user); + void (DISCORD_API *get_user)(struct IDiscordUserManager* manager, DiscordUserId user_id, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result, struct DiscordUser* user)); + enum EDiscordResult (DISCORD_API *get_current_user_premium_type)(struct IDiscordUserManager* manager, enum EDiscordPremiumType* premium_type); + enum EDiscordResult (DISCORD_API *current_user_has_flag)(struct IDiscordUserManager* manager, enum EDiscordUserFlag flag, bool* has_flag); }; typedef void* IDiscordImageEvents; struct IDiscordImageManager { - void (*fetch)(struct IDiscordImageManager* manager, struct DiscordImageHandle handle, bool refresh, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result, struct DiscordImageHandle handle_result)); - enum EDiscordResult (*get_dimensions)(struct IDiscordImageManager* manager, struct DiscordImageHandle handle, struct DiscordImageDimensions* dimensions); - enum EDiscordResult (*get_data)(struct IDiscordImageManager* manager, struct DiscordImageHandle handle, uint8_t* data, uint32_t data_length); + void (DISCORD_API *fetch)(struct IDiscordImageManager* manager, struct DiscordImageHandle handle, bool refresh, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result, struct DiscordImageHandle handle_result)); + enum EDiscordResult (DISCORD_API *get_dimensions)(struct IDiscordImageManager* manager, struct DiscordImageHandle handle, struct DiscordImageDimensions* dimensions); + enum EDiscordResult (DISCORD_API *get_data)(struct IDiscordImageManager* manager, struct DiscordImageHandle handle, uint8_t* data, uint32_t data_length); }; struct IDiscordActivityEvents { - void (*on_activity_join)(void* event_data, const char* secret); - void (*on_activity_spectate)(void* event_data, const char* secret); - void (*on_activity_join_request)(void* event_data, struct DiscordUser* user); - void (*on_activity_invite)(void* event_data, enum EDiscordActivityActionType type, struct DiscordUser* user, struct DiscordActivity* activity); + void (DISCORD_API *on_activity_join)(void* event_data, const char* secret); + void (DISCORD_API *on_activity_spectate)(void* event_data, const char* secret); + void (DISCORD_API *on_activity_join_request)(void* event_data, struct DiscordUser* user); + void (DISCORD_API *on_activity_invite)(void* event_data, enum EDiscordActivityActionType type, struct DiscordUser* user, struct DiscordActivity* activity); }; struct IDiscordActivityManager { - enum EDiscordResult (*register_command)(struct IDiscordActivityManager* manager, const char* command); - enum EDiscordResult (*register_steam)(struct IDiscordActivityManager* manager, uint32_t steam_id); - void (*update_activity)(struct IDiscordActivityManager* manager, struct DiscordActivity* activity, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*clear_activity)(struct IDiscordActivityManager* manager, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*send_request_reply)(struct IDiscordActivityManager* manager, DiscordUserId user_id, enum EDiscordActivityJoinRequestReply reply, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*send_invite)(struct IDiscordActivityManager* manager, DiscordUserId user_id, enum EDiscordActivityActionType type, const char* content, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*accept_invite)(struct IDiscordActivityManager* manager, DiscordUserId user_id, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); + enum EDiscordResult (DISCORD_API *register_command)(struct IDiscordActivityManager* manager, const char* command); + enum EDiscordResult (DISCORD_API *register_steam)(struct IDiscordActivityManager* manager, uint32_t steam_id); + void (DISCORD_API *update_activity)(struct IDiscordActivityManager* manager, struct DiscordActivity* activity, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *clear_activity)(struct IDiscordActivityManager* manager, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *send_request_reply)(struct IDiscordActivityManager* manager, DiscordUserId user_id, enum EDiscordActivityJoinRequestReply reply, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *send_invite)(struct IDiscordActivityManager* manager, DiscordUserId user_id, enum EDiscordActivityActionType type, const char* content, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *accept_invite)(struct IDiscordActivityManager* manager, DiscordUserId user_id, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); }; struct IDiscordRelationshipEvents { - void (*on_refresh)(void* event_data); - void (*on_relationship_update)(void* event_data, struct DiscordRelationship* relationship); + void (DISCORD_API *on_refresh)(void* event_data); + void (DISCORD_API *on_relationship_update)(void* event_data, struct DiscordRelationship* relationship); }; struct IDiscordRelationshipManager { - void (*filter)(struct IDiscordRelationshipManager* manager, void* filter_data, bool (*filter)(void* filter_data, struct DiscordRelationship* relationship)); - enum EDiscordResult (*count)(struct IDiscordRelationshipManager* manager, int32_t* count); - enum EDiscordResult (*get)(struct IDiscordRelationshipManager* manager, DiscordUserId user_id, struct DiscordRelationship* relationship); - enum EDiscordResult (*get_at)(struct IDiscordRelationshipManager* manager, uint32_t index, struct DiscordRelationship* relationship); + void (DISCORD_API *filter)(struct IDiscordRelationshipManager* manager, void* filter_data, bool (DISCORD_API *filter)(void* filter_data, struct DiscordRelationship* relationship)); + enum EDiscordResult (DISCORD_API *count)(struct IDiscordRelationshipManager* manager, int32_t* count); + enum EDiscordResult (DISCORD_API *get)(struct IDiscordRelationshipManager* manager, DiscordUserId user_id, struct DiscordRelationship* relationship); + enum EDiscordResult (DISCORD_API *get_at)(struct IDiscordRelationshipManager* manager, uint32_t index, struct DiscordRelationship* relationship); }; struct IDiscordLobbyEvents { - void (*on_lobby_update)(void* event_data, int64_t lobby_id); - void (*on_lobby_delete)(void* event_data, int64_t lobby_id, uint32_t reason); - void (*on_member_connect)(void* event_data, int64_t lobby_id, int64_t user_id); - void (*on_member_update)(void* event_data, int64_t lobby_id, int64_t user_id); - void (*on_member_disconnect)(void* event_data, int64_t lobby_id, int64_t user_id); - void (*on_lobby_message)(void* event_data, int64_t lobby_id, int64_t user_id, uint8_t* data, uint32_t data_length); - void (*on_speaking)(void* event_data, int64_t lobby_id, int64_t user_id, bool speaking); - void (*on_network_message)(void* event_data, int64_t lobby_id, int64_t user_id, uint8_t channel_id, uint8_t* data, uint32_t data_length); + void (DISCORD_API *on_lobby_update)(void* event_data, int64_t lobby_id); + void (DISCORD_API *on_lobby_delete)(void* event_data, int64_t lobby_id, uint32_t reason); + void (DISCORD_API *on_member_connect)(void* event_data, int64_t lobby_id, int64_t user_id); + void (DISCORD_API *on_member_update)(void* event_data, int64_t lobby_id, int64_t user_id); + void (DISCORD_API *on_member_disconnect)(void* event_data, int64_t lobby_id, int64_t user_id); + void (DISCORD_API *on_lobby_message)(void* event_data, int64_t lobby_id, int64_t user_id, uint8_t* data, uint32_t data_length); + void (DISCORD_API *on_speaking)(void* event_data, int64_t lobby_id, int64_t user_id, bool speaking); + void (DISCORD_API *on_network_message)(void* event_data, int64_t lobby_id, int64_t user_id, uint8_t channel_id, uint8_t* data, uint32_t data_length); }; struct IDiscordLobbyManager { - enum EDiscordResult (*get_lobby_create_transaction)(struct IDiscordLobbyManager* manager, struct IDiscordLobbyTransaction** transaction); - enum EDiscordResult (*get_lobby_update_transaction)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, struct IDiscordLobbyTransaction** transaction); - enum EDiscordResult (*get_member_update_transaction)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordUserId user_id, struct IDiscordLobbyMemberTransaction** transaction); - void (*create_lobby)(struct IDiscordLobbyManager* manager, struct IDiscordLobbyTransaction* transaction, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result, struct DiscordLobby* lobby)); - void (*update_lobby)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, struct IDiscordLobbyTransaction* transaction, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*delete_lobby)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*connect_lobby)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordLobbySecret secret, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result, struct DiscordLobby* lobby)); - void (*connect_lobby_with_activity_secret)(struct IDiscordLobbyManager* manager, DiscordLobbySecret activity_secret, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result, struct DiscordLobby* lobby)); - void (*disconnect_lobby)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - enum EDiscordResult (*get_lobby)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, struct DiscordLobby* lobby); - enum EDiscordResult (*get_lobby_activity_secret)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordLobbySecret* secret); - enum EDiscordResult (*get_lobby_metadata_value)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordMetadataKey key, DiscordMetadataValue* value); - enum EDiscordResult (*get_lobby_metadata_key)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, int32_t index, DiscordMetadataKey* key); - enum EDiscordResult (*lobby_metadata_count)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, int32_t* count); - enum EDiscordResult (*member_count)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, int32_t* count); - enum EDiscordResult (*get_member_user_id)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, int32_t index, DiscordUserId* user_id); - enum EDiscordResult (*get_member_user)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordUserId user_id, struct DiscordUser* user); - enum EDiscordResult (*get_member_metadata_value)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordUserId user_id, DiscordMetadataKey key, DiscordMetadataValue* value); - enum EDiscordResult (*get_member_metadata_key)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordUserId user_id, int32_t index, DiscordMetadataKey* key); - enum EDiscordResult (*member_metadata_count)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordUserId user_id, int32_t* count); - void (*update_member)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordUserId user_id, struct IDiscordLobbyMemberTransaction* transaction, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*send_lobby_message)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, uint8_t* data, uint32_t data_length, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - enum EDiscordResult (*get_search_query)(struct IDiscordLobbyManager* manager, struct IDiscordLobbySearchQuery** query); - void (*search)(struct IDiscordLobbyManager* manager, struct IDiscordLobbySearchQuery* query, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*lobby_count)(struct IDiscordLobbyManager* manager, int32_t* count); - enum EDiscordResult (*get_lobby_id)(struct IDiscordLobbyManager* manager, int32_t index, DiscordLobbyId* lobby_id); - void (*connect_voice)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*disconnect_voice)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - enum EDiscordResult (*connect_network)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id); - enum EDiscordResult (*disconnect_network)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id); - enum EDiscordResult (*flush_network)(struct IDiscordLobbyManager* manager); - enum EDiscordResult (*open_network_channel)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, uint8_t channel_id, bool reliable); - enum EDiscordResult (*send_network_message)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordUserId user_id, uint8_t channel_id, uint8_t* data, uint32_t data_length); + enum EDiscordResult (DISCORD_API *get_lobby_create_transaction)(struct IDiscordLobbyManager* manager, struct IDiscordLobbyTransaction** transaction); + enum EDiscordResult (DISCORD_API *get_lobby_update_transaction)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, struct IDiscordLobbyTransaction** transaction); + enum EDiscordResult (DISCORD_API *get_member_update_transaction)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordUserId user_id, struct IDiscordLobbyMemberTransaction** transaction); + void (DISCORD_API *create_lobby)(struct IDiscordLobbyManager* manager, struct IDiscordLobbyTransaction* transaction, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result, struct DiscordLobby* lobby)); + void (DISCORD_API *update_lobby)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, struct IDiscordLobbyTransaction* transaction, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *delete_lobby)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *connect_lobby)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordLobbySecret secret, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result, struct DiscordLobby* lobby)); + void (DISCORD_API *connect_lobby_with_activity_secret)(struct IDiscordLobbyManager* manager, DiscordLobbySecret activity_secret, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result, struct DiscordLobby* lobby)); + void (DISCORD_API *disconnect_lobby)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + enum EDiscordResult (DISCORD_API *get_lobby)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, struct DiscordLobby* lobby); + enum EDiscordResult (DISCORD_API *get_lobby_activity_secret)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordLobbySecret* secret); + enum EDiscordResult (DISCORD_API *get_lobby_metadata_value)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordMetadataKey key, DiscordMetadataValue* value); + enum EDiscordResult (DISCORD_API *get_lobby_metadata_key)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, int32_t index, DiscordMetadataKey* key); + enum EDiscordResult (DISCORD_API *lobby_metadata_count)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, int32_t* count); + enum EDiscordResult (DISCORD_API *member_count)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, int32_t* count); + enum EDiscordResult (DISCORD_API *get_member_user_id)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, int32_t index, DiscordUserId* user_id); + enum EDiscordResult (DISCORD_API *get_member_user)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordUserId user_id, struct DiscordUser* user); + enum EDiscordResult (DISCORD_API *get_member_metadata_value)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordUserId user_id, DiscordMetadataKey key, DiscordMetadataValue* value); + enum EDiscordResult (DISCORD_API *get_member_metadata_key)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordUserId user_id, int32_t index, DiscordMetadataKey* key); + enum EDiscordResult (DISCORD_API *member_metadata_count)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordUserId user_id, int32_t* count); + void (DISCORD_API *update_member)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordUserId user_id, struct IDiscordLobbyMemberTransaction* transaction, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *send_lobby_message)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, uint8_t* data, uint32_t data_length, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + enum EDiscordResult (DISCORD_API *get_search_query)(struct IDiscordLobbyManager* manager, struct IDiscordLobbySearchQuery** query); + void (DISCORD_API *search)(struct IDiscordLobbyManager* manager, struct IDiscordLobbySearchQuery* query, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *lobby_count)(struct IDiscordLobbyManager* manager, int32_t* count); + enum EDiscordResult (DISCORD_API *get_lobby_id)(struct IDiscordLobbyManager* manager, int32_t index, DiscordLobbyId* lobby_id); + void (DISCORD_API *connect_voice)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *disconnect_voice)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + enum EDiscordResult (DISCORD_API *connect_network)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id); + enum EDiscordResult (DISCORD_API *disconnect_network)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id); + enum EDiscordResult (DISCORD_API *flush_network)(struct IDiscordLobbyManager* manager); + enum EDiscordResult (DISCORD_API *open_network_channel)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, uint8_t channel_id, bool reliable); + enum EDiscordResult (DISCORD_API *send_network_message)(struct IDiscordLobbyManager* manager, DiscordLobbyId lobby_id, DiscordUserId user_id, uint8_t channel_id, uint8_t* data, uint32_t data_length); }; struct IDiscordNetworkEvents { - void (*on_message)(void* event_data, DiscordNetworkPeerId peer_id, DiscordNetworkChannelId channel_id, uint8_t* data, uint32_t data_length); - void (*on_route_update)(void* event_data, const char* route_data); + void (DISCORD_API *on_message)(void* event_data, DiscordNetworkPeerId peer_id, DiscordNetworkChannelId channel_id, uint8_t* data, uint32_t data_length); + void (DISCORD_API *on_route_update)(void* event_data, const char* route_data); }; struct IDiscordNetworkManager { /** * Get the local peer ID for this process. */ - void (*get_peer_id)(struct IDiscordNetworkManager* manager, DiscordNetworkPeerId* peer_id); + void (DISCORD_API *get_peer_id)(struct IDiscordNetworkManager* manager, DiscordNetworkPeerId* peer_id); /** * Send pending network messages. */ - enum EDiscordResult (*flush)(struct IDiscordNetworkManager* manager); + enum EDiscordResult (DISCORD_API *flush)(struct IDiscordNetworkManager* manager); /** * Open a connection to a remote peer. */ - enum EDiscordResult (*open_peer)(struct IDiscordNetworkManager* manager, DiscordNetworkPeerId peer_id, const char* route_data); + enum EDiscordResult (DISCORD_API *open_peer)(struct IDiscordNetworkManager* manager, DiscordNetworkPeerId peer_id, const char* route_data); /** * Update the route data for a connected peer. */ - enum EDiscordResult (*update_peer)(struct IDiscordNetworkManager* manager, DiscordNetworkPeerId peer_id, const char* route_data); + enum EDiscordResult (DISCORD_API *update_peer)(struct IDiscordNetworkManager* manager, DiscordNetworkPeerId peer_id, const char* route_data); /** * Close the connection to a remote peer. */ - enum EDiscordResult (*close_peer)(struct IDiscordNetworkManager* manager, DiscordNetworkPeerId peer_id); + enum EDiscordResult (DISCORD_API *close_peer)(struct IDiscordNetworkManager* manager, DiscordNetworkPeerId peer_id); /** * Open a message channel to a connected peer. */ - enum EDiscordResult (*open_channel)(struct IDiscordNetworkManager* manager, DiscordNetworkPeerId peer_id, DiscordNetworkChannelId channel_id, bool reliable); + enum EDiscordResult (DISCORD_API *open_channel)(struct IDiscordNetworkManager* manager, DiscordNetworkPeerId peer_id, DiscordNetworkChannelId channel_id, bool reliable); /** * Close a message channel to a connected peer. */ - enum EDiscordResult (*close_channel)(struct IDiscordNetworkManager* manager, DiscordNetworkPeerId peer_id, DiscordNetworkChannelId channel_id); + enum EDiscordResult (DISCORD_API *close_channel)(struct IDiscordNetworkManager* manager, DiscordNetworkPeerId peer_id, DiscordNetworkChannelId channel_id); /** * Send a message to a connected peer over an opened message channel. */ - enum EDiscordResult (*send_message)(struct IDiscordNetworkManager* manager, DiscordNetworkPeerId peer_id, DiscordNetworkChannelId channel_id, uint8_t* data, uint32_t data_length); + enum EDiscordResult (DISCORD_API *send_message)(struct IDiscordNetworkManager* manager, DiscordNetworkPeerId peer_id, DiscordNetworkChannelId channel_id, uint8_t* data, uint32_t data_length); }; struct IDiscordOverlayEvents { - void (*on_toggle)(void* event_data, bool locked); + void (DISCORD_API *on_toggle)(void* event_data, bool locked); }; struct IDiscordOverlayManager { - void (*is_enabled)(struct IDiscordOverlayManager* manager, bool* enabled); - void (*is_locked)(struct IDiscordOverlayManager* manager, bool* locked); - void (*set_locked)(struct IDiscordOverlayManager* manager, bool locked, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*open_activity_invite)(struct IDiscordOverlayManager* manager, enum EDiscordActivityActionType type, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*open_guild_invite)(struct IDiscordOverlayManager* manager, const char* code, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*open_voice_settings)(struct IDiscordOverlayManager* manager, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *is_enabled)(struct IDiscordOverlayManager* manager, bool* enabled); + void (DISCORD_API *is_locked)(struct IDiscordOverlayManager* manager, bool* locked); + void (DISCORD_API *set_locked)(struct IDiscordOverlayManager* manager, bool locked, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *open_activity_invite)(struct IDiscordOverlayManager* manager, enum EDiscordActivityActionType type, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *open_guild_invite)(struct IDiscordOverlayManager* manager, const char* code, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *open_voice_settings)(struct IDiscordOverlayManager* manager, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + enum EDiscordResult (DISCORD_API *init_drawing_dxgi)(struct IDiscordOverlayManager* manager, IDXGISwapChain* swapchain, bool use_message_forwarding); + void (DISCORD_API *on_present)(struct IDiscordOverlayManager* manager); + void (DISCORD_API *forward_message)(struct IDiscordOverlayManager* manager, MSG* message); + void (DISCORD_API *key_event)(struct IDiscordOverlayManager* manager, bool down, const char* key_code, enum EDiscordKeyVariant variant); + void (DISCORD_API *char_event)(struct IDiscordOverlayManager* manager, const char* character); + void (DISCORD_API *mouse_button_event)(struct IDiscordOverlayManager* manager, uint8_t down, int32_t click_count, enum EDiscordMouseButton which, int32_t x, int32_t y); + void (DISCORD_API *mouse_motion_event)(struct IDiscordOverlayManager* manager, int32_t x, int32_t y); + void (DISCORD_API *ime_commit_text)(struct IDiscordOverlayManager* manager, const char* text); + void (DISCORD_API *ime_set_composition)(struct IDiscordOverlayManager* manager, const char* text, struct DiscordImeUnderline* underlines, uint32_t underlines_length, int32_t from, int32_t to); + void (DISCORD_API *ime_cancel_composition)(struct IDiscordOverlayManager* manager); + void (DISCORD_API *set_ime_composition_range_callback)(struct IDiscordOverlayManager* manager, void* on_ime_composition_range_changed_data, void (DISCORD_API *on_ime_composition_range_changed)(void* on_ime_composition_range_changed_data, int32_t from, int32_t to, struct DiscordRect* bounds, uint32_t bounds_length)); + void (DISCORD_API *set_ime_selection_bounds_callback)(struct IDiscordOverlayManager* manager, void* on_ime_selection_bounds_changed_data, void (DISCORD_API *on_ime_selection_bounds_changed)(void* on_ime_selection_bounds_changed_data, struct DiscordRect anchor, struct DiscordRect focus, bool is_anchor_first)); + bool (DISCORD_API *is_point_inside_click_zone)(struct IDiscordOverlayManager* manager, int32_t x, int32_t y); }; typedef void* IDiscordStorageEvents; struct IDiscordStorageManager { - enum EDiscordResult (*read)(struct IDiscordStorageManager* manager, const char* name, uint8_t* data, uint32_t data_length, uint32_t* read); - void (*read_async)(struct IDiscordStorageManager* manager, const char* name, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result, uint8_t* data, uint32_t data_length)); - void (*read_async_partial)(struct IDiscordStorageManager* manager, const char* name, uint64_t offset, uint64_t length, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result, uint8_t* data, uint32_t data_length)); - enum EDiscordResult (*write)(struct IDiscordStorageManager* manager, const char* name, uint8_t* data, uint32_t data_length); - void (*write_async)(struct IDiscordStorageManager* manager, const char* name, uint8_t* data, uint32_t data_length, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - enum EDiscordResult (*delete_)(struct IDiscordStorageManager* manager, const char* name); - enum EDiscordResult (*exists)(struct IDiscordStorageManager* manager, const char* name, bool* exists); - void (*count)(struct IDiscordStorageManager* manager, int32_t* count); - enum EDiscordResult (*stat)(struct IDiscordStorageManager* manager, const char* name, struct DiscordFileStat* stat); - enum EDiscordResult (*stat_at)(struct IDiscordStorageManager* manager, int32_t index, struct DiscordFileStat* stat); - enum EDiscordResult (*get_path)(struct IDiscordStorageManager* manager, DiscordPath* path); + enum EDiscordResult (DISCORD_API *read)(struct IDiscordStorageManager* manager, const char* name, uint8_t* data, uint32_t data_length, uint32_t* read); + void (DISCORD_API *read_async)(struct IDiscordStorageManager* manager, const char* name, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result, uint8_t* data, uint32_t data_length)); + void (DISCORD_API *read_async_partial)(struct IDiscordStorageManager* manager, const char* name, uint64_t offset, uint64_t length, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result, uint8_t* data, uint32_t data_length)); + enum EDiscordResult (DISCORD_API *write)(struct IDiscordStorageManager* manager, const char* name, uint8_t* data, uint32_t data_length); + void (DISCORD_API *write_async)(struct IDiscordStorageManager* manager, const char* name, uint8_t* data, uint32_t data_length, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + enum EDiscordResult (DISCORD_API *delete_)(struct IDiscordStorageManager* manager, const char* name); + enum EDiscordResult (DISCORD_API *exists)(struct IDiscordStorageManager* manager, const char* name, bool* exists); + void (DISCORD_API *count)(struct IDiscordStorageManager* manager, int32_t* count); + enum EDiscordResult (DISCORD_API *stat)(struct IDiscordStorageManager* manager, const char* name, struct DiscordFileStat* stat); + enum EDiscordResult (DISCORD_API *stat_at)(struct IDiscordStorageManager* manager, int32_t index, struct DiscordFileStat* stat); + enum EDiscordResult (DISCORD_API *get_path)(struct IDiscordStorageManager* manager, DiscordPath* path); }; struct IDiscordStoreEvents { - void (*on_entitlement_create)(void* event_data, struct DiscordEntitlement* entitlement); - void (*on_entitlement_delete)(void* event_data, struct DiscordEntitlement* entitlement); + void (DISCORD_API *on_entitlement_create)(void* event_data, struct DiscordEntitlement* entitlement); + void (DISCORD_API *on_entitlement_delete)(void* event_data, struct DiscordEntitlement* entitlement); }; struct IDiscordStoreManager { - void (*fetch_skus)(struct IDiscordStoreManager* manager, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*count_skus)(struct IDiscordStoreManager* manager, int32_t* count); - enum EDiscordResult (*get_sku)(struct IDiscordStoreManager* manager, DiscordSnowflake sku_id, struct DiscordSku* sku); - enum EDiscordResult (*get_sku_at)(struct IDiscordStoreManager* manager, int32_t index, struct DiscordSku* sku); - void (*fetch_entitlements)(struct IDiscordStoreManager* manager, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*count_entitlements)(struct IDiscordStoreManager* manager, int32_t* count); - enum EDiscordResult (*get_entitlement)(struct IDiscordStoreManager* manager, DiscordSnowflake entitlement_id, struct DiscordEntitlement* entitlement); - enum EDiscordResult (*get_entitlement_at)(struct IDiscordStoreManager* manager, int32_t index, struct DiscordEntitlement* entitlement); - enum EDiscordResult (*has_sku_entitlement)(struct IDiscordStoreManager* manager, DiscordSnowflake sku_id, bool* has_entitlement); - void (*start_purchase)(struct IDiscordStoreManager* manager, DiscordSnowflake sku_id, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *fetch_skus)(struct IDiscordStoreManager* manager, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *count_skus)(struct IDiscordStoreManager* manager, int32_t* count); + enum EDiscordResult (DISCORD_API *get_sku)(struct IDiscordStoreManager* manager, DiscordSnowflake sku_id, struct DiscordSku* sku); + enum EDiscordResult (DISCORD_API *get_sku_at)(struct IDiscordStoreManager* manager, int32_t index, struct DiscordSku* sku); + void (DISCORD_API *fetch_entitlements)(struct IDiscordStoreManager* manager, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *count_entitlements)(struct IDiscordStoreManager* manager, int32_t* count); + enum EDiscordResult (DISCORD_API *get_entitlement)(struct IDiscordStoreManager* manager, DiscordSnowflake entitlement_id, struct DiscordEntitlement* entitlement); + enum EDiscordResult (DISCORD_API *get_entitlement_at)(struct IDiscordStoreManager* manager, int32_t index, struct DiscordEntitlement* entitlement); + enum EDiscordResult (DISCORD_API *has_sku_entitlement)(struct IDiscordStoreManager* manager, DiscordSnowflake sku_id, bool* has_entitlement); + void (DISCORD_API *start_purchase)(struct IDiscordStoreManager* manager, DiscordSnowflake sku_id, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); }; struct IDiscordVoiceEvents { - void (*on_settings_update)(void* event_data); + void (DISCORD_API *on_settings_update)(void* event_data); }; struct IDiscordVoiceManager { - enum EDiscordResult (*get_input_mode)(struct IDiscordVoiceManager* manager, struct DiscordInputMode* input_mode); - void (*set_input_mode)(struct IDiscordVoiceManager* manager, struct DiscordInputMode input_mode, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - enum EDiscordResult (*is_self_mute)(struct IDiscordVoiceManager* manager, bool* mute); - enum EDiscordResult (*set_self_mute)(struct IDiscordVoiceManager* manager, bool mute); - enum EDiscordResult (*is_self_deaf)(struct IDiscordVoiceManager* manager, bool* deaf); - enum EDiscordResult (*set_self_deaf)(struct IDiscordVoiceManager* manager, bool deaf); - enum EDiscordResult (*is_local_mute)(struct IDiscordVoiceManager* manager, DiscordSnowflake user_id, bool* mute); - enum EDiscordResult (*set_local_mute)(struct IDiscordVoiceManager* manager, DiscordSnowflake user_id, bool mute); - enum EDiscordResult (*get_local_volume)(struct IDiscordVoiceManager* manager, DiscordSnowflake user_id, uint8_t* volume); - enum EDiscordResult (*set_local_volume)(struct IDiscordVoiceManager* manager, DiscordSnowflake user_id, uint8_t volume); + enum EDiscordResult (DISCORD_API *get_input_mode)(struct IDiscordVoiceManager* manager, struct DiscordInputMode* input_mode); + void (DISCORD_API *set_input_mode)(struct IDiscordVoiceManager* manager, struct DiscordInputMode input_mode, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + enum EDiscordResult (DISCORD_API *is_self_mute)(struct IDiscordVoiceManager* manager, bool* mute); + enum EDiscordResult (DISCORD_API *set_self_mute)(struct IDiscordVoiceManager* manager, bool mute); + enum EDiscordResult (DISCORD_API *is_self_deaf)(struct IDiscordVoiceManager* manager, bool* deaf); + enum EDiscordResult (DISCORD_API *set_self_deaf)(struct IDiscordVoiceManager* manager, bool deaf); + enum EDiscordResult (DISCORD_API *is_local_mute)(struct IDiscordVoiceManager* manager, DiscordSnowflake user_id, bool* mute); + enum EDiscordResult (DISCORD_API *set_local_mute)(struct IDiscordVoiceManager* manager, DiscordSnowflake user_id, bool mute); + enum EDiscordResult (DISCORD_API *get_local_volume)(struct IDiscordVoiceManager* manager, DiscordSnowflake user_id, uint8_t* volume); + enum EDiscordResult (DISCORD_API *set_local_volume)(struct IDiscordVoiceManager* manager, DiscordSnowflake user_id, uint8_t volume); }; struct IDiscordAchievementEvents { - void (*on_user_achievement_update)(void* event_data, struct DiscordUserAchievement* user_achievement); + void (DISCORD_API *on_user_achievement_update)(void* event_data, struct DiscordUserAchievement* user_achievement); }; struct IDiscordAchievementManager { - void (*set_user_achievement)(struct IDiscordAchievementManager* manager, DiscordSnowflake achievement_id, uint8_t percent_complete, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*fetch_user_achievements)(struct IDiscordAchievementManager* manager, void* callback_data, void (*callback)(void* callback_data, enum EDiscordResult result)); - void (*count_user_achievements)(struct IDiscordAchievementManager* manager, int32_t* count); - enum EDiscordResult (*get_user_achievement)(struct IDiscordAchievementManager* manager, DiscordSnowflake user_achievement_id, struct DiscordUserAchievement* user_achievement); - enum EDiscordResult (*get_user_achievement_at)(struct IDiscordAchievementManager* manager, int32_t index, struct DiscordUserAchievement* user_achievement); + void (DISCORD_API *set_user_achievement)(struct IDiscordAchievementManager* manager, DiscordSnowflake achievement_id, uint8_t percent_complete, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *fetch_user_achievements)(struct IDiscordAchievementManager* manager, void* callback_data, void (DISCORD_API *callback)(void* callback_data, enum EDiscordResult result)); + void (DISCORD_API *count_user_achievements)(struct IDiscordAchievementManager* manager, int32_t* count); + enum EDiscordResult (DISCORD_API *get_user_achievement)(struct IDiscordAchievementManager* manager, DiscordSnowflake user_achievement_id, struct DiscordUserAchievement* user_achievement); + enum EDiscordResult (DISCORD_API *get_user_achievement_at)(struct IDiscordAchievementManager* manager, int32_t index, struct DiscordUserAchievement* user_achievement); }; typedef void* IDiscordCoreEvents; struct IDiscordCore { - void (*destroy)(struct IDiscordCore* core); - enum EDiscordResult (*run_callbacks)(struct IDiscordCore* core); - void (*set_log_hook)(struct IDiscordCore* core, enum EDiscordLogLevel min_level, void* hook_data, void (*hook)(void* hook_data, enum EDiscordLogLevel level, const char* message)); - struct IDiscordApplicationManager* (*get_application_manager)(struct IDiscordCore* core); - struct IDiscordUserManager* (*get_user_manager)(struct IDiscordCore* core); - struct IDiscordImageManager* (*get_image_manager)(struct IDiscordCore* core); - struct IDiscordActivityManager* (*get_activity_manager)(struct IDiscordCore* core); - struct IDiscordRelationshipManager* (*get_relationship_manager)(struct IDiscordCore* core); - struct IDiscordLobbyManager* (*get_lobby_manager)(struct IDiscordCore* core); - struct IDiscordNetworkManager* (*get_network_manager)(struct IDiscordCore* core); - struct IDiscordOverlayManager* (*get_overlay_manager)(struct IDiscordCore* core); - struct IDiscordStorageManager* (*get_storage_manager)(struct IDiscordCore* core); - struct IDiscordStoreManager* (*get_store_manager)(struct IDiscordCore* core); - struct IDiscordVoiceManager* (*get_voice_manager)(struct IDiscordCore* core); - struct IDiscordAchievementManager* (*get_achievement_manager)(struct IDiscordCore* core); + void (DISCORD_API *destroy)(struct IDiscordCore* core); + enum EDiscordResult (DISCORD_API *run_callbacks)(struct IDiscordCore* core); + void (DISCORD_API *set_log_hook)(struct IDiscordCore* core, enum EDiscordLogLevel min_level, void* hook_data, void (DISCORD_API *hook)(void* hook_data, enum EDiscordLogLevel level, const char* message)); + struct IDiscordApplicationManager* (DISCORD_API *get_application_manager)(struct IDiscordCore* core); + struct IDiscordUserManager* (DISCORD_API *get_user_manager)(struct IDiscordCore* core); + struct IDiscordImageManager* (DISCORD_API *get_image_manager)(struct IDiscordCore* core); + struct IDiscordActivityManager* (DISCORD_API *get_activity_manager)(struct IDiscordCore* core); + struct IDiscordRelationshipManager* (DISCORD_API *get_relationship_manager)(struct IDiscordCore* core); + struct IDiscordLobbyManager* (DISCORD_API *get_lobby_manager)(struct IDiscordCore* core); + struct IDiscordNetworkManager* (DISCORD_API *get_network_manager)(struct IDiscordCore* core); + struct IDiscordOverlayManager* (DISCORD_API *get_overlay_manager)(struct IDiscordCore* core); + struct IDiscordStorageManager* (DISCORD_API *get_storage_manager)(struct IDiscordCore* core); + struct IDiscordStoreManager* (DISCORD_API *get_store_manager)(struct IDiscordCore* core); + struct IDiscordVoiceManager* (DISCORD_API *get_voice_manager)(struct IDiscordCore* core); + struct IDiscordAchievementManager* (DISCORD_API *get_achievement_manager)(struct IDiscordCore* core); }; struct DiscordCreateParams { @@ -644,7 +727,7 @@ void DiscordCreateParamsSetDefault(struct DiscordCreateParams* params) params->achievement_version = DISCORD_ACHIEVEMENT_MANAGER_VERSION; } -enum EDiscordResult DiscordCreate(DiscordVersion version, struct DiscordCreateParams* params, struct IDiscordCore** result); +enum EDiscordResult DISCORD_API DiscordCreate(DiscordVersion version, struct DiscordCreateParams* params, struct IDiscordCore** result); #ifdef __cplusplus } From 121a11f132465c1640eb4a9aeac5531fdda40724 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Fri, 15 Jul 2022 17:36:06 +0200 Subject: [PATCH 018/386] Revert to the IBM ESDI MCA roms to prevent a hang into booting some operating systems such as NT. Remove horrible status hack. --- src/disk/hdc_esdi_mca.c | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-) diff --git a/src/disk/hdc_esdi_mca.c b/src/disk/hdc_esdi_mca.c index 9d2881294..e0859697f 100644 --- a/src/disk/hdc_esdi_mca.c +++ b/src/disk/hdc_esdi_mca.c @@ -86,8 +86,8 @@ #define ESDI_IOADDR_SEC 0x3518 #define ESDI_IRQCHAN 14 -#define BIOS_FILE_L "roms/hdd/esdi/62-000193-036.BIN" -#define BIOS_FILE_H "roms/hdd/esdi/62-000194-036.BIN" +#define BIOS_FILE_L "roms/hdd/esdi/90x8969.bin" +#define BIOS_FILE_H "roms/hdd/esdi/90x8970.bin" #define ESDI_TIME 512 @@ -133,7 +133,7 @@ typedef struct esdi_t { int command; int cmd_state; - int in_reset, in_reset2; + int in_reset; uint64_t callback; pc_timer_t timer; @@ -825,13 +825,6 @@ esdi_read(uint16_t port, void *priv) switch (port & 7) { case 2: /*Basic status register*/ - if (!dev->status) { - if (((dev->command == CMD_WRITE) || dev->in_reset2) && !dev->cmd_dev) { - dev->in_reset2 = 0; - dev->status |= STATUS_STATUS_OUT_FULL; - } else if (dev->command && (dev->cmd_dev == ATTN_HOST_ADAPTER)) - dev->status |= STATUS_STATUS_OUT_FULL; - } ret = dev->status; break; @@ -859,7 +852,6 @@ esdi_write(uint16_t port, uint8_t val, void *priv) case 2: /*Basic control register*/ if ((dev->basic_ctrl & CTRL_RESET) && !(val & CTRL_RESET)) { dev->in_reset = 1; - dev->in_reset2 = 1; esdi_mca_set_callback(dev, ESDI_TIME * 50); dev->status = STATUS_BUSY; } @@ -891,7 +883,6 @@ esdi_write(uint16_t port, uint8_t val, void *priv) case ATTN_RESET: dev->in_reset = 1; - dev->in_reset2 = 1; esdi_mca_set_callback(dev, ESDI_TIME * 50); dev->status = STATUS_BUSY; break; @@ -1152,7 +1143,6 @@ esdi_init(const device_t *info) /* Mark for a reset. */ dev->in_reset = 1; - dev->in_reset2 = 1; esdi_mca_set_callback(dev, ESDI_TIME * 50); dev->status = STATUS_BUSY; From 0ba7c3c025c62b9a8352230a2e80d5a8f5a41eb5 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Fri, 15 Jul 2022 18:27:30 +0200 Subject: [PATCH 019/386] Fix warnings on the XGA, 8514/A and EGA Render map files. Revert initial XGA rom length back to 0x2000 to prevent error 114 in the MCA bioses. --- src/include/86box/vid_ega_render_remap.h | 30 ++++---- src/video/vid_8514a.c | 89 ++---------------------- src/video/vid_xga.c | 58 ++++++++------- 3 files changed, 51 insertions(+), 126 deletions(-) diff --git a/src/include/86box/vid_ega_render_remap.h b/src/include/86box/vid_ega_render_remap.h index 4ad64466c..b21233fbd 100644 --- a/src/include/86box/vid_ega_render_remap.h +++ b/src/include/86box/vid_ega_render_remap.h @@ -88,24 +88,24 @@ static uint32_t (*address_remap_funcs[16])(ega_t *ega, uint32_t in_addr) = void ega_recalc_remap_func(ega_t *ega) { - int func_nr; + int func_nr; - if (ega->crtc[0x14] & 0x40) - func_nr = VAR_DWORD_MODE; - else if (ega->crtc[0x17] & 0x40) - func_nr = VAR_BYTE_MODE; - else if (ega->crtc[0x17] & 0x20) - func_nr = VAR_WORD_MODE_MA15; - else - func_nr = VAR_WORD_MODE_MA13; + if (ega->crtc[0x14] & 0x40) + func_nr = VAR_DWORD_MODE; + else if (ega->crtc[0x17] & 0x40) + func_nr = VAR_BYTE_MODE; + else if (ega->crtc[0x17] & 0x20) + func_nr = VAR_WORD_MODE_MA15; + else + func_nr = VAR_WORD_MODE_MA13; - if (!(ega->crtc[0x17] & 0x01)) - func_nr |= VAR_ROW0_MA13; - if (!(ega->crtc[0x17] & 0x02)) - func_nr |= VAR_ROW1_MA14; + if (!(ega->crtc[0x17] & 0x01)) + func_nr |= VAR_ROW0_MA13; + if (!(ega->crtc[0x17] & 0x02)) + func_nr |= VAR_ROW1_MA14; - ega->remap_required = (func_nr != 0); - ega->remap_func = address_remap_funcs[func_nr]; + ega->remap_required = (func_nr != 0); + ega->remap_func = address_remap_funcs[func_nr]; } #endif /*VIDEO_RENDER_REMAP_H*/ diff --git a/src/video/vid_8514a.c b/src/video/vid_8514a.c index 7f1c7d770..0d28be612 100644 --- a/src/video/vid_8514a.c +++ b/src/video/vid_8514a.c @@ -37,22 +37,6 @@ #include <86box/vid_svga_render.h> #include "cpu.h" -#define INT_VSY (1 << 0) -#define INT_GE_BSY (1 << 1) -#define INT_FIFO_OVR (1 << 2) -#define INT_FIFO_EMP (1 << 3) -#define INT_MASK 0xf - -#define FIFO_MASK (FIFO_SIZE - 1) -#define FIFO_ENTRY_SIZE (1 << 31) - -#define FIFO_ENTRIES_8514 (dev->fifo_write_idx - dev->fifo_read_idx) -#define FIFO_FULL_8514 ((dev->fifo_write_idx - dev->fifo_read_idx) >= FIFO_SIZE) -#define FIFO_EMPTY_8514 (dev->fifo_read_idx == dev->fifo_write_idx) - -#define FIFO_TYPE_8514 0xff000000 -#define FIFO_ADDR_8514 0x00ffffff - static void ibm8514_accel_out_fifo(ibm8514_t *dev, uint16_t port, uint32_t val, int len); static void ibm8514_accel_outb(uint16_t port, uint8_t val, void *p); static void ibm8514_accel_outw(uint16_t port, uint16_t val, void *p); @@ -368,17 +352,14 @@ ibm8514_accel_out_fifo(ibm8514_t *dev, uint16_t port, uint32_t val, int len) case 0x82e8: case 0xc2e8: if (len == 1) { - dev->accel.cur_y_bit12 = (dev->accel.cur_y_bit12 & 0xf00) | val; dev->accel.cur_y = (dev->accel.cur_y & 0x700) | val; } else { - dev->accel.cur_y_bit12 = val & 0xfff; dev->accel.cur_y = val & 0x7ff; } break; case 0x82e9: case 0xc2e9: if (len == 1) { - dev->accel.cur_y_bit12 = (dev->accel.cur_y_bit12 & 0xff) | ((val & 0x0f) << 8); dev->accel.cur_y = (dev->accel.cur_y & 0xff) | ((val & 0x07) << 8); } break; @@ -386,17 +367,14 @@ ibm8514_accel_out_fifo(ibm8514_t *dev, uint16_t port, uint32_t val, int len) case 0x86e8: case 0xc6e8: if (len == 1) { - dev->accel.cur_x_bit12 = (dev->accel.cur_x_bit12 & 0xf00) | val; dev->accel.cur_x = (dev->accel.cur_x & 0x700) | val; } else { - dev->accel.cur_x_bit12 = val & 0xfff; dev->accel.cur_x = val & 0x7ff; } break; case 0x86e9: case 0xc6e9: if (len == 1) { - dev->accel.cur_x_bit12 = (dev->accel.cur_x_bit12 & 0xff) | ((val & 0x0f) << 8); dev->accel.cur_x = (dev->accel.cur_x & 0xff) | ((val & 0x07) << 8); } break; @@ -448,7 +426,7 @@ ibm8514_accel_out_fifo(ibm8514_t *dev, uint16_t port, uint32_t val, int len) else { dev->accel.err_term = val & 0x3fff; if (val & 0x2000) - dev->accel.err_term |= ~0x3fff; + dev->accel.err_term |= ~0x1fff; } break; case 0x92e9: @@ -456,7 +434,7 @@ ibm8514_accel_out_fifo(ibm8514_t *dev, uint16_t port, uint32_t val, int len) if (len == 1) { dev->accel.err_term = (dev->accel.err_term & 0xff) | ((val & 0x3f) << 8); if (val & 0x20) - dev->accel.err_term |= ~0x3fff; + dev->accel.err_term |= ~0x1fff; } break; @@ -707,7 +685,6 @@ ibm8514_ramdac_in(uint16_t port, void *p) { svga_t *svga = (svga_t *)p; uint8_t ret = 0xff; - uint8_t index; switch (port) { case 0x2ea: @@ -727,62 +704,6 @@ ibm8514_ramdac_in(uint16_t port, void *p) return ret; } -static void -ibm8514_io_remove(svga_t *svga) -{ - io_removehandler(0x2e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x2ea, 0x0004, ibm8514_ramdac_in, NULL, NULL, ibm8514_ramdac_out, NULL, NULL, svga); - io_removehandler(0x6e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x12e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x16e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x1ae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x1ee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x22e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x26e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x2ee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x42e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x4ae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x52e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x56e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x5ae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x5ee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x82e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x86e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x8ae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x8ee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x92e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x96e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x9ae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0x9ee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xa2e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xa6e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xaae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xaee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xb2e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xb6e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xbae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xbee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xe2e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - - io_removehandler(0xc2e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xc6e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xcae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xcee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xd2e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xd6e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xdae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xdee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xe6e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xeae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xeee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xf2e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xf6e8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xfae8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); - io_removehandler(0xfee8, 0x0002, ibm8514_accel_inb, ibm8514_accel_inw, NULL, ibm8514_accel_outb, ibm8514_accel_outw, NULL, svga); -} - static void ibm8514_io_set(svga_t *svga) { @@ -1139,7 +1060,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat uint32_t old_mix_dat; int and3 = dev->accel.cur_x & 3; uint8_t poly_src = 0; - int16_t tmpswap; + int16_t tmpswap = 0; if (dev->accel.cmd & 0x100) { dev->force_busy = 1; @@ -2717,7 +2638,7 @@ bitblt_pix: break; } - READ(dev->accel.dest + dev->accel.cx, dest_dat); + READ(dev->accel.dest + dev->accel.dx, dest_dat); if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || @@ -2729,7 +2650,7 @@ bitblt_pix: old_dest_dat = dest_dat; MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + WRITE(dev->accel.dest + dev->accel.dx, dest_dat); } } diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index 60e6f3d67..970834386 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -445,7 +445,6 @@ xga_ext_inb(uint16_t addr, void *p) svga_t *svga = (svga_t *)p; xga_t *xga = &svga->xga; uint8_t ret, index; - uint16_t sprite_idx; switch (addr & 0x0f) { case 0: @@ -898,7 +897,7 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; int y = ssv & 0x0f; int x = 0; - int dx, dy, dirx, diry; + int dx, dy, dirx = 0, diry = 0; dx = xga->accel.dst_map_x & 0x1fff; if (xga->accel.dst_map_x & 0x1800) @@ -1916,7 +1915,7 @@ xga_memio_writel(uint32_t addr, uint32_t val, void *p) static uint8_t xga_mem_read(uint32_t addr, xga_t *xga, svga_t *svga) { - uint8_t temp; + uint8_t temp = 0xff; addr &= 0x1fff; @@ -2031,19 +2030,16 @@ static void xga_hwcursor_draw(svga_t *svga, int displine) { xga_t *xga = &svga->xga; - uint8_t dat; + uint8_t dat = 0; int offset = xga->hwcursor_latch.x - xga->hwcursor_latch.xoff; int x, x_pos, y_pos; - int comb; + int comb = 0; uint32_t *p; - uint8_t *cd; int idx = (xga->cursor_data_on) ? 32 : 0; if (xga->interlace && xga->hwcursor_oddeven) xga->hwcursor_latch.addr += 16; - cd = (uint8_t *) xga->sprite_data; - y_pos = displine; x_pos = offset + svga->x_add; p = buffer32->line[y_pos]; @@ -2155,7 +2151,6 @@ xga_render_16bpp(xga_t *xga, svga_t *svga) int x; uint32_t *p; uint32_t dat; - uint32_t addr; if ((xga->displine + svga->y_add) < 0) return; @@ -2169,7 +2164,7 @@ xga_render_16bpp(xga_t *xga, svga_t *svga) for (x = 0; x <= (xga->h_disp); x += 8) { dat = *(uint32_t *)(&xga->vram[(xga->ma + (x << 1)) & xga->vram_mask]); - p[x] = video_16to32[dat & 0xffff]; + p[x] = video_16to32[dat & 0xffff]; p[x + 1] = video_16to32[dat >> 16]; dat = *(uint32_t *)(&xga->vram[(xga->ma + (x << 1) + 4) & xga->vram_mask]); @@ -2216,7 +2211,6 @@ static void xga_writeb(uint32_t addr, uint8_t val, void *p) { svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; //pclog("[%04X:%08X]: WriteB\n", CS, cpu_state.pc); xga_write(addr, val, p); @@ -2226,7 +2220,6 @@ static void xga_writew(uint32_t addr, uint16_t val, void *p) { svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; //pclog("[%04X:%08X]: WriteW\n", CS, cpu_state.pc); xga_write(addr, val, p); @@ -2237,7 +2230,6 @@ static void xga_writel(uint32_t addr, uint32_t val, void *p) { svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; //pclog("[%04X:%08X]: WriteL\n", CS, cpu_state.pc); xga_write(addr, val, p); @@ -2345,7 +2337,6 @@ static uint8_t xga_readb(uint32_t addr, void *p) { svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; uint8_t ret; ret = xga_read(addr, p); @@ -2357,7 +2348,6 @@ static uint16_t xga_readw(uint32_t addr, void *p) { svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; uint16_t ret; ret = xga_read(addr, p); @@ -2370,7 +2360,6 @@ static uint32_t xga_readl(uint32_t addr, void *p) { svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; uint32_t ret; ret = xga_read(addr, p); @@ -2665,16 +2654,11 @@ xga_mca_feedb(void *priv) } static void -xga_pos_out(uint16_t addr, uint8_t val, void *priv) +xga_mca_reset(void *p) { - svga_t *svga = (svga_t *)priv; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; - mem_mapping_disable(&svga->mapping); - if (val & 0x08) { - mem_mapping_enable(&svga->mapping); - xga_updatemapping(svga); - } + xga_mca_write(0x102, 0, svga); } static uint8_t @@ -2692,6 +2676,7 @@ static void xga_t *xga = &svga->xga; FILE *f; uint32_t temp; + uint32_t initial_bios_addr = device_get_config_hex20("init_bios_addr"); uint8_t *rom = NULL; xga->type = device_get_config_int("type"); @@ -2704,7 +2689,7 @@ static void xga->on = 0; xga->hwcursor.cur_xsize = 64; xga->hwcursor.cur_ysize = 64; - xga->bios_rom.sz = 0x8000; + xga->bios_rom.sz = 0x2000; f = rom_fopen(xga->type ? XGA2_BIOS_PATH : XGA_BIOS_PATH, "rb"); (void)fseek(f, 0L, SEEK_END); @@ -2729,7 +2714,7 @@ static void xga->instance = 0; xga->rom_addr = 0; mem_mapping_add(&xga->bios_rom.mapping, - 0xd8000, xga->bios_rom.sz, + initial_bios_addr, xga->bios_rom.sz, rom_read, rom_readw, rom_readl, NULL, NULL, NULL, xga->bios_rom.rom, MEM_MAPPING_EXTERNAL, &xga->bios_rom); @@ -2759,7 +2744,7 @@ static void xga->pos_regs[1] = 0x8f; if (xga->bus & DEVICE_MCA) { - mca_add(xga_mca_read, xga_mca_write, xga_mca_feedb, NULL, svga); + mca_add(xga_mca_read, xga_mca_write, xga_mca_feedb, xga_mca_reset, svga); } else { io_sethandler(0x0100, 0x0008, xga_pos_in, NULL, NULL, NULL, NULL, NULL, svga); io_sethandler(0x2100 + (xga->instance << 4), 0x0010, xga_ext_inb, NULL, NULL, xga_ext_outb, NULL, NULL, svga); @@ -2805,6 +2790,25 @@ xga_force_redraw(void *p) static const device_config_t xga_configuration[] = { // clang-format off + { + .name = "init_bios_addr", + .description = "Initial MCA BIOS Address (before POS configuration)", + .type = CONFIG_HEX20, + .default_string = "", + .default_int = 0xc0000, + .file_filter = "", + .spinner = { 0 }, + .selection = { + { .description = "C000H", .value = 0xc0000 }, + { .description = "C800H", .value = 0xc8000 }, + { .description = "CC00H", .value = 0xcc000 }, + { .description = "D000H", .value = 0xd0000 }, + { .description = "D400H", .value = 0xd4000 }, + { .description = "D800H", .value = 0xd8000 }, + { .description = "DC00H", .value = 0xdc000 }, + { .description = "" } + }, + }, { .name = "type", .description = "XGA type", From 3cc3bb339ad6c98a696deabd6d413769af2af598 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Fri, 15 Jul 2022 18:36:47 +0200 Subject: [PATCH 020/386] Fix the fix. --- src/video/vid_8514a.c | 4 ---- src/video/vid_xga.c | 9 --------- 2 files changed, 13 deletions(-) diff --git a/src/video/vid_8514a.c b/src/video/vid_8514a.c index 0d28be612..1cb0a5407 100644 --- a/src/video/vid_8514a.c +++ b/src/video/vid_8514a.c @@ -662,7 +662,6 @@ static void ibm8514_ramdac_out(uint16_t port, uint8_t val, void *p) { svga_t *svga = (svga_t *)p; - uint8_t index; switch (port) { case 0x2ea: @@ -1038,8 +1037,6 @@ ibm8514_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t ibm8514_accel_start(count, cpu_input, mix_dat, cpu_dat, dev, len); } -#define SWAP(a,b) { tmpswap = a; a = b; b = tmpswap; } - static void ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, ibm8514_t *dev, int len) { @@ -1060,7 +1057,6 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat uint32_t old_mix_dat; int and3 = dev->accel.cur_x & 3; uint8_t poly_src = 0; - int16_t tmpswap = 0; if (dev->accel.cmd & 0x100) { dev->force_busy = 1; diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index 970834386..40f0aa6aa 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -2210,8 +2210,6 @@ xga_write(uint32_t addr, uint8_t val, void *p) static void xga_writeb(uint32_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; - //pclog("[%04X:%08X]: WriteB\n", CS, cpu_state.pc); xga_write(addr, val, p); } @@ -2219,8 +2217,6 @@ xga_writeb(uint32_t addr, uint8_t val, void *p) static void xga_writew(uint32_t addr, uint16_t val, void *p) { - svga_t *svga = (svga_t *)p; - //pclog("[%04X:%08X]: WriteW\n", CS, cpu_state.pc); xga_write(addr, val, p); xga_write(addr + 1, val >> 8, p); @@ -2229,8 +2225,6 @@ xga_writew(uint32_t addr, uint16_t val, void *p) static void xga_writel(uint32_t addr, uint32_t val, void *p) { - svga_t *svga = (svga_t *)p; - //pclog("[%04X:%08X]: WriteL\n", CS, cpu_state.pc); xga_write(addr, val, p); xga_write(addr + 1, val >> 8, p); @@ -2336,7 +2330,6 @@ xga_read(uint32_t addr, void *p) static uint8_t xga_readb(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; uint8_t ret; ret = xga_read(addr, p); @@ -2347,7 +2340,6 @@ xga_readb(uint32_t addr, void *p) static uint16_t xga_readw(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; uint16_t ret; ret = xga_read(addr, p); @@ -2359,7 +2351,6 @@ xga_readw(uint32_t addr, void *p) static uint32_t xga_readl(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; uint32_t ret; ret = xga_read(addr, p); From 3b2b0b984aeaa34ab08b2ee59ca46382a3c12a00 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Fri, 15 Jul 2022 15:36:00 -0300 Subject: [PATCH 021/386] Jenkins: Expand nodes which can perform the initial clone --- .ci/Jenkinsfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.ci/Jenkinsfile b/.ci/Jenkinsfile index fbcb51c04..fbb7fd081 100644 --- a/.ci/Jenkinsfile +++ b/.ci/Jenkinsfile @@ -194,7 +194,7 @@ pipeline { /* Adding to the above, run a git clone as soon as possible on any node to further avoid race conditions caused by busy node executor delays. */ retry(10) { - node('citadel && !Windows') { + node('!Windows') { /* Run git clone. */ gitClone(repository[buildBranch], branch[buildBranch]) From 2ed8ad907c27cc8248fd94819b146150fa50db46 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Fri, 15 Jul 2022 23:42:40 +0200 Subject: [PATCH 022/386] ACPI: replace 3.58MHz timer with an overflow timer --- src/acpi.c | 95 ++++++++++++++++++++++++---------------- src/include/86box/acpi.h | 3 +- src/include/86box/pit.h | 2 +- src/pit.c | 1 - 4 files changed, 60 insertions(+), 41 deletions(-) diff --git a/src/acpi.c b/src/acpi.c index 11d991f63..c73440fa5 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -20,6 +20,7 @@ #include #include #include +#include #define HAVE_STDARG_H #include <86box/86box.h> #include "cpu.h" @@ -37,10 +38,11 @@ #include <86box/acpi.h> #include <86box/machine.h> #include <86box/i2c.h> - +#include <86box/video.h> int acpi_rtc_status = 0; +static double cpu_to_acpi; #ifdef ENABLE_ACPI_LOG int acpi_do_log = ENABLE_ACPI_LOG; @@ -61,6 +63,50 @@ acpi_log(const char *fmt, ...) #define acpi_log(fmt, ...) #endif +static uint64_t acpi_clock_get() { + return tsc * cpu_to_acpi; +} + +static uint32_t acpi_timer_get(acpi_t *dev) { + uint64_t clock = acpi_clock_get(); + if (dev->regs.timer32) + return clock & 0xffffffff; + else + return clock & 0xffffff; +} + +static double acpi_get_overflow_period(acpi_t *dev) { + uint64_t timer = acpi_clock_get(); + uint64_t overflow_time; + + if (dev->regs.timer32) { + overflow_time = (timer + 0x80000000LL) & ~0x7fffffffLL; + } else { + overflow_time = (timer + 0x800000LL) & ~0x7fffffLL; + } + + uint64_t time_to_overflow = overflow_time - timer; + + return ((double)time_to_overflow / (double)ACPI_TIMER_FREQ) * 1000000.0; +} + +static void +acpi_timer_overflow(void *priv) +{ + acpi_t *dev = (acpi_t *) priv; + dev->regs.pmsts |= TMROF_STS; + acpi_update_irq(dev); +} + +static void +acpi_timer_update(acpi_t *dev, bool enable) +{ + if (enable) { + timer_on_auto(&dev->timer, acpi_get_overflow_period(dev)); + } else { + timer_stop(&dev->timer); + } +} void acpi_update_irq(acpi_t *dev) @@ -84,6 +130,8 @@ acpi_update_irq(acpi_t *dev) else pci_clear_mirq(0xf0 | dev->irq_line, 1); } + + acpi_timer_update(dev, (dev->regs.pmen & TMROF_EN) && !(dev->regs.pmsts & TMROF_STS)); } @@ -145,7 +193,7 @@ acpi_reg_read_common_regs(int size, uint16_t addr, void *p) break; case 0x08: case 0x09: case 0x0a: case 0x0b: /* PMTMR - Power Management Timer Register (IO) */ - ret = (dev->regs.timer_val >> shift32) & 0xff; + ret = (acpi_timer_get(dev) >> shift32) & 0xff; #ifdef USE_DYNAREC if (cpu_use_dynarec) update_tsc(); @@ -1282,33 +1330,6 @@ acpi_update_aux_io_mapping(acpi_t *dev, uint32_t base, int chipset_en) } } - -static void -acpi_timer_count(void *priv) -{ - acpi_t *dev = (acpi_t *) priv; - int overflow; - uint32_t old; - - old = dev->regs.timer_val; - dev->regs.timer_val++; - - if (dev->regs.timer32) - overflow = (old ^ dev->regs.timer_val) & 0x80000000; - else { - dev->regs.timer_val &= 0x00ffffff; - overflow = (old ^ dev->regs.timer_val) & 0x00800000; - } - - if (overflow) { - dev->regs.pmsts |= TMROF_EN; - acpi_update_irq(dev); - } - - timer_advance_u64(&dev->timer, ACPICONST); -} - - static void acpi_timer_resume(void *priv) { @@ -1338,9 +1359,6 @@ void acpi_set_timer32(acpi_t *dev, uint8_t timer32) { dev->regs.timer32 = timer32; - - if (!dev->regs.timer32) - dev->regs.timer_val &= 0x00ffffff; } @@ -1524,9 +1542,12 @@ static void acpi_speed_changed(void *priv) { acpi_t *dev = (acpi_t *) priv; + cpu_to_acpi = ACPI_TIMER_FREQ / cpuclock; + bool timer_enabled = timer_is_enabled(&dev->timer); + timer_stop(&dev->timer); - timer_disable(&dev->timer); - timer_set_delay_u64(&dev->timer, ACPICONST); + if (timer_enabled) + timer_on_auto(&dev->timer, acpi_get_overflow_period(dev)); } @@ -1541,7 +1562,7 @@ acpi_close(void *priv) i2c_gpio_close(dev->i2c); } - timer_disable(&dev->timer); + timer_stop(&dev->timer); free(dev); } @@ -1556,6 +1577,7 @@ acpi_init(const device_t *info) if (dev == NULL) return(NULL); memset(dev, 0x00, sizeof(acpi_t)); + cpu_to_acpi = ACPI_TIMER_FREQ / cpuclock; dev->vendor = info->local; dev->irq_line = 9; @@ -1604,8 +1626,7 @@ acpi_init(const device_t *info) break; } - timer_add(&dev->timer, acpi_timer_count, dev, 0); - timer_set_delay_u64(&dev->timer, ACPICONST); + timer_add(&dev->timer, acpi_timer_overflow, dev, 0); timer_add(&dev->resume_timer, acpi_timer_resume, dev, 0); acpi_reset(dev); diff --git a/src/include/86box/acpi.h b/src/include/86box/acpi.h index 999909f1d..d12b45507 100644 --- a/src/include/86box/acpi.h +++ b/src/include/86box/acpi.h @@ -76,10 +76,9 @@ typedef struct devsts, glben, glbctl, devctl, padsts, paden, - gptren, gptimer, timer_val, + gptren, gptimer, gpo_val, gpi_val, extsmi_val, pad0; - uint64_t tmr_overflow_time; } acpi_regs_t; diff --git a/src/include/86box/pit.h b/src/include/86box/pit.h index c560fae12..e823794df 100644 --- a/src/include/86box/pit.h +++ b/src/include/86box/pit.h @@ -70,7 +70,7 @@ extern uint64_t PITCONST, ISACONST, HERCCONST, VGACONST1, VGACONST2, - RTCCONST, ACPICONST; + RTCCONST; extern int refresh_at_enable; diff --git a/src/pit.c b/src/pit.c index 28fc9b3c2..f19a1acf7 100644 --- a/src/pit.c +++ b/src/pit.c @@ -1039,7 +1039,6 @@ pit_set_clock(int clock) VGACONST1 = (uint64_t) (cpuclock / 25175000.0 * (double)(1ull << 32)); VGACONST2 = (uint64_t) (cpuclock / 28322000.0 * (double)(1ull << 32)); RTCCONST = (uint64_t) (cpuclock / 32768.0 * (double)(1ull << 32)); - ACPICONST = (uint64_t) (cpuclock / 3579545.0 * (double)(1ull << 32)); TIMER_USEC = (uint64_t)((cpuclock / 1000000.0) * (double)(1ull << 32)); From a8be5d1f188768bf7e09afc120a8a764345237e8 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Fri, 15 Jul 2022 20:39:06 -0300 Subject: [PATCH 023/386] Jenkins: Dummy commit to test new webhook flow --- .ci/Jenkinsfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.ci/Jenkinsfile b/.ci/Jenkinsfile index fbb7fd081..55c2c254e 100644 --- a/.ci/Jenkinsfile +++ b/.ci/Jenkinsfile @@ -137,7 +137,7 @@ def removeDir(dir) { def runBuild(args) { if (isUnix()) - return sh(returnStatus: true, script: "chmod u+x \"$WORKSPACE/.ci/build.sh\" && exec \"$WORKSPACE/.ci/build.sh\" $args") + return sh(returnStatus: true, script: "chmod u+x '$WORKSPACE/.ci/build.sh' && exec '$WORKSPACE/.ci/build.sh' $args") else return bat(returnStatus: true, script: "C:\\msys64\\msys2_shell.cmd -msys2 -defterm -here -no-start -c 'exec \"\$(cygpath -u \\'%WORKSPACE%\\')/.ci/build.sh\" $args'") } From e9af11d9d9c439e9e0af049aeaac46ce89f6fa37 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Fri, 15 Jul 2022 20:39:18 -0300 Subject: [PATCH 024/386] Jenkins: Second dummy commit to test new webhook flow --- .ci/Jenkinsfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.ci/Jenkinsfile b/.ci/Jenkinsfile index 55c2c254e..cb58e1fd8 100644 --- a/.ci/Jenkinsfile +++ b/.ci/Jenkinsfile @@ -130,7 +130,7 @@ def gitClone(repository, branch) { def removeDir(dir) { if (isUnix()) - return sh(returnStatus: true, script: "rm -rf \"$dir\"") + return sh(returnStatus: true, script: "rm -rf '$dir'") else return bat(returnStatus: true, script: "rd /s /q \"$dir\"") } From da5d45138684dcec616086a96a7b7e3c4ed536ba Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 02:45:46 +0200 Subject: [PATCH 025/386] Preparation for SMI# and NMI# changes. --- src/cpu/386.c | 3 --- src/cpu/386_common.c | 21 ++++++++++++++++++--- src/cpu/386_dynarec.c | 3 --- 3 files changed, 18 insertions(+), 9 deletions(-) diff --git a/src/cpu/386.c b/src/cpu/386.c index 2484cbb66..5f30e1199 100644 --- a/src/cpu/386.c +++ b/src/cpu/386.c @@ -210,9 +210,6 @@ exec386(int cycs) loadcs(readmemw(0, addr + 2)); } } else if (nmi && nmi_enable && nmi_mask) { - if (is486 && (cpu_fast_off_flags & 0x20000000)) - cpu_fast_off_count = cpu_fast_off_val + 1; - cpu_state.oldpc = cpu_state.pc; x86_int(2); nmi_enable = 0; diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c index 73a06f553..a88f892e1 100644 --- a/src/cpu/386_common.c +++ b/src/cpu/386_common.c @@ -1183,9 +1183,6 @@ enter_smm(int in_hlt) void enter_smm_check(int in_hlt) { - if (smi_line && (cpu_fast_off_flags & 0x80000000)) - cpu_fast_off_count = cpu_fast_off_val + 1; - if ((in_smm == 0) && smi_line) { #ifdef ENABLE_386_COMMON_LOG x386_common_log("SMI while not in SMM\n"); @@ -1840,6 +1837,24 @@ sysret(uint32_t fetchdat) } +void +raise_smi(void) +{ + if (is486 && (cpu_fast_off_flags & 0x80000000)) + cpu_fast_off_count = cpu_fast_off_val + 1; + + smi_line = 1; +} + + +void +raise_nmi(void) +{ + if (is486 && (cpu_fast_off_flags & 0x20000000)) + cpu_fast_off_count = cpu_fast_off_val + 1; +} + + #ifndef USE_DYNAREC /* This is for compatibility with new x87 code. */ void codegen_set_rounding_mode(int mode) diff --git a/src/cpu/386_dynarec.c b/src/cpu/386_dynarec.c index 46674fbc6..3e4d91ed2 100644 --- a/src/cpu/386_dynarec.c +++ b/src/cpu/386_dynarec.c @@ -819,9 +819,6 @@ exec386_dynarec(int cycs) if (smi_line) enter_smm_check(0); else if (nmi && nmi_enable && nmi_mask) { - if (is486 && (cpu_fast_off_flags & 0x20000000)) - cpu_fast_off_count = cpu_fast_off_val + 1; - #ifndef USE_NEW_DYNAREC oldcs = CS; #endif From 2c9bfa979ffb235e4f9cf858c1fb5776be823c13 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 02:47:39 +0200 Subject: [PATCH 026/386] ALi M1489 and a CPU fix. --- src/chipset/ali1489.c | 2 +- src/cpu/386_common.c | 4 ++-- src/cpu/cpu.h | 3 +++ 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/src/chipset/ali1489.c b/src/chipset/ali1489.c index 5ba53f34c..c8e07c657 100644 --- a/src/chipset/ali1489.c +++ b/src/chipset/ali1489.c @@ -319,7 +319,7 @@ ali1489_write(uint16_t addr, uint8_t val, void *priv) smi_line = 1; break; case 0x10: - nmi = 1; + nmi_raise(); break; case 0x20: picint(1 << 15); diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c index a88f892e1..1f5bfe3b5 100644 --- a/src/cpu/386_common.c +++ b/src/cpu/386_common.c @@ -1838,7 +1838,7 @@ sysret(uint32_t fetchdat) void -raise_smi(void) +smi_raise(void) { if (is486 && (cpu_fast_off_flags & 0x80000000)) cpu_fast_off_count = cpu_fast_off_val + 1; @@ -1848,7 +1848,7 @@ raise_smi(void) void -raise_nmi(void) +nmi_raise(void) { if (is486 && (cpu_fast_off_flags & 0x20000000)) cpu_fast_off_count = cpu_fast_off_val + 1; diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index c140cb7db..136a6c834 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -733,4 +733,7 @@ extern uint8_t do_translate, do_translate2; extern void reset_808x(int hard); +extern void smi_raise(); +extern void nmi_raise(); + #endif /*EMU_CPU_H*/ From 0cea9de7df0debeecdfc0473796e912578ce9fc4 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 02:48:59 +0200 Subject: [PATCH 027/386] VIA PIPC and ALi M1489 fix. --- src/chipset/ali1489.c | 2 ++ src/chipset/via_pipc.c | 4 +++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/src/chipset/ali1489.c b/src/chipset/ali1489.c index c8e07c657..9738baed3 100644 --- a/src/chipset/ali1489.c +++ b/src/chipset/ali1489.c @@ -197,7 +197,9 @@ ali1489_defaults(ali1489_t *dev) picintc(1 << 10); picintc(1 << 15); +#ifdef OLD_NMI_BEHAVIOR nmi = 0; +#endif smi_line = 0; in_smm = 0; diff --git a/src/chipset/via_pipc.c b/src/chipset/via_pipc.c index 076328a00..a415daa6f 100644 --- a/src/chipset/via_pipc.c +++ b/src/chipset/via_pipc.c @@ -728,8 +728,10 @@ pipc_fmnmi_read(uint16_t addr, void *priv) if (dev->ac97_regs[0][0x48] & 0x01) { if (dev->ac97_regs[0][0x48] & 0x04) smi_line = 0; +#ifdef OLD_NMI_BEHAVIOR else nmi = 0; +#endif } #endif @@ -790,7 +792,7 @@ pipc_fm_write(uint16_t addr, uint8_t val, void *priv) if (dev->ac97_regs[0][0x48] & 0x04) smi_line = 1; else - nmi = 1; + nmi_raise(); } } #else From 22a856634c398d7f1b38982343d5d33a1327e638 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 02:50:53 +0200 Subject: [PATCH 028/386] Amstrad. --- src/machine/m_amstrad.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/src/machine/m_amstrad.c b/src/machine/m_amstrad.c index 27244189d..cac5a29d2 100644 --- a/src/machine/m_amstrad.c +++ b/src/machine/m_amstrad.c @@ -1068,7 +1068,9 @@ vid_in_200(uint16_t addr, void *priv) case 0x03dd: ret = vid->crtc_index; /* Read NMI reason */ vid->crtc_index &= 0x1f; /* Reset NMI reason */ +#ifdef OLD_NMI_BEHAVIOR nmi = 0; /* And reset NMI flag */ +#endif return(ret); case 0x03de: @@ -1106,7 +1108,7 @@ vid_out_200(uint16_t addr, uint8_t val, void *priv) if (!(vid->operation_ctrl & 0x40) && mda->crtcreg <= 11) { vid->crtc_index = 0x20 | (mda->crtcreg & 0x1f); if (vid->operation_ctrl & 0x80) - nmi = 1; + nmi_raise(); vid->reg_3df = val; return; } @@ -1127,7 +1129,7 @@ vid_out_200(uint16_t addr, uint8_t val, void *priv) vid->crtc_index &= 0x1F; vid->crtc_index |= 0x80; if (vid->operation_ctrl & 0x80) - nmi = 1; + nmi_raise(); return; /* CGA writes ============================================================== */ @@ -1138,7 +1140,7 @@ vid_out_200(uint16_t addr, uint8_t val, void *priv) if (!(vid->operation_ctrl & 0x40) && cga->crtcreg <= 11) { vid->crtc_index = 0x20 | (cga->crtcreg & 0x1f); if (vid->operation_ctrl & 0x80) - nmi = 1; + nmi_raise(); vid->reg_3df = val; return; } @@ -1160,7 +1162,7 @@ vid_out_200(uint16_t addr, uint8_t val, void *priv) vid->crtc_index &= 0x1f; vid->crtc_index |= 0x80; if (vid->operation_ctrl & 0x80) - nmi = 1; + nmi_raise(); else set_lcd_cols(val); return; @@ -1174,7 +1176,7 @@ vid_out_200(uint16_t addr, uint8_t val, void *priv) if (val & 0x80) { vid->operation_ctrl = val; vid->crtc_index |= 0x40; - nmi = 1; + nmi_raise(); return; } timer_disable(&vid->cga.timer); From 49f4b2c8fb2c263f6863d27e0d2497c28134859b Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 02:52:50 +0200 Subject: [PATCH 029/386] AudioPCI and GUS. --- src/sound/snd_audiopci.c | 4 +++- src/sound/snd_gus.c | 12 +++++++++--- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/src/sound/snd_audiopci.c b/src/sound/snd_audiopci.c index 251fda72f..fe00038c7 100644 --- a/src/sound/snd_audiopci.c +++ b/src/sound/snd_audiopci.c @@ -306,7 +306,9 @@ es1371_reset(void *p) es1371_t *dev = (es1371_t *) p; int i; +#ifdef OLD_NMI_BEHAVIOR nmi = 0; +#endif /* Interrupt/Chip Select Control Register, Address 00H Addressable as byte, word, longword */ @@ -1240,7 +1242,7 @@ capture_event(es1371_t *dev, int type, int rw, uint16_t port) dev->legacy_ctrl &= ~LEGACY_EVENT_TYPE_RW; dev->legacy_ctrl |= ((port << LEGACY_EVENT_ADDR_SHIFT) & LEGACY_EVENT_ADDR_MASK); dev->legacy_ctrl &= ~LEGACY_INT; - nmi = 1; + nmi_raise(); } static void diff --git a/src/sound/snd_gus.c b/src/sound/snd_gus.c index 293be8915..2bef7edac 100644 --- a/src/sound/snd_gus.c +++ b/src/sound/snd_gus.c @@ -452,11 +452,15 @@ writegus(uint16_t addr, uint8_t val, void *p) gus->irqstatus &= ~8; if (!(val & 0x20)) { gus->ad_status &= ~0x18; +#ifdef OLD_NMI_BEHAVIOR nmi = 0; +#endif } if (!(val & 0x02)) { gus->ad_status &= ~0x01; +#ifdef OLD_NMI_BEHAVIOR nmi = 0; +#endif } gus->tctrl = val; gus->sb_ctrl = val; @@ -492,7 +496,7 @@ writegus(uint16_t addr, uint8_t val, void *p) gus->ad_status |= 0x01; if (gus->sb_ctrl & 0x02) { if (gus->sb_nmi) - nmi = 1; + nmi_raise(); else if (gus->irq != -1) picint(1 << gus->irq); } @@ -568,7 +572,7 @@ writegus(uint16_t addr, uint8_t val, void *p) gus->ad_status |= 0x08; if (gus->sb_ctrl & 0x20) { if (gus->sb_nmi) - nmi = 1; + nmi_raise(); else if (gus->irq != -1) picint(1 << gus->irq); } @@ -580,7 +584,7 @@ writegus(uint16_t addr, uint8_t val, void *p) gus->ad_status |= 0x10; if (gus->sb_ctrl & 0x20) { if (gus->sb_nmi) - nmi = 1; + nmi_raise(); else if (gus->irq != -1) picint(1 << gus->irq); } @@ -832,7 +836,9 @@ readgus(uint16_t addr, void *p) case 0x209: gus->ad_status &= ~0x01; +#ifdef OLD_NMI_BEHAVIOR nmi = 0; +#endif /*FALLTHROUGH*/ case 0x389: val = gus->ad_data; From d12b8b8c30a3c25539f5f09a44c8351c8004a0ea Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 02:53:26 +0200 Subject: [PATCH 030/386] Sigma. --- src/video/vid_sigma.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/video/vid_sigma.c b/src/video/vid_sigma.c index 9c5474de9..e340a7c52 100644 --- a/src/video/vid_sigma.c +++ b/src/video/vid_sigma.c @@ -208,7 +208,7 @@ sigma_out(uint16_t addr, uint8_t val, void *p) /* If set to NMI on video I/O... */ if (sigma->enable_nmi && (sigma->sigma_ctl & CTL_NMI)) { sigma->lastport |= 0x80; /* Card raised NMI */ - nmi = 1; + nmi_raise(); } /* For CRTC emulation, the card BIOS sets the value to be * read from port 0x3D1 like this */ @@ -245,7 +245,9 @@ sigma_out(uint16_t addr, uint8_t val, void *p) sigma->lastport &= 0x7F; return; case 0x2DC: /* Reset NMI */ +#idef OLD_NMI_BEHAVIOR nmi = 0; +#endif sigma->lastport &= 0x7F; return; case 0x2DD: /* Page in RAM at 0xC1800 */ From d68121ae898ae0d9d168d250efc5f77f04248242 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 02:54:49 +0200 Subject: [PATCH 031/386] ACPI, APM, PIC, and USB. --- src/acpi.c | 8 ++++---- src/apm.c | 2 +- src/pic.c | 2 +- src/usb.c | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/src/acpi.c b/src/acpi.c index c73440fa5..470e24c41 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -144,12 +144,12 @@ acpi_raise_smi(void *priv, int do_smi) if ((dev->vendor == VEN_VIA) || (dev->vendor == VEN_VIA_596B)) { if ((!dev->regs.smi_lock || !dev->regs.smi_active)) { if (do_smi) - smi_line = 1; + smi_raise(); dev->regs.smi_active = 1; } } else if ((dev->vendor == VEN_INTEL) || (dev->vendor == VEN_ALI)) { if (do_smi) - smi_line = 1; + smi_raise(); /* Clear bit 16 of GLBCTL. */ if (dev->vendor == VEN_INTEL) dev->regs.glbctl &= ~0x00010000; @@ -157,7 +157,7 @@ acpi_raise_smi(void *priv, int do_smi) dev->regs.ali_soft_smi = 1; } else if (dev->vendor == VEN_SMC) { if (do_smi) - smi_line = 1; + smi_raise(); } } } @@ -1449,7 +1449,7 @@ acpi_apm_out(uint16_t port, uint8_t val, void *p) dev->apm->cmd = val; // acpi_raise_smi(dev, dev->apm->do_smi); if (dev->apm->do_smi) - smi_line = 1; + smi_raise(); dev->regs.ali_soft_smi = 1; } else if (port == 0x0003) dev->apm->stat = val; diff --git a/src/apm.c b/src/apm.c index 9bee70e78..3fe8d54c6 100644 --- a/src/apm.c +++ b/src/apm.c @@ -67,7 +67,7 @@ apm_out(uint16_t port, uint8_t val, void *p) if (port == 0x0000) { dev->cmd = val; if (dev->do_smi) - smi_line = 1; + smi_raise(); } else dev->stat = val; } diff --git a/src/pic.c b/src/pic.c index efe81f470..23f99945e 100644 --- a/src/pic.c +++ b/src/pic.c @@ -608,7 +608,7 @@ picint_common(uint16_t num, int level, int set) if (set) { if (smi_irq_mask & num) { - smi_line = 1; + smi_raise(); smi_irq_status |= num; } diff --git a/src/usb.c b/src/usb.c index 2f8f957b5..c70fc2d63 100644 --- a/src/usb.c +++ b/src/usb.c @@ -173,7 +173,7 @@ ohci_mmio_write(uint32_t addr, uint8_t val, void *p) if (val & 0x08) { dev->ohci_mmio[0x0f] = 0x40; if ((dev->ohci_mmio[0x13] & 0xc0) == 0xc0) - smi_line = 1; + smi_raise(); } /* bit HostControllerReset must be cleared for the controller to be seen as initialized */ From f6fef765d71cecda7362d9d85bf7d917f78465d3 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 02:58:37 +0200 Subject: [PATCH 032/386] Chipsets. --- src/chipset/ali1489.c | 2 +- src/chipset/contaq_82c59x.c | 2 +- src/chipset/ims8848.c | 2 +- src/chipset/intel_420ex.c | 2 +- src/chipset/intel_piix.c | 2 +- src/chipset/intel_sio.c | 2 +- src/chipset/opti895.c | 2 +- src/chipset/sis_5511.c | 2 +- src/chipset/sis_5571.c | 2 +- src/chipset/sis_85c496.c | 2 +- src/chipset/sis_85c4xx.c | 2 +- src/chipset/sis_85c50x.c | 2 +- src/chipset/umc_8886.c | 2 +- src/chipset/via_pipc.c | 2 +- src/chipset/via_vt82c49x.c | 2 +- 15 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src/chipset/ali1489.c b/src/chipset/ali1489.c index 9738baed3..921c7d082 100644 --- a/src/chipset/ali1489.c +++ b/src/chipset/ali1489.c @@ -318,7 +318,7 @@ ali1489_write(uint16_t addr, uint8_t val, void *priv) if (((val & 0x14) == 0x14) && !(old & 0x08) && (val & 0x08)) { switch (dev->regs[0x35] & 0x30) { case 0x00: - smi_line = 1; + smi_raise(); break; case 0x10: nmi_raise(); diff --git a/src/chipset/contaq_82c59x.c b/src/chipset/contaq_82c59x.c index 6763202d0..97c8716eb 100644 --- a/src/chipset/contaq_82c59x.c +++ b/src/chipset/contaq_82c59x.c @@ -242,7 +242,7 @@ contaq_82c59x_write(uint16_t addr, uint8_t val, void *priv) dev->regs[dev->index] = val; if (val & 0x80) { if (dev->regs[0x65] & 0x80) - smi_line = 1; + smi_raise(); dev->smi_status[0] |= 0x10; } break; diff --git a/src/chipset/ims8848.c b/src/chipset/ims8848.c index 10e87b530..35b1ef62b 100644 --- a/src/chipset/ims8848.c +++ b/src/chipset/ims8848.c @@ -230,7 +230,7 @@ ims8848_write(uint16_t addr, uint8_t val, void *priv) if (dev->idx == 0x1b) { ims8848_smram(dev); if (!(old & 0x10) && (val & 0x10)) - smi_line = 1; + smi_raise(); } else if (dev->idx == 0x1c) pci_set_irq_routing(PCI_INTA, (val >> 4) ? (val >> 4) : PCI_IRQ_DISABLED); break; diff --git a/src/chipset/intel_420ex.c b/src/chipset/intel_420ex.c index 187e6f636..8c8603efc 100644 --- a/src/chipset/intel_420ex.c +++ b/src/chipset/intel_420ex.c @@ -423,7 +423,7 @@ i420ex_fast_off_count(void *priv) cpu_fast_off_count--; if (cpu_fast_off_count == 0) { - smi_line = 1; + smi_raise(); dev->regs[0xaa] |= 0x20; cpu_fast_off_count = dev->regs[0xa8] + 1; } diff --git a/src/chipset/intel_piix.c b/src/chipset/intel_piix.c index 025862c44..55002405f 100644 --- a/src/chipset/intel_piix.c +++ b/src/chipset/intel_piix.c @@ -1334,7 +1334,7 @@ piix_fast_off_count(void *priv) cpu_fast_off_count--; if (cpu_fast_off_count == 0) { - smi_line = 1; + smi_raise(); dev->regs[0][0xaa] |= 0x20; cpu_fast_off_count = dev->regs[0][0xa8] + 1; } diff --git a/src/chipset/intel_sio.c b/src/chipset/intel_sio.c index ab535cb65..75aef516c 100644 --- a/src/chipset/intel_sio.c +++ b/src/chipset/intel_sio.c @@ -432,7 +432,7 @@ sio_fast_off_count(void *priv) cpu_fast_off_count--; if (cpu_fast_off_count == 0) { - smi_line = 1; + smi_raise(); dev->regs[0xaa] |= 0x20; cpu_fast_off_count = dev->regs[0xa8] + 1; } diff --git a/src/chipset/opti895.c b/src/chipset/opti895.c index 8efddb96d..9eb360e02 100644 --- a/src/chipset/opti895.c +++ b/src/chipset/opti895.c @@ -175,7 +175,7 @@ opti895_write(uint16_t addr, uint8_t val, void *priv) case 0xe1: if ((val & 0x08) && (dev->regs[0xe0] & 0x01)) { - smi_line = 1; + smi_raise(); dev->forced_green = 1; break; } diff --git a/src/chipset/sis_5511.c b/src/chipset/sis_5511.c index 63950d47a..d0900629d 100644 --- a/src/chipset/sis_5511.c +++ b/src/chipset/sis_5511.c @@ -225,7 +225,7 @@ sis_5511_write(int func, int addr, uint8_t val, void *priv) case 0x60: dev->pci_conf[addr] = val & 0x3e; if ((dev->pci_conf[0x68] & 1) && (val & 2)) { - smi_line = 1; + smi_raise(); dev->pci_conf[0x69] |= 1; } break; diff --git a/src/chipset/sis_5571.c b/src/chipset/sis_5571.c index 3f678d87b..2d9d92c8d 100644 --- a/src/chipset/sis_5571.c +++ b/src/chipset/sis_5571.c @@ -288,7 +288,7 @@ memory_pci_bridge_write(int func, int addr, uint8_t val, void *priv) if ((dev->pci_conf[0x9b] & 1) && !!(val & 2)) { - smi_line = 1; + smi_raise(); dev->pci_conf[0x9d] |= 1; } break; diff --git a/src/chipset/sis_85c496.c b/src/chipset/sis_85c496.c index b900d4443..36d1f2030 100644 --- a/src/chipset/sis_85c496.c +++ b/src/chipset/sis_85c496.c @@ -390,7 +390,7 @@ sis_85c49x_pci_write(int func, int addr, uint8_t val, void *priv) if (dev->pci_conf[0x80] & 0x10) picint(1 << smm_irq[dev->pci_conf[0x81] & 0x03]); else - smi_line = 1; + smi_raise(); smi_block = 1; dev->pci_conf[0xa0] |= 0x10; } diff --git a/src/chipset/sis_85c4xx.c b/src/chipset/sis_85c4xx.c index b705eb32e..508f653e2 100644 --- a/src/chipset/sis_85c4xx.c +++ b/src/chipset/sis_85c4xx.c @@ -104,7 +104,7 @@ sis_85c4xx_sw_smi_out(uint16_t port, uint8_t val, void *priv) if (dev->regs[0x18] & 0x02) { if (dev->regs[0x0b] & 0x10) - smi_line = 1; + smi_raise(); else picint(1 << ((dev->regs[0x0b] & 0x08) ? 15 : 12)); soft_reset_mask = 1; diff --git a/src/chipset/sis_85c50x.c b/src/chipset/sis_85c50x.c index 9d5dddebd..1c46074b1 100644 --- a/src/chipset/sis_85c50x.c +++ b/src/chipset/sis_85c50x.c @@ -176,7 +176,7 @@ sis_85c50x_write(int func, int addr, uint8_t val, void *priv) case 0x60: /* SMI */ if ((dev->pci_conf[0x68] & 0x01) && !(dev->pci_conf[addr] & 0x02) && (val & 0x02)) { dev->pci_conf[0x69] |= 0x01; - smi_line = 1; + smi_raise(); } dev->pci_conf[addr] = val & 0x3e; break; diff --git a/src/chipset/umc_8886.c b/src/chipset/umc_8886.c index 72dc8778b..ba11ba829 100644 --- a/src/chipset/umc_8886.c +++ b/src/chipset/umc_8886.c @@ -232,7 +232,7 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv) if (dev->pci_conf_sb[0][0x46] & 0x40) picint(1 << ((dev->pci_conf_sb[0][0x46] & 0x80) ? 15 : 10)); else - smi_line = 1; + smi_raise(); dev->pci_conf_sb[0][0xa3] |= 0x04; } diff --git a/src/chipset/via_pipc.c b/src/chipset/via_pipc.c index a415daa6f..720ad7561 100644 --- a/src/chipset/via_pipc.c +++ b/src/chipset/via_pipc.c @@ -790,7 +790,7 @@ pipc_fm_write(uint16_t addr, uint8_t val, void *priv) /* Fire NMI/SMI if enabled. */ if (dev->ac97_regs[0][0x48] & 0x01) { if (dev->ac97_regs[0][0x48] & 0x04) - smi_line = 1; + smi_raise(); else nmi_raise(); } diff --git a/src/chipset/via_vt82c49x.c b/src/chipset/via_vt82c49x.c index 7efa76d01..f951741e7 100644 --- a/src/chipset/via_vt82c49x.c +++ b/src/chipset/via_vt82c49x.c @@ -234,7 +234,7 @@ vt82c49x_write(uint16_t addr, uint8_t val, void *priv) case 0x54: if ((dev->regs[0x5b] & 0x80) && (valxor & 0x01) && (val & 0x01)) { if (dev->regs[0x5b] & 0x20) - smi_line = 1; + smi_raise(); else picint(1 << 15); dev->regs[0x55] = 0x01; From e83d1e7ea376383573028111beb6dc03abdcb2c6 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 02:59:15 +0200 Subject: [PATCH 033/386] OPTi 611. --- src/disk/hdc_ide_opti611.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/disk/hdc_ide_opti611.c b/src/disk/hdc_ide_opti611.c index 2cbf8e1a2..9a6bd9cd4 100644 --- a/src/disk/hdc_ide_opti611.c +++ b/src/disk/hdc_ide_opti611.c @@ -152,7 +152,7 @@ opti611_ide_write(uint16_t addr, uint8_t val, void *priv) uint8_t smibe = (addr & 0x0003); if (dev->regs[0x03] & 0x02) { - smi_line = 1; + smi_raise(); dev->regs[0x02] = smia9 | smia2 | smibe; dev->regs[0x04] = val; } @@ -169,7 +169,7 @@ opti611_ide_writew(uint16_t addr, uint16_t val, void *priv) uint8_t smibe = (addr & 0x0002) | 0x0001; if (dev->regs[0x03] & 0x02) { - smi_line = 1; + smi_raise(); dev->regs[0x02] = smia9 | smia2 | smibe; dev->regs[0x04] = 0x00; } @@ -185,7 +185,7 @@ opti611_ide_writel(uint16_t addr, uint32_t val, void *priv) uint8_t smia2 = (!!(addr & 0x0004)) << 4; if (dev->regs[0x03] & 0x02) { - smi_line = 1; + smi_raise(); dev->regs[0x02] = smia9 | smia2 | 0x0003; dev->regs[0x04] = 0x00; } @@ -202,7 +202,7 @@ opti611_ide_read(uint16_t addr, void *priv) uint8_t smibe = (addr & 0x0003); if (dev->regs[0x03] & 0x02) { - smi_line = 1; + smi_raise(); dev->regs[0x02] = smia9 | smia2 | smibe; dev->regs[0x04] = 0x00; } @@ -229,7 +229,7 @@ opti611_ide_readw(uint16_t addr, void *priv) } if (dev->regs[0x03] & 0x02) { - smi_line = 1; + smi_raise(); dev->regs[0x02] = smia9 | smia2 | smibe; dev->regs[0x04] = 0x00; } @@ -247,7 +247,7 @@ opti611_ide_readl(uint16_t addr, void *priv) uint8_t smia2 = (!!(addr & 0x0004)) << 4; if (dev->regs[0x03] & 0x02) { - smi_line = 1; + smi_raise(); dev->regs[0x02] = smia9 | smia2 | 0x0003; dev->regs[0x04] = 0x00; } From 2fd712d092465aaae7c25ec8734a75e8af87c470 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 03:12:24 +0200 Subject: [PATCH 034/386] CPU changes. --- src/cpu/386_common.c | 34 ++++++++++++++++++++++++++++++++-- src/cpu/cpu.h | 4 ++++ 2 files changed, 36 insertions(+), 2 deletions(-) diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c index 1f5bfe3b5..d7544b351 100644 --- a/src/cpu/386_common.c +++ b/src/cpu/386_common.c @@ -22,6 +22,7 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/keyboard.h> +#include <86box/timer.h> #include "386_common.h" #include "x86_flags.h" #include "x86seg.h" @@ -71,6 +72,9 @@ int smm_in_hlt = 0, smi_block = 0; uint32_t addr64, addr64_2; uint32_t addr64a[8], addr64a_2[8]; +static timer_t *cpu_fast_off_timer = NULL; +static double *cpu_fast_off_period = NULL; + #define AMD_SYSCALL_EIP (msr.star & 0xFFFFFFFF) #define AMD_SYSCALL_SB ((msr.star >> 32) & 0xFFFF) @@ -1837,11 +1841,37 @@ sysret(uint32_t fetchdat) } +void +cpu_register_fast_off_handler(void *timer, double *period) +{ + cpu_fast_off_timer = (timer_t *) timer; + cpu_fast_off_period = period; +} + + +void +cpu_fast_off_advance(void) +{ + if (cpu_fast_off_period && (*cpu_fast_off_period != 0.0)) + timer_on_auto(cpu_fast_off_timer, *cpu_fast_off_period); +} + + +void +cpu_fast_off_period_set(uint16_t val, double period) +{ + if (cpu_fast_off_period) { + *cpu_fast_off_period = ((double) (val + 1)) * period; + cpu_fast_off_advance(); + } +} + + void smi_raise(void) { if (is486 && (cpu_fast_off_flags & 0x80000000)) - cpu_fast_off_count = cpu_fast_off_val + 1; + cpu_fast_off_advance(); smi_line = 1; } @@ -1851,7 +1881,7 @@ void nmi_raise(void) { if (is486 && (cpu_fast_off_flags & 0x20000000)) - cpu_fast_off_count = cpu_fast_off_val + 1; + cpu_fast_off_advance(); } diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index 136a6c834..61fd700d9 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -733,6 +733,10 @@ extern uint8_t do_translate, do_translate2; extern void reset_808x(int hard); +extern void cpu_register_fast_off_handler(void *timer, double *period); +extern void cpu_fast_off_advance(void); +extern void cpu_fast_off_period_set(uint16_t vla, double period); + extern void smi_raise(); extern void nmi_raise(); From c58360df3e3bf779ec47325c15000c62a70c3188 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 03:21:09 +0200 Subject: [PATCH 035/386] Chipsets. --- src/chipset/intel_420ex.c | 21 +++++++-------------- src/chipset/intel_piix.c | 24 +++++++----------------- src/chipset/intel_sio.c | 23 +++++++---------------- 3 files changed, 21 insertions(+), 47 deletions(-) diff --git a/src/chipset/intel_420ex.c b/src/chipset/intel_420ex.c index 8c8603efc..1590bc34c 100644 --- a/src/chipset/intel_420ex.c +++ b/src/chipset/intel_420ex.c @@ -316,10 +316,8 @@ i420ex_write(int func, int addr, uint8_t val, void *priv) dev->fast_off_period = PCICLK * 32768.0; break; } - cpu_fast_off_count = dev->regs[0xa8] + 1; - timer_disable(&dev->fast_off_timer); - if (dev->fast_off_period != 0.0) - timer_on_auto(&dev->fast_off_timer, dev->fast_off_period); + cpu_fast_off_count = cpu_fast_off_val + 1; + cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); break; case 0xa2: dev->regs[addr] = val & 0xff; @@ -347,9 +345,7 @@ i420ex_write(int func, int addr, uint8_t val, void *priv) dev->regs[addr] = val & 0xff; cpu_fast_off_val = val; cpu_fast_off_count = val + 1; - timer_disable(&dev->fast_off_timer); - if (dev->fast_off_period != 0.0) - timer_on_auto(&dev->fast_off_timer, dev->fast_off_period); + cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); break; } } @@ -422,13 +418,8 @@ i420ex_fast_off_count(void *priv) cpu_fast_off_count--; - if (cpu_fast_off_count == 0) { - smi_raise(); - dev->regs[0xaa] |= 0x20; - cpu_fast_off_count = dev->regs[0xa8] + 1; - } - - timer_on_auto(&dev->fast_off_timer, dev->fast_off_period); + smi_raise(); + dev->regs[0xaa] |= 0x20; } @@ -513,6 +504,8 @@ i420ex_init(const device_t *info) cpu_fast_off_val = dev->regs[0xa8]; cpu_fast_off_count = cpu_fast_off_val + 1; + cpu_register_fast_off_handler(&dev->fast_off_timer); + dev->apm = device_add(&apm_pci_device); /* APM intercept handler to update 82420EX SMI status on APM SMI. */ io_sethandler(0x00b2, 0x0001, NULL, NULL, NULL, i420ex_apm_out, NULL, NULL, dev); diff --git a/src/chipset/intel_piix.c b/src/chipset/intel_piix.c index 55002405f..c0f28914b 100644 --- a/src/chipset/intel_piix.c +++ b/src/chipset/intel_piix.c @@ -628,10 +628,8 @@ piix_write(int func, int addr, uint8_t val, void *priv) dev->fast_off_period = PCICLK * 32768.0; break; } - cpu_fast_off_count = fregs[0xa8] + 1; - timer_disable(&dev->fast_off_timer); - if (dev->fast_off_period != 0.0) - timer_on_auto(&dev->fast_off_timer, dev->fast_off_period); + cpu_fast_off_count = cpu_fast_off_val + 1; + cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); } break; case 0xa2: @@ -679,9 +677,7 @@ piix_write(int func, int addr, uint8_t val, void *priv) fregs[addr] = val & 0xff; cpu_fast_off_val = val; cpu_fast_off_count = val + 1; - timer_disable(&dev->fast_off_timer); - if (dev->fast_off_period != 0.0) - timer_on_auto(&dev->fast_off_timer, dev->fast_off_period); + cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); } break; case 0xaa: @@ -1331,15 +1327,8 @@ piix_fast_off_count(void *priv) { piix_t *dev = (piix_t *) priv; - cpu_fast_off_count--; - - if (cpu_fast_off_count == 0) { - smi_raise(); - dev->regs[0][0xaa] |= 0x20; - cpu_fast_off_count = dev->regs[0][0xa8] + 1; - } - - timer_on_auto(&dev->fast_off_timer, dev->fast_off_period); + smi_raise(); + dev->regs[0][0xaa] |= 0x20; } @@ -1446,7 +1435,7 @@ piix_speed_changed(void *priv) timer_stop(&dev->fast_off_timer); if (te) - timer_on_auto(&dev->fast_off_timer, dev->fast_off_period); + timer_on_auto(&dev->fast_off_timer, ((double) cpu_fast_off_val + 1) * dev->fast_off_period); } @@ -1510,6 +1499,7 @@ static void if (dev->type < 4) { cpu_fast_off_val = dev->regs[0][0xa8]; cpu_fast_off_count = cpu_fast_off_val + 1; + cpu_fast_off_register(&dev->fast_off_timer); } else cpu_fast_off_val = cpu_fast_off_count = 0; diff --git a/src/chipset/intel_sio.c b/src/chipset/intel_sio.c index 75aef516c..8c75e88c2 100644 --- a/src/chipset/intel_sio.c +++ b/src/chipset/intel_sio.c @@ -264,10 +264,8 @@ sio_write(int func, int addr, uint8_t val, void *priv) dev->fast_off_period = PCICLK * 32768.0; break; } - cpu_fast_off_count = dev->regs[0xa8] + 1; - timer_disable(&dev->fast_off_timer); - if (dev->fast_off_period != 0.0) - timer_on_auto(&dev->fast_off_timer, dev->fast_off_period); + cpu_fast_off_count = cpu_fast_off_val + 1; + cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); } break; case 0xa2: @@ -306,9 +304,7 @@ sio_write(int func, int addr, uint8_t val, void *priv) dev->regs[addr] = val & 0xff; cpu_fast_off_val = val; cpu_fast_off_count = val + 1; - timer_disable(&dev->fast_off_timer); - if (dev->fast_off_period != 0.0) - timer_on_auto(&dev->fast_off_timer, dev->fast_off_period); + cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); break; } } @@ -429,15 +425,8 @@ sio_fast_off_count(void *priv) { sio_t *dev = (sio_t *) priv; - cpu_fast_off_count--; - - if (cpu_fast_off_count == 0) { - smi_raise(); - dev->regs[0xaa] |= 0x20; - cpu_fast_off_count = dev->regs[0xa8] + 1; - } - - timer_on_auto(&dev->fast_off_timer, dev->fast_off_period); + smi_raise(); + dev->regs[0xaa] |= 0x20; } @@ -513,6 +502,8 @@ sio_init(const device_t *info) if (dev->id == 0x03) { cpu_fast_off_val = dev->regs[0xa8]; cpu_fast_off_count = cpu_fast_off_val + 1; + + cpu_fast_off_register(&dev->fast_off_timer); } else cpu_fast_off_val = cpu_fast_off_count = 0; From a35c4aa67466e464c7ad9bc834c583f473a3fd2e Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 03:21:21 +0200 Subject: [PATCH 036/386] CPU changes. --- src/cpu/386_common.c | 25 ++++++++++++++++--------- src/cpu/cpu.h | 3 ++- 2 files changed, 18 insertions(+), 10 deletions(-) diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c index d7544b351..aa5a813b8 100644 --- a/src/cpu/386_common.c +++ b/src/cpu/386_common.c @@ -73,7 +73,7 @@ uint32_t addr64, addr64_2; uint32_t addr64a[8], addr64a_2[8]; static timer_t *cpu_fast_off_timer = NULL; -static double *cpu_fast_off_period = NULL; +static double cpu_fast_off_period = 0.0; #define AMD_SYSCALL_EIP (msr.star & 0xFFFFFFFF) @@ -1842,28 +1842,35 @@ sysret(uint32_t fetchdat) void -cpu_register_fast_off_handler(void *timer, double *period) +cpu_register_fast_off_handler(void *timer) { cpu_fast_off_timer = (timer_t *) timer; - cpu_fast_off_period = period; } void cpu_fast_off_advance(void) { - if (cpu_fast_off_period && (*cpu_fast_off_period != 0.0)) - timer_on_auto(cpu_fast_off_timer, *cpu_fast_off_period); + timer_disable(cpu_fast_off_timer); + if (cpu_fast_off_period != 0.0) + timer_on_auto(cpu_fast_off_timer, cpu_fast_off_period); } void cpu_fast_off_period_set(uint16_t val, double period) { - if (cpu_fast_off_period) { - *cpu_fast_off_period = ((double) (val + 1)) * period; - cpu_fast_off_advance(); - } + cpu_fast_off_period = ((double) (val + 1)) * period; + cpu_fast_off_advance(); +} + + +void +cpu_fast_off_reset(void) +{ + cpu_register_fast_off_handler(NULL); + cpu_fast_off_period = 0.0; + cpu_fast_off_advance(); } diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index 61fd700d9..6d66e1531 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -733,9 +733,10 @@ extern uint8_t do_translate, do_translate2; extern void reset_808x(int hard); -extern void cpu_register_fast_off_handler(void *timer, double *period); +extern void cpu_register_fast_off_handler(void *timer); extern void cpu_fast_off_advance(void); extern void cpu_fast_off_period_set(uint16_t vla, double period); +extern void cpu_fast_off_reset(void); extern void smi_raise(); extern void nmi_raise(); From f4ba136b976026f8bfee17366fe2b922619e79a5 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 03:22:28 +0200 Subject: [PATCH 037/386] Machine. --- src/machine/machine.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/machine/machine.c b/src/machine/machine.c index 1549ce7c6..00516d8fb 100644 --- a/src/machine/machine.c +++ b/src/machine/machine.c @@ -105,6 +105,9 @@ machine_init_ex(int m) /* Reset any ISA memory cards. */ isamem_reset(); + + /* Reset the fast off stuff. */ + cpu_fast_off_reset(); } /* All good, boot the machine! */ From 27713f6557c99835be544719550aa68cd2fdbaa3 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 03:22:41 +0200 Subject: [PATCH 038/386] More CPU. --- src/cpu/386_common.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c index aa5a813b8..bef9aa59a 100644 --- a/src/cpu/386_common.c +++ b/src/cpu/386_common.c @@ -1868,6 +1868,9 @@ cpu_fast_off_period_set(uint16_t val, double period) void cpu_fast_off_reset(void) { + if (cpu-fast_off_timer) + timer_disable(cpu_fast_off_timer); + cpu_register_fast_off_handler(NULL); cpu_fast_off_period = 0.0; cpu_fast_off_advance(); From 231afcbe11d3c66252a48e439d6f7070ba564009 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 03:23:21 +0200 Subject: [PATCH 039/386] PIC. --- src/pic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/pic.c b/src/pic.c index 23f99945e..13c13d6df 100644 --- a/src/pic.c +++ b/src/pic.c @@ -223,7 +223,7 @@ find_best_interrupt(pic_t *dev) intr += 8; if (cpu_fast_off_flags & (1u << intr)) - cpu_fast_off_count = cpu_fast_off_val + 1; + cpu_fast_off_advance(); } return ret; From b97338144e253fc4c2cfe17d484e730077fabe82 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Fri, 15 Jul 2022 22:59:49 -0300 Subject: [PATCH 040/386] Jenkins: Allow macOS to make source tarballs --- .ci/Jenkinsfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.ci/Jenkinsfile b/.ci/Jenkinsfile index cb58e1fd8..b0c865083 100644 --- a/.ci/Jenkinsfile +++ b/.ci/Jenkinsfile @@ -215,7 +215,7 @@ pipeline { /* Create source tarball. */ try { retry(10) { - node('Linux') { + node('Linux || macOS') { /* Run git clone. */ gitClone(repository[buildBranch], branch[buildBranch]) From a1744ddbd209c54bce97deb62e86a4bc617d38e6 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Fri, 15 Jul 2022 23:04:36 -0300 Subject: [PATCH 041/386] Jenkins: Install and use gnutar on macOS for source tarballs --- .ci/build.sh | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/.ci/build.sh b/.ci/build.sh index eeb22c9c2..da4169516 100644 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -52,8 +52,20 @@ make_tar() { # Install dependencies. if ! which tar xz > /dev/null 2>&1 then - which apt-get > /dev/null 2>&1 && DEBIAN_FRONTEND=noninteractive sudo apt-get install -y tar xz-utils + if which apt-get > /dev/null 2>&1 + then + sudo apt-get update + DEBIAN_FRONTEND=noninteractive sudo apt-get install -y tar xz-utils + sudo apt-get clean + elif which port > /dev/null 2>&1 + then + sudo port install gnutar xz + fi fi + + # Prefer gnutar on macOS. + local tar_cmd=tar + which gnutar > /dev/null 2>&1 && tar_cmd=gnutar # Determine the best supported compression type. local compression_flag= @@ -80,7 +92,7 @@ make_tar() { # --uid/gid (bsdtar) or even none at all (MSYS2 bsdtar). Account for such # flag differences by checking if they're mentioned on the help text. local ownership_flags= - local tar_help=$(tar --help 2>&1) + local tar_help=$("$tar_cmd" --help 2>&1) if echo $tar_help | grep -q -- --owner then local ownership_flags="--owner=0 --group=0" @@ -90,7 +102,7 @@ make_tar() { fi # Run tar. - tar -c $compression_flag -f "$1$compression_ext" $ownership_flags * + "$tar_cmd" -c $compression_flag -f "$1$compression_ext" $ownership_flags * return $? } From 63e52cb8327651d7e717f2ab36faeb47c33ed441 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 04:06:46 +0200 Subject: [PATCH 042/386] Fixes to cpu/386_common.c. --- src/cpu/386_common.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c index bef9aa59a..ca7888502 100644 --- a/src/cpu/386_common.c +++ b/src/cpu/386_common.c @@ -72,7 +72,7 @@ int smm_in_hlt = 0, smi_block = 0; uint32_t addr64, addr64_2; uint32_t addr64a[8], addr64a_2[8]; -static timer_t *cpu_fast_off_timer = NULL; +static pc_timer_t *cpu_fast_off_timer = NULL; static double cpu_fast_off_period = 0.0; @@ -1844,7 +1844,7 @@ sysret(uint32_t fetchdat) void cpu_register_fast_off_handler(void *timer) { - cpu_fast_off_timer = (timer_t *) timer; + cpu_fast_off_timer = (pc_timer_t *) timer; } @@ -1868,7 +1868,7 @@ cpu_fast_off_period_set(uint16_t val, double period) void cpu_fast_off_reset(void) { - if (cpu-fast_off_timer) + if (cpu_fast_off_timer) timer_disable(cpu_fast_off_timer); cpu_register_fast_off_handler(NULL); From 8a8d7857d36c769a4f220e4bf98806e695e55d7e Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 04:08:13 +0200 Subject: [PATCH 043/386] Two chipset .c files. --- src/chipset/intel_420ex.c | 1 + src/chipset/intel_sio.c | 1 + 2 files changed, 2 insertions(+) diff --git a/src/chipset/intel_420ex.c b/src/chipset/intel_420ex.c index 1590bc34c..11c66b833 100644 --- a/src/chipset/intel_420ex.c +++ b/src/chipset/intel_420ex.c @@ -19,6 +19,7 @@ #include #include #include <86box/86box.h> +#include "cpu.h" #include <86box/device.h> #include <86box/io.h> #include <86box/apm.h> diff --git a/src/chipset/intel_sio.c b/src/chipset/intel_sio.c index 8c75e88c2..10b1b7380 100644 --- a/src/chipset/intel_sio.c +++ b/src/chipset/intel_sio.c @@ -18,6 +18,7 @@ #include #include #include <86box/86box.h> +#include "cpu.h" #include <86box/device.h> #include <86box/io.h> #include <86box/apm.h> From dcd7cc904742cd38a195b63ee4b1a66aa3b3aead Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 04:09:49 +0200 Subject: [PATCH 044/386] And more. --- src/chipset/intel_piix.c | 2 +- src/chipset/intel_sio.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/chipset/intel_piix.c b/src/chipset/intel_piix.c index c0f28914b..f8302e854 100644 --- a/src/chipset/intel_piix.c +++ b/src/chipset/intel_piix.c @@ -1499,7 +1499,7 @@ static void if (dev->type < 4) { cpu_fast_off_val = dev->regs[0][0xa8]; cpu_fast_off_count = cpu_fast_off_val + 1; - cpu_fast_off_register(&dev->fast_off_timer); + cpu_register_fast_off_handler(&dev->fast_off_timer); } else cpu_fast_off_val = cpu_fast_off_count = 0; diff --git a/src/chipset/intel_sio.c b/src/chipset/intel_sio.c index 10b1b7380..bbc85662d 100644 --- a/src/chipset/intel_sio.c +++ b/src/chipset/intel_sio.c @@ -504,7 +504,7 @@ sio_init(const device_t *info) cpu_fast_off_val = dev->regs[0xa8]; cpu_fast_off_count = cpu_fast_off_val + 1; - cpu_fast_off_register(&dev->fast_off_timer); + cpu_register_fast_off_handler(&dev->fast_off_timer); } else cpu_fast_off_val = cpu_fast_off_count = 0; From 1b9c360bbe2ede16b306d1ea96b53c8425d489f3 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 04:10:54 +0200 Subject: [PATCH 045/386] And Sigma. --- src/video/vid_sigma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/video/vid_sigma.c b/src/video/vid_sigma.c index e340a7c52..154469317 100644 --- a/src/video/vid_sigma.c +++ b/src/video/vid_sigma.c @@ -245,7 +245,7 @@ sigma_out(uint16_t addr, uint8_t val, void *p) sigma->lastport &= 0x7F; return; case 0x2DC: /* Reset NMI */ -#idef OLD_NMI_BEHAVIOR +#ifdef OLD_NMI_BEHAVIOR nmi = 0; #endif sigma->lastport &= 0x7F; From 0ebf0e0ecea6153d2728b9952bbdc8000e4f067a Mon Sep 17 00:00:00 2001 From: richardg867 Date: Fri, 15 Jul 2022 23:12:27 -0300 Subject: [PATCH 046/386] Jenkins: Fix small typo in tarball script --- .ci/build.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.ci/build.sh b/.ci/build.sh index da4169516..98dbf3e3f 100644 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -65,7 +65,7 @@ make_tar() { # Prefer gnutar on macOS. local tar_cmd=tar - which gnutar > /dev/null 2>&1 && tar_cmd=gnutar + which gnutar > /dev/null 2>&1 && local tar_cmd=gnutar # Determine the best supported compression type. local compression_flag= From 00b63fe9b8777d9875c585980fbc5fef60a0476e Mon Sep 17 00:00:00 2001 From: richardg867 Date: Fri, 15 Jul 2022 23:17:07 -0300 Subject: [PATCH 047/386] Jenkins: More macOS stuff --- .ci/build.sh | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/.ci/build.sh b/.ci/build.sh index 98dbf3e3f..278e252d8 100644 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -59,11 +59,12 @@ make_tar() { sudo apt-get clean elif which port > /dev/null 2>&1 then + sudo port selfupdate sudo port install gnutar xz fi fi - - # Prefer gnutar on macOS. + + # Use MacPorts gnutar (if installed) on macOS. local tar_cmd=tar which gnutar > /dev/null 2>&1 && local tar_cmd=gnutar From 549a8544a0a2b7507c7022d43c363d0746a71a74 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 16 Jul 2022 04:29:19 +0200 Subject: [PATCH 048/386] Rewrote the NVR periodic timer for better performance. --- src/nvr_at.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/src/nvr_at.c b/src/nvr_at.c index b164d948d..2bf8be383 100644 --- a/src/nvr_at.c +++ b/src/nvr_at.c @@ -496,6 +496,8 @@ timer_load_count(nvr_t *nvr) int c = nvr->regs[RTC_REGA] & REGA_RS; local_t *local = (local_t *) nvr->data; + timer_disable(&local->rtc_timer); + if ((nvr->regs[RTC_REGA] & 0x70) != 0x20) { local->state = 0; return; @@ -509,9 +511,11 @@ timer_load_count(nvr_t *nvr) break; case 1: case 2: local->count = 1 << (c + 6); + timer_set_delay_u64(&local->rtc_timer, (local->count) * RTCCONST); break; default: local->count = 1 << (c - 1); + timer_set_delay_u64(&local->rtc_timer, (local->count) * RTCCONST); break; } } @@ -523,20 +527,16 @@ timer_intr(void *priv) nvr_t *nvr = (nvr_t *)priv; local_t *local = (local_t *)nvr->data; - timer_advance_u64(&local->rtc_timer, RTCCONST); - if (local->state == 1) { - if (--local->count == 0) { - timer_load_count(nvr); + timer_load_count(nvr); - nvr->regs[RTC_REGC] |= REGC_PF; - if (nvr->regs[RTC_REGB] & REGB_PIE) { - nvr->regs[RTC_REGC] |= REGC_IRQF; + nvr->regs[RTC_REGC] |= REGC_PF; + if (nvr->regs[RTC_REGB] & REGB_PIE) { + nvr->regs[RTC_REGC] |= REGC_IRQF; - /* Generate an interrupt. */ - if (nvr->irq != -1) - picint(1 << nvr->irq); - } + /* Generate an interrupt. */ + if (nvr->irq != -1) + picint(1 << nvr->irq); } } } @@ -809,6 +809,7 @@ nvr_read(uint16_t addr, void *priv) return(ret); } + /* Secondary NVR write - used by SMC. */ static void nvr_sec_write(uint16_t addr, uint8_t val, void *priv) @@ -824,6 +825,7 @@ nvr_sec_read(uint16_t addr, void *priv) return nvr_read(0x72 + (addr & 1), priv); } + /* Reset the RTC state to 1980/01/01 00:00. */ static void nvr_reset(nvr_t *nvr) @@ -883,8 +885,7 @@ nvr_at_speed_changed(void *priv) nvr_t *nvr = (nvr_t *) priv; local_t *local = (local_t *) nvr->data; - timer_disable(&local->rtc_timer); - timer_set_delay_u64(&local->rtc_timer, RTCCONST); + timer_load_count(nvr); timer_disable(&local->update_timer); if (local->ecount > 0ULL) @@ -1081,7 +1082,6 @@ nvr_at_init(const device_t *info) nvr->regs[RTC_REGA] = (nvr->regs[RTC_REGA] & 0x8f) | 0x20; nvr_at_reset(nvr); timer_load_count(nvr); - timer_set_delay_u64(&local->rtc_timer, RTCCONST); /* Set up the I/O handler for this device. */ io_sethandler(0x0070, 2, From efdf003272097719a698e703391d8d8cbad0b877 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Fri, 15 Jul 2022 23:43:00 -0300 Subject: [PATCH 049/386] Jenkins: Better document some stuff --- .ci/Jenkinsfile | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/.ci/Jenkinsfile b/.ci/Jenkinsfile index b0c865083..61330031a 100644 --- a/.ci/Jenkinsfile +++ b/.ci/Jenkinsfile @@ -113,9 +113,9 @@ def gitClone(repository, branch) { } else if (env.GIT_COMMIT != scmVars.GIT_COMMIT) { /* Checkout the commit read from the polling log. */ if (isUnix()) - sh returnStatus: true, script: "git checkout ${env.GIT_COMMIT}" + sh(returnStatus: true, script: "git checkout ${env.GIT_COMMIT}") else - bat returnStatus: true, script: "git checkout ${env.GIT_COMMIT}" + bat(returnStatus: true, script: "git checkout ${env.GIT_COMMIT}") } println "[-] Using git commit [${env.GIT_COMMIT}]" @@ -173,8 +173,10 @@ pipeline { steps { script { - /* Extract the polled commit from the polling log, so that git checkout can be used - to avoid JENKINS-20518 race conditions caused by two pushes too close together. */ + /* Extract the polled commit from the polling log, so that git checkout + can be used to avoid JENKINS-20518 race conditions caused by the + webhook being triggered more than once in a short period of time. + This is a backup strategy for FilterProxy's webhook queuing. */ node('master') { /* must run on master node to read polling log */ /* Ignore exceptions as this is not really critical. */ try { From 548e8b360abe43bee3169fc21c35b4c2377034b3 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sat, 16 Jul 2022 12:57:35 +0600 Subject: [PATCH 050/386] qt: Make renderer widget resizable only once --- src/qt/qt_mainwindow.cpp | 8 +++++--- src/qt/qt_mainwindow.hpp | 1 + 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 72876c61c..0725d21a4 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -229,7 +229,10 @@ MainWindow::MainWindow(QWidget *parent) : }); connect(this, &MainWindow::resizeContents, this, [this](int w, int h) { - ui->stackedWidget->setFixedSize(QWIDGETSIZE_MAX, QWIDGETSIZE_MAX); + if (shownonce) { + if (resizableonce == false) ui->stackedWidget->setFixedSize(QWIDGETSIZE_MAX, QWIDGETSIZE_MAX); + resizableonce = true; + } if (!QApplication::platformName().contains("eglfs") && vid_resize != 1) { w = (w / (!dpi_scale ? util::screenOfWidget(this)->devicePixelRatio() : 1.)); @@ -558,7 +561,7 @@ void MainWindow::closeEvent(QCloseEvent *event) { if (renderers[i]) { monitor_settings[i].mon_window_w = renderers[i]->geometry().width(); monitor_settings[i].mon_window_h = renderers[i]->geometry().height(); - if (!QApplication::platformName().contains("wayland")) continue; + if (QApplication::platformName().contains("wayland")) continue; monitor_settings[i].mon_window_x = renderers[i]->geometry().x(); monitor_settings[i].mon_window_y = renderers[i]->geometry().y(); } @@ -582,7 +585,6 @@ void MainWindow::initRendererMonitorSlot(int monitor_index) auto& secondaryRenderer = this->renderers[monitor_index]; secondaryRenderer.reset(new RendererStack(nullptr, monitor_index)); if (secondaryRenderer) { - connect(this, &MainWindow::pollMouse, secondaryRenderer.get(), &RendererStack::mousePoll, Qt::DirectConnection); connect(secondaryRenderer.get(), &RendererStack::rendererChanged, this, [this, monitor_index] { this->renderers[monitor_index]->show(); diff --git a/src/qt/qt_mainwindow.hpp b/src/qt/qt_mainwindow.hpp index f0fd3ba6a..49300e72b 100644 --- a/src/qt/qt_mainwindow.hpp +++ b/src/qt/qt_mainwindow.hpp @@ -141,6 +141,7 @@ private: /* If main window should send keyboard input */ bool send_keyboard_input = true; bool shownonce = false; + bool resizableonce = false; friend class SpecifyDimensions; friend class ProgSettings; From 7beec38ed3624c4bf0a00caa8b7bc22b00efa5f1 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sat, 16 Jul 2022 12:57:54 +0600 Subject: [PATCH 051/386] qt: Fix mouse polling --- src/qt/qt_rendererstack.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/qt/qt_rendererstack.cpp b/src/qt/qt_rendererstack.cpp index 795c31fe7..d93bc802e 100644 --- a/src/qt/qt_rendererstack.cpp +++ b/src/qt/qt_rendererstack.cpp @@ -34,6 +34,7 @@ #include "evdev_mouse.hpp" +#include #include #include @@ -53,8 +54,8 @@ double mouse_sensitivity = 1.0; } struct mouseinputdata { - int deltax, deltay, deltaz; - int mousebuttons; + atomic_int deltax, deltay, deltaz; + atomic_int mousebuttons; }; static mouseinputdata mousedata; @@ -145,7 +146,7 @@ int ignoreNextMouseEvent = 1; void RendererStack::mouseReleaseEvent(QMouseEvent *event) { - if (this->geometry().contains(event->pos()) && event->button() == Qt::LeftButton && !mouse_capture && (isMouseDown & 1)) { + if (this->geometry().contains(event->pos()) && event->button() == Qt::LeftButton && !mouse_capture && (isMouseDown & 1) && mouse_get_buttons() != 0) { plat_mouse_capture(1); this->setCursor(Qt::BlankCursor); if (!ignoreNextMouseEvent) @@ -164,6 +165,7 @@ RendererStack::mouseReleaseEvent(QMouseEvent *event) } isMouseDown &= ~1; } + void RendererStack::mousePressEvent(QMouseEvent *event) { @@ -173,6 +175,7 @@ RendererStack::mousePressEvent(QMouseEvent *event) } event->accept(); } + void RendererStack::wheelEvent(QWheelEvent *event) { From 1b8e50e4da0df10112ab57a50b388a8d69ee3791 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Sat, 16 Jul 2022 20:53:59 +0200 Subject: [PATCH 052/386] Revert to the old NMI way in the AudioPCI code. --- src/sound/snd_audiopci.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/sound/snd_audiopci.c b/src/sound/snd_audiopci.c index fe00038c7..4791be6a0 100644 --- a/src/sound/snd_audiopci.c +++ b/src/sound/snd_audiopci.c @@ -306,9 +306,7 @@ es1371_reset(void *p) es1371_t *dev = (es1371_t *) p; int i; -#ifdef OLD_NMI_BEHAVIOR nmi = 0; -#endif /* Interrupt/Chip Select Control Register, Address 00H Addressable as byte, word, longword */ From d630bba26e22a6124a6836692314b8360486bd4f Mon Sep 17 00:00:00 2001 From: TC1995 Date: Sat, 16 Jul 2022 22:04:45 +0200 Subject: [PATCH 053/386] Not only AudioPCI, revert the NMI way where applicable (ali1489, viapipc, amstrad and sigma). --- src/chipset/ali1489.c | 2 -- src/chipset/via_pipc.c | 2 -- src/machine/m_amstrad.c | 2 -- src/video/vid_sigma.c | 2 -- 4 files changed, 8 deletions(-) diff --git a/src/chipset/ali1489.c b/src/chipset/ali1489.c index 921c7d082..da6ff39cc 100644 --- a/src/chipset/ali1489.c +++ b/src/chipset/ali1489.c @@ -197,9 +197,7 @@ ali1489_defaults(ali1489_t *dev) picintc(1 << 10); picintc(1 << 15); -#ifdef OLD_NMI_BEHAVIOR nmi = 0; -#endif smi_line = 0; in_smm = 0; diff --git a/src/chipset/via_pipc.c b/src/chipset/via_pipc.c index 720ad7561..bcb54130f 100644 --- a/src/chipset/via_pipc.c +++ b/src/chipset/via_pipc.c @@ -728,10 +728,8 @@ pipc_fmnmi_read(uint16_t addr, void *priv) if (dev->ac97_regs[0][0x48] & 0x01) { if (dev->ac97_regs[0][0x48] & 0x04) smi_line = 0; -#ifdef OLD_NMI_BEHAVIOR else nmi = 0; -#endif } #endif diff --git a/src/machine/m_amstrad.c b/src/machine/m_amstrad.c index cac5a29d2..baf78d071 100644 --- a/src/machine/m_amstrad.c +++ b/src/machine/m_amstrad.c @@ -1068,9 +1068,7 @@ vid_in_200(uint16_t addr, void *priv) case 0x03dd: ret = vid->crtc_index; /* Read NMI reason */ vid->crtc_index &= 0x1f; /* Reset NMI reason */ -#ifdef OLD_NMI_BEHAVIOR nmi = 0; /* And reset NMI flag */ -#endif return(ret); case 0x03de: diff --git a/src/video/vid_sigma.c b/src/video/vid_sigma.c index 154469317..73a9363e8 100644 --- a/src/video/vid_sigma.c +++ b/src/video/vid_sigma.c @@ -245,9 +245,7 @@ sigma_out(uint16_t addr, uint8_t val, void *p) sigma->lastport &= 0x7F; return; case 0x2DC: /* Reset NMI */ -#ifdef OLD_NMI_BEHAVIOR nmi = 0; -#endif sigma->lastport &= 0x7F; return; case 0x2DD: /* Page in RAM at 0xC1800 */ From 39145e7cc660ae53ac394236d421a4a7b2f013b2 Mon Sep 17 00:00:00 2001 From: GetDizzy Date: Sat, 16 Jul 2022 16:50:41 -0400 Subject: [PATCH 054/386] Set default IRQ for NE2000 to 3 Increases compatibility with Windows 9x and other operating systems that have a limited selection of IRQs for this device (usually IRQs <= 9). --- src/network/net_ne2000.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/network/net_ne2000.c b/src/network/net_ne2000.c index 5c0a7ba61..4a8d68393 100644 --- a/src/network/net_ne2000.c +++ b/src/network/net_ne2000.c @@ -1211,7 +1211,7 @@ static const device_config_t ne2000_config[] = { .description = "IRQ", .type = CONFIG_SELECTION, .default_string = "", - .default_int = 10, + .default_int = 3, .file_filter = "", .spinner = { 0 }, .selection = { From c89ce886f9b45582d5cd9de3d5b76be03e2fa405 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 02:17:16 +0200 Subject: [PATCH 055/386] Fixed warnings in config.c. --- src/config.c | 46 ++++++++++++++++++++-------------------------- 1 file changed, 20 insertions(+), 26 deletions(-) diff --git a/src/config.c b/src/config.c index eea247e3f..9d2ad1a63 100644 --- a/src/config.c +++ b/src/config.c @@ -587,11 +587,9 @@ load_general(void) confirm_exit = config_get_int(cat, "confirm_exit", 1); confirm_save = config_get_int(cat, "confirm_save", 1); - p = config_get_string(cat, "language", NULL); - if (p != NULL) - { - lang_id = plat_language_code(p); - } + p = config_get_string(cat, "language", NULL); + if (p != NULL) + lang_id = plat_language_code(p); mouse_sensitivity = config_get_double(cat, "mouse_sensitivity", 1.0); if (mouse_sensitivity < 0.5) @@ -599,11 +597,11 @@ load_general(void) else if (mouse_sensitivity > 2.0) mouse_sensitivity = 2.0; - p = config_get_string(cat, "iconset", NULL); - if (p != NULL) - strcpy(icon_set, p); - else - strcpy(icon_set, ""); + p = config_get_string(cat, "iconset", NULL); + if (p != NULL) + strcpy(icon_set, p); + else + strcpy(icon_set, ""); enable_discord = !!config_get_int(cat, "enable_discord", 0); @@ -2224,7 +2222,7 @@ static void save_general(void) { char *cat = "General"; - char temp[512]; + char temp[512], buffer[512] = {0}; char *va_name; @@ -2233,11 +2231,10 @@ save_general(void) config_delete_var(cat, "vid_resize"); va_name = plat_vidapi_name(vid_api); - if (!strcmp(va_name, "default")) { + if (!strcmp(va_name, "default")) config_delete_var(cat, "vid_renderer"); - } else { + else config_set_string(cat, "vid_renderer", va_name); - } if (video_fullscreen_scale == 0) config_delete_var(cat, "video_fullscreen_scale"); @@ -2304,9 +2301,8 @@ save_general(void) config_set_int(cat, "window_remember", window_remember); else config_delete_var(cat, "window_remember"); - } else { + } else config_delete_var(cat, "window_remember"); - } if (vid_resize & 2) { sprintf(temp, "%ix%i", fixed_size_x, fixed_size_y); @@ -2356,17 +2352,15 @@ save_general(void) if (lang_id == DEFAULT_LANGUAGE) config_delete_var(cat, "language"); - else - { - char buffer[512] = {0}; - plat_language_code_r(lang_id, buffer, 511); - config_set_string(cat, "language", buffer); - } + else { + plat_language_code_r(lang_id, buffer, 511); + config_set_string(cat, "language", buffer); + } - if (!strcmp(icon_set, "")) - config_delete_var(cat, "iconset"); - else - config_set_string(cat, "iconset", icon_set); + if (!strcmp(icon_set, "")) + config_delete_var(cat, "iconset"); + else + config_set_string(cat, "iconset", icon_set); if (enable_discord) config_set_int(cat, "enable_discord", enable_discord); From 8bf4b6c0ce3715821d78be2f41d12b8695855ff2 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 02:26:26 +0200 Subject: [PATCH 056/386] Clean-ups and warning fixes in video/video.c. --- src/video/video.c | 74 +++++++++++++++++++++++------------------------ 1 file changed, 36 insertions(+), 38 deletions(-) diff --git a/src/video/video.c b/src/video/video.c index a481a1d86..1bfb148a3 100644 --- a/src/video/video.c +++ b/src/video/video.c @@ -76,35 +76,30 @@ #include -volatile int screenshots = 0; -//bitmap_t *buffer32 = NULL; -uint8_t fontdat[2048][8]; /* IBM CGA font */ -uint8_t fontdatm[2048][16]; /* IBM MDA font */ -uint8_t fontdatw[512][32]; /* Wyse700 font */ -uint8_t fontdat8x12[256][16]; /* MDSI Genius font */ -uint8_t fontdat12x18[256][36]; /* IM1024 font */ -dbcs_font_t *fontdatksc5601 = NULL; /* Korean KSC-5601 font */ -dbcs_font_t *fontdatksc5601_user = NULL; /* Korean KSC-5601 user defined font */ -int herc_blend = 0; -uint32_t *video_6to8 = NULL, - *video_8togs = NULL, - *video_8to32 = NULL, - *video_15to32 = NULL, - *video_16to32 = NULL; -int frames = 0; -int fullchange = 0; -uint8_t edatlookup[4][4]; -static int video_force_resize; -int video_grayscale = 0; -int video_graytype = 0; -static int vid_type; -static const video_timings_t *vid_timings; -static uint32_t cga_2_table[16]; -static uint8_t thread_run = 0; -monitor_t monitors[MONITORS_NUM]; -monitor_settings_t monitor_settings[MONITORS_NUM]; -atomic_bool doresize_monitors[MONITORS_NUM]; -int monitor_index_global = 0; +volatile int screenshots = 0; +uint8_t edatlookup[4][4]; +uint8_t fontdat[2048][8]; /* IBM CGA font */ +uint8_t fontdatm[2048][16]; /* IBM MDA font */ +uint8_t fontdatw[512][32]; /* Wyse700 font */ +uint8_t fontdat8x12[256][16]; /* MDSI Genius font */ +uint8_t fontdat12x18[256][36]; /* IM1024 font */ +dbcs_font_t *fontdatksc5601 = NULL; /* Korean KSC-5601 font */ +dbcs_font_t *fontdatksc5601_user = NULL; /* Korean KSC-5601 user defined font */ +int herc_blend = 0; +int frames = 0; +int fullchange = 0; +int video_grayscale = 0; +int video_graytype = 0; +int monitor_index_global = 0; +uint32_t *video_6to8 = NULL, + *video_8togs = NULL, + *video_8to32 = NULL, + *video_15to32 = NULL, + *video_16to32 = NULL; +monitor_t monitors[MONITORS_NUM]; +monitor_settings_t monitor_settings[MONITORS_NUM]; +atomic_bool doresize_monitors[MONITORS_NUM]; + #ifdef _WIN32 void * __cdecl (*video_copy)(void *_Dst, const void *_Src, size_t _Size) = memcpy; @@ -241,18 +236,21 @@ const uint32_t shade[5][256] = }; -static struct blit_data_struct { +typedef struct blit_data_struct { int x, y, w, h; int busy; int buffer_in_use; int thread_run; - int monitor_index; + int monitor_index; thread_t *blit_thread; event_t *wake_blit_thread; event_t *blit_complete; event_t *buffer_not_in_use; -} blit_data; +} blit_data_t; + + +static uint32_t cga_2_table[16]; static void (*blit_func)(int x, int y, int w, int h, int monitor_index); @@ -288,7 +286,7 @@ video_setblit(void(*blit)(int,int,int,int,int)) void video_blit_complete_monitor(int monitor_index) { - struct blit_data_struct* blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; + blit_data_t* blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; blit_data_ptr->buffer_in_use = 0; thread_set_event(blit_data_ptr->buffer_not_in_use); @@ -298,7 +296,7 @@ video_blit_complete_monitor(int monitor_index) void video_wait_for_blit_monitor(int monitor_index) { - struct blit_data_struct* blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; + blit_data_t* blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; while (blit_data_ptr->busy) thread_wait_event(blit_data_ptr->blit_complete, -1); @@ -309,7 +307,7 @@ video_wait_for_blit_monitor(int monitor_index) void video_wait_for_buffer_monitor(int monitor_index) { - struct blit_data_struct* blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; + blit_data_t* blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; while (blit_data_ptr->buffer_in_use) thread_wait_event(blit_data_ptr->buffer_not_in_use, -1); @@ -328,7 +326,7 @@ video_take_screenshot_monitor(const char *fn, uint32_t *buf, int start_x, int st png_bytep *b_rgb = NULL; FILE *fp = NULL; uint32_t temp = 0x00000000; - struct blit_data_struct* blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; + blit_data_t* blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; /* create file */ fp = plat_fopen((char *) fn, (char *) "wb"); @@ -460,7 +458,7 @@ video_transform_copy(void *__restrict _Dst, const void *__restrict _Src, size_t static void blit_thread(void *param) { - struct blit_data_struct* data = param; + blit_data_t* data = param; while (data->thread_run) { thread_wait_event(data->wake_blit_thread, -1); thread_reset_event(data->wake_blit_thread); @@ -870,7 +868,7 @@ video_monitor_init(int index) monitors[index].mon_bpp = 8; monitors[index].mon_changeframecount = 2; monitors[index].target_buffer = create_bitmap(2048, 2048); - monitors[index].mon_blit_data_ptr = calloc(1, sizeof(struct blit_data_struct)); + monitors[index].mon_blit_data_ptr = calloc(1, sizeof(blit_data_t)); monitors[index].mon_blit_data_ptr->wake_blit_thread = thread_create_event(); monitors[index].mon_blit_data_ptr->blit_complete = thread_create_event(); monitors[index].mon_blit_data_ptr->buffer_not_in_use = thread_create_event(); From f05ec1f872cefac4bc2c6d6fabc31009dbfff5cd Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 02:32:31 +0200 Subject: [PATCH 057/386] Fixed warnings in 86box.c. --- src/86box.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/86box.c b/src/86box.c index 7565a7af7..805cc60bf 100644 --- a/src/86box.c +++ b/src/86box.c @@ -409,8 +409,10 @@ pc_init(int argc, char *argv[]) char temp[2048]; struct tm *info; time_t now; - int c; - int ng = 0, lvmp = 0; + int c, lvmp = 0; +#ifdef ENABLE_NG + int ng = 0; +#endif #ifdef _WIN32 uint32_t *uid, *shwnd; #endif @@ -492,12 +494,14 @@ usage: !strcasecmp(argv[c], "-D")) { force_debug = 1; #endif +#ifdef ENABLE_NG } else if (!strcasecmp(argv[c], "--nographic") || !strcasecmp(argv[c], "-E")) { /* Currently does nothing, but if/when we implement a built-in manager, it's going to force the manager not to run, allowing the old usage without parameter. */ ng = 1; +#endif } else if (!strcasecmp(argv[c], "--fullscreen") || !strcasecmp(argv[c], "-F")) { start_in_fullscreen = 1; @@ -1263,8 +1267,6 @@ pc_onesec(void) void set_screen_size_monitor(int x, int y, int monitor_index) { - int owsx = monitors[monitor_index].mon_scrnsz_x; - int owsy = monitors[monitor_index].mon_scrnsz_y; int temp_overscan_x = monitors[monitor_index].mon_overscan_x; int temp_overscan_y = monitors[monitor_index].mon_overscan_y; double dx, dy, dtx, dty; From 1b56e118becbd20230275d151b185b6ebe82456f Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 15:12:37 +0200 Subject: [PATCH 058/386] Back to IRQ 10. --- src/network/net_ne2000.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/network/net_ne2000.c b/src/network/net_ne2000.c index 4a8d68393..5c0a7ba61 100644 --- a/src/network/net_ne2000.c +++ b/src/network/net_ne2000.c @@ -1211,7 +1211,7 @@ static const device_config_t ne2000_config[] = { .description = "IRQ", .type = CONFIG_SELECTION, .default_string = "", - .default_int = 3, + .default_int = 10, .file_filter = "", .spinner = { 0 }, .selection = { From 3ce22ca61d27d172e67afded0c39361f77d977d1 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 18 Jul 2022 21:46:22 +0600 Subject: [PATCH 059/386] qt: don't enable blitting too early --- src/qt/qt_rendererstack.cpp | 4 ---- 1 file changed, 4 deletions(-) diff --git a/src/qt/qt_rendererstack.cpp b/src/qt/qt_rendererstack.cpp index d93bc802e..fab20b5b7 100644 --- a/src/qt/qt_rendererstack.cpp +++ b/src/qt/qt_rendererstack.cpp @@ -314,7 +314,6 @@ RendererStack::createRenderer(Renderer renderer) connect(hw, &OpenGLRenderer::errorInitializing, [=]() { /* Renderer not could initialize, fallback to software. */ imagebufs = {}; - endblit(); QTimer::singleShot(0, this, [this]() { switchRenderer(Renderer::Software); }); }); current.reset(this->createWindowContainer(hw, this)); @@ -332,7 +331,6 @@ RendererStack::createRenderer(Renderer renderer) msgBox->setAttribute(Qt::WA_DeleteOnClose); msgBox->show(); imagebufs = {}; - endblit(); QTimer::singleShot(0, this, [this]() { switchRenderer(Renderer::Software); }); }); connect(hw, &D3D9Renderer::initialized, this, [this]() @@ -356,7 +354,6 @@ RendererStack::createRenderer(Renderer renderer) msgBox->setAttribute(Qt::WA_DeleteOnClose); msgBox->show(); imagebufs = {}; - endblit(); QTimer::singleShot(0, this, [this]() { switchRenderer(Renderer::Software); }); current.reset(nullptr); break; @@ -375,7 +372,6 @@ RendererStack::createRenderer(Renderer renderer) msgBox->setAttribute(Qt::WA_DeleteOnClose); msgBox->show(); imagebufs = {}; - endblit(); QTimer::singleShot(0, this, [this]() { switchRenderer(Renderer::Software); }); }); current.reset(this->createWindowContainer(hw, this)); From 711e26207ae7002bcd8389359024d3143bdced61 Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Mon, 18 Jul 2022 15:22:33 -0400 Subject: [PATCH 060/386] Size the QListView according to minimum width instead of maximum --- src/qt/qt_settings.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_settings.cpp b/src/qt/qt_settings.cpp index ea4a86373..290b95982 100644 --- a/src/qt/qt_settings.cpp +++ b/src/qt/qt_settings.cpp @@ -143,7 +143,7 @@ Settings::Settings(QWidget *parent) : ui->stackedWidget->setCurrentIndex(current.row()); }); - ui->listView->setMaximumWidth(ui->listView->sizeHintForColumn(0) + qApp->style()->pixelMetric(QStyle::PM_ScrollBarExtent)); + ui->listView->setMinimumWidth(ui->listView->sizeHintForColumn(0) + qApp->style()->pixelMetric(QStyle::PM_ScrollBarExtent)); Settings::settings = this; } From 95cd9b68af4ce94b33c0aa5b9beb8fd5fc0ee9cd Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 23:32:11 +0200 Subject: [PATCH 061/386] The NVR no longer raises IRQ's if the IRQF flag is set. --- src/nvr_at.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/src/nvr_at.c b/src/nvr_at.c index 2bf8be383..fc5ae4bde 100644 --- a/src/nvr_at.c +++ b/src/nvr_at.c @@ -466,11 +466,11 @@ timer_update(void *priv) check_alarm_via(nvr, RTC_MONTH, RTC_ALMONT_SIS)*/) { nvr->regs[RTC_REGC] |= REGC_AF; if (nvr->regs[RTC_REGB] & REGB_AIE) { - nvr->regs[RTC_REGC] |= REGC_IRQF; - /* Generate an interrupt. */ - if (nvr->irq != -1) + if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) picint(1 << nvr->irq); + + nvr->regs[RTC_REGC] |= REGC_IRQF; } } @@ -480,11 +480,11 @@ timer_update(void *priv) */ nvr->regs[RTC_REGC] |= REGC_UF; if (nvr->regs[RTC_REGB] & REGB_UIE) { - nvr->regs[RTC_REGC] |= REGC_IRQF; - /* Generate an interrupt. */ - if (nvr->irq != -1) + if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) picint(1 << nvr->irq); + + nvr->regs[RTC_REGC] |= REGC_IRQF; } } } @@ -532,11 +532,11 @@ timer_intr(void *priv) nvr->regs[RTC_REGC] |= REGC_PF; if (nvr->regs[RTC_REGB] & REGB_PIE) { - nvr->regs[RTC_REGC] |= REGC_IRQF; - /* Generate an interrupt. */ - if (nvr->irq != -1) + if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) picint(1 << nvr->irq); + + nvr->regs[RTC_REGC] |= REGC_IRQF; } } } From 8575947a577b54263fde1f04070020a0b558ff01 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 23:32:59 +0200 Subject: [PATCH 062/386] Some config.c indentation fixes. --- src/config.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/config.c b/src/config.c index 9d2ad1a63..54cb60f40 100644 --- a/src/config.c +++ b/src/config.c @@ -593,9 +593,9 @@ load_general(void) mouse_sensitivity = config_get_double(cat, "mouse_sensitivity", 1.0); if (mouse_sensitivity < 0.5) - mouse_sensitivity = 0.5; + mouse_sensitivity = 0.5; else if (mouse_sensitivity > 2.0) - mouse_sensitivity = 2.0; + mouse_sensitivity = 2.0; p = config_get_string(cat, "iconset", NULL); if (p != NULL) From 52f8d68fb0aef7f5b42408951ad0e5148a386764 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 23:36:11 +0200 Subject: [PATCH 063/386] ALi M6117 DRAM sizing implementation. --- src/chipset/ali6117.c | 107 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 106 insertions(+), 1 deletion(-) diff --git a/src/chipset/ali6117.c b/src/chipset/ali6117.c index 815085ee8..d33387b9f 100644 --- a/src/chipset/ali6117.c +++ b/src/chipset/ali6117.c @@ -41,12 +41,49 @@ typedef struct ali6117_t uint32_t local; /* Main registers (port 22h/23h) */ - uint8_t unlocked; + uint8_t unlocked, mode; uint8_t reg_offset; uint8_t regs[256]; } ali6117_t; +/* Total size, Bank 0 size, Bank 1 size, Bank 2 size, Bank 3 size. */ +static uint32_t ali6117_modes[32][5] = { + { 1024, 512, 512, 0, 0 }, + { 2048, 512, 512, 512, 512 }, + { 3072, 512, 512, 2048, 0 }, + { 5120, 512, 512, 2048, 2048 }, + { 9216, 512, 512, 8192, 0 }, + { 1024, 1024, 0, 0, 0 }, + { 2048, 1024, 1024, 0, 0 }, + { 4096, 1024, 1024, 2048, 0 }, + { 6144, 1024, 1024, 2048, 2048 }, + { 10240, 1024, 1024, 8192, 0 }, + { 18432, 1024, 1024, 8192, 8192 }, + { 3072, 1024, 2048, 0, 0 }, + { 5120, 1024, 2048, 2048, 0 }, + { 9216, 1024, 8192, 0, 0 }, + { 2048, 2048, 0, 0, 0 }, + { 4096, 2048, 2048, 0, 0 }, + { 6144, 2048, 2048, 2048, 0 }, + { 8192, 2048, 2048, 2048, 2048 }, + { 12288, 2048, 2048, 8192, 0 }, + { 20480, 2048, 2048, 8192, 8192 }, + { 10240, 2048, 8192, 0, 0 }, + { 18432, 2048, 8192, 8192, 0 }, + { 26624, 2048, 8192, 8192, 8192 }, + { 4096, 4096, 0, 0, 0 }, + { 8192, 4096, 4096, 0, 0 }, + { 24576, 4096, 4096, 8192, 8192 }, + { 12288, 4096, 8192, 0, 0 }, + { 8192, 8192, 0, 0, 0 }, + { 16384, 8192, 8192, 0, 0 }, + { 24576, 8192, 8192, 8192, 0 }, + { 32768, 8192, 8192, 8192, 8192 }, + { 65536, 32768, 32768, 0, 0 } +}; + + #ifdef ENABLE_ALI6117_LOG int ali6117_do_log = ENABLE_ALI6117_LOG; @@ -113,10 +150,56 @@ ali6117_recalcmapping(ali6117_t *dev) } +static void +ali6117_bank_recalc(ali6117_t *dev) +{ + int i; + uint32_t bank, addr; + + for (i = 0x00000000; i < (mem_size << 10); i += 4096) { + if ((i >= 0x000a0000) && (i < 0x00100000)) + continue; + + if (!is6117 && (i >= 0x00f00000) && (i < 0x01000000)) + continue; + + if (is6117 && (i >= 0x03f00000) && (i < 0x04000000)) + continue; + + switch (dev->regs[0x10] & 0xf8) { + case 0xe8: + bank = (i >> 12) & 3; + addr = (i & 0xfff) | ((i >> 14) << 12); + ali6117_log("E8 (%08X): Bank %i, address %08X vs. bank size %08X\n", i, bank, addr, ali6117_modes[dev->mode][bank + 1] * 1024); + if (addr < (ali6117_modes[dev->mode][bank + 1] * 1024)) + mem_set_mem_state_both(i, 4096, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + else + mem_set_mem_state_both(i, 4096, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + break; + case 0xf8: + bank = (i >> 12) & 1; + addr = (i & 0xfff) | ((i >> 13) << 12); + ali6117_log("F8 (%08X): Bank %i, address %08X vs. bank size %08X\n", i, bank, addr, ali6117_modes[dev->mode][bank + 1] * 1024); + if (addr < (ali6117_modes[dev->mode][bank + 1] * 1024)) + mem_set_mem_state_both(i, 4096, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + else + mem_set_mem_state_both(i, 4096, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + break; + default: + mem_set_mem_state_both(i, 4096, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + break; + } + } + + flushmmucache(); +} + + static void ali6117_reg_write(uint16_t addr, uint8_t val, void *priv) { ali6117_t *dev = (ali6117_t *) priv; + int i; ali6117_log("ALI6117: reg_write(%04X, %02X)\n", addr, val); @@ -135,6 +218,14 @@ ali6117_reg_write(uint16_t addr, uint8_t val, void *priv) case 0x10: refresh_at_enable = !(val & 0x02) || !!(dev->regs[0x20] & 0x80); + dev->regs[dev->reg_offset] = val; + + if (val & 0x04) + mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + else + mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + + ali6117_bank_recalc(dev); break; case 0x12: @@ -326,6 +417,10 @@ ali6117_reset(void *priv) cpu_set_isa_speed(7159091); refresh_at_enable = 1; + + /* On-board memory 15-16M is enabled by default. */ + mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + ali6117_bank_recalc(dev); } @@ -357,6 +452,8 @@ ali6117_close(void *priv) static void * ali6117_init(const device_t *info) { + int i, last_match = 0; + ali6117_log("ALI6117: init()\n"); ali6117_t *dev = (ali6117_t *) malloc(sizeof(ali6117_t)); @@ -367,6 +464,14 @@ ali6117_init(const device_t *info) device_add(&ide_isa_device); ali6117_setup(dev); + + for (i = 31; i >= 0; i--) { + if ((mem_size >= ali6117_modes[i][0]) && (ali6117_modes[i][0] > last_match)) { + last_match = ali6117_modes[i][0]; + dev->mode = i; + } + } + ali6117_reset(dev); if (!(dev->local & 0x08)) From 645c4e69022d6c73aa7a4dc5c9a805d0fb6bb690 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 23:38:06 +0200 Subject: [PATCH 064/386] ALi M6117-related CPU fixes. --- src/cpu/386_common.c | 2 ++ src/cpu/cpu.c | 4 +++- src/cpu/cpu.h | 2 +- src/cpu/x86.c | 2 ++ src/cpu/x86seg.c | 5 ++++- 5 files changed, 12 insertions(+), 3 deletions(-) diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c index ca7888502..546da2aa3 100644 --- a/src/cpu/386_common.c +++ b/src/cpu/386_common.c @@ -1173,6 +1173,8 @@ enter_smm(int in_hlt) if (unmask_a20_in_smm) { old_rammask = rammask; rammask = cpu_16bitbus ? 0xFFFFFF : 0xFFFFFFFF; + if (is6117) + rammask |= 0x3000000; flushmmucache(); } diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index b416206f6..a880ef1a5 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -114,7 +114,7 @@ int isa_cycles, cpu_inited, cpu_override, cpu_effective, cpu_multi, cpu_16bitbus, cpu_64bitbus, cpu_busspeed, cpu_cyrix_alignment, CPUID, - is286, is386, is486 = 1, + is286, is386, is6117, is486 = 1, cpu_isintel, cpu_iscyrix, hascache, isibm486, israpidcad, is_vpc, is_am486, is_am486dxl, is_pentium, is_k5, is_k6, is_p6, is_cxsmm, hasfpu, @@ -382,6 +382,8 @@ cpu_set(void) is_am486 = (cpu_s->cpu_type == CPU_ENH_Am486DX); is_am486dxl = (cpu_s->cpu_type == CPU_Am486DXL); + is6117 = !strcmp(cpu_f->manufacturer, "ALi"); + cpu_isintel = !strcmp(cpu_f->manufacturer, "Intel"); cpu_iscyrix = !strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST"); diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index 6d66e1531..b6998162f 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -495,7 +495,7 @@ extern double fpu_multi; extern int cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment penalties when crossing 8-byte boundaries*/ -extern int is8086, is286, is386, is486; +extern int is8086, is286, is386, is6117, is486; extern int is_am486, is_am486dxl, is_pentium, is_k5, is_k6, is_p6, is_cxsmm; extern int hascache; extern int isibm486; diff --git a/src/cpu/x86.c b/src/cpu/x86.c index e8370a5b5..bf5b168db 100644 --- a/src/cpu/x86.c +++ b/src/cpu/x86.c @@ -272,6 +272,8 @@ reset_common(int hard) loadcs(0xF000); cpu_state.pc = 0xFFF0; rammask = cpu_16bitbus ? 0xFFFFFF : 0xFFFFFFFF; + if (is6117) + rammask |= 0x03000000; } idt.base = 0; cpu_state.flags = 2; diff --git a/src/cpu/x86seg.c b/src/cpu/x86seg.c index 67cf04222..e103f0247 100644 --- a/src/cpu/x86seg.c +++ b/src/cpu/x86seg.c @@ -83,7 +83,10 @@ seg_reset(x86seg *s) if (s == &cpu_state.seg_cs) { if (!cpu_inited) fatal("seg_reset(&cpu_state.seg.cs) without an initialized CPU\n"); - s->base = is286 ? (cpu_16bitbus ? 0x00ff0000 : 0xffff0000) : 0x000ffff0; + if (is6117) + s->base = 0x03ff0000; + else + s->base = is286 ? (cpu_16bitbus ? 0x00ff0000 : 0xffff0000) : 0x000ffff0; s->seg = is286 ? 0xf000 : 0xffff; } else { s->base = 0; From 37893cd8abd955e85fb5836dba3b5cdaeff4c08d Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 23:39:40 +0200 Subject: [PATCH 065/386] PnP-related IDE fixes. --- src/disk/hdc_ide.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/disk/hdc_ide.c b/src/disk/hdc_ide.c index b005cbd6d..be799916a 100644 --- a/src/disk/hdc_ide.c +++ b/src/disk/hdc_ide.c @@ -2614,7 +2614,7 @@ ide_read_ali_76(void) } -static void +void ide_set_handlers(uint8_t board) { if (ide_boards[board] == NULL) @@ -2636,7 +2636,7 @@ ide_set_handlers(uint8_t board) } -static void +void ide_remove_handlers(uint8_t board) { if (ide_boards[board] == NULL) @@ -2878,11 +2878,11 @@ ide_board_init(int board, int irq, int base_main, int side_main, int type) void ide_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv) { + intptr_t board = (intptr_t) priv; + if (ld) return; - intptr_t board = (intptr_t) priv; - if (ide_boards[board]->base_main || ide_boards[board]->side_main) { ide_remove_handlers(board); ide_boards[board]->base_main = ide_boards[board]->side_main = 0; @@ -2891,10 +2891,10 @@ ide_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv) ide_boards[board]->irq = -1; if (config->activate) { - ide_boards[board]->base_main = config->io[0].base; - ide_boards[board]->side_main = config->io[1].base; + ide_boards[board]->base_main = (config->io[0].base != ISAPNP_IO_DISABLED) ? config->io[0].base : 0x0000; + ide_boards[board]->side_main = (config->io[1].base != ISAPNP_IO_DISABLED) ? config->io[1].base : 0x0000; - if ((ide_boards[board]->base_main != ISAPNP_IO_DISABLED) && (ide_boards[board]->side_main != ISAPNP_IO_DISABLED)) + if (ide_boards[board]->base_main && ide_boards[board]->side_main) ide_set_handlers(board); if (config->irq[0].irq != ISAPNP_IRQ_DISABLED) From 0e539f4a6a6fcc34c7790c9856a2d5f411eff2af Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 23:41:03 +0200 Subject: [PATCH 066/386] Header fixes. --- src/include/86box/gameport.h | 1 + src/include/86box/hdc_ide.h | 3 +++ src/include/86box/machine.h | 1 + src/include/86box/mem.h | 6 ++++++ src/include/86box/sio.h | 1 + src/include/86box/snd_sb_dsp.h | 2 +- 6 files changed, 13 insertions(+), 1 deletion(-) diff --git a/src/include/86box/gameport.h b/src/include/86box/gameport.h index 48b07cca6..65fdee996 100644 --- a/src/include/86box/gameport.h +++ b/src/include/86box/gameport.h @@ -121,6 +121,7 @@ extern const device_t gameport_tm_acm_device; extern const device_t gameport_pnp_device; extern const device_t gameport_pnp_6io_device; extern const device_t gameport_sio_device; +extern const device_t gameport_sio_1io_device; extern const device_t *standalone_gameport_type; #endif diff --git a/src/include/86box/hdc_ide.h b/src/include/86box/hdc_ide.h index 840e5daad..9e2539359 100644 --- a/src/include/86box/hdc_ide.h +++ b/src/include/86box/hdc_ide.h @@ -143,6 +143,9 @@ extern void win_cdrom_reload(uint8_t id); extern void ide_set_base(int board, uint16_t port); extern void ide_set_side(int board, uint16_t port); +extern void ide_set_handlers(uint8_t board); +extern void ide_remove_handlers(uint8_t board); + extern void ide_pri_enable(void); extern void ide_pri_disable(void); extern void ide_sec_enable(void); diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index 43799d1fe..8456b4dc8 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -658,6 +658,7 @@ extern int machine_at_5emapro_init(const machine_t *); /* m_at_socket8.c */ extern int machine_at_p6rp4_init(const machine_t *); +extern int machine_at_aurora_init(const machine_t *); extern int machine_at_686nx_init(const machine_t *); extern int machine_at_acerv60n_init(const machine_t *); diff --git a/src/include/86box/mem.h b/src/include/86box/mem.h index 79d1963dc..b2ee94d14 100644 --- a/src/include/86box/mem.h +++ b/src/include/86box/mem.h @@ -182,6 +182,8 @@ typedef struct _mem_mapping_ { uint32_t base; uint32_t size; + uint32_t mask; + uint8_t (*read_b)(uint32_t addr, void *priv); uint16_t (*read_w)(uint32_t addr, void *priv); uint32_t (*read_l)(uint32_t addr, void *priv); @@ -270,6 +272,7 @@ extern int writelookup[256]; extern uintptr_t * writelookup2; extern int writelnext; extern uint32_t ram_mapped_addr[64]; +extern uint8_t page_ff[4096]; extern mem_mapping_t ram_low_mapping, #if 1 @@ -298,6 +301,8 @@ extern int memspeed[11]; extern int mmu_perm; extern uint8_t high_page; /* if a high (> 4 gb) page was detected */ +extern uint32_t pages_sz; /* #pages in table */ + extern int mem_a20_state, mem_a20_alt, mem_a20_key; @@ -370,6 +375,7 @@ extern void mem_mapping_set_p(mem_mapping_t *, void *p); extern void mem_mapping_set_addr(mem_mapping_t *, uint32_t base, uint32_t size); extern void mem_mapping_set_exec(mem_mapping_t *, uint8_t *exec); +extern void mem_mapping_set_mask(mem_mapping_t *, uint32_t mask); extern void mem_mapping_disable(mem_mapping_t *); extern void mem_mapping_enable(mem_mapping_t *); extern void mem_mapping_recalc(uint64_t base, uint64_t size); diff --git a/src/include/86box/sio.h b/src/include/86box/sio.h index a9ee018cb..6f9cfa731 100644 --- a/src/include/86box/sio.h +++ b/src/include/86box/sio.h @@ -42,6 +42,7 @@ extern const device_t fdc37m60x_370_device; extern const device_t it8661f_device; extern const device_t i82091aa_device; extern const device_t i82091aa_398_device; +extern const device_t i82091aa_ide_pri_device; extern const device_t i82091aa_ide_device; extern const device_t pc87306_device; extern const device_t pc87307_device; diff --git a/src/include/86box/snd_sb_dsp.h b/src/include/86box/snd_sb_dsp.h index 9dd184ac5..2f3607176 100644 --- a/src/include/86box/snd_sb_dsp.h +++ b/src/include/86box/snd_sb_dsp.h @@ -83,7 +83,7 @@ typedef struct sb_dsp_t { pc_timer_t output_timer, input_timer; - uint64_t sblatcho, sblatchi; + double sblatcho, sblatchi; uint16_t sb_addr; From 8f92f0722afb7f53428af9c429e48c5e3d38f885 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 23:43:22 +0200 Subject: [PATCH 067/386] Initialize the PS/1 middle ROM file (F80000.BIN) if present. --- src/machine/m_ps1.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/machine/m_ps1.c b/src/machine/m_ps1.c index 0b0182692..101746a03 100644 --- a/src/machine/m_ps1.c +++ b/src/machine/m_ps1.c @@ -68,7 +68,7 @@ typedef struct { int model; - rom_t high_rom; + rom_t mid_rom, high_rom; uint8_t ps1_91, ps1_92, @@ -300,6 +300,11 @@ ps1_setup(int model) io_sethandler(0x00e0, 2, ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps); + if (rom_present("roms/machines/ibmps1_2121/F80000.BIN")) { + rom_init(&ps->mid_rom, + "roms/machines/ibmps1_2121/F80000.BIN", + 0xf80000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL); + } rom_init(&ps->high_rom, "roms/machines/ibmps1_2121/FC0000.BIN", 0xfc0000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL); From b91ab53c0f40797dc14a1dc23c71e79172948270 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 23:44:21 +0200 Subject: [PATCH 068/386] Marked the DataExpert EXP8551 as having a gameport. --- src/machine/machine_table.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index d671cfabe..ac4a4e9c7 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -633,7 +633,7 @@ const machine_t machines[] = { /* Has AMIKey F KBC firmware. */ { "[i430FX] AMI Apollo", "apollo", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_INTEL_430FX, machine_at_apollo_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 2.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, /* Has AMIKey H KBC firmware. */ - { "[i430FX] DataExpert EXP8551", "exp8551", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_INTEL_430FX, machine_at_exp8551_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { "[i430FX] DataExpert EXP8551", "exp8551", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_INTEL_430FX, machine_at_exp8551_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL | MACHINE_GAMEPORT, 8192, 131072, 8192, 127, NULL, NULL }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. Command 0xA0 copyright string: (C)1994 AMI . */ @@ -842,6 +842,10 @@ const machine_t machines[] = { /* 450KX */ /* This has an AMIKey-2, which is an updated version of type 'H'. */ { "[i450KX] ASUS P/I-P6RP4", "p6rp4", MACHINE_TYPE_SOCKET8, MACHINE_CHIPSET_INTEL_450KX, machine_at_p6rp4_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET8, CPU_BLOCK_NONE, 60000000, 66666667, 2100, 3500, 1.5, 8.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 524288, 8192, 127, NULL, NULL }, + /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the + PC87306 Super I/O chip, command 0xA1 returns '5'. + Command 0xA0 copyright string: (C)1994 AMI . */ + { "[i450KX] Intel Performance/AU", "aurora", MACHINE_TYPE_SOCKET8, MACHINE_CHIPSET_INTEL_450KX, machine_at_aurora_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET8, CPU_BLOCK_NONE, 60000000, 66666667, 2100, 3500, 1.5, 8.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 524288, 8192, 127, NULL, NULL }, /* 440FX */ /* Has the SMC FDC73C935's on-chip KBC with Phoenix MultiKey firmware. */ From 69d0ff454c7d7c1dab11b70ff548ed514a62299c Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 23:45:25 +0200 Subject: [PATCH 069/386] A game/gameport.c change. --- src/game/gameport.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/src/game/gameport.c b/src/game/gameport.c index 20ea51ffa..5f845b485 100644 --- a/src/game/gameport.c +++ b/src/game/gameport.c @@ -698,3 +698,17 @@ const device_t gameport_sio_device = { .force_redraw = NULL, .config = NULL }; + +const device_t gameport_sio_1io_device = { + .name = "Game port (Super I/O, 1 I/O port)", + .internal_name = "gameport_sio", + .flags = 0, + .local = 0x1010000, + .init = gameport_init, + .close = gameport_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; From 25783f137d17c6c57715cb1b02abd56a5ad1806d Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 23:48:18 +0200 Subject: [PATCH 070/386] ALi M6117-related memory and ROM fixes. --- src/mem/mem.c | 43 ++++++++++++++++++++++++++++--------------- src/mem/rom.c | 13 +++++++++++-- src/mem/sst_flash.c | 15 +++++++++++---- 3 files changed, 50 insertions(+), 21 deletions(-) diff --git a/src/mem/mem.c b/src/mem/mem.c index 4a54c72f2..bc4e34691 100644 --- a/src/mem/mem.c +++ b/src/mem/mem.c @@ -1319,7 +1319,6 @@ writememll(uint32_t addr, uint32_t val) uint32_t readmemll_no_mmut(uint32_t addr, uint32_t *a64) { -#ifndef NO_MMUT mem_mapping_t *map; GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_READ, 4); @@ -1367,9 +1366,6 @@ readmemll_no_mmut(uint32_t addr, uint32_t *a64) ((uint32_t) (map->read_b(addr + 3, map->p)) << 24); return 0xffffffff; -#else - return readmemll(addr); -#endif } @@ -1377,7 +1373,6 @@ readmemll_no_mmut(uint32_t addr, uint32_t *a64) void writememll_no_mmut(uint32_t addr, uint32_t *a64, uint32_t val) { -#ifndef NO_MMUT mem_mapping_t *map; GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_WRITE, 4); @@ -1435,9 +1430,6 @@ writememll_no_mmut(uint32_t addr, uint32_t *a64, uint32_t val) map->write_b(addr + 3, val >> 24, map->p); return; } -#else - writememll(addr, val); -#endif } @@ -1668,7 +1660,7 @@ mem_readb_phys(uint32_t addr) if (map) { if (map->exec) - ret = map->exec[addr - map->base]; + ret = map->exec[(addr - map->base) & map->mask]; else if (map->read_b) ret = map->read_b(addr, map->p); } @@ -1686,7 +1678,7 @@ mem_readw_phys(uint32_t addr) mem_logical_addr = 0xffffffff; if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_HBOUND) && (map && map->exec)) { - p = (uint16_t *) &(map->exec[addr - map->base]); + p = (uint16_t *) &(map->exec[(addr - map->base) & map->mask]); ret = *p; } else if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_HBOUND) && (map && map->read_w)) ret = map->read_w(addr, map->p); @@ -1708,7 +1700,7 @@ mem_readl_phys(uint32_t addr) mem_logical_addr = 0xffffffff; if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_QBOUND) && (map && map->exec)) { - p = (uint32_t *) &(map->exec[addr - map->base]); + p = (uint32_t *) &(map->exec[(addr - map->base) & map->mask]); ret = *p; } else if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_QBOUND) && (map && map->read_l)) ret = map->read_l(addr, map->p); @@ -1750,7 +1742,7 @@ mem_writeb_phys(uint32_t addr, uint8_t val) if (map) { if (map->exec) - map->exec[addr - map->base] = val; + map->exec[(addr - map->base) & map->mask] = val; else if (map->write_b) map->write_b(addr, val, map->p); } @@ -1766,7 +1758,7 @@ mem_writew_phys(uint32_t addr, uint16_t val) mem_logical_addr = 0xffffffff; if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_HBOUND) && (map && map->exec)) { - p = (uint16_t *) &(map->exec[addr - map->base]); + p = (uint16_t *) &(map->exec[(addr - map->base) & map->mask]); *p = val; } else if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_HBOUND) && (map && map->write_w)) map->write_w(addr, val, map->p); @@ -1786,7 +1778,7 @@ mem_writel_phys(uint32_t addr, uint32_t val) mem_logical_addr = 0xffffffff; if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_QBOUND) && (map && map->exec)) { - p = (uint32_t *) &(map->exec[addr - map->base]); + p = (uint32_t *) &(map->exec[(addr - map->base) & map->mask]); *p = val; } else if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_QBOUND) && (map && map->write_l)) map->write_l(addr, val, map->p); @@ -2362,6 +2354,7 @@ mem_mapping_set(mem_mapping_t *map, map->enable = 0; map->base = base; map->size = size; + map->mask = (map->size ? 0xffffffff : 0x00000000); map->read_b = read_b; map->read_w = read_w; map->read_l = read_l; @@ -2479,6 +2472,15 @@ mem_mapping_set_exec(mem_mapping_t *map, uint8_t *exec) } +void +mem_mapping_set_mask(mem_mapping_t *map, uint32_t mask) +{ + map->mask = mask; + + mem_mapping_recalc(map->base, map->size); +} + + void mem_mapping_set_p(mem_mapping_t *map, void *p) { @@ -2560,6 +2562,8 @@ mem_a20_init(void) { if (is286) { rammask = cpu_16bitbus ? 0xefffff : 0xffefffff; + if (is6117) + rammask |= 0x03000000; flushmmucache(); mem_a20_state = mem_a20_key | mem_a20_alt; } else { @@ -2690,6 +2694,9 @@ mem_reset(void) if (cpu_16bitbus) { /* 80286/386SX; maximum address space is 16MB. */ m = 4096; + /* ALi M6117; maximum address space is 64MB. */ + if (is6117) + m <<= 2; } else { /* 80386DX+; maximum address space is 4GB. */ m = 1048576; @@ -2761,8 +2768,10 @@ mem_reset(void) mem_init_ram_mapping(&ram_low_mapping, 0x000000, (mem_size > 640) ? 0xa0000 : mem_size * 1024); if (mem_size > 1024) { - if (cpu_16bitbus && mem_size > 16256) + if (cpu_16bitbus && !is6117 && mem_size > 16256) mem_init_ram_mapping(&ram_high_mapping, 0x100000, (16256 - 1024) * 1024); + else if (cpu_16bitbus && is6117 && mem_size > 65408) + mem_init_ram_mapping(&ram_high_mapping, 0x100000, (65408 - 1024) * 1024); else { if (mem_size > 1048576) { mem_init_ram_mapping(&ram_high_mapping, 0x100000, (1048576 - 1024) * 1024); @@ -2904,9 +2913,13 @@ mem_a20_recalc(void) state = mem_a20_key | mem_a20_alt; if (state && !mem_a20_state) { rammask = (cpu_16bitbus) ? 0xffffff : 0xffffffff; + if (is6117) + rammask |= 0x03000000; flushmmucache(); } else if (!state && mem_a20_state) { rammask = (cpu_16bitbus) ? 0xefffff : 0xffefffff; + if (is6117) + rammask |= 0x03000000; flushmmucache(); } diff --git a/src/mem/rom.c b/src/mem/rom.c index 62b03bc11..eb2b5791b 100644 --- a/src/mem/rom.c +++ b/src/mem/rom.c @@ -451,12 +451,13 @@ static void bios_add(void) { int temp_cpu_type, temp_cpu_16bitbus = 1; - int temp_is286 = 0; + int temp_is286 = 0, temp_is6117 = 0; if (/*AT && */cpu_s) { temp_cpu_type = cpu_s->cpu_type; temp_cpu_16bitbus = (temp_cpu_type == CPU_286 || temp_cpu_type == CPU_386SX || temp_cpu_type == CPU_486SLC || temp_cpu_type == CPU_IBM386SLC || temp_cpu_type == CPU_IBM486SLC ); temp_is286 = (temp_cpu_type >= CPU_286); + temp_is6117 = !strcmp(cpu_f->manufacturer, "ALi"); } if (biosmask > 0x1ffff) { @@ -478,7 +479,15 @@ bios_add(void) MEM_READ_ROMCS | MEM_WRITE_ROMCS); } - if (temp_is286) { + if (temp_is6117) { + mem_mapping_add(&bios_high_mapping, biosaddr | 0x03f00000, biosmask + 1, + bios_read,bios_readw,bios_readl, + NULL,NULL,NULL, + rom, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, 0); + + mem_set_mem_state_both(biosaddr | 0x03f00000, biosmask + 1, + MEM_READ_ROMCS | MEM_WRITE_ROMCS); + } else if (temp_is286) { mem_mapping_add(&bios_high_mapping, biosaddr | (temp_cpu_16bitbus ? 0x00f00000 : 0xfff00000), biosmask + 1, bios_read,bios_readw,bios_readl, NULL,NULL,NULL, diff --git a/src/mem/sst_flash.c b/src/mem/sst_flash.c index 1fc5b2082..9aa0d4345 100644 --- a/src/mem/sst_flash.c +++ b/src/mem/sst_flash.c @@ -400,10 +400,17 @@ sst_add_mappings(sst_t *dev) sst_write, NULL, NULL, dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev); } - mem_mapping_add(&(dev->mapping_h[i]), (base | (cpu_16bitbus ? 0xf00000 : 0xfff00000)), 0x10000, - sst_read, sst_readw, sst_readl, - sst_write, NULL, NULL, - dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev); + if (is6117) { + mem_mapping_add(&(dev->mapping_h[i]), (base | 0x3f00000), 0x10000, + sst_read, sst_readw, sst_readl, + sst_write, NULL, NULL, + dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev); + } else { + mem_mapping_add(&(dev->mapping_h[i]), (base | (cpu_16bitbus ? 0xf00000 : 0xfff00000)), 0x10000, + sst_read, sst_readw, sst_readl, + sst_write, NULL, NULL, + dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev); + } } } From 5dc9b4a7fca84760fe8d08d741563d4b430c20f4 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 23:53:05 +0200 Subject: [PATCH 071/386] Super I/O chip fixes. --- src/sio/sio_82091aa.c | 30 +++++++++++++++++++++++------- src/sio/sio_w83787f.c | 24 +++++++++++++++++++++++- 2 files changed, 46 insertions(+), 8 deletions(-) diff --git a/src/sio/sio_82091aa.c b/src/sio/sio_82091aa.c index e385bcd2d..7a60aa7c4 100644 --- a/src/sio/sio_82091aa.c +++ b/src/sio/sio_82091aa.c @@ -125,11 +125,13 @@ serial_handler(i82091aa_t *dev, int uart) static void ide_handler(i82091aa_t *dev) { - ide_sec_disable(); - ide_set_base(1, (dev->regs[0x50] & 0x02) ? 0x170 : 0x1f0); - ide_set_side(1, (dev->regs[0x50] & 0x02) ? 0x376 : 0x3f6); + int board = dev->has_ide - 1; + + ide_remove_handlers(board); + ide_set_base(board, (dev->regs[0x50] & 0x02) ? 0x170 : 0x1f0); + ide_set_side(board, (dev->regs[0x50] & 0x02) ? 0x376 : 0x3f6); if (dev->regs[0x50] & 0x01) - ide_sec_enable(); + ide_set_handlers(board); } @@ -258,7 +260,7 @@ i82091aa_init(const device_t *info) dev->uart[0] = device_add_inst(&ns16550_device, 1); dev->uart[1] = device_add_inst(&ns16550_device, 2); - dev->has_ide = !!(info->local & 0x200); + dev->has_ide = (info->local >> 9) & 0x03; i82091aa_reset(dev); @@ -303,8 +305,8 @@ const device_t i82091aa_398_device = { .config = NULL }; -const device_t i82091aa_ide_device = { - .name = "Intel 82091AA Super I/O (With IDE)", +const device_t i82091aa_ide_pri_device = { + .name = "Intel 82091AA Super I/O (With Primary IDE)", .internal_name = "i82091aa_ide", .flags = 0, .local = 0x240, @@ -316,3 +318,17 @@ const device_t i82091aa_ide_device = { .force_redraw = NULL, .config = NULL }; + +const device_t i82091aa_ide_device = { + .name = "Intel 82091AA Super I/O (With IDE)", + .internal_name = "i82091aa_ide", + .flags = 0, + .local = 0x440, + .init = i82091aa_init, + .close = i82091aa_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; diff --git a/src/sio/sio_w83787f.c b/src/sio/sio_w83787f.c index fe48f5d79..393ab5fd9 100644 --- a/src/sio/sio_w83787f.c +++ b/src/sio/sio_w83787f.c @@ -34,6 +34,7 @@ #include <86box/fdc.h> #include <86box/hdc.h> #include <86box/hdc_ide.h> +#include <86box/gameport.h> #include <86box/sio.h> #ifdef ENABLE_W83787_LOG @@ -82,6 +83,7 @@ typedef struct { ide_start; fdc_t *fdc; serial_t *uart[2]; + void *gameport; } w83787f_t; @@ -200,6 +202,16 @@ w83787f_lpt_handler(w83787f_t *dev) } +static void +w83787f_gameport_handler(w83787f_t *dev) +{ + if (!(dev->regs[3] & 0x40) && !(dev->regs[4] & 0x40)) + gameport_remap(dev->gameport, 0x201); + else + gameport_remap(dev->gameport, 0); +} + + static void w83787f_fdc_handler(w83787f_t *dev) { @@ -282,6 +294,8 @@ w83787f_write(uint16_t port, uint8_t val, void *priv) case 3: if (valxor & 0x80) w83787f_lpt_handler(dev); + if (valxor & 0x40) + w83787f_gameport_handler(dev); if (valxor & 0x08) w83787f_serial_handler(dev, 0); if (valxor & 0x04) @@ -294,6 +308,8 @@ w83787f_write(uint16_t port, uint8_t val, void *priv) w83787f_serial_handler(dev, 0); if (valxor & 0x80) w83787f_lpt_handler(dev); + if (valxor & 0x40) + w83787f_gameport_handler(dev); break; case 6: if (valxor & 0x08) @@ -392,16 +408,20 @@ w83787f_reset(w83787f_t *dev) fdc_reset(dev->fdc); dev->regs[0x01] = 0x2C; - dev->regs[0x03] = 0x30; + dev->regs[0x03] = 0x70; dev->regs[0x07] = 0xF5; dev->regs[0x09] = dev->reg_init & 0xff; dev->regs[0x0a] = 0x1F; dev->regs[0x0c] = 0x2C; dev->regs[0x0d] = 0xA3; + gameport_remap(dev->gameport, 0); + serial_setup(dev->uart[0], COM1_ADDR, COM1_IRQ); serial_setup(dev->uart[1], COM2_ADDR, COM2_IRQ); + w83787f_lpt_handler(dev); + dev->key = 0x89; w83787f_remap(dev); @@ -433,6 +453,8 @@ w83787f_init(const device_t *info) dev->uart[0] = device_add_inst(&ns16550_device, 1); dev->uart[1] = device_add_inst(&ns16550_device, 2); + dev->gameport = gameport_add(&gameport_sio_1io_device); + if ((dev->ide_function & 0x30) == 0x10) device_add(&ide_isa_device); From 74fd270ee8efee918e7d09ff84620b45843d7639 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 23:55:30 +0200 Subject: [PATCH 072/386] Assorted SB fixes. --- src/sound/snd_sb.c | 22 ++++++++++++++++++++++ src/sound/snd_sb_dsp.c | 32 ++++++++++++++++---------------- 2 files changed, 38 insertions(+), 16 deletions(-) diff --git a/src/sound/snd_sb.c b/src/sound/snd_sb.c index 247455036..aaafd11fa 100644 --- a/src/sound/snd_sb.c +++ b/src/sound/snd_sb.c @@ -1816,6 +1816,16 @@ sb_16_pnp_init(const device_t *info) isapnp_add_card(sb_16_pnp_rom, sizeof(sb_16_pnp_rom), sb_16_pnp_config_changed, NULL, NULL, NULL, sb); + sb_dsp_setaddr(&sb->dsp, 0); + sb_dsp_setirq(&sb->dsp, 0); + sb_dsp_setdma8(&sb->dsp, ISAPNP_DMA_DISABLED); + sb_dsp_setdma16(&sb->dsp, ISAPNP_DMA_DISABLED); + + mpu401_change_addr(sb->mpu, 0); + ide_remove_handlers(2); + + gameport_remap(sb->gameport, 0); + return sb; } @@ -2017,6 +2027,18 @@ sb_awe32_pnp_init(const device_t *info) break; } + sb_dsp_setaddr(&sb->dsp, 0); + sb_dsp_setirq(&sb->dsp, 0); + sb_dsp_setdma8(&sb->dsp, ISAPNP_DMA_DISABLED); + sb_dsp_setdma16(&sb->dsp, ISAPNP_DMA_DISABLED); + + mpu401_change_addr(sb->mpu, 0); + ide_remove_handlers(2); + + emu8k_change_addr(&sb->emu8k, 0); + + gameport_remap(sb->gameport, 0); + return sb; } diff --git a/src/sound/snd_sb_dsp.c b/src/sound/snd_sb_dsp.c index c87f45e2f..3cbb223f3 100644 --- a/src/sound/snd_sb_dsp.c +++ b/src/sound/snd_sb_dsp.c @@ -326,14 +326,14 @@ void sb_dsp_speed_changed(sb_dsp_t *dsp) { if (dsp->sb_timeo < 256) - dsp->sblatcho = TIMER_USEC * (256 - dsp->sb_timeo); + dsp->sblatcho = (256.0 - (double) dsp->sb_timeo); else - dsp->sblatcho = (uint64_t) (TIMER_USEC * (1000000.0f / (float) (dsp->sb_timeo - 256))); + dsp->sblatcho = ((1000000.0 / ((double) dsp->sb_timeo - 256.0))); if (dsp->sb_timei < 256) - dsp->sblatchi = TIMER_USEC * (256 - dsp->sb_timei); + dsp->sblatchi = (256.0 - (double) dsp->sb_timei); else - dsp->sblatchi = (uint64_t) (TIMER_USEC * (1000000.0f / (float) (dsp->sb_timei - 256))); + dsp->sblatchi = ((1000000.0 / ((double) dsp->sb_timei - 256.0))); } void @@ -359,7 +359,7 @@ sb_start_dma(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len) dsp->sb_16_enable = 0; dsp->sb_8_output = 1; if (!timer_is_enabled(&dsp->output_timer)) - timer_set_delay_u64(&dsp->output_timer, dsp->sblatcho); + timer_on_auto(&dsp->output_timer, dsp->sblatcho); dsp->sbleftright = dsp->sbleftright_default; dsp->sbdacpos = 0; } else { @@ -372,7 +372,7 @@ sb_start_dma(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len) dsp->sb_8_enable = 0; dsp->sb_16_output = 1; if (!timer_is_enabled(&dsp->output_timer)) - timer_set_delay_u64(&dsp->output_timer, dsp->sblatcho); + timer_on_auto(&dsp->output_timer, dsp->sblatcho); } } @@ -389,7 +389,7 @@ sb_start_dma_i(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len) dsp->sb_16_enable = 0; dsp->sb_8_output = 0; if (!timer_is_enabled(&dsp->input_timer)) - timer_set_delay_u64(&dsp->input_timer, dsp->sblatchi); + timer_on_auto(&dsp->input_timer, dsp->sblatchi); } else { dsp->sb_16_length = dsp->sb_16_origlength = len; dsp->sb_16_format = format; @@ -400,7 +400,7 @@ sb_start_dma_i(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len) dsp->sb_8_enable = 0; dsp->sb_16_output = 0; if (!timer_is_enabled(&dsp->input_timer)) - timer_set_delay_u64(&dsp->input_timer, dsp->sblatchi); + timer_on_auto(&dsp->input_timer, dsp->sblatchi); } memset(dsp->record_buffer, 0, sizeof(dsp->record_buffer)); @@ -508,10 +508,10 @@ sb_exec_command(sb_dsp_t *dsp) mode does not imply such samplerate. Position is increased in sb_poll_i(). */ if (!timer_is_enabled(&dsp->input_timer)) { dsp->sb_timei = 256 - 22; - dsp->sblatchi = TIMER_USEC * 22; + dsp->sblatchi = 22.0; temp = 1000000 / 22; dsp->sb_freq = temp; - timer_set_delay_u64(&dsp->input_timer, dsp->sblatchi); + timer_on_auto(&dsp->input_timer, dsp->sblatchi); } break; case 0x24: /* 8-bit single cycle DMA input */ @@ -561,7 +561,7 @@ sb_exec_command(sb_dsp_t *dsp) break; case 0x40: /* Set time constant */ dsp->sb_timei = dsp->sb_timeo = dsp->sb_data[0]; - dsp->sblatcho = dsp->sblatchi = TIMER_USEC * (256 - dsp->sb_data[0]); + dsp->sblatcho = dsp->sblatchi = (256.0 - (double) dsp->sb_data[0]); temp = 256 - dsp->sb_data[0]; temp = 1000000 / temp; sb_dsp_log("Sample rate - %ihz (%i)\n", temp, dsp->sblatcho); @@ -572,8 +572,8 @@ sb_exec_command(sb_dsp_t *dsp) case 0x41: /* Set output sampling rate */ case 0x42: /* Set input sampling rate */ if (dsp->sb_type >= SB16) { - dsp->sblatcho = (uint64_t) (TIMER_USEC * (1000000.0f / (float) (dsp->sb_data[1] + (dsp->sb_data[0] << 8)))); - sb_dsp_log("Sample rate - %ihz (%i)\n", dsp->sb_data[1] + (dsp->sb_data[0] << 8), dsp->sblatcho); + dsp->sblatcho = ((1000000.0 / (double) (dsp->sb_data[1] + (dsp->sb_data[0] << 8)))); + sb_dsp_log("Sample rate - %ihz (%lf)\n", dsp->sb_data[1] + (dsp->sb_data[0] << 8), dsp->sblatcho); temp = dsp->sb_freq; dsp->sb_freq = dsp->sb_data[1] + (dsp->sb_data[0] << 8); dsp->sb_timeo = 256LL + dsp->sb_freq; @@ -631,7 +631,7 @@ sb_exec_command(sb_dsp_t *dsp) case 0x80: /* Pause DAC */ dsp->sb_pausetime = dsp->sb_data[0] + (dsp->sb_data[1] << 8); if (!timer_is_enabled(&dsp->output_timer)) - timer_set_delay_u64(&dsp->output_timer, dsp->sblatcho); + timer_on_auto(&dsp->output_timer, dsp->sblatcho); break; case 0x90: /* High speed 8-bit autoinit DMA output */ if (dsp->sb_type >= SB2) @@ -1200,7 +1200,7 @@ pollsb(void *p) int tempi, ref; int data[2]; - timer_advance_u64(&dsp->output_timer, dsp->sblatcho); + timer_on_auto(&dsp->output_timer, dsp->sblatcho); if (dsp->sb_8_enable && !dsp->sb_8_pause && dsp->sb_pausetime < 0 && dsp->sb_8_output) { sb_dsp_update(dsp); @@ -1457,7 +1457,7 @@ sb_poll_i(void *p) sb_dsp_t *dsp = (sb_dsp_t *) p; int processed = 0; - timer_advance_u64(&dsp->input_timer, dsp->sblatchi); + timer_on_auto(&dsp->input_timer, dsp->sblatchi); if (dsp->sb_8_enable && !dsp->sb_8_pause && dsp->sb_pausetime < 0 && !dsp->sb_8_output) { switch (dsp->sb_8_format) { From 3bcb9f6310d24ce518f4ee22609eef0e9c0cad5f Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 23:56:21 +0200 Subject: [PATCH 073/386] Cleaned up the (S)VGA render code of excess CRTC checks. --- src/video/vid_svga.c | 4 +- src/video/vid_svga_render.c | 770 +++++++++++++++--------------------- 2 files changed, 322 insertions(+), 452 deletions(-) diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index 542ab13e0..d7a122cb4 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -460,7 +460,7 @@ svga_recalctimings(svga_t *svga) svga->hdisp_time = svga->hdisp; svga->render = svga_render_blank; - if (!svga->scrblank && svga->attr_palette_enable) { + if (!svga->scrblank && (svga->crtc[0x17] & 0x80) && svga->attr_palette_enable) { if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /*Text mode*/ if (svga->seqregs[1] & 8) /*40 column*/ { svga->render = svga_render_text_40; @@ -658,6 +658,7 @@ svga_poll(void *p) uint32_t x, blink_delay; int wx, wy; int ret, old_ma; + int old_vc; if (!vga_on && ibm8514_enabled && ibm8514_on) { ibm8514_poll(&svga->dev8514, svga); @@ -786,6 +787,7 @@ svga_poll(void *p) return; svga->vc++; + old_vc = svga->vc; svga->vc &= 2047; if (svga->vc == svga->split) { diff --git a/src/video/vid_svga_render.c b/src/video/vid_svga_render.c index ca9c3b3f1..c4b817fd4 100644 --- a/src/video/vid_svga_render.c +++ b/src/video/vid_svga_render.c @@ -136,16 +136,13 @@ svga_render_text_40(svga_t *svga) drawcursor = ((svga->ma == svga->ca) && svga->con && svga->cursoron); - if (svga->crtc[0x17] & 0x80) { - if (svga->force_old_addr) { - chr = svga->vram[(svga->ma << 1) & svga->vram_display_mask]; - attr = svga->vram[((svga->ma << 1) + 1) & svga->vram_display_mask]; - } else { - chr = svga->vram[addr]; - attr = svga->vram[addr+1]; - } - } else - chr = attr = 0; + if (svga->force_old_addr) { + chr = svga->vram[(svga->ma << 1) & svga->vram_display_mask]; + attr = svga->vram[((svga->ma << 1) + 1) & svga->vram_display_mask]; + } else { + chr = svga->vram[addr]; + attr = svga->vram[addr+1]; + } if (attr & 8) charaddr = svga->charsetb + (chr * 128); else charaddr = svga->charseta + (chr * 128); @@ -212,16 +209,13 @@ svga_render_text_80(svga_t *svga) drawcursor = ((svga->ma == svga->ca) && svga->con && svga->cursoron); - if (svga->crtc[0x17] & 0x80) { - if (svga->force_old_addr) { - chr = svga->vram[(svga->ma << 1) & svga->vram_display_mask]; - attr = svga->vram[((svga->ma << 1) + 1) & svga->vram_display_mask]; - } else { - chr = svga->vram[addr]; - attr = svga->vram[addr+1]; - } - } else - chr = attr = 0; + if (svga->force_old_addr) { + chr = svga->vram[(svga->ma << 1) & svga->vram_display_mask]; + attr = svga->vram[((svga->ma << 1) + 1) & svga->vram_display_mask]; + } else { + chr = svga->vram[addr]; + attr = svga->vram[addr+1]; + } if (attr & 8) charaddr = svga->charsetb + (chr * 128); else charaddr = svga->charseta + (chr * 128); @@ -286,10 +280,7 @@ svga_render_text_80_ksc5601(svga_t *svga) drawcursor = ((svga->ma == svga->ca) && svga->con && svga->cursoron); chr = svga->vram[addr]; nextchr = svga->vram[addr + 8]; - if (svga->crtc[0x17] & 0x80) - attr = svga->vram[addr + 1]; - else - attr = 0; + attr = svga->vram[addr + 1]; if (drawcursor) { bg = svga->pallook[svga->egapal[attr & 15]]; @@ -433,17 +424,14 @@ svga_render_2bpp_lowres(svga_t *svga) else svga->ma += 4; svga->ma &= svga->vram_mask; - if (svga->crtc[0x17] & 0x80) { - p[0] = p[1] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; - p[2] = p[3] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; - p[4] = p[5] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; - p[6] = p[7] = svga->pallook[svga->egapal[dat[0] & 3]]; - p[8] = p[9] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; - p[10] = p[11] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; - p[12] = p[13] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; - p[14] = p[15] = svga->pallook[svga->egapal[dat[1] & 3]]; - } else - memset(p, 0x00, 16 * sizeof(uint32_t)); + p[0] = p[1] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; + p[2] = p[3] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; + p[4] = p[5] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; + p[6] = p[7] = svga->pallook[svga->egapal[dat[0] & 3]]; + p[8] = p[9] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; + p[10] = p[11] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; + p[12] = p[13] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; + p[14] = p[15] = svga->pallook[svga->egapal[dat[1] & 3]]; p += 16; } } @@ -469,17 +457,14 @@ svga_render_2bpp_lowres(svga_t *svga) svga->ma &= svga->vram_mask; - if (svga->crtc[0x17] & 0x80) { - p[0] = p[1] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; - p[2] = p[3] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; - p[4] = p[5] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; - p[6] = p[7] = svga->pallook[svga->egapal[dat[0] & 3]]; - p[8] = p[9] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; - p[10] = p[11] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; - p[12] = p[13] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; - p[14] = p[15] = svga->pallook[svga->egapal[dat[1] & 3]]; - } else - memset(p, 0x00, 16 * sizeof(uint32_t)); + p[0] = p[1] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; + p[2] = p[3] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; + p[4] = p[5] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; + p[6] = p[7] = svga->pallook[svga->egapal[dat[0] & 3]]; + p[8] = p[9] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; + p[10] = p[11] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; + p[12] = p[13] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; + p[14] = p[15] = svga->pallook[svga->egapal[dat[1] & 3]]; p += 16; } @@ -537,17 +522,14 @@ svga_render_2bpp_highres(svga_t *svga) else svga->ma += 4; svga->ma &= svga->vram_mask; - if (svga->crtc[0x17] & 0x80) { - p[0] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; - p[1] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; - p[2] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; - p[3] = svga->pallook[svga->egapal[dat[0] & 3]]; - p[4] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; - p[5] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; - p[6] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; - p[7] = svga->pallook[svga->egapal[dat[1] & 3]]; - } else - memset(p, 0x00, 8 * sizeof(uint32_t)); + p[0] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; + p[1] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; + p[2] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; + p[3] = svga->pallook[svga->egapal[dat[0] & 3]]; + p[4] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; + p[5] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; + p[6] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; + p[7] = svga->pallook[svga->egapal[dat[1] & 3]]; p += 8; } } @@ -573,17 +555,14 @@ svga_render_2bpp_highres(svga_t *svga) svga->ma &= svga->vram_mask; - if (svga->crtc[0x17] & 0x80) { - p[0] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; - p[1] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; - p[2] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; - p[3] = svga->pallook[svga->egapal[dat[0] & 3]]; - p[4] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; - p[5] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; - p[6] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; - p[7] = svga->pallook[svga->egapal[dat[1] & 3]]; - } else - memset(p, 0x00, 8 * sizeof(uint32_t)); + p[0] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; + p[1] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; + p[2] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; + p[3] = svga->pallook[svga->egapal[dat[0] & 3]]; + p[4] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; + p[5] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; + p[6] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; + p[7] = svga->pallook[svga->egapal[dat[1] & 3]]; p += 8; } @@ -629,21 +608,18 @@ svga_render_2bpp_headland_highres(svga_t *svga) svga->ma += 4; svga->ma &= svga->vram_mask; - if (svga->crtc[0x17] & 0x80) { - dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); - p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); - p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); - p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); - p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - } else - memset(p, 0x00, 8 * sizeof(uint32_t)); + dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); + p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); + p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); + p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); + p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; p += 8; } @@ -704,21 +680,18 @@ svga_render_4bpp_lowres(svga_t *svga) } svga->ma &= svga->vram_mask; - if (svga->crtc[0x17] & 0x80) { - dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); - p[0] = p[1] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[2] = p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); - p[4] = p[5] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[6] = p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); - p[8] = p[9] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[10] = p[11] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); - p[12] = p[13] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[14] = p[15] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - } else - memset(p, 0x00, 16 * sizeof(uint32_t)); + dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); + p[0] = p[1] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[2] = p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); + p[4] = p[5] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[6] = p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); + p[8] = p[9] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[10] = p[11] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); + p[12] = p[13] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[14] = p[15] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; p += 16; } @@ -749,21 +722,18 @@ svga_render_4bpp_lowres(svga_t *svga) } svga->ma &= svga->vram_mask; - if (svga->crtc[0x17] & 0x80) { - dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); - p[0] = p[1] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[2] = p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); - p[4] = p[5] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[6] = p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); - p[8] = p[9] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[10] = p[11] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); - p[12] = p[13] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[14] = p[15] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - } else - memset(p, 0x00, 16 * sizeof(uint32_t)); + dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); + p[0] = p[1] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[2] = p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); + p[4] = p[5] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[6] = p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); + p[8] = p[9] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[10] = p[11] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); + p[12] = p[13] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[14] = p[15] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; p += 16; } @@ -829,21 +799,18 @@ svga_render_4bpp_highres(svga_t *svga) } svga->ma &= svga->vram_mask; - if (svga->crtc[0x17] & 0x80) { - dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); - p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); - p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); - p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); - p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - } else - memset(p, 0x00, 8 * sizeof(uint32_t)); + dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); + p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); + p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); + p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); + p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; p += 8; } @@ -874,21 +841,18 @@ svga_render_4bpp_highres(svga_t *svga) } svga->ma &= svga->vram_mask; - if (svga->crtc[0x17] & 0x80) { - dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); - p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); - p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); - p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); - p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - } else - memset(p, 0x00, 8 * sizeof(uint32_t)); + dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); + p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); + p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); + p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); + p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; p += 8; } @@ -1071,25 +1035,22 @@ svga_render_8bpp_tseng_lowres(svga_t *svga) svga->lastline_draw = svga->displine; for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - if (svga->crtc[0x17] & 0x80) { - dat = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[0] = p[1] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[2] = p[3] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[4] = p[5] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[6] = p[7] = svga->map8[dat & 0xff]; - } else - memset(p, 0x00, 8 * sizeof(uint32_t)); + dat = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[0] = p[1] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[2] = p[3] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[4] = p[5] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[6] = p[7] = svga->map8[dat & 0xff]; svga->ma += 4; p += 8; @@ -1117,42 +1078,39 @@ svga_render_8bpp_tseng_highres(svga_t *svga) svga->lastline_draw = svga->displine; for (x = 0; x <= (svga->hdisp/* + svga->scrollcache*/); x += 8) { - if (svga->crtc[0x17] & 0x80) { - dat = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[0] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[1] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[2] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[3] = svga->map8[dat & 0xff]; + dat = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[0] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[1] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[2] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[3] = svga->map8[dat & 0xff]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[4] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[5] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[6] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[7] = svga->map8[dat & 0xff]; - } else - memset(p, 0x00, 8 * sizeof(uint32_t)); + dat = *(uint32_t *)(&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[4] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[5] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[6] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[7] = svga->map8[dat & 0xff]; svga->ma += 8; p += 8; @@ -1181,19 +1139,16 @@ svga_render_15bpp_lowres(svga_t *svga) svga->firstline_draw = svga->displine; svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - if (svga->crtc[0x17] & 0x80) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + if (svga->crtc[0x17] & 0x80) { + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - p[(x << 1)] = p[(x << 1) + 1] = video_15to32[dat & 0xffff]; - p[(x << 1) + 2] = p[(x << 1) + 3] = video_15to32[dat >> 16]; + p[(x << 1)] = p[(x << 1) + 1] = video_15to32[dat & 0xffff]; + p[(x << 1) + 2] = p[(x << 1) + 3] = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - p[(x << 1) + 4] = p[(x << 1) + 5] = video_15to32[dat & 0xffff]; - p[(x << 1) + 6] = p[(x << 1) + 7] = video_15to32[dat >> 16]; - } else - memset(&(p[(x << 1)]), 0x00, 8 * sizeof(uint32_t)); + p[(x << 1) + 4] = p[(x << 1) + 5] = video_15to32[dat & 0xffff]; + p[(x << 1) + 6] = p[(x << 1) + 7] = video_15to32[dat >> 16]; } svga->ma += x << 1; svga->ma &= svga->vram_display_mask; @@ -1210,30 +1165,24 @@ svga_render_15bpp_lowres(svga_t *svga) if (!svga->remap_required) { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - if (svga->crtc[0x17] & 0x80) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; - } else - memset(&(p[(x << 1)]), 0x00, 8 * sizeof(uint32_t)); + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; } svga->ma += x << 1; } else { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 2) { - if (svga->crtc[0x17] & 0x80) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; - } else - memset(&(p[x]), 0x00, 2 * sizeof(uint32_t)); + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; svga->ma += 4; } } @@ -1263,24 +1212,21 @@ svga_render_15bpp_highres(svga_t *svga) svga->lastline_draw = svga->displine; for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - if (svga->crtc[0x17] & 0x80) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - p[x] = video_15to32[dat & 0xffff]; - p[x + 1] = video_15to32[dat >> 16]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + p[x] = video_15to32[dat & 0xffff]; + p[x + 1] = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - p[x + 2] = video_15to32[dat & 0xffff]; - p[x + 3] = video_15to32[dat >> 16]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + p[x + 2] = video_15to32[dat & 0xffff]; + p[x + 3] = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); - p[x + 4] = video_15to32[dat & 0xffff]; - p[x + 5] = video_15to32[dat >> 16]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); + p[x + 4] = video_15to32[dat & 0xffff]; + p[x + 5] = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); - p[x + 6] = video_15to32[dat & 0xffff]; - p[x + 7] = video_15to32[dat >> 16]; - } else - memset(&(p[x]), 0x00, 8 * sizeof(uint32_t)); + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); + p[x + 6] = video_15to32[dat & 0xffff]; + p[x + 7] = video_15to32[dat >> 16]; } svga->ma += x << 1; svga->ma &= svga->vram_display_mask; @@ -1297,36 +1243,30 @@ svga_render_15bpp_highres(svga_t *svga) if (!svga->remap_required) { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - if (svga->crtc[0x17] & 0x80) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; - } else - memset(&(p[x]), 0x00, 8 * sizeof(uint32_t)); + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; } svga->ma += x << 1; } else { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 2) { - if (svga->crtc[0x17] & 0x80) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; - } else - memset(&(p[x]), 0x00, 2 * sizeof(uint32_t)); + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; svga->ma += 4; } } @@ -1354,20 +1294,17 @@ svga_render_15bpp_mix_lowres(svga_t *svga) svga->lastline_draw = svga->displine; for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - if (svga->crtc[0x17] & 0x80) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - p[(x << 1)] = p[(x << 1) + 1] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + p[(x << 1)] = p[(x << 1) + 1] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat >>= 16; - p[(x << 1) + 2] = p[(x << 1) + 3] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat >>= 16; + p[(x << 1) + 2] = p[(x << 1) + 3] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - p[(x << 1) + 4] = p[(x << 1) + 5] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + p[(x << 1) + 4] = p[(x << 1) + 5] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat >>= 16; - p[(x << 1) + 6] = p[(x << 1) + 7] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - } else - memset(&(p[(x << 1)]), 0x00, 8 * sizeof(uint32_t)); + dat >>= 16; + p[(x << 1) + 6] = p[(x << 1) + 7] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; } svga->ma += x << 1; svga->ma &= svga->vram_display_mask; @@ -1393,28 +1330,25 @@ svga_render_15bpp_mix_highres(svga_t *svga) svga->lastline_draw = svga->displine; for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - if (svga->crtc[0x17] & 0x80) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - p[x] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat >>= 16; - p[x + 1] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + p[x] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat >>= 16; + p[x + 1] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - p[x + 2] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat >>= 16; - p[x + 3] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + p[x + 2] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat >>= 16; + p[x + 3] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); - p[x + 4] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat >>= 16; - p[x + 5] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); + p[x + 4] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat >>= 16; + p[x + 5] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); - p[x + 6] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat >>= 16; - p[x + 7] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - } else - memset(&(p[x]), 0x00, 8 * sizeof(uint32_t)); + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); + p[x + 6] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat >>= 16; + p[x + 7] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; } svga->ma += x << 1; svga->ma &= svga->vram_display_mask; @@ -1442,16 +1376,13 @@ svga_render_16bpp_lowres(svga_t *svga) svga->lastline_draw = svga->displine; for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - if (svga->crtc[0x17] & 0x80) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - p[(x << 1)] = p[(x << 1) + 1] = video_16to32[dat & 0xffff]; - p[(x << 1) + 2] = p[(x << 1) + 3] = video_16to32[dat >> 16]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + p[(x << 1)] = p[(x << 1) + 1] = video_16to32[dat & 0xffff]; + p[(x << 1) + 2] = p[(x << 1) + 3] = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - p[(x << 1) + 4] = p[(x << 1) + 5] = video_16to32[dat & 0xffff]; - p[(x << 1) + 6] = p[(x << 1) + 7] = video_16to32[dat >> 16]; - } else - memset(&(p[(x << 1)]), 0x00, 8 * sizeof(uint32_t)); + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + p[(x << 1) + 4] = p[(x << 1) + 5] = video_16to32[dat & 0xffff]; + p[(x << 1) + 6] = p[(x << 1) + 7] = video_16to32[dat >> 16]; } svga->ma += x << 1; svga->ma &= svga->vram_display_mask; @@ -1468,30 +1399,24 @@ svga_render_16bpp_lowres(svga_t *svga) if (!svga->remap_required) { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - if (svga->crtc[0x17] & 0x80) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - *p++ = video_16to32[dat & 0xffff]; - *p++ = video_16to32[dat >> 16]; + *p++ = video_16to32[dat & 0xffff]; + *p++ = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - *p++ = video_16to32[dat & 0xffff]; - *p++ = video_16to32[dat >> 16]; - } else - memset(&(p[(x << 1)]), 0x00, 8 * sizeof(uint32_t)); + *p++ = video_16to32[dat & 0xffff]; + *p++ = video_16to32[dat >> 16]; } svga->ma += x << 1; } else { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 2) { - if (svga->crtc[0x17] & 0x80) { addr = svga->remap_func(svga, svga->ma); dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); *p++ = video_16to32[dat & 0xffff]; *p++ = video_16to32[dat >> 16]; - } else - memset(&(p[x]), 0x00, 2 * sizeof(uint32_t)); } svga->ma += 4; } @@ -1521,24 +1446,21 @@ svga_render_16bpp_highres(svga_t *svga) svga->lastline_draw = svga->displine; for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - if (svga->crtc[0x17] & 0x80) { - uint32_t dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - p[x] = video_16to32[dat & 0xffff]; - p[x + 1] = video_16to32[dat >> 16]; + uint32_t dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + p[x] = video_16to32[dat & 0xffff]; + p[x + 1] = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - p[x + 2] = video_16to32[dat & 0xffff]; - p[x + 3] = video_16to32[dat >> 16]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + p[x + 2] = video_16to32[dat & 0xffff]; + p[x + 3] = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); - p[x + 4] = video_16to32[dat & 0xffff]; - p[x + 5] = video_16to32[dat >> 16]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); + p[x + 4] = video_16to32[dat & 0xffff]; + p[x + 5] = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); - p[x + 6] = video_16to32[dat & 0xffff]; - p[x + 7] = video_16to32[dat >> 16]; - } else - memset(&(p[x]), 0x00, 8 * sizeof(uint32_t)); + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); + p[x + 6] = video_16to32[dat & 0xffff]; + p[x + 7] = video_16to32[dat >> 16]; } svga->ma += x << 1; svga->ma &= svga->vram_display_mask; @@ -1555,36 +1477,30 @@ svga_render_16bpp_highres(svga_t *svga) if (!svga->remap_required) { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - if (svga->crtc[0x17] & 0x80) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - *p++ = video_16to32[dat & 0xffff]; - *p++ = video_16to32[dat >> 16]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + *p++ = video_16to32[dat & 0xffff]; + *p++ = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - *p++ = video_16to32[dat & 0xffff]; - *p++ = video_16to32[dat >> 16]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + *p++ = video_16to32[dat & 0xffff]; + *p++ = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); - *p++ = video_16to32[dat & 0xffff]; - *p++ = video_16to32[dat >> 16]; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); + *p++ = video_16to32[dat & 0xffff]; + *p++ = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); - *p++ = video_16to32[dat & 0xffff]; - *p++ = video_16to32[dat >> 16]; - } else - memset(&(p[x]), 0x00, 8 * sizeof(uint32_t)); + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); + *p++ = video_16to32[dat & 0xffff]; + *p++ = video_16to32[dat >> 16]; } svga->ma += x << 1; } else { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 2) { - if (svga->crtc[0x17] & 0x80) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - *p++ = video_16to32[dat & 0xffff]; - *p++ = video_16to32[dat >> 16]; - } else - memset(&(p[x]), 0x00, 2 * sizeof(uint32_t)); + *p++ = video_16to32[dat & 0xffff]; + *p++ = video_16to32[dat >> 16]; svga->ma += 4; } @@ -1617,10 +1533,7 @@ svga_render_24bpp_lowres(svga_t *svga) svga->lastline_draw = svga->displine; for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) - fg = svga->vram[svga->ma] | (svga->vram[svga->ma + 1] << 8) | (svga->vram[svga->ma + 2] << 16); - else - fg = 0x00000000; + fg = svga->vram[svga->ma] | (svga->vram[svga->ma + 1] << 8) | (svga->vram[svga->ma + 2] << 16); svga->ma += 3; svga->ma &= svga->vram_display_mask; buffer32->line[svga->displine + svga->y_add][(x << 1) + svga->x_add] = @@ -1639,12 +1552,9 @@ svga_render_24bpp_lowres(svga_t *svga) if (!svga->remap_required) { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) { - dat0 = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - dat1 = *(uint32_t *)(&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); - dat2 = *(uint32_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); - } else - dat0 = dat1 = dat2 = 0x00000000; + dat0 = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); + dat1 = *(uint32_t *)(&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); + dat2 = *(uint32_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); p[0] = p[1] = dat0 & 0xffffff; p[2] = p[3] = (dat0 >> 24) | ((dat1 & 0xffff) << 8); @@ -1655,15 +1565,12 @@ svga_render_24bpp_lowres(svga_t *svga) } } else { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - if (svga->crtc[0x17] & 0x80) { - addr = svga->remap_func(svga, svga->ma); - dat0 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - addr = svga->remap_func(svga, svga->ma + 4); - dat1 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - addr = svga->remap_func(svga, svga->ma + 8); - dat2 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - } else - dat0 = dat1 = dat2 = 0x00000000; + addr = svga->remap_func(svga, svga->ma); + dat0 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + addr = svga->remap_func(svga, svga->ma + 4); + dat1 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + addr = svga->remap_func(svga, svga->ma + 8); + dat2 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); p[0] = p[1] = dat0 & 0xffffff; p[2] = p[3] = (dat0 >> 24) | ((dat1 & 0xffff) << 8); @@ -1700,20 +1607,17 @@ svga_render_24bpp_highres(svga_t *svga) svga->lastline_draw = svga->displine; for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - if (svga->crtc[0x17] & 0x80) { - dat = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - p[x] = dat & 0xffffff; + dat = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); + p[x] = dat & 0xffffff; - dat = *(uint32_t *)(&svga->vram[(svga->ma + 3) & svga->vram_display_mask]); - p[x + 1] = dat & 0xffffff; + dat = *(uint32_t *)(&svga->vram[(svga->ma + 3) & svga->vram_display_mask]); + p[x + 1] = dat & 0xffffff; - dat = *(uint32_t *)(&svga->vram[(svga->ma + 6) & svga->vram_display_mask]); - p[x + 2] = dat & 0xffffff; + dat = *(uint32_t *)(&svga->vram[(svga->ma + 6) & svga->vram_display_mask]); + p[x + 2] = dat & 0xffffff; - dat = *(uint32_t *)(&svga->vram[(svga->ma + 9) & svga->vram_display_mask]); - p[x + 3] = dat & 0xffffff; - } else - memset(&(p[x]), 0x0, 4 * sizeof(uint32_t)); + dat = *(uint32_t *)(&svga->vram[(svga->ma + 9) & svga->vram_display_mask]); + p[x + 3] = dat & 0xffffff; svga->ma += 12; } @@ -1731,36 +1635,30 @@ svga_render_24bpp_highres(svga_t *svga) if (!svga->remap_required) { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - if (svga->crtc[0x17] & 0x80) { - dat0 = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - dat1 = *(uint32_t *)(&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); - dat2 = *(uint32_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); + dat0 = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); + dat1 = *(uint32_t *)(&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); + dat2 = *(uint32_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); - *p++ = dat0 & 0xffffff; - *p++ = (dat0 >> 24) | ((dat1 & 0xffff) << 8); - *p++ = (dat1 >> 16) | ((dat2 & 0xff) << 16); - *p++ = dat2 >> 8; - } else - memset(&(p[x]), 0x0, 4 * sizeof(uint32_t)); + *p++ = dat0 & 0xffffff; + *p++ = (dat0 >> 24) | ((dat1 & 0xffff) << 8); + *p++ = (dat1 >> 16) | ((dat2 & 0xff) << 16); + *p++ = dat2 >> 8; svga->ma += 12; } } else { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - if (svga->crtc[0x17] & 0x80) { - addr = svga->remap_func(svga, svga->ma); - dat0 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - addr = svga->remap_func(svga, svga->ma + 4); - dat1 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - addr = svga->remap_func(svga, svga->ma + 8); - dat2 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + addr = svga->remap_func(svga, svga->ma); + dat0 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + addr = svga->remap_func(svga, svga->ma + 4); + dat1 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + addr = svga->remap_func(svga, svga->ma + 8); + dat2 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - *p++ = dat0 & 0xffffff; - *p++ = (dat0 >> 24) | ((dat1 & 0xffff) << 8); - *p++ = (dat1 >> 16) | ((dat2 & 0xff) << 16); - *p++ = dat2 >> 8; - } else - memset(&(p[x]), 0x0, 4 * sizeof(uint32_t)); + *p++ = dat0 & 0xffffff; + *p++ = (dat0 >> 24) | ((dat1 & 0xffff) << 8); + *p++ = (dat1 >> 16) | ((dat2 & 0xff) << 16); + *p++ = dat2 >> 8; svga->ma += 12; } @@ -1789,10 +1687,7 @@ svga_render_32bpp_lowres(svga_t *svga) svga->lastline_draw = svga->displine; for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) - dat = svga->vram[svga->ma] | (svga->vram[svga->ma + 1] << 8) | (svga->vram[svga->ma + 2] << 16); - else - dat = 0x00000000; + dat = svga->vram[svga->ma] | (svga->vram[svga->ma + 1] << 8) | (svga->vram[svga->ma + 2] << 16); svga->ma += 4; svga->ma &= svga->vram_display_mask; buffer32->line[svga->displine + svga->y_add][(x << 1) + svga->x_add] = @@ -1811,21 +1706,15 @@ svga_render_32bpp_lowres(svga_t *svga) if (!svga->remap_required) { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); - else - dat = 0x00000000; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); *p++ = dat & 0xffffff; *p++ = dat & 0xffffff; } svga->ma += (x * 4); } else { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - } else - dat = 0x00000000; + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); *p++ = dat & 0xffffff; *p++ = dat & 0xffffff; svga->ma += 4; @@ -1857,10 +1746,7 @@ svga_render_32bpp_highres(svga_t *svga) svga->lastline_draw = svga->displine; for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); - else - dat = 0x00000000; + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); p[x] = dat & 0xffffff; } svga->ma += 4; @@ -1878,21 +1764,15 @@ svga_render_32bpp_highres(svga_t *svga) if (!svga->remap_required) { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); - *p++ = dat & 0xffffff; - } else - memset(&(p[x]), 0x0, 1 * sizeof(uint32_t)); + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); + *p++ = dat & 0xffffff; } svga->ma += (x * 4); } else { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - *p++ = dat & 0xffffff; - } else - memset(&(p[x]), 0x0, 1 * sizeof(uint32_t)); + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + *p++ = dat & 0xffffff; svga->ma += 4; } @@ -1925,21 +1805,15 @@ svga_render_ABGR8888_highres(svga_t *svga) if (!svga->remap_required) { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); - *p++ = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16); - } else - memset(&(p[x]), 0x0, 1 * sizeof(uint32_t)); + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); + *p++ = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16); } svga->ma += x*4; } else { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - *p++ = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16); - } else - memset(&(p[x]), 0x0, 1 * sizeof(uint32_t)); + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + *p++ = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16); svga->ma += 4; } @@ -1971,21 +1845,15 @@ svga_render_RGBA8888_highres(svga_t *svga) if (!svga->remap_required) { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); - *p++ = dat >> 8; - } else - memset(&(p[x]), 0x0, 1 * sizeof(uint32_t)); + dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); + *p++ = dat >> 8; } svga->ma += (x * 4); } else { for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - *p++ = dat >> 8; - } else - memset(&(p[x]), 0x0, 1 * sizeof(uint32_t)); + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + *p++ = dat >> 8; svga->ma += 4; } From a555b9312dc15ad6ef34dfb7df573ea0edee24ee Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 18 Jul 2022 23:58:22 +0200 Subject: [PATCH 074/386] And the IBM RAMDAC renderers as well. --- src/video/vid_ibm_rgb528_ramdac.c | 243 ++++++++++++++---------------- 1 file changed, 114 insertions(+), 129 deletions(-) diff --git a/src/video/vid_ibm_rgb528_ramdac.c b/src/video/vid_ibm_rgb528_ramdac.c index d70732553..f119e722e 100644 --- a/src/video/vid_ibm_rgb528_ramdac.c +++ b/src/video/vid_ibm_rgb528_ramdac.c @@ -101,40 +101,37 @@ ibm_rgb528_render_4bpp(svga_t *svga) svga->lastline_draw = svga->displine; for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) { - if (vram_size == 3) { - if (!(x & 31)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]); - if (swap_word) { - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL); - } + if (vram_size == 3) { + if (!(x & 31)) { + dat64 = *(uint64_t *)(&svga->vram[svga->ma]); + dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]); + if (swap_word) { + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL); } - if (swap_nib) - dat = (((x & 16) ? dat642 : dat64) >> ((x & 15) << 2)) & 0xf; - else - dat = (((x & 16) ? dat642 : dat64) >> (((x & 15) << 2) ^ 4)) & 0xf; - } else if (vram_size == 1) { - if (!(x & 15)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - if (swap_word) - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - } - if (swap_nib) - dat = (dat64 >> ((x & 15) << 2)) & 0xf; - else - dat = (dat64 >> (((x & 15) << 2) ^ 4)) & 0xf; - } else { - if (!(x & 7)) - dat32 = *(uint32_t *)(&svga->vram[svga->ma]); - if (swap_nib) - dat = (dat32 >> ((x & 7) << 2)) & 0xf; - else - dat = (dat32 >> (((x & 7) << 2) ^ 4)) & 0xf; } - } else - dat = 0x00000000; + if (swap_nib) + dat = (((x & 16) ? dat642 : dat64) >> ((x & 15) << 2)) & 0xf; + else + dat = (((x & 16) ? dat642 : dat64) >> (((x & 15) << 2) ^ 4)) & 0xf; + } else if (vram_size == 1) { + if (!(x & 15)) { + dat64 = *(uint64_t *)(&svga->vram[svga->ma]); + if (swap_word) + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + } + if (swap_nib) + dat = (dat64 >> ((x & 15) << 2)) & 0xf; + else + dat = (dat64 >> (((x & 15) << 2) ^ 4)) & 0xf; + } else { + if (!(x & 7)) + dat32 = *(uint32_t *)(&svga->vram[svga->ma]); + if (swap_nib) + dat = (dat32 >> ((x & 7) << 2)) & 0xf; + else + dat = (dat32 >> (((x & 7) << 2) ^ 4)) & 0xf; + } if (b8_dcol == 0x00) { dat_out.a = 0x00; dat_out.r = ramdac->palettes[0][partition | dat]; @@ -184,31 +181,28 @@ ibm_rgb528_render_8bpp(svga_t *svga) svga->lastline_draw = svga->displine; for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) { - if (vram_size == 3) { - if (!(x & 15)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]); - if (swap_word) { - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL); - } + if (vram_size == 3) { + if (!(x & 15)) { + dat64 = *(uint64_t *)(&svga->vram[svga->ma]); + dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]); + if (swap_word) { + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL); } - dat = (((x & 8) ? dat642 : dat64) >> ((x & 7) << 3)) & 0xff; - } else if (vram_size == 1) { - if (!(x & 7)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - if (swap_word) - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - } - dat = (dat64 >> ((x & 7) << 3)) & 0xff; - } else { - if (!(x & 3)) - dat32 = *(uint32_t *)(&svga->vram[svga->ma]); - dat = (dat32 >> ((x & 3) << 3)) & 0xff; } - } else - dat = 0x00000000; + dat = (((x & 8) ? dat642 : dat64) >> ((x & 7) << 3)) & 0xff; + } else if (vram_size == 1) { + if (!(x & 7)) { + dat64 = *(uint64_t *)(&svga->vram[svga->ma]); + if (swap_word) + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + } + dat = (dat64 >> ((x & 7) << 3)) & 0xff; + } else { + if (!(x & 3)) + dat32 = *(uint32_t *)(&svga->vram[svga->ma]); + dat = (dat32 >> ((x & 3) << 3)) & 0xff; + } if (b8_dcol == 0x00) { dat_out.a = 0x00; dat_out.r = ramdac->palettes[0][dat]; @@ -268,31 +262,28 @@ ibm_rgb528_render_15_16bpp(svga_t *svga) svga->lastline_draw = svga->displine; for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) { - if (vram_size == 2) { - if (!(x & 7)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]); - if (swap_word) { - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - dat642 = (dat64 << 32ULL) | (dat642 >> 32ULL); - } + if (vram_size == 2) { + if (!(x & 7)) { + dat64 = *(uint64_t *)(&svga->vram[svga->ma]); + dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]); + if (swap_word) { + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + dat642 = (dat64 << 32ULL) | (dat642 >> 32ULL); } - dat = (((x & 4) ? dat642 : dat64) >> ((x & 3) << 4)) & 0xffff; - } else if (vram_size == 1) { - if (!(x & 3)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - if (swap_word) - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - } - dat = (dat64 >> ((x & 3) << 4)) & 0xffff; - } else { - if (!(x & 1)) - dat32 = *(uint32_t *)(&svga->vram[svga->ma]); - dat = (dat32 >> ((x & 1) << 4)) & 0xffff; } - } else - dat = 0x00000000; + dat = (((x & 4) ? dat642 : dat64) >> ((x & 3) << 4)) & 0xffff; + } else if (vram_size == 1) { + if (!(x & 3)) { + dat64 = *(uint64_t *)(&svga->vram[svga->ma]); + if (swap_word) + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + } + dat = (dat64 >> ((x & 3) << 4)) & 0xffff; + } else { + if (!(x & 1)) + dat32 = *(uint32_t *)(&svga->vram[svga->ma]); + dat = (dat32 >> ((x & 1) << 4)) & 0xffff; + } dat_ex = (ibm_rgb528_pixel16_t *) &dat; if (b555_565 && (b16_dcol != 0x01)) { if (swaprb) { @@ -389,39 +380,36 @@ ibm_rgb528_render_24bpp(svga_t *svga) for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { dat_ex = (ibm_rgb528_pixel32_t *) &dat; - if (svga->crtc[0x17] & 0x80) { - if (vram_size == 3) { - if ((x & 15) == 0) { - dat64[0] = *(uint64_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - dat64[1] = *(uint64_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); - dat64[2] = *(uint64_t *)(&svga->vram[(svga->ma + 16) & svga->vram_display_mask]); - dat64[3] = *(uint64_t *)(&svga->vram[(svga->ma + 24) & svga->vram_display_mask]); - dat64[4] = *(uint64_t *)(&svga->vram[(svga->ma + 32) & svga->vram_display_mask]); - dat64[5] = *(uint64_t *)(&svga->vram[(svga->ma + 40) & svga->vram_display_mask]); - if (swap_word) { - dat64[0] = (dat64[0] << 32ULL) | (dat64[0] >> 32ULL); - dat64[1] = (dat64[1] << 32ULL) | (dat64[1] >> 32ULL); - dat64[2] = (dat64[2] << 32ULL) | (dat64[2] >> 32ULL); - dat64[3] = (dat64[3] << 32ULL) | (dat64[3] >> 32ULL); - dat64[4] = (dat64[4] << 32ULL) | (dat64[4] >> 32ULL); - dat64[5] = (dat64[5] << 32ULL) | (dat64[5] >> 32ULL); - } + if (vram_size == 3) { + if ((x & 15) == 0) { + dat64[0] = *(uint64_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); + dat64[1] = *(uint64_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); + dat64[2] = *(uint64_t *)(&svga->vram[(svga->ma + 16) & svga->vram_display_mask]); + dat64[3] = *(uint64_t *)(&svga->vram[(svga->ma + 24) & svga->vram_display_mask]); + dat64[4] = *(uint64_t *)(&svga->vram[(svga->ma + 32) & svga->vram_display_mask]); + dat64[5] = *(uint64_t *)(&svga->vram[(svga->ma + 40) & svga->vram_display_mask]); + if (swap_word) { + dat64[0] = (dat64[0] << 32ULL) | (dat64[0] >> 32ULL); + dat64[1] = (dat64[1] << 32ULL) | (dat64[1] >> 32ULL); + dat64[2] = (dat64[2] << 32ULL) | (dat64[2] >> 32ULL); + dat64[3] = (dat64[3] << 32ULL) | (dat64[3] >> 32ULL); + dat64[4] = (dat64[4] << 32ULL) | (dat64[4] >> 32ULL); + dat64[5] = (dat64[5] << 32ULL) | (dat64[5] >> 32ULL); } - dat_ex = (ibm_rgb528_pixel32_t *) &(dat8[((x & 15) * 3)]); - } else if (vram_size == 1) { - if ((x & 7) == 0) { - dat64[0] = *(uint64_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - dat64[1] = *(uint64_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); - dat64[2] = *(uint64_t *)(&svga->vram[(svga->ma + 16) & svga->vram_display_mask]); - if (swap_word) { - dat64[0] = (dat64[0] << 32ULL) | (dat64[0] >> 32ULL); - dat64[1] = (dat64[1] << 32ULL) | (dat64[1] >> 32ULL); - dat64[2] = (dat64[2] << 32ULL) | (dat64[2] >> 32ULL); - } + } + dat_ex = (ibm_rgb528_pixel32_t *) &(dat8[((x & 15) * 3)]); + } else if (vram_size == 1) { + if ((x & 7) == 0) { + dat64[0] = *(uint64_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); + dat64[1] = *(uint64_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); + dat64[2] = *(uint64_t *)(&svga->vram[(svga->ma + 16) & svga->vram_display_mask]); + if (swap_word) { + dat64[0] = (dat64[0] << 32ULL) | (dat64[0] >> 32ULL); + dat64[1] = (dat64[1] << 32ULL) | (dat64[1] >> 32ULL); + dat64[2] = (dat64[2] << 32ULL) | (dat64[2] >> 32ULL); } - dat_ex = (ibm_rgb528_pixel32_t *) &(dat8[((x & 7) * 3)]); - } else - dat = 0x00000000; + } + dat_ex = (ibm_rgb528_pixel32_t *) &(dat8[((x & 7) * 3)]); } else dat = 0x00000000; if (swaprb) { @@ -482,28 +470,25 @@ ibm_rgb528_render_32bpp(svga_t *svga) svga->lastline_draw = svga->displine; for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (svga->crtc[0x17] & 0x80) { - if (vram_size == 3) { - if (!(x & 3)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]); - if (swap_word) { - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL); - } + if (vram_size == 3) { + if (!(x & 3)) { + dat64 = *(uint64_t *)(&svga->vram[svga->ma]); + dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]); + if (swap_word) { + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL); } - dat = (((x & 2) ? dat642 : dat64) >> ((x & 1ULL) << 5ULL)) & 0xffffffff; - } else if (vram_size == 1) { - if (!(x & 1)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - if (swap_word) - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - } - dat = (dat64 >> ((x & 1ULL) << 5ULL)) & 0xffffffff; - } else - dat = *(uint32_t *)(&svga->vram[svga->ma]); + } + dat = (((x & 2) ? dat642 : dat64) >> ((x & 1ULL) << 5ULL)) & 0xffffffff; + } else if (vram_size == 1) { + if (!(x & 1)) { + dat64 = *(uint64_t *)(&svga->vram[svga->ma]); + if (swap_word) + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + } + dat = (dat64 >> ((x & 1ULL) << 5ULL)) & 0xffffffff; } else - dat = 0x00000000; + dat = *(uint32_t *)(&svga->vram[svga->ma]); dat_ex = (ibm_rgb528_pixel32_t *) &dat; if (swaprb) { temp = dat_ex->r; From 33c5f9397ea3162b5e3901feae34ff3cce5b5789 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 19 Jul 2022 00:14:29 +0200 Subject: [PATCH 075/386] (S)VGA renderer fixes. --- src/video/vid_svga_render.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/src/video/vid_svga_render.c b/src/video/vid_svga_render.c index c4b817fd4..17b4c4981 100644 --- a/src/video/vid_svga_render.c +++ b/src/video/vid_svga_render.c @@ -1126,20 +1126,20 @@ svga_render_15bpp_lowres(svga_t *svga) int x; uint32_t *p; uint32_t dat; - uint32_t changed_addr, addr; + uint32_t changed_addr, addr; if ((svga->displine + svga->y_add) < 0) - return; + return; - if (svga->force_old_addr) { - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { + if (svga->force_old_addr) { + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; if (svga->firstline_draw == 2000) svga->firstline_draw = svga->displine; svga->lastline_draw = svga->displine; - if (svga->crtc[0x17] & 0x80) { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); p[(x << 1)] = p[(x << 1) + 1] = video_15to32[dat & 0xffff]; @@ -1152,11 +1152,11 @@ svga_render_15bpp_lowres(svga_t *svga) } svga->ma += x << 1; svga->ma &= svga->vram_display_mask; - } - } else { - changed_addr = svga->remap_func(svga, svga->ma); + } + } else { + changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; if (svga->firstline_draw == 2000) @@ -1187,8 +1187,8 @@ svga_render_15bpp_lowres(svga_t *svga) } } svga->ma &= svga->vram_display_mask; - } } + } } @@ -1198,13 +1198,13 @@ svga_render_15bpp_highres(svga_t *svga) int x; uint32_t *p; uint32_t dat; - uint32_t changed_addr, addr; + uint32_t changed_addr, addr; if ((svga->displine + svga->y_add) < 0) return; - if (svga->force_old_addr) { - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { + if (svga->force_old_addr) { + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; if (svga->firstline_draw == 2000) @@ -1230,11 +1230,11 @@ svga_render_15bpp_highres(svga_t *svga) } svga->ma += x << 1; svga->ma &= svga->vram_display_mask; - } - } else { - changed_addr = svga->remap_func(svga, svga->ma); + } + } else { + changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; if (svga->firstline_draw == 2000) @@ -1271,8 +1271,8 @@ svga_render_15bpp_highres(svga_t *svga) } } svga->ma &= svga->vram_display_mask; - } } + } } From 1d0177289a8c15652bff48f45143b972ebf416e9 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 19 Jul 2022 00:15:25 +0200 Subject: [PATCH 076/386] PCI graphics cards initialization fixes. --- src/video/vid_ati_mach64.c | 17 ++++++++++------- src/video/vid_cl54xx.c | 11 +++++++++-- src/video/vid_tgui9440.c | 7 +++++-- 3 files changed, 24 insertions(+), 11 deletions(-) diff --git a/src/video/vid_ati_mach64.c b/src/video/vid_ati_mach64.c index a5325e8f7..7f4e2c7c9 100644 --- a/src/video/vid_ati_mach64.c +++ b/src/video/vid_ati_mach64.c @@ -3532,13 +3532,10 @@ static void *mach64_common_init(const device_t *info) mach64_overlay_draw); mach64->svga.dac_hwcursor.cur_ysize = 64; - if (info->flags & DEVICE_PCI) - mem_mapping_disable(&mach64->bios_rom.mapping); - - mem_mapping_add(&mach64->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, NULL, MEM_MAPPING_EXTERNAL, &mach64->svga); - mem_mapping_add(&mach64->mmio_linear_mapping, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64); - mem_mapping_add(&mach64->mmio_linear_mapping_2, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64); - mem_mapping_add(&mach64->mmio_mapping, 0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64); + mem_mapping_add(&mach64->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, NULL, MEM_MAPPING_EXTERNAL, &mach64->svga); + mem_mapping_add(&mach64->mmio_linear_mapping, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64); + mem_mapping_add(&mach64->mmio_linear_mapping_2, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64); + mem_mapping_add(&mach64->mmio_mapping, 0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64); mem_mapping_disable(&mach64->mmio_mapping); mach64_io_set(mach64); @@ -3604,6 +3601,9 @@ static void *mach64gx_init(const device_t *info) else if (info->flags & DEVICE_ISA) rom_init(&mach64->bios_rom, BIOS_ISA_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + if (info->flags & DEVICE_PCI) + mem_mapping_disable(&mach64->bios_rom.mapping); + return mach64; } static void *mach64vt2_init(const device_t *info) @@ -3628,6 +3628,9 @@ static void *mach64vt2_init(const device_t *info) rom_init(&mach64->bios_rom, BIOS_ROMVT2_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + if (info->flags & DEVICE_PCI) + mem_mapping_disable(&mach64->bios_rom.mapping); + svga->vblank_start = mach64_vblank_start; return mach64; diff --git a/src/video/vid_cl54xx.c b/src/video/vid_cl54xx.c index b4a7057f0..174dc5037 100644 --- a/src/video/vid_cl54xx.c +++ b/src/video/vid_cl54xx.c @@ -3708,6 +3708,11 @@ cl_pci_write(int func, int addr, uint8_t val, void *p) io_sethandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); if ((val & PCI_COMMAND_MEM) && (gd54xx->vgablt_base != 0x00000000) && (gd54xx->vgablt_base < 0xfff00000)) mem_mapping_set_addr(&gd54xx->vgablt_mapping, gd54xx->vgablt_base, 0x1000); + if ((gd54xx->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM) && (gd54xx->pci_regs[0x30] & 0x01)) { + uint32_t addr = (gd54xx->pci_regs[0x32] << 16) | (gd54xx->pci_regs[0x33] << 24); + mem_mapping_set_addr(&gd54xx->bios_rom.mapping, addr, 0x8000); + } else + mem_mapping_disable(&gd54xx->bios_rom.mapping); gd543x_recalc_mapping(gd54xx); break; @@ -3735,7 +3740,7 @@ cl_pci_write(int func, int addr, uint8_t val, void *p) case 0x30: case 0x32: case 0x33: gd54xx->pci_regs[addr] = val; - if (gd54xx->pci_regs[0x30] & 0x01) { + if ((gd54xx->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM) && (gd54xx->pci_regs[0x30] & 0x01)) { uint32_t addr = (gd54xx->pci_regs[0x32] << 16) | (gd54xx->pci_regs[0x33] << 24); mem_mapping_set_addr(&gd54xx->bios_rom.mapping, addr, 0x8000); } else @@ -4061,8 +4066,10 @@ static void } io_sethandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); - if (gd54xx->pci && id >= CIRRUS_ID_CLGD5430) + if (gd54xx->pci && id >= CIRRUS_ID_CLGD5430) { pci_add_card(PCI_ADD_VIDEO, cl_pci_read, cl_pci_write, gd54xx); + mem_mapping_disable(&gd54xx->bios_rom.mapping); + } mem_mapping_set_p(&svga->mapping, gd54xx); mem_mapping_disable(&gd54xx->mmio_mapping); diff --git a/src/video/vid_tgui9440.c b/src/video/vid_tgui9440.c index 603acccb9..a4fd83a0e 100644 --- a/src/video/vid_tgui9440.c +++ b/src/video/vid_tgui9440.c @@ -3079,8 +3079,11 @@ static void *tgui_init(const device_t *info) tgui->has_bios = (bios_fn != NULL); - if (tgui->has_bios) + if (tgui->has_bios) { rom_init(&tgui->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + if (tgui->pci) + mem_mapping_disable(&tgui->bios_rom.mapping); + } if (tgui->pci) video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tgui_pci); @@ -3107,7 +3110,7 @@ static void *tgui_init(const device_t *info) if (tgui->pci && (tgui->type >= TGUI_9440)) { if (tgui->has_bios) - tgui->card = pci_add_card(PCI_ADD_VIDEO, tgui_pci_read, tgui_pci_write, tgui); + tgui->card = pci_add_card(PCI_ADD_VIDEO, tgui_pci_read, tgui_pci_write, tgui); else tgui->card = pci_add_card(PCI_ADD_VIDEO | PCI_ADD_STRICT, tgui_pci_read, tgui_pci_write, tgui); } From f4f886060610166992fa0d059784cb639d29029b Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 19 Jul 2022 00:16:46 +0200 Subject: [PATCH 077/386] The Performance/EU should *NOT* have been there. --- src/machine/machine_table.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index ac4a4e9c7..7a0873f20 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -842,10 +842,6 @@ const machine_t machines[] = { /* 450KX */ /* This has an AMIKey-2, which is an updated version of type 'H'. */ { "[i450KX] ASUS P/I-P6RP4", "p6rp4", MACHINE_TYPE_SOCKET8, MACHINE_CHIPSET_INTEL_450KX, machine_at_p6rp4_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET8, CPU_BLOCK_NONE, 60000000, 66666667, 2100, 3500, 1.5, 8.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 524288, 8192, 127, NULL, NULL }, - /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the - PC87306 Super I/O chip, command 0xA1 returns '5'. - Command 0xA0 copyright string: (C)1994 AMI . */ - { "[i450KX] Intel Performance/AU", "aurora", MACHINE_TYPE_SOCKET8, MACHINE_CHIPSET_INTEL_450KX, machine_at_aurora_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET8, CPU_BLOCK_NONE, 60000000, 66666667, 2100, 3500, 1.5, 8.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 524288, 8192, 127, NULL, NULL }, /* 440FX */ /* Has the SMC FDC73C935's on-chip KBC with Phoenix MultiKey firmware. */ From 46f65405420ec2a3e9beaa169ce937a67a9bfa8e Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Tue, 19 Jul 2022 11:31:06 +0200 Subject: [PATCH 078/386] hdd: make speed preset configurable This includes settings UI for Qt --- src/config.c | 19 ++++ src/disk/hdc_ide.c | 2 +- src/disk/hdd.c | 153 ++++++++++++++++++++------------ src/include/86box/hdd.h | 13 ++- src/qt/qt_harddiskdialog.cpp | 6 ++ src/qt/qt_harddiskdialog.hpp | 1 + src/qt/qt_harddiskdialog.ui | 10 +++ src/qt/qt_harddrive_common.cpp | 21 +++++ src/qt/qt_harddrive_common.hpp | 1 + src/qt/qt_settingsharddisks.cpp | 32 ++++++- src/qt/qt_settingsharddisks.hpp | 1 + src/qt/qt_settingsharddisks.ui | 10 +++ 12 files changed, 206 insertions(+), 63 deletions(-) diff --git a/src/config.c b/src/config.c index eea247e3f..bd2e299a4 100644 --- a/src/config.c +++ b/src/config.c @@ -1378,6 +1378,18 @@ load_hard_disks(void) if (hdd[c].tracks > max_tracks) hdd[c].tracks = max_tracks; + sprintf(temp, "hdd_%02i_speed", c+1); + switch (hdd[c].bus) { + case HDD_BUS_IDE: + sprintf(tmp2, "1997_5400rpm"); + break; + default: + sprintf(tmp2, "ramdisk"); + break; + } + p = config_get_string(cat, temp, tmp2); + hdd[c].speed_preset = hdd_preset_get_from_internal_name(p); + /* MFM/RLL */ sprintf(temp, "hdd_%02i_mfm_channel", c+1); if (hdd[c].bus == HDD_BUS_MFM) @@ -2918,6 +2930,13 @@ save_hard_disks(void) } else config_delete_var(cat, temp); + + sprintf(temp, "hdd_%02i_speed", c+1); + if (!hdd_is_valid(c) || (hdd[c].bus != HDD_BUS_IDE)) + config_delete_var(cat, temp); + else + config_set_string(cat, temp, hdd_preset_get_internal_name(hdd[c].speed_preset)); + } delete_section_if_empty(cat); diff --git a/src/disk/hdc_ide.c b/src/disk/hdc_ide.c index b005cbd6d..b654c78b4 100644 --- a/src/disk/hdc_ide.c +++ b/src/disk/hdc_ide.c @@ -734,7 +734,7 @@ loadhd(ide_t *ide, int d, const char *fn) return; } - hdd_preset_auto(&hdd[d]); + hdd_preset_apply(d); ide->spt = ide->cfg_spt = hdd[d].spt; ide->hpc = ide->cfg_hpc = hdd[d].hpc; diff --git a/src/disk/hdd.c b/src/disk/hdd.c index b66474098..ca434aa61 100644 --- a/src/disk/hdd.c +++ b/src/disk/hdd.c @@ -31,8 +31,9 @@ #include <86box/video.h> #include "cpu.h" -hard_disk_t hdd[HDD_NUM]; +#define HDD_OVERHEAD_TIME 50.0 +hard_disk_t hdd[HDD_NUM]; int hdd_init(void) @@ -158,6 +159,9 @@ hdd_is_valid(int c) double hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_t continuous, double max_seek_time) { + if (!hdd->speed_preset) + return HDD_OVERHEAD_TIME; + hdd_zone_t *zone = NULL; for (int i = 0; i < hdd->num_zones; i++) { zone = &hdd->zones[i]; @@ -168,7 +172,7 @@ hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_ #ifndef OLD_CODE double continuous_times[2][2] = { { hdd->head_switch_usec, hdd->cyl_switch_usec }, { zone->sector_time_usec, zone->sector_time_usec } }; - double times[2] = { 50.0, hdd->avg_rotation_lat_usec }; + double times[2] = { HDD_OVERHEAD_TIME, hdd->avg_rotation_lat_usec }; #endif uint32_t new_track = zone->start_track + ((dst_addr - zone->start_sector) / zone->sectors_per_track); @@ -201,7 +205,7 @@ hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_ seek_time = hdd->avg_rotation_lat_usec; } else { //seek_time = hdd->cyl_switch_usec; - seek_time = 50.0; + seek_time = HDD_OVERHEAD_TIME; } #else seek_time = times[operation != HDD_OP_SEEK]; @@ -292,6 +296,9 @@ hdd_writecache_update(hard_disk_t *hdd) double hdd_timing_write(hard_disk_t *hdd, uint32_t addr, uint32_t len) { + if (!hdd->speed_preset) + return HDD_OVERHEAD_TIME; + hdd_readahead_update(hdd); hdd_writecache_update(hdd); @@ -327,6 +334,9 @@ hdd_timing_write(hard_disk_t *hdd, uint32_t addr, uint32_t len) double hdd_timing_read(hard_disk_t *hdd, uint32_t addr, uint32_t len) { + if (!hdd->speed_preset) + return HDD_OVERHEAD_TIME; + hdd_readahead_update(hdd); hdd_writecache_update(hdd); @@ -388,7 +398,7 @@ update_lru: cache->ra_ongoing = 1; cache->ra_segment = active_seg->id; cache->ra_start_time = tsc + (uint32_t)(seek_time * cpuclock / 1000000.0); - + return seek_time; } @@ -414,7 +424,7 @@ hdd_zones_init(hard_disk_t *hdd) { uint32_t lba = 0; uint32_t track = 0; - + double revolution_usec = 60.0 / (double)hdd->rpm * 1000000.0; for (uint32_t i = 0; i < hdd->num_zones; i++) { hdd_zone_t *zone = &hdd->zones[i]; @@ -428,53 +438,98 @@ hdd_zones_init(hard_disk_t *hdd) } } -hdd_preset_t hdd_presets[] = { - { .target_year = 1989, .match_max_mbyte = 99, .zones = 1, .avg_spt = 35, .heads = 2, .rpm = 3500, .full_stroke_ms = 40, .track_seek_ms = 8, - .rcache_num_seg = 1, .rcache_seg_size = 16, .max_multiple = 8 }, +static hdd_preset_t hdd_speed_presets[] = { + { .name = "RAM Disk (max. speed)", .internal_name = "ramdisk", .rcache_num_seg = 16, .rcache_seg_size = 128, .max_multiple = 32 }, - { .target_year = 1992, .match_max_mbyte = 249, .zones = 1, .avg_spt = 45, .heads = 2, .rpm = 3500, .full_stroke_ms = 30, .track_seek_ms = 6, - .rcache_num_seg = 4, .rcache_seg_size = 16, .max_multiple = 8 }, + { .name = "[1989] 3500 RPM", .internal_name = "1989_3500rpm", .zones = 1, .avg_spt = 35, .heads = 2, .rpm = 3500, + .full_stroke_ms = 40, .track_seek_ms = 8, .rcache_num_seg = 1, .rcache_seg_size = 16, .max_multiple = 8 }, - { .target_year = 1994, .match_max_mbyte = 999, .zones = 8, .avg_spt = 80, .heads = 4, .rpm = 4500, .full_stroke_ms = 26, .track_seek_ms = 5, - .rcache_num_seg = 4, .rcache_seg_size = 32, .max_multiple = 16 }, + { .name = "[1992] 3600 RPM", .internal_name = "1992_3600rpm", .zones = 1, .avg_spt = 45, .heads = 2, .rpm = 3600, + .full_stroke_ms = 30, .track_seek_ms = 6, .rcache_num_seg = 4, .rcache_seg_size = 16, .max_multiple = 8 }, - { .target_year = 1996, .match_max_mbyte = 1999, .zones = 16, .avg_spt = 135, .heads = 4, .rpm = 5400, .full_stroke_ms = 24, .track_seek_ms = 3, - .rcache_num_seg = 4, .rcache_seg_size = 64, .max_multiple = 16 }, + { .name = "[1994] 4500 RPM", .internal_name = "1994_4500rpm", .zones = 8, .avg_spt = 80, .heads = 4, .rpm = 4500, + .full_stroke_ms = 26, .track_seek_ms = 5, .rcache_num_seg = 4, .rcache_seg_size = 32, .max_multiple = 16 }, - { .target_year = 1997, .match_max_mbyte = 4999, .zones = 16, .avg_spt = 185, .heads = 6, .rpm = 5400, .full_stroke_ms = 20, .track_seek_ms = 2.5, - .rcache_num_seg = 8, .rcache_seg_size = 64, .max_multiple = 32 }, + { .name = "[1996] 5400 RPM", .internal_name = "1996_5400rpm", .zones = 16, .avg_spt = 135, .heads = 4, .rpm = 5400, + .full_stroke_ms = 24, .track_seek_ms = 3, .rcache_num_seg = 4, .rcache_seg_size = 64, .max_multiple = 16 }, - { .target_year = 1998, .match_max_mbyte = 9999, .zones = 16, .avg_spt = 300, .heads = 8, .rpm = 5400, .full_stroke_ms = 20, .track_seek_ms = 2, - .rcache_num_seg = 8, .rcache_seg_size = 128, .max_multiple = 32 }, + { .name = "[1997] 5400 RPM", .internal_name = "1997_5400rpm", .zones = 16, .avg_spt = 185, .heads = 6, .rpm = 5400, + .full_stroke_ms = 20, .track_seek_ms = 2.5, .rcache_num_seg = 8, .rcache_seg_size = 64, .max_multiple = 32 }, - { .target_year = 2000, .match_max_mbyte = 99999, .zones = 16, .avg_spt = 350, .heads = 6, .rpm = 7200, .full_stroke_ms = 15, .track_seek_ms = 2, - .rcache_num_seg = 16, .rcache_seg_size = 128, .max_multiple = 32 }, + { .name = "[1998] 5400 RPM", .internal_name = "1998_5400rpm", .zones = 16, .avg_spt = 300, .heads = 8, .rpm = 5400, + .full_stroke_ms = 20, .track_seek_ms = 2, .rcache_num_seg = 8, .rcache_seg_size = 128, .max_multiple = 32 }, + + { .name = "[2000] 7200 RPM", .internal_name = "2000_7200rpm", .zones = 16, .avg_spt = 350, .heads = 6, .rpm = 7200, + .full_stroke_ms = 15, .track_seek_ms = 2, .rcache_num_seg = 16, .rcache_seg_size = 128, .max_multiple = 32 }, }; -void -hdd_preset_apply(hard_disk_t *hdd, hdd_preset_t *preset) +int +hdd_preset_get_num() { - hdd->phy_heads = preset->heads; - hdd->rpm = preset->rpm; + return sizeof(hdd_speed_presets) / sizeof(hdd_preset_t); +} - double revolution_usec = 60.0 / (double)hdd->rpm * 1000000.0; - hdd->avg_rotation_lat_usec = revolution_usec / 2; - hdd->full_stroke_usec = preset->full_stroke_ms * 1000; - hdd->head_switch_usec = preset->track_seek_ms * 1000; - hdd->cyl_switch_usec = preset->track_seek_ms * 1000; +char * +hdd_preset_getname(int preset) +{ + return (char *)hdd_speed_presets[preset].name; +} - hdd->cache.num_segments = preset->rcache_num_seg; - hdd->cache.segment_size = preset->rcache_seg_size; - hdd->max_multiple_block = preset->max_multiple; +char * +hdd_preset_get_internal_name(int preset) +{ + return (char *)hdd_speed_presets[preset].internal_name; +} - hdd->cache.write_size = 64; +int +hdd_preset_get_from_internal_name(char *s) +{ + int c = 0; - hdd->num_zones = preset->zones; - uint32_t disk_sectors = hdd->tracks * hdd->hpc * hdd->spt; - uint32_t sectors_per_surface = (uint32_t)ceil((double)disk_sectors / (double)hdd->phy_heads); + for (int i = 0; i < (sizeof(hdd_speed_presets) / sizeof(hdd_preset_t)); i++) { + if (!strcmp((char *)hdd_speed_presets[c].internal_name, s)) + return c; + c++; + } + + return 0; +} + +void +hdd_preset_apply(int hdd_id) +{ + hard_disk_t *hd = &hdd[hdd_id]; + + if (hd->speed_preset >= hdd_preset_get_num()) + hd->speed_preset = 0; + + hdd_preset_t *preset = &hdd_speed_presets[hd->speed_preset]; + + hd->cache.num_segments = preset->rcache_num_seg; + hd->cache.segment_size = preset->rcache_seg_size; + hd->max_multiple_block = preset->max_multiple; + + if (!hd->speed_preset) + return; + + hd->phy_heads = preset->heads; + hd->rpm = preset->rpm; + + double revolution_usec = 60.0 / (double)hd->rpm * 1000000.0; + hd->avg_rotation_lat_usec = revolution_usec / 2; + hd->full_stroke_usec = preset->full_stroke_ms * 1000; + hd->head_switch_usec = preset->track_seek_ms * 1000; + hd->cyl_switch_usec = preset->track_seek_ms * 1000; + + hd->cache.write_size = 64; + + hd->num_zones = preset->zones; + + uint32_t disk_sectors = hd->tracks * hd->hpc * hd->spt; + uint32_t sectors_per_surface = (uint32_t)ceil((double)disk_sectors / (double)hd->phy_heads); uint32_t cylinders = (uint32_t)ceil((double)sectors_per_surface / (double)preset->avg_spt); - hdd->phy_cyl = cylinders; + hd->phy_cyl = cylinders; uint32_t cylinders_per_zone = cylinders / preset->zones; uint32_t total_sectors = 0; @@ -493,26 +548,10 @@ hdd_preset_apply(hard_disk_t *hdd, hdd_preset_t *preset) uint32_t zone_sectors = spt * cylinders_per_zone * preset->heads; total_sectors += zone_sectors; - hdd->zones[i].cylinders = cylinders_per_zone; - hdd->zones[i].sectors_per_track = spt; + hd->zones[i].cylinders = cylinders_per_zone; + hd->zones[i].sectors_per_track = spt; } - hdd_zones_init(hdd); - hdd_cache_init(hdd); -} - -void -hdd_preset_auto(hard_disk_t *hdd) -{ - uint32_t disk_sectors = hdd->tracks * hdd->hpc * hdd->spt; - uint32_t disk_size_mb = disk_sectors * 512 / 1024 / 1024; - int i; - for (i = 0; i < (sizeof(hdd_presets) / sizeof(hdd_presets[0])); i++) { - if (hdd_presets[i].match_max_mbyte >= disk_size_mb) - break; - } - - hdd_preset_t *preset = &hdd_presets[i]; - - hdd_preset_apply(hdd, preset); + hdd_zones_init(hd); + hdd_cache_init(hd); } \ No newline at end of file diff --git a/src/include/86box/hdd.h b/src/include/86box/hdd.h index 2a2a16bfc..a1c552e1e 100644 --- a/src/include/86box/hdd.h +++ b/src/include/86box/hdd.h @@ -82,12 +82,12 @@ enum { #define HDD_MAX_CACHE_SEG 16 typedef struct { - uint32_t match_max_mbyte; + const char *name; + const char *internal_name; uint32_t zones; uint32_t avg_spt; uint32_t heads; uint32_t rpm; - uint32_t target_year; uint32_t rcache_num_seg; uint32_t rcache_seg_size; uint32_t max_multiple; @@ -169,6 +169,8 @@ typedef struct { uint32_t cur_track; uint32_t cur_addr; + uint32_t speed_preset; + double avg_rotation_lat_usec; double full_stroke_usec; double head_switch_usec; @@ -207,7 +209,10 @@ extern int image_is_vhd(const char *s, int check_signature); extern double hdd_timing_write(hard_disk_t *hdd, uint32_t addr, uint32_t len); extern double hdd_timing_read(hard_disk_t *hdd, uint32_t addr, uint32_t len); extern double hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_t continuous, double max_seek_time); -extern void hdd_preset_apply(hard_disk_t *hdd, hdd_preset_t *preset); -extern void hdd_preset_auto(hard_disk_t *hdd); +int hdd_preset_get_num(); +char * hdd_preset_getname(int preset); +extern char *hdd_preset_get_internal_name(int preset); +extern int hdd_preset_get_from_internal_name(char *s); +extern void hdd_preset_apply(int hdd_id); #endif /*EMU_HDD_H*/ diff --git a/src/qt/qt_harddiskdialog.cpp b/src/qt/qt_harddiskdialog.cpp index dd598af46..91179cdbc 100644 --- a/src/qt/qt_harddiskdialog.cpp +++ b/src/qt/qt_harddiskdialog.cpp @@ -138,6 +138,10 @@ QString HarddiskDialog::fileName() const { return ui->fileField->fileName(); } +uint32_t HarddiskDialog::speed() const { + return static_cast(ui->comboBoxSpeed->currentData().toUInt()); +} + void HarddiskDialog::on_comboBoxFormat_currentIndexChanged(int index) { bool enabled; if (index == 5) { /* They switched to a diff VHD; disable the geometry fields. */ @@ -700,6 +704,8 @@ void HarddiskDialog::on_comboBoxBus_currentIndexChanged(int index) { ui->lineEditSectors->setValidator(new QIntValidator(1, max_sectors, this)); Harddrives::populateBusChannels(ui->comboBoxChannel->model(), ui->comboBoxBus->currentData().toInt()); + Harddrives::populateSpeeds(ui->comboBoxSpeed->model(), ui->comboBoxBus->currentData().toInt()); + switch (ui->comboBoxBus->currentData().toInt()) { case HDD_BUS_MFM: diff --git a/src/qt/qt_harddiskdialog.hpp b/src/qt/qt_harddiskdialog.hpp index 321dc4708..408726f63 100644 --- a/src/qt/qt_harddiskdialog.hpp +++ b/src/qt/qt_harddiskdialog.hpp @@ -21,6 +21,7 @@ public: uint32_t cylinders() const { return cylinders_; } uint32_t heads() const { return heads_; } uint32_t sectors() const { return sectors_; } + uint32_t speed() const; signals: void fileProgress(int i); diff --git a/src/qt/qt_harddiskdialog.ui b/src/qt/qt_harddiskdialog.ui index 823652aa6..84c557660 100644 --- a/src/qt/qt_harddiskdialog.ui +++ b/src/qt/qt_harddiskdialog.ui @@ -42,6 +42,16 @@ + + + + Speed: + + + + + + diff --git a/src/qt/qt_harddrive_common.cpp b/src/qt/qt_harddrive_common.cpp index a47e036c7..5ac46dd42 100644 --- a/src/qt/qt_harddrive_common.cpp +++ b/src/qt/qt_harddrive_common.cpp @@ -54,6 +54,27 @@ void Harddrives::populateRemovableBuses(QAbstractItemModel *model) { model->setData(model->index(2, 0), HDD_BUS_SCSI, Qt::UserRole); } +void Harddrives::populateSpeeds(QAbstractItemModel *model, int bus) { + int num_preset; + + switch (bus) { + case HDD_BUS_IDE: + num_preset = hdd_preset_get_num(); + break; + + default: + num_preset = 1; + } + + model->removeRows(0, model->rowCount()); + model->insertRows(0, num_preset); + + for (int i = 0; i < num_preset; i++) { + model->setData(model->index(i, 0), QObject::tr(hdd_preset_getname(i))); + model->setData(model->index(i, 0), i, Qt::UserRole); + } +} + void Harddrives::populateBusChannels(QAbstractItemModel *model, int bus) { model->removeRows(0, model->rowCount()); diff --git a/src/qt/qt_harddrive_common.hpp b/src/qt/qt_harddrive_common.hpp index 5d4bbc9e0..6e133506f 100644 --- a/src/qt/qt_harddrive_common.hpp +++ b/src/qt/qt_harddrive_common.hpp @@ -10,6 +10,7 @@ namespace Harddrives { void populateBuses(QAbstractItemModel* model); void populateRemovableBuses(QAbstractItemModel* model); void populateBusChannels(QAbstractItemModel* model, int bus); + void populateSpeeds(QAbstractItemModel* model, int bus); QString BusChannelName(uint8_t bus, uint8_t channel); inline SettingsBusTracking* busTrackClass = nullptr; }; diff --git a/src/qt/qt_settingsharddisks.cpp b/src/qt/qt_settingsharddisks.cpp index df9c6b1dc..0c3938c91 100644 --- a/src/qt/qt_settingsharddisks.cpp +++ b/src/qt/qt_settingsharddisks.cpp @@ -37,6 +37,7 @@ const int ColumnCylinders = 2; const int ColumnHeads = 3; const int ColumnSectors = 4; const int ColumnSize = 5; +const int ColumnSpeed = 6; const int DataBus = Qt::UserRole; const int DataBusChannel = Qt::UserRole + 1; @@ -94,6 +95,8 @@ static void addRow(QAbstractItemModel* model, hard_disk_t* hd) { model->setData(model->index(row, ColumnHeads), hd->hpc); model->setData(model->index(row, ColumnSectors), hd->spt); model->setData(model->index(row, ColumnSize), (hd->tracks * hd->hpc * hd->spt) >> 11); + model->setData(model->index(row, ColumnSpeed), hdd_preset_getname(hd->speed_preset)); + model->setData(model->index(row, ColumnSpeed), hd->speed_preset, Qt::UserRole); } SettingsHarddisks::SettingsHarddisks(QWidget *parent) : @@ -102,13 +105,14 @@ SettingsHarddisks::SettingsHarddisks(QWidget *parent) : { ui->setupUi(this); - QAbstractItemModel* model = new QStandardItemModel(0, 6, this); + QAbstractItemModel* model = new QStandardItemModel(0, 7, this); model->setHeaderData(ColumnBus, Qt::Horizontal, tr("Bus")); model->setHeaderData(ColumnFilename, Qt::Horizontal, tr("File")); model->setHeaderData(ColumnCylinders, Qt::Horizontal, tr("C")); model->setHeaderData(ColumnHeads, Qt::Horizontal, tr("H")); model->setHeaderData(ColumnSectors, Qt::Horizontal, tr("S")); model->setHeaderData(ColumnSize, Qt::Horizontal, tr("MiB")); + model->setHeaderData(ColumnSpeed, Qt::Horizontal, tr("Speed")); ui->tableView->setModel(model); for (int i = 0; i < HDD_NUM; i++) { @@ -149,6 +153,7 @@ void SettingsHarddisks::save() { hdd[i].tracks = idx.siblingAtColumn(ColumnCylinders).data().toUInt(); hdd[i].hpc = idx.siblingAtColumn(ColumnHeads).data().toUInt(); hdd[i].spt = idx.siblingAtColumn(ColumnSectors).data().toUInt(); + hdd[i].speed_preset = idx.siblingAtColumn(ColumnSpeed).data(Qt::UserRole).toUInt(); QByteArray fileName = idx.siblingAtColumn(ColumnFilename).data(Qt::UserRole).toString().toUtf8(); strncpy(hdd[i].fn, fileName.data(), sizeof(hdd[i].fn) - 1); @@ -173,6 +178,7 @@ void SettingsHarddisks::on_comboBoxBus_currentIndexChanged(int index) { } Harddrives::populateBusChannels(ui->comboBoxChannel->model(), ui->comboBoxBus->currentData().toInt()); + Harddrives::populateSpeeds(ui->comboBoxSpeed->model(), ui->comboBoxBus->currentData().toInt()); int chanIdx = 0; switch (ui->comboBoxBus->currentData().toInt()) @@ -221,15 +227,32 @@ void SettingsHarddisks::on_comboBoxChannel_currentIndexChanged(int index) { } } +void SettingsHarddisks::on_comboBoxSpeed_currentIndexChanged(int index) { + if (index < 0) { + return; + } + + auto idx = ui->tableView->selectionModel()->currentIndex(); + if (idx.isValid()) { + auto* model = ui->tableView->model(); + auto col = idx.siblingAtColumn(ColumnSpeed); + model->setData(col, ui->comboBoxSpeed->currentData(Qt::UserRole), Qt::UserRole); + model->setData(col, hdd_preset_getname(ui->comboBoxSpeed->currentData(Qt::UserRole).toUInt())); + } +} + void SettingsHarddisks::onTableRowChanged(const QModelIndex ¤t) { bool hidden = !current.isValid(); ui->labelBus->setHidden(hidden); ui->labelChannel->setHidden(hidden); + ui->labelSpeed->setHidden(hidden); ui->comboBoxBus->setHidden(hidden); ui->comboBoxChannel->setHidden(hidden); + ui->comboBoxSpeed->setHidden(hidden); uint32_t bus = current.siblingAtColumn(ColumnBus).data(DataBus).toUInt(); uint32_t busChannel = current.siblingAtColumn(ColumnBus).data(DataBusChannel).toUInt(); + uint32_t speed = current.siblingAtColumn(ColumnSpeed).data(Qt::UserRole).toUInt(); auto* model = ui->comboBoxBus->model(); auto match = model->match(model->index(0, 0), Qt::UserRole, bus); @@ -241,6 +264,12 @@ void SettingsHarddisks::onTableRowChanged(const QModelIndex ¤t) { if (! match.isEmpty()) { ui->comboBoxChannel->setCurrentIndex(match.first().row()); } + + model = ui->comboBoxSpeed->model(); + match = model->match(model->index(0, 0), Qt::UserRole, speed); + if (! match.isEmpty()) { + ui->comboBoxSpeed->setCurrentIndex(match.first().row()); + } } static void addDriveFromDialog(Ui::SettingsHarddisks* ui, const HarddiskDialog& dlg) { @@ -255,6 +284,7 @@ static void addDriveFromDialog(Ui::SettingsHarddisks* ui, const HarddiskDialog& hd.hpc = dlg.heads(); hd.spt = dlg.sectors(); strncpy(hd.fn, fn.data(), sizeof(hd.fn) - 1); + hd.speed_preset = dlg.speed(); addRow(ui->tableView->model(), &hd); ui->tableView->resizeColumnsToContents(); diff --git a/src/qt/qt_settingsharddisks.hpp b/src/qt/qt_settingsharddisks.hpp index b10e79029..a8aebb0bd 100644 --- a/src/qt/qt_settingsharddisks.hpp +++ b/src/qt/qt_settingsharddisks.hpp @@ -19,6 +19,7 @@ public: private slots: void on_comboBoxChannel_currentIndexChanged(int index); + void on_comboBoxSpeed_currentIndexChanged(int index); private slots: void on_pushButtonRemove_clicked(); diff --git a/src/qt/qt_settingsharddisks.ui b/src/qt/qt_settingsharddisks.ui index fa913beea..b5ab110c9 100644 --- a/src/qt/qt_settingsharddisks.ui +++ b/src/qt/qt_settingsharddisks.ui @@ -64,6 +64,16 @@ + + + + Speed: + + + + + + From 301b422816f3a3999c3b5fbe2d9cfb9697fefb23 Mon Sep 17 00:00:00 2001 From: AsciiWolf Date: Tue, 19 Jul 2022 14:20:46 +0200 Subject: [PATCH 079/386] Add missing semicolon to desktop file It should be there according to the desktop file specification --- src/unix/assets/net.86box.86Box.desktop | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/unix/assets/net.86box.86Box.desktop b/src/unix/assets/net.86box.86Box.desktop index 3eab58322..83d20b9e7 100644 --- a/src/unix/assets/net.86box.86Box.desktop +++ b/src/unix/assets/net.86box.86Box.desktop @@ -6,4 +6,4 @@ Exec=86Box Icon=net.86box.86Box Terminal=false Type=Application -Categories=System;Emulator +Categories=System;Emulator; From df5c1a1a46a992bece32ef8ce090911324b052cb Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 19 Jul 2022 16:32:23 +0200 Subject: [PATCH 080/386] ISA PS/2: Clean-ups and converted into a typedef struct. MCA PS/2: Added Model 60 (8-slot version of 50 with the same bios) and Model 65sx (essentially the same as 55sx but with a new bios and a secondary nvram a la 70-80 but limited to 2KB of size instead of 8KB). MCA PS/2: Made the i486 cpu selection on only on Type 3 MCA models (70-80) and not Type 2 anymore, therefore the latter is limited to 386DX cpu's only. --- src/include/86box/machine.h | 2 + src/include/86box/nvr_ps2.h | 1 + src/machine/m_ps2_isa.c | 283 +++++++++++++++++++----------------- src/machine/m_ps2_mca.c | 100 ++++++++++--- src/machine/machine_table.c | 14 +- src/nvr_ps2.c | 35 ++++- 6 files changed, 266 insertions(+), 169 deletions(-) diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index 8456b4dc8..449942915 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -777,7 +777,9 @@ extern int machine_ps2_m30_286_init(const machine_t *); /* m_ps2_mca.c */ extern int machine_ps2_model_50_init(const machine_t *); +extern int machine_ps2_model_60_init(const machine_t *); extern int machine_ps2_model_55sx_init(const machine_t *); +extern int machine_ps2_model_65sx_init(const machine_t *); extern int machine_ps2_model_70_type3_init(const machine_t *); extern int machine_ps2_model_80_init(const machine_t *); extern int machine_ps2_model_80_axx_init(const machine_t *); diff --git a/src/include/86box/nvr_ps2.h b/src/include/86box/nvr_ps2.h index 7cb37a625..fe3f141e2 100644 --- a/src/include/86box/nvr_ps2.h +++ b/src/include/86box/nvr_ps2.h @@ -40,6 +40,7 @@ extern const device_t ps2_nvr_device; +extern const device_t ps2_nvr_55ls_device; #endif /*EMU_NVRPS2_H*/ diff --git a/src/machine/m_ps2_isa.c b/src/machine/m_ps2_isa.c index c39c4eb92..6e26b159d 100644 --- a/src/machine/m_ps2_isa.c +++ b/src/machine/m_ps2_isa.c @@ -1,5 +1,6 @@ #include #include +#include #include #include #include <86box/86box.h> @@ -25,145 +26,175 @@ #include <86box/machine.h> -static uint8_t ps2_91, ps2_94, ps2_102, ps2_103, ps2_104, ps2_105, ps2_190; -static serial_t *ps2_uart; +typedef struct { + int model; + int cpu_type; + + uint8_t ps2_91, + ps2_92, + ps2_94, + ps2_102, + ps2_103, + ps2_104, + ps2_105, + ps2_190; + + serial_t *uart; +} ps2_isa_t; -static struct +static void +ps2_write(uint16_t port, uint8_t val, void *priv) { - uint8_t status, int_status; - uint8_t attention, ctrl; -} ps2_hd; + ps2_isa_t *ps2 = (ps2_isa_t *)priv; + switch (port) { + case 0x0094: + ps2->ps2_94 = val; + break; -static uint8_t ps2_read(uint16_t port, void *p) -{ - uint8_t temp; + case 0x0102: + if (!(ps2->ps2_94 & 0x80)) { + lpt1_remove(); + serial_remove(ps2->uart); + if (val & 0x04) { + if (val & 0x08) + serial_setup(ps2->uart, COM1_ADDR, COM1_IRQ); + else + serial_setup(ps2->uart, COM2_ADDR, COM2_IRQ); + } + if (val & 0x10) { + switch ((val >> 5) & 3) { + case 0: + lpt1_init(LPT_MDA_ADDR); + break; + case 1: + lpt1_init(LPT1_ADDR); + break; + case 2: + lpt1_init(LPT2_ADDR); + break; + } + } + ps2->ps2_102 = val; + } + break; - switch (port) - { - case 0x91: - temp = ps2_91; - ps2_91 = 0; - return temp; - case 0x94: - return ps2_94; - case 0x102: - return ps2_102 | 8; - case 0x103: - return ps2_103; - case 0x104: - return ps2_104; - case 0x105: - return ps2_105; - case 0x190: - return ps2_190; + case 0x0103: + ps2->ps2_103 = val; + break; -#ifdef FIXME - case 0x322: - temp = ps2_hd.status; - break; - case 0x324: - temp = ps2_hd.int_status; - ps2_hd.int_status &= ~0x02; - break; -#endif + case 0x0104: + ps2->ps2_104 = val; + break; - default: - temp = 0xff; - break; - } + case 0x0105: + ps2->ps2_105 = val; + break; - return temp; + case 0x0190: + ps2->ps2_190 = val; + break; + } } -static void ps2_write(uint16_t port, uint8_t val, void *p) +static uint8_t +ps2_read(uint16_t port, void *priv) { - switch (port) - { - case 0x94: - ps2_94 = val; - break; - case 0x102: - if (!(ps2_94 & 0x80)) { - lpt1_remove(); - serial_remove(ps2_uart); - if (val & 0x04) { - if (val & 0x08) - serial_setup(ps2_uart, COM1_ADDR, COM1_IRQ); - else - serial_setup(ps2_uart, COM2_ADDR, COM2_IRQ); - } - if (val & 0x10) { - switch ((val >> 5) & 3) - { - case 0: - lpt1_init(LPT_MDA_ADDR); - break; - case 1: - lpt1_init(LPT1_ADDR); - break; - case 2: - lpt1_init(LPT2_ADDR); - break; - } - } - ps2_102 = val; - } - break; + ps2_isa_t *ps2 = (ps2_isa_t *)priv; + uint8_t temp = 0xff; - case 0x103: - ps2_103 = val; - break; - case 0x104: - ps2_104 = val; - break; - case 0x105: - ps2_105 = val; - break; - case 0x190: - ps2_190 = val; - break; + switch (port) { + case 0x0091: + temp = ps2->ps2_91; + ps2->ps2_91 = 0; + break; -#ifdef FIXME - case 0x322: - ps2_hd.ctrl = val; - if (val & 0x80) - ps2_hd.status |= 0x02; - break; - case 0x324: - ps2_hd.attention = val & 0xf0; - if (ps2_hd.attention) - ps2_hd.status = 0x14; - break; -#endif - } + case 0x0094: + temp = ps2->ps2_94; + break; + + case 0x0102: + temp = ps2->ps2_102 | 0x08; + break; + + case 0x0103: + temp = ps2->ps2_103; + break; + + case 0x0104: + temp = ps2->ps2_104; + break; + + case 0x0105: + temp = ps2->ps2_105; + break; + + case 0x0190: + temp = ps2->ps2_190; + break; + } + + return temp; } - -static void ps2board_init(void) +static void +ps2_isa_setup(int model, int cpu_type) { - io_sethandler(0x0091, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); - io_sethandler(0x0094, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); - io_sethandler(0x0102, 0x0004, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); - io_sethandler(0x0190, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); -#ifdef FIXME - io_sethandler(0x0320, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); - io_sethandler(0x0322, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); - io_sethandler(0x0324, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); -#endif + ps2_isa_t *ps2; + void *priv; + + ps2 = (ps2_isa_t *)malloc(sizeof(ps2_isa_t)); + memset(ps2, 0x00, sizeof(ps2_isa_t)); + ps2->model = model; + ps2->cpu_type = cpu_type; + + + io_sethandler(0x0091, 1, + ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2); + io_sethandler(0x0094, 1, + ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2); + io_sethandler(0x0102, 4, + ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2); + io_sethandler(0x0190, 1, + ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2); + + ps2->uart = device_add_inst(&ns16450_device, 1); + + lpt1_remove(); + lpt1_init(LPT_MDA_ADDR); device_add(&port_92_device); - ps2_190 = 0; + mem_remap_top(384); - ps2_uart = device_add_inst(&ns16450_device, 1); + device_add(&ps_nvr_device); - lpt1_init(LPT_MDA_ADDR); + device_add(&fdc_at_ps1_device); - memset(&ps2_hd, 0, sizeof(ps2_hd)); + /* Enable the builtin HDC. */ + if (hdc_current == 1) { + priv = device_add(&ps1_hdc_device); + ps1_hdc_inform(priv, &ps2->ps2_91); + } + + device_add(&ps1vga_device); } +static void +ps2_isa_common_init(const machine_t *model) +{ + machine_common_init(model); + + refresh_at_enable = 1; + pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_at); + + dma16_init(); + pic2_init(); + + device_add(&keyboard_ps2_device); + device_add(&port_6x_ps2_device); +} int machine_ps2_m30_286_init(const machine_t *model) @@ -178,28 +209,10 @@ machine_ps2_m30_286_init(const machine_t *model) if (bios_only || !ret) return ret; - machine_common_init(model); + ps2_isa_common_init(model); - mem_remap_top(384); - - device_add(&fdc_at_ps1_device); - - refresh_at_enable = 1; - pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_at); - dma16_init(); - device_add(&keyboard_ps2_device); - device_add(&port_6x_ps2_device); - device_add(&ps_nvr_device); - pic2_init(); - ps2board_init(); - device_add(&ps1vga_device); - - /* Enable the builtin HDC. */ - if (hdc_current == 1) { - priv = device_add(&ps1_hdc_device); - - ps1_hdc_inform(priv, &ps2_91); - } + ps2_isa_setup(30, 286); return ret; } + diff --git a/src/machine/m_ps2_mca.c b/src/machine/m_ps2_mca.c index 094487d37..c0296fb2a 100644 --- a/src/machine/m_ps2_mca.c +++ b/src/machine/m_ps2_mca.c @@ -253,9 +253,9 @@ static uint8_t model_50_read(uint16_t port) switch (port) { case 0x100: - return 0xff; + return ps2.planar_id & 0xff; case 0x101: - return 0xfb; + return ps2.planar_id >> 8; case 0x102: return ps2.option[0]; case 0x103: @@ -277,9 +277,9 @@ static uint8_t model_55sx_read(uint16_t port) switch (port) { case 0x100: - return 0xff; + return ps2.planar_id & 0xff; case 0x101: - return 0xfb; + return ps2.planar_id >> 8; case 0x102: return ps2.option[0]; case 0x103: @@ -325,9 +325,9 @@ static uint8_t model_80_read(uint16_t port) switch (port) { case 0x100: - return 0xff; + return ps2.planar_id & 0xff; case 0x101: - return 0xfd; + return ps2.planar_id >> 8; case 0x102: return ps2.option[0]; case 0x103: @@ -829,17 +829,17 @@ static void ps2_mca_write(uint16_t port, uint8_t val, void *p) static void ps2_mca_board_common_init() { - io_sethandler(0x0091, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); - io_sethandler(0x0094, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); - io_sethandler(0x0096, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); - io_sethandler(0x0100, 0x0008, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); + io_sethandler(0x0091, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); + io_sethandler(0x0094, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); + io_sethandler(0x0096, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); + io_sethandler(0x0100, 0x0008, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); device_add(&port_6x_ps2_device); - device_add(&port_92_device); + device_add(&port_92_device); - ps2.setup = 0xff; + ps2.setup = 0xff; - lpt1_init(LPT_MDA_ADDR); + lpt1_init(LPT_MDA_ADDR); } static uint8_t ps2_mem_expansion_read(int port, void *p) @@ -951,12 +951,12 @@ static void ps2_mca_mem_d071_init(int start_mb) } -static void ps2_mca_board_model_50_init() +static void ps2_mca_board_model_50_init(int slots) { ps2_mca_board_common_init(); mem_remap_top(384); - mca_init(4); + mca_init(slots); device_add(&keyboard_ps2_mca_2_device); ps2.planar_read = model_50_read; @@ -972,7 +972,7 @@ static void ps2_mca_board_model_50_init() device_add(&ps1vga_mca_device); } -static void ps2_mca_board_model_55sx_init() +static void ps2_mca_board_model_55sx_init(int has_sec_nvram, int slots) { ps2_mca_board_common_init(); @@ -1015,14 +1015,20 @@ static void ps2_mca_board_model_55sx_init() break; } - mca_init(4); + mca_init(slots); device_add(&keyboard_ps2_mca_device); + if (has_sec_nvram == 1) + device_add(&ps2_nvr_55ls_device); + else if (has_sec_nvram == 2) { + device_add(&ps2_nvr_device); + } + ps2.planar_read = model_55sx_read; ps2.planar_write = model_55sx_write; - if (gfxcard == VID_INTERNAL) - device_add(&ps1vga_mca_device); + if (gfxcard == VID_INTERNAL) + device_add(&ps1vga_mca_device); model_55sx_mem_recalc(); } @@ -1383,7 +1389,31 @@ machine_ps2_model_50_init(const machine_t *model) machine_ps2_common_init(model); - ps2_mca_board_model_50_init(); + ps2.planar_id = 0xfbff; + ps2_mca_board_model_50_init(4); + + return ret; +} + +int +machine_ps2_model_60_init(const machine_t *model) +{ + int ret; + + ret = bios_load_interleaved("roms/machines/ibmps2_m50/90x7420.zm13", + "roms/machines/ibmps2_m50/90x7429.zm18", + 0x000f0000, 131072, 0); + ret &= bios_load_aux_interleaved("roms/machines/ibmps2_m50/90x7423.zm14", + "roms/machines/ibmps2_m50/90x7426.zm16", + 0x000e0000, 65536, 0); + + if (bios_only || !ret) + return ret; + + machine_ps2_common_init(model); + + ps2.planar_id = 0xf7ff; + ps2_mca_board_model_50_init(8); return ret; } @@ -1403,12 +1433,33 @@ machine_ps2_model_55sx_init(const machine_t *model) machine_ps2_common_init(model); - ps2_mca_board_model_55sx_init(); + ps2.planar_id = 0xfffb; + ps2_mca_board_model_55sx_init(0, 4); return ret; } +int +machine_ps2_model_65sx_init(const machine_t *model) +{ + int ret; + + ret = bios_load_interleaved("roms/machines/ibmps2_m65sx/64F3608.BIN", + "roms/machines/ibmps2_m65sx/64F3611.BIN", + 0x000e0000, 131072, 0); + + if (bios_only || !ret) + return ret; + + machine_ps2_common_init(model); + + ps2.planar_id = 0xe3ff; + ps2_mca_board_model_55sx_init(1, 8); + + return ret; +} + int machine_ps2_model_70_type3_init(const machine_t *model) { @@ -1443,9 +1494,10 @@ machine_ps2_model_80_init(const machine_t *model) if (bios_only || !ret) return ret; - machine_ps2_common_init(model); + machine_ps2_common_init(model); - ps2_mca_board_model_80_type2_init(0); + ps2.planar_id = 0xfdff; + ps2_mca_board_model_80_type2_init(0); return ret; } @@ -1470,3 +1522,5 @@ machine_ps2_model_80_axx_init(const machine_t *model) return ret; } + + diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 7a0873f20..96f70ee65 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -312,6 +312,8 @@ const machine_t machines[] = { /* 286 machines that utilize the MCA bus */ /* Has IBM PS/2 Type 2 KBC firmware. */ { "[MCA] IBM PS/2 model 50", "ibmps2_m50", MACHINE_TYPE_286, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_50_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286 | CPU_PKG_486SLC_IBM, CPU_BLOCK_NONE, 10000000, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 1024, 10240, 1024, 63, NULL, NULL }, + /* Has IBM PS/2 Type 2 KBC firmware. */ + { "[MCA] IBM PS/2 model 60", "ibmps2_m60", MACHINE_TYPE_286, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_60_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286 | CPU_PKG_486SLC_IBM, CPU_BLOCK_NONE, 10000000, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 1024, 10240, 1024, 63, NULL, NULL }, /* 386SX machines */ /* ISA slots available because an official IBM expansion for that existed. */ @@ -373,6 +375,8 @@ const machine_t machines[] = { /* 386SX machines which utilize the MCA bus */ /* Has IBM PS/2 Type 1 KBC firmware. */ { "[MCA] IBM PS/2 model 55SX", "ibmps2_m55sx", MACHINE_TYPE_386SX, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_55sx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 1024, 8192, 1024, 63, NULL, NULL }, + /* Has IBM PS/2 Type 1 KBC firmware. */ + { "[MCA] IBM PS/2 model 65SX", "ibmps2_m65sx", MACHINE_TYPE_386SX, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_65sx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 1024, 8192, 1024, 63, NULL, NULL }, /* 486SLC machines */ /* 486SLC machines with just the ISA slot */ @@ -397,11 +401,7 @@ const machine_t machines[] = { /* 386DX machines which utilize the MCA bus */ /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[MCA] IBM PS/2 model 70 (type 3)", "ibmps2_m70_type3", MACHINE_TYPE_386DX, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_70_type3_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX | CPU_PKG_486BL, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 2048, 65536, 2048, 63, NULL, NULL }, - /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[MCA] IBM PS/2 model 80 (type 2)", "ibmps2_m80", MACHINE_TYPE_386DX, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_80_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX | CPU_PKG_486BL | CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 1024, 65536, 1024, 63, NULL, NULL }, - /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[MCA] IBM PS/2 model 80 (type 3)", "ibmps2_m80_type3", MACHINE_TYPE_386DX, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_80_axx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX | CPU_PKG_486BL | CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 2048, 65536, 2048, 63, NULL, NULL }, + { "[MCA] IBM PS/2 model 80 (type 2)", "ibmps2_m80", MACHINE_TYPE_386DX, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_80_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX | CPU_PKG_486BL, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 1024, 65536, 1024, 63, NULL, NULL }, /* 386DX/486 machines */ /* The BIOS sends commands C9 without a parameter and D5, both of which are @@ -411,6 +411,10 @@ const machine_t machines[] = { { "[OPTi 495] DataExpert SX495", "ami495", MACHINE_TYPE_386DX_486, MACHINE_CHIPSET_OPTI_495, machine_at_opti495_ami_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX | CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_IDE, 1024, 32768, 1024, 127, NULL, NULL }, /* Has AMIKey F KBC firmware (it's just the MR BIOS for the above machine). */ { "[OPTi 495] DataExpert SX495 (MR BIOS)", "mr495", MACHINE_TYPE_386DX_486, MACHINE_CHIPSET_OPTI_495, machine_at_opti495_mr_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX | CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_IDE, 1024, 32768, 1024, 127, NULL, NULL }, + /* Has IBM PS/2 Type 1 KBC firmware. */ + { "[MCA] IBM PS/2 model 70 (type 3)", "ibmps2_m70_type3", MACHINE_TYPE_386DX_486, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_70_type3_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX | CPU_PKG_486BL | CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 2048, 65536, 2048, 63, NULL, NULL }, + /* Has IBM PS/2 Type 1 KBC firmware. */ + { "[MCA] IBM PS/2 model 80 (type 3)", "ibmps2_m80_type3", MACHINE_TYPE_386DX_486, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_80_axx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX | CPU_PKG_486BL | CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 2048, 65536, 2048, 63, NULL, NULL }, /* 486 machines - Socket 1 */ /* Has JetKey 5 KBC Firmware which looks like it is a clone of AMIKey type F. diff --git a/src/nvr_ps2.c b/src/nvr_ps2.c index cd6f47af7..e82eff150 100644 --- a/src/nvr_ps2.c +++ b/src/nvr_ps2.c @@ -53,7 +53,8 @@ typedef struct { int addr; - uint8_t ram[8192]; + uint8_t *ram; + int size; char *fn; } ps2_nvr_t; @@ -114,6 +115,11 @@ ps2_nvr_init(const device_t *info) nvr = (ps2_nvr_t *)malloc(sizeof(ps2_nvr_t)); memset(nvr, 0x00, sizeof(ps2_nvr_t)); + if (info->local) + nvr->size = 2048; + else + nvr->size = 8192; + /* Set up the NVR file's name. */ c = strlen(machine_get_internal_name()) + 9; nvr->fn = (char *)malloc(c + 1); @@ -124,9 +130,10 @@ ps2_nvr_init(const device_t *info) f = nvr_fopen(nvr->fn, "rb"); - memset(nvr->ram, 0xff, 8192); + nvr->ram = (uint8_t *)malloc(nvr->size); + memset(nvr->ram, 0xff, nvr->size); if (f != NULL) { - if (fread(nvr->ram, 1, 8192, f) != 8192) + if (fread(nvr->ram, 1, nvr->size, f) != nvr->size) fatal("ps2_nvr_init(): Error reading EEPROM data\n"); fclose(f); } @@ -144,16 +151,18 @@ ps2_nvr_close(void *priv) f = nvr_fopen(nvr->fn, "wb"); if (f != NULL) { - (void)fwrite(nvr->ram, 8192, 1, f); + (void)fwrite(nvr->ram, nvr->size, 1, f); fclose(f); } + if (nvr->ram != NULL) + free(nvr->ram); + free(nvr); } - const device_t ps2_nvr_device = { - .name = "PS/2 Secondary NVRAM", + .name = "PS/2 Secondary NVRAM for PS/2 Models 70-80", .internal_name = "ps2_nvr", .flags = 0, .local = 0, @@ -165,3 +174,17 @@ const device_t ps2_nvr_device = { .force_redraw = NULL, .config = NULL }; + +const device_t ps2_nvr_55ls_device = { + .name = "PS/2 Secondary NVRAM for PS/2 Models 55LS-65SX", + .internal_name = "ps2_nvr_55ls", + .flags = 0, + .local = 1, + .init = ps2_nvr_init, + .close = ps2_nvr_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; From a8c0d30a0a0fd8a96ac02643e1158a44935bdaf5 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 19 Jul 2022 17:18:46 +0200 Subject: [PATCH 081/386] Apparently a default temp val of 0xff in the read makes XGA-1/2 panic on GUI's... --- src/video/vid_xga.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index 40f0aa6aa..a7ee05ffd 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -1915,7 +1915,7 @@ xga_memio_writel(uint32_t addr, uint32_t val, void *p) static uint8_t xga_mem_read(uint32_t addr, xga_t *xga, svga_t *svga) { - uint8_t temp = 0xff; + uint8_t temp = 0; addr &= 0x1fff; From 8767bb5894fc01d1b3ec59654934cbaf4df433fc Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 19 Jul 2022 17:25:17 +0200 Subject: [PATCH 082/386] Made reg 0x53 (read only) default temp val to 0x70 to satisfy xgaaidos.sys's detection. Apparently MCA Audio cards always want auto-init enabled. --- src/dma.c | 4 ++-- src/video/vid_xga.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/dma.c b/src/dma.c index a995660a5..6ab9a12ad 100644 --- a/src/dma.c +++ b/src/dma.c @@ -1448,7 +1448,7 @@ dma_channel_read(int channel) dma_sg_next_addr(dma_c); else { tc = 1; - if (dma_c->mode & 0x10) { /*Auto-init*/ + if ((dma_c->mode & 0x10) || dma_ps2.is_ps2) { /*Auto-init*/ dma_c->cc = dma_c->cb; dma_c->ac = dma_c->ab; } else @@ -1536,7 +1536,7 @@ dma_channel_write(int channel, uint16_t val) if (dma_advanced && (dma_c->sg_status & 1) && !(dma_c->sg_status & 6)) dma_sg_next_addr(dma_c); else { - if (dma_c->mode & 0x10) { /*Auto-init*/ + if ((dma_c->mode & 0x10) || dma_ps2.is_ps2) { /*Auto-init*/ dma_c->cc = dma_c->cb; dma_c->ac = dma_c->ab; } else diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index a7ee05ffd..2941d9cb2 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -577,7 +577,7 @@ xga_ext_inb(uint16_t addr, void *p) ret = 0x0b; break; case 0x53: - ret = 0xb0; + ret = 0x70; break; case 0x54: ret = xga->clk_sel_1; From 2df92dc7f30cd5b9dd7b82d31da179cd519357ea Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 19 Jul 2022 19:21:15 +0200 Subject: [PATCH 083/386] Actually fix the fixed dma. --- src/dma.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/src/dma.c b/src/dma.c index a995660a5..b5809f9e6 100644 --- a/src/dma.c +++ b/src/dma.c @@ -592,7 +592,7 @@ static uint8_t dma_ps2_read(uint16_t addr, void *priv) { dma_t *dma_c = &dma[dma_ps2.xfr_channel]; - uint8_t temp = 0xff; + uint8_t temp = 0; switch (addr) { case 0x1a: @@ -622,7 +622,7 @@ dma_ps2_read(uint16_t addr, void *priv) else temp = dma_c->cc & 0xff; dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; - break; + break; case 6: /*Read DMA status*/ if (dma_ps2.byte_ptr) { @@ -650,7 +650,6 @@ dma_ps2_read(uint16_t addr, void *priv) } break; } - return(temp); } @@ -719,7 +718,7 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv) dma_c->cc = (dma_c->cc & 0xff00) | val; dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; dma_c->cb = dma_c->cc; - break; + break; case 7: /*Mode register*/ mode = 0; @@ -727,9 +726,9 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv) mode |= 0x20; if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_MEM_TO_IO) mode |= 8; - else if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_IO_TO_MEM) + else if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_IO_TO_MEM) mode |= 4; - dma_c->mode = (dma_c->mode & ~0x2c) | mode; + dma_c->mode = (dma_c->mode & ~0x2c) | 0x10 | mode; dma_c->ps2_mode = val; dma_c->size = val & DMA_PS2_SIZE16; break; From af1c8982018dbba20efd412e4294ab431a3fd450 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 19 Jul 2022 19:23:07 +0200 Subject: [PATCH 084/386] (NW) --- src/dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/dma.c b/src/dma.c index b5809f9e6..e6ab520d3 100644 --- a/src/dma.c +++ b/src/dma.c @@ -592,7 +592,7 @@ static uint8_t dma_ps2_read(uint16_t addr, void *priv) { dma_t *dma_c = &dma[dma_ps2.xfr_channel]; - uint8_t temp = 0; + uint8_t temp = 0xff; switch (addr) { case 0x1a: From e1b44ad064b2d538360781e3fc82cca84fa8578d Mon Sep 17 00:00:00 2001 From: richardg867 Date: Tue, 19 Jul 2022 14:59:29 -0300 Subject: [PATCH 085/386] Jenkins: Allow master node to do IRC notification --- .ci/Jenkinsfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.ci/Jenkinsfile b/.ci/Jenkinsfile index 61330031a..27f7cb855 100644 --- a/.ci/Jenkinsfile +++ b/.ci/Jenkinsfile @@ -317,7 +317,7 @@ pipeline { scmWebUrl: commitBrowser[buildBranch] /* Notify IRC, which needs a node for whatever reason. */ - node('citadel') { + node('citadel || master') { ircNotify() } } catch (e) { From b7c1e9ad330d090df257bd3a71cbe09f79852644 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 19 Jul 2022 20:05:34 +0200 Subject: [PATCH 086/386] Revert the DMA auto-init hack on PS/2. --- src/dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/dma.c b/src/dma.c index 39232fb90..7d6d4b5c3 100644 --- a/src/dma.c +++ b/src/dma.c @@ -728,7 +728,7 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv) mode |= 8; else if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_IO_TO_MEM) mode |= 4; - dma_c->mode = (dma_c->mode & ~0x2c) | 0x10 | mode; + dma_c->mode = (dma_c->mode & ~0x2c) | mode; dma_c->ps2_mode = val; dma_c->size = val & DMA_PS2_SIZE16; break; From 15eced5b557231aa6746bd8763eb4e6420ca3a5e Mon Sep 17 00:00:00 2001 From: richardg867 Date: Tue, 19 Jul 2022 15:07:38 -0300 Subject: [PATCH 087/386] Jenkins: Also allow rg to use IRC over LAN --- .ci/Jenkinsfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.ci/Jenkinsfile b/.ci/Jenkinsfile index 27f7cb855..53e146a64 100644 --- a/.ci/Jenkinsfile +++ b/.ci/Jenkinsfile @@ -317,7 +317,7 @@ pipeline { scmWebUrl: commitBrowser[buildBranch] /* Notify IRC, which needs a node for whatever reason. */ - node('citadel || master') { + node('citadel || rg || master') { ircNotify() } } catch (e) { From bfc05e7db25d4baa3578795a67ab711aa5012d79 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 19 Jul 2022 20:44:25 +0200 Subject: [PATCH 088/386] Revert the rest of autoinit on PS/2. --- src/dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/dma.c b/src/dma.c index 7d6d4b5c3..c109f1b8d 100644 --- a/src/dma.c +++ b/src/dma.c @@ -1447,7 +1447,7 @@ dma_channel_read(int channel) dma_sg_next_addr(dma_c); else { tc = 1; - if ((dma_c->mode & 0x10) || dma_ps2.is_ps2) { /*Auto-init*/ + if (dma_c->mode & 0x10) { /*Auto-init*/ dma_c->cc = dma_c->cb; dma_c->ac = dma_c->ab; } else @@ -1535,7 +1535,7 @@ dma_channel_write(int channel, uint16_t val) if (dma_advanced && (dma_c->sg_status & 1) && !(dma_c->sg_status & 6)) dma_sg_next_addr(dma_c); else { - if ((dma_c->mode & 0x10) || dma_ps2.is_ps2) { /*Auto-init*/ + if (dma_c->mode & 0x10) { /*Auto-init*/ dma_c->cc = dma_c->cb; dma_c->ac = dma_c->ab; } else From 3cca314d0cfd5cefcfe83b0ba764a46acd19b7a8 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 19 Jul 2022 23:38:39 +0200 Subject: [PATCH 089/386] Fixed warning in chipset/ali6117.c. --- src/chipset/ali6117.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/chipset/ali6117.c b/src/chipset/ali6117.c index d33387b9f..224d448a2 100644 --- a/src/chipset/ali6117.c +++ b/src/chipset/ali6117.c @@ -199,7 +199,6 @@ static void ali6117_reg_write(uint16_t addr, uint8_t val, void *priv) { ali6117_t *dev = (ali6117_t *) priv; - int i; ali6117_log("ALI6117: reg_write(%04X, %02X)\n", addr, val); From 3c2caca481c1bf4fee1ccd22fdd2e28908dae58e Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 19 Jul 2022 23:40:08 +0200 Subject: [PATCH 090/386] And machine/m_ps2_isa.c. --- src/machine/m_ps2_isa.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/src/machine/m_ps2_isa.c b/src/machine/m_ps2_isa.c index 6e26b159d..4f98401e7 100644 --- a/src/machine/m_ps2_isa.c +++ b/src/machine/m_ps2_isa.c @@ -98,6 +98,7 @@ ps2_write(uint16_t port, uint8_t val, void *priv) } } + static uint8_t ps2_read(uint16_t port, void *priv) { @@ -138,6 +139,7 @@ ps2_read(uint16_t port, void *priv) return temp; } + static void ps2_isa_setup(int model, int cpu_type) { @@ -181,6 +183,7 @@ ps2_isa_setup(int model, int cpu_type) device_add(&ps1vga_device); } + static void ps2_isa_common_init(const machine_t *model) { @@ -192,27 +195,26 @@ ps2_isa_common_init(const machine_t *model) dma16_init(); pic2_init(); - device_add(&keyboard_ps2_device); - device_add(&port_6x_ps2_device); + device_add(&keyboard_ps2_device); + device_add(&port_6x_ps2_device); } + int machine_ps2_m30_286_init(const machine_t *model) { - void *priv; + int ret; - int ret; + ret = bios_load_linear("roms/machines/ibmps2_m30_286/33f5381a.bin", + 0x000e0000, 131072, 0); - ret = bios_load_linear("roms/machines/ibmps2_m30_286/33f5381a.bin", - 0x000e0000, 131072, 0); - - if (bios_only || !ret) - return ret; + if (bios_only || !ret) + return ret; ps2_isa_common_init(model); ps2_isa_setup(30, 286); - return ret; + return ret; } From fb78071ce98a099d91d2672507e9e5e20855b9a3 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 19 Jul 2022 23:41:09 +0200 Subject: [PATCH 091/386] And machine/m_ps2_mca.c. --- src/machine/m_ps2_mca.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/src/machine/m_ps2_mca.c b/src/machine/m_ps2_mca.c index c0296fb2a..193840f6b 100644 --- a/src/machine/m_ps2_mca.c +++ b/src/machine/m_ps2_mca.c @@ -1018,17 +1018,16 @@ static void ps2_mca_board_model_55sx_init(int has_sec_nvram, int slots) mca_init(slots); device_add(&keyboard_ps2_mca_device); - if (has_sec_nvram == 1) - device_add(&ps2_nvr_55ls_device); - else if (has_sec_nvram == 2) { - device_add(&ps2_nvr_device); - } + if (has_sec_nvram == 1) + device_add(&ps2_nvr_55ls_device); + else if (has_sec_nvram == 2) + device_add(&ps2_nvr_device); - ps2.planar_read = model_55sx_read; - ps2.planar_write = model_55sx_write; + ps2.planar_read = model_55sx_read; + ps2.planar_write = model_55sx_write; - if (gfxcard == VID_INTERNAL) - device_add(&ps1vga_mca_device); + if (gfxcard == VID_INTERNAL) + device_add(&ps1vga_mca_device); model_55sx_mem_recalc(); } From 97e33097b21977c8ce1ec3e139f43b6f1884dab9 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 19 Jul 2022 23:52:18 +0200 Subject: [PATCH 092/386] And in disk/hdd.c --- src/disk/hdd.c | 486 ++++++++++++++++++++++++------------------------- 1 file changed, 242 insertions(+), 244 deletions(-) diff --git a/src/disk/hdd.c b/src/disk/hdd.c index ca434aa61..d2f77a1ab 100644 --- a/src/disk/hdd.c +++ b/src/disk/hdd.c @@ -31,10 +31,13 @@ #include <86box/video.h> #include "cpu.h" + #define HDD_OVERHEAD_TIME 50.0 + hard_disk_t hdd[HDD_NUM]; + int hdd_init(void) { @@ -156,288 +159,278 @@ hdd_is_valid(int c) return(1); } + double hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_t continuous, double max_seek_time) { if (!hdd->speed_preset) return HDD_OVERHEAD_TIME; - hdd_zone_t *zone = NULL; - for (int i = 0; i < hdd->num_zones; i++) { - zone = &hdd->zones[i]; - if (zone->end_sector >= dst_addr) - break; + hdd_zone_t *zone = NULL; + for (int i = 0; i < hdd->num_zones; i++) { + zone = &hdd->zones[i]; + if (zone->end_sector >= dst_addr) + break; + } + + double continuous_times[2][2] = { { hdd->head_switch_usec, hdd->cyl_switch_usec }, + { zone->sector_time_usec, zone->sector_time_usec } }; + double times[2] = { HDD_OVERHEAD_TIME, hdd->avg_rotation_lat_usec }; + + uint32_t new_track = zone->start_track + ((dst_addr - zone->start_sector) / zone->sectors_per_track); + uint32_t new_cylinder = new_track / hdd->phy_heads; + uint32_t cylinder_diff = abs((int)hdd->cur_cylinder - (int)new_cylinder); + + bool sequential = dst_addr == hdd->cur_addr + 1; + continuous = continuous && sequential; + + double seek_time = 0.0; + if (continuous) + seek_time = continuous_times[new_track == hdd->cur_track][!!cylinder_diff]; + else { + if (!cylinder_diff) + seek_time = times[operation != HDD_OP_SEEK]; + else { + seek_time = hdd->cyl_switch_usec + (hdd->full_stroke_usec * (double)cylinder_diff / (double)hdd->phy_cyl) + + ((operation != HDD_OP_SEEK) * hdd->avg_rotation_lat_usec); } + } -#ifndef OLD_CODE - double continuous_times[2][2] = { { hdd->head_switch_usec, hdd->cyl_switch_usec }, - { zone->sector_time_usec, zone->sector_time_usec } }; - double times[2] = { HDD_OVERHEAD_TIME, hdd->avg_rotation_lat_usec }; -#endif + if (!max_seek_time || seek_time <= max_seek_time) { + hdd->cur_addr = dst_addr; + hdd->cur_track = new_track; + hdd->cur_cylinder = new_cylinder; + } - uint32_t new_track = zone->start_track + ((dst_addr - zone->start_sector) / zone->sectors_per_track); - uint32_t new_cylinder = new_track / hdd->phy_heads; - uint32_t cylinder_diff = abs((int)hdd->cur_cylinder - (int)new_cylinder); - - bool sequential = dst_addr == hdd->cur_addr + 1; - continuous = continuous && sequential; - - double seek_time = 0.0; - if (continuous) { -#ifdef OLD_CODE - if (new_track == hdd->cur_track) { - // Same track - seek_time = zone->sector_time_usec; - } else if (!cylinder_diff) { - // Same cylinder, sequential track - seek_time = hdd->head_switch_usec; - } else { - // Sequential cylinder - seek_time = hdd->cyl_switch_usec; - } -#else - seek_time = continuous_times[new_track == hdd->cur_track][!!cylinder_diff]; -#endif - } else { - if (!cylinder_diff) { -#ifdef OLD_CODE - if (operation != HDD_OP_SEEK) { - seek_time = hdd->avg_rotation_lat_usec; - } else { - //seek_time = hdd->cyl_switch_usec; - seek_time = HDD_OVERHEAD_TIME; - } -#else - seek_time = times[operation != HDD_OP_SEEK]; -#endif - } else { -#ifdef OLD_CODE - seek_time = hdd->cyl_switch_usec + (hdd->full_stroke_usec * (double)cylinder_diff / (double)hdd->phy_cyl); - if (operation != HDD_OP_SEEK) { - seek_time += hdd->avg_rotation_lat_usec; - } -#else - seek_time = hdd->cyl_switch_usec + (hdd->full_stroke_usec * (double)cylinder_diff / (double)hdd->phy_cyl) + - ((operation != HDD_OP_SEEK) * hdd->avg_rotation_lat_usec); -#endif - } - } - - if (!max_seek_time || seek_time <= max_seek_time) { - hdd->cur_addr = dst_addr; - hdd->cur_track = new_track; - hdd->cur_cylinder = new_cylinder; - } - - return seek_time; + return seek_time; } + static void hdd_readahead_update(hard_disk_t *hdd) { - hdd_cache_t *cache = &hdd->cache; - if (cache->ra_ongoing) { - hdd_cache_seg_t *segment = &cache->segments[cache->ra_segment]; + uint64_t elapsed_cycles; + double elapsed_us, seek_time; + uint32_t max_read_ahead, i; + uint32_t space_needed; - uint64_t elapsed_cycles = tsc - cache->ra_start_time; - double elapsed_us = (double)elapsed_cycles / cpuclock * 1000000.0; - // Do not overwrite data not yet read by host - uint32_t max_read_ahead = (segment->host_addr + cache->segment_size) - segment->ra_addr; + hdd_cache_t *cache = &hdd->cache; + if (cache->ra_ongoing) { + hdd_cache_seg_t *segment = &cache->segments[cache->ra_segment]; - double seek_time = 0.0; + elapsed_cycles = tsc - cache->ra_start_time; + elapsed_us = (double)elapsed_cycles / cpuclock * 1000000.0; + /* Do not overwrite data not yet read by host */ + max_read_ahead = (segment->host_addr + cache->segment_size) - segment->ra_addr; - for (uint32_t i = 0; i < max_read_ahead; i++) { - seek_time += hdd_seek_get_time(hdd, segment->ra_addr, HDD_OP_READ, 1, elapsed_us - seek_time); - if (seek_time > elapsed_us) - break; + seek_time = 0.0; - segment->ra_addr++; - } + for (i = 0; i < max_read_ahead; i++) { + seek_time += hdd_seek_get_time(hdd, segment->ra_addr, HDD_OP_READ, 1, elapsed_us - seek_time); + if (seek_time > elapsed_us) + break; - if (segment->ra_addr > segment->lba_addr + cache->segment_size) { - uint32_t space_needed = segment->ra_addr - (segment->lba_addr + cache->segment_size); - segment->lba_addr += space_needed; - } + segment->ra_addr++; } + + if (segment->ra_addr > segment->lba_addr + cache->segment_size) { + space_needed = segment->ra_addr - (segment->lba_addr + cache->segment_size); + segment->lba_addr += space_needed; + } + } } + static double hdd_writecache_flush(hard_disk_t *hdd) { - double seek_time = 0.0; - while (hdd->cache.write_pending) { - seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, 0); - hdd->cache.write_addr++; - hdd->cache.write_pending--; - } + double seek_time = 0.0; - return seek_time; + while (hdd->cache.write_pending) { + seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, 0); + hdd->cache.write_addr++; + hdd->cache.write_pending--; + } + + return seek_time; } + static void hdd_writecache_update(hard_disk_t *hdd) { - if (hdd->cache.write_pending) { - uint64_t elapsed_cycles = tsc - hdd->cache.write_start_time; - double elapsed_us = (double)elapsed_cycles / cpuclock * 1000000.0; - double seek_time = 0.0; + uint64_t elapsed_cycles; + double elapsed_us, seek_time; - while (hdd->cache.write_pending) { - seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, elapsed_us - seek_time); - if (seek_time > elapsed_us) - break; + if (hdd->cache.write_pending) { + elapsed_cycles = tsc - hdd->cache.write_start_time; + elapsed_us = (double)elapsed_cycles / cpuclock * 1000000.0; + seek_time = 0.0; - hdd->cache.write_addr++; - hdd->cache.write_pending--; - } + while (hdd->cache.write_pending) { + seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, elapsed_us - seek_time); + if (seek_time > elapsed_us) + break; + + hdd->cache.write_addr++; + hdd->cache.write_pending--; } + } } + double hdd_timing_write(hard_disk_t *hdd, uint32_t addr, uint32_t len) { + double seek_time = 0.0; + uint32_t flush_needed; + if (!hdd->speed_preset) return HDD_OVERHEAD_TIME; - hdd_readahead_update(hdd); - hdd_writecache_update(hdd); + hdd_readahead_update(hdd); + hdd_writecache_update(hdd); - hdd->cache.ra_ongoing = 0; + hdd->cache.ra_ongoing = 0; - double seek_time = 0.0; + if (hdd->cache.write_pending && (addr != (hdd->cache.write_addr + hdd->cache.write_pending))) { + /* New request is not sequential to existing cache, need to flush it */ + seek_time += hdd_writecache_flush(hdd); + } - if (hdd->cache.write_pending && (addr != (hdd->cache.write_addr + hdd->cache.write_pending))) { - // New request is not sequential to existing cache, need to flush it - seek_time += hdd_writecache_flush(hdd); + if (!hdd->cache.write_pending) { + /* Cache is empty */ + hdd->cache.write_addr = addr; + } + + hdd->cache.write_pending += len; + if (hdd->cache.write_pending > hdd->cache.write_size) { + /* If request is bigger than free cache, flush some data first */ + flush_needed = hdd->cache.write_pending - hdd->cache.write_size; + for (uint32_t i = 0; i < flush_needed; i++) { + seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, 0); + hdd->cache.write_addr++; } + } - if (!hdd->cache.write_pending) { - // Cache is empty - hdd->cache.write_addr = addr; - } + hdd->cache.write_start_time = tsc + (uint32_t)(seek_time * cpuclock / 1000000.0); - hdd->cache.write_pending += len; - if (hdd->cache.write_pending > hdd->cache.write_size) { - // If request is bigger than free cache, flush some data first - uint32_t flush_needed = hdd->cache.write_pending - hdd->cache.write_size; - for (uint32_t i = 0; i < flush_needed; i++) { - seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, 0); - hdd->cache.write_addr++; - } - } - - hdd->cache.write_start_time = tsc + (uint32_t)(seek_time * cpuclock / 1000000.0); - - return seek_time; + return seek_time; } + double hdd_timing_read(hard_disk_t *hdd, uint32_t addr, uint32_t len) { + double seek_time = 0.0; + if (!hdd->speed_preset) return HDD_OVERHEAD_TIME; - hdd_readahead_update(hdd); - hdd_writecache_update(hdd); + hdd_readahead_update(hdd); + hdd_writecache_update(hdd); - double seek_time = 0.0; - seek_time += hdd_writecache_flush(hdd); + seek_time += hdd_writecache_flush(hdd); - hdd_cache_t *cache = &hdd->cache; - hdd_cache_seg_t *active_seg = &cache->segments[0]; + hdd_cache_t *cache = &hdd->cache; + hdd_cache_seg_t *active_seg = &cache->segments[0]; - for (uint32_t i = 0; i < cache->num_segments; i++) { - hdd_cache_seg_t *segment = &cache->segments[i]; - if (!segment->valid) { - active_seg = segment; - continue; - } - - if (segment->lba_addr <= addr && (segment->lba_addr + cache->segment_size) >= addr) { - // Cache HIT - segment->host_addr = addr; - active_seg = segment; - if (addr + len > segment->ra_addr) { - uint32_t need_read = (addr + len) - segment->ra_addr; - for (uint32_t j = 0; j < need_read; j++) { - seek_time += hdd_seek_get_time(hdd, segment->ra_addr, HDD_OP_READ, 1, 0.0); - segment->ra_addr++; - } - } - if (addr + len > segment->lba_addr + cache->segment_size) { - // Need to erase some previously cached data - uint32_t space_needed = (addr + len) - (segment->lba_addr + cache->segment_size); - segment->lba_addr += space_needed; - } - goto update_lru; - } else { - if (segment->lru > active_seg->lru) { - active_seg = segment; - } - } + for (uint32_t i = 0; i < cache->num_segments; i++) { + hdd_cache_seg_t *segment = &cache->segments[i]; + if (!segment->valid) { + active_seg = segment; + continue; } - // Cache MISS - active_seg->lba_addr = addr; - active_seg->valid = 1; - active_seg->host_addr = addr; - active_seg->ra_addr = addr; - - for (uint32_t i = 0; i < len; i++) { - seek_time += hdd_seek_get_time(hdd, active_seg->ra_addr, HDD_OP_READ, i != 0, 0.0); - active_seg->ra_addr++; + if (segment->lba_addr <= addr && (segment->lba_addr + cache->segment_size) >= addr) { + /* Cache HIT */ + segment->host_addr = addr; + active_seg = segment; + if (addr + len > segment->ra_addr) { + uint32_t need_read = (addr + len) - segment->ra_addr; + for (uint32_t j = 0; j < need_read; j++) { + seek_time += hdd_seek_get_time(hdd, segment->ra_addr, HDD_OP_READ, 1, 0.0); + segment->ra_addr++; + } + } + if (addr + len > segment->lba_addr + cache->segment_size) { + /* Need to erase some previously cached data */ + uint32_t space_needed = (addr + len) - (segment->lba_addr + cache->segment_size); + segment->lba_addr += space_needed; + } + goto update_lru; + } else { + if (segment->lru > active_seg->lru) + active_seg = segment; } + } + + /* Cache MISS */ + active_seg->lba_addr = addr; + active_seg->valid = 1; + active_seg->host_addr = addr; + active_seg->ra_addr = addr; + + for (uint32_t i = 0; i < len; i++) { + seek_time += hdd_seek_get_time(hdd, active_seg->ra_addr, HDD_OP_READ, i != 0, 0.0); + active_seg->ra_addr++; + } update_lru: - for (uint32_t i = 0; i < cache->num_segments; i++) { - cache->segments[i].lru++; - } + for (uint32_t i = 0; i < cache->num_segments; i++) + cache->segments[i].lru++; - active_seg->lru = 0; + active_seg->lru = 0; - cache->ra_ongoing = 1; - cache->ra_segment = active_seg->id; - cache->ra_start_time = tsc + (uint32_t)(seek_time * cpuclock / 1000000.0); + cache->ra_ongoing = 1; + cache->ra_segment = active_seg->id; + cache->ra_start_time = tsc + (uint32_t)(seek_time * cpuclock / 1000000.0); - return seek_time; + return seek_time; } + static void hdd_cache_init(hard_disk_t *hdd) { - hdd_cache_t *cache = &hdd->cache; - cache->ra_segment = 0; - cache->ra_ongoing = 0; - cache->ra_start_time = 0; + hdd_cache_t *cache = &hdd->cache; + uint32_t i; - for (uint32_t i = 0; i < cache->num_segments; i++) { - cache->segments[i].valid = 0; - cache->segments[i].lru = 0; - cache->segments[i].id = i; - cache->segments[i].ra_addr = 0; - cache->segments[i].host_addr = 0; - } + cache->ra_segment = 0; + cache->ra_ongoing = 0; + cache->ra_start_time = 0; + + for (i = 0; i < cache->num_segments; i++) { + cache->segments[i].valid = 0; + cache->segments[i].lru = 0; + cache->segments[i].id = i; + cache->segments[i].ra_addr = 0; + cache->segments[i].host_addr = 0; + } } + static void hdd_zones_init(hard_disk_t *hdd) { - uint32_t lba = 0; - uint32_t track = 0; + uint32_t lba = 0, track = 0; + uint32_t i, tracks; + double revolution_usec = 60.0 / (double)hdd->rpm * 1000000.0; + hdd_zone_t *zone; - double revolution_usec = 60.0 / (double)hdd->rpm * 1000000.0; - for (uint32_t i = 0; i < hdd->num_zones; i++) { - hdd_zone_t *zone = &hdd->zones[i]; - zone->start_sector = lba; - zone->start_track = track; - zone->sector_time_usec = revolution_usec / (double)zone->sectors_per_track; - uint32_t tracks = zone->cylinders * hdd->phy_heads; - lba += tracks * zone->sectors_per_track; - zone->end_sector = lba - 1; - track += tracks - 1; - } + for (i = 0; i < hdd->num_zones; i++) { + zone = &hdd->zones[i]; + zone->start_sector = lba; + zone->start_track = track; + zone->sector_time_usec = revolution_usec / (double)zone->sectors_per_track; + tracks = zone->cylinders * hdd->phy_heads; + lba += tracks * zone->sectors_per_track; + zone->end_sector = lba - 1; + track += tracks - 1; + } } + static hdd_preset_t hdd_speed_presets[] = { { .name = "RAM Disk (max. speed)", .internal_name = "ramdisk", .rcache_num_seg = 16, .rcache_seg_size = 128, .max_multiple = 32 }, @@ -463,30 +456,33 @@ static hdd_preset_t hdd_speed_presets[] = { .full_stroke_ms = 15, .track_seek_ms = 2, .rcache_num_seg = 16, .rcache_seg_size = 128, .max_multiple = 32 }, }; + int hdd_preset_get_num() { return sizeof(hdd_speed_presets) / sizeof(hdd_preset_t); } + char * hdd_preset_getname(int preset) { return (char *)hdd_speed_presets[preset].name; } + char * hdd_preset_get_internal_name(int preset) { return (char *)hdd_speed_presets[preset].internal_name; } + int hdd_preset_get_from_internal_name(char *s) { int c = 0; - for (int i = 0; i < (sizeof(hdd_speed_presets) / sizeof(hdd_preset_t)); i++) { if (!strcmp((char *)hdd_speed_presets[c].internal_name, s)) return c; @@ -496,62 +492,64 @@ hdd_preset_get_from_internal_name(char *s) return 0; } + void hdd_preset_apply(int hdd_id) { - hard_disk_t *hd = &hdd[hdd_id]; + hard_disk_t *hd = &hdd[hdd_id]; + double revolution_usec, zone_percent; + uint32_t disk_sectors, sectors_per_surface, cylinders, cylinders_per_zone; + uint32_t total_sectors = 0, i; + uint32_t spt, zone_sectors; - if (hd->speed_preset >= hdd_preset_get_num()) - hd->speed_preset = 0; + if (hd->speed_preset >= hdd_preset_get_num()) + hd->speed_preset = 0; - hdd_preset_t *preset = &hdd_speed_presets[hd->speed_preset]; + hdd_preset_t *preset = &hdd_speed_presets[hd->speed_preset]; - hd->cache.num_segments = preset->rcache_num_seg; - hd->cache.segment_size = preset->rcache_seg_size; - hd->max_multiple_block = preset->max_multiple; + hd->cache.num_segments = preset->rcache_num_seg; + hd->cache.segment_size = preset->rcache_seg_size; + hd->max_multiple_block = preset->max_multiple; - if (!hd->speed_preset) - return; + if (!hd->speed_preset) + return; - hd->phy_heads = preset->heads; - hd->rpm = preset->rpm; + hd->phy_heads = preset->heads; + hd->rpm = preset->rpm; - double revolution_usec = 60.0 / (double)hd->rpm * 1000000.0; - hd->avg_rotation_lat_usec = revolution_usec / 2; - hd->full_stroke_usec = preset->full_stroke_ms * 1000; - hd->head_switch_usec = preset->track_seek_ms * 1000; - hd->cyl_switch_usec = preset->track_seek_ms * 1000; + revolution_usec = 60.0 / (double)hd->rpm * 1000000.0; + hd->avg_rotation_lat_usec = revolution_usec / 2; + hd->full_stroke_usec = preset->full_stroke_ms * 1000; + hd->head_switch_usec = preset->track_seek_ms * 1000; + hd->cyl_switch_usec = preset->track_seek_ms * 1000; - hd->cache.write_size = 64; + hd->cache.write_size = 64; - hd->num_zones = preset->zones; + hd->num_zones = preset->zones; - uint32_t disk_sectors = hd->tracks * hd->hpc * hd->spt; - uint32_t sectors_per_surface = (uint32_t)ceil((double)disk_sectors / (double)hd->phy_heads); - uint32_t cylinders = (uint32_t)ceil((double)sectors_per_surface / (double)preset->avg_spt); - hd->phy_cyl = cylinders; - uint32_t cylinders_per_zone = cylinders / preset->zones; + disk_sectors = hd->tracks * hd->hpc * hd->spt; + sectors_per_surface = (uint32_t)ceil((double)disk_sectors / (double)hd->phy_heads); + cylinders = (uint32_t)ceil((double)sectors_per_surface / (double)preset->avg_spt); + hd->phy_cyl = cylinders; + cylinders_per_zone = cylinders / preset->zones; - uint32_t total_sectors = 0; - for (uint32_t i = 0; i < preset->zones; i++) { - uint32_t spt; - double zone_percent = i * 100 / (double)preset->zones; + for (i = 0; i < preset->zones; i++) { + zone_percent = i * 100 / (double)preset->zones; - if (i < preset->zones - 1) { - // Function for realistic zone sector density - double spt_percent = -0.00341684 * pow(zone_percent, 2) - 0.175811 * zone_percent + 118.48; - spt = (uint32_t)ceil((double)preset->avg_spt * spt_percent / 100); - } else { - spt = (uint32_t)ceil((double)(disk_sectors - total_sectors) / (double)(cylinders_per_zone*preset->heads)); - } + if (i < preset->zones - 1) { + /* Function for realistic zone sector density */ + double spt_percent = -0.00341684 * pow(zone_percent, 2) - 0.175811 * zone_percent + 118.48; + spt = (uint32_t)ceil((double)preset->avg_spt * spt_percent / 100); + } else + spt = (uint32_t)ceil((double)(disk_sectors - total_sectors) / (double)(cylinders_per_zone*preset->heads)); - uint32_t zone_sectors = spt * cylinders_per_zone * preset->heads; - total_sectors += zone_sectors; + zone_sectors = spt * cylinders_per_zone * preset->heads; + total_sectors += zone_sectors; - hd->zones[i].cylinders = cylinders_per_zone; - hd->zones[i].sectors_per_track = spt; - } + hd->zones[i].cylinders = cylinders_per_zone; + hd->zones[i].sectors_per_track = spt; + } - hdd_zones_init(hd); - hdd_cache_init(hd); -} \ No newline at end of file + hdd_zones_init(hd); + hdd_cache_init(hd); +} From 184dc4c5f261fbea2b468324cf25ae7a081037cf Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 19 Jul 2022 23:52:55 +0200 Subject: [PATCH 093/386] And in video/vid_svga.c. --- src/video/vid_svga.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index d7a122cb4..ea70248dc 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -658,7 +658,6 @@ svga_poll(void *p) uint32_t x, blink_delay; int wx, wy; int ret, old_ma; - int old_vc; if (!vga_on && ibm8514_enabled && ibm8514_on) { ibm8514_poll(&svga->dev8514, svga); @@ -787,7 +786,6 @@ svga_poll(void *p) return; svga->vc++; - old_vc = svga->vc; svga->vc &= 2047; if (svga->vc == svga->split) { From 307bddda1ea0cbc3ceca0c8ff7a936aa2dc0ecf8 Mon Sep 17 00:00:00 2001 From: AsciiWolf Date: Wed, 20 Jul 2022 00:08:16 +0200 Subject: [PATCH 094/386] Add screenshot to AppStream metainfo file --- src/unix/assets/net.86box.86Box.metainfo.xml | 5 +++++ src/unix/assets/screenshots/86Box.png | Bin 0 -> 14335 bytes 2 files changed, 5 insertions(+) create mode 100644 src/unix/assets/screenshots/86Box.png diff --git a/src/unix/assets/net.86box.86Box.metainfo.xml b/src/unix/assets/net.86box.86Box.metainfo.xml index 71121b708..982ae9b4d 100644 --- a/src/unix/assets/net.86box.86Box.metainfo.xml +++ b/src/unix/assets/net.86box.86Box.metainfo.xml @@ -28,5 +28,10 @@ want to emulate.

+ + + https://raw.githubusercontent.com/86Box/86Box/master/src/unix/assets/screenshots/86Box.png + + https://86box.net diff --git a/src/unix/assets/screenshots/86Box.png b/src/unix/assets/screenshots/86Box.png new file mode 100644 index 0000000000000000000000000000000000000000..5f72485f3f515f9a60e2d377a454e55956717f29 GIT binary patch literal 14335 zcmeAS@N?(olHy`uVBq!ia0y~yU}|DuVB+IoV_;y=Y0BBgz`(##?Bp53!NI{%!;#X# zz`!6`;u=vBoS#-wo>-L1ke-*Ho2px!T$GxcSDcYw@}7CW9Rq^`gQtsQNX4ADcgrh6 zQtuu6SUqXN1g6Fd&cPFux*}F+xw>>UBplwgV9h?RQ@d7+h)z{Fq!kesyHUS8wj@`Z zYlXJ#5>`e*)|a|k9!^3+1~b3+ryM((a%$$uDJ{=`?_9TY(wt9oo=@?4_ve|Vv6*M7 z%F!J*Ig_%c`mNX0j0=i+S@OO8&OWPs({F!gU|`^wclT}e?%O51+mFAW)aQL_;+NG+ z-duWlw9kFcskQ?up3CD(kBUyWwMqSS)pxep>iD%$TP0@es?D)xV_;|y*nGRY^wE*d zN4C{v|NmTQo_w$Re>1<`v@On;438U`dGdw|F=eZ%tIyw@_jXmiN#>eLxi*6gkRmNK{YU1hy>*_()EUaMM;nt8sQ zG-=Z0$=2_Gyj)&?GR^C)4$y=86NjOqa3jR8+6`ub=aP;?S6C9F20jtU|=}({(3zB`&T!XzV5K_ zG<|(_{rwYhU#hqKW?^7x;8+p9KX2EPS%s5Ut-c|5y!Rjj14G(|se9Z@zDjr&mhGNv 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zirl$af`NfysyxIz%jN~uOV8g1MWGl214Af3L>QbFjc>^^GB7x}^ezL(2F||ns06rj zBx+n?G^|F$ity;uXet>^C8Mb%VKf`iG8?S0xGw+f%uHoZDYKjz=cme?-dPlXyjC*) z^WNO^m&*hs!Y}HvmS!X@{ z6Y)3pb9vq0*z|w5zF+fO@S63O{rAeL4}Thpod4grCG+X~`N=yI=5_DQy`E(qw%$|w z@8(b6FHFz)^SAhJ-h%W0-<@Xp{rhe1?R(GIfBkvY1!>>Ral8<2RX+E5u4Vk`9m|5X z|Eos-^;Zmu`TayQc6Ysej_R@dpVr;(U*honzHoi0!1eiS=lsr)V=oU|7a#vy{6v}T z?T#<+8@?R>`MpH;mo;11swrXG()-Ri?^ws}zn^(w-tE8D`JZiNo$GU37MyWj6uH@$rS^ZsR{ zf9v`K=KW8Aw9lp(bF^({daNC}``q^}ekv}Tgr4VGH}=iuSlab&fA#&l=eJM&zaqwU zvDS<1+5gtvcldsOenu?!y??iPzS!S(SZxMTzR7KU&w658TEUoC_7%Zu*(=UiH+_34igm+0EQu%pl2kH0U`nD<|+>ff54$zM!$XFPtK z`TuY3{rIh?_VT}bzEvxQ;rq*l75~1M^E6rhpZ7~b1Kg`~hhU|7X?QHGQ7@GvW67oiOq-*?vAbVJ|#+^J<}Usd&vf7{!FH~aVhTxenUuKdie+xw=5>(zYSXtZfp{=+|i zIlkBALz~Yp6eK*fzJ0xCGqrL5?xsJw@^8L5-Ar?3`Fwxt@{N4+-U;!gSx?;e`pnn; ziT;ms*Tn6=_f7vom-CYKtqJSOr zIrXa#ZT$c5S^KLW5wiMkvuCa*>UE~9 z-#y93w|xKRW2a)B_g(9s;_$9z)rq3UJo`I;?wY1Q{j+=iV~69*cht+TO@8=t7w^&7 z{5~_Awb@U9v`wD6TkWrGbJv{u?{6!A|K-1KDtKzQ+up73SI27qewQuz-R$s3YmpP* zY*)VcD)`1KEW+~t!#nl$&+oswf2>PJe)aEnp01xAx9t3O{Bq%jPk-KL&+L-h@A0R0 z0i**kdr9D=v|mvxjFy)BABuJD{PxeidX4Lr@Av0V{`=?m;eYM*{};!uT-UMcmse}( zviSf1LcV@Je}8}1#)3bvp$p$jEB@?>nGfz|%!!#aDHt3BGrEvx<4&<2d}%DV{z7>D zp}YIcJx^+SdHJmjkOpm;nQUaMs84tlP8B$6}pVcz~be7jl? z#O(BFK00v2J~Td$g(kz`Q? z&B>ixwIKOUf`Owj1H*z7JLuZX4WuTXr+YOgCo7g`H~_Ye~Gh z;mp9$u8;cjwQh$INf{^n>(;?KEt9r+>QYSCx*v|LU;yg>}3s zJqZ@K%b)7x#S5 Date: Tue, 19 Jul 2022 18:51:18 -0400 Subject: [PATCH 095/386] Named initializers in machine table --- src/cpu/cpu.c | 32 +- src/include/86box/keyboard.h | 88 + src/include/86box/machine.h | 64 +- src/machine/m_amstrad.c | 62 +- src/machine/m_at_286_386sx.c | 16 - src/machine/m_at_386dx_486.c | 39 - src/machine/m_at_compaq.c | 8 +- src/machine/m_at_slot1.c | 8 - src/machine/m_at_socket370.c | 8 - src/machine/m_at_socket4.c | 8 - src/machine/m_at_socket7.c | 7 - src/machine/m_at_socket7_3v.c | 24 - src/machine/m_pcjr.c | 9 +- src/machine/m_ps2_isa.c | 1 - src/machine/m_ps2_mca.c | 2 - src/machine/m_tandy.c | 28 +- src/machine/m_xt_olivetti.c | 15 - src/machine/m_xt_t1000.c | 8 - src/machine/m_xt_xi8088.c | 7 - src/machine/m_xt_zenith.c | 6 - src/machine/machine_table.c | 10553 +++++++++++++++++++++++++++++++- src/mem/spd.c | 8 +- 22 files changed, 10383 insertions(+), 618 deletions(-) diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index a880ef1a5..2840e2cdf 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -236,7 +236,7 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine) return 1; /* Add implicit CPU package compatibility. */ - packages = machine_s->cpu_package; + packages = machine_s->cpu.package; if (packages & CPU_PKG_SOCKET3) packages |= CPU_PKG_SOCKET1; else if (packages & CPU_PKG_SLOT1) @@ -251,11 +251,11 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine) return 1; /* Check CPU blocklist. */ - if (machine_s->cpu_block) { + if (machine_s->cpu.block) { i = 0; - while (machine_s->cpu_block[i]) { - if (machine_s->cpu_block[i++] == cpu_s->cpu_type) + while (machine_s->cpu.block[i]) { + if (machine_s->cpu.block[i++] == cpu_s->cpu_type) return 0; } } @@ -263,19 +263,19 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine) bus_speed = cpu_s->rspeed / cpu_s->multi; /* Minimum bus speed with ~0.84 MHz (for 8086) tolerance. */ - if (machine_s->cpu_min_bus && (bus_speed < (machine_s->cpu_min_bus - 840907))) + if (machine_s->cpu.min_bus && (bus_speed < (machine_s->cpu.min_bus - 840907))) return 0; /* Maximum bus speed with ~0.84 MHz (for 8086) tolerance. */ - if (machine_s->cpu_max_bus && (bus_speed > (machine_s->cpu_max_bus + 840907))) + if (machine_s->cpu.max_bus && (bus_speed > (machine_s->cpu.max_bus + 840907))) return 0; /* Minimum voltage with 0.1V tolerance. */ - if (machine_s->cpu_min_voltage && (cpu_s->voltage < (machine_s->cpu_min_voltage - 100))) + if (machine_s->cpu.min_voltage && (cpu_s->voltage < (machine_s->cpu.min_voltage - 100))) return 0; /* Maximum voltage with 0.1V tolerance. */ - if (machine_s->cpu_max_voltage && (cpu_s->voltage > (machine_s->cpu_max_voltage + 100))) + if (machine_s->cpu.max_voltage && (cpu_s->voltage > (machine_s->cpu.max_voltage + 100))) return 0; /* Account for CPUs which use a different internal multiplier than specified by jumpers. */ @@ -285,7 +285,7 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine) if (cpu_s->cpu_flags & CPU_FIXED_MULTIPLIER) return 1; else if (cpu_family->package & CPU_PKG_SOCKET5_7) { - if ((multi == 1.5) && (cpu_s->cpu_type == CPU_5K86) && (machine_s->cpu_min_multi > 1.5)) /* K5 5k86 */ + if ((multi == 1.5) && (cpu_s->cpu_type == CPU_5K86) && (machine_s->cpu.min_multi > 1.5)) /* K5 5k86 */ multi = 2.0; else if (multi == 1.75) /* K5 5k86 */ multi = 2.5; @@ -296,7 +296,7 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine) else if ((cpu_s->cpu_type == CPU_K6_2P) || (cpu_s->cpu_type == CPU_K6_3P)) multi = 2.5; else if (((cpu_s->cpu_type == CPU_WINCHIP) || (cpu_s->cpu_type == CPU_WINCHIP2)) && - (machine_s->cpu_min_multi > 2.0)) /* WinChip (2) */ + (machine_s->cpu.min_multi > 2.0)) /* WinChip (2) */ multi = 2.5; } else if (multi == (7.0 / 3.0)) /* WinChip 2A - 2.33x */ @@ -312,27 +312,27 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine) else if (multi == 4.0) { /* WinChip (2) */ if ((cpu_s->cpu_type == CPU_WINCHIP) || (cpu_s->cpu_type == CPU_WINCHIP2)) { - if (machine_s->cpu_min_multi >= 1.5) + if (machine_s->cpu.min_multi >= 1.5) multi = 1.5; - else if (machine_s->cpu_min_multi >= 3.5) + else if (machine_s->cpu.min_multi >= 3.5) multi = 3.5; - else if (machine_s->cpu_min_multi >= 4.5) + else if (machine_s->cpu.min_multi >= 4.5) multi = 4.5; } else if ((cpu_s->cpu_type == CPU_Cx6x86) || (cpu_s->cpu_type == CPU_Cx6x86L)) /* 6x86(L) */ multi = 3.0; } else if ((multi == 5.0) && ((cpu_s->cpu_type == CPU_WINCHIP) || (cpu_s->cpu_type == CPU_WINCHIP2)) && - (machine_s->cpu_min_multi > 5.0)) /* WinChip (2) */ + (machine_s->cpu.min_multi > 5.0)) /* WinChip (2) */ multi = 5.5; else if (multi == 6.0) /* K6-2(+) / K6-3(+) */ multi = 2.0; } /* Minimum multiplier, */ - if (multi < machine_s->cpu_min_multi) + if (multi < machine_s->cpu.min_multi) return 0; /* Maximum multiplier. */ - if (machine_s->cpu_max_multi && (multi > machine_s->cpu_max_multi)) + if (machine_s->cpu.max_multi && (multi > machine_s->cpu.max_multi)) return 0; return 1; diff --git a/src/include/86box/keyboard.h b/src/include/86box/keyboard.h index ff588c3b4..c07fe6a8b 100644 --- a/src/include/86box/keyboard.h +++ b/src/include/86box/keyboard.h @@ -41,6 +41,94 @@ typedef struct { #define RSHIFT_OFF 0x105 +/* KBC #define's */ +#define KBC_UNKNOWN 0x0000 /* As yet unknown keyboard */ + +/* IBM-style controllers */ +#define KBC_IBM_PC_XT 0x0000 /* IBM PC/XT */ +#define KBC_IBM_PCJR 0x0001 /* IBM PCjr */ +#define KBC_IBM_TYPE_1 0x0002 /* IBM AT / PS/2 Type 1 */ +#define KBC_IBM_TYPE_2 0x0003 /* IBM PS/2 Type 2 */ +#define KBC_AMI_ACCESS_METHODS 0x0004 /* Access Methods AMI */ +#define KBC_JU_JET 0x0005 /* Ju-Jet */ +/* OEM proprietary */ +#define KBC_TANDY 0x0011 /* Tandy 1000/1000HX */ +#define KBC_TANDY_SL2 0x0012 /* Tandy 1000SL2 */ +#define KBC_AMSTRAD 0x0013 /* Amstrad */ +#define KBC_OLIVETTI_XT 0x0014 /* Olivetti XT */ +#define KBC_OLIVETTI 0x0015 /* Olivetti AT */ +#define KBC_TOSHIBA 0x0016 /* Toshiba AT */ +#define KBC_COMPAQ 0x0017 /* Compaq */ +#define KBC_NCR 0x0018 /* NCR */ +#define KBC_QUADTEL 0x0019 /* Quadtel */ +#define KBC_SIEMENS 0x001A /* Siemens */ +/* Phoenix MultiKey/42 */ +#define PHOENIX_MK42_105 0x0521 /* Phoenix MultiKey/42 1.05 */ +#define PHOENIX_MK42_129 0x2921 /* Phoenix MultiKey/42 1.29 */ +#define PHOENIX_MK42_138 0x3821 /* Phoenix MultiKey/42 1.38 */ +#define PHOENIX_MK42_140 0x3821 /* Phoenix MultiKey/42 1.40 */ +#define PHOENIX_MKC42_214 0x1422 /* Phoenix MultiKey/C42 2.14 */ +#define PHOENIX_MK42I_416 0x1624 /* Phoenix MultiKey/42i 4.16 */ +#define PHOENIX_MK42I_419 0x1924 /* Phoenix MultiKey/42i 4.19 */ +/* AMI 0x3x */ +#define KBC_ACER_V30 0x0030 /* Acer (0xA1 returns nothing, 0xAF returns 0x00) */ +#define KBC_AMI_MEGAKEY_SUPER_IO 0x0035 /* AMI '5' MegaKey 1994 NSC (and SM(S)C?) */ +#define KBC_AMI_8 0x0038 /* AMI '8' */ +/* AMI 0x4x */ +#define KBC_AMI_B 0x0042 /* AMI 'B' */ +#define KBC_AMI_D 0x0044 /* AMI 'D' */ +#define KBC_AMI_E 0x0045 /* AMI 'E' */ +#define KBC_AMIKEY 0x0046 /* AMI 'F'/AMIKEY */ +#define KBC_AMIKEY_2 0x0048 /* AMI 'H'/AMIEY-2 */ +#define KBC_MR 0x004D /* MR 'M' - Temporary classification until we get a dump */ +/* AMI 0x5x */ +#define KBC_AMI_MEGAKEY_1993 0x0050 /* AMI 'P' MegaKey 1993 */ +#define KBC_AMI_MEGAKEY_1994 0x0052 /* AMI 'R' MegaKey 1994 - 0xA0 returns 1993 copyright */ +#define KBC_AMI_TRIGEM 0x005A /* TriGem AMI 'Z' (1990 AMI copyright) */ +/* AMI 0x6x */ +#define KBC_TANDON 0x0061 /* Tandon 'a' - Temporary classification until we get a dump */ +/* Holtek */ +#define KBC_HT_REGIONAL_6542 0x1046 /* Holtek 'F' (Regional 6542) */ +#define KBC_HT_HT6542B_BESTKEY 0x1048 /* Holtek 'H' (Holtek HT6542B, BestKey) */ +/* AMI 0x0x clone without command 0xA0 */ +#define KBC_UNK_00 0x2000 /* Unknown 0x00 */ +#define KBC_UNK_01 0x2001 /* Unknown 0x01 */ +/* AMI 0x3x clone without command 0xA0 */ +#define KBC_UNK_7 0x2037 /* Unknown '7' - Temporary classification until we get a dump */ +#define KBC_UNK_9 0x2037 /* Unknown '9' - Temporary classification until we get a dump */ +#define KBC_JETKEY_NO_VER 0x2038 /* No-version JetKey '8' */ +/* AMI 0x4x clone without command 0xA0 */ +#define KBC_UNK_A 0x2041 /* Unknown 'A' - Temporary classification until we get a dump */ +#define KBC_JETKEY_5_W83C42 0x2046 /* JetKey 5.0 'F' and Winbond W83C42 */ +#define KBC_UNK_G 0x2047 /* Unknown 'G' - Temporary classification until we get a dump */ +#define KBC_MB_300E_SIS 0x2048 /* MB-300E Non-VIA 'H' and SiS 5582/559x */ +#define KBC_UNK_L 0x204C /* Unknown 'L' - Temporary classification until we get a dump */ +/* AMI 0x0x clone with command 0xA0 (Get Copyright String) only returning 0x00 */ +#define KBC_VPC_2007 0x3000 /* Microsoft Virtual PC 2007 - everything returns 0x00 */ +/* AMI 0x4x clone with command 0xA0 (Get Copyright String) only returning 0x00 */ +#define KBC_ALI_M148X 0x3045 /* ALi M148x 'E'/'U' (0xA1 actually returns 'F' but BIOS shows 'E' or 'U') */ +#define KBC_LANCE_UTRON 0x3046 /* Lance LT38C41 'F', Utron */ +/* AMI 0x5x clone with command 0xA0 (Get Copyright String) only returning 0x00 */ +#define KBC_SARC_6042 0x3055 /* SARC 6042 'U' */ +/* Award and clones */ +#define KBC_AWARD 0x4200 /* Award (0xA1 returns 0x00) - Temporary classification until we get + the real 0xAF return */ +#define KBC_VIA_VT82C4XN 0x4246 /* VIA VT82C41N, VT82C4N (0xA1 returns 'F') */ +#define KBC_VIA_VT82C586A 0x4346 /* VIA VT82C586A (0xA1 returns 'F') */ +#define KBC_VIA_VT82C586B 0x4446 /* VIA VT82C586B (0xA1 returns 'F') */ +#define KBC_VIA_VT82C686B 0x4546 /* VIA VT82C686B (0xA1 returns 'F') */ +/* UMC */ +#define KBC_UMC_UM8886 0x5048 /* UMC UM8886 'H' */ +/* IBM-style controllers with inverted P1 video type bit polarity */ +#define KBC_IBM_TYPE_1_XI8088 0x8000 /* Xi8088: IBM Type 1 */ +/* AMI (this is the 0xA1 revision byte) with inverted P1 video type bit polarity */ +#define KBC_ACER_V30_INV 0x8030 /* Acer (0xA1 returns nothing, 0xAF returns 0x00) */ +/* Holtek with inverted P1 video type bit polarity */ +#define KBC_HT_HT6542B_XI8088 0x9048 /* Xi8088: Holtek 'H' (Holtek HT6542B, BestKey) */ +/* Award and clones with inverted P1 video type bit polarity */ +#define KBC_VIA_VT82C4XN_XI8088 0xC246 /* Xi8088: VIA VT82C41N, VT82C4N (0xA1 returns 'F') */ + + #ifdef __cplusplus extern "C" { #endif diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index 449942915..1e93cbb1f 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -126,11 +126,9 @@ #define IS_AT(m) (((machines[m].bus_flags & (MACHINE_BUS_ISA16 | MACHINE_BUS_EISA | MACHINE_BUS_VLB | MACHINE_BUS_MCA | MACHINE_BUS_PCI | MACHINE_BUS_PCMCIA | MACHINE_BUS_AGP | MACHINE_BUS_AC97)) && !(machines[m].bus_flags & MACHINE_PC98)) ? 1 : 0) #define CPU_BLOCK(...) (const uint8_t[]) {__VA_ARGS__, 0} -#define MACHINE_MULTIPLIER_FIXED -1, -1 +#define MACHINE_MULTIPLIER_FIXED -1 #define CPU_BLOCK_NONE 0 -#define CPU_BLOCK_QDI_FMB CPU_BLOCK(CPU_WINCHIP, CPU_WINCHIP2, CPU_Cx6x86, CPU_Cx6x86L, CPU_Cx6x86MX) -#define CPU_BLOCK_SOYO_4SAW2 CPU_BLOCK(CPU_i486SX, CPU_i486DX, CPU_Am486SX, CPU_Am486DX) /* Make sure it's always an invalid value to avoid misdetections. */ #if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64) @@ -256,6 +254,22 @@ typedef struct _machine_filter_ { const char id; } machine_filter_t; +typedef struct _machine_cpu_ { + uint32_t package; + const uint8_t *block; + uint32_t min_bus; + uint32_t max_bus; + uint16_t min_voltage; + uint16_t max_voltage; + float min_multi; + float max_multi; +} machine_cpu_t; + +typedef struct _machine_memory_ { + uint32_t min, max; + int step; +} machine_memory_t; + typedef struct _machine_ { const char *name; const char *internal_name; @@ -263,25 +277,29 @@ typedef struct _machine_ { uint32_t chipset; int (*init)(const struct _machine_ *); uintptr_t pad, pad0, pad1, pad2; - uint32_t cpu_package; - const uint8_t *cpu_block; - uint32_t cpu_min_bus; - uint32_t cpu_max_bus; - uint16_t cpu_min_voltage; - uint16_t cpu_max_voltage; - float cpu_min_multi; - float cpu_max_multi; + const machine_cpu_t cpu; uintptr_t bus_flags; uintptr_t flags; - uint32_t min_ram, max_ram; + const machine_memory_t ram; int ram_granularity; int nvrmask; + uint16_t kbc; + /* Bits: + 7-0 Set bits are forced set on P1 (no forced set = 0x00); + 15-8 Clear bits are forced clear on P1 (no foced clear = 0xff). */ + uint16_t kbc_p1; + uint32_t gpio; + uint32_t gpio_acpi; #ifdef EMU_DEVICE_H - const device_t *(*get_device)(void); - const device_t *(*get_vid_device)(void); + const device_t *device; + const device_t *vid_device; + const device_t *snd_device; + const device_t *net_device; #else - void *get_device; - void *get_vid_device; + void *device; + void *vid_device; + void *snd_device; + void *net_device; #endif } machine_t; @@ -773,16 +791,16 @@ extern const device_t ps1_hdc_device; #endif /* m_ps2_isa.c */ -extern int machine_ps2_m30_286_init(const machine_t *); +extern int machine_ps2_m30_286_init(const machine_t *); /* m_ps2_mca.c */ -extern int machine_ps2_model_50_init(const machine_t *); +extern int machine_ps2_model_50_init(const machine_t *); extern int machine_ps2_model_60_init(const machine_t *); -extern int machine_ps2_model_55sx_init(const machine_t *); -extern int machine_ps2_model_65sx_init(const machine_t *); -extern int machine_ps2_model_70_type3_init(const machine_t *); -extern int machine_ps2_model_80_init(const machine_t *); -extern int machine_ps2_model_80_axx_init(const machine_t *); +extern int machine_ps2_model_55sx_init(const machine_t *); +extern int machine_ps2_model_65sx_init(const machine_t *); +extern int machine_ps2_model_70_type3_init(const machine_t *); +extern int machine_ps2_model_80_init(const machine_t *); +extern int machine_ps2_model_80_axx_init(const machine_t *); /* m_tandy.c */ extern int tandy1k_eeprom_read(void); diff --git a/src/machine/m_amstrad.c b/src/machine/m_amstrad.c index baf78d071..43a8093c8 100644 --- a/src/machine/m_amstrad.c +++ b/src/machine/m_amstrad.c @@ -670,7 +670,7 @@ vid_speed_change_1512(void *priv) recalc_timings_1512(vid); } -device_config_t vid_1512_config[] = { +const device_config_t vid_1512_config[] = { { .name = "display_type", .description = "Display type", @@ -723,7 +723,7 @@ device_config_t vid_1512_config[] = { { .name = "", .description = "", .type = CONFIG_END } }; -static const device_t vid_1512_device = { +const device_t vid_1512_device = { .name = "Amstrad PC1512 (video)", .internal_name = "vid_1512", .flags = 0, @@ -737,13 +737,6 @@ static const device_t vid_1512_device = { .config = vid_1512_config }; -const device_t * -pc1512_get_device(void) -{ - return(&vid_1512_device); -} - - static void recalc_timings_1640(amsvid_t *vid) { @@ -882,7 +875,7 @@ vid_speed_changed_1640(void *priv) recalc_timings_1640(vid); } -device_config_t vid_1640_config[] = { +const device_config_t vid_1640_config[] = { { .name = "language", .description = "BIOS language", @@ -906,7 +899,7 @@ device_config_t vid_1640_config[] = { { .name = "", .description = "", .type = CONFIG_END } }; -static const device_t vid_1640_device = { +const device_t vid_1640_device = { .name = "Amstrad PC1640 (video)", .internal_name = "vid_1640", .flags = 0, @@ -920,12 +913,6 @@ static const device_t vid_1640_device = { .config = vid_1640_config }; -const device_t * -pc1640_get_device(void) -{ - return(&vid_1640_device); -} - /* Display type */ #define PC200_CGA 0 /* CGA monitor */ #define PC200_MDA 1 /* MDA monitor */ @@ -1715,7 +1702,7 @@ vid_close_200(void *priv) } -device_config_t vid_200_config[] = { +const device_config_t vid_200_config[] = { /* TODO: Should have options here for: * * > Display port (TTL or RF) @@ -1791,7 +1778,7 @@ device_config_t vid_200_config[] = { { .name = "", .description = "", .type = CONFIG_END } }; -static const device_t vid_200_device = { +const device_t vid_200_device = { .name = "Amstrad PC200 (video)", .internal_name = "vid_200", .flags = 0, @@ -1805,13 +1792,7 @@ static const device_t vid_200_device = { .config = vid_200_config }; -const device_t * -pc200_get_device(void) -{ - return(&vid_200_device); -} - -device_config_t vid_ppc512_config[] = { +const device_config_t vid_ppc512_config[] = { /* TODO: Should have options here for: * * > Display port (TTL or RF) @@ -1895,7 +1876,7 @@ device_config_t vid_ppc512_config[] = { { .name = "", .description = "", .type = CONFIG_END } }; -static const device_t vid_ppc512_device = { +const device_t vid_ppc512_device = { .name = "Amstrad PPC512 (video)", .internal_name = "vid_ppc512", .flags = 0, @@ -1909,13 +1890,7 @@ static const device_t vid_ppc512_device = { .config = vid_ppc512_config }; -const device_t * -ppc512_get_device(void) -{ - return(&vid_ppc512_device); -} - -device_config_t vid_pc2086_config[] = { +const device_config_t vid_pc2086_config[] = { { .name = "language", .description = "BIOS language", @@ -1933,7 +1908,7 @@ device_config_t vid_pc2086_config[] = { { .name = "", .description = "", .type = CONFIG_END } }; -static const device_t vid_pc2086_device = { +const device_t vid_pc2086_device = { .name = "Amstrad PC2086", .internal_name = "vid_pc2086", .flags = 0, @@ -1947,13 +1922,7 @@ static const device_t vid_pc2086_device = { .config = vid_pc2086_config }; -const device_t * -pc2086_get_device(void) -{ - return(&vid_pc2086_device); -} - -device_config_t vid_pc3086_config[] = { +const device_config_t vid_pc3086_config[] = { { .name = "language", .description = "BIOS language", @@ -1971,7 +1940,7 @@ device_config_t vid_pc3086_config[] = { { .name = "", .description = "", .type = CONFIG_END } }; -static const device_t vid_pc3086_device = { +const device_t vid_pc3086_device = { .name = "Amstrad PC3086", .internal_name = "vid_pc3086", .flags = 0, @@ -1985,13 +1954,6 @@ static const device_t vid_pc3086_device = { .config = vid_pc3086_config }; -const device_t * -pc3086_get_device(void) -{ - return(&vid_pc3086_device); -} - - static void ms_write(uint16_t addr, uint8_t val, void *priv) { diff --git a/src/machine/m_at_286_386sx.c b/src/machine/m_at_286_386sx.c index 5f98d750c..295c2fd82 100644 --- a/src/machine/m_at_286_386sx.c +++ b/src/machine/m_at_286_386sx.c @@ -99,14 +99,6 @@ machine_at_tg286m_init(const machine_t *model) return ret; } - -const device_t * -at_ama932j_get_device(void) -{ - return &oti067_ama932j_device; -} - - int machine_at_ama932j_init(const machine_t *model) { @@ -418,14 +410,6 @@ machine_at_spc4216p_init(const machine_t *model) return ret; } - -const device_t * -at_spc4620p_get_device(void) -{ - return &ati28800k_spc4620p_device; -} - - int machine_at_spc4620p_init(const machine_t *model) { diff --git a/src/machine/m_at_386dx_486.c b/src/machine/m_at_386dx_486.c index 5944132e5..72e8eaa6a 100644 --- a/src/machine/m_at_386dx_486.c +++ b/src/machine/m_at_386dx_486.c @@ -186,14 +186,6 @@ machine_at_valuepoint433_init(const machine_t *model) // hangs without the PS/2 return ret; } - -const device_t * -at_valuepoint433_get_device(void) -{ - return &et4000w32_onboard_device; -} - - int machine_at_ecs386_init(const machine_t *model) { @@ -361,13 +353,6 @@ machine_at_vect486vl_init(const machine_t *model) // has HDC problems return ret; } -const device_t * -at_vect486vl_get_device(void) -{ - return &gd5428_onboard_device; -} - - int machine_at_d824_init(const machine_t *model) { @@ -392,14 +377,6 @@ machine_at_d824_init(const machine_t *model) return ret; } - -const device_t * -at_d824_get_device(void) -{ - return &gd5428_onboard_device; -} - - int machine_at_acera1g_init(const machine_t *model) { @@ -426,14 +403,6 @@ machine_at_acera1g_init(const machine_t *model) return ret; } - -const device_t * -at_acera1g_get_device(void) -{ - return &gd5428_onboard_device; -} - - int machine_at_acerv10_init(const machine_t *model) { @@ -1453,14 +1422,6 @@ machine_at_sbc490_init(const machine_t *model) return ret; } - -const device_t * -at_sbc490_get_device(void) -{ - return &tgui9440_onboard_pci_device; -} - - int machine_at_tf486_init(const machine_t *model) { diff --git a/src/machine/m_at_compaq.c b/src/machine/m_at_compaq.c index c67ccbb39..686032493 100644 --- a/src/machine/m_at_compaq.c +++ b/src/machine/m_at_compaq.c @@ -719,7 +719,7 @@ const device_config_t compaq_plasma_config[] = { { .name = "", .description = "", .type = CONFIG_END } }; -static const device_t compaq_plasma_device = { +const device_t compaq_plasma_device = { .name = "Compaq Plasma", .internal_name = "compaq_plasma", .flags = 0, @@ -792,12 +792,6 @@ write_raml(uint32_t addr, uint32_t val, void *priv) mem_write_raml_page(addr, val, &pages[addr >> 12]); } -const device_t * -at_cpqiii_get_device(void) -{ - return &compaq_plasma_device; -} - static void machine_at_compaq_init(const machine_t *model, int type) { diff --git a/src/machine/m_at_slot1.c b/src/machine/m_at_slot1.c index e0e341735..39a60b0f9 100644 --- a/src/machine/m_at_slot1.c +++ b/src/machine/m_at_slot1.c @@ -481,14 +481,6 @@ machine_at_s1846_init(const machine_t *model) return ret; } - -const device_t * -at_s1846_get_device(void) -{ - return &es1371_onboard_device; -} - - int machine_at_ficka6130_init(const machine_t *model) { diff --git a/src/machine/m_at_socket370.c b/src/machine/m_at_socket370.c index 89ed5c471..9daec8609 100644 --- a/src/machine/m_at_socket370.c +++ b/src/machine/m_at_socket370.c @@ -436,14 +436,6 @@ machine_at_cuv4xls_init(const machine_t *model) return ret; } - -const device_t * -at_cuv4xls_get_device(void) -{ - return &cmi8738_onboard_device; -} - - int machine_at_6via90ap_init(const machine_t *model) { diff --git a/src/machine/m_at_socket4.c b/src/machine/m_at_socket4.c index d5873ad45..1dd74971d 100644 --- a/src/machine/m_at_socket4.c +++ b/src/machine/m_at_socket4.c @@ -363,14 +363,6 @@ machine_at_pb520r_init(const machine_t *model) return ret; } - -const device_t * -at_pb520r_get_device(void) -{ - return &gd5434_onboard_pci_device; -} - - int machine_at_excalibur_init(const machine_t *model) { diff --git a/src/machine/m_at_socket7.c b/src/machine/m_at_socket7.c index eafb16a40..4adcb2ad9 100644 --- a/src/machine/m_at_socket7.c +++ b/src/machine/m_at_socket7.c @@ -418,13 +418,6 @@ machine_at_presario2240_init(const machine_t *model) } -const device_t * -at_presario2240_get_device(void) -{ - return &s3_trio64v2_dx_onboard_pci_device; -} - - int machine_at_presario4500_init(const machine_t *model) { diff --git a/src/machine/m_at_socket7_3v.c b/src/machine/m_at_socket7_3v.c index 14d4f78c1..c63d02347 100644 --- a/src/machine/m_at_socket7_3v.c +++ b/src/machine/m_at_socket7_3v.c @@ -159,14 +159,6 @@ machine_at_thor_init(const machine_t *model) return ret; } - -const device_t * -at_thor_get_device(void) -{ - return &s3_phoenix_trio64vplus_onboard_pci_device; -} - - int machine_at_mrthor_init(const machine_t *model) { @@ -218,14 +210,6 @@ machine_at_endeavor_init(const machine_t *model) return ret; } - -const device_t * -at_endeavor_get_device(void) -{ - return &s3_phoenix_trio64_onboard_pci_device; -} - - int machine_at_ms5119_init(const machine_t *model) { @@ -289,14 +273,6 @@ machine_at_pb640_init(const machine_t *model) return ret; } - -const device_t * -at_pb640_get_device(void) -{ - return &gd5440_onboard_pci_device; -} - - int machine_at_fmb_init(const machine_t *model) { diff --git a/src/machine/m_pcjr.c b/src/machine/m_pcjr.c index 0a8b9cf46..2491e5064 100644 --- a/src/machine/m_pcjr.c +++ b/src/machine/m_pcjr.c @@ -788,7 +788,7 @@ static const device_config_t pcjr_config[] = { { .name = "", .description = "", .type = CONFIG_END } }; -static const device_t pcjr_device = { +const device_t pcjr_device = { "IBM PCjr", "pcjr", 0, @@ -802,13 +802,6 @@ static const device_t pcjr_device = { pcjr_config }; -const device_t * -pcjr_get_device(void) -{ - return &pcjr_device; -} - - int machine_pcjr_init(const machine_t *model) { diff --git a/src/machine/m_ps2_isa.c b/src/machine/m_ps2_isa.c index 4f98401e7..24fa0dfb1 100644 --- a/src/machine/m_ps2_isa.c +++ b/src/machine/m_ps2_isa.c @@ -217,4 +217,3 @@ machine_ps2_m30_286_init(const machine_t *model) return ret; } - diff --git a/src/machine/m_ps2_mca.c b/src/machine/m_ps2_mca.c index 193840f6b..7aea5a319 100644 --- a/src/machine/m_ps2_mca.c +++ b/src/machine/m_ps2_mca.c @@ -1521,5 +1521,3 @@ machine_ps2_model_80_axx_init(const machine_t *model) return ret; } - - diff --git a/src/machine/m_tandy.c b/src/machine/m_tandy.c index 924466e8d..d6c628a90 100644 --- a/src/machine/m_tandy.c +++ b/src/machine/m_tandy.c @@ -1143,7 +1143,7 @@ vid_init(tandy_t *dev) } -static const device_config_t vid_config[] = { +const device_config_t vid_config[] = { { .name = "display_type", .description = "Display type", @@ -1161,7 +1161,7 @@ static const device_config_t vid_config[] = { { .name = "", .description = "", .type = CONFIG_END } }; -static const device_t vid_device = { +const device_t vid_device = { .name = "Tandy 1000", .internal_name = "tandy1000_video", .flags = 0, @@ -1175,7 +1175,7 @@ static const device_t vid_device = { .config = vid_config }; -static const device_t vid_device_hx = { +const device_t vid_device_hx = { .name = "Tandy 1000 HX", .internal_name = "tandy1000_hx_video", .flags = 0, @@ -1189,7 +1189,7 @@ static const device_t vid_device_hx = { .config = vid_config }; -static const device_t vid_device_sl = { +const device_t vid_device_sl = { .name = "Tandy 1000SL2", .internal_name = "tandy1000_sl_video", .flags = 0, @@ -1203,26 +1203,6 @@ static const device_t vid_device_sl = { .config = NULL }; -const device_t * -tandy1k_get_device(void) -{ - return &vid_device; -} - - -const device_t * -tandy1k_hx_get_device(void) -{ - return &vid_device_hx; -} - -const device_t * -tandy1k_sl_get_device(void) -{ - return &vid_device_sl; -} - - static void eep_write(uint16_t addr, uint8_t val, void *priv) { diff --git a/src/machine/m_xt_olivetti.c b/src/machine/m_xt_olivetti.c index 8541fa2c3..716bb9c18 100644 --- a/src/machine/m_xt_olivetti.c +++ b/src/machine/m_xt_olivetti.c @@ -642,13 +642,6 @@ const device_t m19_vid_device = { .config = m19_vid_config }; -const device_t * -m19_get_device(void) -{ - return &m19_vid_device; -} - - static uint8_t m24_read(uint16_t port, void *priv) { @@ -738,14 +731,6 @@ m24_read(uint16_t port, void *priv) return(ret); } - -const device_t * -m24_get_device(void) -{ - return &ogc_m24_device; -} - - int machine_xt_m24_init(const machine_t *model) { diff --git a/src/machine/m_xt_t1000.c b/src/machine/m_xt_t1000.c index a871c7a25..961cc627a 100644 --- a/src/machine/m_xt_t1000.c +++ b/src/machine/m_xt_t1000.c @@ -841,14 +841,6 @@ t1000_read_roml(uint32_t addr, void *priv) return(*(uint32_t *)(&sys->romdrive[sys->rom_offset + (addr & 0xffff)])); } - -const device_t * -t1000_get_device(void) -{ - return(&t1000_video_device); -} - - int machine_xt_t1000_init(const machine_t *model) { diff --git a/src/machine/m_xt_xi8088.c b/src/machine/m_xt_xi8088.c index ef5d45163..2a6187570 100644 --- a/src/machine/m_xt_xi8088.c +++ b/src/machine/m_xt_xi8088.c @@ -177,13 +177,6 @@ const device_t xi8088_device = { .config = xi8088_config }; -const device_t * -xi8088_get_device(void) -{ - return &xi8088_device; -} - - int machine_xt_xi8088_init(const machine_t *model) { diff --git a/src/machine/m_xt_zenith.c b/src/machine/m_xt_zenith.c index c210d5086..f9806b610 100644 --- a/src/machine/m_xt_zenith.c +++ b/src/machine/m_xt_zenith.c @@ -130,12 +130,6 @@ machine_zenith_init(const machine_t *model){ } -const device_t * -z184_get_device(void) -{ - return &cga_device; -} - /* * Current bugs and limitations: * - missing NVRAM implementation diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 96f70ee65..a69cd71fc 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -31,6 +31,27 @@ #include <86box/rom.h> #include <86box/device.h> #include <86box/machine.h> +#include <86box/keyboard.h> +#include <86box/sound.h> +#include <86box/video.h> + +// Temporarily here till we move everything out into the right files +extern const device_t pcjr_device; +extern const device_t m19_vid_device; +extern const device_t vid_device; +extern const device_t vid_device_hx; +extern const device_t t1000_video_device; +extern const device_t xi8088_device; +extern const device_t cga_device; +extern const device_t vid_1512_device; +extern const device_t vid_1640_device; +extern const device_t vid_pc2086_device; +extern const device_t vid_pc3086_device; +extern const device_t vid_200_device; +extern const device_t vid_ppc512_device; +extern const device_t vid_device_sl; +extern const device_t t1200_video_device; +extern const device_t compaq_plasma_device; const machine_filter_t machine_types[] = { { "None", MACHINE_TYPE_NONE }, @@ -148,273 +169,4028 @@ const machine_filter_t machine_chipsets[] = { - Zeos Quadtel 486. NOTE: The AMI MegaKey tests were done on a real Intel Advanced/ATX - (thanks, MrKsoft for running my AMIKEY.COM on it), but the - technical specifications of the other Intel machines confirm - that the other boards also have the MegaKey. + (thanks, MrKsoft for running my AMIKEY.COM on it), but the + technical specifications of the other Intel machines confirm + that the other boards also have the MegaKey. NOTE: The later (ie. not AMI Color) Intel AMI BIOS'es execute a - sequence of commands (B8, BA, BB) during one of the very first - phases of POST, in a way that is only valid on the AMIKey-3 - KBC firmware, that includes the Classic PCI/ED (Ninja) BIOS - which otherwise does not execute any AMI KBC commands, which - indicates that the sequence is a leftover of whatever AMI - BIOS (likely a laptop one since the AMIKey-3 is a laptop KBC - firmware!) Intel forked. + sequence of commands (B8, BA, BB) during one of the very first + phases of POST, in a way that is only valid on the AMIKey-3 + KBC firmware, that includes the Classic PCI/ED (Ninja) BIOS + which otherwise does not execute any AMI KBC commands, which + indicates that the sequence is a leftover of whatever AMI + BIOS (likely a laptop one since the AMIKey-3 is a laptop KBC + firmware!) Intel forked. NOTE: The VIA VT82C42N returns 0x46 ('F') in command 0xA1 (so it - emulates the AMI KF/AMIKey KBC firmware), and 0x42 ('B') in - command 0xAF. - The version on the VIA VT82C686B southbridge also returns - 'F' in command 0xA1, but 0x45 ('E') in command 0xAF. - The version on the VIA VT82C586B southbridge also returns - 'F' in command 0xA1, but 0x44 ('D') in command 0xAF. - The version on the VIA VT82C586A southbridge also returns - 'F' in command 0xA1, but 0x43 ('C') in command 0xAF. + emulates the AMI KF/AMIKey KBC firmware), and 0x42 ('B') in + command 0xAF. + The version on the VIA VT82C686B southbridge also returns + 'F' in command 0xA1, but 0x45 ('E') in command 0xAF. + The version on the VIA VT82C586B southbridge also returns + 'F' in command 0xA1, but 0x44 ('D') in command 0xAF. + The version on the VIA VT82C586A southbridge also returns + 'F' in command 0xA1, but 0x43 ('C') in command 0xAF. NOTE: The AMI MegaKey commands blanked in the technical reference - are CC and and C4, which are Set P14 High and Set P14 Low, - respectively. Also, AMI KBC command C1, mysteriously missing - from the technical references of AMI MegaKey and earlier, is - Write Input Port, same as on AMIKey-3. + are CC and and C4, which are Set P14 High and Set P14 Low, + respectively. Also, AMI KBC command C1, mysteriously missing + from the technical references of AMI MegaKey and earlier, is + Write Input Port, same as on AMIKey-3. */ const machine_t machines[] = { /* 8088 Machines */ - { "[8088] IBM PC (1981)", "ibmpc", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_pc_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 16, 64, 16, 0, NULL, NULL }, - { "[8088] IBM PC (1982)", "ibmpc82", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_pc82_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 64, 256, 64, 0, NULL, NULL }, - { "[8088] IBM PCjr", "ibmpcjr", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_pcjr_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 4772728, 4772728, 0, 0, 0, 0, MACHINE_PCJR, MACHINE_VIDEO_FIXED, 128, 640, 128, 0, pcjr_get_device, NULL }, - { "[8088] IBM XT (1982)", "ibmxt", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 64, 256, 64, 0, NULL, NULL }, - { "[8088] IBM XT (1986)", "ibmxt86", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt86_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 256, 640, 64, 0, NULL, NULL }, - { "[8088] American XT Computer", "americxt", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_americxt_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 64, 640, 64, 0, NULL, NULL }, - { "[8088] AMI XT clone", "amixt", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_amixt_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 64, 640, 64, 0, NULL, NULL }, - { "[8088] Bondwell BW230", "bw230", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_bw230_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 64, 640, 64, 0, NULL, NULL }, - { "[8088] Columbia Data Products MPC-1600", "mpc1600", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_mpc1600_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 128, 512, 64, 0, NULL, NULL }, - { "[8088] Compaq Portable", "portable", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_compaq_portable_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 128, 640, 128, 0, NULL, NULL }, - { "[8088] DTK PIM-TB10-Z", "dtk", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_dtk_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 64, 640, 64, 0, NULL, NULL }, - { "[8088] Eagle PC Spirit", "pcspirit", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_pcspirit_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 128, 640, 64, 0, NULL, NULL }, - { "[8088] Generic XT clone", "genxt", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_genxt_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 64, 640, 64, 0, NULL, NULL }, - { "[8088] Hyosung Topstar 88T", "top88", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_top88_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 128, 640, 64, 0, NULL, NULL }, - { "[8088] Hyundai SUPER-16T", "super16t", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_super16t_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 4772728, 7159092, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 128, 640, 64, 0, NULL, NULL }, - { "[8088] Hyundai SUPER-16TE", "super16te", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_super16te_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 10000000, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 128, 640, 64, 0, NULL, NULL }, - { "[8088] Juko ST", "jukopc", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_jukopc_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 64, 640, 64, 0, NULL, NULL }, - { "[8088] Kaypro PC", "kaypropc", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_kaypropc_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 128, 640, 64, 0, NULL, NULL }, - { "[8088] Multitech PC-500", "pc500", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_pc500_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 128, 640, 64, 0, NULL, NULL }, - { "[8088] Multitech PC-700", "pc700", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_pc700_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 128, 640, 64, 0, NULL, NULL }, - { "[8088] NCR PC4i", "pc4i", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_pc4i_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 256, 640, 256, 0, NULL, NULL }, - { "[8088] Olivetti M19", "m19", MACHINE_TYPE_8088, MACHINE_CHIPSET_PROPRIETARY, machine_xt_m19_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 4772728, 7159092, 0, 0, 0, 0, MACHINE_PC, MACHINE_VIDEO_FIXED, 256, 640, 256, 0, m19_get_device, NULL }, - { "[8088] OpenXT", "openxt", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_openxt_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 64, 640, 64, 0, NULL, NULL }, - { "[8088] Philips P3105/NMS9100", "p3105", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_p3105_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_XTA, 256, 768, 256, 0, NULL, NULL }, - { "[8088] Phoenix XT clone", "pxxt", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_pxxt_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 64, 640, 64, 0, NULL, NULL }, - { "[8088] Sanyo SX-16", "sansx16", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_sansx16_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 256, 640, 256, 0, NULL, NULL }, - { "[8088] Schneider EuroPC", "europc", MACHINE_TYPE_8088, MACHINE_CHIPSET_PROPRIETARY, machine_europc_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088_EUROPC, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_XTA | MACHINE_MOUSE, 512, 640, 128, 15, NULL, NULL }, - { "[8088] Super PC/Turbo XT", "pcxt", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_pcxt_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 64, 640, 64, 0, NULL, NULL }, - { "[8088] Tandy 1000", "tandy", MACHINE_TYPE_8088, MACHINE_CHIPSET_PROPRIETARY, machine_tandy_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088_EUROPC, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_VIDEO_FIXED, 128, 640, 128, 0, tandy1k_get_device, NULL }, - { "[8088] Tandy 1000 HX", "tandy1000hx", MACHINE_TYPE_8088, MACHINE_CHIPSET_PROPRIETARY, machine_tandy1000hx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088_EUROPC, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_VIDEO_FIXED, 256, 640, 128, 0, tandy1k_hx_get_device, NULL }, - { "[8088] Toshiba T1000", "t1000", MACHINE_TYPE_8088, MACHINE_CHIPSET_PROPRIETARY, machine_xt_t1000_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_VIDEO, 512, 1280, 768, 63, t1000_get_device, NULL }, - { "[8088] Vendex HeadStart Turbo 888-XT", "vendex", MACHINE_TYPE_8088, MACHINE_CHIPSET_PROPRIETARY, machine_xt_vendex_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 256, 768, 256, 0, NULL, NULL }, + { + .name = "[8088] IBM PC (1981)", + .internal_name = "ibmpc", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_pc_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 16, + .max = 64, + .step = 16 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] IBM PC (1982)", + .internal_name = "ibmpc82", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_pc82_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 64, + .max = 256, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] IBM PCjr", + .internal_name = "ibmpcjr", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_pcjr_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 4772728, + .max_bus = 4772728, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PCJR, + .flags = MACHINE_VIDEO_FIXED, + .ram = { + .min = 128, + .max = 640, + .step = 128 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PCJR, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = &pcjr_device, + .vid_device = NULL + }, + { + .name = "[8088] IBM XT (1982)", + .internal_name = "ibmxt", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 64, + .max = 256, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] IBM XT (1986)", + .internal_name = "ibmxt86", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt86_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 256, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] American XT Computer", + .internal_name = "americxt", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_americxt_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 64, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] AMI XT clone", + .internal_name = "amixt", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_amixt_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 64, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Columbia Data Products MPC-1600", + .internal_name = "mpc1600", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_mpc1600_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 128, + .max = 512, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Compaq Portable", + .internal_name = "portable", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_compaq_portable_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 128, + .max = 640, + .step = 128 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] DTK PIM-TB10-Z", + .internal_name = "dtk", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_dtk_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 64, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Eagle PC Spirit", + .internal_name = "pcspirit", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_pcspirit_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 128, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Generic XT clone", + .internal_name = "genxt", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_genxt_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 64, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Juko ST", + .internal_name = "jukopc", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_jukopc_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 64, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Multitech PC-500", + .internal_name = "pc500", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_pc500_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 128, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Multitech PC-700", + .internal_name = "pc700", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_pc700_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 128, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] NCR PC4i", + .internal_name = "pc4i", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_pc4i_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 256, + .max = 640, + .step = 256 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Olivetti M19", + .internal_name = "m19", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_xt_m19_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 4772728, + .max_bus = 7159092, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_VIDEO_FIXED, + .ram = { + .min = 256, + .max = 640, + .step = 256 + }, + .nvrmask = 0, + .kbc = KBC_OLIVETTI_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = &m19_vid_device, + .vid_device = NULL + }, + { + .name = "[8088] OpenXT", + .internal_name = "openxt", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_openxt_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 64, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Philips P3105/NMS9100", + .internal_name = "p3105", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_p3105_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_XTA, + .ram = { + .min = 256, + .max = 768, + .step = 256 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Phoenix XT clone", + .internal_name = "pxxt", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_pxxt_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 64, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Schneider EuroPC", + .internal_name = "europc", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_europc_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088_EUROPC, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_XTA | MACHINE_MOUSE, + .ram = { + .min = 512, + .max = 640, + .step = 128 + }, + .nvrmask = 15, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Super PC/Turbo XT", + .internal_name = "pcxt", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_pcxt_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 64, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Tandy 1000", + .internal_name = "tandy", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_tandy_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088_EUROPC, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_VIDEO_FIXED, + .ram = { + .min = 128, + .max = 640, + .step = 128 + }, + .nvrmask = 0, + .kbc = KBC_TANDY, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = &vid_device, + .vid_device = NULL + }, + { + .name = "[8088] Tandy 1000 HX", + .internal_name = "tandy1000hx", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_tandy1000hx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088_EUROPC, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_VIDEO_FIXED, + .ram = { + .min = 256, + .max = 640, + .step = 128 + }, + .nvrmask = 0, + .kbc = KBC_TANDY, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = &vid_device_hx, + .vid_device = NULL + }, + { + .name = "[8088] Toshiba T1000", + .internal_name = "t1000", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_xt_t1000_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_VIDEO, + .ram = { + .min = 512, + .max = 1280, + .step = 768 + }, + .nvrmask = 63, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = &t1000_video_device, + .vid_device = NULL + }, + { + .name = "[8088] Vendex HeadStart Turbo 888-XT", + .internal_name = "vendex", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_xt_vendex_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 256, + .max = 768, + .step = 256 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, #if defined(DEV_BRANCH) && defined(USE_LASERXT) - { "[8088] VTech Laser Turbo XT", "ltxt", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_laserxt_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 256, 640, 256, 0,NULL, NULL }, + { + .name = "[8088] VTech Laser Turbo XT", + .internal_name = "ltxt", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_laserxt_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 256, + .max = 640, + .step = 256 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, #endif /* Has a standard PS/2 KBC (so, use IBM PS/2 Type 1). */ - { "[8088] Xi8088", "xi8088", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_xi8088_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_FLAGS_NONE, 64, 1024, 128, 127, xi8088_get_device, NULL }, - { "[8088] Z-NIX PC-1600", "znic", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_znic_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 64, 640, 64, 0, NULL, NULL }, - { "[8088] Zenith Data Systems Z-151/152/161", "zdsz151", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_z151_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 128, 640, 64, 0, NULL, NULL }, - { "[8088] Zenith Data Systems Z-159", "zdsz159", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_z159_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 128, 640, 64, 0, NULL, NULL }, - { "[8088] Zenith Data Systems SupersPort (Z-184)", "zdsupers", MACHINE_TYPE_8088, MACHINE_CHIPSET_DISCRETE, machine_xt_z184_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_VIDEO_FIXED, 128, 640, 128, 0, z184_get_device, NULL }, - { "[GC100A] Philips P3120", "p3120", MACHINE_TYPE_8088, MACHINE_CHIPSET_GC100A, machine_xt_p3120_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8088, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_XTA, 256, 768, 256, 0, NULL, NULL }, + { + .name = "[8088] Xi8088", + .internal_name = "xi8088", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_xi8088_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 64, + .max = 1024, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_VIA_VT82C4XN_XI8088, + .kbc_p1 = 0xff04, + .gpio = 0xffffffff, + .device = &xi8088_device, + .vid_device = NULL + }, + { + .name = "[8088] Z-NIX PC-1600", + .internal_name = "znic", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_znic_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 64, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Zenith Data Systems Z-151/152/161", + .internal_name = "zdsz151", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_z151_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 128, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Zenith Data Systems Z-159", + .internal_name = "zdsz159", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_z159_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 128, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Zenith Data Systems SupersPort (Z-184)", + .internal_name = "zdsupers", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_z184_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_VIDEO_FIXED, + .ram = { + .min = 128, + .max = 640, + .step = 128 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = &cga_device, + .vid_device = NULL + }, + { + .name = "[GC100A] Philips P3120", + .internal_name = "p3120", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_GC100A, + .init = machine_xt_p3120_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_XTA, + .ram = { + .min = 256, + .max = 768, + .step = 256 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, /* 8086 Machines */ - { "[8086] Amstrad PC1512", "pc1512", MACHINE_TYPE_8086, MACHINE_CHIPSET_PROPRIETARY, machine_pc1512_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8086, CPU_BLOCK_NONE, 8000000, 8000000, 0, 0, 0, 0, MACHINE_PC, MACHINE_VIDEO_FIXED | MACHINE_MOUSE, 512, 640, 128, 63, pc1512_get_device, NULL }, - { "[8086] Amstrad PC1640", "pc1640", MACHINE_TYPE_8086, MACHINE_CHIPSET_PROPRIETARY, machine_pc1640_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8086, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 640, 63, pc1640_get_device, NULL }, - { "[8086] Amstrad PC2086", "pc2086", MACHINE_TYPE_8086, MACHINE_CHIPSET_PROPRIETARY, machine_pc2086_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8086, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_VIDEO_FIXED | MACHINE_MOUSE, 640, 640, 640, 63, pc2086_get_device, NULL }, - { "[8086] Amstrad PC3086", "pc3086", MACHINE_TYPE_8086, MACHINE_CHIPSET_PROPRIETARY, machine_pc3086_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8086, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_VIDEO_FIXED | MACHINE_MOUSE, 640, 640, 640, 63, pc3086_get_device, NULL }, - { "[8086] Amstrad PC20(0)", "pc200", MACHINE_TYPE_8086, MACHINE_CHIPSET_PROPRIETARY, machine_pc200_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8086, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 63, pc200_get_device, NULL }, - { "[8086] Amstrad PPC512/640", "ppc512", MACHINE_TYPE_8086, MACHINE_CHIPSET_PROPRIETARY, machine_ppc512_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8086, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 63, ppc512_get_device, NULL }, - { "[8086] Compaq Deskpro", "deskpro", MACHINE_TYPE_8086, MACHINE_CHIPSET_PROPRIETARY, machine_xt_compaq_deskpro_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8086, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 128, 640, 128, 0, NULL, NULL }, - { "[8086] Olivetti M21/24/24SP", "m24", MACHINE_TYPE_8086, MACHINE_CHIPSET_PROPRIETARY, machine_xt_m24_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8086, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_VIDEO | MACHINE_MOUSE, 128, 640, 128, 0, m24_get_device, NULL }, + { + .name = "[8086] Amstrad PC1512", + .internal_name = "pc1512", + .type = MACHINE_TYPE_8086, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_pc1512_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8086, + .block = CPU_BLOCK_NONE, + .min_bus = 8000000, + .max_bus = 8000000, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_VIDEO_FIXED | MACHINE_MOUSE, + .ram = { + .min = 512, + .max = 640, + .step = 128 + }, + .nvrmask = 63, + .kbc = KBC_AMSTRAD, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = &vid_1512_device, + .vid_device = NULL + }, + { + .name = "[8086] Amstrad PC1640", + .internal_name = "pc1640", + .type = MACHINE_TYPE_8086, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_pc1640_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8086, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_VIDEO | MACHINE_MOUSE, + .ram = { + .min = 640, + .max = 640, + .step = 640 + }, + .nvrmask = 63, + .kbc = KBC_AMSTRAD, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = &vid_1640_device, + .vid_device = NULL + }, + { + .name = "[8086] Amstrad PC2086", + .internal_name = "pc2086", + .type = MACHINE_TYPE_8086, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_pc2086_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8086, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_VIDEO_FIXED | MACHINE_MOUSE, + .ram = { + .min = 640, + .max = 640, + .step = 640 + }, + .nvrmask = 63, + .kbc = KBC_AMSTRAD, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = &vid_pc2086_device, + .vid_device = NULL + }, + { + .name = "[8086] Amstrad PC3086", + .internal_name = "pc3086", + .type = MACHINE_TYPE_8086, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_pc3086_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8086, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_VIDEO_FIXED | MACHINE_MOUSE, + .ram = { + .min = 640, + .max = 640, + .step = 640 + }, + .nvrmask = 63, + .kbc = KBC_AMSTRAD, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = &vid_pc3086_device, + .vid_device = NULL + }, + { + .name = "[8086] Amstrad PC20(0)", + .internal_name = "pc200", + .type = MACHINE_TYPE_8086, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_pc200_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8086, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_VIDEO | MACHINE_MOUSE, + .ram = { + .min = 512, + .max = 640, + .step = 128 + }, + .nvrmask = 63, + .kbc = KBC_AMSTRAD, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = &vid_200_device, + .vid_device = NULL + }, + { + .name = "[8086] Amstrad PPC512/640", + .internal_name = "ppc512", + .type = MACHINE_TYPE_8086, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_ppc512_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8086, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_VIDEO | MACHINE_MOUSE, + .ram = { + .min = 512, + .max = 640, + .step = 128 + }, + .nvrmask = 63, + .kbc = KBC_AMSTRAD, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = &vid_ppc512_device, + .vid_device = NULL + }, + { + .name = "[8086] Compaq Deskpro", + .internal_name = "deskpro", + .type = MACHINE_TYPE_8086, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_xt_compaq_deskpro_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8086, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 128, + .max = 640, + .step = 128 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8086] Olivetti M21/24/24SP", + .internal_name = "m24", + .type = MACHINE_TYPE_8086, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_xt_m24_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8086, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_VIDEO | MACHINE_MOUSE, + .ram = { + .min = 128, + .max = 640, + .step = 128 + }, + .nvrmask = 0, + .kbc = KBC_OLIVETTI_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = &ogc_m24_device, + .vid_device = NULL + }, /* Has Olivetti KBC firmware. */ - { "[8086] Olivetti M240", "m240", MACHINE_TYPE_8086, MACHINE_CHIPSET_PROPRIETARY, machine_xt_m240_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8086, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 128, 640, 128, 0, NULL, NULL }, - { "[8086] Schetmash Iskra-3104", "iskra3104", MACHINE_TYPE_8086, MACHINE_CHIPSET_DISCRETE, machine_xt_iskra3104_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8086, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 128, 640, 128, 0, NULL, NULL }, - { "[8086] Tandy 1000 SL/2", "tandy1000sl2", MACHINE_TYPE_8086, MACHINE_CHIPSET_PROPRIETARY, machine_tandy1000sl2_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8086, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_VIDEO_FIXED, 512, 768, 128, 0, tandy1k_sl_get_device, NULL }, - { "[8086] Victor V86P", "v86p", MACHINE_TYPE_8086, MACHINE_CHIPSET_PROPRIETARY, machine_v86p_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8086, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_VIDEO, 512, 1024, 128, 127, NULL, NULL }, - { "[8086] Toshiba T1200", "t1200", MACHINE_TYPE_8086, MACHINE_CHIPSET_PROPRIETARY, machine_xt_t1200_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8086, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_VIDEO, 1024, 2048,1024, 63, t1200_get_device, NULL }, + { + .name = "[8086] Olivetti M240", + .internal_name = "m240", + .type = MACHINE_TYPE_8086, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_xt_m240_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8086, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 128, + .max = 640, + .step = 128 + }, + .nvrmask = 0, + .kbc = KBC_OLIVETTI, + .kbc_p1 = 0xff04, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8086] Schetmash Iskra-3104", + .internal_name = "iskra3104", + .type = MACHINE_TYPE_8086, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_iskra3104_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8086, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 128, + .max = 640, + .step = 128 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8086] Tandy 1000 SL/2", + .internal_name = "tandy1000sl2", + .type = MACHINE_TYPE_8086, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_tandy1000sl2_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8086, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_VIDEO_FIXED, + .ram = { + .min = 512, + .max = 768, + .step = 128 + }, + .nvrmask = 0, + .kbc = KBC_TANDY_SL2, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = &vid_device_sl, + .vid_device = NULL + }, + { + .name = "[8086] Victor V86P", + .internal_name = "v86p", + .type = MACHINE_TYPE_8086, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_v86p_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8086, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_VIDEO, + .ram = { + .min = 512, + .max = 1024, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8086] Toshiba T1200", + .internal_name = "t1200", + .type = MACHINE_TYPE_8086, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_xt_t1200_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8086, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 2048, + .step = 1024 + }, + .nvrmask = 63, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = &t1200_video_device, + .vid_device = NULL + }, #if defined(DEV_BRANCH) && defined(USE_LASERXT) - { "[8086] VTech Laser XT3", "lxt3", MACHINE_TYPE_8086, MACHINE_CHIPSET_DISCRETE, machine_xt_lxt3_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_8086, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PC, MACHINE_FLAGS_NONE, 256, 640, 256, 0, NULL, NULL }, + { + .name = "[8086] VTech Laser XT3", + .internal_name = "lxt3", + .type = MACHINE_TYPE_8086, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_lxt3_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8086, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 256, + .max = 640, + .step = 256 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, #endif /* 286 AT machines */ /* Has IBM AT KBC firmware. */ - { "[ISA] IBM AT", "ibmat", MACHINE_TYPE_286, MACHINE_CHIPSET_DISCRETE, machine_at_ibm_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 6000000, 8000000, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 256, 15872, 128, 63, NULL, NULL }, + { + .name = "[ISA] IBM AT", + .internal_name = "ibmat", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_at_ibm_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 6000000, + .max_bus = 8000000, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 256, + .max = 15872, + .step = 128 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[ISA] IBM PS/1 model 2011", "ibmps1es", MACHINE_TYPE_286, MACHINE_CHIPSET_PROPRIETARY, machine_ps1_m2011_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 10000000, 10000000, 0, 0, 0, 0, MACHINE_PS2, MACHINE_XTA | MACHINE_VIDEO_FIXED, 512, 16384, 512, 63, NULL, NULL }, + { + .name = "[ISA] IBM PS/1 model 2011", + .internal_name = "ibmps1es", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_ps1_m2011_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 10000000, + .max_bus = 10000000, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_XTA | MACHINE_VIDEO_FIXED, + .ram = { + .min = 512, + .max = 16384, + .step = 512 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[ISA] IBM PS/2 model 30-286", "ibmps2_m30_286", MACHINE_TYPE_286, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_m30_286_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286 | CPU_PKG_486SLC_IBM, CPU_BLOCK_NONE, 10000000, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_XTA | MACHINE_VIDEO_FIXED, 1024, 16384,1024, 127, NULL, NULL }, + { + .name = "[ISA] IBM PS/2 model 30-286", + .internal_name = "ibmps2_m30_286", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_ps2_m30_286_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286 | CPU_PKG_486SLC_IBM, + .block = CPU_BLOCK_NONE, + .min_bus = 10000000, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_XTA | MACHINE_VIDEO_FIXED, + .ram = { + .min = 1024, + .max = 16384, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM AT KBC firmware. */ - { "[ISA] IBM XT Model 286", "ibmxt286", MACHINE_TYPE_286, MACHINE_CHIPSET_DISCRETE, machine_at_ibmxt286_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 6000000, 6000000, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 256, 15872, 128, 127, NULL, NULL }, + { + .name = "[ISA] IBM XT Model 286", + .internal_name = "ibmxt286", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_at_ibmxt286_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 6000000, + .max_bus = 6000000, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 256, + .max = 15872, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* AMI BIOS for a chipset-less machine, most likely has AMI 'F' KBC firmware. */ - { "[ISA] AMI IBM AT", "ibmatami", MACHINE_TYPE_286, MACHINE_CHIPSET_DISCRETE, machine_at_ibmatami_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 6000000, 8000000, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 256, 15872, 128, 63, NULL, NULL }, + { + .name = "[ISA] AMI IBM AT", + .internal_name = "ibmatami", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_at_ibmatami_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 6000000, + .max_bus = 8000000, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 256, + .max = 15872, + .step = 128 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Uses Commodore (CBM) KBC firmware, to be implemented as identical to the IBM AT KBC firmware unless evidence emerges of any proprietary commands. */ - { "[ISA] Commodore PC 30 III", "cmdpc30", MACHINE_TYPE_286, MACHINE_CHIPSET_PROPRIETARY, machine_at_cmdpc_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 640, 16384, 128, 127, NULL, NULL }, + { + .name = "[ISA] Commodore PC 30 III", + .internal_name = "cmdpc30", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_at_cmdpc_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 640, + .max = 16384, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Uses Compaq KBC firmware. */ - { "[ISA] Compaq Portable II", "portableii", MACHINE_TYPE_286, MACHINE_CHIPSET_PROPRIETARY, machine_at_portableii_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 640, 16384, 128, 127, NULL, NULL }, + { + .name = "[ISA] Compaq Portable II", + .internal_name = "portableii", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_at_portableii_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 640, + .max = 16384, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Uses Compaq KBC firmware. */ - { "[ISA] Compaq Portable III", "portableiii", MACHINE_TYPE_286, MACHINE_CHIPSET_PROPRIETARY, machine_at_portableiii_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_VIDEO, 640, 16384, 128, 127, at_cpqiii_get_device, NULL }, + { + .name = "[ISA] Compaq Portable III", + .internal_name = "portableiii", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_at_portableiii_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_VIDEO, + .ram = { + .min = 640, + .max = 16384, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &compaq_plasma_device, + .vid_device = NULL + }, /* Has IBM AT KBC firmware. */ - { "[ISA] MR BIOS 286 clone", "mr286", MACHINE_TYPE_286, MACHINE_CHIPSET_DISCRETE, machine_at_mr286_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_IDE, 512, 16384, 128, 127, NULL, NULL }, + { + .name = "[ISA] MR BIOS 286 clone", + .internal_name = "mr286", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_at_mr286_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_IDE, + .ram = { + .min = 512, + .max = 16384, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM AT KBC firmware. */ - { "[ISA] NCR PC8/810/710/3390/3392", "pc8", MACHINE_TYPE_286, MACHINE_CHIPSET_DISCRETE, machine_at_pc8_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 512, 16384, 128, 127, NULL, NULL }, + { + .name = "[ISA] NCR PC8/810/710/3390/3392", + .internal_name = "pc8", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_at_pc8_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 512, + .max = 16384, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, #if defined(DEV_BRANCH) && defined(USE_OLIVETTI) /* Has Olivetti KBC firmware. */ - { "[ISA] Olivetti M290", "m290", MACHINE_TYPE_286, MACHINE_CHIPSET_PROPRIETARY, machine_at_m290_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 640, 16384, 128, 127, NULL, NULL }, + { + .name = "[ISA] Olivetti M290", + .internal_name = "m290", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_at_m290_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 640, + .max = 16384, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, #endif #if defined(DEV_BRANCH) && defined(USE_OPEN_AT) /* Has IBM AT KBC firmware. */ - { "[ISA] OpenAT", "openat", MACHINE_TYPE_286, MACHINE_CHIPSET_DISCRETE, machine_at_openat_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 256, 15872, 128, 63, NULL, NULL }, + { + .name = "[ISA] OpenAT", + .internal_name = "openat", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_at_openat_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 256, + .max = 15872, + .step = 128 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, #endif /* Has IBM AT KBC firmware. */ - { "[ISA] Phoenix IBM AT", "ibmatpx", MACHINE_TYPE_286, MACHINE_CHIPSET_DISCRETE, machine_at_ibmatpx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 6000000, 8000000, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 256, 15872, 128, 63, NULL, NULL }, + { + .name = "[ISA] Phoenix IBM AT", + .internal_name = "ibmatpx", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_at_ibmatpx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 6000000, + .max_bus = 8000000, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 256, + .max = 15872, + .step = 128 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has Quadtel KBC firmware. */ - { "[ISA] Quadtel IBM AT", "ibmatquadtel", MACHINE_TYPE_286, MACHINE_CHIPSET_DISCRETE, machine_at_ibmatquadtel_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 6000000, 8000000, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 256, 15872, 128, 63, NULL, NULL }, + { + .name = "[ISA] Quadtel IBM AT", + .internal_name = "ibmatquadtel", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_at_ibmatquadtel_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 6000000, + .max_bus = 8000000, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 256, + .max = 15872, + .step = 128 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has a Siemens proprietary KBC which is completely undocumented. */ - { "[ISA] Siemens PCD-2L", "siemens", MACHINE_TYPE_286, MACHINE_CHIPSET_DISCRETE, machine_at_siemens_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 256, 15872, 128, 63, NULL, NULL }, + { + .name = "[ISA] Siemens PCD-2L", + .internal_name = "siemens", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_at_siemens_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 256, + .max = 15872, + .step = 128 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has Toshiba's proprietary KBC, which is already implemented. */ - { "[ISA] Toshiba T3100e", "t3100e", MACHINE_TYPE_286, MACHINE_CHIPSET_PROPRIETARY, machine_at_t3100e_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_IDE | MACHINE_VIDEO_FIXED, 1024, 5120, 256, 63, NULL, NULL }, + { + .name = "[ISA] Toshiba T3100e", + .internal_name = "t3100e", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_at_t3100e_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_IDE | MACHINE_VIDEO_FIXED, + .ram = { + .min = 1024, + .max = 5120, + .step = 256 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has Quadtel KBC firmware. */ - { "[GC103] Quadtel 286 clone", "quadt286", MACHINE_TYPE_286, MACHINE_CHIPSET_GC103, machine_at_quadt286_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 512, 16384, 128, 127, NULL, NULL }, + { + .name = "[GC103] Quadtel 286 clone", + .internal_name = "quadt286", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_GC103, + .init = machine_at_quadt286_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 512, + .max = 16384, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Most likely has AMI 'F' KBC firmware. */ - { "[GC103] TriGem 286M", "tg286m", MACHINE_TYPE_286, MACHINE_CHIPSET_GC103, machine_at_tg286m_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_IDE, 512, 8192, 128, 127, NULL, NULL }, + { + .name = "[GC103] TriGem 286M", + .internal_name = "tg286m", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_GC103, + .init = machine_at_tg286m_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_IDE, + .ram = { + .min = 512, + .max = 8192, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has "AMI KEYBOARD BIOS", most likely 'F'. */ - { "[NEAT] DataExpert 286", "ami286", MACHINE_TYPE_286, MACHINE_CHIPSET_NEAT, machine_at_neat_ami_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 512, 8192, 128, 127, NULL, NULL }, + { + .name = "[NEAT] DataExpert 286", + .internal_name = "ami286", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_NEAT, + .init = machine_at_neat_ami_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 512, + .max = 8192, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM AT KBC firmware. */ - { "[NEAT] NCR 3302", "3302", MACHINE_TYPE_286, MACHINE_CHIPSET_NEAT, machine_at_3302_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_VIDEO, 512, 16384, 128, 127, NULL, NULL }, + { + .name = "[NEAT] NCR 3302", + .internal_name = "3302", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_NEAT, + .init = machine_at_3302_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_VIDEO, + .ram = { + .min = 512, + .max = 16384, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM AT KBC firmware. */ - { "[NEAT] Phoenix 286 clone", "px286", MACHINE_TYPE_286, MACHINE_CHIPSET_NEAT, machine_at_px286_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 512, 16384, 128, 127, NULL, NULL }, + { + .name = "[NEAT] Phoenix 286 clone", + .internal_name = "px286", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_NEAT, + .init = machine_at_px286_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 512, + .max = 16384, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has Chips & Technologies KBC firmware. */ - { "[SCAT] GW-286CT GEAR", "gw286ct", MACHINE_TYPE_286, MACHINE_CHIPSET_SCAT, machine_at_gw286ct_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_IDE, 512, 16384, 128, 127, NULL, NULL }, + { + .name = "[SCAT] GW-286CT GEAR", + .internal_name = "gw286ct", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_SCAT, + .init = machine_at_gw286ct_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_IDE, + .ram = { + .min = 512, + .max = 16384, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[SCAT] Goldstar GDC-212M", "gdc212m", MACHINE_TYPE_286, MACHINE_CHIPSET_SCAT, machine_at_gdc212m_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE, 512, 4096, 512, 127, NULL, NULL }, + { + .name = "[SCAT] Goldstar GDC-212M", + .internal_name = "gdc212m", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_SCAT, + .init = machine_at_gdc212m_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE, + .ram = { + .min = 512, + .max = 4096, + .step = 512 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a VIA VT82C42N KBC. */ - { "[SCAT] Hyundai Solomon 286KP", "award286", MACHINE_TYPE_286, MACHINE_CHIPSET_SCAT, machine_at_award286_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 512, 16384, 128, 127, NULL, NULL }, + { + .name = "[SCAT] Hyundai Solomon 286KP", + .internal_name = "award286", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_SCAT, + .init = machine_at_award286_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 512, + .max = 16384, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a VIA VT82C42N KBC. */ - { "[SCAT] Hyundai Super-286TR", "super286tr", MACHINE_TYPE_286, MACHINE_CHIPSET_SCAT, machine_at_super286tr_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 512, 16384, 128, 127, NULL, NULL }, + { + .name = "[SCAT] Hyundai Super-286TR", + .internal_name = "super286tr", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_SCAT, + .init = machine_at_super286tr_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 512, + .max = 16384, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[SCAT] Samsung SPC-4200P", "spc4200p", MACHINE_TYPE_286, MACHINE_CHIPSET_SCAT, machine_at_spc4200p_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_FLAGS_NONE, 512, 2048, 128, 127, NULL, NULL }, + { + .name = "[SCAT] Samsung SPC-4200P", + .internal_name = "spc4200p", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_SCAT, + .init = machine_at_spc4200p_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 512, + .max = 2048, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[SCAT] Samsung SPC-4216P", "spc4216p", MACHINE_TYPE_286, MACHINE_CHIPSET_SCAT, machine_at_spc4216p_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_FLAGS_NONE, 1024, 5120,1024, 127, NULL, NULL }, + { + .name = "[SCAT] Samsung SPC-4216P", + .internal_name = "spc4216p", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_SCAT, + .init = machine_at_spc4216p_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 1024, + .max = 5120, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[SCAT] Samsung SPC-4620P", "spc4620p", MACHINE_TYPE_286, MACHINE_CHIPSET_SCAT, machine_at_spc4620p_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_VIDEO, 1024, 5120,1024, 127, NULL, NULL }, + { + .name = "[SCAT] Samsung SPC-4620P", + .internal_name = "spc4620p", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_SCAT, + .init = machine_at_spc4620p_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 5120, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM AT KBC firmware. */ - { "[SCAT] Samsung Deskmaster 286", "deskmaster286", MACHINE_TYPE_286, MACHINE_CHIPSET_SCAT, machine_at_deskmaster286_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 512, 16384, 128, 127, NULL, NULL }, + { + .name = "[SCAT] Samsung Deskmaster 286", + .internal_name = "deskmaster286", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_SCAT, + .init = machine_at_deskmaster286_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 512, + .max = 16384, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 286 machines that utilize the MCA bus */ /* Has IBM PS/2 Type 2 KBC firmware. */ - { "[MCA] IBM PS/2 model 50", "ibmps2_m50", MACHINE_TYPE_286, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_50_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286 | CPU_PKG_486SLC_IBM, CPU_BLOCK_NONE, 10000000, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 1024, 10240, 1024, 63, NULL, NULL }, + { + .name = "[MCA] IBM PS/2 model 50", + .internal_name = "ibmps2_m50", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_ps2_model_50_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286 | CPU_PKG_486SLC_IBM, + .block = CPU_BLOCK_NONE, + .min_bus = 10000000, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_MCA, + .flags = MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 10240, + .step = 1024 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 2 KBC firmware. */ - { "[MCA] IBM PS/2 model 60", "ibmps2_m60", MACHINE_TYPE_286, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_60_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_286 | CPU_PKG_486SLC_IBM, CPU_BLOCK_NONE, 10000000, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 1024, 10240, 1024, 63, NULL, NULL }, + { + .name = "[MCA] IBM PS/2 model 60", + .internal_name = "ibmps2_m60", + .type = MACHINE_TYPE_286, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_ps2_model_60_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_286 | CPU_PKG_486SLC_IBM, + .block = CPU_BLOCK_NONE, + .min_bus = 10000000, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_MCA, + .flags = MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 10240, + .step = 1024 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 386SX machines */ /* ISA slots available because an official IBM expansion for that existed. */ /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[ISA] IBM PS/1 model 2121", "ibmps1_2121", MACHINE_TYPE_386SX, MACHINE_CHIPSET_PROPRIETARY, machine_ps1_m2121_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE | MACHINE_VIDEO, 2048, 6144,1024, 63, NULL, NULL }, + { + .name = "[ISA] IBM PS/1 model 2121", + .internal_name = "ibmps1_2121", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_ps1_m2121_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE | MACHINE_VIDEO, + .ram = { + .min = 2048, + .max = 6144, + .step = 1024 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM AT KBC firmware. */ - { "[ISA] NCR PC916SX", "pc916sx", MACHINE_TYPE_386SX, MACHINE_CHIPSET_DISCRETE, machine_at_pc916sx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 1024, 16384, 128, 127, NULL, NULL }, + { + .name = "[ISA] NCR PC916SX", + .internal_name = "pc916sx", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_at_pc916sx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 1024, + .max = 16384, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has Quadtel KBC firmware. */ - { "[ISA] QTC-SXM KT X20T02/HI", "quadt386sx", MACHINE_TYPE_386SX, MACHINE_CHIPSET_DISCRETE, machine_at_quadt386sx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 1024, 16384, 128, 127, NULL, NULL }, + { + .name = "[ISA] QTC-SXM KT X20T02/HI", + .internal_name = "quadt386sx", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_at_quadt386sx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 1024, + .max = 16384, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[ALi M1217] Acrosser AR-B1374", "arb1374", MACHINE_TYPE_386SX, MACHINE_CHIPSET_ALI_M1217, machine_at_arb1374_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE, 1024, 32768,1024, 127, NULL, NULL }, + { + .name = "[ALi M1217] Acrosser AR-B1374", + .internal_name = "arb1374", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_ALI_M1217, + .init = machine_at_arb1374_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 32768, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has the AMIKey KBC firmware, which is an updated 'F' type. */ - { "[ALi M1217] AAEON SBC-350A", "sbc350a", MACHINE_TYPE_386SX, MACHINE_CHIPSET_ALI_M1217, machine_at_sbc350a_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE, 1024, 16384, 1024, 127, NULL, NULL }, + { + .name = "[ALi M1217] AAEON SBC-350A", + .internal_name = "sbc350a", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_ALI_M1217, + .init = machine_at_sbc350a_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 16384, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has an AMI KBC firmware, the only photo of this is too low resolution for me to read what's on the KBC chip, so I'm going to assume AMI 'F' based on the other known HT18 AMI BIOS strings. */ - { "[ALi M1217] Flytech 386", "flytech386", MACHINE_TYPE_386SX, MACHINE_CHIPSET_ALI_M1217, machine_at_flytech386_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE | MACHINE_VIDEO, 1024, 16384, 1024, 127, at_flytech386_get_device, NULL }, + { + .name = "[ALi M1217] Flytech 386", + .internal_name = "flytech386", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_ALI_M1217, + .init = machine_at_flytech386_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE | MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 16384, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &tvga8900d_device, + .vid_device = NULL + }, /* I'm going to assume this has a standard/generic IBM-compatible AT KBC firmware until the board is identified. */ - { "[ALi M1217] MR BIOS 386SX clone", "mr1217", MACHINE_TYPE_386SX, MACHINE_CHIPSET_ALI_M1217, machine_at_mr1217_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE | MACHINE_VIDEO, 1024, 16384, 1024, 127, NULL, NULL }, + { + .name = "[ALi M1217] MR BIOS 386SX clone", + .internal_name = "mr1217", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_ALI_M1217, + .init = machine_at_mr1217_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE | MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 16384, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[ALi M6117] Acrosser PJ-A511M", "pja511m", MACHINE_TYPE_386SX, MACHINE_CHIPSET_ALI_M6117, machine_at_pja511m_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_M6117, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE, 1024, 32768, 1024, 127, NULL, NULL }, + { + .name = "[ALi M6117] Acrosser PJ-A511M", + .internal_name = "pja511m", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_ALI_M6117, + .init = machine_at_pja511m_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_M6117, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 32768, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[ALi M6117] Protech ProX-1332", "prox1332", MACHINE_TYPE_386SX, MACHINE_CHIPSET_ALI_M6117, machine_at_prox1332_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_M6117, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE, 1024, 32768, 1024, 127, NULL, NULL }, + { + .name = "[ALi M6117] Protech ProX-1332", + .internal_name = "prox1332", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_ALI_M6117, + .init = machine_at_prox1332_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_M6117, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 32768, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has an AMI KBC firmware, the only photo of this is too low resolution for me to read what's on the KBC chip, so I'm going to assume AMI 'F' based on the other known HT18 AMI BIOS strings. */ - { "[HT18] AMA-932J", "ama932j", MACHINE_TYPE_386SX, MACHINE_CHIPSET_HT18, machine_at_ama932j_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_IDE | MACHINE_VIDEO, 512, 8192, 128, 127, at_ama932j_get_device, NULL }, + { + .name = "[HT18] AMA-932J", + .internal_name = "ama932j", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_HT18, + .init = machine_at_ama932j_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_IDE | MACHINE_VIDEO, + .ram = { + .min = 512, + .max = 8192, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &oti067_ama932j_device, + .vid_device = NULL + }, /* Has an unknown KBC firmware with commands B8 and BB in the style of Phoenix MultiKey and AMIKey-3(!), but also commands E1 and EA with unknown functions. */ - { "[Intel 82335] ADI 386SX", "adi386sx", MACHINE_TYPE_386SX, MACHINE_CHIPSET_INTEL_82335, machine_at_adi386sx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 512, 8192, 128, 127, NULL, NULL }, + { + .name = "[Intel 82335] ADI 386SX", + .internal_name = "adi386sx", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_INTEL_82335, + .init = machine_at_adi386sx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 512, + .max = 8192, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has an AMI Keyboard BIOS PLUS KBC firmware ('8'). */ - { "[Intel 82335] Shuttle 386SX", "shuttle386sx", MACHINE_TYPE_386SX, MACHINE_CHIPSET_INTEL_82335, machine_at_shuttle386sx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 512, 8192, 128, 127, NULL, NULL }, + { .name = "[Intel 82335] Shuttle 386SX", + .internal_name = "shuttle386sx", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_INTEL_82335, + .init = machine_at_shuttle386sx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 512, + .max = 8192, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Uses Commodore (CBM) KBC firmware, to be implemented as identical to the IBM PS/2 Type 1 KBC firmware unless evidence emerges of any proprietary commands. */ - { "[NEAT] Commodore SL386SX-16", "cmdsl386sx16", MACHINE_TYPE_386SX, MACHINE_CHIPSET_NEAT, machine_at_cmdsl386sx16_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE, 1024, 8192, 512, 127, NULL, NULL }, + { + .name = "[NEAT] Commodore SL386SX-16", + .internal_name = "cmdsl386sx16", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_NEAT, + .init = machine_at_cmdsl386sx16_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 8192, + .step = 512 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM AT KBC firmware. */ - { "[NEAT] DTK 386SX clone", "dtk386", MACHINE_TYPE_386SX, MACHINE_CHIPSET_NEAT, machine_at_neat_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 512, 8192, 128, 127, NULL, NULL }, + { + .name = "[NEAT] DTK 386SX clone", + .internal_name = "dtk386", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_NEAT, + .init = machine_at_neat_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 512, + .max = 8192, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM AT KBC firmware. */ - { "[OPTi 291] DTK PPM-3333P", "awardsx", MACHINE_TYPE_386SX, MACHINE_CHIPSET_OPTI_291, machine_at_awardsx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 1024, 16384, 1024, 127, NULL, NULL }, + { + .name = "[OPTi 291] DTK PPM-3333P", + .internal_name = "awardsx", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_OPTI_291, + .init = machine_at_awardsx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 1024, + .max = 16384, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Uses Commodore (CBM) KBC firmware, to be implemented as identical to the IBM PS/2 Type 1 KBC firmware unless evidence emerges of any proprietary commands. */ - { "[SCAMP] Commodore SL386SX-25", "cmdsl386sx25", MACHINE_TYPE_386SX, MACHINE_CHIPSET_VLSI_SCAMP, machine_at_cmdsl386sx25_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE | MACHINE_VIDEO, 1024, 8192, 512, 127, at_cmdsl386sx25_get_device, NULL }, + { + .name = "[SCAMP] Commodore SL386SX-25", + .internal_name = "cmdsl386sx25", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_VLSI_SCAMP, + .init = machine_at_cmdsl386sx25_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE | MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 8192, + .step = 512 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &gd5402_onboard_device, + .vid_device = NULL + }, /* The closest BIOS string I find to this one's, differs only in one part, and ends in -8, so I'm going to assume that this, too, has an AMI '8' (AMI Keyboard BIOS Plus) KBC firmware. */ - { "[SCAMP] DataExpert 386SX", "dataexpert386sx", MACHINE_TYPE_386SX, MACHINE_CHIPSET_VLSI_SCAMP, machine_at_dataexpert386sx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 10000000, 25000000, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 1024, 16384, 1024, 127, NULL, NULL }, + { + .name = "[SCAMP] DataExpert 386SX", + .internal_name = "dataexpert386sx", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_VLSI_SCAMP, + .init = machine_at_dataexpert386sx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 10000000, + .max_bus = 25000000, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 1024, + .max = 16384, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[SCAMP] Samsung SPC-6033P", "spc6033p", MACHINE_TYPE_386SX, MACHINE_CHIPSET_VLSI_SCAMP, machine_at_spc6033p_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE | MACHINE_VIDEO, 2048, 12288, 2048, 127, at_spc6033p_get_device, NULL }, + { + .name = "[SCAMP] Samsung SPC-6033P", + .internal_name = "spc6033p", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_VLSI_SCAMP, + .init = machine_at_spc6033p_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE | MACHINE_VIDEO, + .ram = { + .min = 2048, + .max = 12288, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &ati28800k_spc6033p_device, + .vid_device = NULL + }, /* Has an unknown AMI KBC firmware, I'm going to assume 'F' until a photo or real hardware BIOS string is found. */ - { "[SCAT] KMX-C-02", "kmxc02", MACHINE_TYPE_386SX, MACHINE_CHIPSET_SCAT, machine_at_kmxc02_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 512, 16384, 512, 127, NULL, NULL }, + { + .name = "[SCAT] KMX-C-02", + .internal_name = "kmxc02", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_SCAT, + .init = machine_at_kmxc02_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 512, + .max = 16384, + .step = 512 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has Quadtel KBC firmware. */ - { "[WD76C10] Amstrad MegaPC", "megapc", MACHINE_TYPE_386SX, MACHINE_CHIPSET_WD76C10, machine_at_wd76c10_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE | MACHINE_VIDEO, 1024, 32768, 1024, 127, NULL, NULL }, + { + .name = "[WD76C10] Amstrad MegaPC", + .internal_name = "megapc", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_WD76C10, + .init = machine_at_wd76c10_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE | MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 32768, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 386SX machines which utilize the MCA bus */ /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[MCA] IBM PS/2 model 55SX", "ibmps2_m55sx", MACHINE_TYPE_386SX, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_55sx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 1024, 8192, 1024, 63, NULL, NULL }, + { + .name = "[MCA] IBM PS/2 model 55SX", + .internal_name = "ibmps2_m55sx", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_ps2_model_55sx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_MCA, + .flags = MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 8192, + .step = 1024 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[MCA] IBM PS/2 model 65SX", "ibmps2_m65sx", MACHINE_TYPE_386SX, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_65sx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386SX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 1024, 8192, 1024, 63, NULL, NULL }, + { + .name = "[MCA] IBM PS/2 model 65SX", + .internal_name = "ibmps2_m65sx", + .type = MACHINE_TYPE_386SX, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_ps2_model_65sx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386SX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_MCA, + .flags = MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 8192, + .step = 1024 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 486SLC machines */ /* 486SLC machines with just the ISA slot */ /* Has AMIKey H KBC firmware. */ - { "[OPTi 283] RYC Leopard LX", "rycleopardlx", MACHINE_TYPE_486SLC, MACHINE_CHIPSET_OPTI_283, machine_at_rycleopardlx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_486SLC_IBM, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 1024, 16384, 1024, 127, NULL, NULL }, + { + .name = "[OPTi 283] RYC Leopard LX", + .internal_name = "rycleopardlx", + .type = MACHINE_TYPE_486SLC, + .chipset = MACHINE_CHIPSET_OPTI_283, + .init = machine_at_rycleopardlx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_486SLC_IBM, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 1024, + .max = 16384, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 386DX machines */ - { "[ACC 2168] AMI 386DX clone", "acc386", MACHINE_TYPE_386DX, MACHINE_CHIPSET_ACC_2168, machine_at_acc386_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 1024, 16384, 1024, 127, NULL, NULL }, + { + .name = "[ACC 2168] AMI 386DX clone", + .internal_name = "acc386", + .type = MACHINE_TYPE_386DX, + .chipset = MACHINE_CHIPSET_ACC_2168, + .init = machine_at_acc386_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386DX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 1024, + .max = 16384, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has an AMI Keyboard BIOS PLUS KBC firmware ('8'). */ - { "[C&T 386] ECS 386/32", "ecs386", MACHINE_TYPE_386DX, MACHINE_CHIPSET_CT_386, machine_at_ecs386_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 1024, 16384, 1024, 127, NULL, NULL }, + { + .name = "[C&T 386] ECS 386/32", + .internal_name = "ecs386", + .type = MACHINE_TYPE_386DX, + .chipset = MACHINE_CHIPSET_CT_386, + .init = machine_at_ecs386_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386DX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 1024, + .max = 16384, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM AT KBC firmware. */ - { "[C&T 386] Samsung SPC-6000A", "spc6000a", MACHINE_TYPE_386DX, MACHINE_CHIPSET_CT_386, machine_at_spc6000a_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_IDE, 1024, 32768, 1024, 127, NULL, NULL }, + { + .name = "[C&T 386] Samsung SPC-6000A", + .internal_name = "spc6000a", + .type = MACHINE_TYPE_386DX, + .chipset = MACHINE_CHIPSET_CT_386, + .init = machine_at_spc6000a_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386DX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 32768, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Uses Compaq KBC firmware. */ #if defined(DEV_BRANCH) && defined(USE_DESKPRO386) - { "[ISA] Compaq Deskpro 386", "deskpro386", MACHINE_TYPE_386DX, MACHINE_CHIPSET_DISCRETE, machine_at_deskpro386_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_IDE, 1024, 14336, 1024, 127, NULL, NULL }, + { + .name = "[ISA] Compaq Deskpro 386", + .internal_name = "deskpro386", + .type = MACHINE_TYPE_386DX, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_at_deskpro386_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386DX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 14336, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, #endif - { "[ISA] Compaq Portable III (386)", "portableiii386", MACHINE_TYPE_386DX, MACHINE_CHIPSET_DISCRETE, machine_at_portableiii386_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_IDE | MACHINE_VIDEO, 1024, 14336, 1024, 127, at_cpqiii_get_device, NULL }, + { + .name = "[ISA] Compaq Portable III (386)", + .internal_name = "portableiii386", + .type = MACHINE_TYPE_386DX, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_at_portableiii386_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386DX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_IDE | MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 14336, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &compaq_plasma_device, + .vid_device = NULL + }, /* Has IBM AT KBC firmware. */ - { "[ISA] Micronics 09-00021", "micronics386", MACHINE_TYPE_386DX, MACHINE_CHIPSET_DISCRETE, machine_at_micronics386_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 512, 8192, 128, 127, NULL, NULL }, + { + .name = "[ISA] Micronics 09-00021", + .internal_name = "micronics386", + .type = MACHINE_TYPE_386DX, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_at_micronics386_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386DX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 512, + .max = 8192, + .step = 128 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMIKey F KBC firmware. */ - { "[SiS 310] ASUS ISA-386C", "asus386", MACHINE_TYPE_386DX, MACHINE_CHIPSET_SIS_310, machine_at_asus386_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[SiS 310] ASUS ISA-386C", + .internal_name = "asus386", + .type = MACHINE_TYPE_386DX, + .chipset = MACHINE_CHIPSET_SIS_310, + .init = machine_at_asus386_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386DX, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 386DX machines which utilize the MCA bus */ /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[MCA] IBM PS/2 model 80 (type 2)", "ibmps2_m80", MACHINE_TYPE_386DX, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_80_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX | CPU_PKG_486BL, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 1024, 65536, 1024, 63, NULL, NULL }, + { + .name = "[MCA] IBM PS/2 model 80 (type 2)", + .internal_name = "ibmps2_m80", + .type = MACHINE_TYPE_386DX, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_ps2_model_80_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386DX | CPU_PKG_486BL, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_MCA, + .flags = MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 386DX/486 machines */ /* The BIOS sends commands C9 without a parameter and D5, both of which are Phoenix MultiKey commands. */ - { "[OPTi 495] Award 486 clone", "award495", MACHINE_TYPE_386DX_486, MACHINE_CHIPSET_OPTI_495, machine_at_opti495_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX | CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_IDE, 1024, 32768, 1024, 127, NULL, NULL }, + { + .name = "[OPTi 495] Award 486 clone", + .internal_name = "award495", + .type = MACHINE_TYPE_386DX_486, + .chipset = MACHINE_CHIPSET_OPTI_495, + .init = machine_at_opti495_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386DX | CPU_PKG_SOCKET1, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 32768, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMIKey F KBC firmware. */ - { "[OPTi 495] DataExpert SX495", "ami495", MACHINE_TYPE_386DX_486, MACHINE_CHIPSET_OPTI_495, machine_at_opti495_ami_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX | CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_IDE, 1024, 32768, 1024, 127, NULL, NULL }, + { + .name = "[OPTi 495] DataExpert SX495", + .internal_name = "ami495", + .type = MACHINE_TYPE_386DX_486, + .chipset = MACHINE_CHIPSET_OPTI_495, + .init = machine_at_opti495_ami_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386DX | CPU_PKG_SOCKET1, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 32768, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMIKey F KBC firmware (it's just the MR BIOS for the above machine). */ - { "[OPTi 495] DataExpert SX495 (MR BIOS)", "mr495", MACHINE_TYPE_386DX_486, MACHINE_CHIPSET_OPTI_495, machine_at_opti495_mr_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX | CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_IDE, 1024, 32768, 1024, 127, NULL, NULL }, + { + .name = "[OPTi 495] DataExpert SX495 (MR BIOS)", + .internal_name = "mr495", + .type = MACHINE_TYPE_386DX_486, + .chipset = MACHINE_CHIPSET_OPTI_495, + .init = machine_at_opti495_mr_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386DX | CPU_PKG_SOCKET1, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 32768, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[MCA] IBM PS/2 model 70 (type 3)", "ibmps2_m70_type3", MACHINE_TYPE_386DX_486, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_70_type3_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX | CPU_PKG_486BL | CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 2048, 65536, 2048, 63, NULL, NULL }, + { + .name = "[MCA] IBM PS/2 model 70 (type 3)", + .internal_name = "ibmps2_m70_type3", + .type = MACHINE_TYPE_386DX_486, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_ps2_model_70_type3_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386DX | CPU_PKG_486BL | CPU_PKG_SOCKET1, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .flags = MACHINE_PS2_MCA, + .bus_flags = MACHINE_VIDEO, + .ram = { + .min = 2048, + .max = 65536, + .step = 2048 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[MCA] IBM PS/2 model 80 (type 3)", "ibmps2_m80_type3", MACHINE_TYPE_386DX_486, MACHINE_CHIPSET_PROPRIETARY, machine_ps2_model_80_axx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_386DX | CPU_PKG_486BL | CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_MCA, MACHINE_VIDEO, 2048, 65536, 2048, 63, NULL, NULL }, + { + .name = "[MCA] IBM PS/2 model 80 (type 3)", + .internal_name = "ibmps2_m80_type3", + .type = MACHINE_TYPE_386DX_486, + .chipset = MACHINE_CHIPSET_PROPRIETARY, + .init = machine_ps2_model_80_axx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_386DX | CPU_PKG_486BL | CPU_PKG_SOCKET1, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_MCA, + .flags = MACHINE_VIDEO, + .ram = { + .min = 2048, + .max = 65536, + .step = 2048 + }, + .nvrmask = 63, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 486 machines - Socket 1 */ /* Has JetKey 5 KBC Firmware which looks like it is a clone of AMIKey type F. @@ -422,161 +4198,2042 @@ const machine_t machines[] = { supposedly sends command EF. The board was also seen in 2003 with a -H string - perhaps someone swapped the KBC? */ - { "[ALi M1429] Olystar LIL1429", "ali1429", MACHINE_TYPE_486, MACHINE_CHIPSET_ALI_M1429, machine_at_ali1429_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_IDE, 1024, 32768, 1024, 127, NULL, NULL }, + { + .name = "[ALi M1429] Olystar LIL1429", + .internal_name = "ali1429", + .type = MACHINE_TYPE_486, + .chipset = MACHINE_CHIPSET_ALI_M1429, + .init = machine_at_ali1429_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET1, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 32768, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has JetKey 5 KBC Firmware - but the BIOS string ends in a hardcoded -F, and the BIOS also explicitly expects command A1 to return a 'F', so it looks like the JetKey 5 is a clone of AMIKey type F. */ - { "[CS4031] AMI 486 CS4031", "cs4031", MACHINE_TYPE_486, MACHINE_CHIPSET_CT_CS4031, machine_at_cs4031_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_FLAGS_NONE, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[CS4031] AMI 486 CS4031", + .internal_name = "cs4031", + .type = MACHINE_TYPE_486, + .chipset = MACHINE_CHIPSET_CT_CS4031, + .init = machine_at_cs4031_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET1, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Uses some variant of Phoenix MultiKey/42 as the Intel 8242 chip has a Phoenix copyright. */ - { "[OPTi 895] Mylex MVI486", "mvi486", MACHINE_TYPE_486, MACHINE_CHIPSET_OPTI_895_802G, machine_at_mvi486_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_IDE_DUAL, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[OPTi 895] Mylex MVI486", + .internal_name = "mvi486", + .type = MACHINE_TYPE_486, + .chipset = MACHINE_CHIPSET_OPTI_895_802G, + .init = machine_at_mvi486_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET1, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMI KF KBC firmware. */ - { "[SiS 401] ASUS ISA-486", "isa486", MACHINE_TYPE_486, MACHINE_CHIPSET_SIS_401, machine_at_isa486_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_IDE, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[SiS 401] ASUS ISA-486", + .internal_name = "isa486", + .type = MACHINE_TYPE_486, + .chipset = MACHINE_CHIPSET_SIS_401, + .init = machine_at_isa486_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET1, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMIKey H KBC firmware, per the screenshot in "How computers & MS-DOS work". */ - { "[SiS 401] Chaintech 433SC", "sis401", MACHINE_TYPE_486, MACHINE_CHIPSET_SIS_401, machine_at_sis401_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_IDE, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[SiS 401] Chaintech 433SC", + .internal_name = "sis401", + .type = MACHINE_TYPE_486, + .chipset = MACHINE_CHIPSET_SIS_401, + .init = machine_at_sis401_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET1, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMIKey F KBC firmware, per a photo of a monitor with the BIOS screen on eBay. */ - { "[SiS 460] ABIT AV4", "av4", MACHINE_TYPE_486, MACHINE_CHIPSET_SIS_460, machine_at_av4_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_IDE, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[SiS 460] ABIT AV4", + .internal_name = "av4", + .type = MACHINE_TYPE_486, + .chipset = MACHINE_CHIPSET_SIS_460, + .init = machine_at_av4_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET1, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a MR (!) KBC firmware, which is a clone of the standard IBM PS/2 KBC firmware. */ - { "[SiS 471] SiS VL-BUS 471 REV. A1", "px471", MACHINE_TYPE_486, MACHINE_CHIPSET_SIS_471, machine_at_px471_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_IDE, 1024, 131072, 1024, 127, NULL, NULL }, + { + .name = "[SiS 471] SiS VL-BUS 471 REV. A1", + .internal_name = "px471", + .type = MACHINE_TYPE_486, + .chipset = MACHINE_CHIPSET_SIS_471, + .init = machine_at_px471_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET1, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 131072, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* The chip is a Lance LT38C41, a clone of the Intel 8041, and the BIOS sends commands BC, BD, and C9 which exist on both AMIKey and Phoenix MultiKey/42, but it does not write a byte after C9, which is consistent with AMIKey, so this must have some form of AMIKey. */ - { "[VIA VT82C495] FIC 486-VC-HD", "486vchd", MACHINE_TYPE_486, MACHINE_CHIPSET_VIA_VT82C495, machine_at_486vchd_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_AT, MACHINE_FLAGS_NONE, 1024, 64512, 1024, 127, NULL, NULL }, + { + .name = "[VIA VT82C495] FIC 486-VC-HD", + .internal_name = "486vchd", + .type = MACHINE_TYPE_486, + .chipset = MACHINE_CHIPSET_VIA_VT82C495, + .init = machine_at_486vchd_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET1, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_AT, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 1024, + .max = 64512, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* According to Deksor on the Win3x.org forum, the BIOS string ends in a -0, indicating an unknown KBC firmware. But it does send the AMIKey get version command, so it must expect an AMIKey. */ - { "[VLSI 82C480] HP Vectra 486VL", "vect486vl", MACHINE_TYPE_486, MACHINE_CHIPSET_VLSI_VL82C480, machine_at_vect486vl_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE | MACHINE_VIDEO, 2048, 32768, 2048, 127, at_vect486vl_get_device, NULL }, + { + .name = "[VLSI 82C480] HP Vectra 486VL", + .internal_name = "vect486vl", + .type = MACHINE_TYPE_486, + .chipset = MACHINE_CHIPSET_VLSI_VL82C480, + .init = machine_at_vect486vl_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET1, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE | MACHINE_VIDEO, + .ram = { + .min = 2048, + .max = 32768, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &gd5428_onboard_device, + .vid_device = NULL + }, /* Has a standard IBM PS/2 KBC firmware or a clone thereof. */ - { "[VLSI 82C481] Siemens Nixdorf D824", "d824", MACHINE_TYPE_486, MACHINE_CHIPSET_VLSI_VL82C481, machine_at_d824_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET1, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE | MACHINE_VIDEO, 2048, 32768, 2048, 127, at_d824_get_device, NULL }, + { + .name = "[VLSI 82C481] Siemens Nixdorf D824", + .internal_name = "d824", + .type = MACHINE_TYPE_486, + .chipset = MACHINE_CHIPSET_VLSI_VL82C481, + .init = machine_at_d824_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET1, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE | MACHINE_VIDEO, + .ram = { + .min = 2048, + .max = 32768, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &gd5428_onboard_device, + .vid_device = NULL + }, /* 486 machines - Socket 2 */ /* 486 machines with just the ISA slot */ /* Uses some variant of Phoenix MultiKey/42 as the BIOS sends keyboard controller command C7 (OR input byte with received data byte). */ - { "[ACC 2168] Packard Bell PB410A", "pb410a", MACHINE_TYPE_486_S2, MACHINE_CHIPSET_ACC_2168, machine_at_pb410a_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE | MACHINE_VIDEO, 4096, 36864, 1024, 127, NULL, NULL }, + { + .name = "[ACC 2168] Packard Bell PB410A", + .internal_name = "pb410a", + .type = MACHINE_TYPE_486_S2, + .chipset = MACHINE_CHIPSET_ACC_2168, + .init = machine_at_pb410a_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE | MACHINE_VIDEO, + .ram = { + .min = 4096, + .max = 36864, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Uses an ACER/NEC 90M002A (UPD82C42C, 8042 clone) with unknown firmware (V4.01H). */ - { "[ALi M1429G] Acer A1G", "acera1g", MACHINE_TYPE_486_S2, MACHINE_CHIPSET_ALI_M1429G, machine_at_acera1g_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE_DUAL | MACHINE_VIDEO, 4096, 36864, 1024, 127, at_acera1g_get_device, NULL }, + { + .name = "[ALi M1429G] Acer A1G", + .internal_name = "acera1g", + .type = MACHINE_TYPE_486_S2, + .chipset = MACHINE_CHIPSET_ALI_M1429G, + .init = machine_at_acera1g_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE_DUAL | MACHINE_VIDEO, + .ram = { + .min = 4096, + .max = 36864, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &gd5428_onboard_device, + .vid_device = NULL + }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[ALi M1429G] Kaimei SA-486 VL-BUS M.B.", "win486", MACHINE_TYPE_486_S2, MACHINE_CHIPSET_ALI_M1429G, machine_at_winbios1429_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_IDE, 1024, 32768, 1024, 127, NULL, NULL }, + { + .name = "[ALi M1429G] Kaimei SA-486 VL-BUS M.B.", + .internal_name = "win486", + .type = MACHINE_TYPE_486_S2, + .chipset = MACHINE_CHIPSET_ALI_M1429G, + .init = machine_at_winbios1429_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 32768, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Uses an Intel KBC with Phoenix MultiKey KBC firmware. */ - { "[SiS 461] DEC DECpc LPV", "decpclpv", MACHINE_TYPE_486_S2, MACHINE_CHIPSET_SIS_461, machine_at_decpclpv_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE_DUAL | MACHINE_VIDEO, 1024, 32768, 1024, 127, NULL, NULL }, + { + .name = "[SiS 461] DEC DECpc LPV", + .internal_name = "decpclpv", + .type = MACHINE_TYPE_486_S2, + .chipset = MACHINE_CHIPSET_SIS_461, + .init = machine_at_decpclpv_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE_DUAL | MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 32768, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Uses an NEC 90M002A (UPD82C42C, 8042 clone) with unknown firmware. */ - { "[SiS 461] Acer V10", "acerv10", MACHINE_TYPE_486_S2, MACHINE_CHIPSET_SIS_461, machine_at_acerv10_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE_DUAL | MACHINE_VIDEO, 1024, 32768, 1024, 127, NULL, NULL }, + { + .name = "[SiS 461] Acer V10", + .internal_name = "acerv10", + .type = MACHINE_TYPE_486_S2, + .chipset = MACHINE_CHIPSET_SIS_461, + .init = machine_at_acerv10_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE_DUAL | MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 32768, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* The BIOS does not send any non-standard keyboard controller commands and wants a PS/2 mouse, so it's an IBM PS/2 KBC (Type 1) firmware. */ - { "[SiS 461] IBM PS/ValuePoint 433DX/Si", "valuepoint433", MACHINE_TYPE_486_S2, MACHINE_CHIPSET_SIS_461, machine_at_valuepoint433_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2, MACHINE_IDE | MACHINE_VIDEO, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[SiS 461] IBM PS/ValuePoint 433DX/Si", + .internal_name = "valuepoint433", + .type = MACHINE_TYPE_486_S2, + .chipset = MACHINE_CHIPSET_SIS_461, + .init = machine_at_valuepoint433_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2, + .flags = MACHINE_IDE | MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* The BIOS string ends in -U, unless command 0xA1 (AMIKey get version) returns an 'F', in which case, it ends in -F, so it has an AMIKey F KBC firmware. The photo of the board shows an AMIKey KBC which is indeed F. */ - { "[SiS 471] ABit AB-AH4", "win471", MACHINE_TYPE_486_S2, MACHINE_CHIPSET_SIS_471, machine_at_win471_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_IDE, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[SiS 471] ABit AB-AH4", + .internal_name = "win471", + .type = MACHINE_TYPE_486_S2, + .chipset = MACHINE_CHIPSET_SIS_471, + .init = machine_at_win471_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 486 machines - Socket 3 */ /* 486 machines with just the ISA slot */ /* Has AMI MegaKey KBC firmware. */ - { "[Contaq 82C597] Green-B", "greenb", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_CONTAQ_82C597, machine_at_greenb_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_FLAGS_NONE, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[Contaq 82C597] Green-B", + .internal_name = "greenb", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_CONTAQ_82C597, + .init = machine_at_greenb_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a VIA VT82C42N KBC. */ - { "[OPTi 895] Jetway J-403TG", "403tg", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_OPTI_895_802G, machine_at_403tg_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_FLAGS_NONE, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[OPTi 895] Jetway J-403TG", + .internal_name = "403tg", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_OPTI_895_802G, + .init = machine_at_403tg_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has JetKey 5 KBC Firmware which looks like it is a clone of AMIKey type F. */ - { "[OPTi 895] Jetway J-403TG Rev D", "403tg_d", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_OPTI_895_802G, machine_at_403tg_d_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_FLAGS_NONE, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[OPTi 895] Jetway J-403TG Rev D", + .internal_name = "403tg_d", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_OPTI_895_802G, + .init = machine_at_403tg_d_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has JetKey 5 KBC Firmware which looks like it is a clone of AMIKey type F. */ - { "[OPTi 895] Jetway J-403TG Rev D (MR BIOS)", "403tg_d_mr", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_OPTI_895_802G, machine_at_403tg_d_mr_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_FLAGS_NONE, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[OPTi 895] Jetway J-403TG Rev D (MR BIOS)", + .internal_name = "403tg_d_mr", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_OPTI_895_802G, + .init = machine_at_403tg_d_mr_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMIKey H keyboard BIOS. */ - { "[SiS 471] AOpen Vi15G", "vi15g", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_SIS_471, machine_at_vi15g_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_IDE, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[SiS 471] AOpen Vi15G", + .internal_name = "vi15g", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_SIS_471, + .init = machine_at_vi15g_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[SiS 471] ASUS VL/I-486SV2G (GX4)", "vli486sv2g", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_SIS_471, machine_at_vli486sv2g_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_VLB, MACHINE_IDE_DUAL, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[SiS 471] ASUS VL/I-486SV2G (GX4)", + .internal_name = "vli486sv2g", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_SIS_471, + .init = machine_at_vli486sv2g_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_VLB, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has JetKey 5 KBC Firmware which looks like it is a clone of AMIKey type F. */ - { "[SiS 471] DTK PKM-0038S E-2", "dtk486", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_SIS_471, machine_at_dtk486_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_IDE, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[SiS 471] DTK PKM-0038S E-2", + .internal_name = "dtk486", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_SIS_471, + .init = machine_at_dtk486_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Unknown Epox VLB Socket 3 board, has AMIKey F keyboard BIOS. */ - { "[SiS 471] Epox 486SX/DX Green", "ami471", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_SIS_471, machine_at_ami471_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_VLB, MACHINE_IDE, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[SiS 471] Epox 486SX/DX Green", + .internal_name = "ami471", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_SIS_471, + .init = machine_at_ami471_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 486 machines which utilize the PCI bus */ /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[ALi M1489] AAEON SBC-490", "sbc490", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_ALI_M1489, machine_at_sbc490_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL | MACHINE_VIDEO, 1024, 65536, 1024, 255, at_sbc490_get_device, NULL }, + { + .name = "[ALi M1489] AAEON SBC-490", + .internal_name = "sbc490", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_ALI_M1489, + .init = machine_at_sbc490_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL | MACHINE_VIDEO, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &tgui9440_onboard_pci_device, + .vid_device = NULL + }, /* Has the ALi M1487/9's on-chip keyboard controller which clones a standard AT KBC. */ - { "[ALi M1489] ABIT AB-PB4", "abpb4", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_ALI_M1489, machine_at_abpb4_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PCI, MACHINE_IDE_DUAL, 1024, 65536, 1024, 255, NULL, NULL }, + { + .name = "[ALi M1489] ABIT AB-PB4", + .internal_name = "abpb4", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_ALI_M1489, + .init = machine_at_abpb4_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has the ALi M1487/9's on-chip keyboard controller which clones a standard AT KBC. The BIOS string always ends in -U, but the BIOS will send AMIKey commands 0xCA and 0xCB if command 0xA1 returns a letter in the 0x5x or 0x7x ranges, so I'm going to give it an AMI 'U' KBC. */ - { "[ALi M1489] AMI WinBIOS 486 PCI", "win486pci", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_ALI_M1489, machine_at_win486pci_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PCI, MACHINE_IDE_DUAL, 1024, 65536, 1024, 255, NULL, NULL }, + { + .name = "[ALi M1489] AMI WinBIOS 486 PCI", + .internal_name = "win486pci", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_ALI_M1489, + .init = machine_at_win486pci_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has the ALi M1487/9's on-chip keyboard controller which clones a standard AT KBC. The known BIOS string ends in -E, and the BIOS returns whatever command 0xA1 returns (but only if command 0xA1 is instant response), so said ALi keyboard controller likely returns 'E'. */ - { "[ALi M1489] MSI MS-4145", "ms4145", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_ALI_M1489, machine_at_ms4145_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PCI, MACHINE_IDE_DUAL, 1024, 65536, 1024, 255, NULL, NULL }, + { + .name = "[ALi M1489] MSI MS-4145", + .internal_name = "ms4145", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_ALI_M1489, + .init = machine_at_ms4145_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has an ALi M5042 keyboard controller with Phoenix MultiKey/42 v1.40 firmware. */ - { "[ALi M1489] ESA TF-486", "tf486", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_ALI_M1489, machine_at_tf486_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 1024, 65536, 1024, 255, NULL, NULL }, + { + .name = "[ALi M1489] ESA TF-486", + .internal_name = "tf486", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_ALI_M1489, + .init = machine_at_tf486_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[OPTi 802G] IBM PC 330 (type 6573)", "pc330_6573", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_OPTI_895_802G, machine_at_pc330_6573_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3_PC330, CPU_BLOCK_NONE, 25000000, 33333333, 0, 0, 2.0, 3.0, MACHINE_PS2_PCI, MACHINE_IDE, 1024, 65536, 1024, 127, NULL, NULL }, + { + .name = "[OPTi 802G] IBM PC 330 (type 6573)", + .internal_name = "pc330_6573", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_OPTI_895_802G, + .init = machine_at_pc330_6573_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3_PC330, + .block = CPU_BLOCK_NONE, + .min_bus = 25000000, + .max_bus = 33333333, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 2.0, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[i420EX] ASUS PVI-486AP4", "486ap4", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_INTEL_420EX, machine_at_486ap4_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_PCIV, MACHINE_IDE_DUAL, 1024, 131072, 1024, 127, NULL, NULL }, + { + .name = "[i420EX] ASUS PVI-486AP4", + .internal_name = "486ap4", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_INTEL_420EX, + .init = machine_at_486ap4_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCIV, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 131072, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has the Phoenix MultiKey KBC firmware. */ - { "[i420EX] Intel Classic/PCI ED", "ninja", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_INTEL_420EX, machine_at_ninja_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 1024, 131072, 1024, 127, NULL, NULL }, + { + .name = "[i420EX] Intel Classic/PCI ED", + .internal_name = "ninja", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_INTEL_420EX, + .init = machine_at_ninja_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 131072, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* I'm going to assume this as an AMIKey-2 like the other two 486SP3's. */ - { "[i420TX] ASUS PCI/I-486SP3", "486sp3", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_INTEL_420TX, machine_at_486sp3_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PCI, MACHINE_IDE_DUAL | MACHINE_SCSI, 1024, 131072, 1024, 127, NULL, NULL }, + { + .name = "[i420TX] ASUS PCI/I-486SP3", + .internal_name = "486sp3", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_INTEL_420TX, + .init = machine_at_486sp3_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PCI, + .flags = MACHINE_IDE_DUAL | MACHINE_SCSI, + .ram = { + .min = 1024, + .max = 131072, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has the Phoenix MultiKey KBC firmware. */ - { "[i420TX] Intel Classic/PCI", "alfredo", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_INTEL_420TX, machine_at_alfredo_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 2048, 131072, 2048, 127, NULL, NULL }, + { + .name = "[i420TX] Intel Classic/PCI", + .internal_name = "alfredo", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_INTEL_420TX, + .init = machine_at_alfredo_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 2048, + .max = 131072, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has an AMIKey-2, which is an updated version of type 'H'. Also has a SST 29EE010 Flash chip. */ - { "[i420ZX] ASUS PCI/I-486SP3G", "486sp3g", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_INTEL_420ZX, machine_at_486sp3g_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL | MACHINE_SCSI, 1024, 131072, 1024, 127, NULL, NULL }, + { + .name = "[i420ZX] ASUS PCI/I-486SP3G", + .internal_name = "486sp3g", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_INTEL_420ZX, + .init = machine_at_486sp3g_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL | MACHINE_SCSI, + .ram = { + .min = 1024, + .max = 131072, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This most likely has a standalone AMI Megakey 1993, which is type 'P', like the below Tekram board. */ - { "[IMS 8848] J-Bond PCI400C-B", "pci400cb", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_IMS_8848, machine_at_pci400cb_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 2048, 131072, 2048, 127, NULL, NULL }, + { + .name = "[IMS 8848] J-Bond PCI400C-B", + .internal_name = "pci400cb", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_IMS_8848, + .init = machine_at_pci400cb_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 2048, + .max = 131072, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has a standalone AMI Megakey 1993, which is type 'P'. */ - { "[IMS 8848] Tekram G486IP", "g486ip", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_IMS_8848, machine_at_g486ip_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 2048, 131072, 2048, 127, NULL, NULL }, + { + .name = "[IMS 8848] Tekram G486IP", + .internal_name = "g486ip", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_IMS_8848, + .init = machine_at_g486ip_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 2048, + .max = 131072, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[SiS 496] ASUS PVI-486SP3C", "486sp3c", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_SIS_496, machine_at_486sp3c_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_PCIV, MACHINE_IDE_DUAL, 1024, 261120, 1024, 255, NULL, NULL }, + { + .name = "[SiS 496] ASUS PVI-486SP3C", + .internal_name = "486sp3c", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_SIS_496, + .init = machine_at_486sp3c_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCIV, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 261120, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[SiS 496] Lucky Star LS-486E", "ls486e", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_SIS_496, machine_at_ls486e_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PCI, MACHINE_IDE_DUAL, 1024, 131072, 1024, 255, NULL, NULL }, + { + .name = "[SiS 496] Lucky Star LS-486E", + .internal_name = "ls486e", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_SIS_496, + .init = machine_at_ls486e_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 131072, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* The BIOS does not send a single non-standard KBC command, so it has a standard PS/2 KBC. */ - { "[SiS 496] Micronics M4Li", "m4li", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_SIS_496, machine_at_m4li_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 1024, 131072, 1024, 127, NULL, NULL }, + { + .name = "[SiS 496] Micronics M4Li", + .internal_name = "m4li", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_SIS_496, + .init = machine_at_m4li_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 131072, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a BestKey KBC which clones AMI type 'H'. */ - { "[SiS 496] Rise Computer R418", "r418", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_SIS_496, machine_at_r418_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PCI, MACHINE_IDE_DUAL, 1024, 261120, 1024, 255, NULL, NULL }, + { + .name = "[SiS 496] Rise Computer R418", + .internal_name = "r418", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_SIS_496, + .init = machine_at_r418_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 261120, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has a Holtek KBC and the BIOS does not send a single non-standard KBC command, so it must be an ASIC that clones the standard IBM PS/2 KBC. */ - { "[SiS 496] Soyo 4SAW2", "4saw2", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_SIS_496, machine_at_4saw2_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_SOYO_4SAW2, 0, 0, 0, 0, 0, 0, MACHINE_PS2_PCIV, MACHINE_IDE_DUAL, 1024, 261120, 1024, 255, NULL, NULL }, + { + .name = "[SiS 496] Soyo 4SAW2", + .internal_name = "4saw2", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_SIS_496, + .init = machine_at_4saw2_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK(CPU_i486SX, CPU_i486DX, CPU_Am486SX, CPU_Am486DX), + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCIV, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 261120, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* According to MrKsoft, his real 4DPS has an AMIKey-2, which is an updated version of type 'H'. */ - { "[SiS 496] Zida Tomato 4DP", "4dps", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_SIS_496, machine_at_4dps_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 1024, 261120, 1024, 255, NULL, NULL }, + { + .name = "[SiS 496] Zida Tomato 4DP", + .internal_name = "4dps", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_SIS_496, + .init = machine_at_4dps_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 261120, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has the UMC 88xx on-chip KBC. */ - { "[UMC 8881] A-Trend ATC-1415", "atc1415", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_UMC_UM8881, machine_at_atc1415_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PCI, MACHINE_IDE_DUAL, 1024, 65536, 1024, 255, NULL, NULL }, + { + .name = "[UMC 8881] A-Trend ATC-1415", + .internal_name = "atc1415", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_UMC_UM8881, + .init = machine_at_atc1415_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[UMC 8881] ECS Elite UM8810PAIO", "ecs486", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_UMC_UM8881, machine_at_ecs486_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PCI, MACHINE_IDE_DUAL, 1024, 131072, 1024, 255, NULL, NULL }, + { + .name = "[UMC 8881] ECS Elite UM8810PAIO", + .internal_name = "ecs486", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_UMC_UM8881, + .init = machine_at_ecs486_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 131072, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMIKey Z(!) KBC firmware. */ - { "[UMC 8881] Epson Action PC 2600", "actionpc2600", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_UMC_UM8881, machine_at_actionpc2600_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PCI, MACHINE_IDE_DUAL, 1024, 262144, 1024, 255, NULL, NULL }, + { + .name = "[UMC 8881] Epson Action PC 2600", + .internal_name = "actionpc2600", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_UMC_UM8881, + .init = machine_at_actionpc2600_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 262144, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has the UMC 88xx on-chip KBC. All the copies of the BIOS string I can find, end in in -H, so the UMC on-chip KBC likely emulates the AMI 'H' KBC firmware. */ - { "[UMC 8881] PC Chips M919", "m919", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_UMC_UM8881, machine_at_m919_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PCIV, MACHINE_IDE_DUAL, 1024, 131072, 1024, 255, NULL, NULL }, + { + .name = "[UMC 8881] PC Chips M919", + .internal_name = "m919", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_UMC_UM8881, + .init = machine_at_m919_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PCIV, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 131072, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. Uses a mysterious I/O port C05. */ - { "[UMC 8881] Samsung SPC7700P-LW", "spc7700plw", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_UMC_UM8881, machine_at_spc7700plw_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 1024, 131072, 1024, 255, NULL, NULL }, + { + .name = "[UMC 8881] Samsung SPC7700P-LW", + .internal_name = "spc7700plw", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_UMC_UM8881, + .init = machine_at_spc7700plw_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 131072, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has a Holtek KBC. */ - { "[UMC 8881] Shuttle HOT-433A", "hot433", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_UMC_UM8881, machine_at_hot433_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PCI, MACHINE_IDE_DUAL, 1024, 262144, 1024, 255, NULL, NULL }, + { + .name = "[UMC 8881] Shuttle HOT-433A", + .internal_name = "hot433", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_UMC_UM8881, + .init = machine_at_hot433_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 262144, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a VIA VT82C406 KBC+RTC that likely has identical commands to the VT82C42N. */ - { "[VIA VT82C496G] DFI G486VPA", "g486vpa", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_VIA_VT82C496G, machine_at_g486vpa_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PCIV, MACHINE_IDE_DUAL, 1024, 131072, 1024, 255, NULL, NULL }, + { + .name = "[VIA VT82C496G] DFI G486VPA", + .internal_name = "g486vpa", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_VIA_VT82C496G, + .init = machine_at_g486vpa_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PCIV, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 131072, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a VIA VT82C42N KBC. */ - { "[VIA VT82C496G] FIC VIP-IO2", "486vipio2", MACHINE_TYPE_486_S3, MACHINE_CHIPSET_VIA_VT82C496G, machine_at_486vipio2_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET3, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_PS2_PCIV, MACHINE_IDE_DUAL, 1024, 131072, 1024, 255, NULL, NULL }, + { + .name = "[VIA VT82C496G] FIC VIP-IO2", + .internal_name = "486vipio2", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_VIA_VT82C496G, + .init = machine_at_486vipio2_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCIV, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 131072, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 486 machines - Miscellaneous */ /* 486 machines which utilize the PCI bus */ /* Has a Winbond W83977F Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[STPC Client] ITOX STAR", "itoxstar", MACHINE_TYPE_486_MISC, MACHINE_CHIPSET_STPC_CLIENT, machine_at_itoxstar_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_STPC, CPU_BLOCK_NONE, 66666667, 75000000, 0, 0, 1.0, 1.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 255, NULL, NULL }, + { + .name = "[STPC Client] ITOX STAR", + .internal_name = "itoxstar", + .type = MACHINE_TYPE_486_MISC, + .chipset = MACHINE_CHIPSET_STPC_CLIENT, + .init = machine_at_itoxstar_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_STPC, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 75000000, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 1.0, + .max_multi = 1.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a Winbond W83977F Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[STPC Consumer-II] Acrosser AR-B1423C", "arb1423c", MACHINE_TYPE_486_MISC, MACHINE_CHIPSET_STPC_CONSUMER_II, machine_at_arb1423c_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_STPC, CPU_BLOCK_NONE, 66666667, 66666667, 0, 0, 2.0, 2.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 32768, 163840, 8192, 255, NULL, NULL }, + { + .name = "[STPC Consumer-II] Acrosser AR-B1423C", + .internal_name = "arb1423c", + .type = MACHINE_TYPE_486_MISC, + .chipset = MACHINE_CHIPSET_STPC_CONSUMER_II, + .init = machine_at_arb1423c_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_STPC, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 66666667, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 2.0, + .max_multi = 2.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 32768, + .max = 163840, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a Winbond W83977F Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[STPC Consumer-II] Acrosser AR-B1479", "arb1479", MACHINE_TYPE_486_MISC, MACHINE_CHIPSET_STPC_CONSUMER_II, machine_at_arb1479_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_STPC, CPU_BLOCK_NONE, 66666667, 66666667, 0, 0, 2.0, 2.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 32768, 163840, 8192, 255, NULL, NULL }, + { + .name = "[STPC Consumer-II] Acrosser AR-B1479", + .internal_name = "arb1479", + .type = MACHINE_TYPE_486_MISC, + .chipset = MACHINE_CHIPSET_STPC_CONSUMER_II, + .init = machine_at_arb1479_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_STPC, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 66666667, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 2.0, + .max_multi = 2.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 32768, + .max = 163840, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a Winbond W83977F Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[STPC Elite] Advantech PCM-9340", "pcm9340", MACHINE_TYPE_486_MISC, MACHINE_CHIPSET_STPC_ELITE, machine_at_pcm9340_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_STPC, CPU_BLOCK_NONE, 66666667, 66666667, 0, 0, 2.0, 2.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 32768, 98304, 8192, 255, NULL, NULL }, + { + .name = "[STPC Elite] Advantech PCM-9340", + .internal_name = "pcm9340", + .type = MACHINE_TYPE_486_MISC, + .chipset = MACHINE_CHIPSET_STPC_ELITE, + .init = machine_at_pcm9340_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_STPC, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 66666667, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 2.0, + .max_multi = 2.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 32768, + .max = 98304, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a Winbond W83977F Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[STPC Atlas] AAEON PCM-5330", "pcm5330", MACHINE_TYPE_486_MISC, MACHINE_CHIPSET_STPC_ATLAS, machine_at_pcm5330_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_STPC, CPU_BLOCK_NONE, 66666667, 66666667, 0, 0, 2.0, 2.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 32768, 131072,32768, 255, NULL, NULL }, + { + .name = "[STPC Atlas] AAEON PCM-5330", + .internal_name = "pcm5330", + .type = MACHINE_TYPE_486_MISC, + .chipset = MACHINE_CHIPSET_STPC_ATLAS, + .init = machine_at_pcm5330_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_STPC, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 66666667, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 2.0, + .max_multi = 2.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 32768, + .max = 131072, + .step = 32768 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Socket 4 machines */ /* 430LX */ @@ -585,438 +6242,4660 @@ const machine_t machines[] = { connector. The boot block for BIOS recovery requires an unknown bit on port 805h to be clear. */ - { "[i430LX] AMI Excalibur PCI Pentium", "excaliburpci", MACHINE_TYPE_SOCKET4, MACHINE_CHIPSET_INTEL_430LX, machine_at_excaliburpci_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET4, CPU_BLOCK_NONE, 60000000, 66666667, 5000, 5000, MACHINE_MULTIPLIER_FIXED, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 2048, 131072, 2048, 127, NULL, NULL }, + { + .name = "[i430LX] AMI Excalibur PCI Pentium", + .internal_name = "excaliburpci", + .type = MACHINE_TYPE_SOCKET4, + .chipset = MACHINE_CHIPSET_INTEL_430LX, + .init = machine_at_excaliburpci_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET4, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 5000, + .max_voltage = 5000, + .min_multi = MACHINE_MULTIPLIER_FIXED, + .max_multi = MACHINE_MULTIPLIER_FIXED + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 2048, + .max = 131072, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMIKey F KBC firmware (AMIKey). */ - { "[i430LX] ASUS P/I-P5MP3", "p5mp3", MACHINE_TYPE_SOCKET4, MACHINE_CHIPSET_INTEL_430LX, machine_at_p5mp3_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET4, CPU_BLOCK_NONE, 60000000, 66666667, 5000, 5000, MACHINE_MULTIPLIER_FIXED, MACHINE_PS2_PCI, MACHINE_IDE, 2048, 196608, 2048, 127, NULL, NULL }, + { + .name = "[i430LX] ASUS P/I-P5MP3", + .internal_name = "p5mp3", + .type = MACHINE_TYPE_SOCKET4, + .chipset = MACHINE_CHIPSET_INTEL_430LX, + .init = machine_at_p5mp3_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET4, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 5000, + .max_voltage = 5000, + .min_multi = MACHINE_MULTIPLIER_FIXED, + .max_multi = MACHINE_MULTIPLIER_FIXED + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE, + .ram = { + .min = 2048, + .max = 196608, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[i430LX] Dell Dimension XPS P60", "dellxp60", MACHINE_TYPE_SOCKET4, MACHINE_CHIPSET_INTEL_430LX, machine_at_dellxp60_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET4, CPU_BLOCK_NONE, 60000000, 66666667, 5000, 5000, MACHINE_MULTIPLIER_FIXED, MACHINE_PS2_PCI, MACHINE_IDE, 2048, 131072, 2048, 127, NULL, NULL }, + { + .name = "[i430LX] Dell Dimension XPS P60", + .internal_name = "dellxp60", + .type = MACHINE_TYPE_SOCKET4, + .chipset = MACHINE_CHIPSET_INTEL_430LX, + .init = machine_at_dellxp60_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET4, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 5000, + .max_voltage = 5000, + .min_multi = MACHINE_MULTIPLIER_FIXED, + .max_multi = MACHINE_MULTIPLIER_FIXED + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE, + .ram = { + .min = 2048, + .max = 131072, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[i430LX] Dell OptiPlex 560/L", "opti560l", MACHINE_TYPE_SOCKET4, MACHINE_CHIPSET_INTEL_430LX, machine_at_opti560l_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET4, CPU_BLOCK_NONE, 60000000, 66666667, 5000, 5000, MACHINE_MULTIPLIER_FIXED, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 2048, 131072, 2048, 127, NULL, NULL }, + { + .name = "[i430LX] Dell OptiPlex 560/L", + .internal_name = "opti560l", + .type = MACHINE_TYPE_SOCKET4, + .chipset = MACHINE_CHIPSET_INTEL_430LX, + .init = machine_at_opti560l_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET4, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 5000, + .max_voltage = 5000, + .min_multi = MACHINE_MULTIPLIER_FIXED, + .max_multi = MACHINE_MULTIPLIER_FIXED + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 2048, + .max = 131072, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has the Phoenix MultiKey KBC firmware. This is basically an Intel Batman (*NOT* Batman's Revenge) with a fancier POST screen */ - { "[i430LX] AMBRA DP60 PCI", "ambradp60", MACHINE_TYPE_SOCKET4, MACHINE_CHIPSET_INTEL_430LX, machine_at_ambradp60_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET4, CPU_BLOCK_NONE, 60000000, 66666667, 5000, 5000, MACHINE_MULTIPLIER_FIXED, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 2048, 131072, 2048, 127, NULL, NULL }, + { + .name = "[i430LX] AMBRA DP60 PCI", + .internal_name = "ambradp60", + .type = MACHINE_TYPE_SOCKET4, + .chipset = MACHINE_CHIPSET_INTEL_430LX, + .init = machine_at_ambradp60_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET4, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 5000, + .max_voltage = 5000, + .min_multi = MACHINE_MULTIPLIER_FIXED, + .max_multi = MACHINE_MULTIPLIER_FIXED + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 2048, + .max = 131072, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has IBM PS/2 Type 1 KBC firmware. */ - { "[i430LX] IBM PS/ValuePoint P60", "valuepointp60", MACHINE_TYPE_SOCKET4, MACHINE_CHIPSET_INTEL_430LX, machine_at_valuepointp60_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET4, CPU_BLOCK_NONE, 60000000, 66666667, 5000, 5000, MACHINE_MULTIPLIER_FIXED, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 2048, 131072, 2048, 127, NULL, NULL }, + { + .name = "[i430LX] IBM PS/ValuePoint P60", + .internal_name = "valuepointp60", + .type = MACHINE_TYPE_SOCKET4, + .chipset = MACHINE_CHIPSET_INTEL_430LX, + .init = machine_at_valuepointp60_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET4, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 5000, + .max_voltage = 5000, + .min_multi = MACHINE_MULTIPLIER_FIXED, + .max_multi = MACHINE_MULTIPLIER_FIXED + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 2048, + .max = 131072, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has the Phoenix MultiKey KBC firmware. */ - { "[i430LX] Intel Premiere/PCI", "revenge", MACHINE_TYPE_SOCKET4, MACHINE_CHIPSET_INTEL_430LX, machine_at_revenge_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET4, CPU_BLOCK_NONE, 60000000, 66666667, 5000, 5000, MACHINE_MULTIPLIER_FIXED, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 2048, 131072, 2048, 127, NULL, NULL }, + { + .name = "[i430LX] Intel Premiere/PCI", + .internal_name = "revenge", + .type = MACHINE_TYPE_SOCKET4, + .chipset = MACHINE_CHIPSET_INTEL_430LX, + .init = machine_at_revenge_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET4, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 5000, + .max_voltage = 5000, + .min_multi = MACHINE_MULTIPLIER_FIXED, + .max_multi = MACHINE_MULTIPLIER_FIXED + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 2048, + .max = 131072, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMI MegaKey KBC firmware. */ - { "[i430LX] Micro Star 586MC1", "586mc1", MACHINE_TYPE_SOCKET4, MACHINE_CHIPSET_INTEL_430LX, machine_at_586mc1_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET4, CPU_BLOCK_NONE, 60000000, 66666667, 5000, 5000, MACHINE_MULTIPLIER_FIXED, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 2048, 131072, 2048, 127, NULL, NULL }, + { + .name = "[i430LX] Micro Star 586MC1", + .internal_name = "586mc1", + .type = MACHINE_TYPE_SOCKET4, + .chipset = MACHINE_CHIPSET_INTEL_430LX, + .init = machine_at_586mc1_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET4, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 5000, + .max_voltage = 5000, + .min_multi = MACHINE_MULTIPLIER_FIXED, + .max_multi = MACHINE_MULTIPLIER_FIXED + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 2048, + .max = 131072, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has the Phoenix MultiKey KBC firmware. */ - { "[i430LX] Packard Bell PB520R", "pb520r", MACHINE_TYPE_SOCKET4, MACHINE_CHIPSET_INTEL_430LX, machine_at_pb520r_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET4, CPU_BLOCK_NONE, 60000000, 66666667, 5000, 5000, MACHINE_MULTIPLIER_FIXED, MACHINE_PS2_PCI, MACHINE_IDE_DUAL | MACHINE_VIDEO, 8192, 139264, 2048, 127, at_pb520r_get_device, NULL }, + { + .name = "[i430LX] Packard Bell PB520R", + .internal_name = "pb520r", + .type = MACHINE_TYPE_SOCKET4, + .chipset = MACHINE_CHIPSET_INTEL_430LX, + .init = machine_at_pb520r_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET4, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 5000, + .max_voltage = 5000, + .min_multi = MACHINE_MULTIPLIER_FIXED, + .max_multi = MACHINE_MULTIPLIER_FIXED + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL | MACHINE_VIDEO, + .ram = { + .min = 8192, + .max = 139264, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &gd5434_onboard_pci_device, + .vid_device = NULL + }, /* OPTi 596/597 */ /* This uses an AMI KBC firmware in PS/2 mode (it sends command A5 with the PS/2 "Load Security" meaning), most likely MegaKey as it sends command AF (Set Extended Controller RAM) just like the later Intel AMI BIOS'es. */ - { "[OPTi 597] AMI Excalibur VLB", "excalibur", MACHINE_TYPE_SOCKET4, MACHINE_CHIPSET_OPTI_547_597, machine_at_excalibur_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET4, CPU_BLOCK_NONE, 60000000, 60000000, 5000, 5000, MACHINE_MULTIPLIER_FIXED, MACHINE_PS2_VLB, MACHINE_IDE, 2048, 65536, 2048, 127, NULL, NULL }, + { + .name = "[OPTi 597] AMI Excalibur VLB", + .internal_name = "excalibur", + .type = MACHINE_TYPE_SOCKET4, + .chipset = MACHINE_CHIPSET_OPTI_547_597, + .init = machine_at_excalibur_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET4, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 60000000, + .min_voltage = 5000, + .max_voltage = 5000, + .min_multi = MACHINE_MULTIPLIER_FIXED, + .max_multi = MACHINE_MULTIPLIER_FIXED + }, + .bus_flags = MACHINE_PS2_VLB, + .flags = MACHINE_IDE, + .ram = { + .min = 2048, + .max = 65536, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* OPTi 596/597/822 */ /* This has AMIKey 'F' KBC firmware. */ - { "[OPTi 597] Supermicro P5VL-PCI", "p5vl", MACHINE_TYPE_SOCKET4, MACHINE_CHIPSET_OPTI_547_597, machine_at_p5vl_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET4, CPU_BLOCK_NONE, 60000000, 66666667, 5000, 5000, MACHINE_MULTIPLIER_FIXED, MACHINE_PCIV, MACHINE_FLAGS_NONE, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[OPTi 597] Supermicro P5VL-PCI", + .internal_name = "p5vl", + .type = MACHINE_TYPE_SOCKET4, + .chipset = MACHINE_CHIPSET_OPTI_547_597, + .init = machine_at_p5vl_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET4, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 5000, + .max_voltage = 5000, + .min_multi = MACHINE_MULTIPLIER_FIXED, + .max_multi = MACHINE_MULTIPLIER_FIXED + }, + .bus_flags = MACHINE_PCIV, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* SiS 50x */ /* This has some form of AMI MegaKey as it uses keyboard controller command 0xCC. */ - { "[SiS 501] AMI Excalibur PCI-II Pentium ISA", "excaliburpci2", MACHINE_TYPE_SOCKET4, MACHINE_CHIPSET_SIS_501, machine_at_excaliburpci2_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET4, CPU_BLOCK_NONE, 60000000, 66666667, 5000, 5000, MACHINE_MULTIPLIER_FIXED, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[SiS 501] AMI Excalibur PCI-II Pentium ISA", + .internal_name = "excaliburpci2", + .type = MACHINE_TYPE_SOCKET4, + .chipset = MACHINE_CHIPSET_SIS_501, + .init = machine_at_excaliburpci2_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET4, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 5000, + .max_voltage = 5000, + .min_multi = MACHINE_MULTIPLIER_FIXED, + .max_multi = MACHINE_MULTIPLIER_FIXED + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[SiS 501] ASUS PCI/I-P5SP4", "p5sp4", MACHINE_TYPE_SOCKET4, MACHINE_CHIPSET_SIS_501, machine_at_p5sp4_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET4, CPU_BLOCK_NONE, 60000000, 66666667, 5000, 5000, MACHINE_MULTIPLIER_FIXED, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[SiS 501] ASUS PCI/I-P5SP4", + .internal_name = "p5sp4", + .type = MACHINE_TYPE_SOCKET4, + .chipset = MACHINE_CHIPSET_SIS_501, + .init = machine_at_p5sp4_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET4, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 5000, + .max_voltage = 5000, + .min_multi = MACHINE_MULTIPLIER_FIXED, + .max_multi = MACHINE_MULTIPLIER_FIXED + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Socket 5 machines */ /* 430NX */ /* This has the Phoenix MultiKey KBC firmware. */ - { "[i430NX] Intel Premiere/PCI II", "plato", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_INTEL_430NX, machine_at_plato_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3520, 3520, 1.5, 1.5, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 2048, 131072, 2048, 127, NULL, NULL }, + { + .name = "[i430NX] Intel Premiere/PCI II", + .internal_name = "plato", + .type = MACHINE_TYPE_SOCKET5, + .chipset = MACHINE_CHIPSET_INTEL_430NX, + .init = machine_at_plato_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3520, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 1.5 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 2048, + .max = 131072, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has the Phoenix MultiKey KBC firmware. This is basically an Intel Premiere/PCI II with a fancier POST screen. */ - { "[i430NX] AMBRA DP90 PCI", "ambradp90", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_INTEL_430NX, machine_at_ambradp90_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 1.5, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 2048, 131072, 2048, 127, NULL, NULL }, + { + .name = "[i430NX] AMBRA DP90 PCI", + .internal_name = "ambradp90", + .type = MACHINE_TYPE_SOCKET5, + .chipset = MACHINE_CHIPSET_INTEL_430NX, + .init = machine_at_ambradp90_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 1.5 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 2048, + .max = 131072, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMI MegaKey KBC firmware. */ - { "[i430NX] Gigabyte GA-586IP", "430nx", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_INTEL_430NX, machine_at_430nx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 60000000, 66666667, 3520, 3520, 1.5, 1.5, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 2048, 131072, 2048, 127, NULL, NULL }, + { + .name = "[i430NX] Gigabyte GA-586IP", + .internal_name = "430nx", + .type = MACHINE_TYPE_SOCKET5, + .chipset = MACHINE_CHIPSET_INTEL_430NX, + .init = machine_at_430nx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 3520, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 1.5 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 2048, + .max = 131072, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 430FX */ /* Uses an ACER/NEC 90M002A (UPD82C42C, 8042 clone) with unknown firmware (V5.0). */ - { "[i430FX] Acer V30", "acerv30", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_INTEL_430FX, machine_at_acerv30_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 2.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430FX] Acer V30", + .internal_name = "acerv30", + .type = MACHINE_TYPE_SOCKET5, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_acerv30_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 2.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMIKey F KBC firmware. */ - { "[i430FX] AMI Apollo", "apollo", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_INTEL_430FX, machine_at_apollo_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 2.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430FX] AMI Apollo", + .internal_name = "apollo", + .type = MACHINE_TYPE_SOCKET5, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_apollo_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 2.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMIKey H KBC firmware. */ - { "[i430FX] DataExpert EXP8551", "exp8551", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_INTEL_430FX, machine_at_exp8551_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL | MACHINE_GAMEPORT, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430FX] DataExpert EXP8551", + .internal_name = "exp8551", + .type = MACHINE_TYPE_SOCKET5, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_exp8551_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL | MACHINE_GAMEPORT, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. Command 0xA0 copyright string: (C)1994 AMI . */ - { "[i430FX] Intel Advanced/ZP", "zappa", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_INTEL_430FX, machine_at_zappa_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 2.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430FX] Intel Advanced/ZP", + .internal_name = "zappa", + .type = MACHINE_TYPE_SOCKET5, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_zappa_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 2.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* The BIOS sends KBC command B3 which indicates an AMI (or VIA VT82C42N) KBC. */ - { "[i430FX] NEC PowerMate V", "powermatev", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_INTEL_430FX, machine_at_powermatev_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 2.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430FX] NEC PowerMate V", + .internal_name = "powermatev", + .type = MACHINE_TYPE_SOCKET5, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_powermatev_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 2.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a VIA VT82C42N KBC. */ - { "[i430FX] PC Partner MB500N", "mb500n", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_INTEL_430FX, machine_at_mb500n_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 3.0, MACHINE_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430FX] PC Partner MB500N", + .internal_name = "mb500n", + .type = MACHINE_TYPE_SOCKET5, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_mb500n_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMIKey Z(!) KBC firmware. */ - { "[i430FX] TriGem Hawk", "hawk", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_INTEL_430FX, machine_at_hawk_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 2.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430FX] TriGem Hawk", + .internal_name = "hawk", + .type = MACHINE_TYPE_SOCKET5, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_hawk_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 2.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* OPTi 596/597 */ /* This uses an AMI KBC firmware in PS/2 mode (it sends command A5 with the PS/2 "Load Security" meaning), most likely MegaKey as it sends command AF (Set Extended Controller RAM) just like the later Intel AMI BIOS'es. */ - { "[OPTi 597] TMC PAT54PV", "pat54pv", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_OPTI_547_597, machine_at_pat54pv_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK(CPU_K5, CPU_5K86), 50000000, 66666667, 3520, 3520, 1.5, 1.5, MACHINE_VLB, MACHINE_FLAGS_NONE, 2048, 65536, 2048, 127, NULL, NULL }, + { + .name = "[OPTi 597] TMC PAT54PV", + .internal_name = "pat54pv", + .type = MACHINE_TYPE_SOCKET5, + .chipset = MACHINE_CHIPSET_OPTI_547_597, + .init = machine_at_pat54pv_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK(CPU_K5, CPU_5K86), + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3520, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 1.5 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 2048, + .max = 65536, + .step = 2048 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* OPTi 596/597/822 */ - { "[OPTi 597] Shuttle HOT-543", "hot543", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_OPTI_547_597, machine_at_hot543_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3520, 3520, 1.5, 2.0, MACHINE_PCIV, MACHINE_FLAGS_NONE, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[OPTi 597] Shuttle HOT-543", + .internal_name = "hot543", + .type = MACHINE_TYPE_SOCKET5, + .chipset = MACHINE_CHIPSET_OPTI_547_597, + .init = machine_at_hot543_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3520, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 2.0 + }, + .bus_flags = MACHINE_PCIV, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* SiS 85C50x */ /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[SiS 501] ASUS PCI/I-P54SP4", "p54sp4", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_SIS_501, machine_at_p54sp4_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK(CPU_K5, CPU_5K86), 40000000, 66666667, 3380, 3520, 1.5, 1.5, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[SiS 501] ASUS PCI/I-P54SP4", + .internal_name = "p54sp4", + .type = MACHINE_TYPE_SOCKET5, + .chipset = MACHINE_CHIPSET_SIS_501, + .init = machine_at_p54sp4_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK(CPU_K5, CPU_5K86), + .min_bus = 40000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 1.5 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[SiS 501] BCM SQ-588", "sq588", MACHINE_TYPE_SOCKET5, MACHINE_CHIPSET_SIS_501, machine_at_sq588_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK(CPU_PENTIUMMMX), 50000000, 66666667, 3520, 3520, 1.5, 1.5, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[SiS 501] BCM SQ-588", + .internal_name = "sq588", + .type = MACHINE_TYPE_SOCKET5, + .chipset = MACHINE_CHIPSET_SIS_501, + .init = machine_at_sq588_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + CPU_BLOCK(CPU_PENTIUMMMX), + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3520, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 1.5 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Socket 7 (Single Voltage) machines */ /* 430FX */ /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[i430FX] ASUS P/I-P54TP4XE", "p54tp4xe", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430FX, machine_at_p54tp4xe_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3600, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430FX] ASUS P/I-P54TP4XE", + .internal_name = "p54tp4xe", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_p54tp4xe_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3600, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[i430FX] ASUS P/I-P54TP4XE (MR BIOS)", "p54tp4xe_mr", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430FX, machine_at_p54tp4xe_mr_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3600, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430FX] ASUS P/I-P54TP4XE (MR BIOS)", + .internal_name = "p54tp4xe_mr", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_p54tp4xe_mr_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3600, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. Command 0xA0 copyright string: (C)1994 AMI . */ - { "[i430FX] Gateway 2000 Thor", "gw2katx", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430FX, machine_at_gw2katx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430FX] Gateway 2000 Thor", + .internal_name = "gw2katx", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_gw2katx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* The BIOS does not send a single non-standard KBC command, but the board has a SMC Super I/O chip with on-chip KBC and AMI MegaKey KBC firmware. */ - { "[i430FX] HP Vectra VL 5 Series 4", "vectra54", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430FX, machine_at_vectra54_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 2.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL | MACHINE_VIDEO, 8192, 131072, 8192, 511, at_vectra54_get_device, NULL }, + { + .name = "[i430FX] HP Vectra VL 5 Series 4", + .internal_name = "vectra54", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_vectra54_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 2.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL | MACHINE_VIDEO, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 511, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &s3_phoenix_trio64_onboard_pci_device, + .vid_device = NULL + }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. Command 0xA0 copyright string: (C)1994 AMI . */ - { "[i430FX] Intel Advanced/ATX", "thor", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430FX, machine_at_thor_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL | MACHINE_VIDEO, 8192, 131072, 8192, 127, at_thor_get_device, NULL }, + { + .name = "[i430FX] Intel Advanced/ATX", + .internal_name = "thor", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_thor_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL | MACHINE_VIDEO, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &s3_phoenix_trio64vplus_onboard_pci_device, + .vid_device = NULL + }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. Command 0xA0 copyright string: (C)1994 AMI . */ - { "[i430FX] Intel Advanced/ATX (MR BIOS)", "mrthor", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430FX, machine_at_mrthor_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, at_mrthor_get_device, NULL }, + { + .name = "[i430FX] Intel Advanced/ATX (MR BIOS)", + .internal_name = "mrthor", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_mrthor_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &s3_phoenix_trio64vplus_onboard_pci_device, + .vid_device = NULL + }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. Command 0xA0 copyright string: (C)1994 AMI . */ - { "[i430FX] Intel Advanced/EV", "endeavor", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430FX, machine_at_endeavor_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL | MACHINE_VIDEO, 8192, 131072, 8192, 127, at_endeavor_get_device, NULL }, + { + .name = "[i430FX] Intel Advanced/EV", + .internal_name = "endeavor", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_endeavor_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL | MACHINE_VIDEO, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &s3_phoenix_trio64_onboard_pci_device, + .vid_device = NULL + }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[i430FX] MSI MS-5119", "ms5119", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430FX, machine_at_ms5119_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2500, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430FX] MSI MS-5119", + .internal_name = "ms5119", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_ms5119_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2500, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This most likely uses AMI MegaKey KBC firmware as well due to having the same Super I/O chip (that has the KBC firmware on it) as eg. the Advanced/EV. */ - { "[i430FX] Packard Bell PB640", "pb640", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430FX, machine_at_pb640_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL | MACHINE_VIDEO, 8192, 131072, 8192, 127, at_pb640_get_device, NULL }, + { + .name = "[i430FX] Packard Bell PB640", + .internal_name = "pb640", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_pb640_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL | MACHINE_VIDEO, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &gd5440_onboard_pci_device, + .vid_device = NULL + }, /* Has an AMI 'H' KBC firmware (1992). */ - { "[i430FX] QDI FMB", "fmb", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430FX, machine_at_fmb_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_QDI_FMB, 50000000, 66666667, 3380, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430FX] QDI FMB", + .internal_name = "fmb", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430FX, + .init = machine_at_fmb_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK(CPU_WINCHIP, CPU_WINCHIP2, CPU_Cx6x86, CPU_Cx6x86L, CPU_Cx6x86MX), + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 430HX */ /* I can't determine what KBC firmware this has, but given that the Acer V35N and V60 have Phoenix MultiKey KBC firmware on the chip, I'm going to assume so does the M3A. */ - { "[i430HX] Acer M3A", "acerm3a", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430HX, machine_at_acerm3a_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3300, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 196608, 8192, 127, NULL, NULL }, + { + .name = "[i430HX] Acer M3A", + .internal_name = "acerm3a", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430HX, + .init = machine_at_acerm3a_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3300, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 196608, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMIKey F KBC firmware. */ - { "[i430HX] AOpen AP53", "ap53", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430HX, machine_at_ap53_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3450, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 524288, 8192, 127, NULL, NULL }, + { + .name = "[i430HX] AOpen AP53", + .internal_name = "ap53", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430HX, + .init = machine_at_ap53_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3450, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* [TEST] Has a VIA 82C42N KBC, with AMIKey F KBC firmware. */ - { "[i430HX] Biostar MB-8500TUC", "8500tuc", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430HX, machine_at_8500tuc_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 524288, 8192, 127, NULL, NULL }, + { + .name = "[i430HX] Biostar MB-8500TUC", + .internal_name = "8500tuc", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430HX, + .init = machine_at_8500tuc_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* [TEST] Unable to determine what KBC this has. A list on a Danish site shows the BIOS as having a -0 string, indicating non-AMI KBC firmware. */ - { "[i430HX] Supermicro P55T2S", "p55t2s", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430HX, machine_at_p55t2s_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3300, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 786432, 8192, 127, NULL, NULL }, + { + .name = "[i430HX] Supermicro P55T2S", + .internal_name = "p55t2s", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430HX, + .init = machine_at_p55t2s_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3300, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 786432, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 430VX */ /* Has AMIKey H KBC firmware (AMIKey-2). */ - { "[i430VX] ECS P5VX-B", "p5vxb", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430VX, machine_at_p5vxb_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430VX] ECS P5VX-B", + .internal_name = "p5vxb", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430VX, + .init = machine_at_p5vxb_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. Command 0xA0 copyright string: (C)1994 AMI . */ - { "[i430VX] Gateway 2000 Tigereye", "gw2kte", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_INTEL_430VX, machine_at_gw2kte_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430VX] Gateway 2000 Tigereye", + .internal_name = "gw2kte", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_INTEL_430VX, + .init = machine_at_gw2kte_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* SiS 5511 */ /* Has AMIKey H KBC firmware (AMIKey-2). */ - { "[SiS 5511] AOpen AP5S", "ap5s", MACHINE_TYPE_SOCKET7_3V, MACHINE_CHIPSET_SIS_5511, machine_at_ap5s_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 3380, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 524288, 8192, 127, NULL, NULL }, + { + .name = "[SiS 5511] AOpen AP5S", + .internal_name = "ap5s", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_SIS_5511, + .init = machine_at_ap5s_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Socket 7 (Dual Voltage) machines */ /* 430HX */ /* Has SST flash and the SMC FDC73C935's on-chip KBC with Phoenix MultiKey firmware. */ - { "[i430HX] Acer V35N", "acerv35n", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430HX, machine_at_acerv35n_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK(CPU_Cx6x86MX), 50000000, 66666667, 2800, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 196608, 8192, 127, NULL, NULL }, + { + .name = "[i430HX] Acer V35N", + .internal_name = "acerv35n", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430HX, + .init = machine_at_acerv35n_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK(CPU_Cx6x86MX), + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2800, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 196608, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMIKey H KBC firmware (AMIKey-2). */ - { "[i430HX] ASUS P/I-P55T2P4", "p55t2p4", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430HX, machine_at_p55t2p4_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 83333333, 2500, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 262144, 8192, 127, NULL, NULL }, + { + .name = "[i430HX] ASUS P/I-P55T2P4", + .internal_name = "p55t2p4", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430HX, + .init = machine_at_p55t2p4_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 83333333, + .min_voltage = 2500, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 262144, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has the SMC FDC73C935's on-chip KBC with Phoenix MultiKey firmware. */ - { "[i430HX] Micronics M7S-Hi", "m7shi", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430HX, machine_at_m7shi_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2800, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 511, NULL, NULL }, + { + .name = "[i430HX] Micronics M7S-Hi", + .internal_name = "m7shi", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430HX, + .init = machine_at_m7shi_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2800, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 511, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. Command 0xA0 copyright string: (C)1994 AMI . */ - { "[i430HX] Intel TC430HX", "tc430hx", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430HX, machine_at_tc430hx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2800, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 255, NULL, NULL }, + { + .name = "[i430HX] Intel TC430HX", + .internal_name = "tc430hx", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430HX, + .init = machine_at_tc430hx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2800, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. Command 0xA0 copyright string: (C)1994 AMI . */ - { "[i430HX] Toshiba Equium 5200D", "equium5200", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430HX, machine_at_equium5200_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2800, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 196608, 8192, 127, NULL, NULL }, + { + .name = "[i430HX] Toshiba Equium 5200D", + .internal_name = "equium5200", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430HX, + .init = machine_at_equium5200_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2800, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 196608, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. Command 0xA0 copyright string: (C)1994 AMI . Yes, this is an Intel AMI BIOS with a fancy splash screen. */ - { "[i430HX] Sony Vaio PCV-90", "pcv90", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430HX, machine_at_pcv90_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2800, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 196608, 8192, 127, NULL, NULL }, + { + .name = "[i430HX] Sony Vaio PCV-90", + .internal_name = "pcv90", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430HX, + .init = machine_at_pcv90_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2800, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 196608, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* The base board has AMIKey-2 (updated 'H') KBC firmware. */ - { "[i430HX] ASUS P/I-P65UP5 (C-P55T2D)", "p65up5_cp55t2d", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430HX, machine_at_p65up5_cp55t2d_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2500, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 524288, 8192, 127, NULL, NULL }, + { + .name = "[i430HX] ASUS P/I-P65UP5 (C-P55T2D)", + .internal_name = "p65up5_cp55t2d", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430HX, + .init = machine_at_p65up5_cp55t2d_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2500, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 430VX */ /* This has the VIA VT82C42N KBC. */ - { "[i430VX] AOpen AP5VM", "ap5vm", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430VX, machine_at_ap5vm_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2600, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL | MACHINE_SCSI, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430VX] AOpen AP5VM", + .internal_name = "ap5vm", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430VX, + .init = machine_at_ap5vm_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2600, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL | MACHINE_SCSI, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has AMIKey H KBC firmware (AMIKey-2). */ - { "[i430VX] ASUS P/I-P55TVP4", "p55tvp4", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430VX, machine_at_p55tvp4_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2500, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430VX] ASUS P/I-P55TVP4", + .internal_name = "p55tvp4", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430VX, + .init = machine_at_p55tvp4_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2500, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* The BIOS does not send a single non-standard KBC command, so it must have a standard IBM PS/2 KBC firmware or a clone thereof. */ - { "[i430VX] Azza PT-5IV", "5ivg", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430VX, machine_at_5ivg_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2500, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430VX] Azza PT-5IV", + .internal_name = "5ivg", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430VX, + .init = machine_at_5ivg_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2500, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* [TEST] Has AMIKey 'F' KBC firmware. */ - { "[i430VX] Biostar MB-8500TVX-A", "8500tvxa", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430VX, machine_at_8500tvxa_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2600, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430VX] Biostar MB-8500TVX-A", + .internal_name = "8500tvxa", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430VX, + .init = machine_at_8500tvxa_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2600, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* The BIOS does not send a single non-standard KBC command, but the board has a SMC Super I/O chip with on-chip KBC and AMI MegaKey KBC firmware. */ - { "[i430VX] Compaq Presario 2240", "presario2240", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430VX, machine_at_presario2240_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2800, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL | MACHINE_VIDEO, 8192, 131072, 8192, 127, at_presario2240_get_device, NULL }, + { + .name = "[i430VX] Compaq Presario 2240", + .internal_name = "presario2240", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430VX, + .init = machine_at_presario2240_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2800, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL | MACHINE_VIDEO, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &s3_trio64v2_dx_onboard_pci_device, + .vid_device = NULL + }, /* This most likely has AMI MegaKey as above. */ - { "[i430VX] Compaq Presario 4500", "presario4500", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430VX, machine_at_presario4500_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2800, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL | MACHINE_VIDEO, 8192, 131072, 8192, 127, at_presario4500_get_device, NULL }, + { + .name = "[i430VX] Compaq Presario 4500", + .internal_name = "presario4500", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430VX, + .init = machine_at_presario4500_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2800, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL | MACHINE_VIDEO, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &s3_trio64v2_dx_onboard_pci_device, + .vid_device = NULL + }, /* The BIOS sends KBC command CB which is an AMI KBC command, so it has an AMI KBC firmware. */ - { "[i430VX] Epox P55-VA", "p55va", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430VX, machine_at_p55va_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2500, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430VX] Epox P55-VA", + .internal_name = "p55va", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430VX, + .init = machine_at_p55va_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2500, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* The BIOS does not send a single non-standard KBC command. */ - { "[i430VX] HP Brio 80xx", "brio80xx", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430VX, machine_at_brio80xx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 66666667, 66666667, 2200, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430VX] HP Brio 80xx", + .internal_name = "brio80xx", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430VX, + .init = machine_at_brio80xx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 66666667, + .min_voltage = 2200, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. Command 0xA0 copyright string: (C)1994 AMI . */ - { "[i430VX] Packard Bell PB680", "pb680", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430VX, machine_at_pb680_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2800, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430VX] Packard Bell PB680", + .internal_name = "pb680", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430VX, + .init = machine_at_pb680_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2800, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has the AMIKey 'H' firmware, possibly AMIKey-2. Photos show it with a BestKey, so it likely clones the behavior of AMIKey 'H'. */ - { "[i430VX] PC Partner MB520N", "mb520n", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430VX, machine_at_mb520n_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2600, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430VX] PC Partner MB520N", + .internal_name = "mb520n", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430VX, + .init = machine_at_mb520n_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2600, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has a Holtek KBC and the BIOS does not send a single non-standard KBC command, so it must be an ASIC that clones the standard IBM PS/2 KBC. */ - { "[i430VX] Shuttle HOT-557", "430vx", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430VX, machine_at_i430vx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2500, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL | MACHINE_GAMEPORT, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i430VX] Shuttle HOT-557", + .internal_name = "430vx", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430VX, + .init = machine_at_i430vx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2500, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL | MACHINE_GAMEPORT, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 430TX */ /* The BIOS sends KBC command B8, CA, and CB, so it has an AMI KBC firmware. */ - { "[i430TX] ADLink NuPRO-592", "nupro592", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430TX, machine_at_nupro592_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 66666667, 66666667, 1900, 2800, 1.5, 5.5, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 262144, 8192, 255, NULL, NULL }, + { + .name = "[i430TX] ADLink NuPRO-592", + .internal_name = "nupro592", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430TX, + .init = machine_at_nupro592_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 66666667, + .min_voltage = 1900, + .max_voltage = 2800, + .min_multi = 1.5, + .max_multi = 5.5 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 262144, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has the AMIKey KBC firmware, which is an updated 'F' type (YM430TX is based on the TX97). */ - { "[i430TX] ASUS TX97", "tx97", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430TX, machine_at_tx97_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 75000000, 2500, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 262144, 8192, 255, NULL, NULL }, + { + .name = "[i430TX] ASUS TX97", + .internal_name = "tx97", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430TX, + .init = machine_at_tx97_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 75000000, + .min_voltage = 2500, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 262144, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, #if defined(DEV_BRANCH) && defined(USE_AN430TX) /* This has the Phoenix MultiKey KBC firmware. */ - { "[i430TX] Intel AN430TX", "an430tx", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430TX, machine_at_an430tx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 60000000, 66666667, 2800, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 262144, 8192, 255, NULL, NULL }, + { + .name = "[i430TX] Intel AN430TX", + .internal_name = "an430tx", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430TX, + .init = machine_at_an430tx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 2800, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 262144, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, #endif /* This has the AMIKey KBC firmware, which is an updated 'F' type. */ - { "[i430TX] Intel YM430TX", "ym430tx", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430TX, machine_at_ym430tx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 60000000, 66666667, 2800, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 262144, 8192, 255, NULL, NULL }, + { + .name = "[i430TX] Intel YM430TX", + .internal_name = "ym430tx", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430TX, + .init = machine_at_ym430tx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 2800, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 262144, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* The BIOS sends KBC command BB and expects it to output a byte, which is AMI KBC behavior. */ - { "[i430TX] PC Partner MB540N", "mb540n", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430TX, machine_at_mb540n_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 60000000, 66666667, 2700, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 262144, 8192, 255, NULL, NULL }, - /* Award BIOS, PS2, EDO, SDRAM, 4 PCI, 4 ISA, VIA VT82C42N KBC */ - { "[i430TX] Soltek SL-56A5", "56a5", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430TX, machine_at_56a5_init, 0, 0, MACHINE_AVAILABLE, 0, CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 55000000, 75000000, 2800, 3520, 1.5, 5.5, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 262144, 8192, 255, NULL, NULL }, + { + .name = "[i430TX] PC Partner MB540N", + .internal_name = "mb540n", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430TX, + .init = machine_at_mb540n_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 2700, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 262144, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* [TEST] Has AMIKey 'H' KBC firmware. */ - { "[i430TX] Supermicro P5MMS98", "p5mms98", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_INTEL_430TX, machine_at_p5mms98_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 66666667, 2100, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 262144, 8192, 255, NULL, NULL }, + { + .name = "[i430TX] Supermicro P5MMS98", + .internal_name = "p5mms98", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430TX, + .init = machine_at_p5mms98_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2100, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 262144, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Apollo VPX */ /* Has the VIA VT82C586B southbridge with on-chip KBC identical to the VIA VT82C42N. */ - { "[VIA VPX] FIC VA-502", "ficva502", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_VIA_APOLLO_VPX, machine_at_ficva502_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 75000000, 2800, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 524288, 8192, 127, NULL, NULL }, + { + .name = "[VIA VPX] FIC VA-502", + .internal_name = "ficva502", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_VIA_APOLLO_VPX, + .init = machine_at_ficva502_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 75000000, + .min_voltage = 2800, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Apollo VP3 */ /* Has the VIA VT82C586B southbridge with on-chip KBC identical to the VIA VT82C42N. */ - { "[VIA VP3] FIC PA-2012", "ficpa2012", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_VIA_APOLLO_VP3, machine_at_ficpa2012_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 55000000, 75000000, 2100, 3520, 1.5, 5.5, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 1048576, 8192, 127, NULL, NULL }, + { + .name = "[VIA VP3] FIC PA-2012", + .internal_name = "ficpa2012", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_VIA_APOLLO_VP3, + .init = machine_at_ficpa2012_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 55000000, + .max_bus = 75000000, + .min_voltage = 2100, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 5.5 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* SiS 5571 */ /* Has the SiS 5571 chipset with on-chip KBC. */ - { "[SiS 5571] Rise R534F", "r534f", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_SIS_5571, machine_at_r534f_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 55000000, 83333333, 2500, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 393216, 8192, 127, NULL, NULL }, + { + .name = "[SiS 5571] Rise R534F", + .internal_name = "r534f", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_SIS_5571, + .init = machine_at_r534f_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 55000000, + .max_bus = 83333333, + .min_voltage = 2500, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 393216, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has the SiS 5571 chipset with on-chip KBC. */ - { "[SiS 5571] MSI MS-5146", "ms5146", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_SIS_5571, machine_at_ms5146_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 75000000, 2800, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 262144, 8192, 127, NULL, NULL }, + { + .name = "[SiS 5571] MSI MS-5146", + .internal_name = "ms5146", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_SIS_5571, + .init = machine_at_ms5146_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 75000000, + .min_voltage = 2800, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 262144, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* ALi ALADDiN IV+ */ /* Has the ALi M1543 southbridge with on-chip KBC. */ - { "[ALi ALADDiN IV+] PC Chips M560", "m560", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_ALI_ALADDIN_IV_PLUS, machine_at_m560_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 50000000, 83333333, 2500, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 786432, 8192, 255, NULL, NULL }, + { + .name = "[ALi ALADDiN IV+] PC Chips M560", + .internal_name = "m560", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_ALI_ALADDIN_IV_PLUS, + .init = machine_at_m560_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 83333333, + .min_voltage = 2500, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 786432, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has the ALi M1543 southbridge with on-chip KBC. */ - { "[ALi ALADDiN IV+] MSI MS-5164", "ms5164", MACHINE_TYPE_SOCKET7, MACHINE_CHIPSET_ALI_ALADDIN_IV_PLUS, machine_at_ms5164_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 60000000, 83333333, 2100, 3520, 1.5, 3.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 1048576, 8192, 255, NULL, NULL }, + { + .name = "[ALi ALADDiN IV+] MSI MS-5164", + .internal_name = "ms5164", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_ALI_ALADDIN_IV_PLUS, + .init = machine_at_ms5164_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 83333333, + .min_voltage = 2100, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Super Socket 7 machines */ /* ALi ALADDiN V */ /* Has the ALi M1543C southbridge with on-chip KBC. */ - { "[ALi ALADDiN V] ASUS P5A", "p5a", MACHINE_TYPE_SOCKETS7, MACHINE_CHIPSET_ALI_ALADDIN_V, machine_at_p5a_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 60000000, 120000000, 2000, 3520, 1.5, 5.5, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 1024, 1572864, 8192, 255, NULL, NULL }, + { + .name = "[ALi ALADDiN V] ASUS P5A", + .internal_name = "p5a", + .type = MACHINE_TYPE_SOCKETS7, + .chipset = MACHINE_CHIPSET_ALI_ALADDIN_V, + .init = machine_at_p5a_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 120000000, + .min_voltage = 2000, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 5.5 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 1572864, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Is the exact same as the Matsonic MS6260S. Has the ALi M1543C southbridge with on-chip KBC. */ - { "[ALi ALADDiN V] PC Chips M579", "m579", MACHINE_TYPE_SOCKETS7, MACHINE_CHIPSET_ALI_ALADDIN_V, machine_at_m579_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 66666667, 100000000, 2000, 3520, 1.5, 5.5, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 1024, 1572864, 8192, 255, NULL, NULL }, + { + .name = "[ALi ALADDiN V] PC Chips M579", + .internal_name = "m579", + .type = MACHINE_TYPE_SOCKETS7, + .chipset = MACHINE_CHIPSET_ALI_ALADDIN_V, + .init = machine_at_m579_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 100000000, + .min_voltage = 2000, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 5.5 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 1572864, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has the ALi M1543C southbridge with on-chip KBC. */ - { "[ALi ALADDiN V] Gigabyte GA-5AA", "5aa", MACHINE_TYPE_SOCKETS7, MACHINE_CHIPSET_ALI_ALADDIN_V, machine_at_5aa_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 66666667, 140000000, 1300, 3520, 1.5, 5.5, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 1024, 1572864, 8192, 255, NULL, NULL }, + { + .name = "[ALi ALADDiN V] Gigabyte GA-5AA", + .internal_name = "5aa", + .type = MACHINE_TYPE_SOCKETS7, + .chipset = MACHINE_CHIPSET_ALI_ALADDIN_V, + .init = machine_at_5aa_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 140000000, + .min_voltage = 1300, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 5.5 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 1572864, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has the ALi M1543C southbridge with on-chip KBC. */ - { "[ALi ALADDiN V] Gigabyte GA-5AX", "5ax", MACHINE_TYPE_SOCKETS7, MACHINE_CHIPSET_ALI_ALADDIN_V, machine_at_5ax_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 66666667, 140000000, 1300, 3520, 1.5, 5.5, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 1024, 1572864, 8192, 255, NULL, NULL }, + { + .name = "[ALi ALADDiN V] Gigabyte GA-5AX", + .internal_name = "5ax", + .type = MACHINE_TYPE_SOCKETS7, + .chipset = MACHINE_CHIPSET_ALI_ALADDIN_V, + .init = machine_at_5ax_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 140000000, + .min_voltage = 1300, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 5.5 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 1572864, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Apollo MVP3 */ /* Has the VIA VT82C586B southbridge with on-chip KBC identical to the VIA VT82C42N. */ - { "[VIA MVP3] AOpen AX59 Pro", "ax59pro", MACHINE_TYPE_SOCKETS7, MACHINE_CHIPSET_VIA_APOLLO_MVP3, machine_at_ax59pro_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 66666667, 124242424, 1300, 3520, 1.5, 5.5, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 1048576, 8192, 255, NULL, NULL }, + { + .name = "[VIA MVP3] AOpen AX59 Pro", + .internal_name = "ax59pro", + .type = MACHINE_TYPE_SOCKETS7, + .chipset = MACHINE_CHIPSET_VIA_APOLLO_MVP3, + .init = machine_at_ax59pro_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 124242424, + .min_voltage = 1300, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 5.5 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has the VIA VT82C586B southbridge with on-chip KBC identical to the VIA VT82C42N. */ - { "[VIA MVP3] FIC VA-503+", "ficva503p", MACHINE_TYPE_SOCKETS7, MACHINE_CHIPSET_VIA_APOLLO_MVP3, machine_at_mvp3_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 66666667, 124242424, 2000, 3200, 1.5, 5.5, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 1048576, 8192, 255, NULL, NULL }, + { + .name = "[VIA MVP3] FIC VA-503+", + .internal_name = "ficva503p", + .type = MACHINE_TYPE_SOCKETS7, + .chipset = MACHINE_CHIPSET_VIA_APOLLO_MVP3, + .init = machine_at_mvp3_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 124242424, + .min_voltage = 2000, + .max_voltage = 3200, + .min_multi = 1.5, + .max_multi = 5.5 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has the VIA VT82C686A southbridge with on-chip KBC identical to the VIA VT82C42N. */ - { "[VIA MVP3] FIC VA-503A", "ficva503a", MACHINE_TYPE_SOCKETS7, MACHINE_CHIPSET_VIA_APOLLO_MVP3, machine_at_ficva503a_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 66666667, 124242424, 1800, 3100, 1.5, 5.5, MACHINE_PS2_A97, MACHINE_IDE_DUAL | MACHINE_SOUND, 8192, 786432, 8192, 255, NULL, NULL }, + { + .name = "[VIA MVP3] FIC VA-503A", + .internal_name = "ficva503a", + .type = MACHINE_TYPE_SOCKETS7, + .chipset = MACHINE_CHIPSET_VIA_APOLLO_MVP3, + .init = machine_at_ficva503a_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 124242424, + .min_voltage = 1800, + .max_voltage = 3100, + .min_multi = 1.5, + .max_multi = 5.5 + }, + .bus_flags = MACHINE_PS2_A97, + .flags = MACHINE_IDE_DUAL | MACHINE_SOUND, + .ram = { + .min = 8192, + .max = 786432, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has the VIA VT82C686A southbridge with on-chip KBC identical to the VIA VT82C42N. */ - { "[VIA MVP3] Soyo 5EMA PRO", "5emapro", MACHINE_TYPE_SOCKETS7, MACHINE_CHIPSET_VIA_APOLLO_MVP3, machine_at_5emapro_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET5_7, CPU_BLOCK_NONE, 66666667, 124242424, 2000, 3520, 1.5, 5.5, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 786432, 8192, 255, NULL, NULL }, + { + .name = "[VIA MVP3] Soyo 5EMA PRO", + .internal_name = "5emapro", + .type = MACHINE_TYPE_SOCKETS7, + .chipset = MACHINE_CHIPSET_VIA_APOLLO_MVP3, + .init = machine_at_5emapro_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 124242424, + .min_voltage = 2000, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 5.5 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 786432, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Socket 8 machines */ /* 450KX */ /* This has an AMIKey-2, which is an updated version of type 'H'. */ - { "[i450KX] ASUS P/I-P6RP4", "p6rp4", MACHINE_TYPE_SOCKET8, MACHINE_CHIPSET_INTEL_450KX, machine_at_p6rp4_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET8, CPU_BLOCK_NONE, 60000000, 66666667, 2100, 3500, 1.5, 8.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 524288, 8192, 127, NULL, NULL }, + { + .name = "[i450KX] ASUS P/I-P6RP4", + .internal_name = "p6rp4", + .type = MACHINE_TYPE_SOCKET8, + .chipset = MACHINE_CHIPSET_INTEL_450KX, + .init = machine_at_p6rp4_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET8, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 2100, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 440FX */ /* Has the SMC FDC73C935's on-chip KBC with Phoenix MultiKey firmware. */ - { "[i440FX] Acer V60N", "acerv60n", MACHINE_TYPE_SOCKET8, MACHINE_CHIPSET_INTEL_440FX, machine_at_acerv60n_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET8, CPU_BLOCK_NONE, 60000000, 66666667, 2500, 3500, 1.5, 8.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 524288, 8192, 127, NULL, NULL }, + { + .name = "[i440FX] Acer V60N", + .internal_name = "acerv60n", + .type = MACHINE_TYPE_SOCKET8, + .chipset = MACHINE_CHIPSET_INTEL_440FX, + .init = machine_at_acerv60n_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET8, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 2500, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* The base board has AMIKey-2 (updated 'H') KBC firmware. */ - { "[i440FX] ASUS P/I-P65UP5 (C-P6ND)", "p65up5_cp6nd", MACHINE_TYPE_SOCKET8, MACHINE_CHIPSET_INTEL_440FX, machine_at_p65up5_cp6nd_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET8, CPU_BLOCK_NONE, 60000000, 66666667, 2100, 3500, 1.5, 8.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 1048576, 8192, 127, NULL, NULL }, + { + .name = "[i440FX] ASUS P/I-P65UP5 (C-P6ND)", + .internal_name = "p65up5_cp6nd", + .type = MACHINE_TYPE_SOCKET8, + .chipset = MACHINE_CHIPSET_INTEL_440FX, + .init = machine_at_p65up5_cp6nd_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET8, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 2100, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* The MB-8600TTX has an AMIKey 'F' KBC firmware, so I'm going to assume so does the MB-8600TTC until someone can actually identify it. */ - { "[i440FX] Biostar MB-8600TTC", "8600ttc", MACHINE_TYPE_SOCKET8, MACHINE_CHIPSET_INTEL_440FX, machine_at_8600ttc_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET8, CPU_BLOCK_NONE, 50000000, 66666667, 2900, 3300, 2.0, 5.5, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 1048576, 8192, 127, NULL, NULL }, - { "[i440FX] Gigabyte GA-686NX", "686nx", MACHINE_TYPE_SOCKET8, MACHINE_CHIPSET_INTEL_440FX, machine_at_686nx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET8, CPU_BLOCK_NONE, 60000000, 66666667, 2100, 3500, 2.0, 5.5, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 524288, 8192, 127, NULL, NULL }, + { + .name = "[i440FX] Biostar MB-8600TTC", + .internal_name = "8600ttc", + .type = MACHINE_TYPE_SOCKET8, + .chipset = MACHINE_CHIPSET_INTEL_440FX, + .init = machine_at_8600ttc_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET8, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 2900, + .max_voltage = 3300, + .min_multi = 2.0, + .max_multi = 5.5 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[i440FX] Gigabyte GA-686NX", + .internal_name = "686nx", + .type = MACHINE_TYPE_SOCKET8, + .chipset = MACHINE_CHIPSET_INTEL_440FX, + .init = machine_at_686nx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET8, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 2100, + .max_voltage = 3500, + .min_multi = 2.0, + .max_multi = 5.5 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. Command 0xA0 copyright string: (C)1994 AMI . */ - { "[i440FX] Intel AP440FX", "ap440fx", MACHINE_TYPE_SOCKET8, MACHINE_CHIPSET_INTEL_440FX, machine_at_ap440fx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET8, CPU_BLOCK_NONE, 60000000, 66666667, 2100, 3500, 2.0, 3.5, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, NULL, NULL }, + { + .name = "[i440FX] Intel AP440FX", + .internal_name = "ap440fx", + .type = MACHINE_TYPE_SOCKET8, + .chipset = MACHINE_CHIPSET_INTEL_440FX, + .init = machine_at_ap440fx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET8, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 2100, + .max_voltage = 3500, + .min_multi = 2.0, + .max_multi = 3.5 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 131072, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. Command 0xA0 copyright string: (C)1994 AMI . */ - { "[i440FX] Intel VS440FX", "vs440fx", MACHINE_TYPE_SOCKET8, MACHINE_CHIPSET_INTEL_440FX, machine_at_vs440fx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET8, CPU_BLOCK_NONE, 60000000, 66666667, 2100, 3500, 2.0, 3.5, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 524288, 8192, 127, NULL, NULL }, + { + .name = "[i440FX] Intel VS440FX", + .internal_name = "vs440fx", + .type = MACHINE_TYPE_SOCKET8, + .chipset = MACHINE_CHIPSET_INTEL_440FX, + .init = machine_at_vs440fx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET8, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 2100, + .max_voltage = 3500, + .min_multi = 2.0, + .max_multi = 3.5 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has the SMC FDC73C935's on-chip KBC with Phoenix MultiKey firmware. */ - { "[i440FX] Micronics M6Mi", "m6mi", MACHINE_TYPE_SOCKET8, MACHINE_CHIPSET_INTEL_440FX, machine_at_m6mi_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET8, CPU_BLOCK_NONE, 60000000, 66666667, 2900, 3300, 1.5, 8.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 786432, 8192, 127, NULL, NULL }, + { + .name = "[i440FX] Micronics M6Mi", + .internal_name = "m6mi", + .type = MACHINE_TYPE_SOCKET8, + .chipset = MACHINE_CHIPSET_INTEL_440FX, + .init = machine_at_m6mi_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET8, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 2900, + .max_voltage = 3300, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 786432, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* I found a BIOS string of it that ends in -S, but it could be a typo for -5 (there's quite a few AMI BIOS strings around with typo'd KBC codes), so I'm going to give it an AMI MegaKey. */ - { "[i440FX] PC Partner MB600N", "mb600n", MACHINE_TYPE_SOCKET8, MACHINE_CHIPSET_INTEL_440FX, machine_at_mb600n_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET8, CPU_BLOCK_NONE, 60000000, 66666667, 2100, 3500, 1.5, 8.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 524288, 8192, 127, NULL, NULL }, + { + .name = "[i440FX] PC Partner MB600N", + .internal_name = "mb600n", + .type = MACHINE_TYPE_SOCKET8, + .chipset = MACHINE_CHIPSET_INTEL_440FX, + .init = machine_at_mb600n_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET8, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 66666667, + .min_voltage = 2100, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Slot 1 machines */ /* ALi ALADDiN V */ /* Has the ALi M1543C southbridge with on-chip KBC. */ - { "[ALi ALADDiN-PRO II] PC Chips M729", "m729", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_ALI_ALADDIN_PRO_II, machine_at_m729_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 100000000, 1800, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 1024, 1572864, 8192, 255, NULL, NULL }, + { + .name = "[ALi ALADDiN-PRO II] PC Chips M729", + .internal_name = "m729", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_ALI_ALADDIN_PRO_II, + .init = machine_at_m729_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 100000000, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 1572864, + .step = 8192 + }, + 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 440FX */ /* The base board has AMIKey-2 (updated 'H') KBC firmware. */ - { "[i440FX] ASUS P/I-P65UP5 (C-PKND)", "p65up5_cpknd", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_INTEL_440FX, machine_at_p65up5_cpknd_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 50000000, 66666667, 1800, 3500, 1.5, 8.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 1048576, 8192, 127, NULL, NULL }, + { + .name = "[i440FX] ASUS P/I-P65UP5 (C-PKND)", + .internal_name = "p65up5_cpknd", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440FX, + .init = machine_at_p65up5_cpknd_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* This has a Holtek KBC and the BIOS does not send a single non-standard KBC command, so it must be an ASIC that clones the standard IBM PS/2 KBC. */ - { "[i440FX] ASUS KN97", "kn97", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_INTEL_440FX, machine_at_kn97_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 60000000, 83333333, 1800, 3500, 1.5, 8.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 786432, 8192, 127, NULL, NULL }, + { + .name = "[i440FX] ASUS KN97", + .internal_name = "kn97", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440FX, + .init = machine_at_kn97_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 83333333, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 786432, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 440LX */ /* Has a Winbond W83977TF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440LX] ABIT LX6", "lx6", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_INTEL_440LX, machine_at_lx6_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 60000000, 100000000, 1500, 3500, 2.0, 5.5, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 1048576, 8192, 255, NULL, NULL }, + { + .name = "[i440LX] ABIT LX6", + .internal_name = "lx6", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440LX, + .init = machine_at_lx6_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 60000000, + .max_bus = 100000000, + .min_voltage = 1500, + .max_voltage = 3500, + .min_multi = 2.0, + .max_multi = 5.5 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a SM(S)C FDC37C935 Super I/O chip with on-chip KBC with Phoenix MultiKey KBC firmware. */ - { "[i440LX] Micronics Spitfire", "spitfire", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_INTEL_440LX, machine_at_spitfire_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 66666667, 1800, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 1048576, 8192, 255, NULL, NULL }, + { + .name = "[i440LX] Micronics Spitfire", + .internal_name = "spitfire", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440LX, + .init = machine_at_spitfire_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 66666667, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 440EX */ /* Has a Winbond W83977TF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440EX] QDI EXCELLENT II", "p6i440e2", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_INTEL_440EX, machine_at_p6i440e2_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 83333333, 1800, 3500, 3.0, 8.0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 524288, 8192, 255, NULL, NULL }, + { + .name = "[i440EX] QDI EXCELLENT II", + .internal_name = "p6i440e2", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440EX, + .init = machine_at_p6i440e2_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 83333333, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 3.0, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 440BX */ /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440BX] ASUS P2B-LS", "p2bls", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_INTEL_440BX, machine_at_p2bls_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 50000000, 112121212, 1300, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 1048576, 8192, 255, NULL, NULL }, + { + .name = "[i440BX] ASUS P2B-LS", + .internal_name = "p2bls", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440BX, + .init = machine_at_p2bls_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 112121212, + .min_voltage = 1300, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440BX] ASUS P3B-F", "p3bf", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_INTEL_440BX, machine_at_p3bf_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 150000000, 1300, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 1048576, 8192, 255, NULL, NULL }, + { + .name = "[i440BX] ASUS P3B-F", + .internal_name = "p3bf", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440BX, + .init = machine_at_p3bf_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 150000000, + .min_voltage = 1300, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440BX] ABIT BF6", "bf6", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_INTEL_440BX, machine_at_bf6_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 133333333, 1800, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 786432, 8192, 255, NULL, NULL }, + { + .name = "[i440BX] ABIT BF6", + .internal_name = "bf6", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440BX, + .init = machine_at_bf6_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 133333333, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 786432, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a Winbond W83977TF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440BX] AOpen AX6BC", "ax6bc", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_INTEL_440BX, machine_at_ax6bc_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 112121212, 1800, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 786432, 8192, 255, NULL, NULL }, + { + .name = "[i440BX] AOpen AX6BC", + .internal_name = "ax6bc", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440BX, + .init = machine_at_ax6bc_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 112121212, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 786432, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a Winbond W83977TF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440BX] Gigabyte GA-686BX", "686bx", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_INTEL_440BX, machine_at_686bx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 100000000, 1800, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192,1048576, 8192, 255, NULL, NULL }, + { + .name = "[i440BX] Gigabyte GA-686BX", + .internal_name = "686bx", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440BX, + .init = machine_at_686bx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 100000000, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a SM(S)C FDC37M60x Super I/O chip with on-chip KBC with most likely AMIKey-2 KBC firmware. */ - { "[i440BX] HP Vectra VEi 8", "vei8", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_INTEL_440BX, machine_at_vei8_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 100000000, 1800, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192,1048576, 8192, 255, NULL, NULL }, + { + .name = "[i440BX] HP Vectra VEi 8", + .internal_name = "vei8", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440BX, + .init = machine_at_vei8_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 100000000, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a National Semiconductors PC87309 Super I/O chip with on-chip KBC with most likely AMIKey-2 KBC firmware. */ - { "[i440BX] Tyan Tsunami ATX", "s1846", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_INTEL_440BX, machine_at_s1846_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 112121212, 1800, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL | MACHINE_SOUND, 8192,1048576, 8192, 255, at_s1846_get_device, NULL }, + { + .name = "[i440BX] Tyan Tsunami ATX", + .internal_name = "s1846", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440BX, + .init = machine_at_s1846_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 112121212, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL | MACHINE_SOUND, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &es1371_onboard_device, + .vid_device = NULL + }, /* Has a Winbond W83977TF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440BX] Supermicro P6SBA", "p6sba", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_INTEL_440BX, machine_at_p6sba_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 100000000, 1800, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 786432, 8192, 255, NULL, NULL }, + { + .name = "[i440BX] Supermicro P6SBA", + .internal_name = "p6sba", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440BX, + .init = machine_at_p6sba_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 100000000, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 786432, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 440ZX */ /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440ZX] MSI MS-6168", "ms6168", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_INTEL_440ZX, machine_at_ms6168_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 100000000, 1800, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL | MACHINE_AV, 8192, 524288, 8192, 255, at_ms6168_get_device, NULL }, + { + .name = "[i440ZX] MSI MS-6168", + .internal_name = "ms6168", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440ZX, + .init = machine_at_ms6168_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 100000000, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL | MACHINE_AV, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &voodoo_3_2000_agp_onboard_8m_device, + .vid_device = NULL + }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440ZX] Packard Bell Bora Pro", "borapro", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_INTEL_440ZX, machine_at_borapro_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 66666667, 1800, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL | MACHINE_AV, 8192, 524288, 8192, 255, at_borapro_get_device, NULL }, + { + .name = "[i440ZX] Packard Bell Bora Pro", + .internal_name = "borapro", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_INTEL_440ZX, + .init = machine_at_borapro_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 66666667, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL | MACHINE_AV, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &voodoo_3_2000_agp_onboard_8m_device, + .vid_device = NULL + }, /* SMSC VictoryBX-66 */ /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[SMSC VictoryBX-66] A-Trend ATC6310BXII", "atc6310bxii", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_SMSC_VICTORYBX_66, machine_at_atc6310bxii_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 133333333, 1300, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 786432, 8192, 255, NULL, NULL }, + { + .name = "[SMSC VictoryBX-66] A-Trend ATC6310BXII", + .internal_name = "atc6310bxii", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_SMSC_VICTORYBX_66, + .init = machine_at_atc6310bxii_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 133333333, + .min_voltage = 1300, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 786432, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* VIA Apollo Pro */ /* Has the VIA VT82C596B southbridge with on-chip KBC identical to the VIA VT82C42N. */ - { "[VIA Apollo Pro] FIC KA-6130", "ficka6130", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_VIA_APOLLO_PRO, machine_at_ficka6130_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 100000000, 1800, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 524288, 8192, 255, NULL, NULL }, + { + .name = "[VIA Apollo Pro] FIC KA-6130", + .internal_name = "ficka6130", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_VIA_APOLLO_PRO, + .init = machine_at_ficka6130_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 100000000, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[VIA Apollo Pro 133] ASUS P3V133", "p3v133", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_VIA_APOLLO_PRO_133, machine_at_p3v133_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 150000000, 1300, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 1572864, 8192, 255, NULL, NULL }, + { + .name = "[VIA Apollo Pro 133] ASUS P3V133", + .internal_name = "p3v133", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_VIA_APOLLO_PRO_133, + .init = machine_at_p3v133_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 150000000, + .min_voltage = 1300, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1572864, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[VIA Apollo Pro 133A] ASUS P3V4X", "p3v4x", MACHINE_TYPE_SLOT1, MACHINE_CHIPSET_VIA_APOLLO_PRO_133A, machine_at_p3v4x_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK_NONE, 66666667, 150000000, 1300, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 2097152, 8192, 255, NULL, NULL }, + { + .name = "[VIA Apollo Pro 133A] ASUS P3V4X", + .internal_name = "p3v4x", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_VIA_APOLLO_PRO_133A, + .init = machine_at_p3v4x_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 150000000, + .min_voltage = 1300, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 2097152, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Slot 1/2 machines */ /* 440GX */ /* Has a National Semiconductors PC87309 Super I/O chip with on-chip KBC with most likely AMIKey-2 KBC firmware. */ - { "[i440GX] Freeway FW-6400GX", "fw6400gx", MACHINE_TYPE_SLOT1_2, MACHINE_CHIPSET_INTEL_440GX, machine_at_fw6400gx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1 | CPU_PKG_SLOT2, CPU_BLOCK_NONE, 100000000, 150000000, 1800, 3500, 3.0, 8.0, MACHINE_PS2_NOISA, MACHINE_IDE_DUAL, 16384, 2080768, 16384, 511, NULL, NULL }, + { + .name = "[i440GX] Freeway FW-6400GX", + .internal_name = "fw6400gx", + .type = MACHINE_TYPE_SLOT1_2, + .chipset = MACHINE_CHIPSET_INTEL_440GX, + .init = machine_at_fw6400gx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1 | CPU_PKG_SLOT2, + .block = CPU_BLOCK_NONE, + .min_bus = 100000000, + .max_bus = 150000000, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 3.0, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_NOISA, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 16384, + .max = 2080768, + .step = 16384 + }, + .nvrmask = 511, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Slot 1/Socket 370 machines */ /* 440BX */ /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440BX] Tyan Trinity 371", "s1857", MACHINE_TYPE_SLOT1_370, MACHINE_CHIPSET_INTEL_440BX, machine_at_s1857_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1 | CPU_PKG_SOCKET370, CPU_BLOCK_NONE, 66666667, 133333333, 1300, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 786432, 8192, 255, at_s1857_get_device, NULL }, + { + .name = "[i440BX] Tyan Trinity 371", + .internal_name = "s1857", + .type = MACHINE_TYPE_SLOT1_370, + .chipset = MACHINE_CHIPSET_INTEL_440BX, + .init = machine_at_s1857_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1 | CPU_PKG_SOCKET370, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 133333333, + .min_voltage = 1300, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 786432, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &es1371_onboard_device, + .vid_device = NULL + }, /* Slot 2 machines */ /* 440GX */ /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440GX] Gigabyte GA-6GXU", "6gxu", MACHINE_TYPE_SLOT2, MACHINE_CHIPSET_INTEL_440GX, machine_at_6gxu_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT2, CPU_BLOCK_NONE, 100000000, 133333333, 1800, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 16384,2097152,16384, 511, NULL, NULL }, + { + .name = "[i440GX] Gigabyte GA-6GXU", + .internal_name = "6gxu", + .type = MACHINE_TYPE_SLOT2, + .chipset = MACHINE_CHIPSET_INTEL_440GX, + .init = machine_at_6gxu_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT2, + .block = CPU_BLOCK_NONE, + .min_bus = 100000000, + .max_bus = 133333333, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 16384, + .max = 2097152, + .step = 16384 + }, + .nvrmask = 511, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a Winbond W83977TF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440GX] Supermicro S2DGE", "s2dge", MACHINE_TYPE_SLOT2, MACHINE_CHIPSET_INTEL_440GX, machine_at_s2dge_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT2, CPU_BLOCK_NONE, 66666667, 100000000, 1800, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 16384,2097152,16384, 511, NULL, NULL }, + { + .name = "[i440GX] Supermicro S2DGE", + .internal_name = "s2dge", + .type = MACHINE_TYPE_SLOT2, + .chipset = MACHINE_CHIPSET_INTEL_440GX, + .init = machine_at_s2dge_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT2, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 100000000, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 16384, + .max = 2097152, + .step = 16384 + }, + .nvrmask = 511, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* PGA370 machines */ /* 440LX */ /* Has a Winbond W83977TF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440LX] Supermicro 370SLM", "s370slm", MACHINE_TYPE_SOCKET370, MACHINE_CHIPSET_INTEL_440LX, machine_at_s370slm_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET370, CPU_BLOCK_NONE, 66666667, 100000000, 1800, 3500, MACHINE_MULTIPLIER_FIXED, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 786432, 8192, 255, NULL, NULL }, + { + .name = "[i440LX] Supermicro 370SLM", + .internal_name = "s370slm", + .type = MACHINE_TYPE_SOCKET370, + .chipset = MACHINE_CHIPSET_INTEL_440LX, + .init = machine_at_s370slm_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET370, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 100000000, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = MACHINE_MULTIPLIER_FIXED, + .max_multi = MACHINE_MULTIPLIER_FIXED, + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 786432, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 440BX */ /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440BX] AEWIN AW-O671R", "awo671r", MACHINE_TYPE_SOCKET370, MACHINE_CHIPSET_INTEL_440BX, machine_at_awo671r_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET370, CPU_BLOCK_NONE, 66666667, 133333333, 1300, 3500, 1.5, 8.0, /* limits assumed */ MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 524288, 8192, 255, NULL, NULL }, + { + .name = "[i440BX] AEWIN AW-O671R", + .internal_name = "awo671r", + .type = MACHINE_TYPE_SOCKET370, + .chipset = MACHINE_CHIPSET_INTEL_440BX, + .init = machine_at_awo671r_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET370, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 133333333, + .min_voltage = 1300, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 /* limits assumed */ + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440BX] ASUS CUBX", "cubx", MACHINE_TYPE_SOCKET370, MACHINE_CHIPSET_INTEL_440BX, machine_at_cubx_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET370, CPU_BLOCK_NONE, 66666667, 150000000, 1300, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 1048576, 8192, 255, NULL, NULL }, + { + .name = "[i440BX] ASUS CUBX", + .internal_name = "cubx", + .type = MACHINE_TYPE_SOCKET370, + .chipset = MACHINE_CHIPSET_INTEL_440BX, + .init = machine_at_cubx_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET370, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 150000000, + .min_voltage = 1300, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440BX] AmazePC AM-BX133", "ambx133", MACHINE_TYPE_SOCKET370, MACHINE_CHIPSET_INTEL_440BX, machine_at_ambx133_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET370, CPU_BLOCK_NONE, 66666667, 133333333, 1300, 3500, 1.5, 8.0, /* limits assumed */ MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 786432, 8192, 255, NULL, NULL }, + { + .name = "[i440BX] AmazePC AM-BX133", + .internal_name = "ambx133", + .type = MACHINE_TYPE_SOCKET370, + .chipset = MACHINE_CHIPSET_INTEL_440BX, + .init = machine_at_ambx133_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET370, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 133333333, + .min_voltage = 1300, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 /* limits assumed */ + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 786432, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* 440ZX */ /* Has a Winbond W83977TF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440ZX] Soltek SL-63A1", "63a1", MACHINE_TYPE_SOCKET370, MACHINE_CHIPSET_INTEL_440ZX, machine_at_63a1_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET370, CPU_BLOCK_NONE, 66666667, 100000000, 1800, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 524288, 8192, 255, NULL, NULL }, + { + .name = "[i440ZX] Soltek SL-63A1", + .internal_name = "63a1", + .type = MACHINE_TYPE_SOCKET370, + .chipset = MACHINE_CHIPSET_INTEL_440ZX, + .init = machine_at_63a1_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET370, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 100000000, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* SMSC VictoryBX-66 */ /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[SMSC VictoryBX-66] A-Trend ATC7020BXII", "atc7020bxii", MACHINE_TYPE_SOCKET370, MACHINE_CHIPSET_SMSC_VICTORYBX_66, machine_at_atc7020bxii_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET370, CPU_BLOCK_NONE, 66666667, 133333333, 1300, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 1048576, 8192, 255, NULL, NULL }, + { + .name = "[SMSC VictoryBX-66] A-Trend ATC7020BXII", + .internal_name = "atc7020bxii", + .type = MACHINE_TYPE_SOCKET370, + .chipset = MACHINE_CHIPSET_SMSC_VICTORYBX_66, + .init = machine_at_atc7020bxii_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET370, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 133333333, + .min_voltage = 1300, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* VIA Apollo Pro */ /* Has the VIA VT82C586B southbridge with on-chip KBC identical to the VIA VT82C42N. */ - { "[VIA Apollo Pro] PC Partner APAS3", "apas3", MACHINE_TYPE_SOCKET370, MACHINE_CHIPSET_VIA_APOLLO_PRO, machine_at_apas3_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET370, CPU_BLOCK_NONE, 66666667, 100000000, 1800, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 786432, 8192, 255, NULL, NULL }, + { + .name = "[VIA Apollo Pro] PC Partner APAS3", + .internal_name = "apas3", + .type = MACHINE_TYPE_SOCKET370, + .chipset = MACHINE_CHIPSET_VIA_APOLLO_PRO, + .init = machine_at_apas3_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET370, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 100000000, + .min_voltage = 1800, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 786432, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[VIA Apollo Pro 133] ECS P6BAP", "p6bap", MACHINE_TYPE_SOCKET370, MACHINE_CHIPSET_VIA_APOLLO_PRO_133, machine_at_p6bap_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET370, CPU_BLOCK_NONE, 66666667, 150000000, 1300, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL, 8192, 1572864, 8192, 255, NULL, NULL }, + { + .name = "[VIA Apollo Pro 133] ECS P6BAP", + .internal_name = "p6bap", + .type = MACHINE_TYPE_SOCKET370, + .chipset = MACHINE_CHIPSET_VIA_APOLLO_PRO_133, + .init = machine_at_p6bap_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET370, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 150000000, + .min_voltage = 1300, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1572864, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has the VIA VT82C686B southbridge with on-chip KBC identical to the VIA VT82C42N. */ - { "[VIA Apollo Pro 133A] Acorp 6VIA90AP", "6via90ap", MACHINE_TYPE_SOCKET370, MACHINE_CHIPSET_VIA_APOLLO_PRO_133A, machine_at_6via90ap_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET370, CPU_BLOCK_NONE, 66666667, 150000000, 1300, 3500, MACHINE_MULTIPLIER_FIXED, MACHINE_PS2_A97, MACHINE_IDE_DUAL | MACHINE_AG, 16384, 3145728, 8192, 255, NULL, NULL }, + { + .name = "[VIA Apollo Pro 133A] Acorp 6VIA90AP", + .internal_name = "6via90ap", + .type = MACHINE_TYPE_SOCKET370, + .chipset = MACHINE_CHIPSET_VIA_APOLLO_PRO_133A, + .init = machine_at_6via90ap_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET370, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 150000000, + .min_voltage = 1300, + .max_voltage = 3500, + .min_multi = MACHINE_MULTIPLIER_FIXED, + .max_multi = MACHINE_MULTIPLIER_FIXED, + }, + .bus_flags = MACHINE_PS2_A97, + .flags = MACHINE_IDE_DUAL | MACHINE_AG, + .ram = { + .min = 16384, + .max = 3145728, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* Has the VIA VT82C686B southbridge with on-chip KBC identical to the VIA VT82C42N. */ - { "[VIA Apollo Pro 133A] ASUS CUV4X-LS", "cuv4xls", MACHINE_TYPE_SOCKET370, MACHINE_CHIPSET_VIA_APOLLO_PRO_133A, machine_at_cuv4xls_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET370, CPU_BLOCK_NONE, 66666667, 150000000, 1300, 3500, 1.5, 8.0, MACHINE_PS2_NOI97, MACHINE_IDE_DUAL | MACHINE_SOUND, 16384, 4194304, 8192, 255, at_cuv4xls_get_device, NULL }, + { + .name = "[VIA Apollo Pro 133A] ASUS CUV4X-LS", + .internal_name = "cuv4xls", + .type = MACHINE_TYPE_SOCKET370, + .chipset = MACHINE_CHIPSET_VIA_APOLLO_PRO_133A, + .init = machine_at_cuv4xls_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET370, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 150000000, + .min_voltage = 1300, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_NOI97, + .flags = MACHINE_IDE_DUAL | MACHINE_SOUND, + .ram = { + .min = 16384, + .max = 4194304, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &cmi8738_onboard_device, + .vid_device = NULL + }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[VIA Apollo Pro 133A] BCM GT694VA", "gt694va", MACHINE_TYPE_SOCKET370, MACHINE_CHIPSET_VIA_APOLLO_PRO_133A, machine_at_gt694va_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SOCKET370, CPU_BLOCK_NONE, 66666667, 133333333, 1300, 3500, 1.5, 8.0, MACHINE_PS2_AGP, MACHINE_IDE_DUAL | MACHINE_SOUND, 16384, 3145728, 8192, 255, at_gt694va_get_device, NULL }, + { + .name = "[VIA Apollo Pro 133A] BCM GT694VA", + .internal_name = "gt694va", + .type = MACHINE_TYPE_SOCKET370, + .chipset = MACHINE_CHIPSET_VIA_APOLLO_PRO_133A, + .init = machine_at_gt694va_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET370, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 133333333, + .min_voltage = 1300, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL | MACHINE_SOUND, + .ram = { + .min = 16384, + .max = 3145728, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &es1371_onboard_device, + .vid_device = NULL + }, /* Miscellaneous/Fake/Hypervisor machines */ /* Has a Winbond W83977F Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ - { "[i440BX] Microsoft Virtual PC 2007", "vpc2007", MACHINE_TYPE_MISC, MACHINE_CHIPSET_INTEL_440BX, machine_at_vpc2007_init, 0, 0, MACHINE_AVAILABLE, 0 , CPU_PKG_SLOT1, CPU_BLOCK(CPU_PENTIUM2, CPU_CYRIX3S), 0, 66666667, 0, 0, 0, 0, MACHINE_PS2_PCI, MACHINE_IDE_DUAL, 8192, 1048576, 8192, 255, NULL, NULL }, + { + .name = "[i440BX] Microsoft Virtual PC 2007", + .internal_name = "vpc2007", + .type = MACHINE_TYPE_MISC, + .chipset = MACHINE_CHIPSET_INTEL_440BX, + .init = machine_at_vpc2007_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK(CPU_PENTIUM2, CPU_CYRIX3S), + .min_bus = 0, + .max_bus = 66666667, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 1048576, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, - { NULL, NULL, MACHINE_TYPE_NONE, MACHINE_CHIPSET_NONE, NULL, 0, 0, MACHINE_AVAILABLE, 0 , 0, CPU_BLOCK_NONE, 0, 0, 0, 0, 0, 0, MACHINE_BUS_NONE, MACHINE_FLAGS_NONE, 0, 0, 0, 0, NULL, NULL } + { + .name = NULL, + .internal_name = NULL, + .type = MACHINE_TYPE_NONE, + .chipset = MACHINE_CHIPSET_NONE, + .init = NULL, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = 0, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_BUS_NONE, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 0, + .max = 0, + .step = 0 + }, + .nvrmask = 0, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + } }; int @@ -1040,8 +10919,8 @@ machine_getname_ex(int m) const device_t * machine_getdevice(int m) { - if (machines[m].get_device) - return(machines[m].get_device()); + if (machines[m].device) + return(machines[m].device); return(NULL); } @@ -1049,8 +10928,8 @@ machine_getdevice(int m) const device_t * machine_getviddevice(int m) { - if (machines[m].get_vid_device) - return(machines[m].get_vid_device()); + if (machines[m].vid_device) + return(machines[m].vid_device); return(NULL); } @@ -1094,23 +10973,23 @@ machine_has_cartridge(int m) int machine_get_min_ram(int m) { - return(machines[m].min_ram); + return(machines[m].ram.min); } int machine_get_max_ram(int m) { #if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)) - return MIN(((int) machines[m].max_ram), 2097152); + return MIN(((int) machines[m].ram.max), 2097152); #else - return MIN(((int) machines[m].max_ram), 3145728); + return MIN(((int) machines[m].ram.max), 3145728); #endif } int machine_get_ram_granularity(int m) { - return(machines[m].ram_granularity); + return(machines[m].ram.step); } int diff --git a/src/mem/spd.c b/src/mem/spd.c index aab1511d6..acc7ced9f 100644 --- a/src/mem/spd.c +++ b/src/mem/spd.c @@ -359,7 +359,7 @@ spd_write_drbs(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit /* No SPD: split SIMMs into pairs as if they were "DIMM"s. */ if (!spd_present) { dimm = ((reg_max - reg_min) + 1) >> 1; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */ - spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].max_ram >> 10) / dimm)), 0); + spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0); } /* Write DRBs for each row. */ @@ -411,7 +411,7 @@ spd_write_drbs_with_ext(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t /* No SPD: split SIMMs into pairs as if they were "DIMM"s. */ if (!spd_present) { dimm = ((reg_max - reg_min) + 1) >> 1; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */ - spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].max_ram >> 10) / dimm)), 0); + spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0); } /* Write DRBs for each row. */ @@ -462,7 +462,7 @@ spd_write_drbs_interleaved(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint /* No SPD: split SIMMs into pairs as if they were "DIMM"s. */ if (!spd_present) { dimm = ((reg_max - reg_min) + 1) >> 2; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */ - spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].max_ram >> 10) / dimm)), 0); + spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0); } /* Write DRBs for each row. */ @@ -514,7 +514,7 @@ spd_write_drbs_ali1621(uint8_t *regs, uint8_t reg_min, uint8_t reg_max) /* No SPD: split SIMMs into pairs as if they were "DIMM"s. */ if (!spd_present) { dimm = ((reg_max - reg_min) + 1) >> 2; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */ - spd_populate(rows, dimm, mem_size >> 10, 4, 1 << (log2i((machines[machine].max_ram >> 10) / dimm)), 0); + spd_populate(rows, dimm, mem_size >> 10, 4, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0); } /* Write DRBs for each row. */ From 0220a14e22c4a3898b3fb302123985bdd41c8246 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 19 Jul 2022 19:28:39 -0400 Subject: [PATCH 096/386] re-add the Soltek SL-56A5, it got lost --- src/machine/machine_table.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index a69cd71fc..1c32be8ec 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -8657,6 +8657,41 @@ const machine_t machines[] = { .device = NULL, .vid_device = NULL }, + /* Award BIOS, PS2, EDO, SDRAM, 4 PCI, 4 ISA, VIA VT82C42N KBC */ + { + .name = "[i430TX] Soltek SL-56A5", + .internal_name = "56a5", + .type = MACHINE_TYPE_SOCKET7, + .chipset = MACHINE_CHIPSET_INTEL_430TX, + .init = machine_at_56a5_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 55000000, + .max_bus = 75000000, + .min_voltage = 2800, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 5.5, + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 262144, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL + }, /* [TEST] Has AMIKey 'H' KBC firmware. */ { .name = "[i430TX] Supermicro P5MMS98", From 82a56024c4c8baad942b73f0f6f1a949a80b5bd8 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 19 Jul 2022 19:54:16 -0400 Subject: [PATCH 097/386] re-add the Kaypro PC, it got lost. --- src/machine/machine_table.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index a69cd71fc..7ed5dfbf7 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -644,6 +644,40 @@ const machine_t machines[] = { .device = NULL, .vid_device = NULL }, + { + .name = "[8088] Kaypro PC", + .internal_name = "kaypropc", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_kaypropc_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0, + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 128, + .max = 640, + .step = 64, + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, { .name = "[8088] Multitech PC-500", .internal_name = "pc500", From 3eeb83278c9135af105cafb0860feb16fdf7794c Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 19 Jul 2022 21:10:16 -0400 Subject: [PATCH 098/386] Add GDBStub to win32 makefile --- src/win/Makefile.mingw | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index b4b802bbb..75d1ddc95 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -31,6 +31,9 @@ ifeq ($(DEV_BUILD), y) ifndef DEBUG DEBUG := y endif + ifndef GDBSTUB + GDBSTUB := n + endif ifndef DEV_BRANCH DEV_BRANCH := y endif @@ -92,6 +95,9 @@ else ifndef DEBUG DEBUG := n endif + ifndef GDBSTUB + GDBSTUB := n + endif ifndef DEV_BRANCH DEV_BRANCH := n endif @@ -506,6 +512,10 @@ OPTS += -DUSE_OLIVETTI DEVBROBJ += olivetti_eva.o endif +ifeq ($(GDBSTUB), y) +OPTS += -DUSE_GDBSTUB +DEVBROBJ += gdbstub.o +endif endif From c5bce85a53bde682334f23915f8181e03b3e7280 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 20 Jul 2022 19:56:49 +0200 Subject: [PATCH 099/386] The FDC code now actually uses the DRQ. --- src/floppy/fdc.c | 44 ++++++++++++++++++++++++++++++++++++-------- 1 file changed, 36 insertions(+), 8 deletions(-) diff --git a/src/floppy/fdc.c b/src/floppy/fdc.c index a28328587..d86c0634c 100644 --- a/src/floppy/fdc.c +++ b/src/floppy/fdc.c @@ -314,8 +314,10 @@ fdc_request_next_sector_id(fdc_t *fdc) { if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) fdc->stat = 0xf0; - else + else { + dma_set_drq(fdc->dma_ch, 1); fdc->stat = 0xd0; + } } @@ -701,6 +703,8 @@ fdc_io_command_phase1(fdc_t *fdc, int out) fdc->stat = out ? 0x90 : 0x50; if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) fdc->stat |= 0x20; + else + dma_set_drq(fdc->dma_ch, 1); if (out) fdc->pos = 0; else @@ -1062,6 +1066,8 @@ fdc_write(uint16_t addr, uint8_t val, void *priv) fdc->specify[0] = fdc->params[0]; fdc->specify[1] = fdc->params[1]; fdc->dma = (fdc->specify[1] & 1) ^ 1; + if (!fdc->dma) + dma_set_drq(fdc->dma_ch, 0); break; case 0x04: /*Sense drive status*/ fdd_set_head(real_drive(fdc, fdc->drive), (fdc->params[0] & 4) ? 1 : 0); @@ -1287,7 +1293,6 @@ fdc_read(uint16_t addr, void *priv) ret = 0x00; /* TODO: Bit 2: INDEX (best return always 0 as it goes by very fast) - Bit 6: DRQ */ if (fdc->seek_dir) /* nDIRECTION */ ret |= 0x01; @@ -1299,6 +1304,8 @@ fdc_read(uint16_t addr, void *priv) ret |= 0x10; if (fdc->step) /* STEP */ ret |= 0x20; + if (dma_get_drq(fdc->dma_ch)) /* DRQ */ + ret |= 0x40; if (fdc->fintr || fdc->reset_stat) /* INTR */ ret |= 0x80; } else @@ -1504,6 +1511,7 @@ fdc_poll_common_finish(fdc_t *fdc, int compare, int st5) fdc_log("Read/write finish (%02X %02X %02X %02X %02X %02X %02X)\n" , fdc->res[4], fdc->res[5], fdc->res[6], fdc->res[7], fdc->res[8], fdc->res[9], fdc->res[10]); ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 0); fdc->paramstogo = 7; + dma_set_drq(fdc->dma_ch, 0); } @@ -1567,8 +1575,10 @@ fdc_callback(void *priv) fdd_readsector(real_drive(fdc, fdc->drive), SECTOR_NEXT, fdc->rw_track, fdc->head, fdc->rate, fdc->params[4]); if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) fdc->stat = 0x70; - else + else { + dma_set_drq(fdc->dma_ch, 1); fdc->stat = 0x50; + } } fdc->inread = 1; return; @@ -1684,8 +1694,10 @@ fdc_callback(void *priv) fdd_writesector(real_drive(fdc, fdc->drive), fdc->sector, fdc->rw_track, fdc->head, fdc->rate, fdc->params[4]); if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) fdc->stat = 0xb0; - else + else { + dma_set_drq(fdc->dma_ch, 1); fdc->stat = 0x90; + } break; case 6: case 0xC: @@ -1693,8 +1705,10 @@ fdc_callback(void *priv) fdd_readsector(real_drive(fdc, fdc->drive), fdc->sector, fdc->rw_track, fdc->head, fdc->rate, fdc->params[4]); if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) fdc->stat = 0x70; - else + else { + dma_set_drq(fdc->dma_ch, 1); fdc->stat = 0x50; + } break; case 0x11: case 0x19: @@ -1702,8 +1716,10 @@ fdc_callback(void *priv) fdd_comparesector(real_drive(fdc, fdc->drive), fdc->sector, fdc->rw_track, fdc->head, fdc->rate, fdc->params[4]); if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) fdc->stat = 0xb0; - else + else { + dma_set_drq(fdc->dma_ch, 1); fdc->stat = 0x90; + } break; } fdc->inread = 1; @@ -1809,6 +1825,7 @@ fdc_callback(void *priv) void fdc_error(fdc_t *fdc, int st5, int st6) { + dma_set_drq(fdc->dma_ch, 0); #if 1 timer_disable(&fdc->timer); @@ -1947,12 +1964,14 @@ fdc_data(fdc_t *fdc, uint8_t data, int last) if (!fdc->fifo || (fdc->tfifo < 1)) { fdc->data_ready = 1; fdc->stat = 0xd0; + dma_set_drq(fdc->dma_ch, 1); fdc->fifobufpos = 0; result = dma_channel_write(fdc->dma_ch, data); if (result & DMA_OVER) { + dma_set_drq(fdc->dma_ch, 0); fdc->tc = 1; return -1; } @@ -1963,6 +1982,7 @@ fdc_data(fdc_t *fdc, uint8_t data, int last) /* We have wrapped around, means FIFO is over */ fdc->data_ready = 1; fdc->stat = 0xd0; + dma_set_drq(fdc->dma_ch, 1); n = (fdc->fifobufpos > 0) ? (fdc->fifobufpos - 1) : fdc->tfifo; if (fdc->fifobufpos > 0) @@ -1972,6 +1992,7 @@ fdc_data(fdc_t *fdc, uint8_t data, int last) result = dma_channel_write(fdc->dma_ch, fdc->fifobuf[i]); if (result & DMA_OVER) { + dma_set_drq(fdc->dma_ch, 0); fdc->tc = 1; return -1; } @@ -2105,12 +2126,15 @@ int fdc_getdata(fdc_t *fdc, int last) } else { if (!fdc->fifo || (fdc->tfifo < 1)) { data = dma_channel_read(fdc->dma_ch); + dma_set_drq(fdc->dma_ch, 0); if (data & DMA_OVER) fdc->tc = 1; - if (!last) + if (!last) { fdc->stat = 0x90; + dma_set_drq(fdc->dma_ch, 1); + } } else { if (fdc->fifobufpos == 0) { for (i = 0; i <= fdc->tfifo; i++) { @@ -2118,6 +2142,7 @@ int fdc_getdata(fdc_t *fdc, int last) fdc->fifobuf[i] = data; if (data & DMA_OVER) { + dma_set_drq(fdc->dma_ch, 0); fdc->tc = 1; break; } @@ -2126,8 +2151,10 @@ int fdc_getdata(fdc_t *fdc, int last) data = fdc_fifo_buf_read(fdc); - if (!last && (fdc->fifobufpos == 0)) + if (!last && (fdc->fifobufpos == 0)) { + dma_set_drq(fdc->dma_ch, 1); fdc->stat = 0x90; + } } } @@ -2149,6 +2176,7 @@ fdc_sectorid(fdc_t *fdc, uint8_t track, uint8_t side, uint8_t sector, uint8_t si fdc->res[10] = size; ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 0); fdc->paramstogo = 7; + dma_set_drq(fdc->dma_ch, 0); } From e911cc5a34ec5208126bf4108620cd4dab781981 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 20 Jul 2022 23:40:51 +0200 Subject: [PATCH 100/386] A small FDC fix. --- src/floppy/fdc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/floppy/fdc.c b/src/floppy/fdc.c index d86c0634c..f9efbf645 100644 --- a/src/floppy/fdc.c +++ b/src/floppy/fdc.c @@ -1975,6 +1975,7 @@ fdc_data(fdc_t *fdc, uint8_t data, int last) fdc->tc = 1; return -1; } + dma_set_drq(fdc->dma_ch, 0); } else { /* FIFO enabled */ fdc_fifo_buf_write(fdc, data); @@ -1997,6 +1998,7 @@ fdc_data(fdc_t *fdc, uint8_t data, int last) return -1; } } + dma_set_drq(fdc->dma_ch, 0); } } } @@ -2147,6 +2149,7 @@ int fdc_getdata(fdc_t *fdc, int last) break; } } + dma_set_drq(fdc->dma_ch, 0); } data = fdc_fifo_buf_read(fdc); From c6d7f4a95b61ab9c749938cd39eeb2e010a12ccd Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 21 Jul 2022 19:51:34 +0200 Subject: [PATCH 101/386] Do not disable the timer in cpu_fast_off_reset() because the timers have already been reinitialized at this point. --- src/cpu/386_common.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c index 546da2aa3..6c09e588a 100644 --- a/src/cpu/386_common.c +++ b/src/cpu/386_common.c @@ -1870,9 +1870,6 @@ cpu_fast_off_period_set(uint16_t val, double period) void cpu_fast_off_reset(void) { - if (cpu_fast_off_timer) - timer_disable(cpu_fast_off_timer); - cpu_register_fast_off_handler(NULL); cpu_fast_off_period = 0.0; cpu_fast_off_advance(); From 8d0e6289c7074251ef168bc7a95cbb44e39df259 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Thu, 21 Jul 2022 20:49:47 -0400 Subject: [PATCH 102/386] Remove defunct externs from machine.h --- src/include/86box/machine.h | 84 ------------------------------------- 1 file changed, 84 deletions(-) diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index 1e93cbb1f..3f887e7a9 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -344,15 +344,6 @@ extern int machine_ppc512_init(const machine_t *); extern int machine_pc2086_init(const machine_t *); extern int machine_pc3086_init(const machine_t *); -#ifdef EMU_DEVICE_H -extern const device_t *pc1512_get_device(void); -extern const device_t *pc1640_get_device(void); -extern const device_t *pc200_get_device(void); -extern const device_t *ppc512_get_device(void); -extern const device_t *pc2086_get_device(void); -extern const device_t *pc3086_get_device(void); -#endif - /* m_at.c */ extern void machine_at_common_init_ex(const machine_t *, int type); extern void machine_at_common_init(const machine_t *); @@ -425,14 +416,6 @@ extern int machine_at_awardsx_init(const machine_t *); extern int machine_at_pc916sx_init(const machine_t *); -#ifdef EMU_DEVICE_H -extern const device_t *at_ama932j_get_device(void); -extern const device_t *at_flytech386_get_device(void); -extern const device_t *at_cmdsl386sx25_get_device(void); -extern const device_t *at_spc4620p_get_device(void); -extern const device_t *at_spc6033p_get_device(void); -#endif - /* m_at_386dx_486.c */ extern int machine_at_acc386_init(const machine_t *); extern int machine_at_asus386_init(const machine_t *); @@ -516,15 +499,6 @@ extern int machine_at_actionpc2600_init(const machine_t *); extern int machine_at_m919_init(const machine_t *); extern int machine_at_spc7700plw_init(const machine_t *); -#ifdef EMU_DEVICE_H -extern const device_t *at_acera1g_get_device(void); -extern const device_t *at_vect486vl_get_device(void); -extern const device_t *at_d824_get_device(void); -extern const device_t *at_pcs46c_get_device(void); -extern const device_t *at_valuepoint433_get_device(void); -extern const device_t *at_sbc490_get_device(void); -#endif - /* m_at_commodore.c */ extern int machine_at_cmdpc_init(const machine_t *); @@ -535,9 +509,6 @@ extern int machine_at_portableiii386_init(const machine_t *); #if defined(DEV_BRANCH) && defined(USE_DESKPRO386) extern int machine_at_deskpro386_init(const machine_t *); #endif -#ifdef EMU_DEVICE_H -extern const device_t *at_cpqiii_get_device(void); -#endif /* m_at_socket4.c */ extern void machine_at_premiere_common_init(const machine_t *, int); @@ -562,10 +533,6 @@ extern int machine_at_p5vl_init(const machine_t *); extern int machine_at_excaliburpci2_init(const machine_t *); extern int machine_at_p5sp4_init(const machine_t *); -#ifdef EMU_DEVICE_H -extern const device_t *at_pb520r_get_device(void); -#endif - /* m_at_socket5.c */ extern int machine_at_plato_init(const machine_t *); extern int machine_at_ambradp90_init(const machine_t *); @@ -609,14 +576,6 @@ extern int machine_at_gw2kte_init(const machine_t *); extern int machine_at_ap5s_init(const machine_t *); extern int machine_at_vectra54_init(const machine_t *); -#ifdef EMU_DEVICE_H -extern const device_t *at_endeavor_get_device(void); -#define at_vectra54_get_device at_endeavor_get_device -extern const device_t *at_thor_get_device(void); -#define at_mrthor_get_device at_thor_get_device -extern const device_t *at_pb640_get_device(void); -#endif - /* m_at_socket7.c */ extern int machine_at_acerv35n_init(const machine_t *); extern int machine_at_p55t2p4_init(const machine_t *); @@ -658,11 +617,6 @@ extern int machine_at_ms5146_init(const machine_t *); extern int machine_at_m560_init(const machine_t *); extern int machine_at_ms5164_init(const machine_t *); -#ifdef EMU_DEVICE_H -extern const device_t *at_presario2240_get_device(void); -#define at_presario4500_get_device at_presario2240_get_device -#endif - /* m_at_sockets7.c */ extern int machine_at_p5a_init(const machine_t *); extern int machine_at_m579_init(const machine_t *); @@ -718,14 +672,6 @@ extern int machine_at_vei8_init(const machine_t *); extern int machine_at_borapro_init(const machine_t *); extern int machine_at_ms6168_init(const machine_t *); -#ifdef EMU_DEVICE_H -extern const device_t *at_s1846_get_device(void); -#define at_s1857_get_device at_s1846_get_device -#define at_gt694va_get_device at_s1846_get_device -extern const device_t *at_ms6168_get_device(void); -#define at_borapro_get_device at_ms6168_get_device -#endif - /* m_at_slot2.c */ extern int machine_at_6gxu_init(const machine_t *); extern int machine_at_s2dge_init(const machine_t *); @@ -743,9 +689,6 @@ extern int machine_at_s370sba_init(const machine_t *); extern int machine_at_apas3_init(const machine_t *); extern int machine_at_gt694va_init(const machine_t *); extern int machine_at_cuv4xls_init(const machine_t *); -#ifdef EMU_DEVICE_H -extern const device_t *at_cuv4xls_get_device(void); -#endif extern int machine_at_6via90ap_init(const machine_t *); extern int machine_at_s1857_init(const machine_t *); extern int machine_at_p6bap_init(const machine_t *); @@ -764,22 +707,12 @@ extern const device_t europc_device; /* m_xt_olivetti.c */ extern int machine_xt_m24_init(const machine_t *); -#ifdef EMU_DEVICE_H -extern const device_t *m24_get_device(void); -#endif extern int machine_xt_m240_init(const machine_t *); extern int machine_xt_m19_init(const machine_t *); -#ifdef EMU_DEVICE_H -extern const device_t *m19_get_device(void); -#endif /* m_pcjr.c */ extern int machine_pcjr_init(const machine_t *); -#ifdef EMU_DEVICE_H -extern const device_t *pcjr_get_device(void); -#endif - /* m_ps1.c */ extern int machine_ps1_m2011_init(const machine_t *); extern int machine_ps1_m2121_init(const machine_t *); @@ -811,12 +744,6 @@ extern int machine_tandy1000sl2_init(const machine_t *); /* m_v86p.c */ extern int machine_v86p_init(const machine_t *); -#ifdef EMU_DEVICE_H -extern const device_t *tandy1k_get_device(void); -extern const device_t *tandy1k_hx_get_device(void); -extern const device_t *tandy1k_sl_get_device(void); -#endif - /* m_xt.c */ extern int machine_pc_init(const machine_t *); extern int machine_pc82_init(const machine_t *); @@ -866,24 +793,13 @@ extern int machine_xt_p3120_init(const machine_t *); extern int machine_xt_t1000_init(const machine_t *); extern int machine_xt_t1200_init(const machine_t *); -#ifdef EMU_DEVICE_H -extern const device_t *t1000_get_device(void); -extern const device_t *t1200_get_device(void); -#endif /* m_xt_zenith.c */ extern int machine_xt_z184_init(const machine_t *); -#ifdef EMU_DEVICE_H -extern const device_t *z184_get_device(void); -#endif extern int machine_xt_z151_init(const machine_t *); extern int machine_xt_z159_init(const machine_t *); /* m_xt_xi8088.c */ extern int machine_xt_xi8088_init(const machine_t *); -#ifdef EMU_DEVICE_H -extern const device_t *xi8088_get_device(void); -#endif - #endif /*EMU_MACHINE_H*/ From c430fbe84ca84255da009c59684b96ddd3ab19f9 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Thu, 21 Jul 2022 20:50:05 -0400 Subject: [PATCH 103/386] Assorted cleanups I've discovered over time --- src/acpi.c | 2 +- src/config.c | 1469 +++++++++++----------- src/cpu/cpu.c | 30 +- src/include/86box/nvr_ps2.h | 2 +- src/include/86box/vid_ega_render_remap.h | 108 +- src/pic.c | 1 - 6 files changed, 806 insertions(+), 806 deletions(-) diff --git a/src/acpi.c b/src/acpi.c index 470e24c41..db181cee8 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -1458,7 +1458,7 @@ acpi_apm_out(uint16_t port, uint8_t val, void *p) dev->apm->cmd = val; if (dev->vendor == VEN_INTEL) dev->regs.glbsts |= 0x20; - acpi_raise_smi(dev, dev->apm->do_smi); + acpi_raise_smi(dev, dev->apm->do_smi); } else dev->apm->stat = val; } diff --git a/src/config.c b/src/config.c index 723691157..9996ecc0a 100644 --- a/src/config.c +++ b/src/config.c @@ -25,6 +25,7 @@ * it on Windows XP, and possibly also Vista. Use the * -DANSI_CFG for use on these systems. */ + #include #include #include @@ -1522,53 +1523,53 @@ load_floppy_drives(void) int c; if (!backwards_compat) - return; + return; for (c=0; c 13) - fdd_set_type(c, 13); - config_delete_var(cat, temp); + sprintf(temp, "fdd_%02i_type", c+1); + p = config_get_string(cat, temp, (c < 2) ? "525_2dd" : "none"); + fdd_set_type(c, fdd_get_from_internal_name(p)); + if (fdd_get_type(c) > 13) + fdd_set_type(c, 13); + config_delete_var(cat, temp); - sprintf(temp, "fdd_%02i_fn", c + 1); - p = config_get_string(cat, temp, ""); - config_delete_var(cat, temp); + sprintf(temp, "fdd_%02i_fn", c + 1); + p = config_get_string(cat, temp, ""); + config_delete_var(cat, temp); #if 0 - /* - * NOTE: - * Temporary hack to remove the absolute - * path currently saved in most config - * files. We should remove this before - * finalizing this release! --FvK - */ - if (! wcsnicmp(wp, usr_path, wcslen(usr_path))) { - /* - * Yep, its absolute and prefixed - * with the EXE path. Just strip - * that off for now... - */ - wcsncpy(floppyfns[c], &wp[wcslen(usr_path)], sizeof_w(floppyfns[c])); - } else + /* + * NOTE: + * Temporary hack to remove the absolute + * path currently saved in most config + * files. We should remove this before + * finalizing this release! --FvK + */ + if (! wcsnicmp(wp, usr_path, wcslen(usr_path))) { + /* + * Yep, its absolute and prefixed + * with the EXE path. Just strip + * that off for now... + */ + wcsncpy(floppyfns[c], &wp[wcslen(usr_path)], sizeof_w(floppyfns[c])); + } else #endif - if (strlen(p) > 511) - fatal("load_floppy_drives(): strlen(p) > 511\n"); - else - strncpy(floppyfns[c], p, strlen(p) + 1); + if (strlen(p) > 511) + fatal("load_floppy_drives(): strlen(p) > 511\n"); + else + strncpy(floppyfns[c], p, strlen(p) + 1); - /* if (*wp != L'\0') - config_log("Floppy%d: %ls\n", c, floppyfns[c]); */ - sprintf(temp, "fdd_%02i_writeprot", c+1); - ui_writeprot[c] = !!config_get_int(cat, temp, 0); - config_delete_var(cat, temp); - sprintf(temp, "fdd_%02i_turbo", c + 1); - fdd_set_turbo(c, !!config_get_int(cat, temp, 0)); - config_delete_var(cat, temp); - sprintf(temp, "fdd_%02i_check_bpb", c+1); - fdd_set_check_bpb(c, !!config_get_int(cat, temp, 1)); - config_delete_var(cat, temp); + /* if (*wp != L'\0') + config_log("Floppy%d: %ls\n", c, floppyfns[c]); */ + sprintf(temp, "fdd_%02i_writeprot", c+1); + ui_writeprot[c] = !!config_get_int(cat, temp, 0); + config_delete_var(cat, temp); + sprintf(temp, "fdd_%02i_turbo", c + 1); + fdd_set_turbo(c, !!config_get_int(cat, temp, 0)); + config_delete_var(cat, temp); + sprintf(temp, "fdd_%02i_check_bpb", c+1); + fdd_set_check_bpb(c, !!config_get_int(cat, temp, 1)); + config_delete_var(cat, temp); } delete_section_if_empty(cat); @@ -1590,185 +1591,185 @@ load_floppy_and_cdrom_drives(void) memset(temp, 0x00, sizeof(temp)); for (c=0; c 13) - fdd_set_type(c, 13); + sprintf(temp, "fdd_%02i_type", c+1); + p = config_get_string(cat, temp, (c < 2) ? "525_2dd" : "none"); + fdd_set_type(c, fdd_get_from_internal_name(p)); + if (fdd_get_type(c) > 13) + fdd_set_type(c, 13); - sprintf(temp, "fdd_%02i_fn", c + 1); - p = config_get_string(cat, temp, ""); + sprintf(temp, "fdd_%02i_fn", c + 1); + p = config_get_string(cat, temp, ""); #if 0 - /* - * NOTE: - * Temporary hack to remove the absolute - * path currently saved in most config - * files. We should remove this before - * finalizing this release! --FvK - */ - if (! wcsnicmp(wp, usr_path, wcslen(usr_path))) { - /* - * Yep, its absolute and prefixed - * with the EXE path. Just strip - * that off for now... - */ - wcsncpy(floppyfns[c], &wp[wcslen(usr_path)], sizeof_w(floppyfns[c])); - } else + /* + * NOTE: + * Temporary hack to remove the absolute + * path currently saved in most config + * files. We should remove this before + * finalizing this release! --FvK + */ + if (! wcsnicmp(wp, usr_path, wcslen(usr_path))) { + /* + * Yep, its absolute and prefixed + * with the EXE path. Just strip + * that off for now... + */ + wcsncpy(floppyfns[c], &wp[wcslen(usr_path)], sizeof_w(floppyfns[c])); + } else #endif - if (strlen(p) > 511) - fatal("load_floppy_and_cdrom_drives(): strlen(p) > 511\n"); - else - strncpy(floppyfns[c], p, strlen(p) + 1); + if (strlen(p) > 511) + fatal("load_floppy_and_cdrom_drives(): strlen(p) > 511\n"); + else + strncpy(floppyfns[c], p, strlen(p) + 1); - /* if (*wp != L'\0') - config_log("Floppy%d: %ls\n", c, floppyfns[c]); */ - sprintf(temp, "fdd_%02i_writeprot", c+1); - ui_writeprot[c] = !!config_get_int(cat, temp, 0); - sprintf(temp, "fdd_%02i_turbo", c + 1); - fdd_set_turbo(c, !!config_get_int(cat, temp, 0)); - sprintf(temp, "fdd_%02i_check_bpb", c+1); - fdd_set_check_bpb(c, !!config_get_int(cat, temp, 1)); + /* if (*wp != L'\0') + config_log("Floppy%d: %ls\n", c, floppyfns[c]); */ + sprintf(temp, "fdd_%02i_writeprot", c+1); + ui_writeprot[c] = !!config_get_int(cat, temp, 0); + sprintf(temp, "fdd_%02i_turbo", c + 1); + fdd_set_turbo(c, !!config_get_int(cat, temp, 0)); + sprintf(temp, "fdd_%02i_check_bpb", c+1); + fdd_set_check_bpb(c, !!config_get_int(cat, temp, 1)); - /* Check whether each value is default, if yes, delete it so that only non-default values will later be saved. */ - if (fdd_get_type(c) == ((c < 2) ? 2 : 0)) { - sprintf(temp, "fdd_%02i_type", c+1); - config_delete_var(cat, temp); - } - if (strlen(floppyfns[c]) == 0) { - sprintf(temp, "fdd_%02i_fn", c+1); - config_delete_var(cat, temp); - } - if (ui_writeprot[c] == 0) { - sprintf(temp, "fdd_%02i_writeprot", c+1); - config_delete_var(cat, temp); - } - if (fdd_get_turbo(c) == 0) { - sprintf(temp, "fdd_%02i_turbo", c+1); - config_delete_var(cat, temp); - } - if (fdd_get_check_bpb(c) == 1) { - sprintf(temp, "fdd_%02i_check_bpb", c+1); - config_delete_var(cat, temp); - } + /* Check whether each value is default, if yes, delete it so that only non-default values will later be saved. */ + if (fdd_get_type(c) == ((c < 2) ? 2 : 0)) { + sprintf(temp, "fdd_%02i_type", c+1); + config_delete_var(cat, temp); + } + if (strlen(floppyfns[c]) == 0) { + sprintf(temp, "fdd_%02i_fn", c+1); + config_delete_var(cat, temp); + } + if (ui_writeprot[c] == 0) { + sprintf(temp, "fdd_%02i_writeprot", c+1); + config_delete_var(cat, temp); + } + if (fdd_get_turbo(c) == 0) { + sprintf(temp, "fdd_%02i_turbo", c+1); + config_delete_var(cat, temp); + } + if (fdd_get_check_bpb(c) == 1) { + sprintf(temp, "fdd_%02i_check_bpb", c+1); + config_delete_var(cat, temp); + } } memset(temp, 0x00, sizeof(temp)); for (c=0; c>1, (c+2)&1); - p = config_get_string(cat, temp, tmp2); - sscanf(p, "%01u:%01u", &board, &dev); - board &= 3; - dev &= 1; - cdrom[c].ide_channel = (board<<1)+dev; + if (cdrom[c].bus_type == CDROM_BUS_ATAPI) { + sprintf(temp, "cdrom_%02i_ide_channel", c+1); + sprintf(tmp2, "%01u:%01u", (c+2)>>1, (c+2)&1); + p = config_get_string(cat, temp, tmp2); + sscanf(p, "%01u:%01u", &board, &dev); + board &= 3; + dev &= 1; + cdrom[c].ide_channel = (board<<1)+dev; - if (cdrom[c].ide_channel > 7) - cdrom[c].ide_channel = 7; - } else if (cdrom[c].bus_type == CDROM_BUS_SCSI) { - sprintf(temp, "cdrom_%02i_scsi_location", c+1); - sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c+2); - p = config_get_string(cat, temp, tmp2); - sscanf(p, "%01u:%02u", &board, &dev); - if (board >= SCSI_BUS_MAX) { - /* Invalid bus - check legacy ID */ - sprintf(temp, "cdrom_%02i_scsi_id", c+1); - cdrom[c].scsi_device_id = config_get_int(cat, temp, c+2); + if (cdrom[c].ide_channel > 7) + cdrom[c].ide_channel = 7; + } else if (cdrom[c].bus_type == CDROM_BUS_SCSI) { + sprintf(temp, "cdrom_%02i_scsi_location", c+1); + sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c+2); + p = config_get_string(cat, temp, tmp2); + sscanf(p, "%01u:%02u", &board, &dev); + if (board >= SCSI_BUS_MAX) { + /* Invalid bus - check legacy ID */ + sprintf(temp, "cdrom_%02i_scsi_id", c+1); + cdrom[c].scsi_device_id = config_get_int(cat, temp, c+2); - if (cdrom[c].scsi_device_id > 15) - cdrom[c].scsi_device_id = 15; - } else { - board %= SCSI_BUS_MAX; - dev &= 15; - cdrom[c].scsi_device_id = (board<<4)+dev; - } - } + if (cdrom[c].scsi_device_id > 15) + cdrom[c].scsi_device_id = 15; + } else { + board %= SCSI_BUS_MAX; + dev &= 15; + cdrom[c].scsi_device_id = (board<<4)+dev; + } + } - if (cdrom[c].bus_type != CDROM_BUS_ATAPI) { - sprintf(temp, "cdrom_%02i_ide_channel", c+1); - config_delete_var(cat, temp); - } + if (cdrom[c].bus_type != CDROM_BUS_ATAPI) { + sprintf(temp, "cdrom_%02i_ide_channel", c+1); + config_delete_var(cat, temp); + } - if (cdrom[c].bus_type != CDROM_BUS_SCSI) { - sprintf(temp, "cdrom_%02i_scsi_location", c+1); - config_delete_var(cat, temp); - } + if (cdrom[c].bus_type != CDROM_BUS_SCSI) { + sprintf(temp, "cdrom_%02i_scsi_location", c+1); + config_delete_var(cat, temp); + } - sprintf(temp, "cdrom_%02i_scsi_id", c+1); - config_delete_var(cat, temp); + sprintf(temp, "cdrom_%02i_scsi_id", c+1); + config_delete_var(cat, temp); - sprintf(temp, "cdrom_%02i_image_path", c+1); - p = config_get_string(cat, temp, ""); + sprintf(temp, "cdrom_%02i_image_path", c+1); + p = config_get_string(cat, temp, ""); #if 0 - /* - * NOTE: - * Temporary hack to remove the absolute - * path currently saved in most config - * files. We should remove this before - * finalizing this release! --FvK - */ - if (! wcsnicmp(wp, usr_path, wcslen(usr_path))) { - /* - * Yep, its absolute and prefixed - * with the EXE path. Just strip - * that off for now... - */ - wcsncpy(cdrom[c].image_path, &wp[wcslen(usr_path)], sizeof_w(cdrom[c].image_path)); - } else + /* + * NOTE: + * Temporary hack to remove the absolute + * path currently saved in most config + * files. We should remove this before + * finalizing this release! --FvK + */ + if (! wcsnicmp(wp, usr_path, wcslen(usr_path))) { + /* + * Yep, its absolute and prefixed + * with the EXE path. Just strip + * that off for now... + */ + wcsncpy(cdrom[c].image_path, &wp[wcslen(usr_path)], sizeof_w(cdrom[c].image_path)); + } else #endif - strncpy(cdrom[c].image_path, p, sizeof(cdrom[c].image_path) - 1); + strncpy(cdrom[c].image_path, p, sizeof(cdrom[c].image_path) - 1); - if (cdrom[c].host_drive && (cdrom[c].host_drive != 200)) - cdrom[c].host_drive = 0; + if (cdrom[c].host_drive && (cdrom[c].host_drive != 200)) + cdrom[c].host_drive = 0; - if ((cdrom[c].host_drive == 0x200) && - (strlen(cdrom[c].image_path) == 0)) - cdrom[c].host_drive = 0; + if ((cdrom[c].host_drive == 0x200) && + (strlen(cdrom[c].image_path) == 0)) + cdrom[c].host_drive = 0; - /* If the CD-ROM is disabled, delete all its variables. */ - if (cdrom[c].bus_type == CDROM_BUS_DISABLED) { - sprintf(temp, "cdrom_%02i_host_drive", c+1); - config_delete_var(cat, temp); + /* If the CD-ROM is disabled, delete all its variables. */ + if (cdrom[c].bus_type == CDROM_BUS_DISABLED) { + sprintf(temp, "cdrom_%02i_host_drive", c+1); + config_delete_var(cat, temp); - sprintf(temp, "cdrom_%02i_parameters", c+1); - config_delete_var(cat, temp); + sprintf(temp, "cdrom_%02i_parameters", c+1); + config_delete_var(cat, temp); - sprintf(temp, "cdrom_%02i_ide_channel", c+1); - config_delete_var(cat, temp); + sprintf(temp, "cdrom_%02i_ide_channel", c+1); + config_delete_var(cat, temp); - sprintf(temp, "cdrom_%02i_scsi_id", c+1); - config_delete_var(cat, temp); + sprintf(temp, "cdrom_%02i_scsi_id", c+1); + config_delete_var(cat, temp); - sprintf(temp, "cdrom_%02i_image_path", c+1); - config_delete_var(cat, temp); - } + sprintf(temp, "cdrom_%02i_image_path", c+1); + config_delete_var(cat, temp); + } - sprintf(temp, "cdrom_%02i_iso_path", c+1); - config_delete_var(cat, temp); + sprintf(temp, "cdrom_%02i_iso_path", c+1); + config_delete_var(cat, temp); } } @@ -1785,268 +1786,268 @@ load_other_removable_devices(void) /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ if (backwards_compat) { - memset(temp, 0x00, sizeof(temp)); - for (c=0; c>1, (c+2)&1); - p = config_get_string(cat, temp, tmp2); - sscanf(p, "%01u:%01u", &board, &dev); - board &= 3; - dev &= 1; - cdrom[c].ide_channel = (board<<1)+dev; + if (cdrom[c].bus_type == CDROM_BUS_ATAPI) { + sprintf(temp, "cdrom_%02i_ide_channel", c+1); + sprintf(tmp2, "%01u:%01u", (c+2)>>1, (c+2)&1); + p = config_get_string(cat, temp, tmp2); + sscanf(p, "%01u:%01u", &board, &dev); + board &= 3; + dev &= 1; + cdrom[c].ide_channel = (board<<1)+dev; - if (cdrom[c].ide_channel > 7) - cdrom[c].ide_channel = 7; + if (cdrom[c].ide_channel > 7) + cdrom[c].ide_channel = 7; - config_delete_var(cat, temp); - } else if (cdrom[c].bus_type == CDROM_BUS_SCSI) { - sprintf(temp, "cdrom_%02i_scsi_id", c+1); - cdrom[c].scsi_device_id = config_get_int(cat, temp, c+2); + config_delete_var(cat, temp); + } else if (cdrom[c].bus_type == CDROM_BUS_SCSI) { + sprintf(temp, "cdrom_%02i_scsi_id", c+1); + cdrom[c].scsi_device_id = config_get_int(cat, temp, c+2); - if (cdrom[c].scsi_device_id > 15) - cdrom[c].scsi_device_id = 15; + if (cdrom[c].scsi_device_id > 15) + cdrom[c].scsi_device_id = 15; - config_delete_var(cat, temp); - } + config_delete_var(cat, temp); + } - sprintf(temp, "cdrom_%02i_image_path", c+1); - p = config_get_string(cat, temp, ""); - config_delete_var(cat, temp); + sprintf(temp, "cdrom_%02i_image_path", c+1); + p = config_get_string(cat, temp, ""); + config_delete_var(cat, temp); #if 0 - /* - * NOTE: - * Temporary hack to remove the absolute - * path currently saved in most config - * files. We should remove this before - * finalizing this release! --FvK - */ - if (! wcsnicmp(wp, usr_path, wcslen(usr_path))) { - /* - * Yep, its absolute and prefixed - * with the EXE path. Just strip - * that off for now... - */ - wcsncpy(cdrom[c].image_path, &wp[wcslen(usr_path)], sizeof_w(cdrom[c].image_path)); - } else + /* + * NOTE: + * Temporary hack to remove the absolute + * path currently saved in most config + * files. We should remove this before + * finalizing this release! --FvK + */ + if (! wcsnicmp(wp, usr_path, wcslen(usr_path))) { + /* + * Yep, its absolute and prefixed + * with the EXE path. Just strip + * that off for now... + */ + wcsncpy(cdrom[c].image_path, &wp[wcslen(usr_path)], sizeof_w(cdrom[c].image_path)); + } else #endif - strncpy(cdrom[c].image_path, p, sizeof(cdrom[c].image_path) - 1); + strncpy(cdrom[c].image_path, p, sizeof(cdrom[c].image_path) - 1); - if (cdrom[c].host_drive && (cdrom[c].host_drive != 200)) - cdrom[c].host_drive = 0; + if (cdrom[c].host_drive && (cdrom[c].host_drive != 200)) + cdrom[c].host_drive = 0; - if ((cdrom[c].host_drive == 0x200) && - (strlen(cdrom[c].image_path) == 0)) - cdrom[c].host_drive = 0; - } + if ((cdrom[c].host_drive == 0x200) && + (strlen(cdrom[c].image_path) == 0)) + cdrom[c].host_drive = 0; + } } backwards_compat = 0; memset(temp, 0x00, sizeof(temp)); for (c=0; c>1, (c+2)&1); - p = config_get_string(cat, temp, tmp2); - sscanf(p, "%01u:%01u", &board, &dev); - board &= 3; - dev &= 1; - zip_drives[c].ide_channel = (board<<1)+dev; + if (zip_drives[c].bus_type == ZIP_BUS_ATAPI) { + sprintf(temp, "zip_%02i_ide_channel", c+1); + sprintf(tmp2, "%01u:%01u", (c+2)>>1, (c+2)&1); + p = config_get_string(cat, temp, tmp2); + sscanf(p, "%01u:%01u", &board, &dev); + board &= 3; + dev &= 1; + zip_drives[c].ide_channel = (board<<1)+dev; - if (zip_drives[c].ide_channel > 7) - zip_drives[c].ide_channel = 7; - } else if (zip_drives[c].bus_type == ZIP_BUS_SCSI) { - sprintf(temp, "zip_%02i_scsi_location", c+1); - sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c+2); - p = config_get_string(cat, temp, tmp2); - sscanf(p, "%01u:%02u", &board, &dev); - if (board >= SCSI_BUS_MAX) { - /* Invalid bus - check legacy ID */ - sprintf(temp, "zip_%02i_scsi_id", c+1); - zip_drives[c].scsi_device_id = config_get_int(cat, temp, c+2); + if (zip_drives[c].ide_channel > 7) + zip_drives[c].ide_channel = 7; + } else if (zip_drives[c].bus_type == ZIP_BUS_SCSI) { + sprintf(temp, "zip_%02i_scsi_location", c+1); + sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c+2); + p = config_get_string(cat, temp, tmp2); + sscanf(p, "%01u:%02u", &board, &dev); + if (board >= SCSI_BUS_MAX) { + /* Invalid bus - check legacy ID */ + sprintf(temp, "zip_%02i_scsi_id", c+1); + zip_drives[c].scsi_device_id = config_get_int(cat, temp, c+2); - if (zip_drives[c].scsi_device_id > 15) - zip_drives[c].scsi_device_id = 15; - } else { - board %= SCSI_BUS_MAX; - dev &= 15; - zip_drives[c].scsi_device_id = (board<<4)+dev; - } - } + if (zip_drives[c].scsi_device_id > 15) + zip_drives[c].scsi_device_id = 15; + } else { + board %= SCSI_BUS_MAX; + dev &= 15; + zip_drives[c].scsi_device_id = (board<<4)+dev; + } + } - if (zip_drives[c].bus_type != ZIP_BUS_ATAPI) { - sprintf(temp, "zip_%02i_ide_channel", c+1); - config_delete_var(cat, temp); - } + if (zip_drives[c].bus_type != ZIP_BUS_ATAPI) { + sprintf(temp, "zip_%02i_ide_channel", c+1); + config_delete_var(cat, temp); + } - if (zip_drives[c].bus_type != ZIP_BUS_SCSI) { - sprintf(temp, "zip_%02i_scsi_location", c+1); - config_delete_var(cat, temp); - } + if (zip_drives[c].bus_type != ZIP_BUS_SCSI) { + sprintf(temp, "zip_%02i_scsi_location", c+1); + config_delete_var(cat, temp); + } - sprintf(temp, "zip_%02i_scsi_id", c+1); - config_delete_var(cat, temp); + sprintf(temp, "zip_%02i_scsi_id", c+1); + config_delete_var(cat, temp); - sprintf(temp, "zip_%02i_image_path", c+1); - p = config_get_string(cat, temp, ""); + sprintf(temp, "zip_%02i_image_path", c+1); + p = config_get_string(cat, temp, ""); #if 0 - /* - * NOTE: - * Temporary hack to remove the absolute - * path currently saved in most config - * files. We should remove this before - * finalizing this release! --FvK - */ - if (! wcsnicmp(wp, usr_path, wcslen(usr_path))) { - /* - * Yep, its absolute and prefixed - * with the EXE path. Just strip - * that off for now... - */ - wcsncpy(zip_drives[c].image_path, &wp[wcslen(usr_path)], sizeof_w(zip_drives[c].image_path)); - } else + /* + * NOTE: + * Temporary hack to remove the absolute + * path currently saved in most config + * files. We should remove this before + * finalizing this release! --FvK + */ + if (! wcsnicmp(wp, usr_path, wcslen(usr_path))) { + /* + * Yep, its absolute and prefixed + * with the EXE path. Just strip + * that off for now... + */ + wcsncpy(zip_drives[c].image_path, &wp[wcslen(usr_path)], sizeof_w(zip_drives[c].image_path)); + } else #endif - strncpy(zip_drives[c].image_path, p, sizeof(zip_drives[c].image_path) - 1); + strncpy(zip_drives[c].image_path, p, sizeof(zip_drives[c].image_path) - 1); - /* If the CD-ROM is disabled, delete all its variables. */ - if (zip_drives[c].bus_type == ZIP_BUS_DISABLED) { - sprintf(temp, "zip_%02i_host_drive", c+1); - config_delete_var(cat, temp); + /* If the CD-ROM is disabled, delete all its variables. */ + if (zip_drives[c].bus_type == ZIP_BUS_DISABLED) { + sprintf(temp, "zip_%02i_host_drive", c+1); + config_delete_var(cat, temp); - sprintf(temp, "zip_%02i_parameters", c+1); - config_delete_var(cat, temp); + sprintf(temp, "zip_%02i_parameters", c+1); + config_delete_var(cat, temp); - sprintf(temp, "zip_%02i_ide_channel", c+1); - config_delete_var(cat, temp); + sprintf(temp, "zip_%02i_ide_channel", c+1); + config_delete_var(cat, temp); - sprintf(temp, "zip_%02i_scsi_id", c+1); - config_delete_var(cat, temp); + sprintf(temp, "zip_%02i_scsi_id", c+1); + config_delete_var(cat, temp); - sprintf(temp, "zip_%02i_image_path", c+1); - config_delete_var(cat, temp); - } + sprintf(temp, "zip_%02i_image_path", c+1); + config_delete_var(cat, temp); + } - sprintf(temp, "zip_%02i_iso_path", c+1); - config_delete_var(cat, temp); + sprintf(temp, "zip_%02i_iso_path", c+1); + config_delete_var(cat, temp); } memset(temp, 0x00, sizeof(temp)); for (c=0; c>1, (c+2)&1); - p = config_get_string(cat, temp, tmp2); - sscanf(p, "%01u:%01u", &board, &dev); - board &= 3; - dev &= 1; - mo_drives[c].ide_channel = (board<<1)+dev; + if (mo_drives[c].bus_type == MO_BUS_ATAPI) { + sprintf(temp, "mo_%02i_ide_channel", c+1); + sprintf(tmp2, "%01u:%01u", (c+2)>>1, (c+2)&1); + p = config_get_string(cat, temp, tmp2); + sscanf(p, "%01u:%01u", &board, &dev); + board &= 3; + dev &= 1; + mo_drives[c].ide_channel = (board<<1)+dev; - if (mo_drives[c].ide_channel > 7) - mo_drives[c].ide_channel = 7; - } else if (mo_drives[c].bus_type == MO_BUS_SCSI) { - sprintf(temp, "mo_%02i_scsi_location", c+1); - sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c+2); - p = config_get_string(cat, temp, tmp2); - sscanf(p, "%01u:%02u", &board, &dev); - if (board >= SCSI_BUS_MAX) { - /* Invalid bus - check legacy ID */ - sprintf(temp, "mo_%02i_scsi_id", c+1); - mo_drives[c].scsi_device_id = config_get_int(cat, temp, c+2); + if (mo_drives[c].ide_channel > 7) + mo_drives[c].ide_channel = 7; + } else if (mo_drives[c].bus_type == MO_BUS_SCSI) { + sprintf(temp, "mo_%02i_scsi_location", c+1); + sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c+2); + p = config_get_string(cat, temp, tmp2); + sscanf(p, "%01u:%02u", &board, &dev); + if (board >= SCSI_BUS_MAX) { + /* Invalid bus - check legacy ID */ + sprintf(temp, "mo_%02i_scsi_id", c+1); + mo_drives[c].scsi_device_id = config_get_int(cat, temp, c+2); - if (mo_drives[c].scsi_device_id > 15) - mo_drives[c].scsi_device_id = 15; - } else { - board %= SCSI_BUS_MAX; - dev &= 15; - mo_drives[c].scsi_device_id = (board<<4)+dev; - } - } + if (mo_drives[c].scsi_device_id > 15) + mo_drives[c].scsi_device_id = 15; + } else { + board %= SCSI_BUS_MAX; + dev &= 15; + mo_drives[c].scsi_device_id = (board<<4)+dev; + } + } - if (mo_drives[c].bus_type != MO_BUS_ATAPI) { - sprintf(temp, "mo_%02i_ide_channel", c+1); - config_delete_var(cat, temp); - } + if (mo_drives[c].bus_type != MO_BUS_ATAPI) { + sprintf(temp, "mo_%02i_ide_channel", c+1); + config_delete_var(cat, temp); + } - if (mo_drives[c].bus_type != MO_BUS_SCSI) { - sprintf(temp, "mo_%02i_scsi_location", c+1); - config_delete_var(cat, temp); - } + if (mo_drives[c].bus_type != MO_BUS_SCSI) { + sprintf(temp, "mo_%02i_scsi_location", c+1); + config_delete_var(cat, temp); + } - sprintf(temp, "mo_%02i_scsi_id", c+1); - config_delete_var(cat, temp); + sprintf(temp, "mo_%02i_scsi_id", c+1); + config_delete_var(cat, temp); - sprintf(temp, "mo_%02i_image_path", c+1); - p = config_get_string(cat, temp, ""); + sprintf(temp, "mo_%02i_image_path", c+1); + p = config_get_string(cat, temp, ""); - strncpy(mo_drives[c].image_path, p, sizeof(mo_drives[c].image_path) - 1); + strncpy(mo_drives[c].image_path, p, sizeof(mo_drives[c].image_path) - 1); - /* If the CD-ROM is disabled, delete all its variables. */ - if (mo_drives[c].bus_type == MO_BUS_DISABLED) { - sprintf(temp, "mo_%02i_host_drive", c+1); - config_delete_var(cat, temp); + /* If the CD-ROM is disabled, delete all its variables. */ + if (mo_drives[c].bus_type == MO_BUS_DISABLED) { + sprintf(temp, "mo_%02i_host_drive", c+1); + config_delete_var(cat, temp); - sprintf(temp, "mo_%02i_parameters", c+1); - config_delete_var(cat, temp); + sprintf(temp, "mo_%02i_parameters", c+1); + config_delete_var(cat, temp); - sprintf(temp, "mo_%02i_ide_channel", c+1); - config_delete_var(cat, temp); + sprintf(temp, "mo_%02i_ide_channel", c+1); + config_delete_var(cat, temp); - sprintf(temp, "mo_%02i_scsi_id", c+1); - config_delete_var(cat, temp); + sprintf(temp, "mo_%02i_scsi_id", c+1); + config_delete_var(cat, temp); - sprintf(temp, "mo_%02i_image_path", c+1); - config_delete_var(cat, temp); - } + sprintf(temp, "mo_%02i_image_path", c+1); + config_delete_var(cat, temp); + } - sprintf(temp, "mo_%02i_iso_path", c+1); - config_delete_var(cat, temp); + sprintf(temp, "mo_%02i_iso_path", c+1); + config_delete_var(cat, temp); } } @@ -2061,54 +2062,54 @@ load_other_peripherals(void) int c, free_p = 0; if (backwards_compat2) { - p = config_get_string(cat, "scsicard", NULL); - if (p != NULL) - scsi_card_current[0] = scsi_card_get_from_internal_name(p); - else - scsi_card_current[0] = 0; - config_delete_var(cat, "scsicard"); + p = config_get_string(cat, "scsicard", NULL); + if (p != NULL) + scsi_card_current[0] = scsi_card_get_from_internal_name(p); + else + scsi_card_current[0] = 0; + config_delete_var(cat, "scsicard"); - p = config_get_string(cat, "fdc", NULL); - if (p != NULL) - fdc_type = fdc_card_get_from_internal_name(p); - else - fdc_type = FDC_INTERNAL; - config_delete_var(cat, "fdc"); + p = config_get_string(cat, "fdc", NULL); + if (p != NULL) + fdc_type = fdc_card_get_from_internal_name(p); + else + fdc_type = FDC_INTERNAL; + config_delete_var(cat, "fdc"); - p = config_get_string(cat, "hdc", NULL); - if (p == NULL) { - if (machine_has_flags(machine, MACHINE_HDC)) { - p = (char *)malloc((strlen("internal")+1)*sizeof(char)); - strcpy(p, "internal"); - } else { - p = (char *)malloc((strlen("none")+1)*sizeof(char)); - strcpy(p, "none"); - } - free_p = 1; - } - if (!strcmp(p, "mfm_xt")) - hdc_current = hdc_get_from_internal_name("st506_xt"); - else if (!strcmp(p, "mfm_xt_dtc5150x")) - hdc_current = hdc_get_from_internal_name("st506_xt_dtc5150x"); - else if (!strcmp(p, "mfm_at")) - hdc_current = hdc_get_from_internal_name("st506_at"); - else if (!strcmp(p, "vlb_isa")) - hdc_current = hdc_get_from_internal_name("ide_vlb"); - else if (!strcmp(p, "vlb_isa_2ch")) - hdc_current = hdc_get_from_internal_name("ide_vlb_2ch"); - else - hdc_current = hdc_get_from_internal_name(p); - config_delete_var(cat, "hdc"); + p = config_get_string(cat, "hdc", NULL); + if (p == NULL) { + if (machine_has_flags(machine, MACHINE_HDC)) { + p = (char *)malloc((strlen("internal")+1)*sizeof(char)); + strcpy(p, "internal"); + } else { + p = (char *)malloc((strlen("none")+1)*sizeof(char)); + strcpy(p, "none"); + } + free_p = 1; + } + if (!strcmp(p, "mfm_xt")) + hdc_current = hdc_get_from_internal_name("st506_xt"); + else if (!strcmp(p, "mfm_xt_dtc5150x")) + hdc_current = hdc_get_from_internal_name("st506_xt_dtc5150x"); + else if (!strcmp(p, "mfm_at")) + hdc_current = hdc_get_from_internal_name("st506_at"); + else if (!strcmp(p, "vlb_isa")) + hdc_current = hdc_get_from_internal_name("ide_vlb"); + else if (!strcmp(p, "vlb_isa_2ch")) + hdc_current = hdc_get_from_internal_name("ide_vlb_2ch"); + else + hdc_current = hdc_get_from_internal_name(p); + config_delete_var(cat, "hdc"); - if (free_p) { - free(p); - p = NULL; - } + if (free_p) { + free(p); + p = NULL; + } - ide_ter_enabled = !!config_get_int(cat, "ide_ter", 0); - config_delete_var(cat, "ide_ter"); - ide_qua_enabled = !!config_get_int(cat, "ide_qua", 0); - config_delete_var(cat, "ide_qua"); + ide_ter_enabled = !!config_get_int(cat, "ide_ter", 0); + config_delete_var(cat, "ide_ter"); + ide_qua_enabled = !!config_get_int(cat, "ide_qua", 0); + config_delete_var(cat, "ide_qua"); } backwards_compat2 = 0; @@ -2116,10 +2117,10 @@ load_other_peripherals(void) postcard_enabled = !!config_get_int(cat, "postcard_enabled", 0); for (c = 0; c < ISAMEM_MAX; c++) { - sprintf(temp, "isamem%d_type", c); + sprintf(temp, "isamem%d_type", c); - p = config_get_string(cat, temp, "none"); - isamem_type[c] = isamem_get_from_internal_name(p); + p = config_get_string(cat, temp, "none"); + isamem_type[c] = isamem_get_from_internal_name(p); } p = config_get_string(cat, "isartc_type", "none"); @@ -2143,86 +2144,86 @@ config_load(void) memset(zip_drives, 0, sizeof(zip_drive_t)); if (! config_read(cfg_path)) { - config_changed = 1; + config_changed = 1; - cpu_f = (cpu_family_t *) &cpu_families[0]; - cpu = 0; + cpu_f = (cpu_family_t *) &cpu_families[0]; + cpu = 0; - kbd_req_capture = 0; - hide_status_bar = 0; - hide_tool_bar = 0; - scale = 1; - machine = machine_get_machine_from_internal_name("ibmpc"); - dpi_scale = 1; + kbd_req_capture = 0; + hide_status_bar = 0; + hide_tool_bar = 0; + scale = 1; + machine = machine_get_machine_from_internal_name("ibmpc"); + dpi_scale = 1; - fpu_type = fpu_get_type(cpu_f, cpu, "none"); - gfxcard = video_get_video_from_internal_name("cga"); - vid_api = plat_vidapi("default"); - vid_resize = 0; - video_fullscreen_first = 1; - time_sync = TIME_SYNC_ENABLED; - hdc_current = hdc_get_from_internal_name("none"); + fpu_type = fpu_get_type(cpu_f, cpu, "none"); + gfxcard = video_get_video_from_internal_name("cga"); + vid_api = plat_vidapi("default"); + vid_resize = 0; + video_fullscreen_first = 1; + time_sync = TIME_SYNC_ENABLED; + hdc_current = hdc_get_from_internal_name("none"); - serial_enabled[0] = 1; - serial_enabled[1] = 1; - for (i = 2 ; i < SERIAL_MAX; i++) - serial_enabled[i] = 0; + serial_enabled[0] = 1; + serial_enabled[1] = 1; + for (i = 2 ; i < SERIAL_MAX; i++) + serial_enabled[i] = 0; - lpt_ports[0].enabled = 1; + lpt_ports[0].enabled = 1; - for (i = 1 ; i < PARALLEL_MAX; i++) - lpt_ports[i].enabled = 0; + for (i = 1 ; i < PARALLEL_MAX; i++) + lpt_ports[i].enabled = 0; - for (i = 0; i < FDD_NUM; i++) { - if (i < 2) - fdd_set_type(i, 2); - else - fdd_set_type(i, 0); + for (i = 0; i < FDD_NUM; i++) { + if (i < 2) + fdd_set_type(i, 2); + else + fdd_set_type(i, 0); - fdd_set_turbo(i, 0); - fdd_set_check_bpb(i, 1); - } + fdd_set_turbo(i, 0); + fdd_set_check_bpb(i, 1); + } - /* Unmute the CD audio on the first CD-ROM drive. */ - cdrom[0].sound_on = 1; - mem_size = 64; - isartc_type = 0; - for (i = 0; i < ISAMEM_MAX; i++) - isamem_type[i] = 0; + /* Unmute the CD audio on the first CD-ROM drive. */ + cdrom[0].sound_on = 1; + mem_size = 64; + isartc_type = 0; + for (i = 0; i < ISAMEM_MAX; i++) + isamem_type[i] = 0; /* TODO: Re-enable by default when we have a proper machine flag for this. */ - cassette_enable = 0; - memset(cassette_fname, 0x00, sizeof(cassette_fname)); - memcpy(cassette_mode, "load", strlen("load") + 1); - cassette_pos = 0; - cassette_srate = 44100; - cassette_append = 0; - cassette_pcm = 0; - cassette_ui_writeprot = 0; + cassette_enable = 0; + memset(cassette_fname, 0x00, sizeof(cassette_fname)); + memcpy(cassette_mode, "load", strlen("load") + 1); + cassette_pos = 0; + cassette_srate = 44100; + cassette_append = 0; + cassette_pcm = 0; + cassette_ui_writeprot = 0; - config_log("Config file not present or invalid!\n"); + config_log("Config file not present or invalid!\n"); } else { - load_general(); /* General */ - for (i = 0; i < MONITORS_NUM; i++) - load_monitor(i); - load_machine(); /* Machine */ - load_video(); /* Video */ - load_input_devices(); /* Input devices */ - load_sound(); /* Sound */ - load_network(); /* Network */ - load_ports(); /* Ports (COM & LPT) */ - load_storage_controllers(); /* Storage controllers */ - load_hard_disks(); /* Hard disks */ - load_floppy_and_cdrom_drives(); /* Floppy and CD-ROM drives */ - /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ - load_floppy_drives(); /* Floppy drives */ - load_other_removable_devices(); /* Other removable devices */ - load_other_peripherals(); /* Other peripherals */ + load_general(); /* General */ + for (i = 0; i < MONITORS_NUM; i++) + load_monitor(i); + load_machine(); /* Machine */ + load_video(); /* Video */ + load_input_devices(); /* Input devices */ + load_sound(); /* Sound */ + load_network(); /* Network */ + load_ports(); /* Ports (COM & LPT) */ + load_storage_controllers(); /* Storage controllers */ + load_hard_disks(); /* Hard disks */ + load_floppy_and_cdrom_drives(); /* Floppy and CD-ROM drives */ + /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ + load_floppy_drives(); /* Floppy drives */ + load_other_removable_devices(); /* Other removable devices */ + load_other_peripherals(); /* Other peripherals */ - /* Mark the configuration as changed. */ - config_changed = 1; + /* Mark the configuration as changed. */ + config_changed = 1; - config_log("Config loaded.\n\n"); + config_log("Config loaded.\n\n"); } video_copy = (video_grayscale || invert_display) ? video_transform_copy : memcpy; @@ -2240,157 +2241,157 @@ save_general(void) config_set_int(cat, "vid_resize", vid_resize); if (vid_resize == 0) - config_delete_var(cat, "vid_resize"); + config_delete_var(cat, "vid_resize"); va_name = plat_vidapi_name(vid_api); if (!strcmp(va_name, "default")) - config_delete_var(cat, "vid_renderer"); + config_delete_var(cat, "vid_renderer"); else - config_set_string(cat, "vid_renderer", va_name); + config_set_string(cat, "vid_renderer", va_name); if (video_fullscreen_scale == 0) - config_delete_var(cat, "video_fullscreen_scale"); - else - config_set_int(cat, "video_fullscreen_scale", video_fullscreen_scale); + config_delete_var(cat, "video_fullscreen_scale"); + else + config_set_int(cat, "video_fullscreen_scale", video_fullscreen_scale); if (video_fullscreen_first == 1) - config_delete_var(cat, "video_fullscreen_first"); - else - config_set_int(cat, "video_fullscreen_first", video_fullscreen_first); + config_delete_var(cat, "video_fullscreen_first"); + else + config_set_int(cat, "video_fullscreen_first", video_fullscreen_first); if (video_filter_method == 1) - config_delete_var(cat, "video_filter_method"); - else - config_set_int(cat, "video_filter_method", video_filter_method); + config_delete_var(cat, "video_filter_method"); + else + config_set_int(cat, "video_filter_method", video_filter_method); if (force_43 == 0) - config_delete_var(cat, "force_43"); - else - config_set_int(cat, "force_43", force_43); + config_delete_var(cat, "force_43"); + else + config_set_int(cat, "force_43", force_43); if (scale == 1) - config_delete_var(cat, "scale"); - else - config_set_int(cat, "scale", scale); + config_delete_var(cat, "scale"); + else + config_set_int(cat, "scale", scale); if (dpi_scale == 1) - config_delete_var(cat, "dpi_scale"); - else - config_set_int(cat, "dpi_scale", dpi_scale); + config_delete_var(cat, "dpi_scale"); + else + config_set_int(cat, "dpi_scale", dpi_scale); if (enable_overscan == 0) - config_delete_var(cat, "enable_overscan"); - else - config_set_int(cat, "enable_overscan", enable_overscan); + config_delete_var(cat, "enable_overscan"); + else + config_set_int(cat, "enable_overscan", enable_overscan); if (vid_cga_contrast == 0) - config_delete_var(cat, "vid_cga_contrast"); - else - config_set_int(cat, "vid_cga_contrast", vid_cga_contrast); + config_delete_var(cat, "vid_cga_contrast"); + else + config_set_int(cat, "vid_cga_contrast", vid_cga_contrast); if (video_grayscale == 0) - config_delete_var(cat, "video_grayscale"); - else - config_set_int(cat, "video_grayscale", video_grayscale); + config_delete_var(cat, "video_grayscale"); + else + config_set_int(cat, "video_grayscale", video_grayscale); if (video_graytype == 0) - config_delete_var(cat, "video_graytype"); - else - config_set_int(cat, "video_graytype", video_graytype); + config_delete_var(cat, "video_graytype"); + else + config_set_int(cat, "video_graytype", video_graytype); if (rctrl_is_lalt == 0) - config_delete_var(cat, "rctrl_is_lalt"); - else - config_set_int(cat, "rctrl_is_lalt", rctrl_is_lalt); + config_delete_var(cat, "rctrl_is_lalt"); + else + config_set_int(cat, "rctrl_is_lalt", rctrl_is_lalt); if (update_icons == 1) - config_delete_var(cat, "update_icons"); - else - config_set_int(cat, "update_icons", update_icons); + config_delete_var(cat, "update_icons"); + else + config_set_int(cat, "update_icons", update_icons); if (window_remember || (vid_resize & 2)) { - if (window_remember) - config_set_int(cat, "window_remember", window_remember); - else - config_delete_var(cat, "window_remember"); + if (window_remember) + config_set_int(cat, "window_remember", window_remember); + else + config_delete_var(cat, "window_remember"); } else - config_delete_var(cat, "window_remember"); + config_delete_var(cat, "window_remember"); if (vid_resize & 2) { - sprintf(temp, "%ix%i", fixed_size_x, fixed_size_y); - config_set_string(cat, "window_fixed_res", temp); + sprintf(temp, "%ix%i", fixed_size_x, fixed_size_y); + config_set_string(cat, "window_fixed_res", temp); } else - config_delete_var(cat, "window_fixed_res"); + config_delete_var(cat, "window_fixed_res"); if (sound_gain != 0) - config_set_int(cat, "sound_gain", sound_gain); + config_set_int(cat, "sound_gain", sound_gain); else - config_delete_var(cat, "sound_gain"); + config_delete_var(cat, "sound_gain"); if (kbd_req_capture != 0) - config_set_int(cat, "kbd_req_capture", kbd_req_capture); + config_set_int(cat, "kbd_req_capture", kbd_req_capture); else - config_delete_var(cat, "kbd_req_capture"); + config_delete_var(cat, "kbd_req_capture"); if (hide_status_bar != 0) - config_set_int(cat, "hide_status_bar", hide_status_bar); + config_set_int(cat, "hide_status_bar", hide_status_bar); else - config_delete_var(cat, "hide_status_bar"); + config_delete_var(cat, "hide_status_bar"); if (hide_tool_bar != 0) - config_set_int(cat, "hide_tool_bar", hide_tool_bar); + config_set_int(cat, "hide_tool_bar", hide_tool_bar); else - config_delete_var(cat, "hide_tool_bar"); + config_delete_var(cat, "hide_tool_bar"); if (confirm_reset != 1) - config_set_int(cat, "confirm_reset", confirm_reset); + config_set_int(cat, "confirm_reset", confirm_reset); else - config_delete_var(cat, "confirm_reset"); + config_delete_var(cat, "confirm_reset"); if (confirm_exit != 1) - config_set_int(cat, "confirm_exit", confirm_exit); + config_set_int(cat, "confirm_exit", confirm_exit); else - config_delete_var(cat, "confirm_exit"); + config_delete_var(cat, "confirm_exit"); if (confirm_save != 1) - config_set_int(cat, "confirm_save", confirm_save); + config_set_int(cat, "confirm_save", confirm_save); else - config_delete_var(cat, "confirm_save"); + config_delete_var(cat, "confirm_save"); if (mouse_sensitivity != 1.0) - config_set_double(cat, "mouse_sensitivity", mouse_sensitivity); + config_set_double(cat, "mouse_sensitivity", mouse_sensitivity); else - config_delete_var(cat, "mouse_sensitivity"); + config_delete_var(cat, "mouse_sensitivity"); if (lang_id == DEFAULT_LANGUAGE) - config_delete_var(cat, "language"); + config_delete_var(cat, "language"); else { - plat_language_code_r(lang_id, buffer, 511); - config_set_string(cat, "language", buffer); + plat_language_code_r(lang_id, buffer, 511); + config_set_string(cat, "language", buffer); } if (!strcmp(icon_set, "")) - config_delete_var(cat, "iconset"); + config_delete_var(cat, "iconset"); else - config_set_string(cat, "iconset", icon_set); + config_set_string(cat, "iconset", icon_set); if (enable_discord) - config_set_int(cat, "enable_discord", enable_discord); + config_set_int(cat, "enable_discord", enable_discord); else - config_delete_var(cat, "enable_discord"); + config_delete_var(cat, "enable_discord"); if (video_framerate != -1) - config_set_int(cat, "video_gl_framerate", video_framerate); + config_set_int(cat, "video_gl_framerate", video_framerate); else - config_delete_var(cat, "video_gl_framerate"); + config_delete_var(cat, "video_gl_framerate"); if (video_vsync != 0) - config_set_int(cat, "video_gl_vsync", video_vsync); + config_set_int(cat, "video_gl_vsync", video_vsync); else - config_delete_var(cat, "video_gl_vsync"); + config_delete_var(cat, "video_gl_vsync"); if (strlen(video_shader) > 0) - config_set_string(cat, "video_gl_shader", video_shader); + config_set_string(cat, "video_gl_shader", video_shader); else - config_delete_var(cat, "video_gl_shader"); + config_delete_var(cat, "video_gl_shader"); delete_section_if_empty(cat); } @@ -2411,9 +2412,9 @@ save_machine(void) config_set_int(cat, "cpu_speed", cpu_f->cpus[cpu].rspeed); config_set_double(cat, "cpu_multi", cpu_f->cpus[cpu].multi); if (cpu_override) - config_set_int(cat, "cpu_override", cpu_override); + config_set_int(cat, "cpu_override", cpu_override); else - config_delete_var(cat, "cpu_override"); + config_delete_var(cat, "cpu_override"); /* Forwards compatibility with the previous CPU model system. */ config_delete_var(cat, "cpu_manufacturer"); @@ -2422,62 +2423,62 @@ save_machine(void) /* Look for a machine entry on the legacy table. */ c = 0; while (cpu_legacy_table[c].machine) { - if (!strcmp(p, cpu_legacy_table[c].machine)) - break; - c++; + if (!strcmp(p, cpu_legacy_table[c].machine)) + break; + c++; } if (cpu_legacy_table[c].machine) { - /* Look for a corresponding CPU entry. */ - cpu_legacy_table_t *legacy_table_entry; - for (legacy_mfg = 0; legacy_mfg < 4; legacy_mfg++) { - if (!cpu_legacy_table[c].tables[legacy_mfg]) - continue; + /* Look for a corresponding CPU entry. */ + cpu_legacy_table_t *legacy_table_entry; + for (legacy_mfg = 0; legacy_mfg < 4; legacy_mfg++) { + if (!cpu_legacy_table[c].tables[legacy_mfg]) + continue; - i = 0; - while (cpu_legacy_table[c].tables[legacy_mfg][i].family) { - legacy_table_entry = (cpu_legacy_table_t *) &cpu_legacy_table[c].tables[legacy_mfg][i]; + i = 0; + while (cpu_legacy_table[c].tables[legacy_mfg][i].family) { + legacy_table_entry = (cpu_legacy_table_t *) &cpu_legacy_table[c].tables[legacy_mfg][i]; - /* Match the family name, speed and multiplier. */ - if (!strcmp(cpu_f->internal_name, legacy_table_entry->family)) { - if ((legacy_table_entry->rspeed == cpu_f->cpus[cpu].rspeed) && - (legacy_table_entry->multi == cpu_f->cpus[cpu].multi)) { /* exact speed/multiplier match */ - legacy_cpu = i; - break; - } else if ((legacy_table_entry->rspeed >= cpu_f->cpus[cpu].rspeed) && - (closest_legacy_cpu == -1)) { /* closest speed match */ - closest_legacy_cpu = i; - } - } + /* Match the family name, speed and multiplier. */ + if (!strcmp(cpu_f->internal_name, legacy_table_entry->family)) { + if ((legacy_table_entry->rspeed == cpu_f->cpus[cpu].rspeed) && + (legacy_table_entry->multi == cpu_f->cpus[cpu].multi)) { /* exact speed/multiplier match */ + legacy_cpu = i; + break; + } else if ((legacy_table_entry->rspeed >= cpu_f->cpus[cpu].rspeed) && + (closest_legacy_cpu == -1)) { /* closest speed match */ + closest_legacy_cpu = i; + } + } - i++; - } + i++; + } - /* Use the closest speed match if no exact match was found. */ - if ((legacy_cpu == -1) && (closest_legacy_cpu > -1)) { - legacy_cpu = closest_legacy_cpu; - break; - } else if (legacy_cpu > -1) /* exact match found */ - break; - } + /* Use the closest speed match if no exact match was found. */ + if ((legacy_cpu == -1) && (closest_legacy_cpu > -1)) { + legacy_cpu = closest_legacy_cpu; + break; + } else if (legacy_cpu > -1) /* exact match found */ + break; + } - /* Set legacy values if a match was found. */ - if (legacy_cpu > -1) { - if (legacy_mfg) - config_set_int(cat, "cpu_manufacturer", legacy_mfg); - if (legacy_cpu) - config_set_int(cat, "cpu", legacy_cpu); - } + /* Set legacy values if a match was found. */ + if (legacy_cpu > -1) { + if (legacy_mfg) + config_set_int(cat, "cpu_manufacturer", legacy_mfg); + if (legacy_cpu) + config_set_int(cat, "cpu", legacy_cpu); + } } if (cpu_waitstates == 0) - config_delete_var(cat, "cpu_waitstates"); - else - config_set_int(cat, "cpu_waitstates", cpu_waitstates); + config_delete_var(cat, "cpu_waitstates"); + else + config_set_int(cat, "cpu_waitstates", cpu_waitstates); if (fpu_type == 0) - config_delete_var(cat, "fpu_type"); + config_delete_var(cat, "fpu_type"); else - config_set_string(cat, "fpu_type", (char *) fpu_get_internal_name(cpu_f, cpu, fpu_type)); + config_set_string(cat, "fpu_type", (char *) fpu_get_internal_name(cpu_f, cpu, fpu_type)); //Write the mem_size explicitly to the setttings in order to help managers to display it without having the actual machine table config_delete_var(cat, "mem_size"); @@ -2486,12 +2487,12 @@ save_machine(void) config_set_int(cat, "cpu_use_dynarec", cpu_use_dynarec); if (time_sync & TIME_SYNC_ENABLED) - if (time_sync & TIME_SYNC_UTC) - config_set_string(cat, "time_sync", "utc"); - else - config_set_string(cat, "time_sync", "local"); + if (time_sync & TIME_SYNC_UTC) + config_set_string(cat, "time_sync", "utc"); + else + config_set_string(cat, "time_sync", "local"); else - config_set_string(cat, "time_sync", "disabled"); + config_set_string(cat, "time_sync", "disabled"); delete_section_if_empty(cat); } @@ -2504,27 +2505,27 @@ save_video(void) char *cat = "Video"; config_set_string(cat, "gfxcard", - video_get_internal_name(gfxcard)); + video_get_internal_name(gfxcard)); if (voodoo_enabled == 0) - config_delete_var(cat, "voodoo"); - else - config_set_int(cat, "voodoo", voodoo_enabled); + config_delete_var(cat, "voodoo"); + else + config_set_int(cat, "voodoo", voodoo_enabled); if (ibm8514_enabled == 0) - config_delete_var(cat, "8514a"); - else - config_set_int(cat, "8514a", ibm8514_enabled); + config_delete_var(cat, "8514a"); + else + config_set_int(cat, "8514a", ibm8514_enabled); if (xga_enabled == 0) - config_delete_var(cat, "xga"); - else - config_set_int(cat, "xga", xga_enabled); + config_delete_var(cat, "xga"); + else + config_set_int(cat, "xga", xga_enabled); if (gfxcard_2 == 0) - config_delete_var(cat, "gfxcard_2"); + config_delete_var(cat, "gfxcard_2"); else - config_set_string(cat, "gfxcard_2", video_get_internal_name(gfxcard_2)); + config_set_string(cat, "gfxcard_2", video_get_internal_name(gfxcard_2)); if (show_second_monitors == 1) config_delete_var(cat, "show_second_monitors"); @@ -2546,48 +2547,48 @@ save_input_devices(void) config_set_string(cat, "mouse_type", mouse_get_internal_name(mouse_type)); if (!joystick_type) { - config_delete_var(cat, "joystick_type"); + config_delete_var(cat, "joystick_type"); - for (c = 0; c < 16; c++) { - sprintf(tmp2, "joystick_%i_nr", c); - config_delete_var(cat, tmp2); + for (c = 0; c < 16; c++) { + sprintf(tmp2, "joystick_%i_nr", c); + config_delete_var(cat, tmp2); - for (d=0; d<16; d++) { - sprintf(tmp2, "joystick_%i_axis_%i", c, d); - config_delete_var(cat, tmp2); - } - for (d=0; d<16; d++) { - sprintf(tmp2, "joystick_%i_button_%i", c, d); - config_delete_var(cat, tmp2); - } - for (d=0; d<16; d++) { - sprintf(tmp2, "joystick_%i_pov_%i", c, d); - config_delete_var(cat, tmp2); - } - } + for (d=0; d<16; d++) { + sprintf(tmp2, "joystick_%i_axis_%i", c, d); + config_delete_var(cat, tmp2); + } + for (d=0; d<16; d++) { + sprintf(tmp2, "joystick_%i_button_%i", c, d); + config_delete_var(cat, tmp2); + } + for (d=0; d<16; d++) { + sprintf(tmp2, "joystick_%i_pov_%i", c, d); + config_delete_var(cat, tmp2); + } + } } else { - config_set_string(cat, "joystick_type", joystick_get_internal_name(joystick_type)); + config_set_string(cat, "joystick_type", joystick_get_internal_name(joystick_type)); - for (c = 0; c < joystick_get_max_joysticks(joystick_type); c++) { - sprintf(tmp2, "joystick_%i_nr", c); - config_set_int(cat, tmp2, joystick_state[c].plat_joystick_nr); + for (c = 0; c < joystick_get_max_joysticks(joystick_type); c++) { + sprintf(tmp2, "joystick_%i_nr", c); + config_set_int(cat, tmp2, joystick_state[c].plat_joystick_nr); - if (joystick_state[c].plat_joystick_nr) { - for (d=0; d= 2) && !serial_enabled[c])) - config_delete_var(cat, temp); - else - config_set_int(cat, temp, serial_enabled[c]); + sprintf(temp, "serial%d_enabled", c + 1); + if (((c < 2) && serial_enabled[c]) || ((c >= 2) && !serial_enabled[c])) + config_delete_var(cat, temp); + else + config_set_int(cat, temp, serial_enabled[c]); /* - sprintf(temp, "serial%d_type", c + 1); - if (!serial_enabled[c]) - config_delete_var(cat, temp); -// else -// config_set_string(cat, temp, (char *) serial_type[c]) + sprintf(temp, "serial%d_type", c + 1); + if (!serial_enabled[c]) + config_delete_var(cat, temp); +// else +// config_set_string(cat, temp, (char *) serial_type[c]) - sprintf(temp, "serial%d_device", c + 1); - if (com_ports[c].device == 0) - config_delete_var(cat, temp); - else - config_set_string(cat, temp, - (char *) com_device_get_internal_name(com_ports[c].device)); + sprintf(temp, "serial%d_device", c + 1); + if (com_ports[c].device == 0) + config_delete_var(cat, temp); + else + config_set_string(cat, temp, + (char *) com_device_get_internal_name(com_ports[c].device)); */ } for (c = 0; c < PARALLEL_MAX; c++) { - sprintf(temp, "lpt%d_enabled", c + 1); - d = (c == 0) ? 1 : 0; - if (lpt_ports[c].enabled == d) - config_delete_var(cat, temp); - else - config_set_int(cat, temp, lpt_ports[c].enabled); + sprintf(temp, "lpt%d_enabled", c + 1); + d = (c == 0) ? 1 : 0; + if (lpt_ports[c].enabled == d) + config_delete_var(cat, temp); + else + config_set_int(cat, temp, lpt_ports[c].enabled); - sprintf(temp, "lpt%d_device", c + 1); - if (lpt_ports[c].device == 0) - config_delete_var(cat, temp); - else - config_set_string(cat, temp, - (char *) lpt_device_get_internal_name(lpt_ports[c].device)); + sprintf(temp, "lpt%d_device", c + 1); + if (lpt_ports[c].device == 0) + config_delete_var(cat, temp); + else + config_set_string(cat, temp, + (char *) lpt_device_get_internal_name(lpt_ports[c].device)); } delete_section_if_empty(cat); diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index 2840e2cdf..68cf6c38f 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -51,21 +51,21 @@ enum { - CPUID_FPU = (1 << 0), - CPUID_VME = (1 << 1), - CPUID_PSE = (1 << 3), - CPUID_TSC = (1 << 4), - CPUID_MSR = (1 << 5), - CPUID_PAE = (1 << 6), - CPUID_MCE = (1 << 7), - CPUID_CMPXCHG8B = (1 << 8), - CPUID_AMDSEP = (1 << 10), - CPUID_SEP = (1 << 11), - CPUID_MTRR = (1 << 12), - CPUID_MCA = (1 << 14), - CPUID_CMOV = (1 << 15), - CPUID_MMX = (1 << 23), - CPUID_FXSR = (1 << 24) + CPUID_FPU = (1 << 0), + CPUID_VME = (1 << 1), + CPUID_PSE = (1 << 3), + CPUID_TSC = (1 << 4), + CPUID_MSR = (1 << 5), + CPUID_PAE = (1 << 6), + CPUID_MCE = (1 << 7), + CPUID_CMPXCHG8B = (1 << 8), + CPUID_AMDSEP = (1 << 10), + CPUID_SEP = (1 << 11), + CPUID_MTRR = (1 << 12), + CPUID_MCA = (1 << 14), + CPUID_CMOV = (1 << 15), + CPUID_MMX = (1 << 23), + CPUID_FXSR = (1 << 24) }; /*Addition flags returned by CPUID function 0x80000001*/ diff --git a/src/include/86box/nvr_ps2.h b/src/include/86box/nvr_ps2.h index fe3f141e2..0287cdd57 100644 --- a/src/include/86box/nvr_ps2.h +++ b/src/include/86box/nvr_ps2.h @@ -39,7 +39,7 @@ # define EMU_NVRPS2_H -extern const device_t ps2_nvr_device; +extern const device_t ps2_nvr_device; extern const device_t ps2_nvr_55ls_device; diff --git a/src/include/86box/vid_ega_render_remap.h b/src/include/86box/vid_ega_render_remap.h index b21233fbd..cae9a2b1d 100644 --- a/src/include/86box/vid_ega_render_remap.h +++ b/src/include/86box/vid_ega_render_remap.h @@ -10,44 +10,44 @@ #define VAR_ROW1_MA14 (1 << 3) #define ADDRESS_REMAP_FUNC(nr) \ - static uint32_t address_remap_func_ ## nr(ega_t *ega, uint32_t in_addr) \ - { \ - uint32_t out_addr; \ - \ - switch (nr & VAR_MODE_MASK) \ - { \ - case VAR_BYTE_MODE: \ - out_addr = in_addr; \ - break; \ - \ - case VAR_WORD_MODE_MA13: \ - out_addr = ((in_addr << 1) & 0x1fff8) | \ - ((in_addr >> 13) & 0x4) | \ - (in_addr & ~0x1ffff); \ - break; \ - \ - case VAR_WORD_MODE_MA15: \ - out_addr = ((in_addr << 1) & 0x1fff8) | \ - ((in_addr >> 15) & 0x4) | \ - (in_addr & ~0x1ffff); \ - break; \ - \ - case VAR_DWORD_MODE: \ - out_addr = ((in_addr << 2) & 0x3fff0) | \ - ((in_addr >> 14) & 0xc) | \ - (in_addr & ~0x3ffff); \ - break; \ - } \ - \ - if (nr & VAR_ROW0_MA13) \ - out_addr = (out_addr & ~0x8000) | \ - ((ega->sc & 1) ? 0x8000 : 0); \ - if (nr & VAR_ROW1_MA14) \ - out_addr = (out_addr & ~0x10000) | \ - ((ega->sc & 2) ? 0x10000 : 0); \ - \ - return out_addr; \ - } + static uint32_t address_remap_func_ ## nr(ega_t *ega, uint32_t in_addr) \ + { \ + uint32_t out_addr; \ + \ + switch (nr & VAR_MODE_MASK) \ + { \ + case VAR_BYTE_MODE: \ + out_addr = in_addr; \ + break; \ + \ + case VAR_WORD_MODE_MA13: \ + out_addr = ((in_addr << 1) & 0x1fff8) | \ + ((in_addr >> 13) & 0x4) | \ + (in_addr & ~0x1ffff); \ + break; \ + \ + case VAR_WORD_MODE_MA15: \ + out_addr = ((in_addr << 1) & 0x1fff8) | \ + ((in_addr >> 15) & 0x4) | \ + (in_addr & ~0x1ffff); \ + break; \ + \ + case VAR_DWORD_MODE: \ + out_addr = ((in_addr << 2) & 0x3fff0) | \ + ((in_addr >> 14) & 0xc) | \ + (in_addr & ~0x3ffff); \ + break; \ + } \ + \ + if (nr & VAR_ROW0_MA13) \ + out_addr = (out_addr & ~0x8000) | \ + ((ega->sc & 1) ? 0x8000 : 0); \ + if (nr & VAR_ROW1_MA14) \ + out_addr = (out_addr & ~0x10000) | \ + ((ega->sc & 2) ? 0x10000 : 0); \ + \ + return out_addr; \ + } ADDRESS_REMAP_FUNC(0) ADDRESS_REMAP_FUNC(1) @@ -68,22 +68,22 @@ ADDRESS_REMAP_FUNC(15) static uint32_t (*address_remap_funcs[16])(ega_t *ega, uint32_t in_addr) = { - address_remap_func_0, - address_remap_func_1, - address_remap_func_2, - address_remap_func_3, - address_remap_func_4, - address_remap_func_5, - address_remap_func_6, - address_remap_func_7, - address_remap_func_8, - address_remap_func_9, - address_remap_func_10, - address_remap_func_11, - address_remap_func_12, - address_remap_func_13, - address_remap_func_14, - address_remap_func_15 + address_remap_func_0, + address_remap_func_1, + address_remap_func_2, + address_remap_func_3, + address_remap_func_4, + address_remap_func_5, + address_remap_func_6, + address_remap_func_7, + address_remap_func_8, + address_remap_func_9, + address_remap_func_10, + address_remap_func_11, + address_remap_func_12, + address_remap_func_13, + address_remap_func_14, + address_remap_func_15 }; void ega_recalc_remap_func(ega_t *ega) diff --git a/src/pic.c b/src/pic.c index 13c13d6df..ca2bff2f7 100644 --- a/src/pic.c +++ b/src/pic.c @@ -61,7 +61,6 @@ static uint16_t smi_irq_mask = 0x0000, static void (*update_pending)(void); - #ifdef ENABLE_PIC_LOG int pic_do_log = ENABLE_PIC_LOG; From 02040ca0522967baee23c826885906b800f63abe Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Thu, 21 Jul 2022 21:44:55 -0400 Subject: [PATCH 104/386] Update config.c --- src/config.c | 2878 +++++++++++++++++++++++++------------------------- 1 file changed, 1416 insertions(+), 1462 deletions(-) diff --git a/src/config.c b/src/config.c index 9996ecc0a..c44c69d4a 100644 --- a/src/config.c +++ b/src/config.c @@ -1,29 +1,29 @@ /* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. * - * This file is part of the 86Box distribution. + * This file is part of the 86Box distribution. * - * Configuration file handler. + * Configuration file handler. * * * - * Authors: Sarah Walker, - * Miran Grca, - * Fred N. van Kempen, - * Overdoze, - * David Hrdlička, + * Authors: Sarah Walker, + * Miran Grca, + * Fred N. van Kempen, + * Overdoze, + * David Hrdlička, * - * Copyright 2008-2019 Sarah Walker. - * Copyright 2016-2019 Miran Grca. - * Copyright 2017-2019 Fred N. van Kempen. - * Copyright 2018,2019 David Hrdlička. + * Copyright 2008-2019 Sarah Walker. + * Copyright 2016-2019 Miran Grca. + * Copyright 2017-2019 Fred N. van Kempen. + * Copyright 2018,2019 David Hrdlička. * - * NOTE: Forcing config files to be in Unicode encoding breaks - * it on Windows XP, and possibly also Vista. Use the - * -DANSI_CFG for use on these systems. + * NOTE: Forcing config files to be in Unicode encoding breaks + * it on Windows XP, and possibly also Vista. Use the + * -DANSI_CFG for use on these systems. */ #include @@ -75,99 +75,95 @@ typedef struct _list_ { } list_t; typedef struct { - list_t list; + list_t list; - char name[128]; + char name[128]; - list_t entry_head; + list_t entry_head; } section_t; typedef struct { - list_t list; + list_t list; - char name[128]; - char data[512]; - wchar_t wdata[512]; + char name[128]; + char data[512]; + wchar_t wdata[512]; } entry_t; -#define list_add(new, head) { \ - list_t *next = head; \ - \ - while (next->next != NULL) \ - next = next->next; \ - \ - (next)->next = new; \ - (new)->next = NULL; \ -} +#define list_add(new, head) \ + { \ + list_t *next = head; \ + \ + while (next->next != NULL) \ + next = next->next; \ + \ + (next)->next = new; \ + (new)->next = NULL; \ + } -#define list_delete(old, head) { \ - list_t *next = head; \ - \ - while ((next)->next != old) { \ - next = (next)->next; \ - } \ - \ - (next)->next = (old)->next; \ - if ((next) == (head)) \ - (head)->next = (old)->next; \ -} +#define list_delete(old, head) \ + { \ + list_t *next = head; \ + \ + while ((next)->next != old) { \ + next = (next)->next; \ + } \ + \ + (next)->next = (old)->next; \ + if ((next) == (head)) \ + (head)->next = (old)->next; \ + } - -static list_t config_head; +static list_t config_head; /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ -static int backwards_compat = 0; -static int backwards_compat2 = 0; - +static int backwards_compat = 0; +static int backwards_compat2 = 0; #ifdef ENABLE_CONFIG_LOG int config_do_log = ENABLE_CONFIG_LOG; - static void config_log(const char *fmt, ...) { va_list ap; if (config_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define config_log(fmt, ...) +# define config_log(fmt, ...) #endif - static section_t * find_section(char *name) { section_t *sec; - char blank[] = ""; + char blank[] = ""; - sec = (section_t *)config_head.next; + sec = (section_t *) config_head.next; if (name == NULL) - name = blank; + name = blank; while (sec != NULL) { - if (! strncmp(sec->name, name, sizeof(sec->name))) - return(sec); + if (!strncmp(sec->name, name, sizeof(sec->name))) + return (sec); - sec = (section_t *)sec->list.next; + sec = (section_t *) sec->list.next; } - return(NULL); + return (NULL); } - void * config_find_section(char *name) { return (void *) find_section(name); } - void config_rename_section(void *priv, char *name) { @@ -177,58 +173,56 @@ config_rename_section(void *priv, char *name) memcpy(sec->name, name, MIN(128, strlen(name) + 1)); } - static entry_t * find_entry(section_t *section, char *name) { entry_t *ent; - ent = (entry_t *)section->entry_head.next; + ent = (entry_t *) section->entry_head.next; while (ent != NULL) { - if (! strncmp(ent->name, name, sizeof(ent->name))) - return(ent); + if (!strncmp(ent->name, name, sizeof(ent->name))) + return (ent); - ent = (entry_t *)ent->list.next; + ent = (entry_t *) ent->list.next; } - return(NULL); + return (NULL); } - static int entries_num(section_t *section) { entry_t *ent; - int i = 0; + int i = 0; - ent = (entry_t *)section->entry_head.next; + ent = (entry_t *) section->entry_head.next; while (ent != NULL) { - if (strlen(ent->name) > 0) i++; + if (strlen(ent->name) > 0) + i++; - ent = (entry_t *)ent->list.next; + ent = (entry_t *) ent->list.next; } - return(i); + return (i); } - static void delete_section_if_empty(char *head) { section_t *section; section = find_section(head); - if (section == NULL) return; + if (section == NULL) + return; if (entries_num(section) == 0) { - list_delete(§ion->list, &config_head); - free(section); + list_delete(§ion->list, &config_head); + free(section); } } - static section_t * create_section(char *name) { @@ -238,10 +232,9 @@ create_section(char *name) memcpy(ns->name, name, strlen(name) + 1); list_add(&ns->list, &config_head); - return(ns); + return (ns); } - static entry_t * create_entry(section_t *section, char *name) { @@ -251,10 +244,9 @@ create_entry(section_t *section, char *name) memcpy(ne->name, name, strlen(name) + 1); list_add(&ne->list, §ion->entry_head); - return(ne); + return (ne); } - #if 0 static void config_free(void) @@ -264,18 +256,18 @@ config_free(void) sec = (section_t *)config_head.next; while (sec != NULL) { - ns = (section_t *)sec->list.next; - ent = (entry_t *)sec->entry_head.next; + ns = (section_t *)sec->list.next; + ent = (entry_t *)sec->entry_head.next; - while (ent != NULL) { - entry_t *nent = (entry_t *)ent->list.next; + while (ent != NULL) { + entry_t *nent = (entry_t *)ent->list.next; - free(ent); - ent = nent; - } + free(ent); + ent = nent; + } - free(sec); - sec = ns; + free(sec); + sec = ns; } } #endif @@ -283,42 +275,46 @@ config_free(void) static int config_detect_bom(char *fn) { - FILE *f; - unsigned char bom[4] = { 0, 0, 0, 0 }; + FILE *f; + unsigned char bom[4] = { 0, 0, 0, 0 }; #if defined(ANSI_CFG) || !defined(_WIN32) f = plat_fopen(fn, "rt"); #else f = plat_fopen(fn, "rt, ccs=UTF-8"); #endif - if (f == NULL) return(0); - fread(bom, 1, 3, f); - if (bom[0] == 0xEF && bom[1] == 0xBB && bom[2] == 0xBF) - { - fclose(f); - return 1; - } - fclose(f); - return 0; + if (f == NULL) + return (0); + fread(bom, 1, 3, f); + if (bom[0] == 0xEF && bom[1] == 0xBB && bom[2] == 0xBF) { + fclose(f); + return 1; + } + fclose(f); + return 0; } #ifdef __HAIKU__ /* Local version of fgetws to avoid a crash */ -static wchar_t* -config_fgetws(wchar_t *str, int count, FILE* stream) +static wchar_t * +config_fgetws(wchar_t *str, int count, FILE *stream) { int i = 0; - if (feof(stream)) return NULL; + if (feof(stream)) + return NULL; for (i = 0; i < count; i++) { wint_t curChar = fgetwc(stream); if (curChar == WEOF) { - if (i + 1 < count) str[i + 1] = 0; + if (i + 1 < count) + str[i + 1] = 0; return feof(stream) ? str : NULL; } str[i] = curChar; - if (curChar == '\n') break; + if (curChar == '\n') + break; } - if (i + 1 < count) str[i + 1] = 0; + if (i + 1 < count) + str[i + 1] = 0; return str; } #endif @@ -327,120 +323,128 @@ config_fgetws(wchar_t *str, int count, FILE* stream) static int config_read(char *fn) { - char sname[128], ename[128]; - wchar_t buff[1024]; + char sname[128], ename[128]; + wchar_t buff[1024]; section_t *sec, *ns; - entry_t *ne; - int c, d, bom; - FILE *f; + entry_t *ne; + int c, d, bom; + FILE *f; - bom = config_detect_bom(fn); + bom = config_detect_bom(fn); #if defined(ANSI_CFG) || !defined(_WIN32) f = plat_fopen(fn, "rt"); #else f = plat_fopen(fn, "rt, ccs=UTF-8"); #endif - if (f == NULL) return(0); + if (f == NULL) + return (0); sec = malloc(sizeof(section_t)); memset(sec, 0x00, sizeof(section_t)); memset(&config_head, 0x00, sizeof(list_t)); list_add(&sec->list, &config_head); - if (bom) - fseek(f, 3, SEEK_SET); + if (bom) + fseek(f, 3, SEEK_SET); while (1) { - memset(buff, 0x00, sizeof(buff)); + memset(buff, 0x00, sizeof(buff)); #ifdef __HAIKU__ - config_fgetws(buff, sizeof_w(buff), f); + config_fgetws(buff, sizeof_w(buff), f); #else - fgetws(buff, sizeof_w(buff), f); + fgetws(buff, sizeof_w(buff), f); #endif - if (feof(f)) break; + if (feof(f)) + break; - /* Make sure there are no stray newlines or hard-returns in there. */ - if (wcslen(buff) > 0) - if (buff[wcslen(buff)-1] == L'\n') buff[wcslen(buff)-1] = L'\0'; - if (wcslen(buff) > 0) - if (buff[wcslen(buff)-1] == L'\r') buff[wcslen(buff)-1] = L'\0'; + /* Make sure there are no stray newlines or hard-returns in there. */ + if (wcslen(buff) > 0) + if (buff[wcslen(buff) - 1] == L'\n') + buff[wcslen(buff) - 1] = L'\0'; + if (wcslen(buff) > 0) + if (buff[wcslen(buff) - 1] == L'\r') + buff[wcslen(buff) - 1] = L'\0'; - /* Skip any leading whitespace. */ - c = 0; - while ((buff[c] == L' ') || (buff[c] == L'\t')) - c++; + /* Skip any leading whitespace. */ + c = 0; + while ((buff[c] == L' ') || (buff[c] == L'\t')) + c++; - /* Skip empty lines. */ - if (buff[c] == L'\0') continue; + /* Skip empty lines. */ + if (buff[c] == L'\0') + continue; - /* Skip lines that (only) have a comment. */ - if ((buff[c] == L'#') || (buff[c] == L';')) continue; + /* Skip lines that (only) have a comment. */ + if ((buff[c] == L'#') || (buff[c] == L';')) + continue; - if (buff[c] == L'[') { /*Section*/ - c++; - d = 0; - while (buff[c] != L']' && buff[c]) - wctomb(&(sname[d++]), buff[c++]); - sname[d] = L'\0'; + if (buff[c] == L'[') { /*Section*/ + c++; + d = 0; + while (buff[c] != L']' && buff[c]) + wctomb(&(sname[d++]), buff[c++]); + sname[d] = L'\0'; - /* Is the section name properly terminated? */ - if (buff[c] != L']') continue; + /* Is the section name properly terminated? */ + if (buff[c] != L']') + continue; - /* Create a new section and insert it. */ - ns = malloc(sizeof(section_t)); - memset(ns, 0x00, sizeof(section_t)); - memcpy(ns->name, sname, 128); - list_add(&ns->list, &config_head); + /* Create a new section and insert it. */ + ns = malloc(sizeof(section_t)); + memset(ns, 0x00, sizeof(section_t)); + memcpy(ns->name, sname, 128); + list_add(&ns->list, &config_head); - /* New section is now the current one. */ - sec = ns; - continue; - } + /* New section is now the current one. */ + sec = ns; + continue; + } - /* Get the variable name. */ - d = 0; - while ((buff[c] != L'=') && (buff[c] != L' ') && buff[c]) - wctomb(&(ename[d++]), buff[c++]); - ename[d] = L'\0'; + /* Get the variable name. */ + d = 0; + while ((buff[c] != L'=') && (buff[c] != L' ') && buff[c]) + wctomb(&(ename[d++]), buff[c++]); + ename[d] = L'\0'; - /* Skip incomplete lines. */ - if (buff[c] == L'\0') continue; + /* Skip incomplete lines. */ + if (buff[c] == L'\0') + continue; - /* Look for =, skip whitespace. */ - while ((buff[c] == L'=' || buff[c] == L' ') && buff[c]) - c++; + /* Look for =, skip whitespace. */ + while ((buff[c] == L'=' || buff[c] == L' ') && buff[c]) + c++; - /* Skip incomplete lines. */ - if (buff[c] == L'\0') continue; + /* Skip incomplete lines. */ + if (buff[c] == L'\0') + continue; - /* This is where the value part starts. */ - d = c; + /* This is where the value part starts. */ + d = c; - /* Allocate a new variable entry.. */ - ne = malloc(sizeof(entry_t)); - memset(ne, 0x00, sizeof(entry_t)); - memcpy(ne->name, ename, 128); - wcsncpy(ne->wdata, &buff[d], sizeof_w(ne->wdata)-1); - ne->wdata[sizeof_w(ne->wdata)-1] = L'\0'; -#ifdef _WIN32 /* Make sure the string is converted to UTF-8 rather than a legacy codepage */ - c16stombs(ne->data, ne->wdata, sizeof(ne->data)); + /* Allocate a new variable entry.. */ + ne = malloc(sizeof(entry_t)); + memset(ne, 0x00, sizeof(entry_t)); + memcpy(ne->name, ename, 128); + wcsncpy(ne->wdata, &buff[d], sizeof_w(ne->wdata) - 1); + ne->wdata[sizeof_w(ne->wdata) - 1] = L'\0'; +#ifdef _WIN32 /* Make sure the string is converted to UTF-8 rather than a legacy codepage */ + c16stombs(ne->data, ne->wdata, sizeof(ne->data)); #else - wcstombs(ne->data, ne->wdata, sizeof(ne->data)); + wcstombs(ne->data, ne->wdata, sizeof(ne->data)); #endif - ne->data[sizeof(ne->data)-1] = '\0'; + ne->data[sizeof(ne->data) - 1] = '\0'; - /* .. and insert it. */ - list_add(&ne->list, &sec->entry_head); + /* .. and insert it. */ + list_add(&ne->list, &sec->entry_head); } - (void)fclose(f); + (void) fclose(f); if (do_dump_config) - config_dump(); + config_dump(); - return(1); + return (1); } - /* * Write the in-memory configuration to disk. * This is a public function, because the Settings UI @@ -450,82 +454,81 @@ config_read(char *fn) void config_write(char *fn) { - wchar_t wtemp[512]; + wchar_t wtemp[512]; section_t *sec; - FILE *f; - int fl = 0; + FILE *f; + int fl = 0; #if defined(ANSI_CFG) || !defined(_WIN32) f = plat_fopen(fn, "wt"); #else f = plat_fopen(fn, "wt, ccs=UTF-8"); #endif - if (f == NULL) return; + if (f == NULL) + return; - sec = (section_t *)config_head.next; + sec = (section_t *) config_head.next; while (sec != NULL) { - entry_t *ent; + entry_t *ent; - if (sec->name[0]) { - mbstowcs(wtemp, sec->name, strlen(sec->name)+1); - if (fl) - fwprintf(f, L"\n[%ls]\n", wtemp); - else - fwprintf(f, L"[%ls]\n", wtemp); - fl++; - } + if (sec->name[0]) { + mbstowcs(wtemp, sec->name, strlen(sec->name) + 1); + if (fl) + fwprintf(f, L"\n[%ls]\n", wtemp); + else + fwprintf(f, L"[%ls]\n", wtemp); + fl++; + } - ent = (entry_t *)sec->entry_head.next; - while (ent != NULL) { - if (ent->name[0] != '\0') { - mbstowcs(wtemp, ent->name, 128); - if (ent->wdata[0] == L'\0') - fwprintf(f, L"%ls = \n", wtemp); - else - fwprintf(f, L"%ls = %ls\n", wtemp, ent->wdata); - fl++; - } + ent = (entry_t *) sec->entry_head.next; + while (ent != NULL) { + if (ent->name[0] != '\0') { + mbstowcs(wtemp, ent->name, 128); + if (ent->wdata[0] == L'\0') + fwprintf(f, L"%ls = \n", wtemp); + else + fwprintf(f, L"%ls = %ls\n", wtemp, ent->wdata); + fl++; + } - ent = (entry_t *)ent->list.next; - } + ent = (entry_t *) ent->list.next; + } - sec = (section_t *)sec->list.next; + sec = (section_t *) sec->list.next; } - (void)fclose(f); + (void) fclose(f); } - #if NOT_USED static void config_new(void) { -#if defined(ANSI_CFG) || !defined(_WIN32) +# if defined(ANSI_CFG) || !defined(_WIN32) FILE *f = _wfopen(config_file, L"wt"); -#else +# else FILE *f = _wfopen(config_file, L"wt, ccs=UTF-8"); -#endif +# endif if (file != NULL) - (void)fclose(f); + (void) fclose(f); } #endif - /* Load "General" section. */ static void load_general(void) { char *cat = "General"; - char temp[512]; + char temp[512]; char *p; vid_resize = config_get_int(cat, "vid_resize", 0); if (vid_resize & ~3) - vid_resize &= 3; + vid_resize &= 3; memset(temp, '\0', sizeof(temp)); - p = config_get_string(cat, "vid_renderer", "default"); + p = config_get_string(cat, "vid_renderer", "default"); vid_api = plat_vidapi(p); config_delete_var(cat, "vid_api"); @@ -536,580 +539,577 @@ load_general(void) video_filter_method = config_get_int(cat, "video_filter_method", 1); force_43 = !!config_get_int(cat, "force_43", 0); - scale = config_get_int(cat, "scale", 1); + scale = config_get_int(cat, "scale", 1); if (scale > 3) scale = 3; dpi_scale = config_get_int(cat, "dpi_scale", 1); - enable_overscan = !!config_get_int(cat, "enable_overscan", 0); + enable_overscan = !!config_get_int(cat, "enable_overscan", 0); vid_cga_contrast = !!config_get_int(cat, "vid_cga_contrast", 0); - video_grayscale = config_get_int(cat, "video_grayscale", 0); - video_graytype = config_get_int(cat, "video_graytype", 0); + video_grayscale = config_get_int(cat, "video_grayscale", 0); + video_graytype = config_get_int(cat, "video_graytype", 0); rctrl_is_lalt = config_get_int(cat, "rctrl_is_lalt", 0); - update_icons = config_get_int(cat, "update_icons", 1); + update_icons = config_get_int(cat, "update_icons", 1); window_remember = config_get_int(cat, "window_remember", 0); if (window_remember || (vid_resize & 2)) { - if (!window_remember) - config_delete_var(cat, "window_remember"); + if (!window_remember) + config_delete_var(cat, "window_remember"); } else { - config_delete_var(cat, "window_remember"); + config_delete_var(cat, "window_remember"); - window_w = window_h = window_x = window_y = 0; + window_w = window_h = window_x = window_y = 0; } if (vid_resize & 2) { - p = config_get_string(cat, "window_fixed_res", NULL); - if (p == NULL) - p = "120x120"; - sscanf(p, "%ix%i", &fixed_size_x, &fixed_size_y); - if (fixed_size_x < 120) - fixed_size_x = 120; - if (fixed_size_x > 2048) - fixed_size_x = 2048; - if (fixed_size_y < 120) - fixed_size_y = 120; - if (fixed_size_y > 2048) - fixed_size_y = 2048; + p = config_get_string(cat, "window_fixed_res", NULL); + if (p == NULL) + p = "120x120"; + sscanf(p, "%ix%i", &fixed_size_x, &fixed_size_y); + if (fixed_size_x < 120) + fixed_size_x = 120; + if (fixed_size_x > 2048) + fixed_size_x = 2048; + if (fixed_size_y < 120) + fixed_size_y = 120; + if (fixed_size_y > 2048) + fixed_size_y = 2048; } else { - config_delete_var(cat, "window_fixed_res"); + config_delete_var(cat, "window_fixed_res"); - fixed_size_x = fixed_size_y = 120; + fixed_size_x = fixed_size_y = 120; } sound_gain = config_get_int(cat, "sound_gain", 0); kbd_req_capture = config_get_int(cat, "kbd_req_capture", 0); hide_status_bar = config_get_int(cat, "hide_status_bar", 0); - hide_tool_bar = config_get_int(cat, "hide_tool_bar", 0); + hide_tool_bar = config_get_int(cat, "hide_tool_bar", 0); confirm_reset = config_get_int(cat, "confirm_reset", 1); - confirm_exit = config_get_int(cat, "confirm_exit", 1); - confirm_save = config_get_int(cat, "confirm_save", 1); + confirm_exit = config_get_int(cat, "confirm_exit", 1); + confirm_save = config_get_int(cat, "confirm_save", 1); p = config_get_string(cat, "language", NULL); if (p != NULL) - lang_id = plat_language_code(p); + lang_id = plat_language_code(p); mouse_sensitivity = config_get_double(cat, "mouse_sensitivity", 1.0); if (mouse_sensitivity < 0.5) - mouse_sensitivity = 0.5; + mouse_sensitivity = 0.5; else if (mouse_sensitivity > 2.0) - mouse_sensitivity = 2.0; + mouse_sensitivity = 2.0; p = config_get_string(cat, "iconset", NULL); if (p != NULL) - strcpy(icon_set, p); + strcpy(icon_set, p); else - strcpy(icon_set, ""); + strcpy(icon_set, ""); enable_discord = !!config_get_int(cat, "enable_discord", 0); video_framerate = config_get_int(cat, "video_gl_framerate", -1); - video_vsync = config_get_int(cat, "video_gl_vsync", 0); + video_vsync = config_get_int(cat, "video_gl_vsync", 0); strncpy(video_shader, config_get_string(cat, "video_gl_shader", ""), sizeof(video_shader)); } - /* Load "Machine" section. */ static void load_machine(void) { - char *cat = "Machine"; - char *p, *migrate_from = NULL; - int c, i, j, speed, legacy_mfg, legacy_cpu; + char *cat = "Machine"; + char *p, *migrate_from = NULL; + int c, i, j, speed, legacy_mfg, legacy_cpu; double multi; p = config_get_string(cat, "machine", NULL); if (p != NULL) { - migrate_from = p; - if (! strcmp(p, "8500ttc")) /* migrate typo... */ - machine = machine_get_machine_from_internal_name("8600ttc"); - else if (! strcmp(p, "eagle_pcspirit")) /* ...legacy names... */ - machine = machine_get_machine_from_internal_name("pcspirit"); - else if (! strcmp(p, "multitech_pc700")) - machine = machine_get_machine_from_internal_name("pc700"); - else if (! strcmp(p, "ncr_pc4i")) - machine = machine_get_machine_from_internal_name("pc4i"); - else if (! strcmp(p, "olivetti_m19")) - machine = machine_get_machine_from_internal_name("m19"); - else if (! strcmp(p, "open_xt")) - machine = machine_get_machine_from_internal_name("openxt"); - else if (! strcmp(p, "open_at")) - machine = machine_get_machine_from_internal_name("openat"); - else if (! strcmp(p, "philips_p3105")) - machine = machine_get_machine_from_internal_name("p3105"); - else if (! strcmp(p, "philips_p3120")) - machine = machine_get_machine_from_internal_name("p3120"); - else if (! strcmp(p, "olivetti_m24")) - machine = machine_get_machine_from_internal_name("m24"); - else if (! strcmp(p, "olivetti_m240")) - machine = machine_get_machine_from_internal_name("m240"); - else if (! strcmp(p, "ncr_pc8")) - machine = machine_get_machine_from_internal_name("pc8"); - else if (! strcmp(p, "olivetti_m290")) - machine = machine_get_machine_from_internal_name("m290"); - else if (! strcmp(p, "ncr_3302")) - machine = machine_get_machine_from_internal_name("3302"); - else if (! strcmp(p, "ncr_pc916sx")) - machine = machine_get_machine_from_internal_name("pc916sx"); - else if (! strcmp(p, "cbm_sl386sx16")) - machine = machine_get_machine_from_internal_name("cmdsl386sx16"); - else if (! strcmp(p, "cbm_sl386sx25")) - machine = machine_get_machine_from_internal_name("cmdsl386sx25"); - else if (! strcmp(p, "mr586")) - machine = machine_get_machine_from_internal_name("p54tp4xe_mr"); - else if (! strcmp(p, "pcv240")) - machine = machine_get_machine_from_internal_name("pcv90"); - else if (! strcmp(p, "v60n")) - machine = machine_get_machine_from_internal_name("acerv60n"); - else if (! strcmp(p, "tsunamiatx")) - machine = machine_get_machine_from_internal_name("s1846"); - else if (! strcmp(p, "trinity371")) - machine = machine_get_machine_from_internal_name("s1857"); - else if (! strcmp(p, "63a")) - machine = machine_get_machine_from_internal_name("63a1"); - else if (! strcmp(p, "4sa2")) - machine = machine_get_machine_from_internal_name("4saw2"); - else if (! strcmp(p, "award386dx")) /* ...merged machines... */ - machine = machine_get_machine_from_internal_name("award495"); - else if (! strcmp(p, "ami386dx")) - machine = machine_get_machine_from_internal_name("ami495"); - else if (! strcmp(p, "mr386dx")) - machine = machine_get_machine_from_internal_name("mr495"); - else if (! strcmp(p, "award486")) - machine = machine_get_machine_from_internal_name("award495"); - else if (! strcmp(p, "ami486")) - machine = machine_get_machine_from_internal_name("ami495"); - else if (! strcmp(p, "mr486")) - machine = machine_get_machine_from_internal_name("mr495"); - else if (! strcmp(p, "ibmps1_2121_isa")) - machine = machine_get_machine_from_internal_name("ibmps1_2121"); - else if (! strcmp(p, "fw6400gx_s1")) - machine = machine_get_machine_from_internal_name("fw6400gx"); - else if (! strcmp(p, "p54vl")) - machine = machine_get_machine_from_internal_name("p5vl"); - else if (! strcmp(p, "chariot")) - machine = machine_get_machine_from_internal_name("fmb"); - else if (! strcmp(p, "president")) { /* ...and removed machines */ - machine = machine_get_machine_from_internal_name("mb500n"); - migrate_from = NULL; - } else if (! strcmp(p, "j656vxd")) { - machine = machine_get_machine_from_internal_name("p55va"); - migrate_from = NULL; - } else { - machine = machine_get_machine_from_internal_name(p); - migrate_from = NULL; - } + migrate_from = p; + if (!strcmp(p, "8500ttc")) /* migrate typo... */ + machine = machine_get_machine_from_internal_name("8600ttc"); + else if (!strcmp(p, "eagle_pcspirit")) /* ...legacy names... */ + machine = machine_get_machine_from_internal_name("pcspirit"); + else if (!strcmp(p, "multitech_pc700")) + machine = machine_get_machine_from_internal_name("pc700"); + else if (!strcmp(p, "ncr_pc4i")) + machine = machine_get_machine_from_internal_name("pc4i"); + else if (!strcmp(p, "olivetti_m19")) + machine = machine_get_machine_from_internal_name("m19"); + else if (!strcmp(p, "open_xt")) + machine = machine_get_machine_from_internal_name("openxt"); + else if (!strcmp(p, "open_at")) + machine = machine_get_machine_from_internal_name("openat"); + else if (!strcmp(p, "philips_p3105")) + machine = machine_get_machine_from_internal_name("p3105"); + else if (!strcmp(p, "philips_p3120")) + machine = machine_get_machine_from_internal_name("p3120"); + else if (!strcmp(p, "olivetti_m24")) + machine = machine_get_machine_from_internal_name("m24"); + else if (!strcmp(p, "olivetti_m240")) + machine = machine_get_machine_from_internal_name("m240"); + else if (!strcmp(p, "ncr_pc8")) + machine = machine_get_machine_from_internal_name("pc8"); + else if (!strcmp(p, "olivetti_m290")) + machine = machine_get_machine_from_internal_name("m290"); + else if (!strcmp(p, "ncr_3302")) + machine = machine_get_machine_from_internal_name("3302"); + else if (!strcmp(p, "ncr_pc916sx")) + machine = machine_get_machine_from_internal_name("pc916sx"); + else if (!strcmp(p, "cbm_sl386sx16")) + machine = machine_get_machine_from_internal_name("cmdsl386sx16"); + else if (!strcmp(p, "cbm_sl386sx25")) + machine = machine_get_machine_from_internal_name("cmdsl386sx25"); + else if (!strcmp(p, "mr586")) + machine = machine_get_machine_from_internal_name("p54tp4xe_mr"); + else if (!strcmp(p, "pcv240")) + machine = machine_get_machine_from_internal_name("pcv90"); + else if (!strcmp(p, "v60n")) + machine = machine_get_machine_from_internal_name("acerv60n"); + else if (!strcmp(p, "tsunamiatx")) + machine = machine_get_machine_from_internal_name("s1846"); + else if (!strcmp(p, "trinity371")) + machine = machine_get_machine_from_internal_name("s1857"); + else if (!strcmp(p, "63a")) + machine = machine_get_machine_from_internal_name("63a1"); + else if (!strcmp(p, "4sa2")) + machine = machine_get_machine_from_internal_name("4saw2"); + else if (!strcmp(p, "award386dx")) /* ...merged machines... */ + machine = machine_get_machine_from_internal_name("award495"); + else if (!strcmp(p, "ami386dx")) + machine = machine_get_machine_from_internal_name("ami495"); + else if (!strcmp(p, "mr386dx")) + machine = machine_get_machine_from_internal_name("mr495"); + else if (!strcmp(p, "award486")) + machine = machine_get_machine_from_internal_name("award495"); + else if (!strcmp(p, "ami486")) + machine = machine_get_machine_from_internal_name("ami495"); + else if (!strcmp(p, "mr486")) + machine = machine_get_machine_from_internal_name("mr495"); + else if (!strcmp(p, "ibmps1_2121_isa")) + machine = machine_get_machine_from_internal_name("ibmps1_2121"); + else if (!strcmp(p, "fw6400gx_s1")) + machine = machine_get_machine_from_internal_name("fw6400gx"); + else if (!strcmp(p, "p54vl")) + machine = machine_get_machine_from_internal_name("p5vl"); + else if (!strcmp(p, "chariot")) + machine = machine_get_machine_from_internal_name("fmb"); + else if (!strcmp(p, "president")) { /* ...and removed machines */ + machine = machine_get_machine_from_internal_name("mb500n"); + migrate_from = NULL; + } else if (!strcmp(p, "j656vxd")) { + machine = machine_get_machine_from_internal_name("p55va"); + migrate_from = NULL; + } else { + machine = machine_get_machine_from_internal_name(p); + migrate_from = NULL; + } } else - machine = 0; + machine = 0; /* This is for backwards compatibility. */ p = config_get_string(cat, "model", NULL); if (p != NULL) { - migrate_from = p; - if (! strcmp(p, "p55r2p4")) /* migrate typo */ - machine = machine_get_machine_from_internal_name("p55t2p4"); - else { - machine = machine_get_machine_from_internal_name(p); - migrate_from = NULL; - } - config_delete_var(cat, "model"); + migrate_from = p; + if (!strcmp(p, "p55r2p4")) /* migrate typo */ + machine = machine_get_machine_from_internal_name("p55t2p4"); + else { + machine = machine_get_machine_from_internal_name(p); + migrate_from = NULL; + } + config_delete_var(cat, "model"); } if (machine >= machine_count()) - machine = machine_count() - 1; + machine = machine_count() - 1; /* Copy NVR files when migrating a machine to a new internal name. */ if (migrate_from) { - char old_fn[256]; - strcpy(old_fn, migrate_from); - strcat(old_fn, "."); - c = strlen(old_fn); - char new_fn[256]; - strcpy(new_fn, machines[machine].internal_name); - strcat(new_fn, "."); - i = strlen(new_fn); + char old_fn[256]; + strcpy(old_fn, migrate_from); + strcat(old_fn, "."); + c = strlen(old_fn); + char new_fn[256]; + strcpy(new_fn, machines[machine].internal_name); + strcat(new_fn, "."); + i = strlen(new_fn); - /* Iterate through NVR files. */ - DIR *dirp = opendir(nvr_path(".")); - if (dirp) { - struct dirent *entry; - while ((entry = readdir(dirp))) { - /* Check if this file corresponds to the old name. */ - if (strncmp(entry->d_name, old_fn, c)) - continue; + /* Iterate through NVR files. */ + DIR *dirp = opendir(nvr_path(".")); + if (dirp) { + struct dirent *entry; + while ((entry = readdir(dirp))) { + /* Check if this file corresponds to the old name. */ + if (strncmp(entry->d_name, old_fn, c)) + continue; - /* Add extension to the new name. */ - strcpy(&new_fn[i], &entry->d_name[c]); + /* Add extension to the new name. */ + strcpy(&new_fn[i], &entry->d_name[c]); - /* Only copy if a file with the new name doesn't already exist. */ - FILE *g = nvr_fopen(new_fn, "rb"); - if (!g) { - FILE *f = nvr_fopen(entry->d_name, "rb"); - g = nvr_fopen(new_fn, "wb"); + /* Only copy if a file with the new name doesn't already exist. */ + FILE *g = nvr_fopen(new_fn, "rb"); + if (!g) { + FILE *f = nvr_fopen(entry->d_name, "rb"); + g = nvr_fopen(new_fn, "wb"); - uint8_t buf[4096]; - while ((j = fread(buf, 1, sizeof(buf), f))) - fwrite(buf, 1, j, g); + uint8_t buf[4096]; + while ((j = fread(buf, 1, sizeof(buf), f))) + fwrite(buf, 1, j, g); - fclose(f); - } - fclose(g); - } - } + fclose(f); + } + fclose(g); + } + } } cpu_override = config_get_int(cat, "cpu_override", 0); - cpu_f = NULL; - p = config_get_string(cat, "cpu_family", NULL); + cpu_f = NULL; + p = config_get_string(cat, "cpu_family", NULL); if (p) { - if (! strcmp(p, "enh_am486dx2")) /* migrate modified names */ - cpu_f = cpu_get_family("am486dx2_slenh"); - else if (! strcmp(p, "enh_am486dx4")) - cpu_f = cpu_get_family("am486dx4_slenh"); - else - cpu_f = cpu_get_family(p); + if (!strcmp(p, "enh_am486dx2")) /* migrate modified names */ + cpu_f = cpu_get_family("am486dx2_slenh"); + else if (!strcmp(p, "enh_am486dx4")) + cpu_f = cpu_get_family("am486dx4_slenh"); + else + cpu_f = cpu_get_family(p); - if (cpu_f && !cpu_family_is_eligible(cpu_f, machine)) /* only honor eligible families */ - cpu_f = NULL; + if (cpu_f && !cpu_family_is_eligible(cpu_f, machine)) /* only honor eligible families */ + cpu_f = NULL; } else { - /* Backwards compatibility with the previous CPU model system. */ - legacy_mfg = config_get_int(cat, "cpu_manufacturer", 0); - legacy_cpu = config_get_int(cat, "cpu", 0); + /* Backwards compatibility with the previous CPU model system. */ + legacy_mfg = config_get_int(cat, "cpu_manufacturer", 0); + legacy_cpu = config_get_int(cat, "cpu", 0); - /* Check if either legacy ID is present, and if they are within bounds. */ - if (((legacy_mfg > 0) || (legacy_cpu > 0)) && (legacy_mfg >= 0) && (legacy_mfg < 4) && (legacy_cpu >= 0)) { - /* Look for a machine entry on the legacy table. */ - p = machine_get_internal_name(); - c = 0; - while (cpu_legacy_table[c].machine) { - if (!strcmp(p, cpu_legacy_table[c].machine)) - break; - c++; - } - if (cpu_legacy_table[c].machine) { - /* Determine the amount of CPU entries on the table. */ - i = -1; - while (cpu_legacy_table[c].tables[legacy_mfg][++i].family); + /* Check if either legacy ID is present, and if they are within bounds. */ + if (((legacy_mfg > 0) || (legacy_cpu > 0)) && (legacy_mfg >= 0) && (legacy_mfg < 4) && (legacy_cpu >= 0)) { + /* Look for a machine entry on the legacy table. */ + p = machine_get_internal_name(); + c = 0; + while (cpu_legacy_table[c].machine) { + if (!strcmp(p, cpu_legacy_table[c].machine)) + break; + c++; + } + if (cpu_legacy_table[c].machine) { + /* Determine the amount of CPU entries on the table. */ + i = -1; + while (cpu_legacy_table[c].tables[legacy_mfg][++i].family) + ; - /* If the CPU ID is out of bounds, reset to the last known ID. */ - if (legacy_cpu >= i) - legacy_cpu = i - 1; + /* If the CPU ID is out of bounds, reset to the last known ID. */ + if (legacy_cpu >= i) + legacy_cpu = i - 1; - const cpu_legacy_table_t *legacy_table_entry = &cpu_legacy_table[c].tables[legacy_mfg][legacy_cpu]; + const cpu_legacy_table_t *legacy_table_entry = &cpu_legacy_table[c].tables[legacy_mfg][legacy_cpu]; - /* Check if the referenced family exists. */ - cpu_f = cpu_get_family(legacy_table_entry->family); - if (cpu_f) { - /* Save the new values. */ - config_set_string(cat, "cpu_family", (char *) legacy_table_entry->family); - config_set_int(cat, "cpu_speed", legacy_table_entry->rspeed); - config_set_double(cat, "cpu_multi", legacy_table_entry->multi); - } - } - } + /* Check if the referenced family exists. */ + cpu_f = cpu_get_family(legacy_table_entry->family); + if (cpu_f) { + /* Save the new values. */ + config_set_string(cat, "cpu_family", (char *) legacy_table_entry->family); + config_set_int(cat, "cpu_speed", legacy_table_entry->rspeed); + config_set_double(cat, "cpu_multi", legacy_table_entry->multi); + } + } + } } if (cpu_f) { - speed = config_get_int(cat, "cpu_speed", 0); - multi = config_get_double(cat, "cpu_multi", 0); + speed = config_get_int(cat, "cpu_speed", 0); + multi = config_get_double(cat, "cpu_multi", 0); - /* Find the configured CPU. */ - cpu = 0; - c = 0; - i = 256; - while (cpu_f->cpus[cpu].cpu_type) { - if (cpu_is_eligible(cpu_f, cpu, machine)) { /* skip ineligible CPUs */ - if ((cpu_f->cpus[cpu].rspeed == speed) && (cpu_f->cpus[cpu].multi == multi)) /* exact speed/multiplier match */ - break; - else if ((cpu_f->cpus[cpu].rspeed >= speed) && (i == 256)) /* closest speed match */ - i = cpu; - c = cpu; /* store fastest eligible CPU */ - } - cpu++; - } - if (!cpu_f->cpus[cpu].cpu_type) /* if no exact match was found, use closest matching faster CPU, or fastest eligible CPU */ - cpu = MIN(i, c); + /* Find the configured CPU. */ + cpu = 0; + c = 0; + i = 256; + while (cpu_f->cpus[cpu].cpu_type) { + if (cpu_is_eligible(cpu_f, cpu, machine)) { /* skip ineligible CPUs */ + if ((cpu_f->cpus[cpu].rspeed == speed) && (cpu_f->cpus[cpu].multi == multi)) /* exact speed/multiplier match */ + break; + else if ((cpu_f->cpus[cpu].rspeed >= speed) && (i == 256)) /* closest speed match */ + i = cpu; + c = cpu; /* store fastest eligible CPU */ + } + cpu++; + } + if (!cpu_f->cpus[cpu].cpu_type) /* if no exact match was found, use closest matching faster CPU, or fastest eligible CPU */ + cpu = MIN(i, c); } else { /* default */ - /* Find first eligible family. */ - c = 0; - while (!cpu_family_is_eligible(&cpu_families[c], machine)) { - if (cpu_families[c++].package == 0) { /* end of list */ - fatal("No eligible CPU families for the selected machine\n"); - return; - } - } - cpu_f = (cpu_family_t *) &cpu_families[c]; + /* Find first eligible family. */ + c = 0; + while (!cpu_family_is_eligible(&cpu_families[c], machine)) { + if (cpu_families[c++].package == 0) { /* end of list */ + fatal("No eligible CPU families for the selected machine\n"); + return; + } + } + cpu_f = (cpu_family_t *) &cpu_families[c]; - /* Find first eligible CPU in that family. */ - cpu = 0; - while (!cpu_is_eligible(cpu_f, cpu, machine)) { - if (cpu_f->cpus[cpu++].cpu_type == 0) { /* end of list */ - cpu = 0; - break; - } - } + /* Find first eligible CPU in that family. */ + cpu = 0; + while (!cpu_is_eligible(cpu_f, cpu, machine)) { + if (cpu_f->cpus[cpu++].cpu_type == 0) { /* end of list */ + cpu = 0; + break; + } + } } cpu_s = (CPU *) &cpu_f->cpus[cpu]; cpu_waitstates = config_get_int(cat, "cpu_waitstates", 0); - p = (char *)config_get_string(cat, "fpu_type", "none"); + p = (char *) config_get_string(cat, "fpu_type", "none"); fpu_type = fpu_get_type(cpu_f, cpu, p); mem_size = config_get_int(cat, "mem_size", 64); #if 0 if (mem_size < ((machine_has_bus(machine, MACHINE_AT) && (machines[machine].ram_granularity < 128)) ? machines[machine].min_ram*1024 : machines[machine].min_ram)) - mem_size = (((machine_has_bus(machine, MACHINE_AT) && (machines[machine].ram_granularity < 128)) ? machines[machine].min_ram*1024 : machines[machine].min_ram); + mem_size = (((machine_has_bus(machine, MACHINE_AT) && (machines[machine].ram_granularity < 128)) ? machines[machine].min_ram*1024 : machines[machine].min_ram); #endif if (mem_size > 2097152) - mem_size = 2097152; + mem_size = 2097152; cpu_use_dynarec = !!config_get_int(cat, "cpu_use_dynarec", 0); p = config_get_string(cat, "time_sync", NULL); if (p != NULL) { - if (!strcmp(p, "disabled")) - time_sync = TIME_SYNC_DISABLED; - else - if (!strcmp(p, "local")) - time_sync = TIME_SYNC_ENABLED; - else - if (!strcmp(p, "utc") || !strcmp(p, "gmt")) - time_sync = TIME_SYNC_ENABLED | TIME_SYNC_UTC; - else - time_sync = TIME_SYNC_ENABLED; + if (!strcmp(p, "disabled")) + time_sync = TIME_SYNC_DISABLED; + else if (!strcmp(p, "local")) + time_sync = TIME_SYNC_ENABLED; + else if (!strcmp(p, "utc") || !strcmp(p, "gmt")) + time_sync = TIME_SYNC_ENABLED | TIME_SYNC_UTC; + else + time_sync = TIME_SYNC_ENABLED; } else - time_sync = !!config_get_int(cat, "enable_sync", 1); + time_sync = !!config_get_int(cat, "enable_sync", 1); /* Remove this after a while.. */ config_delete_var(cat, "nvr_path"); config_delete_var(cat, "enable_sync"); } - /* Load "Video" section. */ static void load_video(void) { char *cat = "Video"; char *p; - int free_p = 0; + int free_p = 0; if (machine_has_flags(machine, MACHINE_VIDEO_ONLY)) { - config_delete_var(cat, "gfxcard"); - gfxcard = VID_INTERNAL; + config_delete_var(cat, "gfxcard"); + gfxcard = VID_INTERNAL; } else { - p = config_get_string(cat, "gfxcard", NULL); - if (p == NULL) { - if (machine_has_flags(machine, MACHINE_VIDEO)) { - p = (char *)malloc((strlen("internal")+1)*sizeof(char)); - strcpy(p, "internal"); - } else { - p = (char *)malloc((strlen("none")+1)*sizeof(char)); - strcpy(p, "none"); - } - free_p = 1; - } - if (!strcmp(p, "virge375_vbe20_pci")) /* migrate renamed cards */ - gfxcard = video_get_video_from_internal_name("virge385_pci"); - else - gfxcard = video_get_video_from_internal_name(p); - if (free_p) - free(p); + p = config_get_string(cat, "gfxcard", NULL); + if (p == NULL) { + if (machine_has_flags(machine, MACHINE_VIDEO)) { + p = (char *) malloc((strlen("internal") + 1) * sizeof(char)); + strcpy(p, "internal"); + } else { + p = (char *) malloc((strlen("none") + 1) * sizeof(char)); + strcpy(p, "none"); + } + free_p = 1; + } + if (!strcmp(p, "virge375_vbe20_pci")) /* migrate renamed cards */ + gfxcard = video_get_video_from_internal_name("virge385_pci"); + else + gfxcard = video_get_video_from_internal_name(p); + if (free_p) + free(p); } - voodoo_enabled = !!config_get_int(cat, "voodoo", 0); - ibm8514_enabled = !!config_get_int(cat, "8514a", 0); - xga_enabled = !!config_get_int(cat, "xga", 0); + voodoo_enabled = !!config_get_int(cat, "voodoo", 0); + ibm8514_enabled = !!config_get_int(cat, "8514a", 0); + xga_enabled = !!config_get_int(cat, "xga", 0); show_second_monitors = !!config_get_int(cat, "show_second_monitors", 1); - p = config_get_string(cat, "gfxcard_2", NULL); - if (!p) p = "none"; + p = config_get_string(cat, "gfxcard_2", NULL); + if (!p) + p = "none"; gfxcard_2 = video_get_video_from_internal_name(p); } - static void load_monitor(int monitor_index) { - char monitor_config_name[sizeof("Monitor #") + 12] = { [0] = 0 }; - char* ptr = NULL; + char monitor_config_name[sizeof("Monitor #") + 12] = { [0] = 0 }; + char *ptr = NULL; - if (monitor_index == 0) { - /* Migrate configs */ + if (monitor_index == 0) { + /* Migrate configs */ ptr = config_get_string("General", "window_coordinates", NULL); - - config_delete_var("General", "window_coordinates"); - } + + config_delete_var("General", "window_coordinates"); + } snprintf(monitor_config_name, sizeof(monitor_config_name), "Monitor #%i", monitor_index + 1); - if (!ptr) ptr = config_get_string(monitor_config_name, "window_coordinates", "0, 0, 0, 0"); - if (window_remember || (vid_resize & 2)) sscanf(ptr, "%i, %i, %i, %i", - &monitor_settings[monitor_index].mon_window_x, &monitor_settings[monitor_index].mon_window_y, - &monitor_settings[monitor_index].mon_window_w, &monitor_settings[monitor_index].mon_window_h); + if (!ptr) + ptr = config_get_string(monitor_config_name, "window_coordinates", "0, 0, 0, 0"); + if (window_remember || (vid_resize & 2)) + sscanf(ptr, "%i, %i, %i, %i", + &monitor_settings[monitor_index].mon_window_x, &monitor_settings[monitor_index].mon_window_y, + &monitor_settings[monitor_index].mon_window_w, &monitor_settings[monitor_index].mon_window_h); } static void save_monitor(int monitor_index) { char monitor_config_name[sizeof("Monitor #") + 12] = { [0] = 0 }; - char saved_coordinates[12 * 4 + 8 + 1] = { [0] = 0 }; + char saved_coordinates[12 * 4 + 8 + 1] = { [0] = 0 }; snprintf(monitor_config_name, sizeof(monitor_config_name), "Monitor #%i", monitor_index + 1); if (!(monitor_settings[monitor_index].mon_window_x == 0 - && monitor_settings[monitor_index].mon_window_y == 0 - && monitor_settings[monitor_index].mon_window_w == 0 - && monitor_settings[monitor_index].mon_window_h == 0) && (window_remember || (vid_resize & 2))) { + && monitor_settings[monitor_index].mon_window_y == 0 + && monitor_settings[monitor_index].mon_window_w == 0 + && monitor_settings[monitor_index].mon_window_h == 0) + && (window_remember || (vid_resize & 2))) { snprintf(saved_coordinates, sizeof(saved_coordinates), "%i, %i, %i, %i", monitor_settings[monitor_index].mon_window_x, monitor_settings[monitor_index].mon_window_y, - monitor_settings[monitor_index].mon_window_w, monitor_settings[monitor_index].mon_window_h); + monitor_settings[monitor_index].mon_window_w, monitor_settings[monitor_index].mon_window_h); config_set_string(monitor_config_name, "window_coordinates", saved_coordinates); - } - else config_delete_var(monitor_config_name, "window_coordinates"); + } else + config_delete_var(monitor_config_name, "window_coordinates"); } - /* Load "Input Devices" section. */ static void load_input_devices(void) { char *cat = "Input devices"; - char temp[512]; - int c, d; + char temp[512]; + int c, d; char *p; p = config_get_string(cat, "mouse_type", NULL); if (p != NULL) - mouse_type = mouse_get_from_internal_name(p); - else - mouse_type = 0; + mouse_type = mouse_get_from_internal_name(p); + else + mouse_type = 0; p = config_get_string(cat, "joystick_type", NULL); if (p != NULL) { - if (!strcmp(p, "standard_2button")) /* migrate renamed types */ - joystick_type = joystick_get_from_internal_name("2axis_2button"); - else if (!strcmp(p, "standard_4button")) - joystick_type = joystick_get_from_internal_name("2axis_4button"); - else if (!strcmp(p, "standard_6button")) - joystick_type = joystick_get_from_internal_name("2axis_6button"); - else if (!strcmp(p, "standard_8button")) - joystick_type = joystick_get_from_internal_name("2axis_8button"); - else if (!strcmp(p, "ch_flighstick_pro")) /* fix typo */ - joystick_type = joystick_get_from_internal_name("ch_flightstick_pro"); - else - joystick_type = joystick_get_from_internal_name(p); + if (!strcmp(p, "standard_2button")) /* migrate renamed types */ + joystick_type = joystick_get_from_internal_name("2axis_2button"); + else if (!strcmp(p, "standard_4button")) + joystick_type = joystick_get_from_internal_name("2axis_4button"); + else if (!strcmp(p, "standard_6button")) + joystick_type = joystick_get_from_internal_name("2axis_6button"); + else if (!strcmp(p, "standard_8button")) + joystick_type = joystick_get_from_internal_name("2axis_8button"); + else if (!strcmp(p, "ch_flighstick_pro")) /* fix typo */ + joystick_type = joystick_get_from_internal_name("ch_flightstick_pro"); + else + joystick_type = joystick_get_from_internal_name(p); - if (!joystick_type) { - /* Try to read an integer for backwards compatibility with old configs */ - if (!strcmp(p, "0")) /* workaround for config_get_int returning 0 on non-integer data */ - joystick_type = joystick_get_from_internal_name("2axis_2button"); - else { - c = config_get_int(cat, "joystick_type", 8); - switch (c) { - case 1: - joystick_type = joystick_get_from_internal_name("2axis_4button"); - break; - case 2: - joystick_type = joystick_get_from_internal_name("2axis_6button"); - break; - case 3: - joystick_type = joystick_get_from_internal_name("2axis_8button"); - break; - case 4: - joystick_type = joystick_get_from_internal_name("4axis_4button"); - break; - case 5: - joystick_type = joystick_get_from_internal_name("ch_flightstick_pro"); - break; - case 6: - joystick_type = joystick_get_from_internal_name("sidewinder_pad"); - break; - case 7: - joystick_type = joystick_get_from_internal_name("thrustmaster_fcs"); - break; - default: - joystick_type = 0; - break; - } - } - } + if (!joystick_type) { + /* Try to read an integer for backwards compatibility with old configs */ + if (!strcmp(p, "0")) /* workaround for config_get_int returning 0 on non-integer data */ + joystick_type = joystick_get_from_internal_name("2axis_2button"); + else { + c = config_get_int(cat, "joystick_type", 8); + switch (c) { + case 1: + joystick_type = joystick_get_from_internal_name("2axis_4button"); + break; + case 2: + joystick_type = joystick_get_from_internal_name("2axis_6button"); + break; + case 3: + joystick_type = joystick_get_from_internal_name("2axis_8button"); + break; + case 4: + joystick_type = joystick_get_from_internal_name("4axis_4button"); + break; + case 5: + joystick_type = joystick_get_from_internal_name("ch_flightstick_pro"); + break; + case 6: + joystick_type = joystick_get_from_internal_name("sidewinder_pad"); + break; + case 7: + joystick_type = joystick_get_from_internal_name("thrustmaster_fcs"); + break; + default: + joystick_type = 0; + break; + } + } + } } else - joystick_type = 0; + joystick_type = 0; - for (c=0; c 511) - fatal("load_sound(): strlen(p) > 511\n"); + fatal("load_sound(): strlen(p) > 511\n"); else - strncpy(temp, p, strlen(p) + 1); + strncpy(temp, p, strlen(p) + 1); if (!strcmp(temp, "float") || !strcmp(temp, "1")) - sound_is_float = 1; - else - sound_is_float = 0; + sound_is_float = 1; + else + sound_is_float = 0; } - /* Load "Network" section. */ static void load_network(void) @@ -1119,93 +1119,90 @@ load_network(void) p = config_get_string(cat, "net_type", NULL); if (p != NULL) { - if (!strcmp(p, "pcap") || !strcmp(p, "1")) - network_type = NET_TYPE_PCAP; - else - if (!strcmp(p, "slirp") || !strcmp(p, "2")) - network_type = NET_TYPE_SLIRP; - else - network_type = NET_TYPE_NONE; + if (!strcmp(p, "pcap") || !strcmp(p, "1")) + network_type = NET_TYPE_PCAP; + else if (!strcmp(p, "slirp") || !strcmp(p, "2")) + network_type = NET_TYPE_SLIRP; + else + network_type = NET_TYPE_NONE; } else - network_type = NET_TYPE_NONE; + network_type = NET_TYPE_NONE; memset(network_host, '\0', sizeof(network_host)); p = config_get_string(cat, "net_host_device", NULL); if (p == NULL) { - p = config_get_string(cat, "net_host_device", NULL); - if (p != NULL) - config_delete_var(cat, "net_host_device"); + p = config_get_string(cat, "net_host_device", NULL); + if (p != NULL) + config_delete_var(cat, "net_host_device"); } if (p != NULL) { - if ((network_dev_to_id(p) == -1) || (network_ndev == 1)) { - if ((network_ndev == 1) && strcmp(network_host, "none")) { - ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2094, (wchar_t *) IDS_2129); - } else if (network_dev_to_id(p) == -1) { - ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2095, (wchar_t *) IDS_2129); - } + if ((network_dev_to_id(p) == -1) || (network_ndev == 1)) { + if ((network_ndev == 1) && strcmp(network_host, "none")) { + ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2094, (wchar_t *) IDS_2129); + } else if (network_dev_to_id(p) == -1) { + ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2095, (wchar_t *) IDS_2129); + } - strcpy(network_host, "none"); - } else { - strncpy(network_host, p, sizeof(network_host) - 1); - } + strcpy(network_host, "none"); + } else { + strncpy(network_host, p, sizeof(network_host) - 1); + } } else - strcpy(network_host, "none"); + strcpy(network_host, "none"); p = config_get_string(cat, "net_card", NULL); if (p != NULL) - network_card = network_card_get_from_internal_name(p); - else - network_card = 0; + network_card = network_card_get_from_internal_name(p); + else + network_card = 0; } - /* Load "Ports" section. */ static void load_ports(void) { char *cat = "Ports (COM & LPT)"; char *p; - char temp[512]; - int c, d; + char temp[512]; + int c, d; for (c = 0; c < SERIAL_MAX; c++) { - sprintf(temp, "serial%d_enabled", c + 1); - serial_enabled[c] = !!config_get_int(cat, temp, (c >= 2) ? 0 : 1); + sprintf(temp, "serial%d_enabled", c + 1); + serial_enabled[c] = !!config_get_int(cat, temp, (c >= 2) ? 0 : 1); -/* - sprintf(temp, "serial%d_device", c + 1); - p = (char *) config_get_string(cat, temp, "none"); - com_ports[c].device = com_device_get_from_internal_name(p); -*/ + /* + sprintf(temp, "serial%d_device", c + 1); + p = (char *) config_get_string(cat, temp, "none"); + com_ports[c].device = com_device_get_from_internal_name(p); + */ } for (c = 0; c < PARALLEL_MAX; c++) { - sprintf(temp, "lpt%d_enabled", c + 1); - lpt_ports[c].enabled = !!config_get_int(cat, temp, (c == 0) ? 1 : 0); + sprintf(temp, "lpt%d_enabled", c + 1); + lpt_ports[c].enabled = !!config_get_int(cat, temp, (c == 0) ? 1 : 0); - sprintf(temp, "lpt%d_device", c + 1); - p = (char *) config_get_string(cat, temp, "none"); - lpt_ports[c].device = lpt_device_get_from_internal_name(p); + sprintf(temp, "lpt%d_device", c + 1); + p = (char *) config_get_string(cat, temp, "none"); + lpt_ports[c].device = lpt_device_get_from_internal_name(p); } /* Legacy config compatibility. */ d = config_get_int(cat, "lpt_enabled", 2); if (d < 2) { - for (c = 0; c < PARALLEL_MAX; c++) - lpt_ports[c].enabled = d; + for (c = 0; c < PARALLEL_MAX; c++) + lpt_ports[c].enabled = d; } config_delete_var(cat, "lpt_enabled"); } - /* Load "Storage Controllers" section. */ static void load_storage_controllers(void) { char *cat = "Storage controllers"; char *p, temp[512]; - int c, min = 0; - int free_p = 0; + int c, min = 0; + int free_p = 0; /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ backwards_compat2 = (find_section(cat) == NULL); @@ -1213,54 +1210,54 @@ load_storage_controllers(void) /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ p = config_get_string(cat, "scsicard", NULL); if (p != NULL) { - scsi_card_current[0] = scsi_card_get_from_internal_name(p); - min++; + scsi_card_current[0] = scsi_card_get_from_internal_name(p); + min++; } config_delete_var(cat, "scsi_card"); for (c = min; c < SCSI_BUS_MAX; c++) { - sprintf(temp, "scsicard_%d", c + 1); + sprintf(temp, "scsicard_%d", c + 1); - p = config_get_string(cat, temp, NULL); - if (p != NULL) - scsi_card_current[c] = scsi_card_get_from_internal_name(p); - else - scsi_card_current[c] = 0; + p = config_get_string(cat, temp, NULL); + if (p != NULL) + scsi_card_current[c] = scsi_card_get_from_internal_name(p); + else + scsi_card_current[c] = 0; } p = config_get_string(cat, "fdc", NULL); if (p != NULL) - fdc_type = fdc_card_get_from_internal_name(p); - else - fdc_type = FDC_INTERNAL; + fdc_type = fdc_card_get_from_internal_name(p); + else + fdc_type = FDC_INTERNAL; p = config_get_string(cat, "hdc", NULL); if (p == NULL) { - if (machine_has_flags(machine, MACHINE_HDC)) { - p = (char *)malloc((strlen("internal")+1)*sizeof(char)); - strcpy(p, "internal"); - } else { - p = (char *)malloc((strlen("none")+1)*sizeof(char)); - strcpy(p, "none"); - } - free_p = 1; + if (machine_has_flags(machine, MACHINE_HDC)) { + p = (char *) malloc((strlen("internal") + 1) * sizeof(char)); + strcpy(p, "internal"); + } else { + p = (char *) malloc((strlen("none") + 1) * sizeof(char)); + strcpy(p, "none"); + } + free_p = 1; } if (!strcmp(p, "mfm_xt")) - hdc_current = hdc_get_from_internal_name("st506_xt"); + hdc_current = hdc_get_from_internal_name("st506_xt"); else if (!strcmp(p, "mfm_xt_dtc5150x")) - hdc_current = hdc_get_from_internal_name("st506_xt_dtc5150x"); + hdc_current = hdc_get_from_internal_name("st506_xt_dtc5150x"); else if (!strcmp(p, "mfm_at")) - hdc_current = hdc_get_from_internal_name("st506_at"); + hdc_current = hdc_get_from_internal_name("st506_at"); else if (!strcmp(p, "vlb_isa")) - hdc_current = hdc_get_from_internal_name("ide_vlb"); + hdc_current = hdc_get_from_internal_name("ide_vlb"); else if (!strcmp(p, "vlb_isa_2ch")) - hdc_current = hdc_get_from_internal_name("ide_vlb_2ch"); + hdc_current = hdc_get_from_internal_name("ide_vlb_2ch"); else - hdc_current = hdc_get_from_internal_name(p); + hdc_current = hdc_get_from_internal_name(p); if (free_p) { - free(p); - p = NULL; + free(p); + p = NULL; } ide_ter_enabled = !!config_get_int(cat, "ide_ter", 0); @@ -1268,265 +1265,263 @@ load_storage_controllers(void) /* TODO: Re-enable by default after we actually have a proper machine flag for this. */ cassette_enable = !!config_get_int(cat, "cassette_enabled", 0); - p = config_get_string(cat, "cassette_file", ""); + p = config_get_string(cat, "cassette_file", ""); if (strlen(p) > 511) - fatal("load_storage_controllers(): strlen(p) > 511\n"); + fatal("load_storage_controllers(): strlen(p) > 511\n"); else - strncpy(cassette_fname, p, MIN(512, strlen(p) + 1)); + strncpy(cassette_fname, p, MIN(512, strlen(p) + 1)); p = config_get_string(cat, "cassette_mode", ""); if (strlen(p) > 511) - fatal("load_storage_controllers(): strlen(p) > 511\n"); + fatal("load_storage_controllers(): strlen(p) > 511\n"); else - strncpy(cassette_mode, p, MIN(512, strlen(p) + 1)); - cassette_pos = config_get_int(cat, "cassette_position", 0); - cassette_srate = config_get_int(cat, "cassette_srate", 44100); - cassette_append = !!config_get_int(cat, "cassette_append", 0); - cassette_pcm = config_get_int(cat, "cassette_pcm", 0); + strncpy(cassette_mode, p, MIN(512, strlen(p) + 1)); + cassette_pos = config_get_int(cat, "cassette_position", 0); + cassette_srate = config_get_int(cat, "cassette_srate", 44100); + cassette_append = !!config_get_int(cat, "cassette_append", 0); + cassette_pcm = config_get_int(cat, "cassette_pcm", 0); cassette_ui_writeprot = !!config_get_int(cat, "cassette_writeprot", 0); - for (c=0; c<2; c++) { - sprintf(temp, "cartridge_%02i_fn", c + 1); - p = config_get_string(cat, temp, ""); + for (c = 0; c < 2; c++) { + sprintf(temp, "cartridge_%02i_fn", c + 1); + p = config_get_string(cat, temp, ""); #if 0 - /* - * NOTE: - * Temporary hack to remove the absolute - * path currently saved in most config - * files. We should remove this before - * finalizing this release! --FvK - */ - if (! wcsnicmp(wp, usr_path, wcslen(usr_path))) { - /* - * Yep, its absolute and prefixed - * with the EXE path. Just strip - * that off for now... - */ - wcsncpy(floppyfns[c], &wp[wcslen(usr_path)], sizeof_w(cart_fns[c])); - } else + /* + * NOTE: + * Temporary hack to remove the absolute + * path currently saved in most config + * files. We should remove this before + * finalizing this release! --FvK + */ + if (! wcsnicmp(wp, usr_path, wcslen(usr_path))) { + /* + * Yep, its absolute and prefixed + * with the EXE path. Just strip + * that off for now... + */ + wcsncpy(floppyfns[c], &wp[wcslen(usr_path)], sizeof_w(cart_fns[c])); + } else #endif - if (strlen(p) > 511) - fatal("load_storage_controllers(): strlen(p) > 511\n"); - else - strncpy(cart_fns[c], p, strlen(p) + 1); + if (strlen(p) > 511) + fatal("load_storage_controllers(): strlen(p) > 511\n"); + else + strncpy(cart_fns[c], p, strlen(p) + 1); } } - /* Load "Hard Disks" section. */ static void load_hard_disks(void) { - char *cat = "Hard disks"; - char temp[512], tmp2[512]; - char s[512]; - int c; - char *p; + char *cat = "Hard disks"; + char temp[512], tmp2[512]; + char s[512]; + int c; + char *p; uint32_t max_spt, max_hpc, max_tracks; uint32_t board = 0, dev = 0; memset(temp, '\0', sizeof(temp)); - for (c=0; c max_spt) - hdd[c].spt = max_spt; - if (hdd[c].hpc > max_hpc) - hdd[c].hpc = max_hpc; - if (hdd[c].tracks > max_tracks) - hdd[c].tracks = max_tracks; + if (hdd[c].spt > max_spt) + hdd[c].spt = max_spt; + if (hdd[c].hpc > max_hpc) + hdd[c].hpc = max_hpc; + if (hdd[c].tracks > max_tracks) + hdd[c].tracks = max_tracks; - sprintf(temp, "hdd_%02i_speed", c+1); - switch (hdd[c].bus) { - case HDD_BUS_IDE: - sprintf(tmp2, "1997_5400rpm"); - break; - default: - sprintf(tmp2, "ramdisk"); - break; - } - p = config_get_string(cat, temp, tmp2); - hdd[c].speed_preset = hdd_preset_get_from_internal_name(p); + sprintf(temp, "hdd_%02i_speed", c + 1); + switch (hdd[c].bus) { + case HDD_BUS_IDE: + sprintf(tmp2, "1997_5400rpm"); + break; + default: + sprintf(tmp2, "ramdisk"); + break; + } + p = config_get_string(cat, temp, tmp2); + hdd[c].speed_preset = hdd_preset_get_from_internal_name(p); - /* MFM/RLL */ - sprintf(temp, "hdd_%02i_mfm_channel", c+1); - if (hdd[c].bus == HDD_BUS_MFM) - hdd[c].mfm_channel = !!config_get_int(cat, temp, c & 1); - else - config_delete_var(cat, temp); + /* MFM/RLL */ + sprintf(temp, "hdd_%02i_mfm_channel", c + 1); + if (hdd[c].bus == HDD_BUS_MFM) + hdd[c].mfm_channel = !!config_get_int(cat, temp, c & 1); + else + config_delete_var(cat, temp); - /* XTA */ - sprintf(temp, "hdd_%02i_xta_channel", c+1); - if (hdd[c].bus == HDD_BUS_XTA) - hdd[c].xta_channel = !!config_get_int(cat, temp, c & 1); - else - config_delete_var(cat, temp); + /* XTA */ + sprintf(temp, "hdd_%02i_xta_channel", c + 1); + if (hdd[c].bus == HDD_BUS_XTA) + hdd[c].xta_channel = !!config_get_int(cat, temp, c & 1); + else + config_delete_var(cat, temp); - /* ESDI */ - sprintf(temp, "hdd_%02i_esdi_channel", c+1); - if (hdd[c].bus == HDD_BUS_ESDI) - hdd[c].esdi_channel = !!config_get_int(cat, temp, c & 1); - else - config_delete_var(cat, temp); + /* ESDI */ + sprintf(temp, "hdd_%02i_esdi_channel", c + 1); + if (hdd[c].bus == HDD_BUS_ESDI) + hdd[c].esdi_channel = !!config_get_int(cat, temp, c & 1); + else + config_delete_var(cat, temp); - /* IDE */ - sprintf(temp, "hdd_%02i_ide_channel", c+1); - if (hdd[c].bus == HDD_BUS_IDE) { - sprintf(tmp2, "%01u:%01u", c>>1, c&1); - p = config_get_string(cat, temp, tmp2); - sscanf(p, "%01u:%01u", &board, &dev); - board &= 3; - dev &= 1; - hdd[c].ide_channel = (board<<1) + dev; + /* IDE */ + sprintf(temp, "hdd_%02i_ide_channel", c + 1); + if (hdd[c].bus == HDD_BUS_IDE) { + sprintf(tmp2, "%01u:%01u", c >> 1, c & 1); + p = config_get_string(cat, temp, tmp2); + sscanf(p, "%01u:%01u", &board, &dev); + board &= 3; + dev &= 1; + hdd[c].ide_channel = (board << 1) + dev; - if (hdd[c].ide_channel > 7) - hdd[c].ide_channel = 7; - } else { - config_delete_var(cat, temp); - } + if (hdd[c].ide_channel > 7) + hdd[c].ide_channel = 7; + } else { + config_delete_var(cat, temp); + } - /* SCSI */ - if (hdd[c].bus == HDD_BUS_SCSI) { - sprintf(temp, "hdd_%02i_scsi_location", c+1); - sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c+2); - p = config_get_string(cat, temp, tmp2); - sscanf(p, "%01u:%02u", &board, &dev); - if (board >= SCSI_BUS_MAX) { - /* Invalid bus - check legacy ID */ - sprintf(temp, "hdd_%02i_scsi_id", c+1); - hdd[c].scsi_id = config_get_int(cat, temp, c+2); + /* SCSI */ + if (hdd[c].bus == HDD_BUS_SCSI) { + sprintf(temp, "hdd_%02i_scsi_location", c + 1); + sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c + 2); + p = config_get_string(cat, temp, tmp2); + sscanf(p, "%01u:%02u", &board, &dev); + if (board >= SCSI_BUS_MAX) { + /* Invalid bus - check legacy ID */ + sprintf(temp, "hdd_%02i_scsi_id", c + 1); + hdd[c].scsi_id = config_get_int(cat, temp, c + 2); - if (hdd[c].scsi_id > 15) - hdd[c].scsi_id = 15; - } else { - board %= SCSI_BUS_MAX; - dev &= 15; - hdd[c].scsi_id = (board<<4)+dev; - } - } else { - sprintf(temp, "hdd_%02i_scsi_location", c+1); - config_delete_var(cat, temp); - } + if (hdd[c].scsi_id > 15) + hdd[c].scsi_id = 15; + } else { + board %= SCSI_BUS_MAX; + dev &= 15; + hdd[c].scsi_id = (board << 4) + dev; + } + } else { + sprintf(temp, "hdd_%02i_scsi_location", c + 1); + config_delete_var(cat, temp); + } - sprintf(temp, "hdd_%02i_scsi_id", c+1); - config_delete_var(cat, temp); + sprintf(temp, "hdd_%02i_scsi_id", c + 1); + config_delete_var(cat, temp); - memset(hdd[c].fn, 0x00, sizeof(hdd[c].fn)); - memset(hdd[c].prev_fn, 0x00, sizeof(hdd[c].prev_fn)); - sprintf(temp, "hdd_%02i_fn", c+1); - p = config_get_string(cat, temp, ""); + memset(hdd[c].fn, 0x00, sizeof(hdd[c].fn)); + memset(hdd[c].prev_fn, 0x00, sizeof(hdd[c].prev_fn)); + sprintf(temp, "hdd_%02i_fn", c + 1); + p = config_get_string(cat, temp, ""); #if 0 - /* - * NOTE: - * Temporary hack to remove the absolute - * path currently saved in most config - * files. We should remove this before - * finalizing this release! --FvK - */ - /* - * ANOTHER NOTE: - * When loading differencing VHDs, the absolute path is required. - * So we should not convert absolute paths to relative. -sards - */ - if (! wcsnicmp(wp, usr_path, wcslen(usr_path))) { - /* - * Yep, its absolute and prefixed - * with the CFG path. Just strip - * that off for now... - */ - wcsncpy(hdd[c].fn, &wp[wcslen(usr_path)], sizeof_w(hdd[c].fn)); - } else + /* + * NOTE: + * Temporary hack to remove the absolute + * path currently saved in most config + * files. We should remove this before + * finalizing this release! --FvK + */ + /* + * ANOTHER NOTE: + * When loading differencing VHDs, the absolute path is required. + * So we should not convert absolute paths to relative. -sards + */ + if (! wcsnicmp(wp, usr_path, wcslen(usr_path))) { + /* + * Yep, its absolute and prefixed + * with the CFG path. Just strip + * that off for now... + */ + wcsncpy(hdd[c].fn, &wp[wcslen(usr_path)], sizeof_w(hdd[c].fn)); + } else #endif - if (path_abs(p)) { - strncpy(hdd[c].fn, p, sizeof(hdd[c].fn) - 1); - } else { - path_append_filename(hdd[c].fn, usr_path, p); - } - path_normalize(hdd[c].fn); + if (path_abs(p)) { + strncpy(hdd[c].fn, p, sizeof(hdd[c].fn) - 1); + } else { + path_append_filename(hdd[c].fn, usr_path, p); + } + path_normalize(hdd[c].fn); - /* If disk is empty or invalid, mark it for deletion. */ - if (! hdd_is_valid(c)) { - sprintf(temp, "hdd_%02i_parameters", c+1); - config_delete_var(cat, temp); + /* If disk is empty or invalid, mark it for deletion. */ + if (!hdd_is_valid(c)) { + sprintf(temp, "hdd_%02i_parameters", c + 1); + config_delete_var(cat, temp); - sprintf(temp, "hdd_%02i_preide_channels", c+1); - config_delete_var(cat, temp); + sprintf(temp, "hdd_%02i_preide_channels", c + 1); + config_delete_var(cat, temp); - sprintf(temp, "hdd_%02i_ide_channels", c+1); - config_delete_var(cat, temp); + sprintf(temp, "hdd_%02i_ide_channels", c + 1); + config_delete_var(cat, temp); - sprintf(temp, "hdd_%02i_scsi_id", c+1); - config_delete_var(cat, temp); + sprintf(temp, "hdd_%02i_scsi_id", c + 1); + config_delete_var(cat, temp); - sprintf(temp, "hdd_%02i_fn", c+1); - config_delete_var(cat, temp); - } + sprintf(temp, "hdd_%02i_fn", c + 1); + config_delete_var(cat, temp); + } - sprintf(temp, "hdd_%02i_mfm_channel", c+1); - config_delete_var(cat, temp); + sprintf(temp, "hdd_%02i_mfm_channel", c + 1); + config_delete_var(cat, temp); - sprintf(temp, "hdd_%02i_ide_channel", c+1); - config_delete_var(cat, temp); + sprintf(temp, "hdd_%02i_ide_channel", c + 1); + config_delete_var(cat, temp); } } - /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ /* Load "Floppy Drives" section. */ static void load_floppy_drives(void) { char *cat = "Floppy drives"; - char temp[512], *p; - int c; + char temp[512], *p; + int c; if (!backwards_compat) return; - for (c=0; c 13) @@ -1561,13 +1556,13 @@ load_floppy_drives(void) /* if (*wp != L'\0') config_log("Floppy%d: %ls\n", c, floppyfns[c]); */ - sprintf(temp, "fdd_%02i_writeprot", c+1); + sprintf(temp, "fdd_%02i_writeprot", c + 1); ui_writeprot[c] = !!config_get_int(cat, temp, 0); config_delete_var(cat, temp); sprintf(temp, "fdd_%02i_turbo", c + 1); fdd_set_turbo(c, !!config_get_int(cat, temp, 0)); config_delete_var(cat, temp); - sprintf(temp, "fdd_%02i_check_bpb", c+1); + sprintf(temp, "fdd_%02i_check_bpb", c + 1); fdd_set_check_bpb(c, !!config_get_int(cat, temp, 1)); config_delete_var(cat, temp); } @@ -1575,23 +1570,22 @@ load_floppy_drives(void) delete_section_if_empty(cat); } - /* Load "Floppy and CD-ROM Drives" section. */ static void load_floppy_and_cdrom_drives(void) { - char *cat = "Floppy and CD-ROM drives"; - char temp[512], tmp2[512], *p; - char s[512]; + char *cat = "Floppy and CD-ROM drives"; + char temp[512], tmp2[512], *p; + char s[512]; unsigned int board = 0, dev = 0; - int c, d = 0; + int c, d = 0; /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ backwards_compat = (find_section(cat) == NULL); memset(temp, 0x00, sizeof(temp)); - for (c=0; c 13) @@ -1624,43 +1618,43 @@ load_floppy_and_cdrom_drives(void) /* if (*wp != L'\0') config_log("Floppy%d: %ls\n", c, floppyfns[c]); */ - sprintf(temp, "fdd_%02i_writeprot", c+1); + sprintf(temp, "fdd_%02i_writeprot", c + 1); ui_writeprot[c] = !!config_get_int(cat, temp, 0); sprintf(temp, "fdd_%02i_turbo", c + 1); fdd_set_turbo(c, !!config_get_int(cat, temp, 0)); - sprintf(temp, "fdd_%02i_check_bpb", c+1); + sprintf(temp, "fdd_%02i_check_bpb", c + 1); fdd_set_check_bpb(c, !!config_get_int(cat, temp, 1)); /* Check whether each value is default, if yes, delete it so that only non-default values will later be saved. */ if (fdd_get_type(c) == ((c < 2) ? 2 : 0)) { - sprintf(temp, "fdd_%02i_type", c+1); + sprintf(temp, "fdd_%02i_type", c + 1); config_delete_var(cat, temp); } if (strlen(floppyfns[c]) == 0) { - sprintf(temp, "fdd_%02i_fn", c+1); + sprintf(temp, "fdd_%02i_fn", c + 1); config_delete_var(cat, temp); } if (ui_writeprot[c] == 0) { - sprintf(temp, "fdd_%02i_writeprot", c+1); + sprintf(temp, "fdd_%02i_writeprot", c + 1); config_delete_var(cat, temp); } if (fdd_get_turbo(c) == 0) { - sprintf(temp, "fdd_%02i_turbo", c+1); + sprintf(temp, "fdd_%02i_turbo", c + 1); config_delete_var(cat, temp); } if (fdd_get_check_bpb(c) == 1) { - sprintf(temp, "fdd_%02i_check_bpb", c+1); + sprintf(temp, "fdd_%02i_check_bpb", c + 1); config_delete_var(cat, temp); } } memset(temp, 0x00, sizeof(temp)); - for (c=0; c>1, (c+2)&1); + sprintf(temp, "cdrom_%02i_ide_channel", c + 1); + sprintf(tmp2, "%01u:%01u", (c + 2) >> 1, (c + 2) & 1); p = config_get_string(cat, temp, tmp2); sscanf(p, "%01u:%01u", &board, &dev); board &= 3; dev &= 1; - cdrom[c].ide_channel = (board<<1)+dev; + cdrom[c].ide_channel = (board << 1) + dev; if (cdrom[c].ide_channel > 7) cdrom[c].ide_channel = 7; } else if (cdrom[c].bus_type == CDROM_BUS_SCSI) { - sprintf(temp, "cdrom_%02i_scsi_location", c+1); - sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c+2); + sprintf(temp, "cdrom_%02i_scsi_location", c + 1); + sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c + 2); p = config_get_string(cat, temp, tmp2); sscanf(p, "%01u:%02u", &board, &dev); if (board >= SCSI_BUS_MAX) { /* Invalid bus - check legacy ID */ - sprintf(temp, "cdrom_%02i_scsi_id", c+1); - cdrom[c].scsi_device_id = config_get_int(cat, temp, c+2); + sprintf(temp, "cdrom_%02i_scsi_id", c + 1); + cdrom[c].scsi_device_id = config_get_int(cat, temp, c + 2); if (cdrom[c].scsi_device_id > 15) cdrom[c].scsi_device_id = 15; } else { board %= SCSI_BUS_MAX; dev &= 15; - cdrom[c].scsi_device_id = (board<<4)+dev; + cdrom[c].scsi_device_id = (board << 4) + dev; } } if (cdrom[c].bus_type != CDROM_BUS_ATAPI) { - sprintf(temp, "cdrom_%02i_ide_channel", c+1); + sprintf(temp, "cdrom_%02i_ide_channel", c + 1); config_delete_var(cat, temp); } if (cdrom[c].bus_type != CDROM_BUS_SCSI) { - sprintf(temp, "cdrom_%02i_scsi_location", c+1); + sprintf(temp, "cdrom_%02i_scsi_location", c + 1); config_delete_var(cat, temp); } - sprintf(temp, "cdrom_%02i_scsi_id", c+1); + sprintf(temp, "cdrom_%02i_scsi_id", c + 1); config_delete_var(cat, temp); - sprintf(temp, "cdrom_%02i_image_path", c+1); + sprintf(temp, "cdrom_%02i_image_path", c + 1); p = config_get_string(cat, temp, ""); #if 0 @@ -1741,59 +1735,57 @@ load_floppy_and_cdrom_drives(void) wcsncpy(cdrom[c].image_path, &wp[wcslen(usr_path)], sizeof_w(cdrom[c].image_path)); } else #endif - strncpy(cdrom[c].image_path, p, sizeof(cdrom[c].image_path) - 1); + strncpy(cdrom[c].image_path, p, sizeof(cdrom[c].image_path) - 1); if (cdrom[c].host_drive && (cdrom[c].host_drive != 200)) cdrom[c].host_drive = 0; - if ((cdrom[c].host_drive == 0x200) && - (strlen(cdrom[c].image_path) == 0)) - cdrom[c].host_drive = 0; + if ((cdrom[c].host_drive == 0x200) && (strlen(cdrom[c].image_path) == 0)) + cdrom[c].host_drive = 0; /* If the CD-ROM is disabled, delete all its variables. */ if (cdrom[c].bus_type == CDROM_BUS_DISABLED) { - sprintf(temp, "cdrom_%02i_host_drive", c+1); + sprintf(temp, "cdrom_%02i_host_drive", c + 1); config_delete_var(cat, temp); - sprintf(temp, "cdrom_%02i_parameters", c+1); - config_delete_var(cat, temp); + sprintf(temp, "cdrom_%02i_parameters", c + 1); + config_delete_var(cat, temp); - sprintf(temp, "cdrom_%02i_ide_channel", c+1); - config_delete_var(cat, temp); + sprintf(temp, "cdrom_%02i_ide_channel", c + 1); + config_delete_var(cat, temp); - sprintf(temp, "cdrom_%02i_scsi_id", c+1); - config_delete_var(cat, temp); + sprintf(temp, "cdrom_%02i_scsi_id", c + 1); + config_delete_var(cat, temp); - sprintf(temp, "cdrom_%02i_image_path", c+1); - config_delete_var(cat, temp); + sprintf(temp, "cdrom_%02i_image_path", c + 1); + config_delete_var(cat, temp); } - sprintf(temp, "cdrom_%02i_iso_path", c+1); + sprintf(temp, "cdrom_%02i_iso_path", c + 1); config_delete_var(cat, temp); } } - /* Load "Other Removable Devices" section. */ static void load_other_removable_devices(void) { - char *cat = "Other removable devices"; - char temp[512], tmp2[512], *p; - char s[512]; + char *cat = "Other removable devices"; + char temp[512], tmp2[512], *p; + char s[512]; unsigned int board = 0, dev = 0; - int c, d = 0; + int c, d = 0; /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ if (backwards_compat) { memset(temp, 0x00, sizeof(temp)); - for (c=0; c>1, (c+2)&1); + sprintf(temp, "cdrom_%02i_ide_channel", c + 1); + sprintf(tmp2, "%01u:%01u", (c + 2) >> 1, (c + 2) & 1); p = config_get_string(cat, temp, tmp2); sscanf(p, "%01u:%01u", &board, &dev); board &= 3; dev &= 1; - cdrom[c].ide_channel = (board<<1)+dev; + cdrom[c].ide_channel = (board << 1) + dev; if (cdrom[c].ide_channel > 7) cdrom[c].ide_channel = 7; config_delete_var(cat, temp); } else if (cdrom[c].bus_type == CDROM_BUS_SCSI) { - sprintf(temp, "cdrom_%02i_scsi_id", c+1); - cdrom[c].scsi_device_id = config_get_int(cat, temp, c+2); + sprintf(temp, "cdrom_%02i_scsi_id", c + 1); + cdrom[c].scsi_device_id = config_get_int(cat, temp, c + 2); if (cdrom[c].scsi_device_id > 15) cdrom[c].scsi_device_id = 15; @@ -1834,7 +1826,7 @@ load_other_removable_devices(void) config_delete_var(cat, temp); } - sprintf(temp, "cdrom_%02i_image_path", c+1); + sprintf(temp, "cdrom_%02i_image_path", c + 1); p = config_get_string(cat, temp, ""); config_delete_var(cat, temp); @@ -1855,21 +1847,20 @@ load_other_removable_devices(void) wcsncpy(cdrom[c].image_path, &wp[wcslen(usr_path)], sizeof_w(cdrom[c].image_path)); } else #endif - strncpy(cdrom[c].image_path, p, sizeof(cdrom[c].image_path) - 1); + strncpy(cdrom[c].image_path, p, sizeof(cdrom[c].image_path) - 1); if (cdrom[c].host_drive && (cdrom[c].host_drive != 200)) cdrom[c].host_drive = 0; - if ((cdrom[c].host_drive == 0x200) && - (strlen(cdrom[c].image_path) == 0)) + if ((cdrom[c].host_drive == 0x200) && (strlen(cdrom[c].image_path) == 0)) cdrom[c].host_drive = 0; } } backwards_compat = 0; memset(temp, 0x00, sizeof(temp)); - for (c=0; c>1, (c+2)&1); + sprintf(temp, "zip_%02i_ide_channel", c + 1); + sprintf(tmp2, "%01u:%01u", (c + 2) >> 1, (c + 2) & 1); p = config_get_string(cat, temp, tmp2); sscanf(p, "%01u:%01u", &board, &dev); board &= 3; dev &= 1; - zip_drives[c].ide_channel = (board<<1)+dev; + zip_drives[c].ide_channel = (board << 1) + dev; if (zip_drives[c].ide_channel > 7) zip_drives[c].ide_channel = 7; } else if (zip_drives[c].bus_type == ZIP_BUS_SCSI) { - sprintf(temp, "zip_%02i_scsi_location", c+1); - sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c+2); + sprintf(temp, "zip_%02i_scsi_location", c + 1); + sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c + 2); p = config_get_string(cat, temp, tmp2); sscanf(p, "%01u:%02u", &board, &dev); if (board >= SCSI_BUS_MAX) { /* Invalid bus - check legacy ID */ - sprintf(temp, "zip_%02i_scsi_id", c+1); - zip_drives[c].scsi_device_id = config_get_int(cat, temp, c+2); + sprintf(temp, "zip_%02i_scsi_id", c + 1); + zip_drives[c].scsi_device_id = config_get_int(cat, temp, c + 2); if (zip_drives[c].scsi_device_id > 15) zip_drives[c].scsi_device_id = 15; } else { board %= SCSI_BUS_MAX; dev &= 15; - zip_drives[c].scsi_device_id = (board<<4)+dev; + zip_drives[c].scsi_device_id = (board << 4) + dev; } } if (zip_drives[c].bus_type != ZIP_BUS_ATAPI) { - sprintf(temp, "zip_%02i_ide_channel", c+1); + sprintf(temp, "zip_%02i_ide_channel", c + 1); config_delete_var(cat, temp); } if (zip_drives[c].bus_type != ZIP_BUS_SCSI) { - sprintf(temp, "zip_%02i_scsi_location", c+1); + sprintf(temp, "zip_%02i_scsi_location", c + 1); config_delete_var(cat, temp); } - sprintf(temp, "zip_%02i_scsi_id", c+1); + sprintf(temp, "zip_%02i_scsi_id", c + 1); config_delete_var(cat, temp); - sprintf(temp, "zip_%02i_image_path", c+1); + sprintf(temp, "zip_%02i_image_path", c + 1); p = config_get_string(cat, temp, ""); #if 0 @@ -1943,33 +1934,33 @@ load_other_removable_devices(void) wcsncpy(zip_drives[c].image_path, &wp[wcslen(usr_path)], sizeof_w(zip_drives[c].image_path)); } else #endif - strncpy(zip_drives[c].image_path, p, sizeof(zip_drives[c].image_path) - 1); + strncpy(zip_drives[c].image_path, p, sizeof(zip_drives[c].image_path) - 1); /* If the CD-ROM is disabled, delete all its variables. */ if (zip_drives[c].bus_type == ZIP_BUS_DISABLED) { - sprintf(temp, "zip_%02i_host_drive", c+1); + sprintf(temp, "zip_%02i_host_drive", c + 1); config_delete_var(cat, temp); - sprintf(temp, "zip_%02i_parameters", c+1); + sprintf(temp, "zip_%02i_parameters", c + 1); config_delete_var(cat, temp); - sprintf(temp, "zip_%02i_ide_channel", c+1); + sprintf(temp, "zip_%02i_ide_channel", c + 1); config_delete_var(cat, temp); - sprintf(temp, "zip_%02i_scsi_id", c+1); + sprintf(temp, "zip_%02i_scsi_id", c + 1); config_delete_var(cat, temp); - sprintf(temp, "zip_%02i_image_path", c+1); + sprintf(temp, "zip_%02i_image_path", c + 1); config_delete_var(cat, temp); } - sprintf(temp, "zip_%02i_iso_path", c+1); + sprintf(temp, "zip_%02i_iso_path", c + 1); config_delete_var(cat, temp); } memset(temp, 0x00, sizeof(temp)); - for (c=0; c>1, (c+2)&1); + sprintf(temp, "mo_%02i_ide_channel", c + 1); + sprintf(tmp2, "%01u:%01u", (c + 2) >> 1, (c + 2) & 1); p = config_get_string(cat, temp, tmp2); sscanf(p, "%01u:%01u", &board, &dev); board &= 3; dev &= 1; - mo_drives[c].ide_channel = (board<<1)+dev; + mo_drives[c].ide_channel = (board << 1) + dev; if (mo_drives[c].ide_channel > 7) mo_drives[c].ide_channel = 7; } else if (mo_drives[c].bus_type == MO_BUS_SCSI) { - sprintf(temp, "mo_%02i_scsi_location", c+1); - sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c+2); + sprintf(temp, "mo_%02i_scsi_location", c + 1); + sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c + 2); p = config_get_string(cat, temp, tmp2); sscanf(p, "%01u:%02u", &board, &dev); if (board >= SCSI_BUS_MAX) { /* Invalid bus - check legacy ID */ - sprintf(temp, "mo_%02i_scsi_id", c+1); - mo_drives[c].scsi_device_id = config_get_int(cat, temp, c+2); + sprintf(temp, "mo_%02i_scsi_id", c + 1); + mo_drives[c].scsi_device_id = config_get_int(cat, temp, c + 2); if (mo_drives[c].scsi_device_id > 15) mo_drives[c].scsi_device_id = 15; } else { board %= SCSI_BUS_MAX; dev &= 15; - mo_drives[c].scsi_device_id = (board<<4)+dev; + mo_drives[c].scsi_device_id = (board << 4) + dev; } } if (mo_drives[c].bus_type != MO_BUS_ATAPI) { - sprintf(temp, "mo_%02i_ide_channel", c+1); + sprintf(temp, "mo_%02i_ide_channel", c + 1); config_delete_var(cat, temp); } if (mo_drives[c].bus_type != MO_BUS_SCSI) { - sprintf(temp, "mo_%02i_scsi_location", c+1); + sprintf(temp, "mo_%02i_scsi_location", c + 1); config_delete_var(cat, temp); } - sprintf(temp, "mo_%02i_scsi_id", c+1); + sprintf(temp, "mo_%02i_scsi_id", c + 1); config_delete_var(cat, temp); - sprintf(temp, "mo_%02i_image_path", c+1); + sprintf(temp, "mo_%02i_image_path", c + 1); p = config_get_string(cat, temp, ""); strncpy(mo_drives[c].image_path, p, sizeof(mo_drives[c].image_path) - 1); /* If the CD-ROM is disabled, delete all its variables. */ if (mo_drives[c].bus_type == MO_BUS_DISABLED) { - sprintf(temp, "mo_%02i_host_drive", c+1); + sprintf(temp, "mo_%02i_host_drive", c + 1); config_delete_var(cat, temp); - sprintf(temp, "mo_%02i_parameters", c+1); + sprintf(temp, "mo_%02i_parameters", c + 1); config_delete_var(cat, temp); - sprintf(temp, "mo_%02i_ide_channel", c+1); + sprintf(temp, "mo_%02i_ide_channel", c + 1); config_delete_var(cat, temp); - sprintf(temp, "mo_%02i_scsi_id", c+1); + sprintf(temp, "mo_%02i_scsi_id", c + 1); config_delete_var(cat, temp); - sprintf(temp, "mo_%02i_image_path", c+1); + sprintf(temp, "mo_%02i_image_path", c + 1); config_delete_var(cat, temp); } - sprintf(temp, "mo_%02i_iso_path", c+1); + sprintf(temp, "mo_%02i_iso_path", c + 1); config_delete_var(cat, temp); } } - /* Load "Other Peripherals" section. */ static void load_other_peripherals(void) { char *cat = "Other peripherals"; char *p; - char temp[512]; - int c, free_p = 0; + char temp[512]; + int c, free_p = 0; if (backwards_compat2) { p = config_get_string(cat, "scsicard", NULL); @@ -2079,10 +2069,10 @@ load_other_peripherals(void) p = config_get_string(cat, "hdc", NULL); if (p == NULL) { if (machine_has_flags(machine, MACHINE_HDC)) { - p = (char *)malloc((strlen("internal")+1)*sizeof(char)); + p = (char *) malloc((strlen("internal") + 1) * sizeof(char)); strcpy(p, "internal"); } else { - p = (char *)malloc((strlen("none")+1)*sizeof(char)); + p = (char *) malloc((strlen("none") + 1) * sizeof(char)); strcpy(p, "none"); } free_p = 1; @@ -2113,21 +2103,20 @@ load_other_peripherals(void) } backwards_compat2 = 0; - bugger_enabled = !!config_get_int(cat, "bugger_enabled", 0); + bugger_enabled = !!config_get_int(cat, "bugger_enabled", 0); postcard_enabled = !!config_get_int(cat, "postcard_enabled", 0); for (c = 0; c < ISAMEM_MAX; c++) { sprintf(temp, "isamem%d_type", c); - p = config_get_string(cat, temp, "none"); + p = config_get_string(cat, temp, "none"); isamem_type[c] = isamem_get_from_internal_name(p); } - p = config_get_string(cat, "isartc_type", "none"); + p = config_get_string(cat, "isartc_type", "none"); isartc_type = isartc_get_from_internal_name(p); } - /* Load the specified or a default configuration file. */ void config_load(void) @@ -2143,35 +2132,35 @@ config_load(void) #endif memset(zip_drives, 0, sizeof(zip_drive_t)); - if (! config_read(cfg_path)) { + if (!config_read(cfg_path)) { config_changed = 1; cpu_f = (cpu_family_t *) &cpu_families[0]; - cpu = 0; + cpu = 0; kbd_req_capture = 0; hide_status_bar = 0; - hide_tool_bar = 0; - scale = 1; - machine = machine_get_machine_from_internal_name("ibmpc"); - dpi_scale = 1; + hide_tool_bar = 0; + scale = 1; + machine = machine_get_machine_from_internal_name("ibmpc"); + dpi_scale = 1; - fpu_type = fpu_get_type(cpu_f, cpu, "none"); - gfxcard = video_get_video_from_internal_name("cga"); - vid_api = plat_vidapi("default"); - vid_resize = 0; + fpu_type = fpu_get_type(cpu_f, cpu, "none"); + gfxcard = video_get_video_from_internal_name("cga"); + vid_api = plat_vidapi("default"); + vid_resize = 0; video_fullscreen_first = 1; - time_sync = TIME_SYNC_ENABLED; - hdc_current = hdc_get_from_internal_name("none"); + time_sync = TIME_SYNC_ENABLED; + hdc_current = hdc_get_from_internal_name("none"); serial_enabled[0] = 1; serial_enabled[1] = 1; - for (i = 2 ; i < SERIAL_MAX; i++) + for (i = 2; i < SERIAL_MAX; i++) serial_enabled[i] = 0; lpt_ports[0].enabled = 1; - for (i = 1 ; i < PARALLEL_MAX; i++) + for (i = 1; i < PARALLEL_MAX; i++) lpt_ports[i].enabled = 0; for (i = 0; i < FDD_NUM; i++) { @@ -2186,8 +2175,8 @@ config_load(void) /* Unmute the CD audio on the first CD-ROM drive. */ cdrom[0].sound_on = 1; - mem_size = 64; - isartc_type = 0; + mem_size = 64; + isartc_type = 0; for (i = 0; i < ISAMEM_MAX; i++) isamem_type[i] = 0; @@ -2195,15 +2184,15 @@ config_load(void) cassette_enable = 0; memset(cassette_fname, 0x00, sizeof(cassette_fname)); memcpy(cassette_mode, "load", strlen("load") + 1); - cassette_pos = 0; - cassette_srate = 44100; - cassette_append = 0; - cassette_pcm = 0; + cassette_pos = 0; + cassette_srate = 44100; + cassette_append = 0; + cassette_pcm = 0; cassette_ui_writeprot = 0; config_log("Config file not present or invalid!\n"); } else { - load_general(); /* General */ + load_general(); /* General */ for (i = 0; i < MONITORS_NUM; i++) load_monitor(i); load_machine(); /* Machine */ @@ -2229,13 +2218,12 @@ config_load(void) video_copy = (video_grayscale || invert_display) ? video_transform_copy : memcpy; } - /* Save "General" section. */ static void save_general(void) { char *cat = "General"; - char temp[512], buffer[512] = {0}; + char temp[512], buffer[512] = { 0 }; char *va_name; @@ -2396,14 +2384,13 @@ save_general(void) delete_section_if_empty(cat); } - /* Save "Machine" section. */ static void save_machine(void) { char *cat = "Machine"; char *p; - int c, i = 0, legacy_mfg, legacy_cpu = -1, closest_legacy_cpu = -1; + int c, i = 0, legacy_mfg, legacy_cpu = -1, closest_legacy_cpu = -1; p = machine_get_internal_name(); config_set_string(cat, "machine", p); @@ -2431,34 +2418,32 @@ save_machine(void) /* Look for a corresponding CPU entry. */ cpu_legacy_table_t *legacy_table_entry; for (legacy_mfg = 0; legacy_mfg < 4; legacy_mfg++) { - if (!cpu_legacy_table[c].tables[legacy_mfg]) - continue; + if (!cpu_legacy_table[c].tables[legacy_mfg]) + continue; - i = 0; - while (cpu_legacy_table[c].tables[legacy_mfg][i].family) { - legacy_table_entry = (cpu_legacy_table_t *) &cpu_legacy_table[c].tables[legacy_mfg][i]; + i = 0; + while (cpu_legacy_table[c].tables[legacy_mfg][i].family) { + legacy_table_entry = (cpu_legacy_table_t *) &cpu_legacy_table[c].tables[legacy_mfg][i]; - /* Match the family name, speed and multiplier. */ - if (!strcmp(cpu_f->internal_name, legacy_table_entry->family)) { - if ((legacy_table_entry->rspeed == cpu_f->cpus[cpu].rspeed) && - (legacy_table_entry->multi == cpu_f->cpus[cpu].multi)) { /* exact speed/multiplier match */ - legacy_cpu = i; - break; - } else if ((legacy_table_entry->rspeed >= cpu_f->cpus[cpu].rspeed) && - (closest_legacy_cpu == -1)) { /* closest speed match */ - closest_legacy_cpu = i; + /* Match the family name, speed and multiplier. */ + if (!strcmp(cpu_f->internal_name, legacy_table_entry->family)) { + if ((legacy_table_entry->rspeed == cpu_f->cpus[cpu].rspeed) && (legacy_table_entry->multi == cpu_f->cpus[cpu].multi)) { /* exact speed/multiplier match */ + legacy_cpu = i; + break; + } else if ((legacy_table_entry->rspeed >= cpu_f->cpus[cpu].rspeed) && (closest_legacy_cpu == -1)) { /* closest speed match */ + closest_legacy_cpu = i; + } } + + i++; } - i++; - } - - /* Use the closest speed match if no exact match was found. */ - if ((legacy_cpu == -1) && (closest_legacy_cpu > -1)) { - legacy_cpu = closest_legacy_cpu; - break; - } else if (legacy_cpu > -1) /* exact match found */ - break; + /* Use the closest speed match if no exact match was found. */ + if ((legacy_cpu == -1) && (closest_legacy_cpu > -1)) { + legacy_cpu = closest_legacy_cpu; + break; + } else if (legacy_cpu > -1) /* exact match found */ + break; } /* Set legacy values if a match was found. */ @@ -2480,7 +2465,7 @@ save_machine(void) else config_set_string(cat, "fpu_type", (char *) fpu_get_internal_name(cpu_f, cpu, fpu_type)); - //Write the mem_size explicitly to the setttings in order to help managers to display it without having the actual machine table + // Write the mem_size explicitly to the setttings in order to help managers to display it without having the actual machine table config_delete_var(cat, "mem_size"); config_set_int(cat, "mem_size", mem_size); @@ -2497,7 +2482,6 @@ save_machine(void) delete_section_if_empty(cat); } - /* Save "Video" section. */ static void save_video(void) @@ -2505,7 +2489,7 @@ save_video(void) char *cat = "Video"; config_set_string(cat, "gfxcard", - video_get_internal_name(gfxcard)); + video_get_internal_name(gfxcard)); if (voodoo_enabled == 0) config_delete_var(cat, "voodoo"); @@ -2535,14 +2519,13 @@ save_video(void) delete_section_if_empty(cat); } - /* Save "Input Devices" section. */ static void save_input_devices(void) { char *cat = "Input devices"; - char temp[512], tmp2[512]; - int c, d; + char temp[512], tmp2[512]; + int c, d; config_set_string(cat, "mouse_type", mouse_get_internal_name(mouse_type)); @@ -2553,15 +2536,15 @@ save_input_devices(void) sprintf(tmp2, "joystick_%i_nr", c); config_delete_var(cat, tmp2); - for (d=0; d<16; d++) { + for (d = 0; d < 16; d++) { sprintf(tmp2, "joystick_%i_axis_%i", c, d); config_delete_var(cat, tmp2); } - for (d=0; d<16; d++) { + for (d = 0; d < 16; d++) { sprintf(tmp2, "joystick_%i_button_%i", c, d); config_delete_var(cat, tmp2); } - for (d=0; d<16; d++) { + for (d = 0; d < 16; d++) { sprintf(tmp2, "joystick_%i_pov_%i", c, d); config_delete_var(cat, tmp2); } @@ -2574,15 +2557,15 @@ save_input_devices(void) config_set_int(cat, tmp2, joystick_state[c].plat_joystick_nr); if (joystick_state[c].plat_joystick_nr) { - for (d=0; d> 1, hdd[c].ide_channel & 1); - config_set_string(cat, temp, tmp2); - } + sprintf(temp, "hdd_%02i_ide_channel", c + 1); + if (!hdd_is_valid(c) || (hdd[c].bus != HDD_BUS_IDE)) { + config_delete_var(cat, temp); + } else { + sprintf(tmp2, "%01u:%01u", hdd[c].ide_channel >> 1, hdd[c].ide_channel & 1); + config_set_string(cat, temp, tmp2); + } - sprintf(temp, "hdd_%02i_scsi_id", c+1); - config_delete_var(cat, temp); + sprintf(temp, "hdd_%02i_scsi_id", c + 1); + config_delete_var(cat, temp); - sprintf(temp, "hdd_%02i_scsi_location", c+1); - if (hdd[c].bus != HDD_BUS_SCSI) - config_delete_var(cat, temp); - else { - sprintf(tmp2, "%01u:%02u", hdd[c].scsi_id>>4, - hdd[c].scsi_id & 15); - config_set_string(cat, temp, tmp2); - } + sprintf(temp, "hdd_%02i_scsi_location", c + 1); + if (hdd[c].bus != HDD_BUS_SCSI) + config_delete_var(cat, temp); + else { + sprintf(tmp2, "%01u:%02u", hdd[c].scsi_id >> 4, + hdd[c].scsi_id & 15); + config_set_string(cat, temp, tmp2); + } - sprintf(temp, "hdd_%02i_fn", c+1); - if (hdd_is_valid(c) && (strlen(hdd[c].fn) != 0)) { - path_normalize(hdd[c].fn); - if (!strnicmp(hdd[c].fn, usr_path, strlen(usr_path))) - config_set_string(cat, temp, &hdd[c].fn[strlen(usr_path)]); - else - config_set_string(cat, temp, hdd[c].fn); - } - else - config_delete_var(cat, temp); - - sprintf(temp, "hdd_%02i_speed", c+1); - if (!hdd_is_valid(c) || (hdd[c].bus != HDD_BUS_IDE)) - config_delete_var(cat, temp); - else - config_set_string(cat, temp, hdd_preset_get_internal_name(hdd[c].speed_preset)); + sprintf(temp, "hdd_%02i_fn", c + 1); + if (hdd_is_valid(c) && (strlen(hdd[c].fn) != 0)) { + path_normalize(hdd[c].fn); + if (!strnicmp(hdd[c].fn, usr_path, strlen(usr_path))) + config_set_string(cat, temp, &hdd[c].fn[strlen(usr_path)]); + else + config_set_string(cat, temp, hdd[c].fn); + } else + config_delete_var(cat, temp); + sprintf(temp, "hdd_%02i_speed", c + 1); + if (!hdd_is_valid(c) || (hdd[c].bus != HDD_BUS_IDE)) + config_delete_var(cat, temp); + else + config_set_string(cat, temp, hdd_preset_get_internal_name(hdd[c].speed_preset)); } delete_section_if_empty(cat); } - /* Save "Floppy Drives" section. */ static void save_floppy_and_cdrom_drives(void) { char *cat = "Floppy and CD-ROM drives"; - char temp[512], tmp2[512]; - int c; + char temp[512], tmp2[512]; + int c; - for (c=0; c>1, - cdrom[c].ide_channel & 1); - config_set_string(cat, temp, tmp2); - } + sprintf(temp, "cdrom_%02i_ide_channel", c + 1); + if (cdrom[c].bus_type != CDROM_BUS_ATAPI) + config_delete_var(cat, temp); + else { + sprintf(tmp2, "%01u:%01u", cdrom[c].ide_channel >> 1, + cdrom[c].ide_channel & 1); + config_set_string(cat, temp, tmp2); + } - sprintf(temp, "cdrom_%02i_scsi_id", c + 1); - config_delete_var(cat, temp); + sprintf(temp, "cdrom_%02i_scsi_id", c + 1); + config_delete_var(cat, temp); - sprintf(temp, "cdrom_%02i_scsi_location", c+1); - if (cdrom[c].bus_type != CDROM_BUS_SCSI) - config_delete_var(cat, temp); - else { - sprintf(tmp2, "%01u:%02u", cdrom[c].scsi_device_id>>4, - cdrom[c].scsi_device_id & 15); - config_set_string(cat, temp, tmp2); - } + sprintf(temp, "cdrom_%02i_scsi_location", c + 1); + if (cdrom[c].bus_type != CDROM_BUS_SCSI) + config_delete_var(cat, temp); + else { + sprintf(tmp2, "%01u:%02u", cdrom[c].scsi_device_id >> 4, + cdrom[c].scsi_device_id & 15); + config_set_string(cat, temp, tmp2); + } - sprintf(temp, "cdrom_%02i_image_path", c + 1); - if ((cdrom[c].bus_type == 0) || - (strlen(cdrom[c].image_path) == 0)) { - config_delete_var(cat, temp); - } else { - config_set_string(cat, temp, cdrom[c].image_path); - } + sprintf(temp, "cdrom_%02i_image_path", c + 1); + if ((cdrom[c].bus_type == 0) || (strlen(cdrom[c].image_path) == 0)) { + config_delete_var(cat, temp); + } else { + config_set_string(cat, temp, cdrom[c].image_path); + } } delete_section_if_empty(cat); } - /* Save "Other Removable Devices" section. */ static void save_other_removable_devices(void) { char *cat = "Other removable devices"; - char temp[512], tmp2[512]; - int c; + char temp[512], tmp2[512]; + int c; - for (c=0; c>1, - zip_drives[c].ide_channel & 1); - config_set_string(cat, temp, tmp2); - } + sprintf(temp, "zip_%02i_ide_channel", c + 1); + if (zip_drives[c].bus_type != ZIP_BUS_ATAPI) + config_delete_var(cat, temp); + else { + sprintf(tmp2, "%01u:%01u", zip_drives[c].ide_channel >> 1, + zip_drives[c].ide_channel & 1); + config_set_string(cat, temp, tmp2); + } - sprintf(temp, "zip_%02i_scsi_id", c + 1); - config_delete_var(cat, temp); + sprintf(temp, "zip_%02i_scsi_id", c + 1); + config_delete_var(cat, temp); - sprintf(temp, "zip_%02i_scsi_location", c+1); - if (zip_drives[c].bus_type != ZIP_BUS_SCSI) - config_delete_var(cat, temp); - else { - sprintf(tmp2, "%01u:%02u", zip_drives[c].scsi_device_id>>4, - zip_drives[c].scsi_device_id & 15); - config_set_string(cat, temp, tmp2); - } + sprintf(temp, "zip_%02i_scsi_location", c + 1); + if (zip_drives[c].bus_type != ZIP_BUS_SCSI) + config_delete_var(cat, temp); + else { + sprintf(tmp2, "%01u:%02u", zip_drives[c].scsi_device_id >> 4, + zip_drives[c].scsi_device_id & 15); + config_set_string(cat, temp, tmp2); + } - sprintf(temp, "zip_%02i_image_path", c + 1); - if ((zip_drives[c].bus_type == 0) || - (strlen(zip_drives[c].image_path) == 0)) { - config_delete_var(cat, temp); - } else { - config_set_string(cat, temp, zip_drives[c].image_path); - } + sprintf(temp, "zip_%02i_image_path", c + 1); + if ((zip_drives[c].bus_type == 0) || (strlen(zip_drives[c].image_path) == 0)) { + config_delete_var(cat, temp); + } else { + config_set_string(cat, temp, zip_drives[c].image_path); + } } - for (c=0; c>1, - mo_drives[c].ide_channel & 1); - config_set_string(cat, temp, tmp2); - } + sprintf(temp, "mo_%02i_ide_channel", c + 1); + if (mo_drives[c].bus_type != MO_BUS_ATAPI) + config_delete_var(cat, temp); + else { + sprintf(tmp2, "%01u:%01u", mo_drives[c].ide_channel >> 1, + mo_drives[c].ide_channel & 1); + config_set_string(cat, temp, tmp2); + } - sprintf(temp, "mo_%02i_scsi_id", c + 1); - config_delete_var(cat, temp); + sprintf(temp, "mo_%02i_scsi_id", c + 1); + config_delete_var(cat, temp); - sprintf(temp, "mo_%02i_scsi_location", c+1); - if (mo_drives[c].bus_type != MO_BUS_SCSI) - config_delete_var(cat, temp); - else { - sprintf(tmp2, "%01u:%02u", mo_drives[c].scsi_device_id>>4, - mo_drives[c].scsi_device_id & 15); - config_set_string(cat, temp, tmp2); - } + sprintf(temp, "mo_%02i_scsi_location", c + 1); + if (mo_drives[c].bus_type != MO_BUS_SCSI) + config_delete_var(cat, temp); + else { + sprintf(tmp2, "%01u:%02u", mo_drives[c].scsi_device_id >> 4, + mo_drives[c].scsi_device_id & 15); + config_set_string(cat, temp, tmp2); + } - sprintf(temp, "mo_%02i_image_path", c + 1); - if ((mo_drives[c].bus_type == 0) || - (strlen(mo_drives[c].image_path) == 0)) { - config_delete_var(cat, temp); - } else { - config_set_string(cat, temp, mo_drives[c].image_path); - } + sprintf(temp, "mo_%02i_image_path", c + 1); + if ((mo_drives[c].bus_type == 0) || (strlen(mo_drives[c].image_path) == 0)) { + config_delete_var(cat, temp); + } else { + config_set_string(cat, temp, mo_drives[c].image_path); + } } delete_section_if_empty(cat); } - void config_save(void) { - int i; + int i; - save_general(); /* General */ - for (i = 0; i < MONITORS_NUM; i++) - save_monitor(i); - save_machine(); /* Machine */ - save_video(); /* Video */ - save_input_devices(); /* Input devices */ - save_sound(); /* Sound */ - save_network(); /* Network */ - save_ports(); /* Ports (COM & LPT) */ - save_storage_controllers(); /* Storage controllers */ - save_hard_disks(); /* Hard disks */ - save_floppy_and_cdrom_drives(); /* Floppy and CD-ROM drives */ - save_other_removable_devices(); /* Other removable devices */ - save_other_peripherals(); /* Other peripherals */ + save_general(); /* General */ + for (i = 0; i < MONITORS_NUM; i++) + save_monitor(i); + save_machine(); /* Machine */ + save_video(); /* Video */ + save_input_devices(); /* Input devices */ + save_sound(); /* Sound */ + save_network(); /* Network */ + save_ports(); /* Ports (COM & LPT) */ + save_storage_controllers(); /* Storage controllers */ + save_hard_disks(); /* Hard disks */ + save_floppy_and_cdrom_drives(); /* Floppy and CD-ROM drives */ + save_other_removable_devices(); /* Other removable devices */ + save_other_peripherals(); /* Other peripherals */ config_write(cfg_path); } - void config_dump(void) { section_t *sec; - sec = (section_t *)config_head.next; + sec = (section_t *) config_head.next; while (sec != NULL) { - entry_t *ent; + entry_t *ent; - if (sec->name[0]) - config_log("[%s]\n", sec->name); + if (sec->name[0]) + config_log("[%s]\n", sec->name); - ent = (entry_t *)sec->entry_head.next; - while (ent != NULL) { - config_log("%s = %s\n", ent->name, ent->data); + ent = (entry_t *) sec->entry_head.next; + while (ent != NULL) { + config_log("%s = %s\n", ent->name, ent->data); - ent = (entry_t *)ent->list.next; - } + ent = (entry_t *) ent->list.next; + } - sec = (section_t *)sec->list.next; + sec = (section_t *) sec->list.next; } } - void config_delete_var(char *head, char *name) { section_t *section; - entry_t *entry; + entry_t *entry; section = find_section(head); - if (section == NULL) return; + if (section == NULL) + return; entry = find_entry(section, name); if (entry != NULL) { - list_delete(&entry->list, §ion->entry_head); - free(entry); + list_delete(&entry->list, §ion->entry_head); + free(entry); } } - int config_get_int(char *head, char *name, int def) { section_t *section; - entry_t *entry; - int value; + entry_t *entry; + int value; section = find_section(head); if (section == NULL) - return(def); + return (def); entry = find_entry(section, name); if (entry == NULL) - return(def); + return (def); sscanf(entry->data, "%i", &value); - return(value); + return (value); } - double config_get_double(char *head, char *name, double def) { section_t *section; - entry_t *entry; - double value; + entry_t *entry; + double value; section = find_section(head); if (section == NULL) - return(def); + return (def); entry = find_entry(section, name); if (entry == NULL) - return(def); + return (def); sscanf(entry->data, "%lg", &value); - return(value); + return (value); } - int config_get_hex16(char *head, char *name, int def) { - section_t *section; - entry_t *entry; + section_t *section; + entry_t *entry; unsigned int value; section = find_section(head); if (section == NULL) - return(def); + return (def); entry = find_entry(section, name); if (entry == NULL) - return(def); + return (def); sscanf(entry->data, "%04X", &value); - return(value); + return (value); } - int config_get_hex20(char *head, char *name, int def) { - section_t *section; - entry_t *entry; + section_t *section; + entry_t *entry; unsigned int value; section = find_section(head); if (section == NULL) - return(def); + return (def); entry = find_entry(section, name); if (entry == NULL) - return(def); + return (def); sscanf(entry->data, "%05X", &value); - return(value); + return (value); } - int config_get_mac(char *head, char *name, int def) { - section_t *section; - entry_t *entry; + section_t *section; + entry_t *entry; unsigned int val0 = 0, val1 = 0, val2 = 0; section = find_section(head); if (section == NULL) - return(def); + return (def); entry = find_entry(section, name); if (entry == NULL) - return(def); + return (def); sscanf(entry->data, "%02x:%02x:%02x", &val0, &val1, &val2); - return((val0 << 16) + (val1 << 8) + val2); + return ((val0 << 16) + (val1 << 8) + val2); } - char * config_get_string(char *head, char *name, char *def) { section_t *section; - entry_t *entry; + entry_t *entry; section = find_section(head); if (section == NULL) - return(def); + return (def); entry = find_entry(section, name); if (entry == NULL) - return(def); + return (def); - return(entry->data); + return (entry->data); } - wchar_t * config_get_wstring(char *head, char *name, wchar_t *def) { section_t *section; - entry_t *entry; + entry_t *entry; section = find_section(head); if (section == NULL) - return(def); + return (def); entry = find_entry(section, name); if (entry == NULL) - return(def); + return (def); - return(entry->wdata); + return (entry->wdata); } - void config_set_int(char *head, char *name, int val) { section_t *section; - entry_t *ent; + entry_t *ent; section = find_section(head); if (section == NULL) - section = create_section(head); + section = create_section(head); ent = find_entry(section, name); if (ent == NULL) - ent = create_entry(section, name); + ent = create_entry(section, name); sprintf(ent->data, "%i", val); mbstowcs(ent->wdata, ent->data, 512); } - void config_set_double(char *head, char *name, double val) { section_t *section; - entry_t *ent; + entry_t *ent; section = find_section(head); if (section == NULL) - section = create_section(head); + section = create_section(head); ent = find_entry(section, name); if (ent == NULL) - ent = create_entry(section, name); + ent = create_entry(section, name); sprintf(ent->data, "%lg", val); mbstowcs(ent->wdata, ent->data, 512); } - void config_set_hex16(char *head, char *name, int val) { section_t *section; - entry_t *ent; + entry_t *ent; section = find_section(head); if (section == NULL) - section = create_section(head); + section = create_section(head); ent = find_entry(section, name); if (ent == NULL) - ent = create_entry(section, name); + ent = create_entry(section, name); sprintf(ent->data, "%04X", val); mbstowcs(ent->wdata, ent->data, sizeof_w(ent->wdata)); } - void config_set_hex20(char *head, char *name, int val) { section_t *section; - entry_t *ent; + entry_t *ent; section = find_section(head); if (section == NULL) - section = create_section(head); + section = create_section(head); ent = find_entry(section, name); if (ent == NULL) - ent = create_entry(section, name); + ent = create_entry(section, name); sprintf(ent->data, "%05X", val); mbstowcs(ent->wdata, ent->data, sizeof_w(ent->wdata)); } - void config_set_mac(char *head, char *name, int val) { section_t *section; - entry_t *ent; + entry_t *ent; section = find_section(head); if (section == NULL) - section = create_section(head); + section = create_section(head); ent = find_entry(section, name); if (ent == NULL) - ent = create_entry(section, name); + ent = create_entry(section, name); sprintf(ent->data, "%02x:%02x:%02x", - (val>>16)&0xff, (val>>8)&0xff, val&0xff); + (val >> 16) & 0xff, (val >> 8) & 0xff, val & 0xff); mbstowcs(ent->wdata, ent->data, 512); } - void config_set_string(char *head, char *name, char *val) { section_t *section; - entry_t *ent; + entry_t *ent; section = find_section(head); if (section == NULL) - section = create_section(head); + section = create_section(head); ent = find_entry(section, name); if (ent == NULL) - ent = create_entry(section, name); + ent = create_entry(section, name); if ((strlen(val) + 1) <= sizeof(ent->data)) - memcpy(ent->data, val, strlen(val) + 1); + memcpy(ent->data, val, strlen(val) + 1); else - memcpy(ent->data, val, sizeof(ent->data)); -#ifdef _WIN32 /* Make sure the string is converted from UTF-8 rather than a legacy codepage */ + memcpy(ent->data, val, sizeof(ent->data)); +#ifdef _WIN32 /* Make sure the string is converted from UTF-8 rather than a legacy codepage */ mbstoc16s(ent->wdata, ent->data, sizeof_w(ent->wdata)); #else mbstowcs(ent->wdata, ent->data, sizeof_w(ent->wdata)); #endif } - void config_set_wstring(char *head, char *name, wchar_t *val) { section_t *section; - entry_t *ent; + entry_t *ent; section = find_section(head); if (section == NULL) - section = create_section(head); + section = create_section(head); ent = find_entry(section, name); if (ent == NULL) - ent = create_entry(section, name); + ent = create_entry(section, name); memcpy(ent->wdata, val, sizeof_w(ent->wdata)); -#ifdef _WIN32 /* Make sure the string is converted to UTF-8 rather than a legacy codepage */ +#ifdef _WIN32 /* Make sure the string is converted to UTF-8 rather than a legacy codepage */ c16stombs(ent->data, ent->wdata, sizeof(ent->data)); #else wcstombs(ent->data, ent->wdata, sizeof(ent->data)); From 4723ee7912b6831814638b98873534a81d1ecadb Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Thu, 21 Jul 2022 21:56:38 -0400 Subject: [PATCH 105/386] clang-format excludes --- src/sound/midi_rtmidi.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/sound/midi_rtmidi.cpp b/src/sound/midi_rtmidi.cpp index c65a42b87..e598f2339 100644 --- a/src/sound/midi_rtmidi.cpp +++ b/src/sound/midi_rtmidi.cpp @@ -240,6 +240,7 @@ rtmidi_in_get_dev_name(int num, char *s) } static const device_config_t system_midi_config[] = { + // clang-format off { .name = "midi", .description = "MIDI out device", @@ -248,9 +249,11 @@ static const device_config_t system_midi_config[] = { .default_int = 0 }, { .name = "", .description = "", .type = CONFIG_END } + // clang-format on }; static const device_config_t midi_input_config[] = { + // clang-format off { .name = "midi_input", .description = "MIDI in device", @@ -280,6 +283,7 @@ static const device_config_t midi_input_config[] = { .default_int = 1 }, { .name = "", .description = "", .type = CONFIG_END } + // clang-format on }; const device_t rtmidi_output_device = { From 26c5b53ffdb2205696402b732e5e98ae6d3f51e1 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Thu, 21 Jul 2022 22:01:01 -0400 Subject: [PATCH 106/386] clang-format in src/sound --- src/sound/midi_rtmidi.cpp | 154 ++++++++++++++++++-------------------- 1 file changed, 71 insertions(+), 83 deletions(-) diff --git a/src/sound/midi_rtmidi.cpp b/src/sound/midi_rtmidi.cpp index e598f2339..c60f224ab 100644 --- a/src/sound/midi_rtmidi.cpp +++ b/src/sound/midi_rtmidi.cpp @@ -15,12 +15,12 @@ */ #if defined __has_include -# if __has_include () -# include -# endif -# if __has_include () -# include -# endif +# if __has_include() +# include +# endif +# if __has_include() +# include +# endif #endif #include @@ -38,16 +38,15 @@ extern "C" // Disable c99-designator to avoid the warnings in rtmidi_*_device #ifdef __clang__ -#if __has_warning("-Wc99-designator") -#pragma clang diagnostic ignored "-Wc99-designator" -#endif +# if __has_warning("-Wc99-designator") +# pragma clang diagnostic ignored "-Wc99-designator" +# endif #endif -static RtMidiOut * midiout = nullptr; -static RtMidiIn * midiin = nullptr; -static int midi_out_id = 0, midi_in_id = 0; -static const int midi_lengths[8] = {3, 3, 3, 3, 2, 2, 3, 1}; - +static RtMidiOut *midiout = nullptr; +static RtMidiIn *midiin = nullptr; +static int midi_out_id = 0, midi_in_id = 0; +static const int midi_lengths[8] = { 3, 3, 3, 3, 2, 2, 3, 1 }; int rtmidi_write(uint8_t val) @@ -55,55 +54,53 @@ rtmidi_write(uint8_t val) return 0; } - void rtmidi_play_msg(uint8_t *msg) { if (midiout) - midiout->sendMessage(msg, midi_lengths[(msg[0] >> 4) & 7]); + midiout->sendMessage(msg, midi_lengths[(msg[0] >> 4) & 7]); } - void rtmidi_play_sysex(uint8_t *sysex, unsigned int len) { if (midiout) - midiout->sendMessage(sysex, len); + midiout->sendMessage(sysex, len); } - void* rtmidi_output_init(const device_t *info) { - midi_device_t* dev = (midi_device_t*)malloc(sizeof(midi_device_t)); + midi_device_t *dev = (midi_device_t *) malloc(sizeof(midi_device_t)); memset(dev, 0, sizeof(midi_device_t)); - dev->play_msg = rtmidi_play_msg; + dev->play_msg = rtmidi_play_msg; dev->play_sysex = rtmidi_play_sysex; - dev->write = rtmidi_write; + dev->write = rtmidi_write; try { - if (!midiout) midiout = new RtMidiOut; - } catch (RtMidiError& error) { - pclog("Failed to initialize MIDI output: %s\n", error.getMessage().c_str()); - return nullptr; - } - - midi_out_id = config_get_int((char*)SYSTEM_MIDI_NAME, (char*)"midi", 0); - - try { - midiout->openPort(midi_out_id); - } catch (RtMidiError& error) { - pclog("Fallback to default MIDI output port: %s\n", error.getMessage().c_str()); - - try { - midiout->openPort(0); - } catch (RtMidiError& error) { + if (!midiout) + midiout = new RtMidiOut; + } catch (RtMidiError &error) { pclog("Failed to initialize MIDI output: %s\n", error.getMessage().c_str()); - delete midiout; - midiout = nullptr; return nullptr; } + + midi_out_id = config_get_int((char *) SYSTEM_MIDI_NAME, (char *) "midi", 0); + + try { + midiout->openPort(midi_out_id); + } catch (RtMidiError &error) { + pclog("Fallback to default MIDI output port: %s\n", error.getMessage().c_str()); + + try { + midiout->openPort(0); + } catch (RtMidiError &error) { + pclog("Failed to initialize MIDI output: %s\n", error.getMessage().c_str()); + delete midiout; + midiout = nullptr; + return nullptr; + } } midi_out_init(dev); @@ -111,12 +108,11 @@ rtmidi_output_init(const device_t *info) return dev; } - void rtmidi_output_close(void *p) { if (!midiout) - return; + return; midiout->closePort(); @@ -126,68 +122,64 @@ rtmidi_output_close(void *p) midi_out_close(); } - int rtmidi_out_get_num_devs(void) { if (!midiout) { - try { - midiout = new RtMidiOut; - } catch (RtMidiError& error) { - pclog("Failed to initialize MIDI output: %s\n", error.getMessage().c_str()); - } + try { + midiout = new RtMidiOut; + } catch (RtMidiError &error) { + pclog("Failed to initialize MIDI output: %s\n", error.getMessage().c_str()); + } } return midiout ? midiout->getPortCount() : 0; } - void rtmidi_out_get_dev_name(int num, char *s) { strcpy(s, midiout->getPortName(num).c_str()); } - void rtmidi_input_callback(double timeStamp, std::vector *message, void *userData) { if (message->front() == 0xF0) midi_in_sysex(message->data(), message->size()); else - midi_in_msg(message->data(), message->size()); + midi_in_msg(message->data(), message->size()); } - void* rtmidi_input_init(const device_t *info) { - midi_device_t* dev = (midi_device_t*)malloc(sizeof(midi_device_t)); + midi_device_t *dev = (midi_device_t *) malloc(sizeof(midi_device_t)); memset(dev, 0, sizeof(midi_device_t)); try { - if (!midiin) - midiin = new RtMidiIn; - } catch (RtMidiError& error) { - pclog("Failed to initialize MIDI input: %s\n", error.getMessage().c_str()); - return nullptr; - } - - midi_in_id = config_get_int((char*)MIDI_INPUT_NAME, (char*)"midi_input", 0); - - try { - midiin->openPort(midi_in_id); - } catch (RtMidiError& error) { - pclog("Fallback to default MIDI input port: %s\n", error.getMessage().c_str()); - - try { - midiin->openPort(0); - } catch (RtMidiError& error) { + if (!midiin) + midiin = new RtMidiIn; + } catch (RtMidiError &error) { pclog("Failed to initialize MIDI input: %s\n", error.getMessage().c_str()); - delete midiin; - midiin = nullptr; return nullptr; } + + midi_in_id = config_get_int((char *) MIDI_INPUT_NAME, (char *) "midi_input", 0); + + try { + midiin->openPort(midi_in_id); + } catch (RtMidiError &error) { + pclog("Fallback to default MIDI input port: %s\n", error.getMessage().c_str()); + + try { + midiin->openPort(0); + } catch (RtMidiError &error) { + pclog("Failed to initialize MIDI input: %s\n", error.getMessage().c_str()); + delete midiin; + midiin = nullptr; + return nullptr; + } } midiin->setCallback(&rtmidi_input_callback); @@ -198,15 +190,14 @@ rtmidi_input_init(const device_t *info) midi_in_init(dev, &midi_in); midi_in->midi_realtime = device_get_config_int("realtime"); - midi_in->thruchan = device_get_config_int("thruchan"); + midi_in->thruchan = device_get_config_int("thruchan"); midi_in->midi_clockout = device_get_config_int("clockout"); return dev; } - void -rtmidi_input_close(void* p) +rtmidi_input_close(void *p) { midiin->cancelCallback(); midiin->closePort(); @@ -217,22 +208,20 @@ rtmidi_input_close(void* p) midi_out_close(); } - int rtmidi_in_get_num_devs(void) { if (!midiin) { - try { - midiin = new RtMidiIn; - } catch (RtMidiError& error) { - pclog("Failed to initialize MIDI input: %s\n", error.getMessage().c_str()); - } + try { + midiin = new RtMidiIn; + } catch (RtMidiError &error) { + pclog("Failed to initialize MIDI input: %s\n", error.getMessage().c_str()); + } } return midiin ? midiin->getPortCount() : 0; } - void rtmidi_in_get_dev_name(int num, char *s) { @@ -313,5 +302,4 @@ const device_t rtmidi_input_device = { .force_redraw = NULL, .config = midi_input_config }; - } From 5ebc4910dbbbefbd05374269e4a6422af40b39ea Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 22 Jul 2022 18:51:16 +0200 Subject: [PATCH 107/386] Disabled two new ALi M6117 features on M1217, fixes #2494. --- src/chipset/ali6117.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/src/chipset/ali6117.c b/src/chipset/ali6117.c index 224d448a2..612970e45 100644 --- a/src/chipset/ali6117.c +++ b/src/chipset/ali6117.c @@ -219,12 +219,14 @@ ali6117_reg_write(uint16_t addr, uint8_t val, void *priv) refresh_at_enable = !(val & 0x02) || !!(dev->regs[0x20] & 0x80); dev->regs[dev->reg_offset] = val; - if (val & 0x04) - mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - else - mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + if (dev->local != 0x8) { + if (val & 0x04) + mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + else + mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - ali6117_bank_recalc(dev); + ali6117_bank_recalc(dev); + } break; case 0x12: @@ -417,9 +419,11 @@ ali6117_reset(void *priv) refresh_at_enable = 1; - /* On-board memory 15-16M is enabled by default. */ - mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - ali6117_bank_recalc(dev); + if (dev->local != 0x8) { + /* On-board memory 15-16M is enabled by default. */ + mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + ali6117_bank_recalc(dev); + } } From 1ee4a12bce103e58bc8766433ea181d4d9ad57e4 Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 22 Jul 2022 18:58:49 +0200 Subject: [PATCH 108/386] Fixed the IBM PS/2 Model 70 Type 3 and MR 386SX clone machine_t structs, fixes #2493. --- src/machine/machine_table.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 1e7b8f329..91f9ddf76 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -3175,7 +3175,7 @@ const machine_t machines[] = { .max_multi = 0 }, .bus_flags = MACHINE_PS2, - .flags = MACHINE_IDE | MACHINE_VIDEO, + .flags = MACHINE_IDE, .ram = { .min = 1024, .max = 16384, @@ -4176,8 +4176,8 @@ const machine_t machines[] = { .min_multi = 0, .max_multi = 0 }, - .flags = MACHINE_PS2_MCA, - .bus_flags = MACHINE_VIDEO, + .bus_flags = MACHINE_PS2_MCA, + .flags = MACHINE_VIDEO, .ram = { .min = 2048, .max = 65536, From a9350012ff2920617a74c4929fabc557a247b076 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 00:47:32 +0200 Subject: [PATCH 109/386] First ALi M1543C changes. --- src/chipset/ali1543.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/chipset/ali1543.c b/src/chipset/ali1543.c index 9811b198c..875cc0565 100644 --- a/src/chipset/ali1543.c +++ b/src/chipset/ali1543.c @@ -1677,13 +1677,13 @@ ali1543_init(const device_t *info) dev->pci_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, ali1533_read, ali1533_write, dev); /* Device 0B: M5229 IDE Controller*/ - dev->ide_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, ali5229_read, ali5229_write, dev); + dev->ide_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE_IDE, ali5229_read, ali5229_write, dev); /* Device 0C: M7101 Power Managment Controller */ - dev->pmu_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, ali7101_read, ali7101_write, dev); + dev->pmu_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE_PMU, ali7101_read, ali7101_write, dev); /* Device 0F: M5237 USB */ - dev->usb_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, ali5237_read, ali5237_write, dev); + dev->usb_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE_USB, ali5237_read, ali5237_write, dev); /* Ports 3F0-1h: M1543 Super I/O */ io_sethandler(FDC_PRIMARY_ADDR, 0x0002, ali1533_sio_read, NULL, NULL, ali1533_sio_write, NULL, NULL, dev); @@ -1704,7 +1704,8 @@ ali1543_init(const device_t *info) dev->ddma = device_add(&ddma_device); /* Floppy Disk Controller */ - dev->fdc_controller = device_add(&fdc_at_smc_device); + // dev->fdc_controller = device_add(&fdc_at_smc_device); + dev->fdc_controller = NULL; /* IDE Controllers */ dev->ide_controller[0] = device_add_inst(&sff8038i_device, 1); From f518a496f0cbda7713823d5436d399388f1de7e5 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 01:15:59 +0200 Subject: [PATCH 110/386] PCI changes. --- src/include/86box/pci.h | 7 +++++ src/pci.c | 60 +++++++++++++++++++++++++++++++++-------- 2 files changed, 56 insertions(+), 11 deletions(-) diff --git a/src/include/86box/pci.h b/src/include/86box/pci.h index 98aac3436..7908ea558 100644 --- a/src/include/86box/pci.h +++ b/src/include/86box/pci.h @@ -58,6 +58,9 @@ enum { PCI_CARD_NORTHBRIDGE = 0, PCI_CARD_AGPBRIDGE, PCI_CARD_SOUTHBRIDGE, + PCI_CARD_SOUTHBRIDGE_IDE, + PCI_CARD_SOUTHBRIDGE_PMU, + PCI_CARD_SOUTHBRIDGE_USB, PCI_CARD_AGP = 0x0f, PCI_CARD_NORMAL = 0x10, PCI_CARD_VIDEO, @@ -72,6 +75,9 @@ enum { PCI_ADD_NORTHBRIDGE = 0, PCI_ADD_AGPBRIDGE, PCI_ADD_SOUTHBRIDGE, + PCI_ADD_SOUTHBRIDGE_IDE, + PCI_ADD_SOUTHBRIDGE_PMU, + PCI_ADD_SOUTHBRIDGE_USB, PCI_ADD_AGP = 0x0f, PCI_ADD_NORMAL = 0x10, PCI_ADD_VIDEO, @@ -111,6 +117,7 @@ extern void pci_init(int type); extern uint8_t pci_register_bus(); extern void pci_set_pmc(uint8_t pmc); extern void pci_remap_bus(uint8_t bus_index, uint8_t bus_number); +extern void pci_relocate_slot(int type, int new_slot); extern void pci_register_slot(int card, int type, int inta, int intb, int intc, int intd); extern void pci_register_bus_slot(int bus, int card, int type, diff --git a/src/pci.c b/src/pci.c index 7b4a7c6ed..36dd09002 100644 --- a/src/pci.c +++ b/src/pci.c @@ -94,6 +94,53 @@ pci_log(const char *fmt, ...) #endif +static void +pci_clear_slot(int card) +{ + int i; + + pci_card_to_slot_mapping[pci_cards[card].bus][pci_cards[card].id] = 0xff; + + pci_cards[card].id = 0xff; + pci_cards[card].type = 0xff; + + for (i = 0; i < 4; i++) + pci_cards[card].irq_routing[i] = 0; + + pci_cards[card].read = NULL; + pci_cards[card].write = NULL; + pci_cards[card].priv = NULL; +} + + +void +pci_relocate_slot(int type, int new_slot) +{ + int i, card = -1; + int old_slot; + uint8_t mapping; + + if ((new_slot < 0) || (new_slot > 31)) + return; + + for (i = 0; i < 32; i++) { + if ((pci_cards[i].bus == 0) && (pci_cards[i].type == type)) { + card = i; + break; + } + } + + if (card == -1) + return; + + old_slot = pci_cards[card].id; + pci_cards[card].id = new_slot; + mapping = pci_card_to_slot_mapping[0][old_slot]; + pci_card_to_slot_mapping[0][old_slot] = 0xff; + pci_card_to_slot_mapping[0][new_slot] = mapping; +} + + static void pci_cf8_write(uint16_t port, uint32_t val, void *priv) { @@ -809,17 +856,8 @@ pci_slots_clear(void) last_pci_card = last_normal_pci_card = 0; last_pci_bus = 1; - for (i = 0; i < 32; i++) { - pci_cards[i].id = 0xff; - pci_cards[i].type = 0xff; - - for (j = 0; j < 4; j++) - pci_cards[i].irq_routing[j] = 0; - - pci_cards[i].read = NULL; - pci_cards[i].write = NULL; - pci_cards[i].priv = NULL; - } + for (i = 0; i < 32; i++) + pci_clear_slot(i); i = 0; do { From f7f8ec79b9ef770334bf5b2f6181f8bdede17b20 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 01:29:19 +0200 Subject: [PATCH 111/386] M1543(c) and machine changes. --- src/chipset/ali1543.c | 15 +++++++++++---- src/machine/m_at_slot1.c | 8 ++++---- src/machine/m_at_socket7.c | 16 ++++++++-------- src/machine/m_at_sockets7.c | 32 ++++++++++++++++---------------- 4 files changed, 39 insertions(+), 32 deletions(-) diff --git a/src/chipset/ali1543.c b/src/chipset/ali1543.c index 875cc0565..d7ac979d8 100644 --- a/src/chipset/ali1543.c +++ b/src/chipset/ali1543.c @@ -56,6 +56,7 @@ typedef struct ali1543_t sio_regs[256], device_regs[8][256], sio_index, in_configuration_mode, pci_slot, ide_slot, usb_slot, pmu_slot, usb_dev_enable, ide_dev_enable, pmu_dev_enable, type; + int offset; apm_t * apm; acpi_t * acpi; @@ -274,8 +275,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) dev->pci_conf[addr] = val & 0xe0; break; - /* IDE interface control - TODO: What is IDSEL address? */ + /* IDE interface control */ case 0x58: dev->pci_conf[addr] = val & 0x7f; ali1543_log("PCI58: %02X\n", val); @@ -294,6 +294,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) dev->ide_slot = 0x0d; /* A24 = slot 13 */ break; } + pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_IDE, ((int) dev->ide_slot) + dev->offset); ali1543_log("IDE slot = %02X (A%0i)\n", dev->ide_slot/* - 5*/, dev->ide_slot + 11); ali5229_ide_irq_handler(dev); break; @@ -363,6 +364,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) dev->pmu_slot = 0x04; /* A15 = slot 04 */ break; } + pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_PMU, ((int) dev->pmu_slot) + dev->offset); ali1543_log("PMU slot = %02X (A%0i)\n", dev->pmu_slot/* - 5*/, dev->pmu_slot + 11); switch (val & 0x03) { case 0x00: @@ -378,6 +380,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) dev->usb_slot = 0x01; /* A12 = slot 01 */ break; } + pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_USB, ((int) dev->usb_slot) + dev->offset); ali1543_log("USB slot = %02X (A%0i)\n", dev->usb_slot/* - 5*/, dev->usb_slot + 11); break; @@ -1727,7 +1730,10 @@ ali1543_init(const device_t *info) /* USB */ dev->usb = device_add(&usb_device); - dev->type = info->local; + dev->type = info->local & 0xff; + dev->offset = (info->local >> 8) & 0x7f; + if (info->local & 0x8000) + dev->offset = -dev->offset; pci_enable_mirq(0); pci_enable_mirq(1); @@ -1746,7 +1752,8 @@ const device_t ali1543_device = { .name = "ALi M1543 Desktop South Bridge", .internal_name = "ali1543", .flags = DEVICE_PCI, - .local = 0, + .local = 0x8500, /* -5 slot offset, we can do this because we currently + have no case of M1543 non-C with a different offset */ .init = ali1543_init, .close = ali1543_close, .reset = ali1543_reset, diff --git a/src/machine/m_at_slot1.c b/src/machine/m_at_slot1.c index 39a60b0f9..188364e1c 100644 --- a/src/machine/m_at_slot1.c +++ b/src/machine/m_at_slot1.c @@ -709,14 +709,14 @@ machine_at_m729_init(const machine_t *model) pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 0, 0); pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x03, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); + pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE_IDE, 1, 2, 3, 4); + pci_register_slot(0x03, PCI_CARD_SOUTHBRIDGE_PMU, 1, 2, 3, 4); + pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE_USB, 1, 2, 3, 4); pci_register_slot(0x14, PCI_CARD_NORMAL, 1, 2, 3, 4); pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x10, PCI_CARD_NORMAL, 3, 4, 1, 2); device_add(&ali1621_device); - device_add(&ali1543c_device); + device_add(&ali1543c_device); /* +0 */ device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); diff --git a/src/machine/m_at_socket7.c b/src/machine/m_at_socket7.c index 4adcb2ad9..25fa8483e 100644 --- a/src/machine/m_at_socket7.c +++ b/src/machine/m_at_socket7.c @@ -996,15 +996,15 @@ machine_at_m560_init(const machine_t *model) pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x0B, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); + pci_register_slot(0x0B, PCI_CARD_SOUTHBRIDGE_IDE, 1, 2, 3, 4); + pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE_PMU, 1, 2, 3, 4); + pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE_USB, 1, 2, 3, 4); pci_register_slot(0x03, PCI_CARD_NORMAL, 1, 2, 3, 4); pci_register_slot(0x04, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x05, PCI_CARD_NORMAL, 3, 4, 1, 2); pci_register_slot(0x06, PCI_CARD_NORMAL, 4, 1, 2, 3); device_add(&ali1531_device); - device_add(&ali1543_device); + device_add(&ali1543_device); /* -5 */ device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x3, 256); @@ -1029,9 +1029,9 @@ machine_at_ms5164_init(const machine_t *model) pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x0B, PCI_CARD_SOUTHBRIDGE, 5, 6, 0, 0); - pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); + pci_register_slot(0x0B, PCI_CARD_SOUTHBRIDGE_IDE, 5, 6, 0, 0); + pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE_PMU, 1, 2, 3, 4); + pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE_USB, 1, 2, 3, 4); pci_register_slot(0x03, PCI_CARD_NORMAL, 1, 2, 3, 4); pci_register_slot(0x04, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x05, PCI_CARD_NORMAL, 3, 4, 1, 2); @@ -1039,7 +1039,7 @@ machine_at_ms5164_init(const machine_t *model) pci_register_slot(0x07, PCI_CARD_NORMAL, 1, 2, 3, 4); device_add(&ali1531_device); - device_add(&ali1543_device); + device_add(&ali1543_device); /* -5 */ device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x3, 256); diff --git a/src/machine/m_at_sockets7.c b/src/machine/m_at_sockets7.c index dae4e5396..c8eeccea0 100644 --- a/src/machine/m_at_sockets7.c +++ b/src/machine/m_at_sockets7.c @@ -62,9 +62,9 @@ machine_at_p5a_init(const machine_t *model) pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 0, 0); pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x03, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); + pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE_IDE, 1, 2, 3, 4); + pci_register_slot(0x03, PCI_CARD_SOUTHBRIDGE_PMU, 1, 2, 3, 4); + pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE_USB, 1, 2, 3, 4); pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2); @@ -72,7 +72,7 @@ machine_at_p5a_init(const machine_t *model) pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3); pci_register_slot(0x06, PCI_CARD_NORMAL, 3, 4, 1, 2); device_add(&ali1541_device); - device_add(&ali1543c_device); + device_add(&ali1543c_device); /* +0 */ device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_39sf020_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); @@ -99,14 +99,14 @@ machine_at_m579_init(const machine_t *model) pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 0, 0); pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x03, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); + pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE_IDE, 1, 2, 3, 4); + pci_register_slot(0x03, PCI_CARD_SOUTHBRIDGE_PMU, 1, 2, 3, 4); + pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE_USB, 1, 2, 3, 4); pci_register_slot(0x10, PCI_CARD_NORMAL, 3, 4, 1, 2); pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x14, PCI_CARD_NORMAL, 1, 2, 3, 4); device_add(&ali1541_device); - device_add(&ali1543c_device); + device_add(&ali1543c_device); /* +0 */ device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); @@ -132,14 +132,14 @@ machine_at_5aa_init(const machine_t *model) pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 0, 0); pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x03, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); + pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE_IDE, 1, 2, 3, 4); + pci_register_slot(0x03, PCI_CARD_SOUTHBRIDGE_PMU, 1, 2, 3, 4); + pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE_USB, 1, 2, 3, 4); pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4); pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2); device_add(&ali1541_device); - device_add(&ali1543c_device); + device_add(&ali1543c_device); /* +0 */ device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); @@ -165,16 +165,16 @@ machine_at_5ax_init(const machine_t *model) pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 0, 0); pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x03, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); + pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE_IDE, 1, 2, 3, 4); + pci_register_slot(0x03, PCI_CARD_SOUTHBRIDGE_PMU, 1, 2, 3, 4); + pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE_USB, 1, 2, 3, 4); pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4); pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2); pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3); pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); device_add(&ali1541_device); - device_add(&ali1543c_device); + device_add(&ali1543c_device); /* +0 */ device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); From 44713c4f7fe9fc9e2fafc8b065ef6ee381043488 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 03:10:13 +0200 Subject: [PATCH 112/386] Preliminary ALi M5123 code. --- src/sio/CMakeLists.txt | 4 +- src/sio/sio_ali5123.c | 479 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 481 insertions(+), 2 deletions(-) create mode 100644 src/sio/sio_ali5123.c diff --git a/src/sio/CMakeLists.txt b/src/sio/CMakeLists.txt index 52677a544..5017295b1 100644 --- a/src/sio/CMakeLists.txt +++ b/src/sio/CMakeLists.txt @@ -13,8 +13,8 @@ # Copyright 2020,2021 David Hrdlička. # -add_library(sio OBJECT sio_acc3221.c sio_f82c710.c sio_82091aa.c sio_fdc37c6xx.c - sio_fdc37c67x.c sio_fdc37c669.c sio_fdc37c93x.c sio_fdc37m60x.c +add_library(sio OBJECT sio_acc3221.c sio_ali5123.c sio_f82c710.c sio_82091aa.c + sio_fdc37c6xx.c sio_fdc37c67x.c sio_fdc37c669.c sio_fdc37c93x.c sio_fdc37m60x.c sio_it8661f.c sio_pc87306.c sio_pc87307.c sio_pc87309.c sio_pc87310.c sio_pc87311.c sio_pc87332.c sio_prime3b.c sio_prime3c.c diff --git a/src/sio/sio_ali5123.c b/src/sio/sio_ali5123.c new file mode 100644 index 000000000..528a5106e --- /dev/null +++ b/src/sio/sio_ali5123.c @@ -0,0 +1,479 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Implementation of the ALi M5123/1543C Super I/O Chip. + * + * + * + * Author: Miran Grca, + * Copyright 2016-2018 Miran Grca. + */ +#include +#include +#include +#include +#include +#include <86box/86box.h> +#include <86box/io.h> +#include <86box/timer.h> +#include <86box/device.h> +#include <86box/pic.h> +#include <86box/pci.h> +#include <86box/lpt.h> +#include <86box/serial.h> +#include <86box/hdc.h> +#include <86box/hdc_ide.h> +#include <86box/fdd.h> +#include <86box/fdc.h> +#include "cpu.h" +#include <86box/sio.h> + + +#define AB_RST 0x80 + + +typedef struct { + uint8_t chip_id, is_apm, + tries, + regs[48], + ld_regs[11][256]; + int locked, + cur_reg; + fdc_t *fdc; + serial_t *uart[3]; +} ali5123_t; + + +static void ali5123_write(uint16_t port, uint8_t val, void *priv); +static uint8_t ali5123_read(uint16_t port, void *priv); + + +static uint16_t +make_port(ali5123_t *dev, uint8_t ld) +{ + uint16_t r0 = dev->ld_regs[ld][0x60]; + uint16_t r1 = dev->ld_regs[ld][0x61]; + + uint16_t p = (r0 << 8) + r1; + + return p; +} + + +static void +ali5123_fdc_handler(ali5123_t *dev) +{ + uint16_t ld_port = 0; + uint8_t global_enable = !!(dev->regs[0x22] & (1 << 0)); + uint8_t local_enable = !!dev->ld_regs[0][0x30]; + + fdc_remove(dev->fdc); + if (global_enable && local_enable) { + ld_port = make_port(dev, 0) & 0xFFF8; + if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) + fdc_set_base(dev->fdc, ld_port); + } +} + + +static void +ali5123_lpt_handler(ali5123_t *dev) +{ + uint16_t ld_port = 0; + uint8_t global_enable = !!(dev->regs[0x22] & (1 << 3)); + uint8_t local_enable = !!dev->ld_regs[3][0x30]; + uint8_t lpt_irq = dev->ld_regs[3][0x70]; + + if (lpt_irq > 15) + lpt_irq = 0xff; + + lpt1_remove(); + if (global_enable && local_enable) { + ld_port = make_port(dev, 3) & 0xFFFC; + if ((ld_port >= 0x0100) && (ld_port <= 0x0FFC)) + lpt1_init(ld_port); + } + lpt1_irq(lpt_irq); +} + + +static void +ali5123_serial_handler(ali5123_t *dev, int uart) +{ + uint16_t ld_port = 0; + uint8_t uart_no = (uart == 2) ? 0x0b : (4 + uart); + uint8_t global_enable = !!(dev->regs[0x22] & (1 << uart_no)); + uint8_t local_enable = !!dev->ld_regs[uart_no][0x30]; + uint8_t mask = (uart == 1) ? 0x04 : 0x05; + + serial_remove(dev->uart[uart]); + if (global_enable && local_enable) { + ld_port = make_port(dev, uart_no) & 0xFFF8; + if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) + serial_setup(dev->uart[uart], ld_port, dev->ld_regs[uart_no][0x70]); + } + + switch (dev->dev_regs[uart_no][0xc0] & mask) { + case 0x00: + serial_set_clock_src(dev->uart[uart], 1843200.0); + break; + case 0x04: + serial_set_clock_src(dev->uart[uart], 8000000.0); + break; + case 0x01: case 0x05: + serial_set_clock_src(dev->uart[uart], 2000000.0); + break; + } +} + + +static void +ali5123_reset(ali5123_t *dev) +{ + int i = 0; + + memset(dev->regs, 0, 48); + + dev->regs[0x20] = 0x43; + dev->regs[0x21] = 0x15; + dev->regs[0x2d] = 0x20; + + for (i = 0; i < 13; i++) + memset(dev->ld_regs[i], 0, 256); + + /* Logical device 0: FDD */ + dev->ld_regs[0][0x60] = 3; + dev->ld_regs[0][0x61] = 0xf0; + dev->ld_regs[0][0x70] = 6; + dev->ld_regs[0][0x74] = 2; + dev->ld_regs[0][0xf0] = 0x08; + dev->ld_regs[0][0xf2] = 0xff; + + /* Logical device 3: Parallel Port */ + dev->ld_regs[3][0x60] = 3; + dev->ld_regs[3][0x61] = 0x78; + dev->ld_regs[3][0x70] = 5; + dev->ld_regs[3][0x74] = 4; + dev->ld_regs[3][0xf0] = 0x8c; + dev->ld_regs[3][0xf1] = 0x85; + + /* Logical device 4: Serial Port 1 */ + dev->ld_regs[4][0x60] = 3; + dev->ld_regs[4][0x61] = 0xf8; + dev->ld_regs[4][0x70] = 4; + dev->ld_regs[4][0xf2] = 0x0c; + serial_setup(dev->uart[0], COM1_ADDR, dev->ld_regs[4][0x70]); + + /* Logical device 5: Serial Port 2 - HP like module */ + dev->ld_regs[5][0x60] = 3; + dev->ld_regs[5][0x61] = 0xe8; + dev->ld_regs[5][0x70] = 9; + dev->ld_regs[5][0xf0] = 0x80; + dev->ld_regs[4][0xf2] = 0x0c; + serial_setup(dev->uart[1], 0x03e8, dev->ld_regs[5][0x70]); + + /* Logical device 7: Keyboard */ + dev->ld_regs[7][0x70] = 1; + /* TODO: Register F0 bit 6: 0 = PS/2, 1 = AT */ + + /* Logical device B: Serial Port 2 - HP like module */ + dev->ld_regs[0x0b][0x60] = 2; + dev->ld_regs[0x0b][0x61] = 0xf8; + dev->ld_regs[0x0b][0x70] = 3; + dev->ld_regs[0x0b][0xf0] = 0x00; + dev->ld_regs[0x0b][0xf2] = 0x0c; + serial_setup(dev->uart[2], COM2_ADDR, dev->ld_regs[0x0b][0x70]); + + /* Logical device C: Hotkey */ + dev->ld_regs[0x0c][0xf0] = 0x35; + dev->ld_regs[0x0c][0xf1] = 0x14; + dev->ld_regs[0x0c][0xf2] = 0x11; + dev->ld_regs[0x0c][0xf3] = 0x71; + dev->ld_regs[0x0c][0xf4] = 0x42; + + ali5123_lpt_handler(dev); + ali5123_serial_handler(dev, 0); + ali5123_serial_handler(dev, 1); + ali5123_serial_handler(dev, 2); + + fdc_reset(dev->fdc); + ali5123_fdc_handler(dev); + + dev->locked = 0; +} + + +static void +ali5123_write(uint16_t port, uint8_t val, void *priv) +{ + ali5123_t *dev = (ali5123_t *) priv; + uint8_t index = (port & 1) ? 0 : 1; + uint8_t valxor = 0x00, keep = 0x00; + uint8_t cur_ld; + + if (index) { + if (((val == 0x51) && !dev->tries && !dev->locked) || + ((val == 0x23) && dev->tries && !dev->locked)) + if (dev->tries) { + dev->locked = 1; + fdc_3f1_enable(dev->fdc, 0); + dev->tries = 0; + } else + dev->tries++; + } else { + if (dev->locked) { + if (val == 0xbb) { + dev->locked = 0; + fdc_3f1_enable(dev->fdc, 1); + return; + } + dev->cur_reg = val; + } else { + if (dev->tries) + dev->tries = 0; + } + } + return; + } else { + if (dev->locked) { + if (dev->cur_reg < 48) { + valxor = val ^ dev->regs[dev->cur_reg]; + if ((val == 0x1f) || (val == 0x20) || (val == 0x21)) + return; + dev->regs[dev->cur_reg] = val; + } else { + valxor = val ^ dev->ld_regs[dev->regs[7]][dev->cur_reg]; + if (((dev->cur_reg & 0xf0) == 0x70) && (dev->regs[7] < 4)) + return; + /* Block writes to some logical devices. */ + if (dev->regs[7] > 0x0c) + return; + else switch (dev->regs[7]) { + case 0x01: case 0x02: case 0x06: case 0x08: + case 0x09: case 0x0a: + return; + } + dev->ld_regs[dev->regs[7]][dev->cur_reg] = val | keep; + } + } else + return; + } + + if (dev->cur_reg < 48) { + switch(dev->cur_reg) { + case 0x02: + if (val & 0x01) + ali5123_reset(dev); + dev->regs[0x02] = 0x00; + break; + case 0x22: + if (valxor & 0x01) + ali5123_fdc_handler(dev); + if (valxor & 0x08) + ali5123_lpt_handler(dev); + if (valxor & 0x10) + ali5123_serial_handler(dev, 0); + if (valxor & 0x20) + ali5123_serial_handler(dev, 1); + if (valxor & 0x40) + ali5123_serial_handler(dev, 2); + break; + } + + return; + } + + cur_ld = dev->regs[7]; + if ((dev->regs[7] == 5) && (dev->regs[0x2d] & 0x20)) + cur_ld = 0x0b; + else if ((dev->regs[7] == 0x0b) && (dev->regs[0x2d] & 0x20)) + cur_ld = 5; + switch(cur_ld) { + case 0: + /* FDD */ + switch(dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x01; + if (valxor) + ali5123_fdc_handler(dev); + break; + case 0xf0: + if (valxor & 0x08) + fdc_update_enh_mode(dev->fdc, !(val & 0x08)); + if (valxor & 0x10) + fdc_set_swap(dev->fdc, (val & 0x10) >> 4); + break; + case 0xf1: + if (valxor & 0xc) + fdc_update_densel_force(dev->fdc, (val & 0xc) >> 2); + break; + case 0xf4: + if (valxor & 0x08) + fdc_update_drvrate(dev->fdc, 0, (val & 0x08) >> 3); + break; + case 0xf5: + if (valxor & 0x08) + fdc_update_drvrate(dev->fdc, 1, (val & 0x08) >> 3); + break; + case 0xf6: + if (valxor & 0x08) + fdc_update_drvrate(dev->fdc, 2, (val & 0x08) >> 3); + break; + case 0xf7: + if (valxor & 0x08) + fdc_update_drvrate(dev->fdc, 3, (val & 0x08) >> 3); + break; + } + break; + case 3: + /* Parallel port */ + switch(dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x08; + if (valxor) + ali5123_lpt_handler(dev); + break; + } + break; + case 4: + /* Serial port 1 */ + switch(dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + case 0xf0: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x10; + if (valxor) + ali5123_serial_handler(dev, 0); + break; + } + break; + case 5: + /* Serial port 2 - HP like module */ + switch(dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + case 0xf0: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x20; + if (valxor) + ali5123_serial_handler(dev, 1); + break; + } + break; + case 0x0b: + /* Serial port 3 */ + switch(dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + case 0xf0: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x40; + if (valxor) + ali5123_serial_handler(dev, 2); + break; + } + break; + } +} + + +static uint8_t +ali5123_read(uint16_t port, void *priv) +{ + ali5123_t *dev = (ali5123_t *) priv; + uint8_t index = (port & 1) ? 0 : 1; + uint8_t ret = 0xff, cur_ld; + int f_irq = dev->ld_regs[0][0x70]; + int p_irq = dev->ld_regs[3][0x70]; + int s1_irq = dev->ld_regs[4][0x70]; + int s2_irq = dev->ld_regs[5][0x70]; + + if (dev->locked) { + if (index) + ret = dev->cur_reg; + else { + if (dev->cur_reg < 0x30) { + if (dev->cur_reg == 0x20) + ret = dev->chip_id; + else + ret = dev->regs[dev->cur_reg]; + } else { + cur_ld = dev->regs[7]; + if ((dev->regs[7] == 5) && (dev->regs[0x2d] & 0x20)) + cur_ld = 0x0b; + else if ((dev->regs[7] == 0x0b) && (dev->regs[0x2d] & 0x20)) + cur_ld = 5; + + ret = dev->ld_regs[cur_ld][dev->cur_reg]; + } + } + } + + return ret; +} + + +static void +ali5123_close(void *priv) +{ + ali5123_t *dev = (ali5123_t *) priv; + + free(dev); +} + + +static void * +ali5123_init(const device_t *info) +{ + ali5123_t *dev = (ali5123_t *) malloc(sizeof(ali5123_t)); + memset(dev, 0, sizeof(ali5123_t)); + + dev->fdc = device_add(&fdc_at_ali_device); + + dev->uart[0] = device_add_inst(&ns16550_device, 1); + dev->uart[1] = device_add_inst(&ns16550_device, 2); + dev->uart[2] = device_add_inst(&ns16550_device, 3); + + dev->chip_id = info->local & 0xff; + + ali5123_reset(dev); + + io_sethandler(FDC_PRIMARY_ADDR, 0x0002, + ali5123_read, NULL, NULL, ali5123_write, NULL, NULL, dev); + + return dev; +} + + +const device_t ali5123_device = { + .name = "ALi M5123/M1543C Super I/O", + .internal_name = "ali5123", + .flags = 0, + .local = 0x40, + .init = ali5123_init, + .close = ali5123_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; From ee6eee681003e23e4914d9edf953d7355d3c5f6c Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 03:10:46 +0200 Subject: [PATCH 113/386] ALi M5123 in sio.h. --- src/include/86box/fdc.h | 4 +++- src/include/86box/sio.h | 1 + 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/src/include/86box/fdc.h b/src/include/86box/fdc.h index f50e82b58..fa763b0ef 100644 --- a/src/include/86box/fdc.h +++ b/src/include/86box/fdc.h @@ -50,7 +50,8 @@ extern int fdc_type; #define FDC_FLAG_NSC 0x80 /* PC87306, PC87309 */ #define FDC_FLAG_TOSHIBA 0x100 /* T1000, T1200 */ #define FDC_FLAG_AMSTRAD 0x200 /* Non-AT Amstrad machines */ -#define FDC_FLAG_UMC 0x400 /* UMC UM8398 */ +#define FDC_FLAG_UMC 0x400 /* UMC UM8398 */ +#define FDC_FLAG_ALI 0x800 /* ALi M512x / M1543C */ typedef struct { @@ -194,6 +195,7 @@ extern const device_t fdc_at_device; extern const device_t fdc_at_actlow_device; extern const device_t fdc_at_ps1_device; extern const device_t fdc_at_smc_device; +extern const device_t fdc_at_ali_device; extern const device_t fdc_at_winbond_device; extern const device_t fdc_at_nsc_device; extern const device_t fdc_dp8473_device; diff --git a/src/include/86box/sio.h b/src/include/86box/sio.h index 6f9cfa731..e0cf20fe0 100644 --- a/src/include/86box/sio.h +++ b/src/include/86box/sio.h @@ -19,6 +19,7 @@ extern void vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv); extern const device_t acc3221_device; +extern const device_t ali5123_device; extern const device_t f82c710_device; extern const device_t f82c606_device; extern const device_t fdc37c651_device; From 79fd8bbf26e5d132f36bfb18ec2217e1b8565438 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 03:13:23 +0200 Subject: [PATCH 114/386] ALi M5123-related changes in chipset/ali1543.c. --- src/chipset/ali1543.c | 183 +----------------------------------------- 1 file changed, 4 insertions(+), 179 deletions(-) diff --git a/src/chipset/ali1543.c b/src/chipset/ali1543.c index d7ac979d8..4c03b7753 100644 --- a/src/chipset/ali1543.c +++ b/src/chipset/ali1543.c @@ -30,18 +30,15 @@ #include <86box/apm.h> #include <86box/dma.h> #include <86box/ddma.h> -#include <86box/fdd.h> -#include <86box/fdc.h> #include <86box/hdc_ide.h> #include <86box/hdc_ide_sff8038i.h> #include <86box/keyboard.h> -#include <86box/lpt.h> #include <86box/mem.h> #include <86box/nvr.h> #include <86box/pci.h> #include <86box/pic.h> #include <86box/port_92.h> -#include <86box/serial.h> +#include <86box/sio.h> #include <86box/smbus.h> #include <86box/usb.h> @@ -53,7 +50,6 @@ typedef struct ali1543_t { uint8_t pci_conf[256], pmu_conf[256], usb_conf[256], ide_conf[256], - sio_regs[256], device_regs[8][256], sio_index, in_configuration_mode, pci_slot, ide_slot, usb_slot, pmu_slot, usb_dev_enable, ide_dev_enable, pmu_dev_enable, type; int offset; @@ -61,10 +57,8 @@ typedef struct ali1543_t apm_t * apm; acpi_t * acpi; ddma_t * ddma; - fdc_t * fdc_controller; nvr_t * nvr; port_92_t * port_92; - serial_t * uart[2]; sff8038i_t * ide_controller[2]; smbus_ali7101_t * smbus; usb_t * usb; @@ -1403,129 +1397,6 @@ ali7101_read(int func, int addr, void *priv) } -static void -ali1533_sio_fdc_handler(ali1543_t *dev) -{ - fdc_remove(dev->fdc_controller); - - if (dev->device_regs[0][0x30] & 1) { - ali1543_log("New FDC base address: %04X\n", dev->device_regs[0][0x61] | (dev->device_regs[0][0x60] << 8)); - fdc_set_base(dev->fdc_controller, dev->device_regs[0][0x61] | (dev->device_regs[0][0x60] << 8)); - fdc_set_irq(dev->fdc_controller, dev->device_regs[0][0x70] & 0xf); - fdc_set_dma_ch(dev->fdc_controller, dev->device_regs[0][0x74] & 0x07); - ali1543_log("M1543-SIO FDC: ADDR %04x IRQ %02x DMA %02x\n", dev->device_regs[0][0x61] | (dev->device_regs[0][0x60] << 8), dev->device_regs[0][0x70] & 0xf, dev->device_regs[0][0x74] & 0x07); - } -} - - -static void -ali1533_sio_uart_handler(int num, ali1543_t *dev) -{ - serial_remove(dev->uart[num]); - - if (dev->device_regs[num + 4][0x30] & 1) { - serial_setup(dev->uart[num], dev->device_regs[num + 4][0x61] | (dev->device_regs[num + 4][0x60] << 8), dev->device_regs[num + 4][0x70] & 0xf); - ali1543_log("M1543-SIO UART%d: ADDR %04x IRQ %02x\n", num, dev->device_regs[num + 4][0x61] | (dev->device_regs[num + 4][0x60] << 8), dev->device_regs[num + 4][0x70] & 0xf); - } -} - - -void -ali1533_sio_lpt_handler(ali1543_t *dev) -{ - lpt1_remove(); - - if (dev->device_regs[3][0x30] & 1) { - lpt1_init(dev->device_regs[3][0x61] | (dev->device_regs[3][0x60] << 8)); - lpt1_irq(dev->device_regs[3][0x70] & 0xf); - ali1543_log("M1543-SIO LPT: ADDR %04x IRQ %02x\n", dev->device_regs[3][0x61] | (dev->device_regs[3][0x60] << 8), dev->device_regs[3][0x70] & 0xf); - } -} - - -void -ali1533_sio_ldn(uint16_t ldn, ali1543_t *dev) -{ - /* We don't include all LDN's */ - switch (ldn) { - case 0: /* FDC */ - ali1533_sio_fdc_handler(dev); - break; - case 3: /* LPT */ - ali1533_sio_lpt_handler(dev); - break; - /* UART */ - case 4: case 5: - ali1533_sio_uart_handler(ldn - 4, dev); - break; - } -} - - -static void -ali1533_sio_write(uint16_t addr, uint8_t val, void *priv) -{ - ali1543_t *dev = (ali1543_t *)priv; - - switch (addr) { - case FDC_PRIMARY_ADDR: - dev->sio_index = val; - if (dev->sio_index == 0x51) - dev->in_configuration_mode = 1; - else if ((dev->sio_index == 0x23) && (dev->in_configuration_mode == 1)) - dev->in_configuration_mode = 2; - else if (dev->sio_index == 0xbb) - dev->in_configuration_mode = 0; - break; - - case 0x3f1: - if (dev->in_configuration_mode == 2) { - switch (dev->sio_index) { - case 0x07: - dev->sio_regs[dev->sio_index] = val & 0x7; - break; - - case 0x22: - dev->sio_regs[dev->sio_index] = val & 0x39; - break; - - case 0x23: - dev->sio_regs[dev->sio_index] = val & 0x38; - break; - - default: - if ((dev->sio_index < 0x30) || (dev->sio_index == 0x51) || (dev->sio_index == 0xbb)) - dev->sio_regs[dev->sio_index] = val; - else if (dev->sio_regs[0x07] <= 7) - dev->device_regs[dev->sio_regs[0x07]][dev->sio_index] = val; - break; - } - } - break; - } - - if ((!dev->in_configuration_mode) && (dev->sio_regs[0x07] <= 7) && (addr == FDC_PRIMARY_ADDR)) - ali1533_sio_ldn(dev->sio_regs[0x07], dev); -} - - -static uint8_t -ali1533_sio_read(uint16_t addr, void *priv) -{ - ali1543_t *dev = (ali1543_t *)priv; - uint8_t ret = 0xff; - - if (addr == 0x03f1) { - if (dev->sio_index >= 0x30) - ret = dev->device_regs[dev->sio_regs[0x07]][dev->sio_index]; - else - ret = dev->sio_regs[dev->sio_index]; - } - - return ret; -} - - static void ali1543_reset(void *priv) { @@ -1619,44 +1490,6 @@ ali1543_reset(void *priv) ali1533_write(0, 0x75, 0x00, dev); ali1533_write(0, 0x76, 0x00, dev); - /* M1543 Super I/O */ - memset(dev->sio_regs, 0x00, sizeof(dev->sio_regs)); - for (i = 0; i < 8; i++) - memset(dev->device_regs[i], 0x00, sizeof(dev->device_regs[i])); - - dev->device_regs[0][0x60] = 0x03; - dev->device_regs[0][0x61] = 0xf0; - dev->device_regs[0][0x70] = 0x06; - dev->device_regs[0][0x74] = 0x02; - dev->device_regs[0][0xf0] = 0x08; - dev->device_regs[0][0xf2] = 0xff; - - dev->device_regs[3][0x60] = 0x03; - dev->device_regs[3][0x61] = 0x78; - dev->device_regs[3][0x70] = 0x05; - dev->device_regs[3][0x74] = 0x04; - dev->device_regs[3][0xf0] = 0x0c; - dev->device_regs[3][0xf1] = 0x05; - - dev->device_regs[4][0x60] = 0x03; - dev->device_regs[4][0x61] = 0xf8; - dev->device_regs[4][0x70] = 0x04; - dev->device_regs[4][0xf1] = 0x02; - dev->device_regs[4][0xf2] = 0x0c; - - dev->device_regs[5][0x60] = 0x02; - dev->device_regs[5][0x61] = 0xf8; - dev->device_regs[5][0x70] = 0x03; - dev->device_regs[5][0xf1] = 0x02; - dev->device_regs[5][0xf2] = 0x0c; - - dev->device_regs[7][0x70] = 0x01; - - ali1533_sio_fdc_handler(dev); - ali1533_sio_uart_handler(0, dev); - ali1533_sio_uart_handler(1, dev); - ali1533_sio_lpt_handler(dev); - unmask_a20_in_smm = 1; } @@ -1706,10 +1539,6 @@ ali1543_init(const device_t *info) /* DDMA */ dev->ddma = device_add(&ddma_device); - /* Floppy Disk Controller */ - // dev->fdc_controller = device_add(&fdc_at_smc_device); - dev->fdc_controller = NULL; - /* IDE Controllers */ dev->ide_controller[0] = device_add_inst(&sff8038i_device, 1); dev->ide_controller[1] = device_add_inst(&sff8038i_device, 2); @@ -1717,19 +1546,15 @@ ali1543_init(const device_t *info) /* Port 92h */ dev->port_92 = device_add(&port_92_pci_device); - /* Serial NS16500 */ - dev->uart[0] = device_add_inst(&ns16550_device, 1); - dev->uart[1] = device_add_inst(&ns16550_device, 2); - /* Standard SMBus */ dev->smbus = device_add(&ali7101_smbus_device); - /* Super I/O Configuration Mechanism */ - dev->in_configuration_mode = 0; - /* USB */ dev->usb = device_add(&usb_device); + /* Super I/O chip */ + device_add(&ali5123_device); + dev->type = info->local & 0xff; dev->offset = (info->local >> 8) & 0x7f; if (info->local & 0x8000) From 771a2877181fa8c617ed7556c095e548f53ee3d7 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 03:16:25 +0200 Subject: [PATCH 115/386] And win/Makefile.mingw. --- src/win/Makefile.mingw | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 75d1ddc95..50b2b820b 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -605,7 +605,7 @@ DEVOBJ := bugger.o cartridge.o cassette.o hasp.o hwm.o hwm_lm75.o hwm_lm78.o hw phoenix_486_jumper.o endif -SIOOBJ := sio_acc3221.o \ +SIOOBJ := sio_acc3221.o sio_ali5123.o \ sio_f82c710.o sio_82091aa.o sio_fdc37c6xx.o \ sio_fdc37c67x.o sio_fdc37c669.o sio_fdc37c93x.o sio_fdc37m60x.o \ sio_it8661f.o \ From 5dc97b000ae6fa1d2b3c2b04c549566a01f789c6 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 03:19:30 +0200 Subject: [PATCH 116/386] ALi M5123 compile fixes. --- src/sio/sio_ali5123.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/src/sio/sio_ali5123.c b/src/sio/sio_ali5123.c index 528a5106e..cabe38a58 100644 --- a/src/sio/sio_ali5123.c +++ b/src/sio/sio_ali5123.c @@ -41,7 +41,7 @@ typedef struct { uint8_t chip_id, is_apm, tries, regs[48], - ld_regs[11][256]; + ld_regs[13][256]; int locked, cur_reg; fdc_t *fdc; @@ -118,7 +118,7 @@ ali5123_serial_handler(ali5123_t *dev, int uart) serial_setup(dev->uart[uart], ld_port, dev->ld_regs[uart_no][0x70]); } - switch (dev->dev_regs[uart_no][0xc0] & mask) { + switch (dev->ld_regs[uart_no][0xf0] & mask) { case 0x00: serial_set_clock_src(dev->uart[uart], 1843200.0); break; @@ -217,8 +217,8 @@ ali5123_write(uint16_t port, uint8_t val, void *priv) uint8_t cur_ld; if (index) { - if (((val == 0x51) && !dev->tries && !dev->locked) || - ((val == 0x23) && dev->tries && !dev->locked)) + if (((val == 0x51) && (!dev->tries) && (!dev->locked)) || + ((val == 0x23) && (dev->tries) && (!dev->locked))) { if (dev->tries) { dev->locked = 1; fdc_3f1_enable(dev->fdc, 0); @@ -402,10 +402,6 @@ ali5123_read(uint16_t port, void *priv) ali5123_t *dev = (ali5123_t *) priv; uint8_t index = (port & 1) ? 0 : 1; uint8_t ret = 0xff, cur_ld; - int f_irq = dev->ld_regs[0][0x70]; - int p_irq = dev->ld_regs[3][0x70]; - int s1_irq = dev->ld_regs[4][0x70]; - int s2_irq = dev->ld_regs[5][0x70]; if (dev->locked) { if (index) From 1ee0eedccb7f83ac9c9d1a9a503c70f84d5e0bfc Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 03:19:51 +0200 Subject: [PATCH 117/386] ALi M5123 FDC implementation. --- src/floppy/fdc.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/src/floppy/fdc.c b/src/floppy/fdc.c index f9efbf645..a1165f14b 100644 --- a/src/floppy/fdc.c +++ b/src/floppy/fdc.c @@ -930,6 +930,12 @@ fdc_write(uint16_t addr, uint8_t val, void *priv) fdc->pos = 0; fdc->mfm = (fdc->command&0x40)?1:0; break; + case 0x17: /*Powerdown mode*/ + if (!(fdc->flags & FDC_FLAG_ALI)) { + fdc_bad_command(fdc); + break; + } + /*FALLTHROUGH*/ case 0x07: /*Recalibrate*/ fdc->pnum=0; fdc->ptot=1; @@ -1796,6 +1802,12 @@ fdc_callback(void *priv) fdc->paramstogo = 1; fdc->interrupt = 0; return; + case 0x17: /*Powerdown mode*/ + fdc->stat = (fdc->stat & 0xf) | 0xd0; + fdc->res[10] = fdc->params[0]; + fdc->paramstogo = 1; + fdc->interrupt = 0; + return; case 0x13: /*Configure*/ fdc->config = fdc->params[1]; fdc->pretrk = fdc->params[2]; @@ -2545,6 +2557,20 @@ const device_t fdc_at_smc_device = { .config = NULL }; +const device_t fdc_at_ali_device = { + .name = "PC/AT Floppy Drive Controller (ALi M512x/M1543C)", + .internal_name = "fdc_at_ali", + .flags = 0, + .local = FDC_FLAG_AT | FDC_FLAG_SUPERIO | FDC_FLAG_ALI, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + const device_t fdc_at_winbond_device = { .name = "PC/AT Floppy Drive Controller (Winbond W83x77F)", .internal_name = "fdc_at_winbond", From 28d24679e04e81cfe6ca0d6714eef8fc788a92d8 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 03:20:09 +0200 Subject: [PATCH 118/386] ALi M1543(c) fixes. --- src/chipset/ali1543.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/src/chipset/ali1543.c b/src/chipset/ali1543.c index 4c03b7753..bde561c09 100644 --- a/src/chipset/ali1543.c +++ b/src/chipset/ali1543.c @@ -1401,7 +1401,6 @@ static void ali1543_reset(void *priv) { ali1543_t *dev = (ali1543_t *)priv; - int i; /* Temporarily enable everything. Register writes will disable the devices. */ dev->ide_dev_enable = 1; @@ -1521,9 +1520,6 @@ ali1543_init(const device_t *info) /* Device 0F: M5237 USB */ dev->usb_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE_USB, ali5237_read, ali5237_write, dev); - /* Ports 3F0-1h: M1543 Super I/O */ - io_sethandler(FDC_PRIMARY_ADDR, 0x0002, ali1533_sio_read, NULL, NULL, ali1533_sio_write, NULL, NULL, dev); - /* ACPI */ dev->acpi = device_add(&acpi_ali_device); dev->nvr = device_add(&piix4_nvr_device); From 924408cf58d5aceaed742f0b613fff2bae84e863 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Fri, 22 Jul 2022 21:15:15 -0400 Subject: [PATCH 119/386] Fix crash in TGUI 9440CXI --- src/video/vid_tgui9440.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/video/vid_tgui9440.c b/src/video/vid_tgui9440.c index a4fd83a0e..a95da1056 100644 --- a/src/video/vid_tgui9440.c +++ b/src/video/vid_tgui9440.c @@ -3150,14 +3150,16 @@ static int tgui96xx_available(void) void tgui_close(void *p) { - tgui_t *tgui = (tgui_t *)p; + tgui_t *tgui = (tgui_t *)p; - svga_close(&tgui->svga); + svga_close(&tgui->svga); + if (tgui->type >= TGUI_9440) { ddc_close(tgui->ddc); i2c_gpio_close(tgui->i2c); + }; - free(tgui); + free(tgui); } void tgui_speed_changed(void *p) From d94ae73ef73bcbb5b146b8c7ecbc59ec3ce35826 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Fri, 22 Jul 2022 21:58:03 -0400 Subject: [PATCH 120/386] Fix more I2C related bugs in the 9400CXI --- src/video/vid_tgui9440.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/video/vid_tgui9440.c b/src/video/vid_tgui9440.c index a95da1056..bac0242e1 100644 --- a/src/video/vid_tgui9440.c +++ b/src/video/vid_tgui9440.c @@ -483,7 +483,8 @@ tgui_out(uint16_t addr, uint8_t val, void *p) break; case 0x37: - i2c_gpio_set(tgui->i2c, (val & 0x02) || !(val & 0x04), (val & 0x01) || !(val & 0x08)); + if (tgui->type >= TGUI_9440) + i2c_gpio_set(tgui->i2c, (val & 0x02) || !(val & 0x04), (val & 0x01) || !(val & 0x08)); break; case 0x40: case 0x41: case 0x42: case 0x43: @@ -609,7 +610,7 @@ tgui_in(uint16_t addr, void *p) return svga->crtcreg; case 0x3D5: temp = svga->crtc[svga->crtcreg]; - if (svga->crtcreg == 0x37) { + if ((svga->crtcreg == 0x37) && (tgui->type >= TGUI_9440)) { if (!(temp & 0x04)) { temp &= ~0x02; if (i2c_gpio_get_scl(tgui->i2c)) From 9b1e90331ffa9699fa763a4f2ec927908a4d3b77 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Fri, 22 Jul 2022 23:35:18 -0400 Subject: [PATCH 121/386] Beginnings of CONFIG_BIOS support ported from machine&kb --- src/device.c | 41 ++++++++++++++++++++++++-- src/machine/machine.c | 11 +++++-- src/qt/qt_deviceconfig.cpp | 38 ++++++++++++++++++++++++ src/win/win_devconf.c | 59 ++++++++++++++++++++++++++++++++++++-- 4 files changed, 142 insertions(+), 7 deletions(-) diff --git a/src/device.c b/src/device.c index 501ae6b64..331305f2d 100644 --- a/src/device.c +++ b/src/device.c @@ -48,6 +48,8 @@ #include <86box/config.h> #include <86box/device.h> #include <86box/machine.h> +#include <86box/mem.h> +#include <86box/rom.h> #include <86box/sound.h> @@ -329,13 +331,46 @@ device_get_priv(const device_t *d) int device_available(const device_t *d) { + device_config_t *config; + device_config_bios_t *bios; + int bf, roms_present = 0; + int i = 0; + #ifdef RELEASE_BUILD if (d->flags & DEVICE_NOT_WORKING) return(0); #endif - if (d->available != NULL) - return(d->available()); + if (d != NULL) { + config = (device_config_t *) d->config; + if (config != NULL) { + while (config->type != -1) { + if (config->type == CONFIG_BIOS) { + bios = (device_config_bios_t *) config->bios; - return(1); + /* Go through the ROM's in the device configuration. */ + while (bios->files_no != 0) { + i = 0; + for (bf = 0; bf < bios->files_no; bf++) + i += !!rom_present((char *) bios->files[bf]); + if (i == bios->files_no) + roms_present++; + bios++; + } + + return(roms_present ? -1 : 0); + } + config++; + } + } + + /* No CONFIG_BIOS field present, use the classic available(). */ + if (d->available != NULL) + return(d->available()); + else + return(1); + } + + /* A NULL device is never available. */ + return(0); } diff --git a/src/machine/machine.c b/src/machine/machine.c index 00516d8fb..67819b247 100644 --- a/src/machine/machine.c +++ b/src/machine/machine.c @@ -145,12 +145,19 @@ int machine_available(int m) { int ret; + device_t *d = (device_t *) machine_getdevice(m); bios_only = 1; - ret = machine_init_ex(m); + + ret = device_available(d); + /* Do not check via machine_init_ex() if the device is not NULL and + it has a CONFIG_BIOS field. */ + if ((d == NULL) || (ret != -1)) + ret = machine_init_ex(m); bios_only = 0; - return ret; + + return !!ret; } diff --git a/src/qt/qt_deviceconfig.cpp b/src/qt/qt_deviceconfig.cpp index 0b2047785..6ebc59b5d 100644 --- a/src/qt/qt_deviceconfig.cpp +++ b/src/qt/qt_deviceconfig.cpp @@ -31,6 +31,8 @@ extern "C" { #include <86box/config.h> #include <86box/device.h> #include <86box/midi_rtmidi.h> +#include <86box/mem.h> +#include <86box/rom.h> } #include "qt_filefield.hpp" @@ -51,6 +53,8 @@ DeviceConfig::~DeviceConfig() void DeviceConfig::ConfigureDevice(const _device_* device, int instance, Settings* settings) { DeviceConfig dc(settings); dc.setWindowTitle(QString("%1 Device Configuration").arg(device->name)); + int combo_to_struct[256]; + int c, d, p, q; device_context_t device_context; device_set_context(&device_context, device, instance); @@ -140,6 +144,33 @@ void DeviceConfig::ConfigureDevice(const _device_* device, int instance, Setting cbox->setCurrentIndex(currentIndex); break; } + case CONFIG_BIOS: + { + auto* cbox = new QComboBox(); + cbox->setObjectName(config->name); + auto* model = cbox->model(); + int currentIndex = -1; + char *selected; + selected = config_get_string(device_context.name, const_cast(config->name), const_cast(config->default_string)); + + c = q = 0; + for (auto* bios = config->bios; (bios != nullptr) && (bios->name != nullptr) && (strlen(bios->name) > 0); ++bios) { + p = 0; + for (d = 0; d < bios->files_no; d++) + p += !!rom_present(const_cast(bios->files[d])); + if (p == bios->files_no) { + int row = Models::AddEntry(model, bios->name, q); + if (!strcmp(selected, bios->internal_name)) { + currentIndex = row; + } + c++; + } + q++; + } + dc.ui->formLayout->addRow(config->description, cbox); + cbox->setCurrentIndex(currentIndex); + break; + } case CONFIG_SPINNER: { int value = config_get_int(device_context.name, const_cast(config->name), config->default_int); @@ -188,6 +219,13 @@ void DeviceConfig::ConfigureDevice(const _device_* device, int instance, Setting config_set_int(device_context.name, const_cast(config->name), cbox->currentData().toInt()); break; } + case CONFIG_BIOS: + { + auto* cbox = dc.findChild(config->name); + int idx = cbox->currentData().toInt(); + config_set_string(device_context.name, const_cast(config->name), const_cast(config->bios[idx].internal_name)); + break; + } case CONFIG_HEX16: { auto* cbox = dc.findChild(config->name); diff --git a/src/win/win_devconf.c b/src/win/win_devconf.c index 804762af6..01bd58d0d 100644 --- a/src/win/win_devconf.c +++ b/src/win/win_devconf.c @@ -25,6 +25,8 @@ #include <86box/config.h> #include <86box/device.h> #include <86box/plat.h> +#include <86box/mem.h> +#include <86box/rom.h> #include <86box/midi_rtmidi.h> #include <86box/ui.h> #include <86box/win.h> @@ -33,7 +35,8 @@ static device_context_t config_device; -static uint8_t deviceconfig_changed = 0; +static uint8_t deviceconfig_changed = 0; +static int combo_to_struct[256]; #if defined(__amd64__) || defined(__aarch64__) @@ -46,14 +49,16 @@ deviceconfig_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) HWND h; int val_int, id, c, d; + int p, q; #ifdef USE_RTMIDI int num; #endif int changed, cid; const device_config_t *config; const device_config_selection_t *selection; + const device_config_bios_t *bios; char s[512], file_filter[512]; - char *str; + char *str, *val_str; wchar_t ws[512], *wstr; LPTSTR lptsTemp; @@ -65,9 +70,11 @@ deviceconfig_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) config = config_device.dev->config; lptsTemp = (LPTSTR) malloc(512); + memset(combo_to_struct, 0, 256 * sizeof(int)); while (config->type != -1) { selection = config->selection; + bios = config->bios; h = GetDlgItem(hdlg, id); switch (config->type) { @@ -94,6 +101,30 @@ deviceconfig_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) c++; } + id += 2; + break; + case CONFIG_BIOS: + val_str = config_get_string((char *) config_device.name, + (char *) config->name, (char *) config->default_string); + + c = 0; + q = 0; + while (bios && bios->name && bios->name[0]) { + mbstowcs(lptsTemp, bios->name, strlen(bios->name) + 1); + p = 0; + for (d = 0; d < bios->files_no; d++) + p += !!rom_present((char *) bios->files[d]); + if (p == bios->files_no) { + SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)lptsTemp); + if (!strcmp(val_str, bios->internal_name)) + SendMessage(h, CB_SETCURSEL, c, 0); + combo_to_struct[c] = q; + c++; + } + q++; + bios++; + } + id += 2; break; #ifdef USE_RTMIDI @@ -188,6 +219,7 @@ deviceconfig_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) if (cid == IDOK) { id = IDC_CONFIG_BASE; config = config_device.dev->config; + bios = config->bios; changed = 0; char s[512]; @@ -217,6 +249,20 @@ deviceconfig_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) if (val_int != selection->value) changed = 1; + id += 2; + break; + case CONFIG_BIOS: + val_str = config_get_string((char *) config_device.name, + (char *) config->name, (char *) config->default_string); + + c = combo_to_struct[SendMessage(h, CB_GETCURSEL, 0, 0)]; + + for (; c > 0; c--) + bios++; + + if (strcmp(val_str, bios->internal_name)) + changed = 1; + id += 2; break; case CONFIG_MIDI_OUT: @@ -327,6 +373,14 @@ deviceconfig_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) selection++; config_set_int((char *) config_device.name, (char *) config->name, selection->value); + id += 2; + break; + case CONFIG_BIOS: + c = combo_to_struct[SendMessage(h, CB_GETCURSEL, 0, 0)]; + for (; c > 0; c--) + bios++; + config_set_string((char *) config_device.name, (char *) config->name, (char *) bios->internal_name); + id += 2; break; case CONFIG_MIDI_OUT: @@ -396,6 +450,7 @@ deviceconfig_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) case CONFIG_SELECTION: case CONFIG_HEX16: case CONFIG_HEX20: + case CONFIG_BIOS: case CONFIG_MIDI_OUT: case CONFIG_MIDI_IN: case CONFIG_SPINNER: From 59210b276f9909fb9d5dc2b129704d1de5c68b7b Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Fri, 22 Jul 2022 23:35:31 -0400 Subject: [PATCH 122/386] Two more whitespace cleanups --- src/device/pci_bridge.c | 20 ++++++++++---------- src/include/86box/acpi.h | 12 ++++++------ 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/src/device/pci_bridge.c b/src/device/pci_bridge.c index a771dc6bb..73fd3d157 100644 --- a/src/device/pci_bridge.c +++ b/src/device/pci_bridge.c @@ -32,16 +32,16 @@ #include <86box/pci.h> -#define PCI_BRIDGE_DEC_21150 0x10110022 -#define AGP_BRIDGE_ALI_M5243 0x10b95243 -#define AGP_BRIDGE_ALI_M5247 0x10b95247 -#define AGP_BRIDGE_INTEL_440LX 0x80867181 -#define AGP_BRIDGE_INTEL_440BX 0x80867191 -#define AGP_BRIDGE_INTEL_440GX 0x808671a1 -#define AGP_BRIDGE_VIA_597 0x11068597 -#define AGP_BRIDGE_VIA_598 0x11068598 -#define AGP_BRIDGE_VIA_691 0x11068691 -#define AGP_BRIDGE_VIA_8601 0x11068601 +#define PCI_BRIDGE_DEC_21150 0x10110022 +#define AGP_BRIDGE_ALI_M5243 0x10b95243 +#define AGP_BRIDGE_ALI_M5247 0x10b95247 +#define AGP_BRIDGE_INTEL_440LX 0x80867181 +#define AGP_BRIDGE_INTEL_440BX 0x80867191 +#define AGP_BRIDGE_INTEL_440GX 0x808671a1 +#define AGP_BRIDGE_VIA_597 0x11068597 +#define AGP_BRIDGE_VIA_598 0x11068598 +#define AGP_BRIDGE_VIA_691 0x11068691 +#define AGP_BRIDGE_VIA_8601 0x11068601 #define AGP_BRIDGE_ALI(x) (((x) >> 16) == 0x10b9) #define AGP_BRIDGE_INTEL(x) (((x) >> 16) == 0x8086) diff --git a/src/include/86box/acpi.h b/src/include/86box/acpi.h index d12b45507..94b2cd0fe 100644 --- a/src/include/86box/acpi.h +++ b/src/include/86box/acpi.h @@ -49,12 +49,12 @@ extern "C" { #define ACPI_ENABLE 0xf1 #define ACPI_DISABLE 0xf0 -#define VEN_ALI 0x010b9 -#define VEN_INTEL 0x08086 -#define VEN_SIS 0x01039 -#define VEN_SMC 0x01055 -#define VEN_VIA 0x01106 -#define VEN_VIA_596B 0x11106 +#define VEN_ALI 0x010b9 +#define VEN_INTEL 0x08086 +#define VEN_SIS 0x01039 +#define VEN_SMC 0x01055 +#define VEN_VIA 0x01106 +#define VEN_VIA_596B 0x11106 typedef struct From 43239dfa9e38545cb73fa15cd4cd030539054d12 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sat, 23 Jul 2022 00:00:03 -0400 Subject: [PATCH 123/386] Fix compile --- src/include/86box/device.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/src/include/86box/device.h b/src/include/86box/device.h index 04cc071c4..20a4babc5 100644 --- a/src/include/86box/device.h +++ b/src/include/86box/device.h @@ -52,6 +52,7 @@ #define CONFIG_HEX20 8 #define CONFIG_MAC 9 #define CONFIG_MIDI_IN 10 +#define CONFIG_BIOS 11 enum { @@ -77,6 +78,14 @@ typedef struct { int value; } device_config_selection_t; +typedef struct { + const char *name; + const char *internal_name; + int bios_type; + int files_no; + const char **files; +} device_config_bios_t; + typedef struct { int16_t min; int16_t max; @@ -92,6 +101,7 @@ typedef struct { const char *file_filter; const device_config_spinner_t spinner; const device_config_selection_t selection[16]; + const device_config_bios_t *bios; } device_config_t; typedef struct _device_ { @@ -161,6 +171,7 @@ extern void device_set_config_hex16(const char *s, int val); extern void device_set_config_hex20(const char *s, int val); extern void device_set_config_mac(const char *s, int val); extern const char *device_get_config_string(const char *name); +#define device_get_config_bios device_get_config_string extern char * device_get_internal_name(const device_t *d); From 74741d748a7fbe54153031cebc1eaa14cce169f1 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sat, 23 Jul 2022 01:01:45 -0400 Subject: [PATCH 124/386] Missing ports from M&K --- src/device/pci_bridge.c | 1 + src/device/smbus_piix4.c | 3 +-- src/include/86box/machine.h | 5 +++++ src/include/86box/smbus.h | 1 - src/machine/machine_table.c | 35 +++++++++++++++++++++++++++++++++++ 5 files changed, 42 insertions(+), 3 deletions(-) diff --git a/src/device/pci_bridge.c b/src/device/pci_bridge.c index 73fd3d157..583b77262 100644 --- a/src/device/pci_bridge.c +++ b/src/device/pci_bridge.c @@ -471,6 +471,7 @@ pci_bridge_init(const device_t *info) pci_bridge_reset(dev); dev->slot = pci_add_card(AGP_BRIDGE(dev->local) ? PCI_ADD_AGPBRIDGE : PCI_ADD_BRIDGE, pci_bridge_read, pci_bridge_write, dev); + interrupt_count = sizeof(interrupts); interrupt_mask = interrupt_count - 1; if (dev->slot < 32) { diff --git a/src/device/smbus_piix4.c b/src/device/smbus_piix4.c index de26b061c..c96a9fa57 100644 --- a/src/device/smbus_piix4.c +++ b/src/device/smbus_piix4.c @@ -28,7 +28,6 @@ #include <86box/i2c.h> #include <86box/smbus.h> - #ifdef ENABLE_SMBUS_PIIX4_LOG int smbus_piix4_do_log = ENABLE_SMBUS_PIIX4_LOG; @@ -99,7 +98,7 @@ smbus_piix4_write(uint16_t addr, uint8_t val, void *priv) { smbus_piix4_t *dev = (smbus_piix4_t *) priv; uint8_t smbus_addr, cmd, read, block_len, prev_stat; - uint16_t timer_bytes = 0, i; + uint16_t timer_bytes = 0, i = 0; smbus_piix4_log("SMBus PIIX4: write(%02X, %02X)\n", addr, val); diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index 3f887e7a9..1873d329c 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -332,6 +332,11 @@ extern int machine_get_ram_granularity(int m); extern int machine_get_type(int m); extern void machine_close(void); +extern uint8_t machine_get_p1(void); +extern void machine_load_p1(int m); +extern uint32_t machine_get_gpi(void); +extern void machine_load_gpi(int m); +extern void machine_set_gpi(uint32_t gpi); /* Initialization functions for boards and systems. */ extern void machine_common_init(const machine_t *); diff --git a/src/include/86box/smbus.h b/src/include/86box/smbus.h index 4c2c00c17..2a4d4f0ee 100644 --- a/src/include/86box/smbus.h +++ b/src/include/86box/smbus.h @@ -53,7 +53,6 @@ typedef struct { void *i2c; } smbus_ali7101_t; - extern void smbus_piix4_remap(smbus_piix4_t *dev, uint16_t new_io_base, uint8_t enable); extern void smbus_piix4_setclock(smbus_piix4_t *dev, int clock); diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 91f9ddf76..2c4a3bba9 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -10967,6 +10967,41 @@ const machine_t machines[] = { } }; +/* Saved copies - jumpers get applied to these. + We use also machine_gpio to store IBM PC/XT jumpers as they need more than one byte. */ +static uint16_t machine_p1; +static uint32_t machine_gpio; + +uint8_t +machine_get_p1(void) +{ + return machine_p1; +} + +void +machine_load_p1(int m) +{ + machine_p1 = machines[machine].kbc_p1; +} + +uint32_t +machine_get_gpio(void) +{ + return machine_gpio; +} + +void +machine_load_gpio(int m) +{ + machine_gpio = machines[machine].gpio; +} + +void +machine_set_gpio(uint32_t gpio) +{ + machine_gpio = gpio; +} + int machine_count(void) { From 2aa5d8f5b29dcc4964c972d8d3a9f273d184b97e Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sat, 23 Jul 2022 13:38:10 +0200 Subject: [PATCH 125/386] PIT: add alternative faster PIT This is enabled by default on 486+ CPUs and can be forced disabled/enabled with pit_mode=0/1 --- src/86box.c | 1 + src/CMakeLists.txt | 2 +- src/config.c | 7 + src/device/keyboard_xt.c | 2 +- src/include/86box/86box.h | 1 + src/include/86box/pit.h | 43 ++- src/include/86box/pit_fast.h | 72 ++++ src/machine/m_amstrad.c | 2 +- src/machine/m_at.c | 2 +- src/machine/m_europc.c | 2 +- src/machine/m_pcjr.c | 16 +- src/machine/m_ps1.c | 2 +- src/machine/m_ps2_isa.c | 2 +- src/machine/m_ps2_mca.c | 3 +- src/machine/m_xt.c | 2 +- src/machine/m_xt_compaq.c | 4 +- src/machine/m_xt_laserxt.c | 2 +- src/machine/m_xt_olivetti.c | 6 +- src/machine/m_xt_philips.c | 2 +- src/machine/m_xt_t1000.c | 4 +- src/machine/m_xt_zenith.c | 2 +- src/machine/machine.c | 17 +- src/pic.c | 4 +- src/pit.c | 168 +++++---- src/pit_fast.c | 706 +++++++++++++++++++++++++++++++++++ src/port_6x.c | 2 +- 26 files changed, 968 insertions(+), 108 deletions(-) create mode 100644 src/include/86box/pit_fast.h create mode 100644 src/pit_fast.c diff --git a/src/86box.c b/src/86box.c index 805cc60bf..cb9fa52a7 100644 --- a/src/86box.c +++ b/src/86box.c @@ -182,6 +182,7 @@ int confirm_reset = 1; /* (C) enable reset confirmation */ int confirm_exit = 1; /* (C) enable exit confirmation */ int confirm_save = 1; /* (C) enable save confirmation */ int enable_discord = 0; /* (C) enable Discord integration */ +int pit_mode = -1; /* (C) force setting PIT mode */ /* Statistics. */ extern int mmuflush; diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index d1da45172..1420aaa89 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -16,7 +16,7 @@ # add_executable(86Box 86box.c config.c log.c random.c timer.c io.c acpi.c apm.c - dma.c ddma.c discord.c nmi.c pic.c pit.c port_6x.c port_92.c ppi.c pci.c + dma.c ddma.c discord.c nmi.c pic.c pit.c pit_fast.c port_6x.c port_92.c ppi.c pci.c mca.c usb.c fifo8.c device.c nvr.c nvr_at.c nvr_ps2.c machine_status.c) if(CMAKE_SYSTEM_NAME MATCHES "Linux") diff --git a/src/config.c b/src/config.c index c44c69d4a..8554dcc7a 100644 --- a/src/config.c +++ b/src/config.c @@ -886,6 +886,8 @@ load_machine(void) } else time_sync = !!config_get_int(cat, "enable_sync", 1); + pit_mode = config_get_int(cat, "pit_mode", -1); + /* Remove this after a while.. */ config_delete_var(cat, "nvr_path"); config_delete_var(cat, "enable_sync"); @@ -2479,6 +2481,11 @@ save_machine(void) else config_set_string(cat, "time_sync", "disabled"); + if (pit_mode == -1) + config_delete_var(cat, "pit_mode"); + else + config_set_int(cat, "pit_mode", pit_mode); + delete_section_if_empty(cat); } diff --git a/src/device/keyboard_xt.c b/src/device/keyboard_xt.c index 9b19669e2..d13bab56d 100644 --- a/src/device/keyboard_xt.c +++ b/src/device/keyboard_xt.c @@ -535,7 +535,7 @@ kbd_write(uint16_t port, uint8_t val, void *priv) if (speaker_enable) was_speaker_enable = 1; - pit_ctr_set_gate(&pit->counters[2], val & 1); + pit_devs[0].set_gate(pit_devs[0].data, 2, val & 1); if (val & 0x80) { kbd->pa = 0; diff --git a/src/include/86box/86box.h b/src/include/86box/86box.h index 6afa66695..86fe740c9 100644 --- a/src/include/86box/86box.h +++ b/src/include/86box/86box.h @@ -135,6 +135,7 @@ extern int is_pentium; /* TODO: Move back to cpu/cpu.h when it's figured out, how to remove that hack from the ET4000/W32p. */ extern int fixed_size_x, fixed_size_y; extern double mouse_sensitivity; /* (C) Mouse sensitivity scale */ +extern int pit_mode; /* (C) force setting PIT mode */ extern char exe_path[2048]; /* path (dir) of executable */ diff --git a/src/include/86box/pit.h b/src/include/86box/pit.h index e823794df..95541014b 100644 --- a/src/include/86box/pit.h +++ b/src/include/86box/pit.h @@ -58,9 +58,33 @@ typedef struct PIT { uint8_t ctrl; } pit_t; +enum { + PIT_8253 = 0, + PIT_8254, + PIT_8253_FAST, + PIT_8254_FAST +}; + +typedef struct { + uint8_t (*read)(uint16_t addr, void *priv); + void (*write)(uint16_t addr, uint8_t val, void *priv); + /* Gets a counter's count. */ + uint16_t (*get_count)(void *data, int counter_id); + /* Sets a counter's GATE input. */ + void (*set_gate)(void *data, int counter_id, int gate); + /* Sets if a counter's CLOCK input is from the timer or not - used by PCjr. */ + void(*set_using_timer)(void *data, int counter_id, int using_timer); + /* Sets a counter's OUT output handler. */ + void (*set_out_func)(void *data, int counter_id, void (*func)(int new_out, int old_out)); + /* Sets a counter's load count handler. */ + void (*set_load_func)(void *data, int counter_id, void (*func)(uint8_t new_m, int new_count)); + void (*ctr_clock)(void *data, int counter_id); + void *data; +} pit_intf_t; + +extern pit_intf_t pit_devs[2]; +extern const pit_intf_t pit_classic_intf; -extern pit_t *pit, - *pit2; extern double SYSCLK, PCICLK, AGPCLK; @@ -74,26 +98,13 @@ extern uint64_t PITCONST, ISACONST, extern int refresh_at_enable; - -/* Gets a counter's count. */ -extern uint16_t pit_ctr_get_count(ctr_t *ctr); -/* Sets a counter's load count handler. */ -extern void pit_ctr_set_load_func(ctr_t *ctr, void (*func)(uint8_t new_m, int new_count)); -/* Sets a counter's OUT output handler. */ -extern void pit_ctr_set_out_func(ctr_t *ctr, void (*func)(int new_out, int old_out)); -/* Sets a counter's GATE input. */ -extern void pit_ctr_set_gate(ctr_t *ctr, int gate); /* Sets a counter's CLOCK input. */ extern void pit_ctr_set_clock(ctr_t *ctr, int clock); -/* Sets if a counter's CLOCK input is from the timer or not - used by PCjr. */ -extern void pit_ctr_set_using_timer(ctr_t *ctr, int using_timer); extern pit_t * pit_common_init(int type, void (*out0)(int new_out, int old_out), void (*out1)(int new_out, int old_out)); -extern pit_t * pit_ps2_init(void); +extern pit_t * pit_ps2_init(int type); extern void pit_reset(pit_t *dev); -extern void pit_irq0_timer(int new_out, int old_out); -extern void pit_irq0_timer_pcjr(int new_out, int old_out); extern void pit_irq0_timer_ps2(int new_out, int old_out); extern void pit_refresh_timer_xt(int new_out, int old_out); diff --git a/src/include/86box/pit_fast.h b/src/include/86box/pit_fast.h new file mode 100644 index 000000000..bc09174fb --- /dev/null +++ b/src/include/86box/pit_fast.h @@ -0,0 +1,72 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Header of the implementation of the Intel 8253/8254 + * Programmable Interval Timer. + * + * + * + * Author: Miran Grca, + * Copyright 2019,2020 Miran Grca. + */ + +#ifndef EMU_PIT_FAST_H +#define EMU_PIT_FAST_H + +typedef struct { + uint8_t m, ctrl, + read_status, latch, bcd; + + uint16_t rl; + + int rm, wm, gate, out, + newcount, clock, using_timer, latched, + do_read_status; + int enabled; + int disabled; + int initial; + int thit; + int running; + int rereadlatch; + + union { + int count; + struct { + int units : 4; + int tens : 4; + int hundreds : 4; + int thousands : 4; + int myriads : 4; + }; + }; + + uint32_t l; + pc_timer_t timer; + + void (*load_func)(uint8_t new_m, int new_count); + void (*out_func)(int new_out, int old_out); +} ctrf_t; + +typedef struct { + int flags; + ctrf_t counters[3]; + + uint8_t ctrl; +} pitf_t; + +extern const pit_intf_t pit_fast_intf; + +#ifdef EMU_DEVICE_H +extern const device_t i8253_fast_device; +extern const device_t i8254_fast_device; +extern const device_t i8254_sec_fast_device; +extern const device_t i8254_ext_io_fast_device; +extern const device_t i8254_ps2_fast_device; +#endif + +#endif /*EMU_PIT_FAST_H*/ diff --git a/src/machine/m_amstrad.c b/src/machine/m_amstrad.c index 43a8093c8..3b0235d51 100644 --- a/src/machine/m_amstrad.c +++ b/src/machine/m_amstrad.c @@ -2059,7 +2059,7 @@ kbd_write(uint16_t port, uint8_t val, void *priv) speaker_enable = val & 0x02; if (speaker_enable) was_speaker_enable = 1; - pit_ctr_set_gate(&pit->counters[2], val & 0x01); + pit_devs[0].set_gate(pit_devs[0].data, 2, val & 0x01); if (val & 0x80) { /* Keyboard enabled, so enable PA reading. */ diff --git a/src/machine/m_at.c b/src/machine/m_at.c index dc47b6207..df3c4bd8b 100644 --- a/src/machine/m_at.c +++ b/src/machine/m_at.c @@ -66,7 +66,7 @@ machine_at_common_init_ex(const machine_t *model, int type) machine_common_init(model); refresh_at_enable = 1; - pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_at); + pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_at); pic2_init(); dma16_init(); diff --git a/src/machine/m_europc.c b/src/machine/m_europc.c index 2c035ded1..905515225 100644 --- a/src/machine/m_europc.c +++ b/src/machine/m_europc.c @@ -718,7 +718,7 @@ machine_europc_init(const machine_t *model) return ret; machine_common_init(model); - pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_xt); + pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt); nmi_init(); diff --git a/src/machine/m_pcjr.c b/src/machine/m_pcjr.c index 2491e5064..2665ea164 100644 --- a/src/machine/m_pcjr.c +++ b/src/machine/m_pcjr.c @@ -627,7 +627,7 @@ kbd_write(uint16_t port, uint8_t val, void *priv) speaker_enable = val & 2; if (speaker_enable) was_speaker_enable = 1; - pit_ctr_set_gate(&pit->counters[2], val & 1); + pit_devs[0].set_gate(pit_devs[0].data, 2, val & 1); sn76489_mute = speaker_mute = 1; switch (val & 0x60) { case 0x00: @@ -642,7 +642,7 @@ kbd_write(uint16_t port, uint8_t val, void *priv) case 0xa0: nmi_mask = val & 0x80; - pit_ctr_set_using_timer(&pit->counters[1], !(val & 0x20)); + pit_devs[0].set_using_timer(pit_devs[0].data, 1, !(val & 0x20)); break; } } @@ -770,6 +770,18 @@ speed_changed(void *priv) recalc_timings(pcjr); } +void +pit_irq0_timer_pcjr(int new_out, int old_out) +{ + if (new_out && !old_out) { + picint(1); + pit_devs[0].ctr_clock(pit_devs[0].data, 1); + } + + if (!new_out) + picintc(1); +} + static const device_config_t pcjr_config[] = { { .name = "display_type", diff --git a/src/machine/m_ps1.c b/src/machine/m_ps1.c index 101746a03..19abb00bf 100644 --- a/src/machine/m_ps1.c +++ b/src/machine/m_ps1.c @@ -327,7 +327,7 @@ ps1_common_init(const machine_t *model) machine_common_init(model); refresh_at_enable = 1; - pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_at); + pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_at); dma16_init(); pic2_init(); diff --git a/src/machine/m_ps2_isa.c b/src/machine/m_ps2_isa.c index 24fa0dfb1..094fc8a5f 100644 --- a/src/machine/m_ps2_isa.c +++ b/src/machine/m_ps2_isa.c @@ -190,7 +190,7 @@ ps2_isa_common_init(const machine_t *model) machine_common_init(model); refresh_at_enable = 1; - pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_at); + pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_at); dma16_init(); pic2_init(); diff --git a/src/machine/m_ps2_mca.c b/src/machine/m_ps2_mca.c index 7aea5a319..665d42972 100644 --- a/src/machine/m_ps2_mca.c +++ b/src/machine/m_ps2_mca.c @@ -1363,7 +1363,8 @@ machine_ps2_common_init(const machine_t *model) device_add(&ps_no_nmi_nvr_device); pic2_init(); - pit_ps2_init(); + int pit_type = ((pit_mode == -1 && is486) || pit_mode == 1) ? PIT_8254_FAST : PIT_8254; + pit_ps2_init(pit_type); nmi_mask = 0x80; diff --git a/src/machine/m_xt.c b/src/machine/m_xt.c index f95ee2fe0..5b31920c5 100644 --- a/src/machine/m_xt.c +++ b/src/machine/m_xt.c @@ -24,7 +24,7 @@ machine_xt_common_init(const machine_t *model) { machine_common_init(model); - pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_xt); + pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt); if (fdc_type == FDC_INTERNAL) device_add(&fdc_xt_device); diff --git a/src/machine/m_xt_compaq.c b/src/machine/m_xt_compaq.c index bd355a161..a705f0e2b 100644 --- a/src/machine/m_xt_compaq.c +++ b/src/machine/m_xt_compaq.c @@ -50,7 +50,7 @@ machine_xt_compaq_deskpro_init(const machine_t *model) machine_common_init(model); - pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_xt); + pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt); device_add(&keyboard_xt_compaq_device); if (fdc_type == FDC_INTERNAL) @@ -78,7 +78,7 @@ machine_xt_compaq_portable_init(const machine_t *model) machine_common_init(model); - pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_xt); + pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt); device_add(&keyboard_xt_compaq_device); if (fdc_type == FDC_INTERNAL) diff --git a/src/machine/m_xt_laserxt.c b/src/machine/m_xt_laserxt.c index 58b7d3774..21681a5c2 100644 --- a/src/machine/m_xt_laserxt.c +++ b/src/machine/m_xt_laserxt.c @@ -167,7 +167,7 @@ machine_xt_lxt3_init(const machine_t *model) machine_common_init(model); - pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_xt); + pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt); device_add(&keyboard_xt_lxt3_device); diff --git a/src/machine/m_xt_olivetti.c b/src/machine/m_xt_olivetti.c index 716bb9c18..62fcda138 100644 --- a/src/machine/m_xt_olivetti.c +++ b/src/machine/m_xt_olivetti.c @@ -241,7 +241,7 @@ m24_kbd_write(uint16_t port, uint8_t val, void *priv) speaker_enable = val & 2; if (speaker_enable) was_speaker_enable = 1; - pit_ctr_set_gate(&pit->counters[2], val & 1); + pit_devs[0].set_gate(pit_devs[0].data, 2, val & 1); break; } } @@ -792,7 +792,7 @@ machine_xt_m240_init(const machine_t *model) machine_common_init(model); - pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_xt); + pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt); /* Address 66-67 = mainboard dip-switch settings */ io_sethandler(0x0066, 2, m24_read, NULL, NULL, NULL, NULL, NULL, NULL); @@ -846,7 +846,7 @@ machine_xt_m19_init(const machine_t *model) machine_common_init(model); - pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_xt); + pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt); /* On-board FDC cannot be disabled */ device_add(&fdc_xt_device); diff --git a/src/machine/m_xt_philips.c b/src/machine/m_xt_philips.c index cafccf061..b10e3a37e 100644 --- a/src/machine/m_xt_philips.c +++ b/src/machine/m_xt_philips.c @@ -152,7 +152,7 @@ machine_xt_philips_common_init(const machine_t *model) { machine_common_init(model); - pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_xt); + pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt); nmi_init(); diff --git a/src/machine/m_xt_t1000.c b/src/machine/m_xt_t1000.c index 961cc627a..ba96b74e7 100644 --- a/src/machine/m_xt_t1000.c +++ b/src/machine/m_xt_t1000.c @@ -911,7 +911,7 @@ machine_xt_t1000_init(const machine_t *model) machine_common_init(model); - pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_xt); + pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt); device_add(&keyboard_xt_device); t1000.fdc = device_add(&fdc_xt_device); nmi_init(); @@ -979,7 +979,7 @@ machine_xt_t1200_init(const machine_t *model) write_t1200_nvram, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, &t1000); - pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_xt); + pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt); device_add(&keyboard_xt_device); t1000.fdc = device_add(&fdc_xt_t1x00_device); nmi_init(); diff --git a/src/machine/m_xt_zenith.c b/src/machine/m_xt_zenith.c index f9806b610..6eab9aee2 100644 --- a/src/machine/m_xt_zenith.c +++ b/src/machine/m_xt_zenith.c @@ -122,7 +122,7 @@ machine_zenith_init(const machine_t *model){ device_add(&zenith_scratchpad_device); - pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_xt); + pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt); device_add(&keyboard_xt_zenith_device); diff --git a/src/machine/machine.c b/src/machine/machine.c index 67819b247..774b972c2 100644 --- a/src/machine/machine.c +++ b/src/machine/machine.c @@ -161,6 +161,16 @@ machine_available(int m) } +void +pit_irq0_timer(int new_out, int old_out) +{ + if (new_out && !old_out) + picint(1); + + if (!new_out) + picintc(1); +} + void machine_common_init(const machine_t *model) { @@ -168,5 +178,10 @@ machine_common_init(const machine_t *model) pic_init(); dma_init(); - pit_common_init(!!IS_AT(machine), pit_irq0_timer, NULL); + int pit_type = IS_AT(machine) ? PIT_8254 : PIT_8253; + /* Select fast PIT if needed */ + if ((pit_mode == -1 && is486) || pit_mode == 1) + pit_type += 2; + + pit_common_init(pit_type, pit_irq0_timer, NULL); } diff --git a/src/pic.c b/src/pic.c index ca2bff2f7..fe6b29fc8 100644 --- a/src/pic.c +++ b/src/pic.c @@ -750,8 +750,8 @@ picinterrupt() pic.interrupt |= 0x40; /* Mark slave pending. */ } - if ((pic.interrupt == 0) && (pit2 != NULL)) - pit_ctr_set_gate(&pit2->counters[0], 0); + if ((pic.interrupt == 0) && (pit_devs[1].data != NULL)) + pit_devs[1].set_gate(pit_devs[1].data, 0, 0); /* Two ACK's - do them in a loop to avoid potential compiler misoptimizations. */ for (i = 0; i < 2; i++) { diff --git a/src/pit.c b/src/pit.c index f19a1acf7..ba71928ca 100644 --- a/src/pit.c +++ b/src/pit.c @@ -34,14 +34,15 @@ #include <86box/pic.h> #include <86box/timer.h> #include <86box/pit.h> +#include <86box/pit_fast.h> #include <86box/ppi.h> #include <86box/machine.h> #include <86box/sound.h> #include <86box/snd_speaker.h> #include <86box/video.h> +pit_intf_t pit_devs[2]; -pit_t *pit, *pit2; double cpuclock, PITCONSTD, SYSCLK, isa_timing, @@ -67,12 +68,6 @@ int64_t firsttime = 1; #define PIT_SECONDARY 128 /* The PIT is secondary (ports 0048-004B). */ -enum { - PIT_8253 = 0, - PIT_8254 -}; - - #ifdef ENABLE_PIT_LOG int pit_do_log = ENABLE_PIT_LOG; @@ -293,8 +288,11 @@ ctr_tick(ctr_t *ctr) static void -ctr_clock(ctr_t *ctr) +ctr_clock(void *data, int counter_id) { + pit_t *pit = (pit_t *)data; + ctr_t *ctr = &pit->counters[counter_id]; + /* FIXME: Is this even needed? */ if ((ctr->state == 3) && (ctr->m != 2) && (ctr->m != 3)) return; @@ -379,35 +377,47 @@ ctr_latch_count(ctr_t *ctr) uint16_t -pit_ctr_get_count(ctr_t *ctr) +pit_ctr_get_count(void *data, int counter_id) { + pit_t *pit = (pit_t *)data; + ctr_t *ctr = &pit->counters[counter_id]; + return (uint16_t) ctr->l; } void -pit_ctr_set_load_func(ctr_t *ctr, void (*func)(uint8_t new_m, int new_count)) +pit_ctr_set_load_func(void *data, int counter_id, void (*func)(uint8_t new_m, int new_count)) { - if (ctr == NULL) + if (data == NULL) return; + pit_t *pit = (pit_t *)data; + ctr_t *ctr = &pit->counters[counter_id]; + ctr->load_func = func; } void -pit_ctr_set_out_func(ctr_t *ctr, void (*func)(int new_out, int old_out)) +pit_ctr_set_out_func(void *data, int counter_id, void (*func)(int new_out, int old_out)) { - if (ctr == NULL) + if (data == NULL) return; + pit_t *pit = (pit_t *)data; + ctr_t *ctr = &pit->counters[counter_id]; + ctr->out_func = func; } void -pit_ctr_set_gate(ctr_t *ctr, int gate) +pit_ctr_set_gate(void *data, int counter_id, int gate) { + pit_t *pit = (pit_t *)data; + ctr_t *ctr = &pit->counters[counter_id]; + int old = ctr->gate; uint8_t mode = ctr->m & 3; @@ -470,10 +480,12 @@ pit_ctr_set_clock(ctr_t *ctr, int clock) void -pit_ctr_set_using_timer(ctr_t *ctr, int using_timer) +pit_ctr_set_using_timer(void *data, int counter_id, int using_timer) { - timer_process(); - + if (tsc > 0) + timer_process(); + pit_t *pit = (pit_t *)data; + ctr_t *ctr = &pit->counters[counter_id]; ctr->using_timer = using_timer; } @@ -673,46 +685,19 @@ pit_read(uint16_t addr, void *priv) } -/* FIXME: Should be moved to machine.c (default for most machine). */ -void -pit_irq0_timer(int new_out, int old_out) -{ - if (new_out && !old_out) - picint(1); - - if (!new_out) - picintc(1); -} - - -void -pit_irq0_timer_pcjr(int new_out, int old_out) -{ - if (new_out && !old_out) { - picint(1); - ctr_clock(&pit->counters[1]); - } - - if (!new_out) - picintc(1); -} - - void pit_irq0_timer_ps2(int new_out, int old_out) { - ctr_t *ctr = &pit2->counters[0]; - if (new_out && !old_out) { picint(1); - pit_ctr_set_gate(ctr, 1); + pit_devs[1].set_gate(pit_devs[1].data, 0, 1); } if (!new_out) picintc(1); if (!new_out && old_out) - ctr_clock(ctr); + pit_devs[1].ctr_clock(pit_devs[1].data, 0); } @@ -742,7 +727,8 @@ pit_speaker_timer(int new_out, int old_out) speaker_update(); - l = pit->counters[2].l ? pit->counters[2].l : 0x10000; + uint16_t count = pit_devs[0].get_count(pit_devs[0].data, 2); + l = count ? count : 0x10000; if (l < 25) speakon = 0; else @@ -809,11 +795,11 @@ pit_close(void *priv) { pit_t *dev = (pit_t *) priv; - if (dev == pit) - pit = NULL; + if (dev == pit_devs[0].data) + pit_devs[0].data = NULL; - if (dev == pit2) - pit2 = NULL; + if (dev == pit_devs[1].data) + pit_devs[1].data = NULL; if (dev != NULL) free(dev); @@ -915,47 +901,83 @@ pit_t * pit_common_init(int type, void (*out0)(int new_out, int old_out), void (*out1)(int new_out, int old_out)) { int i; + void *pit; + + pit_intf_t *pit_intf = &pit_devs[0]; switch (type) { case PIT_8253: default: pit = device_add(&i8253_device); + *pit_intf = pit_classic_intf; break; case PIT_8254: pit = device_add(&i8254_device); + *pit_intf = pit_classic_intf; break; + case PIT_8253_FAST: + pit = device_add(&i8253_fast_device); + *pit_intf = pit_fast_intf; + break; + case PIT_8254_FAST: + pit = device_add(&i8254_fast_device); + *pit_intf = pit_fast_intf; + break; + } + pit_intf->data = pit; + for (i = 0; i < 3; i++) { - pit->counters[i].gate = 1; - pit->counters[i].using_timer = 1; + pit_intf->set_gate(pit_intf->data, i, 1); + pit_intf->set_using_timer(pit_intf->data, i, 1); } - pit_ctr_set_out_func(&pit->counters[0], out0); - pit_ctr_set_out_func(&pit->counters[1], out1); - pit_ctr_set_out_func(&pit->counters[2], pit_speaker_timer); - pit_ctr_set_load_func(&pit->counters[2], speaker_set_count); - pit->counters[2].gate = 0; + pit_intf->set_out_func(pit_intf->data, 0, out0); + pit_intf->set_out_func(pit_intf->data, 1, out1); + pit_intf->set_out_func(pit_intf->data, 2, pit_speaker_timer); + pit_intf->set_load_func(pit_intf->data, 2, speaker_set_count); + + pit_intf->set_gate(pit_intf->data, 2, 0); return pit; } pit_t * -pit_ps2_init(void) +pit_ps2_init(int type) { - pit2 = device_add(&i8254_ps2_device); + void *pit; - pit_handler(1, 0x0044, 0x0001, pit2); - pit_handler(1, 0x0047, 0x0001, pit2); + pit_intf_t *ps2_pit = &pit_devs[1]; - pit2->counters[0].gate = 0; - pit2->counters[0].using_timer = pit2->counters[1].using_timer = pit2->counters[2].using_timer = 0; + switch (type) { + case PIT_8254: + default: + pit = device_add(&i8254_ps2_device); + *ps2_pit = pit_classic_intf; + break; - pit_ctr_set_out_func(&pit->counters[0], pit_irq0_timer_ps2); - pit_ctr_set_out_func(&pit2->counters[0], pit_nmi_timer_ps2); + case PIT_8254_FAST: + pit = device_add(&i8254_ps2_fast_device); + *ps2_pit = pit_fast_intf; + break; + } - return pit2; + ps2_pit->data = pit; + + ps2_pit->set_gate(ps2_pit->data, 0, 0); + for (int i = 0; i < 3; i++) { + ps2_pit->set_using_timer(ps2_pit->data, i, 0); + } + + io_sethandler(0x0044, 0x0001, ps2_pit->read, NULL, NULL, ps2_pit->write, NULL, NULL, pit); + io_sethandler(0x0047, 0x0001, ps2_pit->read, NULL, NULL, ps2_pit->write, NULL, NULL, pit); + + pit_devs[0].set_out_func(pit_devs[0].data, 0, pit_irq0_timer_ps2); + ps2_pit->set_out_func(ps2_pit->data, 0, pit_nmi_timer_ps2); + + return pit; } @@ -1063,3 +1085,15 @@ pit_set_clock(int clock) device_speed_changed(); } + +const pit_intf_t pit_classic_intf = { + &pit_read, + &pit_write, + &pit_ctr_get_count, + &pit_ctr_set_gate, + &pit_ctr_set_using_timer, + &pit_ctr_set_out_func, + &pit_ctr_set_load_func, + &ctr_clock, + NULL, +}; \ No newline at end of file diff --git a/src/pit_fast.c b/src/pit_fast.c new file mode 100644 index 000000000..704cfd68c --- /dev/null +++ b/src/pit_fast.c @@ -0,0 +1,706 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Implementation of the Intel 8253/8254 Programmable Interval + * Timer. + * + * + * + * Author: Miran Grca, + * Copyright 2019 Miran Grca. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include "cpu.h" +#include <86box/device.h> +#include <86box/timer.h> +#include <86box/cassette.h> +#include <86box/dma.h> +#include <86box/io.h> +#include <86box/nmi.h> +#include <86box/pic.h> +#include <86box/timer.h> +#include <86box/pit.h> +#include <86box/pit_fast.h> +#include <86box/ppi.h> +#include <86box/machine.h> +#include <86box/sound.h> +#include <86box/snd_speaker.h> +#include <86box/video.h> + +#define PIT_PS2 16 /* The PIT is the PS/2's second PIT. */ +#define PIT_EXT_IO 32 /* The PIT has externally specified port I/O. */ +#define PIT_CUSTOM_CLOCK 64 /* The PIT uses custom clock inputs provided by another provider. */ +#define PIT_SECONDARY 128 /* The PIT is secondary (ports 0048-004B). */ + +#ifdef ENABLE_PIT_LOG +int pit_do_log = ENABLE_PIT_LOG; + +static void +pit_log(const char *fmt, ...) +{ + va_list ap; + + if (pit_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +#define pit_log(fmt, ...) +#endif + +static void +pitf_ctr_set_out(ctrf_t *ctr, int out) +{ + if (ctr == NULL) + return; + + if (ctr->out_func != NULL) + ctr->out_func(out, ctr->out); + ctr->out = out; +} + +static void +pitf_ctr_set_load_func(void *data, int counter_id, void (*func)(uint8_t new_m, int new_count)) +{ + if (data == NULL) + return; + + pitf_t *pit = (pitf_t *)data; + ctrf_t *ctr = &pit->counters[counter_id]; + + ctr->load_func = func; +} + +static uint16_t +pitf_ctr_get_count(void *data, int counter_id) +{ + pitf_t *pit = (pitf_t *)data; + ctrf_t *ctr = &pit->counters[counter_id]; + return (uint16_t) ctr->l; +} + +static void +pitf_ctr_set_out_func(void *data, int counter_id, void (*func)(int new_out, int old_out)) +{ + if (data == NULL) + return; + + pitf_t *pit = (pitf_t *)data; + ctrf_t *ctr = &pit->counters[counter_id]; + + ctr->out_func = func; +} + +static void +pitf_ctr_set_using_timer(void *data, int counter_id, int using_timer) +{ + if (tsc > 0) + timer_process(); + + pitf_t *pit = (pitf_t *)data; + ctrf_t *ctr = &pit->counters[counter_id]; + ctr->using_timer = using_timer; +} + +static int +pitf_read_timer(ctrf_t *ctr) +{ + if (ctr->using_timer && !(ctr->m == 3 && !ctr->gate) && timer_is_enabled(&ctr->timer)) { + int read = (int) ((timer_get_remaining_u64(&ctr->timer)) / PITCONST); + if (ctr->m == 2) + read++; + if (read < 0) + read = 0; + if (read > 0x10000) + read = 0x10000; + if (ctr->m == 3) + read <<= 1; + return read; + } + if (ctr->m == 2) + return ctr->count + 1; + return ctr->count; +} + +/*Dump timer count back to pit->count[], and disable timer. This should be used + when stopping a PIT timer, to ensure the correct value can be read back.*/ +static void +pitf_dump_and_disable_timer(ctrf_t *ctr) +{ + if (ctr->using_timer && timer_is_enabled(&ctr->timer)) { + ctr->count = pitf_read_timer(ctr); + timer_disable(&ctr->timer); + } +} + +static void +pitf_ctr_load(ctrf_t *ctr) +{ + int l = ctr->l ? ctr->l : 0x10000; + + ctr->newcount = 0; + ctr->disabled = 0; + + switch (ctr->m) { + case 0: /*Interrupt on terminal count*/ + ctr->count = l; + if (ctr->using_timer) + timer_set_delay_u64(&ctr->timer, (uint64_t) (l * PITCONST)); + pitf_ctr_set_out(ctr, 0); + ctr->thit = 0; + ctr->enabled = ctr->gate; + break; + case 1: /*Hardware retriggerable one-shot*/ + ctr->enabled = 1; + break; + case 2: /*Rate generator*/ + if (ctr->initial) { + ctr->count = l - 1; + if (ctr->using_timer) + timer_set_delay_u64(&ctr->timer, (uint64_t) ((l - 1) * PITCONST)); + pitf_ctr_set_out(ctr, 1); + ctr->thit = 0; + } + ctr->enabled = ctr->gate; + break; + case 3: /*Square wave mode*/ + if (ctr->initial) { + ctr->count = l; + if (ctr->using_timer) + timer_set_delay_u64(&ctr->timer, (uint64_t) (((l + 1) >> 1) * PITCONST)); + pitf_ctr_set_out(ctr, 1); + ctr->thit = 0; + } + ctr->enabled = ctr->gate; + break; + case 4: /*Software triggered stobe*/ + if (!ctr->thit && !ctr->initial) + ctr->newcount = 1; + else { + ctr->count = l; + if (ctr->using_timer) + timer_set_delay_u64(&ctr->timer, (uint64_t) (l * PITCONST)); + pitf_ctr_set_out(ctr, 0); + ctr->thit = 0; + } + ctr->enabled = ctr->gate; + break; + case 5: /*Hardware triggered stobe*/ + ctr->enabled = 1; + break; + } + + if (ctr->load_func != NULL) + ctr->load_func(ctr->m, l); + + ctr->initial = 0; + ctr->running = ctr->enabled && ctr->using_timer && !ctr->disabled; + if (ctr->using_timer && !ctr->running) + pitf_dump_and_disable_timer(ctr); +} + +static void +pitf_set_gate_no_timer(ctrf_t *ctr, int gate) +{ + int l = ctr->l ? ctr->l : 0x10000; + + if (ctr->disabled) { + ctr->gate = gate; + return; + } + + switch (ctr->m) { + case 0: /*Interrupt on terminal count*/ + case 4: /*Software triggered stobe*/ + if (ctr->using_timer && !ctr->running) + timer_set_delay_u64(&ctr->timer, (uint64_t) (l * PITCONST)); + ctr->enabled = gate; + break; + case 1: /*Hardware retriggerable one-shot*/ + case 5: /*Hardware triggered stobe*/ + if (gate && !ctr->gate) { + ctr->count = l; + if (ctr->using_timer) + timer_set_delay_u64(&ctr->timer, (uint64_t) (l * PITCONST)); + pitf_ctr_set_out(ctr, 0); + ctr->thit = 0; + ctr->enabled = 1; + } + break; + case 2: /*Rate generator*/ + if (gate && !ctr->gate) { + ctr->count = l - 1; + if (ctr->using_timer) + timer_set_delay_u64(&ctr->timer, (uint64_t) (l * PITCONST)); + pitf_ctr_set_out(ctr, 1); + ctr->thit = 0; + } + ctr->enabled = gate; + break; + case 3: /*Square wave mode*/ + if (gate && !ctr->gate) { + ctr->count = l; + if (ctr->using_timer) + timer_set_delay_u64(&ctr->timer, (uint64_t) (((l + 1) >> 1) * PITCONST)); + pitf_ctr_set_out(ctr, 1); + ctr->thit = 0; + } + ctr->enabled = gate; + break; + } + ctr->gate = gate; + ctr->running = ctr->enabled && ctr->using_timer && !ctr->disabled; + if (ctr->using_timer && !ctr->running) + pitf_dump_and_disable_timer(ctr); +} + +static void +pitf_ctr_set_gate(void *data, int counter_id, int gate) +{ + pitf_t *pit = (pitf_t *)data; + ctrf_t *ctr = &pit->counters[counter_id]; + + if (ctr->disabled) { + ctr->gate = gate; + return; + } + + pitf_set_gate_no_timer(ctr, gate); +} + +static void +pitf_over(ctrf_t *ctr) +{ + int l = ctr->l ? ctr->l : 0x10000; + if (ctr->disabled) { + ctr->count += 0xffff; + if (ctr->using_timer) + timer_advance_u64(&ctr->timer, (uint64_t) (0xffff * PITCONST)); + return; + } + + switch (ctr->m) { + case 0: /*Interrupt on terminal count*/ + case 1: /*Hardware retriggerable one-shot*/ + if (!ctr->thit) + pitf_ctr_set_out(ctr, 1); + ctr->thit = 1; + ctr->count += 0xffff; + if (ctr->using_timer) + timer_advance_u64(&ctr->timer, (uint64_t) (0xffff * PITCONST)); + break; + case 2: /*Rate generator*/ + ctr->count += l; + if (ctr->using_timer) + timer_advance_u64(&ctr->timer, (uint64_t) (l * PITCONST)); + pitf_ctr_set_out(ctr, 0); + pitf_ctr_set_out(ctr, 1); + break; + case 3: /*Square wave mode*/ + if (ctr->out) { + pitf_ctr_set_out(ctr, 0); + ctr->count += (l >> 1); + if (ctr->using_timer) + timer_advance_u64(&ctr->timer, (uint64_t) ((l >> 1) * PITCONST)); + } else { + pitf_ctr_set_out(ctr, 1); + ctr->count += ((l + 1) >> 1); + if (ctr->using_timer) + timer_advance_u64(&ctr->timer, (uint64_t) (((l + 1) >> 1) * PITCONST)); + } + // if (!t) pclog("pit_over: square wave mode c=%x %lli %f\n", pit.c[t], tsc, PITCONST); + break; + case 4: /*Software triggered strove*/ + if (!ctr->thit) { + pitf_ctr_set_out(ctr, 0); + pitf_ctr_set_out(ctr, 1); + } + if (ctr->newcount) { + ctr->newcount = 0; + ctr->count += l; + if (ctr->using_timer) + timer_advance_u64(&ctr->timer, (uint64_t) (l * PITCONST)); + } else { + ctr->thit = 1; + ctr->count += 0xffff; + if (ctr->using_timer) + timer_advance_u64(&ctr->timer, (uint64_t) (0xffff * PITCONST)); + } + break; + case 5: /*Hardware triggered strove*/ + if (!ctr->thit) { + pitf_ctr_set_out(ctr, 0); + pitf_ctr_set_out(ctr, 1); + } + ctr->thit = 1; + ctr->count += 0xffff; + if (ctr->using_timer) + timer_advance_u64(&ctr->timer, (uint64_t) (0xffff * PITCONST)); + break; + } + ctr->running = ctr->enabled && ctr->using_timer && !ctr->disabled; + if (ctr->using_timer && !ctr->running) + pitf_dump_and_disable_timer(ctr); +} + +static __inline void +pitf_ctr_latch_count(ctrf_t *ctr) +{ + ctr->rl = pitf_read_timer(ctr); + // pclog("Timer latch %f %04X %04X\n",pit->c[0],pit->rl[0],pit->l[0]); + // pit->ctrl |= 0x30; + ctr->rereadlatch = 0; + ctr->rm = 3; + ctr->latched = 1; +} + +static __inline void +pitf_ctr_latch_status(ctrf_t *ctr) +{ + ctr->read_status = (ctr->ctrl & 0x3f) | (ctr->out ? 0x80 : 0); + ctr->do_read_status = 1; +} + +static void +pitf_write(uint16_t addr, uint8_t val, void *priv) +{ + pitf_t *dev = (pitf_t *) priv; + int t = (addr & 3); + ctrf_t *ctr; + + pit_log("[%04X:%08X] pit_write(%04X, %02X, %08X)\n", CS, cpu_state.pc, addr, val, priv); + + switch (addr & 3) { + case 3: /* control */ + t = val >> 6; + + if (t == 3) { + if (dev->flags & PIT_8254) { + /* This is 8254-only. */ + if (!(val & 0x20)) { + if (val & 2) + pitf_ctr_latch_count(&dev->counters[0]); + if (val & 4) + pitf_ctr_latch_count(&dev->counters[1]); + if (val & 8) + pitf_ctr_latch_count(&dev->counters[2]); + pit_log("PIT %i: Initiated readback command\n", t); + } + if (!(val & 0x10)) { + if (val & 2) + pitf_ctr_latch_status(&dev->counters[0]); + if (val & 4) + pitf_ctr_latch_status(&dev->counters[1]); + if (val & 8) + pitf_ctr_latch_status(&dev->counters[2]); + } + } + } else { + dev->ctrl = val; + ctr = &dev->counters[t]; + + if (!(dev->ctrl & 0x30)) { + pitf_ctr_latch_count(ctr); + dev->ctrl |= 0x30; + pit_log("PIT %i: Initiated latched read, %i bytes latched\n", + t, ctr->latched); + } else { + ctr->ctrl = val; + ctr->rm = ctr->wm = (ctr->ctrl >> 4) & 3; + ctr->m = (val >> 1) & 7; + if (ctr->m > 5) + ctr->m &= 3; + if (!(ctr->rm)) { + ctr->rm = 3; + ctr->rl = pitf_read_timer(ctr); + } + ctr->rereadlatch = 1; + ctr->initial = 1; + if (!ctr->m) + pitf_ctr_set_out(ctr, 0); + else + pitf_ctr_set_out(ctr, 1); + ctr->disabled = 1; + + pit_log("PIT %i: M = %i, RM/WM = %i, State = %i, Out = %i\n", t, ctr->m, ctr->rm, ctr->state, ctr->out); + } + ctr->thit = 0; + } + break; + + case 0: + case 1: + case 2: /* the actual timers */ + ctr = &dev->counters[t]; + + switch (ctr->wm) { + case 1: + ctr->l = val; + pitf_ctr_load(ctr); + break; + case 2: + ctr->l = (val << 8); + pitf_ctr_load(ctr); + break; + case 0: + ctr->l &= 0xFF; + ctr->l |= (val << 8); + pitf_ctr_load(ctr); + ctr->wm = 3; + break; + case 3: + ctr->l &= 0xFF00; + ctr->l |= val; + ctr->wm = 0; + break; + } + break; + } +} + +static uint8_t +pitf_read(uint16_t addr, void *priv) +{ + pitf_t *dev = (pitf_t *) priv; + uint8_t ret = 0xff; + int t = (addr & 3); + ctrf_t *ctr; + + switch (addr & 3) { + case 3: /* Control. */ + /* This is 8254-only, 8253 returns 0x00. */ + ret = (dev->flags & PIT_8254) ? dev->ctrl : 0x00; + break; + + case 0: + case 1: + case 2: /* The actual timers. */ + ctr = &dev->counters[t]; + + if (ctr->do_read_status) { + ctr->do_read_status = 0; + ret = ctr->read_status; + break; + } + + if (ctr->rereadlatch && !ctr->latched) { + ctr->rereadlatch = 0; + ctr->rl = pitf_read_timer(ctr); + } + switch (ctr->rm) { + case 0: + ret = ctr->rl >> 8; + ctr->rm = 3; + ctr->latched = 0; + ctr->rereadlatch = 1; + break; + case 1: + ret = (ctr->rl) & 0xFF; + ctr->latched = 0; + ctr->rereadlatch = 1; + break; + case 2: + ret = (ctr->rl) >> 8; + ctr->latched = 0; + ctr->rereadlatch = 1; + break; + case 3: + ret = (ctr->rl) & 0xFF; + if (ctr->m & 0x80) + ctr->m &= 7; + else + ctr->rm = 0; + break; + } + break; + } + + pit_log("[%04X:%08X] pit_read(%04X, %08X) = %02X\n", CS, cpu_state.pc, addr, priv, ret); + + return ret; +} + +static void +pitf_timer_over(void *p) +{ + ctrf_t *ctr = (ctrf_t *) p; + pitf_over(ctr); +} + +static void +pitf_ctr_clock(void *data, int counter_id) +{ + pitf_t *pit = (pitf_t *)data; + ctrf_t *ctr = &pit->counters[counter_id]; + + if (ctr->thit || !ctr->enabled) + return; + + if (ctr->using_timer) + return; + + ctr->count -= (ctr->m == 3) ? 2 : 1; + if (!ctr->count) + pitf_over(ctr); +} + +static void +ctr_reset(ctrf_t *ctr) +{ + ctr->ctrl = 0; + ctr->m = 0; + ctr->gate = 0; + ctr->l = 0xffff; + ctr->thit = 1; + ctr->using_timer = 1; +} + +static void +pitf_reset(pitf_t *dev) +{ + int i; + + memset(dev, 0, sizeof(pitf_t)); + + for (i = 0; i < 3; i++) + ctr_reset(&dev->counters[i]); + + /* Disable speaker gate. */ + dev->counters[2].gate = 0; +} + +static void +pitf_close(void *priv) +{ + pitf_t *dev = (pitf_t *) priv; + + if (dev == pit_devs[0].data) + pit_devs[0].data = NULL; + + if (dev == pit_devs[1].data) + pit_devs[1].data = NULL; + + if (dev != NULL) + free(dev); +} + +static void * +pitf_init(const device_t *info) +{ + pitf_t *dev = (pitf_t *) malloc(sizeof(pitf_t)); + pitf_reset(dev); + + dev->flags = info->local; + + if (!(dev->flags & PIT_PS2) && !(dev->flags & PIT_CUSTOM_CLOCK)) { + for (int i = 0; i < 3; i++) { + ctrf_t *ctr = &dev->counters[i]; + timer_add(&ctr->timer, pitf_timer_over, (void *)ctr, 0); + } + } + + if (!(dev->flags & PIT_EXT_IO)) { + io_sethandler((dev->flags & PIT_SECONDARY) ? 0x0048 : 0x0040, 0x0004, + pitf_read, NULL, NULL, pitf_write, NULL, NULL, dev); + } + + return dev; +} + +const device_t i8253_fast_device = { + .name = "Intel 8253/8253-5 Programmable Interval Timer", + .internal_name = "i8253_fast", + .flags = DEVICE_ISA, + .local = PIT_8253, + .init = pitf_init, + .close = pitf_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + +const device_t i8254_fast_device = { + .name = "Intel 8254 Programmable Interval Timer", + .internal_name = "i8254_fast", + .flags = DEVICE_ISA, + .local = PIT_8254, + .init = pitf_init, + .close = pitf_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + +const device_t i8254_sec_fast_device = { + .name = "Intel 8254 Programmable Interval Timer (Secondary)", + .internal_name = "i8254_sec_fast", + .flags = DEVICE_ISA, + .local = PIT_8254 | PIT_SECONDARY, + .init = pitf_init, + .close = pitf_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + +const device_t i8254_ext_io_fast_device = { + .name = "Intel 8254 Programmable Interval Timer (External I/O)", + .internal_name = "i8254_ext_io_fast", + .flags = DEVICE_ISA, + .local = PIT_8254 | PIT_EXT_IO, + .init = pitf_init, + .close = pitf_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + +const device_t i8254_ps2_fast_device = { + .name = "Intel 8254 Programmable Interval Timer (PS/2)", + .internal_name = "i8254_ps2_fast", + .flags = DEVICE_ISA, + .local = PIT_8254 | PIT_PS2 | PIT_EXT_IO, + .init = pitf_init, + .close = pitf_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + +const pit_intf_t pit_fast_intf = { + &pitf_read, + &pitf_write, + &pitf_ctr_get_count, + &pitf_ctr_set_gate, + &pitf_ctr_set_using_timer, + &pitf_ctr_set_out_func, + &pitf_ctr_set_load_func, + &pitf_ctr_clock, + NULL, +}; \ No newline at end of file diff --git a/src/port_6x.c b/src/port_6x.c index c583ffdf0..0fe168a3c 100644 --- a/src/port_6x.c +++ b/src/port_6x.c @@ -63,7 +63,7 @@ port_6x_write(uint16_t port, uint8_t val, void *priv) speaker_enable = val & 2; if (speaker_enable) was_speaker_enable = 1; - pit_ctr_set_gate(&pit->counters[2], val & 1); + pit_devs[0].set_gate(pit_devs[0].data, 2, val & 1); if (dev->flags & PORT_6X_TURBO) xi8088_turbo_set(!!(val & 0x04)); From 5d7db9d4c5f217b701a1e01d8c71e911dc2365b1 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sat, 23 Jul 2022 14:03:54 +0200 Subject: [PATCH 126/386] Add pit_fast.o to Makefile.mingw --- src/win/Makefile.mingw | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 50b2b820b..8c29a24a1 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -535,7 +535,7 @@ CXXFLAGS := $(CFLAGS) # Create the (final) list of objects to build. # ######################################################################### MAINOBJ := 86box.o config.o log.o random.o timer.o io.o acpi.o apm.o dma.o ddma.o \ - nmi.o pic.o pit.o port_6x.o port_92.o ppi.o pci.o mca.o fifo8.o \ + nmi.o pic.o pit.o pit_fast.o port_6x.o port_92.o ppi.o pci.o mca.o fifo8.o \ usb.o device.o nvr.o nvr_at.o nvr_ps2.o machine_status.o \ $(VNCOBJ) From bcd8f7e75ad59d329ad4fad8ae1bcbf8dfe0fc1e Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 16:29:50 +0200 Subject: [PATCH 127/386] Added the ALi M5123 keyboard controller. --- src/device/keyboard_at.c | 43 ++++++++++++++++++++++++++++++++++------ 1 file changed, 37 insertions(+), 6 deletions(-) diff --git a/src/device/keyboard_at.c b/src/device/keyboard_at.c index 087fa2b96..c4377bd97 100644 --- a/src/device/keyboard_at.c +++ b/src/device/keyboard_at.c @@ -89,6 +89,7 @@ #define KBC_VEN_OLIVETTI 0x24 #define KBC_VEN_NCR 0x28 #define KBC_VEN_SAMSUNG 0x2c +#define KBC_VEN_ALI 0x30 #define KBC_VEN_MASK 0x3c @@ -1093,6 +1094,8 @@ write_output(atkbd_t *dev, uint8_t val) softresetx86(); /*Pulse reset!*/ cpu_set_edx(); flushmmucache(); + if (kbc_ven == KBC_VEN_ALI) + smbase = 0x00030000; } } @@ -1353,6 +1356,7 @@ static uint8_t write64_ami(void *priv, uint8_t val) { atkbd_t *dev = (atkbd_t *)priv; + uint8_t kbc_ven = dev->flags & KBC_VEN_MASK; switch (val) { case 0x00: case 0x01: case 0x02: case 0x03: @@ -1386,7 +1390,15 @@ write64_ami(void *priv, uint8_t val) case 0xa1: /* get controller version */ kbd_log("ATkbc: AMI - get controller version\n"); - add_data(dev, 'H'); + if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) { + if (kbc_ven == KBC_VEN_ALI) + add_data(dev, 'F'); + else if ((dev->flags & KBC_VEN_MASK) == KBC_VEN_INTEL_AMI) + add_data(dev, '5'); + else + add_data(dev, 'H'); + } else + add_data(dev, 'F'); return 0; case 0xa2: /* clear keyboard controller lines P22/P23 */ @@ -1456,9 +1468,14 @@ write64_ami(void *priv, uint8_t val) break; case 0xaf: /* set extended controller RAM */ - kbd_log("ATkbc: set extended controller RAM\n"); - dev->want60 = 1; - dev->secr_phase = 1; + if (kbc_ven == KBC_VEN_ALI) { + kbd_log("ATkbc: Award/ALi/VIA keyboard controller revision\n"); + add_to_kbc_queue_front(dev, 0x43, 0, 0x00); + } else { + kbd_log("ATkbc: set extended controller RAM\n"); + dev->want60 = 1; + dev->secr_phase = 1; + } return 0; case 0xb0: case 0xb1: case 0xb2: case 0xb3: @@ -1754,8 +1771,7 @@ kbd_write(uint16_t port, uint8_t val, void *priv) { atkbd_t *dev = (atkbd_t *)priv; int i = 0, bad = 1; - uint8_t mask, kbc_ven = 0x0; - kbc_ven = dev->flags & KBC_VEN_MASK; + uint8_t mask, kbc_ven = dev->flags & KBC_VEN_MASK; switch (port) { case 0x60: @@ -2315,6 +2331,7 @@ kbd_init(const device_t *info) case KBC_VEN_AMI: case KBC_VEN_INTEL_AMI: case KBC_VEN_SAMSUNG: + case KBC_VEN_ALI: dev->write60_ven = write60_ami; dev->write64_ven = write64_ami; break; @@ -2508,6 +2525,20 @@ const device_t keyboard_ps2_ami_device = { .config = NULL }; +const device_t keyboard_ps2_ali_device = { + .name = "PS/2 Keyboard (ALi M5123/M1543C)", + .internal_name = "keyboard_ps2_ali", + .flags = 0, + .local = KBC_TYPE_PS2_NOREF | KBC_VEN_ALI, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + const device_t keyboard_ps2_olivetti_device = { .name = "PS/2 Keyboard (Olivetti)", .internal_name = "keyboard_ps2_olivetti", From f9dbb5ea9f78c856a94ec281030aafed00f9a0eb Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 16:31:29 +0200 Subject: [PATCH 128/386] Fixes. --- src/device/keyboard_at.c | 28 ++++++++++++++-------------- src/include/86box/keyboard.h | 1 + 2 files changed, 15 insertions(+), 14 deletions(-) diff --git a/src/device/keyboard_at.c b/src/device/keyboard_at.c index c4377bd97..8bb436a0c 100644 --- a/src/device/keyboard_at.c +++ b/src/device/keyboard_at.c @@ -2525,20 +2525,6 @@ const device_t keyboard_ps2_ami_device = { .config = NULL }; -const device_t keyboard_ps2_ali_device = { - .name = "PS/2 Keyboard (ALi M5123/M1543C)", - .internal_name = "keyboard_ps2_ali", - .flags = 0, - .local = KBC_TYPE_PS2_NOREF | KBC_VEN_ALI, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, - { .available = NULL }, - .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL -}; - const device_t keyboard_ps2_olivetti_device = { .name = "PS/2 Keyboard (Olivetti)", .internal_name = "keyboard_ps2_olivetti", @@ -2623,6 +2609,20 @@ const device_t keyboard_ps2_ami_pci_device = { .config = NULL }; +const device_t keyboard_ps2_ali_pci_device = { + .name = "PS/2 Keyboard (ALi M5123/M1543C)", + .internal_name = "keyboard_ps2_ali_pci", + .flags = DEVICE_PCI, + .local = KBC_TYPE_PS2_NOREF | KBC_VEN_ALI, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + const device_t keyboard_ps2_intel_ami_pci_device = { .name = "PS/2 Keyboard (AMI)", .internal_name = "keyboard_ps2_intel_ami_pci", diff --git a/src/include/86box/keyboard.h b/src/include/86box/keyboard.h index c07fe6a8b..29ea8e5fb 100644 --- a/src/include/86box/keyboard.h +++ b/src/include/86box/keyboard.h @@ -178,6 +178,7 @@ extern const device_t keyboard_ps2_pci_device; extern const device_t keyboard_ps2_ami_pci_device; extern const device_t keyboard_ps2_intel_ami_pci_device; extern const device_t keyboard_ps2_acer_pci_device; +extern const device_t keyboard_ps2_ali_pci_device; #endif extern void keyboard_init(void); From 758b8988e0a2fe954a80c5724189f278bdd258e6 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 16:32:46 +0200 Subject: [PATCH 129/386] Preparations for ALi KBC. --- src/machine/m_at_slot1.c | 1 - src/machine/m_at_socket7.c | 2 -- src/machine/m_at_sockets7.c | 4 ---- 3 files changed, 7 deletions(-) diff --git a/src/machine/m_at_slot1.c b/src/machine/m_at_slot1.c index 188364e1c..f3b225ae1 100644 --- a/src/machine/m_at_slot1.c +++ b/src/machine/m_at_slot1.c @@ -717,7 +717,6 @@ machine_at_m729_init(const machine_t *model) pci_register_slot(0x10, PCI_CARD_NORMAL, 3, 4, 1, 2); device_add(&ali1621_device); device_add(&ali1543c_device); /* +0 */ - device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); diff --git a/src/machine/m_at_socket7.c b/src/machine/m_at_socket7.c index 25fa8483e..2856a599c 100644 --- a/src/machine/m_at_socket7.c +++ b/src/machine/m_at_socket7.c @@ -1005,7 +1005,6 @@ machine_at_m560_init(const machine_t *model) pci_register_slot(0x06, PCI_CARD_NORMAL, 4, 1, 2, 3); device_add(&ali1531_device); device_add(&ali1543_device); /* -5 */ - device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x3, 256); @@ -1040,7 +1039,6 @@ machine_at_ms5164_init(const machine_t *model) device_add(&ali1531_device); device_add(&ali1543_device); /* -5 */ - device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x3, 256); diff --git a/src/machine/m_at_sockets7.c b/src/machine/m_at_sockets7.c index c8eeccea0..a32bf3883 100644 --- a/src/machine/m_at_sockets7.c +++ b/src/machine/m_at_sockets7.c @@ -73,7 +73,6 @@ machine_at_p5a_init(const machine_t *model) pci_register_slot(0x06, PCI_CARD_NORMAL, 3, 4, 1, 2); device_add(&ali1541_device); device_add(&ali1543c_device); /* +0 */ - device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_39sf020_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); device_add(&w83781d_p5a_device); /* fans: Chassis, CPU, Power; temperatures: MB, unused, CPU */ @@ -107,7 +106,6 @@ machine_at_m579_init(const machine_t *model) pci_register_slot(0x14, PCI_CARD_NORMAL, 1, 2, 3, 4); device_add(&ali1541_device); device_add(&ali1543c_device); /* +0 */ - device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); @@ -140,7 +138,6 @@ machine_at_5aa_init(const machine_t *model) pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2); device_add(&ali1541_device); device_add(&ali1543c_device); /* +0 */ - device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); @@ -175,7 +172,6 @@ machine_at_5ax_init(const machine_t *model) pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); device_add(&ali1541_device); device_add(&ali1543c_device); /* +0 */ - device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); From e814fe606d398d4843777a0d017aed1a6644f1bd Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 16:33:27 +0200 Subject: [PATCH 130/386] ALi M5123 now adds the keyboard controller. --- src/sio/sio_ali5123.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/sio/sio_ali5123.c b/src/sio/sio_ali5123.c index cabe38a58..3beb63590 100644 --- a/src/sio/sio_ali5123.c +++ b/src/sio/sio_ali5123.c @@ -456,6 +456,8 @@ ali5123_init(const device_t *info) io_sethandler(FDC_PRIMARY_ADDR, 0x0002, ali5123_read, NULL, NULL, ali5123_write, NULL, NULL, dev); + device_add(&keyboard_ps2_ali_pci_device); + return dev; } From 077f6174bd69ddfd0f8c91c47146a18d10fca05e Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 16:34:03 +0200 Subject: [PATCH 131/386] ALi M1543(C) log fixes. --- src/chipset/ali1543.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/chipset/ali1543.c b/src/chipset/ali1543.c index bde561c09..92d089a42 100644 --- a/src/chipset/ali1543.c +++ b/src/chipset/ali1543.c @@ -289,7 +289,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) break; } pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_IDE, ((int) dev->ide_slot) + dev->offset); - ali1543_log("IDE slot = %02X (A%0i)\n", dev->ide_slot/* - 5*/, dev->ide_slot + 11); + ali1543_log("IDE slot = %02X (A%0i)\n", ((int) dev->ide_slot) + dev->offset, dev->ide_slot + 11); ali5229_ide_irq_handler(dev); break; @@ -359,7 +359,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) break; } pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_PMU, ((int) dev->pmu_slot) + dev->offset); - ali1543_log("PMU slot = %02X (A%0i)\n", dev->pmu_slot/* - 5*/, dev->pmu_slot + 11); + ali1543_log("PMU slot = %02X (A%0i)\n", ((int) dev->pmu_slot) + dev->offset, dev->pmu_slot + 11); switch (val & 0x03) { case 0x00: dev->usb_slot = 0x14; /* A31 = slot 20 */ @@ -375,7 +375,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) break; } pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_USB, ((int) dev->usb_slot) + dev->offset); - ali1543_log("USB slot = %02X (A%0i)\n", dev->usb_slot/* - 5*/, dev->usb_slot + 11); + ali1543_log("USB slot = %02X (A%0i)\n", ((int) dev->usb_slot) + dev->offset, dev->usb_slot + 11); break; case 0x73: /* DDMA Base Address */ @@ -1555,6 +1555,7 @@ ali1543_init(const device_t *info) dev->offset = (info->local >> 8) & 0x7f; if (info->local & 0x8000) dev->offset = -dev->offset; + pclog("Offset = %i\n", dev->offset); pci_enable_mirq(0); pci_enable_mirq(1); From b8005eeb20e2bec6823f866f769b739181412337 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 16:34:47 +0200 Subject: [PATCH 132/386] Include keyboard.h from the ALi M5123 code. --- src/sio/sio_ali5123.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/sio/sio_ali5123.c b/src/sio/sio_ali5123.c index 3beb63590..79d9219ba 100644 --- a/src/sio/sio_ali5123.c +++ b/src/sio/sio_ali5123.c @@ -24,6 +24,7 @@ #include <86box/device.h> #include <86box/pic.h> #include <86box/pci.h> +#include <86box/keyboard.h> #include <86box/lpt.h> #include <86box/serial.h> #include <86box/hdc.h> From 25362803f68d5be846180c6ddac643b9402ce5b3 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 16:35:24 +0200 Subject: [PATCH 133/386] Move the ALi M5123 initialization to the end of the M1543(C) initialization. --- src/chipset/ali1543.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/chipset/ali1543.c b/src/chipset/ali1543.c index 92d089a42..bbbf7d705 100644 --- a/src/chipset/ali1543.c +++ b/src/chipset/ali1543.c @@ -1548,9 +1548,6 @@ ali1543_init(const device_t *info) /* USB */ dev->usb = device_add(&usb_device); - /* Super I/O chip */ - device_add(&ali5123_device); - dev->type = info->local & 0xff; dev->offset = (info->local >> 8) & 0x7f; if (info->local & 0x8000) @@ -1565,6 +1562,9 @@ ali1543_init(const device_t *info) pci_enable_mirq(5); pci_enable_mirq(6); + /* Super I/O chip */ + device_add(&ali5123_device); + ali1543_reset(dev); return dev; From b20dcf2ee1fdb06d7fb18d256942655aedcbd308 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 23 Jul 2022 17:53:26 +0200 Subject: [PATCH 134/386] Reverted the Sound Blaster DSP changes. --- src/sound/snd_sb_dsp.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/src/sound/snd_sb_dsp.c b/src/sound/snd_sb_dsp.c index 3cbb223f3..c87f45e2f 100644 --- a/src/sound/snd_sb_dsp.c +++ b/src/sound/snd_sb_dsp.c @@ -326,14 +326,14 @@ void sb_dsp_speed_changed(sb_dsp_t *dsp) { if (dsp->sb_timeo < 256) - dsp->sblatcho = (256.0 - (double) dsp->sb_timeo); + dsp->sblatcho = TIMER_USEC * (256 - dsp->sb_timeo); else - dsp->sblatcho = ((1000000.0 / ((double) dsp->sb_timeo - 256.0))); + dsp->sblatcho = (uint64_t) (TIMER_USEC * (1000000.0f / (float) (dsp->sb_timeo - 256))); if (dsp->sb_timei < 256) - dsp->sblatchi = (256.0 - (double) dsp->sb_timei); + dsp->sblatchi = TIMER_USEC * (256 - dsp->sb_timei); else - dsp->sblatchi = ((1000000.0 / ((double) dsp->sb_timei - 256.0))); + dsp->sblatchi = (uint64_t) (TIMER_USEC * (1000000.0f / (float) (dsp->sb_timei - 256))); } void @@ -359,7 +359,7 @@ sb_start_dma(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len) dsp->sb_16_enable = 0; dsp->sb_8_output = 1; if (!timer_is_enabled(&dsp->output_timer)) - timer_on_auto(&dsp->output_timer, dsp->sblatcho); + timer_set_delay_u64(&dsp->output_timer, dsp->sblatcho); dsp->sbleftright = dsp->sbleftright_default; dsp->sbdacpos = 0; } else { @@ -372,7 +372,7 @@ sb_start_dma(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len) dsp->sb_8_enable = 0; dsp->sb_16_output = 1; if (!timer_is_enabled(&dsp->output_timer)) - timer_on_auto(&dsp->output_timer, dsp->sblatcho); + timer_set_delay_u64(&dsp->output_timer, dsp->sblatcho); } } @@ -389,7 +389,7 @@ sb_start_dma_i(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len) dsp->sb_16_enable = 0; dsp->sb_8_output = 0; if (!timer_is_enabled(&dsp->input_timer)) - timer_on_auto(&dsp->input_timer, dsp->sblatchi); + timer_set_delay_u64(&dsp->input_timer, dsp->sblatchi); } else { dsp->sb_16_length = dsp->sb_16_origlength = len; dsp->sb_16_format = format; @@ -400,7 +400,7 @@ sb_start_dma_i(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len) dsp->sb_8_enable = 0; dsp->sb_16_output = 0; if (!timer_is_enabled(&dsp->input_timer)) - timer_on_auto(&dsp->input_timer, dsp->sblatchi); + timer_set_delay_u64(&dsp->input_timer, dsp->sblatchi); } memset(dsp->record_buffer, 0, sizeof(dsp->record_buffer)); @@ -508,10 +508,10 @@ sb_exec_command(sb_dsp_t *dsp) mode does not imply such samplerate. Position is increased in sb_poll_i(). */ if (!timer_is_enabled(&dsp->input_timer)) { dsp->sb_timei = 256 - 22; - dsp->sblatchi = 22.0; + dsp->sblatchi = TIMER_USEC * 22; temp = 1000000 / 22; dsp->sb_freq = temp; - timer_on_auto(&dsp->input_timer, dsp->sblatchi); + timer_set_delay_u64(&dsp->input_timer, dsp->sblatchi); } break; case 0x24: /* 8-bit single cycle DMA input */ @@ -561,7 +561,7 @@ sb_exec_command(sb_dsp_t *dsp) break; case 0x40: /* Set time constant */ dsp->sb_timei = dsp->sb_timeo = dsp->sb_data[0]; - dsp->sblatcho = dsp->sblatchi = (256.0 - (double) dsp->sb_data[0]); + dsp->sblatcho = dsp->sblatchi = TIMER_USEC * (256 - dsp->sb_data[0]); temp = 256 - dsp->sb_data[0]; temp = 1000000 / temp; sb_dsp_log("Sample rate - %ihz (%i)\n", temp, dsp->sblatcho); @@ -572,8 +572,8 @@ sb_exec_command(sb_dsp_t *dsp) case 0x41: /* Set output sampling rate */ case 0x42: /* Set input sampling rate */ if (dsp->sb_type >= SB16) { - dsp->sblatcho = ((1000000.0 / (double) (dsp->sb_data[1] + (dsp->sb_data[0] << 8)))); - sb_dsp_log("Sample rate - %ihz (%lf)\n", dsp->sb_data[1] + (dsp->sb_data[0] << 8), dsp->sblatcho); + dsp->sblatcho = (uint64_t) (TIMER_USEC * (1000000.0f / (float) (dsp->sb_data[1] + (dsp->sb_data[0] << 8)))); + sb_dsp_log("Sample rate - %ihz (%i)\n", dsp->sb_data[1] + (dsp->sb_data[0] << 8), dsp->sblatcho); temp = dsp->sb_freq; dsp->sb_freq = dsp->sb_data[1] + (dsp->sb_data[0] << 8); dsp->sb_timeo = 256LL + dsp->sb_freq; @@ -631,7 +631,7 @@ sb_exec_command(sb_dsp_t *dsp) case 0x80: /* Pause DAC */ dsp->sb_pausetime = dsp->sb_data[0] + (dsp->sb_data[1] << 8); if (!timer_is_enabled(&dsp->output_timer)) - timer_on_auto(&dsp->output_timer, dsp->sblatcho); + timer_set_delay_u64(&dsp->output_timer, dsp->sblatcho); break; case 0x90: /* High speed 8-bit autoinit DMA output */ if (dsp->sb_type >= SB2) @@ -1200,7 +1200,7 @@ pollsb(void *p) int tempi, ref; int data[2]; - timer_on_auto(&dsp->output_timer, dsp->sblatcho); + timer_advance_u64(&dsp->output_timer, dsp->sblatcho); if (dsp->sb_8_enable && !dsp->sb_8_pause && dsp->sb_pausetime < 0 && dsp->sb_8_output) { sb_dsp_update(dsp); @@ -1457,7 +1457,7 @@ sb_poll_i(void *p) sb_dsp_t *dsp = (sb_dsp_t *) p; int processed = 0; - timer_on_auto(&dsp->input_timer, dsp->sblatchi); + timer_advance_u64(&dsp->input_timer, dsp->sblatchi); if (dsp->sb_8_enable && !dsp->sb_8_pause && dsp->sb_pausetime < 0 && !dsp->sb_8_output) { switch (dsp->sb_8_format) { From 02874f2ed265cc1b8de014e0c26fc690ac51e2f3 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Sat, 23 Jul 2022 23:54:42 +0200 Subject: [PATCH 135/386] DMA: Implemented autoinit mode in the PS/2 MCA side (although the bit is undocumented in said side, but documented in the ISA/PCI side). Networking: Added the WD8013EP/A MCA nic, which is more supported than the WD80x3ET/A plus an initial ram size configuration before POS configuration. Sound: Added the Reply MCA OEM of SB16 with its own MCA POS ID and properly implemented the IRQ's and DMA's of the AdLib Gold in its EEPROM plus an initial configurable setting for them and an initial DRQ implementation into said card. --- src/dma.c | 3 + src/include/86box/net_wd8003.h | 4 +- src/include/86box/sound.h | 1 + src/network/net_wd8003.c | 121 ++++++++++++++++++++- src/network/network.c | 1 + src/sound/snd_adlibgold.c | 124 ++++++++++++++++----- src/sound/snd_sb.c | 191 +++++++++++++++++++++++++++++++++ src/sound/sound.c | 1 + 8 files changed, 414 insertions(+), 32 deletions(-) diff --git a/src/dma.c b/src/dma.c index c109f1b8d..5eb129860 100644 --- a/src/dma.c +++ b/src/dma.c @@ -62,6 +62,7 @@ static struct { #define DMA_PS2_IOA (1 << 0) +#define DMA_PS2_AUTOINIT (1 << 1) #define DMA_PS2_XFER_MEM_TO_IO (1 << 2) #define DMA_PS2_XFER_IO_TO_MEM (3 << 2) #define DMA_PS2_XFER_MASK (3 << 2) @@ -729,6 +730,8 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv) else if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_IO_TO_MEM) mode |= 4; dma_c->mode = (dma_c->mode & ~0x2c) | mode; + if (val & DMA_PS2_AUTOINIT) + dma_c->mode |= 0x10; dma_c->ps2_mode = val; dma_c->size = val & DMA_PS2_SIZE16; break; diff --git a/src/include/86box/net_wd8003.h b/src/include/86box/net_wd8003.h index 8fc89a88b..08bd901fe 100644 --- a/src/include/86box/net_wd8003.h +++ b/src/include/86box/net_wd8003.h @@ -50,7 +50,8 @@ enum { WD8003EB, /* WD8003EB : 8-bit ISA, 5x3 interface chip */ WD8013EBT, /* WD8013EBT : 16-bit ISA, no interface chip */ WD8003ETA, /* WD8003ET/A: 16-bit MCA, no interface chip */ - WD8003EA /* WD8003E/A : 16-bit MCA, 5x3 interface chip */ + WD8003EA, /* WD8003E/A : 16-bit MCA, 5x3 interface chip */ + WD8013EPA }; extern const device_t wd8003e_device; @@ -58,5 +59,6 @@ extern const device_t wd8003eb_device; extern const device_t wd8013ebt_device; extern const device_t wd8003eta_device; extern const device_t wd8003ea_device; +extern const device_t wd8013epa_device; #endif /*NET_WD8003_H*/ diff --git a/src/include/86box/sound.h b/src/include/86box/sound.h index 2696954ef..71d4942d0 100644 --- a/src/include/86box/sound.h +++ b/src/include/86box/sound.h @@ -120,6 +120,7 @@ extern const device_t sb_16_device; extern const device_t sb_16_pnp_device; extern const device_t sb_16_compat_device; extern const device_t sb_16_compat_nompu_device; +extern const device_t sb_16_reply_mca_device; extern const device_t sb_32_pnp_device; extern const device_t sb_awe32_device; extern const device_t sb_awe32_pnp_device; diff --git a/src/network/net_wd8003.c b/src/network/net_wd8003.c index 81e6d91ec..81429fe19 100644 --- a/src/network/net_wd8003.c +++ b/src/network/net_wd8003.c @@ -540,7 +540,6 @@ wd_mca_read(int port, void *priv) #define MCA_6FC0_IRQS { 3, 4, 10, 15 } - static void wd_mca_write(int port, uint8_t val, void *priv) { @@ -582,6 +581,68 @@ wd_mca_write(int port, uint8_t val, void *priv) dev->base_address, dev->irq, dev->ram_addr); } +static void +wd_8013epa_mca_write(int port, uint8_t val, void *priv) +{ + wd_t *dev = (wd_t *)priv; + + /* MCA does not write registers below 0x0100. */ + if (port < 0x0102) return; + + /* Save the MCA register value. */ + dev->pos_regs[port & 7] = val; + + /* + * The PS/2 Model 80 BIOS always enables a card if it finds one, + * even if no resources were assigned yet (because we only added + * the card, but have not run AutoConfig yet...) + * + * So, remove current address, if any. + */ + if (dev->base_address) + wd_io_remove(dev, dev->base_address); + + dev->base_address = 0x800 + ((dev->pos_regs[2] & 0xf0) << 8); + + switch (dev->pos_regs[5] & 0x0c) { + case 0: + dev->irq = 3; + break; + case 4: + dev->irq = 4; + break; + case 8: + dev->irq = 10; + break; + case 0x0c: + dev->irq = 14; + break; + } + + if (dev->pos_regs[3] & 0x10) + dev->ram_size = 0x4000; + else + dev->ram_size = 0x2000; + + dev->ram_addr = ((dev->pos_regs[3] & 0x0f) << 13) + 0xc0000; + if (dev->pos_regs[3] & 0x80) + dev->ram_addr += 0xf00000; + + /* Initialize the device if fully configured. */ + /* Register (new) I/O handler. */ + if (dev->pos_regs[2] & 0x01) + wd_io_set(dev, dev->base_address); + + mem_mapping_set_addr(&dev->ram_mapping, dev->ram_addr, dev->ram_size); + + mem_mapping_disable(&dev->ram_mapping); + if ((dev->msr & WE_MSR_ENABLE_RAM) && (dev->pos_regs[2] & 0x01)) + mem_mapping_enable(&dev->ram_mapping); + + wdlog("%s: attached IO=0x%X IRQ=%d, RAM addr=0x%06x\n", dev->name, + dev->base_address, dev->irq, dev->ram_addr); +} + static uint8_t wd_mca_feedb(void *priv) @@ -624,9 +685,12 @@ wd_init(const device_t *info) dev->maclocal[5] = (mac & 0xff); } - if ((dev->board == WD8003ETA) || (dev->board == WD8003EA)) - mca_add(wd_mca_read, wd_mca_write, wd_mca_feedb, NULL, dev); - else { + if ((dev->board == WD8003ETA) || (dev->board == WD8003EA) || dev->board == WD8013EPA) { + if (dev->board == WD8013EPA) + mca_add(wd_mca_read, wd_8013epa_mca_write, wd_mca_feedb, NULL, dev); + else + mca_add(wd_mca_read, wd_mca_write, wd_mca_feedb, NULL, dev); + } else { dev->base_address = device_get_config_hex16("base"); dev->irq = device_get_config_int("irq"); dev->ram_addr = device_get_config_hex20("ram_addr"); @@ -679,12 +743,20 @@ wd_init(const device_t *info) dev->board_chip = WE_ID_SOFT_CONFIG; /* Ethernet, MCA, no interface chip, RAM 16k */ case WD8003ETA: - dev->board_chip |= 0x05 | WE_ID_BUS_MCA; + dev->board_chip |= WE_TYPE_WD8013EBT | WE_ID_BUS_MCA; dev->ram_size = 0x4000; dev->pos_regs[0] = 0xC0; dev->pos_regs[1] = 0x6F; dev->bit16 = 3; break; + + case WD8013EPA: + dev->board_chip = WE_TYPE_WD8013EP | WE_ID_BUS_MCA; + dev->ram_size = device_get_config_int("ram_size"); + dev->pos_regs[0] = 0xC8; + dev->pos_regs[1] = 0x61; + dev->bit16 = 3; + break; } dev->irr |= WE_IRR_ENABLE_IRQ; @@ -969,6 +1041,31 @@ static const device_config_t wd8013_config[] = { { .name = "", .description = "", .type = CONFIG_END } }; +static const device_config_t wd8013epa_config[] = { + { + .name = "ram_size", + .description = "Initial RAM size", + .type = CONFIG_SELECTION, + .default_string = "", + .default_int = 16384, + .file_filter = "", + .spinner = { 0 }, + .selection = { + { .description = "8 kB", .value = 8192 }, + { .description = "16 kB", .value = 16384 }, + { .description = "" } + }, + }, + { + .name = "mac", + .description = "MAC Address", + .type = CONFIG_MAC, + .default_string = "", + .default_int = -1 + }, + { .name = "", .description = "", .type = CONFIG_END } +}; + static const device_config_t mca_mac_config[] = { { .name = "mac", @@ -1050,3 +1147,17 @@ const device_t wd8003ea_device = { .force_redraw = NULL, .config = mca_mac_config }; + +const device_t wd8013epa_device = { + .name = "Western Digital WD8013EP/A", + .internal_name = "wd8013epa", + .flags = DEVICE_MCA, + .local = WD8013EPA, + .init = wd_init, + .close = wd_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = wd8013epa_config +}; diff --git a/src/network/network.c b/src/network/network.c index 49915024a..6a7fbdfa5 100644 --- a/src/network/network.c +++ b/src/network/network.c @@ -103,6 +103,7 @@ static netcard_t net_cards[] = { { ðernext_mc_device, NULL }, { &wd8003eta_device, NULL }, { &wd8003ea_device, NULL }, + { &wd8013epa_device, NULL }, { &pcnet_am79c973_device, NULL }, { &pcnet_am79c970a_device, NULL }, { &rtl8029as_device, NULL }, diff --git a/src/sound/snd_adlibgold.c b/src/sound/snd_adlibgold.c index 652c672e2..655a93a1f 100644 --- a/src/sound/snd_adlibgold.c +++ b/src/sound/snd_adlibgold.c @@ -20,6 +20,7 @@ typedef struct adgold_t { int adgold_irq_status; + int irq, dma, hdma; uint8_t adgold_eeprom[0x1a]; @@ -157,7 +158,7 @@ adgold_update_irq_status(adgold_t *adgold) adgold->adgold_status = temp; if ((adgold->adgold_status ^ 0xf) && !adgold->adgold_irq_status) { - picint(0x80); + picint(1 << adgold->irq); } adgold->adgold_irq_status = adgold->adgold_status ^ 0xf; @@ -167,23 +168,26 @@ void adgold_getsamp_dma(adgold_t *adgold, int channel) { int temp; + dma_set_drq(adgold->dma, 1); if ((adgold->adgold_mma_regs[channel][0xc] & 0x60) && (((adgold->adgold_mma_fifo_end[channel] - adgold->adgold_mma_fifo_start[channel]) & 255) >= 127)) return; - temp = dma_channel_read(1); - if (temp == DMA_NODATA) + temp = dma_channel_read(adgold->dma); + if (temp == DMA_NODATA) { return; + } adgold->adgold_mma_fifo[channel][adgold->adgold_mma_fifo_end[channel]] = temp; - adgold->adgold_mma_fifo_end[channel] = (adgold->adgold_mma_fifo_end[channel] + 1) & 255; + adgold->adgold_mma_fifo_end[channel] = (adgold->adgold_mma_fifo_end[channel] + 1) & 255; if (adgold->adgold_mma_regs[channel][0xc] & 0x60) { - temp = dma_channel_read(1); + temp = dma_channel_read(adgold->dma); adgold->adgold_mma_fifo[channel][adgold->adgold_mma_fifo_end[channel]] = temp; - adgold->adgold_mma_fifo_end[channel] = (adgold->adgold_mma_fifo_end[channel] + 1) & 255; + adgold->adgold_mma_fifo_end[channel] = (adgold->adgold_mma_fifo_end[channel] + 1) & 255; } if (((adgold->adgold_mma_fifo_end[channel] - adgold->adgold_mma_fifo_start[channel]) & 255) >= adgold->adgold_mma_intpos[channel]) { adgold->adgold_mma_status &= ~(0x01 << channel); adgold_update_irq_status(adgold); + dma_set_drq(adgold->dma, 0); } } @@ -335,10 +339,11 @@ adgold_write(uint16_t addr, uint8_t val, void *p) break; /* 7350 Hz*/ } if (val & 0x80) { - adgold->adgold_mma_enable[0] = 0; + adgold->adgold_mma_enable[0] = 0; adgold->adgold_mma_fifo_end[0] = adgold->adgold_mma_fifo_start[0] = 0; adgold->adgold_mma_status &= ~0x01; adgold_update_irq_status(adgold); + dma_set_drq(adgold->dma, 0); } if ((val & 0x01)) /*Start playback*/ { @@ -347,7 +352,7 @@ adgold_write(uint16_t addr, uint8_t val, void *p) if (adgold->adgold_mma_regs[0][0xc] & 1) { if (adgold->adgold_mma_regs[0][0xc] & 0x80) { - adgold->adgold_mma_enable[1] = 1; + adgold->adgold_mma_enable[1] = 1; adgold->adgold_mma.voice_count[1] = adgold->adgold_mma.voice_latch[1]; while (((adgold->adgold_mma_fifo_end[0] - adgold->adgold_mma_fifo_start[0]) & 255) < 128) { @@ -357,10 +362,12 @@ adgold_write(uint16_t addr, uint8_t val, void *p) if (((adgold->adgold_mma_fifo_end[0] - adgold->adgold_mma_fifo_start[0]) & 255) >= adgold->adgold_mma_intpos[0]) { adgold->adgold_mma_status &= ~0x01; adgold_update_irq_status(adgold); + dma_set_drq(adgold->dma, 0); } if (((adgold->adgold_mma_fifo_end[1] - adgold->adgold_mma_fifo_start[1]) & 255) >= adgold->adgold_mma_intpos[1]) { adgold->adgold_mma_status &= ~0x02; adgold_update_irq_status(adgold); + dma_set_drq(adgold->dma, 0); } } else { while (((adgold->adgold_mma_fifo_end[0] - adgold->adgold_mma_fifo_start[0]) & 255) < 128) { @@ -369,6 +376,7 @@ adgold_write(uint16_t addr, uint8_t val, void *p) if (((adgold->adgold_mma_fifo_end[0] - adgold->adgold_mma_fifo_start[0]) & 255) >= adgold->adgold_mma_intpos[0]) { adgold->adgold_mma_status &= ~0x01; adgold_update_irq_status(adgold); + dma_set_drq(adgold->dma, 0); } } } @@ -379,10 +387,11 @@ adgold_write(uint16_t addr, uint8_t val, void *p) case 0xb: if (((adgold->adgold_mma_fifo_end[0] - adgold->adgold_mma_fifo_start[0]) & 255) < 128) { adgold->adgold_mma_fifo[0][adgold->adgold_mma_fifo_end[0]] = val; - adgold->adgold_mma_fifo_end[0] = (adgold->adgold_mma_fifo_end[0] + 1) & 255; + adgold->adgold_mma_fifo_end[0] = (adgold->adgold_mma_fifo_end[0] + 1) & 255; if (((adgold->adgold_mma_fifo_end[0] - adgold->adgold_mma_fifo_start[0]) & 255) >= adgold->adgold_mma_intpos[0]) { adgold->adgold_mma_status &= ~0x01; adgold_update_irq_status(adgold); + dma_set_drq(adgold->dma, 0); } } break; @@ -457,6 +466,7 @@ adgold_write(uint16_t addr, uint8_t val, void *p) adgold->adgold_mma_fifo_end[1] = adgold->adgold_mma_fifo_start[1] = 0; adgold->adgold_mma_status &= ~0x02; adgold_update_irq_status(adgold); + dma_set_drq(adgold->dma, 0); } if ((val & 0x01)) /*Start playback*/ { @@ -479,6 +489,7 @@ adgold_write(uint16_t addr, uint8_t val, void *p) if (((adgold->adgold_mma_fifo_end[1] - adgold->adgold_mma_fifo_start[1]) & 255) >= adgold->adgold_mma_intpos[1]) { adgold->adgold_mma_status &= ~0x02; adgold_update_irq_status(adgold); + dma_set_drq(adgold->dma, 0); } } break; @@ -525,6 +536,7 @@ adgold_read(uint16_t addr, void *p) default: temp = adgold->adgold_38x_regs[adgold->adgold_38x_addr]; + break; } } else temp = opl3_read(addr, &adgold->opl); @@ -877,8 +889,9 @@ adgold_init(const device_t *info) adgold_t *adgold = malloc(sizeof(adgold_t)); memset(adgold, 0, sizeof(adgold_t)); + adgold->dma = device_get_config_int("dma"); + adgold->irq = device_get_config_int("irq"); adgold->surround_enabled = device_get_config_int("surround"); - adgold->gameport_enabled = device_get_config_int("gameport"); opl3_init(&adgold->opl); @@ -912,9 +925,9 @@ adgold_init(const device_t *info) adgold->adgold_eeprom[0x10] = 0xff; adgold->adgold_eeprom[0x11] = 0x20; adgold->adgold_eeprom[0x12] = 0x00; - adgold->adgold_eeprom[0x13] = 0x0b; /* IRQ 1, DMA1 */ - adgold->adgold_eeprom[0x14] = 0x00; /* DMA2 */ - adgold->adgold_eeprom[0x15] = 0x71; /* Port */ + adgold->adgold_eeprom[0x13] = 0xa0; + adgold->adgold_eeprom[0x14] = 0x00; + adgold->adgold_eeprom[0x15] = 0x388 / 8; /*Present at 388-38f*/ adgold->adgold_eeprom[0x16] = 0x00; adgold->adgold_eeprom[0x17] = 0x68; adgold->adgold_eeprom[0x18] = 0x00; /* Surround */ @@ -927,25 +940,36 @@ adgold_init(const device_t *info) fclose(f); } - adgold->adgold_status = 0xf; - adgold->adgold_38x_addr = 0; - adgold->adgold_eeprom[0x13] = 3 | (1 << 3); /*IRQ 7, DMA 1*/ - // adgold->adgold_eeprom[0x14] = 3 << 4; /*DMA 3 - Double check this */ - adgold->adgold_eeprom[0x14] = 0x00; /*DMA ?*/ - adgold->adgold_eeprom[0x15] = 0x388 / 8; /*Present at 388-38f*/ + adgold->adgold_status = 0xf; + adgold->adgold_38x_addr = 0; + switch (adgold->irq) { + case 3: + adgold->adgold_eeprom[0x13] |= 0x00; + break; + case 4: + adgold->adgold_eeprom[0x13] |= 0x01; + break; + case 5: + adgold->adgold_eeprom[0x13] |= 0x02; + break; + case 7: + adgold->adgold_eeprom[0x13] |= 0x03; + break; + } + adgold->adgold_eeprom[0x13] |= (adgold->dma << 3); memcpy(adgold->adgold_38x_regs, adgold->adgold_eeprom, 0x19); - adgold->vol_l = attenuation[adgold->adgold_eeprom[0x04] & 0x3f]; - adgold->vol_r = attenuation[adgold->adgold_eeprom[0x05] & 0x3f]; - adgold->bass = adgold->adgold_eeprom[0x06] & 0xf; - adgold->treble = adgold->adgold_eeprom[0x07] & 0xf; - adgold->fm_vol_l = (int) (int8_t) (adgold->adgold_eeprom[0x09] - 128); - adgold->fm_vol_r = (int) (int8_t) (adgold->adgold_eeprom[0x0a] - 128); + adgold->vol_l = attenuation[adgold->adgold_eeprom[0x04] & 0x3f]; + adgold->vol_r = attenuation[adgold->adgold_eeprom[0x05] & 0x3f]; + adgold->bass = adgold->adgold_eeprom[0x06] & 0xf; + adgold->treble = adgold->adgold_eeprom[0x07] & 0xf; + adgold->fm_vol_l = (int) (int8_t) (adgold->adgold_eeprom[0x09] - 128); + adgold->fm_vol_r = (int) (int8_t) (adgold->adgold_eeprom[0x0a] - 128); adgold->samp_vol_l = (int) (int8_t) (adgold->adgold_eeprom[0x0b] - 128); adgold->samp_vol_r = (int) (int8_t) (adgold->adgold_eeprom[0x0c] - 128); adgold->aux_vol_l = (int) (int8_t) (adgold->adgold_eeprom[0x0d] - 128); adgold->aux_vol_r = (int) (int8_t) (adgold->adgold_eeprom[0x0e] - 128); - adgold->adgold_mma_enable[0] = 0; + adgold->adgold_mma_enable[0] = 0; adgold->adgold_mma_fifo_start[0] = adgold->adgold_mma_fifo_end[0] = 0; /*388/389 are handled by adlib_init*/ @@ -982,6 +1006,54 @@ adgold_close(void *p) static const device_config_t adgold_config[] = { // clang-format off + { + .name = "irq", + .description = "IRQ", + .type = CONFIG_SELECTION, + .default_string = "", + .default_int = 7, + .file_filter = "", + .spinner = { 0 }, + .selection = { + { + .description = "IRQ 3", + .value = 3 + }, + { + .description = "IRQ 4", + .value = 4 + }, + { + .description = "IRQ 5", + .value = 5 + }, + { + .description = "IRQ 7", + .value = 7 + }, + { .description = "" } + } + }, + { + .name = "dma", + .description = "Low DMA channel", + .type = CONFIG_SELECTION, + .default_string = "", + .default_int = 1, + .file_filter = "", + .spinner = { 0 }, + .selection = { + { + .description = "DMA 1", + .value = 1 + }, + { + .description = "DMA 3", + .value = 3 + }, + { .description = "" } + } + }, { .name = "gameport", .description = "Enable Game port", diff --git a/src/sound/snd_sb.c b/src/sound/snd_sb.c index aaafd11fa..0a661f452 100644 --- a/src/sound/snd_sb.c +++ b/src/sound/snd_sb.c @@ -1198,6 +1198,148 @@ sb_pro_mcv_write(int port, uint8_t val, void *p) sb_dsp_setdma8(&sb->dsp, sb->pos_regs[4] & 3); } +static uint8_t +sb_16_reply_mca_read(int port, void *p) +{ + sb_t *sb = (sb_t *) p; + uint8_t ret = sb->pos_regs[port & 7]; + + sb_log("sb_16_reply_mca_read: port=%04x ret=%02x\n", port, ret); + + return ret; +} + +static void +sb_16_reply_mca_write(int port, uint8_t val, void *p) +{ + uint16_t addr, mpu401_addr; + int low_dma, high_dma; + sb_t *sb = (sb_t *) p; + + if (port < 0x102) + return; + + sb_log("sb_16_reply_mca_write: port=%04x val=%02x\n", port, val); + + switch (sb->pos_regs[2] & 0xc4) { + case 4: + addr = 0x220; + break; + case 0x44: + addr = 0x240; + break; + case 0x84: + addr = 0x260; + break; + case 0xc4: + addr = 0x280; + break; + case 0: + addr = 0; + break; + } + + if (addr) { + io_removehandler(addr, 0x0004, + opl3_read, NULL, NULL, + opl3_write, NULL, NULL, + &sb->opl); + io_removehandler(addr + 8, 0x0002, + opl3_read, NULL, NULL, + opl3_write, NULL, NULL, + &sb->opl); + io_removehandler(0x0388, 0x0004, + opl3_read, NULL, NULL, + opl3_write, NULL, NULL, + &sb->opl); + io_removehandler(addr + 4, 0x0002, + sb_ct1745_mixer_read, NULL, NULL, + sb_ct1745_mixer_write, NULL, NULL, + sb); + } + + /* DSP I/O handler is activated in sb_dsp_setaddr */ + sb_dsp_setaddr(&sb->dsp, 0); + mpu401_change_addr(sb->mpu, 0); + gameport_remap(sb->gameport, 0); + + sb->pos_regs[port & 7] = val; + + if (sb->pos_regs[2] & 1) { + switch (sb->pos_regs[2] & 0xc4) { + case 4: + addr = 0x220; + break; + case 0x44: + addr = 0x240; + break; + case 0x84: + addr = 0x260; + break; + case 0xc4: + addr = 0x280; + break; + case 0: + addr = 0; + break; + } + switch (sb->pos_regs[2] & 0x18) { + case 8: + mpu401_addr = 0x330; + break; + case 0x18: + mpu401_addr = 0x300; + break; + case 0: + mpu401_addr = 0; + break; + } + + if (addr) { + io_sethandler(addr, 0x0004, + opl3_read, NULL, NULL, + opl3_write, NULL, NULL, + &sb->opl); + io_sethandler(addr + 8, 0x0002, + opl3_read, NULL, NULL, + opl3_write, NULL, NULL, + &sb->opl); + io_sethandler(0x0388, 0x0004, + opl3_read, NULL, NULL, + opl3_write, NULL, NULL, &sb->opl); + io_sethandler(addr + 4, 0x0002, + sb_ct1745_mixer_read, NULL, NULL, + sb_ct1745_mixer_write, NULL, NULL, + sb); + } + + /* DSP I/O handler is activated in sb_dsp_setaddr */ + sb_dsp_setaddr(&sb->dsp, addr); + mpu401_change_addr(sb->mpu, mpu401_addr); + gameport_remap(sb->gameport, (sb->pos_regs[2] & 0x20) ? 0x200 : 0); + } + + switch (sb->pos_regs[4] & 0x60) { + case 0x20: + sb_dsp_setirq(&sb->dsp, 5); + break; + case 0x40: + sb_dsp_setirq(&sb->dsp, 7); + break; + case 0x60: + sb_dsp_setirq(&sb->dsp, 10); + break; + } + + low_dma = sb->pos_regs[3] & 3; + high_dma = (sb->pos_regs[3] >> 4) & 7; + if (!high_dma) + high_dma = low_dma; + + sb_dsp_setdma8(&sb->dsp, low_dma); + sb_dsp_setdma16(&sb->dsp, high_dma); +} + static void sb_16_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv) { @@ -1785,6 +1927,41 @@ sb_16_init(const device_t *info) return sb; } +static void * +sb_16_reply_mca_init(const device_t *info) +{ + sb_t *sb = malloc(sizeof(sb_t)); + memset(sb, 0x00, sizeof(sb_t)); + + sb->opl_enabled = 1; + opl3_init(&sb->opl); + + sb_dsp_init(&sb->dsp, SB16, SB_SUBTYPE_DEFAULT, sb); + sb_ct1745_mixer_reset(sb); + + sb->mixer_enabled = 1; + sb->mixer_sb16.output_filter = 1; + sound_add_handler(sb_get_buffer_sb16_awe32, sb); + sound_set_cd_audio_filter(sb16_awe32_filter_cd_audio, sb); + + sb->mpu = (mpu_t *) malloc(sizeof(mpu_t)); + memset(sb->mpu, 0, sizeof(mpu_t)); + mpu401_init(sb->mpu, 0, 0, M_UART, device_get_config_int("receive_input401")); + sb_dsp_set_mpu(&sb->dsp, sb->mpu); + + if (device_get_config_int("receive_input")) + midi_in_handler(1, sb_dsp_input_msg, sb_dsp_input_sysex, &sb->dsp); + + sb->gameport = gameport_add(&gameport_device); + + /* I/O handlers activated in sb_pro_mcv_write */ + mca_add(sb_16_reply_mca_read, sb_16_reply_mca_write, sb_mcv_feedb, NULL, sb); + sb->pos_regs[0] = 0x38; + sb->pos_regs[1] = 0x51; + + return sb; +} + static void * sb_16_pnp_init(const device_t *info) { @@ -3371,6 +3548,20 @@ const device_t sb_16_device = { .config = sb_16_config }; +const device_t sb_16_reply_mca_device = { + .name = "Sound Blaster 16 Reply MCA", + .internal_name = "sb16_reply_mca", + .flags = DEVICE_MCA, + .local = 0, + .init = sb_16_reply_mca_init, + .close = sb_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = sb_speed_changed, + .force_redraw = NULL, + .config = sb_16_pnp_config +}; + const device_t sb_16_pnp_device = { .name = "Sound Blaster 16 PnP", .internal_name = "sb16_pnp", diff --git a/src/sound/sound.c b/src/sound/sound.c index ec9e51f91..604dac38f 100644 --- a/src/sound/sound.c +++ b/src/sound/sound.c @@ -140,6 +140,7 @@ static const SOUND_CARD sound_cards[] = { { &ncr_business_audio_device }, { &sb_mcv_device }, { &sb_pro_mcv_device }, + { &sb_16_reply_mca_device }, { &cmi8338_device }, { &cmi8738_device }, { &es1371_device }, From 5292dcab322ba4e79fff12c0b8495559090fa232 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 24 Jul 2022 03:05:51 +0200 Subject: [PATCH 136/386] Warning fixes. --- src/cpu/x86_ops_misc.h | 4 ++-- src/sound/snd_sb.c | 3 +++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/src/cpu/x86_ops_misc.h b/src/cpu/x86_ops_misc.h index 50da6f2a0..7fde5dacc 100644 --- a/src/cpu/x86_ops_misc.h +++ b/src/cpu/x86_ops_misc.h @@ -259,7 +259,7 @@ static int opF6_a32(uint32_t fetchdat) static int opF7_w_a16(uint32_t fetchdat) { - uint32_t templ, templ2; + uint32_t templ, templ2 = 0; int tempws, tempws2 = 0; int16_t temps16; uint16_t src, dst; @@ -356,7 +356,7 @@ static int opF7_w_a16(uint32_t fetchdat) } static int opF7_w_a32(uint32_t fetchdat) { - uint32_t templ, templ2; + uint32_t templ, templ2 = 0; int tempws, tempws2 = 1; int16_t temps16; uint16_t src, dst; diff --git a/src/sound/snd_sb.c b/src/sound/snd_sb.c index 0a661f452..1038567fa 100644 --- a/src/sound/snd_sb.c +++ b/src/sound/snd_sb.c @@ -1235,6 +1235,7 @@ sb_16_reply_mca_write(int port, uint8_t val, void *p) addr = 0x280; break; case 0: + default: addr = 0; break; } @@ -1280,6 +1281,7 @@ sb_16_reply_mca_write(int port, uint8_t val, void *p) addr = 0x280; break; case 0: + default: addr = 0; break; } @@ -1291,6 +1293,7 @@ sb_16_reply_mca_write(int port, uint8_t val, void *p) mpu401_addr = 0x300; break; case 0: + default: mpu401_addr = 0; break; } From b13bb3a2631b5cd77abfb9fad2f65cf417402690 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 24 Jul 2022 03:37:37 +0200 Subject: [PATCH 137/386] QT now uses the old Windows dynamic loading code when on Windows. --- src/qt/qt_platform.cpp | 62 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/src/qt/qt_platform.cpp b/src/qt/qt_platform.cpp index 91f76d900..9fdb2754d 100644 --- a/src/qt/qt_platform.cpp +++ b/src/qt/qt_platform.cpp @@ -431,6 +431,67 @@ void plat_language_code_r(uint32_t lcid, char* outbuf, int len) { return; } +#ifdef Q_OS_WINDOWS +#ifdef ENABLE_DYNLD_LOG +int dynld_do_log = ENABLE_DYNLD_LOG; + + +static void +dynld_log(const char *fmt, ...) +{ + va_list ap; + + if (dynld_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +#define dynld_log(fmt, ...) +#endif + + +void * +dynld_module(const char *name, dllimp_t *table) +{ + HMODULE h; + dllimp_t *imp; + void *func; + + /* See if we can load the desired module. */ + if ((h = LoadLibrary(name)) == NULL) { + dynld_log("DynLd(\"%s\"): library not found! (%08X)\n", name, GetLastError()); + return(NULL); + } + + /* Now load the desired function pointers. */ + for (imp=table; imp->name!=NULL; imp++) { + func = (void *) GetProcAddress(h, imp->name); + if (func == NULL) { + dynld_log("DynLd(\"%s\"): function '%s' not found! (%08X)\n", + name, imp->name, GetLastError()); + FreeLibrary(h); + return(NULL); + } + + /* To overcome typing issues.. */ + *(char **)imp->func = (char *)func; + } + + /* All good. */ + dynld_log("loaded %s\n", name); + return((void *)h); +} + + +void +dynld_close(void *handle) +{ + if (handle != NULL) + FreeLibrary((HMODULE)handle); +} +#else void* dynld_module(const char *name, dllimp_t *table) { QString libraryName = name; @@ -462,6 +523,7 @@ void dynld_close(void *handle) { delete reinterpret_cast(handle); } +#endif void startblit() { From c793fd71428614f4f26dc4a3d4c36aa5895d2199 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 24 Jul 2022 03:54:47 +0200 Subject: [PATCH 138/386] Proper separation. --- src/qt/CMakeLists.txt | 1 + src/qt/qt_platform.cpp | 62 +----------------------------- src/qt/win_dynld.c | 87 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 89 insertions(+), 61 deletions(-) create mode 100644 src/qt/win_dynld.c diff --git a/src/qt/CMakeLists.txt b/src/qt/CMakeLists.txt index b9d0e40e9..0cb4560c4 100644 --- a/src/qt/CMakeLists.txt +++ b/src/qt/CMakeLists.txt @@ -178,6 +178,7 @@ endif() if(WIN32) enable_language(RC) target_sources(86Box PUBLIC ../win/86Box-qt.rc) + target_sources(plat PRIVATE win_dynld.c) target_sources(plat PRIVATE win_joystick_rawinput.c) target_sources(ui PRIVATE qt_d3d9renderer.hpp qt_d3d9renderer.cpp) target_link_libraries(86Box hid d3d9) diff --git a/src/qt/qt_platform.cpp b/src/qt/qt_platform.cpp index 9fdb2754d..eff022b3d 100644 --- a/src/qt/qt_platform.cpp +++ b/src/qt/qt_platform.cpp @@ -431,67 +431,7 @@ void plat_language_code_r(uint32_t lcid, char* outbuf, int len) { return; } -#ifdef Q_OS_WINDOWS -#ifdef ENABLE_DYNLD_LOG -int dynld_do_log = ENABLE_DYNLD_LOG; - - -static void -dynld_log(const char *fmt, ...) -{ - va_list ap; - - if (dynld_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } -} -#else -#define dynld_log(fmt, ...) -#endif - - -void * -dynld_module(const char *name, dllimp_t *table) -{ - HMODULE h; - dllimp_t *imp; - void *func; - - /* See if we can load the desired module. */ - if ((h = LoadLibrary(name)) == NULL) { - dynld_log("DynLd(\"%s\"): library not found! (%08X)\n", name, GetLastError()); - return(NULL); - } - - /* Now load the desired function pointers. */ - for (imp=table; imp->name!=NULL; imp++) { - func = (void *) GetProcAddress(h, imp->name); - if (func == NULL) { - dynld_log("DynLd(\"%s\"): function '%s' not found! (%08X)\n", - name, imp->name, GetLastError()); - FreeLibrary(h); - return(NULL); - } - - /* To overcome typing issues.. */ - *(char **)imp->func = (char *)func; - } - - /* All good. */ - dynld_log("loaded %s\n", name); - return((void *)h); -} - - -void -dynld_close(void *handle) -{ - if (handle != NULL) - FreeLibrary((HMODULE)handle); -} -#else +#ifndef Q_OS_WINDOWS void* dynld_module(const char *name, dllimp_t *table) { QString libraryName = name; diff --git a/src/qt/win_dynld.c b/src/qt/win_dynld.c new file mode 100644 index 000000000..98eb4739f --- /dev/null +++ b/src/qt/win_dynld.c @@ -0,0 +1,87 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Try to load a support DLL. + * + * + * + * Author: Fred N. van Kempen, + * + * Copyright 2017,2018 Fred N. van Kempen + */ +#include +#include +#include +#include +#include +#include +#include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include <86box/plat_dynld.h> + + +#ifdef ENABLE_DYNLD_LOG +int dynld_do_log = ENABLE_DYNLD_LOG; + + +static void +dynld_log(const char *fmt, ...) +{ + va_list ap; + + if (dynld_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +#define dynld_log(fmt, ...) +#endif + + +void * +dynld_module(const char *name, dllimp_t *table) +{ + HMODULE h; + dllimp_t *imp; + void *func; + + /* See if we can load the desired module. */ + if ((h = LoadLibrary(name)) == NULL) { + dynld_log("DynLd(\"%s\"): library not found! (%08X)\n", name, GetLastError()); + return(NULL); + } + + /* Now load the desired function pointers. */ + for (imp=table; imp->name!=NULL; imp++) { + func = GetProcAddress(h, imp->name); + if (func == NULL) { + dynld_log("DynLd(\"%s\"): function '%s' not found! (%08X)\n", + name, imp->name, GetLastError()); + FreeLibrary(h); + return(NULL); + } + + /* To overcome typing issues.. */ + *(char **)imp->func = (char *)func; + } + + /* All good. */ + dynld_log("loaded %s\n", name); + return((void *)h); +} + + +void +dynld_close(void *handle) +{ + if (handle != NULL) + FreeLibrary((HMODULE)handle); +} From 6f364f0395fc25e03905684fde0745ec0a26e108 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 24 Jul 2022 04:33:42 +0200 Subject: [PATCH 139/386] Fixed the entries for the DEC and Acer V10. --- src/machine/machine_table.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 2c4a3bba9..6ece57fdf 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -4721,7 +4721,7 @@ const machine_t machines[] = { .max_multi = 0 }, .bus_flags = MACHINE_PS2, - .flags = MACHINE_IDE_DUAL | MACHINE_VIDEO, + .flags = MACHINE_IDE_DUAL, /* No MACHINE_VIDEO yet, because on-board video is not yet implemented. */ .ram = { .min = 1024, .max = 32768, @@ -4756,7 +4756,7 @@ const machine_t machines[] = { .max_multi = 0 }, .bus_flags = MACHINE_PS2, - .flags = MACHINE_IDE_DUAL | MACHINE_VIDEO, + .flags = MACHINE_IDE_DUAL, .ram = { .min = 1024, .max = 32768, From af4c00d7088f7105a52a8715a1be60454ec8ebc8 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Sun, 24 Jul 2022 00:18:26 -0300 Subject: [PATCH 140/386] Jenkins: Skip redundant tasks within the same build --- .ci/build.sh | 257 ++++++++++++++++++++++++++++++--------------------- 1 file changed, 150 insertions(+), 107 deletions(-) diff --git a/.ci/build.sh b/.ci/build.sh index 278e252d8..4c47f775f 100644 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -220,6 +220,8 @@ esac # Perform platform-specific setup. strip_binary=strip +cache_dir="$HOME/86box-build-cache" +[ ! -d "$cache_dir" ] && mkdir -p "$cache_dir" if is_windows then # Switch into the correct MSYSTEM if required. @@ -244,105 +246,120 @@ then fi echo [-] Using MSYSTEM [$MSYSTEM] - # Update keyring, as the package signing keys sometimes change. - echo [-] Updating package databases and keyring - yes | pacman -Sy --needed msys2-keyring + # Install dependencies only if we're in a new build and/or architecture. + freetype_dll="$cache_dir/freetype.$MSYSTEM.dll" + buildtag_file="$cache_dir/buildtag.$MSYSTEM" + if [ -z "$BUILD_TAG" -o "$(cat "$buildtag_file" 2> /dev/null)" != "$BUILD_TAG" ] + then + # Update keyring, as the package signing keys sometimes change. + echo [-] Updating package databases and keyring + yes | pacman -Sy --needed msys2-keyring - # Query installed packages. - pacman -Qe > pacman.txt + # Query installed packages. + pacman -Qe > pacman.txt - # Download the specified versions of architecture-specific dependencies. - echo -n [-] Downloading dependencies: - pkg_dir="/var/cache/pacman/pkg" - repo_base="https://repo.msys2.org/mingw/$(echo $MSYSTEM | tr '[:upper:]' '[:lower:]')" - cat .ci/dependencies_msys.txt | tr -d '\r' > deps.txt - pkgs="" - while IFS=" " read pkg version - do - prefixed_pkg="$MINGW_PACKAGE_PREFIX-$pkg" - installed_version=$(grep -E "^$prefixed_pkg " pacman.txt | cut -d " " -f 2) - if [ "$installed_version" != "$version" ] # installed_version will be empty if not installed - then - echo -n " [$pkg" - - # Download package if not already present in the local cache. - pkg_tar="$prefixed_pkg-$version-any.pkg.tar" - if [ -s "$pkg_dir/$pkg_tar.xz" ] + # Download the specified versions of architecture-specific dependencies. + echo -n [-] Downloading dependencies: + pkg_dir="/var/cache/pacman/pkg" + repo_base="https://repo.msys2.org/mingw/$(echo $MSYSTEM | tr '[:upper:]' '[:lower:]')" + cat .ci/dependencies_msys.txt | tr -d '\r' > deps.txt + pkgs="" + while IFS=" " read pkg version + do + prefixed_pkg="$MINGW_PACKAGE_PREFIX-$pkg" + installed_version=$(grep -E "^$prefixed_pkg " pacman.txt | cut -d " " -f 2) + if [ "$installed_version" != "$version" ] # installed_version will be empty if not installed then - pkg_fn="$pkg_tar.xz" - pkg_dest="$pkg_dir/$pkg_fn" - else - pkg_fn="$pkg_tar.zst" - pkg_dest="$pkg_dir/$pkg_fn" - if [ ! -s "$pkg_dest" ] + echo -n " [$pkg" + + # Download package if not already present in the local cache. + pkg_tar="$prefixed_pkg-$version-any.pkg.tar" + if [ -s "$pkg_dir/$pkg_tar.xz" ] then - if ! wget -qO "$pkg_dest" "$repo_base/$pkg_fn" + pkg_fn="$pkg_tar.xz" + pkg_dest="$pkg_dir/$pkg_fn" + else + pkg_fn="$pkg_tar.zst" + pkg_dest="$pkg_dir/$pkg_fn" + if [ ! -s "$pkg_dest" ] then - rm -f "$pkg_dest" - pkg_fn="$pkg_tar.xz" - pkg_dest="$pkg_dir/$pkg_fn" - wget -qO "$pkg_dest" "$repo_base/$pkg_fn" || rm -f "$pkg_dest" - fi - if [ -s "$pkg_dest" ] - then - wget -qO "$pkg_dest.sig" "$repo_base/$pkg_fn.sig" || rm -f "$pkg_dest.sig" - [ ! -s "$pkg_dest.sig" ] && rm -f "$pkg_dest.sig" + if ! wget -qO "$pkg_dest" "$repo_base/$pkg_fn" + then + rm -f "$pkg_dest" + pkg_fn="$pkg_tar.xz" + pkg_dest="$pkg_dir/$pkg_fn" + wget -qO "$pkg_dest" "$repo_base/$pkg_fn" || rm -f "$pkg_dest" + fi + if [ -s "$pkg_dest" ] + then + wget -qO "$pkg_dest.sig" "$repo_base/$pkg_fn.sig" || rm -f "$pkg_dest.sig" + [ ! -s "$pkg_dest.sig" ] && rm -f "$pkg_dest.sig" + fi fi fi - fi - # Check if the cached package is valid. - if [ -s "$pkg_dest" ] + # Check if the cached package is valid. + if [ -s "$pkg_dest" ] + then + # Add cached zst package. + pkgs="$pkgs $pkg_fn" + else + # Not valid, remove if it exists. + rm -f "$pkg_dest" "$pkg_dest.sig" + echo -n " FAIL" + fi + echo -n "]" + fi + done < deps.txt + [ -z "$pkgs" ] && echo -n ' none required' + echo + + # Install the downloaded architecture-specific dependencies. + echo [-] Installing dependencies through pacman + if [ -n "$pkgs" ] + then + pushd "$pkg_dir" + yes | pacman -U --needed $pkgs + if [ $? -ne 0 ] then - # Add cached zst package. - pkgs="$pkgs $pkg_fn" - else - # Not valid, remove if it exists. - rm -f "$pkg_dest" "$pkg_dest.sig" - echo -n " FAIL" + # Install packages individually if installing them all together failed. + for pkg in $pkgs + do + yes | pacman -U --needed "$pkg" + done fi - echo -n "]" - fi - done < deps.txt - [ -z "$pkgs" ] && echo -n ' none required' - echo + popd - # Install the downloaded architecture-specific dependencies. - echo [-] Installing dependencies through pacman - if [ -n "$pkgs" ] - then - pushd "$pkg_dir" - yes | pacman -U --needed $pkgs + # Query installed packages again. + pacman -Qe > pacman.txt + fi + + # Install the latest versions for any missing packages (if the specified version couldn't be installed). + pkgs="git" + while IFS=" " read pkg version + do + prefixed_pkg="$MINGW_PACKAGE_PREFIX-$pkg" + grep -qE "^$prefixed_pkg " pacman.txt || pkgs="$pkgs $prefixed_pkg" + done < deps.txt + rm -f pacman.txt deps.txt + yes | pacman -S --needed $pkgs if [ $? -ne 0 ] then # Install packages individually if installing them all together failed. for pkg in $pkgs do - yes | pacman -U --needed "$pkg" + yes | pacman -S --needed "$pkg" done fi - popd - # Query installed packages again. - pacman -Qe > pacman.txt - fi + # Generate a new freetype DLL for this architecture. + rm -f "$freetype_dll" - # Install the latest versions for any missing packages (if the specified version couldn't be installed). - pkgs="git" - while IFS=" " read pkg version - do - prefixed_pkg="$MINGW_PACKAGE_PREFIX-$pkg" - grep -qE "^$prefixed_pkg " pacman.txt || pkgs="$pkgs $prefixed_pkg" - done < deps.txt - rm -f pacman.txt deps.txt - yes | pacman -S --needed $pkgs - if [ $? -ne 0 ] - then - # Install packages individually if installing them all together failed. - for pkg in $pkgs - do - yes | pacman -S --needed "$pkg" - done + # Save build tag to skip this later. Doing it here (once everything is + # in place) is important to avoid potential issues with retried builds. + echo "$BUILD_TAG" > "$buildtag_file" + else + echo [-] Not installing dependencies again fi # Point CMake to the toolchain file. @@ -352,7 +369,7 @@ then # macOS lacks nproc, but sysctl can do the same job. alias nproc='sysctl -n hw.logicalcpu' - # Handle universal build. + # Handle universal building. if echo "$arch" | grep -q '+' then # Create temporary directory for merging app bundles. @@ -526,10 +543,22 @@ then [ "$arch" = "x86_64" -a -e "/opt/intel/bin/port" ] && macports="/opt/intel" export PATH="$macports/bin:$macports/sbin:$macports/libexec/qt5/bin:$PATH" - # Install dependencies. - echo [-] Installing dependencies through MacPorts - sudo "$macports/bin/port" selfupdate - sudo "$macports/bin/port" install $(cat .ci/dependencies_macports.txt) + # Install dependencies only if we're in a new build and/or architecture. + buildtag_file="$cache_dir/buildtag.$(arch)" + if [ -z "$BUILD_TAG" -o "$(cat "$buildtag_file" 2> /dev/null)" != "$BUILD_TAG" ] + then + # Install dependencies. + echo [-] Installing dependencies through MacPorts + sudo "$macports/bin/port" selfupdate + sudo "$macports/bin/port" install $(cat .ci/dependencies_macports.txt) + + # Save build tag to skip this later. Doing it here (once everything is + # in place) is important to avoid potential issues with retried builds. + echo "$BUILD_TAG" > "$buildtag_file" + else + echo [-] Not installing dependencies again + + fi # Point CMake to the toolchain file. [ -e "cmake/$toolchain.cmake" ] && cmake_flags_extra="$cmake_flags_extra -D \"CMAKE_TOOLCHAIN_FILE=cmake/$toolchain.cmake\"" @@ -606,11 +635,22 @@ EOF cmake_flags_extra="$cmake_flags_extra -D CMAKE_TOOLCHAIN_FILE=toolchain.cmake" strip_binary="$arch_triplet-strip" - # Install or update dependencies. - echo [-] Installing dependencies through apt - sudo apt-get update - DEBIAN_FRONTEND=noninteractive sudo apt-get -y install $pkgs $libpkgs - sudo apt-get clean + # Install dependencies only if we're in a new build and/or architecture. + buildtag_file="$cache_dir/buildtag.$arch_deb" + if [ -z "$BUILD_TAG" -o "$(cat "$buildtag_file" 2> /dev/null)" != "$BUILD_TAG" ] + then + # Install or update dependencies. + echo [-] Installing dependencies through apt + sudo apt-get update + DEBIAN_FRONTEND=noninteractive sudo apt-get -y install $pkgs $libpkgs + sudo apt-get clean + + # Save build tag to skip this later. Doing it here (once everything is + # in place) is important to avoid potential issues with retried builds. + echo "$BUILD_TAG" > "$buildtag_file" + else + echo [-] Not installing dependencies again + fi # Link against the system libslirp instead of compiling ours. cmake_flags_extra="$cmake_flags_extra -D SLIRP_EXTERNAL=ON" @@ -618,12 +658,7 @@ fi # Clean workspace. echo [-] Cleaning workspace -if [ -d "build" ] -then - cmake --build build -j$(nproc) --target clean 2> /dev/null - rm -rf build -fi -find . \( -name Makefile -o -name CMakeCache.txt -o -name CMakeFiles \) -exec rm -rf "{}" \; 2> /dev/null +[ -d "build" ] && rm -rf build # Add ARCH to skip the arch_detect process. case $arch in @@ -671,17 +706,26 @@ then exit 4 fi -# Download Discord Game SDK from their CDN if necessary. -if [ ! -e "discord_game_sdk.zip" ] +# Download Discord Game SDK from their CDN if we're in a new build. +discord_zip="$cache_dir/discord_game_sdk.zip" +buildtag_file="$cache_dir/buildtag.any" +if [ -z "$BUILD_TAG" -o "$(cat "$buildtag_file" 2> /dev/null)" != "$BUILD_TAG" ] then + # Download file. echo [-] Downloading Discord Game SDK - wget -qO discord_game_sdk.zip "https://dl-game-sdk.discordapp.net/latest/discord_game_sdk.zip" + wget -qO "$discord_zip" "https://dl-game-sdk.discordapp.net/latest/discord_game_sdk.zip" status=$? if [ $status -ne 0 ] then echo [!] Discord Game SDK download failed with status [$status] - rm -f discord_game_sdk.zip + rm -f "$discord_zip" + else + # Save build tag to skip this later. Doing it here (once everything is + # in place) is important to avoid potential issues with retried builds. + echo "$BUILD_TAG" > "$buildtag_file" fi +else + echo [-] Not downloading Discord Game SDK again fi # Determine Discord Game SDK architecture. @@ -713,8 +757,9 @@ then sevenzip="$pf/7-Zip/7z.exe" [ "$arch" = "32" -a -d "/c/Program Files (x86)" ] && pf="/c/Program Files (x86)" - # Archive freetype from local MSYS installation. - .ci/static2dll.sh -p freetype2 /$MSYSTEM/lib/libfreetype.a archive_tmp/freetype.dll + # Archive freetype from cache or generate it from local MSYS installation. + [ ! -e "$freetype_dll" ] && .ci/static2dll.sh -p freetype2 /$MSYSTEM/lib/libfreetype.a "$freetype_dll" + cp -p "$freetype_dll" archive_tmp/freetype.dll # Archive Ghostscript DLL from local official distribution installation. for gs in "$pf"/gs/gs*.*.* @@ -723,7 +768,7 @@ then done # Archive Discord Game SDK DLL. - "$sevenzip" e -y -o"archive_tmp" discord_game_sdk.zip "lib/$arch_discord/discord_game_sdk.dll" + "$sevenzip" e -y -o"archive_tmp" "$discord_zip" "lib/$arch_discord/discord_game_sdk.dll" [ ! -e "archive_tmp/discord_game_sdk.dll" ] && echo [!] No Discord Game SDK for architecture [$arch_discord] # Archive other DLLs from local directory. @@ -749,16 +794,14 @@ then if [ $status -eq 0 ] then # Archive Discord Game SDK library. - unzip -j discord_game_sdk.zip "lib/$arch_discord/discord_game_sdk.dylib" -d "archive_tmp/"*".app/Contents/Frameworks" + unzip -j "$discord_zip" "lib/$arch_discord/discord_game_sdk.dylib" -d "archive_tmp/"*".app/Contents/Frameworks" [ ! -e "archive_tmp/"*".app/Contents/Frameworks/discord_game_sdk.dylib" ] && echo [!] No Discord Game SDK for architecture [$arch_discord] # Sign app bundle, unless we're in an universal build. [ $skip_archive -eq 0 ] && codesign --force --deep -s - "archive_tmp/"*".app" fi else - cwd_root=$(pwd) - cache_dir="$HOME/86box-build-cache" - [ ! -d "$cache_dir" ] && mkdir -p "$cache_dir" + cwd_root="$(pwd)" if grep -q "OPENAL:BOOL=ON" build/CMakeCache.txt then @@ -842,7 +885,7 @@ else cmake --install "$cache_dir/sdlbuild" || exit 99 # Archive Discord Game SDK library. - 7z e -y -o"archive_tmp/usr/lib" discord_game_sdk.zip "lib/$arch_discord/discord_game_sdk.so" + 7z e -y -o"archive_tmp/usr/lib" "$discord_zip" "lib/$arch_discord/discord_game_sdk.so" [ ! -e "archive_tmp/usr/lib/discord_game_sdk.so" ] && echo [!] No Discord Game SDK for architecture [$arch_discord] # Archive readme with library package versions. From 8ceb5bf08146ed30a54c708ba144562a249f0827 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 24 Jul 2022 05:40:06 +0200 Subject: [PATCH 141/386] ROM, WD76C10, and Paradise fixes. --- src/chipset/wd76c10.c | 2 - src/mem/rom.c | 4 +- src/video/vid_paradise.c | 127 +++++++++++++++++++++------------------ 3 files changed, 71 insertions(+), 62 deletions(-) diff --git a/src/chipset/wd76c10.c b/src/chipset/wd76c10.c index 138349955..12b7e19a0 100644 --- a/src/chipset/wd76c10.c +++ b/src/chipset/wd76c10.c @@ -45,8 +45,6 @@ #define LOCK dev->lock #define UNLOCKED !dev->lock -#define ENABLE_WD76C10_LOG 1 - #ifdef ENABLE_WD76C10_LOG int wd76c10_do_log = ENABLE_WD76C10_LOG; static void diff --git a/src/mem/rom.c b/src/mem/rom.c index eb2b5791b..debdf5c39 100644 --- a/src/mem/rom.c +++ b/src/mem/rom.c @@ -646,7 +646,7 @@ rom_init_oddeven(rom_t *rom, char *fn, uint32_t addr, int sz, int mask, int off, addr, sz, rom_read, rom_readw, rom_readl, NULL, NULL, NULL, - rom->rom, flags | MEM_MAPPING_ROM, rom); + rom->rom, flags | MEM_MAPPING_ROM_WS, rom); return(0); } @@ -674,7 +674,7 @@ rom_init_interleaved(rom_t *rom, char *fnl, char *fnh, uint32_t addr, int sz, in addr, sz, rom_read, rom_readw, rom_readl, NULL, NULL, NULL, - rom->rom, flags | MEM_MAPPING_ROM, rom); + rom->rom, flags | MEM_MAPPING_ROM_WS, rom); return(0); } diff --git a/src/video/vid_paradise.c b/src/video/vid_paradise.c index 59b9f2247..3ca44746c 100644 --- a/src/video/vid_paradise.c +++ b/src/video/vid_paradise.c @@ -77,6 +77,64 @@ static video_timings_t timing_paradise_wd90c = {VIDEO_ISA, 3, 3, 6, 5, 5, 1 void paradise_remap(paradise_t *paradise); +uint8_t paradise_in(uint16_t addr, void *p) +{ + paradise_t *paradise = (paradise_t *)p; + svga_t *svga = ¶dise->svga; + + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; + + switch (addr) + { + case 0x3c5: + if (svga->seqaddr > 7) + { + if (paradise->type < WD90C11 || svga->seqregs[6] != 0x48) + return 0xff; + if (svga->seqaddr > 0x12) + return 0xff; + return svga->seqregs[svga->seqaddr & 0x1f]; + } + break; + + case 0x3c6: case 0x3c7: case 0x3c8: case 0x3c9: + if (paradise->type == WD90C30) + return sc1148x_ramdac_in(addr, 0, svga->ramdac, svga); + return svga_in(addr, svga); + + case 0x3cf: + if (svga->gdcaddr >= 9 && svga->gdcaddr <= 0x0e) { + if (svga->gdcreg[0x0f] & 0x10) + return 0xff; + } + switch (svga->gdcaddr) { + case 0x0b: + if (paradise->type == WD90C30) { + if (paradise->vram_mask == ((512 << 10) - 1)) { + svga->gdcreg[0x0b] |= 0xc0; + svga->gdcreg[0x0b] &= ~0x40; + } + } + return svga->gdcreg[0x0b]; + + case 0x0f: + return (svga->gdcreg[0x0f] & 0x17) | 0x80; + } + break; + + case 0x3D4: + return svga->crtcreg; + case 0x3D5: + if ((paradise->type == PVGA1A) && (svga->crtcreg & 0x20)) + return 0xff; + if (svga->crtcreg > 0x29 && svga->crtcreg < 0x30 && (svga->crtc[0x29] & 0x88) != 0x80) + return 0xff; + return svga->crtc[svga->crtcreg]; + } + return svga_in(addr, svga); +} + void paradise_out(uint16_t addr, uint8_t val, void *p) { paradise_t *paradise = (paradise_t *)p; @@ -187,69 +245,21 @@ void paradise_out(uint16_t addr, uint8_t val, void *p) } } break; + + case 0x46e8: + io_removehandler(0x03c0, 0x0020, paradise_in, NULL, NULL, paradise_out, NULL, NULL, paradise); + mem_mapping_disable(¶dise->svga.mapping); + if (val & 8) + { + io_sethandler(0x03c0, 0x0020, paradise_in, NULL, NULL, paradise_out, NULL, NULL, paradise); + mem_mapping_enable(¶dise->svga.mapping); + } + break; } svga_out(addr, val, svga); } -uint8_t paradise_in(uint16_t addr, void *p) -{ - paradise_t *paradise = (paradise_t *)p; - svga_t *svga = ¶dise->svga; - - if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; - - switch (addr) - { - case 0x3c5: - if (svga->seqaddr > 7) - { - if (paradise->type < WD90C11 || svga->seqregs[6] != 0x48) - return 0xff; - if (svga->seqaddr > 0x12) - return 0xff; - return svga->seqregs[svga->seqaddr & 0x1f]; - } - break; - - case 0x3c6: case 0x3c7: case 0x3c8: case 0x3c9: - if (paradise->type == WD90C30) - return sc1148x_ramdac_in(addr, 0, svga->ramdac, svga); - return svga_in(addr, svga); - - case 0x3cf: - if (svga->gdcaddr >= 9 && svga->gdcaddr <= 0x0e) { - if (svga->gdcreg[0x0f] & 0x10) - return 0xff; - } - switch (svga->gdcaddr) { - case 0x0b: - if (paradise->type == WD90C30) { - if (paradise->vram_mask == ((512 << 10) - 1)) { - svga->gdcreg[0x0b] |= 0xc0; - svga->gdcreg[0x0b] &= ~0x40; - } - } - return svga->gdcreg[0x0b]; - - case 0x0f: - return (svga->gdcreg[0x0f] & 0x17) | 0x80; - } - break; - - case 0x3D4: - return svga->crtcreg; - case 0x3D5: - if ((paradise->type == PVGA1A) && (svga->crtcreg & 0x20)) - return 0xff; - if (svga->crtcreg > 0x29 && svga->crtcreg < 0x30 && (svga->crtc[0x29] & 0x88) != 0x80) - return 0xff; - return svga->crtc[svga->crtcreg]; - } - return svga_in(addr, svga); -} - void paradise_remap(paradise_t *paradise) { svga_t *svga = ¶dise->svga; @@ -579,6 +589,7 @@ void *paradise_init(const device_t *info, uint32_t memsize) case WD90C11: svga->crtc[0x36] = '1'; svga->crtc[0x37] = '1'; + io_sethandler(0x46e8, 0x0001, paradise_in, NULL, NULL, paradise_out, NULL, NULL, paradise); break; case WD90C30: svga->crtc[0x36] = '3'; From 85df0bf9a7509935e6c3fc9467e4f25b77265bde Mon Sep 17 00:00:00 2001 From: richardg867 Date: Sun, 24 Jul 2022 00:49:10 -0300 Subject: [PATCH 142/386] Jenkins: More build speed optimizations on the Linux side --- .ci/build.sh | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/.ci/build.sh b/.ci/build.sh index 4c47f775f..594de8818 100644 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -572,12 +572,21 @@ else esac # Establish general dependencies. + buildtag_aptupdate_file="$cache_dir/buildtag.aptupdate" pkgs="cmake ninja-build pkg-config git wget p7zip-full wayland-protocols tar gzip file appstream" if [ "$(dpkg --print-architecture)" = "$arch_deb" ] then pkgs="$pkgs build-essential" else - sudo dpkg --add-architecture "$arch_deb" + # Add foreign architecture if required. + if ! dpkg --print-foreign-architectures | grep -qE '^'"$arch_deb"'$' + then + sudo dpkg --add-architecture "$arch_deb" + + # Force an apt-get update. + rm -f "$buildtag_aptupdate_file" + fi + pkgs="$pkgs crossbuild-essential-$arch_deb" fi @@ -641,7 +650,14 @@ EOF then # Install or update dependencies. echo [-] Installing dependencies through apt - sudo apt-get update + if [ -z "$BUILD_TAG" -o "$(cat "$buildtag_aptupdate_file" 2> /dev/null)" != "$BUILD_TAG" ] + then + sudo apt-get update + + # Save build tag to skip apt-get update later, unless a new architecture + # is added to dpkg, in which case, this saved tag file gets removed. + echo "$BUILD_TAG" > "$buildtag_aptupdate_file" + fi DEBIAN_FRONTEND=noninteractive sudo apt-get -y install $pkgs $libpkgs sudo apt-get clean @@ -658,7 +674,7 @@ fi # Clean workspace. echo [-] Cleaning workspace -[ -d "build" ] && rm -rf build +rm -rf build # Add ARCH to skip the arch_detect process. case $arch in From 99f3cf8781ce4b6093dde6d22501649591b5b7e6 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sun, 24 Jul 2022 10:01:36 +0200 Subject: [PATCH 143/386] Switch to C++ 14 to support ymfm --- CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index f9e856faf..561e1eeda 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -118,7 +118,7 @@ if(WIN32) endif() set(CMAKE_C_STANDARD 11) -set(CMAKE_CXX_STANDARD 11) +set(CMAKE_CXX_STANDARD 14) set(CMAKE_FIND_PACKAGE_PREFER_CONFIG ON) # Optional features From b10cd69dca6b8725bfbdedee769a9389d95a4323 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sun, 24 Jul 2022 10:09:12 +0200 Subject: [PATCH 144/386] Add ymfm library --- src/sound/ymfm/CMakeLists.txt | 1 + src/sound/ymfm/ymfm.h | 570 ++++++++ src/sound/ymfm/ymfm_adpcm.cpp | 807 +++++++++++ src/sound/ymfm/ymfm_adpcm.h | 411 ++++++ src/sound/ymfm/ymfm_fm.h | 463 ++++++ src/sound/ymfm/ymfm_fm.ipp | 1589 +++++++++++++++++++++ src/sound/ymfm/ymfm_misc.cpp | 175 +++ src/sound/ymfm/ymfm_misc.h | 93 ++ src/sound/ymfm/ymfm_opl.cpp | 2209 +++++++++++++++++++++++++++++ src/sound/ymfm/ymfm_opl.h | 902 ++++++++++++ src/sound/ymfm/ymfm_opm.cpp | 539 +++++++ src/sound/ymfm/ymfm_opm.h | 322 +++++ src/sound/ymfm/ymfm_opn.cpp | 2488 +++++++++++++++++++++++++++++++++ src/sound/ymfm/ymfm_opn.h | 802 +++++++++++ src/sound/ymfm/ymfm_opq.cpp | 480 +++++++ src/sound/ymfm/ymfm_opq.h | 293 ++++ src/sound/ymfm/ymfm_opx.h | 290 ++++ src/sound/ymfm/ymfm_opz.cpp | 808 +++++++++++ src/sound/ymfm/ymfm_opz.h | 332 +++++ src/sound/ymfm/ymfm_pcm.cpp | 715 ++++++++++ src/sound/ymfm/ymfm_pcm.h | 347 +++++ src/sound/ymfm/ymfm_ssg.cpp | 279 ++++ src/sound/ymfm/ymfm_ssg.h | 205 +++ 23 files changed, 15120 insertions(+) create mode 100644 src/sound/ymfm/CMakeLists.txt create mode 100644 src/sound/ymfm/ymfm.h create mode 100644 src/sound/ymfm/ymfm_adpcm.cpp create mode 100644 src/sound/ymfm/ymfm_adpcm.h create mode 100644 src/sound/ymfm/ymfm_fm.h create mode 100644 src/sound/ymfm/ymfm_fm.ipp create mode 100644 src/sound/ymfm/ymfm_misc.cpp create mode 100644 src/sound/ymfm/ymfm_misc.h create mode 100644 src/sound/ymfm/ymfm_opl.cpp create mode 100644 src/sound/ymfm/ymfm_opl.h create mode 100644 src/sound/ymfm/ymfm_opm.cpp create mode 100644 src/sound/ymfm/ymfm_opm.h create mode 100644 src/sound/ymfm/ymfm_opn.cpp create mode 100644 src/sound/ymfm/ymfm_opn.h create mode 100644 src/sound/ymfm/ymfm_opq.cpp create mode 100644 src/sound/ymfm/ymfm_opq.h create mode 100644 src/sound/ymfm/ymfm_opx.h create mode 100644 src/sound/ymfm/ymfm_opz.cpp create mode 100644 src/sound/ymfm/ymfm_opz.h create mode 100644 src/sound/ymfm/ymfm_pcm.cpp create mode 100644 src/sound/ymfm/ymfm_pcm.h create mode 100644 src/sound/ymfm/ymfm_ssg.cpp create mode 100644 src/sound/ymfm/ymfm_ssg.h diff --git a/src/sound/ymfm/CMakeLists.txt b/src/sound/ymfm/CMakeLists.txt new file mode 100644 index 000000000..da02f8132 --- /dev/null +++ b/src/sound/ymfm/CMakeLists.txt @@ -0,0 +1 @@ +add_library(ymfm STATIC ymfm_opl.cpp) \ No newline at end of file diff --git a/src/sound/ymfm/ymfm.h b/src/sound/ymfm/ymfm.h new file mode 100644 index 000000000..b983379b5 --- /dev/null +++ b/src/sound/ymfm/ymfm.h @@ -0,0 +1,570 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#ifndef YMFM_H +#define YMFM_H + +#pragma once + +#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_WARNINGS) + #define _CRT_SECURE_NO_WARNINGS +#endif + +#include +#include +#include +#include +#include +#include +#include + +namespace ymfm +{ + +//********************************************************* +// DEBUGGING +//********************************************************* + +class debug +{ +public: + // masks to help isolate specific channels + static constexpr uint32_t GLOBAL_FM_CHANNEL_MASK = 0xffffffff; + static constexpr uint32_t GLOBAL_ADPCM_A_CHANNEL_MASK = 0xffffffff; + static constexpr uint32_t GLOBAL_ADPCM_B_CHANNEL_MASK = 0xffffffff; + static constexpr uint32_t GLOBAL_PCM_CHANNEL_MASK = 0xffffffff; + + // types of logging + static constexpr bool LOG_FM_WRITES = false; + static constexpr bool LOG_KEYON_EVENTS = false; + static constexpr bool LOG_UNEXPECTED_READ_WRITES = false; + + // helpers to write based on the log type + template static void log_fm_write(Params &&... args) { if (LOG_FM_WRITES) log(args...); } + template static void log_keyon(Params &&... args) { if (LOG_KEYON_EVENTS) log(args...); } + template static void log_unexpected_read_write(Params &&... args) { if (LOG_UNEXPECTED_READ_WRITES) log(args...); } + + // downstream helper to output log data; defaults to printf + template static void log(Params &&... args) { printf(args...); } +}; + + + +//********************************************************* +// GLOBAL HELPERS +//********************************************************* + +//------------------------------------------------- +// bitfield - extract a bitfield from the given +// value, starting at bit 'start' for a length of +// 'length' bits +//------------------------------------------------- + +inline uint32_t bitfield(uint32_t value, int start, int length = 1) +{ + return (value >> start) & ((1 << length) - 1); +} + + +//------------------------------------------------- +// clamp - clamp between the minimum and maximum +// values provided +//------------------------------------------------- + +inline int32_t clamp(int32_t value, int32_t minval, int32_t maxval) +{ + if (value < minval) + return minval; + if (value > maxval) + return maxval; + return value; +} + + +//------------------------------------------------- +// array_size - return the size of an array +//------------------------------------------------- + +template +constexpr uint32_t array_size(ArrayType (&array)[ArraySize]) +{ + return ArraySize; +} + + +//------------------------------------------------- +// count_leading_zeros - return the number of +// leading zeros in a 32-bit value; CPU-optimized +// versions for various architectures are included +// below +//------------------------------------------------- + +#if defined(__GNUC__) + +inline uint8_t count_leading_zeros(uint32_t value) +{ + if (value == 0) + return 32; + return __builtin_clz(value); +} + +#elif defined(_MSC_VER) + +inline uint8_t count_leading_zeros(uint32_t value) +{ + unsigned long index; + return _BitScanReverse(&index, value) ? uint8_t(31U - index) : 32U; +} + +#else + +inline uint8_t count_leading_zeros(uint32_t value) +{ + if (value == 0) + return 32; + uint8_t count; + for (count = 0; int32_t(value) >= 0; count++) + value <<= 1; + return count; +} + +#endif + + +// Many of the Yamaha FM chips emit a floating-point value, which is sent to +// a DAC for processing. The exact format of this floating-point value is +// documented below. This description only makes sense if the "internal" +// format treats sign as 1=positive and 0=negative, so the helpers below +// presume that. +// +// Internal OPx data 16-bit signed data Exp Sign Mantissa +// ================= ================= === ==== ======== +// 1 1xxxxxxxx------ -> 0 1xxxxxxxx------ -> 111 1 1xxxxxxx +// 1 01xxxxxxxx----- -> 0 01xxxxxxxx----- -> 110 1 1xxxxxxx +// 1 001xxxxxxxx---- -> 0 001xxxxxxxx---- -> 101 1 1xxxxxxx +// 1 0001xxxxxxxx--- -> 0 0001xxxxxxxx--- -> 100 1 1xxxxxxx +// 1 00001xxxxxxxx-- -> 0 00001xxxxxxxx-- -> 011 1 1xxxxxxx +// 1 000001xxxxxxxx- -> 0 000001xxxxxxxx- -> 010 1 1xxxxxxx +// 1 000000xxxxxxxxx -> 0 000000xxxxxxxxx -> 001 1 xxxxxxxx +// 0 111111xxxxxxxxx -> 1 111111xxxxxxxxx -> 001 0 xxxxxxxx +// 0 111110xxxxxxxx- -> 1 111110xxxxxxxx- -> 010 0 0xxxxxxx +// 0 11110xxxxxxxx-- -> 1 11110xxxxxxxx-- -> 011 0 0xxxxxxx +// 0 1110xxxxxxxx--- -> 1 1110xxxxxxxx--- -> 100 0 0xxxxxxx +// 0 110xxxxxxxx---- -> 1 110xxxxxxxx---- -> 101 0 0xxxxxxx +// 0 10xxxxxxxx----- -> 1 10xxxxxxxx----- -> 110 0 0xxxxxxx +// 0 0xxxxxxxx------ -> 1 0xxxxxxxx------ -> 111 0 0xxxxxxx + +//------------------------------------------------- +// encode_fp - given a 32-bit signed input value +// convert it to a signed 3.10 floating-point +// value +//------------------------------------------------- + +inline int16_t encode_fp(int32_t value) +{ + // handle overflows first + if (value < -32768) + return (7 << 10) | 0x000; + if (value > 32767) + return (7 << 10) | 0x3ff; + + // we need to count the number of leading sign bits after the sign + // we can use count_leading_zeros if we invert negative values + int32_t scanvalue = value ^ (int32_t(value) >> 31); + + // exponent is related to the number of leading bits starting from bit 14 + int exponent = 7 - count_leading_zeros(scanvalue << 17); + + // smallest exponent value allowed is 1 + exponent = std::max(exponent, 1); + + // mantissa + int32_t mantissa = value >> (exponent - 1); + + // assemble into final form, inverting the sign + return ((exponent << 10) | (mantissa & 0x3ff)) ^ 0x200; +} + + +//------------------------------------------------- +// decode_fp - given a 3.10 floating-point value, +// convert it to a signed 16-bit value +//------------------------------------------------- + +inline int16_t decode_fp(int16_t value) +{ + // invert the sign and the exponent + value ^= 0x1e00; + + // shift mantissa up to 16 bits then apply inverted exponent + return int16_t(value << 6) >> bitfield(value, 10, 3); +} + + +//------------------------------------------------- +// roundtrip_fp - compute the result of a round +// trip through the encode/decode process above +//------------------------------------------------- + +inline int16_t roundtrip_fp(int32_t value) +{ + // handle overflows first + if (value < -32768) + return -32768; + if (value > 32767) + return 32767; + + // we need to count the number of leading sign bits after the sign + // we can use count_leading_zeros if we invert negative values + int32_t scanvalue = value ^ (int32_t(value) >> 31); + + // exponent is related to the number of leading bits starting from bit 14 + int exponent = 7 - count_leading_zeros(scanvalue << 17); + + // smallest exponent value allowed is 1 + exponent = std::max(exponent, 1); + + // apply the shift back and forth to zero out bits that are lost + exponent -= 1; + return (value >> exponent) << exponent; +} + + + +//********************************************************* +// HELPER CLASSES +//********************************************************* + +// various envelope states +enum envelope_state : uint32_t +{ + EG_DEPRESS = 0, // OPLL only; set EG_HAS_DEPRESS to enable + EG_ATTACK = 1, + EG_DECAY = 2, + EG_SUSTAIN = 3, + EG_RELEASE = 4, + EG_REVERB = 5, // OPQ/OPZ only; set EG_HAS_REVERB to enable + EG_STATES = 6 +}; + +// external I/O access classes +enum access_class : uint32_t +{ + ACCESS_IO = 0, + ACCESS_ADPCM_A, + ACCESS_ADPCM_B, + ACCESS_PCM, + ACCESS_CLASSES +}; + + + +//********************************************************* +// HELPER CLASSES +//********************************************************* + +// ======================> ymfm_output + +// struct containing an array of output values +template +struct ymfm_output +{ + // clear all outputs to 0 + ymfm_output &clear() + { + for (uint32_t index = 0; index < NumOutputs; index++) + data[index] = 0; + return *this; + } + + // clamp all outputs to a 16-bit signed value + ymfm_output &clamp16() + { + for (uint32_t index = 0; index < NumOutputs; index++) + data[index] = clamp(data[index], -32768, 32767); + return *this; + } + + // run each output value through the floating-point processor + ymfm_output &roundtrip_fp() + { + for (uint32_t index = 0; index < NumOutputs; index++) + data[index] = ymfm::roundtrip_fp(data[index]); + return *this; + } + + // internal state + int32_t data[NumOutputs]; +}; + + +// ======================> ymfm_wavfile + +// this class is a debugging helper that accumulates data and writes it to wav files +template +class ymfm_wavfile +{ +public: + // construction + ymfm_wavfile(uint32_t samplerate = 44100) : + m_samplerate(samplerate) + { + } + + // configuration + ymfm_wavfile &set_index(uint32_t index) { m_index = index; return *this; } + ymfm_wavfile &set_samplerate(uint32_t samplerate) { m_samplerate = samplerate; return *this; } + + // destruction + ~ymfm_wavfile() + { + if (!m_buffer.empty()) + { + // create file + char name[20]; + sprintf(name, "wavlog-%02d.wav", m_index); + FILE *out = fopen(name, "wb"); + + // make the wav file header + uint8_t header[44]; + memcpy(&header[0], "RIFF", 4); + *(uint32_t *)&header[4] = m_buffer.size() * 2 + 44 - 8; + memcpy(&header[8], "WAVE", 4); + memcpy(&header[12], "fmt ", 4); + *(uint32_t *)&header[16] = 16; + *(uint16_t *)&header[20] = 1; + *(uint16_t *)&header[22] = _Channels; + *(uint32_t *)&header[24] = m_samplerate; + *(uint32_t *)&header[28] = m_samplerate * 2 * _Channels; + *(uint16_t *)&header[32] = 2 * _Channels; + *(uint16_t *)&header[34] = 16; + memcpy(&header[36], "data", 4); + *(uint32_t *)&header[40] = m_buffer.size() * 2 + 44 - 44; + + // write header then data + fwrite(&header[0], 1, sizeof(header), out); + fwrite(&m_buffer[0], 2, m_buffer.size(), out); + fclose(out); + } + } + + // add data to the file + template + void add(ymfm_output<_Outputs> output) + { + int16_t sum[_Channels] = { 0 }; + for (int index = 0; index < _Outputs; index++) + sum[index % _Channels] += output.data[index]; + for (int index = 0; index < _Channels; index++) + m_buffer.push_back(sum[index]); + } + + // add data to the file, using a reference + template + void add(ymfm_output<_Outputs> output, ymfm_output<_Outputs> const &ref) + { + int16_t sum[_Channels] = { 0 }; + for (int index = 0; index < _Outputs; index++) + sum[index % _Channels] += output.data[index] - ref.data[index]; + for (int index = 0; index < _Channels; index++) + m_buffer.push_back(sum[index]); + } + +private: + // internal state + uint32_t m_index; + uint32_t m_samplerate; + std::vector m_buffer; +}; + + +// ======================> ymfm_saved_state + +// this class contains a managed vector of bytes that is used to save and +// restore state +class ymfm_saved_state +{ +public: + // construction + ymfm_saved_state(std::vector &buffer, bool saving) : + m_buffer(buffer), + m_offset(saving ? -1 : 0) + { + if (saving) + buffer.resize(0); + } + + // are we saving or restoring? + bool saving() const { return (m_offset < 0); } + + // generic save/restore + template + void save_restore(DataType &data) + { + if (saving()) + save(data); + else + restore(data); + } + +public: + // save data to the buffer + void save(bool &data) { write(data ? 1 : 0); } + void save(int8_t &data) { write(data); } + void save(uint8_t &data) { write(data); } + void save(int16_t &data) { write(uint8_t(data)).write(data >> 8); } + void save(uint16_t &data) { write(uint8_t(data)).write(data >> 8); } + void save(int32_t &data) { write(data).write(data >> 8).write(data >> 16).write(data >> 24); } + void save(uint32_t &data) { write(data).write(data >> 8).write(data >> 16).write(data >> 24); } + void save(envelope_state &data) { write(uint8_t(data)); } + template + void save(DataType (&data)[Count]) { for (uint32_t index = 0; index < Count; index++) save(data[index]); } + + // restore data from the buffer + void restore(bool &data) { data = read() ? true : false; } + void restore(int8_t &data) { data = read(); } + void restore(uint8_t &data) { data = read(); } + void restore(int16_t &data) { data = read(); data |= read() << 8; } + void restore(uint16_t &data) { data = read(); data |= read() << 8; } + void restore(int32_t &data) { data = read(); data |= read() << 8; data |= read() << 16; data |= read() << 24; } + void restore(uint32_t &data) { data = read(); data |= read() << 8; data |= read() << 16; data |= read() << 24; } + void restore(envelope_state &data) { data = envelope_state(read()); } + template + void restore(DataType (&data)[Count]) { for (uint32_t index = 0; index < Count; index++) restore(data[index]); } + + // internal helper + ymfm_saved_state &write(uint8_t data) { m_buffer.push_back(data); return *this; } + uint8_t read() { return (m_offset < int32_t(m_buffer.size())) ? m_buffer[m_offset++] : 0; } + + // internal state + std::vector &m_buffer; + int32_t m_offset; +}; + + + +//********************************************************* +// INTERFACE CLASSES +//********************************************************* + +// ======================> ymfm_engine_callbacks + +// this class represents functions in the engine that the ymfm_interface +// needs to be able to call; it is represented here as a separate interface +// that is independent of the actual engine implementation +class ymfm_engine_callbacks +{ +public: + // timer callback; called by the interface when a timer fires + virtual void engine_timer_expired(uint32_t tnum) = 0; + + // check interrupts; called by the interface after synchronization + virtual void engine_check_interrupts() = 0; + + // mode register write; called by the interface after synchronization + virtual void engine_mode_write(uint8_t data) = 0; +}; + + +// ======================> ymfm_interface + +// this class represents the interface between the fm_engine and the outside +// world; it provides hooks for timers, synchronization, and I/O +class ymfm_interface +{ + // the engine is our friend + template friend class fm_engine_base; + +public: + // the following functions must be implemented by any derived classes; the + // default implementations are sufficient for some minimal operation, but will + // likely need to be overridden to integrate with the outside world; they are + // all prefixed with ymfm_ to reduce the likelihood of namespace collisions + + // + // timing and synchronizaton + // + + // the chip implementation calls this when a write happens to the mode + // register, which could affect timers and interrupts; our responsibility + // is to ensure the system is up to date before calling the engine's + // engine_mode_write() method + virtual void ymfm_sync_mode_write(uint8_t data) { m_engine->engine_mode_write(data); } + + // the chip implementation calls this when the chip's status has changed, + // which may affect the interrupt state; our responsibility is to ensure + // the system is up to date before calling the engine's + // engine_check_interrupts() method + virtual void ymfm_sync_check_interrupts() { m_engine->engine_check_interrupts(); } + + // the chip implementation calls this when one of the two internal timers + // has changed state; our responsibility is to arrange to call the engine's + // engine_timer_expired() method after the provided number of clocks; if + // duration_in_clocks is negative, we should cancel any outstanding timers + virtual void ymfm_set_timer(uint32_t tnum, int32_t duration_in_clocks) { } + + // the chip implementation calls this to indicate that the chip should be + // considered in a busy state until the given number of clocks has passed; + // our responsibility is to compute and remember the ending time based on + // the chip's clock for later checking + virtual void ymfm_set_busy_end(uint32_t clocks) { } + + // the chip implementation calls this to see if the chip is still currently + // is a busy state, as specified by a previous call to ymfm_set_busy_end(); + // our responsibility is to compare the current time against the previously + // noted busy end time and return true if we haven't yet passed it + virtual bool ymfm_is_busy() { return false; } + + // + // I/O functions + // + + // the chip implementation calls this when the state of the IRQ signal has + // changed due to a status change; our responsibility is to respond as + // needed to the change in IRQ state, signaling any consumers + virtual void ymfm_update_irq(bool asserted) { } + + // the chip implementation calls this whenever data is read from outside + // of the chip; our responsibility is to provide the data requested + virtual uint8_t ymfm_external_read(access_class type, uint32_t address) { return 0; } + + // the chip implementation calls this whenever data is written outside + // of the chip; our responsibility is to pass the written data on to any consumers + virtual void ymfm_external_write(access_class type, uint32_t address, uint8_t data) { } + +protected: + // pointer to engine callbacks -- this is set directly by the engine at + // construction time + ymfm_engine_callbacks *m_engine; +}; + +} + +#endif // YMFM_H diff --git a/src/sound/ymfm/ymfm_adpcm.cpp b/src/sound/ymfm/ymfm_adpcm.cpp new file mode 100644 index 000000000..4bc22beb2 --- /dev/null +++ b/src/sound/ymfm/ymfm_adpcm.cpp @@ -0,0 +1,807 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#include "ymfm_adpcm.h" + +namespace ymfm +{ + +//********************************************************* +// ADPCM "A" REGISTERS +//********************************************************* + +//------------------------------------------------- +// reset - reset the register state +//------------------------------------------------- + +void adpcm_a_registers::reset() +{ + std::fill_n(&m_regdata[0], REGISTERS, 0); + + // initialize the pans to on by default, and max instrument volume; + // some neogeo homebrews (for example ffeast) rely on this + m_regdata[0x08] = m_regdata[0x09] = m_regdata[0x0a] = + m_regdata[0x0b] = m_regdata[0x0c] = m_regdata[0x0d] = 0xdf; +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void adpcm_a_registers::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_regdata); +} + + +//********************************************************* +// ADPCM "A" CHANNEL +//********************************************************* + +//------------------------------------------------- +// adpcm_a_channel - constructor +//------------------------------------------------- + +adpcm_a_channel::adpcm_a_channel(adpcm_a_engine &owner, uint32_t choffs, uint32_t addrshift) : + m_choffs(choffs), + m_address_shift(addrshift), + m_playing(0), + m_curnibble(0), + m_curbyte(0), + m_curaddress(0), + m_accumulator(0), + m_step_index(0), + m_regs(owner.regs()), + m_owner(owner) +{ +} + + +//------------------------------------------------- +// reset - reset the channel state +//------------------------------------------------- + +void adpcm_a_channel::reset() +{ + m_playing = 0; + m_curnibble = 0; + m_curbyte = 0; + m_curaddress = 0; + m_accumulator = 0; + m_step_index = 0; +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void adpcm_a_channel::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_playing); + state.save_restore(m_curnibble); + state.save_restore(m_curbyte); + state.save_restore(m_curaddress); + state.save_restore(m_accumulator); + state.save_restore(m_step_index); +} + + +//------------------------------------------------- +// keyonoff - signal key on/off +//------------------------------------------------- + +void adpcm_a_channel::keyonoff(bool on) +{ + // QUESTION: repeated key ons restart the sample? + m_playing = on; + if (m_playing) + { + m_curaddress = m_regs.ch_start(m_choffs) << m_address_shift; + m_curnibble = 0; + m_curbyte = 0; + m_accumulator = 0; + m_step_index = 0; + + // don't log masked channels + if (((debug::GLOBAL_ADPCM_A_CHANNEL_MASK >> m_choffs) & 1) != 0) + debug::log_keyon("KeyOn ADPCM-A%d: pan=%d%d start=%04X end=%04X level=%02X\n", + m_choffs, + m_regs.ch_pan_left(m_choffs), + m_regs.ch_pan_right(m_choffs), + m_regs.ch_start(m_choffs), + m_regs.ch_end(m_choffs), + m_regs.ch_instrument_level(m_choffs)); + } +} + + +//------------------------------------------------- +// clock - master clocking function +//------------------------------------------------- + +bool adpcm_a_channel::clock() +{ + // if not playing, just output 0 + if (m_playing == 0) + { + m_accumulator = 0; + return false; + } + + // if we're about to read nibble 0, fetch the data + uint8_t data; + if (m_curnibble == 0) + { + // stop when we hit the end address; apparently only low 20 bits are used for + // comparison on the YM2610: this affects sample playback in some games, for + // example twinspri character select screen music will skip some samples if + // this is not correct + // + // note also: end address is inclusive, so wait until we are about to fetch + // the sample just after the end before stopping; this is needed for nitd's + // jump sound, for example + uint32_t end = (m_regs.ch_end(m_choffs) + 1) << m_address_shift; + if (((m_curaddress ^ end) & 0xfffff) == 0) + { + m_playing = m_accumulator = 0; + return true; + } + + m_curbyte = m_owner.intf().ymfm_external_read(ACCESS_ADPCM_A, m_curaddress++); + data = m_curbyte >> 4; + m_curnibble = 1; + } + + // otherwise just extract from the previosuly-fetched byte + else + { + data = m_curbyte & 0xf; + m_curnibble = 0; + } + + // compute the ADPCM delta + static uint16_t const s_steps[49] = + { + 16, 17, 19, 21, 23, 25, 28, + 31, 34, 37, 41, 45, 50, 55, + 60, 66, 73, 80, 88, 97, 107, + 118, 130, 143, 157, 173, 190, 209, + 230, 253, 279, 307, 337, 371, 408, + 449, 494, 544, 598, 658, 724, 796, + 876, 963, 1060, 1166, 1282, 1411, 1552 + }; + int32_t delta = (2 * bitfield(data, 0, 3) + 1) * s_steps[m_step_index] / 8; + if (bitfield(data, 3)) + delta = -delta; + + // the 12-bit accumulator wraps on the ym2610 and ym2608 (like the msm5205) + m_accumulator = (m_accumulator + delta) & 0xfff; + + // adjust ADPCM step + static int8_t const s_step_inc[8] = { -1, -1, -1, -1, 2, 5, 7, 9 }; + m_step_index = clamp(m_step_index + s_step_inc[bitfield(data, 0, 3)], 0, 48); + + return false; +} + + +//------------------------------------------------- +// output - return the computed output value, with +// panning applied +//------------------------------------------------- + +template +void adpcm_a_channel::output(ymfm_output &output) const +{ + // volume combines instrument and total levels + int vol = (m_regs.ch_instrument_level(m_choffs) ^ 0x1f) + (m_regs.total_level() ^ 0x3f); + + // if combined is maximum, don't add to outputs + if (vol >= 63) + return; + + // convert into a shift and a multiplier + // QUESTION: verify this from other sources + int8_t mul = 15 - (vol & 7); + uint8_t shift = 4 + 1 + (vol >> 3); + + // m_accumulator is a 12-bit value; shift up to sign-extend; + // the downshift is incorporated into 'shift' + int16_t value = ((int16_t(m_accumulator << 4) * mul) >> shift) & ~3; + + // apply to left/right as appropriate + if (NumOutputs == 1 || m_regs.ch_pan_left(m_choffs)) + output.data[0] += value; + if (NumOutputs > 1 && m_regs.ch_pan_right(m_choffs)) + output.data[1] += value; +} + + + +//********************************************************* +// ADPCM "A" ENGINE +//********************************************************* + +//------------------------------------------------- +// adpcm_a_engine - constructor +//------------------------------------------------- + +adpcm_a_engine::adpcm_a_engine(ymfm_interface &intf, uint32_t addrshift) : + m_intf(intf) +{ + // create the channels + for (int chnum = 0; chnum < CHANNELS; chnum++) + m_channel[chnum] = std::make_unique(*this, chnum, addrshift); +} + + +//------------------------------------------------- +// reset - reset the engine state +//------------------------------------------------- + +void adpcm_a_engine::reset() +{ + // reset register state + m_regs.reset(); + + // reset each channel + for (auto &chan : m_channel) + chan->reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void adpcm_a_engine::save_restore(ymfm_saved_state &state) +{ + // save register state + m_regs.save_restore(state); + + // save channel state + for (int chnum = 0; chnum < CHANNELS; chnum++) + m_channel[chnum]->save_restore(state); +} + + +//------------------------------------------------- +// clock - master clocking function +//------------------------------------------------- + +uint32_t adpcm_a_engine::clock(uint32_t chanmask) +{ + // clock each channel, setting a bit in result if it finished + uint32_t result = 0; + for (int chnum = 0; chnum < CHANNELS; chnum++) + if (bitfield(chanmask, chnum)) + if (m_channel[chnum]->clock()) + result |= 1 << chnum; + + // return the bitmask of completed samples + return result; +} + + +//------------------------------------------------- +// update - master update function +//------------------------------------------------- + +template +void adpcm_a_engine::output(ymfm_output &output, uint32_t chanmask) +{ + // mask out some channels for debug purposes + chanmask &= debug::GLOBAL_ADPCM_A_CHANNEL_MASK; + + // compute the output of each channel + for (int chnum = 0; chnum < CHANNELS; chnum++) + if (bitfield(chanmask, chnum)) + m_channel[chnum]->output(output); +} + +template void adpcm_a_engine::output<1>(ymfm_output<1> &output, uint32_t chanmask); +template void adpcm_a_engine::output<2>(ymfm_output<2> &output, uint32_t chanmask); + + +//------------------------------------------------- +// write - handle writes to the ADPCM-A registers +//------------------------------------------------- + +void adpcm_a_engine::write(uint32_t regnum, uint8_t data) +{ + // store the raw value to the register array; + // most writes are passive, consumed only when needed + m_regs.write(regnum, data); + + // actively handle writes to the control register + if (regnum == 0x00) + for (int chnum = 0; chnum < CHANNELS; chnum++) + if (bitfield(data, chnum)) + m_channel[chnum]->keyonoff(bitfield(~data, 7)); +} + + + +//********************************************************* +// ADPCM "B" REGISTERS +//********************************************************* + +//------------------------------------------------- +// reset - reset the register state +//------------------------------------------------- + +void adpcm_b_registers::reset() +{ + std::fill_n(&m_regdata[0], REGISTERS, 0); + + // default limit to wide open + m_regdata[0x0c] = m_regdata[0x0d] = 0xff; +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void adpcm_b_registers::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_regdata); +} + + + +//********************************************************* +// ADPCM "B" CHANNEL +//********************************************************* + +//------------------------------------------------- +// adpcm_b_channel - constructor +//------------------------------------------------- + +adpcm_b_channel::adpcm_b_channel(adpcm_b_engine &owner, uint32_t addrshift) : + m_address_shift(addrshift), + m_status(STATUS_BRDY), + m_curnibble(0), + m_curbyte(0), + m_dummy_read(0), + m_position(0), + m_curaddress(0), + m_accumulator(0), + m_prev_accum(0), + m_adpcm_step(STEP_MIN), + m_regs(owner.regs()), + m_owner(owner) +{ +} + + +//------------------------------------------------- +// reset - reset the channel state +//------------------------------------------------- + +void adpcm_b_channel::reset() +{ + m_status = STATUS_BRDY; + m_curnibble = 0; + m_curbyte = 0; + m_dummy_read = 0; + m_position = 0; + m_curaddress = 0; + m_accumulator = 0; + m_prev_accum = 0; + m_adpcm_step = STEP_MIN; +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void adpcm_b_channel::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_status); + state.save_restore(m_curnibble); + state.save_restore(m_curbyte); + state.save_restore(m_dummy_read); + state.save_restore(m_position); + state.save_restore(m_curaddress); + state.save_restore(m_accumulator); + state.save_restore(m_prev_accum); + state.save_restore(m_adpcm_step); +} + + +//------------------------------------------------- +// clock - master clocking function +//------------------------------------------------- + +void adpcm_b_channel::clock() +{ + // only process if active and not recording (which we don't support) + if (!m_regs.execute() || m_regs.record() || (m_status & STATUS_PLAYING) == 0) + { + m_status &= ~STATUS_PLAYING; + return; + } + + // otherwise, advance the step + uint32_t position = m_position + m_regs.delta_n(); + m_position = uint16_t(position); + if (position < 0x10000) + return; + + // if we're about to process nibble 0, fetch sample + if (m_curnibble == 0) + { + // playing from RAM/ROM + if (m_regs.external()) + m_curbyte = m_owner.intf().ymfm_external_read(ACCESS_ADPCM_B, m_curaddress); + } + + // extract the nibble from our current byte + uint8_t data = uint8_t(m_curbyte << (4 * m_curnibble)) >> 4; + m_curnibble ^= 1; + + // we just processed the last nibble + if (m_curnibble == 0) + { + // if playing from RAM/ROM, check the end/limit address or advance + if (m_regs.external()) + { + // handle the sample end, either repeating or stopping + if (at_end()) + { + // if repeating, go back to the start + if (m_regs.repeat()) + load_start(); + + // otherwise, done; set the EOS bit + else + { + m_accumulator = 0; + m_prev_accum = 0; + m_status = (m_status & ~STATUS_PLAYING) | STATUS_EOS; + debug::log_keyon("%s\n", "ADPCM EOS"); + return; + } + } + + // wrap at the limit address + else if (at_limit()) + m_curaddress = 0; + + // otherwise, advance the current address + else + { + m_curaddress++; + m_curaddress &= 0xffffff; + } + } + + // if CPU-driven, copy the next byte and request more + else + { + m_curbyte = m_regs.cpudata(); + m_status |= STATUS_BRDY; + } + } + + // remember previous value for interpolation + m_prev_accum = m_accumulator; + + // forecast to next forecast: 1/8, 3/8, 5/8, 7/8, 9/8, 11/8, 13/8, 15/8 + int32_t delta = (2 * bitfield(data, 0, 3) + 1) * m_adpcm_step / 8; + if (bitfield(data, 3)) + delta = -delta; + + // add and clamp to 16 bits + m_accumulator = clamp(m_accumulator + delta, -32768, 32767); + + // scale the ADPCM step: 0.9, 0.9, 0.9, 0.9, 1.2, 1.6, 2.0, 2.4 + static uint8_t const s_step_scale[8] = { 57, 57, 57, 57, 77, 102, 128, 153 }; + m_adpcm_step = clamp((m_adpcm_step * s_step_scale[bitfield(data, 0, 3)]) / 64, STEP_MIN, STEP_MAX); +} + + +//------------------------------------------------- +// output - return the computed output value, with +// panning applied +//------------------------------------------------- + +template +void adpcm_b_channel::output(ymfm_output &output, uint32_t rshift) const +{ + // mask out some channels for debug purposes + if ((debug::GLOBAL_ADPCM_B_CHANNEL_MASK & 1) == 0) + return; + + // do a linear interpolation between samples + int32_t result = (m_prev_accum * int32_t((m_position ^ 0xffff) + 1) + m_accumulator * int32_t(m_position)) >> 16; + + // apply volume (level) in a linear fashion and reduce + result = (result * int32_t(m_regs.level())) >> (8 + rshift); + + // apply to left/right + if (NumOutputs == 1 || m_regs.pan_left()) + output.data[0] += result; + if (NumOutputs > 1 && m_regs.pan_right()) + output.data[1] += result; +} + + +//------------------------------------------------- +// read - handle special register reads +//------------------------------------------------- + +uint8_t adpcm_b_channel::read(uint32_t regnum) +{ + uint8_t result = 0; + + // register 8 reads over the bus under some conditions + if (regnum == 0x08 && !m_regs.execute() && !m_regs.record() && m_regs.external()) + { + // two dummy reads are consumed first + if (m_dummy_read != 0) + { + load_start(); + m_dummy_read--; + } + + // read the data + else + { + // read from outside of the chip + result = m_owner.intf().ymfm_external_read(ACCESS_ADPCM_B, m_curaddress++); + + // did we hit the end? if so, signal EOS + if (at_end()) + { + m_status = STATUS_EOS | STATUS_BRDY; + debug::log_keyon("%s\n", "ADPCM EOS"); + } + else + { + // signal ready + m_status = STATUS_BRDY; + } + + // wrap at the limit address + if (at_limit()) + m_curaddress = 0; + } + } + return result; +} + + +//------------------------------------------------- +// write - handle special register writes +//------------------------------------------------- + +void adpcm_b_channel::write(uint32_t regnum, uint8_t value) +{ + // register 0 can do a reset; also use writes here to reset the + // dummy read counter + if (regnum == 0x00) + { + if (m_regs.execute()) + { + load_start(); + + // don't log masked channels + if ((debug::GLOBAL_ADPCM_B_CHANNEL_MASK & 1) != 0) + debug::log_keyon("KeyOn ADPCM-B: rep=%d spk=%d pan=%d%d dac=%d 8b=%d rom=%d ext=%d rec=%d start=%04X end=%04X pre=%04X dn=%04X lvl=%02X lim=%04X\n", + m_regs.repeat(), + m_regs.speaker(), + m_regs.pan_left(), + m_regs.pan_right(), + m_regs.dac_enable(), + m_regs.dram_8bit(), + m_regs.rom_ram(), + m_regs.external(), + m_regs.record(), + m_regs.start(), + m_regs.end(), + m_regs.prescale(), + m_regs.delta_n(), + m_regs.level(), + m_regs.limit()); + } + else + m_status &= ~STATUS_EOS; + if (m_regs.resetflag()) + reset(); + if (m_regs.external()) + m_dummy_read = 2; + } + + // register 8 writes over the bus under some conditions + else if (regnum == 0x08) + { + // if writing from the CPU during execute, clear the ready flag + if (m_regs.execute() && !m_regs.record() && !m_regs.external()) + m_status &= ~STATUS_BRDY; + + // if writing during "record", pass through as data + else if (!m_regs.execute() && m_regs.record() && m_regs.external()) + { + // clear out dummy reads and set start address + if (m_dummy_read != 0) + { + load_start(); + m_dummy_read = 0; + } + + // did we hit the end? if so, signal EOS + if (at_end()) + { + debug::log_keyon("%s\n", "ADPCM EOS"); + m_status = STATUS_EOS | STATUS_BRDY; + } + + // otherwise, write the data and signal ready + else + { + m_owner.intf().ymfm_external_write(ACCESS_ADPCM_B, m_curaddress++, value); + m_status = STATUS_BRDY; + } + } + } +} + + +//------------------------------------------------- +// address_shift - compute the current address +// shift amount based on register settings +//------------------------------------------------- + +uint32_t adpcm_b_channel::address_shift() const +{ + // if a constant address shift, just provide that + if (m_address_shift != 0) + return m_address_shift; + + // if ROM or 8-bit DRAM, shift is 5 bits + if (m_regs.rom_ram()) + return 5; + if (m_regs.dram_8bit()) + return 5; + + // otherwise, shift is 2 bits + return 2; +} + + +//------------------------------------------------- +// load_start - load the start address and +// initialize the state +//------------------------------------------------- + +void adpcm_b_channel::load_start() +{ + m_status = (m_status & ~STATUS_EOS) | STATUS_PLAYING; + m_curaddress = m_regs.external() ? (m_regs.start() << address_shift()) : 0; + m_curnibble = 0; + m_curbyte = 0; + m_position = 0; + m_accumulator = 0; + m_prev_accum = 0; + m_adpcm_step = STEP_MIN; +} + + + +//********************************************************* +// ADPCM "B" ENGINE +//********************************************************* + +//------------------------------------------------- +// adpcm_b_engine - constructor +//------------------------------------------------- + +adpcm_b_engine::adpcm_b_engine(ymfm_interface &intf, uint32_t addrshift) : + m_intf(intf) +{ + // create the channel (only one supported for now, but leaving possibilities open) + m_channel = std::make_unique(*this, addrshift); +} + + +//------------------------------------------------- +// reset - reset the engine state +//------------------------------------------------- + +void adpcm_b_engine::reset() +{ + // reset registers + m_regs.reset(); + + // reset each channel + m_channel->reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void adpcm_b_engine::save_restore(ymfm_saved_state &state) +{ + // save our state + m_regs.save_restore(state); + + // save channel state + m_channel->save_restore(state); +} + + +//------------------------------------------------- +// clock - master clocking function +//------------------------------------------------- + +void adpcm_b_engine::clock() +{ + // clock each channel, setting a bit in result if it finished + m_channel->clock(); +} + + +//------------------------------------------------- +// output - master output function +//------------------------------------------------- + +template +void adpcm_b_engine::output(ymfm_output &output, uint32_t rshift) +{ + // compute the output of each channel + m_channel->output(output, rshift); +} + +template void adpcm_b_engine::output<1>(ymfm_output<1> &output, uint32_t rshift); +template void adpcm_b_engine::output<2>(ymfm_output<2> &output, uint32_t rshift); + + +//------------------------------------------------- +// write - handle writes to the ADPCM-B registers +//------------------------------------------------- + +void adpcm_b_engine::write(uint32_t regnum, uint8_t data) +{ + // store the raw value to the register array; + // most writes are passive, consumed only when needed + m_regs.write(regnum, data); + + // let the channel handle any special writes + m_channel->write(regnum, data); +} + +} diff --git a/src/sound/ymfm/ymfm_adpcm.h b/src/sound/ymfm/ymfm_adpcm.h new file mode 100644 index 000000000..d74e24f27 --- /dev/null +++ b/src/sound/ymfm/ymfm_adpcm.h @@ -0,0 +1,411 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#ifndef YMFM_ADPCM_H +#define YMFM_ADPCM_H + +#pragma once + +#include "ymfm.h" + +namespace ymfm +{ + +//********************************************************* +// INTERFACE CLASSES +//********************************************************* + +// forward declarations +class adpcm_a_engine; +class adpcm_b_engine; + + +// ======================> adpcm_a_registers + +// +// ADPCM-A register map: +// +// System-wide registers: +// 00 x------- Dump (disable=1) or keyon (0) control +// --xxxxxx Mask of channels to dump or keyon +// 01 --xxxxxx Total level +// 02 xxxxxxxx Test register +// 08-0D x------- Pan left +// -x------ Pan right +// ---xxxxx Instrument level +// 10-15 xxxxxxxx Start address (low) +// 18-1D xxxxxxxx Start address (high) +// 20-25 xxxxxxxx End address (low) +// 28-2D xxxxxxxx End address (high) +// +class adpcm_a_registers +{ +public: + // constants + static constexpr uint32_t OUTPUTS = 2; + static constexpr uint32_t CHANNELS = 6; + static constexpr uint32_t REGISTERS = 0x30; + static constexpr uint32_t ALL_CHANNELS = (1 << CHANNELS) - 1; + + // constructor + adpcm_a_registers() { } + + // reset to initial state + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // map channel number to register offset + static constexpr uint32_t channel_offset(uint32_t chnum) + { + assert(chnum < CHANNELS); + return chnum; + } + + // direct read/write access + void write(uint32_t index, uint8_t data) { m_regdata[index] = data; } + + // system-wide registers + uint32_t dump() const { return bitfield(m_regdata[0x00], 7); } + uint32_t dump_mask() const { return bitfield(m_regdata[0x00], 0, 6); } + uint32_t total_level() const { return bitfield(m_regdata[0x01], 0, 6); } + uint32_t test() const { return m_regdata[0x02]; } + + // per-channel registers + uint32_t ch_pan_left(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x08], 7); } + uint32_t ch_pan_right(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x08], 6); } + uint32_t ch_instrument_level(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x08], 0, 5); } + uint32_t ch_start(uint32_t choffs) const { return m_regdata[choffs + 0x10] | (m_regdata[choffs + 0x18] << 8); } + uint32_t ch_end(uint32_t choffs) const { return m_regdata[choffs + 0x20] | (m_regdata[choffs + 0x28] << 8); } + + // per-channel writes + void write_start(uint32_t choffs, uint32_t address) + { + write(choffs + 0x10, address); + write(choffs + 0x18, address >> 8); + } + void write_end(uint32_t choffs, uint32_t address) + { + write(choffs + 0x20, address); + write(choffs + 0x28, address >> 8); + } + +private: + // internal state + uint8_t m_regdata[REGISTERS]; // register data +}; + + +// ======================> adpcm_a_channel + +class adpcm_a_channel +{ +public: + // constructor + adpcm_a_channel(adpcm_a_engine &owner, uint32_t choffs, uint32_t addrshift); + + // reset the channel state + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // signal key on/off + void keyonoff(bool on); + + // master clockingfunction + bool clock(); + + // return the computed output value, with panning applied + template + void output(ymfm_output &output) const; + +private: + // internal state + uint32_t const m_choffs; // channel offset + uint32_t const m_address_shift; // address bits shift-left + uint32_t m_playing; // currently playing? + uint32_t m_curnibble; // index of the current nibble + uint32_t m_curbyte; // current byte of data + uint32_t m_curaddress; // current address + int32_t m_accumulator; // accumulator + int32_t m_step_index; // index in the stepping table + adpcm_a_registers &m_regs; // reference to registers + adpcm_a_engine &m_owner; // reference to our owner +}; + + +// ======================> adpcm_a_engine + +class adpcm_a_engine +{ +public: + static constexpr int CHANNELS = adpcm_a_registers::CHANNELS; + + // constructor + adpcm_a_engine(ymfm_interface &intf, uint32_t addrshift); + + // reset our status + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // master clocking function + uint32_t clock(uint32_t chanmask); + + // compute sum of channel outputs + template + void output(ymfm_output &output, uint32_t chanmask); + + // write to the ADPCM-A registers + void write(uint32_t regnum, uint8_t data); + + // set the start/end address for a channel (for hardcoded YM2608 percussion) + void set_start_end(uint8_t chnum, uint16_t start, uint16_t end) + { + uint32_t choffs = adpcm_a_registers::channel_offset(chnum); + m_regs.write_start(choffs, start); + m_regs.write_end(choffs, end); + } + + // return a reference to our interface + ymfm_interface &intf() { return m_intf; } + + // return a reference to our registers + adpcm_a_registers ®s() { return m_regs; } + +private: + // internal state + ymfm_interface &m_intf; // reference to the interface + std::unique_ptr m_channel[CHANNELS]; // array of channels + adpcm_a_registers m_regs; // registers +}; + + +// ======================> adpcm_b_registers + +// +// ADPCM-B register map: +// +// System-wide registers: +// 00 x------- Start of synthesis/analysis +// -x------ Record +// --x----- External/manual driving +// ---x---- Repeat playback +// ----x--- Speaker off +// -------x Reset +// 01 x------- Pan left +// -x------ Pan right +// ----x--- Start conversion +// -----x-- DAC enable +// ------x- DRAM access (1=8-bit granularity; 0=1-bit) +// -------x RAM/ROM (1=ROM, 0=RAM) +// 02 xxxxxxxx Start address (low) +// 03 xxxxxxxx Start address (high) +// 04 xxxxxxxx End address (low) +// 05 xxxxxxxx End address (high) +// 06 xxxxxxxx Prescale value (low) +// 07 -----xxx Prescale value (high) +// 08 xxxxxxxx CPU data/buffer +// 09 xxxxxxxx Delta-N frequency scale (low) +// 0a xxxxxxxx Delta-N frequency scale (high) +// 0b xxxxxxxx Level control +// 0c xxxxxxxx Limit address (low) +// 0d xxxxxxxx Limit address (high) +// 0e xxxxxxxx DAC data [YM2608/10] +// 0f xxxxxxxx PCM data [YM2608/10] +// 0e xxxxxxxx DAC data high [Y8950] +// 0f xx------ DAC data low [Y8950] +// 10 -----xxx DAC data exponent [Y8950] +// +class adpcm_b_registers +{ +public: + // constants + static constexpr uint32_t REGISTERS = 0x11; + + // constructor + adpcm_b_registers() { } + + // reset to initial state + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // direct read/write access + void write(uint32_t index, uint8_t data) { m_regdata[index] = data; } + + // system-wide registers + uint32_t execute() const { return bitfield(m_regdata[0x00], 7); } + uint32_t record() const { return bitfield(m_regdata[0x00], 6); } + uint32_t external() const { return bitfield(m_regdata[0x00], 5); } + uint32_t repeat() const { return bitfield(m_regdata[0x00], 4); } + uint32_t speaker() const { return bitfield(m_regdata[0x00], 3); } + uint32_t resetflag() const { return bitfield(m_regdata[0x00], 0); } + uint32_t pan_left() const { return bitfield(m_regdata[0x01], 7); } + uint32_t pan_right() const { return bitfield(m_regdata[0x01], 6); } + uint32_t start_conversion() const { return bitfield(m_regdata[0x01], 3); } + uint32_t dac_enable() const { return bitfield(m_regdata[0x01], 2); } + uint32_t dram_8bit() const { return bitfield(m_regdata[0x01], 1); } + uint32_t rom_ram() const { return bitfield(m_regdata[0x01], 0); } + uint32_t start() const { return m_regdata[0x02] | (m_regdata[0x03] << 8); } + uint32_t end() const { return m_regdata[0x04] | (m_regdata[0x05] << 8); } + uint32_t prescale() const { return m_regdata[0x06] | (bitfield(m_regdata[0x07], 0, 3) << 8); } + uint32_t cpudata() const { return m_regdata[0x08]; } + uint32_t delta_n() const { return m_regdata[0x09] | (m_regdata[0x0a] << 8); } + uint32_t level() const { return m_regdata[0x0b]; } + uint32_t limit() const { return m_regdata[0x0c] | (m_regdata[0x0d] << 8); } + uint32_t dac() const { return m_regdata[0x0e]; } + uint32_t pcm() const { return m_regdata[0x0f]; } + +private: + // internal state + uint8_t m_regdata[REGISTERS]; // register data +}; + + +// ======================> adpcm_b_channel + +class adpcm_b_channel +{ + static constexpr int32_t STEP_MIN = 127; + static constexpr int32_t STEP_MAX = 24576; + +public: + static constexpr uint8_t STATUS_EOS = 0x01; + static constexpr uint8_t STATUS_BRDY = 0x02; + static constexpr uint8_t STATUS_PLAYING = 0x04; + + // constructor + adpcm_b_channel(adpcm_b_engine &owner, uint32_t addrshift); + + // reset the channel state + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // signal key on/off + void keyonoff(bool on); + + // master clocking function + void clock(); + + // return the computed output value, with panning applied + template + void output(ymfm_output &output, uint32_t rshift) const; + + // return the status register + uint8_t status() const { return m_status; } + + // handle special register reads + uint8_t read(uint32_t regnum); + + // handle special register writes + void write(uint32_t regnum, uint8_t value); + +private: + // helper - return the current address shift + uint32_t address_shift() const; + + // load the start address + void load_start(); + + // limit checker; stops at the last byte of the chunk described by address_shift() + bool at_limit() const { return (m_curaddress == (((m_regs.limit() + 1) << address_shift()) - 1)); } + + // end checker; stops at the last byte of the chunk described by address_shift() + bool at_end() const { return (m_curaddress == (((m_regs.end() + 1) << address_shift()) - 1)); } + + // internal state + uint32_t const m_address_shift; // address bits shift-left + uint32_t m_status; // currently playing? + uint32_t m_curnibble; // index of the current nibble + uint32_t m_curbyte; // current byte of data + uint32_t m_dummy_read; // dummy read tracker + uint32_t m_position; // current fractional position + uint32_t m_curaddress; // current address + int32_t m_accumulator; // accumulator + int32_t m_prev_accum; // previous accumulator (for linear interp) + int32_t m_adpcm_step; // next forecast + adpcm_b_registers &m_regs; // reference to registers + adpcm_b_engine &m_owner; // reference to our owner +}; + + +// ======================> adpcm_b_engine + +class adpcm_b_engine +{ +public: + // constructor + adpcm_b_engine(ymfm_interface &intf, uint32_t addrshift = 0); + + // reset our status + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // master clocking function + void clock(); + + // compute sum of channel outputs + template + void output(ymfm_output &output, uint32_t rshift); + + // read from the ADPCM-B registers + uint32_t read(uint32_t regnum) { return m_channel->read(regnum); } + + // write to the ADPCM-B registers + void write(uint32_t regnum, uint8_t data); + + // status + uint8_t status() const { return m_channel->status(); } + + // return a reference to our interface + ymfm_interface &intf() { return m_intf; } + + // return a reference to our registers + adpcm_b_registers ®s() { return m_regs; } + +private: + // internal state + ymfm_interface &m_intf; // reference to our interface + std::unique_ptr m_channel; // channel pointer + adpcm_b_registers m_regs; // registers +}; + +} + +#endif // YMFM_ADPCM_H diff --git a/src/sound/ymfm/ymfm_fm.h b/src/sound/ymfm/ymfm_fm.h new file mode 100644 index 000000000..7c92c0f82 --- /dev/null +++ b/src/sound/ymfm/ymfm_fm.h @@ -0,0 +1,463 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#ifndef YMFM_FM_H +#define YMFM_FM_H + +#pragma once + +#define DEBUG_LOG_WAVFILES (0) + +namespace ymfm +{ + +//********************************************************* +// GLOBAL ENUMERATORS +//********************************************************* + +// three different keyon sources; actual keyon is an OR over all of these +enum keyon_type : uint32_t +{ + KEYON_NORMAL = 0, + KEYON_RHYTHM = 1, + KEYON_CSM = 2 +}; + + + +//********************************************************* +// CORE IMPLEMENTATION +//********************************************************* + +// ======================> opdata_cache + +// this class holds data that is computed once at the start of clocking +// and remains static during subsequent sound generation +struct opdata_cache +{ + // set phase_step to this value to recalculate it each sample; needed + // in the case of PM LFO changes + static constexpr uint32_t PHASE_STEP_DYNAMIC = 1; + + uint16_t const *waveform; // base of sine table + uint32_t phase_step; // phase step, or PHASE_STEP_DYNAMIC if PM is active + uint32_t total_level; // total level * 8 + KSL + uint32_t block_freq; // raw block frequency value (used to compute phase_step) + int32_t detune; // detuning value (used to compute phase_step) + uint32_t multiple; // multiple value (x.1, used to compute phase_step) + uint32_t eg_sustain; // sustain level, shifted up to envelope values + uint8_t eg_rate[EG_STATES]; // envelope rate, including KSR + uint8_t eg_shift = 0; // envelope shift amount +}; + + +// ======================> fm_registers_base + +// base class for family-specific register classes; this provides a few +// constants, common defaults, and helpers, but mostly each derived class is +// responsible for defining all commonly-called methods +class fm_registers_base +{ +public: + // this value is returned from the write() function for rhythm channels + static constexpr uint32_t RHYTHM_CHANNEL = 0xff; + + // this is the size of a full sin waveform + static constexpr uint32_t WAVEFORM_LENGTH = 0x400; + + // + // the following constants need to be defined per family: + // uint32_t OUTPUTS: The number of outputs exposed (1-4) + // uint32_t CHANNELS: The number of channels on the chip + // uint32_t ALL_CHANNELS: A bitmask of all channels + // uint32_t OPERATORS: The number of operators on the chip + // uint32_t WAVEFORMS: The number of waveforms offered + // uint32_t REGISTERS: The number of 8-bit registers allocated + // uint32_t DEFAULT_PRESCALE: The starting clock prescale + // uint32_t EG_CLOCK_DIVIDER: The clock divider of the envelope generator + // uint32_t CSM_TRIGGER_MASK: Mask of channels to trigger in CSM mode + // uint32_t REG_MODE: The address of the "mode" register controlling timers + // uint8_t STATUS_TIMERA: Status bit to set when timer A fires + // uint8_t STATUS_TIMERB: Status bit to set when tiemr B fires + // uint8_t STATUS_BUSY: Status bit to set when the chip is busy + // uint8_t STATUS_IRQ: Status bit to set when an IRQ is signalled + // + // the following constants are uncommon: + // bool DYNAMIC_OPS: True if ops/channel can be changed at runtime (OPL3+) + // bool EG_HAS_DEPRESS: True if the chip has a DP ("depress"?) envelope stage (OPLL) + // bool EG_HAS_REVERB: True if the chip has a faux reverb envelope stage (OPQ/OPZ) + // bool EG_HAS_SSG: True if the chip has SSG envelope support (OPN) + // bool MODULATOR_DELAY: True if the modulator is delayed by 1 sample (OPL pre-OPL3) + // + static constexpr bool DYNAMIC_OPS = false; + static constexpr bool EG_HAS_DEPRESS = false; + static constexpr bool EG_HAS_REVERB = false; + static constexpr bool EG_HAS_SSG = false; + static constexpr bool MODULATOR_DELAY = false; + + // system-wide register defaults + uint32_t status_mask() const { return 0; } // OPL only + uint32_t irq_reset() const { return 0; } // OPL only + uint32_t noise_enable() const { return 0; } // OPM only + uint32_t rhythm_enable() const { return 0; } // OPL only + + // per-operator register defaults + uint32_t op_ssg_eg_enable(uint32_t opoffs) const { return 0; } // OPN(A) only + uint32_t op_ssg_eg_mode(uint32_t opoffs) const { return 0; } // OPN(A) only + +protected: + // helper to encode four operator numbers into a 32-bit value in the + // operator maps for each register class + static constexpr uint32_t operator_list(uint8_t o1 = 0xff, uint8_t o2 = 0xff, uint8_t o3 = 0xff, uint8_t o4 = 0xff) + { + return o1 | (o2 << 8) | (o3 << 16) | (o4 << 24); + } + + // helper to apply KSR to the raw ADSR rate, ignoring ksr if the + // raw value is 0, and clamping to 63 + static constexpr uint32_t effective_rate(uint32_t rawrate, uint32_t ksr) + { + return (rawrate == 0) ? 0 : std::min(rawrate + ksr, 63); + } +}; + + + +//********************************************************* +// CORE ENGINE CLASSES +//********************************************************* + +// forward declarations +template class fm_engine_base; + +// ======================> fm_operator + +// fm_operator represents an FM operator (or "slot" in FM parlance), which +// produces an output sine wave modulated by an envelope +template +class fm_operator +{ + // "quiet" value, used to optimize when we can skip doing work + static constexpr uint32_t EG_QUIET = 0x380; + +public: + // constructor + fm_operator(fm_engine_base &owner, uint32_t opoffs); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // reset the operator state + void reset(); + + // return the operator/channel offset + uint32_t opoffs() const { return m_opoffs; } + uint32_t choffs() const { return m_choffs; } + + // set the current channel + void set_choffs(uint32_t choffs) { m_choffs = choffs; } + + // prepare prior to clocking + bool prepare(); + + // master clocking function + void clock(uint32_t env_counter, int32_t lfo_raw_pm); + + // return the current phase value + uint32_t phase() const { return m_phase >> 10; } + + // compute operator volume + int32_t compute_volume(uint32_t phase, uint32_t am_offset) const; + + // compute volume for the OPM noise channel + int32_t compute_noise_volume(uint32_t am_offset) const; + + // key state control + void keyonoff(uint32_t on, keyon_type type); + + // return a reference to our registers + RegisterType ®s() const { return m_regs; } + + // simple getters for debugging + envelope_state debug_eg_state() const { return m_env_state; } + uint16_t debug_eg_attenuation() const { return m_env_attenuation; } + uint8_t debug_ssg_inverted() const { return m_ssg_inverted; } + opdata_cache &debug_cache() { return m_cache; } + +private: + // start the attack phase + void start_attack(bool is_restart = false); + + // start the release phase + void start_release(); + + // clock phases + void clock_keystate(uint32_t keystate); + void clock_ssg_eg_state(); + void clock_envelope(uint32_t env_counter); + void clock_phase(int32_t lfo_raw_pm); + + // return effective attenuation of the envelope + uint32_t envelope_attenuation(uint32_t am_offset) const; + + // internal state + uint32_t m_choffs; // channel offset in registers + uint32_t m_opoffs; // operator offset in registers + uint32_t m_phase; // current phase value (10.10 format) + uint16_t m_env_attenuation; // computed envelope attenuation (4.6 format) + envelope_state m_env_state; // current envelope state + uint8_t m_ssg_inverted; // non-zero if the output should be inverted (bit 0) + uint8_t m_key_state; // current key state: on or off (bit 0) + uint8_t m_keyon_live; // live key on state (bit 0 = direct, bit 1 = rhythm, bit 2 = CSM) + opdata_cache m_cache; // cached values for performance + RegisterType &m_regs; // direct reference to registers + fm_engine_base &m_owner; // reference to the owning engine +}; + + +// ======================> fm_channel + +// fm_channel represents an FM channel which combines the output of 2 or 4 +// operators into a final result +template +class fm_channel +{ + using output_data = ymfm_output; + +public: + // constructor + fm_channel(fm_engine_base &owner, uint32_t choffs); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // reset the channel state + void reset(); + + // return the channel offset + uint32_t choffs() const { return m_choffs; } + + // assign operators + void assign(uint32_t index, fm_operator *op) + { + assert(index < array_size(m_op)); + m_op[index] = op; + if (op != nullptr) + op->set_choffs(m_choffs); + } + + // signal key on/off to our operators + void keyonoff(uint32_t states, keyon_type type, uint32_t chnum); + + // prepare prior to clocking + bool prepare(); + + // master clocking function + void clock(uint32_t env_counter, int32_t lfo_raw_pm); + + // specific 2-operator and 4-operator output handlers + void output_2op(output_data &output, uint32_t rshift, int32_t clipmax) const; + void output_4op(output_data &output, uint32_t rshift, int32_t clipmax) const; + + // compute the special OPL rhythm channel outputs + void output_rhythm_ch6(output_data &output, uint32_t rshift, int32_t clipmax) const; + void output_rhythm_ch7(uint32_t phase_select, output_data &output, uint32_t rshift, int32_t clipmax) const; + void output_rhythm_ch8(uint32_t phase_select, output_data &output, uint32_t rshift, int32_t clipmax) const; + + // are we a 4-operator channel or a 2-operator one? + bool is4op() const + { + if (RegisterType::DYNAMIC_OPS) + return (m_op[2] != nullptr); + return (RegisterType::OPERATORS / RegisterType::CHANNELS == 4); + } + + // return a reference to our registers + RegisterType ®s() const { return m_regs; } + + // simple getters for debugging + fm_operator *debug_operator(uint32_t index) const { return m_op[index]; } + +private: + // helper to add values to the outputs based on channel enables + void add_to_output(uint32_t choffs, output_data &output, int32_t value) const + { + // create these constants to appease overzealous compilers checking array + // bounds in unreachable code (looking at you, clang) + constexpr int out0_index = 0; + constexpr int out1_index = 1 % RegisterType::OUTPUTS; + constexpr int out2_index = 2 % RegisterType::OUTPUTS; + constexpr int out3_index = 3 % RegisterType::OUTPUTS; + + if (RegisterType::OUTPUTS == 1 || m_regs.ch_output_0(choffs)) + output.data[out0_index] += value; + if (RegisterType::OUTPUTS >= 2 && m_regs.ch_output_1(choffs)) + output.data[out1_index] += value; + if (RegisterType::OUTPUTS >= 3 && m_regs.ch_output_2(choffs)) + output.data[out2_index] += value; + if (RegisterType::OUTPUTS >= 4 && m_regs.ch_output_3(choffs)) + output.data[out3_index] += value; + } + + // internal state + uint32_t m_choffs; // channel offset in registers + int16_t m_feedback[2]; // feedback memory for operator 1 + mutable int16_t m_feedback_in; // next input value for op 1 feedback (set in output) + fm_operator *m_op[4]; // up to 4 operators + RegisterType &m_regs; // direct reference to registers + fm_engine_base &m_owner; // reference to the owning engine +}; + + +// ======================> fm_engine_base + +// fm_engine_base represents a set of operators and channels which together +// form a Yamaha FM core; chips that implement other engines (ADPCM, wavetable, +// etc) take this output and combine it with the others externally +template +class fm_engine_base : public ymfm_engine_callbacks +{ +public: + // expose some constants from the registers + static constexpr uint32_t OUTPUTS = RegisterType::OUTPUTS; + static constexpr uint32_t CHANNELS = RegisterType::CHANNELS; + static constexpr uint32_t ALL_CHANNELS = RegisterType::ALL_CHANNELS; + static constexpr uint32_t OPERATORS = RegisterType::OPERATORS; + + // also expose status flags for consumers that inject additional bits + static constexpr uint8_t STATUS_TIMERA = RegisterType::STATUS_TIMERA; + static constexpr uint8_t STATUS_TIMERB = RegisterType::STATUS_TIMERB; + static constexpr uint8_t STATUS_BUSY = RegisterType::STATUS_BUSY; + static constexpr uint8_t STATUS_IRQ = RegisterType::STATUS_IRQ; + + // expose the correct output class + using output_data = ymfm_output; + + // constructor + fm_engine_base(ymfm_interface &intf); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // reset the overall state + void reset(); + + // master clocking function + uint32_t clock(uint32_t chanmask); + + // compute sum of channel outputs + void output(output_data &output, uint32_t rshift, int32_t clipmax, uint32_t chanmask) const; + + // write to the OPN registers + void write(uint16_t regnum, uint8_t data); + + // return the current status + uint8_t status() const; + + // set/reset bits in the status register, updating the IRQ status + uint8_t set_reset_status(uint8_t set, uint8_t reset) + { + m_status = (m_status | set) & ~(reset | STATUS_BUSY); + m_intf.ymfm_sync_check_interrupts(); + return m_status & ~m_regs.status_mask(); + } + + // set the IRQ mask + void set_irq_mask(uint8_t mask) { m_irq_mask = mask; m_intf.ymfm_sync_check_interrupts(); } + + // return the current clock prescale + uint32_t clock_prescale() const { return m_clock_prescale; } + + // set prescale factor (2/3/6) + void set_clock_prescale(uint32_t prescale) { m_clock_prescale = prescale; } + + // compute sample rate + uint32_t sample_rate(uint32_t baseclock) const + { +#if (DEBUG_LOG_WAVFILES) + for (uint32_t chnum = 0; chnum < CHANNELS; chnum++) + m_wavfile[chnum].set_samplerate(baseclock / (m_clock_prescale * OPERATORS)); +#endif + return baseclock / (m_clock_prescale * OPERATORS); + } + + // return the owning device + ymfm_interface &intf() const { return m_intf; } + + // return a reference to our registers + RegisterType ®s() { return m_regs; } + + // invalidate any caches + void invalidate_caches() { m_modified_channels = RegisterType::ALL_CHANNELS; } + + // simple getters for debugging + fm_channel *debug_channel(uint32_t index) const { return m_channel[index].get(); } + fm_operator *debug_operator(uint32_t index) const { return m_operator[index].get(); } + +public: + // timer callback; called by the interface when a timer fires + virtual void engine_timer_expired(uint32_t tnum) override; + + // check interrupts; called by the interface after synchronization + virtual void engine_check_interrupts() override; + + // mode register write; called by the interface after synchronization + virtual void engine_mode_write(uint8_t data) override; + +protected: + // assign the current set of operators to channels + void assign_operators(); + + // update the state of the given timer + void update_timer(uint32_t which, uint32_t enable, int32_t delta_clocks); + + // internal state + ymfm_interface &m_intf; // reference to the system interface + uint32_t m_env_counter; // envelope counter; low 2 bits are sub-counter + uint8_t m_status; // current status register + uint8_t m_clock_prescale; // prescale factor (2/3/6) + uint8_t m_irq_mask; // mask of which bits signal IRQs + uint8_t m_irq_state; // current IRQ state + uint8_t m_timer_running[2]; // current timer running state + uint8_t m_total_clocks; // low 8 bits of the total number of clocks processed + uint32_t m_active_channels; // mask of active channels (computed by prepare) + uint32_t m_modified_channels; // mask of channels that have been modified + uint32_t m_prepare_count; // counter to do periodic prepare sweeps + RegisterType m_regs; // register accessor + std::unique_ptr> m_channel[CHANNELS]; // channel pointers + std::unique_ptr> m_operator[OPERATORS]; // operator pointers +#if (DEBUG_LOG_WAVFILES) + mutable ymfm_wavfile<1> m_wavfile[CHANNELS]; // for debugging +#endif +}; + +} + +#endif // YMFM_FM_H diff --git a/src/sound/ymfm/ymfm_fm.ipp b/src/sound/ymfm/ymfm_fm.ipp new file mode 100644 index 000000000..17bbc9150 --- /dev/null +++ b/src/sound/ymfm/ymfm_fm.ipp @@ -0,0 +1,1589 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +namespace ymfm +{ + +//********************************************************* +// GLOBAL TABLE LOOKUPS +//********************************************************* + +//------------------------------------------------- +// abs_sin_attenuation - given a sin (phase) input +// where the range 0-2*PI is mapped onto 10 bits, +// return the absolute value of sin(input), +// logarithmically-adjusted and treated as an +// attenuation value, in 4.8 fixed point format +//------------------------------------------------- + +inline uint32_t abs_sin_attenuation(uint32_t input) +{ + // the values here are stored as 4.8 logarithmic values for 1/4 phase + // this matches the internal format of the OPN chip, extracted from the die + static uint16_t const s_sin_table[256] = + { + 0x859,0x6c3,0x607,0x58b,0x52e,0x4e4,0x4a6,0x471,0x443,0x41a,0x3f5,0x3d3,0x3b5,0x398,0x37e,0x365, + 0x34e,0x339,0x324,0x311,0x2ff,0x2ed,0x2dc,0x2cd,0x2bd,0x2af,0x2a0,0x293,0x286,0x279,0x26d,0x261, + 0x256,0x24b,0x240,0x236,0x22c,0x222,0x218,0x20f,0x206,0x1fd,0x1f5,0x1ec,0x1e4,0x1dc,0x1d4,0x1cd, + 0x1c5,0x1be,0x1b7,0x1b0,0x1a9,0x1a2,0x19b,0x195,0x18f,0x188,0x182,0x17c,0x177,0x171,0x16b,0x166, + 0x160,0x15b,0x155,0x150,0x14b,0x146,0x141,0x13c,0x137,0x133,0x12e,0x129,0x125,0x121,0x11c,0x118, + 0x114,0x10f,0x10b,0x107,0x103,0x0ff,0x0fb,0x0f8,0x0f4,0x0f0,0x0ec,0x0e9,0x0e5,0x0e2,0x0de,0x0db, + 0x0d7,0x0d4,0x0d1,0x0cd,0x0ca,0x0c7,0x0c4,0x0c1,0x0be,0x0bb,0x0b8,0x0b5,0x0b2,0x0af,0x0ac,0x0a9, + 0x0a7,0x0a4,0x0a1,0x09f,0x09c,0x099,0x097,0x094,0x092,0x08f,0x08d,0x08a,0x088,0x086,0x083,0x081, + 0x07f,0x07d,0x07a,0x078,0x076,0x074,0x072,0x070,0x06e,0x06c,0x06a,0x068,0x066,0x064,0x062,0x060, + 0x05e,0x05c,0x05b,0x059,0x057,0x055,0x053,0x052,0x050,0x04e,0x04d,0x04b,0x04a,0x048,0x046,0x045, + 0x043,0x042,0x040,0x03f,0x03e,0x03c,0x03b,0x039,0x038,0x037,0x035,0x034,0x033,0x031,0x030,0x02f, + 0x02e,0x02d,0x02b,0x02a,0x029,0x028,0x027,0x026,0x025,0x024,0x023,0x022,0x021,0x020,0x01f,0x01e, + 0x01d,0x01c,0x01b,0x01a,0x019,0x018,0x017,0x017,0x016,0x015,0x014,0x014,0x013,0x012,0x011,0x011, + 0x010,0x00f,0x00f,0x00e,0x00d,0x00d,0x00c,0x00c,0x00b,0x00a,0x00a,0x009,0x009,0x008,0x008,0x007, + 0x007,0x007,0x006,0x006,0x005,0x005,0x005,0x004,0x004,0x004,0x003,0x003,0x003,0x002,0x002,0x002, + 0x002,0x001,0x001,0x001,0x001,0x001,0x001,0x001,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000 + }; + + // if the top bit is set, we're in the second half of the curve + // which is a mirror image, so invert the index + if (bitfield(input, 8)) + input = ~input; + + // return the value from the table + return s_sin_table[input & 0xff]; +} + + +//------------------------------------------------- +// attenuation_to_volume - given a 5.8 fixed point +// logarithmic attenuation value, return a 13-bit +// linear volume +//------------------------------------------------- + +inline uint32_t attenuation_to_volume(uint32_t input) +{ + // the values here are 10-bit mantissas with an implied leading bit + // this matches the internal format of the OPN chip, extracted from the die + + // as a nod to performance, the implicit 0x400 bit is pre-incorporated, and + // the values are left-shifted by 2 so that a simple right shift is all that + // is needed; also the order is reversed to save a NOT on the input +#define X(a) (((a) | 0x400) << 2) + static uint16_t const s_power_table[256] = + { + X(0x3fa),X(0x3f5),X(0x3ef),X(0x3ea),X(0x3e4),X(0x3df),X(0x3da),X(0x3d4), + X(0x3cf),X(0x3c9),X(0x3c4),X(0x3bf),X(0x3b9),X(0x3b4),X(0x3ae),X(0x3a9), + X(0x3a4),X(0x39f),X(0x399),X(0x394),X(0x38f),X(0x38a),X(0x384),X(0x37f), + X(0x37a),X(0x375),X(0x370),X(0x36a),X(0x365),X(0x360),X(0x35b),X(0x356), + X(0x351),X(0x34c),X(0x347),X(0x342),X(0x33d),X(0x338),X(0x333),X(0x32e), + X(0x329),X(0x324),X(0x31f),X(0x31a),X(0x315),X(0x310),X(0x30b),X(0x306), + X(0x302),X(0x2fd),X(0x2f8),X(0x2f3),X(0x2ee),X(0x2e9),X(0x2e5),X(0x2e0), + X(0x2db),X(0x2d6),X(0x2d2),X(0x2cd),X(0x2c8),X(0x2c4),X(0x2bf),X(0x2ba), + X(0x2b5),X(0x2b1),X(0x2ac),X(0x2a8),X(0x2a3),X(0x29e),X(0x29a),X(0x295), + X(0x291),X(0x28c),X(0x288),X(0x283),X(0x27f),X(0x27a),X(0x276),X(0x271), + X(0x26d),X(0x268),X(0x264),X(0x25f),X(0x25b),X(0x257),X(0x252),X(0x24e), + X(0x249),X(0x245),X(0x241),X(0x23c),X(0x238),X(0x234),X(0x230),X(0x22b), + X(0x227),X(0x223),X(0x21e),X(0x21a),X(0x216),X(0x212),X(0x20e),X(0x209), + X(0x205),X(0x201),X(0x1fd),X(0x1f9),X(0x1f5),X(0x1f0),X(0x1ec),X(0x1e8), + X(0x1e4),X(0x1e0),X(0x1dc),X(0x1d8),X(0x1d4),X(0x1d0),X(0x1cc),X(0x1c8), + X(0x1c4),X(0x1c0),X(0x1bc),X(0x1b8),X(0x1b4),X(0x1b0),X(0x1ac),X(0x1a8), + X(0x1a4),X(0x1a0),X(0x19c),X(0x199),X(0x195),X(0x191),X(0x18d),X(0x189), + X(0x185),X(0x181),X(0x17e),X(0x17a),X(0x176),X(0x172),X(0x16f),X(0x16b), + X(0x167),X(0x163),X(0x160),X(0x15c),X(0x158),X(0x154),X(0x151),X(0x14d), + X(0x149),X(0x146),X(0x142),X(0x13e),X(0x13b),X(0x137),X(0x134),X(0x130), + X(0x12c),X(0x129),X(0x125),X(0x122),X(0x11e),X(0x11b),X(0x117),X(0x114), + X(0x110),X(0x10c),X(0x109),X(0x106),X(0x102),X(0x0ff),X(0x0fb),X(0x0f8), + X(0x0f4),X(0x0f1),X(0x0ed),X(0x0ea),X(0x0e7),X(0x0e3),X(0x0e0),X(0x0dc), + X(0x0d9),X(0x0d6),X(0x0d2),X(0x0cf),X(0x0cc),X(0x0c8),X(0x0c5),X(0x0c2), + X(0x0be),X(0x0bb),X(0x0b8),X(0x0b5),X(0x0b1),X(0x0ae),X(0x0ab),X(0x0a8), + X(0x0a4),X(0x0a1),X(0x09e),X(0x09b),X(0x098),X(0x094),X(0x091),X(0x08e), + X(0x08b),X(0x088),X(0x085),X(0x082),X(0x07e),X(0x07b),X(0x078),X(0x075), + X(0x072),X(0x06f),X(0x06c),X(0x069),X(0x066),X(0x063),X(0x060),X(0x05d), + X(0x05a),X(0x057),X(0x054),X(0x051),X(0x04e),X(0x04b),X(0x048),X(0x045), + X(0x042),X(0x03f),X(0x03c),X(0x039),X(0x036),X(0x033),X(0x030),X(0x02d), + X(0x02a),X(0x028),X(0x025),X(0x022),X(0x01f),X(0x01c),X(0x019),X(0x016), + X(0x014),X(0x011),X(0x00e),X(0x00b),X(0x008),X(0x006),X(0x003),X(0x000) + }; +#undef X + + // look up the fractional part, then shift by the whole + return s_power_table[input & 0xff] >> (input >> 8); +} + + +//------------------------------------------------- +// attenuation_increment - given a 6-bit ADSR +// rate value and a 3-bit stepping index, +// return a 4-bit increment to the attenutaion +// for this step (or for the attack case, the +// fractional scale factor to decrease by) +//------------------------------------------------- + +inline uint32_t attenuation_increment(uint32_t rate, uint32_t index) +{ + static uint32_t const s_increment_table[64] = + { + 0x00000000, 0x00000000, 0x10101010, 0x10101010, // 0-3 (0x00-0x03) + 0x10101010, 0x10101010, 0x11101110, 0x11101110, // 4-7 (0x04-0x07) + 0x10101010, 0x10111010, 0x11101110, 0x11111110, // 8-11 (0x08-0x0B) + 0x10101010, 0x10111010, 0x11101110, 0x11111110, // 12-15 (0x0C-0x0F) + 0x10101010, 0x10111010, 0x11101110, 0x11111110, // 16-19 (0x10-0x13) + 0x10101010, 0x10111010, 0x11101110, 0x11111110, // 20-23 (0x14-0x17) + 0x10101010, 0x10111010, 0x11101110, 0x11111110, // 24-27 (0x18-0x1B) + 0x10101010, 0x10111010, 0x11101110, 0x11111110, // 28-31 (0x1C-0x1F) + 0x10101010, 0x10111010, 0x11101110, 0x11111110, // 32-35 (0x20-0x23) + 0x10101010, 0x10111010, 0x11101110, 0x11111110, // 36-39 (0x24-0x27) + 0x10101010, 0x10111010, 0x11101110, 0x11111110, // 40-43 (0x28-0x2B) + 0x10101010, 0x10111010, 0x11101110, 0x11111110, // 44-47 (0x2C-0x2F) + 0x11111111, 0x21112111, 0x21212121, 0x22212221, // 48-51 (0x30-0x33) + 0x22222222, 0x42224222, 0x42424242, 0x44424442, // 52-55 (0x34-0x37) + 0x44444444, 0x84448444, 0x84848484, 0x88848884, // 56-59 (0x38-0x3B) + 0x88888888, 0x88888888, 0x88888888, 0x88888888 // 60-63 (0x3C-0x3F) + }; + return bitfield(s_increment_table[rate], 4*index, 4); +} + + +//------------------------------------------------- +// detune_adjustment - given a 5-bit key code +// value and a 3-bit detune parameter, return a +// 6-bit signed phase displacement; this table +// has been verified against Nuked's equations, +// but the equations are rather complicated, so +// we'll keep the simplicity of the table +//------------------------------------------------- + +inline int32_t detune_adjustment(uint32_t detune, uint32_t keycode) +{ + static uint8_t const s_detune_adjustment[32][4] = + { + { 0, 0, 1, 2 }, { 0, 0, 1, 2 }, { 0, 0, 1, 2 }, { 0, 0, 1, 2 }, + { 0, 1, 2, 2 }, { 0, 1, 2, 3 }, { 0, 1, 2, 3 }, { 0, 1, 2, 3 }, + { 0, 1, 2, 4 }, { 0, 1, 3, 4 }, { 0, 1, 3, 4 }, { 0, 1, 3, 5 }, + { 0, 2, 4, 5 }, { 0, 2, 4, 6 }, { 0, 2, 4, 6 }, { 0, 2, 5, 7 }, + { 0, 2, 5, 8 }, { 0, 3, 6, 8 }, { 0, 3, 6, 9 }, { 0, 3, 7, 10 }, + { 0, 4, 8, 11 }, { 0, 4, 8, 12 }, { 0, 4, 9, 13 }, { 0, 5, 10, 14 }, + { 0, 5, 11, 16 }, { 0, 6, 12, 17 }, { 0, 6, 13, 19 }, { 0, 7, 14, 20 }, + { 0, 8, 16, 22 }, { 0, 8, 16, 22 }, { 0, 8, 16, 22 }, { 0, 8, 16, 22 } + }; + int32_t result = s_detune_adjustment[keycode][detune & 3]; + return bitfield(detune, 2) ? -result : result; +} + + +//------------------------------------------------- +// opm_key_code_to_phase_step - converts an +// OPM concatenated block (3 bits), keycode +// (4 bits) and key fraction (6 bits) to a 0.10 +// phase step, after applying the given delta; +// this applies to OPM and OPZ, so it lives here +// in a central location +//------------------------------------------------- + +inline uint32_t opm_key_code_to_phase_step(uint32_t block_freq, int32_t delta) +{ + // The phase step is essentially the fnum in OPN-speak. To compute this table, + // we used the standard formula for computing the frequency of a note, and + // then converted that frequency to fnum using the formula documented in the + // YM2608 manual. + // + // However, the YM2608 manual describes everything in terms of a nominal 8MHz + // clock, which produces an FM clock of: + // + // 8000000 / 24(operators) / 6(prescale) = 55555Hz FM clock + // + // Whereas the descriptions for the YM2151 use a nominal 3.579545MHz clock: + // + // 3579545 / 32(operators) / 2(prescale) = 55930Hz FM clock + // + // To correct for this, the YM2608 formula was adjusted to use a clock of + // 8053920Hz, giving this equation for the fnum: + // + // fnum = (double(144) * freq * (1 << 20)) / double(8053920) / 4; + // + // Unfortunately, the computed table differs in a few spots from the data + // verified from an actual chip. The table below comes from David Viens' + // analysis, used with his permission. + static const uint32_t s_phase_step[12*64] = + { + 41568,41600,41632,41664,41696,41728,41760,41792,41856,41888,41920,41952,42016,42048,42080,42112, + 42176,42208,42240,42272,42304,42336,42368,42400,42464,42496,42528,42560,42624,42656,42688,42720, + 42784,42816,42848,42880,42912,42944,42976,43008,43072,43104,43136,43168,43232,43264,43296,43328, + 43392,43424,43456,43488,43552,43584,43616,43648,43712,43744,43776,43808,43872,43904,43936,43968, + 44032,44064,44096,44128,44192,44224,44256,44288,44352,44384,44416,44448,44512,44544,44576,44608, + 44672,44704,44736,44768,44832,44864,44896,44928,44992,45024,45056,45088,45152,45184,45216,45248, + 45312,45344,45376,45408,45472,45504,45536,45568,45632,45664,45728,45760,45792,45824,45888,45920, + 45984,46016,46048,46080,46144,46176,46208,46240,46304,46336,46368,46400,46464,46496,46528,46560, + 46656,46688,46720,46752,46816,46848,46880,46912,46976,47008,47072,47104,47136,47168,47232,47264, + 47328,47360,47392,47424,47488,47520,47552,47584,47648,47680,47744,47776,47808,47840,47904,47936, + 48032,48064,48096,48128,48192,48224,48288,48320,48384,48416,48448,48480,48544,48576,48640,48672, + 48736,48768,48800,48832,48896,48928,48992,49024,49088,49120,49152,49184,49248,49280,49344,49376, + 49440,49472,49504,49536,49600,49632,49696,49728,49792,49824,49856,49888,49952,49984,50048,50080, + 50144,50176,50208,50240,50304,50336,50400,50432,50496,50528,50560,50592,50656,50688,50752,50784, + 50880,50912,50944,50976,51040,51072,51136,51168,51232,51264,51328,51360,51424,51456,51488,51520, + 51616,51648,51680,51712,51776,51808,51872,51904,51968,52000,52064,52096,52160,52192,52224,52256, + 52384,52416,52448,52480,52544,52576,52640,52672,52736,52768,52832,52864,52928,52960,52992,53024, + 53120,53152,53216,53248,53312,53344,53408,53440,53504,53536,53600,53632,53696,53728,53792,53824, + 53920,53952,54016,54048,54112,54144,54208,54240,54304,54336,54400,54432,54496,54528,54592,54624, + 54688,54720,54784,54816,54880,54912,54976,55008,55072,55104,55168,55200,55264,55296,55360,55392, + 55488,55520,55584,55616,55680,55712,55776,55808,55872,55936,55968,56032,56064,56128,56160,56224, + 56288,56320,56384,56416,56480,56512,56576,56608,56672,56736,56768,56832,56864,56928,56960,57024, + 57120,57152,57216,57248,57312,57376,57408,57472,57536,57568,57632,57664,57728,57792,57824,57888, + 57952,57984,58048,58080,58144,58208,58240,58304,58368,58400,58464,58496,58560,58624,58656,58720, + 58784,58816,58880,58912,58976,59040,59072,59136,59200,59232,59296,59328,59392,59456,59488,59552, + 59648,59680,59744,59776,59840,59904,59936,60000,60064,60128,60160,60224,60288,60320,60384,60416, + 60512,60544,60608,60640,60704,60768,60800,60864,60928,60992,61024,61088,61152,61184,61248,61280, + 61376,61408,61472,61536,61600,61632,61696,61760,61824,61856,61920,61984,62048,62080,62144,62208, + 62272,62304,62368,62432,62496,62528,62592,62656,62720,62752,62816,62880,62944,62976,63040,63104, + 63200,63232,63296,63360,63424,63456,63520,63584,63648,63680,63744,63808,63872,63904,63968,64032, + 64096,64128,64192,64256,64320,64352,64416,64480,64544,64608,64672,64704,64768,64832,64896,64928, + 65024,65056,65120,65184,65248,65312,65376,65408,65504,65536,65600,65664,65728,65792,65856,65888, + 65984,66016,66080,66144,66208,66272,66336,66368,66464,66496,66560,66624,66688,66752,66816,66848, + 66944,66976,67040,67104,67168,67232,67296,67328,67424,67456,67520,67584,67648,67712,67776,67808, + 67904,67936,68000,68064,68128,68192,68256,68288,68384,68448,68512,68544,68640,68672,68736,68800, + 68896,68928,68992,69056,69120,69184,69248,69280,69376,69440,69504,69536,69632,69664,69728,69792, + 69920,69952,70016,70080,70144,70208,70272,70304,70400,70464,70528,70560,70656,70688,70752,70816, + 70912,70976,71040,71104,71136,71232,71264,71360,71424,71488,71552,71616,71648,71744,71776,71872, + 71968,72032,72096,72160,72192,72288,72320,72416,72480,72544,72608,72672,72704,72800,72832,72928, + 72992,73056,73120,73184,73216,73312,73344,73440,73504,73568,73632,73696,73728,73824,73856,73952, + 74080,74144,74208,74272,74304,74400,74432,74528,74592,74656,74720,74784,74816,74912,74944,75040, + 75136,75200,75264,75328,75360,75456,75488,75584,75648,75712,75776,75840,75872,75968,76000,76096, + 76224,76288,76352,76416,76448,76544,76576,76672,76736,76800,76864,76928,77024,77120,77152,77248, + 77344,77408,77472,77536,77568,77664,77696,77792,77856,77920,77984,78048,78144,78240,78272,78368, + 78464,78528,78592,78656,78688,78784,78816,78912,78976,79040,79104,79168,79264,79360,79392,79488, + 79616,79680,79744,79808,79840,79936,79968,80064,80128,80192,80256,80320,80416,80512,80544,80640, + 80768,80832,80896,80960,80992,81088,81120,81216,81280,81344,81408,81472,81568,81664,81696,81792, + 81952,82016,82080,82144,82176,82272,82304,82400,82464,82528,82592,82656,82752,82848,82880,82976 + }; + + // extract the block (octave) first + uint32_t block = bitfield(block_freq, 10, 3); + + // the keycode (bits 6-9) is "gappy", mapping 12 values over 16 in each + // octave; to correct for this, we multiply the 4-bit value by 3/4 (or + // rather subtract 1/4); note that a (invalid) value of 15 will bleed into + // the next octave -- this is confirmed + uint32_t adjusted_code = bitfield(block_freq, 6, 4) - bitfield(block_freq, 8, 2); + + // now re-insert the 6-bit fraction + int32_t eff_freq = (adjusted_code << 6) | bitfield(block_freq, 0, 6); + + // now that the gaps are removed, add the delta + eff_freq += delta; + + // handle over/underflow by adjusting the block: + if (uint32_t(eff_freq) >= 768) + { + // minimum delta is -512 (PM), so we can only underflow by 1 octave + if (eff_freq < 0) + { + eff_freq += 768; + if (block-- == 0) + return s_phase_step[0] >> 7; + } + + // maximum delta is +512+608 (PM+detune), so we can overflow by up to 2 octaves + else + { + eff_freq -= 768; + if (eff_freq >= 768) + block++, eff_freq -= 768; + if (block++ >= 7) + return s_phase_step[767]; + } + } + + // look up the phase shift for the key code, then shift by octave + return s_phase_step[eff_freq] >> (block ^ 7); +} + + +//------------------------------------------------- +// opn_lfo_pm_phase_adjustment - given the 7 most +// significant frequency number bits, plus a 3-bit +// PM depth value and a signed 5-bit raw PM value, +// return a signed PM adjustment to the frequency; +// algorithm written to match Nuked behavior +//------------------------------------------------- + +inline int32_t opn_lfo_pm_phase_adjustment(uint32_t fnum_bits, uint32_t pm_sensitivity, int32_t lfo_raw_pm) +{ + // this table encodes 2 shift values to apply to the top 7 bits + // of fnum; it is effectively a cheap multiply by a constant + // value containing 0-2 bits + static uint8_t const s_lfo_pm_shifts[8][8] = + { + { 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77 }, + { 0x77, 0x77, 0x77, 0x77, 0x72, 0x72, 0x72, 0x72 }, + { 0x77, 0x77, 0x77, 0x72, 0x72, 0x72, 0x17, 0x17 }, + { 0x77, 0x77, 0x72, 0x72, 0x17, 0x17, 0x12, 0x12 }, + { 0x77, 0x77, 0x72, 0x17, 0x17, 0x17, 0x12, 0x07 }, + { 0x77, 0x77, 0x17, 0x12, 0x07, 0x07, 0x02, 0x01 }, + { 0x77, 0x77, 0x17, 0x12, 0x07, 0x07, 0x02, 0x01 }, + { 0x77, 0x77, 0x17, 0x12, 0x07, 0x07, 0x02, 0x01 } + }; + + // look up the relevant shifts + int32_t abs_pm = (lfo_raw_pm < 0) ? -lfo_raw_pm : lfo_raw_pm; + uint32_t const shifts = s_lfo_pm_shifts[pm_sensitivity][bitfield(abs_pm, 0, 3)]; + + // compute the adjustment + int32_t adjust = (fnum_bits >> bitfield(shifts, 0, 4)) + (fnum_bits >> bitfield(shifts, 4, 4)); + if (pm_sensitivity > 5) + adjust <<= pm_sensitivity - 5; + adjust >>= 2; + + // every 16 cycles it inverts sign + return (lfo_raw_pm < 0) ? -adjust : adjust; +} + + + +//********************************************************* +// FM OPERATOR +//********************************************************* + +//------------------------------------------------- +// fm_operator - constructor +//------------------------------------------------- + +template +fm_operator::fm_operator(fm_engine_base &owner, uint32_t opoffs) : + m_choffs(0), + m_opoffs(opoffs), + m_phase(0), + m_env_attenuation(0x3ff), + m_env_state(EG_RELEASE), + m_ssg_inverted(false), + m_key_state(0), + m_keyon_live(0), + m_regs(owner.regs()), + m_owner(owner) +{ +} + + +//------------------------------------------------- +// reset - reset the channel state +//------------------------------------------------- + +template +void fm_operator::reset() +{ + // reset our data + m_phase = 0; + m_env_attenuation = 0x3ff; + m_env_state = EG_RELEASE; + m_ssg_inverted = 0; + m_key_state = 0; + m_keyon_live = 0; +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +template +void fm_operator::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_phase); + state.save_restore(m_env_attenuation); + state.save_restore(m_env_state); + state.save_restore(m_ssg_inverted); + state.save_restore(m_key_state); + state.save_restore(m_keyon_live); +} + + +//------------------------------------------------- +// prepare - prepare for clocking +//------------------------------------------------- + +template +bool fm_operator::prepare() +{ + // cache the data + m_regs.cache_operator_data(m_choffs, m_opoffs, m_cache); + + // clock the key state + clock_keystate(uint32_t(m_keyon_live != 0)); + m_keyon_live &= ~(1 << KEYON_CSM); + + // we're active until we're quiet after the release + return (m_env_state != (RegisterType::EG_HAS_REVERB ? EG_REVERB : EG_RELEASE) || m_env_attenuation < EG_QUIET); +} + + +//------------------------------------------------- +// clock - master clocking function +//------------------------------------------------- + +template +void fm_operator::clock(uint32_t env_counter, int32_t lfo_raw_pm) +{ + // clock the SSG-EG state (OPN/OPNA) + if (m_regs.op_ssg_eg_enable(m_opoffs)) + clock_ssg_eg_state(); + else + m_ssg_inverted = false; + + // clock the envelope if on an envelope cycle; env_counter is a x.2 value + if (bitfield(env_counter, 0, 2) == 0) + clock_envelope(env_counter >> 2); + + // clock the phase + clock_phase(lfo_raw_pm); +} + + +//------------------------------------------------- +// compute_volume - compute the 14-bit signed +// volume of this operator, given a phase +// modulation and an AM LFO offset +//------------------------------------------------- + +template +int32_t fm_operator::compute_volume(uint32_t phase, uint32_t am_offset) const +{ + // the low 10 bits of phase represents a full 2*PI period over + // the full sin wave + + // early out if the envelope is effectively off + if (m_env_attenuation > EG_QUIET) + return 0; + + // get the absolute value of the sin, as attenuation, as a 4.8 fixed point value + uint32_t sin_attenuation = m_cache.waveform[phase & (RegisterType::WAVEFORM_LENGTH - 1)]; + + // get the attenuation from the evelope generator as a 4.6 value, shifted up to 4.8 + uint32_t env_attenuation = envelope_attenuation(am_offset) << 2; + + // combine into a 5.8 value, then convert from attenuation to 13-bit linear volume + int32_t result = attenuation_to_volume((sin_attenuation & 0x7fff) + env_attenuation); + + // negate if in the negative part of the sin wave (sign bit gives 14 bits) + return bitfield(sin_attenuation, 15) ? -result : result; +} + + +//------------------------------------------------- +// compute_noise_volume - compute the 14-bit +// signed noise volume of this operator, given a +// noise input value and an AM offset +//------------------------------------------------- + +template +int32_t fm_operator::compute_noise_volume(uint32_t am_offset) const +{ + // application manual says the logarithmic transform is not applied here, so we + // just use the raw envelope attenuation, inverted (since 0 attenuation should be + // maximum), and shift it up from a 10-bit value to an 11-bit value + int32_t result = (envelope_attenuation(am_offset) ^ 0x3ff) << 1; + + // QUESTION: is AM applied still? + + // negate based on the noise state + return bitfield(m_regs.noise_state(), 0) ? -result : result; +} + + +//------------------------------------------------- +// keyonoff - signal a key on/off event +//------------------------------------------------- + +template +void fm_operator::keyonoff(uint32_t on, keyon_type type) +{ + m_keyon_live = (m_keyon_live & ~(1 << int(type))) | (bitfield(on, 0) << int(type)); +} + + +//------------------------------------------------- +// start_attack - start the attack phase; called +// when a keyon happens or when an SSG-EG cycle +// is complete and restarts +//------------------------------------------------- + +template +void fm_operator::start_attack(bool is_restart) +{ + // don't change anything if already in attack state + if (m_env_state == EG_ATTACK) + return; + m_env_state = EG_ATTACK; + + // generally not inverted at start, except if SSG-EG is enabled and + // one of the inverted modes is specified; leave this alone on a + // restart, as it is managed by the clock_ssg_eg_state() code + if (RegisterType::EG_HAS_SSG && !is_restart) + m_ssg_inverted = m_regs.op_ssg_eg_enable(m_opoffs) & bitfield(m_regs.op_ssg_eg_mode(m_opoffs), 2); + + // reset the phase when we start an attack due to a key on + // (but not when due to an SSG-EG restart except in certain cases + // managed directly by the SSG-EG code) + if (!is_restart) + m_phase = 0; + + // if the attack rate >= 62 then immediately go to max attenuation + if (m_cache.eg_rate[EG_ATTACK] >= 62) + m_env_attenuation = 0; +} + + +//------------------------------------------------- +// start_release - start the release phase; +// called when a keyoff happens +//------------------------------------------------- + +template +void fm_operator::start_release() +{ + // don't change anything if already in release state + if (m_env_state >= EG_RELEASE) + return; + m_env_state = EG_RELEASE; + + // if attenuation if inverted due to SSG-EG, snap the inverted attenuation + // as the starting point + if (RegisterType::EG_HAS_SSG && m_ssg_inverted) + { + m_env_attenuation = (0x200 - m_env_attenuation) & 0x3ff; + m_ssg_inverted = false; + } +} + + +//------------------------------------------------- +// clock_keystate - clock the keystate to match +// the incoming keystate +//------------------------------------------------- + +template +void fm_operator::clock_keystate(uint32_t keystate) +{ + assert(keystate == 0 || keystate == 1); + + // has the key changed? + if ((keystate ^ m_key_state) != 0) + { + m_key_state = keystate; + + // if the key has turned on, start the attack + if (keystate != 0) + { + // OPLL has a DP ("depress"?) state to bring the volume + // down before starting the attack + if (RegisterType::EG_HAS_DEPRESS && m_env_attenuation < 0x200) + m_env_state = EG_DEPRESS; + else + start_attack(); + } + + // otherwise, start the release + else + start_release(); + } +} + + +//------------------------------------------------- +// clock_ssg_eg_state - clock the SSG-EG state; +// should only be called if SSG-EG is enabled +//------------------------------------------------- + +template +void fm_operator::clock_ssg_eg_state() +{ + // work only happens once the attenuation crosses above 0x200 + if (!bitfield(m_env_attenuation, 9)) + return; + + // 8 SSG-EG modes: + // 000: repeat normally + // 001: run once, hold low + // 010: repeat, alternating between inverted/non-inverted + // 011: run once, hold high + // 100: inverted repeat normally + // 101: inverted run once, hold low + // 110: inverted repeat, alternating between inverted/non-inverted + // 111: inverted run once, hold high + uint32_t mode = m_regs.op_ssg_eg_mode(m_opoffs); + + // hold modes (1/3/5/7) + if (bitfield(mode, 0)) + { + // set the inverted flag to the end state (0 for modes 1/7, 1 for modes 3/5) + m_ssg_inverted = bitfield(mode, 2) ^ bitfield(mode, 1); + + // if holding, force the attenuation to the expected value once we're + // past the attack phase + if (m_env_state != EG_ATTACK) + m_env_attenuation = m_ssg_inverted ? 0x200 : 0x3ff; + } + + // continuous modes (0/2/4/6) + else + { + // toggle invert in alternating mode (even in attack state) + m_ssg_inverted ^= bitfield(mode, 1); + + // restart attack if in decay/sustain states + if (m_env_state == EG_DECAY || m_env_state == EG_SUSTAIN) + start_attack(true); + + // phase is reset to 0 in modes 0/4 + if (bitfield(mode, 1) == 0) + m_phase = 0; + } + + // in all modes, once we hit release state, attenuation is forced to maximum + if (m_env_state == EG_RELEASE) + m_env_attenuation = 0x3ff; +} + + +//------------------------------------------------- +// clock_envelope - clock the envelope state +// according to the given count +//------------------------------------------------- + +template +void fm_operator::clock_envelope(uint32_t env_counter) +{ + // handle attack->decay transitions + if (m_env_state == EG_ATTACK && m_env_attenuation == 0) + m_env_state = EG_DECAY; + + // handle decay->sustain transitions; it is important to do this immediately + // after the attack->decay transition above in the event that the sustain level + // is set to 0 (in which case we will skip right to sustain without doing any + // decay); as an example where this can be heard, check the cymbals sound + // in channel 0 of shinobi's test mode sound #5 + if (m_env_state == EG_DECAY && m_env_attenuation >= m_cache.eg_sustain) + m_env_state = EG_SUSTAIN; + + // fetch the appropriate 6-bit rate value from the cache + uint32_t rate = m_cache.eg_rate[m_env_state]; + + // compute the rate shift value; this is the shift needed to + // apply to the env_counter such that it becomes a 5.11 fixed + // point number + uint32_t rate_shift = rate >> 2; + env_counter <<= rate_shift; + + // see if the fractional part is 0; if not, it's not time to clock + if (bitfield(env_counter, 0, 11) != 0) + return; + + // determine the increment based on the non-fractional part of env_counter + uint32_t relevant_bits = bitfield(env_counter, (rate_shift <= 11) ? 11 : rate_shift, 3); + uint32_t increment = attenuation_increment(rate, relevant_bits); + + // attack is the only one that increases + if (m_env_state == EG_ATTACK) + { + // glitch means that attack rates of 62/63 don't increment if + // changed after the initial key on (where they are handled + // specially); nukeykt confirms this happens on OPM, OPN, OPL/OPLL + // at least so assuming it is true for everyone + if (rate < 62) + m_env_attenuation += (~m_env_attenuation * increment) >> 4; + } + + // all other cases are similar + else + { + // non-SSG-EG cases just apply the increment + if (!m_regs.op_ssg_eg_enable(m_opoffs)) + m_env_attenuation += increment; + + // SSG-EG only applies if less than mid-point, and then at 4x + else if (m_env_attenuation < 0x200) + m_env_attenuation += 4 * increment; + + // clamp the final attenuation + if (m_env_attenuation >= 0x400) + m_env_attenuation = 0x3ff; + + // transition from depress to attack + if (RegisterType::EG_HAS_DEPRESS && m_env_state == EG_DEPRESS && m_env_attenuation >= 0x200) + start_attack(); + + // transition from release to reverb, should switch at -18dB + if (RegisterType::EG_HAS_REVERB && m_env_state == EG_RELEASE && m_env_attenuation >= 0xc0) + m_env_state = EG_REVERB; + } +} + + +//------------------------------------------------- +// clock_phase - clock the 10.10 phase value; the +// OPN version of the logic has been verified +// against the Nuked phase generator +//------------------------------------------------- + +template +void fm_operator::clock_phase(int32_t lfo_raw_pm) +{ + // read from the cache, or recalculate if PM active + uint32_t phase_step = m_cache.phase_step; + if (phase_step == opdata_cache::PHASE_STEP_DYNAMIC) + phase_step = m_regs.compute_phase_step(m_choffs, m_opoffs, m_cache, lfo_raw_pm); + + // finally apply the step to the current phase value + m_phase += phase_step; +} + + +//------------------------------------------------- +// envelope_attenuation - return the effective +// attenuation of the envelope +//------------------------------------------------- + +template +uint32_t fm_operator::envelope_attenuation(uint32_t am_offset) const +{ + uint32_t result = m_env_attenuation >> m_cache.eg_shift; + + // invert if necessary due to SSG-EG + if (RegisterType::EG_HAS_SSG && m_ssg_inverted) + result = (0x200 - result) & 0x3ff; + + // add in LFO AM modulation + if (m_regs.op_lfo_am_enable(m_opoffs)) + result += am_offset; + + // add in total level and KSL from the cache + result += m_cache.total_level; + + // clamp to max, apply shift, and return + return std::min(result, 0x3ff); +} + + + +//********************************************************* +// FM CHANNEL +//********************************************************* + +//------------------------------------------------- +// fm_channel - constructor +//------------------------------------------------- + +template +fm_channel::fm_channel(fm_engine_base &owner, uint32_t choffs) : + m_choffs(choffs), + m_feedback{ 0, 0 }, + m_feedback_in(0), + m_op{ nullptr, nullptr, nullptr, nullptr }, + m_regs(owner.regs()), + m_owner(owner) +{ +} + + +//------------------------------------------------- +// reset - reset the channel state +//------------------------------------------------- + +template +void fm_channel::reset() +{ + // reset our data + m_feedback[0] = m_feedback[1] = 0; + m_feedback_in = 0; +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +template +void fm_channel::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_feedback[0]); + state.save_restore(m_feedback[1]); + state.save_restore(m_feedback_in); +} + + +//------------------------------------------------- +// keyonoff - signal key on/off to our operators +//------------------------------------------------- + +template +void fm_channel::keyonoff(uint32_t states, keyon_type type, uint32_t chnum) +{ + for (uint32_t opnum = 0; opnum < array_size(m_op); opnum++) + if (m_op[opnum] != nullptr) + m_op[opnum]->keyonoff(bitfield(states, opnum), type); + + if (debug::LOG_KEYON_EVENTS && ((debug::GLOBAL_FM_CHANNEL_MASK >> chnum) & 1) != 0) + for (uint32_t opnum = 0; opnum < array_size(m_op); opnum++) + if (m_op[opnum] != nullptr) + debug::log_keyon("%c%s\n", bitfield(states, opnum) ? '+' : '-', m_regs.log_keyon(m_choffs, m_op[opnum]->opoffs()).c_str()); +} + + +//------------------------------------------------- +// prepare - prepare for clocking +//------------------------------------------------- + +template +bool fm_channel::prepare() +{ + uint32_t active_mask = 0; + + // prepare all operators and determine if they are active + for (uint32_t opnum = 0; opnum < array_size(m_op); opnum++) + if (m_op[opnum] != nullptr) + if (m_op[opnum]->prepare()) + active_mask |= 1 << opnum; + + return (active_mask != 0); +} + + +//------------------------------------------------- +// clock - master clock of all operators +//------------------------------------------------- + +template +void fm_channel::clock(uint32_t env_counter, int32_t lfo_raw_pm) +{ + // clock the feedback through + m_feedback[0] = m_feedback[1]; + m_feedback[1] = m_feedback_in; + + for (uint32_t opnum = 0; opnum < array_size(m_op); opnum++) + if (m_op[opnum] != nullptr) + m_op[opnum]->clock(env_counter, lfo_raw_pm); + +/* +useful temporary code for envelope debugging +if (m_choffs == 0x101) +{ + for (uint32_t opnum = 0; opnum < array_size(m_op); opnum++) + { + auto &op = *m_op[((opnum & 1) << 1) | ((opnum >> 1) & 1)]; + printf(" %c%03X%c%c ", + "PADSRV"[op.debug_eg_state()], + op.debug_eg_attenuation(), + op.debug_ssg_inverted() ? '-' : '+', + m_regs.op_ssg_eg_enable(op.opoffs()) ? '0' + m_regs.op_ssg_eg_mode(op.opoffs()) : ' '); + } +printf(" -- "); +} +*/ +} + + +//------------------------------------------------- +// output_2op - combine 4 operators according to +// the specified algorithm, returning a sum +// according to the rshift and clipmax parameters, +// which vary between different implementations +//------------------------------------------------- + +template +void fm_channel::output_2op(output_data &output, uint32_t rshift, int32_t clipmax) const +{ + // The first 2 operators should be populated + assert(m_op[0] != nullptr); + assert(m_op[1] != nullptr); + + // AM amount is the same across all operators; compute it once + uint32_t am_offset = m_regs.lfo_am_offset(m_choffs); + + // operator 1 has optional self-feedback + int32_t opmod = 0; + uint32_t feedback = m_regs.ch_feedback(m_choffs); + if (feedback != 0) + opmod = (m_feedback[0] + m_feedback[1]) >> (10 - feedback); + + // compute the 14-bit volume/value of operator 1 and update the feedback + int32_t op1value = m_feedback_in = m_op[0]->compute_volume(m_op[0]->phase() + opmod, am_offset); + + // now that the feedback has been computed, skip the rest if all volumes + // are clear; no need to do all this work for nothing + if (m_regs.ch_output_any(m_choffs) == 0) + return; + + // Algorithms for two-operator case: + // 0: O1 -> O2 -> out + // 1: (O1 + O2) -> out + int32_t result; + if (bitfield(m_regs.ch_algorithm(m_choffs), 0) == 0) + { + // some OPL chips use the previous sample for modulation instead of + // the current sample + opmod = (RegisterType::MODULATOR_DELAY ? m_feedback[1] : op1value) >> 1; + result = m_op[1]->compute_volume(m_op[1]->phase() + opmod, am_offset) >> rshift; + } + else + { + result = (RegisterType::MODULATOR_DELAY ? m_feedback[1] : op1value) >> rshift; + result += m_op[1]->compute_volume(m_op[1]->phase(), am_offset) >> rshift; + int32_t clipmin = -clipmax - 1; + result = clamp(result, clipmin, clipmax); + } + + // add to the output + add_to_output(m_choffs, output, result); +} + + +//------------------------------------------------- +// output_4op - combine 4 operators according to +// the specified algorithm, returning a sum +// according to the rshift and clipmax parameters, +// which vary between different implementations +//------------------------------------------------- + +template +void fm_channel::output_4op(output_data &output, uint32_t rshift, int32_t clipmax) const +{ + // all 4 operators should be populated + assert(m_op[0] != nullptr); + assert(m_op[1] != nullptr); + assert(m_op[2] != nullptr); + assert(m_op[3] != nullptr); + + // AM amount is the same across all operators; compute it once + uint32_t am_offset = m_regs.lfo_am_offset(m_choffs); + + // operator 1 has optional self-feedback + int32_t opmod = 0; + uint32_t feedback = m_regs.ch_feedback(m_choffs); + if (feedback != 0) + opmod = (m_feedback[0] + m_feedback[1]) >> (10 - feedback); + + // compute the 14-bit volume/value of operator 1 and update the feedback + int32_t op1value = m_feedback_in = m_op[0]->compute_volume(m_op[0]->phase() + opmod, am_offset); + + // now that the feedback has been computed, skip the rest if all volumes + // are clear; no need to do all this work for nothing + if (m_regs.ch_output_any(m_choffs) == 0) + return; + + // OPM/OPN offer 8 different connection algorithms for 4 operators, + // and OPL3 offers 4 more, which we designate here as 8-11. + // + // The operators are computed in order, with the inputs pulled from + // an array of values (opout) that is populated as we go: + // 0 = 0 + // 1 = O1 + // 2 = O2 + // 3 = O3 + // 4 = (O4) + // 5 = O1+O2 + // 6 = O1+O3 + // 7 = O2+O3 + // + // The s_algorithm_ops table describes the inputs and outputs of each + // algorithm as follows: + // + // ---------x use opout[x] as operator 2 input + // ------xxx- use opout[x] as operator 3 input + // ---xxx---- use opout[x] as operator 4 input + // --x------- include opout[1] in final sum + // -x-------- include opout[2] in final sum + // x--------- include opout[3] in final sum + #define ALGORITHM(op2in, op3in, op4in, op1out, op2out, op3out) \ + ((op2in) | ((op3in) << 1) | ((op4in) << 4) | ((op1out) << 7) | ((op2out) << 8) | ((op3out) << 9)) + static uint16_t const s_algorithm_ops[8+4] = + { + ALGORITHM(1,2,3, 0,0,0), // 0: O1 -> O2 -> O3 -> O4 -> out (O4) + ALGORITHM(0,5,3, 0,0,0), // 1: (O1 + O2) -> O3 -> O4 -> out (O4) + ALGORITHM(0,2,6, 0,0,0), // 2: (O1 + (O2 -> O3)) -> O4 -> out (O4) + ALGORITHM(1,0,7, 0,0,0), // 3: ((O1 -> O2) + O3) -> O4 -> out (O4) + ALGORITHM(1,0,3, 0,1,0), // 4: ((O1 -> O2) + (O3 -> O4)) -> out (O2+O4) + ALGORITHM(1,1,1, 0,1,1), // 5: ((O1 -> O2) + (O1 -> O3) + (O1 -> O4)) -> out (O2+O3+O4) + ALGORITHM(1,0,0, 0,1,1), // 6: ((O1 -> O2) + O3 + O4) -> out (O2+O3+O4) + ALGORITHM(0,0,0, 1,1,1), // 7: (O1 + O2 + O3 + O4) -> out (O1+O2+O3+O4) + ALGORITHM(1,2,3, 0,0,0), // 8: O1 -> O2 -> O3 -> O4 -> out (O4) [same as 0] + ALGORITHM(0,2,3, 1,0,0), // 9: (O1 + (O2 -> O3 -> O4)) -> out (O1+O4) [unique] + ALGORITHM(1,0,3, 0,1,0), // 10: ((O1 -> O2) + (O3 -> O4)) -> out (O2+O4) [same as 4] + ALGORITHM(0,2,0, 1,0,1) // 11: (O1 + (O2 -> O3) + O4) -> out (O1+O3+O4) [unique] + }; + uint32_t algorithm_ops = s_algorithm_ops[m_regs.ch_algorithm(m_choffs)]; + + // populate the opout table + int16_t opout[8]; + opout[0] = 0; + opout[1] = op1value; + + // compute the 14-bit volume/value of operator 2 + opmod = opout[bitfield(algorithm_ops, 0, 1)] >> 1; + opout[2] = m_op[1]->compute_volume(m_op[1]->phase() + opmod, am_offset); + opout[5] = opout[1] + opout[2]; + + // compute the 14-bit volume/value of operator 3 + opmod = opout[bitfield(algorithm_ops, 1, 3)] >> 1; + opout[3] = m_op[2]->compute_volume(m_op[2]->phase() + opmod, am_offset); + opout[6] = opout[1] + opout[3]; + opout[7] = opout[2] + opout[3]; + + // compute the 14-bit volume/value of operator 4; this could be a noise + // value on the OPM; all algorithms consume OP4 output at a minimum + int32_t result; + if (m_regs.noise_enable() && m_choffs == 7) + result = m_op[3]->compute_noise_volume(am_offset); + else + { + opmod = opout[bitfield(algorithm_ops, 4, 3)] >> 1; + result = m_op[3]->compute_volume(m_op[3]->phase() + opmod, am_offset); + } + result >>= rshift; + + // optionally add OP1, OP2, OP3 + int32_t clipmin = -clipmax - 1; + if (bitfield(algorithm_ops, 7) != 0) + result = clamp(result + (opout[1] >> rshift), clipmin, clipmax); + if (bitfield(algorithm_ops, 8) != 0) + result = clamp(result + (opout[2] >> rshift), clipmin, clipmax); + if (bitfield(algorithm_ops, 9) != 0) + result = clamp(result + (opout[3] >> rshift), clipmin, clipmax); + + // add to the output + add_to_output(m_choffs, output, result); +} + + +//------------------------------------------------- +// output_rhythm_ch6 - special case output +// computation for OPL channel 6 in rhythm mode, +// which outputs a Bass Drum instrument +//------------------------------------------------- + +template +void fm_channel::output_rhythm_ch6(output_data &output, uint32_t rshift, int32_t clipmax) const +{ + // AM amount is the same across all operators; compute it once + uint32_t am_offset = m_regs.lfo_am_offset(m_choffs); + + // Bass Drum: this uses operators 12 and 15 (i.e., channel 6) + // in an almost-normal way, except that if the algorithm is 1, + // the first operator is ignored instead of added in + + // operator 1 has optional self-feedback + int32_t opmod = 0; + uint32_t feedback = m_regs.ch_feedback(m_choffs); + if (feedback != 0) + opmod = (m_feedback[0] + m_feedback[1]) >> (10 - feedback); + + // compute the 14-bit volume/value of operator 1 and update the feedback + int32_t opout1 = m_feedback_in = m_op[0]->compute_volume(m_op[0]->phase() + opmod, am_offset); + + // compute the 14-bit volume/value of operator 2, which is the result + opmod = bitfield(m_regs.ch_algorithm(m_choffs), 0) ? 0 : (opout1 >> 1); + int32_t result = m_op[1]->compute_volume(m_op[1]->phase() + opmod, am_offset) >> rshift; + + // add to the output + add_to_output(m_choffs, output, result * 2); +} + + +//------------------------------------------------- +// output_rhythm_ch7 - special case output +// computation for OPL channel 7 in rhythm mode, +// which outputs High Hat and Snare Drum +// instruments +//------------------------------------------------- + +template +void fm_channel::output_rhythm_ch7(uint32_t phase_select, output_data &output, uint32_t rshift, int32_t clipmax) const +{ + // AM amount is the same across all operators; compute it once + uint32_t am_offset = m_regs.lfo_am_offset(m_choffs); + uint32_t noise_state = bitfield(m_regs.noise_state(), 0); + + // High Hat: this uses the envelope from operator 13 (channel 7), + // and a combination of noise and the operator 13/17 phase select + // to compute the phase + uint32_t phase = (phase_select << 9) | (0xd0 >> (2 * (noise_state ^ phase_select))); + int32_t result = m_op[0]->compute_volume(phase, am_offset) >> rshift; + + // Snare Drum: this uses the envelope from operator 16 (channel 7), + // and a combination of noise and operator 13 phase to pick a phase + uint32_t op13phase = m_op[0]->phase(); + phase = (0x100 << bitfield(op13phase, 8)) ^ (noise_state << 8); + result += m_op[1]->compute_volume(phase, am_offset) >> rshift; + result = clamp(result, -clipmax - 1, clipmax); + + // add to the output + add_to_output(m_choffs, output, result * 2); +} + + +//------------------------------------------------- +// output_rhythm_ch8 - special case output +// computation for OPL channel 8 in rhythm mode, +// which outputs Tom Tom and Top Cymbal instruments +//------------------------------------------------- + +template +void fm_channel::output_rhythm_ch8(uint32_t phase_select, output_data &output, uint32_t rshift, int32_t clipmax) const +{ + // AM amount is the same across all operators; compute it once + uint32_t am_offset = m_regs.lfo_am_offset(m_choffs); + + // Tom Tom: this is just a single operator processed normally + int32_t result = m_op[0]->compute_volume(m_op[0]->phase(), am_offset) >> rshift; + + // Top Cymbal: this uses the envelope from operator 17 (channel 8), + // and the operator 13/17 phase select to compute the phase + uint32_t phase = 0x100 | (phase_select << 9); + result += m_op[1]->compute_volume(phase, am_offset) >> rshift; + result = clamp(result, -clipmax - 1, clipmax); + + // add to the output + add_to_output(m_choffs, output, result * 2); +} + + + +//********************************************************* +// FM ENGINE BASE +//********************************************************* + +//------------------------------------------------- +// fm_engine_base - constructor +//------------------------------------------------- + +template +fm_engine_base::fm_engine_base(ymfm_interface &intf) : + m_intf(intf), + m_env_counter(0), + m_status(0), + m_clock_prescale(RegisterType::DEFAULT_PRESCALE), + m_irq_mask(STATUS_TIMERA | STATUS_TIMERB), + m_irq_state(0), + m_timer_running{0,0}, + m_active_channels(ALL_CHANNELS), + m_modified_channels(ALL_CHANNELS), + m_prepare_count(0) +{ + // inform the interface of their engine + m_intf.m_engine = this; + + // create the channels + for (uint32_t chnum = 0; chnum < CHANNELS; chnum++) + m_channel[chnum] = std::make_unique>(*this, RegisterType::channel_offset(chnum)); + + // create the operators + for (uint32_t opnum = 0; opnum < OPERATORS; opnum++) + m_operator[opnum] = std::make_unique>(*this, RegisterType::operator_offset(opnum)); + +#if (DEBUG_LOG_WAVFILES) + for (uint32_t chnum = 0; chnum < CHANNELS; chnum++) + m_wavfile[chnum].set_index(chnum); +#endif + + // do the initial operator assignment + assign_operators(); +} + + +//------------------------------------------------- +// reset - reset the overall state +//------------------------------------------------- + +template +void fm_engine_base::reset() +{ + // reset all status bits + set_reset_status(0, 0xff); + + // register type-specific initialization + m_regs.reset(); + + // explicitly write to the mode register since it has side-effects + // QUESTION: old cores initialize this to 0x30 -- who is right? + write(RegisterType::REG_MODE, 0); + + // reset the channels + for (auto &chan : m_channel) + chan->reset(); + + // reset the operators + for (auto &op : m_operator) + op->reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +template +void fm_engine_base::save_restore(ymfm_saved_state &state) +{ + // save our data + state.save_restore(m_env_counter); + state.save_restore(m_status); + state.save_restore(m_clock_prescale); + state.save_restore(m_irq_mask); + state.save_restore(m_irq_state); + state.save_restore(m_timer_running[0]); + state.save_restore(m_timer_running[1]); + state.save_restore(m_total_clocks); + + // save the register/family data + m_regs.save_restore(state); + + // save channel data + for (uint32_t chnum = 0; chnum < CHANNELS; chnum++) + m_channel[chnum]->save_restore(state); + + // save operator data + for (uint32_t opnum = 0; opnum < OPERATORS; opnum++) + m_operator[opnum]->save_restore(state); + + // invalidate any caches + invalidate_caches(); +} + + +//------------------------------------------------- +// clock - iterate over all channels, clocking +// them forward one step +//------------------------------------------------- + +template +uint32_t fm_engine_base::clock(uint32_t chanmask) +{ + // update the clock counter + m_total_clocks++; + + // if something was modified, prepare + // also prepare every 4k samples to catch ending notes + if (m_modified_channels != 0 || m_prepare_count++ >= 4096) + { + // reassign operators to channels if dynamic + if (RegisterType::DYNAMIC_OPS) + assign_operators(); + + // call each channel to prepare + m_active_channels = 0; + for (uint32_t chnum = 0; chnum < CHANNELS; chnum++) + if (bitfield(chanmask, chnum)) + if (m_channel[chnum]->prepare()) + m_active_channels |= 1 << chnum; + + // reset the modified channels and prepare count + m_modified_channels = m_prepare_count = 0; + } + + // if the envelope clock divider is 1, just increment by 4; + // otherwise, increment by 1 and manually wrap when we reach the divide count + if (RegisterType::EG_CLOCK_DIVIDER == 1) + m_env_counter += 4; + else if (bitfield(++m_env_counter, 0, 2) == RegisterType::EG_CLOCK_DIVIDER) + m_env_counter += 4 - RegisterType::EG_CLOCK_DIVIDER; + + // clock the noise generator + int32_t lfo_raw_pm = m_regs.clock_noise_and_lfo(); + + // now update the state of all the channels and operators + for (uint32_t chnum = 0; chnum < CHANNELS; chnum++) + if (bitfield(chanmask, chnum)) + m_channel[chnum]->clock(m_env_counter, lfo_raw_pm); + + // return the envelope counter as it is used to clock ADPCM-A + return m_env_counter; +} + + +//------------------------------------------------- +// output - compute a sum over the relevant +// channels +//------------------------------------------------- + +template +void fm_engine_base::output(output_data &output, uint32_t rshift, int32_t clipmax, uint32_t chanmask) const +{ + // mask out some channels for debug purposes + chanmask &= debug::GLOBAL_FM_CHANNEL_MASK; + + // mask out inactive channels + if (!DEBUG_LOG_WAVFILES) + chanmask &= m_active_channels; + + // handle the rhythm case, where some of the operators are dedicated + // to percussion (this is an OPL-specific feature) + if (m_regs.rhythm_enable()) + { + // we don't support the OPM noise channel here; ensure it is off + assert(m_regs.noise_enable() == 0); + + // precompute the operator 13+17 phase selection value + uint32_t op13phase = m_operator[13]->phase(); + uint32_t op17phase = m_operator[17]->phase(); + uint32_t phase_select = (bitfield(op13phase, 2) ^ bitfield(op13phase, 7)) | bitfield(op13phase, 3) | (bitfield(op17phase, 5) ^ bitfield(op17phase, 3)); + + // sum over all the desired channels + for (uint32_t chnum = 0; chnum < CHANNELS; chnum++) + if (bitfield(chanmask, chnum)) + { +#if (DEBUG_LOG_WAVFILES) + auto reference = output; +#endif + if (chnum == 6) + m_channel[chnum]->output_rhythm_ch6(output, rshift, clipmax); + else if (chnum == 7) + m_channel[chnum]->output_rhythm_ch7(phase_select, output, rshift, clipmax); + else if (chnum == 8) + m_channel[chnum]->output_rhythm_ch8(phase_select, output, rshift, clipmax); + else if (m_channel[chnum]->is4op()) + m_channel[chnum]->output_4op(output, rshift, clipmax); + else + m_channel[chnum]->output_2op(output, rshift, clipmax); +#if (DEBUG_LOG_WAVFILES) + m_wavfile[chnum].add(output, reference); +#endif + } + } + else + { + // sum over all the desired channels + for (uint32_t chnum = 0; chnum < CHANNELS; chnum++) + if (bitfield(chanmask, chnum)) + { +#if (DEBUG_LOG_WAVFILES) + auto reference = output; +#endif + if (m_channel[chnum]->is4op()) + m_channel[chnum]->output_4op(output, rshift, clipmax); + else + m_channel[chnum]->output_2op(output, rshift, clipmax); +#if (DEBUG_LOG_WAVFILES) + m_wavfile[chnum].add(output, reference); +#endif + } + } +} + + +//------------------------------------------------- +// write - handle writes to the OPN registers +//------------------------------------------------- + +template +void fm_engine_base::write(uint16_t regnum, uint8_t data) +{ + debug::log_fm_write("%03X = %02X\n", regnum, data); + + // special case: writes to the mode register can impact IRQs; + // schedule these writes to ensure ordering with timers + if (regnum == RegisterType::REG_MODE) + { + m_intf.ymfm_sync_mode_write(data); + return; + } + + // for now just mark all channels as modified + m_modified_channels = ALL_CHANNELS; + + // most writes are passive, consumed only when needed + uint32_t keyon_channel; + uint32_t keyon_opmask; + if (m_regs.write(regnum, data, keyon_channel, keyon_opmask)) + { + // handle writes to the keyon register(s) + if (keyon_channel < CHANNELS) + { + // normal channel on/off + m_channel[keyon_channel]->keyonoff(keyon_opmask, KEYON_NORMAL, keyon_channel); + } + else if (CHANNELS >= 9 && keyon_channel == RegisterType::RHYTHM_CHANNEL) + { + // special case for the OPL rhythm channels + m_channel[6]->keyonoff(bitfield(keyon_opmask, 4) ? 3 : 0, KEYON_RHYTHM, 6); + m_channel[7]->keyonoff(bitfield(keyon_opmask, 0) | (bitfield(keyon_opmask, 3) << 1), KEYON_RHYTHM, 7); + m_channel[8]->keyonoff(bitfield(keyon_opmask, 2) | (bitfield(keyon_opmask, 1) << 1), KEYON_RHYTHM, 8); + } + } +} + + +//------------------------------------------------- +// status - return the current state of the +// status flags +//------------------------------------------------- + +template +uint8_t fm_engine_base::status() const +{ + return m_status & ~STATUS_BUSY & ~m_regs.status_mask(); +} + + +//------------------------------------------------- +// assign_operators - get the current mapping of +// operators to channels and assign them all +//------------------------------------------------- + +template +void fm_engine_base::assign_operators() +{ + typename RegisterType::operator_mapping map; + m_regs.operator_map(map); + + for (uint32_t chnum = 0; chnum < CHANNELS; chnum++) + for (uint32_t index = 0; index < 4; index++) + { + uint32_t opnum = bitfield(map.chan[chnum], 8 * index, 8); + m_channel[chnum]->assign(index, (opnum == 0xff) ? nullptr : m_operator[opnum].get()); + } +} + + +//------------------------------------------------- +// update_timer - update the state of the given +// timer +//------------------------------------------------- + +template +void fm_engine_base::update_timer(uint32_t tnum, uint32_t enable, int32_t delta_clocks) +{ + // if the timer is live, but not currently enabled, set the timer + if (enable && !m_timer_running[tnum]) + { + // period comes from the registers, and is different for each + uint32_t period = (tnum == 0) ? (1024 - m_regs.timer_a_value()) : 16 * (256 - m_regs.timer_b_value()); + + // caller can also specify a delta to account for other effects + period += delta_clocks; + + // reset it + m_intf.ymfm_set_timer(tnum, period * OPERATORS * m_clock_prescale); + m_timer_running[tnum] = 1; + } + + // if the timer is not live, ensure it is not enabled + else if (!enable) + { + m_intf.ymfm_set_timer(tnum, -1); + m_timer_running[tnum] = 0; + } +} + + +//------------------------------------------------- +// engine_timer_expired - timer has expired - signal +// status and possibly IRQs +//------------------------------------------------- + +template +void fm_engine_base::engine_timer_expired(uint32_t tnum) +{ + // update status + if (tnum == 0 && m_regs.enable_timer_a()) + set_reset_status(STATUS_TIMERA, 0); + else if (tnum == 1 && m_regs.enable_timer_b()) + set_reset_status(STATUS_TIMERB, 0); + + // if timer A fired in CSM mode, trigger CSM on all relevant channels + if (tnum == 0 && m_regs.csm()) + for (uint32_t chnum = 0; chnum < CHANNELS; chnum++) + if (bitfield(RegisterType::CSM_TRIGGER_MASK, chnum)) + { + m_channel[chnum]->keyonoff(1, KEYON_CSM, chnum); + m_modified_channels |= 1 << chnum; + } + + // reset + m_timer_running[tnum] = false; + update_timer(tnum, 1, 0); +} + + +//------------------------------------------------- +// check_interrupts - check the interrupt sources +// for interrupts +//------------------------------------------------- + +template +void fm_engine_base::engine_check_interrupts() +{ + // update the state + uint8_t old_state = m_irq_state; + m_irq_state = ((m_status & m_irq_mask & ~m_regs.status_mask()) != 0); + + // set the IRQ status bit + if (m_irq_state) + m_status |= STATUS_IRQ; + else + m_status &= ~STATUS_IRQ; + + // if changed, signal the new state + if (old_state != m_irq_state) + m_intf.ymfm_update_irq(m_irq_state ? true : false); +} + + +//------------------------------------------------- +// engine_mode_write - handle a mode register write +// via timer callback +//------------------------------------------------- + +template +void fm_engine_base::engine_mode_write(uint8_t data) +{ + // mark all channels as modified + m_modified_channels = ALL_CHANNELS; + + // actually write the mode register now + uint32_t dummy1, dummy2; + m_regs.write(RegisterType::REG_MODE, data, dummy1, dummy2); + + // reset IRQ status -- when written, all other bits are ignored + // QUESTION: should this maybe just reset the IRQ bit and not all the bits? + // That is, check_interrupts would only set, this would only clear? + if (m_regs.irq_reset()) + set_reset_status(0, 0x78); + else + { + // reset timer status + uint8_t reset_mask = 0; + if (m_regs.reset_timer_b()) + reset_mask |= RegisterType::STATUS_TIMERB; + if (m_regs.reset_timer_a()) + reset_mask |= RegisterType::STATUS_TIMERA; + set_reset_status(0, reset_mask); + + // load timers; note that timer B gets a small negative adjustment because + // the *16 multiplier is free-running, so the first tick of the clock + // is a bit shorter + update_timer(1, m_regs.load_timer_b(), -(m_total_clocks & 15)); + update_timer(0, m_regs.load_timer_a(), 0); + } +} + +} diff --git a/src/sound/ymfm/ymfm_misc.cpp b/src/sound/ymfm/ymfm_misc.cpp new file mode 100644 index 000000000..fd0575f55 --- /dev/null +++ b/src/sound/ymfm/ymfm_misc.cpp @@ -0,0 +1,175 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#include "ymfm_misc.h" + +namespace ymfm +{ + +//********************************************************* +// YM2149 +//********************************************************* + +//------------------------------------------------- +// ym2149 - constructor +//------------------------------------------------- + +ym2149::ym2149(ymfm_interface &intf) : + m_address(0), + m_ssg(intf) +{ +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void ym2149::reset() +{ + // reset the engines + m_ssg.reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ym2149::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_address); + m_ssg.save_restore(state); +} + + +//------------------------------------------------- +// read_data - read the data register +//------------------------------------------------- + +uint8_t ym2149::read_data() +{ + return m_ssg.read(m_address & 0x0f); +} + + +//------------------------------------------------- +// read - handle a read from the device +//------------------------------------------------- + +uint8_t ym2149::read(uint32_t offset) +{ + uint8_t result = 0xff; + switch (offset & 3) // BC2,BC1 + { + case 0: // inactive + break; + + case 1: // address + break; + + case 2: // inactive + break; + + case 3: // read + result = read_data(); + break; + } + return result; +} + + +//------------------------------------------------- +// write_address - handle a write to the address +// register +//------------------------------------------------- + +void ym2149::write_address(uint8_t data) +{ + // just set the address + m_address = data; +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym2149::write_data(uint8_t data) +{ + m_ssg.write(m_address & 0x0f, data); +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym2149::write(uint32_t offset, uint8_t data) +{ + switch (offset & 3) // BC2,BC1 + { + case 0: // address + write_address(data); + break; + + case 1: // inactive + break; + + case 2: // write + write_data(data); + break; + + case 3: // address + write_address(data); + break; + } +} + + +//------------------------------------------------- +// generate - generate samples of SSG sound +//------------------------------------------------- + +void ym2149::generate(output_data *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + // clock the SSG + m_ssg.clock(); + + // YM2149 keeps the three SSG outputs independent + m_ssg.output(*output); + } +} + +} diff --git a/src/sound/ymfm/ymfm_misc.h b/src/sound/ymfm/ymfm_misc.h new file mode 100644 index 000000000..628d128f6 --- /dev/null +++ b/src/sound/ymfm/ymfm_misc.h @@ -0,0 +1,93 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#ifndef YMFM_MISC_H +#define YMFM_MISC_H + +#pragma once + +#include "ymfm.h" +#include "ymfm_adpcm.h" +#include "ymfm_ssg.h" + +namespace ymfm +{ + +//********************************************************* +// SSG IMPLEMENTATION CLASSES +//********************************************************* + +// ======================> ym2149 + +// ym2149 is just an SSG with no FM part, but we expose FM-like parts so that it +// integrates smoothly with everything else; they just don't do anything +class ym2149 +{ +public: + static constexpr uint32_t OUTPUTS = ssg_engine::OUTPUTS; + static constexpr uint32_t SSG_OUTPUTS = ssg_engine::OUTPUTS; + using output_data = ymfm_output; + + // constructor + ym2149(ymfm_interface &intf); + + // configuration + void ssg_override(ssg_override &intf) { m_ssg.override(intf); } + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const { return input_clock / ssg_engine::CLOCK_DIVIDER / 8; } + + // read access + uint8_t read_data(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate one sample of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // internal state + uint8_t m_address; // address register + ssg_engine m_ssg; // SSG engine +}; + +} + +#endif // YMFM_MISC_H diff --git a/src/sound/ymfm/ymfm_opl.cpp b/src/sound/ymfm/ymfm_opl.cpp new file mode 100644 index 000000000..86215c5b2 --- /dev/null +++ b/src/sound/ymfm/ymfm_opl.cpp @@ -0,0 +1,2209 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#include "ymfm_opl.h" +#include "ymfm_fm.ipp" + +namespace ymfm +{ + +//------------------------------------------------- +// opl_key_scale_atten - converts an +// OPL concatenated block (3 bits) and fnum +// (10 bits) into an attenuation offset; values +// here are for 6dB/octave, in 0.75dB units +// (matching total level LSB) +//------------------------------------------------- + +inline uint32_t opl_key_scale_atten(uint32_t block, uint32_t fnum_4msb) +{ + // this table uses the top 4 bits of FNUM and are the maximal values + // (for when block == 7). Values for other blocks can be computed by + // subtracting 8 for each block below 7. + static uint8_t const fnum_to_atten[16] = { 0,24,32,37,40,43,45,47,48,50,51,52,53,54,55,56 }; + int32_t result = fnum_to_atten[fnum_4msb] - 8 * (block ^ 7); + return std::max(0, result); +} + + +//********************************************************* +// OPL REGISTERS +//********************************************************* + +//------------------------------------------------- +// opl_registers_base - constructor +//------------------------------------------------- + +template +opl_registers_base::opl_registers_base() : + m_lfo_am_counter(0), + m_lfo_pm_counter(0), + m_noise_lfsr(1), + m_lfo_am(0) +{ + // create these pointers to appease overzealous compilers checking array + // bounds in unreachable code (looking at you, clang) + uint16_t *wf0 = &m_waveform[0][0]; + uint16_t *wf1 = &m_waveform[1 % WAVEFORMS][0]; + uint16_t *wf2 = &m_waveform[2 % WAVEFORMS][0]; + uint16_t *wf3 = &m_waveform[3 % WAVEFORMS][0]; + uint16_t *wf4 = &m_waveform[4 % WAVEFORMS][0]; + uint16_t *wf5 = &m_waveform[5 % WAVEFORMS][0]; + uint16_t *wf6 = &m_waveform[6 % WAVEFORMS][0]; + uint16_t *wf7 = &m_waveform[7 % WAVEFORMS][0]; + + // create the waveforms + for (uint32_t index = 0; index < WAVEFORM_LENGTH; index++) + wf0[index] = abs_sin_attenuation(index) | (bitfield(index, 9) << 15); + + if (WAVEFORMS >= 4) + { + uint16_t zeroval = wf0[0]; + for (uint32_t index = 0; index < WAVEFORM_LENGTH; index++) + { + wf1[index] = bitfield(index, 9) ? zeroval : wf0[index]; + wf2[index] = wf0[index] & 0x7fff; + wf3[index] = bitfield(index, 8) ? zeroval : (wf0[index] & 0x7fff); + if (WAVEFORMS >= 8) + { + wf4[index] = bitfield(index, 9) ? zeroval : wf0[index * 2]; + wf5[index] = bitfield(index, 9) ? zeroval : wf0[(index * 2) & 0x1ff]; + wf6[index] = bitfield(index, 9) << 15; + wf7[index] = (bitfield(index, 9) ? (index ^ 0x13ff) : index) << 3; + } + } + } +} + + +//------------------------------------------------- +// reset - reset to initial state +//------------------------------------------------- + +template +void opl_registers_base::reset() +{ + std::fill_n(&m_regdata[0], REGISTERS, 0); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +template +void opl_registers_base::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_lfo_am_counter); + state.save_restore(m_lfo_pm_counter); + state.save_restore(m_lfo_am); + state.save_restore(m_noise_lfsr); + state.save_restore(m_regdata); +} + + +//------------------------------------------------- +// operator_map - return an array of operator +// indices for each channel; for OPL this is fixed +//------------------------------------------------- + +template +void opl_registers_base::operator_map(operator_mapping &dest) const +{ + if (Revision <= 2) + { + // OPL/OPL2 has a fixed map, all 2 operators + static const operator_mapping s_fixed_map = + { { + operator_list( 0, 3 ), // Channel 0 operators + operator_list( 1, 4 ), // Channel 1 operators + operator_list( 2, 5 ), // Channel 2 operators + operator_list( 6, 9 ), // Channel 3 operators + operator_list( 7, 10 ), // Channel 4 operators + operator_list( 8, 11 ), // Channel 5 operators + operator_list( 12, 15 ), // Channel 6 operators + operator_list( 13, 16 ), // Channel 7 operators + operator_list( 14, 17 ), // Channel 8 operators + } }; + dest = s_fixed_map; + } + else + { + // OPL3/OPL4 can be configured for 2 or 4 operators + uint32_t fourop = fourop_enable(); + + dest.chan[ 0] = bitfield(fourop, 0) ? operator_list( 0, 3, 6, 9 ) : operator_list( 0, 3 ); + dest.chan[ 1] = bitfield(fourop, 1) ? operator_list( 1, 4, 7, 10 ) : operator_list( 1, 4 ); + dest.chan[ 2] = bitfield(fourop, 2) ? operator_list( 2, 5, 8, 11 ) : operator_list( 2, 5 ); + dest.chan[ 3] = bitfield(fourop, 0) ? operator_list() : operator_list( 6, 9 ); + dest.chan[ 4] = bitfield(fourop, 1) ? operator_list() : operator_list( 7, 10 ); + dest.chan[ 5] = bitfield(fourop, 2) ? operator_list() : operator_list( 8, 11 ); + dest.chan[ 6] = operator_list( 12, 15 ); + dest.chan[ 7] = operator_list( 13, 16 ); + dest.chan[ 8] = operator_list( 14, 17 ); + + dest.chan[ 9] = bitfield(fourop, 3) ? operator_list( 18, 21, 24, 27 ) : operator_list( 18, 21 ); + dest.chan[10] = bitfield(fourop, 4) ? operator_list( 19, 22, 25, 28 ) : operator_list( 19, 22 ); + dest.chan[11] = bitfield(fourop, 5) ? operator_list( 20, 23, 26, 29 ) : operator_list( 20, 23 ); + dest.chan[12] = bitfield(fourop, 3) ? operator_list() : operator_list( 24, 27 ); + dest.chan[13] = bitfield(fourop, 4) ? operator_list() : operator_list( 25, 28 ); + dest.chan[14] = bitfield(fourop, 5) ? operator_list() : operator_list( 26, 29 ); + dest.chan[15] = operator_list( 30, 33 ); + dest.chan[16] = operator_list( 31, 34 ); + dest.chan[17] = operator_list( 32, 35 ); + } +} + + +//------------------------------------------------- +// write - handle writes to the register array +//------------------------------------------------- + +template +bool opl_registers_base::write(uint16_t index, uint8_t data, uint32_t &channel, uint32_t &opmask) +{ + assert(index < REGISTERS); + + // writes to the mode register with high bit set ignore the low bits + if (index == REG_MODE && bitfield(data, 7) != 0) + m_regdata[index] |= 0x80; + else + m_regdata[index] = data; + + // handle writes to the rhythm keyons + if (index == 0xbd) + { + channel = RHYTHM_CHANNEL; + opmask = bitfield(data, 5) ? bitfield(data, 0, 5) : 0; + return true; + } + + // handle writes to the channel keyons + if ((index & 0xf0) == 0xb0) + { + channel = index & 0x0f; + if (channel < 9) + { + if (IsOpl3Plus) + channel += 9 * bitfield(index, 8); + opmask = bitfield(data, 5) ? 15 : 0; + return true; + } + } + return false; +} + + +//------------------------------------------------- +// clock_noise_and_lfo - clock the noise and LFO, +// handling clock division, depth, and waveform +// computations +//------------------------------------------------- + +static int32_t opl_clock_noise_and_lfo(uint32_t &noise_lfsr, uint16_t &lfo_am_counter, uint16_t &lfo_pm_counter, uint8_t &lfo_am, uint32_t am_depth, uint32_t pm_depth) +{ + // OPL has a 23-bit noise generator for the rhythm section, running at + // a constant rate, used only for percussion input + noise_lfsr <<= 1; + noise_lfsr |= bitfield(noise_lfsr, 23) ^ bitfield(noise_lfsr, 9) ^ bitfield(noise_lfsr, 8) ^ bitfield(noise_lfsr, 1); + + // OPL has two fixed-frequency LFOs, one for AM, one for PM + + // the AM LFO has 210*64 steps; at a nominal 50kHz output, + // this equates to a period of 50000/(210*64) = 3.72Hz + uint32_t am_counter = lfo_am_counter++; + if (am_counter >= 210*64 - 1) + lfo_am_counter = 0; + + // low 8 bits are fractional; depth 0 is divided by 2, while depth 1 is times 2 + int shift = 9 - 2 * am_depth; + + // AM value is the upper bits of the value, inverted across the midpoint + // to produce a triangle + lfo_am = ((am_counter < 105*64) ? am_counter : (210*64+63 - am_counter)) >> shift; + + // the PM LFO has 8192 steps, or a nominal period of 6.1Hz + uint32_t pm_counter = lfo_pm_counter++; + + // PM LFO is broken into 8 chunks, each lasting 1024 steps; the PM value + // depends on the upper bits of FNUM, so this value is a fraction and + // sign to apply to that value, as a 1.3 value + static int8_t const pm_scale[8] = { 8, 4, 0, -4, -8, -4, 0, 4 }; + return pm_scale[bitfield(pm_counter, 10, 3)] >> (pm_depth ^ 1); +} + +template +int32_t opl_registers_base::clock_noise_and_lfo() +{ + return opl_clock_noise_and_lfo(m_noise_lfsr, m_lfo_am_counter, m_lfo_pm_counter, m_lfo_am, lfo_am_depth(), lfo_pm_depth()); +} + + +//------------------------------------------------- +// cache_operator_data - fill the operator cache +// with prefetched data; note that this code is +// also used by ymopna_registers, so it must +// handle upper channels cleanly +//------------------------------------------------- + +template +void opl_registers_base::cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache) +{ + // set up the easy stuff + cache.waveform = &m_waveform[op_waveform(opoffs) % WAVEFORMS][0]; + + // get frequency from the channel + uint32_t block_freq = cache.block_freq = ch_block_freq(choffs); + + // compute the keycode: block_freq is: + // + // 111 | + // 21098|76543210 + // BBBFF|FFFFFFFF + // ^^^?? + // + // the 4-bit keycode uses the top 3 bits plus one of the next two bits + uint32_t keycode = bitfield(block_freq, 10, 3) << 1; + + // lowest bit is determined by note_select(); note that it is + // actually reversed from what the manual says, however + keycode |= bitfield(block_freq, 9 - note_select(), 1); + + // no detune adjustment on OPL + cache.detune = 0; + + // multiple value, as an x.1 value (0 means 0.5) + // replace the low bit with a table lookup to give 0,1,2,3,4,5,6,7,8,9,10,10,12,12,15,15 + uint32_t multiple = op_multiple(opoffs); + cache.multiple = ((multiple & 0xe) | bitfield(0xc2aa, multiple)) * 2; + if (cache.multiple == 0) + cache.multiple = 1; + + // phase step, or PHASE_STEP_DYNAMIC if PM is active; this depends on block_freq, detune, + // and multiple, so compute it after we've done those + if (op_lfo_pm_enable(opoffs) == 0) + cache.phase_step = compute_phase_step(choffs, opoffs, cache, 0); + else + cache.phase_step = opdata_cache::PHASE_STEP_DYNAMIC; + + // total level, scaled by 8 + cache.total_level = op_total_level(opoffs) << 3; + + // pre-add key scale level + uint32_t ksl = op_ksl(opoffs); + if (ksl != 0) + cache.total_level += opl_key_scale_atten(bitfield(block_freq, 10, 3), bitfield(block_freq, 6, 4)) << ksl; + + // 4-bit sustain level, but 15 means 31 so effectively 5 bits + cache.eg_sustain = op_sustain_level(opoffs); + cache.eg_sustain |= (cache.eg_sustain + 1) & 0x10; + cache.eg_sustain <<= 5; + + // determine KSR adjustment for enevlope rates + uint32_t ksrval = keycode >> (2 * (op_ksr(opoffs) ^ 1)); + cache.eg_rate[EG_ATTACK] = effective_rate(op_attack_rate(opoffs) * 4, ksrval); + cache.eg_rate[EG_DECAY] = effective_rate(op_decay_rate(opoffs) * 4, ksrval); + cache.eg_rate[EG_SUSTAIN] = op_eg_sustain(opoffs) ? 0 : effective_rate(op_release_rate(opoffs) * 4, ksrval); + cache.eg_rate[EG_RELEASE] = effective_rate(op_release_rate(opoffs) * 4, ksrval); + cache.eg_rate[EG_DEPRESS] = 0x3f; +} + + +//------------------------------------------------- +// compute_phase_step - compute the phase step +//------------------------------------------------- + +static uint32_t opl_compute_phase_step(uint32_t block_freq, uint32_t multiple, int32_t lfo_raw_pm) +{ + // OPL phase calculation has no detuning, but uses FNUMs like + // the OPN version, and computes PM a bit differently + + // extract frequency number as a 12-bit fraction + uint32_t fnum = bitfield(block_freq, 0, 10) << 2; + + // apply the phase adjustment based on the upper 3 bits + // of FNUM and the PM depth parameters + fnum += (lfo_raw_pm * bitfield(block_freq, 7, 3)) >> 1; + + // keep fnum to 12 bits + fnum &= 0xfff; + + // apply block shift to compute phase step + uint32_t block = bitfield(block_freq, 10, 3); + uint32_t phase_step = (fnum << block) >> 2; + + // apply frequency multiplier (which is cached as an x.1 value) + return (phase_step * multiple) >> 1; +} + +template +uint32_t opl_registers_base::compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm) +{ + return opl_compute_phase_step(cache.block_freq, cache.multiple, op_lfo_pm_enable(opoffs) ? lfo_raw_pm : 0); +} + + +//------------------------------------------------- +// log_keyon - log a key-on event +//------------------------------------------------- + +template +std::string opl_registers_base::log_keyon(uint32_t choffs, uint32_t opoffs) +{ + uint32_t chnum = (choffs & 15) + 9 * bitfield(choffs, 8); + uint32_t opnum = (opoffs & 31) - 2 * ((opoffs & 31) / 8) + 18 * bitfield(opoffs, 8); + + char buffer[256]; + char *end = &buffer[0]; + + end += sprintf(end, "%2u.%02u freq=%04X fb=%u alg=%X mul=%X tl=%02X ksr=%u ns=%u ksl=%u adr=%X/%X/%X sl=%X sus=%u", + chnum, opnum, + ch_block_freq(choffs), + ch_feedback(choffs), + ch_algorithm(choffs), + op_multiple(opoffs), + op_total_level(opoffs), + op_ksr(opoffs), + note_select(), + op_ksl(opoffs), + op_attack_rate(opoffs), + op_decay_rate(opoffs), + op_release_rate(opoffs), + op_sustain_level(opoffs), + op_eg_sustain(opoffs)); + + if (OUTPUTS > 1) + end += sprintf(end, " out=%c%c%c%c", + ch_output_0(choffs) ? 'L' : '-', + ch_output_1(choffs) ? 'R' : '-', + ch_output_2(choffs) ? '0' : '-', + ch_output_3(choffs) ? '1' : '-'); + if (op_lfo_am_enable(opoffs) != 0) + end += sprintf(end, " am=%u", lfo_am_depth()); + if (op_lfo_pm_enable(opoffs) != 0) + end += sprintf(end, " pm=%u", lfo_pm_depth()); + if (waveform_enable() && op_waveform(opoffs) != 0) + end += sprintf(end, " wf=%u", op_waveform(opoffs)); + if (is_rhythm(choffs)) + end += sprintf(end, " rhy=1"); + if (DYNAMIC_OPS) + { + operator_mapping map; + operator_map(map); + if (bitfield(map.chan[chnum], 16, 8) != 0xff) + end += sprintf(end, " 4op"); + } + + return buffer; +} + + +//********************************************************* +// OPLL SPECIFICS +//********************************************************* + +//------------------------------------------------- +// opll_registers - constructor +//------------------------------------------------- + +opll_registers::opll_registers() : + m_lfo_am_counter(0), + m_lfo_pm_counter(0), + m_noise_lfsr(1), + m_lfo_am(0) +{ + // create the waveforms + for (uint32_t index = 0; index < WAVEFORM_LENGTH; index++) + m_waveform[0][index] = abs_sin_attenuation(index) | (bitfield(index, 9) << 15); + + uint16_t zeroval = m_waveform[0][0]; + for (uint32_t index = 0; index < WAVEFORM_LENGTH; index++) + m_waveform[1][index] = bitfield(index, 9) ? zeroval : m_waveform[0][index]; + + // initialize the instruments to something sane + for (uint32_t choffs = 0; choffs < CHANNELS; choffs++) + m_chinst[choffs] = &m_regdata[0]; + for (uint32_t opoffs = 0; opoffs < OPERATORS; opoffs++) + m_opinst[opoffs] = &m_regdata[bitfield(opoffs, 0)]; +} + + +//------------------------------------------------- +// reset - reset to initial state +//------------------------------------------------- + +void opll_registers::reset() +{ + std::fill_n(&m_regdata[0], REGISTERS, 0); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void opll_registers::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_lfo_am_counter); + state.save_restore(m_lfo_pm_counter); + state.save_restore(m_lfo_am); + state.save_restore(m_noise_lfsr); + state.save_restore(m_regdata); +} + + +//------------------------------------------------- +// operator_map - return an array of operator +// indices for each channel; for OPLL this is fixed +//------------------------------------------------- + +void opll_registers::operator_map(operator_mapping &dest) const +{ + static const operator_mapping s_fixed_map = + { { + operator_list( 0, 1 ), // Channel 0 operators + operator_list( 2, 3 ), // Channel 1 operators + operator_list( 4, 5 ), // Channel 2 operators + operator_list( 6, 7 ), // Channel 3 operators + operator_list( 8, 9 ), // Channel 4 operators + operator_list( 10, 11 ), // Channel 5 operators + operator_list( 12, 13 ), // Channel 6 operators + operator_list( 14, 15 ), // Channel 7 operators + operator_list( 16, 17 ), // Channel 8 operators + } }; + dest = s_fixed_map; +} + + +//------------------------------------------------- +// write - handle writes to the register array; +// note that this code is also used by +// ymopl3_registers, so it must handle upper +// channels cleanly +//------------------------------------------------- + +bool opll_registers::write(uint16_t index, uint8_t data, uint32_t &channel, uint32_t &opmask) +{ + // unclear the address is masked down to 6 bits or if writes above + // the register top are ignored; assuming the latter for now + if (index >= REGISTERS) + return false; + + // write the new data + m_regdata[index] = data; + + // handle writes to the rhythm keyons + if (index == 0x0e) + { + channel = RHYTHM_CHANNEL; + opmask = bitfield(data, 5) ? bitfield(data, 0, 5) : 0; + return true; + } + + // handle writes to the channel keyons + if ((index & 0xf0) == 0x20) + { + channel = index & 0x0f; + if (channel < CHANNELS) + { + opmask = bitfield(data, 4) ? 3 : 0; + return true; + } + } + return false; +} + + +//------------------------------------------------- +// clock_noise_and_lfo - clock the noise and LFO, +// handling clock division, depth, and waveform +// computations +//------------------------------------------------- + +int32_t opll_registers::clock_noise_and_lfo() +{ + // implementation is the same as OPL with fixed depths + return opl_clock_noise_and_lfo(m_noise_lfsr, m_lfo_am_counter, m_lfo_pm_counter, m_lfo_am, 1, 1); +} + + +//------------------------------------------------- +// cache_operator_data - fill the operator cache +// with prefetched data; note that this code is +// also used by ymopna_registers, so it must +// handle upper channels cleanly +//------------------------------------------------- + +void opll_registers::cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache) +{ + // first set up the instrument data + uint32_t instrument = ch_instrument(choffs); + if (rhythm_enable() && choffs >= 6) + m_chinst[choffs] = &m_instdata[8 * (15 + (choffs - 6))]; + else + m_chinst[choffs] = (instrument == 0) ? &m_regdata[0] : &m_instdata[8 * (instrument - 1)]; + m_opinst[opoffs] = m_chinst[choffs] + bitfield(opoffs, 0); + + // set up the easy stuff + cache.waveform = &m_waveform[op_waveform(opoffs) % WAVEFORMS][0]; + + // get frequency from the channel + uint32_t block_freq = cache.block_freq = ch_block_freq(choffs); + + // compute the keycode: block_freq is: + // + // 11 | + // 1098|76543210 + // BBBF|FFFFFFFF + // ^^^^ + // + // the 4-bit keycode uses the top 4 bits + uint32_t keycode = bitfield(block_freq, 8, 4); + + // no detune adjustment on OPLL + cache.detune = 0; + + // multiple value, as an x.1 value (0 means 0.5) + // replace the low bit with a table lookup to give 0,1,2,3,4,5,6,7,8,9,10,10,12,12,15,15 + uint32_t multiple = op_multiple(opoffs); + cache.multiple = ((multiple & 0xe) | bitfield(0xc2aa, multiple)) * 2; + if (cache.multiple == 0) + cache.multiple = 1; + + // phase step, or PHASE_STEP_DYNAMIC if PM is active; this depends on + // block_freq, detune, and multiple, so compute it after we've done those + if (op_lfo_pm_enable(opoffs) == 0) + cache.phase_step = compute_phase_step(choffs, opoffs, cache, 0); + else + cache.phase_step = opdata_cache::PHASE_STEP_DYNAMIC; + + // total level, scaled by 8; for non-rhythm operator 0, this is the total + // level from the instrument data; for other operators it is 4*volume + if (bitfield(opoffs, 0) == 1 || (rhythm_enable() && choffs >= 7)) + cache.total_level = op_volume(opoffs) * 4; + else + cache.total_level = ch_total_level(choffs); + cache.total_level <<= 3; + + // pre-add key scale level + uint32_t ksl = op_ksl(opoffs); + if (ksl != 0) + cache.total_level += opl_key_scale_atten(bitfield(block_freq, 9, 3), bitfield(block_freq, 5, 4)) << ksl; + + // 4-bit sustain level, but 15 means 31 so effectively 5 bits + cache.eg_sustain = op_sustain_level(opoffs); + cache.eg_sustain |= (cache.eg_sustain + 1) & 0x10; + cache.eg_sustain <<= 5; + + // The envelope diagram in the YM2413 datasheet gives values for these + // in ms from 0->48dB. The attack/decay tables give values in ms from + // 0->96dB, so to pick an equivalent decay rate, we want to find the + // closest match that is 2x the 0->48dB value: + // + // DP = 10ms (0->48db) -> 20ms (0->96db); decay of 12 gives 19.20ms + // RR = 310ms (0->48db) -> 620ms (0->96db); decay of 7 gives 613.76ms + // RS = 1200ms (0->48db) -> 2400ms (0->96db); decay of 5 gives 2455.04ms + // + // The envelope diagram for percussive sounds (eg_sustain() == 0) also uses + // "RR" to mean both the constant RR above and the Release Rate specified in + // the instrument data. In this case, Relief Pitcher's credit sound bears out + // that the Release Rate is used during sustain, and that the constant RR + // (or RS) is used during the release phase. + constexpr uint8_t DP = 12 * 4; + constexpr uint8_t RR = 7 * 4; + constexpr uint8_t RS = 5 * 4; + + // determine KSR adjustment for envelope rates + uint32_t ksrval = keycode >> (2 * (op_ksr(opoffs) ^ 1)); + cache.eg_rate[EG_DEPRESS] = DP; + cache.eg_rate[EG_ATTACK] = effective_rate(op_attack_rate(opoffs) * 4, ksrval); + cache.eg_rate[EG_DECAY] = effective_rate(op_decay_rate(opoffs) * 4, ksrval); + if (op_eg_sustain(opoffs)) + { + cache.eg_rate[EG_SUSTAIN] = 0; + cache.eg_rate[EG_RELEASE] = ch_sustain(choffs) ? RS : effective_rate(op_release_rate(opoffs) * 4, ksrval); + } + else + { + cache.eg_rate[EG_SUSTAIN] = effective_rate(op_release_rate(opoffs) * 4, ksrval); + cache.eg_rate[EG_RELEASE] = ch_sustain(choffs) ? RS : RR; + } +} + + +//------------------------------------------------- +// compute_phase_step - compute the phase step +//------------------------------------------------- + +uint32_t opll_registers::compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm) +{ + // phase step computation is the same as OPL but the block_freq has one + // more bit, which we shift in + return opl_compute_phase_step(cache.block_freq << 1, cache.multiple, op_lfo_pm_enable(opoffs) ? lfo_raw_pm : 0); +} + + +//------------------------------------------------- +// log_keyon - log a key-on event +//------------------------------------------------- + +std::string opll_registers::log_keyon(uint32_t choffs, uint32_t opoffs) +{ + uint32_t chnum = choffs; + uint32_t opnum = opoffs; + + char buffer[256]; + char *end = &buffer[0]; + + end += sprintf(end, "%u.%02u freq=%04X inst=%X fb=%u mul=%X", + chnum, opnum, + ch_block_freq(choffs), + ch_instrument(choffs), + ch_feedback(choffs), + op_multiple(opoffs)); + + if (bitfield(opoffs, 0) == 1 || (is_rhythm(choffs) && choffs >= 6)) + end += sprintf(end, " vol=%X", op_volume(opoffs)); + else + end += sprintf(end, " tl=%02X", ch_total_level(choffs)); + + end += sprintf(end, " ksr=%u ksl=%u adr=%X/%X/%X sl=%X sus=%u/%u", + op_ksr(opoffs), + op_ksl(opoffs), + op_attack_rate(opoffs), + op_decay_rate(opoffs), + op_release_rate(opoffs), + op_sustain_level(opoffs), + op_eg_sustain(opoffs), + ch_sustain(choffs)); + + if (op_lfo_am_enable(opoffs)) + end += sprintf(end, " am=1"); + if (op_lfo_pm_enable(opoffs)) + end += sprintf(end, " pm=1"); + if (op_waveform(opoffs) != 0) + end += sprintf(end, " wf=1"); + if (is_rhythm(choffs)) + end += sprintf(end, " rhy=1"); + + return buffer; +} + + + +//********************************************************* +// YM3526 +//********************************************************* + +//------------------------------------------------- +// ym3526 - constructor +//------------------------------------------------- + +ym3526::ym3526(ymfm_interface &intf) : + m_address(0), + m_fm(intf) +{ +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void ym3526::reset() +{ + // reset the engines + m_fm.reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ym3526::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_address); + m_fm.save_restore(state); +} + + +//------------------------------------------------- +// read_status - read the status register +//------------------------------------------------- + +uint8_t ym3526::read_status() +{ + return m_fm.status() | 0x06; +} + + +//------------------------------------------------- +// read - handle a read from the device +//------------------------------------------------- + +uint8_t ym3526::read(uint32_t offset) +{ + uint8_t result = 0xff; + switch (offset & 1) + { + case 0: // status port + result = read_status(); + break; + + case 1: // when A0=1 datasheet says "the data on the bus are not guaranteed" + break; + } + return result; +} + + +//------------------------------------------------- +// write_address - handle a write to the address +// register +//------------------------------------------------- + +void ym3526::write_address(uint8_t data) +{ + // YM3526 doesn't expose a busy signal, and the datasheets don't indicate + // delays, but all other OPL chips need 12 cycles for address writes + m_fm.intf().ymfm_set_busy_end(12 * m_fm.clock_prescale()); + + // just set the address + m_address = data; +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym3526::write_data(uint8_t data) +{ + // YM3526 doesn't expose a busy signal, and the datasheets don't indicate + // delays, but all other OPL chips need 84 cycles for data writes + m_fm.intf().ymfm_set_busy_end(84 * m_fm.clock_prescale()); + + // write to FM + m_fm.write(m_address, data); +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym3526::write(uint32_t offset, uint8_t data) +{ + switch (offset & 1) + { + case 0: // address port + write_address(data); + break; + + case 1: // data port + write_data(data); + break; + } +} + + +//------------------------------------------------- +// generate - generate samples of sound +//------------------------------------------------- + +void ym3526::generate(output_data *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + // clock the system + m_fm.clock(fm_engine::ALL_CHANNELS); + + // update the FM content; mixing details for YM3526 need verification + m_fm.output(output->clear(), 1, 32767, fm_engine::ALL_CHANNELS); + + // YM3526 uses an external DAC (YM3014) with mantissa/exponent format + // convert to 10.3 floating point value and back to simulate truncation + output->roundtrip_fp(); + } +} + + + +//********************************************************* +// Y8950 +//********************************************************* + +//------------------------------------------------- +// y8950 - constructor +//------------------------------------------------- + +y8950::y8950(ymfm_interface &intf) : + m_address(0), + m_io_ddr(0), + m_fm(intf), + m_adpcm_b(intf) +{ +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void y8950::reset() +{ + // reset the engines + m_fm.reset(); + m_adpcm_b.reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void y8950::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_address); + state.save_restore(m_io_ddr); + m_fm.save_restore(state); +} + + +//------------------------------------------------- +// read_status - read the status register +//------------------------------------------------- + +uint8_t y8950::read_status() +{ + // start with current FM status, masking out bits we might set + uint8_t status = m_fm.status() & ~(STATUS_ADPCM_B_EOS | STATUS_ADPCM_B_BRDY | STATUS_ADPCM_B_PLAYING); + + // insert the live ADPCM status bits + uint8_t adpcm_status = m_adpcm_b.status(); + if ((adpcm_status & adpcm_b_channel::STATUS_EOS) != 0) + status |= STATUS_ADPCM_B_EOS; + if ((adpcm_status & adpcm_b_channel::STATUS_BRDY) != 0) + status |= STATUS_ADPCM_B_BRDY; + if ((adpcm_status & adpcm_b_channel::STATUS_PLAYING) != 0) + status |= STATUS_ADPCM_B_PLAYING; + + // run it through the FM engine to handle interrupts for us + return m_fm.set_reset_status(status, ~status); +} + + +//------------------------------------------------- +// read_data - read the data port +//------------------------------------------------- + +uint8_t y8950::read_data() +{ + uint8_t result = 0xff; + switch (m_address) + { + case 0x05: // keyboard in + result = m_fm.intf().ymfm_external_read(ACCESS_IO, 1); + break; + + case 0x09: // ADPCM data + case 0x1a: + result = m_adpcm_b.read(m_address - 0x07); + break; + + case 0x19: // I/O data + result = m_fm.intf().ymfm_external_read(ACCESS_IO, 0); + break; + + default: + debug::log_unexpected_read_write("Unexpected read from Y8950 data port %02X\n", m_address); + break; + } + return result; +} + + +//------------------------------------------------- +// read - handle a read from the device +//------------------------------------------------- + +uint8_t y8950::read(uint32_t offset) +{ + uint8_t result = 0xff; + switch (offset & 1) + { + case 0: // status port + result = read_status(); + break; + + case 1: // when A0=1 datasheet says "the data on the bus are not guaranteed" + result = read_data(); + break; + } + return result; +} + + +//------------------------------------------------- +// write_address - handle a write to the address +// register +//------------------------------------------------- + +void y8950::write_address(uint8_t data) +{ + // Y8950 doesn't expose a busy signal, but it does indicate that + // address writes should be no faster than every 12 clocks + m_fm.intf().ymfm_set_busy_end(12 * m_fm.clock_prescale()); + + // just set the address + m_address = data; +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void y8950::write_data(uint8_t data) +{ + // Y8950 doesn't expose a busy signal, but it does indicate that + // data writes should be no faster than every 12 clocks for + // registers 00-1A, or every 84 clocks for other registers + m_fm.intf().ymfm_set_busy_end(((m_address <= 0x1a) ? 12 : 84) * m_fm.clock_prescale()); + + // handle special addresses + switch (m_address) + { + case 0x04: // IRQ control + m_fm.write(m_address, data); + read_status(); + break; + + case 0x06: // keyboard out + m_fm.intf().ymfm_external_write(ACCESS_IO, 1, data); + break; + + case 0x08: // split FM/ADPCM-B + m_adpcm_b.write(m_address - 0x07, (data & 0x0f) | 0x80); + m_fm.write(m_address, data & 0xc0); + break; + + case 0x07: // ADPCM-B registers + case 0x09: + case 0x0a: + case 0x0b: + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: + case 0x10: + case 0x11: + case 0x12: + case 0x15: + case 0x16: + case 0x17: + m_adpcm_b.write(m_address - 0x07, data); + break; + + case 0x18: // I/O direction + m_io_ddr = data & 0x0f; + break; + + case 0x19: // I/O data + m_fm.intf().ymfm_external_write(ACCESS_IO, 0, data & m_io_ddr); + break; + + default: // everything else to FM + m_fm.write(m_address, data); + break; + } +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void y8950::write(uint32_t offset, uint8_t data) +{ + switch (offset & 1) + { + case 0: // address port + write_address(data); + break; + + case 1: // data port + write_data(data); + break; + } +} + + +//------------------------------------------------- +// generate - generate samples of sound +//------------------------------------------------- + +void y8950::generate(output_data *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + // clock the system + m_fm.clock(fm_engine::ALL_CHANNELS); + m_adpcm_b.clock(); + + // update the FM content; clipping need verification + m_fm.output(output->clear(), 1, 32767, fm_engine::ALL_CHANNELS); + + // mix in the ADPCM; ADPCM-B is stereo, but only one channel + // not sure how it's wired up internally + m_adpcm_b.output(*output, 3); + + // Y8950 uses an external DAC (YM3014) with mantissa/exponent format + // convert to 10.3 floating point value and back to simulate truncation + output->roundtrip_fp(); + } +} + + + +//********************************************************* +// YM3812 +//********************************************************* + +//------------------------------------------------- +// ym3812 - constructor +//------------------------------------------------- + +ym3812::ym3812(ymfm_interface &intf) : + m_address(0), + m_fm(intf) +{ +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void ym3812::reset() +{ + // reset the engines + m_fm.reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ym3812::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_address); + m_fm.save_restore(state); +} + + +//------------------------------------------------- +// read_status - read the status register +//------------------------------------------------- + +uint8_t ym3812::read_status() +{ + return m_fm.status() | 0x06; +} + + +//------------------------------------------------- +// read - handle a read from the device +//------------------------------------------------- + +uint8_t ym3812::read(uint32_t offset) +{ + uint8_t result = 0xff; + switch (offset & 1) + { + case 0: // status port + result = read_status(); + break; + + case 1: // "inhibit" according to datasheet + break; + } + return result; +} + + +//------------------------------------------------- +// write_address - handle a write to the address +// register +//------------------------------------------------- + +void ym3812::write_address(uint8_t data) +{ + // YM3812 doesn't expose a busy signal, but it does indicate that + // address writes should be no faster than every 12 clocks + m_fm.intf().ymfm_set_busy_end(12 * m_fm.clock_prescale()); + + // just set the address + m_address = data; +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym3812::write_data(uint8_t data) +{ + // YM3812 doesn't expose a busy signal, but it does indicate that + // data writes should be no faster than every 84 clocks + m_fm.intf().ymfm_set_busy_end(84 * m_fm.clock_prescale()); + + // write to FM + m_fm.write(m_address, data); +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym3812::write(uint32_t offset, uint8_t data) +{ + switch (offset & 1) + { + case 0: // address port + write_address(data); + break; + + case 1: // data port + write_data(data); + break; + } +} + + +//------------------------------------------------- +// generate - generate samples of sound +//------------------------------------------------- + +void ym3812::generate(output_data *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + // clock the system + m_fm.clock(fm_engine::ALL_CHANNELS); + + // update the FM content; mixing details for YM3812 need verification + m_fm.output(output->clear(), 1, 32767, fm_engine::ALL_CHANNELS); + + // YM3812 uses an external DAC (YM3014) with mantissa/exponent format + // convert to 10.3 floating point value and back to simulate truncation + output->roundtrip_fp(); + } +} + + + +//********************************************************* +// YMF262 +//********************************************************* + +//------------------------------------------------- +// ymf262 - constructor +//------------------------------------------------- + +ymf262::ymf262(ymfm_interface &intf) : + m_address(0), + m_fm(intf) +{ +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void ymf262::reset() +{ + // reset the engines + m_fm.reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ymf262::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_address); + m_fm.save_restore(state); +} + + +//------------------------------------------------- +// read_status - read the status register +//------------------------------------------------- + +uint8_t ymf262::read_status() +{ + return m_fm.status(); +} + + +//------------------------------------------------- +// read - handle a read from the device +//------------------------------------------------- + +uint8_t ymf262::read(uint32_t offset) +{ + uint8_t result = 0xff; + switch (offset & 3) + { + case 0: // status port + result = read_status(); + break; + + case 1: + case 2: + case 3: + debug::log_unexpected_read_write("Unexpected read from YMF262 offset %d\n", offset & 3); + break; + } + return result; +} + + +//------------------------------------------------- +// write_address - handle a write to the address +// register +//------------------------------------------------- + +void ymf262::write_address(uint8_t data) +{ + // YMF262 doesn't expose a busy signal, but it does indicate that + // address writes should be no faster than every 32 clocks + m_fm.intf().ymfm_set_busy_end(32 * m_fm.clock_prescale()); + + // just set the address + m_address = data; +} + + +//------------------------------------------------- +// write_data - handle a write to the data +// register +//------------------------------------------------- + +void ymf262::write_data(uint8_t data) +{ + // YMF262 doesn't expose a busy signal, but it does indicate that + // data writes should be no faster than every 32 clocks + m_fm.intf().ymfm_set_busy_end(32 * m_fm.clock_prescale()); + + // write to FM + m_fm.write(m_address, data); +} + + +//------------------------------------------------- +// write_address_hi - handle a write to the upper +// address register +//------------------------------------------------- + +void ymf262::write_address_hi(uint8_t data) +{ + // YMF262 doesn't expose a busy signal, but it does indicate that + // address writes should be no faster than every 32 clocks + m_fm.intf().ymfm_set_busy_end(32 * m_fm.clock_prescale()); + + // just set the address + m_address = data | 0x100; + + // tests reveal that in compatibility mode, upper bit is masked + // except for register 0x105 + if (m_fm.regs().newflag() == 0 && m_address != 0x105) + m_address &= 0xff; +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ymf262::write(uint32_t offset, uint8_t data) +{ + switch (offset & 3) + { + case 0: // address port + write_address(data); + break; + + case 1: // data port + write_data(data); + break; + + case 2: // address port + write_address_hi(data); + break; + + case 3: // data port + write_data(data); + break; + } +} + + +//------------------------------------------------- +// generate - generate samples of sound +//------------------------------------------------- + +void ymf262::generate(output_data *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + // clock the system + m_fm.clock(fm_engine::ALL_CHANNELS); + + // update the FM content; mixing details for YMF262 need verification + m_fm.output(output->clear(), 0, 32767, fm_engine::ALL_CHANNELS); + + // YMF262 output is 16-bit offset serial via YAC512 DAC + output->clamp16(); + } +} + + + +//********************************************************* +// YMF289B +//********************************************************* + +// YMF289B is a YMF262 with the following changes: +// * "Power down" mode added +// * Bulk register clear added +// * Busy flag added to the status register +// * Shorter busy times +// * All registers can be read +// * Only 2 outputs exposed + +//------------------------------------------------- +// ymf289b - constructor +//------------------------------------------------- + +ymf289b::ymf289b(ymfm_interface &intf) : + m_address(0), + m_fm(intf) +{ +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void ymf289b::reset() +{ + // reset the engines + m_fm.reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ymf289b::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_address); + m_fm.save_restore(state); +} + + +//------------------------------------------------- +// read_status - read the status register +//------------------------------------------------- + +uint8_t ymf289b::read_status() +{ + uint8_t result = m_fm.status(); + + // YMF289B adds a busy flag + if (ymf289b_mode() && m_fm.intf().ymfm_is_busy()) + result |= STATUS_BUSY_FLAGS; + return result; +} + + +//------------------------------------------------- +// read_data - read the data register +//------------------------------------------------- + +uint8_t ymf289b::read_data() +{ + uint8_t result = 0xff; + + // YMF289B can read register data back + if (ymf289b_mode()) + result = m_fm.regs().read(m_address); + return result; +} + + +//------------------------------------------------- +// read - handle a read from the device +//------------------------------------------------- + +uint8_t ymf289b::read(uint32_t offset) +{ + uint8_t result = 0xff; + switch (offset & 3) + { + case 0: // status port + result = read_status(); + break; + + case 1: // data port + result = read_data(); + break; + + case 2: + case 3: + debug::log_unexpected_read_write("Unexpected read from YMF289B offset %d\n", offset & 3); + break; + } + return result; +} + + +//------------------------------------------------- +// write_address - handle a write to the address +// register +//------------------------------------------------- + +void ymf289b::write_address(uint8_t data) +{ + m_address = data; + + // count busy time + m_fm.intf().ymfm_set_busy_end(56); +} + + +//------------------------------------------------- +// write_data - handle a write to the data +// register +//------------------------------------------------- + +void ymf289b::write_data(uint8_t data) +{ + // write to FM + m_fm.write(m_address, data); + + // writes to 0x108 with the CLR flag set clear the registers + if (m_address == 0x108 && bitfield(data, 2) != 0) + m_fm.regs().reset(); + + // count busy time + m_fm.intf().ymfm_set_busy_end(56); +} + + +//------------------------------------------------- +// write_address_hi - handle a write to the upper +// address register +//------------------------------------------------- + +void ymf289b::write_address_hi(uint8_t data) +{ + // just set the address + m_address = data | 0x100; + + // tests reveal that in compatibility mode, upper bit is masked + // except for register 0x105 + if (m_fm.regs().newflag() == 0 && m_address != 0x105) + m_address &= 0xff; + + // count busy time + m_fm.intf().ymfm_set_busy_end(56); +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ymf289b::write(uint32_t offset, uint8_t data) +{ + switch (offset & 3) + { + case 0: // address port + write_address(data); + break; + + case 1: // data port + write_data(data); + break; + + case 2: // address port + write_address_hi(data); + break; + + case 3: // data port + write_data(data); + break; + } +} + + +//------------------------------------------------- +// generate - generate samples of sound +//------------------------------------------------- + +void ymf289b::generate(output_data *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + // clock the system + m_fm.clock(fm_engine::ALL_CHANNELS); + + // update the FM content; mixing details for YMF262 need verification + fm_engine::output_data full; + m_fm.output(full.clear(), 0, 32767, fm_engine::ALL_CHANNELS); + + // YMF278B output is 16-bit offset serial via YAC512 DAC, but + // only 2 of the 4 outputs are exposed + output->data[0] = full.data[0]; + output->data[1] = full.data[1]; + output->clamp16(); + } +} + + + +//********************************************************* +// YMF278B +//********************************************************* + +//------------------------------------------------- +// ymf278b - constructor +//------------------------------------------------- + +ymf278b::ymf278b(ymfm_interface &intf) : + m_address(0), + m_fm_pos(0), + m_load_remaining(0), + m_next_status_id(false), + m_fm(intf), + m_pcm(intf) +{ +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void ymf278b::reset() +{ + // reset the engines + m_fm.reset(); + m_pcm.reset(); + + // next status read will return ID + m_next_status_id = true; +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ymf278b::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_address); + state.save_restore(m_fm_pos); + state.save_restore(m_load_remaining); + state.save_restore(m_next_status_id); + m_fm.save_restore(state); + m_pcm.save_restore(state); +} + + +//------------------------------------------------- +// read_status - read the status register +//------------------------------------------------- + +uint8_t ymf278b::read_status() +{ + uint8_t result; + + // first status read after initialization returns a chip ID, which + // varies based on the "new" flags, indicating the mode + if (m_next_status_id) + { + if (m_fm.regs().new2flag()) + result = 0x02; + else if (m_fm.regs().newflag()) + result = 0x00; + else + result = 0x06; + m_next_status_id = false; + } + else + { + result = m_fm.status(); + if (m_fm.intf().ymfm_is_busy()) + result |= STATUS_BUSY; + if (m_load_remaining != 0) + result |= STATUS_LD; + + // if new2 flag is not set, we're in OPL2 or OPL3 mode + if (!m_fm.regs().new2flag()) + result &= ~(STATUS_BUSY | STATUS_LD); + } + return result; +} + + +//------------------------------------------------- +// write_data_pcm - handle a write to the PCM data +// register +//------------------------------------------------- + +uint8_t ymf278b::read_data_pcm() +{ + // write to FM + if (bitfield(m_address, 9) != 0) + return m_pcm.read(m_address & 0xff); + return 0; +} + + +//------------------------------------------------- +// read - handle a read from the device +//------------------------------------------------- + +uint8_t ymf278b::read(uint32_t offset) +{ + uint8_t result = 0xff; + switch (offset & 7) + { + case 0: // status port + result = read_status(); + break; + + case 5: // PCM data port + result = read_data_pcm(); + break; + + default: + debug::log_unexpected_read_write("Unexpected read from ymf278b offset %d\n", offset & 3); + break; + } + return result; +} + + +//------------------------------------------------- +// write_address - handle a write to the address +// register +//------------------------------------------------- + +void ymf278b::write_address(uint8_t data) +{ + // just set the address + m_address = data; +} + + +//------------------------------------------------- +// write_data - handle a write to the data +// register +//------------------------------------------------- + +void ymf278b::write_data(uint8_t data) +{ + // write to FM + if (bitfield(m_address, 9) == 0) + { + uint8_t old = m_fm.regs().new2flag(); + m_fm.write(m_address, data); + + // changing NEW2 from 0->1 causes the next status read to + // return the chip ID + if (old == 0 && m_fm.regs().new2flag() != 0) + m_next_status_id = true; + } + + // BUSY goes for 56 clocks on FM writes + m_fm.intf().ymfm_set_busy_end(56); +} + + +//------------------------------------------------- +// write_address_hi - handle a write to the upper +// address register +//------------------------------------------------- + +void ymf278b::write_address_hi(uint8_t data) +{ + // just set the address + m_address = data | 0x100; + + // YMF262, in compatibility mode, treats the upper bit as masked + // except for register 0x105; assuming YMF278B works the same way? + if (m_fm.regs().newflag() == 0 && m_address != 0x105) + m_address &= 0xff; +} + + +//------------------------------------------------- +// write_address_pcm - handle a write to the upper +// address register +//------------------------------------------------- + +void ymf278b::write_address_pcm(uint8_t data) +{ + // just set the address + m_address = data | 0x200; +} + + +//------------------------------------------------- +// write_data_pcm - handle a write to the PCM data +// register +//------------------------------------------------- + +void ymf278b::write_data_pcm(uint8_t data) +{ + // ignore data writes if new2 is not yet set + if (m_fm.regs().new2flag() == 0) + return; + + // write to FM + if (bitfield(m_address, 9) != 0) + { + uint8_t addr = m_address & 0xff; + m_pcm.write(addr, data); + + // writes to the waveform number cause loads to happen for "about 300usec" + // which is ~13 samples at the nominal output frequency of 44.1kHz + if (addr >= 0x08 && addr <= 0x1f) + m_load_remaining = 13; + } + + // BUSY goes for 88 clocks on PCM writes + m_fm.intf().ymfm_set_busy_end(88); +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ymf278b::write(uint32_t offset, uint8_t data) +{ + switch (offset & 7) + { + case 0: // address port + write_address(data); + break; + + case 1: // data port + write_data(data); + break; + + case 2: // address port + write_address_hi(data); + break; + + case 3: // data port + write_data(data); + break; + + case 4: // PCM address port + write_address_pcm(data); + break; + + case 5: // PCM address port + write_data_pcm(data); + break; + + default: + debug::log_unexpected_read_write("Unexpected write to ymf278b offset %d\n", offset & 7); + break; + } +} + + +//------------------------------------------------- +// generate - generate one sample of sound +//------------------------------------------------- + +void ymf278b::generate(output_data *output, uint32_t numsamples) +{ + static const int16_t s_mix_scale[8] = { 0x7fa, 0x5a4, 0x3fd, 0x2d2, 0x1fe, 0x169, 0xff, 0 }; + int32_t const pcm_l = s_mix_scale[m_pcm.regs().mix_pcm_l()]; + int32_t const pcm_r = s_mix_scale[m_pcm.regs().mix_pcm_r()]; + int32_t const fm_l = s_mix_scale[m_pcm.regs().mix_fm_l()]; + int32_t const fm_r = s_mix_scale[m_pcm.regs().mix_fm_r()]; + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + // clock the system + m_fm_pos += FM_EXTRA_SAMPLE_STEP; + if (m_fm_pos >= FM_EXTRA_SAMPLE_THRESH) + { + m_fm.clock(fm_engine::ALL_CHANNELS); + m_fm_pos -= FM_EXTRA_SAMPLE_THRESH; + } + m_fm.clock(fm_engine::ALL_CHANNELS); + m_pcm.clock(pcm_engine::ALL_CHANNELS); + + // update the FM content; mixing details for YMF278B need verification + fm_engine::output_data fmout; + m_fm.output(fmout.clear(), 0, 32767, fm_engine::ALL_CHANNELS); + + // update the PCM content + pcm_engine::output_data pcmout; + m_pcm.output(pcmout.clear(), pcm_engine::ALL_CHANNELS); + + // DO0 output: FM channels 2+3 only + output->data[0] = fmout.data[2]; + output->data[1] = fmout.data[3]; + + // DO1 output: wavetable channels 2+3 only + output->data[2] = pcmout.data[2]; + output->data[3] = pcmout.data[3]; + + // DO2 output: mixed FM channels 0+1 and wavetable channels 0+1 + output->data[4] = (fmout.data[0] * fm_l + pcmout.data[0] * pcm_l) >> 11; + output->data[5] = (fmout.data[1] * fm_r + pcmout.data[1] * pcm_r) >> 11; + + // YMF278B output is 16-bit 2s complement serial + output->clamp16(); + } + + // decrement the load waiting count + if (m_load_remaining > 0) + m_load_remaining -= std::min(m_load_remaining, numsamples); +} + + + +//********************************************************* +// OPLL BASE +//********************************************************* + +//------------------------------------------------- +// opll_base - constructor +//------------------------------------------------- + +opll_base::opll_base(ymfm_interface &intf, uint8_t const *instrument_data) : + m_address(0), + m_fm(intf) +{ + m_fm.regs().set_instrument_data(instrument_data); +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void opll_base::reset() +{ + // reset the engines + m_fm.reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void opll_base::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_address); + m_fm.save_restore(state); +} + + +//------------------------------------------------- +// write_address - handle a write to the address +// register +//------------------------------------------------- + +void opll_base::write_address(uint8_t data) +{ + // OPLL doesn't expose a busy signal, but datasheets are pretty consistent + // in indicating that address writes should be no faster than every 12 clocks + m_fm.intf().ymfm_set_busy_end(12); + + // just set the address + m_address = data; +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void opll_base::write_data(uint8_t data) +{ + // OPLL doesn't expose a busy signal, but datasheets are pretty consistent + // in indicating that address writes should be no faster than every 84 clocks + m_fm.intf().ymfm_set_busy_end(84); + + // write to FM + m_fm.write(m_address, data); +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void opll_base::write(uint32_t offset, uint8_t data) +{ + switch (offset & 1) + { + case 0: // address port + write_address(data); + break; + + case 1: // data port + write_data(data); + break; + } +} + + +//------------------------------------------------- +// generate - generate one sample of sound +//------------------------------------------------- + +void opll_base::generate(output_data *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + // clock the system + m_fm.clock(fm_engine::ALL_CHANNELS); + + // update the FM content; OPLL has a built-in 9-bit DAC + m_fm.output(output->clear(), 5, 256, fm_engine::ALL_CHANNELS); + + // final output is multiplexed; we don't simulate that here except + // to average over everything + output->data[0] = (output->data[0] * 128) / 9; + output->data[1] = (output->data[1] * 128) / 9; + } +} + + + +//********************************************************* +// YM2413 +//********************************************************* + +//------------------------------------------------- +// ym2413 - constructor +//------------------------------------------------- + +ym2413::ym2413(ymfm_interface &intf, uint8_t const *instrument_data) : + opll_base(intf, (instrument_data != nullptr) ? instrument_data : s_default_instruments) +{ +}; + +// table below taken from https://github.com/plgDavid/misc/wiki/Copyright-free-OPLL(x)-ROM-patches +uint8_t const ym2413::s_default_instruments[] = +{ + //April 2015 David Viens, tweaked May 19-21th 2015 Hubert Lamontagne + 0x71, 0x61, 0x1E, 0x17, 0xEF, 0x7F, 0x00, 0x17, //Violin + 0x13, 0x41, 0x1A, 0x0D, 0xF8, 0xF7, 0x23, 0x13, //Guitar + 0x13, 0x01, 0x99, 0x00, 0xF2, 0xC4, 0x11, 0x23, //Piano + 0x31, 0x61, 0x0E, 0x07, 0x98, 0x64, 0x70, 0x27, //Flute + 0x22, 0x21, 0x1E, 0x06, 0xBF, 0x76, 0x00, 0x28, //Clarinet + 0x31, 0x22, 0x16, 0x05, 0xE0, 0x71, 0x0F, 0x18, //Oboe + 0x21, 0x61, 0x1D, 0x07, 0x82, 0x8F, 0x10, 0x07, //Trumpet + 0x23, 0x21, 0x2D, 0x14, 0xFF, 0x7F, 0x00, 0x07, //Organ + 0x41, 0x61, 0x1B, 0x06, 0x64, 0x65, 0x10, 0x17, //Horn + 0x61, 0x61, 0x0B, 0x18, 0x85, 0xFF, 0x81, 0x07, //Synthesizer + 0x13, 0x01, 0x83, 0x11, 0xFA, 0xE4, 0x10, 0x04, //Harpsichord + 0x17, 0x81, 0x23, 0x07, 0xF8, 0xF8, 0x22, 0x12, //Vibraphone + 0x61, 0x50, 0x0C, 0x05, 0xF2, 0xF5, 0x29, 0x42, //Synthesizer Bass + 0x01, 0x01, 0x54, 0x03, 0xC3, 0x92, 0x03, 0x02, //Acoustic Bass + 0x41, 0x41, 0x89, 0x03, 0xF1, 0xE5, 0x11, 0x13, //Electric Guitar + 0x01, 0x01, 0x18, 0x0F, 0xDF, 0xF8, 0x6A, 0x6D, //rhythm 1 + 0x01, 0x01, 0x00, 0x00, 0xC8, 0xD8, 0xA7, 0x48, //rhythm 2 + 0x05, 0x01, 0x00, 0x00, 0xF8, 0xAA, 0x59, 0x55 //rhythm 3 +}; + + + +//********************************************************* +// YM2423 +//********************************************************* + +//------------------------------------------------- +// ym2423 - constructor +//------------------------------------------------- + +ym2423::ym2423(ymfm_interface &intf, uint8_t const *instrument_data) : + opll_base(intf, (instrument_data != nullptr) ? instrument_data : s_default_instruments) +{ +}; + +// table below taken from https://github.com/plgDavid/misc/wiki/Copyright-free-OPLL(x)-ROM-patches +uint8_t const ym2423::s_default_instruments[] = +{ + // May 4-6 2016 Hubert Lamontagne + // Doesn't seem to have any diff between opllx-x and opllx-y + // Drums seem identical to regular opll + 0x61, 0x61, 0x1B, 0x07, 0x94, 0x5F, 0x10, 0x06, //1 Strings Saw wave with vibrato Violin + 0x93, 0xB1, 0x51, 0x04, 0xF3, 0xF2, 0x70, 0xFB, //2 Guitar Jazz GuitarPiano + 0x41, 0x21, 0x11, 0x85, 0xF2, 0xF2, 0x70, 0x75, //3 Electric Guitar Same as OPLL No.15 Synth + 0x93, 0xB2, 0x28, 0x07, 0xF3, 0xF2, 0x70, 0xB4, //4 Electric Piano 2 Slow attack, tremoloDing-a-ling + 0x72, 0x31, 0x97, 0x05, 0x51, 0x6F, 0x60, 0x09, //5 Flute Same as OPLL No.4Clarinet + 0x13, 0x30, 0x18, 0x06, 0xF7, 0xF4, 0x50, 0x85, //6 Marimba Also be used as steel drumXyophone + 0x51, 0x31, 0x1C, 0x07, 0x51, 0x71, 0x20, 0x26, //7 Trumpet Same as OPLL No.7Trumpet + 0x41, 0xF4, 0x1B, 0x07, 0x74, 0x34, 0x00, 0x06, //8 Harmonica Harmonica synth + 0x50, 0x30, 0x4D, 0x03, 0x42, 0x65, 0x20, 0x06, //9 Tuba Tuba + 0x40, 0x20, 0x10, 0x85, 0xF3, 0xF5, 0x20, 0x04, //10 Synth Brass 2 Synth sweep + 0x61, 0x61, 0x1B, 0x07, 0xC5, 0x96, 0xF3, 0xF6, //11 Short Saw Saw wave with short envelopeSynth hit + 0xF9, 0xF1, 0xDC, 0x00, 0xF5, 0xF3, 0x77, 0xF2, //12 Vibraphone Bright vibraphoneVibes + 0x60, 0xA2, 0x91, 0x03, 0x94, 0xC1, 0xF7, 0xF7, //13 Electric Guitar 2 Clean guitar with feedbackHarmonic bass + 0x30, 0x30, 0x17, 0x06, 0xF3, 0xF1, 0xB7, 0xFC, //14 Synth Bass 2Snappy bass + 0x31, 0x36, 0x0D, 0x05, 0xF2, 0xF4, 0x27, 0x9C, //15 Sitar Also be used as ShamisenBanjo + 0x01, 0x01, 0x18, 0x0F, 0xDF, 0xF8, 0x6A, 0x6D, //rhythm 1 + 0x01, 0x01, 0x00, 0x00, 0xC8, 0xD8, 0xA7, 0x48, //rhythm 2 + 0x05, 0x01, 0x00, 0x00, 0xF8, 0xAA, 0x59, 0x55 //rhythm 3 +}; + + + +//********************************************************* +// YMF281 +//********************************************************* + +//------------------------------------------------- +// ymf281 - constructor +//------------------------------------------------- + +ymf281::ymf281(ymfm_interface &intf, uint8_t const *instrument_data) : + opll_base(intf, (instrument_data != nullptr) ? instrument_data : s_default_instruments) +{ +}; + +// table below taken from https://github.com/plgDavid/misc/wiki/Copyright-free-OPLL(x)-ROM-patches +uint8_t const ymf281::s_default_instruments[] = +{ + // May 14th 2015 Hubert Lamontagne + 0x72, 0x21, 0x1A, 0x07, 0xF6, 0x64, 0x01, 0x16, // Clarinet ~~ Electric String Square wave with vibrato + 0x00, 0x10, 0x45, 0x00, 0xF6, 0x83, 0x73, 0x63, // Synth Bass ~~ Bow wow Triangular wave + 0x13, 0x01, 0x96, 0x00, 0xF1, 0xF4, 0x31, 0x23, // Piano ~~ Electric Guitar Despite of its name, same as Piano of YM2413. + 0x71, 0x21, 0x0B, 0x0F, 0xF9, 0x64, 0x70, 0x17, // Flute ~~ Organ Sine wave + 0x02, 0x21, 0x1E, 0x06, 0xF9, 0x76, 0x00, 0x28, // Square Wave ~~ Clarinet Same as ones of YM2413. + 0x00, 0x61, 0x82, 0x0E, 0xF9, 0x61, 0x20, 0x27, // Space Oboe ~~ Saxophone Saw wave with vibrato + 0x21, 0x61, 0x1B, 0x07, 0x84, 0x8F, 0x10, 0x07, // Trumpet ~~ Trumpet Same as ones of YM2413. + 0x37, 0x32, 0xCA, 0x02, 0x66, 0x64, 0x47, 0x29, // Wow Bell ~~ Street Organ Calliope + 0x41, 0x41, 0x07, 0x03, 0xF5, 0x70, 0x51, 0xF5, // Electric Guitar ~~ Synth Brass Same as Synthesizer of YM2413. + 0x36, 0x01, 0x5E, 0x07, 0xF2, 0xF3, 0xF7, 0xF7, // Vibes ~~ Electric Piano Simulate of Rhodes Piano + 0x00, 0x00, 0x18, 0x06, 0xC5, 0xF3, 0x20, 0xF2, // Bass ~~ Bass Electric bass + 0x17, 0x81, 0x25, 0x07, 0xF7, 0xF3, 0x21, 0xF7, // Vibraphone ~~ Vibraphone Same as ones of YM2413. + 0x35, 0x64, 0x00, 0x00, 0xFF, 0xF3, 0x77, 0xF5, // Vibrato Bell ~~ Chime Bell + 0x11, 0x31, 0x00, 0x07, 0xDD, 0xF3, 0xFF, 0xFB, // Click Sine ~~ Tom Tom II Tom + 0x3A, 0x21, 0x00, 0x07, 0x95, 0x84, 0x0F, 0xF5, // Noise and Tone ~~ Noise for S.E. + 0x01, 0x01, 0x18, 0x0F, 0xDF, 0xF8, 0x6A, 0x6D, //rhythm 1 + 0x01, 0x01, 0x00, 0x00, 0xC8, 0xD8, 0xA7, 0x48, //rhythm 2 + 0x05, 0x01, 0x00, 0x00, 0xF8, 0xAA, 0x59, 0x55 //rhythm 3 +}; + + + +//********************************************************* +// DS1001 +//********************************************************* + +//------------------------------------------------- +// ds1001 - constructor +//------------------------------------------------- + +ds1001::ds1001(ymfm_interface &intf, uint8_t const *instrument_data) : + opll_base(intf, (instrument_data != nullptr) ? instrument_data : s_default_instruments) +{ +}; + +// table below taken from https://github.com/plgDavid/misc/wiki/Copyright-free-OPLL(x)-ROM-patches +uint8_t const ds1001::s_default_instruments[] = +{ + // May 15th 2015 Hubert Lamontagne & David Viens + 0x03, 0x21, 0x05, 0x06, 0xC8, 0x81, 0x42, 0x27, // Buzzy Bell + 0x13, 0x41, 0x14, 0x0D, 0xF8, 0xF7, 0x23, 0x12, // Guitar + 0x31, 0x11, 0x08, 0x08, 0xFA, 0xC2, 0x28, 0x22, // Wurly + 0x31, 0x61, 0x0C, 0x07, 0xF8, 0x64, 0x60, 0x27, // Flute + 0x22, 0x21, 0x1E, 0x06, 0xFF, 0x76, 0x00, 0x28, // Clarinet + 0x02, 0x01, 0x05, 0x00, 0xAC, 0xF2, 0x03, 0x02, // Synth + 0x21, 0x61, 0x1D, 0x07, 0x82, 0x8F, 0x10, 0x07, // Trumpet + 0x23, 0x21, 0x22, 0x17, 0xFF, 0x73, 0x00, 0x17, // Organ + 0x15, 0x11, 0x25, 0x00, 0x41, 0x71, 0x00, 0xF1, // Bells + 0x95, 0x01, 0x10, 0x0F, 0xB8, 0xAA, 0x50, 0x02, // Vibes + 0x17, 0xC1, 0x5E, 0x07, 0xFA, 0xF8, 0x22, 0x12, // Vibraphone + 0x71, 0x23, 0x11, 0x06, 0x65, 0x74, 0x10, 0x16, // Tutti + 0x01, 0x02, 0xD3, 0x05, 0xF3, 0x92, 0x83, 0xF2, // Fretless + 0x61, 0x63, 0x0C, 0x00, 0xA4, 0xFF, 0x30, 0x06, // Synth Bass + 0x21, 0x62, 0x0D, 0x00, 0xA1, 0xFF, 0x50, 0x08, // Sweep + 0x01, 0x01, 0x18, 0x0F, 0xDF, 0xF8, 0x6A, 0x6D, //rhythm 1 + 0x01, 0x01, 0x00, 0x00, 0xC8, 0xD8, 0xA7, 0x48, //rhythm 2 + 0x05, 0x01, 0x00, 0x00, 0xF8, 0xAA, 0x59, 0x55 //rhythm 3 +}; + + +//********************************************************* +// EXPLICIT INSTANTIATION +//********************************************************* + +template class opl_registers_base<4>; +template class fm_engine_base>; + +} diff --git a/src/sound/ymfm/ymfm_opl.h b/src/sound/ymfm/ymfm_opl.h new file mode 100644 index 000000000..843e5b274 --- /dev/null +++ b/src/sound/ymfm/ymfm_opl.h @@ -0,0 +1,902 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#ifndef YMFM_OPL_H +#define YMFM_OPL_H + +#pragma once + +#include "ymfm.h" +#include "ymfm_adpcm.h" +#include "ymfm_fm.h" +#include "ymfm_pcm.h" + +namespace ymfm +{ + +//********************************************************* +// REGISTER CLASSES +//********************************************************* + +// ======================> opl_registers_base + +// +// OPL/OPL2/OPL3/OPL4 register map: +// +// System-wide registers: +// 01 xxxxxxxx Test register +// --x----- Enable OPL compatibility mode [OPL2 only] (1 = enable) +// 02 xxxxxxxx Timer A value (4 * OPN) +// 03 xxxxxxxx Timer B value +// 04 x------- RST +// -x------ Mask timer A +// --x----- Mask timer B +// ------x- Load timer B +// -------x Load timer A +// 08 x------- CSM mode [OPL/OPL2 only] +// -x------ Note select +// BD x------- AM depth +// -x------ PM depth +// --x----- Rhythm enable +// ---x---- Bass drum key on +// ----x--- Snare drum key on +// -----x-- Tom key on +// ------x- Top cymbal key on +// -------x High hat key on +// 101 --xxxxxx Test register 2 [OPL3 only] +// 104 --x----- Channel 6 4-operator mode [OPL3 only] +// ---x---- Channel 5 4-operator mode [OPL3 only] +// ----x--- Channel 4 4-operator mode [OPL3 only] +// -----x-- Channel 3 4-operator mode [OPL3 only] +// ------x- Channel 2 4-operator mode [OPL3 only] +// -------x Channel 1 4-operator mode [OPL3 only] +// 105 -------x New [OPL3 only] +// ------x- New2 [OPL4 only] +// +// Per-channel registers (channel in address bits 0-3) +// Note that all these apply to address+100 as well on OPL3+ +// A0-A8 xxxxxxxx F-number (low 8 bits) +// B0-B8 --x----- Key on +// ---xxx-- Block (octvate, 0-7) +// ------xx F-number (high two bits) +// C0-C8 x------- CHD output (to DO0 pin) [OPL3+ only] +// -x------ CHC output (to DO0 pin) [OPL3+ only] +// --x----- CHB output (mixed right, to DO2 pin) [OPL3+ only] +// ---x---- CHA output (mixed left, to DO2 pin) [OPL3+ only] +// ----xxx- Feedback level for operator 1 (0-7) +// -------x Operator connection algorithm +// +// Per-operator registers (operator in bits 0-5) +// Note that all these apply to address+100 as well on OPL3+ +// 20-35 x------- AM enable +// -x------ PM enable (VIB) +// --x----- EG type +// ---x---- Key scale rate +// ----xxxx Multiple value (0-15) +// 40-55 xx------ Key scale level (0-3) +// --xxxxxx Total level (0-63) +// 60-75 xxxx---- Attack rate (0-15) +// ----xxxx Decay rate (0-15) +// 80-95 xxxx---- Sustain level (0-15) +// ----xxxx Release rate (0-15) +// E0-F5 ------xx Wave select (0-3) [OPL2 only] +// -----xxx Wave select (0-7) [OPL3+ only] +// + +template +class opl_registers_base : public fm_registers_base +{ + static constexpr bool IsOpl2 = (Revision == 2); + static constexpr bool IsOpl2Plus = (Revision >= 2); + static constexpr bool IsOpl3Plus = (Revision >= 3); + static constexpr bool IsOpl4Plus = (Revision >= 4); + +public: + // constants + static constexpr uint32_t OUTPUTS = IsOpl3Plus ? 4 : 1; + static constexpr uint32_t CHANNELS = IsOpl3Plus ? 18 : 9; + static constexpr uint32_t ALL_CHANNELS = (1 << CHANNELS) - 1; + static constexpr uint32_t OPERATORS = CHANNELS * 2; + static constexpr uint32_t WAVEFORMS = IsOpl3Plus ? 8 : (IsOpl2Plus ? 4 : 1); + static constexpr uint32_t REGISTERS = IsOpl3Plus ? 0x200 : 0x100; + static constexpr uint32_t REG_MODE = 0x04; + static constexpr uint32_t DEFAULT_PRESCALE = IsOpl4Plus ? 19 : (IsOpl3Plus ? 8 : 4); + static constexpr uint32_t EG_CLOCK_DIVIDER = 1; + static constexpr uint32_t CSM_TRIGGER_MASK = ALL_CHANNELS; + static constexpr bool DYNAMIC_OPS = IsOpl3Plus; + static constexpr bool MODULATOR_DELAY = !IsOpl3Plus; + static constexpr uint8_t STATUS_TIMERA = 0x40; + static constexpr uint8_t STATUS_TIMERB = 0x20; + static constexpr uint8_t STATUS_BUSY = 0; + static constexpr uint8_t STATUS_IRQ = 0x80; + + // constructor + opl_registers_base(); + + // reset to initial state + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // map channel number to register offset + static constexpr uint32_t channel_offset(uint32_t chnum) + { + assert(chnum < CHANNELS); + if (!IsOpl3Plus) + return chnum; + else + return (chnum % 9) + 0x100 * (chnum / 9); + } + + // map operator number to register offset + static constexpr uint32_t operator_offset(uint32_t opnum) + { + assert(opnum < OPERATORS); + if (!IsOpl3Plus) + return opnum + 2 * (opnum / 6); + else + return (opnum % 18) + 2 * ((opnum % 18) / 6) + 0x100 * (opnum / 18); + } + + // return an array of operator indices for each channel + struct operator_mapping { uint32_t chan[CHANNELS]; }; + void operator_map(operator_mapping &dest) const; + + // OPL4 apparently can read back FM registers? + uint8_t read(uint16_t index) const { return m_regdata[index]; } + + // handle writes to the register array + bool write(uint16_t index, uint8_t data, uint32_t &chan, uint32_t &opmask); + + // clock the noise and LFO, if present, returning LFO PM value + int32_t clock_noise_and_lfo(); + + // reset the LFO + void reset_lfo() { m_lfo_am_counter = m_lfo_pm_counter = 0; } + + // return the AM offset from LFO for the given channel + // on OPL this is just a fixed value + uint32_t lfo_am_offset(uint32_t choffs) const { return m_lfo_am; } + + // return LFO/noise states + uint32_t noise_state() const { return m_noise_lfsr >> 23; } + + // caching helpers + void cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache); + + // compute the phase step, given a PM value + uint32_t compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm); + + // log a key-on event + std::string log_keyon(uint32_t choffs, uint32_t opoffs); + + // system-wide registers + uint32_t test() const { return byte(0x01, 0, 8); } + uint32_t waveform_enable() const { return IsOpl2 ? byte(0x01, 5, 1) : (IsOpl3Plus ? 1 : 0); } + uint32_t timer_a_value() const { return byte(0x02, 0, 8) * 4; } // 8->10 bits + uint32_t timer_b_value() const { return byte(0x03, 0, 8); } + uint32_t status_mask() const { return byte(0x04, 0, 8) & 0x78; } + uint32_t irq_reset() const { return byte(0x04, 7, 1); } + uint32_t reset_timer_b() const { return byte(0x04, 7, 1) | byte(0x04, 5, 1); } + uint32_t reset_timer_a() const { return byte(0x04, 7, 1) | byte(0x04, 6, 1); } + uint32_t enable_timer_b() const { return 1; } + uint32_t enable_timer_a() const { return 1; } + uint32_t load_timer_b() const { return byte(0x04, 1, 1); } + uint32_t load_timer_a() const { return byte(0x04, 0, 1); } + uint32_t csm() const { return IsOpl3Plus ? 0 : byte(0x08, 7, 1); } + uint32_t note_select() const { return byte(0x08, 6, 1); } + uint32_t lfo_am_depth() const { return byte(0xbd, 7, 1); } + uint32_t lfo_pm_depth() const { return byte(0xbd, 6, 1); } + uint32_t rhythm_enable() const { return byte(0xbd, 5, 1); } + uint32_t rhythm_keyon() const { return byte(0xbd, 4, 0); } + uint32_t newflag() const { return IsOpl3Plus ? byte(0x105, 0, 1) : 0; } + uint32_t new2flag() const { return IsOpl4Plus ? byte(0x105, 1, 1) : 0; } + uint32_t fourop_enable() const { return IsOpl3Plus ? byte(0x104, 0, 6) : 0; } + + // per-channel registers + uint32_t ch_block_freq(uint32_t choffs) const { return word(0xb0, 0, 5, 0xa0, 0, 8, choffs); } + uint32_t ch_feedback(uint32_t choffs) const { return byte(0xc0, 1, 3, choffs); } + uint32_t ch_algorithm(uint32_t choffs) const { return byte(0xc0, 0, 1, choffs) | (IsOpl3Plus ? (8 | (byte(0xc3, 0, 1, choffs) << 1)) : 0); } + uint32_t ch_output_any(uint32_t choffs) const { return newflag() ? byte(0xc0 + choffs, 4, 4) : 1; } + uint32_t ch_output_0(uint32_t choffs) const { return newflag() ? byte(0xc0 + choffs, 4, 1) : 1; } + uint32_t ch_output_1(uint32_t choffs) const { return newflag() ? byte(0xc0 + choffs, 5, 1) : (IsOpl3Plus ? 1 : 0); } + uint32_t ch_output_2(uint32_t choffs) const { return newflag() ? byte(0xc0 + choffs, 6, 1) : 0; } + uint32_t ch_output_3(uint32_t choffs) const { return newflag() ? byte(0xc0 + choffs, 7, 1) : 0; } + + // per-operator registers + uint32_t op_lfo_am_enable(uint32_t opoffs) const { return byte(0x20, 7, 1, opoffs); } + uint32_t op_lfo_pm_enable(uint32_t opoffs) const { return byte(0x20, 6, 1, opoffs); } + uint32_t op_eg_sustain(uint32_t opoffs) const { return byte(0x20, 5, 1, opoffs); } + uint32_t op_ksr(uint32_t opoffs) const { return byte(0x20, 4, 1, opoffs); } + uint32_t op_multiple(uint32_t opoffs) const { return byte(0x20, 0, 4, opoffs); } + uint32_t op_ksl(uint32_t opoffs) const { uint32_t temp = byte(0x40, 6, 2, opoffs); return bitfield(temp, 1) | (bitfield(temp, 0) << 1); } + uint32_t op_total_level(uint32_t opoffs) const { return byte(0x40, 0, 6, opoffs); } + uint32_t op_attack_rate(uint32_t opoffs) const { return byte(0x60, 4, 4, opoffs); } + uint32_t op_decay_rate(uint32_t opoffs) const { return byte(0x60, 0, 4, opoffs); } + uint32_t op_sustain_level(uint32_t opoffs) const { return byte(0x80, 4, 4, opoffs); } + uint32_t op_release_rate(uint32_t opoffs) const { return byte(0x80, 0, 4, opoffs); } + uint32_t op_waveform(uint32_t opoffs) const { return IsOpl2Plus ? byte(0xe0, 0, newflag() ? 3 : 2, opoffs) : 0; } + +protected: + // return a bitfield extracted from a byte + uint32_t byte(uint32_t offset, uint32_t start, uint32_t count, uint32_t extra_offset = 0) const + { + return bitfield(m_regdata[offset + extra_offset], start, count); + } + + // return a bitfield extracted from a pair of bytes, MSBs listed first + uint32_t word(uint32_t offset1, uint32_t start1, uint32_t count1, uint32_t offset2, uint32_t start2, uint32_t count2, uint32_t extra_offset = 0) const + { + return (byte(offset1, start1, count1, extra_offset) << count2) | byte(offset2, start2, count2, extra_offset); + } + + // helper to determine if the this channel is an active rhythm channel + bool is_rhythm(uint32_t choffs) const + { + return rhythm_enable() && (choffs >= 6 && choffs <= 8); + } + + // internal state + uint16_t m_lfo_am_counter; // LFO AM counter + uint16_t m_lfo_pm_counter; // LFO PM counter + uint32_t m_noise_lfsr; // noise LFSR state + uint8_t m_lfo_am; // current LFO AM value + uint8_t m_regdata[REGISTERS]; // register data + uint16_t m_waveform[WAVEFORMS][WAVEFORM_LENGTH]; // waveforms +}; + +using opl_registers = opl_registers_base<1>; +using opl2_registers = opl_registers_base<2>; +using opl3_registers = opl_registers_base<3>; +using opl4_registers = opl_registers_base<4>; + + + +// ======================> opll_registers + +// +// OPLL register map: +// +// System-wide registers: +// 0E --x----- Rhythm enable +// ---x---- Bass drum key on +// ----x--- Snare drum key on +// -----x-- Tom key on +// ------x- Top cymbal key on +// -------x High hat key on +// 0F xxxxxxxx Test register +// +// Per-channel registers (channel in address bits 0-3) +// 10-18 xxxxxxxx F-number (low 8 bits) +// 20-28 --x----- Sustain on +// ---x---- Key on +// --- xxx- Block (octvate, 0-7) +// -------x F-number (high bit) +// 30-38 xxxx---- Instrument selection +// ----xxxx Volume +// +// User instrument registers (for carrier, modulator operators) +// 00-01 x------- AM enable +// -x------ PM enable (VIB) +// --x----- EG type +// ---x---- Key scale rate +// ----xxxx Multiple value (0-15) +// 02 xx------ Key scale level (carrier, 0-3) +// --xxxxxx Total level (modulator, 0-63) +// 03 xx------ Key scale level (modulator, 0-3) +// ---x---- Rectified wave (carrier) +// ----x--- Rectified wave (modulator) +// -----xxx Feedback level for operator 1 (0-7) +// 04-05 xxxx---- Attack rate (0-15) +// ----xxxx Decay rate (0-15) +// 06-07 xxxx---- Sustain level (0-15) +// ----xxxx Release rate (0-15) +// +// Internal (fake) registers: +// 40-48 xxxxxxxx Current instrument base address +// 4E-5F xxxxxxxx Current instrument base address + operator slot (0/1) +// 70-FF xxxxxxxx Data for instruments (1-16 plus 3 drums) +// + +class opll_registers : public fm_registers_base +{ +public: + static constexpr uint32_t OUTPUTS = 2; + static constexpr uint32_t CHANNELS = 9; + static constexpr uint32_t ALL_CHANNELS = (1 << CHANNELS) - 1; + static constexpr uint32_t OPERATORS = CHANNELS * 2; + static constexpr uint32_t WAVEFORMS = 2; + static constexpr uint32_t REGISTERS = 0x40; + static constexpr uint32_t REG_MODE = 0x3f; + static constexpr uint32_t DEFAULT_PRESCALE = 4; + static constexpr uint32_t EG_CLOCK_DIVIDER = 1; + static constexpr uint32_t CSM_TRIGGER_MASK = 0; + static constexpr bool EG_HAS_DEPRESS = true; + static constexpr bool MODULATOR_DELAY = true; + static constexpr uint8_t STATUS_TIMERA = 0; + static constexpr uint8_t STATUS_TIMERB = 0; + static constexpr uint8_t STATUS_BUSY = 0; + static constexpr uint8_t STATUS_IRQ = 0; + + // OPLL-specific constants + static constexpr uint32_t INSTDATA_SIZE = 0x90; + + // constructor + opll_registers(); + + // reset to initial state + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // map channel number to register offset + static constexpr uint32_t channel_offset(uint32_t chnum) + { + assert(chnum < CHANNELS); + return chnum; + } + + // map operator number to register offset + static constexpr uint32_t operator_offset(uint32_t opnum) + { + assert(opnum < OPERATORS); + return opnum; + } + + // return an array of operator indices for each channel + struct operator_mapping { uint32_t chan[CHANNELS]; }; + void operator_map(operator_mapping &dest) const; + + // read a register value + uint8_t read(uint16_t index) const { return m_regdata[index]; } + + // handle writes to the register array + bool write(uint16_t index, uint8_t data, uint32_t &chan, uint32_t &opmask); + + // clock the noise and LFO, if present, returning LFO PM value + int32_t clock_noise_and_lfo(); + + // reset the LFO + void reset_lfo() { m_lfo_am_counter = m_lfo_pm_counter = 0; } + + // return the AM offset from LFO for the given channel + // on OPL this is just a fixed value + uint32_t lfo_am_offset(uint32_t choffs) const { return m_lfo_am; } + + // return LFO/noise states + uint32_t noise_state() const { return m_noise_lfsr >> 23; } + + // caching helpers + void cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache); + + // compute the phase step, given a PM value + uint32_t compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm); + + // log a key-on event + std::string log_keyon(uint32_t choffs, uint32_t opoffs); + + // set the instrument data + void set_instrument_data(uint8_t const *data) + { + std::copy_n(data, INSTDATA_SIZE, &m_instdata[0]); + } + + // system-wide registers + uint32_t rhythm_enable() const { return byte(0x0e, 5, 1); } + uint32_t rhythm_keyon() const { return byte(0x0e, 4, 0); } + uint32_t test() const { return byte(0x0f, 0, 8); } + uint32_t waveform_enable() const { return 1; } + uint32_t timer_a_value() const { return 0; } + uint32_t timer_b_value() const { return 0; } + uint32_t status_mask() const { return 0; } + uint32_t irq_reset() const { return 0; } + uint32_t reset_timer_b() const { return 0; } + uint32_t reset_timer_a() const { return 0; } + uint32_t enable_timer_b() const { return 0; } + uint32_t enable_timer_a() const { return 0; } + uint32_t load_timer_b() const { return 0; } + uint32_t load_timer_a() const { return 0; } + uint32_t csm() const { return 0; } + + // per-channel registers + uint32_t ch_block_freq(uint32_t choffs) const { return word(0x20, 0, 4, 0x10, 0, 8, choffs); } + uint32_t ch_sustain(uint32_t choffs) const { return byte(0x20, 5, 1, choffs); } + uint32_t ch_total_level(uint32_t choffs) const { return instchbyte(0x02, 0, 6, choffs); } + uint32_t ch_feedback(uint32_t choffs) const { return instchbyte(0x03, 0, 3, choffs); } + uint32_t ch_algorithm(uint32_t choffs) const { return 0; } + uint32_t ch_instrument(uint32_t choffs) const { return byte(0x30, 4, 4, choffs); } + uint32_t ch_output_any(uint32_t choffs) const { return 1; } + uint32_t ch_output_0(uint32_t choffs) const { return !is_rhythm(choffs); } + uint32_t ch_output_1(uint32_t choffs) const { return is_rhythm(choffs); } + uint32_t ch_output_2(uint32_t choffs) const { return 0; } + uint32_t ch_output_3(uint32_t choffs) const { return 0; } + + // per-operator registers + uint32_t op_lfo_am_enable(uint32_t opoffs) const { return instopbyte(0x00, 7, 1, opoffs); } + uint32_t op_lfo_pm_enable(uint32_t opoffs) const { return instopbyte(0x00, 6, 1, opoffs); } + uint32_t op_eg_sustain(uint32_t opoffs) const { return instopbyte(0x00, 5, 1, opoffs); } + uint32_t op_ksr(uint32_t opoffs) const { return instopbyte(0x00, 4, 1, opoffs); } + uint32_t op_multiple(uint32_t opoffs) const { return instopbyte(0x00, 0, 4, opoffs); } + uint32_t op_ksl(uint32_t opoffs) const { return instopbyte(0x02, 6, 2, opoffs); } + uint32_t op_waveform(uint32_t opoffs) const { return instchbyte(0x03, 3 + bitfield(opoffs, 0), 1, opoffs >> 1); } + uint32_t op_attack_rate(uint32_t opoffs) const { return instopbyte(0x04, 4, 4, opoffs); } + uint32_t op_decay_rate(uint32_t opoffs) const { return instopbyte(0x04, 0, 4, opoffs); } + uint32_t op_sustain_level(uint32_t opoffs) const { return instopbyte(0x06, 4, 4, opoffs); } + uint32_t op_release_rate(uint32_t opoffs) const { return instopbyte(0x06, 0, 4, opoffs); } + uint32_t op_volume(uint32_t opoffs) const { return byte(0x30, 4 * bitfield(~opoffs, 0), 4, opoffs >> 1); } + +private: + // return a bitfield extracted from a byte + uint32_t byte(uint32_t offset, uint32_t start, uint32_t count, uint32_t extra_offset = 0) const + { + return bitfield(m_regdata[offset + extra_offset], start, count); + } + + // return a bitfield extracted from a pair of bytes, MSBs listed first + uint32_t word(uint32_t offset1, uint32_t start1, uint32_t count1, uint32_t offset2, uint32_t start2, uint32_t count2, uint32_t extra_offset = 0) const + { + return (byte(offset1, start1, count1, extra_offset) << count2) | byte(offset2, start2, count2, extra_offset); + } + + // helpers to read from instrument channel/operator data + uint32_t instchbyte(uint32_t offset, uint32_t start, uint32_t count, uint32_t choffs) const { return bitfield(m_chinst[choffs][offset], start, count); } + uint32_t instopbyte(uint32_t offset, uint32_t start, uint32_t count, uint32_t opoffs) const { return bitfield(m_opinst[opoffs][offset], start, count); } + + // helper to determine if the this channel is an active rhythm channel + bool is_rhythm(uint32_t choffs) const + { + return rhythm_enable() && choffs >= 6; + } + + // internal state + uint16_t m_lfo_am_counter; // LFO AM counter + uint16_t m_lfo_pm_counter; // LFO PM counter + uint32_t m_noise_lfsr; // noise LFSR state + uint8_t m_lfo_am; // current LFO AM value + uint8_t const *m_chinst[CHANNELS]; // pointer to instrument data for each channel + uint8_t const *m_opinst[OPERATORS]; // pointer to instrument data for each operator + uint8_t m_regdata[REGISTERS]; // register data + uint8_t m_instdata[INSTDATA_SIZE]; // instrument data + uint16_t m_waveform[WAVEFORMS][WAVEFORM_LENGTH]; // waveforms +}; + + + +//********************************************************* +// OPL IMPLEMENTATION CLASSES +//********************************************************* + +// ======================> ym3526 + +class ym3526 +{ +public: + using fm_engine = fm_engine_base; + using output_data = fm_engine::output_data; + static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS; + + // constructor + ym3526(ymfm_interface &intf); + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access + uint8_t read_status(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate samples of sound + void generate(output_data *output, uint32_t numsamples = 1); +protected: + // internal state + uint8_t m_address; // address register + fm_engine m_fm; // core FM engine +}; + + +// ======================> y8950 + +class y8950 +{ +public: + using fm_engine = fm_engine_base; + using output_data = fm_engine::output_data; + static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS; + + static constexpr uint8_t STATUS_ADPCM_B_PLAYING = 0x01; + static constexpr uint8_t STATUS_ADPCM_B_BRDY = 0x08; + static constexpr uint8_t STATUS_ADPCM_B_EOS = 0x10; + static constexpr uint8_t ALL_IRQS = STATUS_ADPCM_B_BRDY | STATUS_ADPCM_B_EOS | fm_engine::STATUS_TIMERA | fm_engine::STATUS_TIMERB; + + // constructor + y8950(ymfm_interface &intf); + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access + uint8_t read_status(); + uint8_t read_data(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate samples of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // internal state + uint8_t m_address; // address register + uint8_t m_io_ddr; // data direction register for I/O + fm_engine m_fm; // core FM engine + adpcm_b_engine m_adpcm_b; // ADPCM-B engine +}; + + + +//********************************************************* +// OPL2 IMPLEMENTATION CLASSES +//********************************************************* + +// ======================> ym3812 + +class ym3812 +{ +public: + using fm_engine = fm_engine_base; + using output_data = fm_engine::output_data; + static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS; + + // constructor + ym3812(ymfm_interface &intf); + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access + uint8_t read_status(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate samples of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // internal state + uint8_t m_address; // address register + fm_engine m_fm; // core FM engine +}; + + + +//********************************************************* +// OPL3 IMPLEMENTATION CLASSES +//********************************************************* + +// ======================> ymf262 + +class ymf262 +{ +public: + using fm_engine = fm_engine_base; + using output_data = fm_engine::output_data; + static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS; + + // constructor + ymf262(ymfm_interface &intf); + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access + uint8_t read_status(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write_address_hi(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate samples of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // internal state + uint16_t m_address; // address register + fm_engine m_fm; // core FM engine +}; + + +// ======================> ymf289b + +class ymf289b +{ + static constexpr uint8_t STATUS_BUSY_FLAGS = 0x05; + +public: + using fm_engine = fm_engine_base; + using output_data = fm_engine::output_data; + static constexpr uint32_t OUTPUTS = 2; + + // constructor + ymf289b(ymfm_interface &intf); + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access + uint8_t read_status(); + uint8_t read_data(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write_address_hi(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate samples of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // internal helpers + bool ymf289b_mode() { return ((m_fm.regs().read(0x105) & 0x04) != 0); } + + // internal state + uint16_t m_address; // address register + fm_engine m_fm; // core FM engine +}; + + + +//********************************************************* +// OPL4 IMPLEMENTATION CLASSES +//********************************************************* + +// ======================> ymf278b + +class ymf278b +{ + // Using the nominal datasheet frequency of 33.868MHz, the output of the + // chip will be clock/768 = 44.1kHz. However, the FM engine is clocked + // internally at clock/(19*36), or 49.515kHz, so the FM output needs to + // be downsampled. We treat this as needing to clock the FM engine an + // extra tick every few samples. The exact ratio is 768/(19*36) or + // 768/684 = 192/171. So if we always clock the FM once, we'll have + // 192/171 - 1 = 21/171 left. Thus we count 21 for each sample and when + // it gets above 171, we tick an extra time. + static constexpr uint32_t FM_EXTRA_SAMPLE_THRESH = 171; + static constexpr uint32_t FM_EXTRA_SAMPLE_STEP = 192 - FM_EXTRA_SAMPLE_THRESH; + +public: + using fm_engine = fm_engine_base; + static constexpr uint32_t OUTPUTS = 6; + using output_data = ymfm_output; + + static constexpr uint8_t STATUS_BUSY = 0x01; + static constexpr uint8_t STATUS_LD = 0x02; + + // constructor + ymf278b(ymfm_interface &intf); + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const { return input_clock / 768; } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access + uint8_t read_status(); + uint8_t read_data_pcm(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write_address_hi(uint8_t data); + void write_address_pcm(uint8_t data); + void write_data_pcm(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate samples of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // internal state + uint16_t m_address; // address register + uint32_t m_fm_pos; // FM resampling position + uint32_t m_load_remaining; // how many more samples until LD flag clears + bool m_next_status_id; // flag to track which status ID to return + fm_engine m_fm; // core FM engine + pcm_engine m_pcm; // core PCM engine +}; + + + +//********************************************************* +// OPLL IMPLEMENTATION CLASSES +//********************************************************* + +// ======================> opll_base + +class opll_base +{ +public: + using fm_engine = fm_engine_base; + using output_data = fm_engine::output_data; + static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS; + + // constructor + opll_base(ymfm_interface &intf, uint8_t const *data); + + // configuration + void set_instrument_data(uint8_t const *data) { m_fm.regs().set_instrument_data(data); } + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access -- doesn't really have any, but provide these for consistency + uint8_t read_status() { return 0x00; } + uint8_t read(uint32_t offset) { return 0x00; } + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate samples of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // internal state + uint8_t m_address; // address register + fm_engine m_fm; // core FM engine +}; + + +// ======================> ym2413 + +class ym2413 : public opll_base +{ +public: + // constructor + ym2413(ymfm_interface &intf, uint8_t const *instrument_data = nullptr); + +private: + // internal state + static uint8_t const s_default_instruments[]; +}; + + +// ======================> ym2413 + +class ym2423 : public opll_base +{ +public: + // constructor + ym2423(ymfm_interface &intf, uint8_t const *instrument_data = nullptr); + +private: + // internal state + static uint8_t const s_default_instruments[]; +}; + + +// ======================> ymf281 + +class ymf281 : public opll_base +{ +public: + // constructor + ymf281(ymfm_interface &intf, uint8_t const *instrument_data = nullptr); + +private: + // internal state + static uint8_t const s_default_instruments[]; +}; + + +// ======================> ds1001 + +class ds1001 : public opll_base +{ +public: + // constructor + ds1001(ymfm_interface &intf, uint8_t const *instrument_data = nullptr); + +private: + // internal state + static uint8_t const s_default_instruments[]; +}; + +} + +#endif // YMFM_OPL_H diff --git a/src/sound/ymfm/ymfm_opm.cpp b/src/sound/ymfm/ymfm_opm.cpp new file mode 100644 index 000000000..544bbe89a --- /dev/null +++ b/src/sound/ymfm/ymfm_opm.cpp @@ -0,0 +1,539 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#include "ymfm_opm.h" +#include "ymfm_fm.ipp" + +namespace ymfm +{ + +//********************************************************* +// OPM REGISTERS +//********************************************************* + +//------------------------------------------------- +// opm_registers - constructor +//------------------------------------------------- + +opm_registers::opm_registers() : + m_lfo_counter(0), + m_noise_lfsr(1), + m_noise_counter(0), + m_noise_state(0), + m_noise_lfo(0), + m_lfo_am(0) +{ + // create the waveforms + for (uint32_t index = 0; index < WAVEFORM_LENGTH; index++) + m_waveform[0][index] = abs_sin_attenuation(index) | (bitfield(index, 9) << 15); + + // create the LFO waveforms; AM in the low 8 bits, PM in the upper 8 + // waveforms are adjusted to match the pictures in the application manual + for (uint32_t index = 0; index < LFO_WAVEFORM_LENGTH; index++) + { + // waveform 0 is a sawtooth + uint8_t am = index ^ 0xff; + int8_t pm = int8_t(index); + m_lfo_waveform[0][index] = am | (pm << 8); + + // waveform 1 is a square wave + am = bitfield(index, 7) ? 0 : 0xff; + pm = int8_t(am ^ 0x80); + m_lfo_waveform[1][index] = am | (pm << 8); + + // waveform 2 is a triangle wave + am = bitfield(index, 7) ? (index << 1) : ((index ^ 0xff) << 1); + pm = int8_t(bitfield(index, 6) ? am : ~am); + m_lfo_waveform[2][index] = am | (pm << 8); + + // waveform 3 is noise; it is filled in dynamically + m_lfo_waveform[3][index] = 0; + } +} + + +//------------------------------------------------- +// reset - reset to initial state +//------------------------------------------------- + +void opm_registers::reset() +{ + std::fill_n(&m_regdata[0], REGISTERS, 0); + + // enable output on both channels by default + m_regdata[0x20] = m_regdata[0x21] = m_regdata[0x22] = m_regdata[0x23] = 0xc0; + m_regdata[0x24] = m_regdata[0x25] = m_regdata[0x26] = m_regdata[0x27] = 0xc0; +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void opm_registers::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_lfo_counter); + state.save_restore(m_lfo_am); + state.save_restore(m_noise_lfsr); + state.save_restore(m_noise_counter); + state.save_restore(m_noise_state); + state.save_restore(m_noise_lfo); + state.save_restore(m_regdata); +} + + +//------------------------------------------------- +// operator_map - return an array of operator +// indices for each channel; for OPM this is fixed +//------------------------------------------------- + +void opm_registers::operator_map(operator_mapping &dest) const +{ + // Note that the channel index order is 0,2,1,3, so we bitswap the index. + // + // This is because the order in the map is: + // carrier 1, carrier 2, modulator 1, modulator 2 + // + // But when wiring up the connections, the more natural order is: + // carrier 1, modulator 1, carrier 2, modulator 2 + static const operator_mapping s_fixed_map = + { { + operator_list( 0, 16, 8, 24 ), // Channel 0 operators + operator_list( 1, 17, 9, 25 ), // Channel 1 operators + operator_list( 2, 18, 10, 26 ), // Channel 2 operators + operator_list( 3, 19, 11, 27 ), // Channel 3 operators + operator_list( 4, 20, 12, 28 ), // Channel 4 operators + operator_list( 5, 21, 13, 29 ), // Channel 5 operators + operator_list( 6, 22, 14, 30 ), // Channel 6 operators + operator_list( 7, 23, 15, 31 ), // Channel 7 operators + } }; + dest = s_fixed_map; +} + + +//------------------------------------------------- +// write - handle writes to the register array +//------------------------------------------------- + +bool opm_registers::write(uint16_t index, uint8_t data, uint32_t &channel, uint32_t &opmask) +{ + assert(index < REGISTERS); + + // LFO AM/PM depth are written to the same register (0x19); + // redirect the PM depth to an unused neighbor (0x1a) + if (index == 0x19) + m_regdata[index + bitfield(data, 7)] = data; + else if (index != 0x1a) + m_regdata[index] = data; + + // handle writes to the key on index + if (index == 0x08) + { + channel = bitfield(data, 0, 3); + opmask = bitfield(data, 3, 4); + return true; + } + return false; +} + + +//------------------------------------------------- +// clock_noise_and_lfo - clock the noise and LFO, +// handling clock division, depth, and waveform +// computations +//------------------------------------------------- + +int32_t opm_registers::clock_noise_and_lfo() +{ + // base noise frequency is measured at 2x 1/2 FM frequency; this + // means each tick counts as two steps against the noise counter + uint32_t freq = noise_frequency(); + for (int rep = 0; rep < 2; rep++) + { + // evidence seems to suggest the LFSR is clocked continually and just + // sampled at the noise frequency for output purposes; note that the + // low 8 bits are the most recent 8 bits of history while bits 8-24 + // contain the 17 bit LFSR state + m_noise_lfsr <<= 1; + m_noise_lfsr |= bitfield(m_noise_lfsr, 17) ^ bitfield(m_noise_lfsr, 14) ^ 1; + + // compare against the frequency and latch when we exceed it + if (m_noise_counter++ >= freq) + { + m_noise_counter = 0; + m_noise_state = bitfield(m_noise_lfsr, 17); + } + } + + // treat the rate as a 4.4 floating-point step value with implied + // leading 1; this matches exactly the frequencies in the application + // manual, though it might not be implemented exactly this way on chip + uint32_t rate = lfo_rate(); + m_lfo_counter += (0x10 | bitfield(rate, 0, 4)) << bitfield(rate, 4, 4); + + // bit 1 of the test register is officially undocumented but has been + // discovered to hold the LFO in reset while active + if (lfo_reset()) + m_lfo_counter = 0; + + // now pull out the non-fractional LFO value + uint32_t lfo = bitfield(m_lfo_counter, 22, 8); + + // fill in the noise entry 1 ahead of our current position; this + // ensures the current value remains stable for a full LFO clock + // and effectively latches the running value when the LFO advances + uint32_t lfo_noise = bitfield(m_noise_lfsr, 17, 8); + m_lfo_waveform[3][(lfo + 1) & 0xff] = lfo_noise | (lfo_noise << 8); + + // fetch the AM/PM values based on the waveform; AM is unsigned and + // encoded in the low 8 bits, while PM signed and encoded in the upper + // 8 bits + int32_t ampm = m_lfo_waveform[lfo_waveform()][lfo]; + + // apply depth to the AM value and store for later + m_lfo_am = ((ampm & 0xff) * lfo_am_depth()) >> 7; + + // apply depth to the PM value and return it + return ((ampm >> 8) * int32_t(lfo_pm_depth())) >> 7; +} + + +//------------------------------------------------- +// lfo_am_offset - return the AM offset from LFO +// for the given channel +//------------------------------------------------- + +uint32_t opm_registers::lfo_am_offset(uint32_t choffs) const +{ + // OPM maps AM quite differently from OPN + + // shift value for AM sensitivity is [*, 0, 1, 2], + // mapping to values of [0, 23.9, 47.8, and 95.6dB] + uint32_t am_sensitivity = ch_lfo_am_sens(choffs); + if (am_sensitivity == 0) + return 0; + + // QUESTION: see OPN note below for the dB range mapping; it applies + // here as well + + // raw LFO AM value on OPM is 0-FF, which is already a factor of 2 + // larger than the OPN below, putting our staring point at 2x theirs; + // this works out since our minimum is 2x their maximum + return m_lfo_am << (am_sensitivity - 1); +} + + +//------------------------------------------------- +// cache_operator_data - fill the operator cache +// with prefetched data +//------------------------------------------------- + +void opm_registers::cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache) +{ + // set up the easy stuff + cache.waveform = &m_waveform[0][0]; + + // get frequency from the channel + uint32_t block_freq = cache.block_freq = ch_block_freq(choffs); + + // compute the keycode: block_freq is: + // + // BBBCCCCFFFFFF + // ^^^^^ + // + // the 5-bit keycode is just the top 5 bits (block + top 2 bits + // of the key code) + uint32_t keycode = bitfield(block_freq, 8, 5); + + // detune adjustment + cache.detune = detune_adjustment(op_detune(opoffs), keycode); + + // multiple value, as an x.1 value (0 means 0.5) + cache.multiple = op_multiple(opoffs) * 2; + if (cache.multiple == 0) + cache.multiple = 1; + + // phase step, or PHASE_STEP_DYNAMIC if PM is active; this depends on + // block_freq, detune, and multiple, so compute it after we've done those + if (lfo_pm_depth() == 0 || ch_lfo_pm_sens(choffs) == 0) + cache.phase_step = compute_phase_step(choffs, opoffs, cache, 0); + else + cache.phase_step = opdata_cache::PHASE_STEP_DYNAMIC; + + // total level, scaled by 8 + cache.total_level = op_total_level(opoffs) << 3; + + // 4-bit sustain level, but 15 means 31 so effectively 5 bits + cache.eg_sustain = op_sustain_level(opoffs); + cache.eg_sustain |= (cache.eg_sustain + 1) & 0x10; + cache.eg_sustain <<= 5; + + // determine KSR adjustment for enevlope rates + uint32_t ksrval = keycode >> (op_ksr(opoffs) ^ 3); + cache.eg_rate[EG_ATTACK] = effective_rate(op_attack_rate(opoffs) * 2, ksrval); + cache.eg_rate[EG_DECAY] = effective_rate(op_decay_rate(opoffs) * 2, ksrval); + cache.eg_rate[EG_SUSTAIN] = effective_rate(op_sustain_rate(opoffs) * 2, ksrval); + cache.eg_rate[EG_RELEASE] = effective_rate(op_release_rate(opoffs) * 4 + 2, ksrval); +} + + +//------------------------------------------------- +// compute_phase_step - compute the phase step +//------------------------------------------------- + +uint32_t opm_registers::compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm) +{ + // OPM logic is rather unique here, due to extra detune + // and the use of key codes (not to be confused with keycode) + + // start with coarse detune delta; table uses cents value from + // manual, converted into 1/64ths + static const int16_t s_detune2_delta[4] = { 0, (600*64+50)/100, (781*64+50)/100, (950*64+50)/100 }; + int32_t delta = s_detune2_delta[op_detune2(opoffs)]; + + // add in the PM delta + uint32_t pm_sensitivity = ch_lfo_pm_sens(choffs); + if (pm_sensitivity != 0) + { + // raw PM value is -127..128 which is +/- 200 cents + // manual gives these magnitudes in cents: + // 0, +/-5, +/-10, +/-20, +/-50, +/-100, +/-400, +/-700 + // this roughly corresponds to shifting the 200-cent value: + // 0 >> 5, >> 4, >> 3, >> 2, >> 1, << 1, << 2 + if (pm_sensitivity < 6) + delta += lfo_raw_pm >> (6 - pm_sensitivity); + else + delta += lfo_raw_pm << (pm_sensitivity - 5); + } + + // apply delta and convert to a frequency number + uint32_t phase_step = opm_key_code_to_phase_step(cache.block_freq, delta); + + // apply detune based on the keycode + phase_step += cache.detune; + + // apply frequency multiplier (which is cached as an x.1 value) + return (phase_step * cache.multiple) >> 1; +} + + +//------------------------------------------------- +// log_keyon - log a key-on event +//------------------------------------------------- + +std::string opm_registers::log_keyon(uint32_t choffs, uint32_t opoffs) +{ + uint32_t chnum = choffs; + uint32_t opnum = opoffs; + + char buffer[256]; + char *end = &buffer[0]; + + end += sprintf(end, "%u.%02u freq=%04X dt2=%u dt=%u fb=%u alg=%X mul=%X tl=%02X ksr=%u adsr=%02X/%02X/%02X/%X sl=%X out=%c%c", + chnum, opnum, + ch_block_freq(choffs), + op_detune2(opoffs), + op_detune(opoffs), + ch_feedback(choffs), + ch_algorithm(choffs), + op_multiple(opoffs), + op_total_level(opoffs), + op_ksr(opoffs), + op_attack_rate(opoffs), + op_decay_rate(opoffs), + op_sustain_rate(opoffs), + op_release_rate(opoffs), + op_sustain_level(opoffs), + ch_output_0(choffs) ? 'L' : '-', + ch_output_1(choffs) ? 'R' : '-'); + + bool am = (lfo_am_depth() != 0 && ch_lfo_am_sens(choffs) != 0 && op_lfo_am_enable(opoffs) != 0); + if (am) + end += sprintf(end, " am=%u/%02X", ch_lfo_am_sens(choffs), lfo_am_depth()); + bool pm = (lfo_pm_depth() != 0 && ch_lfo_pm_sens(choffs) != 0); + if (pm) + end += sprintf(end, " pm=%u/%02X", ch_lfo_pm_sens(choffs), lfo_pm_depth()); + if (am || pm) + end += sprintf(end, " lfo=%02X/%c", lfo_rate(), "WQTN"[lfo_waveform()]); + if (noise_enable() && opoffs == 31) + end += sprintf(end, " noise=1"); + + return buffer; +} + + + +//********************************************************* +// YM2151 +//********************************************************* + +//------------------------------------------------- +// ym2151 - constructor +//------------------------------------------------- + +ym2151::ym2151(ymfm_interface &intf, opm_variant variant) : + m_variant(variant), + m_address(0), + m_fm(intf) +{ +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void ym2151::reset() +{ + // reset the engines + m_fm.reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ym2151::save_restore(ymfm_saved_state &state) +{ + m_fm.save_restore(state); + state.save_restore(m_address); +} + + +//------------------------------------------------- +// read_status - read the status register +//------------------------------------------------- + +uint8_t ym2151::read_status() +{ + uint8_t result = m_fm.status(); + if (m_fm.intf().ymfm_is_busy()) + result |= fm_engine::STATUS_BUSY; + return result; +} + + +//------------------------------------------------- +// read - handle a read from the device +//------------------------------------------------- + +uint8_t ym2151::read(uint32_t offset) +{ + uint8_t result = 0xff; + switch (offset & 1) + { + case 0: // data port (unused) + debug::log_unexpected_read_write("Unexpected read from YM2151 offset %d\n", offset & 3); + break; + + case 1: // status port, YM2203 compatible + result = read_status(); + break; + } + return result; +} + + +//------------------------------------------------- +// write_address - handle a write to the address +// register +//------------------------------------------------- + +void ym2151::write_address(uint8_t data) +{ + // just set the address + m_address = data; +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym2151::write_data(uint8_t data) +{ + // write the FM register + m_fm.write(m_address, data); + + // special cases + if (m_address == 0x1b) + { + // writes to register 0x1B send the upper 2 bits to the output lines + m_fm.intf().ymfm_external_write(ACCESS_IO, 0, data >> 6); + } + + // mark busy for a bit + m_fm.intf().ymfm_set_busy_end(32 * m_fm.clock_prescale()); +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym2151::write(uint32_t offset, uint8_t data) +{ + switch (offset & 1) + { + case 0: // address port + write_address(data); + break; + + case 1: // data port + write_data(data); + break; + } +} + + +//------------------------------------------------- +// generate - generate one sample of sound +//------------------------------------------------- + +void ym2151::generate(output_data *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + // clock the system + m_fm.clock(fm_engine::ALL_CHANNELS); + + // update the FM content; OPM is full 14-bit with no intermediate clipping + m_fm.output(output->clear(), 0, 32767, fm_engine::ALL_CHANNELS); + + // YM2151 uses an external DAC (YM3012) with mantissa/exponent format + // convert to 10.3 floating point value and back to simulate truncation + output->roundtrip_fp(); + } +} + +} diff --git a/src/sound/ymfm/ymfm_opm.h b/src/sound/ymfm/ymfm_opm.h new file mode 100644 index 000000000..b126135d4 --- /dev/null +++ b/src/sound/ymfm/ymfm_opm.h @@ -0,0 +1,322 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#ifndef YMFM_OPM_H +#define YMFM_OPM_H + +#pragma once + +#include "ymfm.h" +#include "ymfm_fm.h" + +namespace ymfm +{ + +//********************************************************* +// REGISTER CLASSES +//********************************************************* + +// ======================> opm_registers + +// +// OPM register map: +// +// System-wide registers: +// 01 xxxxxx-x Test register +// ------x- LFO reset +// 08 -x------ Key on/off operator 4 +// --x----- Key on/off operator 3 +// ---x---- Key on/off operator 2 +// ----x--- Key on/off operator 1 +// -----xxx Channel select +// 0F x------- Noise enable +// ---xxxxx Noise frequency +// 10 xxxxxxxx Timer A value (upper 8 bits) +// 11 ------xx Timer A value (lower 2 bits) +// 12 xxxxxxxx Timer B value +// 14 x------- CSM mode +// --x----- Reset timer B +// ---x---- Reset timer A +// ----x--- Enable timer B +// -----x-- Enable timer A +// ------x- Load timer B +// -------x Load timer A +// 18 xxxxxxxx LFO frequency +// 19 0xxxxxxx AM LFO depth +// 1xxxxxxx PM LFO depth +// 1B xx------ CT (2 output data lines) +// ------xx LFO waveform +// +// Per-channel registers (channel in address bits 0-2) +// 20-27 x------- Pan right +// -x------ Pan left +// --xxx--- Feedback level for operator 1 (0-7) +// -----xxx Operator connection algorithm (0-7) +// 28-2F -xxxxxxx Key code +// 30-37 xxxxxx-- Key fraction +// 38-3F -xxx---- LFO PM sensitivity +// ------xx LFO AM shift +// +// Per-operator registers (channel in address bits 0-2, operator in bits 3-4) +// 40-5F -xxx---- Detune value (0-7) +// ----xxxx Multiple value (0-15) +// 60-7F -xxxxxxx Total level (0-127) +// 80-9F xx------ Key scale rate (0-3) +// ---xxxxx Attack rate (0-31) +// A0-BF x------- LFO AM enable +// ---xxxxx Decay rate (0-31) +// C0-DF xx------ Detune 2 value (0-3) +// ---xxxxx Sustain rate (0-31) +// E0-FF xxxx---- Sustain level (0-15) +// ----xxxx Release rate (0-15) +// +// Internal (fake) registers: +// 1A -xxxxxxx PM depth +// + +class opm_registers : public fm_registers_base +{ + // LFO waveforms are 256 entries long + static constexpr uint32_t LFO_WAVEFORM_LENGTH = 256; + +public: + // constants + static constexpr uint32_t OUTPUTS = 2; + static constexpr uint32_t CHANNELS = 8; + static constexpr uint32_t ALL_CHANNELS = (1 << CHANNELS) - 1; + static constexpr uint32_t OPERATORS = CHANNELS * 4; + static constexpr uint32_t WAVEFORMS = 1; + static constexpr uint32_t REGISTERS = 0x100; + static constexpr uint32_t DEFAULT_PRESCALE = 2; + static constexpr uint32_t EG_CLOCK_DIVIDER = 3; + static constexpr uint32_t CSM_TRIGGER_MASK = ALL_CHANNELS; + static constexpr uint32_t REG_MODE = 0x14; + static constexpr uint8_t STATUS_TIMERA = 0x01; + static constexpr uint8_t STATUS_TIMERB = 0x02; + static constexpr uint8_t STATUS_BUSY = 0x80; + static constexpr uint8_t STATUS_IRQ = 0; + + // constructor + opm_registers(); + + // reset to initial state + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // map channel number to register offset + static constexpr uint32_t channel_offset(uint32_t chnum) + { + assert(chnum < CHANNELS); + return chnum; + } + + // map operator number to register offset + static constexpr uint32_t operator_offset(uint32_t opnum) + { + assert(opnum < OPERATORS); + return opnum; + } + + // return an array of operator indices for each channel + struct operator_mapping { uint32_t chan[CHANNELS]; }; + void operator_map(operator_mapping &dest) const; + + // handle writes to the register array + bool write(uint16_t index, uint8_t data, uint32_t &chan, uint32_t &opmask); + + // clock the noise and LFO, if present, returning LFO PM value + int32_t clock_noise_and_lfo(); + + // return the AM offset from LFO for the given channel + uint32_t lfo_am_offset(uint32_t choffs) const; + + // return the current noise state, gated by the noise clock + uint32_t noise_state() const { return m_noise_state; } + + // caching helpers + void cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache); + + // compute the phase step, given a PM value + uint32_t compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm); + + // log a key-on event + std::string log_keyon(uint32_t choffs, uint32_t opoffs); + + // system-wide registers + uint32_t test() const { return byte(0x01, 0, 8); } + uint32_t lfo_reset() const { return byte(0x01, 1, 1); } + uint32_t noise_frequency() const { return byte(0x0f, 0, 5) ^ 0x1f; } + uint32_t noise_enable() const { return byte(0x0f, 7, 1); } + uint32_t timer_a_value() const { return word(0x10, 0, 8, 0x11, 0, 2); } + uint32_t timer_b_value() const { return byte(0x12, 0, 8); } + uint32_t csm() const { return byte(0x14, 7, 1); } + uint32_t reset_timer_b() const { return byte(0x14, 5, 1); } + uint32_t reset_timer_a() const { return byte(0x14, 4, 1); } + uint32_t enable_timer_b() const { return byte(0x14, 3, 1); } + uint32_t enable_timer_a() const { return byte(0x14, 2, 1); } + uint32_t load_timer_b() const { return byte(0x14, 1, 1); } + uint32_t load_timer_a() const { return byte(0x14, 0, 1); } + uint32_t lfo_rate() const { return byte(0x18, 0, 8); } + uint32_t lfo_am_depth() const { return byte(0x19, 0, 7); } + uint32_t lfo_pm_depth() const { return byte(0x1a, 0, 7); } + uint32_t output_bits() const { return byte(0x1b, 6, 2); } + uint32_t lfo_waveform() const { return byte(0x1b, 0, 2); } + + // per-channel registers + uint32_t ch_output_any(uint32_t choffs) const { return byte(0x20, 6, 2, choffs); } + uint32_t ch_output_0(uint32_t choffs) const { return byte(0x20, 6, 1, choffs); } + uint32_t ch_output_1(uint32_t choffs) const { return byte(0x20, 7, 1, choffs); } + uint32_t ch_output_2(uint32_t choffs) const { return 0; } + uint32_t ch_output_3(uint32_t choffs) const { return 0; } + uint32_t ch_feedback(uint32_t choffs) const { return byte(0x20, 3, 3, choffs); } + uint32_t ch_algorithm(uint32_t choffs) const { return byte(0x20, 0, 3, choffs); } + uint32_t ch_block_freq(uint32_t choffs) const { return word(0x28, 0, 7, 0x30, 2, 6, choffs); } + uint32_t ch_lfo_pm_sens(uint32_t choffs) const { return byte(0x38, 4, 3, choffs); } + uint32_t ch_lfo_am_sens(uint32_t choffs) const { return byte(0x38, 0, 2, choffs); } + + // per-operator registers + uint32_t op_detune(uint32_t opoffs) const { return byte(0x40, 4, 3, opoffs); } + uint32_t op_multiple(uint32_t opoffs) const { return byte(0x40, 0, 4, opoffs); } + uint32_t op_total_level(uint32_t opoffs) const { return byte(0x60, 0, 7, opoffs); } + uint32_t op_ksr(uint32_t opoffs) const { return byte(0x80, 6, 2, opoffs); } + uint32_t op_attack_rate(uint32_t opoffs) const { return byte(0x80, 0, 5, opoffs); } + uint32_t op_lfo_am_enable(uint32_t opoffs) const { return byte(0xa0, 7, 1, opoffs); } + uint32_t op_decay_rate(uint32_t opoffs) const { return byte(0xa0, 0, 5, opoffs); } + uint32_t op_detune2(uint32_t opoffs) const { return byte(0xc0, 6, 2, opoffs); } + uint32_t op_sustain_rate(uint32_t opoffs) const { return byte(0xc0, 0, 5, opoffs); } + uint32_t op_sustain_level(uint32_t opoffs) const { return byte(0xe0, 4, 4, opoffs); } + uint32_t op_release_rate(uint32_t opoffs) const { return byte(0xe0, 0, 4, opoffs); } + +protected: + // return a bitfield extracted from a byte + uint32_t byte(uint32_t offset, uint32_t start, uint32_t count, uint32_t extra_offset = 0) const + { + return bitfield(m_regdata[offset + extra_offset], start, count); + } + + // return a bitfield extracted from a pair of bytes, MSBs listed first + uint32_t word(uint32_t offset1, uint32_t start1, uint32_t count1, uint32_t offset2, uint32_t start2, uint32_t count2, uint32_t extra_offset = 0) const + { + return (byte(offset1, start1, count1, extra_offset) << count2) | byte(offset2, start2, count2, extra_offset); + } + + // internal state + uint32_t m_lfo_counter; // LFO counter + uint32_t m_noise_lfsr; // noise LFSR state + uint8_t m_noise_counter; // noise counter + uint8_t m_noise_state; // latched noise state + uint8_t m_noise_lfo; // latched LFO noise value + uint8_t m_lfo_am; // current LFO AM value + uint8_t m_regdata[REGISTERS]; // register data + int16_t m_lfo_waveform[4][LFO_WAVEFORM_LENGTH]; // LFO waveforms; AM in low 8, PM in upper 8 + uint16_t m_waveform[WAVEFORMS][WAVEFORM_LENGTH]; // waveforms +}; + + + +//********************************************************* +// OPM IMPLEMENTATION CLASSES +//********************************************************* + +// ======================> ym2151 + +class ym2151 +{ +public: + using fm_engine = fm_engine_base; + using output_data = fm_engine::output_data; + static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS; + + // constructor + ym2151(ymfm_interface &intf) : ym2151(intf, VARIANT_YM2151) { } + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access + uint8_t read_status(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate one sample of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // variants + enum opm_variant + { + VARIANT_YM2151, + VARIANT_YM2164 + }; + + // internal constructor + ym2151(ymfm_interface &intf, opm_variant variant); + + // internal state + opm_variant m_variant; // chip variant + uint8_t m_address; // address register + fm_engine m_fm; // core FM engine +}; + + + +//********************************************************* +// OPP IMPLEMENTATION CLASSES +//********************************************************* + +// ======================> ym2164 + +// the YM2164 is almost 100% functionally identical to the YM2151, except +// it apparently has some mystery registers in the 00-07 range, and timer +// B's frequency is half that of the 2151 +class ym2164 : public ym2151 +{ +public: + // constructor + ym2164(ymfm_interface &intf) : ym2151(intf, VARIANT_YM2164) { } +}; + +} + + +#endif // YMFM_OPM_H diff --git a/src/sound/ymfm/ymfm_opn.cpp b/src/sound/ymfm/ymfm_opn.cpp new file mode 100644 index 000000000..053ad9770 --- /dev/null +++ b/src/sound/ymfm/ymfm_opn.cpp @@ -0,0 +1,2488 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#include "ymfm_opn.h" +#include "ymfm_fm.ipp" + +namespace ymfm +{ + +//********************************************************* +// OPN/OPNA REGISTERS +//********************************************************* + +//------------------------------------------------- +// opn_registers_base - constructor +//------------------------------------------------- + +template +opn_registers_base::opn_registers_base() : + m_lfo_counter(0), + m_lfo_am(0) +{ + // create the waveforms + for (uint32_t index = 0; index < WAVEFORM_LENGTH; index++) + m_waveform[0][index] = abs_sin_attenuation(index) | (bitfield(index, 9) << 15); +} + + +//------------------------------------------------- +// reset - reset to initial state +//------------------------------------------------- + +template +void opn_registers_base::reset() +{ + std::fill_n(&m_regdata[0], REGISTERS, 0); + if (IsOpnA) + { + // enable output on both channels by default + m_regdata[0xb4] = m_regdata[0xb5] = m_regdata[0xb6] = 0xc0; + m_regdata[0x1b4] = m_regdata[0x1b5] = m_regdata[0x1b6] = 0xc0; + } +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +template +void opn_registers_base::save_restore(ymfm_saved_state &state) +{ + if (IsOpnA) + { + state.save_restore(m_lfo_counter); + state.save_restore(m_lfo_am); + } + state.save_restore(m_regdata); +} + + +//------------------------------------------------- +// operator_map - return an array of operator +// indices for each channel; for OPN this is fixed +//------------------------------------------------- + +template<> +void opn_registers_base::operator_map(operator_mapping &dest) const +{ + // Note that the channel index order is 0,2,1,3, so we bitswap the index. + // + // This is because the order in the map is: + // carrier 1, carrier 2, modulator 1, modulator 2 + // + // But when wiring up the connections, the more natural order is: + // carrier 1, modulator 1, carrier 2, modulator 2 + static const operator_mapping s_fixed_map = + { { + operator_list( 0, 6, 3, 9 ), // Channel 0 operators + operator_list( 1, 7, 4, 10 ), // Channel 1 operators + operator_list( 2, 8, 5, 11 ), // Channel 2 operators + } }; + dest = s_fixed_map; +} + +template<> +void opn_registers_base::operator_map(operator_mapping &dest) const +{ + // Note that the channel index order is 0,2,1,3, so we bitswap the index. + // + // This is because the order in the map is: + // carrier 1, carrier 2, modulator 1, modulator 2 + // + // But when wiring up the connections, the more natural order is: + // carrier 1, modulator 1, carrier 2, modulator 2 + static const operator_mapping s_fixed_map = + { { + operator_list( 0, 6, 3, 9 ), // Channel 0 operators + operator_list( 1, 7, 4, 10 ), // Channel 1 operators + operator_list( 2, 8, 5, 11 ), // Channel 2 operators + operator_list( 12, 18, 15, 21 ), // Channel 3 operators + operator_list( 13, 19, 16, 22 ), // Channel 4 operators + operator_list( 14, 20, 17, 23 ), // Channel 5 operators + } }; + dest = s_fixed_map; +} + + +//------------------------------------------------- +// write - handle writes to the register array +//------------------------------------------------- + +template +bool opn_registers_base::write(uint16_t index, uint8_t data, uint32_t &channel, uint32_t &opmask) +{ + assert(index < REGISTERS); + + // writes in the 0xa0-af/0x1a0-af region are handled as latched pairs + // borrow unused registers 0xb8-bf/0x1b8-bf as temporary holding locations + if ((index & 0xf0) == 0xa0) + { + if (bitfield(index, 0, 2) == 3) + return false; + + uint32_t latchindex = 0xb8 | bitfield(index, 3); + if (IsOpnA) + latchindex |= index & 0x100; + + // writes to the upper half just latch (only low 6 bits matter) + if (bitfield(index, 2)) + m_regdata[latchindex] = data | 0x80; + + // writes to the lower half only commit if the latch is there + else if (bitfield(m_regdata[latchindex], 7)) + { + m_regdata[index] = data; + m_regdata[index | 4] = m_regdata[latchindex] & 0x3f; + m_regdata[latchindex] = 0; + } + return false; + } + else if ((index & 0xf8) == 0xb8) + { + // registers 0xb8-0xbf are used internally + return false; + } + + // everything else is normal + m_regdata[index] = data; + + // handle writes to the key on index + if (index == 0x28) + { + channel = bitfield(data, 0, 2); + if (channel == 3) + return false; + if (IsOpnA) + channel += bitfield(data, 2, 1) * 3; + opmask = bitfield(data, 4, 4); + return true; + } + return false; +} + + +//------------------------------------------------- +// clock_noise_and_lfo - clock the noise and LFO, +// handling clock division, depth, and waveform +// computations +//------------------------------------------------- + +template +int32_t opn_registers_base::clock_noise_and_lfo() +{ + // OPN has no noise generation + + // if LFO not enabled (not present on OPN), quick exit with 0s + if (!IsOpnA || !lfo_enable()) + { + m_lfo_counter = 0; + + // special case: if LFO is disabled on OPNA, it basically just keeps the counter + // at 0; since position 0 gives an AM value of 0x3f, it is important to reflect + // that here; for example, MegaDrive Venom plays some notes with LFO globally + // disabled but enabling LFO on the operators, and it expects this added attenutation + m_lfo_am = IsOpnA ? 0x3f : 0x00; + return 0; + } + + // this table is based on converting the frequencies in the applications + // manual to clock dividers, based on the assumption of a 7-bit LFO value + static uint8_t const lfo_max_count[8] = { 109, 78, 72, 68, 63, 45, 9, 6 }; + uint32_t subcount = uint8_t(m_lfo_counter++); + + // when we cross the divider count, add enough to zero it and cause an + // increment at bit 8; the 7-bit value lives from bits 8-14 + if (subcount >= lfo_max_count[lfo_rate()]) + { + // note: to match the published values this should be 0x100 - subcount; + // however, tests on the hardware and nuked bear out an off-by-one + // error exists that causes the max LFO rate to be faster than published + m_lfo_counter += 0x101 - subcount; + } + + // AM value is 7 bits, staring at bit 8; grab the low 6 directly + m_lfo_am = bitfield(m_lfo_counter, 8, 6); + + // first half of the AM period (bit 6 == 0) is inverted + if (bitfield(m_lfo_counter, 8+6) == 0) + m_lfo_am ^= 0x3f; + + // PM value is 5 bits, starting at bit 10; grab the low 3 directly + int32_t pm = bitfield(m_lfo_counter, 10, 3); + + // PM is reflected based on bit 3 + if (bitfield(m_lfo_counter, 10+3)) + pm ^= 7; + + // PM is negated based on bit 4 + return bitfield(m_lfo_counter, 10+4) ? -pm : pm; +} + + +//------------------------------------------------- +// lfo_am_offset - return the AM offset from LFO +// for the given channel +//------------------------------------------------- + +template +uint32_t opn_registers_base::lfo_am_offset(uint32_t choffs) const +{ + // shift value for AM sensitivity is [7, 3, 1, 0], + // mapping to values of [0, 1.4, 5.9, and 11.8dB] + uint32_t am_shift = (1 << (ch_lfo_am_sens(choffs) ^ 3)) - 1; + + // QUESTION: max sensitivity should give 11.8dB range, but this value + // is directly added to an x.8 attenuation value, which will only give + // 126/256 or ~4.9dB range -- what am I missing? The calculation below + // matches several other emulators, including the Nuked implemenation. + + // raw LFO AM value on OPN is 0-3F, scale that up by a factor of 2 + // (giving 7 bits) before applying the final shift + return (m_lfo_am << 1) >> am_shift; +} + + +//------------------------------------------------- +// cache_operator_data - fill the operator cache +// with prefetched data +//------------------------------------------------- + +template +void opn_registers_base::cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache) +{ + // set up the easy stuff + cache.waveform = &m_waveform[0][0]; + + // get frequency from the channel + uint32_t block_freq = cache.block_freq = ch_block_freq(choffs); + + // if multi-frequency mode is enabled and this is channel 2, + // fetch one of the special frequencies + if (multi_freq() && choffs == 2) + { + if (opoffs == 2) + block_freq = cache.block_freq = multi_block_freq(1); + else if (opoffs == 10) + block_freq = cache.block_freq = multi_block_freq(2); + else if (opoffs == 6) + block_freq = cache.block_freq = multi_block_freq(0); + } + + // compute the keycode: block_freq is: + // + // BBBFFFFFFFFFFF + // ^^^^??? + // + // the 5-bit keycode uses the top 4 bits plus a magic formula + // for the final bit + uint32_t keycode = bitfield(block_freq, 10, 4) << 1; + + // lowest bit is determined by a mix of next lower FNUM bits + // according to this equation from the YM2608 manual: + // + // (F11 & (F10 | F9 | F8)) | (!F11 & F10 & F9 & F8) + // + // for speed, we just look it up in a 16-bit constant + keycode |= bitfield(0xfe80, bitfield(block_freq, 7, 4)); + + // detune adjustment + cache.detune = detune_adjustment(op_detune(opoffs), keycode); + + // multiple value, as an x.1 value (0 means 0.5) + cache.multiple = op_multiple(opoffs) * 2; + if (cache.multiple == 0) + cache.multiple = 1; + + // phase step, or PHASE_STEP_DYNAMIC if PM is active; this depends on + // block_freq, detune, and multiple, so compute it after we've done those + if (!IsOpnA || lfo_enable() == 0 || ch_lfo_pm_sens(choffs) == 0) + cache.phase_step = compute_phase_step(choffs, opoffs, cache, 0); + else + cache.phase_step = opdata_cache::PHASE_STEP_DYNAMIC; + + // total level, scaled by 8 + cache.total_level = op_total_level(opoffs) << 3; + + // 4-bit sustain level, but 15 means 31 so effectively 5 bits + cache.eg_sustain = op_sustain_level(opoffs); + cache.eg_sustain |= (cache.eg_sustain + 1) & 0x10; + cache.eg_sustain <<= 5; + + // determine KSR adjustment for enevlope rates + uint32_t ksrval = keycode >> (op_ksr(opoffs) ^ 3); + cache.eg_rate[EG_ATTACK] = effective_rate(op_attack_rate(opoffs) * 2, ksrval); + cache.eg_rate[EG_DECAY] = effective_rate(op_decay_rate(opoffs) * 2, ksrval); + cache.eg_rate[EG_SUSTAIN] = effective_rate(op_sustain_rate(opoffs) * 2, ksrval); + cache.eg_rate[EG_RELEASE] = effective_rate(op_release_rate(opoffs) * 4 + 2, ksrval); +} + + +//------------------------------------------------- +// compute_phase_step - compute the phase step +//------------------------------------------------- + +template +uint32_t opn_registers_base::compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm) +{ + // OPN phase calculation has only a single detune parameter + // and uses FNUMs instead of keycodes + + // extract frequency number (low 11 bits of block_freq) + uint32_t fnum = bitfield(cache.block_freq, 0, 11) << 1; + + // if there's a non-zero PM sensitivity, compute the adjustment + uint32_t pm_sensitivity = ch_lfo_pm_sens(choffs); + if (pm_sensitivity != 0) + { + // apply the phase adjustment based on the upper 7 bits + // of FNUM and the PM depth parameters + fnum += opn_lfo_pm_phase_adjustment(bitfield(cache.block_freq, 4, 7), pm_sensitivity, lfo_raw_pm); + + // keep fnum to 12 bits + fnum &= 0xfff; + } + + // apply block shift to compute phase step + uint32_t block = bitfield(cache.block_freq, 11, 3); + uint32_t phase_step = (fnum << block) >> 2; + + // apply detune based on the keycode + phase_step += cache.detune; + + // clamp to 17 bits in case detune overflows + // QUESTION: is this specific to the YM2612/3438? + phase_step &= 0x1ffff; + + // apply frequency multiplier (which is cached as an x.1 value) + return (phase_step * cache.multiple) >> 1; +} + + +//------------------------------------------------- +// log_keyon - log a key-on event +//------------------------------------------------- + +template +std::string opn_registers_base::log_keyon(uint32_t choffs, uint32_t opoffs) +{ + uint32_t chnum = (choffs & 3) + 3 * bitfield(choffs, 8); + uint32_t opnum = (opoffs & 15) - ((opoffs & 15) / 4) + 12 * bitfield(opoffs, 8); + + uint32_t block_freq = ch_block_freq(choffs); + if (multi_freq() && choffs == 2) + { + if (opoffs == 2) + block_freq = multi_block_freq(1); + else if (opoffs == 10) + block_freq = multi_block_freq(2); + else if (opoffs == 6) + block_freq = multi_block_freq(0); + } + + char buffer[256]; + char *end = &buffer[0]; + + end += sprintf(end, "%u.%02u freq=%04X dt=%u fb=%u alg=%X mul=%X tl=%02X ksr=%u adsr=%02X/%02X/%02X/%X sl=%X", + chnum, opnum, + block_freq, + op_detune(opoffs), + ch_feedback(choffs), + ch_algorithm(choffs), + op_multiple(opoffs), + op_total_level(opoffs), + op_ksr(opoffs), + op_attack_rate(opoffs), + op_decay_rate(opoffs), + op_sustain_rate(opoffs), + op_release_rate(opoffs), + op_sustain_level(opoffs)); + + if (OUTPUTS > 1) + end += sprintf(end, " out=%c%c", + ch_output_0(choffs) ? 'L' : '-', + ch_output_1(choffs) ? 'R' : '-'); + if (op_ssg_eg_enable(opoffs)) + end += sprintf(end, " ssg=%X", op_ssg_eg_mode(opoffs)); + bool am = (op_lfo_am_enable(opoffs) && ch_lfo_am_sens(choffs) != 0); + if (am) + end += sprintf(end, " am=%u", ch_lfo_am_sens(choffs)); + bool pm = (ch_lfo_pm_sens(choffs) != 0); + if (pm) + end += sprintf(end, " pm=%u", ch_lfo_pm_sens(choffs)); + if (am || pm) + end += sprintf(end, " lfo=%02X", lfo_rate()); + if (multi_freq() && choffs == 2) + end += sprintf(end, " multi=1"); + + return buffer; +} + + + +//********************************************************* +// SSG RESAMPLER +//********************************************************* + +//------------------------------------------------- +// add_last - helper to add the last computed +// value to the sums, applying the given scale +//------------------------------------------------- + +template +void ssg_resampler::add_last(int32_t &sum0, int32_t &sum1, int32_t &sum2, int32_t scale) +{ + sum0 += m_last.data[0] * scale; + sum1 += m_last.data[1] * scale; + sum2 += m_last.data[2] * scale; +} + + +//------------------------------------------------- +// clock_and_add - helper to clock a new value +// and then add it to the sums, applying the +// given scale +//------------------------------------------------- + +template +void ssg_resampler::clock_and_add(int32_t &sum0, int32_t &sum1, int32_t &sum2, int32_t scale) +{ + m_ssg.clock(); + m_ssg.output(m_last); + add_last(sum0, sum1, sum2, scale); +} + + +//------------------------------------------------- +// write_to_output - helper to write the sums to +// the appropriate outputs, applying the given +// divisor to the final result +//------------------------------------------------- + +template +void ssg_resampler::write_to_output(OutputType *output, int32_t sum0, int32_t sum1, int32_t sum2, int32_t divisor) +{ + if (MixTo1) + { + // mixing to one, apply a 2/3 factor to prevent overflow + output->data[FirstOutput] = (sum0 + sum1 + sum2) * 2 / (3 * divisor); + } + else + { + // write three outputs in a row + output->data[FirstOutput + 0] = sum0 / divisor; + output->data[FirstOutput + 1] = sum1 / divisor; + output->data[FirstOutput + 2] = sum2 / divisor; + } + + // track the sample index here + m_sampindex++; +} + + +//------------------------------------------------- +// ssg_resampler - constructor +//------------------------------------------------- + +template +ssg_resampler::ssg_resampler(ssg_engine &ssg) : + m_ssg(ssg), + m_sampindex(0), + m_resampler(&ssg_resampler::resample_nop) +{ + m_last.clear(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +template +void ssg_resampler::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_sampindex); + state.save_restore(m_last.data); +} + + +//------------------------------------------------- +// configure - configure a new ratio +//------------------------------------------------- + +template +void ssg_resampler::configure(uint8_t outsamples, uint8_t srcsamples) +{ + switch (outsamples * 10 + srcsamples) + { + case 4*10 + 1: /* 4:1 */ m_resampler = &ssg_resampler::resample_n_1<4>; break; + case 2*10 + 1: /* 2:1 */ m_resampler = &ssg_resampler::resample_n_1<2>; break; + case 4*10 + 3: /* 4:3 */ m_resampler = &ssg_resampler::resample_4_3; break; + case 1*10 + 1: /* 1:1 */ m_resampler = &ssg_resampler::resample_n_1<1>; break; + case 2*10 + 3: /* 2:3 */ m_resampler = &ssg_resampler::resample_2_3; break; + case 1*10 + 3: /* 1:3 */ m_resampler = &ssg_resampler::resample_1_n<3>; break; + case 2*10 + 9: /* 2:9 */ m_resampler = &ssg_resampler::resample_2_9; break; + case 1*10 + 6: /* 1:6 */ m_resampler = &ssg_resampler::resample_1_n<6>; break; + case 0*10 + 0: /* 0:0 */ m_resampler = &ssg_resampler::resample_nop; break; + default: assert(false); break; + } +} + + +//------------------------------------------------- +// resample_n_1 - resample SSG output to the +// target at a rate of 1 SSG sample to every +// n output sample +//------------------------------------------------- + +template +template +void ssg_resampler::resample_n_1(OutputType *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + if (m_sampindex % Multiplier == 0) + { + m_ssg.clock(); + m_ssg.output(m_last); + } + write_to_output(output, m_last.data[0], m_last.data[1], m_last.data[2]); + } +} + + +//------------------------------------------------- +// resample_1_n - resample SSG output to the +// target at a rate of n SSG samples to every +// 1 output sample +//------------------------------------------------- + +template +template +void ssg_resampler::resample_1_n(OutputType *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + int32_t sum0 = 0, sum1 = 0, sum2 = 0; + for (int rep = 0; rep < Divisor; rep++) + clock_and_add(sum0, sum1, sum2); + write_to_output(output, sum0, sum1, sum2, Divisor); + } +} + + +//------------------------------------------------- +// resample_2_9 - resample SSG output to the +// target at a rate of 9 SSG samples to every +// 2 output samples +//------------------------------------------------- + +template +void ssg_resampler::resample_2_9(OutputType *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + int32_t sum0 = 0, sum1 = 0, sum2 = 0; + if (bitfield(m_sampindex, 0) != 0) + add_last(sum0, sum1, sum2, 1); + clock_and_add(sum0, sum1, sum2, 2); + clock_and_add(sum0, sum1, sum2, 2); + clock_and_add(sum0, sum1, sum2, 2); + clock_and_add(sum0, sum1, sum2, 2); + if (bitfield(m_sampindex, 0) == 0) + clock_and_add(sum0, sum1, sum2, 1); + write_to_output(output, sum0, sum1, sum2, 9); + } +} + + +//------------------------------------------------- +// resample_2_3 - resample SSG output to the +// target at a rate of 3 SSG samples to every +// 2 output samples +//------------------------------------------------- + +template +void ssg_resampler::resample_2_3(OutputType *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + int32_t sum0 = 0, sum1 = 0, sum2 = 0; + if (bitfield(m_sampindex, 0) == 0) + { + clock_and_add(sum0, sum1, sum2, 2); + clock_and_add(sum0, sum1, sum2, 1); + } + else + { + add_last(sum0, sum1, sum2, 1); + clock_and_add(sum0, sum1, sum2, 2); + } + write_to_output(output, sum0, sum1, sum2, 3); + } +} + + +//------------------------------------------------- +// resample_4_3 - resample SSG output to the +// target at a rate of 3 SSG samples to every +// 4 output samples +//------------------------------------------------- + +template +void ssg_resampler::resample_4_3(OutputType *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + int32_t sum0 = 0, sum1 = 0, sum2 = 0; + int32_t step = bitfield(m_sampindex, 0, 2); + add_last(sum0, sum1, sum2, step); + if (step != 3) + clock_and_add(sum0, sum1, sum2, 3 - step); + write_to_output(output, sum0, sum1, sum2, 3); + } +} + + +//------------------------------------------------- +// resample_nop - no-op resampler +//------------------------------------------------- + +template +void ssg_resampler::resample_nop(OutputType *output, uint32_t numsamples) +{ + // nothing to do except increment the sample index + m_sampindex += numsamples; +} + + + +//********************************************************* +// YM2203 +//********************************************************* + +//------------------------------------------------- +// ym2203 - constructor +//------------------------------------------------- + +ym2203::ym2203(ymfm_interface &intf) : + m_fidelity(OPN_FIDELITY_MAX), + m_address(0), + m_fm(intf), + m_ssg(intf), + m_ssg_resampler(m_ssg) +{ + m_last_fm.clear(); + update_prescale(m_fm.clock_prescale()); +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void ym2203::reset() +{ + // reset the engines + m_fm.reset(); + m_ssg.reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ym2203::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_address); + state.save_restore(m_last_fm.data); + + m_fm.save_restore(state); + m_ssg.save_restore(state); + m_ssg_resampler.save_restore(state); + + update_prescale(m_fm.clock_prescale()); +} + + +//------------------------------------------------- +// read_status - read the status register +//------------------------------------------------- + +uint8_t ym2203::read_status() +{ + uint8_t result = m_fm.status(); + if (m_fm.intf().ymfm_is_busy()) + result |= fm_engine::STATUS_BUSY; + return result; +} + + +//------------------------------------------------- +// read_data - read the data register +//------------------------------------------------- + +uint8_t ym2203::read_data() +{ + uint8_t result = 0; + if (m_address < 0x10) + { + // 00-0F: Read from SSG + result = m_ssg.read(m_address & 0x0f); + } + return result; +} + + +//------------------------------------------------- +// read - handle a read from the device +//------------------------------------------------- + +uint8_t ym2203::read(uint32_t offset) +{ + uint8_t result = 0xff; + switch (offset & 1) + { + case 0: // status port + result = read_status(); + break; + + case 1: // data port (only SSG) + result = read_data(); + break; + } + return result; +} + + +//------------------------------------------------- +// write_address - handle a write to the address +// register +//------------------------------------------------- + +void ym2203::write_address(uint8_t data) +{ + // just set the address + m_address = data; + + // special case: update the prescale + if (m_address >= 0x2d && m_address <= 0x2f) + { + // 2D-2F: prescaler select + if (m_address == 0x2d) + update_prescale(6); + else if (m_address == 0x2e && m_fm.clock_prescale() == 6) + update_prescale(3); + else if (m_address == 0x2f) + update_prescale(2); + } +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym2203::write_data(uint8_t data) +{ + if (m_address < 0x10) + { + // 00-0F: write to SSG + m_ssg.write(m_address & 0x0f, data); + } + else + { + // 10-FF: write to FM + m_fm.write(m_address, data); + } + + // mark busy for a bit + m_fm.intf().ymfm_set_busy_end(32 * m_fm.clock_prescale()); +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym2203::write(uint32_t offset, uint8_t data) +{ + switch (offset & 1) + { + case 0: // address port + write_address(data); + break; + + case 1: // data port + write_data(data); + break; + } +} + + +//------------------------------------------------- +// generate - generate one sample of sound +//------------------------------------------------- + +void ym2203::generate(output_data *output, uint32_t numsamples) +{ + // FM output is just repeated the prescale number of times; note that + // 0 is a special 1.5 case + if (m_fm_samples_per_output != 0) + { + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + if ((m_ssg_resampler.sampindex() + samp) % m_fm_samples_per_output == 0) + clock_fm(); + output->data[0] = m_last_fm.data[0]; + } + } + else + { + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + uint32_t step = (m_ssg_resampler.sampindex() + samp) % 3; + if (step == 0) + clock_fm(); + output->data[0] = m_last_fm.data[0]; + if (step == 1) + { + clock_fm(); + output->data[0] = (output->data[0] + m_last_fm.data[0]) / 2; + } + } + } + + // resample the SSG as configured + m_ssg_resampler.resample(output - numsamples, numsamples); +} + + +//------------------------------------------------- +// update_prescale - update the prescale value, +// recomputing derived values +//------------------------------------------------- + +void ym2203::update_prescale(uint8_t prescale) +{ + // tell the FM engine + m_fm.set_clock_prescale(prescale); + m_ssg.prescale_changed(); + + // Fidelity: ---- minimum ---- ---- medium ----- ---- maximum----- + // rate = clock/24 rate = clock/12 rate = clock/4 + // Prescale FM rate SSG rate FM rate SSG rate FM rate SSG rate + // 6 3:1 2:3 6:1 4:3 18:1 4:1 + // 3 1.5:1 1:3 3:1 2:3 9:1 2:1 + // 2 1:1 1:6 2:1 1:3 6:1 1:1 + + // compute the number of FM samples per output sample, and select the + // resampler function + if (m_fidelity == OPN_FIDELITY_MIN) + { + switch (prescale) + { + default: + case 6: m_fm_samples_per_output = 3; m_ssg_resampler.configure(2, 3); break; + case 3: m_fm_samples_per_output = 0; m_ssg_resampler.configure(1, 3); break; + case 2: m_fm_samples_per_output = 1; m_ssg_resampler.configure(1, 6); break; + } + } + else if (m_fidelity == OPN_FIDELITY_MED) + { + switch (prescale) + { + default: + case 6: m_fm_samples_per_output = 6; m_ssg_resampler.configure(4, 3); break; + case 3: m_fm_samples_per_output = 3; m_ssg_resampler.configure(2, 3); break; + case 2: m_fm_samples_per_output = 2; m_ssg_resampler.configure(1, 3); break; + } + } + else + { + switch (prescale) + { + default: + case 6: m_fm_samples_per_output = 18; m_ssg_resampler.configure(4, 1); break; + case 3: m_fm_samples_per_output = 9; m_ssg_resampler.configure(2, 1); break; + case 2: m_fm_samples_per_output = 6; m_ssg_resampler.configure(1, 1); break; + } + } + + // if overriding the SSG, override the configuration with the nop + // resampler to at least keep the sample index moving forward + if (m_ssg.overridden()) + m_ssg_resampler.configure(0, 0); +} + + +//------------------------------------------------- +// clock_fm - clock FM state +//------------------------------------------------- + +void ym2203::clock_fm() +{ + // clock the system + m_fm.clock(fm_engine::ALL_CHANNELS); + + // update the FM content; OPN is full 14-bit with no intermediate clipping + m_fm.output(m_last_fm.clear(), 0, 32767, fm_engine::ALL_CHANNELS); + + // convert to 10.3 floating point value for the DAC and back + m_last_fm.roundtrip_fp(); +} + + + +//********************************************************* +// YM2608 +//********************************************************* + +//------------------------------------------------- +// ym2608 - constructor +//------------------------------------------------- + +ym2608::ym2608(ymfm_interface &intf) : + m_fidelity(OPN_FIDELITY_MAX), + m_address(0), + m_irq_enable(0x1f), + m_flag_control(0x1c), + m_fm(intf), + m_ssg(intf), + m_ssg_resampler(m_ssg), + m_adpcm_a(intf, 0), + m_adpcm_b(intf) +{ + m_last_fm.clear(); + update_prescale(m_fm.clock_prescale()); +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void ym2608::reset() +{ + // reset the engines + m_fm.reset(); + m_ssg.reset(); + m_adpcm_a.reset(); + m_adpcm_b.reset(); + + // configure ADPCM percussion sounds; these are present in an embedded ROM + m_adpcm_a.set_start_end(0, 0x0000, 0x01bf); // bass drum + m_adpcm_a.set_start_end(1, 0x01c0, 0x043f); // snare drum + m_adpcm_a.set_start_end(2, 0x0440, 0x1b7f); // top cymbal + m_adpcm_a.set_start_end(3, 0x1b80, 0x1cff); // high hat + m_adpcm_a.set_start_end(4, 0x1d00, 0x1f7f); // tom tom + m_adpcm_a.set_start_end(5, 0x1f80, 0x1fff); // rim shot + + // initialize our special interrupt states, then read the upper status + // register, which updates the IRQs + m_irq_enable = 0x1f; + m_flag_control = 0x1c; + read_status_hi(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ym2608::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_address); + state.save_restore(m_irq_enable); + state.save_restore(m_flag_control); + state.save_restore(m_last_fm.data); + + m_fm.save_restore(state); + m_ssg.save_restore(state); + m_ssg_resampler.save_restore(state); + m_adpcm_a.save_restore(state); + m_adpcm_b.save_restore(state); +} + + +//------------------------------------------------- +// read_status - read the status register +//------------------------------------------------- + +uint8_t ym2608::read_status() +{ + uint8_t result = m_fm.status() & (fm_engine::STATUS_TIMERA | fm_engine::STATUS_TIMERB); + if (m_fm.intf().ymfm_is_busy()) + result |= fm_engine::STATUS_BUSY; + return result; +} + + +//------------------------------------------------- +// read_data - read the data register +//------------------------------------------------- + +uint8_t ym2608::read_data() +{ + uint8_t result = 0; + if (m_address < 0x10) + { + // 00-0F: Read from SSG + result = m_ssg.read(m_address & 0x0f); + } + else if (m_address == 0xff) + { + // FF: ID code + result = 1; + } + return result; +} + + +//------------------------------------------------- +// read_status_hi - read the extended status +// register +//------------------------------------------------- + +uint8_t ym2608::read_status_hi() +{ + // fetch regular status + uint8_t status = m_fm.status() & ~(STATUS_ADPCM_B_EOS | STATUS_ADPCM_B_BRDY | STATUS_ADPCM_B_PLAYING); + + // fetch ADPCM-B status, and merge in the bits + uint8_t adpcm_status = m_adpcm_b.status(); + if ((adpcm_status & adpcm_b_channel::STATUS_EOS) != 0) + status |= STATUS_ADPCM_B_EOS; + if ((adpcm_status & adpcm_b_channel::STATUS_BRDY) != 0) + status |= STATUS_ADPCM_B_BRDY; + if ((adpcm_status & adpcm_b_channel::STATUS_PLAYING) != 0) + status |= STATUS_ADPCM_B_PLAYING; + + // turn off any bits that have been requested to be masked + status &= ~(m_flag_control & 0x1f); + + // update the status so that IRQs are propagated + m_fm.set_reset_status(status, ~status); + + // merge in the busy flag + if (m_fm.intf().ymfm_is_busy()) + status |= fm_engine::STATUS_BUSY; + return status; +} + + +//------------------------------------------------- +// read_data_hi - read the upper data register +//------------------------------------------------- + +uint8_t ym2608::read_data_hi() +{ + uint8_t result = 0; + if ((m_address & 0xff) < 0x10) + { + // 00-0F: Read from ADPCM-B + result = m_adpcm_b.read(m_address & 0x0f); + } + return result; +} + + +//------------------------------------------------- +// read - handle a read from the device +//------------------------------------------------- + +uint8_t ym2608::read(uint32_t offset) +{ + uint8_t result = 0; + switch (offset & 3) + { + case 0: // status port, YM2203 compatible + result = read_status(); + break; + + case 1: // data port (only SSG) + result = read_data(); + break; + + case 2: // status port, extended + result = read_status_hi(); + break; + + case 3: // ADPCM-B data + result = read_data_hi(); + break; + } + return result; +} + + +//------------------------------------------------- +// write_address - handle a write to the address +// register +//------------------------------------------------- + +void ym2608::write_address(uint8_t data) +{ + // just set the address + m_address = data; + + // special case: update the prescale + if (m_address >= 0x2d && m_address <= 0x2f) + { + // 2D-2F: prescaler select + if (m_address == 0x2d) + update_prescale(6); + else if (m_address == 0x2e && m_fm.clock_prescale() == 6) + update_prescale(3); + else if (m_address == 0x2f) + update_prescale(2); + } +} + + +//------------------------------------------------- +// write - handle a write to the data register +//------------------------------------------------- + +void ym2608::write_data(uint8_t data) +{ + // ignore if paired with upper address + if (bitfield(m_address, 8)) + return; + + if (m_address < 0x10) + { + // 00-0F: write to SSG + m_ssg.write(m_address & 0x0f, data); + } + else if (m_address < 0x20) + { + // 10-1F: write to ADPCM-A + m_adpcm_a.write(m_address & 0x0f, data); + } + else if (m_address == 0x29) + { + // 29: special IRQ mask register + m_irq_enable = data; + m_fm.set_irq_mask(m_irq_enable & ~m_flag_control & 0x1f); + } + else + { + // 20-28, 2A-FF: write to FM + m_fm.write(m_address, data); + } + + // mark busy for a bit + m_fm.intf().ymfm_set_busy_end(32 * m_fm.clock_prescale()); +} + + +//------------------------------------------------- +// write_address_hi - handle a write to the upper +// address register +//------------------------------------------------- + +void ym2608::write_address_hi(uint8_t data) +{ + // just set the address + m_address = 0x100 | data; +} + + +//------------------------------------------------- +// write_data_hi - handle a write to the upper +// data register +//------------------------------------------------- + +void ym2608::write_data_hi(uint8_t data) +{ + // ignore if paired with upper address + if (!bitfield(m_address, 8)) + return; + + if (m_address < 0x110) + { + // 100-10F: write to ADPCM-B + m_adpcm_b.write(m_address & 0x0f, data); + } + else if (m_address == 0x110) + { + // 110: IRQ flag control + if (bitfield(data, 7)) + m_fm.set_reset_status(0, 0xff); + else + { + m_flag_control = data; + m_fm.set_irq_mask(m_irq_enable & ~m_flag_control & 0x1f); + } + } + else + { + // 111-1FF: write to FM + m_fm.write(m_address, data); + } + + // mark busy for a bit + m_fm.intf().ymfm_set_busy_end(32 * m_fm.clock_prescale()); +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym2608::write(uint32_t offset, uint8_t data) +{ + switch (offset & 3) + { + case 0: // address port + write_address(data); + break; + + case 1: // data port + write_data(data); + break; + + case 2: // upper address port + write_address_hi(data); + break; + + case 3: // upper data port + write_data_hi(data); + break; + } +} + + +//------------------------------------------------- +// generate - generate one sample of sound +//------------------------------------------------- + +void ym2608::generate(output_data *output, uint32_t numsamples) +{ + // FM output is just repeated the prescale number of times; note that + // 0 is a special 1.5 case + if (m_fm_samples_per_output != 0) + { + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + if ((m_ssg_resampler.sampindex() + samp) % m_fm_samples_per_output == 0) + clock_fm_and_adpcm(); + output->data[0] = m_last_fm.data[0]; + output->data[1] = m_last_fm.data[1]; + } + } + else + { + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + uint32_t step = (m_ssg_resampler.sampindex() + samp) % 3; + if (step == 0) + clock_fm_and_adpcm(); + output->data[0] = m_last_fm.data[0]; + output->data[1] = m_last_fm.data[1]; + if (step == 1) + { + clock_fm_and_adpcm(); + output->data[0] = (output->data[0] + m_last_fm.data[0]) / 2; + output->data[1] = (output->data[1] + m_last_fm.data[1]) / 2; + } + } + } + + // resample the SSG as configured + m_ssg_resampler.resample(output - numsamples, numsamples); +} + + +//------------------------------------------------- +// update_prescale - update the prescale value, +// recomputing derived values +//------------------------------------------------- + +void ym2608::update_prescale(uint8_t prescale) +{ + // tell the FM engine + m_fm.set_clock_prescale(prescale); + m_ssg.prescale_changed(); + + // Fidelity: ---- minimum ---- ---- medium ----- ---- maximum----- + // rate = clock/48 rate = clock/24 rate = clock/8 + // Prescale FM rate SSG rate FM rate SSG rate FM rate SSG rate + // 6 3:1 2:3 6:1 4:3 18:1 4:1 + // 3 1.5:1 1:3 3:1 2:3 9:1 2:1 + // 2 1:1 1:6 2:1 1:3 6:1 1:1 + + // compute the number of FM samples per output sample, and select the + // resampler function + if (m_fidelity == OPN_FIDELITY_MIN) + { + switch (prescale) + { + default: + case 6: m_fm_samples_per_output = 3; m_ssg_resampler.configure(2, 3); break; + case 3: m_fm_samples_per_output = 0; m_ssg_resampler.configure(1, 3); break; + case 2: m_fm_samples_per_output = 1; m_ssg_resampler.configure(1, 6); break; + } + } + else if (m_fidelity == OPN_FIDELITY_MED) + { + switch (prescale) + { + default: + case 6: m_fm_samples_per_output = 6; m_ssg_resampler.configure(4, 3); break; + case 3: m_fm_samples_per_output = 3; m_ssg_resampler.configure(2, 3); break; + case 2: m_fm_samples_per_output = 2; m_ssg_resampler.configure(1, 3); break; + } + } + else + { + switch (prescale) + { + default: + case 6: m_fm_samples_per_output = 18; m_ssg_resampler.configure(4, 1); break; + case 3: m_fm_samples_per_output = 9; m_ssg_resampler.configure(2, 1); break; + case 2: m_fm_samples_per_output = 6; m_ssg_resampler.configure(1, 1); break; + } + } + + // if overriding the SSG, override the configuration with the nop + // resampler to at least keep the sample index moving forward + if (m_ssg.overridden()) + m_ssg_resampler.configure(0, 0); +} + + +//------------------------------------------------- +// clock_fm_and_adpcm - clock FM and ADPCM state +//------------------------------------------------- + +void ym2608::clock_fm_and_adpcm() +{ + // top bit of the IRQ enable flags controls 3-channel vs 6-channel mode + uint32_t fmmask = bitfield(m_irq_enable, 7) ? 0x3f : 0x07; + + // clock the system + uint32_t env_counter = m_fm.clock(fm_engine::ALL_CHANNELS); + + // clock the ADPCM-A engine on every envelope cycle + // (channels 4 and 5 clock every 2 envelope clocks) + if (bitfield(env_counter, 0, 2) == 0) + m_adpcm_a.clock(bitfield(env_counter, 2) ? 0x0f : 0x3f); + + // clock the ADPCM-B engine every cycle + m_adpcm_b.clock(); + + // update the FM content; OPNA is 13-bit with no intermediate clipping + m_fm.output(m_last_fm.clear(), 1, 32767, fmmask); + + // mix in the ADPCM and clamp + m_adpcm_a.output(m_last_fm, 0x3f); + m_adpcm_b.output(m_last_fm, 1); + m_last_fm.clamp16(); +} + + +//********************************************************* +// YMF288 +//********************************************************* + +// YMF288 is a YM2608 with the following changes: +// * ADPCM-B part removed +// * prescaler removed (fixed at 6) +// * CSM removed +// * Low power mode added +// * SSG tone frequency is altered in some way? (explicitly DC for Tp 0-7, also double volume in some cases) +// * I/O ports removed +// * Shorter busy times +// * All registers can be read + +//------------------------------------------------- +// ymf288 - constructor +//------------------------------------------------- + +ymf288::ymf288(ymfm_interface &intf) : + m_fidelity(OPN_FIDELITY_MAX), + m_address(0), + m_irq_enable(0x03), + m_flag_control(0x03), + m_fm(intf), + m_ssg(intf), + m_ssg_resampler(m_ssg), + m_adpcm_a(intf, 0) +{ + m_last_fm.clear(); + update_prescale(); +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void ymf288::reset() +{ + // reset the engines + m_fm.reset(); + m_ssg.reset(); + m_adpcm_a.reset(); + + // configure ADPCM percussion sounds; these are present in an embedded ROM + m_adpcm_a.set_start_end(0, 0x0000, 0x01bf); // bass drum + m_adpcm_a.set_start_end(1, 0x01c0, 0x043f); // snare drum + m_adpcm_a.set_start_end(2, 0x0440, 0x1b7f); // top cymbal + m_adpcm_a.set_start_end(3, 0x1b80, 0x1cff); // high hat + m_adpcm_a.set_start_end(4, 0x1d00, 0x1f7f); // tom tom + m_adpcm_a.set_start_end(5, 0x1f80, 0x1fff); // rim shot + + // initialize our special interrupt states, then read the upper status + // register, which updates the IRQs + m_irq_enable = 0x03; + m_flag_control = 0x00; + read_status_hi(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ymf288::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_address); + state.save_restore(m_irq_enable); + state.save_restore(m_flag_control); + state.save_restore(m_last_fm.data); + + m_fm.save_restore(state); + m_ssg.save_restore(state); + m_ssg_resampler.save_restore(state); + m_adpcm_a.save_restore(state); +} + + +//------------------------------------------------- +// read_status - read the status register +//------------------------------------------------- + +uint8_t ymf288::read_status() +{ + uint8_t result = m_fm.status() & (fm_engine::STATUS_TIMERA | fm_engine::STATUS_TIMERB); + if (m_fm.intf().ymfm_is_busy()) + result |= fm_engine::STATUS_BUSY; + return result; +} + + +//------------------------------------------------- +// read_data - read the data register +//------------------------------------------------- + +uint8_t ymf288::read_data() +{ + uint8_t result = 0; + if (m_address < 0x0e) + { + // 00-0D: Read from SSG + result = m_ssg.read(m_address & 0x0f); + } + else if (m_address < 0x10) + { + // 0E-0F: I/O ports not supported + result = 0xff; + } + else if (m_address == 0xff) + { + // FF: ID code + result = 2; + } + else if (ymf288_mode()) + { + // registers are readable in YMF288 mode + result = m_fm.regs().read(m_address); + } + return result; +} + + +//------------------------------------------------- +// read_status_hi - read the extended status +// register +//------------------------------------------------- + +uint8_t ymf288::read_status_hi() +{ + // fetch regular status + uint8_t status = m_fm.status() & (fm_engine::STATUS_TIMERA | fm_engine::STATUS_TIMERB); + + // turn off any bits that have been requested to be masked + status &= ~(m_flag_control & 0x03); + + // update the status so that IRQs are propagated + m_fm.set_reset_status(status, ~status); + + // merge in the busy flag + if (m_fm.intf().ymfm_is_busy()) + status |= fm_engine::STATUS_BUSY; + return status; +} + + +//------------------------------------------------- +// read - handle a read from the device +//------------------------------------------------- + +uint8_t ymf288::read(uint32_t offset) +{ + uint8_t result = 0; + switch (offset & 3) + { + case 0: // status port, YM2203 compatible + result = read_status(); + break; + + case 1: // data port + result = read_data(); + break; + + case 2: // status port, extended + result = read_status_hi(); + break; + + case 3: // unmapped + debug::log_unexpected_read_write("Unexpected read from YMF288 offset %d\n", offset & 3); + break; + } + return result; +} + + +//------------------------------------------------- +// write_address - handle a write to the address +// register +//------------------------------------------------- + +void ymf288::write_address(uint8_t data) +{ + // just set the address + m_address = data; + + // in YMF288 mode, busy is signaled after address writes too + if (ymf288_mode()) + m_fm.intf().ymfm_set_busy_end(16); +} + + +//------------------------------------------------- +// write - handle a write to the data register +//------------------------------------------------- + +void ymf288::write_data(uint8_t data) +{ + // ignore if paired with upper address + if (bitfield(m_address, 8)) + return; + + // wait times are shorter in YMF288 mode + int busy_cycles = ymf288_mode() ? 16 : 32 * m_fm.clock_prescale(); + if (m_address < 0x0e) + { + // 00-0D: write to SSG + m_ssg.write(m_address & 0x0f, data); + } + else if (m_address < 0x10) + { + // 0E-0F: I/O ports not supported + } + else if (m_address < 0x20) + { + // 10-1F: write to ADPCM-A + m_adpcm_a.write(m_address & 0x0f, data); + busy_cycles = 32 * m_fm.clock_prescale(); + } + else if (m_address == 0x27) + { + // 27: mode register; CSM isn't supported so disable it + data &= 0x7f; + m_fm.write(m_address, data); + } + else if (m_address == 0x29) + { + // 29: special IRQ mask register + m_irq_enable = data; + m_fm.set_irq_mask(m_irq_enable & ~m_flag_control & 0x03); + } + else + { + // 20-27, 2A-FF: write to FM + m_fm.write(m_address, data); + } + + // mark busy for a bit + m_fm.intf().ymfm_set_busy_end(busy_cycles); +} + + +//------------------------------------------------- +// write_address_hi - handle a write to the upper +// address register +//------------------------------------------------- + +void ymf288::write_address_hi(uint8_t data) +{ + // just set the address + m_address = 0x100 | data; + + // in YMF288 mode, busy is signaled after address writes too + if (ymf288_mode()) + m_fm.intf().ymfm_set_busy_end(16); +} + + +//------------------------------------------------- +// write_data_hi - handle a write to the upper +// data register +//------------------------------------------------- + +void ymf288::write_data_hi(uint8_t data) +{ + // ignore if paired with upper address + if (!bitfield(m_address, 8)) + return; + + // wait times are shorter in YMF288 mode + int busy_cycles = ymf288_mode() ? 16 : 32 * m_fm.clock_prescale(); + if (m_address == 0x110) + { + // 110: IRQ flag control + if (bitfield(data, 7)) + m_fm.set_reset_status(0, 0xff); + else + { + m_flag_control = data; + m_fm.set_irq_mask(m_irq_enable & ~m_flag_control & 0x03); + } + } + else + { + // 100-10F,111-1FF: write to FM + m_fm.write(m_address, data); + } + + // mark busy for a bit + m_fm.intf().ymfm_set_busy_end(busy_cycles); +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ymf288::write(uint32_t offset, uint8_t data) +{ + switch (offset & 3) + { + case 0: // address port + write_address(data); + break; + + case 1: // data port + write_data(data); + break; + + case 2: // upper address port + write_address_hi(data); + break; + + case 3: // upper data port + write_data_hi(data); + break; + } +} + + +//------------------------------------------------- +// generate - generate one sample of sound +//------------------------------------------------- + +void ymf288::generate(output_data *output, uint32_t numsamples) +{ + // FM output is just repeated the prescale number of times; note that + // 0 is a special 1.5 case + if (m_fm_samples_per_output != 0) + { + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + if ((m_ssg_resampler.sampindex() + samp) % m_fm_samples_per_output == 0) + clock_fm_and_adpcm(); + output->data[0] = m_last_fm.data[0]; + output->data[1] = m_last_fm.data[1]; + } + } + else + { + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + uint32_t step = (m_ssg_resampler.sampindex() + samp) % 3; + if (step == 0) + clock_fm_and_adpcm(); + output->data[0] = m_last_fm.data[0]; + output->data[1] = m_last_fm.data[1]; + if (step == 1) + { + clock_fm_and_adpcm(); + output->data[0] = (output->data[0] + m_last_fm.data[0]) / 2; + output->data[1] = (output->data[1] + m_last_fm.data[1]) / 2; + } + } + } + + // resample the SSG as configured + m_ssg_resampler.resample(output - numsamples, numsamples); +} + + +//------------------------------------------------- +// update_prescale - update the prescale value, +// recomputing derived values +//------------------------------------------------- + +void ymf288::update_prescale() +{ + // Fidelity: ---- minimum ---- ---- medium ----- ---- maximum----- + // rate = clock/144 rate = clock/144 rate = clock/16 + // Prescale FM rate SSG rate FM rate SSG rate FM rate SSG rate + // 6 1:1 2:9 1:1 2:9 9:1 2:1 + + // compute the number of FM samples per output sample, and select the + // resampler function + if (m_fidelity == OPN_FIDELITY_MIN || m_fidelity == OPN_FIDELITY_MED) + { + m_fm_samples_per_output = 1; + m_ssg_resampler.configure(2, 9); + } + else + { + m_fm_samples_per_output = 9; + m_ssg_resampler.configure(2, 1); + } + + // if overriding the SSG, override the configuration with the nop + // resampler to at least keep the sample index moving forward + if (m_ssg.overridden()) + m_ssg_resampler.configure(0, 0); +} + + +//------------------------------------------------- +// clock_fm_and_adpcm - clock FM and ADPCM state +//------------------------------------------------- + +void ymf288::clock_fm_and_adpcm() +{ + // top bit of the IRQ enable flags controls 3-channel vs 6-channel mode + uint32_t fmmask = bitfield(m_irq_enable, 7) ? 0x3f : 0x07; + + // clock the system + uint32_t env_counter = m_fm.clock(fm_engine::ALL_CHANNELS); + + // clock the ADPCM-A engine on every envelope cycle + // (channels 4 and 5 clock every 2 envelope clocks) + if (bitfield(env_counter, 0, 2) == 0) + m_adpcm_a.clock(bitfield(env_counter, 2) ? 0x0f : 0x3f); + + // update the FM content; OPNA is 13-bit with no intermediate clipping + m_fm.output(m_last_fm.clear(), 1, 32767, fmmask); + + // mix in the ADPCM + m_adpcm_a.output(m_last_fm, 0x3f); +} + + + +//********************************************************* +// YM2610 +//********************************************************* + +//------------------------------------------------- +// ym2610 - constructor +//------------------------------------------------- + +ym2610::ym2610(ymfm_interface &intf, uint8_t channel_mask) : + m_fidelity(OPN_FIDELITY_MAX), + m_address(0), + m_fm_mask(channel_mask), + m_eos_status(0x00), + m_flag_mask(EOS_FLAGS_MASK), + m_fm(intf), + m_ssg(intf), + m_ssg_resampler(m_ssg), + m_adpcm_a(intf, 8), + m_adpcm_b(intf, 8) +{ + update_prescale(); +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void ym2610::reset() +{ + // reset the engines + m_fm.reset(); + m_ssg.reset(); + m_adpcm_a.reset(); + m_adpcm_b.reset(); + + // initialize our special interrupt states + m_eos_status = 0x00; + m_flag_mask = EOS_FLAGS_MASK; +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ym2610::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_address); + state.save_restore(m_eos_status); + state.save_restore(m_flag_mask); + + m_fm.save_restore(state); + m_ssg.save_restore(state); + m_ssg_resampler.save_restore(state); + m_adpcm_a.save_restore(state); + m_adpcm_b.save_restore(state); +} + + +//------------------------------------------------- +// read_status - read the status register +//------------------------------------------------- + +uint8_t ym2610::read_status() +{ + uint8_t result = m_fm.status() & (fm_engine::STATUS_TIMERA | fm_engine::STATUS_TIMERB); + if (m_fm.intf().ymfm_is_busy()) + result |= fm_engine::STATUS_BUSY; + return result; +} + + +//------------------------------------------------- +// read_data - read the data register +//------------------------------------------------- + +uint8_t ym2610::read_data() +{ + uint8_t result = 0; + if (m_address < 0x0e) + { + // 00-0D: Read from SSG + result = m_ssg.read(m_address & 0x0f); + } + else if (m_address < 0x10) + { + // 0E-0F: I/O ports not supported + result = 0xff; + } + else if (m_address == 0xff) + { + // FF: ID code + result = 1; + } + return result; +} + + +//------------------------------------------------- +// read_status_hi - read the extended status +// register +//------------------------------------------------- + +uint8_t ym2610::read_status_hi() +{ + return m_eos_status & m_flag_mask; +} + + +//------------------------------------------------- +// read_data_hi - read the upper data register +//------------------------------------------------- + +uint8_t ym2610::read_data_hi() +{ + uint8_t result = 0; + return result; +} + + +//------------------------------------------------- +// read - handle a read from the device +//------------------------------------------------- + +uint8_t ym2610::read(uint32_t offset) +{ + uint8_t result = 0; + switch (offset & 3) + { + case 0: // status port, YM2203 compatible + result = read_status(); + break; + + case 1: // data port (only SSG) + result = read_data(); + break; + + case 2: // status port, extended + result = read_status_hi(); + break; + + case 3: // ADPCM-B data + result = read_data_hi(); + break; + } + return result; +} + + +//------------------------------------------------- +// write_address - handle a write to the address +// register +//------------------------------------------------- + +void ym2610::write_address(uint8_t data) +{ + // just set the address + m_address = data; +} + + +//------------------------------------------------- +// write - handle a write to the data register +//------------------------------------------------- + +void ym2610::write_data(uint8_t data) +{ + // ignore if paired with upper address + if (bitfield(m_address, 8)) + return; + + if (m_address < 0x0e) + { + // 00-0D: write to SSG + m_ssg.write(m_address & 0x0f, data); + } + else if (m_address < 0x10) + { + // 0E-0F: I/O ports not supported + } + else if (m_address < 0x1c) + { + // 10-1B: write to ADPCM-B + // YM2610 effectively forces external mode on, and disables recording + if (m_address == 0x10) + data = (data | 0x20) & ~0x40; + m_adpcm_b.write(m_address & 0x0f, data); + } + else if (m_address == 0x1c) + { + // 1C: EOS flag reset + m_flag_mask = ~data & EOS_FLAGS_MASK; + m_eos_status &= ~(data & EOS_FLAGS_MASK); + } + else + { + // 1D-FF: write to FM + m_fm.write(m_address, data); + } + + // mark busy for a bit + m_fm.intf().ymfm_set_busy_end(32 * m_fm.clock_prescale()); +} + + +//------------------------------------------------- +// write_address_hi - handle a write to the upper +// address register +//------------------------------------------------- + +void ym2610::write_address_hi(uint8_t data) +{ + // just set the address + m_address = 0x100 | data; +} + + +//------------------------------------------------- +// write_data_hi - handle a write to the upper +// data register +//------------------------------------------------- + +void ym2610::write_data_hi(uint8_t data) +{ + // ignore if paired with upper address + if (!bitfield(m_address, 8)) + return; + + if (m_address < 0x130) + { + // 100-12F: write to ADPCM-A + m_adpcm_a.write(m_address & 0x3f, data); + } + else + { + // 130-1FF: write to FM + m_fm.write(m_address, data); + } + + // mark busy for a bit + m_fm.intf().ymfm_set_busy_end(32 * m_fm.clock_prescale()); +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym2610::write(uint32_t offset, uint8_t data) +{ + switch (offset & 3) + { + case 0: // address port + write_address(data); + break; + + case 1: // data port + write_data(data); + break; + + case 2: // upper address port + write_address_hi(data); + break; + + case 3: // upper data port + write_data_hi(data); + break; + } +} + + +//------------------------------------------------- +// generate - generate one sample of sound +//------------------------------------------------- + +void ym2610::generate(output_data *output, uint32_t numsamples) +{ + // FM output is just repeated the prescale number of times + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + if ((m_ssg_resampler.sampindex() + samp) % m_fm_samples_per_output == 0) + clock_fm_and_adpcm(); + output->data[0] = m_last_fm.data[0]; + output->data[1] = m_last_fm.data[1]; + } + + // resample the SSG as configured + m_ssg_resampler.resample(output - numsamples, numsamples); +} + + +//------------------------------------------------- +// update_prescale - update the prescale value, +// recomputing derived values +//------------------------------------------------- + +void ym2610::update_prescale() +{ + // Fidelity: ---- minimum ---- ---- medium ----- ---- maximum----- + // rate = clock/144 rate = clock/144 rate = clock/16 + // Prescale FM rate SSG rate FM rate SSG rate FM rate SSG rate + // 6 1:1 2:9 1:1 2:9 9:1 2:1 + + // compute the number of FM samples per output sample, and select the + // resampler function + if (m_fidelity == OPN_FIDELITY_MIN || m_fidelity == OPN_FIDELITY_MED) + { + m_fm_samples_per_output = 1; + m_ssg_resampler.configure(2, 9); + } + else + { + m_fm_samples_per_output = 9; + m_ssg_resampler.configure(2, 1); + } + + // if overriding the SSG, override the configuration with the nop + // resampler to at least keep the sample index moving forward + if (m_ssg.overridden()) + m_ssg_resampler.configure(0, 0); +} + + +//------------------------------------------------- +// clock_fm_and_adpcm - clock FM and ADPCM state +//------------------------------------------------- + +void ym2610::clock_fm_and_adpcm() +{ + // clock the system + uint32_t env_counter = m_fm.clock(m_fm_mask); + + // clock the ADPCM-A engine on every envelope cycle + if (bitfield(env_counter, 0, 2) == 0) + m_eos_status |= m_adpcm_a.clock(0x3f); + + // clock the ADPCM-B engine every cycle + m_adpcm_b.clock(); + + // we track the last ADPCM-B EOS value in bit 6 (which is hidden from callers); + // if it changed since the last sample, update the visible EOS state in bit 7 + uint8_t live_eos = ((m_adpcm_b.status() & adpcm_b_channel::STATUS_EOS) != 0) ? 0x40 : 0x00; + if (((live_eos ^ m_eos_status) & 0x40) != 0) + m_eos_status = (m_eos_status & ~0xc0) | live_eos | (live_eos << 1); + + // update the FM content; OPNB is 13-bit with no intermediate clipping + m_fm.output(m_last_fm.clear(), 1, 32767, m_fm_mask); + + // mix in the ADPCM and clamp + m_adpcm_a.output(m_last_fm, 0x3f); + m_adpcm_b.output(m_last_fm, 1); + m_last_fm.clamp16(); +} + + + +//********************************************************* +// YM2612 +//********************************************************* + +//------------------------------------------------- +// ym2612 - constructor +//------------------------------------------------- + +ym2612::ym2612(ymfm_interface &intf) : + m_address(0), + m_dac_data(0), + m_dac_enable(0), + m_fm(intf) +{ +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void ym2612::reset() +{ + // reset the engines + m_fm.reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ym2612::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_address); + state.save_restore(m_dac_data); + state.save_restore(m_dac_enable); + m_fm.save_restore(state); +} + + +//------------------------------------------------- +// read_status - read the status register +//------------------------------------------------- + +uint8_t ym2612::read_status() +{ + uint8_t result = m_fm.status(); + if (m_fm.intf().ymfm_is_busy()) + result |= fm_engine::STATUS_BUSY; + return result; +} + + +//------------------------------------------------- +// read - handle a read from the device +//------------------------------------------------- + +uint8_t ym2612::read(uint32_t offset) +{ + uint8_t result = 0; + switch (offset & 3) + { + case 0: // status port, YM2203 compatible + result = read_status(); + break; + + case 1: // data port (unused) + case 2: // status port, extended + case 3: // data port (unused) + debug::log_unexpected_read_write("Unexpected read from YM2612 offset %d\n", offset & 3); + break; + } + return result; +} + + +//------------------------------------------------- +// write_address - handle a write to the address +// register +//------------------------------------------------- + +void ym2612::write_address(uint8_t data) +{ + // just set the address + m_address = data; +} + + +//------------------------------------------------- +// write_data - handle a write to the data +// register +//------------------------------------------------- + +void ym2612::write_data(uint8_t data) +{ + // ignore if paired with upper address + if (bitfield(m_address, 8)) + return; + + if (m_address == 0x2a) + { + // 2A: DAC data (most significant 8 bits) + m_dac_data = (m_dac_data & ~0x1fe) | ((data ^ 0x80) << 1); + } + else if (m_address == 0x2b) + { + // 2B: DAC enable (bit 7) + m_dac_enable = bitfield(data, 7); + } + else if (m_address == 0x2c) + { + // 2C: test/low DAC bit + m_dac_data = (m_dac_data & ~1) | bitfield(data, 3); + } + else + { + // 00-29, 2D-FF: write to FM + m_fm.write(m_address, data); + } + + // mark busy for a bit + m_fm.intf().ymfm_set_busy_end(32 * m_fm.clock_prescale()); +} + + +//------------------------------------------------- +// write_address_hi - handle a write to the upper +// address register +//------------------------------------------------- + +void ym2612::write_address_hi(uint8_t data) +{ + // just set the address + m_address = 0x100 | data; +} + + +//------------------------------------------------- +// write_data_hi - handle a write to the upper +// data register +//------------------------------------------------- + +void ym2612::write_data_hi(uint8_t data) +{ + // ignore if paired with upper address + if (!bitfield(m_address, 8)) + return; + + // 100-1FF: write to FM + m_fm.write(m_address, data); + + // mark busy for a bit + m_fm.intf().ymfm_set_busy_end(32 * m_fm.clock_prescale()); +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym2612::write(uint32_t offset, uint8_t data) +{ + switch (offset & 3) + { + case 0: // address port + write_address(data); + break; + + case 1: // data port + write_data(data); + break; + + case 2: // upper address port + write_address_hi(data); + break; + + case 3: // upper data port + write_data_hi(data); + break; + } +} + + +//------------------------------------------------- +// generate - generate one sample of sound +//------------------------------------------------- + +void ym2612::generate(output_data *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + // clock the system + m_fm.clock(fm_engine::ALL_CHANNELS); + + // sum individual channels to apply DAC discontinuity on each + output->clear(); + output_data temp; + + // first do FM-only channels; OPN2 is 9-bit with intermediate clipping + int const last_fm_channel = m_dac_enable ? 5 : 6; + for (int chan = 0; chan < last_fm_channel; chan++) + { + m_fm.output(temp.clear(), 5, 256, 1 << chan); + output->data[0] += dac_discontinuity(temp.data[0]); + output->data[1] += dac_discontinuity(temp.data[1]); + } + + // add in DAC + if (m_dac_enable) + { + // DAC enabled: start with DAC value then add the first 5 channels only + int32_t dacval = dac_discontinuity(int16_t(m_dac_data << 7) >> 7); + output->data[0] += m_fm.regs().ch_output_0(0x102) ? dacval : dac_discontinuity(0); + output->data[1] += m_fm.regs().ch_output_1(0x102) ? dacval : dac_discontinuity(0); + } + + // output is technically multiplexed rather than mixed, but that requires + // a better sound mixer than we usually have, so just average over the six + // channels; also apply a 64/65 factor to account for the discontinuity + // adjustment above + output->data[0] = (output->data[0] * 128) * 64 / (6 * 65); + output->data[1] = (output->data[1] * 128) * 64 / (6 * 65); + } +} + + +//------------------------------------------------- +// generate - generate one sample of sound +//------------------------------------------------- + +void ym3438::generate(output_data *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + // clock the system + m_fm.clock(fm_engine::ALL_CHANNELS); + + // first do FM-only channels; OPN2C is 9-bit with intermediate clipping + if (!m_dac_enable) + { + // DAC disabled: all 6 channels sum together + m_fm.output(output->clear(), 5, 256, fm_engine::ALL_CHANNELS); + } + else + { + // DAC enabled: start with DAC value then add the first 5 channels only + int32_t dacval = int16_t(m_dac_data << 7) >> 7; + output->data[0] = m_fm.regs().ch_output_0(0x102) ? dacval : 0; + output->data[1] = m_fm.regs().ch_output_1(0x102) ? dacval : 0; + m_fm.output(*output, 5, 256, fm_engine::ALL_CHANNELS ^ (1 << 5)); + } + + // YM3438 doesn't have the same DAC discontinuity, though its output is + // multiplexed like the YM2612 + output->data[0] = (output->data[0] * 128) / 6; + output->data[1] = (output->data[1] * 128) / 6; + } +} + + +//------------------------------------------------- +// generate - generate one sample of sound +//------------------------------------------------- + +void ymf276::generate(output_data *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + // clock the system + m_fm.clock(fm_engine::ALL_CHANNELS); + + // first do FM-only channels; OPN2L is 14-bit with intermediate clipping + if (!m_dac_enable) + { + // DAC disabled: all 6 channels sum together + m_fm.output(output->clear(), 0, 8191, fm_engine::ALL_CHANNELS); + } + else + { + // DAC enabled: start with DAC value then add the first 5 channels only + int32_t dacval = int16_t(m_dac_data << 7) >> 7; + output->data[0] = m_fm.regs().ch_output_0(0x102) ? dacval : 0; + output->data[1] = m_fm.regs().ch_output_1(0x102) ? dacval : 0; + m_fm.output(*output, 0, 8191, fm_engine::ALL_CHANNELS ^ (1 << 5)); + } + + // YMF276 is properly mixed; it shifts down 1 bit before clamping + output->data[0] = clamp(output->data[0] >> 1, -32768, 32767); + output->data[1] = clamp(output->data[1] >> 1, -32768, 32767); + } +} + +} diff --git a/src/sound/ymfm/ymfm_opn.h b/src/sound/ymfm/ymfm_opn.h new file mode 100644 index 000000000..bab68ed93 --- /dev/null +++ b/src/sound/ymfm/ymfm_opn.h @@ -0,0 +1,802 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#ifndef YMFM_OPN_H +#define YMFM_OPN_H + +#pragma once + +#include "ymfm.h" +#include "ymfm_adpcm.h" +#include "ymfm_fm.h" +#include "ymfm_ssg.h" + +namespace ymfm +{ + +//********************************************************* +// REGISTER CLASSES +//********************************************************* + +// ======================> opn_registers_base + +// +// OPN register map: +// +// System-wide registers: +// 21 xxxxxxxx Test register +// 22 ----x--- LFO enable [OPNA+ only] +// -----xxx LFO rate [OPNA+ only] +// 24 xxxxxxxx Timer A value (upper 8 bits) +// 25 ------xx Timer A value (lower 2 bits) +// 26 xxxxxxxx Timer B value +// 27 xx------ CSM/Multi-frequency mode for channel #2 +// --x----- Reset timer B +// ---x---- Reset timer A +// ----x--- Enable timer B +// -----x-- Enable timer A +// ------x- Load timer B +// -------x Load timer A +// 28 x------- Key on/off operator 4 +// -x------ Key on/off operator 3 +// --x----- Key on/off operator 2 +// ---x---- Key on/off operator 1 +// ------xx Channel select +// +// Per-channel registers (channel in address bits 0-1) +// Note that all these apply to address+100 as well on OPNA+ +// A0-A3 xxxxxxxx Frequency number lower 8 bits +// A4-A7 --xxx--- Block (0-7) +// -----xxx Frequency number upper 3 bits +// B0-B3 --xxx--- Feedback level for operator 1 (0-7) +// -----xxx Operator connection algorithm (0-7) +// B4-B7 x------- Pan left [OPNA] +// -x------ Pan right [OPNA] +// --xx---- LFO AM shift (0-3) [OPNA+ only] +// -----xxx LFO PM depth (0-7) [OPNA+ only] +// +// Per-operator registers (channel in address bits 0-1, operator in bits 2-3) +// Note that all these apply to address+100 as well on OPNA+ +// 30-3F -xxx---- Detune value (0-7) +// ----xxxx Multiple value (0-15) +// 40-4F -xxxxxxx Total level (0-127) +// 50-5F xx------ Key scale rate (0-3) +// ---xxxxx Attack rate (0-31) +// 60-6F x------- LFO AM enable [OPNA] +// ---xxxxx Decay rate (0-31) +// 70-7F ---xxxxx Sustain rate (0-31) +// 80-8F xxxx---- Sustain level (0-15) +// ----xxxx Release rate (0-15) +// 90-9F ----x--- SSG-EG enable +// -----xxx SSG-EG envelope (0-7) +// +// Special multi-frequency registers (channel implicitly #2; operator in address bits 0-1) +// A8-AB xxxxxxxx Frequency number lower 8 bits +// AC-AF --xxx--- Block (0-7) +// -----xxx Frequency number upper 3 bits +// +// Internal (fake) registers: +// B8-BB --xxxxxx Latched frequency number upper bits (from A4-A7) +// BC-BF --xxxxxx Latched frequency number upper bits (from AC-AF) +// + +template +class opn_registers_base : public fm_registers_base +{ +public: + // constants + static constexpr uint32_t OUTPUTS = IsOpnA ? 2 : 1; + static constexpr uint32_t CHANNELS = IsOpnA ? 6 : 3; + static constexpr uint32_t ALL_CHANNELS = (1 << CHANNELS) - 1; + static constexpr uint32_t OPERATORS = CHANNELS * 4; + static constexpr uint32_t WAVEFORMS = 1; + static constexpr uint32_t REGISTERS = IsOpnA ? 0x200 : 0x100; + static constexpr uint32_t REG_MODE = 0x27; + static constexpr uint32_t DEFAULT_PRESCALE = 6; + static constexpr uint32_t EG_CLOCK_DIVIDER = 3; + static constexpr bool EG_HAS_SSG = true; + static constexpr bool MODULATOR_DELAY = false; + static constexpr uint32_t CSM_TRIGGER_MASK = 1 << 2; + static constexpr uint8_t STATUS_TIMERA = 0x01; + static constexpr uint8_t STATUS_TIMERB = 0x02; + static constexpr uint8_t STATUS_BUSY = 0x80; + static constexpr uint8_t STATUS_IRQ = 0; + + // constructor + opn_registers_base(); + + // reset to initial state + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // map channel number to register offset + static constexpr uint32_t channel_offset(uint32_t chnum) + { + assert(chnum < CHANNELS); + if (!IsOpnA) + return chnum; + else + return (chnum % 3) + 0x100 * (chnum / 3); + } + + // map operator number to register offset + static constexpr uint32_t operator_offset(uint32_t opnum) + { + assert(opnum < OPERATORS); + if (!IsOpnA) + return opnum + opnum / 3; + else + return (opnum % 12) + ((opnum % 12) / 3) + 0x100 * (opnum / 12); + } + + // return an array of operator indices for each channel + struct operator_mapping { uint32_t chan[CHANNELS]; }; + void operator_map(operator_mapping &dest) const; + + // read a register value + uint8_t read(uint16_t index) const { return m_regdata[index]; } + + // handle writes to the register array + bool write(uint16_t index, uint8_t data, uint32_t &chan, uint32_t &opmask); + + // clock the noise and LFO, if present, returning LFO PM value + int32_t clock_noise_and_lfo(); + + // reset the LFO + void reset_lfo() { m_lfo_counter = 0; } + + // return the AM offset from LFO for the given channel + uint32_t lfo_am_offset(uint32_t choffs) const; + + // return LFO/noise states + uint32_t noise_state() const { return 0; } + + // caching helpers + void cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache); + + // compute the phase step, given a PM value + uint32_t compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm); + + // log a key-on event + std::string log_keyon(uint32_t choffs, uint32_t opoffs); + + // system-wide registers + uint32_t test() const { return byte(0x21, 0, 8); } + uint32_t lfo_enable() const { return IsOpnA ? byte(0x22, 3, 1) : 0; } + uint32_t lfo_rate() const { return IsOpnA ? byte(0x22, 0, 3) : 0; } + uint32_t timer_a_value() const { return word(0x24, 0, 8, 0x25, 0, 2); } + uint32_t timer_b_value() const { return byte(0x26, 0, 8); } + uint32_t csm() const { return (byte(0x27, 6, 2) == 2); } + uint32_t multi_freq() const { return (byte(0x27, 6, 2) != 0); } + uint32_t reset_timer_b() const { return byte(0x27, 5, 1); } + uint32_t reset_timer_a() const { return byte(0x27, 4, 1); } + uint32_t enable_timer_b() const { return byte(0x27, 3, 1); } + uint32_t enable_timer_a() const { return byte(0x27, 2, 1); } + uint32_t load_timer_b() const { return byte(0x27, 1, 1); } + uint32_t load_timer_a() const { return byte(0x27, 0, 1); } + uint32_t multi_block_freq(uint32_t num) const { return word(0xac, 0, 6, 0xa8, 0, 8, num); } + + // per-channel registers + uint32_t ch_block_freq(uint32_t choffs) const { return word(0xa4, 0, 6, 0xa0, 0, 8, choffs); } + uint32_t ch_feedback(uint32_t choffs) const { return byte(0xb0, 3, 3, choffs); } + uint32_t ch_algorithm(uint32_t choffs) const { return byte(0xb0, 0, 3, choffs); } + uint32_t ch_output_any(uint32_t choffs) const { return IsOpnA ? byte(0xb4, 6, 2, choffs) : 1; } + uint32_t ch_output_0(uint32_t choffs) const { return IsOpnA ? byte(0xb4, 7, 1, choffs) : 1; } + uint32_t ch_output_1(uint32_t choffs) const { return IsOpnA ? byte(0xb4, 6, 1, choffs) : 0; } + uint32_t ch_output_2(uint32_t choffs) const { return 0; } + uint32_t ch_output_3(uint32_t choffs) const { return 0; } + uint32_t ch_lfo_am_sens(uint32_t choffs) const { return IsOpnA ? byte(0xb4, 4, 2, choffs) : 0; } + uint32_t ch_lfo_pm_sens(uint32_t choffs) const { return IsOpnA ? byte(0xb4, 0, 3, choffs) : 0; } + + // per-operator registers + uint32_t op_detune(uint32_t opoffs) const { return byte(0x30, 4, 3, opoffs); } + uint32_t op_multiple(uint32_t opoffs) const { return byte(0x30, 0, 4, opoffs); } + uint32_t op_total_level(uint32_t opoffs) const { return byte(0x40, 0, 7, opoffs); } + uint32_t op_ksr(uint32_t opoffs) const { return byte(0x50, 6, 2, opoffs); } + uint32_t op_attack_rate(uint32_t opoffs) const { return byte(0x50, 0, 5, opoffs); } + uint32_t op_decay_rate(uint32_t opoffs) const { return byte(0x60, 0, 5, opoffs); } + uint32_t op_lfo_am_enable(uint32_t opoffs) const { return IsOpnA ? byte(0x60, 7, 1, opoffs) : 0; } + uint32_t op_sustain_rate(uint32_t opoffs) const { return byte(0x70, 0, 5, opoffs); } + uint32_t op_sustain_level(uint32_t opoffs) const { return byte(0x80, 4, 4, opoffs); } + uint32_t op_release_rate(uint32_t opoffs) const { return byte(0x80, 0, 4, opoffs); } + uint32_t op_ssg_eg_enable(uint32_t opoffs) const { return byte(0x90, 3, 1, opoffs); } + uint32_t op_ssg_eg_mode(uint32_t opoffs) const { return byte(0x90, 0, 3, opoffs); } + +protected: + // return a bitfield extracted from a byte + uint32_t byte(uint32_t offset, uint32_t start, uint32_t count, uint32_t extra_offset = 0) const + { + return bitfield(m_regdata[offset + extra_offset], start, count); + } + + // return a bitfield extracted from a pair of bytes, MSBs listed first + uint32_t word(uint32_t offset1, uint32_t start1, uint32_t count1, uint32_t offset2, uint32_t start2, uint32_t count2, uint32_t extra_offset = 0) const + { + return (byte(offset1, start1, count1, extra_offset) << count2) | byte(offset2, start2, count2, extra_offset); + } + + // internal state + uint32_t m_lfo_counter; // LFO counter + uint8_t m_lfo_am; // current LFO AM value + uint8_t m_regdata[REGISTERS]; // register data + uint16_t m_waveform[WAVEFORMS][WAVEFORM_LENGTH]; // waveforms +}; + +using opn_registers = opn_registers_base; +using opna_registers = opn_registers_base; + + + +//********************************************************* +// OPN IMPLEMENTATION CLASSES +//********************************************************* + +// A note about prescaling and sample rates. +// +// YM2203, YM2608, and YM2610 contain an onboard SSG (basically, a YM2149). +// In order to properly generate sound at fully fidelity, the output sample +// rate of the YM2149 must be input_clock / 8. This is much higher than the +// FM needs, but in the interest of keeping things simple, the OPN generate +// functions will output at the higher rate and just replicate the last FM +// sample as many times as needed. +// +// To make things even more complicated, the YM2203 and YM2608 allow for +// software-controlled prescaling, which affects the FM and SSG clocks in +// different ways. There are three settings: divide by 6/4 (FM/SSG); divide +// by 3/2; and divide by 2/1. +// +// Thus, the minimum output sample rate needed by each part of the chip +// varies with the prescale as follows: +// +// ---- YM2203 ----- ---- YM2608 ----- ---- YM2610 ----- +// Prescale FM rate SSG rate FM rate SSG rate FM rate SSG rate +// 6 /72 /16 /144 /32 /144 /32 +// 3 /36 /8 /72 /16 +// 2 /24 /4 /48 /8 +// +// If we standardized on the fastest SSG rate, we'd end up with the following +// (ratios are output_samples:source_samples): +// +// ---- YM2203 ----- ---- YM2608 ----- ---- YM2610 ----- +// rate = clock/4 rate = clock/8 rate = clock/16 +// Prescale FM rate SSG rate FM rate SSG rate FM rate SSG rate +// 6 18:1 4:1 18:1 4:1 9:1 2:1 +// 3 9:1 2:1 9:1 2:1 +// 2 6:1 1:1 6:1 1:1 +// +// However, that's a pretty big performance hit for minimal gain. Going to +// the other extreme, we could standardize on the fastest FM rate, but then +// at least one prescale case (3) requires the FM to be smeared across two +// output samples: +// +// ---- YM2203 ----- ---- YM2608 ----- ---- YM2610 ----- +// rate = clock/24 rate = clock/48 rate = clock/144 +// Prescale FM rate SSG rate FM rate SSG rate FM rate SSG rate +// 6 3:1 2:3 3:1 2:3 1:1 2:9 +// 3 1.5:1 1:3 1.5:1 1:3 +// 2 1:1 1:6 1:1 1:6 +// +// Stepping back one factor of 2 addresses that issue: +// +// ---- YM2203 ----- ---- YM2608 ----- ---- YM2610 ----- +// rate = clock/12 rate = clock/24 rate = clock/144 +// Prescale FM rate SSG rate FM rate SSG rate FM rate SSG rate +// 6 6:1 4:3 6:1 4:3 1:1 2:9 +// 3 3:1 2:3 3:1 2:3 +// 2 2:1 1:3 2:1 1:3 +// +// This gives us three levels of output fidelity: +// OPN_FIDELITY_MAX -- highest sample rate, using fastest SSG rate +// OPN_FIDELITY_MIN -- lowest sample rate, using fastest FM rate +// OPN_FIDELITY_MED -- medium sample rate such that FM is never smeared +// +// At the maximum clocks for YM2203/YM2608 (4Mhz/8MHz), these rates will +// end up as: +// OPN_FIDELITY_MAX = 1000kHz +// OPN_FIDELITY_MIN = 166kHz +// OPN_FIEDLITY_MED = 333kHz + + +// ======================> opn_fidelity + +enum opn_fidelity : uint8_t +{ + OPN_FIDELITY_MAX, + OPN_FIDELITY_MIN, + OPN_FIDELITY_MED, + + OPN_FIDELITY_DEFAULT = OPN_FIDELITY_MAX +}; + + +// ======================> ssg_resampler + +template +class ssg_resampler +{ +private: + // helper to add the last computed value to the sums, applying the given scale + void add_last(int32_t &sum0, int32_t &sum1, int32_t &sum2, int32_t scale = 1); + + // helper to clock a new value and then add it to the sums, applying the given scale + void clock_and_add(int32_t &sum0, int32_t &sum1, int32_t &sum2, int32_t scale = 1); + + // helper to write the sums to the appropriate outputs, applying the given + // divisor to the final result + void write_to_output(OutputType *output, int32_t sum0, int32_t sum1, int32_t sum2, int32_t divisor = 1); + +public: + // constructor + ssg_resampler(ssg_engine &ssg); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // get the current sample index + uint32_t sampindex() const { return m_sampindex; } + + // configure the ratio + void configure(uint8_t outsamples, uint8_t srcsamples); + + // resample + void resample(OutputType *output, uint32_t numsamples) + { + (this->*m_resampler)(output, numsamples); + } + +private: + // resample SSG output to the target at a rate of 1 SSG sample + // to every n output samples + template + void resample_n_1(OutputType *output, uint32_t numsamples); + + // resample SSG output to the target at a rate of n SSG samples + // to every 1 output sample + template + void resample_1_n(OutputType *output, uint32_t numsamples); + + // resample SSG output to the target at a rate of 9 SSG samples + // to every 2 output samples + void resample_2_9(OutputType *output, uint32_t numsamples); + + // resample SSG output to the target at a rate of 3 SSG samples + // to every 1 output sample + void resample_1_3(OutputType *output, uint32_t numsamples); + + // resample SSG output to the target at a rate of 3 SSG samples + // to every 2 output samples + void resample_2_3(OutputType *output, uint32_t numsamples); + + // resample SSG output to the target at a rate of 3 SSG samples + // to every 4 output samples + void resample_4_3(OutputType *output, uint32_t numsamples); + + // no-op resampler + void resample_nop(OutputType *output, uint32_t numsamples); + + // define a pointer type + using resample_func = void (ssg_resampler::*)(OutputType *output, uint32_t numsamples); + + // internal state + ssg_engine &m_ssg; + uint32_t m_sampindex; + resample_func m_resampler; + ssg_engine::output_data m_last; +}; + + +// ======================> ym2203 + +class ym2203 +{ +public: + using fm_engine = fm_engine_base; + static constexpr uint32_t FM_OUTPUTS = fm_engine::OUTPUTS; + static constexpr uint32_t SSG_OUTPUTS = ssg_engine::OUTPUTS; + static constexpr uint32_t OUTPUTS = FM_OUTPUTS + SSG_OUTPUTS; + using output_data = ymfm_output; + + // constructor + ym2203(ymfm_interface &intf); + + // configuration + void ssg_override(ssg_override &intf) { m_ssg.override(intf); } + void set_fidelity(opn_fidelity fidelity) { m_fidelity = fidelity; update_prescale(m_fm.clock_prescale()); } + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const + { + switch (m_fidelity) + { + case OPN_FIDELITY_MIN: return input_clock / 24; + case OPN_FIDELITY_MED: return input_clock / 12; + default: + case OPN_FIDELITY_MAX: return input_clock / 4; + } + } + uint32_t ssg_effective_clock(uint32_t input_clock) const { uint32_t scale = m_fm.clock_prescale() * 2 / 3; return input_clock * 2 / scale; } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access + uint8_t read_status(); + uint8_t read_data(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate one sample of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // internal helpers + void update_prescale(uint8_t prescale); + void clock_fm(); + + // internal state + opn_fidelity m_fidelity; // configured fidelity + uint8_t m_address; // address register + uint8_t m_fm_samples_per_output; // how many samples to repeat + fm_engine::output_data m_last_fm; // last FM output + fm_engine m_fm; // core FM engine + ssg_engine m_ssg; // SSG engine + ssg_resampler m_ssg_resampler; // SSG resampler helper +}; + + + +//********************************************************* +// OPNA IMPLEMENTATION CLASSES +//********************************************************* + +// ======================> ym2608 + +class ym2608 +{ + static constexpr uint8_t STATUS_ADPCM_B_EOS = 0x04; + static constexpr uint8_t STATUS_ADPCM_B_BRDY = 0x08; + static constexpr uint8_t STATUS_ADPCM_B_ZERO = 0x10; + static constexpr uint8_t STATUS_ADPCM_B_PLAYING = 0x20; + +public: + using fm_engine = fm_engine_base; + static constexpr uint32_t FM_OUTPUTS = fm_engine::OUTPUTS; + static constexpr uint32_t SSG_OUTPUTS = 1; + static constexpr uint32_t OUTPUTS = FM_OUTPUTS + SSG_OUTPUTS; + using output_data = ymfm_output; + + // constructor + ym2608(ymfm_interface &intf); + + // configuration + void ssg_override(ssg_override &intf) { m_ssg.override(intf); } + void set_fidelity(opn_fidelity fidelity) { m_fidelity = fidelity; update_prescale(m_fm.clock_prescale()); } + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const + { + switch (m_fidelity) + { + case OPN_FIDELITY_MIN: return input_clock / 48; + case OPN_FIDELITY_MED: return input_clock / 24; + default: + case OPN_FIDELITY_MAX: return input_clock / 8; + } + } + uint32_t ssg_effective_clock(uint32_t input_clock) const { uint32_t scale = m_fm.clock_prescale() * 2 / 3; return input_clock / scale; } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access + uint8_t read_status(); + uint8_t read_data(); + uint8_t read_status_hi(); + uint8_t read_data_hi(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write_address_hi(uint8_t data); + void write_data_hi(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate one sample of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // internal helpers + void update_prescale(uint8_t prescale); + void clock_fm_and_adpcm(); + + // internal state + opn_fidelity m_fidelity; // configured fidelity + uint16_t m_address; // address register + uint8_t m_fm_samples_per_output; // how many samples to repeat + uint8_t m_irq_enable; // IRQ enable register + uint8_t m_flag_control; // flag control register + fm_engine::output_data m_last_fm; // last FM output + fm_engine m_fm; // core FM engine + ssg_engine m_ssg; // SSG engine + ssg_resampler m_ssg_resampler; // SSG resampler helper + adpcm_a_engine m_adpcm_a; // ADPCM-A engine + adpcm_b_engine m_adpcm_b; // ADPCM-B engine +}; + + +// ======================> ymf288 + +class ymf288 +{ +public: + using fm_engine = fm_engine_base; + static constexpr uint32_t FM_OUTPUTS = fm_engine::OUTPUTS; + static constexpr uint32_t SSG_OUTPUTS = 1; + static constexpr uint32_t OUTPUTS = FM_OUTPUTS + SSG_OUTPUTS; + using output_data = ymfm_output; + + // constructor + ymf288(ymfm_interface &intf); + + // configuration + void ssg_override(ssg_override &intf) { m_ssg.override(intf); } + void set_fidelity(opn_fidelity fidelity) { m_fidelity = fidelity; update_prescale(); } + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const + { + switch (m_fidelity) + { + case OPN_FIDELITY_MIN: return input_clock / 144; + case OPN_FIDELITY_MED: return input_clock / 144; + default: + case OPN_FIDELITY_MAX: return input_clock / 16; + } + } + uint32_t ssg_effective_clock(uint32_t input_clock) const { return input_clock / 4; } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access + uint8_t read_status(); + uint8_t read_data(); + uint8_t read_status_hi(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write_address_hi(uint8_t data); + void write_data_hi(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate one sample of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // internal helpers + bool ymf288_mode() { return ((m_fm.regs().read(0x20) & 0x02) != 0); } + void update_prescale(); + void clock_fm_and_adpcm(); + + // internal state + opn_fidelity m_fidelity; // configured fidelity + uint16_t m_address; // address register + uint8_t m_fm_samples_per_output; // how many samples to repeat + uint8_t m_irq_enable; // IRQ enable register + uint8_t m_flag_control; // flag control register + fm_engine::output_data m_last_fm; // last FM output + fm_engine m_fm; // core FM engine + ssg_engine m_ssg; // SSG engine + ssg_resampler m_ssg_resampler; // SSG resampler helper + adpcm_a_engine m_adpcm_a; // ADPCM-A engine +}; + + +// ======================> ym2610/ym2610b + +class ym2610 +{ + static constexpr uint8_t EOS_FLAGS_MASK = 0xbf; + +public: + using fm_engine = fm_engine_base; + static constexpr uint32_t FM_OUTPUTS = fm_engine::OUTPUTS; + static constexpr uint32_t SSG_OUTPUTS = 1; + static constexpr uint32_t OUTPUTS = FM_OUTPUTS + SSG_OUTPUTS; + using output_data = ymfm_output; + + // constructor + ym2610(ymfm_interface &intf, uint8_t channel_mask = 0x36); + + // configuration + void ssg_override(ssg_override &intf) { m_ssg.override(intf); } + void set_fidelity(opn_fidelity fidelity) { m_fidelity = fidelity; update_prescale(); } + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const + { + switch (m_fidelity) + { + case OPN_FIDELITY_MIN: return input_clock / 144; + case OPN_FIDELITY_MED: return input_clock / 144; + default: + case OPN_FIDELITY_MAX: return input_clock / 16; + } + } + uint32_t ssg_effective_clock(uint32_t input_clock) const { return input_clock / 4; } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access + uint8_t read_status(); + uint8_t read_data(); + uint8_t read_status_hi(); + uint8_t read_data_hi(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write_address_hi(uint8_t data); + void write_data_hi(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate one sample of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // internal helpers + void update_prescale(); + void clock_fm_and_adpcm(); + + // internal state + opn_fidelity m_fidelity; // configured fidelity + uint16_t m_address; // address register + uint8_t const m_fm_mask; // FM channel mask + uint8_t m_fm_samples_per_output; // how many samples to repeat + uint8_t m_eos_status; // end-of-sample signals + uint8_t m_flag_mask; // flag mask control + fm_engine::output_data m_last_fm; // last FM output + fm_engine m_fm; // core FM engine + ssg_engine m_ssg; // core FM engine + ssg_resampler m_ssg_resampler; // SSG resampler helper + adpcm_a_engine m_adpcm_a; // ADPCM-A engine + adpcm_b_engine m_adpcm_b; // ADPCM-B engine +}; + +class ym2610b : public ym2610 +{ +public: + // constructor + ym2610b(ymfm_interface &intf) : ym2610(intf, 0x3f) { } +}; + + +// ======================> ym2612 + +class ym2612 +{ +public: + using fm_engine = fm_engine_base; + static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS; + using output_data = fm_engine::output_data; + + // constructor + ym2612(ymfm_interface &intf); + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access + uint8_t read_status(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write_address_hi(uint8_t data); + void write_data_hi(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate one sample of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // simulate the DAC discontinuity + constexpr int32_t dac_discontinuity(int32_t value) const { return (value < 0) ? (value - 3) : (value + 4); } + + // internal state + uint16_t m_address; // address register + uint16_t m_dac_data; // 9-bit DAC data + uint8_t m_dac_enable; // DAC enabled? + fm_engine m_fm; // core FM engine +}; + + +// ======================> ym3438 + +class ym3438 : public ym2612 +{ +public: + ym3438(ymfm_interface &intf) : ym2612(intf) { } + + // generate one sample of sound + void generate(output_data *output, uint32_t numsamples = 1); +}; + + +// ======================> ymf276 + +class ymf276 : public ym2612 +{ +public: + ymf276(ymfm_interface &intf) : ym2612(intf) { } + + // generate one sample of sound + void generate(output_data *output, uint32_t numsamples); +}; + +} + + +#endif // YMFM_OPN_H diff --git a/src/sound/ymfm/ymfm_opq.cpp b/src/sound/ymfm/ymfm_opq.cpp new file mode 100644 index 000000000..3467c0ddf --- /dev/null +++ b/src/sound/ymfm/ymfm_opq.cpp @@ -0,0 +1,480 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#include "ymfm_opq.h" +#include "ymfm_fm.ipp" + +#define TEMPORARY_DEBUG_PRINTS (0) + +// +// OPQ (aka YM3806/YM3533) +// +// This chip is not officially documented as far as I know. What I have +// comes from Jari Kangas' work on reverse engineering the PSR70: +// +// https://github.com/JKN0/PSR70-reverse +// +// OPQ appears be bsaically a mixture of OPM and OPN. +// + +namespace ymfm +{ + +//********************************************************* +// OPQ SPECIFICS +//********************************************************* + +//------------------------------------------------- +// opq_registers - constructor +//------------------------------------------------- + +opq_registers::opq_registers() : + m_lfo_counter(0), + m_lfo_am(0) +{ + // create the waveforms + for (uint32_t index = 0; index < WAVEFORM_LENGTH; index++) + m_waveform[0][index] = abs_sin_attenuation(index) | (bitfield(index, 9) << 15); + + uint16_t zeroval = m_waveform[0][0]; + for (uint32_t index = 0; index < WAVEFORM_LENGTH; index++) + m_waveform[1][index] = bitfield(index, 9) ? zeroval : m_waveform[0][index]; +} + + +//------------------------------------------------- +// reset - reset to initial state +//------------------------------------------------- + +void opq_registers::reset() +{ + std::fill_n(&m_regdata[0], REGISTERS, 0); + + // enable output on both channels by default + m_regdata[0x10] = m_regdata[0x11] = m_regdata[0x12] = m_regdata[0x13] = 0xc0; + m_regdata[0x14] = m_regdata[0x15] = m_regdata[0x16] = m_regdata[0x17] = 0xc0; +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void opq_registers::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_lfo_counter); + state.save_restore(m_lfo_am); + state.save_restore(m_regdata); +} + + +//------------------------------------------------- +// operator_map - return an array of operator +// indices for each channel; for OPM this is fixed +//------------------------------------------------- + +void opq_registers::operator_map(operator_mapping &dest) const +{ + // seems like the operators are not swizzled like they are on OPM/OPN? + static const operator_mapping s_fixed_map = + { { + operator_list( 0, 8, 16, 24 ), // Channel 0 operators + operator_list( 1, 9, 17, 25 ), // Channel 1 operators + operator_list( 2, 10, 18, 26 ), // Channel 2 operators + operator_list( 3, 11, 19, 27 ), // Channel 3 operators + operator_list( 4, 12, 20, 28 ), // Channel 4 operators + operator_list( 5, 13, 21, 29 ), // Channel 5 operators + operator_list( 6, 14, 22, 30 ), // Channel 6 operators + operator_list( 7, 15, 23, 31 ), // Channel 7 operators + } }; + dest = s_fixed_map; +} + + +//------------------------------------------------- +// write - handle writes to the register array +//------------------------------------------------- + +bool opq_registers::write(uint16_t index, uint8_t data, uint32_t &channel, uint32_t &opmask) +{ + assert(index < REGISTERS); + + // detune/multiple share a register based on the MSB of what is written + // remap the multiple values to 100-11F + if ((index & 0xe0) == 0x40 && bitfield(data, 7) != 0) + index += 0xc0; + + m_regdata[index] = data; + + // handle writes to the key on index + if (index == 0x05) + { + channel = bitfield(data, 0, 3); + opmask = bitfield(data, 3, 4); + return true; + } + return false; +} + + +//------------------------------------------------- +// clock_noise_and_lfo - clock the noise and LFO, +// handling clock division, depth, and waveform +// computations +//------------------------------------------------- + +int32_t opq_registers::clock_noise_and_lfo() +{ + // OPQ LFO is not well-understood, but the enable and rate values + // look a lot like OPN, so we'll crib from there as a starting point + + // if LFO not enabled (not present on OPN), quick exit with 0s + if (!lfo_enable()) + { + m_lfo_counter = 0; + m_lfo_am = 0; + return 0; + } + + // this table is based on converting the frequencies in the applications + // manual to clock dividers, based on the assumption of a 7-bit LFO value + static uint8_t const lfo_max_count[8] = { 109, 78, 72, 68, 63, 45, 9, 6 }; + uint32_t subcount = uint8_t(m_lfo_counter++); + + // when we cross the divider count, add enough to zero it and cause an + // increment at bit 8; the 7-bit value lives from bits 8-14 + if (subcount >= lfo_max_count[lfo_rate()]) + m_lfo_counter += 0x101 - subcount; + + // AM value is 7 bits, staring at bit 8; grab the low 6 directly + m_lfo_am = bitfield(m_lfo_counter, 8, 6); + + // first half of the AM period (bit 6 == 0) is inverted + if (bitfield(m_lfo_counter, 8+6) == 0) + m_lfo_am ^= 0x3f; + + // PM value is 5 bits, starting at bit 10; grab the low 3 directly + int32_t pm = bitfield(m_lfo_counter, 10, 3); + + // PM is reflected based on bit 3 + if (bitfield(m_lfo_counter, 10+3)) + pm ^= 7; + + // PM is negated based on bit 4 + return bitfield(m_lfo_counter, 10+4) ? -pm : pm; +} + + +//------------------------------------------------- +// lfo_am_offset - return the AM offset from LFO +// for the given channel +//------------------------------------------------- + +uint32_t opq_registers::lfo_am_offset(uint32_t choffs) const +{ + // OPM maps AM quite differently from OPN + + // shift value for AM sensitivity is [*, 0, 1, 2], + // mapping to values of [0, 23.9, 47.8, and 95.6dB] + uint32_t am_sensitivity = ch_lfo_am_sens(choffs); + if (am_sensitivity == 0) + return 0; + + // QUESTION: see OPN note below for the dB range mapping; it applies + // here as well + + // raw LFO AM value on OPM is 0-FF, which is already a factor of 2 + // larger than the OPN below, putting our staring point at 2x theirs; + // this works out since our minimum is 2x their maximum + return m_lfo_am << (am_sensitivity - 1); +} + + +//------------------------------------------------- +// cache_operator_data - fill the operator cache +// with prefetched data +//------------------------------------------------- + +void opq_registers::cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache) +{ + // set up the easy stuff + cache.waveform = &m_waveform[op_waveform(opoffs)][0]; + + // get frequency from the appropriate registers + uint32_t block_freq = cache.block_freq = (opoffs & 8) ? ch_block_freq_24(choffs) : ch_block_freq_13(choffs); + + // compute the keycode: block_freq is: + // + // BBBFFFFFFFFFFFF + // ^^^^??? + // + // keycode is not understood, so just guessing it is like OPN: + // the 5-bit keycode uses the top 4 bits plus a magic formula + // for the final bit + uint32_t keycode = bitfield(block_freq, 11, 4) << 1; + + // lowest bit is determined by a mix of next lower FNUM bits + // according to this equation from the YM2608 manual: + // + // (F11 & (F10 | F9 | F8)) | (!F11 & F10 & F9 & F8) + // + // for speed, we just look it up in a 16-bit constant + keycode |= bitfield(0xfe80, bitfield(block_freq, 8, 4)); + + // detune adjustment: the detune values supported by the OPQ are + // a much larger range (6 bits vs 3 bits) compared to any other + // known FM chip; based on experiments, it seems that the extra + // bits provide a bigger detune range rather than finer control, + // so until we get true measurements just assemble a net detune + // value by summing smaller detunes + int32_t detune = int32_t(op_detune(opoffs)) - 0x20; + int32_t abs_detune = std::abs(detune); + int32_t adjust = (abs_detune / 3) * detune_adjustment(3, keycode) + detune_adjustment(abs_detune % 3, keycode); + cache.detune = (detune >= 0) ? adjust : -adjust; + + // multiple value, as an x.1 value (0 means 0.5) + static const uint8_t s_multiple_map[16] = { 1,2,4,6,8,10,12,14,16,18,20,24,30,32,34,36 }; + cache.multiple = s_multiple_map[op_multiple(opoffs)]; + + // phase step, or PHASE_STEP_DYNAMIC if PM is active; this depends on + // block_freq, detune, and multiple, so compute it after we've done those + if (lfo_enable() == 0 || ch_lfo_pm_sens(choffs) == 0) + cache.phase_step = compute_phase_step(choffs, opoffs, cache, 0); + else + cache.phase_step = opdata_cache::PHASE_STEP_DYNAMIC; + + // total level, scaled by 8 + cache.total_level = op_total_level(opoffs) << 3; + + // 4-bit sustain level, but 15 means 31 so effectively 5 bits + cache.eg_sustain = op_sustain_level(opoffs); + cache.eg_sustain |= (cache.eg_sustain + 1) & 0x10; + cache.eg_sustain <<= 5; + + // determine KSR adjustment for enevlope rates + uint32_t ksrval = keycode >> (op_ksr(opoffs) ^ 3); + cache.eg_rate[EG_ATTACK] = effective_rate(op_attack_rate(opoffs) * 2, ksrval); + cache.eg_rate[EG_DECAY] = effective_rate(op_decay_rate(opoffs) * 2, ksrval); + cache.eg_rate[EG_SUSTAIN] = effective_rate(op_sustain_rate(opoffs) * 2, ksrval); + cache.eg_rate[EG_RELEASE] = effective_rate(op_release_rate(opoffs) * 4 + 2, ksrval); + cache.eg_rate[EG_REVERB] = (ch_reverb(choffs) != 0) ? 5*4 : cache.eg_rate[EG_RELEASE]; + cache.eg_shift = 0; +} + + +//------------------------------------------------- +// compute_phase_step - compute the phase step +//------------------------------------------------- + +uint32_t opq_registers::compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm) +{ + // OPN phase calculation has only a single detune parameter + // and uses FNUMs instead of keycodes + + // extract frequency number (low 12 bits of block_freq) + uint32_t fnum = bitfield(cache.block_freq, 0, 12); + + // if there's a non-zero PM sensitivity, compute the adjustment + uint32_t pm_sensitivity = ch_lfo_pm_sens(choffs); + if (pm_sensitivity != 0) + { + // apply the phase adjustment based on the upper 7 bits + // of FNUM and the PM depth parameters + fnum += opn_lfo_pm_phase_adjustment(bitfield(cache.block_freq, 5, 7), pm_sensitivity, lfo_raw_pm); + + // keep fnum to 12 bits + fnum &= 0xfff; + } + + // apply block shift to compute phase step + uint32_t block = bitfield(cache.block_freq, 12, 3); + uint32_t phase_step = (fnum << block) >> 2; + + // apply detune based on the keycode + phase_step += cache.detune; + + // clamp to 17 bits in case detune overflows + // QUESTION: is this specific to the YM2612/3438? + phase_step &= 0x1ffff; + + // apply frequency multiplier (which is cached as an x.1 value) + return (phase_step * cache.multiple) >> 1; +} + + +//------------------------------------------------- +// log_keyon - log a key-on event +//------------------------------------------------- + +std::string opq_registers::log_keyon(uint32_t choffs, uint32_t opoffs) +{ + uint32_t chnum = choffs; + uint32_t opnum = opoffs; + + char buffer[256]; + char *end = &buffer[0]; + + end += sprintf(end, "%u.%02u freq=%04X dt=%+2d fb=%u alg=%X mul=%X tl=%02X ksr=%u adsr=%02X/%02X/%02X/%X sl=%X out=%c%c", + chnum, opnum, + (opoffs & 1) ? ch_block_freq_24(choffs) : ch_block_freq_13(choffs), + int32_t(op_detune(opoffs)) - 0x20, + ch_feedback(choffs), + ch_algorithm(choffs), + op_multiple(opoffs), + op_total_level(opoffs), + op_ksr(opoffs), + op_attack_rate(opoffs), + op_decay_rate(opoffs), + op_sustain_rate(opoffs), + op_release_rate(opoffs), + op_sustain_level(opoffs), + ch_output_0(choffs) ? 'L' : '-', + ch_output_1(choffs) ? 'R' : '-'); + + bool am = (lfo_enable() && op_lfo_am_enable(opoffs) && ch_lfo_am_sens(choffs) != 0); + if (am) + end += sprintf(end, " am=%u", ch_lfo_am_sens(choffs)); + bool pm = (lfo_enable() && ch_lfo_pm_sens(choffs) != 0); + if (pm) + end += sprintf(end, " pm=%u", ch_lfo_pm_sens(choffs)); + if (am || pm) + end += sprintf(end, " lfo=%02X", lfo_rate()); + if (ch_reverb(choffs)) + end += sprintf(end, " reverb"); + + return buffer; +} + + + +//********************************************************* +// YM3806 +//********************************************************* + +//------------------------------------------------- +// ym3806 - constructor +//------------------------------------------------- + +ym3806::ym3806(ymfm_interface &intf) : + m_fm(intf) +{ +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void ym3806::reset() +{ + // reset the engines + m_fm.reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ym3806::save_restore(ymfm_saved_state &state) +{ + m_fm.save_restore(state); +} + + +//------------------------------------------------- +// read_status - read the status register +//------------------------------------------------- + +uint8_t ym3806::read_status() +{ + uint8_t result = m_fm.status(); + if (m_fm.intf().ymfm_is_busy()) + result |= fm_engine::STATUS_BUSY; + return result; +} + + +//------------------------------------------------- +// read - handle a read from the device +//------------------------------------------------- + +uint8_t ym3806::read(uint32_t offset) +{ + uint8_t result = 0xff; + switch (offset) + { + case 0: // status port + result = read_status(); + break; + + default: // unknown + debug::log_unexpected_read_write("Unexpected read from YM3806 offset %02X\n", offset); + break; + } +if (TEMPORARY_DEBUG_PRINTS && offset != 0) printf("Read %02X = %02X\n", offset, result); + return result; +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym3806::write(uint32_t offset, uint8_t data) +{ +if (TEMPORARY_DEBUG_PRINTS && (offset != 3 || data != 0x71)) printf("Write %02X = %02X\n", offset, data); + // write the FM register + m_fm.write(offset, data); +} + + +//------------------------------------------------- +// generate - generate one sample of sound +//------------------------------------------------- + +void ym3806::generate(output_data *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + // clock the system + m_fm.clock(fm_engine::ALL_CHANNELS); + + // update the FM content; YM3806 is full 14-bit with no intermediate clipping + m_fm.output(output->clear(), 0, 32767, fm_engine::ALL_CHANNELS); + + // YM3608 appears to go through a YM3012 DAC, which means we want to apply + // the FP truncation logic to the outputs + output->roundtrip_fp(); + } +} + +} diff --git a/src/sound/ymfm/ymfm_opq.h b/src/sound/ymfm/ymfm_opq.h new file mode 100644 index 000000000..f530ac070 --- /dev/null +++ b/src/sound/ymfm/ymfm_opq.h @@ -0,0 +1,293 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#ifndef YMFM_OPQ_H +#define YMFM_OPQ_H + +#pragma once + +#include "ymfm.h" +#include "ymfm_fm.h" + +namespace ymfm +{ + +//********************************************************* +// REGISTER CLASSES +//********************************************************* + +// ======================> opq_registers + +// +// OPQ register map: +// +// System-wide registers: +// 03 xxxxxxxx Timer control (unknown; 0x71 causes interrupts at ~10ms) +// 04 ----x--- LFO disable +// -----xxx LFO frequency (0=~4Hz, 6=~10Hz, 7=~47Hz) +// 05 -x------ Key on/off operator 4 +// --x----- Key on/off operator 3 +// ---x---- Key on/off operator 2 +// ----x--- Key on/off operator 1 +// -----xxx Channel select +// +// Per-channel registers (channel in address bits 0-2) +// 10-17 x------- Pan right +// -x------ Pan left +// --xxx--- Feedback level for operator 1 (0-7) +// -----xxx Operator connection algorithm (0-7) +// 18-1F x------- Reverb +// -xxx---- PM sensitivity +// ------xx AM shift +// 20-27 -xxx---- Block (0-7), Operator 2 & 4 +// ----xxxx Frequency number upper 4 bits, Operator 2 & 4 +// 28-2F -xxx---- Block (0-7), Operator 1 & 3 +// ----xxxx Frequency number upper 4 bits, Operator 1 & 3 +// 30-37 xxxxxxxx Frequency number lower 8 bits, Operator 2 & 4 +// 38-3F xxxxxxxx Frequency number lower 8 bits, Operator 1 & 3 +// +// Per-operator registers (channel in address bits 0-2, operator in bits 3-4) +// 40-5F 0-xxxxxx Detune value (0-63) +// 1---xxxx Multiple value (0-15) +// 60-7F -xxxxxxx Total level (0-127) +// 80-9F xx------ Key scale rate (0-3) +// ---xxxxx Attack rate (0-31) +// A0-BF x------- LFO AM enable, retrigger disable +// x------ Waveform select +// ---xxxxx Decay rate (0-31) +// C0-DF ---xxxxx Sustain rate (0-31) +// E0-FF xxxx---- Sustain level (0-15) +// ----xxxx Release rate (0-15) +// +// Diffs from OPM: +// - 2 frequencies/channel +// - retrigger disable +// - 2 waveforms +// - uses FNUM +// - reverb behavior +// - larger detune range +// +// Questions: +// - timer information is pretty light +// - how does echo work? +// - + +class opq_registers : public fm_registers_base +{ +public: + // constants + static constexpr uint32_t OUTPUTS = 2; + static constexpr uint32_t CHANNELS = 8; + static constexpr uint32_t ALL_CHANNELS = (1 << CHANNELS) - 1; + static constexpr uint32_t OPERATORS = CHANNELS * 4; + static constexpr uint32_t WAVEFORMS = 2; + static constexpr uint32_t REGISTERS = 0x120; + static constexpr uint32_t REG_MODE = 0x03; + static constexpr uint32_t DEFAULT_PRESCALE = 2; + static constexpr uint32_t EG_CLOCK_DIVIDER = 3; + static constexpr bool EG_HAS_REVERB = true; + static constexpr bool MODULATOR_DELAY = false; + static constexpr uint32_t CSM_TRIGGER_MASK = ALL_CHANNELS; + static constexpr uint8_t STATUS_TIMERA = 0; + static constexpr uint8_t STATUS_TIMERB = 0x04; + static constexpr uint8_t STATUS_BUSY = 0x80; + static constexpr uint8_t STATUS_IRQ = 0; + + // constructor + opq_registers(); + + // reset to initial state + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // map channel number to register offset + static constexpr uint32_t channel_offset(uint32_t chnum) + { + assert(chnum < CHANNELS); + return chnum; + } + + // map operator number to register offset + static constexpr uint32_t operator_offset(uint32_t opnum) + { + assert(opnum < OPERATORS); + return opnum; + } + + // return an array of operator indices for each channel + struct operator_mapping { uint32_t chan[CHANNELS]; }; + void operator_map(operator_mapping &dest) const; + + // handle writes to the register array + bool write(uint16_t index, uint8_t data, uint32_t &chan, uint32_t &opmask); + + // clock the noise and LFO, if present, returning LFO PM value + int32_t clock_noise_and_lfo(); + + // reset the LFO + void reset_lfo() { m_lfo_counter = 0; } + + // return the AM offset from LFO for the given channel + uint32_t lfo_am_offset(uint32_t choffs) const; + + // return the current noise state, gated by the noise clock + uint32_t noise_state() const { return 0; } + + // caching helpers + void cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache); + + // compute the phase step, given a PM value + uint32_t compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm); + + // log a key-on event + std::string log_keyon(uint32_t choffs, uint32_t opoffs); + + // system-wide registers + uint32_t timer_a_value() const { return 0; } + uint32_t timer_b_value() const { return byte(0x03, 2, 6) | 0xc0; } // ??? + uint32_t csm() const { return 0; } + uint32_t reset_timer_b() const { return byte(0x03, 0, 1); } // ??? + uint32_t reset_timer_a() const { return 0; } + uint32_t enable_timer_b() const { return byte(0x03, 0, 1); } // ??? + uint32_t enable_timer_a() const { return 0; } + uint32_t load_timer_b() const { return byte(0x03, 0, 1); } // ??? + uint32_t load_timer_a() const { return 0; } + uint32_t lfo_enable() const { return byte(0x04, 3, 1) ^ 1; } + uint32_t lfo_rate() const { return byte(0x04, 0, 3); } + + // per-channel registers + uint32_t ch_output_any(uint32_t choffs) const { return byte(0x10, 6, 2, choffs); } + uint32_t ch_output_0(uint32_t choffs) const { return byte(0x10, 6, 1, choffs); } + uint32_t ch_output_1(uint32_t choffs) const { return byte(0x10, 7, 1, choffs); } + uint32_t ch_output_2(uint32_t choffs) const { return 0; } + uint32_t ch_output_3(uint32_t choffs) const { return 0; } + uint32_t ch_feedback(uint32_t choffs) const { return byte(0x10, 3, 3, choffs); } + uint32_t ch_algorithm(uint32_t choffs) const { return byte(0x10, 0, 3, choffs); } + uint32_t ch_reverb(uint32_t choffs) const { return byte(0x18, 7, 1, choffs); } + uint32_t ch_lfo_pm_sens(uint32_t choffs) const { return byte(0x18, 4, 3, choffs); } + uint32_t ch_lfo_am_sens(uint32_t choffs) const { return byte(0x18, 0, 2, choffs); } + uint32_t ch_block_freq_24(uint32_t choffs) const { return word(0x20, 0, 7, 0x30, 0, 8, choffs); } + uint32_t ch_block_freq_13(uint32_t choffs) const { return word(0x28, 0, 7, 0x38, 0, 8, choffs); } + + // per-operator registers + uint32_t op_detune(uint32_t opoffs) const { return byte(0x40, 0, 6, opoffs); } + uint32_t op_multiple(uint32_t opoffs) const { return byte(0x100, 0, 4, opoffs); } + uint32_t op_total_level(uint32_t opoffs) const { return byte(0x60, 0, 7, opoffs); } + uint32_t op_ksr(uint32_t opoffs) const { return byte(0x80, 6, 2, opoffs); } + uint32_t op_attack_rate(uint32_t opoffs) const { return byte(0x80, 0, 5, opoffs); } + uint32_t op_lfo_am_enable(uint32_t opoffs) const { return byte(0xa0, 7, 1, opoffs); } + uint32_t op_waveform(uint32_t opoffs) const { return byte(0xa0, 6, 1, opoffs); } + uint32_t op_decay_rate(uint32_t opoffs) const { return byte(0xa0, 0, 5, opoffs); } + uint32_t op_sustain_rate(uint32_t opoffs) const { return byte(0xc0, 0, 5, opoffs); } + uint32_t op_sustain_level(uint32_t opoffs) const { return byte(0xe0, 4, 4, opoffs); } + uint32_t op_release_rate(uint32_t opoffs) const { return byte(0xe0, 0, 4, opoffs); } + +protected: + // return a bitfield extracted from a byte + uint32_t byte(uint32_t offset, uint32_t start, uint32_t count, uint32_t extra_offset = 0) const + { + return bitfield(m_regdata[offset + extra_offset], start, count); + } + + // return a bitfield extracted from a pair of bytes, MSBs listed first + uint32_t word(uint32_t offset1, uint32_t start1, uint32_t count1, uint32_t offset2, uint32_t start2, uint32_t count2, uint32_t extra_offset = 0) const + { + return (byte(offset1, start1, count1, extra_offset) << count2) | byte(offset2, start2, count2, extra_offset); + } + + // internal state + uint32_t m_lfo_counter; // LFO counter + uint8_t m_lfo_am; // current LFO AM value + uint8_t m_regdata[REGISTERS]; // register data + uint16_t m_waveform[WAVEFORMS][WAVEFORM_LENGTH]; // waveforms +}; + + + +//********************************************************* +// IMPLEMENTATION CLASSES +//********************************************************* + +// ======================> ym3806 + +class ym3806 +{ +public: + using fm_engine = fm_engine_base; + static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS; + using output_data = fm_engine::output_data; + + // constructor + ym3806(ymfm_interface &intf); + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access + uint8_t read_status(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data) { /* not supported; only direct writes */ } + void write_data(uint8_t data) { /* not supported; only direct writes */ } + void write(uint32_t offset, uint8_t data); + + // generate one sample of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // internal state + fm_engine m_fm; // core FM engine +}; + + +// ======================> ym3533 + +class ym3533 : public ym3806 +{ +public: + // constructor + ym3533(ymfm_interface &intf) : + ym3806(intf) { } +}; + +} + + +#endif // YMFM_OPQ_H diff --git a/src/sound/ymfm/ymfm_opx.h b/src/sound/ymfm/ymfm_opx.h new file mode 100644 index 000000000..9f9bbdba7 --- /dev/null +++ b/src/sound/ymfm/ymfm_opx.h @@ -0,0 +1,290 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#ifndef YMFM_OPX_H +#define YMFM_OPX_H + +#pragma once + +#include "ymfm.h" +#include "ymfm_fm.h" + +namespace ymfm +{ + +//********************************************************* +// REGISTER CLASSES +//********************************************************* + +// ======================> opx_registers + +// +// OPX register map: +// +// System-wide registers: +// +// Per-channel registers (channel in address bits 0-2) +// +// Per-operator registers (4 banks): +// 00-0F x------- Enable +// -xxxx--- EXT out +// -------x Key on +// 10-1F xxxxxxxx LFO frequency +// 20-2F xx------ AM sensitivity (0-3) +// --xxx--- PM sensitivity (0-7) +// ------xx LFO waveform (0=disable, 1=saw, 2= +// 30-3F -xxx---- Detune (0-7) +// ----xxxx Multiple (0-15) +// 40-4F -xxxxxxx Total level (0-127) +// 50-5F xxx----- Key scale (0-7) +// ---xxxxx Attack rate (0-31) +// 60-6F ---xxxxx Decay rate (0-31) +// 70-7F ---xxxxx Sustain rate (0-31) +// 80-8F xxxx---- Sustain level (0-15) +// ----xxxx Release rate (0-15) +// 90-9F xxxxxxxx Frequency number (low 8 bits) +// A0-AF xxxx---- Block (0-15) +// ----xxxx Frequency number (high 4 bits) +// B0-BF x------- Acc on +// -xxx---- Feedback level (0-7) +// -----xxx Waveform (0-7, 7=PCM) +// C0-CF ----xxxx Algorithm (0-15) +// D0-DF xxxx---- CH0 level (0-15) +// ----xxxx CH1 level (0-15) +// E0-EF xxxx---- CH2 level (0-15) +// ----xxxx CH3 level (0-15) +// + +class opx_registers : public fm_registers_base +{ + // LFO waveforms are 256 entries long + static constexpr uint32_t LFO_WAVEFORM_LENGTH = 256; + +public: + // constants + static constexpr uint32_t OUTPUTS = 8; + static constexpr uint32_t CHANNELS = 24; + static constexpr uint32_t ALL_CHANNELS = (1 << CHANNELS) - 1; + static constexpr uint32_t OPERATORS = CHANNELS * 2; + static constexpr uint32_t WAVEFORMS = 8; + static constexpr uint32_t REGISTERS = 0x800; + static constexpr uint32_t DEFAULT_PRESCALE = 8; + static constexpr uint32_t EG_CLOCK_DIVIDER = 2; + static constexpr uint32_t CSM_TRIGGER_MASK = ALL_CHANNELS; + static constexpr uint32_t REG_MODE = 0x14; + static constexpr uint8_t STATUS_TIMERA = 0x01; + static constexpr uint8_t STATUS_TIMERB = 0x02; + static constexpr uint8_t STATUS_BUSY = 0x80; + static constexpr uint8_t STATUS_IRQ = 0; + + // constructor + opz_registers(); + + // reset to initial state + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // map channel number to register offset + static constexpr uint32_t channel_offset(uint32_t chnum) + { + assert(chnum < CHANNELS); + return chnum; + } + + // map operator number to register offset + static constexpr uint32_t operator_offset(uint32_t opnum) + { + assert(opnum < OPERATORS); + return opnum; + } + + // return an array of operator indices for each channel + struct operator_mapping { uint32_t chan[CHANNELS]; }; + void operator_map(operator_mapping &dest) const; + + // handle writes to the register array + bool write(uint16_t index, uint8_t data, uint32_t &chan, uint32_t &opmask); + + // clock the noise and LFO, if present, returning LFO PM value + int32_t clock_noise_and_lfo(); + + // return the AM offset from LFO for the given channel + uint32_t lfo_am_offset(uint32_t choffs) const; + + // return the current noise state, gated by the noise clock + uint32_t noise_state() const { return m_noise_state; } + + // caching helpers + void cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache); + + // compute the phase step, given a PM value + uint32_t compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm); + + // log a key-on event + std::string log_keyon(uint32_t choffs, uint32_t opoffs); + + // system-wide registers + uint32_t noise_frequency() const { return byte(0x0f, 0, 5); } + uint32_t noise_enable() const { return byte(0x0f, 7, 1); } + uint32_t timer_a_value() const { return word(0x10, 0, 8, 0x11, 0, 2); } + uint32_t timer_b_value() const { return byte(0x12, 0, 8); } + uint32_t csm() const { return byte(0x14, 7, 1); } + uint32_t reset_timer_b() const { return byte(0x14, 5, 1); } + uint32_t reset_timer_a() const { return byte(0x14, 4, 1); } + uint32_t enable_timer_b() const { return byte(0x14, 3, 1); } + uint32_t enable_timer_a() const { return byte(0x14, 2, 1); } + uint32_t load_timer_b() const { return byte(0x14, 1, 1); } + uint32_t load_timer_a() const { return byte(0x14, 0, 1); } + uint32_t lfo2_pm_depth() const { return byte(0x148, 0, 7); } // fake + uint32_t lfo2_rate() const { return byte(0x16, 0, 8); } + uint32_t lfo2_am_depth() const { return byte(0x17, 0, 7); } + uint32_t lfo_rate() const { return byte(0x18, 0, 8); } + uint32_t lfo_am_depth() const { return byte(0x19, 0, 7); } + uint32_t lfo_pm_depth() const { return byte(0x149, 0, 7); } // fake + uint32_t output_bits() const { return byte(0x1b, 6, 2); } + uint32_t lfo2_sync() const { return byte(0x1b, 5, 1); } + uint32_t lfo_sync() const { return byte(0x1b, 4, 1); } + uint32_t lfo2_waveform() const { return byte(0x1b, 2, 2); } + uint32_t lfo_waveform() const { return byte(0x1b, 0, 2); } + + // per-channel registers + uint32_t ch_volume(uint32_t choffs) const { return byte(0x00, 0, 8, choffs); } + uint32_t ch_output_any(uint32_t choffs) const { return byte(0x20, 7, 1, choffs) | byte(0x30, 0, 1, choffs); } + uint32_t ch_output_0(uint32_t choffs) const { return byte(0x30, 0, 1, choffs); } + uint32_t ch_output_1(uint32_t choffs) const { return byte(0x20, 7, 1, choffs) | byte(0x30, 0, 1, choffs); } + uint32_t ch_output_2(uint32_t choffs) const { return 0; } + uint32_t ch_output_3(uint32_t choffs) const { return 0; } + uint32_t ch_key_on(uint32_t choffs) const { return byte(0x20, 6, 1, choffs); } + uint32_t ch_feedback(uint32_t choffs) const { return byte(0x20, 3, 3, choffs); } + uint32_t ch_algorithm(uint32_t choffs) const { return byte(0x20, 0, 3, choffs); } + uint32_t ch_block_freq(uint32_t choffs) const { return word(0x28, 0, 7, 0x30, 2, 6, choffs); } + uint32_t ch_lfo_pm_sens(uint32_t choffs) const { return byte(0x38, 4, 3, choffs); } + uint32_t ch_lfo_am_sens(uint32_t choffs) const { return byte(0x38, 0, 2, choffs); } + uint32_t ch_lfo2_pm_sens(uint32_t choffs) const { return byte(0x140, 4, 3, choffs); } // fake + uint32_t ch_lfo2_am_sens(uint32_t choffs) const { return byte(0x140, 0, 2, choffs); } // fake + + // per-operator registers + uint32_t op_detune(uint32_t opoffs) const { return byte(0x40, 4, 3, opoffs); } + uint32_t op_multiple(uint32_t opoffs) const { return byte(0x40, 0, 4, opoffs); } + uint32_t op_fix_range(uint32_t opoffs) const { return byte(0x40, 4, 3, opoffs); } + uint32_t op_fix_frequency(uint32_t opoffs) const { return byte(0x40, 0, 4, opoffs); } + uint32_t op_waveform(uint32_t opoffs) const { return byte(0x100, 4, 3, opoffs); } // fake + uint32_t op_fine(uint32_t opoffs) const { return byte(0x100, 0, 4, opoffs); } // fake + uint32_t op_total_level(uint32_t opoffs) const { return byte(0x60, 0, 7, opoffs); } + uint32_t op_ksr(uint32_t opoffs) const { return byte(0x80, 6, 2, opoffs); } + uint32_t op_fix_mode(uint32_t opoffs) const { return byte(0x80, 5, 1, opoffs); } + uint32_t op_attack_rate(uint32_t opoffs) const { return byte(0x80, 0, 5, opoffs); } + uint32_t op_lfo_am_enable(uint32_t opoffs) const { return byte(0xa0, 7, 1, opoffs); } + uint32_t op_decay_rate(uint32_t opoffs) const { return byte(0xa0, 0, 5, opoffs); } + uint32_t op_detune2(uint32_t opoffs) const { return byte(0xc0, 6, 2, opoffs); } + uint32_t op_sustain_rate(uint32_t opoffs) const { return byte(0xc0, 0, 5, opoffs); } + uint32_t op_eg_shift(uint32_t opoffs) const { return byte(0x120, 6, 2, opoffs); } // fake + uint32_t op_reverb_rate(uint32_t opoffs) const { return byte(0x120, 0, 3, opoffs); } // fake + uint32_t op_sustain_level(uint32_t opoffs) const { return byte(0xe0, 4, 4, opoffs); } + uint32_t op_release_rate(uint32_t opoffs) const { return byte(0xe0, 0, 4, opoffs); } + +protected: + // return a bitfield extracted from a byte + uint32_t byte(uint32_t offset, uint32_t start, uint32_t count, uint32_t extra_offset = 0) const + { + return bitfield(m_regdata[offset + extra_offset], start, count); + } + + // return a bitfield extracted from a pair of bytes, MSBs listed first + uint32_t word(uint32_t offset1, uint32_t start1, uint32_t count1, uint32_t offset2, uint32_t start2, uint32_t count2, uint32_t extra_offset = 0) const + { + return (byte(offset1, start1, count1, extra_offset) << count2) | byte(offset2, start2, count2, extra_offset); + } + + // internal state + uint32_t m_lfo_counter[2]; // LFO counter + uint32_t m_noise_lfsr; // noise LFSR state + uint8_t m_noise_counter; // noise counter + uint8_t m_noise_state; // latched noise state + uint8_t m_noise_lfo; // latched LFO noise value + uint8_t m_lfo_am[2]; // current LFO AM value + uint8_t m_regdata[REGISTERS]; // register data + uint16_t m_phase_substep[OPERATORS]; // phase substep for fixed frequency + int16_t m_lfo_waveform[4][LFO_WAVEFORM_LENGTH]; // LFO waveforms; AM in low 8, PM in upper 8 + uint16_t m_waveform[WAVEFORMS][WAVEFORM_LENGTH]; // waveforms +}; + + + +//********************************************************* +// IMPLEMENTATION CLASSES +//********************************************************* + +// ======================> ym2414 + +class ym2414 +{ +public: + using fm_engine = fm_engine_base; + static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS; + using output_data = fm_engine::output_data; + + // constructor + ym2414(ymfm_interface &intf); + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access + uint8_t read_status(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate one sample of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // internal state + uint8_t m_address; // address register + fm_engine m_fm; // core FM engine +}; + +} + + +#endif // YMFM_OPZ_H diff --git a/src/sound/ymfm/ymfm_opz.cpp b/src/sound/ymfm/ymfm_opz.cpp new file mode 100644 index 000000000..adeefd79f --- /dev/null +++ b/src/sound/ymfm/ymfm_opz.cpp @@ -0,0 +1,808 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#include "ymfm_opz.h" +#include "ymfm_fm.ipp" + +#define TEMPORARY_DEBUG_PRINTS (0) + +// +// OPZ (aka YM2414) +// +// This chip is not officially documented as far as I know. What I have +// comes from this site: +// +// http://sr4.sakura.ne.jp/fmsound/opz.html +// +// and from reading the TX81Z operator manual, which describes how a number +// of these new features work. +// +// OPZ appears be bsaically OPM with a bunch of extra features. +// +// For starters, there are two LFO generators. I have presumed that they +// operate identically since identical parameters are offered for each. I +// have also presumed the effects are additive between them. The LFOs on +// the OPZ have an extra "sync" option which apparently causes the LFO to +// reset whenever a key on is received. +// +// At the channel level, there is an additional 8-bit volume control. This +// might work as an addition to total level, or some other way. Completely +// unknown, and unimplemented. +// +// At the operator level, there are a number of extra features. First, there +// are 8 different waveforms to choose from. These are different than the +// waveforms introduced in the OPL2 and later chips. +// +// Second, there is an additional "reverb" stage added to the envelope +// generator, which kicks in when the envelope reaches -18dB. It specifies +// a slower decay rate to produce a sort of faux reverb effect. +// +// The envelope generator also supports a 2-bit shift value, which can be +// used to reduce the effect of the envelope attenuation. +// +// OPZ supports a "fixed frequency" mode for each operator, with a 3-bit +// range and 4-bit frequency value, plus a 1-bit enable. Not sure how that +// works at all, so it's not implemented. +// +// There are also several mystery fields in the operators which I have no +// clue about: "fine" (4 bits), "eg_shift" (2 bits), and "rev" (3 bits). +// eg_shift is some kind of envelope generator effect, but how it works is +// unknown. +// +// Also, according to the site above, the panning controls are changed from +// OPM, with a "mono" bit and only one control bit for the right channel. +// Current implementation is just a guess. +// + +namespace ymfm +{ + +//********************************************************* +// OPZ REGISTERS +//********************************************************* + +//------------------------------------------------- +// opz_registers - constructor +//------------------------------------------------- + +opz_registers::opz_registers() : + m_lfo_counter{ 0, 0 }, + m_noise_lfsr(1), + m_noise_counter(0), + m_noise_state(0), + m_noise_lfo(0), + m_lfo_am{ 0, 0 } +{ + // create the waveforms + for (uint32_t index = 0; index < WAVEFORM_LENGTH; index++) + m_waveform[0][index] = abs_sin_attenuation(index) | (bitfield(index, 9) << 15); + + // we only have the diagrams to judge from, but suspecting waveform 1 (and + // derived waveforms) are sin^2, based on OPX description of similar wave- + // forms; since our sin table is logarithmic, this ends up just being + // 2*existing value + uint16_t zeroval = m_waveform[0][0]; + for (uint32_t index = 0; index < WAVEFORM_LENGTH; index++) + m_waveform[1][index] = std::min(2 * (m_waveform[0][index] & 0x7fff), zeroval) | (bitfield(index, 9) << 15); + + // remaining waveforms are just derivations of the 2 main ones + for (uint32_t index = 0; index < WAVEFORM_LENGTH; index++) + { + m_waveform[2][index] = bitfield(index, 9) ? zeroval : m_waveform[0][index]; + m_waveform[3][index] = bitfield(index, 9) ? zeroval : m_waveform[1][index]; + m_waveform[4][index] = bitfield(index, 9) ? zeroval : m_waveform[0][index * 2]; + m_waveform[5][index] = bitfield(index, 9) ? zeroval : m_waveform[1][index * 2]; + m_waveform[6][index] = bitfield(index, 9) ? zeroval : m_waveform[0][(index * 2) & 0x1ff]; + m_waveform[7][index] = bitfield(index, 9) ? zeroval : m_waveform[1][(index * 2) & 0x1ff]; + } + + // create the LFO waveforms; AM in the low 8 bits, PM in the upper 8 + // waveforms are adjusted to match the pictures in the application manual + for (uint32_t index = 0; index < LFO_WAVEFORM_LENGTH; index++) + { + // waveform 0 is a sawtooth + uint8_t am = index ^ 0xff; + int8_t pm = int8_t(index); + m_lfo_waveform[0][index] = am | (pm << 8); + + // waveform 1 is a square wave + am = bitfield(index, 7) ? 0 : 0xff; + pm = int8_t(am ^ 0x80); + m_lfo_waveform[1][index] = am | (pm << 8); + + // waveform 2 is a triangle wave + am = bitfield(index, 7) ? (index << 1) : ((index ^ 0xff) << 1); + pm = int8_t(bitfield(index, 6) ? am : ~am); + m_lfo_waveform[2][index] = am | (pm << 8); + + // waveform 3 is noise; it is filled in dynamically + } +} + + +//------------------------------------------------- +// reset - reset to initial state +//------------------------------------------------- + +void opz_registers::reset() +{ + std::fill_n(&m_regdata[0], REGISTERS, 0); + + // enable output on both channels by default + m_regdata[0x30] = m_regdata[0x31] = m_regdata[0x32] = m_regdata[0x33] = 0x01; + m_regdata[0x34] = m_regdata[0x35] = m_regdata[0x36] = m_regdata[0x37] = 0x01; +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void opz_registers::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_lfo_counter); + state.save_restore(m_lfo_am); + state.save_restore(m_noise_lfsr); + state.save_restore(m_noise_counter); + state.save_restore(m_noise_state); + state.save_restore(m_noise_lfo); + state.save_restore(m_regdata); + state.save_restore(m_phase_substep); +} + + +//------------------------------------------------- +// operator_map - return an array of operator +// indices for each channel; for OPZ this is fixed +//------------------------------------------------- + +void opz_registers::operator_map(operator_mapping &dest) const +{ + // Note that the channel index order is 0,2,1,3, so we bitswap the index. + // + // This is because the order in the map is: + // carrier 1, carrier 2, modulator 1, modulator 2 + // + // But when wiring up the connections, the more natural order is: + // carrier 1, modulator 1, carrier 2, modulator 2 + static const operator_mapping s_fixed_map = + { { + operator_list( 0, 16, 8, 24 ), // Channel 0 operators + operator_list( 1, 17, 9, 25 ), // Channel 1 operators + operator_list( 2, 18, 10, 26 ), // Channel 2 operators + operator_list( 3, 19, 11, 27 ), // Channel 3 operators + operator_list( 4, 20, 12, 28 ), // Channel 4 operators + operator_list( 5, 21, 13, 29 ), // Channel 5 operators + operator_list( 6, 22, 14, 30 ), // Channel 6 operators + operator_list( 7, 23, 15, 31 ), // Channel 7 operators + } }; + dest = s_fixed_map; +} + + +//------------------------------------------------- +// write - handle writes to the register array +//------------------------------------------------- + +bool opz_registers::write(uint16_t index, uint8_t data, uint32_t &channel, uint32_t &opmask) +{ + assert(index < REGISTERS); + + // special mappings: + // 0x16 -> 0x188 if bit 7 is set + // 0x19 -> 0x189 if bit 7 is set + // 0x38..0x3F -> 0x180..0x187 if bit 7 is set + // 0x40..0x5F -> 0x100..0x11F if bit 7 is set + // 0xC0..0xDF -> 0x120..0x13F if bit 5 is set + if (index == 0x17 && bitfield(data, 7) != 0) + m_regdata[0x188] = data; + else if (index == 0x19 && bitfield(data, 7) != 0) + m_regdata[0x189] = data; + else if ((index & 0xf8) == 0x38 && bitfield(data, 7) != 0) + m_regdata[0x180 + (index & 7)] = data; + else if ((index & 0xe0) == 0x40 && bitfield(data, 7) != 0) + m_regdata[0x100 + (index & 0x1f)] = data; + else if ((index & 0xe0) == 0xc0 && bitfield(data, 5) != 0) + m_regdata[0x120 + (index & 0x1f)] = data; + else if (index < 0x100) + m_regdata[index] = data; + + // preset writes restore some values from a preset memory; not sure + // how this really works but the TX81Z will overwrite the sustain level/ + // release rate register and the envelope shift/reverb rate register to + // dampen sound, then write the preset number to register 8 to restore them + if (index == 0x08) + { + int chan = bitfield(data, 0, 3); + if (TEMPORARY_DEBUG_PRINTS) + printf("Loading preset %d\n", chan); + m_regdata[0xe0 + chan + 0] = m_regdata[0x140 + chan + 0]; + m_regdata[0xe0 + chan + 8] = m_regdata[0x140 + chan + 8]; + m_regdata[0xe0 + chan + 16] = m_regdata[0x140 + chan + 16]; + m_regdata[0xe0 + chan + 24] = m_regdata[0x140 + chan + 24]; + m_regdata[0x120 + chan + 0] = m_regdata[0x160 + chan + 0]; + m_regdata[0x120 + chan + 8] = m_regdata[0x160 + chan + 8]; + m_regdata[0x120 + chan + 16] = m_regdata[0x160 + chan + 16]; + m_regdata[0x120 + chan + 24] = m_regdata[0x160 + chan + 24]; + } + + // store the presets under some unknown condition; the pattern of writes + // when setting a new preset is: + // + // 08 (0-7), 80-9F, A0-BF, C0-DF, C0-DF (alt), 20-27, 40-5F, 40-5F (alt), + // C0-DF (alt -- again?), 38-3F, 1B, 18, E0-FF + // + // So it writes 0-7 to 08 to either reset all presets or to indicate + // that we're going to be loading them. Immediately after all the writes + // above, the very next write will be temporary values to blow away the + // values loaded into E0-FF, so somehow it also knows that anything after + // that point is not part of the preset. + // + // For now, try using the 40-5F (alt) writes as flags that presets are + // being loaded until the E0-FF writes happen. + bool is_setting_preset = (bitfield(m_regdata[0x100 + (index & 0x1f)], 7) != 0); + if (is_setting_preset) + { + if ((index & 0xe0) == 0xe0) + { + m_regdata[0x140 + (index & 0x1f)] = data; + m_regdata[0x100 + (index & 0x1f)] &= 0x7f; + } + else if ((index & 0xe0) == 0xc0 && bitfield(data, 5) != 0) + m_regdata[0x160 + (index & 0x1f)] = data; + } + + // handle writes to the key on index + if ((index & 0xf8) == 0x20 && bitfield(index, 0, 3) == bitfield(m_regdata[0x08], 0, 3)) + { + channel = bitfield(index, 0, 3); + opmask = ch_key_on(channel) ? 0xf : 0; + + // according to the TX81Z manual, the sync option causes the LFOs + // to reset at each note on + if (opmask != 0) + { + if (lfo_sync()) + m_lfo_counter[0] = 0; + if (lfo2_sync()) + m_lfo_counter[1] = 0; + } + return true; + } + return false; +} + + +//------------------------------------------------- +// clock_noise_and_lfo - clock the noise and LFO, +// handling clock division, depth, and waveform +// computations +//------------------------------------------------- + +int32_t opz_registers::clock_noise_and_lfo() +{ + // base noise frequency is measured at 2x 1/2 FM frequency; this + // means each tick counts as two steps against the noise counter + uint32_t freq = noise_frequency(); + for (int rep = 0; rep < 2; rep++) + { + // evidence seems to suggest the LFSR is clocked continually and just + // sampled at the noise frequency for output purposes; note that the + // low 8 bits are the most recent 8 bits of history while bits 8-24 + // contain the 17 bit LFSR state + m_noise_lfsr <<= 1; + m_noise_lfsr |= bitfield(m_noise_lfsr, 17) ^ bitfield(m_noise_lfsr, 14) ^ 1; + + // compare against the frequency and latch when we exceed it + if (m_noise_counter++ >= freq) + { + m_noise_counter = 0; + m_noise_state = bitfield(m_noise_lfsr, 17); + } + } + + // treat the rate as a 4.4 floating-point step value with implied + // leading 1; this matches exactly the frequencies in the application + // manual, though it might not be implemented exactly this way on chip + uint32_t rate0 = lfo_rate(); + uint32_t rate1 = lfo2_rate(); + m_lfo_counter[0] += (0x10 | bitfield(rate0, 0, 4)) << bitfield(rate0, 4, 4); + m_lfo_counter[1] += (0x10 | bitfield(rate1, 0, 4)) << bitfield(rate1, 4, 4); + uint32_t lfo0 = bitfield(m_lfo_counter[0], 22, 8); + uint32_t lfo1 = bitfield(m_lfo_counter[1], 22, 8); + + // fill in the noise entry 1 ahead of our current position; this + // ensures the current value remains stable for a full LFO clock + // and effectively latches the running value when the LFO advances + uint32_t lfo_noise = bitfield(m_noise_lfsr, 17, 8); + m_lfo_waveform[3][(lfo0 + 1) & 0xff] = lfo_noise | (lfo_noise << 8); + m_lfo_waveform[3][(lfo1 + 1) & 0xff] = lfo_noise | (lfo_noise << 8); + + // fetch the AM/PM values based on the waveform; AM is unsigned and + // encoded in the low 8 bits, while PM signed and encoded in the upper + // 8 bits + int32_t ampm0 = m_lfo_waveform[lfo_waveform()][lfo0]; + int32_t ampm1 = m_lfo_waveform[lfo2_waveform()][lfo1]; + + // apply depth to the AM values and store for later + m_lfo_am[0] = ((ampm0 & 0xff) * lfo_am_depth()) >> 7; + m_lfo_am[1] = ((ampm1 & 0xff) * lfo2_am_depth()) >> 7; + + // apply depth to the PM values and return them combined into two + int32_t pm0 = ((ampm0 >> 8) * int32_t(lfo_pm_depth())) >> 7; + int32_t pm1 = ((ampm1 >> 8) * int32_t(lfo2_pm_depth())) >> 7; + return (pm0 & 0xff) | (pm1 << 8); +} + + +//------------------------------------------------- +// lfo_am_offset - return the AM offset from LFO +// for the given channel +//------------------------------------------------- + +uint32_t opz_registers::lfo_am_offset(uint32_t choffs) const +{ + // not sure how this works for real, but just adding the two + // AM LFOs together + uint32_t result = 0; + + // shift value for AM sensitivity is [*, 0, 1, 2], + // mapping to values of [0, 23.9, 47.8, and 95.6dB] + uint32_t am_sensitivity = ch_lfo_am_sens(choffs); + if (am_sensitivity != 0) + result = m_lfo_am[0] << (am_sensitivity - 1); + + // QUESTION: see OPN note below for the dB range mapping; it applies + // here as well + + // raw LFO AM value on OPZ is 0-FF, which is already a factor of 2 + // larger than the OPN below, putting our staring point at 2x theirs; + // this works out since our minimum is 2x their maximum + uint32_t am_sensitivity2 = ch_lfo2_am_sens(choffs); + if (am_sensitivity2 != 0) + result += m_lfo_am[1] << (am_sensitivity2 - 1); + + return result; +} + + +//------------------------------------------------- +// cache_operator_data - fill the operator cache +// with prefetched data +//------------------------------------------------- + +void opz_registers::cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache) +{ + // TODO: how does fixed frequency mode work? appears to be enabled by + // op_fix_mode(), and controlled by op_fix_range(), op_fix_frequency() + + // TODO: what is op_rev()? + + // set up the easy stuff + cache.waveform = &m_waveform[op_waveform(opoffs)][0]; + + // get frequency from the channel + uint32_t block_freq = cache.block_freq = ch_block_freq(choffs); + + // compute the keycode: block_freq is: + // + // BBBCCCCFFFFFF + // ^^^^^ + // + // the 5-bit keycode is just the top 5 bits (block + top 2 bits + // of the key code) + uint32_t keycode = bitfield(block_freq, 8, 5); + + // detune adjustment + cache.detune = detune_adjustment(op_detune(opoffs), keycode); + + // multiple value, as an x.4 value (0 means 0.5) + // the "fine" control provides the fractional bits + cache.multiple = op_multiple(opoffs) << 4; + if (cache.multiple == 0) + cache.multiple = 0x08; + cache.multiple |= op_fine(opoffs); + + // phase step, or PHASE_STEP_DYNAMIC if PM is active; this depends on + // block_freq, detune, and multiple, so compute it after we've done those; + // note that fix frequency mode is also treated as dynamic + if (!op_fix_mode(opoffs) && (lfo_pm_depth() == 0 || ch_lfo_pm_sens(choffs) == 0) && (lfo2_pm_depth() == 0 || ch_lfo2_pm_sens(choffs) == 0)) + cache.phase_step = compute_phase_step(choffs, opoffs, cache, 0); + else + cache.phase_step = opdata_cache::PHASE_STEP_DYNAMIC; + + // total level, scaled by 8 + // TODO: how does ch_volume() fit into this? + cache.total_level = op_total_level(opoffs) << 3; + + // 4-bit sustain level, but 15 means 31 so effectively 5 bits + cache.eg_sustain = op_sustain_level(opoffs); + cache.eg_sustain |= (cache.eg_sustain + 1) & 0x10; + cache.eg_sustain <<= 5; + + // determine KSR adjustment for enevlope rates + uint32_t ksrval = keycode >> (op_ksr(opoffs) ^ 3); + cache.eg_rate[EG_ATTACK] = effective_rate(op_attack_rate(opoffs) * 2, ksrval); + cache.eg_rate[EG_DECAY] = effective_rate(op_decay_rate(opoffs) * 2, ksrval); + cache.eg_rate[EG_SUSTAIN] = effective_rate(op_sustain_rate(opoffs) * 2, ksrval); + cache.eg_rate[EG_RELEASE] = effective_rate(op_release_rate(opoffs) * 4 + 2, ksrval); + cache.eg_rate[EG_REVERB] = cache.eg_rate[EG_RELEASE]; + uint32_t reverb = op_reverb_rate(opoffs); + if (reverb != 0) + cache.eg_rate[EG_REVERB] = std::min(effective_rate(reverb * 4 + 2, ksrval), cache.eg_rate[EG_REVERB]); + + // set the envelope shift; TX81Z manual says operator 1 shift is fixed at "off" + cache.eg_shift = ((opoffs & 0x18) == 0) ? 0 : op_eg_shift(opoffs); +} + + +//------------------------------------------------- +// compute_phase_step - compute the phase step +//------------------------------------------------- + +uint32_t opz_registers::compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm) +{ + // OPZ has a fixed frequency mode; it is unclear whether the + // detune and multiple parameters affect things + + uint32_t phase_step; + if (op_fix_mode(opoffs)) + { + // the baseline frequency in hz comes from the fix frequency and fine + // registers, which can specify values 8-255Hz in 1Hz increments; that + // value is then shifted up by the 3-bit range + uint32_t freq = op_fix_frequency(opoffs) << 4; + if (freq == 0) + freq = 8; + freq |= op_fine(opoffs); + freq <<= op_fix_range(opoffs); + + // there is not enough resolution in the plain phase step to track the + // full range of frequencies, so we keep a per-operator sub step with an + // additional 12 bits of resolution; this calculation gives us, for + // example, a frequency of 8.0009Hz when 8Hz is requested + uint32_t substep = m_phase_substep[opoffs]; + substep += 75 * freq; + phase_step = substep >> 12; + m_phase_substep[opoffs] = substep & 0xfff; + + // detune/multiple occupy the same space as fix_range/fix_frequency so + // don't apply them in addition + return phase_step; + } + else + { + // start with coarse detune delta; table uses cents value from + // manual, converted into 1/64ths + static const int16_t s_detune2_delta[4] = { 0, (600*64+50)/100, (781*64+50)/100, (950*64+50)/100 }; + int32_t delta = s_detune2_delta[op_detune2(opoffs)]; + + // add in the PM deltas + uint32_t pm_sensitivity = ch_lfo_pm_sens(choffs); + if (pm_sensitivity != 0) + { + // raw PM value is -127..128 which is +/- 200 cents + // manual gives these magnitudes in cents: + // 0, +/-5, +/-10, +/-20, +/-50, +/-100, +/-400, +/-700 + // this roughly corresponds to shifting the 200-cent value: + // 0 >> 5, >> 4, >> 3, >> 2, >> 1, << 1, << 2 + if (pm_sensitivity < 6) + delta += int8_t(lfo_raw_pm) >> (6 - pm_sensitivity); + else + delta += int8_t(lfo_raw_pm) << (pm_sensitivity - 5); + } + uint32_t pm_sensitivity2 = ch_lfo2_pm_sens(choffs); + if (pm_sensitivity2 != 0) + { + // raw PM value is -127..128 which is +/- 200 cents + // manual gives these magnitudes in cents: + // 0, +/-5, +/-10, +/-20, +/-50, +/-100, +/-400, +/-700 + // this roughly corresponds to shifting the 200-cent value: + // 0 >> 5, >> 4, >> 3, >> 2, >> 1, << 1, << 2 + if (pm_sensitivity2 < 6) + delta += int8_t(lfo_raw_pm >> 8) >> (6 - pm_sensitivity2); + else + delta += int8_t(lfo_raw_pm >> 8) << (pm_sensitivity2 - 5); + } + + // apply delta and convert to a frequency number; this translation is + // the same as OPM so just re-use that helper + phase_step = opm_key_code_to_phase_step(cache.block_freq, delta); + + // apply detune based on the keycode + phase_step += cache.detune; + + // apply frequency multiplier (which is cached as an x.4 value) + return (phase_step * cache.multiple) >> 4; + } +} + + +//------------------------------------------------- +// log_keyon - log a key-on event +//------------------------------------------------- + +std::string opz_registers::log_keyon(uint32_t choffs, uint32_t opoffs) +{ + uint32_t chnum = choffs; + uint32_t opnum = opoffs; + + char buffer[256]; + char *end = &buffer[0]; + + end += sprintf(end, "%u.%02u", chnum, opnum); + + if (op_fix_mode(opoffs)) + end += sprintf(end, " fixfreq=%X fine=%X shift=%X", op_fix_frequency(opoffs), op_fine(opoffs), op_fix_range(opoffs)); + else + end += sprintf(end, " freq=%04X dt2=%u fine=%X", ch_block_freq(choffs), op_detune2(opoffs), op_fine(opoffs)); + + end += sprintf(end, " dt=%u fb=%u alg=%X mul=%X tl=%02X ksr=%u adsr=%02X/%02X/%02X/%X sl=%X out=%c%c", + op_detune(opoffs), + ch_feedback(choffs), + ch_algorithm(choffs), + op_multiple(opoffs), + op_total_level(opoffs), + op_ksr(opoffs), + op_attack_rate(opoffs), + op_decay_rate(opoffs), + op_sustain_rate(opoffs), + op_release_rate(opoffs), + op_sustain_level(opoffs), + ch_output_0(choffs) ? 'L' : '-', + ch_output_1(choffs) ? 'R' : '-'); + + if (op_eg_shift(opoffs) != 0) + end += sprintf(end, " egshift=%u", op_eg_shift(opoffs)); + + bool am = (lfo_am_depth() != 0 && ch_lfo_am_sens(choffs) != 0 && op_lfo_am_enable(opoffs) != 0); + if (am) + end += sprintf(end, " am=%u/%02X", ch_lfo_am_sens(choffs), lfo_am_depth()); + bool pm = (lfo_pm_depth() != 0 && ch_lfo_pm_sens(choffs) != 0); + if (pm) + end += sprintf(end, " pm=%u/%02X", ch_lfo_pm_sens(choffs), lfo_pm_depth()); + if (am || pm) + end += sprintf(end, " lfo=%02X/%c", lfo_rate(), "WQTN"[lfo_waveform()]); + + bool am2 = (lfo2_am_depth() != 0 && ch_lfo2_am_sens(choffs) != 0 && op_lfo_am_enable(opoffs) != 0); + if (am2) + end += sprintf(end, " am2=%u/%02X", ch_lfo2_am_sens(choffs), lfo2_am_depth()); + bool pm2 = (lfo2_pm_depth() != 0 && ch_lfo2_pm_sens(choffs) != 0); + if (pm2) + end += sprintf(end, " pm2=%u/%02X", ch_lfo2_pm_sens(choffs), lfo2_pm_depth()); + if (am2 || pm2) + end += sprintf(end, " lfo2=%02X/%c", lfo2_rate(), "WQTN"[lfo2_waveform()]); + + if (op_reverb_rate(opoffs) != 0) + end += sprintf(end, " rev=%u", op_reverb_rate(opoffs)); + if (op_waveform(opoffs) != 0) + end += sprintf(end, " wf=%u", op_waveform(opoffs)); + if (noise_enable() && opoffs == 31) + end += sprintf(end, " noise=1"); + + return buffer; +} + + + +//********************************************************* +// YM2414 +//********************************************************* + +//------------------------------------------------- +// ym2414 - constructor +//------------------------------------------------- + +ym2414::ym2414(ymfm_interface &intf) : + m_address(0), + m_fm(intf) +{ +} + + +//------------------------------------------------- +// reset - reset the system +//------------------------------------------------- + +void ym2414::reset() +{ + // reset the engines + m_fm.reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ym2414::save_restore(ymfm_saved_state &state) +{ + m_fm.save_restore(state); + state.save_restore(m_address); +} + + +//------------------------------------------------- +// read_status - read the status register +//------------------------------------------------- + +uint8_t ym2414::read_status() +{ + uint8_t result = m_fm.status(); + if (m_fm.intf().ymfm_is_busy()) + result |= fm_engine::STATUS_BUSY; + return result; +} + + +//------------------------------------------------- +// read - handle a read from the device +//------------------------------------------------- + +uint8_t ym2414::read(uint32_t offset) +{ + uint8_t result = 0xff; + switch (offset & 1) + { + case 0: // data port (unused) + debug::log_unexpected_read_write("Unexpected read from YM2414 offset %d\n", offset & 3); + break; + + case 1: // status port, YM2203 compatible + result = read_status(); + break; + } + return result; +} + + +//------------------------------------------------- +// write_address - handle a write to the address +// register +//------------------------------------------------- + +void ym2414::write_address(uint8_t data) +{ + // just set the address + m_address = data; +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym2414::write_data(uint8_t data) +{ + // write the FM register + m_fm.write(m_address, data); + if (TEMPORARY_DEBUG_PRINTS) + { + switch (m_address & 0xe0) + { + case 0x00: + printf("CTL %02X = %02X\n", m_address, data); + break; + + case 0x20: + switch (m_address & 0xf8) + { + case 0x20: printf("R/FBL/ALG %d = %02X\n", m_address & 7, data); break; + case 0x28: printf("KC %d = %02X\n", m_address & 7, data); break; + case 0x30: printf("KF/M %d = %02X\n", m_address & 7, data); break; + case 0x38: printf("PMS/AMS %d = %02X\n", m_address & 7, data); break; + } + break; + + case 0x40: + if (bitfield(data, 7) == 0) + printf("DT1/MUL %d.%d = %02X\n", m_address & 7, (m_address >> 3) & 3, data); + else + printf("OW/FINE %d.%d = %02X\n", m_address & 7, (m_address >> 3) & 3, data); + break; + + case 0x60: + printf("TL %d.%d = %02X\n", m_address & 7, (m_address >> 3) & 3, data); + break; + + case 0x80: + printf("KRS/FIX/AR %d.%d = %02X\n", m_address & 7, (m_address >> 3) & 3, data); + break; + + case 0xa0: + printf("A/D1R %d.%d = %02X\n", m_address & 7, (m_address >> 3) & 3, data); + break; + + case 0xc0: + if (bitfield(data, 5) == 0) + printf("DT2/D2R %d.%d = %02X\n", m_address & 7, (m_address >> 3) & 3, data); + else + printf("EGS/REV %d.%d = %02X\n", m_address & 7, (m_address >> 3) & 3, data); + break; + + case 0xe0: + printf("D1L/RR %d.%d = %02X\n", m_address & 7, (m_address >> 3) & 3, data); + break; + } + } + + // special cases + if (m_address == 0x1b) + { + // writes to register 0x1B send the upper 2 bits to the output lines + m_fm.intf().ymfm_external_write(ACCESS_IO, 0, data >> 6); + } + + // mark busy for a bit + m_fm.intf().ymfm_set_busy_end(32 * m_fm.clock_prescale()); +} + + +//------------------------------------------------- +// write - handle a write to the register +// interface +//------------------------------------------------- + +void ym2414::write(uint32_t offset, uint8_t data) +{ + switch (offset & 1) + { + case 0: // address port + write_address(data); + break; + + case 1: // data port + write_data(data); + break; + } +} + + +//------------------------------------------------- +// generate - generate one sample of sound +//------------------------------------------------- + +void ym2414::generate(output_data *output, uint32_t numsamples) +{ + for (uint32_t samp = 0; samp < numsamples; samp++, output++) + { + // clock the system + m_fm.clock(fm_engine::ALL_CHANNELS); + + // update the FM content; YM2414 is full 14-bit with no intermediate clipping + m_fm.output(output->clear(), 0, 32767, fm_engine::ALL_CHANNELS); + + // unsure about YM2414 outputs; assume it is like YM2151 + output->roundtrip_fp(); + } +} + +} diff --git a/src/sound/ymfm/ymfm_opz.h b/src/sound/ymfm/ymfm_opz.h new file mode 100644 index 000000000..997ba32f9 --- /dev/null +++ b/src/sound/ymfm/ymfm_opz.h @@ -0,0 +1,332 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#ifndef YMFM_OPZ_H +#define YMFM_OPZ_H + +#pragma once + +#include "ymfm.h" +#include "ymfm_fm.h" + +namespace ymfm +{ + +//********************************************************* +// REGISTER CLASSES +//********************************************************* + +// ======================> opz_registers + +// +// OPZ register map: +// +// System-wide registers: +// 08 -----xxx Load preset (not sure how it gets saved) +// 0F x------- Noise enable +// ---xxxxx Noise frequency +// 10 xxxxxxxx Timer A value (upper 8 bits) +// 11 ------xx Timer A value (lower 2 bits) +// 12 xxxxxxxx Timer B value +// 14 x------- CSM mode +// --x----- Reset timer B +// ---x---- Reset timer A +// ----x--- Enable timer B +// -----x-- Enable timer A +// ------x- Load timer B +// -------x Load timer A +// 16 xxxxxxxx LFO #2 frequency +// 17 0xxxxxxx AM LFO #2 depth +// 1xxxxxxx PM LFO #2 depth +// 18 xxxxxxxx LFO frequency +// 19 0xxxxxxx AM LFO depth +// 1xxxxxxx PM LFO depth +// 1B xx------ CT (2 output data lines) +// --x----- LFO #2 sync +// ---x---- LFO sync +// ----xx-- LFO #2 waveform +// ------xx LFO waveform +// +// Per-channel registers (channel in address bits 0-2) +// 00-07 xxxxxxxx Channel volume +// 20-27 x------- Pan right +// -x------ Key on (0)/off(1) +// --xxx--- Feedback level for operator 1 (0-7) +// -----xxx Operator connection algorithm (0-7) +// 28-2F -xxxxxxx Key code +// 30-37 xxxxxx-- Key fraction +// -------x Mono? mode +// 38-3F 0xxx---- LFO PM sensitivity +// -----0xx LFO AM shift +// 1xxx---- LFO #2 PM sensitivity +// -----1xx LFO #2 AM shift +// +// Per-operator registers (channel in address bits 0-2, operator in bits 3-4) +// 40-5F 0xxx---- Detune value (0-7) +// 0---xxxx Multiple value (0-15) +// 0xxx---- Fix range (0-15) +// 0---xxxx Fix frequency (0-15) +// 1xxx---- Oscillator waveform (0-7) +// 1---xxxx Fine? (0-15) +// 60-7F -xxxxxxx Total level (0-127) +// 80-9F xx------ Key scale rate (0-3) +// --x----- Fix frequency mode +// ---xxxxx Attack rate (0-31) +// A0-BF x------- LFO AM enable +// ---xxxxx Decay rate (0-31) +// C0-DF xx0----- Detune 2 value (0-3) +// --0xxxxx Sustain rate (0-31) +// xx1----- Envelope generator shift? (0-3) +// --1--xxx Rev? (0-7) +// E0-FF xxxx---- Sustain level (0-15) +// ----xxxx Release rate (0-15) +// +// Internal (fake) registers: +// 100-11F -xxx---- Oscillator waveform (0-7) +// ----xxxx Fine? (0-15) +// 120-13F xx------ Envelope generator shift (0-3) +// -----xxx Reverb rate (0-7) +// 140-15F xxxx---- Preset sustain level (0-15) +// ----xxxx Preset release rate (0-15) +// 160-17F xx------ Envelope generator shift (0-3) +// -----xxx Reverb rate (0-7) +// 180-187 -xxx---- LFO #2 PM sensitivity +// ---- xxx LFO #2 AM shift +// 188 -xxxxxxx LFO #2 PM depth +// 189 -xxxxxxx LFO PM depth +// + +class opz_registers : public fm_registers_base +{ + // LFO waveforms are 256 entries long + static constexpr uint32_t LFO_WAVEFORM_LENGTH = 256; + +public: + // constants + static constexpr uint32_t OUTPUTS = 2; + static constexpr uint32_t CHANNELS = 8; + static constexpr uint32_t ALL_CHANNELS = (1 << CHANNELS) - 1; + static constexpr uint32_t OPERATORS = CHANNELS * 4; + static constexpr uint32_t WAVEFORMS = 8; + static constexpr uint32_t REGISTERS = 0x190; + static constexpr uint32_t DEFAULT_PRESCALE = 2; + static constexpr uint32_t EG_CLOCK_DIVIDER = 3; + static constexpr bool EG_HAS_REVERB = true; + static constexpr uint32_t CSM_TRIGGER_MASK = ALL_CHANNELS; + static constexpr uint32_t REG_MODE = 0x14; + static constexpr uint8_t STATUS_TIMERA = 0x01; + static constexpr uint8_t STATUS_TIMERB = 0x02; + static constexpr uint8_t STATUS_BUSY = 0x80; + static constexpr uint8_t STATUS_IRQ = 0; + + // constructor + opz_registers(); + + // reset to initial state + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // map channel number to register offset + static constexpr uint32_t channel_offset(uint32_t chnum) + { + assert(chnum < CHANNELS); + return chnum; + } + + // map operator number to register offset + static constexpr uint32_t operator_offset(uint32_t opnum) + { + assert(opnum < OPERATORS); + return opnum; + } + + // return an array of operator indices for each channel + struct operator_mapping { uint32_t chan[CHANNELS]; }; + void operator_map(operator_mapping &dest) const; + + // handle writes to the register array + bool write(uint16_t index, uint8_t data, uint32_t &chan, uint32_t &opmask); + + // clock the noise and LFO, if present, returning LFO PM value + int32_t clock_noise_and_lfo(); + + // return the AM offset from LFO for the given channel + uint32_t lfo_am_offset(uint32_t choffs) const; + + // return the current noise state, gated by the noise clock + uint32_t noise_state() const { return m_noise_state; } + + // caching helpers + void cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache); + + // compute the phase step, given a PM value + uint32_t compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm); + + // log a key-on event + std::string log_keyon(uint32_t choffs, uint32_t opoffs); + + // system-wide registers + uint32_t noise_frequency() const { return byte(0x0f, 0, 5); } + uint32_t noise_enable() const { return byte(0x0f, 7, 1); } + uint32_t timer_a_value() const { return word(0x10, 0, 8, 0x11, 0, 2); } + uint32_t timer_b_value() const { return byte(0x12, 0, 8); } + uint32_t csm() const { return byte(0x14, 7, 1); } + uint32_t reset_timer_b() const { return byte(0x14, 5, 1); } + uint32_t reset_timer_a() const { return byte(0x14, 4, 1); } + uint32_t enable_timer_b() const { return byte(0x14, 3, 1); } + uint32_t enable_timer_a() const { return byte(0x14, 2, 1); } + uint32_t load_timer_b() const { return byte(0x14, 1, 1); } + uint32_t load_timer_a() const { return byte(0x14, 0, 1); } + uint32_t lfo2_pm_depth() const { return byte(0x188, 0, 7); } // fake + uint32_t lfo2_rate() const { return byte(0x16, 0, 8); } + uint32_t lfo2_am_depth() const { return byte(0x17, 0, 7); } + uint32_t lfo_rate() const { return byte(0x18, 0, 8); } + uint32_t lfo_am_depth() const { return byte(0x19, 0, 7); } + uint32_t lfo_pm_depth() const { return byte(0x189, 0, 7); } // fake + uint32_t output_bits() const { return byte(0x1b, 6, 2); } + uint32_t lfo2_sync() const { return byte(0x1b, 5, 1); } + uint32_t lfo_sync() const { return byte(0x1b, 4, 1); } + uint32_t lfo2_waveform() const { return byte(0x1b, 2, 2); } + uint32_t lfo_waveform() const { return byte(0x1b, 0, 2); } + + // per-channel registers + uint32_t ch_volume(uint32_t choffs) const { return byte(0x00, 0, 8, choffs); } + uint32_t ch_output_any(uint32_t choffs) const { return byte(0x20, 7, 1, choffs) | byte(0x30, 0, 1, choffs); } + uint32_t ch_output_0(uint32_t choffs) const { return byte(0x30, 0, 1, choffs); } + uint32_t ch_output_1(uint32_t choffs) const { return byte(0x20, 7, 1, choffs) | byte(0x30, 0, 1, choffs); } + uint32_t ch_output_2(uint32_t choffs) const { return 0; } + uint32_t ch_output_3(uint32_t choffs) const { return 0; } + uint32_t ch_key_on(uint32_t choffs) const { return byte(0x20, 6, 1, choffs); } + uint32_t ch_feedback(uint32_t choffs) const { return byte(0x20, 3, 3, choffs); } + uint32_t ch_algorithm(uint32_t choffs) const { return byte(0x20, 0, 3, choffs); } + uint32_t ch_block_freq(uint32_t choffs) const { return word(0x28, 0, 7, 0x30, 2, 6, choffs); } + uint32_t ch_lfo_pm_sens(uint32_t choffs) const { return byte(0x38, 4, 3, choffs); } + uint32_t ch_lfo_am_sens(uint32_t choffs) const { return byte(0x38, 0, 2, choffs); } + uint32_t ch_lfo2_pm_sens(uint32_t choffs) const { return byte(0x180, 4, 3, choffs); } // fake + uint32_t ch_lfo2_am_sens(uint32_t choffs) const { return byte(0x180, 0, 2, choffs); } // fake + + // per-operator registers + uint32_t op_detune(uint32_t opoffs) const { return byte(0x40, 4, 3, opoffs); } + uint32_t op_multiple(uint32_t opoffs) const { return byte(0x40, 0, 4, opoffs); } + uint32_t op_fix_range(uint32_t opoffs) const { return byte(0x40, 4, 3, opoffs); } + uint32_t op_fix_frequency(uint32_t opoffs) const { return byte(0x40, 0, 4, opoffs); } + uint32_t op_waveform(uint32_t opoffs) const { return byte(0x100, 4, 3, opoffs); } // fake + uint32_t op_fine(uint32_t opoffs) const { return byte(0x100, 0, 4, opoffs); } // fake + uint32_t op_total_level(uint32_t opoffs) const { return byte(0x60, 0, 7, opoffs); } + uint32_t op_ksr(uint32_t opoffs) const { return byte(0x80, 6, 2, opoffs); } + uint32_t op_fix_mode(uint32_t opoffs) const { return byte(0x80, 5, 1, opoffs); } + uint32_t op_attack_rate(uint32_t opoffs) const { return byte(0x80, 0, 5, opoffs); } + uint32_t op_lfo_am_enable(uint32_t opoffs) const { return byte(0xa0, 7, 1, opoffs); } + uint32_t op_decay_rate(uint32_t opoffs) const { return byte(0xa0, 0, 5, opoffs); } + uint32_t op_detune2(uint32_t opoffs) const { return byte(0xc0, 6, 2, opoffs); } + uint32_t op_sustain_rate(uint32_t opoffs) const { return byte(0xc0, 0, 5, opoffs); } + uint32_t op_eg_shift(uint32_t opoffs) const { return byte(0x120, 6, 2, opoffs); } // fake + uint32_t op_reverb_rate(uint32_t opoffs) const { return byte(0x120, 0, 3, opoffs); } // fake + uint32_t op_sustain_level(uint32_t opoffs) const { return byte(0xe0, 4, 4, opoffs); } + uint32_t op_release_rate(uint32_t opoffs) const { return byte(0xe0, 0, 4, opoffs); } + +protected: + // return a bitfield extracted from a byte + uint32_t byte(uint32_t offset, uint32_t start, uint32_t count, uint32_t extra_offset = 0) const + { + return bitfield(m_regdata[offset + extra_offset], start, count); + } + + // return a bitfield extracted from a pair of bytes, MSBs listed first + uint32_t word(uint32_t offset1, uint32_t start1, uint32_t count1, uint32_t offset2, uint32_t start2, uint32_t count2, uint32_t extra_offset = 0) const + { + return (byte(offset1, start1, count1, extra_offset) << count2) | byte(offset2, start2, count2, extra_offset); + } + + // internal state + uint32_t m_lfo_counter[2]; // LFO counter + uint32_t m_noise_lfsr; // noise LFSR state + uint8_t m_noise_counter; // noise counter + uint8_t m_noise_state; // latched noise state + uint8_t m_noise_lfo; // latched LFO noise value + uint8_t m_lfo_am[2]; // current LFO AM value + uint8_t m_regdata[REGISTERS]; // register data + uint16_t m_phase_substep[OPERATORS]; // phase substep for fixed frequency + int16_t m_lfo_waveform[4][LFO_WAVEFORM_LENGTH]; // LFO waveforms; AM in low 8, PM in upper 8 + uint16_t m_waveform[WAVEFORMS][WAVEFORM_LENGTH]; // waveforms +}; + + + +//********************************************************* +// IMPLEMENTATION CLASSES +//********************************************************* + +// ======================> ym2414 + +class ym2414 +{ +public: + using fm_engine = fm_engine_base; + static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS; + using output_data = fm_engine::output_data; + + // constructor + ym2414(ymfm_interface &intf); + + // reset + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // pass-through helpers + uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); } + void invalidate_caches() { m_fm.invalidate_caches(); } + + // read access + uint8_t read_status(); + uint8_t read(uint32_t offset); + + // write access + void write_address(uint8_t data); + void write_data(uint8_t data); + void write(uint32_t offset, uint8_t data); + + // generate one sample of sound + void generate(output_data *output, uint32_t numsamples = 1); + +protected: + // internal state + uint8_t m_address; // address register + fm_engine m_fm; // core FM engine +}; + +} + + +#endif // YMFM_OPZ_H diff --git a/src/sound/ymfm/ymfm_pcm.cpp b/src/sound/ymfm/ymfm_pcm.cpp new file mode 100644 index 000000000..50595133b --- /dev/null +++ b/src/sound/ymfm/ymfm_pcm.cpp @@ -0,0 +1,715 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#include "ymfm_pcm.h" +#include "ymfm_fm.h" +#include "ymfm_fm.ipp" + +namespace ymfm +{ + +//********************************************************* +// PCM REGISTERS +//********************************************************* + +//------------------------------------------------- +// reset - reset the register state +//------------------------------------------------- + +void pcm_registers::reset() +{ + std::fill_n(&m_regdata[0], REGISTERS, 0); + m_regdata[0x02] = 0x20; + m_regdata[0xf8] = 0x1b; +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void pcm_registers::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_regdata); +} + + +//------------------------------------------------- +// cache_channel_data - update the cache with +// data from the registers +//------------------------------------------------- + +void pcm_registers::cache_channel_data(uint32_t choffs, pcm_cache &cache) +{ + // compute step from octave and fnumber; the math here implies + // a .18 fraction but .16 should be perfectly fine + int32_t octave = int8_t(ch_octave(choffs) << 4) >> 4; + uint32_t fnum = ch_fnumber(choffs); + cache.step = ((0x400 | fnum) << (octave + 7)) >> 2; + + // total level is computed as a .10 value for interpolation + cache.total_level = ch_total_level(choffs) << 10; + + // compute panning values in terms of envelope attenuation + int32_t panpot = int8_t(ch_panpot(choffs) << 4) >> 4; + if (panpot >= 0) + { + cache.pan_left = (panpot == 7) ? 0x3ff : 0x20 * panpot; + cache.pan_right = 0; + } + else if (panpot >= -7) + { + cache.pan_left = 0; + cache.pan_right = (panpot == -7) ? 0x3ff : -0x20 * panpot; + } + else + cache.pan_left = cache.pan_right = 0x3ff; + + // determine the LFO stepping value; this how much to add to a running + // x.18 value for the LFO; steps were derived from frequencies in the + // manual and come out very close with these values + static const uint8_t s_lfo_steps[8] = { 1, 12, 19, 25, 31, 35, 37, 42 }; + cache.lfo_step = s_lfo_steps[ch_lfo_speed(choffs)]; + + // AM LFO depth values, derived from the manual; note each has at most + // 2 bits to make the "multiply" easy in hardware + static const uint8_t s_am_depth[8] = { 0, 0x14, 0x20, 0x28, 0x30, 0x40, 0x50, 0x80 }; + cache.am_depth = s_am_depth[ch_am_depth(choffs)]; + + // PM LFO depth values; these are converted from the manual's cents values + // into f-numbers; the computations come out quite cleanly so pretty sure + // these are correct + static const uint8_t s_pm_depth[8] = { 0, 2, 3, 4, 6, 12, 24, 48 }; + cache.pm_depth = s_pm_depth[ch_vibrato(choffs)]; + + // 4-bit sustain level, but 15 means 31 so effectively 5 bits + cache.eg_sustain = ch_sustain_level(choffs); + cache.eg_sustain |= (cache.eg_sustain + 1) & 0x10; + cache.eg_sustain <<= 5; + + // compute the key scaling correction factor; 15 means don't do any correction + int32_t correction = ch_rate_correction(choffs); + if (correction == 15) + correction = 0; + else + correction = (octave + correction) * 2 + bitfield(fnum, 9); + + // compute the envelope generator rates + cache.eg_rate[EG_ATTACK] = effective_rate(ch_attack_rate(choffs), correction); + cache.eg_rate[EG_DECAY] = effective_rate(ch_decay_rate(choffs), correction); + cache.eg_rate[EG_SUSTAIN] = effective_rate(ch_sustain_rate(choffs), correction); + cache.eg_rate[EG_RELEASE] = effective_rate(ch_release_rate(choffs), correction); + cache.eg_rate[EG_REVERB] = 5; + + // if damping is on, override some things; essentially decay at a hardcoded + // rate of 48 until -12db (0x80), then at maximum rate for the rest + if (ch_damp(choffs) != 0) + { + cache.eg_rate[EG_DECAY] = 48; + cache.eg_rate[EG_SUSTAIN] = 63; + cache.eg_rate[EG_RELEASE] = 63; + cache.eg_sustain = 0x80; + } +} + + +//------------------------------------------------- +// effective_rate - return the effective rate, +// clamping and applying corrections as needed +//------------------------------------------------- + +uint32_t pcm_registers::effective_rate(uint32_t raw, uint32_t correction) +{ + // raw rates of 0 and 15 just pin to min/max + if (raw == 0) + return 0; + if (raw == 15) + return 63; + + // otherwise add the correction and clamp to range + return clamp(raw * 4 + correction, 0, 63); +} + + + +//********************************************************* +// PCM CHANNEL +//********************************************************* + +//------------------------------------------------- +// pcm_channel - constructor +//------------------------------------------------- + +pcm_channel::pcm_channel(pcm_engine &owner, uint32_t choffs) : + m_choffs(choffs), + m_baseaddr(0), + m_endpos(0), + m_looppos(0), + m_curpos(0), + m_nextpos(0), + m_lfo_counter(0), + m_eg_state(EG_RELEASE), + m_env_attenuation(0x3ff), + m_total_level(0x7f << 10), + m_format(0), + m_key_state(0), + m_regs(owner.regs()), + m_owner(owner) +{ +} + + +//------------------------------------------------- +// reset - reset the channel state +//------------------------------------------------- + +void pcm_channel::reset() +{ + m_baseaddr = 0; + m_endpos = 0; + m_looppos = 0; + m_curpos = 0; + m_nextpos = 0; + m_lfo_counter = 0; + m_eg_state = EG_RELEASE; + m_env_attenuation = 0x3ff; + m_total_level = 0x7f << 10; + m_format = 0; + m_key_state = 0; +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void pcm_channel::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_baseaddr); + state.save_restore(m_endpos); + state.save_restore(m_looppos); + state.save_restore(m_curpos); + state.save_restore(m_nextpos); + state.save_restore(m_lfo_counter); + state.save_restore(m_eg_state); + state.save_restore(m_env_attenuation); + state.save_restore(m_total_level); + state.save_restore(m_format); + state.save_restore(m_key_state); +} + + +//------------------------------------------------- +// prepare - prepare for clocking +//------------------------------------------------- + +bool pcm_channel::prepare() +{ + // cache the data + m_regs.cache_channel_data(m_choffs, m_cache); + + // clock the key state + if ((m_key_state & KEY_PENDING) != 0) + { + uint8_t oldstate = m_key_state; + m_key_state = (m_key_state >> 1) & KEY_ON; + if (((oldstate ^ m_key_state) & KEY_ON) != 0) + { + if ((m_key_state & KEY_ON) != 0) + start_attack(); + else + start_release(); + } + } + + // set the total level directly if not interpolating + if (m_regs.ch_level_direct(m_choffs)) + m_total_level = m_cache.total_level; + + // we're active until we're quiet after the release + return (m_eg_state < EG_RELEASE || m_env_attenuation < EG_QUIET); +} + + +//------------------------------------------------- +// clock - master clocking function +//------------------------------------------------- + +void pcm_channel::clock(uint32_t env_counter) +{ + // clock the LFO, which is an x.18 value incremented based on the + // LFO speed value + m_lfo_counter += m_cache.lfo_step; + + // clock the envelope + clock_envelope(env_counter); + + // determine the step after applying vibrato + uint32_t step = m_cache.step; + if (m_cache.pm_depth != 0) + { + // shift the LFO by 1/4 cycle for PM so that it starts at 0 + uint32_t lfo_shifted = m_lfo_counter + (1 << 16); + int32_t lfo_value = bitfield(lfo_shifted, 10, 7); + if (bitfield(lfo_shifted, 17) != 0) + lfo_value ^= 0x7f; + lfo_value -= 0x40; + step += (lfo_value * int32_t(m_cache.pm_depth)) >> 7; + } + + // advance the sample step and loop as needed + m_curpos = m_nextpos; + m_nextpos = m_curpos + step; + if (m_nextpos >= m_endpos) + m_nextpos += m_looppos - m_endpos; + + // interpolate total level if needed + if (m_total_level != m_cache.total_level) + { + // max->min volume takes 156.4ms, or pretty close to 19/1024 per 44.1kHz sample + // min->max volume is half that, so advance by 38/1024 per sample + if (m_total_level < m_cache.total_level) + m_total_level = std::min(m_total_level + 19, m_cache.total_level); + else + m_total_level = std::max(m_total_level - 38, m_cache.total_level); + } +} + + +//------------------------------------------------- +// output - return the computed output value, with +// panning applied +//------------------------------------------------- + +void pcm_channel::output(output_data &output) const +{ + // early out if the envelope is effectively off + uint32_t envelope = m_env_attenuation; + if (envelope > EG_QUIET) + return; + + // add in LFO AM modulation + if (m_cache.am_depth != 0) + { + uint32_t lfo_value = bitfield(m_lfo_counter, 10, 7); + if (bitfield(m_lfo_counter, 17) != 0) + lfo_value ^= 0x7f; + envelope += (lfo_value * m_cache.am_depth) >> 7; + } + + // add in the current interpolated total level value, which is a .10 + // value shifted left by 2 + envelope += m_total_level >> 8; + + // add in panning effect and clamp + uint32_t lenv = std::min(envelope + m_cache.pan_left, 0x3ff); + uint32_t renv = std::min(envelope + m_cache.pan_right, 0x3ff); + + // convert to volume as a .11 fraction + int32_t lvol = attenuation_to_volume(lenv << 2); + int32_t rvol = attenuation_to_volume(renv << 2); + + // fetch current sample and add + int16_t sample = fetch_sample(); + uint32_t outnum = m_regs.ch_output_channel(m_choffs) * 2; + output.data[outnum + 0] += (lvol * sample) >> 15; + output.data[outnum + 1] += (rvol * sample) >> 15; +} + + +//------------------------------------------------- +// keyonoff - signal key on/off +//------------------------------------------------- + +void pcm_channel::keyonoff(bool on) +{ + // mark the key state as pending + m_key_state |= KEY_PENDING | (on ? KEY_PENDING_ON : 0); + + // don't log masked channels + if ((m_key_state & (KEY_PENDING_ON | KEY_ON)) == KEY_PENDING_ON && ((debug::GLOBAL_PCM_CHANNEL_MASK >> m_choffs) & 1) != 0) + { + debug::log_keyon("KeyOn PCM-%02d: num=%3d oct=%2d fnum=%03X level=%02X%c ADSR=%X/%X/%X/%X SL=%X", + m_choffs, + m_regs.ch_wave_table_num(m_choffs), + int8_t(m_regs.ch_octave(m_choffs) << 4) >> 4, + m_regs.ch_fnumber(m_choffs), + m_regs.ch_total_level(m_choffs), + m_regs.ch_level_direct(m_choffs) ? '!' : '/', + m_regs.ch_attack_rate(m_choffs), + m_regs.ch_decay_rate(m_choffs), + m_regs.ch_sustain_rate(m_choffs), + m_regs.ch_release_rate(m_choffs), + m_regs.ch_sustain_level(m_choffs)); + + if (m_regs.ch_rate_correction(m_choffs) != 15) + debug::log_keyon(" RC=%X", m_regs.ch_rate_correction(m_choffs)); + + if (m_regs.ch_pseudo_reverb(m_choffs) != 0) + debug::log_keyon(" %s", "REV"); + if (m_regs.ch_damp(m_choffs) != 0) + debug::log_keyon(" %s", "DAMP"); + + if (m_regs.ch_vibrato(m_choffs) != 0 || m_regs.ch_am_depth(m_choffs) != 0) + { + if (m_regs.ch_vibrato(m_choffs) != 0) + debug::log_keyon(" VIB=%d", m_regs.ch_vibrato(m_choffs)); + if (m_regs.ch_am_depth(m_choffs) != 0) + debug::log_keyon(" AM=%d", m_regs.ch_am_depth(m_choffs)); + debug::log_keyon(" LFO=%d", m_regs.ch_lfo_speed(m_choffs)); + } + debug::log_keyon("%s", "\n"); + } +} + + +//------------------------------------------------- +// load_wavetable - load a wavetable by fetching +// its data from external memory +//------------------------------------------------- + +void pcm_channel::load_wavetable() +{ + // determine the address of the wave table header + uint32_t wavnum = m_regs.ch_wave_table_num(m_choffs); + uint32_t wavheader = 12 * wavnum; + + // above 384 it may be in a different bank + if (wavnum >= 384) + { + uint32_t bank = m_regs.wave_table_header(); + if (bank != 0) + wavheader = 512*1024 * bank + (wavnum - 384) * 12; + } + + // fetch the 22-bit base address and 2-bit format + uint8_t byte = read_pcm(wavheader + 0); + m_format = bitfield(byte, 6, 2); + m_baseaddr = bitfield(byte, 0, 6) << 16; + m_baseaddr |= read_pcm(wavheader + 1) << 8; + m_baseaddr |= read_pcm(wavheader + 2) << 0; + + // fetch the 16-bit loop position + m_looppos = read_pcm(wavheader + 3) << 8; + m_looppos |= read_pcm(wavheader + 4); + m_looppos <<= 16; + + // fetch the 16-bit end position, which is stored as a negative value + // for some reason that is unclear + m_endpos = read_pcm(wavheader + 5) << 8; + m_endpos |= read_pcm(wavheader + 6); + m_endpos = -int32_t(m_endpos) << 16; + + // remaining data values set registers + m_owner.write(0x80 + m_choffs, read_pcm(wavheader + 7)); + m_owner.write(0x98 + m_choffs, read_pcm(wavheader + 8)); + m_owner.write(0xb0 + m_choffs, read_pcm(wavheader + 9)); + m_owner.write(0xc8 + m_choffs, read_pcm(wavheader + 10)); + m_owner.write(0xe0 + m_choffs, read_pcm(wavheader + 11)); + + // reset the envelope so we don't continue playing mid-sample from previous key ons + m_env_attenuation = 0x3ff; +} + + +//------------------------------------------------- +// read_pcm - read a byte from the external PCM +// memory interface +//------------------------------------------------- + +uint8_t pcm_channel::read_pcm(uint32_t address) const +{ + return m_owner.intf().ymfm_external_read(ACCESS_PCM, address); +} + + +//------------------------------------------------- +// start_attack - start the attack phase +//------------------------------------------------- + +void pcm_channel::start_attack() +{ + // don't change anything if already in attack state + if (m_eg_state == EG_ATTACK) + return; + m_eg_state = EG_ATTACK; + + // reset the LFO if requested + if (m_regs.ch_lfo_reset(m_choffs)) + m_lfo_counter = 0; + + // if the attack rate == 63 then immediately go to max attenuation + if (m_cache.eg_rate[EG_ATTACK] == 63) + m_env_attenuation = 0; + + // reset the positions + m_curpos = m_nextpos = 0; +} + + +//------------------------------------------------- +// start_release - start the release phase +//------------------------------------------------- + +void pcm_channel::start_release() +{ + // don't change anything if already in release or reverb state + if (m_eg_state >= EG_RELEASE) + return; + m_eg_state = EG_RELEASE; +} + + +//------------------------------------------------- +// clock_envelope - clock the envelope generator +//------------------------------------------------- + +void pcm_channel::clock_envelope(uint32_t env_counter) +{ + // handle attack->decay transitions + if (m_eg_state == EG_ATTACK && m_env_attenuation == 0) + m_eg_state = EG_DECAY; + + // handle decay->sustain transitions + if (m_eg_state == EG_DECAY && m_env_attenuation >= m_cache.eg_sustain) + m_eg_state = EG_SUSTAIN; + + // fetch the appropriate 6-bit rate value from the cache + uint32_t rate = m_cache.eg_rate[m_eg_state]; + + // compute the rate shift value; this is the shift needed to + // apply to the env_counter such that it becomes a 5.11 fixed + // point number + uint32_t rate_shift = rate >> 2; + env_counter <<= rate_shift; + + // see if the fractional part is 0; if not, it's not time to clock + if (bitfield(env_counter, 0, 11) != 0) + return; + + // determine the increment based on the non-fractional part of env_counter + uint32_t relevant_bits = bitfield(env_counter, (rate_shift <= 11) ? 11 : rate_shift, 3); + uint32_t increment = attenuation_increment(rate, relevant_bits); + + // attack is the only one that increases + if (m_eg_state == EG_ATTACK) + m_env_attenuation += (~m_env_attenuation * increment) >> 4; + + // all other cases are similar + else + { + // apply the increment + m_env_attenuation += increment; + + // clamp the final attenuation + if (m_env_attenuation >= 0x400) + m_env_attenuation = 0x3ff; + + // transition to reverb at -18dB if enabled + if (m_env_attenuation >= 0xc0 && m_eg_state < EG_REVERB && m_regs.ch_pseudo_reverb(m_choffs)) + m_eg_state = EG_REVERB; + } +} + + +//------------------------------------------------- +// fetch_sample - fetch a sample at the current +// position +//------------------------------------------------- + +int16_t pcm_channel::fetch_sample() const +{ + uint32_t addr = m_baseaddr; + uint32_t pos = m_curpos >> 16; + + // 8-bit PCM: shift up by 8 + if (m_format == 0) + return read_pcm(addr + pos) << 8; + + // 16-bit PCM: assemble from 2 halves + if (m_format == 2) + { + addr += pos * 2; + return (read_pcm(addr) << 8) | read_pcm(addr + 1); + } + + // 12-bit PCM: assemble out of half of 3 bytes + addr += (pos / 2) * 3; + if ((pos & 1) == 0) + return (read_pcm(addr + 0) << 8) | ((read_pcm(addr + 1) << 4) & 0xf0); + else + return (read_pcm(addr + 2) << 8) | ((read_pcm(addr + 1) << 0) & 0xf0); +} + + + +//********************************************************* +// PCM ENGINE +//********************************************************* + +//------------------------------------------------- +// pcm_engine - constructor +//------------------------------------------------- + +pcm_engine::pcm_engine(ymfm_interface &intf) : + m_intf(intf), + m_env_counter(0), + m_modified_channels(ALL_CHANNELS), + m_active_channels(ALL_CHANNELS) +{ + // create the channels + for (int chnum = 0; chnum < CHANNELS; chnum++) + m_channel[chnum] = std::make_unique(*this, chnum); +} + + +//------------------------------------------------- +// reset - reset the engine state +//------------------------------------------------- + +void pcm_engine::reset() +{ + // reset register state + m_regs.reset(); + + // reset each channel + for (auto &chan : m_channel) + chan->reset(); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void pcm_engine::save_restore(ymfm_saved_state &state) +{ + // save our data + state.save_restore(m_env_counter); + + // save channel state + for (int chnum = 0; chnum < CHANNELS; chnum++) + m_channel[chnum]->save_restore(state); +} + + +//------------------------------------------------- +// clock - master clocking function +//------------------------------------------------- + +void pcm_engine::clock(uint32_t chanmask) +{ + // if something was modified, prepare + // also prepare every 4k samples to catch ending notes + if (m_modified_channels != 0 || m_prepare_count++ >= 4096) + { + // call each channel to prepare + m_active_channels = 0; + for (int chnum = 0; chnum < CHANNELS; chnum++) + if (bitfield(chanmask, chnum)) + if (m_channel[chnum]->prepare()) + m_active_channels |= 1 << chnum; + + // reset the modified channels and prepare count + m_modified_channels = m_prepare_count = 0; + } + + // increment the envelope counter; the envelope generator + // only clocks every other sample in order to make the PCM + // envelopes line up with the FM envelopes (after taking into + // account the different FM sampling rate) + m_env_counter++; + + // now update the state of all the channels and operators + for (int chnum = 0; chnum < CHANNELS; chnum++) + if (bitfield(chanmask, chnum)) + m_channel[chnum]->clock(m_env_counter >> 1); +} + + +//------------------------------------------------- +// update - master update function +//------------------------------------------------- + +void pcm_engine::output(output_data &output, uint32_t chanmask) +{ + // mask out some channels for debug purposes + chanmask &= debug::GLOBAL_PCM_CHANNEL_MASK; + + // compute the output of each channel + for (int chnum = 0; chnum < CHANNELS; chnum++) + if (bitfield(chanmask, chnum)) + m_channel[chnum]->output(output); +} + + +//------------------------------------------------- +// read - handle reads from the PCM registers +//------------------------------------------------- + +uint8_t pcm_engine::read(uint32_t regnum) +{ + // handle reads from the data register + if (regnum == 0x06 && m_regs.memory_access_mode() != 0) + return m_intf.ymfm_external_read(ACCESS_PCM, m_regs.memory_address_autoinc()); + + return m_regs.read(regnum); +} + + +//------------------------------------------------- +// write - handle writes to the PCM registers +//------------------------------------------------- + +void pcm_engine::write(uint32_t regnum, uint8_t data) +{ + // handle reads to the data register + if (regnum == 0x06 && m_regs.memory_access_mode() != 0) + { + m_intf.ymfm_external_write(ACCESS_PCM, m_regs.memory_address_autoinc(), data); + return; + } + + // for now just mark all channels as modified + m_modified_channels = ALL_CHANNELS; + + // most writes are passive, consumed only when needed + m_regs.write(regnum, data); + + // however, process keyons immediately + if (regnum >= 0x68 && regnum <= 0x7f) + m_channel[regnum - 0x68]->keyonoff(bitfield(data, 7)); + + // and also wavetable writes + else if (regnum >= 0x08 && regnum <= 0x1f) + m_channel[regnum - 0x08]->load_wavetable(); +} + +} diff --git a/src/sound/ymfm/ymfm_pcm.h b/src/sound/ymfm/ymfm_pcm.h new file mode 100644 index 000000000..2022a69b9 --- /dev/null +++ b/src/sound/ymfm/ymfm_pcm.h @@ -0,0 +1,347 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#ifndef YMFM_PCM_H +#define YMFM_PCM_H + +#pragma once + +#include "ymfm.h" + +namespace ymfm +{ + +/* +Note to self: Sega "Multi-PCM" is almost identical to this + +28 channels + +Writes: +00 = data reg, causes write +01 = target slot = data - (data / 8) +02 = address (clamped to 7) + +Slot data (registers with ADSR/KSR seem to be inaccessible): +0: xxxx---- panpot +1: xxxxxxxx wavetable low +2: xxxxxx-- pitch low + -------x wavetable high +3: xxxx---- octave + ----xxxx pitch hi +4: x------- key on +5: xxxxxxx- total level + -------x level direct (0=interpolate) +6: --xxx--- LFO frequency + -----xxx PM sensitivity +7: -----xxx AM sensitivity + +Sample data: ++00: start hi ++01: start mid ++02: start low ++03: loop hi ++04: loop low ++05: -end hi ++06: -end low ++07: vibrato (reg 6) ++08: attack/decay ++09: sustain level/rate ++0A: ksr/release ++0B: LFO amplitude (reg 7) + +*/ + +//********************************************************* +// INTERFACE CLASSES +//********************************************************* + +class pcm_engine; + + +// ======================> pcm_cache + +// this class holds data that is computed once at the start of clocking +// and remains static during subsequent sound generation +struct pcm_cache +{ + uint32_t step; // sample position step, as a .16 value + uint32_t total_level; // target total level, as a .10 value + uint32_t pan_left; // left panning attenuation + uint32_t pan_right; // right panning attenuation + uint32_t eg_sustain; // sustain level, shifted up to envelope values + uint8_t eg_rate[EG_STATES]; // envelope rate, including KSR + uint8_t lfo_step; // stepping value for LFO + uint8_t am_depth; // scale value for AM LFO + uint8_t pm_depth; // scale value for PM LFO +}; + + +// ======================> pcm_registers + +// +// PCM register map: +// +// System-wide registers: +// 00-01 xxxxxxxx LSI Test +// 02 -------x Memory access mode (0=sound gen, 1=read/write) +// ------x- Memory type (0=ROM, 1=ROM+SRAM) +// ---xxx-- Wave table header +// xxx----- Device ID (=1 for YMF278B) +// 03 --xxxxxx Memory address high +// 04 xxxxxxxx Memory address mid +// 05 xxxxxxxx Memory address low +// 06 xxxxxxxx Memory data +// F8 --xxx--- Mix control (FM_R) +// -----xxx Mix control (FM_L) +// F9 --xxx--- Mix control (PCM_R) +// -----xxx Mix control (PCM_L) +// +// Channel-specific registers: +// 08-1F xxxxxxxx Wave table number low +// 20-37 -------x Wave table number high +// xxxxxxx- F-number low +// 38-4F -----xxx F-number high +// ----x--- Pseudo-reverb +// xxxx---- Octave +// 50-67 xxxxxxx- Total level +// -------x Level direct +// 68-7F x------- Key on +// -x------ Damp +// --x----- LFO reset +// ---x---- Output channel +// ----xxxx Panpot +// 80-97 --xxx--- LFO speed +// -----xxx Vibrato +// 98-AF xxxx---- Attack rate +// ----xxxx Decay rate +// B0-C7 xxxx---- Sustain level +// ----xxxx Sustain rate +// C8-DF xxxx---- Rate correction +// ----xxxx Release rate +// E0-F7 -----xxx AM depth + +class pcm_registers +{ +public: + // constants + static constexpr uint32_t OUTPUTS = 4; + static constexpr uint32_t CHANNELS = 24; + static constexpr uint32_t REGISTERS = 0x100; + static constexpr uint32_t ALL_CHANNELS = (1 << CHANNELS) - 1; + + // constructor + pcm_registers() { } + + // save/restore + void save_restore(ymfm_saved_state &state); + + // reset to initial state + void reset(); + + // update cache information + void cache_channel_data(uint32_t choffs, pcm_cache &cache); + + // direct read/write access + uint8_t read(uint32_t index ) { return m_regdata[index]; } + void write(uint32_t index, uint8_t data) { m_regdata[index] = data; } + + // system-wide registers + uint32_t memory_access_mode() const { return bitfield(m_regdata[0x02], 0); } + uint32_t memory_type() const { return bitfield(m_regdata[0x02], 1); } + uint32_t wave_table_header() const { return bitfield(m_regdata[0x02], 2, 3); } + uint32_t device_id() const { return bitfield(m_regdata[0x02], 5, 3); } + uint32_t memory_address() const { return (bitfield(m_regdata[0x03], 0, 6) << 16) | (m_regdata[0x04] << 8) | m_regdata[0x05]; } + uint32_t memory_data() const { return m_regdata[0x06]; } + uint32_t mix_fm_r() const { return bitfield(m_regdata[0xf8], 3, 3); } + uint32_t mix_fm_l() const { return bitfield(m_regdata[0xf8], 0, 3); } + uint32_t mix_pcm_r() const { return bitfield(m_regdata[0xf9], 3, 3); } + uint32_t mix_pcm_l() const { return bitfield(m_regdata[0xf9], 0, 3); } + + // per-channel registers + uint32_t ch_wave_table_num(uint32_t choffs) const { return m_regdata[choffs + 0x08] | (bitfield(m_regdata[choffs + 0x20], 0) << 8); } + uint32_t ch_fnumber(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x20], 1, 7) | (bitfield(m_regdata[choffs + 0x38], 0, 3) << 7); } + uint32_t ch_pseudo_reverb(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x38], 3); } + uint32_t ch_octave(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x38], 4, 4); } + uint32_t ch_total_level(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x50], 1, 7); } + uint32_t ch_level_direct(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x50], 0); } + uint32_t ch_keyon(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x68], 7); } + uint32_t ch_damp(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x68], 6); } + uint32_t ch_lfo_reset(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x68], 5); } + uint32_t ch_output_channel(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x68], 4); } + uint32_t ch_panpot(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x68], 0, 4); } + uint32_t ch_lfo_speed(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x80], 3, 3); } + uint32_t ch_vibrato(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x80], 0, 3); } + uint32_t ch_attack_rate(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x98], 4, 4); } + uint32_t ch_decay_rate(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x98], 0, 4); } + uint32_t ch_sustain_level(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0xb0], 4, 4); } + uint32_t ch_sustain_rate(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0xb0], 0, 4); } + uint32_t ch_rate_correction(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0xc8], 4, 4); } + uint32_t ch_release_rate(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0xc8], 0, 4); } + uint32_t ch_am_depth(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0xe0], 0, 3); } + + // return the memory address and increment it + uint32_t memory_address_autoinc() + { + uint32_t result = memory_address(); + uint32_t newval = result + 1; + m_regdata[0x05] = newval >> 0; + m_regdata[0x06] = newval >> 8; + m_regdata[0x07] = (newval >> 16) & 0x3f; + return result; + } + +private: + // internal helpers + uint32_t effective_rate(uint32_t raw, uint32_t correction); + + // internal state + uint8_t m_regdata[REGISTERS]; // register data +}; + + +// ======================> pcm_channel + +class pcm_channel +{ + static constexpr uint8_t KEY_ON = 0x01; + static constexpr uint8_t KEY_PENDING_ON = 0x02; + static constexpr uint8_t KEY_PENDING = 0x04; + + // "quiet" value, used to optimize when we can skip doing working + static constexpr uint32_t EG_QUIET = 0x200; + +public: + using output_data = ymfm_output; + + // constructor + pcm_channel(pcm_engine &owner, uint32_t choffs); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // reset the channel state + void reset(); + + // return the channel offset + uint32_t choffs() const { return m_choffs; } + + // prepare prior to clocking + bool prepare(); + + // master clocking function + void clock(uint32_t env_counter); + + // return the computed output value, with panning applied + void output(output_data &output) const; + + // signal key on/off + void keyonoff(bool on); + + // load a new wavetable entry + void load_wavetable(); + +private: + // internal helpers + void start_attack(); + void start_release(); + void clock_envelope(uint32_t env_counter); + int16_t fetch_sample() const; + uint8_t read_pcm(uint32_t address) const; + + // internal state + uint32_t const m_choffs; // channel offset + uint32_t m_baseaddr; // base address + uint32_t m_endpos; // ending position + uint32_t m_looppos; // loop position + uint32_t m_curpos; // current position + uint32_t m_nextpos; // next position + uint32_t m_lfo_counter; // LFO counter + envelope_state m_eg_state; // envelope state + uint16_t m_env_attenuation; // computed envelope attenuation + uint32_t m_total_level; // total level with as 7.10 for interp + uint8_t m_format; // sample format + uint8_t m_key_state; // current key state + pcm_cache m_cache; // cached data + pcm_registers &m_regs; // reference to registers + pcm_engine &m_owner; // reference to our owner +}; + + +// ======================> pcm_engine + +class pcm_engine +{ +public: + static constexpr int OUTPUTS = pcm_registers::OUTPUTS; + static constexpr int CHANNELS = pcm_registers::CHANNELS; + static constexpr uint32_t ALL_CHANNELS = pcm_registers::ALL_CHANNELS; + using output_data = pcm_channel::output_data; + + // constructor + pcm_engine(ymfm_interface &intf); + + // reset our status + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // master clocking function + void clock(uint32_t chanmask); + + // compute sum of channel outputs + void output(output_data &output, uint32_t chanmask); + + // read from the PCM registers + uint8_t read(uint32_t regnum); + + // write to the PCM registers + void write(uint32_t regnum, uint8_t data); + + // return a reference to our interface + ymfm_interface &intf() { return m_intf; } + + // return a reference to our registers + pcm_registers ®s() { return m_regs; } + +private: + // internal state + ymfm_interface &m_intf; // reference to the interface + uint32_t m_env_counter; // envelope counter + uint32_t m_modified_channels; // bitmask of modified channels + uint32_t m_active_channels; // bitmask of active channels + uint32_t m_prepare_count; // counter to do periodic prepare sweeps + std::unique_ptr m_channel[CHANNELS]; // array of channels + pcm_registers m_regs; // registers +}; + +} + +#endif // YMFM_PCM_H diff --git a/src/sound/ymfm/ymfm_ssg.cpp b/src/sound/ymfm/ymfm_ssg.cpp new file mode 100644 index 000000000..1c477d0de --- /dev/null +++ b/src/sound/ymfm/ymfm_ssg.cpp @@ -0,0 +1,279 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#include "ymfm_ssg.h" + +namespace ymfm +{ + +//********************************************************* +// SSG REGISTERS +//********************************************************* + +//------------------------------------------------- +// reset - reset the register state +//------------------------------------------------- + +void ssg_registers::reset() +{ + std::fill_n(&m_regdata[0], REGISTERS, 0); +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ssg_registers::save_restore(ymfm_saved_state &state) +{ + state.save_restore(m_regdata); +} + + + +//********************************************************* +// SSG ENGINE +//********************************************************* + +//------------------------------------------------- +// ssg_engine - constructor +//------------------------------------------------- + +ssg_engine::ssg_engine(ymfm_interface &intf) : + m_intf(intf), + m_tone_count{ 0,0,0 }, + m_tone_state{ 0,0,0 }, + m_envelope_count(0), + m_envelope_state(0), + m_noise_count(0), + m_noise_state(1), + m_override(nullptr) +{ +} + + +//------------------------------------------------- +// reset - reset the engine state +//------------------------------------------------- + +void ssg_engine::reset() +{ + // defer to the override if present + if (m_override != nullptr) + return m_override->ssg_reset(); + + // reset register state + m_regs.reset(); + + // reset engine state + for (int chan = 0; chan < 3; chan++) + { + m_tone_count[chan] = 0; + m_tone_state[chan] = 0; + } + m_envelope_count = 0; + m_envelope_state = 0; + m_noise_count = 0; + m_noise_state = 1; +} + + +//------------------------------------------------- +// save_restore - save or restore the data +//------------------------------------------------- + +void ssg_engine::save_restore(ymfm_saved_state &state) +{ + // save register state + m_regs.save_restore(state); + + // save engine state + state.save_restore(m_tone_count); + state.save_restore(m_tone_state); + state.save_restore(m_envelope_count); + state.save_restore(m_envelope_state); + state.save_restore(m_noise_count); + state.save_restore(m_noise_state); +} + + +//------------------------------------------------- +// clock - master clocking function +//------------------------------------------------- + +void ssg_engine::clock() +{ + // clock tones; tone period units are clock/16 but since we run at clock/8 + // that works out for us to toggle the state (50% duty cycle) at twice the + // programmed period + for (int chan = 0; chan < 3; chan++) + { + m_tone_count[chan]++; + if (m_tone_count[chan] >= m_regs.ch_tone_period(chan)) + { + m_tone_state[chan] ^= 1; + m_tone_count[chan] = 0; + } + } + + // clock noise; noise period units are clock/16 but since we run at clock/8, + // our counter needs a right shift prior to compare; note that a period of 0 + // should produce an indentical result to a period of 1, so add a special + // check against that case + m_noise_count++; + if ((m_noise_count >> 1) >= m_regs.noise_period() && m_noise_count != 1) + { + m_noise_state ^= (bitfield(m_noise_state, 0) ^ bitfield(m_noise_state, 3)) << 17; + m_noise_state >>= 1; + m_noise_count = 0; + } + + // clock envelope; envelope period units are clock/8 (manual says clock/256 + // but that's for all 32 steps) + m_envelope_count++; + if (m_envelope_count >= m_regs.envelope_period()) + { + m_envelope_state++; + m_envelope_count = 0; + } +} + + +//------------------------------------------------- +// output - output the current state +//------------------------------------------------- + +void ssg_engine::output(output_data &output) +{ + // volume to amplitude table, taken from MAME's implementation but biased + // so that 0 == 0 + static int16_t const s_amplitudes[32] = + { + 0, 32, 78, 141, 178, 222, 262, 306, + 369, 441, 509, 585, 701, 836, 965, 1112, + 1334, 1595, 1853, 2146, 2576, 3081, 3576, 4135, + 5000, 6006, 7023, 8155, 9963,11976,14132,16382 + }; + + // compute the envelope volume + uint32_t envelope_volume; + if ((m_regs.envelope_hold() | (m_regs.envelope_continue() ^ 1)) && m_envelope_state >= 32) + { + m_envelope_state = 32; + envelope_volume = ((m_regs.envelope_attack() ^ m_regs.envelope_alternate()) & m_regs.envelope_continue()) ? 31 : 0; + } + else + { + uint32_t attack = m_regs.envelope_attack(); + if (m_regs.envelope_alternate()) + attack ^= bitfield(m_envelope_state, 5); + envelope_volume = (m_envelope_state & 31) ^ (attack ? 0 : 31); + } + + // iterate over channels + for (int chan = 0; chan < 3; chan++) + { + // noise depends on the noise state, which is the LSB of m_noise_state + uint32_t noise_on = m_regs.ch_noise_enable_n(chan) | m_noise_state; + + // tone depends on the current tone state + uint32_t tone_on = m_regs.ch_tone_enable_n(chan) | m_tone_state[chan]; + + // if neither tone nor noise enabled, return 0 + uint32_t volume; + if ((noise_on & tone_on) == 0) + volume = 0; + + // if the envelope is enabled, use its amplitude + else if (m_regs.ch_envelope_enable(chan)) + volume = envelope_volume; + + // otherwise, scale the tone amplitude up to match envelope values + // according to the datasheet, amplitude 15 maps to envelope 31 + else + { + volume = m_regs.ch_amplitude(chan) * 2; + if (volume != 0) + volume |= 1; + } + + // convert to amplitude + output.data[chan] = s_amplitudes[volume]; + } +} + + +//------------------------------------------------- +// read - handle reads from the SSG registers +//------------------------------------------------- + +uint8_t ssg_engine::read(uint32_t regnum) +{ + // defer to the override if present + if (m_override != nullptr) + return m_override->ssg_read(regnum); + + // read from the I/O ports call the handlers if they are configured for input + if (regnum == 0x0e && !m_regs.io_a_out()) + return m_intf.ymfm_external_read(ACCESS_IO, 0); + else if (regnum == 0x0f && !m_regs.io_b_out()) + return m_intf.ymfm_external_read(ACCESS_IO, 1); + + // otherwise just return the register value + return m_regs.read(regnum); +} + + +//------------------------------------------------- +// write - handle writes to the SSG registers +//------------------------------------------------- + +void ssg_engine::write(uint32_t regnum, uint8_t data) +{ + // defer to the override if present + if (m_override != nullptr) + return m_override->ssg_write(regnum, data); + + // store the raw value to the register array; + // most writes are passive, consumed only when needed + m_regs.write(regnum, data); + + // writes to the envelope shape register reset the state + if (regnum == 0x0d) + m_envelope_state = 0; + + // writes to the I/O ports call the handlers if they are configured for output + else if (regnum == 0x0e && m_regs.io_a_out()) + m_intf.ymfm_external_write(ACCESS_IO, 0, data); + else if (regnum == 0x0f && m_regs.io_b_out()) + m_intf.ymfm_external_write(ACCESS_IO, 1, data); +} + +} diff --git a/src/sound/ymfm/ymfm_ssg.h b/src/sound/ymfm/ymfm_ssg.h new file mode 100644 index 000000000..749ad146f --- /dev/null +++ b/src/sound/ymfm/ymfm_ssg.h @@ -0,0 +1,205 @@ +// BSD 3-Clause License +// +// Copyright (c) 2021, Aaron Giles +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, this +// list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// 3. Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#ifndef YMFM_SSG_H +#define YMFM_SSG_H + +#pragma once + +#include "ymfm.h" + +namespace ymfm +{ + +//********************************************************* +// OVERRIDE INTERFACE +//********************************************************* + +// ======================> ssg_override + +// this class describes a simple interface to allow the internal SSG to be +// overridden with another implementation +class ssg_override +{ +public: + // reset our status + virtual void ssg_reset() = 0; + + // read/write to the SSG registers + virtual uint8_t ssg_read(uint32_t regnum) = 0; + virtual void ssg_write(uint32_t regnum, uint8_t data) = 0; + + // notification when the prescale has changed + virtual void ssg_prescale_changed() = 0; +}; + + +//********************************************************* +// REGISTER CLASS +//********************************************************* + +// ======================> ssg_registers + +// +// SSG register map: +// +// System-wide registers: +// 06 ---xxxxx Noise period +// 07 x------- I/O B in(0) or out(1) +// -x------ I/O A in(0) or out(1) +// --x----- Noise enable(0) or disable(1) for channel C +// ---x---- Noise enable(0) or disable(1) for channel B +// ----x--- Noise enable(0) or disable(1) for channel A +// -----x-- Tone enable(0) or disable(1) for channel C +// ------x- Tone enable(0) or disable(1) for channel B +// -------x Tone enable(0) or disable(1) for channel A +// 0B xxxxxxxx Envelope period fine +// 0C xxxxxxxx Envelope period coarse +// 0D ----x--- Envelope shape: continue +// -----x-- Envelope shape: attack/decay +// ------x- Envelope shape: alternate +// -------x Envelope shape: hold +// 0E xxxxxxxx 8-bit parallel I/O port A +// 0F xxxxxxxx 8-bit parallel I/O port B +// +// Per-channel registers: +// 00,02,04 xxxxxxxx Tone period (fine) for channel A,B,C +// 01,03,05 ----xxxx Tone period (coarse) for channel A,B,C +// 08,09,0A ---x---- Mode: fixed(0) or variable(1) for channel A,B,C +// ----xxxx Amplitude for channel A,B,C +// +class ssg_registers +{ +public: + // constants + static constexpr uint32_t OUTPUTS = 3; + static constexpr uint32_t CHANNELS = 3; + static constexpr uint32_t REGISTERS = 0x10; + static constexpr uint32_t ALL_CHANNELS = (1 << CHANNELS) - 1; + + // constructor + ssg_registers() { } + + // reset to initial state + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // direct read/write access + uint8_t read(uint32_t index) { return m_regdata[index]; } + void write(uint32_t index, uint8_t data) { m_regdata[index] = data; } + + // system-wide registers + uint32_t noise_period() const { return bitfield(m_regdata[0x06], 0, 5); } + uint32_t io_b_out() const { return bitfield(m_regdata[0x07], 7); } + uint32_t io_a_out() const { return bitfield(m_regdata[0x07], 6); } + uint32_t envelope_period() const { return m_regdata[0x0b] | (m_regdata[0x0c] << 8); } + uint32_t envelope_continue() const { return bitfield(m_regdata[0x0d], 3); } + uint32_t envelope_attack() const { return bitfield(m_regdata[0x0d], 2); } + uint32_t envelope_alternate() const { return bitfield(m_regdata[0x0d], 1); } + uint32_t envelope_hold() const { return bitfield(m_regdata[0x0d], 0); } + uint32_t io_a_data() const { return m_regdata[0x0e]; } + uint32_t io_b_data() const { return m_regdata[0x0f]; } + + // per-channel registers + uint32_t ch_noise_enable_n(uint32_t choffs) const { return bitfield(m_regdata[0x07], 3 + choffs); } + uint32_t ch_tone_enable_n(uint32_t choffs) const { return bitfield(m_regdata[0x07], 0 + choffs); } + uint32_t ch_tone_period(uint32_t choffs) const { return m_regdata[0x00 + 2 * choffs] | (bitfield(m_regdata[0x01 + 2 * choffs], 0, 4) << 8); } + uint32_t ch_envelope_enable(uint32_t choffs) const { return bitfield(m_regdata[0x08 + choffs], 4); } + uint32_t ch_amplitude(uint32_t choffs) const { return bitfield(m_regdata[0x08 + choffs], 0, 4); } + +private: + // internal state + uint8_t m_regdata[REGISTERS]; // register data +}; + + +// ======================> ssg_engine + +class ssg_engine +{ +public: + static constexpr int OUTPUTS = ssg_registers::OUTPUTS; + static constexpr int CHANNELS = ssg_registers::CHANNELS; + static constexpr int CLOCK_DIVIDER = 8; + + using output_data = ymfm_output; + + // constructor + ssg_engine(ymfm_interface &intf); + + // configure an override + void override(ssg_override &override) { m_override = &override; } + + // reset our status + void reset(); + + // save/restore + void save_restore(ymfm_saved_state &state); + + // master clocking function + void clock(); + + // compute sum of channel outputs + void output(output_data &output); + + // read/write to the SSG registers + uint8_t read(uint32_t regnum); + void write(uint32_t regnum, uint8_t data); + + // return a reference to our interface + ymfm_interface &intf() { return m_intf; } + + // return a reference to our registers + ssg_registers ®s() { return m_regs; } + + // true if we are overridden + bool overridden() const { return (m_override != nullptr); } + + // indicate the prescale has changed + void prescale_changed() { if (m_override != nullptr) m_override->ssg_prescale_changed(); } + +private: + // internal state + ymfm_interface &m_intf; // reference to the interface + uint32_t m_tone_count[3]; // current tone counter + uint32_t m_tone_state[3]; // current tone state + uint32_t m_envelope_count; // envelope counter + uint32_t m_envelope_state; // envelope state + uint32_t m_noise_count; // current noise counter + uint32_t m_noise_state; // current noise state + ssg_registers m_regs; // registers + ssg_override *m_override; // override interface +}; + +} + +#endif // YMFM_SSG_H From 9f5c46d66a2e893c85cc73fdadc686fd05fa610d Mon Sep 17 00:00:00 2001 From: altiereslima Date: Sun, 24 Jul 2022 10:26:07 -0300 Subject: [PATCH 145/386] Update pt-BR.po --- src/qt/languages/pt-BR.po | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/src/qt/languages/pt-BR.po b/src/qt/languages/pt-BR.po index 7d1eecb09..b7f325a9a 100644 --- a/src/qt/languages/pt-BR.po +++ b/src/qt/languages/pt-BR.po @@ -116,7 +116,7 @@ msgid "VGA screen &type" msgstr "&Tipo de tela VGA" msgid "RGB &Color" -msgstr "&Cor RGB" +msgstr "&Cores RGB" msgid "&RGB Grayscale" msgstr "Tons de cinza &RGB" @@ -347,13 +347,13 @@ msgid "Time synchronization" msgstr "Sincronização da hora" msgid "Disabled" -msgstr "Desativada" +msgstr "Desativar" msgid "Enabled (local time)" -msgstr "Ativada (hora local)" +msgstr "Ativar (hora local)" msgid "Enabled (UTC)" -msgstr "Ativada (UTC)" +msgstr "Ativar (UTC)" msgid "Dynamic Recompiler" msgstr "Recompilador dinâmico" @@ -386,10 +386,10 @@ msgid "Sound card:" msgstr "Placa de som:" msgid "MIDI Out Device:" -msgstr "Disp. saída MIDI:" +msgstr "Disp. de saída MIDI:" msgid "MIDI In Device:" -msgstr "Disp. entrada MIDI:" +msgstr "Disp. de entrada MIDI:" msgid "Standalone MPU-401" msgstr "MPU-401 autônomo" @@ -506,7 +506,7 @@ msgid "&Remove" msgstr "&Remover" msgid "Bus:" -msgstr "Bar.:" +msgstr "Barramento:" msgid "Channel:" msgstr "Canal:" @@ -536,7 +536,7 @@ msgid "Image Format:" msgstr "Formato:" msgid "Block Size:" -msgstr "Bloco:" +msgstr "Blocos:" msgid "Floppy drives:" msgstr "Unidades de disquete:" @@ -599,7 +599,7 @@ msgid "Fatal error" msgstr "Erro fatal" msgid " - PAUSED" -msgstr " - PAUSED" +msgstr " - PAUSADO" msgid "Press Ctrl+Alt+PgDn to return to windowed mode." msgstr "Use Ctrl+Alt+PgDn para retornar ao modo janela" @@ -749,7 +749,7 @@ msgid "Microsoft SideWinder Pad" msgstr "Microsoft SideWinder Pad" msgid "Thrustmaster Flight Control System" -msgstr "Thrustmaster Flight Control System" +msgstr "Sistema de Controle de Voo Thrustmaster" msgid "None" msgstr "Nada" @@ -821,7 +821,7 @@ msgid "About 86Box" msgstr "Sobre o 86Box" msgid "86Box v" -msgstr "86Box versão" +msgstr "86Box versão " msgid "An emulator of old computers\n\nAuthors: Sarah Walker, Miran Grca, Fred N. van Kempen (waltje), SA1988, Tiseno100, reenigne, leilei, JohnElliott, greatpsycho, and others.\n\nReleased under the GNU General Public License version 2 or later. See LICENSE for more information." msgstr "Um emulador de computadores antigos\n\nAutores: Sarah Walker, Miran Grca, Fred N. van Kempen (waltje), SA1988, Tiseno100, reenigne, leilei, JohnElliott, greatpsycho, e outros.\n\nTraduzido por: Altieres Lima da Silva\n\nLançado sob a Licença Pública Geral GNU versão 2 ou posterior. Veja o arquivo LICENSE para mais informações." From 61cb47a2d674e08b123cb904682d5526de8816b2 Mon Sep 17 00:00:00 2001 From: altiereslima Date: Sun, 24 Jul 2022 10:26:09 -0300 Subject: [PATCH 146/386] Update pt-BR.rc --- src/win/languages/pt-BR.rc | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/src/win/languages/pt-BR.rc b/src/win/languages/pt-BR.rc index 81b2e290a..5e23a9d71 100644 --- a/src/win/languages/pt-BR.rc +++ b/src/win/languages/pt-BR.rc @@ -80,7 +80,7 @@ BEGIN MENUITEM "Monitor VGA &invertido", IDM_VID_INVERT POPUP "&Tipo de tela VGA" BEGIN - MENUITEM "&Cor RGB", IDM_VID_GRAY_RGB + MENUITEM "&Cores RGB", IDM_VID_GRAY_RGB MENUITEM "Tons de cinza &RGB", IDM_VID_GRAY_MONO MENUITEM "Monitor &âmbar", IDM_VID_GRAY_AMBER MENUITEM "Monitor &verde", IDM_VID_GRAY_GREEN @@ -267,15 +267,15 @@ END #define STR_MB "MB" #define STR_MEMORY "Memória:" #define STR_TIME_SYNC "Sincronização da hora" -#define STR_DISABLED "Desativada" -#define STR_ENABLED_LOCAL "Ativada (hora local)" -#define STR_ENABLED_UTC "Ativada (UTC)" +#define STR_DISABLED "Desativar" +#define STR_ENABLED_LOCAL "Ativar (hora local)" +#define STR_ENABLED_UTC "Ativar (UTC)" #define STR_DYNAREC "Recompilador dinâmico" #define STR_VIDEO "Vídeo:" #define STR_VOODOO "3DFX Voodoo" -#define STR_IBM8514 "IBM 8514/a Graphics" -#define STR_XGA "XGA Graphics" +#define STR_IBM8514 "Gráficos IBM 8514/a" +#define STR_XGA "Gráficos XGA" #define STR_MOUSE "Mouse:" #define STR_JOYSTICK "Joystick:" @@ -340,7 +340,7 @@ END #define STR_SIZE_MB "Tamanho (MB):" #define STR_TYPE "Tipo:" #define STR_IMG_FORMAT "Formato:" -#define STR_BLOCK_SIZE "Bloco:" +#define STR_BLOCK_SIZE "Blocos:" #define STR_FLOPPY_DRIVES "Unidades de disquete:" #define STR_TURBO "Turbo" @@ -376,7 +376,7 @@ BEGIN 2048 "86Box" IDS_2049 "Erro" IDS_2050 "Erro fatal" - IDS_2051 " - PAUSED" + IDS_2051 " - PAUSADO" IDS_2052 "Use Ctrl+Alt+PgDn para retornar ao modo janela" IDS_2053 "Velocidade" IDS_2054 "ZIP %03i %i (%s): %ls" @@ -435,7 +435,7 @@ BEGIN IDS_2099 "Joystick padrão de 8 botões" IDS_2100 "CH Flightstick Pro" IDS_2101 "Microsoft SideWinder Pad" - IDS_2102 "Thrustmaster Flight Control System" + IDS_2102 "Sistema de Controle de Voo Thrustmaster" IDS_2103 "Nada" IDS_2104 "Não foi possível carregar os aceleradores do teclado." IDS_2105 "Não foi possível registrar a entrada bruta." From d62ef9b19f3673abcda44c1cfdfa8b157a19662a Mon Sep 17 00:00:00 2001 From: richardg867 Date: Sun, 24 Jul 2022 13:29:06 -0300 Subject: [PATCH 147/386] Remove now-redundant gitignore entries --- .gitignore | 3 --- 1 file changed, 3 deletions(-) diff --git a/.gitignore b/.gitignore index 5b1c5bbd1..267f3d766 100644 --- a/.gitignore +++ b/.gitignore @@ -28,9 +28,6 @@ Makefile /archive_tmp /archive_tmp_universal /static2dll.* -/pacman.txt -/deps.txt -/universal_listing.txt /VERSION *.zip *.tar From 63ade10a563f67f7c9b099ef686b16c98c822a10 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Sun, 24 Jul 2022 13:31:58 -0300 Subject: [PATCH 148/386] Jenkins: Continuing build speed optimizations --- .ci/build.sh | 89 ++++++++++++++++++++++++++++++---------------------- 1 file changed, 52 insertions(+), 37 deletions(-) diff --git a/.ci/build.sh b/.ci/build.sh index 594de8818..2c81248e8 100644 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -107,6 +107,19 @@ make_tar() { return $? } +cache_dir="$HOME/86box-build-cache" +[ ! -d "$cache_dir" ] && mkdir -p "$cache_dir" +check_buildtag() { + [ -z "$BUILD_TAG" -o "$BUILD_TAG" != "$(cat "$cache_dir/buildtag.$1" 2> /dev/null)" ] + return $? +} +save_buildtag() { + local contents="$BUILD_TAG" + [ -n "$2" ] && local contents="$2" + echo "$contents" > "$cache_dir/buildtag.$1" + return $? +} + # Set common variables. project=86Box cwd=$(pwd) @@ -220,8 +233,6 @@ esac # Perform platform-specific setup. strip_binary=strip -cache_dir="$HOME/86box-build-cache" -[ ! -d "$cache_dir" ] && mkdir -p "$cache_dir" if is_windows then # Switch into the correct MSYSTEM if required. @@ -248,26 +259,34 @@ then # Install dependencies only if we're in a new build and/or architecture. freetype_dll="$cache_dir/freetype.$MSYSTEM.dll" - buildtag_file="$cache_dir/buildtag.$MSYSTEM" - if [ -z "$BUILD_TAG" -o "$(cat "$buildtag_file" 2> /dev/null)" != "$BUILD_TAG" ] + if check_buildtag "$MSYSTEM" then - # Update keyring, as the package signing keys sometimes change. - echo [-] Updating package databases and keyring - yes | pacman -Sy --needed msys2-keyring + # Update databases and keyring only if we're in a new build. + if check_buildtag pacmansync + then + # Update keyring as well, since the package signing keys sometimes change. + echo [-] Updating package databases and keyring + yes | pacman -Sy --needed msys2-keyring + + # Save build tag to skip pacman sync/keyring later. + save_buildtag pacmansync + else + echo [-] Not updating package databases and keyring again + fi # Query installed packages. - pacman -Qe > pacman.txt + pacman -Qe > "$cache_dir/pacman.txt" # Download the specified versions of architecture-specific dependencies. echo -n [-] Downloading dependencies: pkg_dir="/var/cache/pacman/pkg" repo_base="https://repo.msys2.org/mingw/$(echo $MSYSTEM | tr '[:upper:]' '[:lower:]')" - cat .ci/dependencies_msys.txt | tr -d '\r' > deps.txt + cat .ci/dependencies_msys.txt | tr -d '\r' > "$cache_dir/deps.txt" pkgs="" while IFS=" " read pkg version do prefixed_pkg="$MINGW_PACKAGE_PREFIX-$pkg" - installed_version=$(grep -E "^$prefixed_pkg " pacman.txt | cut -d " " -f 2) + installed_version=$(grep -E "^$prefixed_pkg " "$cache_dir/pacman.txt" | cut -d " " -f 2) if [ "$installed_version" != "$version" ] # installed_version will be empty if not installed then echo -n " [$pkg" @@ -310,7 +329,7 @@ then fi echo -n "]" fi - done < deps.txt + done < "$cache_dir/deps.txt" [ -z "$pkgs" ] && echo -n ' none required' echo @@ -331,7 +350,7 @@ then popd # Query installed packages again. - pacman -Qe > pacman.txt + pacman -Qe > "$cache_dir/pacman.txt" fi # Install the latest versions for any missing packages (if the specified version couldn't be installed). @@ -339,9 +358,9 @@ then while IFS=" " read pkg version do prefixed_pkg="$MINGW_PACKAGE_PREFIX-$pkg" - grep -qE "^$prefixed_pkg " pacman.txt || pkgs="$pkgs $prefixed_pkg" - done < deps.txt - rm -f pacman.txt deps.txt + grep -qE "^$prefixed_pkg " "$cache_dir/pacman.txt" || pkgs="$pkgs $prefixed_pkg" + done < "$cache_dir/deps.txt" + rm -f "$cache_dir/pacman.txt" "$cache_dir/deps.txt" yes | pacman -S --needed $pkgs if [ $? -ne 0 ] then @@ -357,7 +376,7 @@ then # Save build tag to skip this later. Doing it here (once everything is # in place) is important to avoid potential issues with retried builds. - echo "$BUILD_TAG" > "$buildtag_file" + save_buildtag "$MSYSTEM" else echo [-] Not installing dependencies again fi @@ -408,18 +427,18 @@ then echo [-] Merging app bundles [$merge_src] and [$arch_universal] into [$merge_dest] # Merge directory structures. - (cd "archive_tmp_universal/$merge_src.app" && find . -type d && cd "../../archive_tmp_universal/$arch_universal.app" && find . -type d && cd ../..) | sort > universal_listing.txt - cat universal_listing.txt | uniq | while IFS= read line + (cd "archive_tmp_universal/$merge_src.app" && find . -type d && cd "../../archive_tmp_universal/$arch_universal.app" && find . -type d && cd ../..) | sort > "$cache_dir/universal_listing.txt" + cat "$cache_dir/universal_listing.txt" | uniq | while IFS= read line do echo "> Directory: $line" mkdir -p "archive_tmp_universal/$merge_dest.app/$line" done # Create merged file listing. - (cd "archive_tmp_universal/$merge_src.app" && find . -type f && cd "../../archive_tmp_universal/$arch_universal.app" && find . -type f && cd ../..) | sort > universal_listing.txt + (cd "archive_tmp_universal/$merge_src.app" && find . -type f && cd "../../archive_tmp_universal/$arch_universal.app" && find . -type f && cd ../..) | sort > "$cache_dir/universal_listing.txt" # Copy files that only exist on one bundle. - cat universal_listing.txt | uniq -u | while IFS= read line + cat "$cache_dir/universal_listing.txt" | uniq -u | while IFS= read line do if [ -e "archive_tmp_universal/$merge_src.app/$line" ] then @@ -432,7 +451,7 @@ then done # Copy or lipo files that exist on both bundles. - cat universal_listing.txt | uniq -d | while IFS= read line + cat "$cache_dir/universal_listing.txt" | uniq -d | while IFS= read line do if cmp -s "archive_tmp_universal/$merge_src.app/$line" "archive_tmp_universal/$arch_universal.app/$line" then @@ -448,8 +467,8 @@ then done # Merge symlinks. - (cd "archive_tmp_universal/$merge_src.app" && find . -type l && cd "../../archive_tmp_universal/$arch_universal.app" && find . -type l && cd ../..) | sort > universal_listing.txt - cat universal_listing.txt | uniq | while IFS= read line + (cd "archive_tmp_universal/$merge_src.app" && find . -type l && cd "../../archive_tmp_universal/$arch_universal.app" && find . -type l && cd ../..) | sort > "$cache_dir/universal_listing.txt" + cat "$cache_dir/universal_listing.txt" | uniq | while IFS= read line do # Get symlink destinations. other_link_dest= @@ -544,8 +563,7 @@ then export PATH="$macports/bin:$macports/sbin:$macports/libexec/qt5/bin:$PATH" # Install dependencies only if we're in a new build and/or architecture. - buildtag_file="$cache_dir/buildtag.$(arch)" - if [ -z "$BUILD_TAG" -o "$(cat "$buildtag_file" 2> /dev/null)" != "$BUILD_TAG" ] + if check_buildtag "$(arch)" then # Install dependencies. echo [-] Installing dependencies through MacPorts @@ -554,7 +572,7 @@ then # Save build tag to skip this later. Doing it here (once everything is # in place) is important to avoid potential issues with retried builds. - echo "$BUILD_TAG" > "$buildtag_file" + save_buildtag "$(arch)" else echo [-] Not installing dependencies again @@ -572,7 +590,6 @@ else esac # Establish general dependencies. - buildtag_aptupdate_file="$cache_dir/buildtag.aptupdate" pkgs="cmake ninja-build pkg-config git wget p7zip-full wayland-protocols tar gzip file appstream" if [ "$(dpkg --print-architecture)" = "$arch_deb" ] then @@ -584,7 +601,7 @@ else sudo dpkg --add-architecture "$arch_deb" # Force an apt-get update. - rm -f "$buildtag_aptupdate_file" + save_buildtag aptupdate "arch_$arch_deb" fi pkgs="$pkgs crossbuild-essential-$arch_deb" @@ -645,25 +662,24 @@ EOF strip_binary="$arch_triplet-strip" # Install dependencies only if we're in a new build and/or architecture. - buildtag_file="$cache_dir/buildtag.$arch_deb" - if [ -z "$BUILD_TAG" -o "$(cat "$buildtag_file" 2> /dev/null)" != "$BUILD_TAG" ] + if check_buildtag "$arch_deb" then # Install or update dependencies. echo [-] Installing dependencies through apt - if [ -z "$BUILD_TAG" -o "$(cat "$buildtag_aptupdate_file" 2> /dev/null)" != "$BUILD_TAG" ] + if check_buildtag aptupdate then sudo apt-get update # Save build tag to skip apt-get update later, unless a new architecture - # is added to dpkg, in which case, this saved tag file gets removed. - echo "$BUILD_TAG" > "$buildtag_aptupdate_file" + # is added to dpkg, in which case, this saved tag file gets replaced. + save_buildtag aptupdate fi DEBIAN_FRONTEND=noninteractive sudo apt-get -y install $pkgs $libpkgs sudo apt-get clean # Save build tag to skip this later. Doing it here (once everything is # in place) is important to avoid potential issues with retried builds. - echo "$BUILD_TAG" > "$buildtag_file" + save_buildtag "$arch_deb" else echo [-] Not installing dependencies again fi @@ -724,8 +740,7 @@ fi # Download Discord Game SDK from their CDN if we're in a new build. discord_zip="$cache_dir/discord_game_sdk.zip" -buildtag_file="$cache_dir/buildtag.any" -if [ -z "$BUILD_TAG" -o "$(cat "$buildtag_file" 2> /dev/null)" != "$BUILD_TAG" ] +if check_buildtag discord then # Download file. echo [-] Downloading Discord Game SDK @@ -738,7 +753,7 @@ then else # Save build tag to skip this later. Doing it here (once everything is # in place) is important to avoid potential issues with retried builds. - echo "$BUILD_TAG" > "$buildtag_file" + save_buildtag discord fi else echo [-] Not downloading Discord Game SDK again From 681127e521e95d833b50c4d5978f24e3e4ea3ab5 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Sun, 24 Jul 2022 14:25:24 -0300 Subject: [PATCH 149/386] Jenkins: Speed optimizations for library builds on Linux --- .ci/build.sh | 42 ++++++++++++++++++++---------------------- 1 file changed, 20 insertions(+), 22 deletions(-) diff --git a/.ci/build.sh b/.ci/build.sh index 2c81248e8..3ac28eb8a 100644 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -833,21 +833,21 @@ then fi else cwd_root="$(pwd)" + check_buildtag "libs.$arch_deb" if grep -q "OPENAL:BOOL=ON" build/CMakeCache.txt then # Build openal-soft 1.21.1 manually to fix audio issues. This is a temporary # workaround until a newer version of openal-soft trickles down to Debian repos. prefix="$cache_dir/openal-soft-1.21.1" - if [ -d "$prefix" ] + if [ ! -d "$prefix" ] then - rm -rf "$prefix/build" - else wget -qO - https://github.com/kcat/openal-soft/archive/refs/tags/1.21.1.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix" fi - cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$cwd_root/toolchain.cmake" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix/build" || exit 99 - cmake --build "$prefix/build" -j$(nproc) || exit 99 - cmake --install "$prefix/build" || exit 99 + prefix_build="$prefix/build-$arch_deb" + cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$cwd_root/toolchain.cmake" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99 + cmake --build "$prefix_build" -j$(nproc) || exit 99 + cmake --install "$prefix_build" || exit 99 # Build SDL2 without sound systems. sdl_ss=OFF @@ -855,15 +855,14 @@ else # Build FAudio 22.03 manually to remove the dependency on GStreamer. This is a temporary # workaround until a newer version of FAudio trickles down to Debian repos. prefix="$cache_dir/FAudio-22.03" - if [ -d "$prefix" ] + if [ ! -d "$prefix" ] then - rm -rf "$prefix/build" - else wget -qO - https://github.com/FNA-XNA/FAudio/archive/refs/tags/22.03.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix" fi - cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$cwd_root/toolchain.cmake" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix/build" || exit 99 - cmake --build "$prefix/build" -j$(nproc) || exit 99 - cmake --install "$prefix/build" || exit 99 + prefix_build="$prefix/build-$arch_deb" + cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$cwd_root/toolchain.cmake" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99 + cmake --build "$prefix_build" -j$(nproc) || exit 99 + cmake --install "$prefix_build" || exit 99 # Build SDL2 with sound systems. sdl_ss=ON @@ -875,15 +874,14 @@ else # Build rtmidi without JACK support to remove the dependency on libjack. prefix="$cache_dir/rtmidi-4.0.0" - if [ -d "$prefix" ] + if [ ! -d "$prefix" ] then - rm -rf "$prefix/build" - else wget -qO - https://github.com/thestk/rtmidi/archive/refs/tags/4.0.0.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix" fi - cmake -G Ninja -D RTMIDI_API_JACK=OFF -D "CMAKE_TOOLCHAIN_FILE=$cwd_root/toolchain.cmake" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix/build" || exit 99 - cmake --build "$prefix/build" -j$(nproc) || exit 99 - cmake --install "$prefix/build" || exit 99 + prefix_build="$prefix/build-$arch_deb" + cmake -G Ninja -D RTMIDI_API_JACK=OFF -D "CMAKE_TOOLCHAIN_FILE=$cwd_root/toolchain.cmake" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99 + cmake --build "$prefix_build" -j$(nproc) || exit 99 + cmake --install "$prefix_build" || exit 99 # Build SDL2 for joystick and FAudio support, with most components # disabled to remove the dependencies on PulseAudio and libdrm. @@ -892,7 +890,7 @@ else then wget -qO - https://www.libsdl.org/release/SDL2-2.0.20.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix" fi - rm -rf "$cache_dir/sdlbuild" + prefix_build="$cache_dir/SDL2-2.0.20-build-$arch_deb" cmake -G Ninja -D SDL_SHARED=ON -D SDL_STATIC=OFF \ \ -D SDL_AUDIO=$sdl_ss -D SDL_DUMMYAUDIO=$sdl_ss -D SDL_DISKAUDIO=OFF -D SDL_OSS=OFF -D SDL_ALSA=$sdl_ss -D SDL_ALSA_SHARED=$sdl_ss \ @@ -911,9 +909,9 @@ else -D SDL_LOADSO=ON -D SDL_CPUINFO=ON -D SDL_FILESYSTEM=$sdl_ui -D SDL_DLOPEN=OFF -D SDL_SENSOR=OFF -D SDL_LOCALE=OFF \ \ -D "CMAKE_TOOLCHAIN_FILE=$cwd_root/toolchain.cmake" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" \ - -S "$prefix" -B "$cache_dir/sdlbuild" || exit 99 - cmake --build "$cache_dir/sdlbuild" -j$(nproc) || exit 99 - cmake --install "$cache_dir/sdlbuild" || exit 99 + -S "$prefix" -B "$prefix_build" || exit 99 + cmake --build "$prefix_build" -j$(nproc) || exit 99 + cmake --install "$prefix_build" || exit 99 # Archive Discord Game SDK library. 7z e -y -o"archive_tmp/usr/lib" "$discord_zip" "lib/$arch_discord/discord_game_sdk.so" From 80e547000673b1f8f9804a3cacbe5dc934077493 Mon Sep 17 00:00:00 2001 From: ts-korhonen Date: Mon, 25 Jul 2022 14:13:30 +0300 Subject: [PATCH 150/386] Fix crash at exit due to a unreleased mutex. Qt startblit() and endblit() use a mutex that can remain locked at exit. A thread static wrapper makes sure that each thread using the mutex will also release it before terminating. --- src/qt/qt_platform.cpp | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/qt/qt_platform.cpp b/src/qt/qt_platform.cpp index eff022b3d..89ead7acd 100644 --- a/src/qt/qt_platform.cpp +++ b/src/qt/qt_platform.cpp @@ -54,6 +54,7 @@ QElapsedTimer elapsed_timer; static std::atomic_int blitmx_contention = 0; static std::recursive_mutex blitmx; +static thread_local std::unique_lock blit_lock { blitmx, std::defer_lock }; class CharPointer { public: @@ -468,17 +469,17 @@ void dynld_close(void *handle) void startblit() { blitmx_contention++; - if (blitmx.try_lock()) { + if (blit_lock.try_lock()) { return; } - blitmx.lock(); + blit_lock.lock(); } void endblit() { blitmx_contention--; - blitmx.unlock(); + blit_lock.unlock(); if (blitmx_contention > 0) { // a deadlock has been observed on linux when toggling via video_toggle_option // because the mutex is typically unfair on linux From 808337aac32d83eaa140791b7bdb05f91f7d5885 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Mon, 25 Jul 2022 20:24:31 +0200 Subject: [PATCH 151/386] OPL: add the faster YMFM cores This refactors the OPL interface in two drivers : Nuked and YMFM Nuked is used by default, YMFM can be enabled with [Sound] fm_driver = ymfm --- src/86box.c | 1 + src/chipset/via_pipc.c | 14 +- src/config.c | 10 + src/include/86box/86box.h | 2 +- src/include/86box/snd_opl.h | 62 ++--- src/include/86box/snd_opl_nuked.h | 10 - src/include/86box/snd_sb.h | 2 +- src/include/86box/timer.h | 8 + src/sound/CMakeLists.txt | 5 +- src/sound/snd_adlib.c | 35 ++- src/sound/snd_adlibgold.c | 24 +- src/sound/snd_azt2316a.c | 8 +- src/sound/snd_cmi8x38.c | 28 +-- src/sound/snd_cs423x.c | 21 +- src/sound/snd_opl.c | 301 +++-------------------- src/sound/snd_opl_nuked.c | 283 ++++++++++++++++++++-- src/sound/snd_opl_ymfm.cpp | 387 ++++++++++++++++++++++++++++++ src/sound/snd_pas16.c | 14 +- src/sound/snd_sb.c | 277 ++++++++++----------- src/sound/snd_wss.c | 30 +-- src/sound/ymfm/CMakeLists.txt | 2 +- src/win/Makefile.mingw | 6 +- 22 files changed, 975 insertions(+), 555 deletions(-) create mode 100644 src/sound/snd_opl_ymfm.cpp diff --git a/src/86box.c b/src/86box.c index cb9fa52a7..f6b791901 100644 --- a/src/86box.c +++ b/src/86box.c @@ -183,6 +183,7 @@ int confirm_exit = 1; /* (C) enable exit confirmation */ int confirm_save = 1; /* (C) enable save confirmation */ int enable_discord = 0; /* (C) enable Discord integration */ int pit_mode = -1; /* (C) force setting PIT mode */ +int fm_driver = 0; /* (C) select FM sound driver */ /* Statistics. */ extern int mmuflush; diff --git a/src/chipset/via_pipc.c b/src/chipset/via_pipc.c index bcb54130f..b8c06b9f4 100644 --- a/src/chipset/via_pipc.c +++ b/src/chipset/via_pipc.c @@ -760,7 +760,7 @@ pipc_fm_read(uint16_t addr, void *priv) uint8_t ret = 0x00; #else pipc_t *dev = (pipc_t *) priv; - uint8_t ret = opl3_read(addr, &dev->sb->opl); + uint8_t ret = dev->sb->opl.read(addr, dev->sb->opl.priv); #endif pipc_log("PIPC: fm_read(%02X) = %02X\n", addr & 0x03, ret); @@ -794,7 +794,7 @@ pipc_fm_write(uint16_t addr, uint8_t val, void *priv) } } #else - opl3_write(addr, val, &dev->sb->opl); + dev->sb->opl.write(addr, val, dev->sb->opl.priv); #endif } @@ -807,22 +807,22 @@ pipc_sb_handlers(pipc_t *dev, uint8_t modem) sb_dsp_setaddr(&dev->sb->dsp, 0); if (dev->sb_base) { - io_removehandler(dev->sb_base, 4, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &dev->sb->opl); - io_removehandler(dev->sb_base + 8, 2, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &dev->sb->opl); + io_removehandler(dev->sb_base, 4, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); + io_removehandler(dev->sb_base + 8, 2, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); io_removehandler(dev->sb_base + 4, 2, sb_ct1345_mixer_read, NULL, NULL, sb_ct1345_mixer_write, NULL, NULL, dev->sb); } mpu401_change_addr(dev->sb->mpu, 0); mpu401_setirq(dev->sb->mpu, 0); - io_removehandler(0x388, 4, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &dev->sb->opl); + io_removehandler(0x388, 4, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); if (dev->ac97_regs[0][0x42] & 0x01) { dev->sb_base = 0x220 + (0x20 * (dev->ac97_regs[0][0x43] & 0x03)); sb_dsp_setaddr(&dev->sb->dsp, dev->sb_base); if (dev->ac97_regs[0][0x42] & 0x04) { - io_sethandler(dev->sb_base, 4, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &dev->sb->opl); - io_sethandler(dev->sb_base + 8, 2, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &dev->sb->opl); + io_sethandler(dev->sb_base, 4, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); + io_sethandler(dev->sb_base + 8, 2, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); } io_sethandler(dev->sb_base + 4, 2, sb_ct1345_mixer_read, NULL, NULL, sb_ct1345_mixer_write, NULL, NULL, dev->sb); diff --git a/src/config.c b/src/config.c index 8554dcc7a..81bbc016f 100644 --- a/src/config.c +++ b/src/config.c @@ -68,6 +68,7 @@ #include <86box/plat.h> #include <86box/plat_dir.h> #include <86box/ui.h> +#include <86box/snd_opl.h> typedef struct _list_ { @@ -1110,6 +1111,13 @@ load_sound(void) sound_is_float = 1; else sound_is_float = 0; + + p = config_get_string(cat, "fm_driver", "nuked"); + if (!strcmp(p, "ymfm")) { + fm_driver = FM_DRV_YMFM; + } else { + fm_driver = FM_DRV_NUKED; + } } /* Load "Network" section. */ @@ -2630,6 +2638,8 @@ save_sound(void) else config_set_string(cat, "sound_type", (sound_is_float == 1) ? "float" : "int16"); + config_set_string(cat, "fm_driver", (fm_driver == FM_DRV_NUKED) ? "nuked" : "ymfm"); + delete_section_if_empty(cat); } diff --git a/src/include/86box/86box.h b/src/include/86box/86box.h index 86fe740c9..3d2806ce7 100644 --- a/src/include/86box/86box.h +++ b/src/include/86box/86box.h @@ -136,7 +136,7 @@ extern int is_pentium; /* TODO: Move back to cpu/cpu.h when it's figured out, extern int fixed_size_x, fixed_size_y; extern double mouse_sensitivity; /* (C) Mouse sensitivity scale */ extern int pit_mode; /* (C) force setting PIT mode */ - +extern int fm_driver; /* (C) select FM sound driver */ extern char exe_path[2048]; /* path (dir) of executable */ extern char usr_path[1024]; /* path (dir) of user data */ diff --git a/src/include/86box/snd_opl.h b/src/include/86box/snd_opl.h index ac8eef6fd..a2e8dd521 100644 --- a/src/include/86box/snd_opl.h +++ b/src/include/86box/snd_opl.h @@ -17,38 +17,40 @@ #ifndef SOUND_OPL_H #define SOUND_OPL_H -typedef void (*tmrfunc)(void *priv, int timer, uint64_t period); +enum fm_type { + FM_YM3812 = 0, + FM_YMF262, + FM_YMF289B, + FM_MAX +}; + +enum fm_driver { + FM_DRV_NUKED = 0, + FM_DRV_YMFM, + FM_DRV_MAX +}; -/* Define an OPLx chip. */ typedef struct { -#ifdef SOUND_OPL_NUKED_H - nuked_t *opl; -#else - void *opl; + uint8_t (*read)(uint16_t port, void *priv); + void (*write)(uint16_t port, uint8_t val, void *priv); + int32_t * (*update)(void *priv); + void (*reset_buffer)(void *priv); + void (*set_do_cycles)(void *priv, int8_t do_cycles); + void *priv; +} fm_drv_t; + +extern uint8_t fm_driver_get(int chip_id, fm_drv_t *drv); + +extern const fm_drv_t nuked_opl_drv; +extern const fm_drv_t ymfm_drv; + +#ifdef EMU_DEVICE_H +extern const device_t ym3812_nuked_device; +extern const device_t ymf262_nuked_device; + +extern const device_t ym3812_ymfm_device; +extern const device_t ymf262_ymfm_device; +extern const device_t ymf289b_ymfm_device; #endif - int8_t flags, pad; - - uint16_t port; - uint8_t status, timer_ctrl; - uint16_t timer_count[2], - timer_cur_count[2]; - - pc_timer_t timers[2]; - - int pos; - int32_t buffer[SOUNDBUFLEN * 2]; -} opl_t; - -extern void opl_set_do_cycles(opl_t *dev, int8_t do_cycles); - -extern uint8_t opl2_read(uint16_t port, void *); -extern void opl2_write(uint16_t port, uint8_t val, void *); -extern void opl2_init(opl_t *); -extern void opl2_update(opl_t *); - -extern uint8_t opl3_read(uint16_t port, void *); -extern void opl3_write(uint16_t port, uint8_t val, void *); -extern void opl3_init(opl_t *); -extern void opl3_update(opl_t *); #endif /*SOUND_OPL_H*/ diff --git a/src/include/86box/snd_opl_nuked.h b/src/include/86box/snd_opl_nuked.h index af65d266b..93ea4ba35 100644 --- a/src/include/86box/snd_opl_nuked.h +++ b/src/include/86box/snd_opl_nuked.h @@ -20,15 +20,5 @@ #ifndef SOUND_OPL_NUKED_H #define SOUND_OPL_NUKED_H -extern void *nuked_init(uint32_t sample_rate); -extern void nuked_close(void *); - -extern uint16_t nuked_write_addr(void *, uint16_t port, uint8_t val); -extern void nuked_write_reg(void *, uint16_t reg, uint8_t v); -extern void nuked_write_reg_buffered(void *, uint16_t reg, uint8_t v); - -extern void nuked_generate(void *, int32_t *buf); -extern void nuked_generate_resampled(void *, int32_t *buf); -extern void nuked_generate_stream(void *, int32_t *sndptr, uint32_t num); #endif /*SOUND_OPL_NUKED_H*/ diff --git a/src/include/86box/snd_sb.h b/src/include/86box/snd_sb.h index bf0b437b0..bf44d4d6d 100644 --- a/src/include/86box/snd_sb.h +++ b/src/include/86box/snd_sb.h @@ -129,7 +129,7 @@ typedef struct sb_t { opl_enabled, mixer_enabled; cms_t cms; - opl_t opl, + fm_drv_t opl, opl2; sb_dsp_t dsp; union { diff --git a/src/include/86box/timer.h b/src/include/86box/timer.h index 63ca8965b..afbcec140 100644 --- a/src/include/86box/timer.h +++ b/src/include/86box/timer.h @@ -56,6 +56,10 @@ typedef struct pc_timer_t struct pc_timer_t *prev, *next; } pc_timer_t; +#ifdef __cplusplus +extern "C" { +#endif + /*Timestamp of nearest enabled timer. CPU emulation must call timer_process() when TSC matches or exceeds this.*/ extern uint32_t timer_target; @@ -237,4 +241,8 @@ timer_process_inline(void) timer_target = timer_head->ts.ts32.integer; } +#ifdef __cplusplus +} +#endif + #endif /*_TIMER_H_*/ diff --git a/src/sound/CMakeLists.txt b/src/sound/CMakeLists.txt index c0aaa2790..581f8d517 100644 --- a/src/sound/CMakeLists.txt +++ b/src/sound/CMakeLists.txt @@ -13,7 +13,7 @@ # Copyright 2020,2021 David Hrdlička. # -add_library(snd OBJECT sound.c snd_opl.c snd_opl_nuked.c snd_resid.cc +add_library(snd OBJECT sound.c snd_opl.c snd_opl_nuked.c snd_opl_ymfm.cpp snd_resid.cc midi.c snd_speaker.c snd_pssj.c snd_lpt_dac.c snd_ac97_codec.c snd_ac97_via.c snd_lpt_dss.c snd_ps1.c snd_adlib.c snd_adlibgold.c snd_ad1848.c snd_audiopci.c snd_azt2316a.c snd_cms.c snd_cmi8x38.c snd_cs423x.c snd_gus.c snd_sb.c snd_sb_dsp.c @@ -105,6 +105,9 @@ if(MUNT) endif() endif() +add_subdirectory(ymfm) +target_link_libraries(86Box ymfm) + if(PAS16) target_compile_definitions(snd PRIVATE USE_PAS16) target_sources(snd PRIVATE snd_pas16.c) diff --git a/src/sound/snd_adlib.c b/src/sound/snd_adlib.c index 1592131d0..d4bc1e3ca 100644 --- a/src/sound/snd_adlib.c +++ b/src/sound/snd_adlib.c @@ -33,7 +33,7 @@ adlib_log(const char *fmt, ...) #endif typedef struct adlib_t { - opl_t opl; + fm_drv_t opl; uint8_t pos_regs[8]; } adlib_t; @@ -44,12 +44,12 @@ adlib_get_buffer(int32_t *buffer, int len, void *p) adlib_t *adlib = (adlib_t *) p; int c; - opl2_update(&adlib->opl); + int32_t *opl_buf = adlib->opl.update(adlib->opl.priv); for (c = 0; c < len * 2; c++) - buffer[c] += (int32_t) adlib->opl.buffer[c]; + buffer[c] += (int32_t) opl_buf[c]; - adlib->opl.pos = 0; + adlib->opl.reset_buffer(adlib->opl.priv); } uint8_t @@ -76,14 +76,14 @@ adlib_mca_write(int port, uint8_t val, void *p) case 0x102: if ((adlib->pos_regs[2] & 1) && !(val & 1)) io_removehandler(0x0388, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &adlib->opl); + adlib->opl.read, NULL, NULL, + adlib->opl.write, NULL, NULL, + adlib->opl.priv); if (!(adlib->pos_regs[2] & 1) && (val & 1)) io_sethandler(0x0388, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &adlib->opl); + adlib->opl.read, NULL, NULL, + adlib->opl.write, NULL, NULL, + adlib->opl.priv); break; } adlib->pos_regs[port & 7] = val; @@ -104,11 +104,11 @@ adlib_init(const device_t *info) memset(adlib, 0, sizeof(adlib_t)); adlib_log("adlib_init\n"); - opl2_init(&adlib->opl); + fm_driver_get(FM_YM3812, &adlib->opl); io_sethandler(0x0388, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &adlib->opl); + adlib->opl.read, NULL, NULL, + adlib->opl.write, NULL, NULL, + adlib->opl.priv); sound_add_handler(adlib_get_buffer, adlib); return adlib; } @@ -119,9 +119,9 @@ adlib_mca_init(const device_t *info) adlib_t *adlib = adlib_init(info); io_removehandler(0x0388, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &adlib->opl); + adlib->opl.read, NULL, NULL, + adlib->opl.write, NULL, NULL, + adlib->opl.priv); mca_add(adlib_mca_read, adlib_mca_write, adlib_mca_feedb, @@ -137,7 +137,6 @@ void adlib_close(void *p) { adlib_t *adlib = (adlib_t *) p; - free(adlib); } diff --git a/src/sound/snd_adlibgold.c b/src/sound/snd_adlibgold.c index 652c672e2..0e504065b 100644 --- a/src/sound/snd_adlibgold.c +++ b/src/sound/snd_adlibgold.c @@ -54,7 +54,7 @@ typedef struct adgold_t { int voice_count[2], voice_latch[2]; } adgold_mma; - opl_t opl; + fm_drv_t opl; ym7128_t ym7128; int fm_vol_l, fm_vol_r; @@ -194,7 +194,7 @@ adgold_write(uint16_t addr, uint8_t val, void *p) switch (addr & 7) { case 0: case 1: - opl3_write(addr, val, &adgold->opl); + adgold->opl.write(addr, val, adgold->opl.priv); break; case 2: @@ -209,7 +209,7 @@ adgold_write(uint16_t addr, uint8_t val, void *p) if (adgold->adgold_38x_state) /*Write to control chip*/ adgold->adgold_38x_addr = val; else - opl3_write(addr, val, &adgold->opl); + adgold->opl.write(addr, val, adgold->opl.priv); break; case 3: if (adgold->adgold_38x_state) { @@ -275,7 +275,7 @@ adgold_write(uint16_t addr, uint8_t val, void *p) break; } } else - opl3_write(addr, val, &adgold->opl); + adgold->opl.write(addr, val, adgold->opl.priv); break; case 4: case 6: @@ -501,14 +501,14 @@ adgold_read(uint16_t addr, void *p) switch (addr & 7) { case 0: case 1: - temp = opl3_read(addr, &adgold->opl); + temp = adgold->opl.read(addr, adgold->opl.priv); break; case 2: if (adgold->adgold_38x_state) /*Read from control chip*/ temp = adgold->adgold_status; else - temp = opl3_read(addr, &adgold->opl); + temp = adgold->opl.read(addr, adgold->opl.priv); break; case 3: @@ -527,7 +527,7 @@ adgold_read(uint16_t addr, void *p) temp = adgold->adgold_38x_regs[adgold->adgold_38x_addr]; } } else - temp = opl3_read(addr, &adgold->opl); + temp = adgold->opl.read(addr, adgold->opl.priv); break; case 4: @@ -713,13 +713,13 @@ adgold_get_buffer(int32_t *buffer, int len, void *p) int c; - opl3_update(&adgold->opl); + int32_t *opl_buf = adgold->opl.update(adgold->opl.priv); adgold_update(adgold); for (c = 0; c < len * 2; c += 2) { - adgold_buffer[c] = ((adgold->opl.buffer[c] * adgold->fm_vol_l) >> 7) / 2; + adgold_buffer[c] = ((opl_buf[c] * adgold->fm_vol_l) >> 7) / 2; adgold_buffer[c] += ((adgold->mma_buffer[0][c >> 1] * adgold->samp_vol_l) >> 7) / 4; - adgold_buffer[c + 1] = ((adgold->opl.buffer[c + 1] * adgold->fm_vol_r) >> 7) / 2; + adgold_buffer[c + 1] = ((opl_buf[c + 1] * adgold->fm_vol_r) >> 7) / 2; adgold_buffer[c + 1] += ((adgold->mma_buffer[1][c >> 1] * adgold->samp_vol_r) >> 7) / 4; } @@ -808,7 +808,7 @@ adgold_get_buffer(int32_t *buffer, int len, void *p) buffer[c + 1] += temp; } - adgold->opl.pos = 0; + adgold->opl.reset_buffer(adgold->opl.priv); adgold->pos = 0; free(adgold_buffer); @@ -881,7 +881,7 @@ adgold_init(const device_t *info) adgold->gameport_enabled = device_get_config_int("gameport"); - opl3_init(&adgold->opl); + fm_driver_get(FM_YMF262, &adgold->opl); if (adgold->surround_enabled) ym7128_init(&adgold->ym7128); diff --git a/src/sound/snd_azt2316a.c b/src/sound/snd_azt2316a.c index a72e1dbe5..890734450 100644 --- a/src/sound/snd_azt2316a.c +++ b/src/sound/snd_azt2316a.c @@ -1149,7 +1149,7 @@ azt_init(const device_t *info) azt2316a->sb->dsp.azt_eeprom[i] = read_eeprom[i]; if (azt2316a->sb->opl_enabled) - opl3_init(&azt2316a->sb->opl); + fm_driver_get(FM_YMF262, &azt2316a->sb->opl); sb_dsp_init(&azt2316a->sb->dsp, SBPRO2, azt2316a->type, azt2316a); sb_dsp_setaddr(&azt2316a->sb->dsp, azt2316a->cur_addr); @@ -1158,9 +1158,9 @@ azt_init(const device_t *info) sb_ct1345_mixer_reset(azt2316a->sb); /* DSP I/O handler is activated in sb_dsp_setaddr */ if (azt2316a->sb->opl_enabled) { - io_sethandler(azt2316a->cur_addr + 0, 0x0004, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &azt2316a->sb->opl); - io_sethandler(azt2316a->cur_addr + 8, 0x0002, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &azt2316a->sb->opl); - io_sethandler(0x0388, 0x0004, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &azt2316a->sb->opl); + io_sethandler(azt2316a->cur_addr + 0, 0x0004, azt2316a->sb->opl.read, NULL, NULL, azt2316a->sb->opl.write, NULL, NULL, azt2316a->sb->opl.priv); + io_sethandler(azt2316a->cur_addr + 8, 0x0002, azt2316a->sb->opl.read, NULL, NULL, azt2316a->sb->opl.write, NULL, NULL, azt2316a->sb->opl.priv); + io_sethandler(0x0388, 0x0004, azt2316a->sb->opl.read, NULL, NULL, azt2316a->sb->opl.write, NULL, NULL, azt2316a->sb->opl.priv); } io_sethandler(azt2316a->cur_addr + 4, 0x0002, sb_ct1345_mixer_read, NULL, NULL, sb_ct1345_mixer_write, NULL, NULL, azt2316a->sb); diff --git a/src/sound/snd_cmi8x38.c b/src/sound/snd_cmi8x38.c index 4ce76508e..d4a54880b 100644 --- a/src/sound/snd_cmi8x38.c +++ b/src/sound/snd_cmi8x38.c @@ -473,10 +473,10 @@ static void cmi8x38_remap_sb(cmi8x38_t *dev) { if (dev->sb_base) { - io_removehandler(dev->sb_base, 0x0004, opl3_read, NULL, NULL, - opl3_write, NULL, NULL, &dev->sb->opl); - io_removehandler(dev->sb_base + 8, 0x0002, opl3_read, NULL, NULL, - opl3_write, NULL, NULL, &dev->sb->opl); + io_removehandler(dev->sb_base, 0x0004, dev->sb->opl.read, NULL, NULL, + dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); + io_removehandler(dev->sb_base + 8, 0x0002, dev->sb->opl.read, NULL, NULL, + dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); io_removehandler(dev->sb_base + 4, 0x0002, cmi8x38_sb_mixer_read, NULL, NULL, cmi8x38_sb_mixer_write, NULL, NULL, dev); @@ -493,10 +493,10 @@ cmi8x38_remap_sb(cmi8x38_t *dev) cmi8x38_log("CMI8x38: remap_sb(%04X)\n", dev->sb_base); if (dev->sb_base) { - io_sethandler(dev->sb_base, 0x0004, opl3_read, NULL, NULL, - opl3_write, NULL, NULL, &dev->sb->opl); - io_sethandler(dev->sb_base + 8, 0x0002, opl3_read, NULL, NULL, - opl3_write, NULL, NULL, &dev->sb->opl); + io_sethandler(dev->sb_base, 0x0004, dev->sb->opl.read, NULL, NULL, + dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); + io_sethandler(dev->sb_base + 8, 0x0002, dev->sb->opl.read, NULL, NULL, + dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); io_sethandler(dev->sb_base + 4, 0x0002, cmi8x38_sb_mixer_read, NULL, NULL, cmi8x38_sb_mixer_write, NULL, NULL, dev); @@ -508,8 +508,8 @@ static void cmi8x38_remap_opl(cmi8x38_t *dev) { if (dev->opl_base) { - io_removehandler(dev->opl_base, 0x0004, opl3_read, NULL, NULL, - opl3_write, NULL, NULL, &dev->sb->opl); + io_removehandler(dev->opl_base, 0x0004, dev->sb->opl.read, NULL, NULL, + dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); } dev->opl_base = (dev->type == CMEDIA_CMI8338) ? 0x388 : opl_ports_cmi8738[dev->io_regs[0x17] & 0x03]; @@ -520,8 +520,8 @@ cmi8x38_remap_opl(cmi8x38_t *dev) cmi8x38_log("CMI8x38: remap_opl(%04X)\n", dev->opl_base); if (dev->opl_base) { - io_sethandler(dev->opl_base, 0x0004, opl3_read, NULL, NULL, - opl3_write, NULL, NULL, &dev->sb->opl); + io_sethandler(dev->opl_base, 0x0004, dev->sb->opl.read, NULL, NULL, + dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); } } @@ -593,7 +593,7 @@ cmi8x38_read(uint16_t addr, void *priv) if (dev->type == CMEDIA_CMI8338) goto io_reg; else - ret = opl3_read(addr, &dev->sb->opl); + ret = dev->sb->opl.read(addr, dev->sb->opl.priv); break; case 0x80: @@ -872,7 +872,7 @@ cmi8x38_write(uint16_t addr, uint8_t val, void *priv) case 0x50 ... 0x5f: if (dev->type != CMEDIA_CMI8338) - opl3_write(addr, val, &dev->sb->opl); + dev->sb->opl.write(addr, val, dev->sb->opl.priv); return; case 0x92: diff --git a/src/sound/snd_cs423x.c b/src/sound/snd_cs423x.c index 1f366e373..31f4e8e6c 100644 --- a/src/sound/snd_cs423x.c +++ b/src/sound/snd_cs423x.c @@ -505,18 +505,19 @@ cs423x_get_buffer(int32_t *buffer, int len, void *priv) { cs423x_t *dev = (cs423x_t *) priv; int c, opl_wss = dev->opl_wss; + int32_t *opl_buf = NULL; /* Output audio from the WSS codec, and also the OPL if we're in charge of it. */ ad1848_update(&dev->ad1848); if (opl_wss) - opl3_update(&dev->sb->opl); + opl_buf = dev->sb->opl.update(dev->sb->opl.priv); /* Don't output anything if the analog section is powered down. */ if (!(dev->indirect_regs[2] & 0xa4)) { for (c = 0; c < len * 2; c += 2) { if (opl_wss) { - buffer[c] += (dev->sb->opl.buffer[c] * dev->ad1848.fm_vol_l) >> 16; - buffer[c + 1] += (dev->sb->opl.buffer[c + 1] * dev->ad1848.fm_vol_r) >> 16; + buffer[c] += (opl_buf[c] * dev->ad1848.fm_vol_l) >> 16; + buffer[c + 1] += (opl_buf[c + 1] * dev->ad1848.fm_vol_r) >> 16; } buffer[c] += dev->ad1848.buffer[c] / 2; @@ -526,7 +527,7 @@ cs423x_get_buffer(int32_t *buffer, int len, void *priv) dev->ad1848.pos = 0; if (opl_wss) - dev->sb->opl.pos = 0; + dev->sb->opl.reset_buffer(dev->sb->opl.priv); } static void @@ -590,14 +591,14 @@ cs423x_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv } if (dev->opl_base) { - io_removehandler(dev->opl_base, 4, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &dev->sb->opl); + io_removehandler(dev->opl_base, 4, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); dev->opl_base = 0; } if (dev->sb_base) { sb_dsp_setaddr(&dev->sb->dsp, 0); - io_removehandler(dev->sb_base, 4, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &dev->sb->opl); - io_removehandler(dev->sb_base + 8, 2, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &dev->sb->opl); + io_removehandler(dev->sb_base, 4, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); + io_removehandler(dev->sb_base + 8, 2, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); io_removehandler(dev->sb_base + 4, 2, sb_ct1345_mixer_read, NULL, NULL, sb_ct1345_mixer_write, NULL, NULL, dev->sb); io_removehandler(dev->sb_base, 16, NULL, NULL, NULL, cs423x_ctxswitch_write, NULL, NULL, dev); dev->sb_base = 0; @@ -618,14 +619,14 @@ cs423x_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv if (config->io[1].base != ISAPNP_IO_DISABLED) { dev->opl_base = config->io[1].base; - io_sethandler(dev->opl_base, 4, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &dev->sb->opl); + io_sethandler(dev->opl_base, 4, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); } if (config->io[2].base != ISAPNP_IO_DISABLED) { dev->sb_base = config->io[2].base; sb_dsp_setaddr(&dev->sb->dsp, dev->sb_base); - io_sethandler(dev->sb_base, 4, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &dev->sb->opl); - io_sethandler(dev->sb_base + 8, 2, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &dev->sb->opl); + io_sethandler(dev->sb_base, 4, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); + io_sethandler(dev->sb_base + 8, 2, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); io_sethandler(dev->sb_base + 4, 2, sb_ct1345_mixer_read, NULL, NULL, sb_ct1345_mixer_write, NULL, NULL, dev->sb); io_sethandler(dev->sb_base, 16, NULL, NULL, NULL, cs423x_ctxswitch_write, NULL, NULL, dev); } diff --git a/src/sound/snd_opl.c b/src/sound/snd_opl.c index 6cba7b3e8..cce75bf39 100644 --- a/src/sound/snd_opl.c +++ b/src/sound/snd_opl.c @@ -28,285 +28,44 @@ #include "cpu.h" #include <86box/86box.h> +#include <86box/device.h> #include <86box/io.h> -#include <86box/timer.h> #include <86box/sound.h> #include <86box/snd_opl.h> -#include <86box/snd_opl_nuked.h> -enum { - FLAG_CYCLES = 0x02, - FLAG_OPL3 = 0x01 -}; - -enum { - STAT_TMR_OVER = 0x60, - STAT_TMR1_OVER = 0x40, - STAT_TMR2_OVER = 0x20, - STAT_TMR_ANY = 0x80 -}; - -enum { - CTRL_RESET = 0x80, - CTRL_TMR_MASK = 0x60, - CTRL_TMR1_MASK = 0x40, - CTRL_TMR2_MASK = 0x20, - CTRL_TMR2_START = 0x02, - CTRL_TMR1_START = 0x01 -}; - -#ifdef ENABLE_OPL_LOG -int opl_do_log = ENABLE_OPL_LOG; - -static void -opl_log(const char *fmt, ...) -{ - va_list ap; - - if (opl_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } -} -#else -# define opl_log(fmt, ...) -#endif - -static void -timer_tick(opl_t *dev, int tmr) -{ - dev->timer_cur_count[tmr] = (dev->timer_cur_count[tmr] + 1) & 0xff; - - opl_log("Ticking timer %i, count now %02X...\n", tmr, dev->timer_cur_count[tmr]); - - if (dev->timer_cur_count[tmr] == 0x00) { - dev->status |= ((STAT_TMR1_OVER >> tmr) & ~dev->timer_ctrl); - dev->timer_cur_count[tmr] = dev->timer_count[tmr]; - - opl_log("Count wrapped around to zero, reloading timer %i (%02X), status = %02X...\n", tmr, (STAT_TMR1_OVER >> tmr), dev->status); - } - - timer_on_auto(&dev->timers[tmr], (tmr == 1) ? 320.0 : 80.0); -} - -static void -timer_control(opl_t *dev, int tmr, int start) -{ - timer_on_auto(&dev->timers[tmr], 0.0); - - if (start) { - opl_log("Loading timer %i count: %02X = %02X\n", tmr, dev->timer_cur_count[tmr], dev->timer_count[tmr]); - dev->timer_cur_count[tmr] = dev->timer_count[tmr]; - if (dev->flags & FLAG_OPL3) - timer_tick(dev, tmr); /* Per the YMF 262 datasheet, OPL3 starts counting immediately, unlike OPL2. */ - else - timer_on_auto(&dev->timers[tmr], (tmr == 1) ? 320.0 : 80.0); - } else { - opl_log("Timer %i stopped\n", tmr); - if (tmr == 1) { - dev->status &= ~STAT_TMR2_OVER; - } else - dev->status &= ~STAT_TMR1_OVER; - } -} - -static void -timer_1(void *priv) -{ - opl_t *dev = (opl_t *) priv; - - timer_tick(dev, 0); -} - -static void -timer_2(void *priv) -{ - opl_t *dev = (opl_t *) priv; - - timer_tick(dev, 1); -} - -static uint8_t -opl_read(opl_t *dev, uint16_t port) -{ - uint8_t ret = 0xff; - - if ((port & 0x0003) == 0x0000) { - ret = dev->status; - if (dev->status & STAT_TMR_OVER) - ret |= STAT_TMR_ANY; - } - - opl_log("OPL statret = %02x, status = %02x\n", ret, dev->status); - - return ret; -} - -static void -opl_write(opl_t *dev, uint16_t port, uint8_t val) -{ - if ((port & 0x0001) == 0x0001) { - nuked_write_reg_buffered(dev->opl, dev->port, val); - - switch (dev->port) { - case 0x02: /* Timer 1 */ - dev->timer_count[0] = val; - opl_log("Timer 0 count now: %i\n", dev->timer_count[0]); - break; - - case 0x03: /* Timer 2 */ - dev->timer_count[1] = val; - opl_log("Timer 1 count now: %i\n", dev->timer_count[1]); - break; - - case 0x04: /* Timer control */ - if (val & CTRL_RESET) { - opl_log("Resetting timer status...\n"); - dev->status &= ~STAT_TMR_OVER; - } else { - dev->timer_ctrl = val; - timer_control(dev, 0, val & CTRL_TMR1_START); - timer_control(dev, 1, val & CTRL_TMR2_START); - opl_log("Status mask now %02X (val = %02X)\n", (val & ~CTRL_TMR_MASK) & CTRL_TMR_MASK, val); - } - break; - } - } else { - dev->port = nuked_write_addr(dev->opl, port, val) & 0x01ff; - - if (!(dev->flags & FLAG_OPL3)) - dev->port &= 0x00ff; - } -} - -void -opl_set_do_cycles(opl_t *dev, int8_t do_cycles) -{ - if (do_cycles) - dev->flags |= FLAG_CYCLES; - else - dev->flags &= ~FLAG_CYCLES; -} - -static void -opl_init(opl_t *dev, int is_opl3) -{ - memset(dev, 0x00, sizeof(opl_t)); - - dev->flags = FLAG_CYCLES; - if (is_opl3) - dev->flags |= FLAG_OPL3; - else - dev->status = 0x06; - - /* Create a NukedOPL object. */ - dev->opl = nuked_init(48000); - - timer_add(&dev->timers[0], timer_1, dev, 0); - timer_add(&dev->timers[1], timer_2, dev, 0); -} - -void -opl_close(opl_t *dev) -{ - /* Release the NukedOPL object. */ - if (dev->opl) { - nuked_close(dev->opl); - dev->opl = NULL; - } -} +static uint32_t fm_dev_inst[FM_DRV_MAX][FM_MAX]; uint8_t -opl2_read(uint16_t port, void *priv) -{ - opl_t *dev = (opl_t *) priv; +fm_driver_get(int chip_id, fm_drv_t *drv) { + switch (chip_id) { + case FM_YM3812: + if (fm_driver == FM_DRV_NUKED) { + *drv = nuked_opl_drv; + drv->priv = device_add_inst(&ym3812_nuked_device, fm_dev_inst[fm_driver][chip_id]++); + } else { + *drv = ymfm_drv; + drv->priv = device_add_inst(&ym3812_ymfm_device, fm_dev_inst[fm_driver][chip_id]++); + } + break; - if (dev->flags & FLAG_CYCLES) - cycles -= ((int) (isa_timing * 8)); + case FM_YMF262: + if (fm_driver == FM_DRV_NUKED) { + *drv = nuked_opl_drv; + drv->priv = device_add_inst(&ymf262_nuked_device, fm_dev_inst[fm_driver][chip_id]++); + } else { + *drv = ymfm_drv; + drv->priv = device_add_inst(&ymf262_ymfm_device, fm_dev_inst[fm_driver][chip_id]++); + } + break; - opl2_update(dev); - opl_log("OPL2 port read = %04x\n", port); + case FM_YMF289B: + *drv = ymfm_drv; + drv->priv = device_add_inst(&ymf289b_ymfm_device, fm_dev_inst[fm_driver][chip_id]++); + break; - return (opl_read(dev, port)); -} - -void -opl2_write(uint16_t port, uint8_t val, void *priv) -{ - opl_t *dev = (opl_t *) priv; - - opl2_update(dev); - - opl_log("OPL2 port write = %04x\n", port); - opl_write(dev, port, val); -} - -void -opl2_init(opl_t *dev) -{ - opl_init(dev, 0); -} - -void -opl2_update(opl_t *dev) -{ - if (dev->pos >= sound_pos_global) { - return; + default: + return 0; } - nuked_generate_stream(dev->opl, - &dev->buffer[dev->pos * 2], - sound_pos_global - dev->pos); - - for (; dev->pos < sound_pos_global; dev->pos++) { - dev->buffer[dev->pos * 2] /= 2; - dev->buffer[(dev->pos * 2) + 1] = dev->buffer[dev->pos * 2]; - } -} - -uint8_t -opl3_read(uint16_t port, void *priv) -{ - opl_t *dev = (opl_t *) priv; - - if (dev->flags & FLAG_CYCLES) - cycles -= ((int) (isa_timing * 8)); - - opl3_update(dev); - - return (opl_read(dev, port)); -} - -void -opl3_write(uint16_t port, uint8_t val, void *priv) -{ - opl_t *dev = (opl_t *) priv; - - opl3_update(dev); - - opl_write(dev, port, val); -} - -void -opl3_init(opl_t *dev) -{ - opl_init(dev, 1); -} - -/* API to sound interface. */ -void -opl3_update(opl_t *dev) -{ - if (dev->pos >= sound_pos_global) - return; - - nuked_generate_stream(dev->opl, - &dev->buffer[dev->pos * 2], - sound_pos_global - dev->pos); - - for (; dev->pos < sound_pos_global; dev->pos++) { - dev->buffer[dev->pos * 2] /= 2; - dev->buffer[(dev->pos * 2) + 1] /= 2; - } -} + return 1; +}; diff --git a/src/sound/snd_opl_nuked.c b/src/sound/snd_opl_nuked.c index 347316e4e..8e1a7e774 100644 --- a/src/sound/snd_opl_nuked.c +++ b/src/sound/snd_opl_nuked.c @@ -46,6 +46,8 @@ #include <86box/snd_opl_nuked.h> #include <86box/sound.h> #include <86box/timer.h> +#include <86box/device.h> +#include <86box/snd_opl.h> #define WRBUF_SIZE 1024 #define WRBUF_DELAY 1 @@ -169,6 +171,56 @@ typedef struct chip { wrbuf_t wrbuf[WRBUF_SIZE]; } nuked_t; +typedef struct { + nuked_t opl; + int8_t flags, pad; + + uint16_t port; + uint8_t status, timer_ctrl; + uint16_t timer_count[2], + timer_cur_count[2]; + + pc_timer_t timers[2]; + + int pos; + int32_t buffer[SOUNDBUFLEN * 2]; +} nuked_drv_t; + +enum { + FLAG_CYCLES = 0x02, + FLAG_OPL3 = 0x01 +}; + +enum { + STAT_TMR_OVER = 0x60, + STAT_TMR1_OVER = 0x40, + STAT_TMR2_OVER = 0x20, + STAT_TMR_ANY = 0x80 +}; + +enum { + CTRL_RESET = 0x80, + CTRL_TMR_MASK = 0x60, + CTRL_TMR1_MASK = 0x40, + CTRL_TMR2_MASK = 0x20, + CTRL_TMR2_START = 0x02, + CTRL_TMR1_START = 0x01 +}; + +#ifdef ENABLE_OPL_LOG +static void +nuked_log(const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); +} +#else +# define nuked_log(fmt, ...) +#endif + // logsin table static const uint16_t logsinrom[256] = { 0x859, 0x6c3, 0x607, 0x58b, 0x52e, 0x4e4, 0x4a6, 0x471, @@ -1270,10 +1322,8 @@ nuked_generate(void *priv, int32_t *bufp) } void -nuked_generate_resampled(void *priv, int32_t *bufp) +nuked_generate_resampled(nuked_t *dev, int32_t *bufp) { - nuked_t *dev = (nuked_t *) priv; - while (dev->samplecnt >= dev->rateratio) { dev->oldsamples[0] = dev->samples[0]; dev->oldsamples[1] = dev->samples[1]; @@ -1292,9 +1342,8 @@ nuked_generate_resampled(void *priv, int32_t *bufp) } void -nuked_generate_stream(void *priv, int32_t *sndptr, uint32_t num) +nuked_generate_stream(nuked_t *dev, int32_t *sndptr, uint32_t num) { - nuked_t *dev = (nuked_t *) priv; uint32_t i; for (i = 0; i < num; i++) { @@ -1303,13 +1352,11 @@ nuked_generate_stream(void *priv, int32_t *sndptr, uint32_t num) } } -void * -nuked_init(uint32_t samplerate) +void +nuked_init(nuked_t *dev, uint32_t samplerate) { - nuked_t *dev; uint8_t i; - dev = (nuked_t *) malloc(sizeof(nuked_t)); memset(dev, 0x00, sizeof(nuked_t)); for (i = 0; i < 36; i++) { @@ -1350,14 +1397,222 @@ nuked_init(uint32_t samplerate) dev->rateratio = (samplerate << RSM_FRAC) / 49716; dev->tremoloshift = 4; dev->vibshift = 1; - - return (dev); } -void -nuked_close(void *priv) +static void +nuked_timer_tick(nuked_drv_t *dev, int tmr) { - nuked_t *dev = (nuked_t *) priv; + dev->timer_cur_count[tmr] = (dev->timer_cur_count[tmr] + 1) & 0xff; + nuked_log("Ticking timer %i, count now %02X...\n", tmr, dev->timer_cur_count[tmr]); + + if (dev->timer_cur_count[tmr] == 0x00) { + dev->status |= ((STAT_TMR1_OVER >> tmr) & ~dev->timer_ctrl); + dev->timer_cur_count[tmr] = dev->timer_count[tmr]; + + nuked_log("Count wrapped around to zero, reloading timer %i (%02X), status = %02X...\n", tmr, (STAT_TMR1_OVER >> tmr), dev->status); + } + + timer_on_auto(&dev->timers[tmr], (tmr == 1) ? 320.0 : 80.0); +} + +static void +nuked_timer_control(nuked_drv_t *dev, int tmr, int start) +{ + timer_on_auto(&dev->timers[tmr], 0.0); + + if (start) { + nuked_log("Loading timer %i count: %02X = %02X\n", tmr, dev->timer_cur_count[tmr], dev->timer_count[tmr]); + dev->timer_cur_count[tmr] = dev->timer_count[tmr]; + if (dev->flags & FLAG_OPL3) + nuked_timer_tick(dev, tmr); /* Per the YMF 262 datasheet, OPL3 starts counting immediately, unlike OPL2. */ + else + timer_on_auto(&dev->timers[tmr], (tmr == 1) ? 320.0 : 80.0); + } else { + nuked_log("Timer %i stopped\n", tmr); + if (tmr == 1) { + dev->status &= ~STAT_TMR2_OVER; + } else + dev->status &= ~STAT_TMR1_OVER; + } +} + +static void +nuked_timer_1(void *priv) +{ + nuked_drv_t *dev = (nuked_drv_t *) priv; + + nuked_timer_tick(dev, 0); +} + +static void +nuked_timer_2(void *priv) +{ + nuked_drv_t *dev = (nuked_drv_t *) priv; + + nuked_timer_tick(dev, 1); +} + +static void +nuked_drv_set_do_cycles(void *priv, int8_t do_cycles) +{ + nuked_drv_t *dev = (nuked_drv_t *)priv; + + if (do_cycles) + dev->flags |= FLAG_CYCLES; + else + dev->flags &= ~FLAG_CYCLES; +} + +static void * +nuked_drv_init(const device_t *info) +{ + nuked_drv_t *dev = (nuked_drv_t *) calloc(1, sizeof(nuked_drv_t)); + dev->flags = FLAG_CYCLES; + if (info->local == FM_YMF262) + dev->flags |= FLAG_OPL3; + else + dev->status = 0x06; + + /* Initialize the NukedOPL object. */ + nuked_init(&dev->opl, 48000); + + timer_add(&dev->timers[0], nuked_timer_1, dev, 0); + timer_add(&dev->timers[1], nuked_timer_2, dev, 0); + + return dev; +} + +static void +nuked_drv_close(void *priv) +{ + nuked_drv_t *dev = (nuked_drv_t *)priv; free(dev); } + +static int32_t * +nuked_drv_update(void *priv) +{ + nuked_drv_t *dev = (nuked_drv_t *)priv; + + if (dev->pos >= sound_pos_global) + return dev->buffer; + + nuked_generate_stream(&dev->opl, + &dev->buffer[dev->pos * 2], + sound_pos_global - dev->pos); + + for (; dev->pos < sound_pos_global; dev->pos++) { + dev->buffer[dev->pos * 2] /= 2; + dev->buffer[(dev->pos * 2) + 1] /= 2; + } + + return dev->buffer; +} + +static uint8_t +nuked_drv_read(uint16_t port, void *priv) +{ + nuked_drv_t *dev = (nuked_drv_t *) priv; + + if (dev->flags & FLAG_CYCLES) + cycles -= ((int) (isa_timing * 8)); + + nuked_drv_update(dev); + + uint8_t ret = 0xff; + + if ((port & 0x0003) == 0x0000) { + ret = dev->status; + if (dev->status & STAT_TMR_OVER) + ret |= STAT_TMR_ANY; + } + + nuked_log("OPL statret = %02x, status = %02x\n", ret, dev->status); + + return ret; +} + +static void +nuked_drv_write(uint16_t port, uint8_t val, void *priv) +{ + nuked_drv_t *dev = (nuked_drv_t *)priv; + nuked_drv_update(dev); + + if ((port & 0x0001) == 0x0001) { + nuked_write_reg_buffered(&dev->opl, dev->port, val); + + switch (dev->port) { + case 0x02: /* Timer 1 */ + dev->timer_count[0] = val; + nuked_log("Timer 0 count now: %i\n", dev->timer_count[0]); + break; + + case 0x03: /* Timer 2 */ + dev->timer_count[1] = val; + nuked_log("Timer 1 count now: %i\n", dev->timer_count[1]); + break; + + case 0x04: /* Timer control */ + if (val & CTRL_RESET) { + nuked_log("Resetting timer status...\n"); + dev->status &= ~STAT_TMR_OVER; + } else { + dev->timer_ctrl = val; + nuked_timer_control(dev, 0, val & CTRL_TMR1_START); + nuked_timer_control(dev, 1, val & CTRL_TMR2_START); + nuked_log("Status mask now %02X (val = %02X)\n", (val & ~CTRL_TMR_MASK) & CTRL_TMR_MASK, val); + } + break; + } + } else { + dev->port = nuked_write_addr(&dev->opl, port, val) & 0x01ff; + + if (!(dev->flags & FLAG_OPL3)) + dev->port &= 0x00ff; + } +} + +static void +nuked_drv_reset_buffer(void *priv) { + nuked_drv_t *dev = (nuked_drv_t *)priv; + + dev->pos = 0; +} + +const device_t ym3812_nuked_device = { + .name = "Yamaha YM3812 OPL2 (NUKED)", + .internal_name = "ym3812_nuked", + .flags = 0, + .local = FM_YM3812, + .init = nuked_drv_init, + .close = nuked_drv_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + +const device_t ymf262_nuked_device = { + .name = "Yamaha YMF262 OPL3 (NUKED)", + .internal_name = "ymf262_nuked", + .flags = 0, + .local = FM_YMF262, + .init = nuked_drv_init, + .close = nuked_drv_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + +const fm_drv_t nuked_opl_drv = { + &nuked_drv_read, + &nuked_drv_write, + &nuked_drv_update, + &nuked_drv_reset_buffer, + &nuked_drv_set_do_cycles, + NULL, +}; \ No newline at end of file diff --git a/src/sound/snd_opl_ymfm.cpp b/src/sound/snd_opl_ymfm.cpp new file mode 100644 index 000000000..f82d64822 --- /dev/null +++ b/src/sound/snd_opl_ymfm.cpp @@ -0,0 +1,387 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Interface to the YMFM emulator. + * + * + * Authors: Adrien Moulin, + * + * Copyright 2022 Adrien Moulin. + */ + +#include +#include +#include +#include +#include "ymfm/ymfm_opl.h" + +extern "C" { +#include <86box/timer.h> +#include <86box/device.h> +#include <86box/sound.h> +#include <86box/snd_opl.h> +} + +#define RSM_FRAC 10 + +enum { + FLAG_CYCLES = (1 << 0) +}; + +class YMFMChipBase +{ +public: + YMFMChipBase(uint32_t clock, fm_type type, uint32_t samplerate) + : m_buf_pos(0), m_flags(0), m_type(type) + { + memset(m_buffer, 0, sizeof(m_buffer)); + } + + virtual ~YMFMChipBase() + { + } + + fm_type type() const { return m_type; } + int8_t flags() const { return m_flags; } + void set_do_cycles(int8_t do_cycles) { do_cycles ? m_flags |= FLAG_CYCLES : m_flags &= ~FLAG_CYCLES; } + int32_t *buffer() const { return (int32_t *)m_buffer; } + void reset_buffer() { m_buf_pos = 0; } + + virtual uint32_t sample_rate() const = 0; + + virtual void write(uint16_t addr, uint8_t data) = 0; + virtual void generate(int32_t *data, uint32_t num_samples) = 0; + virtual void generate_resampled(int32_t *data, uint32_t num_samples) = 0; + virtual int32_t * update() = 0; + virtual uint8_t read(uint16_t addr) = 0; + +protected: + int32_t m_buffer[SOUNDBUFLEN * 2]; + uint32_t m_buf_pos; + int8_t m_flags; + fm_type m_type; +}; + +template +class YMFMChip : public YMFMChipBase, public ymfm::ymfm_interface +{ +public: + YMFMChip(uint32_t clock, fm_type type, uint32_t samplerate) + : YMFMChipBase(clock, type, samplerate) + , m_chip(*this) + , m_clock(clock) + , m_samplecnt(0) + { + memset(m_samples, 0, sizeof(m_samples)); + memset(m_oldsamples, 0, sizeof(m_oldsamples)); + m_rateratio = (samplerate << RSM_FRAC) / m_chip.sample_rate(m_clock); + m_clock_us = 1000000 / (double) m_clock; + + timer_add(&m_timers[0], YMFMChip::timer1, this, 0); + timer_add(&m_timers[1], YMFMChip::timer2, this, 0); + } + + virtual uint32_t sample_rate() const override + { + return m_chip.sample_rate(m_clock); + } + + virtual void ymfm_set_timer(uint32_t tnum, int32_t duration_in_clocks) override + { + if (tnum > 1) + return; + + pc_timer_t *timer = &m_timers[tnum]; + if (duration_in_clocks < 0) { + timer_stop(timer); + } else { + double period = m_clock_us * duration_in_clocks; + timer_on_auto(timer, period); + } + } + + virtual void generate(int32_t *data, uint32_t num_samples) override + { + for (uint32_t i = 0; i < num_samples; i++) { + m_chip.generate(&m_output); + if (ChipType::OUTPUTS == 1) { + *data++ = m_output.data[0]; + *data++ = m_output.data[0]; + } else { + *data++ = m_output.data[0]; + *data++ = m_output.data[1 % ChipType::OUTPUTS]; + } + } + } + +virtual void generate_resampled(int32_t *data, uint32_t num_samples) override + { + for (uint32_t i = 0; i < num_samples; i++) { + while (m_samplecnt >= m_rateratio) { + m_oldsamples[0] = m_samples[0]; + m_oldsamples[1] = m_samples[1]; + m_chip.generate(&m_output); + if (ChipType::OUTPUTS == 1) { + m_samples[0] = m_output.data[0]; + m_samples[1] = m_output.data[0]; + } else { + m_samples[0] = m_output.data[0]; + m_samples[1] = m_output.data[1 % ChipType::OUTPUTS]; + } + m_samplecnt -= m_rateratio; + } + + *data++ = ((int32_t) ((m_oldsamples[0] * (m_rateratio - m_samplecnt) + + m_samples[0] * m_samplecnt) + / m_rateratio)); + *data++ = ((int32_t) ((m_oldsamples[1] * (m_rateratio - m_samplecnt) + + m_samples[1] * m_samplecnt) + / m_rateratio)); + + m_samplecnt += 1 << RSM_FRAC; + } + } + + + /*virtual void generate_resampled(int32_t *data, uint32_t num_samples) override + { + for (uint32_t i = 0; i < num_samples; i++) { + while (m_samplecnt >= m_rateratio) { + m_oldsamples[0] = m_samples[0]; + m_oldsamples[1] = m_samples[1]; + generate(m_samples, 1); + m_samplecnt -= m_rateratio; + } + + *data++ = ((int32_t) ((m_oldsamples[0] * (m_rateratio - m_samplecnt) + + m_samples[0] * m_samplecnt) + / m_rateratio)) / 2; + *data++ = ((int32_t) ((m_oldsamples[1] * (m_rateratio - m_samplecnt) + + m_samples[1] * m_samplecnt) + / m_rateratio)) / 2; + + m_samplecnt += 1 << RSM_FRAC; + } + }*/ + + virtual int32_t *update() override + { + if (m_buf_pos >= sound_pos_global) + return m_buffer; + + generate_resampled(&m_buffer[m_buf_pos * 2], sound_pos_global - m_buf_pos); + + for (; m_buf_pos < sound_pos_global; m_buf_pos++) { + m_buffer[m_buf_pos * 2] /= 2; + m_buffer[(m_buf_pos * 2) + 1] /= 2; + } + + return m_buffer; + } + + virtual void write(uint16_t addr, uint8_t data) override + { + m_chip.write(addr, data); + } + + virtual uint8_t read(uint16_t addr) override + { + return m_chip.read(addr); + } + + static void timer1(void *priv) + { + YMFMChip *drv = (YMFMChip *) priv; + drv->m_engine->engine_timer_expired(0); + } + + static void timer2(void *priv) + { + YMFMChip *drv = (YMFMChip *) priv; + drv->m_engine->engine_timer_expired(1); + } + +private: + ChipType m_chip; + uint32_t m_clock; + double m_clock_us; + typename ChipType::output_data m_output; + pc_timer_t m_timers[2]; + + // Resampling + int32_t m_rateratio; + int32_t m_samplecnt; + int32_t m_oldsamples[2]; + int32_t m_samples[2]; +}; + +extern "C" +{ +#include +#include +#include +#include +#include +#include +#define HAVE_STDARG_H + +#include "cpu.h" +#include <86box/86box.h> +#include <86box/io.h> +#include <86box/snd_opl.h> + +#ifdef ENABLE_OPL_LOG +static int opl_do_log = ENABLE_OPL_LOG; + +static void +opl_log(const char *fmt, ...) +{ + va_list ap; + + if (opl_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +# define opl_log(fmt, ...) +#endif + +static void * +ymfm_drv_init(const device_t *info) +{ + YMFMChipBase *fm; + + switch (info->local) { + case FM_YM3812: + default: + fm = (YMFMChipBase *) new YMFMChip(3579545, FM_YM3812, 48000); + break; + + case FM_YMF262: + fm = (YMFMChipBase *) new YMFMChip(14318181, FM_YMF262, 48000); + break; + + case FM_YMF289B: + fm = (YMFMChipBase *) new YMFMChip(33868800, FM_YMF289B, 48000); + break; + } + + fm->set_do_cycles(1); + + return fm; +} + +static void +ymfm_drv_close(void *priv) +{ + YMFMChipBase *drv = (YMFMChipBase *) priv; + + if (drv != NULL) + delete(drv); +} + +static uint8_t +ymfm_drv_read(uint16_t port, void *priv) +{ + YMFMChipBase *drv = (YMFMChipBase *) priv; + + if (drv->flags() & FLAG_CYCLES) { + cycles -= ((int) (isa_timing * 8)); + } + + uint8_t ret = drv->read(port); + drv->update(); + + opl_log("YMFM read port %04x, status = %02x\n", port, ret); + return ret; +} + +static void +ymfm_drv_write(uint16_t port, uint8_t val, void *priv) +{ + YMFMChipBase *drv = (YMFMChipBase *) priv; + opl_log("YMFM write port %04x value = %02x\n", port, val); + drv->write(port, val); + drv->update(); +} + +static int32_t * +ymfm_drv_update(void *priv) { + YMFMChipBase *drv = (YMFMChipBase *) priv; + + return drv->update(); +} + +static void +ymfm_drv_reset_buffer(void *priv) { + YMFMChipBase *drv = (YMFMChipBase *) priv; + + drv->reset_buffer(); +} + +static void +ymfm_drv_set_do_cycles(void *priv, int8_t do_cycles) +{ + YMFMChipBase *drv = (YMFMChipBase *) priv; + drv->set_do_cycles(do_cycles); +} + +const device_t ym3812_ymfm_device = { + .name = "Yamaha YM3812 OPL2 (YMFM)", + .internal_name = "ym3812_ymfm", + .flags = 0, + .local = FM_YM3812, + .init = ymfm_drv_init, + .close = ymfm_drv_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + +const device_t ymf262_ymfm_device = { + .name = "Yamaha YMF262 OPL3 (YMFM)", + .internal_name = "ymf262_ymfm", + .flags = 0, + .local = FM_YMF262, + .init = ymfm_drv_init, + .close = ymfm_drv_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + +const device_t ymf289b_ymfm_device = { + .name = "Yamaha YMF289B OPL3-L (YMFM)", + .internal_name = "ymf289b_ymfm", + .flags = 0, + .local = FM_YMF289B, + .init = ymfm_drv_init, + .close = ymfm_drv_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + +const fm_drv_t ymfm_drv { + &ymfm_drv_read, + &ymfm_drv_write, + &ymfm_drv_update, + &ymfm_drv_reset_buffer, + &ymfm_drv_set_do_cycles, + NULL, +}; + +} diff --git a/src/sound/snd_pas16.c b/src/sound/snd_pas16.c index 33bd51b34..1662598c9 100644 --- a/src/sound/snd_pas16.c +++ b/src/sound/snd_pas16.c @@ -137,7 +137,7 @@ typedef struct pas16_t { int64_t enable[3]; } pit; - opl_t opl; + fm_drv_t opl; sb_dsp_t dsp; int16_t pcm_buffer[2][SOUNDBUFLEN]; @@ -201,7 +201,7 @@ pas16_in(uint16_t port, void *p) case 0x389: case 0x38a: case 0x38b: - temp = opl3_read((port - pas16->base) + 0x388, &pas16->opl); + temp = pas16->opl.read((port - pas16->base) + 0x388, pas16->opl.priv); break; case 0xb88: @@ -301,7 +301,7 @@ pas16_out(uint16_t port, uint8_t val, void *p) case 0x389: case 0x38a: case 0x38b: - opl3_write((port - pas16->base) + 0x388, val, &pas16->opl); + pas16->opl.write((port - pas16->base) + 0x388, val, pas16->opl.priv); break; case 0xb88: @@ -702,17 +702,17 @@ pas16_get_buffer(int32_t *buffer, int len, void *p) pas16_t *pas16 = (pas16_t *) p; int c; - opl3_update(&pas16->opl); + int32_t *opl_buf = pas16->opl.update(pas16->opl.priv); sb_dsp_update(&pas16->dsp); pas16_update(pas16); for (c = 0; c < len * 2; c++) { - buffer[c] += pas16->opl.buffer[c]; + buffer[c] += opl_buf[c]; buffer[c] += (int16_t) (sb_iir(0, c & 1, (double) pas16->dsp.buffer[c]) / 1.3) / 2; buffer[c] += (pas16->pcm_buffer[c & 1][c >> 1] / 2); } pas16->pos = 0; - pas16->opl.pos = 0; + pas16->opl.reset_buffer(pas16->opl.priv); pas16->dsp.pos = 0; } @@ -722,7 +722,7 @@ pas16_init(const device_t *info) pas16_t *pas16 = malloc(sizeof(pas16_t)); memset(pas16, 0, sizeof(pas16_t)); - opl3_init(&pas16->opl); + fm_driver_get(FM_YMF262, &pas16->opl); sb_dsp_init(&pas16->dsp, SB2, SB_SUBTYPE_DEFAULT, pas16); io_sethandler(0x9a01, 0x0001, NULL, NULL, NULL, pas16_out_base, NULL, NULL, pas16); diff --git a/src/sound/snd_sb.c b/src/sound/snd_sb.c index aaafd11fa..75c59e11e 100644 --- a/src/sound/snd_sb.c +++ b/src/sound/snd_sb.c @@ -183,9 +183,10 @@ sb_get_buffer_sb2(int32_t *buffer, int len, void *p) sb_ct1335_mixer_t *mixer = &sb->mixer_sb2; int c; double out_mono = 0.0, out_l = 0.0, out_r = 0.0; + int32_t *opl_buf = NULL; if (sb->opl_enabled) - opl2_update(&sb->opl); + opl_buf = sb->opl.update(sb->opl.priv); sb_dsp_update(&sb->dsp); @@ -198,7 +199,7 @@ sb_get_buffer_sb2(int32_t *buffer, int len, void *p) out_r = 0.0; if (sb->opl_enabled) - out_mono = ((double) sb->opl.buffer[c]) * 0.7171630859375; + out_mono = ((double) opl_buf[c]) * 0.7171630859375; if (sb->cms_enabled) { out_l += sb->cms.buffer[c]; @@ -234,7 +235,7 @@ sb_get_buffer_sb2(int32_t *buffer, int len, void *p) sb->pos = 0; if (sb->opl_enabled) - sb->opl.pos = 0; + sb->opl.reset_buffer(sb->opl.priv); sb->dsp.pos = 0; @@ -265,13 +266,14 @@ sb_get_buffer_sbpro(int32_t *buffer, int len, void *p) sb_ct1345_mixer_t *mixer = &sb->mixer_sbpro; int c; double out_l = 0.0, out_r = 0.0; + int32_t *opl_buf, *opl2_buf; if (sb->opl_enabled) { if (sb->dsp.sb_type == SBPRO) { - opl2_update(&sb->opl); - opl2_update(&sb->opl2); + opl_buf = sb->opl.update(sb->opl.priv); + opl2_buf = sb->opl2.update(sb->opl2.priv); } else - opl3_update(&sb->opl); + opl_buf = sb->opl.update(sb->opl.priv); } sb_dsp_update(&sb->dsp); @@ -283,11 +285,11 @@ sb_get_buffer_sbpro(int32_t *buffer, int len, void *p) if (sb->dsp.sb_type == SBPRO) { /* Two chips for LEFT and RIGHT channels. Each chip stores data into the LEFT channel only (no sample alternating.) */ - out_l = (((double) sb->opl.buffer[c]) * mixer->fm_l) * 0.7171630859375; - out_r = (((double) sb->opl2.buffer[c]) * mixer->fm_r) * 0.7171630859375; + out_l = (((double) opl_buf[c]) * mixer->fm_l) * 0.7171630859375; + out_r = (((double) opl2_buf[c]) * mixer->fm_r) * 0.7171630859375; } else { - out_l = (((double) sb->opl.buffer[c]) * mixer->fm_l) * 0.7171630859375; - out_r = (((double) sb->opl.buffer[c + 1]) * mixer->fm_r) * 0.7171630859375; + out_l = (((double) opl_buf[c]) * mixer->fm_l) * 0.7171630859375; + out_r = (((double) opl_buf[c + 1]) * mixer->fm_r) * 0.7171630859375; } } @@ -311,9 +313,9 @@ sb_get_buffer_sbpro(int32_t *buffer, int len, void *p) sb->pos = 0; if (sb->opl_enabled) { - sb->opl.pos = 0; + sb->opl.reset_buffer(sb->opl.priv); if (sb->dsp.sb_type != SBPRO) - sb->opl2.pos = 0; + sb->opl2.reset_buffer(sb->opl2.priv); } sb->dsp.pos = 0; @@ -345,9 +347,10 @@ sb_get_buffer_sb16_awe32(int32_t *buffer, int len, void *p) int32_t in_l, in_r; double out_l = 0.0, out_r = 0.0; double bass_treble; + int32_t *opl_buf = NULL; if (sb->opl_enabled) - opl3_update(&sb->opl); + opl_buf = sb->opl.update(sb->opl.priv); if (sb->dsp.sb_type > SB16) emu8k_update(&sb->emu8k); @@ -361,8 +364,8 @@ sb_get_buffer_sb16_awe32(int32_t *buffer, int len, void *p) c_emu8k = ((((c / 2) * 44100) / 48000) * 2); if (sb->opl_enabled) { - out_l = ((double) sb->opl.buffer[c]) * mixer->fm_l * 0.7171630859375; - out_r = ((double) sb->opl.buffer[c + 1]) * mixer->fm_r * 0.7171630859375; + out_l = ((double) opl_buf[c]) * mixer->fm_l * 0.7171630859375; + out_r = ((double) opl_buf[c + 1]) * mixer->fm_r * 0.7171630859375; } if (sb->dsp.sb_type > SB16) { @@ -456,7 +459,7 @@ sb_get_buffer_sb16_awe32(int32_t *buffer, int len, void *p) sb->pos = 0; if (sb->opl_enabled) - sb->opl.pos = 0; + sb->opl.reset_buffer(sb->opl.priv); sb->dsp.pos = 0; @@ -1088,13 +1091,13 @@ sb_mcv_write(int port, uint8_t val, void *p) addr = sb_mcv_addr[sb->pos_regs[4] & 7]; if (sb->opl_enabled) { io_removehandler(addr + 8, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_removehandler(0x0388, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); } /* DSP I/O handler is activated in sb_dsp_setaddr */ sb_dsp_setaddr(&sb->dsp, 0); @@ -1106,13 +1109,13 @@ sb_mcv_write(int port, uint8_t val, void *p) if (sb->opl_enabled) { io_sethandler(addr + 8, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(0x0388, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); } /* DSP I/O handler is activated in sb_dsp_setaddr */ sb_dsp_setaddr(&sb->dsp, addr); @@ -1152,17 +1155,17 @@ sb_pro_mcv_write(int port, uint8_t val, void *p) addr = (sb->pos_regs[2] & 0x20) ? 0x220 : 0x240; io_removehandler(addr, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_removehandler(addr + 8, 0x0002, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_removehandler(0x0388, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_removehandler(addr + 4, 0x0002, sb_ct1345_mixer_read, NULL, NULL, sb_ct1345_mixer_write, NULL, NULL, @@ -1176,16 +1179,16 @@ sb_pro_mcv_write(int port, uint8_t val, void *p) addr = (sb->pos_regs[2] & 0x20) ? 0x220 : 0x240; io_sethandler(addr, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(addr + 8, 0x0002, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(0x0388, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, sb->opl.priv); io_sethandler(addr + 4, 0x0002, sb_ct1345_mixer_read, NULL, NULL, sb_ct1345_mixer_write, NULL, NULL, @@ -1208,13 +1211,13 @@ sb_16_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv) switch (ld) { case 0: /* Audio */ io_removehandler(addr, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_removehandler(addr + 8, 0x0002, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_removehandler(addr + 4, 0x0002, sb_ct1745_mixer_read, NULL, NULL, sb_ct1745_mixer_write, NULL, NULL, @@ -1224,9 +1227,9 @@ sb_16_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv) if (addr) { sb->opl_pnp_addr = 0; io_removehandler(addr, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); } sb_dsp_setaddr(&sb->dsp, 0); @@ -1240,13 +1243,13 @@ sb_16_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv) addr = config->io[0].base; if (addr != ISAPNP_IO_DISABLED) { io_sethandler(addr, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(addr + 8, 0x0002, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(addr + 4, 0x0002, sb_ct1745_mixer_read, NULL, NULL, sb_ct1745_mixer_write, NULL, NULL, @@ -1263,9 +1266,9 @@ sb_16_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv) if (addr != ISAPNP_IO_DISABLED) { sb->opl_pnp_addr = addr; io_sethandler(addr, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); } val = config->irq[0].irq; @@ -1349,7 +1352,7 @@ sb_1_init(const device_t *info) sb->opl_enabled = device_get_config_int("opl"); if (sb->opl_enabled) - opl2_init(&sb->opl); + fm_driver_get(FM_YM3812, &sb->opl); sb_dsp_init(&sb->dsp, SB1, SB_SUBTYPE_DEFAULT, sb); sb_dsp_setaddr(&sb->dsp, addr); @@ -1358,13 +1361,13 @@ sb_1_init(const device_t *info) /* DSP I/O handler is activated in sb_dsp_setaddr */ if (sb->opl_enabled) { io_sethandler(addr + 8, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(0x0388, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); } sb->cms_enabled = 1; @@ -1397,7 +1400,7 @@ sb_15_init(const device_t *info) sb->opl_enabled = device_get_config_int("opl"); if (sb->opl_enabled) - opl2_init(&sb->opl); + fm_driver_get(FM_YM3812, &sb->opl); sb_dsp_init(&sb->dsp, SB15, SB_SUBTYPE_DEFAULT, sb); sb_dsp_setaddr(&sb->dsp, addr); @@ -1406,13 +1409,13 @@ sb_15_init(const device_t *info) /* DSP I/O handler is activated in sb_dsp_setaddr */ if (sb->opl_enabled) { io_sethandler(addr + 8, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(0x0388, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); } sb->cms_enabled = device_get_config_int("cms"); @@ -1445,7 +1448,7 @@ sb_mcv_init(const device_t *info) sb->opl_enabled = device_get_config_int("opl"); if (sb->opl_enabled) - opl2_init(&sb->opl); + fm_driver_get(FM_YM3812, &sb->opl); sb_dsp_init(&sb->dsp, SB15, SB_SUBTYPE_DEFAULT, sb); sb_dsp_setaddr(&sb->dsp, 0); @@ -1490,7 +1493,7 @@ sb_2_init(const device_t *info) sb->opl_enabled = device_get_config_int("opl"); if (sb->opl_enabled) - opl2_init(&sb->opl); + fm_driver_get(FM_YM3812, &sb->opl); sb_dsp_init(&sb->dsp, SB2, SB_SUBTYPE_DEFAULT, sb); sb_dsp_setaddr(&sb->dsp, addr); @@ -1504,18 +1507,18 @@ sb_2_init(const device_t *info) if (sb->opl_enabled) { if (!sb->cms_enabled) { io_sethandler(addr, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.write); } io_sethandler(addr + 8, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.write); io_sethandler(0x0388, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.write); } if (sb->cms_enabled) { @@ -1550,8 +1553,8 @@ sb_pro_v1_opl_read(uint16_t port, void *priv) cycles -= ((int) (isa_timing * 8)); - (void) opl2_read(port, &sb->opl2); // read, but ignore - return (opl2_read(port, &sb->opl)); + (void) sb->opl2.read(port, sb->opl2.priv); // read, but ignore + return (sb->opl.read(port, sb->opl.priv)); } static void @@ -1559,8 +1562,8 @@ sb_pro_v1_opl_write(uint16_t port, uint8_t val, void *priv) { sb_t *sb = (sb_t *) priv; - opl2_write(port, val, &sb->opl); - opl2_write(port, val, &sb->opl2); + sb->opl.write(port, val, sb->opl.priv); + sb->opl2.write(port, val, sb->opl2.priv); } static void * @@ -1578,10 +1581,10 @@ sb_pro_v1_init(const device_t *info) sb->opl_enabled = device_get_config_int("opl"); if (sb->opl_enabled) { - opl2_init(&sb->opl); - opl_set_do_cycles(&sb->opl, 0); - opl2_init(&sb->opl2); - opl_set_do_cycles(&sb->opl2, 0); + fm_driver_get(FM_YM3812, &sb->opl); + sb->opl.set_do_cycles(sb->opl.priv, 0); + fm_driver_get(FM_YM3812, &sb->opl2); + sb->opl2.set_do_cycles(sb->opl2.priv, 0); } sb_dsp_init(&sb->dsp, SBPRO, SB_SUBTYPE_DEFAULT, sb); @@ -1592,13 +1595,13 @@ sb_pro_v1_init(const device_t *info) /* DSP I/O handler is activated in sb_dsp_setaddr */ if (sb->opl_enabled) { io_sethandler(addr, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(addr + 2, 0x0002, - opl2_read, NULL, NULL, - opl2_write, NULL, NULL, - &sb->opl2); + sb->opl2.read, NULL, NULL, + sb->opl2.write, NULL, NULL, + sb->opl2.priv); io_sethandler(addr + 8, 0x0002, sb_pro_v1_opl_read, NULL, NULL, sb_pro_v1_opl_write, NULL, NULL, @@ -1638,7 +1641,7 @@ sb_pro_v2_init(const device_t *info) sb->opl_enabled = device_get_config_int("opl"); if (sb->opl_enabled) - opl3_init(&sb->opl); + fm_driver_get(FM_YMF262, &sb->opl); sb_dsp_init(&sb->dsp, SBPRO2, SB_SUBTYPE_DEFAULT, sb); sb_dsp_setaddr(&sb->dsp, addr); @@ -1648,17 +1651,17 @@ sb_pro_v2_init(const device_t *info) /* DSP I/O handler is activated in sb_dsp_setaddr */ if (sb->opl_enabled) { io_sethandler(addr, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(addr + 8, 0x0002, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(0x0388, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); } sb->mixer_enabled = 1; @@ -1687,7 +1690,7 @@ sb_pro_mcv_init(const device_t *info) memset(sb, 0, sizeof(sb_t)); sb->opl_enabled = 1; - opl3_init(&sb->opl); + fm_driver_get(FM_YMF262, &sb->opl); sb_dsp_init(&sb->dsp, SBPRO2, SB_SUBTYPE_DEFAULT, sb); sb_ct1345_mixer_reset(sb); @@ -1713,7 +1716,7 @@ sb_pro_compat_init(const device_t *info) sb_t *sb = malloc(sizeof(sb_t)); memset(sb, 0, sizeof(sb_t)); - opl3_init(&sb->opl); + fm_driver_get(FM_YMF262, &sb->opl); sb_dsp_init(&sb->dsp, SBPRO2, SB_SUBTYPE_DEFAULT, sb); sb_ct1345_mixer_reset(sb); @@ -1740,7 +1743,7 @@ sb_16_init(const device_t *info) sb->opl_enabled = device_get_config_int("opl"); if (sb->opl_enabled) - opl3_init(&sb->opl); + fm_driver_get(FM_YMF262, &sb->opl); sb_dsp_init(&sb->dsp, SB16, SB_SUBTYPE_DEFAULT, sb); sb_dsp_setaddr(&sb->dsp, addr); @@ -1751,17 +1754,17 @@ sb_16_init(const device_t *info) if (sb->opl_enabled) { io_sethandler(addr, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(addr + 8, 0x0002, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(0x0388, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); } sb->mixer_enabled = 1; @@ -1792,7 +1795,7 @@ sb_16_pnp_init(const device_t *info) memset(sb, 0x00, sizeof(sb_t)); sb->opl_enabled = 1; - opl3_init(&sb->opl); + fm_driver_get(FM_YMF262, &sb->opl); sb_dsp_init(&sb->dsp, SB16, SB_SUBTYPE_DEFAULT, sb); sb_ct1745_mixer_reset(sb); @@ -1835,7 +1838,7 @@ sb_16_compat_init(const device_t *info) sb_t *sb = malloc(sizeof(sb_t)); memset(sb, 0, sizeof(sb_t)); - opl3_init(&sb->opl); + fm_driver_get(FM_YMF262, &sb->opl); sb_dsp_init(&sb->dsp, SB16, SB_SUBTYPE_DEFAULT, sb); sb_ct1745_mixer_reset(sb); @@ -1900,7 +1903,7 @@ sb_awe32_init(const device_t *info) sb->opl_enabled = device_get_config_int("opl"); if (sb->opl_enabled) - opl3_init(&sb->opl); + fm_driver_get(FM_YMF262, &sb->opl); sb_dsp_init(&sb->dsp, SBAWE32, SB_SUBTYPE_DEFAULT, sb); sb_dsp_setaddr(&sb->dsp, addr); @@ -1911,17 +1914,17 @@ sb_awe32_init(const device_t *info) if (sb->opl_enabled) { io_sethandler(addr, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(addr + 8, 0x0002, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(0x0388, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); } sb->mixer_enabled = 1; @@ -1956,7 +1959,7 @@ sb_awe32_pnp_init(const device_t *info) memset(sb, 0x00, sizeof(sb_t)); sb->opl_enabled = 1; - opl3_init(&sb->opl); + fm_driver_get(FM_YMF262, &sb->opl); sb_dsp_init(&sb->dsp, ((info->local == 2) || (info->local == 3) || (info->local == 4)) ? SBAWE64 : SBAWE32, SB_SUBTYPE_DEFAULT, sb); sb_ct1745_mixer_reset(sb); diff --git a/src/sound/snd_wss.c b/src/sound/snd_wss.c index 8df4791c6..b4859e128 100644 --- a/src/sound/snd_wss.c +++ b/src/sound/snd_wss.c @@ -52,7 +52,7 @@ typedef struct wss_t { uint8_t config; ad1848_t ad1848; - opl_t opl; + fm_drv_t opl; int opl_enabled; uint8_t pos_regs[8]; @@ -81,14 +81,14 @@ wss_get_buffer(int32_t *buffer, int len, void *priv) wss_t *wss = (wss_t *) priv; int c; - opl3_update(&wss->opl); + int32_t *opl_buf = wss->opl.update(wss->opl.priv); ad1848_update(&wss->ad1848); for (c = 0; c < len * 2; c++) { - buffer[c] += wss->opl.buffer[c]; + buffer[c] += opl_buf[c]; buffer[c] += wss->ad1848.buffer[c] / 2; } - wss->opl.pos = 0; + wss->opl.reset_buffer(wss->opl.priv); wss->ad1848.pos = 0; } @@ -102,7 +102,7 @@ wss_init(const device_t *info) wss->opl_enabled = device_get_config_int("opl"); if (wss->opl_enabled) - opl3_init(&wss->opl); + fm_driver_get(FM_YMF262, &wss->opl); ad1848_init(&wss->ad1848, AD1848_TYPE_DEFAULT); @@ -111,9 +111,9 @@ wss_init(const device_t *info) if (wss->opl_enabled) io_sethandler(0x0388, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &wss->opl); + wss->opl.read, NULL, NULL, + wss->opl.write, NULL, NULL, + wss->opl.priv); io_sethandler(addr, 0x0004, wss_read, NULL, NULL, @@ -150,9 +150,9 @@ ncr_audio_mca_write(int port, uint8_t val, void *priv) addr = ports[(wss->pos_regs[2] & 0x18) >> 3]; io_removehandler(0x0388, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &wss->opl); + wss->opl.read, NULL, NULL, + wss->opl.write, NULL, NULL, + wss->opl.priv); io_removehandler(addr, 0x0004, wss_read, NULL, NULL, wss_write, NULL, NULL, @@ -169,9 +169,9 @@ ncr_audio_mca_write(int port, uint8_t val, void *priv) if (wss->opl_enabled) io_sethandler(0x0388, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &wss->opl); + wss->opl.read, NULL, NULL, + wss->opl.write, NULL, NULL, + wss->opl.priv); io_sethandler(addr, 0x0004, wss_read, NULL, NULL, @@ -197,7 +197,7 @@ ncr_audio_init(const device_t *info) wss_t *wss = malloc(sizeof(wss_t)); memset(wss, 0, sizeof(wss_t)); - opl3_init(&wss->opl); + fm_driver_get(FM_YMF262, &wss->opl); ad1848_init(&wss->ad1848, AD1848_TYPE_DEFAULT); ad1848_setirq(&wss->ad1848, 7); diff --git a/src/sound/ymfm/CMakeLists.txt b/src/sound/ymfm/CMakeLists.txt index da02f8132..2041719ae 100644 --- a/src/sound/ymfm/CMakeLists.txt +++ b/src/sound/ymfm/CMakeLists.txt @@ -1 +1 @@ -add_library(ymfm STATIC ymfm_opl.cpp) \ No newline at end of file +add_library(ymfm STATIC ymfm_misc.cpp ymfm_opl.cpp ymfm_opm.cpp ymfm_opn.cpp ymfm_opq.cpp ymfm_opz.cpp ymfm_pcm.cpp ymfm_adpcm.cpp) \ No newline at end of file diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 8c29a24a1..75b847dde 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -241,7 +241,7 @@ VPATH := $(EXPATH) . $(CODEGEN) minitrace cpu \ sio sound \ sound/munt sound/munt/c_interface sound/munt/sha1 \ sound/munt/srchelper sound/munt/srchelper/srctools/src \ - sound/resid-fp \ + sound/resid-fp sound/ymfm \ scsi video network network/slirp win ifeq ($(X64), y) TOOL_PREFIX := x86_64-w64-mingw32- @@ -670,7 +670,9 @@ PRINTOBJ := png.o prt_cpmap.o \ prt_escp.o prt_text.o prt_ps.o SNDOBJ := sound.o \ - snd_opl.o snd_opl_nuked.o \ + snd_opl.o snd_opl_nuked.o snd_opl_ymfm.o \ + ymfm_adpcm.o ymfm_misc.o ymfm_opl.o ymfm_opm.o \ + ymfm_opn.o ymfm_opq.o ymfm_opz.o ymfm_pcm.o ymfm_ssg.o \ snd_resid.o \ convolve.o convolve-sse.o envelope.o extfilt.o \ filter.o pot.o sid.o voice.o wave6581__ST.o \ From a6a7f0ae978a646bbbd144f0b3aacb9f4bd4c373 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Mon, 25 Jul 2022 20:30:52 +0200 Subject: [PATCH 152/386] ymfm cleanup --- src/sound/snd_opl_ymfm.cpp | 39 +++++++------------------------------- 1 file changed, 7 insertions(+), 32 deletions(-) diff --git a/src/sound/snd_opl_ymfm.cpp b/src/sound/snd_opl_ymfm.cpp index f82d64822..6acbf79f3 100644 --- a/src/sound/snd_opl_ymfm.cpp +++ b/src/sound/snd_opl_ymfm.cpp @@ -147,28 +147,6 @@ virtual void generate_resampled(int32_t *data, uint32_t num_samples) override } } - - /*virtual void generate_resampled(int32_t *data, uint32_t num_samples) override - { - for (uint32_t i = 0; i < num_samples; i++) { - while (m_samplecnt >= m_rateratio) { - m_oldsamples[0] = m_samples[0]; - m_oldsamples[1] = m_samples[1]; - generate(m_samples, 1); - m_samplecnt -= m_rateratio; - } - - *data++ = ((int32_t) ((m_oldsamples[0] * (m_rateratio - m_samplecnt) - + m_samples[0] * m_samplecnt) - / m_rateratio)) / 2; - *data++ = ((int32_t) ((m_oldsamples[1] * (m_rateratio - m_samplecnt) - + m_samples[1] * m_samplecnt) - / m_rateratio)) / 2; - - m_samplecnt += 1 << RSM_FRAC; - } - }*/ - virtual int32_t *update() override { if (m_buf_pos >= sound_pos_global) @@ -236,21 +214,18 @@ extern "C" #include <86box/snd_opl.h> #ifdef ENABLE_OPL_LOG -static int opl_do_log = ENABLE_OPL_LOG; static void -opl_log(const char *fmt, ...) +ymfm_log(const char *fmt, ...) { va_list ap; - if (opl_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } #else -# define opl_log(fmt, ...) +# define ymfm_log(fmt, ...) #endif static void * @@ -299,7 +274,7 @@ ymfm_drv_read(uint16_t port, void *priv) uint8_t ret = drv->read(port); drv->update(); - opl_log("YMFM read port %04x, status = %02x\n", port, ret); + ymfm_log("YMFM read port %04x, status = %02x\n", port, ret); return ret; } @@ -307,7 +282,7 @@ static void ymfm_drv_write(uint16_t port, uint8_t val, void *priv) { YMFMChipBase *drv = (YMFMChipBase *) priv; - opl_log("YMFM write port %04x value = %02x\n", port, val); + ymfm_log("YMFM write port %04x value = %02x\n", port, val); drv->write(port, val); drv->update(); } From 3d9f0b560c8ba815bc65b51fb4e648486b7b3fb3 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Tue, 26 Jul 2022 01:06:40 +0600 Subject: [PATCH 153/386] Add Reply Video Adapter for MCA (Cirrus CL-GD5426) --- src/include/86box/video.h | 1 + src/video/vid_cl54xx.c | 27 +++++++++++++++++++++++++-- src/video/vid_table.c | 1 + 3 files changed, 27 insertions(+), 2 deletions(-) diff --git a/src/include/86box/video.h b/src/include/86box/video.h index 1216257bc..a12bdc0a7 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -329,6 +329,7 @@ extern const device_t gd5428_isa_device; extern const device_t gd5428_vlb_device; extern const device_t gd5428_diamond_speedstar_pro_b1_vlb_device; extern const device_t gd5428_mca_device; +extern const device_t gd5426_mca_device; extern const device_t gd5428_onboard_device; extern const device_t gd5429_isa_device; extern const device_t gd5429_vlb_device; diff --git a/src/video/vid_cl54xx.c b/src/video/vid_cl54xx.c index 174dc5037..709e2a972 100644 --- a/src/video/vid_cl54xx.c +++ b/src/video/vid_cl54xx.c @@ -46,6 +46,7 @@ #define BIOS_GD5420_PATH "roms/video/cirruslogic/5420.vbi" #define BIOS_GD5422_PATH "roms/video/cirruslogic/cl5422.bin" #define BIOS_GD5426_DIAMOND_A1_ISA_PATH "roms/video/cirruslogic/diamond5426.vbi" +#define BIOS_GD5426_MCA_PATH "roms/video/cirruslogic/Reply.BIN" #define BIOS_GD5428_DIAMOND_B1_VLB_PATH "roms/video/cirruslogic/Diamond SpeedStar PRO VLB v3.04.bin" #define BIOS_GD5428_ISA_PATH "roms/video/cirruslogic/5428.bin" #define BIOS_GD5428_MCA_PATH "roms/video/cirruslogic/SVGA141.ROM" @@ -3902,6 +3903,8 @@ static void else { if (gd54xx->vlb) romfn = BIOS_GD5428_PATH; + else if (gd54xx->mca) + romfn = BIOS_GD5426_MCA_PATH; else romfn = BIOS_GD5428_ISA_PATH; } @@ -4115,8 +4118,8 @@ static void gd54xx->unlocked = 1; if (gd54xx->mca) { - gd54xx->pos_regs[0] = 0x7b; - gd54xx->pos_regs[1] = 0x91; + gd54xx->pos_regs[0] = svga->crtc[0x27] == CIRRUS_ID_CLGD5426 ? 0x82 : 0x7b; + gd54xx->pos_regs[1] = svga->crtc[0x27] == CIRRUS_ID_CLGD5426 ? 0x81 : 0x91; mca_add(gd5428_mca_read, gd5428_mca_write, gd5428_mca_feedb, NULL, gd54xx); io_sethandler(0x46e8, 0x0001, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); } @@ -4184,6 +4187,12 @@ gd5428_isa_available(void) return rom_present(BIOS_GD5428_ISA_PATH); } +static int +gd5426_mca_available(void) +{ + return rom_present(BIOS_GD5426_MCA_PATH); +} + static int gd5428_mca_available(void) { @@ -4699,6 +4708,20 @@ const device_t gd5428_mca_device = { .config = NULL }; +const device_t gd5426_mca_device = { + .name = "Cirrus Logic GD5426 (MCA) (Reply Video Adapter)", + .internal_name = "replymcasvga", + .flags = DEVICE_MCA, + .local = CIRRUS_ID_CLGD5426, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, + { .available = gd5426_mca_available }, + .speed_changed = gd54xx_speed_changed, + .force_redraw = gd54xx_force_redraw, + .config = gd5426_config +}; + const device_t gd5428_onboard_device = { .name = "Cirrus Logic GD5428 (ISA) (On-Board)", .internal_name = "cl_gd5428_onboard", diff --git a/src/video/vid_table.c b/src/video/vid_table.c index fdad852fe..94d4601a8 100644 --- a/src/video/vid_table.c +++ b/src/video/vid_table.c @@ -148,6 +148,7 @@ video_cards[] = { { &vga_device }, { &v7_vga_1024i_device }, { &wy700_device }, + { &gd5426_mca_device }, { &gd5428_mca_device }, { &et4000_mca_device }, { &radius_svga_multiview_mca_device }, From 4e02b18315e664600127e416e753ceba2c81c6a8 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Mon, 25 Jul 2022 21:19:46 +0200 Subject: [PATCH 154/386] Fix build --- src/sound/snd_sb.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/src/sound/snd_sb.c b/src/sound/snd_sb.c index e1546acdc..16fcfe9d3 100644 --- a/src/sound/snd_sb.c +++ b/src/sound/snd_sb.c @@ -1245,17 +1245,17 @@ sb_16_reply_mca_write(int port, uint8_t val, void *p) if (addr) { io_removehandler(addr, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_removehandler(addr + 8, 0x0002, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_removehandler(0x0388, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_removehandler(addr + 4, 0x0002, sb_ct1745_mixer_read, NULL, NULL, sb_ct1745_mixer_write, NULL, NULL, @@ -1303,16 +1303,16 @@ sb_16_reply_mca_write(int port, uint8_t val, void *p) if (addr) { io_sethandler(addr, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(addr + 8, 0x0002, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, - &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_sethandler(0x0388, 0x0004, - opl3_read, NULL, NULL, - opl3_write, NULL, NULL, &sb->opl); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, sb->opl.priv); io_sethandler(addr + 4, 0x0002, sb_ct1745_mixer_read, NULL, NULL, sb_ct1745_mixer_write, NULL, NULL, @@ -1940,7 +1940,7 @@ sb_16_reply_mca_init(const device_t *info) memset(sb, 0x00, sizeof(sb_t)); sb->opl_enabled = 1; - opl3_init(&sb->opl); + fm_driver_get(FM_YMF262, &sb->opl); sb_dsp_init(&sb->dsp, SB16, SB_SUBTYPE_DEFAULT, sb); sb_ct1745_mixer_reset(sb); From 7a4e7c0855eedc96deadadb9355e6f60daba6347 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Mon, 25 Jul 2022 22:04:48 +0200 Subject: [PATCH 155/386] ymfm: try to fix GCC11 build error --- src/sound/ymfm/ymfm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/src/sound/ymfm/ymfm.h b/src/sound/ymfm/ymfm.h index b983379b5..d9c3bca3b 100644 --- a/src/sound/ymfm/ymfm.h +++ b/src/sound/ymfm/ymfm.h @@ -44,6 +44,7 @@ #include #include #include +#include namespace ymfm { From 42cb69fd66b82e03b39f4ba73108ec6ed0a19684 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Mon, 25 Jul 2022 18:29:11 -0300 Subject: [PATCH 156/386] Jenkins: Move extra-cmake-modules to platform-independent dependencies --- .ci/build.sh | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.ci/build.sh b/.ci/build.sh index 3ac28eb8a..60917f43e 100644 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -590,7 +590,7 @@ else esac # Establish general dependencies. - pkgs="cmake ninja-build pkg-config git wget p7zip-full wayland-protocols tar gzip file appstream" + pkgs="cmake ninja-build pkg-config git wget p7zip-full extra-cmake-modules wayland-protocols tar gzip file appstream" if [ "$(dpkg --print-architecture)" = "$arch_deb" ] then pkgs="$pkgs build-essential" @@ -608,7 +608,7 @@ else fi # Establish architecture-specific dependencies we don't want listed on the readme... - pkgs="$pkgs linux-libc-dev:$arch_deb extra-cmake-modules:$arch_deb qttools5-dev:$arch_deb qtbase5-private-dev:$arch_deb" + pkgs="$pkgs linux-libc-dev:$arch_deb qttools5-dev:$arch_deb qtbase5-private-dev:$arch_deb" # ...and the ones we do want listed. Non-dev packages fill missing spots on the list. libpkgs="" From a06491813389b11b9f45be6020532a557be93d8a Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 26 Jul 2022 00:18:28 +0200 Subject: [PATCH 157/386] WIN_WRITE_MULTIPLE now correctly fails with command aborted if ide->blocksize = 0, instead of a fatal(). --- src/disk/hdc_ide.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/src/disk/hdc_ide.c b/src/disk/hdc_ide.c index 55f60c8e3..b49e2e926 100644 --- a/src/disk/hdc_ide.c +++ b/src/disk/hdc_ide.c @@ -1682,8 +1682,7 @@ ide_writeb(uint16_t addr, uint8_t val, void *priv) return; case WIN_WRITE_MULTIPLE: - if (!ide->blocksize && (ide->type != IDE_ATAPI)) - fatal("Write_MULTIPLE - blocksize = 0\n"); + /* Fatal removed for the same reason as for WIN_READ_MULTIPLE. */ ide->blockcount = 0; /* Turn on the activity indicator *here* so that it gets turned on less times. */ @@ -2410,7 +2409,13 @@ ide_callback(void *priv) return; case WIN_WRITE_MULTIPLE: - if (ide->type == IDE_ATAPI) + /* According to the official ATA reference: + + If the Read Multiple command is attempted before the Set Multiple Mode + command has been executed or when Read Multiple commands are + disabled, the Read Multiple operation is rejected with an Aborted Com- + mand error. */ + if ((ide->type == IDE_ATAPI) || !ide->blocksize) goto abort_cmd; if (!ide->lba && (ide->cfg_spt == 0)) goto id_not_found; From 1261f1cedb3e1fb61138385d176d7205ce7ac374 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 26 Jul 2022 06:20:57 +0200 Subject: [PATCH 158/386] Some patches to YMFM for OPL3 to correctly instantly begin counting on control register write instead of only after a period. --- src/sound/snd_opl_ymfm.cpp | 20 ++++++++++++++++---- src/sound/ymfm/ymfm.h | 2 ++ src/sound/ymfm/ymfm_fm.ipp | 12 +++++++++--- 3 files changed, 27 insertions(+), 7 deletions(-) diff --git a/src/sound/snd_opl_ymfm.cpp b/src/sound/snd_opl_ymfm.cpp index 6acbf79f3..28ea7a621 100644 --- a/src/sound/snd_opl_ymfm.cpp +++ b/src/sound/snd_opl_ymfm.cpp @@ -21,6 +21,7 @@ #include "ymfm/ymfm_opl.h" extern "C" { +#include <86box/86box.h> #include <86box/timer.h> #include <86box/device.h> #include <86box/sound.h> @@ -81,6 +82,9 @@ public: memset(m_oldsamples, 0, sizeof(m_oldsamples)); m_rateratio = (samplerate << RSM_FRAC) / m_chip.sample_rate(m_clock); m_clock_us = 1000000 / (double) m_clock; + m_subtract[0] = 80.0; + m_subtract[1] = 320.0; + m_type = type; timer_add(&m_timers[0], YMFMChip::timer1, this, 0); timer_add(&m_timers[1], YMFMChip::timer2, this, 0); @@ -97,11 +101,14 @@ public: return; pc_timer_t *timer = &m_timers[tnum]; - if (duration_in_clocks < 0) { + if (duration_in_clocks < 0) timer_stop(timer); - } else { + else { double period = m_clock_us * duration_in_clocks; - timer_on_auto(timer, period); + if (period < m_subtract[tnum]) + m_engine->engine_timer_expired(tnum); + else + timer_on_auto(timer, period); } } @@ -172,6 +179,11 @@ virtual void generate_resampled(int32_t *data, uint32_t num_samples) override return m_chip.read(addr); } + virtual uint32_t get_special_flags(void) override + { + return ((m_type == FM_YMF262) || (m_type == FM_YMF289B)) ? 0x8000 : 0x0000; + } + static void timer1(void *priv) { YMFMChip *drv = (YMFMChip *) priv; @@ -187,7 +199,7 @@ virtual void generate_resampled(int32_t *data, uint32_t num_samples) override private: ChipType m_chip; uint32_t m_clock; - double m_clock_us; + double m_clock_us, m_subtract[2]; typename ChipType::output_data m_output; pc_timer_t m_timers[2]; diff --git a/src/sound/ymfm/ymfm.h b/src/sound/ymfm/ymfm.h index d9c3bca3b..ae13faedd 100644 --- a/src/sound/ymfm/ymfm.h +++ b/src/sound/ymfm/ymfm.h @@ -543,6 +543,8 @@ public: // noted busy end time and return true if we haven't yet passed it virtual bool ymfm_is_busy() { return false; } + virtual uint32_t get_special_flags(void) { return 0x0000; } + // // I/O functions // diff --git a/src/sound/ymfm/ymfm_fm.ipp b/src/sound/ymfm/ymfm_fm.ipp index 17bbc9150..7e5109d59 100644 --- a/src/sound/ymfm/ymfm_fm.ipp +++ b/src/sound/ymfm/ymfm_fm.ipp @@ -1472,11 +1472,14 @@ void fm_engine_base::assign_operators() template void fm_engine_base::update_timer(uint32_t tnum, uint32_t enable, int32_t delta_clocks) { + uint32_t subtract = !!(tnum >> 15); + tnum &= 0x7fff; + // if the timer is live, but not currently enabled, set the timer if (enable && !m_timer_running[tnum]) { // period comes from the registers, and is different for each - uint32_t period = (tnum == 0) ? (1024 - m_regs.timer_a_value()) : 16 * (256 - m_regs.timer_b_value()); + uint32_t period = (tnum == 0) ? (1024 - subtract - m_regs.timer_a_value()) : 16 * (256 - subtract - m_regs.timer_b_value()); // caller can also specify a delta to account for other effects period += delta_clocks; @@ -1581,8 +1584,11 @@ void fm_engine_base::engine_mode_write(uint8_t data) // load timers; note that timer B gets a small negative adjustment because // the *16 multiplier is free-running, so the first tick of the clock // is a bit shorter - update_timer(1, m_regs.load_timer_b(), -(m_total_clocks & 15)); - update_timer(0, m_regs.load_timer_a(), 0); + // OPL3 begins counting immediately instead of after the first period is over. + // We use bit 15 of the timer number on those chips to inform that this was a + // control register write, and to therefore, subtract 1 counting cycle. + update_timer(1 | m_intf.get_special_flags(), m_regs.load_timer_b(), -(m_total_clocks & 15)); + update_timer(0 | m_intf.get_special_flags(), m_regs.load_timer_a(), 0); } } From 6452e89235bae84e110a52550ae009098e406de7 Mon Sep 17 00:00:00 2001 From: Alexander Babikov <2708460+lemondrops@users.noreply.github.com> Date: Sun, 24 Jul 2022 07:52:28 +0500 Subject: [PATCH 159/386] Fix a typo in qt_platform.cpp --- src/qt/qt_platform.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_platform.cpp b/src/qt/qt_platform.cpp index 89ead7acd..d1f5318ba 100644 --- a/src/qt/qt_platform.cpp +++ b/src/qt/qt_platform.cpp @@ -571,7 +571,7 @@ void ProgSettings::reloadStrings() gssynthstr.replace("libgs", LIB_NAME_GS); } else gssynthstr.prepend(LIB_NAME_GS); - translatedstrings[IDS_2132] = flsynthstr.toStdWString(); + translatedstrings[IDS_2132] = gssynthstr.toStdWString(); auto ftsynthstr = QCoreApplication::translate("", " is required for ESC/P printer emulation."); if (ftsynthstr.contains("libfreetype")) { From 16914e76ac0cb7b83aeb521db83b0c821766c3b8 Mon Sep 17 00:00:00 2001 From: Alexander Babikov <2708460+lemondrops@users.noreply.github.com> Date: Mon, 25 Jul 2022 20:08:32 +0500 Subject: [PATCH 160/386] Add an option to control SBMIDI input receiving on SB Pro MCV --- src/sound/snd_sb.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/src/sound/snd_sb.c b/src/sound/snd_sb.c index 16fcfe9d3..cb34de52d 100644 --- a/src/sound/snd_sb.c +++ b/src/sound/snd_sb.c @@ -2749,6 +2749,17 @@ static const device_config_t sb_pro_config[] = { { .name = "", .description = "", .type = CONFIG_END } }; +static const device_config_t sb_pro_mcv_config[] = { + { + .name = "receive_input", + .description = "Receive input (SB MIDI)", + .type = CONFIG_BINARY, + .default_string = "", + .default_int = 1 + }, + { .name = "", .description = "", .type = CONFIG_END } +}; + static const device_config_t sb_16_config[] = { { .name = "base", @@ -3523,7 +3534,7 @@ const device_t sb_pro_mcv_device = { { .available = NULL }, .speed_changed = sb_speed_changed, .force_redraw = NULL, - .config = NULL + .config = sb_pro_mcv_config }; const device_t sb_pro_compat_device = { From 2706366b21b98c8303f466c67fa9dc5c3be93f02 Mon Sep 17 00:00:00 2001 From: Alexander Babikov <2708460+lemondrops@users.noreply.github.com> Date: Tue, 26 Jul 2022 10:13:23 +0500 Subject: [PATCH 161/386] qt: Add the FM synth driver select option to the UI --- src/qt/qt_settingssound.cpp | 14 ++++++++++++++ src/qt/qt_settingssound.ui | 29 +++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+) diff --git a/src/qt/qt_settingssound.cpp b/src/qt/qt_settingssound.cpp index 56391569a..1c441b8ef 100644 --- a/src/qt/qt_settingssound.cpp +++ b/src/qt/qt_settingssound.cpp @@ -25,6 +25,7 @@ extern "C" { #include <86box/sound.h> #include <86box/midi.h> #include <86box/snd_mpu401.h> +#include <86box/snd_opl.h> } #include "qt_deviceconfig.hpp" @@ -52,6 +53,10 @@ void SettingsSound::save() { GAMEBLASTER = ui->checkBoxCMS->isChecked() ? 1 : 0; GUS = ui->checkBoxGUS->isChecked() ? 1 : 0;; sound_is_float = ui->checkBoxFloat32->isChecked() ? 1 : 0;; + if (ui->radioButtonYMFM->isChecked()) + fm_driver = FM_DRV_YMFM; + else + fm_driver = FM_DRV_NUKED; } void SettingsSound::onCurrentMachineChanged(int machineId) { @@ -151,6 +156,15 @@ void SettingsSound::onCurrentMachineChanged(int machineId) { ui->pushButtonConfigureGUS->setEnabled((GUS > 0) && hasIsa16); ui->checkBoxSSI2001->setEnabled(hasIsa); ui->pushButtonConfigureSSI2001->setEnabled((SSI2001 > 0) && hasIsa); + switch (fm_driver) { + case FM_DRV_YMFM: + ui->radioButtonYMFM->setChecked(true); + break; + case FM_DRV_NUKED: + default: + ui->radioButtonNuked->setChecked(true); + break; + } } static bool allowMpu401(Ui::SettingsSound *ui) { diff --git a/src/qt/qt_settingssound.ui b/src/qt/qt_settingssound.ui index 65f5d7fd6..446b30d60 100644 --- a/src/qt/qt_settingssound.ui +++ b/src/qt/qt_settingssound.ui @@ -152,6 +152,35 @@ + + + + 0 + 0 + + + + FM synth driver + + + + + + Nuked + + + + + + + YMFM + + + + + + + Qt::Vertical From 9f77a00d3238840004c45d480032a93c1cb3a88b Mon Sep 17 00:00:00 2001 From: Alexander Babikov <2708460+lemondrops@users.noreply.github.com> Date: Tue, 26 Jul 2022 10:14:13 +0500 Subject: [PATCH 162/386] win: Add the FM synth driver select option to the UI --- src/include/86box/resource.h | 3 +++ src/win/languages/cs-CZ.rc | 3 +++ src/win/languages/de-DE.rc | 3 +++ src/win/languages/dialogs.rc | 16 ++++++++++++++++ src/win/languages/en-GB.rc | 3 +++ src/win/languages/en-US.rc | 3 +++ src/win/languages/es-ES.rc | 3 +++ src/win/languages/fi-FI.rc | 3 +++ src/win/languages/fr-FR.rc | 3 +++ src/win/languages/hr-HR.rc | 3 +++ src/win/languages/hu-HU.rc | 3 +++ src/win/languages/it-IT.rc | 3 +++ src/win/languages/ja-JP.rc | 3 +++ src/win/languages/ko-KR.rc | 3 +++ src/win/languages/pl-PL.rc | 3 +++ src/win/languages/pt-BR.rc | 3 +++ src/win/languages/pt-PT.rc | 3 +++ src/win/languages/ru-RU.rc | 3 +++ src/win/languages/sl-SI.rc | 3 +++ src/win/languages/tr-TR.rc | 3 +++ src/win/languages/uk-UA.rc | 3 +++ src/win/languages/zh-CN.rc | 3 +++ src/win/win_settings.c | 16 ++++++++++++++-- 23 files changed, 93 insertions(+), 2 deletions(-) diff --git a/src/include/86box/resource.h b/src/include/86box/resource.h index 75d056ea1..f0dd948ae 100644 --- a/src/include/86box/resource.h +++ b/src/include/86box/resource.h @@ -207,6 +207,9 @@ #define IDC_COMBO_MIDI_IN 1050 #define IDC_CONFIGURE_CMS 1051 #define IDC_CONFIGURE_SSI 1052 +#define IDC_FM_DRIVER 1053 +#define IDC_RADIO_FM_DRV_NUKED 1054 +#define IDC_RADIO_FM_DRV_YMFM 1055 #define IDC_COMBO_NET_TYPE 1060 /* network config */ #define IDC_COMBO_PCAP 1061 diff --git a/src/win/languages/cs-CZ.rc b/src/win/languages/cs-CZ.rc index a28b99a84..7f68db733 100644 --- a/src/win/languages/cs-CZ.rc +++ b/src/win/languages/cs-CZ.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Použít zvuk FLOAT32" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Druh sítě:" #define STR_PCAP "PCap zařízení:" diff --git a/src/win/languages/de-DE.rc b/src/win/languages/de-DE.rc index 27644e4a7..f1e529bdb 100644 --- a/src/win/languages/de-DE.rc +++ b/src/win/languages/de-DE.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "FLOAT32-Wiedergabe benutzen" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Netzwerktyp:" #define STR_PCAP "PCap-Gerät:" diff --git a/src/win/languages/dialogs.rc b/src/win/languages/dialogs.rc index 45a767ea3..87240161c 100644 --- a/src/win/languages/dialogs.rc +++ b/src/win/languages/dialogs.rc @@ -364,6 +364,17 @@ BEGIN CONTROL STR_FLOAT, IDC_CHECK_FLOAT, "Button", BS_AUTOCHECKBOX | WS_TABSTOP, CFG_HMARGIN, 138, 104, CFG_CHECKBOX_HEIGHT + + GROUPBOX STR_FM_DRIVER, IDC_FM_DRIVER, + CFG_HMARGIN, 156, 100, 36 + + CONTROL STR_FM_DRV_NUKED, IDC_RADIO_FM_DRV_NUKED, + "Button", BS_AUTORADIOBUTTON | WS_GROUP | WS_TABSTOP, + 14, 171, 40, CFG_CHECKBOX_HEIGHT + + CONTROL STR_FM_DRV_YMFM, IDC_RADIO_FM_DRV_YMFM, + "Button", BS_AUTORADIOBUTTON | WS_TABSTOP, + 62, 171, 40, CFG_CHECKBOX_HEIGHT END DLG_CFG_NETWORK DIALOG DISCARDABLE CFG_PANE_LEFT, CFG_PANE_TOP, CFG_PANE_WIDTH, CFG_PANE_HEIGHT @@ -924,6 +935,8 @@ END #undef STR_VIDEO #undef STR_VOODOO +#undef STR_IBM8514 +#undef STR_XGA #undef STR_MOUSE #undef STR_JOYSTICK @@ -940,6 +953,9 @@ END #undef STR_CMS #undef STR_GUS #undef STR_FLOAT +#undef STR_FM_DRIVER +#undef STR_FM_DRV_NUKED +#undef STR_FM_DRV_YMFM #undef STR_NET_TYPE #undef STR_PCAP diff --git a/src/win/languages/en-GB.rc b/src/win/languages/en-GB.rc index fbbb982cf..5fb0f3ca1 100644 --- a/src/win/languages/en-GB.rc +++ b/src/win/languages/en-GB.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Use FLOAT32 sound" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Network type:" #define STR_PCAP "PCap device:" diff --git a/src/win/languages/en-US.rc b/src/win/languages/en-US.rc index 5a5839686..294734029 100644 --- a/src/win/languages/en-US.rc +++ b/src/win/languages/en-US.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Use FLOAT32 sound" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Network type:" #define STR_PCAP "PCap device:" diff --git a/src/win/languages/es-ES.rc b/src/win/languages/es-ES.rc index b7eb61d24..47696e076 100644 --- a/src/win/languages/es-ES.rc +++ b/src/win/languages/es-ES.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Usar sonido FLOAT32" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Tipo de red:" #define STR_PCAP "Dispositivo PCap:" diff --git a/src/win/languages/fi-FI.rc b/src/win/languages/fi-FI.rc index a8dc55b72..679fdd87c 100644 --- a/src/win/languages/fi-FI.rc +++ b/src/win/languages/fi-FI.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Käytä FLOAT32-ääntä" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Verkon tyyppi:" #define STR_PCAP "PCap-laite:" diff --git a/src/win/languages/fr-FR.rc b/src/win/languages/fr-FR.rc index 11fc3360e..86fc7c10c 100644 --- a/src/win/languages/fr-FR.rc +++ b/src/win/languages/fr-FR.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Utiliser le son FLOAT32" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Type de réseau:" #define STR_PCAP "Dispositif PCap:" diff --git a/src/win/languages/hr-HR.rc b/src/win/languages/hr-HR.rc index 60e6e28c4..cdd37a995 100644 --- a/src/win/languages/hr-HR.rc +++ b/src/win/languages/hr-HR.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Koristi FLOAT32 za zvuk" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Tip mreže:" #define STR_PCAP "Uređaj PCap:" diff --git a/src/win/languages/hu-HU.rc b/src/win/languages/hu-HU.rc index 6b4dae959..d7fe4a000 100644 --- a/src/win/languages/hu-HU.rc +++ b/src/win/languages/hu-HU.rc @@ -294,6 +294,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "FLOAT32 használata" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Hálózati típusa:" #define STR_PCAP "PCap eszköz:" diff --git a/src/win/languages/it-IT.rc b/src/win/languages/it-IT.rc index 20d301f47..771c4d443 100644 --- a/src/win/languages/it-IT.rc +++ b/src/win/languages/it-IT.rc @@ -290,6 +290,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Usa suono FLOAT32" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Tipo di rete:" #define STR_PCAP "Dispositivo PCap:" diff --git a/src/win/languages/ja-JP.rc b/src/win/languages/ja-JP.rc index 151e13e65..4b7dd37af 100644 --- a/src/win/languages/ja-JP.rc +++ b/src/win/languages/ja-JP.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "FLOAT32サウンドを使用する" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "ネットワークタイプ:" #define STR_PCAP "PCapデバイス:" diff --git a/src/win/languages/ko-KR.rc b/src/win/languages/ko-KR.rc index 831ca74bb..49e02b2bd 100644 --- a/src/win/languages/ko-KR.rc +++ b/src/win/languages/ko-KR.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "FLOAT32 사운드 사용" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "네트워크 종류:" #define STR_PCAP "PCap 장치:" diff --git a/src/win/languages/pl-PL.rc b/src/win/languages/pl-PL.rc index 211eb3ed8..3229bdb2c 100644 --- a/src/win/languages/pl-PL.rc +++ b/src/win/languages/pl-PL.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Użyj dźwięku FLOAT32" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Rodzaj sieci:" #define STR_PCAP "Urządzenie PCap:" diff --git a/src/win/languages/pt-BR.rc b/src/win/languages/pt-BR.rc index 5e23a9d71..a3a751612 100644 --- a/src/win/languages/pt-BR.rc +++ b/src/win/languages/pt-BR.rc @@ -292,6 +292,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Usar som FLOAT32" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Tipo de rede:" #define STR_PCAP "Dispositivo PCap:" diff --git a/src/win/languages/pt-PT.rc b/src/win/languages/pt-PT.rc index fafc21df4..30f3ed652 100644 --- a/src/win/languages/pt-PT.rc +++ b/src/win/languages/pt-PT.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Utilizar som FLOAT32" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Tipo de rede:" #define STR_PCAP "Dispositivo PCap:" diff --git a/src/win/languages/ru-RU.rc b/src/win/languages/ru-RU.rc index 15bd1752d..06812f592 100644 --- a/src/win/languages/ru-RU.rc +++ b/src/win/languages/ru-RU.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "FLOAT32 звук" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Тип сети:" #define STR_PCAP "Устройство PCap:" diff --git a/src/win/languages/sl-SI.rc b/src/win/languages/sl-SI.rc index 7d715c5ca..41be02e1e 100644 --- a/src/win/languages/sl-SI.rc +++ b/src/win/languages/sl-SI.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Uporabi FLOAT32 za zvok" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Vrsta omrežja:" #define STR_PCAP "Naprava PCap:" diff --git a/src/win/languages/tr-TR.rc b/src/win/languages/tr-TR.rc index cc3a98406..bf07d6075 100644 --- a/src/win/languages/tr-TR.rc +++ b/src/win/languages/tr-TR.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "FLOAT32 ses kullan" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Ağ tipi:" #define STR_PCAP "PCap cihazı:" diff --git a/src/win/languages/uk-UA.rc b/src/win/languages/uk-UA.rc index dfb86cc8b..ac467e5c1 100644 --- a/src/win/languages/uk-UA.rc +++ b/src/win/languages/uk-UA.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "FLOAT32 звук" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "Тип мережі:" #define STR_PCAP "Пристрій PCap:" diff --git a/src/win/languages/zh-CN.rc b/src/win/languages/zh-CN.rc index a3c324c6c..b3ba924c5 100644 --- a/src/win/languages/zh-CN.rc +++ b/src/win/languages/zh-CN.rc @@ -289,6 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "使用单精度浮点 (FLOAT32)" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked" +#define STR_FM_DRV_YMFM "YMFM" #define STR_NET_TYPE "网络类型:" #define STR_PCAP "PCap 设备:" diff --git a/src/win/win_settings.c b/src/win/win_settings.c index 84ad26754..227c007b1 100644 --- a/src/win/win_settings.c +++ b/src/win/win_settings.c @@ -63,6 +63,7 @@ #include <86box/sound.h> #include <86box/midi.h> #include <86box/snd_mpu401.h> +#include <86box/snd_opl.h> #include <86box/video.h> #include <86box/vid_xga_device.h> #include <86box/plat.h> @@ -94,7 +95,7 @@ static int temp_mouse, temp_joystick; /* Sound category */ static int temp_sound_card, temp_midi_output_device, temp_midi_input_device, temp_mpu401, temp_SSI2001, temp_GAMEBLASTER, temp_GUS; -static int temp_float; +static int temp_float, temp_fm_driver; /* Network category */ static int temp_net_type, temp_net_card; @@ -350,6 +351,7 @@ win_settings_init(void) temp_GAMEBLASTER = GAMEBLASTER; temp_GUS = GUS; temp_float = sound_is_float; + temp_fm_driver = fm_driver; /* Network category */ temp_net_type = network_type; @@ -476,6 +478,7 @@ win_settings_changed(void) i = i || (GAMEBLASTER != temp_GAMEBLASTER); i = i || (GUS != temp_GUS); i = i || (sound_is_float != temp_float); + i = i || (fm_driver != temp_fm_driver); /* Network category */ i = i || (network_type != temp_net_type); @@ -568,6 +571,7 @@ win_settings_save(void) GAMEBLASTER = temp_GAMEBLASTER; GUS = temp_GUS; sound_is_float = temp_float; + fm_driver = temp_fm_driver; /* Network category */ network_type = temp_net_type; @@ -1421,6 +1425,11 @@ win_settings_sound_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) settings_enable_window(hdlg, IDC_CONFIGURE_SSI, machine_has_bus(temp_machine, MACHINE_BUS_ISA) && temp_SSI2001); settings_set_check(hdlg, IDC_CHECK_FLOAT, temp_float); + if (temp_fm_driver == FM_DRV_YMFM) + settings_set_check(hdlg, IDC_RADIO_FM_DRV_YMFM, BST_CHECKED); + else + settings_set_check(hdlg, IDC_RADIO_FM_DRV_NUKED, BST_CHECKED); + free(lptsTemp); return TRUE; @@ -1517,7 +1526,10 @@ win_settings_sound_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) temp_GUS = settings_get_check(hdlg, IDC_CHECK_GUS); temp_SSI2001 = settings_get_check(hdlg, IDC_CHECK_SSI); temp_float = settings_get_check(hdlg, IDC_CHECK_FLOAT); - + if (settings_get_check(hdlg, IDC_RADIO_FM_DRV_NUKED)) + temp_fm_driver = FM_DRV_NUKED; + if (settings_get_check(hdlg, IDC_RADIO_FM_DRV_YMFM)) + temp_fm_driver = FM_DRV_YMFM; default: return FALSE; } From f51c4cbaab806802dd1f8a45bec4051db5130fc5 Mon Sep 17 00:00:00 2001 From: Alexander Babikov <2708460+lemondrops@users.noreply.github.com> Date: Tue, 26 Jul 2022 17:02:27 +0500 Subject: [PATCH 163/386] Adjust the layout and label text of the FM synth driver option --- src/qt/qt_settingssound.ui | 6 +++--- src/win/languages/cs-CZ.rc | 6 +++--- src/win/languages/de-DE.rc | 6 +++--- src/win/languages/dialogs.rc | 6 +++--- src/win/languages/en-GB.rc | 6 +++--- src/win/languages/en-US.rc | 6 +++--- src/win/languages/es-ES.rc | 6 +++--- src/win/languages/fi-FI.rc | 6 +++--- src/win/languages/fr-FR.rc | 6 +++--- src/win/languages/hr-HR.rc | 6 +++--- src/win/languages/hu-HU.rc | 6 +++--- src/win/languages/it-IT.rc | 6 +++--- src/win/languages/ja-JP.rc | 6 +++--- src/win/languages/ko-KR.rc | 6 +++--- src/win/languages/pl-PL.rc | 6 +++--- src/win/languages/pt-BR.rc | 6 +++--- src/win/languages/pt-PT.rc | 6 +++--- src/win/languages/ru-RU.rc | 6 +++--- src/win/languages/sl-SI.rc | 6 +++--- src/win/languages/tr-TR.rc | 6 +++--- src/win/languages/uk-UA.rc | 6 +++--- src/win/languages/zh-CN.rc | 6 +++--- 22 files changed, 66 insertions(+), 66 deletions(-) diff --git a/src/qt/qt_settingssound.ui b/src/qt/qt_settingssound.ui index 446b30d60..9ae91dcd2 100644 --- a/src/qt/qt_settingssound.ui +++ b/src/qt/qt_settingssound.ui @@ -162,18 +162,18 @@ FM synth driver - + - Nuked + Nuked (more accurate) - YMFM + YMFM (faster) diff --git a/src/win/languages/cs-CZ.rc b/src/win/languages/cs-CZ.rc index 7f68db733..c7bdb3cb1 100644 --- a/src/win/languages/cs-CZ.rc +++ b/src/win/languages/cs-CZ.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Použít zvuk FLOAT32" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Druh sítě:" #define STR_PCAP "PCap zařízení:" diff --git a/src/win/languages/de-DE.rc b/src/win/languages/de-DE.rc index f1e529bdb..d99095d56 100644 --- a/src/win/languages/de-DE.rc +++ b/src/win/languages/de-DE.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "FLOAT32-Wiedergabe benutzen" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Netzwerktyp:" #define STR_PCAP "PCap-Gerät:" diff --git a/src/win/languages/dialogs.rc b/src/win/languages/dialogs.rc index 87240161c..bd1eb87bd 100644 --- a/src/win/languages/dialogs.rc +++ b/src/win/languages/dialogs.rc @@ -366,15 +366,15 @@ BEGIN CFG_HMARGIN, 138, 104, CFG_CHECKBOX_HEIGHT GROUPBOX STR_FM_DRIVER, IDC_FM_DRIVER, - CFG_HMARGIN, 156, 100, 36 + CFG_HMARGIN, 154, 110, 42 CONTROL STR_FM_DRV_NUKED, IDC_RADIO_FM_DRV_NUKED, "Button", BS_AUTORADIOBUTTON | WS_GROUP | WS_TABSTOP, - 14, 171, 40, CFG_CHECKBOX_HEIGHT + 14, 166, CFG_CHECKBOX_PRI_WIDTH, CFG_CHECKBOX_HEIGHT CONTROL STR_FM_DRV_YMFM, IDC_RADIO_FM_DRV_YMFM, "Button", BS_AUTORADIOBUTTON | WS_TABSTOP, - 62, 171, 40, CFG_CHECKBOX_HEIGHT + 14, 180, CFG_CHECKBOX_PRI_WIDTH, CFG_CHECKBOX_HEIGHT END DLG_CFG_NETWORK DIALOG DISCARDABLE CFG_PANE_LEFT, CFG_PANE_TOP, CFG_PANE_WIDTH, CFG_PANE_HEIGHT diff --git a/src/win/languages/en-GB.rc b/src/win/languages/en-GB.rc index 5fb0f3ca1..9c1e8acd7 100644 --- a/src/win/languages/en-GB.rc +++ b/src/win/languages/en-GB.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Use FLOAT32 sound" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Network type:" #define STR_PCAP "PCap device:" diff --git a/src/win/languages/en-US.rc b/src/win/languages/en-US.rc index 294734029..5a5fa4fd2 100644 --- a/src/win/languages/en-US.rc +++ b/src/win/languages/en-US.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Use FLOAT32 sound" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Network type:" #define STR_PCAP "PCap device:" diff --git a/src/win/languages/es-ES.rc b/src/win/languages/es-ES.rc index 47696e076..3dc9757ea 100644 --- a/src/win/languages/es-ES.rc +++ b/src/win/languages/es-ES.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Usar sonido FLOAT32" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Tipo de red:" #define STR_PCAP "Dispositivo PCap:" diff --git a/src/win/languages/fi-FI.rc b/src/win/languages/fi-FI.rc index 679fdd87c..d1b390bcd 100644 --- a/src/win/languages/fi-FI.rc +++ b/src/win/languages/fi-FI.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Käytä FLOAT32-ääntä" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Verkon tyyppi:" #define STR_PCAP "PCap-laite:" diff --git a/src/win/languages/fr-FR.rc b/src/win/languages/fr-FR.rc index 86fc7c10c..eab96bf05 100644 --- a/src/win/languages/fr-FR.rc +++ b/src/win/languages/fr-FR.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Utiliser le son FLOAT32" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Type de réseau:" #define STR_PCAP "Dispositif PCap:" diff --git a/src/win/languages/hr-HR.rc b/src/win/languages/hr-HR.rc index cdd37a995..3cb8eb6d3 100644 --- a/src/win/languages/hr-HR.rc +++ b/src/win/languages/hr-HR.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Koristi FLOAT32 za zvuk" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Tip mreže:" #define STR_PCAP "Uređaj PCap:" diff --git a/src/win/languages/hu-HU.rc b/src/win/languages/hu-HU.rc index d7fe4a000..7c2e1cf5e 100644 --- a/src/win/languages/hu-HU.rc +++ b/src/win/languages/hu-HU.rc @@ -294,9 +294,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "FLOAT32 használata" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Hálózati típusa:" #define STR_PCAP "PCap eszköz:" diff --git a/src/win/languages/it-IT.rc b/src/win/languages/it-IT.rc index 771c4d443..ca24daed4 100644 --- a/src/win/languages/it-IT.rc +++ b/src/win/languages/it-IT.rc @@ -290,9 +290,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Usa suono FLOAT32" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Tipo di rete:" #define STR_PCAP "Dispositivo PCap:" diff --git a/src/win/languages/ja-JP.rc b/src/win/languages/ja-JP.rc index 4b7dd37af..18017bfb4 100644 --- a/src/win/languages/ja-JP.rc +++ b/src/win/languages/ja-JP.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "FLOAT32サウンドを使用する" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "ネットワークタイプ:" #define STR_PCAP "PCapデバイス:" diff --git a/src/win/languages/ko-KR.rc b/src/win/languages/ko-KR.rc index 49e02b2bd..961b00748 100644 --- a/src/win/languages/ko-KR.rc +++ b/src/win/languages/ko-KR.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "FLOAT32 사운드 사용" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "네트워크 종류:" #define STR_PCAP "PCap 장치:" diff --git a/src/win/languages/pl-PL.rc b/src/win/languages/pl-PL.rc index 3229bdb2c..5405778d3 100644 --- a/src/win/languages/pl-PL.rc +++ b/src/win/languages/pl-PL.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Użyj dźwięku FLOAT32" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Rodzaj sieci:" #define STR_PCAP "Urządzenie PCap:" diff --git a/src/win/languages/pt-BR.rc b/src/win/languages/pt-BR.rc index a3a751612..538472293 100644 --- a/src/win/languages/pt-BR.rc +++ b/src/win/languages/pt-BR.rc @@ -292,9 +292,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Usar som FLOAT32" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Tipo de rede:" #define STR_PCAP "Dispositivo PCap:" diff --git a/src/win/languages/pt-PT.rc b/src/win/languages/pt-PT.rc index 30f3ed652..314f7ed56 100644 --- a/src/win/languages/pt-PT.rc +++ b/src/win/languages/pt-PT.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Utilizar som FLOAT32" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Tipo de rede:" #define STR_PCAP "Dispositivo PCap:" diff --git a/src/win/languages/ru-RU.rc b/src/win/languages/ru-RU.rc index 06812f592..e88d9668e 100644 --- a/src/win/languages/ru-RU.rc +++ b/src/win/languages/ru-RU.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "FLOAT32 звук" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Тип сети:" #define STR_PCAP "Устройство PCap:" diff --git a/src/win/languages/sl-SI.rc b/src/win/languages/sl-SI.rc index 41be02e1e..e8672235f 100644 --- a/src/win/languages/sl-SI.rc +++ b/src/win/languages/sl-SI.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "Uporabi FLOAT32 za zvok" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Vrsta omrežja:" #define STR_PCAP "Naprava PCap:" diff --git a/src/win/languages/tr-TR.rc b/src/win/languages/tr-TR.rc index bf07d6075..3d1cffc97 100644 --- a/src/win/languages/tr-TR.rc +++ b/src/win/languages/tr-TR.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "FLOAT32 ses kullan" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Ağ tipi:" #define STR_PCAP "PCap cihazı:" diff --git a/src/win/languages/uk-UA.rc b/src/win/languages/uk-UA.rc index ac467e5c1..5a741a5c9 100644 --- a/src/win/languages/uk-UA.rc +++ b/src/win/languages/uk-UA.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "FLOAT32 звук" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "Тип мережі:" #define STR_PCAP "Пристрій PCap:" diff --git a/src/win/languages/zh-CN.rc b/src/win/languages/zh-CN.rc index b3ba924c5..3151b7143 100644 --- a/src/win/languages/zh-CN.rc +++ b/src/win/languages/zh-CN.rc @@ -289,9 +289,9 @@ END #define STR_CMS "CMS / Game Blaster" #define STR_GUS "Gravis Ultrasound" #define STR_FLOAT "使用单精度浮点 (FLOAT32)" -#define STR_FM_DRIVER "FM synth driver" -#define STR_FM_DRV_NUKED "Nuked" -#define STR_FM_DRV_YMFM "YMFM" +#define STR_FM_DRIVER "FM synth driver" +#define STR_FM_DRV_NUKED "Nuked (more accurate)" +#define STR_FM_DRV_YMFM "YMFM (faster)" #define STR_NET_TYPE "网络类型:" #define STR_PCAP "PCap 设备:" From 2123f24d8fe02e2f9d812e0c72c09de8741f1c9d Mon Sep 17 00:00:00 2001 From: Alexander Babikov <2708460+lemondrops@users.noreply.github.com> Date: Tue, 26 Jul 2022 17:03:04 +0500 Subject: [PATCH 164/386] Fix a crash with Sound Blaster Pro v2 --- src/sound/snd_sb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sound/snd_sb.c b/src/sound/snd_sb.c index 16fcfe9d3..48fce0ddc 100644 --- a/src/sound/snd_sb.c +++ b/src/sound/snd_sb.c @@ -314,7 +314,7 @@ sb_get_buffer_sbpro(int32_t *buffer, int len, void *p) if (sb->opl_enabled) { sb->opl.reset_buffer(sb->opl.priv); - if (sb->dsp.sb_type != SBPRO) + if (sb->dsp.sb_type == SBPRO) sb->opl2.reset_buffer(sb->opl2.priv); } From 87cf281035a60ae18f544e88c20370fb0d0d57ce Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 26 Jul 2022 22:32:01 +0200 Subject: [PATCH 165/386] DECpc LPV fixes and implementation of the on-board S3 805 with the AT&T 490 RAMDAC, fixes #2349. --- src/include/86box/video.h | 1 + src/machine/m_at_386dx_486.c | 7 +++++-- src/machine/machine_table.c | 4 ++-- src/video/vid_s3.c | 36 +++++++++++++++++++++++++++++++++++- 4 files changed, 43 insertions(+), 5 deletions(-) diff --git a/src/include/86box/video.h b/src/include/86box/video.h index 1216257bc..8aa52daa0 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -441,6 +441,7 @@ extern const device_t s3_metheus_86c928_isa_device; extern const device_t s3_metheus_86c928_vlb_device; extern const device_t s3_spea_mercury_lite_86c928_pci_device; extern const device_t s3_spea_mirage_86c801_isa_device; +extern const device_t s3_86c805_onboard_vlb_device; extern const device_t s3_spea_mirage_86c805_vlb_device; extern const device_t s3_mirocrystal_8s_805_vlb_device; extern const device_t s3_mirocrystal_10sd_805_vlb_device; diff --git a/src/machine/m_at_386dx_486.c b/src/machine/m_at_386dx_486.c index 72e8eaa6a..7baa85ed3 100644 --- a/src/machine/m_at_386dx_486.c +++ b/src/machine/m_at_386dx_486.c @@ -441,11 +441,14 @@ machine_at_decpclpv_init(const machine_t *model) machine_at_common_init(model); device_add(&sis_85c461_device); + + if (gfxcard == VID_INTERNAL) + device_add(&s3_86c805_onboard_vlb_device); + /* TODO: Phoenix MultiKey KBC */ device_add(&keyboard_ps2_ami_pci_device); device_add(&ide_isa_2ch_device); - device_add(&fdc37c663_device); - /* TODO: On-board S3 805 with AT&T 490 RAM DAC. */ + device_add(&fdc37c663_ide_device); return ret; } diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 6ece57fdf..7194ca2d9 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -4721,7 +4721,7 @@ const machine_t machines[] = { .max_multi = 0 }, .bus_flags = MACHINE_PS2, - .flags = MACHINE_IDE_DUAL, /* No MACHINE_VIDEO yet, because on-board video is not yet implemented. */ + .flags = MACHINE_IDE_DUAL | MACHINE_VIDEO, .ram = { .min = 1024, .max = 32768, @@ -4731,7 +4731,7 @@ const machine_t machines[] = { .kbc = KBC_UNKNOWN, .kbc_p1 = 0, .gpio = 0, - .device = NULL, + .device = &s3_86c805_onboard_vlb_device, .vid_device = NULL }, /* Uses an NEC 90M002A (UPD82C42C, 8042 clone) with unknown firmware. */ diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index 6887c0b51..b6a1af232 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -107,7 +107,8 @@ enum S3_MIROCRYSTAL8S_805, S3_NUMBER9_9FX_531, S3_NUMBER9_9FX_771, - S3_SPEA_MERCURY_LITE_PCI + S3_SPEA_MERCURY_LITE_PCI, + S3_86C805_ONBOARD }; @@ -6803,6 +6804,11 @@ static void *s3_init(const device_t *info) chip = S3_86C801; video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c801); break; + case S3_86C805_ONBOARD: + bios_fn = NULL; + chip = S3_86C805; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c805); + break; case S3_SPEA_MIRAGE_86C805: bios_fn = ROM_SPEA_MIRAGE_86C805; chip = S3_86C805; @@ -7213,6 +7219,20 @@ static void *s3_init(const device_t *info) svga->getclock = av9194_getclock; break; + case S3_86C805_ONBOARD: + svga->decode_mask = (2 << 20) - 1; + stepping = 0xa0; /*86C801/86C805*/ + s3->id = stepping; + s3->id_ext = stepping; + s3->id_ext_pci = 0; + s3->packed_mmio = 0; + svga->crtc[0x5a] = 0x0a; + + svga->ramdac = device_add(&att490_ramdac_device); + svga->clock_gen = device_add(&av9194_device); + svga->getclock = av9194_getclock; + break; + case S3_PHOENIX_86C801: case S3_PHOENIX_86C805: svga->decode_mask = (2 << 20) - 1; @@ -7818,6 +7838,20 @@ const device_t s3_spea_mirage_86c801_isa_device = { .config = s3_9fx_config }; +const device_t s3_86c805_onboard_vlb_device = { + .name = "S3 86c805 VLB On-Board", + .internal_name = "px_s3_805_onboard_vlb", + .flags = DEVICE_VLB, + .local = S3_86C805_ONBOARD, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, + { .available = NULL }, + .speed_changed = s3_speed_changed, + .force_redraw = s3_force_redraw, + .config = s3_9fx_config +}; + const device_t s3_spea_mirage_86c805_vlb_device = { .name = "S3 86c805 VLB (SPEA Mirage VL)", .internal_name = "px_s3_v7_805_vlb", From 465d619292dd40815533b5994286b4a1cede3572 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 26 Jul 2022 22:42:37 +0200 Subject: [PATCH 166/386] Networking: moved the pcnetPollTimer calls to a timer. Storage: Implemented initial DMA DRQ's in the 53c90 MCA SCSI card. Properly fixed the multiple drives on the IBM PS/2 SCSI card (Spock). --- src/network/net_pcnet.c | 23 ++-- src/scsi/scsi_pcscsi.c | 10 ++ src/scsi/scsi_spock.c | 288 ++++++++++++++++++++-------------------- 3 files changed, 169 insertions(+), 152 deletions(-) diff --git a/src/network/net_pcnet.c b/src/network/net_pcnet.c index 047624dad..b4c56af53 100644 --- a/src/network/net_pcnet.c +++ b/src/network/net_pcnet.c @@ -258,7 +258,7 @@ typedef struct { uint32_t cMsLinkUpDelay; int transfer_size; uint8_t maclocal[6]; /* configured MAC (local) address */ - pc_timer_t timer_soft_int, timer_restore; + pc_timer_t timer, timer_soft_int, timer_restore; } nic_t; /** @todo All structs: big endian? */ @@ -386,7 +386,6 @@ static uint8_t pcnet_pci_regs[PCI_REGSIZE]; static void pcnetAsyncTransmit(nic_t *dev); static void pcnetPollRxTx(nic_t *dev); -static void pcnetPollTimer(nic_t *dev); static void pcnetUpdateIrq(nic_t *dev); static uint16_t pcnet_bcr_readw(nic_t *dev, uint16_t rap); static void pcnet_bcr_writew(nic_t *dev, uint16_t rap, uint16_t val); @@ -1038,7 +1037,7 @@ pcnetStart(nic_t *dev) dev->aCSR[0] |= 0x0020; /* set RXON */ dev->aCSR[0] &= ~0x0004; /* clear STOP bit */ dev->aCSR[0] |= 0x0002; /* STRT */ - pcnetPollTimer(dev); + timer_set_delay_u64(&dev->timer, 2000 * TIMER_USEC); } @@ -1052,7 +1051,7 @@ pcnetStop(nic_t *dev) dev->aCSR[0] = 0x0004; dev->aCSR[4] &= ~0x02c2; dev->aCSR[5] &= ~0x0011; - pcnetPollTimer(dev); + timer_disable(&dev->timer); } @@ -1699,8 +1698,12 @@ pcnetPollRxTx(nic_t *dev) static void -pcnetPollTimer(nic_t *dev) +pcnetPollTimer(void *p) { + nic_t *dev = (nic_t *)p; + + timer_advance_u64(&dev->timer, 2000 * TIMER_USEC); + if (CSR_TDMD(dev)) pcnetAsyncTransmit(dev); @@ -2226,7 +2229,7 @@ pcnet_word_write(nic_t *dev, uint32_t addr, uint16_t val) if (!BCR_DWIO(dev)) { switch (addr & 0x0f) { case 0x00: /* RDP */ - pcnetPollTimer(dev); + timer_set_delay_u64(&dev->timer, 2000 * TIMER_USEC); pcnet_csr_writew(dev, dev->u32RAP, val); pcnetUpdateIrq(dev); break; @@ -2272,7 +2275,7 @@ pcnet_word_read(nic_t *dev, uint32_t addr) /** @note if we're not polling, then the guest will tell us when to poll by setting TDMD in CSR0 */ /** Polling is then useless here and possibly expensive. */ if (!CSR_DPOLL(dev)) - pcnetPollTimer(dev); + timer_set_delay_u64(&dev->timer, 2000 * TIMER_USEC); val = pcnet_csr_readw(dev, dev->u32RAP); if (dev->u32RAP == 0) @@ -2306,7 +2309,7 @@ pcnet_dword_write(nic_t *dev, uint32_t addr, uint32_t val) if (BCR_DWIO(dev)) { switch (addr & 0x0f) { case 0x00: /* RDP */ - pcnetPollTimer(dev); + timer_set_delay_u64(&dev->timer, 2000 * TIMER_USEC); pcnet_csr_writew(dev, dev->u32RAP, val & 0xffff); pcnetUpdateIrq(dev); break; @@ -2334,7 +2337,7 @@ pcnet_dword_read(nic_t *dev, uint32_t addr) switch (addr & 0x0f) { case 0x00: /* RDP */ if (!CSR_DPOLL(dev)) - pcnetPollTimer(dev); + timer_set_delay_u64(&dev->timer, 2000 * TIMER_USEC); val = pcnet_csr_readw(dev, dev->u32RAP); if (dev->u32RAP == 0) goto skip_update_irq; @@ -3050,6 +3053,8 @@ pcnet_init(const device_t *info) /* Attach ourselves to the network module. */ network_attach(dev, dev->aPROM, pcnetReceiveNoSync, pcnetWaitReceiveAvail, pcnetSetLinkState); + timer_add(&dev->timer, pcnetPollTimer, dev, 0); + if (dev->board == DEV_AM79C973) timer_add(&dev->timer_soft_int, pcnetTimerSoftInt, dev, 0); diff --git a/src/scsi/scsi_pcscsi.c b/src/scsi/scsi_pcscsi.c index 57fcc2469..3266dc802 100644 --- a/src/scsi/scsi_pcscsi.c +++ b/src/scsi/scsi_pcscsi.c @@ -372,11 +372,13 @@ esp_get_cmd(esp_t *dev, uint32_t maxlen) if (dmalen == 0) return 0; if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); while (dev->dma_86c01.pos < dmalen) { int val = dma_channel_read(dev->DmaChannel); buf[dev->dma_86c01.pos++] = val & 0xff; } dev->dma_86c01.pos = 0; + dma_set_drq(dev->DmaChannel, 0); } else { esp_pci_dma_memory_rw(dev, buf, dmalen, WRITE_TO_DEVICE); dmalen = MIN(fifo8_num_free(&dev->cmdfifo), dmalen); @@ -677,11 +679,13 @@ esp_do_dma(esp_t *dev, scsi_device_t *sd) esp_log("ESP Command on DMA\n"); count = MIN(count, fifo8_num_free(&dev->cmdfifo)); if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); while (dev->dma_86c01.pos < count) { dma_channel_write(dev->DmaChannel, buf[dev->dma_86c01.pos]); dev->dma_86c01.pos++; } dev->dma_86c01.pos = 0; + dma_set_drq(dev->DmaChannel, 0); } else esp_pci_dma_memory_rw(dev, buf, count, READ_FROM_DEVICE); fifo8_push_all(&dev->cmdfifo, buf, count); @@ -719,24 +723,28 @@ esp_do_dma(esp_t *dev, scsi_device_t *sd) if (sd->phase == SCSI_PHASE_DATA_IN) { esp_log("ESP SCSI Read, dma cnt = %i, ti size = %i, positive len = %i\n", esp_get_tc(dev), dev->ti_size, count); if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); while (dev->dma_86c01.pos < count) { dma_channel_write(dev->DmaChannel, sd->sc->temp_buffer[dev->buffer_pos + dev->dma_86c01.pos]); esp_log("ESP SCSI DMA read for 53C90: pos = %i, val = %02x\n", dev->dma_86c01.pos, sd->sc->temp_buffer[dev->buffer_pos + dev->dma_86c01.pos]); dev->dma_86c01.pos++; } dev->dma_86c01.pos = 0; + dma_set_drq(dev->DmaChannel, 0); } else { esp_pci_dma_memory_rw(dev, sd->sc->temp_buffer + dev->buffer_pos, count, READ_FROM_DEVICE); } } else if (sd->phase == SCSI_PHASE_DATA_OUT) { esp_log("ESP SCSI Write, negative len = %i, ti size = %i, dma cnt = %i\n", count, -dev->ti_size, esp_get_tc(dev)); if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); while (dev->dma_86c01.pos < count) { int val = dma_channel_read(dev->DmaChannel); esp_log("ESP SCSI DMA write for 53C90: pos = %i, val = %02x\n", dev->dma_86c01.pos, val & 0xff); sd->sc->temp_buffer[dev->buffer_pos + dev->dma_86c01.pos] = val & 0xff; dev->dma_86c01.pos++; } + dma_set_drq(dev->DmaChannel, 0); dev->dma_86c01.pos = 0; } else esp_pci_dma_memory_rw(dev, sd->sc->temp_buffer + dev->buffer_pos, count, WRITE_TO_DEVICE); @@ -922,11 +930,13 @@ esp_write_response(esp_t *dev) if (dev->dma) { if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); while (dev->dma_86c01.pos < 2) { int val = dma_channel_read(dev->DmaChannel); buf[dev->dma_86c01.pos++] = val & 0xff; } dev->dma_86c01.pos = 0; + dma_set_drq(dev->DmaChannel, 0); } else esp_pci_dma_memory_rw(dev, buf, 2, WRITE_TO_DEVICE); dev->rregs[ESP_RSTAT] = STAT_TC | STAT_ST; diff --git a/src/scsi/scsi_spock.c b/src/scsi/scsi_spock.c index 8b5bde94a..cfcf8e816 100644 --- a/src/scsi/scsi_spock.c +++ b/src/scsi/scsi_spock.c @@ -438,74 +438,67 @@ spock_process_imm_cmd(spock_t *scsi) int i; int adapter_id, phys_id, lun_id; - switch (scsi->command & CMD_MASK) { - case CMD_ASSIGN: - adapter_id = (scsi->command >> 16) & 15; - phys_id = (scsi->command >> 20) & 7; - lun_id = (scsi->command >> 24) & 7; - + switch (scsi->command & CMD_MASK) { + case CMD_ASSIGN: + adapter_id = (scsi->command >> 16) & 15; + phys_id = (scsi->command >> 20) & 7; + lun_id = (scsi->command >> 24) & 7; if (adapter_id == 15) { - if (phys_id == 7) /*Device 15 always adapter*/ - spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); - else /*Can not re-assign device 15 (always adapter)*/ - spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_COMMAND_FAIL); - } else { - if (scsi->command & (1 << 23)) { - spock_log("Assign: adapter id=%d\n", adapter_id); - scsi->dev_id[adapter_id].phys_id = -1; - spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); - } else { - if (phys_id != scsi->adapter_id) { - scsi->dev_id[adapter_id].phys_id = phys_id; - scsi->dev_id[adapter_id].lun_id = lun_id; - spock_log("Assign: adapter dev=%x scsi ID=%i LUN=%i\n", adapter_id, scsi->dev_id[adapter_id].phys_id, scsi->dev_id[adapter_id].lun_id); - spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); - } else { /*Can not assign adapter*/ - spock_log("Assign: PUN=%d, cannot assign adapter\n", phys_id); - spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_COMMAND_FAIL); - } - } - } + if (phys_id == 7) /*Device 15 always adapter*/ + spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); + else /*Can not re-assign device 15 (always adapter)*/ + spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_COMMAND_FAIL); + } else { + if (scsi->command & (1 << 23)) { + spock_log("Assign: adapter id=%d\n", adapter_id); + scsi->dev_id[adapter_id].phys_id = -1; + spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); + } else { + if (phys_id != scsi->adapter_id) { + scsi->dev_id[adapter_id].phys_id = phys_id; + scsi->dev_id[adapter_id].lun_id = lun_id; + spock_log("Assign: adapter dev=%x scsi ID=%i LUN=%i\n", adapter_id, scsi->dev_id[adapter_id].phys_id, scsi->dev_id[adapter_id].lun_id); + spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); + } else { /*Can not assign adapter*/ + spock_log("Assign: PUN=%d, cannot assign adapter\n", phys_id); + spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_COMMAND_FAIL); + } + } + } break; - case CMD_DMA_PACING_CONTROL: - scsi->pacing = scsi->cir[2]; - spock_log("Pacing control: %i\n", scsi->pacing); - spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); - break; + scsi->pacing = scsi->cir[2]; + spock_log("Pacing control: %i\n", scsi->pacing); + spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); + break; + case CMD_FEATURE_CONTROL: + spock_log("Feature control: timeout=%is d-rate=%i\n", (scsi->command >> 16) & 0x1fff, scsi->command >> 29); + spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); + break; + case CMD_INVALID_412: + spock_log("Invalid 412\n"); + spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); + break; + case CMD_RESET: + spock_log("Reset Command\n"); + if ((scsi->attention & 0x0f) == 0x0f) { /*Adapter reset*/ + for (i = 0; i < 8; i++) + scsi_device_reset(&scsi_devices[scsi->bus][i]); + spock_log("Adapter Reset\n"); - case CMD_FEATURE_CONTROL: - spock_log("Feature control: timeout=%is d-rate=%i\n", (scsi->command >> 16) & 0x1fff, scsi->command >> 29); - spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); - break; + if (!scsi->adapter_reset) /*The early 1990 bios must have its boot drive + set to ID 6 according https://www.ardent-tool.com/IBM_SCSI/SCSI-A.html */ + scsi->adapter_reset = 1; - case CMD_INVALID_412: - spock_log("Invalid 412\n"); - spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); - break; - - case CMD_RESET: - spock_log("Reset Command\n"); - if ((scsi->attention & 0x0f) == 0x0f) { /*Adapter reset*/ - for (i = 0; i < 8; i++) - scsi_device_reset(&scsi_devices[scsi->bus][i]); - spock_log("Adapter Reset\n"); - - if (!scsi->adapter_reset && scsi->bios_ver) /*The early 1990 bios must have its boot drive - set to ID 6 according https://www.ardent-tool.com/IBM_SCSI/SCSI-A.html */ - scsi->adapter_reset = 1; - else - scsi->adapter_reset = 0; - - scsi->scb_state = 0; + scsi->scb_state = 0; } - spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); - break; + spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); + break; - default: - fatal("scsi_callback: Bad command %02x\n", scsi->command); - break; - } + default: + fatal("scsi_callback: Bad command %02x\n", scsi->command); + break; + } } static void @@ -523,11 +516,11 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb) for (c = 0; c < SCSI_ID_MAX; c++) spock_clear_irq(scsi, c); - if (scsi->in_reset == 1) { - scsi->basic_ctrl |= CTRL_IRQ_ENA; - spock_set_irq(scsi, 0xf, IRQ_TYPE_RESET_COMPLETE); - } else - spock_set_irq(scsi, 0xf, IRQ_TYPE_RESET_COMPLETE); + if (scsi->in_reset == 1) { + scsi->basic_ctrl |= CTRL_IRQ_ENA; + spock_set_irq(scsi, 0x0f, IRQ_TYPE_RESET_COMPLETE); + } else + spock_set_irq(scsi, 0x0f, IRQ_TYPE_RESET_COMPLETE); /*Reset device mappings*/ for (c = 0; c < 7; c++) { @@ -559,17 +552,17 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb) break; case 1: /* Select */ - if (scsi->dev_id[scsi->scb_id].phys_id == -1) { - uint16_t term_stat_block_addr7 = (0xe << 8) | 0; - uint16_t term_stat_block_addr8 = (0xa << 8) | 0; + if (scsi->dev_id[scsi->scb_id].phys_id == -1) { + uint16_t term_stat_block_addr7 = (0xe << 8) | 0; + uint16_t term_stat_block_addr8 = (0xa << 8) | 0; - spock_log("Start failed, SCB ID = %d\n", scsi->scb_id); - spock_set_irq(scsi, scsi->scb_id, IRQ_TYPE_COMMAND_FAIL); - scsi->scb_state = 0; - dma_bm_write(scb->term_status_block_addr + 0x7*2, (uint8_t *)&term_stat_block_addr7, 2, 2); - dma_bm_write(scb->term_status_block_addr + 0x8*2, (uint8_t *)&term_stat_block_addr8, 2, 2); - break; - } + spock_log("Start failed, SCB ID = %d\n", scsi->scb_id); + spock_set_irq(scsi, scsi->scb_id, IRQ_TYPE_COMMAND_FAIL); + scsi->scb_state = 0; + dma_bm_write(scb->term_status_block_addr + 0x7*2, (uint8_t *)&term_stat_block_addr7, 2, 2); + dma_bm_write(scb->term_status_block_addr + 0x8*2, (uint8_t *)&term_stat_block_addr8, 2, 2); + break; + } dma_bm_read(scsi->scb_addr, (uint8_t *)&scb->command, 2, 2); dma_bm_read(scsi->scb_addr + 2, (uint8_t *)&scb->enable, 2, 2); @@ -591,11 +584,11 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb) " SCB chain address = %08x\n" " Block count = %04x\n" " Block length = %04x\n" - " SCB id = %d\n", + " SCB id = %d, Phys id = %d\n", scb->command, scb->enable, scb->lba_addr, scb->sge.sys_buf_addr, scb->sge.sys_buf_byte_count, scb->term_status_block_addr, scb->scb_chain_addr, - scb->block_count, scb->block_length, scsi->scb_id); + scb->block_count, scb->block_length, scsi->scb_id, scsi->dev_id[scsi->scb_id].phys_id); switch (scb->command & CMD_MASK) { case CMD_GET_COMPLETE_STATUS: @@ -669,11 +662,10 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb) break; case CMD_DEVICE_INQUIRY: - if (scsi->adapter_reset) { - scsi->cdb_id = scsi->scb_id; - } else { - scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; - } + if (scb->command != CMD_DEVICE_INQUIRY) + scsi->cdb_id = scsi->scb_id; + else + scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; spock_log("Device Inquiry, ID=%d\n", scsi->cdb_id); scsi->cdb[0] = GPCMD_INQUIRY; scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ @@ -689,12 +681,11 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb) return; case CMD_SEND_OTHER_SCSI: - if (scsi->adapter_reset) { - scsi->cdb_id = scsi->scb_id; - } else { - scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; - } - spock_log("Send Other SCSI, ID=%d\n", scsi->cdb_id); + if (scb->command != CMD_SEND_OTHER_SCSI) + scsi->cdb_id = scsi->scb_id; + else + scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; + spock_log("Send Other SCSI, SCB ID=%d, PHYS ID=%d, reset=%d\n", scsi->scb_id, scsi->dev_id[scsi->scb_id].phys_id, scsi->adapter_reset); dma_bm_read(scsi->scb_addr + 0x18, scsi->cdb, 12, 2); scsi->cdb[1] = (scsi->cdb[1] & 0x1f) | (scsi->dev_id[scsi->scb_id].lun_id << 5); /*Patch correct LUN into command*/ scsi->cdb_len = (scb->lba_addr & 0xff) ? (scb->lba_addr & 0xff) : 6; @@ -703,11 +694,11 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb) return; case CMD_READ_DEVICE_CAPACITY: - if (scsi->adapter_reset) - scsi->cdb_id = scsi->scb_id; - else - scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; - spock_log("Device Capacity, ID=%d\n", scsi->cdb_id); + if (scb->command != CMD_READ_DEVICE_CAPACITY) + scsi->cdb_id = scsi->scb_id; + else + scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; + spock_log("Device Capacity, SCB ID=%d, PHYS ID=%d, reset=%d\n", scsi->scb_id, scsi->dev_id[scsi->scb_id].phys_id, scsi->adapter_reset); scsi->cdb[0] = GPCMD_READ_CDROM_CAPACITY; scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ scsi->cdb[2] = 0; /*LBA*/ @@ -724,7 +715,11 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb) return; case CMD_READ_DATA: - spock_log("Device Read Data\n"); + if (scb->command != CMD_READ_DATA) + scsi->cdb_id = scsi->scb_id; + else + scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; + spock_log("Device Read Data, SCB ID=%d, PHYS ID=%d, reset=%d\n", scsi->scb_id, scsi->dev_id[scsi->scb_id].phys_id, scsi->adapter_reset); scsi->cdb[0] = GPCMD_READ_10; scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ scsi->cdb[2] = (scb->lba_addr >> 24) & 0xff; /*LBA*/ @@ -736,12 +731,15 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb) scsi->cdb[8] = scb->block_count & 0xff; scsi->cdb[9] = 0; /*Control*/ scsi->cdb_len = 10; - scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; scsi->scsi_state = SCSI_STATE_SELECT; scsi->scb_state = 2; return; case CMD_WRITE_DATA: + if (scb->command != CMD_WRITE_DATA) + scsi->cdb_id = scsi->scb_id; + else + scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; spock_log("Device Write Data\n"); scsi->cdb[0] = GPCMD_WRITE_10; scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ @@ -754,12 +752,15 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb) scsi->cdb[8] = scb->block_count & 0xff; scsi->cdb[9] = 0; /*Control*/ scsi->cdb_len = 10; - scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; scsi->scsi_state = SCSI_STATE_SELECT; scsi->scb_state = 2; return; case CMD_VERIFY: + if (scb->command != CMD_VERIFY) + scsi->cdb_id = scsi->scb_id; + else + scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; spock_log("Device Verify\n"); scsi->cdb[0] = GPCMD_VERIFY_10; scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ @@ -772,17 +773,16 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb) scsi->cdb[8] = scb->block_count & 0xff; scsi->cdb[9] = 0; /*Control*/ scsi->cdb_len = 10; - scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; scsi->data_len = 0; scsi->scsi_state = SCSI_STATE_SELECT; scsi->scb_state = 2; return; case CMD_REQUEST_SENSE: - if (scsi->adapter_reset) - scsi->cdb_id = scsi->scb_id; - else - scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; + if (scb->command != CMD_REQUEST_SENSE) + scsi->cdb_id = scsi->scb_id; + else + scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; spock_log("Device Request Sense, ID=%d\n", scsi->cdb_id); scsi->cdb[0] = GPCMD_REQUEST_SENSE; scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ @@ -798,32 +798,35 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb) break; case 2: /* Wait */ - if (scsi->scsi_state == SCSI_STATE_IDLE && scsi_device_present(&scsi_devices[scsi->bus][scsi->cdb_id])) { - if (scsi->last_status == SCSI_STATUS_OK) { - scsi->scb_state = 3; - spock_log("Status is Good on device ID %d, timer = %i\n", scsi->cdb_id, scsi->cmd_timer); - } else if (scsi->last_status == SCSI_STATUS_CHECK_CONDITION) { - uint16_t term_stat_block_addr7 = (0xc << 8) | 2; - uint16_t term_stat_block_addr8 = 0x20; - uint16_t term_stat_block_addrb = scsi->scb_addr & 0xffff; - uint16_t term_stat_block_addrc = scsi->scb_addr >> 16; + if (scsi->scsi_state == SCSI_STATE_IDLE) { + if (scsi_device_present(&scsi_devices[scsi->bus][scsi->cdb_id])) { + if (scsi->last_status == SCSI_STATUS_OK) { + scsi->scb_state = 3; + spock_log("Status is Good on device ID %d, reset = %d\n", scsi->scb_id, scsi->adapter_reset); + } else if (scsi->last_status == SCSI_STATUS_CHECK_CONDITION) { + uint16_t term_stat_block_addr7 = (0xc << 8) | 2; + uint16_t term_stat_block_addr8 = 0x20; + uint16_t term_stat_block_addrb = scsi->scb_addr & 0xffff; + uint16_t term_stat_block_addrc = scsi->scb_addr >> 16; - spock_set_irq(scsi, scsi->scb_id, IRQ_TYPE_COMMAND_FAIL); - scsi->scb_state = 0; - spock_log("Status Check Condition on device ID %d\n", scsi->cdb_id); - dma_bm_write(scb->term_status_block_addr + 0x7*2, (uint8_t *)&term_stat_block_addr7, 2, 2); - dma_bm_write(scb->term_status_block_addr + 0x8*2, (uint8_t *)&term_stat_block_addr8, 2, 2); - dma_bm_write(scb->term_status_block_addr + 0xb*2, (uint8_t *)&term_stat_block_addrb, 2, 2); - dma_bm_write(scb->term_status_block_addr + 0xc*2, (uint8_t *)&term_stat_block_addrc, 2, 2); - } - } else if (scsi->scsi_state == SCSI_STATE_IDLE && !scsi_device_present(&scsi_devices[scsi->bus][scsi->cdb_id])) { - uint16_t term_stat_block_addr7 = (0xc << 8) | 2; - uint16_t term_stat_block_addr8 = 0x10; - spock_set_irq(scsi, scsi->scb_id, IRQ_TYPE_COMMAND_FAIL); - scsi->scb_state = 0; - dma_bm_write(scb->term_status_block_addr + 0x7*2, (uint8_t *)&term_stat_block_addr7, 2, 2); - dma_bm_write(scb->term_status_block_addr + 0x8*2, (uint8_t *)&term_stat_block_addr8, 2, 2); - } + spock_set_irq(scsi, scsi->scb_id, IRQ_TYPE_COMMAND_FAIL); + scsi->scb_state = 0; + spock_log("Status Check Condition on device ID %d, reset = %d\n", scsi->scb_id, scsi->adapter_reset); + dma_bm_write(scb->term_status_block_addr + 0x7*2, (uint8_t *)&term_stat_block_addr7, 2, 2); + dma_bm_write(scb->term_status_block_addr + 0x8*2, (uint8_t *)&term_stat_block_addr8, 2, 2); + dma_bm_write(scb->term_status_block_addr + 0xb*2, (uint8_t *)&term_stat_block_addrb, 2, 2); + dma_bm_write(scb->term_status_block_addr + 0xc*2, (uint8_t *)&term_stat_block_addrc, 2, 2); + } + } else { + uint16_t term_stat_block_addr7 = (0xc << 8) | 2; + uint16_t term_stat_block_addr8 = 0x10; + spock_set_irq(scsi, scsi->scb_id, IRQ_TYPE_COMMAND_FAIL); + scsi->scb_state = 0; + spock_log("Status Check Condition on device ID %d on no device, reset = %d\n", scsi->scb_id, scsi->adapter_reset); + dma_bm_write(scb->term_status_block_addr + 0x7*2, (uint8_t *)&term_stat_block_addr7, 2, 2); + dma_bm_write(scb->term_status_block_addr + 0x8*2, (uint8_t *)&term_stat_block_addr8, 2, 2); + } + } break; case 3: /* Complete */ @@ -1104,30 +1107,29 @@ spock_init(const device_t *info) scsi->bios_ver = device_get_config_int("bios_ver"); - switch (scsi->bios_ver) { + switch (scsi->bios_ver) { case 1: - rom_init_interleaved(&scsi->bios_rom, SPOCK_U68_1991_ROM, SPOCK_U69_1991_ROM, - 0xc8000, 0x8000, 0x7fff, 0x4000, MEM_MAPPING_EXTERNAL); - break; + rom_init_interleaved(&scsi->bios_rom, SPOCK_U68_1991_ROM, SPOCK_U69_1991_ROM, + 0xc8000, 0x8000, 0x7fff, 0x4000, MEM_MAPPING_EXTERNAL); + break; case 0: - rom_init_interleaved(&scsi->bios_rom, SPOCK_U68_1990_ROM, SPOCK_U69_1990_ROM, - 0xc8000, 0x8000, 0x7fff, 0x4000, MEM_MAPPING_EXTERNAL); - break; - } + rom_init_interleaved(&scsi->bios_rom, SPOCK_U68_1990_ROM, SPOCK_U69_1990_ROM, + 0xc8000, 0x8000, 0x7fff, 0x4000, MEM_MAPPING_EXTERNAL); + break; + } + mem_mapping_disable(&scsi->bios_rom.mapping); - mem_mapping_disable(&scsi->bios_rom.mapping); - - scsi->pos_regs[0] = 0xff; - scsi->pos_regs[1] = 0x8e; + scsi->pos_regs[0] = 0xff; + scsi->pos_regs[1] = 0x8e; mca_add(spock_mca_read, spock_mca_write, spock_mca_feedb, spock_mca_reset, scsi); scsi->in_reset = 2; scsi->cmd_timer = SPOCK_TIME * 50; scsi->status = STATUS_BUSY; - for (c = 0; c < (SCSI_ID_MAX-1); c++) { - scsi->dev_id[c].phys_id = -1; - } + for (c = 0; c < (SCSI_ID_MAX-1); c++) { + scsi->dev_id[c].phys_id = -1; + } scsi->dev_id[SCSI_ID_MAX-1].phys_id = scsi->adapter_id; @@ -1141,7 +1143,7 @@ spock_init(const device_t *info) static void spock_close(void *p) { - spock_t *scsi = (spock_t *)p; + spock_t *scsi = (spock_t *)p; if (scsi) { free(scsi); From e7de5c0c709a95f2d1f4d0e4c51b151e516627b9 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Tue, 26 Jul 2022 19:34:02 -0300 Subject: [PATCH 167/386] Jenkins: More optimizations + ability for node preconditioning --- .ci/build.sh | 69 +++++++++++++++++++++++++++++++++++++--------------- 1 file changed, 50 insertions(+), 19 deletions(-) diff --git a/.ci/build.sh b/.ci/build.sh index 60917f43e..91fb356e2 100644 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -728,32 +728,46 @@ then exit 3 fi -# Run actual build. -echo [-] Running build -cmake --build build -j$(nproc) -status=$? -if [ $status -ne 0 ] +# Run actual build, unless we're running a dry build to precondition a node. +if [ "$BUILD_TAG" != "precondition" ] then - echo [!] Build failed with status [$status] - exit 4 + echo [-] Running build + cmake --build build -j$(nproc) + status=$? + if [ $status -ne 0 ] + then + echo [!] Build failed with status [$status] + exit 4 + fi +else + # Copy dummy binary into place. + echo [-] Preconditioning build node + mkdir -p build/src + if is_windows + then + cp "$(which cp)" "build/src/$project.exe" + elif is_mac + then + # Special check during app bundle generation. + else + cp "$(which cp)" "build/src/$project" + fi fi # Download Discord Game SDK from their CDN if we're in a new build. -discord_zip="$cache_dir/discord_game_sdk.zip" -if check_buildtag discord +discord_version="3.2.1" +discord_zip="$cache_dir/discord_game_sdk-$discord_version.zip" +if [ ! -e "$discord_zip" ] then # Download file. echo [-] Downloading Discord Game SDK - wget -qO "$discord_zip" "https://dl-game-sdk.discordapp.net/latest/discord_game_sdk.zip" + rm -f "$cache_dir/discord_game_sdk"* # remove old versions + wget -qO "$discord_zip" "https://dl-game-sdk.discordapp.net/$discord_version/discord_game_sdk.zip" status=$? if [ $status -ne 0 ] then echo [!] Discord Game SDK download failed with status [$status] rm -f "$discord_zip" - else - # Save build tag to skip this later. Doing it here (once everything is - # in place) is important to avoid potential issues with retried builds. - save_buildtag discord fi else echo [-] Not downloading Discord Game SDK again @@ -830,6 +844,10 @@ then # Sign app bundle, unless we're in an universal build. [ $skip_archive -eq 0 ] && codesign --force --deep -s - "archive_tmp/"*".app" + elif [ "$BUILD_TAG" = "precondition" ] + then + # Continue with no app bundle on a dry build. + status=0 fi else cwd_root="$(pwd)" @@ -842,6 +860,7 @@ else prefix="$cache_dir/openal-soft-1.21.1" if [ ! -d "$prefix" ] then + rm -rf "$cache_dir/openal-soft-"* # remove old versions wget -qO - https://github.com/kcat/openal-soft/archive/refs/tags/1.21.1.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix" fi prefix_build="$prefix/build-$arch_deb" @@ -857,6 +876,7 @@ else prefix="$cache_dir/FAudio-22.03" if [ ! -d "$prefix" ] then + rm -rf "$cache_dir/FAudio-"* # remove old versions wget -qO - https://github.com/FNA-XNA/FAudio/archive/refs/tags/22.03.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix" fi prefix_build="$prefix/build-$arch_deb" @@ -876,6 +896,7 @@ else prefix="$cache_dir/rtmidi-4.0.0" if [ ! -d "$prefix" ] then + rm -rf "$cache_dir/rtmidi-"* # remove old versions wget -qO - https://github.com/thestk/rtmidi/archive/refs/tags/4.0.0.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix" fi prefix_build="$prefix/build-$arch_deb" @@ -888,6 +909,7 @@ else prefix="$cache_dir/SDL2-2.0.20" if [ ! -d "$prefix" ] then + rm -rf "$cache_dir/SDL2-"* # remove old versions wget -qO - https://www.libsdl.org/release/SDL2-2.0.20.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix" fi prefix_build="$cache_dir/SDL2-2.0.20-build-$arch_deb" @@ -1018,12 +1040,18 @@ EOF done < .ci/AppImageBuilder.yml # Download appimage-builder if necessary. - [ ! -e "appimage-builder.AppImage" ] && wget -qO appimage-builder.AppImage \ - https://github.com/AppImageCrafters/appimage-builder/releases/download/v0.9.2/appimage-builder-0.9.2-35e3eab-x86_64.AppImage - chmod u+x appimage-builder.AppImage + appimage_builder_url="https://github.com/AppImageCrafters/appimage-builder/releases/download/v0.9.2/appimage-builder-0.9.2-35e3eab-x86_64.AppImage" + appimage_builder_binary="$cache_dir/$(basename "$appimage_builder_url")" + if [ ! -e "$appimage_builder_binary" ] + then + rm -rf "$cache_dir/"*".AppImage" # remove old versions + wget -qO "$appimage_builder_binary" "$appimage_builder_url" + fi - # Symlink global cache directory. - rm -rf appimage-builder-cache "$project-"*".AppImage" # also remove any dangling AppImages which may interfere with the renaming process + # Symlink appimage-builder binary and global cache directory. + rm -rf appimage-builder.AppImage appimage-builder-cache "$project-"*".AppImage" # also remove any dangling AppImages which may interfere with the renaming process + ln -s "$appimage_builder_binary" appimage-builder.AppImage + chmod u+x appimage-builder.AppImage mkdir -p "$cache_dir/appimage-builder-cache" ln -s "$cache_dir/appimage-builder-cache" appimage-builder-cache @@ -1037,6 +1065,9 @@ EOF then mv "$project-"*".AppImage" "$cwd/$package_name.AppImage" status=$? + else + # Remove appimage-builder binary just in case it's corrupted. + rm -f "$appimage_builder_binary" fi fi From c4cbd9167869bac150fa535b82350067727a451d Mon Sep 17 00:00:00 2001 From: richardg867 Date: Tue, 26 Jul 2022 19:37:35 -0300 Subject: [PATCH 168/386] Jenkins: Fix build --- .ci/build.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.ci/build.sh b/.ci/build.sh index 91fb356e2..1e62fab96 100644 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -748,7 +748,7 @@ else cp "$(which cp)" "build/src/$project.exe" elif is_mac then - # Special check during app bundle generation. + : # Special check during app bundle generation. else cp "$(which cp)" "build/src/$project" fi From b5a494ad3aace2e1d830a0619de56f404c6be0f0 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Tue, 26 Jul 2022 20:55:58 -0300 Subject: [PATCH 169/386] Jenkins: Fix toolchain file path when reusing libraries --- .ci/build.sh | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/.ci/build.sh b/.ci/build.sh index 1e62fab96..b5edae736 100644 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -230,6 +230,7 @@ case $arch in *) toolchain="$toolchain_prefix-$arch";; esac [ ! -e "cmake/$toolchain.cmake" ] && toolchain=flags-gcc +toolchain_file="cmake/$toolchain.cmake" # Perform platform-specific setup. strip_binary=strip @@ -380,9 +381,6 @@ then else echo [-] Not installing dependencies again fi - - # Point CMake to the toolchain file. - [ -e "cmake/$toolchain.cmake" ] && cmake_flags_extra="$cmake_flags_extra -D \"CMAKE_TOOLCHAIN_FILE=cmake/$toolchain.cmake\"" elif is_mac then # macOS lacks nproc, but sysctl can do the same job. @@ -577,9 +575,6 @@ then echo [-] Not installing dependencies again fi - - # Point CMake to the toolchain file. - [ -e "cmake/$toolchain.cmake" ] && cmake_flags_extra="$cmake_flags_extra -D \"CMAKE_TOOLCHAIN_FILE=cmake/$toolchain.cmake\"" else # Determine Debian architecture. case $arch in @@ -634,8 +629,12 @@ else *) libdir="$arch_triplet";; esac - # Create CMake toolchain file. - cat << EOF > toolchain.cmake + # Create CMake cross toolchain file. The file is saved on a fixed location for + # the library builds we do later, since running CMake again on a library we've + # already built before will *not* update its toolchain file path; therefore, we + # cannot point them to our working directory, which may change across builds. + toolchain_file_new="$cache_dir/toolchain.$arch_deb.cmake" + cat << EOF > "$toolchain_file_new" set(CMAKE_SYSTEM_NAME Linux) set(CMAKE_SYSTEM_PROCESSOR $arch) @@ -656,9 +655,9 @@ set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY) set(ENV{PKG_CONFIG_PATH} "") set(ENV{PKG_CONFIG_LIBDIR} "/usr/lib/$libdir/pkgconfig:/usr/share/$libdir/pkgconfig") -include("$(pwd)/cmake/$toolchain.cmake") +include("$(realpath "$toolchain_file")") EOF - cmake_flags_extra="$cmake_flags_extra -D CMAKE_TOOLCHAIN_FILE=toolchain.cmake" + toolchain_file="$toolchain_file_new" strip_binary="$arch_triplet-strip" # Install dependencies only if we're in a new build and/or architecture. @@ -688,6 +687,9 @@ EOF cmake_flags_extra="$cmake_flags_extra -D SLIRP_EXTERNAL=ON" fi +# Point CMake to the toolchain file. +[ -e "$toolchain_file" ] && cmake_flags_extra="$cmake_flags_extra -D \"CMAKE_TOOLCHAIN_FILE=$toolchain_file\"" + # Clean workspace. echo [-] Cleaning workspace rm -rf build @@ -864,7 +866,7 @@ else wget -qO - https://github.com/kcat/openal-soft/archive/refs/tags/1.21.1.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix" fi prefix_build="$prefix/build-$arch_deb" - cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$cwd_root/toolchain.cmake" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99 + cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99 cmake --build "$prefix_build" -j$(nproc) || exit 99 cmake --install "$prefix_build" || exit 99 @@ -880,7 +882,7 @@ else wget -qO - https://github.com/FNA-XNA/FAudio/archive/refs/tags/22.03.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix" fi prefix_build="$prefix/build-$arch_deb" - cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$cwd_root/toolchain.cmake" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99 + cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99 cmake --build "$prefix_build" -j$(nproc) || exit 99 cmake --install "$prefix_build" || exit 99 @@ -900,7 +902,7 @@ else wget -qO - https://github.com/thestk/rtmidi/archive/refs/tags/4.0.0.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix" fi prefix_build="$prefix/build-$arch_deb" - cmake -G Ninja -D RTMIDI_API_JACK=OFF -D "CMAKE_TOOLCHAIN_FILE=$cwd_root/toolchain.cmake" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99 + cmake -G Ninja -D RTMIDI_API_JACK=OFF -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99 cmake --build "$prefix_build" -j$(nproc) || exit 99 cmake --install "$prefix_build" || exit 99 @@ -930,7 +932,7 @@ else -D SDL_ATOMIC=OFF -D SDL_EVENTS=ON -D SDL_HAPTIC=OFF -D SDL_POWER=OFF -D SDL_THREADS=ON -D SDL_TIMERS=ON -D SDL_FILE=OFF \ -D SDL_LOADSO=ON -D SDL_CPUINFO=ON -D SDL_FILESYSTEM=$sdl_ui -D SDL_DLOPEN=OFF -D SDL_SENSOR=OFF -D SDL_LOCALE=OFF \ \ - -D "CMAKE_TOOLCHAIN_FILE=$cwd_root/toolchain.cmake" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" \ + -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" \ -S "$prefix" -B "$prefix_build" || exit 99 cmake --build "$prefix_build" -j$(nproc) || exit 99 cmake --install "$prefix_build" || exit 99 From fe98b05da32f6fa4566be0c810d410dc6b4da6f4 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Tue, 26 Jul 2022 22:01:56 -0300 Subject: [PATCH 170/386] Jenkins: Speed up git clones on remote nodes by avoiding stashes --- .ci/Jenkinsfile | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/.ci/Jenkinsfile b/.ci/Jenkinsfile index 53e146a64..e6f717a3d 100644 --- a/.ci/Jenkinsfile +++ b/.ci/Jenkinsfile @@ -98,8 +98,8 @@ def gitClone(repository, branch) { /* Clean workspace. */ cleanWs() - /* Use stashes to avoid performing multiple clones. */ - if (env.GIT_STASHED != 'true') { + /* Use stashes to pass the repository around debian.citadel, as it's known to be faster than git clone there. */ + if (env.NODE_NAME != 'debian.citadel' || env.GIT_STASHED != 'true') { /* Perform clone/checkout. */ def scmVars = checkout poll: true, changelog: true, @@ -119,9 +119,11 @@ def gitClone(repository, branch) { } println "[-] Using git commit [${env.GIT_COMMIT}]" - /* Stash data and mark it as stashed. */ - stash name: 'git', useDefaultExcludes: false - env.GIT_STASHED = 'true' + /* Stash data and mark it as stashed if required. */ + if (env.GIT_STASHED != 'true') { + stash name: 'git', useDefaultExcludes: false + env.GIT_STASHED = 'true' + } } else { /* Unstash data. */ unstash name: 'git' From a0c5cc7dc42f243790879d8a38bf75221a3ba143 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 27 Jul 2022 21:34:32 +0200 Subject: [PATCH 171/386] Fix rom_init() logging, patch by Cacodemon345. --- src/mem/rom.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mem/rom.c b/src/mem/rom.c index debdf5c39..955e5b85d 100644 --- a/src/mem/rom.c +++ b/src/mem/rom.c @@ -595,7 +595,7 @@ bios_load_linear_combined2_ex(char *fn1, char *fn2, char *fn3, char *fn4, char * int rom_init(rom_t *rom, char *fn, uint32_t addr, int sz, int mask, int off, uint32_t flags) { - rom_log("rom_init(%08X, %08X, %08X, %08X, %08X, %08X, %08X)\n", rom, fn, addr, sz, mask, off, flags); + rom_log("rom_init(%08X, %s, %08X, %08X, %08X, %08X, %08X)\n", rom, fn, addr, sz, mask, off, flags); /* Allocate a buffer for the image. */ rom->rom = malloc(sz); From ff39a77afcbd2808a7e019f565cb8538ed2ffa9f Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 27 Jul 2022 15:17:53 -0400 Subject: [PATCH 172/386] clang-format in src/machine --- src/machine/m_amstrad.c | 2820 ++++++++++++++++----------------- src/machine/m_at.c | 64 +- src/machine/m_at_286_386sx.c | 289 ++-- src/machine/m_at_386dx_486.c | 426 +++-- src/machine/m_at_commodore.c | 46 +- src/machine/m_at_compaq.c | 984 ++++++------ src/machine/m_at_misc.c | 4 +- src/machine/m_at_slot1.c | 152 +- src/machine/m_at_slot2.c | 28 +- src/machine/m_at_socket370.c | 89 +- src/machine/m_at_socket4.c | 74 +- src/machine/m_at_socket5.c | 74 +- src/machine/m_at_socket7.c | 251 ++- src/machine/m_at_socket7_3v.c | 100 +- src/machine/m_at_socket8.c | 57 +- src/machine/m_at_sockets7.c | 58 +- src/machine/m_at_t3100e.c | 936 +++++------ src/machine/m_at_t3100e_vid.c | 1135 +++++++------ src/machine/m_europc.c | 532 +++---- src/machine/m_pcjr.c | 1094 ++++++------- src/machine/m_ps1.c | 334 ++-- src/machine/m_ps1_hdc.c | 1403 ++++++++-------- src/machine/m_ps2_isa.c | 49 +- src/machine/m_ps2_mca.c | 2200 +++++++++++++------------ src/machine/m_tandy.c | 1610 +++++++++---------- src/machine/m_v86p.c | 64 +- src/machine/m_xt.c | 207 ++- src/machine/m_xt_compaq.c | 15 +- src/machine/m_xt_laserxt.c | 206 +-- src/machine/m_xt_olivetti.c | 704 ++++---- src/machine/m_xt_philips.c | 79 +- src/machine/m_xt_t1000.c | 742 ++++----- src/machine/m_xt_t1000_vid.c | 1164 +++++++------- src/machine/m_xt_xi8088.c | 96 +- src/machine/m_xt_zenith.c | 63 +- src/machine/machine_table.c | 6 +- 36 files changed, 8750 insertions(+), 9405 deletions(-) diff --git a/src/machine/m_amstrad.c b/src/machine/m_amstrad.c index 3b0235d51..5dc82226d 100644 --- a/src/machine/m_amstrad.c +++ b/src/machine/m_amstrad.c @@ -75,110 +75,104 @@ #include <86box/machine.h> #include <86box/m_amstrad.h> - -#define STAT_PARITY 0x80 -#define STAT_RTIMEOUT 0x40 -#define STAT_TTIMEOUT 0x20 -#define STAT_LOCK 0x10 -#define STAT_CD 0x08 -#define STAT_SYSFLAG 0x04 -#define STAT_IFULL 0x02 -#define STAT_OFULL 0x01 - +#define STAT_PARITY 0x80 +#define STAT_RTIMEOUT 0x40 +#define STAT_TTIMEOUT 0x20 +#define STAT_LOCK 0x10 +#define STAT_CD 0x08 +#define STAT_SYSFLAG 0x04 +#define STAT_IFULL 0x02 +#define STAT_OFULL 0x01 typedef struct { - rom_t bios_rom; /* 1640 */ - cga_t cga; /* 1640/200 */ - mda_t mda; /* 1512/200/PPC512/640*/ - ega_t ega; /* 1640 */ - uint8_t emulation; /* Which display are we emulating? */ - uint8_t dipswitches; /* DIP switches 1-3 */ - uint8_t crtc_index; /* CRTC index readback - * Bit 7: CGA control port written - * Bit 6: Operation control port written - * Bit 5: CRTC register written - * Bits 0-4: Last CRTC register selected */ - uint8_t operation_ctrl; - uint8_t reg_3df, type; - uint8_t crtc[32]; - int crtcreg; - int cga_enabled; /* 1640 */ - uint8_t cgacol, - cgamode, - stat; - uint8_t plane_write, /* 1512/200 */ - plane_read, /* 1512/200 */ - border, /* 1512/200 */ - invert; /* 512/640 */ - int fontbase; /* 1512/200 */ - int linepos, - displine; - int sc, vc; - int cgadispon; - int con, coff, - cursoron, - cgablink; - int vsynctime; - int fullchange; - int vadj; - uint16_t ma, maback; - int dispon; - int blink; - uint64_t dispontime, /* 1512/1640 */ - dispofftime; /* 1512/1640 */ - pc_timer_t timer; /* 1512/1640 */ - int firstline, - lastline; - uint8_t *vram; - void *ams; + rom_t bios_rom; /* 1640 */ + cga_t cga; /* 1640/200 */ + mda_t mda; /* 1512/200/PPC512/640*/ + ega_t ega; /* 1640 */ + uint8_t emulation; /* Which display are we emulating? */ + uint8_t dipswitches; /* DIP switches 1-3 */ + uint8_t crtc_index; /* CRTC index readback + * Bit 7: CGA control port written + * Bit 6: Operation control port written + * Bit 5: CRTC register written + * Bits 0-4: Last CRTC register selected */ + uint8_t operation_ctrl; + uint8_t reg_3df, type; + uint8_t crtc[32]; + int crtcreg; + int cga_enabled; /* 1640 */ + uint8_t cgacol, + cgamode, + stat; + uint8_t plane_write, /* 1512/200 */ + plane_read, /* 1512/200 */ + border, /* 1512/200 */ + invert; /* 512/640 */ + int fontbase; /* 1512/200 */ + int linepos, + displine; + int sc, vc; + int cgadispon; + int con, coff, + cursoron, + cgablink; + int vsynctime; + int fullchange; + int vadj; + uint16_t ma, maback; + int dispon; + int blink; + uint64_t dispontime, /* 1512/1640 */ + dispofftime; /* 1512/1640 */ + pc_timer_t timer; /* 1512/1640 */ + int firstline, + lastline; + uint8_t *vram; + void *ams; } amsvid_t; typedef struct { /* Machine stuff. */ - uint8_t dead; - uint8_t stat1, - stat2; - uint8_t type, - language; + uint8_t dead; + uint8_t stat1, + stat2; + uint8_t type, + language; /* Keyboard stuff. */ - int8_t wantirq; - uint8_t key_waiting; - uint8_t pa; - uint8_t pb; - pc_timer_t send_delay_timer; + int8_t wantirq; + uint8_t key_waiting; + uint8_t pa; + uint8_t pb; + pc_timer_t send_delay_timer; /* Mouse stuff. */ - uint8_t mousex, - mousey; - int oldb; + uint8_t mousex, + mousey; + int oldb; /* Video stuff. */ - amsvid_t *vid; - fdc_t *fdc; + amsvid_t *vid; + fdc_t *fdc; } amstrad_t; +int amstrad_latch; -int amstrad_latch; - - -static uint8_t key_queue[16]; -static int key_queue_start = 0, - key_queue_end = 0; -static uint8_t crtc_mask[32] = { - 0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f, - 0xf3, 0x1f, 0x7f, 0x1f, 0x3f, 0xff, 0x3f, 0xff, - 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +static uint8_t key_queue[16]; +static int key_queue_start = 0, + key_queue_end = 0; +static uint8_t crtc_mask[32] = { + 0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f, + 0xf3, 0x1f, 0x7f, 0x1f, 0x3f, 0xff, 0x3f, 0xff, + 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; -static video_timings_t timing_pc1512 = {VIDEO_BUS, 0,0,0, 0,0,0}; /*PC1512 video code handles waitstates itself*/ -static video_timings_t timing_pc1640 = {VIDEO_ISA, 8,16,32, 8,16,32}; -static video_timings_t timing_pc200 = {VIDEO_ISA, 8,16,32, 8,16,32}; +static video_timings_t timing_pc1512 = { VIDEO_BUS, 0, 0, 0, 0, 0, 0 }; /*PC1512 video code handles waitstates itself*/ +static video_timings_t timing_pc1640 = { VIDEO_ISA, 8, 16, 32, 8, 16, 32 }; +static video_timings_t timing_pc200 = { VIDEO_ISA, 8, 16, 32, 8, 16, 32 }; - -enum -{ +enum { AMS_PC1512, AMS_PC1640, AMS_PC200, @@ -187,458 +181,433 @@ enum AMS_PC3086 }; - #ifdef ENABLE_AMSTRAD_LOG int amstrad_do_log = ENABLE_AMSTRAD_LOG; - static void amstrad_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (amstrad_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (amstrad_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define amstrad_log(fmt, ...) +# define amstrad_log(fmt, ...) #endif - static void recalc_timings_1512(amsvid_t *vid) { double _dispontime, _dispofftime, disptime; - disptime = /*128*/ 114; /*Fixed on PC1512*/ - _dispontime = 80; + disptime = /*128*/ 114; /*Fixed on PC1512*/ + _dispontime = 80; _dispofftime = disptime - _dispontime; - _dispontime *= CGACONST; + _dispontime *= CGACONST; _dispofftime *= CGACONST; - vid->dispontime = (uint64_t)_dispontime; - vid->dispofftime = (uint64_t)_dispofftime; + vid->dispontime = (uint64_t) _dispontime; + vid->dispofftime = (uint64_t) _dispofftime; } - static void vid_out_1512(uint16_t addr, uint8_t val, void *priv) { - amsvid_t *vid = (amsvid_t *)priv; - uint8_t old; + amsvid_t *vid = (amsvid_t *) priv; + uint8_t old; if ((addr >= 0x3d0) && (addr <= 0x3d7)) - addr = (addr & 0xff9) | 0x004; + addr = (addr & 0xff9) | 0x004; switch (addr) { - case 0x03d4: - vid->crtcreg = val & 31; - return; + case 0x03d4: + vid->crtcreg = val & 31; + return; - case 0x03d5: - old = vid->crtc[vid->crtcreg]; - vid->crtc[vid->crtcreg] = val & crtc_mask[vid->crtcreg]; - if (old != val) { - if (vid->crtcreg < 0xe || vid->crtcreg > 0x10) { - vid->fullchange = changeframecount; - recalc_timings_1512(vid); - } - } - return; + case 0x03d5: + old = vid->crtc[vid->crtcreg]; + vid->crtc[vid->crtcreg] = val & crtc_mask[vid->crtcreg]; + if (old != val) { + if (vid->crtcreg < 0xe || vid->crtcreg > 0x10) { + vid->fullchange = changeframecount; + recalc_timings_1512(vid); + } + } + return; - case 0x03d8: - if ((val & 0x12) == 0x12 && (vid->cgamode & 0x12) != 0x12) { - vid->plane_write = 0xf; - vid->plane_read = 0; - } - vid->cgamode = val; - return; + case 0x03d8: + if ((val & 0x12) == 0x12 && (vid->cgamode & 0x12) != 0x12) { + vid->plane_write = 0xf; + vid->plane_read = 0; + } + vid->cgamode = val; + return; - case 0x03d9: - vid->cgacol = val; - return; + case 0x03d9: + vid->cgacol = val; + return; - case 0x03dd: - vid->plane_write = val; - return; + case 0x03dd: + vid->plane_write = val; + return; - case 0x03de: - vid->plane_read = val & 3; - return; + case 0x03de: + vid->plane_read = val & 3; + return; - case 0x03df: - vid->border = val; - return; + case 0x03df: + vid->border = val; + return; } } - static uint8_t vid_in_1512(uint16_t addr, void *priv) { - amsvid_t *vid = (amsvid_t *)priv; - uint8_t ret = 0xff; + amsvid_t *vid = (amsvid_t *) priv; + uint8_t ret = 0xff; if ((addr >= 0x3d0) && (addr <= 0x3d7)) - addr = (addr & 0xff9) | 0x004; + addr = (addr & 0xff9) | 0x004; switch (addr) { - case 0x03d4: - ret = vid->crtcreg; - break; + case 0x03d4: + ret = vid->crtcreg; + break; - case 0x03d5: - ret = vid->crtc[vid->crtcreg]; - break; + case 0x03d5: + ret = vid->crtc[vid->crtcreg]; + break; - case 0x03da: - ret = vid->stat; - break; + case 0x03da: + ret = vid->stat; + break; } - return(ret); + return (ret); } - static void vid_write_1512(uint32_t addr, uint8_t val, void *priv) { - amsvid_t *vid = (amsvid_t *)priv; + amsvid_t *vid = (amsvid_t *) priv; cycles -= 12; addr &= 0x3fff; if ((vid->cgamode & 0x12) == 0x12) { - if (vid->plane_write & 1) vid->vram[addr] = val; - if (vid->plane_write & 2) vid->vram[addr | 0x4000] = val; - if (vid->plane_write & 4) vid->vram[addr | 0x8000] = val; - if (vid->plane_write & 8) vid->vram[addr | 0xc000] = val; + if (vid->plane_write & 1) + vid->vram[addr] = val; + if (vid->plane_write & 2) + vid->vram[addr | 0x4000] = val; + if (vid->plane_write & 4) + vid->vram[addr | 0x8000] = val; + if (vid->plane_write & 8) + vid->vram[addr | 0xc000] = val; } else - vid->vram[addr] = val; + vid->vram[addr] = val; } - static uint8_t vid_read_1512(uint32_t addr, void *priv) { - amsvid_t *vid = (amsvid_t *)priv; + amsvid_t *vid = (amsvid_t *) priv; cycles -= 12; addr &= 0x3fff; if ((vid->cgamode & 0x12) == 0x12) - return(vid->vram[addr | (vid->plane_read << 14)]); + return (vid->vram[addr | (vid->plane_read << 14)]); - return(vid->vram[addr]); + return (vid->vram[addr]); } - static void vid_poll_1512(void *priv) { - amsvid_t *vid = (amsvid_t *)priv; - uint16_t ca = (vid->crtc[15] | (vid->crtc[14] << 8)) & 0x3fff; - int drawcursor; - int x, c, xs_temp, ys_temp; - uint8_t chr, attr; - uint16_t dat, dat2, dat3, dat4; - int cols[4]; - int col; - int oldsc; + amsvid_t *vid = (amsvid_t *) priv; + uint16_t ca = (vid->crtc[15] | (vid->crtc[14] << 8)) & 0x3fff; + int drawcursor; + int x, c, xs_temp, ys_temp; + uint8_t chr, attr; + uint16_t dat, dat2, dat3, dat4; + int cols[4]; + int col; + int oldsc; - if (! vid->linepos) { - timer_advance_u64(&vid->timer, vid->dispofftime); - vid->stat |= 1; - vid->linepos = 1; - oldsc = vid->sc; - if (vid->dispon) { - if (vid->displine < vid->firstline) { - vid->firstline = vid->displine; - video_wait_for_buffer(); - } - vid->lastline = vid->displine; - for (c = 0; c < 8; c++) { - if ((vid->cgamode & 0x12) == 0x12) { - buffer32->line[(vid->displine << 1)][c] = buffer32->line[(vid->displine << 1) + 1][c] = (vid->border & 15) + 16; - if (vid->cgamode & 1) { - buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 3) + 8] = - buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 3) + 8] = 0; - } else { - buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 4) + 8] = - buffer32->line[(vid->displine << 1)+ 1][c + (vid->crtc[1] << 4) + 8] = 0; - } - } else { - buffer32->line[(vid->displine << 1)][c] = buffer32->line[(vid->displine << 1) + 1][c] = (vid->cgacol & 15) + 16; - if (vid->cgamode & 1) { - buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 3) + 8] = - buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 3) + 8] = (vid->cgacol & 15) + 16; - } else { - buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 4) + 8] = - buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 4) + 8] = (vid->cgacol & 15) + 16; - } - } - } - if (vid->cgamode & 1) { - for (x = 0; x < 80; x++) { - chr = vid->vram[ ((vid->ma << 1) & 0x3fff)]; - attr = vid->vram[(((vid->ma << 1) + 1) & 0x3fff)]; - drawcursor = ((vid->ma == ca) && vid->con && vid->cursoron); - if (vid->cgamode & 0x20) { - cols[1] = (attr & 15) + 16; - cols[0] = ((attr >> 4) & 7) + 16; - if ((vid->blink & 16) && (attr & 0x80) && !drawcursor) - cols[1] = cols[0]; - } else { - cols[1] = (attr & 15) + 16; - cols[0] = (attr >> 4) + 16; - } - if (drawcursor) { - for (c = 0; c < 8; c++) { - buffer32->line[(vid->displine << 1)][(x << 3) + c + 8] = - buffer32->line[(vid->displine << 1) + 1][(x << 3) + c + 8] = - cols[(fontdat[vid->fontbase + chr][vid->sc & 7] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; - } - } else { - for (c = 0; c < 8; c++) { - buffer32->line[(vid->displine << 1)][(x << 3) + c + 8] = - buffer32->line[(vid->displine << 1) + 1][(x << 3) + c + 8] = - cols[(fontdat[vid->fontbase + chr][vid->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; - } - } - vid->ma++; - } - } else if (! (vid->cgamode & 2)) { - for (x = 0; x < 40; x++) { - chr = vid->vram[((vid->ma << 1) & 0x3fff)]; - attr = vid->vram[(((vid->ma << 1) + 1) & 0x3fff)]; - drawcursor = ((vid->ma == ca) && vid->con && vid->cursoron); - if (vid->cgamode & 0x20) { - cols[1] = (attr & 15) + 16; - cols[0] = ((attr >> 4) & 7) + 16; - if ((vid->blink & 16) && (attr & 0x80)) - cols[1] = cols[0]; - } else { - cols[1] = (attr & 15) + 16; - cols[0] = (attr >> 4) + 16; - } - vid->ma++; - if (drawcursor) { - for (c = 0; c < 8; c++) { - buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 8] = - buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = - buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 8] = - buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = - cols[(fontdat[vid->fontbase + chr][vid->sc & 7] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; - } - } else { - for (c = 0; c < 8; c++) { - buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 8] = - buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = - buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 8] = - buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = - cols[(fontdat[vid->fontbase + chr][vid->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; - } - } - } - } else if (! (vid->cgamode & 16)) { - cols[0] = (vid->cgacol & 15) | 16; - col = (vid->cgacol & 16) ? 24 : 16; - if (vid->cgamode & 4) { - cols[1] = col | 3; - cols[2] = col | 4; - cols[3] = col | 7; - } else if (vid->cgacol & 32) { - cols[1] = col | 3; - cols[2] = col | 5; - cols[3] = col | 7; - } else { - cols[1] = col | 2; - cols[2] = col | 4; - cols[3] = col | 6; - } - for (x = 0; x < 40; x++) { - dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000)] << 8) | vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000) + 1]; - vid->ma++; - for (c = 0; c < 8; c++) { - buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 8] = - buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = - buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 8] = - buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = - cols[dat >> 14]; - dat <<= 2; - } - } - } else { - for (x = 0; x < 40; x++) { - ca = ((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000); - dat = (vid->vram[ca] << 8) | vid->vram[ca + 1]; - dat2 = (vid->vram[ca + 0x4000] << 8) | vid->vram[ca + 0x4001]; - dat3 = (vid->vram[ca + 0x8000] << 8) | vid->vram[ca + 0x8001]; - dat4 = (vid->vram[ca + 0xc000] << 8) | vid->vram[ca + 0xc001]; + if (!vid->linepos) { + timer_advance_u64(&vid->timer, vid->dispofftime); + vid->stat |= 1; + vid->linepos = 1; + oldsc = vid->sc; + if (vid->dispon) { + if (vid->displine < vid->firstline) { + vid->firstline = vid->displine; + video_wait_for_buffer(); + } + vid->lastline = vid->displine; + for (c = 0; c < 8; c++) { + if ((vid->cgamode & 0x12) == 0x12) { + buffer32->line[(vid->displine << 1)][c] = buffer32->line[(vid->displine << 1) + 1][c] = (vid->border & 15) + 16; + if (vid->cgamode & 1) { + buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 3) + 8] = buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 3) + 8] = 0; + } else { + buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 4) + 8] = buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 4) + 8] = 0; + } + } else { + buffer32->line[(vid->displine << 1)][c] = buffer32->line[(vid->displine << 1) + 1][c] = (vid->cgacol & 15) + 16; + if (vid->cgamode & 1) { + buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 3) + 8] = buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 3) + 8] = (vid->cgacol & 15) + 16; + } else { + buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 4) + 8] = buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 4) + 8] = (vid->cgacol & 15) + 16; + } + } + } + if (vid->cgamode & 1) { + for (x = 0; x < 80; x++) { + chr = vid->vram[((vid->ma << 1) & 0x3fff)]; + attr = vid->vram[(((vid->ma << 1) + 1) & 0x3fff)]; + drawcursor = ((vid->ma == ca) && vid->con && vid->cursoron); + if (vid->cgamode & 0x20) { + cols[1] = (attr & 15) + 16; + cols[0] = ((attr >> 4) & 7) + 16; + if ((vid->blink & 16) && (attr & 0x80) && !drawcursor) + cols[1] = cols[0]; + } else { + cols[1] = (attr & 15) + 16; + cols[0] = (attr >> 4) + 16; + } + if (drawcursor) { + for (c = 0; c < 8; c++) { + buffer32->line[(vid->displine << 1)][(x << 3) + c + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + c + 8] = cols[(fontdat[vid->fontbase + chr][vid->sc & 7] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; + } + } else { + for (c = 0; c < 8; c++) { + buffer32->line[(vid->displine << 1)][(x << 3) + c + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + c + 8] = cols[(fontdat[vid->fontbase + chr][vid->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; + } + } + vid->ma++; + } + } else if (!(vid->cgamode & 2)) { + for (x = 0; x < 40; x++) { + chr = vid->vram[((vid->ma << 1) & 0x3fff)]; + attr = vid->vram[(((vid->ma << 1) + 1) & 0x3fff)]; + drawcursor = ((vid->ma == ca) && vid->con && vid->cursoron); + if (vid->cgamode & 0x20) { + cols[1] = (attr & 15) + 16; + cols[0] = ((attr >> 4) & 7) + 16; + if ((vid->blink & 16) && (attr & 0x80)) + cols[1] = cols[0]; + } else { + cols[1] = (attr & 15) + 16; + cols[0] = (attr >> 4) + 16; + } + vid->ma++; + if (drawcursor) { + for (c = 0; c < 8; c++) { + buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdat[vid->fontbase + chr][vid->sc & 7] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; + } + } else { + for (c = 0; c < 8; c++) { + buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdat[vid->fontbase + chr][vid->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; + } + } + } + } else if (!(vid->cgamode & 16)) { + cols[0] = (vid->cgacol & 15) | 16; + col = (vid->cgacol & 16) ? 24 : 16; + if (vid->cgamode & 4) { + cols[1] = col | 3; + cols[2] = col | 4; + cols[3] = col | 7; + } else if (vid->cgacol & 32) { + cols[1] = col | 3; + cols[2] = col | 5; + cols[3] = col | 7; + } else { + cols[1] = col | 2; + cols[2] = col | 4; + cols[3] = col | 6; + } + for (x = 0; x < 40; x++) { + dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000)] << 8) | vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000) + 1]; + vid->ma++; + for (c = 0; c < 8; c++) { + buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = cols[dat >> 14]; + dat <<= 2; + } + } + } else { + for (x = 0; x < 40; x++) { + ca = ((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000); + dat = (vid->vram[ca] << 8) | vid->vram[ca + 1]; + dat2 = (vid->vram[ca + 0x4000] << 8) | vid->vram[ca + 0x4001]; + dat3 = (vid->vram[ca + 0x8000] << 8) | vid->vram[ca + 0x8001]; + dat4 = (vid->vram[ca + 0xc000] << 8) | vid->vram[ca + 0xc001]; - vid->ma++; - for (c = 0; c < 16; c++) { - buffer32->line[(vid->displine << 1)][(x << 4) + c + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + c + 8] = - (((dat >> 15) | ((dat2 >> 15) << 1) | ((dat3 >> 15) << 2) | ((dat4 >> 15) << 3)) & (vid->cgacol & 15)) + 16; - dat <<= 1; - dat2 <<= 1; - dat3 <<= 1; - dat4 <<= 1; - } - } - } - } else { - cols[0] = ((vid->cgamode & 0x12) == 0x12) ? 0 : (vid->cgacol & 15) + 16; - if (vid->cgamode & 1) { - hline(buffer32, 0, (vid->displine << 1), (vid->crtc[1] << 3) + 16, cols[0]); - hline(buffer32, 0, (vid->displine << 1) + 1, (vid->crtc[1] << 3) + 16, cols[0]); - } else { - hline(buffer32, 0, (vid->displine << 1), (vid->crtc[1] << 4) + 16, cols[0]); - hline(buffer32, 0, (vid->displine << 1), (vid->crtc[1] << 4) + 16, cols[0]); - } - } + vid->ma++; + for (c = 0; c < 16; c++) { + buffer32->line[(vid->displine << 1)][(x << 4) + c + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + c + 8] = (((dat >> 15) | ((dat2 >> 15) << 1) | ((dat3 >> 15) << 2) | ((dat4 >> 15) << 3)) & (vid->cgacol & 15)) + 16; + dat <<= 1; + dat2 <<= 1; + dat3 <<= 1; + dat4 <<= 1; + } + } + } + } else { + cols[0] = ((vid->cgamode & 0x12) == 0x12) ? 0 : (vid->cgacol & 15) + 16; + if (vid->cgamode & 1) { + hline(buffer32, 0, (vid->displine << 1), (vid->crtc[1] << 3) + 16, cols[0]); + hline(buffer32, 0, (vid->displine << 1) + 1, (vid->crtc[1] << 3) + 16, cols[0]); + } else { + hline(buffer32, 0, (vid->displine << 1), (vid->crtc[1] << 4) + 16, cols[0]); + hline(buffer32, 0, (vid->displine << 1), (vid->crtc[1] << 4) + 16, cols[0]); + } + } - vid->sc = oldsc; - if (vid->vsynctime) - vid->stat |= 8; - vid->displine++; - if (vid->displine >= 360) - vid->displine = 0; + vid->sc = oldsc; + if (vid->vsynctime) + vid->stat |= 8; + vid->displine++; + if (vid->displine >= 360) + vid->displine = 0; } else { - timer_advance_u64(&vid->timer, vid->dispontime); - if ((vid->lastline - vid->firstline) == 199) - vid->dispon = 0; /*Amstrad PC1512 always displays 200 lines, regardless of CRTC settings*/ - if (vid->dispon) - vid->stat &= ~1; - vid->linepos = 0; - if (vid->vsynctime) { - vid->vsynctime--; - if (! vid->vsynctime) - vid->stat &= ~8; - } - if (vid->sc == (vid->crtc[11] & 31)) { - vid->con = 0; - vid->coff = 1; - } - if (vid->vadj) { - vid->sc++; - vid->sc &= 31; - vid->ma = vid->maback; - vid->vadj--; - if (! vid->vadj) { - vid->dispon = 1; - vid->ma = vid->maback = (vid->crtc[13] | (vid->crtc[12] << 8)) & 0x3fff; - vid->sc = 0; - } - } else if (vid->sc == vid->crtc[9]) { - vid->maback = vid->ma; - vid->sc = 0; - vid->vc++; - vid->vc &= 127; + timer_advance_u64(&vid->timer, vid->dispontime); + if ((vid->lastline - vid->firstline) == 199) + vid->dispon = 0; /*Amstrad PC1512 always displays 200 lines, regardless of CRTC settings*/ + if (vid->dispon) + vid->stat &= ~1; + vid->linepos = 0; + if (vid->vsynctime) { + vid->vsynctime--; + if (!vid->vsynctime) + vid->stat &= ~8; + } + if (vid->sc == (vid->crtc[11] & 31)) { + vid->con = 0; + vid->coff = 1; + } + if (vid->vadj) { + vid->sc++; + vid->sc &= 31; + vid->ma = vid->maback; + vid->vadj--; + if (!vid->vadj) { + vid->dispon = 1; + vid->ma = vid->maback = (vid->crtc[13] | (vid->crtc[12] << 8)) & 0x3fff; + vid->sc = 0; + } + } else if (vid->sc == vid->crtc[9]) { + vid->maback = vid->ma; + vid->sc = 0; + vid->vc++; + vid->vc &= 127; - if (vid->displine == 32) { - vid->vc = 0; - vid->vadj = 6; - if ((vid->crtc[10] & 0x60) == 0x20) - vid->cursoron = 0; - else - vid->cursoron = vid->blink & 16; - } + if (vid->displine == 32) { + vid->vc = 0; + vid->vadj = 6; + if ((vid->crtc[10] & 0x60) == 0x20) + vid->cursoron = 0; + else + vid->cursoron = vid->blink & 16; + } - if (vid->displine >= 262) { - vid->dispon = 0; - vid->displine = 0; - vid->vsynctime = 46; + if (vid->displine >= 262) { + vid->dispon = 0; + vid->displine = 0; + vid->vsynctime = 46; - if (vid->cgamode&1) - x = (vid->crtc[1] << 3) + 16; - else - x = (vid->crtc[1] << 4) + 16; - vid->lastline++; + if (vid->cgamode & 1) + x = (vid->crtc[1] << 3) + 16; + else + x = (vid->crtc[1] << 4) + 16; + vid->lastline++; - xs_temp = x; - ys_temp = (vid->lastline - vid->firstline) << 1; + xs_temp = x; + ys_temp = (vid->lastline - vid->firstline) << 1; - if ((xs_temp > 0) && (ys_temp > 0)) { - if (xs_temp < 64) xs_temp = 656; - if (ys_temp < 32) ys_temp = 400; - if (!enable_overscan) - xs_temp -= 16; + if ((xs_temp > 0) && (ys_temp > 0)) { + if (xs_temp < 64) + xs_temp = 656; + if (ys_temp < 32) + ys_temp = 400; + if (!enable_overscan) + xs_temp -= 16; - if ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get()) { - xsize = xs_temp; - ysize = ys_temp; - set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); + if ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get()) { + xsize = xs_temp; + ysize = ys_temp; + set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); - if (video_force_resize_get()) - video_force_resize_set(0); - } + if (video_force_resize_get()) + video_force_resize_set(0); + } - if (enable_overscan) { - video_blit_memtoscreen_8(0, (vid->firstline - 4) << 1, - xsize, ((vid->lastline - vid->firstline) + 8) << 1); - } else { - video_blit_memtoscreen_8(8, vid->firstline << 1, - xsize, (vid->lastline - vid->firstline) << 1); - } - } + if (enable_overscan) { + video_blit_memtoscreen_8(0, (vid->firstline - 4) << 1, + xsize, ((vid->lastline - vid->firstline) + 8) << 1); + } else { + video_blit_memtoscreen_8(8, vid->firstline << 1, + xsize, (vid->lastline - vid->firstline) << 1); + } + } - video_res_x = xsize; - video_res_y = ysize; - if (vid->cgamode & 1) { - video_res_x /= 8; - video_res_y /= vid->crtc[9] + 1; - video_bpp = 0; - } else if (! (vid->cgamode & 2)) { - video_res_x /= 16; - video_res_y /= vid->crtc[9] + 1; - video_bpp = 0; - } else if (! (vid->cgamode & 16)) { - video_res_x /= 2; - video_bpp = 2; - } else { - video_bpp = 4; - } + video_res_x = xsize; + video_res_y = ysize; + if (vid->cgamode & 1) { + video_res_x /= 8; + video_res_y /= vid->crtc[9] + 1; + video_bpp = 0; + } else if (!(vid->cgamode & 2)) { + video_res_x /= 16; + video_res_y /= vid->crtc[9] + 1; + video_bpp = 0; + } else if (!(vid->cgamode & 16)) { + video_res_x /= 2; + video_bpp = 2; + } else { + video_bpp = 4; + } - vid->firstline = 1000; - vid->lastline = 0; - vid->blink++; - } - } else { - vid->sc++; - vid->sc &= 31; - vid->ma = vid->maback; - } - if (vid->sc == (vid->crtc[10] & 31)) - vid->con = 1; + vid->firstline = 1000; + vid->lastline = 0; + vid->blink++; + } + } else { + vid->sc++; + vid->sc &= 31; + vid->ma = vid->maback; + } + if (vid->sc == (vid->crtc[10] & 31)) + vid->con = 1; } } - static void vid_init_1512(amstrad_t *ams) { amsvid_t *vid; /* Allocate a video controller block. */ - vid = (amsvid_t *)malloc(sizeof(amsvid_t)); + vid = (amsvid_t *) malloc(sizeof(amsvid_t)); memset(vid, 0x00, sizeof(amsvid_t)); video_inform(VIDEO_FLAG_TYPE_CGA, &timing_pc1512); - vid->vram = malloc(0x10000); - vid->cgacol = 7; + vid->vram = malloc(0x10000); + vid->cgacol = 7; vid->cgamode = 0x12; timer_add(&vid->timer, vid_poll_1512, vid, 1); mem_mapping_add(&vid->cga.mapping, 0xb8000, 0x08000, - vid_read_1512, NULL, NULL, vid_write_1512, NULL, NULL, - NULL, 0, vid); + vid_read_1512, NULL, NULL, vid_write_1512, NULL, NULL, + NULL, 0, vid); io_sethandler(0x03d0, 16, - vid_in_1512, NULL, NULL, vid_out_1512, NULL, NULL, vid); + vid_in_1512, NULL, NULL, vid_out_1512, NULL, NULL, vid); overscan_x = overscan_y = 16; @@ -650,27 +619,26 @@ vid_init_1512(amstrad_t *ams) ams->vid = vid; } - static void vid_close_1512(void *priv) { - amsvid_t *vid = (amsvid_t *)priv; + amsvid_t *vid = (amsvid_t *) priv; free(vid->vram); free(vid); } - static void vid_speed_change_1512(void *priv) { - amsvid_t *vid = (amsvid_t *)priv; + amsvid_t *vid = (amsvid_t *) priv; recalc_timings_1512(vid); } const device_config_t vid_1512_config[] = { + // clang-format off { .name = "display_type", .description = "Display type", @@ -721,20 +689,21 @@ const device_config_t vid_1512_config[] = { } }, { .name = "", .description = "", .type = CONFIG_END } + // clang-format on }; const device_t vid_1512_device = { - .name = "Amstrad PC1512 (video)", + .name = "Amstrad PC1512 (video)", .internal_name = "vid_1512", - .flags = 0, - .local = 0, - .init = NULL, - .close = vid_close_1512, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = vid_close_1512, + .reset = NULL, { .available = NULL }, .speed_changed = vid_speed_change_1512, - .force_redraw = NULL, - .config = vid_1512_config + .force_redraw = NULL, + .config = vid_1512_config }; static void @@ -744,94 +713,92 @@ recalc_timings_1640(amsvid_t *vid) ega_recalctimings(&vid->ega); if (vid->cga_enabled) { - overscan_x = overscan_y = 16; + overscan_x = overscan_y = 16; - vid->dispontime = vid->cga.dispontime; - vid->dispofftime = vid->cga.dispofftime; + vid->dispontime = vid->cga.dispontime; + vid->dispofftime = vid->cga.dispofftime; } else { - overscan_x = 16; overscan_y = 28; + overscan_x = 16; + overscan_y = 28; - vid->dispontime = vid->ega.dispontime; - vid->dispofftime = vid->ega.dispofftime; + vid->dispontime = vid->ega.dispontime; + vid->dispofftime = vid->ega.dispofftime; } } - static void vid_out_1640(uint16_t addr, uint8_t val, void *priv) { - amsvid_t *vid = (amsvid_t *)priv; + amsvid_t *vid = (amsvid_t *) priv; switch (addr) { - case 0x03db: - vid->cga_enabled = val & 0x40; - if (vid->cga_enabled) { - timer_disable(&vid->ega.timer); - timer_set_delay_u64(&vid->cga.timer, 0); - mem_mapping_enable(&vid->cga.mapping); - mem_mapping_disable(&vid->ega.mapping); - } else { - timer_disable(&vid->cga.timer); - timer_set_delay_u64(&vid->ega.timer, 0); - mem_mapping_disable(&vid->cga.mapping); - switch (vid->ega.gdcreg[6] & 0xc) { - case 0x0: /*128k at A0000*/ - mem_mapping_set_addr(&vid->ega.mapping, - 0xa0000, 0x20000); - break; + case 0x03db: + vid->cga_enabled = val & 0x40; + if (vid->cga_enabled) { + timer_disable(&vid->ega.timer); + timer_set_delay_u64(&vid->cga.timer, 0); + mem_mapping_enable(&vid->cga.mapping); + mem_mapping_disable(&vid->ega.mapping); + } else { + timer_disable(&vid->cga.timer); + timer_set_delay_u64(&vid->ega.timer, 0); + mem_mapping_disable(&vid->cga.mapping); + switch (vid->ega.gdcreg[6] & 0xc) { + case 0x0: /*128k at A0000*/ + mem_mapping_set_addr(&vid->ega.mapping, + 0xa0000, 0x20000); + break; - case 0x4: /*64k at A0000*/ - mem_mapping_set_addr(&vid->ega.mapping, - 0xa0000, 0x10000); - break; + case 0x4: /*64k at A0000*/ + mem_mapping_set_addr(&vid->ega.mapping, + 0xa0000, 0x10000); + break; - case 0x8: /*32k at B0000*/ - mem_mapping_set_addr(&vid->ega.mapping, - 0xb0000, 0x08000); - break; + case 0x8: /*32k at B0000*/ + mem_mapping_set_addr(&vid->ega.mapping, + 0xb0000, 0x08000); + break; - case 0xC: /*32k at B8000*/ - mem_mapping_set_addr(&vid->ega.mapping, - 0xb8000, 0x08000); - break; - } - } - return; + case 0xC: /*32k at B8000*/ + mem_mapping_set_addr(&vid->ega.mapping, + 0xb8000, 0x08000); + break; + } + } + return; } if (vid->cga_enabled) - cga_out(addr, val, &vid->cga); - else - ega_out(addr, val, &vid->ega); + cga_out(addr, val, &vid->cga); + else + ega_out(addr, val, &vid->ega); } - static uint8_t vid_in_1640(uint16_t addr, void *priv) { - amsvid_t *vid = (amsvid_t *)priv; + amsvid_t *vid = (amsvid_t *) priv; if (vid->cga_enabled) - return(cga_in(addr, &vid->cga)); - else - return(ega_in(addr, &vid->ega)); + return (cga_in(addr, &vid->cga)); + else + return (ega_in(addr, &vid->ega)); } - static void vid_init_1640(amstrad_t *ams) { amsvid_t *vid; /* Allocate a video controller block. */ - vid = (amsvid_t *)malloc(sizeof(amsvid_t)); + vid = (amsvid_t *) malloc(sizeof(amsvid_t)); memset(vid, 0x00, sizeof(amsvid_t)); rom_init(&vid->bios_rom, "roms/machines/pc1640/40100", - 0xc0000, 0x8000, 0x7fff, 0, 0); + 0xc0000, 0x8000, 0x7fff, 0, 0); ega_init(&vid->ega, 9, 0); - vid->cga.vram = vid->ega.vram; + vid->cga.vram = vid->ega.vram; vid->cga_enabled = 1; cga_init(&vid->cga); timer_disable(&vid->ega.timer); @@ -839,11 +806,11 @@ vid_init_1640(amstrad_t *ams) video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_pc1640); mem_mapping_add(&vid->cga.mapping, 0xb8000, 0x08000, - cga_read, NULL, NULL, cga_write, NULL, NULL, NULL, 0, &vid->cga); - mem_mapping_add(&vid->ega.mapping, 0, 0, - ega_read, NULL, NULL, ega_write, NULL, NULL, NULL, 0, &vid->ega); + cga_read, NULL, NULL, cga_write, NULL, NULL, NULL, 0, &vid->cga); + mem_mapping_add(&vid->ega.mapping, 0, 0, + ega_read, NULL, NULL, ega_write, NULL, NULL, NULL, 0, &vid->ega); io_sethandler(0x03a0, 64, - vid_in_1640, NULL, NULL, vid_out_1640, NULL, NULL, vid); + vid_in_1640, NULL, NULL, vid_out_1640, NULL, NULL, vid); overscan_x = overscan_y = 16; @@ -855,27 +822,26 @@ vid_init_1640(amstrad_t *ams) ams->vid = vid; } - static void vid_close_1640(void *priv) { - amsvid_t *vid = (amsvid_t *)priv; + amsvid_t *vid = (amsvid_t *) priv; free(vid->ega.vram); free(vid); } - static void vid_speed_changed_1640(void *priv) { - amsvid_t *vid = (amsvid_t *)priv; + amsvid_t *vid = (amsvid_t *) priv; recalc_timings_1640(vid); } const device_config_t vid_1640_config[] = { + // clang-format off { .name = "language", .description = "BIOS language", @@ -897,28 +863,29 @@ const device_config_t vid_1640_config[] = { } }, { .name = "", .description = "", .type = CONFIG_END } + // clang-format on }; const device_t vid_1640_device = { - .name = "Amstrad PC1640 (video)", + .name = "Amstrad PC1640 (video)", .internal_name = "vid_1640", - .flags = 0, - .local = 0, - .init = NULL, - .close = vid_close_1640, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = vid_close_1640, + .reset = NULL, { .available = NULL }, .speed_changed = vid_speed_changed_1640, - .force_redraw = NULL, - .config = vid_1640_config + .force_redraw = NULL, + .config = vid_1640_config }; /* Display type */ -#define PC200_CGA 0 /* CGA monitor */ -#define PC200_MDA 1 /* MDA monitor */ -#define PC200_TV 2 /* Television */ -#define PC200_LCDC 3 /* PPC512 LCD as CGA*/ -#define PC200_LCDM 4 /* PPC512 LCD as MDA*/ +#define PC200_CGA 0 /* CGA monitor */ +#define PC200_MDA 1 /* MDA monitor */ +#define PC200_TV 2 /* Television */ +#define PC200_LCDC 3 /* PPC512 LCD as CGA*/ +#define PC200_LCDM 4 /* PPC512 LCD as MDA*/ extern int nmi_mask; @@ -926,34 +893,31 @@ static uint32_t blue, green; static uint32_t lcdcols[256][2][2]; - static void ams_inform(amsvid_t *vid) { switch (vid->emulation) { - case PC200_CGA: - case PC200_TV: - case PC200_LCDC: - video_inform(VIDEO_FLAG_TYPE_CGA, &timing_pc200); - break; - case PC200_MDA: - case PC200_LCDM: - video_inform(VIDEO_FLAG_TYPE_MDA, &timing_pc200); - break; + case PC200_CGA: + case PC200_TV: + case PC200_LCDC: + video_inform(VIDEO_FLAG_TYPE_CGA, &timing_pc200); + break; + case PC200_MDA: + case PC200_LCDM: + video_inform(VIDEO_FLAG_TYPE_MDA, &timing_pc200); + break; } } - static void vid_speed_changed_200(void *priv) { - amsvid_t *vid = (amsvid_t *)priv; + amsvid_t *vid = (amsvid_t *) priv; cga_recalctimings(&vid->cga); mda_recalctimings(&vid->mda); } - /* LCD colour mappings * * 0 => solid green @@ -961,8 +925,8 @@ vid_speed_changed_200(void *priv) * 2 => green on blue * 3 => solid blue */ -static unsigned char mapping1[256] = -{ +static unsigned char mapping1[256] = { + // clang-format off /* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ /*00*/ 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*10*/ 2, 0, 1, 1, 1, 1, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1, @@ -980,10 +944,11 @@ static unsigned char mapping1[256] = /*D0*/ 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 0, 1, 1, /*E0*/ 2, 2, 2, 2, 2, 2, 2, 1, 2, 2, 2, 2, 2, 2, 0, 1, /*F0*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 0, + // clang-format on }; -static unsigned char mapping2[256] = -{ +static unsigned char mapping2[256] = { + // clang-format off /* 0 1 2 3 4 5 6 7 8 9 A B C D E F */ /*00*/ 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*10*/ 1, 3, 2, 2, 2, 2, 2, 2, 1, 2, 2, 2, 2, 2, 2, 2, @@ -1001,636 +966,659 @@ static unsigned char mapping2[256] = /*D0*/ 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, 1, 3, 2, 2, /*E0*/ 1, 1, 1, 1, 1, 1, 1, 2, 1, 1, 1, 1, 1, 1, 3, 2, /*F0*/ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 3, + // clang-format on }; - -static void set_lcd_cols(uint8_t mode_reg) +static void +set_lcd_cols(uint8_t mode_reg) { unsigned char *mapping = (mode_reg & 0x80) ? mapping2 : mapping1; - int c; + int c; for (c = 0; c < 256; c++) { - switch (mapping[c]) { - case 0: - lcdcols[c][0][0] = lcdcols[c][1][0] = green; - lcdcols[c][0][1] = lcdcols[c][1][1] = green; - break; + switch (mapping[c]) { + case 0: + lcdcols[c][0][0] = lcdcols[c][1][0] = green; + lcdcols[c][0][1] = lcdcols[c][1][1] = green; + break; - case 1: - lcdcols[c][0][0] = lcdcols[c][1][0] = - lcdcols[c][1][1] = green; - lcdcols[c][0][1] = blue; - break; + case 1: + lcdcols[c][0][0] = lcdcols[c][1][0] = lcdcols[c][1][1] = green; + lcdcols[c][0][1] = blue; + break; - case 2: - lcdcols[c][0][0] = lcdcols[c][1][0] = - lcdcols[c][1][1] = blue; - lcdcols[c][0][1] = green; - break; + case 2: + lcdcols[c][0][0] = lcdcols[c][1][0] = lcdcols[c][1][1] = blue; + lcdcols[c][0][1] = green; + break; - case 3: - lcdcols[c][0][0] = lcdcols[c][1][0] = blue; - lcdcols[c][0][1] = lcdcols[c][1][1] = blue; - break; - } + case 3: + lcdcols[c][0][0] = lcdcols[c][1][0] = blue; + lcdcols[c][0][1] = lcdcols[c][1][1] = blue; + break; + } } } - static uint8_t vid_in_200(uint16_t addr, void *priv) { - amsvid_t *vid = (amsvid_t *)priv; - cga_t *cga = &vid->cga; - mda_t *mda = &vid->mda; - uint8_t ret; + amsvid_t *vid = (amsvid_t *) priv; + cga_t *cga = &vid->cga; + mda_t *mda = &vid->mda; + uint8_t ret; switch (addr) { - case 0x03b8: - return(mda->ctrl); + case 0x03b8: + return (mda->ctrl); - case 0x03d8: - return(cga->cgamode); + case 0x03d8: + return (cga->cgamode); - case 0x03dd: - ret = vid->crtc_index; /* Read NMI reason */ - vid->crtc_index &= 0x1f; /* Reset NMI reason */ - nmi = 0; /* And reset NMI flag */ - return(ret); + case 0x03dd: + ret = vid->crtc_index; /* Read NMI reason */ + vid->crtc_index &= 0x1f; /* Reset NMI reason */ + nmi = 0; /* And reset NMI flag */ + return (ret); - case 0x03de: - return((vid->operation_ctrl & 0xc7) | vid->dipswitches); /*External CGA*/ + case 0x03de: + return ((vid->operation_ctrl & 0xc7) | vid->dipswitches); /*External CGA*/ - case 0x03df: - return(vid->reg_3df); + case 0x03df: + return (vid->reg_3df); } if (addr >= 0x3D0 && addr <= 0x3DF) - return cga_in(addr, cga); + return cga_in(addr, cga); if (addr >= 0x3B0 && addr <= 0x3BB) - return mda_in(addr, mda); + return mda_in(addr, mda); return 0xFF; } - static void vid_out_200(uint16_t addr, uint8_t val, void *priv) { - amsvid_t *vid = (amsvid_t *)priv; - cga_t *cga = &vid->cga; - mda_t *mda = &vid->mda; - uint8_t old; + amsvid_t *vid = (amsvid_t *) priv; + cga_t *cga = &vid->cga; + mda_t *mda = &vid->mda; + uint8_t old; switch (addr) { -/* MDA writes ============================================================== */ - case 0x3b1: - case 0x3b3: - case 0x3b5: - case 0x3b7: - /* Writes banned to CRTC registers 0-11? */ - if (!(vid->operation_ctrl & 0x40) && mda->crtcreg <= 11) { - vid->crtc_index = 0x20 | (mda->crtcreg & 0x1f); - if (vid->operation_ctrl & 0x80) - nmi_raise(); - vid->reg_3df = val; - return; - } - old = mda->crtc[mda->crtcreg]; - mda->crtc[mda->crtcreg] = val & crtc_mask[mda->crtcreg]; - if (old != val) { - if (mda->crtcreg < 0xe || mda->crtcreg > 0x10) { - vid->fullchange = changeframecount; - mda_recalctimings(mda); - } - } - return; - case 0x3b8: - old = mda->ctrl; - mda->ctrl = val; - if ((mda->ctrl ^ old) & 3) - mda_recalctimings(mda); - vid->crtc_index &= 0x1F; - vid->crtc_index |= 0x80; - if (vid->operation_ctrl & 0x80) - nmi_raise(); - return; + /* MDA writes ============================================================== */ + case 0x3b1: + case 0x3b3: + case 0x3b5: + case 0x3b7: + /* Writes banned to CRTC registers 0-11? */ + if (!(vid->operation_ctrl & 0x40) && mda->crtcreg <= 11) { + vid->crtc_index = 0x20 | (mda->crtcreg & 0x1f); + if (vid->operation_ctrl & 0x80) + nmi_raise(); + vid->reg_3df = val; + return; + } + old = mda->crtc[mda->crtcreg]; + mda->crtc[mda->crtcreg] = val & crtc_mask[mda->crtcreg]; + if (old != val) { + if (mda->crtcreg < 0xe || mda->crtcreg > 0x10) { + vid->fullchange = changeframecount; + mda_recalctimings(mda); + } + } + return; + case 0x3b8: + old = mda->ctrl; + mda->ctrl = val; + if ((mda->ctrl ^ old) & 3) + mda_recalctimings(mda); + vid->crtc_index &= 0x1F; + vid->crtc_index |= 0x80; + if (vid->operation_ctrl & 0x80) + nmi_raise(); + return; -/* CGA writes ============================================================== */ - case 0x03d1: - case 0x03d3: - case 0x03d5: - case 0x03d7: - if (!(vid->operation_ctrl & 0x40) && cga->crtcreg <= 11) { - vid->crtc_index = 0x20 | (cga->crtcreg & 0x1f); - if (vid->operation_ctrl & 0x80) - nmi_raise(); - vid->reg_3df = val; - return; - } - old = cga->crtc[cga->crtcreg]; - cga->crtc[cga->crtcreg] = val & crtc_mask[cga->crtcreg]; - if (old != val) { - if (cga->crtcreg < 0xe || cga->crtcreg > 0x10) { - vid->fullchange = changeframecount; - cga_recalctimings(cga); - } - } - return; + /* CGA writes ============================================================== */ + case 0x03d1: + case 0x03d3: + case 0x03d5: + case 0x03d7: + if (!(vid->operation_ctrl & 0x40) && cga->crtcreg <= 11) { + vid->crtc_index = 0x20 | (cga->crtcreg & 0x1f); + if (vid->operation_ctrl & 0x80) + nmi_raise(); + vid->reg_3df = val; + return; + } + old = cga->crtc[cga->crtcreg]; + cga->crtc[cga->crtcreg] = val & crtc_mask[cga->crtcreg]; + if (old != val) { + if (cga->crtcreg < 0xe || cga->crtcreg > 0x10) { + vid->fullchange = changeframecount; + cga_recalctimings(cga); + } + } + return; - case 0x03d8: - old = cga->cgamode; - cga->cgamode = val; - if ((cga->cgamode ^ old) & 3) - cga_recalctimings(cga); - vid->crtc_index &= 0x1f; - vid->crtc_index |= 0x80; - if (vid->operation_ctrl & 0x80) - nmi_raise(); - else - set_lcd_cols(val); - return; + case 0x03d8: + old = cga->cgamode; + cga->cgamode = val; + if ((cga->cgamode ^ old) & 3) + cga_recalctimings(cga); + vid->crtc_index &= 0x1f; + vid->crtc_index |= 0x80; + if (vid->operation_ctrl & 0x80) + nmi_raise(); + else + set_lcd_cols(val); + return; -/* PC200 control port writes ============================================== */ - case 0x03de: - vid->crtc_index = 0x1f; - /* NMI only seems to be triggered if the value being written has the high - * bit set (enable NMI). So it only protects writes to this port if you - * let it? */ - if (val & 0x80) { - vid->operation_ctrl = val; - vid->crtc_index |= 0x40; - nmi_raise(); - return; - } - timer_disable(&vid->cga.timer); - timer_disable(&vid->mda.timer); - timer_disable(&vid->timer); - vid->operation_ctrl = val; - /* Bits 0 and 1 control emulation and output mode */ - amstrad_log("emulation and mode = %02X\n", val & 0x03); - if (val & 1) /* Monitor */ - vid->emulation = (val & 2) ? PC200_MDA : PC200_CGA; - else if (vid->type == AMS_PPC512) - vid->emulation = (val & 2) ? PC200_LCDM : PC200_LCDC; - else - vid->emulation = PC200_TV; - if (vid->emulation == PC200_CGA || vid->emulation == PC200_TV) - timer_advance_u64(&vid->cga.timer, 1); - else if (vid->emulation == PC200_MDA) - timer_advance_u64(&vid->mda.timer, 1); - else - timer_advance_u64(&vid->timer, 1); + /* PC200 control port writes ============================================== */ + case 0x03de: + vid->crtc_index = 0x1f; + /* NMI only seems to be triggered if the value being written has the high + * bit set (enable NMI). So it only protects writes to this port if you + * let it? */ + if (val & 0x80) { + vid->operation_ctrl = val; + vid->crtc_index |= 0x40; + nmi_raise(); + return; + } + timer_disable(&vid->cga.timer); + timer_disable(&vid->mda.timer); + timer_disable(&vid->timer); + vid->operation_ctrl = val; + /* Bits 0 and 1 control emulation and output mode */ + amstrad_log("emulation and mode = %02X\n", val & 0x03); + if (val & 1) /* Monitor */ + vid->emulation = (val & 2) ? PC200_MDA : PC200_CGA; + else if (vid->type == AMS_PPC512) + vid->emulation = (val & 2) ? PC200_LCDM : PC200_LCDC; + else + vid->emulation = PC200_TV; + if (vid->emulation == PC200_CGA || vid->emulation == PC200_TV) + timer_advance_u64(&vid->cga.timer, 1); + else if (vid->emulation == PC200_MDA) + timer_advance_u64(&vid->mda.timer, 1); + else + timer_advance_u64(&vid->timer, 1); - /* Bit 2 disables the IDA. We don't support dynamic enabling - * and disabling of the IDA (instead, PCEM disconnects the - * IDA from the bus altogether) so don't implement this */ + /* Bit 2 disables the IDA. We don't support dynamic enabling + * and disabling of the IDA (instead, PCEM disconnects the + * IDA from the bus altogether) so don't implement this */ - /* Enable the appropriate memory ranges depending whether - * the IDA is configured as MDA or CGA */ - if (vid->emulation == PC200_MDA || - vid->emulation == PC200_LCDM) { - mem_mapping_disable(&vid->cga.mapping); - mem_mapping_enable(&vid->mda.mapping); - } - else { - mem_mapping_disable(&vid->mda.mapping); - mem_mapping_enable(&vid->cga.mapping); - } - return; + /* Enable the appropriate memory ranges depending whether + * the IDA is configured as MDA or CGA */ + if (vid->emulation == PC200_MDA || vid->emulation == PC200_LCDM) { + mem_mapping_disable(&vid->cga.mapping); + mem_mapping_enable(&vid->mda.mapping); + } else { + mem_mapping_disable(&vid->mda.mapping); + mem_mapping_enable(&vid->cga.mapping); + } + return; } if (addr >= 0x3D0 && addr <= 0x3DF) - cga_out(addr, val, cga); + cga_out(addr, val, cga); if (addr >= 0x3B0 && addr <= 0x3BB) - mda_out(addr, val, mda); + mda_out(addr, val, mda); } - static void lcd_draw_char_80(amsvid_t *vid, uint32_t *buffer, uint8_t chr, - uint8_t attr, int drawcursor, int blink, int sc, - int mode160, uint8_t control) + uint8_t attr, int drawcursor, int blink, int sc, + int mode160, uint8_t control) { - int c; - uint8_t bits = fontdat[chr + vid->cga.fontbase][sc]; - uint8_t bright = 0; + int c; + uint8_t bits = fontdat[chr + vid->cga.fontbase][sc]; + uint8_t bright = 0; uint16_t mask; - if (attr & 8) { /* bright */ - /* The brightness algorithm appears to be: replace any bit sequence 011 - * with 001 (assuming an extra 0 to the left of the byte). - */ - bright = bits; - for (c = 0, mask = 0x100; c < 7; c++, mask >>= 1) { - if (((bits & mask) == 0) && ((bits & (mask >> 1)) != 0) && - ((bits & (mask >> 2)) != 0)) - bright &= ~(mask >> 1); - } - bits = bright; + if (attr & 8) { /* bright */ + /* The brightness algorithm appears to be: replace any bit sequence 011 + * with 001 (assuming an extra 0 to the left of the byte). + */ + bright = bits; + for (c = 0, mask = 0x100; c < 7; c++, mask >>= 1) { + if (((bits & mask) == 0) && ((bits & (mask >> 1)) != 0) && ((bits & (mask >> 2)) != 0)) + bright &= ~(mask >> 1); + } + bits = bright; } - if (drawcursor) bits ^= 0xFF; + if (drawcursor) + bits ^= 0xFF; for (c = 0, mask = 0x80; c < 8; c++, mask >>= 1) { - if (mode160) buffer[c] = (attr & mask) ? blue : green; - else if (control & 0x20) /* blinking */ - buffer[c] = lcdcols[attr & 0x7F][blink][(bits & mask) ? 1 : 0]; - else buffer[c] = lcdcols[attr][blink][(bits & mask) ? 1 : 0]; + if (mode160) + buffer[c] = (attr & mask) ? blue : green; + else if (control & 0x20) /* blinking */ + buffer[c] = lcdcols[attr & 0x7F][blink][(bits & mask) ? 1 : 0]; + else + buffer[c] = lcdcols[attr][blink][(bits & mask) ? 1 : 0]; } } - static void lcd_draw_char_40(amsvid_t *vid, uint32_t *buffer, uint8_t chr, - uint8_t attr, int drawcursor, int blink, int sc, - uint8_t control) + uint8_t attr, int drawcursor, int blink, int sc, + uint8_t control) { - int c; + int c; uint8_t bits = fontdat[chr + vid->cga.fontbase][sc]; uint8_t mask = 0x80; - if (attr & 8) /* bright */ - bits = bits & (bits >> 1); - if (drawcursor) bits ^= 0xFF; + if (attr & 8) /* bright */ + bits = bits & (bits >> 1); + if (drawcursor) + bits ^= 0xFF; for (c = 0; c < 8; c++, mask >>= 1) { - if (control & 0x20) { - buffer[c*2] = buffer[c*2+1] = - lcdcols[attr & 0x7F][blink][(bits & mask) ? 1 : 0]; - } else { - buffer[c*2] = buffer[c*2+1] = - lcdcols[attr][blink][(bits & mask) ? 1 : 0]; - } + if (control & 0x20) { + buffer[c * 2] = buffer[c * 2 + 1] = lcdcols[attr & 0x7F][blink][(bits & mask) ? 1 : 0]; + } else { + buffer[c * 2] = buffer[c * 2 + 1] = lcdcols[attr][blink][(bits & mask) ? 1 : 0]; + } } } - static void lcdm_poll(amsvid_t *vid) { - mda_t *mda = &vid->mda; - uint16_t ca = (mda->crtc[15] | (mda->crtc[14] << 8)) & 0x3fff; - int drawcursor; - int x; - int oldvc; - uint8_t chr, attr; - int oldsc; - int blink; + mda_t *mda = &vid->mda; + uint16_t ca = (mda->crtc[15] | (mda->crtc[14] << 8)) & 0x3fff; + int drawcursor; + int x; + int oldvc; + uint8_t chr, attr; + int oldsc; + int blink; if (!mda->linepos) { - timer_advance_u64(&vid->timer, mda->dispofftime); - mda->stat |= 1; - mda->linepos = 1; - oldsc = mda->sc; - if ((mda->crtc[8] & 3) == 3) - mda->sc = (mda->sc << 1) & 7; - if (mda->dispon) { - if (mda->displine < mda->firstline) - mda->firstline = mda->displine; - mda->lastline = mda->displine; - for (x = 0; x < mda->crtc[1]; x++) { - chr = mda->vram[(mda->ma << 1) & 0xfff]; - attr = mda->vram[((mda->ma << 1) + 1) & 0xfff]; - drawcursor = ((mda->ma == ca) && mda->con && mda->cursoron); - blink = ((mda->blink & 16) && (mda->ctrl & 0x20) && (attr & 0x80) && !drawcursor); + timer_advance_u64(&vid->timer, mda->dispofftime); + mda->stat |= 1; + mda->linepos = 1; + oldsc = mda->sc; + if ((mda->crtc[8] & 3) == 3) + mda->sc = (mda->sc << 1) & 7; + if (mda->dispon) { + if (mda->displine < mda->firstline) + mda->firstline = mda->displine; + mda->lastline = mda->displine; + for (x = 0; x < mda->crtc[1]; x++) { + chr = mda->vram[(mda->ma << 1) & 0xfff]; + attr = mda->vram[((mda->ma << 1) + 1) & 0xfff]; + drawcursor = ((mda->ma == ca) && mda->con && mda->cursoron); + blink = ((mda->blink & 16) && (mda->ctrl & 0x20) && (attr & 0x80) && !drawcursor); - lcd_draw_char_80(vid, &((uint32_t *)(buffer32->line[mda->displine]))[x * 8], chr, attr, drawcursor, blink, mda->sc, 0, mda->ctrl); - mda->ma++; - } - } - mda->sc = oldsc; - if (mda->vc == mda->crtc[7] && !mda->sc) - mda->stat |= 8; - mda->displine++; - if (mda->displine >= 500) - mda->displine=0; + lcd_draw_char_80(vid, &((uint32_t *) (buffer32->line[mda->displine]))[x * 8], chr, attr, drawcursor, blink, mda->sc, 0, mda->ctrl); + mda->ma++; + } + } + mda->sc = oldsc; + if (mda->vc == mda->crtc[7] && !mda->sc) + mda->stat |= 8; + mda->displine++; + if (mda->displine >= 500) + mda->displine = 0; } else { - timer_advance_u64(&vid->timer, mda->dispontime); - if (mda->dispon) mda->stat&=~1; - mda->linepos=0; - if (mda->vsynctime) { - mda->vsynctime--; - if (!mda->vsynctime) - mda->stat&=~8; - } - if (mda->sc == (mda->crtc[11] & 31) || ((mda->crtc[8] & 3) == 3 && mda->sc == ((mda->crtc[11] & 31) >> 1))) { - mda->con = 0; - mda->coff = 1; - } - if (mda->vadj) { - mda->sc++; - mda->sc &= 31; - mda->ma = mda->maback; - mda->vadj--; - if (!mda->vadj) { - mda->dispon = 1; - mda->ma = mda->maback = (mda->crtc[13] | (mda->crtc[12] << 8)) & 0x3fff; - mda->sc = 0; - } - } else if (mda->sc == mda->crtc[9] || ((mda->crtc[8] & 3) == 3 && mda->sc == (mda->crtc[9] >> 1))) { - mda->maback = mda->ma; - mda->sc = 0; - oldvc = mda->vc; - mda->vc++; - mda->vc &= 127; - if (mda->vc == mda->crtc[6]) - mda->dispon=0; - if (oldvc == mda->crtc[4]) { - mda->vc = 0; - mda->vadj = mda->crtc[5]; - if (!mda->vadj) mda->dispon = 1; - if (!mda->vadj) mda->ma = mda->maback = (mda->crtc[13] | (mda->crtc[12] << 8)) & 0x3fff; - if ((mda->crtc[10] & 0x60) == 0x20) mda->cursoron = 0; - else mda->cursoron = mda->blink & 16; - } - if (mda->vc == mda->crtc[7]) { - mda->dispon = 0; - mda->displine = 0; - mda->vsynctime = 16; - if (mda->crtc[7]) { - x = mda->crtc[1] * 8; - mda->lastline++; - if ((x != xsize) || ((mda->lastline - mda->firstline) != ysize) || video_force_resize_get()) { - xsize = x; - ysize = mda->lastline - mda->firstline; - if (xsize < 64) xsize = 656; - if (ysize < 32) ysize = 200; - set_screen_size(xsize, ysize); + timer_advance_u64(&vid->timer, mda->dispontime); + if (mda->dispon) + mda->stat &= ~1; + mda->linepos = 0; + if (mda->vsynctime) { + mda->vsynctime--; + if (!mda->vsynctime) + mda->stat &= ~8; + } + if (mda->sc == (mda->crtc[11] & 31) || ((mda->crtc[8] & 3) == 3 && mda->sc == ((mda->crtc[11] & 31) >> 1))) { + mda->con = 0; + mda->coff = 1; + } + if (mda->vadj) { + mda->sc++; + mda->sc &= 31; + mda->ma = mda->maback; + mda->vadj--; + if (!mda->vadj) { + mda->dispon = 1; + mda->ma = mda->maback = (mda->crtc[13] | (mda->crtc[12] << 8)) & 0x3fff; + mda->sc = 0; + } + } else if (mda->sc == mda->crtc[9] || ((mda->crtc[8] & 3) == 3 && mda->sc == (mda->crtc[9] >> 1))) { + mda->maback = mda->ma; + mda->sc = 0; + oldvc = mda->vc; + mda->vc++; + mda->vc &= 127; + if (mda->vc == mda->crtc[6]) + mda->dispon = 0; + if (oldvc == mda->crtc[4]) { + mda->vc = 0; + mda->vadj = mda->crtc[5]; + if (!mda->vadj) + mda->dispon = 1; + if (!mda->vadj) + mda->ma = mda->maback = (mda->crtc[13] | (mda->crtc[12] << 8)) & 0x3fff; + if ((mda->crtc[10] & 0x60) == 0x20) + mda->cursoron = 0; + else + mda->cursoron = mda->blink & 16; + } + if (mda->vc == mda->crtc[7]) { + mda->dispon = 0; + mda->displine = 0; + mda->vsynctime = 16; + if (mda->crtc[7]) { + x = mda->crtc[1] * 8; + mda->lastline++; + if ((x != xsize) || ((mda->lastline - mda->firstline) != ysize) || video_force_resize_get()) { + xsize = x; + ysize = mda->lastline - mda->firstline; + if (xsize < 64) + xsize = 656; + if (ysize < 32) + ysize = 200; + set_screen_size(xsize, ysize); - if (video_force_resize_get()) - video_force_resize_set(0); - } - video_blit_memtoscreen(0, mda->firstline, xsize, ysize); - frames++; - video_res_x = mda->crtc[1]; - video_res_y = mda->crtc[6]; - video_bpp = 0; - } - mda->firstline = 1000; - mda->lastline = 0; - mda->blink++; - } - } else { - mda->sc++; - mda->sc &= 31; - mda->ma = mda->maback; - } - if ((mda->sc == (mda->crtc[10] & 31) || ((mda->crtc[8] & 3) == 3 && mda->sc == ((mda->crtc[10] & 31) >> 1)))) - mda->con = 1; + if (video_force_resize_get()) + video_force_resize_set(0); + } + video_blit_memtoscreen(0, mda->firstline, xsize, ysize); + frames++; + video_res_x = mda->crtc[1]; + video_res_y = mda->crtc[6]; + video_bpp = 0; + } + mda->firstline = 1000; + mda->lastline = 0; + mda->blink++; + } + } else { + mda->sc++; + mda->sc &= 31; + mda->ma = mda->maback; + } + if ((mda->sc == (mda->crtc[10] & 31) || ((mda->crtc[8] & 3) == 3 && mda->sc == ((mda->crtc[10] & 31) >> 1)))) + mda->con = 1; } } - static void lcdc_poll(amsvid_t *vid) { - cga_t *cga = &vid->cga; - int drawcursor; - int x, c, xs_temp, ys_temp; - int oldvc; - uint8_t chr, attr; + cga_t *cga = &vid->cga; + int drawcursor; + int x, c, xs_temp, ys_temp; + int oldvc; + uint8_t chr, attr; uint16_t dat; - int oldsc; + int oldsc; uint16_t ca; - int blink; + int blink; ca = (cga->crtc[15] | (cga->crtc[14] << 8)) & 0x3fff; if (!cga->linepos) { - timer_advance_u64(&vid->timer, cga->dispofftime); - cga->cgastat |= 1; - cga->linepos = 1; - oldsc = cga->sc; - if ((cga->crtc[8] & 3) == 3) - cga->sc = ((cga->sc << 1) + cga->oddeven) & 7; - if (cga->cgadispon) { - if (cga->displine < cga->firstline) { - cga->firstline = cga->displine; - video_wait_for_buffer(); - } - cga->lastline = cga->displine; + timer_advance_u64(&vid->timer, cga->dispofftime); + cga->cgastat |= 1; + cga->linepos = 1; + oldsc = cga->sc; + if ((cga->crtc[8] & 3) == 3) + cga->sc = ((cga->sc << 1) + cga->oddeven) & 7; + if (cga->cgadispon) { + if (cga->displine < cga->firstline) { + cga->firstline = cga->displine; + video_wait_for_buffer(); + } + cga->lastline = cga->displine; - if (cga->cgamode & 1) { - for (x = 0; x < cga->crtc[1]; x++) { - chr = cga->charbuffer[x << 1]; - attr = cga->charbuffer[(x << 1) + 1]; - drawcursor = ((cga->ma == ca) && cga->con && cga->cursoron); - blink = ((cga->cgablink & 16) && (cga->cgamode & 0x20) && (attr & 0x80) && !drawcursor); - lcd_draw_char_80(vid, &(buffer32->line[(cga->displine << 1)])[x * 8], chr, attr, drawcursor, blink, cga->sc, cga->cgamode & 0x40, cga->cgamode); - lcd_draw_char_80(vid, &(buffer32->line[(cga->displine << 1) + 1])[x * 8], chr, attr, drawcursor, blink, cga->sc, cga->cgamode & 0x40, cga->cgamode); - cga->ma++; - } - } else if (!(cga->cgamode & 2)) { - for (x = 0; x < cga->crtc[1]; x++) { - chr = cga->vram[((cga->ma << 1) & 0x3fff)]; - attr = cga->vram[(((cga->ma << 1) + 1) & 0x3fff)]; - drawcursor = ((cga->ma == ca) && cga->con && cga->cursoron); - blink = ((cga->cgablink & 16) && (cga->cgamode & 0x20) && (attr & 0x80) && !drawcursor); - lcd_draw_char_40(vid, &(buffer32->line[(cga->displine << 1)])[x * 16], chr, attr, drawcursor, blink, cga->sc, cga->cgamode); - lcd_draw_char_40(vid, &(buffer32->line[(cga->displine << 1) + 1])[x * 16], chr, attr, drawcursor, blink, cga->sc, cga->cgamode); - cga->ma++; - } - } else { /* Graphics mode */ - for (x = 0; x < cga->crtc[1]; x++) { - dat = (cga->vram[((cga->ma << 1) & 0x1fff) + ((cga->sc & 1) * 0x2000)] << 8) | cga->vram[((cga->ma << 1) & 0x1fff) + ((cga->sc & 1) * 0x2000) + 1]; - cga->ma++; - for (c = 0; c < 16; c++) { - buffer32->line[(cga->displine << 1)][(x << 4) + c] = buffer32->line[(cga->displine << 1) + 1][(x << 4) + c] = - (dat & 0x8000) ? blue : green; - dat <<= 1; - } - } - } - } else { - if (cga->cgamode & 1) { - hline(buffer32, 0, (cga->displine << 1), (cga->crtc[1] << 3), green); - hline(buffer32, 0, (cga->displine << 1) + 1, (cga->crtc[1] << 3), green); - } else { - hline(buffer32, 0, (cga->displine << 1), (cga->crtc[1] << 4), green); - hline(buffer32, 0, (cga->displine << 1) + 1, (cga->crtc[1] << 4), green); - } - } + if (cga->cgamode & 1) { + for (x = 0; x < cga->crtc[1]; x++) { + chr = cga->charbuffer[x << 1]; + attr = cga->charbuffer[(x << 1) + 1]; + drawcursor = ((cga->ma == ca) && cga->con && cga->cursoron); + blink = ((cga->cgablink & 16) && (cga->cgamode & 0x20) && (attr & 0x80) && !drawcursor); + lcd_draw_char_80(vid, &(buffer32->line[(cga->displine << 1)])[x * 8], chr, attr, drawcursor, blink, cga->sc, cga->cgamode & 0x40, cga->cgamode); + lcd_draw_char_80(vid, &(buffer32->line[(cga->displine << 1) + 1])[x * 8], chr, attr, drawcursor, blink, cga->sc, cga->cgamode & 0x40, cga->cgamode); + cga->ma++; + } + } else if (!(cga->cgamode & 2)) { + for (x = 0; x < cga->crtc[1]; x++) { + chr = cga->vram[((cga->ma << 1) & 0x3fff)]; + attr = cga->vram[(((cga->ma << 1) + 1) & 0x3fff)]; + drawcursor = ((cga->ma == ca) && cga->con && cga->cursoron); + blink = ((cga->cgablink & 16) && (cga->cgamode & 0x20) && (attr & 0x80) && !drawcursor); + lcd_draw_char_40(vid, &(buffer32->line[(cga->displine << 1)])[x * 16], chr, attr, drawcursor, blink, cga->sc, cga->cgamode); + lcd_draw_char_40(vid, &(buffer32->line[(cga->displine << 1) + 1])[x * 16], chr, attr, drawcursor, blink, cga->sc, cga->cgamode); + cga->ma++; + } + } else { /* Graphics mode */ + for (x = 0; x < cga->crtc[1]; x++) { + dat = (cga->vram[((cga->ma << 1) & 0x1fff) + ((cga->sc & 1) * 0x2000)] << 8) | cga->vram[((cga->ma << 1) & 0x1fff) + ((cga->sc & 1) * 0x2000) + 1]; + cga->ma++; + for (c = 0; c < 16; c++) { + buffer32->line[(cga->displine << 1)][(x << 4) + c] = buffer32->line[(cga->displine << 1) + 1][(x << 4) + c] = (dat & 0x8000) ? blue : green; + dat <<= 1; + } + } + } + } else { + if (cga->cgamode & 1) { + hline(buffer32, 0, (cga->displine << 1), (cga->crtc[1] << 3), green); + hline(buffer32, 0, (cga->displine << 1) + 1, (cga->crtc[1] << 3), green); + } else { + hline(buffer32, 0, (cga->displine << 1), (cga->crtc[1] << 4), green); + hline(buffer32, 0, (cga->displine << 1) + 1, (cga->crtc[1] << 4), green); + } + } - if (cga->cgamode & 1) x = (cga->crtc[1] << 3); - else x = (cga->crtc[1] << 4); + if (cga->cgamode & 1) + x = (cga->crtc[1] << 3); + else + x = (cga->crtc[1] << 4); - cga->sc = oldsc; - if (cga->vc == cga->crtc[7] && !cga->sc) - cga->cgastat |= 8; - cga->displine++; - if (cga->displine >= 360) - cga->displine = 0; + cga->sc = oldsc; + if (cga->vc == cga->crtc[7] && !cga->sc) + cga->cgastat |= 8; + cga->displine++; + if (cga->displine >= 360) + cga->displine = 0; } else { - timer_advance_u64(&vid->timer, cga->dispontime); - cga->linepos = 0; - if (cga->vsynctime) { - cga->vsynctime--; - if (!cga->vsynctime) - cga->cgastat &= ~8; - } - if (cga->sc == (cga->crtc[11] & 31) || ((cga->crtc[8] & 3) == 3 && cga->sc == ((cga->crtc[11] & 31) >> 1))) { - cga->con = 0; - cga->coff = 1; - } - if ((cga->crtc[8] & 3) == 3 && cga->sc == (cga->crtc[9] >> 1)) - cga->maback = cga->ma; - if (cga->vadj) { - cga->sc++; - cga->sc &= 31; - cga->ma = cga->maback; - cga->vadj--; - if (!cga->vadj) { - cga->cgadispon = 1; - cga->ma = cga->maback = (cga->crtc[13] | (cga->crtc[12] << 8)) & 0x3fff; - cga->sc = 0; - } - } else if (cga->sc == cga->crtc[9]) { - cga->maback = cga->ma; - cga->sc = 0; - oldvc = cga->vc; - cga->vc++; - cga->vc &= 127; + timer_advance_u64(&vid->timer, cga->dispontime); + cga->linepos = 0; + if (cga->vsynctime) { + cga->vsynctime--; + if (!cga->vsynctime) + cga->cgastat &= ~8; + } + if (cga->sc == (cga->crtc[11] & 31) || ((cga->crtc[8] & 3) == 3 && cga->sc == ((cga->crtc[11] & 31) >> 1))) { + cga->con = 0; + cga->coff = 1; + } + if ((cga->crtc[8] & 3) == 3 && cga->sc == (cga->crtc[9] >> 1)) + cga->maback = cga->ma; + if (cga->vadj) { + cga->sc++; + cga->sc &= 31; + cga->ma = cga->maback; + cga->vadj--; + if (!cga->vadj) { + cga->cgadispon = 1; + cga->ma = cga->maback = (cga->crtc[13] | (cga->crtc[12] << 8)) & 0x3fff; + cga->sc = 0; + } + } else if (cga->sc == cga->crtc[9]) { + cga->maback = cga->ma; + cga->sc = 0; + oldvc = cga->vc; + cga->vc++; + cga->vc &= 127; - if (cga->vc == cga->crtc[6]) - cga->cgadispon = 0; + if (cga->vc == cga->crtc[6]) + cga->cgadispon = 0; - if (oldvc == cga->crtc[4]) { - cga->vc = 0; - cga->vadj = cga->crtc[5]; - if (!cga->vadj) cga->cgadispon = 1; - if (!cga->vadj) cga->ma = cga->maback = (cga->crtc[13] | (cga->crtc[12] << 8)) & 0x3fff; - if ((cga->crtc[10] & 0x60) == 0x20) cga->cursoron = 0; - else cga->cursoron = cga->cgablink & 8; - } + if (oldvc == cga->crtc[4]) { + cga->vc = 0; + cga->vadj = cga->crtc[5]; + if (!cga->vadj) + cga->cgadispon = 1; + if (!cga->vadj) + cga->ma = cga->maback = (cga->crtc[13] | (cga->crtc[12] << 8)) & 0x3fff; + if ((cga->crtc[10] & 0x60) == 0x20) + cga->cursoron = 0; + else + cga->cursoron = cga->cgablink & 8; + } - if (cga->vc == cga->crtc[7]) { - cga->cgadispon = 0; - cga->displine = 0; - cga->vsynctime = 16; - if (cga->crtc[7]) { - if (cga->cgamode & 1) x = (cga->crtc[1] << 3); - else x = (cga->crtc[1] << 4); - cga->lastline++; + if (cga->vc == cga->crtc[7]) { + cga->cgadispon = 0; + cga->displine = 0; + cga->vsynctime = 16; + if (cga->crtc[7]) { + if (cga->cgamode & 1) + x = (cga->crtc[1] << 3); + else + x = (cga->crtc[1] << 4); + cga->lastline++; - xs_temp = x; - ys_temp = (cga->lastline - cga->firstline) << 1; + xs_temp = x; + ys_temp = (cga->lastline - cga->firstline) << 1; - if ((xs_temp > 0) && (ys_temp > 0)) { - if (xs_temp < 64) xs_temp = 640; - if (ys_temp < 32) ys_temp = 400; + if ((xs_temp > 0) && (ys_temp > 0)) { + if (xs_temp < 64) + xs_temp = 640; + if (ys_temp < 32) + ys_temp = 400; - if ((cga->cgamode & 8) && ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get())) { - xsize = xs_temp; - ysize = ys_temp; - set_screen_size(xsize, ysize); + if ((cga->cgamode & 8) && ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get())) { + xsize = xs_temp; + ysize = ys_temp; + set_screen_size(xsize, ysize); - if (video_force_resize_get()) - video_force_resize_set(0); - } + if (video_force_resize_get()) + video_force_resize_set(0); + } - video_blit_memtoscreen(0, cga->firstline << 1, - xsize, (cga->lastline - cga->firstline) << 1); - } + video_blit_memtoscreen(0, cga->firstline << 1, + xsize, (cga->lastline - cga->firstline) << 1); + } - frames++; + frames++; - video_res_x = xsize; - video_res_y = ysize; - if (cga->cgamode & 1) { - video_res_x /= 8; - video_res_y /= cga->crtc[9] + 1; - video_bpp = 0; - } else if (!(cga->cgamode & 2)) { - video_res_x /= 16; - video_res_y /= cga->crtc[9] + 1; - video_bpp = 0; - } else if (!(cga->cgamode & 16)) { - video_res_x /= 2; - video_bpp = 2; - } else - video_bpp = 1; - } - cga->firstline = 1000; - cga->lastline = 0; - cga->cgablink++; - cga->oddeven ^= 1; - } - } else { - cga->sc++; - cga->sc &= 31; - cga->ma = cga->maback; - } - if (cga->cgadispon) - cga->cgastat &= ~1; - if ((cga->sc == (cga->crtc[10] & 31) || ((cga->crtc[8] & 3) == 3 && cga->sc == ((cga->crtc[10] & 31) >> 1)))) - cga->con = 1; - if (cga->cgadispon && (cga->cgamode & 1)) { - for (x = 0; x < (cga->crtc[1] << 1); x++) - cga->charbuffer[x] = cga->vram[(((cga->ma << 1) + x) & 0x3fff)]; - } + video_res_x = xsize; + video_res_y = ysize; + if (cga->cgamode & 1) { + video_res_x /= 8; + video_res_y /= cga->crtc[9] + 1; + video_bpp = 0; + } else if (!(cga->cgamode & 2)) { + video_res_x /= 16; + video_res_y /= cga->crtc[9] + 1; + video_bpp = 0; + } else if (!(cga->cgamode & 16)) { + video_res_x /= 2; + video_bpp = 2; + } else + video_bpp = 1; + } + cga->firstline = 1000; + cga->lastline = 0; + cga->cgablink++; + cga->oddeven ^= 1; + } + } else { + cga->sc++; + cga->sc &= 31; + cga->ma = cga->maback; + } + if (cga->cgadispon) + cga->cgastat &= ~1; + if ((cga->sc == (cga->crtc[10] & 31) || ((cga->crtc[8] & 3) == 3 && cga->sc == ((cga->crtc[10] & 31) >> 1)))) + cga->con = 1; + if (cga->cgadispon && (cga->cgamode & 1)) { + for (x = 0; x < (cga->crtc[1] << 1); x++) + cga->charbuffer[x] = cga->vram[(((cga->ma << 1) + x) & 0x3fff)]; + } } } - static void vid_poll_200(void *p) { - amsvid_t *vid = (amsvid_t *)p; + amsvid_t *vid = (amsvid_t *) p; switch (vid->emulation) { - case PC200_LCDM: - lcdm_poll(vid); - return; - case PC200_LCDC: - lcdc_poll(vid); - return; + case PC200_LCDM: + lcdm_poll(vid); + return; + case PC200_LCDC: + lcdc_poll(vid); + return; } } - static void vid_init_200(amstrad_t *ams) { amsvid_t *vid; - cga_t *cga; - mda_t *mda; + cga_t *cga; + mda_t *mda; /* Allocate a video controller block. */ - vid = (amsvid_t *)malloc(sizeof(amsvid_t)); + vid = (amsvid_t *) malloc(sizeof(amsvid_t)); memset(vid, 0x00, sizeof(amsvid_t)); vid->emulation = device_get_config_int("video_emulation"); /* Default to CGA */ vid->dipswitches = 0x10; - vid->type = ams->type; + vid->type = ams->type; - if (ams->type == AMS_PC200) switch (vid->emulation) { - /* DIP switches for PC200. Switches 2,3 give video emulation. - * Switch 1 is 'swap floppy drives' (not implemented) */ - case PC200_CGA: vid->dipswitches = 0x10; break; - case PC200_MDA: vid->dipswitches = 0x30; break; - case PC200_TV: vid->dipswitches = 0x00; break; - /* The other combination is 'IDA disabled' (0x20) - see - * m_amstrad.c */ - } else switch (vid->emulation) { - /* DIP switches for PPC512. Switch 1 is CRT/LCD. Switch 2 - * is MDA / CGA. Switch 3 disables IDA, not implemented. */ - /* 1 = on, 0 = off - SW1: off = crt, on = lcd; - SW2: off = mda, on = cga; - SW3: off = disable built-in card, on = enable */ - case PC200_CGA: vid->dipswitches = 0x08; break; - case PC200_MDA: vid->dipswitches = 0x18; break; - case PC200_LCDC: vid->dipswitches = 0x00; break; - case PC200_LCDM: vid->dipswitches = 0x10; break; - } + if (ams->type == AMS_PC200) + switch (vid->emulation) { + /* DIP switches for PC200. Switches 2,3 give video emulation. + * Switch 1 is 'swap floppy drives' (not implemented) */ + case PC200_CGA: + vid->dipswitches = 0x10; + break; + case PC200_MDA: + vid->dipswitches = 0x30; + break; + case PC200_TV: + vid->dipswitches = 0x00; + break; + /* The other combination is 'IDA disabled' (0x20) - see + * m_amstrad.c */ + } + else + switch (vid->emulation) { + /* DIP switches for PPC512. Switch 1 is CRT/LCD. Switch 2 + * is MDA / CGA. Switch 3 disables IDA, not implemented. */ + /* 1 = on, 0 = off + SW1: off = crt, on = lcd; + SW2: off = mda, on = cga; + SW3: off = disable built-in card, on = enable */ + case PC200_CGA: + vid->dipswitches = 0x08; + break; + case PC200_MDA: + vid->dipswitches = 0x18; + break; + case PC200_LCDC: + vid->dipswitches = 0x00; + break; + case PC200_LCDM: + vid->dipswitches = 0x10; + break; + } - cga = &vid->cga; - mda = &vid->mda; + cga = &vid->cga; + mda = &vid->mda; cga->vram = mda->vram = malloc(0x4000); cga_init(cga); mda_init(mda); @@ -1649,24 +1637,24 @@ vid_init_200(amstrad_t *ams) timer_add(&vid->timer, vid_poll_200, vid, 1); mem_mapping_add(&vid->mda.mapping, 0xb0000, 0x08000, - mda_read, NULL, NULL, mda_write, NULL, NULL, NULL, 0, mda); + mda_read, NULL, NULL, mda_write, NULL, NULL, NULL, 0, mda); mem_mapping_add(&vid->cga.mapping, 0xb8000, 0x08000, - cga_read, NULL, NULL, cga_write, NULL, NULL, NULL, 0, cga); + cga_read, NULL, NULL, cga_write, NULL, NULL, NULL, 0, cga); io_sethandler(0x03d0, 16, vid_in_200, NULL, NULL, vid_out_200, NULL, NULL, vid); io_sethandler(0x03b0, 0x000c, vid_in_200, NULL, NULL, vid_out_200, NULL, NULL, vid); overscan_x = overscan_y = 16; if (ams->type == AMS_PC200) - vid->invert = 0; + vid->invert = 0; else - vid->invert = device_get_config_int("invert"); + vid->invert = device_get_config_int("invert"); if (vid->invert) { - blue = makecol(0x1C, 0x71, 0x31); - green = makecol(0x0f, 0x21, 0x3f); + blue = makecol(0x1C, 0x71, 0x31); + green = makecol(0x0f, 0x21, 0x3f); } else { - green = makecol(0x1C, 0x71, 0x31); - blue = makecol(0x0f, 0x21, 0x3f); + green = makecol(0x1C, 0x71, 0x31); + blue = makecol(0x0f, 0x21, 0x3f); } cgapal_rebuild(); set_lcd_cols(0); @@ -1675,38 +1663,37 @@ vid_init_200(amstrad_t *ams) timer_disable(&vid->mda.timer); timer_disable(&vid->timer); if (vid->emulation == PC200_CGA || vid->emulation == PC200_TV) - timer_enable(&vid->cga.timer); + timer_enable(&vid->cga.timer); else if (vid->emulation == PC200_MDA) - timer_enable(&vid->mda.timer); + timer_enable(&vid->mda.timer); else - timer_enable(&vid->timer); + timer_enable(&vid->timer); ams->vid = vid; } - static void vid_close_200(void *priv) { - amsvid_t *vid = (amsvid_t *)priv; + amsvid_t *vid = (amsvid_t *) priv; if (vid->cga.vram != vid->mda.vram) { - free(vid->cga.vram); - free(vid->mda.vram); + free(vid->cga.vram); + free(vid->mda.vram); } else - free(vid->cga.vram); + free(vid->cga.vram); vid->cga.vram = vid->mda.vram = NULL; free(vid); } - const device_config_t vid_200_config[] = { - /* TODO: Should have options here for: - * - * > Display port (TTL or RF) - */ + /* TODO: Should have options here for: + * + * > Display port (TTL or RF) + */ + // clang-format off { .name = "video_emulation", .description = "Display type", @@ -1776,27 +1763,29 @@ const device_config_t vid_200_config[] = { } }, { .name = "", .description = "", .type = CONFIG_END } + // clang-format on }; const device_t vid_200_device = { - .name = "Amstrad PC200 (video)", + .name = "Amstrad PC200 (video)", .internal_name = "vid_200", - .flags = 0, - .local = 0, - .init = NULL, - .close = vid_close_200, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = vid_close_200, + .reset = NULL, { .available = NULL }, .speed_changed = vid_speed_changed_200, - .force_redraw = NULL, - .config = vid_200_config + .force_redraw = NULL, + .config = vid_200_config }; const device_config_t vid_ppc512_config[] = { - /* TODO: Should have options here for: - * - * > Display port (TTL or RF) - */ + /* TODO: Should have options here for: + * + * > Display port (TTL or RF) + */ + // clang-format off { .name = "video_emulation", .description = "Display type", @@ -1874,23 +1863,25 @@ const device_config_t vid_ppc512_config[] = { .default_int = 0 }, { .name = "", .description = "", .type = CONFIG_END } + // clang-format on }; const device_t vid_ppc512_device = { - .name = "Amstrad PPC512 (video)", + .name = "Amstrad PPC512 (video)", .internal_name = "vid_ppc512", - .flags = 0, - .local = 0, - .init = NULL, - .close = vid_close_200, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = vid_close_200, + .reset = NULL, { .available = NULL }, .speed_changed = vid_speed_changed_200, - .force_redraw = NULL, - .config = vid_ppc512_config + .force_redraw = NULL, + .config = vid_ppc512_config }; const device_config_t vid_pc2086_config[] = { + // clang-format off { .name = "language", .description = "BIOS language", @@ -1906,23 +1897,25 @@ const device_config_t vid_pc2086_config[] = { } }, { .name = "", .description = "", .type = CONFIG_END } + // clang-format on }; const device_t vid_pc2086_device = { - .name = "Amstrad PC2086", + .name = "Amstrad PC2086", .internal_name = "vid_pc2086", - .flags = 0, - .local = 0, - .init = NULL, - .close = NULL, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = NULL, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = vid_pc2086_config + .force_redraw = NULL, + .config = vid_pc2086_config }; const device_config_t vid_pc3086_config[] = { + // clang-format off { .name = "language", .description = "BIOS language", @@ -1938,387 +1931,378 @@ const device_config_t vid_pc3086_config[] = { } }, { .name = "", .description = "", .type = CONFIG_END } + // clang-format on }; const device_t vid_pc3086_device = { - .name = "Amstrad PC3086", + .name = "Amstrad PC3086", .internal_name = "vid_pc3086", - .flags = 0, - .local = 0, - .init = NULL, - .close = NULL, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = NULL, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = vid_pc3086_config + .force_redraw = NULL, + .config = vid_pc3086_config }; static void ms_write(uint16_t addr, uint8_t val, void *priv) { - amstrad_t *ams = (amstrad_t *)priv; + amstrad_t *ams = (amstrad_t *) priv; if ((addr == 0x78) || (addr == 0x79)) - ams->mousex = 0; + ams->mousex = 0; else - ams->mousey = 0; + ams->mousey = 0; } - static uint8_t ms_read(uint16_t addr, void *priv) { - amstrad_t *ams = (amstrad_t *)priv; - uint8_t ret; + amstrad_t *ams = (amstrad_t *) priv; + uint8_t ret; if ((addr == 0x78) || (addr == 0x79)) { - ret = ams->mousex; - ams->mousex = 0; + ret = ams->mousex; + ams->mousex = 0; } else { - ret = ams->mousey; - ams->mousey = 0; + ret = ams->mousey; + ams->mousey = 0; } - return(ret); + return (ret); } - static int ms_poll(int x, int y, int z, int b, void *priv) { - amstrad_t *ams = (amstrad_t *)priv; + amstrad_t *ams = (amstrad_t *) priv; ams->mousex += x; ams->mousey -= y; if ((b & 1) && !(ams->oldb & 1)) - keyboard_send(0x7e); + keyboard_send(0x7e); if (!(b & 1) && (ams->oldb & 1)) - keyboard_send(0xfe); + keyboard_send(0xfe); if ((b & 2) && !(ams->oldb & 2)) - keyboard_send(0x7d); + keyboard_send(0x7d); if (!(b & 2) && (ams->oldb & 2)) - keyboard_send(0xfd); + keyboard_send(0xfd); ams->oldb = b; - return(0); + return (0); } - static void kbd_adddata(uint16_t val) { key_queue[key_queue_end] = val; - key_queue_end = (key_queue_end + 1) & 0xf; + key_queue_end = (key_queue_end + 1) & 0xf; } - static void kbd_adddata_ex(uint16_t val) { kbd_adddata_process(val, kbd_adddata); } - static void kbd_write(uint16_t port, uint8_t val, void *priv) { - amstrad_t *ams = (amstrad_t *)priv; + amstrad_t *ams = (amstrad_t *) priv; amstrad_log("keyboard_amstrad : write %04X %02X %02X\n", port, val, ams->pb); switch (port) { - case 0x61: - /* - * PortB - System Control. - * - * 7 Enable Status-1/Disable Keyboard Code on Port A. - * 6 Enable incoming Keyboard Clock. - * 5 Prevent external parity errors from causing NMI. - * 4 Disable parity checking of on-board system Ram. - * 3 Undefined (Not Connected). - * 2 Enable Port C LSB / Disable MSB. (See 1.8.3) - * 1 Speaker Drive. - * 0 8253 GATE 2 (Speaker Modulate). - * - * This register is controlled by BIOS and/or ROS. - */ - amstrad_log("AMSkb: write PB %02x (%02x)\n", val, ams->pb); - if (!(ams->pb & 0x40) && (val & 0x40)) { /*Reset keyboard*/ - amstrad_log("AMSkb: reset keyboard\n"); - kbd_adddata(0xaa); - } - ams->pb = val; - ppi.pb = val; + case 0x61: + /* + * PortB - System Control. + * + * 7 Enable Status-1/Disable Keyboard Code on Port A. + * 6 Enable incoming Keyboard Clock. + * 5 Prevent external parity errors from causing NMI. + * 4 Disable parity checking of on-board system Ram. + * 3 Undefined (Not Connected). + * 2 Enable Port C LSB / Disable MSB. (See 1.8.3) + * 1 Speaker Drive. + * 0 8253 GATE 2 (Speaker Modulate). + * + * This register is controlled by BIOS and/or ROS. + */ + amstrad_log("AMSkb: write PB %02x (%02x)\n", val, ams->pb); + if (!(ams->pb & 0x40) && (val & 0x40)) { /*Reset keyboard*/ + amstrad_log("AMSkb: reset keyboard\n"); + kbd_adddata(0xaa); + } + ams->pb = val; + ppi.pb = val; - speaker_update(); - speaker_gated = val & 0x01; - speaker_enable = val & 0x02; - if (speaker_enable) - was_speaker_enable = 1; - pit_devs[0].set_gate(pit_devs[0].data, 2, val & 0x01); + speaker_update(); + speaker_gated = val & 0x01; + speaker_enable = val & 0x02; + if (speaker_enable) + was_speaker_enable = 1; + pit_devs[0].set_gate(pit_devs[0].data, 2, val & 0x01); - if (val & 0x80) { - /* Keyboard enabled, so enable PA reading. */ - ams->pa = 0x00; - } - break; + if (val & 0x80) { + /* Keyboard enabled, so enable PA reading. */ + ams->pa = 0x00; + } + break; - case 0x63: - break; + case 0x63: + break; - case 0x64: - ams->stat1 = val; - break; + case 0x64: + ams->stat1 = val; + break; - case 0x65: - ams->stat2 = val; - break; + case 0x65: + ams->stat2 = val; + break; - case 0x66: - softresetx86(); - cpu_set_edx(); - break; + case 0x66: + softresetx86(); + cpu_set_edx(); + break; - default: - amstrad_log("AMSkb: bad keyboard write %04X %02X\n", port, val); + default: + amstrad_log("AMSkb: bad keyboard write %04X %02X\n", port, val); } } - static uint8_t kbd_read(uint16_t port, void *priv) { - amstrad_t *ams = (amstrad_t *)priv; - uint8_t ret = 0xff; + amstrad_t *ams = (amstrad_t *) priv; + uint8_t ret = 0xff; switch (port) { - case 0x60: - if (ams->pb & 0x80) { - /* - * PortA - System Status 1 - * - * 7 Always 0 (KBD7) - * 6 Second Floppy disk drive installed (KBD6) - * 5 DDM1 - Default Display Mode bit 1 (KBD5) - * 4 DDM0 - Default Display Mode bit 0 (KBD4) - * 3 Always 1 (KBD3) - * 2 Always 1 (KBD2) - * 1 8087 NDP installed (KBD1) - * 0 Always 1 (KBD0) - * - * DDM00 - * 00 unknown, external color? - * 01 Color,alpha,40x25, bright white on black. - * 10 Color,alpha,80x25, bright white on black. - * 11 External Monochrome,80x25. - * - * Following a reset, the hardware selects VDU mode - * 2. The ROS then sets the initial VDU state based - * on the DDM value. - */ - ret = (ams->stat1 | 0x0d) & 0x7f; - } else { - ret = ams->pa; - if (key_queue_start == key_queue_end) - ams->wantirq = 0; - else { - ams->key_waiting = key_queue[key_queue_start]; - key_queue_start = (key_queue_start + 1) & 0xf; - ams->wantirq = 1; - } - } - break; + case 0x60: + if (ams->pb & 0x80) { + /* + * PortA - System Status 1 + * + * 7 Always 0 (KBD7) + * 6 Second Floppy disk drive installed (KBD6) + * 5 DDM1 - Default Display Mode bit 1 (KBD5) + * 4 DDM0 - Default Display Mode bit 0 (KBD4) + * 3 Always 1 (KBD3) + * 2 Always 1 (KBD2) + * 1 8087 NDP installed (KBD1) + * 0 Always 1 (KBD0) + * + * DDM00 + * 00 unknown, external color? + * 01 Color,alpha,40x25, bright white on black. + * 10 Color,alpha,80x25, bright white on black. + * 11 External Monochrome,80x25. + * + * Following a reset, the hardware selects VDU mode + * 2. The ROS then sets the initial VDU state based + * on the DDM value. + */ + ret = (ams->stat1 | 0x0d) & 0x7f; + } else { + ret = ams->pa; + if (key_queue_start == key_queue_end) + ams->wantirq = 0; + else { + ams->key_waiting = key_queue[key_queue_start]; + key_queue_start = (key_queue_start + 1) & 0xf; + ams->wantirq = 1; + } + } + break; - case 0x61: - ret = ams->pb; - break; + case 0x61: + ret = ams->pb; + break; - case 0x62: - /* - * PortC - System Status 2. - * - * 7 On-board system RAM parity error. - * 6 External parity error (I/OCHCK from expansion bus). - * 5 8253 PIT OUT2 output. - * 4 Undefined (Not Connected). - *------------------------------------------- - * LSB MSB (depends on PB2) - *------------------------------------------- - * 3 RAM3 Undefined - * 2 RAM2 Undefined - * 1 RAM1 Undefined - * 0 RAM0 RAM4 - * - * PC7 is forced to 0 when on-board system RAM parity - * checking is disabled by PB4. - * - * RAM4:0 - * 01110 512K bytes on-board. - * 01111 544K bytes (32K external). - * 10000 576K bytes (64K external). - * 10001 608K bytes (96K external). - * 10010 640K bytes (128K external or fitted on-board). - */ - if (ams->pb & 0x04) - ret = ams->stat2 & 0x0f; - else - ret = ams->stat2 >> 4; - ret |= (ppispeakon ? 0x20 : 0); - if (nmi) - ret |= 0x40; - break; + case 0x62: + /* + * PortC - System Status 2. + * + * 7 On-board system RAM parity error. + * 6 External parity error (I/OCHCK from expansion bus). + * 5 8253 PIT OUT2 output. + * 4 Undefined (Not Connected). + *------------------------------------------- + * LSB MSB (depends on PB2) + *------------------------------------------- + * 3 RAM3 Undefined + * 2 RAM2 Undefined + * 1 RAM1 Undefined + * 0 RAM0 RAM4 + * + * PC7 is forced to 0 when on-board system RAM parity + * checking is disabled by PB4. + * + * RAM4:0 + * 01110 512K bytes on-board. + * 01111 544K bytes (32K external). + * 10000 576K bytes (64K external). + * 10001 608K bytes (96K external). + * 10010 640K bytes (128K external or fitted on-board). + */ + if (ams->pb & 0x04) + ret = ams->stat2 & 0x0f; + else + ret = ams->stat2 >> 4; + ret |= (ppispeakon ? 0x20 : 0); + if (nmi) + ret |= 0x40; + break; - default: - amstrad_log("AMDkb: bad keyboard read %04X\n", port); + default: + amstrad_log("AMDkb: bad keyboard read %04X\n", port); } - return(ret); + return (ret); } - static void kbd_poll(void *priv) { - amstrad_t *ams = (amstrad_t *)priv; + amstrad_t *ams = (amstrad_t *) priv; timer_advance_u64(&ams->send_delay_timer, 1000 * TIMER_USEC); if (ams->wantirq) { - ams->wantirq = 0; - ams->pa = ams->key_waiting; - picint(2); + ams->wantirq = 0; + ams->pa = ams->key_waiting; + picint(2); } if (key_queue_start != key_queue_end && !ams->pa) { - ams->key_waiting = key_queue[key_queue_start]; - key_queue_start = (key_queue_start + 1) & 0x0f; - ams->wantirq = 1; + ams->key_waiting = key_queue[key_queue_start]; + key_queue_start = (key_queue_start + 1) & 0x0f; + ams->wantirq = 1; } } - static void ams_write(uint16_t port, uint8_t val, void *priv) { - amstrad_t *ams = (amstrad_t *)priv; + amstrad_t *ams = (amstrad_t *) priv; switch (port) { - case 0x0378: - case 0x0379: - case 0x037a: - lpt_write(port, val, &lpt_ports[0]); - break; + case 0x0378: + case 0x0379: + case 0x037a: + lpt_write(port, val, &lpt_ports[0]); + break; - case 0xdead: - ams->dead = val; - break; + case 0xdead: + ams->dead = val; + break; } } - static uint8_t ams_read(uint16_t port, void *priv) { - amstrad_t *ams = (amstrad_t *)priv; - uint8_t ret = 0xff; + amstrad_t *ams = (amstrad_t *) priv; + uint8_t ret = 0xff; switch (port) { - case 0x0378: - ret = lpt_read(port, &lpt_ports[0]); - break; + case 0x0378: + ret = lpt_read(port, &lpt_ports[0]); + break; - case 0x0379: /* printer control, also set LK1-3. - * per John Elliott's site, this is xor'ed with 0x07 - * 7 English Language. - * 6 German Language. - * 5 French Language. - * 4 Spanish Language. - * 3 Danish Language. - * 2 Swedish Language. - * 1 Italian Language. - * 0 Diagnostic Mode. - */ - ret = (lpt_read(port, &lpt_ports[0]) & 0xf8) | ams->language; - break; + case 0x0379: /* printer control, also set LK1-3. + * per John Elliott's site, this is xor'ed with 0x07 + * 7 English Language. + * 6 German Language. + * 5 French Language. + * 4 Spanish Language. + * 3 Danish Language. + * 2 Swedish Language. + * 1 Italian Language. + * 0 Diagnostic Mode. + */ + ret = (lpt_read(port, &lpt_ports[0]) & 0xf8) | ams->language; + break; - case 0x037a: /* printer status */ - ret = lpt_read(port, &lpt_ports[0]) & 0x1f; + case 0x037a: /* printer status */ + ret = lpt_read(port, &lpt_ports[0]) & 0x1f; - switch(ams->type) { - case AMS_PC1512: - ret |= 0x20; - break; + switch (ams->type) { + case AMS_PC1512: + ret |= 0x20; + break; - case AMS_PC200: - case AMS_PPC512: - if (video_is_cga()) - ret |= 0x80; - else if (video_is_mda()) - ret |= 0xc0; + case AMS_PC200: + case AMS_PPC512: + if (video_is_cga()) + ret |= 0x80; + else if (video_is_mda()) + ret |= 0xc0; - if (fdc_read(0x037f, ams->fdc) & 0x80) - ret |= 0x20; - break; + if (fdc_read(0x037f, ams->fdc) & 0x80) + ret |= 0x20; + break; - case AMS_PC1640: - if (video_is_cga()) - ret |= 0x80; - else if (video_is_mda()) - ret |= 0xc0; + case AMS_PC1640: + if (video_is_cga()) + ret |= 0x80; + else if (video_is_mda()) + ret |= 0xc0; - switch (amstrad_latch) { - case AMSTRAD_NOLATCH: - ret &= ~0x20; - break; - case AMSTRAD_SW9: - ret &= ~0x20; - break; - case AMSTRAD_SW10: - ret |= 0x20; - break; - } - break; + switch (amstrad_latch) { + case AMSTRAD_NOLATCH: + ret &= ~0x20; + break; + case AMSTRAD_SW9: + ret &= ~0x20; + break; + case AMSTRAD_SW10: + ret |= 0x20; + break; + } + break; - default: - break; - } - break; + default: + break; + } + break; - case 0x03de: - ret = 0x20; - break; + case 0x03de: + ret = 0x20; + break; - case 0xdead: - ret = ams->dead; - break; + case 0xdead: + ret = ams->dead; + break; } - return(ret); + return (ret); } - static void machine_amstrad_init(const machine_t *model, int type) { amstrad_t *ams; - ams = (amstrad_t *)malloc(sizeof(amstrad_t)); + ams = (amstrad_t *) malloc(sizeof(amstrad_t)); memset(ams, 0x00, sizeof(amstrad_t)); ams->type = type; - switch(type) { - case AMS_PC200: - case AMS_PPC512: - device_add(&amstrad_no_nmi_nvr_device); - break; + switch (type) { + case AMS_PC200: + case AMS_PPC512: + device_add(&amstrad_no_nmi_nvr_device); + break; - default: - device_add(&amstrad_nvr_device); - break; + default: + device_add(&amstrad_nvr_device); + break; } machine_common_init(model); @@ -2329,86 +2313,88 @@ machine_amstrad_init(const machine_t *model, int type) lpt2_remove(); io_sethandler(0x0378, 3, - ams_read, NULL, NULL, ams_write, NULL, NULL, ams); + ams_read, NULL, NULL, ams_write, NULL, NULL, ams); io_sethandler(0xdead, 1, - ams_read, NULL, NULL, ams_write, NULL, NULL, ams); + ams_read, NULL, NULL, ams_write, NULL, NULL, ams); - switch(type) { - case AMS_PC1512: - case AMS_PC1640: - case AMS_PC200: - case AMS_PPC512: - ams->fdc = device_add(&fdc_xt_device); - break; + switch (type) { + case AMS_PC1512: + case AMS_PC1640: + case AMS_PC200: + case AMS_PPC512: + ams->fdc = device_add(&fdc_xt_device); + break; - case AMS_PC2086: - case AMS_PC3086: - ams->fdc = device_add(&fdc_at_actlow_device); - break; + case AMS_PC2086: + case AMS_PC3086: + ams->fdc = device_add(&fdc_at_actlow_device); + break; } ams->language = 7; video_reset(gfxcard); - if (gfxcard == VID_INTERNAL) switch(type) { - case AMS_PC1512: - loadfont("roms/machines/pc1512/40078", 8); - device_context(&vid_1512_device); - ams->language = device_get_config_int("language"); - vid_init_1512(ams); - device_context_restore(); - device_add_ex(&vid_1512_device, ams->vid); - break; + if (gfxcard == VID_INTERNAL) + switch (type) { + case AMS_PC1512: + loadfont("roms/machines/pc1512/40078", 8); + device_context(&vid_1512_device); + ams->language = device_get_config_int("language"); + vid_init_1512(ams); + device_context_restore(); + device_add_ex(&vid_1512_device, ams->vid); + break; - case AMS_PPC512: - loadfont("roms/machines/ppc512/40109", 1); - device_context(&vid_ppc512_device); - ams->language = device_get_config_int("language"); - vid_init_200(ams); - device_context_restore(); - device_add_ex(&vid_ppc512_device, ams->vid); - break; + case AMS_PPC512: + loadfont("roms/machines/ppc512/40109", 1); + device_context(&vid_ppc512_device); + ams->language = device_get_config_int("language"); + vid_init_200(ams); + device_context_restore(); + device_add_ex(&vid_ppc512_device, ams->vid); + break; - case AMS_PC1640: - loadfont("roms/video/mda/mda.rom", 0); - device_context(&vid_1640_device); - ams->language = device_get_config_int("language"); - vid_init_1640(ams); - device_context_restore(); - device_add_ex(&vid_1640_device, ams->vid); - break; + case AMS_PC1640: + loadfont("roms/video/mda/mda.rom", 0); + device_context(&vid_1640_device); + ams->language = device_get_config_int("language"); + vid_init_1640(ams); + device_context_restore(); + device_add_ex(&vid_1640_device, ams->vid); + break; - case AMS_PC200: - loadfont("roms/machines/pc200/40109", 1); - device_context(&vid_200_device); - ams->language = device_get_config_int("language"); - vid_init_200(ams); - device_context_restore(); - device_add_ex(&vid_200_device, ams->vid); - break; + case AMS_PC200: + loadfont("roms/machines/pc200/40109", 1); + device_context(&vid_200_device); + ams->language = device_get_config_int("language"); + vid_init_200(ams); + device_context_restore(); + device_add_ex(&vid_200_device, ams->vid); + break; - case AMS_PC2086: - device_context(&vid_pc2086_device); - ams->language = device_get_config_int("language"); - device_context_restore(); - device_add(¶dise_pvga1a_pc2086_device); - break; + case AMS_PC2086: + device_context(&vid_pc2086_device); + ams->language = device_get_config_int("language"); + device_context_restore(); + device_add(¶dise_pvga1a_pc2086_device); + break; - case AMS_PC3086: - device_context(&vid_pc3086_device); - ams->language = device_get_config_int("language"); - device_context_restore(); - device_add(¶dise_pvga1a_pc3086_device); - break; - } else if ((type == AMS_PC200) || (type == AMS_PPC512)) - io_sethandler(0x03de, 1, - ams_read, NULL, NULL, ams_write, NULL, NULL, ams); + case AMS_PC3086: + device_context(&vid_pc3086_device); + ams->language = device_get_config_int("language"); + device_context_restore(); + device_add(¶dise_pvga1a_pc3086_device); + break; + } + else if ((type == AMS_PC200) || (type == AMS_PPC512)) + io_sethandler(0x03de, 1, + ams_read, NULL, NULL, ams_write, NULL, NULL, ams); /* Initialize the (custom) keyboard/mouse interface. */ ams->wantirq = 0; io_sethandler(0x0060, 7, - kbd_read, NULL, NULL, kbd_write, NULL, NULL, ams); + kbd_read, NULL, NULL, kbd_write, NULL, NULL, ams); timer_add(&ams->send_delay_timer, kbd_poll, ams, 1); keyboard_set_table(scancode_xt); keyboard_send = kbd_adddata_ex; @@ -2416,126 +2402,120 @@ machine_amstrad_init(const machine_t *model, int type) keyboard_set_is_amstrad(((type == AMS_PC1512) || (type == AMS_PC1640)) ? 0 : 1); io_sethandler(0x0078, 2, - ms_read, NULL, NULL, ms_write, NULL, NULL, ams); + ms_read, NULL, NULL, ms_write, NULL, NULL, ams); io_sethandler(0x007a, 2, - ms_read, NULL, NULL, ms_write, NULL, NULL, ams); + ms_read, NULL, NULL, ms_write, NULL, NULL, ams); if (mouse_type == MOUSE_TYPE_INTERNAL) { - /* Tell mouse driver about our internal mouse. */ - mouse_reset(); - mouse_set_poll(ms_poll, ams); +/* Tell mouse driver about our internal mouse. */ + mouse_reset(); + mouse_set_poll(ms_poll, ams); } standalone_gameport_type = &gameport_device; } - int machine_pc1512_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/pc1512/40044", - "roms/machines/pc1512/40043", - 0x000fc000, 16384, 0); + "roms/machines/pc1512/40043", + 0x000fc000, 16384, 0); ret &= rom_present("roms/machines/pc1512/40078"); if (bios_only || !ret) - return ret; + return ret; machine_amstrad_init(model, AMS_PC1512); return ret; } - int machine_pc1640_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/pc1640/40044.v3", - "roms/machines/pc1640/40043.v3", - 0x000fc000, 16384, 0); + "roms/machines/pc1640/40043.v3", + 0x000fc000, 16384, 0); ret &= rom_present("roms/machines/pc1640/40100"); if (bios_only || !ret) - return ret; + return ret; machine_amstrad_init(model, AMS_PC1640); return ret; } - int machine_pc200_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/pc200/pc20v2.1", - "roms/machines/pc200/pc20v2.0", - 0x000fc000, 16384, 0); + "roms/machines/pc200/pc20v2.0", + 0x000fc000, 16384, 0); ret &= rom_present("roms/machines/pc200/40109"); if (bios_only || !ret) - return ret; + return ret; machine_amstrad_init(model, AMS_PC200); return ret; } - int machine_ppc512_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/ppc512/40107.v2", - "roms/machines/ppc512/40108.v2", - 0x000fc000, 16384, 0); + "roms/machines/ppc512/40108.v2", + 0x000fc000, 16384, 0); ret &= rom_present("roms/machines/ppc512/40109"); if (bios_only || !ret) - return ret; + return ret; machine_amstrad_init(model, AMS_PPC512); return ret; } - int machine_pc2086_init(const machine_t *model) { int ret; ret = bios_load_interleavedr("roms/machines/pc2086/40179.ic129", - "roms/machines/pc2086/40180.ic132", - 0x000fc000, 65536, 0); + "roms/machines/pc2086/40180.ic132", + 0x000fc000, 65536, 0); ret &= rom_present("roms/machines/pc2086/40186.ic171"); if (bios_only || !ret) - return ret; + return ret; machine_amstrad_init(model, AMS_PC2086); return ret; } - int machine_pc3086_init(const machine_t *model) { int ret; ret = bios_load_linearr("roms/machines/pc3086/fc00.bin", - 0x000fc000, 65536, 0); + 0x000fc000, 65536, 0); ret &= rom_present("roms/machines/pc3086/c000.bin"); if (bios_only || !ret) - return ret; + return ret; machine_amstrad_init(model, AMS_PC3086); diff --git a/src/machine/m_at.c b/src/machine/m_at.c index df3c4bd8b..c4c566f98 100644 --- a/src/machine/m_at.c +++ b/src/machine/m_at.c @@ -35,7 +35,8 @@ * 59 Temple Place - Suite 330 * Boston, MA 02111-1307 * USA. -*/ + */ + #include #include #include @@ -59,7 +60,6 @@ #include <86box/port_6x.h> #include <86box/machine.h> - void machine_at_common_init_ex(const machine_t *model, int type) { @@ -71,25 +71,23 @@ machine_at_common_init_ex(const machine_t *model, int type) dma16_init(); if (!(type & 4)) - device_add(&port_6x_device); + device_add(&port_6x_device); type &= 3; if (type == 1) - device_add(&ibmat_nvr_device); + device_add(&ibmat_nvr_device); else if (type == 0) - device_add(&at_nvr_device); + device_add(&at_nvr_device); standalone_gameport_type = &gameport_device; } - void machine_at_common_init(const machine_t *model) { machine_at_common_init_ex(model, 0); } - void machine_at_init(const machine_t *model) { @@ -98,7 +96,6 @@ machine_at_init(const machine_t *model) device_add(&keyboard_at_device); } - static void machine_at_ibm_common_init(const machine_t *model) { @@ -109,10 +106,9 @@ machine_at_ibm_common_init(const machine_t *model) mem_remap_top(384); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); } - void machine_at_ps2_init(const machine_t *model) { @@ -121,7 +117,6 @@ machine_at_ps2_init(const machine_t *model) device_add(&keyboard_ps2_device); } - void machine_at_common_ide_init(const machine_t *model) { @@ -130,7 +125,6 @@ machine_at_common_ide_init(const machine_t *model) device_add(&ide_isa_device); } - void machine_at_ibm_common_ide_init(const machine_t *model) { @@ -139,7 +133,6 @@ machine_at_ibm_common_ide_init(const machine_t *model) device_add(&ide_isa_device); } - void machine_at_ide_init(const machine_t *model) { @@ -148,7 +141,6 @@ machine_at_ide_init(const machine_t *model) device_add(&ide_isa_device); } - void machine_at_ps2_ide_init(const machine_t *model) { @@ -157,25 +149,23 @@ machine_at_ps2_ide_init(const machine_t *model) device_add(&ide_isa_device); } - int machine_at_ibm_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/ibmat/62x0820.u27", - "roms/machines/ibmat/62x0821.u47", - 0x000f0000, 65536, 0); + "roms/machines/ibmat/62x0821.u47", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_ibm_common_init(model); return ret; } - /* IBM AT machines with custom BIOSes */ int machine_at_ibmatquadtel_init(const machine_t *model) @@ -183,65 +173,62 @@ machine_at_ibmatquadtel_init(const machine_t *model) int ret; ret = bios_load_interleaved("roms/machines/ibmatquadtel/BIOS_30MAR90_U27_QUADTEL_ENH_286_BIOS_3.05.01_27256.BIN", - "roms/machines/ibmatquadtel/BIOS_30MAR90_U47_QUADTEL_ENH_286_BIOS_3.05.01_27256.BIN", - 0x000f0000, 65536, 0); + "roms/machines/ibmatquadtel/BIOS_30MAR90_U47_QUADTEL_ENH_286_BIOS_3.05.01_27256.BIN", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_ibm_common_init(model); return ret; } - int machine_at_ibmatami_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/ibmatami/BIOS_5170_30APR89_U27_AMI_27256.BIN", - "roms/machines/ibmatami/BIOS_5170_30APR89_U47_AMI_27256.BIN", - 0x000f0000, 65536, 0); + "roms/machines/ibmatami/BIOS_5170_30APR89_U47_AMI_27256.BIN", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_ibm_common_init(model); return ret; } - int machine_at_ibmatpx_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/ibmatpx/BIOS ROM - PhoenixBIOS A286 - Version 1.01 - Even.bin", - "roms/machines/ibmatpx/BIOS ROM - PhoenixBIOS A286 - Version 1.01 - Odd.bin", - 0x000f0000, 65536, 0); + "roms/machines/ibmatpx/BIOS ROM - PhoenixBIOS A286 - Version 1.01 - Odd.bin", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_ibm_common_init(model); return ret; } - int machine_at_ibmxt286_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/ibmxt286/bios_5162_21apr86_u34_78x7460_27256.bin", - "roms/machines/ibmxt286/bios_5162_21apr86_u35_78x7461_27256.bin", - 0x000f0000, 65536, 0); + "roms/machines/ibmxt286/bios_5162_21apr86_u35_78x7461_27256.bin", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_ibm_common_init(model); @@ -254,17 +241,16 @@ machine_at_siemens_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/siemens/286BIOS.BIN", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_ibm_common_init(model); return ret; } - #if defined(DEV_BRANCH) && defined(USE_OPEN_AT) int machine_at_openat_init(const machine_t *model) @@ -272,10 +258,10 @@ machine_at_openat_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/openat/bios.bin", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_ibm_common_init(model); diff --git a/src/machine/m_at_286_386sx.c b/src/machine/m_at_286_386sx.c index 295c2fd82..d524e4c4a 100644 --- a/src/machine/m_at_286_386sx.c +++ b/src/machine/m_at_286_386sx.c @@ -51,34 +51,33 @@ machine_at_mr286_init(const machine_t *model) int ret; ret = bios_load_interleaved("roms/machines/mr286/V000B200-1", - "roms/machines/mr286/V000B200-2", - 0x000f0000, 65536, 0); + "roms/machines/mr286/V000B200-2", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_ide_init(model); device_add(&keyboard_at_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - static void machine_at_headland_common_init(int ht386) { device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); if (ht386) - device_add(&headland_ht18b_device); + device_add(&headland_ht18b_device); else - device_add(&headland_gc10x_device); + device_add(&headland_gc10x_device); } int @@ -87,10 +86,10 @@ machine_at_tg286m_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/tg286m/ami.bin", - 0x000f0000, 131072, 0); + 0x000f0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_ide_init(model); @@ -105,160 +104,153 @@ machine_at_ama932j_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/ama932j/ami.bin", - 0x000f0000, 131072, 0); + 0x000f0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_ide_init(model); if (gfxcard == VID_INTERNAL) - device_add(&oti067_ama932j_device); + device_add(&oti067_ama932j_device); machine_at_headland_common_init(1); return ret; } - int machine_at_quadt286_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/quadt286/QUADT89L.ROM", - "roms/machines/quadt286/QUADT89H.ROM", - 0x000f0000, 65536, 0); + "roms/machines/quadt286/QUADT89H.ROM", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); - device_add(&keyboard_at_device); + device_add(&keyboard_at_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&headland_gc10x_device); return ret; } - int machine_at_quadt386sx_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/quadt386sx/QTC-SXM-EVEN-U3-05-07.BIN", - "roms/machines/quadt386sx/QTC-SXM-ODD-U3-05-07.BIN", - 0x000f0000, 65536, 0); + "roms/machines/quadt386sx/QTC-SXM-ODD-U3-05-07.BIN", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&keyboard_at_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&headland_gc10x_device); return ret; } - int machine_at_neat_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/dtk386/3cto001.bin", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_init(model); device_add(&neat_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_neat_ami_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ami286/AMIC206.BIN", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&neat_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&keyboard_at_ami_device); return ret; } - int machine_at_px286_init(const machine_t *model) { int ret; - ret = bios_load_linear("roms/machines/px286/KENITEC.BIN", - 0x000f0000, 65536, 0); + ret = bios_load_linear("roms/machines/px286/KENITEC.BIN", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&keyboard_at_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&neat_device); return ret; } - int machine_at_micronics386_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/micronics386/386-Micronics-09-00021-EVEN.BIN", - "roms/machines/micronics386/386-Micronics-09-00021-ODD.BIN", - 0x000f0000, 65536, 0); + "roms/machines/micronics386/386-Micronics-09-00021-ODD.BIN", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_init(model); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - static void machine_at_scat_init(const machine_t *model, int is_v4) { @@ -266,12 +258,11 @@ machine_at_scat_init(const machine_t *model, int is_v4) device_add(&keyboard_at_ami_device); if (is_v4) - device_add(&scat_4_device); + device_add(&scat_4_device); else - device_add(&scat_device); + device_add(&scat_device); } - static void machine_at_scatsx_init(const machine_t *model) { @@ -280,27 +271,26 @@ machine_at_scatsx_init(const machine_t *model) device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&scat_sx_device); } - int machine_at_award286_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/award286/award.bin", - 0x000f0000, 131072, 0); + 0x000f0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_scat_init(model, 0); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } @@ -311,15 +301,15 @@ machine_at_gdc212m_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/gdc212m/gdc212m_72h.bin", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_scat_init(model, 0); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&ide_isa_device); @@ -332,10 +322,10 @@ machine_at_gw286ct_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/gw286ct/2ctc001.bin", - 0x000f0000, 131072, 0); + 0x000f0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; device_add(&f82c710_device); @@ -349,63 +339,60 @@ machine_at_gw286ct_init(const machine_t *model) return ret; } - int machine_at_super286tr_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/super286tr/hyundai_award286.bin", - 0x000f0000, 131072, 0); + 0x000f0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_scat_init(model, 0); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_spc4200p_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/spc4200p/u8.01", - 0x000f0000, 131072, 0); + 0x000f0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_scat_init(model, 0); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_spc4216p_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/spc4216p/7101.U8", - "roms/machines/spc4216p/AC64.U10", - 0x000f0000, 131072, 0); + "roms/machines/spc4216p/AC64.U10", + 0x000f0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_scat_init(model, 1); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } @@ -416,72 +403,69 @@ machine_at_spc4620p_init(const machine_t *model) int ret; ret = bios_load_interleaved("roms/machines/spc4620p/31005h.u8", - "roms/machines/spc4620p/31005h.u10", - 0x000f0000, 131072, 0x8000); + "roms/machines/spc4620p/31005h.u10", + 0x000f0000, 131072, 0x8000); if (bios_only || !ret) - return ret; + return ret; if (gfxcard == VID_INTERNAL) - device_add(&ati28800k_spc4620p_device); + device_add(&ati28800k_spc4620p_device); machine_at_scat_init(model, 1); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_kmxc02_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/kmxc02/3ctm005.bin", - 0x000f0000, 131072, 0); + 0x000f0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_scatsx_init(model); return ret; } - int machine_at_deskmaster286_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/deskmaster286/SAMSUNG-DESKMASTER-28612-ROM.BIN", - 0x000f0000, 131072, 0); + 0x000f0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_scat_init(model, 0); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_shuttle386sx_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/shuttle386sx/386-Shuttle386SX-Even.BIN", - "roms/machines/shuttle386sx/386-Shuttle386SX-Odd.BIN", - 0x000f0000, 131072, 0); + "roms/machines/shuttle386sx/386-Shuttle386SX-Odd.BIN", + 0x000f0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -489,23 +473,22 @@ machine_at_shuttle386sx_init(const machine_t *model) device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_adi386sx_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/adi386sx/3iip001l.bin", - "roms/machines/adi386sx/3iip001h.bin", - 0x000f0000, 65536, 0); + "roms/machines/adi386sx/3iip001h.bin", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -513,28 +496,27 @@ machine_at_adi386sx_init(const machine_t *model) device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_wd76c10_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/megapc/41651-bios lo.u18", - "roms/machines/megapc/211253-bios hi.u19", - 0x000f0000, 65536, 0x08000); + "roms/machines/megapc/211253-bios hi.u19", + 0x000f0000, 65536, 0x08000); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); if (gfxcard == VID_INTERNAL) - device_add(¶dise_wd90c11_megapc_device); + device_add(¶dise_wd90c11_megapc_device); device_add(&keyboard_ps2_quadtel_device); @@ -543,25 +525,24 @@ machine_at_wd76c10_init(const machine_t *model) return ret; } - int machine_at_cmdsl386sx16_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/cmdsl386sx16/cbm-sl386sx-bios-lo-v1.04-390914-04.bin", - "roms/machines/cmdsl386sx16/cbm-sl386sx-bios-hi-v1.04-390915-04.bin", - 0x000f0000, 65536, 0); + "roms/machines/cmdsl386sx16/cbm-sl386sx-bios-hi-v1.04-390915-04.bin", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_ide_init(model); device_add(&keyboard_at_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&neat_device); /* Two serial ports - on the real hardware SL386SX-16, they are on the single UMC UM82C452. */ @@ -571,127 +552,119 @@ machine_at_cmdsl386sx16_init(const machine_t *model) return ret; } - static void machine_at_scamp_common_init(const machine_t *model, int is_ps2) { machine_at_common_ide_init(model); if (is_ps2) - device_add(&keyboard_ps2_ami_device); + device_add(&keyboard_ps2_ami_device); else - device_add(&keyboard_at_ami_device); + device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&vlsi_scamp_device); } - const device_t * at_cmdsl386sx25_get_device(void) { return &gd5402_onboard_device; } - int machine_at_cmdsl386sx25_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/cmdsl386sx25/f000.rom", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; if (gfxcard == VID_INTERNAL) - device_add(&gd5402_onboard_device); + device_add(&gd5402_onboard_device); machine_at_scamp_common_init(model, 1); return ret; } - int machine_at_dataexpert386sx_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/dataexpert386sx/5e9f20e5ef967717086346.BIN", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_scamp_common_init(model, 0); return ret; } - const device_t * at_spc6033p_get_device(void) { return &ati28800k_spc6033p_device; } - int machine_at_spc6033p_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/spc6033p/phoenix.BIN", - 0x000f0000, 65536, 0x10000); + 0x000f0000, 65536, 0x10000); if (bios_only || !ret) - return ret; + return ret; if (gfxcard == VID_INTERNAL) - device_add(&ati28800k_spc6033p_device); + device_add(&ati28800k_spc6033p_device); machine_at_scamp_common_init(model, 1); return ret; } - int machine_at_awardsx_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/awardsx/Unknown 386SX OPTi291 - Award (original).BIN", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_init(model); device_add(&opti291_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_arb1374_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/arb1374/1374s.rom", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -702,17 +675,16 @@ machine_at_arb1374_init(const machine_t *model) return ret; } - int machine_at_sbc350a_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/sbc350a/350a.rom", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -723,17 +695,16 @@ machine_at_sbc350a_init(const machine_t *model) return ret; } - int machine_at_flytech386_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/flytech386/FLYTECH.BIO", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -741,31 +712,29 @@ machine_at_flytech386_init(const machine_t *model) device_add(&w83787f_ide_en_device); if (gfxcard == VID_INTERNAL) - device_add(&tvga8900d_device); + device_add(&tvga8900d_device); device_add(&keyboard_ps2_device); return ret; } - const device_t * at_flytech386_get_device(void) { return &tvga8900d_device; } - int machine_at_mr1217_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/mr1217/mrbios.BIN", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -777,17 +746,16 @@ machine_at_mr1217_init(const machine_t *model) return ret; } - int machine_at_pja511m_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/pja511m/2006915102435734.rom", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -800,17 +768,16 @@ machine_at_pja511m_init(const machine_t *model) return ret; } - int machine_at_prox1332_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/prox1332/D30B3AC1.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -822,7 +789,6 @@ machine_at_prox1332_init(const machine_t *model) return ret; } - /* * Current bugs: * - ctrl-alt-del produces an 8042 error @@ -833,22 +799,21 @@ machine_at_pc8_init(const machine_t *model) int ret; ret = bios_load_interleaved("roms/machines/pc8/ncr_35117_u127_vers.4-2.bin", - "roms/machines/pc8/ncr_35116_u113_vers.4-2.bin", - 0x000f0000, 65536, 0); + "roms/machines/pc8/ncr_35116_u113_vers.4-2.bin", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&keyboard_at_ncr_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - /* * Current bugs: * - ctrl-alt-del produces an 8042 error @@ -859,31 +824,30 @@ machine_at_3302_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/3302/f000-flex_drive_test.bin", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (ret) { - bios_load_aux_linear("roms/machines/3302/f800-setup_ncr3.5-013190.bin", - 0x000f8000, 32768, 0); + bios_load_aux_linear("roms/machines/3302/f800-setup_ncr3.5-013190.bin", + 0x000f8000, 32768, 0); } if (bios_only || !ret) - return ret; + return ret; machine_at_common_ide_init(model); device_add(&neat_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); if (gfxcard == VID_INTERNAL) - device_add(¶dise_pvga1a_ncr3302_device); + device_add(¶dise_pvga1a_ncr3302_device); device_add(&keyboard_at_ncr_device); return ret; } - /* * Current bugs: * - soft-reboot after saving CMOS settings/pressing ctrl-alt-del produces an 8042 error @@ -894,11 +858,11 @@ machine_at_pc916sx_init(const machine_t *model) int ret; ret = bios_load_interleaved("roms/machines/pc916sx/ncr_386sx_u46-17_7.3.bin", - "roms/machines/pc916sx/ncr_386sx_u12-19_7.3.bin", - 0x000f0000, 65536, 0); + "roms/machines/pc916sx/ncr_386sx_u12-19_7.3.bin", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -906,12 +870,11 @@ machine_at_pc916sx_init(const machine_t *model) mem_remap_top(384); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - #if defined(DEV_BRANCH) && defined(USE_OLIVETTI) int machine_at_m290_init(const machine_t *model) @@ -919,17 +882,17 @@ machine_at_m290_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/m290/m290_pep3_1.25.bin", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 4); device_add(&keyboard_at_olivetti_device); device_add(&port_6x_olivetti_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&olivetti_eva_device); diff --git a/src/machine/m_at_386dx_486.c b/src/machine/m_at_386dx_486.c index 7baa85ed3..1f616b791 100644 --- a/src/machine/m_at_386dx_486.c +++ b/src/machine/m_at_386dx_486.c @@ -49,51 +49,48 @@ #include <86box/hwm.h> #include <86box/machine.h> - int machine_at_acc386_init(const machine_t *model) { int ret; - ret = bios_load_linear("roms/machines/acc386/acc386.BIN", - 0x000f0000, 65536, 0); + ret = bios_load_linear("roms/machines/acc386/acc386.BIN", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&acc2168_device); device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_asus386_init(const machine_t *model) { int ret; - ret = bios_load_linear("roms/machines/asus386/ASUS_ISA-386C_BIOS.bin", - 0x000f0000, 65536, 0); + ret = bios_load_linear("roms/machines/asus386/ASUS_ISA-386C_BIOS.bin", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&rabbit_device); device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - static void machine_at_sis401_common_init(const machine_t *model) { @@ -102,86 +99,82 @@ machine_at_sis401_common_init(const machine_t *model) device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); } - int machine_at_sis401_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/sis401/SIS401-2.AMI", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_sis401_common_init(model); return ret; } - int machine_at_isa486_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/isa486/ISA-486.BIN", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_sis401_common_init(model); return ret; } - int machine_at_av4_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/av4/amibios_486dx_isa_bios_aa4025963.bin", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_ide_init(model); device_add(&sis_85c460_device); device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int -machine_at_valuepoint433_init(const machine_t *model) // hangs without the PS/2 mouse +machine_at_valuepoint433_init(const machine_t *model) // hangs without the PS/2 mouse { int ret; ret = bios_load_linear("roms/machines/valuepoint433/$IMAGEP.FLH", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_ide_init(model); device_add(&sis_85c461_device); if (gfxcard == VID_INTERNAL) - device_add(&et4000w32_onboard_device); + device_add(&et4000w32_onboard_device); device_add(&keyboard_ps2_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } @@ -192,58 +185,56 @@ machine_at_ecs386_init(const machine_t *model) int ret; ret = bios_load_interleaved("roms/machines/ecs386/AMI BIOS for ECS-386_32 motherboard - L chip.bin", - "roms/machines/ecs386/AMI BIOS for ECS-386_32 motherboard - H chip.bin", - 0x000f0000, 65536, 0); + "roms/machines/ecs386/AMI BIOS for ECS-386_32 motherboard - H chip.bin", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&cs8230_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&keyboard_at_ami_device); return ret; } - int machine_at_spc6000a_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/spc6000a/3c80.u27", - "roms/machines/spc6000a/9f80.u26", - 0x000f8000, 32768, 0); + "roms/machines/spc6000a/9f80.u26", + 0x000f8000, 32768, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 1); device_add(&cs8230_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&keyboard_at_samsung_device); return ret; } - int machine_at_rycleopardlx_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/rycleopardlx/486-RYC-Leopard-LX.BIN", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -251,22 +242,21 @@ machine_at_rycleopardlx_init(const machine_t *model) device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_486vchd_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/486vchd/486-4386-VC-HD.BIN", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -274,44 +264,42 @@ machine_at_486vchd_init(const machine_t *model) device_add(&keyboard_at_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_cs4031_init(const machine_t *model) { int ret; - ret = bios_load_linear("roms/machines/cs4031/CHIPS_1.AMI", - 0x000f0000, 65536, 0); + ret = bios_load_linear("roms/machines/cs4031/CHIPS_1.AMI", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&cs4031_device); device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_pb410a_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/pb410a/pb410a.080337.4abf.u25.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_ibm_common_ide_init(model); @@ -323,29 +311,28 @@ machine_at_pb410a_init(const machine_t *model) device_add(&phoenix_486_jumper_device); if (gfxcard == VID_INTERNAL) - device_add(&ht216_32_pb410a_device); + device_add(&ht216_32_pb410a_device); return ret; } - int -machine_at_vect486vl_init(const machine_t *model) // has HDC problems +machine_at_vect486vl_init(const machine_t *model) // has HDC problems { int ret; - ret = bios_load_linear("roms/machines/vect486vl/aa0500.ami", - 0x000e0000, 131072, 0); + ret = bios_load_linear("roms/machines/vect486vl/aa0500.ami", + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_ide_init(model); device_add(&vl82c480_device); if (gfxcard == VID_INTERNAL) - device_add(&gd5428_onboard_device); + device_add(&gd5428_onboard_device); device_add(&keyboard_ps2_ami_device); device_add(&fdc37c651_ide_device); @@ -358,18 +345,18 @@ machine_at_d824_init(const machine_t *model) { int ret; - ret = bios_load_linear("roms/machines/d824/fts-biosupdated824noflashbiosepromv320-320334-160.bin", - 0x000e0000, 131072, 0); + ret = bios_load_linear("roms/machines/d824/fts-biosupdated824noflashbiosepromv320-320334-160.bin", + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&vl82c480_device); if (gfxcard == VID_INTERNAL) - device_add(&gd5428_onboard_device); + device_add(&gd5428_onboard_device); device_add(&keyboard_ps2_device); device_add(&fdc37c651_device); @@ -382,23 +369,23 @@ machine_at_acera1g_init(const machine_t *model) { int ret; - ret = bios_load_linear("roms/machines/acera1g/4alo001.bin", - 0x000e0000, 131072, 0); + ret = bios_load_linear("roms/machines/acera1g/4alo001.bin", + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&ali1429g_device); if (gfxcard == VID_INTERNAL) - device_add(&gd5428_onboard_device); + device_add(&gd5428_onboard_device); device_add(&keyboard_ps2_acer_pci_device); device_add(&ide_isa_2ch_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } @@ -408,11 +395,11 @@ machine_at_acerv10_init(const machine_t *model) { int ret; - ret = bios_load_linear("roms/machines/acerv10/ALL.BIN", - 0x000e0000, 131072, 0); + ret = bios_load_linear("roms/machines/acerv10/ALL.BIN", + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -421,29 +408,28 @@ machine_at_acerv10_init(const machine_t *model) device_add(&ide_isa_2ch_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_decpclpv_init(const machine_t *model) { int ret; - ret = bios_load_linear("roms/machines/decpclpv/bios.bin", - 0x000e0000, 131072, 0); + ret = bios_load_linear("roms/machines/decpclpv/bios.bin", + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&sis_85c461_device); if (gfxcard == VID_INTERNAL) - device_add(&s3_86c805_onboard_vlb_device); + device_add(&s3_86c805_onboard_vlb_device); /* TODO: Phoenix MultiKey KBC */ device_add(&keyboard_ps2_ami_pci_device); @@ -459,61 +445,58 @@ machine_at_ali1429_common_init(const machine_t *model, int is_green) machine_at_common_ide_init(model); if (is_green) - device_add(&ali1429g_device); + device_add(&ali1429g_device); else - device_add(&ali1429_device); + device_add(&ali1429_device); device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); } - int machine_at_ali1429_init(const machine_t *model) { int ret; - ret = bios_load_linear("roms/machines/ali1429/ami486.BIN", - 0x000f0000, 65536, 0); + ret = bios_load_linear("roms/machines/ali1429/ami486.BIN", + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_ali1429_common_init(model, 0); return ret; } - int machine_at_winbios1429_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/win486/ali1429g.amw", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_ali1429_common_init(model, 1); return ret; } - int machine_at_opti495_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/award495/opt495s.awa", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_ide_init(model); @@ -522,12 +505,11 @@ machine_at_opti495_init(const machine_t *model) device_add(&keyboard_at_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - static void machine_at_opti495_ami_common_init(const machine_t *model) { @@ -538,123 +520,116 @@ machine_at_opti495_ami_common_init(const machine_t *model) device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); } - int machine_at_opti495_ami_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ami495/opt495sx.ami", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_opti495_ami_common_init(model); return ret; } - int machine_at_opti495_mr_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/mr495/opt495sx.mr", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_opti495_ami_common_init(model); return ret; } - static void machine_at_403tg_common_init(const machine_t *model, int nvr_hack) { if (nvr_hack) { - machine_at_common_init_ex(model, 2); - device_add(&ami_1994_nvr_device); + machine_at_common_init_ex(model, 2); + device_add(&ami_1994_nvr_device); } else - machine_at_common_init(model); + machine_at_common_init(model); device_add(&opti895_device); device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); } - int machine_at_403tg_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/403tg/403TG.BIN", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_403tg_common_init(model, 0); return ret; } - int machine_at_403tg_d_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/403tg_d/J403TGRevD.BIN", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_403tg_common_init(model, 1); return ret; } - int machine_at_403tg_d_mr_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/403tg_d/MRBiosOPT895.bin", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_403tg_common_init(model, 0); return ret; } - int -machine_at_pc330_6573_init(const machine_t *model) /* doesn't like every CPU other than the iDX4 and the Intel OverDrive, hangs without a PS/2 mouse */ +machine_at_pc330_6573_init(const machine_t *model) /* doesn't like every CPU other than the iDX4 and the Intel OverDrive, hangs without a PS/2 mouse */ { int ret; ret = bios_load_linear("roms/machines/pc330_6573/$IMAGES.USF", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); @@ -672,17 +647,16 @@ machine_at_pc330_6573_init(const machine_t *model) /* doesn't like every CPU oth return ret; } - int machine_at_mvi486_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/mvi486/MVI627.BIN", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -699,22 +673,21 @@ machine_at_sis_85c471_common_init(const machine_t *model) machine_at_common_init(model); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&sis_85c471_device); } - int machine_at_ami471_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ami471/SIS471BE.AMI", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_sis_85c471_common_init(model); device_add(&ide_vlb_device); @@ -723,17 +696,16 @@ machine_at_ami471_init(const machine_t *model) return ret; } - int machine_at_vli486sv2g_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/vli486sv2g/0402.001", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_sis_85c471_common_init(model); device_add(&ide_vlb_2ch_device); @@ -742,17 +714,16 @@ machine_at_vli486sv2g_init(const machine_t *model) return ret; } - int machine_at_dtk486_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/dtk486/4siw005.bin", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_sis_85c471_common_init(model); device_add(&ide_vlb_device); @@ -761,17 +732,16 @@ machine_at_dtk486_init(const machine_t *model) return ret; } - int machine_at_px471_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/px471/SIS471A1.PHO", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_sis_85c471_common_init(model); device_add(&ide_vlb_device); @@ -780,17 +750,16 @@ machine_at_px471_init(const machine_t *model) return ret; } - int machine_at_win471_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/win471/486-SiS_AC0360136.BIN", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_sis_85c471_common_init(model); device_add(&ide_vlb_device); @@ -799,17 +768,16 @@ machine_at_win471_init(const machine_t *model) return ret; } - int machine_at_vi15g_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/vi15g/vi15gr23.rom", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_sis_85c471_common_init(model); device_add(&ide_vlb_device); @@ -818,22 +786,21 @@ machine_at_vi15g_init(const machine_t *model) return ret; } - int machine_at_greenb_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/greenb/4gpv31-ami-1993-8273517.bin", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&contaq_82c597_device); @@ -842,7 +809,6 @@ machine_at_greenb_init(const machine_t *model) return ret; } - static void machine_at_sis_85c496_common_init(const machine_t *model) { @@ -857,17 +823,16 @@ machine_at_sis_85c496_common_init(const machine_t *model) pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED); } - int machine_at_r418_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/r418/r418i.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -884,17 +849,16 @@ machine_at_r418_init(const machine_t *model) return ret; } - int machine_at_m4li_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/m4li/M4LI.04S", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -911,17 +875,16 @@ machine_at_m4li_init(const machine_t *model) return ret; } - int machine_at_ls486e_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ls486e/LS486E RevC.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -938,17 +901,16 @@ machine_at_ls486e_init(const machine_t *model) return ret; } - int machine_at_4dps_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/4dps/4DPS172G.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -967,17 +929,16 @@ machine_at_4dps_init(const machine_t *model) return ret; } - int machine_at_486sp3c_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/486sp3c/SI4I0306.AWD", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -995,17 +956,16 @@ machine_at_486sp3c_init(const machine_t *model) return ret; } - int machine_at_4saw2_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/4saw2/4saw0911.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -1024,17 +984,16 @@ machine_at_4saw2_init(const machine_t *model) return ret; } - int machine_at_alfredo_init(const machine_t *model) { int ret; ret = bios_load_linear_combined("roms/machines/alfredo/1010AQ0_.BIO", - "roms/machines/alfredo/1010AQ0_.BI1", 0x1c000, 128); + "roms/machines/alfredo/1010AQ0_.BI1", 0x1c000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&ide_pci_2ch_device); @@ -1056,17 +1015,16 @@ machine_at_alfredo_init(const machine_t *model) return ret; } - int machine_at_ninja_init(const machine_t *model) { int ret; ret = bios_load_linear_combined("roms/machines/ninja/1008AY0_.BIO", - "roms/machines/ninja/1008AY0_.BI1", 0x1c000, 128); + "roms/machines/ninja/1008AY0_.BI1", 0x1c000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1084,17 +1042,16 @@ machine_at_ninja_init(const machine_t *model) return ret; } - int machine_at_486sp3_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/486sp3/awsi2737.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&ide_isa_device); @@ -1118,17 +1075,16 @@ machine_at_486sp3_init(const machine_t *model) return ret; } - int machine_at_pci400cb_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/pci400cb/032295.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); device_add(&ami_1994_nvr_device); @@ -1146,22 +1102,21 @@ machine_at_pci400cb_init(const machine_t *model) device_add(&ims8848_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_g486ip_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/g486ip/G486IP.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); device_add(&ami_1992_nvr_device); @@ -1177,22 +1132,21 @@ machine_at_g486ip_init(const machine_t *model) device_add(&ims8848_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_486sp3g_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/486sp3g/PCI-I-486SP3G_0306.001 (Beta).bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&ide_isa_device); @@ -1215,17 +1169,16 @@ machine_at_486sp3g_init(const machine_t *model) return ret; } - int machine_at_486ap4_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/486ap4/0205.002", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1239,24 +1192,23 @@ machine_at_486ap4_init(const machine_t *model) device_add(&keyboard_ps2_ami_pci_device); /* Uses the AMIKEY KBC */ if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&i420ex_device); return ret; } - int machine_at_g486vpa_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/g486vpa/3.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1276,17 +1228,16 @@ machine_at_g486vpa_init(const machine_t *model) return ret; } - int machine_at_486vipio2_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/486vipio2/1175G701.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1306,17 +1257,16 @@ machine_at_486vipio2_init(const machine_t *model) return ret; } - int machine_at_abpb4_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/abpb4/486-AB-PB4.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1335,17 +1285,16 @@ machine_at_abpb4_init(const machine_t *model) return ret; } - int machine_at_win486pci_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/win486pci/v1hj3.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1362,17 +1311,16 @@ machine_at_win486pci_init(const machine_t *model) return ret; } - int machine_at_ms4145_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ms4145/AG56S.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1391,17 +1339,16 @@ machine_at_ms4145_init(const machine_t *model) return ret; } - int machine_at_sbc490_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/sbc490/07159589.rom", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1417,7 +1364,7 @@ machine_at_sbc490_init(const machine_t *model) device_add(&fdc37c665_device); if (gfxcard == VID_INTERNAL) - device_add(&tgui9440_onboard_pci_device); + device_add(&tgui9440_onboard_pci_device); device_add(&keyboard_ps2_ami_device); device_add(&sst_flash_29ee010_device); @@ -1431,10 +1378,10 @@ machine_at_tf486_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/tf486/tf486v10.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1450,17 +1397,16 @@ machine_at_tf486_init(const machine_t *model) return ret; } - int machine_at_itoxstar_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/itoxstar/STARA.ROM", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1472,25 +1418,24 @@ machine_at_itoxstar_init(const machine_t *model) device_add(&keyboard_ps2_ami_pci_device); device_add(&stpc_client_device); device_add(&sst_flash_29ee020_device); - device_add(&w83781d_device); /* fans: Chassis, CPU, unused; temperatures: Chassis, CPU, unused */ - hwm_values.fans[2] = 0; /* unused */ + device_add(&w83781d_device); /* fans: Chassis, CPU, unused; temperatures: Chassis, CPU, unused */ + hwm_values.fans[2] = 0; /* unused */ hwm_values.temperatures[2] = 0; /* unused */ - hwm_values.voltages[0] = 0; /* Vcore unused */ + hwm_values.voltages[0] = 0; /* Vcore unused */ return ret; } - int machine_at_arb1423c_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/arb1423c/A1423C.v12", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1508,17 +1453,16 @@ machine_at_arb1423c_init(const machine_t *model) return ret; } - int machine_at_arb1479_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/arb1479/1479A.rom", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1536,17 +1480,16 @@ machine_at_arb1479_init(const machine_t *model) return ret; } - int machine_at_pcm9340_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/pcm9340/9340v110.bin", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1565,17 +1508,16 @@ machine_at_pcm9340_init(const machine_t *model) return ret; } - int machine_at_pcm5330_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/pcm5330/5330_13b.bin", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1594,17 +1536,16 @@ machine_at_pcm5330_init(const machine_t *model) return ret; } - int machine_at_ecs486_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ecs486/8810AIO.32J", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1626,17 +1567,16 @@ machine_at_ecs486_init(const machine_t *model) return ret; } - int machine_at_hot433_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/hot433/433AUS33.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1659,17 +1599,16 @@ machine_at_hot433_init(const machine_t *model) return ret; } - int machine_at_atc1415_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/atc1415/1415V330.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1686,22 +1625,21 @@ machine_at_atc1415_init(const machine_t *model) device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_actionpc2600_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/actionpc2600/action2600.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1722,17 +1660,16 @@ machine_at_actionpc2600_init(const machine_t *model) return ret; } - int machine_at_m919_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/m919/9190914s.rom", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -1752,17 +1689,16 @@ machine_at_m919_init(const machine_t *model) return ret; } - int machine_at_spc7700plw_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/spc7700plw/77LW13FH.P24", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); diff --git a/src/machine/m_at_commodore.c b/src/machine/m_at_commodore.c index f9afdd1ef..a40fa2797 100644 --- a/src/machine/m_at_commodore.c +++ b/src/machine/m_at_commodore.c @@ -35,7 +35,7 @@ * 59 Temple Place - Suite 330 * Boston, MA 02111-1307 * USA. -*/ + */ #include #include #include @@ -53,10 +53,8 @@ #include <86box/fdc.h> #include <86box/machine.h> - static serial_t *cmd_uart; - static void cbm_io_write(uint16_t port, uint8_t val, void *p) { @@ -64,53 +62,51 @@ cbm_io_write(uint16_t port, uint8_t val, void *p) lpt2_remove(); switch (val & 3) { - case 1: - lpt1_init(LPT_MDA_ADDR); - break; - case 2: - lpt1_init(LPT1_ADDR); - break; - case 3: - lpt1_init(LPT2_ADDR); - break; + case 1: + lpt1_init(LPT_MDA_ADDR); + break; + case 2: + lpt1_init(LPT1_ADDR); + break; + case 3: + lpt1_init(LPT2_ADDR); + break; } switch (val & 0xc) { - case 0x4: - serial_setup(cmd_uart, COM2_ADDR, COM2_IRQ); - break; - case 0x8: - serial_setup(cmd_uart, COM1_ADDR, COM1_IRQ); - break; + case 0x4: + serial_setup(cmd_uart, COM2_ADDR, COM2_IRQ); + break; + case 0x8: + serial_setup(cmd_uart, COM1_ADDR, COM1_IRQ); + break; } } - static void cbm_io_init() { - io_sethandler(0x0230, 0x0001, NULL,NULL,NULL, cbm_io_write,NULL,NULL, NULL); + io_sethandler(0x0230, 0x0001, NULL, NULL, NULL, cbm_io_write, NULL, NULL, NULL); } - int machine_at_cmdpc_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/cmdpc30/commodore pc 30 iii even.bin", - "roms/machines/cmdpc30/commodore pc 30 iii odd.bin", - 0x000f8000, 32768, 0); + "roms/machines/cmdpc30/commodore pc 30 iii odd.bin", + 0x000f8000, 32768, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_init(model); mem_remap_top(384); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); cmd_uart = device_add(&ns8250_device); diff --git a/src/machine/m_at_compaq.c b/src/machine/m_at_compaq.c index 686032493..2b22002dc 100644 --- a/src/machine/m_at_compaq.c +++ b/src/machine/m_at_compaq.c @@ -41,29 +41,26 @@ #include <86box/vid_cga.h> #include <86box/vid_cga_comp.h> - -enum -{ +enum { COMPAQ_PORTABLEII = 0, COMPAQ_PORTABLEIII, COMPAQ_PORTABLEIII386, COMPAQ_DESKPRO386 }; -#define CGA_RGB 0 +#define CGA_RGB 0 #define CGA_COMPOSITE 1 #define COMPOSITE_OLD 0 #define COMPOSITE_NEW 1 /*Very rough estimate*/ -#define VID_CLOCK (double)(651 * 416 * 60) - +#define VID_CLOCK (double) (651 * 416 * 60) /* Mapping of attributes to colours */ -static uint32_t amber, black; -static uint32_t blinkcols[256][2]; -static uint32_t normcols[256][2]; +static uint32_t amber, black; +static uint32_t blinkcols[256][2]; +static uint32_t normcols[256][2]; /* Video options set by the motherboard; they will be picked up by the card * on the next poll. @@ -77,225 +74,207 @@ static int8_t cpq_st_display_internal = -1; static void compaq_plasma_display_set(uint8_t internal) { - cpq_st_display_internal = internal; + cpq_st_display_internal = internal; } static uint8_t compaq_plasma_display_get(void) { - return cpq_st_display_internal; + return cpq_st_display_internal; } - -typedef struct compaq_plasma_t -{ - mem_mapping_t plasma_mapping; - cga_t cga; - uint8_t port_23c6; - uint8_t internal_monitor; - uint8_t attrmap; /* Attribute mapping register */ - int linepos, displine; - uint8_t *vram; - uint64_t dispontime, dispofftime; - int dispon, fullchange; +typedef struct compaq_plasma_t { + mem_mapping_t plasma_mapping; + cga_t cga; + uint8_t port_23c6; + uint8_t internal_monitor; + uint8_t attrmap; /* Attribute mapping register */ + int linepos, displine; + uint8_t *vram; + uint64_t dispontime, dispofftime; + int dispon, fullchange; } compaq_plasma_t; -static uint8_t cga_crtcmask[32] = -{ - 0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f, 0xf3, 0x1f, 0x7f, 0x1f, 0x3f, 0xff, 0x3f, 0xff, - 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +static uint8_t cga_crtcmask[32] = { + 0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f, 0xf3, 0x1f, 0x7f, 0x1f, 0x3f, 0xff, 0x3f, 0xff, + 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; - /* Compaq Deskpro 386 remaps RAM from 0xA0000-0xFFFFF to 0xFA0000-0xFFFFFF */ -static mem_mapping_t ram_mapping; +static mem_mapping_t ram_mapping; static void compaq_plasma_recalcattrs(compaq_plasma_t *self); static void compaq_plasma_recalctimings(compaq_plasma_t *self) { - double _dispontime, _dispofftime, disptime; + double _dispontime, _dispofftime, disptime; - if (!self->internal_monitor && !(self->port_23c6 & 1)) { - cga_recalctimings(&self->cga); - return; - } + if (!self->internal_monitor && !(self->port_23c6 & 1)) { + cga_recalctimings(&self->cga); + return; + } - disptime = 651; - _dispontime = 640; - _dispofftime = disptime - _dispontime; - self->dispontime = (uint64_t)(_dispontime * (cpuclock / VID_CLOCK) * (double)(1ull << 32)); - self->dispofftime = (uint64_t)(_dispofftime * (cpuclock / VID_CLOCK) * (double)(1ull << 32)); + disptime = 651; + _dispontime = 640; + _dispofftime = disptime - _dispontime; + self->dispontime = (uint64_t) (_dispontime * (cpuclock / VID_CLOCK) * (double) (1ull << 32)); + self->dispofftime = (uint64_t) (_dispofftime * (cpuclock / VID_CLOCK) * (double) (1ull << 32)); } static void compaq_plasma_write(uint32_t addr, uint8_t val, void *priv) { - compaq_plasma_t *self = (compaq_plasma_t *)priv; + compaq_plasma_t *self = (compaq_plasma_t *) priv; - self->vram[addr & 0x7fff] = val; + self->vram[addr & 0x7fff] = val; } - static uint8_t compaq_plasma_read(uint32_t addr, void *priv) { - compaq_plasma_t *self = (compaq_plasma_t *)priv; - uint8_t ret; + compaq_plasma_t *self = (compaq_plasma_t *) priv; + uint8_t ret; - ret = (self->vram[addr & 0x7fff]); + ret = (self->vram[addr & 0x7fff]); - return ret; + return ret; } /* Draw a row of text in 80-column mode */ static void compaq_plasma_text80(compaq_plasma_t *self) { - uint32_t cols[2]; - int x, c; - uint8_t chr, attr; - int drawcursor; - int cursorline; - int blink; - uint16_t addr; - uint8_t sc; - uint16_t ma = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x7fff; - uint16_t ca = (self->cga.crtc[15] | (self->cga.crtc[14] << 8)) & 0x7fff; + uint32_t cols[2]; + int x, c; + uint8_t chr, attr; + int drawcursor; + int cursorline; + int blink; + uint16_t addr; + uint8_t sc; + uint16_t ma = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x7fff; + uint16_t ca = (self->cga.crtc[15] | (self->cga.crtc[14] << 8)) & 0x7fff; - sc = (self->displine) & 15; - addr = ((ma & ~1) + (self->displine >> 4) * 80) * 2; - ma += (self->displine >> 4) * 80; + sc = (self->displine) & 15; + addr = ((ma & ~1) + (self->displine >> 4) * 80) * 2; + ma += (self->displine >> 4) * 80; - if ((self->cga.crtc[10] & 0x60) == 0x20) - cursorline = 0; - else - cursorline = ((self->cga.crtc[10] & 0x0F)*2 <= sc) && - ((self->cga.crtc[11] & 0x0F)*2 >= sc); + if ((self->cga.crtc[10] & 0x60) == 0x20) + cursorline = 0; + else + cursorline = ((self->cga.crtc[10] & 0x0F) * 2 <= sc) && ((self->cga.crtc[11] & 0x0F) * 2 >= sc); - for (x = 0; x < 80; x++) { - chr = self->vram[(addr + 2 * x) & 0x7FFF]; - attr = self->vram[(addr + 2 * x + 1) & 0x7FFF]; - drawcursor = ((ma == ca) && cursorline && - (self->cga.cgamode & 8) && (self->cga.cgablink & 16)); + for (x = 0; x < 80; x++) { + chr = self->vram[(addr + 2 * x) & 0x7FFF]; + attr = self->vram[(addr + 2 * x + 1) & 0x7FFF]; + drawcursor = ((ma == ca) && cursorline && (self->cga.cgamode & 8) && (self->cga.cgablink & 16)); - blink = ((self->cga.cgablink & 16) && (self->cga.cgamode & 0x20) && - (attr & 0x80) && !drawcursor); + blink = ((self->cga.cgablink & 16) && (self->cga.cgamode & 0x20) && (attr & 0x80) && !drawcursor); - if (self->cga.cgamode & 0x20) { /* Blink */ - cols[1] = blinkcols[attr][1]; - cols[0] = blinkcols[attr][0]; - if (blink) - cols[1] = cols[0]; - } else { - cols[1] = normcols[attr][1]; - cols[0] = normcols[attr][0]; - } - if (drawcursor) { - for (c = 0; c < 8; c++) - ((uint32_t *)buffer32->line[self->displine])[(x << 3) + c] = cols[(fontdatm[chr][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (amber ^ black); - } else { - for (c = 0; c < 8; c++) - ((uint32_t *)buffer32->line[self->displine])[(x << 3) + c] = cols[(fontdatm[chr][sc] & (1 << (c ^ 7))) ? 1 : 0]; - } - ++ma; - } + if (self->cga.cgamode & 0x20) { /* Blink */ + cols[1] = blinkcols[attr][1]; + cols[0] = blinkcols[attr][0]; + if (blink) + cols[1] = cols[0]; + } else { + cols[1] = normcols[attr][1]; + cols[0] = normcols[attr][0]; + } + if (drawcursor) { + for (c = 0; c < 8; c++) + ((uint32_t *) buffer32->line[self->displine])[(x << 3) + c] = cols[(fontdatm[chr][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (amber ^ black); + } else { + for (c = 0; c < 8; c++) + ((uint32_t *) buffer32->line[self->displine])[(x << 3) + c] = cols[(fontdatm[chr][sc] & (1 << (c ^ 7))) ? 1 : 0]; + } + ++ma; + } } /* Draw a row of text in 40-column mode */ static void compaq_plasma_text40(compaq_plasma_t *self) { - uint32_t cols[2]; - int x, c; - uint8_t chr, attr; - int drawcursor; - int cursorline; - int blink; - uint16_t addr; - uint8_t sc; - uint16_t ma = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x7fff; - uint16_t ca = (self->cga.crtc[15] | (self->cga.crtc[14] << 8)) & 0x7fff; + uint32_t cols[2]; + int x, c; + uint8_t chr, attr; + int drawcursor; + int cursorline; + int blink; + uint16_t addr; + uint8_t sc; + uint16_t ma = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x7fff; + uint16_t ca = (self->cga.crtc[15] | (self->cga.crtc[14] << 8)) & 0x7fff; - sc = (self->displine) & 15; - addr = ((ma & ~1) + (self->displine >> 4) * 40) * 2; - ma += (self->displine >> 4) * 40; + sc = (self->displine) & 15; + addr = ((ma & ~1) + (self->displine >> 4) * 40) * 2; + ma += (self->displine >> 4) * 40; - if ((self->cga.crtc[10] & 0x60) == 0x20) - cursorline = 0; - else - cursorline = ((self->cga.crtc[10] & 0x0F)*2 <= sc) && - ((self->cga.crtc[11] & 0x0F)*2 >= sc); + if ((self->cga.crtc[10] & 0x60) == 0x20) + cursorline = 0; + else + cursorline = ((self->cga.crtc[10] & 0x0F) * 2 <= sc) && ((self->cga.crtc[11] & 0x0F) * 2 >= sc); - for (x = 0; x < 40; x++) { - chr = self->vram[(addr + 2 * x) & 0x7FFF]; - attr = self->vram[(addr + 2 * x + 1) & 0x7FFF]; - drawcursor = ((ma == ca) && cursorline && - (self->cga.cgamode & 8) && (self->cga.cgablink & 16)); + for (x = 0; x < 40; x++) { + chr = self->vram[(addr + 2 * x) & 0x7FFF]; + attr = self->vram[(addr + 2 * x + 1) & 0x7FFF]; + drawcursor = ((ma == ca) && cursorline && (self->cga.cgamode & 8) && (self->cga.cgablink & 16)); - blink = ((self->cga.cgablink & 16) && (self->cga.cgamode & 0x20) && - (attr & 0x80) && !drawcursor); + blink = ((self->cga.cgablink & 16) && (self->cga.cgamode & 0x20) && (attr & 0x80) && !drawcursor); - if (self->cga.cgamode & 0x20) { /* Blink */ - cols[1] = blinkcols[attr][1]; - cols[0] = blinkcols[attr][0]; - if (blink) - cols[1] = cols[0]; - } else { - cols[1] = normcols[attr][1]; - cols[0] = normcols[attr][0]; - } - if (drawcursor) { - for (c = 0; c < 8; c++) { - ((uint32_t *)buffer32->line[self->displine])[(x << 4) + c*2] = - ((uint32_t *)buffer32->line[self->displine])[(x << 4) + c*2 + 1] = cols[(fontdatm[chr][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (amber ^ black); - } - } else { - for (c = 0; c < 8; c++) { - ((uint32_t *)buffer32->line[self->displine])[(x << 4) + c*2] = - ((uint32_t *)buffer32->line[self->displine])[(x << 4) + c*2+1] = cols[(fontdatm[chr][sc] & (1 << (c ^ 7))) ? 1 : 0]; - } - } - ++ma; - } + if (self->cga.cgamode & 0x20) { /* Blink */ + cols[1] = blinkcols[attr][1]; + cols[0] = blinkcols[attr][0]; + if (blink) + cols[1] = cols[0]; + } else { + cols[1] = normcols[attr][1]; + cols[0] = normcols[attr][0]; + } + if (drawcursor) { + for (c = 0; c < 8; c++) { + ((uint32_t *) buffer32->line[self->displine])[(x << 4) + c * 2] = ((uint32_t *) buffer32->line[self->displine])[(x << 4) + c * 2 + 1] = cols[(fontdatm[chr][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (amber ^ black); + } + } else { + for (c = 0; c < 8; c++) { + ((uint32_t *) buffer32->line[self->displine])[(x << 4) + c * 2] = ((uint32_t *) buffer32->line[self->displine])[(x << 4) + c * 2 + 1] = cols[(fontdatm[chr][sc] & (1 << (c ^ 7))) ? 1 : 0]; + } + } + ++ma; + } } - /* Draw a line in CGA 640x200 or Compaq Plasma 640x400 mode */ static void compaq_plasma_cgaline6(compaq_plasma_t *self) { - int x, c; - uint8_t dat; - uint32_t ink = 0; - uint16_t addr; - uint32_t fg = (self->cga.cgacol & 0x0F) ? amber : black; - uint32_t bg = black; + int x, c; + uint8_t dat; + uint32_t ink = 0; + uint16_t addr; + uint32_t fg = (self->cga.cgacol & 0x0F) ? amber : black; + uint32_t bg = black; - uint16_t ma = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x7fff; + uint16_t ma = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x7fff; - if ((self->cga.crtc[9] == 3) || (self->port_23c6 & 1)) /* 640*400 */ { - addr = ((self->displine) & 1) * 0x2000 + - ((self->displine >> 1) & 1) * 0x4000 + - (self->displine >> 2) * 80 + - ((ma & ~1) << 1); - } else { - addr = ((self->displine >> 1) & 1) * 0x2000 + - (self->displine >> 2) * 80 + - ((ma & ~1) << 1); - } - for (x = 0; x < 80; x++) { - dat = self->vram[(addr & 0x7FFF)]; - addr++; + if ((self->cga.crtc[9] == 3) || (self->port_23c6 & 1)) /* 640*400 */ { + addr = ((self->displine) & 1) * 0x2000 + ((self->displine >> 1) & 1) * 0x4000 + (self->displine >> 2) * 80 + ((ma & ~1) << 1); + } else { + addr = ((self->displine >> 1) & 1) * 0x2000 + (self->displine >> 2) * 80 + ((ma & ~1) << 1); + } + for (x = 0; x < 80; x++) { + dat = self->vram[(addr & 0x7FFF)]; + addr++; - for (c = 0; c < 8; c++) { - ink = (dat & 0x80) ? fg : bg; - if (!(self->cga.cgamode & 8)) ink = black; - ((uint32_t *)buffer32->line[self->displine])[x*8+c] = ink; - dat <<= 1; - } - } + for (c = 0; c < 8; c++) { + ink = (dat & 0x80) ? fg : bg; + if (!(self->cga.cgamode & 8)) + ink = black; + ((uint32_t *) buffer32->line[self->displine])[x * 8 + c] = ink; + dat <<= 1; + } + } } /* Draw a line in CGA 320x200 mode. Here the CGA colours are converted to @@ -303,374 +282,380 @@ compaq_plasma_cgaline6(compaq_plasma_t *self) static void compaq_plasma_cgaline4(compaq_plasma_t *self) { - int x, c; - uint8_t dat, pattern; - uint32_t ink0 = 0, ink1 = 0; - uint16_t addr; + int x, c; + uint8_t dat, pattern; + uint32_t ink0 = 0, ink1 = 0; + uint16_t addr; - uint16_t ma = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x7fff; + uint16_t ma = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x7fff; - /* 320*200 */ - addr = ((self->displine >> 1) & 1) * 0x2000 + - (self->displine >> 2) * 80 + - ((ma & ~1) << 1); + /* 320*200 */ + addr = ((self->displine >> 1) & 1) * 0x2000 + (self->displine >> 2) * 80 + ((ma & ~1) << 1); - for (x = 0; x < 80; x++) { - dat = self->vram[(addr & 0x7FFF)]; - addr++; + for (x = 0; x < 80; x++) { + dat = self->vram[(addr & 0x7FFF)]; + addr++; - for (c = 0; c < 4; c++) { - pattern = (dat & 0xC0) >> 6; - if (!(self->cga.cgamode & 8)) - pattern = 0; + for (c = 0; c < 4; c++) { + pattern = (dat & 0xC0) >> 6; + if (!(self->cga.cgamode & 8)) + pattern = 0; - switch (pattern & 3) { - case 0: ink0 = ink1 = black; break; - case 1: if (self->displine & 1) { - ink0 = black; ink1 = black; - } else { - ink0 = amber; ink1 = black; - } - break; - case 2: if (self->displine & 1) { - ink0 = black; ink1 = amber; - } else { - ink0 = amber; ink1 = black; - } - break; - case 3: ink0 = ink1 = amber; break; - - } - ((uint32_t *)buffer32->line[self->displine])[x*8+2*c] = ink0; - ((uint32_t *)buffer32->line[self->displine])[x*8+2*c+1] = ink1; - dat <<= 2; - } - } + switch (pattern & 3) { + case 0: + ink0 = ink1 = black; + break; + case 1: + if (self->displine & 1) { + ink0 = black; + ink1 = black; + } else { + ink0 = amber; + ink1 = black; + } + break; + case 2: + if (self->displine & 1) { + ink0 = black; + ink1 = amber; + } else { + ink0 = amber; + ink1 = black; + } + break; + case 3: + ink0 = ink1 = amber; + break; + } + ((uint32_t *) buffer32->line[self->displine])[x * 8 + 2 * c] = ink0; + ((uint32_t *) buffer32->line[self->displine])[x * 8 + 2 * c + 1] = ink1; + dat <<= 2; + } + } } static void compaq_plasma_out(uint16_t addr, uint8_t val, void *priv) { - compaq_plasma_t *self = (compaq_plasma_t *)priv; - uint8_t old; + compaq_plasma_t *self = (compaq_plasma_t *) priv; + uint8_t old; - switch (addr) { - /* Emulated CRTC, register select */ - case 0x3d4: - self->cga.crtcreg = val & 31; - break; + switch (addr) { + /* Emulated CRTC, register select */ + case 0x3d4: + self->cga.crtcreg = val & 31; + break; - /* Emulated CRTC, value */ - case 0x3d5: - old = self->cga.crtc[self->cga.crtcreg]; - self->cga.crtc[self->cga.crtcreg] = val & cga_crtcmask[self->cga.crtcreg]; + /* Emulated CRTC, value */ + case 0x3d5: + old = self->cga.crtc[self->cga.crtcreg]; + self->cga.crtc[self->cga.crtcreg] = val & cga_crtcmask[self->cga.crtcreg]; - /* Register 0x12 controls the attribute mappings for the - * plasma screen. */ - if (self->cga.crtcreg == 0x12) { - self->attrmap = val; - compaq_plasma_recalcattrs(self); - break; - } + /* Register 0x12 controls the attribute mappings for the + * plasma screen. */ + if (self->cga.crtcreg == 0x12) { + self->attrmap = val; + compaq_plasma_recalcattrs(self); + break; + } - if (old != val) { - if (self->cga.crtcreg < 0xe || self->cga.crtcreg > 0x10) { - self->fullchange = changeframecount; - compaq_plasma_recalctimings(self); - } - } - break; + if (old != val) { + if (self->cga.crtcreg < 0xe || self->cga.crtcreg > 0x10) { + self->fullchange = changeframecount; + compaq_plasma_recalctimings(self); + } + } + break; - case 0x3d8: - self->cga.cgamode = val; - break; + case 0x3d8: + self->cga.cgamode = val; + break; - case 0x3d9: - self->cga.cgacol = val; - break; + case 0x3d9: + self->cga.cgacol = val; + break; - case 0x13c6: - if (val & 8) - compaq_plasma_display_set(1); - else - compaq_plasma_display_set(0); - break; + case 0x13c6: + if (val & 8) + compaq_plasma_display_set(1); + else + compaq_plasma_display_set(0); + break; - case 0x23c6: - self->port_23c6 = val; - if (val & 8) /* Disable internal CGA */ - mem_mapping_disable(&self->plasma_mapping); - else - mem_mapping_enable(&self->plasma_mapping); - break; - } + case 0x23c6: + self->port_23c6 = val; + if (val & 8) /* Disable internal CGA */ + mem_mapping_disable(&self->plasma_mapping); + else + mem_mapping_enable(&self->plasma_mapping); + break; + } } - static uint8_t compaq_plasma_in(uint16_t addr, void *priv) { - compaq_plasma_t *self = (compaq_plasma_t *)priv; - uint8_t ret = 0xff; + compaq_plasma_t *self = (compaq_plasma_t *) priv; + uint8_t ret = 0xff; - switch (addr) { - case 0x3d4: - ret = self->cga.crtcreg; - break; + switch (addr) { + case 0x3d4: + ret = self->cga.crtcreg; + break; - case 0x3d5: - if (self->cga.crtcreg == 0x12) { - ret = self->attrmap & 0x0F; - if (self->internal_monitor) - ret |= 0x30; /* Plasma / CRT */ - } else - ret = self->cga.crtc[self->cga.crtcreg]; - break; + case 0x3d5: + if (self->cga.crtcreg == 0x12) { + ret = self->attrmap & 0x0F; + if (self->internal_monitor) + ret |= 0x30; /* Plasma / CRT */ + } else + ret = self->cga.crtc[self->cga.crtcreg]; + break; - case 0x3da: - ret = self->cga.cgastat; - break; + case 0x3da: + ret = self->cga.cgastat; + break; - case 0x13c6: - if (compaq_plasma_display_get()) - ret = 8; - else - ret = 0; - break; + case 0x13c6: + if (compaq_plasma_display_get()) + ret = 8; + else + ret = 0; + break; - case 0x23c6: - ret = self->port_23c6; - break; - } + case 0x23c6: + ret = self->port_23c6; + break; + } - return ret; + return ret; } static void compaq_plasma_poll(void *p) { - compaq_plasma_t *self = (compaq_plasma_t *)p; + compaq_plasma_t *self = (compaq_plasma_t *) p; - /* Switch between internal plasma and external CRT display. */ - if (cpq_st_display_internal != -1 && cpq_st_display_internal != self->internal_monitor) { - self->internal_monitor = cpq_st_display_internal; - compaq_plasma_recalctimings(self); - } + /* Switch between internal plasma and external CRT display. */ + if (cpq_st_display_internal != -1 && cpq_st_display_internal != self->internal_monitor) { + self->internal_monitor = cpq_st_display_internal; + compaq_plasma_recalctimings(self); + } - if (!self->internal_monitor && !(self->port_23c6 & 1)) { - cga_poll(&self->cga); - return; - } + if (!self->internal_monitor && !(self->port_23c6 & 1)) { + cga_poll(&self->cga); + return; + } - if (!self->linepos) { - timer_advance_u64(&self->cga.timer, self->dispofftime); - self->cga.cgastat |= 1; - self->linepos = 1; - if (self->dispon) { - if (self->displine == 0) - video_wait_for_buffer(); + if (!self->linepos) { + timer_advance_u64(&self->cga.timer, self->dispofftime); + self->cga.cgastat |= 1; + self->linepos = 1; + if (self->dispon) { + if (self->displine == 0) + video_wait_for_buffer(); - /* Graphics */ - if (self->cga.cgamode & 0x02) { - if (self->cga.cgamode & 0x10) - compaq_plasma_cgaline6(self); - else - compaq_plasma_cgaline4(self); - } - else if (self->cga.cgamode & 0x01) /* High-res text */ - compaq_plasma_text80(self); - else - compaq_plasma_text40(self); - } - self->displine++; - /* Hardcode a fixed refresh rate and VSYNC timing */ - if (self->displine == 400) { /* Start of VSYNC */ - self->cga.cgastat |= 8; - self->dispon = 0; - } - if (self->displine == 416) { /* End of VSYNC */ - self->displine = 0; - self->cga.cgastat &= ~8; - self->dispon = 1; - } - } else { - if (self->dispon) - self->cga.cgastat &= ~1; - - timer_advance_u64(&self->cga.timer, self->dispontime); - self->linepos = 0; - - if (self->displine == 400) { - /* Hardcode 640x400 window size */ - if ((640 != xsize) || (400 != ysize) || video_force_resize_get()) { - xsize = 640; - ysize = 400; - if (xsize < 64) - xsize = 656; - if (ysize < 32) - ysize = 200; - set_screen_size(xsize, ysize); - - if (video_force_resize_get()) - video_force_resize_set(0); - } - video_blit_memtoscreen(0, 0, xsize, ysize); - frames++; - - /* Fixed 640x400 resolution */ - video_res_x = 640; - video_res_y = 400; - - if (self->cga.cgamode & 0x02) { - if (self->cga.cgamode & 0x10) - video_bpp = 1; - else - video_bpp = 2; - - } else - video_bpp = 0; - self->cga.cgablink++; - } + /* Graphics */ + if (self->cga.cgamode & 0x02) { + if (self->cga.cgamode & 0x10) + compaq_plasma_cgaline6(self); + else + compaq_plasma_cgaline4(self); + } else if (self->cga.cgamode & 0x01) /* High-res text */ + compaq_plasma_text80(self); + else + compaq_plasma_text40(self); } + self->displine++; + /* Hardcode a fixed refresh rate and VSYNC timing */ + if (self->displine == 400) { /* Start of VSYNC */ + self->cga.cgastat |= 8; + self->dispon = 0; + } + if (self->displine == 416) { /* End of VSYNC */ + self->displine = 0; + self->cga.cgastat &= ~8; + self->dispon = 1; + } + } else { + if (self->dispon) + self->cga.cgastat &= ~1; + + timer_advance_u64(&self->cga.timer, self->dispontime); + self->linepos = 0; + + if (self->displine == 400) { + /* Hardcode 640x400 window size */ + if ((640 != xsize) || (400 != ysize) || video_force_resize_get()) { + xsize = 640; + ysize = 400; + if (xsize < 64) + xsize = 656; + if (ysize < 32) + ysize = 200; + set_screen_size(xsize, ysize); + + if (video_force_resize_get()) + video_force_resize_set(0); + } + video_blit_memtoscreen(0, 0, xsize, ysize); + frames++; + + /* Fixed 640x400 resolution */ + video_res_x = 640; + video_res_y = 400; + + if (self->cga.cgamode & 0x02) { + if (self->cga.cgamode & 0x10) + video_bpp = 1; + else + video_bpp = 2; + + } else + video_bpp = 0; + self->cga.cgablink++; + } + } } static void compaq_plasma_recalcattrs(compaq_plasma_t *self) { - int n; + int n; - /* val behaves as follows: - * Bit 0: Attributes 01-06, 08-0E are inverse video - * Bit 1: Attributes 01-06, 08-0E are bold - * Bit 2: Attributes 11-16, 18-1F, 21-26, 28-2F ... F1-F6, F8-FF - * are inverse video - * Bit 3: Attributes 11-16, 18-1F, 21-26, 28-2F ... F1-F6, F8-FF - * are bold */ + /* val behaves as follows: + * Bit 0: Attributes 01-06, 08-0E are inverse video + * Bit 1: Attributes 01-06, 08-0E are bold + * Bit 2: Attributes 11-16, 18-1F, 21-26, 28-2F ... F1-F6, F8-FF + * are inverse video + * Bit 3: Attributes 11-16, 18-1F, 21-26, 28-2F ... F1-F6, F8-FF + * are bold */ - /* Set up colours */ - amber = makecol(0xff, 0x7D, 0x00); - black = makecol(0x64, 0x19, 0x00); + /* Set up colours */ + amber = makecol(0xff, 0x7D, 0x00); + black = makecol(0x64, 0x19, 0x00); - /* Initialise the attribute mapping. Start by defaulting everything - * to black on amber, and with bold set by bit 3 */ - for (n = 0; n < 256; n++) { - blinkcols[n][0] = normcols[n][0] = amber; - blinkcols[n][1] = normcols[n][1] = black; - } + /* Initialise the attribute mapping. Start by defaulting everything + * to black on amber, and with bold set by bit 3 */ + for (n = 0; n < 256; n++) { + blinkcols[n][0] = normcols[n][0] = amber; + blinkcols[n][1] = normcols[n][1] = black; + } - /* Colours 0x11-0xFF are controlled by bits 2 and 3 of the - * passed value. Exclude x0 and x8, which are always black on - * amber. */ - for (n = 0x11; n <= 0xFF; n++) { - if ((n & 7) == 0) - continue; - if (self->attrmap & 4) { /* Inverse */ - blinkcols[n][0] = normcols[n][0] = amber; - blinkcols[n][1] = normcols[n][1] = black; - } else { /* Normal */ - blinkcols[n][0] = normcols[n][0] = black; - blinkcols[n][1] = normcols[n][1] = amber; - } - } - /* Set up the 01-0E range, controlled by bits 0 and 1 of the - * passed value. When blinking is enabled this also affects 81-8E. */ - for (n = 0x01; n <= 0x0E; n++) { - if (n == 7) - continue; - if (self->attrmap & 1) { - blinkcols[n][0] = normcols[n][0] = amber; - blinkcols[n][1] = normcols[n][1] = black; - blinkcols[n+128][0] = amber; - blinkcols[n+128][1] = black; - } else { - blinkcols[n][0] = normcols[n][0] = black; - blinkcols[n][1] = normcols[n][1] = amber; - blinkcols[n+128][0] = black; - blinkcols[n+128][1] = amber; - } - } - /* Colours 07 and 0F are always amber on black. If blinking is - * enabled so are 87 and 8F. */ - for (n = 0x07; n <= 0x0F; n += 8) { - blinkcols[n][0] = normcols[n][0] = black; - blinkcols[n][1] = normcols[n][1] = amber; - blinkcols[n+128][0] = black; - blinkcols[n+128][1] = amber; - } - /* When not blinking, colours 81-8F are always amber on black. */ - for (n = 0x81; n <= 0x8F; n ++) { - normcols[n][0] = black; - normcols[n][1] = amber; - } + /* Colours 0x11-0xFF are controlled by bits 2 and 3 of the + * passed value. Exclude x0 and x8, which are always black on + * amber. */ + for (n = 0x11; n <= 0xFF; n++) { + if ((n & 7) == 0) + continue; + if (self->attrmap & 4) { /* Inverse */ + blinkcols[n][0] = normcols[n][0] = amber; + blinkcols[n][1] = normcols[n][1] = black; + } else { /* Normal */ + blinkcols[n][0] = normcols[n][0] = black; + blinkcols[n][1] = normcols[n][1] = amber; + } + } + /* Set up the 01-0E range, controlled by bits 0 and 1 of the + * passed value. When blinking is enabled this also affects 81-8E. */ + for (n = 0x01; n <= 0x0E; n++) { + if (n == 7) + continue; + if (self->attrmap & 1) { + blinkcols[n][0] = normcols[n][0] = amber; + blinkcols[n][1] = normcols[n][1] = black; + blinkcols[n + 128][0] = amber; + blinkcols[n + 128][1] = black; + } else { + blinkcols[n][0] = normcols[n][0] = black; + blinkcols[n][1] = normcols[n][1] = amber; + blinkcols[n + 128][0] = black; + blinkcols[n + 128][1] = amber; + } + } + /* Colours 07 and 0F are always amber on black. If blinking is + * enabled so are 87 and 8F. */ + for (n = 0x07; n <= 0x0F; n += 8) { + blinkcols[n][0] = normcols[n][0] = black; + blinkcols[n][1] = normcols[n][1] = amber; + blinkcols[n + 128][0] = black; + blinkcols[n + 128][1] = amber; + } + /* When not blinking, colours 81-8F are always amber on black. */ + for (n = 0x81; n <= 0x8F; n++) { + normcols[n][0] = black; + normcols[n][1] = amber; + } - /* Finally do the ones which are solid black. These differ between - * the normal and blinking mappings */ - for (n = 0; n <= 0xFF; n += 0x11) - normcols[n][0] = normcols[n][1] = black; + /* Finally do the ones which are solid black. These differ between + * the normal and blinking mappings */ + for (n = 0; n <= 0xFF; n += 0x11) + normcols[n][0] = normcols[n][1] = black; - /* In the blinking range, 00 11 22 .. 77 and 80 91 A2 .. F7 are black */ - for (n = 0; n <= 0x77; n += 0x11) { - blinkcols[n][0] = blinkcols[n][1] = black; - blinkcols[n+128][0] = blinkcols[n+128][1] = black; - } + /* In the blinking range, 00 11 22 .. 77 and 80 91 A2 .. F7 are black */ + for (n = 0; n <= 0x77; n += 0x11) { + blinkcols[n][0] = blinkcols[n][1] = black; + blinkcols[n + 128][0] = blinkcols[n + 128][1] = black; + } } static void * compaq_plasma_init(const device_t *info) { - int display_type; - compaq_plasma_t *self = malloc(sizeof(compaq_plasma_t)); - memset(self, 0, sizeof(compaq_plasma_t)); + int display_type; + compaq_plasma_t *self = malloc(sizeof(compaq_plasma_t)); + memset(self, 0, sizeof(compaq_plasma_t)); - display_type = device_get_config_int("display_type"); - self->cga.composite = (display_type != CGA_RGB); - self->cga.revision = device_get_config_int("composite_type"); + display_type = device_get_config_int("display_type"); + self->cga.composite = (display_type != CGA_RGB); + self->cga.revision = device_get_config_int("composite_type"); - self->vram = malloc(0x8000); - self->internal_monitor = 1; + self->vram = malloc(0x8000); + self->internal_monitor = 1; - cga_comp_init(self->cga.revision); - timer_add(&self->cga.timer, compaq_plasma_poll, self, 1); - mem_mapping_add(&self->plasma_mapping, 0xb8000, 0x08000, compaq_plasma_read, NULL, NULL, compaq_plasma_write, NULL, NULL, NULL /*self->cga.vram*/, MEM_MAPPING_EXTERNAL, self); - io_sethandler(0x03d0, 0x0010, compaq_plasma_in, NULL, NULL, compaq_plasma_out, NULL, NULL, self); - io_sethandler(0x13c6, 0x0001, compaq_plasma_in, NULL, NULL, compaq_plasma_out, NULL, NULL, self); - io_sethandler(0x23c6, 0x0001, compaq_plasma_in, NULL, NULL, compaq_plasma_out, NULL, NULL, self); + cga_comp_init(self->cga.revision); + timer_add(&self->cga.timer, compaq_plasma_poll, self, 1); + mem_mapping_add(&self->plasma_mapping, 0xb8000, 0x08000, compaq_plasma_read, NULL, NULL, compaq_plasma_write, NULL, NULL, NULL /*self->cga.vram*/, MEM_MAPPING_EXTERNAL, self); + io_sethandler(0x03d0, 0x0010, compaq_plasma_in, NULL, NULL, compaq_plasma_out, NULL, NULL, self); + io_sethandler(0x13c6, 0x0001, compaq_plasma_in, NULL, NULL, compaq_plasma_out, NULL, NULL, self); + io_sethandler(0x23c6, 0x0001, compaq_plasma_in, NULL, NULL, compaq_plasma_out, NULL, NULL, self); - /* Default attribute mapping is 4 */ - self->attrmap = 4; - compaq_plasma_recalcattrs(self); + /* Default attribute mapping is 4 */ + self->attrmap = 4; + compaq_plasma_recalcattrs(self); - self->cga.cgastat = 0xF4; - self->cga.vram = self->vram; + self->cga.cgastat = 0xF4; + self->cga.vram = self->vram; - overscan_x = overscan_y = 16; + overscan_x = overscan_y = 16; - self->cga.rgb_type = device_get_config_int("rgb_type"); - cga_palette = (self->cga.rgb_type << 1); - cgapal_rebuild(); + self->cga.rgb_type = device_get_config_int("rgb_type"); + cga_palette = (self->cga.rgb_type << 1); + cgapal_rebuild(); - return self; + return self; } static void compaq_plasma_close(void *p) { - compaq_plasma_t *self = (compaq_plasma_t *)p; + compaq_plasma_t *self = (compaq_plasma_t *) p; - free(self->vram); + free(self->vram); - free(self); + free(self); } static void compaq_plasma_speed_changed(void *p) { - compaq_plasma_t *self = (compaq_plasma_t *)p; + compaq_plasma_t *self = (compaq_plasma_t *) p; - compaq_plasma_recalctimings(self); + compaq_plasma_recalctimings(self); } const device_config_t compaq_plasma_config[] = { + // clang-format off { .name = "display_type", .description = "Display type", @@ -717,20 +702,21 @@ const device_config_t compaq_plasma_config[] = { } }, { .name = "", .description = "", .type = CONFIG_END } +// clang-format on }; const device_t compaq_plasma_device = { - .name = "Compaq Plasma", + .name = "Compaq Plasma", .internal_name = "compaq_plasma", - .flags = 0, - .local = 0, - .init = compaq_plasma_init, - .close = compaq_plasma_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = compaq_plasma_init, + .close = compaq_plasma_close, + .reset = NULL, { .available = NULL }, .speed_changed = compaq_plasma_speed_changed, - .force_redraw = NULL, - .config = compaq_plasma_config + .force_redraw = NULL, + .config = compaq_plasma_config }; static uint8_t @@ -739,30 +725,27 @@ read_ram(uint32_t addr, void *priv) addr = (addr & 0x7ffff) + 0x80000; addreadlookup(mem_logical_addr, addr); - return(ram[addr]); + return (ram[addr]); } - static uint16_t read_ramw(uint32_t addr, void *priv) { addr = (addr & 0x7ffff) + 0x80000; addreadlookup(mem_logical_addr, addr); - return(*(uint16_t *)&ram[addr]); + return (*(uint16_t *) &ram[addr]); } - static uint32_t read_raml(uint32_t addr, void *priv) { addr = (addr & 0x7ffff) + 0x80000; addreadlookup(mem_logical_addr, addr); - return(*(uint32_t *)&ram[addr]); + return (*(uint32_t *) &ram[addr]); } - static void write_ram(uint32_t addr, uint8_t val, void *priv) { @@ -772,7 +755,6 @@ write_ram(uint32_t addr, uint8_t val, void *priv) mem_write_ramb_page(addr, val, &pages[addr >> 12]); } - static void write_ramw(uint32_t addr, uint16_t val, void *priv) { @@ -782,7 +764,6 @@ write_ramw(uint32_t addr, uint16_t val, void *priv) mem_write_ramw_page(addr, val, &pages[addr >> 12]); } - static void write_raml(uint32_t addr, uint32_t val, void *priv) { @@ -796,91 +777,88 @@ static void machine_at_compaq_init(const machine_t *model, int type) { if (type != COMPAQ_DESKPRO386) - mem_remap_top(384); + mem_remap_top(384); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); mem_mapping_add(&ram_mapping, 0xfa0000, 0x60000, read_ram, read_ramw, read_raml, write_ram, write_ramw, write_raml, - 0xa0000+ram, MEM_MAPPING_INTERNAL, NULL); + 0xa0000 + ram, MEM_MAPPING_INTERNAL, NULL); video_reset(gfxcard); - switch(type) { - case COMPAQ_PORTABLEII: - break; + switch (type) { + case COMPAQ_PORTABLEII: + break; - case COMPAQ_PORTABLEIII: - if (gfxcard == VID_INTERNAL) - device_add(&compaq_plasma_device); - break; + case COMPAQ_PORTABLEIII: + if (gfxcard == VID_INTERNAL) + device_add(&compaq_plasma_device); + break; - case COMPAQ_PORTABLEIII386: - if (hdc_current == 1) - device_add(&ide_isa_device); - if (gfxcard == VID_INTERNAL) - device_add(&compaq_plasma_device); - break; + case COMPAQ_PORTABLEIII386: + if (hdc_current == 1) + device_add(&ide_isa_device); + if (gfxcard == VID_INTERNAL) + device_add(&compaq_plasma_device); + break; - case COMPAQ_DESKPRO386: - if (hdc_current == 1) - device_add(&ide_isa_device); - break; + case COMPAQ_DESKPRO386: + if (hdc_current == 1) + device_add(&ide_isa_device); + break; } machine_at_init(model); } - int machine_at_portableii_init(const machine_t *model) { int ret; ret = bios_load_interleavedr("roms/machines/portableii/109740-001.rom", - "roms/machines/portableii/109739-001.rom", - 0x000f8000, 65536, 0); + "roms/machines/portableii/109739-001.rom", + 0x000f8000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_compaq_init(model, COMPAQ_PORTABLEII); return ret; } - int machine_at_portableiii_init(const machine_t *model) { int ret; ret = bios_load_interleavedr("roms/machines/portableiii/Compaq Portable III - BIOS - 106779-002 - Even.bin", - "roms/machines/portableiii/Compaq Portable III - BIOS - 106778-002 - Odd.bin", - 0x000f8000, 65536, 0); + "roms/machines/portableiii/Compaq Portable III - BIOS - 106778-002 - Odd.bin", + 0x000f8000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_compaq_init(model, COMPAQ_PORTABLEIII); return ret; } - int machine_at_portableiii386_init(const machine_t *model) { int ret; ret = bios_load_interleavedr("roms/machines/portableiii/Compaq Portable III - BIOS - 106779-002 - Even.bin", - "roms/machines/portableiii/Compaq Portable III - BIOS - 106778-002 - Odd.bin", - 0x000f8000, 65536, 0); + "roms/machines/portableiii/Compaq Portable III - BIOS - 106778-002 - Odd.bin", + 0x000f8000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_compaq_init(model, COMPAQ_PORTABLEIII386); @@ -894,10 +872,10 @@ machine_at_deskpro386_init(const machine_t *model) int ret; ret = bios_load_linearr("roms/machines/deskpro386/1986-09-04-HI.json.bin", - 0x000fc000, 65536, 0); + 0x000fc000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_compaq_init(model, COMPAQ_DESKPRO386); diff --git a/src/machine/m_at_misc.c b/src/machine/m_at_misc.c index b41735d74..ca1c78042 100644 --- a/src/machine/m_at_misc.c +++ b/src/machine/m_at_misc.c @@ -44,10 +44,10 @@ machine_at_vpc2007_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/vpc2007/13500.bin", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); is_vpc = 1; diff --git a/src/machine/m_at_slot1.c b/src/machine/m_at_slot1.c index f3b225ae1..1204384a5 100644 --- a/src/machine/m_at_slot1.c +++ b/src/machine/m_at_slot1.c @@ -46,27 +46,26 @@ machine_at_p65up5_cpknd_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/p65up5/NDKN0218.AWD", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_p65up5_common_init(model, &i440fx_device); return ret; } - int machine_at_kn97_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/kn97/0116I.001", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -85,22 +84,21 @@ machine_at_kn97_init(const machine_t *model) device_add(&intel_flash_bxt_device); device_add(&lm78_device); /* fans: Chassis, CPU, Power; temperature: MB */ for (uint8_t i = 0; i < 3; i++) - hwm_values.fans[i] *= 2; /* BIOS reports fans with the wrong divisor for some reason */ + hwm_values.fans[i] *= 2; /* BIOS reports fans with the wrong divisor for some reason */ return ret; } - int machine_at_lx6_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/lx6/LX6C_PZ.B00", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -122,17 +120,16 @@ machine_at_lx6_init(const machine_t *model) return ret; } - int machine_at_spitfire_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/spitfire/SPIHM.02", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -155,50 +152,48 @@ machine_at_spitfire_init(const machine_t *model) return ret; } - int machine_at_p6i440e2_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p6i440e2/E2_v14sl.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); - pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4); - pci_register_slot(0x0A, PCI_CARD_NORMAL, 2, 3, 4, 1); - pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4); + pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x0A, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4); device_add(&i440ex_device); device_add(&piix4_device); device_add(&keyboard_ps2_ami_pci_device); device_add(&w83977tf_device); device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x03, 256); - device_add(&w83781d_device); /* fans: CPU, CHS, PS; temperatures: unused, CPU, System */ - hwm_values.temperatures[0] = 0; /* unused */ - hwm_values.voltages[1] = 1500; /* CPUVTT */ + device_add(&w83781d_device); /* fans: CPU, CHS, PS; temperatures: unused, CPU, System */ + hwm_values.temperatures[0] = 0; /* unused */ + hwm_values.voltages[1] = 1500; /* CPUVTT */ return ret; } - int machine_at_p2bls_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p2bls/1014ls.003", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -216,27 +211,26 @@ machine_at_p2bls_init(const machine_t *model) device_add(&piix4e_device); device_add(&keyboard_ps2_ami_pci_device); device_add(&w83977ef_device); - //device_add(ics9xxx_get(ICS9150_08)); /* setting proper speeds requires some interaction with the AS97127F ASIC */ + // device_add(ics9xxx_get(ICS9150_08)); /* setting proper speeds requires some interaction with the AS97127F ASIC */ device_add(&sst_flash_39sf020_device); spd_register(SPD_TYPE_SDRAM, 0xF, 256); - device_add(&w83781d_device); /* fans: Chassis, CPU, Power; temperatures: MB, unused, CPU */ - hwm_values.temperatures[1] = 0; /* unused */ + device_add(&w83781d_device); /* fans: Chassis, CPU, Power; temperatures: MB, unused, CPU */ + hwm_values.temperatures[1] = 0; /* unused */ hwm_values.temperatures[2] -= 3; /* CPU offset */ return ret; } - int machine_at_p3bf_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p3bf/1008f.004", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -257,23 +251,22 @@ machine_at_p3bf_init(const machine_t *model) device_add(ics9xxx_get(ICS9250_08)); device_add(&sst_flash_39sf020_device); spd_register(SPD_TYPE_SDRAM, 0xF, 256); - device_add(&as99127f_device); /* fans: Chassis, CPU, Power; temperatures: MB, JTPWR, CPU */ + device_add(&as99127f_device); /* fans: Chassis, CPU, Power; temperatures: MB, JTPWR, CPU */ hwm_values.voltages[4] = hwm_values.voltages[5]; /* +12V reading not in line with other boards; appears to be close to the -12V reading */ return ret; } - int machine_at_bf6_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/bf6/Beh_70.bin", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -298,17 +291,16 @@ machine_at_bf6_init(const machine_t *model) return ret; } - int machine_at_ax6bc_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ax6bc/AX6BC_R2.59.bin", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -332,17 +324,16 @@ machine_at_ax6bc_init(const machine_t *model) return ret; } - int machine_at_atc6310bxii_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/atc6310bxii/6310s102.bin", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -365,17 +356,16 @@ machine_at_atc6310bxii_init(const machine_t *model) return ret; } - int machine_at_686bx_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/686bx/6BX.F2a", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -393,27 +383,26 @@ machine_at_686bx_init(const machine_t *model) device_add(&w83977tf_device); device_add(&intel_flash_bxt_device); spd_register(SPD_TYPE_SDRAM, 0xF, 256); - device_add(&w83781d_device); /* fans: CPU, unused, unused; temperatures: unused, CPU, unused */ - hwm_values.temperatures[0] = 0; /* unused */ + device_add(&w83781d_device); /* fans: CPU, unused, unused; temperatures: unused, CPU, unused */ + hwm_values.temperatures[0] = 0; /* unused */ hwm_values.temperatures[1] += 4; /* CPU offset */ - hwm_values.temperatures[2] = 0; /* unused */ - hwm_values.fans[1] = 0; /* unused */ - hwm_values.fans[2] = 0; /* unused */ + hwm_values.temperatures[2] = 0; /* unused */ + hwm_values.fans[1] = 0; /* unused */ + hwm_values.fans[2] = 0; /* unused */ return ret; } - int machine_at_p6sba_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p6sba/SBAB21.ROM", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -433,8 +422,8 @@ machine_at_p6sba_init(const machine_t *model) device_add(&keyboard_ps2_ami_pci_device); device_add(&intel_flash_bxt_device); spd_register(SPD_TYPE_SDRAM, 0x7, 256); - device_add(&w83781d_device); /* fans: CPU1, CPU2, Thermal Control; temperatures: unused, CPU1, CPU2? */ - hwm_values.fans[1] = 0; /* no CPU2 fan */ + device_add(&w83781d_device); /* fans: CPU1, CPU2, Thermal Control; temperatures: unused, CPU1, CPU2? */ + hwm_values.fans[1] = 0; /* no CPU2 fan */ hwm_values.temperatures[0] = 0; /* unused */ hwm_values.temperatures[2] = 0; /* CPU2? */ /* no CPU2 voltage */ @@ -442,17 +431,16 @@ machine_at_p6sba_init(const machine_t *model) return ret; } - int machine_at_s1846_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/s1846/bx46200f.rom", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -474,8 +462,8 @@ machine_at_s1846_init(const machine_t *model) spd_register(SPD_TYPE_SDRAM, 0x7, 256); if (sound_card_current == SOUND_INTERNAL) { - device_add(&es1371_onboard_device); - device_add(&cs4297_device); /* found on other Tyan boards around the same time */ + device_add(&es1371_onboard_device); + device_add(&cs4297_device); /* found on other Tyan boards around the same time */ } return ret; @@ -487,10 +475,10 @@ machine_at_ficka6130_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/ficka6130/qa4163.bin", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -512,17 +500,16 @@ machine_at_ficka6130_init(const machine_t *model) return ret; } - int machine_at_p3v133_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p3v133/1003.002", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -543,24 +530,23 @@ machine_at_p3v133_init(const machine_t *model) device_add(ics9xxx_get(ICS9248_39)); device_add(&sst_flash_39sf020_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); - device_add(&w83781d_device); /* fans: Chassis, CPU, Power; temperatures: MB, unused, CPU */ - hwm_values.temperatures[1] = 0; /* unused */ + device_add(&w83781d_device); /* fans: Chassis, CPU, Power; temperatures: MB, unused, CPU */ + hwm_values.temperatures[1] = 0; /* unused */ hwm_values.temperatures[2] -= 3; /* CPU offset */ return ret; } - int machine_at_p3v4x_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p3v4x/1006.004", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -586,17 +572,16 @@ machine_at_p3v4x_init(const machine_t *model) return ret; } - int machine_at_vei8_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/vei8/QHW1001.BIN", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -619,7 +604,6 @@ machine_at_vei8_init(const machine_t *model) return ret; } - static void machine_at_ms6168_common_init(const machine_t *model) { @@ -638,70 +622,66 @@ machine_at_ms6168_common_init(const machine_t *model) device_add(&w83977ef_device); if (gfxcard == VID_INTERNAL) - device_add(&voodoo_3_2000_agp_onboard_8m_device); + device_add(&voodoo_3_2000_agp_onboard_8m_device); device_add(&keyboard_ps2_ami_pci_device); device_add(&intel_flash_bxt_device); spd_register(SPD_TYPE_SDRAM, 0x3, 256); if (sound_card_current == SOUND_INTERNAL) { - device_add(&es1371_onboard_device); - device_add(&cs4297_device); + device_add(&es1371_onboard_device); + device_add(&cs4297_device); } } - const device_t * at_ms6168_get_device(void) { return &voodoo_3_2000_agp_onboard_8m_device; } - int machine_at_borapro_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/borapro/MS6168V2.50", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_ms6168_common_init(model); return ret; } - int machine_at_ms6168_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ms6168/w6168ims.130", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_ms6168_common_init(model); return ret; } - int machine_at_m729_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/m729/M729NEW.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -716,7 +696,7 @@ machine_at_m729_init(const machine_t *model) pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x10, PCI_CARD_NORMAL, 3, 4, 1, 2); device_add(&ali1621_device); - device_add(&ali1543c_device); /* +0 */ + device_add(&ali1543c_device); /* +0 */ device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); diff --git a/src/machine/m_at_slot2.c b/src/machine/m_at_slot2.c index 359b94f60..daa831e7d 100644 --- a/src/machine/m_at_slot2.c +++ b/src/machine/m_at_slot2.c @@ -46,10 +46,10 @@ machine_at_6gxu_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/6gxu/6gxu.f1c", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -69,9 +69,9 @@ machine_at_6gxu_init(const machine_t *model) device_add(&w83977ef_device); device_add(&sst_flash_39sf020_device); spd_register(SPD_TYPE_SDRAM, 0xF, 512); - device_add(&w83782d_device); /* fans: CPU, Power, System; temperatures: System, CPU, unused */ - hwm_values.temperatures[2] = 0; /* unused */ - hwm_values.voltages[1] = 1500; /* VGTL */ + device_add(&w83782d_device); /* fans: CPU, Power, System; temperatures: System, CPU, unused */ + hwm_values.temperatures[2] = 0; /* unused */ + hwm_values.voltages[1] = 1500; /* VGTL */ return ret; } @@ -82,10 +82,10 @@ machine_at_s2dge_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/s2dge/2gu7301.rom", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -106,8 +106,8 @@ machine_at_s2dge_init(const machine_t *model) device_add(&w83977tf_device); device_add(&intel_flash_bxt_device); spd_register(SPD_TYPE_SDRAM, 0xF, 512); - device_add(&w83781d_device); /* fans: CPU1, CPU2, Thermal Control; temperatures: unused, CPU1, CPU2? */ - hwm_values.fans[1] = 0; /* no CPU2 fan */ + device_add(&w83781d_device); /* fans: CPU1, CPU2, Thermal Control; temperatures: unused, CPU1, CPU2? */ + hwm_values.fans[1] = 0; /* no CPU2 fan */ hwm_values.temperatures[0] = 0; /* unused */ hwm_values.temperatures[2] = 0; /* CPU2? */ @@ -120,10 +120,10 @@ machine_at_fw6400gx_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/fw6400gx/FWGX1211.ROM", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -145,9 +145,9 @@ machine_at_fw6400gx_init(const machine_t *model) device_add(ics9xxx_get(ICS9250_08)); device_add(&sst_flash_29ee020_device); spd_register(SPD_TYPE_SDRAM, 0xF, 512); - device_add(&w83781d_device); /* fans: Chassis, Power, CPU; temperatures: System, CPU, unused */ - hwm_values.temperatures[3] = 0; /* unused */ - hwm_values.voltages[1] = 1500; /* Vtt */ + device_add(&w83781d_device); /* fans: Chassis, Power, CPU; temperatures: System, CPU, unused */ + hwm_values.temperatures[3] = 0; /* unused */ + hwm_values.voltages[1] = 1500; /* Vtt */ return ret; } diff --git a/src/machine/m_at_socket370.c b/src/machine/m_at_socket370.c index 9daec8609..b73f54062 100644 --- a/src/machine/m_at_socket370.c +++ b/src/machine/m_at_socket370.c @@ -40,17 +40,16 @@ #include <86box/sound.h> #include <86box/snd_ac97.h> - int machine_at_s370slm_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/s370slm/3LM1202.rom", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -68,24 +67,23 @@ machine_at_s370slm_init(const machine_t *model) device_add(&keyboard_ps2_ami_pci_device); device_add(&intel_flash_bxt_device); spd_register(SPD_TYPE_SDRAM, 0x7, 256); - device_add(&w83781d_device); /* fans: CPU, Fan 2, Chassis; temperatures: unused, CPU, unused */ + device_add(&w83781d_device); /* fans: CPU, Fan 2, Chassis; temperatures: unused, CPU, unused */ hwm_values.temperatures[0] = 0; /* unused */ hwm_values.temperatures[2] = 0; /* unused */ return ret; } - int machine_at_s1857_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/s1857/BX57200A.ROM", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -107,24 +105,23 @@ machine_at_s1857_init(const machine_t *model) spd_register(SPD_TYPE_SDRAM, 0x7, 256); if (sound_card_current == SOUND_INTERNAL) { - device_add(&es1371_onboard_device); - device_add(&cs4297_device); /* found on other Tyan boards around the same time */ + device_add(&es1371_onboard_device); + device_add(&cs4297_device); /* found on other Tyan boards around the same time */ } return ret; } - int machine_at_p6bap_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p6bap/bapa14a.BIN", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -147,17 +144,16 @@ machine_at_p6bap_init(const machine_t *model) return ret; } - int machine_at_cubx_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/cubx/1008cu.004", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -184,17 +180,16 @@ machine_at_cubx_init(const machine_t *model) return ret; } - int machine_at_atc7020bxii_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/atc7020bxii/7020s102.bin", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -217,17 +212,16 @@ machine_at_atc7020bxii_init(const machine_t *model) return ret; } - int machine_at_ambx133_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ambx133/mkbx2vg2.bin", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -248,23 +242,22 @@ machine_at_ambx133_init(const machine_t *model) spd_register(SPD_TYPE_SDRAM, 0x7, 256); device_add(&gl518sm_2d_device); /* fans: CPUFAN1, CPUFAN2; temperature: CPU */ hwm_values.fans[1] += 500; - hwm_values.temperatures[0] += 4; /* CPU offset */ + hwm_values.temperatures[0] += 4; /* CPU offset */ hwm_values.voltages[1] = RESISTOR_DIVIDER(12000, 10, 2); /* different 12V divider in BIOS (10K/2K?) */ return ret; } - int machine_at_awo671r_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/awo671r/a08139c.bin", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -288,17 +281,16 @@ machine_at_awo671r_init(const machine_t *model) return ret; } - int machine_at_63a1_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/63a1/63a-q3.bin", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -321,17 +313,16 @@ machine_at_63a1_init(const machine_t *model) return ret; } - int machine_at_apas3_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/apas3/V0218SAG.BIN", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -353,17 +344,16 @@ machine_at_apas3_init(const machine_t *model) return ret; } - int machine_at_gt694va_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/gt694va/21071100.bin", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -381,32 +371,31 @@ machine_at_gt694va_init(const machine_t *model) device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_39sf020_device); spd_register(SPD_TYPE_SDRAM, 0x7, 1024); - device_add(&w83782d_device); /* fans: CPU, unused, unused; temperatures: System, CPU1, unused */ - hwm_values.voltages[1] = 1500; /* IN1 (unknown purpose, assumed Vtt) */ - hwm_values.fans[0] = 4500; /* BIOS does not display <4411 RPM */ - hwm_values.fans[1] = 0; /* unused */ - hwm_values.fans[2] = 0; /* unused */ - hwm_values.temperatures[2] = 0; /* unused */ + device_add(&w83782d_device); /* fans: CPU, unused, unused; temperatures: System, CPU1, unused */ + hwm_values.voltages[1] = 1500; /* IN1 (unknown purpose, assumed Vtt) */ + hwm_values.fans[0] = 4500; /* BIOS does not display <4411 RPM */ + hwm_values.fans[1] = 0; /* unused */ + hwm_values.fans[2] = 0; /* unused */ + hwm_values.temperatures[2] = 0; /* unused */ if (sound_card_current == SOUND_INTERNAL) { - device_add(&es1371_onboard_device); - device_add(&cs4297_device); /* assumed */ + device_add(&es1371_onboard_device); + device_add(&cs4297_device); /* assumed */ } return ret; } - int machine_at_cuv4xls_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/cuv4xls/1005LS.001", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -431,7 +420,7 @@ machine_at_cuv4xls_init(const machine_t *model) device_add(&as99127f_device); /* fans: Chassis, CPU, Power; temperatures: MB, JTPWR, CPU */ if (sound_card_current == SOUND_INTERNAL) - device_add(&cmi8738_onboard_device); + device_add(&cmi8738_onboard_device); return ret; } @@ -442,10 +431,10 @@ machine_at_6via90ap_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/6via90ap/90ap10.bin", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -466,10 +455,10 @@ machine_at_6via90ap_init(const machine_t *model) spd_register(SPD_TYPE_SDRAM, 0x7, 1024); hwm_values.temperatures[0] += 2; /* CPU offset */ hwm_values.temperatures[1] += 2; /* System offset */ - hwm_values.temperatures[2] = 0; /* unused */ + hwm_values.temperatures[2] = 0; /* unused */ if (sound_card_current == SOUND_INTERNAL) - device_add(&alc100_device); /* ALC100P identified on similar Acorp boards (694TA, 6VIA90A1) */ + device_add(&alc100_device); /* ALC100P identified on similar Acorp boards (694TA, 6VIA90A1) */ return ret; } diff --git a/src/machine/m_at_socket4.c b/src/machine/m_at_socket4.c index 1dd74971d..f47a6f6df 100644 --- a/src/machine/m_at_socket4.c +++ b/src/machine/m_at_socket4.c @@ -39,10 +39,10 @@ #include <86box/nvr.h> #include <86box/scsi_ncr53c8xx.h> #include <86box/sio.h> +#include <86box/timer.h> #include <86box/video.h> #include <86box/machine.h> - void machine_at_premiere_common_init(const machine_t *model, int pci_switch) { @@ -62,7 +62,6 @@ machine_at_premiere_common_init(const machine_t *model, int pci_switch) device_add(&intel_flash_bxt_ami_device); } - void machine_at_award_common_init(const machine_t *model) { @@ -80,13 +79,12 @@ machine_at_award_common_init(const machine_t *model) pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); // device_add(&keyboard_ps2_pci_device); device_add(&keyboard_ps2_ami_pci_device); } - void machine_at_sp4_common_init(const machine_t *model) { @@ -110,17 +108,16 @@ machine_at_sp4_common_init(const machine_t *model) device_add(&intel_flash_bxt_device); } - int machine_at_excaliburpci_init(const machine_t *model) { int ret; ret = bios_load_linear_inverted("roms/machines/excaliburpci/S701P.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -142,17 +139,16 @@ machine_at_excaliburpci_init(const machine_t *model) return ret; } - int machine_at_p5mp3_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p5mp3/0205.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&ide_pci_device); @@ -173,17 +169,16 @@ machine_at_p5mp3_init(const machine_t *model) return ret; } - int machine_at_dellxp60_init(const machine_t *model) { int ret; ret = bios_load_linear_inverted("roms/machines/dellxp60/XP60-A08.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&ide_pci_2ch_device); @@ -206,17 +201,16 @@ machine_at_dellxp60_init(const machine_t *model) return ret; } - int machine_at_opti560l_init(const machine_t *model) { int ret; ret = bios_load_linear_inverted("roms/machines/opti560l/560L_A06.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&ide_pci_2ch_device); @@ -236,17 +230,16 @@ machine_at_opti560l_init(const machine_t *model) return ret; } - int machine_at_ambradp60_init(const machine_t *model) { int ret; ret = bios_load_linear_combined("roms/machines/ambradp60/1004AF1P.BIO", - "roms/machines/ambradp60/1004AF1P.BI1", 0x1c000, 128); + "roms/machines/ambradp60/1004AF1P.BI1", 0x1c000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_premiere_common_init(model, 0); @@ -255,17 +248,16 @@ machine_at_ambradp60_init(const machine_t *model) return ret; } - int machine_at_valuepointp60_init(const machine_t *model) { int ret; ret = bios_load_linear_combined("roms/machines/valuepointp60/1006AV0M.BIO", - "roms/machines/valuepointp60/1006AV0M.BI1", 0x1d000, 128); + "roms/machines/valuepointp60/1006AV0M.BI1", 0x1d000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); device_add(&ide_pci_2ch_device); @@ -287,17 +279,16 @@ machine_at_valuepointp60_init(const machine_t *model) return ret; } - int machine_at_revenge_init(const machine_t *model) { int ret; ret = bios_load_linear_combined("roms/machines/revenge/1009af2_.bio", - "roms/machines/revenge/1009af2_.bi1", 0x1c000, 128); + "roms/machines/revenge/1009af2_.bi1", 0x1c000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_premiere_common_init(model, 0); @@ -306,17 +297,16 @@ machine_at_revenge_init(const machine_t *model) return ret; } - int machine_at_586mc1_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/586mc1/IS.34", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_award_common_init(model); @@ -327,17 +317,16 @@ machine_at_586mc1_init(const machine_t *model) return ret; } - int machine_at_pb520r_init(const machine_t *model) { int ret; ret = bios_load_linear_combined("roms/machines/pb520r/1009bc0r.bio", - "roms/machines/pb520r/1009bc0r.bi1", 0x1d000, 128); + "roms/machines/pb520r/1009bc0r.bi1", 0x1d000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -353,7 +342,7 @@ machine_at_pb520r_init(const machine_t *model) device_add(&ide_cmd640_pci_single_channel_device); if (gfxcard == VID_INTERNAL) - device_add(&gd5434_onboard_pci_device); + device_add(&gd5434_onboard_pci_device); device_add(&keyboard_ps2_pci_device); device_add(&sio_zb_device); @@ -369,10 +358,10 @@ machine_at_excalibur_init(const machine_t *model) int ret; ret = bios_load_linear_inverted("roms/machines/excalibur/S75P.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -384,17 +373,16 @@ machine_at_excalibur_init(const machine_t *model) return ret; } - int machine_at_p5vl_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p5vl/SM507.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); pci_init(PCI_CONFIG_TYPE_1); @@ -408,22 +396,21 @@ machine_at_p5vl_init(const machine_t *model) device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_excaliburpci2_init(const machine_t *model) { int ret; ret = bios_load_linear_inverted("roms/machines/excaliburpci2/S722P.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); device_add(&ami_1994_nvr_device); @@ -446,17 +433,16 @@ machine_at_excaliburpci2_init(const machine_t *model) return ret; } - int machine_at_p5sp4_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p5sp4/0106.001", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_sp4_common_init(model); diff --git a/src/machine/m_at_socket5.c b/src/machine/m_at_socket5.c index 4fc7441bb..3d233d41c 100644 --- a/src/machine/m_at_socket5.c +++ b/src/machine/m_at_socket5.c @@ -42,17 +42,16 @@ #include <86box/video.h> #include <86box/machine.h> - int machine_at_plato_init(const machine_t *model) { int ret; ret = bios_load_linear_combined("roms/machines/plato/1016ax1_.bio", - "roms/machines/plato/1016ax1_.bi1", 0x1d000, 128); + "roms/machines/plato/1016ax1_.bi1", 0x1d000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_premiere_common_init(model, PCI_CAN_SWITCH_TYPE); @@ -61,17 +60,16 @@ machine_at_plato_init(const machine_t *model) return ret; } - int machine_at_ambradp90_init(const machine_t *model) { int ret; ret = bios_load_linear_combined("roms/machines/ambradp90/1002AX1P.BIO", - "roms/machines/ambradp90/1002AX1P.BI1", 0x1d000, 128); + "roms/machines/ambradp90/1002AX1P.BI1", 0x1d000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_premiere_common_init(model, PCI_CAN_SWITCH_TYPE); @@ -80,17 +78,16 @@ machine_at_ambradp90_init(const machine_t *model) return ret; } - int machine_at_430nx_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/430nx/IP.20", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_award_common_init(model); @@ -101,17 +98,16 @@ machine_at_430nx_init(const machine_t *model) return ret; } - int machine_at_acerv30_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/acerv30/V30R01N9.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -132,17 +128,16 @@ machine_at_acerv30_init(const machine_t *model) return ret; } - int machine_at_apollo_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/apollo/S728P.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); device_add(&ami_1995_nvr_device); @@ -163,17 +158,16 @@ machine_at_apollo_init(const machine_t *model) return ret; } - int machine_at_exp8551_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/exp8551/AMI20.BIO", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -193,17 +187,16 @@ machine_at_exp8551_init(const machine_t *model) return ret; } - int machine_at_zappa_init(const machine_t *model) { int ret; ret = bios_load_linear_combined("roms/machines/zappa/1006bs0_.bio", - "roms/machines/zappa/1006bs0_.bi1", 0x20000, 128); + "roms/machines/zappa/1006bs0_.bi1", 0x20000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -222,17 +215,16 @@ machine_at_zappa_init(const machine_t *model) return ret; } - int machine_at_powermatev_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/powermatev/BIOS.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -251,17 +243,16 @@ machine_at_powermatev_init(const machine_t *model) return ret; } - int machine_at_mb500n_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/mb500n/031396s.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -281,17 +272,16 @@ machine_at_mb500n_init(const machine_t *model) return ret; } - int machine_at_hawk_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/hawk/HAWK.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); device_add(&ami_1994_nvr_device); @@ -311,17 +301,16 @@ machine_at_hawk_init(const machine_t *model) return ret; } - int machine_at_pat54pv_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/pat54pv/PAT54PV.bin", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -329,22 +318,21 @@ machine_at_pat54pv_init(const machine_t *model) device_add(&keyboard_ps2_intel_ami_pci_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_hot543_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/hot543/543_R21.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); pci_init(PCI_CONFIG_TYPE_1); @@ -358,39 +346,37 @@ machine_at_hot543_init(const machine_t *model) device_add(&keyboard_at_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); return ret; } - int machine_at_p54sp4_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p54sp4/SI5I0204.AWD", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_sp4_common_init(model); return ret; } - int machine_at_sq588_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/sq588/sq588b03.rom", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); diff --git a/src/machine/m_at_socket7.c b/src/machine/m_at_socket7.c index 2856a599c..043faddda 100644 --- a/src/machine/m_at_socket7.c +++ b/src/machine/m_at_socket7.c @@ -46,17 +46,16 @@ #include <86box/nvr.h> #include <86box/scsi_ncr53c8xx.h> - int machine_at_acerv35n_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/acerv35n/v35nd1s1.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -78,17 +77,16 @@ machine_at_acerv35n_init(const machine_t *model) return ret; } - int machine_at_ap5vm_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ap5vm/AP5V270.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -113,17 +111,16 @@ machine_at_ap5vm_init(const machine_t *model) return ret; } - int machine_at_p55t2p4_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p55t2p4/0207_j2.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -143,17 +140,16 @@ machine_at_p55t2p4_init(const machine_t *model) return ret; } - int machine_at_m7shi_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/m7shi/m7shi2n.rom", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -173,21 +169,20 @@ machine_at_m7shi_init(const machine_t *model) return ret; } - int machine_at_tc430hx_init(const machine_t *model) { int ret; ret = bios_load_linear_combined2("roms/machines/tc430hx/1007DH0_.BIO", - "roms/machines/tc430hx/1007DH0_.BI1", - "roms/machines/tc430hx/1007DH0_.BI2", - "roms/machines/tc430hx/1007DH0_.BI3", - "roms/machines/tc430hx/1007DH0_.RCV", - 0x3a000, 128); + "roms/machines/tc430hx/1007DH0_.BI1", + "roms/machines/tc430hx/1007DH0_.BI2", + "roms/machines/tc430hx/1007DH0_.BI3", + "roms/machines/tc430hx/1007DH0_.RCV", + 0x3a000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -208,7 +203,6 @@ machine_at_tc430hx_init(const machine_t *model) return ret; } - /* Information about that machine on machine.h */ int machine_at_equium5200_init(const machine_t *model) @@ -216,14 +210,14 @@ machine_at_equium5200_init(const machine_t *model) int ret; ret = bios_load_linear_combined2("roms/machines/equium5200/1003DK08.BIO", - "roms/machines/equium5200/1003DK08.BI1", - "roms/machines/equium5200/1003DK08.BI2", - "roms/machines/equium5200/1003DK08.BI3", - "roms/machines/equium5200/1003DK08.RCV", - 0x3a000, 128); + "roms/machines/equium5200/1003DK08.BI1", + "roms/machines/equium5200/1003DK08.BI2", + "roms/machines/equium5200/1003DK08.BI3", + "roms/machines/equium5200/1003DK08.RCV", + 0x3a000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -244,21 +238,20 @@ machine_at_equium5200_init(const machine_t *model) return ret; } - int machine_at_pcv90_init(const machine_t *model) { int ret; ret = bios_load_linear_combined2("roms/machines/pcv90/1010DD04.BIO", - "roms/machines/pcv90/1010DD04.BI1", - "roms/machines/pcv90/1010DD04.BI2", - "roms/machines/pcv90/1010DD04.BI3", - "roms/machines/pcv90/1010DD04.RCV", - 0x3a000, 128); + "roms/machines/pcv90/1010DD04.BI1", + "roms/machines/pcv90/1010DD04.BI2", + "roms/machines/pcv90/1010DD04.BI3", + "roms/machines/pcv90/1010DD04.RCV", + 0x3a000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -279,34 +272,32 @@ machine_at_pcv90_init(const machine_t *model) return ret; } - int machine_at_p65up5_cp55t2d_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p65up5/TD5I0201.AWD", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_p65up5_common_init(model, &i430hx_device); return ret; } - int machine_at_p55tvp4_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p55tvp4/0204_128.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -319,24 +310,23 @@ machine_at_p55tvp4_init(const machine_t *model) pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); device_add(&i430vx_device); device_add(&piix3_device); - device_add(&keyboard_ps2_ami_pci_device); //It uses the AMIKEY KBC + device_add(&keyboard_ps2_ami_pci_device); // It uses the AMIKEY KBC device_add(&w83877f_device); device_add(&intel_flash_bxt_device); return ret; } - int machine_at_5ivg_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/5ivg/5IVG.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -355,24 +345,23 @@ machine_at_5ivg_init(const machine_t *model) return ret; } - int machine_at_8500tvxa_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/8500tvxa/tvx0619b.rom", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); - pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4); pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 2, 1); pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 3, 2, 1); @@ -385,17 +374,16 @@ machine_at_8500tvxa_init(const machine_t *model) return ret; } - int machine_at_presario2240_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/presario2240/B0184008.ROM", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -406,7 +394,7 @@ machine_at_presario2240_init(const machine_t *model) pci_register_slot(0x13, PCI_CARD_NORMAL, 1, 2, 3, 4); if (gfxcard == VID_INTERNAL) - device_add(&s3_trio64v2_dx_onboard_pci_device); + device_add(&s3_trio64v2_dx_onboard_pci_device); device_add(&i430vx_device); device_add(&piix3_device); @@ -417,17 +405,16 @@ machine_at_presario2240_init(const machine_t *model) return ret; } - int machine_at_presario4500_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/presario4500/B013300I.ROM", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -438,7 +425,7 @@ machine_at_presario4500_init(const machine_t *model) pci_register_slot(0x13, PCI_CARD_NORMAL, 1, 2, 3, 4); if (gfxcard == VID_INTERNAL) - device_add(&s3_trio64v2_dx_onboard_pci_device); + device_add(&s3_trio64v2_dx_onboard_pci_device); device_add(&i430vx_device); device_add(&piix3_device); @@ -449,17 +436,16 @@ machine_at_presario4500_init(const machine_t *model) return ret; } - int machine_at_p55va_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p55va/va021297.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -479,17 +465,16 @@ machine_at_p55va_init(const machine_t *model) return ret; } - int machine_at_brio80xx_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/brio80xx/Hf0705.rom", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -509,21 +494,20 @@ machine_at_brio80xx_init(const machine_t *model) return ret; } - int machine_at_pb680_init(const machine_t *model) { int ret; ret = bios_load_linear_combined2("roms/machines/pb680/1012DN0R.BIO", - "roms/machines/pb680/1012DN0R.BI1", - "roms/machines/pb680/1012DN0R.BI2", - "roms/machines/pb680/1012DN0R.BI3", - "roms/machines/pb680/1012DN0R.RCV", - 0x3a000, 128); + "roms/machines/pb680/1012DN0R.BI1", + "roms/machines/pb680/1012DN0R.BI2", + "roms/machines/pb680/1012DN0R.BI3", + "roms/machines/pb680/1012DN0R.RCV", + 0x3a000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -543,17 +527,16 @@ machine_at_pb680_init(const machine_t *model) return ret; } - int machine_at_mb520n_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/mb520n/520n503s.rom", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -573,17 +556,16 @@ machine_at_mb520n_init(const machine_t *model) return ret; } - int machine_at_i430vx_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/430vx/55XWUQ0E.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -603,17 +585,16 @@ machine_at_i430vx_init(const machine_t *model) return ret; } - int machine_at_nupro592_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/nupro592/np590b10.bin", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -625,33 +606,32 @@ machine_at_nupro592_init(const machine_t *model) pci_register_slot(0x14, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x0B, PCI_CARD_NORMAL, 3, 4, 1, 2); /*Strongly suspect these are on-board slots*/ pci_register_slot(0x0C, PCI_CARD_NORMAL, 4, 1, 2, 3); - pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 4); /* PIIX4 */ + pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 4); /* PIIX4 */ device_add(&i430tx_device); device_add(&piix4_device); device_add(&keyboard_ps2_ami_pci_device); device_add(&w83977ef_device); device_add(&intel_flash_bxt_device); spd_register(SPD_TYPE_SDRAM, 0x3, 128); - device_add(&w83781d_device); /* fans: CPU1, unused, unused; temperatures: System, CPU1, unused */ + device_add(&w83781d_device); /* fans: CPU1, unused, unused; temperatures: System, CPU1, unused */ hwm_values.temperatures[2] = 0; /* unused */ - hwm_values.fans[1] = 0; /* unused */ - hwm_values.fans[2] = 0; /* unused */ + hwm_values.fans[1] = 0; /* unused */ + hwm_values.fans[2] = 0; /* unused */ /* -5V is not reported by the BIOS, but leave it set */ return ret; } - int machine_at_tx97_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/tx97/0112.001", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -661,7 +641,7 @@ machine_at_tx97_init(const machine_t *model) pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2); pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3); - pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); /* PIIX4 */ + pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); /* PIIX4 */ pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4); pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4); device_add(&i430tx_device); @@ -670,48 +650,47 @@ machine_at_tx97_init(const machine_t *model) device_add(&w83877tf_acorp_device); device_add(&intel_flash_bxt_device); spd_register(SPD_TYPE_SDRAM, 0x3, 128); - device_add(&w83781d_device); /* fans: Chassis, CPU, Power; temperatures: MB, unused, CPU */ + device_add(&w83781d_device); /* fans: Chassis, CPU, Power; temperatures: MB, unused, CPU */ hwm_values.temperatures[1] = 0; /* unused */ /* CPU offset */ if (hwm_values.temperatures[2] < 32) /* prevent underflow */ - hwm_values.temperatures[2] = 0; + hwm_values.temperatures[2] = 0; else - hwm_values.temperatures[2] -= 32; + hwm_values.temperatures[2] -= 32; return ret; } - #if defined(DEV_BRANCH) && defined(USE_AN430TX) int machine_at_an430tx_init(const machine_t *model) { int ret; -#if 1 +# if 1 ret = bios_load_linear_combined2("roms/machines/an430tx/P10-0095.BIO", - "roms/machines/an430tx/P10-0095.BI1", - "roms/machines/an430tx/P10-0095.BI2", - "roms/machines/an430tx/P10-0095.BI3", - "roms/machines/an430tx/P10-0095.RCV", - 0x3a000, 160); -#else + "roms/machines/an430tx/P10-0095.BI1", + "roms/machines/an430tx/P10-0095.BI2", + "roms/machines/an430tx/P10-0095.BI3", + "roms/machines/an430tx/P10-0095.RCV", + 0x3a000, 160); +# else ret = bios_load_linear_combined2("roms/machines/an430tx/P06-0062.BIO", - "roms/machines/an430tx/P06-0062.BI1", - "roms/machines/an430tx/P06-0062.BI2", - "roms/machines/an430tx/P06-0062.BI3", - "roms/machines/an430tx/P10-0095.RCV", - 0x3a000, 160); -#endif + "roms/machines/an430tx/P06-0062.BI1", + "roms/machines/an430tx/P06-0062.BI2", + "roms/machines/an430tx/P06-0062.BI3", + "roms/machines/an430tx/P10-0095.RCV", + 0x3a000, 160); +# endif if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); - pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); /* PIIX4 */ + pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); /* PIIX4 */ // pci_register_slot(0x08, PCI_CARD_VIDEO, 4, 0, 0, 0); pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4); pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 3, 4, 1); @@ -728,17 +707,16 @@ machine_at_an430tx_init(const machine_t *model) } #endif - int machine_at_ym430tx_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ym430tx/YM430TX.003", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -748,7 +726,7 @@ machine_at_ym430tx_init(const machine_t *model) pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2); pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3); - pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); /* PIIX4 */ + pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); /* PIIX4 */ pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4); pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4); device_add(&i430tx_device); @@ -761,17 +739,16 @@ machine_at_ym430tx_init(const machine_t *model) return ret; } - int machine_at_mb540n_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/mb540n/Tx0720ug.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -781,7 +758,7 @@ machine_at_mb540n_init(const machine_t *model) pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2); pci_register_slot(0x13, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x14, PCI_CARD_NORMAL, 1, 2, 3, 4); - pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); /* PIIX4 */ + pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); /* PIIX4 */ device_add(&i430tx_device); device_add(&piix4_device); device_add(&keyboard_ps2_pci_device); @@ -793,15 +770,15 @@ machine_at_mb540n_init(const machine_t *model) } int -machine_at_56a5_init(const machine_t* model) +machine_at_56a5_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/56a5/54p5b6b.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -811,7 +788,7 @@ machine_at_56a5_init(const machine_t* model) pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2); pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3); - pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); /* PIIX4 */ + pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); /* PIIX4 */ pci_register_slot(0x10, PCI_CARD_NORMAL, 1, 2, 3, 4); device_add(&i430tx_device); device_add(&piix4_device); @@ -829,16 +806,16 @@ machine_at_p5mms98_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/p5mms98/s981182.rom", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); - pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); /* PIIX4 */ + pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); /* PIIX4 */ pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4); pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2); @@ -849,23 +826,22 @@ machine_at_p5mms98_init(const machine_t *model) device_add(&w83977tf_device); device_add(&intel_flash_bxt_device); spd_register(SPD_TYPE_SDRAM, 0x3, 128); - device_add(&lm78_device); /* fans: Thermal, CPU, Chassis; temperature: unused */ + device_add(&lm78_device); /* fans: Thermal, CPU, Chassis; temperature: unused */ device_add(&lm75_1_4a_device); /* temperature: CPU */ return ret; } - int machine_at_ficva502_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ficva502/VA502bp.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -886,17 +862,16 @@ machine_at_ficva502_init(const machine_t *model) return ret; } - int machine_at_ficpa2012_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ficpa2012/113jb16.awd", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -919,17 +894,16 @@ machine_at_ficpa2012_init(const machine_t *model) return ret; } - int machine_at_r534f_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/r534f/r534f008.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -949,17 +923,16 @@ machine_at_r534f_init(const machine_t *model) return ret; } - int machine_at_ms5146_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ms5146/A546MS11.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -979,17 +952,16 @@ machine_at_ms5146_init(const machine_t *model) return ret; } - int machine_at_m560_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/m560/5600410s.ami", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -1004,24 +976,23 @@ machine_at_m560_init(const machine_t *model) pci_register_slot(0x05, PCI_CARD_NORMAL, 3, 4, 1, 2); pci_register_slot(0x06, PCI_CARD_NORMAL, 4, 1, 2, 3); device_add(&ali1531_device); - device_add(&ali1543_device); /* -5 */ + device_add(&ali1543_device); /* -5 */ device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x3, 256); return ret; } - int machine_at_ms5164_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ms5164/W564MS43.005", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -1038,7 +1009,7 @@ machine_at_ms5164_init(const machine_t *model) pci_register_slot(0x07, PCI_CARD_NORMAL, 1, 2, 3, 4); device_add(&ali1531_device); - device_add(&ali1543_device); /* -5 */ + device_add(&ali1543_device); /* -5 */ device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x3, 256); diff --git a/src/machine/m_at_socket7_3v.c b/src/machine/m_at_socket7_3v.c index c63d02347..21550ce89 100644 --- a/src/machine/m_at_socket7_3v.c +++ b/src/machine/m_at_socket7_3v.c @@ -45,7 +45,6 @@ #include <86box/fdc.h> #include <86box/nvr.h> - static void machine_at_thor_common_init(const machine_t *model, int mr) { @@ -61,7 +60,7 @@ machine_at_thor_common_init(const machine_t *model, int mr) pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); if (gfxcard == VID_INTERNAL) - device_add(&s3_phoenix_trio64vplus_onboard_pci_device); + device_add(&s3_phoenix_trio64vplus_onboard_pci_device); // device_add(&keyboard_ps2_ami_pci_device); device_add(&keyboard_ps2_intel_ami_pci_device); @@ -71,7 +70,6 @@ machine_at_thor_common_init(const machine_t *model, int mr) device_add(&intel_flash_bxt_ami_device); } - static void machine_at_p54tp4xe_common_init(const machine_t *model) { @@ -91,68 +89,64 @@ machine_at_p54tp4xe_common_init(const machine_t *model) device_add(&intel_flash_bxt_device); } - int machine_at_p54tp4xe_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p54tp4xe/t15i0302.awd", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_p54tp4xe_common_init(model); return ret; } - int machine_at_p54tp4xe_mr_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p54tp4xe/TRITON.BIO", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_p54tp4xe_common_init(model); return ret; } - int machine_at_gw2katx_init(const machine_t *model) { int ret; ret = bios_load_linear_combined("roms/machines/gw2katx/1003CN0T.BIO", - "roms/machines/gw2katx/1003CN0T.BI1", 0x20000, 128); + "roms/machines/gw2katx/1003CN0T.BI1", 0x20000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_thor_common_init(model, 0); return ret; } - int machine_at_thor_init(const machine_t *model) { int ret; ret = bios_load_linear_combined("roms/machines/thor/1006cn0_.bio", - "roms/machines/thor/1006cn0_.bi1", 0x20000, 128); + "roms/machines/thor/1006cn0_.bi1", 0x20000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_thor_common_init(model, 0); @@ -165,27 +159,26 @@ machine_at_mrthor_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/mrthor/mr_atx.bio", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_thor_common_init(model, 1); return ret; } - int machine_at_endeavor_init(const machine_t *model) { int ret; ret = bios_load_linear_combined("roms/machines/endeavor/1006cb0_.bio", - "roms/machines/endeavor/1006cb0_.bi1", 0x1d000, 128); + "roms/machines/endeavor/1006cb0_.bi1", 0x1d000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -199,7 +192,7 @@ machine_at_endeavor_init(const machine_t *model) pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); if (gfxcard == VID_INTERNAL) - device_add(&s3_phoenix_trio64_onboard_pci_device); + device_add(&s3_phoenix_trio64_onboard_pci_device); device_add(&keyboard_ps2_intel_ami_pci_device); device_add(&i430fx_device); @@ -216,10 +209,10 @@ machine_at_ms5119_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/ms5119/A37E.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -239,17 +232,16 @@ machine_at_ms5119_init(const machine_t *model) return ret; } - int machine_at_pb640_init(const machine_t *model) { int ret; ret = bios_load_linear_combined("roms/machines/pb640/1007CP0R.BIO", - "roms/machines/pb640/1007CP0R.BI1", 0x1d000, 128); + "roms/machines/pb640/1007CP0R.BI1", 0x1d000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -264,7 +256,7 @@ machine_at_pb640_init(const machine_t *model) device_add(&piix_rev02_device); if (gfxcard == VID_INTERNAL) - device_add(&gd5440_onboard_pci_device); + device_add(&gd5440_onboard_pci_device); device_add(&keyboard_ps2_intel_ami_pci_device); device_add(&pc87306_device); @@ -279,10 +271,10 @@ machine_at_fmb_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/fmb/P5IV183.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -303,17 +295,16 @@ machine_at_fmb_init(const machine_t *model) return ret; } - int machine_at_acerm3a_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/acerm3a/r01-b3.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -335,17 +326,16 @@ machine_at_acerm3a_init(const machine_t *model) return ret; } - int machine_at_ap53_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ap53/ap53r2c0.rom", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -366,17 +356,16 @@ machine_at_ap53_init(const machine_t *model) return ret; } - int machine_at_8500tuc_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/8500tuc/Tuc0221b.rom", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -396,17 +385,16 @@ machine_at_8500tuc_init(const machine_t *model) return ret; } - int machine_at_p55t2s_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p55t2s/s6y08t.rom", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -426,17 +414,16 @@ machine_at_p55t2s_init(const machine_t *model) return ret; } - int machine_at_p5vxb_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p5vxb/P5VXB10.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -456,21 +443,20 @@ machine_at_p5vxb_init(const machine_t *model) return ret; } - int machine_at_gw2kte_init(const machine_t *model) { int ret; ret = bios_load_linear_combined2("roms/machines/gw2kte/1008CY1T.BIO", - "roms/machines/gw2kte/1008CY1T.BI1", - "roms/machines/gw2kte/1008CY1T.BI2", - "roms/machines/gw2kte/1008CY1T.BI3", - "roms/machines/gw2kte/1008CY1T.RCV", - 0x3a000, 128); + "roms/machines/gw2kte/1008CY1T.BI1", + "roms/machines/gw2kte/1008CY1T.BI2", + "roms/machines/gw2kte/1008CY1T.BI3", + "roms/machines/gw2kte/1008CY1T.RCV", + 0x3a000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -491,17 +477,16 @@ machine_at_gw2kte_init(const machine_t *model) return ret; } - int machine_at_ap5s_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ap5s/AP5S150.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -521,17 +506,16 @@ machine_at_ap5s_init(const machine_t *model) return ret; } - int machine_at_vectra54_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/vectra54/GT0724.22", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -544,7 +528,7 @@ machine_at_vectra54_init(const machine_t *model) pci_register_slot(0x08, PCI_CARD_NORMAL, 3, 4, 1, 2); if (gfxcard == VID_INTERNAL) - device_add(&s3_phoenix_trio64_onboard_pci_device); + device_add(&s3_phoenix_trio64_onboard_pci_device); device_add(&keyboard_ps2_ami_pci_device); device_add(&i430fx_device); diff --git a/src/machine/m_at_socket8.c b/src/machine/m_at_socket8.c index 00545eff9..1a1618dc0 100644 --- a/src/machine/m_at_socket8.c +++ b/src/machine/m_at_socket8.c @@ -39,17 +39,16 @@ #include "cpu.h" #include <86box/machine.h> - int machine_at_p6rp4_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p6rp4/OR6I0106.SMC", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); device_add(&p6rp4_nvr_device); @@ -74,17 +73,16 @@ machine_at_p6rp4_init(const machine_t *model) return ret; } - int machine_at_686nx_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/686nx/6nx.140", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -97,24 +95,23 @@ machine_at_686nx_init(const machine_t *model) pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3); device_add(&i440fx_device); device_add(&piix3_device); - device_add(&keyboard_ps2_ami_pci_device); //Uses the AMIKEY keyboard controller + device_add(&keyboard_ps2_ami_pci_device); // Uses the AMIKEY keyboard controller device_add(&um8669f_device); device_add(&intel_flash_bxt_device); return ret; } - int machine_at_mb600n_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/mb600n/60915cs.rom", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -140,10 +137,10 @@ machine_at_acerv60n_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/acerv60n/V60NE5.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -170,14 +167,14 @@ machine_at_vs440fx_init(const machine_t *model) int ret; ret = bios_load_linear_combined2("roms/machines/vs440fx/1018CS1_.BIO", - "roms/machines/vs440fx/1018CS1_.BI1", - "roms/machines/vs440fx/1018CS1_.BI2", - "roms/machines/vs440fx/1018CS1_.BI3", - "roms/machines/vs440fx/1018CS1_.RCV", - 0x3a000, 128); + "roms/machines/vs440fx/1018CS1_.BI1", + "roms/machines/vs440fx/1018CS1_.BI2", + "roms/machines/vs440fx/1018CS1_.BI3", + "roms/machines/vs440fx/1018CS1_.RCV", + 0x3a000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -204,14 +201,14 @@ machine_at_ap440fx_init(const machine_t *model) int ret; ret = bios_load_linear_combined2("roms/machines/ap440fx/1011CT1_.BIO", - "roms/machines/ap440fx/1011CT1_.BI1", - "roms/machines/ap440fx/1011CT1_.BI2", - "roms/machines/ap440fx/1011CT1_.BI3", - "roms/machines/ap440fx/1011CT1_.RCV", - 0x3a000, 128); + "roms/machines/ap440fx/1011CT1_.BI1", + "roms/machines/ap440fx/1011CT1_.BI2", + "roms/machines/ap440fx/1011CT1_.BI3", + "roms/machines/ap440fx/1011CT1_.RCV", + 0x3a000, 128); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -237,10 +234,10 @@ machine_at_8600ttc_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/8600ttc/TTC0715B.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -266,10 +263,10 @@ machine_at_m6mi_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/m6mi/M6MI05.ROM", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init(model); @@ -316,10 +313,10 @@ machine_at_p65up5_cp6nd_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/p65up5/ND6I0218.AWD", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_p65up5_common_init(model, &i440fx_device); diff --git a/src/machine/m_at_sockets7.c b/src/machine/m_at_sockets7.c index a32bf3883..1dbba3715 100644 --- a/src/machine/m_at_sockets7.c +++ b/src/machine/m_at_sockets7.c @@ -44,17 +44,16 @@ #include <86box/snd_ac97.h> #include <86box/clock.h> - int machine_at_p5a_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/p5a/1011.005", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -72,7 +71,7 @@ machine_at_p5a_init(const machine_t *model) pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3); pci_register_slot(0x06, PCI_CARD_NORMAL, 3, 4, 1, 2); device_add(&ali1541_device); - device_add(&ali1543c_device); /* +0 */ + device_add(&ali1543c_device); /* +0 */ device_add(&sst_flash_39sf020_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); device_add(&w83781d_p5a_device); /* fans: Chassis, CPU, Power; temperatures: MB, unused, CPU */ @@ -80,17 +79,16 @@ machine_at_p5a_init(const machine_t *model) return ret; } - int machine_at_m579_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/m579/MS6260S_Socket7_ALi_M1542_AMI.BIN", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -105,24 +103,23 @@ machine_at_m579_init(const machine_t *model) pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x14, PCI_CARD_NORMAL, 1, 2, 3, 4); device_add(&ali1541_device); - device_add(&ali1543c_device); /* +0 */ + device_add(&ali1543c_device); /* +0 */ device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); return ret; } - int machine_at_5aa_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/5aa/GA-5AA.F7b", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -137,24 +134,23 @@ machine_at_5aa_init(const machine_t *model) pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2); device_add(&ali1541_device); - device_add(&ali1543c_device); /* +0 */ + device_add(&ali1543c_device); /* +0 */ device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); return ret; } - int machine_at_5ax_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/5ax/5AX.F4", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -171,24 +167,23 @@ machine_at_5ax_init(const machine_t *model) pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3); pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); device_add(&ali1541_device); - device_add(&ali1543c_device); /* +0 */ + device_add(&ali1543c_device); /* +0 */ device_add(&sst_flash_29ee010_device); spd_register(SPD_TYPE_SDRAM, 0x7, 512); return ret; } - int machine_at_ax59pro_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ax59pro/AX59P236.BIN", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -211,17 +206,16 @@ machine_at_ax59pro_init(const machine_t *model) return ret; } - int machine_at_mvp3_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ficva503p/je4333.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -243,17 +237,16 @@ machine_at_mvp3_init(const machine_t *model) return ret; } - int machine_at_ficva503a_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ficva503a/jn4116.bin", - 0x000c0000, 262144, 0); + 0x000c0000, 262144, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -273,25 +266,24 @@ machine_at_ficva503a_init(const machine_t *model) spd_register(SPD_TYPE_SDRAM, 0x7, 256); hwm_values.temperatures[0] += 2; /* CPU offset */ hwm_values.temperatures[1] += 2; /* System offset */ - hwm_values.temperatures[2] = 0; /* unused */ + hwm_values.temperatures[2] = 0; /* unused */ if (sound_card_current == SOUND_INTERNAL) - device_add(&wm9701a_device); /* on daughtercard */ + device_add(&wm9701a_device); /* on daughtercard */ return ret; } - int machine_at_5emapro_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/5emapro/5emo1aa2.bin", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_at_common_init_ex(model, 2); @@ -311,9 +303,9 @@ machine_at_5emapro_init(const machine_t *model) device_add(&sst_flash_39sf010_device); spd_register(SPD_TYPE_SDRAM, 0x7, 256); device_add(&via_vt82c686_hwm_device); /* fans: CPU1, Chassis; temperatures: CPU, System, unused */ - hwm_values.temperatures[0] += 2; /* CPU offset */ - hwm_values.temperatures[1] += 2; /* System offset */ - hwm_values.temperatures[2] = 0; /* unused */ + hwm_values.temperatures[0] += 2; /* CPU offset */ + hwm_values.temperatures[1] += 2; /* System offset */ + hwm_values.temperatures[2] = 0; /* unused */ return ret; } diff --git a/src/machine/m_at_t3100e.c b/src/machine/m_at_t3100e.c index afeea0a57..4757ea99a 100644 --- a/src/machine/m_at_t3100e.c +++ b/src/machine/m_at_t3100e.c @@ -167,643 +167,663 @@ #include <86box/machine.h> #include <86box/m_at_t3100e.h> - -extern uint8_t *ram; /* Physical RAM */ +extern uint8_t *ram; /* Physical RAM */ void at_init(); - /* The T3100e motherboard can (and does) dynamically reassign RAM between * conventional, XMS and EMS. This translates to monkeying with the mappings. */ extern mem_mapping_t base_mapping; -extern mem_mapping_t ram_low_mapping; /* This is to switch conventional RAM - * between 512k and 640k */ +extern mem_mapping_t ram_low_mapping; /* This is to switch conventional RAM + * between 512k and 640k */ -extern mem_mapping_t ram_mid_mapping; /* This will not be used */ +extern mem_mapping_t ram_mid_mapping; /* This will not be used */ -extern mem_mapping_t ram_high_mapping; /* This is RAM beyond 1Mb if any */ +extern mem_mapping_t ram_high_mapping; /* This is RAM beyond 1Mb if any */ extern uint8_t *ram; -static unsigned t3100e_ems_page_reg[] = -{ - 0x208, 0x4208, 0x8208, 0xc208, /* The first four map the first 2Mb */ - /* of RAM into the page frame */ - 0x218, 0x4218, 0x8218, 0xc218, /* The next four map the next 2Mb */ - /* of RAM */ - 0x258, 0x4258, 0x8258, 0xc258, /* and so on. */ - 0x268, 0x4268, 0x8268, 0xc268, +static unsigned t3100e_ems_page_reg[] = { + 0x208, + 0x4208, + 0x8208, + 0xc208, /* The first four map the first 2Mb */ + /* of RAM into the page frame */ + 0x218, + 0x4218, + 0x8218, + 0xc218, /* The next four map the next 2Mb */ + /* of RAM */ + 0x258, + 0x4258, + 0x8258, + 0xc258, /* and so on. */ + 0x268, + 0x4268, + 0x8268, + 0xc268, }; -struct t3100e_ems_regs -{ - uint8_t page[16]; - mem_mapping_t mapping[4]; - uint32_t page_exec[4]; /* Physical location of memory pages */ - uint32_t upper_base; /* Start of upper RAM */ - uint8_t upper_pages; /* Pages of EMS available from upper RAM */ - uint8_t upper_is_ems; /* Upper RAM is EMS? */ - mem_mapping_t upper_mapping; - uint8_t notify; /* Notification from keyboard controller */ - uint8_t turbo; /* 0 for 6MHz, else full speed */ - uint8_t mono; /* Emulates PC/AT 'mono' motherboard switch */ - /* Bit 0 is 0 for colour, 1 for mono */ +struct t3100e_ems_regs { + uint8_t page[16]; + mem_mapping_t mapping[4]; + uint32_t page_exec[4]; /* Physical location of memory pages */ + uint32_t upper_base; /* Start of upper RAM */ + uint8_t upper_pages; /* Pages of EMS available from upper RAM */ + uint8_t upper_is_ems; /* Upper RAM is EMS? */ + mem_mapping_t upper_mapping; + uint8_t notify; /* Notification from keyboard controller */ + uint8_t turbo; /* 0 for 6MHz, else full speed */ + uint8_t mono; /* Emulates PC/AT 'mono' motherboard switch */ + /* Bit 0 is 0 for colour, 1 for mono */ } t3100e_ems; void t3100e_ems_out(uint16_t addr, uint8_t val, void *p); - #ifdef ENABLE_T3100E_LOG int t3100e_do_log = ENABLE_T3100E_LOG; - static void t3100e_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (t3100e_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (t3100e_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define t3100e_log(fmt, ...) +# define t3100e_log(fmt, ...) #endif - /* Given a memory address (which ought to be in the page frame at 0xD0000), * which page does it relate to? */ -static int addr_to_page(uint32_t addr) +static int +addr_to_page(uint32_t addr) { - if ((addr & 0xF0000) == 0xD0000) - { - return ((addr >> 14) & 3); - } - return -1; + if ((addr & 0xF0000) == 0xD0000) { + return ((addr >> 14) & 3); + } + return -1; } /* And vice versa: Given a page slot, which memory address does it * correspond to? */ -static uint32_t page_to_addr(int pg) +static uint32_t +page_to_addr(int pg) { - return 0xD0000 + ((pg & 3) * 16384); + return 0xD0000 + ((pg & 3) * 16384); } /* Given an EMS page ID, return its physical address in RAM. */ -uint32_t t3100e_ems_execaddr(struct t3100e_ems_regs *regs, - int pg, uint16_t val) +uint32_t +t3100e_ems_execaddr(struct t3100e_ems_regs *regs, + int pg, uint16_t val) { - uint32_t addr; + uint32_t addr; - if (!(val & 0x80)) return 0; /* Bit 7 reset => not mapped */ + if (!(val & 0x80)) + return 0; /* Bit 7 reset => not mapped */ - val &= 0x7F; - val += (0x80 * (pg >> 2)); /* The high bits of the register bank */ - /* are used to extend val to allow up */ - /* to 8Mb of EMS to be accessed */ + val &= 0x7F; + val += (0x80 * (pg >> 2)); /* The high bits of the register bank */ + /* are used to extend val to allow up */ + /* to 8Mb of EMS to be accessed */ - /* Is it in the upper memory range? */ - if (regs->upper_is_ems) - { - if (val < regs->upper_pages) - { - addr = regs->upper_base + 0x4000 * val; - return addr; - } - val -= regs->upper_pages; - } - /* Otherwise work down from the top of high RAM (so, the more EMS, - * the less XMS) */ - if ((val * 0x4000) + 0x100000 >= (mem_size * 1024)) - { - return 0; /* Not enough high RAM for this page */ - } - /* High RAM found */ - addr = (mem_size * 1024) - 0x4000 * (val + 1); + /* Is it in the upper memory range? */ + if (regs->upper_is_ems) { + if (val < regs->upper_pages) { + addr = regs->upper_base + 0x4000 * val; + return addr; + } + val -= regs->upper_pages; + } + /* Otherwise work down from the top of high RAM (so, the more EMS, + * the less XMS) */ + if ((val * 0x4000) + 0x100000 >= (mem_size * 1024)) { + return 0; /* Not enough high RAM for this page */ + } + /* High RAM found */ + addr = (mem_size * 1024) - 0x4000 * (val + 1); - return addr; + return addr; } - /* The registers governing the EMS ports are in rather a nonintuitive order */ -static int port_to_page(uint16_t addr) +static int +port_to_page(uint16_t addr) { - switch (addr) - { - case 0x208: return 0; - case 0x4208: return 1; - case 0x8208: return 2; - case 0xC208: return 3; - case 0x218: return 4; - case 0x4218: return 5; - case 0x8218: return 6; - case 0xC218: return 7; - case 0x258: return 8; - case 0x4258: return 9; - case 0x8258: return 10; - case 0xC258: return 11; - case 0x268: return 12; - case 0x4268: return 13; - case 0x8268: return 14; - case 0xC268: return 15; - } - return -1; + switch (addr) { + case 0x208: + return 0; + case 0x4208: + return 1; + case 0x8208: + return 2; + case 0xC208: + return 3; + case 0x218: + return 4; + case 0x4218: + return 5; + case 0x8218: + return 6; + case 0xC218: + return 7; + case 0x258: + return 8; + case 0x4258: + return 9; + case 0x8258: + return 10; + case 0xC258: + return 11; + case 0x268: + return 12; + case 0x4268: + return 13; + case 0x8268: + return 14; + case 0xC268: + return 15; + } + return -1; } /* Used to dump the memory mapping table, for debugging void dump_mappings() { - mem_mapping_t *mm = base_mapping.next; + mem_mapping_t *mm = base_mapping.next; - if (!t3100e_log) return; - while (mm) - { - const char *name = ""; - uint32_t offset = (uint32_t)(mm->exec - ram); + if (!t3100e_log) return; + while (mm) + { + const char *name = ""; + uint32_t offset = (uint32_t)(mm->exec - ram); - if (mm == &ram_low_mapping ) name = "LOW "; - if (mm == &ram_mid_mapping ) name = "MID "; - if (mm == &ram_high_mapping) name = "HIGH"; - if (mm == &t3100e_ems.upper_mapping) name = "UPPR"; - if (mm == &t3100e_ems.mapping[0]) - { - name = "EMS0"; - offset = t3100e_ems.page_exec[0]; - } - if (mm == &t3100e_ems.mapping[1]) - { - name = "EMS1"; - offset = t3100e_ems.page_exec[1]; - } - if (mm == &t3100e_ems.mapping[2]) - { - name = "EMS2"; - offset = t3100e_ems.page_exec[2]; - } - if (mm == &t3100e_ems.mapping[3]) - { - name = "EMS3"; - offset = t3100e_ems.page_exec[3]; - } + if (mm == &ram_low_mapping ) name = "LOW "; + if (mm == &ram_mid_mapping ) name = "MID "; + if (mm == &ram_high_mapping) name = "HIGH"; + if (mm == &t3100e_ems.upper_mapping) name = "UPPR"; + if (mm == &t3100e_ems.mapping[0]) + { + name = "EMS0"; + offset = t3100e_ems.page_exec[0]; + } + if (mm == &t3100e_ems.mapping[1]) + { + name = "EMS1"; + offset = t3100e_ems.page_exec[1]; + } + if (mm == &t3100e_ems.mapping[2]) + { + name = "EMS2"; + offset = t3100e_ems.page_exec[2]; + } + if (mm == &t3100e_ems.mapping[3]) + { + name = "EMS3"; + offset = t3100e_ems.page_exec[3]; + } - t3100e_log(" %p | base=%05x size=%05x %c @ %06x %s\n", mm, - mm->base, mm->size, mm->enable ? 'Y' : 'N', - offset, name); + t3100e_log(" %p | base=%05x size=%05x %c @ %06x %s\n", mm, + mm->base, mm->size, mm->enable ? 'Y' : 'N', + offset, name); - mm = mm->next; - } + mm = mm->next; + } }*/ -void t3100e_map_ram(uint8_t val) +void +t3100e_map_ram(uint8_t val) { - int n; - int32_t upper_len; + int n; + int32_t upper_len; #ifdef ENABLE_T3100E_LOG - t3100e_log("OUT 0x8084, %02x [ set memory mapping :", val | 0x40); - if (val & 1) t3100e_log("ENABLE_EMS "); - if (val & 2) t3100e_log("ENABLE_XMS "); - if (val & 4) t3100e_log("640K "); - if (val & 8) t3100e_log("X8X "); - if (val & 16) t3100e_log("UPPER_IS_XMS "); - t3100e_log("\n"); + t3100e_log("OUT 0x8084, %02x [ set memory mapping :", val | 0x40); + if (val & 1) + t3100e_log("ENABLE_EMS "); + if (val & 2) + t3100e_log("ENABLE_XMS "); + if (val & 4) + t3100e_log("640K "); + if (val & 8) + t3100e_log("X8X "); + if (val & 16) + t3100e_log("UPPER_IS_XMS "); + t3100e_log("\n"); #endif - /* Bit 2 controls size of conventional memory */ - if (val & 4) - { - t3100e_ems.upper_base = 0xA0000; - t3100e_ems.upper_pages = 24; - } - else - { - t3100e_ems.upper_base = 0x80000; - t3100e_ems.upper_pages = 32; - } - upper_len = t3100e_ems.upper_pages * 16384; + /* Bit 2 controls size of conventional memory */ + if (val & 4) { + t3100e_ems.upper_base = 0xA0000; + t3100e_ems.upper_pages = 24; + } else { + t3100e_ems.upper_base = 0x80000; + t3100e_ems.upper_pages = 32; + } + upper_len = t3100e_ems.upper_pages * 16384; - mem_mapping_set_addr(&ram_low_mapping, 0, t3100e_ems.upper_base); - /* Bit 0 set if upper RAM is EMS */ - t3100e_ems.upper_is_ems = (val & 1); + mem_mapping_set_addr(&ram_low_mapping, 0, t3100e_ems.upper_base); + /* Bit 0 set if upper RAM is EMS */ + t3100e_ems.upper_is_ems = (val & 1); - /* Bit 1 set if high RAM is enabled */ - if (val & 2) - { - mem_mapping_enable(&ram_high_mapping); - } - else - { - mem_mapping_disable(&ram_high_mapping); - } + /* Bit 1 set if high RAM is enabled */ + if (val & 2) { + mem_mapping_enable(&ram_high_mapping); + } else { + mem_mapping_disable(&ram_high_mapping); + } - /* Bit 4 set if upper RAM is mapped to high memory - * (and bit 1 set if XMS enabled) */ - if ((val & 0x12) == 0x12) - { - mem_mapping_set_addr(&t3100e_ems.upper_mapping, - mem_size * 1024, - upper_len); - mem_mapping_enable(&t3100e_ems.upper_mapping); - mem_mapping_set_exec(&t3100e_ems.upper_mapping, ram + t3100e_ems.upper_base); - } - else - { - mem_mapping_disable(&t3100e_ems.upper_mapping); - } - /* Recalculate EMS mappings */ - for (n = 0; n < 4; n++) - { - t3100e_ems_out(t3100e_ems_page_reg[n], t3100e_ems.page[n], - &t3100e_ems); - } + /* Bit 4 set if upper RAM is mapped to high memory + * (and bit 1 set if XMS enabled) */ + if ((val & 0x12) == 0x12) { + mem_mapping_set_addr(&t3100e_ems.upper_mapping, + mem_size * 1024, + upper_len); + mem_mapping_enable(&t3100e_ems.upper_mapping); + mem_mapping_set_exec(&t3100e_ems.upper_mapping, ram + t3100e_ems.upper_base); + } else { + mem_mapping_disable(&t3100e_ems.upper_mapping); + } + /* Recalculate EMS mappings */ + for (n = 0; n < 4; n++) { + t3100e_ems_out(t3100e_ems_page_reg[n], t3100e_ems.page[n], + &t3100e_ems); + } - //dump_mappings(); + // dump_mappings(); } - -void t3100e_notify_set(uint8_t value) +void +t3100e_notify_set(uint8_t value) { - t3100e_ems.notify = value; + t3100e_ems.notify = value; } -void t3100e_mono_set(uint8_t value) +void +t3100e_mono_set(uint8_t value) { - t3100e_ems.mono = value; + t3100e_ems.mono = value; } -uint8_t t3100e_mono_get(void) +uint8_t +t3100e_mono_get(void) { - return t3100e_ems.mono; + return t3100e_ems.mono; } -void t3100e_turbo_set(uint8_t value) +void +t3100e_turbo_set(uint8_t value) { - t3100e_ems.turbo = value; - if (!value) - { - cpu_dynamic_switch(0); /* 286/6 */ - } - else - { - cpu_dynamic_switch(cpu); - } + t3100e_ems.turbo = value; + if (!value) { + cpu_dynamic_switch(0); /* 286/6 */ + } else { + cpu_dynamic_switch(cpu); + } } - - -uint8_t t3100e_sys_in(uint16_t addr, void *p) +uint8_t +t3100e_sys_in(uint16_t addr, void *p) { - struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)p; + struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *) p; - /* The low 4 bits always seem to be 0x0C. The high 4 are a - * notification sent by the keyboard controller when it detects - * an [Fn] key combination */ - t3100e_log("IN 0x8084\n"); - return 0x0C | (regs->notify << 4); + /* The low 4 bits always seem to be 0x0C. The high 4 are a + * notification sent by the keyboard controller when it detects + * an [Fn] key combination */ + t3100e_log("IN 0x8084\n"); + return 0x0C | (regs->notify << 4); } - - /* Handle writes to the T3100e system control port at 0x8084 */ -void t3100e_sys_out(uint16_t addr, uint8_t val, void *p) +void +t3100e_sys_out(uint16_t addr, uint8_t val, void *p) { -// struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)p; + // struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)p; - switch (val & 0xE0) - { - case 0x00: /* Set serial port IRQs. Not implemented */ - t3100e_log("OUT 0x8084, %02x [ set serial port IRQs]\n", val); - break; - case 0x40: /* Set RAM mappings. */ - t3100e_map_ram(val & 0x1F); - break; + switch (val & 0xE0) { + case 0x00: /* Set serial port IRQs. Not implemented */ + t3100e_log("OUT 0x8084, %02x [ set serial port IRQs]\n", val); + break; + case 0x40: /* Set RAM mappings. */ + t3100e_map_ram(val & 0x1F); + break; - case 0x80: /* Set video options. */ - t3100e_video_options_set(val & 0x1F); break; + case 0x80: /* Set video options. */ + t3100e_video_options_set(val & 0x1F); + break; - /* Other options not implemented. */ - default: t3100e_log("OUT 0x8084, %02x\n", val); break; - } + /* Other options not implemented. */ + default: + t3100e_log("OUT 0x8084, %02x\n", val); + break; + } } - -uint8_t t3100e_config_get(void) +uint8_t +t3100e_config_get(void) { -/* The byte returned: - Bit 7: Set if internal plasma display enabled - Bit 6: Set if running at 6MHz, clear at full speed - Bit 5: Always 1? - Bit 4: Set if the FD2MB jumper is present (internal floppy is ?tri-mode) - Bit 3: Clear if the FD2 jumper is present (two internal floppies) - Bit 2: Set if the internal drive is A:, clear if B: - Bit 1: Set if the parallel port is configured as a floppy connector - for the second drive. - Bit 0: Set if the F2HD jumper is present (internal floppy is 720k) - */ - uint8_t value = 0x28; /* Start with bits 5 and 3 set. */ + /* The byte returned: + Bit 7: Set if internal plasma display enabled + Bit 6: Set if running at 6MHz, clear at full speed + Bit 5: Always 1? + Bit 4: Set if the FD2MB jumper is present (internal floppy is ?tri-mode) + Bit 3: Clear if the FD2 jumper is present (two internal floppies) + Bit 2: Set if the internal drive is A:, clear if B: + Bit 1: Set if the parallel port is configured as a floppy connector + for the second drive. + Bit 0: Set if the F2HD jumper is present (internal floppy is 720k) + */ + uint8_t value = 0x28; /* Start with bits 5 and 3 set. */ - int type_a = fdd_get_type(0); - int type_b = fdd_get_type(1); - int prt_switch; /* External drive type: 0=> none, 1=>A, 2=>B */ + int type_a = fdd_get_type(0); + int type_b = fdd_get_type(1); + int prt_switch; /* External drive type: 0=> none, 1=>A, 2=>B */ -/* Get display setting */ - if (t3100e_display_get()) value |= 0x80; - if (!t3100e_ems.turbo) value |= 0x40; + /* Get display setting */ + if (t3100e_display_get()) + value |= 0x80; + if (!t3100e_ems.turbo) + value |= 0x40; -/* Try to determine the floppy types.*/ + /* Try to determine the floppy types.*/ - prt_switch = (type_b ? 2 : 0); - switch(type_a) - { -/* Since a T3100e cannot have an internal 5.25" drive, mark 5.25" A: drive as - * being external, and set the internal type based on type_b. */ - case 1: /* 360k */ - case 2: /* 1.2Mb */ - case 3: /* 1.2Mb RPMx2*/ - prt_switch = 1; /* External drive is A: */ - switch (type_b) - { - case 1: /* 360k */ - case 4: value |= 1; break; /* 720k */ - case 6: value |= 0x10; break; /* Tri-mode */ - /* All others will be treated as 1.4M */ - } - break; - case 4: value |= 0x01; /* 720k */ - if (type_a == type_b) - { - value &= (~8); /* Two internal drives */ - prt_switch = 0; /* No external drive */ - } - break; - case 5: /* 1.4M */ - case 7: /* 2.8M */ - if (type_a == type_b) - { - value &= (~8); /* Two internal drives */ - prt_switch = 0; /* No external drive */ - } - break; - case 6: /* 3-mode */ - value |= 0x10; - if (type_a == type_b) - { - value &= (~8); /* Two internal drives */ - prt_switch = 0; /* No external drive */ - } - break; - } /* End switch */ - switch (prt_switch) - { - case 0: value |= 4; break; /* No external floppy */ - case 1: value |= 2; break; /* External floppy is A: */ - case 2: value |= 6; break; /* External floppy is B: */ - } - return value; + prt_switch = (type_b ? 2 : 0); + switch (type_a) { + /* Since a T3100e cannot have an internal 5.25" drive, mark 5.25" A: drive as + * being external, and set the internal type based on type_b. */ + case 1: /* 360k */ + case 2: /* 1.2Mb */ + case 3: /* 1.2Mb RPMx2*/ + prt_switch = 1; /* External drive is A: */ + switch (type_b) { + case 1: /* 360k */ + case 4: + value |= 1; + break; /* 720k */ + case 6: + value |= 0x10; + break; /* Tri-mode */ + /* All others will be treated as 1.4M */ + } + break; + case 4: + value |= 0x01; /* 720k */ + if (type_a == type_b) { + value &= (~8); /* Two internal drives */ + prt_switch = 0; /* No external drive */ + } + break; + case 5: /* 1.4M */ + case 7: /* 2.8M */ + if (type_a == type_b) { + value &= (~8); /* Two internal drives */ + prt_switch = 0; /* No external drive */ + } + break; + case 6: /* 3-mode */ + value |= 0x10; + if (type_a == type_b) { + value &= (~8); /* Two internal drives */ + prt_switch = 0; /* No external drive */ + } + break; + } /* End switch */ + switch (prt_switch) { + case 0: + value |= 4; + break; /* No external floppy */ + case 1: + value |= 2; + break; /* External floppy is A: */ + case 2: + value |= 6; + break; /* External floppy is B: */ + } + return value; } - /* Read EMS page register */ -uint8_t t3100e_ems_in(uint16_t addr, void *p) +uint8_t +t3100e_ems_in(uint16_t addr, void *p) { - struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)p; + struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *) p; - int page = port_to_page(addr); - if (page >= 0) - return regs->page[page]; - else { - fatal("t3100e_ems_in(): invalid address"); - return 0xff; - } + int page = port_to_page(addr); + if (page >= 0) + return regs->page[page]; + else { + fatal("t3100e_ems_in(): invalid address"); + return 0xff; + } } /* Write EMS page register */ -void t3100e_ems_out(uint16_t addr, uint8_t val, void *p) +void +t3100e_ems_out(uint16_t addr, uint8_t val, void *p) { - struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)p; - int pg = port_to_page(addr); + struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *) p; + int pg = port_to_page(addr); - if (pg == -1) - return; + if (pg == -1) + return; - regs->page_exec[pg & 3] = t3100e_ems_execaddr(regs, pg, val); - t3100e_log("EMS: page %d %02x -> %02x [%06x]\n", - pg, regs->page[pg], val, regs->page_exec[pg & 3]); - regs->page[pg] = val; + regs->page_exec[pg & 3] = t3100e_ems_execaddr(regs, pg, val); + t3100e_log("EMS: page %d %02x -> %02x [%06x]\n", + pg, regs->page[pg], val, regs->page_exec[pg & 3]); + regs->page[pg] = val; - pg &= 3; -/* Bit 7 set if page is enabled, reset if page is disabled */ - if (regs->page_exec[pg]) - { - t3100e_log("Enabling EMS RAM at %05x\n", - page_to_addr(pg)); - mem_mapping_enable(®s->mapping[pg]); - mem_mapping_set_exec(®s->mapping[pg], ram + regs->page_exec[pg]); - } - else - { - t3100e_log("Disabling EMS RAM at %05x\n", - page_to_addr(pg)); - mem_mapping_disable(®s->mapping[pg]); - } + pg &= 3; + /* Bit 7 set if page is enabled, reset if page is disabled */ + if (regs->page_exec[pg]) { + t3100e_log("Enabling EMS RAM at %05x\n", + page_to_addr(pg)); + mem_mapping_enable(®s->mapping[pg]); + mem_mapping_set_exec(®s->mapping[pg], ram + regs->page_exec[pg]); + } else { + t3100e_log("Disabling EMS RAM at %05x\n", + page_to_addr(pg)); + mem_mapping_disable(®s->mapping[pg]); + } } - /* Read RAM in the EMS page frame */ -static uint8_t ems_read_ram(uint32_t addr, void *priv) +static uint8_t +ems_read_ram(uint32_t addr, void *priv) { - struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)priv; - int pg = addr_to_page(addr); + struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *) priv; + int pg = addr_to_page(addr); - if (pg < 0) return 0xFF; - addr = regs->page_exec[pg] + (addr & 0x3FFF); - return ram[addr]; + if (pg < 0) + return 0xFF; + addr = regs->page_exec[pg] + (addr & 0x3FFF); + return ram[addr]; } - - - -static uint16_t ems_read_ramw(uint32_t addr, void *priv) +static uint16_t +ems_read_ramw(uint32_t addr, void *priv) { - struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)priv; - int pg = addr_to_page(addr); + struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *) priv; + int pg = addr_to_page(addr); - if (pg < 0) return 0xFFFF; - //t3100e_log("ems_read_ramw addr=%05x ", addr); - addr = regs->page_exec[pg] + (addr & 0x3FFF); - //t3100e_log("-> %06x val=%04x\n", addr, *(uint16_t *)&ram[addr]); - return *(uint16_t *)&ram[addr]; + if (pg < 0) + return 0xFFFF; + // t3100e_log("ems_read_ramw addr=%05x ", addr); + addr = regs->page_exec[pg] + (addr & 0x3FFF); + // t3100e_log("-> %06x val=%04x\n", addr, *(uint16_t *)&ram[addr]); + return *(uint16_t *) &ram[addr]; } - -static uint32_t ems_read_raml(uint32_t addr, void *priv) +static uint32_t +ems_read_raml(uint32_t addr, void *priv) { - struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)priv; - int pg = addr_to_page(addr); + struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *) priv; + int pg = addr_to_page(addr); - if (pg < 0) return 0xFFFFFFFF; - addr = regs->page_exec[pg] + (addr & 0x3FFF); - return *(uint32_t *)&ram[addr]; + if (pg < 0) + return 0xFFFFFFFF; + addr = regs->page_exec[pg] + (addr & 0x3FFF); + return *(uint32_t *) &ram[addr]; } /* Write RAM in the EMS page frame */ -static void ems_write_ram(uint32_t addr, uint8_t val, void *priv) +static void +ems_write_ram(uint32_t addr, uint8_t val, void *priv) { - struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)priv; - int pg = addr_to_page(addr); + struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *) priv; + int pg = addr_to_page(addr); - if (pg < 0) return; - addr = regs->page_exec[pg] + (addr & 0x3FFF); - ram[addr] = val; + if (pg < 0) + return; + addr = regs->page_exec[pg] + (addr & 0x3FFF); + ram[addr] = val; } - -static void ems_write_ramw(uint32_t addr, uint16_t val, void *priv) +static void +ems_write_ramw(uint32_t addr, uint16_t val, void *priv) { - struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)priv; - int pg = addr_to_page(addr); + struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *) priv; + int pg = addr_to_page(addr); - if (pg < 0) return; - //t3100e_log("ems_write_ramw addr=%05x ", addr); - addr = regs->page_exec[pg] + (addr & 0x3FFF); - //t3100e_log("-> %06x val=%04x\n", addr, val); + if (pg < 0) + return; + // t3100e_log("ems_write_ramw addr=%05x ", addr); + addr = regs->page_exec[pg] + (addr & 0x3FFF); + // t3100e_log("-> %06x val=%04x\n", addr, val); - *(uint16_t *)&ram[addr] = val; + *(uint16_t *) &ram[addr] = val; } - -static void ems_write_raml(uint32_t addr, uint32_t val, void *priv) +static void +ems_write_raml(uint32_t addr, uint32_t val, void *priv) { - struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)priv; - int pg = addr_to_page(addr); + struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *) priv; + int pg = addr_to_page(addr); - if (pg < 0) return; - addr = regs->page_exec[pg] + (addr & 0x3FFF); - *(uint32_t *)&ram[addr] = val; + if (pg < 0) + return; + addr = regs->page_exec[pg] + (addr & 0x3FFF); + *(uint32_t *) &ram[addr] = val; } - - /* Read RAM in the upper area. This is basically what the 'remapped' * mapping in mem.c does, except that the upper area can move around */ -static uint8_t upper_read_ram(uint32_t addr, void *priv) +static uint8_t +upper_read_ram(uint32_t addr, void *priv) { - struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)priv; + struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *) priv; - addr = (addr - (1024 * mem_size)) + regs->upper_base; - return ram[addr]; + addr = (addr - (1024 * mem_size)) + regs->upper_base; + return ram[addr]; } -static uint16_t upper_read_ramw(uint32_t addr, void *priv) +static uint16_t +upper_read_ramw(uint32_t addr, void *priv) { - struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)priv; + struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *) priv; - addr = (addr - (1024 * mem_size)) + regs->upper_base; - return *(uint16_t *)&ram[addr]; + addr = (addr - (1024 * mem_size)) + regs->upper_base; + return *(uint16_t *) &ram[addr]; } -static uint32_t upper_read_raml(uint32_t addr, void *priv) +static uint32_t +upper_read_raml(uint32_t addr, void *priv) { - struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)priv; + struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *) priv; - addr = (addr - (1024 * mem_size)) + regs->upper_base; - return *(uint32_t *)&ram[addr]; + addr = (addr - (1024 * mem_size)) + regs->upper_base; + return *(uint32_t *) &ram[addr]; } - -static void upper_write_ram(uint32_t addr, uint8_t val, void *priv) +static void +upper_write_ram(uint32_t addr, uint8_t val, void *priv) { - struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)priv; + struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *) priv; - addr = (addr - (1024 * mem_size)) + regs->upper_base; - ram[addr] = val; + addr = (addr - (1024 * mem_size)) + regs->upper_base; + ram[addr] = val; } - -static void upper_write_ramw(uint32_t addr, uint16_t val, void *priv) +static void +upper_write_ramw(uint32_t addr, uint16_t val, void *priv) { - struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)priv; + struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *) priv; - addr = (addr - (1024 * mem_size)) + regs->upper_base; - *(uint16_t *)&ram[addr] = val; + addr = (addr - (1024 * mem_size)) + regs->upper_base; + *(uint16_t *) &ram[addr] = val; } - - -static void upper_write_raml(uint32_t addr, uint32_t val, void *priv) +static void +upper_write_raml(uint32_t addr, uint32_t val, void *priv) { - struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *)priv; + struct t3100e_ems_regs *regs = (struct t3100e_ems_regs *) priv; - addr = (addr - (1024 * mem_size)) + regs->upper_base; - *(uint32_t *)&ram[addr] = val; + addr = (addr - (1024 * mem_size)) + regs->upper_base; + *(uint32_t *) &ram[addr] = val; } - - - -int machine_at_t3100e_init(const machine_t *model) +int +machine_at_t3100e_init(const machine_t *model) { - int ret; + int ret; - ret = bios_load_linear("roms/machines/t3100e/t3100e.rom", - 0x000f0000, 65536, 0); + ret = bios_load_linear("roms/machines/t3100e/t3100e.rom", + 0x000f0000, 65536, 0); - if (bios_only || !ret) - return ret; + if (bios_only || !ret) + return ret; - int pg; + int pg; - memset(&t3100e_ems, 0, sizeof(t3100e_ems)); + memset(&t3100e_ems, 0, sizeof(t3100e_ems)); - machine_at_common_ide_init(model); + machine_at_common_ide_init(model); - device_add(&keyboard_at_toshiba_device); + device_add(&keyboard_at_toshiba_device); - if (fdc_type == FDC_INTERNAL) - { - device_add(&fdc_at_device); - } + if (fdc_type == FDC_INTERNAL) { + device_add(&fdc_at_device); + } - /* Hook up system control port */ - io_sethandler(0x8084, 0x0001, - t3100e_sys_in, NULL, NULL, - t3100e_sys_out, NULL, NULL, &t3100e_ems); + /* Hook up system control port */ + io_sethandler(0x8084, 0x0001, + t3100e_sys_in, NULL, NULL, + t3100e_sys_out, NULL, NULL, &t3100e_ems); - /* Start monitoring all 16 EMS registers */ - for (pg = 0; pg < 16; pg++) - { - io_sethandler(t3100e_ems_page_reg[pg], 0x0001, - t3100e_ems_in, NULL, NULL, - t3100e_ems_out, NULL, NULL, &t3100e_ems); - } + /* Start monitoring all 16 EMS registers */ + for (pg = 0; pg < 16; pg++) { + io_sethandler(t3100e_ems_page_reg[pg], 0x0001, + t3100e_ems_in, NULL, NULL, + t3100e_ems_out, NULL, NULL, &t3100e_ems); + } - /* Map the EMS page frame */ - for (pg = 0; pg < 4; pg++) - { - t3100e_log("Adding memory map at %x for page %d\n", page_to_addr(pg), pg); - mem_mapping_add(&t3100e_ems.mapping[pg], - page_to_addr(pg), 16384, - ems_read_ram, ems_read_ramw, ems_read_raml, - ems_write_ram, ems_write_ramw, ems_write_raml, - NULL, MEM_MAPPING_EXTERNAL, - &t3100e_ems); - /* Start them all off disabled */ - mem_mapping_disable(&t3100e_ems.mapping[pg]); - } - /* Mapping for upper RAM when in use as XMS*/ - mem_mapping_add(&t3100e_ems.upper_mapping, mem_size * 1024, 384 * 1024, - upper_read_ram, upper_read_ramw, upper_read_raml, - upper_write_ram, upper_write_ramw, upper_write_raml, - NULL, MEM_MAPPING_INTERNAL, &t3100e_ems); - mem_mapping_disable(&t3100e_ems.upper_mapping); + /* Map the EMS page frame */ + for (pg = 0; pg < 4; pg++) { + t3100e_log("Adding memory map at %x for page %d\n", page_to_addr(pg), pg); + mem_mapping_add(&t3100e_ems.mapping[pg], + page_to_addr(pg), 16384, + ems_read_ram, ems_read_ramw, ems_read_raml, + ems_write_ram, ems_write_ramw, ems_write_raml, + NULL, MEM_MAPPING_EXTERNAL, + &t3100e_ems); + /* Start them all off disabled */ + mem_mapping_disable(&t3100e_ems.mapping[pg]); + } + /* Mapping for upper RAM when in use as XMS*/ + mem_mapping_add(&t3100e_ems.upper_mapping, mem_size * 1024, 384 * 1024, + upper_read_ram, upper_read_ramw, upper_read_raml, + upper_write_ram, upper_write_ramw, upper_write_raml, + NULL, MEM_MAPPING_INTERNAL, &t3100e_ems); + mem_mapping_disable(&t3100e_ems.upper_mapping); - device_add(&t3100e_device); + device_add(&t3100e_device); - return ret; + return ret; } diff --git a/src/machine/m_at_t3100e_vid.c b/src/machine/m_at_t3100e_vid.c index 88aaabdec..84244f09e 100644 --- a/src/machine/m_at_t3100e_vid.c +++ b/src/machine/m_at_t3100e_vid.c @@ -67,17 +67,15 @@ #include <86box/vid_cga.h> #include <86box/m_at_t3100e.h> - #define T3100E_XSIZE 640 #define T3100E_YSIZE 400 /*Very rough estimate*/ -#define VID_CLOCK (double)(651 * 416 * 60) - +#define VID_CLOCK (double) (651 * 416 * 60) /* Mapping of attributes to colours */ static uint32_t amber, black; -static uint8_t boldcols[256]; /* Which attributes use the bold font */ +static uint8_t boldcols[256]; /* Which attributes use the bold font */ static uint32_t blinkcols[256][2]; static uint32_t normcols[256][2]; @@ -89,684 +87,621 @@ static uint32_t normcols[256][2]; * Bits 0,1: Font set (not currently implemented) */ static uint8_t st_video_options; -static int8_t st_display_internal = -1; +static int8_t st_display_internal = -1; -void t3100e_video_options_set(uint8_t options) +void +t3100e_video_options_set(uint8_t options) { - st_video_options = options; + st_video_options = options; } -void t3100e_display_set(uint8_t internal) +void +t3100e_display_set(uint8_t internal) { - st_display_internal = internal; + st_display_internal = internal; } -uint8_t t3100e_display_get() +uint8_t +t3100e_display_get() { - return st_display_internal; + return st_display_internal; } +typedef struct t3100e_t { + mem_mapping_t mapping; -typedef struct t3100e_t -{ - mem_mapping_t mapping; + cga_t cga; /* The CGA is used for the external + * display; most of its registers are + * ignored by the plasma display. */ - cga_t cga; /* The CGA is used for the external - * display; most of its registers are - * ignored by the plasma display. */ + int font; /* Current font, 0-3 */ + int enabled; /* Hardware enabled, 0 or 1 */ + int internal; /* Using internal display? */ + uint8_t attrmap; /* Attribute mapping register */ - int font; /* Current font, 0-3 */ - int enabled; /* Hardware enabled, 0 or 1 */ - int internal; /* Using internal display? */ - uint8_t attrmap; /* Attribute mapping register */ + uint64_t dispontime, dispofftime; - uint64_t dispontime, dispofftime; + int linepos, displine; + int vc; + int dispon; + int vsynctime; + uint8_t video_options; - int linepos, displine; - int vc; - int dispon; - int vsynctime; - uint8_t video_options; - - uint8_t *vram; + uint8_t *vram; } t3100e_t; -static video_timings_t timing_t3100e = {VIDEO_ISA, 8,16,32, 8,16,32}; +static video_timings_t timing_t3100e = { VIDEO_ISA, 8, 16, 32, 8, 16, 32 }; - -void t3100e_recalctimings(t3100e_t *t3100e); -void t3100e_write(uint32_t addr, uint8_t val, void *p); +void t3100e_recalctimings(t3100e_t *t3100e); +void t3100e_write(uint32_t addr, uint8_t val, void *p); uint8_t t3100e_read(uint32_t addr, void *p); -void t3100e_recalcattrs(t3100e_t *t3100e); +void t3100e_recalcattrs(t3100e_t *t3100e); - -void t3100e_out(uint16_t addr, uint8_t val, void *p) +void +t3100e_out(uint16_t addr, uint8_t val, void *p) { - t3100e_t *t3100e = (t3100e_t *)p; - switch (addr) - { - /* Emulated CRTC, register select */ - case 0x3d0: case 0x3d2: case 0x3d4: case 0x3d6: - cga_out(addr, val, &t3100e->cga); - break; + t3100e_t *t3100e = (t3100e_t *) p; + switch (addr) { + /* Emulated CRTC, register select */ + case 0x3d0: + case 0x3d2: + case 0x3d4: + case 0x3d6: + cga_out(addr, val, &t3100e->cga); + break; - /* Emulated CRTC, value */ - case 0x3d1: case 0x3d3: case 0x3d5: case 0x3d7: - /* Register 0x12 controls the attribute mappings for the - * plasma screen. */ - if (t3100e->cga.crtcreg == 0x12) - { - t3100e->attrmap = val; - t3100e_recalcattrs(t3100e); - return; - } - cga_out(addr, val, &t3100e->cga); + /* Emulated CRTC, value */ + case 0x3d1: + case 0x3d3: + case 0x3d5: + case 0x3d7: + /* Register 0x12 controls the attribute mappings for the + * plasma screen. */ + if (t3100e->cga.crtcreg == 0x12) { + t3100e->attrmap = val; + t3100e_recalcattrs(t3100e); + return; + } + cga_out(addr, val, &t3100e->cga); - t3100e_recalctimings(t3100e); - return; + t3100e_recalctimings(t3100e); + return; - /* CGA control register */ - case 0x3D8: - cga_out(addr, val, &t3100e->cga); - return; - /* CGA colour register */ - case 0x3D9: - cga_out(addr, val, &t3100e->cga); - return; - } + /* CGA control register */ + case 0x3D8: + cga_out(addr, val, &t3100e->cga); + return; + /* CGA colour register */ + case 0x3D9: + cga_out(addr, val, &t3100e->cga); + return; + } } -uint8_t t3100e_in(uint16_t addr, void *p) +uint8_t +t3100e_in(uint16_t addr, void *p) { - t3100e_t *t3100e = (t3100e_t *)p; - uint8_t val; + t3100e_t *t3100e = (t3100e_t *) p; + uint8_t val; - switch (addr) - { - case 0x3d1: case 0x3d3: case 0x3d5: case 0x3d7: - if (t3100e->cga.crtcreg == 0x12) - { - val = t3100e->attrmap & 0x0F; - if (t3100e->internal) val |= 0x30; /* Plasma / CRT */ - return val; - } - } + switch (addr) { + case 0x3d1: + case 0x3d3: + case 0x3d5: + case 0x3d7: + if (t3100e->cga.crtcreg == 0x12) { + val = t3100e->attrmap & 0x0F; + if (t3100e->internal) + val |= 0x30; /* Plasma / CRT */ + return val; + } + } - return cga_in(addr, &t3100e->cga); + return cga_in(addr, &t3100e->cga); } - - - -void t3100e_write(uint32_t addr, uint8_t val, void *p) +void +t3100e_write(uint32_t addr, uint8_t val, void *p) { - t3100e_t *t3100e = (t3100e_t *)p; + t3100e_t *t3100e = (t3100e_t *) p; - t3100e->vram[addr & 0x7fff] = val; - cycles -= 4; + t3100e->vram[addr & 0x7fff] = val; + cycles -= 4; } - - -uint8_t t3100e_read(uint32_t addr, void *p) +uint8_t +t3100e_read(uint32_t addr, void *p) { - t3100e_t *t3100e = (t3100e_t *)p; - cycles -= 4; + t3100e_t *t3100e = (t3100e_t *) p; + cycles -= 4; - return t3100e->vram[addr & 0x7fff]; + return t3100e->vram[addr & 0x7fff]; } - - -void t3100e_recalctimings(t3100e_t *t3100e) +void +t3100e_recalctimings(t3100e_t *t3100e) { - double disptime; - double _dispontime, _dispofftime; + double disptime; + double _dispontime, _dispofftime; - if (!t3100e->internal) - { - cga_recalctimings(&t3100e->cga); - return; - } - disptime = 651; - _dispontime = 640; - _dispofftime = disptime - _dispontime; - t3100e->dispontime = (uint64_t)(_dispontime * (cpuclock / VID_CLOCK) * (double)(1ull << 32)); - t3100e->dispofftime = (uint64_t)(_dispofftime * (cpuclock / VID_CLOCK) * (double)(1ull << 32)); + if (!t3100e->internal) { + cga_recalctimings(&t3100e->cga); + return; + } + disptime = 651; + _dispontime = 640; + _dispofftime = disptime - _dispontime; + t3100e->dispontime = (uint64_t) (_dispontime * (cpuclock / VID_CLOCK) * (double) (1ull << 32)); + t3100e->dispofftime = (uint64_t) (_dispofftime * (cpuclock / VID_CLOCK) * (double) (1ull << 32)); } - /* Draw a row of text in 80-column mode */ -void t3100e_text_row80(t3100e_t *t3100e) +void +t3100e_text_row80(t3100e_t *t3100e) { - uint32_t cols[2]; - int x, c; - uint8_t chr, attr; - int drawcursor; - int cursorline; - int bold; - int blink; - uint16_t addr; - uint8_t sc; - uint16_t ma = (t3100e->cga.crtc[13] | (t3100e->cga.crtc[12] << 8)) & 0x7fff; - uint16_t ca = (t3100e->cga.crtc[15] | (t3100e->cga.crtc[14] << 8)) & 0x7fff; + uint32_t cols[2]; + int x, c; + uint8_t chr, attr; + int drawcursor; + int cursorline; + int bold; + int blink; + uint16_t addr; + uint8_t sc; + uint16_t ma = (t3100e->cga.crtc[13] | (t3100e->cga.crtc[12] << 8)) & 0x7fff; + uint16_t ca = (t3100e->cga.crtc[15] | (t3100e->cga.crtc[14] << 8)) & 0x7fff; - sc = (t3100e->displine) & 15; - addr = ((ma & ~1) + (t3100e->displine >> 4) * 80) * 2; - ma += (t3100e->displine >> 4) * 80; + sc = (t3100e->displine) & 15; + addr = ((ma & ~1) + (t3100e->displine >> 4) * 80) * 2; + ma += (t3100e->displine >> 4) * 80; - if ((t3100e->cga.crtc[10] & 0x60) == 0x20) - { - cursorline = 0; - } - else - { - cursorline = ((t3100e->cga.crtc[10] & 0x0F)*2 <= sc) && - ((t3100e->cga.crtc[11] & 0x0F)*2 >= sc); - } - for (x = 0; x < 80; x++) + if ((t3100e->cga.crtc[10] & 0x60) == 0x20) { + cursorline = 0; + } else { + cursorline = ((t3100e->cga.crtc[10] & 0x0F) * 2 <= sc) && ((t3100e->cga.crtc[11] & 0x0F) * 2 >= sc); + } + for (x = 0; x < 80; x++) { + chr = t3100e->vram[(addr + 2 * x) & 0x7FFF]; + attr = t3100e->vram[(addr + 2 * x + 1) & 0x7FFF]; + drawcursor = ((ma == ca) && cursorline && (t3100e->cga.cgamode & 8) && (t3100e->cga.cgablink & 16)); + + blink = ((t3100e->cga.cgablink & 16) && (t3100e->cga.cgamode & 0x20) && (attr & 0x80) && !drawcursor); + + if (t3100e->video_options & 4) + bold = boldcols[attr] ? chr + 256 : chr; + else + bold = boldcols[attr] ? chr : chr + 256; + bold += 512 * (t3100e->video_options & 3); + + if (t3100e->cga.cgamode & 0x20) /* Blink */ { - chr = t3100e->vram[(addr + 2 * x) & 0x7FFF]; - attr = t3100e->vram[(addr + 2 * x + 1) & 0x7FFF]; - drawcursor = ((ma == ca) && cursorline && - (t3100e->cga.cgamode & 8) && (t3100e->cga.cgablink & 16)); - - blink = ((t3100e->cga.cgablink & 16) && (t3100e->cga.cgamode & 0x20) && - (attr & 0x80) && !drawcursor); - - if (t3100e->video_options & 4) - bold = boldcols[attr] ? chr + 256 : chr; - else - bold = boldcols[attr] ? chr : chr + 256; - bold += 512 * (t3100e->video_options & 3); - - if (t3100e->cga.cgamode & 0x20) /* Blink */ - { - cols[1] = blinkcols[attr][1]; - cols[0] = blinkcols[attr][0]; - if (blink) cols[1] = cols[0]; - } - else - { - cols[1] = normcols[attr][1]; - cols[0] = normcols[attr][0]; - } - if (drawcursor) - { - for (c = 0; c < 8; c++) - { - ((uint32_t *)buffer32->line[t3100e->displine])[(x << 3) + c] = cols[(fontdatm[bold][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (amber ^ black); - } - } - else - { - for (c = 0; c < 8; c++) - ((uint32_t *)buffer32->line[t3100e->displine])[(x << 3) + c] = cols[(fontdatm[bold][sc] & (1 << (c ^ 7))) ? 1 : 0]; - } - ++ma; - } + cols[1] = blinkcols[attr][1]; + cols[0] = blinkcols[attr][0]; + if (blink) + cols[1] = cols[0]; + } else { + cols[1] = normcols[attr][1]; + cols[0] = normcols[attr][0]; + } + if (drawcursor) { + for (c = 0; c < 8; c++) { + ((uint32_t *) buffer32->line[t3100e->displine])[(x << 3) + c] = cols[(fontdatm[bold][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (amber ^ black); + } + } else { + for (c = 0; c < 8; c++) + ((uint32_t *) buffer32->line[t3100e->displine])[(x << 3) + c] = cols[(fontdatm[bold][sc] & (1 << (c ^ 7))) ? 1 : 0]; + } + ++ma; + } } /* Draw a row of text in 40-column mode */ -void t3100e_text_row40(t3100e_t *t3100e) +void +t3100e_text_row40(t3100e_t *t3100e) { - uint32_t cols[2]; - int x, c; - uint8_t chr, attr; - int drawcursor; - int cursorline; - int bold; - int blink; - uint16_t addr; - uint8_t sc; - uint16_t ma = (t3100e->cga.crtc[13] | (t3100e->cga.crtc[12] << 8)) & 0x7fff; - uint16_t ca = (t3100e->cga.crtc[15] | (t3100e->cga.crtc[14] << 8)) & 0x7fff; + uint32_t cols[2]; + int x, c; + uint8_t chr, attr; + int drawcursor; + int cursorline; + int bold; + int blink; + uint16_t addr; + uint8_t sc; + uint16_t ma = (t3100e->cga.crtc[13] | (t3100e->cga.crtc[12] << 8)) & 0x7fff; + uint16_t ca = (t3100e->cga.crtc[15] | (t3100e->cga.crtc[14] << 8)) & 0x7fff; - sc = (t3100e->displine) & 15; - addr = ((ma & ~1) + (t3100e->displine >> 4) * 40) * 2; - ma += (t3100e->displine >> 4) * 40; + sc = (t3100e->displine) & 15; + addr = ((ma & ~1) + (t3100e->displine >> 4) * 40) * 2; + ma += (t3100e->displine >> 4) * 40; - if ((t3100e->cga.crtc[10] & 0x60) == 0x20) - { - cursorline = 0; - } - else - { - cursorline = ((t3100e->cga.crtc[10] & 0x0F)*2 <= sc) && - ((t3100e->cga.crtc[11] & 0x0F)*2 >= sc); - } - for (x = 0; x < 40; x++) + if ((t3100e->cga.crtc[10] & 0x60) == 0x20) { + cursorline = 0; + } else { + cursorline = ((t3100e->cga.crtc[10] & 0x0F) * 2 <= sc) && ((t3100e->cga.crtc[11] & 0x0F) * 2 >= sc); + } + for (x = 0; x < 40; x++) { + chr = t3100e->vram[(addr + 2 * x) & 0x7FFF]; + attr = t3100e->vram[(addr + 2 * x + 1) & 0x7FFF]; + drawcursor = ((ma == ca) && cursorline && (t3100e->cga.cgamode & 8) && (t3100e->cga.cgablink & 16)); + + blink = ((t3100e->cga.cgablink & 16) && (t3100e->cga.cgamode & 0x20) && (attr & 0x80) && !drawcursor); + + if (t3100e->video_options & 4) + bold = boldcols[attr] ? chr + 256 : chr; + else + bold = boldcols[attr] ? chr : chr + 256; + bold += 512 * (t3100e->video_options & 3); + + if (t3100e->cga.cgamode & 0x20) /* Blink */ { - chr = t3100e->vram[(addr + 2 * x) & 0x7FFF]; - attr = t3100e->vram[(addr + 2 * x + 1) & 0x7FFF]; - drawcursor = ((ma == ca) && cursorline && - (t3100e->cga.cgamode & 8) && (t3100e->cga.cgablink & 16)); - - blink = ((t3100e->cga.cgablink & 16) && (t3100e->cga.cgamode & 0x20) && - (attr & 0x80) && !drawcursor); - - if (t3100e->video_options & 4) - bold = boldcols[attr] ? chr + 256 : chr; - else bold = boldcols[attr] ? chr : chr + 256; - bold += 512 * (t3100e->video_options & 3); - - if (t3100e->cga.cgamode & 0x20) /* Blink */ - { - cols[1] = blinkcols[attr][1]; - cols[0] = blinkcols[attr][0]; - if (blink) cols[1] = cols[0]; - } - else - { - cols[1] = normcols[attr][1]; - cols[0] = normcols[attr][0]; - } - if (drawcursor) - { - for (c = 0; c < 8; c++) - { - ((uint32_t *)buffer32->line[t3100e->displine])[(x << 4) + c*2] = - ((uint32_t *)buffer32->line[t3100e->displine])[(x << 4) + c*2 + 1] = cols[(fontdatm[bold][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (amber ^ black); - } - } - else - { - for (c = 0; c < 8; c++) - { - ((uint32_t *)buffer32->line[t3100e->displine])[(x << 4) + c*2] = - ((uint32_t *)buffer32->line[t3100e->displine])[(x << 4) + c*2+1] = cols[(fontdatm[bold][sc] & (1 << (c ^ 7))) ? 1 : 0]; - } - } - ++ma; - } + cols[1] = blinkcols[attr][1]; + cols[0] = blinkcols[attr][0]; + if (blink) + cols[1] = cols[0]; + } else { + cols[1] = normcols[attr][1]; + cols[0] = normcols[attr][0]; + } + if (drawcursor) { + for (c = 0; c < 8; c++) { + ((uint32_t *) buffer32->line[t3100e->displine])[(x << 4) + c * 2] = ((uint32_t *) buffer32->line[t3100e->displine])[(x << 4) + c * 2 + 1] = cols[(fontdatm[bold][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (amber ^ black); + } + } else { + for (c = 0; c < 8; c++) { + ((uint32_t *) buffer32->line[t3100e->displine])[(x << 4) + c * 2] = ((uint32_t *) buffer32->line[t3100e->displine])[(x << 4) + c * 2 + 1] = cols[(fontdatm[bold][sc] & (1 << (c ^ 7))) ? 1 : 0]; + } + } + ++ma; + } } - - - /* Draw a line in CGA 640x200 or T3100e 640x400 mode */ -void t3100e_cgaline6(t3100e_t *t3100e) +void +t3100e_cgaline6(t3100e_t *t3100e) { - int x, c; - uint8_t dat; - uint32_t ink = 0; - uint16_t addr; - uint32_t fg = (t3100e->cga.cgacol & 0x0F) ? amber : black; - uint32_t bg = black; + int x, c; + uint8_t dat; + uint32_t ink = 0; + uint16_t addr; + uint32_t fg = (t3100e->cga.cgacol & 0x0F) ? amber : black; + uint32_t bg = black; - uint16_t ma = (t3100e->cga.crtc[13] | (t3100e->cga.crtc[12] << 8)) & 0x7fff; + uint16_t ma = (t3100e->cga.crtc[13] | (t3100e->cga.crtc[12] << 8)) & 0x7fff; - if (t3100e->cga.crtc[9] == 3) /* 640*400 */ - { - addr = ((t3100e->displine) & 1) * 0x2000 + - ((t3100e->displine >> 1) & 1) * 0x4000 + - (t3100e->displine >> 2) * 80 + - ((ma & ~1) << 1); - } - else - { - addr = ((t3100e->displine >> 1) & 1) * 0x2000 + - (t3100e->displine >> 2) * 80 + - ((ma & ~1) << 1); - } - for (x = 0; x < 80; x++) - { - dat = t3100e->vram[addr & 0x7FFF]; - addr++; + if (t3100e->cga.crtc[9] == 3) /* 640*400 */ + { + addr = ((t3100e->displine) & 1) * 0x2000 + ((t3100e->displine >> 1) & 1) * 0x4000 + (t3100e->displine >> 2) * 80 + ((ma & ~1) << 1); + } else { + addr = ((t3100e->displine >> 1) & 1) * 0x2000 + (t3100e->displine >> 2) * 80 + ((ma & ~1) << 1); + } + for (x = 0; x < 80; x++) { + dat = t3100e->vram[addr & 0x7FFF]; + addr++; - for (c = 0; c < 8; c++) - { - ink = (dat & 0x80) ? fg : bg; - if (!(t3100e->cga.cgamode & 8)) ink = black; - ((uint32_t *)buffer32->line[t3100e->displine])[x*8+c] = ink; - dat = dat << 1; - } - } + for (c = 0; c < 8; c++) { + ink = (dat & 0x80) ? fg : bg; + if (!(t3100e->cga.cgamode & 8)) + ink = black; + ((uint32_t *) buffer32->line[t3100e->displine])[x * 8 + c] = ink; + dat = dat << 1; + } + } } - /* Draw a line in CGA 320x200 mode. Here the CGA colours are converted to * dither patterns: colour 1 to 25% grey, colour 2 to 50% grey */ -void t3100e_cgaline4(t3100e_t *t3100e) +void +t3100e_cgaline4(t3100e_t *t3100e) { - int x, c; - uint8_t dat, pattern; - uint32_t ink0 = 0, ink1 = 0; - uint16_t addr; + int x, c; + uint8_t dat, pattern; + uint32_t ink0 = 0, ink1 = 0; + uint16_t addr; - uint16_t ma = (t3100e->cga.crtc[13] | (t3100e->cga.crtc[12] << 8)) & 0x7fff; - if (t3100e->cga.crtc[9] == 3) /* 320*400 undocumented */ - { - addr = ((t3100e->displine) & 1) * 0x2000 + - ((t3100e->displine >> 1) & 1) * 0x4000 + - (t3100e->displine >> 2) * 80 + - ((ma & ~1) << 1); - } - else /* 320*200 */ - { - addr = ((t3100e->displine >> 1) & 1) * 0x2000 + - (t3100e->displine >> 2) * 80 + - ((ma & ~1) << 1); - } - for (x = 0; x < 80; x++) - { - dat = t3100e->vram[addr & 0x7FFF]; - addr++; + uint16_t ma = (t3100e->cga.crtc[13] | (t3100e->cga.crtc[12] << 8)) & 0x7fff; + if (t3100e->cga.crtc[9] == 3) /* 320*400 undocumented */ + { + addr = ((t3100e->displine) & 1) * 0x2000 + ((t3100e->displine >> 1) & 1) * 0x4000 + (t3100e->displine >> 2) * 80 + ((ma & ~1) << 1); + } else /* 320*200 */ + { + addr = ((t3100e->displine >> 1) & 1) * 0x2000 + (t3100e->displine >> 2) * 80 + ((ma & ~1) << 1); + } + for (x = 0; x < 80; x++) { + dat = t3100e->vram[addr & 0x7FFF]; + addr++; - for (c = 0; c < 4; c++) - { - pattern = (dat & 0xC0) >> 6; - if (!(t3100e->cga.cgamode & 8)) pattern = 0; + for (c = 0; c < 4; c++) { + pattern = (dat & 0xC0) >> 6; + if (!(t3100e->cga.cgamode & 8)) + pattern = 0; - switch (pattern & 3) - { - case 0: ink0 = ink1 = black; break; - case 1: if (t3100e->displine & 1) - { - ink0 = black; ink1 = black; - } - else - { - ink0 = amber; ink1 = black; - } - break; - case 2: if (t3100e->displine & 1) - { - ink0 = black; ink1 = amber; - } - else - { - ink0 = amber; ink1 = black; - } - break; - case 3: ink0 = ink1 = amber; break; - - } - ((uint32_t *)buffer32->line[t3100e->displine])[x*8+2*c] = ink0; - ((uint32_t *)buffer32->line[t3100e->displine])[x*8+2*c+1] = ink1; - dat = dat << 2; - } - } + switch (pattern & 3) { + case 0: + ink0 = ink1 = black; + break; + case 1: + if (t3100e->displine & 1) { + ink0 = black; + ink1 = black; + } else { + ink0 = amber; + ink1 = black; + } + break; + case 2: + if (t3100e->displine & 1) { + ink0 = black; + ink1 = amber; + } else { + ink0 = amber; + ink1 = black; + } + break; + case 3: + ink0 = ink1 = amber; + break; + } + ((uint32_t *) buffer32->line[t3100e->displine])[x * 8 + 2 * c] = ink0; + ((uint32_t *) buffer32->line[t3100e->displine])[x * 8 + 2 * c + 1] = ink1; + dat = dat << 2; + } + } } - - - - - -void t3100e_poll(void *p) +void +t3100e_poll(void *p) { - t3100e_t *t3100e = (t3100e_t *)p; + t3100e_t *t3100e = (t3100e_t *) p; - if (t3100e->video_options != st_video_options) - { - t3100e->video_options = st_video_options; + if (t3100e->video_options != st_video_options) { + t3100e->video_options = st_video_options; - if (t3100e->video_options & 8) /* Disable internal CGA */ - mem_mapping_disable(&t3100e->mapping); - else mem_mapping_enable(&t3100e->mapping); - - /* Set the font used for the external display */ - t3100e->cga.fontbase = (512 * (t3100e->video_options & 3)) - + ((t3100e->video_options & 4) ? 256 : 0); - - } - /* Switch between internal plasma and external CRT display. */ - if (st_display_internal != -1 && st_display_internal != t3100e->internal) - { - t3100e->internal = st_display_internal; - t3100e_recalctimings(t3100e); - } - if (!t3100e->internal) - { - cga_poll(&t3100e->cga); - return; - } - - - if (!t3100e->linepos) - { - timer_advance_u64(&t3100e->cga.timer, t3100e->dispofftime); - t3100e->cga.cgastat |= 1; - t3100e->linepos = 1; - if (t3100e->dispon) - { - if (t3100e->displine == 0) - { - video_wait_for_buffer(); - } - - /* Graphics */ - if (t3100e->cga.cgamode & 0x02) - { - if (t3100e->cga.cgamode & 0x10) - t3100e_cgaline6(t3100e); - else t3100e_cgaline4(t3100e); - } - else - if (t3100e->cga.cgamode & 0x01) /* High-res text */ - { - t3100e_text_row80(t3100e); - } - else - { - t3100e_text_row40(t3100e); - } - } - t3100e->displine++; - /* Hardcode a fixed refresh rate and VSYNC timing */ - if (t3100e->displine == 400) /* Start of VSYNC */ - { - t3100e->cga.cgastat |= 8; - t3100e->dispon = 0; - } - if (t3100e->displine == 416) /* End of VSYNC */ - { - t3100e->displine = 0; - t3100e->cga.cgastat &= ~8; - t3100e->dispon = 1; - } - } + if (t3100e->video_options & 8) /* Disable internal CGA */ + mem_mapping_disable(&t3100e->mapping); else - { - if (t3100e->dispon) - { - t3100e->cga.cgastat &= ~1; - } - timer_advance_u64(&t3100e->cga.timer, t3100e->dispontime); - t3100e->linepos = 0; - - if (t3100e->displine == 400) - { -/* Hardcode 640x400 window size */ - if ((T3100E_XSIZE != xsize) || (T3100E_YSIZE != ysize) || video_force_resize_get()) - { - xsize = T3100E_XSIZE; - ysize = T3100E_YSIZE; - if (xsize < 64) xsize = 656; - if (ysize < 32) ysize = 200; - set_screen_size(xsize, ysize); - - if (video_force_resize_get()) - video_force_resize_set(0); - } - video_blit_memtoscreen(0, 0, xsize, ysize); - - frames++; - /* Fixed 640x400 resolution */ - video_res_x = T3100E_XSIZE; - video_res_y = T3100E_YSIZE; - - if (t3100e->cga.cgamode & 0x02) - { - if (t3100e->cga.cgamode & 0x10) - video_bpp = 1; - else video_bpp = 2; - - } - else video_bpp = 0; - t3100e->cga.cgablink++; - } - } -} - - - -void t3100e_recalcattrs(t3100e_t *t3100e) -{ - int n; - - /* val behaves as follows: - * Bit 0: Attributes 01-06, 08-0E are inverse video - * Bit 1: Attributes 01-06, 08-0E are bold - * Bit 2: Attributes 11-16, 18-1F, 21-26, 28-2F ... F1-F6, F8-FF - * are inverse video - * Bit 3: Attributes 11-16, 18-1F, 21-26, 28-2F ... F1-F6, F8-FF - * are bold */ - - /* Set up colours */ - amber = makecol(0xf7, 0x7C, 0x34); - black = makecol(0x17, 0x0C, 0x00); - - /* Initialise the attribute mapping. Start by defaulting everything - * to black on amber, and with bold set by bit 3 */ - for (n = 0; n < 256; n++) - { - boldcols[n] = (n & 8) != 0; - blinkcols[n][0] = normcols[n][0] = amber; - blinkcols[n][1] = normcols[n][1] = black; - } - - /* Colours 0x11-0xFF are controlled by bits 2 and 3 of the - * passed value. Exclude x0 and x8, which are always black on - * amber. */ - for (n = 0x11; n <= 0xFF; n++) - { - if ((n & 7) == 0) continue; - if (t3100e->attrmap & 4) /* Inverse */ - { - blinkcols[n][0] = normcols[n][0] = amber; - blinkcols[n][1] = normcols[n][1] = black; - } - else /* Normal */ - { - blinkcols[n][0] = normcols[n][0] = black; - blinkcols[n][1] = normcols[n][1] = amber; - } - if (t3100e->attrmap & 8) boldcols[n] = 1; /* Bold */ - } - /* Set up the 01-0E range, controlled by bits 0 and 1 of the - * passed value. When blinking is enabled this also affects 81-8E. */ - for (n = 0x01; n <= 0x0E; n++) - { - if (n == 7) continue; - if (t3100e->attrmap & 1) - { - blinkcols[n][0] = normcols[n][0] = amber; - blinkcols[n][1] = normcols[n][1] = black; - blinkcols[n+128][0] = amber; - blinkcols[n+128][1] = black; - } - else - { - blinkcols[n][0] = normcols[n][0] = black; - blinkcols[n][1] = normcols[n][1] = amber; - blinkcols[n+128][0] = black; - blinkcols[n+128][1] = amber; - } - if (t3100e->attrmap & 2) boldcols[n] = 1; - } - /* Colours 07 and 0F are always amber on black. If blinking is - * enabled so are 87 and 8F. */ - for (n = 0x07; n <= 0x0F; n += 8) - { - blinkcols[n][0] = normcols[n][0] = black; - blinkcols[n][1] = normcols[n][1] = amber; - blinkcols[n+128][0] = black; - blinkcols[n+128][1] = amber; - } - /* When not blinking, colours 81-8F are always amber on black. */ - for (n = 0x81; n <= 0x8F; n ++) - { - normcols[n][0] = black; - normcols[n][1] = amber; - boldcols[n] = (n & 0x08) != 0; - } - - - /* Finally do the ones which are solid black. These differ between - * the normal and blinking mappings */ - for (n = 0; n <= 0xFF; n += 0x11) - { - normcols[n][0] = normcols[n][1] = black; - } - /* In the blinking range, 00 11 22 .. 77 and 80 91 A2 .. F7 are black */ - for (n = 0; n <= 0x77; n += 0x11) - { - blinkcols[n][0] = blinkcols[n][1] = black; - blinkcols[n+128][0] = blinkcols[n+128][1] = black; - } -} - - -void *t3100e_init(const device_t *info) -{ - t3100e_t *t3100e = malloc(sizeof(t3100e_t)); - memset(t3100e, 0, sizeof(t3100e_t)); - loadfont("roms/machines/t3100e/t3100e_font.bin", 5); - cga_init(&t3100e->cga); - video_inform(VIDEO_FLAG_TYPE_CGA, &timing_t3100e); - - t3100e->internal = 1; - - /* 32k video RAM */ - t3100e->vram = malloc(0x8000); - - timer_set_callback(&t3100e->cga.timer, t3100e_poll); - timer_set_p(&t3100e->cga.timer, t3100e); - - /* Occupy memory between 0xB8000 and 0xBFFFF */ - mem_mapping_add(&t3100e->mapping, 0xb8000, 0x8000, t3100e_read, NULL, NULL, t3100e_write, NULL, NULL, NULL, 0, t3100e); - /* Respond to CGA I/O ports */ - io_sethandler(0x03d0, 0x000c, t3100e_in, NULL, NULL, t3100e_out, NULL, NULL, t3100e); - - /* Default attribute mapping is 4 */ - t3100e->attrmap = 4; - t3100e_recalcattrs(t3100e); - -/* Start off in 80x25 text mode */ - t3100e->cga.cgastat = 0xF4; - t3100e->cga.vram = t3100e->vram; - t3100e->enabled = 1; - t3100e->video_options = 0xFF; - return t3100e; -} - -void t3100e_close(void *p) -{ - t3100e_t *t3100e = (t3100e_t *)p; - - free(t3100e->vram); - free(t3100e); -} - -void t3100e_speed_changed(void *p) -{ - t3100e_t *t3100e = (t3100e_t *)p; + mem_mapping_enable(&t3100e->mapping); + /* Set the font used for the external display */ + t3100e->cga.fontbase = (512 * (t3100e->video_options & 3)) + + ((t3100e->video_options & 4) ? 256 : 0); + } + /* Switch between internal plasma and external CRT display. */ + if (st_display_internal != -1 && st_display_internal != t3100e->internal) { + t3100e->internal = st_display_internal; t3100e_recalctimings(t3100e); + } + if (!t3100e->internal) { + cga_poll(&t3100e->cga); + return; + } + + if (!t3100e->linepos) { + timer_advance_u64(&t3100e->cga.timer, t3100e->dispofftime); + t3100e->cga.cgastat |= 1; + t3100e->linepos = 1; + if (t3100e->dispon) { + if (t3100e->displine == 0) { + video_wait_for_buffer(); + } + + /* Graphics */ + if (t3100e->cga.cgamode & 0x02) { + if (t3100e->cga.cgamode & 0x10) + t3100e_cgaline6(t3100e); + else + t3100e_cgaline4(t3100e); + } else if (t3100e->cga.cgamode & 0x01) /* High-res text */ + { + t3100e_text_row80(t3100e); + } else { + t3100e_text_row40(t3100e); + } + } + t3100e->displine++; + /* Hardcode a fixed refresh rate and VSYNC timing */ + if (t3100e->displine == 400) /* Start of VSYNC */ + { + t3100e->cga.cgastat |= 8; + t3100e->dispon = 0; + } + if (t3100e->displine == 416) /* End of VSYNC */ + { + t3100e->displine = 0; + t3100e->cga.cgastat &= ~8; + t3100e->dispon = 1; + } + } else { + if (t3100e->dispon) { + t3100e->cga.cgastat &= ~1; + } + timer_advance_u64(&t3100e->cga.timer, t3100e->dispontime); + t3100e->linepos = 0; + + if (t3100e->displine == 400) { + /* Hardcode 640x400 window size */ + if ((T3100E_XSIZE != xsize) || (T3100E_YSIZE != ysize) || video_force_resize_get()) { + xsize = T3100E_XSIZE; + ysize = T3100E_YSIZE; + if (xsize < 64) + xsize = 656; + if (ysize < 32) + ysize = 200; + set_screen_size(xsize, ysize); + + if (video_force_resize_get()) + video_force_resize_set(0); + } + video_blit_memtoscreen(0, 0, xsize, ysize); + + frames++; + /* Fixed 640x400 resolution */ + video_res_x = T3100E_XSIZE; + video_res_y = T3100E_YSIZE; + + if (t3100e->cga.cgamode & 0x02) { + if (t3100e->cga.cgamode & 0x10) + video_bpp = 1; + else + video_bpp = 2; + + } else + video_bpp = 0; + t3100e->cga.cgablink++; + } + } +} + +void +t3100e_recalcattrs(t3100e_t *t3100e) +{ + int n; + + /* val behaves as follows: + * Bit 0: Attributes 01-06, 08-0E are inverse video + * Bit 1: Attributes 01-06, 08-0E are bold + * Bit 2: Attributes 11-16, 18-1F, 21-26, 28-2F ... F1-F6, F8-FF + * are inverse video + * Bit 3: Attributes 11-16, 18-1F, 21-26, 28-2F ... F1-F6, F8-FF + * are bold */ + + /* Set up colours */ + amber = makecol(0xf7, 0x7C, 0x34); + black = makecol(0x17, 0x0C, 0x00); + + /* Initialise the attribute mapping. Start by defaulting everything + * to black on amber, and with bold set by bit 3 */ + for (n = 0; n < 256; n++) { + boldcols[n] = (n & 8) != 0; + blinkcols[n][0] = normcols[n][0] = amber; + blinkcols[n][1] = normcols[n][1] = black; + } + + /* Colours 0x11-0xFF are controlled by bits 2 and 3 of the + * passed value. Exclude x0 and x8, which are always black on + * amber. */ + for (n = 0x11; n <= 0xFF; n++) { + if ((n & 7) == 0) + continue; + if (t3100e->attrmap & 4) /* Inverse */ + { + blinkcols[n][0] = normcols[n][0] = amber; + blinkcols[n][1] = normcols[n][1] = black; + } else /* Normal */ + { + blinkcols[n][0] = normcols[n][0] = black; + blinkcols[n][1] = normcols[n][1] = amber; + } + if (t3100e->attrmap & 8) + boldcols[n] = 1; /* Bold */ + } + /* Set up the 01-0E range, controlled by bits 0 and 1 of the + * passed value. When blinking is enabled this also affects 81-8E. */ + for (n = 0x01; n <= 0x0E; n++) { + if (n == 7) + continue; + if (t3100e->attrmap & 1) { + blinkcols[n][0] = normcols[n][0] = amber; + blinkcols[n][1] = normcols[n][1] = black; + blinkcols[n + 128][0] = amber; + blinkcols[n + 128][1] = black; + } else { + blinkcols[n][0] = normcols[n][0] = black; + blinkcols[n][1] = normcols[n][1] = amber; + blinkcols[n + 128][0] = black; + blinkcols[n + 128][1] = amber; + } + if (t3100e->attrmap & 2) + boldcols[n] = 1; + } + /* Colours 07 and 0F are always amber on black. If blinking is + * enabled so are 87 and 8F. */ + for (n = 0x07; n <= 0x0F; n += 8) { + blinkcols[n][0] = normcols[n][0] = black; + blinkcols[n][1] = normcols[n][1] = amber; + blinkcols[n + 128][0] = black; + blinkcols[n + 128][1] = amber; + } + /* When not blinking, colours 81-8F are always amber on black. */ + for (n = 0x81; n <= 0x8F; n++) { + normcols[n][0] = black; + normcols[n][1] = amber; + boldcols[n] = (n & 0x08) != 0; + } + + /* Finally do the ones which are solid black. These differ between + * the normal and blinking mappings */ + for (n = 0; n <= 0xFF; n += 0x11) { + normcols[n][0] = normcols[n][1] = black; + } + /* In the blinking range, 00 11 22 .. 77 and 80 91 A2 .. F7 are black */ + for (n = 0; n <= 0x77; n += 0x11) { + blinkcols[n][0] = blinkcols[n][1] = black; + blinkcols[n + 128][0] = blinkcols[n + 128][1] = black; + } +} + +void * +t3100e_init(const device_t *info) +{ + t3100e_t *t3100e = malloc(sizeof(t3100e_t)); + memset(t3100e, 0, sizeof(t3100e_t)); + loadfont("roms/machines/t3100e/t3100e_font.bin", 5); + cga_init(&t3100e->cga); + video_inform(VIDEO_FLAG_TYPE_CGA, &timing_t3100e); + + t3100e->internal = 1; + + /* 32k video RAM */ + t3100e->vram = malloc(0x8000); + + timer_set_callback(&t3100e->cga.timer, t3100e_poll); + timer_set_p(&t3100e->cga.timer, t3100e); + + /* Occupy memory between 0xB8000 and 0xBFFFF */ + mem_mapping_add(&t3100e->mapping, 0xb8000, 0x8000, t3100e_read, NULL, NULL, t3100e_write, NULL, NULL, NULL, 0, t3100e); + /* Respond to CGA I/O ports */ + io_sethandler(0x03d0, 0x000c, t3100e_in, NULL, NULL, t3100e_out, NULL, NULL, t3100e); + + /* Default attribute mapping is 4 */ + t3100e->attrmap = 4; + t3100e_recalcattrs(t3100e); + + /* Start off in 80x25 text mode */ + t3100e->cga.cgastat = 0xF4; + t3100e->cga.vram = t3100e->vram; + t3100e->enabled = 1; + t3100e->video_options = 0xFF; + return t3100e; +} + +void +t3100e_close(void *p) +{ + t3100e_t *t3100e = (t3100e_t *) p; + + free(t3100e->vram); + free(t3100e); +} + +void +t3100e_speed_changed(void *p) +{ + t3100e_t *t3100e = (t3100e_t *) p; + + t3100e_recalctimings(t3100e); } const device_t t3100e_device = { - .name = "Toshiba T3100e", + .name = "Toshiba T3100e", .internal_name = "t3100e", - .flags = 0, - .local = 0, - .init = t3100e_init, - .close = t3100e_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = t3100e_init, + .close = t3100e_close, + .reset = NULL, { .available = NULL }, .speed_changed = t3100e_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/machine/m_europc.c b/src/machine/m_europc.c index 905515225..2fdbc852f 100644 --- a/src/machine/m_europc.c +++ b/src/machine/m_europc.c @@ -105,65 +105,58 @@ #include <86box/video.h> #include <86box/machine.h> - -#define EUROPC_DEBUG 0 /* current debugging level */ - +#define EUROPC_DEBUG 0 /* current debugging level */ /* M3002 RTC chip registers. */ -#define MRTC_SECONDS 0x00 /* BCD, 00-59 */ -#define MRTC_MINUTES 0x01 /* BCD, 00-59 */ -#define MRTC_HOURS 0x02 /* BCD, 00-23 */ -#define MRTC_DAYS 0x03 /* BCD, 01-31 */ -#define MRTC_MONTHS 0x04 /* BCD, 01-12 */ -#define MRTC_YEARS 0x05 /* BCD, 00-99 (year only) */ -#define MRTC_WEEKDAY 0x06 /* BCD, 01-07 */ -#define MRTC_WEEKNO 0x07 /* BCD, 01-52 */ -#define MRTC_CONF_A 0x08 /* EuroPC config, binary */ -#define MRTC_CONF_B 0x09 /* EuroPC config, binary */ -#define MRTC_CONF_C 0x0a /* EuroPC config, binary */ -#define MRTC_CONF_D 0x0b /* EuroPC config, binary */ -#define MRTC_CONF_E 0x0c /* EuroPC config, binary */ -#define MRTC_CHECK_LO 0x0d /* Checksum, low byte */ -#define MRTC_CHECK_HI 0x0e /* Checksum, high byte */ -#define MRTC_CTRLSTAT 0x0f /* RTC control/status, binary */ +#define MRTC_SECONDS 0x00 /* BCD, 00-59 */ +#define MRTC_MINUTES 0x01 /* BCD, 00-59 */ +#define MRTC_HOURS 0x02 /* BCD, 00-23 */ +#define MRTC_DAYS 0x03 /* BCD, 01-31 */ +#define MRTC_MONTHS 0x04 /* BCD, 01-12 */ +#define MRTC_YEARS 0x05 /* BCD, 00-99 (year only) */ +#define MRTC_WEEKDAY 0x06 /* BCD, 01-07 */ +#define MRTC_WEEKNO 0x07 /* BCD, 01-52 */ +#define MRTC_CONF_A 0x08 /* EuroPC config, binary */ +#define MRTC_CONF_B 0x09 /* EuroPC config, binary */ +#define MRTC_CONF_C 0x0a /* EuroPC config, binary */ +#define MRTC_CONF_D 0x0b /* EuroPC config, binary */ +#define MRTC_CONF_E 0x0c /* EuroPC config, binary */ +#define MRTC_CHECK_LO 0x0d /* Checksum, low byte */ +#define MRTC_CHECK_HI 0x0e /* Checksum, high byte */ +#define MRTC_CTRLSTAT 0x0f /* RTC control/status, binary */ typedef struct { - uint16_t jim; /* JIM base address */ + uint16_t jim; /* JIM base address */ - uint8_t regs[16]; /* JIM internal regs (8) */ + uint8_t regs[16]; /* JIM internal regs (8) */ - nvr_t nvr; /* NVR */ - uint8_t nvr_stat; - uint8_t nvr_addr; + nvr_t nvr; /* NVR */ + uint8_t nvr_stat; + uint8_t nvr_addr; - void * mouse; + void *mouse; } europc_t; - static europc_t europc; - #ifdef ENABLE_EUROPC_LOG int europc_do_log = ENABLE_EUROPC_LOG; - static void europc_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (europc_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (europc_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define europc_log(fmt, ...) +# define europc_log(fmt, ...) #endif - /* * This is called every second through the NVR/RTC hook. * @@ -180,56 +173,55 @@ static void europc_rtc_tick(nvr_t *nvr) { uint8_t *regs; - int mon, yr; + int mon, yr; /* Only if RTC is running.. */ regs = nvr->regs; - if (! (regs[MRTC_CTRLSTAT] & 0x01)) return; + if (!(regs[MRTC_CTRLSTAT] & 0x01)) + return; regs[MRTC_SECONDS] = RTC_BCDINC(nvr->regs[MRTC_SECONDS], 1); if (regs[MRTC_SECONDS] >= RTC_BCD(60)) { - regs[MRTC_SECONDS] = RTC_BCD(0); - regs[MRTC_MINUTES] = RTC_BCDINC(regs[MRTC_MINUTES], 1); - if (regs[MRTC_MINUTES] >= RTC_BCD(60)) { - regs[MRTC_MINUTES] = RTC_BCD(0); - regs[MRTC_HOURS] = RTC_BCDINC(regs[MRTC_HOURS], 1); - if (regs[MRTC_HOURS] >= RTC_BCD(24)) { - regs[MRTC_HOURS] = RTC_BCD(0); - regs[MRTC_DAYS] = RTC_BCDINC(regs[MRTC_DAYS], 1); - mon = RTC_DCB(regs[MRTC_MONTHS]); - yr = RTC_DCB(regs[MRTC_YEARS]) + 1900; - if (RTC_DCB(regs[MRTC_DAYS]) > nvr_get_days(mon, yr)) { - regs[MRTC_DAYS] = RTC_BCD(1); - regs[MRTC_MONTHS] = RTC_BCDINC(regs[MRTC_MONTHS], 1); - if (regs[MRTC_MONTHS] > RTC_BCD(12)) { - regs[MRTC_MONTHS] = RTC_BCD(1); - regs[MRTC_YEARS] = RTC_BCDINC(regs[MRTC_YEARS], 1) & 0xff; - } - } - } - } + regs[MRTC_SECONDS] = RTC_BCD(0); + regs[MRTC_MINUTES] = RTC_BCDINC(regs[MRTC_MINUTES], 1); + if (regs[MRTC_MINUTES] >= RTC_BCD(60)) { + regs[MRTC_MINUTES] = RTC_BCD(0); + regs[MRTC_HOURS] = RTC_BCDINC(regs[MRTC_HOURS], 1); + if (regs[MRTC_HOURS] >= RTC_BCD(24)) { + regs[MRTC_HOURS] = RTC_BCD(0); + regs[MRTC_DAYS] = RTC_BCDINC(regs[MRTC_DAYS], 1); + mon = RTC_DCB(regs[MRTC_MONTHS]); + yr = RTC_DCB(regs[MRTC_YEARS]) + 1900; + if (RTC_DCB(regs[MRTC_DAYS]) > nvr_get_days(mon, yr)) { + regs[MRTC_DAYS] = RTC_BCD(1); + regs[MRTC_MONTHS] = RTC_BCDINC(regs[MRTC_MONTHS], 1); + if (regs[MRTC_MONTHS] > RTC_BCD(12)) { + regs[MRTC_MONTHS] = RTC_BCD(1); + regs[MRTC_YEARS] = RTC_BCDINC(regs[MRTC_YEARS], 1) & 0xff; + } + } + } + } } } - /* Get the current NVR time. */ static void rtc_time_get(uint8_t *regs, struct tm *tm) { /* NVR is in BCD data mode. */ - tm->tm_sec = RTC_DCB(regs[MRTC_SECONDS]); - tm->tm_min = RTC_DCB(regs[MRTC_MINUTES]); + tm->tm_sec = RTC_DCB(regs[MRTC_SECONDS]); + tm->tm_min = RTC_DCB(regs[MRTC_MINUTES]); tm->tm_hour = RTC_DCB(regs[MRTC_HOURS]); tm->tm_wday = (RTC_DCB(regs[MRTC_WEEKDAY]) - 1); tm->tm_mday = RTC_DCB(regs[MRTC_DAYS]); - tm->tm_mon = (RTC_DCB(regs[MRTC_MONTHS]) - 1); + tm->tm_mon = (RTC_DCB(regs[MRTC_MONTHS]) - 1); tm->tm_year = RTC_DCB(regs[MRTC_YEARS]); #if USE_Y2K tm->tm_year += (RTC_DCB(regs[MRTC_CENTURY]) * 100) - 1900; #endif } - /* Set the current NVR time. */ static void rtc_time_set(uint8_t *regs, struct tm *tm) @@ -237,17 +229,16 @@ rtc_time_set(uint8_t *regs, struct tm *tm) /* NVR is in BCD data mode. */ regs[MRTC_SECONDS] = RTC_BCD(tm->tm_sec); regs[MRTC_MINUTES] = RTC_BCD(tm->tm_min); - regs[MRTC_HOURS] = RTC_BCD(tm->tm_hour); + regs[MRTC_HOURS] = RTC_BCD(tm->tm_hour); regs[MRTC_WEEKDAY] = RTC_BCD(tm->tm_wday + 1); - regs[MRTC_DAYS] = RTC_BCD(tm->tm_mday); - regs[MRTC_MONTHS] = RTC_BCD(tm->tm_mon + 1); - regs[MRTC_YEARS] = RTC_BCD(tm->tm_year % 100); + regs[MRTC_DAYS] = RTC_BCD(tm->tm_mday); + regs[MRTC_MONTHS] = RTC_BCD(tm->tm_mon + 1); + regs[MRTC_YEARS] = RTC_BCD(tm->tm_year % 100); #if USE_Y2K - regs[MRTC_CENTURY] = RTC_BCD((tm->tm_year+1900) / 100); + regs[MRTC_CENTURY] = RTC_BCD((tm->tm_year + 1900) / 100); #endif } - static void rtc_start(nvr_t *nvr) { @@ -255,13 +246,13 @@ rtc_start(nvr_t *nvr) /* Initialize the internal and chip times. */ if (time_sync & TIME_SYNC_ENABLED) { - /* Use the internal clock's time. */ - nvr_time_get(&tm); - rtc_time_set(nvr->regs, &tm); + /* Use the internal clock's time. */ + nvr_time_get(&tm); + rtc_time_set(nvr->regs, &tm); } else { - /* Set the internal clock from the chip time. */ - rtc_time_get(nvr->regs, &tm); - nvr_time_set(&tm); + /* Set the internal clock from the chip time. */ + rtc_time_get(nvr->regs, &tm); + nvr_time_set(&tm); } #if 0 @@ -270,36 +261,34 @@ rtc_start(nvr_t *nvr) #endif } - /* Create a valid checksum for the current NVR data. */ static uint8_t rtc_checksum(uint8_t *ptr) { uint8_t sum; - int i; + int i; /* Calculate all bytes with XOR. */ sum = 0x00; - for (i=MRTC_CONF_A; i<=MRTC_CONF_E; i++) - sum += ptr[i]; + for (i = MRTC_CONF_A; i <= MRTC_CONF_E; i++) + sum += ptr[i]; - return(sum); + return (sum); } - /* Reset the machine's NVR to a sane state. */ static void rtc_reset(nvr_t *nvr) { /* Initialize the RTC to a known state. */ - nvr->regs[MRTC_SECONDS] = RTC_BCD(0); /* seconds */ - nvr->regs[MRTC_MINUTES] = RTC_BCD(0); /* minutes */ - nvr->regs[MRTC_HOURS] = RTC_BCD(0); /* hours */ - nvr->regs[MRTC_DAYS] = RTC_BCD(1); /* days */ - nvr->regs[MRTC_MONTHS] = RTC_BCD(1); /* months */ - nvr->regs[MRTC_YEARS] = RTC_BCD(80); /* years */ - nvr->regs[MRTC_WEEKDAY] = RTC_BCD(1); /* weekday */ - nvr->regs[MRTC_WEEKNO] = RTC_BCD(1); /* weekno */ + nvr->regs[MRTC_SECONDS] = RTC_BCD(0); /* seconds */ + nvr->regs[MRTC_MINUTES] = RTC_BCD(0); /* minutes */ + nvr->regs[MRTC_HOURS] = RTC_BCD(0); /* hours */ + nvr->regs[MRTC_DAYS] = RTC_BCD(1); /* days */ + nvr->regs[MRTC_MONTHS] = RTC_BCD(1); /* months */ + nvr->regs[MRTC_YEARS] = RTC_BCD(80); /* years */ + nvr->regs[MRTC_WEEKDAY] = RTC_BCD(1); /* weekday */ + nvr->regs[MRTC_WEEKNO] = RTC_BCD(1); /* weekno */ /* * EuroPC System Configuration: @@ -349,214 +338,210 @@ rtc_reset(nvr_t *nvr) * [E] 7:4 unknown * 3:0 country (00=Deutschland, 0A=ASCII) */ - nvr->regs[MRTC_CONF_A] = 0x00; /* CONFIG A */ - nvr->regs[MRTC_CONF_B] = 0x0A; /* CONFIG B */ - nvr->regs[MRTC_CONF_C] = 0x28; /* CONFIG C */ - nvr->regs[MRTC_CONF_D] = 0x12; /* CONFIG D */ - nvr->regs[MRTC_CONF_E] = 0x0A; /* CONFIG E */ + nvr->regs[MRTC_CONF_A] = 0x00; /* CONFIG A */ + nvr->regs[MRTC_CONF_B] = 0x0A; /* CONFIG B */ + nvr->regs[MRTC_CONF_C] = 0x28; /* CONFIG C */ + nvr->regs[MRTC_CONF_D] = 0x12; /* CONFIG D */ + nvr->regs[MRTC_CONF_E] = 0x0A; /* CONFIG E */ - nvr->regs[MRTC_CHECK_LO] = 0x00; /* checksum (LO) */ - nvr->regs[MRTC_CHECK_HI] = 0x00; /* checksum (HI) */ + nvr->regs[MRTC_CHECK_LO] = 0x00; /* checksum (LO) */ + nvr->regs[MRTC_CHECK_HI] = 0x00; /* checksum (HI) */ - nvr->regs[MRTC_CTRLSTAT] = 0x01; /* status/control */ + nvr->regs[MRTC_CTRLSTAT] = 0x01; /* status/control */ /* Generate a valid checksum. */ nvr->regs[MRTC_CHECK_LO] = rtc_checksum(nvr->regs); } - /* Execute a JIM control command. */ static void jim_set(europc_t *sys, uint8_t reg, uint8_t val) { - switch(reg) { - case 0: /* MISC control (WO) */ - // bit0: enable MOUSE - // bit1: enable joystick - break; + switch (reg) { + case 0: /* MISC control (WO) */ + // bit0: enable MOUSE + // bit1: enable joystick + break; - case 2: /* AGA control */ - if (! (val & 0x80)) { - /* Reset AGA. */ - break; - } + case 2: /* AGA control */ + if (!(val & 0x80)) { + /* Reset AGA. */ + break; + } - switch (val) { - case 0x1f: /* 0001 1111 */ - case 0x0b: /* 0000 1011 */ - //europc_jim.mode=AGA_MONO; - europc_log("EuroPC: AGA Monochrome mode!\n"); - break; + switch (val) { + case 0x1f: /* 0001 1111 */ + case 0x0b: /* 0000 1011 */ + // europc_jim.mode=AGA_MONO; + europc_log("EuroPC: AGA Monochrome mode!\n"); + break; - case 0x18: /* 0001 1000 */ - case 0x1a: /* 0001 1010 */ - //europc_jim.mode=AGA_COLOR; - break; + case 0x18: /* 0001 1000 */ + case 0x1a: /* 0001 1010 */ + // europc_jim.mode=AGA_COLOR; + break; - case 0x0e: /* 0000 1100 */ - /*80 columns? */ - europc_log("EuroPC: AGA 80-column mode!\n"); - break; + case 0x0e: /* 0000 1100 */ + /*80 columns? */ + europc_log("EuroPC: AGA 80-column mode!\n"); + break; - case 0x0d: /* 0000 1011 */ - /*40 columns? */ - europc_log("EuroPC: AGA 40-column mode!\n"); - break; + case 0x0d: /* 0000 1011 */ + /*40 columns? */ + europc_log("EuroPC: AGA 40-column mode!\n"); + break; - default: - //europc_jim.mode=AGA_OFF; - break; - } - break; + default: + // europc_jim.mode=AGA_OFF; + break; + } + break; - case 4: /* CPU Speed control */ - switch(val & 0xc0) { - case 0x00: /* 4.77 MHz */ -// cpu_set_clockscale(0, 1.0/2); - break; + case 4: /* CPU Speed control */ + switch (val & 0xc0) { + case 0x00: /* 4.77 MHz */ + // cpu_set_clockscale(0, 1.0/2); + break; - case 0x40: /* 7.16 MHz */ -// cpu_set_clockscale(0, 3.0/4); - break; + case 0x40: /* 7.16 MHz */ + // cpu_set_clockscale(0, 3.0/4); + break; - default: /* 9.54 MHz */ -// cpu_set_clockscale(0, 1);break; - break; - } - break; + default: /* 9.54 MHz */ + // cpu_set_clockscale(0, 1);break; + break; + } + break; - default: - break; + default: + break; } sys->regs[reg] = val; } - /* Write to one of the JIM registers. */ static void jim_write(uint16_t addr, uint8_t val, void *priv) { - europc_t *sys = (europc_t *)priv; - uint8_t b; + europc_t *sys = (europc_t *) priv; + uint8_t b; #if EUROPC_DEBUG > 1 europc_log("EuroPC: jim_wr(%04x, %02x)\n", addr, val); #endif switch (addr & 0x000f) { - case 0x00: /* JIM internal registers (WRONLY) */ - case 0x01: - case 0x02: - case 0x03: - case 0x04: /* JIM internal registers (R/W) */ - case 0x05: - case 0x06: - case 0x07: - jim_set(sys, (addr & 0x07), val); - break; + case 0x00: /* JIM internal registers (WRONLY) */ + case 0x01: + case 0x02: + case 0x03: + case 0x04: /* JIM internal registers (R/W) */ + case 0x05: + case 0x06: + case 0x07: + jim_set(sys, (addr & 0x07), val); + break; - case 0x0a: /* M3002 RTC INDEX/DATA register */ - switch(sys->nvr_stat) { - case 0: /* save index */ - sys->nvr_addr = val & 0x0f; - sys->nvr_stat++; - break; + case 0x0a: /* M3002 RTC INDEX/DATA register */ + switch (sys->nvr_stat) { + case 0: /* save index */ + sys->nvr_addr = val & 0x0f; + sys->nvr_stat++; + break; - case 1: /* save data HI nibble */ - b = sys->nvr.regs[sys->nvr_addr] & 0x0f; - b |= (val << 4); - sys->nvr.regs[sys->nvr_addr] = b; - sys->nvr_stat++; - nvr_dosave++; - break; + case 1: /* save data HI nibble */ + b = sys->nvr.regs[sys->nvr_addr] & 0x0f; + b |= (val << 4); + sys->nvr.regs[sys->nvr_addr] = b; + sys->nvr_stat++; + nvr_dosave++; + break; - case 2: /* save data LO nibble */ - b = sys->nvr.regs[sys->nvr_addr] & 0xf0; - b |= (val & 0x0f); - sys->nvr.regs[sys->nvr_addr] = b; - sys->nvr_stat = 0; - nvr_dosave++; - break; - } - break; + case 2: /* save data LO nibble */ + b = sys->nvr.regs[sys->nvr_addr] & 0xf0; + b |= (val & 0x0f); + sys->nvr.regs[sys->nvr_addr] = b; + sys->nvr_stat = 0; + nvr_dosave++; + break; + } + break; - default: - europc_log("EuroPC: invalid JIM write %02x, val %02x\n", addr, val); - break; + default: + europc_log("EuroPC: invalid JIM write %02x, val %02x\n", addr, val); + break; } } - /* Read from one of the JIM registers. */ static uint8_t jim_read(uint16_t addr, void *priv) { - europc_t *sys = (europc_t *)priv; - uint8_t r = 0xff; + europc_t *sys = (europc_t *) priv; + uint8_t r = 0xff; switch (addr & 0x000f) { - case 0x00: /* JIM internal registers (WRONLY) */ - case 0x01: - case 0x02: - case 0x03: - r = 0x00; - break; + case 0x00: /* JIM internal registers (WRONLY) */ + case 0x01: + case 0x02: + case 0x03: + r = 0x00; + break; - case 0x04: /* JIM internal registers (R/W) */ - case 0x05: - case 0x06: - case 0x07: - r = sys->regs[addr & 0x07]; - break; + case 0x04: /* JIM internal registers (R/W) */ + case 0x05: + case 0x06: + case 0x07: + r = sys->regs[addr & 0x07]; + break; - case 0x0a: /* M3002 RTC INDEX/DATA register */ - switch(sys->nvr_stat) { - case 0: - r = 0x00; - break; + case 0x0a: /* M3002 RTC INDEX/DATA register */ + switch (sys->nvr_stat) { + case 0: + r = 0x00; + break; - case 1: /* read data HI nibble */ - r = (sys->nvr.regs[sys->nvr_addr] >> 4); - sys->nvr_stat++; - break; + case 1: /* read data HI nibble */ + r = (sys->nvr.regs[sys->nvr_addr] >> 4); + sys->nvr_stat++; + break; - case 2: /* read data LO nibble */ - r = (sys->nvr.regs[sys->nvr_addr] & 0x0f); - sys->nvr_stat = 0; - break; - } - break; + case 2: /* read data LO nibble */ + r = (sys->nvr.regs[sys->nvr_addr] & 0x0f); + sys->nvr_stat = 0; + break; + } + break; - default: - europc_log("EuroPC: invalid JIM read %02x\n", addr); - break; + default: + europc_log("EuroPC: invalid JIM read %02x\n", addr); + break; } #if EUROPC_DEBUG > 1 europc_log("EuroPC: jim_rd(%04x): %02x\n", addr, r); #endif - return(r); + return (r); } - /* Initialize the mainboard 'device' of the machine. */ static void * europc_boot(const device_t *info) { europc_t *sys = &europc; - uint8_t b; + uint8_t b; #if EUROPC_DEBUG europc_log("EuroPC: booting mainboard..\n"); #endif europc_log("EuroPC: NVR=[ %02x %02x %02x %02x %02x ] %sVALID\n", - sys->nvr.regs[MRTC_CONF_A], sys->nvr.regs[MRTC_CONF_B], - sys->nvr.regs[MRTC_CONF_C], sys->nvr.regs[MRTC_CONF_D], - sys->nvr.regs[MRTC_CONF_E], - (sys->nvr.regs[MRTC_CHECK_LO]!=rtc_checksum(sys->nvr.regs))?"IN":""); + sys->nvr.regs[MRTC_CONF_A], sys->nvr.regs[MRTC_CONF_B], + sys->nvr.regs[MRTC_CONF_C], sys->nvr.regs[MRTC_CONF_D], + sys->nvr.regs[MRTC_CONF_E], + (sys->nvr.regs[MRTC_CHECK_LO] != rtc_checksum(sys->nvr.regs)) ? "IN" : ""); /* * Now that we have initialized the NVR (either from file, @@ -566,57 +551,57 @@ europc_boot(const device_t *info) b = (sys->nvr.regs[MRTC_CONF_D] & ~0x17); video_reset(gfxcard); if (video_is_cga()) - b |= 0x12; /* external video, CGA80 */ + b |= 0x12; /* external video, CGA80 */ else if (video_is_mda()) - b |= 0x03; /* external video, mono */ + b |= 0x03; /* external video, mono */ else - b |= 0x10; /* external video, special */ + b |= 0x10; /* external video, special */ sys->nvr.regs[MRTC_CONF_D] = b; /* Update the memory size. */ b = (sys->nvr.regs[MRTC_CONF_C] & 0xf3); - switch(mem_size) { - case 256: - b |= 0x04; - break; + switch (mem_size) { + case 256: + b |= 0x04; + break; - case 512: - b |= 0x08; - break; + case 512: + b |= 0x08; + break; - case 640: - b |= 0x00; - break; + case 640: + b |= 0x00; + break; } sys->nvr.regs[MRTC_CONF_C] = b; /* Update CPU speed. */ b = (sys->nvr.regs[MRTC_CONF_D] & 0x3f); - switch(cpu) { - case 0: /* 8088, 4.77 MHz */ - b |= 0x00; - break; + switch (cpu) { + case 0: /* 8088, 4.77 MHz */ + b |= 0x00; + break; - case 1: /* 8088, 7.15 MHz */ - b |= 0x40; - break; + case 1: /* 8088, 7.15 MHz */ + b |= 0x40; + break; - case 2: /* 8088, 9.56 MHz */ - b |= 0x80; - break; + case 2: /* 8088, 9.56 MHz */ + b |= 0x80; + break; } sys->nvr.regs[MRTC_CONF_D] = b; /* Set up game port. */ b = (sys->nvr.regs[MRTC_CONF_C] & 0xfc); if (mouse_type == MOUSE_TYPE_INTERNAL) { - sys->mouse = device_add(&mouse_logibus_onboard_device); - mouse_bus_set_irq(sys->mouse, 2); - /* Configure the port for (Bus Mouse Compatible) Mouse. */ - b |= 0x01; + sys->mouse = device_add(&mouse_logibus_onboard_device); + mouse_bus_set_irq(sys->mouse, 2); + /* Configure the port for (Bus Mouse Compatible) Mouse. */ + b |= 0x01; } else if (joystick_type) - b |= 0x02; /* enable port as joysticks */ + b |= 0x02; /* enable port as joysticks */ sys->nvr.regs[MRTC_CONF_C] = b; #if 0 @@ -637,36 +622,36 @@ europc_boot(const device_t *info) * the way of other cards that need this range. */ io_sethandler(sys->jim, 16, - jim_read,NULL,NULL, jim_write,NULL,NULL, sys); + jim_read, NULL, NULL, jim_write, NULL, NULL, sys); /* Only after JIM has been initialized. */ - (void)device_add(&keyboard_xt_device); + (void) device_add(&keyboard_xt_device); /* Enable and set up the FDC. */ - (void)device_add(&fdc_xt_device); + (void) device_add(&fdc_xt_device); - /* + /* * Set up and enable the HD20 disk controller. * * We only do this if we have not configured another one. */ if (hdc_current == 1) - (void)device_add(&xta_hd20_device); + (void) device_add(&xta_hd20_device); - return(sys); + return (sys); } - static void europc_close(void *priv) { nvr_t *nvr = &europc.nvr; if (nvr->fn != NULL) - free(nvr->fn); + free(nvr->fn); } static const device_config_t europc_config[] = { + // clang-format off { .name = "js9", .description = "JS9 Jumper (JIM)", @@ -682,20 +667,21 @@ static const device_config_t europc_config[] = { }, }, { .name = "", .description = "", .type = CONFIG_END } + // clang-format on }; const device_t europc_device = { - .name = "EuroPC System Board", + .name = "EuroPC System Board", .internal_name = "europc", - .flags = 0, - .local = 0, - .init = europc_boot, - .close = europc_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = europc_boot, + .close = europc_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = europc_config + .force_redraw = NULL, + .config = europc_config }; /* @@ -712,10 +698,10 @@ machine_europc_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/europc/50145", - 0x000f8000, 32768, 0); + 0x000f8000, 32768, 0); if (bios_only || !ret) - return ret; + return ret; machine_common_init(model); pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt); @@ -728,12 +714,12 @@ machine_europc_init(const machine_t *model) /* This is machine specific. */ europc.nvr.size = model->nvrmask + 1; - europc.nvr.irq = -1; + europc.nvr.irq = -1; /* Set up any local handlers here. */ europc.nvr.reset = rtc_reset; europc.nvr.start = rtc_start; - europc.nvr.tick = europc_rtc_tick; + europc.nvr.tick = europc_rtc_tick; /* Initialize the actual NVR. */ nvr_init(&europc.nvr); diff --git a/src/machine/m_pcjr.c b/src/machine/m_pcjr.c index 2665ea164..0ea34ea19 100644 --- a/src/machine/m_pcjr.c +++ b/src/machine/m_pcjr.c @@ -49,58 +49,55 @@ #include <86box/vid_cga_comp.h> #include <86box/machine.h> +#define PCJR_RGB 0 +#define PCJR_COMPOSITE 1 -#define PCJR_RGB 0 -#define PCJR_COMPOSITE 1 - -#define STAT_PARITY 0x80 -#define STAT_RTIMEOUT 0x40 -#define STAT_TTIMEOUT 0x20 -#define STAT_LOCK 0x10 -#define STAT_CD 0x08 -#define STAT_SYSFLAG 0x04 -#define STAT_IFULL 0x02 -#define STAT_OFULL 0x01 - +#define STAT_PARITY 0x80 +#define STAT_RTIMEOUT 0x40 +#define STAT_TTIMEOUT 0x20 +#define STAT_LOCK 0x10 +#define STAT_CD 0x08 +#define STAT_SYSFLAG 0x04 +#define STAT_IFULL 0x02 +#define STAT_OFULL 0x01 typedef struct { /* Video Controller stuff. */ mem_mapping_t mapping; - uint8_t crtc[32]; - int crtcreg; - int array_index; - uint8_t array[32]; - int array_ff; - int memctrl; - uint8_t stat; - int addr_mode; - uint8_t *vram, - *b8000; - int linepos, displine; - int sc, vc; - int dispon; - int con, coff, cursoron, blink; - int vsynctime; - int fullchange; - int vadj; - uint16_t ma, maback; - uint64_t dispontime, dispofftime; - pc_timer_t timer; - int firstline, lastline; - int composite; + uint8_t crtc[32]; + int crtcreg; + int array_index; + uint8_t array[32]; + int array_ff; + int memctrl; + uint8_t stat; + int addr_mode; + uint8_t *vram, + *b8000; + int linepos, displine; + int sc, vc; + int dispon; + int con, coff, cursoron, blink; + int vsynctime; + int fullchange; + int vadj; + uint16_t ma, maback; + uint64_t dispontime, dispofftime; + pc_timer_t timer; + int firstline, lastline; + int composite; /* Keyboard Controller stuff. */ - int latched; - int data; - int serial_data[44]; - int serial_pos; - uint8_t pa; - uint8_t pb; - pc_timer_t send_delay_timer; + int latched; + int data; + int serial_data[44]; + int serial_pos; + uint8_t pa; + uint8_t pb; + pc_timer_t send_delay_timer; } pcjr_t; -static video_timings_t timing_dram = {VIDEO_BUS, 0,0,0, 0,0,0}; /*No additional waitstates*/ - +static video_timings_t timing_dram = { VIDEO_BUS, 0, 0, 0, 0, 0, 0 }; /*No additional waitstates*/ static uint8_t crtcmask[32] = { 0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f, @@ -108,664 +105,611 @@ static uint8_t crtcmask[32] = { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; -static uint8_t key_queue[16]; -static int key_queue_start = 0, - key_queue_end = 0; - +static uint8_t key_queue[16]; +static int key_queue_start = 0, + key_queue_end = 0; static void recalc_address(pcjr_t *pcjr) { if ((pcjr->memctrl & 0xc0) == 0xc0) { - pcjr->vram = &ram[(pcjr->memctrl & 0x06) << 14]; - pcjr->b8000 = &ram[(pcjr->memctrl & 0x30) << 11]; + pcjr->vram = &ram[(pcjr->memctrl & 0x06) << 14]; + pcjr->b8000 = &ram[(pcjr->memctrl & 0x30) << 11]; } else { - pcjr->vram = &ram[(pcjr->memctrl & 0x07) << 14]; - pcjr->b8000 = &ram[(pcjr->memctrl & 0x38) << 11]; + pcjr->vram = &ram[(pcjr->memctrl & 0x07) << 14]; + pcjr->b8000 = &ram[(pcjr->memctrl & 0x38) << 11]; } } - static void recalc_timings(pcjr_t *pcjr) { double _dispontime, _dispofftime, disptime; if (pcjr->array[0] & 1) { - disptime = pcjr->crtc[0] + 1; - _dispontime = pcjr->crtc[1]; + disptime = pcjr->crtc[0] + 1; + _dispontime = pcjr->crtc[1]; } else { - disptime = (pcjr->crtc[0] + 1) << 1; - _dispontime = pcjr->crtc[1] << 1; + disptime = (pcjr->crtc[0] + 1) << 1; + _dispontime = pcjr->crtc[1] << 1; } _dispofftime = disptime - _dispontime; - _dispontime *= CGACONST; + _dispontime *= CGACONST; _dispofftime *= CGACONST; - pcjr->dispontime = (uint64_t)(_dispontime); - pcjr->dispofftime = (uint64_t)(_dispofftime); + pcjr->dispontime = (uint64_t) (_dispontime); + pcjr->dispofftime = (uint64_t) (_dispofftime); } - static void vid_out(uint16_t addr, uint8_t val, void *p) { - pcjr_t *pcjr = (pcjr_t *)p; + pcjr_t *pcjr = (pcjr_t *) p; uint8_t old; switch (addr) { - case 0x3d4: - pcjr->crtcreg = val & 0x1f; - return; + case 0x3d4: + pcjr->crtcreg = val & 0x1f; + return; - case 0x3d5: - old = pcjr->crtc[pcjr->crtcreg]; - pcjr->crtc[pcjr->crtcreg] = val & crtcmask[pcjr->crtcreg]; - if (old != val) { - if (pcjr->crtcreg < 0xe || pcjr->crtcreg > 0x10) { - pcjr->fullchange = changeframecount; - recalc_timings(pcjr); - } - } - return; + case 0x3d5: + old = pcjr->crtc[pcjr->crtcreg]; + pcjr->crtc[pcjr->crtcreg] = val & crtcmask[pcjr->crtcreg]; + if (old != val) { + if (pcjr->crtcreg < 0xe || pcjr->crtcreg > 0x10) { + pcjr->fullchange = changeframecount; + recalc_timings(pcjr); + } + } + return; - case 0x3da: - if (!pcjr->array_ff) - pcjr->array_index = val & 0x1f; - else { - if (pcjr->array_index & 0x10) - val &= 0x0f; - pcjr->array[pcjr->array_index & 0x1f] = val; - if (!(pcjr->array_index & 0x1f)) - update_cga16_color(val); - } - pcjr->array_ff = !pcjr->array_ff; - break; + case 0x3da: + if (!pcjr->array_ff) + pcjr->array_index = val & 0x1f; + else { + if (pcjr->array_index & 0x10) + val &= 0x0f; + pcjr->array[pcjr->array_index & 0x1f] = val; + if (!(pcjr->array_index & 0x1f)) + update_cga16_color(val); + } + pcjr->array_ff = !pcjr->array_ff; + break; - case 0x3df: - pcjr->memctrl = val; - pcjr->addr_mode = val >> 6; - recalc_address(pcjr); - break; + case 0x3df: + pcjr->memctrl = val; + pcjr->addr_mode = val >> 6; + recalc_address(pcjr); + break; } } - static uint8_t vid_in(uint16_t addr, void *p) { - pcjr_t *pcjr = (pcjr_t *)p; - uint8_t ret = 0xff; + pcjr_t *pcjr = (pcjr_t *) p; + uint8_t ret = 0xff; switch (addr) { - case 0x3d4: - ret = pcjr->crtcreg; - break; + case 0x3d4: + ret = pcjr->crtcreg; + break; - case 0x3d5: - ret = pcjr->crtc[pcjr->crtcreg]; - break; + case 0x3d5: + ret = pcjr->crtc[pcjr->crtcreg]; + break; - case 0x3da: - pcjr->array_ff = 0; - pcjr->stat ^= 0x10; - ret = pcjr->stat; - break; + case 0x3da: + pcjr->array_ff = 0; + pcjr->stat ^= 0x10; + ret = pcjr->stat; + break; } - return(ret); + return (ret); } - static void vid_write(uint32_t addr, uint8_t val, void *p) { - pcjr_t *pcjr = (pcjr_t *)p; + pcjr_t *pcjr = (pcjr_t *) p; - if (pcjr->memctrl == -1) return; + if (pcjr->memctrl == -1) + return; pcjr->b8000[addr & 0x3fff] = val; } - static uint8_t vid_read(uint32_t addr, void *p) { - pcjr_t *pcjr = (pcjr_t *)p; + pcjr_t *pcjr = (pcjr_t *) p; - if (pcjr->memctrl == -1) return(0xff); + if (pcjr->memctrl == -1) + return (0xff); - return(pcjr->b8000[addr & 0x3fff]); + return (pcjr->b8000[addr & 0x3fff]); } - static void vid_poll(void *p) { - pcjr_t *pcjr = (pcjr_t *)p; - uint16_t ca = (pcjr->crtc[15] | (pcjr->crtc[14] << 8)) & 0x3fff; - int drawcursor; - int x, c, xs_temp, ys_temp; - int oldvc; - uint8_t chr, attr; + pcjr_t *pcjr = (pcjr_t *) p; + uint16_t ca = (pcjr->crtc[15] | (pcjr->crtc[14] << 8)) & 0x3fff; + int drawcursor; + int x, c, xs_temp, ys_temp; + int oldvc; + uint8_t chr, attr; uint16_t dat; - int cols[4]; - int oldsc; + int cols[4]; + int oldsc; - if (! pcjr->linepos) { - timer_advance_u64(&pcjr->timer, pcjr->dispofftime); - pcjr->stat &= ~1; - pcjr->linepos = 1; - oldsc = pcjr->sc; - if ((pcjr->crtc[8] & 3) == 3) - pcjr->sc = (pcjr->sc << 1) & 7; - if (pcjr->dispon) { - uint16_t offset = 0; - uint16_t mask = 0x1fff; + if (!pcjr->linepos) { + timer_advance_u64(&pcjr->timer, pcjr->dispofftime); + pcjr->stat &= ~1; + pcjr->linepos = 1; + oldsc = pcjr->sc; + if ((pcjr->crtc[8] & 3) == 3) + pcjr->sc = (pcjr->sc << 1) & 7; + if (pcjr->dispon) { + uint16_t offset = 0; + uint16_t mask = 0x1fff; - if (pcjr->displine < pcjr->firstline) { - pcjr->firstline = pcjr->displine; - video_wait_for_buffer(); - } - pcjr->lastline = pcjr->displine; - cols[0] = (pcjr->array[2] & 0xf) + 16; - for (c = 0; c < 8; c++) { - ((uint32_t *)buffer32->line[pcjr->displine])[c] = cols[0]; - if (pcjr->array[0] & 1) { - buffer32->line[(pcjr->displine << 1)][c + (pcjr->crtc[1] << 3) + 8] = - buffer32->line[(pcjr->displine << 1) + 1][c + (pcjr->crtc[1] << 3) + 8] = cols[0]; - } else { - buffer32->line[(pcjr->displine << 1)][c + (pcjr->crtc[1] << 4) + 8] = - buffer32->line[(pcjr->displine << 1) + 1][c + (pcjr->crtc[1] << 4) + 8] = cols[0]; - } - } + if (pcjr->displine < pcjr->firstline) { + pcjr->firstline = pcjr->displine; + video_wait_for_buffer(); + } + pcjr->lastline = pcjr->displine; + cols[0] = (pcjr->array[2] & 0xf) + 16; + for (c = 0; c < 8; c++) { + ((uint32_t *) buffer32->line[pcjr->displine])[c] = cols[0]; + if (pcjr->array[0] & 1) { + buffer32->line[(pcjr->displine << 1)][c + (pcjr->crtc[1] << 3) + 8] = buffer32->line[(pcjr->displine << 1) + 1][c + (pcjr->crtc[1] << 3) + 8] = cols[0]; + } else { + buffer32->line[(pcjr->displine << 1)][c + (pcjr->crtc[1] << 4) + 8] = buffer32->line[(pcjr->displine << 1) + 1][c + (pcjr->crtc[1] << 4) + 8] = cols[0]; + } + } - switch (pcjr->addr_mode) { - case 0: /*Alpha*/ - offset = 0; - mask = 0x3fff; - break; - case 1: /*Low resolution graphics*/ - offset = (pcjr->sc & 1) * 0x2000; - break; - case 3: /*High resolution graphics*/ - offset = (pcjr->sc & 3) * 0x2000; - break; - } - switch ((pcjr->array[0] & 0x13) | ((pcjr->array[3] & 0x08) << 5)) { - case 0x13: /*320x200x16*/ - for (x = 0; x < pcjr->crtc[1]; x++) { - dat = (pcjr->vram[((pcjr->ma << 1) & mask) + offset] << 8) | - pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; - pcjr->ma++; - buffer32->line[(pcjr->displine << 1)][(x << 3) + 8] = buffer32->line[(pcjr->displine << 1)][(x << 3) + 9] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 8] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 9] = - pcjr->array[((dat >> 12) & pcjr->array[1]) + 16] + 16; - buffer32->line[(pcjr->displine << 1)][(x << 3) + 10] = buffer32->line[(pcjr->displine << 1)][(x << 3) + 11] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 10] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 11] = - pcjr->array[((dat >> 8) & pcjr->array[1]) + 16] + 16; - buffer32->line[(pcjr->displine << 1)][(x << 3) + 12] = buffer32->line[(pcjr->displine << 1)][(x << 3) + 13] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 12] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 13] = - pcjr->array[((dat >> 4) & pcjr->array[1]) + 16] + 16; - buffer32->line[(pcjr->displine << 1)][(x << 3) + 14] = buffer32->line[(pcjr->displine << 1)][(x << 3) + 15] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 14] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 15] = - pcjr->array[(dat & pcjr->array[1]) + 16] + 16; - } - break; - case 0x12: /*160x200x16*/ - for (x = 0; x < pcjr->crtc[1]; x++) { - dat = (pcjr->vram[((pcjr->ma << 1) & mask) + offset] << 8) | - pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; - pcjr->ma++; - buffer32->line[(pcjr->displine << 1)][(x << 4) + 8] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 9] = - buffer32->line[(pcjr->displine << 1)][(x << 4) + 10] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 11] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 8] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 9] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 10] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 11] = - pcjr->array[((dat >> 12) & pcjr->array[1]) + 16] + 16; - buffer32->line[(pcjr->displine << 1)][(x << 4) + 12] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 13] = - buffer32->line[(pcjr->displine << 1)][(x << 4) + 14] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 15] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 12] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 13] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 14] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 15] = - pcjr->array[((dat >> 8) & pcjr->array[1]) + 16] + 16; - buffer32->line[(pcjr->displine << 1)][(x << 4) + 16] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 17] = - buffer32->line[(pcjr->displine << 1)][(x << 4) + 18] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 19] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 16] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 17] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 18] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 19] = - pcjr->array[((dat >> 4) & pcjr->array[1]) + 16] + 16; - buffer32->line[(pcjr->displine << 1)][(x << 4) + 20] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 21] = - buffer32->line[(pcjr->displine << 1)][(x << 4) + 22] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 23] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 20] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 21] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 22] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 23] = - pcjr->array[(dat & pcjr->array[1]) + 16] + 16; - } - break; - case 0x03: /*640x200x4*/ - for (x = 0; x < pcjr->crtc[1]; x++) { - dat = (pcjr->vram[((pcjr->ma << 1) & mask) + offset] << 8) | - pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; - pcjr->ma++; - for (c = 0; c < 8; c++) { - chr = (dat >> 7) & 1; - chr |= ((dat >> 14) & 2); - buffer32->line[(pcjr->displine << 1)][(x << 3) + 8 + c] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 8 + c] = - pcjr->array[(chr & pcjr->array[1]) + 16] + 16; - dat <<= 1; - } - } - break; - case 0x01: /*80 column text*/ - for (x = 0; x < pcjr->crtc[1]; x++) { - chr = pcjr->vram[((pcjr->ma << 1) & mask) + offset]; - attr = pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; - drawcursor = ((pcjr->ma == ca) && pcjr->con && pcjr->cursoron); - if (pcjr->array[3] & 4) { - cols[1] = pcjr->array[ ((attr & 15) & pcjr->array[1]) + 16] + 16; - cols[0] = pcjr->array[(((attr >> 4) & 7) & pcjr->array[1]) + 16] + 16; - if ((pcjr->blink & 16) && (attr & 0x80) && !drawcursor) - cols[1] = cols[0]; - } else { - cols[1] = pcjr->array[((attr & 15) & pcjr->array[1]) + 16] + 16; - cols[0] = pcjr->array[((attr >> 4) & pcjr->array[1]) + 16] + 16; - } - if (pcjr->sc & 8) { - for (c = 0; c < 8; c++) { - buffer32->line[(pcjr->displine << 1)][(x << 3) + c + 8] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + c + 8] = cols[0]; - } - } else { - for (c = 0; c < 8; c++) { - buffer32->line[(pcjr->displine << 1)][(x << 3) + c + 8] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + c + 8] = - cols[(fontdat[chr][pcjr->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; - } - } - if (drawcursor) { - for (c = 0; c < 8; c++) { - buffer32->line[(pcjr->displine << 1)][(x << 3) + c + 8] ^= 15; - buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + c + 8] ^= 15; - } - } - pcjr->ma++; - } - break; - case 0x00: /*40 column text*/ - for (x = 0; x < pcjr->crtc[1]; x++) { - chr = pcjr->vram[((pcjr->ma << 1) & mask) + offset]; - attr = pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; - drawcursor = ((pcjr->ma == ca) && pcjr->con && pcjr->cursoron); - if (pcjr->array[3] & 4) { - cols[1] = pcjr->array[ ((attr & 15) & pcjr->array[1]) + 16] + 16; - cols[0] = pcjr->array[(((attr >> 4) & 7) & pcjr->array[1]) + 16] + 16; - if ((pcjr->blink & 16) && (attr & 0x80) && !drawcursor) - cols[1] = cols[0]; - } else { - cols[1] = pcjr->array[((attr & 15) & pcjr->array[1]) + 16] + 16; - cols[0] = pcjr->array[((attr >> 4) & pcjr->array[1]) + 16] + 16; - } - pcjr->ma++; - if (pcjr->sc & 8) { - for (c = 0; c < 8; c++) { - buffer32->line[(pcjr->displine << 1)][(x << 4) + (c << 1) + 8] = - buffer32->line[(pcjr->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + (c << 1) + 8] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = cols[0]; - } - } else { - for (c = 0; c < 8; c++) { - buffer32->line[(pcjr->displine << 1)][(x << 4) + (c << 1) + 8] = - buffer32->line[(pcjr->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + (c << 1) + 8] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = - cols[(fontdat[chr][pcjr->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; - } - } - if (drawcursor) { - for (c = 0; c < 16; c++) { - buffer32->line[(pcjr->displine << 1)][(x << 4) + c + 8] ^= 15; - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + c + 8] ^= 15; - } - } - } - break; - case 0x02: /*320x200x4*/ - cols[0] = pcjr->array[0 + 16] + 16; - cols[1] = pcjr->array[1 + 16] + 16; - cols[2] = pcjr->array[2 + 16] + 16; - cols[3] = pcjr->array[3 + 16] + 16; - for (x = 0; x < pcjr->crtc[1]; x++) { - dat = (pcjr->vram[((pcjr->ma << 1) & mask) + offset] << 8) | - pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; - pcjr->ma++; - for (c = 0; c < 8; c++) { - buffer32->line[(pcjr->displine << 1)][(x << 4) + (c << 1) + 8] = - buffer32->line[(pcjr->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + (c << 1) + 8] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = cols[dat >> 14]; - dat <<= 2; - } - } - break; - case 0x102: /*640x200x2*/ - cols[0] = pcjr->array[0 + 16] + 16; - cols[1] = pcjr->array[1 + 16] + 16; - for (x = 0; x < pcjr->crtc[1]; x++) { - dat = (pcjr->vram[((pcjr->ma << 1) & mask) + offset] << 8) | - pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; - pcjr->ma++; - for (c = 0; c < 16; c++) { - buffer32->line[(pcjr->displine << 1)][(x << 4) + c + 8] = - buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + c + 8] = - cols[dat >> 15]; - dat <<= 1; - } - } - break; - } - } else { - if (pcjr->array[3] & 4) { - if (pcjr->array[0] & 1) { - hline(buffer32, 0, (pcjr->displine << 1), (pcjr->crtc[1] << 3) + 16, (pcjr->array[2] & 0xf) + 16); - hline(buffer32, 0, (pcjr->displine << 1) + 1, (pcjr->crtc[1] << 3) + 16, (pcjr->array[2] & 0xf) + 16); - } else { - hline(buffer32, 0, (pcjr->displine << 1), (pcjr->crtc[1] << 4) + 16, (pcjr->array[2] & 0xf) + 16); - hline(buffer32, 0, (pcjr->displine << 1) + 1, (pcjr->crtc[1] << 4) + 16, (pcjr->array[2] & 0xf) + 16); - } - } else { - cols[0] = pcjr->array[0 + 16] + 16; - if (pcjr->array[0] & 1) { - hline(buffer32, 0, (pcjr->displine << 1), (pcjr->crtc[1] << 3) + 16, cols[0]); - hline(buffer32, 0, (pcjr->displine << 1) + 1, (pcjr->crtc[1] << 3) + 16, cols[0]); - } else { - hline(buffer32, 0, (pcjr->displine << 1), (pcjr->crtc[1] << 4) + 16, cols[0]); - hline(buffer32, 0, (pcjr->displine << 1) + 1, (pcjr->crtc[1] << 4) + 16, cols[0]); - } - } - } - if (pcjr->array[0] & 1) x = (pcjr->crtc[1] << 3) + 16; - else x = (pcjr->crtc[1] << 4) + 16; - if (pcjr->composite) { - Composite_Process(pcjr->array[0], 0, x >> 2, buffer32->line[(pcjr->displine << 1)]); - Composite_Process(pcjr->array[0], 0, x >> 2, buffer32->line[(pcjr->displine << 1) + 1]); - } - pcjr->sc = oldsc; - if (pcjr->vc == pcjr->crtc[7] && !pcjr->sc) { - pcjr->stat |= 8; - } - pcjr->displine++; - if (pcjr->displine >= 360) - pcjr->displine = 0; + switch (pcjr->addr_mode) { + case 0: /*Alpha*/ + offset = 0; + mask = 0x3fff; + break; + case 1: /*Low resolution graphics*/ + offset = (pcjr->sc & 1) * 0x2000; + break; + case 3: /*High resolution graphics*/ + offset = (pcjr->sc & 3) * 0x2000; + break; + } + switch ((pcjr->array[0] & 0x13) | ((pcjr->array[3] & 0x08) << 5)) { + case 0x13: /*320x200x16*/ + for (x = 0; x < pcjr->crtc[1]; x++) { + dat = (pcjr->vram[((pcjr->ma << 1) & mask) + offset] << 8) | pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; + pcjr->ma++; + buffer32->line[(pcjr->displine << 1)][(x << 3) + 8] = buffer32->line[(pcjr->displine << 1)][(x << 3) + 9] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 8] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 9] = pcjr->array[((dat >> 12) & pcjr->array[1]) + 16] + 16; + buffer32->line[(pcjr->displine << 1)][(x << 3) + 10] = buffer32->line[(pcjr->displine << 1)][(x << 3) + 11] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 10] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 11] = pcjr->array[((dat >> 8) & pcjr->array[1]) + 16] + 16; + buffer32->line[(pcjr->displine << 1)][(x << 3) + 12] = buffer32->line[(pcjr->displine << 1)][(x << 3) + 13] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 12] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 13] = pcjr->array[((dat >> 4) & pcjr->array[1]) + 16] + 16; + buffer32->line[(pcjr->displine << 1)][(x << 3) + 14] = buffer32->line[(pcjr->displine << 1)][(x << 3) + 15] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 14] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 15] = pcjr->array[(dat & pcjr->array[1]) + 16] + 16; + } + break; + case 0x12: /*160x200x16*/ + for (x = 0; x < pcjr->crtc[1]; x++) { + dat = (pcjr->vram[((pcjr->ma << 1) & mask) + offset] << 8) | pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; + pcjr->ma++; + buffer32->line[(pcjr->displine << 1)][(x << 4) + 8] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 9] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 10] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 11] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 8] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 9] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 10] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 11] = pcjr->array[((dat >> 12) & pcjr->array[1]) + 16] + 16; + buffer32->line[(pcjr->displine << 1)][(x << 4) + 12] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 13] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 14] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 15] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 12] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 13] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 14] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 15] = pcjr->array[((dat >> 8) & pcjr->array[1]) + 16] + 16; + buffer32->line[(pcjr->displine << 1)][(x << 4) + 16] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 17] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 18] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 19] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 16] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 17] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 18] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 19] = pcjr->array[((dat >> 4) & pcjr->array[1]) + 16] + 16; + buffer32->line[(pcjr->displine << 1)][(x << 4) + 20] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 21] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 22] = buffer32->line[(pcjr->displine << 1)][(x << 4) + 23] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 20] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 21] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 22] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + 23] = pcjr->array[(dat & pcjr->array[1]) + 16] + 16; + } + break; + case 0x03: /*640x200x4*/ + for (x = 0; x < pcjr->crtc[1]; x++) { + dat = (pcjr->vram[((pcjr->ma << 1) & mask) + offset] << 8) | pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; + pcjr->ma++; + for (c = 0; c < 8; c++) { + chr = (dat >> 7) & 1; + chr |= ((dat >> 14) & 2); + buffer32->line[(pcjr->displine << 1)][(x << 3) + 8 + c] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + 8 + c] = pcjr->array[(chr & pcjr->array[1]) + 16] + 16; + dat <<= 1; + } + } + break; + case 0x01: /*80 column text*/ + for (x = 0; x < pcjr->crtc[1]; x++) { + chr = pcjr->vram[((pcjr->ma << 1) & mask) + offset]; + attr = pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; + drawcursor = ((pcjr->ma == ca) && pcjr->con && pcjr->cursoron); + if (pcjr->array[3] & 4) { + cols[1] = pcjr->array[((attr & 15) & pcjr->array[1]) + 16] + 16; + cols[0] = pcjr->array[(((attr >> 4) & 7) & pcjr->array[1]) + 16] + 16; + if ((pcjr->blink & 16) && (attr & 0x80) && !drawcursor) + cols[1] = cols[0]; + } else { + cols[1] = pcjr->array[((attr & 15) & pcjr->array[1]) + 16] + 16; + cols[0] = pcjr->array[((attr >> 4) & pcjr->array[1]) + 16] + 16; + } + if (pcjr->sc & 8) { + for (c = 0; c < 8; c++) { + buffer32->line[(pcjr->displine << 1)][(x << 3) + c + 8] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + c + 8] = cols[0]; + } + } else { + for (c = 0; c < 8; c++) { + buffer32->line[(pcjr->displine << 1)][(x << 3) + c + 8] = buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + c + 8] = cols[(fontdat[chr][pcjr->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; + } + } + if (drawcursor) { + for (c = 0; c < 8; c++) { + buffer32->line[(pcjr->displine << 1)][(x << 3) + c + 8] ^= 15; + buffer32->line[(pcjr->displine << 1) + 1][(x << 3) + c + 8] ^= 15; + } + } + pcjr->ma++; + } + break; + case 0x00: /*40 column text*/ + for (x = 0; x < pcjr->crtc[1]; x++) { + chr = pcjr->vram[((pcjr->ma << 1) & mask) + offset]; + attr = pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; + drawcursor = ((pcjr->ma == ca) && pcjr->con && pcjr->cursoron); + if (pcjr->array[3] & 4) { + cols[1] = pcjr->array[((attr & 15) & pcjr->array[1]) + 16] + 16; + cols[0] = pcjr->array[(((attr >> 4) & 7) & pcjr->array[1]) + 16] + 16; + if ((pcjr->blink & 16) && (attr & 0x80) && !drawcursor) + cols[1] = cols[0]; + } else { + cols[1] = pcjr->array[((attr & 15) & pcjr->array[1]) + 16] + 16; + cols[0] = pcjr->array[((attr >> 4) & pcjr->array[1]) + 16] + 16; + } + pcjr->ma++; + if (pcjr->sc & 8) { + for (c = 0; c < 8; c++) { + buffer32->line[(pcjr->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(pcjr->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + (c << 1) + 8] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = cols[0]; + } + } else { + for (c = 0; c < 8; c++) { + buffer32->line[(pcjr->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(pcjr->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + (c << 1) + 8] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdat[chr][pcjr->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; + } + } + if (drawcursor) { + for (c = 0; c < 16; c++) { + buffer32->line[(pcjr->displine << 1)][(x << 4) + c + 8] ^= 15; + buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + c + 8] ^= 15; + } + } + } + break; + case 0x02: /*320x200x4*/ + cols[0] = pcjr->array[0 + 16] + 16; + cols[1] = pcjr->array[1 + 16] + 16; + cols[2] = pcjr->array[2 + 16] + 16; + cols[3] = pcjr->array[3 + 16] + 16; + for (x = 0; x < pcjr->crtc[1]; x++) { + dat = (pcjr->vram[((pcjr->ma << 1) & mask) + offset] << 8) | pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; + pcjr->ma++; + for (c = 0; c < 8; c++) { + buffer32->line[(pcjr->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(pcjr->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + (c << 1) + 8] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = cols[dat >> 14]; + dat <<= 2; + } + } + break; + case 0x102: /*640x200x2*/ + cols[0] = pcjr->array[0 + 16] + 16; + cols[1] = pcjr->array[1 + 16] + 16; + for (x = 0; x < pcjr->crtc[1]; x++) { + dat = (pcjr->vram[((pcjr->ma << 1) & mask) + offset] << 8) | pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1]; + pcjr->ma++; + for (c = 0; c < 16; c++) { + buffer32->line[(pcjr->displine << 1)][(x << 4) + c + 8] = buffer32->line[(pcjr->displine << 1) + 1][(x << 4) + c + 8] = cols[dat >> 15]; + dat <<= 1; + } + } + break; + } + } else { + if (pcjr->array[3] & 4) { + if (pcjr->array[0] & 1) { + hline(buffer32, 0, (pcjr->displine << 1), (pcjr->crtc[1] << 3) + 16, (pcjr->array[2] & 0xf) + 16); + hline(buffer32, 0, (pcjr->displine << 1) + 1, (pcjr->crtc[1] << 3) + 16, (pcjr->array[2] & 0xf) + 16); + } else { + hline(buffer32, 0, (pcjr->displine << 1), (pcjr->crtc[1] << 4) + 16, (pcjr->array[2] & 0xf) + 16); + hline(buffer32, 0, (pcjr->displine << 1) + 1, (pcjr->crtc[1] << 4) + 16, (pcjr->array[2] & 0xf) + 16); + } + } else { + cols[0] = pcjr->array[0 + 16] + 16; + if (pcjr->array[0] & 1) { + hline(buffer32, 0, (pcjr->displine << 1), (pcjr->crtc[1] << 3) + 16, cols[0]); + hline(buffer32, 0, (pcjr->displine << 1) + 1, (pcjr->crtc[1] << 3) + 16, cols[0]); + } else { + hline(buffer32, 0, (pcjr->displine << 1), (pcjr->crtc[1] << 4) + 16, cols[0]); + hline(buffer32, 0, (pcjr->displine << 1) + 1, (pcjr->crtc[1] << 4) + 16, cols[0]); + } + } + } + if (pcjr->array[0] & 1) + x = (pcjr->crtc[1] << 3) + 16; + else + x = (pcjr->crtc[1] << 4) + 16; + if (pcjr->composite) { + Composite_Process(pcjr->array[0], 0, x >> 2, buffer32->line[(pcjr->displine << 1)]); + Composite_Process(pcjr->array[0], 0, x >> 2, buffer32->line[(pcjr->displine << 1) + 1]); + } + pcjr->sc = oldsc; + if (pcjr->vc == pcjr->crtc[7] && !pcjr->sc) { + pcjr->stat |= 8; + } + pcjr->displine++; + if (pcjr->displine >= 360) + pcjr->displine = 0; } else { - timer_advance_u64(&pcjr->timer, pcjr->dispontime); - if (pcjr->dispon) - pcjr->stat |= 1; - pcjr->linepos = 0; - if (pcjr->vsynctime) { - pcjr->vsynctime--; - if (!pcjr->vsynctime) { - pcjr->stat &= ~8; - } - } - if (pcjr->sc == (pcjr->crtc[11] & 31) || ((pcjr->crtc[8] & 3) == 3 && pcjr->sc == ((pcjr->crtc[11] & 31) >> 1))) { - pcjr->con = 0; - pcjr->coff = 1; - } - if (pcjr->vadj) { - pcjr->sc++; - pcjr->sc &= 31; - pcjr->ma = pcjr->maback; - pcjr->vadj--; - if (!pcjr->vadj) { - pcjr->dispon = 1; - pcjr->ma = pcjr->maback = (pcjr->crtc[13] | (pcjr->crtc[12] << 8)) & 0x3fff; - pcjr->sc = 0; - } - } else if (pcjr->sc == pcjr->crtc[9] || ((pcjr->crtc[8] & 3) == 3 && pcjr->sc == (pcjr->crtc[9] >> 1))) { - pcjr->maback = pcjr->ma; - pcjr->sc = 0; - oldvc = pcjr->vc; - pcjr->vc++; - pcjr->vc &= 127; - if (pcjr->vc == pcjr->crtc[6]) - pcjr->dispon = 0; - if (oldvc == pcjr->crtc[4]) { - pcjr->vc = 0; - pcjr->vadj = pcjr->crtc[5]; - if (!pcjr->vadj) - pcjr->dispon = 1; - if (!pcjr->vadj) - pcjr->ma = pcjr->maback = (pcjr->crtc[13] | (pcjr->crtc[12] << 8)) & 0x3fff; - if ((pcjr->crtc[10] & 0x60) == 0x20) pcjr->cursoron = 0; - else pcjr->cursoron = pcjr->blink & 16; - } - if (pcjr->vc == pcjr->crtc[7]) { - pcjr->dispon = 0; - pcjr->displine = 0; - pcjr->vsynctime = 16; - picint(1 << 5); - if (pcjr->crtc[7]) { - if (pcjr->array[0] & 1) x = (pcjr->crtc[1] << 3) + 16; - else x = (pcjr->crtc[1] << 4) + 16; - pcjr->lastline++; + timer_advance_u64(&pcjr->timer, pcjr->dispontime); + if (pcjr->dispon) + pcjr->stat |= 1; + pcjr->linepos = 0; + if (pcjr->vsynctime) { + pcjr->vsynctime--; + if (!pcjr->vsynctime) { + pcjr->stat &= ~8; + } + } + if (pcjr->sc == (pcjr->crtc[11] & 31) || ((pcjr->crtc[8] & 3) == 3 && pcjr->sc == ((pcjr->crtc[11] & 31) >> 1))) { + pcjr->con = 0; + pcjr->coff = 1; + } + if (pcjr->vadj) { + pcjr->sc++; + pcjr->sc &= 31; + pcjr->ma = pcjr->maback; + pcjr->vadj--; + if (!pcjr->vadj) { + pcjr->dispon = 1; + pcjr->ma = pcjr->maback = (pcjr->crtc[13] | (pcjr->crtc[12] << 8)) & 0x3fff; + pcjr->sc = 0; + } + } else if (pcjr->sc == pcjr->crtc[9] || ((pcjr->crtc[8] & 3) == 3 && pcjr->sc == (pcjr->crtc[9] >> 1))) { + pcjr->maback = pcjr->ma; + pcjr->sc = 0; + oldvc = pcjr->vc; + pcjr->vc++; + pcjr->vc &= 127; + if (pcjr->vc == pcjr->crtc[6]) + pcjr->dispon = 0; + if (oldvc == pcjr->crtc[4]) { + pcjr->vc = 0; + pcjr->vadj = pcjr->crtc[5]; + if (!pcjr->vadj) + pcjr->dispon = 1; + if (!pcjr->vadj) + pcjr->ma = pcjr->maback = (pcjr->crtc[13] | (pcjr->crtc[12] << 8)) & 0x3fff; + if ((pcjr->crtc[10] & 0x60) == 0x20) + pcjr->cursoron = 0; + else + pcjr->cursoron = pcjr->blink & 16; + } + if (pcjr->vc == pcjr->crtc[7]) { + pcjr->dispon = 0; + pcjr->displine = 0; + pcjr->vsynctime = 16; + picint(1 << 5); + if (pcjr->crtc[7]) { + if (pcjr->array[0] & 1) + x = (pcjr->crtc[1] << 3) + 16; + else + x = (pcjr->crtc[1] << 4) + 16; + pcjr->lastline++; - xs_temp = x; - ys_temp = (pcjr->lastline - pcjr->firstline) << 1; + xs_temp = x; + ys_temp = (pcjr->lastline - pcjr->firstline) << 1; - if ((xs_temp > 0) && (ys_temp > 0)) { - if (xs_temp < 64) xs_temp = 656; - if (ys_temp < 32) ys_temp = 400; - if (!enable_overscan) - xs_temp -= 16; + if ((xs_temp > 0) && (ys_temp > 0)) { + if (xs_temp < 64) + xs_temp = 656; + if (ys_temp < 32) + ys_temp = 400; + if (!enable_overscan) + xs_temp -= 16; - if ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get()) { - xsize = xs_temp; - ysize = ys_temp; - set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); + if ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get()) { + xsize = xs_temp; + ysize = ys_temp; + set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); - if (video_force_resize_get()) - video_force_resize_set(0); - } + if (video_force_resize_get()) + video_force_resize_set(0); + } - if (enable_overscan) { - if (pcjr->composite) - video_blit_memtoscreen(0, (pcjr->firstline - 4) << 1, - xsize, ((pcjr->lastline - pcjr->firstline) + 8) << 1); - else - video_blit_memtoscreen_8(0, (pcjr->firstline - 4) << 1, - xsize, ((pcjr->lastline - pcjr->firstline) + 8) << 1); - } else { - if (pcjr->composite) - video_blit_memtoscreen(8, pcjr->firstline << 1, - xsize, (pcjr->lastline - pcjr->firstline) << 1); - else - video_blit_memtoscreen_8(8, pcjr->firstline << 1, - xsize, (pcjr->lastline - pcjr->firstline) << 1); - } - } + if (enable_overscan) { + if (pcjr->composite) + video_blit_memtoscreen(0, (pcjr->firstline - 4) << 1, + xsize, ((pcjr->lastline - pcjr->firstline) + 8) << 1); + else + video_blit_memtoscreen_8(0, (pcjr->firstline - 4) << 1, + xsize, ((pcjr->lastline - pcjr->firstline) + 8) << 1); + } else { + if (pcjr->composite) + video_blit_memtoscreen(8, pcjr->firstline << 1, + xsize, (pcjr->lastline - pcjr->firstline) << 1); + else + video_blit_memtoscreen_8(8, pcjr->firstline << 1, + xsize, (pcjr->lastline - pcjr->firstline) << 1); + } + } - frames++; - video_res_x = xsize; - video_res_y = ysize; - } - pcjr->firstline = 1000; - pcjr->lastline = 0; - pcjr->blink++; - } - } else { - pcjr->sc++; - pcjr->sc &= 31; - pcjr->ma = pcjr->maback; - } - if ((pcjr->sc == (pcjr->crtc[10] & 31) || ((pcjr->crtc[8] & 3) == 3 && pcjr->sc == ((pcjr->crtc[10] & 31) >> 1)))) - pcjr->con = 1; + frames++; + video_res_x = xsize; + video_res_y = ysize; + } + pcjr->firstline = 1000; + pcjr->lastline = 0; + pcjr->blink++; + } + } else { + pcjr->sc++; + pcjr->sc &= 31; + pcjr->ma = pcjr->maback; + } + if ((pcjr->sc == (pcjr->crtc[10] & 31) || ((pcjr->crtc[8] & 3) == 3 && pcjr->sc == ((pcjr->crtc[10] & 31) >> 1)))) + pcjr->con = 1; } } - static void kbd_write(uint16_t port, uint8_t val, void *priv) { - pcjr_t *pcjr = (pcjr_t *)priv; + pcjr_t *pcjr = (pcjr_t *) priv; if ((port >= 0xa0) && (port <= 0xa7)) - port = 0xa0; + port = 0xa0; switch (port) { - case 0x60: - pcjr->pa = val; - break; + case 0x60: + pcjr->pa = val; + break; - case 0x61: - pcjr->pb = val; + case 0x61: + pcjr->pb = val; - timer_process(); + timer_process(); - if (cassette != NULL) - pc_cas_set_motor(cassette, (pcjr->pb & 0x08) == 0); + if (cassette != NULL) + pc_cas_set_motor(cassette, (pcjr->pb & 0x08) == 0); - speaker_update(); - speaker_gated = val & 1; - speaker_enable = val & 2; - if (speaker_enable) - was_speaker_enable = 1; - pit_devs[0].set_gate(pit_devs[0].data, 2, val & 1); - sn76489_mute = speaker_mute = 1; - switch (val & 0x60) { - case 0x00: - speaker_mute = 0; - break; + speaker_update(); + speaker_gated = val & 1; + speaker_enable = val & 2; + if (speaker_enable) + was_speaker_enable = 1; + pit_devs[0].set_gate(pit_devs[0].data, 2, val & 1); + sn76489_mute = speaker_mute = 1; + switch (val & 0x60) { + case 0x00: + speaker_mute = 0; + break; - case 0x60: - sn76489_mute = 0; - break; - } - break; + case 0x60: + sn76489_mute = 0; + break; + } + break; - case 0xa0: - nmi_mask = val & 0x80; - pit_devs[0].set_using_timer(pit_devs[0].data, 1, !(val & 0x20)); - break; + case 0xa0: + nmi_mask = val & 0x80; + pit_devs[0].set_using_timer(pit_devs[0].data, 1, !(val & 0x20)); + break; } } - static uint8_t kbd_read(uint16_t port, void *priv) { - pcjr_t *pcjr = (pcjr_t *)priv; - uint8_t ret = 0xff; + pcjr_t *pcjr = (pcjr_t *) priv; + uint8_t ret = 0xff; if ((port >= 0xa0) && (port <= 0xa7)) - port = 0xa0; + port = 0xa0; switch (port) { - case 0x60: - ret = pcjr->pa; - break; + case 0x60: + ret = pcjr->pa; + break; - case 0x61: - ret = pcjr->pb; - break; + case 0x61: + ret = pcjr->pb; + break; - case 0x62: - ret = (pcjr->latched ? 1 : 0); - ret |= 0x02; /*Modem card not installed*/ - if ((pcjr->pb & 0x08) || (cassette == NULL)) - ret |= (ppispeakon ? 0x10 : 0); - else - ret |= (pc_cas_get_inp(cassette) ? 0x10 : 0); - ret |= (ppispeakon ? 0x10 : 0); - ret |= (ppispeakon ? 0x20 : 0); - ret |= (pcjr->data ? 0x40: 0); - if (pcjr->data) - ret |= 0x40; - break; + case 0x62: + ret = (pcjr->latched ? 1 : 0); + ret |= 0x02; /*Modem card not installed*/ + if ((pcjr->pb & 0x08) || (cassette == NULL)) + ret |= (ppispeakon ? 0x10 : 0); + else + ret |= (pc_cas_get_inp(cassette) ? 0x10 : 0); + ret |= (ppispeakon ? 0x10 : 0); + ret |= (ppispeakon ? 0x20 : 0); + ret |= (pcjr->data ? 0x40 : 0); + if (pcjr->data) + ret |= 0x40; + break; - case 0xa0: - pcjr->latched = 0; - ret = 0; - break; + case 0xa0: + pcjr->latched = 0; + ret = 0; + break; } - return(ret); + return (ret); } - static void kbd_poll(void *priv) { - pcjr_t *pcjr = (pcjr_t *)priv; - int c, p = 0, key; + pcjr_t *pcjr = (pcjr_t *) priv; + int c, p = 0, key; timer_advance_u64(&pcjr->send_delay_timer, 220 * TIMER_USEC); - if (key_queue_start != key_queue_end && - !pcjr->serial_pos && !pcjr->latched) { - key = key_queue[key_queue_start]; + if (key_queue_start != key_queue_end && !pcjr->serial_pos && !pcjr->latched) { + key = key_queue[key_queue_start]; - key_queue_start = (key_queue_start + 1) & 0xf; + key_queue_start = (key_queue_start + 1) & 0xf; - pcjr->latched = 1; - pcjr->serial_data[0] = 1; /*Start bit*/ - pcjr->serial_data[1] = 0; + pcjr->latched = 1; + pcjr->serial_data[0] = 1; /*Start bit*/ + pcjr->serial_data[1] = 0; - for (c = 0; c < 8; c++) { - if (key & (1 << c)) { - pcjr->serial_data[(c + 1) * 2] = 1; - pcjr->serial_data[(c + 1) * 2 + 1] = 0; - p++; - } else { - pcjr->serial_data[(c + 1) * 2] = 0; - pcjr->serial_data[(c + 1) * 2 + 1] = 1; - } - } + for (c = 0; c < 8; c++) { + if (key & (1 << c)) { + pcjr->serial_data[(c + 1) * 2] = 1; + pcjr->serial_data[(c + 1) * 2 + 1] = 0; + p++; + } else { + pcjr->serial_data[(c + 1) * 2] = 0; + pcjr->serial_data[(c + 1) * 2 + 1] = 1; + } + } - if (p & 1) { /*Parity*/ - pcjr->serial_data[9 * 2] = 1; - pcjr->serial_data[9 * 2 + 1] = 0; - } else { - pcjr->serial_data[9 * 2] = 0; - pcjr->serial_data[9 * 2 + 1] = 1; - } + if (p & 1) { /*Parity*/ + pcjr->serial_data[9 * 2] = 1; + pcjr->serial_data[9 * 2 + 1] = 0; + } else { + pcjr->serial_data[9 * 2] = 0; + pcjr->serial_data[9 * 2 + 1] = 1; + } - for (c = 0; c < 11; c++) { /*11 stop bits*/ - pcjr->serial_data[(c + 10) * 2] = 0; - pcjr->serial_data[(c + 10) * 2 + 1] = 0; - } + for (c = 0; c < 11; c++) { /*11 stop bits*/ + pcjr->serial_data[(c + 10) * 2] = 0; + pcjr->serial_data[(c + 10) * 2 + 1] = 0; + } - pcjr->serial_pos++; + pcjr->serial_pos++; } if (pcjr->serial_pos) { - pcjr->data = pcjr->serial_data[pcjr->serial_pos - 1]; - nmi = pcjr->data; - pcjr->serial_pos++; - if (pcjr->serial_pos == 42+1) - pcjr->serial_pos = 0; + pcjr->data = pcjr->serial_data[pcjr->serial_pos - 1]; + nmi = pcjr->data; + pcjr->serial_pos++; + if (pcjr->serial_pos == 42 + 1) + pcjr->serial_pos = 0; } } - static void kbd_adddata(uint16_t val) { key_queue[key_queue_end] = val; - key_queue_end = (key_queue_end + 1) & 0xf; + key_queue_end = (key_queue_end + 1) & 0xf; } - - - static void kbd_adddata_ex(uint16_t val) { - kbd_adddata_process(val, kbd_adddata); + kbd_adddata_process(val, kbd_adddata); } - static void speed_changed(void *priv) { - pcjr_t *pcjr = (pcjr_t *)priv; + pcjr_t *pcjr = (pcjr_t *) priv; recalc_timings(pcjr); } @@ -783,6 +727,7 @@ pit_irq0_timer_pcjr(int new_out, int old_out) } static const device_config_t pcjr_config[] = { + // clang-format off { .name = "display_type", .description = "Display type", @@ -798,6 +743,7 @@ static const device_config_t pcjr_config[] = { } }, { .name = "", .description = "", .type = CONFIG_END } + // clang-format on }; const device_t pcjr_device = { @@ -817,21 +763,21 @@ const device_t pcjr_device = { int machine_pcjr_init(const machine_t *model) { - int display_type; + int display_type; pcjr_t *pcjr; int ret; ret = bios_load_linear("roms/machines/ibmpcjr/bios.rom", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (bios_only || !ret) - return ret; + return ret; pcjr = malloc(sizeof(pcjr_t)); memset(pcjr, 0x00, sizeof(pcjr_t)); - pcjr->memctrl = -1; - display_type = machine_get_config_int("display_type"); + pcjr->memctrl = -1; + display_type = machine_get_config_int("display_type"); pcjr->composite = (display_type != PCJR_RGB); pic_init_pcjr(); @@ -843,10 +789,10 @@ machine_pcjr_init(const machine_t *model) video_reset(gfxcard); loadfont("roms/video/mda/mda.rom", 0); mem_mapping_add(&pcjr->mapping, 0xb8000, 0x08000, - vid_read, NULL, NULL, - vid_write, NULL, NULL, NULL, 0, pcjr); + vid_read, NULL, NULL, + vid_write, NULL, NULL, NULL, 0, pcjr); io_sethandler(0x03d0, 16, - vid_in, NULL, NULL, vid_out, NULL, NULL, pcjr); + vid_in, NULL, NULL, vid_out, NULL, NULL, pcjr); timer_add(&pcjr->timer, vid_poll, pcjr, 1); video_inform(VIDEO_FLAG_TYPE_CGA, &timing_dram); device_add_ex(&pcjr_device, pcjr); @@ -854,12 +800,12 @@ machine_pcjr_init(const machine_t *model) cgapal_rebuild(); /* Initialize the keyboard. */ - keyboard_scan = 1; + keyboard_scan = 1; key_queue_start = key_queue_end = 0; io_sethandler(0x0060, 4, - kbd_read, NULL, NULL, kbd_write, NULL, NULL, pcjr); + kbd_read, NULL, NULL, kbd_write, NULL, NULL, pcjr); io_sethandler(0x00a0, 8, - kbd_read, NULL, NULL, kbd_write, NULL, NULL, pcjr); + kbd_read, NULL, NULL, kbd_write, NULL, NULL, pcjr); timer_add(&pcjr->send_delay_timer, kbd_poll, pcjr, 1); keyboard_set_table(scancode_xt); keyboard_send = kbd_adddata_ex; @@ -872,7 +818,7 @@ machine_pcjr_init(const machine_t *model) device_add(&fdc_pcjr_device); device_add(&ns8250_pcjr_device); - serial_set_next_inst(SERIAL_MAX); /* So that serial_standalone_init() won't do anything. */ + serial_set_next_inst(SERIAL_MAX); /* So that serial_standalone_init() won't do anything. */ return ret; } diff --git a/src/machine/m_ps1.c b/src/machine/m_ps1.c index 19abb00bf..8b18dbf02 100644 --- a/src/machine/m_ps1.c +++ b/src/machine/m_ps1.c @@ -64,208 +64,198 @@ #include <86box/machine.h> #include <86box/sound.h> - typedef struct { - int model; + int model; - rom_t mid_rom, high_rom; + rom_t mid_rom, high_rom; - uint8_t ps1_91, - ps1_92, - ps1_94, - ps1_102, - ps1_103, - ps1_104, - ps1_105, - ps1_190; - int ps1_e0_addr; - uint8_t ps1_e0_regs[256]; + uint8_t ps1_91, + ps1_92, + ps1_94, + ps1_102, + ps1_103, + ps1_104, + ps1_105, + ps1_190; + int ps1_e0_addr; + uint8_t ps1_e0_regs[256]; - serial_t *uart; + serial_t *uart; } ps1_t; - static void recalc_memory(ps1_t *ps) { /* Enable first 512K */ mem_set_mem_state(0x00000, 0x80000, - (ps->ps1_e0_regs[0] & 0x01) ? - (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : - (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); + (ps->ps1_e0_regs[0] & 0x01) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); /* Enable 512-640K */ mem_set_mem_state(0x80000, 0x20000, - (ps->ps1_e0_regs[1] & 0x01) ? - (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : - (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); + (ps->ps1_e0_regs[1] & 0x01) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); } - static void ps1_write(uint16_t port, uint8_t val, void *priv) { - ps1_t *ps = (ps1_t *)priv; + ps1_t *ps = (ps1_t *) priv; switch (port) { - case 0x0092: - if (ps->model != 2011) { - if (val & 1) { - softresetx86(); - cpu_set_edx(); - } - ps->ps1_92 = val & ~1; - } else { - ps->ps1_92 = val; - } - mem_a20_alt = val & 2; - mem_a20_recalc(); - break; + case 0x0092: + if (ps->model != 2011) { + if (val & 1) { + softresetx86(); + cpu_set_edx(); + } + ps->ps1_92 = val & ~1; + } else { + ps->ps1_92 = val; + } + mem_a20_alt = val & 2; + mem_a20_recalc(); + break; - case 0x0094: - ps->ps1_94 = val; - break; + case 0x0094: + ps->ps1_94 = val; + break; - case 0x00e0: - if (ps->model != 2011) { - ps->ps1_e0_addr = val; - } - break; + case 0x00e0: + if (ps->model != 2011) { + ps->ps1_e0_addr = val; + } + break; - case 0x00e1: - if (ps->model != 2011) { - ps->ps1_e0_regs[ps->ps1_e0_addr] = val; - recalc_memory(ps); - } - break; + case 0x00e1: + if (ps->model != 2011) { + ps->ps1_e0_regs[ps->ps1_e0_addr] = val; + recalc_memory(ps); + } + break; - case 0x0102: - if (!(ps->ps1_94 & 0x80)) { - lpt1_remove(); - serial_remove(ps->uart); - if (val & 0x04) { - if (val & 0x08) - serial_setup(ps->uart, COM1_ADDR, COM1_IRQ); - else - serial_setup(ps->uart, COM2_ADDR, COM2_IRQ); - } - if (val & 0x10) { - switch ((val >> 5) & 3) - { - case 0: - lpt1_init(LPT_MDA_ADDR); - break; - case 1: - lpt1_init(LPT1_ADDR); - break; - case 2: - lpt1_init(LPT2_ADDR); - break; - } - } - ps->ps1_102 = val; - } - break; + case 0x0102: + if (!(ps->ps1_94 & 0x80)) { + lpt1_remove(); + serial_remove(ps->uart); + if (val & 0x04) { + if (val & 0x08) + serial_setup(ps->uart, COM1_ADDR, COM1_IRQ); + else + serial_setup(ps->uart, COM2_ADDR, COM2_IRQ); + } + if (val & 0x10) { + switch ((val >> 5) & 3) { + case 0: + lpt1_init(LPT_MDA_ADDR); + break; + case 1: + lpt1_init(LPT1_ADDR); + break; + case 2: + lpt1_init(LPT2_ADDR); + break; + } + } + ps->ps1_102 = val; + } + break; - case 0x0103: - ps->ps1_103 = val; - break; + case 0x0103: + ps->ps1_103 = val; + break; - case 0x0104: - ps->ps1_104 = val; - break; + case 0x0104: + ps->ps1_104 = val; + break; - case 0x0105: - ps->ps1_105 = val; - break; + case 0x0105: + ps->ps1_105 = val; + break; - case 0x0190: - ps->ps1_190 = val; - break; + case 0x0190: + ps->ps1_190 = val; + break; } } - static uint8_t ps1_read(uint16_t port, void *priv) { - ps1_t *ps = (ps1_t *)priv; + ps1_t *ps = (ps1_t *) priv; uint8_t ret = 0xff; switch (port) { - case 0x0091: - ret = ps->ps1_91; - ps->ps1_91 = 0; - break; + case 0x0091: + ret = ps->ps1_91; + ps->ps1_91 = 0; + break; - case 0x0092: - ret = ps->ps1_92; - break; + case 0x0092: + ret = ps->ps1_92; + break; - case 0x0094: - ret = ps->ps1_94; - break; + case 0x0094: + ret = ps->ps1_94; + break; - case 0x00e1: - if (ps->model != 2011) { - ret = ps->ps1_e0_regs[ps->ps1_e0_addr]; - } - break; + case 0x00e1: + if (ps->model != 2011) { + ret = ps->ps1_e0_regs[ps->ps1_e0_addr]; + } + break; - case 0x0102: - if (ps->model == 2011) - ret = ps->ps1_102 | 0x08; - else - ret = ps->ps1_102; - break; + case 0x0102: + if (ps->model == 2011) + ret = ps->ps1_102 | 0x08; + else + ret = ps->ps1_102; + break; - case 0x0103: - ret = ps->ps1_103; - break; + case 0x0103: + ret = ps->ps1_103; + break; - case 0x0104: - ret = ps->ps1_104; - break; + case 0x0104: + ret = ps->ps1_104; + break; - case 0x0105: - if (ps->model == 2011) - ret = ps->ps1_105; - else - ret = ps->ps1_105 | 0x80; - break; + case 0x0105: + if (ps->model == 2011) + ret = ps->ps1_105; + else + ret = ps->ps1_105 | 0x80; + break; - case 0x0190: - ret = ps->ps1_190; - break; + case 0x0190: + ret = ps->ps1_190; + break; - default: - break; + default: + break; } - return(ret); + return (ret); } - static void ps1_setup(int model) { ps1_t *ps; - void *priv; + void *priv; - ps = (ps1_t *)malloc(sizeof(ps1_t)); + ps = (ps1_t *) malloc(sizeof(ps1_t)); memset(ps, 0x00, sizeof(ps1_t)); ps->model = model; io_sethandler(0x0091, 1, - ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps); + ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps); io_sethandler(0x0092, 1, - ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps); + ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps); io_sethandler(0x0094, 1, - ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps); + ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps); io_sethandler(0x0102, 4, - ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps); + ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps); io_sethandler(0x0190, 1, - ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps); + ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps); ps->uart = device_add_inst(&ns16450_device, 1); @@ -277,47 +267,47 @@ ps1_setup(int model) device_add(&ps_nvr_device); if (model == 2011) { - rom_init(&ps->high_rom, - "roms/machines/ibmps1es/f80000.bin", - 0xf80000, 0x80000, 0x7ffff, 0, MEM_MAPPING_EXTERNAL); + rom_init(&ps->high_rom, + "roms/machines/ibmps1es/f80000.bin", + 0xf80000, 0x80000, 0x7ffff, 0, MEM_MAPPING_EXTERNAL); - lpt2_remove(); + lpt2_remove(); - device_add(&ps1snd_device); + device_add(&ps1snd_device); - device_add(&fdc_at_ps1_device); + device_add(&fdc_at_ps1_device); - /* Enable the builtin HDC. */ - if (hdc_current == 1) { - priv = device_add(&ps1_hdc_device); + /* Enable the builtin HDC. */ + if (hdc_current == 1) { + priv = device_add(&ps1_hdc_device); - ps1_hdc_inform(priv, &ps->ps1_91); - } + ps1_hdc_inform(priv, &ps->ps1_91); + } - /* Enable the PS/1 VGA controller. */ - device_add(&ps1vga_device); + /* Enable the PS/1 VGA controller. */ + device_add(&ps1vga_device); } else if (model == 2121) { - io_sethandler(0x00e0, 2, - ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps); + io_sethandler(0x00e0, 2, + ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps); - if (rom_present("roms/machines/ibmps1_2121/F80000.BIN")) { - rom_init(&ps->mid_rom, - "roms/machines/ibmps1_2121/F80000.BIN", - 0xf80000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL); - } - rom_init(&ps->high_rom, - "roms/machines/ibmps1_2121/FC0000.BIN", - 0xfc0000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL); + if (rom_present("roms/machines/ibmps1_2121/F80000.BIN")) { + rom_init(&ps->mid_rom, + "roms/machines/ibmps1_2121/F80000.BIN", + 0xf80000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL); + } + rom_init(&ps->high_rom, + "roms/machines/ibmps1_2121/FC0000.BIN", + 0xfc0000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL); - /* Initialize the video controller. */ - if (gfxcard == VID_INTERNAL) - device_add(&ibm_ps1_2121_device); + /* Initialize the video controller. */ + if (gfxcard == VID_INTERNAL) + device_add(&ibm_ps1_2121_device); - device_add(&fdc_at_ps1_device); + device_add(&fdc_at_ps1_device); - device_add(&ide_isa_device); + device_add(&ide_isa_device); - device_add(&ps1snd_device); + device_add(&ps1snd_device); } } @@ -339,17 +329,16 @@ ps1_common_init(const machine_t *model) standalone_gameport_type = &gameport_201_device; } - int machine_ps1_m2011_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ibmps1es/f80000.bin", - 0x000e0000, 131072, 0x60000); + 0x000e0000, 131072, 0x60000); if (bios_only || !ret) - return ret; + return ret; ps1_common_init(model); @@ -358,17 +347,16 @@ machine_ps1_m2011_init(const machine_t *model) return ret; } - int machine_ps1_m2121_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ibmps1_2121/FC0000.BIN", - 0x000e0000, 131072, 0x20000); + 0x000e0000, 131072, 0x20000); if (bios_only || !ret) - return ret; + return ret; ps1_common_init(model); diff --git a/src/machine/m_ps1_hdc.c b/src/machine/m_ps1_hdc.c index e7cff2478..9492fd696 100644 --- a/src/machine/m_ps1_hdc.c +++ b/src/machine/m_ps1_hdc.c @@ -101,10 +101,8 @@ #include <86box/ui.h> #include <86box/machine.h> - -#define HDC_TIME (50*TIMER_USEC) -#define HDC_TYPE_USER 47 /* user drive type */ - +#define HDC_TIME (50 * TIMER_USEC) +#define HDC_TYPE_USER 47 /* user drive type */ enum { STATE_IDLE = 0, @@ -118,45 +116,43 @@ enum { STATE_FDONE }; - /* Command values. These deviate from the XTA ones. */ -#define CMD_READ_SECTORS 0x01 /* regular read-date */ -#define CMD_READ_VERIFY 0x02 /* read for verify, no data */ -#define CMD_READ_EXT 0x03 /* read extended (ecc) */ -#define CMD_READ_ID 0x05 /* read ID mark on cyl */ -#define CMD_RECALIBRATE 0x08 /* recalibrate to track0 */ -#define CMD_WRITE_SECTORS 0x09 /* regular write-data */ -#define CMD_WRITE_VERIFY 0x0a /* write-data with verify */ -#define CMD_WRITE_EXT 0x0b /* write extended (ecc) */ -#define CMD_FORMAT_DRIVE 0x0d /* format entire disk */ -#define CMD_SEEK 0x0e /* seek */ -#define CMD_FORMAT_TRACK 0x0f /* format one track */ +#define CMD_READ_SECTORS 0x01 /* regular read-date */ +#define CMD_READ_VERIFY 0x02 /* read for verify, no data */ +#define CMD_READ_EXT 0x03 /* read extended (ecc) */ +#define CMD_READ_ID 0x05 /* read ID mark on cyl */ +#define CMD_RECALIBRATE 0x08 /* recalibrate to track0 */ +#define CMD_WRITE_SECTORS 0x09 /* regular write-data */ +#define CMD_WRITE_VERIFY 0x0a /* write-data with verify */ +#define CMD_WRITE_EXT 0x0b /* write extended (ecc) */ +#define CMD_FORMAT_DRIVE 0x0d /* format entire disk */ +#define CMD_SEEK 0x0e /* seek */ +#define CMD_FORMAT_TRACK 0x0f /* format one track */ /* Attachment Status register (reg 2R) values (IBM PS/1 2011.) */ -#define ASR_TX_EN 0x01 /* transfer enable */ -#define ASR_INT_REQ 0x02 /* interrupt request */ -#define ASR_BUSY 0x04 /* busy */ -#define ASR_DIR 0x08 /* direction */ -#define ASR_DATA_REQ 0x10 /* data request */ +#define ASR_TX_EN 0x01 /* transfer enable */ +#define ASR_INT_REQ 0x02 /* interrupt request */ +#define ASR_BUSY 0x04 /* busy */ +#define ASR_DIR 0x08 /* direction */ +#define ASR_DATA_REQ 0x10 /* data request */ /* Attachment Control register (2W) values (IBM PS/1 2011.) */ -#define ACR_DMA_EN 0x01 /* DMA enable */ -#define ACR_INT_EN 0x02 /* interrupt enable */ -#define ACR_RESET 0x80 /* reset */ +#define ACR_DMA_EN 0x01 /* DMA enable */ +#define ACR_INT_EN 0x02 /* interrupt enable */ +#define ACR_RESET 0x80 /* reset */ /* Interrupt Status register (4R) values (IBM PS/1 2011.) */ -#define ISR_EQUIP_CHECK 0x01 /* internal hardware error */ -#define ISR_ERP_INVOKED 0x02 /* error recovery invoked */ -#define ISR_CMD_REJECT 0x20 /* command reject */ -#define ISR_INVALID_CMD 0x40 /* invalid command */ -#define ISR_TERMINATION 0x80 /* termination error */ +#define ISR_EQUIP_CHECK 0x01 /* internal hardware error */ +#define ISR_ERP_INVOKED 0x02 /* error recovery invoked */ +#define ISR_CMD_REJECT 0x20 /* command reject */ +#define ISR_INVALID_CMD 0x40 /* invalid command */ +#define ISR_TERMINATION 0x80 /* termination error */ /* Attention register (4W) values (IBM PS/1 2011.) */ -#define ATT_DATA 0x10 /* data request */ -#define ATT_SSB 0x20 /* sense summary block */ -#define ATT_CSB 0x40 /* command specify block */ -#define ATT_CCB 0x80 /* command control block */ - +#define ATT_DATA 0x10 /* data request */ +#define ATT_SSB 0x20 /* sense summary block */ +#define ATT_CSB 0x40 /* command specify block */ +#define ATT_CCB 0x80 /* command control block */ /* * Define the Sense Summary Block. @@ -166,59 +162,59 @@ enum { * each command is completed, after an error, or before the * block is transferred. */ -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { /* Status byte 0. */ - uint8_t track_0 :1, /* T0 */ - mbz1 :1, /* 0 */ - mbz2 :1, /* 0 */ - cylinder_err :1, /* CE */ - write_fault :1, /* WF */ - mbz3 :1, /* 0 */ - seek_end :1, /* SE */ - not_ready :1; /* NR */ + uint8_t track_0 : 1, /* T0 */ + mbz1 : 1, /* 0 */ + mbz2 : 1, /* 0 */ + cylinder_err : 1, /* CE */ + write_fault : 1, /* WF */ + mbz3 : 1, /* 0 */ + seek_end : 1, /* SE */ + not_ready : 1; /* NR */ /* Status byte 1. */ - uint8_t id_not_found :1, /* ID */ - mbz4 :1, /* 0 */ - mbz5 :1, /* 0 */ - wrong_cyl :1, /* WC */ - all_bit_set :1, /* BT */ - mark_not_found :1, /* AM */ - ecc_crc_err :1, /* ET */ - ecc_crc_field :1; /* EF */ + uint8_t id_not_found : 1, /* ID */ + mbz4 : 1, /* 0 */ + mbz5 : 1, /* 0 */ + wrong_cyl : 1, /* WC */ + all_bit_set : 1, /* BT */ + mark_not_found : 1, /* AM */ + ecc_crc_err : 1, /* ET */ + ecc_crc_field : 1; /* EF */ /* Status byte 2. */ - uint8_t headsel_state :4, /* headsel state[4] */ - defective_sector:1, /* DS */ - retried_ok :1, /* RG */ - need_reset :1, /* RR */ + uint8_t headsel_state : 4, /* headsel state[4] */ + defective_sector : 1, /* DS */ + retried_ok : 1, /* RG */ + need_reset : 1, /* RR */ #if 1 - valid :1; /* 0 (abused as VALID) */ + valid : 1; /* 0 (abused as VALID) */ #else - mbz6 :1; /* 0 */ + mbz6 : 1; /* 0 */ #endif /* Most recent ID field seen. */ - uint8_t last_cyl_low; /* Cyl_Low[8] */ - uint8_t last_head :4, /* HD[4] */ - mbz7 :1, /* 0 */ - last_cyl_high :2, /* Cyl_high[2] */ - last_def_sect :1; /* DS */ - uint8_t last_sect; /* Sect[8] */ + uint8_t last_cyl_low; /* Cyl_Low[8] */ + uint8_t last_head : 4, /* HD[4] */ + mbz7 : 1, /* 0 */ + last_cyl_high : 2, /* Cyl_high[2] */ + last_def_sect : 1; /* DS */ + uint8_t last_sect; /* Sect[8] */ - uint8_t sect_size; /* Size[8] = 02 */ + uint8_t sect_size; /* Size[8] = 02 */ /* Current position. */ - uint8_t curr_cyl_high :2, /* Cyl_High_[2] */ - mbz8 :1, /* 0 */ - mbz9 :1, /* 0 */ - curr_head :4; /* HD_2[4] */ - uint8_t curr_cyl_low; /* Cyl_Low_2[8] */ + uint8_t curr_cyl_high : 2, /* Cyl_High_[2] */ + mbz8 : 1, /* 0 */ + mbz9 : 1, /* 0 */ + curr_head : 4; /* HD_2[4] */ + uint8_t curr_cyl_low; /* Cyl_Low_2[8] */ - uint8_t sect_corr; /* sectors corrected */ + uint8_t sect_corr; /* sectors corrected */ - uint8_t retries; /* retries */ + uint8_t retries; /* retries */ /* * This byte shows the progress of the controller through the @@ -253,11 +249,11 @@ typedef struct { * 4. When the transfer is complete, the low nibble equals hex 4 * and the high nibble is unchanged. */ - uint8_t cmd_syndrome; /* command syndrome */ + uint8_t cmd_syndrome; /* command syndrome */ - uint8_t drive_type; /* drive type */ + uint8_t drive_type; /* drive type */ - uint8_t rsvd; /* reserved byte */ + uint8_t rsvd; /* reserved byte */ } ssb_t; #pragma pack(pop) @@ -295,22 +291,22 @@ typedef struct { * being formatted, an additional byte is sent with all * bits 0. */ -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { - uint8_t cyl_high :2, /* cylinder [9:8] bits */ - defective_sector:1, /* DS */ - mbz1 :1, /* 0 */ - head :4; /* head number */ + uint8_t cyl_high : 2, /* cylinder [9:8] bits */ + defective_sector : 1, /* DS */ + mbz1 : 1, /* 0 */ + head : 4; /* head number */ - uint8_t cyl_low; /* cylinder [7:0] bits */ + uint8_t cyl_low; /* cylinder [7:0] bits */ - uint8_t sector; /* sector number */ + uint8_t sector; /* sector number */ - uint8_t mbz2 :1, /* 0 */ - mbo :1, /* 1 */ - mbz3 :6; /* 000000 */ + uint8_t mbz2 : 1, /* 0 */ + mbo : 1, /* 1 */ + mbz3 : 6; /* 000000 */ - uint8_t fill; /* filler byte */ + uint8_t fill; /* filler byte */ } fcb_t; #pragma pack(pop) @@ -321,97 +317,95 @@ typedef struct { * command control block to the controller. It can be sent * through a DMA or PIO operation. */ -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { - uint8_t ec_p :1, /* EC/P (ecc/park) */ - mbz1 :1, /* 0 */ - auto_seek :1, /* AS (auto-seek) */ - no_data :1, /* ND (no data) */ - cmd :4; /* command code[4] */ + uint8_t ec_p : 1, /* EC/P (ecc/park) */ + mbz1 : 1, /* 0 */ + auto_seek : 1, /* AS (auto-seek) */ + no_data : 1, /* ND (no data) */ + cmd : 4; /* command code[4] */ - uint8_t cyl_high :2, /* cylinder [9:8] bits */ - mbz2 :2, /* 00 */ - head :4; /* head number */ + uint8_t cyl_high : 2, /* cylinder [9:8] bits */ + mbz2 : 2, /* 00 */ + head : 4; /* head number */ - uint8_t cyl_low; /* cylinder [7:0] bits */ + uint8_t cyl_low; /* cylinder [7:0] bits */ - uint8_t sector; /* sector number */ + uint8_t sector; /* sector number */ - uint8_t mbz3 :1, /* 0 */ - mbo1 :1, /* 1 */ - mbz4 :6; /* 000000 */ + uint8_t mbz3 : 1, /* 0 */ + mbo1 : 1, /* 1 */ + mbz4 : 6; /* 000000 */ - uint8_t count; /* blk count/interleave */ + uint8_t count; /* blk count/interleave */ } ccb_t; #pragma pack(pop) /* Define the hard drive geometry table. */ typedef struct { - uint16_t cyl; - uint8_t hpc; - uint8_t spt; - int16_t wpc; - int16_t lz; + uint16_t cyl; + uint8_t hpc; + uint8_t spt; + int16_t wpc; + int16_t lz; } geom_t; /* Define an attached drive. */ typedef struct { - int8_t id, /* drive ID on bus */ - present, /* drive is present */ - hdd_num, /* index to global disk table */ - type; /* drive type ID */ + int8_t id, /* drive ID on bus */ + present, /* drive is present */ + hdd_num, /* index to global disk table */ + type; /* drive type ID */ - uint16_t cur_cyl; /* last known position of heads */ + uint16_t cur_cyl; /* last known position of heads */ - uint8_t spt, /* active drive parameters */ - hpc; - uint16_t tracks; + uint8_t spt, /* active drive parameters */ + hpc; + uint16_t tracks; - uint8_t cfg_spt, /* configured drive parameters */ - cfg_hpc; - uint16_t cfg_tracks; + uint8_t cfg_spt, /* configured drive parameters */ + cfg_hpc; + uint16_t cfg_tracks; } drive_t; - typedef struct { - uint16_t base; /* controller base I/O address */ - int8_t irq; /* controller IRQ channel */ - int8_t dma; /* controller DMA channel */ + uint16_t base; /* controller base I/O address */ + int8_t irq; /* controller IRQ channel */ + int8_t dma; /* controller DMA channel */ /* Registers. */ - uint8_t attn, /* ATTENTION register */ - ctrl, /* Control register (ACR) */ - status, /* Status register (ASR) */ - intstat; /* Interrupt Status register (ISR) */ + uint8_t attn, /* ATTENTION register */ + ctrl, /* Control register (ACR) */ + status, /* Status register (ASR) */ + intstat; /* Interrupt Status register (ISR) */ - uint8_t *reg_91; /* handle to system board's register 0x91 */ + uint8_t *reg_91; /* handle to system board's register 0x91 */ /* Controller state. */ - uint64_t callback; - pc_timer_t timer; - int8_t state, /* controller state */ - reset; /* reset state counter */ + uint64_t callback; + pc_timer_t timer; + int8_t state, /* controller state */ + reset; /* reset state counter */ /* Data transfer. */ - int16_t buf_idx, /* buffer index and pointer */ - buf_len; - uint8_t *buf_ptr; + int16_t buf_idx, /* buffer index and pointer */ + buf_len; + uint8_t *buf_ptr; /* Current operation parameters. */ - ssb_t ssb; /* sense block */ - ccb_t ccb; /* command control block */ - uint16_t track; /* requested track# */ - uint8_t head, /* requested head# */ - sector; /* requested sector# */ - int count; /* requested sector count */ + ssb_t ssb; /* sense block */ + ccb_t ccb; /* command control block */ + uint16_t track; /* requested track# */ + uint8_t head, /* requested head# */ + sector; /* requested sector# */ + int count; /* requested sector count */ - drive_t drives[XTA_NUM]; /* the attached drive(s) */ + drive_t drives[XTA_NUM]; /* the attached drive(s) */ - uint8_t data[512]; /* data buffer */ - uint8_t sector_buf[512]; /* sector buffer */ + uint8_t data[512]; /* data buffer */ + uint8_t sector_buf[512]; /* sector buffer */ } hdc_t; - /* * IBM hard drive types 1-44. * @@ -422,6 +416,7 @@ typedef struct { * p-comp Zone */ static const geom_t ibm_type_table[] = { + // clang-format off { 0, 0, 0, 0, 0 }, /* 0 (none) */ { 306, 4, 17, 128, 305 }, /* 1 10 MB */ { 615, 4, 17, 300, 615 }, /* 2 20 MB */ @@ -467,43 +462,41 @@ static const geom_t ibm_type_table[] = { { 654, 2, 32, -1, 674 }, /* 42 20 MB */ { 923, 5, 36, -1, 1023 }, /* 43 81 MB */ { 531, 8, 39, -1, 532 } /* 44 81 MB */ + // clang-format on }; - #ifdef ENABLE_PS1_HDC_LOG int ps1_hdc_do_log = ENABLE_PS1_HDC_LOG; - static void ps1_hdc_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (ps1_hdc_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (ps1_hdc_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define ps1_hdc_log(fmt, ...) +# define ps1_hdc_log(fmt, ...) #endif static void hdc_set_callback(hdc_t *dev, uint64_t callback) { if (!dev) { - return; + return; } if (callback) { - dev->callback = callback; - timer_set_delay_u64(&dev->timer, dev->callback); - } else { - dev->callback = 0; - timer_disable(&dev->timer); - } + dev->callback = callback; + timer_set_delay_u64(&dev->timer, dev->callback); + } else { + dev->callback = 0; + timer_disable(&dev->timer); + } } /* FIXME: we should use the disk/hdd_table.c code with custom tables! */ @@ -511,80 +504,75 @@ static int ibm_drive_type(drive_t *drive) { const geom_t *ptr; - int i; + int i; for (i = 0; i < (sizeof(ibm_type_table) / sizeof(geom_t)); i++) { - ptr = &ibm_type_table[i]; - if ((drive->tracks == ptr->cyl) && - (drive->hpc == ptr->hpc) && (drive->spt == ptr->spt)) return(i); + ptr = &ibm_type_table[i]; + if ((drive->tracks == ptr->cyl) && (drive->hpc == ptr->hpc) && (drive->spt == ptr->spt)) + return (i); } - return(HDC_TYPE_USER); + return (HDC_TYPE_USER); } - static void set_intr(hdc_t *dev, int raise) { if (raise) { - dev->status |= ASR_INT_REQ; - if (dev->ctrl & ACR_INT_EN) - picint(1 << dev->irq); + dev->status |= ASR_INT_REQ; + if (dev->ctrl & ACR_INT_EN) + picint(1 << dev->irq); } else { - dev->status &= ~ASR_INT_REQ; - picintc(1 << dev->irq); + dev->status &= ~ASR_INT_REQ; + picintc(1 << dev->irq); } } - /* Get the logical (block) address of a CHS triplet. */ static int get_sector(hdc_t *dev, drive_t *drive, off64_t *addr) { if (drive->cur_cyl != dev->track) { - ps1_hdc_log("HDC: get_sector: wrong cylinder %d/%d\n", - drive->cur_cyl, dev->track); - dev->ssb.wrong_cyl = 1; - return(1); + ps1_hdc_log("HDC: get_sector: wrong cylinder %d/%d\n", + drive->cur_cyl, dev->track); + dev->ssb.wrong_cyl = 1; + return (1); } if (dev->head >= drive->hpc) { - ps1_hdc_log("HDC: get_sector: past end of heads\n"); - dev->ssb.cylinder_err = 1; - return(1); + ps1_hdc_log("HDC: get_sector: past end of heads\n"); + dev->ssb.cylinder_err = 1; + return (1); } if (dev->sector > drive->spt) { - ps1_hdc_log("HDC: get_sector: past end of sectors\n"); - dev->ssb.mark_not_found = 1; - return(1); + ps1_hdc_log("HDC: get_sector: past end of sectors\n"); + dev->ssb.mark_not_found = 1; + return (1); } /* Calculate logical address (block number) of desired sector. */ - *addr = ((((off64_t) dev->track*drive->hpc) + \ - dev->head)*drive->spt) + dev->sector - 1; + *addr = ((((off64_t) dev->track * drive->hpc) + dev->head) * drive->spt) + dev->sector - 1; - return(0); + return (0); } - static void next_sector(hdc_t *dev, drive_t *drive) { if (++dev->sector > drive->spt) { - dev->sector = 1; - if (++dev->head >= drive->hpc) { - dev->head = 0; - dev->track++; - if (++drive->cur_cyl >= drive->tracks) { - drive->cur_cyl = drive->tracks-1; - dev->ssb.cylinder_err = 1; - } - } + dev->sector = 1; + if (++dev->head >= drive->hpc) { + dev->head = 0; + dev->track++; + if (++drive->cur_cyl >= drive->tracks) { + drive->cur_cyl = drive->tracks - 1; + dev->ssb.cylinder_err = 1; + } + } } } - /* Finish up. Repeated all over, so a function it is now. */ static void do_finish(hdc_t *dev) @@ -598,29 +586,27 @@ do_finish(hdc_t *dev) set_intr(dev, 1); } - /* Seek to a cylinder. */ static int do_seek(hdc_t *dev, drive_t *drive, uint16_t cyl) { if (cyl >= drive->tracks) { - dev->ssb.cylinder_err = 1; - return(1); + dev->ssb.cylinder_err = 1; + return (1); } - dev->track = cyl; + dev->track = cyl; drive->cur_cyl = dev->track; - return(0); + return (0); } - /* Format a track or an entire drive. */ static void do_format(hdc_t *dev, drive_t *drive, ccb_t *ccb) { - int start_cyl, end_cyl; - int intr = 0, val; + int start_cyl, end_cyl; + int intr = 0, val; off64_t addr; #if 0 fcb_t *fcb; @@ -628,443 +614,441 @@ do_format(hdc_t *dev, drive_t *drive, ccb_t *ccb) /* Get the parameters from the CCB. */ if (ccb->cmd == CMD_FORMAT_DRIVE) { - start_cyl = 0; - end_cyl = drive->tracks; + start_cyl = 0; + end_cyl = drive->tracks; } else { - start_cyl = (ccb->cyl_low | (ccb->cyl_high << 8)); - end_cyl = start_cyl + 1; + start_cyl = (ccb->cyl_low | (ccb->cyl_high << 8)); + end_cyl = start_cyl + 1; } switch (dev->state) { - case STATE_IDLE: - /* Ready to transfer the FCB data in. */ - dev->state = STATE_RDATA; - dev->buf_idx = 0; - dev->buf_ptr = dev->data; - dev->buf_len = ccb->count * sizeof(fcb_t); - if (dev->buf_len & 1) - dev->buf_len++; /* must be even */ + case STATE_IDLE: + /* Ready to transfer the FCB data in. */ + dev->state = STATE_RDATA; + dev->buf_idx = 0; + dev->buf_ptr = dev->data; + dev->buf_len = ccb->count * sizeof(fcb_t); + if (dev->buf_len & 1) + dev->buf_len++; /* must be even */ - /* Enable for PIO or DMA, as needed. */ + /* Enable for PIO or DMA, as needed. */ #if NOT_USED - if (dev->ctrl & ACR_DMA_EN) - hdc_set_callback(dev, HDC_TIME); - else + if (dev->ctrl & ACR_DMA_EN) + hdc_set_callback(dev, HDC_TIME); + else #endif - dev->status |= ASR_DATA_REQ; - break; + dev->status |= ASR_DATA_REQ; + break; - case STATE_RDATA: - /* Perform DMA. */ - while (dev->buf_idx < dev->buf_len) { - val = dma_channel_read(dev->dma); - if (val == DMA_NODATA) { - dev->intstat |= ISR_EQUIP_CHECK; - dev->ssb.need_reset = 1; - intr = 1; - break; - } - dev->buf_ptr[dev->buf_idx] = (val & 0xff); - dev->buf_idx++; - } - dev->state = STATE_RDONE; - hdc_set_callback(dev, HDC_TIME); - break; + case STATE_RDATA: + /* Perform DMA. */ + while (dev->buf_idx < dev->buf_len) { + val = dma_channel_read(dev->dma); + if (val == DMA_NODATA) { + dev->intstat |= ISR_EQUIP_CHECK; + dev->ssb.need_reset = 1; + intr = 1; + break; + } + dev->buf_ptr[dev->buf_idx] = (val & 0xff); + dev->buf_idx++; + } + dev->state = STATE_RDONE; + hdc_set_callback(dev, HDC_TIME); + break; - case STATE_RDONE: - if (! (dev->ctrl & ACR_DMA_EN)) - dev->status &= ~ASR_DATA_REQ; + case STATE_RDONE: + if (!(dev->ctrl & ACR_DMA_EN)) + dev->status &= ~ASR_DATA_REQ; - /* Point to the FCB we got. */ + /* Point to the FCB we got. */ #if 0 fcb = (fcb_t *)dev->data; #endif - dev->state = STATE_FINIT; - /*FALLTHROUGH*/ + dev->state = STATE_FINIT; + /*FALLTHROUGH*/ - case STATE_FINIT: + case STATE_FINIT: do_fmt: - /* Activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 1); + /* Activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 1); - /* Seek to cylinder. */ - if (do_seek(dev, drive, start_cyl)) { - intr = 1; - break; - } - dev->head = ccb->head; - dev->sector = 1; + /* Seek to cylinder. */ + if (do_seek(dev, drive, start_cyl)) { + intr = 1; + break; + } + dev->head = ccb->head; + dev->sector = 1; - /* Get address of sector to write. */ - if (get_sector(dev, drive, &addr)) { - intr = 1; - break; - } + /* Get address of sector to write. */ + if (get_sector(dev, drive, &addr)) { + intr = 1; + break; + } - /* - * For now, we don't use the info from - * the FCB, although we should at least - * use it's "filler byte" value... - */ + /* + * For now, we don't use the info from + * the FCB, although we should at least + * use it's "filler byte" value... + */ #if 0 hdd_image_zero_ex(drive->hdd_num, addr, fcb->fill, drive->spt); #else - hdd_image_zero(drive->hdd_num, addr, drive->spt); + hdd_image_zero(drive->hdd_num, addr, drive->spt); #endif - /* Done with this track. */ - dev->state = STATE_FDONE; - /*FALLTHROUGH*/ + /* Done with this track. */ + dev->state = STATE_FDONE; + /*FALLTHROUGH*/ - case STATE_FDONE: - /* One more track done. */ - if (++start_cyl == end_cyl) { - intr = 1; - break; - } + case STATE_FDONE: + /* One more track done. */ + if (++start_cyl == end_cyl) { + intr = 1; + break; + } - /* De-activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 0); + /* De-activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0); - /* This saves us a LOT of code. */ - dev->state = STATE_FINIT; - goto do_fmt; + /* This saves us a LOT of code. */ + dev->state = STATE_FINIT; + goto do_fmt; } /* If we errored out, go back idle. */ if (intr) { - /* De-activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 0); + /* De-activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0); - do_finish(dev); + do_finish(dev); } } - /* Execute the CCB we just received. */ static void hdc_callback(void *priv) { - hdc_t *dev = (hdc_t *)priv; - ccb_t *ccb = &dev->ccb; + hdc_t *dev = (hdc_t *) priv; + ccb_t *ccb = &dev->ccb; drive_t *drive; - off64_t addr; - int no_data = 0; - int val; + off64_t addr; + int no_data = 0; + int val; /* Cancel timer. */ dev->callback = 0; /* Clear the SSB error bits. */ - dev->ssb.track_0 = 0; - dev->ssb.cylinder_err = 0; - dev->ssb.write_fault = 0; - dev->ssb.seek_end = 0; - dev->ssb.not_ready = 0; - dev->ssb.id_not_found = 0; - dev->ssb.wrong_cyl = 0; - dev->ssb.all_bit_set = 0; + dev->ssb.track_0 = 0; + dev->ssb.cylinder_err = 0; + dev->ssb.write_fault = 0; + dev->ssb.seek_end = 0; + dev->ssb.not_ready = 0; + dev->ssb.id_not_found = 0; + dev->ssb.wrong_cyl = 0; + dev->ssb.all_bit_set = 0; dev->ssb.mark_not_found = 0; - dev->ssb.ecc_crc_err = 0; - dev->ssb.ecc_crc_field = 0; - dev->ssb.valid = 1; + dev->ssb.ecc_crc_err = 0; + dev->ssb.ecc_crc_field = 0; + dev->ssb.valid = 1; /* We really only support one drive, but ohwell. */ drive = &dev->drives[0]; switch (ccb->cmd) { - case CMD_READ_VERIFY: - no_data = 1; - /*FALLTHROUGH*/ + case CMD_READ_VERIFY: + no_data = 1; + /*FALLTHROUGH*/ - case CMD_READ_SECTORS: - if (! drive->present) { - dev->ssb.not_ready = 1; - do_finish(dev); - return; - } + case CMD_READ_SECTORS: + if (!drive->present) { + dev->ssb.not_ready = 1; + do_finish(dev); + return; + } - switch (dev->state) { - case STATE_IDLE: - /* Seek to cylinder if requested. */ - if (ccb->auto_seek) { - if (do_seek(dev, drive, - (ccb->cyl_low|(ccb->cyl_high<<8)))) { - do_finish(dev); - return; - } - } - dev->head = ccb->head; - dev->sector = ccb->sector; + switch (dev->state) { + case STATE_IDLE: + /* Seek to cylinder if requested. */ + if (ccb->auto_seek) { + if (do_seek(dev, drive, + (ccb->cyl_low | (ccb->cyl_high << 8)))) { + do_finish(dev); + return; + } + } + dev->head = ccb->head; + dev->sector = ccb->sector; - /* Get sector count and size. */ - dev->count = (int)ccb->count; - dev->buf_len = (128 << dev->ssb.sect_size); + /* Get sector count and size. */ + dev->count = (int) ccb->count; + dev->buf_len = (128 << dev->ssb.sect_size); - dev->state = STATE_SEND; - /*FALLTHROUGH*/ + dev->state = STATE_SEND; + /*FALLTHROUGH*/ - case STATE_SEND: - /* Activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 1); + case STATE_SEND: + /* Activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 1); do_send: - /* Get address of sector to load. */ - if (get_sector(dev, drive, &addr)) { - /* De-activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 0); - do_finish(dev); - return; - } + /* Get address of sector to load. */ + if (get_sector(dev, drive, &addr)) { + /* De-activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0); + do_finish(dev); + return; + } - /* Read the block from the image. */ - hdd_image_read(drive->hdd_num, addr, 1, - (uint8_t *)dev->sector_buf); + /* Read the block from the image. */ + hdd_image_read(drive->hdd_num, addr, 1, + (uint8_t *) dev->sector_buf); - /* Ready to transfer the data out. */ - dev->state = STATE_SDATA; - dev->buf_idx = 0; - if (no_data) { - /* Delay a bit, no actual transfer. */ - hdc_set_callback(dev, HDC_TIME); - } else { - if (dev->ctrl & ACR_DMA_EN) { - /* DMA enabled. */ - dev->buf_ptr = dev->sector_buf; - hdc_set_callback(dev, HDC_TIME); - } else { - /* No DMA, do PIO. */ - dev->status |= (ASR_DATA_REQ|ASR_DIR); + /* Ready to transfer the data out. */ + dev->state = STATE_SDATA; + dev->buf_idx = 0; + if (no_data) { + /* Delay a bit, no actual transfer. */ + hdc_set_callback(dev, HDC_TIME); + } else { + if (dev->ctrl & ACR_DMA_EN) { + /* DMA enabled. */ + dev->buf_ptr = dev->sector_buf; + hdc_set_callback(dev, HDC_TIME); + } else { + /* No DMA, do PIO. */ + dev->status |= (ASR_DATA_REQ | ASR_DIR); - /* Copy from sector to data. */ - memcpy(dev->data, - dev->sector_buf, - dev->buf_len); - dev->buf_ptr = dev->data; - } - } - break; + /* Copy from sector to data. */ + memcpy(dev->data, + dev->sector_buf, + dev->buf_len); + dev->buf_ptr = dev->data; + } + } + break; - case STATE_SDATA: - if (! no_data) { - /* Perform DMA. */ - while (dev->buf_idx < dev->buf_len) { - val = dma_channel_write(dev->dma, - *dev->buf_ptr++); - if (val == DMA_NODATA) { - ps1_hdc_log("HDC: CMD_READ_SECTORS out of data (idx=%d, len=%d)!\n", dev->buf_idx, dev->buf_len); + case STATE_SDATA: + if (!no_data) { + /* Perform DMA. */ + while (dev->buf_idx < dev->buf_len) { + val = dma_channel_write(dev->dma, + *dev->buf_ptr++); + if (val == DMA_NODATA) { + ps1_hdc_log("HDC: CMD_READ_SECTORS out of data (idx=%d, len=%d)!\n", dev->buf_idx, dev->buf_len); - /* De-activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 0); + /* De-activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0); - dev->intstat |= ISR_EQUIP_CHECK; - dev->ssb.need_reset = 1; - do_finish(dev); - return; - } - dev->buf_idx++; - } - } - dev->state = STATE_SDONE; - hdc_set_callback(dev, HDC_TIME); - break; + dev->intstat |= ISR_EQUIP_CHECK; + dev->ssb.need_reset = 1; + do_finish(dev); + return; + } + dev->buf_idx++; + } + } + dev->state = STATE_SDONE; + hdc_set_callback(dev, HDC_TIME); + break; - case STATE_SDONE: - dev->buf_idx = 0; - if (--dev->count == 0) { - /* De-activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 0); + case STATE_SDONE: + dev->buf_idx = 0; + if (--dev->count == 0) { + /* De-activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0); - if (! (dev->ctrl & ACR_DMA_EN)) - dev->status &= ~(ASR_DATA_REQ|ASR_DIR); - dev->ssb.cmd_syndrome = 0xD4; - do_finish(dev); - return; - } + if (!(dev->ctrl & ACR_DMA_EN)) + dev->status &= ~(ASR_DATA_REQ | ASR_DIR); + dev->ssb.cmd_syndrome = 0xD4; + do_finish(dev); + return; + } - /* Addvance to next sector. */ - next_sector(dev, drive); + /* Addvance to next sector. */ + next_sector(dev, drive); - /* This saves us a LOT of code. */ - dev->state = STATE_SEND; - goto do_send; - } - break; + /* This saves us a LOT of code. */ + dev->state = STATE_SEND; + goto do_send; + } + break; - case CMD_READ_EXT: /* READ_EXT */ - case CMD_READ_ID: /* READ_ID */ - if (! drive->present) { - dev->ssb.not_ready = 1; - do_finish(dev); - return; - } + case CMD_READ_EXT: /* READ_EXT */ + case CMD_READ_ID: /* READ_ID */ + if (!drive->present) { + dev->ssb.not_ready = 1; + do_finish(dev); + return; + } - dev->intstat |= ISR_INVALID_CMD; - do_finish(dev); - break; + dev->intstat |= ISR_INVALID_CMD; + do_finish(dev); + break; - case CMD_RECALIBRATE: /* RECALIBRATE */ - if (drive->present) { - dev->track = drive->cur_cyl = 0; - } else { - dev->ssb.not_ready = 1; - dev->intstat |= ISR_TERMINATION; - } + case CMD_RECALIBRATE: /* RECALIBRATE */ + if (drive->present) { + dev->track = drive->cur_cyl = 0; + } else { + dev->ssb.not_ready = 1; + dev->intstat |= ISR_TERMINATION; + } - do_finish(dev); - break; + do_finish(dev); + break; - case CMD_WRITE_VERIFY: - no_data = 1; - /*FALLTHROUGH*/ + case CMD_WRITE_VERIFY: + no_data = 1; + /*FALLTHROUGH*/ - case CMD_WRITE_SECTORS: - if (! drive->present) { - dev->ssb.not_ready = 1; - do_finish(dev); - return; - } + case CMD_WRITE_SECTORS: + if (!drive->present) { + dev->ssb.not_ready = 1; + do_finish(dev); + return; + } - switch (dev->state) { - case STATE_IDLE: - /* Seek to cylinder if requested. */ - if (ccb->auto_seek) { - if (do_seek(dev, drive, - (ccb->cyl_low|(ccb->cyl_high<<8)))) { - do_finish(dev); - return; - } - } - dev->head = ccb->head; - dev->sector = ccb->sector; + switch (dev->state) { + case STATE_IDLE: + /* Seek to cylinder if requested. */ + if (ccb->auto_seek) { + if (do_seek(dev, drive, + (ccb->cyl_low | (ccb->cyl_high << 8)))) { + do_finish(dev); + return; + } + } + dev->head = ccb->head; + dev->sector = ccb->sector; - /* Get sector count and size. */ - dev->count = (int)ccb->count; - dev->buf_len = (128 << dev->ssb.sect_size); + /* Get sector count and size. */ + dev->count = (int) ccb->count; + dev->buf_len = (128 << dev->ssb.sect_size); - dev->state = STATE_RECV; - /*FALLTHROUGH*/ + dev->state = STATE_RECV; + /*FALLTHROUGH*/ - case STATE_RECV: - /* Activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 1); + case STATE_RECV: + /* Activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 1); do_recv: - /* Ready to transfer the data in. */ - dev->state = STATE_RDATA; - dev->buf_idx = 0; - if (no_data) { - /* Delay a bit, no actual transfer. */ - hdc_set_callback(dev, HDC_TIME); - } else { - if (dev->ctrl & ACR_DMA_EN) { - /* DMA enabled. */ - dev->buf_ptr = dev->sector_buf; - hdc_set_callback(dev, HDC_TIME); - } else { - /* No DMA, do PIO. */ - dev->buf_ptr = dev->data; - dev->status |= ASR_DATA_REQ; - } - } - break; + /* Ready to transfer the data in. */ + dev->state = STATE_RDATA; + dev->buf_idx = 0; + if (no_data) { + /* Delay a bit, no actual transfer. */ + hdc_set_callback(dev, HDC_TIME); + } else { + if (dev->ctrl & ACR_DMA_EN) { + /* DMA enabled. */ + dev->buf_ptr = dev->sector_buf; + hdc_set_callback(dev, HDC_TIME); + } else { + /* No DMA, do PIO. */ + dev->buf_ptr = dev->data; + dev->status |= ASR_DATA_REQ; + } + } + break; - case STATE_RDATA: - if (! no_data) { - /* Perform DMA. */ - while (dev->buf_idx < dev->buf_len) { - val = dma_channel_read(dev->dma); - if (val == DMA_NODATA) { - ps1_hdc_log("HDC: CMD_WRITE_SECTORS out of data (idx=%d, len=%d)!\n", dev->buf_idx, dev->buf_len); + case STATE_RDATA: + if (!no_data) { + /* Perform DMA. */ + while (dev->buf_idx < dev->buf_len) { + val = dma_channel_read(dev->dma); + if (val == DMA_NODATA) { + ps1_hdc_log("HDC: CMD_WRITE_SECTORS out of data (idx=%d, len=%d)!\n", dev->buf_idx, dev->buf_len); - /* De-activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 0); + /* De-activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0); - dev->intstat |= ISR_EQUIP_CHECK; - dev->ssb.need_reset = 1; - do_finish(dev); - return; - } - dev->buf_ptr[dev->buf_idx] = (val & 0xff); - dev->buf_idx++; - } - } - dev->state = STATE_RDONE; - hdc_set_callback(dev, HDC_TIME); - break; + dev->intstat |= ISR_EQUIP_CHECK; + dev->ssb.need_reset = 1; + do_finish(dev); + return; + } + dev->buf_ptr[dev->buf_idx] = (val & 0xff); + dev->buf_idx++; + } + } + dev->state = STATE_RDONE; + hdc_set_callback(dev, HDC_TIME); + break; - case STATE_RDONE: - /* Copy from data to sector if PIO. */ - if (! (dev->ctrl & ACR_DMA_EN)) - memcpy(dev->sector_buf, - dev->data, - dev->buf_len); + case STATE_RDONE: + /* Copy from data to sector if PIO. */ + if (!(dev->ctrl & ACR_DMA_EN)) + memcpy(dev->sector_buf, + dev->data, + dev->buf_len); - /* Get address of sector to write. */ - if (get_sector(dev, drive, &addr)) { - /* De-activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 0); + /* Get address of sector to write. */ + if (get_sector(dev, drive, &addr)) { + /* De-activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0); - do_finish(dev); - return; - } + do_finish(dev); + return; + } - /* Write the block to the image. */ - hdd_image_write(drive->hdd_num, addr, 1, - (uint8_t *)dev->sector_buf); + /* Write the block to the image. */ + hdd_image_write(drive->hdd_num, addr, 1, + (uint8_t *) dev->sector_buf); - dev->buf_idx = 0; - if (--dev->count == 0) { - /* De-activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 0); + dev->buf_idx = 0; + if (--dev->count == 0) { + /* De-activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0); - if (! (dev->ctrl & ACR_DMA_EN)) - dev->status &= ~ASR_DATA_REQ; - dev->ssb.cmd_syndrome = 0xD4; - do_finish(dev); - return; - } + if (!(dev->ctrl & ACR_DMA_EN)) + dev->status &= ~ASR_DATA_REQ; + dev->ssb.cmd_syndrome = 0xD4; + do_finish(dev); + return; + } - /* Advance to next sector. */ - next_sector(dev, drive); + /* Advance to next sector. */ + next_sector(dev, drive); - /* This saves us a LOT of code. */ - dev->state = STATE_RECV; - goto do_recv; - } - break; + /* This saves us a LOT of code. */ + dev->state = STATE_RECV; + goto do_recv; + } + break; - case CMD_FORMAT_DRIVE: - case CMD_FORMAT_TRACK: - do_format(dev, drive, ccb); - break; + case CMD_FORMAT_DRIVE: + case CMD_FORMAT_TRACK: + do_format(dev, drive, ccb); + break; - case CMD_SEEK: - if (! drive->present) { - dev->ssb.not_ready = 1; - do_finish(dev); - return; - } + case CMD_SEEK: + if (!drive->present) { + dev->ssb.not_ready = 1; + do_finish(dev); + return; + } - if (ccb->ec_p == 1) { - /* Park the heads. */ - val = do_seek(dev, drive, drive->tracks-1); - } else { - /* Seek to cylinder. */ - val = do_seek(dev, drive, - (ccb->cyl_low|(ccb->cyl_high<<8))); - } - if (! val) - dev->ssb.seek_end = 1; - do_finish(dev); - break; + if (ccb->ec_p == 1) { + /* Park the heads. */ + val = do_seek(dev, drive, drive->tracks - 1); + } else { + /* Seek to cylinder. */ + val = do_seek(dev, drive, + (ccb->cyl_low | (ccb->cyl_high << 8))); + } + if (!val) + dev->ssb.seek_end = 1; + do_finish(dev); + break; - default: - dev->intstat |= ISR_INVALID_CMD; - do_finish(dev); + default: + dev->intstat |= ISR_INVALID_CMD; + do_finish(dev); } } - /* Prepare to send the SSB block. */ static void hdc_send_ssb(hdc_t *dev) @@ -1074,24 +1058,24 @@ hdc_send_ssb(hdc_t *dev) /* We only support one drive, really, but ohwell. */ drive = &dev->drives[0]; - if (! dev->ssb.valid) { - /* Create a valid SSB. */ - memset(&dev->ssb, 0x00, sizeof(dev->ssb)); - dev->ssb.sect_size = 0x02; /* 512 bytes */ - dev->ssb.drive_type = drive->type; + if (!dev->ssb.valid) { + /* Create a valid SSB. */ + memset(&dev->ssb, 0x00, sizeof(dev->ssb)); + dev->ssb.sect_size = 0x02; /* 512 bytes */ + dev->ssb.drive_type = drive->type; } /* Update position fields. */ - dev->ssb.track_0 = !!(dev->track == 0); - dev->ssb.last_cyl_low = dev->ssb.curr_cyl_low; + dev->ssb.track_0 = !!(dev->track == 0); + dev->ssb.last_cyl_low = dev->ssb.curr_cyl_low; dev->ssb.last_cyl_high = dev->ssb.curr_cyl_high; - dev->ssb.last_head = dev->ssb.curr_head; + dev->ssb.last_head = dev->ssb.curr_head; dev->ssb.curr_cyl_high = ((dev->track >> 8) & 0x03); - dev->ssb.curr_cyl_low = (dev->track & 0xff); - dev->ssb.curr_head = (dev->head & 0x0f); + dev->ssb.curr_cyl_low = (dev->track & 0xff); + dev->ssb.curr_head = (dev->head & 0x0f); dev->ssb.headsel_state = dev->ssb.curr_head; - dev->ssb.last_sect = dev->sector; + dev->ssb.last_sect = dev->sector; /* We abuse an unused MBZ bit, so clear it. */ dev->ssb.valid = 0; @@ -1099,169 +1083,166 @@ hdc_send_ssb(hdc_t *dev) /* Set up the transfer buffer for the SSB. */ dev->buf_idx = 0; dev->buf_len = sizeof(dev->ssb); - dev->buf_ptr = (uint8_t *)&dev->ssb; + dev->buf_ptr = (uint8_t *) &dev->ssb; /* Done with the SSB. */ dev->attn &= ~ATT_SSB; } - /* Read one of the controller registers. */ static uint8_t hdc_read(uint16_t port, void *priv) { - hdc_t *dev = (hdc_t *)priv; + hdc_t *dev = (hdc_t *) priv; uint8_t ret = 0xff; /* TRM: tell system board we are alive. */ *dev->reg_91 |= 0x01; switch (port & 7) { - case 0: /* DATA register */ - if (dev->state == STATE_SDATA) { - if (dev->buf_idx > dev->buf_len) { - ps1_hdc_log("HDC: read with empty buffer!\n"); - dev->state = STATE_IDLE; - dev->intstat |= ISR_INVALID_CMD; - dev->status &= (ASR_TX_EN|ASR_DATA_REQ|ASR_DIR); - set_intr(dev, 1); - break; - } + case 0: /* DATA register */ + if (dev->state == STATE_SDATA) { + if (dev->buf_idx > dev->buf_len) { + ps1_hdc_log("HDC: read with empty buffer!\n"); + dev->state = STATE_IDLE; + dev->intstat |= ISR_INVALID_CMD; + dev->status &= (ASR_TX_EN | ASR_DATA_REQ | ASR_DIR); + set_intr(dev, 1); + break; + } - ret = dev->buf_ptr[dev->buf_idx]; - if (++dev->buf_idx == dev->buf_len) { - /* Data block sent OK. */ - dev->status &= ~(ASR_TX_EN|ASR_DATA_REQ|ASR_DIR); - dev->state = STATE_IDLE; - } - } - break; + ret = dev->buf_ptr[dev->buf_idx]; + if (++dev->buf_idx == dev->buf_len) { + /* Data block sent OK. */ + dev->status &= ~(ASR_TX_EN | ASR_DATA_REQ | ASR_DIR); + dev->state = STATE_IDLE; + } + } + break; - case 2: /* ASR */ - ret = dev->status; - break; + case 2: /* ASR */ + ret = dev->status; + break; - case 4: /* ISR */ - ret = dev->intstat; - dev->intstat = 0x00; - break; + case 4: /* ISR */ + ret = dev->intstat; + dev->intstat = 0x00; + break; } - return(ret); + return (ret); } - static void hdc_write(uint16_t port, uint8_t val, void *priv) { - hdc_t *dev = (hdc_t *)priv; + hdc_t *dev = (hdc_t *) priv; /* TRM: tell system board we are alive. */ *dev->reg_91 |= 0x01; switch (port & 7) { - case 0: /* DATA register */ - if (dev->state == STATE_RDATA) { - if (dev->buf_idx >= dev->buf_len) { - ps1_hdc_log("HDC: write with full buffer!\n"); - dev->intstat |= ISR_INVALID_CMD; - dev->status &= ~ASR_DATA_REQ; - set_intr(dev, 1); - break; - } + case 0: /* DATA register */ + if (dev->state == STATE_RDATA) { + if (dev->buf_idx >= dev->buf_len) { + ps1_hdc_log("HDC: write with full buffer!\n"); + dev->intstat |= ISR_INVALID_CMD; + dev->status &= ~ASR_DATA_REQ; + set_intr(dev, 1); + break; + } - /* Store the data into the buffer. */ - dev->buf_ptr[dev->buf_idx] = val; - if (++dev->buf_idx == dev->buf_len) { - /* We got all the data we need. */ - dev->status &= ~ASR_DATA_REQ; - dev->state = STATE_IDLE; + /* Store the data into the buffer. */ + dev->buf_ptr[dev->buf_idx] = val; + if (++dev->buf_idx == dev->buf_len) { + /* We got all the data we need. */ + dev->status &= ~ASR_DATA_REQ; + dev->state = STATE_IDLE; - /* If we were receiving a CCB, execute it. */ - if (dev->attn & ATT_CCB) { - /* - * If we were already busy with - * a CCB, then it must have had - * some new data using PIO. - */ - if (dev->status & ASR_BUSY) - dev->state = STATE_RDONE; - else - dev->status |= ASR_BUSY; + /* If we were receiving a CCB, execute it. */ + if (dev->attn & ATT_CCB) { + /* + * If we were already busy with + * a CCB, then it must have had + * some new data using PIO. + */ + if (dev->status & ASR_BUSY) + dev->state = STATE_RDONE; + else + dev->status |= ASR_BUSY; - /* Schedule command execution. */ - hdc_set_callback(dev, HDC_TIME); - } - } - } - break; + /* Schedule command execution. */ + hdc_set_callback(dev, HDC_TIME); + } + } + } + break; - case 2: /* ACR */ - dev->ctrl = val; - if (val & ACR_INT_EN) - set_intr(dev, 0); /* clear IRQ */ + case 2: /* ACR */ + dev->ctrl = val; + if (val & ACR_INT_EN) + set_intr(dev, 0); /* clear IRQ */ - if (dev->reset != 0) { - if (++dev->reset == 3) { - dev->reset = 0; + if (dev->reset != 0) { + if (++dev->reset == 3) { + dev->reset = 0; - set_intr(dev, 1); - } - break; - } + set_intr(dev, 1); + } + break; + } - if (val & ACR_RESET) - dev->reset = 1; - break; + if (val & ACR_RESET) + dev->reset = 1; + break; - case 4: /* ATTN */ - dev->status &= ~ASR_INT_REQ; - if (val & ATT_DATA) { - /* Dunno. Start PIO/DMA now? */ - } + case 4: /* ATTN */ + dev->status &= ~ASR_INT_REQ; + if (val & ATT_DATA) { + /* Dunno. Start PIO/DMA now? */ + } - if (val & ATT_SSB) { - if (dev->attn & ATT_CCB) { - /* Hey now, we're still busy for you! */ - dev->intstat |= ISR_INVALID_CMD; - set_intr(dev, 1); - break; - } + if (val & ATT_SSB) { + if (dev->attn & ATT_CCB) { + /* Hey now, we're still busy for you! */ + dev->intstat |= ISR_INVALID_CMD; + set_intr(dev, 1); + break; + } - /* OK, prepare for sending an SSB. */ - dev->attn |= ATT_SSB; + /* OK, prepare for sending an SSB. */ + dev->attn |= ATT_SSB; - /* Grab or initialize an SSB to send. */ - hdc_send_ssb(dev); + /* Grab or initialize an SSB to send. */ + hdc_send_ssb(dev); - dev->state = STATE_SDATA; - dev->status |= (ASR_TX_EN|ASR_DATA_REQ|ASR_DIR); - set_intr(dev, 1); - } + dev->state = STATE_SDATA; + dev->status |= (ASR_TX_EN | ASR_DATA_REQ | ASR_DIR); + set_intr(dev, 1); + } - if (val & ATT_CCB) { - dev->attn |= ATT_CCB; + if (val & ATT_CCB) { + dev->attn |= ATT_CCB; - /* Set up the transfer buffer for a CCB. */ - dev->buf_idx = 0; - dev->buf_len = sizeof(dev->ccb); - dev->buf_ptr = (uint8_t *)&dev->ccb; + /* Set up the transfer buffer for a CCB. */ + dev->buf_idx = 0; + dev->buf_len = sizeof(dev->ccb); + dev->buf_ptr = (uint8_t *) &dev->ccb; - dev->state = STATE_RDATA; - dev->status |= ASR_DATA_REQ; - set_intr(dev, 1); - } - break; + dev->state = STATE_RDATA; + dev->status |= ASR_DATA_REQ; + set_intr(dev, 1); + } + break; } } - static void * ps1_hdc_init(const device_t *info) { drive_t *drive; - hdc_t *dev; - int c, i; + hdc_t *dev; + int c, i; /* Allocate and initialize device block. */ dev = malloc(sizeof(hdc_t)); @@ -1269,44 +1250,45 @@ ps1_hdc_init(const device_t *info) /* Set up controller parameters for PS/1 2011. */ dev->base = 0x0320; - dev->irq = 14; - dev->dma = 3; + dev->irq = 14; + dev->dma = 3; ps1_hdc_log("HDC: initializing (I/O=%04X, IRQ=%d, DMA=%d)\n", - dev->base, dev->irq, dev->dma); + dev->base, dev->irq, dev->dma); /* Load any disks for this device class. */ c = 0; for (i = 0; i < HDD_NUM; i++) { - if ((hdd[i].bus == HDD_BUS_XTA) && (hdd[i].xta_channel < 1)) { - drive = &dev->drives[hdd[i].xta_channel]; + if ((hdd[i].bus == HDD_BUS_XTA) && (hdd[i].xta_channel < 1)) { + drive = &dev->drives[hdd[i].xta_channel]; - if (! hdd_image_load(i)) { - drive->present = 0; - continue; - } - drive->id = c; + if (!hdd_image_load(i)) { + drive->present = 0; + continue; + } + drive->id = c; - /* These are the "hardware" parameters (from the image.) */ - drive->cfg_spt = (uint8_t)(hdd[i].spt & 0xff); - drive->cfg_hpc = (uint8_t)(hdd[i].hpc & 0xff); - drive->cfg_tracks = (uint16_t)hdd[i].tracks; + /* These are the "hardware" parameters (from the image.) */ + drive->cfg_spt = (uint8_t) (hdd[i].spt & 0xff); + drive->cfg_hpc = (uint8_t) (hdd[i].hpc & 0xff); + drive->cfg_tracks = (uint16_t) hdd[i].tracks; - /* Use them as "active" parameters until overwritten. */ - drive->spt = drive->cfg_spt; - drive->hpc = drive->cfg_hpc; - drive->tracks = drive->cfg_tracks; + /* Use them as "active" parameters until overwritten. */ + drive->spt = drive->cfg_spt; + drive->hpc = drive->cfg_hpc; + drive->tracks = drive->cfg_tracks; - drive->type = ibm_drive_type(drive); - drive->hdd_num = i; - drive->present = 1; + drive->type = ibm_drive_type(drive); + drive->hdd_num = i; + drive->present = 1; - ps1_hdc_log("HDC: drive%d (type %d: cyl=%d,hd=%d,spt=%d), disk %d\n", - hdd[i].xta_channel, drive->type, - drive->tracks, drive->hpc, drive->spt, i); + ps1_hdc_log("HDC: drive%d (type %d: cyl=%d,hd=%d,spt=%d), disk %d\n", + hdd[i].xta_channel, drive->type, + drive->tracks, drive->hpc, drive->spt, i); - if (++c > 1) break; - } + if (++c > 1) + break; + } } /* Sectors are 1-based. */ @@ -1314,32 +1296,31 @@ ps1_hdc_init(const device_t *info) /* Enable the I/O block. */ io_sethandler(dev->base, 5, - hdc_read,NULL,NULL, hdc_write,NULL,NULL, dev); + hdc_read, NULL, NULL, hdc_write, NULL, NULL, dev); /* Create a timer for command delays. */ - timer_add(&dev->timer, hdc_callback, dev, 0); + timer_add(&dev->timer, hdc_callback, dev, 0); - return(dev); + return (dev); } - static void ps1_hdc_close(void *priv) { - hdc_t *dev = (hdc_t *)priv; + hdc_t *dev = (hdc_t *) priv; drive_t *drive; - int d; + int d; /* Remove the I/O handler. */ io_removehandler(dev->base, 5, - hdc_read,NULL,NULL, hdc_write,NULL,NULL, dev); + hdc_read, NULL, NULL, hdc_write, NULL, NULL, dev); /* Close all disks and their images. */ for (d = 0; d < XTA_NUM; d++) { - drive = &dev->drives[d]; + drive = &dev->drives[d]; - if (drive->present) - hdd_image_close(drive->hdd_num); + if (drive->present) + hdd_image_close(drive->hdd_num); } /* Release the device. */ @@ -1347,17 +1328,17 @@ ps1_hdc_close(void *priv) } const device_t ps1_hdc_device = { - .name = "PS/1 2011 Fixed Disk Controller", + .name = "PS/1 2011 Fixed Disk Controller", .internal_name = "ps1_hdc", - .flags = DEVICE_ISA | DEVICE_PS2, - .local = 0, - .init = ps1_hdc_init, - .close = ps1_hdc_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_PS2, + .local = 0, + .init = ps1_hdc_init, + .close = ps1_hdc_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; /* @@ -1375,7 +1356,7 @@ const device_t ps1_hdc_device = { void ps1_hdc_inform(void *priv, uint8_t *reg_91) { - hdc_t *dev = (hdc_t *)priv; + hdc_t *dev = (hdc_t *) priv; dev->reg_91 = reg_91; } diff --git a/src/machine/m_ps2_isa.c b/src/machine/m_ps2_isa.c index 094fc8a5f..af4fc5849 100644 --- a/src/machine/m_ps2_isa.c +++ b/src/machine/m_ps2_isa.c @@ -25,28 +25,26 @@ #include <86box/video.h> #include <86box/machine.h> - typedef struct { - int model; + int model; int cpu_type; - uint8_t ps2_91, - ps2_92, - ps2_94, - ps2_102, - ps2_103, - ps2_104, - ps2_105, - ps2_190; + uint8_t ps2_91, + ps2_92, + ps2_94, + ps2_102, + ps2_103, + ps2_104, + ps2_105, + ps2_190; serial_t *uart; } ps2_isa_t; - static void ps2_write(uint16_t port, uint8_t val, void *priv) { - ps2_isa_t *ps2 = (ps2_isa_t *)priv; + ps2_isa_t *ps2 = (ps2_isa_t *) priv; switch (port) { case 0x0094: @@ -98,16 +96,15 @@ ps2_write(uint16_t port, uint8_t val, void *priv) } } - static uint8_t ps2_read(uint16_t port, void *priv) { - ps2_isa_t *ps2 = (ps2_isa_t *)priv; - uint8_t temp = 0xff; + ps2_isa_t *ps2 = (ps2_isa_t *) priv; + uint8_t temp = 0xff; switch (port) { case 0x0091: - temp = ps2->ps2_91; + temp = ps2->ps2_91; ps2->ps2_91 = 0; break; @@ -139,34 +136,32 @@ ps2_read(uint16_t port, void *priv) return temp; } - static void ps2_isa_setup(int model, int cpu_type) { ps2_isa_t *ps2; - void *priv; + void *priv; - ps2 = (ps2_isa_t *)malloc(sizeof(ps2_isa_t)); + ps2 = (ps2_isa_t *) malloc(sizeof(ps2_isa_t)); memset(ps2, 0x00, sizeof(ps2_isa_t)); - ps2->model = model; + ps2->model = model; ps2->cpu_type = cpu_type; - io_sethandler(0x0091, 1, - ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2); + ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2); io_sethandler(0x0094, 1, - ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2); + ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2); io_sethandler(0x0102, 4, - ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2); + ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2); io_sethandler(0x0190, 1, - ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2); + ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2); ps2->uart = device_add_inst(&ns16450_device, 1); lpt1_remove(); lpt1_init(LPT_MDA_ADDR); - device_add(&port_92_device); + device_add(&port_92_device); mem_remap_top(384); @@ -183,7 +178,6 @@ ps2_isa_setup(int model, int cpu_type) device_add(&ps1vga_device); } - static void ps2_isa_common_init(const machine_t *model) { @@ -199,7 +193,6 @@ ps2_isa_common_init(const machine_t *model) device_add(&port_6x_ps2_device); } - int machine_ps2_m30_286_init(const machine_t *model) { diff --git a/src/machine/m_ps2_mca.c b/src/machine/m_ps2_mca.c index 665d42972..37077ac89 100644 --- a/src/machine/m_ps2_mca.c +++ b/src/machine/m_ps2_mca.c @@ -35,7 +35,7 @@ * 59 Temple Place - Suite 330 * Boston, MA 02111-1307 * USA. -*/ + */ #include #include #include @@ -69,39 +69,38 @@ #include <86box/video.h> #include <86box/machine.h> - static struct { - uint8_t adapter_setup; - uint8_t option[4]; - uint8_t pos_vga; - uint8_t setup; - uint8_t sys_ctrl_port_a; - uint8_t subaddr_lo, subaddr_hi; + uint8_t adapter_setup; + uint8_t option[4]; + uint8_t pos_vga; + uint8_t setup; + uint8_t sys_ctrl_port_a; + uint8_t subaddr_lo, subaddr_hi; - uint8_t memory_bank[8]; + uint8_t memory_bank[8]; - uint8_t io_id; - uint16_t planar_id; + uint8_t io_id; + uint16_t planar_id; - mem_mapping_t split_mapping; - mem_mapping_t expansion_mapping; - mem_mapping_t cache_mapping; + mem_mapping_t split_mapping; + mem_mapping_t expansion_mapping; + mem_mapping_t cache_mapping; - uint8_t (*planar_read)(uint16_t port); - void (*planar_write)(uint16_t port, uint8_t val); + uint8_t (*planar_read)(uint16_t port); + void (*planar_write)(uint16_t port, uint8_t val); - uint8_t mem_regs[3]; + uint8_t mem_regs[3]; - uint32_t split_addr, split_size; - uint32_t split_phys; + uint32_t split_addr, split_size; + uint32_t split_phys; - uint8_t mem_pos_regs[8]; - uint8_t mem_2mb_pos_regs[8]; + uint8_t mem_pos_regs[8]; + uint8_t mem_2mb_pos_regs[8]; - int pending_cache_miss; + int pending_cache_miss; - serial_t *uart; + serial_t *uart; } ps2; /*The model 70 type 3/4 BIOS performs cache testing. Since 86Box doesn't have any @@ -138,703 +137,683 @@ static struct */ static uint8_t ps2_cache[65536]; -static int ps2_cache_valid[65536/8]; - +static int ps2_cache_valid[65536 / 8]; #ifdef ENABLE_PS2_MCA_LOG int ps2_mca_do_log = ENABLE_PS2_MCA_LOG; - static void ps2_mca_log(const char *fmt, ...) { va_list ap; if (ps2_mca_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define ps2_mca_log(fmt, ...) +# define ps2_mca_log(fmt, ...) #endif - -static uint8_t ps2_read_cache_ram(uint32_t addr, void *priv) +static uint8_t +ps2_read_cache_ram(uint32_t addr, void *priv) { - ps2_mca_log("ps2_read_cache_ram: addr=%08x %i %04x:%04x\n", addr, ps2_cache_valid[addr >> 3], CS,cpu_state.pc); - if (!ps2_cache_valid[addr >> 3]) - { - ps2_cache_valid[addr >> 3] = 1; - ps2.mem_regs[2] |= 0x80; - } - else - ps2.pending_cache_miss = 0; + ps2_mca_log("ps2_read_cache_ram: addr=%08x %i %04x:%04x\n", addr, ps2_cache_valid[addr >> 3], CS, cpu_state.pc); + if (!ps2_cache_valid[addr >> 3]) { + ps2_cache_valid[addr >> 3] = 1; + ps2.mem_regs[2] |= 0x80; + } else + ps2.pending_cache_miss = 0; - return ps2_cache[addr]; + return ps2_cache[addr]; } -static uint16_t ps2_read_cache_ramw(uint32_t addr, void *priv) +static uint16_t +ps2_read_cache_ramw(uint32_t addr, void *priv) { - ps2_mca_log("ps2_read_cache_ramw: addr=%08x %i %04x:%04x\n", addr, ps2_cache_valid[addr >> 3], CS,cpu_state.pc); - if (!ps2_cache_valid[addr >> 3]) - { - ps2_cache_valid[addr >> 3] = 1; - ps2.mem_regs[2] |= 0x80; - } - else - ps2.pending_cache_miss = 0; + ps2_mca_log("ps2_read_cache_ramw: addr=%08x %i %04x:%04x\n", addr, ps2_cache_valid[addr >> 3], CS, cpu_state.pc); + if (!ps2_cache_valid[addr >> 3]) { + ps2_cache_valid[addr >> 3] = 1; + ps2.mem_regs[2] |= 0x80; + } else + ps2.pending_cache_miss = 0; - return *(uint16_t *)&ps2_cache[addr]; + return *(uint16_t *) &ps2_cache[addr]; } -static uint32_t ps2_read_cache_raml(uint32_t addr, void *priv) +static uint32_t +ps2_read_cache_raml(uint32_t addr, void *priv) { - ps2_mca_log("ps2_read_cache_raml: addr=%08x %i %04x:%04x\n", addr, ps2_cache_valid[addr >> 3], CS,cpu_state.pc); - if (!ps2_cache_valid[addr >> 3]) - { - ps2_cache_valid[addr >> 3] = 1; - ps2.mem_regs[2] |= 0x80; - } - else - ps2.pending_cache_miss = 0; + ps2_mca_log("ps2_read_cache_raml: addr=%08x %i %04x:%04x\n", addr, ps2_cache_valid[addr >> 3], CS, cpu_state.pc); + if (!ps2_cache_valid[addr >> 3]) { + ps2_cache_valid[addr >> 3] = 1; + ps2.mem_regs[2] |= 0x80; + } else + ps2.pending_cache_miss = 0; - return *(uint32_t *)&ps2_cache[addr]; + return *(uint32_t *) &ps2_cache[addr]; } -static void ps2_write_cache_ram(uint32_t addr, uint8_t val, void *priv) +static void +ps2_write_cache_ram(uint32_t addr, uint8_t val, void *priv) { - ps2_mca_log("ps2_write_cache_ram: addr=%08x val=%02x %04x:%04x %i\n", addr, val, CS,cpu_state.pc); - ps2_cache[addr] = val; + ps2_mca_log("ps2_write_cache_ram: addr=%08x val=%02x %04x:%04x %i\n", addr, val, CS, cpu_state.pc); + ps2_cache[addr] = val; } -void ps2_cache_clean(void) +void +ps2_cache_clean(void) { - memset(ps2_cache_valid, 0, sizeof(ps2_cache_valid)); + memset(ps2_cache_valid, 0, sizeof(ps2_cache_valid)); } -static uint8_t ps2_read_split_ram(uint32_t addr, void *priv) +static uint8_t +ps2_read_split_ram(uint32_t addr, void *priv) { - addr = (addr % (ps2.split_size << 10)) + ps2.split_phys; - return mem_read_ram(addr, priv); + addr = (addr % (ps2.split_size << 10)) + ps2.split_phys; + return mem_read_ram(addr, priv); } -static uint16_t ps2_read_split_ramw(uint32_t addr, void *priv) +static uint16_t +ps2_read_split_ramw(uint32_t addr, void *priv) { - addr = (addr % (ps2.split_size << 10)) + ps2.split_phys; - return mem_read_ramw(addr, priv); + addr = (addr % (ps2.split_size << 10)) + ps2.split_phys; + return mem_read_ramw(addr, priv); } -static uint32_t ps2_read_split_raml(uint32_t addr, void *priv) +static uint32_t +ps2_read_split_raml(uint32_t addr, void *priv) { - addr = (addr % (ps2.split_size << 10)) + ps2.split_phys; - return mem_read_raml(addr, priv); + addr = (addr % (ps2.split_size << 10)) + ps2.split_phys; + return mem_read_raml(addr, priv); } -static void ps2_write_split_ram(uint32_t addr, uint8_t val, void *priv) +static void +ps2_write_split_ram(uint32_t addr, uint8_t val, void *priv) { - addr = (addr % (ps2.split_size << 10)) + ps2.split_phys; - mem_write_ram(addr, val, priv); + addr = (addr % (ps2.split_size << 10)) + ps2.split_phys; + mem_write_ram(addr, val, priv); } -static void ps2_write_split_ramw(uint32_t addr, uint16_t val, void *priv) +static void +ps2_write_split_ramw(uint32_t addr, uint16_t val, void *priv) { - addr = (addr % (ps2.split_size << 10)) + ps2.split_phys; - mem_write_ramw(addr, val, priv); + addr = (addr % (ps2.split_size << 10)) + ps2.split_phys; + mem_write_ramw(addr, val, priv); } -static void ps2_write_split_raml(uint32_t addr, uint32_t val, void *priv) +static void +ps2_write_split_raml(uint32_t addr, uint32_t val, void *priv) { - addr = (addr % (ps2.split_size << 10)) + ps2.split_phys; - mem_write_raml(addr, val, priv); + addr = (addr % (ps2.split_size << 10)) + ps2.split_phys; + mem_write_raml(addr, val, priv); } - -#define PS2_SETUP_IO 0x80 -#define PS2_SETUP_VGA 0x20 +#define PS2_SETUP_IO 0x80 +#define PS2_SETUP_VGA 0x20 #define PS2_ADAPTER_SETUP 0x08 -static uint8_t model_50_read(uint16_t port) +static uint8_t +model_50_read(uint16_t port) { - switch (port) - { - case 0x100: - return ps2.planar_id & 0xff; - case 0x101: - return ps2.planar_id >> 8; - case 0x102: - return ps2.option[0]; - case 0x103: - return ps2.option[1]; - case 0x104: - return ps2.option[2]; - case 0x105: - return ps2.option[3]; - case 0x106: - return ps2.subaddr_lo; - case 0x107: - return ps2.subaddr_hi; - } - return 0xff; + switch (port) { + case 0x100: + return ps2.planar_id & 0xff; + case 0x101: + return ps2.planar_id >> 8; + case 0x102: + return ps2.option[0]; + case 0x103: + return ps2.option[1]; + case 0x104: + return ps2.option[2]; + case 0x105: + return ps2.option[3]; + case 0x106: + return ps2.subaddr_lo; + case 0x107: + return ps2.subaddr_hi; + } + return 0xff; } -static uint8_t model_55sx_read(uint16_t port) +static uint8_t +model_55sx_read(uint16_t port) { - switch (port) - { - case 0x100: - return ps2.planar_id & 0xff; - case 0x101: - return ps2.planar_id >> 8; - case 0x102: - return ps2.option[0]; - case 0x103: - return ps2.option[1]; - case 0x104: - return ps2.memory_bank[ps2.option[3] & 7]; - case 0x105: - return ps2.option[3]; - case 0x106: - return ps2.subaddr_lo; - case 0x107: - return ps2.subaddr_hi; - } - return 0xff; + switch (port) { + case 0x100: + return ps2.planar_id & 0xff; + case 0x101: + return ps2.planar_id >> 8; + case 0x102: + return ps2.option[0]; + case 0x103: + return ps2.option[1]; + case 0x104: + return ps2.memory_bank[ps2.option[3] & 7]; + case 0x105: + return ps2.option[3]; + case 0x106: + return ps2.subaddr_lo; + case 0x107: + return ps2.subaddr_hi; + } + return 0xff; } -static uint8_t model_70_type3_read(uint16_t port) +static uint8_t +model_70_type3_read(uint16_t port) { - switch (port) - { - case 0x100: - return ps2.planar_id & 0xff; - case 0x101: - return ps2.planar_id >> 8; - case 0x102: - return ps2.option[0]; - case 0x103: - return ps2.option[1]; - case 0x104: - return ps2.option[2]; - case 0x105: - return ps2.option[3]; - case 0x106: - return ps2.subaddr_lo; - case 0x107: - return ps2.subaddr_hi; - } - return 0xff; + switch (port) { + case 0x100: + return ps2.planar_id & 0xff; + case 0x101: + return ps2.planar_id >> 8; + case 0x102: + return ps2.option[0]; + case 0x103: + return ps2.option[1]; + case 0x104: + return ps2.option[2]; + case 0x105: + return ps2.option[3]; + case 0x106: + return ps2.subaddr_lo; + case 0x107: + return ps2.subaddr_hi; + } + return 0xff; } -static uint8_t model_80_read(uint16_t port) +static uint8_t +model_80_read(uint16_t port) { - switch (port) - { - case 0x100: - return ps2.planar_id & 0xff; - case 0x101: - return ps2.planar_id >> 8; - case 0x102: - return ps2.option[0]; - case 0x103: - return ps2.option[1]; - case 0x104: - return ps2.option[2]; - case 0x105: - return ps2.option[3]; - case 0x106: - return ps2.subaddr_lo; - case 0x107: - return ps2.subaddr_hi; - } - return 0xff; + switch (port) { + case 0x100: + return ps2.planar_id & 0xff; + case 0x101: + return ps2.planar_id >> 8; + case 0x102: + return ps2.option[0]; + case 0x103: + return ps2.option[1]; + case 0x104: + return ps2.option[2]; + case 0x105: + return ps2.option[3]; + case 0x106: + return ps2.subaddr_lo; + case 0x107: + return ps2.subaddr_hi; + } + return 0xff; } -static void model_50_write(uint16_t port, uint8_t val) +static void +model_50_write(uint16_t port, uint8_t val) { - switch (port) - { - case 0x100: - ps2.io_id = val; - break; - case 0x101: - break; - case 0x102: - lpt1_remove(); - serial_remove(ps2.uart); - if (val & 0x04) - { - if (val & 0x08) - serial_setup(ps2.uart, COM1_ADDR, COM1_IRQ); - else - serial_setup(ps2.uart, COM2_ADDR, COM2_IRQ); + switch (port) { + case 0x100: + ps2.io_id = val; + break; + case 0x101: + break; + case 0x102: + lpt1_remove(); + serial_remove(ps2.uart); + if (val & 0x04) { + if (val & 0x08) + serial_setup(ps2.uart, COM1_ADDR, COM1_IRQ); + else + serial_setup(ps2.uart, COM2_ADDR, COM2_IRQ); + } + if (val & 0x10) { + switch ((val >> 5) & 3) { + case 0: + lpt1_init(LPT_MDA_ADDR); + break; + case 1: + lpt1_init(LPT1_ADDR); + break; + case 2: + lpt1_init(LPT2_ADDR); + break; } - if (val & 0x10) - { - switch ((val >> 5) & 3) - { - case 0: - lpt1_init(LPT_MDA_ADDR); - break; - case 1: - lpt1_init(LPT1_ADDR); - break; - case 2: - lpt1_init(LPT2_ADDR); - break; - } - } - ps2.option[0] = val; - break; - case 0x103: - ps2.option[1] = val; - break; - case 0x104: - ps2.option[2] = val; - break; - case 0x105: - ps2.option[3] = val; - break; - case 0x106: - ps2.subaddr_lo = val; - break; - case 0x107: - ps2.subaddr_hi = val; - break; - } + } + ps2.option[0] = val; + break; + case 0x103: + ps2.option[1] = val; + break; + case 0x104: + ps2.option[2] = val; + break; + case 0x105: + ps2.option[3] = val; + break; + case 0x106: + ps2.subaddr_lo = val; + break; + case 0x107: + ps2.subaddr_hi = val; + break; + } } - -static void model_55sx_mem_recalc(void) +static void +model_55sx_mem_recalc(void) { - int i, j, state; + int i, j, state; #ifdef ENABLE_PS2_MCA_LOG - int enabled_mem = 0; + int enabled_mem = 0; #endif - int base = 0, remap_size = (ps2.option[3] & 0x10) ? 384 : 256; - int bit_mask = 0x00, max_rows = 4; - int bank_to_rows[16] = { 4, 2, 1, 0, 0, 2, 1, 0, 0, 0, 0, 0, 0, 2, 1, 0 }; + int base = 0, remap_size = (ps2.option[3] & 0x10) ? 384 : 256; + int bit_mask = 0x00, max_rows = 4; + int bank_to_rows[16] = { 4, 2, 1, 0, 0, 2, 1, 0, 0, 0, 0, 0, 0, 2, 1, 0 }; - ps2_mca_log("%02X %02X\n", ps2.option[1], ps2.option[3]); + ps2_mca_log("%02X %02X\n", ps2.option[1], ps2.option[3]); - mem_remap_top(remap_size); - mem_set_mem_state(0x00000000, (mem_size + 384) * 1024, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); - mem_set_mem_state(0x000e0000, 0x00020000, MEM_READ_EXTANY | MEM_WRITE_DISABLED); + mem_remap_top(remap_size); + mem_set_mem_state(0x00000000, (mem_size + 384) * 1024, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); + mem_set_mem_state(0x000e0000, 0x00020000, MEM_READ_EXTANY | MEM_WRITE_DISABLED); - for (i = 0; i < 2; i++) - { - max_rows = bank_to_rows[(ps2.memory_bank[i] >> 4) & 0x0f]; + for (i = 0; i < 2; i++) { + max_rows = bank_to_rows[(ps2.memory_bank[i] >> 4) & 0x0f]; - if (max_rows == 0) - continue; + if (max_rows == 0) + continue; - for (j = 0; j < max_rows; j++) - { - if (ps2.memory_bank[i] & (1 << j)) { - ps2_mca_log("Set memory at %06X-%06X to internal\n", (base * 1024), (base * 1024) + (((base > 0) ? 1024 : 640) * 1024) - 1); - mem_set_mem_state(base * 1024, ((base > 0) ? 1024 : 640) * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + for (j = 0; j < max_rows; j++) { + if (ps2.memory_bank[i] & (1 << j)) { + ps2_mca_log("Set memory at %06X-%06X to internal\n", (base * 1024), (base * 1024) + (((base > 0) ? 1024 : 640) * 1024) - 1); + mem_set_mem_state(base * 1024, ((base > 0) ? 1024 : 640) * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); #ifdef ENABLE_PS2_MCA_LOG - enabled_mem += 1024; + enabled_mem += 1024; #endif - bit_mask |= (1 << (j + (i << 2))); - } - base += 1024; - } - } + bit_mask |= (1 << (j + (i << 2))); + } + base += 1024; + } + } #ifdef ENABLE_PS2_MCA_LOG - ps2_mca_log("Enabled memory: %i kB (%02X)\n", enabled_mem, bit_mask); + ps2_mca_log("Enabled memory: %i kB (%02X)\n", enabled_mem, bit_mask); #endif - if (ps2.option[3] & 0x10) - { - /* Enable ROM. */ - ps2_mca_log("Enable ROM\n"); - state = MEM_READ_EXTANY; - } - else - { - /* Disable ROM. */ - if ((ps2.option[1] & 1) && !(ps2.option[3] & 0x20) && (bit_mask & 0x01)) - { - /* Disable RAM between 640 kB and 1 MB. */ - ps2_mca_log("Disable ROM, enable RAM\n"); - state = MEM_READ_INTERNAL; - } - else - { - ps2_mca_log("Disable ROM, disable RAM\n"); - state = MEM_READ_DISABLED; - } - } - - /* Write always disabled. */ - state |= MEM_WRITE_DISABLED; - - mem_set_mem_state(0xe0000, 0x20000, state); - - /* if (!(ps2.option[3] & 0x08)) - { - ps2_mca_log("Memory not yet configured\n"); - return; - } */ - - ps2_mca_log("Enable shadow mapping at %06X-%06X\n", (mem_size * 1024), (mem_size * 1024) + (remap_size * 1024) - 1); - - if ((ps2.option[1] & 1) && !(ps2.option[3] & 0x20) && (bit_mask & 0x01)) { - ps2_mca_log("Set memory at %06X-%06X to internal\n", (mem_size * 1024), (mem_size * 1024) + (remap_size * 1024) - 1); - mem_set_mem_state(mem_size * 1024, remap_size * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } - - flushmmucache_nopc(); -} - - -static void model_55sx_write(uint16_t port, uint8_t val) -{ - switch (port) - { - case 0x100: - ps2.io_id = val; - break; - case 0x101: - break; - case 0x102: - lpt1_remove(); - serial_remove(ps2.uart); - if (val & 0x04) - { - if (val & 0x08) - serial_setup(ps2.uart, COM1_ADDR, COM1_IRQ); - else - serial_setup(ps2.uart, COM2_ADDR, COM2_IRQ); - } - if (val & 0x10) - { - switch ((val >> 5) & 3) - { - case 0: - lpt1_init(LPT_MDA_ADDR); - break; - case 1: - lpt1_init(LPT1_ADDR); - break; - case 2: - lpt1_init(LPT2_ADDR); - break; - } - } - ps2.option[0] = val; - break; - case 0x103: - ps2_mca_log("Write POS1: %02X\n", val); - ps2.option[1] = val; - model_55sx_mem_recalc(); - break; - case 0x104: - ps2.memory_bank[ps2.option[3] & 7] &= ~0xf; - ps2.memory_bank[ps2.option[3] & 7] |= (val & 0xf); - ps2_mca_log("Write memory bank %i: %02X\n", ps2.option[3] & 7, val); - model_55sx_mem_recalc(); - break; - case 0x105: - ps2_mca_log("Write POS3: %02X\n", val); - ps2.option[3] = val; - model_55sx_mem_recalc(); - break; - case 0x106: - ps2.subaddr_lo = val; - break; - case 0x107: - ps2.subaddr_hi = val; - break; + if (ps2.option[3] & 0x10) { + /* Enable ROM. */ + ps2_mca_log("Enable ROM\n"); + state = MEM_READ_EXTANY; + } else { + /* Disable ROM. */ + if ((ps2.option[1] & 1) && !(ps2.option[3] & 0x20) && (bit_mask & 0x01)) { + /* Disable RAM between 640 kB and 1 MB. */ + ps2_mca_log("Disable ROM, enable RAM\n"); + state = MEM_READ_INTERNAL; + } else { + ps2_mca_log("Disable ROM, disable RAM\n"); + state = MEM_READ_DISABLED; } + } + + /* Write always disabled. */ + state |= MEM_WRITE_DISABLED; + + mem_set_mem_state(0xe0000, 0x20000, state); + + /* if (!(ps2.option[3] & 0x08)) + { + ps2_mca_log("Memory not yet configured\n"); + return; + } */ + + ps2_mca_log("Enable shadow mapping at %06X-%06X\n", (mem_size * 1024), (mem_size * 1024) + (remap_size * 1024) - 1); + + if ((ps2.option[1] & 1) && !(ps2.option[3] & 0x20) && (bit_mask & 0x01)) { + ps2_mca_log("Set memory at %06X-%06X to internal\n", (mem_size * 1024), (mem_size * 1024) + (remap_size * 1024) - 1); + mem_set_mem_state(mem_size * 1024, remap_size * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } + + flushmmucache_nopc(); } -static void model_70_type3_write(uint16_t port, uint8_t val) +static void +model_55sx_write(uint16_t port, uint8_t val) { - switch (port) - { - case 0x100: - break; - case 0x101: - break; - case 0x102: - lpt1_remove(); - serial_remove(ps2.uart); - if (val & 0x04) - { - if (val & 0x08) - serial_setup(ps2.uart, COM1_ADDR, COM1_IRQ); - else - serial_setup(ps2.uart, COM2_ADDR, COM2_IRQ); + switch (port) { + case 0x100: + ps2.io_id = val; + break; + case 0x101: + break; + case 0x102: + lpt1_remove(); + serial_remove(ps2.uart); + if (val & 0x04) { + if (val & 0x08) + serial_setup(ps2.uart, COM1_ADDR, COM1_IRQ); + else + serial_setup(ps2.uart, COM2_ADDR, COM2_IRQ); + } + if (val & 0x10) { + switch ((val >> 5) & 3) { + case 0: + lpt1_init(LPT_MDA_ADDR); + break; + case 1: + lpt1_init(LPT1_ADDR); + break; + case 2: + lpt1_init(LPT2_ADDR); + break; } - if (val & 0x10) - { - switch ((val >> 5) & 3) - { - case 0: - lpt1_init(LPT_MDA_ADDR); - break; - case 1: - lpt1_init(LPT1_ADDR); - break; - case 2: - lpt1_init(LPT2_ADDR); - break; - } - } - ps2.option[0] = val; - break; - case 0x103: - if (ps2.planar_id == 0xfff9) - ps2.option[1] = (ps2.option[1] & 0x0f) | (val & 0xf0); - break; - case 0x104: - if (ps2.planar_id == 0xfff9) - ps2.option[2] = val; - break; - case 0x105: - ps2.option[3] = val; - break; - case 0x106: - ps2.subaddr_lo = val; - break; - case 0x107: - ps2.subaddr_hi = val; - break; - } + } + ps2.option[0] = val; + break; + case 0x103: + ps2_mca_log("Write POS1: %02X\n", val); + ps2.option[1] = val; + model_55sx_mem_recalc(); + break; + case 0x104: + ps2.memory_bank[ps2.option[3] & 7] &= ~0xf; + ps2.memory_bank[ps2.option[3] & 7] |= (val & 0xf); + ps2_mca_log("Write memory bank %i: %02X\n", ps2.option[3] & 7, val); + model_55sx_mem_recalc(); + break; + case 0x105: + ps2_mca_log("Write POS3: %02X\n", val); + ps2.option[3] = val; + model_55sx_mem_recalc(); + break; + case 0x106: + ps2.subaddr_lo = val; + break; + case 0x107: + ps2.subaddr_hi = val; + break; + } } - -static void model_80_write(uint16_t port, uint8_t val) +static void +model_70_type3_write(uint16_t port, uint8_t val) { - switch (port) - { - case 0x100: - break; - case 0x101: - break; - case 0x102: - lpt1_remove(); - serial_remove(ps2.uart); - if (val & 0x04) - { - if (val & 0x08) - serial_setup(ps2.uart, COM1_ADDR, COM1_IRQ); - else - serial_setup(ps2.uart, COM2_ADDR, COM2_IRQ); + switch (port) { + case 0x100: + break; + case 0x101: + break; + case 0x102: + lpt1_remove(); + serial_remove(ps2.uart); + if (val & 0x04) { + if (val & 0x08) + serial_setup(ps2.uart, COM1_ADDR, COM1_IRQ); + else + serial_setup(ps2.uart, COM2_ADDR, COM2_IRQ); + } + if (val & 0x10) { + switch ((val >> 5) & 3) { + case 0: + lpt1_init(LPT_MDA_ADDR); + break; + case 1: + lpt1_init(LPT1_ADDR); + break; + case 2: + lpt1_init(LPT2_ADDR); + break; } - if (val & 0x10) - { - switch ((val >> 5) & 3) - { - case 0: - lpt1_init(LPT_MDA_ADDR); - break; - case 1: - lpt1_init(LPT1_ADDR); - break; - case 2: - lpt1_init(LPT2_ADDR); - break; - } - } - ps2.option[0] = val; - break; - case 0x103: + } + ps2.option[0] = val; + break; + case 0x103: + if (ps2.planar_id == 0xfff9) ps2.option[1] = (ps2.option[1] & 0x0f) | (val & 0xf0); - break; - case 0x104: + break; + case 0x104: + if (ps2.planar_id == 0xfff9) ps2.option[2] = val; - break; - case 0x105: - ps2.option[3] = val; - break; - case 0x106: - ps2.subaddr_lo = val; - break; - case 0x107: - ps2.subaddr_hi = val; - break; - } + break; + case 0x105: + ps2.option[3] = val; + break; + case 0x106: + ps2.subaddr_lo = val; + break; + case 0x107: + ps2.subaddr_hi = val; + break; + } } -uint8_t ps2_mca_read(uint16_t port, void *p) +static void +model_80_write(uint16_t port, uint8_t val) { - uint8_t temp; + switch (port) { + case 0x100: + break; + case 0x101: + break; + case 0x102: + lpt1_remove(); + serial_remove(ps2.uart); + if (val & 0x04) { + if (val & 0x08) + serial_setup(ps2.uart, COM1_ADDR, COM1_IRQ); + else + serial_setup(ps2.uart, COM2_ADDR, COM2_IRQ); + } + if (val & 0x10) { + switch ((val >> 5) & 3) { + case 0: + lpt1_init(LPT_MDA_ADDR); + break; + case 1: + lpt1_init(LPT1_ADDR); + break; + case 2: + lpt1_init(LPT2_ADDR); + break; + } + } + ps2.option[0] = val; + break; + case 0x103: + ps2.option[1] = (ps2.option[1] & 0x0f) | (val & 0xf0); + break; + case 0x104: + ps2.option[2] = val; + break; + case 0x105: + ps2.option[3] = val; + break; + case 0x106: + ps2.subaddr_lo = val; + break; + case 0x107: + ps2.subaddr_hi = val; + break; + } +} - switch (port) - { - case 0x91: - // fatal("Read 91 setup=%02x adapter=%02x\n", ps2.setup, ps2.adapter_setup); - if (!(ps2.setup & PS2_SETUP_IO)) - temp = 0x00; - else if (!(ps2.setup & PS2_SETUP_VGA)) - temp = 0x00; - else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) - temp = 0x00; - else - temp = !mca_feedb(); - temp |= 0xfe; - break; - case 0x94: - temp = ps2.setup; - break; - case 0x96: - temp = ps2.adapter_setup | 0x70; - break; - case 0x100: - if (!(ps2.setup & PS2_SETUP_IO)) - temp = ps2.planar_read(port); - else if (!(ps2.setup & PS2_SETUP_VGA)) - temp = 0xfd; - else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) - temp = mca_read(port); - else - temp = 0xff; - break; - case 0x101: - if (!(ps2.setup & PS2_SETUP_IO)) - temp = ps2.planar_read(port); - else if (!(ps2.setup & PS2_SETUP_VGA)) - temp = 0xef; - else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) - temp = mca_read(port); - else - temp = 0xff; - break; - case 0x102: - if (!(ps2.setup & PS2_SETUP_IO)) - temp = ps2.planar_read(port); - else if (!(ps2.setup & PS2_SETUP_VGA)) - temp = ps2.pos_vga; - else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) - temp = mca_read(port); - else - temp = 0xff; - break; - case 0x103: - if (!(ps2.setup & PS2_SETUP_IO)) - temp = ps2.planar_read(port); - else if ((ps2.setup & PS2_SETUP_VGA) && (ps2.adapter_setup & PS2_ADAPTER_SETUP)) - temp = mca_read(port); - else - temp = 0xff; - break; - case 0x104: - if (!(ps2.setup & PS2_SETUP_IO)) - temp = ps2.planar_read(port); - else if ((ps2.setup & PS2_SETUP_VGA) && (ps2.adapter_setup & PS2_ADAPTER_SETUP)) - temp = mca_read(port); - else - temp = 0xff; - break; - case 0x105: - if (!(ps2.setup & PS2_SETUP_IO)) - temp = ps2.planar_read(port); - else if ((ps2.setup & PS2_SETUP_VGA) && (ps2.adapter_setup & PS2_ADAPTER_SETUP)) - temp = mca_read(port); - else - temp = 0xff; - break; - case 0x106: - if (!(ps2.setup & PS2_SETUP_IO)) - temp = ps2.planar_read(port); - else if ((ps2.setup & PS2_SETUP_VGA) && (ps2.adapter_setup & PS2_ADAPTER_SETUP)) - temp = mca_read(port); - else - temp = 0xff; - break; - case 0x107: - if (!(ps2.setup & PS2_SETUP_IO)) - temp = ps2.planar_read(port); - else if ((ps2.setup & PS2_SETUP_VGA) && (ps2.adapter_setup & PS2_ADAPTER_SETUP)) - temp = mca_read(port); - else - temp = 0xff; - break; +uint8_t +ps2_mca_read(uint16_t port, void *p) +{ + uint8_t temp; - default: + switch (port) { + case 0x91: + // fatal("Read 91 setup=%02x adapter=%02x\n", ps2.setup, ps2.adapter_setup); + if (!(ps2.setup & PS2_SETUP_IO)) + temp = 0x00; + else if (!(ps2.setup & PS2_SETUP_VGA)) + temp = 0x00; + else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) + temp = 0x00; + else + temp = !mca_feedb(); + temp |= 0xfe; + break; + case 0x94: + temp = ps2.setup; + break; + case 0x96: + temp = ps2.adapter_setup | 0x70; + break; + case 0x100: + if (!(ps2.setup & PS2_SETUP_IO)) + temp = ps2.planar_read(port); + else if (!(ps2.setup & PS2_SETUP_VGA)) + temp = 0xfd; + else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) + temp = mca_read(port); + else temp = 0xff; - break; - } + break; + case 0x101: + if (!(ps2.setup & PS2_SETUP_IO)) + temp = ps2.planar_read(port); + else if (!(ps2.setup & PS2_SETUP_VGA)) + temp = 0xef; + else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) + temp = mca_read(port); + else + temp = 0xff; + break; + case 0x102: + if (!(ps2.setup & PS2_SETUP_IO)) + temp = ps2.planar_read(port); + else if (!(ps2.setup & PS2_SETUP_VGA)) + temp = ps2.pos_vga; + else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) + temp = mca_read(port); + else + temp = 0xff; + break; + case 0x103: + if (!(ps2.setup & PS2_SETUP_IO)) + temp = ps2.planar_read(port); + else if ((ps2.setup & PS2_SETUP_VGA) && (ps2.adapter_setup & PS2_ADAPTER_SETUP)) + temp = mca_read(port); + else + temp = 0xff; + break; + case 0x104: + if (!(ps2.setup & PS2_SETUP_IO)) + temp = ps2.planar_read(port); + else if ((ps2.setup & PS2_SETUP_VGA) && (ps2.adapter_setup & PS2_ADAPTER_SETUP)) + temp = mca_read(port); + else + temp = 0xff; + break; + case 0x105: + if (!(ps2.setup & PS2_SETUP_IO)) + temp = ps2.planar_read(port); + else if ((ps2.setup & PS2_SETUP_VGA) && (ps2.adapter_setup & PS2_ADAPTER_SETUP)) + temp = mca_read(port); + else + temp = 0xff; + break; + case 0x106: + if (!(ps2.setup & PS2_SETUP_IO)) + temp = ps2.planar_read(port); + else if ((ps2.setup & PS2_SETUP_VGA) && (ps2.adapter_setup & PS2_ADAPTER_SETUP)) + temp = mca_read(port); + else + temp = 0xff; + break; + case 0x107: + if (!(ps2.setup & PS2_SETUP_IO)) + temp = ps2.planar_read(port); + else if ((ps2.setup & PS2_SETUP_VGA) && (ps2.adapter_setup & PS2_ADAPTER_SETUP)) + temp = mca_read(port); + else + temp = 0xff; + break; - ps2_mca_log("ps2_read: port=%04x temp=%02x\n", port, temp); + default: + temp = 0xff; + break; + } - return temp; + ps2_mca_log("ps2_read: port=%04x temp=%02x\n", port, temp); + + return temp; } -static void ps2_mca_write(uint16_t port, uint8_t val, void *p) +static void +ps2_mca_write(uint16_t port, uint8_t val, void *p) { - ps2_mca_log("ps2_write: port=%04x val=%02x %04x:%04x\n", port, val, CS,cpu_state.pc); + ps2_mca_log("ps2_write: port=%04x val=%02x %04x:%04x\n", port, val, CS, cpu_state.pc); - switch (port) - { - case 0x94: - ps2.setup = val; - break; - case 0x96: - if ((val & 0x80) && !(ps2.adapter_setup & 0x80)) - mca_reset(); - ps2.adapter_setup = val; - mca_set_index(val & 7); - break; - case 0x100: - if (!(ps2.setup & PS2_SETUP_IO)) - ps2.planar_write(port, val); - else if ((ps2.setup & PS2_SETUP_VGA) && (ps2.adapter_setup & PS2_ADAPTER_SETUP)) - mca_write(port, val); - break; - case 0x101: - if (!(ps2.setup & PS2_SETUP_IO)) - ps2.planar_write(port, val); - else if ((ps2.setup & PS2_SETUP_VGA) && (ps2.setup & PS2_SETUP_VGA) && (ps2.adapter_setup & PS2_ADAPTER_SETUP)) - mca_write(port, val); - break; - case 0x102: - if (!(ps2.setup & PS2_SETUP_IO)) - ps2.planar_write(port, val); - else if (!(ps2.setup & PS2_SETUP_VGA)) - ps2.pos_vga = val; - else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) - mca_write(port, val); - break; - case 0x103: - if (!(ps2.setup & PS2_SETUP_IO)) - ps2.planar_write(port, val); - else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) - mca_write(port, val); - break; - case 0x104: - if (!(ps2.setup & PS2_SETUP_IO)) - ps2.planar_write(port, val); - else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) - mca_write(port, val); - break; - case 0x105: - if (!(ps2.setup & PS2_SETUP_IO)) - ps2.planar_write(port, val); - else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) - mca_write(port, val); - break; - case 0x106: - if (!(ps2.setup & PS2_SETUP_IO)) - ps2.planar_write(port, val); - else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) - mca_write(port, val); - break; - case 0x107: - if (!(ps2.setup & PS2_SETUP_IO)) - ps2.planar_write(port, val); - else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) - mca_write(port, val); - break; - } + switch (port) { + case 0x94: + ps2.setup = val; + break; + case 0x96: + if ((val & 0x80) && !(ps2.adapter_setup & 0x80)) + mca_reset(); + ps2.adapter_setup = val; + mca_set_index(val & 7); + break; + case 0x100: + if (!(ps2.setup & PS2_SETUP_IO)) + ps2.planar_write(port, val); + else if ((ps2.setup & PS2_SETUP_VGA) && (ps2.adapter_setup & PS2_ADAPTER_SETUP)) + mca_write(port, val); + break; + case 0x101: + if (!(ps2.setup & PS2_SETUP_IO)) + ps2.planar_write(port, val); + else if ((ps2.setup & PS2_SETUP_VGA) && (ps2.setup & PS2_SETUP_VGA) && (ps2.adapter_setup & PS2_ADAPTER_SETUP)) + mca_write(port, val); + break; + case 0x102: + if (!(ps2.setup & PS2_SETUP_IO)) + ps2.planar_write(port, val); + else if (!(ps2.setup & PS2_SETUP_VGA)) + ps2.pos_vga = val; + else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) + mca_write(port, val); + break; + case 0x103: + if (!(ps2.setup & PS2_SETUP_IO)) + ps2.planar_write(port, val); + else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) + mca_write(port, val); + break; + case 0x104: + if (!(ps2.setup & PS2_SETUP_IO)) + ps2.planar_write(port, val); + else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) + mca_write(port, val); + break; + case 0x105: + if (!(ps2.setup & PS2_SETUP_IO)) + ps2.planar_write(port, val); + else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) + mca_write(port, val); + break; + case 0x106: + if (!(ps2.setup & PS2_SETUP_IO)) + ps2.planar_write(port, val); + else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) + mca_write(port, val); + break; + case 0x107: + if (!(ps2.setup & PS2_SETUP_IO)) + ps2.planar_write(port, val); + else if (ps2.adapter_setup & PS2_ADAPTER_SETUP) + mca_write(port, val); + break; + } } -static void ps2_mca_board_common_init() +static void +ps2_mca_board_common_init() { io_sethandler(0x0091, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); io_sethandler(0x0094, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); io_sethandler(0x0096, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); io_sethandler(0x0100, 0x0008, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); - device_add(&port_6x_ps2_device); + device_add(&port_6x_ps2_device); device_add(&port_92_device); ps2.setup = 0xff; @@ -842,385 +821,384 @@ static void ps2_mca_board_common_init() lpt1_init(LPT_MDA_ADDR); } -static uint8_t ps2_mem_expansion_read(int port, void *p) +static uint8_t +ps2_mem_expansion_read(int port, void *p) { - return ps2.mem_pos_regs[port & 7]; + return ps2.mem_pos_regs[port & 7]; } -static void ps2_mem_expansion_write(int port, uint8_t val, void *p) +static void +ps2_mem_expansion_write(int port, uint8_t val, void *p) { - if (port < 0x102 || port == 0x104) - return; + if (port < 0x102 || port == 0x104) + return; - ps2.mem_pos_regs[port & 7] = val; + ps2.mem_pos_regs[port & 7] = val; - if (ps2.mem_pos_regs[2] & 1) - mem_mapping_enable(&ps2.expansion_mapping); - else - mem_mapping_disable(&ps2.expansion_mapping); + if (ps2.mem_pos_regs[2] & 1) + mem_mapping_enable(&ps2.expansion_mapping); + else + mem_mapping_disable(&ps2.expansion_mapping); } -static uint8_t ps2_mem_expansion_feedb(void *p) +static uint8_t +ps2_mem_expansion_feedb(void *p) { - return (ps2.mem_pos_regs[2] & 1); + return (ps2.mem_pos_regs[2] & 1); } -static void ps2_mca_mem_fffc_init(int start_mb) +static void +ps2_mca_mem_fffc_init(int start_mb) { - uint32_t planar_size, expansion_start; + uint32_t planar_size, expansion_start; - planar_size = (start_mb - 1) << 20; - expansion_start = start_mb << 20; + planar_size = (start_mb - 1) << 20; + expansion_start = start_mb << 20; - mem_mapping_set_addr(&ram_high_mapping, 0x100000, planar_size); + mem_mapping_set_addr(&ram_high_mapping, 0x100000, planar_size); - ps2.mem_pos_regs[0] = 0xff; - ps2.mem_pos_regs[1] = 0xfc; + ps2.mem_pos_regs[0] = 0xff; + ps2.mem_pos_regs[1] = 0xfc; - switch ((mem_size / 1024) - start_mb) - { - case 1: - ps2.mem_pos_regs[4] = 0xfc; /* 11 11 11 00 = 0 0 0 1 */ - break; - case 2: - ps2.mem_pos_regs[4] = 0xfe; /* 11 11 11 10 = 0 0 0 2 */ - break; - case 3: - ps2.mem_pos_regs[4] = 0xf2; /* 11 11 00 10 = 0 0 1 2 */ - break; - case 4: - ps2.mem_pos_regs[4] = 0xfa; /* 11 11 10 10 = 0 0 2 2 */ - break; - case 5: - ps2.mem_pos_regs[4] = 0xca; /* 11 00 10 10 = 0 1 2 2 */ - break; - case 6: - ps2.mem_pos_regs[4] = 0xea; /* 11 10 10 10 = 0 2 2 2 */ - break; - case 7: - ps2.mem_pos_regs[4] = 0x2a; /* 00 10 10 10 = 1 2 2 2 */ - break; - case 8: - ps2.mem_pos_regs[4] = 0xaa; /* 10 10 10 10 = 2 2 2 2 */ - break; - } + switch ((mem_size / 1024) - start_mb) { + case 1: + ps2.mem_pos_regs[4] = 0xfc; /* 11 11 11 00 = 0 0 0 1 */ + break; + case 2: + ps2.mem_pos_regs[4] = 0xfe; /* 11 11 11 10 = 0 0 0 2 */ + break; + case 3: + ps2.mem_pos_regs[4] = 0xf2; /* 11 11 00 10 = 0 0 1 2 */ + break; + case 4: + ps2.mem_pos_regs[4] = 0xfa; /* 11 11 10 10 = 0 0 2 2 */ + break; + case 5: + ps2.mem_pos_regs[4] = 0xca; /* 11 00 10 10 = 0 1 2 2 */ + break; + case 6: + ps2.mem_pos_regs[4] = 0xea; /* 11 10 10 10 = 0 2 2 2 */ + break; + case 7: + ps2.mem_pos_regs[4] = 0x2a; /* 00 10 10 10 = 1 2 2 2 */ + break; + case 8: + ps2.mem_pos_regs[4] = 0xaa; /* 10 10 10 10 = 2 2 2 2 */ + break; + } - mca_add(ps2_mem_expansion_read, ps2_mem_expansion_write, ps2_mem_expansion_feedb, NULL, NULL); - mem_mapping_add(&ps2.expansion_mapping, - expansion_start, - (mem_size - (start_mb << 10)) << 10, - mem_read_ram, - mem_read_ramw, - mem_read_raml, - mem_write_ram, - mem_write_ramw, - mem_write_raml, - &ram[expansion_start], - MEM_MAPPING_INTERNAL, - NULL); - mem_mapping_disable(&ps2.expansion_mapping); + mca_add(ps2_mem_expansion_read, ps2_mem_expansion_write, ps2_mem_expansion_feedb, NULL, NULL); + mem_mapping_add(&ps2.expansion_mapping, + expansion_start, + (mem_size - (start_mb << 10)) << 10, + mem_read_ram, + mem_read_ramw, + mem_read_raml, + mem_write_ram, + mem_write_ramw, + mem_write_raml, + &ram[expansion_start], + MEM_MAPPING_INTERNAL, + NULL); + mem_mapping_disable(&ps2.expansion_mapping); } -static void ps2_mca_mem_d071_init(int start_mb) +static void +ps2_mca_mem_d071_init(int start_mb) { - uint32_t planar_size, expansion_start; + uint32_t planar_size, expansion_start; - planar_size = (start_mb - 1) << 20; - expansion_start = start_mb << 20; + planar_size = (start_mb - 1) << 20; + expansion_start = start_mb << 20; - mem_mapping_set_addr(&ram_high_mapping, 0x100000, planar_size); + mem_mapping_set_addr(&ram_high_mapping, 0x100000, planar_size); - ps2.mem_pos_regs[0] = 0xd0; - ps2.mem_pos_regs[1] = 0x71; - ps2.mem_pos_regs[4] = (mem_size / 1024) - start_mb; + ps2.mem_pos_regs[0] = 0xd0; + ps2.mem_pos_regs[1] = 0x71; + ps2.mem_pos_regs[4] = (mem_size / 1024) - start_mb; - mca_add(ps2_mem_expansion_read, ps2_mem_expansion_write, ps2_mem_expansion_feedb, NULL, NULL); - mem_mapping_add(&ps2.expansion_mapping, - expansion_start, - (mem_size - (start_mb << 10)) << 10, - mem_read_ram, - mem_read_ramw, - mem_read_raml, - mem_write_ram, - mem_write_ramw, - mem_write_raml, - &ram[expansion_start], - MEM_MAPPING_INTERNAL, - NULL); - mem_mapping_disable(&ps2.expansion_mapping); + mca_add(ps2_mem_expansion_read, ps2_mem_expansion_write, ps2_mem_expansion_feedb, NULL, NULL); + mem_mapping_add(&ps2.expansion_mapping, + expansion_start, + (mem_size - (start_mb << 10)) << 10, + mem_read_ram, + mem_read_ramw, + mem_read_raml, + mem_write_ram, + mem_write_ramw, + mem_write_raml, + &ram[expansion_start], + MEM_MAPPING_INTERNAL, + NULL); + mem_mapping_disable(&ps2.expansion_mapping); } - -static void ps2_mca_board_model_50_init(int slots) +static void +ps2_mca_board_model_50_init(int slots) { - ps2_mca_board_common_init(); + ps2_mca_board_common_init(); - mem_remap_top(384); - mca_init(slots); - device_add(&keyboard_ps2_mca_2_device); + mem_remap_top(384); + mca_init(slots); + device_add(&keyboard_ps2_mca_2_device); - ps2.planar_read = model_50_read; - ps2.planar_write = model_50_write; + ps2.planar_read = model_50_read; + ps2.planar_write = model_50_write; - if (mem_size > 2048) - { - /* Only 2 MB supported on planar, create a memory expansion card for the rest */ - ps2_mca_mem_fffc_init(2); - } + if (mem_size > 2048) { + /* Only 2 MB supported on planar, create a memory expansion card for the rest */ + ps2_mca_mem_fffc_init(2); + } - if (gfxcard == VID_INTERNAL) - device_add(&ps1vga_mca_device); + if (gfxcard == VID_INTERNAL) + device_add(&ps1vga_mca_device); } -static void ps2_mca_board_model_55sx_init(int has_sec_nvram, int slots) +static void +ps2_mca_board_model_55sx_init(int has_sec_nvram, int slots) { - ps2_mca_board_common_init(); + ps2_mca_board_common_init(); - ps2.option[1] = 0x00; - ps2.option[2] = 0x00; - ps2.option[3] = 0x10; + ps2.option[1] = 0x00; + ps2.option[2] = 0x00; + ps2.option[3] = 0x10; - memset(ps2.memory_bank, 0xf0, 8); - switch (mem_size/1024) - { - case 1: - ps2.memory_bank[0] = 0x61; - break; - case 2: - ps2.memory_bank[0] = 0x51; - break; - case 3: - ps2.memory_bank[0] = 0x51; - ps2.memory_bank[1] = 0x61; - break; - case 4: - ps2.memory_bank[0] = 0x51; - ps2.memory_bank[1] = 0x51; - break; - case 5: - ps2.memory_bank[0] = 0x01; - ps2.memory_bank[1] = 0x61; - break; - case 6: - ps2.memory_bank[0] = 0x01; - ps2.memory_bank[1] = 0x51; - break; - case 7: /*Not supported*/ - ps2.memory_bank[0] = 0x01; - ps2.memory_bank[1] = 0x51; - break; - case 8: - ps2.memory_bank[0] = 0x01; - ps2.memory_bank[1] = 0x01; - break; - } + memset(ps2.memory_bank, 0xf0, 8); + switch (mem_size / 1024) { + case 1: + ps2.memory_bank[0] = 0x61; + break; + case 2: + ps2.memory_bank[0] = 0x51; + break; + case 3: + ps2.memory_bank[0] = 0x51; + ps2.memory_bank[1] = 0x61; + break; + case 4: + ps2.memory_bank[0] = 0x51; + ps2.memory_bank[1] = 0x51; + break; + case 5: + ps2.memory_bank[0] = 0x01; + ps2.memory_bank[1] = 0x61; + break; + case 6: + ps2.memory_bank[0] = 0x01; + ps2.memory_bank[1] = 0x51; + break; + case 7: /*Not supported*/ + ps2.memory_bank[0] = 0x01; + ps2.memory_bank[1] = 0x51; + break; + case 8: + ps2.memory_bank[0] = 0x01; + ps2.memory_bank[1] = 0x01; + break; + } - mca_init(slots); - device_add(&keyboard_ps2_mca_device); - - if (has_sec_nvram == 1) - device_add(&ps2_nvr_55ls_device); - else if (has_sec_nvram == 2) - device_add(&ps2_nvr_device); - - ps2.planar_read = model_55sx_read; - ps2.planar_write = model_55sx_write; - - if (gfxcard == VID_INTERNAL) - device_add(&ps1vga_mca_device); - - model_55sx_mem_recalc(); -} - -static void mem_encoding_update(void) -{ - mem_mapping_disable(&ps2.split_mapping); - - if (ps2.split_size > 0) - mem_set_mem_state(ps2.split_addr, ps2.split_size << 10, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - if (((mem_size << 10) - (1 << 20)) > 0) - mem_set_mem_state(1 << 20, (mem_size << 10) - (1 << 20), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - - ps2.split_addr = ((uint32_t) (ps2.mem_regs[0] & 0xf)) << 20; - if (!ps2.split_addr) - ps2.split_addr = 1 << 20; - - if (ps2.mem_regs[1] & 2) { - mem_set_mem_state(0xe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); - ps2_mca_log("PS/2 Model 80-111: ROM space enabled\n"); - } else { - mem_set_mem_state(0xe0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); - ps2_mca_log("PS/2 Model 80-111: ROM space disabled\n"); - } - - if (ps2.mem_regs[1] & 4) { - mem_mapping_set_addr(&ram_low_mapping, 0x00000, 0x80000); - ps2_mca_log("PS/2 Model 80-111: 00080000- 0009FFFF disabled\n"); - } else { - mem_mapping_set_addr(&ram_low_mapping, 0x00000, 0xa0000); - ps2_mca_log("PS/2 Model 80-111: 00080000- 0009FFFF enabled\n"); - } - - if (!(ps2.mem_regs[1] & 8)) - { - if (ps2.mem_regs[1] & 4) { - ps2.split_size = 384; - ps2.split_phys = 0x80000; - } else { - ps2.split_size = 256; - ps2.split_phys = 0xa0000; - } - - mem_set_mem_state(ps2.split_addr, ps2.split_size << 10, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - mem_mapping_set_exec(&ps2.split_mapping, &ram[ps2.split_phys]); - mem_mapping_set_addr(&ps2.split_mapping, ps2.split_addr, ps2.split_size << 10); - - ps2_mca_log("PS/2 Model 80-111: Split memory block enabled at %08X\n", ps2.split_addr); - } else { - ps2.split_size = 0; - ps2_mca_log("PS/2 Model 80-111: Split memory block disabled\n"); - } - - flushmmucache_nopc(); -} - -static uint8_t mem_encoding_read(uint16_t addr, void *p) -{ - switch (addr) - { - case 0xe0: - return ps2.mem_regs[0]; - case 0xe1: - return ps2.mem_regs[1]; - } - return 0xff; -} -static void mem_encoding_write(uint16_t addr, uint8_t val, void *p) -{ - switch (addr) - { - case 0xe0: - ps2.mem_regs[0] = val; - break; - case 0xe1: - ps2.mem_regs[1] = val; - break; - } - mem_encoding_update(); -} - -static uint8_t mem_encoding_read_cached(uint16_t addr, void *p) -{ - switch (addr) - { - case 0xe0: - return ps2.mem_regs[0]; - case 0xe1: - return ps2.mem_regs[1]; - case 0xe2: - return ps2.mem_regs[2]; - } - return 0xff; -} - -static void mem_encoding_write_cached(uint16_t addr, uint8_t val, void *p) -{ - uint8_t old; - - switch (addr) - { - case 0xe0: - ps2.mem_regs[0] = val; - break; - case 0xe1: - ps2.mem_regs[1] = val; - break; - case 0xe2: - old = ps2.mem_regs[2]; - ps2.mem_regs[2] = (ps2.mem_regs[2] & 0x80) | (val & ~0x88); - if (val & 2) - { - ps2_mca_log("Clear latch - %i\n", ps2.pending_cache_miss); - if (ps2.pending_cache_miss) - ps2.mem_regs[2] |= 0x80; - else - ps2.mem_regs[2] &= ~0x80; - ps2.pending_cache_miss = 0; - } - - if ((val & 0x21) == 0x20 && (old & 0x21) != 0x20) - ps2.pending_cache_miss = 1; - if ((val & 0x21) == 0x01 && (old & 0x21) != 0x01) - ps2_cache_clean(); -#if 1 - // FIXME: Look into this!!! - if (val & 0x01) - ram_mid_mapping.flags |= MEM_MAPPING_ROM_WS; - else - ram_mid_mapping.flags &= ~MEM_MAPPING_ROM_WS; -#endif - break; - } - ps2_mca_log("mem_encoding_write: addr=%02x val=%02x %04x:%04x %02x %02x\n", addr, val, CS,cpu_state.pc, ps2.mem_regs[1],ps2.mem_regs[2]); - mem_encoding_update(); - if ((ps2.mem_regs[1] & 0x10) && (ps2.mem_regs[2] & 0x21) == 0x20) - { - mem_mapping_disable(&ram_low_mapping); - mem_mapping_enable(&ps2.cache_mapping); - flushmmucache(); - } - else - { - mem_mapping_disable(&ps2.cache_mapping); - mem_mapping_enable(&ram_low_mapping); - flushmmucache(); - } -} - -static void ps2_mca_board_model_70_type34_init(int is_type4, int slots) -{ - ps2_mca_board_common_init(); - - ps2.split_addr = mem_size * 1024; - mca_init(slots); - device_add(&keyboard_ps2_mca_device); - - ps2.planar_read = model_70_type3_read; - ps2.planar_write = model_70_type3_write; + mca_init(slots); + device_add(&keyboard_ps2_mca_device); + if (has_sec_nvram == 1) + device_add(&ps2_nvr_55ls_device); + else if (has_sec_nvram == 2) device_add(&ps2_nvr_device); - io_sethandler(0x00e0, 0x0003, mem_encoding_read_cached, NULL, NULL, mem_encoding_write_cached, NULL, NULL, NULL); + ps2.planar_read = model_55sx_read; + ps2.planar_write = model_55sx_write; - ps2.mem_regs[1] = 2; + if (gfxcard == VID_INTERNAL) + device_add(&ps1vga_mca_device); - switch (mem_size/1024) - { - case 2: - ps2.option[1] = 0xa6; - ps2.option[2] = 0x01; - break; - case 4: - ps2.option[1] = 0xaa; - ps2.option[2] = 0x01; - break; - case 6: - ps2.option[1] = 0xca; - ps2.option[2] = 0x01; - break; - case 8: - default: - ps2.option[1] = 0xca; - ps2.option[2] = 0x02; - break; + model_55sx_mem_recalc(); +} + +static void +mem_encoding_update(void) +{ + mem_mapping_disable(&ps2.split_mapping); + + if (ps2.split_size > 0) + mem_set_mem_state(ps2.split_addr, ps2.split_size << 10, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + if (((mem_size << 10) - (1 << 20)) > 0) + mem_set_mem_state(1 << 20, (mem_size << 10) - (1 << 20), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + + ps2.split_addr = ((uint32_t) (ps2.mem_regs[0] & 0xf)) << 20; + if (!ps2.split_addr) + ps2.split_addr = 1 << 20; + + if (ps2.mem_regs[1] & 2) { + mem_set_mem_state(0xe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + ps2_mca_log("PS/2 Model 80-111: ROM space enabled\n"); + } else { + mem_set_mem_state(0xe0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); + ps2_mca_log("PS/2 Model 80-111: ROM space disabled\n"); + } + + if (ps2.mem_regs[1] & 4) { + mem_mapping_set_addr(&ram_low_mapping, 0x00000, 0x80000); + ps2_mca_log("PS/2 Model 80-111: 00080000- 0009FFFF disabled\n"); + } else { + mem_mapping_set_addr(&ram_low_mapping, 0x00000, 0xa0000); + ps2_mca_log("PS/2 Model 80-111: 00080000- 0009FFFF enabled\n"); + } + + if (!(ps2.mem_regs[1] & 8)) { + if (ps2.mem_regs[1] & 4) { + ps2.split_size = 384; + ps2.split_phys = 0x80000; + } else { + ps2.split_size = 256; + ps2.split_phys = 0xa0000; } - if (is_type4) - ps2.option[2] |= 0x04; /*486 CPU*/ + mem_set_mem_state(ps2.split_addr, ps2.split_size << 10, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + mem_mapping_set_exec(&ps2.split_mapping, &ram[ps2.split_phys]); + mem_mapping_set_addr(&ps2.split_mapping, ps2.split_addr, ps2.split_size << 10); - mem_mapping_add(&ps2.split_mapping, - (mem_size+256) * 1024, - 256*1024, + ps2_mca_log("PS/2 Model 80-111: Split memory block enabled at %08X\n", ps2.split_addr); + } else { + ps2.split_size = 0; + ps2_mca_log("PS/2 Model 80-111: Split memory block disabled\n"); + } + + flushmmucache_nopc(); +} + +static uint8_t +mem_encoding_read(uint16_t addr, void *p) +{ + switch (addr) { + case 0xe0: + return ps2.mem_regs[0]; + case 0xe1: + return ps2.mem_regs[1]; + } + return 0xff; +} +static void +mem_encoding_write(uint16_t addr, uint8_t val, void *p) +{ + switch (addr) { + case 0xe0: + ps2.mem_regs[0] = val; + break; + case 0xe1: + ps2.mem_regs[1] = val; + break; + } + mem_encoding_update(); +} + +static uint8_t +mem_encoding_read_cached(uint16_t addr, void *p) +{ + switch (addr) { + case 0xe0: + return ps2.mem_regs[0]; + case 0xe1: + return ps2.mem_regs[1]; + case 0xe2: + return ps2.mem_regs[2]; + } + return 0xff; +} + +static void +mem_encoding_write_cached(uint16_t addr, uint8_t val, void *p) +{ + uint8_t old; + + switch (addr) { + case 0xe0: + ps2.mem_regs[0] = val; + break; + case 0xe1: + ps2.mem_regs[1] = val; + break; + case 0xe2: + old = ps2.mem_regs[2]; + ps2.mem_regs[2] = (ps2.mem_regs[2] & 0x80) | (val & ~0x88); + if (val & 2) { + ps2_mca_log("Clear latch - %i\n", ps2.pending_cache_miss); + if (ps2.pending_cache_miss) + ps2.mem_regs[2] |= 0x80; + else + ps2.mem_regs[2] &= ~0x80; + ps2.pending_cache_miss = 0; + } + + if ((val & 0x21) == 0x20 && (old & 0x21) != 0x20) + ps2.pending_cache_miss = 1; + if ((val & 0x21) == 0x01 && (old & 0x21) != 0x01) + ps2_cache_clean(); +#if 1 + // FIXME: Look into this!!! + if (val & 0x01) + ram_mid_mapping.flags |= MEM_MAPPING_ROM_WS; + else + ram_mid_mapping.flags &= ~MEM_MAPPING_ROM_WS; +#endif + break; + } + ps2_mca_log("mem_encoding_write: addr=%02x val=%02x %04x:%04x %02x %02x\n", addr, val, CS, cpu_state.pc, ps2.mem_regs[1], ps2.mem_regs[2]); + mem_encoding_update(); + if ((ps2.mem_regs[1] & 0x10) && (ps2.mem_regs[2] & 0x21) == 0x20) { + mem_mapping_disable(&ram_low_mapping); + mem_mapping_enable(&ps2.cache_mapping); + flushmmucache(); + } else { + mem_mapping_disable(&ps2.cache_mapping); + mem_mapping_enable(&ram_low_mapping); + flushmmucache(); + } +} + +static void +ps2_mca_board_model_70_type34_init(int is_type4, int slots) +{ + ps2_mca_board_common_init(); + + ps2.split_addr = mem_size * 1024; + mca_init(slots); + device_add(&keyboard_ps2_mca_device); + + ps2.planar_read = model_70_type3_read; + ps2.planar_write = model_70_type3_write; + + device_add(&ps2_nvr_device); + + io_sethandler(0x00e0, 0x0003, mem_encoding_read_cached, NULL, NULL, mem_encoding_write_cached, NULL, NULL, NULL); + + ps2.mem_regs[1] = 2; + + switch (mem_size / 1024) { + case 2: + ps2.option[1] = 0xa6; + ps2.option[2] = 0x01; + break; + case 4: + ps2.option[1] = 0xaa; + ps2.option[2] = 0x01; + break; + case 6: + ps2.option[1] = 0xca; + ps2.option[2] = 0x01; + break; + case 8: + default: + ps2.option[1] = 0xca; + ps2.option[2] = 0x02; + break; + } + + if (is_type4) + ps2.option[2] |= 0x04; /*486 CPU*/ + + mem_mapping_add(&ps2.split_mapping, + (mem_size + 256) * 1024, + 256 * 1024, ps2_read_split_ram, ps2_read_split_ramw, ps2_read_split_raml, @@ -1230,9 +1208,9 @@ static void ps2_mca_board_model_70_type34_init(int is_type4, int slots) &ram[0xa0000], MEM_MAPPING_INTERNAL, NULL); - mem_mapping_disable(&ps2.split_mapping); + mem_mapping_disable(&ps2.split_mapping); - mem_mapping_add(&ps2.cache_mapping, + mem_mapping_add(&ps2.cache_mapping, 0, (is_type4) ? (8 * 1024) : (64 * 1024), ps2_read_cache_ram, @@ -1244,84 +1222,82 @@ static void ps2_mca_board_model_70_type34_init(int is_type4, int slots) ps2_cache, MEM_MAPPING_INTERNAL, NULL); - mem_mapping_disable(&ps2.cache_mapping); + mem_mapping_disable(&ps2.cache_mapping); - if (ps2.planar_id == 0xfff9) { - if (mem_size > 4096) - { - /* Only 4 MB supported on planar, create a memory expansion card for the rest */ - if (mem_size > 12288) { - ps2_mca_mem_d071_init(4); - } else { - ps2_mca_mem_fffc_init(4); - } - } - } else { - if (mem_size > 8192) - { - /* Only 8 MB supported on planar, create a memory expansion card for the rest */ - if (mem_size > 16384) - ps2_mca_mem_d071_init(8); - else { - ps2_mca_mem_fffc_init(8); - } - } - } + if (ps2.planar_id == 0xfff9) { + if (mem_size > 4096) { + /* Only 4 MB supported on planar, create a memory expansion card for the rest */ + if (mem_size > 12288) { + ps2_mca_mem_d071_init(4); + } else { + ps2_mca_mem_fffc_init(4); + } + } + } else { + if (mem_size > 8192) { + /* Only 8 MB supported on planar, create a memory expansion card for the rest */ + if (mem_size > 16384) + ps2_mca_mem_d071_init(8); + else { + ps2_mca_mem_fffc_init(8); + } + } + } - if (gfxcard == VID_INTERNAL) - device_add(&ps1vga_mca_device); + if (gfxcard == VID_INTERNAL) + device_add(&ps1vga_mca_device); } -static void ps2_mca_board_model_80_type2_init(int is486) +static void +ps2_mca_board_model_80_type2_init(int is486) { - ps2_mca_board_common_init(); + ps2_mca_board_common_init(); - ps2.split_addr = mem_size * 1024; - mca_init(8); - device_add(&keyboard_ps2_mca_device); + ps2.split_addr = mem_size * 1024; + mca_init(8); + device_add(&keyboard_ps2_mca_device); - ps2.planar_read = model_80_read; - ps2.planar_write = model_80_write; + ps2.planar_read = model_80_read; + ps2.planar_write = model_80_write; - device_add(&ps2_nvr_device); + device_add(&ps2_nvr_device); - io_sethandler(0x00e0, 0x0002, mem_encoding_read, NULL, NULL, mem_encoding_write, NULL, NULL, NULL); + io_sethandler(0x00e0, 0x0002, mem_encoding_read, NULL, NULL, mem_encoding_write, NULL, NULL, NULL); - ps2.mem_regs[1] = 2; + ps2.mem_regs[1] = 2; - /* Note by Kotori: I rewrote this because the original code was using - Model 80 Type 1-style 1 MB memory card settings, which are *NOT* - supported by Model 80 Type 2. */ - switch (mem_size/1024) - { - case 1: - ps2.option[1] = 0x0e; /* 11 10 = 0 2 */ - ps2.mem_regs[1] = 0xd2; /* 01 = 1 (first) */ - ps2.mem_regs[0] = 0xf0; /* 11 = invalid */ - break; - case 2: - ps2.option[1] = 0x0e; /* 11 10 = 0 2 */ - ps2.mem_regs[1] = 0xc2; /* 00 = 2 */ - ps2.mem_regs[0] = 0xf0; /* 11 = invalid */ - break; - case 3: - ps2.option[1] = 0x0a; /* 10 10 = 2 2 */ - ps2.mem_regs[1] = 0xc2; /* 00 = 2 */ - ps2.mem_regs[0] = 0xd0; /* 01 = 1 (first) */ - break; - case 4: - default: - ps2.option[1] = 0x0a; /* 10 10 = 2 2 */ - ps2.mem_regs[1] = 0xc2; /* 00 = 2 */ - ps2.mem_regs[0] = 0xc0; /* 00 = 2 */ - break; - } + /* Note by Kotori: I rewrote this because the original code was using + Model 80 Type 1-style 1 MB memory card settings, which are *NOT* + supported by Model 80 Type 2. */ + switch (mem_size / 1024) { + case 1: + ps2.option[1] = 0x0e; /* 11 10 = 0 2 */ + ps2.mem_regs[1] = 0xd2; /* 01 = 1 (first) */ + ps2.mem_regs[0] = 0xf0; /* 11 = invalid */ + break; + case 2: + ps2.option[1] = 0x0e; /* 11 10 = 0 2 */ + ps2.mem_regs[1] = 0xc2; /* 00 = 2 */ + ps2.mem_regs[0] = 0xf0; /* 11 = invalid */ + break; + case 3: + ps2.option[1] = 0x0a; /* 10 10 = 2 2 */ + ps2.mem_regs[1] = 0xc2; /* 00 = 2 */ + ps2.mem_regs[0] = 0xd0; /* 01 = 1 (first) */ + break; + case 4: + default: + ps2.option[1] = 0x0a; /* 10 10 = 2 2 */ + ps2.mem_regs[1] = 0xc2; /* 00 = 2 */ + ps2.mem_regs[0] = 0xc0; /* 00 = 2 */ + break; + } - ps2.mem_regs[0] |= ((mem_size/1024) & 0x0f); + ps2.mem_regs[0] |= ((mem_size / 1024) & 0x0f); - mem_mapping_add(&ps2.split_mapping, - (mem_size+256) * 1024, - 256*1024, + mem_mapping_add(&ps2.split_mapping, + (mem_size + 256) * 1024, + 256 * 1024, ps2_read_split_ram, ps2_read_split_ramw, ps2_read_split_raml, @@ -1331,194 +1307,188 @@ static void ps2_mca_board_model_80_type2_init(int is486) &ram[0xa0000], MEM_MAPPING_INTERNAL, NULL); - mem_mapping_disable(&ps2.split_mapping); + mem_mapping_disable(&ps2.split_mapping); - if ((mem_size > 4096) && !is486) - { - /* Only 4 MB supported on planar, create a memory expansion card for the rest */ - if (mem_size > 12288) - ps2_mca_mem_d071_init(4); - else { - ps2_mca_mem_fffc_init(4); - } + if ((mem_size > 4096) && !is486) { + /* Only 4 MB supported on planar, create a memory expansion card for the rest */ + if (mem_size > 12288) + ps2_mca_mem_d071_init(4); + else { + ps2_mca_mem_fffc_init(4); } + } - if (gfxcard == VID_INTERNAL) - device_add(&ps1vga_mca_device); + if (gfxcard == VID_INTERNAL) + device_add(&ps1vga_mca_device); - ps2.split_size = 0; + ps2.split_size = 0; } - static void machine_ps2_common_init(const machine_t *model) { - machine_common_init(model); + machine_common_init(model); - if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + if (fdc_type == FDC_INTERNAL) + device_add(&fdc_at_device); - dma16_init(); - ps2_dma_init(); - device_add(&ps_no_nmi_nvr_device); - pic2_init(); + dma16_init(); + ps2_dma_init(); + device_add(&ps_no_nmi_nvr_device); + pic2_init(); - int pit_type = ((pit_mode == -1 && is486) || pit_mode == 1) ? PIT_8254_FAST : PIT_8254; - pit_ps2_init(pit_type); + int pit_type = ((pit_mode == -1 && is486) || pit_mode == 1) ? PIT_8254_FAST : PIT_8254; + pit_ps2_init(pit_type); - nmi_mask = 0x80; + nmi_mask = 0x80; - ps2.uart = device_add_inst(&ns16550_device, 1); + ps2.uart = device_add_inst(&ns16550_device, 1); } - int machine_ps2_model_50_init(const machine_t *model) { - int ret; + int ret; - ret = bios_load_interleaved("roms/machines/ibmps2_m50/90x7420.zm13", - "roms/machines/ibmps2_m50/90x7429.zm18", - 0x000f0000, 131072, 0); - ret &= bios_load_aux_interleaved("roms/machines/ibmps2_m50/90x7423.zm14", - "roms/machines/ibmps2_m50/90x7426.zm16", - 0x000e0000, 65536, 0); + ret = bios_load_interleaved("roms/machines/ibmps2_m50/90x7420.zm13", + "roms/machines/ibmps2_m50/90x7429.zm18", + 0x000f0000, 131072, 0); + ret &= bios_load_aux_interleaved("roms/machines/ibmps2_m50/90x7423.zm14", + "roms/machines/ibmps2_m50/90x7426.zm16", + 0x000e0000, 65536, 0); - if (bios_only || !ret) - return ret; + if (bios_only || !ret) + return ret; - machine_ps2_common_init(model); + machine_ps2_common_init(model); - ps2.planar_id = 0xfbff; - ps2_mca_board_model_50_init(4); + ps2.planar_id = 0xfbff; + ps2_mca_board_model_50_init(4); - return ret; + return ret; } int machine_ps2_model_60_init(const machine_t *model) { - int ret; + int ret; - ret = bios_load_interleaved("roms/machines/ibmps2_m50/90x7420.zm13", - "roms/machines/ibmps2_m50/90x7429.zm18", - 0x000f0000, 131072, 0); - ret &= bios_load_aux_interleaved("roms/machines/ibmps2_m50/90x7423.zm14", - "roms/machines/ibmps2_m50/90x7426.zm16", - 0x000e0000, 65536, 0); + ret = bios_load_interleaved("roms/machines/ibmps2_m50/90x7420.zm13", + "roms/machines/ibmps2_m50/90x7429.zm18", + 0x000f0000, 131072, 0); + ret &= bios_load_aux_interleaved("roms/machines/ibmps2_m50/90x7423.zm14", + "roms/machines/ibmps2_m50/90x7426.zm16", + 0x000e0000, 65536, 0); - if (bios_only || !ret) - return ret; + if (bios_only || !ret) + return ret; - machine_ps2_common_init(model); + machine_ps2_common_init(model); - ps2.planar_id = 0xf7ff; - ps2_mca_board_model_50_init(8); + ps2.planar_id = 0xf7ff; + ps2_mca_board_model_50_init(8); - return ret; + return ret; } - int machine_ps2_model_55sx_init(const machine_t *model) { - int ret; + int ret; - ret = bios_load_interleaved("roms/machines/ibmps2_m55sx/33f8146.zm41", - "roms/machines/ibmps2_m55sx/33f8145.zm40", - 0x000e0000, 131072, 0); + ret = bios_load_interleaved("roms/machines/ibmps2_m55sx/33f8146.zm41", + "roms/machines/ibmps2_m55sx/33f8145.zm40", + 0x000e0000, 131072, 0); - if (bios_only || !ret) - return ret; + if (bios_only || !ret) + return ret; - machine_ps2_common_init(model); + machine_ps2_common_init(model); - ps2.planar_id = 0xfffb; - ps2_mca_board_model_55sx_init(0, 4); + ps2.planar_id = 0xfffb; + ps2_mca_board_model_55sx_init(0, 4); - return ret; + return ret; } - int machine_ps2_model_65sx_init(const machine_t *model) { - int ret; + int ret; - ret = bios_load_interleaved("roms/machines/ibmps2_m65sx/64F3608.BIN", - "roms/machines/ibmps2_m65sx/64F3611.BIN", - 0x000e0000, 131072, 0); + ret = bios_load_interleaved("roms/machines/ibmps2_m65sx/64F3608.BIN", + "roms/machines/ibmps2_m65sx/64F3611.BIN", + 0x000e0000, 131072, 0); - if (bios_only || !ret) - return ret; + if (bios_only || !ret) + return ret; - machine_ps2_common_init(model); + machine_ps2_common_init(model); - ps2.planar_id = 0xe3ff; - ps2_mca_board_model_55sx_init(1, 8); + ps2.planar_id = 0xe3ff; + ps2_mca_board_model_55sx_init(1, 8); - return ret; + return ret; } int machine_ps2_model_70_type3_init(const machine_t *model) { - int ret; + int ret; - ret = bios_load_interleaved("roms/machines/ibmps2_m70_type3/70-a_even.bin", - "roms/machines/ibmps2_m70_type3/70-a_odd.bin", - 0x000e0000, 131072, 0); + ret = bios_load_interleaved("roms/machines/ibmps2_m70_type3/70-a_even.bin", + "roms/machines/ibmps2_m70_type3/70-a_odd.bin", + 0x000e0000, 131072, 0); - if (bios_only || !ret) - return ret; + if (bios_only || !ret) + return ret; - machine_ps2_common_init(model); + machine_ps2_common_init(model); - ps2.planar_id = 0xf9ff; + ps2.planar_id = 0xf9ff; - ps2_mca_board_model_70_type34_init(0, 4); + ps2_mca_board_model_70_type34_init(0, 4); - return ret; + return ret; } - int machine_ps2_model_80_init(const machine_t *model) { - int ret; + int ret; - ret = bios_load_interleaved("roms/machines/ibmps2_m80/15f6637.bin", - "roms/machines/ibmps2_m80/15f6639.bin", - 0x000e0000, 131072, 0); + ret = bios_load_interleaved("roms/machines/ibmps2_m80/15f6637.bin", + "roms/machines/ibmps2_m80/15f6639.bin", + 0x000e0000, 131072, 0); - if (bios_only || !ret) - return ret; + if (bios_only || !ret) + return ret; machine_ps2_common_init(model); ps2.planar_id = 0xfdff; ps2_mca_board_model_80_type2_init(0); - return ret; + return ret; } int machine_ps2_model_80_axx_init(const machine_t *model) { - int ret; + int ret; - ret = bios_load_interleaved("roms/machines/ibmps2_m80/64f4356.bin", - "roms/machines/ibmps2_m80/64f4355.bin", - 0x000e0000, 131072, 0); + ret = bios_load_interleaved("roms/machines/ibmps2_m80/64f4356.bin", + "roms/machines/ibmps2_m80/64f4355.bin", + 0x000e0000, 131072, 0); - if (bios_only || !ret) - return ret; + if (bios_only || !ret) + return ret; - machine_ps2_common_init(model); + machine_ps2_common_init(model); - ps2.planar_id = 0xfff9; + ps2.planar_id = 0xfff9; - ps2_mca_board_model_70_type34_init(0, 8); + ps2_mca_board_model_70_type34_init(0, 8); - return ret; + return ret; } diff --git a/src/machine/m_tandy.c b/src/machine/m_tandy.c index d6c628a90..61fe19465 100644 --- a/src/machine/m_tandy.c +++ b/src/machine/m_tandy.c @@ -44,20 +44,17 @@ #include <86box/vid_cga_comp.h> #include <86box/machine.h> - enum { TANDY_RGB = 0, TANDY_COMPOSITE }; - enum { TYPE_TANDY = 0, TYPE_TANDY1000HX, TYPE_TANDY1000SL2 }; - enum { EEPROM_IDLE = 0, EEPROM_GET_OPERATION, @@ -65,76 +62,75 @@ enum { EEPROM_WRITE }; - typedef struct { - mem_mapping_t mapping; - mem_mapping_t vram_mapping; + mem_mapping_t mapping; + mem_mapping_t vram_mapping; - uint8_t crtc[32]; - int crtcreg; + uint8_t crtc[32]; + int crtcreg; - int array_index; - uint8_t array[256]; - int memctrl; - uint8_t mode, col; - uint8_t stat; + int array_index; + uint8_t array[256]; + int memctrl; + uint8_t mode, col; + uint8_t stat; - uint8_t *vram, *b8000; - uint32_t b8000_mask; - uint32_t b8000_limit; - uint8_t planar_ctrl; + uint8_t *vram, *b8000; + uint32_t b8000_mask; + uint32_t b8000_limit; + uint8_t planar_ctrl; - int linepos, - displine; - int sc, vc; - int dispon; - int con, coff, - cursoron, - blink; - int fullchange; - int vsynctime; - int vadj; - uint16_t ma, maback; + int linepos, + displine; + int sc, vc; + int dispon; + int con, coff, + cursoron, + blink; + int fullchange; + int vsynctime; + int vadj; + uint16_t ma, maback; - uint64_t dispontime, - dispofftime; - pc_timer_t timer; - int firstline, - lastline; + uint64_t dispontime, + dispofftime; + pc_timer_t timer; + int firstline, + lastline; - int composite; + int composite; } t1kvid_t; typedef struct { - char *path; + char *path; - int state; - int count; - int addr; - int clk; - uint16_t data; - uint16_t store[64]; + int state; + int count; + int addr; + int clk; + uint16_t data; + uint16_t store[64]; } t1keep_t; typedef struct { - mem_mapping_t ram_mapping; - mem_mapping_t rom_mapping; /* SL2 */ + mem_mapping_t ram_mapping; + mem_mapping_t rom_mapping; /* SL2 */ - uint8_t *rom; /* SL2 */ - uint8_t ram_bank; - uint8_t rom_bank; /* SL2 */ - int rom_offset; /* SL2 */ + uint8_t *rom; /* SL2 */ + uint8_t ram_bank; + uint8_t rom_bank; /* SL2 */ + int rom_offset; /* SL2 */ - uint32_t base; - int is_sl2; + uint32_t base; + int is_sl2; - t1kvid_t *vid; + t1kvid_t *vid; } tandy_t; -static video_timings_t timing_dram = {VIDEO_BUS, 0,0,0, 0,0,0}; /*No additional waitstates*/ - +static video_timings_t timing_dram = { VIDEO_BUS, 0, 0, 0, 0, 0, 0 }; /*No additional waitstates*/ static const scancode scancode_tandy[512] = { + // clang-format off { {0}, {0} }, { {0x01, 0}, {0x81, 0} }, { {0x02, 0}, {0x82, 0} }, { {0x03, 0}, {0x83, 0} }, { {0x04, 0}, {0x84, 0} }, { {0x05, 0}, {0x85, 0} }, @@ -391,6 +387,7 @@ static const scancode scancode_tandy[512] = { { {0}, {0} }, { {0}, {0} }, /*1f8*/ { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} } /*1fc*/ + // clang-format on }; static uint8_t crtcmask[32] = { 0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f, @@ -406,32 +403,27 @@ static uint8_t crtcmask_sl[32] = { }; static int eep_data_out; - -static uint8_t vid_in(uint16_t addr, void *priv); -static void vid_out(uint16_t addr, uint8_t val, void *priv); - +static uint8_t vid_in(uint16_t addr, void *priv); +static void vid_out(uint16_t addr, uint8_t val, void *priv); #ifdef ENABLE_TANDY_LOG int tandy_do_log = ENABLE_TANDY_LOG; - static void tandy_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (tandy_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (tandy_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define tandy_log(fmt, ...) +# define tandy_log(fmt, ...) #endif - static void recalc_mapping(tandy_t *dev) { @@ -439,19 +431,18 @@ recalc_mapping(tandy_t *dev) mem_mapping_disable(&vid->mapping); io_removehandler(0x03d0, 16, - vid_in, NULL, NULL, vid_out, NULL, NULL, dev); + vid_in, NULL, NULL, vid_out, NULL, NULL, dev); if (vid->planar_ctrl & 4) { - mem_mapping_enable(&vid->mapping); - if (vid->array[5] & 1) - mem_mapping_set_addr(&vid->mapping, 0xa0000, 0x10000); - else - mem_mapping_set_addr(&vid->mapping, 0xb8000, 0x8000); - io_sethandler(0x03d0, 16, vid_in,NULL,NULL, vid_out,NULL,NULL, dev); + mem_mapping_enable(&vid->mapping); + if (vid->array[5] & 1) + mem_mapping_set_addr(&vid->mapping, 0xa0000, 0x10000); + else + mem_mapping_set_addr(&vid->mapping, 0xb8000, 0x8000); + io_sethandler(0x03d0, 16, vid_in, NULL, NULL, vid_out, NULL, NULL, dev); } } - static void recalc_timings(tandy_t *dev) { @@ -460,38 +451,36 @@ recalc_timings(tandy_t *dev) double _dispontime, _dispofftime, disptime; if (vid->mode & 1) { - disptime = vid->crtc[0] + 1; - _dispontime = vid->crtc[1]; + disptime = vid->crtc[0] + 1; + _dispontime = vid->crtc[1]; } else { - disptime = (vid->crtc[0] + 1) << 1; - _dispontime = vid->crtc[1] << 1; + disptime = (vid->crtc[0] + 1) << 1; + _dispontime = vid->crtc[1] << 1; } _dispofftime = disptime - _dispontime; - _dispontime *= CGACONST; + _dispontime *= CGACONST; _dispofftime *= CGACONST; - vid->dispontime = (uint64_t)(_dispontime); - vid->dispofftime = (uint64_t)(_dispofftime); + vid->dispontime = (uint64_t) (_dispontime); + vid->dispofftime = (uint64_t) (_dispofftime); } - static void recalc_address(tandy_t *dev) { t1kvid_t *vid = dev->vid; if ((vid->memctrl & 0xc0) == 0xc0) { - vid->vram = &ram[((vid->memctrl & 0x06) << 14) + dev->base]; - vid->b8000 = &ram[((vid->memctrl & 0x30) << 11) + dev->base]; - vid->b8000_mask = 0x7fff; + vid->vram = &ram[((vid->memctrl & 0x06) << 14) + dev->base]; + vid->b8000 = &ram[((vid->memctrl & 0x30) << 11) + dev->base]; + vid->b8000_mask = 0x7fff; } else { - vid->vram = &ram[((vid->memctrl & 0x07) << 14) + dev->base]; - vid->b8000 = &ram[((vid->memctrl & 0x38) << 11) + dev->base]; - vid->b8000_mask = 0x3fff; + vid->vram = &ram[((vid->memctrl & 0x07) << 14) + dev->base]; + vid->b8000 = &ram[((vid->memctrl & 0x38) << 11) + dev->base]; + vid->b8000_mask = 0x3fff; } } - static void recalc_address_sl(tandy_t *dev) { @@ -500,650 +489,594 @@ recalc_address_sl(tandy_t *dev) vid->b8000_limit = 0x8000; if (vid->array[5] & 1) { - vid->vram = &ram[((vid->memctrl & 0x04) << 14) + dev->base]; - vid->b8000 = &ram[((vid->memctrl & 0x20) << 11) + dev->base]; + vid->vram = &ram[((vid->memctrl & 0x04) << 14) + dev->base]; + vid->b8000 = &ram[((vid->memctrl & 0x20) << 11) + dev->base]; } else if ((vid->memctrl & 0xc0) == 0xc0) { - vid->vram = &ram[((vid->memctrl & 0x06) << 14) + dev->base]; - vid->b8000 = &ram[((vid->memctrl & 0x30) << 11) + dev->base]; + vid->vram = &ram[((vid->memctrl & 0x06) << 14) + dev->base]; + vid->b8000 = &ram[((vid->memctrl & 0x30) << 11) + dev->base]; } else { - vid->vram = &ram[((vid->memctrl & 0x07) << 14) + dev->base]; - vid->b8000 = &ram[((vid->memctrl & 0x38) << 11) + dev->base]; - if ((vid->memctrl & 0x38) == 0x38) - vid->b8000_limit = 0x4000; + vid->vram = &ram[((vid->memctrl & 0x07) << 14) + dev->base]; + vid->b8000 = &ram[((vid->memctrl & 0x38) << 11) + dev->base]; + if ((vid->memctrl & 0x38) == 0x38) + vid->b8000_limit = 0x4000; } } - static void vid_out(uint16_t addr, uint8_t val, void *priv) { - tandy_t *dev = (tandy_t *)priv; + tandy_t *dev = (tandy_t *) priv; t1kvid_t *vid = dev->vid; - uint8_t old; + uint8_t old; if ((addr >= 0x3d0) && (addr <= 0x3d7)) - addr = (addr & 0xff9) | 0x004; + addr = (addr & 0xff9) | 0x004; switch (addr) { - case 0x03d4: - vid->crtcreg = val & 0x1f; - break; + case 0x03d4: + vid->crtcreg = val & 0x1f; + break; - case 0x03d5: - old = vid->crtc[vid->crtcreg]; - if (dev->is_sl2) - vid->crtc[vid->crtcreg] = val & crtcmask_sl[vid->crtcreg]; - else - vid->crtc[vid->crtcreg] = val & crtcmask[vid->crtcreg]; - if (old != val) { - if (vid->crtcreg < 0xe || vid->crtcreg > 0x10) { - vid->fullchange = changeframecount; - recalc_timings(dev); - } - } - break; + case 0x03d5: + old = vid->crtc[vid->crtcreg]; + if (dev->is_sl2) + vid->crtc[vid->crtcreg] = val & crtcmask_sl[vid->crtcreg]; + else + vid->crtc[vid->crtcreg] = val & crtcmask[vid->crtcreg]; + if (old != val) { + if (vid->crtcreg < 0xe || vid->crtcreg > 0x10) { + vid->fullchange = changeframecount; + recalc_timings(dev); + } + } + break; - case 0x03d8: - vid->mode = val; - if (! dev->is_sl2) - update_cga16_color(vid->mode); - break; + case 0x03d8: + vid->mode = val; + if (!dev->is_sl2) + update_cga16_color(vid->mode); + break; - case 0x03d9: - vid->col = val; - break; + case 0x03d9: + vid->col = val; + break; - case 0x03da: - vid->array_index = val & 0x1f; - break; + case 0x03da: + vid->array_index = val & 0x1f; + break; - case 0x03de: - if (vid->array_index & 16) - val &= 0xf; - vid->array[vid->array_index & 0x1f] = val; - if (dev->is_sl2) { - if ((vid->array_index & 0x1f) == 5) { - recalc_mapping(dev); - recalc_address_sl(dev); - } - } - break; + case 0x03de: + if (vid->array_index & 16) + val &= 0xf; + vid->array[vid->array_index & 0x1f] = val; + if (dev->is_sl2) { + if ((vid->array_index & 0x1f) == 5) { + recalc_mapping(dev); + recalc_address_sl(dev); + } + } + break; - case 0x03df: - vid->memctrl = val; - if (dev->is_sl2) - recalc_address_sl(dev); - else - recalc_address(dev); - break; + case 0x03df: + vid->memctrl = val; + if (dev->is_sl2) + recalc_address_sl(dev); + else + recalc_address(dev); + break; - case 0x0065: - if (val == 8) return; /*Hack*/ - vid->planar_ctrl = val; - recalc_mapping(dev); - break; + case 0x0065: + if (val == 8) + return; /*Hack*/ + vid->planar_ctrl = val; + recalc_mapping(dev); + break; } } - static uint8_t vid_in(uint16_t addr, void *priv) { - tandy_t *dev = (tandy_t *)priv; + tandy_t *dev = (tandy_t *) priv; t1kvid_t *vid = dev->vid; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if ((addr >= 0x3d0) && (addr <= 0x3d7)) - addr = (addr & 0xff9) | 0x004; + addr = (addr & 0xff9) | 0x004; switch (addr) { - case 0x03d4: - ret = vid->crtcreg; - break; + case 0x03d4: + ret = vid->crtcreg; + break; - case 0x03d5: - ret = vid->crtc[vid->crtcreg]; - break; + case 0x03d5: + ret = vid->crtc[vid->crtcreg]; + break; - case 0x03da: - ret = vid->stat; - break; + case 0x03da: + ret = vid->stat; + break; } - return(ret); + return (ret); } - static void vid_write(uint32_t addr, uint8_t val, void *priv) { - tandy_t *dev = (tandy_t *)priv; + tandy_t *dev = (tandy_t *) priv; t1kvid_t *vid = dev->vid; - if (vid->memctrl == -1) return; + if (vid->memctrl == -1) + return; if (dev->is_sl2) { - if (vid->array[5] & 1) - vid->b8000[addr & 0xffff] = val; - else { - if ((addr & 0x7fff) < vid->b8000_limit) - vid->b8000[addr & 0x7fff] = val; - } + if (vid->array[5] & 1) + vid->b8000[addr & 0xffff] = val; + else { + if ((addr & 0x7fff) < vid->b8000_limit) + vid->b8000[addr & 0x7fff] = val; + } } else { - vid->b8000[addr & vid->b8000_mask] = val; + vid->b8000[addr & vid->b8000_mask] = val; } } - static uint8_t vid_read(uint32_t addr, void *priv) { - tandy_t *dev = (tandy_t *)priv; + tandy_t *dev = (tandy_t *) priv; t1kvid_t *vid = dev->vid; - if (vid->memctrl == -1) return(0xff); + if (vid->memctrl == -1) + return (0xff); if (dev->is_sl2) { - if (vid->array[5] & 1) - return(vid->b8000[addr & 0xffff]); - if ((addr & 0x7fff) < vid->b8000_limit) - return(vid->b8000[addr & 0x7fff]); - else - return(0xff); + if (vid->array[5] & 1) + return (vid->b8000[addr & 0xffff]); + if ((addr & 0x7fff) < vid->b8000_limit) + return (vid->b8000[addr & 0x7fff]); + else + return (0xff); } else { - return(vid->b8000[addr & vid->b8000_mask]); + return (vid->b8000[addr & vid->b8000_mask]); } } - static void vid_poll(void *priv) { - tandy_t *dev = (tandy_t *)priv; + tandy_t *dev = (tandy_t *) priv; t1kvid_t *vid = dev->vid; - uint16_t ca = (vid->crtc[15] | (vid->crtc[14] << 8)) & 0x3fff; - int drawcursor; - int x, c, xs_temp, ys_temp; - int oldvc; - uint8_t chr, attr; - uint16_t dat; - int cols[4]; - int col; - int oldsc; + uint16_t ca = (vid->crtc[15] | (vid->crtc[14] << 8)) & 0x3fff; + int drawcursor; + int x, c, xs_temp, ys_temp; + int oldvc; + uint8_t chr, attr; + uint16_t dat; + int cols[4]; + int col; + int oldsc; - if (! vid->linepos) { - timer_advance_u64(&vid->timer, vid->dispofftime); - vid->stat |= 1; - vid->linepos = 1; - oldsc = vid->sc; - if ((vid->crtc[8] & 3) == 3) - vid->sc = (vid->sc << 1) & 7; - if (vid->dispon) { - if (vid->displine < vid->firstline) { - vid->firstline = vid->displine; - video_wait_for_buffer(); - } - vid->lastline = vid->displine; - cols[0] = (vid->array[2] & 0xf) + 16; - for (c = 0; c < 8; c++) { - if (vid->array[3] & 4) { - buffer32->line[(vid->displine << 1)][c] = buffer32->line[(vid->displine << 1) + 1][c] = cols[0]; - if (vid->mode & 1) { - buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 3) + 8] = - buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 3) + 8] = cols[0]; - } else { - buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 4) + 8] = - buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 4) + 8] = cols[0]; - } - } else if ((vid->mode & 0x12) == 0x12) { - buffer32->line[(vid->displine << 1)][c] = buffer32->line[(vid->displine << 1) + 1][c] = 0; - if (vid->mode & 1) { - buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 3) + 8] = - buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 3) + 8] = 0; - } else { - buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 4) + 8] = - buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 4) + 8] = 0; - } - } else { - buffer32->line[(vid->displine << 1)][c] = buffer32->line[(vid->displine << 1) + 1][c] = (vid->col & 15) + 16; - if (vid->mode & 1) { - buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 3) + 8] = - buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 3) + 8] = (vid->col & 15) + 16; - } else { - buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 4) + 8] = - buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 4) + 8] = (vid->col & 15) + 16; - } - } - } - if (dev->is_sl2 && (vid->array[5] & 1)) { /*640x200x16*/ - for (x = 0; x < vid->crtc[1]*2; x++) { - dat = (vid->vram[(vid->ma << 1) & 0xffff] << 8) | - vid->vram[((vid->ma << 1) + 1) & 0xffff]; - vid->ma++; - buffer32->line[(vid->displine << 1)][(x << 2) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 2) + 8] = - vid->array[((dat >> 12) & 0xf) + 16] + 16; - buffer32->line[(vid->displine << 1)][(x << 2) + 9] = buffer32->line[(vid->displine << 1) + 1][(x << 2) + 9] = - vid->array[((dat >> 8) & 0xf) + 16] + 16; - buffer32->line[(vid->displine << 1)][(x << 2) + 10] = buffer32->line[(vid->displine << 1) + 1][(x << 2) + 10] = - vid->array[((dat >> 4) & 0xf) + 16] + 16; - buffer32->line[(vid->displine << 1)][(x << 2) + 11] = buffer32->line[(vid->displine << 1) + 1][(x << 2) + 11] = - vid->array[(dat & 0xf) + 16] + 16; - } - } else if ((vid->array[3] & 0x10) && (vid->mode & 1)) { /*320x200x16*/ - for (x = 0; x < vid->crtc[1]; x++) { - dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000)] << 8) | - vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000) + 1]; - vid->ma++; - buffer32->line[(vid->displine << 1)][(x << 3) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 8] = - buffer32->line[(vid->displine << 1)][(x << 3) + 9] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 9] = - vid->array[((dat >> 12) & vid->array[1]) + 16] + 16; - buffer32->line[(vid->displine << 1)][(x << 3) + 10] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 10] = - buffer32->line[(vid->displine << 1)][(x << 3) + 11] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 11] = - vid->array[((dat >> 8) & vid->array[1]) + 16] + 16; - buffer32->line[(vid->displine << 1)][(x << 3) + 12] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 12] = - buffer32->line[(vid->displine << 1)][(x << 3) + 13] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 13] = - vid->array[((dat >> 4) & vid->array[1]) + 16] + 16; - buffer32->line[(vid->displine << 1)][(x << 3) + 14] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 14] = - buffer32->line[(vid->displine << 1)][(x << 3) + 15] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 15] = - vid->array[(dat & vid->array[1]) + 16] + 16; - } - } else if (vid->array[3] & 0x10) { /*160x200x16*/ - for (x = 0; x < vid->crtc[1]; x++) { - if (dev->is_sl2) { - dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000)] << 8) | - vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000) + 1]; - } else { - dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000)] << 8) | - vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000) + 1]; - } - vid->ma++; - buffer32->line[(vid->displine << 1)][(x << 4) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 8] = - buffer32->line[(vid->displine << 1)][(x << 4) + 9] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 9] = - buffer32->line[(vid->displine << 1)][(x << 4) + 10] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 10] = - buffer32->line[(vid->displine << 1)][(x << 4) + 11] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 11] = - vid->array[((dat >> 12) & vid->array[1]) + 16] + 16; - buffer32->line[(vid->displine << 1)][(x << 4) + 12] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 12] = - buffer32->line[(vid->displine << 1)][(x << 4) + 13] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 13] = - buffer32->line[(vid->displine << 1)][(x << 4) + 14] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 14] = - buffer32->line[(vid->displine << 1)][(x << 4) + 15] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 15] = - vid->array[((dat >> 8) & vid->array[1]) + 16] + 16; - buffer32->line[(vid->displine << 1)][(x << 4) + 16] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 16] = - buffer32->line[(vid->displine << 1)][(x << 4) + 17] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 17] = - buffer32->line[(vid->displine << 1)][(x << 4) + 18] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 18] = - buffer32->line[(vid->displine << 1)][(x << 4) + 19] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 19] = - vid->array[((dat >> 4) & vid->array[1]) + 16] + 16; - buffer32->line[(vid->displine << 1)][(x << 4) + 20] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 20] = - buffer32->line[(vid->displine << 1)][(x << 4) + 21] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 21] = - buffer32->line[(vid->displine << 1)][(x << 4) + 22] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 22] = - buffer32->line[(vid->displine << 1)][(x << 4) + 23] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 23] = - vid->array[(dat & vid->array[1]) + 16] + 16; - } - } else if (vid->array[3] & 0x08) { /*640x200x4 - this implementation is a complete guess!*/ - for (x = 0; x < vid->crtc[1]; x++) { - dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000)] << 8) | - vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000) + 1]; - vid->ma++; - for (c = 0; c < 8; c++) { - chr = (dat >> 6) & 2; - chr |= ((dat >> 15) & 1); - buffer32->line[(vid->displine << 1)][(x << 3) + 8 + c] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 8 + c] = - vid->array[(chr & vid->array[1]) + 16] + 16; - dat <<= 1; - } - } - } else if (vid->mode & 1) { - for (x = 0; x < vid->crtc[1]; x++) { - chr = vid->vram[ (vid->ma << 1) & 0x3fff]; - attr = vid->vram[((vid->ma << 1) + 1) & 0x3fff]; - drawcursor = ((vid->ma == ca) && vid->con && vid->cursoron); - if (vid->mode & 0x20) { - cols[1] = vid->array[ ((attr & 15) & vid->array[1]) + 16] + 16; - cols[0] = vid->array[(((attr >> 4) & 7) & vid->array[1]) + 16] + 16; - if ((vid->blink & 16) && (attr & 0x80) && !drawcursor) - cols[1] = cols[0]; - } else { - cols[1] = vid->array[((attr & 15) & vid->array[1]) + 16] + 16; - cols[0] = vid->array[((attr >> 4) & vid->array[1]) + 16] + 16; - } - if (vid->sc & 8) { - for (c = 0; c < 8; c++) { - buffer32->line[(vid->displine << 1)][(x << 3) + c + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + c + 8] = - cols[0]; - } - } else { - for (c = 0; c < 8; c++) { - if (vid->sc == 8) { - buffer32->line[(vid->displine << 1)][(x << 3) + c + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + c + 8] = - cols[(fontdat[chr][7] & (1 << (c ^ 7))) ? 1 : 0]; - } else { - buffer32->line[(vid->displine << 1)][(x << 3) + c + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + c + 8] = - cols[(fontdat[chr][vid->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; - } - } - } - if (drawcursor) { - for (c = 0; c < 8; c++) { - buffer32->line[(vid->displine << 1)][(x << 3) + c + 8] ^= 15; - buffer32->line[(vid->displine << 1) + 1][(x << 3) + c + 8] ^= 15; - } - } - vid->ma++; - } - } else if (! (vid->mode & 2)) { - for (x = 0; x < vid->crtc[1]; x++) { - chr = vid->vram[ (vid->ma << 1) & 0x3fff]; - attr = vid->vram[((vid->ma << 1) + 1) & 0x3fff]; - drawcursor = ((vid->ma == ca) && vid->con && vid->cursoron); - if (vid->mode & 0x20) { - cols[1] = vid->array[ ((attr & 15) & vid->array[1]) + 16] + 16; - cols[0] = vid->array[(((attr >> 4) & 7) & vid->array[1]) + 16] + 16; - if ((vid->blink & 16) && (attr & 0x80) && !drawcursor) - cols[1] = cols[0]; - } else { - cols[1] = vid->array[((attr & 15) & vid->array[1]) + 16] + 16; - cols[0] = vid->array[((attr >> 4) & vid->array[1]) + 16] + 16; - } - vid->ma++; - if (vid->sc & 8) { - for (c = 0; c < 8; c++) - buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = - cols[0]; - } else { - for (c = 0; c < 8; c++) { - if (vid->sc == 8) { - buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 8] = - buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = - cols[(fontdat[chr][7] & (1 << (c ^ 7))) ? 1 : 0]; - } else { - buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 8] = - buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = - cols[(fontdat[chr][vid->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; - } - } - } - if (drawcursor) { - for (c = 0; c < 16; c++) { - buffer32->line[(vid->displine << 1)][(x << 4) + c + 8] ^= 15; - buffer32->line[(vid->displine << 1) + 1][(x << 4) + c + 8] ^= 15; - } - } - } - } else if (! (vid->mode & 16)) { - cols[0] = (vid->col & 15); - col = (vid->col & 16) ? 8 : 0; - if (vid->mode & 4) { - cols[1] = col | 3; - cols[2] = col | 4; - cols[3] = col | 7; - } else if (vid->col & 32) { - cols[1] = col | 3; - cols[2] = col | 5; - cols[3] = col | 7; - } else { - cols[1] = col | 2; - cols[2] = col | 4; - cols[3] = col | 6; - } - cols[0] = vid->array[(cols[0] & vid->array[1]) + 16] + 16; - cols[1] = vid->array[(cols[1] & vid->array[1]) + 16] + 16; - cols[2] = vid->array[(cols[2] & vid->array[1]) + 16] + 16; - cols[3] = vid->array[(cols[3] & vid->array[1]) + 16] + 16; - for (x = 0; x < vid->crtc[1]; x++) { - dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000)] << 8) | - vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000) + 1]; - vid->ma++; - for (c = 0; c < 8; c++) { - buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 8] = - buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = - cols[dat >> 14]; - dat <<= 2; - } - } - } else { - cols[0] = 0; - cols[1] = vid->array[(vid->col & vid->array[1]) + 16] + 16; - for (x = 0; x < vid->crtc[1]; x++) { - dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000)] << 8) | - vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000) + 1]; - vid->ma++; - for (c = 0; c < 16; c++) { - buffer32->line[(vid->displine << 1)][(x << 4) + c + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + c + 8] = - cols[dat >> 15]; - dat <<= 1; - } - } - } - } else { - if (vid->array[3] & 4) { - if (vid->mode & 1) { - hline(buffer32, 0, (vid->displine << 1), (vid->crtc[1] << 3) + 16, (vid->array[2] & 0xf) + 16); - hline(buffer32, 0, (vid->displine << 1) + 1, (vid->crtc[1] << 3) + 16, (vid->array[2] & 0xf) + 16); - } else { - hline(buffer32, 0, (vid->displine << 1), (vid->crtc[1] << 4) + 16, (vid->array[2] & 0xf) + 16); - hline(buffer32, 0, (vid->displine << 1) + 1, (vid->crtc[1] << 4) + 16, (vid->array[2] & 0xf) + 16); - } - } else { - cols[0] = ((vid->mode & 0x12) == 0x12) ? 0 : (vid->col & 0xf) + 16; - if (vid->mode & 1) { - hline(buffer32, 0, (vid->displine << 1), (vid->crtc[1] << 3) + 16, cols[0]); - hline(buffer32, 0, (vid->displine << 1) + 1, (vid->crtc[1] << 3) + 16, cols[0]); - } else { - hline(buffer32, 0, (vid->displine << 1), (vid->crtc[1] << 4) + 16, cols[0]); - hline(buffer32, 0, (vid->displine << 1) + 1, (vid->crtc[1] << 4) + 16, cols[0]); - } - } - } + if (!vid->linepos) { + timer_advance_u64(&vid->timer, vid->dispofftime); + vid->stat |= 1; + vid->linepos = 1; + oldsc = vid->sc; + if ((vid->crtc[8] & 3) == 3) + vid->sc = (vid->sc << 1) & 7; + if (vid->dispon) { + if (vid->displine < vid->firstline) { + vid->firstline = vid->displine; + video_wait_for_buffer(); + } + vid->lastline = vid->displine; + cols[0] = (vid->array[2] & 0xf) + 16; + for (c = 0; c < 8; c++) { + if (vid->array[3] & 4) { + buffer32->line[(vid->displine << 1)][c] = buffer32->line[(vid->displine << 1) + 1][c] = cols[0]; + if (vid->mode & 1) { + buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 3) + 8] = buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 3) + 8] = cols[0]; + } else { + buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 4) + 8] = buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 4) + 8] = cols[0]; + } + } else if ((vid->mode & 0x12) == 0x12) { + buffer32->line[(vid->displine << 1)][c] = buffer32->line[(vid->displine << 1) + 1][c] = 0; + if (vid->mode & 1) { + buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 3) + 8] = buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 3) + 8] = 0; + } else { + buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 4) + 8] = buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 4) + 8] = 0; + } + } else { + buffer32->line[(vid->displine << 1)][c] = buffer32->line[(vid->displine << 1) + 1][c] = (vid->col & 15) + 16; + if (vid->mode & 1) { + buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 3) + 8] = buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 3) + 8] = (vid->col & 15) + 16; + } else { + buffer32->line[(vid->displine << 1)][c + (vid->crtc[1] << 4) + 8] = buffer32->line[(vid->displine << 1) + 1][c + (vid->crtc[1] << 4) + 8] = (vid->col & 15) + 16; + } + } + } + if (dev->is_sl2 && (vid->array[5] & 1)) { /*640x200x16*/ + for (x = 0; x < vid->crtc[1] * 2; x++) { + dat = (vid->vram[(vid->ma << 1) & 0xffff] << 8) | vid->vram[((vid->ma << 1) + 1) & 0xffff]; + vid->ma++; + buffer32->line[(vid->displine << 1)][(x << 2) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 2) + 8] = vid->array[((dat >> 12) & 0xf) + 16] + 16; + buffer32->line[(vid->displine << 1)][(x << 2) + 9] = buffer32->line[(vid->displine << 1) + 1][(x << 2) + 9] = vid->array[((dat >> 8) & 0xf) + 16] + 16; + buffer32->line[(vid->displine << 1)][(x << 2) + 10] = buffer32->line[(vid->displine << 1) + 1][(x << 2) + 10] = vid->array[((dat >> 4) & 0xf) + 16] + 16; + buffer32->line[(vid->displine << 1)][(x << 2) + 11] = buffer32->line[(vid->displine << 1) + 1][(x << 2) + 11] = vid->array[(dat & 0xf) + 16] + 16; + } + } else if ((vid->array[3] & 0x10) && (vid->mode & 1)) { /*320x200x16*/ + for (x = 0; x < vid->crtc[1]; x++) { + dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000)] << 8) | vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000) + 1]; + vid->ma++; + buffer32->line[(vid->displine << 1)][(x << 3) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 8] = buffer32->line[(vid->displine << 1)][(x << 3) + 9] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 9] = vid->array[((dat >> 12) & vid->array[1]) + 16] + 16; + buffer32->line[(vid->displine << 1)][(x << 3) + 10] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 10] = buffer32->line[(vid->displine << 1)][(x << 3) + 11] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 11] = vid->array[((dat >> 8) & vid->array[1]) + 16] + 16; + buffer32->line[(vid->displine << 1)][(x << 3) + 12] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 12] = buffer32->line[(vid->displine << 1)][(x << 3) + 13] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 13] = vid->array[((dat >> 4) & vid->array[1]) + 16] + 16; + buffer32->line[(vid->displine << 1)][(x << 3) + 14] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 14] = buffer32->line[(vid->displine << 1)][(x << 3) + 15] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 15] = vid->array[(dat & vid->array[1]) + 16] + 16; + } + } else if (vid->array[3] & 0x10) { /*160x200x16*/ + for (x = 0; x < vid->crtc[1]; x++) { + if (dev->is_sl2) { + dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000)] << 8) | vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000) + 1]; + } else { + dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000)] << 8) | vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000) + 1]; + } + vid->ma++; + buffer32->line[(vid->displine << 1)][(x << 4) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 8] = buffer32->line[(vid->displine << 1)][(x << 4) + 9] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 9] = buffer32->line[(vid->displine << 1)][(x << 4) + 10] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 10] = buffer32->line[(vid->displine << 1)][(x << 4) + 11] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 11] = vid->array[((dat >> 12) & vid->array[1]) + 16] + 16; + buffer32->line[(vid->displine << 1)][(x << 4) + 12] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 12] = buffer32->line[(vid->displine << 1)][(x << 4) + 13] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 13] = buffer32->line[(vid->displine << 1)][(x << 4) + 14] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 14] = buffer32->line[(vid->displine << 1)][(x << 4) + 15] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 15] = vid->array[((dat >> 8) & vid->array[1]) + 16] + 16; + buffer32->line[(vid->displine << 1)][(x << 4) + 16] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 16] = buffer32->line[(vid->displine << 1)][(x << 4) + 17] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 17] = buffer32->line[(vid->displine << 1)][(x << 4) + 18] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 18] = buffer32->line[(vid->displine << 1)][(x << 4) + 19] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 19] = vid->array[((dat >> 4) & vid->array[1]) + 16] + 16; + buffer32->line[(vid->displine << 1)][(x << 4) + 20] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 20] = buffer32->line[(vid->displine << 1)][(x << 4) + 21] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 21] = buffer32->line[(vid->displine << 1)][(x << 4) + 22] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 22] = buffer32->line[(vid->displine << 1)][(x << 4) + 23] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 23] = vid->array[(dat & vid->array[1]) + 16] + 16; + } + } else if (vid->array[3] & 0x08) { /*640x200x4 - this implementation is a complete guess!*/ + for (x = 0; x < vid->crtc[1]; x++) { + dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000)] << 8) | vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000) + 1]; + vid->ma++; + for (c = 0; c < 8; c++) { + chr = (dat >> 6) & 2; + chr |= ((dat >> 15) & 1); + buffer32->line[(vid->displine << 1)][(x << 3) + 8 + c] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 8 + c] = vid->array[(chr & vid->array[1]) + 16] + 16; + dat <<= 1; + } + } + } else if (vid->mode & 1) { + for (x = 0; x < vid->crtc[1]; x++) { + chr = vid->vram[(vid->ma << 1) & 0x3fff]; + attr = vid->vram[((vid->ma << 1) + 1) & 0x3fff]; + drawcursor = ((vid->ma == ca) && vid->con && vid->cursoron); + if (vid->mode & 0x20) { + cols[1] = vid->array[((attr & 15) & vid->array[1]) + 16] + 16; + cols[0] = vid->array[(((attr >> 4) & 7) & vid->array[1]) + 16] + 16; + if ((vid->blink & 16) && (attr & 0x80) && !drawcursor) + cols[1] = cols[0]; + } else { + cols[1] = vid->array[((attr & 15) & vid->array[1]) + 16] + 16; + cols[0] = vid->array[((attr >> 4) & vid->array[1]) + 16] + 16; + } + if (vid->sc & 8) { + for (c = 0; c < 8; c++) { + buffer32->line[(vid->displine << 1)][(x << 3) + c + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + c + 8] = cols[0]; + } + } else { + for (c = 0; c < 8; c++) { + if (vid->sc == 8) { + buffer32->line[(vid->displine << 1)][(x << 3) + c + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + c + 8] = cols[(fontdat[chr][7] & (1 << (c ^ 7))) ? 1 : 0]; + } else { + buffer32->line[(vid->displine << 1)][(x << 3) + c + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + c + 8] = cols[(fontdat[chr][vid->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; + } + } + } + if (drawcursor) { + for (c = 0; c < 8; c++) { + buffer32->line[(vid->displine << 1)][(x << 3) + c + 8] ^= 15; + buffer32->line[(vid->displine << 1) + 1][(x << 3) + c + 8] ^= 15; + } + } + vid->ma++; + } + } else if (!(vid->mode & 2)) { + for (x = 0; x < vid->crtc[1]; x++) { + chr = vid->vram[(vid->ma << 1) & 0x3fff]; + attr = vid->vram[((vid->ma << 1) + 1) & 0x3fff]; + drawcursor = ((vid->ma == ca) && vid->con && vid->cursoron); + if (vid->mode & 0x20) { + cols[1] = vid->array[((attr & 15) & vid->array[1]) + 16] + 16; + cols[0] = vid->array[(((attr >> 4) & 7) & vid->array[1]) + 16] + 16; + if ((vid->blink & 16) && (attr & 0x80) && !drawcursor) + cols[1] = cols[0]; + } else { + cols[1] = vid->array[((attr & 15) & vid->array[1]) + 16] + 16; + cols[0] = vid->array[((attr >> 4) & vid->array[1]) + 16] + 16; + } + vid->ma++; + if (vid->sc & 8) { + for (c = 0; c < 8; c++) + buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = cols[0]; + } else { + for (c = 0; c < 8; c++) { + if (vid->sc == 8) { + buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdat[chr][7] & (1 << (c ^ 7))) ? 1 : 0]; + } else { + buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdat[chr][vid->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; + } + } + } + if (drawcursor) { + for (c = 0; c < 16; c++) { + buffer32->line[(vid->displine << 1)][(x << 4) + c + 8] ^= 15; + buffer32->line[(vid->displine << 1) + 1][(x << 4) + c + 8] ^= 15; + } + } + } + } else if (!(vid->mode & 16)) { + cols[0] = (vid->col & 15); + col = (vid->col & 16) ? 8 : 0; + if (vid->mode & 4) { + cols[1] = col | 3; + cols[2] = col | 4; + cols[3] = col | 7; + } else if (vid->col & 32) { + cols[1] = col | 3; + cols[2] = col | 5; + cols[3] = col | 7; + } else { + cols[1] = col | 2; + cols[2] = col | 4; + cols[3] = col | 6; + } + cols[0] = vid->array[(cols[0] & vid->array[1]) + 16] + 16; + cols[1] = vid->array[(cols[1] & vid->array[1]) + 16] + 16; + cols[2] = vid->array[(cols[2] & vid->array[1]) + 16] + 16; + cols[3] = vid->array[(cols[3] & vid->array[1]) + 16] + 16; + for (x = 0; x < vid->crtc[1]; x++) { + dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000)] << 8) | vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000) + 1]; + vid->ma++; + for (c = 0; c < 8; c++) { + buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 8] = buffer32->line[(vid->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = cols[dat >> 14]; + dat <<= 2; + } + } + } else { + cols[0] = 0; + cols[1] = vid->array[(vid->col & vid->array[1]) + 16] + 16; + for (x = 0; x < vid->crtc[1]; x++) { + dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000)] << 8) | vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 1) * 0x2000) + 1]; + vid->ma++; + for (c = 0; c < 16; c++) { + buffer32->line[(vid->displine << 1)][(x << 4) + c + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + c + 8] = cols[dat >> 15]; + dat <<= 1; + } + } + } + } else { + if (vid->array[3] & 4) { + if (vid->mode & 1) { + hline(buffer32, 0, (vid->displine << 1), (vid->crtc[1] << 3) + 16, (vid->array[2] & 0xf) + 16); + hline(buffer32, 0, (vid->displine << 1) + 1, (vid->crtc[1] << 3) + 16, (vid->array[2] & 0xf) + 16); + } else { + hline(buffer32, 0, (vid->displine << 1), (vid->crtc[1] << 4) + 16, (vid->array[2] & 0xf) + 16); + hline(buffer32, 0, (vid->displine << 1) + 1, (vid->crtc[1] << 4) + 16, (vid->array[2] & 0xf) + 16); + } + } else { + cols[0] = ((vid->mode & 0x12) == 0x12) ? 0 : (vid->col & 0xf) + 16; + if (vid->mode & 1) { + hline(buffer32, 0, (vid->displine << 1), (vid->crtc[1] << 3) + 16, cols[0]); + hline(buffer32, 0, (vid->displine << 1) + 1, (vid->crtc[1] << 3) + 16, cols[0]); + } else { + hline(buffer32, 0, (vid->displine << 1), (vid->crtc[1] << 4) + 16, cols[0]); + hline(buffer32, 0, (vid->displine << 1) + 1, (vid->crtc[1] << 4) + 16, cols[0]); + } + } + } - if (vid->mode & 1) - x = (vid->crtc[1] << 3) + 16; - else - x = (vid->crtc[1] << 4) + 16; - if (!dev->is_sl2 && vid->composite) { - Composite_Process(vid->mode, 0, x >> 2, buffer32->line[(vid->displine << 1)]); - Composite_Process(vid->mode, 0, x >> 2, buffer32->line[(vid->displine << 1) + 1]); - } - vid->sc = oldsc; - if (vid->vc == vid->crtc[7] && !vid->sc) - vid->stat |= 8; - vid->displine++; - if (vid->displine >= 360) - vid->displine = 0; + if (vid->mode & 1) + x = (vid->crtc[1] << 3) + 16; + else + x = (vid->crtc[1] << 4) + 16; + if (!dev->is_sl2 && vid->composite) { + Composite_Process(vid->mode, 0, x >> 2, buffer32->line[(vid->displine << 1)]); + Composite_Process(vid->mode, 0, x >> 2, buffer32->line[(vid->displine << 1) + 1]); + } + vid->sc = oldsc; + if (vid->vc == vid->crtc[7] && !vid->sc) + vid->stat |= 8; + vid->displine++; + if (vid->displine >= 360) + vid->displine = 0; } else { - timer_advance_u64(&vid->timer, vid->dispontime); - if (vid->dispon) - vid->stat &= ~1; - vid->linepos = 0; - if (vid->vsynctime) { - vid->vsynctime--; - if (! vid->vsynctime) - vid->stat &= ~8; - } - if (vid->sc == (vid->crtc[11] & 31) || ((vid->crtc[8] & 3) == 3 && vid->sc == ((vid->crtc[11] & 31) >> 1))) { - vid->con = 0; - vid->coff = 1; - } - if (vid->vadj) { - vid->sc++; - vid->sc &= 31; - vid->ma = vid->maback; - vid->vadj--; - if (! vid->vadj) { - vid->dispon = 1; - if (dev->is_sl2 && (vid->array[5] & 1)) - vid->ma = vid->maback = vid->crtc[13] | (vid->crtc[12] << 8); - else - vid->ma = vid->maback = (vid->crtc[13] | (vid->crtc[12] << 8)) & 0x3fff; - vid->sc = 0; - } - } else if (vid->sc == vid->crtc[9] || ((vid->crtc[8] & 3) == 3 && vid->sc == (vid->crtc[9] >> 1))) { - vid->maback = vid->ma; - vid->sc = 0; - oldvc = vid->vc; - vid->vc++; - if (dev->is_sl2) - vid->vc &= 255; - else - vid->vc &= 127; - if (vid->vc == vid->crtc[6]) - vid->dispon = 0; - if (oldvc == vid->crtc[4]) { - vid->vc = 0; - vid->vadj = vid->crtc[5]; - if (! vid->vadj) - vid->dispon = 1; - if (! vid->vadj) { - if (dev->is_sl2 && (vid->array[5] & 1)) - vid->ma = vid->maback = vid->crtc[13] | (vid->crtc[12] << 8); - else - vid->ma = vid->maback = (vid->crtc[13] | (vid->crtc[12] << 8)) & 0x3fff; - } - if ((vid->crtc[10] & 0x60) == 0x20) - vid->cursoron = 0; - else - vid->cursoron = vid->blink & 16; - } - if (vid->vc == vid->crtc[7]) { - vid->dispon = 0; - vid->displine = 0; - vid->vsynctime = 16; - if (vid->crtc[7]) { - if (vid->mode & 1) - x = (vid->crtc[1] << 3) + 16; - else - x = (vid->crtc[1] << 4) + 16; - vid->lastline++; + timer_advance_u64(&vid->timer, vid->dispontime); + if (vid->dispon) + vid->stat &= ~1; + vid->linepos = 0; + if (vid->vsynctime) { + vid->vsynctime--; + if (!vid->vsynctime) + vid->stat &= ~8; + } + if (vid->sc == (vid->crtc[11] & 31) || ((vid->crtc[8] & 3) == 3 && vid->sc == ((vid->crtc[11] & 31) >> 1))) { + vid->con = 0; + vid->coff = 1; + } + if (vid->vadj) { + vid->sc++; + vid->sc &= 31; + vid->ma = vid->maback; + vid->vadj--; + if (!vid->vadj) { + vid->dispon = 1; + if (dev->is_sl2 && (vid->array[5] & 1)) + vid->ma = vid->maback = vid->crtc[13] | (vid->crtc[12] << 8); + else + vid->ma = vid->maback = (vid->crtc[13] | (vid->crtc[12] << 8)) & 0x3fff; + vid->sc = 0; + } + } else if (vid->sc == vid->crtc[9] || ((vid->crtc[8] & 3) == 3 && vid->sc == (vid->crtc[9] >> 1))) { + vid->maback = vid->ma; + vid->sc = 0; + oldvc = vid->vc; + vid->vc++; + if (dev->is_sl2) + vid->vc &= 255; + else + vid->vc &= 127; + if (vid->vc == vid->crtc[6]) + vid->dispon = 0; + if (oldvc == vid->crtc[4]) { + vid->vc = 0; + vid->vadj = vid->crtc[5]; + if (!vid->vadj) + vid->dispon = 1; + if (!vid->vadj) { + if (dev->is_sl2 && (vid->array[5] & 1)) + vid->ma = vid->maback = vid->crtc[13] | (vid->crtc[12] << 8); + else + vid->ma = vid->maback = (vid->crtc[13] | (vid->crtc[12] << 8)) & 0x3fff; + } + if ((vid->crtc[10] & 0x60) == 0x20) + vid->cursoron = 0; + else + vid->cursoron = vid->blink & 16; + } + if (vid->vc == vid->crtc[7]) { + vid->dispon = 0; + vid->displine = 0; + vid->vsynctime = 16; + if (vid->crtc[7]) { + if (vid->mode & 1) + x = (vid->crtc[1] << 3) + 16; + else + x = (vid->crtc[1] << 4) + 16; + vid->lastline++; - xs_temp = x; - ys_temp = (vid->lastline - vid->firstline) << 1; + xs_temp = x; + ys_temp = (vid->lastline - vid->firstline) << 1; - if ((xs_temp > 0) && (ys_temp > 0)) { - if (xs_temp < 64) xs_temp = 656; - if (ys_temp < 32) ys_temp = 400; - if (!enable_overscan) - xs_temp -= 16; + if ((xs_temp > 0) && (ys_temp > 0)) { + if (xs_temp < 64) + xs_temp = 656; + if (ys_temp < 32) + ys_temp = 400; + if (!enable_overscan) + xs_temp -= 16; - if (((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get())) { - xsize = xs_temp; - ysize = ys_temp; - set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); + if (((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get())) { + xsize = xs_temp; + ysize = ys_temp; + set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); - if (video_force_resize_get()) - video_force_resize_set(0); - } + if (video_force_resize_get()) + video_force_resize_set(0); + } - if (enable_overscan) { - if (!dev->is_sl2 && vid->composite) - video_blit_memtoscreen(0, (vid->firstline - 4) << 1, - xsize, ((vid->lastline - vid->firstline) + 8) << 1); - else - video_blit_memtoscreen_8(0, (vid->firstline - 4) << 1, - xsize, ((vid->lastline - vid->firstline) + 8) << 1); - } else { - if (!dev->is_sl2 && vid->composite) - video_blit_memtoscreen(8, vid->firstline << 1, - xsize, (vid->lastline - vid->firstline) << 1); - else - video_blit_memtoscreen_8(8, vid->firstline << 1, - xsize, (vid->lastline - vid->firstline) << 1); - } - } + if (enable_overscan) { + if (!dev->is_sl2 && vid->composite) + video_blit_memtoscreen(0, (vid->firstline - 4) << 1, + xsize, ((vid->lastline - vid->firstline) + 8) << 1); + else + video_blit_memtoscreen_8(0, (vid->firstline - 4) << 1, + xsize, ((vid->lastline - vid->firstline) + 8) << 1); + } else { + if (!dev->is_sl2 && vid->composite) + video_blit_memtoscreen(8, vid->firstline << 1, + xsize, (vid->lastline - vid->firstline) << 1); + else + video_blit_memtoscreen_8(8, vid->firstline << 1, + xsize, (vid->lastline - vid->firstline) << 1); + } + } - frames++; + frames++; - video_res_x = xsize; - video_res_y = ysize; - if ((vid->array[3] & 0x10) && (vid->mode & 1)) { /*320x200x16*/ - video_res_x /= 2; - video_bpp = 4; - } else if (vid->array[3] & 0x10) { /*160x200x16*/ - video_res_x /= 4; - video_bpp = 4; - } else if (vid->array[3] & 0x08) { /*640x200x4 - this implementation is a complete guess!*/ - video_bpp = 2; - } else if (vid->mode & 1) { - video_res_x /= 8; - video_res_y /= vid->crtc[9] + 1; - video_bpp = 0; - } else if (! (vid->mode & 2)) { - video_res_x /= 16; - video_res_y /= vid->crtc[9] + 1; - video_bpp = 0; - } else if (! (vid->mode & 16)) { - video_res_x /= 2; - video_bpp = 2; - } else { - video_bpp = 1; - } - } - vid->firstline = 1000; - vid->lastline = 0; - vid->blink++; - } - } else { - vid->sc++; - vid->sc &= 31; - vid->ma = vid->maback; - } - if ((vid->sc == (vid->crtc[10] & 31) || ((vid->crtc[8] & 3) == 3 && vid->sc == ((vid->crtc[10] & 31) >> 1)))) - vid->con = 1; + video_res_x = xsize; + video_res_y = ysize; + if ((vid->array[3] & 0x10) && (vid->mode & 1)) { /*320x200x16*/ + video_res_x /= 2; + video_bpp = 4; + } else if (vid->array[3] & 0x10) { /*160x200x16*/ + video_res_x /= 4; + video_bpp = 4; + } else if (vid->array[3] & 0x08) { /*640x200x4 - this implementation is a complete guess!*/ + video_bpp = 2; + } else if (vid->mode & 1) { + video_res_x /= 8; + video_res_y /= vid->crtc[9] + 1; + video_bpp = 0; + } else if (!(vid->mode & 2)) { + video_res_x /= 16; + video_res_y /= vid->crtc[9] + 1; + video_bpp = 0; + } else if (!(vid->mode & 16)) { + video_res_x /= 2; + video_bpp = 2; + } else { + video_bpp = 1; + } + } + vid->firstline = 1000; + vid->lastline = 0; + vid->blink++; + } + } else { + vid->sc++; + vid->sc &= 31; + vid->ma = vid->maback; + } + if ((vid->sc == (vid->crtc[10] & 31) || ((vid->crtc[8] & 3) == 3 && vid->sc == ((vid->crtc[10] & 31) >> 1)))) + vid->con = 1; } } - static void vid_speed_changed(void *priv) { - tandy_t *dev = (tandy_t *)priv; + tandy_t *dev = (tandy_t *) priv; recalc_timings(dev); } - static void vid_close(void *priv) { - tandy_t *dev = (tandy_t *)priv; + tandy_t *dev = (tandy_t *) priv; free(dev->vid); dev->vid = NULL; } - static void vid_init(tandy_t *dev) { - int display_type; + int display_type; t1kvid_t *vid; vid = malloc(sizeof(t1kvid_t)); memset(vid, 0x00, sizeof(t1kvid_t)); vid->memctrl = -1; - dev->vid = vid; + dev->vid = vid; video_inform(VIDEO_FLAG_TYPE_CGA, &timing_dram); - display_type = machine_get_config_int("display_type"); + display_type = machine_get_config_int("display_type"); vid->composite = (display_type != TANDY_RGB); cga_comp_init(1); if (dev->is_sl2) { - vid->b8000_limit = 0x8000; - vid->planar_ctrl = 4; - overscan_x = overscan_y = 16; + vid->b8000_limit = 0x8000; + vid->planar_ctrl = 4; + overscan_x = overscan_y = 16; - io_sethandler(0x0065, 1, vid_in,NULL,NULL, vid_out,NULL,NULL, dev); + io_sethandler(0x0065, 1, vid_in, NULL, NULL, vid_out, NULL, NULL, dev); } else - vid->b8000_mask = 0x3fff; + vid->b8000_mask = 0x3fff; timer_add(&vid->timer, vid_poll, dev, 1); mem_mapping_add(&vid->mapping, 0xb8000, 0x08000, - vid_read,NULL,NULL, vid_write,NULL,NULL, NULL, 0, dev); + vid_read, NULL, NULL, vid_write, NULL, NULL, NULL, 0, dev); io_sethandler(0x03d0, 16, - vid_in,NULL,NULL, vid_out,NULL,NULL, dev); + vid_in, NULL, NULL, vid_out, NULL, NULL, dev); } - const device_config_t vid_config[] = { + // clang-format off { .name = "display_type", .description = "Display type", @@ -1159,339 +1092,330 @@ const device_config_t vid_config[] = { } }, { .name = "", .description = "", .type = CONFIG_END } + // clang-format on }; const device_t vid_device = { - .name = "Tandy 1000", + .name = "Tandy 1000", .internal_name = "tandy1000_video", - .flags = 0, - .local = 0, - .init = NULL, - .close = vid_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = vid_close, + .reset = NULL, { .available = NULL }, .speed_changed = vid_speed_changed, - .force_redraw = NULL, - .config = vid_config + .force_redraw = NULL, + .config = vid_config }; const device_t vid_device_hx = { - .name = "Tandy 1000 HX", + .name = "Tandy 1000 HX", .internal_name = "tandy1000_hx_video", - .flags = 0, - .local = 0, - .init = NULL, - .close = vid_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = vid_close, + .reset = NULL, { .available = NULL }, .speed_changed = vid_speed_changed, - .force_redraw = NULL, - .config = vid_config + .force_redraw = NULL, + .config = vid_config }; const device_t vid_device_sl = { - .name = "Tandy 1000SL2", + .name = "Tandy 1000SL2", .internal_name = "tandy1000_sl_video", - .flags = 0, - .local = 1, - .init = NULL, - .close = vid_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = NULL, + .close = vid_close, + .reset = NULL, { .available = NULL }, .speed_changed = vid_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; static void eep_write(uint16_t addr, uint8_t val, void *priv) { - t1keep_t *eep = (t1keep_t *)priv; + t1keep_t *eep = (t1keep_t *) priv; - if ((val & 4) && !eep->clk) switch (eep->state) { - case EEPROM_IDLE: - switch (eep->count) { - case 0: - if (! (val & 3)) - eep->count = 1; - else - eep->count = 0; - break; + if ((val & 4) && !eep->clk) + switch (eep->state) { + case EEPROM_IDLE: + switch (eep->count) { + case 0: + if (!(val & 3)) + eep->count = 1; + else + eep->count = 0; + break; - case 1: - if ((val & 3) == 2) - eep->count = 2; - else - eep->count = 0; - break; + case 1: + if ((val & 3) == 2) + eep->count = 2; + else + eep->count = 0; + break; - case 2: - if ((val & 3) == 3) - eep->state = EEPROM_GET_OPERATION; - eep->count = 0; - break; - } - break; + case 2: + if ((val & 3) == 3) + eep->state = EEPROM_GET_OPERATION; + eep->count = 0; + break; + } + break; - case EEPROM_GET_OPERATION: - eep->data = (eep->data << 1) | (val & 1); - eep->count++; - if (eep->count == 8) { - eep->count = 0; - eep->addr = eep->data & 0x3f; - switch (eep->data & 0xc0) { - case 0x40: - eep->state = EEPROM_WRITE; - break; + case EEPROM_GET_OPERATION: + eep->data = (eep->data << 1) | (val & 1); + eep->count++; + if (eep->count == 8) { + eep->count = 0; + eep->addr = eep->data & 0x3f; + switch (eep->data & 0xc0) { + case 0x40: + eep->state = EEPROM_WRITE; + break; - case 0x80: - eep->state = EEPROM_READ; - eep->data = eep->store[eep->addr]; - break; + case 0x80: + eep->state = EEPROM_READ; + eep->data = eep->store[eep->addr]; + break; - default: - eep->state = EEPROM_IDLE; - break; - } - } - break; + default: + eep->state = EEPROM_IDLE; + break; + } + } + break; - case EEPROM_READ: - eep_data_out = eep->data & 0x8000; - eep->data <<= 1; - eep->count++; - if (eep->count == 16) { - eep->count = 0; - eep->state = EEPROM_IDLE; - } - break; + case EEPROM_READ: + eep_data_out = eep->data & 0x8000; + eep->data <<= 1; + eep->count++; + if (eep->count == 16) { + eep->count = 0; + eep->state = EEPROM_IDLE; + } + break; - case EEPROM_WRITE: - eep->data = (eep->data << 1) | (val & 1); - eep->count++; - if (eep->count == 16) { - eep->count = 0; - eep->state = EEPROM_IDLE; - eep->store[eep->addr] = eep->data; - } - break; - } + case EEPROM_WRITE: + eep->data = (eep->data << 1) | (val & 1); + eep->count++; + if (eep->count == 16) { + eep->count = 0; + eep->state = EEPROM_IDLE; + eep->store[eep->addr] = eep->data; + } + break; + } eep->clk = val & 4; } - static void * eep_init(const device_t *info) { t1keep_t *eep; - FILE *f = NULL; + FILE *f = NULL; - eep = (t1keep_t *)malloc(sizeof(t1keep_t)); + eep = (t1keep_t *) malloc(sizeof(t1keep_t)); memset(eep, 0x00, sizeof(t1keep_t)); switch (info->local) { - case TYPE_TANDY1000HX: - eep->path = "tandy1000hx.bin"; - break; - - case TYPE_TANDY1000SL2: - eep->path = "tandy1000sl2.bin"; - break; + case TYPE_TANDY1000HX: + eep->path = "tandy1000hx.bin"; + break; + case TYPE_TANDY1000SL2: + eep->path = "tandy1000sl2.bin"; + break; } f = nvr_fopen(eep->path, "rb"); if (f != NULL) { - if (fread(eep->store, 1, 128, f) != 128) - fatal("eep_init(): Error reading Tandy EEPROM\n"); - (void)fclose(f); + if (fread(eep->store, 1, 128, f) != 128) + fatal("eep_init(): Error reading Tandy EEPROM\n"); + (void) fclose(f); } else - memset(eep->store, 0x00, 128); + memset(eep->store, 0x00, 128); - io_sethandler(0x037c, 1, NULL,NULL,NULL, eep_write,NULL,NULL, eep); + io_sethandler(0x037c, 1, NULL, NULL, NULL, eep_write, NULL, NULL, eep); - return(eep); + return (eep); } - static void eep_close(void *priv) { - t1keep_t *eep = (t1keep_t *)priv; - FILE *f = NULL; + t1keep_t *eep = (t1keep_t *) priv; + FILE *f = NULL; f = nvr_fopen(eep->path, "wb"); if (f != NULL) { - (void)fwrite(eep->store, 128, 1, f); - (void)fclose(f); + (void) fwrite(eep->store, 128, 1, f); + (void) fclose(f); } free(eep); } static const device_t eep_1000hx_device = { - .name = "Tandy 1000HX EEPROM", + .name = "Tandy 1000HX EEPROM", .internal_name = "eep_1000hx", - .flags = 0, - .local = TYPE_TANDY1000HX, - .init = eep_init, - .close = eep_close, - .reset = NULL, + .flags = 0, + .local = TYPE_TANDY1000HX, + .init = eep_init, + .close = eep_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; static const device_t eep_1000sl2_device = { - .name = "Tandy 1000SL2 EEPROM", + .name = "Tandy 1000SL2 EEPROM", .internal_name = "eep_1000sl2", - .flags = 0, - .local = TYPE_TANDY1000SL2, - .init = eep_init, - .close = eep_close, - .reset = NULL, + .flags = 0, + .local = TYPE_TANDY1000SL2, + .init = eep_init, + .close = eep_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; static void tandy_write(uint16_t addr, uint8_t val, void *priv) { - tandy_t *dev = (tandy_t *)priv; + tandy_t *dev = (tandy_t *) priv; switch (addr) { - case 0x00a0: - mem_mapping_set_addr(&dev->ram_mapping, - ((val >> 1) & 7) * 128 * 1024, 0x20000); - dev->ram_bank = val; - break; + case 0x00a0: + mem_mapping_set_addr(&dev->ram_mapping, + ((val >> 1) & 7) * 128 * 1024, 0x20000); + dev->ram_bank = val; + break; - case 0xffe8: - if ((val & 0xe) == 0xe) - mem_mapping_disable(&dev->ram_mapping); - else - mem_mapping_set_addr(&dev->ram_mapping, - ((val >> 1) & 7) * 128 * 1024, - 0x20000); - recalc_address_sl(dev); - dev->ram_bank = val; - break; + case 0xffe8: + if ((val & 0xe) == 0xe) + mem_mapping_disable(&dev->ram_mapping); + else + mem_mapping_set_addr(&dev->ram_mapping, + ((val >> 1) & 7) * 128 * 1024, + 0x20000); + recalc_address_sl(dev); + dev->ram_bank = val; + break; - case 0xffea: - dev->rom_bank = val; - dev->rom_offset = ((val ^ 4) & 7) * 0x10000; - mem_mapping_set_exec(&dev->rom_mapping, - &dev->rom[dev->rom_offset]); + case 0xffea: + dev->rom_bank = val; + dev->rom_offset = ((val ^ 4) & 7) * 0x10000; + mem_mapping_set_exec(&dev->rom_mapping, + &dev->rom[dev->rom_offset]); } } - static uint8_t tandy_read(uint16_t addr, void *priv) { - tandy_t *dev = (tandy_t *)priv; - uint8_t ret = 0xff; + tandy_t *dev = (tandy_t *) priv; + uint8_t ret = 0xff; switch (addr) { - case 0x00a0: - ret = dev->ram_bank; - break; + case 0x00a0: + ret = dev->ram_bank; + break; - case 0xffe8: - ret = dev->ram_bank; - break; + case 0xffe8: + ret = dev->ram_bank; + break; - case 0xffea: - ret = (dev->rom_bank ^ 0x10); - break; + case 0xffea: + ret = (dev->rom_bank ^ 0x10); + break; } - return(ret); + return (ret); } - static void write_ram(uint32_t addr, uint8_t val, void *priv) { - tandy_t *dev = (tandy_t *)priv; + tandy_t *dev = (tandy_t *) priv; ram[dev->base + (addr & 0x1ffff)] = val; } - static uint8_t read_ram(uint32_t addr, void *priv) { - tandy_t *dev = (tandy_t *)priv; + tandy_t *dev = (tandy_t *) priv; - return(ram[dev->base + (addr & 0x1ffff)]); + return (ram[dev->base + (addr & 0x1ffff)]); } - static uint8_t read_rom(uint32_t addr, void *priv) { - tandy_t *dev = (tandy_t *)priv; + tandy_t *dev = (tandy_t *) priv; uint32_t addr2 = (addr & 0xffff) + dev->rom_offset; - return(dev->rom[addr2]); + return (dev->rom[addr2]); } - static uint16_t read_romw(uint32_t addr, void *priv) { - tandy_t *dev = (tandy_t *)priv; + tandy_t *dev = (tandy_t *) priv; uint32_t addr2 = (addr & 0xffff) + dev->rom_offset; - return(*(uint16_t *)&dev->rom[addr2]); + return (*(uint16_t *) &dev->rom[addr2]); } - static uint32_t read_roml(uint32_t addr, void *priv) { - tandy_t *dev = (tandy_t *)priv; + tandy_t *dev = (tandy_t *) priv; - return(*(uint32_t *)&dev->rom[addr]); + return (*(uint32_t *) &dev->rom[addr]); } - static void init_rom(tandy_t *dev) { - dev->rom = (uint8_t *)malloc(0x80000); + dev->rom = (uint8_t *) malloc(0x80000); #if 1 - if (! rom_load_interleaved("roms/machines/tandy1000sl2/8079047.hu1", - "roms/machines/tandy1000sl2/8079048.hu2", - 0x000000, 0x80000, 0, dev->rom)) { - tandy_log("TANDY: unable to load BIOS for 1000/SL2 !\n"); - free(dev->rom); - dev->rom = NULL; - return; + if (!rom_load_interleaved("roms/machines/tandy1000sl2/8079047.hu1", + "roms/machines/tandy1000sl2/8079048.hu2", + 0x000000, 0x80000, 0, dev->rom)) { + tandy_log("TANDY: unable to load BIOS for 1000/SL2 !\n"); + free(dev->rom); + dev->rom = NULL; + return; } #else f = rom_fopen("roms/machines/tandy1000sl2/8079047.hu1", "rb"); ff = rom_fopen("roms/machines/tandy1000sl2/8079048.hu2", "rb"); for (c = 0x0000; c < 0x80000; c += 2) { - dev->rom[c] = getc(f); - dev->rom[c + 1] = getc(ff); + dev->rom[c] = getc(f); + dev->rom[c + 1] = getc(ff); } fclose(ff); fclose(f); #endif mem_mapping_add(&dev->rom_mapping, 0xe0000, 0x10000, - read_rom, read_romw, read_roml, NULL, NULL, NULL, - dev->rom, MEM_MAPPING_EXTERNAL, dev); + read_rom, read_romw, read_roml, NULL, NULL, NULL, + dev->rom, MEM_MAPPING_EXTERNAL, dev); } - static void machine_tandy1k_init(const machine_t *model, int type) { @@ -1510,46 +1434,46 @@ machine_tandy1k_init(const machine_t *model, int type) */ dev->base = (mem_size - 128) * 1024; mem_mapping_add(&dev->ram_mapping, 0x80000, 0x20000, - read_ram,NULL,NULL, write_ram,NULL,NULL, NULL, 0, dev); + read_ram, NULL, NULL, write_ram, NULL, NULL, NULL, 0, dev); mem_mapping_set_addr(&ram_low_mapping, 0, dev->base); device_add(&keyboard_tandy_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_xt_tandy_device); + device_add(&fdc_xt_tandy_device); video_reset(gfxcard); - switch(type) { - case TYPE_TANDY: - keyboard_set_table(scancode_tandy); - io_sethandler(0x00a0, 1, - tandy_read,NULL,NULL,tandy_write,NULL,NULL,dev); - vid_init(dev); - device_add_ex(&vid_device, dev); - device_add(&sn76489_device); - break; + switch (type) { + case TYPE_TANDY: + keyboard_set_table(scancode_tandy); + io_sethandler(0x00a0, 1, + tandy_read, NULL, NULL, tandy_write, NULL, NULL, dev); + vid_init(dev); + device_add_ex(&vid_device, dev); + device_add(&sn76489_device); + break; - case TYPE_TANDY1000HX: - keyboard_set_table(scancode_tandy); - io_sethandler(0x00a0, 1, - tandy_read,NULL,NULL,tandy_write,NULL,NULL,dev); - vid_init(dev); - device_add_ex(&vid_device, dev); - device_add(&ncr8496_device); - device_add(&eep_1000hx_device); - break; + case TYPE_TANDY1000HX: + keyboard_set_table(scancode_tandy); + io_sethandler(0x00a0, 1, + tandy_read, NULL, NULL, tandy_write, NULL, NULL, dev); + vid_init(dev); + device_add_ex(&vid_device, dev); + device_add(&ncr8496_device); + device_add(&eep_1000hx_device); + break; - case TYPE_TANDY1000SL2: - dev->is_sl2 = 1; - init_rom(dev); - io_sethandler(0xffe8, 8, - tandy_read,NULL,NULL,tandy_write,NULL,NULL,dev); - vid_init(dev); - device_add_ex(&vid_device_sl, dev); - device_add(&pssj_device); - device_add(&eep_1000sl2_device); - break; + case TYPE_TANDY1000SL2: + dev->is_sl2 = 1; + init_rom(dev); + io_sethandler(0xffe8, 8, + tandy_read, NULL, NULL, tandy_write, NULL, NULL, dev); + vid_init(dev); + device_add_ex(&vid_device_sl, dev); + device_add(&pssj_device); + device_add(&eep_1000sl2_device); + break; } standalone_gameport_type = &gameport_device; @@ -1557,59 +1481,55 @@ machine_tandy1k_init(const machine_t *model, int type) eep_data_out = 0x0000; } - int tandy1k_eeprom_read(void) { - return(eep_data_out); + return (eep_data_out); } - int machine_tandy_init(const machine_t *model) { int ret; ret = bios_load_linearr("roms/machines/tandy/tandy1t1.020", - 0x000f0000, 131072, 0); + 0x000f0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_tandy1k_init(model, TYPE_TANDY); return ret; } - int machine_tandy1000hx_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/tandy1000hx/v020000.u12", - 0x000e0000, 131072, 0); + 0x000e0000, 131072, 0); if (bios_only || !ret) - return ret; + return ret; machine_tandy1k_init(model, TYPE_TANDY1000HX); return ret; } - int machine_tandy1000sl2_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/tandy1000sl2/8079047.hu1", - "roms/machines/tandy1000sl2/8079048.hu2", - 0x000f0000, 65536, 0x18000); + "roms/machines/tandy1000sl2/8079048.hu2", + 0x000f0000, 65536, 0x18000); if (bios_only || !ret) - return ret; + return ret; machine_tandy1k_init(model, TYPE_TANDY1000SL2); diff --git a/src/machine/m_v86p.c b/src/machine/m_v86p.c index 022c9baec..4642d6b80 100644 --- a/src/machine/m_v86p.c +++ b/src/machine/m_v86p.c @@ -50,47 +50,47 @@ int machine_v86p_init(const machine_t *model) { - int ret, rom = 0; + int ret, rom = 0; - ret = bios_load_interleavedr("roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_122089_Even.rom", - "roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_122089_Odd.rom", - 0x000f8000, 65536, 0); + ret = bios_load_interleavedr("roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_122089_Even.rom", + "roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_122089_Odd.rom", + 0x000f8000, 65536, 0); - if (!ret) { - /* Try an older version of the BIOS. */ - rom = 1; - ret = bios_load_interleavedr("roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_090489_Even.rom", - "roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_090489_Odd.rom", - 0x000f8000, 65536, 0); - } + if (!ret) { + /* Try an older version of the BIOS. */ + rom = 1; + ret = bios_load_interleavedr("roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_090489_Even.rom", + "roms/machines/v86p/INTEL8086AWD_BIOS_S3.1_V86P_090489_Odd.rom", + 0x000f8000, 65536, 0); + } - if (!ret) { - /* Try JVERNET's BIOS. */ - rom = 2; - ret = bios_load_linear("roms/machines/v86p/V86P.ROM", - 0x000f0000, 65536, 0); - } + if (!ret) { + /* Try JVERNET's BIOS. */ + rom = 2; + ret = bios_load_linear("roms/machines/v86p/V86P.ROM", + 0x000f0000, 65536, 0); + } - if (bios_only || !ret) - return ret; + if (bios_only || !ret) + return ret; - if (rom == 2) - loadfont("roms/machines/v86p/V86P.FON", 8); - else - loadfont("roms/machines/v86p/v86pfont.rom", 8); + if (rom == 2) + loadfont("roms/machines/v86p/V86P.FON", 8); + else + loadfont("roms/machines/v86p/v86pfont.rom", 8); - machine_common_init(model); + machine_common_init(model); - device_add(&ct_82c100_device); - device_add(&f82c606_device); + device_add(&ct_82c100_device); + device_add(&f82c606_device); - device_add(&keyboard_xt_device); + device_add(&keyboard_xt_device); - if (fdc_type == FDC_INTERNAL) - device_add(&fdc_xt_device); + if (fdc_type == FDC_INTERNAL) + device_add(&fdc_xt_device); - if (gfxcard == VID_INTERNAL) - device_add(&f82c425_video_device); + if (gfxcard == VID_INTERNAL) + device_add(&f82c425_video_device); - return ret; + return ret; } diff --git a/src/machine/m_xt.c b/src/machine/m_xt.c index 5b31920c5..cd9a78df6 100644 --- a/src/machine/m_xt.c +++ b/src/machine/m_xt.c @@ -27,33 +27,32 @@ machine_xt_common_init(const machine_t *model) pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_xt_device); + device_add(&fdc_xt_device); nmi_init(); standalone_gameport_type = &gameport_device; } - int machine_pc_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ibmpc/BIOS_5150_24APR81_U33.BIN", - 0x000fe000, 40960, 0); + 0x000fe000, 40960, 0); if (ret) { - bios_load_aux_linear("roms/machines/ibmpc/IBM 5150 - Cassette BASIC version C1.00 - U29 - 5700019.bin", - 0x000f6000, 8192, 0); - bios_load_aux_linear("roms/machines/ibmpc/IBM 5150 - Cassette BASIC version C1.00 - U30 - 5700027.bin", - 0x000f8000, 8192, 0); - bios_load_aux_linear("roms/machines/ibmpc/IBM 5150 - Cassette BASIC version C1.00 - U31 - 5700035.bin", - 0x000fa000, 8192, 0); - bios_load_aux_linear("roms/machines/ibmpc/IBM 5150 - Cassette BASIC version C1.00 - U32 - 5700043.bin", - 0x000fc000, 8192, 0); + bios_load_aux_linear("roms/machines/ibmpc/IBM 5150 - Cassette BASIC version C1.00 - U29 - 5700019.bin", + 0x000f6000, 8192, 0); + bios_load_aux_linear("roms/machines/ibmpc/IBM 5150 - Cassette BASIC version C1.00 - U30 - 5700027.bin", + 0x000f8000, 8192, 0); + bios_load_aux_linear("roms/machines/ibmpc/IBM 5150 - Cassette BASIC version C1.00 - U31 - 5700035.bin", + 0x000fa000, 8192, 0); + bios_load_aux_linear("roms/machines/ibmpc/IBM 5150 - Cassette BASIC version C1.00 - U32 - 5700043.bin", + 0x000fc000, 8192, 0); } if (bios_only || !ret) - return ret; + return ret; device_add(&keyboard_pc_device); @@ -62,31 +61,30 @@ machine_pc_init(const machine_t *model) return ret; } - int machine_pc82_init(const machine_t *model) { int ret, ret2; ret = bios_load_linear("roms/machines/ibmpc82/pc102782.bin", - 0x000fe000, 40960, 0); + 0x000fe000, 40960, 0); if (ret) { - ret2 = bios_load_aux_linear("roms/machines/ibmpc82/ibm-basic-1.10.rom", - 0x000f6000, 32768, 0); - if (!ret2) { - bios_load_aux_linear("roms/machines/ibmpc82/basicc11.f6", - 0x000f6000, 8192, 0); - bios_load_aux_linear("roms/machines/ibmpc82/basicc11.f8", - 0x000f8000, 8192, 0); - bios_load_aux_linear("roms/machines/ibmpc82/basicc11.fa", - 0x000fa000, 8192, 0); - bios_load_aux_linear("roms/machines/ibmpc82/basicc11.fc", - 0x000fc000, 8192, 0); - } + ret2 = bios_load_aux_linear("roms/machines/ibmpc82/ibm-basic-1.10.rom", + 0x000f6000, 32768, 0); + if (!ret2) { + bios_load_aux_linear("roms/machines/ibmpc82/basicc11.f6", + 0x000f6000, 8192, 0); + bios_load_aux_linear("roms/machines/ibmpc82/basicc11.f8", + 0x000f8000, 8192, 0); + bios_load_aux_linear("roms/machines/ibmpc82/basicc11.fa", + 0x000fa000, 8192, 0); + bios_load_aux_linear("roms/machines/ibmpc82/basicc11.fc", + 0x000fc000, 8192, 0); + } } if (bios_only || !ret) - return ret; + return ret; device_add(&keyboard_pc82_device); device_add(&ibm_5161_device); @@ -96,7 +94,6 @@ machine_pc82_init(const machine_t *model) return ret; } - static void machine_xt_init_ex(const machine_t *model) { @@ -105,27 +102,26 @@ machine_xt_init_ex(const machine_t *model) machine_xt_common_init(model); } - int machine_xt_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/ibmxt/xt.rom", - 0x000f0000, 65536, 0); + 0x000f0000, 65536, 0); if (!ret) { - ret = bios_load_linear("roms/machines/ibmxt/1501512.u18", - 0x000fe000, 65536, 0x6000); - if (ret) { - bios_load_aux_linear("roms/machines/ibmxt/1501512.u18", - 0x000f8000, 24576, 0); - bios_load_aux_linear("roms/machines/ibmxt/5000027.u19", - 0x000f0000, 32768, 0); - } + ret = bios_load_linear("roms/machines/ibmxt/1501512.u18", + 0x000fe000, 65536, 0x6000); + if (ret) { + bios_load_aux_linear("roms/machines/ibmxt/1501512.u18", + 0x000f8000, 24576, 0); + bios_load_aux_linear("roms/machines/ibmxt/5000027.u19", + 0x000f0000, 32768, 0); + } } if (bios_only || !ret) - return ret; + return ret; machine_xt_init_ex(model); @@ -134,17 +130,16 @@ machine_xt_init(const machine_t *model) return ret; } - int machine_genxt_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/genxt/pcxt.rom", - 0x000fe000, 8192, 0); + 0x000fe000, 8192, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_init_ex(model); @@ -157,16 +152,16 @@ machine_xt86_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/ibmxt86/BIOS_5160_09MAY86_U18_59X7268_62X0890_27256_F800.BIN", - 0x000fe000, 65536, 0x6000); + 0x000fe000, 65536, 0x6000); if (ret) { - (void) bios_load_aux_linear("roms/machines/ibmxt86/BIOS_5160_09MAY86_U18_59X7268_62X0890_27256_F800.BIN", - 0x000f8000, 24576, 0); - (void) bios_load_aux_linear("roms/machines/ibmxt86/BIOS_5160_09MAY86_U19_62X0819_68X4370_27256_F000.BIN", - 0x000f0000, 32768, 0); + (void) bios_load_aux_linear("roms/machines/ibmxt86/BIOS_5160_09MAY86_U18_59X7268_62X0890_27256_F800.BIN", + 0x000f8000, 24576, 0); + (void) bios_load_aux_linear("roms/machines/ibmxt86/BIOS_5160_09MAY86_U19_62X0819_68X4370_27256_F000.BIN", + 0x000f0000, 32768, 0); } if (bios_only || !ret) - return ret; + return ret; device_add(&keyboard_xt86_device); device_add(&ibm_5161_device); @@ -176,7 +171,6 @@ machine_xt86_init(const machine_t *model) return ret; } - static void machine_xt_clone_init(const machine_t *model) { @@ -191,10 +185,10 @@ machine_xt_americxt_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/americxt/AMERICXT.ROM", - 0x000fe000, 8192, 0); + 0x000fe000, 8192, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); @@ -207,10 +201,10 @@ machine_xt_amixt_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/amixt/ami_8088_bios_31jan89.bin", - 0x000fe000, 8192, 0); + 0x000fe000, 8192, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); @@ -223,151 +217,143 @@ machine_xt_znic_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/znic/ibmzen.rom", - 0x000fe000, 8192, 0); + 0x000fe000, 8192, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); return ret; } - int machine_xt_dtk_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/dtk/dtk_erso_2.42_2764.bin", - 0x000fe000, 8192, 0); + 0x000fe000, 8192, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); return ret; } - int machine_xt_jukopc_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/jukopc/000o001.bin", - 0x000fe000, 8192, 0); + 0x000fe000, 8192, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); return ret; } - int machine_xt_openxt_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/openxt/pcxt31.bin", - 0x000fe000, 8192, 0); + 0x000fe000, 8192, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); return ret; } - int machine_xt_pcxt_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/pcxt/u18.rom", - 0x000f8000, 65536, 0); + 0x000f8000, 65536, 0); if (ret) { - bios_load_aux_linear("roms/machines/pcxt/u19.rom", - 0x000f0000, 32768, 0); + bios_load_aux_linear("roms/machines/pcxt/u19.rom", + 0x000f0000, 32768, 0); } if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); return ret; } - int machine_xt_pxxt_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/pxxt/000p001.bin", - 0x000fe000, 8192, 0); + 0x000fe000, 8192, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); return ret; } - int machine_xt_iskra3104_init(const machine_t *model) { int ret; ret = bios_load_interleaved("roms/machines/iskra3104/198.bin", - "roms/machines/iskra3104/199.bin", - 0x000fc000, 16384, 0); + "roms/machines/iskra3104/199.bin", + 0x000fc000, 16384, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); return ret; } - int machine_xt_pc4i_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/pc4i/NCR_PC4i_BIOSROM_1985.BIN", - 0x000fc000, 16384, 0); + 0x000fc000, 16384, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); return ret; } - int machine_xt_mpc1600_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/mpc1600/mpc4.34_merged.bin", - 0x000fc000, 16384, 0); + 0x000fc000, 16384, 0); if (bios_only || !ret) - return ret; + return ret; device_add(&keyboard_pc82_device); @@ -376,22 +362,21 @@ machine_xt_mpc1600_init(const machine_t *model) return ret; } - int machine_xt_pcspirit_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/pcspirit/u1101.bin", - 0x000fe000, 16384, 0); + 0x000fe000, 16384, 0); if (ret) { - bios_load_aux_linear("roms/machines/pcspirit/u1103.bin", - 0x000fc000, 8192, 0); + bios_load_aux_linear("roms/machines/pcspirit/u1103.bin", + 0x000fc000, 8192, 0); } if (bios_only || !ret) - return ret; + return ret; device_add(&keyboard_pc82_device); @@ -400,17 +385,16 @@ machine_xt_pcspirit_init(const machine_t *model) return ret; } - int machine_xt_pc700_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/pc700/multitech pc-700 3.1.bin", - 0x000fe000, 8192, 0); + 0x000fe000, 8192, 0); if (bios_only || !ret) - return ret; + return ret; device_add(&keyboard_pc_device); @@ -419,17 +403,16 @@ machine_xt_pc700_init(const machine_t *model) return ret; } - int -machine_xt_pc500_init(const machine_t* model) +machine_xt_pc500_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/pc500/rom404.bin", - 0x000f8000, 32768, 0); + 0x000f8000, 32768, 0); if (bios_only || !ret) - return ret; + return ret; device_add(&keyboard_pc_device); @@ -444,10 +427,10 @@ machine_xt_vendex_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/vendex/Vendex Turbo 888 XT - ROM BIOS - VER 2.03C.bin", - 0x000fc000, 16384, 0); + 0x000fc000, 16384, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); @@ -460,15 +443,15 @@ machine_xt_super16t_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/super16t/Hyundai SUPER-16T - System BIOS HEA v1.12Ta (16k)(MBM27128)(1986).BIN", - 0x000fc000, 16384, 0); + 0x000fc000, 16384, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); /* On-board FDC cannot be disabled */ - device_add(&fdc_xt_device); + device_add(&fdc_xt_device); return ret; } @@ -479,15 +462,15 @@ machine_xt_super16te_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/super16te/Hyundai SUPER-16TE - System BIOS v2.00Id (16k)(D27128A)(1989).BIN", - 0x000fc000, 16384, 0); + 0x000fc000, 16384, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); /* On-board FDC cannot be disabled */ - device_add(&fdc_xt_device); + device_add(&fdc_xt_device); return ret; } @@ -498,15 +481,15 @@ machine_xt_top88_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/top88/Hyosung Topstar 88T - BIOS version 3.0.bin", - 0x000fc000, 16384, 0); + 0x000fc000, 16384, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); /* On-board FDC cannot be disabled */ - device_add(&fdc_xt_device); + device_add(&fdc_xt_device); return ret; } @@ -517,10 +500,10 @@ machine_xt_kaypropc_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/kaypropc/Kaypro_v2.03K.bin", - 0x000fe000, 8192, 0); + 0x000fe000, 8192, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); @@ -533,15 +516,15 @@ machine_xt_sansx16_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/sansx16/tmm27128ad.bin.bin", - 0x000fc000, 16384, 0); + 0x000fc000, 16384, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); /* On-board FDC cannot be disabled */ - device_add(&fdc_xt_device); + device_add(&fdc_xt_device); return ret; } @@ -552,10 +535,10 @@ machine_xt_bw230_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/bw230/bondwell.bin", - 0x000fe000, 8192, 0); + 0x000fe000, 8192, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_clone_init(model); diff --git a/src/machine/m_xt_compaq.c b/src/machine/m_xt_compaq.c index a705f0e2b..d66c15eaf 100644 --- a/src/machine/m_xt_compaq.c +++ b/src/machine/m_xt_compaq.c @@ -43,10 +43,10 @@ machine_xt_compaq_deskpro_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/deskpro/Compaq - BIOS - Revision J - 106265-002.bin", - 0x000fe000, 8192, 0); + 0x000fe000, 8192, 0); if (bios_only || !ret) - return ret; + return ret; machine_common_init(model); @@ -54,7 +54,7 @@ machine_xt_compaq_deskpro_init(const machine_t *model) device_add(&keyboard_xt_compaq_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_xt_device); + device_add(&fdc_xt_device); nmi_init(); standalone_gameport_type = &gameport_device; @@ -64,17 +64,16 @@ machine_xt_compaq_deskpro_init(const machine_t *model) return ret; } - int machine_xt_compaq_portable_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/portable/compaq portable plus 100666-001 rev c u47.bin", - 0x000fe000, 8192, 0); + 0x000fe000, 8192, 0); if (bios_only || !ret) - return ret; + return ret; machine_common_init(model); @@ -82,10 +81,10 @@ machine_xt_compaq_portable_init(const machine_t *model) device_add(&keyboard_xt_compaq_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_xt_device); + device_add(&fdc_xt_device); nmi_init(); if (joystick_type) - device_add(&gameport_device); + device_add(&gameport_device); lpt1_remove(); lpt1_init(LPT_MDA_ADDR); diff --git a/src/machine/m_xt_laserxt.c b/src/machine/m_xt_laserxt.c index 21681a5c2..02635ee8b 100644 --- a/src/machine/m_xt_laserxt.c +++ b/src/machine/m_xt_laserxt.c @@ -20,150 +20,150 @@ #include <86box/gameport.h> #include <86box/keyboard.h> - -static int laserxt_emspage[4]; -static int laserxt_emscontrol[4]; +static int laserxt_emspage[4]; +static int laserxt_emscontrol[4]; static mem_mapping_t laserxt_ems_mapping[4]; -static int laserxt_ems_baseaddr_index = 0; -static int laserxt_is_lxt3 = 0; +static int laserxt_ems_baseaddr_index = 0; +static int laserxt_is_lxt3 = 0; - -static uint32_t get_laserxt_ems_addr(uint32_t addr) +static uint32_t +get_laserxt_ems_addr(uint32_t addr) { - if(laserxt_emspage[(addr >> 14) & 3] & 0x80) - { - addr = (!laserxt_is_lxt3 ? 0x70000 + (((mem_size + 64) & 255) << 10) : 0x30000 + (((mem_size + 320) & 511) << 10)) + ((laserxt_emspage[(addr >> 14) & 3] & 0x0F) << 14) + ((laserxt_emspage[(addr >> 14) & 3] & 0x40) << 12) + (addr & 0x3FFF); - } + if (laserxt_emspage[(addr >> 14) & 3] & 0x80) { + addr = (!laserxt_is_lxt3 ? 0x70000 + (((mem_size + 64) & 255) << 10) : 0x30000 + (((mem_size + 320) & 511) << 10)) + ((laserxt_emspage[(addr >> 14) & 3] & 0x0F) << 14) + ((laserxt_emspage[(addr >> 14) & 3] & 0x40) << 12) + (addr & 0x3FFF); + } - return addr; + return addr; } - -static void laserxt_write(uint16_t port, uint8_t val, void *priv) +static void +laserxt_write(uint16_t port, uint8_t val, void *priv) { - int i; - uint32_t paddr, vaddr; - switch (port) - { - case 0x0208: case 0x4208: case 0x8208: case 0xC208: - laserxt_emspage[port >> 14] = val; - paddr = 0xC0000 + (port & 0xC000) + (((laserxt_ems_baseaddr_index + (4 - (port >> 14))) & 0x0C) << 14); - if(val & 0x80) - { - mem_mapping_enable(&laserxt_ems_mapping[port >> 14]); - vaddr = get_laserxt_ems_addr(paddr); - mem_mapping_set_exec(&laserxt_ems_mapping[port >> 14], ram + vaddr); - } - else - { - mem_mapping_disable(&laserxt_ems_mapping[port >> 14]); - } - flushmmucache(); - break; - case 0x0209: case 0x4209: case 0x8209: case 0xC209: - laserxt_emscontrol[port >> 14] = val; - laserxt_ems_baseaddr_index = 0; - for(i=0; i<4; i++) - { - laserxt_ems_baseaddr_index |= (laserxt_emscontrol[i] & 0x80) >> (7 - i); - } + int i; + uint32_t paddr, vaddr; + switch (port) { + case 0x0208: + case 0x4208: + case 0x8208: + case 0xC208: + laserxt_emspage[port >> 14] = val; + paddr = 0xC0000 + (port & 0xC000) + (((laserxt_ems_baseaddr_index + (4 - (port >> 14))) & 0x0C) << 14); + if (val & 0x80) { + mem_mapping_enable(&laserxt_ems_mapping[port >> 14]); + vaddr = get_laserxt_ems_addr(paddr); + mem_mapping_set_exec(&laserxt_ems_mapping[port >> 14], ram + vaddr); + } else { + mem_mapping_disable(&laserxt_ems_mapping[port >> 14]); + } + flushmmucache(); + break; + case 0x0209: + case 0x4209: + case 0x8209: + case 0xC209: + laserxt_emscontrol[port >> 14] = val; + laserxt_ems_baseaddr_index = 0; + for (i = 0; i < 4; i++) { + laserxt_ems_baseaddr_index |= (laserxt_emscontrol[i] & 0x80) >> (7 - i); + } - mem_mapping_set_addr(&laserxt_ems_mapping[0], 0xC0000 + (((laserxt_ems_baseaddr_index + 4) & 0x0C) << 14), 0x4000); - mem_mapping_set_addr(&laserxt_ems_mapping[1], 0xC4000 + (((laserxt_ems_baseaddr_index + 3) & 0x0C) << 14), 0x4000); - mem_mapping_set_addr(&laserxt_ems_mapping[2], 0xC8000 + (((laserxt_ems_baseaddr_index + 2) & 0x0C) << 14), 0x4000); - mem_mapping_set_addr(&laserxt_ems_mapping[3], 0xCC000 + (((laserxt_ems_baseaddr_index + 1) & 0x0C) << 14), 0x4000); - flushmmucache(); - break; - } + mem_mapping_set_addr(&laserxt_ems_mapping[0], 0xC0000 + (((laserxt_ems_baseaddr_index + 4) & 0x0C) << 14), 0x4000); + mem_mapping_set_addr(&laserxt_ems_mapping[1], 0xC4000 + (((laserxt_ems_baseaddr_index + 3) & 0x0C) << 14), 0x4000); + mem_mapping_set_addr(&laserxt_ems_mapping[2], 0xC8000 + (((laserxt_ems_baseaddr_index + 2) & 0x0C) << 14), 0x4000); + mem_mapping_set_addr(&laserxt_ems_mapping[3], 0xCC000 + (((laserxt_ems_baseaddr_index + 1) & 0x0C) << 14), 0x4000); + flushmmucache(); + break; + } } - -static uint8_t laserxt_read(uint16_t port, void *priv) +static uint8_t +laserxt_read(uint16_t port, void *priv) { - switch (port) - { - case 0x0208: case 0x4208: case 0x8208: case 0xC208: - return laserxt_emspage[port >> 14]; - case 0x0209: case 0x4209: case 0x8209: case 0xC209: - return laserxt_emscontrol[port >> 14]; - break; - } - return 0xff; + switch (port) { + case 0x0208: + case 0x4208: + case 0x8208: + case 0xC208: + return laserxt_emspage[port >> 14]; + case 0x0209: + case 0x4209: + case 0x8209: + case 0xC209: + return laserxt_emscontrol[port >> 14]; + break; + } + return 0xff; } - -static void mem_write_laserxtems(uint32_t addr, uint8_t val, void *priv) +static void +mem_write_laserxtems(uint32_t addr, uint8_t val, void *priv) { - addr = get_laserxt_ems_addr(addr); - if (addr < (mem_size << 10)) - ram[addr] = val; + addr = get_laserxt_ems_addr(addr); + if (addr < (mem_size << 10)) + ram[addr] = val; } - -static uint8_t mem_read_laserxtems(uint32_t addr, void *priv) +static uint8_t +mem_read_laserxtems(uint32_t addr, void *priv) { - uint8_t val = 0xFF; - addr = get_laserxt_ems_addr(addr); - if (addr < (mem_size << 10)) - val = ram[addr]; - return val; + uint8_t val = 0xFF; + addr = get_laserxt_ems_addr(addr); + if (addr < (mem_size << 10)) + val = ram[addr]; + return val; } - -static void laserxt_init(int is_lxt3) +static void +laserxt_init(int is_lxt3) { - int i; + int i; - if(mem_size > 640) - { - io_sethandler(0x0208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL); - io_sethandler(0x4208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL); - io_sethandler(0x8208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL); - io_sethandler(0xc208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL); - mem_mapping_set_addr(&ram_low_mapping, 0, !is_lxt3 ? 0x70000 + (((mem_size + 64) & 255) << 10) : 0x30000 + (((mem_size + 320) & 511) << 10)); - } + if (mem_size > 640) { + io_sethandler(0x0208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL); + io_sethandler(0x4208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL); + io_sethandler(0x8208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL); + io_sethandler(0xc208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL); + mem_mapping_set_addr(&ram_low_mapping, 0, !is_lxt3 ? 0x70000 + (((mem_size + 64) & 255) << 10) : 0x30000 + (((mem_size + 320) & 511) << 10)); + } - for (i = 0; i < 4; i++) - { - laserxt_emspage[i] = 0x7F; - laserxt_emscontrol[i] = (i == 3) ? 0x00 : 0x80; - mem_mapping_add(&laserxt_ems_mapping[i], 0xE0000 + (i << 14), 0x4000, mem_read_laserxtems, NULL, NULL, mem_write_laserxtems, NULL, NULL, ram + 0xA0000 + (i << 14), 0, NULL); - mem_mapping_disable(&laserxt_ems_mapping[i]); - } - mem_set_mem_state(0x0c0000, 0x40000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - laserxt_is_lxt3 = is_lxt3; + for (i = 0; i < 4; i++) { + laserxt_emspage[i] = 0x7F; + laserxt_emscontrol[i] = (i == 3) ? 0x00 : 0x80; + mem_mapping_add(&laserxt_ems_mapping[i], 0xE0000 + (i << 14), 0x4000, mem_read_laserxtems, NULL, NULL, mem_write_laserxtems, NULL, NULL, ram + 0xA0000 + (i << 14), 0, NULL); + mem_mapping_disable(&laserxt_ems_mapping[i]); + } + mem_set_mem_state(0x0c0000, 0x40000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + laserxt_is_lxt3 = is_lxt3; } - int machine_xt_laserxt_init(const machine_t *model) { - int ret; + int ret; - ret = bios_load_linear("roms/machines/ltxt/27c64.bin", - 0x000fe000, 8192, 0); + ret = bios_load_linear("roms/machines/ltxt/27c64.bin", + 0x000fe000, 8192, 0); - if (bios_only || !ret) - return ret; + if (bios_only || !ret) + return ret; - machine_xt_init(model); + machine_xt_init(model); - laserxt_init(0); + laserxt_init(0); - return ret; + return ret; } - int machine_xt_lxt3_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/lxt3/27c64d.bin", - 0x000fe000, 8192, 0); + 0x000fe000, 8192, 0); if (bios_only || !ret) - return ret; + return ret; machine_common_init(model); @@ -172,7 +172,7 @@ machine_xt_lxt3_init(const machine_t *model) device_add(&keyboard_xt_lxt3_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_xt_device); + device_add(&fdc_xt_device); nmi_init(); standalone_gameport_type = &gameport_device; diff --git a/src/machine/m_xt_olivetti.c b/src/machine/m_xt_olivetti.c index 62fcda138..1d53a588e 100644 --- a/src/machine/m_xt_olivetti.c +++ b/src/machine/m_xt_olivetti.c @@ -54,122 +54,116 @@ #include <86box/vid_colorplus.h> #include <86box/vid_cga_comp.h> -#define STAT_PARITY 0x80 -#define STAT_RTIMEOUT 0x40 -#define STAT_TTIMEOUT 0x20 -#define STAT_LOCK 0x10 -#define STAT_CD 0x08 -#define STAT_SYSFLAG 0x04 -#define STAT_IFULL 0x02 -#define STAT_OFULL 0x01 +#define STAT_PARITY 0x80 +#define STAT_RTIMEOUT 0x40 +#define STAT_TTIMEOUT 0x20 +#define STAT_LOCK 0x10 +#define STAT_CD 0x08 +#define STAT_SYSFLAG 0x04 +#define STAT_IFULL 0x02 +#define STAT_OFULL 0x01 -#define PLANTRONICS_MODE 1 +#define PLANTRONICS_MODE 1 #define OLIVETTI_OGC_MODE 0 -#define CGA_RGB 0 -#define CGA_COMPOSITE 1 +#define CGA_RGB 0 +#define CGA_COMPOSITE 1 typedef struct { /* Keyboard stuff. */ - int wantirq; - uint8_t command; - uint8_t status; - uint8_t out; - uint8_t output_port; - int param, - param_total; - uint8_t params[16]; - uint8_t scan[7]; + int wantirq; + uint8_t command; + uint8_t status; + uint8_t out; + uint8_t output_port; + int param, + param_total; + uint8_t params[16]; + uint8_t scan[7]; /* Mouse stuff. */ - int mouse_mode; - int x, y, b; - pc_timer_t send_delay_timer; + int mouse_mode; + int x, y, b; + pc_timer_t send_delay_timer; } m24_kbd_t; typedef struct { - ogc_t ogc; - colorplus_t colorplus; - int mode; + ogc_t ogc; + colorplus_t colorplus; + int mode; } m19_vid_t; -static uint8_t key_queue[16]; -static int key_queue_start = 0, - key_queue_end = 0; +static uint8_t key_queue[16]; +static int key_queue_start = 0, + key_queue_end = 0; -video_timings_t timing_m19_vid = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; - -const device_t m19_vid_device; +video_timings_t timing_m19_vid = { VIDEO_ISA, 8, 16, 32, 8, 16, 32 }; +const device_t m19_vid_device; #ifdef ENABLE_M24VID_LOG int m24vid_do_log = ENABLE_M24VID_LOG; - static void m24_log(const char *fmt, ...) { va_list ap; if (m24vid_do_log) { - va_start(ap, fmt); - vfprintf(stdlog, fmt, ap); - va_end(ap); - fflush(stdlog); + va_start(ap, fmt); + vfprintf(stdlog, fmt, ap); + va_end(ap); + fflush(stdlog); } } #else -#define m24_log(fmt, ...) +# define m24_log(fmt, ...) #endif - static void m24_kbd_poll(void *priv) { - m24_kbd_t *m24_kbd = (m24_kbd_t *)priv; + m24_kbd_t *m24_kbd = (m24_kbd_t *) priv; timer_advance_u64(&m24_kbd->send_delay_timer, 1000 * TIMER_USEC); if (m24_kbd->wantirq) { - m24_kbd->wantirq = 0; - picint(2); + m24_kbd->wantirq = 0; + picint(2); #if ENABLE_KEYBOARD_LOG - m24_log("M24: take IRQ\n"); + m24_log("M24: take IRQ\n"); #endif } if (!(m24_kbd->status & STAT_OFULL) && key_queue_start != key_queue_end) { #if ENABLE_KEYBOARD_LOG - m24_log("Reading %02X from the key queue at %i\n", - m24_kbd->out, key_queue_start); + m24_log("Reading %02X from the key queue at %i\n", + m24_kbd->out, key_queue_start); #endif - m24_kbd->out = key_queue[key_queue_start]; - key_queue_start = (key_queue_start + 1) & 0xf; - m24_kbd->status |= STAT_OFULL; - m24_kbd->status &= ~STAT_IFULL; - m24_kbd->wantirq = 1; + m24_kbd->out = key_queue[key_queue_start]; + key_queue_start = (key_queue_start + 1) & 0xf; + m24_kbd->status |= STAT_OFULL; + m24_kbd->status &= ~STAT_IFULL; + m24_kbd->wantirq = 1; } } - static void m24_kbd_adddata(uint16_t val) { key_queue[key_queue_end] = val; - key_queue_end = (key_queue_end + 1) & 0xf; + key_queue_end = (key_queue_end + 1) & 0xf; } - static void m24_kbd_adddata_ex(uint16_t val) { kbd_adddata_process(val, m24_kbd_adddata); } - static void m24_kbd_write(uint16_t port, uint8_t val, void *priv) { - m24_kbd_t *m24_kbd = (m24_kbd_t *)priv; + m24_kbd_t *m24_kbd = (m24_kbd_t *) priv; #if ENABLE_KEYBOARD_LOG m24_log("M24: write %04X %02X\n", port, val); @@ -180,115 +174,113 @@ m24_kbd_write(uint16_t port, uint8_t val, void *priv) output = 3; #endif switch (port) { - case 0x60: - if (m24_kbd->param != m24_kbd->param_total) { - m24_kbd->params[m24_kbd->param++] = val; - if (m24_kbd->param == m24_kbd->param_total) { - switch (m24_kbd->command) { - case 0x11: - m24_kbd->mouse_mode = 0; - m24_kbd->scan[0] = m24_kbd->params[0]; - m24_kbd->scan[1] = m24_kbd->params[1]; - m24_kbd->scan[2] = m24_kbd->params[2]; - m24_kbd->scan[3] = m24_kbd->params[3]; - m24_kbd->scan[4] = m24_kbd->params[4]; - m24_kbd->scan[5] = m24_kbd->params[5]; - m24_kbd->scan[6] = m24_kbd->params[6]; - break; + case 0x60: + if (m24_kbd->param != m24_kbd->param_total) { + m24_kbd->params[m24_kbd->param++] = val; + if (m24_kbd->param == m24_kbd->param_total) { + switch (m24_kbd->command) { + case 0x11: + m24_kbd->mouse_mode = 0; + m24_kbd->scan[0] = m24_kbd->params[0]; + m24_kbd->scan[1] = m24_kbd->params[1]; + m24_kbd->scan[2] = m24_kbd->params[2]; + m24_kbd->scan[3] = m24_kbd->params[3]; + m24_kbd->scan[4] = m24_kbd->params[4]; + m24_kbd->scan[5] = m24_kbd->params[5]; + m24_kbd->scan[6] = m24_kbd->params[6]; + break; - case 0x12: - m24_kbd->mouse_mode = 1; - m24_kbd->scan[0] = m24_kbd->params[0]; - m24_kbd->scan[1] = m24_kbd->params[1]; - m24_kbd->scan[2] = m24_kbd->params[2]; - break; + case 0x12: + m24_kbd->mouse_mode = 1; + m24_kbd->scan[0] = m24_kbd->params[0]; + m24_kbd->scan[1] = m24_kbd->params[1]; + m24_kbd->scan[2] = m24_kbd->params[2]; + break; - default: - m24_log("M24: bad keyboard command complete %02X\n", m24_kbd->command); - } - } - } else { - m24_kbd->command = val; - switch (val) { - case 0x01: /*Self-test*/ - break; + default: + m24_log("M24: bad keyboard command complete %02X\n", m24_kbd->command); + } + } + } else { + m24_kbd->command = val; + switch (val) { + case 0x01: /*Self-test*/ + break; - case 0x05: /*Read ID*/ - m24_kbd_adddata(0x00); - break; + case 0x05: /*Read ID*/ + m24_kbd_adddata(0x00); + break; - case 0x11: - m24_kbd->param = 0; - m24_kbd->param_total = 9; - break; + case 0x11: + m24_kbd->param = 0; + m24_kbd->param_total = 9; + break; - case 0x12: - m24_kbd->param = 0; - m24_kbd->param_total = 4; - break; + case 0x12: + m24_kbd->param = 0; + m24_kbd->param_total = 4; + break; - default: - m24_log("M24: bad keyboard command %02X\n", val); - } - } - break; + default: + m24_log("M24: bad keyboard command %02X\n", val); + } + } + break; - case 0x61: - ppi.pb = val; + case 0x61: + ppi.pb = val; - speaker_update(); - speaker_gated = val & 1; - speaker_enable = val & 2; - if (speaker_enable) - was_speaker_enable = 1; - pit_devs[0].set_gate(pit_devs[0].data, 2, val & 1); - break; + speaker_update(); + speaker_gated = val & 1; + speaker_enable = val & 2; + if (speaker_enable) + was_speaker_enable = 1; + pit_devs[0].set_gate(pit_devs[0].data, 2, val & 1); + break; } } - static uint8_t m24_kbd_read(uint16_t port, void *priv) { - m24_kbd_t *m24_kbd = (m24_kbd_t *)priv; - uint8_t ret = 0xff; + m24_kbd_t *m24_kbd = (m24_kbd_t *) priv; + uint8_t ret = 0xff; switch (port) { - case 0x60: - ret = m24_kbd->out; - if (key_queue_start == key_queue_end) { - m24_kbd->status &= ~STAT_OFULL; - m24_kbd->wantirq = 0; - } else { - m24_kbd->out = key_queue[key_queue_start]; - key_queue_start = (key_queue_start + 1) & 0xf; - m24_kbd->status |= STAT_OFULL; - m24_kbd->status &= ~STAT_IFULL; - m24_kbd->wantirq = 1; - } - break; + case 0x60: + ret = m24_kbd->out; + if (key_queue_start == key_queue_end) { + m24_kbd->status &= ~STAT_OFULL; + m24_kbd->wantirq = 0; + } else { + m24_kbd->out = key_queue[key_queue_start]; + key_queue_start = (key_queue_start + 1) & 0xf; + m24_kbd->status |= STAT_OFULL; + m24_kbd->status &= ~STAT_IFULL; + m24_kbd->wantirq = 1; + } + break; - case 0x61: - ret = ppi.pb; - break; + case 0x61: + ret = ppi.pb; + break; - case 0x64: - ret = m24_kbd->status; - m24_kbd->status &= ~(STAT_RTIMEOUT | STAT_TTIMEOUT); - break; + case 0x64: + ret = m24_kbd->status; + m24_kbd->status &= ~(STAT_RTIMEOUT | STAT_TTIMEOUT); + break; - default: - m24_log("\nBad M24 keyboard read %04X\n", port); + default: + m24_log("\nBad M24 keyboard read %04X\n", port); } - return(ret); + return (ret); } - static void m24_kbd_close(void *priv) { - m24_kbd_t *kbd = (m24_kbd_t *)priv; + m24_kbd_t *kbd = (m24_kbd_t *) priv; /* Stop the timer. */ timer_disable(&kbd->send_delay_timer); @@ -299,127 +291,135 @@ m24_kbd_close(void *priv) keyboard_send = NULL; io_removehandler(0x0060, 2, - m24_kbd_read, NULL, NULL, m24_kbd_write, NULL, NULL, kbd); + m24_kbd_read, NULL, NULL, m24_kbd_write, NULL, NULL, kbd); io_removehandler(0x0064, 1, - m24_kbd_read, NULL, NULL, m24_kbd_write, NULL, NULL, kbd); + m24_kbd_read, NULL, NULL, m24_kbd_write, NULL, NULL, kbd); free(kbd); } - static void m24_kbd_reset(void *priv) { - m24_kbd_t *m24_kbd = (m24_kbd_t *)priv; + m24_kbd_t *m24_kbd = (m24_kbd_t *) priv; /* Initialize the keyboard. */ - m24_kbd->status = STAT_LOCK | STAT_CD; + m24_kbd->status = STAT_LOCK | STAT_CD; m24_kbd->wantirq = 0; - keyboard_scan = 1; + keyboard_scan = 1; m24_kbd->param = m24_kbd->param_total = 0; - m24_kbd->mouse_mode = 0; - m24_kbd->scan[0] = 0x1c; - m24_kbd->scan[1] = 0x53; - m24_kbd->scan[2] = 0x01; - m24_kbd->scan[3] = 0x4b; - m24_kbd->scan[4] = 0x4d; - m24_kbd->scan[5] = 0x48; - m24_kbd->scan[6] = 0x50; + m24_kbd->mouse_mode = 0; + m24_kbd->scan[0] = 0x1c; + m24_kbd->scan[1] = 0x53; + m24_kbd->scan[2] = 0x01; + m24_kbd->scan[3] = 0x4b; + m24_kbd->scan[4] = 0x4d; + m24_kbd->scan[5] = 0x48; + m24_kbd->scan[6] = 0x50; } - static int ms_poll(int x, int y, int z, int b, void *priv) { - m24_kbd_t *m24_kbd = (m24_kbd_t *)priv; + m24_kbd_t *m24_kbd = (m24_kbd_t *) priv; m24_kbd->x += x; m24_kbd->y += y; - if (((key_queue_end - key_queue_start) & 0xf) > 14) return(0xff); + if (((key_queue_end - key_queue_start) & 0xf) > 14) + return (0xff); if ((b & 1) && !(m24_kbd->b & 1)) - m24_kbd_adddata(m24_kbd->scan[0]); + m24_kbd_adddata(m24_kbd->scan[0]); if (!(b & 1) && (m24_kbd->b & 1)) - m24_kbd_adddata(m24_kbd->scan[0] | 0x80); + m24_kbd_adddata(m24_kbd->scan[0] | 0x80); m24_kbd->b = (m24_kbd->b & ~1) | (b & 1); - if (((key_queue_end - key_queue_start) & 0xf) > 14) return(0xff); + if (((key_queue_end - key_queue_start) & 0xf) > 14) + return (0xff); if ((b & 2) && !(m24_kbd->b & 2)) - m24_kbd_adddata(m24_kbd->scan[2]); + m24_kbd_adddata(m24_kbd->scan[2]); if (!(b & 2) && (m24_kbd->b & 2)) - m24_kbd_adddata(m24_kbd->scan[2] | 0x80); + m24_kbd_adddata(m24_kbd->scan[2] | 0x80); m24_kbd->b = (m24_kbd->b & ~2) | (b & 2); - if (((key_queue_end - key_queue_start) & 0xf) > 14) return(0xff); + if (((key_queue_end - key_queue_start) & 0xf) > 14) + return (0xff); if ((b & 4) && !(m24_kbd->b & 4)) - m24_kbd_adddata(m24_kbd->scan[1]); + m24_kbd_adddata(m24_kbd->scan[1]); if (!(b & 4) && (m24_kbd->b & 4)) - m24_kbd_adddata(m24_kbd->scan[1] | 0x80); + m24_kbd_adddata(m24_kbd->scan[1] | 0x80); m24_kbd->b = (m24_kbd->b & ~4) | (b & 4); if (m24_kbd->mouse_mode) { - if (((key_queue_end - key_queue_start) & 0xf) > 12) return(0xff); + if (((key_queue_end - key_queue_start) & 0xf) > 12) + return (0xff); - if (!m24_kbd->x && !m24_kbd->y) return(0xff); + if (!m24_kbd->x && !m24_kbd->y) + return (0xff); - m24_kbd->y = -m24_kbd->y; + m24_kbd->y = -m24_kbd->y; - if (m24_kbd->x < -127) m24_kbd->x = -127; - if (m24_kbd->x > 127) m24_kbd->x = 127; - if (m24_kbd->x < -127) m24_kbd->x = 0x80 | ((-m24_kbd->x) & 0x7f); + if (m24_kbd->x < -127) + m24_kbd->x = -127; + if (m24_kbd->x > 127) + m24_kbd->x = 127; + if (m24_kbd->x < -127) + m24_kbd->x = 0x80 | ((-m24_kbd->x) & 0x7f); - if (m24_kbd->y < -127) m24_kbd->y = -127; - if (m24_kbd->y > 127) m24_kbd->y = 127; - if (m24_kbd->y < -127) m24_kbd->y = 0x80 | ((-m24_kbd->y) & 0x7f); + if (m24_kbd->y < -127) + m24_kbd->y = -127; + if (m24_kbd->y > 127) + m24_kbd->y = 127; + if (m24_kbd->y < -127) + m24_kbd->y = 0x80 | ((-m24_kbd->y) & 0x7f); - m24_kbd_adddata(0xfe); - m24_kbd_adddata(m24_kbd->x); - m24_kbd_adddata(m24_kbd->y); + m24_kbd_adddata(0xfe); + m24_kbd_adddata(m24_kbd->x); + m24_kbd_adddata(m24_kbd->y); - m24_kbd->x = m24_kbd->y = 0; + m24_kbd->x = m24_kbd->y = 0; } else { - while (m24_kbd->x < -4) { - if (((key_queue_end - key_queue_start) & 0xf) > 14) - return(0xff); - m24_kbd->x += 4; - m24_kbd_adddata(m24_kbd->scan[3]); - } - while (m24_kbd->x > 4) { - if (((key_queue_end - key_queue_start) & 0xf) > 14) - return(0xff); - m24_kbd->x -= 4; - m24_kbd_adddata(m24_kbd->scan[4]); - } - while (m24_kbd->y < -4) { - if (((key_queue_end - key_queue_start) & 0xf) > 14) - return(0xff); - m24_kbd->y += 4; - m24_kbd_adddata(m24_kbd->scan[5]); - } - while (m24_kbd->y > 4) { - if (((key_queue_end - key_queue_start) & 0xf) > 14) - return(0xff); - m24_kbd->y -= 4; - m24_kbd_adddata(m24_kbd->scan[6]); - } + while (m24_kbd->x < -4) { + if (((key_queue_end - key_queue_start) & 0xf) > 14) + return (0xff); + m24_kbd->x += 4; + m24_kbd_adddata(m24_kbd->scan[3]); + } + while (m24_kbd->x > 4) { + if (((key_queue_end - key_queue_start) & 0xf) > 14) + return (0xff); + m24_kbd->x -= 4; + m24_kbd_adddata(m24_kbd->scan[4]); + } + while (m24_kbd->y < -4) { + if (((key_queue_end - key_queue_start) & 0xf) > 14) + return (0xff); + m24_kbd->y += 4; + m24_kbd_adddata(m24_kbd->scan[5]); + } + while (m24_kbd->y > 4) { + if (((key_queue_end - key_queue_start) & 0xf) > 14) + return (0xff); + m24_kbd->y -= 4; + m24_kbd_adddata(m24_kbd->scan[6]); + } } - return(0); + return (0); } - static void m24_kbd_init(m24_kbd_t *kbd) { /* Initialize the keyboard. */ io_sethandler(0x0060, 2, - m24_kbd_read, NULL, NULL, m24_kbd_write, NULL, NULL, kbd); + m24_kbd_read, NULL, NULL, m24_kbd_write, NULL, NULL, kbd); io_sethandler(0x0064, 1, - m24_kbd_read, NULL, NULL, m24_kbd_write, NULL, NULL, kbd); + m24_kbd_read, NULL, NULL, m24_kbd_write, NULL, NULL, kbd); keyboard_send = m24_kbd_adddata_ex; m24_kbd_reset(kbd); timer_add(&kbd->send_delay_timer, m24_kbd_poll, kbd, 1); @@ -432,104 +432,97 @@ m24_kbd_init(m24_kbd_t *kbd) keyboard_set_is_amstrad(0); } - static void m19_vid_out(uint16_t addr, uint8_t val, void *priv) { - m19_vid_t *vid = (m19_vid_t *)priv; - int oldmode = vid->mode; + m19_vid_t *vid = (m19_vid_t *) priv; + int oldmode = vid->mode; /* activating plantronics mode */ if (addr == 0x3dd) { - /* already in graphics mode */ - if ((val & 0x30) && (vid->ogc.cga.cgamode & 0x2)) - vid->mode = PLANTRONICS_MODE; - else - vid->mode = OLIVETTI_OGC_MODE; - /* setting graphics mode */ + /* already in graphics mode */ + if ((val & 0x30) && (vid->ogc.cga.cgamode & 0x2)) + vid->mode = PLANTRONICS_MODE; + else + vid->mode = OLIVETTI_OGC_MODE; + /* setting graphics mode */ } else if (addr == 0x3d8) { - if ((val & 0x2) && (vid->colorplus.control & 0x30)) - vid->mode = PLANTRONICS_MODE; - else - vid->mode = OLIVETTI_OGC_MODE; + if ((val & 0x2) && (vid->colorplus.control & 0x30)) + vid->mode = PLANTRONICS_MODE; + else + vid->mode = OLIVETTI_OGC_MODE; } /* video mode changed */ if (oldmode != vid->mode) { - /* activate Plantronics emulation */ - if (vid->mode == PLANTRONICS_MODE){ - timer_disable(&vid->ogc.cga.timer); - timer_set_delay_u64(&vid->colorplus.cga.timer, 0); - /* return to OGC mode */ - } else { - timer_disable(&vid->colorplus.cga.timer); - timer_set_delay_u64(&vid->ogc.cga.timer, 0); - } + /* activate Plantronics emulation */ + if (vid->mode == PLANTRONICS_MODE) { + timer_disable(&vid->ogc.cga.timer); + timer_set_delay_u64(&vid->colorplus.cga.timer, 0); + /* return to OGC mode */ + } else { + timer_disable(&vid->colorplus.cga.timer); + timer_set_delay_u64(&vid->ogc.cga.timer, 0); + } - colorplus_recalctimings(&vid->colorplus); - ogc_recalctimings(&vid->ogc); + colorplus_recalctimings(&vid->colorplus); + ogc_recalctimings(&vid->ogc); } colorplus_out(addr, val, &vid->colorplus); ogc_out(addr, val, &vid->ogc); } - static uint8_t m19_vid_in(uint16_t addr, void *priv) { - m19_vid_t *vid = (m19_vid_t *)priv; + m19_vid_t *vid = (m19_vid_t *) priv; if (vid->mode == PLANTRONICS_MODE) - return colorplus_in(addr, &vid->colorplus); + return colorplus_in(addr, &vid->colorplus); else - return ogc_in(addr, &vid->ogc); + return ogc_in(addr, &vid->ogc); } - static uint8_t m19_vid_read(uint32_t addr, void *priv) { - m19_vid_t *vid = (m19_vid_t *)priv; + m19_vid_t *vid = (m19_vid_t *) priv; vid->colorplus.cga.mapping = vid->ogc.cga.mapping; if (vid->mode == PLANTRONICS_MODE) - return colorplus_read(addr, &vid->colorplus); + return colorplus_read(addr, &vid->colorplus); else - return ogc_read(addr, &vid->ogc); + return ogc_read(addr, &vid->ogc); } - static void m19_vid_write(uint32_t addr, uint8_t val, void *priv) { - m19_vid_t *vid = (m19_vid_t *)priv; + m19_vid_t *vid = (m19_vid_t *) priv; colorplus_write(addr, val, &vid->colorplus); ogc_write(addr, val, &vid->ogc); } - static void m19_vid_close(void *priv) { - m19_vid_t *vid = (m19_vid_t *)priv; + m19_vid_t *vid = (m19_vid_t *) priv; free(vid->ogc.cga.vram); free(vid->colorplus.cga.vram); free(vid); } - static void m19_vid_speed_changed(void *priv) { - m19_vid_t *vid = (m19_vid_t *)priv; + m19_vid_t *vid = (m19_vid_t *) priv; colorplus_recalctimings(&vid->colorplus); ogc_recalctimings(&vid->ogc); } - static void m19_vid_init(m19_vid_t *vid) { @@ -545,8 +538,8 @@ m19_vid_init(m19_vid_t *vid) /* OGC emulation part begin */ loadfont_ex("roms/machines/m19/BIOS.BIN", 1, 90); /* composite is not working yet */ - vid->ogc.cga.composite = 0; // (display_type != CGA_RGB); - vid->ogc.cga.revision = device_get_config_int("composite_type"); + vid->ogc.cga.composite = 0; // (display_type != CGA_RGB); + vid->ogc.cga.revision = device_get_config_int("composite_type"); vid->ogc.cga.snow_enabled = device_get_config_int("snow_enabled"); vid->ogc.cga.vram = malloc(0x8000); @@ -554,15 +547,15 @@ m19_vid_init(m19_vid_t *vid) /* cga_comp_init(vid->ogc.cga.revision); */ vid->ogc.cga.rgb_type = device_get_config_int("rgb_type"); - cga_palette = (vid->ogc.cga.rgb_type << 1); + cga_palette = (vid->ogc.cga.rgb_type << 1); cgapal_rebuild(); ogc_mdaattr_rebuild(); /* color display */ - if (device_get_config_int("rgb_type")==0 || device_get_config_int("rgb_type") == 4) - vid->ogc.mono_display = 0; + if (device_get_config_int("rgb_type") == 0 || device_get_config_int("rgb_type") == 4) + vid->ogc.mono_display = 0; else - vid->ogc.mono_display = 1; + vid->ogc.mono_display = 1; /* OGC emulation part end */ /* Plantronics emulation part begin*/ @@ -578,7 +571,7 @@ m19_vid_init(m19_vid_t *vid) timer_add(&vid->ogc.cga.timer, ogc_poll, &vid->ogc, 1); timer_add(&vid->colorplus.cga.timer, colorplus_poll, &vid->colorplus, 1); timer_disable(&vid->colorplus.cga.timer); - mem_mapping_add(&vid->ogc.cga.mapping, 0xb8000, 0x08000, m19_vid_read, NULL, NULL, m19_vid_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, vid); + mem_mapping_add(&vid->ogc.cga.mapping, 0xb8000, 0x08000, m19_vid_read, NULL, NULL, m19_vid_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, vid); io_sethandler(0x03d0, 0x0010, m19_vid_in, NULL, NULL, m19_vid_out, NULL, NULL, vid); vid->mode = OLIVETTI_OGC_MODE; @@ -587,20 +580,21 @@ m19_vid_init(m19_vid_t *vid) } const device_t m24_kbd_device = { - .name = "Olivetti M24 keyboard and mouse", + .name = "Olivetti M24 keyboard and mouse", .internal_name = "m24_kbd", - .flags = 0, - .local = 0, - .init = NULL, - .close = m24_kbd_close, - .reset = m24_kbd_reset, + .flags = 0, + .local = 0, + .init = NULL, + .close = m24_kbd_close, + .reset = m24_kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_config_t m19_vid_config[] = { + // clang-format off { /* Olivetti / ATT compatible displays */ .name = "rgb_type", @@ -626,123 +620,124 @@ const device_config_t m19_vid_config[] = { .default_int = 1, }, { .name = "", .description = "", .type = CONFIG_END } + // clang-format on }; const device_t m19_vid_device = { - .name = "Olivetti M19 graphics card", + .name = "Olivetti M19 graphics card", .internal_name = "m19_vid", - .flags = 0, - .local = 0, - .init = NULL, - .close = m19_vid_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = m19_vid_close, + .reset = NULL, { .available = NULL }, .speed_changed = m19_vid_speed_changed, - .force_redraw = NULL, - .config = m19_vid_config + .force_redraw = NULL, + .config = m19_vid_config }; static uint8_t m24_read(uint16_t port, void *priv) { uint8_t ret = 0x00; - int i, fdd_count = 0; + int i, fdd_count = 0; switch (port) { - /* - * port 66: - * DIPSW-0 on mainboard (off=present=1) - * bit 7 - 2764 (off) / 2732 (on) ROM (BIOS < 1.36) - * bit 7 - Use (off) / do not use (on) memory bank 1 (BIOS >= 1.36) - * bit 6 - n/a - * bit 5 - 8530 (off) / 8250 (on) SCC - * bit 4 - 8087 present - * bits 3-0 - installed memory - */ - case 0x66: - /* Switch 5 - 8087 present */ - if (hasfpu) - ret |= 0x10; - /* - * Switches 1, 2, 3, 4 - installed memory - * Switch 8 - Use memory bank 1 - */ - switch (mem_size) { - case 128: - ret |= 0x1; - break; - case 256: - ret |= 0x2|0x80; - break; - case 384: - ret |= 0x1|0x2|0x80; - break; - case 512: - ret |= 0x8; - break; - case 640: - default: - ret |= 0x1|0x8|0x80; - break; - } - /* - * port 67: - * DIPSW-1 on mainboard (off=present=1) - * bits 7-6 - number of drives - * bits 5-4 - display adapter - * bit 3 - video scroll CPU (on) / slow scroll (off) - * bit 2 - BIOS HD on mainboard (on) / on controller (off) - * bit 1 - FDD fast (off) / slow (on) start drive - * bit 0 - 96 TPI (720 KB 3.5") (off) / 48 TPI (360 KB 5.25") FDD drive - * - * Display adapter: - * off off 80x25 mono - * off on 40x25 color - * on off 80x25 color - * on on EGA/VGA (works only for BIOS ROM 1.43) - */ - case 0x67: - for (i = 0; i < FDD_NUM; i++) { - if (fdd_get_flags(i)) - fdd_count++; - } + /* + * port 66: + * DIPSW-0 on mainboard (off=present=1) + * bit 7 - 2764 (off) / 2732 (on) ROM (BIOS < 1.36) + * bit 7 - Use (off) / do not use (on) memory bank 1 (BIOS >= 1.36) + * bit 6 - n/a + * bit 5 - 8530 (off) / 8250 (on) SCC + * bit 4 - 8087 present + * bits 3-0 - installed memory + */ + case 0x66: + /* Switch 5 - 8087 present */ + if (hasfpu) + ret |= 0x10; + /* + * Switches 1, 2, 3, 4 - installed memory + * Switch 8 - Use memory bank 1 + */ + switch (mem_size) { + case 128: + ret |= 0x1; + break; + case 256: + ret |= 0x2 | 0x80; + break; + case 384: + ret |= 0x1 | 0x2 | 0x80; + break; + case 512: + ret |= 0x8; + break; + case 640: + default: + ret |= 0x1 | 0x8 | 0x80; + break; + } + /* + * port 67: + * DIPSW-1 on mainboard (off=present=1) + * bits 7-6 - number of drives + * bits 5-4 - display adapter + * bit 3 - video scroll CPU (on) / slow scroll (off) + * bit 2 - BIOS HD on mainboard (on) / on controller (off) + * bit 1 - FDD fast (off) / slow (on) start drive + * bit 0 - 96 TPI (720 KB 3.5") (off) / 48 TPI (360 KB 5.25") FDD drive + * + * Display adapter: + * off off 80x25 mono + * off on 40x25 color + * on off 80x25 color + * on on EGA/VGA (works only for BIOS ROM 1.43) + */ + case 0x67: + for (i = 0; i < FDD_NUM; i++) { + if (fdd_get_flags(i)) + fdd_count++; + } - /* Switches 7, 8 - floppy drives. */ - if (!fdd_count) - ret |= 0x00; - else - ret |= ((fdd_count - 1) << 6); + /* Switches 7, 8 - floppy drives. */ + if (!fdd_count) + ret |= 0x00; + else + ret |= ((fdd_count - 1) << 6); - /* Switches 5, 6 - monitor type */ - if (video_is_mda()) - ret |= 0x30; - else if (video_is_cga()) - ret |= 0x20; /* 0x10 would be 40x25 */ - else - ret |= 0x0; + /* Switches 5, 6 - monitor type */ + if (video_is_mda()) + ret |= 0x30; + else if (video_is_cga()) + ret |= 0x20; /* 0x10 would be 40x25 */ + else + ret |= 0x0; - /* Switch 3 - Disable internal BIOS HD */ - ret |= 0x4; + /* Switch 3 - Disable internal BIOS HD */ + ret |= 0x4; - /* Switch 2 - Set fast startup */ - ret |= 0x2; + /* Switch 2 - Set fast startup */ + ret |= 0x2; } - return(ret); + return (ret); } int machine_xt_m24_init(const machine_t *model) { - int ret; + int ret; m24_kbd_t *m24_kbd; ret = bios_load_interleaved("roms/machines/m24/olivetti_m24_bios_version_1.44_low_even.bin", - "roms/machines/m24/olivetti_m24_bios_version_1.44_high_odd.bin", - 0x000fc000, 16384, 0); + "roms/machines/m24/olivetti_m24_bios_version_1.44_high_odd.bin", + 0x000fc000, 16384, 0); if (bios_only || !ret) - return ret; + return ret; m24_kbd = (m24_kbd_t *) malloc(sizeof(m24_kbd_t)); memset(m24_kbd, 0x00, sizeof(m24_kbd_t)); @@ -751,7 +746,7 @@ machine_xt_m24_init(const machine_t *model) /* On-board FDC can be disabled only on M24SP */ if (fdc_type == FDC_INTERNAL) - device_add(&fdc_xt_device); + device_add(&fdc_xt_device); /* Address 66-67 = mainboard dip-switch settings */ io_sethandler(0x0066, 2, m24_read, NULL, NULL, NULL, NULL, NULL, NULL); @@ -766,7 +761,7 @@ machine_xt_m24_init(const machine_t *model) video_reset(gfxcard); if (gfxcard == VID_INTERNAL) - device_add(&ogc_m24_device); + device_add(&ogc_m24_device); m24_kbd_init(m24_kbd); device_add_ex(&m24_kbd_device, m24_kbd); @@ -784,11 +779,11 @@ machine_xt_m240_init(const machine_t *model) int ret; ret = bios_load_interleaved("roms/machines/m240/olivetti_m240_pch6_2.04_low.bin", - "roms/machines/m240/olivetti_m240_pch5_2.04_high.bin", - 0x000f8000, 32768, 0); + "roms/machines/m240/olivetti_m240_pch5_2.04_high.bin", + 0x000f8000, 32768, 0); if (bios_only || !ret) - return ret; + return ret; machine_common_init(model); @@ -810,17 +805,16 @@ machine_xt_m240_init(const machine_t *model) device_add(&at_nvr_device); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_xt_device); + device_add(&fdc_xt_device); if (joystick_type) - device_add(&gameport_device); + device_add(&gameport_device); nmi_init(); return ret; } - /* * Current bugs: * - 640x400x2 graphics mode not supported (bit 0 of register 0x3de cannot be set) @@ -833,10 +827,10 @@ machine_xt_m19_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/m19/BIOS.BIN", - 0x000fc000, 16384, 0); + 0x000fc000, 16384, 0); if (bios_only || !ret) - return ret; + return ret; m19_vid_t *vid; diff --git a/src/machine/m_xt_philips.c b/src/machine/m_xt_philips.c index b10e3a37e..2c5bbb53d 100644 --- a/src/machine/m_xt_philips.c +++ b/src/machine/m_xt_philips.c @@ -41,13 +41,11 @@ #include <86box/io.h> #include <86box/video.h> - typedef struct { - uint8_t reg; + uint8_t reg; } philips_t; - #ifdef ENABLE_PHILIPS_LOG int philips_do_log = ENABLE_PHILIPS_LOG; static void @@ -58,11 +56,11 @@ philips_log(const char *fmt, ...) if (philips_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); - va_end(ap); + va_end(ap); } } #else -#define philips_log(fmt, ...) +# define philips_log(fmt, ...) #endif static void @@ -71,39 +69,38 @@ philips_write(uint16_t port, uint8_t val, void *priv) philips_t *dev = (philips_t *) priv; switch (port) { - /* port 0xc0 - * bit 7: turbo - * bits 4-5: rtc read/set (I2C Bus SDA/SCL?) - * bit 2: parity disabled - */ - case 0xc0: - dev->reg = val; - if (val & 0x80) - cpu_dynamic_switch(cpu); - else - cpu_dynamic_switch(0); - break; + /* port 0xc0 + * bit 7: turbo + * bits 4-5: rtc read/set (I2C Bus SDA/SCL?) + * bit 2: parity disabled + */ + case 0xc0: + dev->reg = val; + if (val & 0x80) + cpu_dynamic_switch(cpu); + else + cpu_dynamic_switch(0); + break; } philips_log("Philips XT Mainboard: Write %02x at %02x\n", val, port); - } static uint8_t philips_read(uint16_t port, void *priv) { philips_t *dev = (philips_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; switch (port) { - /* port 0xc0 - * bit 7: turbo - * bits 4-5: rtc read/set - * bit 2: parity disabled - */ - case 0xc0: - ret = dev->reg; - break; + /* port 0xc0 + * bit 7: turbo + * bits 4-5: rtc read/set + * bit 2: parity disabled + */ + case 0xc0: + ret = dev->reg; + break; } philips_log("Philips XT Mainboard: Read %02x at %02x\n", ret, port); @@ -111,7 +108,6 @@ philips_read(uint16_t port, void *priv) return ret; } - static void philips_close(void *priv) { @@ -134,17 +130,17 @@ philips_init(const device_t *info) } const device_t philips_device = { - .name = "Philips XT Mainboard", + .name = "Philips XT Mainboard", .internal_name = "philips", - .flags = 0, - .local = 0, - .init = philips_init, - .close = philips_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = philips_init, + .close = philips_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; void @@ -163,7 +159,6 @@ machine_xt_philips_common_init(const machine_t *model) device_add(&philips_device); device_add(&xta_hd20_device); - } int @@ -172,15 +167,15 @@ machine_xt_p3105_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/p3105/philipsnms9100.bin", - 0x000fc000, 16384, 0); + 0x000fc000, 16384, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_philips_common_init(model); /* On-board FDC cannot be disabled */ - device_add(&fdc_xt_device); + device_add(&fdc_xt_device); return ret; } @@ -191,10 +186,10 @@ machine_xt_p3120_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/p3120/philips_p3120.bin", - 0x000f8000, 32768, 0); + 0x000f8000, 32768, 0); if (bios_only || !ret) - return ret; + return ret; machine_xt_philips_common_init(model); diff --git a/src/machine/m_xt_t1000.c b/src/machine/m_xt_t1000.c index ba96b74e7..afad725a3 100644 --- a/src/machine/m_xt_t1000.c +++ b/src/machine/m_xt_t1000.c @@ -108,9 +108,7 @@ #include <86box/machine.h> #include <86box/m_xt_t1000.h> - -#define T1000_ROMSIZE (512*1024UL) /* Maximum ROM drive size is 512k */ - +#define T1000_ROMSIZE (512 * 1024UL) /* Maximum ROM drive size is 512k */ enum TC8521_ADDR { /* Page 0 registers */ @@ -127,125 +125,115 @@ enum TC8521_ADDR { TC8521_MONTH10, TC8521_YEAR1, TC8521_YEAR10, - TC8521_PAGE, /* PAGE register */ - TC8521_TEST, /* TEST register */ - TC8521_RESET, /* RESET register */ + TC8521_PAGE, /* PAGE register */ + TC8521_TEST, /* TEST register */ + TC8521_RESET, /* RESET register */ /* Page 1 registers */ - TC8521_24HR = 0x1A, + TC8521_24HR = 0x1A, TC8521_LEAPYEAR = 0x1B }; - typedef struct { /* ROM drive */ - uint8_t *romdrive; - uint8_t rom_ctl; - uint32_t rom_offset; + uint8_t *romdrive; + uint8_t rom_ctl; + uint32_t rom_offset; mem_mapping_t rom_mapping; /* CONFIG.SYS drive. */ - uint8_t t1000_nvram[160]; - uint8_t t1200_nvram[2048]; + uint8_t t1000_nvram[160]; + uint8_t t1200_nvram[2048]; /* System control registers */ - uint8_t sys_ctl[16]; - uint8_t syskeys; - uint8_t turbo; + uint8_t sys_ctl[16]; + uint8_t syskeys; + uint8_t turbo; /* NVRAM control */ - uint8_t nvr_c0; - uint8_t nvr_tick; - int nvr_addr; - uint8_t nvr_active; - mem_mapping_t nvr_mapping; /* T1200 NVRAM mapping */ + uint8_t nvr_c0; + uint8_t nvr_tick; + int nvr_addr; + uint8_t nvr_active; + mem_mapping_t nvr_mapping; /* T1200 NVRAM mapping */ /* EMS data */ - uint8_t ems_reg[4]; + uint8_t ems_reg[4]; mem_mapping_t mapping[4]; - uint32_t page_exec[4]; - uint8_t ems_port_index; - uint16_t ems_port; - uint8_t is_640k; - uint32_t ems_base; - int32_t ems_pages; + uint32_t page_exec[4]; + uint8_t ems_port_index; + uint16_t ems_port; + uint8_t is_640k; + uint32_t ems_base; + int32_t ems_pages; - fdc_t *fdc; + fdc_t *fdc; - nvr_t nvr; - int is_t1200; + nvr_t nvr; + int is_t1200; } t1000_t; - -static t1000_t t1000; - +static t1000_t t1000; #ifdef ENABLE_T1000_LOG int t1000_do_log = ENABLE_T1000_LOG; - static void t1000_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (t1000_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (t1000_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define t1000_log(fmt, ...) +# define t1000_log(fmt, ...) #endif - /* Set the chip time. */ static void tc8521_time_set(uint8_t *regs, struct tm *tm) { - regs[TC8521_SECOND1] = (tm->tm_sec % 10); + regs[TC8521_SECOND1] = (tm->tm_sec % 10); regs[TC8521_SECOND10] = (tm->tm_sec / 10); - regs[TC8521_MINUTE1] = (tm->tm_min % 10); + regs[TC8521_MINUTE1] = (tm->tm_min % 10); regs[TC8521_MINUTE10] = (tm->tm_min / 10); if (regs[TC8521_24HR] & 0x01) { - regs[TC8521_HOUR1] = (tm->tm_hour % 10); - regs[TC8521_HOUR10] = (tm->tm_hour / 10); + regs[TC8521_HOUR1] = (tm->tm_hour % 10); + regs[TC8521_HOUR10] = (tm->tm_hour / 10); } else { - regs[TC8521_HOUR1] = ((tm->tm_hour % 12) % 10); - regs[TC8521_HOUR10] = (((tm->tm_hour % 12) / 10) | - ((tm->tm_hour >= 12) ? 2 : 0)); + regs[TC8521_HOUR1] = ((tm->tm_hour % 12) % 10); + regs[TC8521_HOUR10] = (((tm->tm_hour % 12) / 10) | ((tm->tm_hour >= 12) ? 2 : 0)); } regs[TC8521_WEEKDAY] = tm->tm_wday; - regs[TC8521_DAY1] = (tm->tm_mday % 10); - regs[TC8521_DAY10] = (tm->tm_mday / 10); - regs[TC8521_MONTH1] = ((tm->tm_mon + 1) % 10); + regs[TC8521_DAY1] = (tm->tm_mday % 10); + regs[TC8521_DAY10] = (tm->tm_mday / 10); + regs[TC8521_MONTH1] = ((tm->tm_mon + 1) % 10); regs[TC8521_MONTH10] = ((tm->tm_mon + 1) / 10); - regs[TC8521_YEAR1] = ((tm->tm_year - 80) % 10); - regs[TC8521_YEAR10] = (((tm->tm_year - 80) % 100) / 10); + regs[TC8521_YEAR1] = ((tm->tm_year - 80) % 10); + regs[TC8521_YEAR10] = (((tm->tm_year - 80) % 100) / 10); } - /* Get the chip time. */ -#define nibbles(a) (regs[(a##1)] + 10 * regs[(a##10)]) +#define nibbles(a) (regs[(a##1)] + 10 * regs[(a##10)]) static void tc8521_time_get(uint8_t *regs, struct tm *tm) { tm->tm_sec = nibbles(TC8521_SECOND); tm->tm_min = nibbles(TC8521_MINUTE); if (regs[TC8521_24HR] & 0x01) - tm->tm_hour = nibbles(TC8521_HOUR); - else - tm->tm_hour = ((nibbles(TC8521_HOUR) % 12) + - (regs[TC8521_HOUR10] & 0x02) ? 12 : 0); + tm->tm_hour = nibbles(TC8521_HOUR); + else + tm->tm_hour = ((nibbles(TC8521_HOUR) % 12) + (regs[TC8521_HOUR10] & 0x02) ? 12 : 0); tm->tm_wday = regs[TC8521_WEEKDAY]; tm->tm_mday = nibbles(TC8521_DAY); - tm->tm_mon = (nibbles(TC8521_MONTH) - 1); + tm->tm_mon = (nibbles(TC8521_MONTH) - 1); tm->tm_year = (nibbles(TC8521_YEAR) + 1980); } - /* This is called every second through the NVR/RTC hook. */ static void tc8521_tick(nvr_t *nvr) @@ -253,7 +241,6 @@ tc8521_tick(nvr_t *nvr) t1000_log("TC8521: ping\n"); } - static void tc8521_start(nvr_t *nvr) { @@ -261,13 +248,13 @@ tc8521_start(nvr_t *nvr) /* Initialize the internal and chip times. */ if (time_sync & TIME_SYNC_ENABLED) { - /* Use the internal clock's time. */ - nvr_time_get(&tm); - tc8521_time_set(nvr->regs, &tm); + /* Use the internal clock's time. */ + nvr_time_get(&tm); + tc8521_time_set(nvr->regs, &tm); } else { - /* Set the internal clock from the chip time. */ - tc8521_time_get(nvr->regs, &tm); - nvr_time_set(&tm); + /* Set the internal clock from the chip time. */ + tc8521_time_get(nvr->regs, &tm); + nvr_time_set(&tm); } #if 0 @@ -276,46 +263,43 @@ tc8521_start(nvr_t *nvr) #endif } - /* Write to one of the chip registers. */ static void tc8521_write(uint16_t addr, uint8_t val, void *priv) { - nvr_t *nvr = (nvr_t *)priv; + nvr_t *nvr = (nvr_t *) priv; uint8_t page; /* Get to the correct register page. */ addr &= 0x0f; page = nvr->regs[0x0d] & 0x03; if (addr < 0x0d) - addr += (16 * page); + addr += (16 * page); if (addr >= 0x10 && nvr->regs[addr] != val) - nvr_dosave = 1; + nvr_dosave = 1; /* Store the new value. */ nvr->regs[addr] = val; } - /* Read from one of the chip registers. */ static uint8_t tc8521_read(uint16_t addr, void *priv) { - nvr_t *nvr = (nvr_t *)priv; + nvr_t *nvr = (nvr_t *) priv; uint8_t page; /* Get to the correct register page. */ addr &= 0x0f; page = nvr->regs[0x0d] & 0x03; if (addr < 0x0d) - addr += (16 * page); + addr += (16 * page); /* Grab and return the desired value. */ - return(nvr->regs[addr]); + return (nvr->regs[addr]); } - /* Reset the 8521 to a default state. */ static void tc8521_reset(nvr_t *nvr) @@ -326,124 +310,119 @@ tc8521_reset(nvr_t *nvr) /* Reset the RTC registers. */ memset(nvr->regs, 0x00, 16); nvr->regs[TC8521_WEEKDAY] = 0x01; - nvr->regs[TC8521_DAY1] = 0x01; - nvr->regs[TC8521_MONTH1] = 0x01; + nvr->regs[TC8521_DAY1] = 0x01; + nvr->regs[TC8521_MONTH1] = 0x01; } - static void tc8521_init(nvr_t *nvr, int size) { /* This is machine specific. */ nvr->size = size; - nvr->irq = -1; + nvr->irq = -1; /* Set up any local handlers here. */ nvr->reset = tc8521_reset; nvr->start = tc8521_start; - nvr->tick = tc8521_tick; + nvr->tick = tc8521_tick; /* Initialize the actual NVR. */ nvr_init(nvr); io_sethandler(0x02c0, 16, - tc8521_read,NULL,NULL, tc8521_write,NULL,NULL, nvr); - + tc8521_read, NULL, NULL, tc8521_write, NULL, NULL, nvr); } - /* Given an EMS page ID, return its physical address in RAM. */ static uint32_t ems_execaddr(t1000_t *sys, int pg, uint16_t val) { - if (!(val & 0x80)) return(0); /* Bit 7 reset => not mapped */ - if (!sys->ems_pages) return(0); /* No EMS available: all used by - * HardRAM or conventional RAM */ + if (!(val & 0x80)) + return (0); /* Bit 7 reset => not mapped */ + if (!sys->ems_pages) + return (0); /* No EMS available: all used by + * HardRAM or conventional RAM */ val &= 0x7f; #if 0 t1000_log("Select EMS page: %d of %d\n", val, sys->ems_pages); #endif if (val < sys->ems_pages) { - /* EMS is any memory above 512k, - with ems_base giving the start address */ - return((512 * 1024) + (sys->ems_base * 0x10000) + (0x4000 * val)); + /* EMS is any memory above 512k, + with ems_base giving the start address */ + return ((512 * 1024) + (sys->ems_base * 0x10000) + (0x4000 * val)); } - return(0); + return (0); } - static uint8_t ems_in(uint16_t addr, void *priv) { - t1000_t *sys = (t1000_t *)priv; + t1000_t *sys = (t1000_t *) priv; #if 0 t1000_log("ems_in(%04x)=%02x\n", addr, sys->ems_reg[(addr >> 14) & 3]); #endif - return(sys->ems_reg[(addr >> 14) & 3]); + return (sys->ems_reg[(addr >> 14) & 3]); } - static void ems_out(uint16_t addr, uint8_t val, void *priv) { - t1000_t *sys = (t1000_t *)priv; - int pg = (addr >> 14) & 3; + t1000_t *sys = (t1000_t *) priv; + int pg = (addr >> 14) & 3; #if 0 t1000_log("ems_out(%04x, %02x) pg=%d\n", addr, val, pg); #endif - sys->ems_reg[pg] = val; + sys->ems_reg[pg] = val; sys->page_exec[pg] = ems_execaddr(sys, pg, val); if (sys->page_exec[pg]) { - /* Page present */ - mem_mapping_enable(&sys->mapping[pg]); - mem_mapping_set_exec(&sys->mapping[pg], ram + sys->page_exec[pg]); + /* Page present */ + mem_mapping_enable(&sys->mapping[pg]); + mem_mapping_set_exec(&sys->mapping[pg], ram + sys->page_exec[pg]); } else { - mem_mapping_disable(&sys->mapping[pg]); + mem_mapping_disable(&sys->mapping[pg]); } } - /* Hardram size is in 64k units */ static void ems_set_hardram(t1000_t *sys, uint8_t val) { int n; - val &= 0x1f; /* Mask off pageframe address */ + val &= 0x1f; /* Mask off pageframe address */ if (val && mem_size > 512) - sys->ems_base = val; - else - sys->ems_base = 0; + sys->ems_base = val; + else + sys->ems_base = 0; #if 0 t1000_log("EMS base set to %02x\n", val); #endif sys->ems_pages = ((mem_size - 512) / 16) - 4 * sys->ems_base; - if (sys->ems_pages < 0) sys->ems_pages = 0; + if (sys->ems_pages < 0) + sys->ems_pages = 0; /* Recalculate EMS mappings */ for (n = 0; n < 4; n++) - ems_out(n << 14, sys->ems_reg[n], sys); + ems_out(n << 14, sys->ems_reg[n], sys); } - static void ems_set_640k(t1000_t *sys, uint8_t val) { if (val && mem_size >= 640) { - mem_mapping_set_addr(&ram_low_mapping, 0, 640 * 1024); - sys->is_640k = 1; + mem_mapping_set_addr(&ram_low_mapping, 0, 640 * 1024); + sys->is_640k = 1; } else { - mem_mapping_set_addr(&ram_low_mapping, 0, 512 * 1024); - sys->is_640k = 0; + mem_mapping_set_addr(&ram_low_mapping, 0, 512 * 1024); + sys->is_640k = 0; } } - static void ems_set_port(t1000_t *sys, uint8_t val) { @@ -453,25 +432,25 @@ ems_set_port(t1000_t *sys, uint8_t val) t1000_log("ems_set_port(%d)", val & 0x0f); #endif if (sys->ems_port) { - for (n = 0; n <= 0xc000; n += 0x4000) { - io_removehandler(sys->ems_port+n, 1, - ems_in,NULL,NULL, ems_out,NULL,NULL, sys); - } - sys->ems_port = 0; + for (n = 0; n <= 0xc000; n += 0x4000) { + io_removehandler(sys->ems_port + n, 1, + ems_in, NULL, NULL, ems_out, NULL, NULL, sys); + } + sys->ems_port = 0; } val &= 0x0f; sys->ems_port_index = val; if (val == 7) { - /* No EMS */ - sys->ems_port = 0; + /* No EMS */ + sys->ems_port = 0; } else { - sys->ems_port = 0x208 | (val << 4); - for (n = 0; n <= 0xc000; n += 0x4000) { - io_sethandler(sys->ems_port+n, 1, - ems_in,NULL,NULL, ems_out,NULL,NULL, sys); - } - sys->ems_port = 0; + sys->ems_port = 0x208 | (val << 4); + for (n = 0; n <= 0xc000; n += 0x4000) { + io_sethandler(sys->ems_port + n, 1, + ems_in, NULL, NULL, ems_out, NULL, NULL, sys); + } + sys->ems_port = 0; } #if 0 @@ -479,35 +458,34 @@ ems_set_port(t1000_t *sys, uint8_t val) #endif } - static int addr_to_page(uint32_t addr) { - return((addr - 0xd0000) / 0x4000); + return ((addr - 0xd0000) / 0x4000); } - /* Read RAM in the EMS page frame. */ static uint8_t ems_read_ram(uint32_t addr, void *priv) { - t1000_t *sys = (t1000_t *)priv; - int pg = addr_to_page(addr); + t1000_t *sys = (t1000_t *) priv; + int pg = addr_to_page(addr); - if (pg < 0) return(0xff); + if (pg < 0) + return (0xff); addr = sys->page_exec[pg] + (addr & 0x3fff); - return(ram[addr]); + return (ram[addr]); } - static uint16_t ems_read_ramw(uint32_t addr, void *priv) { - t1000_t *sys = (t1000_t *)priv; - int pg = addr_to_page(addr); + t1000_t *sys = (t1000_t *) priv; + int pg = addr_to_page(addr); - if (pg < 0) return(0xff); + if (pg < 0) + return (0xff); #if 0 t1000_log("ems_read_ramw addr=%05x ", addr); @@ -518,46 +496,47 @@ ems_read_ramw(uint32_t addr, void *priv) t1000_log("-> %06x val=%04x\n", addr, *(uint16_t *)&ram[addr]); #endif - return(*(uint16_t *)&ram[addr]); + return (*(uint16_t *) &ram[addr]); } - static uint32_t ems_read_raml(uint32_t addr, void *priv) { - t1000_t *sys = (t1000_t *)priv; - int pg = addr_to_page(addr); + t1000_t *sys = (t1000_t *) priv; + int pg = addr_to_page(addr); - if (pg < 0) return(0xff); + if (pg < 0) + return (0xff); addr = sys->page_exec[pg] + (addr & 0x3fff); - return(*(uint32_t *)&ram[addr]); + return (*(uint32_t *) &ram[addr]); } - /* Write RAM in the EMS page frame. */ static void ems_write_ram(uint32_t addr, uint8_t val, void *priv) { - t1000_t *sys = (t1000_t *)priv; - int pg = addr_to_page(addr); + t1000_t *sys = (t1000_t *) priv; + int pg = addr_to_page(addr); - if (pg < 0) return; + if (pg < 0) + return; addr = sys->page_exec[pg] + (addr & 0x3fff); - if (ram[addr] != val) nvr_dosave = 1; + if (ram[addr] != val) + nvr_dosave = 1; ram[addr] = val; } - static void ems_write_ramw(uint32_t addr, uint16_t val, void *priv) { - t1000_t *sys = (t1000_t *)priv; - int pg = addr_to_page(addr); + t1000_t *sys = (t1000_t *) priv; + int pg = addr_to_page(addr); - if (pg < 0) return; + if (pg < 0) + return; #if 0 t1000_log("ems_write_ramw addr=%05x ", addr); @@ -568,122 +547,121 @@ ems_write_ramw(uint32_t addr, uint16_t val, void *priv) t1000_log("-> %06x val=%04x\n", addr, val); #endif - if (*(uint16_t *)&ram[addr] != val) nvr_dosave = 1; + if (*(uint16_t *) &ram[addr] != val) + nvr_dosave = 1; - *(uint16_t *)&ram[addr] = val; + *(uint16_t *) &ram[addr] = val; } - static void ems_write_raml(uint32_t addr, uint32_t val, void *priv) { - t1000_t *sys = (t1000_t *)priv; - int pg = addr_to_page(addr); + t1000_t *sys = (t1000_t *) priv; + int pg = addr_to_page(addr); - if (pg < 0) return; + if (pg < 0) + return; addr = sys->page_exec[pg] + (addr & 0x3fff); - if (*(uint32_t *)&ram[addr] != val) nvr_dosave = 1; + if (*(uint32_t *) &ram[addr] != val) + nvr_dosave = 1; - *(uint32_t *)&ram[addr] = val; + *(uint32_t *) &ram[addr] = val; } - static uint8_t read_ctl(uint16_t addr, void *priv) { - t1000_t *sys = (t1000_t *)priv; - uint8_t ret = 0xff; + t1000_t *sys = (t1000_t *) priv; + uint8_t ret = 0xff; switch (addr & 0x0f) { - case 1: - ret = sys->syskeys; - break; + case 1: + ret = sys->syskeys; + break; - case 0x0f: /* Detect EMS board */ - switch (sys->sys_ctl[0x0e]) { - case 0x50: - if (mem_size > 512) - ret = (0x90 | sys->ems_port_index); - break; + case 0x0f: /* Detect EMS board */ + switch (sys->sys_ctl[0x0e]) { + case 0x50: + if (mem_size > 512) + ret = (0x90 | sys->ems_port_index); + break; - case 0x51: - /* 0x60 is the page frame address: - (0xd000 - 0xc400) / 0x20 */ - ret = (sys->ems_base | 0x60); - break; + case 0x51: + /* 0x60 is the page frame address: + (0xd000 - 0xc400) / 0x20 */ + ret = (sys->ems_base | 0x60); + break; - case 0x52: - ret = (sys->is_640k ? 0x80 : 0); - break; - } - break; + case 0x52: + ret = (sys->is_640k ? 0x80 : 0); + break; + } + break; - default: - ret = (sys->sys_ctl[addr & 0x0f]); + default: + ret = (sys->sys_ctl[addr & 0x0f]); } - return(ret); + return (ret); } - static void t1200_turbo_set(uint8_t value) { - if (value == t1000.turbo) return; + if (value == t1000.turbo) + return; t1000.turbo = value; - if (! value) - cpu_dynamic_switch(0); - else - cpu_dynamic_switch(cpu); + if (!value) + cpu_dynamic_switch(0); + else + cpu_dynamic_switch(cpu); } - static void write_ctl(uint16_t addr, uint8_t val, void *priv) { - t1000_t *sys = (t1000_t *)priv; + t1000_t *sys = (t1000_t *) priv; sys->sys_ctl[addr & 0x0f] = val; switch (addr & 0x0f) { - case 4: /* Video control */ - if (sys->sys_ctl[3] == 0x5A) { - t1000_video_options_set((val & 0x20) ? 1 : 0); - t1000_display_set((val & 0x40) ? 0 : 1); - if (sys->is_t1200) - t1200_turbo_set((val & 0x80) ? 1 : 0); - } - break; + case 4: /* Video control */ + if (sys->sys_ctl[3] == 0x5A) { + t1000_video_options_set((val & 0x20) ? 1 : 0); + t1000_display_set((val & 0x40) ? 0 : 1); + if (sys->is_t1200) + t1200_turbo_set((val & 0x80) ? 1 : 0); + } + break; - /* It looks as if the T1200, like the T3100, can disable - * its builtin video chipset if it detects the presence of - * another video card. */ - case 6: if (sys->is_t1200) - { - t1000_video_enable(val & 0x01 ? 0 : 1); - } - break; + /* It looks as if the T1200, like the T3100, can disable + * its builtin video chipset if it detects the presence of + * another video card. */ + case 6: + if (sys->is_t1200) { + t1000_video_enable(val & 0x01 ? 0 : 1); + } + break; - case 0x0f: /* EMS control */ - switch (sys->sys_ctl[0x0e]) { - case 0x50: - ems_set_port(sys, val); - break; + case 0x0f: /* EMS control */ + switch (sys->sys_ctl[0x0e]) { + case 0x50: + ems_set_port(sys, val); + break; - case 0x51: - ems_set_hardram(sys, val); - break; + case 0x51: + ems_set_hardram(sys, val); + break; - case 0x52: - ems_set_640k(sys, val); - break; - } - break; + case 0x52: + ems_set_640k(sys, val); + break; + } + break; } } - /* Ports 0xC0 to 0xC3 appear to have two purposes: * * > Access to the 160 bytes of non-volatile RAM containing CONFIG.SYS @@ -694,171 +672,168 @@ write_ctl(uint16_t addr, uint8_t val, void *priv) static uint8_t t1000_read_nvram(uint16_t addr, void *priv) { - t1000_t *sys = (t1000_t *)priv; - uint8_t tmp = 0xff; + t1000_t *sys = (t1000_t *) priv; + uint8_t tmp = 0xff; switch (addr) { - case 0xc2: /* Read next byte from NVRAM */ - if (sys->nvr_addr >= 0 && sys->nvr_addr < 160) - tmp = sys->t1000_nvram[sys->nvr_addr]; - sys->nvr_addr++; - break; + case 0xc2: /* Read next byte from NVRAM */ + if (sys->nvr_addr >= 0 && sys->nvr_addr < 160) + tmp = sys->t1000_nvram[sys->nvr_addr]; + sys->nvr_addr++; + break; - case 0xc3: /* Read floppy changeline and NVRAM ready state */ - tmp = fdc_read(0x03f7, t1000.fdc); + case 0xc3: /* Read floppy changeline and NVRAM ready state */ + tmp = fdc_read(0x03f7, t1000.fdc); - tmp = (tmp & 0x80) >> 3; /* Bit 4 is changeline */ - tmp |= (sys->nvr_active & 0xc0);/* Bits 6,7 are r/w mode */ - tmp |= 0x2e; /* Bits 5,3,2,1 always 1 */ - tmp |= (sys->nvr_active & 0x40) >> 6; /* Ready state */ - break; + tmp = (tmp & 0x80) >> 3; /* Bit 4 is changeline */ + tmp |= (sys->nvr_active & 0xc0); /* Bits 6,7 are r/w mode */ + tmp |= 0x2e; /* Bits 5,3,2,1 always 1 */ + tmp |= (sys->nvr_active & 0x40) >> 6; /* Ready state */ + break; } - return(tmp); + return (tmp); } - static void t1000_write_nvram(uint16_t addr, uint8_t val, void *priv) { - t1000_t *sys = (t1000_t *)priv; + t1000_t *sys = (t1000_t *) priv; /* * On the real T1000, port 0xC1 is only usable as the high byte * of a 16-bit write to port 0xC0, with 0x5A in the low byte. */ switch (addr) { - case 0xc0: - sys->nvr_c0 = val; - break; + case 0xc0: + sys->nvr_c0 = val; + break; - case 0xc1: /* Write next byte to NVRAM */ - if (sys->nvr_addr >= 0 && sys->nvr_addr < 160) { - if (sys->t1000_nvram[sys->nvr_addr] != val) - nvr_dosave = 1; - sys->t1000_nvram[sys->nvr_addr] = val; - } - sys->nvr_addr++; - break; + case 0xc1: /* Write next byte to NVRAM */ + if (sys->nvr_addr >= 0 && sys->nvr_addr < 160) { + if (sys->t1000_nvram[sys->nvr_addr] != val) + nvr_dosave = 1; + sys->t1000_nvram[sys->nvr_addr] = val; + } + sys->nvr_addr++; + break; - case 0xc2: - break; + case 0xc2: + break; - case 0xc3: - /* - * At start of NVRAM read / write, 0x80 is written to - * port 0xC3. This seems to reset the NVRAM address - * counter. A single byte is then written (0xff for - * write, 0x00 for read) which appears to be ignored. - * Simulate that by starting the address counter off - * at -1. - */ - sys->nvr_active = val; - if (val == 0x80) sys->nvr_addr = -1; - break; + case 0xc3: + /* + * At start of NVRAM read / write, 0x80 is written to + * port 0xC3. This seems to reset the NVRAM address + * counter. A single byte is then written (0xff for + * write, 0x00 for read) which appears to be ignored. + * Simulate that by starting the address counter off + * at -1. + */ + sys->nvr_active = val; + if (val == 0x80) + sys->nvr_addr = -1; + break; } } - -static -uint8_t read_t1200_nvram(uint32_t addr, void *priv) +static uint8_t +read_t1200_nvram(uint32_t addr, void *priv) { - t1000_t *sys = (t1000_t *)priv; + t1000_t *sys = (t1000_t *) priv; return sys->t1200_nvram[addr & 0x7FF]; } - -static void write_t1200_nvram(uint32_t addr, uint8_t value, void *priv) +static void +write_t1200_nvram(uint32_t addr, uint8_t value, void *priv) { - t1000_t *sys = (t1000_t *)priv; + t1000_t *sys = (t1000_t *) priv; if (sys->t1200_nvram[addr & 0x7FF] != value) - nvr_dosave = 1; + nvr_dosave = 1; sys->t1200_nvram[addr & 0x7FF] = value; } - /* Port 0xC8 controls the ROM drive */ static uint8_t t1000_read_rom_ctl(uint16_t addr, void *priv) { - t1000_t *sys = (t1000_t *)priv; + t1000_t *sys = (t1000_t *) priv; - return(sys->rom_ctl); + return (sys->rom_ctl); } - static void t1000_write_rom_ctl(uint16_t addr, uint8_t val, void *priv) { - t1000_t *sys = (t1000_t *)priv; + t1000_t *sys = (t1000_t *) priv; sys->rom_ctl = val; if (sys->romdrive && (val & 0x80)) { - /* Enable */ - sys->rom_offset = ((val & 0x7f) * 0x10000) % T1000_ROMSIZE; - mem_mapping_set_addr(&sys->rom_mapping, 0xa0000, 0x10000); - mem_mapping_set_exec(&sys->rom_mapping, sys->romdrive + sys->rom_offset); - mem_mapping_enable(&sys->rom_mapping); + /* Enable */ + sys->rom_offset = ((val & 0x7f) * 0x10000) % T1000_ROMSIZE; + mem_mapping_set_addr(&sys->rom_mapping, 0xa0000, 0x10000); + mem_mapping_set_exec(&sys->rom_mapping, sys->romdrive + sys->rom_offset); + mem_mapping_enable(&sys->rom_mapping); } else { - mem_mapping_disable(&sys->rom_mapping); + mem_mapping_disable(&sys->rom_mapping); } } - /* Read the ROM drive */ static uint8_t t1000_read_rom(uint32_t addr, void *priv) { - t1000_t *sys = (t1000_t *)priv; + t1000_t *sys = (t1000_t *) priv; - if (! sys->romdrive) return(0xff); + if (!sys->romdrive) + return (0xff); - return(sys->romdrive[sys->rom_offset + (addr & 0xffff)]); + return (sys->romdrive[sys->rom_offset + (addr & 0xffff)]); } - static uint16_t t1000_read_romw(uint32_t addr, void *priv) { - t1000_t *sys = (t1000_t *)priv; + t1000_t *sys = (t1000_t *) priv; - if (! sys->romdrive) return(0xffff); + if (!sys->romdrive) + return (0xffff); - return(*(uint16_t *)(&sys->romdrive[sys->rom_offset + (addr & 0xffff)])); + return (*(uint16_t *) (&sys->romdrive[sys->rom_offset + (addr & 0xffff)])); } - static uint32_t t1000_read_roml(uint32_t addr, void *priv) { - t1000_t *sys = (t1000_t *)priv; + t1000_t *sys = (t1000_t *) priv; - if (! sys->romdrive) return(0xffffffff); + if (!sys->romdrive) + return (0xffffffff); - return(*(uint32_t *)(&sys->romdrive[sys->rom_offset + (addr & 0xffff)])); + return (*(uint32_t *) (&sys->romdrive[sys->rom_offset + (addr & 0xffff)])); } int machine_xt_t1000_init(const machine_t *model) { FILE *f; - int pg; + int pg; int ret; ret = bios_load_linear("roms/machines/t1000/t1000.rom", - 0x000f8000, 32768, 0); + 0x000f8000, 32768, 0); if (bios_only || !ret) - return ret; + return ret; memset(&t1000, 0x00, sizeof(t1000)); - t1000.is_t1200 = 0; - t1000.turbo = 0xff; - t1000.ems_port_index = 7; /* EMS disabled */ + t1000.is_t1200 = 0; + t1000.turbo = 0xff; + t1000.ems_port_index = 7; /* EMS disabled */ /* Load the T1000 CGA Font ROM. */ loadfont("roms/machines/t1000/t1000font.bin", 2); @@ -871,43 +846,43 @@ machine_xt_t1000_init(const machine_t *model) */ f = rom_fopen("roms/machines/t1000/t1000dos.rom", "rb"); if (f != NULL) { - t1000.romdrive = malloc(T1000_ROMSIZE); - if (t1000.romdrive) { - memset(t1000.romdrive, 0xff, T1000_ROMSIZE); - if (fread(t1000.romdrive, 1, T1000_ROMSIZE, f) != T1000_ROMSIZE) - fatal("machine_xt_t1000_init(): Error reading DOS ROM data\n"); - } - fclose(f); + t1000.romdrive = malloc(T1000_ROMSIZE); + if (t1000.romdrive) { + memset(t1000.romdrive, 0xff, T1000_ROMSIZE); + if (fread(t1000.romdrive, 1, T1000_ROMSIZE, f) != T1000_ROMSIZE) + fatal("machine_xt_t1000_init(): Error reading DOS ROM data\n"); + } + fclose(f); } mem_mapping_add(&t1000.rom_mapping, 0xa0000, 0x10000, - t1000_read_rom,t1000_read_romw,t1000_read_roml, - NULL,NULL,NULL, NULL, MEM_MAPPING_EXTERNAL, &t1000); + t1000_read_rom, t1000_read_romw, t1000_read_roml, + NULL, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, &t1000); mem_mapping_disable(&t1000.rom_mapping); /* Map the EMS page frame */ for (pg = 0; pg < 4; pg++) { - mem_mapping_add(&t1000.mapping[pg], 0xd0000 + (0x4000 * pg), 16384, - ems_read_ram,ems_read_ramw,ems_read_raml, - ems_write_ram,ems_write_ramw,ems_write_raml, - NULL, MEM_MAPPING_EXTERNAL, &t1000); + mem_mapping_add(&t1000.mapping[pg], 0xd0000 + (0x4000 * pg), 16384, + ems_read_ram, ems_read_ramw, ems_read_raml, + ems_write_ram, ems_write_ramw, ems_write_raml, + NULL, MEM_MAPPING_EXTERNAL, &t1000); - /* Start them all off disabled */ - mem_mapping_disable(&t1000.mapping[pg]); + /* Start them all off disabled */ + mem_mapping_disable(&t1000.mapping[pg]); } /* Non-volatile RAM for CONFIG.SYS */ io_sethandler(0xc0, 4, - t1000_read_nvram,NULL,NULL, - t1000_write_nvram,NULL,NULL, &t1000); + t1000_read_nvram, NULL, NULL, + t1000_write_nvram, NULL, NULL, &t1000); /* ROM drive */ io_sethandler(0xc8, 1, - t1000_read_rom_ctl,NULL,NULL, - t1000_write_rom_ctl,NULL,NULL, &t1000); + t1000_read_rom_ctl, NULL, NULL, + t1000_write_rom_ctl, NULL, NULL, &t1000); /* System control functions, and add-on memory board */ io_sethandler(0xe0, 16, - read_ctl,NULL,NULL, write_ctl,NULL,NULL, &t1000); + read_ctl, NULL, NULL, write_ctl, NULL, NULL, &t1000); machine_common_init(model); @@ -922,19 +897,17 @@ machine_xt_t1000_init(const machine_t *model) nvr_set_ven_save(t1000_nvr_save); if (gfxcard == VID_INTERNAL) - device_add(&t1000_video_device); + device_add(&t1000_video_device); return ret; } - const device_t * t1200_get_device(void) { - return(&t1200_video_device); + return (&t1200_video_device); } - int machine_xt_t1200_init(const machine_t *model) { @@ -943,41 +916,41 @@ machine_xt_t1200_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/t1200/t1200_019e.ic15.bin", - 0x000f8000, 32768, 0); + 0x000f8000, 32768, 0); if (bios_only || !ret) - return ret; + return ret; memset(&t1000, 0x00, sizeof(t1000)); - t1000.is_t1200 = 1; - t1000.ems_port_index = 7; /* EMS disabled */ + t1000.is_t1200 = 1; + t1000.ems_port_index = 7; /* EMS disabled */ /* Load the T1000 CGA Font ROM. */ loadfont("roms/machines/t1000/t1000font.bin", 2); /* Map the EMS page frame */ for (pg = 0; pg < 4; pg++) { - mem_mapping_add(&t1000.mapping[pg], - 0xd0000 + (0x4000 * pg), 16384, - ems_read_ram,ems_read_ramw,ems_read_raml, - ems_write_ram,ems_write_ramw,ems_write_raml, - NULL, MEM_MAPPING_EXTERNAL, &t1000); + mem_mapping_add(&t1000.mapping[pg], + 0xd0000 + (0x4000 * pg), 16384, + ems_read_ram, ems_read_ramw, ems_read_raml, + ems_write_ram, ems_write_ramw, ems_write_raml, + NULL, MEM_MAPPING_EXTERNAL, &t1000); - /* Start them all off disabled */ - mem_mapping_disable(&t1000.mapping[pg]); + /* Start them all off disabled */ + mem_mapping_disable(&t1000.mapping[pg]); } /* System control functions, and add-on memory board */ io_sethandler(0xe0, 16, - read_ctl,NULL,NULL, write_ctl,NULL,NULL, &t1000); + read_ctl, NULL, NULL, write_ctl, NULL, NULL, &t1000); machine_common_init(model); mem_mapping_add(&t1000.nvr_mapping, - 0x000f0000, 2048, - read_t1200_nvram, NULL, NULL, - write_t1200_nvram, NULL, NULL, - NULL, MEM_MAPPING_EXTERNAL, &t1000); + 0x000f0000, 2048, + read_t1200_nvram, NULL, NULL, + write_t1200_nvram, NULL, NULL, + NULL, MEM_MAPPING_EXTERNAL, &t1000); pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt); device_add(&keyboard_xt_device); @@ -990,12 +963,11 @@ machine_xt_t1200_init(const machine_t *model) nvr_set_ven_save(t1200_nvr_save); if (gfxcard == VID_INTERNAL) - device_add(&t1200_video_device); + device_add(&t1200_video_device); return ret; } - void t1000_syskey(uint8_t andmask, uint8_t ormask, uint8_t xormask) { @@ -1004,73 +976,68 @@ t1000_syskey(uint8_t andmask, uint8_t ormask, uint8_t xormask) t1000.syskeys ^= xormask; } - static void t1000_configsys_load(void) { FILE *f; - int size; + int size; memset(t1000.t1000_nvram, 0x1a, sizeof(t1000.t1000_nvram)); f = plat_fopen(nvr_path("t1000_config.nvr"), "rb"); if (f != NULL) { - size = sizeof(t1000.t1000_nvram); - if (fread(t1000.t1000_nvram, 1, size, f) != size) - fatal("t1000_configsys_load(): Error reading data\n"); - fclose(f); + size = sizeof(t1000.t1000_nvram); + if (fread(t1000.t1000_nvram, 1, size, f) != size) + fatal("t1000_configsys_load(): Error reading data\n"); + fclose(f); } } - static void t1000_configsys_save(void) { FILE *f; - int size; + int size; f = plat_fopen(nvr_path("t1000_config.nvr"), "wb"); if (f != NULL) { - size = sizeof(t1000.t1000_nvram); - if (fwrite(t1000.t1000_nvram, 1, size, f) != size) - fatal("t1000_configsys_save(): Error writing data\n"); - fclose(f); + size = sizeof(t1000.t1000_nvram); + if (fwrite(t1000.t1000_nvram, 1, size, f) != size) + fatal("t1000_configsys_save(): Error writing data\n"); + fclose(f); } } - static void t1200_state_load(void) { FILE *f; - int size; + int size; memset(t1000.t1200_nvram, 0, sizeof(t1000.t1200_nvram)); f = plat_fopen(nvr_path("t1200_state.nvr"), "rb"); if (f != NULL) { - size = sizeof(t1000.t1200_nvram); - if (fread(t1000.t1200_nvram, 1, size, f) != size) - fatal("t1200_state_load(): Error reading data\n"); - fclose(f); + size = sizeof(t1000.t1200_nvram); + if (fread(t1000.t1200_nvram, 1, size, f) != size) + fatal("t1200_state_load(): Error reading data\n"); + fclose(f); } } - static void t1200_state_save(void) { FILE *f; - int size; + int size; f = plat_fopen(nvr_path("t1200_state.nvr"), "wb"); if (f != NULL) { - size = sizeof(t1000.t1200_nvram); - if (fwrite(t1000.t1200_nvram, 1, size, f) != size) - fatal("t1200_state_save(): Error writing data\n"); - fclose(f); + size = sizeof(t1000.t1200_nvram); + if (fwrite(t1000.t1200_nvram, 1, size, f) != size) + fatal("t1200_state_save(): Error writing data\n"); + fclose(f); } } - /* All RAM beyond 512k is non-volatile */ static void t1000_emsboard_load(void) @@ -1078,30 +1045,28 @@ t1000_emsboard_load(void) FILE *f; if (mem_size > 512) { - f = plat_fopen(nvr_path("t1000_ems.nvr"), "rb"); - if (f != NULL) { - fread(&ram[512 * 1024], 1024, (mem_size - 512), f); - fclose(f); - } + f = plat_fopen(nvr_path("t1000_ems.nvr"), "rb"); + if (f != NULL) { + fread(&ram[512 * 1024], 1024, (mem_size - 512), f); + fclose(f); + } } } - static void t1000_emsboard_save(void) { FILE *f; if (mem_size > 512) { - f = plat_fopen(nvr_path("t1000_ems.nvr"), "wb"); - if (f != NULL) { - fwrite(&ram[512 * 1024], 1024, (mem_size - 512), f); - fclose(f); - } + f = plat_fopen(nvr_path("t1000_ems.nvr"), "wb"); + if (f != NULL) { + fwrite(&ram[512 * 1024], 1024, (mem_size - 512), f); + fclose(f); + } } } - void t1000_nvr_load(void) { @@ -1109,7 +1074,6 @@ t1000_nvr_load(void) t1000_configsys_load(); } - void t1000_nvr_save(void) { @@ -1117,7 +1081,6 @@ t1000_nvr_save(void) t1000_configsys_save(); } - void t1200_nvr_load(void) { @@ -1125,7 +1088,6 @@ t1200_nvr_load(void) t1200_state_load(); } - void t1200_nvr_save(void) { diff --git a/src/machine/m_xt_t1000_vid.c b/src/machine/m_xt_t1000_vid.c index 817b54042..d15a8f1c2 100644 --- a/src/machine/m_xt_t1000_vid.c +++ b/src/machine/m_xt_t1000_vid.c @@ -52,20 +52,17 @@ #include <86box/vid_cga.h> #include <86box/m_xt_t1000.h> - #define T1000_XSIZE 640 #define T1000_YSIZE 200 - /* Mapping of attributes to colours */ static uint32_t blue, grey; -static uint8_t boldcols[256]; /* Which attributes use the bold font */ +static uint8_t boldcols[256]; /* Which attributes use the bold font */ static uint32_t blinkcols[256][2]; static uint32_t normcols[256][2]; static uint8_t language; -static video_timings_t timing_t1000 = {VIDEO_ISA, 8,16,32, 8,16,32}; - +static video_timings_t timing_t1000 = { VIDEO_ISA, 8, 16, 32, 8, 16, 32 }; /* Video options set by the motherboard; they will be picked up by the card * on the next poll. @@ -74,673 +71,633 @@ static video_timings_t timing_t1000 = {VIDEO_ISA, 8,16,32, 8,16,32}; * Bit 0: Thin font */ static uint8_t st_video_options; -static uint8_t st_enabled = 1; -static int8_t st_display_internal = -1; +static uint8_t st_enabled = 1; +static int8_t st_display_internal = -1; -void t1000_video_options_set(uint8_t options) +void +t1000_video_options_set(uint8_t options) { - st_video_options = options & 1; - st_video_options |= language; + st_video_options = options & 1; + st_video_options |= language; } -void t1000_video_enable(uint8_t enabled) +void +t1000_video_enable(uint8_t enabled) { - st_enabled = enabled; + st_enabled = enabled; } -void t1000_display_set(uint8_t internal) +void +t1000_display_set(uint8_t internal) { - st_display_internal = (int8_t)internal; + st_display_internal = (int8_t) internal; } -uint8_t t1000_display_get() +uint8_t +t1000_display_get() { - return (uint8_t)st_display_internal; + return (uint8_t) st_display_internal; } +typedef struct t1000_t { + mem_mapping_t mapping; -typedef struct t1000_t -{ - mem_mapping_t mapping; + cga_t cga; /* The CGA is used for the external + * display; most of its registers are + * ignored by the plasma display. */ - cga_t cga; /* The CGA is used for the external - * display; most of its registers are - * ignored by the plasma display. */ + int font; /* Current font, 0-3 */ + int enabled; /* Hardware enabled, 0 or 1 */ + int internal; /* Using internal display? */ + uint8_t attrmap; /* Attribute mapping register */ - int font; /* Current font, 0-3 */ - int enabled; /* Hardware enabled, 0 or 1 */ - int internal; /* Using internal display? */ - uint8_t attrmap; /* Attribute mapping register */ + uint64_t dispontime, dispofftime; - uint64_t dispontime, dispofftime; + int linepos, displine; + int vc; + int dispon; + int vsynctime; + uint8_t video_options; + uint8_t backlight, invert; - int linepos, displine; - int vc; - int dispon; - int vsynctime; - uint8_t video_options; - uint8_t backlight, invert; - - uint8_t *vram; + uint8_t *vram; } t1000_t; - -static void t1000_recalctimings(t1000_t *t1000); -static void t1000_write(uint32_t addr, uint8_t val, void *p); +static void t1000_recalctimings(t1000_t *t1000); +static void t1000_write(uint32_t addr, uint8_t val, void *p); static uint8_t t1000_read(uint32_t addr, void *p); -static void t1000_recalcattrs(t1000_t *t1000); +static void t1000_recalcattrs(t1000_t *t1000); - -static void t1000_out(uint16_t addr, uint8_t val, void *p) +static void +t1000_out(uint16_t addr, uint8_t val, void *p) { - t1000_t *t1000 = (t1000_t *)p; - switch (addr) - { - /* Emulated CRTC, register select */ - case 0x3d0: case 0x3d2: case 0x3d4: case 0x3d6: - cga_out(addr, val, &t1000->cga); - break; + t1000_t *t1000 = (t1000_t *) p; + switch (addr) { + /* Emulated CRTC, register select */ + case 0x3d0: + case 0x3d2: + case 0x3d4: + case 0x3d6: + cga_out(addr, val, &t1000->cga); + break; - /* Emulated CRTC, value */ - case 0x3d1: case 0x3d3: case 0x3d5: case 0x3d7: - /* Register 0x12 controls the attribute mappings for the - * LCD screen. */ - if (t1000->cga.crtcreg == 0x12) - { - t1000->attrmap = val; - t1000_recalcattrs(t1000); - return; - } - cga_out(addr, val, &t1000->cga); + /* Emulated CRTC, value */ + case 0x3d1: + case 0x3d3: + case 0x3d5: + case 0x3d7: + /* Register 0x12 controls the attribute mappings for the + * LCD screen. */ + if (t1000->cga.crtcreg == 0x12) { + t1000->attrmap = val; + t1000_recalcattrs(t1000); + return; + } + cga_out(addr, val, &t1000->cga); - t1000_recalctimings(t1000); - return; + t1000_recalctimings(t1000); + return; - /* CGA control register */ - case 0x3D8: - cga_out(addr, val, &t1000->cga); - return; - /* CGA colour register */ - case 0x3D9: - cga_out(addr, val, &t1000->cga); - return; - } + /* CGA control register */ + case 0x3D8: + cga_out(addr, val, &t1000->cga); + return; + /* CGA colour register */ + case 0x3D9: + cga_out(addr, val, &t1000->cga); + return; + } } -static uint8_t t1000_in(uint16_t addr, void *p) +static uint8_t +t1000_in(uint16_t addr, void *p) { - t1000_t *t1000 = (t1000_t *)p; - uint8_t val; + t1000_t *t1000 = (t1000_t *) p; + uint8_t val; - switch (addr) - { - case 0x3d1: case 0x3d3: case 0x3d5: case 0x3d7: - if (t1000->cga.crtcreg == 0x12) - { - val = t1000->attrmap & 0x0F; - if (t1000->internal) val |= 0x20; /* LCD / CRT */ - return val; - } - } + switch (addr) { + case 0x3d1: + case 0x3d3: + case 0x3d5: + case 0x3d7: + if (t1000->cga.crtcreg == 0x12) { + val = t1000->attrmap & 0x0F; + if (t1000->internal) + val |= 0x20; /* LCD / CRT */ + return val; + } + } - return cga_in(addr, &t1000->cga); + return cga_in(addr, &t1000->cga); } - - - -static void t1000_write(uint32_t addr, uint8_t val, void *p) +static void +t1000_write(uint32_t addr, uint8_t val, void *p) { - t1000_t *t1000 = (t1000_t *)p; + t1000_t *t1000 = (t1000_t *) p; - t1000->vram[addr & 0x3fff] = val; - cycles -= 4; + t1000->vram[addr & 0x3fff] = val; + cycles -= 4; } -static uint8_t t1000_read(uint32_t addr, void *p) +static uint8_t +t1000_read(uint32_t addr, void *p) { - t1000_t *t1000 = (t1000_t *)p; - cycles -= 4; + t1000_t *t1000 = (t1000_t *) p; + cycles -= 4; - return t1000->vram[addr & 0x3fff]; + return t1000->vram[addr & 0x3fff]; } - - -static void t1000_recalctimings(t1000_t *t1000) +static void +t1000_recalctimings(t1000_t *t1000) { - double disptime; - double _dispontime, _dispofftime; + double disptime; + double _dispontime, _dispofftime; - if (!t1000->internal) - { - cga_recalctimings(&t1000->cga); - return; - } - disptime = 651; - _dispontime = 640; - _dispofftime = disptime - _dispontime; - t1000->dispontime = (uint64_t)(_dispontime * xt_cpu_multi); - t1000->dispofftime = (uint64_t)(_dispofftime * xt_cpu_multi); + if (!t1000->internal) { + cga_recalctimings(&t1000->cga); + return; + } + disptime = 651; + _dispontime = 640; + _dispofftime = disptime - _dispontime; + t1000->dispontime = (uint64_t) (_dispontime * xt_cpu_multi); + t1000->dispofftime = (uint64_t) (_dispofftime * xt_cpu_multi); } /* Draw a row of text in 80-column mode */ -static void t1000_text_row80(t1000_t *t1000) +static void +t1000_text_row80(t1000_t *t1000) { - uint32_t cols[2]; - int x, c; - uint8_t chr, attr; - int drawcursor; - int cursorline; - int bold; - int blink; - uint16_t addr; - uint8_t sc; - uint16_t ma = (t1000->cga.crtc[13] | (t1000->cga.crtc[12] << 8)) & 0x3fff; - uint16_t ca = (t1000->cga.crtc[15] | (t1000->cga.crtc[14] << 8)) & 0x3fff; + uint32_t cols[2]; + int x, c; + uint8_t chr, attr; + int drawcursor; + int cursorline; + int bold; + int blink; + uint16_t addr; + uint8_t sc; + uint16_t ma = (t1000->cga.crtc[13] | (t1000->cga.crtc[12] << 8)) & 0x3fff; + uint16_t ca = (t1000->cga.crtc[15] | (t1000->cga.crtc[14] << 8)) & 0x3fff; - sc = (t1000->displine) & 7; - addr = ((ma & ~1) + (t1000->displine >> 3) * 80) * 2; - ma += (t1000->displine >> 3) * 80; + sc = (t1000->displine) & 7; + addr = ((ma & ~1) + (t1000->displine >> 3) * 80) * 2; + ma += (t1000->displine >> 3) * 80; - if ((t1000->cga.crtc[10] & 0x60) == 0x20) - { - cursorline = 0; - } - else - { - cursorline = ((t1000->cga.crtc[10] & 0x0F) <= sc) && - ((t1000->cga.crtc[11] & 0x0F) >= sc); - } - for (x = 0; x < 80; x++) + if ((t1000->cga.crtc[10] & 0x60) == 0x20) { + cursorline = 0; + } else { + cursorline = ((t1000->cga.crtc[10] & 0x0F) <= sc) && ((t1000->cga.crtc[11] & 0x0F) >= sc); + } + for (x = 0; x < 80; x++) { + chr = t1000->vram[(addr + 2 * x) & 0x3FFF]; + attr = t1000->vram[(addr + 2 * x + 1) & 0x3FFF]; + drawcursor = ((ma == ca) && cursorline && (t1000->cga.cgamode & 8) && (t1000->cga.cgablink & 16)); + + blink = ((t1000->cga.cgablink & 16) && (t1000->cga.cgamode & 0x20) && (attr & 0x80) && !drawcursor); + + if (t1000->video_options & 1) + bold = boldcols[attr] ? chr : chr + 256; + else + bold = boldcols[attr] ? chr + 256 : chr; + if (t1000->video_options & 2) + bold += 512; + + if (t1000->cga.cgamode & 0x20) /* Blink */ { - chr = t1000->vram[(addr + 2 * x) & 0x3FFF]; - attr = t1000->vram[(addr + 2 * x + 1) & 0x3FFF]; - drawcursor = ((ma == ca) && cursorline && - (t1000->cga.cgamode & 8) && (t1000->cga.cgablink & 16)); - - blink = ((t1000->cga.cgablink & 16) && (t1000->cga.cgamode & 0x20) && - (attr & 0x80) && !drawcursor); - - if (t1000->video_options & 1) - bold = boldcols[attr] ? chr : chr + 256; - else - bold = boldcols[attr] ? chr + 256 : chr; - if (t1000->video_options & 2) - bold += 512; - - if (t1000->cga.cgamode & 0x20) /* Blink */ - { - cols[1] = blinkcols[attr][1]; - cols[0] = blinkcols[attr][0]; - if (blink) cols[1] = cols[0]; - } - else - { - cols[1] = normcols[attr][1]; - cols[0] = normcols[attr][0]; - } - if (drawcursor) - { - for (c = 0; c < 8; c++) - { - ((uint32_t *)buffer32->line[t1000->displine])[(x << 3) + c] = cols[(fontdat[bold][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (blue ^ grey); - } - } - else - { - for (c = 0; c < 8; c++) - ((uint32_t *)buffer32->line[t1000->displine])[(x << 3) + c] = cols[(fontdat[bold][sc] & (1 << (c ^ 7))) ? 1 : 0]; - } - ++ma; - } + cols[1] = blinkcols[attr][1]; + cols[0] = blinkcols[attr][0]; + if (blink) + cols[1] = cols[0]; + } else { + cols[1] = normcols[attr][1]; + cols[0] = normcols[attr][0]; + } + if (drawcursor) { + for (c = 0; c < 8; c++) { + ((uint32_t *) buffer32->line[t1000->displine])[(x << 3) + c] = cols[(fontdat[bold][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (blue ^ grey); + } + } else { + for (c = 0; c < 8; c++) + ((uint32_t *) buffer32->line[t1000->displine])[(x << 3) + c] = cols[(fontdat[bold][sc] & (1 << (c ^ 7))) ? 1 : 0]; + } + ++ma; + } } /* Draw a row of text in 40-column mode */ -static void t1000_text_row40(t1000_t *t1000) +static void +t1000_text_row40(t1000_t *t1000) { - uint32_t cols[2]; - int x, c; - uint8_t chr, attr; - int drawcursor; - int cursorline; - int bold; - int blink; - uint16_t addr; - uint8_t sc; - uint16_t ma = (t1000->cga.crtc[13] | (t1000->cga.crtc[12] << 8)) & 0x3fff; - uint16_t ca = (t1000->cga.crtc[15] | (t1000->cga.crtc[14] << 8)) & 0x3fff; + uint32_t cols[2]; + int x, c; + uint8_t chr, attr; + int drawcursor; + int cursorline; + int bold; + int blink; + uint16_t addr; + uint8_t sc; + uint16_t ma = (t1000->cga.crtc[13] | (t1000->cga.crtc[12] << 8)) & 0x3fff; + uint16_t ca = (t1000->cga.crtc[15] | (t1000->cga.crtc[14] << 8)) & 0x3fff; - sc = (t1000->displine) & 7; - addr = ((ma & ~1) + (t1000->displine >> 3) * 40) * 2; - ma += (t1000->displine >> 3) * 40; + sc = (t1000->displine) & 7; + addr = ((ma & ~1) + (t1000->displine >> 3) * 40) * 2; + ma += (t1000->displine >> 3) * 40; - if ((t1000->cga.crtc[10] & 0x60) == 0x20) - { - cursorline = 0; - } - else - { - cursorline = ((t1000->cga.crtc[10] & 0x0F) <= sc) && - ((t1000->cga.crtc[11] & 0x0F) >= sc); - } - for (x = 0; x < 40; x++) + if ((t1000->cga.crtc[10] & 0x60) == 0x20) { + cursorline = 0; + } else { + cursorline = ((t1000->cga.crtc[10] & 0x0F) <= sc) && ((t1000->cga.crtc[11] & 0x0F) >= sc); + } + for (x = 0; x < 40; x++) { + chr = t1000->vram[(addr + 2 * x) & 0x3FFF]; + attr = t1000->vram[(addr + 2 * x + 1) & 0x3FFF]; + drawcursor = ((ma == ca) && cursorline && (t1000->cga.cgamode & 8) && (t1000->cga.cgablink & 16)); + + blink = ((t1000->cga.cgablink & 16) && (t1000->cga.cgamode & 0x20) && (attr & 0x80) && !drawcursor); + + if (t1000->video_options & 1) + bold = boldcols[attr] ? chr : chr + 256; + else + bold = boldcols[attr] ? chr + 256 : chr; + if (t1000->video_options & 2) + bold += 512; + + if (t1000->cga.cgamode & 0x20) /* Blink */ { - chr = t1000->vram[(addr + 2 * x) & 0x3FFF]; - attr = t1000->vram[(addr + 2 * x + 1) & 0x3FFF]; - drawcursor = ((ma == ca) && cursorline && - (t1000->cga.cgamode & 8) && (t1000->cga.cgablink & 16)); - - blink = ((t1000->cga.cgablink & 16) && (t1000->cga.cgamode & 0x20) && - (attr & 0x80) && !drawcursor); - - if (t1000->video_options & 1) - bold = boldcols[attr] ? chr : chr + 256; - else - bold = boldcols[attr] ? chr + 256 : chr; - if (t1000->video_options & 2) - bold += 512; - - if (t1000->cga.cgamode & 0x20) /* Blink */ - { - cols[1] = blinkcols[attr][1]; - cols[0] = blinkcols[attr][0]; - if (blink) cols[1] = cols[0]; - } - else - { - cols[1] = normcols[attr][1]; - cols[0] = normcols[attr][0]; - } - if (drawcursor) - { - for (c = 0; c < 8; c++) - { - ((uint32_t *)buffer32->line[t1000->displine])[(x << 4) + c*2] = - ((uint32_t *)buffer32->line[t1000->displine])[(x << 4) + c*2 + 1] = cols[(fontdat[bold][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (blue ^ grey); - } - } - else - { - for (c = 0; c < 8; c++) - { - ((uint32_t *)buffer32->line[t1000->displine])[(x << 4) + c*2] = - ((uint32_t *)buffer32->line[t1000->displine])[(x << 4) + c*2+1] = cols[(fontdat[bold][sc] & (1 << (c ^ 7))) ? 1 : 0]; - } - } - ++ma; - } + cols[1] = blinkcols[attr][1]; + cols[0] = blinkcols[attr][0]; + if (blink) + cols[1] = cols[0]; + } else { + cols[1] = normcols[attr][1]; + cols[0] = normcols[attr][0]; + } + if (drawcursor) { + for (c = 0; c < 8; c++) { + ((uint32_t *) buffer32->line[t1000->displine])[(x << 4) + c * 2] = ((uint32_t *) buffer32->line[t1000->displine])[(x << 4) + c * 2 + 1] = cols[(fontdat[bold][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ (blue ^ grey); + } + } else { + for (c = 0; c < 8; c++) { + ((uint32_t *) buffer32->line[t1000->displine])[(x << 4) + c * 2] = ((uint32_t *) buffer32->line[t1000->displine])[(x << 4) + c * 2 + 1] = cols[(fontdat[bold][sc] & (1 << (c ^ 7))) ? 1 : 0]; + } + } + ++ma; + } } /* Draw a line in CGA 640x200 mode */ -static void t1000_cgaline6(t1000_t *t1000) +static void +t1000_cgaline6(t1000_t *t1000) { - int x, c; - uint8_t dat; - uint32_t ink = 0; - uint16_t addr; - uint32_t fg = (t1000->cga.cgacol & 0x0F) ? blue : grey; - uint32_t bg = grey; + int x, c; + uint8_t dat; + uint32_t ink = 0; + uint16_t addr; + uint32_t fg = (t1000->cga.cgacol & 0x0F) ? blue : grey; + uint32_t bg = grey; - uint16_t ma = (t1000->cga.crtc[13] | (t1000->cga.crtc[12] << 8)) & 0x3fff; + uint16_t ma = (t1000->cga.crtc[13] | (t1000->cga.crtc[12] << 8)) & 0x3fff; - addr = ((t1000->displine) & 1) * 0x2000 + - (t1000->displine >> 1) * 80 + - ((ma & ~1) << 1); + addr = ((t1000->displine) & 1) * 0x2000 + (t1000->displine >> 1) * 80 + ((ma & ~1) << 1); - for (x = 0; x < 80; x++) - { - dat = t1000->vram[addr & 0x3FFF]; - addr++; + for (x = 0; x < 80; x++) { + dat = t1000->vram[addr & 0x3FFF]; + addr++; - for (c = 0; c < 8; c++) - { - ink = (dat & 0x80) ? fg : bg; - if (!(t1000->cga.cgamode & 8)) - ink = grey; - ((uint32_t *)buffer32->line[t1000->displine])[x*8+c] = ink; - dat = dat << 1; - } - } + for (c = 0; c < 8; c++) { + ink = (dat & 0x80) ? fg : bg; + if (!(t1000->cga.cgamode & 8)) + ink = grey; + ((uint32_t *) buffer32->line[t1000->displine])[x * 8 + c] = ink; + dat = dat << 1; + } + } } /* Draw a line in CGA 320x200 mode. Here the CGA colours are converted to * dither patterns: colour 1 to 25% grey, colour 2 to 50% grey */ -static void t1000_cgaline4(t1000_t *t1000) +static void +t1000_cgaline4(t1000_t *t1000) { - int x, c; - uint8_t dat, pattern; - uint32_t ink0, ink1; - uint16_t addr; + int x, c; + uint8_t dat, pattern; + uint32_t ink0, ink1; + uint16_t addr; - uint16_t ma = (t1000->cga.crtc[13] | (t1000->cga.crtc[12] << 8)) & 0x3fff; - addr = ((t1000->displine) & 1) * 0x2000 + - (t1000->displine >> 1) * 80 + - ((ma & ~1) << 1); + uint16_t ma = (t1000->cga.crtc[13] | (t1000->cga.crtc[12] << 8)) & 0x3fff; + addr = ((t1000->displine) & 1) * 0x2000 + (t1000->displine >> 1) * 80 + ((ma & ~1) << 1); - for (x = 0; x < 80; x++) - { - dat = t1000->vram[addr & 0x3FFF]; - addr++; + for (x = 0; x < 80; x++) { + dat = t1000->vram[addr & 0x3FFF]; + addr++; - for (c = 0; c < 4; c++) - { - pattern = (dat & 0xC0) >> 6; - if (!(t1000->cga.cgamode & 8)) pattern = 0; + for (c = 0; c < 4; c++) { + pattern = (dat & 0xC0) >> 6; + if (!(t1000->cga.cgamode & 8)) + pattern = 0; - switch (pattern & 3) - { - default: - case 0: ink0 = ink1 = grey; break; - case 1: if (t1000->displine & 1) - { - ink0 = grey; ink1 = grey; - } - else - { - ink0 = blue; ink1 = grey; - } - break; - case 2: if (t1000->displine & 1) - { - ink0 = grey; ink1 = blue; - } - else - { - ink0 = blue; ink1 = grey; - } - break; - case 3: ink0 = ink1 = blue; break; - - } - ((uint32_t *)buffer32->line[t1000->displine])[x*8+2*c] = ink0; - ((uint32_t *)buffer32->line[t1000->displine])[x*8+2*c+1] = ink1; - dat = dat << 2; - } - } + switch (pattern & 3) { + default: + case 0: + ink0 = ink1 = grey; + break; + case 1: + if (t1000->displine & 1) { + ink0 = grey; + ink1 = grey; + } else { + ink0 = blue; + ink1 = grey; + } + break; + case 2: + if (t1000->displine & 1) { + ink0 = grey; + ink1 = blue; + } else { + ink0 = blue; + ink1 = grey; + } + break; + case 3: + ink0 = ink1 = blue; + break; + } + ((uint32_t *) buffer32->line[t1000->displine])[x * 8 + 2 * c] = ink0; + ((uint32_t *) buffer32->line[t1000->displine])[x * 8 + 2 * c + 1] = ink1; + dat = dat << 2; + } + } } -static void t1000_poll(void *p) +static void +t1000_poll(void *p) { - t1000_t *t1000 = (t1000_t *)p; + t1000_t *t1000 = (t1000_t *) p; - if (t1000->video_options != st_video_options || - t1000->enabled != st_enabled) - { - t1000->video_options = st_video_options; - t1000->enabled = st_enabled; + if (t1000->video_options != st_video_options || t1000->enabled != st_enabled) { + t1000->video_options = st_video_options; + t1000->enabled = st_enabled; - /* Set the font used for the external display */ - t1000->cga.fontbase = ((t1000->video_options & 3) * 256); + /* Set the font used for the external display */ + t1000->cga.fontbase = ((t1000->video_options & 3) * 256); - if (t1000->enabled) /* Disable internal chipset */ - mem_mapping_enable(&t1000->mapping); - else - mem_mapping_disable(&t1000->mapping); - } - /* Switch between internal plasma and external CRT display. */ - if (st_display_internal != -1 && st_display_internal != t1000->internal) - { - t1000->internal = st_display_internal; - t1000_recalctimings(t1000); - } - if (!t1000->internal) - { - cga_poll(&t1000->cga); - return; - } - - if (!t1000->linepos) - { - timer_advance_u64(&t1000->cga.timer, t1000->dispofftime); - t1000->cga.cgastat |= 1; - t1000->linepos = 1; - if (t1000->dispon) - { - if (t1000->displine == 0) - { - video_wait_for_buffer(); - } - - /* Graphics */ - if (t1000->cga.cgamode & 0x02) - { - if (t1000->cga.cgamode & 0x10) - t1000_cgaline6(t1000); - else t1000_cgaline4(t1000); - } - else - if (t1000->cga.cgamode & 0x01) /* High-res text */ - { - t1000_text_row80(t1000); - } - else - { - t1000_text_row40(t1000); - } - } - t1000->displine++; - /* Hardcode a fixed refresh rate and VSYNC timing */ - if (t1000->displine == 200) /* Start of VSYNC */ - { - t1000->cga.cgastat |= 8; - t1000->dispon = 0; - } - if (t1000->displine == 216) /* End of VSYNC */ - { - t1000->displine = 0; - t1000->cga.cgastat &= ~8; - t1000->dispon = 1; - } - } + if (t1000->enabled) /* Disable internal chipset */ + mem_mapping_enable(&t1000->mapping); else - { - if (t1000->dispon) - { - t1000->cga.cgastat &= ~1; - } - timer_advance_u64(&t1000->cga.timer, t1000->dispontime); - t1000->linepos = 0; - - if (t1000->displine == 200) - { - /* Hardcode 640x200 window size */ - if ((T1000_XSIZE != xsize) || (T1000_YSIZE != ysize) || video_force_resize_get()) - { - xsize = T1000_XSIZE; - ysize = T1000_YSIZE; - if (xsize < 64) xsize = 656; - if (ysize < 32) ysize = 200; - set_screen_size(xsize, ysize); - - if (video_force_resize_get()) - video_force_resize_set(0); - } - video_blit_memtoscreen(0, 0, xsize, ysize); - - frames++; - /* Fixed 640x200 resolution */ - video_res_x = T1000_XSIZE; - video_res_y = T1000_YSIZE; - - if (t1000->cga.cgamode & 0x02) - { - if (t1000->cga.cgamode & 0x10) - video_bpp = 1; - else video_bpp = 2; - - } - else video_bpp = 0; - t1000->cga.cgablink++; - } - } -} - -static void t1000_recalcattrs(t1000_t *t1000) -{ - int n; - - /* val behaves as follows: - * Bit 0: Attributes 01-06, 08-0E are inverse video - * Bit 1: Attributes 01-06, 08-0E are bold - * Bit 2: Attributes 11-16, 18-1F, 21-26, 28-2F ... F1-F6, F8-FF - * are inverse video - * Bit 3: Attributes 11-16, 18-1F, 21-26, 28-2F ... F1-F6, F8-FF - * are bold */ - - /* Set up colours */ - if (t1000->invert) { - if (t1000->backlight) { - grey = makecol(0x2D, 0x39, 0x5A); - blue = makecol(0x85, 0xa0, 0xD6); - } else { - grey = makecol(0x0f, 0x21, 0x3f); - blue = makecol(0x1C, 0x71, 0x31); - } - } else { - if (t1000->backlight) { - blue = makecol(0x2D, 0x39, 0x5A); - grey = makecol(0x85, 0xa0, 0xD6); - } else { - blue = makecol(0x0f, 0x21, 0x3f); - grey = makecol(0x1C, 0x71, 0x31); - } - } - - /* Initialise the attribute mapping. Start by defaulting everything - * to grey on blue, and with bold set by bit 3 */ - for (n = 0; n < 256; n++) - { - boldcols[n] = (n & 8) != 0; - blinkcols[n][0] = normcols[n][0] = blue; - blinkcols[n][1] = normcols[n][1] = grey; - } - - /* Colours 0x11-0xFF are controlled by bits 2 and 3 of the - * passed value. Exclude x0 and x8, which are always grey on - * blue. */ - for (n = 0x11; n <= 0xFF; n++) - { - if ((n & 7) == 0) continue; - if (t1000->attrmap & 4) /* Inverse */ - { - blinkcols[n][0] = normcols[n][0] = blue; - blinkcols[n][1] = normcols[n][1] = grey; - } - else /* Normal */ - { - blinkcols[n][0] = normcols[n][0] = grey; - blinkcols[n][1] = normcols[n][1] = blue; - } - if (t1000->attrmap & 8) boldcols[n] = 1; /* Bold */ - } - /* Set up the 01-0E range, controlled by bits 0 and 1 of the - * passed value. When blinking is enabled this also affects 81-8E. */ - for (n = 0x01; n <= 0x0E; n++) - { - if (n == 7) continue; - if (t1000->attrmap & 1) - { - blinkcols[n][0] = normcols[n][0] = blue; - blinkcols[n][1] = normcols[n][1] = grey; - blinkcols[n+128][0] = blue; - blinkcols[n+128][1] = grey; - } - else - { - blinkcols[n][0] = normcols[n][0] = grey; - blinkcols[n][1] = normcols[n][1] = blue; - blinkcols[n+128][0] = grey; - blinkcols[n+128][1] = blue; - } - if (t1000->attrmap & 2) boldcols[n] = 1; - } - /* Colours 07 and 0F are always blue on grey. If blinking is - * enabled so are 87 and 8F. */ - for (n = 0x07; n <= 0x0F; n += 8) - { - blinkcols[n][0] = normcols[n][0] = grey; - blinkcols[n][1] = normcols[n][1] = blue; - blinkcols[n+128][0] = grey; - blinkcols[n+128][1] = blue; - } - /* When not blinking, colours 81-8F are always blue on grey. */ - for (n = 0x81; n <= 0x8F; n ++) - { - normcols[n][0] = grey; - normcols[n][1] = blue; - boldcols[n] = (n & 0x08) != 0; - } - - - /* Finally do the ones which are solid grey. These differ between - * the normal and blinking mappings */ - for (n = 0; n <= 0xFF; n += 0x11) - { - normcols[n][0] = normcols[n][1] = grey; - } - /* In the blinking range, 00 11 22 .. 77 and 80 91 A2 .. F7 are grey */ - for (n = 0; n <= 0x77; n += 0x11) - { - blinkcols[n][0] = blinkcols[n][1] = grey; - blinkcols[n+128][0] = blinkcols[n+128][1] = grey; - } -} - - -static void *t1000_init(const device_t *info) -{ - t1000_t *t1000 = malloc(sizeof(t1000_t)); - memset(t1000, 0, sizeof(t1000_t)); - loadfont("roms/machines/t1000/t1000font.bin", 8); - cga_init(&t1000->cga); - video_inform(VIDEO_FLAG_TYPE_CGA, &timing_t1000); - - t1000->internal = 1; - - t1000->backlight = device_get_config_int("backlight"); - t1000->invert = device_get_config_int("invert"); - - /* 16k video RAM */ - t1000->vram = malloc(0x4000); - - timer_set_callback(&t1000->cga.timer, t1000_poll); - timer_set_p(&t1000->cga.timer, t1000); - - /* Occupy memory between 0xB8000 and 0xBFFFF */ - mem_mapping_add(&t1000->mapping, 0xb8000, 0x8000, t1000_read, NULL, NULL, t1000_write, NULL, NULL, NULL, 0, t1000); - /* Respond to CGA I/O ports */ - io_sethandler(0x03d0, 0x000c, t1000_in, NULL, NULL, t1000_out, NULL, NULL, t1000); - - /* Default attribute mapping is 4 */ - t1000->attrmap = 4; - t1000_recalcattrs(t1000); - - /* Start off in 80x25 text mode */ - t1000->cga.cgastat = 0xF4; - t1000->cga.vram = t1000->vram; - t1000->enabled = 1; - t1000->video_options = 0x01; - language = device_get_config_int("display_language") ? 2 : 0; - return t1000; -} - -static void t1000_close(void *p) -{ - t1000_t *t1000 = (t1000_t *)p; - - free(t1000->vram); - free(t1000); -} - -static void t1000_speed_changed(void *p) -{ - t1000_t *t1000 = (t1000_t *)p; - + mem_mapping_disable(&t1000->mapping); + } + /* Switch between internal plasma and external CRT display. */ + if (st_display_internal != -1 && st_display_internal != t1000->internal) { + t1000->internal = st_display_internal; t1000_recalctimings(t1000); + } + if (!t1000->internal) { + cga_poll(&t1000->cga); + return; + } + + if (!t1000->linepos) { + timer_advance_u64(&t1000->cga.timer, t1000->dispofftime); + t1000->cga.cgastat |= 1; + t1000->linepos = 1; + if (t1000->dispon) { + if (t1000->displine == 0) { + video_wait_for_buffer(); + } + + /* Graphics */ + if (t1000->cga.cgamode & 0x02) { + if (t1000->cga.cgamode & 0x10) + t1000_cgaline6(t1000); + else + t1000_cgaline4(t1000); + } else if (t1000->cga.cgamode & 0x01) /* High-res text */ + { + t1000_text_row80(t1000); + } else { + t1000_text_row40(t1000); + } + } + t1000->displine++; + /* Hardcode a fixed refresh rate and VSYNC timing */ + if (t1000->displine == 200) /* Start of VSYNC */ + { + t1000->cga.cgastat |= 8; + t1000->dispon = 0; + } + if (t1000->displine == 216) /* End of VSYNC */ + { + t1000->displine = 0; + t1000->cga.cgastat &= ~8; + t1000->dispon = 1; + } + } else { + if (t1000->dispon) { + t1000->cga.cgastat &= ~1; + } + timer_advance_u64(&t1000->cga.timer, t1000->dispontime); + t1000->linepos = 0; + + if (t1000->displine == 200) { + /* Hardcode 640x200 window size */ + if ((T1000_XSIZE != xsize) || (T1000_YSIZE != ysize) || video_force_resize_get()) { + xsize = T1000_XSIZE; + ysize = T1000_YSIZE; + if (xsize < 64) + xsize = 656; + if (ysize < 32) + ysize = 200; + set_screen_size(xsize, ysize); + + if (video_force_resize_get()) + video_force_resize_set(0); + } + video_blit_memtoscreen(0, 0, xsize, ysize); + + frames++; + /* Fixed 640x200 resolution */ + video_res_x = T1000_XSIZE; + video_res_y = T1000_YSIZE; + + if (t1000->cga.cgamode & 0x02) { + if (t1000->cga.cgamode & 0x10) + video_bpp = 1; + else + video_bpp = 2; + + } else + video_bpp = 0; + t1000->cga.cgablink++; + } + } +} + +static void +t1000_recalcattrs(t1000_t *t1000) +{ + int n; + + /* val behaves as follows: + * Bit 0: Attributes 01-06, 08-0E are inverse video + * Bit 1: Attributes 01-06, 08-0E are bold + * Bit 2: Attributes 11-16, 18-1F, 21-26, 28-2F ... F1-F6, F8-FF + * are inverse video + * Bit 3: Attributes 11-16, 18-1F, 21-26, 28-2F ... F1-F6, F8-FF + * are bold */ + + /* Set up colours */ + if (t1000->invert) { + if (t1000->backlight) { + grey = makecol(0x2D, 0x39, 0x5A); + blue = makecol(0x85, 0xa0, 0xD6); + } else { + grey = makecol(0x0f, 0x21, 0x3f); + blue = makecol(0x1C, 0x71, 0x31); + } + } else { + if (t1000->backlight) { + blue = makecol(0x2D, 0x39, 0x5A); + grey = makecol(0x85, 0xa0, 0xD6); + } else { + blue = makecol(0x0f, 0x21, 0x3f); + grey = makecol(0x1C, 0x71, 0x31); + } + } + + /* Initialise the attribute mapping. Start by defaulting everything + * to grey on blue, and with bold set by bit 3 */ + for (n = 0; n < 256; n++) { + boldcols[n] = (n & 8) != 0; + blinkcols[n][0] = normcols[n][0] = blue; + blinkcols[n][1] = normcols[n][1] = grey; + } + + /* Colours 0x11-0xFF are controlled by bits 2 and 3 of the + * passed value. Exclude x0 and x8, which are always grey on + * blue. */ + for (n = 0x11; n <= 0xFF; n++) { + if ((n & 7) == 0) + continue; + if (t1000->attrmap & 4) /* Inverse */ + { + blinkcols[n][0] = normcols[n][0] = blue; + blinkcols[n][1] = normcols[n][1] = grey; + } else /* Normal */ + { + blinkcols[n][0] = normcols[n][0] = grey; + blinkcols[n][1] = normcols[n][1] = blue; + } + if (t1000->attrmap & 8) + boldcols[n] = 1; /* Bold */ + } + /* Set up the 01-0E range, controlled by bits 0 and 1 of the + * passed value. When blinking is enabled this also affects 81-8E. */ + for (n = 0x01; n <= 0x0E; n++) { + if (n == 7) + continue; + if (t1000->attrmap & 1) { + blinkcols[n][0] = normcols[n][0] = blue; + blinkcols[n][1] = normcols[n][1] = grey; + blinkcols[n + 128][0] = blue; + blinkcols[n + 128][1] = grey; + } else { + blinkcols[n][0] = normcols[n][0] = grey; + blinkcols[n][1] = normcols[n][1] = blue; + blinkcols[n + 128][0] = grey; + blinkcols[n + 128][1] = blue; + } + if (t1000->attrmap & 2) + boldcols[n] = 1; + } + /* Colours 07 and 0F are always blue on grey. If blinking is + * enabled so are 87 and 8F. */ + for (n = 0x07; n <= 0x0F; n += 8) { + blinkcols[n][0] = normcols[n][0] = grey; + blinkcols[n][1] = normcols[n][1] = blue; + blinkcols[n + 128][0] = grey; + blinkcols[n + 128][1] = blue; + } + /* When not blinking, colours 81-8F are always blue on grey. */ + for (n = 0x81; n <= 0x8F; n++) { + normcols[n][0] = grey; + normcols[n][1] = blue; + boldcols[n] = (n & 0x08) != 0; + } + + /* Finally do the ones which are solid grey. These differ between + * the normal and blinking mappings */ + for (n = 0; n <= 0xFF; n += 0x11) { + normcols[n][0] = normcols[n][1] = grey; + } + /* In the blinking range, 00 11 22 .. 77 and 80 91 A2 .. F7 are grey */ + for (n = 0; n <= 0x77; n += 0x11) { + blinkcols[n][0] = blinkcols[n][1] = grey; + blinkcols[n + 128][0] = blinkcols[n + 128][1] = grey; + } +} + +static void * +t1000_init(const device_t *info) +{ + t1000_t *t1000 = malloc(sizeof(t1000_t)); + memset(t1000, 0, sizeof(t1000_t)); + loadfont("roms/machines/t1000/t1000font.bin", 8); + cga_init(&t1000->cga); + video_inform(VIDEO_FLAG_TYPE_CGA, &timing_t1000); + + t1000->internal = 1; + + t1000->backlight = device_get_config_int("backlight"); + t1000->invert = device_get_config_int("invert"); + + /* 16k video RAM */ + t1000->vram = malloc(0x4000); + + timer_set_callback(&t1000->cga.timer, t1000_poll); + timer_set_p(&t1000->cga.timer, t1000); + + /* Occupy memory between 0xB8000 and 0xBFFFF */ + mem_mapping_add(&t1000->mapping, 0xb8000, 0x8000, t1000_read, NULL, NULL, t1000_write, NULL, NULL, NULL, 0, t1000); + /* Respond to CGA I/O ports */ + io_sethandler(0x03d0, 0x000c, t1000_in, NULL, NULL, t1000_out, NULL, NULL, t1000); + + /* Default attribute mapping is 4 */ + t1000->attrmap = 4; + t1000_recalcattrs(t1000); + + /* Start off in 80x25 text mode */ + t1000->cga.cgastat = 0xF4; + t1000->cga.vram = t1000->vram; + t1000->enabled = 1; + t1000->video_options = 0x01; + language = device_get_config_int("display_language") ? 2 : 0; + return t1000; +} + +static void +t1000_close(void *p) +{ + t1000_t *t1000 = (t1000_t *) p; + + free(t1000->vram); + free(t1000); +} + +static void +t1000_speed_changed(void *p) +{ + t1000_t *t1000 = (t1000_t *) p; + + t1000_recalctimings(t1000); } static const device_config_t t1000_config[] = { + // clang-format off { .name = "display_language", .description = "Language", @@ -766,32 +723,33 @@ static const device_config_t t1000_config[] = { .default_int = 0 }, { .name = "", .description = "", .type = CONFIG_END } + // clang-format on }; const device_t t1000_video_device = { - .name = "Toshiba T1000 Video", + .name = "Toshiba T1000 Video", .internal_name = "t1000_video", - .flags = 0, - .local = 0, - .init = t1000_init, - .close = t1000_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = t1000_init, + .close = t1000_close, + .reset = NULL, { .available = NULL }, .speed_changed = t1000_speed_changed, - .force_redraw = NULL, - .config = t1000_config + .force_redraw = NULL, + .config = t1000_config }; const device_t t1200_video_device = { - .name = "Toshiba T1200 Video", + .name = "Toshiba T1200 Video", .internal_name = "t1200_video", - .flags = 0, - .local = 0, - .init = t1000_init, - .close = t1000_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = t1000_init, + .close = t1000_close, + .reset = NULL, { .available = NULL }, .speed_changed = t1000_speed_changed, - .force_redraw = NULL, - .config = t1000_config + .force_redraw = NULL, + .config = t1000_config }; diff --git a/src/machine/m_xt_xi8088.c b/src/machine/m_xt_xi8088.c index 2a6187570..bbbc1a42c 100644 --- a/src/machine/m_xt_xi8088.c +++ b/src/machine/m_xt_xi8088.c @@ -27,17 +27,14 @@ #include <86box/m_xt_xi8088.h> -typedef struct xi8088_t -{ - uint8_t turbo; +typedef struct xi8088_t { + uint8_t turbo; - int turbo_setting; - int bios_128kb; + int turbo_setting; + int bios_128kb; } xi8088_t; - -static xi8088_t xi8088; - +static xi8088_t xi8088; uint8_t xi8088_turbo_get() @@ -45,53 +42,51 @@ xi8088_turbo_get() return xi8088.turbo; } - void xi8088_turbo_set(uint8_t value) { int c; if (!xi8088.turbo_setting) - return; + return; xi8088.turbo = value; if (!value) { - c = cpu; - cpu = 0; /* 8088/4.77 */ - cpu_set(); - cpu = c; + c = cpu; + cpu = 0; /* 8088/4.77 */ + cpu_set(); + cpu = c; } else - cpu_set(); + cpu_set(); } - int xi8088_bios_128kb(void) { return xi8088.bios_128kb; } - static void * xi8088_init(const device_t *info) { - xi8088.turbo = 1; + xi8088.turbo = 1; xi8088.turbo_setting = device_get_config_int("turbo_setting"); - xi8088.bios_128kb = device_get_config_int("bios_128kb"); + xi8088.bios_128kb = device_get_config_int("bios_128kb"); - mem_set_mem_state(0x0a0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - mem_set_mem_state(0x0c0000, 0x08000, device_get_config_int("umb_c0000h_c7fff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); - mem_set_mem_state(0x0c8000, 0x08000, device_get_config_int("umb_c8000h_cffff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); - mem_set_mem_state(0x0d0000, 0x08000, device_get_config_int("umb_d0000h_d7fff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); - mem_set_mem_state(0x0d8000, 0x08000, device_get_config_int("umb_d8000h_dffff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); - mem_set_mem_state(0x0e0000, 0x08000, device_get_config_int("umb_e0000h_e7fff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); - mem_set_mem_state(0x0e8000, 0x08000, device_get_config_int("umb_e8000h_effff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); - mem_set_mem_state(0x0f0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + mem_set_mem_state(0x0a0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + mem_set_mem_state(0x0c0000, 0x08000, device_get_config_int("umb_c0000h_c7fff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); + mem_set_mem_state(0x0c8000, 0x08000, device_get_config_int("umb_c8000h_cffff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); + mem_set_mem_state(0x0d0000, 0x08000, device_get_config_int("umb_d0000h_d7fff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); + mem_set_mem_state(0x0d8000, 0x08000, device_get_config_int("umb_d8000h_dffff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); + mem_set_mem_state(0x0e0000, 0x08000, device_get_config_int("umb_e0000h_e7fff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); + mem_set_mem_state(0x0e8000, 0x08000, device_get_config_int("umb_e8000h_effff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); + mem_set_mem_state(0x0f0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); return &xi8088; } static const device_config_t xi8088_config[] = { + // clang-format off { .name = "turbo_setting", .description = "Turbo", @@ -161,20 +156,21 @@ static const device_config_t xi8088_config[] = { .default_int = 0 }, { .name = "", .description = "", .type = CONFIG_END } + // clang-format on }; const device_t xi8088_device = { - .name = "Xi8088", + .name = "Xi8088", .internal_name = "xi8088", - .flags = 0, - .local = 0, - .init = xi8088_init, - .close = NULL, - .reset = NULL, + .flags = 0, + .local = 0, + .init = xi8088_init, + .close = NULL, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = xi8088_config + .force_redraw = NULL, + .config = xi8088_config }; int @@ -183,29 +179,29 @@ machine_xt_xi8088_init(const machine_t *model) int ret; if (bios_only) { - ret = bios_load_linear_inverted("roms/machines/xi8088/bios-xi8088-128k.bin", - 0x000e0000, 131072, 0); - ret |= bios_load_linear("roms/machines/xi8088/bios-xi8088.bin", - 0x000f0000, 65536, 0); + ret = bios_load_linear_inverted("roms/machines/xi8088/bios-xi8088-128k.bin", + 0x000e0000, 131072, 0); + ret |= bios_load_linear("roms/machines/xi8088/bios-xi8088.bin", + 0x000f0000, 65536, 0); } else { - device_add(&xi8088_device); + device_add(&xi8088_device); - if (xi8088_bios_128kb()) { - ret = bios_load_linear_inverted("roms/machines/xi8088/bios-xi8088-128k.bin", - 0x000e0000, 131072, 0); - } else { - ret = bios_load_linear("roms/machines/xi8088/bios-xi8088.bin", - 0x000f0000, 65536, 0); - } + if (xi8088_bios_128kb()) { + ret = bios_load_linear_inverted("roms/machines/xi8088/bios-xi8088-128k.bin", + 0x000e0000, 131072, 0); + } else { + ret = bios_load_linear("roms/machines/xi8088/bios-xi8088.bin", + 0x000f0000, 65536, 0); + } } if (bios_only || !ret) - return ret; + return ret; machine_common_init(model); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_at_device); device_add(&keyboard_ps2_xi8088_device); device_add(&port_6x_xi8088_device); @@ -213,7 +209,7 @@ machine_xt_xi8088_init(const machine_t *model) device_add(&ibmat_nvr_device); pic2_init(); standalone_gameport_type = &gameport_device; - device_add(&sst_flash_39sf010_device); + device_add(&sst_flash_39sf010_device); return ret; } diff --git a/src/machine/m_xt_zenith.c b/src/machine/m_xt_zenith.c index 6eab9aee2..c8d1f53f7 100644 --- a/src/machine/m_xt_zenith.c +++ b/src/machine/m_xt_zenith.c @@ -47,78 +47,74 @@ #include <86box/io.h> #include <86box/vid_cga.h> - typedef struct { mem_mapping_t scratchpad_mapping; - uint8_t *scratchpad_ram; + uint8_t *scratchpad_ram; } zenith_t; - static uint8_t zenith_scratchpad_read(uint32_t addr, void *p) { - zenith_t *dev = (zenith_t *)p; + zenith_t *dev = (zenith_t *) p; return dev->scratchpad_ram[addr & 0x3fff]; } - static void zenith_scratchpad_write(uint32_t addr, uint8_t val, void *p) { - zenith_t *dev = (zenith_t *)p; + zenith_t *dev = (zenith_t *) p; dev->scratchpad_ram[addr & 0x3fff] = val; } - static void * zenith_scratchpad_init(const device_t *info) { zenith_t *dev; - dev = (zenith_t *)malloc(sizeof(zenith_t)); + dev = (zenith_t *) malloc(sizeof(zenith_t)); memset(dev, 0x00, sizeof(zenith_t)); dev->scratchpad_ram = malloc(0x4000); mem_mapping_add(&dev->scratchpad_mapping, 0xf0000, 0x4000, - zenith_scratchpad_read, NULL, NULL, - zenith_scratchpad_write, NULL, NULL, - dev->scratchpad_ram, MEM_MAPPING_EXTERNAL, dev); + zenith_scratchpad_read, NULL, NULL, + zenith_scratchpad_write, NULL, NULL, + dev->scratchpad_ram, MEM_MAPPING_EXTERNAL, dev); return dev; } - static void zenith_scratchpad_close(void *p) { - zenith_t *dev = (zenith_t *)p; + zenith_t *dev = (zenith_t *) p; free(dev->scratchpad_ram); free(dev); } static const device_t zenith_scratchpad_device = { - .name = "Zenith scratchpad RAM", + .name = "Zenith scratchpad RAM", .internal_name = "zenith_scratchpad", - .flags = 0, - .local = 0, - .init = zenith_scratchpad_init, - .close = zenith_scratchpad_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = zenith_scratchpad_init, + .close = zenith_scratchpad_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; void -machine_zenith_init(const machine_t *model){ +machine_zenith_init(const machine_t *model) +{ machine_common_init(model); if (fdc_type == FDC_INTERNAL) - device_add(&fdc_xt_device); + device_add(&fdc_xt_device); device_add(&zenith_scratchpad_device); @@ -127,7 +123,6 @@ machine_zenith_init(const machine_t *model){ device_add(&keyboard_xt_zenith_device); nmi_init(); - } /* @@ -140,18 +135,18 @@ machine_xt_z184_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/zdsupers/z184m v3.1d.10d", - 0x000f8000, 32768, 0); + 0x000f8000, 32768, 0); if (bios_only || !ret) - return ret; + return ret; machine_zenith_init(model); - lpt1_remove(); /* only one parallel port */ + lpt1_remove(); /* only one parallel port */ lpt2_remove(); lpt1_init(0x278); device_add(&ns8250_device); - serial_set_next_inst(SERIAL_MAX); /* So that serial_standalone_init() won't do anything. */ + serial_set_next_inst(SERIAL_MAX); /* So that serial_standalone_init() won't do anything. */ device_add(&cga_device); @@ -163,14 +158,14 @@ machine_xt_z151_init(const machine_t *model) { int ret; ret = bios_load_linear("roms/machines/zdsz151/444-229-18.bin", - 0x000fc000, 32768, 0); + 0x000fc000, 32768, 0); if (ret) { bios_load_aux_linear("roms/machines/zdsz151/444-260-18.bin", - 0x000f8000, 16384, 0); + 0x000f8000, 16384, 0); } if (bios_only || !ret) - return ret; + return ret; machine_zenith_init(model); @@ -187,15 +182,15 @@ machine_xt_z159_init(const machine_t *model) int ret; ret = bios_load_linear("roms/machines/zdsz159/z159m v2.9e.10d", - 0x000f8000, 32768, 0); + 0x000f8000, 32768, 0); if (bios_only || !ret) - return ret; + return ret; machine_zenith_init(model); /* parallel port is on the memory board */ - lpt1_remove(); /* only one parallel port */ + lpt1_remove(); /* only one parallel port */ lpt2_remove(); lpt1_init(0x278); diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 7194ca2d9..6a2624fec 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -663,21 +663,21 @@ const machine_t machines[] = { .max_voltage = 0, .min_multi = 0, .max_multi = 0, - }, + }, .bus_flags = MACHINE_PC, .flags = MACHINE_FLAGS_NONE, .ram = { .min = 128, .max = 640, .step = 64, - }, + }, .nvrmask = 0, .kbc = KBC_IBM_PC_XT, .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, .vid_device = NULL - }, + }, { .name = "[8088] Multitech PC-500", .internal_name = "pc500", From a04710b5176eb5af7bb3776d96f6cbef075f9069 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 27 Jul 2022 17:00:34 -0400 Subject: [PATCH 173/386] clang-format in src/win and other misc places --- src/device/ibm_5161.c | 78 +- src/device/serial.c | 874 ++- src/include/86box/86box.h | 235 +- src/include/86box/config.h | 60 +- src/include/86box/device.h | 193 +- src/include/86box/lpt.h | 85 +- src/include/86box/m_amstrad.h | 5 +- src/include/86box/m_at_t3100e.h | 25 +- src/include/86box/m_xt_t1000.h | 21 +- src/include/86box/m_xt_xi8088.h | 8 +- src/include/86box/machine.h | 744 +- src/include/86box/mouse.h | 94 +- src/include/86box/serial.h | 108 +- src/include/86box/snd_opl.h | 10 +- src/include/86box/snd_opl_nuked.h | 1 - src/include/86box/snd_sb.h | 8 +- src/include/86box/snd_sb_dsp.h | 2 +- src/include/86box/vid_8514a.h | 79 +- src/include/86box/vid_ati_eeprom.h | 61 +- src/include/86box/vid_cga.h | 57 +- src/include/86box/vid_cga_comp.h | 14 +- src/include/86box/vid_colorplus.h | 9 +- src/include/86box/vid_ddc.h | 8 +- src/include/86box/vid_ega.h | 74 +- src/include/86box/vid_ega_render_remap.h | 77 +- src/include/86box/vid_hercules.h | 73 +- src/include/86box/vid_mda.h | 52 +- src/include/86box/vid_nga.h | 15 +- src/include/86box/vid_ogc.h | 17 +- src/include/86box/vid_pgc.h | 232 +- src/include/86box/vid_pgc_palette.h | 3111 ++++---- src/include/86box/vid_svga.h | 295 +- src/include/86box/vid_svga_render.h | 4 +- src/include/86box/vid_svga_render_remap.h | 161 +- src/include/86box/vid_vga.h | 15 +- src/include/86box/vid_voodoo_banshee.h | 2 +- .../86box/vid_voodoo_banshee_blitter.h | 2 +- src/include/86box/vid_voodoo_blitter.h | 2 +- src/include/86box/vid_voodoo_codegen_x86-64.h | 6356 ++++++++--------- src/include/86box/vid_voodoo_codegen_x86.h | 6235 ++++++++-------- src/include/86box/vid_voodoo_common.h | 773 +- src/include/86box/vid_voodoo_display.h | 2 +- src/include/86box/vid_voodoo_fb.h | 6 +- src/include/86box/vid_voodoo_fifo.h | 2 +- src/include/86box/vid_voodoo_reg.h | 2 +- src/include/86box/vid_voodoo_regs.h | 1096 ++- src/include/86box/vid_voodoo_render.h | 591 +- src/include/86box/vid_voodoo_setup.h | 2 +- src/include/86box/vid_voodoo_texture.h | 27 +- src/include/86box/vid_xga.h | 96 +- src/include/86box/vid_xga_device.h | 4 +- src/include/86box/video.h | 345 +- src/include/86box/win.h | 290 +- src/include/86box/win_opengl.h | 4 +- src/include/86box/win_opengl_glslp.h | 2 +- src/include/86box/win_sdl.h | 23 +- src/lpt.c | 159 +- src/win/glad.c | 1598 +++-- src/win/win.c | 907 ++- src/win/win_about.c | 31 +- src/win/win_cdrom.c | 47 +- src/win/win_devconf.c | 1068 ++- src/win/win_dialog.c | 182 +- src/win/win_dynld.c | 44 +- src/win/win_icon.c | 216 +- src/win/win_joystick_rawinput.c | 790 +- src/win/win_joystick_xinput.c | 335 +- src/win/win_jsconf.c | 863 ++- src/win/win_keyboard.c | 226 +- src/win/win_media_menu.c | 678 +- src/win/win_mouse.c | 129 +- src/win/win_new_floppy.c | 1029 ++- src/win/win_opendir.c | 101 +- src/win/win_opengl.c | 1476 ++-- src/win/win_opengl_glslp.c | 272 +- src/win/win_preferences.c | 279 +- src/win/win_sdl.c | 372 +- src/win/win_settings.c | 6201 ++++++++-------- src/win/win_snd_gain.c | 69 +- src/win/win_specify_dim.c | 210 +- src/win/win_stbar.c | 1098 ++- src/win/win_thread.c | 73 +- src/win/win_toolbar.c | 184 +- src/win/win_ui.c | 1911 +++-- 84 files changed, 21160 insertions(+), 22155 deletions(-) diff --git a/src/device/ibm_5161.c b/src/device/ibm_5161.c index 3da5a2797..9e47199b7 100644 --- a/src/device/ibm_5161.c +++ b/src/device/ibm_5161.c @@ -32,10 +32,9 @@ typedef struct { - uint8_t regs[8]; + uint8_t regs[8]; } ibm_5161_t; - static void ibm_5161_out(uint16_t port, uint8_t val, void *priv) { @@ -44,47 +43,45 @@ ibm_5161_out(uint16_t port, uint8_t val, void *priv) dev->regs[port & 0x0007] = val; } - static uint8_t ibm_5161_in(uint16_t port, void *priv) { ibm_5161_t *dev = (ibm_5161_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; ret = dev->regs[port & 0x0007]; switch (port) { - case 0x210: /* Write to latch expansion bus data (ED0-ED7) */ - /* Read to verify expansion bus data (ED0-ED7) */ - break; - case 0x214: /* Write to latch data bus bits (DO - 07) */ - /* Read data bus bits (DO - D7) */ - break; - case 0x211: /* Read high-order address bits (A8 - A 15) */ - case 0x215: /* Read high-order address bits (A8 - A 15) */ - ret = (get_last_addr() >> 8) & 0xff; - break; - case 0x212: /* Read low-order address bits (A0 - A7) */ - case 0x216: /* Read low-order address bits (A0 - A7) */ - ret = get_last_addr() & 0xff; - break; - case 0x213: /* Write 00 to disable expansion unit */ - /* Write 01 to enable expansion unit */ - /* Read status of expansion unit - 00 = enable/disable - 01 = wait-state request flag - 02-03 = not used - 04-07 = switch position - 1 = Off - 0 =On */ - ret = dev->regs[3] & 0x01; - break; + case 0x210: /* Write to latch expansion bus data (ED0-ED7) */ + /* Read to verify expansion bus data (ED0-ED7) */ + break; + case 0x214: /* Write to latch data bus bits (DO - 07) */ + /* Read data bus bits (DO - D7) */ + break; + case 0x211: /* Read high-order address bits (A8 - A 15) */ + case 0x215: /* Read high-order address bits (A8 - A 15) */ + ret = (get_last_addr() >> 8) & 0xff; + break; + case 0x212: /* Read low-order address bits (A0 - A7) */ + case 0x216: /* Read low-order address bits (A0 - A7) */ + ret = get_last_addr() & 0xff; + break; + case 0x213: /* Write 00 to disable expansion unit */ + /* Write 01 to enable expansion unit */ + /* Read status of expansion unit + 00 = enable/disable + 01 = wait-state request flag + 02-03 = not used + 04-07 = switch position + 1 = Off + 0 =On */ + ret = dev->regs[3] & 0x01; + break; } return ret; } - static void ibm_5161_close(void *p) { @@ -93,7 +90,6 @@ ibm_5161_close(void *p) free(dev); } - static void * ibm_5161_init(const device_t *info) { @@ -102,25 +98,25 @@ ibm_5161_init(const device_t *info) /* Extender Card Registers */ io_sethandler(0x0210, 0x0004, - ibm_5161_in, NULL, NULL, ibm_5161_out, NULL, NULL, dev); + ibm_5161_in, NULL, NULL, ibm_5161_out, NULL, NULL, dev); /* Receiver Card Registers */ io_sethandler(0x0214, 0x0003, - ibm_5161_in, NULL, NULL, ibm_5161_out, NULL, NULL, dev); + ibm_5161_in, NULL, NULL, ibm_5161_out, NULL, NULL, dev); return dev; } const device_t ibm_5161_device = { - .name = "IBM Expansion Unit (5161)", + .name = "IBM Expansion Unit (5161)", .internal_name = "ibm_5161", - .flags = DEVICE_ISA, - .local = 0, - .init = ibm_5161_init, - .close = ibm_5161_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = ibm_5161_init, + .close = ibm_5161_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/device/serial.c b/src/device/serial.c index c801c20f8..ebc87cd59 100644 --- a/src/device/serial.c +++ b/src/device/serial.c @@ -38,55 +38,48 @@ #include <86box/serial.h> #include <86box/mouse.h> - -enum -{ - SERIAL_INT_LSR = 1, - SERIAL_INT_RECEIVE = 2, +enum { + SERIAL_INT_LSR = 1, + SERIAL_INT_RECEIVE = 2, SERIAL_INT_TRANSMIT = 4, - SERIAL_INT_MSR = 8, - SERIAL_INT_TIMEOUT = 16 + SERIAL_INT_MSR = 8, + SERIAL_INT_TIMEOUT = 16 }; - -static int next_inst = 0; -static serial_device_t serial_devices[SERIAL_MAX]; - +static int next_inst = 0; +static serial_device_t serial_devices[SERIAL_MAX]; #ifdef ENABLE_SERIAL_LOG int serial_do_log = ENABLE_SERIAL_LOG; - static void serial_log(const char *fmt, ...) { va_list ap; if (serial_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define serial_log(fmt, ...) +# define serial_log(fmt, ...) #endif - void serial_reset_port(serial_t *dev) { - dev->lsr = 0x60; /* Mark that both THR/FIFO and TXSR are empty. */ + dev->lsr = 0x60; /* Mark that both THR/FIFO and TXSR are empty. */ dev->iir = dev->ier = dev->lcr = dev->fcr = 0; - dev->fifo_enabled = 0; + dev->fifo_enabled = 0; dev->xmit_fifo_pos = dev->rcvr_fifo_pos = 0; - dev->rcvr_fifo_full = 0; - dev->baud_cycles = 0; + dev->rcvr_fifo_full = 0; + dev->baud_cycles = 0; memset(dev->xmit_fifo, 0, 16); memset(dev->rcvr_fifo, 0, 14); } - void serial_transmit_period(serial_t *dev) { @@ -98,7 +91,6 @@ serial_transmit_period(serial_t *dev) dev->transmit_period = (16000000.0 * ddlab) / dev->clock_src; } - void serial_update_ints(serial_t *dev) { @@ -107,37 +99,36 @@ serial_update_ints(serial_t *dev) dev->iir = 1; if ((dev->ier & 4) && (dev->int_status & SERIAL_INT_LSR)) { - /* Line status interrupt */ - stat = 1; - dev->iir = 6; + /* Line status interrupt */ + stat = 1; + dev->iir = 6; } else if ((dev->ier & 1) && (dev->int_status & SERIAL_INT_TIMEOUT)) { - /* Received data available */ - stat = 1; - dev->iir = 0x0c; + /* Received data available */ + stat = 1; + dev->iir = 0x0c; } else if ((dev->ier & 1) && (dev->int_status & SERIAL_INT_RECEIVE)) { - /* Received data available */ - stat = 1; - dev->iir = 4; + /* Received data available */ + stat = 1; + dev->iir = 4; } else if ((dev->ier & 2) && (dev->int_status & SERIAL_INT_TRANSMIT)) { - /* Transmit data empty */ - stat = 1; - dev->iir = 2; + /* Transmit data empty */ + stat = 1; + dev->iir = 2; } else if ((dev->ier & 8) && (dev->int_status & SERIAL_INT_MSR)) { - /* Modem status interrupt */ - stat = 1; - dev->iir = 0; + /* Modem status interrupt */ + stat = 1; + dev->iir = 0; } if (stat && (dev->irq != 0xff) && ((dev->mctrl & 8) || (dev->type == SERIAL_8250_PCJR))) { - if (dev->type >= SERIAL_16450) - picintlevel(1 << dev->irq); - else - picint(1 << dev->irq); + if (dev->type >= SERIAL_16450) + picintlevel(1 << dev->irq); + else + picint(1 << dev->irq); } else - picintc(1 << dev->irq); + picintc(1 << dev->irq); } - static void serial_clear_timeout(serial_t *dev) { @@ -147,103 +138,98 @@ serial_clear_timeout(serial_t *dev) serial_update_ints(dev); } - static void write_fifo(serial_t *dev, uint8_t dat) { serial_log("write_fifo(%08X, %02X, %i, %i)\n", dev, dat, (dev->type >= SERIAL_16550) && dev->fifo_enabled, dev->rcvr_fifo_pos & 0x0f); if ((dev->type >= SERIAL_16550) && dev->fifo_enabled) { - /* FIFO mode. */ - timer_disable(&dev->timeout_timer); - /* Indicate overrun. */ - if (dev->rcvr_fifo_full) - dev->lsr |= 0x02; - else - dev->rcvr_fifo[dev->rcvr_fifo_pos] = dat; - dev->lsr &= 0xfe; - dev->int_status &= ~SERIAL_INT_RECEIVE; - if (dev->rcvr_fifo_pos == (dev->rcvr_fifo_len - 1)) { - dev->lsr |= 0x01; - dev->int_status |= SERIAL_INT_RECEIVE; - } - if (dev->rcvr_fifo_pos < 15) - dev->rcvr_fifo_pos++; - else - dev->rcvr_fifo_full = 1; - serial_update_ints(dev); + /* FIFO mode. */ + timer_disable(&dev->timeout_timer); + /* Indicate overrun. */ + if (dev->rcvr_fifo_full) + dev->lsr |= 0x02; + else + dev->rcvr_fifo[dev->rcvr_fifo_pos] = dat; + dev->lsr &= 0xfe; + dev->int_status &= ~SERIAL_INT_RECEIVE; + if (dev->rcvr_fifo_pos == (dev->rcvr_fifo_len - 1)) { + dev->lsr |= 0x01; + dev->int_status |= SERIAL_INT_RECEIVE; + } + if (dev->rcvr_fifo_pos < 15) + dev->rcvr_fifo_pos++; + else + dev->rcvr_fifo_full = 1; + serial_update_ints(dev); timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period); } else { - /* Non-FIFO mode. */ - /* Indicate overrun. */ - if (dev->lsr & 0x01) - dev->lsr |= 0x02; - dev->dat = dat; - dev->lsr |= 0x01; - dev->int_status |= SERIAL_INT_RECEIVE; - serial_update_ints(dev); + /* Non-FIFO mode. */ + /* Indicate overrun. */ + if (dev->lsr & 0x01) + dev->lsr |= 0x02; + dev->dat = dat; + dev->lsr |= 0x01; + dev->int_status |= SERIAL_INT_RECEIVE; + serial_update_ints(dev); } } - void serial_write_fifo(serial_t *dev, uint8_t dat) { serial_log("serial_write_fifo(%08X, %02X, %i, %i)\n", dev, dat, (dev->type >= SERIAL_16550) && dev->fifo_enabled, dev->rcvr_fifo_pos & 0x0f); if (!(dev->mctrl & 0x10)) - write_fifo(dev, dat); + write_fifo(dev, dat); } - void serial_transmit(serial_t *dev, uint8_t val) { if (dev->mctrl & 0x10) - write_fifo(dev, val); + write_fifo(dev, val); else if (dev->sd->dev_write) - dev->sd->dev_write(dev, dev->sd->priv, val); + dev->sd->dev_write(dev, dev->sd->priv, val); } - static void serial_move_to_txsr(serial_t *dev) { int i = 0; if (dev->fifo_enabled) { - dev->txsr = dev->xmit_fifo[0]; - if (dev->xmit_fifo_pos > 0) { - /* Move the entire fifo forward by one byte. */ - for (i = 1; i < 16; i++) - dev->xmit_fifo[i - 1] = dev->xmit_fifo[i]; - /* Decrease FIFO position. */ - dev->xmit_fifo_pos--; - } + dev->txsr = dev->xmit_fifo[0]; + if (dev->xmit_fifo_pos > 0) { + /* Move the entire fifo forward by one byte. */ + for (i = 1; i < 16; i++) + dev->xmit_fifo[i - 1] = dev->xmit_fifo[i]; + /* Decrease FIFO position. */ + dev->xmit_fifo_pos--; + } } else { - dev->txsr = dev->thr; - dev->thr = 0; + dev->txsr = dev->thr; + dev->thr = 0; } dev->lsr &= ~0x40; serial_log("serial_move_to_txsr(): FIFO %sabled, FIFO pos = %i\n", dev->fifo_enabled ? "en" : "dis", dev->xmit_fifo_pos & 0x0f); if (!dev->fifo_enabled || (dev->xmit_fifo_pos == 0x0)) { - /* Update interrupts to signal THRE and that TXSR is no longer empty. */ - dev->lsr |= 0x20; - dev->int_status |= SERIAL_INT_TRANSMIT; - serial_update_ints(dev); + /* Update interrupts to signal THRE and that TXSR is no longer empty. */ + dev->lsr |= 0x20; + dev->int_status |= SERIAL_INT_TRANSMIT; + serial_update_ints(dev); } if (dev->transmit_enabled & 2) - dev->baud_cycles++; + dev->baud_cycles++; else - dev->baud_cycles = 0; /* If not moving while transmitting, reset BAUDOUT cycle count. */ + dev->baud_cycles = 0; /* If not moving while transmitting, reset BAUDOUT cycle count. */ if (!dev->fifo_enabled || (dev->xmit_fifo_pos == 0x0)) - dev->transmit_enabled &= ~1; /* Stop moving. */ - dev->transmit_enabled |= 2; /* Start transmitting. */ + dev->transmit_enabled &= ~1; /* Stop moving. */ + dev->transmit_enabled |= 2; /* Start transmitting. */ } - static void serial_process_txsr(serial_t *dev) { @@ -255,51 +241,49 @@ serial_process_txsr(serial_t *dev) /* If FIFO is enabled and there are bytes left to transmit, continue with the FIFO, otherwise stop. */ if (dev->fifo_enabled && (dev->xmit_fifo_pos != 0x0)) - dev->transmit_enabled |= 1; + dev->transmit_enabled |= 1; else { - /* Both FIFO/THR and TXSR are empty. */ - /* If bit 5 is set, also set bit 6 to mark both THR and shift register as empty. */ - if (dev->lsr & 0x20) - dev->lsr |= 0x40; - dev->transmit_enabled &= ~2; + /* Both FIFO/THR and TXSR are empty. */ + /* If bit 5 is set, also set bit 6 to mark both THR and shift register as empty. */ + if (dev->lsr & 0x20) + dev->lsr |= 0x40; + dev->transmit_enabled &= ~2; } dev->int_status &= ~SERIAL_INT_TRANSMIT; serial_update_ints(dev); } - /* Transmit_enable flags: - Bit 0 = Do move if set; - Bit 1 = Do transmit if set. */ + Bit 0 = Do move if set; + Bit 1 = Do transmit if set. */ static void serial_transmit_timer(void *priv) { - serial_t *dev = (serial_t *) priv; - int delay = 8; /* STOP to THRE delay is 8 BAUDOUT cycles. */ + serial_t *dev = (serial_t *) priv; + int delay = 8; /* STOP to THRE delay is 8 BAUDOUT cycles. */ if (dev->transmit_enabled & 3) { - if ((dev->transmit_enabled & 1) && (dev->transmit_enabled & 2)) - delay = dev->data_bits; /* Delay by less if already transmitting. */ + if ((dev->transmit_enabled & 1) && (dev->transmit_enabled & 2)) + delay = dev->data_bits; /* Delay by less if already transmitting. */ - dev->baud_cycles++; + dev->baud_cycles++; - /* We have processed (total bits) BAUDOUT cycles, transmit the byte. */ - if ((dev->baud_cycles == dev->bits) && (dev->transmit_enabled & 2)) - serial_process_txsr(dev); + /* We have processed (total bits) BAUDOUT cycles, transmit the byte. */ + if ((dev->baud_cycles == dev->bits) && (dev->transmit_enabled & 2)) + serial_process_txsr(dev); - /* We have processed (data bits) BAUDOUT cycles. */ - if ((dev->baud_cycles == delay) && (dev->transmit_enabled & 1)) - serial_move_to_txsr(dev); + /* We have processed (data bits) BAUDOUT cycles. */ + if ((dev->baud_cycles == delay) && (dev->transmit_enabled & 1)) + serial_move_to_txsr(dev); - if (dev->transmit_enabled & 3) - timer_on_auto(&dev->transmit_timer, dev->transmit_period); + if (dev->transmit_enabled & 3) + timer_on_auto(&dev->transmit_timer, dev->transmit_period); } else { - dev->baud_cycles = 0; - return; + dev->baud_cycles = 0; + return; } } - static void serial_timeout_timer(void *priv) { @@ -314,29 +298,26 @@ serial_timeout_timer(void *priv) serial_update_ints(dev); } - static void serial_update_speed(serial_t *dev) { if (dev->transmit_enabled & 3) - timer_on_auto(&dev->transmit_timer, dev->transmit_period); + timer_on_auto(&dev->transmit_timer, dev->transmit_period); if (timer_is_enabled(&dev->timeout_timer)) - timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period); + timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period); } - static void serial_reset_fifo(serial_t *dev) { - dev->lsr = (dev->lsr & 0xfe) | 0x60; + dev->lsr = (dev->lsr & 0xfe) | 0x60; dev->int_status = (dev->int_status & ~SERIAL_INT_RECEIVE) | SERIAL_INT_TRANSMIT; serial_update_ints(dev); dev->xmit_fifo_pos = dev->rcvr_fifo_pos = 0; - dev->rcvr_fifo_full = 0; + dev->rcvr_fifo_full = 0; } - void serial_set_clock_src(serial_t *dev, double clock_src) { @@ -346,309 +327,303 @@ serial_set_clock_src(serial_t *dev, double clock_src) serial_update_speed(dev); } - void serial_write(uint16_t addr, uint8_t val, void *p) { - serial_t *dev = (serial_t *)p; - uint8_t new_msr, old; + serial_t *dev = (serial_t *) p; + uint8_t new_msr, old; serial_log("UART: Write %02X to port %02X\n", val, addr); cycles -= ISA_CYCLES(8); switch (addr & 7) { - case 0: - if (dev->lcr & 0x80) { - dev->dlab = (dev->dlab & 0xff00) | val; - serial_transmit_period(dev); - serial_update_speed(dev); - return; + case 0: + if (dev->lcr & 0x80) { + dev->dlab = (dev->dlab & 0xff00) | val; + serial_transmit_period(dev); + serial_update_speed(dev); + return; + } + + /* Indicate FIFO/THR is no longer empty. */ + dev->lsr &= 0x9f; + dev->int_status &= ~SERIAL_INT_TRANSMIT; + serial_update_ints(dev); + + if ((dev->type >= SERIAL_16550) && dev->fifo_enabled && (dev->xmit_fifo_pos < 16)) { + /* FIFO mode, begin transmitting. */ + timer_on_auto(&dev->transmit_timer, dev->transmit_period); + dev->transmit_enabled |= 1; /* Start moving. */ + dev->xmit_fifo[dev->xmit_fifo_pos++] = val; + } else { + /* Non-FIFO mode, begin transmitting. */ + timer_on_auto(&dev->transmit_timer, dev->transmit_period); + dev->transmit_enabled |= 1; /* Start moving. */ + dev->thr = val; + } + break; + case 1: + if (dev->lcr & 0x80) { + dev->dlab = (dev->dlab & 0x00ff) | (val << 8); + serial_transmit_period(dev); + serial_update_speed(dev); + return; + } + if ((val & 2) && (dev->lsr & 0x20)) + dev->int_status |= SERIAL_INT_TRANSMIT; + dev->ier = val & 0xf; + serial_update_ints(dev); + break; + case 2: + if (dev->type >= SERIAL_16550) { + if ((val ^ dev->fcr) & 0x01) + serial_reset_fifo(dev); + dev->fcr = val & 0xf9; + dev->fifo_enabled = val & 0x01; + if (!dev->fifo_enabled) { + memset(dev->rcvr_fifo, 0, 14); + memset(dev->xmit_fifo, 0, 16); + dev->xmit_fifo_pos = dev->rcvr_fifo_pos = 0; + dev->rcvr_fifo_full = 0; + dev->rcvr_fifo_len = 1; + break; } + if (val & 0x02) { + memset(dev->rcvr_fifo, 0, 14); + dev->rcvr_fifo_pos = 0; + dev->rcvr_fifo_full = 0; + } + if (val & 0x04) { + memset(dev->xmit_fifo, 0, 16); + dev->xmit_fifo_pos = 0; + } + switch ((val >> 6) & 0x03) { + case 0: + dev->rcvr_fifo_len = 1; + break; + case 1: + dev->rcvr_fifo_len = 4; + break; + case 2: + dev->rcvr_fifo_len = 8; + break; + case 3: + dev->rcvr_fifo_len = 14; + break; + } + serial_log("FIFO now %sabled, receive FIFO length = %i\n", dev->fifo_enabled ? "en" : "dis", dev->rcvr_fifo_len); + } + break; + case 3: + old = dev->lcr; + dev->lcr = val; + if ((old ^ val) & 0x0f) { + /* Data bits + start bit. */ + dev->bits = ((dev->lcr & 0x03) + 5) + 1; + /* Stop bits. */ + dev->bits++; /* First stop bit. */ + if (dev->lcr & 0x04) + dev->bits++; /* Second stop bit. */ + /* Parity bit. */ + if (dev->lcr & 0x08) + dev->bits++; - /* Indicate FIFO/THR is no longer empty. */ - dev->lsr &= 0x9f; - dev->int_status &= ~SERIAL_INT_TRANSMIT; - serial_update_ints(dev); + serial_transmit_period(dev); + serial_update_speed(dev); + } + break; + case 4: + if ((val & 2) && !(dev->mctrl & 2)) { + if (dev->sd->rcr_callback) + dev->sd->rcr_callback(dev, dev->sd->priv); + } + if (!(val & 8) && (dev->mctrl & 8)) + picintc(1 << dev->irq); + if ((val ^ dev->mctrl) & 0x10) + serial_reset_fifo(dev); + dev->mctrl = val; + if (val & 0x10) { + new_msr = (val & 0x0c) << 4; + new_msr |= (val & 0x02) ? 0x10 : 0; + new_msr |= (val & 0x01) ? 0x20 : 0; - if ((dev->type >= SERIAL_16550) && dev->fifo_enabled && (dev->xmit_fifo_pos < 16)) { - /* FIFO mode, begin transmitting. */ - timer_on_auto(&dev->transmit_timer, dev->transmit_period); - dev->transmit_enabled |= 1; /* Start moving. */ - dev->xmit_fifo[dev->xmit_fifo_pos++] = val; - } else { - /* Non-FIFO mode, begin transmitting. */ - timer_on_auto(&dev->transmit_timer, dev->transmit_period); - dev->transmit_enabled |= 1; /* Start moving. */ - dev->thr = val; - } - break; - case 1: - if (dev->lcr & 0x80) { - dev->dlab = (dev->dlab & 0x00ff) | (val << 8); - serial_transmit_period(dev); - serial_update_speed(dev); - return; - } - if ((val & 2) && (dev->lsr & 0x20)) - dev->int_status |= SERIAL_INT_TRANSMIT; - dev->ier = val & 0xf; - serial_update_ints(dev); - break; - case 2: - if (dev->type >= SERIAL_16550) { - if ((val ^ dev->fcr) & 0x01) - serial_reset_fifo(dev); - dev->fcr = val & 0xf9; - dev->fifo_enabled = val & 0x01; - if (!dev->fifo_enabled) { - memset(dev->rcvr_fifo, 0, 14); - memset(dev->xmit_fifo, 0, 16); - dev->xmit_fifo_pos = dev->rcvr_fifo_pos = 0; - dev->rcvr_fifo_full = 0; - dev->rcvr_fifo_len = 1; - break; - } - if (val & 0x02) { - memset(dev->rcvr_fifo, 0, 14); - dev->rcvr_fifo_pos = 0; - dev->rcvr_fifo_full = 0; - } - if (val & 0x04) { - memset(dev->xmit_fifo, 0, 16); - dev->xmit_fifo_pos = 0; - } - switch ((val >> 6) & 0x03) { - case 0: - dev->rcvr_fifo_len = 1; - break; - case 1: - dev->rcvr_fifo_len = 4; - break; - case 2: - dev->rcvr_fifo_len = 8; - break; - case 3: - dev->rcvr_fifo_len = 14; - break; - } - serial_log("FIFO now %sabled, receive FIFO length = %i\n", dev->fifo_enabled ? "en" : "dis", dev->rcvr_fifo_len); - } - break; - case 3: - old = dev->lcr; - dev->lcr = val; - if ((old ^ val) & 0x0f) { - /* Data bits + start bit. */ - dev->bits = ((dev->lcr & 0x03) + 5) + 1; - /* Stop bits. */ - dev->bits++; /* First stop bit. */ - if (dev->lcr & 0x04) - dev->bits++; /* Second stop bit. */ - /* Parity bit. */ - if (dev->lcr & 0x08) - dev->bits++; + if ((dev->msr ^ new_msr) & 0x10) + new_msr |= 0x01; + if ((dev->msr ^ new_msr) & 0x20) + new_msr |= 0x02; + if ((dev->msr ^ new_msr) & 0x80) + new_msr |= 0x08; + if ((dev->msr & 0x40) && !(new_msr & 0x40)) + new_msr |= 0x04; - serial_transmit_period(dev); - serial_update_speed(dev); - } - break; - case 4: - if ((val & 2) && !(dev->mctrl & 2)) { - if (dev->sd->rcr_callback) - dev->sd->rcr_callback(dev, dev->sd->priv); - } - if (!(val & 8) && (dev->mctrl & 8)) - picintc(1 << dev->irq); - if ((val ^ dev->mctrl) & 0x10) - serial_reset_fifo(dev); - dev->mctrl = val; - if (val & 0x10) { - new_msr = (val & 0x0c) << 4; - new_msr |= (val & 0x02) ? 0x10: 0; - new_msr |= (val & 0x01) ? 0x20: 0; + dev->msr = new_msr; - if ((dev->msr ^ new_msr) & 0x10) - new_msr |= 0x01; - if ((dev->msr ^ new_msr) & 0x20) - new_msr |= 0x02; - if ((dev->msr ^ new_msr) & 0x80) - new_msr |= 0x08; - if ((dev->msr & 0x40) && !(new_msr & 0x40)) - new_msr |= 0x04; - - dev->msr = new_msr; - - dev->xmit_fifo_pos = dev->rcvr_fifo_pos = 0; - dev->rcvr_fifo_full = 0; - } - break; - case 5: - dev->lsr = (dev->lsr & 0xe0) | (val & 0x1f); - if (dev->lsr & 0x01) - dev->int_status |= SERIAL_INT_RECEIVE; - if (dev->lsr & 0x1e) - dev->int_status |= SERIAL_INT_LSR; - if (dev->lsr & 0x20) - dev->int_status |= SERIAL_INT_TRANSMIT; - serial_update_ints(dev); - break; - case 6: - dev->msr = val; - if (dev->msr & 0x0f) - dev->int_status |= SERIAL_INT_MSR; - serial_update_ints(dev); - break; - case 7: - if (dev->type >= SERIAL_16450) - dev->scratch = val; - break; + dev->xmit_fifo_pos = dev->rcvr_fifo_pos = 0; + dev->rcvr_fifo_full = 0; + } + break; + case 5: + dev->lsr = (dev->lsr & 0xe0) | (val & 0x1f); + if (dev->lsr & 0x01) + dev->int_status |= SERIAL_INT_RECEIVE; + if (dev->lsr & 0x1e) + dev->int_status |= SERIAL_INT_LSR; + if (dev->lsr & 0x20) + dev->int_status |= SERIAL_INT_TRANSMIT; + serial_update_ints(dev); + break; + case 6: + dev->msr = val; + if (dev->msr & 0x0f) + dev->int_status |= SERIAL_INT_MSR; + serial_update_ints(dev); + break; + case 7: + if (dev->type >= SERIAL_16450) + dev->scratch = val; + break; } } - uint8_t serial_read(uint16_t addr, void *p) { - serial_t *dev = (serial_t *)p; - uint8_t i, ret = 0; + serial_t *dev = (serial_t *) p; + uint8_t i, ret = 0; cycles -= ISA_CYCLES(8); switch (addr & 7) { - case 0: - if (dev->lcr & 0x80) { - ret = dev->dlab & 0xff; - break; - } + case 0: + if (dev->lcr & 0x80) { + ret = dev->dlab & 0xff; + break; + } - if ((dev->type >= SERIAL_16550) && dev->fifo_enabled) { - /* FIFO mode. */ + if ((dev->type >= SERIAL_16550) && dev->fifo_enabled) { + /* FIFO mode. */ - serial_clear_timeout(dev); + serial_clear_timeout(dev); - ret = dev->rcvr_fifo[0]; - dev->rcvr_fifo_full = 0; - if (dev->rcvr_fifo_pos > 0) { - for (i = 1; i < 16; i++) - dev->rcvr_fifo[i - 1] = dev->rcvr_fifo[i]; - serial_log("FIFO position %i: read %02X, next %02X\n", dev->rcvr_fifo_pos, ret, dev->rcvr_fifo[0]); - dev->rcvr_fifo_pos--; - /* At least one byte remains to be read, start the timeout - timer so that a timeout is indicated in case of no read. */ - timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period); - } else { - dev->lsr &= 0xfe; - dev->int_status &= ~SERIAL_INT_RECEIVE; - serial_update_ints(dev); - } - } else { - ret = dev->dat; - dev->lsr &= 0xfe; - dev->int_status &= ~SERIAL_INT_RECEIVE; - serial_update_ints(dev); - } - serial_log("Read data: %02X\n", ret); - break; - case 1: - if (dev->lcr & 0x80) - ret = (dev->dlab >> 8) & 0xff; - else - ret = dev->ier; - break; - case 2: - ret = dev->iir; - if ((ret & 0xe) == 2) { - dev->int_status &= ~SERIAL_INT_TRANSMIT; - serial_update_ints(dev); - } - if (dev->fcr & 1) - ret |= 0xc0; - break; - case 3: - ret = dev->lcr; - break; - case 4: - ret = dev->mctrl; - break; - case 5: - ret = dev->lsr; - if (dev->lsr & 0x1f) - dev->lsr &= ~0x1e; - dev->int_status &= ~SERIAL_INT_LSR; - serial_update_ints(dev); - break; - case 6: - ret = dev->msr; - dev->msr &= ~0x0f; - dev->int_status &= ~SERIAL_INT_MSR; - serial_update_ints(dev); - break; - case 7: - ret = dev->scratch; - break; + ret = dev->rcvr_fifo[0]; + dev->rcvr_fifo_full = 0; + if (dev->rcvr_fifo_pos > 0) { + for (i = 1; i < 16; i++) + dev->rcvr_fifo[i - 1] = dev->rcvr_fifo[i]; + serial_log("FIFO position %i: read %02X, next %02X\n", dev->rcvr_fifo_pos, ret, dev->rcvr_fifo[0]); + dev->rcvr_fifo_pos--; + /* At least one byte remains to be read, start the timeout + timer so that a timeout is indicated in case of no read. */ + timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period); + } else { + dev->lsr &= 0xfe; + dev->int_status &= ~SERIAL_INT_RECEIVE; + serial_update_ints(dev); + } + } else { + ret = dev->dat; + dev->lsr &= 0xfe; + dev->int_status &= ~SERIAL_INT_RECEIVE; + serial_update_ints(dev); + } + serial_log("Read data: %02X\n", ret); + break; + case 1: + if (dev->lcr & 0x80) + ret = (dev->dlab >> 8) & 0xff; + else + ret = dev->ier; + break; + case 2: + ret = dev->iir; + if ((ret & 0xe) == 2) { + dev->int_status &= ~SERIAL_INT_TRANSMIT; + serial_update_ints(dev); + } + if (dev->fcr & 1) + ret |= 0xc0; + break; + case 3: + ret = dev->lcr; + break; + case 4: + ret = dev->mctrl; + break; + case 5: + ret = dev->lsr; + if (dev->lsr & 0x1f) + dev->lsr &= ~0x1e; + dev->int_status &= ~SERIAL_INT_LSR; + serial_update_ints(dev); + break; + case 6: + ret = dev->msr; + dev->msr &= ~0x0f; + dev->int_status &= ~SERIAL_INT_MSR; + serial_update_ints(dev); + break; + case 7: + ret = dev->scratch; + break; } serial_log("UART: Read %02X from port %02X\n", ret, addr); return ret; } - void serial_remove(serial_t *dev) { if (dev == NULL) - return; + return; if (!serial_enabled[dev->inst]) - return; + return; if (!dev->base_address) - return; + return; serial_log("Removing serial port %i at %04X...\n", dev->inst, dev->base_address); io_removehandler(dev->base_address, 0x0008, - serial_read, NULL, NULL, serial_write, NULL, NULL, dev); + serial_read, NULL, NULL, serial_write, NULL, NULL, dev); dev->base_address = 0x0000; } - void serial_setup(serial_t *dev, uint16_t addr, uint8_t irq) { serial_log("Adding serial port %i at %04X...\n", dev->inst, addr); if (dev == NULL) - return; + return; if (!serial_enabled[dev->inst]) - return; + return; if (dev->base_address != 0x0000) - serial_remove(dev); + serial_remove(dev); dev->base_address = addr; if (addr != 0x0000) - io_sethandler(addr, 0x0008, serial_read, NULL, NULL, serial_write, NULL, NULL, dev); + io_sethandler(addr, 0x0008, serial_read, NULL, NULL, serial_write, NULL, NULL, dev); dev->irq = irq; } - serial_t * serial_attach(int port, - void (*rcr_callback)(struct serial_s *serial, void *p), - void (*dev_write)(struct serial_s *serial, void *p, uint8_t data), - void *priv) + void (*rcr_callback)(struct serial_s *serial, void *p), + void (*dev_write)(struct serial_s *serial, void *p, uint8_t data), + void *priv) { serial_device_t *sd = &serial_devices[port]; sd->rcr_callback = rcr_callback; - sd->dev_write = dev_write; - sd->priv = priv; + sd->dev_write = dev_write; + sd->priv = priv; return sd->serial; } - static void serial_speed_changed(void *priv) { @@ -657,7 +632,6 @@ serial_speed_changed(void *priv) serial_update_speed(dev); } - static void serial_close(void *priv) { @@ -668,7 +642,6 @@ serial_close(void *priv) free(dev); } - static void * serial_init(const device_t *info) { @@ -678,28 +651,28 @@ serial_init(const device_t *info) dev->inst = next_inst; if (serial_enabled[next_inst]) { - serial_log("Adding serial port %i...\n", next_inst); - dev->type = info->local; - memset(&(serial_devices[next_inst]), 0, sizeof(serial_device_t)); - dev->sd = &(serial_devices[next_inst]); - dev->sd->serial = dev; - serial_reset_port(dev); - if (next_inst == 3) - serial_setup(dev, COM4_ADDR, COM4_IRQ); - else if (next_inst == 2) - serial_setup(dev, COM3_ADDR, COM3_IRQ); - else if ((next_inst == 1) || (info->flags & DEVICE_PCJR)) - serial_setup(dev, COM2_ADDR, COM2_IRQ); - else if (next_inst == 0) - serial_setup(dev, COM1_ADDR, COM1_IRQ); + serial_log("Adding serial port %i...\n", next_inst); + dev->type = info->local; + memset(&(serial_devices[next_inst]), 0, sizeof(serial_device_t)); + dev->sd = &(serial_devices[next_inst]); + dev->sd->serial = dev; + serial_reset_port(dev); + if (next_inst == 3) + serial_setup(dev, COM4_ADDR, COM4_IRQ); + else if (next_inst == 2) + serial_setup(dev, COM3_ADDR, COM3_IRQ); + else if ((next_inst == 1) || (info->flags & DEVICE_PCJR)) + serial_setup(dev, COM2_ADDR, COM2_IRQ); + else if (next_inst == 0) + serial_setup(dev, COM1_ADDR, COM1_IRQ); - /* Default to 1200,N,7. */ - dev->dlab = 96; - dev->fcr = 0x06; - dev->clock_src = 1843200.0; - serial_transmit_period(dev); - timer_add(&dev->transmit_timer, serial_transmit_timer, dev, 0); - timer_add(&dev->timeout_timer, serial_timeout_timer, dev, 0); + /* Default to 1200,N,7. */ + dev->dlab = 96; + dev->fcr = 0x06; + dev->clock_src = 1843200.0; + serial_transmit_period(dev); + timer_add(&dev->transmit_timer, serial_transmit_timer, dev, 0); + timer_add(&dev->timeout_timer, serial_timeout_timer, dev, 0); } next_inst++; @@ -707,128 +680,127 @@ serial_init(const device_t *info) return dev; } - void serial_set_next_inst(int ni) { next_inst = ni; } - void -serial_standalone_init(void) { - for ( ; next_inst < SERIAL_MAX; ) - device_add_inst(&ns8250_device, next_inst + 1); +serial_standalone_init(void) +{ + for (; next_inst < SERIAL_MAX;) + device_add_inst(&ns8250_device, next_inst + 1); }; const device_t ns8250_device = { - .name = "National Semiconductor 8250(-compatible) UART", + .name = "National Semiconductor 8250(-compatible) UART", .internal_name = "ns8250", - .flags = 0, - .local = SERIAL_8250, - .init = serial_init, - .close = serial_close, - .reset = NULL, + .flags = 0, + .local = SERIAL_8250, + .init = serial_init, + .close = serial_close, + .reset = NULL, { .available = NULL }, .speed_changed = serial_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ns8250_pcjr_device = { - .name = "National Semiconductor 8250(-compatible) UART for PCjr", + .name = "National Semiconductor 8250(-compatible) UART for PCjr", .internal_name = "ns8250_pcjr", - .flags = DEVICE_PCJR, - .local = SERIAL_8250_PCJR, - .init = serial_init, - .close = serial_close, - .reset = NULL, + .flags = DEVICE_PCJR, + .local = SERIAL_8250_PCJR, + .init = serial_init, + .close = serial_close, + .reset = NULL, { .available = NULL }, .speed_changed = serial_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ns16450_device = { - .name = "National Semiconductor NS16450(-compatible) UART", + .name = "National Semiconductor NS16450(-compatible) UART", .internal_name = "ns16450", - .flags = 0, - .local = SERIAL_16450, - .init = serial_init, - .close = serial_close, - .reset = NULL, + .flags = 0, + .local = SERIAL_16450, + .init = serial_init, + .close = serial_close, + .reset = NULL, { .available = NULL }, .speed_changed = serial_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ns16550_device = { - .name = "National Semiconductor NS16550(-compatible) UART", + .name = "National Semiconductor NS16550(-compatible) UART", .internal_name = "ns16550", - .flags = 0, - .local = SERIAL_16550, - .init = serial_init, - .close = serial_close, - .reset = NULL, + .flags = 0, + .local = SERIAL_16550, + .init = serial_init, + .close = serial_close, + .reset = NULL, { .available = NULL }, .speed_changed = serial_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ns16650_device = { - .name = "Startech Semiconductor 16650(-compatible) UART", + .name = "Startech Semiconductor 16650(-compatible) UART", .internal_name = "ns16650", - .flags = 0, - .local = SERIAL_16650, - .init = serial_init, - .close = serial_close, - .reset = NULL, + .flags = 0, + .local = SERIAL_16650, + .init = serial_init, + .close = serial_close, + .reset = NULL, { .available = NULL }, .speed_changed = serial_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ns16750_device = { - .name = "Texas Instruments 16750(-compatible) UART", + .name = "Texas Instruments 16750(-compatible) UART", .internal_name = "ns16750", - .flags = 0, - .local = SERIAL_16750, - .init = serial_init, - .close = serial_close, - .reset = NULL, + .flags = 0, + .local = SERIAL_16750, + .init = serial_init, + .close = serial_close, + .reset = NULL, { .available = NULL }, .speed_changed = serial_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ns16850_device = { - .name = "Exar Corporation NS16850(-compatible) UART", + .name = "Exar Corporation NS16850(-compatible) UART", .internal_name = "ns16850", - .flags = 0, - .local = SERIAL_16850, - .init = serial_init, - .close = serial_close, - .reset = NULL, + .flags = 0, + .local = SERIAL_16850, + .init = serial_init, + .close = serial_close, + .reset = NULL, { .available = NULL }, .speed_changed = serial_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ns16950_device = { - .name = "Oxford Semiconductor NS16950(-compatible) UART", + .name = "Oxford Semiconductor NS16950(-compatible) UART", .internal_name = "ns16950", - .flags = 0, - .local = SERIAL_16950, - .init = serial_init, - .close = serial_close, - .reset = NULL, + .flags = 0, + .local = SERIAL_16950, + .init = serial_init, + .close = serial_close, + .reset = NULL, { .available = NULL }, .speed_changed = serial_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/include/86box/86box.h b/src/include/86box/86box.h index 3d2806ce7..75226e727 100644 --- a/src/include/86box/86box.h +++ b/src/include/86box/86box.h @@ -18,183 +18,178 @@ * Copyright 2021 Laci bá' */ #ifndef EMU_86BOX_H -# define EMU_86BOX_H - +#define EMU_86BOX_H /* Configuration values. */ -#define SERIAL_MAX 4 -#define PARALLEL_MAX 4 -#define SCREEN_RES_X 640 -#define SCREEN_RES_Y 480 +#define SERIAL_MAX 4 +#define PARALLEL_MAX 4 +#define SCREEN_RES_X 640 +#define SCREEN_RES_Y 480 /* Filename and pathname info. */ -#define CONFIG_FILE "86box.cfg" +#define CONFIG_FILE "86box.cfg" #define NVR_PATH "nvr" #define SCREENSHOT_PATH "screenshots" - /* Default language 0xFFFF = from system, 0x409 = en-US */ #define DEFAULT_LANGUAGE 0x0409 #ifdef MIN -#undef MIN +# undef MIN #endif #ifdef MAX -#undef MAX +# undef MAX #endif #ifdef ABS -#undef ABS +# undef ABS #endif -#define MIN(a, b) ((a) < (b) ? (a) : (b)) -#define MAX(a, b) ((a) > (b) ? (a) : (b)) -#define ABS(x) ((x) > 0 ? (x) : -(x)) -#define BCD8(x) ((((x) / 10) << 4) | ((x) % 10)) -#define BCD16(x) ((((x) / 1000) << 12) | (((x) / 100) << 8) | BCD8(x)) -#define BCD32(x) ((((x) / 10000000) << 28) | (((x) / 1000000) << 24) | (((x) / 100000) << 20) | (((x) / 10000) << 16) | BCD16(x)) +#define MIN(a, b) ((a) < (b) ? (a) : (b)) +#define MAX(a, b) ((a) > (b) ? (a) : (b)) +#define ABS(x) ((x) > 0 ? (x) : -(x)) +#define BCD8(x) ((((x) / 10) << 4) | ((x) % 10)) +#define BCD16(x) ((((x) / 1000) << 12) | (((x) / 100) << 8) | BCD8(x)) +#define BCD32(x) ((((x) / 10000000) << 28) | (((x) / 1000000) << 24) | (((x) / 100000) << 20) | (((x) / 10000) << 16) | BCD16(x)) #ifdef __cplusplus extern "C" { #endif /* Global variables. */ -extern uint32_t lang_sys; /* (-) system language code */ +extern uint32_t lang_sys; /* (-) system language code */ -extern int dump_on_exit; /* (O) dump regs on exit*/ -extern int do_dump_config; /* (O) dump cfg after load */ -extern int start_in_fullscreen; /* (O) start in fullscreen */ +extern int dump_on_exit; /* (O) dump regs on exit*/ +extern int do_dump_config; /* (O) dump cfg after load */ +extern int start_in_fullscreen; /* (O) start in fullscreen */ #ifdef _WIN32 -extern int force_debug; /* (O) force debug output */ +extern int force_debug; /* (O) force debug output */ #endif #ifdef USE_WX -extern int video_fps; /* (O) render speed in fps */ +extern int video_fps; /* (O) render speed in fps */ #endif -extern int settings_only; /* (O) show only the settings dialog */ -extern int confirm_exit_cmdl; /* (O) do not ask for confirmation on quit if set to 0 */ +extern int settings_only; /* (O) show only the settings dialog */ +extern int confirm_exit_cmdl; /* (O) do not ask for confirmation on quit if set to 0 */ #ifdef _WIN32 -extern uint64_t unique_id; -extern uint64_t source_hwnd; +extern uint64_t unique_id; +extern uint64_t source_hwnd; #endif -extern char rom_path[1024]; /* (O) full path to ROMs */ -extern char log_path[1024]; /* (O) full path of logfile */ -extern char vm_name[1024]; /* (O) display name of the VM */ - +extern char rom_path[1024]; /* (O) full path to ROMs */ +extern char log_path[1024]; /* (O) full path of logfile */ +extern char vm_name[1024]; /* (O) display name of the VM */ #define window_x monitor_settings[0].mon_window_x #define window_y monitor_settings[0].mon_window_y #define window_w monitor_settings[0].mon_window_w #define window_h monitor_settings[0].mon_window_h -extern int window_remember, - vid_resize, /* (C) allow resizing */ - invert_display, /* (C) invert the display */ - suppress_overscan; /* (C) suppress overscans */ -extern uint32_t lang_id; /* (C) language code identifier */ -extern char icon_set[256]; /* (C) iconset identifier */ -extern int scale; /* (C) screen scale factor */ -extern int dpi_scale; /* (C) DPI scaling of the emulated screen */ -extern int vid_api; /* (C) video renderer */ -extern int vid_cga_contrast, /* (C) video */ - video_fullscreen, /* (C) video */ - video_fullscreen_first, /* (C) video */ - video_fullscreen_scale, /* (C) video */ - enable_overscan, /* (C) video */ - force_43, /* (C) video */ - video_filter_method, /* (C) video */ - video_vsync, /* (C) video */ - video_framerate, /* (C) video */ - gfxcard; /* (C) graphics/video card */ -extern char video_shader[512]; /* (C) video */ -extern int serial_enabled[], /* (C) enable serial ports */ - bugger_enabled, /* (C) enable ISAbugger */ - postcard_enabled, /* (C) enable POST card */ - isamem_type[], /* (C) enable ISA mem cards */ - isartc_type; /* (C) enable ISA RTC card */ -extern int sound_is_float, /* (C) sound uses FP values */ - GAMEBLASTER, /* (C) sound option */ - GUS, GUSMAX, /* (C) sound option */ - SSI2001, /* (C) sound option */ - voodoo_enabled, /* (C) video option */ - ibm8514_enabled, /* (C) video option */ - xga_enabled; /* (C) video option */ -extern uint32_t mem_size; /* (C) memory size (Installed on system board) */ -extern uint32_t isa_mem_size; /* (C) memory size (ISA Memory Cards) */ -extern int cpu, /* (C) cpu type */ - cpu_use_dynarec, /* (C) cpu uses/needs Dyna */ - fpu_type; /* (C) fpu type */ -extern int time_sync; /* (C) enable time sync */ -extern int network_type; /* (C) net provider type */ -extern int network_card; /* (C) net interface num */ -extern char network_host[522]; /* (C) host network intf */ -extern int hdd_format_type; /* (C) hard disk file format */ -extern int confirm_reset, /* (C) enable reset confirmation */ - confirm_exit, /* (C) enable exit confirmation */ - confirm_save; /* (C) enable save confirmation */ -extern int enable_discord; /* (C) enable Discord integration */ +extern int window_remember, + vid_resize, /* (C) allow resizing */ + invert_display, /* (C) invert the display */ + suppress_overscan; /* (C) suppress overscans */ +extern uint32_t lang_id; /* (C) language code identifier */ +extern char icon_set[256]; /* (C) iconset identifier */ +extern int scale; /* (C) screen scale factor */ +extern int dpi_scale; /* (C) DPI scaling of the emulated screen */ +extern int vid_api; /* (C) video renderer */ +extern int vid_cga_contrast, /* (C) video */ + video_fullscreen, /* (C) video */ + video_fullscreen_first, /* (C) video */ + video_fullscreen_scale, /* (C) video */ + enable_overscan, /* (C) video */ + force_43, /* (C) video */ + video_filter_method, /* (C) video */ + video_vsync, /* (C) video */ + video_framerate, /* (C) video */ + gfxcard; /* (C) graphics/video card */ +extern char video_shader[512]; /* (C) video */ +extern int serial_enabled[], /* (C) enable serial ports */ + bugger_enabled, /* (C) enable ISAbugger */ + postcard_enabled, /* (C) enable POST card */ + isamem_type[], /* (C) enable ISA mem cards */ + isartc_type; /* (C) enable ISA RTC card */ +extern int sound_is_float, /* (C) sound uses FP values */ + GAMEBLASTER, /* (C) sound option */ + GUS, GUSMAX, /* (C) sound option */ + SSI2001, /* (C) sound option */ + voodoo_enabled, /* (C) video option */ + ibm8514_enabled, /* (C) video option */ + xga_enabled; /* (C) video option */ +extern uint32_t mem_size; /* (C) memory size (Installed on system board) */ +extern uint32_t isa_mem_size; /* (C) memory size (ISA Memory Cards) */ +extern int cpu, /* (C) cpu type */ + cpu_use_dynarec, /* (C) cpu uses/needs Dyna */ + fpu_type; /* (C) fpu type */ +extern int time_sync; /* (C) enable time sync */ +extern int network_type; /* (C) net provider type */ +extern int network_card; /* (C) net interface num */ +extern char network_host[522]; /* (C) host network intf */ +extern int hdd_format_type; /* (C) hard disk file format */ +extern int confirm_reset, /* (C) enable reset confirmation */ + confirm_exit, /* (C) enable exit confirmation */ + confirm_save; /* (C) enable save confirmation */ +extern int enable_discord; /* (C) enable Discord integration */ -extern int is_pentium; /* TODO: Move back to cpu/cpu.h when it's figured out, - how to remove that hack from the ET4000/W32p. */ -extern int fixed_size_x, fixed_size_y; +extern int is_pentium; /* TODO: Move back to cpu/cpu.h when it's figured out, + how to remove that hack from the ET4000/W32p. */ +extern int fixed_size_x, fixed_size_y; extern double mouse_sensitivity; /* (C) Mouse sensitivity scale */ -extern int pit_mode; /* (C) force setting PIT mode */ -extern int fm_driver; /* (C) select FM sound driver */ +extern int pit_mode; /* (C) force setting PIT mode */ +extern int fm_driver; /* (C) select FM sound driver */ -extern char exe_path[2048]; /* path (dir) of executable */ -extern char usr_path[1024]; /* path (dir) of user data */ -extern char cfg_path[1024]; /* full path of config file */ +extern char exe_path[2048]; /* path (dir) of executable */ +extern char usr_path[1024]; /* path (dir) of user data */ +extern char cfg_path[1024]; /* full path of config file */ #ifndef USE_NEW_DYNAREC -extern FILE *stdlog; /* file to log output to */ +extern FILE *stdlog; /* file to log output to */ #endif -extern int config_changed; /* config has changed */ - +extern int config_changed; /* config has changed */ /* Function prototypes. */ #ifdef HAVE_STDARG_H -extern void pclog_ex(const char *fmt, va_list); -extern void fatal_ex(const char *fmt, va_list); +extern void pclog_ex(const char *fmt, va_list); +extern void fatal_ex(const char *fmt, va_list); #endif -extern void pclog_toggle_suppr(void); -extern void pclog(const char *fmt, ...); -extern void fatal(const char *fmt, ...); -extern void set_screen_size(int x, int y); -extern void set_screen_size_monitor(int x, int y, int monitor_index); -extern void reset_screen_size(void); -extern void reset_screen_size_monitor(int monitor_index); -extern void set_screen_size_natural(void); +extern void pclog_toggle_suppr(void); +extern void pclog(const char *fmt, ...); +extern void fatal(const char *fmt, ...); +extern void set_screen_size(int x, int y); +extern void set_screen_size_monitor(int x, int y, int monitor_index); +extern void reset_screen_size(void); +extern void reset_screen_size_monitor(int monitor_index); +extern void set_screen_size_natural(void); extern void update_mouse_msg(); #if 0 extern void pc_reload(wchar_t *fn); #endif -extern int pc_init_modules(void); -extern int pc_init(int argc, char *argv[]); -extern void pc_close(void *threadid); -extern void pc_reset_hard_close(void); -extern void pc_reset_hard_init(void); -extern void pc_reset_hard(void); -extern void pc_full_speed(void); -extern void pc_speed_changed(void); -extern void pc_send_cad(void); -extern void pc_send_cae(void); -extern void pc_send_cab(void); -extern void pc_run(void); -extern void pc_start(void); -extern void pc_onesec(void); +extern int pc_init_modules(void); +extern int pc_init(int argc, char *argv[]); +extern void pc_close(void *threadid); +extern void pc_reset_hard_close(void); +extern void pc_reset_hard_init(void); +extern void pc_reset_hard(void); +extern void pc_full_speed(void); +extern void pc_speed_changed(void); +extern void pc_send_cad(void); +extern void pc_send_cae(void); +extern void pc_send_cab(void); +extern void pc_run(void); +extern void pc_start(void); +extern void pc_onesec(void); -extern uint16_t get_last_addr(void); +extern uint16_t get_last_addr(void); /* This is for external subtraction of cycles; should be in cpu.c but I put it here to avoid having to include cpu.c everywhere. */ -extern void sub_cycles(int c); -extern void resub_cycles(int old_cycles); +extern void sub_cycles(int c); +extern void resub_cycles(int old_cycles); -extern double isa_timing; -extern int io_delay, framecountx; +extern double isa_timing; +extern int io_delay, framecountx; -extern volatile int cpu_thread_run; +extern volatile int cpu_thread_run; #ifdef __cplusplus } #endif - -#endif /*EMU_86BOX_H*/ +#endif /*EMU_86BOX_H*/ diff --git a/src/include/86box/config.h b/src/include/86box/config.h index 41c9900ed..d84b5d25f 100644 --- a/src/include/86box/config.h +++ b/src/include/86box/config.h @@ -20,8 +20,7 @@ * Copyright 2017 Fred N. van Kempen. */ #ifndef EMU_CONFIG_H -# define EMU_CONFIG_H - +#define EMU_CONFIG_H #ifdef __cplusplus extern "C" { @@ -69,16 +68,16 @@ typedef struct { window_x, window_y, sound_gain; /* Sound gain */ -#ifdef USE_LANGUAGE +# ifdef USE_LANGUAGE uint16_t language_id; /* Language ID (0x0409 = English (US)) */ -#endif +# endif /* Machine cateogory */ int machine, /* Machine */ cpu, /* CPU */ -#ifdef USE_DYNAREC +# ifdef USE_DYNAREC cpu_use_dynarec, /* CPU recompiler enabled */ -#endif +# endif wait_states, /* CPU wait states */ enable_external_fpu, /* FPU enabled */ time_sync; /* Time sync enabled */ @@ -109,9 +108,9 @@ typedef struct { /* Ports category */ char parallel_devices[PARALLEL_MAX][32]; /* LPT device names */ -#ifdef USE_SERIAL_DEVICES +# ifdef USE_SERIAL_DEVICES char serial_devices[SERIAL_MAX][32]; /* Serial device names */ -#endif +# endif int serial_enabled[SERIAL_MAX], /* Serial ports 1, 2, 3, 4 enabled */ parallel_enabled[PARALLEL_MAX]; /* LPT1, LPT2, LPT3, LPT4 enabled */ @@ -137,33 +136,32 @@ typedef struct { } config_t; #endif -extern void config_load(void); -extern void config_save(void); -extern void config_write(char *fn); -extern void config_dump(void); +extern void config_load(void); +extern void config_save(void); +extern void config_write(char *fn); +extern void config_dump(void); -extern void config_delete_var(char *head, char *name); -extern int config_get_int(char *head, char *name, int def); -extern double config_get_double(char *head, char *name, double def); -extern int config_get_hex16(char *head, char *name, int def); -extern int config_get_hex20(char *head, char *name, int def); -extern int config_get_mac(char *head, char *name, int def); -extern char *config_get_string(char *head, char *name, char *def); -extern wchar_t *config_get_wstring(char *head, char *name, wchar_t *def); -extern void config_set_int(char *head, char *name, int val); -extern void config_set_double(char *head, char *name, double val); -extern void config_set_hex16(char *head, char *name, int val); -extern void config_set_hex20(char *head, char *name, int val); -extern void config_set_mac(char *head, char *name, int val); -extern void config_set_string(char *head, char *name, char *val); -extern void config_set_wstring(char *head, char *name, wchar_t *val); +extern void config_delete_var(char *head, char *name); +extern int config_get_int(char *head, char *name, int def); +extern double config_get_double(char *head, char *name, double def); +extern int config_get_hex16(char *head, char *name, int def); +extern int config_get_hex20(char *head, char *name, int def); +extern int config_get_mac(char *head, char *name, int def); +extern char *config_get_string(char *head, char *name, char *def); +extern wchar_t *config_get_wstring(char *head, char *name, wchar_t *def); +extern void config_set_int(char *head, char *name, int val); +extern void config_set_double(char *head, char *name, double val); +extern void config_set_hex16(char *head, char *name, int val); +extern void config_set_hex20(char *head, char *name, int val); +extern void config_set_mac(char *head, char *name, int val); +extern void config_set_string(char *head, char *name, char *val); +extern void config_set_wstring(char *head, char *name, wchar_t *val); -extern void * config_find_section(char *name); -extern void config_rename_section(void *priv, char *name); +extern void *config_find_section(char *name); +extern void config_rename_section(void *priv, char *name); #ifdef __cplusplus } #endif - -#endif /*EMU_CONFIG_H*/ +#endif /*EMU_CONFIG_H*/ diff --git a/src/include/86box/device.h b/src/include/86box/device.h index 20a4babc5..47f9b2448 100644 --- a/src/include/86box/device.h +++ b/src/include/86box/device.h @@ -37,52 +37,49 @@ * USA. */ #ifndef EMU_DEVICE_H -# define EMU_DEVICE_H - - -#define CONFIG_END -1 -#define CONFIG_STRING 0 -#define CONFIG_INT 1 -#define CONFIG_BINARY 2 -#define CONFIG_SELECTION 3 -#define CONFIG_MIDI_OUT 4 -#define CONFIG_FNAME 5 -#define CONFIG_SPINNER 6 -#define CONFIG_HEX16 7 -#define CONFIG_HEX20 8 -#define CONFIG_MAC 9 -#define CONFIG_MIDI_IN 10 -#define CONFIG_BIOS 11 +#define EMU_DEVICE_H +#define CONFIG_END -1 +#define CONFIG_STRING 0 +#define CONFIG_INT 1 +#define CONFIG_BINARY 2 +#define CONFIG_SELECTION 3 +#define CONFIG_MIDI_OUT 4 +#define CONFIG_FNAME 5 +#define CONFIG_SPINNER 6 +#define CONFIG_HEX16 7 +#define CONFIG_HEX20 8 +#define CONFIG_MAC 9 +#define CONFIG_MIDI_IN 10 +#define CONFIG_BIOS 11 enum { - DEVICE_NOT_WORKING = 1, /* does not currently work correctly and will be disabled in a release build */ - DEVICE_PCJR = 2, /* requires an IBM PCjr */ - DEVICE_AT = 4, /* requires an AT-compatible system */ - DEVICE_PS2 = 8, /* requires a PS/1 or PS/2 system */ - DEVICE_ISA = 0x10, /* requires the ISA bus */ - DEVICE_CBUS = 0x20, /* requires the C-BUS bus */ - DEVICE_MCA = 0x40, /* requires the MCA bus */ - DEVICE_EISA = 0x80, /* requires the EISA bus */ - DEVICE_VLB = 0x100, /* requires the PCI bus */ - DEVICE_PCI = 0x200, /* requires the VLB bus */ - DEVICE_AGP = 0x400, /* requires the AGP bus */ - DEVICE_AC97 = 0x800, /* requires the AC'97 bus */ - DEVICE_COM = 0x1000, /* requires a serial port */ - DEVICE_LPT = 0x2000 /* requires a parallel port */ + DEVICE_NOT_WORKING = 1, /* does not currently work correctly and will be disabled in a release build */ + DEVICE_PCJR = 2, /* requires an IBM PCjr */ + DEVICE_AT = 4, /* requires an AT-compatible system */ + DEVICE_PS2 = 8, /* requires a PS/1 or PS/2 system */ + DEVICE_ISA = 0x10, /* requires the ISA bus */ + DEVICE_CBUS = 0x20, /* requires the C-BUS bus */ + DEVICE_MCA = 0x40, /* requires the MCA bus */ + DEVICE_EISA = 0x80, /* requires the EISA bus */ + DEVICE_VLB = 0x100, /* requires the PCI bus */ + DEVICE_PCI = 0x200, /* requires the VLB bus */ + DEVICE_AGP = 0x400, /* requires the AGP bus */ + DEVICE_AC97 = 0x800, /* requires the AC'97 bus */ + DEVICE_COM = 0x1000, /* requires a serial port */ + DEVICE_LPT = 0x2000 /* requires a parallel port */ }; - typedef struct { const char *description; - int value; + int value; } device_config_selection_t; typedef struct { - const char *name; - const char *internal_name; - int bios_type; - int files_no; + const char *name; + const char *internal_name; + int bios_type; + int files_no; const char **files; } device_config_bios_t; @@ -93,94 +90,92 @@ typedef struct { } device_config_spinner_t; typedef struct { - const char *name; - const char *description; - int type; - const char *default_string; - int default_int; - const char *file_filter; - const device_config_spinner_t spinner; + const char *name; + const char *description; + int type; + const char *default_string; + int default_int; + const char *file_filter; + const device_config_spinner_t spinner; const device_config_selection_t selection[16]; - const device_config_bios_t *bios; + const device_config_bios_t *bios; } device_config_t; typedef struct _device_ { - const char *name; + const char *name; const char *internal_name; - uint32_t flags; /* system flags */ - uint32_t local; /* flags local to device */ + uint32_t flags; /* system flags */ + uint32_t local; /* flags local to device */ - void *(*init)(const struct _device_ *); - void (*close)(void *priv); - void (*reset)(void *priv); + void *(*init)(const struct _device_ *); + void (*close)(void *priv); + void (*reset)(void *priv); union { - int (*available)(void); - int (*poll)(int x, int y, int z, int b, void *priv); - void (*register_pci_slot)(int device, int type, int inta, int intb, int intc, int intd, void *priv); + int (*available)(void); + int (*poll)(int x, int y, int z, int b, void *priv); + void (*register_pci_slot)(int device, int type, int inta, int intb, int intc, int intd, void *priv); }; - void (*speed_changed)(void *priv); - void (*force_redraw)(void *priv); + void (*speed_changed)(void *priv); + void (*force_redraw)(void *priv); const device_config_t *config; } device_t; typedef struct { - const device_t *dev; - char name[2048]; + const device_t *dev; + char name[2048]; } device_context_t; - #ifdef __cplusplus extern "C" { #endif -extern void device_init(void); -extern void device_set_context(device_context_t *c, const device_t *d, int inst); -extern void device_context(const device_t *d); -extern void device_context_inst(const device_t *d, int inst); -extern void device_context_restore(void); -extern void *device_add(const device_t *d); -extern void device_add_ex(const device_t *d, void *priv); -extern void *device_add_inst(const device_t *d, int inst); -extern void device_add_inst_ex(const device_t *d, void *priv, int inst); -extern void *device_cadd(const device_t *d, const device_t *cd); -extern void device_cadd_ex(const device_t *d, const device_t *cd, void *priv); -extern void *device_cadd_inst(const device_t *d, const device_t *cd, int inst); -extern void device_cadd_inst_ex(const device_t *d, const device_t *cd, void *priv, int inst); -extern void device_close_all(void); -extern void device_reset_all(void); -extern void device_reset_all_pci(void); -extern void *device_get_priv(const device_t *d); -extern int device_available(const device_t *d); -extern int device_poll(const device_t *d, int x, int y, int z, int b); -extern void device_register_pci_slot(const device_t *d, int device, int type, int inta, int intb, int intc, int intd); -extern void device_speed_changed(void); -extern void device_force_redraw(void); -extern void device_get_name(const device_t *d, int bus, char *name); -extern int device_has_config(const device_t *d); +extern void device_init(void); +extern void device_set_context(device_context_t *c, const device_t *d, int inst); +extern void device_context(const device_t *d); +extern void device_context_inst(const device_t *d, int inst); +extern void device_context_restore(void); +extern void *device_add(const device_t *d); +extern void device_add_ex(const device_t *d, void *priv); +extern void *device_add_inst(const device_t *d, int inst); +extern void device_add_inst_ex(const device_t *d, void *priv, int inst); +extern void *device_cadd(const device_t *d, const device_t *cd); +extern void device_cadd_ex(const device_t *d, const device_t *cd, void *priv); +extern void *device_cadd_inst(const device_t *d, const device_t *cd, int inst); +extern void device_cadd_inst_ex(const device_t *d, const device_t *cd, void *priv, int inst); +extern void device_close_all(void); +extern void device_reset_all(void); +extern void device_reset_all_pci(void); +extern void *device_get_priv(const device_t *d); +extern int device_available(const device_t *d); +extern int device_poll(const device_t *d, int x, int y, int z, int b); +extern void device_register_pci_slot(const device_t *d, int device, int type, int inta, int intb, int intc, int intd); +extern void device_speed_changed(void); +extern void device_force_redraw(void); +extern void device_get_name(const device_t *d, int bus, char *name); +extern int device_has_config(const device_t *d); -extern int device_is_valid(const device_t *, int m); +extern int device_is_valid(const device_t *, int m); -extern int device_get_config_int(const char *name); -extern int device_get_config_int_ex(const char *s, int dflt_int); -extern int device_get_config_hex16(const char *name); -extern int device_get_config_hex20(const char *name); -extern int device_get_config_mac(const char *name, int dflt_int); -extern void device_set_config_int(const char *s, int val); -extern void device_set_config_hex16(const char *s, int val); -extern void device_set_config_hex20(const char *s, int val); -extern void device_set_config_mac(const char *s, int val); -extern const char *device_get_config_string(const char *name); -#define device_get_config_bios device_get_config_string +extern int device_get_config_int(const char *name); +extern int device_get_config_int_ex(const char *s, int dflt_int); +extern int device_get_config_hex16(const char *name); +extern int device_get_config_hex20(const char *name); +extern int device_get_config_mac(const char *name, int dflt_int); +extern void device_set_config_int(const char *s, int val); +extern void device_set_config_hex16(const char *s, int val); +extern void device_set_config_hex20(const char *s, int val); +extern void device_set_config_mac(const char *s, int val); +extern const char *device_get_config_string(const char *name); +#define device_get_config_bios device_get_config_string -extern char * device_get_internal_name(const device_t *d); +extern char *device_get_internal_name(const device_t *d); -extern int machine_get_config_int(char *s); -extern char *machine_get_config_string(char *s); +extern int machine_get_config_int(char *s); +extern char *machine_get_config_string(char *s); #ifdef __cplusplus } #endif - -#endif /*EMU_DEVICE_H*/ +#endif /*EMU_DEVICE_H*/ diff --git a/src/include/86box/lpt.h b/src/include/86box/lpt.h index 8ddf2c805..87bd90d48 100644 --- a/src/include/86box/lpt.h +++ b/src/include/86box/lpt.h @@ -1,15 +1,15 @@ #ifndef EMU_LPT_H -# define EMU_LPT_H +#define EMU_LPT_H -#define LPT1_ADDR 0x0378 -#define LPT1_IRQ 7 -#define LPT2_ADDR 0x0278 -#define LPT2_IRQ 5 +#define LPT1_ADDR 0x0378 +#define LPT1_IRQ 7 +#define LPT2_ADDR 0x0278 +#define LPT2_IRQ 5 // LPT 1 on machines when installed -#define LPT_MDA_ADDR 0x03bc -#define LPT_MDA_IRQ 7 -#define LPT4_ADDR 0x0268 -#define LPT4_IRQ 5 +#define LPT_MDA_ADDR 0x03bc +#define LPT_MDA_IRQ 7 +#define LPT4_ADDR 0x0268 +#define LPT4_IRQ 5 /* #define LPT5_ADDR 0x027c #define LPT5_IRQ 7 @@ -22,37 +22,36 @@ typedef struct const char *name; const char *internal_name; - void * (*init)(void *lpt); - void (*close)(void *p); - void (*write_data)(uint8_t val, void *p); - void (*write_ctrl)(uint8_t val, void *p); - uint8_t (*read_data)(void *p); - uint8_t (*read_status)(void *p); - uint8_t (*read_ctrl)(void *p); + void *(*init)(void *lpt); + void (*close)(void *p); + void (*write_data)(uint8_t val, void *p); + void (*write_ctrl)(uint8_t val, void *p); + uint8_t (*read_data)(void *p); + uint8_t (*read_status)(void *p); + uint8_t (*read_ctrl)(void *p); } lpt_device_t; - extern void lpt_init(void); extern void lpt_port_init(int i, uint16_t port); extern void lpt_port_irq(int i, uint8_t irq); extern void lpt_port_remove(int i); extern void lpt1_remove_ams(void); -#define lpt1_init(a) lpt_port_init(0, a) -#define lpt1_irq(a) lpt_port_irq(0, a) -#define lpt1_remove() lpt_port_remove(0) +#define lpt1_init(a) lpt_port_init(0, a) +#define lpt1_irq(a) lpt_port_irq(0, a) +#define lpt1_remove() lpt_port_remove(0) -#define lpt2_init(a) lpt_port_init(1, a) -#define lpt2_irq(a) lpt_port_irq(1, a) -#define lpt2_remove() lpt_port_remove(1) +#define lpt2_init(a) lpt_port_init(1, a) +#define lpt2_irq(a) lpt_port_irq(1, a) +#define lpt2_remove() lpt_port_remove(1) -#define lpt3_init(a) lpt_port_init(2, a) -#define lpt3_irq(a) lpt_port_irq(2, a) -#define lpt3_remove() lpt_port_remove(2) +#define lpt3_init(a) lpt_port_init(2, a) +#define lpt3_irq(a) lpt_port_irq(2, a) +#define lpt3_remove() lpt_port_remove(2) -#define lpt4_init(a) lpt_port_init(3, a) -#define lpt4_irq(a) lpt_port_irq(3, a) -#define lpt4_remove() lpt_port_remove(3) +#define lpt4_init(a) lpt_port_init(3, a) +#define lpt4_irq(a) lpt_port_irq(3, a) +#define lpt4_remove() lpt_port_remove(3) /* #define lpt5_init(a) lpt_port_init(4, a) @@ -64,31 +63,29 @@ extern void lpt1_remove_ams(void); #define lpt6_remove() lpt_port_remove(5) */ - void lpt_devices_init(void); void lpt_devices_close(void); - typedef struct { - uint8_t enabled, irq, - dat, ctrl; - uint16_t addr, pad0; - int device, enable_irq; - lpt_device_t * dt; - void * priv; + uint8_t enabled, irq, + dat, ctrl; + uint16_t addr, pad0; + int device, enable_irq; + lpt_device_t *dt; + void *priv; } lpt_port_t; -extern lpt_port_t lpt_ports[PARALLEL_MAX]; +extern lpt_port_t lpt_ports[PARALLEL_MAX]; -extern void lpt_write(uint16_t port, uint8_t val, void *priv); -extern uint8_t lpt_read(uint16_t port, void *priv); +extern void lpt_write(uint16_t port, uint8_t val, void *priv); +extern uint8_t lpt_read(uint16_t port, void *priv); -extern void lpt_irq(void *priv, int raise); +extern void lpt_irq(void *priv, int raise); -extern char * lpt_device_get_name(int id); -extern char * lpt_device_get_internal_name(int id); +extern char *lpt_device_get_name(int id); +extern char *lpt_device_get_internal_name(int id); -extern int lpt_device_get_from_internal_name(char *s); +extern int lpt_device_get_from_internal_name(char *s); extern const lpt_device_t lpt_dac_device; extern const lpt_device_t lpt_dac_stereo_device; diff --git a/src/include/86box/m_amstrad.h b/src/include/86box/m_amstrad.h index d498be6c3..c33d10c70 100644 --- a/src/include/86box/m_amstrad.h +++ b/src/include/86box/m_amstrad.h @@ -18,12 +18,11 @@ */ #ifndef MACHINE_AMSTRAD_H -# define MACHINE_AMSTRAD_H +#define MACHINE_AMSTRAD_H extern int amstrad_latch; -enum -{ +enum { AMSTRAD_NOLATCH, AMSTRAD_SW9, AMSTRAD_SW10 diff --git a/src/include/86box/m_at_t3100e.h b/src/include/86box/m_at_t3100e.h index 8943f7f2f..ec45d1254 100644 --- a/src/include/86box/m_at_t3100e.h +++ b/src/include/86box/m_at_t3100e.h @@ -38,22 +38,19 @@ */ #ifndef MACHINE_T3100E_H -# define MACHINE_T3100E_H - +#define MACHINE_T3100E_H extern const device_t t3100e_device; +extern void t3100e_notify_set(uint8_t value); +extern void t3100e_display_set(uint8_t value); +extern uint8_t t3100e_display_get(void); +extern uint8_t t3100e_config_get(void); +extern void t3100e_turbo_set(uint8_t value); +extern uint8_t t3100e_mono_get(void); +extern void t3100e_mono_set(uint8_t value); -extern void t3100e_notify_set(uint8_t value); -extern void t3100e_display_set(uint8_t value); -extern uint8_t t3100e_display_get(void); -extern uint8_t t3100e_config_get(void); -extern void t3100e_turbo_set(uint8_t value); -extern uint8_t t3100e_mono_get(void); -extern void t3100e_mono_set(uint8_t value); +extern void t3100e_video_options_set(uint8_t options); +extern void t3100e_display_set(uint8_t internal); -extern void t3100e_video_options_set(uint8_t options); -extern void t3100e_display_set(uint8_t internal); - - -#endif /*MACHINE_T3100E_H*/ +#endif /*MACHINE_T3100E_H*/ diff --git a/src/include/86box/m_xt_t1000.h b/src/include/86box/m_xt_t1000.h index 4220f1548..056e5bebf 100644 --- a/src/include/86box/m_xt_t1000.h +++ b/src/include/86box/m_xt_t1000.h @@ -38,24 +38,21 @@ */ #ifndef MACHINE_T1000_H -# define MACHINE_T1000_H - +#define MACHINE_T1000_H extern const device_t t1000_video_device; extern const device_t t1200_video_device; - -extern void t1000_video_options_set(uint8_t options); +extern void t1000_video_options_set(uint8_t options); extern void t1000_video_enable(uint8_t enabled); -extern void t1000_display_set(uint8_t internal); +extern void t1000_display_set(uint8_t internal); -extern void t1000_syskey(uint8_t amask, uint8_t omask, uint8_t xmask); +extern void t1000_syskey(uint8_t amask, uint8_t omask, uint8_t xmask); -extern void t1000_nvr_load(void); -extern void t1000_nvr_save(void); +extern void t1000_nvr_load(void); +extern void t1000_nvr_save(void); -extern void t1200_nvr_load(void); -extern void t1200_nvr_save(void); +extern void t1200_nvr_load(void); +extern void t1200_nvr_save(void); - -#endif /*MACHINE_T1000_H*/ +#endif /*MACHINE_T1000_H*/ diff --git a/src/include/86box/m_xt_xi8088.h b/src/include/86box/m_xt_xi8088.h index e2421fa0a..99e8826ac 100644 --- a/src/include/86box/m_xt_xi8088.h +++ b/src/include/86box/m_xt_xi8088.h @@ -1,13 +1,13 @@ #ifndef MACHINE_XI80888_H -# define MACHINE_XI80888_H +#define MACHINE_XI80888_H #include <86box/device.h> extern const device_t xi8088_device; uint8_t xi8088_turbo_get(); -void xi8088_turbo_set(uint8_t value); -void xi8088_bios_128kb_set(int val); -int xi8088_bios_128kb(); +void xi8088_turbo_set(uint8_t value); +void xi8088_bios_128kb_set(int val); +int xi8088_bios_128kb(); #endif /*MACHINE_XI80888_H*/ diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index 1873d329c..b43f9e1ec 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -20,7 +20,7 @@ */ #ifndef EMU_MACHINE_H -# define EMU_MACHINE_H +#define EMU_MACHINE_H /* Machine feature flags. */ #define MACHINE_BUS_NONE 0x00000000 /* sys has no bus */ @@ -250,78 +250,78 @@ enum { }; typedef struct _machine_filter_ { - const char *name; + const char *name; const char id; } machine_filter_t; typedef struct _machine_cpu_ { - uint32_t package; - const uint8_t *block; - uint32_t min_bus; - uint32_t max_bus; - uint16_t min_voltage; - uint16_t max_voltage; - float min_multi; - float max_multi; + uint32_t package; + const uint8_t *block; + uint32_t min_bus; + uint32_t max_bus; + uint16_t min_voltage; + uint16_t max_voltage; + float min_multi; + float max_multi; } machine_cpu_t; typedef struct _machine_memory_ { - uint32_t min, max; - int step; + uint32_t min, max; + int step; } machine_memory_t; typedef struct _machine_ { - const char *name; - const char *internal_name; - uint32_t type; - uint32_t chipset; - int (*init)(const struct _machine_ *); - uintptr_t pad, pad0, pad1, pad2; - const machine_cpu_t cpu; - uintptr_t bus_flags; - uintptr_t flags; + const char *name; + const char *internal_name; + uint32_t type; + uint32_t chipset; + int (*init)(const struct _machine_ *); + uintptr_t pad, pad0, pad1, pad2; + const machine_cpu_t cpu; + uintptr_t bus_flags; + uintptr_t flags; const machine_memory_t ram; - int ram_granularity; - int nvrmask; - uint16_t kbc; + int ram_granularity; + int nvrmask; + uint16_t kbc; /* Bits: - 7-0 Set bits are forced set on P1 (no forced set = 0x00); - 15-8 Clear bits are forced clear on P1 (no foced clear = 0xff). */ - uint16_t kbc_p1; - uint32_t gpio; - uint32_t gpio_acpi; + 7-0 Set bits are forced set on P1 (no forced set = 0x00); + 15-8 Clear bits are forced clear on P1 (no foced clear = 0xff). */ + uint16_t kbc_p1; + uint32_t gpio; + uint32_t gpio_acpi; #ifdef EMU_DEVICE_H const device_t *device; const device_t *vid_device; const device_t *snd_device; const device_t *net_device; #else - void *device; - void *vid_device; - void *snd_device; - void *net_device; + void *device; + void *vid_device; + void *snd_device; + void *net_device; #endif } machine_t; /* Global variables. */ extern const machine_filter_t machine_types[], - machine_chipsets[]; -extern const machine_t machines[]; -extern int bios_only; -extern int machine; + machine_chipsets[]; +extern const machine_t machines[]; +extern int bios_only; +extern int machine; /* Core functions. */ -extern int machine_count(void); -extern int machine_available(int m); -extern char *machine_getname(void); -extern char *machine_getname_ex(int m); -extern char *machine_get_internal_name(void); -extern int machine_get_machine_from_internal_name(char *s); -extern void machine_init(void); +extern int machine_count(void); +extern int machine_available(int m); +extern char *machine_getname(void); +extern char *machine_getname_ex(int m); +extern char *machine_get_internal_name(void); +extern int machine_get_machine_from_internal_name(char *s); +extern void machine_init(void); #ifdef EMU_DEVICE_H -extern const device_t *machine_getdevice(int m); +extern const device_t *machine_getdevice(int m); #endif -extern char *machine_get_internal_name_ex(int m); +extern char *machine_get_internal_name_ex(int m); extern int machine_get_nvrmask(int m); extern int machine_has_flags(int m, int flags); extern int machine_has_bus(int m, int bus_flags); @@ -335,476 +335,474 @@ extern void machine_close(void); extern uint8_t machine_get_p1(void); extern void machine_load_p1(int m); extern uint32_t machine_get_gpi(void); -extern void machine_load_gpi(int m); +extern void machine_load_gpi(int m); extern void machine_set_gpi(uint32_t gpi); /* Initialization functions for boards and systems. */ -extern void machine_common_init(const machine_t *); +extern void machine_common_init(const machine_t *); /* m_amstrad.c */ -extern int machine_pc1512_init(const machine_t *); -extern int machine_pc1640_init(const machine_t *); -extern int machine_pc200_init(const machine_t *); -extern int machine_ppc512_init(const machine_t *); -extern int machine_pc2086_init(const machine_t *); -extern int machine_pc3086_init(const machine_t *); +extern int machine_pc1512_init(const machine_t *); +extern int machine_pc1640_init(const machine_t *); +extern int machine_pc200_init(const machine_t *); +extern int machine_ppc512_init(const machine_t *); +extern int machine_pc2086_init(const machine_t *); +extern int machine_pc3086_init(const machine_t *); /* m_at.c */ -extern void machine_at_common_init_ex(const machine_t *, int type); -extern void machine_at_common_init(const machine_t *); -extern void machine_at_init(const machine_t *); -extern void machine_at_ps2_init(const machine_t *); -extern void machine_at_common_ide_init(const machine_t *); -extern void machine_at_ibm_common_ide_init(const machine_t *); -extern void machine_at_ide_init(const machine_t *); -extern void machine_at_ps2_ide_init(const machine_t *); +extern void machine_at_common_init_ex(const machine_t *, int type); +extern void machine_at_common_init(const machine_t *); +extern void machine_at_init(const machine_t *); +extern void machine_at_ps2_init(const machine_t *); +extern void machine_at_common_ide_init(const machine_t *); +extern void machine_at_ibm_common_ide_init(const machine_t *); +extern void machine_at_ide_init(const machine_t *); +extern void machine_at_ps2_ide_init(const machine_t *); -extern int machine_at_ibm_init(const machine_t *); +extern int machine_at_ibm_init(const machine_t *); -//IBM AT with custom BIOS -extern int machine_at_ibmatami_init(const machine_t *); // IBM AT with AMI BIOS -extern int machine_at_ibmatpx_init(const machine_t *); //IBM AT with Phoenix BIOS -extern int machine_at_ibmatquadtel_init(const machine_t *); // IBM AT with Quadtel BIOS +// IBM AT with custom BIOS +extern int machine_at_ibmatami_init(const machine_t *); // IBM AT with AMI BIOS +extern int machine_at_ibmatpx_init(const machine_t *); // IBM AT with Phoenix BIOS +extern int machine_at_ibmatquadtel_init(const machine_t *); // IBM AT with Quadtel BIOS -extern int machine_at_ibmxt286_init(const machine_t *); +extern int machine_at_ibmxt286_init(const machine_t *); -extern int machine_at_siemens_init(const machine_t *); //Siemens PCD-2L. N82330 discrete machine. It segfaults in some places +extern int machine_at_siemens_init(const machine_t *); // Siemens PCD-2L. N82330 discrete machine. It segfaults in some places #if defined(DEV_BRANCH) && defined(USE_OPEN_AT) -extern int machine_at_openat_init(const machine_t *); +extern int machine_at_openat_init(const machine_t *); #endif /* m_at_286_386sx.c */ -extern int machine_at_tg286m_init(const machine_t *); -extern int machine_at_ama932j_init(const machine_t *); -extern int machine_at_px286_init(const machine_t *); -extern int machine_at_quadt286_init(const machine_t *); -extern int machine_at_mr286_init(const machine_t *); +extern int machine_at_tg286m_init(const machine_t *); +extern int machine_at_ama932j_init(const machine_t *); +extern int machine_at_px286_init(const machine_t *); +extern int machine_at_quadt286_init(const machine_t *); +extern int machine_at_mr286_init(const machine_t *); -extern int machine_at_neat_init(const machine_t *); -extern int machine_at_neat_ami_init(const machine_t *); +extern int machine_at_neat_init(const machine_t *); +extern int machine_at_neat_ami_init(const machine_t *); -extern int machine_at_quadt386sx_init(const machine_t *); +extern int machine_at_quadt386sx_init(const machine_t *); -extern int machine_at_award286_init(const machine_t *); -extern int machine_at_gdc212m_init(const machine_t *); -extern int machine_at_gw286ct_init(const machine_t *); -extern int machine_at_super286tr_init(const machine_t *); -extern int machine_at_spc4200p_init(const machine_t *); -extern int machine_at_spc4216p_init(const machine_t *); -extern int machine_at_spc4620p_init(const machine_t *); -extern int machine_at_kmxc02_init(const machine_t *); -extern int machine_at_deskmaster286_init(const machine_t *); +extern int machine_at_award286_init(const machine_t *); +extern int machine_at_gdc212m_init(const machine_t *); +extern int machine_at_gw286ct_init(const machine_t *); +extern int machine_at_super286tr_init(const machine_t *); +extern int machine_at_spc4200p_init(const machine_t *); +extern int machine_at_spc4216p_init(const machine_t *); +extern int machine_at_spc4620p_init(const machine_t *); +extern int machine_at_kmxc02_init(const machine_t *); +extern int machine_at_deskmaster286_init(const machine_t *); -extern int machine_at_pc8_init(const machine_t *); -extern int machine_at_3302_init(const machine_t *); +extern int machine_at_pc8_init(const machine_t *); +extern int machine_at_3302_init(const machine_t *); #if defined(DEV_BRANCH) && defined(USE_OLIVETTI) -extern int machine_at_m290_init(const machine_t *); +extern int machine_at_m290_init(const machine_t *); #endif -extern int machine_at_shuttle386sx_init(const machine_t *); -extern int machine_at_adi386sx_init(const machine_t *); -extern int machine_at_cmdsl386sx16_init(const machine_t *); -extern int machine_at_cmdsl386sx25_init(const machine_t *); -extern int machine_at_dataexpert386sx_init(const machine_t *); -extern int machine_at_spc6033p_init(const machine_t *); -extern int machine_at_wd76c10_init(const machine_t *); -extern int machine_at_arb1374_init(const machine_t *); -extern int machine_at_sbc350a_init(const machine_t *); -extern int machine_at_flytech386_init(const machine_t *); -extern int machine_at_mr1217_init(const machine_t *); -extern int machine_at_pja511m_init(const machine_t *); -extern int machine_at_prox1332_init(const machine_t *); +extern int machine_at_shuttle386sx_init(const machine_t *); +extern int machine_at_adi386sx_init(const machine_t *); +extern int machine_at_cmdsl386sx16_init(const machine_t *); +extern int machine_at_cmdsl386sx25_init(const machine_t *); +extern int machine_at_dataexpert386sx_init(const machine_t *); +extern int machine_at_spc6033p_init(const machine_t *); +extern int machine_at_wd76c10_init(const machine_t *); +extern int machine_at_arb1374_init(const machine_t *); +extern int machine_at_sbc350a_init(const machine_t *); +extern int machine_at_flytech386_init(const machine_t *); +extern int machine_at_mr1217_init(const machine_t *); +extern int machine_at_pja511m_init(const machine_t *); +extern int machine_at_prox1332_init(const machine_t *); -extern int machine_at_awardsx_init(const machine_t *); +extern int machine_at_awardsx_init(const machine_t *); -extern int machine_at_pc916sx_init(const machine_t *); +extern int machine_at_pc916sx_init(const machine_t *); /* m_at_386dx_486.c */ -extern int machine_at_acc386_init(const machine_t *); -extern int machine_at_asus386_init(const machine_t *); -extern int machine_at_ecs386_init(const machine_t *); -extern int machine_at_spc6000a_init(const machine_t *); -extern int machine_at_micronics386_init(const machine_t *); +extern int machine_at_acc386_init(const machine_t *); +extern int machine_at_asus386_init(const machine_t *); +extern int machine_at_ecs386_init(const machine_t *); +extern int machine_at_spc6000a_init(const machine_t *); +extern int machine_at_micronics386_init(const machine_t *); -extern int machine_at_rycleopardlx_init(const machine_t *); +extern int machine_at_rycleopardlx_init(const machine_t *); -extern int machine_at_486vchd_init(const machine_t *); +extern int machine_at_486vchd_init(const machine_t *); -extern int machine_at_cs4031_init(const machine_t *); +extern int machine_at_cs4031_init(const machine_t *); -extern int machine_at_pb410a_init(const machine_t *); +extern int machine_at_pb410a_init(const machine_t *); -extern int machine_at_decpclpv_init(const machine_t *); -extern int machine_at_acerv10_init(const machine_t *); +extern int machine_at_decpclpv_init(const machine_t *); +extern int machine_at_acerv10_init(const machine_t *); -extern int machine_at_acera1g_init(const machine_t *); -extern int machine_at_ali1429_init(const machine_t *); -extern int machine_at_winbios1429_init(const machine_t *); +extern int machine_at_acera1g_init(const machine_t *); +extern int machine_at_ali1429_init(const machine_t *); +extern int machine_at_winbios1429_init(const machine_t *); -extern int machine_at_opti495_init(const machine_t *); -extern int machine_at_opti495_ami_init(const machine_t *); -extern int machine_at_opti495_mr_init(const machine_t *); +extern int machine_at_opti495_init(const machine_t *); +extern int machine_at_opti495_ami_init(const machine_t *); +extern int machine_at_opti495_mr_init(const machine_t *); -extern int machine_at_vect486vl_init(const machine_t *); -extern int machine_at_d824_init(const machine_t *); +extern int machine_at_vect486vl_init(const machine_t *); +extern int machine_at_d824_init(const machine_t *); -extern int machine_at_403tg_init(const machine_t *); -extern int machine_at_403tg_d_init(const machine_t *); -extern int machine_at_403tg_d_mr_init(const machine_t *); -extern int machine_at_pc330_6573_init(const machine_t *); -extern int machine_at_mvi486_init(const machine_t *); +extern int machine_at_403tg_init(const machine_t *); +extern int machine_at_403tg_d_init(const machine_t *); +extern int machine_at_403tg_d_mr_init(const machine_t *); +extern int machine_at_pc330_6573_init(const machine_t *); +extern int machine_at_mvi486_init(const machine_t *); -extern int machine_at_sis401_init(const machine_t *); -extern int machine_at_isa486_init(const machine_t *); -extern int machine_at_av4_init(const machine_t *); -extern int machine_at_valuepoint433_init(const machine_t *); +extern int machine_at_sis401_init(const machine_t *); +extern int machine_at_isa486_init(const machine_t *); +extern int machine_at_av4_init(const machine_t *); +extern int machine_at_valuepoint433_init(const machine_t *); -extern int machine_at_vli486sv2g_init(const machine_t *); -extern int machine_at_ami471_init(const machine_t *); -extern int machine_at_dtk486_init(const machine_t *); -extern int machine_at_px471_init(const machine_t *); -extern int machine_at_win471_init(const machine_t *); -extern int machine_at_vi15g_init(const machine_t *); -extern int machine_at_greenb_init(const machine_t *); +extern int machine_at_vli486sv2g_init(const machine_t *); +extern int machine_at_ami471_init(const machine_t *); +extern int machine_at_dtk486_init(const machine_t *); +extern int machine_at_px471_init(const machine_t *); +extern int machine_at_win471_init(const machine_t *); +extern int machine_at_vi15g_init(const machine_t *); +extern int machine_at_greenb_init(const machine_t *); -extern int machine_at_r418_init(const machine_t *); -extern int machine_at_ls486e_init(const machine_t *); -extern int machine_at_4dps_init(const machine_t *); -extern int machine_at_4saw2_init(const machine_t *); -extern int machine_at_m4li_init(const machine_t *); -extern int machine_at_alfredo_init(const machine_t *); -extern int machine_at_ninja_init(const machine_t *); -extern int machine_at_486sp3_init(const machine_t *); -extern int machine_at_486sp3c_init(const machine_t *); -extern int machine_at_486sp3g_init(const machine_t *); -extern int machine_at_486ap4_init(const machine_t *); -extern int machine_at_g486vpa_init(const machine_t *); -extern int machine_at_486vipio2_init(const machine_t *); -extern int machine_at_abpb4_init(const machine_t *); -extern int machine_at_win486pci_init(const machine_t *); -extern int machine_at_ms4145_init(const machine_t *); -extern int machine_at_sbc490_init(const machine_t *); -extern int machine_at_tf486_init(const machine_t *); +extern int machine_at_r418_init(const machine_t *); +extern int machine_at_ls486e_init(const machine_t *); +extern int machine_at_4dps_init(const machine_t *); +extern int machine_at_4saw2_init(const machine_t *); +extern int machine_at_m4li_init(const machine_t *); +extern int machine_at_alfredo_init(const machine_t *); +extern int machine_at_ninja_init(const machine_t *); +extern int machine_at_486sp3_init(const machine_t *); +extern int machine_at_486sp3c_init(const machine_t *); +extern int machine_at_486sp3g_init(const machine_t *); +extern int machine_at_486ap4_init(const machine_t *); +extern int machine_at_g486vpa_init(const machine_t *); +extern int machine_at_486vipio2_init(const machine_t *); +extern int machine_at_abpb4_init(const machine_t *); +extern int machine_at_win486pci_init(const machine_t *); +extern int machine_at_ms4145_init(const machine_t *); +extern int machine_at_sbc490_init(const machine_t *); +extern int machine_at_tf486_init(const machine_t *); -extern int machine_at_pci400cb_init(const machine_t *); -extern int machine_at_g486ip_init(const machine_t *); +extern int machine_at_pci400cb_init(const machine_t *); +extern int machine_at_g486ip_init(const machine_t *); -extern int machine_at_itoxstar_init(const machine_t *); -extern int machine_at_arb1423c_init(const machine_t *); -extern int machine_at_arb1479_init(const machine_t *); -extern int machine_at_pcm9340_init(const machine_t *); -extern int machine_at_pcm5330_init(const machine_t *); +extern int machine_at_itoxstar_init(const machine_t *); +extern int machine_at_arb1423c_init(const machine_t *); +extern int machine_at_arb1479_init(const machine_t *); +extern int machine_at_pcm9340_init(const machine_t *); +extern int machine_at_pcm5330_init(const machine_t *); -extern int machine_at_ecs486_init(const machine_t *); -extern int machine_at_hot433_init(const machine_t *); -extern int machine_at_atc1415_init(const machine_t *); -extern int machine_at_actionpc2600_init(const machine_t *); -extern int machine_at_m919_init(const machine_t *); -extern int machine_at_spc7700plw_init(const machine_t *); +extern int machine_at_ecs486_init(const machine_t *); +extern int machine_at_hot433_init(const machine_t *); +extern int machine_at_atc1415_init(const machine_t *); +extern int machine_at_actionpc2600_init(const machine_t *); +extern int machine_at_m919_init(const machine_t *); +extern int machine_at_spc7700plw_init(const machine_t *); /* m_at_commodore.c */ -extern int machine_at_cmdpc_init(const machine_t *); +extern int machine_at_cmdpc_init(const machine_t *); /* m_at_compaq.c */ -extern int machine_at_portableii_init(const machine_t *); -extern int machine_at_portableiii_init(const machine_t *); -extern int machine_at_portableiii386_init(const machine_t *); +extern int machine_at_portableii_init(const machine_t *); +extern int machine_at_portableiii_init(const machine_t *); +extern int machine_at_portableiii386_init(const machine_t *); #if defined(DEV_BRANCH) && defined(USE_DESKPRO386) -extern int machine_at_deskpro386_init(const machine_t *); +extern int machine_at_deskpro386_init(const machine_t *); #endif /* m_at_socket4.c */ -extern void machine_at_premiere_common_init(const machine_t *, int); -extern void machine_at_award_common_init(const machine_t *); +extern void machine_at_premiere_common_init(const machine_t *, int); +extern void machine_at_award_common_init(const machine_t *); -extern void machine_at_sp4_common_init(const machine_t *model); +extern void machine_at_sp4_common_init(const machine_t *model); -extern int machine_at_excaliburpci_init(const machine_t *); -extern int machine_at_p5mp3_init(const machine_t *); -extern int machine_at_dellxp60_init(const machine_t *); -extern int machine_at_opti560l_init(const machine_t *); -extern int machine_at_ambradp60_init(const machine_t *); -extern int machine_at_valuepointp60_init(const machine_t *); -extern int machine_at_revenge_init(const machine_t *); -extern int machine_at_586mc1_init(const machine_t *); -extern int machine_at_pb520r_init(const machine_t *); +extern int machine_at_excaliburpci_init(const machine_t *); +extern int machine_at_p5mp3_init(const machine_t *); +extern int machine_at_dellxp60_init(const machine_t *); +extern int machine_at_opti560l_init(const machine_t *); +extern int machine_at_ambradp60_init(const machine_t *); +extern int machine_at_valuepointp60_init(const machine_t *); +extern int machine_at_revenge_init(const machine_t *); +extern int machine_at_586mc1_init(const machine_t *); +extern int machine_at_pb520r_init(const machine_t *); -extern int machine_at_excalibur_init(const machine_t *); +extern int machine_at_excalibur_init(const machine_t *); -extern int machine_at_p5vl_init(const machine_t *); +extern int machine_at_p5vl_init(const machine_t *); -extern int machine_at_excaliburpci2_init(const machine_t *); -extern int machine_at_p5sp4_init(const machine_t *); +extern int machine_at_excaliburpci2_init(const machine_t *); +extern int machine_at_p5sp4_init(const machine_t *); /* m_at_socket5.c */ -extern int machine_at_plato_init(const machine_t *); -extern int machine_at_ambradp90_init(const machine_t *); -extern int machine_at_430nx_init(const machine_t *); +extern int machine_at_plato_init(const machine_t *); +extern int machine_at_ambradp90_init(const machine_t *); +extern int machine_at_430nx_init(const machine_t *); -extern int machine_at_acerv30_init(const machine_t *); -extern int machine_at_apollo_init(const machine_t *); -extern int machine_at_exp8551_init(const machine_t *); -extern int machine_at_zappa_init(const machine_t *); -extern int machine_at_powermatev_init(const machine_t *); -extern int machine_at_mb500n_init(const machine_t *); -extern int machine_at_hawk_init(const machine_t *); +extern int machine_at_acerv30_init(const machine_t *); +extern int machine_at_apollo_init(const machine_t *); +extern int machine_at_exp8551_init(const machine_t *); +extern int machine_at_zappa_init(const machine_t *); +extern int machine_at_powermatev_init(const machine_t *); +extern int machine_at_mb500n_init(const machine_t *); +extern int machine_at_hawk_init(const machine_t *); -extern int machine_at_pat54pv_init(const machine_t *); +extern int machine_at_pat54pv_init(const machine_t *); -extern int machine_at_hot543_init(const machine_t *); - -extern int machine_at_p54sp4_init(const machine_t *); -extern int machine_at_sq588_init(const machine_t *); +extern int machine_at_hot543_init(const machine_t *); +extern int machine_at_p54sp4_init(const machine_t *); +extern int machine_at_sq588_init(const machine_t *); /* m_at_socket7_3v.c */ -extern int machine_at_p54tp4xe_init(const machine_t *); -extern int machine_at_p54tp4xe_mr_init(const machine_t *); -extern int machine_at_gw2katx_init(const machine_t *); -extern int machine_at_thor_init(const machine_t *); -extern int machine_at_mrthor_init(const machine_t *); -extern int machine_at_endeavor_init(const machine_t *); -extern int machine_at_ms5119_init(const machine_t *); -extern int machine_at_pb640_init(const machine_t *); -extern int machine_at_fmb_init(const machine_t *); +extern int machine_at_p54tp4xe_init(const machine_t *); +extern int machine_at_p54tp4xe_mr_init(const machine_t *); +extern int machine_at_gw2katx_init(const machine_t *); +extern int machine_at_thor_init(const machine_t *); +extern int machine_at_mrthor_init(const machine_t *); +extern int machine_at_endeavor_init(const machine_t *); +extern int machine_at_ms5119_init(const machine_t *); +extern int machine_at_pb640_init(const machine_t *); +extern int machine_at_fmb_init(const machine_t *); -extern int machine_at_acerm3a_init(const machine_t *); -extern int machine_at_ap53_init(const machine_t *); -extern int machine_at_8500tuc_init(const machine_t *); -extern int machine_at_p55t2s_init(const machine_t *); +extern int machine_at_acerm3a_init(const machine_t *); +extern int machine_at_ap53_init(const machine_t *); +extern int machine_at_8500tuc_init(const machine_t *); +extern int machine_at_p55t2s_init(const machine_t *); -extern int machine_at_p5vxb_init(const machine_t *); -extern int machine_at_gw2kte_init(const machine_t *); +extern int machine_at_p5vxb_init(const machine_t *); +extern int machine_at_gw2kte_init(const machine_t *); -extern int machine_at_ap5s_init(const machine_t *); -extern int machine_at_vectra54_init(const machine_t *); +extern int machine_at_ap5s_init(const machine_t *); +extern int machine_at_vectra54_init(const machine_t *); /* m_at_socket7.c */ -extern int machine_at_acerv35n_init(const machine_t *); -extern int machine_at_p55t2p4_init(const machine_t *); -extern int machine_at_m7shi_init(const machine_t *); -extern int machine_at_tc430hx_init(const machine_t *); -extern int machine_at_equium5200_init(const machine_t *); -extern int machine_at_pcv90_init(const machine_t *); -extern int machine_at_p65up5_cp55t2d_init(const machine_t *); +extern int machine_at_acerv35n_init(const machine_t *); +extern int machine_at_p55t2p4_init(const machine_t *); +extern int machine_at_m7shi_init(const machine_t *); +extern int machine_at_tc430hx_init(const machine_t *); +extern int machine_at_equium5200_init(const machine_t *); +extern int machine_at_pcv90_init(const machine_t *); +extern int machine_at_p65up5_cp55t2d_init(const machine_t *); -extern int machine_at_ap5vm_init(const machine_t *); -extern int machine_at_p55tvp4_init(const machine_t *); -extern int machine_at_5ivg_init(const machine_t *); -extern int machine_at_8500tvxa_init(const machine_t *); -extern int machine_at_presario2240_init(const machine_t *); -extern int machine_at_presario4500_init(const machine_t *); -extern int machine_at_p55va_init(const machine_t *); -extern int machine_at_brio80xx_init(const machine_t *); -extern int machine_at_pb680_init(const machine_t *); -extern int machine_at_mb520n_init(const machine_t *); -extern int machine_at_i430vx_init(const machine_t *); +extern int machine_at_ap5vm_init(const machine_t *); +extern int machine_at_p55tvp4_init(const machine_t *); +extern int machine_at_5ivg_init(const machine_t *); +extern int machine_at_8500tvxa_init(const machine_t *); +extern int machine_at_presario2240_init(const machine_t *); +extern int machine_at_presario4500_init(const machine_t *); +extern int machine_at_p55va_init(const machine_t *); +extern int machine_at_brio80xx_init(const machine_t *); +extern int machine_at_pb680_init(const machine_t *); +extern int machine_at_mb520n_init(const machine_t *); +extern int machine_at_i430vx_init(const machine_t *); -extern int machine_at_nupro592_init(const machine_t *); -extern int machine_at_tx97_init(const machine_t *); +extern int machine_at_nupro592_init(const machine_t *); +extern int machine_at_tx97_init(const machine_t *); #if defined(DEV_BRANCH) && defined(USE_AN430TX) -extern int machine_at_an430tx_init(const machine_t *); +extern int machine_at_an430tx_init(const machine_t *); #endif -extern int machine_at_ym430tx_init(const machine_t *); -extern int machine_at_mb540n_init(const machine_t *); -extern int machine_at_56a5_init(const machine_t *); -extern int machine_at_p5mms98_init(const machine_t *); +extern int machine_at_ym430tx_init(const machine_t *); +extern int machine_at_mb540n_init(const machine_t *); +extern int machine_at_56a5_init(const machine_t *); +extern int machine_at_p5mms98_init(const machine_t *); -extern int machine_at_ficva502_init(const machine_t *); +extern int machine_at_ficva502_init(const machine_t *); -extern int machine_at_ficpa2012_init(const machine_t *); +extern int machine_at_ficpa2012_init(const machine_t *); -extern int machine_at_r534f_init(const machine_t *); -extern int machine_at_ms5146_init(const machine_t *); +extern int machine_at_r534f_init(const machine_t *); +extern int machine_at_ms5146_init(const machine_t *); -extern int machine_at_m560_init(const machine_t *); -extern int machine_at_ms5164_init(const machine_t *); +extern int machine_at_m560_init(const machine_t *); +extern int machine_at_ms5164_init(const machine_t *); /* m_at_sockets7.c */ -extern int machine_at_p5a_init(const machine_t *); -extern int machine_at_m579_init(const machine_t *); -extern int machine_at_5aa_init(const machine_t *); -extern int machine_at_5ax_init(const machine_t *); +extern int machine_at_p5a_init(const machine_t *); +extern int machine_at_m579_init(const machine_t *); +extern int machine_at_5aa_init(const machine_t *); +extern int machine_at_5ax_init(const machine_t *); -extern int machine_at_ax59pro_init(const machine_t *); -extern int machine_at_mvp3_init(const machine_t *); -extern int machine_at_ficva503a_init(const machine_t *); -extern int machine_at_5emapro_init(const machine_t *); +extern int machine_at_ax59pro_init(const machine_t *); +extern int machine_at_mvp3_init(const machine_t *); +extern int machine_at_ficva503a_init(const machine_t *); +extern int machine_at_5emapro_init(const machine_t *); /* m_at_socket8.c */ -extern int machine_at_p6rp4_init(const machine_t *); -extern int machine_at_aurora_init(const machine_t *); +extern int machine_at_p6rp4_init(const machine_t *); +extern int machine_at_aurora_init(const machine_t *); -extern int machine_at_686nx_init(const machine_t *); -extern int machine_at_acerv60n_init(const machine_t *); -extern int machine_at_vs440fx_init(const machine_t *); -extern int machine_at_ap440fx_init(const machine_t *); -extern int machine_at_mb600n_init(const machine_t *); -extern int machine_at_8600ttc_init(const machine_t *); -extern int machine_at_m6mi_init(const machine_t *); +extern int machine_at_686nx_init(const machine_t *); +extern int machine_at_acerv60n_init(const machine_t *); +extern int machine_at_vs440fx_init(const machine_t *); +extern int machine_at_ap440fx_init(const machine_t *); +extern int machine_at_mb600n_init(const machine_t *); +extern int machine_at_8600ttc_init(const machine_t *); +extern int machine_at_m6mi_init(const machine_t *); #ifdef EMU_DEVICE_H -extern void machine_at_p65up5_common_init(const machine_t *, const device_t *northbridge); +extern void machine_at_p65up5_common_init(const machine_t *, const device_t *northbridge); #endif -extern int machine_at_p65up5_cp6nd_init(const machine_t *); +extern int machine_at_p65up5_cp6nd_init(const machine_t *); /* m_at_slot1.c */ -extern int machine_at_m729_init(const machine_t *); +extern int machine_at_m729_init(const machine_t *); -extern int machine_at_p65up5_cpknd_init(const machine_t *); -extern int machine_at_kn97_init(const machine_t *); +extern int machine_at_p65up5_cpknd_init(const machine_t *); +extern int machine_at_kn97_init(const machine_t *); -extern int machine_at_lx6_init(const machine_t *); -extern int machine_at_spitfire_init(const machine_t *); +extern int machine_at_lx6_init(const machine_t *); +extern int machine_at_spitfire_init(const machine_t *); -extern int machine_at_p6i440e2_init(const machine_t *); +extern int machine_at_p6i440e2_init(const machine_t *); -extern int machine_at_p2bls_init(const machine_t *); -extern int machine_at_p3bf_init(const machine_t *); -extern int machine_at_bf6_init(const machine_t *); -extern int machine_at_ax6bc_init(const machine_t *); -extern int machine_at_atc6310bxii_init(const machine_t *); -extern int machine_at_686bx_init(const machine_t *); -extern int machine_at_s1846_init(const machine_t *); -extern int machine_at_p6sba_init(const machine_t *); -extern int machine_at_ficka6130_init(const machine_t *); -extern int machine_at_p3v133_init(const machine_t *); -extern int machine_at_p3v4x_init(const machine_t *); +extern int machine_at_p2bls_init(const machine_t *); +extern int machine_at_p3bf_init(const machine_t *); +extern int machine_at_bf6_init(const machine_t *); +extern int machine_at_ax6bc_init(const machine_t *); +extern int machine_at_atc6310bxii_init(const machine_t *); +extern int machine_at_686bx_init(const machine_t *); +extern int machine_at_s1846_init(const machine_t *); +extern int machine_at_p6sba_init(const machine_t *); +extern int machine_at_ficka6130_init(const machine_t *); +extern int machine_at_p3v133_init(const machine_t *); +extern int machine_at_p3v4x_init(const machine_t *); -extern int machine_at_vei8_init(const machine_t *); +extern int machine_at_vei8_init(const machine_t *); -extern int machine_at_borapro_init(const machine_t *); -extern int machine_at_ms6168_init(const machine_t *); +extern int machine_at_borapro_init(const machine_t *); +extern int machine_at_ms6168_init(const machine_t *); /* m_at_slot2.c */ -extern int machine_at_6gxu_init(const machine_t *); -extern int machine_at_s2dge_init(const machine_t *); -extern int machine_at_fw6400gx_init(const machine_t *); +extern int machine_at_6gxu_init(const machine_t *); +extern int machine_at_s2dge_init(const machine_t *); +extern int machine_at_fw6400gx_init(const machine_t *); /* m_at_socket370.c */ -extern int machine_at_s370slm_init(const machine_t *); +extern int machine_at_s370slm_init(const machine_t *); -extern int machine_at_cubx_init(const machine_t *); -extern int machine_at_atc7020bxii_init(const machine_t *); -extern int machine_at_ambx133_init(const machine_t *); -extern int machine_at_awo671r_init(const machine_t *); -extern int machine_at_63a1_init(const machine_t *); -extern int machine_at_s370sba_init(const machine_t *); -extern int machine_at_apas3_init(const machine_t *); -extern int machine_at_gt694va_init(const machine_t *); -extern int machine_at_cuv4xls_init(const machine_t *); -extern int machine_at_6via90ap_init(const machine_t *); -extern int machine_at_s1857_init(const machine_t *); -extern int machine_at_p6bap_init(const machine_t *); +extern int machine_at_cubx_init(const machine_t *); +extern int machine_at_atc7020bxii_init(const machine_t *); +extern int machine_at_ambx133_init(const machine_t *); +extern int machine_at_awo671r_init(const machine_t *); +extern int machine_at_63a1_init(const machine_t *); +extern int machine_at_s370sba_init(const machine_t *); +extern int machine_at_apas3_init(const machine_t *); +extern int machine_at_gt694va_init(const machine_t *); +extern int machine_at_cuv4xls_init(const machine_t *); +extern int machine_at_6via90ap_init(const machine_t *); +extern int machine_at_s1857_init(const machine_t *); +extern int machine_at_p6bap_init(const machine_t *); /* m_at_misc.c */ -extern int machine_at_vpc2007_init(const machine_t *); +extern int machine_at_vpc2007_init(const machine_t *); /* m_at_t3100e.c */ -extern int machine_at_t3100e_init(const machine_t *); +extern int machine_at_t3100e_init(const machine_t *); /* m_europc.c */ -extern int machine_europc_init(const machine_t *); +extern int machine_europc_init(const machine_t *); #ifdef EMU_DEVICE_H extern const device_t europc_device; #endif /* m_xt_olivetti.c */ -extern int machine_xt_m24_init(const machine_t *); -extern int machine_xt_m240_init(const machine_t *); -extern int machine_xt_m19_init(const machine_t *); +extern int machine_xt_m24_init(const machine_t *); +extern int machine_xt_m240_init(const machine_t *); +extern int machine_xt_m19_init(const machine_t *); /* m_pcjr.c */ -extern int machine_pcjr_init(const machine_t *); +extern int machine_pcjr_init(const machine_t *); /* m_ps1.c */ -extern int machine_ps1_m2011_init(const machine_t *); -extern int machine_ps1_m2121_init(const machine_t *); +extern int machine_ps1_m2011_init(const machine_t *); +extern int machine_ps1_m2121_init(const machine_t *); /* m_ps1_hdc.c */ #ifdef EMU_DEVICE_H -extern void ps1_hdc_inform(void *, uint8_t *); +extern void ps1_hdc_inform(void *, uint8_t *); extern const device_t ps1_hdc_device; #endif /* m_ps2_isa.c */ -extern int machine_ps2_m30_286_init(const machine_t *); +extern int machine_ps2_m30_286_init(const machine_t *); /* m_ps2_mca.c */ -extern int machine_ps2_model_50_init(const machine_t *); -extern int machine_ps2_model_60_init(const machine_t *); -extern int machine_ps2_model_55sx_init(const machine_t *); -extern int machine_ps2_model_65sx_init(const machine_t *); -extern int machine_ps2_model_70_type3_init(const machine_t *); -extern int machine_ps2_model_80_init(const machine_t *); -extern int machine_ps2_model_80_axx_init(const machine_t *); +extern int machine_ps2_model_50_init(const machine_t *); +extern int machine_ps2_model_60_init(const machine_t *); +extern int machine_ps2_model_55sx_init(const machine_t *); +extern int machine_ps2_model_65sx_init(const machine_t *); +extern int machine_ps2_model_70_type3_init(const machine_t *); +extern int machine_ps2_model_80_init(const machine_t *); +extern int machine_ps2_model_80_axx_init(const machine_t *); /* m_tandy.c */ -extern int tandy1k_eeprom_read(void); -extern int machine_tandy_init(const machine_t *); -extern int machine_tandy1000hx_init(const machine_t *); -extern int machine_tandy1000sl2_init(const machine_t *); +extern int tandy1k_eeprom_read(void); +extern int machine_tandy_init(const machine_t *); +extern int machine_tandy1000hx_init(const machine_t *); +extern int machine_tandy1000sl2_init(const machine_t *); /* m_v86p.c */ -extern int machine_v86p_init(const machine_t *); +extern int machine_v86p_init(const machine_t *); /* m_xt.c */ -extern int machine_pc_init(const machine_t *); -extern int machine_pc82_init(const machine_t *); +extern int machine_pc_init(const machine_t *); +extern int machine_pc82_init(const machine_t *); -extern int machine_xt_init(const machine_t *); -extern int machine_genxt_init(const machine_t *); +extern int machine_xt_init(const machine_t *); +extern int machine_genxt_init(const machine_t *); -extern int machine_xt86_init(const machine_t *); +extern int machine_xt86_init(const machine_t *); -extern int machine_xt_americxt_init(const machine_t *); -extern int machine_xt_amixt_init(const machine_t *); -extern int machine_xt_dtk_init(const machine_t *); -extern int machine_xt_jukopc_init(const machine_t *); -extern int machine_xt_openxt_init(const machine_t *); -extern int machine_xt_pcxt_init(const machine_t *); -extern int machine_xt_pxxt_init(const machine_t *); -extern int machine_xt_pc4i_init(const machine_t *); -extern int machine_xt_mpc1600_init(const machine_t *); -extern int machine_xt_pcspirit_init(const machine_t *); -extern int machine_xt_pc700_init(const machine_t *); -extern int machine_xt_pc500_init(const machine_t *); -extern int machine_xt_vendex_init(const machine_t *); -extern int machine_xt_znic_init(const machine_t *); -extern int machine_xt_super16t_init(const machine_t *); -extern int machine_xt_super16te_init(const machine_t *); -extern int machine_xt_top88_init(const machine_t *); -extern int machine_xt_kaypropc_init(const machine_t *); -extern int machine_xt_sansx16_init(const machine_t *); -extern int machine_xt_bw230_init(const machine_t *); +extern int machine_xt_americxt_init(const machine_t *); +extern int machine_xt_amixt_init(const machine_t *); +extern int machine_xt_dtk_init(const machine_t *); +extern int machine_xt_jukopc_init(const machine_t *); +extern int machine_xt_openxt_init(const machine_t *); +extern int machine_xt_pcxt_init(const machine_t *); +extern int machine_xt_pxxt_init(const machine_t *); +extern int machine_xt_pc4i_init(const machine_t *); +extern int machine_xt_mpc1600_init(const machine_t *); +extern int machine_xt_pcspirit_init(const machine_t *); +extern int machine_xt_pc700_init(const machine_t *); +extern int machine_xt_pc500_init(const machine_t *); +extern int machine_xt_vendex_init(const machine_t *); +extern int machine_xt_znic_init(const machine_t *); +extern int machine_xt_super16t_init(const machine_t *); +extern int machine_xt_super16te_init(const machine_t *); +extern int machine_xt_top88_init(const machine_t *); +extern int machine_xt_kaypropc_init(const machine_t *); +extern int machine_xt_sansx16_init(const machine_t *); +extern int machine_xt_bw230_init(const machine_t *); -extern int machine_xt_iskra3104_init(const machine_t *); +extern int machine_xt_iskra3104_init(const machine_t *); /* m_xt_compaq.c */ -extern int machine_xt_compaq_deskpro_init(const machine_t *); -extern int machine_xt_compaq_portable_init(const machine_t *); +extern int machine_xt_compaq_deskpro_init(const machine_t *); +extern int machine_xt_compaq_portable_init(const machine_t *); /* m_xt_laserxt.c */ #if defined(DEV_BRANCH) && defined(USE_LASERXT) -extern int machine_xt_laserxt_init(const machine_t *); -extern int machine_xt_lxt3_init(const machine_t *); +extern int machine_xt_laserxt_init(const machine_t *); +extern int machine_xt_lxt3_init(const machine_t *); #endif /* m_xt_philips.c */ -extern int machine_xt_p3105_init(const machine_t *); -extern int machine_xt_p3120_init(const machine_t *); +extern int machine_xt_p3105_init(const machine_t *); +extern int machine_xt_p3120_init(const machine_t *); /* m_xt_t1000.c */ -extern int machine_xt_t1000_init(const machine_t *); -extern int machine_xt_t1200_init(const machine_t *); - +extern int machine_xt_t1000_init(const machine_t *); +extern int machine_xt_t1200_init(const machine_t *); /* m_xt_zenith.c */ -extern int machine_xt_z184_init(const machine_t *); -extern int machine_xt_z151_init(const machine_t *); -extern int machine_xt_z159_init(const machine_t *); +extern int machine_xt_z184_init(const machine_t *); +extern int machine_xt_z151_init(const machine_t *); +extern int machine_xt_z159_init(const machine_t *); /* m_xt_xi8088.c */ -extern int machine_xt_xi8088_init(const machine_t *); +extern int machine_xt_xi8088_init(const machine_t *); -#endif /*EMU_MACHINE_H*/ +#endif /*EMU_MACHINE_H*/ diff --git a/src/include/86box/mouse.h b/src/include/86box/mouse.h index a5519139a..434360589 100644 --- a/src/include/86box/mouse.h +++ b/src/include/86box/mouse.h @@ -18,75 +18,71 @@ */ #ifndef EMU_MOUSE_H -# define EMU_MOUSE_H +#define EMU_MOUSE_H -#define MOUSE_TYPE_NONE 0 /* no mouse configured */ -#define MOUSE_TYPE_INTERNAL 1 /* machine has internal mouse */ -#define MOUSE_TYPE_LOGIBUS 2 /* Logitech/ATI Bus Mouse */ -#define MOUSE_TYPE_INPORT 3 /* Microsoft InPort Mouse */ +#define MOUSE_TYPE_NONE 0 /* no mouse configured */ +#define MOUSE_TYPE_INTERNAL 1 /* machine has internal mouse */ +#define MOUSE_TYPE_LOGIBUS 2 /* Logitech/ATI Bus Mouse */ +#define MOUSE_TYPE_INPORT 3 /* Microsoft InPort Mouse */ #if 0 -# define MOUSE_TYPE_GENIBUS 4 /* Genius Bus Mouse */ +# define MOUSE_TYPE_GENIBUS 4 /* Genius Bus Mouse */ #endif -#define MOUSE_TYPE_MSYSTEMS 5 /* Mouse Systems mouse */ -#define MOUSE_TYPE_MICROSOFT 6 /* Microsoft 2-button Serial Mouse */ -#define MOUSE_TYPE_MS3BUTTON 7 /* Microsoft 3-button Serial Mouse */ -#define MOUSE_TYPE_MSWHEEL 8 /* Microsoft Serial Wheel Mouse */ -#define MOUSE_TYPE_LOGITECH 9 /* Logitech 2-button Serial Mouse */ -#define MOUSE_TYPE_LT3BUTTON 10 /* Logitech 3-button Serial Mouse */ -#define MOUSE_TYPE_PS2 11 /* PS/2 series Bus Mouse */ - -#define MOUSE_TYPE_ONBOARD 0x80 /* Mouse is an on-board version of one of the above. */ +#define MOUSE_TYPE_MSYSTEMS 5 /* Mouse Systems mouse */ +#define MOUSE_TYPE_MICROSOFT 6 /* Microsoft 2-button Serial Mouse */ +#define MOUSE_TYPE_MS3BUTTON 7 /* Microsoft 3-button Serial Mouse */ +#define MOUSE_TYPE_MSWHEEL 8 /* Microsoft Serial Wheel Mouse */ +#define MOUSE_TYPE_LOGITECH 9 /* Logitech 2-button Serial Mouse */ +#define MOUSE_TYPE_LT3BUTTON 10 /* Logitech 3-button Serial Mouse */ +#define MOUSE_TYPE_PS2 11 /* PS/2 series Bus Mouse */ +#define MOUSE_TYPE_ONBOARD 0x80 /* Mouse is an on-board version of one of the above. */ #ifdef __cplusplus extern "C" { #endif -extern int mouse_type; -extern int mouse_x, mouse_y, mouse_z; -extern int mouse_buttons; - +extern int mouse_type; +extern int mouse_x, mouse_y, mouse_z; +extern int mouse_buttons; #ifdef EMU_DEVICE_H -extern const device_t *mouse_get_device(int mouse); -extern void *mouse_ps2_init(const device_t *); +extern const device_t *mouse_get_device(int mouse); +extern void *mouse_ps2_init(const device_t *); -extern const device_t mouse_logibus_device; -extern const device_t mouse_logibus_onboard_device; -extern const device_t mouse_msinport_device; -#if 0 +extern const device_t mouse_logibus_device; +extern const device_t mouse_logibus_onboard_device; +extern const device_t mouse_msinport_device; +# if 0 extern const device_t mouse_genibus_device; -#endif -extern const device_t mouse_mssystems_device; -extern const device_t mouse_msserial_device; -extern const device_t mouse_ltserial_device; -extern const device_t mouse_ps2_device; +# endif +extern const device_t mouse_mssystems_device; +extern const device_t mouse_msserial_device; +extern const device_t mouse_ltserial_device; +extern const device_t mouse_ps2_device; #endif -extern void mouse_init(void); -extern void mouse_close(void); -extern void mouse_reset(void); -extern void mouse_set_buttons(int buttons); -extern void mouse_process(void); -extern void mouse_set_poll(int (*f)(int,int,int,int,void *), void *); -extern void mouse_poll(void); +extern void mouse_init(void); +extern void mouse_close(void); +extern void mouse_reset(void); +extern void mouse_set_buttons(int buttons); +extern void mouse_process(void); +extern void mouse_set_poll(int (*f)(int, int, int, int, void *), void *); +extern void mouse_poll(void); -extern void mouse_bus_set_irq(void *priv, int irq); +extern void mouse_bus_set_irq(void *priv, int irq); +extern char *mouse_get_name(int mouse); +extern char *mouse_get_internal_name(int mouse); +extern int mouse_get_from_internal_name(char *s); +extern int mouse_has_config(int mouse); +extern int mouse_get_type(int mouse); +extern int mouse_get_ndev(void); +extern int mouse_get_buttons(void); -extern char *mouse_get_name(int mouse); -extern char *mouse_get_internal_name(int mouse); -extern int mouse_get_from_internal_name(char *s); -extern int mouse_has_config(int mouse); -extern int mouse_get_type(int mouse); -extern int mouse_get_ndev(void); -extern int mouse_get_buttons(void); - -extern void mouse_clear_data(void *priv); +extern void mouse_clear_data(void *priv); #ifdef __cplusplus } #endif - -#endif /*EMU_MOUSE_H*/ +#endif /*EMU_MOUSE_H*/ diff --git a/src/include/86box/serial.h b/src/include/86box/serial.h index 3378a91b5..be1ab957e 100644 --- a/src/include/86box/serial.h +++ b/src/include/86box/serial.h @@ -21,84 +21,80 @@ */ #ifndef EMU_SERIAL_H -# define EMU_SERIAL_H +#define EMU_SERIAL_H -#define SERIAL_8250 0 -#define SERIAL_8250_PCJR 1 -#define SERIAL_16450 2 -#define SERIAL_16550 3 -#define SERIAL_16650 4 -#define SERIAL_16750 5 -#define SERIAL_16850 6 -#define SERIAL_16950 7 +#define SERIAL_8250 0 +#define SERIAL_8250_PCJR 1 +#define SERIAL_16450 2 +#define SERIAL_16550 3 +#define SERIAL_16650 4 +#define SERIAL_16750 5 +#define SERIAL_16850 6 +#define SERIAL_16950 7 -#define SERIAL_FIFO_SIZE 16 +#define SERIAL_FIFO_SIZE 16 /* Default settings for the standard ports. */ -#define COM1_ADDR 0x03f8 -#define COM1_IRQ 4 -#define COM2_ADDR 0x02f8 -#define COM2_IRQ 3 -#define COM3_ADDR 0x03e8 -#define COM3_IRQ 4 -#define COM4_ADDR 0x02e8 -#define COM4_IRQ 3 - +#define COM1_ADDR 0x03f8 +#define COM1_IRQ 4 +#define COM2_ADDR 0x02f8 +#define COM2_IRQ 3 +#define COM3_ADDR 0x03e8 +#define COM3_IRQ 4 +#define COM4_ADDR 0x02e8 +#define COM4_IRQ 3 struct serial_device_s; struct serial_s; -typedef struct serial_s -{ +typedef struct serial_s { uint8_t lsr, thr, mctrl, rcr, - iir, ier, lcr, msr, - dat, int_status, scratch, fcr, - irq, type, inst, transmit_enabled, - fifo_enabled, rcvr_fifo_len, bits, data_bits, - baud_cycles, rcvr_fifo_full, txsr, pad; + iir, ier, lcr, msr, + dat, int_status, scratch, fcr, + irq, type, inst, transmit_enabled, + fifo_enabled, rcvr_fifo_len, bits, data_bits, + baud_cycles, rcvr_fifo_full, txsr, pad; uint16_t dlab, base_address; uint8_t rcvr_fifo_pos, xmit_fifo_pos, - pad0, pad1, - rcvr_fifo[SERIAL_FIFO_SIZE], xmit_fifo[SERIAL_FIFO_SIZE]; + pad0, pad1, + rcvr_fifo[SERIAL_FIFO_SIZE], xmit_fifo[SERIAL_FIFO_SIZE]; pc_timer_t transmit_timer, timeout_timer; - double clock_src, transmit_period; + double clock_src, transmit_period; - struct serial_device_s *sd; + struct serial_device_s *sd; } serial_t; -typedef struct serial_device_s -{ +typedef struct serial_device_s { void (*rcr_callback)(struct serial_s *serial, void *p); void (*dev_write)(struct serial_s *serial, void *p, uint8_t data); - void *priv; + void *priv; serial_t *serial; } serial_device_t; +extern serial_t *serial_attach(int port, + void (*rcr_callback)(struct serial_s *serial, void *p), + void (*dev_write)(struct serial_s *serial, void *p, uint8_t data), + void *priv); +extern void serial_remove(serial_t *dev); +extern void serial_set_type(serial_t *dev, int type); +extern void serial_setup(serial_t *dev, uint16_t addr, uint8_t irq); +extern void serial_clear_fifo(serial_t *dev); +extern void serial_write_fifo(serial_t *dev, uint8_t dat); +extern void serial_set_next_inst(int ni); +extern void serial_standalone_init(void); +extern void serial_set_clock_src(serial_t *dev, double clock_src); +extern void serial_reset_port(serial_t *dev); -extern serial_t * serial_attach(int port, - void (*rcr_callback)(struct serial_s *serial, void *p), - void (*dev_write)(struct serial_s *serial, void *p, uint8_t data), - void *priv); -extern void serial_remove(serial_t *dev); -extern void serial_set_type(serial_t *dev, int type); -extern void serial_setup(serial_t *dev, uint16_t addr, uint8_t irq); -extern void serial_clear_fifo(serial_t *dev); -extern void serial_write_fifo(serial_t *dev, uint8_t dat); -extern void serial_set_next_inst(int ni); -extern void serial_standalone_init(void); -extern void serial_set_clock_src(serial_t *dev, double clock_src); -extern void serial_reset_port(serial_t *dev); +extern const device_t ns8250_device; +extern const device_t ns8250_pcjr_device; +extern const device_t ns16450_device; +extern const device_t ns16550_device; +extern const device_t ns16650_device; +extern const device_t ns16750_device; +extern const device_t ns16850_device; +extern const device_t ns16950_device; -extern const device_t ns8250_device; -extern const device_t ns8250_pcjr_device; -extern const device_t ns16450_device; -extern const device_t ns16550_device; -extern const device_t ns16650_device; -extern const device_t ns16750_device; -extern const device_t ns16850_device; -extern const device_t ns16950_device; - -#endif /*EMU_SERIAL_H*/ +#endif /*EMU_SERIAL_H*/ diff --git a/src/include/86box/snd_opl.h b/src/include/86box/snd_opl.h index a2e8dd521..38a411ada 100644 --- a/src/include/86box/snd_opl.h +++ b/src/include/86box/snd_opl.h @@ -31,12 +31,12 @@ enum fm_driver { }; typedef struct { - uint8_t (*read)(uint16_t port, void *priv); - void (*write)(uint16_t port, uint8_t val, void *priv); - int32_t * (*update)(void *priv); + uint8_t (*read)(uint16_t port, void *priv); + void (*write)(uint16_t port, uint8_t val, void *priv); + int32_t *(*update)(void *priv); void (*reset_buffer)(void *priv); - void (*set_do_cycles)(void *priv, int8_t do_cycles); - void *priv; + void (*set_do_cycles)(void *priv, int8_t do_cycles); + void *priv; } fm_drv_t; extern uint8_t fm_driver_get(int chip_id, fm_drv_t *drv); diff --git a/src/include/86box/snd_opl_nuked.h b/src/include/86box/snd_opl_nuked.h index 93ea4ba35..635863407 100644 --- a/src/include/86box/snd_opl_nuked.h +++ b/src/include/86box/snd_opl_nuked.h @@ -20,5 +20,4 @@ #ifndef SOUND_OPL_NUKED_H #define SOUND_OPL_NUKED_H - #endif /*SOUND_OPL_NUKED_H*/ diff --git a/src/include/86box/snd_sb.h b/src/include/86box/snd_sb.h index bf44d4d6d..782a947f6 100644 --- a/src/include/86box/snd_sb.h +++ b/src/include/86box/snd_sb.h @@ -121,14 +121,14 @@ typedef struct sb_ct1745_mixer_t { uint8_t index; uint8_t regs[256]; - int output_filter; /* for clones */ + int output_filter; /* for clones */ } sb_ct1745_mixer_t; typedef struct sb_t { uint8_t cms_enabled, opl_enabled, mixer_enabled; - cms_t cms; + cms_t cms; fm_drv_t opl, opl2; sb_dsp_t dsp; @@ -153,9 +153,9 @@ extern void sb_ct1345_mixer_write(uint16_t addr, uint8_t val, void *p); extern uint8_t sb_ct1345_mixer_read(uint16_t addr, void *p); extern void sb_ct1345_mixer_reset(sb_t *sb); -extern void sb_ct1745_mixer_write(uint16_t addr, uint8_t val, void *p); +extern void sb_ct1745_mixer_write(uint16_t addr, uint8_t val, void *p); extern uint8_t sb_ct1745_mixer_read(uint16_t addr, void *p); -extern void sb_ct1745_mixer_reset(sb_t* sb); +extern void sb_ct1745_mixer_reset(sb_t *sb); extern void sb_get_buffer_sbpro(int32_t *buffer, int len, void *p); extern void sbpro_filter_cd_audio(int channel, double *buffer, void *p); diff --git a/src/include/86box/snd_sb_dsp.h b/src/include/86box/snd_sb_dsp.h index 2f3607176..1e9a91828 100644 --- a/src/include/86box/snd_sb_dsp.h +++ b/src/include/86box/snd_sb_dsp.h @@ -42,7 +42,7 @@ typedef struct sb_dsp_t { int sb_irqnum; void (*irq_update)(void *priv, int set), - *irq_priv; + *irq_priv; uint8_t sbe2; int sbe2count; diff --git a/src/include/86box/vid_8514a.h b/src/include/86box/vid_8514a.h index a9816ac4a..be6c5d177 100644 --- a/src/include/86box/vid_8514a.h +++ b/src/include/86box/vid_8514a.h @@ -17,10 +17,9 @@ */ #ifndef VIDEO_8514A_H -# define VIDEO_8514A_H +#define VIDEO_8514A_H -typedef struct ibm8514_t -{ +typedef struct ibm8514_t { uint8_t pos_regs[8]; int force_old_addr; @@ -29,21 +28,21 @@ typedef struct ibm8514_t uint32_t vram_size; uint32_t vram_mask; - PALETTE vgapal; - uint8_t dac_mask, dac_status; + PALETTE vgapal; + uint8_t dac_mask, dac_status; uint32_t *map8; - int dac_addr, dac_pos, dac_r, dac_g; + int dac_addr, dac_pos, dac_r, dac_g; struct { uint16_t subsys_cntl; uint16_t setup_md; - uint8_t advfunc_cntl, ext_advfunc_cntl; + uint8_t advfunc_cntl, ext_advfunc_cntl; uint16_t cur_y, cur_y_bitres; uint16_t cur_x, cur_x_bitres; - int16_t desty_axstp; - int16_t destx_distp; - int16_t err_term; - int16_t maj_axis_pcnt; + int16_t desty_axstp; + int16_t destx_distp; + int16_t err_term; + int16_t maj_axis_pcnt; uint16_t cmd, cmd_back; uint16_t short_stroke; uint16_t bkgd_color; @@ -55,58 +54,58 @@ typedef struct ibm8514_t uint16_t frgd_mix; uint16_t multifunc_cntl; uint16_t multifunc[16]; - int16_t clip_left, clip_top; - uint8_t pix_trans[2]; - int poly_draw; - int ssv_state; - int x1, x2, y1, y2; - int sys_cnt, sys_cnt2; - int temp_cnt; - int16_t cx, cy, oldcy; - int16_t sx, sy; - int16_t dx, dy; - int16_t err; + int16_t clip_left, clip_top; + uint8_t pix_trans[2]; + int poly_draw; + int ssv_state; + int x1, x2, y1, y2; + int sys_cnt, sys_cnt2; + int temp_cnt; + int16_t cx, cy, oldcy; + int16_t sx, sy; + int16_t dx, dy; + int16_t err; uint32_t src, dest; uint32_t newsrc_blt, newdest_blt; uint32_t newdest_in, newdest_out; uint8_t *writemono, *nibbleset; - int x_count, xx_count, y_count; - int input, output; + int x_count, xx_count, y_count; + int input, output; uint16_t cur_x_bit12, cur_y_bit12; - int ssv_len; - uint8_t ssv_dir; - uint8_t ssv_draw; - int odd_in, odd_out; + int ssv_len; + uint8_t ssv_dir; + uint8_t ssv_draw; + int odd_in, odd_out; uint16_t scratch; - int fill_state, xdir, ydir; + int fill_state, xdir, ydir; } accel; uint16_t test; int v_total, dispend, v_syncstart, split, - h_disp, h_disp_old, h_total, h_disp_time, rowoffset, - dispon, hdisp_on, linecountff, - vc, linepos, oddeven, cursoron, blink, scrollcache, - firstline, lastline, firstline_draw, lastline_draw, - displine, fullchange, x_add, y_add; - uint32_t ma, maback; + h_disp, h_disp_old, h_total, h_disp_time, rowoffset, + dispon, hdisp_on, linecountff, + vc, linepos, oddeven, cursoron, blink, scrollcache, + firstline, lastline, firstline_draw, lastline_draw, + displine, fullchange, x_add, y_add; + uint32_t ma, maback; uint8_t *vram, *changedvram, linedbl; uint8_t data_available, data_available2; uint8_t scanmodulos, rowcount; - int htotal, hdisp, vtadj, vdadj, vsadj, sc, + int htotal, hdisp, vtadj, vdadj, vsadj, sc, vtb, vdb, vsb, vsyncstart, vsyncwidth; - int vtotal, vdisp; - int disp_cntl, interlace; + int vtotal, vdisp; + int disp_cntl, interlace; uint8_t subsys_cntl, subsys_stat; volatile int force_busy, force_busy2; - int blitter_busy; + int blitter_busy; uint64_t blitter_time; uint64_t status_time; } ibm8514_t; -#endif /*VIDEO_8514A_H*/ +#endif /*VIDEO_8514A_H*/ diff --git a/src/include/86box/vid_ati_eeprom.h b/src/include/86box/vid_ati_eeprom.h index bb2114739..1fa083eaa 100644 --- a/src/include/86box/vid_ati_eeprom.h +++ b/src/include/86box/vid_ati_eeprom.h @@ -1,54 +1,49 @@ #ifndef VIDEO_ATI_EEPROM_H -# define VIDEO_ATI_EEPROM_H +#define VIDEO_ATI_EEPROM_H /* Copyright holders: Sarah Walker see COPYING for more details */ -enum -{ - EEPROM_IDLE, - EEPROM_WAIT, - EEPROM_OPCODE, - EEPROM_INPUT, - EEPROM_OUTPUT +enum { + EEPROM_IDLE, + EEPROM_WAIT, + EEPROM_OPCODE, + EEPROM_INPUT, + EEPROM_OUTPUT }; -enum -{ - EEPROM_OP_EW = 4, - EEPROM_OP_WRITE = 5, - EEPROM_OP_READ = 6, - EEPROM_OP_ERASE = 7, +enum { + EEPROM_OP_EW = 4, + EEPROM_OP_WRITE = 5, + EEPROM_OP_READ = 6, + EEPROM_OP_ERASE = 7, - EEPROM_OP_WRALMAIN = -1 + EEPROM_OP_WRALMAIN = -1 }; -enum -{ - EEPROM_OP_EWDS = 0, - EEPROM_OP_WRAL = 1, - EEPROM_OP_ERAL = 2, - EEPROM_OP_EWEN = 3 +enum { + EEPROM_OP_EWDS = 0, + EEPROM_OP_WRAL = 1, + EEPROM_OP_ERAL = 2, + EEPROM_OP_EWEN = 3 }; +typedef struct ati_eeprom_t { + uint16_t data[256]; -typedef struct ati_eeprom_t -{ - uint16_t data[256]; + int oldclk, oldena; + int opcode, state, count, out; + int wp; + uint32_t dat; + int type; + int address; - int oldclk, oldena; - int opcode, state, count, out; - int wp; - uint32_t dat; - int type; - int address; - - char fn[256]; + char fn[256]; } ati_eeprom_t; void ati_eeprom_load(ati_eeprom_t *eeprom, char *fn, int type); void ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat); -int ati_eeprom_read(ati_eeprom_t *eeprom); +int ati_eeprom_read(ati_eeprom_t *eeprom); #endif /*VIDEO_ATI_EEPROM_H*/ diff --git a/src/include/86box/vid_cga.h b/src/include/86box/vid_cga.h index d36872e18..7f880fc1c 100644 --- a/src/include/86box/vid_cga.h +++ b/src/include/86box/vid_cga.h @@ -17,45 +17,44 @@ */ #ifndef VIDEO_CGA_H -# define VIDEO_CGA_H +#define VIDEO_CGA_H -typedef struct cga_t -{ - mem_mapping_t mapping; +typedef struct cga_t { + mem_mapping_t mapping; - int crtcreg; - uint8_t crtc[32]; + int crtcreg; + uint8_t crtc[32]; - uint8_t cgastat; + uint8_t cgastat; - uint8_t cgamode, cgacol; + uint8_t cgamode, cgacol; - int fontbase; - int linepos, displine; - int sc, vc; - int cgadispon; - int con, coff, cursoron, cgablink; - int vsynctime, vadj; - uint16_t ma, maback; - int oddeven; + int fontbase; + int linepos, displine; + int sc, vc; + int cgadispon; + int con, coff, cursoron, cgablink; + int vsynctime, vadj; + uint16_t ma, maback; + int oddeven; - uint64_t dispontime, dispofftime; - pc_timer_t timer; + uint64_t dispontime, dispofftime; + pc_timer_t timer; - int firstline, lastline; + int firstline, lastline; - int drawcursor; + int drawcursor; - int fullchange; + int fullchange; - uint8_t *vram; + uint8_t *vram; - uint8_t charbuffer[256]; + uint8_t charbuffer[256]; - int revision; - int composite; - int snow_enabled; - int rgb_type; + int revision; + int composite; + int snow_enabled; + int rgb_type; } cga_t; void cga_init(cga_t *cga); @@ -68,7 +67,7 @@ void cga_poll(void *p); #ifdef EMU_DEVICE_H extern const device_config_t cga_config[]; -extern const device_t cga_device; +extern const device_t cga_device; #endif -#endif /*VIDEO_CGA_H*/ +#endif /*VIDEO_CGA_H*/ diff --git a/src/include/86box/vid_cga_comp.h b/src/include/86box/vid_cga_comp.h index b221e96a4..bbde070c1 100644 --- a/src/include/86box/vid_cga_comp.h +++ b/src/include/86box/vid_cga_comp.h @@ -18,15 +18,15 @@ */ #ifndef VIDEO_CGA_COMP_H -# define VIDEO_CGA_COMP_H +#define VIDEO_CGA_COMP_H -#define Bit8u uint8_t +#define Bit8u uint8_t #define Bit32u uint32_t -#define Bitu unsigned int +#define Bitu unsigned int #define bool uint8_t -void update_cga16_color(uint8_t cgamode); -void cga_comp_init(int revision); -Bit32u * Composite_Process(uint8_t cgamode, Bit8u border, Bit32u blocks/*, bool doublewidth*/, Bit32u *TempLine); +void update_cga16_color(uint8_t cgamode); +void cga_comp_init(int revision); +Bit32u *Composite_Process(uint8_t cgamode, Bit8u border, Bit32u blocks /*, bool doublewidth*/, Bit32u *TempLine); -#endif /*VIDEO_CGA_COMP_H*/ +#endif /*VIDEO_CGA_COMP_H*/ diff --git a/src/include/86box/vid_colorplus.h b/src/include/86box/vid_colorplus.h index 8466a3e43..51b735ec7 100644 --- a/src/include/86box/vid_colorplus.h +++ b/src/include/86box/vid_colorplus.h @@ -1,10 +1,9 @@ #ifndef VIDEO_COLORPLUS_H -# define VIDEO_COLORPLUS_H +#define VIDEO_COLORPLUS_H -typedef struct colorplus_t -{ - cga_t cga; - uint8_t control; +typedef struct colorplus_t { + cga_t cga; + uint8_t control; } colorplus_t; void colorplus_init(colorplus_t *colorplus); diff --git a/src/include/86box/vid_ddc.h b/src/include/86box/vid_ddc.h index 297ad65bf..b64759bac 100644 --- a/src/include/86box/vid_ddc.h +++ b/src/include/86box/vid_ddc.h @@ -18,9 +18,9 @@ */ #ifndef EMU_VID_DDC_H -# define EMU_VID_DDC_H +#define EMU_VID_DDC_H -extern void *ddc_init(void *i2c); -extern void ddc_close(void *eeprom); +extern void *ddc_init(void *i2c); +extern void ddc_close(void *eeprom); -#endif /*EMU_VID_DDC_H*/ +#endif /*EMU_VID_DDC_H*/ diff --git a/src/include/86box/vid_ega.h b/src/include/86box/vid_ega.h index f1ba7e417..3b4797bf8 100644 --- a/src/include/86box/vid_ega.h +++ b/src/include/86box/vid_ega.h @@ -19,8 +19,7 @@ */ #ifndef VIDEO_EGA_H -# define VIDEO_EGA_H - +#define VIDEO_EGA_H #if defined(EMU_MEM_H) && defined(EMU_ROM_H) typedef struct ega_t { @@ -29,10 +28,10 @@ typedef struct ega_t { rom_t bios_rom; uint8_t crtcreg, gdcaddr, attraddr, attrff, - attr_palette_enable, seqaddr, miscout, - writemask, la, lb, lc, ld, - stat, colourcompare, colournocare, scrblank, - plane_mask, pad, pad0, pad1; + attr_palette_enable, seqaddr, miscout, + writemask, la, lb, lc, ld, + stat, colourcompare, colournocare, scrblank, + plane_mask, pad, pad0, pad1; uint8_t crtc[32]; uint8_t gdcreg[16]; uint8_t attrregs[32]; @@ -43,30 +42,30 @@ typedef struct ega_t { uint8_t *vram; int vidclock, fast, extvram, vres, - readmode, writemode, readplane, vrammask, - chain4, chain2_read, chain2_write, con, - oddeven_page, oddeven_chain, vc, sc, - dispon, hdisp_on, cursoron, blink, fullchange, - linepos, vslines, linecountff, oddeven, - lowres, interlace, linedbl, lindebl, rowcount, - vtotal, dispend, vsyncstart, split, - hdisp, hdisp_old, htotal, hdisp_time, rowoffset, - vblankstart, scrollcache, firstline, lastline, - firstline_draw, lastline_draw, x_add, y_add, - displine, res_x, res_y, bpp, index; + readmode, writemode, readplane, vrammask, + chain4, chain2_read, chain2_write, con, + oddeven_page, oddeven_chain, vc, sc, + dispon, hdisp_on, cursoron, blink, fullchange, + linepos, vslines, linecountff, oddeven, + lowres, interlace, linedbl, lindebl, rowcount, + vtotal, dispend, vsyncstart, split, + hdisp, hdisp_old, htotal, hdisp_time, rowoffset, + vblankstart, scrollcache, firstline, lastline, + firstline_draw, lastline_draw, x_add, y_add, + displine, res_x, res_y, bpp, index; uint32_t charseta, charsetb, ma_latch, ma, - maback, ca, vram_limit, overscan_color; + maback, ca, vram_limit, overscan_color; uint32_t *pallook; - uint64_t dispontime, dispofftime; - pc_timer_t timer; + uint64_t dispontime, dispofftime; + pc_timer_t timer; double clock; - int remap_required; - uint32_t (*remap_func)(struct ega_t *ega, uint32_t in_addr); + int remap_required; + uint32_t (*remap_func)(struct ega_t *ega, uint32_t in_addr); void (*render)(struct ega_t *svga); @@ -74,7 +73,6 @@ typedef struct ega_t { } ega_t; #endif - #ifdef EMU_DEVICE_H extern const device_t ega_device; extern const device_t cpqega_device; @@ -86,33 +84,31 @@ extern const device_t et2000_device; extern int update_overscan; -#define DISPLAY_RGB 0 -#define DISPLAY_COMPOSITE 1 +#define DISPLAY_RGB 0 +#define DISPLAY_COMPOSITE 1 #define DISPLAY_RGB_NO_BROWN 2 -#define DISPLAY_GREEN 3 -#define DISPLAY_AMBER 4 -#define DISPLAY_WHITE 5 - +#define DISPLAY_GREEN 3 +#define DISPLAY_AMBER 4 +#define DISPLAY_WHITE 5 #if defined(EMU_MEM_H) && defined(EMU_ROM_H) -extern void ega_init(ega_t *ega, int monitor_type, int is_mono); -extern void ega_recalctimings(struct ega_t *ega); +extern void ega_init(ega_t *ega, int monitor_type, int is_mono); +extern void ega_recalctimings(struct ega_t *ega); extern void ega_recalc_remap_func(struct ega_t *ega); #endif -extern void ega_out(uint16_t addr, uint8_t val, void *p); -extern uint8_t ega_in(uint16_t addr, void *p); -extern void ega_poll(void *p); -extern void ega_write(uint32_t addr, uint8_t val, void *p); -extern uint8_t ega_read(uint32_t addr, void *p); - +extern void ega_out(uint16_t addr, uint8_t val, void *p); +extern uint8_t ega_in(uint16_t addr, void *p); +extern void ega_poll(void *p); +extern void ega_write(uint32_t addr, uint8_t val, void *p); +extern uint8_t ega_read(uint32_t addr, void *p); extern int firstline_draw, lastline_draw; extern int displine; extern int sc; extern uint32_t ma, ca; -extern int con, cursoron, cgablink; +extern int con, cursoron, cgablink; extern int scrollcache; @@ -134,4 +130,4 @@ void ega_render_4bpp_lowres(ega_t *ega); void ega_render_4bpp_highres(ega_t *ega); #endif -#endif /*VIDEO_EGA_H*/ +#endif /*VIDEO_EGA_H*/ diff --git a/src/include/86box/vid_ega_render_remap.h b/src/include/86box/vid_ega_render_remap.h index cae9a2b1d..a33b27ed4 100644 --- a/src/include/86box/vid_ega_render_remap.h +++ b/src/include/86box/vid_ega_render_remap.h @@ -1,5 +1,5 @@ #ifndef VIDEO_EGA_RENDER_REMAP_H -# define VIDEO_EGA_RENDER_REMAP_H +#define VIDEO_EGA_RENDER_REMAP_H #define VAR_BYTE_MODE (0 << 0) #define VAR_WORD_MODE_MA13 (1 << 0) @@ -9,44 +9,35 @@ #define VAR_ROW0_MA13 (1 << 2) #define VAR_ROW1_MA14 (1 << 3) -#define ADDRESS_REMAP_FUNC(nr) \ - static uint32_t address_remap_func_ ## nr(ega_t *ega, uint32_t in_addr) \ - { \ - uint32_t out_addr; \ - \ - switch (nr & VAR_MODE_MASK) \ - { \ - case VAR_BYTE_MODE: \ - out_addr = in_addr; \ - break; \ - \ - case VAR_WORD_MODE_MA13: \ - out_addr = ((in_addr << 1) & 0x1fff8) | \ - ((in_addr >> 13) & 0x4) | \ - (in_addr & ~0x1ffff); \ - break; \ - \ - case VAR_WORD_MODE_MA15: \ - out_addr = ((in_addr << 1) & 0x1fff8) | \ - ((in_addr >> 15) & 0x4) | \ - (in_addr & ~0x1ffff); \ - break; \ - \ - case VAR_DWORD_MODE: \ - out_addr = ((in_addr << 2) & 0x3fff0) | \ - ((in_addr >> 14) & 0xc) | \ - (in_addr & ~0x3ffff); \ - break; \ - } \ - \ - if (nr & VAR_ROW0_MA13) \ - out_addr = (out_addr & ~0x8000) | \ - ((ega->sc & 1) ? 0x8000 : 0); \ - if (nr & VAR_ROW1_MA14) \ - out_addr = (out_addr & ~0x10000) | \ - ((ega->sc & 2) ? 0x10000 : 0); \ - \ - return out_addr; \ +#define ADDRESS_REMAP_FUNC(nr) \ + static uint32_t address_remap_func_##nr(ega_t *ega, uint32_t in_addr) \ + { \ + uint32_t out_addr; \ + \ + switch (nr & VAR_MODE_MASK) { \ + case VAR_BYTE_MODE: \ + out_addr = in_addr; \ + break; \ + \ + case VAR_WORD_MODE_MA13: \ + out_addr = ((in_addr << 1) & 0x1fff8) | ((in_addr >> 13) & 0x4) | (in_addr & ~0x1ffff); \ + break; \ + \ + case VAR_WORD_MODE_MA15: \ + out_addr = ((in_addr << 1) & 0x1fff8) | ((in_addr >> 15) & 0x4) | (in_addr & ~0x1ffff); \ + break; \ + \ + case VAR_DWORD_MODE: \ + out_addr = ((in_addr << 2) & 0x3fff0) | ((in_addr >> 14) & 0xc) | (in_addr & ~0x3ffff); \ + break; \ + } \ + \ + if (nr & VAR_ROW0_MA13) \ + out_addr = (out_addr & ~0x8000) | ((ega->sc & 1) ? 0x8000 : 0); \ + if (nr & VAR_ROW1_MA14) \ + out_addr = (out_addr & ~0x10000) | ((ega->sc & 2) ? 0x10000 : 0); \ + \ + return out_addr; \ } ADDRESS_REMAP_FUNC(0) @@ -66,8 +57,7 @@ ADDRESS_REMAP_FUNC(13) ADDRESS_REMAP_FUNC(14) ADDRESS_REMAP_FUNC(15) -static uint32_t (*address_remap_funcs[16])(ega_t *ega, uint32_t in_addr) = -{ +static uint32_t (*address_remap_funcs[16])(ega_t *ega, uint32_t in_addr) = { address_remap_func_0, address_remap_func_1, address_remap_func_2, @@ -86,7 +76,8 @@ static uint32_t (*address_remap_funcs[16])(ega_t *ega, uint32_t in_addr) = address_remap_func_15 }; -void ega_recalc_remap_func(ega_t *ega) +void +ega_recalc_remap_func(ega_t *ega) { int func_nr; @@ -105,7 +96,7 @@ void ega_recalc_remap_func(ega_t *ega) func_nr |= VAR_ROW1_MA14; ega->remap_required = (func_nr != 0); - ega->remap_func = address_remap_funcs[func_nr]; + ega->remap_func = address_remap_funcs[func_nr]; } #endif /*VIDEO_RENDER_REMAP_H*/ diff --git a/src/include/86box/vid_hercules.h b/src/include/86box/vid_hercules.h index 93785d9be..109d721ae 100644 --- a/src/include/86box/vid_hercules.h +++ b/src/include/86box/vid_hercules.h @@ -18,51 +18,58 @@ */ #ifndef VIDEO_HERCULES_H -# define VIDEO_HERCULES_H +#define VIDEO_HERCULES_H typedef struct { - mem_mapping_t mapping; + mem_mapping_t mapping; - uint8_t crtc[32], charbuffer[4096]; - int crtcreg; + uint8_t crtc[32], charbuffer[4096]; + int crtcreg; - uint8_t ctrl, - ctrl2, - stat; + uint8_t ctrl, + ctrl2, + stat; - uint64_t dispontime, - dispofftime; - pc_timer_t timer; + uint64_t dispontime, + dispofftime; + pc_timer_t timer; - int firstline, - lastline; + int firstline, + lastline; - int linepos, - displine; - int vc, - sc; - uint16_t ma, - maback; - int con, coff, - cursoron; - int dispon, - blink; - int vsynctime; - int vadj; + int linepos, + displine; + int vc, + sc; + uint16_t ma, + maback; + int con, coff, + cursoron; + int dispon, + blink; + int vsynctime; + int vadj; - int lp_ff; - int fullchange; + int lp_ff; + int fullchange; - int cols[256][2][2]; + int cols[256][2][2]; - uint8_t *vram; - int monitor_index; - int prev_monitor_index; + uint8_t *vram; + int monitor_index; + int prev_monitor_index; } hercules_t; -#define VIDEO_MONITOR_PROLOGUE() { dev->prev_monitor_index = monitor_index_global; monitor_index_global = dev->monitor_index; } -#define VIDEO_MONITOR_EPILOGUE() { monitor_index_global = dev->prev_monitor_index; } +#define VIDEO_MONITOR_PROLOGUE() \ + { \ + dev->prev_monitor_index = monitor_index_global; \ + monitor_index_global = dev->monitor_index; \ + } +#define VIDEO_MONITOR_EPILOGUE() \ + { \ + monitor_index_global = dev->prev_monitor_index; \ + } static void *hercules_init(const device_t *info); -#endif /*VIDEO_HERCULES_H*/ +#endif /*VIDEO_HERCULES_H*/ diff --git a/src/include/86box/vid_mda.h b/src/include/86box/vid_mda.h index 3e32ef848..0f5080865 100644 --- a/src/include/86box/vid_mda.h +++ b/src/include/86box/vid_mda.h @@ -3,40 +3,46 @@ */ #ifndef VIDEO_MDA_H -# define VIDEO_MDA_H +#define VIDEO_MDA_H -typedef struct mda_t -{ - mem_mapping_t mapping; +typedef struct mda_t { + mem_mapping_t mapping; - uint8_t crtc[32]; - int crtcreg; + uint8_t crtc[32]; + int crtcreg; - uint8_t ctrl, stat; + uint8_t ctrl, stat; - uint64_t dispontime, dispofftime; - pc_timer_t timer; + uint64_t dispontime, dispofftime; + pc_timer_t timer; - int firstline, lastline; + int firstline, lastline; - int linepos, displine; - int vc, sc; - uint16_t ma, maback; - int con, coff, cursoron; - int dispon, blink; - int vsynctime; - int vadj; - int monitor_index; - int prev_monitor_index; + int linepos, displine; + int vc, sc; + uint16_t ma, maback; + int con, coff, cursoron; + int dispon, blink; + int vsynctime; + int vadj; + int monitor_index; + int prev_monitor_index; - uint8_t *vram; + uint8_t *vram; } mda_t; -#define VIDEO_MONITOR_PROLOGUE() { mda->prev_monitor_index = monitor_index_global; monitor_index_global = mda->monitor_index; } -#define VIDEO_MONITOR_EPILOGUE() { monitor_index_global = mda->prev_monitor_index; } +#define VIDEO_MONITOR_PROLOGUE() \ + { \ + mda->prev_monitor_index = monitor_index_global; \ + monitor_index_global = mda->monitor_index; \ + } +#define VIDEO_MONITOR_EPILOGUE() \ + { \ + monitor_index_global = mda->prev_monitor_index; \ + } void mda_init(mda_t *mda); -void mda_setcol(int chr, int blink, int fg, uint8_t cga_ink); +void mda_setcol(int chr, int blink, int fg, uint8_t cga_ink); void mda_out(uint16_t addr, uint8_t val, void *p); uint8_t mda_in(uint16_t addr, void *p); void mda_write(uint32_t addr, uint8_t val, void *p); diff --git a/src/include/86box/vid_nga.h b/src/include/86box/vid_nga.h index 8aa096604..ebde4978b 100644 --- a/src/include/86box/vid_nga.h +++ b/src/include/86box/vid_nga.h @@ -23,15 +23,15 @@ */ #ifndef VIDEO_NGA_H -# define VIDEO_NGA_H +#define VIDEO_NGA_H typedef struct nga_t { cga_t cga; - /* unused in OGC, required for M19 video card structure idiom */ - uint32_t base; - int lineff; - int page; - uint8_t *vram_64k; + /* unused in OGC, required for M19 video card structure idiom */ + uint32_t base; + int lineff; + int page; + uint8_t *vram_64k; mem_mapping_t mapping_64k; } nga_t; @@ -44,10 +44,9 @@ void nga_poll(void *priv); void nga_close(void *priv); void nga_mdaattr_rebuild(); - #ifdef EMU_DEVICE_H extern const device_config_t nga_config[]; -extern const device_t nga_device; +extern const device_t nga_device; #endif #endif /*VIDEO_NGA_H*/ diff --git a/src/include/86box/vid_ogc.h b/src/include/86box/vid_ogc.h index 20ac4996e..368f43a34 100644 --- a/src/include/86box/vid_ogc.h +++ b/src/include/86box/vid_ogc.h @@ -23,16 +23,16 @@ */ #ifndef VIDEO_OGC_H -# define VIDEO_OGC_H +#define VIDEO_OGC_H typedef struct ogc_t { cga_t cga; - /* unused in OGC, required for M19 video card structure idiom */ - uint8_t ctrl_3dd; - uint8_t ctrl_3de; - uint32_t base; - int lineff; - int mono_display; + /* unused in OGC, required for M19 video card structure idiom */ + uint8_t ctrl_3dd; + uint8_t ctrl_3de; + uint32_t base; + int lineff; + int mono_display; } ogc_t; void ogc_recalctimings(ogc_t *ogc); @@ -44,10 +44,9 @@ void ogc_poll(void *priv); void ogc_close(void *priv); void ogc_mdaattr_rebuild(); - #ifdef EMU_DEVICE_H extern const device_config_t ogc_config[]; -extern const device_t ogc_device; +extern const device_t ogc_device; #endif #endif /*VIDEO_OGC_H*/ diff --git a/src/include/86box/vid_pgc.h b/src/include/86box/vid_pgc.h index 1bf0adf95..3960598ab 100644 --- a/src/include/86box/vid_pgc.h +++ b/src/include/86box/vid_pgc.h @@ -17,7 +17,7 @@ * Copyright 2019 John Elliott. */ #ifndef VID_PGC_H -# define VID_PGC_H +#define VID_PGC_H #define PGC_ERROR_RANGE 0x01 #define PGC_ERROR_INTEGER 0x02 @@ -31,153 +31,151 @@ #define PGC_ERROR_AREA 0x0A #define PGC_ERROR_MISSING 0x0B - struct pgc; typedef struct pgc_cl { - uint8_t *list; - uint32_t listmax; - uint32_t wrptr; - uint32_t rdptr; - uint32_t repeat; + uint8_t *list; + uint32_t listmax; + uint32_t wrptr; + uint32_t rdptr; + uint32_t repeat; struct pgc_cl *chain; } pgc_cl_t; typedef struct pgc_cmd { - char ascii[6]; - uint8_t hex; - void (*handler)(struct pgc *); - int (*parser) (struct pgc *, pgc_cl_t *, int); + char ascii[6]; + uint8_t hex; + void (*handler)(struct pgc *); + int (*parser)(struct pgc *, pgc_cl_t *, int); int p; } pgc_cmd_t; typedef struct pgc { - int8_t type; /* board type */ - int8_t cga_enabled; - int8_t cga_selected; - volatile int8_t stopped; + int8_t type; /* board type */ + int8_t cga_enabled; + int8_t cga_selected; + volatile int8_t stopped; - mem_mapping_t mapping; - mem_mapping_t cga_mapping; + mem_mapping_t mapping; + mem_mapping_t cga_mapping; - pgc_cl_t *clist, - *clcur; + pgc_cl_t *clist, + *clcur; const pgc_cmd_t *master, - *commands; + *commands; - uint8_t mapram[2048]; /* host <> PGC communication buffer */ - uint8_t *cga_vram; - uint8_t *vram; - char asc_command[7]; - uint8_t hex_command; - uint32_t palette[256]; - uint32_t userpal[256]; - uint32_t maxw, maxh; /* maximum framebuffer size */ - uint32_t visw, vish; /* maximum screen size */ - uint32_t screenw, screenh; - int16_t pan_x, pan_y; - uint16_t win_x1, win_x2, win_y1, win_y2; - uint16_t vp_x1, vp_x2, vp_y1, vp_y2; - int16_t fill_pattern[16]; - int16_t line_pattern; - uint8_t draw_mode; - uint8_t fill_mode; - uint8_t color; - uint8_t tjust_h; /* hor alignment 1=left 2=ctr 3=right*/ - uint8_t tjust_v; /* vert alignment 1=bottom 2=ctr 3=top*/ - int32_t tsize; /* horizontal spacing */ + uint8_t mapram[2048]; /* host <> PGC communication buffer */ + uint8_t *cga_vram; + uint8_t *vram; + char asc_command[7]; + uint8_t hex_command; + uint32_t palette[256]; + uint32_t userpal[256]; + uint32_t maxw, maxh; /* maximum framebuffer size */ + uint32_t visw, vish; /* maximum screen size */ + uint32_t screenw, screenh; + int16_t pan_x, pan_y; + uint16_t win_x1, win_x2, win_y1, win_y2; + uint16_t vp_x1, vp_x2, vp_y1, vp_y2; + int16_t fill_pattern[16]; + int16_t line_pattern; + uint8_t draw_mode; + uint8_t fill_mode; + uint8_t color; + uint8_t tjust_h; /* hor alignment 1=left 2=ctr 3=right*/ + uint8_t tjust_v; /* vert alignment 1=bottom 2=ctr 3=top*/ + int32_t tsize; /* horizontal spacing */ - int32_t x, y, z; /* drawing position */ + int32_t x, y, z; /* drawing position */ - thread_t *pgc_thread; - event_t *pgc_wake_thread; - pc_timer_t wake_timer; + thread_t *pgc_thread; + event_t *pgc_wake_thread; + pc_timer_t wake_timer; - int waiting_input_fifo; - int waiting_output_fifo; - int waiting_error_fifo; - int ascii_mode; - int result_count; + int waiting_input_fifo; + int waiting_output_fifo; + int waiting_error_fifo; + int ascii_mode; + int result_count; - int fontbase; - int linepos, - displine; - int vc; - int cgadispon; - int con, coff, cursoron, cgablink; - int vsynctime, vadj; - uint16_t ma, maback; - int oddeven; + int fontbase; + int linepos, + displine; + int vc; + int cgadispon; + int con, coff, cursoron, cgablink; + int vsynctime, vadj; + uint16_t ma, maback; + int oddeven; - uint64_t dispontime, - dispofftime; - pc_timer_t timer; - double native_pixel_clock; + uint64_t dispontime, + dispofftime; + pc_timer_t timer; + double native_pixel_clock; - int drawcursor; + int drawcursor; - int (*inputbyte)(struct pgc *, uint8_t *result); + int (*inputbyte)(struct pgc *, uint8_t *result); } pgc_t; - /* I/O functions and worker thread handlers. */ -extern void pgc_out(uint16_t addr, uint8_t val, void *priv); -extern uint8_t pgc_in(uint16_t addr, void *priv); -extern void pgc_write(uint32_t addr, uint8_t val, void *priv); -extern uint8_t pgc_read(uint32_t addr, void *priv); -extern void pgc_recalctimings(pgc_t *); -extern void pgc_poll(void *priv); -extern void pgc_reset(pgc_t *); -extern void pgc_wake(pgc_t *); -extern void pgc_sleep(pgc_t *); -extern void pgc_setdisplay(pgc_t *, int cga); -extern void pgc_speed_changed(void *priv); -extern void pgc_close_common(void *priv); -extern void pgc_close(void *priv); -extern void pgc_init(pgc_t *, - int maxw, int maxh, int visw, int vish, - int (*inpbyte)(pgc_t *, uint8_t *), double npc); +extern void pgc_out(uint16_t addr, uint8_t val, void *priv); +extern uint8_t pgc_in(uint16_t addr, void *priv); +extern void pgc_write(uint32_t addr, uint8_t val, void *priv); +extern uint8_t pgc_read(uint32_t addr, void *priv); +extern void pgc_recalctimings(pgc_t *); +extern void pgc_poll(void *priv); +extern void pgc_reset(pgc_t *); +extern void pgc_wake(pgc_t *); +extern void pgc_sleep(pgc_t *); +extern void pgc_setdisplay(pgc_t *, int cga); +extern void pgc_speed_changed(void *priv); +extern void pgc_close_common(void *priv); +extern void pgc_close(void *priv); +extern void pgc_init(pgc_t *, + int maxw, int maxh, int visw, int vish, + int (*inpbyte)(pgc_t *, uint8_t *), double npc); /* Misc support functions. */ -extern void pgc_sto_raster(pgc_t *, int16_t *x, int16_t *y); -extern void pgc_ito_raster(pgc_t *, int32_t *x, int32_t *y); -extern void pgc_dto_raster(pgc_t *, double *x, double *y); -//extern int pgc_input_byte(pgc_t *, uint8_t *val); -//extern int pgc_output_byte(pgc_t *, uint8_t val); -extern int pgc_output_string(pgc_t *, const char *val); -//extern int pgc_error_byte(pgc_t *, uint8_t val); -extern int pgc_error_string(pgc_t *, const char *val); -extern int pgc_error(pgc_t *, int err); +extern void pgc_sto_raster(pgc_t *, int16_t *x, int16_t *y); +extern void pgc_ito_raster(pgc_t *, int32_t *x, int32_t *y); +extern void pgc_dto_raster(pgc_t *, double *x, double *y); +// extern int pgc_input_byte(pgc_t *, uint8_t *val); +// extern int pgc_output_byte(pgc_t *, uint8_t val); +extern int pgc_output_string(pgc_t *, const char *val); +// extern int pgc_error_byte(pgc_t *, uint8_t val); +extern int pgc_error_string(pgc_t *, const char *val); +extern int pgc_error(pgc_t *, int err); /* Graphics functions. */ -extern uint8_t *pgc_vram_addr(pgc_t *, int16_t x, int16_t y); -extern void pgc_write_pixel(pgc_t *, uint16_t x, uint16_t y, uint8_t ink); -extern uint8_t pgc_read_pixel(pgc_t *, uint16_t x, uint16_t y); -extern void pgc_plot(pgc_t *, uint16_t x, uint16_t y); -extern uint16_t pgc_draw_line_r(pgc_t *, int32_t x1, int32_t y1, - int32_t x2, int32_t y2, uint16_t linemask); -extern void pgc_fill_line_r(pgc_t *, int32_t x0, int32_t x1, int32_t y); -extern uint16_t pgc_draw_line(pgc_t *, int32_t x1, int32_t y1, - int32_t x2, int32_t y2, uint16_t linemask); -extern void pgc_draw_ellipse(pgc_t *, int32_t x, int32_t y); -extern void pgc_fill_polygon(pgc_t *, - unsigned corners, int32_t *x, int32_t *y); +extern uint8_t *pgc_vram_addr(pgc_t *, int16_t x, int16_t y); +extern void pgc_write_pixel(pgc_t *, uint16_t x, uint16_t y, uint8_t ink); +extern uint8_t pgc_read_pixel(pgc_t *, uint16_t x, uint16_t y); +extern void pgc_plot(pgc_t *, uint16_t x, uint16_t y); +extern uint16_t pgc_draw_line_r(pgc_t *, int32_t x1, int32_t y1, + int32_t x2, int32_t y2, uint16_t linemask); +extern void pgc_fill_line_r(pgc_t *, int32_t x0, int32_t x1, int32_t y); +extern uint16_t pgc_draw_line(pgc_t *, int32_t x1, int32_t y1, + int32_t x2, int32_t y2, uint16_t linemask); +extern void pgc_draw_ellipse(pgc_t *, int32_t x, int32_t y); +extern void pgc_fill_polygon(pgc_t *, + unsigned corners, int32_t *x, int32_t *y); /* Command and parameter handling functions. */ -extern int pgc_clist_byte(pgc_t *, uint8_t *val); -extern int pgc_cl_append(pgc_cl_t *, uint8_t v); -extern int pgc_parse_bytes(pgc_t *, pgc_cl_t *, int p); -extern int pgc_parse_words(pgc_t *, pgc_cl_t *, int p); -extern int pgc_parse_coords(pgc_t *, pgc_cl_t *, int p); -extern int pgc_param_byte(pgc_t *, uint8_t *val); -extern int pgc_param_word(pgc_t *, int16_t *val); -extern int pgc_param_coord(pgc_t *, int32_t *val); -extern int pgc_result_byte(pgc_t *, uint8_t val); -extern int pgc_result_word(pgc_t *, int16_t val); -extern int pgc_result_coord(pgc_t *, int32_t val); +extern int pgc_clist_byte(pgc_t *, uint8_t *val); +extern int pgc_cl_append(pgc_cl_t *, uint8_t v); +extern int pgc_parse_bytes(pgc_t *, pgc_cl_t *, int p); +extern int pgc_parse_words(pgc_t *, pgc_cl_t *, int p); +extern int pgc_parse_coords(pgc_t *, pgc_cl_t *, int p); +extern int pgc_param_byte(pgc_t *, uint8_t *val); +extern int pgc_param_word(pgc_t *, int16_t *val); +extern int pgc_param_coord(pgc_t *, int32_t *val); +extern int pgc_result_byte(pgc_t *, uint8_t val); +extern int pgc_result_word(pgc_t *, int16_t val); +extern int pgc_result_coord(pgc_t *, int32_t val); /* Special overload functions for non-IBM implementations. */ -extern void pgc_hndl_lut8(pgc_t *); -extern void pgc_hndl_lut8rd(pgc_t *); +extern void pgc_hndl_lut8(pgc_t *); +extern void pgc_hndl_lut8rd(pgc_t *); -#endif /*VID_PGC_H*/ +#endif /*VID_PGC_H*/ diff --git a/src/include/86box/vid_pgc_palette.h b/src/include/86box/vid_pgc_palette.h index 8f2a96a5a..ffcf6a9f0 100644 --- a/src/include/86box/vid_pgc_palette.h +++ b/src/include/86box/vid_pgc_palette.h @@ -18,1562 +18,1561 @@ */ #ifndef VID_PGC_PALETTE_H -# define VID_PGC_PALETTE_H - +#define VID_PGC_PALETTE_H /* Palette 0: Default */ - { - makecol(0x00,0x00,0x00), - makecol(0x11,0x11,0x11), - makecol(0x22,0x22,0x22), - makecol(0x33,0x33,0x33), - makecol(0x44,0x44,0x44), - makecol(0x55,0x55,0x55), - makecol(0x66,0x66,0x66), - makecol(0x77,0x77,0x77), - makecol(0x88,0x88,0x88), - makecol(0x99,0x99,0x99), - makecol(0xaa,0xaa,0xaa), - makecol(0xbb,0xbb,0xbb), - makecol(0xcc,0xcc,0xcc), - makecol(0xdd,0xdd,0xdd), - makecol(0xee,0xee,0xee), - makecol(0xff,0xff,0xff), - makecol(0x00,0x00,0x00), - makecol(0x00,0x22,0x00), - makecol(0x00,0x44,0x00), - makecol(0x00,0x66,0x00), - makecol(0x00,0x88,0x00), - makecol(0x00,0xaa,0x00), - makecol(0x00,0xcc,0x00), - makecol(0x00,0xee,0x00), - makecol(0x00,0xff,0x00), - makecol(0x22,0xff,0x22), - makecol(0x44,0xff,0x44), - makecol(0x66,0xff,0x66), - makecol(0x88,0xff,0x88), - makecol(0xaa,0xff,0xaa), - makecol(0xcc,0xff,0xcc), - makecol(0xee,0xff,0xee), - makecol(0x00,0x00,0x00), - makecol(0x00,0x22,0x11), - makecol(0x00,0x44,0x22), - makecol(0x00,0x66,0x33), - makecol(0x00,0x88,0x44), - makecol(0x00,0xaa,0x55), - makecol(0x00,0xcc,0x66), - makecol(0x00,0xee,0x77), - makecol(0x00,0xff,0x88), - makecol(0x22,0xff,0x99), - makecol(0x44,0xff,0xaa), - makecol(0x66,0xff,0xbb), - makecol(0x88,0xff,0xcc), - makecol(0xaa,0xff,0xdd), - makecol(0xcc,0xff,0xee), - makecol(0xee,0xff,0xff), - makecol(0x00,0x00,0x00), - makecol(0x00,0x22,0x22), - makecol(0x00,0x44,0x44), - makecol(0x00,0x66,0x66), - makecol(0x00,0x88,0x88), - makecol(0x00,0xaa,0xaa), - makecol(0x00,0xcc,0xcc), - makecol(0x00,0xee,0xee), - makecol(0x00,0xff,0xff), - makecol(0x22,0xff,0xff), - makecol(0x44,0xff,0xff), - makecol(0x66,0xff,0xff), - makecol(0x88,0xff,0xff), - makecol(0xaa,0xff,0xff), - makecol(0xcc,0xff,0xff), - makecol(0xee,0xff,0xff), - makecol(0x00,0x00,0x00), - makecol(0x00,0x11,0x22), - makecol(0x00,0x22,0x44), - makecol(0x00,0x33,0x66), - makecol(0x00,0x44,0x88), - makecol(0x00,0x55,0xaa), - makecol(0x00,0x66,0xcc), - makecol(0x00,0x77,0xee), - makecol(0x00,0x88,0xff), - makecol(0x22,0x99,0xff), - makecol(0x44,0xaa,0xff), - makecol(0x66,0xbb,0xff), - makecol(0x88,0xcc,0xff), - makecol(0xaa,0xdd,0xff), - makecol(0xcc,0xee,0xff), - makecol(0xee,0xff,0xff), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x22), - makecol(0x00,0x00,0x44), - makecol(0x00,0x00,0x66), - makecol(0x00,0x00,0x88), - makecol(0x00,0x00,0xaa), - makecol(0x00,0x00,0xcc), - makecol(0x00,0x00,0xee), - makecol(0x00,0x00,0xff), - makecol(0x22,0x22,0xff), - makecol(0x44,0x44,0xff), - makecol(0x66,0x66,0xff), - makecol(0x88,0x88,0xff), - makecol(0xaa,0xaa,0xff), - makecol(0xcc,0xcc,0xff), - makecol(0xee,0xee,0xff), - makecol(0x00,0x00,0x00), - makecol(0x11,0x00,0x22), - makecol(0x22,0x00,0x44), - makecol(0x33,0x00,0x66), - makecol(0x44,0x00,0x88), - makecol(0x55,0x00,0xaa), - makecol(0x66,0x00,0xcc), - makecol(0x77,0x00,0xee), - makecol(0x88,0x00,0xff), - makecol(0x99,0x22,0xff), - makecol(0xaa,0x44,0xff), - makecol(0xbb,0x66,0xff), - makecol(0xcc,0x88,0xff), - makecol(0xdd,0xaa,0xff), - makecol(0xee,0xcc,0xff), - makecol(0xff,0xee,0xff), - makecol(0x00,0x00,0x00), - makecol(0x22,0x00,0x22), - makecol(0x44,0x00,0x44), - makecol(0x66,0x00,0x66), - makecol(0x88,0x00,0x88), - makecol(0xaa,0x00,0xaa), - makecol(0xcc,0x00,0xcc), - makecol(0xee,0x00,0xee), - makecol(0xff,0x00,0xff), - makecol(0xff,0x22,0xff), - makecol(0xff,0x44,0xff), - makecol(0xff,0x66,0xff), - makecol(0xff,0x88,0xff), - makecol(0xff,0xaa,0xff), - makecol(0xff,0xcc,0xff), - makecol(0xff,0xee,0xff), - makecol(0x00,0x00,0x00), - makecol(0x22,0x00,0x11), - makecol(0x44,0x00,0x22), - makecol(0x66,0x00,0x33), - makecol(0x88,0x00,0x44), - makecol(0xaa,0x00,0x55), - makecol(0xcc,0x00,0x66), - makecol(0xee,0x00,0x77), - makecol(0xff,0x00,0x88), - makecol(0xff,0x22,0x99), - makecol(0xff,0x44,0xaa), - makecol(0xff,0x66,0xbb), - makecol(0xff,0x88,0xcc), - makecol(0xff,0xaa,0xdd), - makecol(0xff,0xcc,0xee), - makecol(0xff,0xee,0xff), - makecol(0x00,0x00,0x00), - makecol(0x22,0x00,0x00), - makecol(0x44,0x00,0x00), - makecol(0x66,0x00,0x00), - makecol(0x88,0x00,0x00), - makecol(0xaa,0x00,0x00), - makecol(0xcc,0x00,0x00), - makecol(0xee,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x22,0x22), - makecol(0xff,0x44,0x44), - makecol(0xff,0x66,0x66), - makecol(0xff,0x88,0x88), - makecol(0xff,0xaa,0xaa), - makecol(0xff,0xcc,0xcc), - makecol(0xff,0xee,0xee), - makecol(0x00,0x00,0x00), - makecol(0x22,0x11,0x00), - makecol(0x44,0x22,0x00), - makecol(0x66,0x33,0x00), - makecol(0x88,0x44,0x00), - makecol(0xaa,0x55,0x00), - makecol(0xcc,0x66,0x00), - makecol(0xee,0x77,0x00), - makecol(0xff,0x88,0x00), - makecol(0xff,0x99,0x22), - makecol(0xff,0xaa,0x44), - makecol(0xff,0xbb,0x66), - makecol(0xff,0xcc,0x88), - makecol(0xff,0xdd,0xaa), - makecol(0xff,0xee,0xcc), - makecol(0xff,0xff,0xee), - makecol(0x00,0x00,0x00), - makecol(0x22,0x22,0x00), - makecol(0x44,0x44,0x00), - makecol(0x66,0x66,0x00), - makecol(0x88,0x88,0x00), - makecol(0xaa,0xaa,0x00), - makecol(0xcc,0xcc,0x00), - makecol(0xee,0xee,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x22), - makecol(0xff,0xff,0x44), - makecol(0xff,0xff,0x66), - makecol(0xff,0xff,0x88), - makecol(0xff,0xff,0xaa), - makecol(0xff,0xff,0xcc), - makecol(0xff,0xff,0xee), - makecol(0x00,0x00,0x00), - makecol(0x11,0x22,0x00), - makecol(0x22,0x44,0x00), - makecol(0x33,0x66,0x00), - makecol(0x44,0x88,0x00), - makecol(0x55,0xaa,0x00), - makecol(0x66,0xcc,0x00), - makecol(0x77,0xee,0x00), - makecol(0x88,0xff,0x00), - makecol(0x99,0xff,0x22), - makecol(0xaa,0xff,0x44), - makecol(0xbb,0xff,0x66), - makecol(0xcc,0xff,0x88), - makecol(0xdd,0xff,0xaa), - makecol(0xee,0xff,0xcc), - makecol(0xff,0xff,0xee), - makecol(0x00,0x00,0x00), - makecol(0x00,0x11,0x00), - makecol(0x11,0x33,0x11), - makecol(0x11,0x44,0x11), - makecol(0x22,0x66,0x22), - makecol(0x22,0x77,0x22), - makecol(0x33,0x99,0x33), - makecol(0x33,0xaa,0x33), - makecol(0x44,0xcc,0x44), - makecol(0x55,0xcc,0x55), - makecol(0x77,0xdd,0x77), - makecol(0x88,0xdd,0x88), - makecol(0xaa,0xee,0xaa), - makecol(0xbb,0xee,0xbb), - makecol(0xdd,0xff,0xdd), - makecol(0xee,0xff,0xee), - makecol(0x00,0x00,0x00), - makecol(0x11,0x00,0x00), - makecol(0x33,0x11,0x11), - makecol(0x44,0x11,0x11), - makecol(0x66,0x22,0x22), - makecol(0x77,0x22,0x22), - makecol(0x99,0x33,0x33), - makecol(0xaa,0x33,0x33), - makecol(0xcc,0x44,0x44), - makecol(0xcc,0x55,0x55), - makecol(0xdd,0x77,0x77), - makecol(0xdd,0x88,0x88), - makecol(0xee,0xaa,0xaa), - makecol(0xee,0xbb,0xbb), - makecol(0xff,0xdd,0xdd), - makecol(0xff,0xee,0xee), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x11), - makecol(0x11,0x11,0x33), - makecol(0x11,0x11,0x44), - makecol(0x22,0x22,0x66), - makecol(0x22,0x22,0x77), - makecol(0x33,0x33,0x99), - makecol(0x33,0x33,0xaa), - makecol(0x44,0x44,0xcc), - makecol(0x55,0x55,0xcc), - makecol(0x77,0x77,0xdd), - makecol(0x88,0x88,0xdd), - makecol(0xaa,0xaa,0xee), - makecol(0xbb,0xbb,0xee), - makecol(0xdd,0xdd,0xff), - makecol(0xee,0xee,0xff), - }, -/* Palette 1: 16-colour palette */ - { - makecol(0x88,0x66,0xdd), - makecol(0x00,0x00,0x00), - makecol(0x44,0x77,0x22), - makecol(0x77,0xaa,0x44), - makecol(0x00,0x77,0x00), - makecol(0x00,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x99,0xee,0x66), - makecol(0x77,0x77,0x77), - makecol(0xff,0xff,0xff), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x44,0x77,0x22), - makecol(0x44,0x77,0x22), - makecol(0x44,0x77,0x22), - makecol(0x44,0x77,0x22), - makecol(0x44,0x77,0x22), - makecol(0x44,0x77,0x22), - makecol(0x44,0x77,0x22), - makecol(0x44,0x77,0x22), - makecol(0x44,0x77,0x22), - makecol(0x44,0x77,0x22), - makecol(0x44,0x77,0x22), - makecol(0x44,0x77,0x22), - makecol(0x44,0x77,0x22), - makecol(0x44,0x77,0x22), - makecol(0x44,0x77,0x22), - makecol(0x44,0x77,0x22), - makecol(0x77,0xaa,0x44), - makecol(0x77,0xaa,0x44), - makecol(0x77,0xaa,0x44), - makecol(0x77,0xaa,0x44), - makecol(0x77,0xaa,0x44), - makecol(0x77,0xaa,0x44), - makecol(0x77,0xaa,0x44), - makecol(0x77,0xaa,0x44), - makecol(0x77,0xaa,0x44), - makecol(0x77,0xaa,0x44), - makecol(0x77,0xaa,0x44), - makecol(0x77,0xaa,0x44), - makecol(0x77,0xaa,0x44), - makecol(0x77,0xaa,0x44), - makecol(0x77,0xaa,0x44), - makecol(0x77,0xaa,0x44), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x00), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x77), - makecol(0x99,0xee,0x66), - makecol(0x99,0xee,0x66), - makecol(0x99,0xee,0x66), - makecol(0x99,0xee,0x66), - makecol(0x99,0xee,0x66), - makecol(0x99,0xee,0x66), - makecol(0x99,0xee,0x66), - makecol(0x99,0xee,0x66), - makecol(0x99,0xee,0x66), - makecol(0x99,0xee,0x66), - makecol(0x99,0xee,0x66), - makecol(0x99,0xee,0x66), - makecol(0x99,0xee,0x66), - makecol(0x99,0xee,0x66), - makecol(0x99,0xee,0x66), - makecol(0x99,0xee,0x66), - makecol(0x77,0x77,0x77), - makecol(0x77,0x77,0x77), - makecol(0x77,0x77,0x77), - makecol(0x77,0x77,0x77), - makecol(0x77,0x77,0x77), - makecol(0x77,0x77,0x77), - makecol(0x77,0x77,0x77), - makecol(0x77,0x77,0x77), - makecol(0x77,0x77,0x77), - makecol(0x77,0x77,0x77), - makecol(0x77,0x77,0x77), - makecol(0x77,0x77,0x77), - makecol(0x77,0x77,0x77), - makecol(0x77,0x77,0x77), - makecol(0x77,0x77,0x77), - makecol(0x77,0x77,0x77), - makecol(0xff,0xff,0xff), - makecol(0xff,0xff,0xff), - makecol(0xff,0xff,0xff), - makecol(0xff,0xff,0xff), - makecol(0xff,0xff,0xff), - makecol(0xff,0xff,0xff), - makecol(0xff,0xff,0xff), - makecol(0xff,0xff,0xff), - makecol(0xff,0xff,0xff), - makecol(0xff,0xff,0xff), - makecol(0xff,0xff,0xff), - makecol(0xff,0xff,0xff), - makecol(0xff,0xff,0xff), - makecol(0xff,0xff,0xff), - makecol(0xff,0xff,0xff), - makecol(0xff,0xff,0xff), - }, -/* Palette 2: 2-3-3 truecolour */ - { - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x33), - makecol(0x00,0x00,0x55), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x99), - makecol(0x00,0x00,0xbb), - makecol(0x00,0x00,0xdd), - makecol(0x00,0x00,0xff), - makecol(0x33,0x00,0x00), - makecol(0x33,0x00,0x33), - makecol(0x33,0x00,0x55), - makecol(0x33,0x00,0x77), - makecol(0x33,0x00,0x99), - makecol(0x33,0x00,0xbb), - makecol(0x33,0x00,0xdd), - makecol(0x33,0x00,0xff), - makecol(0x55,0x00,0x00), - makecol(0x55,0x00,0x33), - makecol(0x55,0x00,0x55), - makecol(0x55,0x00,0x77), - makecol(0x55,0x00,0x99), - makecol(0x55,0x00,0xbb), - makecol(0x55,0x00,0xdd), - makecol(0x55,0x00,0xff), - makecol(0x77,0x00,0x00), - makecol(0x77,0x00,0x33), - makecol(0x77,0x00,0x55), - makecol(0x77,0x00,0x77), - makecol(0x77,0x00,0x99), - makecol(0x77,0x00,0xbb), - makecol(0x77,0x00,0xdd), - makecol(0x77,0x00,0xff), - makecol(0x99,0x00,0x00), - makecol(0x99,0x00,0x33), - makecol(0x99,0x00,0x55), - makecol(0x99,0x00,0x77), - makecol(0x99,0x00,0x99), - makecol(0x99,0x00,0xbb), - makecol(0x99,0x00,0xdd), - makecol(0x99,0x00,0xff), - makecol(0xbb,0x00,0x00), - makecol(0xbb,0x00,0x33), - makecol(0xbb,0x00,0x55), - makecol(0xbb,0x00,0x77), - makecol(0xbb,0x00,0x99), - makecol(0xbb,0x00,0xbb), - makecol(0xbb,0x00,0xdd), - makecol(0xbb,0x00,0xff), - makecol(0xdd,0x00,0x00), - makecol(0xdd,0x00,0x33), - makecol(0xdd,0x00,0x55), - makecol(0xdd,0x00,0x77), - makecol(0xdd,0x00,0x99), - makecol(0xdd,0x00,0xbb), - makecol(0xdd,0x00,0xdd), - makecol(0xdd,0x00,0xff), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x33), - makecol(0xff,0x00,0x55), - makecol(0xff,0x00,0x77), - makecol(0xff,0x00,0x99), - makecol(0xff,0x00,0xbb), - makecol(0xff,0x00,0xdd), - makecol(0xff,0x00,0xff), - makecol(0x00,0x55,0x00), - makecol(0x00,0x55,0x33), - makecol(0x00,0x55,0x55), - makecol(0x00,0x55,0x77), - makecol(0x00,0x55,0x99), - makecol(0x00,0x55,0xbb), - makecol(0x00,0x55,0xdd), - makecol(0x00,0x55,0xff), - makecol(0x33,0x55,0x00), - makecol(0x33,0x55,0x33), - makecol(0x33,0x55,0x55), - makecol(0x33,0x55,0x77), - makecol(0x33,0x55,0x99), - makecol(0x33,0x55,0xbb), - makecol(0x33,0x55,0xdd), - makecol(0x33,0x55,0xff), - makecol(0x55,0x55,0x00), - makecol(0x55,0x55,0x33), - makecol(0x55,0x55,0x55), - makecol(0x55,0x55,0x77), - makecol(0x55,0x55,0x99), - makecol(0x55,0x55,0xbb), - makecol(0x55,0x55,0xdd), - makecol(0x55,0x55,0xff), - makecol(0x77,0x55,0x00), - makecol(0x77,0x55,0x33), - makecol(0x77,0x55,0x55), - makecol(0x77,0x55,0x77), - makecol(0x77,0x55,0x99), - makecol(0x77,0x55,0xbb), - makecol(0x77,0x55,0xdd), - makecol(0x77,0x55,0xff), - makecol(0x99,0x55,0x00), - makecol(0x99,0x55,0x33), - makecol(0x99,0x55,0x55), - makecol(0x99,0x55,0x77), - makecol(0x99,0x55,0x99), - makecol(0x99,0x55,0xbb), - makecol(0x99,0x55,0xdd), - makecol(0x99,0x55,0xff), - makecol(0xbb,0x55,0x00), - makecol(0xbb,0x55,0x33), - makecol(0xbb,0x55,0x55), - makecol(0xbb,0x55,0x77), - makecol(0xbb,0x55,0x99), - makecol(0xbb,0x55,0xbb), - makecol(0xbb,0x55,0xdd), - makecol(0xbb,0x55,0xff), - makecol(0xdd,0x55,0x00), - makecol(0xdd,0x55,0x33), - makecol(0xdd,0x55,0x55), - makecol(0xdd,0x55,0x77), - makecol(0xdd,0x55,0x99), - makecol(0xdd,0x55,0xbb), - makecol(0xdd,0x55,0xdd), - makecol(0xdd,0x55,0xff), - makecol(0xff,0x55,0x00), - makecol(0xff,0x55,0x33), - makecol(0xff,0x55,0x55), - makecol(0xff,0x55,0x77), - makecol(0xff,0x55,0x99), - makecol(0xff,0x55,0xbb), - makecol(0xff,0x55,0xdd), - makecol(0xff,0x55,0xff), - makecol(0x00,0xaa,0x00), - makecol(0x00,0xaa,0x33), - makecol(0x00,0xaa,0x55), - makecol(0x00,0xaa,0x77), - makecol(0x00,0xaa,0x99), - makecol(0x00,0xaa,0xbb), - makecol(0x00,0xaa,0xdd), - makecol(0x00,0xaa,0xff), - makecol(0x33,0xaa,0x00), - makecol(0x33,0xaa,0x33), - makecol(0x33,0xaa,0x55), - makecol(0x33,0xaa,0x77), - makecol(0x33,0xaa,0x99), - makecol(0x33,0xaa,0xbb), - makecol(0x33,0xaa,0xdd), - makecol(0x33,0xaa,0xff), - makecol(0x55,0xaa,0x00), - makecol(0x55,0xaa,0x33), - makecol(0x55,0xaa,0x55), - makecol(0x55,0xaa,0x77), - makecol(0x55,0xaa,0x99), - makecol(0x55,0xaa,0xbb), - makecol(0x55,0xaa,0xdd), - makecol(0x55,0xaa,0xff), - makecol(0x77,0xaa,0x00), - makecol(0x77,0xaa,0x33), - makecol(0x77,0xaa,0x55), - makecol(0x77,0xaa,0x77), - makecol(0x77,0xaa,0x99), - makecol(0x77,0xaa,0xbb), - makecol(0x77,0xaa,0xdd), - makecol(0x77,0xaa,0xff), - makecol(0x99,0xaa,0x00), - makecol(0x99,0xaa,0x33), - makecol(0x99,0xaa,0x55), - makecol(0x99,0xaa,0x77), - makecol(0x99,0xaa,0x99), - makecol(0x99,0xaa,0xbb), - makecol(0x99,0xaa,0xdd), - makecol(0x99,0xaa,0xff), - makecol(0xbb,0xaa,0x00), - makecol(0xbb,0xaa,0x33), - makecol(0xbb,0xaa,0x55), - makecol(0xbb,0xaa,0x77), - makecol(0xbb,0xaa,0x99), - makecol(0xbb,0xaa,0xbb), - makecol(0xbb,0xaa,0xdd), - makecol(0xbb,0xaa,0xff), - makecol(0xdd,0xaa,0x00), - makecol(0xdd,0xaa,0x33), - makecol(0xdd,0xaa,0x55), - makecol(0xdd,0xaa,0x77), - makecol(0xdd,0xaa,0x99), - makecol(0xdd,0xaa,0xbb), - makecol(0xdd,0xaa,0xdd), - makecol(0xdd,0xaa,0xff), - makecol(0xff,0xaa,0x00), - makecol(0xff,0xaa,0x33), - makecol(0xff,0xaa,0x55), - makecol(0xff,0xaa,0x77), - makecol(0xff,0xaa,0x99), - makecol(0xff,0xaa,0xbb), - makecol(0xff,0xaa,0xdd), - makecol(0xff,0xaa,0xee), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x33), - makecol(0x00,0xff,0x55), - makecol(0x00,0xff,0x77), - makecol(0x00,0xff,0x99), - makecol(0x00,0xff,0xbb), - makecol(0x00,0xff,0xdd), - makecol(0x00,0xff,0xff), - makecol(0x33,0xff,0x00), - makecol(0x33,0xff,0x33), - makecol(0x33,0xff,0x55), - makecol(0x33,0xff,0x77), - makecol(0x33,0xff,0x99), - makecol(0x33,0xff,0xbb), - makecol(0x33,0xff,0xdd), - makecol(0x33,0xff,0xff), - makecol(0x55,0xff,0x00), - makecol(0x55,0xff,0x33), - makecol(0x55,0xff,0x55), - makecol(0x55,0xff,0x77), - makecol(0x55,0xff,0x99), - makecol(0x55,0xff,0xbb), - makecol(0x55,0xff,0xdd), - makecol(0x55,0xff,0xff), - makecol(0x77,0xff,0x00), - makecol(0x77,0xff,0x33), - makecol(0x77,0xff,0x55), - makecol(0x77,0xff,0x77), - makecol(0x77,0xff,0x99), - makecol(0x77,0xff,0xbb), - makecol(0x77,0xff,0xdd), - makecol(0x77,0xff,0xff), - makecol(0x99,0xff,0x00), - makecol(0x99,0xff,0x33), - makecol(0x99,0xff,0x55), - makecol(0x99,0xff,0x77), - makecol(0x99,0xff,0x99), - makecol(0x99,0xff,0xbb), - makecol(0x99,0xff,0xdd), - makecol(0x99,0xff,0xff), - makecol(0xbb,0xff,0x00), - makecol(0xbb,0xff,0x33), - makecol(0xbb,0xff,0x55), - makecol(0xbb,0xff,0x77), - makecol(0xbb,0xff,0x99), - makecol(0xbb,0xff,0xbb), - makecol(0xbb,0xff,0xdd), - makecol(0xbb,0xff,0xff), - makecol(0xdd,0xff,0x00), - makecol(0xdd,0xff,0x33), - makecol(0xdd,0xff,0x55), - makecol(0xdd,0xff,0x77), - makecol(0xdd,0xff,0x99), - makecol(0xdd,0xff,0xbb), - makecol(0xdd,0xff,0xdd), - makecol(0xdd,0xff,0xff), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x33), - makecol(0xff,0xff,0x55), - makecol(0xff,0xff,0x77), - makecol(0xff,0xff,0x99), - makecol(0xff,0xff,0xbb), - makecol(0xff,0xff,0xdd), - makecol(0xff,0xff,0xff), - }, -/* Palette 3: 3-2-3 truecolour */ - { - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x33), - makecol(0x00,0x00,0x55), - makecol(0x00,0x00,0x77), - makecol(0x00,0x00,0x99), - makecol(0x00,0x00,0xbb), - makecol(0x00,0x00,0xdd), - makecol(0x00,0x00,0xff), - makecol(0x55,0x00,0x00), - makecol(0x55,0x00,0x33), - makecol(0x55,0x00,0x55), - makecol(0x55,0x00,0x77), - makecol(0x55,0x00,0x99), - makecol(0x55,0x00,0xbb), - makecol(0x55,0x00,0xdd), - makecol(0x55,0x00,0xff), - makecol(0xaa,0x00,0x00), - makecol(0xaa,0x00,0x33), - makecol(0xaa,0x00,0x55), - makecol(0xaa,0x00,0x77), - makecol(0xaa,0x00,0x99), - makecol(0xaa,0x00,0xbb), - makecol(0xaa,0x00,0xdd), - makecol(0xaa,0x00,0xff), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x33), - makecol(0xff,0x00,0x55), - makecol(0xff,0x00,0x77), - makecol(0xff,0x00,0x99), - makecol(0xff,0x00,0xbb), - makecol(0xff,0x00,0xdd), - makecol(0xff,0x00,0xff), - makecol(0x00,0x33,0x00), - makecol(0x00,0x33,0x33), - makecol(0x00,0x33,0x55), - makecol(0x00,0x33,0x77), - makecol(0x00,0x33,0x99), - makecol(0x00,0x33,0xbb), - makecol(0x00,0x33,0xdd), - makecol(0x00,0x33,0xff), - makecol(0x55,0x33,0x00), - makecol(0x55,0x33,0x33), - makecol(0x55,0x33,0x55), - makecol(0x55,0x33,0x77), - makecol(0x55,0x33,0x99), - makecol(0x55,0x33,0xbb), - makecol(0x55,0x33,0xdd), - makecol(0x55,0x33,0xff), - makecol(0xaa,0x33,0x00), - makecol(0xaa,0x33,0x33), - makecol(0xaa,0x33,0x55), - makecol(0xaa,0x33,0x77), - makecol(0xaa,0x33,0x99), - makecol(0xaa,0x33,0xbb), - makecol(0xaa,0x33,0xdd), - makecol(0xaa,0x33,0xff), - makecol(0xff,0x33,0x00), - makecol(0xff,0x33,0x33), - makecol(0xff,0x33,0x55), - makecol(0xff,0x33,0x77), - makecol(0xff,0x33,0x99), - makecol(0xff,0x33,0xbb), - makecol(0xff,0x33,0xdd), - makecol(0xff,0x33,0xff), - makecol(0x00,0x55,0x00), - makecol(0x00,0x55,0x33), - makecol(0x00,0x55,0x55), - makecol(0x00,0x55,0x77), - makecol(0x00,0x55,0x99), - makecol(0x00,0x55,0xbb), - makecol(0x00,0x55,0xdd), - makecol(0x00,0x55,0xff), - makecol(0x55,0x55,0x00), - makecol(0x55,0x55,0x33), - makecol(0x55,0x55,0x55), - makecol(0x55,0x55,0x77), - makecol(0x55,0x55,0x99), - makecol(0x55,0x55,0xbb), - makecol(0x55,0x55,0xdd), - makecol(0x55,0x55,0xff), - makecol(0xaa,0x55,0x00), - makecol(0xaa,0x55,0x33), - makecol(0xaa,0x55,0x55), - makecol(0xaa,0x55,0x77), - makecol(0xaa,0x55,0x99), - makecol(0xaa,0x55,0xbb), - makecol(0xaa,0x55,0xdd), - makecol(0xaa,0x55,0xff), - makecol(0xff,0x55,0x00), - makecol(0xff,0x55,0x33), - makecol(0xff,0x55,0x55), - makecol(0xff,0x55,0x77), - makecol(0xff,0x55,0x99), - makecol(0xff,0x55,0xbb), - makecol(0xff,0x55,0xdd), - makecol(0xff,0x55,0xff), - makecol(0x00,0x77,0x00), - makecol(0x00,0x77,0x33), - makecol(0x00,0x77,0x55), - makecol(0x00,0x77,0x77), - makecol(0x00,0x77,0x99), - makecol(0x00,0x77,0xbb), - makecol(0x00,0x77,0xdd), - makecol(0x00,0x77,0xff), - makecol(0x55,0x77,0x00), - makecol(0x55,0x77,0x33), - makecol(0x55,0x77,0x55), - makecol(0x55,0x77,0x77), - makecol(0x55,0x77,0x99), - makecol(0x55,0x77,0xbb), - makecol(0x55,0x77,0xdd), - makecol(0x55,0x77,0xff), - makecol(0xaa,0x77,0x00), - makecol(0xaa,0x77,0x33), - makecol(0xaa,0x77,0x55), - makecol(0xaa,0x77,0x77), - makecol(0xaa,0x77,0x99), - makecol(0xaa,0x77,0xbb), - makecol(0xaa,0x77,0xdd), - makecol(0xaa,0x77,0xff), - makecol(0xff,0x77,0x00), - makecol(0xff,0x77,0x33), - makecol(0xff,0x77,0x55), - makecol(0xff,0x77,0x77), - makecol(0xff,0x77,0x99), - makecol(0xff,0x77,0xbb), - makecol(0xff,0x77,0xdd), - makecol(0xff,0x77,0xff), - makecol(0x00,0x99,0x00), - makecol(0x00,0x99,0x33), - makecol(0x00,0x99,0x55), - makecol(0x00,0x99,0x77), - makecol(0x00,0x99,0x99), - makecol(0x00,0x99,0xbb), - makecol(0x00,0x99,0xdd), - makecol(0x00,0x99,0xff), - makecol(0x55,0x99,0x00), - makecol(0x55,0x99,0x33), - makecol(0x55,0x99,0x55), - makecol(0x55,0x99,0x77), - makecol(0x55,0x99,0x99), - makecol(0x55,0x99,0xbb), - makecol(0x55,0x99,0xdd), - makecol(0x55,0x99,0xff), - makecol(0xaa,0x99,0x00), - makecol(0xaa,0x99,0x33), - makecol(0xaa,0x99,0x55), - makecol(0xaa,0x99,0x77), - makecol(0xaa,0x99,0x99), - makecol(0xaa,0x99,0xbb), - makecol(0xaa,0x99,0xdd), - makecol(0xaa,0x99,0xff), - makecol(0xff,0x99,0x00), - makecol(0xff,0x99,0x33), - makecol(0xff,0x99,0x55), - makecol(0xff,0x99,0x77), - makecol(0xff,0x99,0x99), - makecol(0xff,0x99,0xbb), - makecol(0xff,0x99,0xdd), - makecol(0xff,0x99,0xff), - makecol(0x00,0xbb,0x00), - makecol(0x00,0xbb,0x33), - makecol(0x00,0xbb,0x55), - makecol(0x00,0xbb,0x77), - makecol(0x00,0xbb,0x99), - makecol(0x00,0xbb,0xbb), - makecol(0x00,0xbb,0xdd), - makecol(0x00,0xbb,0xff), - makecol(0x55,0xbb,0x00), - makecol(0x55,0xbb,0x33), - makecol(0x55,0xbb,0x55), - makecol(0x55,0xbb,0x77), - makecol(0x55,0xbb,0x99), - makecol(0x55,0xbb,0xbb), - makecol(0x55,0xbb,0xdd), - makecol(0x55,0xbb,0xff), - makecol(0xaa,0xbb,0x00), - makecol(0xaa,0xbb,0x33), - makecol(0xaa,0xbb,0x55), - makecol(0xaa,0xbb,0x77), - makecol(0xaa,0xbb,0x99), - makecol(0xaa,0xbb,0xbb), - makecol(0xaa,0xbb,0xdd), - makecol(0xaa,0xbb,0xff), - makecol(0xff,0xbb,0x00), - makecol(0xff,0xbb,0x33), - makecol(0xff,0xbb,0x55), - makecol(0xff,0xbb,0x77), - makecol(0xff,0xbb,0x99), - makecol(0xff,0xbb,0xbb), - makecol(0xff,0xbb,0xdd), - makecol(0xff,0xbb,0xff), - makecol(0x00,0xdd,0x00), - makecol(0x00,0xdd,0x33), - makecol(0x00,0xdd,0x55), - makecol(0x00,0xdd,0x77), - makecol(0x00,0xdd,0x99), - makecol(0x00,0xdd,0xbb), - makecol(0x00,0xdd,0xdd), - makecol(0x00,0xdd,0xff), - makecol(0x55,0xdd,0x00), - makecol(0x55,0xdd,0x33), - makecol(0x55,0xdd,0x55), - makecol(0x55,0xdd,0x77), - makecol(0x55,0xdd,0x99), - makecol(0x55,0xdd,0xbb), - makecol(0x55,0xdd,0xdd), - makecol(0x55,0xdd,0xff), - makecol(0xaa,0xdd,0x00), - makecol(0xaa,0xdd,0x33), - makecol(0xaa,0xdd,0x55), - makecol(0xaa,0xdd,0x77), - makecol(0xaa,0xdd,0x99), - makecol(0xaa,0xdd,0xbb), - makecol(0xaa,0xdd,0xdd), - makecol(0xaa,0xdd,0xff), - makecol(0xff,0xdd,0x00), - makecol(0xff,0xdd,0x33), - makecol(0xff,0xdd,0x55), - makecol(0xff,0xdd,0x77), - makecol(0xff,0xdd,0x99), - makecol(0xff,0xdd,0xbb), - makecol(0xff,0xdd,0xdd), - makecol(0xff,0xdd,0xff), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x33), - makecol(0x00,0xff,0x55), - makecol(0x00,0xff,0x77), - makecol(0x00,0xff,0x99), - makecol(0x00,0xff,0xbb), - makecol(0x00,0xff,0xdd), - makecol(0x00,0xff,0xff), - makecol(0x55,0xff,0x00), - makecol(0x55,0xff,0x33), - makecol(0x55,0xff,0x55), - makecol(0x55,0xff,0x77), - makecol(0x55,0xff,0x99), - makecol(0x55,0xff,0xbb), - makecol(0x55,0xff,0xdd), - makecol(0x55,0xff,0xff), - makecol(0xaa,0xff,0x00), - makecol(0xaa,0xff,0x33), - makecol(0xaa,0xff,0x55), - makecol(0xaa,0xff,0x77), - makecol(0xaa,0xff,0x99), - makecol(0xaa,0xff,0xbb), - makecol(0xaa,0xff,0xdd), - makecol(0xaa,0xff,0xff), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x33), - makecol(0xff,0xff,0x55), - makecol(0xff,0xff,0x77), - makecol(0xff,0xff,0x99), - makecol(0xff,0xff,0xbb), - makecol(0xff,0xff,0xdd), - makecol(0xff,0xff,0xff), - }, -/* Palette 4: 3-3-2 truecolour */ - { - makecol(0x00, 0x00, 0x00), - makecol(0x00, 0x00, 0x55), - makecol(0x00, 0x00, 0xaa), - makecol(0x00, 0x00, 0xff), - makecol(0x00, 0x33, 0x00), - makecol(0x00, 0x33, 0x55), - makecol(0x00, 0x33, 0xaa), - makecol(0x00, 0x33, 0xff), - makecol(0x00, 0x55, 0x00), - makecol(0x00, 0x55, 0x55), - makecol(0x00, 0x55, 0xaa), - makecol(0x00, 0x55, 0xff), - makecol(0x00, 0x77, 0x00), - makecol(0x00, 0x77, 0x55), - makecol(0x00, 0x77, 0xaa), - makecol(0x00, 0x77, 0xff), - makecol(0x00, 0x99, 0x00), - makecol(0x00, 0x99, 0x55), - makecol(0x00, 0x99, 0xaa), - makecol(0x00, 0x99, 0xff), - makecol(0x00, 0xbb, 0x00), - makecol(0x00, 0xbb, 0x55), - makecol(0x00, 0xbb, 0xaa), - makecol(0x00, 0xbb, 0xff), - makecol(0x00, 0xdd, 0x00), - makecol(0x00, 0xdd, 0x55), - makecol(0x00, 0xdd, 0xaa), - makecol(0x00, 0xdd, 0xff), - makecol(0x00, 0xff, 0x00), - makecol(0x00, 0xff, 0x55), - makecol(0x00, 0xff, 0xaa), - makecol(0x00, 0xff, 0xff), - makecol(0x33, 0x00, 0x00), - makecol(0x33, 0x00, 0x55), - makecol(0x33, 0x00, 0xaa), - makecol(0x33, 0x00, 0xff), - makecol(0x33, 0x33, 0x00), - makecol(0x33, 0x33, 0x55), - makecol(0x33, 0x33, 0xaa), - makecol(0x33, 0x33, 0xff), - makecol(0x33, 0x55, 0x00), - makecol(0x33, 0x55, 0x55), - makecol(0x33, 0x55, 0xaa), - makecol(0x33, 0x55, 0xff), - makecol(0x33, 0x77, 0x00), - makecol(0x33, 0x77, 0x55), - makecol(0x33, 0x77, 0xaa), - makecol(0x33, 0x77, 0xff), - makecol(0x33, 0x99, 0x00), - makecol(0x33, 0x99, 0x55), - makecol(0x33, 0x99, 0xaa), - makecol(0x33, 0x99, 0xff), - makecol(0x33, 0xbb, 0x00), - makecol(0x33, 0xbb, 0x55), - makecol(0x33, 0xbb, 0xaa), - makecol(0x33, 0xbb, 0xff), - makecol(0x33, 0xdd, 0x00), - makecol(0x33, 0xdd, 0x55), - makecol(0x33, 0xdd, 0xaa), - makecol(0x33, 0xdd, 0xff), - makecol(0x33, 0xff, 0x00), - makecol(0x33, 0xff, 0x55), - makecol(0x33, 0xff, 0xaa), - makecol(0x33, 0xff, 0xff), - makecol(0x55, 0x00, 0x00), - makecol(0x55, 0x00, 0x55), - makecol(0x55, 0x00, 0xaa), - makecol(0x55, 0x00, 0xff), - makecol(0x55, 0x33, 0x00), - makecol(0x55, 0x33, 0x55), - makecol(0x55, 0x33, 0xaa), - makecol(0x55, 0x33, 0xff), - makecol(0x55, 0x55, 0x00), - makecol(0x55, 0x55, 0x55), - makecol(0x55, 0x55, 0xaa), - makecol(0x55, 0x55, 0xff), - makecol(0x55, 0x77, 0x00), - makecol(0x55, 0x77, 0x55), - makecol(0x55, 0x77, 0xaa), - makecol(0x55, 0x77, 0xff), - makecol(0x55, 0x99, 0x00), - makecol(0x55, 0x99, 0x55), - makecol(0x55, 0x99, 0xaa), - makecol(0x55, 0x99, 0xff), - makecol(0x55, 0xbb, 0x00), - makecol(0x55, 0xbb, 0x55), - makecol(0x55, 0xbb, 0xaa), - makecol(0x55, 0xbb, 0xff), - makecol(0x55, 0xdd, 0x00), - makecol(0x55, 0xdd, 0x55), - makecol(0x55, 0xdd, 0xaa), - makecol(0x55, 0xdd, 0xff), - makecol(0x55, 0xff, 0x00), - makecol(0x55, 0xff, 0x55), - makecol(0x55, 0xff, 0xaa), - makecol(0x55, 0xff, 0xff), - makecol(0x77, 0x00, 0x00), - makecol(0x77, 0x00, 0x55), - makecol(0x77, 0x00, 0xaa), - makecol(0x77, 0x00, 0xff), - makecol(0x77, 0x33, 0x00), - makecol(0x77, 0x33, 0x55), - makecol(0x77, 0x33, 0xaa), - makecol(0x77, 0x33, 0xff), - makecol(0x77, 0x55, 0x00), - makecol(0x77, 0x55, 0x55), - makecol(0x77, 0x55, 0xaa), - makecol(0x77, 0x55, 0xff), - makecol(0x77, 0x77, 0x00), - makecol(0x77, 0x77, 0x55), - makecol(0x77, 0x77, 0xaa), - makecol(0x77, 0x77, 0xff), - makecol(0x77, 0x99, 0x00), - makecol(0x77, 0x99, 0x55), - makecol(0x77, 0x99, 0xaa), - makecol(0x77, 0x99, 0xff), - makecol(0x77, 0xbb, 0x00), - makecol(0x77, 0xbb, 0x55), - makecol(0x77, 0xbb, 0xaa), - makecol(0x77, 0xbb, 0xff), - makecol(0x77, 0xdd, 0x00), - makecol(0x77, 0xdd, 0x55), - makecol(0x77, 0xdd, 0xaa), - makecol(0x77, 0xdd, 0xff), - makecol(0x77, 0xff, 0x00), - makecol(0x77, 0xff, 0x55), - makecol(0x77, 0xff, 0xaa), - makecol(0x77, 0xff, 0xff), - makecol(0x99, 0x00, 0x00), - makecol(0x99, 0x00, 0x55), - makecol(0x99, 0x00, 0xaa), - makecol(0x99, 0x00, 0xff), - makecol(0x99, 0x33, 0x00), - makecol(0x99, 0x33, 0x55), - makecol(0x99, 0x33, 0xaa), - makecol(0x99, 0x33, 0xff), - makecol(0x99, 0x55, 0x00), - makecol(0x99, 0x55, 0x55), - makecol(0x99, 0x55, 0xaa), - makecol(0x99, 0x55, 0xff), - makecol(0x99, 0x77, 0x00), - makecol(0x99, 0x77, 0x55), - makecol(0x99, 0x77, 0xaa), - makecol(0x99, 0x77, 0xff), - makecol(0x99, 0x99, 0x00), - makecol(0x99, 0x99, 0x55), - makecol(0x99, 0x99, 0xaa), - makecol(0x99, 0x99, 0xff), - makecol(0x99, 0xbb, 0x00), - makecol(0x99, 0xbb, 0x55), - makecol(0x99, 0xbb, 0xaa), - makecol(0x99, 0xbb, 0xff), - makecol(0x99, 0xdd, 0x00), - makecol(0x99, 0xdd, 0x55), - makecol(0x99, 0xdd, 0xaa), - makecol(0x99, 0xdd, 0xff), - makecol(0x99, 0xff, 0x00), - makecol(0x99, 0xff, 0x55), - makecol(0x99, 0xff, 0xaa), - makecol(0x99, 0xff, 0xff), - makecol(0xbb, 0x00, 0x00), - makecol(0xbb, 0x00, 0x55), - makecol(0xbb, 0x00, 0xaa), - makecol(0xbb, 0x00, 0xff), - makecol(0xbb, 0x33, 0x00), - makecol(0xbb, 0x33, 0x55), - makecol(0xbb, 0x33, 0xaa), - makecol(0xbb, 0x33, 0xff), - makecol(0xbb, 0x55, 0x00), - makecol(0xbb, 0x55, 0x55), - makecol(0xbb, 0x55, 0xaa), - makecol(0xbb, 0x55, 0xff), - makecol(0xbb, 0x77, 0x00), - makecol(0xbb, 0x77, 0x55), - makecol(0xbb, 0x77, 0xaa), - makecol(0xbb, 0x77, 0xff), - makecol(0xbb, 0x99, 0x00), - makecol(0xbb, 0x99, 0x55), - makecol(0xbb, 0x99, 0xaa), - makecol(0xbb, 0x99, 0xff), - makecol(0xbb, 0xbb, 0x00), - makecol(0xbb, 0xbb, 0x55), - makecol(0xbb, 0xbb, 0xaa), - makecol(0xbb, 0xbb, 0xff), - makecol(0xbb, 0xdd, 0x00), - makecol(0xbb, 0xdd, 0x55), - makecol(0xbb, 0xdd, 0xaa), - makecol(0xbb, 0xdd, 0xff), - makecol(0xbb, 0xff, 0x00), - makecol(0xbb, 0xff, 0x55), - makecol(0xbb, 0xff, 0xaa), - makecol(0xbb, 0xff, 0xff), - makecol(0xdd, 0x00, 0x00), - makecol(0xdd, 0x00, 0x55), - makecol(0xdd, 0x00, 0xaa), - makecol(0xdd, 0x00, 0xff), - makecol(0xdd, 0x33, 0x00), - makecol(0xdd, 0x33, 0x55), - makecol(0xdd, 0x33, 0xaa), - makecol(0xdd, 0x33, 0xff), - makecol(0xdd, 0x55, 0x00), - makecol(0xdd, 0x55, 0x55), - makecol(0xdd, 0x55, 0xaa), - makecol(0xdd, 0x55, 0xff), - makecol(0xdd, 0x77, 0x00), - makecol(0xdd, 0x77, 0x55), - makecol(0xdd, 0x77, 0xaa), - makecol(0xdd, 0x77, 0xff), - makecol(0xdd, 0x99, 0x00), - makecol(0xdd, 0x99, 0x55), - makecol(0xdd, 0x99, 0xaa), - makecol(0xdd, 0x99, 0xff), - makecol(0xdd, 0xbb, 0x00), - makecol(0xdd, 0xbb, 0x55), - makecol(0xdd, 0xbb, 0xaa), - makecol(0xdd, 0xbb, 0xff), - makecol(0xdd, 0xdd, 0x00), - makecol(0xdd, 0xdd, 0x55), - makecol(0xdd, 0xdd, 0xaa), - makecol(0xdd, 0xdd, 0xff), - makecol(0xdd, 0xff, 0x00), - makecol(0xdd, 0xff, 0x55), - makecol(0xdd, 0xff, 0xaa), - makecol(0xdd, 0xff, 0xff), - makecol(0xff, 0x00, 0x00), - makecol(0xff, 0x00, 0x55), - makecol(0xff, 0x00, 0xaa), - makecol(0xff, 0x00, 0xff), - makecol(0xff, 0x33, 0x00), - makecol(0xff, 0x33, 0x55), - makecol(0xff, 0x33, 0xaa), - makecol(0xff, 0x33, 0xff), - makecol(0xff, 0x55, 0x00), - makecol(0xff, 0x55, 0x55), - makecol(0xff, 0x55, 0xaa), - makecol(0xff, 0x55, 0xff), - makecol(0xff, 0x77, 0x00), - makecol(0xff, 0x77, 0x55), - makecol(0xff, 0x77, 0xaa), - makecol(0xff, 0x77, 0xff), - makecol(0xff, 0x99, 0x00), - makecol(0xff, 0x99, 0x55), - makecol(0xff, 0x99, 0xaa), - makecol(0xff, 0x99, 0xff), - makecol(0xff, 0xbb, 0x00), - makecol(0xff, 0xbb, 0x55), - makecol(0xff, 0xbb, 0xaa), - makecol(0xff, 0xbb, 0xff), - makecol(0xff, 0xdd, 0x00), - makecol(0xff, 0xdd, 0x55), - makecol(0xff, 0xdd, 0xaa), - makecol(0xff, 0xdd, 0xff), - makecol(0xff, 0xff, 0x00), - makecol(0xff, 0xff, 0x55), - makecol(0xff, 0xff, 0xaa), - makecol(0xff, 0xff, 0xff), - }, -/* Palette 5: 6x6x6 colour cube */ - { - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x33), - makecol(0x00,0x00,0x66), - makecol(0x00,0x00,0x99), - makecol(0x00,0x00,0xcc), - makecol(0x00,0x00,0xff), - makecol(0x33,0x00,0x00), - makecol(0x33,0x00,0x33), - makecol(0x33,0x00,0x66), - makecol(0x33,0x00,0x99), - makecol(0x33,0x00,0xcc), - makecol(0x33,0x00,0xff), - makecol(0x66,0x00,0x00), - makecol(0x66,0x00,0x33), - makecol(0x66,0x00,0x66), - makecol(0x66,0x00,0x99), - makecol(0x66,0x00,0xcc), - makecol(0x66,0x00,0xff), - makecol(0x99,0x00,0x00), - makecol(0x99,0x00,0x33), - makecol(0x99,0x00,0x66), - makecol(0x99,0x00,0x99), - makecol(0x99,0x00,0xcc), - makecol(0x99,0x00,0xff), - makecol(0xcc,0x00,0x00), - makecol(0xcc,0x00,0x33), - makecol(0xcc,0x00,0x66), - makecol(0xcc,0x00,0x99), - makecol(0xcc,0x00,0xcc), - makecol(0xcc,0x00,0xff), - makecol(0xff,0x00,0x00), - makecol(0xff,0x00,0x33), - makecol(0xff,0x00,0x66), - makecol(0xff,0x00,0x99), - makecol(0xff,0x00,0xcc), - makecol(0xff,0x00,0xff), - makecol(0x00,0x33,0x00), - makecol(0x00,0x33,0x33), - makecol(0x00,0x33,0x66), - makecol(0x00,0x33,0x99), - makecol(0x00,0x33,0xcc), - makecol(0x00,0x33,0xff), - makecol(0x33,0x33,0x00), - makecol(0x33,0x33,0x33), - makecol(0x33,0x33,0x66), - makecol(0x33,0x33,0x99), - makecol(0x33,0x33,0xcc), - makecol(0x33,0x33,0xff), - makecol(0x66,0x33,0x00), - makecol(0x66,0x33,0x33), - makecol(0x66,0x33,0x66), - makecol(0x66,0x33,0x99), - makecol(0x66,0x33,0xcc), - makecol(0x66,0x33,0xff), - makecol(0x99,0x33,0x00), - makecol(0x99,0x33,0x33), - makecol(0x99,0x33,0x66), - makecol(0x99,0x33,0x99), - makecol(0x99,0x33,0xcc), - makecol(0x99,0x33,0xff), - makecol(0xcc,0x33,0x00), - makecol(0xcc,0x33,0x33), - makecol(0xcc,0x33,0x66), - makecol(0xcc,0x33,0x99), - makecol(0xcc,0x33,0xcc), - makecol(0xcc,0x33,0xff), - makecol(0xff,0x33,0x00), - makecol(0xff,0x33,0x33), - makecol(0xff,0x33,0x66), - makecol(0xff,0x33,0x99), - makecol(0xff,0x33,0xcc), - makecol(0xff,0x33,0xff), - makecol(0x00,0x66,0x00), - makecol(0x00,0x66,0x33), - makecol(0x00,0x66,0x66), - makecol(0x00,0x66,0x99), - makecol(0x00,0x66,0xcc), - makecol(0x00,0x66,0xff), - makecol(0x33,0x66,0x00), - makecol(0x33,0x66,0x33), - makecol(0x33,0x66,0x66), - makecol(0x33,0x66,0x99), - makecol(0x33,0x66,0xcc), - makecol(0x33,0x66,0xff), - makecol(0x66,0x66,0x00), - makecol(0x66,0x66,0x33), - makecol(0x66,0x66,0x66), - makecol(0x66,0x66,0x99), - makecol(0x66,0x66,0xcc), - makecol(0x66,0x66,0xff), - makecol(0x99,0x66,0x00), - makecol(0x99,0x66,0x33), - makecol(0x99,0x66,0x66), - makecol(0x99,0x66,0x99), - makecol(0x99,0x66,0xcc), - makecol(0x99,0x66,0xff), - makecol(0xcc,0x66,0x00), - makecol(0xcc,0x66,0x33), - makecol(0xcc,0x66,0x66), - makecol(0xcc,0x66,0x99), - makecol(0xcc,0x66,0xcc), - makecol(0xcc,0x66,0xff), - makecol(0xff,0x66,0x00), - makecol(0xff,0x66,0x33), - makecol(0xff,0x66,0x66), - makecol(0xff,0x66,0x99), - makecol(0xff,0x66,0xcc), - makecol(0xff,0x66,0xff), - makecol(0x00,0x99,0x00), - makecol(0x00,0x99,0x33), - makecol(0x00,0x99,0x66), - makecol(0x00,0x99,0x99), - makecol(0x00,0x99,0xcc), - makecol(0x00,0x99,0xff), - makecol(0x33,0x99,0x00), - makecol(0x33,0x99,0x33), - makecol(0x33,0x99,0x66), - makecol(0x33,0x99,0x99), - makecol(0x33,0x99,0xcc), - makecol(0x33,0x99,0xff), - makecol(0x66,0x99,0x00), - makecol(0x66,0x99,0x33), - makecol(0x66,0x99,0x66), - makecol(0x66,0x99,0x99), - makecol(0x66,0x99,0xcc), - makecol(0x66,0x99,0xff), - makecol(0x99,0x99,0x00), - makecol(0x99,0x99,0x33), - makecol(0x99,0x99,0x66), - makecol(0x99,0x99,0x99), - makecol(0x99,0x99,0xcc), - makecol(0x99,0x99,0xff), - makecol(0xcc,0x99,0x00), - makecol(0xcc,0x99,0x33), - makecol(0xcc,0x99,0x66), - makecol(0xcc,0x99,0x99), - makecol(0xcc,0x99,0xcc), - makecol(0xcc,0x99,0xff), - makecol(0xff,0x99,0x00), - makecol(0xff,0x99,0x33), - makecol(0xff,0x99,0x66), - makecol(0xff,0x99,0x99), - makecol(0xff,0x99,0xcc), - makecol(0xff,0x99,0xff), - makecol(0x00,0xcc,0x00), - makecol(0x00,0xcc,0x33), - makecol(0x00,0xcc,0x66), - makecol(0x00,0xcc,0x99), - makecol(0x00,0xcc,0xcc), - makecol(0x00,0xcc,0xff), - makecol(0x33,0xcc,0x00), - makecol(0x33,0xcc,0x33), - makecol(0x33,0xcc,0x66), - makecol(0x33,0xcc,0x99), - makecol(0x33,0xcc,0xcc), - makecol(0x33,0xcc,0xff), - makecol(0x66,0xcc,0x00), - makecol(0x66,0xcc,0x33), - makecol(0x66,0xcc,0x66), - makecol(0x66,0xcc,0x99), - makecol(0x66,0xcc,0xcc), - makecol(0x66,0xcc,0xff), - makecol(0x99,0xcc,0x00), - makecol(0x99,0xcc,0x33), - makecol(0x99,0xcc,0x66), - makecol(0x99,0xcc,0x99), - makecol(0x99,0xcc,0xcc), - makecol(0x99,0xcc,0xff), - makecol(0xcc,0xcc,0x00), - makecol(0xcc,0xcc,0x33), - makecol(0xcc,0xcc,0x66), - makecol(0xcc,0xcc,0x99), - makecol(0xcc,0xcc,0xcc), - makecol(0xcc,0xcc,0xff), - makecol(0xff,0xcc,0x00), - makecol(0xff,0xcc,0x33), - makecol(0xff,0xcc,0x66), - makecol(0xff,0xcc,0x99), - makecol(0xff,0xcc,0xcc), - makecol(0xff,0xcc,0xff), - makecol(0x00,0xff,0x00), - makecol(0x00,0xff,0x33), - makecol(0x00,0xff,0x66), - makecol(0x00,0xff,0x99), - makecol(0x00,0xff,0xcc), - makecol(0x00,0xff,0xff), - makecol(0x33,0xff,0x00), - makecol(0x33,0xff,0x33), - makecol(0x33,0xff,0x66), - makecol(0x33,0xff,0x99), - makecol(0x33,0xff,0xcc), - makecol(0x33,0xff,0xff), - makecol(0x66,0xff,0x00), - makecol(0x66,0xff,0x33), - makecol(0x66,0xff,0x66), - makecol(0x66,0xff,0x99), - makecol(0x66,0xff,0xcc), - makecol(0x66,0xff,0xff), - makecol(0x99,0xff,0x00), - makecol(0x99,0xff,0x33), - makecol(0x99,0xff,0x66), - makecol(0x99,0xff,0x99), - makecol(0x99,0xff,0xcc), - makecol(0x99,0xff,0xff), - makecol(0xcc,0xff,0x00), - makecol(0xcc,0xff,0x33), - makecol(0xcc,0xff,0x66), - makecol(0xcc,0xff,0x99), - makecol(0xcc,0xff,0xcc), - makecol(0xcc,0xff,0xff), - makecol(0xff,0xff,0x00), - makecol(0xff,0xff,0x33), - makecol(0xff,0xff,0x66), - makecol(0xff,0xff,0x99), - makecol(0xff,0xff,0xcc), - makecol(0xff,0xff,0xff), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - makecol(0x00,0x00,0x00), - }, +{ + makecol(0x00, 0x00, 0x00), + makecol(0x11, 0x11, 0x11), + makecol(0x22, 0x22, 0x22), + makecol(0x33, 0x33, 0x33), + makecol(0x44, 0x44, 0x44), + makecol(0x55, 0x55, 0x55), + makecol(0x66, 0x66, 0x66), + makecol(0x77, 0x77, 0x77), + makecol(0x88, 0x88, 0x88), + makecol(0x99, 0x99, 0x99), + makecol(0xaa, 0xaa, 0xaa), + makecol(0xbb, 0xbb, 0xbb), + makecol(0xcc, 0xcc, 0xcc), + makecol(0xdd, 0xdd, 0xdd), + makecol(0xee, 0xee, 0xee), + makecol(0xff, 0xff, 0xff), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x22, 0x00), + makecol(0x00, 0x44, 0x00), + makecol(0x00, 0x66, 0x00), + makecol(0x00, 0x88, 0x00), + makecol(0x00, 0xaa, 0x00), + makecol(0x00, 0xcc, 0x00), + makecol(0x00, 0xee, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x22, 0xff, 0x22), + makecol(0x44, 0xff, 0x44), + makecol(0x66, 0xff, 0x66), + makecol(0x88, 0xff, 0x88), + makecol(0xaa, 0xff, 0xaa), + makecol(0xcc, 0xff, 0xcc), + makecol(0xee, 0xff, 0xee), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x22, 0x11), + makecol(0x00, 0x44, 0x22), + makecol(0x00, 0x66, 0x33), + makecol(0x00, 0x88, 0x44), + makecol(0x00, 0xaa, 0x55), + makecol(0x00, 0xcc, 0x66), + makecol(0x00, 0xee, 0x77), + makecol(0x00, 0xff, 0x88), + makecol(0x22, 0xff, 0x99), + makecol(0x44, 0xff, 0xaa), + makecol(0x66, 0xff, 0xbb), + makecol(0x88, 0xff, 0xcc), + makecol(0xaa, 0xff, 0xdd), + makecol(0xcc, 0xff, 0xee), + makecol(0xee, 0xff, 0xff), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x22, 0x22), + makecol(0x00, 0x44, 0x44), + makecol(0x00, 0x66, 0x66), + makecol(0x00, 0x88, 0x88), + makecol(0x00, 0xaa, 0xaa), + makecol(0x00, 0xcc, 0xcc), + makecol(0x00, 0xee, 0xee), + makecol(0x00, 0xff, 0xff), + makecol(0x22, 0xff, 0xff), + makecol(0x44, 0xff, 0xff), + makecol(0x66, 0xff, 0xff), + makecol(0x88, 0xff, 0xff), + makecol(0xaa, 0xff, 0xff), + makecol(0xcc, 0xff, 0xff), + makecol(0xee, 0xff, 0xff), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x11, 0x22), + makecol(0x00, 0x22, 0x44), + makecol(0x00, 0x33, 0x66), + makecol(0x00, 0x44, 0x88), + makecol(0x00, 0x55, 0xaa), + makecol(0x00, 0x66, 0xcc), + makecol(0x00, 0x77, 0xee), + makecol(0x00, 0x88, 0xff), + makecol(0x22, 0x99, 0xff), + makecol(0x44, 0xaa, 0xff), + makecol(0x66, 0xbb, 0xff), + makecol(0x88, 0xcc, 0xff), + makecol(0xaa, 0xdd, 0xff), + makecol(0xcc, 0xee, 0xff), + makecol(0xee, 0xff, 0xff), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x22), + makecol(0x00, 0x00, 0x44), + makecol(0x00, 0x00, 0x66), + makecol(0x00, 0x00, 0x88), + makecol(0x00, 0x00, 0xaa), + makecol(0x00, 0x00, 0xcc), + makecol(0x00, 0x00, 0xee), + makecol(0x00, 0x00, 0xff), + makecol(0x22, 0x22, 0xff), + makecol(0x44, 0x44, 0xff), + makecol(0x66, 0x66, 0xff), + makecol(0x88, 0x88, 0xff), + makecol(0xaa, 0xaa, 0xff), + makecol(0xcc, 0xcc, 0xff), + makecol(0xee, 0xee, 0xff), + makecol(0x00, 0x00, 0x00), + makecol(0x11, 0x00, 0x22), + makecol(0x22, 0x00, 0x44), + makecol(0x33, 0x00, 0x66), + makecol(0x44, 0x00, 0x88), + makecol(0x55, 0x00, 0xaa), + makecol(0x66, 0x00, 0xcc), + makecol(0x77, 0x00, 0xee), + makecol(0x88, 0x00, 0xff), + makecol(0x99, 0x22, 0xff), + makecol(0xaa, 0x44, 0xff), + makecol(0xbb, 0x66, 0xff), + makecol(0xcc, 0x88, 0xff), + makecol(0xdd, 0xaa, 0xff), + makecol(0xee, 0xcc, 0xff), + makecol(0xff, 0xee, 0xff), + makecol(0x00, 0x00, 0x00), + makecol(0x22, 0x00, 0x22), + makecol(0x44, 0x00, 0x44), + makecol(0x66, 0x00, 0x66), + makecol(0x88, 0x00, 0x88), + makecol(0xaa, 0x00, 0xaa), + makecol(0xcc, 0x00, 0xcc), + makecol(0xee, 0x00, 0xee), + makecol(0xff, 0x00, 0xff), + makecol(0xff, 0x22, 0xff), + makecol(0xff, 0x44, 0xff), + makecol(0xff, 0x66, 0xff), + makecol(0xff, 0x88, 0xff), + makecol(0xff, 0xaa, 0xff), + makecol(0xff, 0xcc, 0xff), + makecol(0xff, 0xee, 0xff), + makecol(0x00, 0x00, 0x00), + makecol(0x22, 0x00, 0x11), + makecol(0x44, 0x00, 0x22), + makecol(0x66, 0x00, 0x33), + makecol(0x88, 0x00, 0x44), + makecol(0xaa, 0x00, 0x55), + makecol(0xcc, 0x00, 0x66), + makecol(0xee, 0x00, 0x77), + makecol(0xff, 0x00, 0x88), + makecol(0xff, 0x22, 0x99), + makecol(0xff, 0x44, 0xaa), + makecol(0xff, 0x66, 0xbb), + makecol(0xff, 0x88, 0xcc), + makecol(0xff, 0xaa, 0xdd), + makecol(0xff, 0xcc, 0xee), + makecol(0xff, 0xee, 0xff), + makecol(0x00, 0x00, 0x00), + makecol(0x22, 0x00, 0x00), + makecol(0x44, 0x00, 0x00), + makecol(0x66, 0x00, 0x00), + makecol(0x88, 0x00, 0x00), + makecol(0xaa, 0x00, 0x00), + makecol(0xcc, 0x00, 0x00), + makecol(0xee, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x22, 0x22), + makecol(0xff, 0x44, 0x44), + makecol(0xff, 0x66, 0x66), + makecol(0xff, 0x88, 0x88), + makecol(0xff, 0xaa, 0xaa), + makecol(0xff, 0xcc, 0xcc), + makecol(0xff, 0xee, 0xee), + makecol(0x00, 0x00, 0x00), + makecol(0x22, 0x11, 0x00), + makecol(0x44, 0x22, 0x00), + makecol(0x66, 0x33, 0x00), + makecol(0x88, 0x44, 0x00), + makecol(0xaa, 0x55, 0x00), + makecol(0xcc, 0x66, 0x00), + makecol(0xee, 0x77, 0x00), + makecol(0xff, 0x88, 0x00), + makecol(0xff, 0x99, 0x22), + makecol(0xff, 0xaa, 0x44), + makecol(0xff, 0xbb, 0x66), + makecol(0xff, 0xcc, 0x88), + makecol(0xff, 0xdd, 0xaa), + makecol(0xff, 0xee, 0xcc), + makecol(0xff, 0xff, 0xee), + makecol(0x00, 0x00, 0x00), + makecol(0x22, 0x22, 0x00), + makecol(0x44, 0x44, 0x00), + makecol(0x66, 0x66, 0x00), + makecol(0x88, 0x88, 0x00), + makecol(0xaa, 0xaa, 0x00), + makecol(0xcc, 0xcc, 0x00), + makecol(0xee, 0xee, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x22), + makecol(0xff, 0xff, 0x44), + makecol(0xff, 0xff, 0x66), + makecol(0xff, 0xff, 0x88), + makecol(0xff, 0xff, 0xaa), + makecol(0xff, 0xff, 0xcc), + makecol(0xff, 0xff, 0xee), + makecol(0x00, 0x00, 0x00), + makecol(0x11, 0x22, 0x00), + makecol(0x22, 0x44, 0x00), + makecol(0x33, 0x66, 0x00), + makecol(0x44, 0x88, 0x00), + makecol(0x55, 0xaa, 0x00), + makecol(0x66, 0xcc, 0x00), + makecol(0x77, 0xee, 0x00), + makecol(0x88, 0xff, 0x00), + makecol(0x99, 0xff, 0x22), + makecol(0xaa, 0xff, 0x44), + makecol(0xbb, 0xff, 0x66), + makecol(0xcc, 0xff, 0x88), + makecol(0xdd, 0xff, 0xaa), + makecol(0xee, 0xff, 0xcc), + makecol(0xff, 0xff, 0xee), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x11, 0x00), + makecol(0x11, 0x33, 0x11), + makecol(0x11, 0x44, 0x11), + makecol(0x22, 0x66, 0x22), + makecol(0x22, 0x77, 0x22), + makecol(0x33, 0x99, 0x33), + makecol(0x33, 0xaa, 0x33), + makecol(0x44, 0xcc, 0x44), + makecol(0x55, 0xcc, 0x55), + makecol(0x77, 0xdd, 0x77), + makecol(0x88, 0xdd, 0x88), + makecol(0xaa, 0xee, 0xaa), + makecol(0xbb, 0xee, 0xbb), + makecol(0xdd, 0xff, 0xdd), + makecol(0xee, 0xff, 0xee), + makecol(0x00, 0x00, 0x00), + makecol(0x11, 0x00, 0x00), + makecol(0x33, 0x11, 0x11), + makecol(0x44, 0x11, 0x11), + makecol(0x66, 0x22, 0x22), + makecol(0x77, 0x22, 0x22), + makecol(0x99, 0x33, 0x33), + makecol(0xaa, 0x33, 0x33), + makecol(0xcc, 0x44, 0x44), + makecol(0xcc, 0x55, 0x55), + makecol(0xdd, 0x77, 0x77), + makecol(0xdd, 0x88, 0x88), + makecol(0xee, 0xaa, 0xaa), + makecol(0xee, 0xbb, 0xbb), + makecol(0xff, 0xdd, 0xdd), + makecol(0xff, 0xee, 0xee), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x11), + makecol(0x11, 0x11, 0x33), + makecol(0x11, 0x11, 0x44), + makecol(0x22, 0x22, 0x66), + makecol(0x22, 0x22, 0x77), + makecol(0x33, 0x33, 0x99), + makecol(0x33, 0x33, 0xaa), + makecol(0x44, 0x44, 0xcc), + makecol(0x55, 0x55, 0xcc), + makecol(0x77, 0x77, 0xdd), + makecol(0x88, 0x88, 0xdd), + makecol(0xaa, 0xaa, 0xee), + makecol(0xbb, 0xbb, 0xee), + makecol(0xdd, 0xdd, 0xff), + makecol(0xee, 0xee, 0xff), +}, + /* Palette 1: 16-colour palette */ + { + makecol(0x88, 0x66, 0xdd), + makecol(0x00, 0x00, 0x00), + makecol(0x44, 0x77, 0x22), + makecol(0x77, 0xaa, 0x44), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x99, 0xee, 0x66), + makecol(0x77, 0x77, 0x77), + makecol(0xff, 0xff, 0xff), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x44, 0x77, 0x22), + makecol(0x44, 0x77, 0x22), + makecol(0x44, 0x77, 0x22), + makecol(0x44, 0x77, 0x22), + makecol(0x44, 0x77, 0x22), + makecol(0x44, 0x77, 0x22), + makecol(0x44, 0x77, 0x22), + makecol(0x44, 0x77, 0x22), + makecol(0x44, 0x77, 0x22), + makecol(0x44, 0x77, 0x22), + makecol(0x44, 0x77, 0x22), + makecol(0x44, 0x77, 0x22), + makecol(0x44, 0x77, 0x22), + makecol(0x44, 0x77, 0x22), + makecol(0x44, 0x77, 0x22), + makecol(0x44, 0x77, 0x22), + makecol(0x77, 0xaa, 0x44), + makecol(0x77, 0xaa, 0x44), + makecol(0x77, 0xaa, 0x44), + makecol(0x77, 0xaa, 0x44), + makecol(0x77, 0xaa, 0x44), + makecol(0x77, 0xaa, 0x44), + makecol(0x77, 0xaa, 0x44), + makecol(0x77, 0xaa, 0x44), + makecol(0x77, 0xaa, 0x44), + makecol(0x77, 0xaa, 0x44), + makecol(0x77, 0xaa, 0x44), + makecol(0x77, 0xaa, 0x44), + makecol(0x77, 0xaa, 0x44), + makecol(0x77, 0xaa, 0x44), + makecol(0x77, 0xaa, 0x44), + makecol(0x77, 0xaa, 0x44), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x77), + makecol(0x99, 0xee, 0x66), + makecol(0x99, 0xee, 0x66), + makecol(0x99, 0xee, 0x66), + makecol(0x99, 0xee, 0x66), + makecol(0x99, 0xee, 0x66), + makecol(0x99, 0xee, 0x66), + makecol(0x99, 0xee, 0x66), + makecol(0x99, 0xee, 0x66), + makecol(0x99, 0xee, 0x66), + makecol(0x99, 0xee, 0x66), + makecol(0x99, 0xee, 0x66), + makecol(0x99, 0xee, 0x66), + makecol(0x99, 0xee, 0x66), + makecol(0x99, 0xee, 0x66), + makecol(0x99, 0xee, 0x66), + makecol(0x99, 0xee, 0x66), + makecol(0x77, 0x77, 0x77), + makecol(0x77, 0x77, 0x77), + makecol(0x77, 0x77, 0x77), + makecol(0x77, 0x77, 0x77), + makecol(0x77, 0x77, 0x77), + makecol(0x77, 0x77, 0x77), + makecol(0x77, 0x77, 0x77), + makecol(0x77, 0x77, 0x77), + makecol(0x77, 0x77, 0x77), + makecol(0x77, 0x77, 0x77), + makecol(0x77, 0x77, 0x77), + makecol(0x77, 0x77, 0x77), + makecol(0x77, 0x77, 0x77), + makecol(0x77, 0x77, 0x77), + makecol(0x77, 0x77, 0x77), + makecol(0x77, 0x77, 0x77), + makecol(0xff, 0xff, 0xff), + makecol(0xff, 0xff, 0xff), + makecol(0xff, 0xff, 0xff), + makecol(0xff, 0xff, 0xff), + makecol(0xff, 0xff, 0xff), + makecol(0xff, 0xff, 0xff), + makecol(0xff, 0xff, 0xff), + makecol(0xff, 0xff, 0xff), + makecol(0xff, 0xff, 0xff), + makecol(0xff, 0xff, 0xff), + makecol(0xff, 0xff, 0xff), + makecol(0xff, 0xff, 0xff), + makecol(0xff, 0xff, 0xff), + makecol(0xff, 0xff, 0xff), + makecol(0xff, 0xff, 0xff), + makecol(0xff, 0xff, 0xff), + }, + /* Palette 2: 2-3-3 truecolour */ + { + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x33), + makecol(0x00, 0x00, 0x55), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x99), + makecol(0x00, 0x00, 0xbb), + makecol(0x00, 0x00, 0xdd), + makecol(0x00, 0x00, 0xff), + makecol(0x33, 0x00, 0x00), + makecol(0x33, 0x00, 0x33), + makecol(0x33, 0x00, 0x55), + makecol(0x33, 0x00, 0x77), + makecol(0x33, 0x00, 0x99), + makecol(0x33, 0x00, 0xbb), + makecol(0x33, 0x00, 0xdd), + makecol(0x33, 0x00, 0xff), + makecol(0x55, 0x00, 0x00), + makecol(0x55, 0x00, 0x33), + makecol(0x55, 0x00, 0x55), + makecol(0x55, 0x00, 0x77), + makecol(0x55, 0x00, 0x99), + makecol(0x55, 0x00, 0xbb), + makecol(0x55, 0x00, 0xdd), + makecol(0x55, 0x00, 0xff), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x33), + makecol(0x77, 0x00, 0x55), + makecol(0x77, 0x00, 0x77), + makecol(0x77, 0x00, 0x99), + makecol(0x77, 0x00, 0xbb), + makecol(0x77, 0x00, 0xdd), + makecol(0x77, 0x00, 0xff), + makecol(0x99, 0x00, 0x00), + makecol(0x99, 0x00, 0x33), + makecol(0x99, 0x00, 0x55), + makecol(0x99, 0x00, 0x77), + makecol(0x99, 0x00, 0x99), + makecol(0x99, 0x00, 0xbb), + makecol(0x99, 0x00, 0xdd), + makecol(0x99, 0x00, 0xff), + makecol(0xbb, 0x00, 0x00), + makecol(0xbb, 0x00, 0x33), + makecol(0xbb, 0x00, 0x55), + makecol(0xbb, 0x00, 0x77), + makecol(0xbb, 0x00, 0x99), + makecol(0xbb, 0x00, 0xbb), + makecol(0xbb, 0x00, 0xdd), + makecol(0xbb, 0x00, 0xff), + makecol(0xdd, 0x00, 0x00), + makecol(0xdd, 0x00, 0x33), + makecol(0xdd, 0x00, 0x55), + makecol(0xdd, 0x00, 0x77), + makecol(0xdd, 0x00, 0x99), + makecol(0xdd, 0x00, 0xbb), + makecol(0xdd, 0x00, 0xdd), + makecol(0xdd, 0x00, 0xff), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x33), + makecol(0xff, 0x00, 0x55), + makecol(0xff, 0x00, 0x77), + makecol(0xff, 0x00, 0x99), + makecol(0xff, 0x00, 0xbb), + makecol(0xff, 0x00, 0xdd), + makecol(0xff, 0x00, 0xff), + makecol(0x00, 0x55, 0x00), + makecol(0x00, 0x55, 0x33), + makecol(0x00, 0x55, 0x55), + makecol(0x00, 0x55, 0x77), + makecol(0x00, 0x55, 0x99), + makecol(0x00, 0x55, 0xbb), + makecol(0x00, 0x55, 0xdd), + makecol(0x00, 0x55, 0xff), + makecol(0x33, 0x55, 0x00), + makecol(0x33, 0x55, 0x33), + makecol(0x33, 0x55, 0x55), + makecol(0x33, 0x55, 0x77), + makecol(0x33, 0x55, 0x99), + makecol(0x33, 0x55, 0xbb), + makecol(0x33, 0x55, 0xdd), + makecol(0x33, 0x55, 0xff), + makecol(0x55, 0x55, 0x00), + makecol(0x55, 0x55, 0x33), + makecol(0x55, 0x55, 0x55), + makecol(0x55, 0x55, 0x77), + makecol(0x55, 0x55, 0x99), + makecol(0x55, 0x55, 0xbb), + makecol(0x55, 0x55, 0xdd), + makecol(0x55, 0x55, 0xff), + makecol(0x77, 0x55, 0x00), + makecol(0x77, 0x55, 0x33), + makecol(0x77, 0x55, 0x55), + makecol(0x77, 0x55, 0x77), + makecol(0x77, 0x55, 0x99), + makecol(0x77, 0x55, 0xbb), + makecol(0x77, 0x55, 0xdd), + makecol(0x77, 0x55, 0xff), + makecol(0x99, 0x55, 0x00), + makecol(0x99, 0x55, 0x33), + makecol(0x99, 0x55, 0x55), + makecol(0x99, 0x55, 0x77), + makecol(0x99, 0x55, 0x99), + makecol(0x99, 0x55, 0xbb), + makecol(0x99, 0x55, 0xdd), + makecol(0x99, 0x55, 0xff), + makecol(0xbb, 0x55, 0x00), + makecol(0xbb, 0x55, 0x33), + makecol(0xbb, 0x55, 0x55), + makecol(0xbb, 0x55, 0x77), + makecol(0xbb, 0x55, 0x99), + makecol(0xbb, 0x55, 0xbb), + makecol(0xbb, 0x55, 0xdd), + makecol(0xbb, 0x55, 0xff), + makecol(0xdd, 0x55, 0x00), + makecol(0xdd, 0x55, 0x33), + makecol(0xdd, 0x55, 0x55), + makecol(0xdd, 0x55, 0x77), + makecol(0xdd, 0x55, 0x99), + makecol(0xdd, 0x55, 0xbb), + makecol(0xdd, 0x55, 0xdd), + makecol(0xdd, 0x55, 0xff), + makecol(0xff, 0x55, 0x00), + makecol(0xff, 0x55, 0x33), + makecol(0xff, 0x55, 0x55), + makecol(0xff, 0x55, 0x77), + makecol(0xff, 0x55, 0x99), + makecol(0xff, 0x55, 0xbb), + makecol(0xff, 0x55, 0xdd), + makecol(0xff, 0x55, 0xff), + makecol(0x00, 0xaa, 0x00), + makecol(0x00, 0xaa, 0x33), + makecol(0x00, 0xaa, 0x55), + makecol(0x00, 0xaa, 0x77), + makecol(0x00, 0xaa, 0x99), + makecol(0x00, 0xaa, 0xbb), + makecol(0x00, 0xaa, 0xdd), + makecol(0x00, 0xaa, 0xff), + makecol(0x33, 0xaa, 0x00), + makecol(0x33, 0xaa, 0x33), + makecol(0x33, 0xaa, 0x55), + makecol(0x33, 0xaa, 0x77), + makecol(0x33, 0xaa, 0x99), + makecol(0x33, 0xaa, 0xbb), + makecol(0x33, 0xaa, 0xdd), + makecol(0x33, 0xaa, 0xff), + makecol(0x55, 0xaa, 0x00), + makecol(0x55, 0xaa, 0x33), + makecol(0x55, 0xaa, 0x55), + makecol(0x55, 0xaa, 0x77), + makecol(0x55, 0xaa, 0x99), + makecol(0x55, 0xaa, 0xbb), + makecol(0x55, 0xaa, 0xdd), + makecol(0x55, 0xaa, 0xff), + makecol(0x77, 0xaa, 0x00), + makecol(0x77, 0xaa, 0x33), + makecol(0x77, 0xaa, 0x55), + makecol(0x77, 0xaa, 0x77), + makecol(0x77, 0xaa, 0x99), + makecol(0x77, 0xaa, 0xbb), + makecol(0x77, 0xaa, 0xdd), + makecol(0x77, 0xaa, 0xff), + makecol(0x99, 0xaa, 0x00), + makecol(0x99, 0xaa, 0x33), + makecol(0x99, 0xaa, 0x55), + makecol(0x99, 0xaa, 0x77), + makecol(0x99, 0xaa, 0x99), + makecol(0x99, 0xaa, 0xbb), + makecol(0x99, 0xaa, 0xdd), + makecol(0x99, 0xaa, 0xff), + makecol(0xbb, 0xaa, 0x00), + makecol(0xbb, 0xaa, 0x33), + makecol(0xbb, 0xaa, 0x55), + makecol(0xbb, 0xaa, 0x77), + makecol(0xbb, 0xaa, 0x99), + makecol(0xbb, 0xaa, 0xbb), + makecol(0xbb, 0xaa, 0xdd), + makecol(0xbb, 0xaa, 0xff), + makecol(0xdd, 0xaa, 0x00), + makecol(0xdd, 0xaa, 0x33), + makecol(0xdd, 0xaa, 0x55), + makecol(0xdd, 0xaa, 0x77), + makecol(0xdd, 0xaa, 0x99), + makecol(0xdd, 0xaa, 0xbb), + makecol(0xdd, 0xaa, 0xdd), + makecol(0xdd, 0xaa, 0xff), + makecol(0xff, 0xaa, 0x00), + makecol(0xff, 0xaa, 0x33), + makecol(0xff, 0xaa, 0x55), + makecol(0xff, 0xaa, 0x77), + makecol(0xff, 0xaa, 0x99), + makecol(0xff, 0xaa, 0xbb), + makecol(0xff, 0xaa, 0xdd), + makecol(0xff, 0xaa, 0xee), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x33), + makecol(0x00, 0xff, 0x55), + makecol(0x00, 0xff, 0x77), + makecol(0x00, 0xff, 0x99), + makecol(0x00, 0xff, 0xbb), + makecol(0x00, 0xff, 0xdd), + makecol(0x00, 0xff, 0xff), + makecol(0x33, 0xff, 0x00), + makecol(0x33, 0xff, 0x33), + makecol(0x33, 0xff, 0x55), + makecol(0x33, 0xff, 0x77), + makecol(0x33, 0xff, 0x99), + makecol(0x33, 0xff, 0xbb), + makecol(0x33, 0xff, 0xdd), + makecol(0x33, 0xff, 0xff), + makecol(0x55, 0xff, 0x00), + makecol(0x55, 0xff, 0x33), + makecol(0x55, 0xff, 0x55), + makecol(0x55, 0xff, 0x77), + makecol(0x55, 0xff, 0x99), + makecol(0x55, 0xff, 0xbb), + makecol(0x55, 0xff, 0xdd), + makecol(0x55, 0xff, 0xff), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x33), + makecol(0x77, 0xff, 0x55), + makecol(0x77, 0xff, 0x77), + makecol(0x77, 0xff, 0x99), + makecol(0x77, 0xff, 0xbb), + makecol(0x77, 0xff, 0xdd), + makecol(0x77, 0xff, 0xff), + makecol(0x99, 0xff, 0x00), + makecol(0x99, 0xff, 0x33), + makecol(0x99, 0xff, 0x55), + makecol(0x99, 0xff, 0x77), + makecol(0x99, 0xff, 0x99), + makecol(0x99, 0xff, 0xbb), + makecol(0x99, 0xff, 0xdd), + makecol(0x99, 0xff, 0xff), + makecol(0xbb, 0xff, 0x00), + makecol(0xbb, 0xff, 0x33), + makecol(0xbb, 0xff, 0x55), + makecol(0xbb, 0xff, 0x77), + makecol(0xbb, 0xff, 0x99), + makecol(0xbb, 0xff, 0xbb), + makecol(0xbb, 0xff, 0xdd), + makecol(0xbb, 0xff, 0xff), + makecol(0xdd, 0xff, 0x00), + makecol(0xdd, 0xff, 0x33), + makecol(0xdd, 0xff, 0x55), + makecol(0xdd, 0xff, 0x77), + makecol(0xdd, 0xff, 0x99), + makecol(0xdd, 0xff, 0xbb), + makecol(0xdd, 0xff, 0xdd), + makecol(0xdd, 0xff, 0xff), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x33), + makecol(0xff, 0xff, 0x55), + makecol(0xff, 0xff, 0x77), + makecol(0xff, 0xff, 0x99), + makecol(0xff, 0xff, 0xbb), + makecol(0xff, 0xff, 0xdd), + makecol(0xff, 0xff, 0xff), + }, + /* Palette 3: 3-2-3 truecolour */ + { + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x33), + makecol(0x00, 0x00, 0x55), + makecol(0x00, 0x00, 0x77), + makecol(0x00, 0x00, 0x99), + makecol(0x00, 0x00, 0xbb), + makecol(0x00, 0x00, 0xdd), + makecol(0x00, 0x00, 0xff), + makecol(0x55, 0x00, 0x00), + makecol(0x55, 0x00, 0x33), + makecol(0x55, 0x00, 0x55), + makecol(0x55, 0x00, 0x77), + makecol(0x55, 0x00, 0x99), + makecol(0x55, 0x00, 0xbb), + makecol(0x55, 0x00, 0xdd), + makecol(0x55, 0x00, 0xff), + makecol(0xaa, 0x00, 0x00), + makecol(0xaa, 0x00, 0x33), + makecol(0xaa, 0x00, 0x55), + makecol(0xaa, 0x00, 0x77), + makecol(0xaa, 0x00, 0x99), + makecol(0xaa, 0x00, 0xbb), + makecol(0xaa, 0x00, 0xdd), + makecol(0xaa, 0x00, 0xff), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x33), + makecol(0xff, 0x00, 0x55), + makecol(0xff, 0x00, 0x77), + makecol(0xff, 0x00, 0x99), + makecol(0xff, 0x00, 0xbb), + makecol(0xff, 0x00, 0xdd), + makecol(0xff, 0x00, 0xff), + makecol(0x00, 0x33, 0x00), + makecol(0x00, 0x33, 0x33), + makecol(0x00, 0x33, 0x55), + makecol(0x00, 0x33, 0x77), + makecol(0x00, 0x33, 0x99), + makecol(0x00, 0x33, 0xbb), + makecol(0x00, 0x33, 0xdd), + makecol(0x00, 0x33, 0xff), + makecol(0x55, 0x33, 0x00), + makecol(0x55, 0x33, 0x33), + makecol(0x55, 0x33, 0x55), + makecol(0x55, 0x33, 0x77), + makecol(0x55, 0x33, 0x99), + makecol(0x55, 0x33, 0xbb), + makecol(0x55, 0x33, 0xdd), + makecol(0x55, 0x33, 0xff), + makecol(0xaa, 0x33, 0x00), + makecol(0xaa, 0x33, 0x33), + makecol(0xaa, 0x33, 0x55), + makecol(0xaa, 0x33, 0x77), + makecol(0xaa, 0x33, 0x99), + makecol(0xaa, 0x33, 0xbb), + makecol(0xaa, 0x33, 0xdd), + makecol(0xaa, 0x33, 0xff), + makecol(0xff, 0x33, 0x00), + makecol(0xff, 0x33, 0x33), + makecol(0xff, 0x33, 0x55), + makecol(0xff, 0x33, 0x77), + makecol(0xff, 0x33, 0x99), + makecol(0xff, 0x33, 0xbb), + makecol(0xff, 0x33, 0xdd), + makecol(0xff, 0x33, 0xff), + makecol(0x00, 0x55, 0x00), + makecol(0x00, 0x55, 0x33), + makecol(0x00, 0x55, 0x55), + makecol(0x00, 0x55, 0x77), + makecol(0x00, 0x55, 0x99), + makecol(0x00, 0x55, 0xbb), + makecol(0x00, 0x55, 0xdd), + makecol(0x00, 0x55, 0xff), + makecol(0x55, 0x55, 0x00), + makecol(0x55, 0x55, 0x33), + makecol(0x55, 0x55, 0x55), + makecol(0x55, 0x55, 0x77), + makecol(0x55, 0x55, 0x99), + makecol(0x55, 0x55, 0xbb), + makecol(0x55, 0x55, 0xdd), + makecol(0x55, 0x55, 0xff), + makecol(0xaa, 0x55, 0x00), + makecol(0xaa, 0x55, 0x33), + makecol(0xaa, 0x55, 0x55), + makecol(0xaa, 0x55, 0x77), + makecol(0xaa, 0x55, 0x99), + makecol(0xaa, 0x55, 0xbb), + makecol(0xaa, 0x55, 0xdd), + makecol(0xaa, 0x55, 0xff), + makecol(0xff, 0x55, 0x00), + makecol(0xff, 0x55, 0x33), + makecol(0xff, 0x55, 0x55), + makecol(0xff, 0x55, 0x77), + makecol(0xff, 0x55, 0x99), + makecol(0xff, 0x55, 0xbb), + makecol(0xff, 0x55, 0xdd), + makecol(0xff, 0x55, 0xff), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x33), + makecol(0x00, 0x77, 0x55), + makecol(0x00, 0x77, 0x77), + makecol(0x00, 0x77, 0x99), + makecol(0x00, 0x77, 0xbb), + makecol(0x00, 0x77, 0xdd), + makecol(0x00, 0x77, 0xff), + makecol(0x55, 0x77, 0x00), + makecol(0x55, 0x77, 0x33), + makecol(0x55, 0x77, 0x55), + makecol(0x55, 0x77, 0x77), + makecol(0x55, 0x77, 0x99), + makecol(0x55, 0x77, 0xbb), + makecol(0x55, 0x77, 0xdd), + makecol(0x55, 0x77, 0xff), + makecol(0xaa, 0x77, 0x00), + makecol(0xaa, 0x77, 0x33), + makecol(0xaa, 0x77, 0x55), + makecol(0xaa, 0x77, 0x77), + makecol(0xaa, 0x77, 0x99), + makecol(0xaa, 0x77, 0xbb), + makecol(0xaa, 0x77, 0xdd), + makecol(0xaa, 0x77, 0xff), + makecol(0xff, 0x77, 0x00), + makecol(0xff, 0x77, 0x33), + makecol(0xff, 0x77, 0x55), + makecol(0xff, 0x77, 0x77), + makecol(0xff, 0x77, 0x99), + makecol(0xff, 0x77, 0xbb), + makecol(0xff, 0x77, 0xdd), + makecol(0xff, 0x77, 0xff), + makecol(0x00, 0x99, 0x00), + makecol(0x00, 0x99, 0x33), + makecol(0x00, 0x99, 0x55), + makecol(0x00, 0x99, 0x77), + makecol(0x00, 0x99, 0x99), + makecol(0x00, 0x99, 0xbb), + makecol(0x00, 0x99, 0xdd), + makecol(0x00, 0x99, 0xff), + makecol(0x55, 0x99, 0x00), + makecol(0x55, 0x99, 0x33), + makecol(0x55, 0x99, 0x55), + makecol(0x55, 0x99, 0x77), + makecol(0x55, 0x99, 0x99), + makecol(0x55, 0x99, 0xbb), + makecol(0x55, 0x99, 0xdd), + makecol(0x55, 0x99, 0xff), + makecol(0xaa, 0x99, 0x00), + makecol(0xaa, 0x99, 0x33), + makecol(0xaa, 0x99, 0x55), + makecol(0xaa, 0x99, 0x77), + makecol(0xaa, 0x99, 0x99), + makecol(0xaa, 0x99, 0xbb), + makecol(0xaa, 0x99, 0xdd), + makecol(0xaa, 0x99, 0xff), + makecol(0xff, 0x99, 0x00), + makecol(0xff, 0x99, 0x33), + makecol(0xff, 0x99, 0x55), + makecol(0xff, 0x99, 0x77), + makecol(0xff, 0x99, 0x99), + makecol(0xff, 0x99, 0xbb), + makecol(0xff, 0x99, 0xdd), + makecol(0xff, 0x99, 0xff), + makecol(0x00, 0xbb, 0x00), + makecol(0x00, 0xbb, 0x33), + makecol(0x00, 0xbb, 0x55), + makecol(0x00, 0xbb, 0x77), + makecol(0x00, 0xbb, 0x99), + makecol(0x00, 0xbb, 0xbb), + makecol(0x00, 0xbb, 0xdd), + makecol(0x00, 0xbb, 0xff), + makecol(0x55, 0xbb, 0x00), + makecol(0x55, 0xbb, 0x33), + makecol(0x55, 0xbb, 0x55), + makecol(0x55, 0xbb, 0x77), + makecol(0x55, 0xbb, 0x99), + makecol(0x55, 0xbb, 0xbb), + makecol(0x55, 0xbb, 0xdd), + makecol(0x55, 0xbb, 0xff), + makecol(0xaa, 0xbb, 0x00), + makecol(0xaa, 0xbb, 0x33), + makecol(0xaa, 0xbb, 0x55), + makecol(0xaa, 0xbb, 0x77), + makecol(0xaa, 0xbb, 0x99), + makecol(0xaa, 0xbb, 0xbb), + makecol(0xaa, 0xbb, 0xdd), + makecol(0xaa, 0xbb, 0xff), + makecol(0xff, 0xbb, 0x00), + makecol(0xff, 0xbb, 0x33), + makecol(0xff, 0xbb, 0x55), + makecol(0xff, 0xbb, 0x77), + makecol(0xff, 0xbb, 0x99), + makecol(0xff, 0xbb, 0xbb), + makecol(0xff, 0xbb, 0xdd), + makecol(0xff, 0xbb, 0xff), + makecol(0x00, 0xdd, 0x00), + makecol(0x00, 0xdd, 0x33), + makecol(0x00, 0xdd, 0x55), + makecol(0x00, 0xdd, 0x77), + makecol(0x00, 0xdd, 0x99), + makecol(0x00, 0xdd, 0xbb), + makecol(0x00, 0xdd, 0xdd), + makecol(0x00, 0xdd, 0xff), + makecol(0x55, 0xdd, 0x00), + makecol(0x55, 0xdd, 0x33), + makecol(0x55, 0xdd, 0x55), + makecol(0x55, 0xdd, 0x77), + makecol(0x55, 0xdd, 0x99), + makecol(0x55, 0xdd, 0xbb), + makecol(0x55, 0xdd, 0xdd), + makecol(0x55, 0xdd, 0xff), + makecol(0xaa, 0xdd, 0x00), + makecol(0xaa, 0xdd, 0x33), + makecol(0xaa, 0xdd, 0x55), + makecol(0xaa, 0xdd, 0x77), + makecol(0xaa, 0xdd, 0x99), + makecol(0xaa, 0xdd, 0xbb), + makecol(0xaa, 0xdd, 0xdd), + makecol(0xaa, 0xdd, 0xff), + makecol(0xff, 0xdd, 0x00), + makecol(0xff, 0xdd, 0x33), + makecol(0xff, 0xdd, 0x55), + makecol(0xff, 0xdd, 0x77), + makecol(0xff, 0xdd, 0x99), + makecol(0xff, 0xdd, 0xbb), + makecol(0xff, 0xdd, 0xdd), + makecol(0xff, 0xdd, 0xff), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x33), + makecol(0x00, 0xff, 0x55), + makecol(0x00, 0xff, 0x77), + makecol(0x00, 0xff, 0x99), + makecol(0x00, 0xff, 0xbb), + makecol(0x00, 0xff, 0xdd), + makecol(0x00, 0xff, 0xff), + makecol(0x55, 0xff, 0x00), + makecol(0x55, 0xff, 0x33), + makecol(0x55, 0xff, 0x55), + makecol(0x55, 0xff, 0x77), + makecol(0x55, 0xff, 0x99), + makecol(0x55, 0xff, 0xbb), + makecol(0x55, 0xff, 0xdd), + makecol(0x55, 0xff, 0xff), + makecol(0xaa, 0xff, 0x00), + makecol(0xaa, 0xff, 0x33), + makecol(0xaa, 0xff, 0x55), + makecol(0xaa, 0xff, 0x77), + makecol(0xaa, 0xff, 0x99), + makecol(0xaa, 0xff, 0xbb), + makecol(0xaa, 0xff, 0xdd), + makecol(0xaa, 0xff, 0xff), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x33), + makecol(0xff, 0xff, 0x55), + makecol(0xff, 0xff, 0x77), + makecol(0xff, 0xff, 0x99), + makecol(0xff, 0xff, 0xbb), + makecol(0xff, 0xff, 0xdd), + makecol(0xff, 0xff, 0xff), + }, + /* Palette 4: 3-3-2 truecolour */ + { + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x55), + makecol(0x00, 0x00, 0xaa), + makecol(0x00, 0x00, 0xff), + makecol(0x00, 0x33, 0x00), + makecol(0x00, 0x33, 0x55), + makecol(0x00, 0x33, 0xaa), + makecol(0x00, 0x33, 0xff), + makecol(0x00, 0x55, 0x00), + makecol(0x00, 0x55, 0x55), + makecol(0x00, 0x55, 0xaa), + makecol(0x00, 0x55, 0xff), + makecol(0x00, 0x77, 0x00), + makecol(0x00, 0x77, 0x55), + makecol(0x00, 0x77, 0xaa), + makecol(0x00, 0x77, 0xff), + makecol(0x00, 0x99, 0x00), + makecol(0x00, 0x99, 0x55), + makecol(0x00, 0x99, 0xaa), + makecol(0x00, 0x99, 0xff), + makecol(0x00, 0xbb, 0x00), + makecol(0x00, 0xbb, 0x55), + makecol(0x00, 0xbb, 0xaa), + makecol(0x00, 0xbb, 0xff), + makecol(0x00, 0xdd, 0x00), + makecol(0x00, 0xdd, 0x55), + makecol(0x00, 0xdd, 0xaa), + makecol(0x00, 0xdd, 0xff), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x55), + makecol(0x00, 0xff, 0xaa), + makecol(0x00, 0xff, 0xff), + makecol(0x33, 0x00, 0x00), + makecol(0x33, 0x00, 0x55), + makecol(0x33, 0x00, 0xaa), + makecol(0x33, 0x00, 0xff), + makecol(0x33, 0x33, 0x00), + makecol(0x33, 0x33, 0x55), + makecol(0x33, 0x33, 0xaa), + makecol(0x33, 0x33, 0xff), + makecol(0x33, 0x55, 0x00), + makecol(0x33, 0x55, 0x55), + makecol(0x33, 0x55, 0xaa), + makecol(0x33, 0x55, 0xff), + makecol(0x33, 0x77, 0x00), + makecol(0x33, 0x77, 0x55), + makecol(0x33, 0x77, 0xaa), + makecol(0x33, 0x77, 0xff), + makecol(0x33, 0x99, 0x00), + makecol(0x33, 0x99, 0x55), + makecol(0x33, 0x99, 0xaa), + makecol(0x33, 0x99, 0xff), + makecol(0x33, 0xbb, 0x00), + makecol(0x33, 0xbb, 0x55), + makecol(0x33, 0xbb, 0xaa), + makecol(0x33, 0xbb, 0xff), + makecol(0x33, 0xdd, 0x00), + makecol(0x33, 0xdd, 0x55), + makecol(0x33, 0xdd, 0xaa), + makecol(0x33, 0xdd, 0xff), + makecol(0x33, 0xff, 0x00), + makecol(0x33, 0xff, 0x55), + makecol(0x33, 0xff, 0xaa), + makecol(0x33, 0xff, 0xff), + makecol(0x55, 0x00, 0x00), + makecol(0x55, 0x00, 0x55), + makecol(0x55, 0x00, 0xaa), + makecol(0x55, 0x00, 0xff), + makecol(0x55, 0x33, 0x00), + makecol(0x55, 0x33, 0x55), + makecol(0x55, 0x33, 0xaa), + makecol(0x55, 0x33, 0xff), + makecol(0x55, 0x55, 0x00), + makecol(0x55, 0x55, 0x55), + makecol(0x55, 0x55, 0xaa), + makecol(0x55, 0x55, 0xff), + makecol(0x55, 0x77, 0x00), + makecol(0x55, 0x77, 0x55), + makecol(0x55, 0x77, 0xaa), + makecol(0x55, 0x77, 0xff), + makecol(0x55, 0x99, 0x00), + makecol(0x55, 0x99, 0x55), + makecol(0x55, 0x99, 0xaa), + makecol(0x55, 0x99, 0xff), + makecol(0x55, 0xbb, 0x00), + makecol(0x55, 0xbb, 0x55), + makecol(0x55, 0xbb, 0xaa), + makecol(0x55, 0xbb, 0xff), + makecol(0x55, 0xdd, 0x00), + makecol(0x55, 0xdd, 0x55), + makecol(0x55, 0xdd, 0xaa), + makecol(0x55, 0xdd, 0xff), + makecol(0x55, 0xff, 0x00), + makecol(0x55, 0xff, 0x55), + makecol(0x55, 0xff, 0xaa), + makecol(0x55, 0xff, 0xff), + makecol(0x77, 0x00, 0x00), + makecol(0x77, 0x00, 0x55), + makecol(0x77, 0x00, 0xaa), + makecol(0x77, 0x00, 0xff), + makecol(0x77, 0x33, 0x00), + makecol(0x77, 0x33, 0x55), + makecol(0x77, 0x33, 0xaa), + makecol(0x77, 0x33, 0xff), + makecol(0x77, 0x55, 0x00), + makecol(0x77, 0x55, 0x55), + makecol(0x77, 0x55, 0xaa), + makecol(0x77, 0x55, 0xff), + makecol(0x77, 0x77, 0x00), + makecol(0x77, 0x77, 0x55), + makecol(0x77, 0x77, 0xaa), + makecol(0x77, 0x77, 0xff), + makecol(0x77, 0x99, 0x00), + makecol(0x77, 0x99, 0x55), + makecol(0x77, 0x99, 0xaa), + makecol(0x77, 0x99, 0xff), + makecol(0x77, 0xbb, 0x00), + makecol(0x77, 0xbb, 0x55), + makecol(0x77, 0xbb, 0xaa), + makecol(0x77, 0xbb, 0xff), + makecol(0x77, 0xdd, 0x00), + makecol(0x77, 0xdd, 0x55), + makecol(0x77, 0xdd, 0xaa), + makecol(0x77, 0xdd, 0xff), + makecol(0x77, 0xff, 0x00), + makecol(0x77, 0xff, 0x55), + makecol(0x77, 0xff, 0xaa), + makecol(0x77, 0xff, 0xff), + makecol(0x99, 0x00, 0x00), + makecol(0x99, 0x00, 0x55), + makecol(0x99, 0x00, 0xaa), + makecol(0x99, 0x00, 0xff), + makecol(0x99, 0x33, 0x00), + makecol(0x99, 0x33, 0x55), + makecol(0x99, 0x33, 0xaa), + makecol(0x99, 0x33, 0xff), + makecol(0x99, 0x55, 0x00), + makecol(0x99, 0x55, 0x55), + makecol(0x99, 0x55, 0xaa), + makecol(0x99, 0x55, 0xff), + makecol(0x99, 0x77, 0x00), + makecol(0x99, 0x77, 0x55), + makecol(0x99, 0x77, 0xaa), + makecol(0x99, 0x77, 0xff), + makecol(0x99, 0x99, 0x00), + makecol(0x99, 0x99, 0x55), + makecol(0x99, 0x99, 0xaa), + makecol(0x99, 0x99, 0xff), + makecol(0x99, 0xbb, 0x00), + makecol(0x99, 0xbb, 0x55), + makecol(0x99, 0xbb, 0xaa), + makecol(0x99, 0xbb, 0xff), + makecol(0x99, 0xdd, 0x00), + makecol(0x99, 0xdd, 0x55), + makecol(0x99, 0xdd, 0xaa), + makecol(0x99, 0xdd, 0xff), + makecol(0x99, 0xff, 0x00), + makecol(0x99, 0xff, 0x55), + makecol(0x99, 0xff, 0xaa), + makecol(0x99, 0xff, 0xff), + makecol(0xbb, 0x00, 0x00), + makecol(0xbb, 0x00, 0x55), + makecol(0xbb, 0x00, 0xaa), + makecol(0xbb, 0x00, 0xff), + makecol(0xbb, 0x33, 0x00), + makecol(0xbb, 0x33, 0x55), + makecol(0xbb, 0x33, 0xaa), + makecol(0xbb, 0x33, 0xff), + makecol(0xbb, 0x55, 0x00), + makecol(0xbb, 0x55, 0x55), + makecol(0xbb, 0x55, 0xaa), + makecol(0xbb, 0x55, 0xff), + makecol(0xbb, 0x77, 0x00), + makecol(0xbb, 0x77, 0x55), + makecol(0xbb, 0x77, 0xaa), + makecol(0xbb, 0x77, 0xff), + makecol(0xbb, 0x99, 0x00), + makecol(0xbb, 0x99, 0x55), + makecol(0xbb, 0x99, 0xaa), + makecol(0xbb, 0x99, 0xff), + makecol(0xbb, 0xbb, 0x00), + makecol(0xbb, 0xbb, 0x55), + makecol(0xbb, 0xbb, 0xaa), + makecol(0xbb, 0xbb, 0xff), + makecol(0xbb, 0xdd, 0x00), + makecol(0xbb, 0xdd, 0x55), + makecol(0xbb, 0xdd, 0xaa), + makecol(0xbb, 0xdd, 0xff), + makecol(0xbb, 0xff, 0x00), + makecol(0xbb, 0xff, 0x55), + makecol(0xbb, 0xff, 0xaa), + makecol(0xbb, 0xff, 0xff), + makecol(0xdd, 0x00, 0x00), + makecol(0xdd, 0x00, 0x55), + makecol(0xdd, 0x00, 0xaa), + makecol(0xdd, 0x00, 0xff), + makecol(0xdd, 0x33, 0x00), + makecol(0xdd, 0x33, 0x55), + makecol(0xdd, 0x33, 0xaa), + makecol(0xdd, 0x33, 0xff), + makecol(0xdd, 0x55, 0x00), + makecol(0xdd, 0x55, 0x55), + makecol(0xdd, 0x55, 0xaa), + makecol(0xdd, 0x55, 0xff), + makecol(0xdd, 0x77, 0x00), + makecol(0xdd, 0x77, 0x55), + makecol(0xdd, 0x77, 0xaa), + makecol(0xdd, 0x77, 0xff), + makecol(0xdd, 0x99, 0x00), + makecol(0xdd, 0x99, 0x55), + makecol(0xdd, 0x99, 0xaa), + makecol(0xdd, 0x99, 0xff), + makecol(0xdd, 0xbb, 0x00), + makecol(0xdd, 0xbb, 0x55), + makecol(0xdd, 0xbb, 0xaa), + makecol(0xdd, 0xbb, 0xff), + makecol(0xdd, 0xdd, 0x00), + makecol(0xdd, 0xdd, 0x55), + makecol(0xdd, 0xdd, 0xaa), + makecol(0xdd, 0xdd, 0xff), + makecol(0xdd, 0xff, 0x00), + makecol(0xdd, 0xff, 0x55), + makecol(0xdd, 0xff, 0xaa), + makecol(0xdd, 0xff, 0xff), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x55), + makecol(0xff, 0x00, 0xaa), + makecol(0xff, 0x00, 0xff), + makecol(0xff, 0x33, 0x00), + makecol(0xff, 0x33, 0x55), + makecol(0xff, 0x33, 0xaa), + makecol(0xff, 0x33, 0xff), + makecol(0xff, 0x55, 0x00), + makecol(0xff, 0x55, 0x55), + makecol(0xff, 0x55, 0xaa), + makecol(0xff, 0x55, 0xff), + makecol(0xff, 0x77, 0x00), + makecol(0xff, 0x77, 0x55), + makecol(0xff, 0x77, 0xaa), + makecol(0xff, 0x77, 0xff), + makecol(0xff, 0x99, 0x00), + makecol(0xff, 0x99, 0x55), + makecol(0xff, 0x99, 0xaa), + makecol(0xff, 0x99, 0xff), + makecol(0xff, 0xbb, 0x00), + makecol(0xff, 0xbb, 0x55), + makecol(0xff, 0xbb, 0xaa), + makecol(0xff, 0xbb, 0xff), + makecol(0xff, 0xdd, 0x00), + makecol(0xff, 0xdd, 0x55), + makecol(0xff, 0xdd, 0xaa), + makecol(0xff, 0xdd, 0xff), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x55), + makecol(0xff, 0xff, 0xaa), + makecol(0xff, 0xff, 0xff), + }, + /* Palette 5: 6x6x6 colour cube */ + { + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x33), + makecol(0x00, 0x00, 0x66), + makecol(0x00, 0x00, 0x99), + makecol(0x00, 0x00, 0xcc), + makecol(0x00, 0x00, 0xff), + makecol(0x33, 0x00, 0x00), + makecol(0x33, 0x00, 0x33), + makecol(0x33, 0x00, 0x66), + makecol(0x33, 0x00, 0x99), + makecol(0x33, 0x00, 0xcc), + makecol(0x33, 0x00, 0xff), + makecol(0x66, 0x00, 0x00), + makecol(0x66, 0x00, 0x33), + makecol(0x66, 0x00, 0x66), + makecol(0x66, 0x00, 0x99), + makecol(0x66, 0x00, 0xcc), + makecol(0x66, 0x00, 0xff), + makecol(0x99, 0x00, 0x00), + makecol(0x99, 0x00, 0x33), + makecol(0x99, 0x00, 0x66), + makecol(0x99, 0x00, 0x99), + makecol(0x99, 0x00, 0xcc), + makecol(0x99, 0x00, 0xff), + makecol(0xcc, 0x00, 0x00), + makecol(0xcc, 0x00, 0x33), + makecol(0xcc, 0x00, 0x66), + makecol(0xcc, 0x00, 0x99), + makecol(0xcc, 0x00, 0xcc), + makecol(0xcc, 0x00, 0xff), + makecol(0xff, 0x00, 0x00), + makecol(0xff, 0x00, 0x33), + makecol(0xff, 0x00, 0x66), + makecol(0xff, 0x00, 0x99), + makecol(0xff, 0x00, 0xcc), + makecol(0xff, 0x00, 0xff), + makecol(0x00, 0x33, 0x00), + makecol(0x00, 0x33, 0x33), + makecol(0x00, 0x33, 0x66), + makecol(0x00, 0x33, 0x99), + makecol(0x00, 0x33, 0xcc), + makecol(0x00, 0x33, 0xff), + makecol(0x33, 0x33, 0x00), + makecol(0x33, 0x33, 0x33), + makecol(0x33, 0x33, 0x66), + makecol(0x33, 0x33, 0x99), + makecol(0x33, 0x33, 0xcc), + makecol(0x33, 0x33, 0xff), + makecol(0x66, 0x33, 0x00), + makecol(0x66, 0x33, 0x33), + makecol(0x66, 0x33, 0x66), + makecol(0x66, 0x33, 0x99), + makecol(0x66, 0x33, 0xcc), + makecol(0x66, 0x33, 0xff), + makecol(0x99, 0x33, 0x00), + makecol(0x99, 0x33, 0x33), + makecol(0x99, 0x33, 0x66), + makecol(0x99, 0x33, 0x99), + makecol(0x99, 0x33, 0xcc), + makecol(0x99, 0x33, 0xff), + makecol(0xcc, 0x33, 0x00), + makecol(0xcc, 0x33, 0x33), + makecol(0xcc, 0x33, 0x66), + makecol(0xcc, 0x33, 0x99), + makecol(0xcc, 0x33, 0xcc), + makecol(0xcc, 0x33, 0xff), + makecol(0xff, 0x33, 0x00), + makecol(0xff, 0x33, 0x33), + makecol(0xff, 0x33, 0x66), + makecol(0xff, 0x33, 0x99), + makecol(0xff, 0x33, 0xcc), + makecol(0xff, 0x33, 0xff), + makecol(0x00, 0x66, 0x00), + makecol(0x00, 0x66, 0x33), + makecol(0x00, 0x66, 0x66), + makecol(0x00, 0x66, 0x99), + makecol(0x00, 0x66, 0xcc), + makecol(0x00, 0x66, 0xff), + makecol(0x33, 0x66, 0x00), + makecol(0x33, 0x66, 0x33), + makecol(0x33, 0x66, 0x66), + makecol(0x33, 0x66, 0x99), + makecol(0x33, 0x66, 0xcc), + makecol(0x33, 0x66, 0xff), + makecol(0x66, 0x66, 0x00), + makecol(0x66, 0x66, 0x33), + makecol(0x66, 0x66, 0x66), + makecol(0x66, 0x66, 0x99), + makecol(0x66, 0x66, 0xcc), + makecol(0x66, 0x66, 0xff), + makecol(0x99, 0x66, 0x00), + makecol(0x99, 0x66, 0x33), + makecol(0x99, 0x66, 0x66), + makecol(0x99, 0x66, 0x99), + makecol(0x99, 0x66, 0xcc), + makecol(0x99, 0x66, 0xff), + makecol(0xcc, 0x66, 0x00), + makecol(0xcc, 0x66, 0x33), + makecol(0xcc, 0x66, 0x66), + makecol(0xcc, 0x66, 0x99), + makecol(0xcc, 0x66, 0xcc), + makecol(0xcc, 0x66, 0xff), + makecol(0xff, 0x66, 0x00), + makecol(0xff, 0x66, 0x33), + makecol(0xff, 0x66, 0x66), + makecol(0xff, 0x66, 0x99), + makecol(0xff, 0x66, 0xcc), + makecol(0xff, 0x66, 0xff), + makecol(0x00, 0x99, 0x00), + makecol(0x00, 0x99, 0x33), + makecol(0x00, 0x99, 0x66), + makecol(0x00, 0x99, 0x99), + makecol(0x00, 0x99, 0xcc), + makecol(0x00, 0x99, 0xff), + makecol(0x33, 0x99, 0x00), + makecol(0x33, 0x99, 0x33), + makecol(0x33, 0x99, 0x66), + makecol(0x33, 0x99, 0x99), + makecol(0x33, 0x99, 0xcc), + makecol(0x33, 0x99, 0xff), + makecol(0x66, 0x99, 0x00), + makecol(0x66, 0x99, 0x33), + makecol(0x66, 0x99, 0x66), + makecol(0x66, 0x99, 0x99), + makecol(0x66, 0x99, 0xcc), + makecol(0x66, 0x99, 0xff), + makecol(0x99, 0x99, 0x00), + makecol(0x99, 0x99, 0x33), + makecol(0x99, 0x99, 0x66), + makecol(0x99, 0x99, 0x99), + makecol(0x99, 0x99, 0xcc), + makecol(0x99, 0x99, 0xff), + makecol(0xcc, 0x99, 0x00), + makecol(0xcc, 0x99, 0x33), + makecol(0xcc, 0x99, 0x66), + makecol(0xcc, 0x99, 0x99), + makecol(0xcc, 0x99, 0xcc), + makecol(0xcc, 0x99, 0xff), + makecol(0xff, 0x99, 0x00), + makecol(0xff, 0x99, 0x33), + makecol(0xff, 0x99, 0x66), + makecol(0xff, 0x99, 0x99), + makecol(0xff, 0x99, 0xcc), + makecol(0xff, 0x99, 0xff), + makecol(0x00, 0xcc, 0x00), + makecol(0x00, 0xcc, 0x33), + makecol(0x00, 0xcc, 0x66), + makecol(0x00, 0xcc, 0x99), + makecol(0x00, 0xcc, 0xcc), + makecol(0x00, 0xcc, 0xff), + makecol(0x33, 0xcc, 0x00), + makecol(0x33, 0xcc, 0x33), + makecol(0x33, 0xcc, 0x66), + makecol(0x33, 0xcc, 0x99), + makecol(0x33, 0xcc, 0xcc), + makecol(0x33, 0xcc, 0xff), + makecol(0x66, 0xcc, 0x00), + makecol(0x66, 0xcc, 0x33), + makecol(0x66, 0xcc, 0x66), + makecol(0x66, 0xcc, 0x99), + makecol(0x66, 0xcc, 0xcc), + makecol(0x66, 0xcc, 0xff), + makecol(0x99, 0xcc, 0x00), + makecol(0x99, 0xcc, 0x33), + makecol(0x99, 0xcc, 0x66), + makecol(0x99, 0xcc, 0x99), + makecol(0x99, 0xcc, 0xcc), + makecol(0x99, 0xcc, 0xff), + makecol(0xcc, 0xcc, 0x00), + makecol(0xcc, 0xcc, 0x33), + makecol(0xcc, 0xcc, 0x66), + makecol(0xcc, 0xcc, 0x99), + makecol(0xcc, 0xcc, 0xcc), + makecol(0xcc, 0xcc, 0xff), + makecol(0xff, 0xcc, 0x00), + makecol(0xff, 0xcc, 0x33), + makecol(0xff, 0xcc, 0x66), + makecol(0xff, 0xcc, 0x99), + makecol(0xff, 0xcc, 0xcc), + makecol(0xff, 0xcc, 0xff), + makecol(0x00, 0xff, 0x00), + makecol(0x00, 0xff, 0x33), + makecol(0x00, 0xff, 0x66), + makecol(0x00, 0xff, 0x99), + makecol(0x00, 0xff, 0xcc), + makecol(0x00, 0xff, 0xff), + makecol(0x33, 0xff, 0x00), + makecol(0x33, 0xff, 0x33), + makecol(0x33, 0xff, 0x66), + makecol(0x33, 0xff, 0x99), + makecol(0x33, 0xff, 0xcc), + makecol(0x33, 0xff, 0xff), + makecol(0x66, 0xff, 0x00), + makecol(0x66, 0xff, 0x33), + makecol(0x66, 0xff, 0x66), + makecol(0x66, 0xff, 0x99), + makecol(0x66, 0xff, 0xcc), + makecol(0x66, 0xff, 0xff), + makecol(0x99, 0xff, 0x00), + makecol(0x99, 0xff, 0x33), + makecol(0x99, 0xff, 0x66), + makecol(0x99, 0xff, 0x99), + makecol(0x99, 0xff, 0xcc), + makecol(0x99, 0xff, 0xff), + makecol(0xcc, 0xff, 0x00), + makecol(0xcc, 0xff, 0x33), + makecol(0xcc, 0xff, 0x66), + makecol(0xcc, 0xff, 0x99), + makecol(0xcc, 0xff, 0xcc), + makecol(0xcc, 0xff, 0xff), + makecol(0xff, 0xff, 0x00), + makecol(0xff, 0xff, 0x33), + makecol(0xff, 0xff, 0x66), + makecol(0xff, 0xff, 0x99), + makecol(0xff, 0xff, 0xcc), + makecol(0xff, 0xff, 0xff), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + makecol(0x00, 0x00, 0x00), + }, -#endif /*VID_PGC_PALETTE_H*/ +#endif /*VID_PGC_PALETTE_H*/ diff --git a/src/include/86box/vid_svga.h b/src/include/86box/vid_svga.h index 530ea648d..a417d05df 100644 --- a/src/include/86box/vid_svga.h +++ b/src/include/86box/vid_svga.h @@ -22,56 +22,55 @@ #include <86box/vid_xga.h> #ifndef VIDEO_SVGA_H -# define VIDEO_SVGA_H +# define VIDEO_SVGA_H -#define FLAG_EXTRA_BANKS 1 -#define FLAG_ADDR_BY8 2 -#define FLAG_EXT_WRITE 4 -#define FLAG_LATCH8 8 -#define FLAG_NOSKEW 16 -#define FLAG_ADDR_BY16 32 -#define FLAG_RAMDAC_SHIFT 64 -#define FLAG_128K_MASK 128 +# define FLAG_EXTRA_BANKS 1 +# define FLAG_ADDR_BY8 2 +# define FLAG_EXT_WRITE 4 +# define FLAG_LATCH8 8 +# define FLAG_NOSKEW 16 +# define FLAG_ADDR_BY16 32 +# define FLAG_RAMDAC_SHIFT 64 +# define FLAG_128K_MASK 128 typedef struct { int ena, - x, y, xoff, yoff, cur_xsize, cur_ysize, - v_acc, h_acc; + x, y, xoff, yoff, cur_xsize, cur_ysize, + v_acc, h_acc; uint32_t addr, pitch; } hwcursor_t; typedef union { - uint64_t q; - uint32_t d[2]; - uint16_t w[4]; - uint8_t b[8]; + uint64_t q; + uint32_t d[2]; + uint16_t w[4]; + uint8_t b[8]; } latch_t; -typedef struct svga_t -{ - ibm8514_t dev8514; - xga_t xga; +typedef struct svga_t { + ibm8514_t dev8514; + xga_t xga; mem_mapping_t mapping; uint8_t fast, chain4, chain2_write, chain2_read, - ext_overscan, bus_size, - lowres, interlace, linedbl, rowcount, - set_reset_disabled, bpp, ramdac_type, fb_only, - readmode, writemode, readplane, - hwcursor_oddeven, dac_hwcursor_oddeven, overlay_oddeven, - fcr, hblank_overscan; + ext_overscan, bus_size, + lowres, interlace, linedbl, rowcount, + set_reset_disabled, bpp, ramdac_type, fb_only, + readmode, writemode, readplane, + hwcursor_oddeven, dac_hwcursor_oddeven, overlay_oddeven, + fcr, hblank_overscan; int dac_addr, dac_pos, dac_r, dac_g, - vtotal, dispend, vsyncstart, split, vblankstart, - hdisp, hdisp_old, htotal, hdisp_time, rowoffset, - dispon, hdisp_on, - vc, sc, linepos, vslines, linecountff, oddeven, - con, cursoron, blink, scrollcache, char_width, - firstline, lastline, firstline_draw, lastline_draw, - displine, fullchange, x_add, y_add, pan, - vram_display_mask, vidclock, dots_per_clock, hblank_ext, - hwcursor_on, dac_hwcursor_on, overlay_on, set_override, - hblankstart, hblankend, hblank_sub, hblank_end_val, hblank_end_len; + vtotal, dispend, vsyncstart, split, vblankstart, + hdisp, hdisp_old, htotal, hdisp_time, rowoffset, + dispon, hdisp_on, + vc, sc, linepos, vslines, linecountff, oddeven, + con, cursoron, blink, scrollcache, char_width, + firstline, lastline, firstline_draw, lastline_draw, + displine, fullchange, x_add, y_add, pan, + vram_display_mask, vidclock, dots_per_clock, hblank_ext, + hwcursor_on, dac_hwcursor_on, overlay_on, set_override, + hblankstart, hblankend, hblank_sub, hblank_end_val, hblank_end_len; /*The three variables below allow us to implement memory maps like that seen on a 1MB Trio64 : 0MB-1MB - VRAM @@ -83,34 +82,34 @@ typedef struct svga_t (present video memory only responds to first 2MB), vram_mask would be 1MB-1 (video memory wraps at 1MB) */ uint32_t decode_mask, vram_max, - vram_mask, - charseta, charsetb, - adv_flags, ma_latch, - ca_adj, ma, maback, - write_bank, read_bank, - extra_banks[2], - banked_mask, - ca, overscan_color, - *map8, pallook[512]; + vram_mask, + charseta, charsetb, + adv_flags, ma_latch, + ca_adj, ma, maback, + write_bank, read_bank, + extra_banks[2], + banked_mask, + ca, overscan_color, + *map8, pallook[512]; PALETTE vgapal; uint64_t dispontime, dispofftime; - latch_t latch; + latch_t latch; pc_timer_t timer; double clock; hwcursor_t hwcursor, hwcursor_latch, - dac_hwcursor, dac_hwcursor_latch, - overlay, overlay_latch; + dac_hwcursor, dac_hwcursor_latch, + overlay, overlay_latch; void (*render)(struct svga_t *svga); void (*recalctimings_ex)(struct svga_t *svga); - void (*video_out)(uint16_t addr, uint8_t val, void *p); - uint8_t (*video_in) (uint16_t addr, void *p); + void (*video_out)(uint16_t addr, uint8_t val, void *p); + uint8_t (*video_in)(uint16_t addr, void *p); void (*hwcursor_draw)(struct svga_t *svga, int displine); @@ -134,23 +133,23 @@ typedef struct svga_t uint32_t (*translate_address)(uint32_t addr, void *p); /*If set then another device is driving the monitor output and the SVGA card should not attempt to display anything */ - int override; + int override; void *p; uint8_t crtc[256], gdcreg[256], attrregs[32], seqregs[256], - egapal[16], - *vram, *changedvram; + egapal[16], + *vram, *changedvram; uint8_t crtcreg, gdcaddr, - attrff, attr_palette_enable, attraddr, seqaddr, - miscout, cgastat, scrblank, - plane_mask, writemask, - colourcompare, colournocare, - dac_mask, dac_status, - dpms, dpms_ui, - ksc5601_sbyte_mask, ksc5601_udc_area_msb[2]; + attrff, attr_palette_enable, attraddr, seqaddr, + miscout, cgastat, scrblank, + plane_mask, writemask, + colourcompare, colournocare, + dac_mask, dac_status, + dpms, dpms_ui, + ksc5601_sbyte_mask, ksc5601_udc_area_msb[2]; - int ksc5601_swap_mode; + int ksc5601_swap_mode; uint16_t ksc5601_english_font_type; int vertical_linedbl; @@ -158,17 +157,17 @@ typedef struct svga_t /*Used to implement CRTC[0x17] bit 2 hsync divisor*/ int hsync_divisor; - /*Tseng-style chain4 mode - CRTC dword mode is the same as byte mode, chain4 - addresses are shifted to match*/ - int packed_chain4; + /*Tseng-style chain4 mode - CRTC dword mode is the same as byte mode, chain4 + addresses are shifted to match*/ + int packed_chain4; - /*Force CRTC to dword mode, regardless of CR14/CR17. Required for S3 enhanced mode*/ - int force_dword_mode; + /*Force CRTC to dword mode, regardless of CR14/CR17. Required for S3 enhanced mode*/ + int force_dword_mode; - int force_old_addr; + int force_old_addr; - int remap_required; - uint32_t (*remap_func)(struct svga_t *svga, uint32_t in_addr); + int remap_required; + uint32_t (*remap_func)(struct svga_t *svga, uint32_t in_addr); void *ramdac, *clock_gen; } svga_t; @@ -181,118 +180,116 @@ extern void ibm8514_recalctimings(svga_t *svga); extern void xga_poll(xga_t *xga, svga_t *svga); extern void xga_recalctimings(svga_t *svga); -extern int svga_init(const device_t *info, svga_t *svga, void *p, int memsize, - void (*recalctimings_ex)(struct svga_t *svga), - uint8_t (*video_in) (uint16_t addr, void *p), - void (*video_out)(uint16_t addr, uint8_t val, void *p), - void (*hwcursor_draw)(struct svga_t *svga, int displine), - void (*overlay_draw)(struct svga_t *svga, int displine)); -extern void svga_recalctimings(svga_t *svga); -extern void svga_close(svga_t *svga); +extern int svga_init(const device_t *info, svga_t *svga, void *p, int memsize, + void (*recalctimings_ex)(struct svga_t *svga), + uint8_t (*video_in)(uint16_t addr, void *p), + void (*video_out)(uint16_t addr, uint8_t val, void *p), + void (*hwcursor_draw)(struct svga_t *svga, int displine), + void (*overlay_draw)(struct svga_t *svga, int displine)); +extern void svga_recalctimings(svga_t *svga); +extern void svga_close(svga_t *svga); -uint8_t svga_read(uint32_t addr, void *p); -uint16_t svga_readw(uint32_t addr, void *p); -uint32_t svga_readl(uint32_t addr, void *p); -void svga_write(uint32_t addr, uint8_t val, void *p); -void svga_writew(uint32_t addr, uint16_t val, void *p); -void svga_writel(uint32_t addr, uint32_t val, void *p); -uint8_t svga_read_linear(uint32_t addr, void *p); -uint8_t svga_readb_linear(uint32_t addr, void *p); -uint16_t svga_readw_linear(uint32_t addr, void *p); -uint32_t svga_readl_linear(uint32_t addr, void *p); -void svga_write_linear(uint32_t addr, uint8_t val, void *p); -void svga_writeb_linear(uint32_t addr, uint8_t val, void *p); -void svga_writew_linear(uint32_t addr, uint16_t val, void *p); -void svga_writel_linear(uint32_t addr, uint32_t val, void *p); +uint8_t svga_read(uint32_t addr, void *p); +uint16_t svga_readw(uint32_t addr, void *p); +uint32_t svga_readl(uint32_t addr, void *p); +void svga_write(uint32_t addr, uint8_t val, void *p); +void svga_writew(uint32_t addr, uint16_t val, void *p); +void svga_writel(uint32_t addr, uint32_t val, void *p); +uint8_t svga_read_linear(uint32_t addr, void *p); +uint8_t svga_readb_linear(uint32_t addr, void *p); +uint16_t svga_readw_linear(uint32_t addr, void *p); +uint32_t svga_readl_linear(uint32_t addr, void *p); +void svga_write_linear(uint32_t addr, uint8_t val, void *p); +void svga_writeb_linear(uint32_t addr, uint8_t val, void *p); +void svga_writew_linear(uint32_t addr, uint16_t val, void *p); +void svga_writel_linear(uint32_t addr, uint32_t val, void *p); -void svga_add_status_info(char *s, int max_len, void *p); +void svga_add_status_info(char *s, int max_len, void *p); -extern uint8_t svga_rotate[8][256]; +extern uint8_t svga_rotate[8][256]; -void svga_out(uint16_t addr, uint8_t val, void *p); -uint8_t svga_in(uint16_t addr, void *p); +void svga_out(uint16_t addr, uint8_t val, void *p); +uint8_t svga_in(uint16_t addr, void *p); -svga_t *svga_get_pri(); -void svga_set_override(svga_t *svga, int val); +svga_t *svga_get_pri(); +void svga_set_override(svga_t *svga, int val); -void svga_set_ramdac_type(svga_t *svga, int type); -void svga_close(svga_t *svga); +void svga_set_ramdac_type(svga_t *svga, int type); +void svga_close(svga_t *svga); -uint32_t svga_mask_addr(uint32_t addr, svga_t *svga); -uint32_t svga_mask_changedaddr(uint32_t addr, svga_t *svga); - -void svga_doblit(int wx, int wy, svga_t *svga); +uint32_t svga_mask_addr(uint32_t addr, svga_t *svga); +uint32_t svga_mask_changedaddr(uint32_t addr, svga_t *svga); +void svga_doblit(int wx, int wy, svga_t *svga); enum { RAMDAC_6BIT = 0, RAMDAC_8BIT }; - /* We need a way to add a device with a pointer to a parent device so it can attach itself to it, and possibly also a second ATi 68860 RAM DAC type that auto-sets SVGA render on RAM DAC render change. */ -extern void ati68860_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga); -extern uint8_t ati68860_ramdac_in(uint16_t addr, void *p, svga_t *svga); -extern void ati68860_set_ramdac_type(void *p, int type); -extern void ati68860_ramdac_set_render(void *p, svga_t *svga); -extern void ati68860_ramdac_set_pallook(void *p, int i, uint32_t col); -extern void ati68860_hwcursor_draw(svga_t *svga, int displine); +extern void ati68860_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga); +extern uint8_t ati68860_ramdac_in(uint16_t addr, void *p, svga_t *svga); +extern void ati68860_set_ramdac_type(void *p, int type); +extern void ati68860_ramdac_set_render(void *p, svga_t *svga); +extern void ati68860_ramdac_set_pallook(void *p, int i, uint32_t col); +extern void ati68860_hwcursor_draw(svga_t *svga, int displine); -extern void att49x_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga); -extern uint8_t att49x_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga); +extern void att49x_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga); +extern uint8_t att49x_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga); -extern void att498_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga); -extern uint8_t att498_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga); -extern float av9194_getclock(int clock, void *p); +extern void att498_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga); +extern uint8_t att498_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga); +extern float av9194_getclock(int clock, void *p); -extern void bt48x_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t *svga); -extern uint8_t bt48x_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga); -extern void bt48x_recalctimings(void *p, svga_t *svga); -extern void bt48x_hwcursor_draw(svga_t *svga, int displine); +extern void bt48x_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t *svga); +extern uint8_t bt48x_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga); +extern void bt48x_recalctimings(void *p, svga_t *svga); +extern void bt48x_hwcursor_draw(svga_t *svga, int displine); -extern void ibm_rgb528_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga); -extern uint8_t ibm_rgb528_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga); -extern void ibm_rgb528_recalctimings(void *p, svga_t *svga); -extern void ibm_rgb528_hwcursor_draw(svga_t *svga, int displine); +extern void ibm_rgb528_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga); +extern uint8_t ibm_rgb528_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga); +extern void ibm_rgb528_recalctimings(void *p, svga_t *svga); +extern void ibm_rgb528_hwcursor_draw(svga_t *svga, int displine); -extern void icd2061_write(void *p, int val); -extern float icd2061_getclock(int clock, void *p); +extern void icd2061_write(void *p, int val); +extern float icd2061_getclock(int clock, void *p); /* The code is the same, the #define's are so that the correct name can be used. */ -#define ics9161_write icd2061_write -#define ics9161_getclock icd2061_getclock +# define ics9161_write icd2061_write +# define ics9161_getclock icd2061_getclock -extern float ics2494_getclock(int clock, void *p); +extern float ics2494_getclock(int clock, void *p); -extern void ics2595_write(void *p, int strobe, int dat); -extern double ics2595_getclock(void *p); -extern void ics2595_setclock(void *p, double clock); +extern void ics2595_write(void *p, int strobe, int dat); +extern double ics2595_getclock(void *p); +extern void ics2595_setclock(void *p, double clock); -extern void sc1148x_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga); -extern uint8_t sc1148x_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga); +extern void sc1148x_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga); +extern uint8_t sc1148x_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga); -extern void sc1502x_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga); -extern uint8_t sc1502x_ramdac_in(uint16_t addr, void *p, svga_t *svga); +extern void sc1502x_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga); +extern uint8_t sc1502x_ramdac_in(uint16_t addr, void *p, svga_t *svga); -extern void sdac_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga); -extern uint8_t sdac_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga); -extern float sdac_getclock(int clock, void *p); +extern void sdac_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga); +extern uint8_t sdac_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga); +extern float sdac_getclock(int clock, void *p); -extern void stg_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga); -extern uint8_t stg_ramdac_in(uint16_t addr, void *p, svga_t *svga); -extern float stg_getclock(int clock, void *p); +extern void stg_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga); +extern uint8_t stg_ramdac_in(uint16_t addr, void *p, svga_t *svga); +extern float stg_getclock(int clock, void *p); -extern void tkd8001_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga); -extern uint8_t tkd8001_ramdac_in(uint16_t addr, void *p, svga_t *svga); +extern void tkd8001_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga); +extern uint8_t tkd8001_ramdac_in(uint16_t addr, void *p, svga_t *svga); -extern void tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t *svga); +extern void tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t *svga); extern uint8_t tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga); -extern void tvp3026_recalctimings(void *p, svga_t *svga); -extern void tvp3026_hwcursor_draw(svga_t *svga, int displine); -extern float tvp3026_getclock(int clock, void *p); +extern void tvp3026_recalctimings(void *p, svga_t *svga); +extern void tvp3026_hwcursor_draw(svga_t *svga, int displine); +extern float tvp3026_getclock(int clock, void *p); -#ifdef EMU_DEVICE_H +# ifdef EMU_DEVICE_H extern const device_t ati68860_ramdac_device; extern const device_t att490_ramdac_device; extern const device_t att491_ramdac_device; @@ -321,6 +318,6 @@ extern const device_t tkd8001_ramdac_device; extern const device_t tseng_ics5301_ramdac_device; extern const device_t tseng_ics5341_ramdac_device; extern const device_t tvp3026_ramdac_device; -#endif +# endif -#endif /*VIDEO_SVGA_H*/ +#endif /*VIDEO_SVGA_H*/ diff --git a/src/include/86box/vid_svga_render.h b/src/include/86box/vid_svga_render.h index e480e81f7..04bd740b1 100644 --- a/src/include/86box/vid_svga_render.h +++ b/src/include/86box/vid_svga_render.h @@ -17,14 +17,14 @@ */ #ifndef VIDEO_SVGA_RENDER_H -# define VIDEO_SVGA_RENDER_H +#define VIDEO_SVGA_RENDER_H extern int firstline_draw, lastline_draw; extern int displine; extern int sc; extern uint32_t ma, ca; -extern int con, cursoron, cgablink; +extern int con, cursoron, cgablink; extern int scrollcache; diff --git a/src/include/86box/vid_svga_render_remap.h b/src/include/86box/vid_svga_render_remap.h index 1077cbc69..ff9151c3c 100644 --- a/src/include/86box/vid_svga_render_remap.h +++ b/src/include/86box/vid_svga_render_remap.h @@ -7,14 +7,14 @@ */ #ifndef VIDEO_SVGA_RENDER_REMAP_H -# define VIDEO_SVGA_RENDER_REMAP_H +#define VIDEO_SVGA_RENDER_REMAP_H -//S3 - enhanced mode mappings CR31.3 can force doubleword mode -//Cirrus Logic handles SVGA writes seperately -//S3, CL, TGUI blitters need checking +// S3 - enhanced mode mappings CR31.3 can force doubleword mode +// Cirrus Logic handles SVGA writes seperately +// S3, CL, TGUI blitters need checking -//CL, S3, Mach64, ET4000, Banshee, TGUI all okay -//Still to check - ViRGE, HT216 +// CL, S3, Mach64, ET4000, Banshee, TGUI all okay +// Still to check - ViRGE, HT216 #define VAR_BYTE_MODE (0 << 0) #define VAR_WORD_MODE_MA13 (1 << 0) #define VAR_WORD_MODE_MA15 (2 << 0) @@ -23,45 +23,36 @@ #define VAR_ROW0_MA13 (1 << 2) #define VAR_ROW1_MA14 (1 << 3) -#define ADDRESS_REMAP_FUNC(nr) \ - static uint32_t address_remap_func_ ## nr(svga_t *svga, uint32_t in_addr) \ - { \ - uint32_t out_addr; \ - \ - switch (nr & VAR_MODE_MASK) \ - { \ - case VAR_BYTE_MODE: \ - out_addr = in_addr; \ - break; \ - \ - case VAR_WORD_MODE_MA13: \ - out_addr = ((in_addr << 1) & 0x1fff8) | \ - ((in_addr >> 13) & 0x4) | \ - (in_addr & ~0x1ffff); \ - break; \ - \ - case VAR_WORD_MODE_MA15: \ - out_addr = ((in_addr << 1) & 0x1fff8) | \ - ((in_addr >> 15) & 0x4) | \ - (in_addr & ~0x1ffff); \ - break; \ - \ - case VAR_DWORD_MODE: \ - out_addr = ((in_addr << 2) & 0x3fff0) | \ - ((in_addr >> 14) & 0xc) | \ - (in_addr & ~0x3ffff); \ - break; \ - } \ - \ - if (nr & VAR_ROW0_MA13) \ - out_addr = (out_addr & ~0x8000) | \ - ((svga->sc & 1) ? 0x8000 : 0); \ - if (nr & VAR_ROW1_MA14) \ - out_addr = (out_addr & ~0x10000) | \ - ((svga->sc & 2) ? 0x10000 : 0); \ - \ - return out_addr; \ - } +#define ADDRESS_REMAP_FUNC(nr) \ + static uint32_t address_remap_func_##nr(svga_t *svga, uint32_t in_addr) \ + { \ + uint32_t out_addr; \ + \ + switch (nr & VAR_MODE_MASK) { \ + case VAR_BYTE_MODE: \ + out_addr = in_addr; \ + break; \ + \ + case VAR_WORD_MODE_MA13: \ + out_addr = ((in_addr << 1) & 0x1fff8) | ((in_addr >> 13) & 0x4) | (in_addr & ~0x1ffff); \ + break; \ + \ + case VAR_WORD_MODE_MA15: \ + out_addr = ((in_addr << 1) & 0x1fff8) | ((in_addr >> 15) & 0x4) | (in_addr & ~0x1ffff); \ + break; \ + \ + case VAR_DWORD_MODE: \ + out_addr = ((in_addr << 2) & 0x3fff0) | ((in_addr >> 14) & 0xc) | (in_addr & ~0x3ffff); \ + break; \ + } \ + \ + if (nr & VAR_ROW0_MA13) \ + out_addr = (out_addr & ~0x8000) | ((svga->sc & 1) ? 0x8000 : 0); \ + if (nr & VAR_ROW1_MA14) \ + out_addr = (out_addr & ~0x10000) | ((svga->sc & 2) ? 0x10000 : 0); \ + \ + return out_addr; \ + } ADDRESS_REMAP_FUNC(0) ADDRESS_REMAP_FUNC(1) @@ -80,52 +71,52 @@ ADDRESS_REMAP_FUNC(13) ADDRESS_REMAP_FUNC(14) ADDRESS_REMAP_FUNC(15) -static uint32_t (*address_remap_funcs[16])(svga_t *svga, uint32_t in_addr) = -{ - address_remap_func_0, - address_remap_func_1, - address_remap_func_2, - address_remap_func_3, - address_remap_func_4, - address_remap_func_5, - address_remap_func_6, - address_remap_func_7, - address_remap_func_8, - address_remap_func_9, - address_remap_func_10, - address_remap_func_11, - address_remap_func_12, - address_remap_func_13, - address_remap_func_14, - address_remap_func_15 +static uint32_t (*address_remap_funcs[16])(svga_t *svga, uint32_t in_addr) = { + address_remap_func_0, + address_remap_func_1, + address_remap_func_2, + address_remap_func_3, + address_remap_func_4, + address_remap_func_5, + address_remap_func_6, + address_remap_func_7, + address_remap_func_8, + address_remap_func_9, + address_remap_func_10, + address_remap_func_11, + address_remap_func_12, + address_remap_func_13, + address_remap_func_14, + address_remap_func_15 }; -void svga_recalc_remap_func(svga_t *svga) +void +svga_recalc_remap_func(svga_t *svga) { - int func_nr; + int func_nr; - if (svga->fb_only) - func_nr = 0; - else { - if (svga->force_dword_mode) - func_nr = VAR_DWORD_MODE; - else if (svga->crtc[0x14] & 0x40) - func_nr = svga->packed_chain4 ? VAR_BYTE_MODE : VAR_DWORD_MODE; - else if (svga->crtc[0x17] & 0x40) - func_nr = VAR_BYTE_MODE; - else if (svga->crtc[0x17] & 0x20) - func_nr = VAR_WORD_MODE_MA15; - else - func_nr = VAR_WORD_MODE_MA13; + if (svga->fb_only) + func_nr = 0; + else { + if (svga->force_dword_mode) + func_nr = VAR_DWORD_MODE; + else if (svga->crtc[0x14] & 0x40) + func_nr = svga->packed_chain4 ? VAR_BYTE_MODE : VAR_DWORD_MODE; + else if (svga->crtc[0x17] & 0x40) + func_nr = VAR_BYTE_MODE; + else if (svga->crtc[0x17] & 0x20) + func_nr = VAR_WORD_MODE_MA15; + else + func_nr = VAR_WORD_MODE_MA13; - if (!(svga->crtc[0x17] & 0x01)) - func_nr |= VAR_ROW0_MA13; - if (!(svga->crtc[0x17] & 0x02)) - func_nr |= VAR_ROW1_MA14; - } + if (!(svga->crtc[0x17] & 0x01)) + func_nr |= VAR_ROW0_MA13; + if (!(svga->crtc[0x17] & 0x02)) + func_nr |= VAR_ROW1_MA14; + } - svga->remap_required = (func_nr != 0); - svga->remap_func = address_remap_funcs[func_nr]; + svga->remap_required = (func_nr != 0); + svga->remap_func = address_remap_funcs[func_nr]; } #endif /*VIDEO_RENDER_REMAP_H*/ diff --git a/src/include/86box/vid_vga.h b/src/include/86box/vid_vga.h index 3ef627c43..44cc6b7c3 100644 --- a/src/include/86box/vid_vga.h +++ b/src/include/86box/vid_vga.h @@ -18,18 +18,17 @@ */ #ifndef VIDEO_VGA_H -# define VIDEO_VGA_H +#define VIDEO_VGA_H -typedef struct vga_t -{ - svga_t svga; +typedef struct vga_t { + svga_t svga; - rom_t bios_rom; + rom_t bios_rom; } vga_t; -static video_timings_t timing_vga = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; +static video_timings_t timing_vga = { VIDEO_ISA, 8, 16, 32, 8, 16, 32 }; -void vga_out(uint16_t addr, uint8_t val, void *p); +void vga_out(uint16_t addr, uint8_t val, void *p); uint8_t vga_in(uint16_t addr, void *p); -#endif /*VIDEO_VGA_H*/ +#endif /*VIDEO_VGA_H*/ diff --git a/src/include/86box/vid_voodoo_banshee.h b/src/include/86box/vid_voodoo_banshee.h index b56caac88..4d966ea3e 100644 --- a/src/include/86box/vid_voodoo_banshee.h +++ b/src/include/86box/vid_voodoo_banshee.h @@ -16,7 +16,7 @@ */ #ifndef VIDEO_VOODOO_BANSHEE_H -# define VIDEO_VOODOO_BANSHEE_H +#define VIDEO_VOODOO_BANSHEE_H void banshee_set_overlay_addr(void *p, uint32_t addr); diff --git a/src/include/86box/vid_voodoo_banshee_blitter.h b/src/include/86box/vid_voodoo_banshee_blitter.h index ad4d68218..9f7a1825e 100644 --- a/src/include/86box/vid_voodoo_banshee_blitter.h +++ b/src/include/86box/vid_voodoo_banshee_blitter.h @@ -16,7 +16,7 @@ */ #ifndef VIDEO_VOODOO_BANSHEE_BLITTER_H -# define VIDEO_VOODOO_BANSHEE_BLITTER_H +#define VIDEO_VOODOO_BANSHEE_BLITTER_H void voodoo_2d_reg_writel(voodoo_t *voodoo, uint32_t addr, uint32_t val); diff --git a/src/include/86box/vid_voodoo_blitter.h b/src/include/86box/vid_voodoo_blitter.h index 20d845874..2802c7d1e 100644 --- a/src/include/86box/vid_voodoo_blitter.h +++ b/src/include/86box/vid_voodoo_blitter.h @@ -16,7 +16,7 @@ */ #ifndef VIDEO_VOODOO_BLITTER_H -# define VIDEO_VOODOO_BLITTER_H +#define VIDEO_VOODOO_BLITTER_H void voodoo_v2_blit_start(voodoo_t *voodoo); void voodoo_v2_blit_data(voodoo_t *voodoo, uint32_t data); diff --git a/src/include/86box/vid_voodoo_codegen_x86-64.h b/src/include/86box/vid_voodoo_codegen_x86-64.h index 632eacfb4..bd992e1d0 100644 --- a/src/include/86box/vid_voodoo_codegen_x86-64.h +++ b/src/include/86box/vid_voodoo_codegen_x86-64.h @@ -6,2024 +6,1892 @@ */ #ifndef VIDEO_VOODOO_CODEGEN_X86_64_H -# define VIDEO_VOODOO_CODEGEN_X86_64_H +#define VIDEO_VOODOO_CODEGEN_X86_64_H #ifdef _MSC_VER -#include +# include #else -#include +# include #endif -#define BLOCK_NUM 8 -#define BLOCK_MASK (BLOCK_NUM-1) +#define BLOCK_NUM 8 +#define BLOCK_MASK (BLOCK_NUM - 1) #define BLOCK_SIZE 8192 -#define LOD_MASK (LOD_TMIRROR_S | LOD_TMIRROR_T) +#define LOD_MASK (LOD_TMIRROR_S | LOD_TMIRROR_T) /* Suppress a false positive warning on gcc that causes excessive build log spam */ #if __GNUC__ >= 10 -#pragma GCC diagnostic ignored "-Wstringop-overflow" +# pragma GCC diagnostic ignored "-Wstringop-overflow" #endif -typedef struct voodoo_x86_data_t -{ - uint8_t code_block[BLOCK_SIZE]; - int xdir; - uint32_t alphaMode; - uint32_t fbzMode; - uint32_t fogMode; - uint32_t fbzColorPath; - uint32_t textureMode[2]; - uint32_t tLOD[2]; - uint32_t trexInit1; - int is_tiled; +typedef struct voodoo_x86_data_t { + uint8_t code_block[BLOCK_SIZE]; + int xdir; + uint32_t alphaMode; + uint32_t fbzMode; + uint32_t fogMode; + uint32_t fbzColorPath; + uint32_t textureMode[2]; + uint32_t tLOD[2]; + uint32_t trexInit1; + int is_tiled; } voodoo_x86_data_t; -//static voodoo_x86_data_t voodoo_x86_data[2][BLOCK_NUM]; +// static voodoo_x86_data_t voodoo_x86_data[2][BLOCK_NUM]; -static int last_block[4] = {0, 0}; -static int next_block_to_write[4] = {0, 0}; +static int last_block[4] = { 0, 0 }; +static int next_block_to_write[4] = { 0, 0 }; -#define addbyte(val) \ - do { \ - code_block[block_pos++] = val; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ - } while (0) +#define addbyte(val) \ + do { \ + code_block[block_pos++] = val; \ + if (block_pos >= BLOCK_SIZE) \ + fatal("Over!\n"); \ + } while (0) -#define addword(val) \ - do { \ - *(uint16_t *)&code_block[block_pos] = val; \ - block_pos += 2; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ - } while (0) +#define addword(val) \ + do { \ + *(uint16_t *) &code_block[block_pos] = val; \ + block_pos += 2; \ + if (block_pos >= BLOCK_SIZE) \ + fatal("Over!\n"); \ + } while (0) -#define addlong(val) \ - do { \ - *(uint32_t *)&code_block[block_pos] = val; \ - block_pos += 4; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ - } while (0) +#define addlong(val) \ + do { \ + *(uint32_t *) &code_block[block_pos] = val; \ + block_pos += 4; \ + if (block_pos >= BLOCK_SIZE) \ + fatal("Over!\n"); \ + } while (0) -#define addquad(val) \ - do { \ - *(uint64_t *)&code_block[block_pos] = val; \ - block_pos += 8; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ - } while (0) +#define addquad(val) \ + do { \ + *(uint64_t *) &code_block[block_pos] = val; \ + block_pos += 8; \ + if (block_pos >= BLOCK_SIZE) \ + fatal("Over!\n"); \ + } while (0) +static __m128i xmm_01_w; // = 0x0001000100010001ull; +static __m128i xmm_ff_w; // = 0x00ff00ff00ff00ffull; +static __m128i xmm_ff_b; // = 0x00000000ffffffffull; -static __m128i xmm_01_w;// = 0x0001000100010001ull; -static __m128i xmm_ff_w;// = 0x00ff00ff00ff00ffull; -static __m128i xmm_ff_b;// = 0x00000000ffffffffull; +static __m128i alookup[257], aminuslookup[256]; +static __m128i minus_254; // = 0xff02ff02ff02ff02ull; +static __m128i bilinear_lookup[256 * 2]; +static __m128i xmm_00_ff_w[2]; +static uint32_t i_00_ff_w[2] = { 0, 0xff }; -static __m128i alookup[257], aminuslookup[256]; -static __m128i minus_254;// = 0xff02ff02ff02ff02ull; -static __m128i bilinear_lookup[256*2]; -static __m128i xmm_00_ff_w[2]; -static uint32_t i_00_ff_w[2] = {0, 0xff}; - -static inline int codegen_texture_fetch(uint8_t *code_block, voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int block_pos, int tmu) +static inline int +codegen_texture_fetch(uint8_t *code_block, voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int block_pos, int tmu) { - if (params->textureMode[tmu] & 1) - { - addbyte(0x48); /*MOV RBX, state->tmu0_s*/ - addbyte(0x8b); - addbyte(0x9f); - addlong(tmu ? offsetof(voodoo_state_t, tmu1_s) : offsetof(voodoo_state_t, tmu0_s)); - addbyte(0x48); /*MOV RAX, (1 << 48)*/ - addbyte(0xb8); - addquad(1ULL << 48); - addbyte(0x48); /*XOR RDX, RDX*/ - addbyte(0x31); - addbyte(0xd2); - addbyte(0x48); /*MOV RCX, state->tmu0_t*/ - addbyte(0x8b); - addbyte(0x8f); - addlong(tmu ? offsetof(voodoo_state_t, tmu1_t) : offsetof(voodoo_state_t, tmu0_t)); - addbyte(0x48); /*CMP state->tmu_w, 0*/ - addbyte(0x83); - addbyte(0xbf); - addlong(tmu ? offsetof(voodoo_state_t, tmu1_w) : offsetof(voodoo_state_t, tmu0_w)); - addbyte(0); - addbyte(0x74); /*JZ +*/ - addbyte(7); - addbyte(0x48); /*IDIV state->tmu_w*/ - addbyte(0xf7); - addbyte(0xbf); - addlong(tmu ? offsetof(voodoo_state_t, tmu1_w) : offsetof(voodoo_state_t, tmu0_w)); - addbyte(0x48); /*SAR RBX, 14*/ - addbyte(0xc1); - addbyte(0xfb); - addbyte(14); - addbyte(0x48); /*SAR RCX, 14*/ - addbyte(0xc1); - addbyte(0xf9); - addbyte(14); - addbyte(0x48); /*IMUL RBX, RAX*/ - addbyte(0x0f); - addbyte(0xaf); - addbyte(0xd8); - addbyte(0x48); /*IMUL RCX, RAX*/ - addbyte(0x0f); - addbyte(0xaf); - addbyte(0xc8); - addbyte(0x48); /*SAR RBX, 30*/ - addbyte(0xc1); - addbyte(0xfb); - addbyte(30); - addbyte(0x48); /*SAR RCX, 30*/ - addbyte(0xc1); - addbyte(0xf9); - addbyte(30); - addbyte(0x48); /*BSR EDX, RAX*/ - addbyte(0x0f); - addbyte(0xbd); - addbyte(0xd0); - addbyte(0x48); /*SHL RAX, 8*/ - addbyte(0xc1); - addbyte(0xe0); - addbyte(8); - addbyte(0x89); /*MOV state->tex_t, ECX*/ - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, tex_t)); - addbyte(0x89); /*MOV ECX, EDX*/ - addbyte(0xd1); - addbyte(0x83); /*SUB EDX, 19*/ - addbyte(0xea); - addbyte(19); - addbyte(0x48); /*SHR RAX, CL*/ - addbyte(0xd3); - addbyte(0xe8); - addbyte(0xc1); /*SHL EDX, 8*/ - addbyte(0xe2); - addbyte(8); - addbyte(0x25); /*AND EAX, 0xff*/ - addlong(0xff); - addbyte(0x89); /*MOV state->tex_s, EBX*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tex_s)); - addbyte(0x41); /*MOVZX EAX, R9(logtable)[RAX]*/ - addbyte(0x0f); - addbyte(0xb6); - addbyte(0x04); - addbyte(0x01); - addbyte(0x09); /*OR EAX, EDX*/ - addbyte(0xd0); - addbyte(0x03); /*ADD EAX, state->lod*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tmu[tmu].lod)); - addbyte(0x3b); /*CMP EAX, state->lod_min*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod_min[tmu])); - addbyte(0x0f); /*CMOVL EAX, state->lod_min*/ - addbyte(0x4c); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod_min[tmu])); - addbyte(0x3b); /*CMP EAX, state->lod_max*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod_max[tmu])); - addbyte(0x0f); /*CMOVNL EAX, state->lod_max*/ - addbyte(0x4d); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod_max[tmu])); - addbyte(0xc1); /*SHR EAX, 8*/ - addbyte(0xe8); - addbyte(8); - addbyte(0x89); /*MOV state->lod, EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod)); - } - else - { - addbyte(0x48); /*MOV RAX, state->tmu0_s*/ - addbyte(0x8b); - addbyte(0x87); - addlong(tmu ? offsetof(voodoo_state_t, tmu1_s) : offsetof(voodoo_state_t, tmu0_s)); - addbyte(0x48); /*MOV RCX, state->tmu0_t*/ - addbyte(0x8b); - addbyte(0x8f); - addlong(tmu ? offsetof(voodoo_state_t, tmu1_t) : offsetof(voodoo_state_t, tmu0_t)); - addbyte(0x48); /*SHR RAX, 28*/ - addbyte(0xc1); - addbyte(0xe8); - addbyte(28); - addbyte(0x8b); /*MOV EBX, state->lod_min*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, lod_min[tmu])); - addbyte(0x48); /*SHR RCX, 28*/ - addbyte(0xc1); - addbyte(0xe9); - addbyte(28); - addbyte(0x48); /*MOV state->tex_s, RAX*/ - addbyte(0x89); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tex_s)); - addbyte(0xc1); /*SHR EBX, 8*/ - addbyte(0xeb); - addbyte(8); - addbyte(0x48); /*MOV state->tex_t, RCX*/ - addbyte(0x89); - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, tex_t)); - addbyte(0x89); /*MOV state->lod, EBX*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, lod)); - } - - if (params->fbzColorPath & FBZCP_TEXTURE_ENABLED) - { - if (voodoo->bilinear_enabled && (params->textureMode[tmu] & 6)) - { - addbyte(0xb2); /*MOV DL, 8*/ - addbyte(8); - addbyte(0x8b); /*MOV ECX, state->lod[RDI]*/ - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, lod)); - addbyte(0xbd); /*MOV EBP, 1*/ - addlong(1); - addbyte(0x28); /*SUB DL, CL*/ - addbyte(0xca); -// addbyte(0x8a); /*MOV DL, params->tex_shift[RSI+ECX*4]*/ -// addbyte(0x94); -// addbyte(0x8e); -// addlong(offsetof(voodoo_params_t, tex_shift)); - addbyte(0xd3); /*SHL EBP, CL*/ - addbyte(0xe5); - addbyte(0x8b); /*MOV EAX, state->tex_s[RDI]*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tex_s)); - addbyte(0xc1); /*SHL EBP, 3*/ - addbyte(0xe5); - addbyte(3); - addbyte(0x8b); /*MOV EBX, state->tex_t[RDI]*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tex_t)); - if (params->tLOD[tmu] & LOD_TMIRROR_S) - { - addbyte(0xa9); /*TEST EAX, 0x1000*/ - addlong(0x1000); - addbyte(0x74); /*JZ +*/ - addbyte(2); - addbyte(0xf7); /*NOT EAX*/ - addbyte(0xd0); - } - if (params->tLOD[tmu] & LOD_TMIRROR_T) - { - addbyte(0xf7); /*TEST EBX, 0x1000*/ - addbyte(0xc3); - addlong(0x1000); - addbyte(0x74); /*JZ +*/ - addbyte(2); - addbyte(0xf7); /*NOT EBX*/ - addbyte(0xd3); - } - addbyte(0x29); /*SUB EAX, EBP*/ - addbyte(0xe8); - addbyte(0x29); /*SUB EBX, EBP*/ - addbyte(0xeb); - addbyte(0xd3); /*SAR EAX, CL*/ - addbyte(0xf8); - addbyte(0xd3); /*SAR EBX, CL*/ - addbyte(0xfb); - addbyte(0x89); /*MOV EBP, EAX*/ - addbyte(0xc5); - addbyte(0x89); /*MOV ECX, EBX*/ - addbyte(0xd9); - addbyte(0x83); /*AND EBP, 0xf*/ - addbyte(0xe5); - addbyte(0xf); - addbyte(0xc1); /*SHL ECX, 4*/ - addbyte(0xe1); - addbyte(4); - addbyte(0xc1); /*SAR EAX, 4*/ - addbyte(0xf8); - addbyte(4); - addbyte(0x81); /*AND ECX, 0xf0*/ - addbyte(0xe1); - addlong(0xf0); - addbyte(0xc1); /*SAR EBX, 4*/ - addbyte(0xfb); - addbyte(4); - addbyte(0x09); /*OR EBP, ECX*/ - addbyte(0xcd); - addbyte(0x8b); /*MOV ECX, state->lod[RDI]*/ - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, lod)); - addbyte(0xc1); /*SHL EBP, 5*/ - addbyte(0xe5); - addbyte(5); - /*EAX = S, EBX = T, ECX = LOD, EDX = tex_shift, ESI=params, EDI=state, EBP = bilinear shift*/ - addbyte(0x48); /*LEA RSI, [RSI+RCX*4]*/ - addbyte(0x8d); - addbyte(0x34); - addbyte(0x8e); - addbyte(0x89); /*MOV ebp_store, EBP*/ - addbyte(0xaf); - addlong(offsetof(voodoo_state_t, ebp_store)); - addbyte(0x48); /*MOV RBP, state->tex[RDI+RCX*8]*/ - addbyte(0x8b); - addbyte(0xac); - addbyte(0xcf); - addlong(offsetof(voodoo_state_t, tex[tmu])); - addbyte(0x88); /*MOV CL, DL*/ - addbyte(0xd1); - addbyte(0x89); /*MOV EDX, EBX*/ - addbyte(0xda); - if (!state->clamp_s[tmu]) - { - addbyte(0x23); /*AND EAX, params->tex_w_mask[ESI]*/ - addbyte(0x86); - addlong(offsetof(voodoo_params_t, tex_w_mask[tmu])); - } - addbyte(0x83); /*ADD EDX, 1*/ - addbyte(0xc2); - addbyte(1); - if (state->clamp_t[tmu]) - { - addbyte(0x41); /*CMOVS EDX, R10(alookup[0](zero))*/ - addbyte(0x0f); - addbyte(0x48); - addbyte(0x12); - addbyte(0x3b); /*CMP EDX, params->tex_h_mask[ESI]*/ - addbyte(0x96); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); - addbyte(0x0f); /*CMOVA EDX, params->tex_h_mask[ESI]*/ - addbyte(0x47); - addbyte(0x96); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); - addbyte(0x85); /*TEST EBX,EBX*/ - addbyte(0xdb); - addbyte(0x41); /*CMOVS EBX, R10(alookup[0](zero))*/ - addbyte(0x0f); - addbyte(0x48); - addbyte(0x1a); - addbyte(0x3b); /*CMP EBX, params->tex_h_mask[ESI]*/ - addbyte(0x9e); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); - addbyte(0x0f); /*CMOVA EBX, params->tex_h_mask[ESI]*/ - addbyte(0x47); - addbyte(0x9e); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); - } - else - { - addbyte(0x23); /*AND EDX, params->tex_h_mask[ESI]*/ - addbyte(0x96); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); - addbyte(0x23); /*AND EBX, params->tex_h_mask[ESI]*/ - addbyte(0x9e); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); - } - /*EAX = S, EBX = T0, EDX = T1*/ - addbyte(0xd3); /*SHL EBX, CL*/ - addbyte(0xe3); - addbyte(0xd3); /*SHL EDX, CL*/ - addbyte(0xe2); - addbyte(0x48); /*LEA RBX,[RBP+RBX*4]*/ - addbyte(0x8d); - addbyte(0x5c); - addbyte(0x9d); - addbyte(0); - addbyte(0x48); /*LEA RDX,[RBP+RDX*4]*/ - addbyte(0x8d); - addbyte(0x54); - addbyte(0x95); - addbyte(0); - if (state->clamp_s[tmu]) - { - addbyte(0x8b); /*MOV EBP, params->tex_w_mask[ESI]*/ - addbyte(0xae); - addlong(offsetof(voodoo_params_t, tex_w_mask[tmu])); - addbyte(0x85); /*TEST EAX, EAX*/ - addbyte(0xc0); - addbyte(0x8b); /*MOV ebp_store2, RSI*/ - addbyte(0xb7); - addlong(offsetof(voodoo_state_t, ebp_store)); - addbyte(0x41); /*CMOVS EAX, R10(alookup[0](zero))*/ - addbyte(0x0f); - addbyte(0x48); - addbyte(0x02); - addbyte(0x78); /*JS + - clamp on 0*/ - addbyte(2+3+2+ 5+5+2); - addbyte(0x3b); /*CMP EAX, EBP*/ - addbyte(0xc5); - addbyte(0x0f); /*CMOVAE EAX, EBP*/ - addbyte(0x43); - addbyte(0xc5); - addbyte(0x73); /*JAE + - clamp on +*/ - addbyte(5+5+2); - } - else - { - addbyte(0x3b); /*CMP EAX, params->tex_w_mask[ESI] - is S at texture edge (ie will wrap/clamp)?*/ - addbyte(0x86); - addlong(offsetof(voodoo_params_t, tex_w_mask[tmu])); - addbyte(0x8b); /*MOV ebp_store2, ESI*/ - addbyte(0xb7); - addlong(offsetof(voodoo_state_t, ebp_store)); - addbyte(0x74); /*JE +*/ - addbyte(5+5+2); - } - - addbyte(0xf3); /*MOVQ XMM0, [RBX+RAX*4]*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0x04); - addbyte(0x83); - addbyte(0xf3); /*MOVQ XMM1, [RDX+RAX*4]*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0x0c); - addbyte(0x82); - - if (state->clamp_s[tmu]) - { - addbyte(0xeb); /*JMP +*/ - addbyte(5+5+4+4); - - /*S clamped - the two S coordinates are the same*/ - addbyte(0x66); /*MOVD XMM0, [RBX+RAX*4]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x04); - addbyte(0x83); - addbyte(0x66); /*MOVD XMM1, [RDX+RAX*4]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x0c); - addbyte(0x82); - addbyte(0x66); /*PUNPCKLDQ XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x62); - addbyte(0xc0); - addbyte(0x66); /*PUNPCKLDQ XMM1, XMM1*/ - addbyte(0x0f); - addbyte(0x62); - addbyte(0xc9); - } - else - { - addbyte(0xeb); /*JMP +*/ - addbyte(5+5+5+5+6+6); - - /*S wrapped - the two S coordinates are not contiguous*/ - addbyte(0x66); /*MOVD XMM0, [RBX+EAX*4]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x04); - addbyte(0x83); - addbyte(0x66); /*MOVD XMM1, [RDX+EAX*4]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x0c); - addbyte(0x82); - addbyte(0x66); /*PINSRW XMM0, [RBX], 2*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0x03); - addbyte(0x02); - addbyte(0x66); /*PINSRW XMM1, [RDX], 2*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0x0a); - addbyte(0x02); - addbyte(0x66); /*PINSRW XMM0, 2[RBX], 3*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0x43); - addbyte(0x02); - addbyte(0x03); - addbyte(0x66); /*PINSRW XMM1, 2[RDX], 3*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0x4a); - addbyte(0x02); - addbyte(0x03); - } - - addbyte(0x49); /*MOV R8, bilinear_lookup*/ - addbyte(0xb8); - addquad((uintptr_t)bilinear_lookup); - - addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xc2); - addbyte(0x66); /*PUNPCKLBW XMM1, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xca); - - addbyte(0x4c); /*ADD RSI, R8*/ - addbyte(0x01); - addbyte(0xc6); - - addbyte(0x66); /*PMULLW XMM0, bilinear_lookup[ESI]*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0x06); - addbyte(0x66); /*PMULLW XMM1, bilinear_lookup[ESI]+0x10*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0x4e); - addbyte(0x10); - addbyte(0x66); /*PADDW XMM0, XMM1*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc0 | 1 | (0 << 3)); - addbyte(0x66); /*MOV XMM1, XMM0*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0xc0 | 0 | (1 << 3)); - addbyte(0x66); /*PSRLDQ XMM0, 64*/ - addbyte(0x0f); - addbyte(0x73); - addbyte(0xd8); - addbyte(8); - addbyte(0x66); /*PADDW XMM0, XMM1*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc0 | 1 | (0 << 3)); - addbyte(0x66); /*PSRLW XMM0, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd0 | 0); - addbyte(8); - addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xc0); - - addbyte(0x4c); /*MOV RSI, R15*/ - addbyte(0x89); - addbyte(0xfe); - - addbyte(0x66); /*MOV EAX, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xc0); - } - else - { - addbyte(0xb2); /*MOV DL, 8*/ - addbyte(8); - addbyte(0x8b); /*MOV ECX, state->lod[RDI]*/ - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, lod)); - addbyte(0x48); /*MOV RBP, state->tex[RDI+RCX*8]*/ - addbyte(0x8b); - addbyte(0xac); - addbyte(0xcf); - addlong(offsetof(voodoo_state_t, tex[tmu])); - addbyte(0x28); /*SUB DL, CL*/ - addbyte(0xca); - addbyte(0x80); /*ADD CL, 4*/ - addbyte(0xc1); - addbyte(4); - addbyte(0x8b); /*MOV EAX, state->tex_s[EDI]*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tex_s)); - addbyte(0x8b); /*MOV EBX, state->tex_t[EDI]*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tex_t)); - if (params->tLOD[tmu] & LOD_TMIRROR_S) - { - addbyte(0xa9); /*TEST EAX, 0x1000*/ - addlong(0x1000); - addbyte(0x74); /*JZ +*/ - addbyte(2); - addbyte(0xf7); /*NOT EAX*/ - addbyte(0xd0); - } - if (params->tLOD[tmu] & LOD_TMIRROR_T) - { - addbyte(0xf7); /*TEST EBX, 0x1000*/ - addbyte(0xc3); - addlong(0x1000); - addbyte(0x74); /*JZ +*/ - addbyte(2); - addbyte(0xf7); /*NOT EBX*/ - addbyte(0xd3); - } - addbyte(0xd3); /*SHR EAX, CL*/ - addbyte(0xe8); - addbyte(0xd3); /*SHR EBX, CL*/ - addbyte(0xeb); - if (state->clamp_s[tmu]) - { - addbyte(0x85); /*TEST EAX, EAX*/ - addbyte(0xc0); - addbyte(0x41); /*CMOVS EAX, R10(alookup[0](zero))*/ - addbyte(0x0f); - addbyte(0x48); - addbyte(0x02); - addbyte(0x3b); /*CMP EAX, params->tex_w_mask[ESI+ECX*4]*/ - addbyte(0x84); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, tex_w_mask[tmu]) - 0x10); - addbyte(0x0f); /*CMOVAE EAX, params->tex_w_mask[ESI+ECX*4]*/ - addbyte(0x43); - addbyte(0x84); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, tex_w_mask[tmu]) - 0x10); - - } - else - { - addbyte(0x23); /*AND EAX, params->tex_w_mask-0x10[ESI+ECX*4]*/ - addbyte(0x84); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, tex_w_mask[tmu]) - 0x10); - } - if (state->clamp_t[tmu]) - { - addbyte(0x85); /*TEST EBX, EBX*/ - addbyte(0xdb); - addbyte(0x41); /*CMOVS EBX, R10(alookup[0](zero))*/ - addbyte(0x0f); - addbyte(0x48); - addbyte(0x1a); - addbyte(0x3b); /*CMP EBX, params->tex_h_mask[ESI+ECX*4]*/ - addbyte(0x9c); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu]) - 0x10); - addbyte(0x0f); /*CMOVAE EBX, params->tex_h_mask[ESI+ECX*4]*/ - addbyte(0x43); - addbyte(0x9c); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu]) - 0x10); - } - else - { - addbyte(0x23); /*AND EBX, params->tex_h_mask-0x10[ESI+ECX*4]*/ - addbyte(0x9c); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu]) - 0x10); - } - addbyte(0x88); /*MOV CL, DL*/ - addbyte(0xd1); - addbyte(0xd3); /*SHL EBX, CL*/ - addbyte(0xe3); - addbyte(0x01); /*ADD EBX, EAX*/ - addbyte(0xc3); - - addbyte(0x8b); /*MOV EAX, [RBP+RBX*4]*/ - addbyte(0x44); - addbyte(0x9d); - addbyte(0); - } - } - - return block_pos; -} - -static inline void voodoo_generate(uint8_t *code_block, voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int depthop) -{ - int block_pos = 0; - int z_skip_pos = 0; - int a_skip_pos = 0; - int chroma_skip_pos = 0; - int depth_jump_pos = 0; - int depth_jump_pos2 = 0; - int loop_jump_pos = 0; -// xmm_01_w = (__m128i)0x0001000100010001ull; -// xmm_ff_w = (__m128i)0x00ff00ff00ff00ffull; -// xmm_ff_b = (__m128i)0x00000000ffffffffull; - xmm_01_w = _mm_set_epi32(0, 0, 0x00010001, 0x00010001); - xmm_ff_w = _mm_set_epi32(0, 0, 0x00ff00ff, 0x00ff00ff); - xmm_ff_b = _mm_set_epi32(0, 0, 0, 0x00ffffff); - minus_254 = _mm_set_epi32(0, 0, 0xff02ff02, 0xff02ff02); -// *(uint64_t *)&const_1_48 = 0x45b0000000000000ull; -// block_pos = 0; -// voodoo_get_depth = &code_block[block_pos]; - /*W at (%esp+4) - Z at (%esp+12) - new_depth at (%esp+16)*/ -// if ((params->fbzMode & FBZ_DEPTH_ENABLE) && (depth_op == DEPTHOP_NEVER)) -// { -// addbyte(0xC3); /*RET*/ -// return; -// } - addbyte(0x55); /*PUSH RBP*/ - addbyte(0x57); /*PUSH RDI*/ - addbyte(0x56); /*PUSH RSI*/ - addbyte(0x53); /*PUSH RBX*/ - addbyte(0x41); /*PUSH R12*/ - addbyte(0x54); - addbyte(0x41); /*PUSH R13*/ - addbyte(0x55); - addbyte(0x41); /*PUSH R14*/ - addbyte(0x56); - addbyte(0x41); /*PUSH R15*/ - addbyte(0x57); - - addbyte(0x49); /*MOV R15, xmm_01_w*/ - addbyte(0xbf); - addquad((uint64_t)(uintptr_t)&xmm_01_w); - addbyte(0x66); /*MOVDQA XMM8, [R15]*/ - addbyte(0x45); - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x07 | (0 << 3)); - addbyte(0x49); /*MOV R15, xmm_ff_w*/ - addbyte(0xbf); - addquad((uint64_t)(uintptr_t)&xmm_ff_w); - addbyte(0x66); /*MOVDQA XMM9, [R15]*/ - addbyte(0x45); - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x07 | (1 << 3)); - addbyte(0x49); /*MOV R15, xmm_ff_b*/ - addbyte(0xbf); - addquad((uint64_t)(uintptr_t)&xmm_ff_b); - addbyte(0x66); /*MOVDQA XMM10, [R15]*/ - addbyte(0x45); - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x07 | (2 << 3)); - addbyte(0x49); /*MOV R15, minus_254*/ - addbyte(0xbf); - addquad((uint64_t)(uintptr_t)&minus_254); - addbyte(0x66); /*MOVDQA XMM11, [R15]*/ - addbyte(0x45); - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x07 | (3 << 3)); - -#if _WIN64 - addbyte(0x48); /*MOV RDI, RCX (voodoo_state)*/ - addbyte(0x89); - addbyte(0xcf); - addbyte(0x49); /*MOV R15, RDX (voodoo_params)*/ - addbyte(0x89); - addbyte(0xd7); - addbyte(0x4d); /*MOV R14, R9 (real_y)*/ - addbyte(0x89); - addbyte(0xce); -#else - addbyte(0x49); /*MOV R14, RCX (real_y)*/ - addbyte(0x89); - addbyte(0xce); - addbyte(0x49); /*MOV R15, RSI (voodoo_state)*/ - addbyte(0x89); - addbyte(0xf7); -#endif - - addbyte(0x49); /*MOV R9, logtable*/ - addbyte(0xb8 | (9 & 7)); - addquad((uint64_t)(uintptr_t)&logtable); - addbyte(0x49); /*MOV R10, alookup*/ - addbyte(0xb8 | (10 & 7)); - addquad((uint64_t)(uintptr_t)&alookup); - addbyte(0x49); /*MOV R11, aminuslookup*/ - addbyte(0xb8 | (11 & 7)); - addquad((uint64_t)(uintptr_t)&aminuslookup); - addbyte(0x49); /*MOV R12, xmm_00_ff_w*/ - addbyte(0xb8 | (12 & 7)); - addquad((uint64_t)(uintptr_t)&xmm_00_ff_w); - addbyte(0x49); /*MOV R13, i_00_ff_w*/ - addbyte(0xb8 | (13 & 7)); - addquad((uint64_t)(uintptr_t)&i_00_ff_w); - - loop_jump_pos = block_pos; - addbyte(0x4c); /*MOV RSI, R15*/ - addbyte(0x89); - addbyte(0xfe); - if (params->col_tiled || params->aux_tiled) - { - addbyte(0x8b); /*MOV EAX, state->x[EDI]*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, x)); - addbyte(0x89); /*MOV EBX, EAX*/ - addbyte(0xc3); - addbyte(0x83); /*AND EAX, 63*/ - addbyte(0xe0); - addbyte(63); - addbyte(0xc1); /*SHR EBX, 6*/ - addbyte(0xeb); - addbyte(6); - addbyte(0xc1); /*SHL EBX, 11 - tile is 128*32, << 12, div 2 because word index*/ - addbyte(0xe3); - addbyte(11); - addbyte(0x01); /*ADD EAX, EBX*/ - addbyte(0xd8); - addbyte(0x89); /*MOV state->x_tiled[EDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, x_tiled)); - } - addbyte(0x66); /*PXOR XMM2, XMM2*/ - addbyte(0x0f); - addbyte(0xef); + if (params->textureMode[tmu] & 1) { + addbyte(0x48); /*MOV RBX, state->tmu0_s*/ + addbyte(0x8b); + addbyte(0x9f); + addlong(tmu ? offsetof(voodoo_state_t, tmu1_s) : offsetof(voodoo_state_t, tmu0_s)); + addbyte(0x48); /*MOV RAX, (1 << 48)*/ + addbyte(0xb8); + addquad(1ULL << 48); + addbyte(0x48); /*XOR RDX, RDX*/ + addbyte(0x31); addbyte(0xd2); + addbyte(0x48); /*MOV RCX, state->tmu0_t*/ + addbyte(0x8b); + addbyte(0x8f); + addlong(tmu ? offsetof(voodoo_state_t, tmu1_t) : offsetof(voodoo_state_t, tmu0_t)); + addbyte(0x48); /*CMP state->tmu_w, 0*/ + addbyte(0x83); + addbyte(0xbf); + addlong(tmu ? offsetof(voodoo_state_t, tmu1_w) : offsetof(voodoo_state_t, tmu0_w)); + addbyte(0); + addbyte(0x74); /*JZ +*/ + addbyte(7); + addbyte(0x48); /*IDIV state->tmu_w*/ + addbyte(0xf7); + addbyte(0xbf); + addlong(tmu ? offsetof(voodoo_state_t, tmu1_w) : offsetof(voodoo_state_t, tmu0_w)); + addbyte(0x48); /*SAR RBX, 14*/ + addbyte(0xc1); + addbyte(0xfb); + addbyte(14); + addbyte(0x48); /*SAR RCX, 14*/ + addbyte(0xc1); + addbyte(0xf9); + addbyte(14); + addbyte(0x48); /*IMUL RBX, RAX*/ + addbyte(0x0f); + addbyte(0xaf); + addbyte(0xd8); + addbyte(0x48); /*IMUL RCX, RAX*/ + addbyte(0x0f); + addbyte(0xaf); + addbyte(0xc8); + addbyte(0x48); /*SAR RBX, 30*/ + addbyte(0xc1); + addbyte(0xfb); + addbyte(30); + addbyte(0x48); /*SAR RCX, 30*/ + addbyte(0xc1); + addbyte(0xf9); + addbyte(30); + addbyte(0x48); /*BSR EDX, RAX*/ + addbyte(0x0f); + addbyte(0xbd); + addbyte(0xd0); + addbyte(0x48); /*SHL RAX, 8*/ + addbyte(0xc1); + addbyte(0xe0); + addbyte(8); + addbyte(0x89); /*MOV state->tex_t, ECX*/ + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, tex_t)); + addbyte(0x89); /*MOV ECX, EDX*/ + addbyte(0xd1); + addbyte(0x83); /*SUB EDX, 19*/ + addbyte(0xea); + addbyte(19); + addbyte(0x48); /*SHR RAX, CL*/ + addbyte(0xd3); + addbyte(0xe8); + addbyte(0xc1); /*SHL EDX, 8*/ + addbyte(0xe2); + addbyte(8); + addbyte(0x25); /*AND EAX, 0xff*/ + addlong(0xff); + addbyte(0x89); /*MOV state->tex_s, EBX*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tex_s)); + addbyte(0x41); /*MOVZX EAX, R9(logtable)[RAX]*/ + addbyte(0x0f); + addbyte(0xb6); + addbyte(0x04); + addbyte(0x01); + addbyte(0x09); /*OR EAX, EDX*/ + addbyte(0xd0); + addbyte(0x03); /*ADD EAX, state->lod*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tmu[tmu].lod)); + addbyte(0x3b); /*CMP EAX, state->lod_min*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod_min[tmu])); + addbyte(0x0f); /*CMOVL EAX, state->lod_min*/ + addbyte(0x4c); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod_min[tmu])); + addbyte(0x3b); /*CMP EAX, state->lod_max*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod_max[tmu])); + addbyte(0x0f); /*CMOVNL EAX, state->lod_max*/ + addbyte(0x4d); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod_max[tmu])); + addbyte(0xc1); /*SHR EAX, 8*/ + addbyte(0xe8); + addbyte(8); + addbyte(0x89); /*MOV state->lod, EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod)); + } else { + addbyte(0x48); /*MOV RAX, state->tmu0_s*/ + addbyte(0x8b); + addbyte(0x87); + addlong(tmu ? offsetof(voodoo_state_t, tmu1_s) : offsetof(voodoo_state_t, tmu0_s)); + addbyte(0x48); /*MOV RCX, state->tmu0_t*/ + addbyte(0x8b); + addbyte(0x8f); + addlong(tmu ? offsetof(voodoo_state_t, tmu1_t) : offsetof(voodoo_state_t, tmu0_t)); + addbyte(0x48); /*SHR RAX, 28*/ + addbyte(0xc1); + addbyte(0xe8); + addbyte(28); + addbyte(0x8b); /*MOV EBX, state->lod_min*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, lod_min[tmu])); + addbyte(0x48); /*SHR RCX, 28*/ + addbyte(0xc1); + addbyte(0xe9); + addbyte(28); + addbyte(0x48); /*MOV state->tex_s, RAX*/ + addbyte(0x89); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tex_s)); + addbyte(0xc1); /*SHR EBX, 8*/ + addbyte(0xeb); + addbyte(8); + addbyte(0x48); /*MOV state->tex_t, RCX*/ + addbyte(0x89); + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, tex_t)); + addbyte(0x89); /*MOV state->lod, EBX*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, lod)); + } - if ((params->fbzMode & FBZ_W_BUFFER) || (params->fogMode & (FOG_ENABLE|FOG_CONSTANT|FOG_Z|FOG_ALPHA)) == FOG_ENABLE) - { - addbyte(0xb8); /*MOV new_depth, 0*/ - addlong(0); - addbyte(0x66); /*TEST w+4, 0xffff*/ - addbyte(0xf7); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, w)+4); - addword(0xffff); - addbyte(0x75); /*JNZ got_depth*/ - depth_jump_pos = block_pos; - addbyte(0); -// addbyte(4+5+2+3+2+5+5+3+2+2+2+/*3+*/3+2+6+4+5+2+3); - addbyte(0x8b); /*MOV EDX, w*/ - addbyte(0x97); - addlong(offsetof(voodoo_state_t, w)); - addbyte(0xb8); /*MOV new_depth, 0xf001*/ - addlong(0xf001); - addbyte(0x89); /*MOV EBX, EDX*/ - addbyte(0xd3); - addbyte(0xc1); /*SHR EDX, 16*/ - addbyte(0xea); - addbyte(16); - addbyte(0x74); /*JZ got_depth*/ - depth_jump_pos2 = block_pos; - addbyte(0); -// addbyte(5+5+3+2+2+2+/*3+*/3+2+6+4+5+2+3); - addbyte(0xb9); /*MOV ECX, 19*/ - addlong(19); - addbyte(0x0f); /*BSR EAX, EDX*/ - addbyte(0xbd); - addbyte(0xc2); - addbyte(0xba); /*MOV EDX, 15*/ - addlong(15); + if (params->fbzColorPath & FBZCP_TEXTURE_ENABLED) { + if (voodoo->bilinear_enabled && (params->textureMode[tmu] & 6)) { + addbyte(0xb2); /*MOV DL, 8*/ + addbyte(8); + addbyte(0x8b); /*MOV ECX, state->lod[RDI]*/ + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, lod)); + addbyte(0xbd); /*MOV EBP, 1*/ + addlong(1); + addbyte(0x28); /*SUB DL, CL*/ + addbyte(0xca); + // addbyte(0x8a); /*MOV DL, params->tex_shift[RSI+ECX*4]*/ + // addbyte(0x94); + // addbyte(0x8e); + // addlong(offsetof(voodoo_params_t, tex_shift)); + addbyte(0xd3); /*SHL EBP, CL*/ + addbyte(0xe5); + addbyte(0x8b); /*MOV EAX, state->tex_s[RDI]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tex_s)); + addbyte(0xc1); /*SHL EBP, 3*/ + addbyte(0xe5); + addbyte(3); + addbyte(0x8b); /*MOV EBX, state->tex_t[RDI]*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tex_t)); + if (params->tLOD[tmu] & LOD_TMIRROR_S) { + addbyte(0xa9); /*TEST EAX, 0x1000*/ + addlong(0x1000); + addbyte(0x74); /*JZ +*/ + addbyte(2); + addbyte(0xf7); /*NOT EAX*/ + addbyte(0xd0); + } + if (params->tLOD[tmu] & LOD_TMIRROR_T) { + addbyte(0xf7); /*TEST EBX, 0x1000*/ + addbyte(0xc3); + addlong(0x1000); + addbyte(0x74); /*JZ +*/ + addbyte(2); addbyte(0xf7); /*NOT EBX*/ addbyte(0xd3); - addbyte(0x29); /*SUB EDX, EAX - EDX = exp*/ - addbyte(0xc2); - addbyte(0x29); /*SUB ECX, EDX*/ - addbyte(0xd1); - addbyte(0xc1); /*SHL EDX, 12*/ - addbyte(0xe2); - addbyte(12); - addbyte(0xd3); /*SHR EBX, CL*/ - addbyte(0xeb); - addbyte(0x81); /*AND EBX, 0xfff - EBX = mant*/ - addbyte(0xe3); - addlong(0xfff); - addbyte(0x67); /*LEA EAX, 1[EDX, EBX]*/ - addbyte(0x8d); - addbyte(0x44); - addbyte(0x13); - addbyte(1); - addbyte(0xbb); /*MOV EBX, 0xffff*/ - addlong(0xffff); - addbyte(0x39); /*CMP EAX, EBX*/ - addbyte(0xd8); - addbyte(0x0f); /*CMOVA EAX, EBX*/ + } + addbyte(0x29); /*SUB EAX, EBP*/ + addbyte(0xe8); + addbyte(0x29); /*SUB EBX, EBP*/ + addbyte(0xeb); + addbyte(0xd3); /*SAR EAX, CL*/ + addbyte(0xf8); + addbyte(0xd3); /*SAR EBX, CL*/ + addbyte(0xfb); + addbyte(0x89); /*MOV EBP, EAX*/ + addbyte(0xc5); + addbyte(0x89); /*MOV ECX, EBX*/ + addbyte(0xd9); + addbyte(0x83); /*AND EBP, 0xf*/ + addbyte(0xe5); + addbyte(0xf); + addbyte(0xc1); /*SHL ECX, 4*/ + addbyte(0xe1); + addbyte(4); + addbyte(0xc1); /*SAR EAX, 4*/ + addbyte(0xf8); + addbyte(4); + addbyte(0x81); /*AND ECX, 0xf0*/ + addbyte(0xe1); + addlong(0xf0); + addbyte(0xc1); /*SAR EBX, 4*/ + addbyte(0xfb); + addbyte(4); + addbyte(0x09); /*OR EBP, ECX*/ + addbyte(0xcd); + addbyte(0x8b); /*MOV ECX, state->lod[RDI]*/ + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, lod)); + addbyte(0xc1); /*SHL EBP, 5*/ + addbyte(0xe5); + addbyte(5); + /*EAX = S, EBX = T, ECX = LOD, EDX = tex_shift, ESI=params, EDI=state, EBP = bilinear shift*/ + addbyte(0x48); /*LEA RSI, [RSI+RCX*4]*/ + addbyte(0x8d); + addbyte(0x34); + addbyte(0x8e); + addbyte(0x89); /*MOV ebp_store, EBP*/ + addbyte(0xaf); + addlong(offsetof(voodoo_state_t, ebp_store)); + addbyte(0x48); /*MOV RBP, state->tex[RDI+RCX*8]*/ + addbyte(0x8b); + addbyte(0xac); + addbyte(0xcf); + addlong(offsetof(voodoo_state_t, tex[tmu])); + addbyte(0x88); /*MOV CL, DL*/ + addbyte(0xd1); + addbyte(0x89); /*MOV EDX, EBX*/ + addbyte(0xda); + if (!state->clamp_s[tmu]) { + addbyte(0x23); /*AND EAX, params->tex_w_mask[ESI]*/ + addbyte(0x86); + addlong(offsetof(voodoo_params_t, tex_w_mask[tmu])); + } + addbyte(0x83); /*ADD EDX, 1*/ + addbyte(0xc2); + addbyte(1); + if (state->clamp_t[tmu]) { + addbyte(0x41); /*CMOVS EDX, R10(alookup[0](zero))*/ + addbyte(0x0f); + addbyte(0x48); + addbyte(0x12); + addbyte(0x3b); /*CMP EDX, params->tex_h_mask[ESI]*/ + addbyte(0x96); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); + addbyte(0x0f); /*CMOVA EDX, params->tex_h_mask[ESI]*/ addbyte(0x47); + addbyte(0x96); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); + addbyte(0x85); /*TEST EBX,EBX*/ + addbyte(0xdb); + addbyte(0x41); /*CMOVS EBX, R10(alookup[0](zero))*/ + addbyte(0x0f); + addbyte(0x48); + addbyte(0x1a); + addbyte(0x3b); /*CMP EBX, params->tex_h_mask[ESI]*/ + addbyte(0x9e); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); + addbyte(0x0f); /*CMOVA EBX, params->tex_h_mask[ESI]*/ + addbyte(0x47); + addbyte(0x9e); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); + } else { + addbyte(0x23); /*AND EDX, params->tex_h_mask[ESI]*/ + addbyte(0x96); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); + addbyte(0x23); /*AND EBX, params->tex_h_mask[ESI]*/ + addbyte(0x9e); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); + } + /*EAX = S, EBX = T0, EDX = T1*/ + addbyte(0xd3); /*SHL EBX, CL*/ + addbyte(0xe3); + addbyte(0xd3); /*SHL EDX, CL*/ + addbyte(0xe2); + addbyte(0x48); /*LEA RBX,[RBP+RBX*4]*/ + addbyte(0x8d); + addbyte(0x5c); + addbyte(0x9d); + addbyte(0); + addbyte(0x48); /*LEA RDX,[RBP+RDX*4]*/ + addbyte(0x8d); + addbyte(0x54); + addbyte(0x95); + addbyte(0); + if (state->clamp_s[tmu]) { + addbyte(0x8b); /*MOV EBP, params->tex_w_mask[ESI]*/ + addbyte(0xae); + addlong(offsetof(voodoo_params_t, tex_w_mask[tmu])); + addbyte(0x85); /*TEST EAX, EAX*/ + addbyte(0xc0); + addbyte(0x8b); /*MOV ebp_store2, RSI*/ + addbyte(0xb7); + addlong(offsetof(voodoo_state_t, ebp_store)); + addbyte(0x41); /*CMOVS EAX, R10(alookup[0](zero))*/ + addbyte(0x0f); + addbyte(0x48); + addbyte(0x02); + addbyte(0x78); /*JS + - clamp on 0*/ + addbyte(2 + 3 + 2 + 5 + 5 + 2); + addbyte(0x3b); /*CMP EAX, EBP*/ + addbyte(0xc5); + addbyte(0x0f); /*CMOVAE EAX, EBP*/ + addbyte(0x43); + addbyte(0xc5); + addbyte(0x73); /*JAE + - clamp on +*/ + addbyte(5 + 5 + 2); + } else { + addbyte(0x3b); /*CMP EAX, params->tex_w_mask[ESI] - is S at texture edge (ie will wrap/clamp)?*/ + addbyte(0x86); + addlong(offsetof(voodoo_params_t, tex_w_mask[tmu])); + addbyte(0x8b); /*MOV ebp_store2, ESI*/ + addbyte(0xb7); + addlong(offsetof(voodoo_state_t, ebp_store)); + addbyte(0x74); /*JE +*/ + addbyte(5 + 5 + 2); + } + + addbyte(0xf3); /*MOVQ XMM0, [RBX+RAX*4]*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0x04); + addbyte(0x83); + addbyte(0xf3); /*MOVQ XMM1, [RDX+RAX*4]*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0x0c); + addbyte(0x82); + + if (state->clamp_s[tmu]) { + addbyte(0xeb); /*JMP +*/ + addbyte(5 + 5 + 4 + 4); + + /*S clamped - the two S coordinates are the same*/ + addbyte(0x66); /*MOVD XMM0, [RBX+RAX*4]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x04); + addbyte(0x83); + addbyte(0x66); /*MOVD XMM1, [RDX+RAX*4]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x0c); + addbyte(0x82); + addbyte(0x66); /*PUNPCKLDQ XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x62); + addbyte(0xc0); + addbyte(0x66); /*PUNPCKLDQ XMM1, XMM1*/ + addbyte(0x0f); + addbyte(0x62); + addbyte(0xc9); + } else { + addbyte(0xeb); /*JMP +*/ + addbyte(5 + 5 + 5 + 5 + 6 + 6); + + /*S wrapped - the two S coordinates are not contiguous*/ + addbyte(0x66); /*MOVD XMM0, [RBX+EAX*4]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x04); + addbyte(0x83); + addbyte(0x66); /*MOVD XMM1, [RDX+EAX*4]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x0c); + addbyte(0x82); + addbyte(0x66); /*PINSRW XMM0, [RBX], 2*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0x03); + addbyte(0x02); + addbyte(0x66); /*PINSRW XMM1, [RDX], 2*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0x0a); + addbyte(0x02); + addbyte(0x66); /*PINSRW XMM0, 2[RBX], 3*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0x43); + addbyte(0x02); + addbyte(0x03); + addbyte(0x66); /*PINSRW XMM1, 2[RDX], 3*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0x4a); + addbyte(0x02); + addbyte(0x03); + } + + addbyte(0x49); /*MOV R8, bilinear_lookup*/ + addbyte(0xb8); + addquad((uintptr_t) bilinear_lookup); + + addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xc2); + addbyte(0x66); /*PUNPCKLBW XMM1, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xca); + + addbyte(0x4c); /*ADD RSI, R8*/ + addbyte(0x01); + addbyte(0xc6); + + addbyte(0x66); /*PMULLW XMM0, bilinear_lookup[ESI]*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0x06); + addbyte(0x66); /*PMULLW XMM1, bilinear_lookup[ESI]+0x10*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0x4e); + addbyte(0x10); + addbyte(0x66); /*PADDW XMM0, XMM1*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc0 | 1 | (0 << 3)); + addbyte(0x66); /*MOV XMM1, XMM0*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0xc0 | 0 | (1 << 3)); + addbyte(0x66); /*PSRLDQ XMM0, 64*/ + addbyte(0x0f); + addbyte(0x73); + addbyte(0xd8); + addbyte(8); + addbyte(0x66); /*PADDW XMM0, XMM1*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc0 | 1 | (0 << 3)); + addbyte(0x66); /*PSRLW XMM0, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd0 | 0); + addbyte(8); + addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xc0); + + addbyte(0x4c); /*MOV RSI, R15*/ + addbyte(0x89); + addbyte(0xfe); + + addbyte(0x66); /*MOV EAX, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xc0); + } else { + addbyte(0xb2); /*MOV DL, 8*/ + addbyte(8); + addbyte(0x8b); /*MOV ECX, state->lod[RDI]*/ + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, lod)); + addbyte(0x48); /*MOV RBP, state->tex[RDI+RCX*8]*/ + addbyte(0x8b); + addbyte(0xac); + addbyte(0xcf); + addlong(offsetof(voodoo_state_t, tex[tmu])); + addbyte(0x28); /*SUB DL, CL*/ + addbyte(0xca); + addbyte(0x80); /*ADD CL, 4*/ + addbyte(0xc1); + addbyte(4); + addbyte(0x8b); /*MOV EAX, state->tex_s[EDI]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tex_s)); + addbyte(0x8b); /*MOV EBX, state->tex_t[EDI]*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tex_t)); + if (params->tLOD[tmu] & LOD_TMIRROR_S) { + addbyte(0xa9); /*TEST EAX, 0x1000*/ + addlong(0x1000); + addbyte(0x74); /*JZ +*/ + addbyte(2); + addbyte(0xf7); /*NOT EAX*/ + addbyte(0xd0); + } + if (params->tLOD[tmu] & LOD_TMIRROR_T) { + addbyte(0xf7); /*TEST EBX, 0x1000*/ addbyte(0xc3); + addlong(0x1000); + addbyte(0x74); /*JZ +*/ + addbyte(2); + addbyte(0xf7); /*NOT EBX*/ + addbyte(0xd3); + } + addbyte(0xd3); /*SHR EAX, CL*/ + addbyte(0xe8); + addbyte(0xd3); /*SHR EBX, CL*/ + addbyte(0xeb); + if (state->clamp_s[tmu]) { + addbyte(0x85); /*TEST EAX, EAX*/ + addbyte(0xc0); + addbyte(0x41); /*CMOVS EAX, R10(alookup[0](zero))*/ + addbyte(0x0f); + addbyte(0x48); + addbyte(0x02); + addbyte(0x3b); /*CMP EAX, params->tex_w_mask[ESI+ECX*4]*/ + addbyte(0x84); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, tex_w_mask[tmu]) - 0x10); + addbyte(0x0f); /*CMOVAE EAX, params->tex_w_mask[ESI+ECX*4]*/ + addbyte(0x43); + addbyte(0x84); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, tex_w_mask[tmu]) - 0x10); - if (depth_jump_pos) - *(uint8_t *)&code_block[depth_jump_pos] = (block_pos - depth_jump_pos) - 1; - if (depth_jump_pos) - *(uint8_t *)&code_block[depth_jump_pos2] = (block_pos - depth_jump_pos2) - 1; + } else { + addbyte(0x23); /*AND EAX, params->tex_w_mask-0x10[ESI+ECX*4]*/ + addbyte(0x84); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, tex_w_mask[tmu]) - 0x10); + } + if (state->clamp_t[tmu]) { + addbyte(0x85); /*TEST EBX, EBX*/ + addbyte(0xdb); + addbyte(0x41); /*CMOVS EBX, R10(alookup[0](zero))*/ + addbyte(0x0f); + addbyte(0x48); + addbyte(0x1a); + addbyte(0x3b); /*CMP EBX, params->tex_h_mask[ESI+ECX*4]*/ + addbyte(0x9c); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu]) - 0x10); + addbyte(0x0f); /*CMOVAE EBX, params->tex_h_mask[ESI+ECX*4]*/ + addbyte(0x43); + addbyte(0x9c); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu]) - 0x10); + } else { + addbyte(0x23); /*AND EBX, params->tex_h_mask-0x10[ESI+ECX*4]*/ + addbyte(0x9c); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu]) - 0x10); + } + addbyte(0x88); /*MOV CL, DL*/ + addbyte(0xd1); + addbyte(0xd3); /*SHL EBX, CL*/ + addbyte(0xe3); + addbyte(0x01); /*ADD EBX, EAX*/ + addbyte(0xc3); - if ((params->fogMode & (FOG_ENABLE|FOG_CONSTANT|FOG_Z|FOG_ALPHA)) == FOG_ENABLE) - { - addbyte(0x89); /*MOV state->w_depth[EDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, w_depth)); - } + addbyte(0x8b); /*MOV EAX, [RBP+RBX*4]*/ + addbyte(0x44); + addbyte(0x9d); + addbyte(0); } - if (!(params->fbzMode & FBZ_W_BUFFER)) - { - addbyte(0x8b); /*MOV EAX, z*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, z)); - addbyte(0xbb); /*MOV EBX, 0xffff*/ - addlong(0xffff); + } + + return block_pos; +} + +static inline void +voodoo_generate(uint8_t *code_block, voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int depthop) +{ + int block_pos = 0; + int z_skip_pos = 0; + int a_skip_pos = 0; + int chroma_skip_pos = 0; + int depth_jump_pos = 0; + int depth_jump_pos2 = 0; + int loop_jump_pos = 0; + // xmm_01_w = (__m128i)0x0001000100010001ull; + // xmm_ff_w = (__m128i)0x00ff00ff00ff00ffull; + // xmm_ff_b = (__m128i)0x00000000ffffffffull; + xmm_01_w = _mm_set_epi32(0, 0, 0x00010001, 0x00010001); + xmm_ff_w = _mm_set_epi32(0, 0, 0x00ff00ff, 0x00ff00ff); + xmm_ff_b = _mm_set_epi32(0, 0, 0, 0x00ffffff); + minus_254 = _mm_set_epi32(0, 0, 0xff02ff02, 0xff02ff02); + // *(uint64_t *)&const_1_48 = 0x45b0000000000000ull; + // block_pos = 0; + // voodoo_get_depth = &code_block[block_pos]; + /*W at (%esp+4) + Z at (%esp+12) + new_depth at (%esp+16)*/ + // if ((params->fbzMode & FBZ_DEPTH_ENABLE) && (depth_op == DEPTHOP_NEVER)) + // { + // addbyte(0xC3); /*RET*/ + // return; + // } + addbyte(0x55); /*PUSH RBP*/ + addbyte(0x57); /*PUSH RDI*/ + addbyte(0x56); /*PUSH RSI*/ + addbyte(0x53); /*PUSH RBX*/ + addbyte(0x41); /*PUSH R12*/ + addbyte(0x54); + addbyte(0x41); /*PUSH R13*/ + addbyte(0x55); + addbyte(0x41); /*PUSH R14*/ + addbyte(0x56); + addbyte(0x41); /*PUSH R15*/ + addbyte(0x57); + + addbyte(0x49); /*MOV R15, xmm_01_w*/ + addbyte(0xbf); + addquad((uint64_t) (uintptr_t) &xmm_01_w); + addbyte(0x66); /*MOVDQA XMM8, [R15]*/ + addbyte(0x45); + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x07 | (0 << 3)); + addbyte(0x49); /*MOV R15, xmm_ff_w*/ + addbyte(0xbf); + addquad((uint64_t) (uintptr_t) &xmm_ff_w); + addbyte(0x66); /*MOVDQA XMM9, [R15]*/ + addbyte(0x45); + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x07 | (1 << 3)); + addbyte(0x49); /*MOV R15, xmm_ff_b*/ + addbyte(0xbf); + addquad((uint64_t) (uintptr_t) &xmm_ff_b); + addbyte(0x66); /*MOVDQA XMM10, [R15]*/ + addbyte(0x45); + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x07 | (2 << 3)); + addbyte(0x49); /*MOV R15, minus_254*/ + addbyte(0xbf); + addquad((uint64_t) (uintptr_t) &minus_254); + addbyte(0x66); /*MOVDQA XMM11, [R15]*/ + addbyte(0x45); + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x07 | (3 << 3)); + +#if _WIN64 + addbyte(0x48); /*MOV RDI, RCX (voodoo_state)*/ + addbyte(0x89); + addbyte(0xcf); + addbyte(0x49); /*MOV R15, RDX (voodoo_params)*/ + addbyte(0x89); + addbyte(0xd7); + addbyte(0x4d); /*MOV R14, R9 (real_y)*/ + addbyte(0x89); + addbyte(0xce); +#else + addbyte(0x49); /*MOV R14, RCX (real_y)*/ + addbyte(0x89); + addbyte(0xce); + addbyte(0x49); /*MOV R15, RSI (voodoo_state)*/ + addbyte(0x89); + addbyte(0xf7); +#endif + + addbyte(0x49); /*MOV R9, logtable*/ + addbyte(0xb8 | (9 & 7)); + addquad((uint64_t) (uintptr_t) &logtable); + addbyte(0x49); /*MOV R10, alookup*/ + addbyte(0xb8 | (10 & 7)); + addquad((uint64_t) (uintptr_t) &alookup); + addbyte(0x49); /*MOV R11, aminuslookup*/ + addbyte(0xb8 | (11 & 7)); + addquad((uint64_t) (uintptr_t) &aminuslookup); + addbyte(0x49); /*MOV R12, xmm_00_ff_w*/ + addbyte(0xb8 | (12 & 7)); + addquad((uint64_t) (uintptr_t) &xmm_00_ff_w); + addbyte(0x49); /*MOV R13, i_00_ff_w*/ + addbyte(0xb8 | (13 & 7)); + addquad((uint64_t) (uintptr_t) &i_00_ff_w); + + loop_jump_pos = block_pos; + addbyte(0x4c); /*MOV RSI, R15*/ + addbyte(0x89); + addbyte(0xfe); + if (params->col_tiled || params->aux_tiled) { + addbyte(0x8b); /*MOV EAX, state->x[EDI]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, x)); + addbyte(0x89); /*MOV EBX, EAX*/ + addbyte(0xc3); + addbyte(0x83); /*AND EAX, 63*/ + addbyte(0xe0); + addbyte(63); + addbyte(0xc1); /*SHR EBX, 6*/ + addbyte(0xeb); + addbyte(6); + addbyte(0xc1); /*SHL EBX, 11 - tile is 128*32, << 12, div 2 because word index*/ + addbyte(0xe3); + addbyte(11); + addbyte(0x01); /*ADD EAX, EBX*/ + addbyte(0xd8); + addbyte(0x89); /*MOV state->x_tiled[EDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, x_tiled)); + } + addbyte(0x66); /*PXOR XMM2, XMM2*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xd2); + + if ((params->fbzMode & FBZ_W_BUFFER) || (params->fogMode & (FOG_ENABLE | FOG_CONSTANT | FOG_Z | FOG_ALPHA)) == FOG_ENABLE) { + addbyte(0xb8); /*MOV new_depth, 0*/ + addlong(0); + addbyte(0x66); /*TEST w+4, 0xffff*/ + addbyte(0xf7); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, w) + 4); + addword(0xffff); + addbyte(0x75); /*JNZ got_depth*/ + depth_jump_pos = block_pos; + addbyte(0); + // addbyte(4+5+2+3+2+5+5+3+2+2+2+/*3+*/3+2+6+4+5+2+3); + addbyte(0x8b); /*MOV EDX, w*/ + addbyte(0x97); + addlong(offsetof(voodoo_state_t, w)); + addbyte(0xb8); /*MOV new_depth, 0xf001*/ + addlong(0xf001); + addbyte(0x89); /*MOV EBX, EDX*/ + addbyte(0xd3); + addbyte(0xc1); /*SHR EDX, 16*/ + addbyte(0xea); + addbyte(16); + addbyte(0x74); /*JZ got_depth*/ + depth_jump_pos2 = block_pos; + addbyte(0); + // addbyte(5+5+3+2+2+2+/*3+*/3+2+6+4+5+2+3); + addbyte(0xb9); /*MOV ECX, 19*/ + addlong(19); + addbyte(0x0f); /*BSR EAX, EDX*/ + addbyte(0xbd); + addbyte(0xc2); + addbyte(0xba); /*MOV EDX, 15*/ + addlong(15); + addbyte(0xf7); /*NOT EBX*/ + addbyte(0xd3); + addbyte(0x29); /*SUB EDX, EAX - EDX = exp*/ + addbyte(0xc2); + addbyte(0x29); /*SUB ECX, EDX*/ + addbyte(0xd1); + addbyte(0xc1); /*SHL EDX, 12*/ + addbyte(0xe2); + addbyte(12); + addbyte(0xd3); /*SHR EBX, CL*/ + addbyte(0xeb); + addbyte(0x81); /*AND EBX, 0xfff - EBX = mant*/ + addbyte(0xe3); + addlong(0xfff); + addbyte(0x67); /*LEA EAX, 1[EDX, EBX]*/ + addbyte(0x8d); + addbyte(0x44); + addbyte(0x13); + addbyte(1); + addbyte(0xbb); /*MOV EBX, 0xffff*/ + addlong(0xffff); + addbyte(0x39); /*CMP EAX, EBX*/ + addbyte(0xd8); + addbyte(0x0f); /*CMOVA EAX, EBX*/ + addbyte(0x47); + addbyte(0xc3); + + if (depth_jump_pos) + *(uint8_t *) &code_block[depth_jump_pos] = (block_pos - depth_jump_pos) - 1; + if (depth_jump_pos) + *(uint8_t *) &code_block[depth_jump_pos2] = (block_pos - depth_jump_pos2) - 1; + + if ((params->fogMode & (FOG_ENABLE | FOG_CONSTANT | FOG_Z | FOG_ALPHA)) == FOG_ENABLE) { + addbyte(0x89); /*MOV state->w_depth[EDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, w_depth)); + } + } + if (!(params->fbzMode & FBZ_W_BUFFER)) { + addbyte(0x8b); /*MOV EAX, z*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, z)); + addbyte(0xbb); /*MOV EBX, 0xffff*/ + addlong(0xffff); + addbyte(0x31); /*XOR ECX, ECX*/ + addbyte(0xc9); + addbyte(0xc1); /*SAR EAX, 12*/ + addbyte(0xf8); + addbyte(12); + addbyte(0x0f); /*CMOVS EAX, ECX*/ + addbyte(0x48); + addbyte(0xc1); + addbyte(0x39); /*CMP EAX, EBX*/ + addbyte(0xd8); + addbyte(0x0f); /*CMOVA EAX, EBX*/ + addbyte(0x47); + addbyte(0xc3); + } + + if (params->fbzMode & FBZ_DEPTH_BIAS) { + addbyte(0x03); /*ADD EAX, params->zaColor[ESI]*/ + addbyte(0x86); + addlong(offsetof(voodoo_params_t, zaColor)); + addbyte(0x25); /*AND EAX, 0xffff*/ + addlong(0xffff); + } + + addbyte(0x89); /*MOV state->new_depth[EDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, new_depth)); + + if ((params->fbzMode & FBZ_DEPTH_ENABLE) && (depthop != DEPTHOP_ALWAYS) && (depthop != DEPTHOP_NEVER)) { + addbyte(0x8b); /*MOV EBX, state->x[EDI]*/ + addbyte(0x9f); + if (params->aux_tiled) + addlong(offsetof(voodoo_state_t, x_tiled)); + else + addlong(offsetof(voodoo_state_t, x)); + addbyte(0x48); /*MOV RCX, aux_mem[RDI]*/ + addbyte(0x8b); + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, aux_mem)); + addbyte(0x0f); /*MOVZX EBX, [ECX+EBX*2]*/ + addbyte(0xb7); + addbyte(0x1c); + addbyte(0x59); + if (params->fbzMode & FBZ_DEPTH_SOURCE) { + addbyte(0x0f); /*MOVZX EAX, zaColor[RSI]*/ + addbyte(0xb7); + addbyte(0x86); + addlong(offsetof(voodoo_params_t, zaColor)); + } + addbyte(0x39); /*CMP EAX, EBX*/ + addbyte(0xd8); + if (depthop == DEPTHOP_LESSTHAN) { + addbyte(0x0f); /*JAE skip*/ + addbyte(0x83); + z_skip_pos = block_pos; + addlong(0); + } else if (depthop == DEPTHOP_EQUAL) { + addbyte(0x0f); /*JNE skip*/ + addbyte(0x85); + z_skip_pos = block_pos; + addlong(0); + } else if (depthop == DEPTHOP_LESSTHANEQUAL) { + addbyte(0x0f); /*JA skip*/ + addbyte(0x87); + z_skip_pos = block_pos; + addlong(0); + } else if (depthop == DEPTHOP_GREATERTHAN) { + addbyte(0x0f); /*JBE skip*/ + addbyte(0x86); + z_skip_pos = block_pos; + addlong(0); + } else if (depthop == DEPTHOP_NOTEQUAL) { + addbyte(0x0f); /*JE skip*/ + addbyte(0x84); + z_skip_pos = block_pos; + addlong(0); + } else if (depthop == DEPTHOP_GREATERTHANEQUAL) { + addbyte(0x0f); /*JB skip*/ + addbyte(0x82); + z_skip_pos = block_pos; + addlong(0); + } else + fatal("Bad depth_op\n"); + } else if ((params->fbzMode & FBZ_DEPTH_ENABLE) && (depthop == DEPTHOP_NEVER)) { + addbyte(0xC3); /*RET*/ + } + + /*XMM0 = colour*/ + /*XMM2 = 0 (for unpacking*/ + + /*EDI = state, ESI = params*/ + + if ((params->textureMode[0] & TEXTUREMODE_LOCAL_MASK) == TEXTUREMODE_LOCAL || !voodoo->dual_tmus) { + /*TMU0 only sampling local colour or only one TMU, only sample TMU0*/ + block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 0); + + addbyte(0x66); /*MOVD XMM0, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xc0); + addbyte(0xc1); /*SHR EAX, 24*/ + addbyte(0xe8); + addbyte(24); + addbyte(0x89); /*MOV state->tex_a[RDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tex_a)); + } else if ((params->textureMode[0] & TEXTUREMODE_MASK) == TEXTUREMODE_PASSTHROUGH) { + /*TMU0 in pass-through mode, only sample TMU1*/ + block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 1); + + addbyte(0x66); /*MOVD XMM0, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xc0); + addbyte(0xc1); /*SHR EAX, 24*/ + addbyte(0xe8); + addbyte(24); + addbyte(0x89); /*MOV state->tex_a[RDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tex_a)); + } else { + block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 1); + + addbyte(0x66); /*MOVD XMM3, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xd8); + if ((params->textureMode[1] & TEXTUREMODE_TRILINEAR) && tc_sub_clocal_1) { + addbyte(0x8b); /*MOV EAX, state->lod*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod)); + if (!tc_reverse_blend_1) { + addbyte(0xbb); /*MOV EBX, 1*/ + addlong(1); + } else { + addbyte(0x31); /*XOR EBX, EBX*/ + addbyte(0xdb); + } + addbyte(0x83); /*AND EAX, 1*/ + addbyte(0xe0); + addbyte(1); + if (!tca_reverse_blend_1) { + addbyte(0xb9); /*MOV ECX, 1*/ + addlong(1); + } else { addbyte(0x31); /*XOR ECX, ECX*/ addbyte(0xc9); - addbyte(0xc1); /*SAR EAX, 12*/ - addbyte(0xf8); - addbyte(12); - addbyte(0x0f); /*CMOVS EAX, ECX*/ - addbyte(0x48); - addbyte(0xc1); - addbyte(0x39); /*CMP EAX, EBX*/ - addbyte(0xd8); - addbyte(0x0f); /*CMOVA EAX, EBX*/ - addbyte(0x47); - addbyte(0xc3); + } + addbyte(0x31); /*XOR EBX, EAX*/ + addbyte(0xc3); + addbyte(0x31); /*XOR ECX, EAX*/ + addbyte(0xc1); + addbyte(0xc1); /*SHL EBX, 4*/ + addbyte(0xe3); + addbyte(4); + /*EBX = tc_reverse_blend, ECX=tca_reverse_blend*/ } - - if (params->fbzMode & FBZ_DEPTH_BIAS) - { - addbyte(0x03); /*ADD EAX, params->zaColor[ESI]*/ - addbyte(0x86); - addlong(offsetof(voodoo_params_t, zaColor)); - addbyte(0x25); /*AND EAX, 0xffff*/ - addlong(0xffff); - } - - addbyte(0x89); /*MOV state->new_depth[EDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, new_depth)); - - if ((params->fbzMode & FBZ_DEPTH_ENABLE) && (depthop != DEPTHOP_ALWAYS) && (depthop != DEPTHOP_NEVER)) - { - addbyte(0x8b); /*MOV EBX, state->x[EDI]*/ - addbyte(0x9f); - if (params->aux_tiled) - addlong(offsetof(voodoo_state_t, x_tiled)); - else - addlong(offsetof(voodoo_state_t, x)); - addbyte(0x48); /*MOV RCX, aux_mem[RDI]*/ - addbyte(0x8b); - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, aux_mem)); - addbyte(0x0f); /*MOVZX EBX, [ECX+EBX*2]*/ - addbyte(0xb7); - addbyte(0x1c); - addbyte(0x59); - if (params->fbzMode & FBZ_DEPTH_SOURCE) - { - addbyte(0x0f); /*MOVZX EAX, zaColor[RSI]*/ - addbyte(0xb7); - addbyte(0x86); - addlong(offsetof(voodoo_params_t, zaColor)); - } - addbyte(0x39); /*CMP EAX, EBX*/ - addbyte(0xd8); - if (depthop == DEPTHOP_LESSTHAN) - { - addbyte(0x0f); /*JAE skip*/ - addbyte(0x83); - z_skip_pos = block_pos; - addlong(0); - } - else if (depthop == DEPTHOP_EQUAL) - { - addbyte(0x0f); /*JNE skip*/ - addbyte(0x85); - z_skip_pos = block_pos; - addlong(0); - } - else if (depthop == DEPTHOP_LESSTHANEQUAL) - { - addbyte(0x0f); /*JA skip*/ - addbyte(0x87); - z_skip_pos = block_pos; - addlong(0); - } - else if (depthop == DEPTHOP_GREATERTHAN) - { - addbyte(0x0f); /*JBE skip*/ - addbyte(0x86); - z_skip_pos = block_pos; - addlong(0); - } - else if (depthop == DEPTHOP_NOTEQUAL) - { - addbyte(0x0f); /*JE skip*/ - addbyte(0x84); - z_skip_pos = block_pos; - addlong(0); - } - else if (depthop == DEPTHOP_GREATERTHANEQUAL) - { - addbyte(0x0f); /*JB skip*/ - addbyte(0x82); - z_skip_pos = block_pos; - addlong(0); - } - else - fatal("Bad depth_op\n"); - } - else if ((params->fbzMode & FBZ_DEPTH_ENABLE) && (depthop == DEPTHOP_NEVER)) - { - addbyte(0xC3); /*RET*/ - } - - /*XMM0 = colour*/ - /*XMM2 = 0 (for unpacking*/ - - /*EDI = state, ESI = params*/ - - if ((params->textureMode[0] & TEXTUREMODE_LOCAL_MASK) == TEXTUREMODE_LOCAL || !voodoo->dual_tmus) - { - /*TMU0 only sampling local colour or only one TMU, only sample TMU0*/ - block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 0); - - addbyte(0x66); /*MOVD XMM0, EAX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xc0); - addbyte(0xc1); /*SHR EAX, 24*/ - addbyte(0xe8); - addbyte(24); - addbyte(0x89); /*MOV state->tex_a[RDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tex_a)); - } - else if ((params->textureMode[0] & TEXTUREMODE_MASK) == TEXTUREMODE_PASSTHROUGH) - { - /*TMU0 in pass-through mode, only sample TMU1*/ - block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 1); - - addbyte(0x66); /*MOVD XMM0, EAX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xc0); - addbyte(0xc1); /*SHR EAX, 24*/ - addbyte(0xe8); - addbyte(24); - addbyte(0x89); /*MOV state->tex_a[RDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tex_a)); - } - else - { - block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 1); - - addbyte(0x66); /*MOVD XMM3, EAX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xd8); - if ((params->textureMode[1] & TEXTUREMODE_TRILINEAR) && tc_sub_clocal_1) - { - addbyte(0x8b); /*MOV EAX, state->lod*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod)); - if (!tc_reverse_blend_1) - { - addbyte(0xbb); /*MOV EBX, 1*/ - addlong(1); - } - else - { - addbyte(0x31); /*XOR EBX, EBX*/ - addbyte(0xdb); - } - addbyte(0x83); /*AND EAX, 1*/ - addbyte(0xe0); - addbyte(1); - if (!tca_reverse_blend_1) - { - addbyte(0xb9); /*MOV ECX, 1*/ - addlong(1); - } - else - { - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - addbyte(0x31); /*XOR EBX, EAX*/ - addbyte(0xc3); - addbyte(0x31); /*XOR ECX, EAX*/ - addbyte(0xc1); - addbyte(0xc1); /*SHL EBX, 4*/ - addbyte(0xe3); - addbyte(4); - /*EBX = tc_reverse_blend, ECX=tca_reverse_blend*/ - } - addbyte(0x66); /*PUNPCKLBW XMM3, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xda); - if (tc_sub_clocal_1) - { - switch (tc_mselect_1) - { - case TC_MSELECT_ZERO: - addbyte(0x66); /*PXOR XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xc0); - break; - case TC_MSELECT_CLOCAL: - addbyte(0xf3); /*MOVQ XMM0, XMM3*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xc3); - break; - case TC_MSELECT_AOTHER: - addbyte(0x66); /*PXOR XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xc0); - break; - case TC_MSELECT_ALOCAL: - addbyte(0xf2); /*PSHUFLW XMM0, XMM3, 0xff*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xc3); - addbyte(0xff); - break; - case TC_MSELECT_DETAIL: - addbyte(0xb8); /*MOV EAX, params->detail_bias[1]*/ - addlong(params->detail_bias[1]); - addbyte(0x2b); /*SUB EAX, state->lod*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod)); - addbyte(0xba); /*MOV EDX, params->detail_max[1]*/ - addlong(params->detail_max[1]); - addbyte(0xc1); /*SHL EAX, params->detail_scale[1]*/ - addbyte(0xe0); - addbyte(params->detail_scale[1]); - addbyte(0x39); /*CMP EAX, EDX*/ - addbyte(0xd0); - addbyte(0x0f); /*CMOVNL EAX, EDX*/ - addbyte(0x4d); - addbyte(0xc2); - addbyte(0x66); /*MOVD XMM0, EAX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xc0); - addbyte(0xf2); /*PSHUFLW XMM0, XMM0, 0*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xc0); - addbyte(0); - break; - case TC_MSELECT_LOD_FRAC: - addbyte(0x66); /*MOVD XMM0, state->lod_frac[1]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod_frac[1])); - addbyte(0xf2); /*PSHUFLW XMM0, XMM0, 0*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xc0); - addbyte(0); - break; - } - if (params->textureMode[1] & TEXTUREMODE_TRILINEAR) - { - addbyte(0x66); /*PXOR XMM0, R12(xmm_00_ff_w)[EBX]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xef); - addbyte(0x04); - addbyte(0x1c); - } - else if (!tc_reverse_blend_1) - { - addbyte(0x66); /*PXOR XMM0, XMM9(xmm_ff_w)*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xef); - addbyte(0xc1); - } - addbyte(0x66); /*PADDW XMM0, XMM8(xmm_01_w)*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc0); - addbyte(0xf3); /*MOVQ XMM1, XMM2*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xca); - addbyte(0xf3); /*MOVQ XMM5, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe8); - addbyte(0x66); /*PMULLW XMM0, XMM3*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0xc3); - addbyte(0x66); /*PMULHW XMM5, XMM3*/ - addbyte(0x0f); - addbyte(0xe5); - addbyte(0xeb); - addbyte(0x66); /*PUNPCKLWD XMM0, XMM5*/ - addbyte(0x0f); - addbyte(0x61); - addbyte(0xc5); - addbyte(0x66); /*PSRAD XMM0, 8*/ - addbyte(0x0f); - addbyte(0x72); - addbyte(0xe0); - addbyte(8); - addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x6b); - addbyte(0xc0); - addbyte(0x66); /*PSUBW XMM1, XMM0*/ - addbyte(0x0f); - addbyte(0xf9); - addbyte(0xc8); - if (tc_add_clocal_1) - { - addbyte(0x66); /*PADDW XMM1, XMM3*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xcb); - } - else if (tc_add_alocal_1) - { - addbyte(0xf2); /*PSHUFLW XMM0, XMM3, 0xff*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xc3); - addbyte(0xff); - addbyte(0x66); /*PADDW XMM1, XMM0*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc8); - } - addbyte(0x66); /*PACKUSWB XMM3, XMM1*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xd9); - if (tca_sub_clocal_1) - { - addbyte(0x66); /*MOVD EBX, XMM3*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xdb); - } - addbyte(0x66); /*PUNPCKLBW XMM3, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xda); - } - - if (tca_sub_clocal_1) - { - addbyte(0xc1); /*SHR EBX, 24*/ - addbyte(0xeb); - addbyte(24); - switch (tca_mselect_1) - { - case TCA_MSELECT_ZERO: - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - break; - case TCA_MSELECT_CLOCAL: - addbyte(0x89); /*MOV EAX, EBX*/ - addbyte(0xd8); - break; - case TCA_MSELECT_AOTHER: - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - break; - case TCA_MSELECT_ALOCAL: - addbyte(0x89); /*MOV EAX, EBX*/ - addbyte(0xd8); - break; - case TCA_MSELECT_DETAIL: - addbyte(0xb8); /*MOV EAX, params->detail_bias[1]*/ - addlong(params->detail_bias[1]); - addbyte(0x2b); /*SUB EAX, state->lod*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod)); - addbyte(0xba); /*MOV EDX, params->detail_max[1]*/ - addlong(params->detail_max[1]); - addbyte(0xc1); /*SHL EAX, params->detail_scale[1]*/ - addbyte(0xe0); - addbyte(params->detail_scale[1]); - addbyte(0x39); /*CMP EAX, EDX*/ - addbyte(0xd0); - addbyte(0x0f); /*CMOVNL EAX, EDX*/ - addbyte(0x4d); - addbyte(0xc2); - break; - case TCA_MSELECT_LOD_FRAC: - addbyte(0x8b); /*MOV EAX, state->lod_frac[1]*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod_frac[1])); - break; - } - if (params->textureMode[1] & TEXTUREMODE_TRILINEAR) - { - addbyte(0x41); /*XOR EAX, R13(i_00_ff_w)[ECX*4]*/ - addbyte(0x33); - addbyte(0x44); - addbyte(0x8d); - addbyte(0); - } - else if (!tc_reverse_blend_1) - { - addbyte(0x35); /*XOR EAX, 0xff*/ - addlong(0xff); - } - addbyte(0x8e); /*ADD EAX, 1*/ - addbyte(0xc0); - addbyte(1); - addbyte(0x0f); /*IMUL EAX, EBX*/ - addbyte(0xaf); - addbyte(0xc3); - addbyte(0xb9); /*MOV ECX, 0xff*/ - addlong(0xff); - addbyte(0xf7); /*NEG EAX*/ - addbyte(0xd8); - addbyte(0xc1); /*SAR EAX, 8*/ - addbyte(0xf8); - addbyte(8); - if (tca_add_clocal_1 || tca_add_alocal_1) - { - addbyte(0x01); /*ADD EAX, EBX*/ - addbyte(0xd8); - } - addbyte(0x39); /*CMP ECX, EAX*/ - addbyte(0xc1); - addbyte(0x0f); /*CMOVA ECX, EAX*/ - addbyte(0x47); - addbyte(0xc8); - addbyte(0x66); /*PINSRW 3, XMM3, XMM0*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0xd8); - addbyte(3); - } - - block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 0); - - addbyte(0x66); /*MOVD XMM0, EAX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xc0); - addbyte(0x66); /*MOVD XMM7, EAX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xf8); - - if (params->textureMode[0] & TEXTUREMODE_TRILINEAR) - { - addbyte(0x8b); /*MOV EAX, state->lod*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod)); - if (!tc_reverse_blend) - { - addbyte(0xbb); /*MOV EBX, 1*/ - addlong(1); - } - else - { - addbyte(0x31); /*XOR EBX, EBX*/ - addbyte(0xdb); - } - addbyte(0x83); /*AND EAX, 1*/ - addbyte(0xe0); - addbyte(1); - if (!tca_reverse_blend) - { - addbyte(0xb9); /*MOV ECX, 1*/ - addlong(1); - } - else - { - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - addbyte(0x31); /*XOR EBX, EAX*/ - addbyte(0xc3); - addbyte(0x31); /*XOR ECX, EAX*/ - addbyte(0xc1); - addbyte(0xc1); /*SHL EBX, 4*/ - addbyte(0xe3); - addbyte(4); - /*EBX = tc_reverse_blend, ECX=tca_reverse_blend*/ - } - - /*XMM0 = TMU0 output, XMM3 = TMU1 output*/ - - addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xc2); - if (tc_zero_other) - { - addbyte(0x66); /*PXOR XMM1, XMM1*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xc9); - } - else - { - addbyte(0xf3); /*MOV XMM1, XMM3*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xcb); - } - if (tc_sub_clocal) - { - addbyte(0x66); /*PSUBW XMM1, XMM0*/ - addbyte(0x0f); - addbyte(0xf9); - addbyte(0xc8); - } - - switch (tc_mselect) - { - case TC_MSELECT_ZERO: - addbyte(0x66); /*PXOR XMM4, XMM4*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xe4); - break; - case TC_MSELECT_CLOCAL: - addbyte(0xf3); /*MOV XMM4, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe0); - break; - case TC_MSELECT_AOTHER: - addbyte(0xf2); /*PSHUFLW XMM4, XMM3, 3, 3, 3, 3*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xe3); - addbyte(0xff); - break; - case TC_MSELECT_ALOCAL: - addbyte(0xf2); /*PSHUFLW XMM4, XMM0, 3, 3, 3, 3*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xe0); - addbyte(0xff); - break; - case TC_MSELECT_DETAIL: - addbyte(0xb8); /*MOV EAX, params->detail_bias[0]*/ - addlong(params->detail_bias[0]); - addbyte(0x2b); /*SUB EAX, state->lod*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod)); - addbyte(0xba); /*MOV EDX, params->detail_max[0]*/ - addlong(params->detail_max[0]); - addbyte(0xc1); /*SHL EAX, params->detail_scale[0]*/ - addbyte(0xe0); - addbyte(params->detail_scale[0]); - addbyte(0x39); /*CMP EAX, EDX*/ - addbyte(0xd0); - addbyte(0x0f); /*CMOVNL EAX, EDX*/ - addbyte(0x4d); - addbyte(0xc2); - addbyte(0x66); /*MOVD XMM4, EAX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xe0); - addbyte(0xf2); /*PSHUFLW XMM4, XMM4, 0*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xe4); - addbyte(0); - break; - case TC_MSELECT_LOD_FRAC: - addbyte(0x66); /*MOVD XMM0, state->lod_frac[0]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xa7); - addlong(offsetof(voodoo_state_t, lod_frac[0])); - addbyte(0xf2); /*PSHUFLW XMM0, XMM0, 0*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xe4); - addbyte(0); - break; - } - if (params->textureMode[0] & TEXTUREMODE_TRILINEAR) - { - addbyte(0x66); /*PXOR XMM4, R12(xmm_00_ff_w)[EBX]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xef); - addbyte(0x24); - addbyte(0x1c); - } - else if (!tc_reverse_blend) - { - addbyte(0x66); /*PXOR XMM4, XMM9(xmm_ff_w)*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xef); - addbyte(0xe1); - } - addbyte(0x66); /*PADDW XMM4, XMM8(xmm_01_w)*/ + addbyte(0x66); /*PUNPCKLBW XMM3, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xda); + if (tc_sub_clocal_1) { + switch (tc_mselect_1) { + case TC_MSELECT_ZERO: + addbyte(0x66); /*PXOR XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xc0); + break; + case TC_MSELECT_CLOCAL: + addbyte(0xf3); /*MOVQ XMM0, XMM3*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xc3); + break; + case TC_MSELECT_AOTHER: + addbyte(0x66); /*PXOR XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xc0); + break; + case TC_MSELECT_ALOCAL: + addbyte(0xf2); /*PSHUFLW XMM0, XMM3, 0xff*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xc3); + addbyte(0xff); + break; + case TC_MSELECT_DETAIL: + addbyte(0xb8); /*MOV EAX, params->detail_bias[1]*/ + addlong(params->detail_bias[1]); + addbyte(0x2b); /*SUB EAX, state->lod*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod)); + addbyte(0xba); /*MOV EDX, params->detail_max[1]*/ + addlong(params->detail_max[1]); + addbyte(0xc1); /*SHL EAX, params->detail_scale[1]*/ + addbyte(0xe0); + addbyte(params->detail_scale[1]); + addbyte(0x39); /*CMP EAX, EDX*/ + addbyte(0xd0); + addbyte(0x0f); /*CMOVNL EAX, EDX*/ + addbyte(0x4d); + addbyte(0xc2); + addbyte(0x66); /*MOVD XMM0, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xc0); + addbyte(0xf2); /*PSHUFLW XMM0, XMM0, 0*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xc0); + addbyte(0); + break; + case TC_MSELECT_LOD_FRAC: + addbyte(0x66); /*MOVD XMM0, state->lod_frac[1]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod_frac[1])); + addbyte(0xf2); /*PSHUFLW XMM0, XMM0, 0*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xc0); + addbyte(0); + break; + } + if (params->textureMode[1] & TEXTUREMODE_TRILINEAR) { + addbyte(0x66); /*PXOR XMM0, R12(xmm_00_ff_w)[EBX]*/ addbyte(0x41); addbyte(0x0f); + addbyte(0xef); + addbyte(0x04); + addbyte(0x1c); + } else if (!tc_reverse_blend_1) { + addbyte(0x66); /*PXOR XMM0, XMM9(xmm_ff_w)*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xef); + addbyte(0xc1); + } + addbyte(0x66); /*PADDW XMM0, XMM8(xmm_01_w)*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc0); + addbyte(0xf3); /*MOVQ XMM1, XMM2*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xca); + addbyte(0xf3); /*MOVQ XMM5, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe8); + addbyte(0x66); /*PMULLW XMM0, XMM3*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0xc3); + addbyte(0x66); /*PMULHW XMM5, XMM3*/ + addbyte(0x0f); + addbyte(0xe5); + addbyte(0xeb); + addbyte(0x66); /*PUNPCKLWD XMM0, XMM5*/ + addbyte(0x0f); + addbyte(0x61); + addbyte(0xc5); + addbyte(0x66); /*PSRAD XMM0, 8*/ + addbyte(0x0f); + addbyte(0x72); + addbyte(0xe0); + addbyte(8); + addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x6b); + addbyte(0xc0); + addbyte(0x66); /*PSUBW XMM1, XMM0*/ + addbyte(0x0f); + addbyte(0xf9); + addbyte(0xc8); + if (tc_add_clocal_1) { + addbyte(0x66); /*PADDW XMM1, XMM3*/ + addbyte(0x0f); addbyte(0xfd); - addbyte(0xe0); - addbyte(0xf3); /*MOVQ XMM5, XMM1*/ + addbyte(0xcb); + } else if (tc_add_alocal_1) { + addbyte(0xf2); /*PSHUFLW XMM0, XMM3, 0xff*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xc3); + addbyte(0xff); + addbyte(0x66); /*PADDW XMM1, XMM0*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc8); + } + addbyte(0x66); /*PACKUSWB XMM3, XMM1*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xd9); + if (tca_sub_clocal_1) { + addbyte(0x66); /*MOVD EBX, XMM3*/ addbyte(0x0f); addbyte(0x7e); - addbyte(0xe9); - addbyte(0x66); /*PMULLW XMM1, XMM4*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0xcc); + addbyte(0xdb); + } + addbyte(0x66); /*PUNPCKLBW XMM3, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xda); + } - if (tca_sub_clocal) - { - addbyte(0x66); /*MOV EBX, XMM7*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xfb); - } + if (tca_sub_clocal_1) { + addbyte(0xc1); /*SHR EBX, 24*/ + addbyte(0xeb); + addbyte(24); + switch (tca_mselect_1) { + case TCA_MSELECT_ZERO: + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + break; + case TCA_MSELECT_CLOCAL: + addbyte(0x89); /*MOV EAX, EBX*/ + addbyte(0xd8); + break; + case TCA_MSELECT_AOTHER: + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + break; + case TCA_MSELECT_ALOCAL: + addbyte(0x89); /*MOV EAX, EBX*/ + addbyte(0xd8); + break; + case TCA_MSELECT_DETAIL: + addbyte(0xb8); /*MOV EAX, params->detail_bias[1]*/ + addlong(params->detail_bias[1]); + addbyte(0x2b); /*SUB EAX, state->lod*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod)); + addbyte(0xba); /*MOV EDX, params->detail_max[1]*/ + addlong(params->detail_max[1]); + addbyte(0xc1); /*SHL EAX, params->detail_scale[1]*/ + addbyte(0xe0); + addbyte(params->detail_scale[1]); + addbyte(0x39); /*CMP EAX, EDX*/ + addbyte(0xd0); + addbyte(0x0f); /*CMOVNL EAX, EDX*/ + addbyte(0x4d); + addbyte(0xc2); + break; + case TCA_MSELECT_LOD_FRAC: + addbyte(0x8b); /*MOV EAX, state->lod_frac[1]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod_frac[1])); + break; + } + if (params->textureMode[1] & TEXTUREMODE_TRILINEAR) { + addbyte(0x41); /*XOR EAX, R13(i_00_ff_w)[ECX*4]*/ + addbyte(0x33); + addbyte(0x44); + addbyte(0x8d); + addbyte(0); + } else if (!tc_reverse_blend_1) { + addbyte(0x35); /*XOR EAX, 0xff*/ + addlong(0xff); + } + addbyte(0x8e); /*ADD EAX, 1*/ + addbyte(0xc0); + addbyte(1); + addbyte(0x0f); /*IMUL EAX, EBX*/ + addbyte(0xaf); + addbyte(0xc3); + addbyte(0xb9); /*MOV ECX, 0xff*/ + addlong(0xff); + addbyte(0xf7); /*NEG EAX*/ + addbyte(0xd8); + addbyte(0xc1); /*SAR EAX, 8*/ + addbyte(0xf8); + addbyte(8); + if (tca_add_clocal_1 || tca_add_alocal_1) { + addbyte(0x01); /*ADD EAX, EBX*/ + addbyte(0xd8); + } + addbyte(0x39); /*CMP ECX, EAX*/ + addbyte(0xc1); + addbyte(0x0f); /*CMOVA ECX, EAX*/ + addbyte(0x47); + addbyte(0xc8); + addbyte(0x66); /*PINSRW 3, XMM3, XMM0*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0xd8); + addbyte(3); + } - addbyte(0x66); /*PMULHW XMM5, XMM4*/ + block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 0); + + addbyte(0x66); /*MOVD XMM0, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xc0); + addbyte(0x66); /*MOVD XMM7, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xf8); + + if (params->textureMode[0] & TEXTUREMODE_TRILINEAR) { + addbyte(0x8b); /*MOV EAX, state->lod*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod)); + if (!tc_reverse_blend) { + addbyte(0xbb); /*MOV EBX, 1*/ + addlong(1); + } else { + addbyte(0x31); /*XOR EBX, EBX*/ + addbyte(0xdb); + } + addbyte(0x83); /*AND EAX, 1*/ + addbyte(0xe0); + addbyte(1); + if (!tca_reverse_blend) { + addbyte(0xb9); /*MOV ECX, 1*/ + addlong(1); + } else { + addbyte(0x31); /*XOR ECX, ECX*/ + addbyte(0xc9); + } + addbyte(0x31); /*XOR EBX, EAX*/ + addbyte(0xc3); + addbyte(0x31); /*XOR ECX, EAX*/ + addbyte(0xc1); + addbyte(0xc1); /*SHL EBX, 4*/ + addbyte(0xe3); + addbyte(4); + /*EBX = tc_reverse_blend, ECX=tca_reverse_blend*/ + } + + /*XMM0 = TMU0 output, XMM3 = TMU1 output*/ + + addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xc2); + if (tc_zero_other) { + addbyte(0x66); /*PXOR XMM1, XMM1*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xc9); + } else { + addbyte(0xf3); /*MOV XMM1, XMM3*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xcb); + } + if (tc_sub_clocal) { + addbyte(0x66); /*PSUBW XMM1, XMM0*/ + addbyte(0x0f); + addbyte(0xf9); + addbyte(0xc8); + } + + switch (tc_mselect) { + case TC_MSELECT_ZERO: + addbyte(0x66); /*PXOR XMM4, XMM4*/ addbyte(0x0f); - addbyte(0xe5); - addbyte(0xec); - addbyte(0x66); /*PUNPCKLWD XMM1, XMM5*/ + addbyte(0xef); + addbyte(0xe4); + break; + case TC_MSELECT_CLOCAL: + addbyte(0xf3); /*MOV XMM4, XMM0*/ addbyte(0x0f); - addbyte(0x61); - addbyte(0xcd); - addbyte(0x66); /*PSRAD XMM1, 8*/ + addbyte(0x7e); + addbyte(0xe0); + break; + case TC_MSELECT_AOTHER: + addbyte(0xf2); /*PSHUFLW XMM4, XMM3, 3, 3, 3, 3*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xe3); + addbyte(0xff); + break; + case TC_MSELECT_ALOCAL: + addbyte(0xf2); /*PSHUFLW XMM4, XMM0, 3, 3, 3, 3*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xe0); + addbyte(0xff); + break; + case TC_MSELECT_DETAIL: + addbyte(0xb8); /*MOV EAX, params->detail_bias[0]*/ + addlong(params->detail_bias[0]); + addbyte(0x2b); /*SUB EAX, state->lod*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod)); + addbyte(0xba); /*MOV EDX, params->detail_max[0]*/ + addlong(params->detail_max[0]); + addbyte(0xc1); /*SHL EAX, params->detail_scale[0]*/ + addbyte(0xe0); + addbyte(params->detail_scale[0]); + addbyte(0x39); /*CMP EAX, EDX*/ + addbyte(0xd0); + addbyte(0x0f); /*CMOVNL EAX, EDX*/ + addbyte(0x4d); + addbyte(0xc2); + addbyte(0x66); /*MOVD XMM4, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xe0); + addbyte(0xf2); /*PSHUFLW XMM4, XMM4, 0*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xe4); + addbyte(0); + break; + case TC_MSELECT_LOD_FRAC: + addbyte(0x66); /*MOVD XMM0, state->lod_frac[0]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xa7); + addlong(offsetof(voodoo_state_t, lod_frac[0])); + addbyte(0xf2); /*PSHUFLW XMM0, XMM0, 0*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xe4); + addbyte(0); + break; + } + if (params->textureMode[0] & TEXTUREMODE_TRILINEAR) { + addbyte(0x66); /*PXOR XMM4, R12(xmm_00_ff_w)[EBX]*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xef); + addbyte(0x24); + addbyte(0x1c); + } else if (!tc_reverse_blend) { + addbyte(0x66); /*PXOR XMM4, XMM9(xmm_ff_w)*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xef); + addbyte(0xe1); + } + addbyte(0x66); /*PADDW XMM4, XMM8(xmm_01_w)*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xe0); + addbyte(0xf3); /*MOVQ XMM5, XMM1*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe9); + addbyte(0x66); /*PMULLW XMM1, XMM4*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0xcc); + + if (tca_sub_clocal) { + addbyte(0x66); /*MOV EBX, XMM7*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xfb); + } + + addbyte(0x66); /*PMULHW XMM5, XMM4*/ + addbyte(0x0f); + addbyte(0xe5); + addbyte(0xec); + addbyte(0x66); /*PUNPCKLWD XMM1, XMM5*/ + addbyte(0x0f); + addbyte(0x61); + addbyte(0xcd); + addbyte(0x66); /*PSRAD XMM1, 8*/ + addbyte(0x0f); + addbyte(0x72); + addbyte(0xe1); + addbyte(8); + addbyte(0x66); /*PACKSSDW XMM1, XMM1*/ + addbyte(0x0f); + addbyte(0x6b); + addbyte(0xc9); + + if (tca_sub_clocal) { + addbyte(0xc1); /*SHR EBX, 24*/ + addbyte(0xeb); + addbyte(24); + } + + if (tc_add_clocal) { + addbyte(0x66); /*PADDW XMM1, XMM0*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc8); + } else if (tc_add_alocal) { + addbyte(0xf2); /*PSHUFLW XMM4, XMM0, 3, 3, 3, 3*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xe0); + addbyte(0xff); + addbyte(0x66); /*PADDW XMM1, XMM4*/ + addbyte(0x0f); + addbyte(0xfc); + addbyte(0xcc); + } + if (tc_invert_output) { + addbyte(0x66); /*PXOR XMM1, XMM9(xmm_ff_w)*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xef); + addbyte(0xc9); + } + + addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xc0); + addbyte(0x66); /*PACKUSWB XMM3, XMM3*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xdb); + addbyte(0x66); /*PACKUSWB XMM1, XMM1*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xc9); + + if (tca_zero_other) { + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + } else { + addbyte(0x66); /*MOV EAX, XMM3*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xd8); + addbyte(0xc1); /*SHR EAX, 24*/ + addbyte(0xe8); + addbyte(24); + } + if (tca_sub_clocal) { + addbyte(0x29); /*SUB EAX, EBX*/ + addbyte(0xd8); + } + switch (tca_mselect) { + case TCA_MSELECT_ZERO: + addbyte(0x31); /*XOR EBX, EBX*/ + addbyte(0xdb); + break; + case TCA_MSELECT_CLOCAL: + addbyte(0x66); /*MOV EBX, XMM7*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xfb); + addbyte(0xc1); /*SHR EBX, 24*/ + addbyte(0xeb); + addbyte(24); + break; + case TCA_MSELECT_AOTHER: + addbyte(0x66); /*MOV EBX, XMM3*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xdb); + addbyte(0xc1); /*SHR EBX, 24*/ + addbyte(0xeb); + addbyte(24); + break; + case TCA_MSELECT_ALOCAL: + addbyte(0x66); /*MOV EBX, XMM7*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xfb); + addbyte(0xc1); /*SHR EBX, 24*/ + addbyte(0xeb); + addbyte(24); + break; + case TCA_MSELECT_DETAIL: + addbyte(0xbb); /*MOV EBX, params->detail_bias[1]*/ + addlong(params->detail_bias[1]); + addbyte(0x2b); /*SUB EBX, state->lod*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, lod)); + addbyte(0xba); /*MOV EDX, params->detail_max[1]*/ + addlong(params->detail_max[1]); + addbyte(0xc1); /*SHL EBX, params->detail_scale[1]*/ + addbyte(0xe3); + addbyte(params->detail_scale[1]); + addbyte(0x39); /*CMP EBX, EDX*/ + addbyte(0xd3); + addbyte(0x0f); /*CMOVNL EBX, EDX*/ + addbyte(0x4d); + addbyte(0xda); + break; + case TCA_MSELECT_LOD_FRAC: + addbyte(0x8b); /*MOV EBX, state->lod_frac[0]*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, lod_frac[0])); + break; + } + if (params->textureMode[0] & TEXTUREMODE_TRILINEAR) { + addbyte(0x41); /*XOR EBX, R13(i_00_ff_w)[ECX*4]*/ + addbyte(0x33); + addbyte(0x5c); + addbyte(0x8d); + addbyte(0); + } else if (!tca_reverse_blend) { + addbyte(0x81); /*XOR EBX, 0xFF*/ + addbyte(0xf3); + addlong(0xff); + } + + addbyte(0x83); /*ADD EBX, 1*/ + addbyte(0xc3); + addbyte(1); + addbyte(0x0f); /*IMUL EAX, EBX*/ + addbyte(0xaf); + addbyte(0xc3); + addbyte(0x31); /*XOR EDX, EDX*/ + addbyte(0xd2); + addbyte(0xc1); /*SAR EAX, 8*/ + addbyte(0xf8); + addbyte(8); + if (tca_add_clocal || tca_add_alocal) { + addbyte(0x66); /*MOV EBX, XMM7*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xfb); + addbyte(0xc1); /*SHR EBX, 24*/ + addbyte(0xeb); + addbyte(24); + addbyte(0x01); /*ADD EAX, EBX*/ + addbyte(0xd8); + } + addbyte(0x0f); /*CMOVS EAX, EDX*/ + addbyte(0x48); + addbyte(0xc2); + addbyte(0xba); /*MOV EDX, 0xff*/ + addlong(0xff); + addbyte(0x3d); /*CMP EAX, 0xff*/ + addlong(0xff); + addbyte(0x0f); /*CMOVA EAX, EDX*/ + addbyte(0x47); + addbyte(0xc2); + if (tca_invert_output) { + addbyte(0x35); /*XOR EAX, 0xff*/ + addlong(0xff); + } + + addbyte(0x89); /*MOV state->tex_a[EDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tex_a)); + + addbyte(0xf3); /*MOVQ XMM0, XMM1*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xc1); + } + if (cc_mselect == CC_MSELECT_TEXRGB) { + addbyte(0xf3); /*MOVD XMM4, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe0); + } + + if ((params->fbzMode & FBZ_CHROMAKEY)) { + switch (_rgb_sel) { + case CC_LOCALSELECT_ITER_RGB: + addbyte(0xf3); /*MOVDQU XMM0, ib*/ /* ir, ig and ib must be in same dqword!*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, ib)); + addbyte(0x66); /*PSRAD XMM0, 12*/ addbyte(0x0f); addbyte(0x72); - addbyte(0xe1); - addbyte(8); - addbyte(0x66); /*PACKSSDW XMM1, XMM1*/ + addbyte(0xe0); + addbyte(12); + addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ addbyte(0x0f); addbyte(0x6b); - addbyte(0xc9); - - if (tca_sub_clocal) - { - addbyte(0xc1); /*SHR EBX, 24*/ - addbyte(0xeb); - addbyte(24); - } - - if (tc_add_clocal) - { - addbyte(0x66); /*PADDW XMM1, XMM0*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc8); - } - else if (tc_add_alocal) - { - addbyte(0xf2); /*PSHUFLW XMM4, XMM0, 3, 3, 3, 3*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xe0); - addbyte(0xff); - addbyte(0x66); /*PADDW XMM1, XMM4*/ - addbyte(0x0f); - addbyte(0xfc); - addbyte(0xcc); - } - if (tc_invert_output) - { - addbyte(0x66); /*PXOR XMM1, XMM9(xmm_ff_w)*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xef); - addbyte(0xc9); - } - + addbyte(0xc0); addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ addbyte(0x0f); addbyte(0x67); addbyte(0xc0); - addbyte(0x66); /*PACKUSWB XMM3, XMM3*/ + addbyte(0x66); /*MOVD EAX, XMM0*/ addbyte(0x0f); - addbyte(0x67); + addbyte(0x7e); + addbyte(0xc0); + break; + case CC_LOCALSELECT_COLOR1: + addbyte(0x8b); /*MOV EAX, params->color1[RSI]*/ + addbyte(0x86); + addlong(offsetof(voodoo_params_t, color1)); + break; + case CC_LOCALSELECT_TEX: + addbyte(0x66); /*MOVD EAX, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xc0); + break; + } + addbyte(0x8b); /*MOV EBX, params->chromaKey[ESI]*/ + addbyte(0x9e); + addlong(offsetof(voodoo_params_t, chromaKey)); + addbyte(0x31); /*XOR EBX, EAX*/ + addbyte(0xc3); + addbyte(0x81); /*AND EBX, 0xffffff*/ + addbyte(0xe3); + addlong(0xffffff); + addbyte(0x0f); /*JE skip*/ + addbyte(0x84); + chroma_skip_pos = block_pos; + addlong(0); + } + + if (voodoo->trexInit1[0] & (1 << 18)) { + addbyte(0xb8); /*MOV EAX, tmuConfig*/ + addlong(voodoo->tmuConfig); + addbyte(0x66); /*MOVD XMM0, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xc0); + } + + if (params->alphaMode & ((1 << 0) | (1 << 4))) { + /*EBX = a_other*/ + switch (a_sel) { + case A_SEL_ITER_A: + addbyte(0x8b); /*MOV EBX, state->ia*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, ia)); + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + addbyte(0xba); /*MOV EDX, 0xff*/ + addlong(0xff); + addbyte(0xc1); /*SAR EBX, 12*/ + addbyte(0xfb); + addbyte(12); + addbyte(0x0f); /*CMOVS EBX, EAX*/ + addbyte(0x48); + addbyte(0xd8); + addbyte(0x39); /*CMP EBX, EDX*/ + addbyte(0xd3); + addbyte(0x0f); /*CMOVA EBX, EDX*/ + addbyte(0x47); + addbyte(0xda); + break; + case A_SEL_TEX: + addbyte(0x8b); /*MOV EBX, state->tex_a*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tex_a)); + break; + case A_SEL_COLOR1: + addbyte(0x0f); /*MOVZX EBX, params->color1+3*/ + addbyte(0xb6); + addbyte(0x9e); + addlong(offsetof(voodoo_params_t, color1) + 3); + break; + default: + addbyte(0x31); /*XOR EBX, EBX*/ addbyte(0xdb); + break; + } + /*ECX = a_local*/ + switch (cca_localselect) { + case CCA_LOCALSELECT_ITER_A: + if (a_sel == A_SEL_ITER_A) { + addbyte(0x89); /*MOV ECX, EBX*/ + addbyte(0xd9); + } else { + addbyte(0x8b); /*MOV ECX, state->ia*/ + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, ia)); + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + addbyte(0xba); /*MOV EDX, 0xff*/ + addlong(0xff); + addbyte(0xc1); /*SAR ECX, 12*/ + addbyte(0xf9); + addbyte(12); + addbyte(0x0f); /*CMOVS ECX, EAX*/ + addbyte(0x48); + addbyte(0xc8); + addbyte(0x39); /*CMP ECX, EDX*/ + addbyte(0xd1); + addbyte(0x0f); /*CMOVA ECX, EDX*/ + addbyte(0x47); + addbyte(0xca); + } + break; + case CCA_LOCALSELECT_COLOR0: + addbyte(0x0f); /*MOVZX ECX, params->color0+3*/ + addbyte(0xb6); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, color0) + 3); + break; + case CCA_LOCALSELECT_ITER_Z: + addbyte(0x8b); /*MOV ECX, state->z*/ + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, z)); + if (a_sel != A_SEL_ITER_A) { + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + addbyte(0xba); /*MOV EDX, 0xff*/ + addlong(0xff); + } + addbyte(0xc1); /*SAR ECX, 20*/ + addbyte(0xf9); + addbyte(20); + addbyte(0x0f); /*CMOVS ECX, EAX*/ + addbyte(0x48); + addbyte(0xc8); + addbyte(0x39); /*CMP ECX, EDX*/ + addbyte(0xd1); + addbyte(0x0f); /*CMOVA ECX, EDX*/ + addbyte(0x47); + addbyte(0xca); + break; + + default: + addbyte(0xb9); /*MOV ECX, 0xff*/ + addlong(0xff); + break; + } + + if (cca_zero_other) { + addbyte(0x31); /*XOR EDX, EDX*/ + addbyte(0xd2); + } else { + addbyte(0x89); /*MOV EDX, EBX*/ + addbyte(0xda); + } + + if (cca_sub_clocal) { + addbyte(0x29); /*SUB EDX, ECX*/ + addbyte(0xca); + } + } + + if (cc_sub_clocal || cc_mselect == 1 || cc_add == 1) { + /*XMM1 = local*/ + if (!cc_localselect_override) { + if (cc_localselect) { + addbyte(0x66); /*MOVD XMM1, params->color0*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, color0)); + } else { + addbyte(0xf3); /*MOVDQU XMM1, ib*/ /* ir, ig and ib must be in same dqword!*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, ib)); + addbyte(0x66); /*PSRAD XMM1, 12*/ + addbyte(0x0f); + addbyte(0x72); + addbyte(0xe1); + addbyte(12); + addbyte(0x66); /*PACKSSDW XMM1, XMM1*/ + addbyte(0x0f); + addbyte(0x6b); + addbyte(0xc9); addbyte(0x66); /*PACKUSWB XMM1, XMM1*/ addbyte(0x0f); addbyte(0x67); addbyte(0xc9); - - if (tca_zero_other) - { - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - } - else - { - addbyte(0x66); /*MOV EAX, XMM3*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xd8); - addbyte(0xc1); /*SHR EAX, 24*/ - addbyte(0xe8); - addbyte(24); - } - if (tca_sub_clocal) - { - addbyte(0x29); /*SUB EAX, EBX*/ - addbyte(0xd8); - } - switch (tca_mselect) - { - case TCA_MSELECT_ZERO: - addbyte(0x31); /*XOR EBX, EBX*/ - addbyte(0xdb); - break; - case TCA_MSELECT_CLOCAL: - addbyte(0x66); /*MOV EBX, XMM7*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xfb); - addbyte(0xc1); /*SHR EBX, 24*/ - addbyte(0xeb); - addbyte(24); - break; - case TCA_MSELECT_AOTHER: - addbyte(0x66); /*MOV EBX, XMM3*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xdb); - addbyte(0xc1); /*SHR EBX, 24*/ - addbyte(0xeb); - addbyte(24); - break; - case TCA_MSELECT_ALOCAL: - addbyte(0x66); /*MOV EBX, XMM7*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xfb); - addbyte(0xc1); /*SHR EBX, 24*/ - addbyte(0xeb); - addbyte(24); - break; - case TCA_MSELECT_DETAIL: - addbyte(0xbb); /*MOV EBX, params->detail_bias[1]*/ - addlong(params->detail_bias[1]); - addbyte(0x2b); /*SUB EBX, state->lod*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, lod)); - addbyte(0xba); /*MOV EDX, params->detail_max[1]*/ - addlong(params->detail_max[1]); - addbyte(0xc1); /*SHL EBX, params->detail_scale[1]*/ - addbyte(0xe3); - addbyte(params->detail_scale[1]); - addbyte(0x39); /*CMP EBX, EDX*/ - addbyte(0xd3); - addbyte(0x0f); /*CMOVNL EBX, EDX*/ - addbyte(0x4d); - addbyte(0xda); - break; - case TCA_MSELECT_LOD_FRAC: - addbyte(0x8b); /*MOV EBX, state->lod_frac[0]*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, lod_frac[0])); - break; - } - if (params->textureMode[0] & TEXTUREMODE_TRILINEAR) - { - addbyte(0x41); /*XOR EBX, R13(i_00_ff_w)[ECX*4]*/ - addbyte(0x33); - addbyte(0x5c); - addbyte(0x8d); - addbyte(0); - } - else if (!tca_reverse_blend) - { - addbyte(0x81); /*XOR EBX, 0xFF*/ - addbyte(0xf3); - addlong(0xff); - } - - addbyte(0x83); /*ADD EBX, 1*/ - addbyte(0xc3); - addbyte(1); - addbyte(0x0f); /*IMUL EAX, EBX*/ - addbyte(0xaf); - addbyte(0xc3); - addbyte(0x31); /*XOR EDX, EDX*/ - addbyte(0xd2); - addbyte(0xc1); /*SAR EAX, 8*/ - addbyte(0xf8); - addbyte(8); - if (tca_add_clocal || tca_add_alocal) - { - addbyte(0x66); /*MOV EBX, XMM7*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xfb); - addbyte(0xc1); /*SHR EBX, 24*/ - addbyte(0xeb); - addbyte(24); - addbyte(0x01); /*ADD EAX, EBX*/ - addbyte(0xd8); - } - addbyte(0x0f); /*CMOVS EAX, EDX*/ - addbyte(0x48); - addbyte(0xc2); - addbyte(0xba); /*MOV EDX, 0xff*/ - addlong(0xff); - addbyte(0x3d); /*CMP EAX, 0xff*/ - addlong(0xff); - addbyte(0x0f); /*CMOVA EAX, EDX*/ - addbyte(0x47); - addbyte(0xc2); - if (tca_invert_output) - { - addbyte(0x35); /*XOR EAX, 0xff*/ - addlong(0xff); - } - - addbyte(0x89); /*MOV state->tex_a[EDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tex_a)); - - addbyte(0xf3); /*MOVQ XMM0, XMM1*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xc1); + } + } else { + addbyte(0xf6); /*TEST state->tex_a, 0x80*/ + addbyte(0x87); + addbyte(0x23); + addlong(offsetof(voodoo_state_t, tex_a)); + addbyte(0x80); + addbyte(0x74); /*JZ !cc_localselect*/ + addbyte(8 + 2); + addbyte(0x66); /*MOVD XMM1, params->color0*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, color0)); + addbyte(0xeb); /*JMP +*/ + addbyte(8 + 5 + 4 + 4); + /*!cc_localselect:*/ + addbyte(0xf3); /*MOVDQU XMM1, ib*/ /* ir, ig and ib must be in same dqword!*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, ib)); + addbyte(0x66); /*PSRAD XMM1, 12*/ + addbyte(0x0f); + addbyte(0x72); + addbyte(0xe1); + addbyte(12); + addbyte(0x66); /*PACKSSDW XMM1, XMM1*/ + addbyte(0x0f); + addbyte(0x6b); + addbyte(0xc9); + addbyte(0x66); /*PACKUSWB XMM1, XMM1*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xc9); } - if (cc_mselect == CC_MSELECT_TEXRGB) - { - addbyte(0xf3); /*MOVD XMM4, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe0); - } - - if ((params->fbzMode & FBZ_CHROMAKEY)) - { - switch (_rgb_sel) - { - case CC_LOCALSELECT_ITER_RGB: - addbyte(0xf3); /*MOVDQU XMM0, ib*/ /* ir, ig and ib must be in same dqword!*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, ib)); - addbyte(0x66); /*PSRAD XMM0, 12*/ - addbyte(0x0f); - addbyte(0x72); - addbyte(0xe0); - addbyte(12); - addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x6b); - addbyte(0xc0); - addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xc0); - addbyte(0x66); /*MOVD EAX, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xc0); - break; - case CC_LOCALSELECT_COLOR1: - addbyte(0x8b); /*MOV EAX, params->color1[RSI]*/ - addbyte(0x86); - addlong(offsetof(voodoo_params_t, color1)); - break; - case CC_LOCALSELECT_TEX: - addbyte(0x66); /*MOVD EAX, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xc0); - break; - } - addbyte(0x8b); /*MOV EBX, params->chromaKey[ESI]*/ - addbyte(0x9e); - addlong(offsetof(voodoo_params_t, chromaKey)); - addbyte(0x31); /*XOR EBX, EAX*/ - addbyte(0xc3); - addbyte(0x81); /*AND EBX, 0xffffff*/ - addbyte(0xe3); - addlong(0xffffff); - addbyte(0x0f); /*JE skip*/ - addbyte(0x84); - chroma_skip_pos = block_pos; - addlong(0); - } - - if (voodoo->trexInit1[0] & (1 << 18)) - { - addbyte(0xb8); /*MOV EAX, tmuConfig*/ - addlong(voodoo->tmuConfig); - addbyte(0x66); /*MOVD XMM0, EAX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xc0); - } - - if (params->alphaMode & ((1 << 0) | (1 << 4))) - { - /*EBX = a_other*/ - switch (a_sel) - { - case A_SEL_ITER_A: - addbyte(0x8b); /*MOV EBX, state->ia*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, ia)); - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - addbyte(0xba); /*MOV EDX, 0xff*/ - addlong(0xff); - addbyte(0xc1); /*SAR EBX, 12*/ - addbyte(0xfb); - addbyte(12); - addbyte(0x0f); /*CMOVS EBX, EAX*/ - addbyte(0x48); - addbyte(0xd8); - addbyte(0x39); /*CMP EBX, EDX*/ - addbyte(0xd3); - addbyte(0x0f); /*CMOVA EBX, EDX*/ - addbyte(0x47); - addbyte(0xda); - break; - case A_SEL_TEX: - addbyte(0x8b); /*MOV EBX, state->tex_a*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tex_a)); - break; - case A_SEL_COLOR1: - addbyte(0x0f); /*MOVZX EBX, params->color1+3*/ - addbyte(0xb6); - addbyte(0x9e); - addlong(offsetof(voodoo_params_t, color1)+3); - break; - default: - addbyte(0x31); /*XOR EBX, EBX*/ - addbyte(0xdb); - break; - } - /*ECX = a_local*/ - switch (cca_localselect) - { - case CCA_LOCALSELECT_ITER_A: - if (a_sel == A_SEL_ITER_A) - { - addbyte(0x89); /*MOV ECX, EBX*/ - addbyte(0xd9); - } - else - { - addbyte(0x8b); /*MOV ECX, state->ia*/ - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, ia)); - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - addbyte(0xba); /*MOV EDX, 0xff*/ - addlong(0xff); - addbyte(0xc1);/*SAR ECX, 12*/ - addbyte(0xf9); - addbyte(12); - addbyte(0x0f); /*CMOVS ECX, EAX*/ - addbyte(0x48); - addbyte(0xc8); - addbyte(0x39); /*CMP ECX, EDX*/ - addbyte(0xd1); - addbyte(0x0f); /*CMOVA ECX, EDX*/ - addbyte(0x47); - addbyte(0xca); - } - break; - case CCA_LOCALSELECT_COLOR0: - addbyte(0x0f); /*MOVZX ECX, params->color0+3*/ - addbyte(0xb6); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, color0)+3); - break; - case CCA_LOCALSELECT_ITER_Z: - addbyte(0x8b); /*MOV ECX, state->z*/ - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, z)); - if (a_sel != A_SEL_ITER_A) - { - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - addbyte(0xba); /*MOV EDX, 0xff*/ - addlong(0xff); - } - addbyte(0xc1);/*SAR ECX, 20*/ - addbyte(0xf9); - addbyte(20); - addbyte(0x0f); /*CMOVS ECX, EAX*/ - addbyte(0x48); - addbyte(0xc8); - addbyte(0x39); /*CMP ECX, EDX*/ - addbyte(0xd1); - addbyte(0x0f); /*CMOVA ECX, EDX*/ - addbyte(0x47); - addbyte(0xca); - break; - - default: - addbyte(0xb9); /*MOV ECX, 0xff*/ - addlong(0xff); - break; - } - - if (cca_zero_other) - { - addbyte(0x31); /*XOR EDX, EDX*/ - addbyte(0xd2); - } - else - { - addbyte(0x89); /*MOV EDX, EBX*/ - addbyte(0xda); - } - - if (cca_sub_clocal) - { - addbyte(0x29); /*SUB EDX, ECX*/ - addbyte(0xca); - } - } - - if (cc_sub_clocal || cc_mselect == 1 || cc_add == 1) - { - /*XMM1 = local*/ - if (!cc_localselect_override) - { - if (cc_localselect) - { - addbyte(0x66); /*MOVD XMM1, params->color0*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, color0)); - } - else - { - addbyte(0xf3); /*MOVDQU XMM1, ib*/ /* ir, ig and ib must be in same dqword!*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, ib)); - addbyte(0x66); /*PSRAD XMM1, 12*/ - addbyte(0x0f); - addbyte(0x72); - addbyte(0xe1); - addbyte(12); - addbyte(0x66); /*PACKSSDW XMM1, XMM1*/ - addbyte(0x0f); - addbyte(0x6b); - addbyte(0xc9); - addbyte(0x66); /*PACKUSWB XMM1, XMM1*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xc9); - } - } - else - { - addbyte(0xf6); /*TEST state->tex_a, 0x80*/ - addbyte(0x87); - addbyte(0x23); - addlong(offsetof(voodoo_state_t, tex_a)); - addbyte(0x80); - addbyte(0x74);/*JZ !cc_localselect*/ - addbyte(8+2); - addbyte(0x66); /*MOVD XMM1, params->color0*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, color0)); - addbyte(0xeb); /*JMP +*/ - addbyte(8+5+4+4); - /*!cc_localselect:*/ - addbyte(0xf3); /*MOVDQU XMM1, ib*/ /* ir, ig and ib must be in same dqword!*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, ib)); - addbyte(0x66); /*PSRAD XMM1, 12*/ - addbyte(0x0f); - addbyte(0x72); - addbyte(0xe1); - addbyte(12); - addbyte(0x66); /*PACKSSDW XMM1, XMM1*/ - addbyte(0x0f); - addbyte(0x6b); - addbyte(0xc9); - addbyte(0x66); /*PACKUSWB XMM1, XMM1*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xc9); - } - addbyte(0x66); /*PUNPCKLBW XMM1, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xca); - } - if (!cc_zero_other) - { - if (_rgb_sel == CC_LOCALSELECT_ITER_RGB) - { - addbyte(0xf3); /*MOVDQU XMM0, ib*/ /* ir, ig and ib must be in same dqword!*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, ib)); - addbyte(0x66); /*PSRAD XMM0, 12*/ - addbyte(0x0f); - addbyte(0x72); - addbyte(0xe0); - addbyte(12); - addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x6b); - addbyte(0xc0); - addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xc0); - } - else if (_rgb_sel == CC_LOCALSELECT_TEX) - { + addbyte(0x66); /*PUNPCKLBW XMM1, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xca); + } + if (!cc_zero_other) { + if (_rgb_sel == CC_LOCALSELECT_ITER_RGB) { + addbyte(0xf3); /*MOVDQU XMM0, ib*/ /* ir, ig and ib must be in same dqword!*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, ib)); + addbyte(0x66); /*PSRAD XMM0, 12*/ + addbyte(0x0f); + addbyte(0x72); + addbyte(0xe0); + addbyte(12); + addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x6b); + addbyte(0xc0); + addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xc0); + } else if (_rgb_sel == CC_LOCALSELECT_TEX) { #if 0 addbyte(0xf3); /*MOVDQU XMM0, state->tex_b*/ addbyte(0x0f); @@ -2039,1424 +1907,1340 @@ static inline void voodoo_generate(uint8_t *code_block, voodoo_t *voodoo, voodoo addbyte(0x67); addbyte(0xc0); #endif - } - else if (_rgb_sel == CC_LOCALSELECT_COLOR1) - { - addbyte(0x66); /*MOVD XMM0, params->color1*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x86); - addlong(offsetof(voodoo_params_t, color1)); - } - else - { - /*MOVD XMM0, src_r*/ - } - addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xc2); - if (cc_sub_clocal) - { - addbyte(0x66); /*PSUBW XMM0, XMM1*/ - addbyte(0x0f); - addbyte(0xf9); - addbyte(0xc1); - } + } else if (_rgb_sel == CC_LOCALSELECT_COLOR1) { + addbyte(0x66); /*MOVD XMM0, params->color1*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x86); + addlong(offsetof(voodoo_params_t, color1)); + } else { + /*MOVD XMM0, src_r*/ } - else - { - addbyte(0x66); /*PXOR XMM0, XMM0*/ + addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xc2); + if (cc_sub_clocal) { + addbyte(0x66); /*PSUBW XMM0, XMM1*/ + addbyte(0x0f); + addbyte(0xf9); + addbyte(0xc1); + } + } else { + addbyte(0x66); /*PXOR XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xc0); + if (cc_sub_clocal) { + addbyte(0x66); /*PSUBW XMM0, XMM1*/ + addbyte(0x0f); + addbyte(0xf9); + addbyte(0xc1); + } + } + + if (params->alphaMode & ((1 << 0) | (1 << 4))) { + if (!(cca_mselect == 0 && cca_reverse_blend == 0)) { + switch (cca_mselect) { + case CCA_MSELECT_ALOCAL: + addbyte(0x89); /*MOV EAX, ECX*/ + addbyte(0xc8); + break; + case CCA_MSELECT_AOTHER: + addbyte(0x89); /*MOV EAX, EBX*/ + addbyte(0xd8); + break; + case CCA_MSELECT_ALOCAL2: + addbyte(0x89); /*MOV EAX, ECX*/ + addbyte(0xc8); + break; + case CCA_MSELECT_TEX: + addbyte(0x0f); /*MOVZX EAX, state->tex_a*/ + addbyte(0xb6); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tex_a)); + break; + + case CCA_MSELECT_ZERO: + default: + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + break; + } + if (!cca_reverse_blend) { + addbyte(0x35); /*XOR EAX, 0xff*/ + addlong(0xff); + } + addbyte(0x83); /*ADD EAX, 1*/ + addbyte(0xc0); + addbyte(1); + addbyte(0x0f); /*IMUL EDX, EAX*/ + addbyte(0xaf); + addbyte(0xd0); + addbyte(0xc1); /*SHR EDX, 8*/ + addbyte(0xea); + addbyte(8); + } + } + + if ((params->alphaMode & ((1 << 0) | (1 << 4)))) { + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + } + + if (!(cc_mselect == 0 && cc_reverse_blend == 0) && cc_mselect == CC_MSELECT_AOTHER) { + /*Copy a_other to XMM3 before it gets modified*/ + addbyte(0x66); /*MOVD XMM3, EDX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xda); + addbyte(0xf2); /*PSHUFLW XMM3, XMM3, 0*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xdb); + addbyte(0x00); + } + + if (cca_add && (params->alphaMode & ((1 << 0) | (1 << 4)))) { + addbyte(0x01); /*ADD EDX, ECX*/ + addbyte(0xca); + } + + if ((params->alphaMode & ((1 << 0) | (1 << 4)))) { + addbyte(0x85); /*TEST EDX, EDX*/ + addbyte(0xd2); + addbyte(0x0f); /*CMOVS EDX, EAX*/ + addbyte(0x48); + addbyte(0xd0); + addbyte(0xb8); /*MOV EAX, 0xff*/ + addlong(0xff); + addbyte(0x81); /*CMP EDX, 0xff*/ + addbyte(0xfa); + addlong(0xff); + addbyte(0x0f); /*CMOVA EDX, EAX*/ + addbyte(0x47); + addbyte(0xd0); + if (cca_invert_output) { + addbyte(0x81); /*XOR EDX, 0xff*/ + addbyte(0xf2); + addlong(0xff); + } + } + + if (!(cc_mselect == 0 && cc_reverse_blend == 0)) { + switch (cc_mselect) { + case CC_MSELECT_ZERO: + addbyte(0x66); /*PXOR XMM3, XMM3*/ addbyte(0x0f); addbyte(0xef); - addbyte(0xc0); - if (cc_sub_clocal) - { - addbyte(0x66); /*PSUBW XMM0, XMM1*/ - addbyte(0x0f); - addbyte(0xf9); - addbyte(0xc1); - } - } - - if (params->alphaMode & ((1 << 0) | (1 << 4))) - { - if (!(cca_mselect == 0 && cca_reverse_blend == 0)) - { - switch (cca_mselect) - { - case CCA_MSELECT_ALOCAL: - addbyte(0x89); /*MOV EAX, ECX*/ - addbyte(0xc8); - break; - case CCA_MSELECT_AOTHER: - addbyte(0x89); /*MOV EAX, EBX*/ - addbyte(0xd8); - break; - case CCA_MSELECT_ALOCAL2: - addbyte(0x89); /*MOV EAX, ECX*/ - addbyte(0xc8); - break; - case CCA_MSELECT_TEX: - addbyte(0x0f); /*MOVZX EAX, state->tex_a*/ - addbyte(0xb6); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tex_a)); - break; - - case CCA_MSELECT_ZERO: - default: - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - break; - } - if (!cca_reverse_blend) - { - addbyte(0x35); /*XOR EAX, 0xff*/ - addlong(0xff); - } - addbyte(0x83); /*ADD EAX, 1*/ - addbyte(0xc0); - addbyte(1); - addbyte(0x0f); /*IMUL EDX, EAX*/ - addbyte(0xaf); - addbyte(0xd0); - addbyte(0xc1); /*SHR EDX, 8*/ - addbyte(0xea); - addbyte(8); - } - } - - if ((params->alphaMode & ((1 << 0) | (1 << 4)))) - { - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - } - - if (!(cc_mselect == 0 && cc_reverse_blend == 0) && cc_mselect == CC_MSELECT_AOTHER) - { - /*Copy a_other to XMM3 before it gets modified*/ - addbyte(0x66); /*MOVD XMM3, EDX*/ + addbyte(0xdb); + break; + case CC_MSELECT_CLOCAL: + addbyte(0xf3); /*MOV XMM3, XMM1*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xd9); + break; + case CC_MSELECT_ALOCAL: + addbyte(0x66); /*MOVD XMM3, ECX*/ addbyte(0x0f); addbyte(0x6e); - addbyte(0xda); + addbyte(0xd9); addbyte(0xf2); /*PSHUFLW XMM3, XMM3, 0*/ addbyte(0x0f); addbyte(0x70); addbyte(0xdb); addbyte(0x00); - } - - if (cca_add && (params->alphaMode & ((1 << 0) | (1 << 4)))) - { - addbyte(0x01); /*ADD EDX, ECX*/ - addbyte(0xca); - } - - if ((params->alphaMode & ((1 << 0) | (1 << 4)))) - { - addbyte(0x85); /*TEST EDX, EDX*/ - addbyte(0xd2); - addbyte(0x0f); /*CMOVS EDX, EAX*/ - addbyte(0x48); - addbyte(0xd0); - addbyte(0xb8); /*MOV EAX, 0xff*/ - addlong(0xff); - addbyte(0x81); /*CMP EDX, 0xff*/ - addbyte(0xfa); - addlong(0xff); - addbyte(0x0f); /*CMOVA EDX, EAX*/ - addbyte(0x47); - addbyte(0xd0); - if (cca_invert_output) - { - addbyte(0x81); /*XOR EDX, 0xff*/ - addbyte(0xf2); - addlong(0xff); - } - } - - if (!(cc_mselect == 0 && cc_reverse_blend == 0)) - { - switch (cc_mselect) - { - case CC_MSELECT_ZERO: - addbyte(0x66); /*PXOR XMM3, XMM3*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xdb); - break; - case CC_MSELECT_CLOCAL: - addbyte(0xf3); /*MOV XMM3, XMM1*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xd9); - break; - case CC_MSELECT_ALOCAL: - addbyte(0x66); /*MOVD XMM3, ECX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xd9); - addbyte(0xf2); /*PSHUFLW XMM3, XMM3, 0*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xdb); - addbyte(0x00); - break; - case CC_MSELECT_AOTHER: - /*Handled above*/ - break; - case CC_MSELECT_TEX: - addbyte(0x66); /*PINSRW XMM3, state->tex_a, 0*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tex_a)); - addbyte(0); - addbyte(0x66); /*PINSRW XMM3, state->tex_a, 1*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tex_a)); - addbyte(1); - addbyte(0x66); /*PINSRW XMM3, state->tex_a, 2*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tex_a)); - addbyte(2); - break; - case CC_MSELECT_TEXRGB: - addbyte(0x66); /*PUNPCKLBW XMM4, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xe2); - addbyte(0xf3); /*MOVQ XMM3, XMM4*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xdc); - break; - default: - addbyte(0x66); /*PXOR XMM3, XMM3*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xdb); - break; - } - addbyte(0xf3); /*MOV XMM4, XMM0*/ + break; + case CC_MSELECT_AOTHER: + /*Handled above*/ + break; + case CC_MSELECT_TEX: + addbyte(0x66); /*PINSRW XMM3, state->tex_a, 0*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tex_a)); + addbyte(0); + addbyte(0x66); /*PINSRW XMM3, state->tex_a, 1*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tex_a)); + addbyte(1); + addbyte(0x66); /*PINSRW XMM3, state->tex_a, 2*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tex_a)); + addbyte(2); + break; + case CC_MSELECT_TEXRGB: + addbyte(0x66); /*PUNPCKLBW XMM4, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xe2); + addbyte(0xf3); /*MOVQ XMM3, XMM4*/ addbyte(0x0f); addbyte(0x7e); - addbyte(0xe0); - if (!cc_reverse_blend) - { - addbyte(0x66); /*PXOR XMM3, XMM9(xmm_ff_w)*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xef); - addbyte(0xd9); - } - addbyte(0x66); /*PADDW XMM3, XMM8(xmm_01_w)*/ + addbyte(0xdc); + break; + default: + addbyte(0x66); /*PXOR XMM3, XMM3*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xdb); + break; + } + addbyte(0xf3); /*MOV XMM4, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe0); + if (!cc_reverse_blend) { + addbyte(0x66); /*PXOR XMM3, XMM9(xmm_ff_w)*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xef); + addbyte(0xd9); + } + addbyte(0x66); /*PADDW XMM3, XMM8(xmm_01_w)*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xd8); + addbyte(0x66); /*PMULLW XMM0, XMM3*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0xc3); + addbyte(0x66); /*PMULHW XMM4, XMM3*/ + addbyte(0x0f); + addbyte(0xe5); + addbyte(0xe3); + addbyte(0x66); /*PUNPCKLWD XMM0, XMM4*/ + addbyte(0x0f); + addbyte(0x61); + addbyte(0xc4); + addbyte(0x66); /*PSRLD XMM0, 8*/ + addbyte(0x0f); + addbyte(0x72); + addbyte(0xe0); + addbyte(8); + addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x6b); + addbyte(0xc0); + } + + if (cc_add == 1) { + addbyte(0x66); /*PADDW XMM0, XMM1*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc1); + } + + addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xc0); + + if (cc_invert_output) { + addbyte(0x66); /*PXOR XMM0, XMM10(xmm_ff_b)*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xef); + addbyte(0xc2); + } + + if (params->fogMode & FOG_ENABLE) { + if (params->fogMode & FOG_CONSTANT) { + addbyte(0x66); /*MOVD XMM3, params->fogColor[ESI]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x9e); + addlong(offsetof(voodoo_params_t, fogColor)); + addbyte(0x66); /*PADDUSB XMM0, XMM3*/ + addbyte(0x0f); + addbyte(0xdc); + addbyte(0xc3); + } else { + addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xc2); + + if (!(params->fogMode & FOG_ADD)) { + addbyte(0x66); /*MOVD XMM3, params->fogColor[ESI]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x9e); + addlong(offsetof(voodoo_params_t, fogColor)); + addbyte(0x66); /*PUNPCKLBW XMM3, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xda); + } else { + addbyte(0x66); /*PXOR XMM3, XMM3*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xdb); + } + + if (!(params->fogMode & FOG_MULT)) { + addbyte(0x66); /*PSUBW XMM3, XMM0*/ + addbyte(0x0f); + addbyte(0xf9); + addbyte(0xd8); + } + + /*Divide by 2 to prevent overflow on multiply*/ + addbyte(0x66); /*PSRAW XMM3, 1*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xe3); + addbyte(1); + + switch (params->fogMode & (FOG_Z | FOG_ALPHA)) { + case 0: + addbyte(0x8b); /*MOV EBX, state->w_depth[EDI]*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, w_depth)); + addbyte(0x89); /*MOV EAX, EBX*/ + addbyte(0xd8); + addbyte(0xc1); /*SHR EBX, 10*/ + addbyte(0xeb); + addbyte(10); + addbyte(0xc1); /*SHR EAX, 2*/ + addbyte(0xe8); + addbyte(2); + addbyte(0x83); /*AND EBX, 0x3f*/ + addbyte(0xe3); + addbyte(0x3f); + addbyte(0x25); /*AND EAX, 0xff*/ + addlong(0xff); + addbyte(0xf6); /*MUL params->fogTable+1[ESI+EBX*2]*/ + addbyte(0xa4); + addbyte(0x5e); + addlong(offsetof(voodoo_params_t, fogTable) + 1); + addbyte(0x0f); /*MOVZX EBX, params->fogTable[ESI+EBX*2]*/ + addbyte(0xb6); + addbyte(0x9c); + addbyte(0x5e); + addlong(offsetof(voodoo_params_t, fogTable)); + addbyte(0xc1); /*SHR EAX, 10*/ + addbyte(0xe8); + addbyte(10); + addbyte(0x01); /*ADD EAX, EBX*/ + addbyte(0xd8); + /* int fog_idx = (w_depth >> 10) & 0x3f; + + fog_a = params->fogTable[fog_idx].fog; + fog_a += (params->fogTable[fog_idx].dfog * ((w_depth >> 2) & 0xff)) >> 10;*/ + break; + + case FOG_Z: + addbyte(0x8b); /*MOV EAX, state->z[EDI]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, z)); + addbyte(0xc1); /*SHR EAX, 12*/ + addbyte(0xe8); + addbyte(12); + addbyte(0x25); /*AND EAX, 0xff*/ + addlong(0xff); + // fog_a = (z >> 20) & 0xff; + break; + + case FOG_ALPHA: + addbyte(0x8b); /*MOV EAX, state->ia[EDI]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, ia)); + addbyte(0x31); /*XOR EBX, EBX*/ + addbyte(0xdb); + addbyte(0xc1); /*SAR EAX, 12*/ + addbyte(0xf8); + addbyte(12); + addbyte(0x0f); /*CMOVS EAX, EBX*/ + addbyte(0x48); + addbyte(0xc3); + addbyte(0xbb); /*MOV EBX, 0xff*/ + addlong(0xff); + addbyte(0x3d); /*CMP EAX, 0xff*/ + addlong(0xff); + addbyte(0x0f); /*CMOVAE EAX, EBX*/ + addbyte(0x43); + addbyte(0xc3); + // fog_a = CLAMP(ia >> 12); + break; + + case FOG_W: + addbyte(0x8b); /*MOV EAX, state->w[EDI]+4*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, w) + 4); + addbyte(0x31); /*XOR EBX, EBX*/ + addbyte(0xdb); + addbyte(0x09); /*OR EAX, EAX*/ + addbyte(0xc0); + addbyte(0x0f); /*CMOVS EAX, EBX*/ + addbyte(0x48); + addbyte(0xc3); + addbyte(0xbb); /*MOV EBX, 0xff*/ + addlong(0xff); + addbyte(0x3d); /*CMP EAX, 0xff*/ + addlong(0xff); + addbyte(0x0f); /*CMOVAE EAX, EBX*/ + addbyte(0x43); + addbyte(0xc3); + // fog_a = CLAMP(w >> 32); + break; + } + addbyte(0x01); /*ADD EAX, EAX*/ + addbyte(0xc0); + + addbyte(0x66); /*PMULLW XMM3, alookup+4[EAX*8]*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xd5); + addbyte(0x5c); + addbyte(0xc2); + addbyte(16); + addbyte(0x66); /*PSRAW XMM3, 7*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xe3); + addbyte(7); + + if (params->fogMode & FOG_MULT) { + addbyte(0xf3); /*MOV XMM0, XMM3*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xc3); + } else { + addbyte(0x66); /*PADDW XMM0, XMM3*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc3); + } + addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xc0); + } + } + + if ((params->alphaMode & 1) && (alpha_func != AFUNC_NEVER) && (alpha_func != AFUNC_ALWAYS)) { + addbyte(0x0f); /*MOVZX ECX, params->alphaMode+3*/ + addbyte(0xb6); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, alphaMode) + 3); + addbyte(0x39); /*CMP EDX, ECX*/ + addbyte(0xca); + + switch (alpha_func) { + case AFUNC_LESSTHAN: + addbyte(0x0f); /*JAE skip*/ + addbyte(0x83); + a_skip_pos = block_pos; + addlong(0); + break; + case AFUNC_EQUAL: + addbyte(0x0f); /*JNE skip*/ + addbyte(0x85); + a_skip_pos = block_pos; + addlong(0); + break; + case AFUNC_LESSTHANEQUAL: + addbyte(0x0f); /*JA skip*/ + addbyte(0x87); + a_skip_pos = block_pos; + addlong(0); + break; + case AFUNC_GREATERTHAN: + addbyte(0x0f); /*JBE skip*/ + addbyte(0x86); + a_skip_pos = block_pos; + addlong(0); + break; + case AFUNC_NOTEQUAL: + addbyte(0x0f); /*JE skip*/ + addbyte(0x84); + a_skip_pos = block_pos; + addlong(0); + break; + case AFUNC_GREATERTHANEQUAL: + addbyte(0x0f); /*JB skip*/ + addbyte(0x82); + a_skip_pos = block_pos; + addlong(0); + break; + } + } else if ((params->alphaMode & 1) && (alpha_func == AFUNC_NEVER)) { + addbyte(0xC3); /*RET*/ + } + + if (params->alphaMode & (1 << 4)) { + addbyte(0x49); /*MOV R8, rgb565*/ + addbyte(0xb8); + addquad((uintptr_t) rgb565); + addbyte(0x8b); /*MOV EAX, state->x[EDI]*/ + addbyte(0x87); + if (params->col_tiled) + addlong(offsetof(voodoo_state_t, x_tiled)); + else + addlong(offsetof(voodoo_state_t, x)); + addbyte(0x48); /*MOV RBP, fb_mem*/ + addbyte(0x8b); + addbyte(0xaf); + addlong(offsetof(voodoo_state_t, fb_mem)); + addbyte(0x01); /*ADD EDX, EDX*/ + addbyte(0xd2); + addbyte(0x0f); /*MOVZX EAX, [RBP+RAX*2]*/ + addbyte(0xb7); + addbyte(0x44); + addbyte(0x45); + addbyte(0); + addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xc2); + addbyte(0x66); /*MOVD XMM4, rgb565[EAX*4]*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x24); + addbyte(0x80); + addbyte(0x66); /*PUNPCKLBW XMM4, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xe2); + addbyte(0xf3); /*MOV XMM6, XMM4*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xf4); + + switch (dest_afunc) { + case AFUNC_AZERO: + addbyte(0x66); /*PXOR XMM4, XMM4*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xe4); + break; + case AFUNC_ASRC_ALPHA: + addbyte(0x66); /*PMULLW XMM4, R10(alookup)[EDX*8]*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xd5); + addbyte(0x24); + addbyte(0xd2); + addbyte(0xf3); /*MOVQ XMM5, XMM4*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xec); + addbyte(0x66); /*PADDW XMM4, R10(alookup)[1*8]*/ addbyte(0x41); addbyte(0x0f); addbyte(0xfd); - addbyte(0xd8); - addbyte(0x66); /*PMULLW XMM0, XMM3*/ + addbyte(0x62); + addbyte(8 * 2); + addbyte(0x66); /*PSRLW XMM5, 8*/ addbyte(0x0f); + addbyte(0x71); addbyte(0xd5); - addbyte(0xc3); - addbyte(0x66); /*PMULHW XMM4, XMM3*/ - addbyte(0x0f); - addbyte(0xe5); - addbyte(0xe3); - addbyte(0x66); /*PUNPCKLWD XMM0, XMM4*/ - addbyte(0x0f); - addbyte(0x61); - addbyte(0xc4); - addbyte(0x66); /*PSRLD XMM0, 8*/ - addbyte(0x0f); - addbyte(0x72); - addbyte(0xe0); addbyte(8); - addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x6b); - addbyte(0xc0); - } - - if (cc_add == 1) - { - addbyte(0x66); /*PADDW XMM0, XMM1*/ + addbyte(0x66); /*PADDW XMM4, XMM5*/ addbyte(0x0f); addbyte(0xfd); - addbyte(0xc1); + addbyte(0xe5); + addbyte(0x66); /*PSRLW XMM4, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd4); + addbyte(8); + break; + case AFUNC_A_COLOR: + addbyte(0x66); /*PMULLW XMM4, XMM0*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0xe0); + addbyte(0xf3); /*MOVQ XMM5, XMM4*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xec); + addbyte(0x66); /*PADDW XMM4, R10(alookup)[1*8]*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x62); + addbyte(8 * 2); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM4, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xe5); + addbyte(0x66); /*PSRLW XMM4, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd4); + addbyte(8); + break; + case AFUNC_ADST_ALPHA: + break; + case AFUNC_AONE: + break; + case AFUNC_AOMSRC_ALPHA: + addbyte(0x66); /*PMULLW XMM4, R11(aminuslookup)[EDX*8]*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xd5); + addbyte(0x24); + addbyte(0xd3); + addbyte(0xf3); /*MOVQ XMM5, XMM4*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xec); + addbyte(0x66); /*PADDW XMM4, R10(alookup)[1*8]*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x62); + addbyte(8 * 2); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM4, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xe5); + addbyte(0x66); /*PSRLW XMM4, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd4); + addbyte(8); + break; + case AFUNC_AOM_COLOR: + addbyte(0xf3); /*MOVQ XMM5, XMM9(xmm_ff_w)*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe9); + addbyte(0x66); /*PSUBW XMM5, XMM0*/ + addbyte(0x0f); + addbyte(0xf9); + addbyte(0xe8); + addbyte(0x66); /*PMULLW XMM4, XMM5*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0xe5); + addbyte(0xf3); /*MOVQ XMM5, XMM4*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xec); + addbyte(0x66); /*PADDW XMM4, alookup[1*8]*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x62); + addbyte(8 * 2); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM4, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xe5); + addbyte(0x66); /*PSRLW XMM4, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd4); + addbyte(8); + break; + case AFUNC_AOMDST_ALPHA: + addbyte(0x66); /*PXOR XMM4, XMM4*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xe4); + break; + case AFUNC_ASATURATE: + addbyte(0x66); /*PMULLW XMM4, XMM11(minus_254)*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xd5); + addbyte(0xe3); + addbyte(0xf3); /*MOVQ XMM5, XMM4*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xec); + addbyte(0x66); /*PADDW XMM4, alookup[1*8]*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x62); + addbyte(8 * 2); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM4, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xe5); + addbyte(0x66); /*PSRLW XMM4, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd4); + addbyte(8); } + switch (src_afunc) { + case AFUNC_AZERO: + addbyte(0x66); /*PXOR XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xc0); + break; + case AFUNC_ASRC_ALPHA: + addbyte(0x66); /*PMULLW XMM0, R10(alookup)[EDX*8]*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xd5); + addbyte(0x04); + addbyte(0xd2); + addbyte(0xf3); /*MOVQ XMM5, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe8); + addbyte(0x66); /*PADDW XMM0, R10(alookup)[1*8]*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x42); + addbyte(8 * 2); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM0, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc5); + addbyte(0x66); /*PSRLW XMM0, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd0); + addbyte(8); + break; + case AFUNC_A_COLOR: + addbyte(0x66); /*PMULLW XMM0, XMM6*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0xc6); + addbyte(0xf3); /*MOVQ XMM5, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe8); + addbyte(0x66); /*PADDW XMM0, R10(alookup)[1*8]*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x42); + addbyte(8 * 2); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM0, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc5); + addbyte(0x66); /*PSRLW XMM0, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd0); + addbyte(8); + break; + case AFUNC_ADST_ALPHA: + break; + case AFUNC_AONE: + break; + case AFUNC_AOMSRC_ALPHA: + addbyte(0x66); /*PMULLW XMM0, R11(aminuslookup)[EDX*8]*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xd5); + addbyte(0x04); + addbyte(0xd3); + addbyte(0xf3); /*MOVQ XMM5, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe8); + addbyte(0x66); /*PADDW XMM0, alookup[1*8]*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x42); + addbyte(8 * 2); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM0, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc5); + addbyte(0x66); /*PSRLW XMM0, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd0); + addbyte(8); + break; + case AFUNC_AOM_COLOR: + addbyte(0xf3); /*MOVQ XMM5, XMM9(xmm_ff_w)*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe9); + addbyte(0x66); /*PSUBW XMM5, XMM6*/ + addbyte(0x0f); + addbyte(0xf9); + addbyte(0xee); + addbyte(0x66); /*PMULLW XMM0, XMM5*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0xc5); + addbyte(0xf3); /*MOVQ XMM5, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe8); + addbyte(0x66); /*PADDW XMM0, alookup[1*8]*/ + addbyte(0x41); + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x42); + addbyte(8 * 2); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM0, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc5); + addbyte(0x66); /*PSRLW XMM0, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd0); + addbyte(8); + break; + case AFUNC_AOMDST_ALPHA: + addbyte(0x66); /*PXOR XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xc0); + break; + case AFUNC_ACOLORBEFOREFOG: + break; + } + + addbyte(0x66); /*PADDW XMM0, XMM4*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc4); + addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ addbyte(0x0f); addbyte(0x67); addbyte(0xc0); + } - if (cc_invert_output) - { - addbyte(0x66); /*PXOR XMM0, XMM10(xmm_ff_b)*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xef); - addbyte(0xc2); - } + addbyte(0x8b); /*MOV EDX, state->x[EDI]*/ + addbyte(0x97); + if (params->col_tiled) + addlong(offsetof(voodoo_state_t, x_tiled)); + else + addlong(offsetof(voodoo_state_t, x)); - if (params->fogMode & FOG_ENABLE) - { - if (params->fogMode & FOG_CONSTANT) - { - addbyte(0x66); /*MOVD XMM3, params->fogColor[ESI]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x9e); - addlong(offsetof(voodoo_params_t, fogColor)); - addbyte(0x66); /*PADDUSB XMM0, XMM3*/ - addbyte(0x0f); - addbyte(0xdc); - addbyte(0xc3); - } - else - { - addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xc2); + addbyte(0x66); /*MOV EAX, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xc0); - if (!(params->fogMode & FOG_ADD)) - { - addbyte(0x66); /*MOVD XMM3, params->fogColor[ESI]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x9e); - addlong(offsetof(voodoo_params_t, fogColor)); - addbyte(0x66); /*PUNPCKLBW XMM3, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xda); - } - else - { - addbyte(0x66); /*PXOR XMM3, XMM3*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xdb); - } - - if (!(params->fogMode & FOG_MULT)) - { - addbyte(0x66); /*PSUBW XMM3, XMM0*/ - addbyte(0x0f); - addbyte(0xf9); - addbyte(0xd8); - } - - /*Divide by 2 to prevent overflow on multiply*/ - addbyte(0x66); /*PSRAW XMM3, 1*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xe3); - addbyte(1); - - switch (params->fogMode & (FOG_Z|FOG_ALPHA)) - { - case 0: - addbyte(0x8b); /*MOV EBX, state->w_depth[EDI]*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, w_depth)); - addbyte(0x89); /*MOV EAX, EBX*/ - addbyte(0xd8); - addbyte(0xc1); /*SHR EBX, 10*/ - addbyte(0xeb); - addbyte(10); - addbyte(0xc1); /*SHR EAX, 2*/ - addbyte(0xe8); - addbyte(2); - addbyte(0x83); /*AND EBX, 0x3f*/ - addbyte(0xe3); - addbyte(0x3f); - addbyte(0x25); /*AND EAX, 0xff*/ - addlong(0xff); - addbyte(0xf6); /*MUL params->fogTable+1[ESI+EBX*2]*/ - addbyte(0xa4); - addbyte(0x5e); - addlong(offsetof(voodoo_params_t, fogTable)+1); - addbyte(0x0f); /*MOVZX EBX, params->fogTable[ESI+EBX*2]*/ - addbyte(0xb6); - addbyte(0x9c); - addbyte(0x5e); - addlong(offsetof(voodoo_params_t, fogTable)); - addbyte(0xc1); /*SHR EAX, 10*/ - addbyte(0xe8); - addbyte(10); - addbyte(0x01); /*ADD EAX, EBX*/ - addbyte(0xd8); -/* int fog_idx = (w_depth >> 10) & 0x3f; - - fog_a = params->fogTable[fog_idx].fog; - fog_a += (params->fogTable[fog_idx].dfog * ((w_depth >> 2) & 0xff)) >> 10;*/ - break; - - case FOG_Z: - addbyte(0x8b); /*MOV EAX, state->z[EDI]*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, z)); - addbyte(0xc1); /*SHR EAX, 12*/ - addbyte(0xe8); - addbyte(12); - addbyte(0x25); /*AND EAX, 0xff*/ - addlong(0xff); -// fog_a = (z >> 20) & 0xff; - break; - - case FOG_ALPHA: - addbyte(0x8b); /*MOV EAX, state->ia[EDI]*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, ia)); - addbyte(0x31); /*XOR EBX, EBX*/ - addbyte(0xdb); - addbyte(0xc1); /*SAR EAX, 12*/ - addbyte(0xf8); - addbyte(12); - addbyte(0x0f); /*CMOVS EAX, EBX*/ - addbyte(0x48); - addbyte(0xc3); - addbyte(0xbb); /*MOV EBX, 0xff*/ - addlong(0xff); - addbyte(0x3d); /*CMP EAX, 0xff*/ - addlong(0xff); - addbyte(0x0f); /*CMOVAE EAX, EBX*/ - addbyte(0x43); - addbyte(0xc3); -// fog_a = CLAMP(ia >> 12); - break; - - case FOG_W: - addbyte(0x8b); /*MOV EAX, state->w[EDI]+4*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, w)+4); - addbyte(0x31); /*XOR EBX, EBX*/ - addbyte(0xdb); - addbyte(0x09); /*OR EAX, EAX*/ - addbyte(0xc0); - addbyte(0x0f); /*CMOVS EAX, EBX*/ - addbyte(0x48); - addbyte(0xc3); - addbyte(0xbb); /*MOV EBX, 0xff*/ - addlong(0xff); - addbyte(0x3d); /*CMP EAX, 0xff*/ - addlong(0xff); - addbyte(0x0f); /*CMOVAE EAX, EBX*/ - addbyte(0x43); - addbyte(0xc3); -// fog_a = CLAMP(w >> 32); - break; - } - addbyte(0x01); /*ADD EAX, EAX*/ - addbyte(0xc0); - - addbyte(0x66); /*PMULLW XMM3, alookup+4[EAX*8]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xd5); - addbyte(0x5c); - addbyte(0xc2); - addbyte(16); - addbyte(0x66); /*PSRAW XMM3, 7*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xe3); - addbyte(7); - - if (params->fogMode & FOG_MULT) - { - addbyte(0xf3); /*MOV XMM0, XMM3*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xc3); - } - else - { - addbyte(0x66); /*PADDW XMM0, XMM3*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc3); - } - addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xc0); - } - } - - if ((params->alphaMode & 1) && (alpha_func != AFUNC_NEVER) && (alpha_func != AFUNC_ALWAYS)) - { - addbyte(0x0f); /*MOVZX ECX, params->alphaMode+3*/ - addbyte(0xb6); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, alphaMode) + 3); - addbyte(0x39); /*CMP EDX, ECX*/ - addbyte(0xca); - - switch (alpha_func) - { - case AFUNC_LESSTHAN: - addbyte(0x0f); /*JAE skip*/ - addbyte(0x83); - a_skip_pos = block_pos; - addlong(0); - break; - case AFUNC_EQUAL: - addbyte(0x0f); /*JNE skip*/ - addbyte(0x85); - a_skip_pos = block_pos; - addlong(0); - break; - case AFUNC_LESSTHANEQUAL: - addbyte(0x0f); /*JA skip*/ - addbyte(0x87); - a_skip_pos = block_pos; - addlong(0); - break; - case AFUNC_GREATERTHAN: - addbyte(0x0f); /*JBE skip*/ - addbyte(0x86); - a_skip_pos = block_pos; - addlong(0); - break; - case AFUNC_NOTEQUAL: - addbyte(0x0f); /*JE skip*/ - addbyte(0x84); - a_skip_pos = block_pos; - addlong(0); - break; - case AFUNC_GREATERTHANEQUAL: - addbyte(0x0f); /*JB skip*/ - addbyte(0x82); - a_skip_pos = block_pos; - addlong(0); - break; - } - } - else if ((params->alphaMode & 1) && (alpha_func == AFUNC_NEVER)) - { - addbyte(0xC3); /*RET*/ - } - - if (params->alphaMode & (1 << 4)) - { - addbyte(0x49); /*MOV R8, rgb565*/ - addbyte(0xb8); - addquad((uintptr_t)rgb565); - addbyte(0x8b); /*MOV EAX, state->x[EDI]*/ - addbyte(0x87); - if (params->col_tiled) - addlong(offsetof(voodoo_state_t, x_tiled)); - else - addlong(offsetof(voodoo_state_t, x)); - addbyte(0x48); /*MOV RBP, fb_mem*/ - addbyte(0x8b); - addbyte(0xaf); - addlong(offsetof(voodoo_state_t, fb_mem)); - addbyte(0x01); /*ADD EDX, EDX*/ - addbyte(0xd2); - addbyte(0x0f); /*MOVZX EAX, [RBP+RAX*2]*/ - addbyte(0xb7); - addbyte(0x44); - addbyte(0x45); - addbyte(0); - addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xc2); - addbyte(0x66); /*MOVD XMM4, rgb565[EAX*4]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x24); - addbyte(0x80); - addbyte(0x66); /*PUNPCKLBW XMM4, XMM2*/ - addbyte(0x0f); - addbyte(0x60); + if (params->fbzMode & FBZ_RGB_WMASK) { + if (dither) { + addbyte(0x49); /*MOV R8, dither_rb*/ + addbyte(0xb8); + addquad(dither2x2 ? (uintptr_t) dither_rb2x2 : (uintptr_t) dither_rb); + addbyte(0x4c); /*MOV ESI, real_y (R14)*/ + addbyte(0x89); + addbyte(0xf6); + addbyte(0x0f); /*MOVZX EBX, AH*/ /*G*/ + addbyte(0xb6); + addbyte(0xdc); + if (dither2x2) { + addbyte(0x83); /*AND EDX, 1*/ addbyte(0xe2); - addbyte(0xf3); /*MOV XMM6, XMM4*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xf4); - - switch (dest_afunc) - { - case AFUNC_AZERO: - addbyte(0x66); /*PXOR XMM4, XMM4*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xe4); - break; - case AFUNC_ASRC_ALPHA: - addbyte(0x66); /*PMULLW XMM4, R10(alookup)[EDX*8]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xd5); - addbyte(0x24); - addbyte(0xd2); - addbyte(0xf3); /*MOVQ XMM5, XMM4*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xec); - addbyte(0x66); /*PADDW XMM4, R10(alookup)[1*8]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x62); - addbyte(8*2); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM4, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xe5); - addbyte(0x66); /*PSRLW XMM4, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd4); - addbyte(8); - break; - case AFUNC_A_COLOR: - addbyte(0x66); /*PMULLW XMM4, XMM0*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0xe0); - addbyte(0xf3); /*MOVQ XMM5, XMM4*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xec); - addbyte(0x66); /*PADDW XMM4, R10(alookup)[1*8]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x62); - addbyte(8*2); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM4, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xe5); - addbyte(0x66); /*PSRLW XMM4, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd4); - addbyte(8); - break; - case AFUNC_ADST_ALPHA: - break; - case AFUNC_AONE: - break; - case AFUNC_AOMSRC_ALPHA: - addbyte(0x66); /*PMULLW XMM4, R11(aminuslookup)[EDX*8]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xd5); - addbyte(0x24); - addbyte(0xd3); - addbyte(0xf3); /*MOVQ XMM5, XMM4*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xec); - addbyte(0x66); /*PADDW XMM4, R10(alookup)[1*8]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x62); - addbyte(8*2); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM4, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xe5); - addbyte(0x66); /*PSRLW XMM4, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd4); - addbyte(8); - break; - case AFUNC_AOM_COLOR: - addbyte(0xf3); /*MOVQ XMM5, XMM9(xmm_ff_w)*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe9); - addbyte(0x66); /*PSUBW XMM5, XMM0*/ - addbyte(0x0f); - addbyte(0xf9); - addbyte(0xe8); - addbyte(0x66); /*PMULLW XMM4, XMM5*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0xe5); - addbyte(0xf3); /*MOVQ XMM5, XMM4*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xec); - addbyte(0x66); /*PADDW XMM4, alookup[1*8]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x62); - addbyte(8*2); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM4, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xe5); - addbyte(0x66); /*PSRLW XMM4, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd4); - addbyte(8); - break; - case AFUNC_AOMDST_ALPHA: - addbyte(0x66); /*PXOR XMM4, XMM4*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xe4); - break; - case AFUNC_ASATURATE: - addbyte(0x66); /*PMULLW XMM4, XMM11(minus_254)*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xd5); - addbyte(0xe3); - addbyte(0xf3); /*MOVQ XMM5, XMM4*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xec); - addbyte(0x66); /*PADDW XMM4, alookup[1*8]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x62); - addbyte(8*2); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM4, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xe5); - addbyte(0x66); /*PSRLW XMM4, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd4); - addbyte(8); - } - - switch (src_afunc) - { - case AFUNC_AZERO: - addbyte(0x66); /*PXOR XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xc0); - break; - case AFUNC_ASRC_ALPHA: - addbyte(0x66); /*PMULLW XMM0, R10(alookup)[EDX*8]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xd5); - addbyte(0x04); - addbyte(0xd2); - addbyte(0xf3); /*MOVQ XMM5, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe8); - addbyte(0x66); /*PADDW XMM0, R10(alookup)[1*8]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x42); - addbyte(8*2); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM0, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc5); - addbyte(0x66); /*PSRLW XMM0, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd0); - addbyte(8); - break; - case AFUNC_A_COLOR: - addbyte(0x66); /*PMULLW XMM0, XMM6*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0xc6); - addbyte(0xf3); /*MOVQ XMM5, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe8); - addbyte(0x66); /*PADDW XMM0, R10(alookup)[1*8]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x42); - addbyte(8*2); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM0, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc5); - addbyte(0x66); /*PSRLW XMM0, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd0); - addbyte(8); - break; - case AFUNC_ADST_ALPHA: - break; - case AFUNC_AONE: - break; - case AFUNC_AOMSRC_ALPHA: - addbyte(0x66); /*PMULLW XMM0, R11(aminuslookup)[EDX*8]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xd5); - addbyte(0x04); - addbyte(0xd3); - addbyte(0xf3); /*MOVQ XMM5, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe8); - addbyte(0x66); /*PADDW XMM0, alookup[1*8]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x42); - addbyte(8*2); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM0, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc5); - addbyte(0x66); /*PSRLW XMM0, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd0); - addbyte(8); - break; - case AFUNC_AOM_COLOR: - addbyte(0xf3); /*MOVQ XMM5, XMM9(xmm_ff_w)*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe9); - addbyte(0x66); /*PSUBW XMM5, XMM6*/ - addbyte(0x0f); - addbyte(0xf9); - addbyte(0xee); - addbyte(0x66); /*PMULLW XMM0, XMM5*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0xc5); - addbyte(0xf3); /*MOVQ XMM5, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe8); - addbyte(0x66); /*PADDW XMM0, alookup[1*8]*/ - addbyte(0x41); - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x42); - addbyte(8*2); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM0, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc5); - addbyte(0x66); /*PSRLW XMM0, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd0); - addbyte(8); - break; - case AFUNC_AOMDST_ALPHA: - addbyte(0x66); /*PXOR XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xc0); - break; - case AFUNC_ACOLORBEFOREFOG: - break; - } - - addbyte(0x66); /*PADDW XMM0, XMM4*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc4); - - addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xc0); + addbyte(1); + addbyte(0x83); /*AND ESI, 1*/ + addbyte(0xe6); + addbyte(1); + addbyte(0xc1); /*SHL EBX, 2*/ + addbyte(0xe3); + addbyte(2); + } else { + addbyte(0x83); /*AND EDX, 3*/ + addbyte(0xe2); + addbyte(3); + addbyte(0x83); /*AND ESI, 3*/ + addbyte(0xe6); + addbyte(3); + addbyte(0xc1); /*SHL EBX, 4*/ + addbyte(0xe3); + addbyte(4); + } + addbyte(0x0f); /*MOVZX ECX, AL*/ /*R*/ + addbyte(0xb6); + addbyte(0xc8); + if (dither2x2) { + addbyte(0xc1); /*SHR EAX, 14*/ + addbyte(0xe8); + addbyte(14); + addbyte(0x8d); /*LEA ESI, RDX+RSI*2*/ + addbyte(0x34); + addbyte(0x72); + } else { + addbyte(0xc1); /*SHR EAX, 12*/ + addbyte(0xe8); + addbyte(12); + addbyte(0x8d); /*LEA ESI, RDX+RSI*4*/ + addbyte(0x34); + addbyte(0xb2); + } + addbyte(0x8b); /*MOV EDX, state->x[EDI]*/ + addbyte(0x97); + if (voodoo->col_tiled) + addlong(offsetof(voodoo_state_t, x_tiled)); + else + addlong(offsetof(voodoo_state_t, x)); + addbyte(0x4c); /*ADD RSI, R8*/ + addbyte(0x01); + addbyte(0xc6); + if (dither2x2) { + addbyte(0xc1); /*SHL ECX, 2*/ + addbyte(0xe1); + addbyte(2); + addbyte(0x25); /*AND EAX, 0x3fc*/ /*B*/ + addlong(0x3fc); + } else { + addbyte(0xc1); /*SHL ECX, 4*/ + addbyte(0xe1); + addbyte(4); + addbyte(0x25); /*AND EAX, 0xff0*/ /*B*/ + addlong(0xff0); + } + addbyte(0x0f); /*MOVZX EBX, dither_g[EBX+ESI]*/ + addbyte(0xb6); + addbyte(0x9c); + addbyte(0x1e); + addlong(dither2x2 ? ((uintptr_t) dither_g2x2 - (uintptr_t) dither_rb2x2) : ((uintptr_t) dither_g - (uintptr_t) dither_rb)); + addbyte(0x0f); /*MOVZX ECX, dither_rb[RCX+RSI]*/ + addbyte(0xb6); + addbyte(0x0c); + addbyte(0x0e); + addbyte(0x0f); /*MOVZX EAX, dither_rb[RAX+RSI]*/ + addbyte(0xb6); + addbyte(0x04); + addbyte(0x06); + addbyte(0xc1); /*SHL EBX, 5*/ + addbyte(0xe3); + addbyte(5); + addbyte(0xc1); /*SHL EAX, 11*/ + addbyte(0xe0); + addbyte(11); + addbyte(0x09); /*OR EAX, EBX*/ + addbyte(0xd8); + addbyte(0x09); /*OR EAX, ECX*/ + addbyte(0xc8); + } else { + addbyte(0x89); /*MOV EBX, EAX*/ + addbyte(0xc3); + addbyte(0x0f); /*MOVZX ECX, AH*/ + addbyte(0xb6); + addbyte(0xcc); + addbyte(0xc1); /*SHR EAX, 3*/ + addbyte(0xe8); + addbyte(3); + addbyte(0xc1); /*SHR EBX, 8*/ + addbyte(0xeb); + addbyte(8); + addbyte(0xc1); /*SHL ECX, 3*/ + addbyte(0xe1); + addbyte(3); + addbyte(0x81); /*AND EAX, 0x001f*/ + addbyte(0xe0); + addlong(0x001f); + addbyte(0x81); /*AND EBX, 0xf800*/ + addbyte(0xe3); + addlong(0xf800); + addbyte(0x81); /*AND ECX, 0x07e0*/ + addbyte(0xe1); + addlong(0x07e0); + addbyte(0x09); /*OR EAX, EBX*/ + addbyte(0xd8); + addbyte(0x09); /*OR EAX, ECX*/ + addbyte(0xc8); } + addbyte(0x48); /*MOV RSI, fb_mem*/ + addbyte(0x8b); + addbyte(0xb7); + addlong(offsetof(voodoo_state_t, fb_mem)); + addbyte(0x66); /*MOV [ESI+EDX*2], AX*/ + addbyte(0x89); + addbyte(0x04); + addbyte(0x56); + } + if ((params->fbzMode & (FBZ_DEPTH_WMASK | FBZ_DEPTH_ENABLE)) == (FBZ_DEPTH_WMASK | FBZ_DEPTH_ENABLE)) { addbyte(0x8b); /*MOV EDX, state->x[EDI]*/ addbyte(0x97); - if (params->col_tiled) - addlong(offsetof(voodoo_state_t, x_tiled)); + if (params->aux_tiled) + addlong(offsetof(voodoo_state_t, x_tiled)); else - addlong(offsetof(voodoo_state_t, x)); - - addbyte(0x66); /*MOV EAX, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xc0); - - if (params->fbzMode & FBZ_RGB_WMASK) - { - if (dither) - { - addbyte(0x49); /*MOV R8, dither_rb*/ - addbyte(0xb8); - addquad(dither2x2 ? (uintptr_t)dither_rb2x2 : (uintptr_t)dither_rb); - addbyte(0x4c); /*MOV ESI, real_y (R14)*/ - addbyte(0x89); - addbyte(0xf6); - addbyte(0x0f); /*MOVZX EBX, AH*/ /*G*/ - addbyte(0xb6); - addbyte(0xdc); - if (dither2x2) - { - addbyte(0x83); /*AND EDX, 1*/ - addbyte(0xe2); - addbyte(1); - addbyte(0x83); /*AND ESI, 1*/ - addbyte(0xe6); - addbyte(1); - addbyte(0xc1); /*SHL EBX, 2*/ - addbyte(0xe3); - addbyte(2); - } - else - { - addbyte(0x83); /*AND EDX, 3*/ - addbyte(0xe2); - addbyte(3); - addbyte(0x83); /*AND ESI, 3*/ - addbyte(0xe6); - addbyte(3); - addbyte(0xc1); /*SHL EBX, 4*/ - addbyte(0xe3); - addbyte(4); - } - addbyte(0x0f); /*MOVZX ECX, AL*/ /*R*/ - addbyte(0xb6); - addbyte(0xc8); - if (dither2x2) - { - addbyte(0xc1); /*SHR EAX, 14*/ - addbyte(0xe8); - addbyte(14); - addbyte(0x8d); /*LEA ESI, RDX+RSI*2*/ - addbyte(0x34); - addbyte(0x72); - } - else - { - addbyte(0xc1); /*SHR EAX, 12*/ - addbyte(0xe8); - addbyte(12); - addbyte(0x8d); /*LEA ESI, RDX+RSI*4*/ - addbyte(0x34); - addbyte(0xb2); - } - addbyte(0x8b); /*MOV EDX, state->x[EDI]*/ - addbyte(0x97); - if (voodoo->col_tiled) - addlong(offsetof(voodoo_state_t, x_tiled)); - else - addlong(offsetof(voodoo_state_t, x)); - addbyte(0x4c); /*ADD RSI, R8*/ - addbyte(0x01); - addbyte(0xc6); - if (dither2x2) - { - addbyte(0xc1); /*SHL ECX, 2*/ - addbyte(0xe1); - addbyte(2); - addbyte(0x25); /*AND EAX, 0x3fc*/ /*B*/ - addlong(0x3fc); - } - else - { - addbyte(0xc1); /*SHL ECX, 4*/ - addbyte(0xe1); - addbyte(4); - addbyte(0x25); /*AND EAX, 0xff0*/ /*B*/ - addlong(0xff0); - } - addbyte(0x0f); /*MOVZX EBX, dither_g[EBX+ESI]*/ - addbyte(0xb6); - addbyte(0x9c); - addbyte(0x1e); - addlong(dither2x2 ? ((uintptr_t)dither_g2x2 - (uintptr_t)dither_rb2x2) : ((uintptr_t)dither_g - (uintptr_t)dither_rb)); - addbyte(0x0f); /*MOVZX ECX, dither_rb[RCX+RSI]*/ - addbyte(0xb6); - addbyte(0x0c); - addbyte(0x0e); - addbyte(0x0f); /*MOVZX EAX, dither_rb[RAX+RSI]*/ - addbyte(0xb6); - addbyte(0x04); - addbyte(0x06); - addbyte(0xc1); /*SHL EBX, 5*/ - addbyte(0xe3); - addbyte(5); - addbyte(0xc1); /*SHL EAX, 11*/ - addbyte(0xe0); - addbyte(11); - addbyte(0x09); /*OR EAX, EBX*/ - addbyte(0xd8); - addbyte(0x09); /*OR EAX, ECX*/ - addbyte(0xc8); - } - else - { - addbyte(0x89); /*MOV EBX, EAX*/ - addbyte(0xc3); - addbyte(0x0f); /*MOVZX ECX, AH*/ - addbyte(0xb6); - addbyte(0xcc); - addbyte(0xc1); /*SHR EAX, 3*/ - addbyte(0xe8); - addbyte(3); - addbyte(0xc1); /*SHR EBX, 8*/ - addbyte(0xeb); - addbyte(8); - addbyte(0xc1); /*SHL ECX, 3*/ - addbyte(0xe1); - addbyte(3); - addbyte(0x81); /*AND EAX, 0x001f*/ - addbyte(0xe0); - addlong(0x001f); - addbyte(0x81); /*AND EBX, 0xf800*/ - addbyte(0xe3); - addlong(0xf800); - addbyte(0x81); /*AND ECX, 0x07e0*/ - addbyte(0xe1); - addlong(0x07e0); - addbyte(0x09); /*OR EAX, EBX*/ - addbyte(0xd8); - addbyte(0x09); /*OR EAX, ECX*/ - addbyte(0xc8); - } - addbyte(0x48); /*MOV RSI, fb_mem*/ - addbyte(0x8b); - addbyte(0xb7); - addlong(offsetof(voodoo_state_t, fb_mem)); - addbyte(0x66); /*MOV [ESI+EDX*2], AX*/ - addbyte(0x89); - addbyte(0x04); - addbyte(0x56); - } - - if ((params->fbzMode & (FBZ_DEPTH_WMASK | FBZ_DEPTH_ENABLE)) == (FBZ_DEPTH_WMASK | FBZ_DEPTH_ENABLE)) - { - addbyte(0x8b); /*MOV EDX, state->x[EDI]*/ - addbyte(0x97); - if (params->aux_tiled) - addlong(offsetof(voodoo_state_t, x_tiled)); - else - addlong(offsetof(voodoo_state_t, x)); - addbyte(0x66); /*MOV AX, new_depth*/ - addbyte(0x8b); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, new_depth)); - addbyte(0x48); /*MOV RSI, aux_mem*/ - addbyte(0x8b); - addbyte(0xb7); - addlong(offsetof(voodoo_state_t, aux_mem)); - addbyte(0x66); /*MOV [ESI+EDX*2], AX*/ - addbyte(0x89); - addbyte(0x04); - addbyte(0x56); - } - - if (z_skip_pos) - *(uint32_t *)&code_block[z_skip_pos] = (block_pos - z_skip_pos) - 4; - if (a_skip_pos) - *(uint32_t *)&code_block[a_skip_pos] = (block_pos - a_skip_pos) - 4; - if (chroma_skip_pos) - *(uint32_t *)&code_block[chroma_skip_pos] = (block_pos - chroma_skip_pos) - 4; - - addbyte(0x4c); /*MOV RSI, R15*/ + addlong(offsetof(voodoo_state_t, x)); + addbyte(0x66); /*MOV AX, new_depth*/ + addbyte(0x8b); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, new_depth)); + addbyte(0x48); /*MOV RSI, aux_mem*/ + addbyte(0x8b); + addbyte(0xb7); + addlong(offsetof(voodoo_state_t, aux_mem)); + addbyte(0x66); /*MOV [ESI+EDX*2], AX*/ addbyte(0x89); - addbyte(0xfe); + addbyte(0x04); + addbyte(0x56); + } - addbyte(0xf3); /*MOVDQU XMM1, state->ib[EDI]*/ + if (z_skip_pos) + *(uint32_t *) &code_block[z_skip_pos] = (block_pos - z_skip_pos) - 4; + if (a_skip_pos) + *(uint32_t *) &code_block[a_skip_pos] = (block_pos - a_skip_pos) - 4; + if (chroma_skip_pos) + *(uint32_t *) &code_block[chroma_skip_pos] = (block_pos - chroma_skip_pos) - 4; + + addbyte(0x4c); /*MOV RSI, R15*/ + addbyte(0x89); + addbyte(0xfe); + + addbyte(0xf3); /*MOVDQU XMM1, state->ib[EDI]*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, ib)); + addbyte(0xf3); /*MOVDQU XMM3, state->tmu0_s[EDI]*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tmu0_s)); + addbyte(0xf3); /*MOVQ XMM4, state->tmu0_w[EDI]*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xa7); + addlong(offsetof(voodoo_state_t, tmu0_w)); + addbyte(0xf3); /*MOVDQU XMM0, params->dBdX[ESI]*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x86); + addlong(offsetof(voodoo_params_t, dBdX)); + addbyte(0x8b); /*MOV EAX, params->dZdX[ESI]*/ + addbyte(0x86); + addlong(offsetof(voodoo_params_t, dZdX)); + addbyte(0xf3); /*MOVDQU XMM5, params->tmu[0].dSdX[ESI]*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0xae); + addlong(offsetof(voodoo_params_t, tmu[0].dSdX)); + addbyte(0xf3); /*MOVQ XMM6, params->tmu[0].dWdX[ESI]*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xb6); + addlong(offsetof(voodoo_params_t, tmu[0].dWdX)); + + if (state->xdir > 0) { + addbyte(0x66); /*PADDD XMM1, XMM0*/ addbyte(0x0f); - addbyte(0x6f); - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, ib)); - addbyte(0xf3); /*MOVDQU XMM3, state->tmu0_s[EDI]*/ + addbyte(0xfe); + addbyte(0xc8); + } else { + addbyte(0x66); /*PSUBD XMM1, XMM0*/ addbyte(0x0f); - addbyte(0x6f); - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tmu0_s)); - addbyte(0xf3); /*MOVQ XMM4, state->tmu0_w[EDI]*/ + addbyte(0xfa); + addbyte(0xc8); + } + + addbyte(0xf3); /*MOVQ XMM0, state->w*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, w)); + addbyte(0xf3); /*MOVDQU state->ib, XMM1*/ + addbyte(0x0f); + addbyte(0x7f); + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, ib)); + addbyte(0xf3); /*MOVQ XMM7, params->dWdX*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xbe); + addlong(offsetof(voodoo_params_t, dWdX)); + + if (state->xdir > 0) { + addbyte(0x66); /*PADDQ XMM3, XMM5*/ addbyte(0x0f); - addbyte(0x7e); - addbyte(0xa7); - addlong(offsetof(voodoo_state_t, tmu0_w)); - addbyte(0xf3); /*MOVDQU XMM0, params->dBdX[ESI]*/ + addbyte(0xd4); + addbyte(0xdd); + addbyte(0x66); /*PADDQ XMM4, XMM6*/ addbyte(0x0f); - addbyte(0x6f); - addbyte(0x86); - addlong(offsetof(voodoo_params_t, dBdX)); - addbyte(0x8b); /*MOV EAX, params->dZdX[ESI]*/ - addbyte(0x86); - addlong(offsetof(voodoo_params_t, dZdX)); - addbyte(0xf3); /*MOVDQU XMM5, params->tmu[0].dSdX[ESI]*/ + addbyte(0xd4); + addbyte(0xe6); + addbyte(0x66); /*PADDQ XMM0, XMM7*/ + addbyte(0x0f); + addbyte(0xd4); + addbyte(0xc7); + addbyte(0x01); /*ADD state->z[EDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, z)); + } else { + addbyte(0x66); /*PSUBQ XMM3, XMM5*/ + addbyte(0x0f); + addbyte(0xfb); + addbyte(0xdd); + addbyte(0x66); /*PSUBQ XMM4, XMM6*/ + addbyte(0x0f); + addbyte(0xfb); + addbyte(0xe6); + addbyte(0x66); /*PSUBQ XMM0, XMM7*/ + addbyte(0x0f); + addbyte(0xfb); + addbyte(0xc7); + addbyte(0x29); /*SUB state->z[EDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, z)); + } + + if (voodoo->dual_tmus) { + addbyte(0xf3); /*MOVDQU XMM5, params->tmu[1].dSdX[ESI]*/ addbyte(0x0f); addbyte(0x6f); addbyte(0xae); - addlong(offsetof(voodoo_params_t, tmu[0].dSdX)); - addbyte(0xf3); /*MOVQ XMM6, params->tmu[0].dWdX[ESI]*/ + addlong(offsetof(voodoo_params_t, tmu[1].dSdX)); + addbyte(0xf3); /*MOVQ XMM6, params->tmu[1].dWdX[ESI]*/ addbyte(0x0f); addbyte(0x7e); addbyte(0xb6); - addlong(offsetof(voodoo_params_t, tmu[0].dWdX)); + addlong(offsetof(voodoo_params_t, tmu[1].dWdX)); + } - if (state->xdir > 0) - { - addbyte(0x66); /*PADDD XMM1, XMM0*/ - addbyte(0x0f); - addbyte(0xfe); - addbyte(0xc8); - } - else - { - addbyte(0x66); /*PSUBD XMM1, XMM0*/ - addbyte(0x0f); - addbyte(0xfa); - addbyte(0xc8); - } + addbyte(0xf3); /*MOVDQU state->tmu0_s, XMM3*/ + addbyte(0x0f); + addbyte(0x7f); + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tmu0_s)); + addbyte(0x66); /*MOVQ state->tmu0_w, XMM4*/ + addbyte(0x0f); + addbyte(0xd6); + addbyte(0xa7); + addlong(offsetof(voodoo_state_t, tmu0_w)); + addbyte(0x66); /*MOVQ state->w, XMM0*/ + addbyte(0x0f); + addbyte(0xd6); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, w)); - addbyte(0xf3); /*MOVQ XMM0, state->w*/ + if (voodoo->dual_tmus) { + addbyte(0xf3); /*MOVDQU XMM3, state->tmu1_s[EDI]*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tmu1_s)); + addbyte(0xf3); /*MOVQ XMM4, state->tmu1_w[EDI]*/ addbyte(0x0f); addbyte(0x7e); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, w)); - addbyte(0xf3); /*MOVDQU state->ib, XMM1*/ - addbyte(0x0f); - addbyte(0x7f); - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, ib)); - addbyte(0xf3); /*MOVQ XMM7, params->dWdX*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xbe); - addlong(offsetof(voodoo_params_t, dWdX)); + addbyte(0xa7); + addlong(offsetof(voodoo_state_t, tmu1_w)); - if (state->xdir > 0) - { - addbyte(0x66); /*PADDQ XMM3, XMM5*/ - addbyte(0x0f); - addbyte(0xd4); - addbyte(0xdd); - addbyte(0x66); /*PADDQ XMM4, XMM6*/ - addbyte(0x0f); - addbyte(0xd4); - addbyte(0xe6); - addbyte(0x66); /*PADDQ XMM0, XMM7*/ - addbyte(0x0f); - addbyte(0xd4); - addbyte(0xc7); - addbyte(0x01); /*ADD state->z[EDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, z)); - } - else - { - addbyte(0x66); /*PSUBQ XMM3, XMM5*/ - addbyte(0x0f); - addbyte(0xfb); - addbyte(0xdd); - addbyte(0x66); /*PSUBQ XMM4, XMM6*/ - addbyte(0x0f); - addbyte(0xfb); - addbyte(0xe6); - addbyte(0x66); /*PSUBQ XMM0, XMM7*/ - addbyte(0x0f); - addbyte(0xfb); - addbyte(0xc7); - addbyte(0x29); /*SUB state->z[EDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, z)); + if (state->xdir > 0) { + addbyte(0x66); /*PADDQ XMM3, XMM5*/ + addbyte(0x0f); + addbyte(0xd4); + addbyte(0xdd); + addbyte(0x66); /*PADDQ XMM4, XMM6*/ + addbyte(0x0f); + addbyte(0xd4); + addbyte(0xe6); + } else { + addbyte(0x66); /*PSUBQ XMM3, XMM5*/ + addbyte(0x0f); + addbyte(0xfb); + addbyte(0xdd); + addbyte(0x66); /*PSUBQ XMM4, XMM6*/ + addbyte(0x0f); + addbyte(0xfb); + addbyte(0xe6); } - if (voodoo->dual_tmus) - { - addbyte(0xf3); /*MOVDQU XMM5, params->tmu[1].dSdX[ESI]*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0xae); - addlong(offsetof(voodoo_params_t, tmu[1].dSdX)); - addbyte(0xf3); /*MOVQ XMM6, params->tmu[1].dWdX[ESI]*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xb6); - addlong(offsetof(voodoo_params_t, tmu[1].dWdX)); - } - - addbyte(0xf3); /*MOVDQU state->tmu0_s, XMM3*/ + addbyte(0xf3); /*MOVDQU state->tmu1_s, XMM3*/ addbyte(0x0f); addbyte(0x7f); addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tmu0_s)); - addbyte(0x66); /*MOVQ state->tmu0_w, XMM4*/ + addlong(offsetof(voodoo_state_t, tmu1_s)); + addbyte(0x66); /*MOVQ state->tmu1_w, XMM4*/ addbyte(0x0f); addbyte(0xd6); addbyte(0xa7); - addlong(offsetof(voodoo_state_t, tmu0_w)); - addbyte(0x66); /*MOVQ state->w, XMM0*/ - addbyte(0x0f); - addbyte(0xd6); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, w)); + addlong(offsetof(voodoo_state_t, tmu1_w)); + } - if (voodoo->dual_tmus) - { - addbyte(0xf3); /*MOVDQU XMM3, state->tmu1_s[EDI]*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tmu1_s)); - addbyte(0xf3); /*MOVQ XMM4, state->tmu1_w[EDI]*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xa7); - addlong(offsetof(voodoo_state_t, tmu1_w)); + addbyte(0x83); /*ADD state->pixel_count[EDI], 1*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, pixel_count)); + addbyte(1); - if (state->xdir > 0) - { - addbyte(0x66); /*PADDQ XMM3, XMM5*/ - addbyte(0x0f); - addbyte(0xd4); - addbyte(0xdd); - addbyte(0x66); /*PADDQ XMM4, XMM6*/ - addbyte(0x0f); - addbyte(0xd4); - addbyte(0xe6); - } - else - { - addbyte(0x66); /*PSUBQ XMM3, XMM5*/ - addbyte(0x0f); - addbyte(0xfb); - addbyte(0xdd); - addbyte(0x66); /*PSUBQ XMM4, XMM6*/ - addbyte(0x0f); - addbyte(0xfb); - addbyte(0xe6); - } - - addbyte(0xf3); /*MOVDQU state->tmu1_s, XMM3*/ - addbyte(0x0f); - addbyte(0x7f); - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tmu1_s)); - addbyte(0x66); /*MOVQ state->tmu1_w, XMM4*/ - addbyte(0x0f); - addbyte(0xd6); - addbyte(0xa7); - addlong(offsetof(voodoo_state_t, tmu1_w)); + if (params->fbzColorPath & FBZCP_TEXTURE_ENABLED) { + if ((params->textureMode[0] & TEXTUREMODE_MASK) == TEXTUREMODE_PASSTHROUGH || (params->textureMode[0] & TEXTUREMODE_LOCAL_MASK) == TEXTUREMODE_LOCAL) { + addbyte(0x83); /*ADD state->texel_count[EDI], 1*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, texel_count)); + addbyte(1); + } else { + addbyte(0x83); /*ADD state->texel_count[EDI], 2*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, texel_count)); + addbyte(2); } + } - addbyte(0x83); /*ADD state->pixel_count[EDI], 1*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, pixel_count)); - addbyte(1); + addbyte(0x8b); /*MOV EAX, state->x[EDI]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, x)); - if (params->fbzColorPath & FBZCP_TEXTURE_ENABLED) - { - if ((params->textureMode[0] & TEXTUREMODE_MASK) == TEXTUREMODE_PASSTHROUGH || - (params->textureMode[0] & TEXTUREMODE_LOCAL_MASK) == TEXTUREMODE_LOCAL) - { - addbyte(0x83); /*ADD state->texel_count[EDI], 1*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, texel_count)); - addbyte(1); - } - else - { - addbyte(0x83); /*ADD state->texel_count[EDI], 2*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, texel_count)); - addbyte(2); - } - } - - addbyte(0x8b); /*MOV EAX, state->x[EDI]*/ + if (state->xdir > 0) { + addbyte(0x83); /*ADD state->x[EDI], 1*/ addbyte(0x87); addlong(offsetof(voodoo_state_t, x)); + addbyte(1); + } else { + addbyte(0x83); /*SUB state->x[EDI], 1*/ + addbyte(0xaf); + addlong(offsetof(voodoo_state_t, x)); + addbyte(1); + } - if (state->xdir > 0) - { - addbyte(0x83); /*ADD state->x[EDI], 1*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, x)); - addbyte(1); - } - else - { - addbyte(0x83); /*SUB state->x[EDI], 1*/ - addbyte(0xaf); - addlong(offsetof(voodoo_state_t, x)); - addbyte(1); - } + addbyte(0x3b); /*CMP EAX, state->x2[EDI]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, x2)); + addbyte(0x0f); /*JNZ loop_jump_pos*/ + addbyte(0x85); + addlong(loop_jump_pos - (block_pos + 4)); - addbyte(0x3b); /*CMP EAX, state->x2[EDI]*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, x2)); - addbyte(0x0f); /*JNZ loop_jump_pos*/ - addbyte(0x85); - addlong(loop_jump_pos - (block_pos + 4)); + addbyte(0x41); /*POP R15*/ + addbyte(0x5f); + addbyte(0x41); /*POP R14*/ + addbyte(0x5e); + addbyte(0x41); /*POP R13*/ + addbyte(0x5d); + addbyte(0x41); /*POP R12*/ + addbyte(0x5c); + addbyte(0x5b); /*POP RBX*/ + addbyte(0x5e); /*POP RSI*/ + addbyte(0x5f); /*POP RDI*/ + addbyte(0x5d); /*POP RBP*/ - addbyte(0x41); /*POP R15*/ - addbyte(0x5f); - addbyte(0x41); /*POP R14*/ - addbyte(0x5e); - addbyte(0x41); /*POP R13*/ - addbyte(0x5d); - addbyte(0x41); /*POP R12*/ - addbyte(0x5c); - addbyte(0x5b); /*POP RBX*/ - addbyte(0x5e); /*POP RSI*/ - addbyte(0x5f); /*POP RDI*/ - addbyte(0x5d); /*POP RBP*/ - - addbyte(0xC3); /*RET*/ + addbyte(0xC3); /*RET*/ } int voodoo_recomp = 0; -static inline void *voodoo_get_block(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int odd_even) +static inline void * +voodoo_get_block(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int odd_even) { - int c; - int b = last_block[odd_even]; - voodoo_x86_data_t *voodoo_x86_data = voodoo->codegen_data; - voodoo_x86_data_t *data; + int c; + int b = last_block[odd_even]; + voodoo_x86_data_t *voodoo_x86_data = voodoo->codegen_data; + voodoo_x86_data_t *data; - for (c = 0; c < 8; c++) - { - data = &voodoo_x86_data[odd_even + c*4]; //&voodoo_x86_data[odd_even][b]; + for (c = 0; c < 8; c++) { + data = &voodoo_x86_data[odd_even + c * 4]; //&voodoo_x86_data[odd_even][b]; - if (state->xdir == data->xdir && - params->alphaMode == data->alphaMode && - params->fbzMode == data->fbzMode && - params->fogMode == data->fogMode && - params->fbzColorPath == data->fbzColorPath && - (voodoo->trexInit1[0] & (1 << 18)) == data->trexInit1 && - params->textureMode[0] == data->textureMode[0] && - params->textureMode[1] == data->textureMode[1] && - (params->tLOD[0] & LOD_MASK) == data->tLOD[0] && - (params->tLOD[1] & LOD_MASK) == data->tLOD[1] && - ((params->col_tiled || params->aux_tiled) ? 1 : 0) == data->is_tiled) - { - last_block[odd_even] = b; - return data->code_block; - } - - b = (b + 1) & 7; + if (state->xdir == data->xdir && params->alphaMode == data->alphaMode && params->fbzMode == data->fbzMode && params->fogMode == data->fogMode && params->fbzColorPath == data->fbzColorPath && (voodoo->trexInit1[0] & (1 << 18)) == data->trexInit1 && params->textureMode[0] == data->textureMode[0] && params->textureMode[1] == data->textureMode[1] && (params->tLOD[0] & LOD_MASK) == data->tLOD[0] && (params->tLOD[1] & LOD_MASK) == data->tLOD[1] && ((params->col_tiled || params->aux_tiled) ? 1 : 0) == data->is_tiled) { + last_block[odd_even] = b; + return data->code_block; } -voodoo_recomp++; - data = &voodoo_x86_data[odd_even + next_block_to_write[odd_even]*4]; -// code_block = data->code_block; - voodoo_generate(data->code_block, voodoo, params, state, depth_op); + b = (b + 1) & 7; + } + voodoo_recomp++; + data = &voodoo_x86_data[odd_even + next_block_to_write[odd_even] * 4]; + // code_block = data->code_block; - data->xdir = state->xdir; - data->alphaMode = params->alphaMode; - data->fbzMode = params->fbzMode; - data->fogMode = params->fogMode; - data->fbzColorPath = params->fbzColorPath; - data->trexInit1 = voodoo->trexInit1[0] & (1 << 18); - data->textureMode[0] = params->textureMode[0]; - data->textureMode[1] = params->textureMode[1]; - data->tLOD[0] = params->tLOD[0] & LOD_MASK; - data->tLOD[1] = params->tLOD[1] & LOD_MASK; - data->is_tiled = (params->col_tiled || params->aux_tiled) ? 1 : 0; + voodoo_generate(data->code_block, voodoo, params, state, depth_op); - next_block_to_write[odd_even] = (next_block_to_write[odd_even] + 1) & 7; + data->xdir = state->xdir; + data->alphaMode = params->alphaMode; + data->fbzMode = params->fbzMode; + data->fogMode = params->fogMode; + data->fbzColorPath = params->fbzColorPath; + data->trexInit1 = voodoo->trexInit1[0] & (1 << 18); + data->textureMode[0] = params->textureMode[0]; + data->textureMode[1] = params->textureMode[1]; + data->tLOD[0] = params->tLOD[0] & LOD_MASK; + data->tLOD[1] = params->tLOD[1] & LOD_MASK; + data->is_tiled = (params->col_tiled || params->aux_tiled) ? 1 : 0; - return data->code_block; + next_block_to_write[odd_even] = (next_block_to_write[odd_even] + 1) & 7; + + return data->code_block; } -void voodoo_codegen_init(voodoo_t *voodoo) +void +voodoo_codegen_init(voodoo_t *voodoo) { - int c; + int c; - voodoo->codegen_data = plat_mmap(sizeof(voodoo_x86_data_t) * BLOCK_NUM*4, 1); + voodoo->codegen_data = plat_mmap(sizeof(voodoo_x86_data_t) * BLOCK_NUM * 4, 1); - for (c = 0; c < 256; c++) - { - int d[4]; - int _ds = c & 0xf; - int dt = c >> 4; + for (c = 0; c < 256; c++) { + int d[4]; + int _ds = c & 0xf; + int dt = c >> 4; - alookup[c] = _mm_set_epi32(0, 0, c | (c << 16), c | (c << 16)); - aminuslookup[c] = _mm_set_epi32(0, 0, (255-c) | ((255-c) << 16), (255-c) | ((255-c) << 16)); + alookup[c] = _mm_set_epi32(0, 0, c | (c << 16), c | (c << 16)); + aminuslookup[c] = _mm_set_epi32(0, 0, (255 - c) | ((255 - c) << 16), (255 - c) | ((255 - c) << 16)); - d[0] = (16 - _ds) * (16 - dt); - d[1] = _ds * (16 - dt); - d[2] = (16 - _ds) * dt; - d[3] = _ds * dt; + d[0] = (16 - _ds) * (16 - dt); + d[1] = _ds * (16 - dt); + d[2] = (16 - _ds) * dt; + d[3] = _ds * dt; - bilinear_lookup[c*2] = _mm_set_epi32(d[1] | (d[1] << 16), d[1] | (d[1] << 16), d[0] | (d[0] << 16), d[0] | (d[0] << 16)); - bilinear_lookup[c*2 + 1] = _mm_set_epi32(d[3] | (d[3] << 16), d[3] | (d[3] << 16), d[2] | (d[2] << 16), d[2] | (d[2] << 16)); - } - alookup[256] = _mm_set_epi32(0, 0, 256 | (256 << 16), 256 | (256 << 16)); - xmm_00_ff_w[0] = _mm_set_epi32(0, 0, 0, 0); - xmm_00_ff_w[1] = _mm_set_epi32(0, 0, 0xff | (0xff << 16), 0xff | (0xff << 16)); + bilinear_lookup[c * 2] = _mm_set_epi32(d[1] | (d[1] << 16), d[1] | (d[1] << 16), d[0] | (d[0] << 16), d[0] | (d[0] << 16)); + bilinear_lookup[c * 2 + 1] = _mm_set_epi32(d[3] | (d[3] << 16), d[3] | (d[3] << 16), d[2] | (d[2] << 16), d[2] | (d[2] << 16)); + } + alookup[256] = _mm_set_epi32(0, 0, 256 | (256 << 16), 256 | (256 << 16)); + xmm_00_ff_w[0] = _mm_set_epi32(0, 0, 0, 0); + xmm_00_ff_w[1] = _mm_set_epi32(0, 0, 0xff | (0xff << 16), 0xff | (0xff << 16)); } -void voodoo_codegen_close(voodoo_t *voodoo) +void +voodoo_codegen_close(voodoo_t *voodoo) { - plat_munmap(voodoo->codegen_data, sizeof(voodoo_x86_data_t) * BLOCK_NUM*4); + plat_munmap(voodoo->codegen_data, sizeof(voodoo_x86_data_t) * BLOCK_NUM * 4); } #endif /*VIDEO_VOODOO_CODEGEN_X86_64_H*/ diff --git a/src/include/86box/vid_voodoo_codegen_x86.h b/src/include/86box/vid_voodoo_codegen_x86.h index 6bde2c0c6..f9685344f 100644 --- a/src/include/86box/vid_voodoo_codegen_x86.h +++ b/src/include/86box/vid_voodoo_codegen_x86.h @@ -6,1958 +6,1824 @@ */ #ifndef VIDEO_VOODOO_CODEGEN_X86_H -# define VIDEO_VOODOO_CODEGEN_X86_H +#define VIDEO_VOODOO_CODEGEN_X86_H #ifdef _MSC_VER -#include +# include #else -#include +# include #endif -#define BLOCK_NUM 8 -#define BLOCK_MASK (BLOCK_NUM-1) +#define BLOCK_NUM 8 +#define BLOCK_MASK (BLOCK_NUM - 1) #define BLOCK_SIZE 8192 -#define LOD_MASK (LOD_TMIRROR_S | LOD_TMIRROR_T) +#define LOD_MASK (LOD_TMIRROR_S | LOD_TMIRROR_T) /* Suppress a false positive warning on gcc that causes excessive build log spam */ #if __GNUC__ >= 10 -#pragma GCC diagnostic ignored "-Wstringop-overflow" +# pragma GCC diagnostic ignored "-Wstringop-overflow" #endif -typedef struct voodoo_x86_data_t -{ - uint8_t code_block[BLOCK_SIZE]; - int xdir; - uint32_t alphaMode; - uint32_t fbzMode; - uint32_t fogMode; - uint32_t fbzColorPath; - uint32_t textureMode[2]; - uint32_t tLOD[2]; - uint32_t trexInit1; - int is_tiled; +typedef struct voodoo_x86_data_t { + uint8_t code_block[BLOCK_SIZE]; + int xdir; + uint32_t alphaMode; + uint32_t fbzMode; + uint32_t fogMode; + uint32_t fbzColorPath; + uint32_t textureMode[2]; + uint32_t tLOD[2]; + uint32_t trexInit1; + int is_tiled; } voodoo_x86_data_t; -static int last_block[4] = {0, 0}; -static int next_block_to_write[4] = {0, 0}; +static int last_block[4] = { 0, 0 }; +static int next_block_to_write[4] = { 0, 0 }; -#define addbyte(val) \ - do { \ - code_block[block_pos++] = val; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ - } while (0) +#define addbyte(val) \ + do { \ + code_block[block_pos++] = val; \ + if (block_pos >= BLOCK_SIZE) \ + fatal("Over!\n"); \ + } while (0) -#define addword(val) \ - do { \ - *(uint16_t *)&code_block[block_pos] = val; \ - block_pos += 2; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ - } while (0) +#define addword(val) \ + do { \ + *(uint16_t *) &code_block[block_pos] = val; \ + block_pos += 2; \ + if (block_pos >= BLOCK_SIZE) \ + fatal("Over!\n"); \ + } while (0) -#define addlong(val) \ - do { \ - *(uint32_t *)&code_block[block_pos] = val; \ - block_pos += 4; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ - } while (0) +#define addlong(val) \ + do { \ + *(uint32_t *) &code_block[block_pos] = val; \ + block_pos += 4; \ + if (block_pos >= BLOCK_SIZE) \ + fatal("Over!\n"); \ + } while (0) -#define addquad(val) \ - do { \ - *(uint64_t *)&code_block[block_pos] = val; \ - block_pos += 8; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ - } while (0) +#define addquad(val) \ + do { \ + *(uint64_t *) &code_block[block_pos] = val; \ + block_pos += 8; \ + if (block_pos >= BLOCK_SIZE) \ + fatal("Over!\n"); \ + } while (0) +static __m128i xmm_01_w; // = 0x0001000100010001ull; +static __m128i xmm_ff_w; // = 0x00ff00ff00ff00ffull; +static __m128i xmm_ff_b; // = 0x00000000ffffffffull; -static __m128i xmm_01_w;// = 0x0001000100010001ull; -static __m128i xmm_ff_w;// = 0x00ff00ff00ff00ffull; -static __m128i xmm_ff_b;// = 0x00000000ffffffffull; +static uint32_t zero = 0; +static double const_1_48 = (double) (1ull << 4); -static uint32_t zero = 0; -static double const_1_48 = (double)(1ull << 4); +static __m128i alookup[257], aminuslookup[256]; +static __m128i minus_254; // = 0xff02ff02ff02ff02ull; +static __m128i bilinear_lookup[256 * 2]; +static __m128i xmm_00_ff_w[2]; +static uint32_t i_00_ff_w[2] = { 0, 0xff }; -static __m128i alookup[257], aminuslookup[256]; -static __m128i minus_254;// = 0xff02ff02ff02ff02ull; -static __m128i bilinear_lookup[256*2]; -static __m128i xmm_00_ff_w[2]; -static uint32_t i_00_ff_w[2] = {0, 0xff}; - -static inline int codegen_texture_fetch(uint8_t *code_block, voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int block_pos, int tmu) +static inline int +codegen_texture_fetch(uint8_t *code_block, voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int block_pos, int tmu) { - if (params->textureMode[tmu] & 1) - { - addbyte(0xdf); /*FILDq state->tmu0_w*/ - addbyte(0xaf); - addlong(tmu ? offsetof(voodoo_state_t, tmu1_w) : offsetof(voodoo_state_t, tmu0_w)); - addbyte(0xdd); /*FLDq const_1_48*/ - addbyte(0x05); - addlong((uint32_t)&const_1_48); - addbyte(0xde); /*FDIV ST(1)*/ - addbyte(0xf1); - addbyte(0xdf); /*FILDq state->tmu0_s*/ - addbyte(0xaf); - addlong(tmu ? offsetof(voodoo_state_t, tmu1_s) : offsetof(voodoo_state_t, tmu0_s)); - addbyte(0xdf); /*FILDq state->tmu0_t*/ /*ST(0)=t, ST(1)=s, ST(2)=1/w*/ - addbyte(0xaf); - addlong(tmu ? offsetof(voodoo_state_t, tmu1_t) : offsetof(voodoo_state_t, tmu0_t)); - addbyte(0xd9); /*FXCH ST(1)*/ /*ST(0)=s, ST(1)=t, ST(2)=1/w*/ - addbyte(0xc9); - addbyte(0xd8); /*FMUL ST(2)*/ /*ST(0)=s/w, ST(1)=t, ST(2)=1/w*/ - addbyte(0xca); - addbyte(0xd9); /*FXCH ST(1)*/ /*ST(0)=t, ST(1)=s/w, ST(2)=1/w*/ - addbyte(0xc9); - addbyte(0xd8); /*FMUL ST(2)*/ /*ST(0)=t/w, ST(1)=s/w, ST(2)=1/w*/ - addbyte(0xca); - addbyte(0xd9); /*FXCH ST(2)*/ /*ST(0)=1/w, ST(1)=s/w, ST(2)=t/w*/ - addbyte(0xca); - addbyte(0xd9); /*FSTPs log_temp*/ /*ST(0)=s/w, ST(1)=t/w*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, log_temp)); - addbyte(0xdf); /*FSITPq state->tex_s*/ - addbyte(0xbf); - addlong(offsetof(voodoo_state_t, tex_s)); - addbyte(0x8b); /*MOV EAX, log_temp*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, log_temp)); - addbyte(0xdf); /*FSITPq state->tex_t*/ - addbyte(0xbf); - addlong(offsetof(voodoo_state_t, tex_t)); - addbyte(0xc1); /*SHR EAX, 23-8*/ - addbyte(0xe8); - addbyte(15); - addbyte(0x0f); /*MOVZX EBX, AL*/ - addbyte(0xb6); - addbyte(0xd8); - addbyte(0x25); /*AND EAX, 0xff00*/ - addlong(0xff00); - addbyte(0x2d); /*SUB EAX, (127-44)<<8*/ - addlong((127-44+19) << 8); - addbyte(0x0f); /*MOVZX EBX, logtable[EBX]*/ - addbyte(0xb6); - addbyte(0x9b); - addlong((uint32_t)logtable); - addbyte(0x09); /*OR EAX, EBX*/ - addbyte(0xd8); - addbyte(0x03); /*ADD EAX, state->lod*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tmu[tmu].lod)); - addbyte(0x3b); /*CMP EAX, state->lod_min*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod_min[tmu])); - addbyte(0x0f); /*CMOVL EAX, state->lod_min*/ - addbyte(0x4c); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod_min[tmu])); - addbyte(0x3b); /*CMP EAX, state->lod_max*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod_max[tmu])); - addbyte(0x0f); /*CMOVNL EAX, state->lod_max*/ - addbyte(0x4d); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod_max[tmu])); - addbyte(0x0f); /*MOVZX EBX, AL*/ - addbyte(0xb6); - addbyte(0xd8); - addbyte(0xc1); /*SHR EAX, 8*/ - addbyte(0xe8); - addbyte(8); - addbyte(0x89); /*MOV state->lod_frac[tmu], EBX*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, lod_frac[tmu])); - addbyte(0x89); /*MOV state->lod, EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod)); - } - else - { - addbyte(0xf3); /*MOVQ XMM4, state->tmu0_s*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xa7); - addlong(tmu ? offsetof(voodoo_state_t, tmu1_s) : offsetof(voodoo_state_t, tmu0_s)); - addbyte(0xf3); /*MOVQ XMM5, state->tmu0_t*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xaf); - addlong(tmu ? offsetof(voodoo_state_t, tmu1_t) : offsetof(voodoo_state_t, tmu0_t)); - addbyte(0xc7); /*MOV state->lod[tmu], 0*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod_frac[tmu])); - addlong(0); - addbyte(0x8b); /*MOV EAX, state->lod_min*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod_min[tmu])); - addbyte(0x66); /*SHRQ XMM4, 28*/ - addbyte(0x0f); - addbyte(0x73); - addbyte(0xd4); - addbyte(28); - addbyte(0x66); /*SHRQ XMM5, 28*/ - addbyte(0x0f); - addbyte(0x73); - addbyte(0xd5); - addbyte(28); - addbyte(0x0f); /*MOVZX EBX, AL*/ - addbyte(0xb6); - addbyte(0xd8); - addbyte(0xc1); /*SHR EAX, 8*/ - addbyte(0xe8); - addbyte(8); - addbyte(0x66); /*MOVQ state->tex_s, XMM4*/ - addbyte(0x0f); - addbyte(0xd6); - addbyte(0xa7); - addlong(offsetof(voodoo_state_t, tex_s)); - addbyte(0x66); /*MOVQ state->tex_t, XMM5*/ - addbyte(0x0f); - addbyte(0xd6); - addbyte(0xaf); - addlong(offsetof(voodoo_state_t, tex_t)); - addbyte(0x89); /*MOV state->lod_frac[tmu], EBX*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, lod_frac[tmu])); - addbyte(0x89); /*MOV state->lod, EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod)); - } - /*EAX = state->lod*/ - if (params->fbzColorPath & FBZCP_TEXTURE_ENABLED) - { - if (voodoo->bilinear_enabled && (params->textureMode[tmu] & 6)) - { - addbyte(0x8b); /*MOV ECX, state->tex_lod[tmu]*/ - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, tex_lod[tmu])); - addbyte(0xb2); /*MOV DL, 8*/ - addbyte(8); - addbyte(0x8b); /*MOV ECX, [ECX+EAX*4]*/ - addbyte(0x0c); - addbyte(0x81); - addbyte(0xbd); /*MOV EBP, 8*/ - addlong(8); - addbyte(0x28); /*SUB DL, CL*/ - addbyte(0xca); - addbyte(0xd3); /*SHL EBP, CL*/ - addbyte(0xe5); - addbyte(0x8b); /*MOV EAX, state->tex_s[EDI]*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tex_s)); - addbyte(0x8b); /*MOV EBX, state->tex_t[EDI]*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tex_t)); - if (params->tLOD[tmu] & LOD_TMIRROR_S) - { - addbyte(0xa9); /*TEST EAX, 0x1000*/ - addlong(0x1000); - addbyte(0x74); /*JZ +*/ - addbyte(2); - addbyte(0xf7); /*NOT EAX*/ - addbyte(0xd0); - } - if (params->tLOD[tmu] & LOD_TMIRROR_T) - { - addbyte(0xf7); /*TEST EBX, 0x1000*/ - addbyte(0xc3); - addlong(0x1000); - addbyte(0x74); /*JZ +*/ - addbyte(2); - addbyte(0xf7); /*NOT EBX*/ - addbyte(0xd3); - } - addbyte(0x29); /*SUB EAX, EBP*/ - addbyte(0xe8); - addbyte(0x29); /*SUB EBX, EBP*/ - addbyte(0xeb); - addbyte(0xd3); /*SAR EAX, CL*/ - addbyte(0xf8); - addbyte(0xd3); /*SAR EBX, CL*/ - addbyte(0xfb); - addbyte(0x89); /*MOV EBP, EAX*/ - addbyte(0xc5); - addbyte(0x89); /*MOV ECX, EBX*/ - addbyte(0xd9); - addbyte(0x83); /*AND EBP, 0xf*/ - addbyte(0xe5); - addbyte(0xf); - addbyte(0xc1); /*SHL ECX, 4*/ - addbyte(0xe1); - addbyte(4); - addbyte(0xc1); /*SAR EAX, 4*/ - addbyte(0xf8); - addbyte(4); - addbyte(0x81); /*AND ECX, 0xf0*/ - addbyte(0xe1); - addlong(0xf0); - addbyte(0xc1); /*SAR EBX, 4*/ - addbyte(0xfb); - addbyte(4); - addbyte(0x09); /*OR EBP, ECX*/ - addbyte(0xcd); - addbyte(0x8b); /*MOV ECX, state->lod[EDI]*/ - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, lod)); - addbyte(0xc1); /*SHL EBP, 5*/ - addbyte(0xe5); - addbyte(5); - /*EAX = S, EBX = T, ECX = LOD, EDX = tex_shift, ESI=params, EDI=state, EBP = bilinear shift*/ - addbyte(0x8d); /*LEA ESI, [ESI+ECX*4]*/ - addbyte(0x34); - addbyte(0x8e); - addbyte(0x89); /*MOV ebp_store, EBP*/ - addbyte(0xaf); - addlong(offsetof(voodoo_state_t, ebp_store)); - addbyte(0x8b); /*MOV EBP, state->tex[EDI+ECX*4]*/ - addbyte(0xac); - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, tex[tmu])); - addbyte(0x88); /*MOV CL, DL*/ - addbyte(0xd1); - addbyte(0x89); /*MOV EDX, EBX*/ - addbyte(0xda); - if (!state->clamp_s[tmu]) - { - addbyte(0x23); /*AND EAX, params->tex_w_mask[ESI]*/ - addbyte(0x86); - addlong(offsetof(voodoo_params_t, tex_w_mask[tmu])); - } - addbyte(0x83); /*ADD EDX, 1*/ - addbyte(0xc2); - addbyte(1); - if (state->clamp_t[tmu]) - { - addbyte(0x0f); /*CMOVS EDX, zero*/ - addbyte(0x48); - addbyte(0x15); - addlong((uint32_t)&zero); - addbyte(0x3b); /*CMP EDX, params->tex_h_mask[ESI]*/ - addbyte(0x96); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); - addbyte(0x0f); /*CMOVA EDX, params->tex_h_mask[ESI]*/ - addbyte(0x47); - addbyte(0x96); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); - addbyte(0x85); /*TEST EBX,EBX*/ - addbyte(0xdb); - addbyte(0x0f); /*CMOVS EBX, zero*/ - addbyte(0x48); - addbyte(0x1d); - addlong((uint32_t)&zero); - addbyte(0x3b); /*CMP EBX, params->tex_h_mask[ESI]*/ - addbyte(0x9e); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); - addbyte(0x0f); /*CMOVA EBX, params->tex_h_mask[ESI]*/ - addbyte(0x47); - addbyte(0x9e); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); - } - else - { - addbyte(0x23); /*AND EDX, params->tex_h_mask[ESI]*/ - addbyte(0x96); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); - addbyte(0x23); /*AND EBX, params->tex_h_mask[ESI]*/ - addbyte(0x9e); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); - } - /*EAX = S, EBX = T0, EDX = T1*/ - addbyte(0xd3); /*SHL EBX, CL*/ - addbyte(0xe3); - addbyte(0xd3); /*SHL EDX, CL*/ - addbyte(0xe2); - addbyte(0x8d); /*LEA EBX,[EBP+EBX*2]*/ - addbyte(0x5c); - addbyte(0x9d); - addbyte(0); - addbyte(0x8d); /*LEA EDX,[EBP+EDX*2]*/ - addbyte(0x54); - addbyte(0x95); - addbyte(0); - if (state->clamp_s[tmu]) - { - addbyte(0x8b); /*MOV EBP, params->tex_w_mask[ESI]*/ - addbyte(0xae); - addlong(offsetof(voodoo_params_t, tex_w_mask[tmu])); - addbyte(0x85); /*TEST EAX, EAX*/ - addbyte(0xc0); - addbyte(0x8b); /*MOV ESI, ebp_store*/ - addbyte(0xb7); - addlong(offsetof(voodoo_state_t, ebp_store)); - addbyte(0x0f); /*CMOVS EAX, zero*/ - addbyte(0x48); - addbyte(0x05); - addlong((uint32_t)&zero); - addbyte(0x78); /*JS + - clamp on 0*/ - addbyte(2+3+2+ 5+5+2); - addbyte(0x3b); /*CMP EAX, EBP*/ - addbyte(0xc5); - addbyte(0x0f); /*CMOVAE EAX, EBP*/ - addbyte(0x43); - addbyte(0xc5); - addbyte(0x73); /*JAE + - clamp on +*/ - addbyte(5+5+2); - } - else - { - addbyte(0x3b); /*CMP EAX, params->tex_w_mask[ESI] - is S at texture edge (ie will wrap/clamp)?*/ - addbyte(0x86); - addlong(offsetof(voodoo_params_t, tex_w_mask[tmu])); - addbyte(0x8b); /*MOV ESI, ebp_store*/ - addbyte(0xb7); - addlong(offsetof(voodoo_state_t, ebp_store)); - addbyte(0x74); /*JE +*/ - addbyte(5+5+2); - } - - addbyte(0xf3); /*MOVQ XMM0, [EBX+EAX*4]*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0x04); - addbyte(0x83); - addbyte(0xf3); /*MOVQ XMM1, [EDX+EAX*4]*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0x0c); - addbyte(0x82); - - if (state->clamp_s[tmu]) - { - addbyte(0xeb); /*JMP +*/ - addbyte(5+5+4+4); - - /*S clamped - the two S coordinates are the same*/ - addbyte(0x66); /*MOVD XMM0, [EBX+EAX*4]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x04); - addbyte(0x83); - addbyte(0x66); /*MOVD XMM1, [EDX+EAX*4]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x0c); - addbyte(0x82); - addbyte(0x66); /*PUNPCKLDQ XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x62); - addbyte(0xc0); - addbyte(0x66); /*PUNPCKLDQ XMM1, XMM1*/ - addbyte(0x0f); - addbyte(0x62); - addbyte(0xc9); - } - else - { - addbyte(0xeb); /*JMP +*/ - addbyte(5+5+5+5+6+6); - - /*S wrapped - the two S coordinates are not contiguous*/ - addbyte(0x66); /*MOVD XMM0, [EBX+EAX*4]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x04); - addbyte(0x83); - addbyte(0x66); /*MOVD XMM1, [EDX+EAX*4]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x0c); - addbyte(0x82); - addbyte(0x66); /*PINSRW XMM0, [EBX], 2*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0x03); - addbyte(0x02); - addbyte(0x66); /*PINSRW XMM1, [EDX], 2*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0x0a); - addbyte(0x02); - addbyte(0x66); /*PINSRW XMM0, 2[EBX], 3*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0x43); - addbyte(0x02); - addbyte(0x03); - addbyte(0x66); /*PINSRW XMM1, 2[EDX], 3*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0x4a); - addbyte(0x02); - addbyte(0x03); - } - - addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xc2); - addbyte(0x66); /*PUNPCKLBW XMM1, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xca); - - addbyte(0x81); /*ADD ESI, bilinear_lookup*/ - addbyte(0xc6); - addlong((uint32_t)bilinear_lookup); - - addbyte(0x66); /*PMULLW XMM0, bilinear_lookup[ESI]*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0x06); - addbyte(0x66); /*PMULLW XMM1, bilinear_lookup[ESI]+0x10*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0x4e); - addbyte(0x10); - addbyte(0x66); /*PADDW XMM0, XMM1*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc0 | 1 | (0 << 3)); - addbyte(0x66); /*MOV XMM1, XMM0*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0xc0 | 0 | (1 << 3)); - addbyte(0x66); /*PSRLDQ XMM0, 64*/ - addbyte(0x0f); - addbyte(0x73); - addbyte(0xd8); - addbyte(8); - addbyte(0x66); /*PADDW XMM0, XMM1*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc0 | 1 | (0 << 3)); - addbyte(0x66); /*PSRLW XMM0, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd0 | 0); - addbyte(8); - addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xc0); - - addbyte(0x8b); /*MOV ESI, [ESP+8]*/ - addbyte(0x74); - addbyte(0x24); - addbyte(8+16); /*CHECK!*/ - - addbyte(0x66); /*MOV EAX, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xc0); - } - else - { - addbyte(0x8b); /*MOV ECX, state->tex_lod[tmu]*/ - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, tex_lod[tmu])); - addbyte(0xb2); /*MOV DL, 8*/ - addbyte(8); - addbyte(0x8b); /*MOV ECX, [ECX+EAX*4]*/ - addbyte(0x0c); - addbyte(0x81); - addbyte(0x8b); /*MOV EBP, state->tex[EDI+ECX*4]*/ - addbyte(0xac); - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, tex[tmu])); - addbyte(0x28); /*SUB DL, CL*/ - addbyte(0xca); - addbyte(0x80); /*ADD CL, 4*/ - addbyte(0xc1); - addbyte(4); - addbyte(0x8b); /*MOV EAX, state->tex_s[EDI]*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tex_s)); - addbyte(0x8b); /*MOV EBX, state->tex_t[EDI]*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tex_t)); - if (params->tLOD[tmu] & LOD_TMIRROR_S) - { - addbyte(0xa9); /*TEST EAX, 0x1000*/ - addlong(0x1000); - addbyte(0x74); /*JZ +*/ - addbyte(2); - addbyte(0xf7); /*NOT EAX*/ - addbyte(0xd0); - } - if (params->tLOD[tmu] & LOD_TMIRROR_T) - { - addbyte(0xf7); /*TEST EBX, 0x1000*/ - addbyte(0xc3); - addlong(0x1000); - addbyte(0x74); /*JZ +*/ - addbyte(2); - addbyte(0xf7); /*NOT EBX*/ - addbyte(0xd3); - } - addbyte(0xd3); /*SHR EAX, CL*/ - addbyte(0xe8); - addbyte(0xd3); /*SHR EBX, CL*/ - addbyte(0xeb); - if (state->clamp_s[tmu]) - { - addbyte(0x85); /*TEST EAX, EAX*/ - addbyte(0xc0); - addbyte(0x0f); /*CMOVS EAX, zero*/ - addbyte(0x48); - addbyte(0x05); - addlong((uint32_t)&zero); - addbyte(0x3b); /*CMP EAX, params->tex_w_mask[ESI+ECX*4]*/ - addbyte(0x84); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, tex_w_mask[tmu]) - 0x10); - addbyte(0x0f); /*CMOVAE EAX, params->tex_w_mask[ESI+ECX*4]*/ - addbyte(0x43); - addbyte(0x84); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, tex_w_mask[tmu]) - 0x10); - - } - else - { - addbyte(0x23); /*AND EAX, params->tex_w_mask-0x10[ESI+ECX*4]*/ - addbyte(0x84); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, tex_w_mask[tmu]) - 0x10); - } - if (state->clamp_t[tmu]) - { - addbyte(0x85); /*TEST EBX, EBX*/ - addbyte(0xdb); - addbyte(0x0f); /*CMOVS EBX, zero*/ - addbyte(0x48); - addbyte(0x1d); - addlong((uint32_t)&zero); - addbyte(0x3b); /*CMP EBX, params->tex_h_mask[ESI+ECX*4]*/ - addbyte(0x9c); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu]) - 0x10); - addbyte(0x0f); /*CMOVAE EBX, params->tex_h_mask[ESI+ECX*4]*/ - addbyte(0x43); - addbyte(0x9c); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu]) - 0x10); - } - else - { - addbyte(0x23); /*AND EBX, params->tex_h_mask-0x10[ESI+ECX*4]*/ - addbyte(0x9c); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, tex_h_mask[tmu]) - 0x10); - } - addbyte(0x88); /*MOV CL, DL*/ - addbyte(0xd1); - addbyte(0xd3); /*SHL EBX, CL*/ - addbyte(0xe3); - addbyte(0x01); /*ADD EBX, EAX*/ - addbyte(0xc3); - - addbyte(0x8b); /*MOV EAX,[EBP+EBX*4]*/ - addbyte(0x44); - addbyte(0x9d); - addbyte(0); - } - } - - return block_pos; -} - -static inline void voodoo_generate(uint8_t *code_block, voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int depthop) -{ - int block_pos = 0; - int z_skip_pos = 0; - int a_skip_pos = 0; - int chroma_skip_pos = 0; - int depth_jump_pos = 0; - int depth_jump_pos2 = 0; - int loop_jump_pos = 0; -// xmm_01_w = (__m128i)0x0001000100010001ull; -// xmm_ff_w = (__m128i)0x00ff00ff00ff00ffull; -// xmm_ff_b = (__m128i)0x00000000ffffffffull; - xmm_01_w = _mm_set_epi32(0, 0, 0x00010001, 0x00010001); - xmm_ff_w = _mm_set_epi32(0, 0, 0x00ff00ff, 0x00ff00ff); - xmm_ff_b = _mm_set_epi32(0, 0, 0, 0x00ffffff); - minus_254 = _mm_set_epi32(0, 0, 0xff02ff02, 0xff02ff02); -// *(uint64_t *)&const_1_48 = 0x45b0000000000000ull; -// block_pos = 0; -// voodoo_get_depth = &code_block[block_pos]; - /*W at (%esp+4) - Z at (%esp+12) - new_depth at (%esp+16)*/ -// if ((params->fbzMode & FBZ_DEPTH_ENABLE) && (depth_op == DEPTHOP_NEVER)) -// { -// addbyte(0xC3); /*RET*/ -// return; -// } - addbyte(0x55); /*PUSH EBP*/ - addbyte(0x57); /*PUSH EDI*/ - addbyte(0x56); /*PUSH ESI*/ - addbyte(0x53); /*PUSH EBX*/ - - addbyte(0x8b); /*MOV EDI, [ESP+4]*/ - addbyte(0x7c); - addbyte(0x24); - addbyte(4+16); - loop_jump_pos = block_pos; - addbyte(0x8b); /*MOV ESI, [ESP+8]*/ - addbyte(0x74); - addbyte(0x24); - addbyte(8+16); - if (params->col_tiled || params->aux_tiled) - { - addbyte(0x8b); /*MOV EAX, state->x[EDI]*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, x)); - addbyte(0x89); /*MOV EBX, EAX*/ - addbyte(0xc3); - addbyte(0x83); /*AND EAX, 63*/ - addbyte(0xe0); - addbyte(63); - addbyte(0xc1); /*SHR EBX, 6*/ - addbyte(0xeb); - addbyte(6); - addbyte(0xc1); /*SHL EBX, 11 - tile is 128*32, << 12, div 2 because word index*/ - addbyte(0xe3); - addbyte(11); - addbyte(0x01); /*ADD EAX, EBX*/ - addbyte(0xd8); - addbyte(0x89); /*MOV state->x_tiled[EDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, x_tiled)); - } - addbyte(0x66); /*PXOR XMM2, XMM2*/ + if (params->textureMode[tmu] & 1) { + addbyte(0xdf); /*FILDq state->tmu0_w*/ + addbyte(0xaf); + addlong(tmu ? offsetof(voodoo_state_t, tmu1_w) : offsetof(voodoo_state_t, tmu0_w)); + addbyte(0xdd); /*FLDq const_1_48*/ + addbyte(0x05); + addlong((uint32_t) &const_1_48); + addbyte(0xde); /*FDIV ST(1)*/ + addbyte(0xf1); + addbyte(0xdf); /*FILDq state->tmu0_s*/ + addbyte(0xaf); + addlong(tmu ? offsetof(voodoo_state_t, tmu1_s) : offsetof(voodoo_state_t, tmu0_s)); + addbyte(0xdf); /*FILDq state->tmu0_t*/ /*ST(0)=t, ST(1)=s, ST(2)=1/w*/ + addbyte(0xaf); + addlong(tmu ? offsetof(voodoo_state_t, tmu1_t) : offsetof(voodoo_state_t, tmu0_t)); + addbyte(0xd9); /*FXCH ST(1)*/ /*ST(0)=s, ST(1)=t, ST(2)=1/w*/ + addbyte(0xc9); + addbyte(0xd8); /*FMUL ST(2)*/ /*ST(0)=s/w, ST(1)=t, ST(2)=1/w*/ + addbyte(0xca); + addbyte(0xd9); /*FXCH ST(1)*/ /*ST(0)=t, ST(1)=s/w, ST(2)=1/w*/ + addbyte(0xc9); + addbyte(0xd8); /*FMUL ST(2)*/ /*ST(0)=t/w, ST(1)=s/w, ST(2)=1/w*/ + addbyte(0xca); + addbyte(0xd9); /*FXCH ST(2)*/ /*ST(0)=1/w, ST(1)=s/w, ST(2)=t/w*/ + addbyte(0xca); + addbyte(0xd9); /*FSTPs log_temp*/ /*ST(0)=s/w, ST(1)=t/w*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, log_temp)); + addbyte(0xdf); /*FSITPq state->tex_s*/ + addbyte(0xbf); + addlong(offsetof(voodoo_state_t, tex_s)); + addbyte(0x8b); /*MOV EAX, log_temp*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, log_temp)); + addbyte(0xdf); /*FSITPq state->tex_t*/ + addbyte(0xbf); + addlong(offsetof(voodoo_state_t, tex_t)); + addbyte(0xc1); /*SHR EAX, 23-8*/ + addbyte(0xe8); + addbyte(15); + addbyte(0x0f); /*MOVZX EBX, AL*/ + addbyte(0xb6); + addbyte(0xd8); + addbyte(0x25); /*AND EAX, 0xff00*/ + addlong(0xff00); + addbyte(0x2d); /*SUB EAX, (127-44)<<8*/ + addlong((127 - 44 + 19) << 8); + addbyte(0x0f); /*MOVZX EBX, logtable[EBX]*/ + addbyte(0xb6); + addbyte(0x9b); + addlong((uint32_t) logtable); + addbyte(0x09); /*OR EAX, EBX*/ + addbyte(0xd8); + addbyte(0x03); /*ADD EAX, state->lod*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tmu[tmu].lod)); + addbyte(0x3b); /*CMP EAX, state->lod_min*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod_min[tmu])); + addbyte(0x0f); /*CMOVL EAX, state->lod_min*/ + addbyte(0x4c); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod_min[tmu])); + addbyte(0x3b); /*CMP EAX, state->lod_max*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod_max[tmu])); + addbyte(0x0f); /*CMOVNL EAX, state->lod_max*/ + addbyte(0x4d); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod_max[tmu])); + addbyte(0x0f); /*MOVZX EBX, AL*/ + addbyte(0xb6); + addbyte(0xd8); + addbyte(0xc1); /*SHR EAX, 8*/ + addbyte(0xe8); + addbyte(8); + addbyte(0x89); /*MOV state->lod_frac[tmu], EBX*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, lod_frac[tmu])); + addbyte(0x89); /*MOV state->lod, EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod)); + } else { + addbyte(0xf3); /*MOVQ XMM4, state->tmu0_s*/ addbyte(0x0f); - addbyte(0xef); - addbyte(0xd2); - - if ((params->fbzMode & FBZ_W_BUFFER) || (params->fogMode & (FOG_ENABLE|FOG_CONSTANT|FOG_Z|FOG_ALPHA)) == FOG_ENABLE) - { - addbyte(0xb8); /*MOV new_depth, 0*/ - addlong(0); - addbyte(0x66); /*TEST w+4, 0xffff*/ - addbyte(0xf7); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, w)+4); - addword(0xffff); - addbyte(0x75); /*JNZ got_depth*/ - depth_jump_pos = block_pos; - addbyte(0); -// addbyte(4+5+2+3+2+5+5+3+2+2+2+/*3+*/3+2+6+4+5+2+3); - addbyte(0x8b); /*MOV EDX, w*/ - addbyte(0x97); - addlong(offsetof(voodoo_state_t, w)); - addbyte(0xb8); /*MOV new_depth, 0xf001*/ - addlong(0xf001); - addbyte(0x89); /*MOV EBX, EDX*/ - addbyte(0xd3); - addbyte(0xc1); /*SHR EDX, 16*/ - addbyte(0xea); - addbyte(16); - addbyte(0x74); /*JZ got_depth*/ - depth_jump_pos2 = block_pos; - addbyte(0); -// addbyte(5+5+3+2+2+2+/*3+*/3+2+6+4+5+2+3); - addbyte(0xb9); /*MOV ECX, 19*/ - addlong(19); - addbyte(0x0f); /*BSR EAX, EDX*/ - addbyte(0xbd); - addbyte(0xc2); - addbyte(0xba); /*MOV EDX, 15*/ - addlong(15); + addbyte(0x7e); + addbyte(0xa7); + addlong(tmu ? offsetof(voodoo_state_t, tmu1_s) : offsetof(voodoo_state_t, tmu0_s)); + addbyte(0xf3); /*MOVQ XMM5, state->tmu0_t*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xaf); + addlong(tmu ? offsetof(voodoo_state_t, tmu1_t) : offsetof(voodoo_state_t, tmu0_t)); + addbyte(0xc7); /*MOV state->lod[tmu], 0*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod_frac[tmu])); + addlong(0); + addbyte(0x8b); /*MOV EAX, state->lod_min*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod_min[tmu])); + addbyte(0x66); /*SHRQ XMM4, 28*/ + addbyte(0x0f); + addbyte(0x73); + addbyte(0xd4); + addbyte(28); + addbyte(0x66); /*SHRQ XMM5, 28*/ + addbyte(0x0f); + addbyte(0x73); + addbyte(0xd5); + addbyte(28); + addbyte(0x0f); /*MOVZX EBX, AL*/ + addbyte(0xb6); + addbyte(0xd8); + addbyte(0xc1); /*SHR EAX, 8*/ + addbyte(0xe8); + addbyte(8); + addbyte(0x66); /*MOVQ state->tex_s, XMM4*/ + addbyte(0x0f); + addbyte(0xd6); + addbyte(0xa7); + addlong(offsetof(voodoo_state_t, tex_s)); + addbyte(0x66); /*MOVQ state->tex_t, XMM5*/ + addbyte(0x0f); + addbyte(0xd6); + addbyte(0xaf); + addlong(offsetof(voodoo_state_t, tex_t)); + addbyte(0x89); /*MOV state->lod_frac[tmu], EBX*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, lod_frac[tmu])); + addbyte(0x89); /*MOV state->lod, EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod)); + } + /*EAX = state->lod*/ + if (params->fbzColorPath & FBZCP_TEXTURE_ENABLED) { + if (voodoo->bilinear_enabled && (params->textureMode[tmu] & 6)) { + addbyte(0x8b); /*MOV ECX, state->tex_lod[tmu]*/ + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, tex_lod[tmu])); + addbyte(0xb2); /*MOV DL, 8*/ + addbyte(8); + addbyte(0x8b); /*MOV ECX, [ECX+EAX*4]*/ + addbyte(0x0c); + addbyte(0x81); + addbyte(0xbd); /*MOV EBP, 8*/ + addlong(8); + addbyte(0x28); /*SUB DL, CL*/ + addbyte(0xca); + addbyte(0xd3); /*SHL EBP, CL*/ + addbyte(0xe5); + addbyte(0x8b); /*MOV EAX, state->tex_s[EDI]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tex_s)); + addbyte(0x8b); /*MOV EBX, state->tex_t[EDI]*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tex_t)); + if (params->tLOD[tmu] & LOD_TMIRROR_S) { + addbyte(0xa9); /*TEST EAX, 0x1000*/ + addlong(0x1000); + addbyte(0x74); /*JZ +*/ + addbyte(2); + addbyte(0xf7); /*NOT EAX*/ + addbyte(0xd0); + } + if (params->tLOD[tmu] & LOD_TMIRROR_T) { + addbyte(0xf7); /*TEST EBX, 0x1000*/ + addbyte(0xc3); + addlong(0x1000); + addbyte(0x74); /*JZ +*/ + addbyte(2); addbyte(0xf7); /*NOT EBX*/ addbyte(0xd3); - addbyte(0x29); /*SUB EDX, EAX - EDX = exp*/ - addbyte(0xc2); - addbyte(0x29); /*SUB ECX, EDX*/ - addbyte(0xd1); - addbyte(0xc1); /*SHL EDX, 12*/ - addbyte(0xe2); - addbyte(12); - addbyte(0xd3); /*SHR EBX, CL*/ - addbyte(0xeb); - addbyte(0x81); /*AND EBX, 0xfff - EBX = mant*/ - addbyte(0xe3); - addlong(0xfff); - addbyte(0x8d); /*LEA EAX, 1[EDX, EBX]*/ - addbyte(0x44); - addbyte(0x13); - addbyte(1); - addbyte(0xbb); /*MOV EBX, 0xffff*/ - addlong(0xffff); - addbyte(0x39); /*CMP EAX, EBX*/ - addbyte(0xd8); - addbyte(0x0f); /*CMOVA EAX, EBX*/ + } + addbyte(0x29); /*SUB EAX, EBP*/ + addbyte(0xe8); + addbyte(0x29); /*SUB EBX, EBP*/ + addbyte(0xeb); + addbyte(0xd3); /*SAR EAX, CL*/ + addbyte(0xf8); + addbyte(0xd3); /*SAR EBX, CL*/ + addbyte(0xfb); + addbyte(0x89); /*MOV EBP, EAX*/ + addbyte(0xc5); + addbyte(0x89); /*MOV ECX, EBX*/ + addbyte(0xd9); + addbyte(0x83); /*AND EBP, 0xf*/ + addbyte(0xe5); + addbyte(0xf); + addbyte(0xc1); /*SHL ECX, 4*/ + addbyte(0xe1); + addbyte(4); + addbyte(0xc1); /*SAR EAX, 4*/ + addbyte(0xf8); + addbyte(4); + addbyte(0x81); /*AND ECX, 0xf0*/ + addbyte(0xe1); + addlong(0xf0); + addbyte(0xc1); /*SAR EBX, 4*/ + addbyte(0xfb); + addbyte(4); + addbyte(0x09); /*OR EBP, ECX*/ + addbyte(0xcd); + addbyte(0x8b); /*MOV ECX, state->lod[EDI]*/ + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, lod)); + addbyte(0xc1); /*SHL EBP, 5*/ + addbyte(0xe5); + addbyte(5); + /*EAX = S, EBX = T, ECX = LOD, EDX = tex_shift, ESI=params, EDI=state, EBP = bilinear shift*/ + addbyte(0x8d); /*LEA ESI, [ESI+ECX*4]*/ + addbyte(0x34); + addbyte(0x8e); + addbyte(0x89); /*MOV ebp_store, EBP*/ + addbyte(0xaf); + addlong(offsetof(voodoo_state_t, ebp_store)); + addbyte(0x8b); /*MOV EBP, state->tex[EDI+ECX*4]*/ + addbyte(0xac); + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, tex[tmu])); + addbyte(0x88); /*MOV CL, DL*/ + addbyte(0xd1); + addbyte(0x89); /*MOV EDX, EBX*/ + addbyte(0xda); + if (!state->clamp_s[tmu]) { + addbyte(0x23); /*AND EAX, params->tex_w_mask[ESI]*/ + addbyte(0x86); + addlong(offsetof(voodoo_params_t, tex_w_mask[tmu])); + } + addbyte(0x83); /*ADD EDX, 1*/ + addbyte(0xc2); + addbyte(1); + if (state->clamp_t[tmu]) { + addbyte(0x0f); /*CMOVS EDX, zero*/ + addbyte(0x48); + addbyte(0x15); + addlong((uint32_t) &zero); + addbyte(0x3b); /*CMP EDX, params->tex_h_mask[ESI]*/ + addbyte(0x96); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); + addbyte(0x0f); /*CMOVA EDX, params->tex_h_mask[ESI]*/ addbyte(0x47); + addbyte(0x96); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); + addbyte(0x85); /*TEST EBX,EBX*/ + addbyte(0xdb); + addbyte(0x0f); /*CMOVS EBX, zero*/ + addbyte(0x48); + addbyte(0x1d); + addlong((uint32_t) &zero); + addbyte(0x3b); /*CMP EBX, params->tex_h_mask[ESI]*/ + addbyte(0x9e); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); + addbyte(0x0f); /*CMOVA EBX, params->tex_h_mask[ESI]*/ + addbyte(0x47); + addbyte(0x9e); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); + } else { + addbyte(0x23); /*AND EDX, params->tex_h_mask[ESI]*/ + addbyte(0x96); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); + addbyte(0x23); /*AND EBX, params->tex_h_mask[ESI]*/ + addbyte(0x9e); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu])); + } + /*EAX = S, EBX = T0, EDX = T1*/ + addbyte(0xd3); /*SHL EBX, CL*/ + addbyte(0xe3); + addbyte(0xd3); /*SHL EDX, CL*/ + addbyte(0xe2); + addbyte(0x8d); /*LEA EBX,[EBP+EBX*2]*/ + addbyte(0x5c); + addbyte(0x9d); + addbyte(0); + addbyte(0x8d); /*LEA EDX,[EBP+EDX*2]*/ + addbyte(0x54); + addbyte(0x95); + addbyte(0); + if (state->clamp_s[tmu]) { + addbyte(0x8b); /*MOV EBP, params->tex_w_mask[ESI]*/ + addbyte(0xae); + addlong(offsetof(voodoo_params_t, tex_w_mask[tmu])); + addbyte(0x85); /*TEST EAX, EAX*/ + addbyte(0xc0); + addbyte(0x8b); /*MOV ESI, ebp_store*/ + addbyte(0xb7); + addlong(offsetof(voodoo_state_t, ebp_store)); + addbyte(0x0f); /*CMOVS EAX, zero*/ + addbyte(0x48); + addbyte(0x05); + addlong((uint32_t) &zero); + addbyte(0x78); /*JS + - clamp on 0*/ + addbyte(2 + 3 + 2 + 5 + 5 + 2); + addbyte(0x3b); /*CMP EAX, EBP*/ + addbyte(0xc5); + addbyte(0x0f); /*CMOVAE EAX, EBP*/ + addbyte(0x43); + addbyte(0xc5); + addbyte(0x73); /*JAE + - clamp on +*/ + addbyte(5 + 5 + 2); + } else { + addbyte(0x3b); /*CMP EAX, params->tex_w_mask[ESI] - is S at texture edge (ie will wrap/clamp)?*/ + addbyte(0x86); + addlong(offsetof(voodoo_params_t, tex_w_mask[tmu])); + addbyte(0x8b); /*MOV ESI, ebp_store*/ + addbyte(0xb7); + addlong(offsetof(voodoo_state_t, ebp_store)); + addbyte(0x74); /*JE +*/ + addbyte(5 + 5 + 2); + } + + addbyte(0xf3); /*MOVQ XMM0, [EBX+EAX*4]*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0x04); + addbyte(0x83); + addbyte(0xf3); /*MOVQ XMM1, [EDX+EAX*4]*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0x0c); + addbyte(0x82); + + if (state->clamp_s[tmu]) { + addbyte(0xeb); /*JMP +*/ + addbyte(5 + 5 + 4 + 4); + + /*S clamped - the two S coordinates are the same*/ + addbyte(0x66); /*MOVD XMM0, [EBX+EAX*4]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x04); + addbyte(0x83); + addbyte(0x66); /*MOVD XMM1, [EDX+EAX*4]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x0c); + addbyte(0x82); + addbyte(0x66); /*PUNPCKLDQ XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x62); + addbyte(0xc0); + addbyte(0x66); /*PUNPCKLDQ XMM1, XMM1*/ + addbyte(0x0f); + addbyte(0x62); + addbyte(0xc9); + } else { + addbyte(0xeb); /*JMP +*/ + addbyte(5 + 5 + 5 + 5 + 6 + 6); + + /*S wrapped - the two S coordinates are not contiguous*/ + addbyte(0x66); /*MOVD XMM0, [EBX+EAX*4]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x04); + addbyte(0x83); + addbyte(0x66); /*MOVD XMM1, [EDX+EAX*4]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x0c); + addbyte(0x82); + addbyte(0x66); /*PINSRW XMM0, [EBX], 2*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0x03); + addbyte(0x02); + addbyte(0x66); /*PINSRW XMM1, [EDX], 2*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0x0a); + addbyte(0x02); + addbyte(0x66); /*PINSRW XMM0, 2[EBX], 3*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0x43); + addbyte(0x02); + addbyte(0x03); + addbyte(0x66); /*PINSRW XMM1, 2[EDX], 3*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0x4a); + addbyte(0x02); + addbyte(0x03); + } + + addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xc2); + addbyte(0x66); /*PUNPCKLBW XMM1, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xca); + + addbyte(0x81); /*ADD ESI, bilinear_lookup*/ + addbyte(0xc6); + addlong((uint32_t) bilinear_lookup); + + addbyte(0x66); /*PMULLW XMM0, bilinear_lookup[ESI]*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0x06); + addbyte(0x66); /*PMULLW XMM1, bilinear_lookup[ESI]+0x10*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0x4e); + addbyte(0x10); + addbyte(0x66); /*PADDW XMM0, XMM1*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc0 | 1 | (0 << 3)); + addbyte(0x66); /*MOV XMM1, XMM0*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0xc0 | 0 | (1 << 3)); + addbyte(0x66); /*PSRLDQ XMM0, 64*/ + addbyte(0x0f); + addbyte(0x73); + addbyte(0xd8); + addbyte(8); + addbyte(0x66); /*PADDW XMM0, XMM1*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc0 | 1 | (0 << 3)); + addbyte(0x66); /*PSRLW XMM0, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd0 | 0); + addbyte(8); + addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xc0); + + addbyte(0x8b); /*MOV ESI, [ESP+8]*/ + addbyte(0x74); + addbyte(0x24); + addbyte(8 + 16); /*CHECK!*/ + + addbyte(0x66); /*MOV EAX, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xc0); + } else { + addbyte(0x8b); /*MOV ECX, state->tex_lod[tmu]*/ + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, tex_lod[tmu])); + addbyte(0xb2); /*MOV DL, 8*/ + addbyte(8); + addbyte(0x8b); /*MOV ECX, [ECX+EAX*4]*/ + addbyte(0x0c); + addbyte(0x81); + addbyte(0x8b); /*MOV EBP, state->tex[EDI+ECX*4]*/ + addbyte(0xac); + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, tex[tmu])); + addbyte(0x28); /*SUB DL, CL*/ + addbyte(0xca); + addbyte(0x80); /*ADD CL, 4*/ + addbyte(0xc1); + addbyte(4); + addbyte(0x8b); /*MOV EAX, state->tex_s[EDI]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tex_s)); + addbyte(0x8b); /*MOV EBX, state->tex_t[EDI]*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tex_t)); + if (params->tLOD[tmu] & LOD_TMIRROR_S) { + addbyte(0xa9); /*TEST EAX, 0x1000*/ + addlong(0x1000); + addbyte(0x74); /*JZ +*/ + addbyte(2); + addbyte(0xf7); /*NOT EAX*/ + addbyte(0xd0); + } + if (params->tLOD[tmu] & LOD_TMIRROR_T) { + addbyte(0xf7); /*TEST EBX, 0x1000*/ addbyte(0xc3); + addlong(0x1000); + addbyte(0x74); /*JZ +*/ + addbyte(2); + addbyte(0xf7); /*NOT EBX*/ + addbyte(0xd3); + } + addbyte(0xd3); /*SHR EAX, CL*/ + addbyte(0xe8); + addbyte(0xd3); /*SHR EBX, CL*/ + addbyte(0xeb); + if (state->clamp_s[tmu]) { + addbyte(0x85); /*TEST EAX, EAX*/ + addbyte(0xc0); + addbyte(0x0f); /*CMOVS EAX, zero*/ + addbyte(0x48); + addbyte(0x05); + addlong((uint32_t) &zero); + addbyte(0x3b); /*CMP EAX, params->tex_w_mask[ESI+ECX*4]*/ + addbyte(0x84); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, tex_w_mask[tmu]) - 0x10); + addbyte(0x0f); /*CMOVAE EAX, params->tex_w_mask[ESI+ECX*4]*/ + addbyte(0x43); + addbyte(0x84); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, tex_w_mask[tmu]) - 0x10); - if (depth_jump_pos) - *(uint8_t *)&code_block[depth_jump_pos] = (block_pos - depth_jump_pos) - 1; - if (depth_jump_pos) - *(uint8_t *)&code_block[depth_jump_pos2] = (block_pos - depth_jump_pos2) - 1; + } else { + addbyte(0x23); /*AND EAX, params->tex_w_mask-0x10[ESI+ECX*4]*/ + addbyte(0x84); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, tex_w_mask[tmu]) - 0x10); + } + if (state->clamp_t[tmu]) { + addbyte(0x85); /*TEST EBX, EBX*/ + addbyte(0xdb); + addbyte(0x0f); /*CMOVS EBX, zero*/ + addbyte(0x48); + addbyte(0x1d); + addlong((uint32_t) &zero); + addbyte(0x3b); /*CMP EBX, params->tex_h_mask[ESI+ECX*4]*/ + addbyte(0x9c); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu]) - 0x10); + addbyte(0x0f); /*CMOVAE EBX, params->tex_h_mask[ESI+ECX*4]*/ + addbyte(0x43); + addbyte(0x9c); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu]) - 0x10); + } else { + addbyte(0x23); /*AND EBX, params->tex_h_mask-0x10[ESI+ECX*4]*/ + addbyte(0x9c); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, tex_h_mask[tmu]) - 0x10); + } + addbyte(0x88); /*MOV CL, DL*/ + addbyte(0xd1); + addbyte(0xd3); /*SHL EBX, CL*/ + addbyte(0xe3); + addbyte(0x01); /*ADD EBX, EAX*/ + addbyte(0xc3); - if ((params->fogMode & (FOG_ENABLE|FOG_CONSTANT|FOG_Z|FOG_ALPHA)) == FOG_ENABLE) - { - addbyte(0x89); /*MOV state->w_depth[EDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, w_depth)); - } + addbyte(0x8b); /*MOV EAX,[EBP+EBX*4]*/ + addbyte(0x44); + addbyte(0x9d); + addbyte(0); } - if (!(params->fbzMode & FBZ_W_BUFFER)) - { - addbyte(0x8b); /*MOV EAX, z*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, z)); - addbyte(0xbb); /*MOV EBX, 0xffff*/ - addlong(0xffff); + } + + return block_pos; +} + +static inline void +voodoo_generate(uint8_t *code_block, voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int depthop) +{ + int block_pos = 0; + int z_skip_pos = 0; + int a_skip_pos = 0; + int chroma_skip_pos = 0; + int depth_jump_pos = 0; + int depth_jump_pos2 = 0; + int loop_jump_pos = 0; + // xmm_01_w = (__m128i)0x0001000100010001ull; + // xmm_ff_w = (__m128i)0x00ff00ff00ff00ffull; + // xmm_ff_b = (__m128i)0x00000000ffffffffull; + xmm_01_w = _mm_set_epi32(0, 0, 0x00010001, 0x00010001); + xmm_ff_w = _mm_set_epi32(0, 0, 0x00ff00ff, 0x00ff00ff); + xmm_ff_b = _mm_set_epi32(0, 0, 0, 0x00ffffff); + minus_254 = _mm_set_epi32(0, 0, 0xff02ff02, 0xff02ff02); + // *(uint64_t *)&const_1_48 = 0x45b0000000000000ull; + // block_pos = 0; + // voodoo_get_depth = &code_block[block_pos]; + /*W at (%esp+4) + Z at (%esp+12) + new_depth at (%esp+16)*/ + // if ((params->fbzMode & FBZ_DEPTH_ENABLE) && (depth_op == DEPTHOP_NEVER)) + // { + // addbyte(0xC3); /*RET*/ + // return; + // } + addbyte(0x55); /*PUSH EBP*/ + addbyte(0x57); /*PUSH EDI*/ + addbyte(0x56); /*PUSH ESI*/ + addbyte(0x53); /*PUSH EBX*/ + + addbyte(0x8b); /*MOV EDI, [ESP+4]*/ + addbyte(0x7c); + addbyte(0x24); + addbyte(4 + 16); + loop_jump_pos = block_pos; + addbyte(0x8b); /*MOV ESI, [ESP+8]*/ + addbyte(0x74); + addbyte(0x24); + addbyte(8 + 16); + if (params->col_tiled || params->aux_tiled) { + addbyte(0x8b); /*MOV EAX, state->x[EDI]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, x)); + addbyte(0x89); /*MOV EBX, EAX*/ + addbyte(0xc3); + addbyte(0x83); /*AND EAX, 63*/ + addbyte(0xe0); + addbyte(63); + addbyte(0xc1); /*SHR EBX, 6*/ + addbyte(0xeb); + addbyte(6); + addbyte(0xc1); /*SHL EBX, 11 - tile is 128*32, << 12, div 2 because word index*/ + addbyte(0xe3); + addbyte(11); + addbyte(0x01); /*ADD EAX, EBX*/ + addbyte(0xd8); + addbyte(0x89); /*MOV state->x_tiled[EDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, x_tiled)); + } + addbyte(0x66); /*PXOR XMM2, XMM2*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xd2); + + if ((params->fbzMode & FBZ_W_BUFFER) || (params->fogMode & (FOG_ENABLE | FOG_CONSTANT | FOG_Z | FOG_ALPHA)) == FOG_ENABLE) { + addbyte(0xb8); /*MOV new_depth, 0*/ + addlong(0); + addbyte(0x66); /*TEST w+4, 0xffff*/ + addbyte(0xf7); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, w) + 4); + addword(0xffff); + addbyte(0x75); /*JNZ got_depth*/ + depth_jump_pos = block_pos; + addbyte(0); + // addbyte(4+5+2+3+2+5+5+3+2+2+2+/*3+*/3+2+6+4+5+2+3); + addbyte(0x8b); /*MOV EDX, w*/ + addbyte(0x97); + addlong(offsetof(voodoo_state_t, w)); + addbyte(0xb8); /*MOV new_depth, 0xf001*/ + addlong(0xf001); + addbyte(0x89); /*MOV EBX, EDX*/ + addbyte(0xd3); + addbyte(0xc1); /*SHR EDX, 16*/ + addbyte(0xea); + addbyte(16); + addbyte(0x74); /*JZ got_depth*/ + depth_jump_pos2 = block_pos; + addbyte(0); + // addbyte(5+5+3+2+2+2+/*3+*/3+2+6+4+5+2+3); + addbyte(0xb9); /*MOV ECX, 19*/ + addlong(19); + addbyte(0x0f); /*BSR EAX, EDX*/ + addbyte(0xbd); + addbyte(0xc2); + addbyte(0xba); /*MOV EDX, 15*/ + addlong(15); + addbyte(0xf7); /*NOT EBX*/ + addbyte(0xd3); + addbyte(0x29); /*SUB EDX, EAX - EDX = exp*/ + addbyte(0xc2); + addbyte(0x29); /*SUB ECX, EDX*/ + addbyte(0xd1); + addbyte(0xc1); /*SHL EDX, 12*/ + addbyte(0xe2); + addbyte(12); + addbyte(0xd3); /*SHR EBX, CL*/ + addbyte(0xeb); + addbyte(0x81); /*AND EBX, 0xfff - EBX = mant*/ + addbyte(0xe3); + addlong(0xfff); + addbyte(0x8d); /*LEA EAX, 1[EDX, EBX]*/ + addbyte(0x44); + addbyte(0x13); + addbyte(1); + addbyte(0xbb); /*MOV EBX, 0xffff*/ + addlong(0xffff); + addbyte(0x39); /*CMP EAX, EBX*/ + addbyte(0xd8); + addbyte(0x0f); /*CMOVA EAX, EBX*/ + addbyte(0x47); + addbyte(0xc3); + + if (depth_jump_pos) + *(uint8_t *) &code_block[depth_jump_pos] = (block_pos - depth_jump_pos) - 1; + if (depth_jump_pos) + *(uint8_t *) &code_block[depth_jump_pos2] = (block_pos - depth_jump_pos2) - 1; + + if ((params->fogMode & (FOG_ENABLE | FOG_CONSTANT | FOG_Z | FOG_ALPHA)) == FOG_ENABLE) { + addbyte(0x89); /*MOV state->w_depth[EDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, w_depth)); + } + } + if (!(params->fbzMode & FBZ_W_BUFFER)) { + addbyte(0x8b); /*MOV EAX, z*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, z)); + addbyte(0xbb); /*MOV EBX, 0xffff*/ + addlong(0xffff); + addbyte(0x31); /*XOR ECX, ECX*/ + addbyte(0xc9); + addbyte(0xc1); /*SAR EAX, 12*/ + addbyte(0xf8); + addbyte(12); + addbyte(0x0f); /*CMOVS EAX, ECX*/ + addbyte(0x48); + addbyte(0xc1); + addbyte(0x39); /*CMP EAX, EBX*/ + addbyte(0xd8); + addbyte(0x0f); /*CMOVA EAX, EBX*/ + addbyte(0x47); + addbyte(0xc3); + } + + if (params->fbzMode & FBZ_DEPTH_BIAS) { + addbyte(0x0f); /*MOVSX EDX, params->zaColor[ESI]*/ + addbyte(0xbf); + addbyte(0x96); + addlong(offsetof(voodoo_params_t, zaColor)); + if (params->fbzMode & FBZ_W_BUFFER) { + addbyte(0xbb); /*MOV EBX, 0xffff*/ + addlong(0xffff); + addbyte(0x31); /*XOR ECX, ECX*/ + addbyte(0xc9); + } + addbyte(0x01); /*ADD EAX, EDX*/ + addbyte(0xd0); + addbyte(0x0f); /*CMOVS EAX, ECX*/ + addbyte(0x48); + addbyte(0xc1); + addbyte(0x39); /*CMP EAX, EBX*/ + addbyte(0xd8); + addbyte(0x0f); /*CMOVA EAX, EBX*/ + addbyte(0x47); + addbyte(0xc3); + } + + addbyte(0x89); /*MOV state->new_depth[EDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, new_depth)); + + if ((params->fbzMode & FBZ_DEPTH_ENABLE) && (depthop != DEPTHOP_ALWAYS) && (depthop != DEPTHOP_NEVER)) { + addbyte(0x8b); /*MOV EBX, state->x[EDI]*/ + addbyte(0x9f); + if (voodoo->aux_tiled) + addlong(offsetof(voodoo_state_t, x_tiled)); + else + addlong(offsetof(voodoo_state_t, x)); + addbyte(0x8b); /*MOV ECX, aux_mem[EDI]*/ + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, aux_mem)); + addbyte(0x0f); /*MOVZX EBX, [ECX+EBX*2]*/ + addbyte(0xb7); + addbyte(0x1c); + addbyte(0x59); + if (params->fbzMode & FBZ_DEPTH_SOURCE) { + addbyte(0x0f); /*MOVZX EAX, zaColor[ESI]*/ + addbyte(0xb7); + addbyte(0x86); + addlong(offsetof(voodoo_params_t, zaColor)); + } + addbyte(0x39); /*CMP EAX, EBX*/ + addbyte(0xd8); + if (depthop == DEPTHOP_LESSTHAN) { + addbyte(0x0f); /*JAE skip*/ + addbyte(0x83); + z_skip_pos = block_pos; + addlong(0); + } else if (depthop == DEPTHOP_EQUAL) { + addbyte(0x0f); /*JNE skip*/ + addbyte(0x85); + z_skip_pos = block_pos; + addlong(0); + } else if (depthop == DEPTHOP_LESSTHANEQUAL) { + addbyte(0x0f); /*JA skip*/ + addbyte(0x87); + z_skip_pos = block_pos; + addlong(0); + } else if (depthop == DEPTHOP_GREATERTHAN) { + addbyte(0x0f); /*JBE skip*/ + addbyte(0x86); + z_skip_pos = block_pos; + addlong(0); + } else if (depthop == DEPTHOP_NOTEQUAL) { + addbyte(0x0f); /*JE skip*/ + addbyte(0x84); + z_skip_pos = block_pos; + addlong(0); + } else if (depthop == DEPTHOP_GREATERTHANEQUAL) { + addbyte(0x0f); /*JB skip*/ + addbyte(0x82); + z_skip_pos = block_pos; + addlong(0); + } else + fatal("Bad depth_op\n"); + } else if ((params->fbzMode & FBZ_DEPTH_ENABLE) && (depthop == DEPTHOP_NEVER)) { + addbyte(0xC3); /*RET*/ + // addbyte(0x30); /*XOR EAX, EAX*/ + // addbyte(0xc0); + } + // else + // { + // addbyte(0xb0); /*MOV AL, 1*/ + // addbyte(1); + // } + + // voodoo_combine = &code_block[block_pos]; + /*XMM0 = colour*/ + /*XMM2 = 0 (for unpacking*/ + + /*EDI = state, ESI = params*/ + + if ((params->textureMode[0] & TEXTUREMODE_LOCAL_MASK) == TEXTUREMODE_LOCAL || !voodoo->dual_tmus) { + /*TMU0 only sampling local colour or only one TMU, only sample TMU0*/ + block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 0); + + addbyte(0x66); /*MOVD XMM0, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xc0); + addbyte(0xc1); /*SHR EAX, 24*/ + addbyte(0xe8); + addbyte(24); + addbyte(0x89); /*MOV state->tex_a[EDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tex_a)); + } else if ((params->textureMode[0] & TEXTUREMODE_MASK) == TEXTUREMODE_PASSTHROUGH) { + /*TMU0 in pass-through mode, only sample TMU1*/ + block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 1); + + addbyte(0x66); /*MOVD XMM0, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xc0); + addbyte(0xc1); /*SHR EAX, 24*/ + addbyte(0xe8); + addbyte(24); + addbyte(0x89); /*MOV state->tex_a[EDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tex_a)); + } else { + block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 1); + + addbyte(0x66); /*MOVD XMM3, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xd8); + if ((params->textureMode[1] & TEXTUREMODE_TRILINEAR) && tc_sub_clocal_1) { + addbyte(0x8b); /*MOV EAX, state->lod*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod)); + if (!tc_reverse_blend_1) { + addbyte(0xbb); /*MOV EBX, 1*/ + addlong(1); + } else { + addbyte(0x31); /*XOR EBX, EBX*/ + addbyte(0xdb); + } + addbyte(0x83); /*AND EAX, 1*/ + addbyte(0xe0); + addbyte(1); + if (!tca_reverse_blend_1) { + addbyte(0xb9); /*MOV ECX, 1*/ + addlong(1); + } else { addbyte(0x31); /*XOR ECX, ECX*/ addbyte(0xc9); - addbyte(0xc1); /*SAR EAX, 12*/ - addbyte(0xf8); - addbyte(12); - addbyte(0x0f); /*CMOVS EAX, ECX*/ - addbyte(0x48); - addbyte(0xc1); - addbyte(0x39); /*CMP EAX, EBX*/ - addbyte(0xd8); - addbyte(0x0f); /*CMOVA EAX, EBX*/ - addbyte(0x47); - addbyte(0xc3); + } + addbyte(0x31); /*XOR EBX, EAX*/ + addbyte(0xc3); + addbyte(0x31); /*XOR ECX, EAX*/ + addbyte(0xc1); + addbyte(0xc1); /*SHL EBX, 4*/ + addbyte(0xe3); + addbyte(4); + /*EBX = tc_reverse_blend, ECX=tca_reverse_blend*/ } - - if (params->fbzMode & FBZ_DEPTH_BIAS) - { - addbyte(0x0f); /*MOVSX EDX, params->zaColor[ESI]*/ - addbyte(0xbf); - addbyte(0x96); - addlong(offsetof(voodoo_params_t, zaColor)); - if (params->fbzMode & FBZ_W_BUFFER) - { - addbyte(0xbb); /*MOV EBX, 0xffff*/ - addlong(0xffff); - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - addbyte(0x01); /*ADD EAX, EDX*/ - addbyte(0xd0); - addbyte(0x0f); /*CMOVS EAX, ECX*/ - addbyte(0x48); - addbyte(0xc1); - addbyte(0x39); /*CMP EAX, EBX*/ - addbyte(0xd8); - addbyte(0x0f); /*CMOVA EAX, EBX*/ - addbyte(0x47); - addbyte(0xc3); - } - - addbyte(0x89); /*MOV state->new_depth[EDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, new_depth)); - - if ((params->fbzMode & FBZ_DEPTH_ENABLE) && (depthop != DEPTHOP_ALWAYS) && (depthop != DEPTHOP_NEVER)) - { - addbyte(0x8b); /*MOV EBX, state->x[EDI]*/ - addbyte(0x9f); - if (voodoo->aux_tiled) - addlong(offsetof(voodoo_state_t, x_tiled)); - else - addlong(offsetof(voodoo_state_t, x)); - addbyte(0x8b);/*MOV ECX, aux_mem[EDI]*/ - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, aux_mem)); - addbyte(0x0f); /*MOVZX EBX, [ECX+EBX*2]*/ - addbyte(0xb7); - addbyte(0x1c); - addbyte(0x59); - if (params->fbzMode & FBZ_DEPTH_SOURCE) - { - addbyte(0x0f); /*MOVZX EAX, zaColor[ESI]*/ - addbyte(0xb7); - addbyte(0x86); - addlong(offsetof(voodoo_params_t, zaColor)); - } - addbyte(0x39); /*CMP EAX, EBX*/ - addbyte(0xd8); - if (depthop == DEPTHOP_LESSTHAN) - { - addbyte(0x0f); /*JAE skip*/ - addbyte(0x83); - z_skip_pos = block_pos; - addlong(0); - } - else if (depthop == DEPTHOP_EQUAL) - { - addbyte(0x0f); /*JNE skip*/ - addbyte(0x85); - z_skip_pos = block_pos; - addlong(0); - } - else if (depthop == DEPTHOP_LESSTHANEQUAL) - { - addbyte(0x0f); /*JA skip*/ - addbyte(0x87); - z_skip_pos = block_pos; - addlong(0); - } - else if (depthop == DEPTHOP_GREATERTHAN) - { - addbyte(0x0f); /*JBE skip*/ - addbyte(0x86); - z_skip_pos = block_pos; - addlong(0); - } - else if (depthop == DEPTHOP_NOTEQUAL) - { - addbyte(0x0f); /*JE skip*/ - addbyte(0x84); - z_skip_pos = block_pos; - addlong(0); - } - else if (depthop == DEPTHOP_GREATERTHANEQUAL) - { - addbyte(0x0f); /*JB skip*/ - addbyte(0x82); - z_skip_pos = block_pos; - addlong(0); - } - else - fatal("Bad depth_op\n"); - } - else if ((params->fbzMode & FBZ_DEPTH_ENABLE) && (depthop == DEPTHOP_NEVER)) - { - addbyte(0xC3); /*RET*/ -// addbyte(0x30); /*XOR EAX, EAX*/ -// addbyte(0xc0); - } -// else -// { -// addbyte(0xb0); /*MOV AL, 1*/ -// addbyte(1); -// } - - -// voodoo_combine = &code_block[block_pos]; - /*XMM0 = colour*/ - /*XMM2 = 0 (for unpacking*/ - - /*EDI = state, ESI = params*/ - - if ((params->textureMode[0] & TEXTUREMODE_LOCAL_MASK) == TEXTUREMODE_LOCAL || !voodoo->dual_tmus) - { - /*TMU0 only sampling local colour or only one TMU, only sample TMU0*/ - block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 0); - - addbyte(0x66); /*MOVD XMM0, EAX*/ + addbyte(0x66); /*PUNPCKLBW XMM3, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xda); + if (tc_sub_clocal_1) { + switch (tc_mselect_1) { + case TC_MSELECT_ZERO: + addbyte(0x66); /*PXOR XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xc0); + break; + case TC_MSELECT_CLOCAL: + addbyte(0xf3); /*MOVQ XMM0, XMM3*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xc3); + break; + case TC_MSELECT_AOTHER: + addbyte(0x66); /*PXOR XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xc0); + break; + case TC_MSELECT_ALOCAL: + addbyte(0xf2); /*PSHUFLW XMM0, XMM3, 0xff*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xc3); + addbyte(0xff); + break; + case TC_MSELECT_DETAIL: + addbyte(0xb8); /*MOV EAX, params->detail_bias[1]*/ + addlong(params->detail_bias[1]); + addbyte(0x2b); /*SUB EAX, state->lod*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod)); + addbyte(0xba); /*MOV EDX, params->detail_max[1]*/ + addlong(params->detail_max[1]); + addbyte(0xc1); /*SHL EAX, params->detail_scale[1]*/ + addbyte(0xe0); + addbyte(params->detail_scale[1]); + addbyte(0x39); /*CMP EAX, EDX*/ + addbyte(0xd0); + addbyte(0x0f); /*CMOVNL EAX, EDX*/ + addbyte(0x4d); + addbyte(0xc2); + addbyte(0x66); /*MOVD XMM0, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xc0); + addbyte(0xf2); /*PSHUFLW XMM0, XMM0, 0*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xc0); + addbyte(0); + break; + case TC_MSELECT_LOD_FRAC: + addbyte(0x66); /*MOVD XMM0, state->lod_frac[1]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod_frac[1])); + addbyte(0xf2); /*PSHUFLW XMM0, XMM0, 0*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xc0); + addbyte(0); + break; + } + if (params->textureMode[1] & TEXTUREMODE_TRILINEAR) { + addbyte(0x66); /*PXOR XMM0, xmm_00_ff_w[EBX]*/ addbyte(0x0f); - addbyte(0x6e); - addbyte(0xc0); - addbyte(0xc1); /*SHR EAX, 24*/ - addbyte(0xe8); - addbyte(24); - addbyte(0x89); /*MOV state->tex_a[EDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tex_a)); - } - else if ((params->textureMode[0] & TEXTUREMODE_MASK) == TEXTUREMODE_PASSTHROUGH) - { - /*TMU0 in pass-through mode, only sample TMU1*/ - block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 1); - - addbyte(0x66); /*MOVD XMM0, EAX*/ + addbyte(0xef); + addbyte(0x83); + addlong((uint32_t) &xmm_00_ff_w[0]); + } else if (!tc_reverse_blend_1) { + addbyte(0x66); /*PXOR XMM0, xmm_ff_w*/ addbyte(0x0f); - addbyte(0x6e); - addbyte(0xc0); - addbyte(0xc1); /*SHR EAX, 24*/ - addbyte(0xe8); - addbyte(24); - addbyte(0x89); /*MOV state->tex_a[EDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tex_a)); - } - else - { - block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 1); - - addbyte(0x66); /*MOVD XMM3, EAX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xd8); - if ((params->textureMode[1] & TEXTUREMODE_TRILINEAR) && tc_sub_clocal_1) - { - addbyte(0x8b); /*MOV EAX, state->lod*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod)); - if (!tc_reverse_blend_1) - { - addbyte(0xbb); /*MOV EBX, 1*/ - addlong(1); - } - else - { - addbyte(0x31); /*XOR EBX, EBX*/ - addbyte(0xdb); - } - addbyte(0x83); /*AND EAX, 1*/ - addbyte(0xe0); - addbyte(1); - if (!tca_reverse_blend_1) - { - addbyte(0xb9); /*MOV ECX, 1*/ - addlong(1); - } - else - { - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - addbyte(0x31); /*XOR EBX, EAX*/ - addbyte(0xc3); - addbyte(0x31); /*XOR ECX, EAX*/ - addbyte(0xc1); - addbyte(0xc1); /*SHL EBX, 4*/ - addbyte(0xe3); - addbyte(4); - /*EBX = tc_reverse_blend, ECX=tca_reverse_blend*/ - } - addbyte(0x66); /*PUNPCKLBW XMM3, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xda); - if (tc_sub_clocal_1) - { - switch (tc_mselect_1) - { - case TC_MSELECT_ZERO: - addbyte(0x66); /*PXOR XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xc0); - break; - case TC_MSELECT_CLOCAL: - addbyte(0xf3); /*MOVQ XMM0, XMM3*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xc3); - break; - case TC_MSELECT_AOTHER: - addbyte(0x66); /*PXOR XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xc0); - break; - case TC_MSELECT_ALOCAL: - addbyte(0xf2); /*PSHUFLW XMM0, XMM3, 0xff*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xc3); - addbyte(0xff); - break; - case TC_MSELECT_DETAIL: - addbyte(0xb8); /*MOV EAX, params->detail_bias[1]*/ - addlong(params->detail_bias[1]); - addbyte(0x2b); /*SUB EAX, state->lod*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod)); - addbyte(0xba); /*MOV EDX, params->detail_max[1]*/ - addlong(params->detail_max[1]); - addbyte(0xc1); /*SHL EAX, params->detail_scale[1]*/ - addbyte(0xe0); - addbyte(params->detail_scale[1]); - addbyte(0x39); /*CMP EAX, EDX*/ - addbyte(0xd0); - addbyte(0x0f); /*CMOVNL EAX, EDX*/ - addbyte(0x4d); - addbyte(0xc2); - addbyte(0x66); /*MOVD XMM0, EAX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xc0); - addbyte(0xf2); /*PSHUFLW XMM0, XMM0, 0*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xc0); - addbyte(0); - break; - case TC_MSELECT_LOD_FRAC: - addbyte(0x66); /*MOVD XMM0, state->lod_frac[1]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod_frac[1])); - addbyte(0xf2); /*PSHUFLW XMM0, XMM0, 0*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xc0); - addbyte(0); - break; - } - if (params->textureMode[1] & TEXTUREMODE_TRILINEAR) - { - addbyte(0x66); /*PXOR XMM0, xmm_00_ff_w[EBX]*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0x83); - addlong((uint32_t)&xmm_00_ff_w[0]); - } - else if (!tc_reverse_blend_1) - { - addbyte(0x66); /*PXOR XMM0, xmm_ff_w*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0x05); - addlong((uint32_t)&xmm_ff_w); - } - addbyte(0x66); /*PADD XMM0, xmm_01_w*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x05); - addlong((uint32_t)&xmm_01_w); - addbyte(0xf3); /*MOVQ XMM1, XMM2*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xca); - addbyte(0xf3); /*MOVQ XMM5, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe8); - addbyte(0x66); /*PMULLW XMM0, XMM3*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0xc3); - addbyte(0x66); /*PMULHW XMM5, XMM3*/ - addbyte(0x0f); - addbyte(0xe5); - addbyte(0xeb); - addbyte(0x66); /*PUNPCKLWD XMM0, XMM5*/ - addbyte(0x0f); - addbyte(0x61); - addbyte(0xc5); - addbyte(0x66); /*PSRAD XMM0, 8*/ - addbyte(0x0f); - addbyte(0x72); - addbyte(0xe0); - addbyte(8); - addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x6b); - addbyte(0xc0); - addbyte(0x66); /*PSUBW XMM1, XMM0*/ - addbyte(0x0f); - addbyte(0xf9); - addbyte(0xc8); - if (tc_add_clocal_1) - { - addbyte(0x66); /*PADDW XMM1, XMM3*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xcb); - } - else if (tc_add_alocal_1) - { - addbyte(0xf2); /*PSHUFLW XMM0, XMM3, 0xff*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xc3); - addbyte(0xff); - addbyte(0x66); /*PADDW XMM1, XMM0*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc8); - } - addbyte(0xf3); /*MOVD XMM3, XMM1*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xd9); - addbyte(0x66); /*PACKUSWB XMM3, XMM3*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xdb); - if (tca_sub_clocal_1) - { - addbyte(0x66); /*MOVD EBX, XMM3*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xdb); - } - addbyte(0x66); /*PUNPCKLBW XMM3, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xda); - } - - if (tca_sub_clocal_1) - { - addbyte(0xc1); /*SHR EBX, 24*/ - addbyte(0xeb); - addbyte(24); - switch (tca_mselect_1) - { - case TCA_MSELECT_ZERO: - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - break; - case TCA_MSELECT_CLOCAL: - addbyte(0x89); /*MOV EAX, EBX*/ - addbyte(0xd8); - break; - case TCA_MSELECT_AOTHER: - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - break; - case TCA_MSELECT_ALOCAL: - addbyte(0x89); /*MOV EAX, EBX*/ - addbyte(0xd8); - break; - case TCA_MSELECT_DETAIL: - addbyte(0xb8); /*MOV EAX, params->detail_bias[1]*/ - addlong(params->detail_bias[1]); - addbyte(0x2b); /*SUB EAX, state->lod*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod)); - addbyte(0xba); /*MOV EDX, params->detail_max[1]*/ - addlong(params->detail_max[1]); - addbyte(0xc1); /*SHL EAX, params->detail_scale[1]*/ - addbyte(0xe0); - addbyte(params->detail_scale[1]); - addbyte(0x39); /*CMP EAX, EDX*/ - addbyte(0xd0); - addbyte(0x0f); /*CMOVNL EAX, EDX*/ - addbyte(0x4d); - addbyte(0xc2); - break; - case TCA_MSELECT_LOD_FRAC: - addbyte(0x8b); /*MOV EAX, state->lod_frac[1]*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod_frac[1])); - break; - } - if (params->textureMode[1] & TEXTUREMODE_TRILINEAR) - { - addbyte(0x33); /*XOR EAX, i_00_ff_w[ECX*4]*/ - addbyte(0x04); - addbyte(0x8d); - addlong((uint32_t)i_00_ff_w); - } - else if (!tc_reverse_blend_1) - { - addbyte(0x35); /*XOR EAX, 0xff*/ - addlong(0xff); - } - addbyte(0x83); /*ADD EAX, 1*/ - addbyte(0xc0); - addbyte(1); - addbyte(0x0f); /*IMUL EAX, EBX*/ - addbyte(0xaf); - addbyte(0xc3); - addbyte(0xb9); /*MOV ECX, 0xff*/ - addlong(0xff); - addbyte(0xf7); /*NEG EAX*/ - addbyte(0xd8); - addbyte(0xc1); /*SAR EAX, 8*/ - addbyte(0xf8); - addbyte(8); - if (tca_add_clocal_1 || tca_add_alocal_1) - { - addbyte(0x01); /*ADD EAX, EBX*/ - addbyte(0xd8); - } - addbyte(0x39); /*CMP ECX, EAX*/ - addbyte(0xc1); - addbyte(0x0f); /*CMOVA ECX, EAX*/ - addbyte(0x47); - addbyte(0xc8); - addbyte(0x66); /*PINSRW 3, XMM3, XMM0*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0xd8); - addbyte(3); - } - - block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 0); - - addbyte(0x66); /*MOVD XMM0, EAX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xc0); - addbyte(0x66); /*MOVD XMM7, EAX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xf8); - - if (params->textureMode[0] & TEXTUREMODE_TRILINEAR) - { - addbyte(0x8b); /*MOV EAX, state->lod*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod)); - if (!tc_reverse_blend) - { - addbyte(0xbb); /*MOV EBX, 1*/ - addlong(1); - } - else - { - addbyte(0x31); /*XOR EBX, EBX*/ - addbyte(0xdb); - } - addbyte(0x83); /*AND EAX, 1*/ - addbyte(0xe0); - addbyte(1); - if (!tca_reverse_blend) - { - addbyte(0xb9); /*MOV ECX, 1*/ - addlong(1); - } - else - { - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - addbyte(0x31); /*XOR EBX, EAX*/ - addbyte(0xc3); - addbyte(0x31); /*XOR ECX, EAX*/ - addbyte(0xc1); - addbyte(0xc1); /*SHL EBX, 4*/ - addbyte(0xe3); - addbyte(4); - /*EBX = tc_reverse_blend, ECX=tca_reverse_blend*/ - } - - /*XMM0 = TMU0 output, XMM3 = TMU1 output*/ - - addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xc2); - if (tc_zero_other) - { - addbyte(0x66); /*PXOR XMM1, XMM1*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xc9); - } - else - { - addbyte(0xf3); /*MOV XMM1, XMM3*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xcb); - } - if (tc_sub_clocal) - { - addbyte(0x66); /*PSUBW XMM1, XMM0*/ - addbyte(0x0f); - addbyte(0xf9); - addbyte(0xc8); - } - - switch (tc_mselect) - { - case TC_MSELECT_ZERO: - addbyte(0x66); /*PXOR XMM4, XMM4*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xe4); - break; - case TC_MSELECT_CLOCAL: - addbyte(0xf3); /*MOV XMM4, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe0); - break; - case TC_MSELECT_AOTHER: - addbyte(0xf2); /*PSHUFLW XMM4, XMM3, 3, 3, 3, 3*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xe3); - addbyte(0xff); - break; - case TC_MSELECT_ALOCAL: - addbyte(0xf2); /*PSHUFLW XMM4, XMM0, 3, 3, 3, 3*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xe0); - addbyte(0xff); - break; - case TC_MSELECT_DETAIL: - addbyte(0xb8); /*MOV EAX, params->detail_bias[0]*/ - addlong(params->detail_bias[0]); - addbyte(0x2b); /*SUB EAX, state->lod*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, lod)); - addbyte(0xba); /*MOV EDX, params->detail_max[0]*/ - addlong(params->detail_max[0]); - addbyte(0xc1); /*SHL EAX, params->detail_scale[0]*/ - addbyte(0xe0); - addbyte(params->detail_scale[0]); - addbyte(0x39); /*CMP EAX, EDX*/ - addbyte(0xd0); - addbyte(0x0f); /*CMOVNL EAX, EDX*/ - addbyte(0x4d); - addbyte(0xc2); - addbyte(0x66); /*MOVD XMM4, EAX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xe0); - addbyte(0xf2); /*PSHUFLW XMM4, XMM4, 0*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xe4); - addbyte(0); - break; - case TC_MSELECT_LOD_FRAC: - addbyte(0x66); /*MOVD XMM0, state->lod_frac[0]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xa7); - addlong(offsetof(voodoo_state_t, lod_frac[0])); - addbyte(0xf2); /*PSHUFLW XMM0, XMM0, 0*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xe4); - addbyte(0); - break; - } - if (params->textureMode[0] & TEXTUREMODE_TRILINEAR) - { - addbyte(0x66); /*PXOR XMM4, xmm_00_ff_w[EBX]*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xa3); - addlong((uint32_t)&xmm_00_ff_w[0]); - } - else if (!tc_reverse_blend) - { - addbyte(0x66); /*PXOR XMM4, FF*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0x25); - addlong((uint32_t)&xmm_ff_w); - } - addbyte(0x66); /*PADDW XMM4, 1*/ + addbyte(0xef); + addbyte(0x05); + addlong((uint32_t) &xmm_ff_w); + } + addbyte(0x66); /*PADD XMM0, xmm_01_w*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x05); + addlong((uint32_t) &xmm_01_w); + addbyte(0xf3); /*MOVQ XMM1, XMM2*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xca); + addbyte(0xf3); /*MOVQ XMM5, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe8); + addbyte(0x66); /*PMULLW XMM0, XMM3*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0xc3); + addbyte(0x66); /*PMULHW XMM5, XMM3*/ + addbyte(0x0f); + addbyte(0xe5); + addbyte(0xeb); + addbyte(0x66); /*PUNPCKLWD XMM0, XMM5*/ + addbyte(0x0f); + addbyte(0x61); + addbyte(0xc5); + addbyte(0x66); /*PSRAD XMM0, 8*/ + addbyte(0x0f); + addbyte(0x72); + addbyte(0xe0); + addbyte(8); + addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x6b); + addbyte(0xc0); + addbyte(0x66); /*PSUBW XMM1, XMM0*/ + addbyte(0x0f); + addbyte(0xf9); + addbyte(0xc8); + if (tc_add_clocal_1) { + addbyte(0x66); /*PADDW XMM1, XMM3*/ addbyte(0x0f); addbyte(0xfd); - addbyte(0x25); - addlong((uint32_t)&xmm_01_w); - addbyte(0xf3); /*MOVQ XMM5, XMM1*/ + addbyte(0xcb); + } else if (tc_add_alocal_1) { + addbyte(0xf2); /*PSHUFLW XMM0, XMM3, 0xff*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xc3); + addbyte(0xff); + addbyte(0x66); /*PADDW XMM1, XMM0*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc8); + } + addbyte(0xf3); /*MOVD XMM3, XMM1*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xd9); + addbyte(0x66); /*PACKUSWB XMM3, XMM3*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xdb); + if (tca_sub_clocal_1) { + addbyte(0x66); /*MOVD EBX, XMM3*/ addbyte(0x0f); addbyte(0x7e); - addbyte(0xe9); - addbyte(0x66); /*PMULLW XMM1, XMM4*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0xcc); + addbyte(0xdb); + } + addbyte(0x66); /*PUNPCKLBW XMM3, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xda); + } - if (tca_sub_clocal) - { - addbyte(0x66); /*MOV EBX, XMM7*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xfb); - } + if (tca_sub_clocal_1) { + addbyte(0xc1); /*SHR EBX, 24*/ + addbyte(0xeb); + addbyte(24); + switch (tca_mselect_1) { + case TCA_MSELECT_ZERO: + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + break; + case TCA_MSELECT_CLOCAL: + addbyte(0x89); /*MOV EAX, EBX*/ + addbyte(0xd8); + break; + case TCA_MSELECT_AOTHER: + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + break; + case TCA_MSELECT_ALOCAL: + addbyte(0x89); /*MOV EAX, EBX*/ + addbyte(0xd8); + break; + case TCA_MSELECT_DETAIL: + addbyte(0xb8); /*MOV EAX, params->detail_bias[1]*/ + addlong(params->detail_bias[1]); + addbyte(0x2b); /*SUB EAX, state->lod*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod)); + addbyte(0xba); /*MOV EDX, params->detail_max[1]*/ + addlong(params->detail_max[1]); + addbyte(0xc1); /*SHL EAX, params->detail_scale[1]*/ + addbyte(0xe0); + addbyte(params->detail_scale[1]); + addbyte(0x39); /*CMP EAX, EDX*/ + addbyte(0xd0); + addbyte(0x0f); /*CMOVNL EAX, EDX*/ + addbyte(0x4d); + addbyte(0xc2); + break; + case TCA_MSELECT_LOD_FRAC: + addbyte(0x8b); /*MOV EAX, state->lod_frac[1]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod_frac[1])); + break; + } + if (params->textureMode[1] & TEXTUREMODE_TRILINEAR) { + addbyte(0x33); /*XOR EAX, i_00_ff_w[ECX*4]*/ + addbyte(0x04); + addbyte(0x8d); + addlong((uint32_t) i_00_ff_w); + } else if (!tc_reverse_blend_1) { + addbyte(0x35); /*XOR EAX, 0xff*/ + addlong(0xff); + } + addbyte(0x83); /*ADD EAX, 1*/ + addbyte(0xc0); + addbyte(1); + addbyte(0x0f); /*IMUL EAX, EBX*/ + addbyte(0xaf); + addbyte(0xc3); + addbyte(0xb9); /*MOV ECX, 0xff*/ + addlong(0xff); + addbyte(0xf7); /*NEG EAX*/ + addbyte(0xd8); + addbyte(0xc1); /*SAR EAX, 8*/ + addbyte(0xf8); + addbyte(8); + if (tca_add_clocal_1 || tca_add_alocal_1) { + addbyte(0x01); /*ADD EAX, EBX*/ + addbyte(0xd8); + } + addbyte(0x39); /*CMP ECX, EAX*/ + addbyte(0xc1); + addbyte(0x0f); /*CMOVA ECX, EAX*/ + addbyte(0x47); + addbyte(0xc8); + addbyte(0x66); /*PINSRW 3, XMM3, XMM0*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0xd8); + addbyte(3); + } - addbyte(0x66); /*PMULHW XMM5, XMM4*/ + block_pos = codegen_texture_fetch(code_block, voodoo, params, state, block_pos, 0); + + addbyte(0x66); /*MOVD XMM0, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xc0); + addbyte(0x66); /*MOVD XMM7, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xf8); + + if (params->textureMode[0] & TEXTUREMODE_TRILINEAR) { + addbyte(0x8b); /*MOV EAX, state->lod*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod)); + if (!tc_reverse_blend) { + addbyte(0xbb); /*MOV EBX, 1*/ + addlong(1); + } else { + addbyte(0x31); /*XOR EBX, EBX*/ + addbyte(0xdb); + } + addbyte(0x83); /*AND EAX, 1*/ + addbyte(0xe0); + addbyte(1); + if (!tca_reverse_blend) { + addbyte(0xb9); /*MOV ECX, 1*/ + addlong(1); + } else { + addbyte(0x31); /*XOR ECX, ECX*/ + addbyte(0xc9); + } + addbyte(0x31); /*XOR EBX, EAX*/ + addbyte(0xc3); + addbyte(0x31); /*XOR ECX, EAX*/ + addbyte(0xc1); + addbyte(0xc1); /*SHL EBX, 4*/ + addbyte(0xe3); + addbyte(4); + /*EBX = tc_reverse_blend, ECX=tca_reverse_blend*/ + } + + /*XMM0 = TMU0 output, XMM3 = TMU1 output*/ + + addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xc2); + if (tc_zero_other) { + addbyte(0x66); /*PXOR XMM1, XMM1*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xc9); + } else { + addbyte(0xf3); /*MOV XMM1, XMM3*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xcb); + } + if (tc_sub_clocal) { + addbyte(0x66); /*PSUBW XMM1, XMM0*/ + addbyte(0x0f); + addbyte(0xf9); + addbyte(0xc8); + } + + switch (tc_mselect) { + case TC_MSELECT_ZERO: + addbyte(0x66); /*PXOR XMM4, XMM4*/ addbyte(0x0f); - addbyte(0xe5); - addbyte(0xec); - addbyte(0x66); /*PUNPCKLWD XMM1, XMM5*/ + addbyte(0xef); + addbyte(0xe4); + break; + case TC_MSELECT_CLOCAL: + addbyte(0xf3); /*MOV XMM4, XMM0*/ addbyte(0x0f); - addbyte(0x61); - addbyte(0xcd); - addbyte(0x66); /*PSRAD XMM1, 8*/ + addbyte(0x7e); + addbyte(0xe0); + break; + case TC_MSELECT_AOTHER: + addbyte(0xf2); /*PSHUFLW XMM4, XMM3, 3, 3, 3, 3*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xe3); + addbyte(0xff); + break; + case TC_MSELECT_ALOCAL: + addbyte(0xf2); /*PSHUFLW XMM4, XMM0, 3, 3, 3, 3*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xe0); + addbyte(0xff); + break; + case TC_MSELECT_DETAIL: + addbyte(0xb8); /*MOV EAX, params->detail_bias[0]*/ + addlong(params->detail_bias[0]); + addbyte(0x2b); /*SUB EAX, state->lod*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, lod)); + addbyte(0xba); /*MOV EDX, params->detail_max[0]*/ + addlong(params->detail_max[0]); + addbyte(0xc1); /*SHL EAX, params->detail_scale[0]*/ + addbyte(0xe0); + addbyte(params->detail_scale[0]); + addbyte(0x39); /*CMP EAX, EDX*/ + addbyte(0xd0); + addbyte(0x0f); /*CMOVNL EAX, EDX*/ + addbyte(0x4d); + addbyte(0xc2); + addbyte(0x66); /*MOVD XMM4, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xe0); + addbyte(0xf2); /*PSHUFLW XMM4, XMM4, 0*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xe4); + addbyte(0); + break; + case TC_MSELECT_LOD_FRAC: + addbyte(0x66); /*MOVD XMM0, state->lod_frac[0]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xa7); + addlong(offsetof(voodoo_state_t, lod_frac[0])); + addbyte(0xf2); /*PSHUFLW XMM0, XMM0, 0*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xe4); + addbyte(0); + break; + } + if (params->textureMode[0] & TEXTUREMODE_TRILINEAR) { + addbyte(0x66); /*PXOR XMM4, xmm_00_ff_w[EBX]*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xa3); + addlong((uint32_t) &xmm_00_ff_w[0]); + } else if (!tc_reverse_blend) { + addbyte(0x66); /*PXOR XMM4, FF*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0x25); + addlong((uint32_t) &xmm_ff_w); + } + addbyte(0x66); /*PADDW XMM4, 1*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x25); + addlong((uint32_t) &xmm_01_w); + addbyte(0xf3); /*MOVQ XMM5, XMM1*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe9); + addbyte(0x66); /*PMULLW XMM1, XMM4*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0xcc); + + if (tca_sub_clocal) { + addbyte(0x66); /*MOV EBX, XMM7*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xfb); + } + + addbyte(0x66); /*PMULHW XMM5, XMM4*/ + addbyte(0x0f); + addbyte(0xe5); + addbyte(0xec); + addbyte(0x66); /*PUNPCKLWD XMM1, XMM5*/ + addbyte(0x0f); + addbyte(0x61); + addbyte(0xcd); + addbyte(0x66); /*PSRAD XMM1, 8*/ + addbyte(0x0f); + addbyte(0x72); + addbyte(0xe1); + addbyte(8); + addbyte(0x66); /*PACKSSDW XMM1, XMM1*/ + addbyte(0x0f); + addbyte(0x6b); + addbyte(0xc9); + + if (tca_sub_clocal) { + addbyte(0xc1); /*SHR EBX, 24*/ + addbyte(0xeb); + addbyte(24); + } + + if (tc_add_clocal) { + addbyte(0x66); /*PADDW XMM1, XMM0*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc8); + } else if (tc_add_alocal) { + addbyte(0xf2); /*PSHUFLW XMM4, XMM0, 3, 3, 3, 3*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xe0); + addbyte(0xff); + addbyte(0x66); /*PADDW XMM1, XMM4*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xcc); + } + + addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xc0); + addbyte(0x66); /*PACKUSWB XMM3, XMM3*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xdb); + addbyte(0x66); /*PACKUSWB XMM1, XMM1*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xc9); + if (tc_invert_output) { + addbyte(0x66); /*PXOR XMM1, FF*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0x0d); + addlong((uint32_t) &xmm_ff_b); + } + + if (tca_zero_other) { + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + } else { + addbyte(0x66); /*MOV EAX, XMM3*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xd8); + addbyte(0xc1); /*SHR EAX, 24*/ + addbyte(0xe8); + addbyte(24); + } + if (tca_sub_clocal) { + addbyte(0x29); /*SUB EAX, EBX*/ + addbyte(0xd8); + } + switch (tca_mselect) { + case TCA_MSELECT_ZERO: + addbyte(0x31); /*XOR EBX, EBX*/ + addbyte(0xdb); + break; + case TCA_MSELECT_CLOCAL: + addbyte(0x66); /*MOV EBX, XMM7*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xfb); + addbyte(0xc1); /*SHR EBX, 24*/ + addbyte(0xeb); + addbyte(24); + break; + case TCA_MSELECT_AOTHER: + addbyte(0x66); /*MOV EBX, XMM3*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xdb); + addbyte(0xc1); /*SHR EBX, 24*/ + addbyte(0xeb); + addbyte(24); + break; + case TCA_MSELECT_ALOCAL: + addbyte(0x66); /*MOV EBX, XMM7*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xfb); + addbyte(0xc1); /*SHR EBX, 24*/ + addbyte(0xeb); + addbyte(24); + break; + case TCA_MSELECT_DETAIL: + addbyte(0xbb); /*MOV EBX, params->detail_bias[1]*/ + addlong(params->detail_bias[1]); + addbyte(0x2b); /*SUB EBX, state->lod*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, lod)); + addbyte(0xba); /*MOV EDX, params->detail_max[1]*/ + addlong(params->detail_max[1]); + addbyte(0xc1); /*SHL EBX, params->detail_scale[1]*/ + addbyte(0xe3); + addbyte(params->detail_scale[1]); + addbyte(0x39); /*CMP EBX, EDX*/ + addbyte(0xd3); + addbyte(0x0f); /*CMOVNL EBX, EDX*/ + addbyte(0x4d); + addbyte(0xda); + break; + case TCA_MSELECT_LOD_FRAC: + addbyte(0x8b); /*MOV EBX, state->lod_frac[0]*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, lod_frac[0])); + break; + } + if (params->textureMode[0] & TEXTUREMODE_TRILINEAR) { + addbyte(0x33); /*XOR EBX, i_00_ff_w[ECX*4]*/ + addbyte(0x1c); + addbyte(0x8d); + addlong((uint32_t) i_00_ff_w); + } else if (!tca_reverse_blend) { + addbyte(0x81); /*XOR EBX, 0xFF*/ + addbyte(0xf3); + addlong(0xff); + } + + addbyte(0x83); /*ADD EBX, 1*/ + addbyte(0xc3); + addbyte(1); + addbyte(0x0f); /*IMUL EAX, EBX*/ + addbyte(0xaf); + addbyte(0xc3); + addbyte(0x31); /*XOR EDX, EDX*/ + addbyte(0xd2); + addbyte(0xc1); /*SAR EAX, 8*/ + addbyte(0xf8); + addbyte(8); + if (tca_add_clocal || tca_add_alocal) { + addbyte(0x66); /*MOV EBX, XMM7*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xfb); + addbyte(0xc1); /*SHR EBX, 24*/ + addbyte(0xeb); + addbyte(24); + addbyte(0x01); /*ADD EAX, EBX*/ + addbyte(0xd8); + } + addbyte(0x0f); /*CMOVS EAX, EDX*/ + addbyte(0x48); + addbyte(0xc2); + addbyte(0xba); /*MOV EDX, 0xff*/ + addlong(0xff); + addbyte(0x3d); /*CMP EAX, 0xff*/ + addlong(0xff); + addbyte(0x0f); /*CMOVA EAX, EDX*/ + addbyte(0x47); + addbyte(0xc2); + if (tca_invert_output) { + addbyte(0x35); /*XOR EAX, 0xff*/ + addlong(0xff); + } + + addbyte(0x89); /*MOV state->tex_a[EDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tex_a)); + + addbyte(0xf3); /*MOVQ XMM0, XMM1*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xc1); + } + if (cc_mselect == CC_MSELECT_TEXRGB) { + addbyte(0xf3); /*MOVD XMM4, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe0); + } + + if ((params->fbzMode & FBZ_CHROMAKEY)) { + switch (_rgb_sel) { + case CC_LOCALSELECT_ITER_RGB: + addbyte(0xf3); /*MOVDQU XMM0, ib*/ /* ir, ig and ib must be in same dqword!*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, ib)); + addbyte(0x66); /*PSRAD XMM0, 12*/ addbyte(0x0f); addbyte(0x72); - addbyte(0xe1); - addbyte(8); - addbyte(0x66); /*PACKSSDW XMM1, XMM1*/ + addbyte(0xe0); + addbyte(12); + addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ addbyte(0x0f); addbyte(0x6b); - addbyte(0xc9); - - if (tca_sub_clocal) - { - addbyte(0xc1); /*SHR EBX, 24*/ - addbyte(0xeb); - addbyte(24); - } - - if (tc_add_clocal) - { - addbyte(0x66); /*PADDW XMM1, XMM0*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc8); - } - else if (tc_add_alocal) - { - addbyte(0xf2); /*PSHUFLW XMM4, XMM0, 3, 3, 3, 3*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xe0); - addbyte(0xff); - addbyte(0x66); /*PADDW XMM1, XMM4*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xcc); - } - + addbyte(0xc0); addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ addbyte(0x0f); addbyte(0x67); addbyte(0xc0); - addbyte(0x66); /*PACKUSWB XMM3, XMM3*/ + addbyte(0x66); /*MOVD EAX, XMM0*/ addbyte(0x0f); - addbyte(0x67); + addbyte(0x7e); + addbyte(0xc0); + break; + case CC_LOCALSELECT_COLOR1: + addbyte(0x8b); /*MOV EAX, params->color1[ESI]*/ + addbyte(0x86); + addlong(offsetof(voodoo_params_t, color1)); + break; + case CC_LOCALSELECT_TEX: + addbyte(0x66); /*MOVD EAX, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xc0); + break; + } + addbyte(0x8b); /*MOV EBX, params->chromaKey[ESI]*/ + addbyte(0x9e); + addlong(offsetof(voodoo_params_t, chromaKey)); + addbyte(0x31); /*XOR EBX, EAX*/ + addbyte(0xc3); + addbyte(0x81); /*AND EBX, 0xffffff*/ + addbyte(0xe3); + addlong(0xffffff); + addbyte(0x0f); /*JE skip*/ + addbyte(0x84); + chroma_skip_pos = block_pos; + addlong(0); + } + + if (voodoo->trexInit1[0] & (1 << 18)) { + addbyte(0xb8); /*MOV EAX, tmuConfig*/ + addlong(voodoo->tmuConfig); + addbyte(0x66); /*MOVD XMM0, EAX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xc0); + } + + if ((params->alphaMode & ((1 << 0) | (1 << 4))) || (!(cc_mselect == 0 && cc_reverse_blend == 0) && (cc_mselect == CC_MSELECT_AOTHER || cc_mselect == CC_MSELECT_ALOCAL))) { + /*EBX = a_other*/ + switch (a_sel) { + case A_SEL_ITER_A: + addbyte(0x8b); /*MOV EBX, state->ia*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, ia)); + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + addbyte(0xba); /*MOV EDX, 0xff*/ + addlong(0xff); + addbyte(0xc1); /*SAR EBX, 12*/ + addbyte(0xfb); + addbyte(12); + addbyte(0x0f); /*CMOVS EBX, EAX*/ + addbyte(0x48); + addbyte(0xd8); + addbyte(0x39); /*CMP EBX, EDX*/ + addbyte(0xd3); + addbyte(0x0f); /*CMOVA EBX, EDX*/ + addbyte(0x47); + addbyte(0xda); + break; + case A_SEL_TEX: + addbyte(0x8b); /*MOV EBX, state->tex_a*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tex_a)); + break; + case A_SEL_COLOR1: + addbyte(0x0f); /*MOVZX EBX, params->color1+3*/ + addbyte(0xb6); + addbyte(0x9e); + addlong(offsetof(voodoo_params_t, color1) + 3); + break; + default: + addbyte(0x31); /*XOR EBX, EBX*/ addbyte(0xdb); + break; + } + /*ECX = a_local*/ + switch (cca_localselect) { + case CCA_LOCALSELECT_ITER_A: + if (a_sel == A_SEL_ITER_A) { + addbyte(0x89); /*MOV ECX, EBX*/ + addbyte(0xd9); + } else { + addbyte(0x8b); /*MOV ECX, state->ia*/ + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, ia)); + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + addbyte(0xba); /*MOV EDX, 0xff*/ + addlong(0xff); + addbyte(0xc1); /*SAR ECX, 12*/ + addbyte(0xf9); + addbyte(12); + addbyte(0x0f); /*CMOVS ECX, EAX*/ + addbyte(0x48); + addbyte(0xc8); + addbyte(0x39); /*CMP ECX, EDX*/ + addbyte(0xd1); + addbyte(0x0f); /*CMOVA ECX, EDX*/ + addbyte(0x47); + addbyte(0xca); + } + break; + case CCA_LOCALSELECT_COLOR0: + addbyte(0x0f); /*MOVZX ECX, params->color0+3*/ + addbyte(0xb6); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, color0) + 3); + break; + case CCA_LOCALSELECT_ITER_Z: + addbyte(0x8b); /*MOV ECX, state->z*/ + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, z)); + if (a_sel != A_SEL_ITER_A) { + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + addbyte(0xba); /*MOV EDX, 0xff*/ + addlong(0xff); + } + addbyte(0xc1); /*SAR ECX, 20*/ + addbyte(0xf9); + addbyte(20); + addbyte(0x0f); /*CMOVS ECX, EAX*/ + addbyte(0x48); + addbyte(0xc8); + addbyte(0x39); /*CMP ECX, EDX*/ + addbyte(0xd1); + addbyte(0x0f); /*CMOVA ECX, EDX*/ + addbyte(0x47); + addbyte(0xca); + break; + + default: + addbyte(0xb9); /*MOV ECX, 0xff*/ + addlong(0xff); + break; + } + + if (cca_zero_other) { + addbyte(0x31); /*XOR EDX, EDX*/ + addbyte(0xd2); + } else { + addbyte(0x89); /*MOV EDX, EBX*/ + addbyte(0xda); + } + + if (cca_sub_clocal) { + addbyte(0x29); /*SUB EDX, ECX*/ + addbyte(0xca); + } + } + + if (cc_sub_clocal || cc_mselect == 1 || cc_add == 1) { + /*XMM1 = local*/ + if (!cc_localselect_override) { + if (cc_localselect) { + addbyte(0x66); /*MOVD XMM1, params->color0*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, color0)); + } else { + addbyte(0xf3); /*MOVDQU XMM1, ib*/ /* ir, ig and ib must be in same dqword!*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, ib)); + addbyte(0x66); /*PSRAD XMM1, 12*/ + addbyte(0x0f); + addbyte(0x72); + addbyte(0xe1); + addbyte(12); + addbyte(0x66); /*PACKSSDW XMM1, XMM1*/ + addbyte(0x0f); + addbyte(0x6b); + addbyte(0xc9); addbyte(0x66); /*PACKUSWB XMM1, XMM1*/ addbyte(0x0f); addbyte(0x67); addbyte(0xc9); - if (tc_invert_output) - { - addbyte(0x66); /*PXOR XMM1, FF*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0x0d); - addlong((uint32_t)&xmm_ff_b); - } - - if (tca_zero_other) - { - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - } - else - { - addbyte(0x66); /*MOV EAX, XMM3*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xd8); - addbyte(0xc1); /*SHR EAX, 24*/ - addbyte(0xe8); - addbyte(24); - } - if (tca_sub_clocal) - { - addbyte(0x29); /*SUB EAX, EBX*/ - addbyte(0xd8); - } - switch (tca_mselect) - { - case TCA_MSELECT_ZERO: - addbyte(0x31); /*XOR EBX, EBX*/ - addbyte(0xdb); - break; - case TCA_MSELECT_CLOCAL: - addbyte(0x66); /*MOV EBX, XMM7*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xfb); - addbyte(0xc1); /*SHR EBX, 24*/ - addbyte(0xeb); - addbyte(24); - break; - case TCA_MSELECT_AOTHER: - addbyte(0x66); /*MOV EBX, XMM3*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xdb); - addbyte(0xc1); /*SHR EBX, 24*/ - addbyte(0xeb); - addbyte(24); - break; - case TCA_MSELECT_ALOCAL: - addbyte(0x66); /*MOV EBX, XMM7*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xfb); - addbyte(0xc1); /*SHR EBX, 24*/ - addbyte(0xeb); - addbyte(24); - break; - case TCA_MSELECT_DETAIL: - addbyte(0xbb); /*MOV EBX, params->detail_bias[1]*/ - addlong(params->detail_bias[1]); - addbyte(0x2b); /*SUB EBX, state->lod*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, lod)); - addbyte(0xba); /*MOV EDX, params->detail_max[1]*/ - addlong(params->detail_max[1]); - addbyte(0xc1); /*SHL EBX, params->detail_scale[1]*/ - addbyte(0xe3); - addbyte(params->detail_scale[1]); - addbyte(0x39); /*CMP EBX, EDX*/ - addbyte(0xd3); - addbyte(0x0f); /*CMOVNL EBX, EDX*/ - addbyte(0x4d); - addbyte(0xda); - break; - case TCA_MSELECT_LOD_FRAC: - addbyte(0x8b); /*MOV EBX, state->lod_frac[0]*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, lod_frac[0])); - break; - } - if (params->textureMode[0] & TEXTUREMODE_TRILINEAR) - { - addbyte(0x33); /*XOR EBX, i_00_ff_w[ECX*4]*/ - addbyte(0x1c); - addbyte(0x8d); - addlong((uint32_t)i_00_ff_w); - } - else if (!tca_reverse_blend) - { - addbyte(0x81); /*XOR EBX, 0xFF*/ - addbyte(0xf3); - addlong(0xff); - } - - addbyte(0x83); /*ADD EBX, 1*/ - addbyte(0xc3); - addbyte(1); - addbyte(0x0f); /*IMUL EAX, EBX*/ - addbyte(0xaf); - addbyte(0xc3); - addbyte(0x31); /*XOR EDX, EDX*/ - addbyte(0xd2); - addbyte(0xc1); /*SAR EAX, 8*/ - addbyte(0xf8); - addbyte(8); - if (tca_add_clocal || tca_add_alocal) - { - addbyte(0x66); /*MOV EBX, XMM7*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xfb); - addbyte(0xc1); /*SHR EBX, 24*/ - addbyte(0xeb); - addbyte(24); - addbyte(0x01); /*ADD EAX, EBX*/ - addbyte(0xd8); - } - addbyte(0x0f); /*CMOVS EAX, EDX*/ - addbyte(0x48); - addbyte(0xc2); - addbyte(0xba); /*MOV EDX, 0xff*/ - addlong(0xff); - addbyte(0x3d); /*CMP EAX, 0xff*/ - addlong(0xff); - addbyte(0x0f); /*CMOVA EAX, EDX*/ - addbyte(0x47); - addbyte(0xc2); - if (tca_invert_output) - { - addbyte(0x35); /*XOR EAX, 0xff*/ - addlong(0xff); - } - - addbyte(0x89); /*MOV state->tex_a[EDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tex_a)); - - addbyte(0xf3); /*MOVQ XMM0, XMM1*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xc1); + } + } else { + addbyte(0xf6); /*TEST state->tex_a, 0x80*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tex_a)); + addbyte(0x80); + addbyte(0x74); /*JZ !cc_localselect*/ + addbyte(8 + 2); + addbyte(0x66); /*MOVD XMM1, params->color0*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, color0)); + addbyte(0xeb); /*JMP +*/ + addbyte(8 + 5 + 4 + 4); + /*!cc_localselect:*/ + addbyte(0xf3); /*MOVDQU XMM1, ib*/ /* ir, ig and ib must be in same dqword!*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, ib)); + addbyte(0x66); /*PSRAD XMM1, 12*/ + addbyte(0x0f); + addbyte(0x72); + addbyte(0xe1); + addbyte(12); + addbyte(0x66); /*PACKSSDW XMM1, XMM1*/ + addbyte(0x0f); + addbyte(0x6b); + addbyte(0xc9); + addbyte(0x66); /*PACKUSWB XMM1, XMM1*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xc9); } - if (cc_mselect == CC_MSELECT_TEXRGB) - { - addbyte(0xf3); /*MOVD XMM4, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe0); - } - - if ((params->fbzMode & FBZ_CHROMAKEY)) - { - switch (_rgb_sel) - { - case CC_LOCALSELECT_ITER_RGB: - addbyte(0xf3); /*MOVDQU XMM0, ib*/ /* ir, ig and ib must be in same dqword!*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, ib)); - addbyte(0x66); /*PSRAD XMM0, 12*/ - addbyte(0x0f); - addbyte(0x72); - addbyte(0xe0); - addbyte(12); - addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x6b); - addbyte(0xc0); - addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xc0); - addbyte(0x66); /*MOVD EAX, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xc0); - break; - case CC_LOCALSELECT_COLOR1: - addbyte(0x8b); /*MOV EAX, params->color1[ESI]*/ - addbyte(0x86); - addlong(offsetof(voodoo_params_t, color1)); - break; - case CC_LOCALSELECT_TEX: - addbyte(0x66); /*MOVD EAX, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xc0); - break; - } - addbyte(0x8b); /*MOV EBX, params->chromaKey[ESI]*/ - addbyte(0x9e); - addlong(offsetof(voodoo_params_t, chromaKey)); - addbyte(0x31); /*XOR EBX, EAX*/ - addbyte(0xc3); - addbyte(0x81); /*AND EBX, 0xffffff*/ - addbyte(0xe3); - addlong(0xffffff); - addbyte(0x0f); /*JE skip*/ - addbyte(0x84); - chroma_skip_pos = block_pos; - addlong(0); - } - - if (voodoo->trexInit1[0] & (1 << 18)) - { - addbyte(0xb8); /*MOV EAX, tmuConfig*/ - addlong(voodoo->tmuConfig); - addbyte(0x66); /*MOVD XMM0, EAX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xc0); - } - - if ((params->alphaMode & ((1 << 0) | (1 << 4))) || (!(cc_mselect == 0 && cc_reverse_blend == 0) && (cc_mselect == CC_MSELECT_AOTHER || cc_mselect == CC_MSELECT_ALOCAL))) - { - /*EBX = a_other*/ - switch (a_sel) - { - case A_SEL_ITER_A: - addbyte(0x8b); /*MOV EBX, state->ia*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, ia)); - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - addbyte(0xba); /*MOV EDX, 0xff*/ - addlong(0xff); - addbyte(0xc1); /*SAR EBX, 12*/ - addbyte(0xfb); - addbyte(12); - addbyte(0x0f); /*CMOVS EBX, EAX*/ - addbyte(0x48); - addbyte(0xd8); - addbyte(0x39); /*CMP EBX, EDX*/ - addbyte(0xd3); - addbyte(0x0f); /*CMOVA EBX, EDX*/ - addbyte(0x47); - addbyte(0xda); - break; - case A_SEL_TEX: - addbyte(0x8b); /*MOV EBX, state->tex_a*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tex_a)); - break; - case A_SEL_COLOR1: - addbyte(0x0f); /*MOVZX EBX, params->color1+3*/ - addbyte(0xb6); - addbyte(0x9e); - addlong(offsetof(voodoo_params_t, color1)+3); - break; - default: - addbyte(0x31); /*XOR EBX, EBX*/ - addbyte(0xdb); - break; - } - /*ECX = a_local*/ - switch (cca_localselect) - { - case CCA_LOCALSELECT_ITER_A: - if (a_sel == A_SEL_ITER_A) - { - addbyte(0x89); /*MOV ECX, EBX*/ - addbyte(0xd9); - } - else - { - addbyte(0x8b); /*MOV ECX, state->ia*/ - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, ia)); - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - addbyte(0xba); /*MOV EDX, 0xff*/ - addlong(0xff); - addbyte(0xc1);/*SAR ECX, 12*/ - addbyte(0xf9); - addbyte(12); - addbyte(0x0f); /*CMOVS ECX, EAX*/ - addbyte(0x48); - addbyte(0xc8); - addbyte(0x39); /*CMP ECX, EDX*/ - addbyte(0xd1); - addbyte(0x0f); /*CMOVA ECX, EDX*/ - addbyte(0x47); - addbyte(0xca); - } - break; - case CCA_LOCALSELECT_COLOR0: - addbyte(0x0f); /*MOVZX ECX, params->color0+3*/ - addbyte(0xb6); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, color0)+3); - break; - case CCA_LOCALSELECT_ITER_Z: - addbyte(0x8b); /*MOV ECX, state->z*/ - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, z)); - if (a_sel != A_SEL_ITER_A) - { - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - addbyte(0xba); /*MOV EDX, 0xff*/ - addlong(0xff); - } - addbyte(0xc1);/*SAR ECX, 20*/ - addbyte(0xf9); - addbyte(20); - addbyte(0x0f); /*CMOVS ECX, EAX*/ - addbyte(0x48); - addbyte(0xc8); - addbyte(0x39); /*CMP ECX, EDX*/ - addbyte(0xd1); - addbyte(0x0f); /*CMOVA ECX, EDX*/ - addbyte(0x47); - addbyte(0xca); - break; - - default: - addbyte(0xb9); /*MOV ECX, 0xff*/ - addlong(0xff); - break; - } - - if (cca_zero_other) - { - addbyte(0x31); /*XOR EDX, EDX*/ - addbyte(0xd2); - } - else - { - addbyte(0x89); /*MOV EDX, EBX*/ - addbyte(0xda); - } - - if (cca_sub_clocal) - { - addbyte(0x29); /*SUB EDX, ECX*/ - addbyte(0xca); - } - } - - if (cc_sub_clocal || cc_mselect == 1 || cc_add == 1) - { - /*XMM1 = local*/ - if (!cc_localselect_override) - { - if (cc_localselect) - { - addbyte(0x66); /*MOVD XMM1, params->color0*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, color0)); - } - else - { - addbyte(0xf3); /*MOVDQU XMM1, ib*/ /* ir, ig and ib must be in same dqword!*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, ib)); - addbyte(0x66); /*PSRAD XMM1, 12*/ - addbyte(0x0f); - addbyte(0x72); - addbyte(0xe1); - addbyte(12); - addbyte(0x66); /*PACKSSDW XMM1, XMM1*/ - addbyte(0x0f); - addbyte(0x6b); - addbyte(0xc9); - addbyte(0x66); /*PACKUSWB XMM1, XMM1*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xc9); - } - } - else - { - addbyte(0xf6); /*TEST state->tex_a, 0x80*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tex_a)); - addbyte(0x80); - addbyte(0x74);/*JZ !cc_localselect*/ - addbyte(8+2); - addbyte(0x66); /*MOVD XMM1, params->color0*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, color0)); - addbyte(0xeb); /*JMP +*/ - addbyte(8+5+4+4); - /*!cc_localselect:*/ - addbyte(0xf3); /*MOVDQU XMM1, ib*/ /* ir, ig and ib must be in same dqword!*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, ib)); - addbyte(0x66); /*PSRAD XMM1, 12*/ - addbyte(0x0f); - addbyte(0x72); - addbyte(0xe1); - addbyte(12); - addbyte(0x66); /*PACKSSDW XMM1, XMM1*/ - addbyte(0x0f); - addbyte(0x6b); - addbyte(0xc9); - addbyte(0x66); /*PACKUSWB XMM1, XMM1*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xc9); - } - addbyte(0x66); /*PUNPCKLBW XMM1, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xca); - } - if (!cc_zero_other) - { - if (_rgb_sel == CC_LOCALSELECT_ITER_RGB) - { - addbyte(0xf3); /*MOVDQU XMM0, ib*/ /* ir, ig and ib must be in same dqword!*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, ib)); - addbyte(0x66); /*PSRAD XMM0, 12*/ - addbyte(0x0f); - addbyte(0x72); - addbyte(0xe0); - addbyte(12); - addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x6b); - addbyte(0xc0); - addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xc0); - } - else if (_rgb_sel == CC_LOCALSELECT_TEX) - { + addbyte(0x66); /*PUNPCKLBW XMM1, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xca); + } + if (!cc_zero_other) { + if (_rgb_sel == CC_LOCALSELECT_ITER_RGB) { + addbyte(0xf3); /*MOVDQU XMM0, ib*/ /* ir, ig and ib must be in same dqword!*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, ib)); + addbyte(0x66); /*PSRAD XMM0, 12*/ + addbyte(0x0f); + addbyte(0x72); + addbyte(0xe0); + addbyte(12); + addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x6b); + addbyte(0xc0); + addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xc0); + } else if (_rgb_sel == CC_LOCALSELECT_TEX) { #if 0 addbyte(0xf3); /*MOVDQU XMM0, state->tex_b*/ addbyte(0x0f); @@ -1973,1430 +1839,1345 @@ static inline void voodoo_generate(uint8_t *code_block, voodoo_t *voodoo, voodoo addbyte(0x67); addbyte(0xc0); #endif - } - else if (_rgb_sel == CC_LOCALSELECT_COLOR1) - { - addbyte(0x66); /*MOVD XMM0, params->color1*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x86); - addlong(offsetof(voodoo_params_t, color1)); - } - else - { - /*MOVD XMM0, src_r*/ - } - addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xc2); - if (cc_sub_clocal) - { - addbyte(0x66); /*PSUBW XMM0, XMM1*/ - addbyte(0x0f); - addbyte(0xf9); - addbyte(0xc1); - } + } else if (_rgb_sel == CC_LOCALSELECT_COLOR1) { + addbyte(0x66); /*MOVD XMM0, params->color1*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x86); + addlong(offsetof(voodoo_params_t, color1)); + } else { + /*MOVD XMM0, src_r*/ } - else - { - addbyte(0x66); /*PXOR XMM0, XMM0*/ + addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xc2); + if (cc_sub_clocal) { + addbyte(0x66); /*PSUBW XMM0, XMM1*/ + addbyte(0x0f); + addbyte(0xf9); + addbyte(0xc1); + } + } else { + addbyte(0x66); /*PXOR XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xc0); + if (cc_sub_clocal) { + addbyte(0x66); /*PSUBW XMM0, XMM1*/ + addbyte(0x0f); + addbyte(0xf9); + addbyte(0xc1); + } + } + + if (params->alphaMode & ((1 << 0) | (1 << 4))) { + if (!(cca_mselect == 0 && cca_reverse_blend == 0)) { + switch (cca_mselect) { + case CCA_MSELECT_ALOCAL: + addbyte(0x89); /*MOV EAX, ECX*/ + addbyte(0xc8); + break; + case CCA_MSELECT_AOTHER: + addbyte(0x89); /*MOV EAX, EBX*/ + addbyte(0xd8); + break; + case CCA_MSELECT_ALOCAL2: + addbyte(0x89); /*MOV EAX, ECX*/ + addbyte(0xc8); + break; + case CCA_MSELECT_TEX: + addbyte(0x0f); /*MOVZX EAX, state->tex_a*/ + addbyte(0xb6); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, tex_a)); + break; + + case CCA_MSELECT_ZERO: + default: + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + break; + } + if (!cca_reverse_blend) { + addbyte(0x35); /*XOR EAX, 0xff*/ + addlong(0xff); + } + addbyte(0x83); /*ADD EAX, 1*/ + addbyte(0xc0); + addbyte(1); + addbyte(0x0f); /*IMUL EDX, EAX*/ + addbyte(0xaf); + addbyte(0xd0); + addbyte(0xc1); /*SHR EDX, 8*/ + addbyte(0xea); + addbyte(8); + } + } + + if ((params->alphaMode & ((1 << 0) | (1 << 4)))) { + addbyte(0x31); /*XOR EAX, EAX*/ + addbyte(0xc0); + } + + if (!(cc_mselect == 0 && cc_reverse_blend == 0) && cc_mselect == CC_MSELECT_AOTHER) { + /*Copy a_other to XMM3 before it gets modified*/ + addbyte(0x66); /*MOVD XMM3, EDX*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0xda); + addbyte(0xf2); /*PSHUFLW XMM3, XMM3, 0*/ + addbyte(0x0f); + addbyte(0x70); + addbyte(0xdb); + addbyte(0x00); + } + + if (cca_add && (params->alphaMode & ((1 << 0) | (1 << 4)))) { + addbyte(0x01); /*ADD EDX, ECX*/ + addbyte(0xca); + } + + if ((params->alphaMode & ((1 << 0) | (1 << 4)))) { + addbyte(0x85); /*TEST EDX, EDX*/ + addbyte(0xd2); + addbyte(0x0f); /*CMOVS EDX, EAX*/ + addbyte(0x48); + addbyte(0xd0); + addbyte(0xb8); /*MOV EAX, 0xff*/ + addlong(0xff); + addbyte(0x81); /*CMP EDX, 0xff*/ + addbyte(0xfa); + addlong(0xff); + addbyte(0x0f); /*CMOVA EDX, EAX*/ + addbyte(0x47); + addbyte(0xd0); + + if (cca_invert_output) { + addbyte(0x81); /*XOR EDX, 0xff*/ + addbyte(0xf2); + addlong(0xff); + } + } + + if (!(cc_mselect == 0 && cc_reverse_blend == 0)) { + switch (cc_mselect) { + case CC_MSELECT_ZERO: + addbyte(0x66); /*PXOR XMM3, XMM3*/ addbyte(0x0f); addbyte(0xef); - addbyte(0xc0); - if (cc_sub_clocal) - { - addbyte(0x66); /*PSUBW XMM0, XMM1*/ - addbyte(0x0f); - addbyte(0xf9); - addbyte(0xc1); - } - } - - if (params->alphaMode & ((1 << 0) | (1 << 4))) - { - if (!(cca_mselect == 0 && cca_reverse_blend == 0)) - { - switch (cca_mselect) - { - case CCA_MSELECT_ALOCAL: - addbyte(0x89); /*MOV EAX, ECX*/ - addbyte(0xc8); - break; - case CCA_MSELECT_AOTHER: - addbyte(0x89); /*MOV EAX, EBX*/ - addbyte(0xd8); - break; - case CCA_MSELECT_ALOCAL2: - addbyte(0x89); /*MOV EAX, ECX*/ - addbyte(0xc8); - break; - case CCA_MSELECT_TEX: - addbyte(0x0f); /*MOVZX EAX, state->tex_a*/ - addbyte(0xb6); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, tex_a)); - break; - - case CCA_MSELECT_ZERO: - default: - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - break; - } - if (!cca_reverse_blend) - { - addbyte(0x35); /*XOR EAX, 0xff*/ - addlong(0xff); - } - addbyte(0x83); /*ADD EAX, 1*/ - addbyte(0xc0); - addbyte(1); - addbyte(0x0f); /*IMUL EDX, EAX*/ - addbyte(0xaf); - addbyte(0xd0); - addbyte(0xc1); /*SHR EDX, 8*/ - addbyte(0xea); - addbyte(8); - } - } - - if ((params->alphaMode & ((1 << 0) | (1 << 4)))) - { - addbyte(0x31); /*XOR EAX, EAX*/ - addbyte(0xc0); - } - - if (!(cc_mselect == 0 && cc_reverse_blend == 0) && cc_mselect == CC_MSELECT_AOTHER) - { - /*Copy a_other to XMM3 before it gets modified*/ - addbyte(0x66); /*MOVD XMM3, EDX*/ + addbyte(0xdb); + break; + case CC_MSELECT_CLOCAL: + addbyte(0xf3); /*MOV XMM3, XMM1*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xd9); + break; + case CC_MSELECT_ALOCAL: + addbyte(0x66); /*MOVD XMM3, ECX*/ addbyte(0x0f); addbyte(0x6e); - addbyte(0xda); + addbyte(0xd9); addbyte(0xf2); /*PSHUFLW XMM3, XMM3, 0*/ addbyte(0x0f); addbyte(0x70); addbyte(0xdb); addbyte(0x00); - } - - if (cca_add && (params->alphaMode & ((1 << 0) | (1 << 4)))) - { - addbyte(0x01); /*ADD EDX, ECX*/ - addbyte(0xca); - } - - if ((params->alphaMode & ((1 << 0) | (1 << 4)))) - { - addbyte(0x85); /*TEST EDX, EDX*/ - addbyte(0xd2); - addbyte(0x0f); /*CMOVS EDX, EAX*/ - addbyte(0x48); - addbyte(0xd0); - addbyte(0xb8); /*MOV EAX, 0xff*/ - addlong(0xff); - addbyte(0x81); /*CMP EDX, 0xff*/ - addbyte(0xfa); - addlong(0xff); - addbyte(0x0f); /*CMOVA EDX, EAX*/ - addbyte(0x47); - addbyte(0xd0); - - if (cca_invert_output) - { - addbyte(0x81); /*XOR EDX, 0xff*/ - addbyte(0xf2); - addlong(0xff); - } - } - - if (!(cc_mselect == 0 && cc_reverse_blend == 0)) - { - switch (cc_mselect) - { - case CC_MSELECT_ZERO: - addbyte(0x66); /*PXOR XMM3, XMM3*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xdb); - break; - case CC_MSELECT_CLOCAL: - addbyte(0xf3); /*MOV XMM3, XMM1*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xd9); - break; - case CC_MSELECT_ALOCAL: - addbyte(0x66); /*MOVD XMM3, ECX*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0xd9); - addbyte(0xf2); /*PSHUFLW XMM3, XMM3, 0*/ - addbyte(0x0f); - addbyte(0x70); - addbyte(0xdb); - addbyte(0x00); - break; - case CC_MSELECT_AOTHER: - /*Handled above*/ - break; - case CC_MSELECT_TEX: - addbyte(0x66); /*PINSRW XMM3, state->tex_a, 0*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tex_a)); - addbyte(0); - addbyte(0x66); /*PINSRW XMM3, state->tex_a, 1*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tex_a)); - addbyte(1); - addbyte(0x66); /*PINSRW XMM3, state->tex_a, 2*/ - addbyte(0x0f); - addbyte(0xc4); - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tex_a)); - addbyte(2); - break; - case CC_MSELECT_TEXRGB: - addbyte(0x66); /*PUNPCKLBW XMM4, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xe2); - addbyte(0xf3); /*MOVQ XMM3, XMM4*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xdc); - break; - default: - addbyte(0x66); /*PXOR XMM3, XMM3*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xdb); - break; - } - addbyte(0xf3); /*MOV XMM4, XMM0*/ + break; + case CC_MSELECT_AOTHER: + /*Handled above*/ + break; + case CC_MSELECT_TEX: + addbyte(0x66); /*PINSRW XMM3, state->tex_a, 0*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tex_a)); + addbyte(0); + addbyte(0x66); /*PINSRW XMM3, state->tex_a, 1*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tex_a)); + addbyte(1); + addbyte(0x66); /*PINSRW XMM3, state->tex_a, 2*/ + addbyte(0x0f); + addbyte(0xc4); + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tex_a)); + addbyte(2); + break; + case CC_MSELECT_TEXRGB: + addbyte(0x66); /*PUNPCKLBW XMM4, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xe2); + addbyte(0xf3); /*MOVQ XMM3, XMM4*/ addbyte(0x0f); addbyte(0x7e); - addbyte(0xe0); - if (!cc_reverse_blend) - { - addbyte(0x66); /*PXOR XMM3, 0xff*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0x1d); - addlong((uint32_t)&xmm_ff_w); - } - addbyte(0x66); /*PADDW XMM3, 1*/ + addbyte(0xdc); + break; + default: + addbyte(0x66); /*PXOR XMM3, XMM3*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xdb); + break; + } + addbyte(0xf3); /*MOV XMM4, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe0); + if (!cc_reverse_blend) { + addbyte(0x66); /*PXOR XMM3, 0xff*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0x1d); + addlong((uint32_t) &xmm_ff_w); + } + addbyte(0x66); /*PADDW XMM3, 1*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x1d); + addlong((uint32_t) &xmm_01_w); + addbyte(0x66); /*PMULLW XMM0, XMM3*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0xc3); + addbyte(0x66); /*PMULHW XMM4, XMM3*/ + addbyte(0x0f); + addbyte(0xe5); + addbyte(0xe3); + addbyte(0x66); /*PUNPCKLWD XMM0, XMM4*/ + addbyte(0x0f); + addbyte(0x61); + addbyte(0xc4); + addbyte(0x66); /*PSRLD XMM0, 8*/ + addbyte(0x0f); + addbyte(0x72); + addbyte(0xe0); + addbyte(8); + addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x6b); + addbyte(0xc0); + } + + if (cc_add == 1) { + addbyte(0x66); /*PADDW XMM0, XMM1*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc1); + } + + addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xc0); + + if (cc_invert_output) { + addbyte(0x66); /*PXOR XMM0, 0xff*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0x05); + addlong((uint32_t) &xmm_ff_b); + } + //#if 0 + // addbyte(0x66); /*MOVD state->out[EDI], XMM0*/ + // addbyte(0x0f); + // addbyte(0x7e); + // addbyte(0x87); + // addlong(offsetof(voodoo_state_t, out)); + if (params->fogMode & FOG_ENABLE) { + if (params->fogMode & FOG_CONSTANT) { + addbyte(0x66); /*MOVD XMM3, params->fogColor[ESI]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x9e); + addlong(offsetof(voodoo_params_t, fogColor)); + addbyte(0x66); /*PADDUSB XMM0, XMM3*/ + addbyte(0x0f); + addbyte(0xdc); + addbyte(0xc3); + /* src_r += params->fogColor.r; + src_g += params->fogColor.g; + src_b += params->fogColor.b; */ + } else { + /*int fog_r, fog_g, fog_b, fog_a; */ + + addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xc2); + + if (!(params->fogMode & FOG_ADD)) { + addbyte(0x66); /*MOVD XMM3, params->fogColor[ESI]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x9e); + addlong(offsetof(voodoo_params_t, fogColor)); + addbyte(0x66); /*PUNPCKLBW XMM3, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xda); + } else { + addbyte(0x66); /*PXOR XMM3, XMM3*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xdb); + } + + if (!(params->fogMode & FOG_MULT)) { + addbyte(0x66); /*PSUBW XMM3, XMM0*/ + addbyte(0x0f); + addbyte(0xf9); + addbyte(0xd8); + } + + /*Divide by 2 to prevent overflow on multiply*/ + addbyte(0x66); /*PSRAW XMM3, 1*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xe3); + addbyte(1); + + switch (params->fogMode & (FOG_Z | FOG_ALPHA)) { + case 0: + addbyte(0x8b); /*MOV EBX, state->w_depth[EDI]*/ + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, w_depth)); + addbyte(0x89); /*MOV EAX, EBX*/ + addbyte(0xd8); + addbyte(0xc1); /*SHR EBX, 10*/ + addbyte(0xeb); + addbyte(10); + addbyte(0xc1); /*SHR EAX, 2*/ + addbyte(0xe8); + addbyte(2); + addbyte(0x83); /*AND EBX, 0x3f*/ + addbyte(0xe3); + addbyte(0x3f); + addbyte(0x25); /*AND EAX, 0xff*/ + addlong(0xff); + addbyte(0xf6); /*MUL params->fogTable+1[ESI+EBX*2]*/ + addbyte(0xa4); + addbyte(0x5e); + addlong(offsetof(voodoo_params_t, fogTable) + 1); + addbyte(0x0f); /*MOVZX EBX, params->fogTable[ESI+EBX*2]*/ + addbyte(0xb6); + addbyte(0x9c); + addbyte(0x5e); + addlong(offsetof(voodoo_params_t, fogTable)); + addbyte(0xc1); /*SHR EAX, 10*/ + addbyte(0xe8); + addbyte(10); + addbyte(0x01); /*ADD EAX, EBX*/ + addbyte(0xd8); + + /* int fog_idx = (w_depth >> 10) & 0x3f; + + fog_a = params->fogTable[fog_idx].fog; + fog_a += (params->fogTable[fog_idx].dfog * ((w_depth >> 2) & 0xff)) >> 10;*/ + break; + + case FOG_Z: + addbyte(0x8b); /*MOV EAX, state->z[EDI]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, z)); + addbyte(0xc1); /*SHR EAX, 12*/ + addbyte(0xe8); + addbyte(12); + addbyte(0x25); /*AND EAX, 0xff*/ + addlong(0xff); + // fog_a = (z >> 20) & 0xff; + break; + + case FOG_ALPHA: + addbyte(0x8b); /*MOV EAX, state->ia[EDI]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, ia)); + addbyte(0x31); /*XOR EBX, EBX*/ + addbyte(0xdb); + addbyte(0xc1); /*SAR EAX, 12*/ + addbyte(0xf8); + addbyte(12); + addbyte(0x0f); /*CMOVS EAX, EBX*/ + addbyte(0x48); + addbyte(0xc3); + addbyte(0xbb); /*MOV EBX, 0xff*/ + addlong(0xff); + addbyte(0x3d); /*CMP EAX, 0xff*/ + addlong(0xff); + addbyte(0x0f); /*CMOVAE EAX, EBX*/ + addbyte(0x43); + addbyte(0xc3); + // fog_a = CLAMP(ia >> 12); + break; + + case FOG_W: + addbyte(0x8b); /*MOV EAX, state->w[EDI]+4*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, w) + 4); + addbyte(0x31); /*XOR EBX, EBX*/ + addbyte(0xdb); + addbyte(0x09); /*OR EAX, EAX*/ + addbyte(0xc0); + addbyte(0x0f); /*CMOVS EAX, EBX*/ + addbyte(0x48); + addbyte(0xc3); + addbyte(0xbb); /*MOV EBX, 0xff*/ + addlong(0xff); + addbyte(0x3d); /*CMP EAX, 0xff*/ + addlong(0xff); + addbyte(0x0f); /*CMOVAE EAX, EBX*/ + addbyte(0x43); + addbyte(0xc3); + // fog_a = CLAMP(w >> 32); + break; + } + addbyte(0x01); /*ADD EAX, EAX*/ + addbyte(0xc0); + // fog_a++; + + addbyte(0x66); /*PMULLW XMM3, alookup+4[EAX*8]*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0x1c); + addbyte(0xc5); + addlong(((uintptr_t) alookup) + 16); + addbyte(0x66); /*PSRAW XMM3, 7*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xe3); + addbyte(7); + /* fog_r = (fog_r * fog_a) >> 8; + fog_g = (fog_g * fog_a) >> 8; + fog_b = (fog_b * fog_a) >> 8;*/ + + if (params->fogMode & FOG_MULT) { + addbyte(0xf3); /*MOV XMM0, XMM3*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xc3); + } else { + addbyte(0x66); /*PADDW XMM0, XMM3*/ addbyte(0x0f); addbyte(0xfd); - addbyte(0x1d); - addlong((uint32_t)&xmm_01_w); - addbyte(0x66); /*PMULLW XMM0, XMM3*/ - addbyte(0x0f); - addbyte(0xd5); addbyte(0xc3); - addbyte(0x66); /*PMULHW XMM4, XMM3*/ - addbyte(0x0f); - addbyte(0xe5); - addbyte(0xe3); - addbyte(0x66); /*PUNPCKLWD XMM0, XMM4*/ - addbyte(0x0f); - addbyte(0x61); - addbyte(0xc4); - addbyte(0x66); /*PSRLD XMM0, 8*/ - addbyte(0x0f); - addbyte(0x72); - addbyte(0xe0); - addbyte(8); - addbyte(0x66); /*PACKSSDW XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x6b); - addbyte(0xc0); + /* src_r += fog_r; + src_g += fog_g; + src_b += fog_b;*/ + } + addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0x67); + addbyte(0xc0); } - if (cc_add == 1) - { - addbyte(0x66); /*PADDW XMM0, XMM1*/ + /* src_r = CLAMP(src_r); + src_g = CLAMP(src_g); + src_b = CLAMP(src_b);*/ + } + + if ((params->alphaMode & 1) && (alpha_func != AFUNC_NEVER) && (alpha_func != AFUNC_ALWAYS)) { + addbyte(0x0f); /*MOVZX ECX, params->alphaMode+3*/ + addbyte(0xb6); + addbyte(0x8e); + addlong(offsetof(voodoo_params_t, alphaMode) + 3); + addbyte(0x39); /*CMP EDX, ECX*/ + addbyte(0xca); + + switch (alpha_func) { + case AFUNC_LESSTHAN: + addbyte(0x0f); /*JAE skip*/ + addbyte(0x83); + a_skip_pos = block_pos; + addlong(0); + break; + case AFUNC_EQUAL: + addbyte(0x0f); /*JNE skip*/ + addbyte(0x85); + a_skip_pos = block_pos; + addlong(0); + break; + case AFUNC_LESSTHANEQUAL: + addbyte(0x0f); /*JA skip*/ + addbyte(0x87); + a_skip_pos = block_pos; + addlong(0); + break; + case AFUNC_GREATERTHAN: + addbyte(0x0f); /*JBE skip*/ + addbyte(0x86); + a_skip_pos = block_pos; + addlong(0); + break; + case AFUNC_NOTEQUAL: + addbyte(0x0f); /*JE skip*/ + addbyte(0x84); + a_skip_pos = block_pos; + addlong(0); + break; + case AFUNC_GREATERTHANEQUAL: + addbyte(0x0f); /*JB skip*/ + addbyte(0x82); + a_skip_pos = block_pos; + addlong(0); + break; + } + } else if ((params->alphaMode & 1) && (alpha_func == AFUNC_NEVER)) { + addbyte(0xC3); /*RET*/ + } + + if (params->alphaMode & (1 << 4)) { + addbyte(0x8b); /*MOV EAX, state->x[EDI]*/ + addbyte(0x87); + if (params->col_tiled) + addlong(offsetof(voodoo_state_t, x_tiled)); + else + addlong(offsetof(voodoo_state_t, x)); + addbyte(0x8b); /*MOV EBP, fb_mem*/ + addbyte(0xaf); + addlong(offsetof(voodoo_state_t, fb_mem)); + addbyte(0x01); /*ADD EDX, EDX*/ + addbyte(0xd2); + addbyte(0x0f); /*MOVZX EAX, [EBP+EAX*2]*/ + addbyte(0xb7); + addbyte(0x44); + addbyte(0x45); + addbyte(0); + addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xc2); + addbyte(0x66); /*MOVD XMM4, rgb565[EAX*4]*/ + addbyte(0x0f); + addbyte(0x6e); + addbyte(0x24); + addbyte(0x85); + addlong((uint32_t) rgb565); + addbyte(0x66); /*PUNPCKLBW XMM4, XMM2*/ + addbyte(0x0f); + addbyte(0x60); + addbyte(0xe2); + addbyte(0xf3); /*MOV XMM6, XMM4*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xf4); + + switch (dest_afunc) { + case AFUNC_AZERO: + addbyte(0x66); /*PXOR XMM4, XMM4*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xe4); + break; + case AFUNC_ASRC_ALPHA: + addbyte(0x66); /*PMULLW XMM4, alookup[EDX*8]*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0x24); + addbyte(0xd5); + addlong((uint32_t) alookup); + addbyte(0xf3); /*MOVQ XMM5, XMM4*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xec); + addbyte(0x66); /*PADDW XMM4, alookup[1*8]*/ addbyte(0x0f); addbyte(0xfd); - addbyte(0xc1); + addbyte(0x25); + addlong((uint32_t) alookup + 16); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM4, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xe5); + addbyte(0x66); /*PSRLW XMM4, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd4); + addbyte(8); + break; + case AFUNC_A_COLOR: + addbyte(0x66); /*PMULLW XMM4, XMM0*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0xe0); + addbyte(0xf3); /*MOVQ XMM5, XMM4*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xec); + addbyte(0x66); /*PADDW XMM4, alookup[1*8]*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x25); + addlong((uint32_t) alookup + 16); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM4, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xe5); + addbyte(0x66); /*PSRLW XMM4, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd4); + addbyte(8); + break; + case AFUNC_ADST_ALPHA: + break; + case AFUNC_AONE: + break; + case AFUNC_AOMSRC_ALPHA: + addbyte(0x66); /*PMULLW XMM4, aminuslookup[EDX*8]*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0x24); + addbyte(0xd5); + addlong((uint32_t) aminuslookup); + addbyte(0xf3); /*MOVQ XMM5, XMM4*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xec); + addbyte(0x66); /*PADDW XMM4, alookup[1*8]*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x25); + addlong((uint32_t) alookup + 16); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM4, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xe5); + addbyte(0x66); /*PSRLW XMM4, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd4); + addbyte(8); + break; + case AFUNC_AOM_COLOR: + addbyte(0xf3); /*MOVQ XMM5, xmm_ff_w*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0x2d); + addlong((uint32_t) &xmm_ff_w); + addbyte(0x66); /*PSUBW XMM5, XMM0*/ + addbyte(0x0f); + addbyte(0xf9); + addbyte(0xe8); + addbyte(0x66); /*PMULLW XMM4, XMM5*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0xe5); + addbyte(0xf3); /*MOVQ XMM5, XMM4*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xec); + addbyte(0x66); /*PADDW XMM4, alookup[1*8]*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x25); + addlong((uint32_t) alookup + 16); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM4, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xe5); + addbyte(0x66); /*PSRLW XMM4, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd4); + addbyte(8); + break; + case AFUNC_AOMDST_ALPHA: + addbyte(0x66); /*PXOR XMM4, XMM4*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xe4); + break; + case AFUNC_ASATURATE: + addbyte(0x66); /*PMULLW XMM4, minus_254*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0x25); + addlong((uint32_t) &minus_254); + addbyte(0xf3); /*MOVQ XMM5, XMM4*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xec); + addbyte(0x66); /*PADDW XMM4, alookup[1*8]*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x25); + addlong((uint32_t) alookup + 16); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM4, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xe5); + addbyte(0x66); /*PSRLW XMM4, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd4); + addbyte(8); } + switch (src_afunc) { + case AFUNC_AZERO: + addbyte(0x66); /*PXOR XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xc0); + break; + case AFUNC_ASRC_ALPHA: + addbyte(0x66); /*PMULLW XMM0, alookup[EDX*8]*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0x04); + addbyte(0xd5); + addlong((uint32_t) alookup); + addbyte(0xf3); /*MOVQ XMM5, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe8); + addbyte(0x66); /*PADDW XMM0, alookup[1*8]*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x05); + addlong((uint32_t) alookup + 16); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM0, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc5); + addbyte(0x66); /*PSRLW XMM0, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd0); + addbyte(8); + break; + case AFUNC_A_COLOR: + addbyte(0x66); /*PMULLW XMM0, XMM6*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0xc6); + addbyte(0xf3); /*MOVQ XMM5, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe8); + addbyte(0x66); /*PADDW XMM0, alookup[1*8]*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x05); + addlong((uint32_t) alookup + 16); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM0, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc5); + addbyte(0x66); /*PSRLW XMM0, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd0); + addbyte(8); + break; + case AFUNC_ADST_ALPHA: + break; + case AFUNC_AONE: + break; + case AFUNC_AOMSRC_ALPHA: + addbyte(0x66); /*PMULLW XMM0, aminuslookup[EDX*8]*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0x04); + addbyte(0xd5); + addlong((uint32_t) aminuslookup); + addbyte(0xf3); /*MOVQ XMM5, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe8); + addbyte(0x66); /*PADDW XMM0, alookup[1*8]*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x05); + addlong((uint32_t) alookup + 16); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM0, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc5); + addbyte(0x66); /*PSRLW XMM0, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd0); + addbyte(8); + break; + case AFUNC_AOM_COLOR: + addbyte(0xf3); /*MOVQ XMM5, xmm_ff_w*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0x2d); + addlong((uint32_t) &xmm_ff_w); + addbyte(0x66); /*PSUBW XMM5, XMM6*/ + addbyte(0x0f); + addbyte(0xf9); + addbyte(0xee); + addbyte(0x66); /*PMULLW XMM0, XMM5*/ + addbyte(0x0f); + addbyte(0xd5); + addbyte(0xc5); + addbyte(0xf3); /*MOVQ XMM5, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xe8); + addbyte(0x66); /*PADDW XMM0, alookup[1*8]*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0x05); + addlong((uint32_t) alookup + 16); + addbyte(0x66); /*PSRLW XMM5, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd5); + addbyte(8); + addbyte(0x66); /*PADDW XMM0, XMM5*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc5); + addbyte(0x66); /*PSRLW XMM0, 8*/ + addbyte(0x0f); + addbyte(0x71); + addbyte(0xd0); + addbyte(8); + break; + case AFUNC_AOMDST_ALPHA: + addbyte(0x66); /*PXOR XMM0, XMM0*/ + addbyte(0x0f); + addbyte(0xef); + addbyte(0xc0); + break; + case AFUNC_ACOLORBEFOREFOG: + break; + } + + addbyte(0x66); /*PADDW XMM0, XMM4*/ + addbyte(0x0f); + addbyte(0xfd); + addbyte(0xc4); + addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ addbyte(0x0f); addbyte(0x67); addbyte(0xc0); + } + //#endif - if (cc_invert_output) - { - addbyte(0x66); /*PXOR XMM0, 0xff*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0x05); - addlong((uint32_t)&xmm_ff_b); - } -//#if 0 -// addbyte(0x66); /*MOVD state->out[EDI], XMM0*/ -// addbyte(0x0f); -// addbyte(0x7e); -// addbyte(0x87); -// addlong(offsetof(voodoo_state_t, out)); - if (params->fogMode & FOG_ENABLE) - { - if (params->fogMode & FOG_CONSTANT) - { - addbyte(0x66); /*MOVD XMM3, params->fogColor[ESI]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x9e); - addlong(offsetof(voodoo_params_t, fogColor)); - addbyte(0x66); /*PADDUSB XMM0, XMM3*/ - addbyte(0x0f); - addbyte(0xdc); - addbyte(0xc3); -/* src_r += params->fogColor.r; - src_g += params->fogColor.g; - src_b += params->fogColor.b; */ - } - else - { - /*int fog_r, fog_g, fog_b, fog_a; */ + // addbyte(0x8b); /*MOV EDX, x (ESP+12)*/ + // addbyte(0x54); + // addbyte(0x24); + // addbyte(12); - addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xc2); + addbyte(0x8b); /*MOV EDX, state->x[EDI]*/ + addbyte(0x97); + if (params->col_tiled) + addlong(offsetof(voodoo_state_t, x_tiled)); + else + addlong(offsetof(voodoo_state_t, x)); - if (!(params->fogMode & FOG_ADD)) - { - addbyte(0x66); /*MOVD XMM3, params->fogColor[ESI]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x9e); - addlong(offsetof(voodoo_params_t, fogColor)); - addbyte(0x66); /*PUNPCKLBW XMM3, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xda); - } - else - { - addbyte(0x66); /*PXOR XMM3, XMM3*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xdb); - } + addbyte(0x66); /*MOV EAX, XMM0*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xc0); - if (!(params->fogMode & FOG_MULT)) - { - addbyte(0x66); /*PSUBW XMM3, XMM0*/ - addbyte(0x0f); - addbyte(0xf9); - addbyte(0xd8); - } + if (params->fbzMode & FBZ_RGB_WMASK) { + // addbyte(0x89); /*MOV state->rgb_out[EDI], EAX*/ + // addbyte(0x87); + // addlong(offsetof(voodoo_state_t, rgb_out)); - /*Divide by 2 to prevent overflow on multiply*/ - addbyte(0x66); /*PSRAW XMM3, 1*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xe3); - addbyte(1); - - switch (params->fogMode & (FOG_Z|FOG_ALPHA)) - { - case 0: - addbyte(0x8b); /*MOV EBX, state->w_depth[EDI]*/ - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, w_depth)); - addbyte(0x89); /*MOV EAX, EBX*/ - addbyte(0xd8); - addbyte(0xc1); /*SHR EBX, 10*/ - addbyte(0xeb); - addbyte(10); - addbyte(0xc1); /*SHR EAX, 2*/ - addbyte(0xe8); - addbyte(2); - addbyte(0x83); /*AND EBX, 0x3f*/ - addbyte(0xe3); - addbyte(0x3f); - addbyte(0x25); /*AND EAX, 0xff*/ - addlong(0xff); - addbyte(0xf6); /*MUL params->fogTable+1[ESI+EBX*2]*/ - addbyte(0xa4); - addbyte(0x5e); - addlong(offsetof(voodoo_params_t, fogTable)+1); - addbyte(0x0f); /*MOVZX EBX, params->fogTable[ESI+EBX*2]*/ - addbyte(0xb6); - addbyte(0x9c); - addbyte(0x5e); - addlong(offsetof(voodoo_params_t, fogTable)); - addbyte(0xc1); /*SHR EAX, 10*/ - addbyte(0xe8); - addbyte(10); - addbyte(0x01); /*ADD EAX, EBX*/ - addbyte(0xd8); - -/* int fog_idx = (w_depth >> 10) & 0x3f; - - fog_a = params->fogTable[fog_idx].fog; - fog_a += (params->fogTable[fog_idx].dfog * ((w_depth >> 2) & 0xff)) >> 10;*/ - break; - - case FOG_Z: - addbyte(0x8b); /*MOV EAX, state->z[EDI]*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, z)); - addbyte(0xc1); /*SHR EAX, 12*/ - addbyte(0xe8); - addbyte(12); - addbyte(0x25); /*AND EAX, 0xff*/ - addlong(0xff); -// fog_a = (z >> 20) & 0xff; - break; - - case FOG_ALPHA: - addbyte(0x8b); /*MOV EAX, state->ia[EDI]*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, ia)); - addbyte(0x31); /*XOR EBX, EBX*/ - addbyte(0xdb); - addbyte(0xc1); /*SAR EAX, 12*/ - addbyte(0xf8); - addbyte(12); - addbyte(0x0f); /*CMOVS EAX, EBX*/ - addbyte(0x48); - addbyte(0xc3); - addbyte(0xbb); /*MOV EBX, 0xff*/ - addlong(0xff); - addbyte(0x3d); /*CMP EAX, 0xff*/ - addlong(0xff); - addbyte(0x0f); /*CMOVAE EAX, EBX*/ - addbyte(0x43); - addbyte(0xc3); -// fog_a = CLAMP(ia >> 12); - break; - - case FOG_W: - addbyte(0x8b); /*MOV EAX, state->w[EDI]+4*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, w)+4); - addbyte(0x31); /*XOR EBX, EBX*/ - addbyte(0xdb); - addbyte(0x09); /*OR EAX, EAX*/ - addbyte(0xc0); - addbyte(0x0f); /*CMOVS EAX, EBX*/ - addbyte(0x48); - addbyte(0xc3); - addbyte(0xbb); /*MOV EBX, 0xff*/ - addlong(0xff); - addbyte(0x3d); /*CMP EAX, 0xff*/ - addlong(0xff); - addbyte(0x0f); /*CMOVAE EAX, EBX*/ - addbyte(0x43); - addbyte(0xc3); -// fog_a = CLAMP(w >> 32); - break; - } - addbyte(0x01); /*ADD EAX, EAX*/ - addbyte(0xc0); -// fog_a++; - - addbyte(0x66); /*PMULLW XMM3, alookup+4[EAX*8]*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0x1c); - addbyte(0xc5); - addlong(((uintptr_t)alookup) + 16); - addbyte(0x66); /*PSRAW XMM3, 7*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xe3); - addbyte(7); -/* fog_r = (fog_r * fog_a) >> 8; - fog_g = (fog_g * fog_a) >> 8; - fog_b = (fog_b * fog_a) >> 8;*/ - - if (params->fogMode & FOG_MULT) - { - addbyte(0xf3); /*MOV XMM0, XMM3*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xc3); - } - else - { - addbyte(0x66); /*PADDW XMM0, XMM3*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc3); -/* src_r += fog_r; - src_g += fog_g; - src_b += fog_b;*/ - } - addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xc0); - } - -/* src_r = CLAMP(src_r); - src_g = CLAMP(src_g); - src_b = CLAMP(src_b);*/ - } - - if ((params->alphaMode & 1) && (alpha_func != AFUNC_NEVER) && (alpha_func != AFUNC_ALWAYS)) - { - addbyte(0x0f); /*MOVZX ECX, params->alphaMode+3*/ - addbyte(0xb6); - addbyte(0x8e); - addlong(offsetof(voodoo_params_t, alphaMode) + 3); - addbyte(0x39); /*CMP EDX, ECX*/ - addbyte(0xca); - - switch (alpha_func) - { - case AFUNC_LESSTHAN: - addbyte(0x0f); /*JAE skip*/ - addbyte(0x83); - a_skip_pos = block_pos; - addlong(0); - break; - case AFUNC_EQUAL: - addbyte(0x0f); /*JNE skip*/ - addbyte(0x85); - a_skip_pos = block_pos; - addlong(0); - break; - case AFUNC_LESSTHANEQUAL: - addbyte(0x0f); /*JA skip*/ - addbyte(0x87); - a_skip_pos = block_pos; - addlong(0); - break; - case AFUNC_GREATERTHAN: - addbyte(0x0f); /*JBE skip*/ - addbyte(0x86); - a_skip_pos = block_pos; - addlong(0); - break; - case AFUNC_NOTEQUAL: - addbyte(0x0f); /*JE skip*/ - addbyte(0x84); - a_skip_pos = block_pos; - addlong(0); - break; - case AFUNC_GREATERTHANEQUAL: - addbyte(0x0f); /*JB skip*/ - addbyte(0x82); - a_skip_pos = block_pos; - addlong(0); - break; - } - } - else if ((params->alphaMode & 1) && (alpha_func == AFUNC_NEVER)) - { - addbyte(0xC3); /*RET*/ - } - - if (params->alphaMode & (1 << 4)) - { - addbyte(0x8b); /*MOV EAX, state->x[EDI]*/ - addbyte(0x87); - if (params->col_tiled) - addlong(offsetof(voodoo_state_t, x_tiled)); - else - addlong(offsetof(voodoo_state_t, x)); - addbyte(0x8b); /*MOV EBP, fb_mem*/ - addbyte(0xaf); - addlong(offsetof(voodoo_state_t, fb_mem)); - addbyte(0x01); /*ADD EDX, EDX*/ - addbyte(0xd2); - addbyte(0x0f); /*MOVZX EAX, [EBP+EAX*2]*/ - addbyte(0xb7); - addbyte(0x44); - addbyte(0x45); - addbyte(0); - addbyte(0x66); /*PUNPCKLBW XMM0, XMM2*/ - addbyte(0x0f); - addbyte(0x60); - addbyte(0xc2); - addbyte(0x66); /*MOVD XMM4, rgb565[EAX*4]*/ - addbyte(0x0f); - addbyte(0x6e); - addbyte(0x24); - addbyte(0x85); - addlong((uint32_t)rgb565); - addbyte(0x66); /*PUNPCKLBW XMM4, XMM2*/ - addbyte(0x0f); - addbyte(0x60); + if (dither) { + addbyte(0x8b); /*MOV ESI, real_y (ESP+16)*/ + addbyte(0x74); + addbyte(0x24); + addbyte(16 + 16); + addbyte(0x0f); /*MOVZX EBX, AH*/ /*G*/ + addbyte(0xb6); + addbyte(0xdc); + if (dither2x2) { + addbyte(0x83); /*AND EDX, 1*/ addbyte(0xe2); - addbyte(0xf3); /*MOV XMM6, XMM4*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xf4); - - switch (dest_afunc) - { - case AFUNC_AZERO: - addbyte(0x66); /*PXOR XMM4, XMM4*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xe4); - break; - case AFUNC_ASRC_ALPHA: - addbyte(0x66); /*PMULLW XMM4, alookup[EDX*8]*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0x24); - addbyte(0xd5); - addlong((uint32_t)alookup); - addbyte(0xf3); /*MOVQ XMM5, XMM4*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xec); - addbyte(0x66); /*PADDW XMM4, alookup[1*8]*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x25); - addlong((uint32_t)alookup + 16); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM4, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xe5); - addbyte(0x66); /*PSRLW XMM4, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd4); - addbyte(8); - break; - case AFUNC_A_COLOR: - addbyte(0x66); /*PMULLW XMM4, XMM0*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0xe0); - addbyte(0xf3); /*MOVQ XMM5, XMM4*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xec); - addbyte(0x66); /*PADDW XMM4, alookup[1*8]*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x25); - addlong((uint32_t)alookup + 16); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM4, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xe5); - addbyte(0x66); /*PSRLW XMM4, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd4); - addbyte(8); - break; - case AFUNC_ADST_ALPHA: - break; - case AFUNC_AONE: - break; - case AFUNC_AOMSRC_ALPHA: - addbyte(0x66); /*PMULLW XMM4, aminuslookup[EDX*8]*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0x24); - addbyte(0xd5); - addlong((uint32_t)aminuslookup); - addbyte(0xf3); /*MOVQ XMM5, XMM4*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xec); - addbyte(0x66); /*PADDW XMM4, alookup[1*8]*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x25); - addlong((uint32_t)alookup + 16); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM4, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xe5); - addbyte(0x66); /*PSRLW XMM4, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd4); - addbyte(8); - break; - case AFUNC_AOM_COLOR: - addbyte(0xf3); /*MOVQ XMM5, xmm_ff_w*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0x2d); - addlong((uint32_t)&xmm_ff_w); - addbyte(0x66); /*PSUBW XMM5, XMM0*/ - addbyte(0x0f); - addbyte(0xf9); - addbyte(0xe8); - addbyte(0x66); /*PMULLW XMM4, XMM5*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0xe5); - addbyte(0xf3); /*MOVQ XMM5, XMM4*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xec); - addbyte(0x66); /*PADDW XMM4, alookup[1*8]*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x25); - addlong((uint32_t)alookup + 16); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM4, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xe5); - addbyte(0x66); /*PSRLW XMM4, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd4); - addbyte(8); - break; - case AFUNC_AOMDST_ALPHA: - addbyte(0x66); /*PXOR XMM4, XMM4*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xe4); - break; - case AFUNC_ASATURATE: - addbyte(0x66); /*PMULLW XMM4, minus_254*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0x25); - addlong((uint32_t)&minus_254); - addbyte(0xf3); /*MOVQ XMM5, XMM4*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xec); - addbyte(0x66); /*PADDW XMM4, alookup[1*8]*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x25); - addlong((uint32_t)alookup + 16); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM4, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xe5); - addbyte(0x66); /*PSRLW XMM4, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd4); - addbyte(8); - } - - switch (src_afunc) - { - case AFUNC_AZERO: - addbyte(0x66); /*PXOR XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xc0); - break; - case AFUNC_ASRC_ALPHA: - addbyte(0x66); /*PMULLW XMM0, alookup[EDX*8]*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0x04); - addbyte(0xd5); - addlong((uint32_t)alookup); - addbyte(0xf3); /*MOVQ XMM5, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe8); - addbyte(0x66); /*PADDW XMM0, alookup[1*8]*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x05); - addlong((uint32_t)alookup + 16); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM0, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc5); - addbyte(0x66); /*PSRLW XMM0, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd0); - addbyte(8); - break; - case AFUNC_A_COLOR: - addbyte(0x66); /*PMULLW XMM0, XMM6*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0xc6); - addbyte(0xf3); /*MOVQ XMM5, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe8); - addbyte(0x66); /*PADDW XMM0, alookup[1*8]*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x05); - addlong((uint32_t)alookup + 16); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM0, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc5); - addbyte(0x66); /*PSRLW XMM0, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd0); - addbyte(8); - break; - case AFUNC_ADST_ALPHA: - break; - case AFUNC_AONE: - break; - case AFUNC_AOMSRC_ALPHA: - addbyte(0x66); /*PMULLW XMM0, aminuslookup[EDX*8]*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0x04); - addbyte(0xd5); - addlong((uint32_t)aminuslookup); - addbyte(0xf3); /*MOVQ XMM5, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe8); - addbyte(0x66); /*PADDW XMM0, alookup[1*8]*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x05); - addlong((uint32_t)alookup + 16); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM0, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc5); - addbyte(0x66); /*PSRLW XMM0, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd0); - addbyte(8); - break; - case AFUNC_AOM_COLOR: - addbyte(0xf3); /*MOVQ XMM5, xmm_ff_w*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0x2d); - addlong((uint32_t)&xmm_ff_w); - addbyte(0x66); /*PSUBW XMM5, XMM6*/ - addbyte(0x0f); - addbyte(0xf9); - addbyte(0xee); - addbyte(0x66); /*PMULLW XMM0, XMM5*/ - addbyte(0x0f); - addbyte(0xd5); - addbyte(0xc5); - addbyte(0xf3); /*MOVQ XMM5, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xe8); - addbyte(0x66); /*PADDW XMM0, alookup[1*8]*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0x05); - addlong((uint32_t)alookup + 16); - addbyte(0x66); /*PSRLW XMM5, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd5); - addbyte(8); - addbyte(0x66); /*PADDW XMM0, XMM5*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc5); - addbyte(0x66); /*PSRLW XMM0, 8*/ - addbyte(0x0f); - addbyte(0x71); - addbyte(0xd0); - addbyte(8); - break; - case AFUNC_AOMDST_ALPHA: - addbyte(0x66); /*PXOR XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0xef); - addbyte(0xc0); - break; - case AFUNC_ACOLORBEFOREFOG: - break; - } - - addbyte(0x66); /*PADDW XMM0, XMM4*/ - addbyte(0x0f); - addbyte(0xfd); - addbyte(0xc4); - - addbyte(0x66); /*PACKUSWB XMM0, XMM0*/ - addbyte(0x0f); - addbyte(0x67); - addbyte(0xc0); + addbyte(1); + addbyte(0x83); /*AND ESI, 1*/ + addbyte(0xe6); + addbyte(1); + addbyte(0xc1); /*SHL EBX, 2*/ + addbyte(0xe3); + addbyte(2); + } else { + addbyte(0x83); /*AND EDX, 3*/ + addbyte(0xe2); + addbyte(3); + addbyte(0x83); /*AND ESI, 3*/ + addbyte(0xe6); + addbyte(3); + addbyte(0xc1); /*SHL EBX, 4*/ + addbyte(0xe3); + addbyte(4); + } + addbyte(0x0f); /*MOVZX ECX, AL*/ /*R*/ + addbyte(0xb6); + addbyte(0xc8); + if (dither2x2) { + addbyte(0xc1); /*SHR EAX, 14*/ + addbyte(0xe8); + addbyte(14); + addbyte(0x8d); /*LEA ESI, EDX+ESI*2*/ + addbyte(0x34); + addbyte(0x72); + } else { + addbyte(0xc1); /*SHR EAX, 12*/ + addbyte(0xe8); + addbyte(12); + addbyte(0x8d); /*LEA ESI, EDX+ESI*4*/ + addbyte(0x34); + addbyte(0xb2); + } + addbyte(0x8b); /*MOV EDX, state->x[EDI]*/ + addbyte(0x97); + if (params->col_tiled) + addlong(offsetof(voodoo_state_t, x_tiled)); + else + addlong(offsetof(voodoo_state_t, x)); + if (dither2x2) { + addbyte(0xc1); /*SHL ECX, 2*/ + addbyte(0xe1); + addbyte(2); + addbyte(0x25); /*AND EAX, 0x3fc*/ /*B*/ + addlong(0x3fc); + } else { + addbyte(0xc1); /*SHL ECX, 4*/ + addbyte(0xe1); + addbyte(4); + addbyte(0x25); /*AND EAX, 0xff0*/ /*B*/ + addlong(0xff0); + } + addbyte(0x0f); /*MOVZX EBX, dither_g[EBX+ESI]*/ + addbyte(0xb6); + addbyte(0x9c); + addbyte(0x33); + addlong(dither2x2 ? (uint32_t) dither_g2x2 : (uint32_t) dither_g); + addbyte(0x0f); /*MOVZX ECX, dither_rb[ECX+ESI]*/ + addbyte(0xb6); + addbyte(0x8c); + addbyte(0x31); + addlong(dither2x2 ? (uint32_t) dither_rb2x2 : (uint32_t) dither_rb); + addbyte(0x0f); /*MOVZX EAX, dither_rb[EAX+ESI]*/ + addbyte(0xb6); + addbyte(0x84); + addbyte(0x30); + addlong(dither2x2 ? (uint32_t) dither_rb2x2 : (uint32_t) dither_rb); + addbyte(0xc1); /*SHL EBX, 5*/ + addbyte(0xe3); + addbyte(5); + addbyte(0xc1); /*SHL EAX, 11*/ + addbyte(0xe0); + addbyte(11); + addbyte(0x09); /*OR EAX, EBX*/ + addbyte(0xd8); + addbyte(0x09); /*OR EAX, ECX*/ + addbyte(0xc8); + } else { + addbyte(0x89); /*MOV EBX, EAX*/ + addbyte(0xc3); + addbyte(0x0f); /*MOVZX ECX, AH*/ + addbyte(0xb6); + addbyte(0xcc); + addbyte(0xc1); /*SHR EAX, 3*/ + addbyte(0xe8); + addbyte(3); + addbyte(0xc1); /*SHR EBX, 8*/ + addbyte(0xeb); + addbyte(8); + addbyte(0xc1); /*SHL ECX, 3*/ + addbyte(0xe1); + addbyte(3); + addbyte(0x81); /*AND EAX, 0x001f*/ + addbyte(0xe0); + addlong(0x001f); + addbyte(0x81); /*AND EBX, 0xf800*/ + addbyte(0xe3); + addlong(0xf800); + addbyte(0x81); /*AND ECX, 0x07e0*/ + addbyte(0xe1); + addlong(0x07e0); + addbyte(0x09); /*OR EAX, EBX*/ + addbyte(0xd8); + addbyte(0x09); /*OR EAX, ECX*/ + addbyte(0xc8); } -//#endif - -// addbyte(0x8b); /*MOV EDX, x (ESP+12)*/ -// addbyte(0x54); -// addbyte(0x24); -// addbyte(12); - + addbyte(0x8b); /*MOV ESI, fb_mem*/ + addbyte(0xb7); + addlong(offsetof(voodoo_state_t, fb_mem)); + addbyte(0x66); /*MOV [ESI+EDX*2], AX*/ + addbyte(0x89); + addbyte(0x04); + addbyte(0x56); + } + if ((params->fbzMode & (FBZ_DEPTH_WMASK | FBZ_DEPTH_ENABLE)) == (FBZ_DEPTH_WMASK | FBZ_DEPTH_ENABLE)) { addbyte(0x8b); /*MOV EDX, state->x[EDI]*/ addbyte(0x97); - if (params->col_tiled) - addlong(offsetof(voodoo_state_t, x_tiled)); + if (params->aux_tiled) + addlong(offsetof(voodoo_state_t, x_tiled)); else - addlong(offsetof(voodoo_state_t, x)); + addlong(offsetof(voodoo_state_t, x)); + addbyte(0x66); /*MOV AX, new_depth*/ + addbyte(0x8b); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, new_depth)); + addbyte(0x8b); /*MOV ESI, aux_mem*/ + addbyte(0xb7); + addlong(offsetof(voodoo_state_t, aux_mem)); + addbyte(0x66); /*MOV [ESI+EDX*2], AX*/ + addbyte(0x89); + addbyte(0x04); + addbyte(0x56); + } - addbyte(0x66); /*MOV EAX, XMM0*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xc0); + if (z_skip_pos) + *(uint32_t *) &code_block[z_skip_pos] = (block_pos - z_skip_pos) - 4; + if (a_skip_pos) + *(uint32_t *) &code_block[a_skip_pos] = (block_pos - a_skip_pos) - 4; + if (chroma_skip_pos) + *(uint32_t *) &code_block[chroma_skip_pos] = (block_pos - chroma_skip_pos) - 4; - if (params->fbzMode & FBZ_RGB_WMASK) - { -// addbyte(0x89); /*MOV state->rgb_out[EDI], EAX*/ -// addbyte(0x87); -// addlong(offsetof(voodoo_state_t, rgb_out)); + addbyte(0x8b); /*MOV ESI, [ESP+8]*/ + addbyte(0x74); + addbyte(0x24); + addbyte(8 + 16); - if (dither) - { - addbyte(0x8b); /*MOV ESI, real_y (ESP+16)*/ - addbyte(0x74); - addbyte(0x24); - addbyte(16+16); - addbyte(0x0f); /*MOVZX EBX, AH*/ /*G*/ - addbyte(0xb6); - addbyte(0xdc); - if (dither2x2) - { - addbyte(0x83); /*AND EDX, 1*/ - addbyte(0xe2); - addbyte(1); - addbyte(0x83); /*AND ESI, 1*/ - addbyte(0xe6); - addbyte(1); - addbyte(0xc1); /*SHL EBX, 2*/ - addbyte(0xe3); - addbyte(2); - } - else - { - addbyte(0x83); /*AND EDX, 3*/ - addbyte(0xe2); - addbyte(3); - addbyte(0x83); /*AND ESI, 3*/ - addbyte(0xe6); - addbyte(3); - addbyte(0xc1); /*SHL EBX, 4*/ - addbyte(0xe3); - addbyte(4); - } - addbyte(0x0f); /*MOVZX ECX, AL*/ /*R*/ - addbyte(0xb6); - addbyte(0xc8); - if (dither2x2) - { - addbyte(0xc1); /*SHR EAX, 14*/ - addbyte(0xe8); - addbyte(14); - addbyte(0x8d); /*LEA ESI, EDX+ESI*2*/ - addbyte(0x34); - addbyte(0x72); - } - else - { - addbyte(0xc1); /*SHR EAX, 12*/ - addbyte(0xe8); - addbyte(12); - addbyte(0x8d); /*LEA ESI, EDX+ESI*4*/ - addbyte(0x34); - addbyte(0xb2); - } - addbyte(0x8b); /*MOV EDX, state->x[EDI]*/ - addbyte(0x97); - if (params->col_tiled) - addlong(offsetof(voodoo_state_t, x_tiled)); - else - addlong(offsetof(voodoo_state_t, x)); - if (dither2x2) - { - addbyte(0xc1); /*SHL ECX, 2*/ - addbyte(0xe1); - addbyte(2); - addbyte(0x25); /*AND EAX, 0x3fc*/ /*B*/ - addlong(0x3fc); - } - else - { - addbyte(0xc1); /*SHL ECX, 4*/ - addbyte(0xe1); - addbyte(4); - addbyte(0x25); /*AND EAX, 0xff0*/ /*B*/ - addlong(0xff0); - } - addbyte(0x0f); /*MOVZX EBX, dither_g[EBX+ESI]*/ - addbyte(0xb6); - addbyte(0x9c); - addbyte(0x33); - addlong(dither2x2 ? (uint32_t)dither_g2x2 : (uint32_t)dither_g); - addbyte(0x0f); /*MOVZX ECX, dither_rb[ECX+ESI]*/ - addbyte(0xb6); - addbyte(0x8c); - addbyte(0x31); - addlong(dither2x2 ? (uint32_t)dither_rb2x2 : (uint32_t)dither_rb); - addbyte(0x0f); /*MOVZX EAX, dither_rb[EAX+ESI]*/ - addbyte(0xb6); - addbyte(0x84); - addbyte(0x30); - addlong(dither2x2 ? (uint32_t)dither_rb2x2 : (uint32_t)dither_rb); - addbyte(0xc1); /*SHL EBX, 5*/ - addbyte(0xe3); - addbyte(5); - addbyte(0xc1); /*SHL EAX, 11*/ - addbyte(0xe0); - addbyte(11); - addbyte(0x09); /*OR EAX, EBX*/ - addbyte(0xd8); - addbyte(0x09); /*OR EAX, ECX*/ - addbyte(0xc8); - } - else - { - addbyte(0x89); /*MOV EBX, EAX*/ - addbyte(0xc3); - addbyte(0x0f); /*MOVZX ECX, AH*/ - addbyte(0xb6); - addbyte(0xcc); - addbyte(0xc1); /*SHR EAX, 3*/ - addbyte(0xe8); - addbyte(3); - addbyte(0xc1); /*SHR EBX, 8*/ - addbyte(0xeb); - addbyte(8); - addbyte(0xc1); /*SHL ECX, 3*/ - addbyte(0xe1); - addbyte(3); - addbyte(0x81); /*AND EAX, 0x001f*/ - addbyte(0xe0); - addlong(0x001f); - addbyte(0x81); /*AND EBX, 0xf800*/ - addbyte(0xe3); - addlong(0xf800); - addbyte(0x81); /*AND ECX, 0x07e0*/ - addbyte(0xe1); - addlong(0x07e0); - addbyte(0x09); /*OR EAX, EBX*/ - addbyte(0xd8); - addbyte(0x09); /*OR EAX, ECX*/ - addbyte(0xc8); - } - addbyte(0x8b); /*MOV ESI, fb_mem*/ - addbyte(0xb7); - addlong(offsetof(voodoo_state_t, fb_mem)); - addbyte(0x66); /*MOV [ESI+EDX*2], AX*/ - addbyte(0x89); - addbyte(0x04); - addbyte(0x56); - } - - if ((params->fbzMode & (FBZ_DEPTH_WMASK | FBZ_DEPTH_ENABLE)) == (FBZ_DEPTH_WMASK | FBZ_DEPTH_ENABLE)) - { - addbyte(0x8b); /*MOV EDX, state->x[EDI]*/ - addbyte(0x97); - if (params->aux_tiled) - addlong(offsetof(voodoo_state_t, x_tiled)); - else - addlong(offsetof(voodoo_state_t, x)); - addbyte(0x66); /*MOV AX, new_depth*/ - addbyte(0x8b); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, new_depth)); - addbyte(0x8b); /*MOV ESI, aux_mem*/ - addbyte(0xb7); - addlong(offsetof(voodoo_state_t, aux_mem)); - addbyte(0x66); /*MOV [ESI+EDX*2], AX*/ - addbyte(0x89); - addbyte(0x04); - addbyte(0x56); - } - - if (z_skip_pos) - *(uint32_t *)&code_block[z_skip_pos] = (block_pos - z_skip_pos) - 4; - if (a_skip_pos) - *(uint32_t *)&code_block[a_skip_pos] = (block_pos - a_skip_pos) - 4; - if (chroma_skip_pos) - *(uint32_t *)&code_block[chroma_skip_pos] = (block_pos - chroma_skip_pos) - 4; - - - addbyte(0x8b); /*MOV ESI, [ESP+8]*/ - addbyte(0x74); - addbyte(0x24); - addbyte(8+16); - - if (voodoo->dual_tmus) - { - addbyte(0xf3); /*MOVDQU XMM3, state->tmu1_s[EDI]*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tmu1_s)); - addbyte(0xf3); /*MOVQ XMM4, state->tmu1_w[EDI]*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xa7); - addlong(offsetof(voodoo_state_t, tmu1_w)); - addbyte(0xf3); /*MOVDQU XMM5, params->tmu[1].dSdX[ESI]*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0xae); - addlong(offsetof(voodoo_params_t, tmu[1].dSdX)); - addbyte(0xf3); /*MOVQ XMM6, params->tmu[1].dWdX[ESI]*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xb6); - addlong(offsetof(voodoo_params_t, tmu[1].dWdX)); - if (state->xdir > 0) - { - addbyte(0x66); /*PADDQ XMM3, XMM5*/ - addbyte(0x0f); - addbyte(0xd4); - addbyte(0xdd); - addbyte(0x66); /*PADDQ XMM4, XMM6*/ - addbyte(0x0f); - addbyte(0xd4); - addbyte(0xe6); - } - else - { - addbyte(0x66); /*PSUBQ XMM3, XMM5*/ - addbyte(0x0f); - addbyte(0xfb); - addbyte(0xdd); - addbyte(0x66); /*PSUBQ XMM4, XMM6*/ - addbyte(0x0f); - addbyte(0xfb); - addbyte(0xe6); - } - addbyte(0xf3); /*MOVDQU state->tmu1_s, XMM3*/ - addbyte(0x0f); - addbyte(0x7f); - addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tmu1_s)); - addbyte(0x66); /*MOVQ state->tmu1_w, XMM4*/ - addbyte(0x0f); - addbyte(0xd6); - addbyte(0xa7); - addlong(offsetof(voodoo_state_t, tmu1_w)); - } - - addbyte(0xf3); /*MOVDQU XMM1, state->ib[EDI]*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, ib)); - addbyte(0xf3); /*MOVDQU XMM3, state->tmu0_s[EDI]*/ + if (voodoo->dual_tmus) { + addbyte(0xf3); /*MOVDQU XMM3, state->tmu1_s[EDI]*/ addbyte(0x0f); addbyte(0x6f); addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tmu0_s)); - addbyte(0xf3); /*MOVQ XMM4, state->tmu0_w[EDI]*/ + addlong(offsetof(voodoo_state_t, tmu1_s)); + addbyte(0xf3); /*MOVQ XMM4, state->tmu1_w[EDI]*/ addbyte(0x0f); addbyte(0x7e); addbyte(0xa7); - addlong(offsetof(voodoo_state_t, tmu0_w)); - addbyte(0xf3); /*MOVDQU XMM0, params->dBdX[ESI]*/ - addbyte(0x0f); - addbyte(0x6f); - addbyte(0x86); - addlong(offsetof(voodoo_params_t, dBdX)); - addbyte(0x8b); /*MOV EAX, params->dZdX[ESI]*/ - addbyte(0x86); - addlong(offsetof(voodoo_params_t, dZdX)); - addbyte(0xf3); /*MOVDQU XMM5, params->tmu[0].dSdX[ESI]*/ + addlong(offsetof(voodoo_state_t, tmu1_w)); + addbyte(0xf3); /*MOVDQU XMM5, params->tmu[1].dSdX[ESI]*/ addbyte(0x0f); addbyte(0x6f); addbyte(0xae); - addlong(offsetof(voodoo_params_t, tmu[0].dSdX)); - addbyte(0xf3); /*MOVQ XMM6, params->tmu[0].dWdX[ESI]*/ + addlong(offsetof(voodoo_params_t, tmu[1].dSdX)); + addbyte(0xf3); /*MOVQ XMM6, params->tmu[1].dWdX[ESI]*/ addbyte(0x0f); addbyte(0x7e); addbyte(0xb6); - addlong(offsetof(voodoo_params_t, tmu[0].dWdX)); - - if (state->xdir > 0) - { - addbyte(0x66); /*PADDD XMM1, XMM0*/ - addbyte(0x0f); - addbyte(0xfe); - addbyte(0xc8); + addlong(offsetof(voodoo_params_t, tmu[1].dWdX)); + if (state->xdir > 0) { + addbyte(0x66); /*PADDQ XMM3, XMM5*/ + addbyte(0x0f); + addbyte(0xd4); + addbyte(0xdd); + addbyte(0x66); /*PADDQ XMM4, XMM6*/ + addbyte(0x0f); + addbyte(0xd4); + addbyte(0xe6); + } else { + addbyte(0x66); /*PSUBQ XMM3, XMM5*/ + addbyte(0x0f); + addbyte(0xfb); + addbyte(0xdd); + addbyte(0x66); /*PSUBQ XMM4, XMM6*/ + addbyte(0x0f); + addbyte(0xfb); + addbyte(0xe6); } - else - { - addbyte(0x66); /*PSUBD XMM1, XMM0*/ - addbyte(0x0f); - addbyte(0xfa); - addbyte(0xc8); - } - - addbyte(0xf3); /*MOVQ XMM0, state->w*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, w)); - addbyte(0xf3); /*MOVDQU state->ib, XMM1*/ - addbyte(0x0f); - addbyte(0x7f); - addbyte(0x8f); - addlong(offsetof(voodoo_state_t, ib)); - addbyte(0xf3); /*MOVQ XMM7, params->dWdX*/ - addbyte(0x0f); - addbyte(0x7e); - addbyte(0xbe); - addlong(offsetof(voodoo_params_t, dWdX)); - - if (state->xdir > 0) - { - addbyte(0x66); /*PADDQ XMM3, XMM5*/ - addbyte(0x0f); - addbyte(0xd4); - addbyte(0xdd); - addbyte(0x66); /*PADDQ XMM4, XMM6*/ - addbyte(0x0f); - addbyte(0xd4); - addbyte(0xe6); - addbyte(0x66); /*PADDQ XMM0, XMM7*/ - addbyte(0x0f); - addbyte(0xd4); - addbyte(0xc7); - addbyte(0x01); /*ADD state->z[EDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, z)); - } - else - { - addbyte(0x66); /*PSUBQ XMM3, XMM5*/ - addbyte(0x0f); - addbyte(0xfb); - addbyte(0xdd); - addbyte(0x66); /*PSUBQ XMM4, XMM6*/ - addbyte(0x0f); - addbyte(0xfb); - addbyte(0xe6); - addbyte(0x66); /*PSUBQ XMM0, XMM7*/ - addbyte(0x0f); - addbyte(0xfb); - addbyte(0xc7); - addbyte(0x29); /*SUB state->z[EDI], EAX*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, z)); - } - - addbyte(0xf3); /*MOVDQU state->tmu0_s, XMM3*/ + addbyte(0xf3); /*MOVDQU state->tmu1_s, XMM3*/ addbyte(0x0f); addbyte(0x7f); addbyte(0x9f); - addlong(offsetof(voodoo_state_t, tmu0_s)); - addbyte(0x66); /*MOVQ state->tmu0_w, XMM4*/ + addlong(offsetof(voodoo_state_t, tmu1_s)); + addbyte(0x66); /*MOVQ state->tmu1_w, XMM4*/ addbyte(0x0f); addbyte(0xd6); addbyte(0xa7); - addlong(offsetof(voodoo_state_t, tmu0_w)); - addbyte(0x66); /*MOVQ state->w, XMM0*/ + addlong(offsetof(voodoo_state_t, tmu1_w)); + } + + addbyte(0xf3); /*MOVDQU XMM1, state->ib[EDI]*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, ib)); + addbyte(0xf3); /*MOVDQU XMM3, state->tmu0_s[EDI]*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tmu0_s)); + addbyte(0xf3); /*MOVQ XMM4, state->tmu0_w[EDI]*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xa7); + addlong(offsetof(voodoo_state_t, tmu0_w)); + addbyte(0xf3); /*MOVDQU XMM0, params->dBdX[ESI]*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0x86); + addlong(offsetof(voodoo_params_t, dBdX)); + addbyte(0x8b); /*MOV EAX, params->dZdX[ESI]*/ + addbyte(0x86); + addlong(offsetof(voodoo_params_t, dZdX)); + addbyte(0xf3); /*MOVDQU XMM5, params->tmu[0].dSdX[ESI]*/ + addbyte(0x0f); + addbyte(0x6f); + addbyte(0xae); + addlong(offsetof(voodoo_params_t, tmu[0].dSdX)); + addbyte(0xf3); /*MOVQ XMM6, params->tmu[0].dWdX[ESI]*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xb6); + addlong(offsetof(voodoo_params_t, tmu[0].dWdX)); + + if (state->xdir > 0) { + addbyte(0x66); /*PADDD XMM1, XMM0*/ addbyte(0x0f); - addbyte(0xd6); - addbyte(0x87); - addlong(offsetof(voodoo_state_t, w)); + addbyte(0xfe); + addbyte(0xc8); + } else { + addbyte(0x66); /*PSUBD XMM1, XMM0*/ + addbyte(0x0f); + addbyte(0xfa); + addbyte(0xc8); + } - addbyte(0x83); /*ADD state->pixel_count[EDI], 1*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, pixel_count)); - addbyte(1); + addbyte(0xf3); /*MOVQ XMM0, state->w*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, w)); + addbyte(0xf3); /*MOVDQU state->ib, XMM1*/ + addbyte(0x0f); + addbyte(0x7f); + addbyte(0x8f); + addlong(offsetof(voodoo_state_t, ib)); + addbyte(0xf3); /*MOVQ XMM7, params->dWdX*/ + addbyte(0x0f); + addbyte(0x7e); + addbyte(0xbe); + addlong(offsetof(voodoo_params_t, dWdX)); - if (params->fbzColorPath & FBZCP_TEXTURE_ENABLED) - { - if ((params->textureMode[0] & TEXTUREMODE_MASK) == TEXTUREMODE_PASSTHROUGH || - (params->textureMode[0] & TEXTUREMODE_LOCAL_MASK) == TEXTUREMODE_LOCAL) - { - addbyte(0x83); /*ADD state->texel_count[EDI], 1*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, texel_count)); - addbyte(1); - } - else - { - addbyte(0x83); /*ADD state->texel_count[EDI], 2*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, texel_count)); - addbyte(2); - } + if (state->xdir > 0) { + addbyte(0x66); /*PADDQ XMM3, XMM5*/ + addbyte(0x0f); + addbyte(0xd4); + addbyte(0xdd); + addbyte(0x66); /*PADDQ XMM4, XMM6*/ + addbyte(0x0f); + addbyte(0xd4); + addbyte(0xe6); + addbyte(0x66); /*PADDQ XMM0, XMM7*/ + addbyte(0x0f); + addbyte(0xd4); + addbyte(0xc7); + addbyte(0x01); /*ADD state->z[EDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, z)); + } else { + addbyte(0x66); /*PSUBQ XMM3, XMM5*/ + addbyte(0x0f); + addbyte(0xfb); + addbyte(0xdd); + addbyte(0x66); /*PSUBQ XMM4, XMM6*/ + addbyte(0x0f); + addbyte(0xfb); + addbyte(0xe6); + addbyte(0x66); /*PSUBQ XMM0, XMM7*/ + addbyte(0x0f); + addbyte(0xfb); + addbyte(0xc7); + addbyte(0x29); /*SUB state->z[EDI], EAX*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, z)); + } + + addbyte(0xf3); /*MOVDQU state->tmu0_s, XMM3*/ + addbyte(0x0f); + addbyte(0x7f); + addbyte(0x9f); + addlong(offsetof(voodoo_state_t, tmu0_s)); + addbyte(0x66); /*MOVQ state->tmu0_w, XMM4*/ + addbyte(0x0f); + addbyte(0xd6); + addbyte(0xa7); + addlong(offsetof(voodoo_state_t, tmu0_w)); + addbyte(0x66); /*MOVQ state->w, XMM0*/ + addbyte(0x0f); + addbyte(0xd6); + addbyte(0x87); + addlong(offsetof(voodoo_state_t, w)); + + addbyte(0x83); /*ADD state->pixel_count[EDI], 1*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, pixel_count)); + addbyte(1); + + if (params->fbzColorPath & FBZCP_TEXTURE_ENABLED) { + if ((params->textureMode[0] & TEXTUREMODE_MASK) == TEXTUREMODE_PASSTHROUGH || (params->textureMode[0] & TEXTUREMODE_LOCAL_MASK) == TEXTUREMODE_LOCAL) { + addbyte(0x83); /*ADD state->texel_count[EDI], 1*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, texel_count)); + addbyte(1); + } else { + addbyte(0x83); /*ADD state->texel_count[EDI], 2*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, texel_count)); + addbyte(2); } - addbyte(0x8b); /*MOV EAX, state->x[EDI]*/ + } + addbyte(0x8b); /*MOV EAX, state->x[EDI]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, x)); + + if (state->xdir > 0) { + addbyte(0x83); /*ADD state->x[EDI], 1*/ addbyte(0x87); addlong(offsetof(voodoo_state_t, x)); + addbyte(1); + } else { + addbyte(0x83); /*SUB state->x[EDI], 1*/ + addbyte(0xaf); + addlong(offsetof(voodoo_state_t, x)); + addbyte(1); + } - if (state->xdir > 0) - { - addbyte(0x83); /*ADD state->x[EDI], 1*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, x)); - addbyte(1); - } - else - { - addbyte(0x83); /*SUB state->x[EDI], 1*/ - addbyte(0xaf); - addlong(offsetof(voodoo_state_t, x)); - addbyte(1); - } + addbyte(0x3b); /*CMP EAX, state->x2[EDI]*/ + addbyte(0x87); + addlong(offsetof(voodoo_state_t, x2)); + addbyte(0x0f); /*JNZ loop_jump_pos*/ + addbyte(0x85); + addlong(loop_jump_pos - (block_pos + 4)); - addbyte(0x3b); /*CMP EAX, state->x2[EDI]*/ - addbyte(0x87); - addlong(offsetof(voodoo_state_t, x2)); - addbyte(0x0f); /*JNZ loop_jump_pos*/ - addbyte(0x85); - addlong(loop_jump_pos - (block_pos + 4)); + addbyte(0x5b); /*POP EBX*/ + addbyte(0x5e); /*POP ESI*/ + addbyte(0x5f); /*POP EDI*/ + addbyte(0x5d); /*POP EBP*/ - addbyte(0x5b); /*POP EBX*/ - addbyte(0x5e); /*POP ESI*/ - addbyte(0x5f); /*POP EDI*/ - addbyte(0x5d); /*POP EBP*/ + addbyte(0xC3); /*RET*/ - addbyte(0xC3); /*RET*/ - - if (params->textureMode[1] & TEXTUREMODE_TRILINEAR) - cs = cs; + if (params->textureMode[1] & TEXTUREMODE_TRILINEAR) + cs = cs; } int voodoo_recomp = 0; -static inline void *voodoo_get_block(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int odd_even) +static inline void * +voodoo_get_block(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int odd_even) { - int c; - int b = last_block[odd_even]; - voodoo_x86_data_t *data; - voodoo_x86_data_t *codegen_data = voodoo->codegen_data; + int c; + int b = last_block[odd_even]; + voodoo_x86_data_t *data; + voodoo_x86_data_t *codegen_data = voodoo->codegen_data; - for (c = 0; c < 8; c++) - { - data = &codegen_data[odd_even + b*4]; + for (c = 0; c < 8; c++) { + data = &codegen_data[odd_even + b * 4]; - if (state->xdir == data->xdir && - params->alphaMode == data->alphaMode && - params->fbzMode == data->fbzMode && - params->fogMode == data->fogMode && - params->fbzColorPath == data->fbzColorPath && - (voodoo->trexInit1[0] & (1 << 18)) == data->trexInit1 && - params->textureMode[0] == data->textureMode[0] && - params->textureMode[1] == data->textureMode[1] && - (params->tLOD[0] & LOD_MASK) == data->tLOD[0] && - (params->tLOD[1] & LOD_MASK) == data->tLOD[1] && - ((params->col_tiled || params->aux_tiled) ? 1 : 0) == data->is_tiled) - { - last_block[odd_even] = b; - return data->code_block; - } - - b = (b + 1) & 7; + if (state->xdir == data->xdir && params->alphaMode == data->alphaMode && params->fbzMode == data->fbzMode && params->fogMode == data->fogMode && params->fbzColorPath == data->fbzColorPath && (voodoo->trexInit1[0] & (1 << 18)) == data->trexInit1 && params->textureMode[0] == data->textureMode[0] && params->textureMode[1] == data->textureMode[1] && (params->tLOD[0] & LOD_MASK) == data->tLOD[0] && (params->tLOD[1] & LOD_MASK) == data->tLOD[1] && ((params->col_tiled || params->aux_tiled) ? 1 : 0) == data->is_tiled) { + last_block[odd_even] = b; + return data->code_block; } -voodoo_recomp++; - data = &codegen_data[odd_even + next_block_to_write[odd_even]*4]; -// code_block = data->code_block; - voodoo_generate(data->code_block, voodoo, params, state, depth_op); + b = (b + 1) & 7; + } + voodoo_recomp++; + data = &codegen_data[odd_even + next_block_to_write[odd_even] * 4]; + // code_block = data->code_block; - data->xdir = state->xdir; - data->alphaMode = params->alphaMode; - data->fbzMode = params->fbzMode; - data->fogMode = params->fogMode; - data->fbzColorPath = params->fbzColorPath; - data->trexInit1 = voodoo->trexInit1[0] & (1 << 18); - data->textureMode[0] = params->textureMode[0]; - data->textureMode[1] = params->textureMode[1]; - data->tLOD[0] = params->tLOD[0] & LOD_MASK; - data->tLOD[1] = params->tLOD[1] & LOD_MASK; - data->is_tiled = (params->col_tiled || params->aux_tiled) ? 1 : 0; + voodoo_generate(data->code_block, voodoo, params, state, depth_op); - next_block_to_write[odd_even] = (next_block_to_write[odd_even] + 1) & 7; + data->xdir = state->xdir; + data->alphaMode = params->alphaMode; + data->fbzMode = params->fbzMode; + data->fogMode = params->fogMode; + data->fbzColorPath = params->fbzColorPath; + data->trexInit1 = voodoo->trexInit1[0] & (1 << 18); + data->textureMode[0] = params->textureMode[0]; + data->textureMode[1] = params->textureMode[1]; + data->tLOD[0] = params->tLOD[0] & LOD_MASK; + data->tLOD[1] = params->tLOD[1] & LOD_MASK; + data->is_tiled = (params->col_tiled || params->aux_tiled) ? 1 : 0; - return data->code_block; + next_block_to_write[odd_even] = (next_block_to_write[odd_even] + 1) & 7; + + return data->code_block; } -void voodoo_codegen_init(voodoo_t *voodoo) +void +voodoo_codegen_init(voodoo_t *voodoo) { - int c; + int c; - voodoo->codegen_data = plat_mmap(sizeof(voodoo_x86_data_t) * BLOCK_NUM*4, 1); + voodoo->codegen_data = plat_mmap(sizeof(voodoo_x86_data_t) * BLOCK_NUM * 4, 1); - for (c = 0; c < 256; c++) - { - int d[4]; - int _ds = c & 0xf; - int dt = c >> 4; + for (c = 0; c < 256; c++) { + int d[4]; + int _ds = c & 0xf; + int dt = c >> 4; - alookup[c] = _mm_set_epi32(0, 0, c | (c << 16), c | (c << 16)); - aminuslookup[c] = _mm_set_epi32(0, 0, (255-c) | ((255-c) << 16), (255-c) | ((255-c) << 16)); + alookup[c] = _mm_set_epi32(0, 0, c | (c << 16), c | (c << 16)); + aminuslookup[c] = _mm_set_epi32(0, 0, (255 - c) | ((255 - c) << 16), (255 - c) | ((255 - c) << 16)); - d[0] = (16 - _ds) * (16 - dt); - d[1] = _ds * (16 - dt); - d[2] = (16 - _ds) * dt; - d[3] = _ds * dt; + d[0] = (16 - _ds) * (16 - dt); + d[1] = _ds * (16 - dt); + d[2] = (16 - _ds) * dt; + d[3] = _ds * dt; - bilinear_lookup[c*2] = _mm_set_epi32(d[1] | (d[1] << 16), d[1] | (d[1] << 16), d[0] | (d[0] << 16), d[0] | (d[0] << 16)); - bilinear_lookup[c*2 + 1] = _mm_set_epi32(d[3] | (d[3] << 16), d[3] | (d[3] << 16), d[2] | (d[2] << 16), d[2] | (d[2] << 16)); - } - alookup[256] = _mm_set_epi32(0, 0, 256 | (256 << 16), 256 | (256 << 16)); - xmm_00_ff_w[0] = _mm_set_epi32(0, 0, 0, 0); - xmm_00_ff_w[1] = _mm_set_epi32(0, 0, 0xff | (0xff << 16), 0xff | (0xff << 16)); + bilinear_lookup[c * 2] = _mm_set_epi32(d[1] | (d[1] << 16), d[1] | (d[1] << 16), d[0] | (d[0] << 16), d[0] | (d[0] << 16)); + bilinear_lookup[c * 2 + 1] = _mm_set_epi32(d[3] | (d[3] << 16), d[3] | (d[3] << 16), d[2] | (d[2] << 16), d[2] | (d[2] << 16)); + } + alookup[256] = _mm_set_epi32(0, 0, 256 | (256 << 16), 256 | (256 << 16)); + xmm_00_ff_w[0] = _mm_set_epi32(0, 0, 0, 0); + xmm_00_ff_w[1] = _mm_set_epi32(0, 0, 0xff | (0xff << 16), 0xff | (0xff << 16)); } -void voodoo_codegen_close(voodoo_t *voodoo) +void +voodoo_codegen_close(voodoo_t *voodoo) { - plat_munmap(voodoo->codegen_data, sizeof(voodoo_x86_data_t) * BLOCK_NUM*4); + plat_munmap(voodoo->codegen_data, sizeof(voodoo_x86_data_t) * BLOCK_NUM * 4); } #endif /*VIDEO_VOODOO_CODEGEN_X86_H*/ diff --git a/src/include/86box/vid_voodoo_common.h b/src/include/86box/vid_voodoo_common.h index 6af42e9ec..0671d2913 100644 --- a/src/include/86box/vid_voodoo_common.h +++ b/src/include/86box/vid_voodoo_common.h @@ -17,79 +17,72 @@ */ #ifndef VIDEO_VOODOO_COMMON_H -# define VIDEO_VOODOO_COMMON_H +#define VIDEO_VOODOO_COMMON_H #ifdef CLAMP -#undef CLAMP +# undef CLAMP #endif -#define CLAMP(x) (((x) < 0) ? 0 : (((x) > 0xff) ? 0xff : (x))) -#define CLAMP16(x) (((x) < 0) ? 0 : (((x) > 0xffff) ? 0xffff : (x))) +#define CLAMP(x) (((x) < 0) ? 0 : (((x) > 0xff) ? 0xff : (x))) +#define CLAMP16(x) (((x) < 0) ? 0 : (((x) > 0xffff) ? 0xffff : (x))) - -#define LOD_MAX 8 +#define LOD_MAX 8 #define TEX_DIRTY_SHIFT 10 -#define TEX_CACHE_MAX 64 +#define TEX_CACHE_MAX 64 -enum -{ - VOODOO_1 = 0, - VOODOO_SB50, - VOODOO_2, - VOODOO_BANSHEE, - VOODOO_3 +enum { + VOODOO_1 = 0, + VOODOO_SB50, + VOODOO_2, + VOODOO_BANSHEE, + VOODOO_3 }; -typedef union int_float -{ - uint32_t i; - float f; +typedef union int_float { + uint32_t i; + float f; } int_float; -typedef struct rgbvoodoo_t -{ - uint8_t b, g, r; - uint8_t pad; +typedef struct rgbvoodoo_t { + uint8_t b, g, r; + uint8_t pad; } rgbvoodoo_t; -typedef struct rgba8_t -{ - uint8_t b, g, r, a; +typedef struct rgba8_t { + uint8_t b, g, r, a; } rgba8_t; -typedef union rgba_u -{ - struct - { - uint8_t b, g, r, a; - } rgba; - uint32_t u; +typedef union rgba_u { + struct + { + uint8_t b, g, r, a; + } rgba; + uint32_t u; } rgba_u; -#define FIFO_SIZE 65536 -#define FIFO_MASK (FIFO_SIZE - 1) +#define FIFO_SIZE 65536 +#define FIFO_MASK (FIFO_SIZE - 1) #define FIFO_ENTRY_SIZE (1 << 31) -#define FIFO_ENTRIES (voodoo->fifo_write_idx - voodoo->fifo_read_idx) -#define FIFO_FULL ((voodoo->fifo_write_idx - voodoo->fifo_read_idx) >= FIFO_SIZE-4) -#define FIFO_EMPTY (voodoo->fifo_read_idx == voodoo->fifo_write_idx) +#define FIFO_ENTRIES (voodoo->fifo_write_idx - voodoo->fifo_read_idx) +#define FIFO_FULL ((voodoo->fifo_write_idx - voodoo->fifo_read_idx) >= FIFO_SIZE - 4) +#define FIFO_EMPTY (voodoo->fifo_read_idx == voodoo->fifo_write_idx) -#define FIFO_TYPE 0xff000000 -#define FIFO_ADDR 0x00ffffff +#define FIFO_TYPE 0xff000000 +#define FIFO_ADDR 0x00ffffff -enum -{ - FIFO_INVALID = (0x00 << 24), - FIFO_WRITEL_REG = (0x01 << 24), - FIFO_WRITEW_FB = (0x02 << 24), - FIFO_WRITEL_FB = (0x03 << 24), - FIFO_WRITEL_TEX = (0x04 << 24), - FIFO_WRITEL_2DREG = (0x05 << 24) +enum { + FIFO_INVALID = (0x00 << 24), + FIFO_WRITEL_REG = (0x01 << 24), + FIFO_WRITEW_FB = (0x02 << 24), + FIFO_WRITEL_FB = (0x03 << 24), + FIFO_WRITEL_TEX = (0x04 << 24), + FIFO_WRITEL_2DREG = (0x05 << 24) }; -#define PARAM_SIZE 1024 -#define PARAM_MASK (PARAM_SIZE - 1) +#define PARAM_SIZE 1024 +#define PARAM_MASK (PARAM_SIZE - 1) #define PARAM_ENTRY_SIZE (1 << 31) #define PARAM_ENTRIES(x) (voodoo->params_write_idx - voodoo->params_read_idx[x]) @@ -98,438 +91,430 @@ enum typedef struct { - uint32_t addr_type; - uint32_t val; + uint32_t addr_type; + uint32_t val; } fifo_entry_t; -typedef struct voodoo_params_t -{ - int command; +typedef struct voodoo_params_t { + int command; - int32_t vertexAx, vertexAy, vertexBx, vertexBy, vertexCx, vertexCy; + int32_t vertexAx, vertexAy, vertexBx, vertexBy, vertexCx, vertexCy; - uint32_t startR, startG, startB, startZ, startA; + uint32_t startR, startG, startB, startZ, startA; - int32_t dBdX, dGdX, dRdX, dAdX, dZdX; + int32_t dBdX, dGdX, dRdX, dAdX, dZdX; - int32_t dBdY, dGdY, dRdY, dAdY, dZdY; + int32_t dBdY, dGdY, dRdY, dAdY, dZdY; - int64_t startW, dWdX, dWdY; + int64_t startW, dWdX, dWdY; - struct - { - int64_t startS, startT, startW, p1; - int64_t dSdX, dTdX, dWdX, p2; - int64_t dSdY, dTdY, dWdY, p3; - } tmu[2]; + struct + { + int64_t startS, startT, startW, p1; + int64_t dSdX, dTdX, dWdX, p2; + int64_t dSdY, dTdY, dWdY, p3; + } tmu[2]; - uint32_t color0, color1; + uint32_t color0, color1; - uint32_t fbzMode; - uint32_t fbzColorPath; + uint32_t fbzMode; + uint32_t fbzColorPath; - uint32_t fogMode; - rgbvoodoo_t fogColor; - struct - { - uint8_t fog, dfog; - } fogTable[64]; + uint32_t fogMode; + rgbvoodoo_t fogColor; + struct + { + uint8_t fog, dfog; + } fogTable[64]; - uint32_t alphaMode; + uint32_t alphaMode; - uint32_t zaColor; + uint32_t zaColor; - int chromaKey_r, chromaKey_g, chromaKey_b; - uint32_t chromaKey; + int chromaKey_r, chromaKey_g, chromaKey_b; + uint32_t chromaKey; - uint32_t textureMode[2]; - uint32_t tLOD[2]; + uint32_t textureMode[2]; + uint32_t tLOD[2]; - uint32_t texBaseAddr[2], texBaseAddr1[2], texBaseAddr2[2], texBaseAddr38[2]; + uint32_t texBaseAddr[2], texBaseAddr1[2], texBaseAddr2[2], texBaseAddr38[2]; - uint32_t tex_base[2][LOD_MAX+2]; - uint32_t tex_end[2][LOD_MAX+2]; - int tex_width[2]; - int tex_w_mask[2][LOD_MAX+2]; - int tex_w_nmask[2][LOD_MAX+2]; - int tex_h_mask[2][LOD_MAX+2]; - int tex_shift[2][LOD_MAX+2]; - int tex_lod[2][LOD_MAX+2]; - int tex_entry[2]; - int detail_max[2], detail_bias[2], detail_scale[2]; + uint32_t tex_base[2][LOD_MAX + 2]; + uint32_t tex_end[2][LOD_MAX + 2]; + int tex_width[2]; + int tex_w_mask[2][LOD_MAX + 2]; + int tex_w_nmask[2][LOD_MAX + 2]; + int tex_h_mask[2][LOD_MAX + 2]; + int tex_shift[2][LOD_MAX + 2]; + int tex_lod[2][LOD_MAX + 2]; + int tex_entry[2]; + int detail_max[2], detail_bias[2], detail_scale[2]; - uint32_t draw_offset, aux_offset; + uint32_t draw_offset, aux_offset; - int tformat[2]; + int tformat[2]; - int clipLeft, clipRight, clipLowY, clipHighY; - int clipLeft1, clipRight1, clipLowY1, clipHighY1; + int clipLeft, clipRight, clipLowY, clipHighY; + int clipLeft1, clipRight1, clipLowY1, clipHighY1; - int sign; + int sign; - uint32_t front_offset; + uint32_t front_offset; - uint32_t swapbufferCMD; + uint32_t swapbufferCMD; - uint32_t stipple; + uint32_t stipple; - int col_tiled, aux_tiled; - int row_width, aux_row_width; + int col_tiled, aux_tiled; + int row_width, aux_row_width; } voodoo_params_t; -typedef struct texture_t -{ - uint32_t base; - uint32_t tLOD; - volatile int refcount, refcount_r[4]; - int is16; - uint32_t palette_checksum; - uint32_t addr_start[4], addr_end[4]; - uint32_t *data; +typedef struct texture_t { + uint32_t base; + uint32_t tLOD; + volatile int refcount, refcount_r[4]; + int is16; + uint32_t palette_checksum; + uint32_t addr_start[4], addr_end[4]; + uint32_t *data; } texture_t; -typedef struct vert_t -{ - float sVx, sVy; - float sRed, sGreen, sBlue, sAlpha; - float sVz, sWb; - float sW0, sS0, sT0; - float sW1, sS1, sT1; +typedef struct vert_t { + float sVx, sVy; + float sRed, sGreen, sBlue, sAlpha; + float sVz, sWb; + float sW0, sS0, sT0; + float sW1, sS1, sT1; } vert_t; -typedef struct clip_t -{ - int x_min, x_max; - int y_min, y_max; +typedef struct clip_t { + int x_min, x_max; + int y_min, y_max; } clip_t; -typedef struct voodoo_t -{ - mem_mapping_t mapping; +typedef struct voodoo_t { + mem_mapping_t mapping; - int pci_enable; + int pci_enable; - uint8_t dac_data[8]; - int dac_reg, dac_reg_ff; - uint8_t dac_readdata; - uint16_t dac_pll_regs[16]; + uint8_t dac_data[8]; + int dac_reg, dac_reg_ff; + uint8_t dac_readdata; + uint16_t dac_pll_regs[16]; - float pixel_clock; - uint64_t line_time; + float pixel_clock; + uint64_t line_time; - voodoo_params_t params; + voodoo_params_t params; - uint32_t fbiInit0, fbiInit1, fbiInit2, fbiInit3, fbiInit4; - uint32_t fbiInit5, fbiInit6, fbiInit7; /*Voodoo 2*/ + uint32_t fbiInit0, fbiInit1, fbiInit2, fbiInit3, fbiInit4; + uint32_t fbiInit5, fbiInit6, fbiInit7; /*Voodoo 2*/ - uint32_t initEnable; + uint32_t initEnable; - uint32_t lfbMode; + uint32_t lfbMode; - uint32_t memBaseAddr; + uint32_t memBaseAddr; - int_float fvertexAx, fvertexAy, fvertexBx, fvertexBy, fvertexCx, fvertexCy; + int_float fvertexAx, fvertexAy, fvertexBx, fvertexBy, fvertexCx, fvertexCy; - uint32_t front_offset, back_offset; + uint32_t front_offset, back_offset; - uint32_t fb_read_offset, fb_write_offset; + uint32_t fb_read_offset, fb_write_offset; - int row_width, aux_row_width; - int block_width; + int row_width, aux_row_width; + int block_width; - int col_tiled, aux_tiled; + int col_tiled, aux_tiled; - uint8_t *fb_mem, *tex_mem[2]; - uint16_t *tex_mem_w[2]; + uint8_t *fb_mem, *tex_mem[2]; + uint16_t *tex_mem_w[2]; - int rgb_sel; + int rgb_sel; - uint32_t trexInit1[2]; + uint32_t trexInit1[2]; - uint32_t tmuConfig; + uint32_t tmuConfig; - mutex_t *swap_mutex; - int swap_count; + mutex_t *swap_mutex; + int swap_count; - int disp_buffer, draw_buffer; - pc_timer_t timer; + int disp_buffer, draw_buffer; + pc_timer_t timer; - int line; - svga_t *svga; + int line; + svga_t *svga; - uint32_t backPorch; - uint32_t videoDimensions; - uint32_t hSync, vSync; + uint32_t backPorch; + uint32_t videoDimensions; + uint32_t hSync, vSync; - int h_total, v_total, v_disp; - int h_disp; - int v_retrace; + int h_total, v_total, v_disp; + int h_disp; + int v_retrace; - struct - { - uint32_t y[4], i[4], q[4]; - } nccTable[2][2]; + struct + { + uint32_t y[4], i[4], q[4]; + } nccTable[2][2]; - rgba_u palette[2][256]; + rgba_u palette[2][256]; - rgba_u ncc_lookup[2][2][256]; - int ncc_dirty[2]; + rgba_u ncc_lookup[2][2][256]; + int ncc_dirty[2]; - thread_t *fifo_thread; - thread_t *render_thread[4]; - event_t *wake_fifo_thread; - event_t *wake_main_thread; - event_t *fifo_not_full_event; - event_t *render_not_full_event[4]; - event_t *wake_render_thread[4]; + thread_t *fifo_thread; + thread_t *render_thread[4]; + event_t *wake_fifo_thread; + event_t *wake_main_thread; + event_t *fifo_not_full_event; + event_t *render_not_full_event[4]; + event_t *wake_render_thread[4]; - int voodoo_busy; - int render_voodoo_busy[4]; + int voodoo_busy; + int render_voodoo_busy[4]; - int render_threads; - int odd_even_mask; + int render_threads; + int odd_even_mask; - int pixel_count[4], texel_count[4], tri_count, frame_count; - int pixel_count_old[4], texel_count_old[4]; - int wr_count, rd_count, tex_count; + int pixel_count[4], texel_count[4], tri_count, frame_count; + int pixel_count_old[4], texel_count_old[4]; + int wr_count, rd_count, tex_count; - int retrace_count; - int swap_interval; - uint32_t swap_offset; - int swap_pending; + int retrace_count; + int swap_interval; + uint32_t swap_offset; + int swap_pending; - int bilinear_enabled; - int dithersub_enabled; + int bilinear_enabled; + int dithersub_enabled; - int fb_size; - uint32_t fb_mask; + int fb_size; + uint32_t fb_mask; - int texture_size; - uint32_t texture_mask; + int texture_size; + uint32_t texture_mask; - int dual_tmus; - int type; - - fifo_entry_t fifo[FIFO_SIZE]; - volatile int fifo_read_idx, fifo_write_idx; - volatile int cmd_read, cmd_written, cmd_written_fifo; - - voodoo_params_t params_buffer[PARAM_SIZE]; - volatile int params_read_idx[4], params_write_idx; - - uint32_t cmdfifo_base, cmdfifo_end, cmdfifo_size; - int cmdfifo_rp, cmdfifo_ret_addr; - int cmdfifo_in_sub; - volatile int cmdfifo_depth_rd, cmdfifo_depth_wr; - volatile int cmdfifo_enabled; - uint32_t cmdfifo_amin, cmdfifo_amax; - int cmdfifo_holecount; - - uint32_t sSetupMode; - vert_t verts[4]; - unsigned int vertex_ages[3]; - unsigned int vertex_next_age; - int num_verticies; - int cull_pingpong; - - int flush; - - int scrfilter; - int scrfilterEnabled; - int scrfilterThreshold; - int scrfilterThresholdOld; - - uint32_t last_write_addr; - - uint32_t fbiPixelsIn; - uint32_t fbiChromaFail; - uint32_t fbiZFuncFail; - uint32_t fbiAFuncFail; - uint32_t fbiPixelsOut; - - uint32_t bltSrcBaseAddr; - uint32_t bltDstBaseAddr; - int bltSrcXYStride, bltDstXYStride; - uint32_t bltSrcChromaRange, bltDstChromaRange; - int bltSrcChromaMinR, bltSrcChromaMinG, bltSrcChromaMinB; - int bltSrcChromaMaxR, bltSrcChromaMaxG, bltSrcChromaMaxB; - int bltDstChromaMinR, bltDstChromaMinG, bltDstChromaMinB; - int bltDstChromaMaxR, bltDstChromaMaxG, bltDstChromaMaxB; - - int bltClipRight, bltClipLeft; - int bltClipHighY, bltClipLowY; - - int bltSrcX, bltSrcY; - int bltDstX, bltDstY; - int bltSizeX, bltSizeY; - int bltRop[4]; - uint16_t bltColorFg, bltColorBg; - - uint32_t bltCommand; - - uint32_t leftOverlayBuf; - - struct - { - int dst_x, dst_y; - int cur_x; - int size_x, size_y; - int x_dir, y_dir; - int dst_stride; - } blt; - - struct - { - uint32_t bresError0, bresError1; - uint32_t clip0Min, clip0Max; - uint32_t clip1Min, clip1Max; - uint32_t colorBack, colorFore; - uint32_t command, commandExtra; - uint32_t dstBaseAddr; - uint32_t dstFormat; - uint32_t dstSize; - uint32_t dstXY; - uint32_t lineStipple; - uint32_t lineStyle; - uint32_t rop; - uint32_t srcBaseAddr; - uint32_t srcFormat; - uint32_t srcSize; - uint32_t srcXY; - - uint32_t colorPattern[64]; - - int bres_error_0, bres_error_1; - uint32_t colorPattern8[64], colorPattern16[64], colorPattern24[64]; - int cur_x, cur_y; - uint32_t dstBaseAddr_tiled; - uint32_t dstColorkeyMin, dstColorkeyMax; - int dstSizeX, dstSizeY; - int dstX, dstY; - int dst_stride; - int patoff_x, patoff_y; - uint8_t rops[4]; - uint32_t srcBaseAddr_tiled; - uint32_t srcColorkeyMin, srcColorkeyMax; - int srcSizeX, srcSizeY; - int srcX, srcY; - int src_stride; - int old_srcX; - - /*Used for handling packed 24bpp host data*/ - int host_data_remainder; - uint32_t old_host_data; - - /*Polyfill coordinates*/ - int lx[2], rx[2]; - int ly[2], ry[2]; - - /*Polyfill state*/ - int error[2]; - int dx[2], dy[2]; - int x_inc[2]; /*y_inc is always 1 for polyfill*/ - int lx_cur, rx_cur; - - clip_t clip[2]; - - uint8_t host_data[16384]; - int host_data_count; - int host_data_size_src, host_data_size_dest; - int src_stride_src, src_stride_dest; - - int src_bpp; - - int line_pix_pos, line_bit_pos; - int line_rep_cnt, line_bit_mask_size; - } banshee_blt; - - struct - { - uint32_t vidOverlayStartCoords; - uint32_t vidOverlayEndScreenCoords; - uint32_t vidOverlayDudx, vidOverlayDudxOffsetSrcWidth; - uint32_t vidOverlayDvdy, vidOverlayDvdyOffset; - //uint32_t vidDesktopOverlayStride; - - int start_x, start_y; - int end_x, end_y; - int size_x, size_y; - int overlay_bytes; - - unsigned int src_y; - } overlay; - - rgbvoodoo_t clutData[33]; - int clutData_dirty; - rgbvoodoo_t clutData256[256]; - uint32_t video_16to32[0x10000]; - - uint8_t dirty_line[2048]; - int dirty_line_low, dirty_line_high; - - int fb_write_buffer, fb_draw_buffer; - int buffer_cutoff; - - uint32_t tile_base, tile_stride; - int tile_stride_shift, tile_x, tile_x_real; - - int y_origin_swap; - - int read_time, write_time, burst_time; - - pc_timer_t wake_timer; - - /* screen filter tables */ - uint8_t thefilter[256][256]; - uint8_t thefilterg[256][256]; - uint8_t thefilterb[256][256]; - uint16_t purpleline[256][3]; - - texture_t texture_cache[2][TEX_CACHE_MAX]; - uint8_t texture_present[2][16384]; - int texture_last_removed; - - uint32_t palette_checksum[2]; - int palette_dirty[2]; + int dual_tmus; + int type; + + fifo_entry_t fifo[FIFO_SIZE]; + volatile int fifo_read_idx, fifo_write_idx; + volatile int cmd_read, cmd_written, cmd_written_fifo; + + voodoo_params_t params_buffer[PARAM_SIZE]; + volatile int params_read_idx[4], params_write_idx; + + uint32_t cmdfifo_base, cmdfifo_end, cmdfifo_size; + int cmdfifo_rp, cmdfifo_ret_addr; + int cmdfifo_in_sub; + volatile int cmdfifo_depth_rd, cmdfifo_depth_wr; + volatile int cmdfifo_enabled; + uint32_t cmdfifo_amin, cmdfifo_amax; + int cmdfifo_holecount; + + uint32_t sSetupMode; + vert_t verts[4]; + unsigned int vertex_ages[3]; + unsigned int vertex_next_age; + int num_verticies; + int cull_pingpong; + + int flush; + + int scrfilter; + int scrfilterEnabled; + int scrfilterThreshold; + int scrfilterThresholdOld; + + uint32_t last_write_addr; + + uint32_t fbiPixelsIn; + uint32_t fbiChromaFail; + uint32_t fbiZFuncFail; + uint32_t fbiAFuncFail; + uint32_t fbiPixelsOut; + + uint32_t bltSrcBaseAddr; + uint32_t bltDstBaseAddr; + int bltSrcXYStride, bltDstXYStride; + uint32_t bltSrcChromaRange, bltDstChromaRange; + int bltSrcChromaMinR, bltSrcChromaMinG, bltSrcChromaMinB; + int bltSrcChromaMaxR, bltSrcChromaMaxG, bltSrcChromaMaxB; + int bltDstChromaMinR, bltDstChromaMinG, bltDstChromaMinB; + int bltDstChromaMaxR, bltDstChromaMaxG, bltDstChromaMaxB; + + int bltClipRight, bltClipLeft; + int bltClipHighY, bltClipLowY; + + int bltSrcX, bltSrcY; + int bltDstX, bltDstY; + int bltSizeX, bltSizeY; + int bltRop[4]; + uint16_t bltColorFg, bltColorBg; + + uint32_t bltCommand; + + uint32_t leftOverlayBuf; + + struct + { + int dst_x, dst_y; + int cur_x; + int size_x, size_y; + int x_dir, y_dir; + int dst_stride; + } blt; + + struct + { + uint32_t bresError0, bresError1; + uint32_t clip0Min, clip0Max; + uint32_t clip1Min, clip1Max; + uint32_t colorBack, colorFore; + uint32_t command, commandExtra; + uint32_t dstBaseAddr; + uint32_t dstFormat; + uint32_t dstSize; + uint32_t dstXY; + uint32_t lineStipple; + uint32_t lineStyle; + uint32_t rop; + uint32_t srcBaseAddr; + uint32_t srcFormat; + uint32_t srcSize; + uint32_t srcXY; + + uint32_t colorPattern[64]; + + int bres_error_0, bres_error_1; + uint32_t colorPattern8[64], colorPattern16[64], colorPattern24[64]; + int cur_x, cur_y; + uint32_t dstBaseAddr_tiled; + uint32_t dstColorkeyMin, dstColorkeyMax; + int dstSizeX, dstSizeY; + int dstX, dstY; + int dst_stride; + int patoff_x, patoff_y; + uint8_t rops[4]; + uint32_t srcBaseAddr_tiled; + uint32_t srcColorkeyMin, srcColorkeyMax; + int srcSizeX, srcSizeY; + int srcX, srcY; + int src_stride; + int old_srcX; + + /*Used for handling packed 24bpp host data*/ + int host_data_remainder; + uint32_t old_host_data; + + /*Polyfill coordinates*/ + int lx[2], rx[2]; + int ly[2], ry[2]; + + /*Polyfill state*/ + int error[2]; + int dx[2], dy[2]; + int x_inc[2]; /*y_inc is always 1 for polyfill*/ + int lx_cur, rx_cur; + + clip_t clip[2]; + + uint8_t host_data[16384]; + int host_data_count; + int host_data_size_src, host_data_size_dest; + int src_stride_src, src_stride_dest; + + int src_bpp; + + int line_pix_pos, line_bit_pos; + int line_rep_cnt, line_bit_mask_size; + } banshee_blt; + + struct + { + uint32_t vidOverlayStartCoords; + uint32_t vidOverlayEndScreenCoords; + uint32_t vidOverlayDudx, vidOverlayDudxOffsetSrcWidth; + uint32_t vidOverlayDvdy, vidOverlayDvdyOffset; + // uint32_t vidDesktopOverlayStride; + + int start_x, start_y; + int end_x, end_y; + int size_x, size_y; + int overlay_bytes; + + unsigned int src_y; + } overlay; + + rgbvoodoo_t clutData[33]; + int clutData_dirty; + rgbvoodoo_t clutData256[256]; + uint32_t video_16to32[0x10000]; + + uint8_t dirty_line[2048]; + int dirty_line_low, dirty_line_high; + + int fb_write_buffer, fb_draw_buffer; + int buffer_cutoff; + + uint32_t tile_base, tile_stride; + int tile_stride_shift, tile_x, tile_x_real; + + int y_origin_swap; + + int read_time, write_time, burst_time; + + pc_timer_t wake_timer; + + /* screen filter tables */ + uint8_t thefilter[256][256]; + uint8_t thefilterg[256][256]; + uint8_t thefilterb[256][256]; + uint16_t purpleline[256][3]; + + texture_t texture_cache[2][TEX_CACHE_MAX]; + uint8_t texture_present[2][16384]; + int texture_last_removed; + + uint32_t palette_checksum[2]; + int palette_dirty[2]; - uint64_t time; - int render_time[4]; + uint64_t time; + int render_time[4]; - int force_blit_count; - int can_blit; - mutex_t* force_blit_mutex; + int force_blit_count; + int can_blit; + mutex_t *force_blit_mutex; - int use_recompiler; - void *codegen_data; + int use_recompiler; + void *codegen_data; - struct voodoo_set_t *set; + struct voodoo_set_t *set; - uint8_t fifo_thread_run, render_thread_run[4]; + uint8_t fifo_thread_run, render_thread_run[4]; - uint8_t *vram, *changedvram; + uint8_t *vram, *changedvram; - void *p; + void *p; } voodoo_t; -typedef struct voodoo_set_t -{ - voodoo_t *voodoos[2]; +typedef struct voodoo_set_t { + voodoo_t *voodoos[2]; - mem_mapping_t snoop_mapping; + mem_mapping_t snoop_mapping; - int nr_cards; + int nr_cards; } voodoo_set_t; - extern rgba8_t rgb332[0x100], ai44[0x100], rgb565[0x10000], argb1555[0x10000], argb4444[0x10000], ai88[0x10000]; - void voodoo_generate_vb_filters(voodoo_t *voodoo, int fcr, int fcg); void voodoo_recalc(voodoo_t *voodoo); void voodoo_update_ncc(voodoo_t *voodoo, int tmu); void *voodoo_2d3d_card_init(int type); -void voodoo_card_close(voodoo_t *voodoo); +void voodoo_card_close(voodoo_t *voodoo); #endif /*VIDEO_VOODOO_COMMON_H*/ diff --git a/src/include/86box/vid_voodoo_display.h b/src/include/86box/vid_voodoo_display.h index 522584e3f..e415f7824 100644 --- a/src/include/86box/vid_voodoo_display.h +++ b/src/include/86box/vid_voodoo_display.h @@ -17,7 +17,7 @@ */ #ifndef VIDEO_VOODOO_DISPLAY_H -# define VIDEO_VOODOO_DISPLAY_H +#define VIDEO_VOODOO_DISPLAY_H void voodoo_update_ncc(voodoo_t *voodoo, int tmu); void voodoo_pixelclock_update(voodoo_t *voodoo); diff --git a/src/include/86box/vid_voodoo_fb.h b/src/include/86box/vid_voodoo_fb.h index 6acf624aa..374474cc5 100644 --- a/src/include/86box/vid_voodoo_fb.h +++ b/src/include/86box/vid_voodoo_fb.h @@ -17,11 +17,11 @@ */ #ifndef VIDEO_VOODOO_FB_H -# define VIDEO_VOODOO_FB_H +#define VIDEO_VOODOO_FB_H uint16_t voodoo_fb_readw(uint32_t addr, void *p); uint32_t voodoo_fb_readl(uint32_t addr, void *p); -void voodoo_fb_writew(uint32_t addr, uint16_t val, void *p); -void voodoo_fb_writel(uint32_t addr, uint32_t val, void *p); +void voodoo_fb_writew(uint32_t addr, uint16_t val, void *p); +void voodoo_fb_writel(uint32_t addr, uint32_t val, void *p); #endif /*VIDEO_VOODOO_FB_H*/ diff --git a/src/include/86box/vid_voodoo_fifo.h b/src/include/86box/vid_voodoo_fifo.h index 54b6567e8..86956cc5a 100644 --- a/src/include/86box/vid_voodoo_fifo.h +++ b/src/include/86box/vid_voodoo_fifo.h @@ -17,7 +17,7 @@ */ #ifndef VIDEO_VOODOO_FIFO_H -# define VIDEO_VOODOO_FIFO_H +#define VIDEO_VOODOO_FIFO_H void voodoo_wake_fifo_thread(voodoo_t *voodoo); void voodoo_wake_fifo_thread_now(voodoo_t *voodoo); diff --git a/src/include/86box/vid_voodoo_reg.h b/src/include/86box/vid_voodoo_reg.h index c535c7a18..13f7ae932 100644 --- a/src/include/86box/vid_voodoo_reg.h +++ b/src/include/86box/vid_voodoo_reg.h @@ -17,7 +17,7 @@ */ #ifndef VIDEO_VOODOO_REG_H -# define VIDEO_VOODOO_REG_H +#define VIDEO_VOODOO_REG_H void voodoo_reg_writel(uint32_t addr, uint32_t val, void *p); diff --git a/src/include/86box/vid_voodoo_regs.h b/src/include/86box/vid_voodoo_regs.h index 2f488fabd..f05029a8d 100644 --- a/src/include/86box/vid_voodoo_regs.h +++ b/src/include/86box/vid_voodoo_regs.h @@ -1,698 +1,660 @@ #ifndef VIDEO_VOODOO_REGS_H -# define VIDEO_VOODOO_REGS_H +#define VIDEO_VOODOO_REGS_H -enum -{ - SST_status = 0x000, - SST_intrCtrl = 0x004, +enum { + SST_status = 0x000, + SST_intrCtrl = 0x004, - SST_vertexAx = 0x008, - SST_vertexAy = 0x00c, - SST_vertexBx = 0x010, - SST_vertexBy = 0x014, - SST_vertexCx = 0x018, - SST_vertexCy = 0x01c, + SST_vertexAx = 0x008, + SST_vertexAy = 0x00c, + SST_vertexBx = 0x010, + SST_vertexBy = 0x014, + SST_vertexCx = 0x018, + SST_vertexCy = 0x01c, - SST_startR = 0x0020, - SST_startG = 0x0024, - SST_startB = 0x0028, - SST_startZ = 0x002c, - SST_startA = 0x0030, - SST_startS = 0x0034, - SST_startT = 0x0038, - SST_startW = 0x003c, + SST_startR = 0x0020, + SST_startG = 0x0024, + SST_startB = 0x0028, + SST_startZ = 0x002c, + SST_startA = 0x0030, + SST_startS = 0x0034, + SST_startT = 0x0038, + SST_startW = 0x003c, - SST_dRdX = 0x0040, - SST_dGdX = 0x0044, - SST_dBdX = 0x0048, - SST_dZdX = 0x004c, - SST_dAdX = 0x0050, - SST_dSdX = 0x0054, - SST_dTdX = 0x0058, - SST_dWdX = 0x005c, + SST_dRdX = 0x0040, + SST_dGdX = 0x0044, + SST_dBdX = 0x0048, + SST_dZdX = 0x004c, + SST_dAdX = 0x0050, + SST_dSdX = 0x0054, + SST_dTdX = 0x0058, + SST_dWdX = 0x005c, - SST_dRdY = 0x0060, - SST_dGdY = 0x0064, - SST_dBdY = 0x0068, - SST_dZdY = 0x006c, - SST_dAdY = 0x0070, - SST_dSdY = 0x0074, - SST_dTdY = 0x0078, - SST_dWdY = 0x007c, + SST_dRdY = 0x0060, + SST_dGdY = 0x0064, + SST_dBdY = 0x0068, + SST_dZdY = 0x006c, + SST_dAdY = 0x0070, + SST_dSdY = 0x0074, + SST_dTdY = 0x0078, + SST_dWdY = 0x007c, - SST_triangleCMD = 0x0080, + SST_triangleCMD = 0x0080, - SST_fvertexAx = 0x088, - SST_fvertexAy = 0x08c, - SST_fvertexBx = 0x090, - SST_fvertexBy = 0x094, - SST_fvertexCx = 0x098, - SST_fvertexCy = 0x09c, + SST_fvertexAx = 0x088, + SST_fvertexAy = 0x08c, + SST_fvertexBx = 0x090, + SST_fvertexBy = 0x094, + SST_fvertexCx = 0x098, + SST_fvertexCy = 0x09c, - SST_fstartR = 0x00a0, - SST_fstartG = 0x00a4, - SST_fstartB = 0x00a8, - SST_fstartZ = 0x00ac, - SST_fstartA = 0x00b0, - SST_fstartS = 0x00b4, - SST_fstartT = 0x00b8, - SST_fstartW = 0x00bc, + SST_fstartR = 0x00a0, + SST_fstartG = 0x00a4, + SST_fstartB = 0x00a8, + SST_fstartZ = 0x00ac, + SST_fstartA = 0x00b0, + SST_fstartS = 0x00b4, + SST_fstartT = 0x00b8, + SST_fstartW = 0x00bc, - SST_fdRdX = 0x00c0, - SST_fdGdX = 0x00c4, - SST_fdBdX = 0x00c8, - SST_fdZdX = 0x00cc, - SST_fdAdX = 0x00d0, - SST_fdSdX = 0x00d4, - SST_fdTdX = 0x00d8, - SST_fdWdX = 0x00dc, + SST_fdRdX = 0x00c0, + SST_fdGdX = 0x00c4, + SST_fdBdX = 0x00c8, + SST_fdZdX = 0x00cc, + SST_fdAdX = 0x00d0, + SST_fdSdX = 0x00d4, + SST_fdTdX = 0x00d8, + SST_fdWdX = 0x00dc, - SST_fdRdY = 0x00e0, - SST_fdGdY = 0x00e4, - SST_fdBdY = 0x00e8, - SST_fdZdY = 0x00ec, - SST_fdAdY = 0x00f0, - SST_fdSdY = 0x00f4, - SST_fdTdY = 0x00f8, - SST_fdWdY = 0x00fc, + SST_fdRdY = 0x00e0, + SST_fdGdY = 0x00e4, + SST_fdBdY = 0x00e8, + SST_fdZdY = 0x00ec, + SST_fdAdY = 0x00f0, + SST_fdSdY = 0x00f4, + SST_fdTdY = 0x00f8, + SST_fdWdY = 0x00fc, - SST_ftriangleCMD = 0x0100, + SST_ftriangleCMD = 0x0100, - SST_fbzColorPath = 0x104, - SST_fogMode = 0x108, + SST_fbzColorPath = 0x104, + SST_fogMode = 0x108, - SST_alphaMode = 0x10c, - SST_fbzMode = 0x110, - SST_lfbMode = 0x114, + SST_alphaMode = 0x10c, + SST_fbzMode = 0x110, + SST_lfbMode = 0x114, - SST_clipLeftRight = 0x118, - SST_clipLowYHighY = 0x11c, + SST_clipLeftRight = 0x118, + SST_clipLowYHighY = 0x11c, - SST_nopCMD = 0x120, - SST_fastfillCMD = 0x124, - SST_swapbufferCMD = 0x128, + SST_nopCMD = 0x120, + SST_fastfillCMD = 0x124, + SST_swapbufferCMD = 0x128, - SST_fogColor = 0x12c, - SST_zaColor = 0x130, - SST_chromaKey = 0x134, + SST_fogColor = 0x12c, + SST_zaColor = 0x130, + SST_chromaKey = 0x134, - SST_userIntrCMD = 0x13c, - SST_stipple = 0x140, - SST_color0 = 0x144, - SST_color1 = 0x148, + SST_userIntrCMD = 0x13c, + SST_stipple = 0x140, + SST_color0 = 0x144, + SST_color1 = 0x148, - SST_fbiPixelsIn = 0x14c, - SST_fbiChromaFail = 0x150, - SST_fbiZFuncFail = 0x154, - SST_fbiAFuncFail = 0x158, - SST_fbiPixelsOut = 0x15c, + SST_fbiPixelsIn = 0x14c, + SST_fbiChromaFail = 0x150, + SST_fbiZFuncFail = 0x154, + SST_fbiAFuncFail = 0x158, + SST_fbiPixelsOut = 0x15c, - SST_fogTable00 = 0x160, - SST_fogTable01 = 0x164, - SST_fogTable02 = 0x168, - SST_fogTable03 = 0x16c, - SST_fogTable04 = 0x170, - SST_fogTable05 = 0x174, - SST_fogTable06 = 0x178, - SST_fogTable07 = 0x17c, - SST_fogTable08 = 0x180, - SST_fogTable09 = 0x184, - SST_fogTable0a = 0x188, - SST_fogTable0b = 0x18c, - SST_fogTable0c = 0x190, - SST_fogTable0d = 0x194, - SST_fogTable0e = 0x198, - SST_fogTable0f = 0x19c, - SST_fogTable10 = 0x1a0, - SST_fogTable11 = 0x1a4, - SST_fogTable12 = 0x1a8, - SST_fogTable13 = 0x1ac, - SST_fogTable14 = 0x1b0, - SST_fogTable15 = 0x1b4, - SST_fogTable16 = 0x1b8, - SST_fogTable17 = 0x1bc, - SST_fogTable18 = 0x1c0, - SST_fogTable19 = 0x1c4, - SST_fogTable1a = 0x1c8, - SST_fogTable1b = 0x1cc, - SST_fogTable1c = 0x1d0, - SST_fogTable1d = 0x1d4, - SST_fogTable1e = 0x1d8, - SST_fogTable1f = 0x1dc, + SST_fogTable00 = 0x160, + SST_fogTable01 = 0x164, + SST_fogTable02 = 0x168, + SST_fogTable03 = 0x16c, + SST_fogTable04 = 0x170, + SST_fogTable05 = 0x174, + SST_fogTable06 = 0x178, + SST_fogTable07 = 0x17c, + SST_fogTable08 = 0x180, + SST_fogTable09 = 0x184, + SST_fogTable0a = 0x188, + SST_fogTable0b = 0x18c, + SST_fogTable0c = 0x190, + SST_fogTable0d = 0x194, + SST_fogTable0e = 0x198, + SST_fogTable0f = 0x19c, + SST_fogTable10 = 0x1a0, + SST_fogTable11 = 0x1a4, + SST_fogTable12 = 0x1a8, + SST_fogTable13 = 0x1ac, + SST_fogTable14 = 0x1b0, + SST_fogTable15 = 0x1b4, + SST_fogTable16 = 0x1b8, + SST_fogTable17 = 0x1bc, + SST_fogTable18 = 0x1c0, + SST_fogTable19 = 0x1c4, + SST_fogTable1a = 0x1c8, + SST_fogTable1b = 0x1cc, + SST_fogTable1c = 0x1d0, + SST_fogTable1d = 0x1d4, + SST_fogTable1e = 0x1d8, + SST_fogTable1f = 0x1dc, - SST_cmdFifoBaseAddr = 0x1e0, - SST_cmdFifoBump = 0x1e4, - SST_cmdFifoRdPtr = 0x1e8, - SST_cmdFifoAMin = 0x1ec, - SST_cmdFifoAMax = 0x1f0, - SST_cmdFifoDepth = 0x1f4, - SST_cmdFifoHoles = 0x1f8, + SST_cmdFifoBaseAddr = 0x1e0, + SST_cmdFifoBump = 0x1e4, + SST_cmdFifoRdPtr = 0x1e8, + SST_cmdFifoAMin = 0x1ec, + SST_cmdFifoAMax = 0x1f0, + SST_cmdFifoDepth = 0x1f4, + SST_cmdFifoHoles = 0x1f8, - SST_colBufferAddr = 0x1ec, /*Banshee*/ - SST_colBufferStride = 0x1f0, /*Banshee*/ - SST_auxBufferAddr = 0x1f4, /*Banshee*/ - SST_auxBufferStride = 0x1f8, /*Banshee*/ + SST_colBufferAddr = 0x1ec, /*Banshee*/ + SST_colBufferStride = 0x1f0, /*Banshee*/ + SST_auxBufferAddr = 0x1f4, /*Banshee*/ + SST_auxBufferStride = 0x1f8, /*Banshee*/ - SST_clipLeftRight1 = 0x200, /*Banshee*/ - SST_clipTopBottom1 = 0x204, /*Banshee*/ + SST_clipLeftRight1 = 0x200, /*Banshee*/ + SST_clipTopBottom1 = 0x204, /*Banshee*/ - SST_fbiInit4 = 0x200, - SST_vRetrace = 0x204, - SST_backPorch = 0x208, - SST_videoDimensions = 0x20c, - SST_fbiInit0 = 0x210, - SST_fbiInit1 = 0x214, - SST_fbiInit2 = 0x218, - SST_fbiInit3 = 0x21c, - SST_hSync = 0x220, - SST_vSync = 0x224, - SST_clutData = 0x228, - SST_dacData = 0x22c, + SST_fbiInit4 = 0x200, + SST_vRetrace = 0x204, + SST_backPorch = 0x208, + SST_videoDimensions = 0x20c, + SST_fbiInit0 = 0x210, + SST_fbiInit1 = 0x214, + SST_fbiInit2 = 0x218, + SST_fbiInit3 = 0x21c, + SST_hSync = 0x220, + SST_vSync = 0x224, + SST_clutData = 0x228, + SST_dacData = 0x22c, - SST_scrFilter = 0x230, + SST_scrFilter = 0x230, - SST_hvRetrace = 0x240, - SST_fbiInit5 = 0x244, - SST_fbiInit6 = 0x248, - SST_fbiInit7 = 0x24c, + SST_hvRetrace = 0x240, + SST_fbiInit5 = 0x244, + SST_fbiInit6 = 0x248, + SST_fbiInit7 = 0x24c, - SST_swapPending = 0x24c, /*Banshee*/ - SST_leftOverlayBuf = 0x250, /*Banshee*/ + SST_swapPending = 0x24c, /*Banshee*/ + SST_leftOverlayBuf = 0x250, /*Banshee*/ - SST_sSetupMode = 0x260, - SST_sVx = 0x264, - SST_sVy = 0x268, - SST_sARGB = 0x26c, - SST_sRed = 0x270, - SST_sGreen = 0x274, - SST_sBlue = 0x278, - SST_sAlpha = 0x27c, - SST_sVz = 0x280, - SST_sWb = 0x284, - SST_sW0 = 0x288, - SST_sS0 = 0x28c, - SST_sT0 = 0x290, - SST_sW1 = 0x294, - SST_sS1 = 0x298, - SST_sT1 = 0x29c, + SST_sSetupMode = 0x260, + SST_sVx = 0x264, + SST_sVy = 0x268, + SST_sARGB = 0x26c, + SST_sRed = 0x270, + SST_sGreen = 0x274, + SST_sBlue = 0x278, + SST_sAlpha = 0x27c, + SST_sVz = 0x280, + SST_sWb = 0x284, + SST_sW0 = 0x288, + SST_sS0 = 0x28c, + SST_sT0 = 0x290, + SST_sW1 = 0x294, + SST_sS1 = 0x298, + SST_sT1 = 0x29c, - SST_sDrawTriCMD = 0x2a0, - SST_sBeginTriCMD = 0x2a4, + SST_sDrawTriCMD = 0x2a0, + SST_sBeginTriCMD = 0x2a4, - SST_bltSrcBaseAddr = 0x2c0, - SST_bltDstBaseAddr = 0x2c4, - SST_bltXYStrides = 0x2c8, - SST_bltSrcChromaRange = 0x2cc, - SST_bltDstChromaRange = 0x2d0, - SST_bltClipX = 0x2d4, - SST_bltClipY = 0x2d8, + SST_bltSrcBaseAddr = 0x2c0, + SST_bltDstBaseAddr = 0x2c4, + SST_bltXYStrides = 0x2c8, + SST_bltSrcChromaRange = 0x2cc, + SST_bltDstChromaRange = 0x2d0, + SST_bltClipX = 0x2d4, + SST_bltClipY = 0x2d8, - SST_bltSrcXY = 0x2e0, - SST_bltDstXY = 0x2e4, - SST_bltSize = 0x2e8, - SST_bltRop = 0x2ec, - SST_bltColor = 0x2f0, + SST_bltSrcXY = 0x2e0, + SST_bltDstXY = 0x2e4, + SST_bltSize = 0x2e8, + SST_bltRop = 0x2ec, + SST_bltColor = 0x2f0, - SST_bltCommand = 0x2f8, - SST_bltData = 0x2fc, + SST_bltCommand = 0x2f8, + SST_bltData = 0x2fc, - SST_textureMode = 0x300, - SST_tLOD = 0x304, - SST_tDetail = 0x308, - SST_texBaseAddr = 0x30c, - SST_texBaseAddr1 = 0x310, - SST_texBaseAddr2 = 0x314, - SST_texBaseAddr38 = 0x318, + SST_textureMode = 0x300, + SST_tLOD = 0x304, + SST_tDetail = 0x308, + SST_texBaseAddr = 0x30c, + SST_texBaseAddr1 = 0x310, + SST_texBaseAddr2 = 0x314, + SST_texBaseAddr38 = 0x318, - SST_trexInit1 = 0x320, + SST_trexInit1 = 0x320, - SST_nccTable0_Y0 = 0x324, - SST_nccTable0_Y1 = 0x328, - SST_nccTable0_Y2 = 0x32c, - SST_nccTable0_Y3 = 0x330, - SST_nccTable0_I0 = 0x334, - SST_nccTable0_I1 = 0x338, - SST_nccTable0_I2 = 0x33c, - SST_nccTable0_I3 = 0x340, - SST_nccTable0_Q0 = 0x344, - SST_nccTable0_Q1 = 0x348, - SST_nccTable0_Q2 = 0x34c, - SST_nccTable0_Q3 = 0x350, + SST_nccTable0_Y0 = 0x324, + SST_nccTable0_Y1 = 0x328, + SST_nccTable0_Y2 = 0x32c, + SST_nccTable0_Y3 = 0x330, + SST_nccTable0_I0 = 0x334, + SST_nccTable0_I1 = 0x338, + SST_nccTable0_I2 = 0x33c, + SST_nccTable0_I3 = 0x340, + SST_nccTable0_Q0 = 0x344, + SST_nccTable0_Q1 = 0x348, + SST_nccTable0_Q2 = 0x34c, + SST_nccTable0_Q3 = 0x350, - SST_nccTable1_Y0 = 0x354, - SST_nccTable1_Y1 = 0x358, - SST_nccTable1_Y2 = 0x35c, - SST_nccTable1_Y3 = 0x360, - SST_nccTable1_I0 = 0x364, - SST_nccTable1_I1 = 0x368, - SST_nccTable1_I2 = 0x36c, - SST_nccTable1_I3 = 0x370, - SST_nccTable1_Q0 = 0x374, - SST_nccTable1_Q1 = 0x378, - SST_nccTable1_Q2 = 0x37c, - SST_nccTable1_Q3 = 0x380, + SST_nccTable1_Y0 = 0x354, + SST_nccTable1_Y1 = 0x358, + SST_nccTable1_Y2 = 0x35c, + SST_nccTable1_Y3 = 0x360, + SST_nccTable1_I0 = 0x364, + SST_nccTable1_I1 = 0x368, + SST_nccTable1_I2 = 0x36c, + SST_nccTable1_I3 = 0x370, + SST_nccTable1_Q0 = 0x374, + SST_nccTable1_Q1 = 0x378, + SST_nccTable1_Q2 = 0x37c, + SST_nccTable1_Q3 = 0x380, - SST_remap_status = 0x000 | 0x400, + SST_remap_status = 0x000 | 0x400, - SST_remap_vertexAx = 0x008 | 0x400, - SST_remap_vertexAy = 0x00c | 0x400, - SST_remap_vertexBx = 0x010 | 0x400, - SST_remap_vertexBy = 0x014 | 0x400, - SST_remap_vertexCx = 0x018 | 0x400, - SST_remap_vertexCy = 0x01c | 0x400, + SST_remap_vertexAx = 0x008 | 0x400, + SST_remap_vertexAy = 0x00c | 0x400, + SST_remap_vertexBx = 0x010 | 0x400, + SST_remap_vertexBy = 0x014 | 0x400, + SST_remap_vertexCx = 0x018 | 0x400, + SST_remap_vertexCy = 0x01c | 0x400, - SST_remap_startR = 0x0020 | 0x400, - SST_remap_startG = 0x002c | 0x400, - SST_remap_startB = 0x0038 | 0x400, - SST_remap_startZ = 0x0044 | 0x400, - SST_remap_startA = 0x0050 | 0x400, - SST_remap_startS = 0x005c | 0x400, - SST_remap_startT = 0x0068 | 0x400, - SST_remap_startW = 0x0074 | 0x400, + SST_remap_startR = 0x0020 | 0x400, + SST_remap_startG = 0x002c | 0x400, + SST_remap_startB = 0x0038 | 0x400, + SST_remap_startZ = 0x0044 | 0x400, + SST_remap_startA = 0x0050 | 0x400, + SST_remap_startS = 0x005c | 0x400, + SST_remap_startT = 0x0068 | 0x400, + SST_remap_startW = 0x0074 | 0x400, - SST_remap_dRdX = 0x0024 | 0x400, - SST_remap_dGdX = 0x0030 | 0x400, - SST_remap_dBdX = 0x003c | 0x400, - SST_remap_dZdX = 0x0048 | 0x400, - SST_remap_dAdX = 0x0054 | 0x400, - SST_remap_dSdX = 0x0060 | 0x400, - SST_remap_dTdX = 0x006c | 0x400, - SST_remap_dWdX = 0x0078 | 0x400, + SST_remap_dRdX = 0x0024 | 0x400, + SST_remap_dGdX = 0x0030 | 0x400, + SST_remap_dBdX = 0x003c | 0x400, + SST_remap_dZdX = 0x0048 | 0x400, + SST_remap_dAdX = 0x0054 | 0x400, + SST_remap_dSdX = 0x0060 | 0x400, + SST_remap_dTdX = 0x006c | 0x400, + SST_remap_dWdX = 0x0078 | 0x400, - SST_remap_dRdY = 0x0028 | 0x400, - SST_remap_dGdY = 0x0034 | 0x400, - SST_remap_dBdY = 0x0040 | 0x400, - SST_remap_dZdY = 0x004c | 0x400, - SST_remap_dAdY = 0x0058 | 0x400, - SST_remap_dSdY = 0x0064 | 0x400, - SST_remap_dTdY = 0x0070 | 0x400, - SST_remap_dWdY = 0x007c | 0x400, + SST_remap_dRdY = 0x0028 | 0x400, + SST_remap_dGdY = 0x0034 | 0x400, + SST_remap_dBdY = 0x0040 | 0x400, + SST_remap_dZdY = 0x004c | 0x400, + SST_remap_dAdY = 0x0058 | 0x400, + SST_remap_dSdY = 0x0064 | 0x400, + SST_remap_dTdY = 0x0070 | 0x400, + SST_remap_dWdY = 0x007c | 0x400, - SST_remap_triangleCMD = 0x0080 | 0x400, + SST_remap_triangleCMD = 0x0080 | 0x400, - SST_remap_fvertexAx = 0x088 | 0x400, - SST_remap_fvertexAy = 0x08c | 0x400, - SST_remap_fvertexBx = 0x090 | 0x400, - SST_remap_fvertexBy = 0x094 | 0x400, - SST_remap_fvertexCx = 0x098 | 0x400, - SST_remap_fvertexCy = 0x09c | 0x400, + SST_remap_fvertexAx = 0x088 | 0x400, + SST_remap_fvertexAy = 0x08c | 0x400, + SST_remap_fvertexBx = 0x090 | 0x400, + SST_remap_fvertexBy = 0x094 | 0x400, + SST_remap_fvertexCx = 0x098 | 0x400, + SST_remap_fvertexCy = 0x09c | 0x400, - SST_remap_fstartR = 0x00a0 | 0x400, - SST_remap_fstartG = 0x00ac | 0x400, - SST_remap_fstartB = 0x00b8 | 0x400, - SST_remap_fstartZ = 0x00c4 | 0x400, - SST_remap_fstartA = 0x00d0 | 0x400, - SST_remap_fstartS = 0x00dc | 0x400, - SST_remap_fstartT = 0x00e8 | 0x400, - SST_remap_fstartW = 0x00f4 | 0x400, + SST_remap_fstartR = 0x00a0 | 0x400, + SST_remap_fstartG = 0x00ac | 0x400, + SST_remap_fstartB = 0x00b8 | 0x400, + SST_remap_fstartZ = 0x00c4 | 0x400, + SST_remap_fstartA = 0x00d0 | 0x400, + SST_remap_fstartS = 0x00dc | 0x400, + SST_remap_fstartT = 0x00e8 | 0x400, + SST_remap_fstartW = 0x00f4 | 0x400, - SST_remap_fdRdX = 0x00a4 | 0x400, - SST_remap_fdGdX = 0x00b0 | 0x400, - SST_remap_fdBdX = 0x00bc | 0x400, - SST_remap_fdZdX = 0x00c8 | 0x400, - SST_remap_fdAdX = 0x00d4 | 0x400, - SST_remap_fdSdX = 0x00e0 | 0x400, - SST_remap_fdTdX = 0x00ec | 0x400, - SST_remap_fdWdX = 0x00f8 | 0x400, + SST_remap_fdRdX = 0x00a4 | 0x400, + SST_remap_fdGdX = 0x00b0 | 0x400, + SST_remap_fdBdX = 0x00bc | 0x400, + SST_remap_fdZdX = 0x00c8 | 0x400, + SST_remap_fdAdX = 0x00d4 | 0x400, + SST_remap_fdSdX = 0x00e0 | 0x400, + SST_remap_fdTdX = 0x00ec | 0x400, + SST_remap_fdWdX = 0x00f8 | 0x400, - SST_remap_fdRdY = 0x00a8 | 0x400, - SST_remap_fdGdY = 0x00b4 | 0x400, - SST_remap_fdBdY = 0x00c0 | 0x400, - SST_remap_fdZdY = 0x00cc | 0x400, - SST_remap_fdAdY = 0x00d8 | 0x400, - SST_remap_fdSdY = 0x00e4 | 0x400, - SST_remap_fdTdY = 0x00f0 | 0x400, - SST_remap_fdWdY = 0x00fc | 0x400, + SST_remap_fdRdY = 0x00a8 | 0x400, + SST_remap_fdGdY = 0x00b4 | 0x400, + SST_remap_fdBdY = 0x00c0 | 0x400, + SST_remap_fdZdY = 0x00cc | 0x400, + SST_remap_fdAdY = 0x00d8 | 0x400, + SST_remap_fdSdY = 0x00e4 | 0x400, + SST_remap_fdTdY = 0x00f0 | 0x400, + SST_remap_fdWdY = 0x00fc | 0x400, }; -enum -{ - LFB_WRITE_FRONT = 0x0000, - LFB_WRITE_BACK = 0x0010, - LFB_WRITE_MASK = 0x0030 +enum { + LFB_WRITE_FRONT = 0x0000, + LFB_WRITE_BACK = 0x0010, + LFB_WRITE_MASK = 0x0030 }; -enum -{ - LFB_READ_FRONT = 0x0000, - LFB_READ_BACK = 0x0040, - LFB_READ_AUX = 0x0080, - LFB_READ_MASK = 0x00c0 +enum { + LFB_READ_FRONT = 0x0000, + LFB_READ_BACK = 0x0040, + LFB_READ_AUX = 0x0080, + LFB_READ_MASK = 0x00c0 }; -enum -{ - LFB_FORMAT_RGB565 = 0, - LFB_FORMAT_RGB555 = 1, - LFB_FORMAT_ARGB1555 = 2, - LFB_FORMAT_ARGB8888 = 5, - LFB_FORMAT_DEPTH = 15, - LFB_FORMAT_MASK = 15 +enum { + LFB_FORMAT_RGB565 = 0, + LFB_FORMAT_RGB555 = 1, + LFB_FORMAT_ARGB1555 = 2, + LFB_FORMAT_ARGB8888 = 5, + LFB_FORMAT_DEPTH = 15, + LFB_FORMAT_MASK = 15 }; -enum -{ - LFB_WRITE_COLOUR = 1, - LFB_WRITE_DEPTH = 2 +enum { + LFB_WRITE_COLOUR = 1, + LFB_WRITE_DEPTH = 2 }; -enum -{ - FBZ_CHROMAKEY = (1 << 1), - FBZ_W_BUFFER = (1 << 3), - FBZ_DEPTH_ENABLE = (1 << 4), +enum { + FBZ_CHROMAKEY = (1 << 1), + FBZ_W_BUFFER = (1 << 3), + FBZ_DEPTH_ENABLE = (1 << 4), - FBZ_DITHER = (1 << 8), - FBZ_RGB_WMASK = (1 << 9), - FBZ_DEPTH_WMASK = (1 << 10), - FBZ_DITHER_2x2 = (1 << 11), + FBZ_DITHER = (1 << 8), + FBZ_RGB_WMASK = (1 << 9), + FBZ_DEPTH_WMASK = (1 << 10), + FBZ_DITHER_2x2 = (1 << 11), - FBZ_DRAW_FRONT = 0x0000, - FBZ_DRAW_BACK = 0x4000, - FBZ_DRAW_MASK = 0xc000, + FBZ_DRAW_FRONT = 0x0000, + FBZ_DRAW_BACK = 0x4000, + FBZ_DRAW_MASK = 0xc000, - FBZ_DEPTH_BIAS = (1 << 16), - FBZ_DITHER_SUB = (1 << 19), + FBZ_DEPTH_BIAS = (1 << 16), + FBZ_DITHER_SUB = (1 << 19), - FBZ_DEPTH_SOURCE = (1 << 20), + FBZ_DEPTH_SOURCE = (1 << 20), - FBZ_PARAM_ADJUST = (1 << 26) + FBZ_PARAM_ADJUST = (1 << 26) }; -enum -{ - TEX_RGB332 = 0x0, - TEX_Y4I2Q2 = 0x1, - TEX_A8 = 0x2, - TEX_I8 = 0x3, - TEX_AI8 = 0x4, - TEX_PAL8 = 0x5, - TEX_APAL8 = 0x6, - TEX_ARGB8332 = 0x8, - TEX_A8Y4I2Q2 = 0x9, - TEX_R5G6B5 = 0xa, - TEX_ARGB1555 = 0xb, - TEX_ARGB4444 = 0xc, - TEX_A8I8 = 0xd, - TEX_APAL88 = 0xe +enum { + TEX_RGB332 = 0x0, + TEX_Y4I2Q2 = 0x1, + TEX_A8 = 0x2, + TEX_I8 = 0x3, + TEX_AI8 = 0x4, + TEX_PAL8 = 0x5, + TEX_APAL8 = 0x6, + TEX_ARGB8332 = 0x8, + TEX_A8Y4I2Q2 = 0x9, + TEX_R5G6B5 = 0xa, + TEX_ARGB1555 = 0xb, + TEX_ARGB4444 = 0xc, + TEX_A8I8 = 0xd, + TEX_APAL88 = 0xe }; -enum -{ - TEXTUREMODE_NCC_SEL = (1 << 5), - TEXTUREMODE_TCLAMPS = (1 << 6), - TEXTUREMODE_TCLAMPT = (1 << 7), - TEXTUREMODE_TRILINEAR = (1 << 30) +enum { + TEXTUREMODE_NCC_SEL = (1 << 5), + TEXTUREMODE_TCLAMPS = (1 << 6), + TEXTUREMODE_TCLAMPT = (1 << 7), + TEXTUREMODE_TRILINEAR = (1 << 30) }; -enum -{ - FBIINIT0_VGA_PASS = 1, - FBIINIT0_GRAPHICS_RESET = (1 << 1) +enum { + FBIINIT0_VGA_PASS = 1, + FBIINIT0_GRAPHICS_RESET = (1 << 1) }; -enum -{ - FBIINIT1_MULTI_SST = (1 << 2), /*Voodoo Graphics only*/ - FBIINIT1_VIDEO_RESET = (1 << 8), - FBIINIT1_SLI_ENABLE = (1 << 23) +enum { + FBIINIT1_MULTI_SST = (1 << 2), /*Voodoo Graphics only*/ + FBIINIT1_VIDEO_RESET = (1 << 8), + FBIINIT1_SLI_ENABLE = (1 << 23) }; -enum -{ - FBIINIT2_SWAP_ALGORITHM_MASK = (3 << 9) +enum { + FBIINIT2_SWAP_ALGORITHM_MASK = (3 << 9) }; -enum -{ - FBIINIT2_SWAP_ALGORITHM_DAC_VSYNC = (0 << 9), - FBIINIT2_SWAP_ALGORITHM_DAC_DATA = (1 << 9), - FBIINIT2_SWAP_ALGORITHM_PCI_FIFO_STALL = (2 << 9), - FBIINIT2_SWAP_ALGORITHM_SLI_SYNC = (3 << 9) +enum { + FBIINIT2_SWAP_ALGORITHM_DAC_VSYNC = (0 << 9), + FBIINIT2_SWAP_ALGORITHM_DAC_DATA = (1 << 9), + FBIINIT2_SWAP_ALGORITHM_PCI_FIFO_STALL = (2 << 9), + FBIINIT2_SWAP_ALGORITHM_SLI_SYNC = (3 << 9) }; -enum -{ - FBIINIT3_REMAP = 1 +enum { + FBIINIT3_REMAP = 1 }; -enum -{ - FBIINIT5_MULTI_CVG = (1 << 14) +enum { + FBIINIT5_MULTI_CVG = (1 << 14) }; -enum -{ - FBIINIT7_CMDFIFO_ENABLE = (1 << 8) +enum { + FBIINIT7_CMDFIFO_ENABLE = (1 << 8) }; -enum -{ - CC_LOCALSELECT_ITER_RGB = 0, - CC_LOCALSELECT_TEX = 1, - CC_LOCALSELECT_COLOR1 = 2, - CC_LOCALSELECT_LFB = 3 +enum { + CC_LOCALSELECT_ITER_RGB = 0, + CC_LOCALSELECT_TEX = 1, + CC_LOCALSELECT_COLOR1 = 2, + CC_LOCALSELECT_LFB = 3 }; -enum -{ - CCA_LOCALSELECT_ITER_A = 0, - CCA_LOCALSELECT_COLOR0 = 1, - CCA_LOCALSELECT_ITER_Z = 2 +enum { + CCA_LOCALSELECT_ITER_A = 0, + CCA_LOCALSELECT_COLOR0 = 1, + CCA_LOCALSELECT_ITER_Z = 2 }; -enum -{ - C_SEL_ITER_RGB = 0, - C_SEL_TEX = 1, - C_SEL_COLOR1 = 2, - C_SEL_LFB = 3 +enum { + C_SEL_ITER_RGB = 0, + C_SEL_TEX = 1, + C_SEL_COLOR1 = 2, + C_SEL_LFB = 3 }; -enum -{ - A_SEL_ITER_A = 0, - A_SEL_TEX = 1, - A_SEL_COLOR1 = 2, - A_SEL_LFB = 3 +enum { + A_SEL_ITER_A = 0, + A_SEL_TEX = 1, + A_SEL_COLOR1 = 2, + A_SEL_LFB = 3 }; -enum -{ - CC_MSELECT_ZERO = 0, - CC_MSELECT_CLOCAL = 1, - CC_MSELECT_AOTHER = 2, - CC_MSELECT_ALOCAL = 3, - CC_MSELECT_TEX = 4, - CC_MSELECT_TEXRGB = 5 +enum { + CC_MSELECT_ZERO = 0, + CC_MSELECT_CLOCAL = 1, + CC_MSELECT_AOTHER = 2, + CC_MSELECT_ALOCAL = 3, + CC_MSELECT_TEX = 4, + CC_MSELECT_TEXRGB = 5 }; -enum -{ - CCA_MSELECT_ZERO = 0, - CCA_MSELECT_ALOCAL = 1, - CCA_MSELECT_AOTHER = 2, - CCA_MSELECT_ALOCAL2 = 3, - CCA_MSELECT_TEX = 4 +enum { + CCA_MSELECT_ZERO = 0, + CCA_MSELECT_ALOCAL = 1, + CCA_MSELECT_AOTHER = 2, + CCA_MSELECT_ALOCAL2 = 3, + CCA_MSELECT_TEX = 4 }; -enum -{ - TC_MSELECT_ZERO = 0, - TC_MSELECT_CLOCAL = 1, - TC_MSELECT_AOTHER = 2, - TC_MSELECT_ALOCAL = 3, - TC_MSELECT_DETAIL = 4, - TC_MSELECT_LOD_FRAC = 5 +enum { + TC_MSELECT_ZERO = 0, + TC_MSELECT_CLOCAL = 1, + TC_MSELECT_AOTHER = 2, + TC_MSELECT_ALOCAL = 3, + TC_MSELECT_DETAIL = 4, + TC_MSELECT_LOD_FRAC = 5 }; -enum -{ - TCA_MSELECT_ZERO = 0, - TCA_MSELECT_CLOCAL = 1, - TCA_MSELECT_AOTHER = 2, - TCA_MSELECT_ALOCAL = 3, - TCA_MSELECT_DETAIL = 4, - TCA_MSELECT_LOD_FRAC = 5 +enum { + TCA_MSELECT_ZERO = 0, + TCA_MSELECT_CLOCAL = 1, + TCA_MSELECT_AOTHER = 2, + TCA_MSELECT_ALOCAL = 3, + TCA_MSELECT_DETAIL = 4, + TCA_MSELECT_LOD_FRAC = 5 }; -enum -{ - CC_ADD_CLOCAL = 1, - CC_ADD_ALOCAL = 2 +enum { + CC_ADD_CLOCAL = 1, + CC_ADD_ALOCAL = 2 }; -enum -{ - CCA_ADD_CLOCAL = 1, - CCA_ADD_ALOCAL = 2 +enum { + CCA_ADD_CLOCAL = 1, + CCA_ADD_ALOCAL = 2 }; -enum -{ - AFUNC_AZERO = 0x0, - AFUNC_ASRC_ALPHA = 0x1, - AFUNC_A_COLOR = 0x2, - AFUNC_ADST_ALPHA = 0x3, - AFUNC_AONE = 0x4, - AFUNC_AOMSRC_ALPHA = 0x5, - AFUNC_AOM_COLOR = 0x6, - AFUNC_AOMDST_ALPHA = 0x7, - AFUNC_ASATURATE = 0xf +enum { + AFUNC_AZERO = 0x0, + AFUNC_ASRC_ALPHA = 0x1, + AFUNC_A_COLOR = 0x2, + AFUNC_ADST_ALPHA = 0x3, + AFUNC_AONE = 0x4, + AFUNC_AOMSRC_ALPHA = 0x5, + AFUNC_AOM_COLOR = 0x6, + AFUNC_AOMDST_ALPHA = 0x7, + AFUNC_ASATURATE = 0xf }; -enum -{ - AFUNC_ACOLORBEFOREFOG = 0xf +enum { + AFUNC_ACOLORBEFOREFOG = 0xf }; -enum -{ - AFUNC_NEVER = 0, - AFUNC_LESSTHAN = 1, - AFUNC_EQUAL = 2, - AFUNC_LESSTHANEQUAL = 3, - AFUNC_GREATERTHAN = 4, - AFUNC_NOTEQUAL = 5, - AFUNC_GREATERTHANEQUAL = 6, - AFUNC_ALWAYS = 7 +enum { + AFUNC_NEVER = 0, + AFUNC_LESSTHAN = 1, + AFUNC_EQUAL = 2, + AFUNC_LESSTHANEQUAL = 3, + AFUNC_GREATERTHAN = 4, + AFUNC_NOTEQUAL = 5, + AFUNC_GREATERTHANEQUAL = 6, + AFUNC_ALWAYS = 7 }; -enum -{ - DEPTHOP_NEVER = 0, - DEPTHOP_LESSTHAN = 1, - DEPTHOP_EQUAL = 2, - DEPTHOP_LESSTHANEQUAL = 3, - DEPTHOP_GREATERTHAN = 4, - DEPTHOP_NOTEQUAL = 5, - DEPTHOP_GREATERTHANEQUAL = 6, - DEPTHOP_ALWAYS = 7 +enum { + DEPTHOP_NEVER = 0, + DEPTHOP_LESSTHAN = 1, + DEPTHOP_EQUAL = 2, + DEPTHOP_LESSTHANEQUAL = 3, + DEPTHOP_GREATERTHAN = 4, + DEPTHOP_NOTEQUAL = 5, + DEPTHOP_GREATERTHANEQUAL = 6, + DEPTHOP_ALWAYS = 7 }; -enum -{ - FOG_ENABLE = 0x01, - FOG_ADD = 0x02, - FOG_MULT = 0x04, - FOG_ALPHA = 0x08, - FOG_Z = 0x10, - FOG_W = 0x18, - FOG_CONSTANT = 0x20 +enum { + FOG_ENABLE = 0x01, + FOG_ADD = 0x02, + FOG_MULT = 0x04, + FOG_ALPHA = 0x08, + FOG_Z = 0x10, + FOG_W = 0x18, + FOG_CONSTANT = 0x20 }; -enum -{ - LOD_ODD = (1 << 18), - LOD_SPLIT = (1 << 19), - LOD_S_IS_WIDER = (1 << 20), - LOD_TMULTIBASEADDR = (1 << 24), - LOD_TMIRROR_S = (1 << 28), - LOD_TMIRROR_T = (1 << 29) +enum { + LOD_ODD = (1 << 18), + LOD_SPLIT = (1 << 19), + LOD_S_IS_WIDER = (1 << 20), + LOD_TMULTIBASEADDR = (1 << 24), + LOD_TMIRROR_S = (1 << 28), + LOD_TMIRROR_T = (1 << 29) }; -enum -{ - CMD_INVALID = 0, - CMD_DRAWTRIANGLE, - CMD_FASTFILL, - CMD_SWAPBUF +enum { + CMD_INVALID = 0, + CMD_DRAWTRIANGLE, + CMD_FASTFILL, + CMD_SWAPBUF }; -enum -{ - FBZCP_TEXTURE_ENABLED = (1 << 27) +enum { + FBZCP_TEXTURE_ENABLED = (1 << 27) }; -enum -{ - BLTCMD_SRC_TILED = (1 << 14), - BLTCMD_DST_TILED = (1 << 15) +enum { + BLTCMD_SRC_TILED = (1 << 14), + BLTCMD_DST_TILED = (1 << 15) }; -enum -{ - INITENABLE_SLI_MASTER_SLAVE = (1 << 11) +enum { + INITENABLE_SLI_MASTER_SLAVE = (1 << 11) }; -enum -{ - SETUPMODE_RGB = (1 << 0), - SETUPMODE_ALPHA = (1 << 1), - SETUPMODE_Z = (1 << 2), - SETUPMODE_Wb = (1 << 3), - SETUPMODE_W0 = (1 << 4), - SETUPMODE_S0_T0 = (1 << 5), - SETUPMODE_W1 = (1 << 6), - SETUPMODE_S1_T1 = (1 << 7), +enum { + SETUPMODE_RGB = (1 << 0), + SETUPMODE_ALPHA = (1 << 1), + SETUPMODE_Z = (1 << 2), + SETUPMODE_Wb = (1 << 3), + SETUPMODE_W0 = (1 << 4), + SETUPMODE_S0_T0 = (1 << 5), + SETUPMODE_W1 = (1 << 6), + SETUPMODE_S1_T1 = (1 << 7), - SETUPMODE_STRIP_MODE = (1 << 16), - SETUPMODE_CULLING_ENABLE = (1 << 17), - SETUPMODE_CULLING_SIGN = (1 << 18), - SETUPMODE_DISABLE_PINGPONG = (1 << 19) + SETUPMODE_STRIP_MODE = (1 << 16), + SETUPMODE_CULLING_ENABLE = (1 << 17), + SETUPMODE_CULLING_SIGN = (1 << 18), + SETUPMODE_DISABLE_PINGPONG = (1 << 19) }; -#define TEXTUREMODE_MASK 0x3ffff000 +#define TEXTUREMODE_MASK 0x3ffff000 #define TEXTUREMODE_PASSTHROUGH 0 -#define TEXTUREMODE_LOCAL_MASK 0x00643000 -#define TEXTUREMODE_LOCAL 0x00241000 +#define TEXTUREMODE_LOCAL_MASK 0x00643000 +#define TEXTUREMODE_LOCAL 0x00241000 +#define SLI_ENABLED (voodoo->fbiInit1 & FBIINIT1_SLI_ENABLE) +#define TRIPLE_BUFFER ((voodoo->fbiInit2 & 0x10) || (voodoo->fbiInit5 & 0x600) == 0x400) -#define SLI_ENABLED (voodoo->fbiInit1 & FBIINIT1_SLI_ENABLE) -#define TRIPLE_BUFFER ((voodoo->fbiInit2 & 0x10) || (voodoo->fbiInit5 & 0x600) == 0x400) +#define _rgb_sel (params->fbzColorPath & 3) +#define a_sel ((params->fbzColorPath >> 2) & 3) +#define cc_localselect (params->fbzColorPath & (1 << 4)) +#define cca_localselect ((params->fbzColorPath >> 5) & 3) +#define cc_localselect_override (params->fbzColorPath & (1 << 7)) +#define cc_zero_other (params->fbzColorPath & (1 << 8)) +#define cc_sub_clocal (params->fbzColorPath & (1 << 9)) +#define cc_mselect ((params->fbzColorPath >> 10) & 7) +#define cc_reverse_blend (params->fbzColorPath & (1 << 13)) +#define cc_add ((params->fbzColorPath >> 14) & 3) +#define cc_add_alocal (params->fbzColorPath & (1 << 15)) +#define cc_invert_output (params->fbzColorPath & (1 << 16)) +#define cca_zero_other (params->fbzColorPath & (1 << 17)) +#define cca_sub_clocal (params->fbzColorPath & (1 << 18)) +#define cca_mselect ((params->fbzColorPath >> 19) & 7) +#define cca_reverse_blend (params->fbzColorPath & (1 << 22)) +#define cca_add ((params->fbzColorPath >> 23) & 3) +#define cca_invert_output (params->fbzColorPath & (1 << 25)) +#define tc_zero_other (params->textureMode[0] & (1 << 12)) +#define tc_sub_clocal (params->textureMode[0] & (1 << 13)) +#define tc_mselect ((params->textureMode[0] >> 14) & 7) +#define tc_reverse_blend (params->textureMode[0] & (1 << 17)) +#define tc_add_clocal (params->textureMode[0] & (1 << 18)) +#define tc_add_alocal (params->textureMode[0] & (1 << 19)) +#define tc_invert_output (params->textureMode[0] & (1 << 20)) +#define tca_zero_other (params->textureMode[0] & (1 << 21)) +#define tca_sub_clocal (params->textureMode[0] & (1 << 22)) +#define tca_mselect ((params->textureMode[0] >> 23) & 7) +#define tca_reverse_blend (params->textureMode[0] & (1 << 26)) +#define tca_add_clocal (params->textureMode[0] & (1 << 27)) +#define tca_add_alocal (params->textureMode[0] & (1 << 28)) +#define tca_invert_output (params->textureMode[0] & (1 << 29)) +#define tc_sub_clocal_1 (params->textureMode[1] & (1 << 13)) +#define tc_mselect_1 ((params->textureMode[1] >> 14) & 7) +#define tc_reverse_blend_1 (params->textureMode[1] & (1 << 17)) +#define tc_add_clocal_1 (params->textureMode[1] & (1 << 18)) +#define tc_add_alocal_1 (params->textureMode[1] & (1 << 19)) +#define tca_sub_clocal_1 (params->textureMode[1] & (1 << 22)) +#define tca_mselect_1 ((params->textureMode[1] >> 23) & 7) +#define tca_reverse_blend_1 (params->textureMode[1] & (1 << 26)) +#define tca_add_clocal_1 (params->textureMode[1] & (1 << 27)) +#define tca_add_alocal_1 (params->textureMode[1] & (1 << 28)) -#define _rgb_sel ( params->fbzColorPath & 3) -#define a_sel ( (params->fbzColorPath >> 2) & 3) -#define cc_localselect ( params->fbzColorPath & (1 << 4)) -#define cca_localselect ( (params->fbzColorPath >> 5) & 3) -#define cc_localselect_override ( params->fbzColorPath & (1 << 7)) -#define cc_zero_other ( params->fbzColorPath & (1 << 8)) -#define cc_sub_clocal ( params->fbzColorPath & (1 << 9)) -#define cc_mselect ( (params->fbzColorPath >> 10) & 7) -#define cc_reverse_blend ( params->fbzColorPath & (1 << 13)) -#define cc_add ( (params->fbzColorPath >> 14) & 3) -#define cc_add_alocal ( params->fbzColorPath & (1 << 15)) -#define cc_invert_output ( params->fbzColorPath & (1 << 16)) -#define cca_zero_other ( params->fbzColorPath & (1 << 17)) -#define cca_sub_clocal ( params->fbzColorPath & (1 << 18)) -#define cca_mselect ( (params->fbzColorPath >> 19) & 7) -#define cca_reverse_blend ( params->fbzColorPath & (1 << 22)) -#define cca_add ( (params->fbzColorPath >> 23) & 3) -#define cca_invert_output ( params->fbzColorPath & (1 << 25)) -#define tc_zero_other (params->textureMode[0] & (1 << 12)) -#define tc_sub_clocal (params->textureMode[0] & (1 << 13)) -#define tc_mselect ((params->textureMode[0] >> 14) & 7) -#define tc_reverse_blend (params->textureMode[0] & (1 << 17)) -#define tc_add_clocal (params->textureMode[0] & (1 << 18)) -#define tc_add_alocal (params->textureMode[0] & (1 << 19)) -#define tc_invert_output (params->textureMode[0] & (1 << 20)) -#define tca_zero_other (params->textureMode[0] & (1 << 21)) -#define tca_sub_clocal (params->textureMode[0] & (1 << 22)) -#define tca_mselect ((params->textureMode[0] >> 23) & 7) -#define tca_reverse_blend (params->textureMode[0] & (1 << 26)) -#define tca_add_clocal (params->textureMode[0] & (1 << 27)) -#define tca_add_alocal (params->textureMode[0] & (1 << 28)) -#define tca_invert_output (params->textureMode[0] & (1 << 29)) - -#define tc_sub_clocal_1 (params->textureMode[1] & (1 << 13)) -#define tc_mselect_1 ((params->textureMode[1] >> 14) & 7) -#define tc_reverse_blend_1 (params->textureMode[1] & (1 << 17)) -#define tc_add_clocal_1 (params->textureMode[1] & (1 << 18)) -#define tc_add_alocal_1 (params->textureMode[1] & (1 << 19)) -#define tca_sub_clocal_1 (params->textureMode[1] & (1 << 22)) -#define tca_mselect_1 ((params->textureMode[1] >> 23) & 7) -#define tca_reverse_blend_1 (params->textureMode[1] & (1 << 26)) -#define tca_add_clocal_1 (params->textureMode[1] & (1 << 27)) -#define tca_add_alocal_1 (params->textureMode[1] & (1 << 28)) - -#define src_afunc ( (params->alphaMode >> 8) & 0xf) -#define dest_afunc ( (params->alphaMode >> 12) & 0xf) -#define alpha_func ( (params->alphaMode >> 1) & 7) -#define a_ref ( params->alphaMode >> 24) -#define depth_op ( (params->fbzMode >> 5) & 7) -#define dither ( params->fbzMode & FBZ_DITHER) -#define dither2x2 (params->fbzMode & FBZ_DITHER_2x2) -#define dithersub (params->fbzMode & FBZ_DITHER_SUB) +#define src_afunc ((params->alphaMode >> 8) & 0xf) +#define dest_afunc ((params->alphaMode >> 12) & 0xf) +#define alpha_func ((params->alphaMode >> 1) & 7) +#define a_ref (params->alphaMode >> 24) +#define depth_op ((params->fbzMode >> 5) & 7) +#define dither (params->fbzMode & FBZ_DITHER) +#define dither2x2 (params->fbzMode & FBZ_DITHER_2x2) +#define dithersub (params->fbzMode & FBZ_DITHER_SUB) #endif /*VIDEO_VOODOO_REGS_H*/ diff --git a/src/include/86box/vid_voodoo_render.h b/src/include/86box/vid_voodoo_render.h index 5fb10d231..cd1962430 100644 --- a/src/include/86box/vid_voodoo_render.h +++ b/src/include/86box/vid_voodoo_render.h @@ -1,8 +1,8 @@ #ifndef VIDEO_VOODOO_RENDER_H -# define VIDEO_VOODOO_RENDER_H +#define VIDEO_VOODOO_RENDER_H #if !(defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 || defined __amd64__ || defined _M_X64) -#define NO_CODEGEN +# define NO_CODEGEN #endif #ifndef NO_CODEGEN @@ -10,295 +10,263 @@ void voodoo_codegen_init(voodoo_t *voodoo); void voodoo_codegen_close(voodoo_t *voodoo); #endif -#define DEPTH_TEST(comp_depth) \ - do \ - { \ - switch (depth_op) \ - { \ - case DEPTHOP_NEVER: \ - voodoo->fbiZFuncFail++; \ - goto skip_pixel; \ - case DEPTHOP_LESSTHAN: \ - if (!(comp_depth < old_depth)) \ - { \ - voodoo->fbiZFuncFail++; \ - goto skip_pixel; \ - } \ - break; \ - case DEPTHOP_EQUAL: \ - if (!(comp_depth == old_depth)) \ - { \ - voodoo->fbiZFuncFail++; \ - goto skip_pixel; \ - } \ - break; \ - case DEPTHOP_LESSTHANEQUAL: \ - if (!(comp_depth <= old_depth)) \ - { \ - voodoo->fbiZFuncFail++; \ - goto skip_pixel; \ - } \ - break; \ - case DEPTHOP_GREATERTHAN: \ - if (!(comp_depth > old_depth)) \ - { \ - voodoo->fbiZFuncFail++; \ - goto skip_pixel; \ - } \ - break; \ - case DEPTHOP_NOTEQUAL: \ - if (!(comp_depth != old_depth)) \ - { \ - voodoo->fbiZFuncFail++; \ - goto skip_pixel; \ - } \ - break; \ - case DEPTHOP_GREATERTHANEQUAL: \ - if (!(comp_depth >= old_depth)) \ - { \ - voodoo->fbiZFuncFail++; \ - goto skip_pixel; \ - } \ - break; \ - case DEPTHOP_ALWAYS: \ - break; \ - } \ - } while (0) +#define DEPTH_TEST(comp_depth) \ + do { \ + switch (depth_op) { \ + case DEPTHOP_NEVER: \ + voodoo->fbiZFuncFail++; \ + goto skip_pixel; \ + case DEPTHOP_LESSTHAN: \ + if (!(comp_depth < old_depth)) { \ + voodoo->fbiZFuncFail++; \ + goto skip_pixel; \ + } \ + break; \ + case DEPTHOP_EQUAL: \ + if (!(comp_depth == old_depth)) { \ + voodoo->fbiZFuncFail++; \ + goto skip_pixel; \ + } \ + break; \ + case DEPTHOP_LESSTHANEQUAL: \ + if (!(comp_depth <= old_depth)) { \ + voodoo->fbiZFuncFail++; \ + goto skip_pixel; \ + } \ + break; \ + case DEPTHOP_GREATERTHAN: \ + if (!(comp_depth > old_depth)) { \ + voodoo->fbiZFuncFail++; \ + goto skip_pixel; \ + } \ + break; \ + case DEPTHOP_NOTEQUAL: \ + if (!(comp_depth != old_depth)) { \ + voodoo->fbiZFuncFail++; \ + goto skip_pixel; \ + } \ + break; \ + case DEPTHOP_GREATERTHANEQUAL: \ + if (!(comp_depth >= old_depth)) { \ + voodoo->fbiZFuncFail++; \ + goto skip_pixel; \ + } \ + break; \ + case DEPTHOP_ALWAYS: \ + break; \ + } \ + } while (0) -#define APPLY_FOG(src_r, src_g, src_b, z, ia, w) \ - do \ - { \ - if (params->fogMode & FOG_CONSTANT) \ - { \ - src_r += params->fogColor.r; \ - src_g += params->fogColor.g; \ - src_b += params->fogColor.b; \ - } \ - else \ - { \ - int fog_r, fog_g, fog_b, fog_a = 0; \ - int fog_idx; \ - \ - if (!(params->fogMode & FOG_ADD)) \ - { \ - fog_r = params->fogColor.r; \ - fog_g = params->fogColor.g; \ - fog_b = params->fogColor.b; \ - } \ - else \ - fog_r = fog_g = fog_b = 0; \ - \ - if (!(params->fogMode & FOG_MULT)) \ - { \ - fog_r -= src_r; \ - fog_g -= src_g; \ - fog_b -= src_b; \ - } \ - \ - switch (params->fogMode & (FOG_Z|FOG_ALPHA)) \ - { \ - case 0: \ - fog_idx = (w_depth >> 10) & 0x3f; \ - \ - fog_a = params->fogTable[fog_idx].fog; \ - fog_a += (params->fogTable[fog_idx].dfog * ((w_depth >> 2) & 0xff)) >> 10; \ - break; \ - case FOG_Z: \ - fog_a = (z >> 20) & 0xff; \ - break; \ - case FOG_ALPHA: \ - fog_a = CLAMP(ia >> 12); \ - break; \ - case FOG_W: \ - fog_a = CLAMP((w >> 32) & 0xff); \ - break; \ - } \ - fog_a++; \ - \ - fog_r = (fog_r * fog_a) >> 8; \ - fog_g = (fog_g * fog_a) >> 8; \ - fog_b = (fog_b * fog_a) >> 8; \ - \ - if (params->fogMode & FOG_MULT) \ - { \ - src_r = fog_r; \ - src_g = fog_g; \ - src_b = fog_b; \ - } \ - else \ - { \ - src_r += fog_r; \ - src_g += fog_g; \ - src_b += fog_b; \ - } \ - } \ - \ - src_r = CLAMP(src_r); \ - src_g = CLAMP(src_g); \ - src_b = CLAMP(src_b); \ - } while (0) - -#define ALPHA_TEST(src_a) \ - do \ - { \ - switch (alpha_func) \ - { \ - case AFUNC_NEVER: \ - voodoo->fbiAFuncFail++; \ - goto skip_pixel; \ - case AFUNC_LESSTHAN: \ - if (!(src_a < a_ref)) \ - { \ - voodoo->fbiAFuncFail++; \ - goto skip_pixel; \ - } \ - break; \ - case AFUNC_EQUAL: \ - if (!(src_a == a_ref)) \ - { \ - voodoo->fbiAFuncFail++; \ - goto skip_pixel; \ - } \ - break; \ - case AFUNC_LESSTHANEQUAL: \ - if (!(src_a <= a_ref)) \ - { \ - voodoo->fbiAFuncFail++; \ - goto skip_pixel; \ - } \ - break; \ - case AFUNC_GREATERTHAN: \ - if (!(src_a > a_ref)) \ - { \ - voodoo->fbiAFuncFail++; \ - goto skip_pixel; \ - } \ - break; \ - case AFUNC_NOTEQUAL: \ - if (!(src_a != a_ref)) \ - { \ - voodoo->fbiAFuncFail++; \ - goto skip_pixel; \ - } \ - break; \ - case AFUNC_GREATERTHANEQUAL: \ - if (!(src_a >= a_ref)) \ - { \ - voodoo->fbiAFuncFail++; \ - goto skip_pixel; \ - } \ - break; \ - case AFUNC_ALWAYS: \ - break; \ - } \ - } while (0) - -#define ALPHA_BLEND(src_r, src_g, src_b, src_a) \ - do \ - { \ - int _a; \ - int newdest_r = 0, newdest_g = 0, newdest_b = 0; \ - \ - switch (dest_afunc) \ - { \ - case AFUNC_AZERO: \ - newdest_r = newdest_g = newdest_b = 0; \ - break; \ - case AFUNC_ASRC_ALPHA: \ - newdest_r = (dest_r * src_a) / 255; \ - newdest_g = (dest_g * src_a) / 255; \ - newdest_b = (dest_b * src_a) / 255; \ - break; \ - case AFUNC_A_COLOR: \ - newdest_r = (dest_r * src_r) / 255; \ - newdest_g = (dest_g * src_g) / 255; \ - newdest_b = (dest_b * src_b) / 255; \ - break; \ - case AFUNC_ADST_ALPHA: \ - newdest_r = (dest_r * dest_a) / 255; \ - newdest_g = (dest_g * dest_a) / 255; \ - newdest_b = (dest_b * dest_a) / 255; \ - break; \ - case AFUNC_AONE: \ - newdest_r = dest_r; \ - newdest_g = dest_g; \ - newdest_b = dest_b; \ - break; \ - case AFUNC_AOMSRC_ALPHA: \ - newdest_r = (dest_r * (255-src_a)) / 255; \ - newdest_g = (dest_g * (255-src_a)) / 255; \ - newdest_b = (dest_b * (255-src_a)) / 255; \ - break; \ - case AFUNC_AOM_COLOR: \ - newdest_r = (dest_r * (255-src_r)) / 255; \ - newdest_g = (dest_g * (255-src_g)) / 255; \ - newdest_b = (dest_b * (255-src_b)) / 255; \ - break; \ - case AFUNC_AOMDST_ALPHA: \ - newdest_r = (dest_r * (255-dest_a)) / 255; \ - newdest_g = (dest_g * (255-dest_a)) / 255; \ - newdest_b = (dest_b * (255-dest_a)) / 255; \ - break; \ - case AFUNC_ASATURATE: \ - _a = MIN(src_a, 1-dest_a); \ - newdest_r = (dest_r * _a) / 255; \ - newdest_g = (dest_g * _a) / 255; \ - newdest_b = (dest_b * _a) / 255; \ - break; \ - } \ - \ - switch (src_afunc) \ - { \ - case AFUNC_AZERO: \ - src_r = src_g = src_b = 0; \ - break; \ - case AFUNC_ASRC_ALPHA: \ - src_r = (src_r * src_a) / 255; \ - src_g = (src_g * src_a) / 255; \ - src_b = (src_b * src_a) / 255; \ - break; \ - case AFUNC_A_COLOR: \ - src_r = (src_r * dest_r) / 255; \ - src_g = (src_g * dest_g) / 255; \ - src_b = (src_b * dest_b) / 255; \ - break; \ - case AFUNC_ADST_ALPHA: \ - src_r = (src_r * dest_a) / 255; \ - src_g = (src_g * dest_a) / 255; \ - src_b = (src_b * dest_a) / 255; \ - break; \ - case AFUNC_AONE: \ - break; \ - case AFUNC_AOMSRC_ALPHA: \ - src_r = (src_r * (255-src_a)) / 255; \ - src_g = (src_g * (255-src_a)) / 255; \ - src_b = (src_b * (255-src_a)) / 255; \ - break; \ - case AFUNC_AOM_COLOR: \ - src_r = (src_r * (255-dest_r)) / 255; \ - src_g = (src_g * (255-dest_g)) / 255; \ - src_b = (src_b * (255-dest_b)) / 255; \ - break; \ - case AFUNC_AOMDST_ALPHA: \ - src_r = (src_r * (255-dest_a)) / 255; \ - src_g = (src_g * (255-dest_a)) / 255; \ - src_b = (src_b * (255-dest_a)) / 255; \ - break; \ - case AFUNC_ACOLORBEFOREFOG: \ - fatal("AFUNC_ACOLORBEFOREFOG\n"); \ - break; \ - } \ - \ - src_r += newdest_r; \ - src_g += newdest_g; \ - src_b += newdest_b; \ - \ - src_r = CLAMP(src_r); \ - src_g = CLAMP(src_g); \ - src_b = CLAMP(src_b); \ - } while(0) +#define APPLY_FOG(src_r, src_g, src_b, z, ia, w) \ + do { \ + if (params->fogMode & FOG_CONSTANT) { \ + src_r += params->fogColor.r; \ + src_g += params->fogColor.g; \ + src_b += params->fogColor.b; \ + } else { \ + int fog_r, fog_g, fog_b, fog_a = 0; \ + int fog_idx; \ + \ + if (!(params->fogMode & FOG_ADD)) { \ + fog_r = params->fogColor.r; \ + fog_g = params->fogColor.g; \ + fog_b = params->fogColor.b; \ + } else \ + fog_r = fog_g = fog_b = 0; \ + \ + if (!(params->fogMode & FOG_MULT)) { \ + fog_r -= src_r; \ + fog_g -= src_g; \ + fog_b -= src_b; \ + } \ + \ + switch (params->fogMode & (FOG_Z | FOG_ALPHA)) { \ + case 0: \ + fog_idx = (w_depth >> 10) & 0x3f; \ + \ + fog_a = params->fogTable[fog_idx].fog; \ + fog_a += (params->fogTable[fog_idx].dfog * ((w_depth >> 2) & 0xff)) >> 10; \ + break; \ + case FOG_Z: \ + fog_a = (z >> 20) & 0xff; \ + break; \ + case FOG_ALPHA: \ + fog_a = CLAMP(ia >> 12); \ + break; \ + case FOG_W: \ + fog_a = CLAMP((w >> 32) & 0xff); \ + break; \ + } \ + fog_a++; \ + \ + fog_r = (fog_r * fog_a) >> 8; \ + fog_g = (fog_g * fog_a) >> 8; \ + fog_b = (fog_b * fog_a) >> 8; \ + \ + if (params->fogMode & FOG_MULT) { \ + src_r = fog_r; \ + src_g = fog_g; \ + src_b = fog_b; \ + } else { \ + src_r += fog_r; \ + src_g += fog_g; \ + src_b += fog_b; \ + } \ + } \ + \ + src_r = CLAMP(src_r); \ + src_g = CLAMP(src_g); \ + src_b = CLAMP(src_b); \ + } while (0) +#define ALPHA_TEST(src_a) \ + do { \ + switch (alpha_func) { \ + case AFUNC_NEVER: \ + voodoo->fbiAFuncFail++; \ + goto skip_pixel; \ + case AFUNC_LESSTHAN: \ + if (!(src_a < a_ref)) { \ + voodoo->fbiAFuncFail++; \ + goto skip_pixel; \ + } \ + break; \ + case AFUNC_EQUAL: \ + if (!(src_a == a_ref)) { \ + voodoo->fbiAFuncFail++; \ + goto skip_pixel; \ + } \ + break; \ + case AFUNC_LESSTHANEQUAL: \ + if (!(src_a <= a_ref)) { \ + voodoo->fbiAFuncFail++; \ + goto skip_pixel; \ + } \ + break; \ + case AFUNC_GREATERTHAN: \ + if (!(src_a > a_ref)) { \ + voodoo->fbiAFuncFail++; \ + goto skip_pixel; \ + } \ + break; \ + case AFUNC_NOTEQUAL: \ + if (!(src_a != a_ref)) { \ + voodoo->fbiAFuncFail++; \ + goto skip_pixel; \ + } \ + break; \ + case AFUNC_GREATERTHANEQUAL: \ + if (!(src_a >= a_ref)) { \ + voodoo->fbiAFuncFail++; \ + goto skip_pixel; \ + } \ + break; \ + case AFUNC_ALWAYS: \ + break; \ + } \ + } while (0) +#define ALPHA_BLEND(src_r, src_g, src_b, src_a) \ + do { \ + int _a; \ + int newdest_r = 0, newdest_g = 0, newdest_b = 0; \ + \ + switch (dest_afunc) { \ + case AFUNC_AZERO: \ + newdest_r = newdest_g = newdest_b = 0; \ + break; \ + case AFUNC_ASRC_ALPHA: \ + newdest_r = (dest_r * src_a) / 255; \ + newdest_g = (dest_g * src_a) / 255; \ + newdest_b = (dest_b * src_a) / 255; \ + break; \ + case AFUNC_A_COLOR: \ + newdest_r = (dest_r * src_r) / 255; \ + newdest_g = (dest_g * src_g) / 255; \ + newdest_b = (dest_b * src_b) / 255; \ + break; \ + case AFUNC_ADST_ALPHA: \ + newdest_r = (dest_r * dest_a) / 255; \ + newdest_g = (dest_g * dest_a) / 255; \ + newdest_b = (dest_b * dest_a) / 255; \ + break; \ + case AFUNC_AONE: \ + newdest_r = dest_r; \ + newdest_g = dest_g; \ + newdest_b = dest_b; \ + break; \ + case AFUNC_AOMSRC_ALPHA: \ + newdest_r = (dest_r * (255 - src_a)) / 255; \ + newdest_g = (dest_g * (255 - src_a)) / 255; \ + newdest_b = (dest_b * (255 - src_a)) / 255; \ + break; \ + case AFUNC_AOM_COLOR: \ + newdest_r = (dest_r * (255 - src_r)) / 255; \ + newdest_g = (dest_g * (255 - src_g)) / 255; \ + newdest_b = (dest_b * (255 - src_b)) / 255; \ + break; \ + case AFUNC_AOMDST_ALPHA: \ + newdest_r = (dest_r * (255 - dest_a)) / 255; \ + newdest_g = (dest_g * (255 - dest_a)) / 255; \ + newdest_b = (dest_b * (255 - dest_a)) / 255; \ + break; \ + case AFUNC_ASATURATE: \ + _a = MIN(src_a, 1 - dest_a); \ + newdest_r = (dest_r * _a) / 255; \ + newdest_g = (dest_g * _a) / 255; \ + newdest_b = (dest_b * _a) / 255; \ + break; \ + } \ + \ + switch (src_afunc) { \ + case AFUNC_AZERO: \ + src_r = src_g = src_b = 0; \ + break; \ + case AFUNC_ASRC_ALPHA: \ + src_r = (src_r * src_a) / 255; \ + src_g = (src_g * src_a) / 255; \ + src_b = (src_b * src_a) / 255; \ + break; \ + case AFUNC_A_COLOR: \ + src_r = (src_r * dest_r) / 255; \ + src_g = (src_g * dest_g) / 255; \ + src_b = (src_b * dest_b) / 255; \ + break; \ + case AFUNC_ADST_ALPHA: \ + src_r = (src_r * dest_a) / 255; \ + src_g = (src_g * dest_a) / 255; \ + src_b = (src_b * dest_a) / 255; \ + break; \ + case AFUNC_AONE: \ + break; \ + case AFUNC_AOMSRC_ALPHA: \ + src_r = (src_r * (255 - src_a)) / 255; \ + src_g = (src_g * (255 - src_a)) / 255; \ + src_b = (src_b * (255 - src_a)) / 255; \ + break; \ + case AFUNC_AOM_COLOR: \ + src_r = (src_r * (255 - dest_r)) / 255; \ + src_g = (src_g * (255 - dest_g)) / 255; \ + src_b = (src_b * (255 - dest_b)) / 255; \ + break; \ + case AFUNC_AOMDST_ALPHA: \ + src_r = (src_r * (255 - dest_a)) / 255; \ + src_g = (src_g * (255 - dest_a)) / 255; \ + src_b = (src_b * (255 - dest_a)) / 255; \ + break; \ + case AFUNC_ACOLORBEFOREFOG: \ + fatal("AFUNC_ACOLORBEFOREFOG\n"); \ + break; \ + } \ + \ + src_r += newdest_r; \ + src_g += newdest_g; \ + src_b += newdest_b; \ + \ + src_r = CLAMP(src_r); \ + src_g = CLAMP(src_g); \ + src_b = CLAMP(src_b); \ + } while (0) void voodoo_render_thread_1(void *param); void voodoo_render_thread_2(void *param); @@ -309,35 +277,32 @@ void voodoo_queue_triangle(voodoo_t *voodoo, voodoo_params_t *params); extern int voodoo_recomp; extern int tris; -static __inline void voodoo_wake_render_thread(voodoo_t *voodoo) +static __inline void +voodoo_wake_render_thread(voodoo_t *voodoo) { - thread_set_event(voodoo->wake_render_thread[0]); /*Wake up render thread if moving from idle*/ - if (voodoo->render_threads >= 2) - thread_set_event(voodoo->wake_render_thread[1]); /*Wake up render thread if moving from idle*/ - if (voodoo->render_threads == 4) - { - thread_set_event(voodoo->wake_render_thread[2]); /*Wake up render thread if moving from idle*/ - thread_set_event(voodoo->wake_render_thread[3]); /*Wake up render thread if moving from idle*/ - } + thread_set_event(voodoo->wake_render_thread[0]); /*Wake up render thread if moving from idle*/ + if (voodoo->render_threads >= 2) + thread_set_event(voodoo->wake_render_thread[1]); /*Wake up render thread if moving from idle*/ + if (voodoo->render_threads == 4) { + thread_set_event(voodoo->wake_render_thread[2]); /*Wake up render thread if moving from idle*/ + thread_set_event(voodoo->wake_render_thread[3]); /*Wake up render thread if moving from idle*/ + } } -static __inline void voodoo_wait_for_render_thread_idle(voodoo_t *voodoo) +static __inline void +voodoo_wait_for_render_thread_idle(voodoo_t *voodoo) { - while (!PARAM_EMPTY(0) || (voodoo->render_threads >= 2 && !PARAM_EMPTY(1)) || - (voodoo->render_threads == 4 && (!PARAM_EMPTY(2) || !PARAM_EMPTY(3))) || - voodoo->render_voodoo_busy[0] || (voodoo->render_threads >= 2 && voodoo->render_voodoo_busy[1]) || - (voodoo->render_threads == 4 && (voodoo->render_voodoo_busy[2] || voodoo->render_voodoo_busy[3]))) - { - voodoo_wake_render_thread(voodoo); - if (!PARAM_EMPTY(0) || voodoo->render_voodoo_busy[0]) - thread_wait_event(voodoo->render_not_full_event[0], 1); - if (voodoo->render_threads >= 2 && (!PARAM_EMPTY(1) || voodoo->render_voodoo_busy[1])) - thread_wait_event(voodoo->render_not_full_event[1], 1); - if (voodoo->render_threads == 4 && (!PARAM_EMPTY(2) || voodoo->render_voodoo_busy[2])) - thread_wait_event(voodoo->render_not_full_event[2], 1); - if (voodoo->render_threads == 4 && (!PARAM_EMPTY(3) || voodoo->render_voodoo_busy[3])) - thread_wait_event(voodoo->render_not_full_event[3], 1); - } + while (!PARAM_EMPTY(0) || (voodoo->render_threads >= 2 && !PARAM_EMPTY(1)) || (voodoo->render_threads == 4 && (!PARAM_EMPTY(2) || !PARAM_EMPTY(3))) || voodoo->render_voodoo_busy[0] || (voodoo->render_threads >= 2 && voodoo->render_voodoo_busy[1]) || (voodoo->render_threads == 4 && (voodoo->render_voodoo_busy[2] || voodoo->render_voodoo_busy[3]))) { + voodoo_wake_render_thread(voodoo); + if (!PARAM_EMPTY(0) || voodoo->render_voodoo_busy[0]) + thread_wait_event(voodoo->render_not_full_event[0], 1); + if (voodoo->render_threads >= 2 && (!PARAM_EMPTY(1) || voodoo->render_voodoo_busy[1])) + thread_wait_event(voodoo->render_not_full_event[1], 1); + if (voodoo->render_threads == 4 && (!PARAM_EMPTY(2) || voodoo->render_voodoo_busy[2])) + thread_wait_event(voodoo->render_not_full_event[2], 1); + if (voodoo->render_threads == 4 && (!PARAM_EMPTY(3) || voodoo->render_voodoo_busy[3])) + thread_wait_event(voodoo->render_not_full_event[3], 1); + } } #endif /*VIDEO_VOODOO_RENDER_H*/ diff --git a/src/include/86box/vid_voodoo_setup.h b/src/include/86box/vid_voodoo_setup.h index 047118701..be94f9533 100644 --- a/src/include/86box/vid_voodoo_setup.h +++ b/src/include/86box/vid_voodoo_setup.h @@ -17,7 +17,7 @@ */ #ifndef VIDEO_VOODOO_SETUP_H -# define VIDEO_VOODOO_SETUP_H +#define VIDEO_VOODOO_SETUP_H void voodoo_triangle_setup(voodoo_t *voodoo); diff --git a/src/include/86box/vid_voodoo_texture.h b/src/include/86box/vid_voodoo_texture.h index cc2b13201..d5ab603ab 100644 --- a/src/include/86box/vid_voodoo_texture.h +++ b/src/include/86box/vid_voodoo_texture.h @@ -17,21 +17,20 @@ */ #ifndef VIDEO_VOODOO_TEXTURE_H -# define VIDEO_VOODOO_TEXTURE_H +#define VIDEO_VOODOO_TEXTURE_H -static const uint32_t texture_offset[LOD_MAX+3] = -{ - 0, - 256*256, - 256*256 + 128*128, - 256*256 + 128*128 + 64*64, - 256*256 + 128*128 + 64*64 + 32*32, - 256*256 + 128*128 + 64*64 + 32*32 + 16*16, - 256*256 + 128*128 + 64*64 + 32*32 + 16*16 + 8*8, - 256*256 + 128*128 + 64*64 + 32*32 + 16*16 + 8*8 + 4*4, - 256*256 + 128*128 + 64*64 + 32*32 + 16*16 + 8*8 + 4*4 + 2*2, - 256*256 + 128*128 + 64*64 + 32*32 + 16*16 + 8*8 + 4*4 + 2*2 + 1*1, - 256*256 + 128*128 + 64*64 + 32*32 + 16*16 + 8*8 + 4*4 + 2*2 + 1*1 + 1 +static const uint32_t texture_offset[LOD_MAX + 3] = { + 0, + 256 * 256, + 256 * 256 + 128 * 128, + 256 * 256 + 128 * 128 + 64 * 64, + 256 * 256 + 128 * 128 + 64 * 64 + 32 * 32, + 256 * 256 + 128 * 128 + 64 * 64 + 32 * 32 + 16 * 16, + 256 * 256 + 128 * 128 + 64 * 64 + 32 * 32 + 16 * 16 + 8 * 8, + 256 * 256 + 128 * 128 + 64 * 64 + 32 * 32 + 16 * 16 + 8 * 8 + 4 * 4, + 256 * 256 + 128 * 128 + 64 * 64 + 32 * 32 + 16 * 16 + 8 * 8 + 4 * 4 + 2 * 2, + 256 * 256 + 128 * 128 + 64 * 64 + 32 * 32 + 16 * 16 + 8 * 8 + 4 * 4 + 2 * 2 + 1 * 1, + 256 * 256 + 128 * 128 + 64 * 64 + 32 * 32 + 16 * 16 + 8 * 8 + 4 * 4 + 2 * 2 + 1 * 1 + 1 }; void voodoo_recalc_tex(voodoo_t *voodoo, int tmu); diff --git a/src/include/86box/vid_xga.h b/src/include/86box/vid_xga.h index 5890b5cad..866aea4a3 100644 --- a/src/include/86box/vid_xga.h +++ b/src/include/86box/vid_xga.h @@ -16,55 +16,55 @@ */ #ifndef VIDEO_XGA_H -# define VIDEO_XGA_H +#define VIDEO_XGA_H #include <86box/rom.h> typedef struct { - int ena; - int x, y, xoff, yoff, cur_xsize, cur_ysize; + int ena; + int x, y, xoff, yoff, cur_xsize, cur_ysize; uint32_t addr; } xga_hwcursor_t; -typedef struct xga_t -{ - mem_mapping_t memio_mapping; - mem_mapping_t linear_mapping; - mem_mapping_t video_mapping; - rom_t bios_rom; - xga_hwcursor_t hwcursor, hwcursor_latch; - PALETTE extpal; +typedef struct xga_t { + mem_mapping_t memio_mapping; + mem_mapping_t linear_mapping; + mem_mapping_t video_mapping; + rom_t bios_rom; + xga_hwcursor_t hwcursor, hwcursor_latch; + PALETTE extpal; - uint8_t test, atest[2], testpixel;; - uint8_t pos_regs[8]; - uint8_t disp_addr; - uint8_t cfg_reg; - uint8_t instance; - uint8_t op_mode; - uint8_t aperture_cntl; - uint8_t ap_idx; - uint8_t access_mode; - uint8_t regs[0x100]; - uint8_t regs_idx; - uint8_t hwc_hotspot_x; - uint8_t hwc_hotspot_y; - uint8_t disp_cntl_1, disp_cntl_2; - uint8_t clk_sel_1, clk_sel_2; - uint8_t hwc_control; - uint8_t bus_arb; - uint8_t select_pos_isa; - uint8_t hwcursor_oddeven; - uint8_t cfg_reg_instance; - uint8_t rowcount; - uint8_t pal_idx, pal_idx_prefetch; - uint8_t pal_seq; - uint8_t pal_mask; - uint8_t pal_r, pal_r_prefetch; - uint8_t pal_g, pal_g_prefetch; - uint8_t pal_b, pal_b_prefetch; - uint8_t sprite_data[1024]; - uint8_t scrollcache; - uint8_t direct_color; + uint8_t test, atest[2], testpixel; + ; + uint8_t pos_regs[8]; + uint8_t disp_addr; + uint8_t cfg_reg; + uint8_t instance; + uint8_t op_mode; + uint8_t aperture_cntl; + uint8_t ap_idx; + uint8_t access_mode; + uint8_t regs[0x100]; + uint8_t regs_idx; + uint8_t hwc_hotspot_x; + uint8_t hwc_hotspot_y; + uint8_t disp_cntl_1, disp_cntl_2; + uint8_t clk_sel_1, clk_sel_2; + uint8_t hwc_control; + uint8_t bus_arb; + uint8_t select_pos_isa; + uint8_t hwcursor_oddeven; + uint8_t cfg_reg_instance; + uint8_t rowcount; + uint8_t pal_idx, pal_idx_prefetch; + uint8_t pal_seq; + uint8_t pal_mask; + uint8_t pal_r, pal_r_prefetch; + uint8_t pal_g, pal_g_prefetch; + uint8_t pal_b, pal_b_prefetch; + uint8_t sprite_data[1024]; + uint8_t scrollcache; + uint8_t direct_color; uint8_t *vram, *changedvram; int16_t hwc_pos_x; @@ -84,7 +84,7 @@ typedef struct xga_t uint16_t sprite_pal_addr_idx_prefetch; int v_total, dispend, v_syncstart, split, v_blankstart, - h_disp, h_disp_old, h_total, h_disp_time, rowoffset, + h_disp, h_disp_old, h_total, h_disp_time, rowoffset, dispon, h_disp_on, vc, sc, linepos, oddeven, firstline, lastline, firstline_draw, lastline_draw, displine, fullchange, interlace, char_width, hwcursor_on; @@ -103,10 +103,10 @@ typedef struct xga_t uint32_t vram_size; uint32_t vram_mask; uint32_t rom_addr; - uint32_t ma, maback; - uint32_t extpallook[256]; - uint32_t read_bank, write_bank; - uint32_t px_map_base; + uint32_t ma, maback; + uint32_t extpallook[256]; + uint32_t read_bank, write_bank; + uint32_t px_map_base; uint64_t dispontime, dispofftime; @@ -153,7 +153,7 @@ typedef struct xga_t uint32_t command; uint32_t dir_cmd; - uint8_t px_map_format[4]; + uint8_t px_map_format[4]; uint16_t px_map_width[4]; uint16_t px_map_height[4]; uint32_t px_map_base[4]; @@ -161,4 +161,4 @@ typedef struct xga_t volatile int force_busy; } xga_t; -#endif /*VIDEO_XGA_H*/ +#endif /*VIDEO_XGA_H*/ diff --git a/src/include/86box/vid_xga_device.h b/src/include/86box/vid_xga_device.h index 37893e0d5..f6effc350 100644 --- a/src/include/86box/vid_xga_device.h +++ b/src/include/86box/vid_xga_device.h @@ -16,7 +16,7 @@ */ #ifndef VIDEO_XGA_DEVICE_H -# define VIDEO_XGA_DEVICE_H +#define VIDEO_XGA_DEVICE_H extern const device_t xga_device; extern const device_t xga_isa_device; -#endif /*VIDEO_XGA_DEVICE_H*/ +#endif /*VIDEO_XGA_DEVICE_H*/ diff --git a/src/include/86box/video.h b/src/include/86box/video.h index fd402186a..5fa6c5d57 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -20,19 +20,18 @@ */ #ifndef EMU_VIDEO_H -# define EMU_VIDEO_H +#define EMU_VIDEO_H #ifdef __cplusplus -#include +# include using atomic_bool = std::atomic_bool; -using atomic_int = std::atomic_int; +using atomic_int = std::atomic_int; #else -#include +# include #endif -#define makecol(r, g, b) ((b) | ((g) << 8) | ((r) << 16)) -#define makecol32(r, g, b) ((b) | ((g) << 8) | ((r) << 16)) - +#define makecol(r, g, b) ((b) | ((g) << 8) | ((r) << 16)) +#define makecol32(r, g, b) ((b) | ((g) << 8) | ((r) << 16)) enum { VID_NONE = 0, @@ -46,12 +45,10 @@ enum { FULLSCR_SCALE_INT }; - #ifdef __cplusplus extern "C" { #endif - enum { VIDEO_ISA = 0, VIDEO_MCA, @@ -63,64 +60,63 @@ enum { #define VIDEO_FLAG_TYPE_CGA 0 #define VIDEO_FLAG_TYPE_MDA 1 #define VIDEO_FLAG_TYPE_SPECIAL 2 -#define VIDEO_FLAG_TYPE_NONE 3 +#define VIDEO_FLAG_TYPE_NONE 3 #define VIDEO_FLAG_TYPE_MASK 3 typedef struct { - int type; - int write_b, write_w, write_l; - int read_b, read_w, read_l; + int type; + int write_b, write_w, write_l; + int read_b, read_w, read_l; } video_timings_t; typedef struct { - int w, h; - uint32_t *dat; - uint32_t *line[2112]; + int w, h; + uint32_t *dat; + uint32_t *line[2112]; } bitmap_t; typedef struct { - uint8_t r, g, b; + uint8_t r, g, b; } rgb_t; typedef struct { - uint8_t chr[32]; + uint8_t chr[32]; } dbcs_font_t; struct blit_data_struct; -typedef struct monitor_t -{ - char name[512]; - int mon_xsize; - int mon_ysize; - int mon_scrnsz_x; - int mon_scrnsz_y; - int mon_efscrnsz_y; - int mon_unscaled_size_x; - int mon_unscaled_size_y; - int mon_res_x; - int mon_res_y; - int mon_bpp; - bitmap_t* target_buffer; - int mon_video_timing_read_b, - mon_video_timing_read_w, - mon_video_timing_read_l; - int mon_video_timing_write_b, - mon_video_timing_write_w, - mon_video_timing_write_l; - int mon_overscan_x; - int mon_overscan_y; - int mon_force_resize; - int mon_fullchange; - int mon_changeframecount; - atomic_int mon_screenshots; - uint32_t* mon_pal_lookup; - int* mon_cga_palette; - int mon_pal_lookup_static; /* Whether it should not be freed by the API. */ - int mon_cga_palette_static; /* Whether it should not be freed by the API. */ - const video_timings_t* mon_vid_timings; - int mon_vid_type; - struct blit_data_struct* mon_blit_data_ptr; +typedef struct monitor_t { + char name[512]; + int mon_xsize; + int mon_ysize; + int mon_scrnsz_x; + int mon_scrnsz_y; + int mon_efscrnsz_y; + int mon_unscaled_size_x; + int mon_unscaled_size_y; + int mon_res_x; + int mon_res_y; + int mon_bpp; + bitmap_t *target_buffer; + int mon_video_timing_read_b, + mon_video_timing_read_w, + mon_video_timing_read_l; + int mon_video_timing_write_b, + mon_video_timing_write_w, + mon_video_timing_write_l; + int mon_overscan_x; + int mon_overscan_y; + int mon_force_resize; + int mon_fullchange; + int mon_changeframecount; + atomic_int mon_screenshots; + uint32_t *mon_pal_lookup; + int *mon_cga_palette; + int mon_pal_lookup_static; /* Whether it should not be freed by the API. */ + int mon_cga_palette_static; /* Whether it should not be freed by the API. */ + const video_timings_t *mon_vid_timings; + int mon_vid_type; + struct blit_data_struct *mon_blit_data_ptr; } monitor_t; typedef struct monitor_settings_t { @@ -131,159 +127,154 @@ typedef struct monitor_settings_t { } monitor_settings_t; #define MONITORS_NUM 2 -extern monitor_t monitors[MONITORS_NUM]; +extern monitor_t monitors[MONITORS_NUM]; extern monitor_settings_t monitor_settings[MONITORS_NUM]; -extern atomic_bool doresize_monitors[MONITORS_NUM]; -extern int monitor_index_global; -extern int gfxcard_2; -extern int show_second_monitors; +extern atomic_bool doresize_monitors[MONITORS_NUM]; +extern int monitor_index_global; +extern int gfxcard_2; +extern int show_second_monitors; typedef rgb_t PALETTE[256]; - -//extern int changeframecount; +// extern int changeframecount; extern volatile int screenshots; -//extern bitmap_t *buffer32; -#define buffer32 (monitors[monitor_index_global].target_buffer) -#define pal_lookup (monitors[monitor_index_global].mon_pal_lookup) -#define overscan_x (monitors[monitor_index_global].mon_overscan_x) -#define overscan_y (monitors[monitor_index_global].mon_overscan_y) -#define video_timing_read_b (monitors[monitor_index_global].mon_video_timing_read_b) -#define video_timing_read_l (monitors[monitor_index_global].mon_video_timing_read_l) -#define video_timing_read_w (monitors[monitor_index_global].mon_video_timing_read_w) +// extern bitmap_t *buffer32; +#define buffer32 (monitors[monitor_index_global].target_buffer) +#define pal_lookup (monitors[monitor_index_global].mon_pal_lookup) +#define overscan_x (monitors[monitor_index_global].mon_overscan_x) +#define overscan_y (monitors[monitor_index_global].mon_overscan_y) +#define video_timing_read_b (monitors[monitor_index_global].mon_video_timing_read_b) +#define video_timing_read_l (monitors[monitor_index_global].mon_video_timing_read_l) +#define video_timing_read_w (monitors[monitor_index_global].mon_video_timing_read_w) #define video_timing_write_b (monitors[monitor_index_global].mon_video_timing_write_b) #define video_timing_write_l (monitors[monitor_index_global].mon_video_timing_write_l) #define video_timing_write_w (monitors[monitor_index_global].mon_video_timing_write_w) -#define video_res_x (monitors[monitor_index_global].mon_res_x) -#define video_res_y (monitors[monitor_index_global].mon_res_y) -#define video_bpp (monitors[monitor_index_global].mon_bpp) -#define xsize (monitors[monitor_index_global].mon_xsize) -#define ysize (monitors[monitor_index_global].mon_ysize) -#define cga_palette (*monitors[monitor_index_global].mon_cga_palette) -#define changeframecount (monitors[monitor_index_global].mon_changeframecount) -#define scrnsz_x (monitors[monitor_index_global].mon_scrnsz_x) -#define scrnsz_y (monitors[monitor_index_global].mon_scrnsz_y) -#define efscrnsz_y (monitors[monitor_index_global].mon_efscrnsz_y) -#define unscaled_size_x (monitors[monitor_index_global].mon_unscaled_size_x) -#define unscaled_size_y (monitors[monitor_index_global].mon_unscaled_size_y) -extern PALETTE cgapal, - cgapal_mono[6]; -//extern uint32_t pal_lookup[256]; -extern int video_fullscreen, - video_fullscreen_scale, - video_fullscreen_first; -extern uint8_t fontdat[2048][8]; -extern uint8_t fontdatm[2048][16]; -extern uint8_t fontdatw[512][32]; -extern uint8_t fontdat8x12[256][16]; -extern uint8_t fontdat12x18[256][36]; -extern dbcs_font_t *fontdatksc5601; -extern dbcs_font_t *fontdatksc5601_user; -extern uint32_t *video_6to8, - *video_8togs, - *video_8to32, - *video_15to32, - *video_16to32; -extern int enable_overscan; -extern int force_43; -extern int vid_resize; -extern int herc_blend; -extern int vid_cga_contrast; -extern int video_grayscale; -extern int video_graytype; - -extern double cpuclock; -extern int emu_fps, - frames; -extern int readflash; +#define video_res_x (monitors[monitor_index_global].mon_res_x) +#define video_res_y (monitors[monitor_index_global].mon_res_y) +#define video_bpp (monitors[monitor_index_global].mon_bpp) +#define xsize (monitors[monitor_index_global].mon_xsize) +#define ysize (monitors[monitor_index_global].mon_ysize) +#define cga_palette (*monitors[monitor_index_global].mon_cga_palette) +#define changeframecount (monitors[monitor_index_global].mon_changeframecount) +#define scrnsz_x (monitors[monitor_index_global].mon_scrnsz_x) +#define scrnsz_y (monitors[monitor_index_global].mon_scrnsz_y) +#define efscrnsz_y (monitors[monitor_index_global].mon_efscrnsz_y) +#define unscaled_size_x (monitors[monitor_index_global].mon_unscaled_size_x) +#define unscaled_size_y (monitors[monitor_index_global].mon_unscaled_size_y) +extern PALETTE cgapal, + cgapal_mono[6]; +// extern uint32_t pal_lookup[256]; +extern int video_fullscreen, + video_fullscreen_scale, + video_fullscreen_first; +extern uint8_t fontdat[2048][8]; +extern uint8_t fontdatm[2048][16]; +extern uint8_t fontdatw[512][32]; +extern uint8_t fontdat8x12[256][16]; +extern uint8_t fontdat12x18[256][36]; +extern dbcs_font_t *fontdatksc5601; +extern dbcs_font_t *fontdatksc5601_user; +extern uint32_t *video_6to8, + *video_8togs, + *video_8to32, + *video_15to32, + *video_16to32; +extern int enable_overscan; +extern int force_43; +extern int vid_resize; +extern int herc_blend; +extern int vid_cga_contrast; +extern int video_grayscale; +extern int video_graytype; +extern double cpuclock; +extern int emu_fps, + frames; +extern int readflash; /* Function handler pointers. */ -extern void (*video_recalctimings)(void); -extern void video_screenshot_monitor(uint32_t *buf, int start_x, int start_y, int row_len, int monitor_index); -extern void video_screenshot(uint32_t *buf, int start_x, int start_y, int row_len); +extern void (*video_recalctimings)(void); +extern void video_screenshot_monitor(uint32_t *buf, int start_x, int start_y, int row_len, int monitor_index); +extern void video_screenshot(uint32_t *buf, int start_x, int start_y, int row_len); #ifdef _WIN32 -extern void * __cdecl (*video_copy)(void *_Dst, const void *_Src, size_t _Size); -extern void * __cdecl video_transform_copy(void *_Dst, const void *_Src, size_t _Size); +extern void *__cdecl (*video_copy)(void *_Dst, const void *_Src, size_t _Size); +extern void *__cdecl video_transform_copy(void *_Dst, const void *_Src, size_t _Size); #else -extern void * (*video_copy)(void *__restrict _Dst, const void *__restrict _Src, size_t _Size); -extern void * video_transform_copy(void *__restrict _Dst, const void *__restrict _Src, size_t _Size); +extern void *(*video_copy)(void *__restrict _Dst, const void *__restrict _Src, size_t _Size); +extern void *video_transform_copy(void *__restrict _Dst, const void *__restrict _Src, size_t _Size); #endif - /* Table functions. */ -extern int video_card_available(int card); +extern int video_card_available(int card); #ifdef EMU_DEVICE_H -extern const device_t *video_card_getdevice(int card); +extern const device_t *video_card_getdevice(int card); #endif -extern int video_card_has_config(int card); -extern char *video_get_internal_name(int card); -extern int video_get_video_from_internal_name(char *s); -extern int video_card_get_flags(int card); -extern int video_is_mda(void); -extern int video_is_cga(void); -extern int video_is_ega_vga(void); -extern void video_inform_monitor(int type, const video_timings_t *ptr, int monitor_index); -extern int video_get_type_monitor(int monitor_index); +extern int video_card_has_config(int card); +extern char *video_get_internal_name(int card); +extern int video_get_video_from_internal_name(char *s); +extern int video_card_get_flags(int card); +extern int video_is_mda(void); +extern int video_is_cga(void); +extern int video_is_ega_vga(void); +extern void video_inform_monitor(int type, const video_timings_t *ptr, int monitor_index); +extern int video_get_type_monitor(int monitor_index); +extern void video_setblit(void (*blit)(int, int, int, int, int)); +extern void video_blend(int x, int y); +extern void video_blit_memtoscreen_8(int x, int y, int w, int h); +extern void video_blend_monitor(int x, int y, int monitor_index); +extern void video_blit_memtoscreen_8_monitor(int x, int y, int w, int h, int monitor_index); +extern void video_blit_memtoscreen_monitor(int x, int y, int w, int h, int monitor_index); +extern void video_blit_complete_monitor(int monitor_index); +extern void video_wait_for_blit_monitor(int monitor_index); +extern void video_wait_for_buffer_monitor(int monitor_index); -extern void video_setblit(void(*blit)(int,int,int,int,int)); -extern void video_blend(int x, int y); -extern void video_blit_memtoscreen_8(int x, int y, int w, int h); -extern void video_blend_monitor(int x, int y, int monitor_index); -extern void video_blit_memtoscreen_8_monitor(int x, int y, int w, int h, int monitor_index); -extern void video_blit_memtoscreen_monitor(int x, int y, int w, int h, int monitor_index); -extern void video_blit_complete_monitor(int monitor_index); -extern void video_wait_for_blit_monitor(int monitor_index); -extern void video_wait_for_buffer_monitor(int monitor_index); +extern bitmap_t *create_bitmap(int w, int h); +extern void destroy_bitmap(bitmap_t *b); +extern void cgapal_rebuild_monitor(int monitor_index); +extern void hline(bitmap_t *b, int x1, int y, int x2, uint32_t col); +extern void updatewindowsize(int x, int y); -extern bitmap_t *create_bitmap(int w, int h); -extern void destroy_bitmap(bitmap_t *b); -extern void cgapal_rebuild_monitor(int monitor_index); -extern void hline(bitmap_t *b, int x1, int y, int x2, uint32_t col); -extern void updatewindowsize(int x, int y); +extern void video_monitor_init(int); +extern void video_monitor_close(int); +extern void video_init(void); +extern void video_close(void); +extern void video_reset_close(void); +extern void video_pre_reset(int card); +extern void video_reset(int card); +extern uint8_t video_force_resize_get_monitor(int monitor_index); +extern void video_force_resize_set_monitor(uint8_t res, int monitor_index); +extern void video_update_timing(void); -extern void video_monitor_init(int); -extern void video_monitor_close(int); -extern void video_init(void); -extern void video_close(void); -extern void video_reset_close(void); -extern void video_pre_reset(int card); -extern void video_reset(int card); -extern uint8_t video_force_resize_get_monitor(int monitor_index); -extern void video_force_resize_set_monitor(uint8_t res, int monitor_index); -extern void video_update_timing(void); +extern void loadfont_ex(char *s, int format, int offset); +extern void loadfont(char *s, int format); -extern void loadfont_ex(char *s, int format, int offset); -extern void loadfont(char *s, int format); +extern int get_actual_size_x(void); +extern int get_actual_size_y(void); -extern int get_actual_size_x(void); -extern int get_actual_size_y(void); +extern uint32_t video_color_transform(uint32_t color); -extern uint32_t video_color_transform(uint32_t color); - -extern void agpgart_set_aperture(void *handle, uint32_t base, uint32_t size, int enable); -extern void agpgart_set_gart(void *handle, uint32_t base); +extern void agpgart_set_aperture(void *handle, uint32_t base, uint32_t size, int enable); +extern void agpgart_set_gart(void *handle, uint32_t base); #define video_inform(type, video_timings_ptr) video_inform_monitor(type, video_timings_ptr, monitor_index_global) -#define video_get_type() video_get_type_monitor(0) -#define video_blend(x, y) video_blend_monitor(x, y, monitor_index_global) -#define video_blit_memtoscreen(x, y, w, h) video_blit_memtoscreen_monitor(x, y, w, h, monitor_index_global) -#define video_blit_memtoscreen_8(x, y, w, h) video_blit_memtoscreen_8_monitor(x, y, w, h, monitor_index_global) -#define video_blit_complete() video_blit_complete_monitor(monitor_index_global) -#define video_wait_for_blit() video_wait_for_blit_monitor(monitor_index_global) -#define video_wait_for_buffer() video_wait_for_buffer_monitor(monitor_index_global) -#define cgapal_rebuild() cgapal_rebuild_monitor(monitor_index_global) -#define video_force_resize_get() video_force_resize_get_monitor(monitor_index_global) -#define video_force_resize_set(val) video_force_resize_set_monitor(val, monitor_index_global) +#define video_get_type() video_get_type_monitor(0) +#define video_blend(x, y) video_blend_monitor(x, y, monitor_index_global) +#define video_blit_memtoscreen(x, y, w, h) video_blit_memtoscreen_monitor(x, y, w, h, monitor_index_global) +#define video_blit_memtoscreen_8(x, y, w, h) video_blit_memtoscreen_8_monitor(x, y, w, h, monitor_index_global) +#define video_blit_complete() video_blit_complete_monitor(monitor_index_global) +#define video_wait_for_blit() video_wait_for_blit_monitor(monitor_index_global) +#define video_wait_for_buffer() video_wait_for_buffer_monitor(monitor_index_global) +#define cgapal_rebuild() cgapal_rebuild_monitor(monitor_index_global) +#define video_force_resize_get() video_force_resize_get_monitor(monitor_index_global) +#define video_force_resize_set(val) video_force_resize_set_monitor(val, monitor_index_global) #ifdef __cplusplus } #endif - #ifdef EMU_DEVICE_H /* IBM XGA */ extern void xga_device_add(void); @@ -298,9 +289,9 @@ extern const device_t mach64gx_pci_device; extern const device_t mach64vt2_device; /* ATi 18800 */ -#if defined(DEV_BRANCH) && defined(USE_VGAWONDER) +# if defined(DEV_BRANCH) && defined(USE_VGAWONDER) extern const device_t ati18800_wonder_device; -#endif +# endif extern const device_t ati18800_vga88_device; extern const device_t ati18800_device; @@ -310,9 +301,9 @@ extern const device_t ati28800k_device; extern const device_t ati28800k_spc4620p_device; extern const device_t ati28800k_spc6033p_device; extern const device_t compaq_ati28800_device; -#if defined(DEV_BRANCH) && defined(USE_XL24) +# if defined(DEV_BRANCH) && defined(USE_XL24) extern const device_t ati28800_wonderxl24_device; -#endif +# endif /* Cirrus Logic GD54xx */ extern const device_t gd5401_isa_device; @@ -408,12 +399,12 @@ extern const device_t ht216_32_standalone_device; extern const device_t im1024_device; extern const device_t pgc_device; -#if defined(DEV_BRANCH) && defined(USE_MGA) +# if defined(DEV_BRANCH) && defined(USE_MGA) /* Matrox MGA */ extern const device_t millennium_device; extern const device_t mystique_device; extern const device_t mystique_220_device; -#endif +# endif /* Oak OTI-0x7 */ extern const device_t oti037c_device; @@ -541,4 +532,4 @@ extern const device_t wy700_device; extern const device_t agpgart_device; #endif -#endif /*EMU_VIDEO_H*/ +#endif /*EMU_VIDEO_H*/ diff --git a/src/include/86box/win.h b/src/include/86box/win.h index bb5a78990..ccd6e0f19 100644 --- a/src/include/86box/win.h +++ b/src/include/86box/win.h @@ -21,53 +21,53 @@ */ #ifndef PLAT_WIN_H -# define PLAT_WIN_H +#define PLAT_WIN_H -# define UNICODE -# define BITMAP WINDOWS_BITMAP -# if 0 -# ifdef _WIN32_WINNT -# undef _WIN32_WINNT -# define _WIN32_WINNT 0x0501 -# endif -# endif -# include -# include "resource.h" -# undef BITMAP +#define UNICODE +#define BITMAP WINDOWS_BITMAP +#if 0 +# ifdef _WIN32_WINNT +# undef _WIN32_WINNT +# define _WIN32_WINNT 0x0501 +# endif +#endif +#include "resource.h" +#include +#undef BITMAP /* DPI Awareness Context, copied from MinGW-w64 windef.h */ #ifndef _DPI_AWARENESS_CONTEXTS_ DECLARE_HANDLE(DPI_AWARENESS_CONTEXT); -#define DPI_AWARENESS_CONTEXT_UNAWARE ((DPI_AWARENESS_CONTEXT)-1) -#define DPI_AWARENESS_CONTEXT_SYSTEM_AWARE ((DPI_AWARENESS_CONTEXT)-2) -#define DPI_AWARENESS_CONTEXT_PER_MONITOR_AWARE ((DPI_AWARENESS_CONTEXT)-3) -#define DPI_AWARENESS_CONTEXT_PER_MONITOR_AWARE_V2 ((DPI_AWARENESS_CONTEXT)-4) -#define DPI_AWARENESS_CONTEXT_UNAWARE_GDISCALED ((DPI_AWARENESS_CONTEXT)-5) +# define DPI_AWARENESS_CONTEXT_UNAWARE ((DPI_AWARENESS_CONTEXT) -1) +# define DPI_AWARENESS_CONTEXT_SYSTEM_AWARE ((DPI_AWARENESS_CONTEXT) -2) +# define DPI_AWARENESS_CONTEXT_PER_MONITOR_AWARE ((DPI_AWARENESS_CONTEXT) -3) +# define DPI_AWARENESS_CONTEXT_PER_MONITOR_AWARE_V2 ((DPI_AWARENESS_CONTEXT) -4) +# define DPI_AWARENESS_CONTEXT_UNAWARE_GDISCALED ((DPI_AWARENESS_CONTEXT) -5) #endif #ifndef WM_DPICHANGED_AFTERPARENT -#define WM_DPICHANGED_AFTERPARENT 0x02E3 +# define WM_DPICHANGED_AFTERPARENT 0x02E3 #endif /* Class names and such. */ -#define CLASS_NAME L"86BoxMainWnd" -#define MENU_NAME L"MainMenu" -#define ACCEL_NAME L"MainAccel" -#define SUB_CLASS_NAME L"86BoxSubWnd" -#define SB_CLASS_NAME L"86BoxStatusBar" -#define SB_MENU_NAME L"StatusBarMenu" -#define FS_CLASS_NAME L"86BoxFullScreen" -#define SDL_CLASS_NAME L"86BoxSDLWnd" -#define SDL_SUB_CLASS_NAME L"86BoxSDLSubWnd" +#define CLASS_NAME L"86BoxMainWnd" +#define MENU_NAME L"MainMenu" +#define ACCEL_NAME L"MainAccel" +#define SUB_CLASS_NAME L"86BoxSubWnd" +#define SB_CLASS_NAME L"86BoxStatusBar" +#define SB_MENU_NAME L"StatusBarMenu" +#define FS_CLASS_NAME L"86BoxFullScreen" +#define SDL_CLASS_NAME L"86BoxSDLWnd" +#define SDL_SUB_CLASS_NAME L"86BoxSDLSubWnd" -#define CASSETTE_SUBMENU_NAME L"CassetteSubmenu" -#define CARTRIDGE_SUBMENU_NAME L"CartridgeSubmenu" -#define FLOPPY_SUBMENU_NAME L"FloppySubmenu" -#define CDROM_SUBMENU_NAME L"CdromSubmenu" -#define ZIP_SUBMENU_NAME L"ZIPSubmenu" -#define MO_SUBMENU_NAME L"MOSubmenu" +#define CASSETTE_SUBMENU_NAME L"CassetteSubmenu" +#define CARTRIDGE_SUBMENU_NAME L"CartridgeSubmenu" +#define FLOPPY_SUBMENU_NAME L"FloppySubmenu" +#define CDROM_SUBMENU_NAME L"CdromSubmenu" +#define ZIP_SUBMENU_NAME L"ZIPSubmenu" +#define MO_SUBMENU_NAME L"MOSubmenu" -#define VID_GL_SUBMENU L"VidGLSubMenu" +#define VID_GL_SUBMENU L"VidGLSubMenu" /* Application-specific window messages. @@ -75,185 +75,173 @@ DECLARE_HANDLE(DPI_AWARENESS_CONTEXT); and 0x8895 with WPARAM = followed by 0x8896 with WPARAM = 0. All shutdowns will send an 0x8897. */ -#define WM_LEAVEFULLSCREEN WM_USER -#define WM_SAVESETTINGS 0x8888 -#define WM_SHOWSETTINGS 0x8889 -#define WM_PAUSE 0x8890 -#define WM_SENDHWND 0x8891 -#define WM_HARDRESET 0x8892 -#define WM_SHUTDOWN 0x8893 -#define WM_CTRLALTDEL 0x8894 +#define WM_LEAVEFULLSCREEN WM_USER +#define WM_SAVESETTINGS 0x8888 +#define WM_SHOWSETTINGS 0x8889 +#define WM_PAUSE 0x8890 +#define WM_SENDHWND 0x8891 +#define WM_HARDRESET 0x8892 +#define WM_SHUTDOWN 0x8893 +#define WM_CTRLALTDEL 0x8894 /* Pause/resume status: WPARAM = 1 for paused, 0 for resumed. */ -#define WM_SENDSTATUS 0x8895 +#define WM_SENDSTATUS 0x8895 /* Dialog (Settings or message box) status: WPARAM = 1 for open, 0 for closed. */ -#define WM_SENDDLGSTATUS 0x8896 +#define WM_SENDDLGSTATUS 0x8896 /* The emulator has shut down. */ -#define WM_HAS_SHUTDOWN 0x8897 +#define WM_HAS_SHUTDOWN 0x8897 #ifdef USE_VNC -#define RENDERERS_NUM 5 +# define RENDERERS_NUM 5 #else -#define RENDERERS_NUM 4 +# define RENDERERS_NUM 4 #endif - #ifdef __cplusplus extern "C" { #endif -extern HINSTANCE hinstance; -extern HWND hwndMain, - hwndRender; -extern HANDLE ghMutex; -extern HICON hIcon[256]; -extern int dpi; -extern RECT oldclip; -extern int sbar_height, tbar_height, user_resize; -extern int acp_utf8; +extern HINSTANCE hinstance; +extern HWND hwndMain, + hwndRender; +extern HANDLE ghMutex; +extern HICON hIcon[256]; +extern int dpi; +extern RECT oldclip; +extern int sbar_height, tbar_height, user_resize; +extern int acp_utf8; // extern int status_is_open; -extern char openfilestring[512]; -extern WCHAR wopenfilestring[512]; +extern char openfilestring[512]; +extern WCHAR wopenfilestring[512]; -extern uint8_t filterindex; +extern uint8_t filterindex; - -extern void ResizeWindowByClientArea(HWND hwnd, int width, int height); +extern void ResizeWindowByClientArea(HWND hwnd, int width, int height); /* Emulator start/stop support functions. */ -extern void do_start(void); -extern void do_stop(void); +extern void do_start(void); +extern void do_stop(void); /* Internal platform support functions. */ -extern int has_language_changed(uint32_t id); -extern void set_language(uint32_t id); -extern int get_vidpause(void); -extern void show_cursor(int); +extern int has_language_changed(uint32_t id); +extern void set_language(uint32_t id); +extern int get_vidpause(void); +extern void show_cursor(int); -extern void keyboard_getkeymap(void); -extern void keyboard_handle(PRAWINPUT raw); +extern void keyboard_getkeymap(void); +extern void keyboard_handle(PRAWINPUT raw); -extern void win_mouse_init(void); -extern void win_mouse_close(void); -extern void win_mouse_handle(PRAWINPUT raw); +extern void win_mouse_init(void); +extern void win_mouse_close(void); +extern void win_mouse_handle(PRAWINPUT raw); -extern void win_joystick_handle(PRAWINPUT raw); +extern void win_joystick_handle(PRAWINPUT raw); -extern void win_notify_dlg_open(void); -extern void win_notify_dlg_closed(void); -extern int win_get_dpi(HWND hwnd); -extern int win_get_system_metrics(int i, int dpi); +extern void win_notify_dlg_open(void); +extern void win_notify_dlg_closed(void); +extern int win_get_dpi(HWND hwnd); +extern int win_get_system_metrics(int i, int dpi); -extern LPARAM win_get_string(int id); +extern LPARAM win_get_string(int id); -extern void win_clear_icon_set(); -extern void win_system_icon_set(); -extern void win_load_icon_set(); -extern void win_get_icons_path(char* path_root); +extern void win_clear_icon_set(); +extern void win_system_icon_set(); +extern void win_load_icon_set(); +extern void win_get_icons_path(char *path_root); -extern intptr_t fdd_type_to_icon(int type); +extern intptr_t fdd_type_to_icon(int type); #ifdef EMU_DEVICE_H -extern uint8_t deviceconfig_open(HWND hwnd, const device_t *device); -extern uint8_t deviceconfig_inst_open(HWND hwnd, const device_t *device, int inst); +extern uint8_t deviceconfig_open(HWND hwnd, const device_t *device); +extern uint8_t deviceconfig_inst_open(HWND hwnd, const device_t *device, int inst); #endif -extern uint8_t joystickconfig_open(HWND hwnd, int joy_nr, int type); +extern uint8_t joystickconfig_open(HWND hwnd, int joy_nr, int type); -extern int getfile(HWND hwnd, char *f, char *fn); -extern int getsfile(HWND hwnd, char *f, char *fn); - -extern void hard_disk_add_open(HWND hwnd, int is_existing); -extern int hard_disk_was_added(void); +extern int getfile(HWND hwnd, char *f, char *fn); +extern int getsfile(HWND hwnd, char *f, char *fn); +extern void hard_disk_add_open(HWND hwnd, int is_existing); +extern int hard_disk_was_added(void); /* Platform UI support functions. */ -extern int ui_init(int nCmdShow); - +extern int ui_init(int nCmdShow); /* Functions in win_about.c: */ -extern void AboutDialogCreate(HWND hwnd); - +extern void AboutDialogCreate(HWND hwnd); /* Functions in win_snd_gain.c: */ -extern void SoundGainDialogCreate(HWND hwnd); - +extern void SoundGainDialogCreate(HWND hwnd); /* Functions in win_new_floppy.c: */ -extern void NewFloppyDialogCreate(HWND hwnd, int id, int part); - +extern void NewFloppyDialogCreate(HWND hwnd, int id, int part); /* Functions in win_specify_dim.c: */ -extern void SpecifyDimensionsDialogCreate(HWND hwnd); +extern void SpecifyDimensionsDialogCreate(HWND hwnd); /* Functions in win_preferences.c: */ -extern void PreferencesDlgCreate(HWND hwnd); - +extern void PreferencesDlgCreate(HWND hwnd); /* Functions in win_settings.c: */ -#define SETTINGS_PAGE_MACHINE 0 -#define SETTINGS_PAGE_VIDEO 1 -#define SETTINGS_PAGE_INPUT 2 -#define SETTINGS_PAGE_SOUND 3 -#define SETTINGS_PAGE_NETWORK 4 -#define SETTINGS_PAGE_PORTS 5 -#define SETTINGS_PAGE_STORAGE 6 -#define SETTINGS_PAGE_HARD_DISKS 7 -#define SETTINGS_PAGE_FLOPPY_AND_CDROM_DRIVES 8 -#define SETTINGS_PAGE_OTHER_REMOVABLE_DEVICES 9 -#define SETTINGS_PAGE_PERIPHERALS 10 - -extern void win_settings_open(HWND hwnd); -extern void win_settings_open_ex(HWND hwnd, int category); +#define SETTINGS_PAGE_MACHINE 0 +#define SETTINGS_PAGE_VIDEO 1 +#define SETTINGS_PAGE_INPUT 2 +#define SETTINGS_PAGE_SOUND 3 +#define SETTINGS_PAGE_NETWORK 4 +#define SETTINGS_PAGE_PORTS 5 +#define SETTINGS_PAGE_STORAGE 6 +#define SETTINGS_PAGE_HARD_DISKS 7 +#define SETTINGS_PAGE_FLOPPY_AND_CDROM_DRIVES 8 +#define SETTINGS_PAGE_OTHER_REMOVABLE_DEVICES 9 +#define SETTINGS_PAGE_PERIPHERALS 10 +extern void win_settings_open(HWND hwnd); +extern void win_settings_open_ex(HWND hwnd, int category); /* Functions in win_stbar.c: */ -extern HWND hwndSBAR; -extern void StatusBarCreate(HWND hwndParent, uintptr_t idStatus, HINSTANCE hInst); -extern int MediaMenuHandler(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam); - +extern HWND hwndSBAR; +extern void StatusBarCreate(HWND hwndParent, uintptr_t idStatus, HINSTANCE hInst); +extern int MediaMenuHandler(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam); /* Functions in win_toolbar.c */ -extern HWND hwndRebar; -extern void ToolBarCreate(HWND hwndParent, HINSTANCE hInst); -extern void ToolBarLoadIcons(); -extern void ToolBarUpdatePause(int paused); - +extern HWND hwndRebar; +extern void ToolBarCreate(HWND hwndParent, HINSTANCE hInst); +extern void ToolBarLoadIcons(); +extern void ToolBarUpdatePause(int paused); /* Functions in win_dialog.c: */ /* Pass NULL in the title param to use the default title. */ -extern int file_dlg_w(HWND hwnd, WCHAR *f, WCHAR *fn, WCHAR *title, int save); -extern int file_dlg(HWND hwnd, WCHAR *f, char *fn, char *title, int save); -extern int file_dlg_mb(HWND hwnd, char *f, char *fn, char *title, int save); -extern int file_dlg_w_st(HWND hwnd, int i, WCHAR *fn, char *title, int save); -extern int file_dlg_st(HWND hwnd, int i, char *fn, char *title, int save); - -extern wchar_t *BrowseFolder(wchar_t *saved_path, wchar_t *title); +extern int file_dlg_w(HWND hwnd, WCHAR *f, WCHAR *fn, WCHAR *title, int save); +extern int file_dlg(HWND hwnd, WCHAR *f, char *fn, char *title, int save); +extern int file_dlg_mb(HWND hwnd, char *f, char *fn, char *title, int save); +extern int file_dlg_w_st(HWND hwnd, int i, WCHAR *fn, char *title, int save); +extern int file_dlg_st(HWND hwnd, int i, char *fn, char *title, int save); +extern wchar_t *BrowseFolder(wchar_t *saved_path, wchar_t *title); /* Functions in win_media_menu.c */ -extern void media_menu_init(); -extern void media_menu_reset(); -extern int media_menu_proc(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam); -extern HMENU media_menu_get_cassette(void); -extern HMENU media_menu_get_cartridge(int id); -extern HMENU media_menu_get_floppy(int id); -extern HMENU media_menu_get_cdrom(int id); -extern HMENU media_menu_get_zip(int id); -extern HMENU media_menu_get_mo(int id); -extern void media_menu_update_cassette(void); -extern void media_menu_update_cartridge(int id); -extern void media_menu_update_floppy(int id); -extern void media_menu_update_cdrom(int id); -extern void media_menu_update_zip(int id); -extern void media_menu_update_mo(int id); +extern void media_menu_init(); +extern void media_menu_reset(); +extern int media_menu_proc(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam); +extern HMENU media_menu_get_cassette(void); +extern HMENU media_menu_get_cartridge(int id); +extern HMENU media_menu_get_floppy(int id); +extern HMENU media_menu_get_cdrom(int id); +extern HMENU media_menu_get_zip(int id); +extern HMENU media_menu_get_mo(int id); +extern void media_menu_update_cassette(void); +extern void media_menu_update_cartridge(int id); +extern void media_menu_update_floppy(int id); +extern void media_menu_update_cdrom(int id); +extern void media_menu_update_zip(int id); +extern void media_menu_update_mo(int id); /* Functions in win_ui.c */ -extern HMENU menuMain; -extern void ResetAllMenus(); +extern HMENU menuMain; +extern void ResetAllMenus(); #ifdef __cplusplus } #endif -#endif /*PLAT_WIN_H*/ +#endif /*PLAT_WIN_H*/ diff --git a/src/include/86box/win_opengl.h b/src/include/86box/win_opengl.h index e05e99eb4..6192a68c1 100644 --- a/src/include/86box/win_opengl.h +++ b/src/include/86box/win_opengl.h @@ -19,8 +19,8 @@ #define UNICODE #include -extern int opengl_init(HWND hwnd); -extern int opengl_pause(void); +extern int opengl_init(HWND hwnd); +extern int opengl_pause(void); extern void opengl_close(void); extern void opengl_set_fs(int fs); extern void opengl_resize(int w, int h); diff --git a/src/include/86box/win_opengl_glslp.h b/src/include/86box/win_opengl_glslp.h index 9faf20705..83c14aaf9 100644 --- a/src/include/86box/win_opengl_glslp.h +++ b/src/include/86box/win_opengl_glslp.h @@ -18,7 +18,7 @@ #include -GLuint load_custom_shaders(const char* path); +GLuint load_custom_shaders(const char *path); GLuint load_default_shaders(); #endif /*!WIN_OPENGL_GLSLP_H*/ diff --git a/src/include/86box/win_sdl.h b/src/include/86box/win_sdl.h index bd510dbf1..52902034d 100644 --- a/src/include/86box/win_sdl.h +++ b/src/include/86box/win_sdl.h @@ -48,17 +48,16 @@ */ #ifndef WIN_SDL_H -# define WIN_SDL_H +#define WIN_SDL_H +extern void sdl_close(void); +extern int sdl_inits(HWND h); +extern int sdl_inith(HWND h); +extern int sdl_initho(HWND h); +extern int sdl_pause(void); +extern void sdl_resize(int x, int y); +extern void sdl_enable(int enable); +extern void sdl_set_fs(int fs); +extern void sdl_reload(void); -extern void sdl_close(void); -extern int sdl_inits(HWND h); -extern int sdl_inith(HWND h); -extern int sdl_initho(HWND h); -extern int sdl_pause(void); -extern void sdl_resize(int x, int y); -extern void sdl_enable(int enable); -extern void sdl_set_fs(int fs); -extern void sdl_reload(void); - -#endif /*WIN_SDL_H*/ +#endif /*WIN_SDL_H*/ diff --git a/src/lpt.c b/src/lpt.c index df8276ae1..269546c5d 100644 --- a/src/lpt.c +++ b/src/lpt.c @@ -13,26 +13,25 @@ #include <86box/prt_devs.h> #include <86box/net_plip.h> - -lpt_port_t lpt_ports[PARALLEL_MAX]; +lpt_port_t lpt_ports[PARALLEL_MAX]; const lpt_device_t lpt_none_device = { - .name = "None", + .name = "None", .internal_name = "none", - .init = NULL, - .close = NULL, - .write_data = NULL, - .write_ctrl = NULL, - .read_data = NULL, - .read_status = NULL, - .read_ctrl = NULL + .init = NULL, + .close = NULL, + .write_data = NULL, + .write_ctrl = NULL, + .read_data = NULL, + .read_status = NULL, + .read_ctrl = NULL }; static const struct { - const char *internal_name; + const char *internal_name; const lpt_device_t *device; } lpt_devices[] = { -// clang-format off + // clang-format off {"none", &lpt_none_device }, {"dss", &dss_device }, {"lpt_dac", &lpt_dac_device }, @@ -78,167 +77,157 @@ lpt_device_get_from_internal_name(char *s) return 0; } - void lpt_devices_init(void) { int i = 0; for (i = 0; i < PARALLEL_MAX; i++) { - lpt_ports[i].dt = (lpt_device_t *) lpt_devices[lpt_ports[i].device].device; + lpt_ports[i].dt = (lpt_device_t *) lpt_devices[lpt_ports[i].device].device; - if (lpt_ports[i].dt && lpt_ports[i].dt->init) - lpt_ports[i].priv = lpt_ports[i].dt->init(&lpt_ports[i]); + if (lpt_ports[i].dt && lpt_ports[i].dt->init) + lpt_ports[i].priv = lpt_ports[i].dt->init(&lpt_ports[i]); } } - void lpt_devices_close(void) { - int i = 0; + int i = 0; lpt_port_t *dev; for (i = 0; i < PARALLEL_MAX; i++) { - dev = &lpt_ports[i]; + dev = &lpt_ports[i]; - if (lpt_ports[i].dt && lpt_ports[i].dt->close) - dev->dt->close(dev->priv); + if (lpt_ports[i].dt && lpt_ports[i].dt->close) + dev->dt->close(dev->priv); dev->dt = NULL; } } - void lpt_write(uint16_t port, uint8_t val, void *priv) { lpt_port_t *dev = (lpt_port_t *) priv; switch (port & 3) { - case 0: - if (dev->dt && dev->dt->write_data && dev->priv) - dev->dt->write_data(val, dev->priv); - dev->dat = val; - break; + case 0: + if (dev->dt && dev->dt->write_data && dev->priv) + dev->dt->write_data(val, dev->priv); + dev->dat = val; + break; - case 1: - break; + case 1: + break; - case 2: - if (dev->dt && dev->dt->write_ctrl && dev->priv) - dev->dt->write_ctrl(val, dev->priv); - dev->ctrl = val; - dev->enable_irq = val & 0x10; - break; + case 2: + if (dev->dt && dev->dt->write_ctrl && dev->priv) + dev->dt->write_ctrl(val, dev->priv); + dev->ctrl = val; + dev->enable_irq = val & 0x10; + break; } } - uint8_t lpt_read(uint16_t port, void *priv) { - uint8_t ret = 0xff; + uint8_t ret = 0xff; lpt_port_t *dev = (lpt_port_t *) priv; switch (port & 3) { - case 0: - if (dev->dt && dev->dt->read_data && dev->priv) - ret = dev->dt->read_data(dev->priv); - else - ret = dev->dat; - break; + case 0: + if (dev->dt && dev->dt->read_data && dev->priv) + ret = dev->dt->read_data(dev->priv); + else + ret = dev->dat; + break; - case 1: - if (dev->dt && dev->dt->read_status && dev->priv) - ret = dev->dt->read_status(dev->priv) | 0x07; - else - ret = 0xdf; - break; + case 1: + if (dev->dt && dev->dt->read_status && dev->priv) + ret = dev->dt->read_status(dev->priv) | 0x07; + else + ret = 0xdf; + break; - case 2: - if (dev->dt && dev->dt->read_ctrl && dev->priv) - ret = (dev->dt->read_ctrl(dev->priv) & 0xef) | dev->enable_irq; - else - ret = 0xe0 | dev->ctrl | dev->enable_irq; - break; + case 2: + if (dev->dt && dev->dt->read_ctrl && dev->priv) + ret = (dev->dt->read_ctrl(dev->priv) & 0xef) | dev->enable_irq; + else + ret = 0xe0 | dev->ctrl | dev->enable_irq; + break; } return ret; } - void lpt_irq(void *priv, int raise) { lpt_port_t *dev = (lpt_port_t *) priv; if (dev->enable_irq && (dev->irq != 0xff)) { - if (raise) - picint(1 << dev->irq); - else - picintc(1 << dev->irq); + if (raise) + picint(1 << dev->irq); + else + picintc(1 << dev->irq); } } - void lpt_init(void) { - int i; + int i; uint16_t default_ports[PARALLEL_MAX] = { LPT1_ADDR, LPT2_ADDR, LPT_MDA_ADDR, LPT4_ADDR }; - uint8_t default_irqs[PARALLEL_MAX] = { LPT1_IRQ, LPT2_IRQ, LPT_MDA_IRQ, LPT4_IRQ }; + uint8_t default_irqs[PARALLEL_MAX] = { LPT1_IRQ, LPT2_IRQ, LPT_MDA_IRQ, LPT4_IRQ }; for (i = 0; i < PARALLEL_MAX; i++) { - lpt_ports[i].addr = 0xffff; - lpt_ports[i].irq = 0xff; - lpt_ports[i].enable_irq = 0x10; + lpt_ports[i].addr = 0xffff; + lpt_ports[i].irq = 0xff; + lpt_ports[i].enable_irq = 0x10; - if (lpt_ports[i].enabled) { - lpt_port_init(i, default_ports[i]); - lpt_port_irq(i, default_irqs[i]); - } + if (lpt_ports[i].enabled) { + lpt_port_init(i, default_ports[i]); + lpt_port_irq(i, default_irqs[i]); + } } } - void lpt_port_init(int i, uint16_t port) { if (lpt_ports[i].enabled) { - if (lpt_ports[i].addr != 0xffff) - io_removehandler(lpt_ports[i].addr, 0x0003, lpt_read, NULL, NULL, lpt_write, NULL, NULL, &lpt_ports[i]); - if (port != 0xffff) - io_sethandler(port, 0x0003, lpt_read, NULL, NULL, lpt_write, NULL, NULL, &lpt_ports[i]); - lpt_ports[i].addr = port; + if (lpt_ports[i].addr != 0xffff) + io_removehandler(lpt_ports[i].addr, 0x0003, lpt_read, NULL, NULL, lpt_write, NULL, NULL, &lpt_ports[i]); + if (port != 0xffff) + io_sethandler(port, 0x0003, lpt_read, NULL, NULL, lpt_write, NULL, NULL, &lpt_ports[i]); + lpt_ports[i].addr = port; } else - lpt_ports[i].addr = 0xffff; + lpt_ports[i].addr = 0xffff; } - void lpt_port_irq(int i, uint8_t irq) { if (lpt_ports[i].enabled) - lpt_ports[i].irq = irq; + lpt_ports[i].irq = irq; else - lpt_ports[i].irq = 0xff; + lpt_ports[i].irq = 0xff; } - void lpt_port_remove(int i) { if (lpt_ports[i].enabled && (lpt_ports[i].addr != 0xffff)) { - io_removehandler(lpt_ports[i].addr, 0x0003, lpt_read, NULL, NULL, lpt_write, NULL, NULL, &lpt_ports[i]); - lpt_ports[i].addr = 0xffff; + io_removehandler(lpt_ports[i].addr, 0x0003, lpt_read, NULL, NULL, lpt_write, NULL, NULL, &lpt_ports[i]); + lpt_ports[i].addr = 0xffff; } } - void lpt1_remove_ams(void) { if (lpt_ports[0].enabled) - io_removehandler(lpt_ports[0].addr + 1, 0x0002, lpt_read, NULL, NULL, lpt_write, NULL, NULL, &lpt_ports[0]); + io_removehandler(lpt_ports[0].addr + 1, 0x0002, lpt_read, NULL, NULL, lpt_write, NULL, NULL, &lpt_ports[0]); } diff --git a/src/win/glad.c b/src/win/glad.c index 8e0da2f36..f3ceb1148 100644 --- a/src/win/glad.c +++ b/src/win/glad.c @@ -21,124 +21,130 @@ https://glad.dav1d.de/#profile=core&language=c&specification=gl&loader=on&api=gl%3D3.0&extensions=GL_ARB_buffer_storage&extensions=GL_ARB_debug_output&extensions=GL_ARB_sync */ +#include #include #include #include -#include -static void* get_proc(const char *namez); +static void *get_proc(const char *namez); #if defined(_WIN32) || defined(__CYGWIN__) -#ifndef _WINDOWS_ -#undef APIENTRY -#endif -#include +# ifndef _WINDOWS_ +# undef APIENTRY +# endif +# include static HMODULE libGL; -typedef void* (APIENTRYP PFNWGLGETPROCADDRESSPROC_PRIVATE)(const char*); +typedef void *(APIENTRYP PFNWGLGETPROCADDRESSPROC_PRIVATE)(const char *); static PFNWGLGETPROCADDRESSPROC_PRIVATE gladGetProcAddressPtr; -#ifdef _MSC_VER -#ifdef __has_include - #if __has_include() - #define HAVE_WINAPIFAMILY 1 - #endif -#elif _MSC_VER >= 1700 && !_USING_V110_SDK71_ - #define HAVE_WINAPIFAMILY 1 -#endif -#endif +# ifdef _MSC_VER +# ifdef __has_include +# if __has_include() +# define HAVE_WINAPIFAMILY 1 +# endif +# elif _MSC_VER >= 1700 && !_USING_V110_SDK71_ +# define HAVE_WINAPIFAMILY 1 +# endif +# endif -#ifdef HAVE_WINAPIFAMILY - #include - #if !WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_DESKTOP) && WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_APP) - #define IS_UWP 1 - #endif -#endif +# ifdef HAVE_WINAPIFAMILY +# include +# if !WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_DESKTOP) && WINAPI_FAMILY_PARTITION(WINAPI_PARTITION_APP) +# define IS_UWP 1 +# endif +# endif -static -int open_gl(void) { -#ifndef IS_UWP +static int +open_gl(void) +{ +# ifndef IS_UWP libGL = LoadLibraryW(L"opengl32.dll"); - if(libGL != NULL) { - void (* tmp)(void); - tmp = (void(*)(void)) GetProcAddress(libGL, "wglGetProcAddress"); + if (libGL != NULL) { + void (*tmp)(void); + tmp = (void (*)(void)) GetProcAddress(libGL, "wglGetProcAddress"); gladGetProcAddressPtr = (PFNWGLGETPROCADDRESSPROC_PRIVATE) tmp; return gladGetProcAddressPtr != NULL; } -#endif +# endif return 0; } -static -void close_gl(void) { - if(libGL != NULL) { +static void +close_gl(void) +{ + if (libGL != NULL) { FreeLibrary((HMODULE) libGL); libGL = NULL; } } #else -#include -static void* libGL; +# include +static void *libGL; -#if !defined(__APPLE__) && !defined(__HAIKU__) -typedef void* (APIENTRYP PFNGLXGETPROCADDRESSPROC_PRIVATE)(const char*); +# if !defined(__APPLE__) && !defined(__HAIKU__) +typedef void *(APIENTRYP PFNGLXGETPROCADDRESSPROC_PRIVATE)(const char *); static PFNGLXGETPROCADDRESSPROC_PRIVATE gladGetProcAddressPtr; -#endif +# endif -static -int open_gl(void) { -#ifdef __APPLE__ +static int +open_gl(void) +{ +# ifdef __APPLE__ static const char *NAMES[] = { "../Frameworks/OpenGL.framework/OpenGL", "/Library/Frameworks/OpenGL.framework/OpenGL", "/System/Library/Frameworks/OpenGL.framework/OpenGL", "/System/Library/Frameworks/OpenGL.framework/Versions/Current/OpenGL" }; -#else - static const char *NAMES[] = {"libGL.so.1", "libGL.so"}; -#endif +# else + static const char *NAMES[] = { "libGL.so.1", "libGL.so" }; +# endif unsigned int index = 0; - for(index = 0; index < (sizeof(NAMES) / sizeof(NAMES[0])); index++) { + for (index = 0; index < (sizeof(NAMES) / sizeof(NAMES[0])); index++) { libGL = dlopen(NAMES[index], RTLD_NOW | RTLD_GLOBAL); - if(libGL != NULL) { -#if defined(__APPLE__) || defined(__HAIKU__) + if (libGL != NULL) { +# if defined(__APPLE__) || defined(__HAIKU__) return 1; -#else - gladGetProcAddressPtr = (PFNGLXGETPROCADDRESSPROC_PRIVATE)dlsym(libGL, - "glXGetProcAddressARB"); +# else + gladGetProcAddressPtr = (PFNGLXGETPROCADDRESSPROC_PRIVATE) dlsym(libGL, + "glXGetProcAddressARB"); return gladGetProcAddressPtr != NULL; -#endif +# endif } } return 0; } -static -void close_gl(void) { - if(libGL != NULL) { +static void +close_gl(void) +{ + if (libGL != NULL) { dlclose(libGL); libGL = NULL; } } #endif -static -void* get_proc(const char *namez) { - void* result = NULL; - if(libGL == NULL) return NULL; +static void * +get_proc(const char *namez) +{ + void *result = NULL; + if (libGL == NULL) + return NULL; #if !defined(__APPLE__) && !defined(__HAIKU__) - if(gladGetProcAddressPtr != NULL) { + if (gladGetProcAddressPtr != NULL) { result = gladGetProcAddressPtr(namez); } #endif - if(result == NULL) { + if (result == NULL) { #if defined(_WIN32) || defined(__CYGWIN__) - result = (void*)GetProcAddress((HMODULE) libGL, namez); + result = (void *) GetProcAddress((HMODULE) libGL, namez); #else result = dlsym(libGL, namez); #endif @@ -147,10 +153,12 @@ void* get_proc(const char *namez) { return result; } -int gladLoadGL(void) { +int +gladLoadGL(void) +{ int status = 0; - if(open_gl()) { + if (open_gl()) { status = gladLoadGLLoader(&get_proc); close_gl(); } @@ -161,21 +169,23 @@ int gladLoadGL(void) { struct gladGLversionStruct GLVersion = { 0, 0 }; #if defined(GL_ES_VERSION_3_0) || defined(GL_VERSION_3_0) -#define _GLAD_IS_SOME_NEW_VERSION 1 +# define _GLAD_IS_SOME_NEW_VERSION 1 #endif static int max_loaded_major; static int max_loaded_minor; -static const char *exts = NULL; -static int num_exts_i = 0; -static char **exts_i = NULL; +static const char *exts = NULL; +static int num_exts_i = 0; +static char **exts_i = NULL; -static int get_exts(void) { +static int +get_exts(void) +{ #ifdef _GLAD_IS_SOME_NEW_VERSION - if(max_loaded_major < 3) { + if (max_loaded_major < 3) { #endif - exts = (const char *)glGetString(GL_EXTENSIONS); + exts = (const char *) glGetString(GL_EXTENSIONS); #ifdef _GLAD_IS_SOME_NEW_VERSION } else { unsigned int index; @@ -183,20 +193,20 @@ static int get_exts(void) { num_exts_i = 0; glGetIntegerv(GL_NUM_EXTENSIONS, &num_exts_i); if (num_exts_i > 0) { - exts_i = (char **)malloc((size_t)num_exts_i * (sizeof *exts_i)); + exts_i = (char **) malloc((size_t) num_exts_i * (sizeof *exts_i)); } if (exts_i == NULL) { return 0; } - for(index = 0; index < (unsigned)num_exts_i; index++) { - const char *gl_str_tmp = (const char*)glGetStringi(GL_EXTENSIONS, index); - size_t len = strlen(gl_str_tmp); + for (index = 0; index < (unsigned) num_exts_i; index++) { + const char *gl_str_tmp = (const char *) glGetStringi(GL_EXTENSIONS, index); + size_t len = strlen(gl_str_tmp); - char *local_str = (char*)malloc((len+1) * sizeof(char)); - if(local_str != NULL) { - memcpy(local_str, gl_str_tmp, (len+1) * sizeof(char)); + char *local_str = (char *) malloc((len + 1) * sizeof(char)); + if (local_str != NULL) { + memcpy(local_str, gl_str_tmp, (len + 1) * sizeof(char)); } exts_i[index] = local_str; } @@ -205,38 +215,41 @@ static int get_exts(void) { return 1; } -static void free_exts(void) { +static void +free_exts(void) +{ if (exts_i != NULL) { int index; - for(index = 0; index < num_exts_i; index++) { - free((char *)exts_i[index]); + for (index = 0; index < num_exts_i; index++) { + free((char *) exts_i[index]); } - free((void *)exts_i); + free((void *) exts_i); exts_i = NULL; } } -static int has_ext(const char *ext) { +static int +has_ext(const char *ext) +{ #ifdef _GLAD_IS_SOME_NEW_VERSION - if(max_loaded_major < 3) { + if (max_loaded_major < 3) { #endif const char *extensions; const char *loc; const char *terminator; extensions = exts; - if(extensions == NULL || ext == NULL) { + if (extensions == NULL || ext == NULL) { return 0; } - while(1) { + while (1) { loc = strstr(extensions, ext); - if(loc == NULL) { + if (loc == NULL) { return 0; } terminator = loc + strlen(ext); - if((loc == extensions || *(loc - 1) == ' ') && - (*terminator == ' ' || *terminator == '\0')) { + if ((loc == extensions || *(loc - 1) == ' ') && (*terminator == ' ' || *terminator == '\0')) { return 1; } extensions = terminator; @@ -244,11 +257,12 @@ static int has_ext(const char *ext) { #ifdef _GLAD_IS_SOME_NEW_VERSION } else { int index; - if(exts_i == NULL) return 0; - for(index = 0; index < num_exts_i; index++) { + if (exts_i == NULL) + return 0; + for (index = 0; index < num_exts_i; index++) { const char *e = exts_i[index]; - if(exts_i[index] != NULL && strcmp(e, ext) == 0) { + if (exts_i[index] != NULL && strcmp(e, ext) == 0) { return 1; } } @@ -257,658 +271,699 @@ static int has_ext(const char *ext) { return 0; } -int GLAD_GL_VERSION_1_0 = 0; -int GLAD_GL_VERSION_1_1 = 0; -int GLAD_GL_VERSION_1_2 = 0; -int GLAD_GL_VERSION_1_3 = 0; -int GLAD_GL_VERSION_1_4 = 0; -int GLAD_GL_VERSION_1_5 = 0; -int GLAD_GL_VERSION_2_0 = 0; -int GLAD_GL_VERSION_2_1 = 0; -int GLAD_GL_VERSION_3_0 = 0; -PFNGLACTIVETEXTUREPROC glad_glActiveTexture = NULL; -PFNGLATTACHSHADERPROC glad_glAttachShader = NULL; -PFNGLBEGINCONDITIONALRENDERPROC glad_glBeginConditionalRender = NULL; -PFNGLBEGINQUERYPROC glad_glBeginQuery = NULL; -PFNGLBEGINTRANSFORMFEEDBACKPROC glad_glBeginTransformFeedback = NULL; -PFNGLBINDATTRIBLOCATIONPROC glad_glBindAttribLocation = NULL; -PFNGLBINDBUFFERPROC glad_glBindBuffer = NULL; -PFNGLBINDBUFFERBASEPROC glad_glBindBufferBase = NULL; -PFNGLBINDBUFFERRANGEPROC glad_glBindBufferRange = NULL; -PFNGLBINDFRAGDATALOCATIONPROC glad_glBindFragDataLocation = NULL; -PFNGLBINDFRAMEBUFFERPROC glad_glBindFramebuffer = NULL; -PFNGLBINDRENDERBUFFERPROC glad_glBindRenderbuffer = NULL; -PFNGLBINDTEXTUREPROC glad_glBindTexture = NULL; -PFNGLBINDVERTEXARRAYPROC glad_glBindVertexArray = NULL; -PFNGLBLENDCOLORPROC glad_glBlendColor = NULL; -PFNGLBLENDEQUATIONPROC glad_glBlendEquation = NULL; -PFNGLBLENDEQUATIONSEPARATEPROC glad_glBlendEquationSeparate = NULL; -PFNGLBLENDFUNCPROC glad_glBlendFunc = NULL; -PFNGLBLENDFUNCSEPARATEPROC glad_glBlendFuncSeparate = NULL; -PFNGLBLITFRAMEBUFFERPROC glad_glBlitFramebuffer = NULL; -PFNGLBUFFERDATAPROC glad_glBufferData = NULL; -PFNGLBUFFERSUBDATAPROC glad_glBufferSubData = NULL; -PFNGLCHECKFRAMEBUFFERSTATUSPROC glad_glCheckFramebufferStatus = NULL; -PFNGLCLAMPCOLORPROC glad_glClampColor = NULL; -PFNGLCLEARPROC glad_glClear = NULL; -PFNGLCLEARBUFFERFIPROC glad_glClearBufferfi = NULL; -PFNGLCLEARBUFFERFVPROC glad_glClearBufferfv = NULL; -PFNGLCLEARBUFFERIVPROC glad_glClearBufferiv = NULL; -PFNGLCLEARBUFFERUIVPROC glad_glClearBufferuiv = NULL; -PFNGLCLEARCOLORPROC glad_glClearColor = NULL; -PFNGLCLEARDEPTHPROC glad_glClearDepth = NULL; -PFNGLCLEARSTENCILPROC glad_glClearStencil = NULL; -PFNGLCOLORMASKPROC glad_glColorMask = NULL; -PFNGLCOLORMASKIPROC glad_glColorMaski = NULL; -PFNGLCOMPILESHADERPROC glad_glCompileShader = NULL; -PFNGLCOMPRESSEDTEXIMAGE1DPROC glad_glCompressedTexImage1D = NULL; -PFNGLCOMPRESSEDTEXIMAGE2DPROC glad_glCompressedTexImage2D = NULL; -PFNGLCOMPRESSEDTEXIMAGE3DPROC glad_glCompressedTexImage3D = NULL; -PFNGLCOMPRESSEDTEXSUBIMAGE1DPROC glad_glCompressedTexSubImage1D = NULL; -PFNGLCOMPRESSEDTEXSUBIMAGE2DPROC glad_glCompressedTexSubImage2D = NULL; -PFNGLCOMPRESSEDTEXSUBIMAGE3DPROC glad_glCompressedTexSubImage3D = NULL; -PFNGLCOPYTEXIMAGE1DPROC glad_glCopyTexImage1D = NULL; -PFNGLCOPYTEXIMAGE2DPROC glad_glCopyTexImage2D = NULL; -PFNGLCOPYTEXSUBIMAGE1DPROC glad_glCopyTexSubImage1D = NULL; -PFNGLCOPYTEXSUBIMAGE2DPROC glad_glCopyTexSubImage2D = NULL; -PFNGLCOPYTEXSUBIMAGE3DPROC glad_glCopyTexSubImage3D = NULL; -PFNGLCREATEPROGRAMPROC glad_glCreateProgram = NULL; -PFNGLCREATESHADERPROC glad_glCreateShader = NULL; -PFNGLCULLFACEPROC glad_glCullFace = NULL; -PFNGLDELETEBUFFERSPROC glad_glDeleteBuffers = NULL; -PFNGLDELETEFRAMEBUFFERSPROC glad_glDeleteFramebuffers = NULL; -PFNGLDELETEPROGRAMPROC glad_glDeleteProgram = NULL; -PFNGLDELETEQUERIESPROC glad_glDeleteQueries = NULL; -PFNGLDELETERENDERBUFFERSPROC glad_glDeleteRenderbuffers = NULL; -PFNGLDELETESHADERPROC glad_glDeleteShader = NULL; -PFNGLDELETETEXTURESPROC glad_glDeleteTextures = NULL; -PFNGLDELETEVERTEXARRAYSPROC glad_glDeleteVertexArrays = NULL; -PFNGLDEPTHFUNCPROC glad_glDepthFunc = NULL; -PFNGLDEPTHMASKPROC glad_glDepthMask = NULL; -PFNGLDEPTHRANGEPROC glad_glDepthRange = NULL; -PFNGLDETACHSHADERPROC glad_glDetachShader = NULL; -PFNGLDISABLEPROC glad_glDisable = NULL; -PFNGLDISABLEVERTEXATTRIBARRAYPROC glad_glDisableVertexAttribArray = NULL; -PFNGLDISABLEIPROC glad_glDisablei = NULL; -PFNGLDRAWARRAYSPROC glad_glDrawArrays = NULL; -PFNGLDRAWBUFFERPROC glad_glDrawBuffer = NULL; -PFNGLDRAWBUFFERSPROC glad_glDrawBuffers = NULL; -PFNGLDRAWELEMENTSPROC glad_glDrawElements = NULL; -PFNGLDRAWRANGEELEMENTSPROC glad_glDrawRangeElements = NULL; -PFNGLENABLEPROC glad_glEnable = NULL; -PFNGLENABLEVERTEXATTRIBARRAYPROC glad_glEnableVertexAttribArray = NULL; -PFNGLENABLEIPROC glad_glEnablei = NULL; -PFNGLENDCONDITIONALRENDERPROC glad_glEndConditionalRender = NULL; -PFNGLENDQUERYPROC glad_glEndQuery = NULL; -PFNGLENDTRANSFORMFEEDBACKPROC glad_glEndTransformFeedback = NULL; -PFNGLFINISHPROC glad_glFinish = NULL; -PFNGLFLUSHPROC glad_glFlush = NULL; -PFNGLFLUSHMAPPEDBUFFERRANGEPROC glad_glFlushMappedBufferRange = NULL; -PFNGLFRAMEBUFFERRENDERBUFFERPROC glad_glFramebufferRenderbuffer = NULL; -PFNGLFRAMEBUFFERTEXTURE1DPROC glad_glFramebufferTexture1D = NULL; -PFNGLFRAMEBUFFERTEXTURE2DPROC glad_glFramebufferTexture2D = NULL; -PFNGLFRAMEBUFFERTEXTURE3DPROC glad_glFramebufferTexture3D = NULL; -PFNGLFRAMEBUFFERTEXTURELAYERPROC glad_glFramebufferTextureLayer = NULL; -PFNGLFRONTFACEPROC glad_glFrontFace = NULL; -PFNGLGENBUFFERSPROC glad_glGenBuffers = NULL; -PFNGLGENFRAMEBUFFERSPROC glad_glGenFramebuffers = NULL; -PFNGLGENQUERIESPROC glad_glGenQueries = NULL; -PFNGLGENRENDERBUFFERSPROC glad_glGenRenderbuffers = NULL; -PFNGLGENTEXTURESPROC glad_glGenTextures = NULL; -PFNGLGENVERTEXARRAYSPROC glad_glGenVertexArrays = NULL; -PFNGLGENERATEMIPMAPPROC glad_glGenerateMipmap = NULL; -PFNGLGETACTIVEATTRIBPROC glad_glGetActiveAttrib = NULL; -PFNGLGETACTIVEUNIFORMPROC glad_glGetActiveUniform = NULL; -PFNGLGETATTACHEDSHADERSPROC glad_glGetAttachedShaders = NULL; -PFNGLGETATTRIBLOCATIONPROC glad_glGetAttribLocation = NULL; -PFNGLGETBOOLEANI_VPROC glad_glGetBooleani_v = NULL; -PFNGLGETBOOLEANVPROC glad_glGetBooleanv = NULL; -PFNGLGETBUFFERPARAMETERIVPROC glad_glGetBufferParameteriv = NULL; -PFNGLGETBUFFERPOINTERVPROC glad_glGetBufferPointerv = NULL; -PFNGLGETBUFFERSUBDATAPROC glad_glGetBufferSubData = NULL; -PFNGLGETCOMPRESSEDTEXIMAGEPROC glad_glGetCompressedTexImage = NULL; -PFNGLGETDOUBLEVPROC glad_glGetDoublev = NULL; -PFNGLGETERRORPROC glad_glGetError = NULL; -PFNGLGETFLOATVPROC glad_glGetFloatv = NULL; -PFNGLGETFRAGDATALOCATIONPROC glad_glGetFragDataLocation = NULL; +int GLAD_GL_VERSION_1_0 = 0; +int GLAD_GL_VERSION_1_1 = 0; +int GLAD_GL_VERSION_1_2 = 0; +int GLAD_GL_VERSION_1_3 = 0; +int GLAD_GL_VERSION_1_4 = 0; +int GLAD_GL_VERSION_1_5 = 0; +int GLAD_GL_VERSION_2_0 = 0; +int GLAD_GL_VERSION_2_1 = 0; +int GLAD_GL_VERSION_3_0 = 0; +PFNGLACTIVETEXTUREPROC glad_glActiveTexture = NULL; +PFNGLATTACHSHADERPROC glad_glAttachShader = NULL; +PFNGLBEGINCONDITIONALRENDERPROC glad_glBeginConditionalRender = NULL; +PFNGLBEGINQUERYPROC glad_glBeginQuery = NULL; +PFNGLBEGINTRANSFORMFEEDBACKPROC glad_glBeginTransformFeedback = NULL; +PFNGLBINDATTRIBLOCATIONPROC glad_glBindAttribLocation = NULL; +PFNGLBINDBUFFERPROC glad_glBindBuffer = NULL; +PFNGLBINDBUFFERBASEPROC glad_glBindBufferBase = NULL; +PFNGLBINDBUFFERRANGEPROC glad_glBindBufferRange = NULL; +PFNGLBINDFRAGDATALOCATIONPROC glad_glBindFragDataLocation = NULL; +PFNGLBINDFRAMEBUFFERPROC glad_glBindFramebuffer = NULL; +PFNGLBINDRENDERBUFFERPROC glad_glBindRenderbuffer = NULL; +PFNGLBINDTEXTUREPROC glad_glBindTexture = NULL; +PFNGLBINDVERTEXARRAYPROC glad_glBindVertexArray = NULL; +PFNGLBLENDCOLORPROC glad_glBlendColor = NULL; +PFNGLBLENDEQUATIONPROC glad_glBlendEquation = NULL; +PFNGLBLENDEQUATIONSEPARATEPROC glad_glBlendEquationSeparate = NULL; +PFNGLBLENDFUNCPROC glad_glBlendFunc = NULL; +PFNGLBLENDFUNCSEPARATEPROC glad_glBlendFuncSeparate = NULL; +PFNGLBLITFRAMEBUFFERPROC glad_glBlitFramebuffer = NULL; +PFNGLBUFFERDATAPROC glad_glBufferData = NULL; +PFNGLBUFFERSUBDATAPROC glad_glBufferSubData = NULL; +PFNGLCHECKFRAMEBUFFERSTATUSPROC glad_glCheckFramebufferStatus = NULL; +PFNGLCLAMPCOLORPROC glad_glClampColor = NULL; +PFNGLCLEARPROC glad_glClear = NULL; +PFNGLCLEARBUFFERFIPROC glad_glClearBufferfi = NULL; +PFNGLCLEARBUFFERFVPROC glad_glClearBufferfv = NULL; +PFNGLCLEARBUFFERIVPROC glad_glClearBufferiv = NULL; +PFNGLCLEARBUFFERUIVPROC glad_glClearBufferuiv = NULL; +PFNGLCLEARCOLORPROC glad_glClearColor = NULL; +PFNGLCLEARDEPTHPROC glad_glClearDepth = NULL; +PFNGLCLEARSTENCILPROC glad_glClearStencil = NULL; +PFNGLCOLORMASKPROC glad_glColorMask = NULL; +PFNGLCOLORMASKIPROC glad_glColorMaski = NULL; +PFNGLCOMPILESHADERPROC glad_glCompileShader = NULL; +PFNGLCOMPRESSEDTEXIMAGE1DPROC glad_glCompressedTexImage1D = NULL; +PFNGLCOMPRESSEDTEXIMAGE2DPROC glad_glCompressedTexImage2D = NULL; +PFNGLCOMPRESSEDTEXIMAGE3DPROC glad_glCompressedTexImage3D = NULL; +PFNGLCOMPRESSEDTEXSUBIMAGE1DPROC glad_glCompressedTexSubImage1D = NULL; +PFNGLCOMPRESSEDTEXSUBIMAGE2DPROC glad_glCompressedTexSubImage2D = NULL; +PFNGLCOMPRESSEDTEXSUBIMAGE3DPROC glad_glCompressedTexSubImage3D = NULL; +PFNGLCOPYTEXIMAGE1DPROC glad_glCopyTexImage1D = NULL; +PFNGLCOPYTEXIMAGE2DPROC glad_glCopyTexImage2D = NULL; +PFNGLCOPYTEXSUBIMAGE1DPROC glad_glCopyTexSubImage1D = NULL; +PFNGLCOPYTEXSUBIMAGE2DPROC glad_glCopyTexSubImage2D = NULL; +PFNGLCOPYTEXSUBIMAGE3DPROC glad_glCopyTexSubImage3D = NULL; +PFNGLCREATEPROGRAMPROC glad_glCreateProgram = NULL; +PFNGLCREATESHADERPROC glad_glCreateShader = NULL; +PFNGLCULLFACEPROC glad_glCullFace = NULL; +PFNGLDELETEBUFFERSPROC glad_glDeleteBuffers = NULL; +PFNGLDELETEFRAMEBUFFERSPROC glad_glDeleteFramebuffers = NULL; +PFNGLDELETEPROGRAMPROC glad_glDeleteProgram = NULL; +PFNGLDELETEQUERIESPROC glad_glDeleteQueries = NULL; +PFNGLDELETERENDERBUFFERSPROC glad_glDeleteRenderbuffers = NULL; +PFNGLDELETESHADERPROC glad_glDeleteShader = NULL; +PFNGLDELETETEXTURESPROC glad_glDeleteTextures = NULL; +PFNGLDELETEVERTEXARRAYSPROC glad_glDeleteVertexArrays = NULL; +PFNGLDEPTHFUNCPROC glad_glDepthFunc = NULL; +PFNGLDEPTHMASKPROC glad_glDepthMask = NULL; +PFNGLDEPTHRANGEPROC glad_glDepthRange = NULL; +PFNGLDETACHSHADERPROC glad_glDetachShader = NULL; +PFNGLDISABLEPROC glad_glDisable = NULL; +PFNGLDISABLEVERTEXATTRIBARRAYPROC glad_glDisableVertexAttribArray = NULL; +PFNGLDISABLEIPROC glad_glDisablei = NULL; +PFNGLDRAWARRAYSPROC glad_glDrawArrays = NULL; +PFNGLDRAWBUFFERPROC glad_glDrawBuffer = NULL; +PFNGLDRAWBUFFERSPROC glad_glDrawBuffers = NULL; +PFNGLDRAWELEMENTSPROC glad_glDrawElements = NULL; +PFNGLDRAWRANGEELEMENTSPROC glad_glDrawRangeElements = NULL; +PFNGLENABLEPROC glad_glEnable = NULL; +PFNGLENABLEVERTEXATTRIBARRAYPROC glad_glEnableVertexAttribArray = NULL; +PFNGLENABLEIPROC glad_glEnablei = NULL; +PFNGLENDCONDITIONALRENDERPROC glad_glEndConditionalRender = NULL; +PFNGLENDQUERYPROC glad_glEndQuery = NULL; +PFNGLENDTRANSFORMFEEDBACKPROC glad_glEndTransformFeedback = NULL; +PFNGLFINISHPROC glad_glFinish = NULL; +PFNGLFLUSHPROC glad_glFlush = NULL; +PFNGLFLUSHMAPPEDBUFFERRANGEPROC glad_glFlushMappedBufferRange = NULL; +PFNGLFRAMEBUFFERRENDERBUFFERPROC glad_glFramebufferRenderbuffer = NULL; +PFNGLFRAMEBUFFERTEXTURE1DPROC glad_glFramebufferTexture1D = NULL; +PFNGLFRAMEBUFFERTEXTURE2DPROC glad_glFramebufferTexture2D = NULL; +PFNGLFRAMEBUFFERTEXTURE3DPROC glad_glFramebufferTexture3D = NULL; +PFNGLFRAMEBUFFERTEXTURELAYERPROC glad_glFramebufferTextureLayer = NULL; +PFNGLFRONTFACEPROC glad_glFrontFace = NULL; +PFNGLGENBUFFERSPROC glad_glGenBuffers = NULL; +PFNGLGENFRAMEBUFFERSPROC glad_glGenFramebuffers = NULL; +PFNGLGENQUERIESPROC glad_glGenQueries = NULL; +PFNGLGENRENDERBUFFERSPROC glad_glGenRenderbuffers = NULL; +PFNGLGENTEXTURESPROC glad_glGenTextures = NULL; +PFNGLGENVERTEXARRAYSPROC glad_glGenVertexArrays = NULL; +PFNGLGENERATEMIPMAPPROC glad_glGenerateMipmap = NULL; +PFNGLGETACTIVEATTRIBPROC glad_glGetActiveAttrib = NULL; +PFNGLGETACTIVEUNIFORMPROC glad_glGetActiveUniform = NULL; +PFNGLGETATTACHEDSHADERSPROC glad_glGetAttachedShaders = NULL; +PFNGLGETATTRIBLOCATIONPROC glad_glGetAttribLocation = NULL; +PFNGLGETBOOLEANI_VPROC glad_glGetBooleani_v = NULL; +PFNGLGETBOOLEANVPROC glad_glGetBooleanv = NULL; +PFNGLGETBUFFERPARAMETERIVPROC glad_glGetBufferParameteriv = NULL; +PFNGLGETBUFFERPOINTERVPROC glad_glGetBufferPointerv = NULL; +PFNGLGETBUFFERSUBDATAPROC glad_glGetBufferSubData = NULL; +PFNGLGETCOMPRESSEDTEXIMAGEPROC glad_glGetCompressedTexImage = NULL; +PFNGLGETDOUBLEVPROC glad_glGetDoublev = NULL; +PFNGLGETERRORPROC glad_glGetError = NULL; +PFNGLGETFLOATVPROC glad_glGetFloatv = NULL; +PFNGLGETFRAGDATALOCATIONPROC glad_glGetFragDataLocation = NULL; PFNGLGETFRAMEBUFFERATTACHMENTPARAMETERIVPROC glad_glGetFramebufferAttachmentParameteriv = NULL; -PFNGLGETINTEGERI_VPROC glad_glGetIntegeri_v = NULL; -PFNGLGETINTEGERVPROC glad_glGetIntegerv = NULL; -PFNGLGETPROGRAMINFOLOGPROC glad_glGetProgramInfoLog = NULL; -PFNGLGETPROGRAMIVPROC glad_glGetProgramiv = NULL; -PFNGLGETQUERYOBJECTIVPROC glad_glGetQueryObjectiv = NULL; -PFNGLGETQUERYOBJECTUIVPROC glad_glGetQueryObjectuiv = NULL; -PFNGLGETQUERYIVPROC glad_glGetQueryiv = NULL; -PFNGLGETRENDERBUFFERPARAMETERIVPROC glad_glGetRenderbufferParameteriv = NULL; -PFNGLGETSHADERINFOLOGPROC glad_glGetShaderInfoLog = NULL; -PFNGLGETSHADERSOURCEPROC glad_glGetShaderSource = NULL; -PFNGLGETSHADERIVPROC glad_glGetShaderiv = NULL; -PFNGLGETSTRINGPROC glad_glGetString = NULL; -PFNGLGETSTRINGIPROC glad_glGetStringi = NULL; -PFNGLGETTEXIMAGEPROC glad_glGetTexImage = NULL; -PFNGLGETTEXLEVELPARAMETERFVPROC glad_glGetTexLevelParameterfv = NULL; -PFNGLGETTEXLEVELPARAMETERIVPROC glad_glGetTexLevelParameteriv = NULL; -PFNGLGETTEXPARAMETERIIVPROC glad_glGetTexParameterIiv = NULL; -PFNGLGETTEXPARAMETERIUIVPROC glad_glGetTexParameterIuiv = NULL; -PFNGLGETTEXPARAMETERFVPROC glad_glGetTexParameterfv = NULL; -PFNGLGETTEXPARAMETERIVPROC glad_glGetTexParameteriv = NULL; -PFNGLGETTRANSFORMFEEDBACKVARYINGPROC glad_glGetTransformFeedbackVarying = NULL; -PFNGLGETUNIFORMLOCATIONPROC glad_glGetUniformLocation = NULL; -PFNGLGETUNIFORMFVPROC glad_glGetUniformfv = NULL; -PFNGLGETUNIFORMIVPROC glad_glGetUniformiv = NULL; -PFNGLGETUNIFORMUIVPROC glad_glGetUniformuiv = NULL; -PFNGLGETVERTEXATTRIBIIVPROC glad_glGetVertexAttribIiv = NULL; -PFNGLGETVERTEXATTRIBIUIVPROC glad_glGetVertexAttribIuiv = NULL; -PFNGLGETVERTEXATTRIBPOINTERVPROC glad_glGetVertexAttribPointerv = NULL; -PFNGLGETVERTEXATTRIBDVPROC glad_glGetVertexAttribdv = NULL; -PFNGLGETVERTEXATTRIBFVPROC glad_glGetVertexAttribfv = NULL; -PFNGLGETVERTEXATTRIBIVPROC glad_glGetVertexAttribiv = NULL; -PFNGLHINTPROC glad_glHint = NULL; -PFNGLISBUFFERPROC glad_glIsBuffer = NULL; -PFNGLISENABLEDPROC glad_glIsEnabled = NULL; -PFNGLISENABLEDIPROC glad_glIsEnabledi = NULL; -PFNGLISFRAMEBUFFERPROC glad_glIsFramebuffer = NULL; -PFNGLISPROGRAMPROC glad_glIsProgram = NULL; -PFNGLISQUERYPROC glad_glIsQuery = NULL; -PFNGLISRENDERBUFFERPROC glad_glIsRenderbuffer = NULL; -PFNGLISSHADERPROC glad_glIsShader = NULL; -PFNGLISTEXTUREPROC glad_glIsTexture = NULL; -PFNGLISVERTEXARRAYPROC glad_glIsVertexArray = NULL; -PFNGLLINEWIDTHPROC glad_glLineWidth = NULL; -PFNGLLINKPROGRAMPROC glad_glLinkProgram = NULL; -PFNGLLOGICOPPROC glad_glLogicOp = NULL; -PFNGLMAPBUFFERPROC glad_glMapBuffer = NULL; -PFNGLMAPBUFFERRANGEPROC glad_glMapBufferRange = NULL; -PFNGLMULTIDRAWARRAYSPROC glad_glMultiDrawArrays = NULL; -PFNGLMULTIDRAWELEMENTSPROC glad_glMultiDrawElements = NULL; -PFNGLPIXELSTOREFPROC glad_glPixelStoref = NULL; -PFNGLPIXELSTOREIPROC glad_glPixelStorei = NULL; -PFNGLPOINTPARAMETERFPROC glad_glPointParameterf = NULL; -PFNGLPOINTPARAMETERFVPROC glad_glPointParameterfv = NULL; -PFNGLPOINTPARAMETERIPROC glad_glPointParameteri = NULL; -PFNGLPOINTPARAMETERIVPROC glad_glPointParameteriv = NULL; -PFNGLPOINTSIZEPROC glad_glPointSize = NULL; -PFNGLPOLYGONMODEPROC glad_glPolygonMode = NULL; -PFNGLPOLYGONOFFSETPROC glad_glPolygonOffset = NULL; -PFNGLREADBUFFERPROC glad_glReadBuffer = NULL; -PFNGLREADPIXELSPROC glad_glReadPixels = NULL; -PFNGLRENDERBUFFERSTORAGEPROC glad_glRenderbufferStorage = NULL; -PFNGLRENDERBUFFERSTORAGEMULTISAMPLEPROC glad_glRenderbufferStorageMultisample = NULL; -PFNGLSAMPLECOVERAGEPROC glad_glSampleCoverage = NULL; -PFNGLSCISSORPROC glad_glScissor = NULL; -PFNGLSHADERSOURCEPROC glad_glShaderSource = NULL; -PFNGLSTENCILFUNCPROC glad_glStencilFunc = NULL; -PFNGLSTENCILFUNCSEPARATEPROC glad_glStencilFuncSeparate = NULL; -PFNGLSTENCILMASKPROC glad_glStencilMask = NULL; -PFNGLSTENCILMASKSEPARATEPROC glad_glStencilMaskSeparate = NULL; -PFNGLSTENCILOPPROC glad_glStencilOp = NULL; -PFNGLSTENCILOPSEPARATEPROC glad_glStencilOpSeparate = NULL; -PFNGLTEXIMAGE1DPROC glad_glTexImage1D = NULL; -PFNGLTEXIMAGE2DPROC glad_glTexImage2D = NULL; -PFNGLTEXIMAGE3DPROC glad_glTexImage3D = NULL; -PFNGLTEXPARAMETERIIVPROC glad_glTexParameterIiv = NULL; -PFNGLTEXPARAMETERIUIVPROC glad_glTexParameterIuiv = NULL; -PFNGLTEXPARAMETERFPROC glad_glTexParameterf = NULL; -PFNGLTEXPARAMETERFVPROC glad_glTexParameterfv = NULL; -PFNGLTEXPARAMETERIPROC glad_glTexParameteri = NULL; -PFNGLTEXPARAMETERIVPROC glad_glTexParameteriv = NULL; -PFNGLTEXSUBIMAGE1DPROC glad_glTexSubImage1D = NULL; -PFNGLTEXSUBIMAGE2DPROC glad_glTexSubImage2D = NULL; -PFNGLTEXSUBIMAGE3DPROC glad_glTexSubImage3D = NULL; -PFNGLTRANSFORMFEEDBACKVARYINGSPROC glad_glTransformFeedbackVaryings = NULL; -PFNGLUNIFORM1FPROC glad_glUniform1f = NULL; -PFNGLUNIFORM1FVPROC glad_glUniform1fv = NULL; -PFNGLUNIFORM1IPROC glad_glUniform1i = NULL; -PFNGLUNIFORM1IVPROC glad_glUniform1iv = NULL; -PFNGLUNIFORM1UIPROC glad_glUniform1ui = NULL; -PFNGLUNIFORM1UIVPROC glad_glUniform1uiv = NULL; -PFNGLUNIFORM2FPROC glad_glUniform2f = NULL; -PFNGLUNIFORM2FVPROC glad_glUniform2fv = NULL; -PFNGLUNIFORM2IPROC glad_glUniform2i = NULL; -PFNGLUNIFORM2IVPROC glad_glUniform2iv = NULL; -PFNGLUNIFORM2UIPROC glad_glUniform2ui = NULL; -PFNGLUNIFORM2UIVPROC glad_glUniform2uiv = NULL; -PFNGLUNIFORM3FPROC glad_glUniform3f = NULL; -PFNGLUNIFORM3FVPROC glad_glUniform3fv = NULL; -PFNGLUNIFORM3IPROC glad_glUniform3i = NULL; -PFNGLUNIFORM3IVPROC glad_glUniform3iv = NULL; -PFNGLUNIFORM3UIPROC glad_glUniform3ui = NULL; -PFNGLUNIFORM3UIVPROC glad_glUniform3uiv = NULL; -PFNGLUNIFORM4FPROC glad_glUniform4f = NULL; -PFNGLUNIFORM4FVPROC glad_glUniform4fv = NULL; -PFNGLUNIFORM4IPROC glad_glUniform4i = NULL; -PFNGLUNIFORM4IVPROC glad_glUniform4iv = NULL; -PFNGLUNIFORM4UIPROC glad_glUniform4ui = NULL; -PFNGLUNIFORM4UIVPROC glad_glUniform4uiv = NULL; -PFNGLUNIFORMMATRIX2FVPROC glad_glUniformMatrix2fv = NULL; -PFNGLUNIFORMMATRIX2X3FVPROC glad_glUniformMatrix2x3fv = NULL; -PFNGLUNIFORMMATRIX2X4FVPROC glad_glUniformMatrix2x4fv = NULL; -PFNGLUNIFORMMATRIX3FVPROC glad_glUniformMatrix3fv = NULL; -PFNGLUNIFORMMATRIX3X2FVPROC glad_glUniformMatrix3x2fv = NULL; -PFNGLUNIFORMMATRIX3X4FVPROC glad_glUniformMatrix3x4fv = NULL; -PFNGLUNIFORMMATRIX4FVPROC glad_glUniformMatrix4fv = NULL; -PFNGLUNIFORMMATRIX4X2FVPROC glad_glUniformMatrix4x2fv = NULL; -PFNGLUNIFORMMATRIX4X3FVPROC glad_glUniformMatrix4x3fv = NULL; -PFNGLUNMAPBUFFERPROC glad_glUnmapBuffer = NULL; -PFNGLUSEPROGRAMPROC glad_glUseProgram = NULL; -PFNGLVALIDATEPROGRAMPROC glad_glValidateProgram = NULL; -PFNGLVERTEXATTRIB1DPROC glad_glVertexAttrib1d = NULL; -PFNGLVERTEXATTRIB1DVPROC glad_glVertexAttrib1dv = NULL; -PFNGLVERTEXATTRIB1FPROC glad_glVertexAttrib1f = NULL; -PFNGLVERTEXATTRIB1FVPROC glad_glVertexAttrib1fv = NULL; -PFNGLVERTEXATTRIB1SPROC glad_glVertexAttrib1s = NULL; -PFNGLVERTEXATTRIB1SVPROC glad_glVertexAttrib1sv = NULL; -PFNGLVERTEXATTRIB2DPROC glad_glVertexAttrib2d = NULL; -PFNGLVERTEXATTRIB2DVPROC glad_glVertexAttrib2dv = NULL; -PFNGLVERTEXATTRIB2FPROC glad_glVertexAttrib2f = NULL; -PFNGLVERTEXATTRIB2FVPROC glad_glVertexAttrib2fv = NULL; -PFNGLVERTEXATTRIB2SPROC glad_glVertexAttrib2s = NULL; -PFNGLVERTEXATTRIB2SVPROC glad_glVertexAttrib2sv = NULL; -PFNGLVERTEXATTRIB3DPROC glad_glVertexAttrib3d = NULL; -PFNGLVERTEXATTRIB3DVPROC glad_glVertexAttrib3dv = NULL; -PFNGLVERTEXATTRIB3FPROC glad_glVertexAttrib3f = NULL; -PFNGLVERTEXATTRIB3FVPROC glad_glVertexAttrib3fv = NULL; -PFNGLVERTEXATTRIB3SPROC glad_glVertexAttrib3s = NULL; -PFNGLVERTEXATTRIB3SVPROC glad_glVertexAttrib3sv = NULL; -PFNGLVERTEXATTRIB4NBVPROC glad_glVertexAttrib4Nbv = NULL; -PFNGLVERTEXATTRIB4NIVPROC glad_glVertexAttrib4Niv = NULL; -PFNGLVERTEXATTRIB4NSVPROC glad_glVertexAttrib4Nsv = NULL; -PFNGLVERTEXATTRIB4NUBPROC glad_glVertexAttrib4Nub = NULL; -PFNGLVERTEXATTRIB4NUBVPROC glad_glVertexAttrib4Nubv = NULL; -PFNGLVERTEXATTRIB4NUIVPROC glad_glVertexAttrib4Nuiv = NULL; -PFNGLVERTEXATTRIB4NUSVPROC glad_glVertexAttrib4Nusv = NULL; -PFNGLVERTEXATTRIB4BVPROC glad_glVertexAttrib4bv = NULL; -PFNGLVERTEXATTRIB4DPROC glad_glVertexAttrib4d = NULL; -PFNGLVERTEXATTRIB4DVPROC glad_glVertexAttrib4dv = NULL; -PFNGLVERTEXATTRIB4FPROC glad_glVertexAttrib4f = NULL; -PFNGLVERTEXATTRIB4FVPROC glad_glVertexAttrib4fv = NULL; -PFNGLVERTEXATTRIB4IVPROC glad_glVertexAttrib4iv = NULL; -PFNGLVERTEXATTRIB4SPROC glad_glVertexAttrib4s = NULL; -PFNGLVERTEXATTRIB4SVPROC glad_glVertexAttrib4sv = NULL; -PFNGLVERTEXATTRIB4UBVPROC glad_glVertexAttrib4ubv = NULL; -PFNGLVERTEXATTRIB4UIVPROC glad_glVertexAttrib4uiv = NULL; -PFNGLVERTEXATTRIB4USVPROC glad_glVertexAttrib4usv = NULL; -PFNGLVERTEXATTRIBI1IPROC glad_glVertexAttribI1i = NULL; -PFNGLVERTEXATTRIBI1IVPROC glad_glVertexAttribI1iv = NULL; -PFNGLVERTEXATTRIBI1UIPROC glad_glVertexAttribI1ui = NULL; -PFNGLVERTEXATTRIBI1UIVPROC glad_glVertexAttribI1uiv = NULL; -PFNGLVERTEXATTRIBI2IPROC glad_glVertexAttribI2i = NULL; -PFNGLVERTEXATTRIBI2IVPROC glad_glVertexAttribI2iv = NULL; -PFNGLVERTEXATTRIBI2UIPROC glad_glVertexAttribI2ui = NULL; -PFNGLVERTEXATTRIBI2UIVPROC glad_glVertexAttribI2uiv = NULL; -PFNGLVERTEXATTRIBI3IPROC glad_glVertexAttribI3i = NULL; -PFNGLVERTEXATTRIBI3IVPROC glad_glVertexAttribI3iv = NULL; -PFNGLVERTEXATTRIBI3UIPROC glad_glVertexAttribI3ui = NULL; -PFNGLVERTEXATTRIBI3UIVPROC glad_glVertexAttribI3uiv = NULL; -PFNGLVERTEXATTRIBI4BVPROC glad_glVertexAttribI4bv = NULL; -PFNGLVERTEXATTRIBI4IPROC glad_glVertexAttribI4i = NULL; -PFNGLVERTEXATTRIBI4IVPROC glad_glVertexAttribI4iv = NULL; -PFNGLVERTEXATTRIBI4SVPROC glad_glVertexAttribI4sv = NULL; -PFNGLVERTEXATTRIBI4UBVPROC glad_glVertexAttribI4ubv = NULL; -PFNGLVERTEXATTRIBI4UIPROC glad_glVertexAttribI4ui = NULL; -PFNGLVERTEXATTRIBI4UIVPROC glad_glVertexAttribI4uiv = NULL; -PFNGLVERTEXATTRIBI4USVPROC glad_glVertexAttribI4usv = NULL; -PFNGLVERTEXATTRIBIPOINTERPROC glad_glVertexAttribIPointer = NULL; -PFNGLVERTEXATTRIBPOINTERPROC glad_glVertexAttribPointer = NULL; -PFNGLVIEWPORTPROC glad_glViewport = NULL; -int GLAD_GL_ARB_buffer_storage = 0; -int GLAD_GL_ARB_debug_output = 0; -int GLAD_GL_ARB_sync = 0; -PFNGLBUFFERSTORAGEPROC glad_glBufferStorage = NULL; -PFNGLDEBUGMESSAGECONTROLARBPROC glad_glDebugMessageControlARB = NULL; -PFNGLDEBUGMESSAGEINSERTARBPROC glad_glDebugMessageInsertARB = NULL; -PFNGLDEBUGMESSAGECALLBACKARBPROC glad_glDebugMessageCallbackARB = NULL; -PFNGLGETDEBUGMESSAGELOGARBPROC glad_glGetDebugMessageLogARB = NULL; -PFNGLFENCESYNCPROC glad_glFenceSync = NULL; -PFNGLISSYNCPROC glad_glIsSync = NULL; -PFNGLDELETESYNCPROC glad_glDeleteSync = NULL; -PFNGLCLIENTWAITSYNCPROC glad_glClientWaitSync = NULL; -PFNGLWAITSYNCPROC glad_glWaitSync = NULL; -PFNGLGETINTEGER64VPROC glad_glGetInteger64v = NULL; -PFNGLGETSYNCIVPROC glad_glGetSynciv = NULL; -static void load_GL_VERSION_1_0(GLADloadproc load) { - if(!GLAD_GL_VERSION_1_0) return; - glad_glCullFace = (PFNGLCULLFACEPROC)load("glCullFace"); - glad_glFrontFace = (PFNGLFRONTFACEPROC)load("glFrontFace"); - glad_glHint = (PFNGLHINTPROC)load("glHint"); - glad_glLineWidth = (PFNGLLINEWIDTHPROC)load("glLineWidth"); - glad_glPointSize = (PFNGLPOINTSIZEPROC)load("glPointSize"); - glad_glPolygonMode = (PFNGLPOLYGONMODEPROC)load("glPolygonMode"); - glad_glScissor = (PFNGLSCISSORPROC)load("glScissor"); - glad_glTexParameterf = (PFNGLTEXPARAMETERFPROC)load("glTexParameterf"); - glad_glTexParameterfv = (PFNGLTEXPARAMETERFVPROC)load("glTexParameterfv"); - glad_glTexParameteri = (PFNGLTEXPARAMETERIPROC)load("glTexParameteri"); - glad_glTexParameteriv = (PFNGLTEXPARAMETERIVPROC)load("glTexParameteriv"); - glad_glTexImage1D = (PFNGLTEXIMAGE1DPROC)load("glTexImage1D"); - glad_glTexImage2D = (PFNGLTEXIMAGE2DPROC)load("glTexImage2D"); - glad_glDrawBuffer = (PFNGLDRAWBUFFERPROC)load("glDrawBuffer"); - glad_glClear = (PFNGLCLEARPROC)load("glClear"); - glad_glClearColor = (PFNGLCLEARCOLORPROC)load("glClearColor"); - glad_glClearStencil = (PFNGLCLEARSTENCILPROC)load("glClearStencil"); - glad_glClearDepth = (PFNGLCLEARDEPTHPROC)load("glClearDepth"); - glad_glStencilMask = (PFNGLSTENCILMASKPROC)load("glStencilMask"); - glad_glColorMask = (PFNGLCOLORMASKPROC)load("glColorMask"); - glad_glDepthMask = (PFNGLDEPTHMASKPROC)load("glDepthMask"); - glad_glDisable = (PFNGLDISABLEPROC)load("glDisable"); - glad_glEnable = (PFNGLENABLEPROC)load("glEnable"); - glad_glFinish = (PFNGLFINISHPROC)load("glFinish"); - glad_glFlush = (PFNGLFLUSHPROC)load("glFlush"); - glad_glBlendFunc = (PFNGLBLENDFUNCPROC)load("glBlendFunc"); - glad_glLogicOp = (PFNGLLOGICOPPROC)load("glLogicOp"); - glad_glStencilFunc = (PFNGLSTENCILFUNCPROC)load("glStencilFunc"); - glad_glStencilOp = (PFNGLSTENCILOPPROC)load("glStencilOp"); - glad_glDepthFunc = (PFNGLDEPTHFUNCPROC)load("glDepthFunc"); - glad_glPixelStoref = (PFNGLPIXELSTOREFPROC)load("glPixelStoref"); - glad_glPixelStorei = (PFNGLPIXELSTOREIPROC)load("glPixelStorei"); - glad_glReadBuffer = (PFNGLREADBUFFERPROC)load("glReadBuffer"); - glad_glReadPixels = (PFNGLREADPIXELSPROC)load("glReadPixels"); - glad_glGetBooleanv = (PFNGLGETBOOLEANVPROC)load("glGetBooleanv"); - glad_glGetDoublev = (PFNGLGETDOUBLEVPROC)load("glGetDoublev"); - glad_glGetError = (PFNGLGETERRORPROC)load("glGetError"); - glad_glGetFloatv = (PFNGLGETFLOATVPROC)load("glGetFloatv"); - glad_glGetIntegerv = (PFNGLGETINTEGERVPROC)load("glGetIntegerv"); - glad_glGetString = (PFNGLGETSTRINGPROC)load("glGetString"); - glad_glGetTexImage = (PFNGLGETTEXIMAGEPROC)load("glGetTexImage"); - glad_glGetTexParameterfv = (PFNGLGETTEXPARAMETERFVPROC)load("glGetTexParameterfv"); - glad_glGetTexParameteriv = (PFNGLGETTEXPARAMETERIVPROC)load("glGetTexParameteriv"); - glad_glGetTexLevelParameterfv = (PFNGLGETTEXLEVELPARAMETERFVPROC)load("glGetTexLevelParameterfv"); - glad_glGetTexLevelParameteriv = (PFNGLGETTEXLEVELPARAMETERIVPROC)load("glGetTexLevelParameteriv"); - glad_glIsEnabled = (PFNGLISENABLEDPROC)load("glIsEnabled"); - glad_glDepthRange = (PFNGLDEPTHRANGEPROC)load("glDepthRange"); - glad_glViewport = (PFNGLVIEWPORTPROC)load("glViewport"); +PFNGLGETINTEGERI_VPROC glad_glGetIntegeri_v = NULL; +PFNGLGETINTEGERVPROC glad_glGetIntegerv = NULL; +PFNGLGETPROGRAMINFOLOGPROC glad_glGetProgramInfoLog = NULL; +PFNGLGETPROGRAMIVPROC glad_glGetProgramiv = NULL; +PFNGLGETQUERYOBJECTIVPROC glad_glGetQueryObjectiv = NULL; +PFNGLGETQUERYOBJECTUIVPROC glad_glGetQueryObjectuiv = NULL; +PFNGLGETQUERYIVPROC glad_glGetQueryiv = NULL; +PFNGLGETRENDERBUFFERPARAMETERIVPROC glad_glGetRenderbufferParameteriv = NULL; +PFNGLGETSHADERINFOLOGPROC glad_glGetShaderInfoLog = NULL; +PFNGLGETSHADERSOURCEPROC glad_glGetShaderSource = NULL; +PFNGLGETSHADERIVPROC glad_glGetShaderiv = NULL; +PFNGLGETSTRINGPROC glad_glGetString = NULL; +PFNGLGETSTRINGIPROC glad_glGetStringi = NULL; +PFNGLGETTEXIMAGEPROC glad_glGetTexImage = NULL; +PFNGLGETTEXLEVELPARAMETERFVPROC glad_glGetTexLevelParameterfv = NULL; +PFNGLGETTEXLEVELPARAMETERIVPROC glad_glGetTexLevelParameteriv = NULL; +PFNGLGETTEXPARAMETERIIVPROC glad_glGetTexParameterIiv = NULL; +PFNGLGETTEXPARAMETERIUIVPROC glad_glGetTexParameterIuiv = NULL; +PFNGLGETTEXPARAMETERFVPROC glad_glGetTexParameterfv = NULL; +PFNGLGETTEXPARAMETERIVPROC glad_glGetTexParameteriv = NULL; +PFNGLGETTRANSFORMFEEDBACKVARYINGPROC glad_glGetTransformFeedbackVarying = NULL; +PFNGLGETUNIFORMLOCATIONPROC glad_glGetUniformLocation = NULL; +PFNGLGETUNIFORMFVPROC glad_glGetUniformfv = NULL; +PFNGLGETUNIFORMIVPROC glad_glGetUniformiv = NULL; +PFNGLGETUNIFORMUIVPROC glad_glGetUniformuiv = NULL; +PFNGLGETVERTEXATTRIBIIVPROC glad_glGetVertexAttribIiv = NULL; +PFNGLGETVERTEXATTRIBIUIVPROC glad_glGetVertexAttribIuiv = NULL; +PFNGLGETVERTEXATTRIBPOINTERVPROC glad_glGetVertexAttribPointerv = NULL; +PFNGLGETVERTEXATTRIBDVPROC glad_glGetVertexAttribdv = NULL; +PFNGLGETVERTEXATTRIBFVPROC glad_glGetVertexAttribfv = NULL; +PFNGLGETVERTEXATTRIBIVPROC glad_glGetVertexAttribiv = NULL; +PFNGLHINTPROC glad_glHint = NULL; +PFNGLISBUFFERPROC glad_glIsBuffer = NULL; +PFNGLISENABLEDPROC glad_glIsEnabled = NULL; +PFNGLISENABLEDIPROC glad_glIsEnabledi = NULL; +PFNGLISFRAMEBUFFERPROC glad_glIsFramebuffer = NULL; +PFNGLISPROGRAMPROC glad_glIsProgram = NULL; +PFNGLISQUERYPROC glad_glIsQuery = NULL; +PFNGLISRENDERBUFFERPROC glad_glIsRenderbuffer = NULL; +PFNGLISSHADERPROC glad_glIsShader = NULL; +PFNGLISTEXTUREPROC glad_glIsTexture = NULL; +PFNGLISVERTEXARRAYPROC glad_glIsVertexArray = NULL; +PFNGLLINEWIDTHPROC glad_glLineWidth = NULL; +PFNGLLINKPROGRAMPROC glad_glLinkProgram = NULL; +PFNGLLOGICOPPROC glad_glLogicOp = NULL; +PFNGLMAPBUFFERPROC glad_glMapBuffer = NULL; +PFNGLMAPBUFFERRANGEPROC glad_glMapBufferRange = NULL; +PFNGLMULTIDRAWARRAYSPROC glad_glMultiDrawArrays = NULL; +PFNGLMULTIDRAWELEMENTSPROC glad_glMultiDrawElements = NULL; +PFNGLPIXELSTOREFPROC glad_glPixelStoref = NULL; +PFNGLPIXELSTOREIPROC glad_glPixelStorei = NULL; +PFNGLPOINTPARAMETERFPROC glad_glPointParameterf = NULL; +PFNGLPOINTPARAMETERFVPROC glad_glPointParameterfv = NULL; +PFNGLPOINTPARAMETERIPROC glad_glPointParameteri = NULL; +PFNGLPOINTPARAMETERIVPROC glad_glPointParameteriv = NULL; +PFNGLPOINTSIZEPROC glad_glPointSize = NULL; +PFNGLPOLYGONMODEPROC glad_glPolygonMode = NULL; +PFNGLPOLYGONOFFSETPROC glad_glPolygonOffset = NULL; +PFNGLREADBUFFERPROC glad_glReadBuffer = NULL; +PFNGLREADPIXELSPROC glad_glReadPixels = NULL; +PFNGLRENDERBUFFERSTORAGEPROC glad_glRenderbufferStorage = NULL; +PFNGLRENDERBUFFERSTORAGEMULTISAMPLEPROC glad_glRenderbufferStorageMultisample = NULL; +PFNGLSAMPLECOVERAGEPROC glad_glSampleCoverage = NULL; +PFNGLSCISSORPROC glad_glScissor = NULL; +PFNGLSHADERSOURCEPROC glad_glShaderSource = NULL; +PFNGLSTENCILFUNCPROC glad_glStencilFunc = NULL; +PFNGLSTENCILFUNCSEPARATEPROC glad_glStencilFuncSeparate = NULL; +PFNGLSTENCILMASKPROC glad_glStencilMask = NULL; +PFNGLSTENCILMASKSEPARATEPROC glad_glStencilMaskSeparate = NULL; +PFNGLSTENCILOPPROC glad_glStencilOp = NULL; +PFNGLSTENCILOPSEPARATEPROC glad_glStencilOpSeparate = NULL; +PFNGLTEXIMAGE1DPROC glad_glTexImage1D = NULL; +PFNGLTEXIMAGE2DPROC glad_glTexImage2D = NULL; +PFNGLTEXIMAGE3DPROC glad_glTexImage3D = NULL; +PFNGLTEXPARAMETERIIVPROC glad_glTexParameterIiv = NULL; +PFNGLTEXPARAMETERIUIVPROC glad_glTexParameterIuiv = NULL; +PFNGLTEXPARAMETERFPROC glad_glTexParameterf = NULL; +PFNGLTEXPARAMETERFVPROC glad_glTexParameterfv = NULL; +PFNGLTEXPARAMETERIPROC glad_glTexParameteri = NULL; +PFNGLTEXPARAMETERIVPROC glad_glTexParameteriv = NULL; +PFNGLTEXSUBIMAGE1DPROC glad_glTexSubImage1D = NULL; +PFNGLTEXSUBIMAGE2DPROC glad_glTexSubImage2D = NULL; +PFNGLTEXSUBIMAGE3DPROC glad_glTexSubImage3D = NULL; +PFNGLTRANSFORMFEEDBACKVARYINGSPROC glad_glTransformFeedbackVaryings = NULL; +PFNGLUNIFORM1FPROC glad_glUniform1f = NULL; +PFNGLUNIFORM1FVPROC glad_glUniform1fv = NULL; +PFNGLUNIFORM1IPROC glad_glUniform1i = NULL; +PFNGLUNIFORM1IVPROC glad_glUniform1iv = NULL; +PFNGLUNIFORM1UIPROC glad_glUniform1ui = NULL; +PFNGLUNIFORM1UIVPROC glad_glUniform1uiv = NULL; +PFNGLUNIFORM2FPROC glad_glUniform2f = NULL; +PFNGLUNIFORM2FVPROC glad_glUniform2fv = NULL; +PFNGLUNIFORM2IPROC glad_glUniform2i = NULL; +PFNGLUNIFORM2IVPROC glad_glUniform2iv = NULL; +PFNGLUNIFORM2UIPROC glad_glUniform2ui = NULL; +PFNGLUNIFORM2UIVPROC glad_glUniform2uiv = NULL; +PFNGLUNIFORM3FPROC glad_glUniform3f = NULL; +PFNGLUNIFORM3FVPROC glad_glUniform3fv = NULL; +PFNGLUNIFORM3IPROC glad_glUniform3i = NULL; +PFNGLUNIFORM3IVPROC glad_glUniform3iv = NULL; +PFNGLUNIFORM3UIPROC glad_glUniform3ui = NULL; +PFNGLUNIFORM3UIVPROC glad_glUniform3uiv = NULL; +PFNGLUNIFORM4FPROC glad_glUniform4f = NULL; +PFNGLUNIFORM4FVPROC glad_glUniform4fv = NULL; +PFNGLUNIFORM4IPROC glad_glUniform4i = NULL; +PFNGLUNIFORM4IVPROC glad_glUniform4iv = NULL; +PFNGLUNIFORM4UIPROC glad_glUniform4ui = NULL; +PFNGLUNIFORM4UIVPROC glad_glUniform4uiv = NULL; +PFNGLUNIFORMMATRIX2FVPROC glad_glUniformMatrix2fv = NULL; +PFNGLUNIFORMMATRIX2X3FVPROC glad_glUniformMatrix2x3fv = NULL; +PFNGLUNIFORMMATRIX2X4FVPROC glad_glUniformMatrix2x4fv = NULL; +PFNGLUNIFORMMATRIX3FVPROC glad_glUniformMatrix3fv = NULL; +PFNGLUNIFORMMATRIX3X2FVPROC glad_glUniformMatrix3x2fv = NULL; +PFNGLUNIFORMMATRIX3X4FVPROC glad_glUniformMatrix3x4fv = NULL; +PFNGLUNIFORMMATRIX4FVPROC glad_glUniformMatrix4fv = NULL; +PFNGLUNIFORMMATRIX4X2FVPROC glad_glUniformMatrix4x2fv = NULL; +PFNGLUNIFORMMATRIX4X3FVPROC glad_glUniformMatrix4x3fv = NULL; +PFNGLUNMAPBUFFERPROC glad_glUnmapBuffer = NULL; +PFNGLUSEPROGRAMPROC glad_glUseProgram = NULL; +PFNGLVALIDATEPROGRAMPROC glad_glValidateProgram = NULL; +PFNGLVERTEXATTRIB1DPROC glad_glVertexAttrib1d = NULL; +PFNGLVERTEXATTRIB1DVPROC glad_glVertexAttrib1dv = NULL; +PFNGLVERTEXATTRIB1FPROC glad_glVertexAttrib1f = NULL; +PFNGLVERTEXATTRIB1FVPROC glad_glVertexAttrib1fv = NULL; +PFNGLVERTEXATTRIB1SPROC glad_glVertexAttrib1s = NULL; +PFNGLVERTEXATTRIB1SVPROC glad_glVertexAttrib1sv = NULL; +PFNGLVERTEXATTRIB2DPROC glad_glVertexAttrib2d = NULL; +PFNGLVERTEXATTRIB2DVPROC glad_glVertexAttrib2dv = NULL; +PFNGLVERTEXATTRIB2FPROC glad_glVertexAttrib2f = NULL; +PFNGLVERTEXATTRIB2FVPROC glad_glVertexAttrib2fv = NULL; +PFNGLVERTEXATTRIB2SPROC glad_glVertexAttrib2s = NULL; +PFNGLVERTEXATTRIB2SVPROC glad_glVertexAttrib2sv = NULL; +PFNGLVERTEXATTRIB3DPROC glad_glVertexAttrib3d = NULL; +PFNGLVERTEXATTRIB3DVPROC glad_glVertexAttrib3dv = NULL; +PFNGLVERTEXATTRIB3FPROC glad_glVertexAttrib3f = NULL; +PFNGLVERTEXATTRIB3FVPROC glad_glVertexAttrib3fv = NULL; +PFNGLVERTEXATTRIB3SPROC glad_glVertexAttrib3s = NULL; +PFNGLVERTEXATTRIB3SVPROC glad_glVertexAttrib3sv = NULL; +PFNGLVERTEXATTRIB4NBVPROC glad_glVertexAttrib4Nbv = NULL; +PFNGLVERTEXATTRIB4NIVPROC glad_glVertexAttrib4Niv = NULL; +PFNGLVERTEXATTRIB4NSVPROC glad_glVertexAttrib4Nsv = NULL; +PFNGLVERTEXATTRIB4NUBPROC glad_glVertexAttrib4Nub = NULL; +PFNGLVERTEXATTRIB4NUBVPROC glad_glVertexAttrib4Nubv = NULL; +PFNGLVERTEXATTRIB4NUIVPROC glad_glVertexAttrib4Nuiv = NULL; +PFNGLVERTEXATTRIB4NUSVPROC glad_glVertexAttrib4Nusv = NULL; +PFNGLVERTEXATTRIB4BVPROC glad_glVertexAttrib4bv = NULL; +PFNGLVERTEXATTRIB4DPROC glad_glVertexAttrib4d = NULL; +PFNGLVERTEXATTRIB4DVPROC glad_glVertexAttrib4dv = NULL; +PFNGLVERTEXATTRIB4FPROC glad_glVertexAttrib4f = NULL; +PFNGLVERTEXATTRIB4FVPROC glad_glVertexAttrib4fv = NULL; +PFNGLVERTEXATTRIB4IVPROC glad_glVertexAttrib4iv = NULL; +PFNGLVERTEXATTRIB4SPROC glad_glVertexAttrib4s = NULL; +PFNGLVERTEXATTRIB4SVPROC glad_glVertexAttrib4sv = NULL; +PFNGLVERTEXATTRIB4UBVPROC glad_glVertexAttrib4ubv = NULL; +PFNGLVERTEXATTRIB4UIVPROC glad_glVertexAttrib4uiv = NULL; +PFNGLVERTEXATTRIB4USVPROC glad_glVertexAttrib4usv = NULL; +PFNGLVERTEXATTRIBI1IPROC glad_glVertexAttribI1i = NULL; +PFNGLVERTEXATTRIBI1IVPROC glad_glVertexAttribI1iv = NULL; +PFNGLVERTEXATTRIBI1UIPROC glad_glVertexAttribI1ui = NULL; +PFNGLVERTEXATTRIBI1UIVPROC glad_glVertexAttribI1uiv = NULL; +PFNGLVERTEXATTRIBI2IPROC glad_glVertexAttribI2i = NULL; +PFNGLVERTEXATTRIBI2IVPROC glad_glVertexAttribI2iv = NULL; +PFNGLVERTEXATTRIBI2UIPROC glad_glVertexAttribI2ui = NULL; +PFNGLVERTEXATTRIBI2UIVPROC glad_glVertexAttribI2uiv = NULL; +PFNGLVERTEXATTRIBI3IPROC glad_glVertexAttribI3i = NULL; +PFNGLVERTEXATTRIBI3IVPROC glad_glVertexAttribI3iv = NULL; +PFNGLVERTEXATTRIBI3UIPROC glad_glVertexAttribI3ui = NULL; +PFNGLVERTEXATTRIBI3UIVPROC glad_glVertexAttribI3uiv = NULL; +PFNGLVERTEXATTRIBI4BVPROC glad_glVertexAttribI4bv = NULL; +PFNGLVERTEXATTRIBI4IPROC glad_glVertexAttribI4i = NULL; +PFNGLVERTEXATTRIBI4IVPROC glad_glVertexAttribI4iv = NULL; +PFNGLVERTEXATTRIBI4SVPROC glad_glVertexAttribI4sv = NULL; +PFNGLVERTEXATTRIBI4UBVPROC glad_glVertexAttribI4ubv = NULL; +PFNGLVERTEXATTRIBI4UIPROC glad_glVertexAttribI4ui = NULL; +PFNGLVERTEXATTRIBI4UIVPROC glad_glVertexAttribI4uiv = NULL; +PFNGLVERTEXATTRIBI4USVPROC glad_glVertexAttribI4usv = NULL; +PFNGLVERTEXATTRIBIPOINTERPROC glad_glVertexAttribIPointer = NULL; +PFNGLVERTEXATTRIBPOINTERPROC glad_glVertexAttribPointer = NULL; +PFNGLVIEWPORTPROC glad_glViewport = NULL; +int GLAD_GL_ARB_buffer_storage = 0; +int GLAD_GL_ARB_debug_output = 0; +int GLAD_GL_ARB_sync = 0; +PFNGLBUFFERSTORAGEPROC glad_glBufferStorage = NULL; +PFNGLDEBUGMESSAGECONTROLARBPROC glad_glDebugMessageControlARB = NULL; +PFNGLDEBUGMESSAGEINSERTARBPROC glad_glDebugMessageInsertARB = NULL; +PFNGLDEBUGMESSAGECALLBACKARBPROC glad_glDebugMessageCallbackARB = NULL; +PFNGLGETDEBUGMESSAGELOGARBPROC glad_glGetDebugMessageLogARB = NULL; +PFNGLFENCESYNCPROC glad_glFenceSync = NULL; +PFNGLISSYNCPROC glad_glIsSync = NULL; +PFNGLDELETESYNCPROC glad_glDeleteSync = NULL; +PFNGLCLIENTWAITSYNCPROC glad_glClientWaitSync = NULL; +PFNGLWAITSYNCPROC glad_glWaitSync = NULL; +PFNGLGETINTEGER64VPROC glad_glGetInteger64v = NULL; +PFNGLGETSYNCIVPROC glad_glGetSynciv = NULL; +static void +load_GL_VERSION_1_0(GLADloadproc load) +{ + if (!GLAD_GL_VERSION_1_0) + return; + glad_glCullFace = (PFNGLCULLFACEPROC) load("glCullFace"); + glad_glFrontFace = (PFNGLFRONTFACEPROC) load("glFrontFace"); + glad_glHint = (PFNGLHINTPROC) load("glHint"); + glad_glLineWidth = (PFNGLLINEWIDTHPROC) load("glLineWidth"); + glad_glPointSize = (PFNGLPOINTSIZEPROC) load("glPointSize"); + glad_glPolygonMode = (PFNGLPOLYGONMODEPROC) load("glPolygonMode"); + glad_glScissor = (PFNGLSCISSORPROC) load("glScissor"); + glad_glTexParameterf = (PFNGLTEXPARAMETERFPROC) load("glTexParameterf"); + glad_glTexParameterfv = (PFNGLTEXPARAMETERFVPROC) load("glTexParameterfv"); + glad_glTexParameteri = (PFNGLTEXPARAMETERIPROC) load("glTexParameteri"); + glad_glTexParameteriv = (PFNGLTEXPARAMETERIVPROC) load("glTexParameteriv"); + glad_glTexImage1D = (PFNGLTEXIMAGE1DPROC) load("glTexImage1D"); + glad_glTexImage2D = (PFNGLTEXIMAGE2DPROC) load("glTexImage2D"); + glad_glDrawBuffer = (PFNGLDRAWBUFFERPROC) load("glDrawBuffer"); + glad_glClear = (PFNGLCLEARPROC) load("glClear"); + glad_glClearColor = (PFNGLCLEARCOLORPROC) load("glClearColor"); + glad_glClearStencil = (PFNGLCLEARSTENCILPROC) load("glClearStencil"); + glad_glClearDepth = (PFNGLCLEARDEPTHPROC) load("glClearDepth"); + glad_glStencilMask = (PFNGLSTENCILMASKPROC) load("glStencilMask"); + glad_glColorMask = (PFNGLCOLORMASKPROC) load("glColorMask"); + glad_glDepthMask = (PFNGLDEPTHMASKPROC) load("glDepthMask"); + glad_glDisable = (PFNGLDISABLEPROC) load("glDisable"); + glad_glEnable = (PFNGLENABLEPROC) load("glEnable"); + glad_glFinish = (PFNGLFINISHPROC) load("glFinish"); + glad_glFlush = (PFNGLFLUSHPROC) load("glFlush"); + glad_glBlendFunc = (PFNGLBLENDFUNCPROC) load("glBlendFunc"); + glad_glLogicOp = (PFNGLLOGICOPPROC) load("glLogicOp"); + glad_glStencilFunc = (PFNGLSTENCILFUNCPROC) load("glStencilFunc"); + glad_glStencilOp = (PFNGLSTENCILOPPROC) load("glStencilOp"); + glad_glDepthFunc = (PFNGLDEPTHFUNCPROC) load("glDepthFunc"); + glad_glPixelStoref = (PFNGLPIXELSTOREFPROC) load("glPixelStoref"); + glad_glPixelStorei = (PFNGLPIXELSTOREIPROC) load("glPixelStorei"); + glad_glReadBuffer = (PFNGLREADBUFFERPROC) load("glReadBuffer"); + glad_glReadPixels = (PFNGLREADPIXELSPROC) load("glReadPixels"); + glad_glGetBooleanv = (PFNGLGETBOOLEANVPROC) load("glGetBooleanv"); + glad_glGetDoublev = (PFNGLGETDOUBLEVPROC) load("glGetDoublev"); + glad_glGetError = (PFNGLGETERRORPROC) load("glGetError"); + glad_glGetFloatv = (PFNGLGETFLOATVPROC) load("glGetFloatv"); + glad_glGetIntegerv = (PFNGLGETINTEGERVPROC) load("glGetIntegerv"); + glad_glGetString = (PFNGLGETSTRINGPROC) load("glGetString"); + glad_glGetTexImage = (PFNGLGETTEXIMAGEPROC) load("glGetTexImage"); + glad_glGetTexParameterfv = (PFNGLGETTEXPARAMETERFVPROC) load("glGetTexParameterfv"); + glad_glGetTexParameteriv = (PFNGLGETTEXPARAMETERIVPROC) load("glGetTexParameteriv"); + glad_glGetTexLevelParameterfv = (PFNGLGETTEXLEVELPARAMETERFVPROC) load("glGetTexLevelParameterfv"); + glad_glGetTexLevelParameteriv = (PFNGLGETTEXLEVELPARAMETERIVPROC) load("glGetTexLevelParameteriv"); + glad_glIsEnabled = (PFNGLISENABLEDPROC) load("glIsEnabled"); + glad_glDepthRange = (PFNGLDEPTHRANGEPROC) load("glDepthRange"); + glad_glViewport = (PFNGLVIEWPORTPROC) load("glViewport"); } -static void load_GL_VERSION_1_1(GLADloadproc load) { - if(!GLAD_GL_VERSION_1_1) return; - glad_glDrawArrays = (PFNGLDRAWARRAYSPROC)load("glDrawArrays"); - glad_glDrawElements = (PFNGLDRAWELEMENTSPROC)load("glDrawElements"); - glad_glPolygonOffset = (PFNGLPOLYGONOFFSETPROC)load("glPolygonOffset"); - glad_glCopyTexImage1D = (PFNGLCOPYTEXIMAGE1DPROC)load("glCopyTexImage1D"); - glad_glCopyTexImage2D = (PFNGLCOPYTEXIMAGE2DPROC)load("glCopyTexImage2D"); - glad_glCopyTexSubImage1D = (PFNGLCOPYTEXSUBIMAGE1DPROC)load("glCopyTexSubImage1D"); - glad_glCopyTexSubImage2D = (PFNGLCOPYTEXSUBIMAGE2DPROC)load("glCopyTexSubImage2D"); - glad_glTexSubImage1D = (PFNGLTEXSUBIMAGE1DPROC)load("glTexSubImage1D"); - glad_glTexSubImage2D = (PFNGLTEXSUBIMAGE2DPROC)load("glTexSubImage2D"); - glad_glBindTexture = (PFNGLBINDTEXTUREPROC)load("glBindTexture"); - glad_glDeleteTextures = (PFNGLDELETETEXTURESPROC)load("glDeleteTextures"); - glad_glGenTextures = (PFNGLGENTEXTURESPROC)load("glGenTextures"); - glad_glIsTexture = (PFNGLISTEXTUREPROC)load("glIsTexture"); +static void +load_GL_VERSION_1_1(GLADloadproc load) +{ + if (!GLAD_GL_VERSION_1_1) + return; + glad_glDrawArrays = (PFNGLDRAWARRAYSPROC) load("glDrawArrays"); + glad_glDrawElements = (PFNGLDRAWELEMENTSPROC) load("glDrawElements"); + glad_glPolygonOffset = (PFNGLPOLYGONOFFSETPROC) load("glPolygonOffset"); + glad_glCopyTexImage1D = (PFNGLCOPYTEXIMAGE1DPROC) load("glCopyTexImage1D"); + glad_glCopyTexImage2D = (PFNGLCOPYTEXIMAGE2DPROC) load("glCopyTexImage2D"); + glad_glCopyTexSubImage1D = (PFNGLCOPYTEXSUBIMAGE1DPROC) load("glCopyTexSubImage1D"); + glad_glCopyTexSubImage2D = (PFNGLCOPYTEXSUBIMAGE2DPROC) load("glCopyTexSubImage2D"); + glad_glTexSubImage1D = (PFNGLTEXSUBIMAGE1DPROC) load("glTexSubImage1D"); + glad_glTexSubImage2D = (PFNGLTEXSUBIMAGE2DPROC) load("glTexSubImage2D"); + glad_glBindTexture = (PFNGLBINDTEXTUREPROC) load("glBindTexture"); + glad_glDeleteTextures = (PFNGLDELETETEXTURESPROC) load("glDeleteTextures"); + glad_glGenTextures = (PFNGLGENTEXTURESPROC) load("glGenTextures"); + glad_glIsTexture = (PFNGLISTEXTUREPROC) load("glIsTexture"); } -static void load_GL_VERSION_1_2(GLADloadproc load) { - if(!GLAD_GL_VERSION_1_2) return; - glad_glDrawRangeElements = (PFNGLDRAWRANGEELEMENTSPROC)load("glDrawRangeElements"); - glad_glTexImage3D = (PFNGLTEXIMAGE3DPROC)load("glTexImage3D"); - glad_glTexSubImage3D = (PFNGLTEXSUBIMAGE3DPROC)load("glTexSubImage3D"); - glad_glCopyTexSubImage3D = (PFNGLCOPYTEXSUBIMAGE3DPROC)load("glCopyTexSubImage3D"); +static void +load_GL_VERSION_1_2(GLADloadproc load) +{ + if (!GLAD_GL_VERSION_1_2) + return; + glad_glDrawRangeElements = (PFNGLDRAWRANGEELEMENTSPROC) load("glDrawRangeElements"); + glad_glTexImage3D = (PFNGLTEXIMAGE3DPROC) load("glTexImage3D"); + glad_glTexSubImage3D = (PFNGLTEXSUBIMAGE3DPROC) load("glTexSubImage3D"); + glad_glCopyTexSubImage3D = (PFNGLCOPYTEXSUBIMAGE3DPROC) load("glCopyTexSubImage3D"); } -static void load_GL_VERSION_1_3(GLADloadproc load) { - if(!GLAD_GL_VERSION_1_3) return; - glad_glActiveTexture = (PFNGLACTIVETEXTUREPROC)load("glActiveTexture"); - glad_glSampleCoverage = (PFNGLSAMPLECOVERAGEPROC)load("glSampleCoverage"); - glad_glCompressedTexImage3D = (PFNGLCOMPRESSEDTEXIMAGE3DPROC)load("glCompressedTexImage3D"); - glad_glCompressedTexImage2D = (PFNGLCOMPRESSEDTEXIMAGE2DPROC)load("glCompressedTexImage2D"); - glad_glCompressedTexImage1D = (PFNGLCOMPRESSEDTEXIMAGE1DPROC)load("glCompressedTexImage1D"); - glad_glCompressedTexSubImage3D = (PFNGLCOMPRESSEDTEXSUBIMAGE3DPROC)load("glCompressedTexSubImage3D"); - glad_glCompressedTexSubImage2D = (PFNGLCOMPRESSEDTEXSUBIMAGE2DPROC)load("glCompressedTexSubImage2D"); - glad_glCompressedTexSubImage1D = (PFNGLCOMPRESSEDTEXSUBIMAGE1DPROC)load("glCompressedTexSubImage1D"); - glad_glGetCompressedTexImage = (PFNGLGETCOMPRESSEDTEXIMAGEPROC)load("glGetCompressedTexImage"); +static void +load_GL_VERSION_1_3(GLADloadproc load) +{ + if (!GLAD_GL_VERSION_1_3) + return; + glad_glActiveTexture = (PFNGLACTIVETEXTUREPROC) load("glActiveTexture"); + glad_glSampleCoverage = (PFNGLSAMPLECOVERAGEPROC) load("glSampleCoverage"); + glad_glCompressedTexImage3D = (PFNGLCOMPRESSEDTEXIMAGE3DPROC) load("glCompressedTexImage3D"); + glad_glCompressedTexImage2D = (PFNGLCOMPRESSEDTEXIMAGE2DPROC) load("glCompressedTexImage2D"); + glad_glCompressedTexImage1D = (PFNGLCOMPRESSEDTEXIMAGE1DPROC) load("glCompressedTexImage1D"); + glad_glCompressedTexSubImage3D = (PFNGLCOMPRESSEDTEXSUBIMAGE3DPROC) load("glCompressedTexSubImage3D"); + glad_glCompressedTexSubImage2D = (PFNGLCOMPRESSEDTEXSUBIMAGE2DPROC) load("glCompressedTexSubImage2D"); + glad_glCompressedTexSubImage1D = (PFNGLCOMPRESSEDTEXSUBIMAGE1DPROC) load("glCompressedTexSubImage1D"); + glad_glGetCompressedTexImage = (PFNGLGETCOMPRESSEDTEXIMAGEPROC) load("glGetCompressedTexImage"); } -static void load_GL_VERSION_1_4(GLADloadproc load) { - if(!GLAD_GL_VERSION_1_4) return; - glad_glBlendFuncSeparate = (PFNGLBLENDFUNCSEPARATEPROC)load("glBlendFuncSeparate"); - glad_glMultiDrawArrays = (PFNGLMULTIDRAWARRAYSPROC)load("glMultiDrawArrays"); - glad_glMultiDrawElements = (PFNGLMULTIDRAWELEMENTSPROC)load("glMultiDrawElements"); - glad_glPointParameterf = (PFNGLPOINTPARAMETERFPROC)load("glPointParameterf"); - glad_glPointParameterfv = (PFNGLPOINTPARAMETERFVPROC)load("glPointParameterfv"); - glad_glPointParameteri = (PFNGLPOINTPARAMETERIPROC)load("glPointParameteri"); - glad_glPointParameteriv = (PFNGLPOINTPARAMETERIVPROC)load("glPointParameteriv"); - glad_glBlendColor = (PFNGLBLENDCOLORPROC)load("glBlendColor"); - glad_glBlendEquation = (PFNGLBLENDEQUATIONPROC)load("glBlendEquation"); +static void +load_GL_VERSION_1_4(GLADloadproc load) +{ + if (!GLAD_GL_VERSION_1_4) + return; + glad_glBlendFuncSeparate = (PFNGLBLENDFUNCSEPARATEPROC) load("glBlendFuncSeparate"); + glad_glMultiDrawArrays = (PFNGLMULTIDRAWARRAYSPROC) load("glMultiDrawArrays"); + glad_glMultiDrawElements = (PFNGLMULTIDRAWELEMENTSPROC) load("glMultiDrawElements"); + glad_glPointParameterf = (PFNGLPOINTPARAMETERFPROC) load("glPointParameterf"); + glad_glPointParameterfv = (PFNGLPOINTPARAMETERFVPROC) load("glPointParameterfv"); + glad_glPointParameteri = (PFNGLPOINTPARAMETERIPROC) load("glPointParameteri"); + glad_glPointParameteriv = (PFNGLPOINTPARAMETERIVPROC) load("glPointParameteriv"); + glad_glBlendColor = (PFNGLBLENDCOLORPROC) load("glBlendColor"); + glad_glBlendEquation = (PFNGLBLENDEQUATIONPROC) load("glBlendEquation"); } -static void load_GL_VERSION_1_5(GLADloadproc load) { - if(!GLAD_GL_VERSION_1_5) return; - glad_glGenQueries = (PFNGLGENQUERIESPROC)load("glGenQueries"); - glad_glDeleteQueries = (PFNGLDELETEQUERIESPROC)load("glDeleteQueries"); - glad_glIsQuery = (PFNGLISQUERYPROC)load("glIsQuery"); - glad_glBeginQuery = (PFNGLBEGINQUERYPROC)load("glBeginQuery"); - glad_glEndQuery = (PFNGLENDQUERYPROC)load("glEndQuery"); - glad_glGetQueryiv = (PFNGLGETQUERYIVPROC)load("glGetQueryiv"); - glad_glGetQueryObjectiv = (PFNGLGETQUERYOBJECTIVPROC)load("glGetQueryObjectiv"); - glad_glGetQueryObjectuiv = (PFNGLGETQUERYOBJECTUIVPROC)load("glGetQueryObjectuiv"); - glad_glBindBuffer = (PFNGLBINDBUFFERPROC)load("glBindBuffer"); - glad_glDeleteBuffers = (PFNGLDELETEBUFFERSPROC)load("glDeleteBuffers"); - glad_glGenBuffers = (PFNGLGENBUFFERSPROC)load("glGenBuffers"); - glad_glIsBuffer = (PFNGLISBUFFERPROC)load("glIsBuffer"); - glad_glBufferData = (PFNGLBUFFERDATAPROC)load("glBufferData"); - glad_glBufferSubData = (PFNGLBUFFERSUBDATAPROC)load("glBufferSubData"); - glad_glGetBufferSubData = (PFNGLGETBUFFERSUBDATAPROC)load("glGetBufferSubData"); - glad_glMapBuffer = (PFNGLMAPBUFFERPROC)load("glMapBuffer"); - glad_glUnmapBuffer = (PFNGLUNMAPBUFFERPROC)load("glUnmapBuffer"); - glad_glGetBufferParameteriv = (PFNGLGETBUFFERPARAMETERIVPROC)load("glGetBufferParameteriv"); - glad_glGetBufferPointerv = (PFNGLGETBUFFERPOINTERVPROC)load("glGetBufferPointerv"); +static void +load_GL_VERSION_1_5(GLADloadproc load) +{ + if (!GLAD_GL_VERSION_1_5) + return; + glad_glGenQueries = (PFNGLGENQUERIESPROC) load("glGenQueries"); + glad_glDeleteQueries = (PFNGLDELETEQUERIESPROC) load("glDeleteQueries"); + glad_glIsQuery = (PFNGLISQUERYPROC) load("glIsQuery"); + glad_glBeginQuery = (PFNGLBEGINQUERYPROC) load("glBeginQuery"); + glad_glEndQuery = (PFNGLENDQUERYPROC) load("glEndQuery"); + glad_glGetQueryiv = (PFNGLGETQUERYIVPROC) load("glGetQueryiv"); + glad_glGetQueryObjectiv = (PFNGLGETQUERYOBJECTIVPROC) load("glGetQueryObjectiv"); + glad_glGetQueryObjectuiv = (PFNGLGETQUERYOBJECTUIVPROC) load("glGetQueryObjectuiv"); + glad_glBindBuffer = (PFNGLBINDBUFFERPROC) load("glBindBuffer"); + glad_glDeleteBuffers = (PFNGLDELETEBUFFERSPROC) load("glDeleteBuffers"); + glad_glGenBuffers = (PFNGLGENBUFFERSPROC) load("glGenBuffers"); + glad_glIsBuffer = (PFNGLISBUFFERPROC) load("glIsBuffer"); + glad_glBufferData = (PFNGLBUFFERDATAPROC) load("glBufferData"); + glad_glBufferSubData = (PFNGLBUFFERSUBDATAPROC) load("glBufferSubData"); + glad_glGetBufferSubData = (PFNGLGETBUFFERSUBDATAPROC) load("glGetBufferSubData"); + glad_glMapBuffer = (PFNGLMAPBUFFERPROC) load("glMapBuffer"); + glad_glUnmapBuffer = (PFNGLUNMAPBUFFERPROC) load("glUnmapBuffer"); + glad_glGetBufferParameteriv = (PFNGLGETBUFFERPARAMETERIVPROC) load("glGetBufferParameteriv"); + glad_glGetBufferPointerv = (PFNGLGETBUFFERPOINTERVPROC) load("glGetBufferPointerv"); } -static void load_GL_VERSION_2_0(GLADloadproc load) { - if(!GLAD_GL_VERSION_2_0) return; - glad_glBlendEquationSeparate = (PFNGLBLENDEQUATIONSEPARATEPROC)load("glBlendEquationSeparate"); - glad_glDrawBuffers = (PFNGLDRAWBUFFERSPROC)load("glDrawBuffers"); - glad_glStencilOpSeparate = (PFNGLSTENCILOPSEPARATEPROC)load("glStencilOpSeparate"); - glad_glStencilFuncSeparate = (PFNGLSTENCILFUNCSEPARATEPROC)load("glStencilFuncSeparate"); - glad_glStencilMaskSeparate = (PFNGLSTENCILMASKSEPARATEPROC)load("glStencilMaskSeparate"); - glad_glAttachShader = (PFNGLATTACHSHADERPROC)load("glAttachShader"); - glad_glBindAttribLocation = (PFNGLBINDATTRIBLOCATIONPROC)load("glBindAttribLocation"); - glad_glCompileShader = (PFNGLCOMPILESHADERPROC)load("glCompileShader"); - glad_glCreateProgram = (PFNGLCREATEPROGRAMPROC)load("glCreateProgram"); - glad_glCreateShader = (PFNGLCREATESHADERPROC)load("glCreateShader"); - glad_glDeleteProgram = (PFNGLDELETEPROGRAMPROC)load("glDeleteProgram"); - glad_glDeleteShader = (PFNGLDELETESHADERPROC)load("glDeleteShader"); - glad_glDetachShader = (PFNGLDETACHSHADERPROC)load("glDetachShader"); - glad_glDisableVertexAttribArray = (PFNGLDISABLEVERTEXATTRIBARRAYPROC)load("glDisableVertexAttribArray"); - glad_glEnableVertexAttribArray = (PFNGLENABLEVERTEXATTRIBARRAYPROC)load("glEnableVertexAttribArray"); - glad_glGetActiveAttrib = (PFNGLGETACTIVEATTRIBPROC)load("glGetActiveAttrib"); - glad_glGetActiveUniform = (PFNGLGETACTIVEUNIFORMPROC)load("glGetActiveUniform"); - glad_glGetAttachedShaders = (PFNGLGETATTACHEDSHADERSPROC)load("glGetAttachedShaders"); - glad_glGetAttribLocation = (PFNGLGETATTRIBLOCATIONPROC)load("glGetAttribLocation"); - glad_glGetProgramiv = (PFNGLGETPROGRAMIVPROC)load("glGetProgramiv"); - glad_glGetProgramInfoLog = (PFNGLGETPROGRAMINFOLOGPROC)load("glGetProgramInfoLog"); - glad_glGetShaderiv = (PFNGLGETSHADERIVPROC)load("glGetShaderiv"); - glad_glGetShaderInfoLog = (PFNGLGETSHADERINFOLOGPROC)load("glGetShaderInfoLog"); - glad_glGetShaderSource = (PFNGLGETSHADERSOURCEPROC)load("glGetShaderSource"); - glad_glGetUniformLocation = (PFNGLGETUNIFORMLOCATIONPROC)load("glGetUniformLocation"); - glad_glGetUniformfv = (PFNGLGETUNIFORMFVPROC)load("glGetUniformfv"); - glad_glGetUniformiv = (PFNGLGETUNIFORMIVPROC)load("glGetUniformiv"); - glad_glGetVertexAttribdv = (PFNGLGETVERTEXATTRIBDVPROC)load("glGetVertexAttribdv"); - glad_glGetVertexAttribfv = (PFNGLGETVERTEXATTRIBFVPROC)load("glGetVertexAttribfv"); - glad_glGetVertexAttribiv = (PFNGLGETVERTEXATTRIBIVPROC)load("glGetVertexAttribiv"); - glad_glGetVertexAttribPointerv = (PFNGLGETVERTEXATTRIBPOINTERVPROC)load("glGetVertexAttribPointerv"); - glad_glIsProgram = (PFNGLISPROGRAMPROC)load("glIsProgram"); - glad_glIsShader = (PFNGLISSHADERPROC)load("glIsShader"); - glad_glLinkProgram = (PFNGLLINKPROGRAMPROC)load("glLinkProgram"); - glad_glShaderSource = (PFNGLSHADERSOURCEPROC)load("glShaderSource"); - glad_glUseProgram = (PFNGLUSEPROGRAMPROC)load("glUseProgram"); - glad_glUniform1f = (PFNGLUNIFORM1FPROC)load("glUniform1f"); - glad_glUniform2f = (PFNGLUNIFORM2FPROC)load("glUniform2f"); - glad_glUniform3f = (PFNGLUNIFORM3FPROC)load("glUniform3f"); - glad_glUniform4f = (PFNGLUNIFORM4FPROC)load("glUniform4f"); - glad_glUniform1i = (PFNGLUNIFORM1IPROC)load("glUniform1i"); - glad_glUniform2i = (PFNGLUNIFORM2IPROC)load("glUniform2i"); - glad_glUniform3i = (PFNGLUNIFORM3IPROC)load("glUniform3i"); - glad_glUniform4i = (PFNGLUNIFORM4IPROC)load("glUniform4i"); - glad_glUniform1fv = (PFNGLUNIFORM1FVPROC)load("glUniform1fv"); - glad_glUniform2fv = (PFNGLUNIFORM2FVPROC)load("glUniform2fv"); - glad_glUniform3fv = (PFNGLUNIFORM3FVPROC)load("glUniform3fv"); - glad_glUniform4fv = (PFNGLUNIFORM4FVPROC)load("glUniform4fv"); - glad_glUniform1iv = (PFNGLUNIFORM1IVPROC)load("glUniform1iv"); - glad_glUniform2iv = (PFNGLUNIFORM2IVPROC)load("glUniform2iv"); - glad_glUniform3iv = (PFNGLUNIFORM3IVPROC)load("glUniform3iv"); - glad_glUniform4iv = (PFNGLUNIFORM4IVPROC)load("glUniform4iv"); - glad_glUniformMatrix2fv = (PFNGLUNIFORMMATRIX2FVPROC)load("glUniformMatrix2fv"); - glad_glUniformMatrix3fv = (PFNGLUNIFORMMATRIX3FVPROC)load("glUniformMatrix3fv"); - glad_glUniformMatrix4fv = (PFNGLUNIFORMMATRIX4FVPROC)load("glUniformMatrix4fv"); - glad_glValidateProgram = (PFNGLVALIDATEPROGRAMPROC)load("glValidateProgram"); - glad_glVertexAttrib1d = (PFNGLVERTEXATTRIB1DPROC)load("glVertexAttrib1d"); - glad_glVertexAttrib1dv = (PFNGLVERTEXATTRIB1DVPROC)load("glVertexAttrib1dv"); - glad_glVertexAttrib1f = (PFNGLVERTEXATTRIB1FPROC)load("glVertexAttrib1f"); - glad_glVertexAttrib1fv = (PFNGLVERTEXATTRIB1FVPROC)load("glVertexAttrib1fv"); - glad_glVertexAttrib1s = (PFNGLVERTEXATTRIB1SPROC)load("glVertexAttrib1s"); - glad_glVertexAttrib1sv = (PFNGLVERTEXATTRIB1SVPROC)load("glVertexAttrib1sv"); - glad_glVertexAttrib2d = (PFNGLVERTEXATTRIB2DPROC)load("glVertexAttrib2d"); - glad_glVertexAttrib2dv = (PFNGLVERTEXATTRIB2DVPROC)load("glVertexAttrib2dv"); - glad_glVertexAttrib2f = (PFNGLVERTEXATTRIB2FPROC)load("glVertexAttrib2f"); - glad_glVertexAttrib2fv = (PFNGLVERTEXATTRIB2FVPROC)load("glVertexAttrib2fv"); - glad_glVertexAttrib2s = (PFNGLVERTEXATTRIB2SPROC)load("glVertexAttrib2s"); - glad_glVertexAttrib2sv = (PFNGLVERTEXATTRIB2SVPROC)load("glVertexAttrib2sv"); - glad_glVertexAttrib3d = (PFNGLVERTEXATTRIB3DPROC)load("glVertexAttrib3d"); - glad_glVertexAttrib3dv = (PFNGLVERTEXATTRIB3DVPROC)load("glVertexAttrib3dv"); - glad_glVertexAttrib3f = (PFNGLVERTEXATTRIB3FPROC)load("glVertexAttrib3f"); - glad_glVertexAttrib3fv = (PFNGLVERTEXATTRIB3FVPROC)load("glVertexAttrib3fv"); - glad_glVertexAttrib3s = (PFNGLVERTEXATTRIB3SPROC)load("glVertexAttrib3s"); - glad_glVertexAttrib3sv = (PFNGLVERTEXATTRIB3SVPROC)load("glVertexAttrib3sv"); - glad_glVertexAttrib4Nbv = (PFNGLVERTEXATTRIB4NBVPROC)load("glVertexAttrib4Nbv"); - glad_glVertexAttrib4Niv = (PFNGLVERTEXATTRIB4NIVPROC)load("glVertexAttrib4Niv"); - glad_glVertexAttrib4Nsv = (PFNGLVERTEXATTRIB4NSVPROC)load("glVertexAttrib4Nsv"); - glad_glVertexAttrib4Nub = (PFNGLVERTEXATTRIB4NUBPROC)load("glVertexAttrib4Nub"); - glad_glVertexAttrib4Nubv = (PFNGLVERTEXATTRIB4NUBVPROC)load("glVertexAttrib4Nubv"); - glad_glVertexAttrib4Nuiv = (PFNGLVERTEXATTRIB4NUIVPROC)load("glVertexAttrib4Nuiv"); - glad_glVertexAttrib4Nusv = (PFNGLVERTEXATTRIB4NUSVPROC)load("glVertexAttrib4Nusv"); - glad_glVertexAttrib4bv = (PFNGLVERTEXATTRIB4BVPROC)load("glVertexAttrib4bv"); - glad_glVertexAttrib4d = (PFNGLVERTEXATTRIB4DPROC)load("glVertexAttrib4d"); - glad_glVertexAttrib4dv = (PFNGLVERTEXATTRIB4DVPROC)load("glVertexAttrib4dv"); - glad_glVertexAttrib4f = (PFNGLVERTEXATTRIB4FPROC)load("glVertexAttrib4f"); - glad_glVertexAttrib4fv = (PFNGLVERTEXATTRIB4FVPROC)load("glVertexAttrib4fv"); - glad_glVertexAttrib4iv = (PFNGLVERTEXATTRIB4IVPROC)load("glVertexAttrib4iv"); - glad_glVertexAttrib4s = (PFNGLVERTEXATTRIB4SPROC)load("glVertexAttrib4s"); - glad_glVertexAttrib4sv = (PFNGLVERTEXATTRIB4SVPROC)load("glVertexAttrib4sv"); - glad_glVertexAttrib4ubv = (PFNGLVERTEXATTRIB4UBVPROC)load("glVertexAttrib4ubv"); - glad_glVertexAttrib4uiv = (PFNGLVERTEXATTRIB4UIVPROC)load("glVertexAttrib4uiv"); - glad_glVertexAttrib4usv = (PFNGLVERTEXATTRIB4USVPROC)load("glVertexAttrib4usv"); - glad_glVertexAttribPointer = (PFNGLVERTEXATTRIBPOINTERPROC)load("glVertexAttribPointer"); +static void +load_GL_VERSION_2_0(GLADloadproc load) +{ + if (!GLAD_GL_VERSION_2_0) + return; + glad_glBlendEquationSeparate = (PFNGLBLENDEQUATIONSEPARATEPROC) load("glBlendEquationSeparate"); + glad_glDrawBuffers = (PFNGLDRAWBUFFERSPROC) load("glDrawBuffers"); + glad_glStencilOpSeparate = (PFNGLSTENCILOPSEPARATEPROC) load("glStencilOpSeparate"); + glad_glStencilFuncSeparate = (PFNGLSTENCILFUNCSEPARATEPROC) load("glStencilFuncSeparate"); + glad_glStencilMaskSeparate = (PFNGLSTENCILMASKSEPARATEPROC) load("glStencilMaskSeparate"); + glad_glAttachShader = (PFNGLATTACHSHADERPROC) load("glAttachShader"); + glad_glBindAttribLocation = (PFNGLBINDATTRIBLOCATIONPROC) load("glBindAttribLocation"); + glad_glCompileShader = (PFNGLCOMPILESHADERPROC) load("glCompileShader"); + glad_glCreateProgram = (PFNGLCREATEPROGRAMPROC) load("glCreateProgram"); + glad_glCreateShader = (PFNGLCREATESHADERPROC) load("glCreateShader"); + glad_glDeleteProgram = (PFNGLDELETEPROGRAMPROC) load("glDeleteProgram"); + glad_glDeleteShader = (PFNGLDELETESHADERPROC) load("glDeleteShader"); + glad_glDetachShader = (PFNGLDETACHSHADERPROC) load("glDetachShader"); + glad_glDisableVertexAttribArray = (PFNGLDISABLEVERTEXATTRIBARRAYPROC) load("glDisableVertexAttribArray"); + glad_glEnableVertexAttribArray = (PFNGLENABLEVERTEXATTRIBARRAYPROC) load("glEnableVertexAttribArray"); + glad_glGetActiveAttrib = (PFNGLGETACTIVEATTRIBPROC) load("glGetActiveAttrib"); + glad_glGetActiveUniform = (PFNGLGETACTIVEUNIFORMPROC) load("glGetActiveUniform"); + glad_glGetAttachedShaders = (PFNGLGETATTACHEDSHADERSPROC) load("glGetAttachedShaders"); + glad_glGetAttribLocation = (PFNGLGETATTRIBLOCATIONPROC) load("glGetAttribLocation"); + glad_glGetProgramiv = (PFNGLGETPROGRAMIVPROC) load("glGetProgramiv"); + glad_glGetProgramInfoLog = (PFNGLGETPROGRAMINFOLOGPROC) load("glGetProgramInfoLog"); + glad_glGetShaderiv = (PFNGLGETSHADERIVPROC) load("glGetShaderiv"); + glad_glGetShaderInfoLog = (PFNGLGETSHADERINFOLOGPROC) load("glGetShaderInfoLog"); + glad_glGetShaderSource = (PFNGLGETSHADERSOURCEPROC) load("glGetShaderSource"); + glad_glGetUniformLocation = (PFNGLGETUNIFORMLOCATIONPROC) load("glGetUniformLocation"); + glad_glGetUniformfv = (PFNGLGETUNIFORMFVPROC) load("glGetUniformfv"); + glad_glGetUniformiv = (PFNGLGETUNIFORMIVPROC) load("glGetUniformiv"); + glad_glGetVertexAttribdv = (PFNGLGETVERTEXATTRIBDVPROC) load("glGetVertexAttribdv"); + glad_glGetVertexAttribfv = (PFNGLGETVERTEXATTRIBFVPROC) load("glGetVertexAttribfv"); + glad_glGetVertexAttribiv = (PFNGLGETVERTEXATTRIBIVPROC) load("glGetVertexAttribiv"); + glad_glGetVertexAttribPointerv = (PFNGLGETVERTEXATTRIBPOINTERVPROC) load("glGetVertexAttribPointerv"); + glad_glIsProgram = (PFNGLISPROGRAMPROC) load("glIsProgram"); + glad_glIsShader = (PFNGLISSHADERPROC) load("glIsShader"); + glad_glLinkProgram = (PFNGLLINKPROGRAMPROC) load("glLinkProgram"); + glad_glShaderSource = (PFNGLSHADERSOURCEPROC) load("glShaderSource"); + glad_glUseProgram = (PFNGLUSEPROGRAMPROC) load("glUseProgram"); + glad_glUniform1f = (PFNGLUNIFORM1FPROC) load("glUniform1f"); + glad_glUniform2f = (PFNGLUNIFORM2FPROC) load("glUniform2f"); + glad_glUniform3f = (PFNGLUNIFORM3FPROC) load("glUniform3f"); + glad_glUniform4f = (PFNGLUNIFORM4FPROC) load("glUniform4f"); + glad_glUniform1i = (PFNGLUNIFORM1IPROC) load("glUniform1i"); + glad_glUniform2i = (PFNGLUNIFORM2IPROC) load("glUniform2i"); + glad_glUniform3i = (PFNGLUNIFORM3IPROC) load("glUniform3i"); + glad_glUniform4i = (PFNGLUNIFORM4IPROC) load("glUniform4i"); + glad_glUniform1fv = (PFNGLUNIFORM1FVPROC) load("glUniform1fv"); + glad_glUniform2fv = (PFNGLUNIFORM2FVPROC) load("glUniform2fv"); + glad_glUniform3fv = (PFNGLUNIFORM3FVPROC) load("glUniform3fv"); + glad_glUniform4fv = (PFNGLUNIFORM4FVPROC) load("glUniform4fv"); + glad_glUniform1iv = (PFNGLUNIFORM1IVPROC) load("glUniform1iv"); + glad_glUniform2iv = (PFNGLUNIFORM2IVPROC) load("glUniform2iv"); + glad_glUniform3iv = (PFNGLUNIFORM3IVPROC) load("glUniform3iv"); + glad_glUniform4iv = (PFNGLUNIFORM4IVPROC) load("glUniform4iv"); + glad_glUniformMatrix2fv = (PFNGLUNIFORMMATRIX2FVPROC) load("glUniformMatrix2fv"); + glad_glUniformMatrix3fv = (PFNGLUNIFORMMATRIX3FVPROC) load("glUniformMatrix3fv"); + glad_glUniformMatrix4fv = (PFNGLUNIFORMMATRIX4FVPROC) load("glUniformMatrix4fv"); + glad_glValidateProgram = (PFNGLVALIDATEPROGRAMPROC) load("glValidateProgram"); + glad_glVertexAttrib1d = (PFNGLVERTEXATTRIB1DPROC) load("glVertexAttrib1d"); + glad_glVertexAttrib1dv = (PFNGLVERTEXATTRIB1DVPROC) load("glVertexAttrib1dv"); + glad_glVertexAttrib1f = (PFNGLVERTEXATTRIB1FPROC) load("glVertexAttrib1f"); + glad_glVertexAttrib1fv = (PFNGLVERTEXATTRIB1FVPROC) load("glVertexAttrib1fv"); + glad_glVertexAttrib1s = (PFNGLVERTEXATTRIB1SPROC) load("glVertexAttrib1s"); + glad_glVertexAttrib1sv = (PFNGLVERTEXATTRIB1SVPROC) load("glVertexAttrib1sv"); + glad_glVertexAttrib2d = (PFNGLVERTEXATTRIB2DPROC) load("glVertexAttrib2d"); + glad_glVertexAttrib2dv = (PFNGLVERTEXATTRIB2DVPROC) load("glVertexAttrib2dv"); + glad_glVertexAttrib2f = (PFNGLVERTEXATTRIB2FPROC) load("glVertexAttrib2f"); + glad_glVertexAttrib2fv = (PFNGLVERTEXATTRIB2FVPROC) load("glVertexAttrib2fv"); + glad_glVertexAttrib2s = (PFNGLVERTEXATTRIB2SPROC) load("glVertexAttrib2s"); + glad_glVertexAttrib2sv = (PFNGLVERTEXATTRIB2SVPROC) load("glVertexAttrib2sv"); + glad_glVertexAttrib3d = (PFNGLVERTEXATTRIB3DPROC) load("glVertexAttrib3d"); + glad_glVertexAttrib3dv = (PFNGLVERTEXATTRIB3DVPROC) load("glVertexAttrib3dv"); + glad_glVertexAttrib3f = (PFNGLVERTEXATTRIB3FPROC) load("glVertexAttrib3f"); + glad_glVertexAttrib3fv = (PFNGLVERTEXATTRIB3FVPROC) load("glVertexAttrib3fv"); + glad_glVertexAttrib3s = (PFNGLVERTEXATTRIB3SPROC) load("glVertexAttrib3s"); + glad_glVertexAttrib3sv = (PFNGLVERTEXATTRIB3SVPROC) load("glVertexAttrib3sv"); + glad_glVertexAttrib4Nbv = (PFNGLVERTEXATTRIB4NBVPROC) load("glVertexAttrib4Nbv"); + glad_glVertexAttrib4Niv = (PFNGLVERTEXATTRIB4NIVPROC) load("glVertexAttrib4Niv"); + glad_glVertexAttrib4Nsv = (PFNGLVERTEXATTRIB4NSVPROC) load("glVertexAttrib4Nsv"); + glad_glVertexAttrib4Nub = (PFNGLVERTEXATTRIB4NUBPROC) load("glVertexAttrib4Nub"); + glad_glVertexAttrib4Nubv = (PFNGLVERTEXATTRIB4NUBVPROC) load("glVertexAttrib4Nubv"); + glad_glVertexAttrib4Nuiv = (PFNGLVERTEXATTRIB4NUIVPROC) load("glVertexAttrib4Nuiv"); + glad_glVertexAttrib4Nusv = (PFNGLVERTEXATTRIB4NUSVPROC) load("glVertexAttrib4Nusv"); + glad_glVertexAttrib4bv = (PFNGLVERTEXATTRIB4BVPROC) load("glVertexAttrib4bv"); + glad_glVertexAttrib4d = (PFNGLVERTEXATTRIB4DPROC) load("glVertexAttrib4d"); + glad_glVertexAttrib4dv = (PFNGLVERTEXATTRIB4DVPROC) load("glVertexAttrib4dv"); + glad_glVertexAttrib4f = (PFNGLVERTEXATTRIB4FPROC) load("glVertexAttrib4f"); + glad_glVertexAttrib4fv = (PFNGLVERTEXATTRIB4FVPROC) load("glVertexAttrib4fv"); + glad_glVertexAttrib4iv = (PFNGLVERTEXATTRIB4IVPROC) load("glVertexAttrib4iv"); + glad_glVertexAttrib4s = (PFNGLVERTEXATTRIB4SPROC) load("glVertexAttrib4s"); + glad_glVertexAttrib4sv = (PFNGLVERTEXATTRIB4SVPROC) load("glVertexAttrib4sv"); + glad_glVertexAttrib4ubv = (PFNGLVERTEXATTRIB4UBVPROC) load("glVertexAttrib4ubv"); + glad_glVertexAttrib4uiv = (PFNGLVERTEXATTRIB4UIVPROC) load("glVertexAttrib4uiv"); + glad_glVertexAttrib4usv = (PFNGLVERTEXATTRIB4USVPROC) load("glVertexAttrib4usv"); + glad_glVertexAttribPointer = (PFNGLVERTEXATTRIBPOINTERPROC) load("glVertexAttribPointer"); } -static void load_GL_VERSION_2_1(GLADloadproc load) { - if(!GLAD_GL_VERSION_2_1) return; - glad_glUniformMatrix2x3fv = (PFNGLUNIFORMMATRIX2X3FVPROC)load("glUniformMatrix2x3fv"); - glad_glUniformMatrix3x2fv = (PFNGLUNIFORMMATRIX3X2FVPROC)load("glUniformMatrix3x2fv"); - glad_glUniformMatrix2x4fv = (PFNGLUNIFORMMATRIX2X4FVPROC)load("glUniformMatrix2x4fv"); - glad_glUniformMatrix4x2fv = (PFNGLUNIFORMMATRIX4X2FVPROC)load("glUniformMatrix4x2fv"); - glad_glUniformMatrix3x4fv = (PFNGLUNIFORMMATRIX3X4FVPROC)load("glUniformMatrix3x4fv"); - glad_glUniformMatrix4x3fv = (PFNGLUNIFORMMATRIX4X3FVPROC)load("glUniformMatrix4x3fv"); +static void +load_GL_VERSION_2_1(GLADloadproc load) +{ + if (!GLAD_GL_VERSION_2_1) + return; + glad_glUniformMatrix2x3fv = (PFNGLUNIFORMMATRIX2X3FVPROC) load("glUniformMatrix2x3fv"); + glad_glUniformMatrix3x2fv = (PFNGLUNIFORMMATRIX3X2FVPROC) load("glUniformMatrix3x2fv"); + glad_glUniformMatrix2x4fv = (PFNGLUNIFORMMATRIX2X4FVPROC) load("glUniformMatrix2x4fv"); + glad_glUniformMatrix4x2fv = (PFNGLUNIFORMMATRIX4X2FVPROC) load("glUniformMatrix4x2fv"); + glad_glUniformMatrix3x4fv = (PFNGLUNIFORMMATRIX3X4FVPROC) load("glUniformMatrix3x4fv"); + glad_glUniformMatrix4x3fv = (PFNGLUNIFORMMATRIX4X3FVPROC) load("glUniformMatrix4x3fv"); } -static void load_GL_VERSION_3_0(GLADloadproc load) { - if(!GLAD_GL_VERSION_3_0) return; - glad_glColorMaski = (PFNGLCOLORMASKIPROC)load("glColorMaski"); - glad_glGetBooleani_v = (PFNGLGETBOOLEANI_VPROC)load("glGetBooleani_v"); - glad_glGetIntegeri_v = (PFNGLGETINTEGERI_VPROC)load("glGetIntegeri_v"); - glad_glEnablei = (PFNGLENABLEIPROC)load("glEnablei"); - glad_glDisablei = (PFNGLDISABLEIPROC)load("glDisablei"); - glad_glIsEnabledi = (PFNGLISENABLEDIPROC)load("glIsEnabledi"); - glad_glBeginTransformFeedback = (PFNGLBEGINTRANSFORMFEEDBACKPROC)load("glBeginTransformFeedback"); - glad_glEndTransformFeedback = (PFNGLENDTRANSFORMFEEDBACKPROC)load("glEndTransformFeedback"); - glad_glBindBufferRange = (PFNGLBINDBUFFERRANGEPROC)load("glBindBufferRange"); - glad_glBindBufferBase = (PFNGLBINDBUFFERBASEPROC)load("glBindBufferBase"); - glad_glTransformFeedbackVaryings = (PFNGLTRANSFORMFEEDBACKVARYINGSPROC)load("glTransformFeedbackVaryings"); - glad_glGetTransformFeedbackVarying = (PFNGLGETTRANSFORMFEEDBACKVARYINGPROC)load("glGetTransformFeedbackVarying"); - glad_glClampColor = (PFNGLCLAMPCOLORPROC)load("glClampColor"); - glad_glBeginConditionalRender = (PFNGLBEGINCONDITIONALRENDERPROC)load("glBeginConditionalRender"); - glad_glEndConditionalRender = (PFNGLENDCONDITIONALRENDERPROC)load("glEndConditionalRender"); - glad_glVertexAttribIPointer = (PFNGLVERTEXATTRIBIPOINTERPROC)load("glVertexAttribIPointer"); - glad_glGetVertexAttribIiv = (PFNGLGETVERTEXATTRIBIIVPROC)load("glGetVertexAttribIiv"); - glad_glGetVertexAttribIuiv = (PFNGLGETVERTEXATTRIBIUIVPROC)load("glGetVertexAttribIuiv"); - glad_glVertexAttribI1i = (PFNGLVERTEXATTRIBI1IPROC)load("glVertexAttribI1i"); - glad_glVertexAttribI2i = (PFNGLVERTEXATTRIBI2IPROC)load("glVertexAttribI2i"); - glad_glVertexAttribI3i = (PFNGLVERTEXATTRIBI3IPROC)load("glVertexAttribI3i"); - glad_glVertexAttribI4i = (PFNGLVERTEXATTRIBI4IPROC)load("glVertexAttribI4i"); - glad_glVertexAttribI1ui = (PFNGLVERTEXATTRIBI1UIPROC)load("glVertexAttribI1ui"); - glad_glVertexAttribI2ui = (PFNGLVERTEXATTRIBI2UIPROC)load("glVertexAttribI2ui"); - glad_glVertexAttribI3ui = (PFNGLVERTEXATTRIBI3UIPROC)load("glVertexAttribI3ui"); - glad_glVertexAttribI4ui = (PFNGLVERTEXATTRIBI4UIPROC)load("glVertexAttribI4ui"); - glad_glVertexAttribI1iv = (PFNGLVERTEXATTRIBI1IVPROC)load("glVertexAttribI1iv"); - glad_glVertexAttribI2iv = (PFNGLVERTEXATTRIBI2IVPROC)load("glVertexAttribI2iv"); - glad_glVertexAttribI3iv = (PFNGLVERTEXATTRIBI3IVPROC)load("glVertexAttribI3iv"); - glad_glVertexAttribI4iv = (PFNGLVERTEXATTRIBI4IVPROC)load("glVertexAttribI4iv"); - glad_glVertexAttribI1uiv = (PFNGLVERTEXATTRIBI1UIVPROC)load("glVertexAttribI1uiv"); - glad_glVertexAttribI2uiv = (PFNGLVERTEXATTRIBI2UIVPROC)load("glVertexAttribI2uiv"); - glad_glVertexAttribI3uiv = (PFNGLVERTEXATTRIBI3UIVPROC)load("glVertexAttribI3uiv"); - glad_glVertexAttribI4uiv = (PFNGLVERTEXATTRIBI4UIVPROC)load("glVertexAttribI4uiv"); - glad_glVertexAttribI4bv = (PFNGLVERTEXATTRIBI4BVPROC)load("glVertexAttribI4bv"); - glad_glVertexAttribI4sv = (PFNGLVERTEXATTRIBI4SVPROC)load("glVertexAttribI4sv"); - glad_glVertexAttribI4ubv = (PFNGLVERTEXATTRIBI4UBVPROC)load("glVertexAttribI4ubv"); - glad_glVertexAttribI4usv = (PFNGLVERTEXATTRIBI4USVPROC)load("glVertexAttribI4usv"); - glad_glGetUniformuiv = (PFNGLGETUNIFORMUIVPROC)load("glGetUniformuiv"); - glad_glBindFragDataLocation = (PFNGLBINDFRAGDATALOCATIONPROC)load("glBindFragDataLocation"); - glad_glGetFragDataLocation = (PFNGLGETFRAGDATALOCATIONPROC)load("glGetFragDataLocation"); - glad_glUniform1ui = (PFNGLUNIFORM1UIPROC)load("glUniform1ui"); - glad_glUniform2ui = (PFNGLUNIFORM2UIPROC)load("glUniform2ui"); - glad_glUniform3ui = (PFNGLUNIFORM3UIPROC)load("glUniform3ui"); - glad_glUniform4ui = (PFNGLUNIFORM4UIPROC)load("glUniform4ui"); - glad_glUniform1uiv = (PFNGLUNIFORM1UIVPROC)load("glUniform1uiv"); - glad_glUniform2uiv = (PFNGLUNIFORM2UIVPROC)load("glUniform2uiv"); - glad_glUniform3uiv = (PFNGLUNIFORM3UIVPROC)load("glUniform3uiv"); - glad_glUniform4uiv = (PFNGLUNIFORM4UIVPROC)load("glUniform4uiv"); - glad_glTexParameterIiv = (PFNGLTEXPARAMETERIIVPROC)load("glTexParameterIiv"); - glad_glTexParameterIuiv = (PFNGLTEXPARAMETERIUIVPROC)load("glTexParameterIuiv"); - glad_glGetTexParameterIiv = (PFNGLGETTEXPARAMETERIIVPROC)load("glGetTexParameterIiv"); - glad_glGetTexParameterIuiv = (PFNGLGETTEXPARAMETERIUIVPROC)load("glGetTexParameterIuiv"); - glad_glClearBufferiv = (PFNGLCLEARBUFFERIVPROC)load("glClearBufferiv"); - glad_glClearBufferuiv = (PFNGLCLEARBUFFERUIVPROC)load("glClearBufferuiv"); - glad_glClearBufferfv = (PFNGLCLEARBUFFERFVPROC)load("glClearBufferfv"); - glad_glClearBufferfi = (PFNGLCLEARBUFFERFIPROC)load("glClearBufferfi"); - glad_glGetStringi = (PFNGLGETSTRINGIPROC)load("glGetStringi"); - glad_glIsRenderbuffer = (PFNGLISRENDERBUFFERPROC)load("glIsRenderbuffer"); - glad_glBindRenderbuffer = (PFNGLBINDRENDERBUFFERPROC)load("glBindRenderbuffer"); - glad_glDeleteRenderbuffers = (PFNGLDELETERENDERBUFFERSPROC)load("glDeleteRenderbuffers"); - glad_glGenRenderbuffers = (PFNGLGENRENDERBUFFERSPROC)load("glGenRenderbuffers"); - glad_glRenderbufferStorage = (PFNGLRENDERBUFFERSTORAGEPROC)load("glRenderbufferStorage"); - glad_glGetRenderbufferParameteriv = (PFNGLGETRENDERBUFFERPARAMETERIVPROC)load("glGetRenderbufferParameteriv"); - glad_glIsFramebuffer = (PFNGLISFRAMEBUFFERPROC)load("glIsFramebuffer"); - glad_glBindFramebuffer = (PFNGLBINDFRAMEBUFFERPROC)load("glBindFramebuffer"); - glad_glDeleteFramebuffers = (PFNGLDELETEFRAMEBUFFERSPROC)load("glDeleteFramebuffers"); - glad_glGenFramebuffers = (PFNGLGENFRAMEBUFFERSPROC)load("glGenFramebuffers"); - glad_glCheckFramebufferStatus = (PFNGLCHECKFRAMEBUFFERSTATUSPROC)load("glCheckFramebufferStatus"); - glad_glFramebufferTexture1D = (PFNGLFRAMEBUFFERTEXTURE1DPROC)load("glFramebufferTexture1D"); - glad_glFramebufferTexture2D = (PFNGLFRAMEBUFFERTEXTURE2DPROC)load("glFramebufferTexture2D"); - glad_glFramebufferTexture3D = (PFNGLFRAMEBUFFERTEXTURE3DPROC)load("glFramebufferTexture3D"); - glad_glFramebufferRenderbuffer = (PFNGLFRAMEBUFFERRENDERBUFFERPROC)load("glFramebufferRenderbuffer"); - glad_glGetFramebufferAttachmentParameteriv = (PFNGLGETFRAMEBUFFERATTACHMENTPARAMETERIVPROC)load("glGetFramebufferAttachmentParameteriv"); - glad_glGenerateMipmap = (PFNGLGENERATEMIPMAPPROC)load("glGenerateMipmap"); - glad_glBlitFramebuffer = (PFNGLBLITFRAMEBUFFERPROC)load("glBlitFramebuffer"); - glad_glRenderbufferStorageMultisample = (PFNGLRENDERBUFFERSTORAGEMULTISAMPLEPROC)load("glRenderbufferStorageMultisample"); - glad_glFramebufferTextureLayer = (PFNGLFRAMEBUFFERTEXTURELAYERPROC)load("glFramebufferTextureLayer"); - glad_glMapBufferRange = (PFNGLMAPBUFFERRANGEPROC)load("glMapBufferRange"); - glad_glFlushMappedBufferRange = (PFNGLFLUSHMAPPEDBUFFERRANGEPROC)load("glFlushMappedBufferRange"); - glad_glBindVertexArray = (PFNGLBINDVERTEXARRAYPROC)load("glBindVertexArray"); - glad_glDeleteVertexArrays = (PFNGLDELETEVERTEXARRAYSPROC)load("glDeleteVertexArrays"); - glad_glGenVertexArrays = (PFNGLGENVERTEXARRAYSPROC)load("glGenVertexArrays"); - glad_glIsVertexArray = (PFNGLISVERTEXARRAYPROC)load("glIsVertexArray"); +static void +load_GL_VERSION_3_0(GLADloadproc load) +{ + if (!GLAD_GL_VERSION_3_0) + return; + glad_glColorMaski = (PFNGLCOLORMASKIPROC) load("glColorMaski"); + glad_glGetBooleani_v = (PFNGLGETBOOLEANI_VPROC) load("glGetBooleani_v"); + glad_glGetIntegeri_v = (PFNGLGETINTEGERI_VPROC) load("glGetIntegeri_v"); + glad_glEnablei = (PFNGLENABLEIPROC) load("glEnablei"); + glad_glDisablei = (PFNGLDISABLEIPROC) load("glDisablei"); + glad_glIsEnabledi = (PFNGLISENABLEDIPROC) load("glIsEnabledi"); + glad_glBeginTransformFeedback = (PFNGLBEGINTRANSFORMFEEDBACKPROC) load("glBeginTransformFeedback"); + glad_glEndTransformFeedback = (PFNGLENDTRANSFORMFEEDBACKPROC) load("glEndTransformFeedback"); + glad_glBindBufferRange = (PFNGLBINDBUFFERRANGEPROC) load("glBindBufferRange"); + glad_glBindBufferBase = (PFNGLBINDBUFFERBASEPROC) load("glBindBufferBase"); + glad_glTransformFeedbackVaryings = (PFNGLTRANSFORMFEEDBACKVARYINGSPROC) load("glTransformFeedbackVaryings"); + glad_glGetTransformFeedbackVarying = (PFNGLGETTRANSFORMFEEDBACKVARYINGPROC) load("glGetTransformFeedbackVarying"); + glad_glClampColor = (PFNGLCLAMPCOLORPROC) load("glClampColor"); + glad_glBeginConditionalRender = (PFNGLBEGINCONDITIONALRENDERPROC) load("glBeginConditionalRender"); + glad_glEndConditionalRender = (PFNGLENDCONDITIONALRENDERPROC) load("glEndConditionalRender"); + glad_glVertexAttribIPointer = (PFNGLVERTEXATTRIBIPOINTERPROC) load("glVertexAttribIPointer"); + glad_glGetVertexAttribIiv = (PFNGLGETVERTEXATTRIBIIVPROC) load("glGetVertexAttribIiv"); + glad_glGetVertexAttribIuiv = (PFNGLGETVERTEXATTRIBIUIVPROC) load("glGetVertexAttribIuiv"); + glad_glVertexAttribI1i = (PFNGLVERTEXATTRIBI1IPROC) load("glVertexAttribI1i"); + glad_glVertexAttribI2i = (PFNGLVERTEXATTRIBI2IPROC) load("glVertexAttribI2i"); + glad_glVertexAttribI3i = (PFNGLVERTEXATTRIBI3IPROC) load("glVertexAttribI3i"); + glad_glVertexAttribI4i = (PFNGLVERTEXATTRIBI4IPROC) load("glVertexAttribI4i"); + glad_glVertexAttribI1ui = (PFNGLVERTEXATTRIBI1UIPROC) load("glVertexAttribI1ui"); + glad_glVertexAttribI2ui = (PFNGLVERTEXATTRIBI2UIPROC) load("glVertexAttribI2ui"); + glad_glVertexAttribI3ui = (PFNGLVERTEXATTRIBI3UIPROC) load("glVertexAttribI3ui"); + glad_glVertexAttribI4ui = (PFNGLVERTEXATTRIBI4UIPROC) load("glVertexAttribI4ui"); + glad_glVertexAttribI1iv = (PFNGLVERTEXATTRIBI1IVPROC) load("glVertexAttribI1iv"); + glad_glVertexAttribI2iv = (PFNGLVERTEXATTRIBI2IVPROC) load("glVertexAttribI2iv"); + glad_glVertexAttribI3iv = (PFNGLVERTEXATTRIBI3IVPROC) load("glVertexAttribI3iv"); + glad_glVertexAttribI4iv = (PFNGLVERTEXATTRIBI4IVPROC) load("glVertexAttribI4iv"); + glad_glVertexAttribI1uiv = (PFNGLVERTEXATTRIBI1UIVPROC) load("glVertexAttribI1uiv"); + glad_glVertexAttribI2uiv = (PFNGLVERTEXATTRIBI2UIVPROC) load("glVertexAttribI2uiv"); + glad_glVertexAttribI3uiv = (PFNGLVERTEXATTRIBI3UIVPROC) load("glVertexAttribI3uiv"); + glad_glVertexAttribI4uiv = (PFNGLVERTEXATTRIBI4UIVPROC) load("glVertexAttribI4uiv"); + glad_glVertexAttribI4bv = (PFNGLVERTEXATTRIBI4BVPROC) load("glVertexAttribI4bv"); + glad_glVertexAttribI4sv = (PFNGLVERTEXATTRIBI4SVPROC) load("glVertexAttribI4sv"); + glad_glVertexAttribI4ubv = (PFNGLVERTEXATTRIBI4UBVPROC) load("glVertexAttribI4ubv"); + glad_glVertexAttribI4usv = (PFNGLVERTEXATTRIBI4USVPROC) load("glVertexAttribI4usv"); + glad_glGetUniformuiv = (PFNGLGETUNIFORMUIVPROC) load("glGetUniformuiv"); + glad_glBindFragDataLocation = (PFNGLBINDFRAGDATALOCATIONPROC) load("glBindFragDataLocation"); + glad_glGetFragDataLocation = (PFNGLGETFRAGDATALOCATIONPROC) load("glGetFragDataLocation"); + glad_glUniform1ui = (PFNGLUNIFORM1UIPROC) load("glUniform1ui"); + glad_glUniform2ui = (PFNGLUNIFORM2UIPROC) load("glUniform2ui"); + glad_glUniform3ui = (PFNGLUNIFORM3UIPROC) load("glUniform3ui"); + glad_glUniform4ui = (PFNGLUNIFORM4UIPROC) load("glUniform4ui"); + glad_glUniform1uiv = (PFNGLUNIFORM1UIVPROC) load("glUniform1uiv"); + glad_glUniform2uiv = (PFNGLUNIFORM2UIVPROC) load("glUniform2uiv"); + glad_glUniform3uiv = (PFNGLUNIFORM3UIVPROC) load("glUniform3uiv"); + glad_glUniform4uiv = (PFNGLUNIFORM4UIVPROC) load("glUniform4uiv"); + glad_glTexParameterIiv = (PFNGLTEXPARAMETERIIVPROC) load("glTexParameterIiv"); + glad_glTexParameterIuiv = (PFNGLTEXPARAMETERIUIVPROC) load("glTexParameterIuiv"); + glad_glGetTexParameterIiv = (PFNGLGETTEXPARAMETERIIVPROC) load("glGetTexParameterIiv"); + glad_glGetTexParameterIuiv = (PFNGLGETTEXPARAMETERIUIVPROC) load("glGetTexParameterIuiv"); + glad_glClearBufferiv = (PFNGLCLEARBUFFERIVPROC) load("glClearBufferiv"); + glad_glClearBufferuiv = (PFNGLCLEARBUFFERUIVPROC) load("glClearBufferuiv"); + glad_glClearBufferfv = (PFNGLCLEARBUFFERFVPROC) load("glClearBufferfv"); + glad_glClearBufferfi = (PFNGLCLEARBUFFERFIPROC) load("glClearBufferfi"); + glad_glGetStringi = (PFNGLGETSTRINGIPROC) load("glGetStringi"); + glad_glIsRenderbuffer = (PFNGLISRENDERBUFFERPROC) load("glIsRenderbuffer"); + glad_glBindRenderbuffer = (PFNGLBINDRENDERBUFFERPROC) load("glBindRenderbuffer"); + glad_glDeleteRenderbuffers = (PFNGLDELETERENDERBUFFERSPROC) load("glDeleteRenderbuffers"); + glad_glGenRenderbuffers = (PFNGLGENRENDERBUFFERSPROC) load("glGenRenderbuffers"); + glad_glRenderbufferStorage = (PFNGLRENDERBUFFERSTORAGEPROC) load("glRenderbufferStorage"); + glad_glGetRenderbufferParameteriv = (PFNGLGETRENDERBUFFERPARAMETERIVPROC) load("glGetRenderbufferParameteriv"); + glad_glIsFramebuffer = (PFNGLISFRAMEBUFFERPROC) load("glIsFramebuffer"); + glad_glBindFramebuffer = (PFNGLBINDFRAMEBUFFERPROC) load("glBindFramebuffer"); + glad_glDeleteFramebuffers = (PFNGLDELETEFRAMEBUFFERSPROC) load("glDeleteFramebuffers"); + glad_glGenFramebuffers = (PFNGLGENFRAMEBUFFERSPROC) load("glGenFramebuffers"); + glad_glCheckFramebufferStatus = (PFNGLCHECKFRAMEBUFFERSTATUSPROC) load("glCheckFramebufferStatus"); + glad_glFramebufferTexture1D = (PFNGLFRAMEBUFFERTEXTURE1DPROC) load("glFramebufferTexture1D"); + glad_glFramebufferTexture2D = (PFNGLFRAMEBUFFERTEXTURE2DPROC) load("glFramebufferTexture2D"); + glad_glFramebufferTexture3D = (PFNGLFRAMEBUFFERTEXTURE3DPROC) load("glFramebufferTexture3D"); + glad_glFramebufferRenderbuffer = (PFNGLFRAMEBUFFERRENDERBUFFERPROC) load("glFramebufferRenderbuffer"); + glad_glGetFramebufferAttachmentParameteriv = (PFNGLGETFRAMEBUFFERATTACHMENTPARAMETERIVPROC) load("glGetFramebufferAttachmentParameteriv"); + glad_glGenerateMipmap = (PFNGLGENERATEMIPMAPPROC) load("glGenerateMipmap"); + glad_glBlitFramebuffer = (PFNGLBLITFRAMEBUFFERPROC) load("glBlitFramebuffer"); + glad_glRenderbufferStorageMultisample = (PFNGLRENDERBUFFERSTORAGEMULTISAMPLEPROC) load("glRenderbufferStorageMultisample"); + glad_glFramebufferTextureLayer = (PFNGLFRAMEBUFFERTEXTURELAYERPROC) load("glFramebufferTextureLayer"); + glad_glMapBufferRange = (PFNGLMAPBUFFERRANGEPROC) load("glMapBufferRange"); + glad_glFlushMappedBufferRange = (PFNGLFLUSHMAPPEDBUFFERRANGEPROC) load("glFlushMappedBufferRange"); + glad_glBindVertexArray = (PFNGLBINDVERTEXARRAYPROC) load("glBindVertexArray"); + glad_glDeleteVertexArrays = (PFNGLDELETEVERTEXARRAYSPROC) load("glDeleteVertexArrays"); + glad_glGenVertexArrays = (PFNGLGENVERTEXARRAYSPROC) load("glGenVertexArrays"); + glad_glIsVertexArray = (PFNGLISVERTEXARRAYPROC) load("glIsVertexArray"); } -static void load_GL_ARB_buffer_storage(GLADloadproc load) { - if(!GLAD_GL_ARB_buffer_storage) return; - glad_glBufferStorage = (PFNGLBUFFERSTORAGEPROC)load("glBufferStorage"); +static void +load_GL_ARB_buffer_storage(GLADloadproc load) +{ + if (!GLAD_GL_ARB_buffer_storage) + return; + glad_glBufferStorage = (PFNGLBUFFERSTORAGEPROC) load("glBufferStorage"); } -static void load_GL_ARB_debug_output(GLADloadproc load) { - if(!GLAD_GL_ARB_debug_output) return; - glad_glDebugMessageControlARB = (PFNGLDEBUGMESSAGECONTROLARBPROC)load("glDebugMessageControlARB"); - glad_glDebugMessageInsertARB = (PFNGLDEBUGMESSAGEINSERTARBPROC)load("glDebugMessageInsertARB"); - glad_glDebugMessageCallbackARB = (PFNGLDEBUGMESSAGECALLBACKARBPROC)load("glDebugMessageCallbackARB"); - glad_glGetDebugMessageLogARB = (PFNGLGETDEBUGMESSAGELOGARBPROC)load("glGetDebugMessageLogARB"); +static void +load_GL_ARB_debug_output(GLADloadproc load) +{ + if (!GLAD_GL_ARB_debug_output) + return; + glad_glDebugMessageControlARB = (PFNGLDEBUGMESSAGECONTROLARBPROC) load("glDebugMessageControlARB"); + glad_glDebugMessageInsertARB = (PFNGLDEBUGMESSAGEINSERTARBPROC) load("glDebugMessageInsertARB"); + glad_glDebugMessageCallbackARB = (PFNGLDEBUGMESSAGECALLBACKARBPROC) load("glDebugMessageCallbackARB"); + glad_glGetDebugMessageLogARB = (PFNGLGETDEBUGMESSAGELOGARBPROC) load("glGetDebugMessageLogARB"); } -static void load_GL_ARB_sync(GLADloadproc load) { - if(!GLAD_GL_ARB_sync) return; - glad_glFenceSync = (PFNGLFENCESYNCPROC)load("glFenceSync"); - glad_glIsSync = (PFNGLISSYNCPROC)load("glIsSync"); - glad_glDeleteSync = (PFNGLDELETESYNCPROC)load("glDeleteSync"); - glad_glClientWaitSync = (PFNGLCLIENTWAITSYNCPROC)load("glClientWaitSync"); - glad_glWaitSync = (PFNGLWAITSYNCPROC)load("glWaitSync"); - glad_glGetInteger64v = (PFNGLGETINTEGER64VPROC)load("glGetInteger64v"); - glad_glGetSynciv = (PFNGLGETSYNCIVPROC)load("glGetSynciv"); +static void +load_GL_ARB_sync(GLADloadproc load) +{ + if (!GLAD_GL_ARB_sync) + return; + glad_glFenceSync = (PFNGLFENCESYNCPROC) load("glFenceSync"); + glad_glIsSync = (PFNGLISSYNCPROC) load("glIsSync"); + glad_glDeleteSync = (PFNGLDELETESYNCPROC) load("glDeleteSync"); + glad_glClientWaitSync = (PFNGLCLIENTWAITSYNCPROC) load("glClientWaitSync"); + glad_glWaitSync = (PFNGLWAITSYNCPROC) load("glWaitSync"); + glad_glGetInteger64v = (PFNGLGETINTEGER64VPROC) load("glGetInteger64v"); + glad_glGetSynciv = (PFNGLGETSYNCIVPROC) load("glGetSynciv"); } -static int find_extensionsGL(void) { - if (!get_exts()) return 0; - GLAD_GL_ARB_buffer_storage = has_ext("GL_ARB_buffer_storage"); - GLAD_GL_ARB_debug_output = has_ext("GL_ARB_debug_output"); - GLAD_GL_ARB_sync = has_ext("GL_ARB_sync"); - free_exts(); - return 1; +static int +find_extensionsGL(void) +{ + if (!get_exts()) + return 0; + GLAD_GL_ARB_buffer_storage = has_ext("GL_ARB_buffer_storage"); + GLAD_GL_ARB_debug_output = has_ext("GL_ARB_debug_output"); + GLAD_GL_ARB_sync = has_ext("GL_ARB_sync"); + free_exts(); + return 1; } -static void find_coreGL(void) { +static void +find_coreGL(void) +{ /* Thank you @elmindreda * https://github.com/elmindreda/greg/blob/master/templates/greg.c.in#L176 @@ -916,18 +971,19 @@ static void find_coreGL(void) { */ int i, major, minor; - const char* version; - const char* prefixes[] = { + const char *version; + const char *prefixes[] = { "OpenGL ES-CM ", "OpenGL ES-CL ", "OpenGL ES ", NULL }; - version = (const char*) glGetString(GL_VERSION); - if (!version) return; + version = (const char *) glGetString(GL_VERSION); + if (!version) + return; - for (i = 0; prefixes[i]; i++) { + for (i = 0; prefixes[i]; i++) { const size_t length = strlen(prefixes[i]); if (strncmp(version, prefixes[i], length) == 0) { version += length; @@ -942,42 +998,50 @@ static void find_coreGL(void) { sscanf(version, "%d.%d", &major, &minor); #endif - GLVersion.major = major; GLVersion.minor = minor; - max_loaded_major = major; max_loaded_minor = minor; - GLAD_GL_VERSION_1_0 = (major == 1 && minor >= 0) || major > 1; - GLAD_GL_VERSION_1_1 = (major == 1 && minor >= 1) || major > 1; - GLAD_GL_VERSION_1_2 = (major == 1 && minor >= 2) || major > 1; - GLAD_GL_VERSION_1_3 = (major == 1 && minor >= 3) || major > 1; - GLAD_GL_VERSION_1_4 = (major == 1 && minor >= 4) || major > 1; - GLAD_GL_VERSION_1_5 = (major == 1 && minor >= 5) || major > 1; - GLAD_GL_VERSION_2_0 = (major == 2 && minor >= 0) || major > 2; - GLAD_GL_VERSION_2_1 = (major == 2 && minor >= 1) || major > 2; - GLAD_GL_VERSION_3_0 = (major == 3 && minor >= 0) || major > 3; - if (GLVersion.major > 3 || (GLVersion.major >= 3 && GLVersion.minor >= 0)) { - max_loaded_major = 3; - max_loaded_minor = 0; - } + GLVersion.major = major; + GLVersion.minor = minor; + max_loaded_major = major; + max_loaded_minor = minor; + GLAD_GL_VERSION_1_0 = (major == 1 && minor >= 0) || major > 1; + GLAD_GL_VERSION_1_1 = (major == 1 && minor >= 1) || major > 1; + GLAD_GL_VERSION_1_2 = (major == 1 && minor >= 2) || major > 1; + GLAD_GL_VERSION_1_3 = (major == 1 && minor >= 3) || major > 1; + GLAD_GL_VERSION_1_4 = (major == 1 && minor >= 4) || major > 1; + GLAD_GL_VERSION_1_5 = (major == 1 && minor >= 5) || major > 1; + GLAD_GL_VERSION_2_0 = (major == 2 && minor >= 0) || major > 2; + GLAD_GL_VERSION_2_1 = (major == 2 && minor >= 1) || major > 2; + GLAD_GL_VERSION_3_0 = (major == 3 && minor >= 0) || major > 3; + if (GLVersion.major > 3 || (GLVersion.major >= 3 && GLVersion.minor >= 0)) { + max_loaded_major = 3; + max_loaded_minor = 0; + } } -int gladLoadGLLoader(GLADloadproc load) { - GLVersion.major = 0; GLVersion.minor = 0; - glGetString = (PFNGLGETSTRINGPROC)load("glGetString"); - if(glGetString == NULL) return 0; - if(glGetString(GL_VERSION) == NULL) return 0; - find_coreGL(); - load_GL_VERSION_1_0(load); - load_GL_VERSION_1_1(load); - load_GL_VERSION_1_2(load); - load_GL_VERSION_1_3(load); - load_GL_VERSION_1_4(load); - load_GL_VERSION_1_5(load); - load_GL_VERSION_2_0(load); - load_GL_VERSION_2_1(load); - load_GL_VERSION_3_0(load); +int +gladLoadGLLoader(GLADloadproc load) +{ + GLVersion.major = 0; + GLVersion.minor = 0; + glGetString = (PFNGLGETSTRINGPROC) load("glGetString"); + if (glGetString == NULL) + return 0; + if (glGetString(GL_VERSION) == NULL) + return 0; + find_coreGL(); + load_GL_VERSION_1_0(load); + load_GL_VERSION_1_1(load); + load_GL_VERSION_1_2(load); + load_GL_VERSION_1_3(load); + load_GL_VERSION_1_4(load); + load_GL_VERSION_1_5(load); + load_GL_VERSION_2_0(load); + load_GL_VERSION_2_1(load); + load_GL_VERSION_3_0(load); - if (!find_extensionsGL()) return 0; - load_GL_ARB_buffer_storage(load); - load_GL_ARB_debug_output(load); - load_GL_ARB_sync(load); - return GLVersion.major != 0 || GLVersion.minor != 0; + if (!find_extensionsGL()) + return 0; + load_GL_ARB_buffer_storage(load); + load_GL_ARB_debug_output(load); + load_GL_ARB_sync(load); + return GLVersion.major != 0 || GLVersion.minor != 0; } diff --git a/src/win/win.c b/src/win/win.c index c526fd760..5515d8e78 100644 --- a/src/win/win.c +++ b/src/win/win.c @@ -53,7 +53,7 @@ #include <86box/thread.h> #include <86box/ui.h> #ifdef USE_VNC -# include <86box/vnc.h> +# include <86box/vnc.h> #endif #include <86box/win_sdl.h> #include <86box/win_opengl.h> @@ -61,52 +61,49 @@ #include <86box/version.h> #include <86box/gdbstub.h> #ifdef MTR_ENABLED -#include +# include #endif typedef struct { WCHAR str[1024]; } rc_str_t; - /* Platform Public data, specific. */ -HINSTANCE hinstance; /* application instance */ -HANDLE ghMutex; -uint32_t lang_id, lang_sys; /* current and system language ID */ -DWORD dwSubLangID; -int acp_utf8; /* Windows supports UTF-8 codepage */ -volatile int cpu_thread_run = 1; - +HINSTANCE hinstance; /* application instance */ +HANDLE ghMutex; +uint32_t lang_id, lang_sys; /* current and system language ID */ +DWORD dwSubLangID; +int acp_utf8; /* Windows supports UTF-8 codepage */ +volatile int cpu_thread_run = 1; /* Local data. */ -static HANDLE thMain; -static rc_str_t *lpRCstr2048 = NULL, - *lpRCstr4096 = NULL, - *lpRCstr4352 = NULL, - *lpRCstr4608 = NULL, - *lpRCstr5120 = NULL, - *lpRCstr5376 = NULL, - *lpRCstr5632 = NULL, - *lpRCstr5888 = NULL, - *lpRCstr6144 = NULL, - *lpRCstr7168 = NULL; -static int vid_api_inited = 0; -static char *argbuf; -static int first_use = 1; -static LARGE_INTEGER StartingTime; -static LARGE_INTEGER Frequency; - +static HANDLE thMain; +static rc_str_t *lpRCstr2048 = NULL, + *lpRCstr4096 = NULL, + *lpRCstr4352 = NULL, + *lpRCstr4608 = NULL, + *lpRCstr5120 = NULL, + *lpRCstr5376 = NULL, + *lpRCstr5632 = NULL, + *lpRCstr5888 = NULL, + *lpRCstr6144 = NULL, + *lpRCstr7168 = NULL; +static int vid_api_inited = 0; +static char *argbuf; +static int first_use = 1; +static LARGE_INTEGER StartingTime; +static LARGE_INTEGER Frequency; static const struct { - const char *name; - int local; - int (*init)(void *); - void (*close)(void); - void (*resize)(int x, int y); - int (*pause)(void); - void (*enable)(int enable); - void (*set_fs)(int fs); - void (*reload)(void); + const char *name; + int local; + int (*init)(void *); + void (*close)(void); + void (*resize)(int x, int y); + int (*pause)(void); + void (*enable)(int enable); + void (*set_fs)(int fs); + void (*reload)(void); } vid_apis[RENDERERS_NUM] = { { "SDL_Software", 1, (int(*)(void*))sdl_inits, sdl_close, NULL, sdl_pause, sdl_enable, sdl_set_fs, sdl_reload }, { "SDL_Hardware", 1, (int(*)(void*))sdl_inith, sdl_close, NULL, sdl_pause, sdl_enable, sdl_set_fs, sdl_reload }, @@ -117,39 +114,35 @@ static const struct { #endif }; - extern int title_update; - #ifdef ENABLE_WIN_LOG int win_do_log = ENABLE_WIN_LOG; - static void win_log(const char *fmt, ...) { va_list ap; if (win_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define win_log(fmt, ...) +# define win_log(fmt, ...) #endif void free_string(rc_str_t **str) { if (*str != NULL) { - free(*str); - *str = NULL; + free(*str); + *str = NULL; } } - static void LoadCommonStrings(void) { @@ -177,136 +170,137 @@ LoadCommonStrings(void) lpRCstr6144 = calloc(STR_NUM_6144, sizeof(rc_str_t)); lpRCstr7168 = calloc(STR_NUM_7168, sizeof(rc_str_t)); - for (i=0; i 3)) - LoadString(hinstance, 5376+i, lpRCstr5376[i].str, 1024); + for (i = 0; i < STR_NUM_5376; i++) { + if ((i == 0) || (i > 3)) + LoadString(hinstance, 5376 + i, lpRCstr5376[i].str, 1024); } - for (i=0; i 3)) - LoadString(hinstance, 5632+i, lpRCstr5632[i].str, 1024); + for (i = 0; i < STR_NUM_5632; i++) { + if ((i == 0) || (i > 3)) + LoadString(hinstance, 5632 + i, lpRCstr5632[i].str, 1024); } - for (i=0; i= 2048) && (i <= 3071)) - str = lpRCstr2048[i-2048].str; + str = lpRCstr2048[i - 2048].str; else if ((i >= 4096) && (i <= 4351)) - str = lpRCstr4096[i-4096].str; + str = lpRCstr4096[i - 4096].str; else if ((i >= 4352) && (i <= 4607)) - str = lpRCstr4352[i-4352].str; + str = lpRCstr4352[i - 4352].str; else if ((i >= 4608) && (i <= 5119)) - str = lpRCstr4608[i-4608].str; + str = lpRCstr4608[i - 4608].str; else if ((i >= 5120) && (i <= 5375)) - str = lpRCstr5120[i-5120].str; + str = lpRCstr5120[i - 5120].str; else if ((i >= 5376) && (i <= 5631)) - str = lpRCstr5376[i-5376].str; + str = lpRCstr5376[i - 5376].str; else if ((i >= 5632) && (i <= 5887)) - str = lpRCstr5632[i-5632].str; + str = lpRCstr5632[i - 5632].str; else if ((i >= 5888) && (i <= 6143)) - str = lpRCstr5888[i-5888].str; + str = lpRCstr5888[i - 5888].str; else if ((i >= 6144) && (i <= 7167)) - str = lpRCstr6144[i-6144].str; + str = lpRCstr6144[i - 6144].str; else - str = lpRCstr7168[i-7168].str; + str = lpRCstr7168[i - 7168].str; - return((wchar_t *)str); + return ((wchar_t *) str); } #ifdef MTR_ENABLED @@ -330,140 +324,138 @@ static void CreateConsole(int init) { HANDLE h; - FILE *fp; + FILE *fp; fpos_t p; - int i; + int i; - if (! init) { - if (force_debug) - FreeConsole(); - return; + if (!init) { + if (force_debug) + FreeConsole(); + return; } /* Are we logging to a file? */ p = 0; - (void)fgetpos(stdout, &p); - if (p != -1) return; + (void) fgetpos(stdout, &p); + if (p != -1) + return; /* Not logging to file, attach to console. */ - if (! AttachConsole(ATTACH_PARENT_PROCESS)) { - /* Parent has no console, create one. */ - if (! AllocConsole()) { - /* Cannot create console, just give up. */ - return; - } + if (!AttachConsole(ATTACH_PARENT_PROCESS)) { + /* Parent has no console, create one. */ + if (!AllocConsole()) { + /* Cannot create console, just give up. */ + return; + } } fp = NULL; if ((h = GetStdHandle(STD_OUTPUT_HANDLE)) != NULL) { - /* We got the handle, now open a file descriptor. */ - if ((i = _open_osfhandle((intptr_t)h, _O_TEXT)) != -1) { - /* We got a file descriptor, now allocate a new stream. */ - if ((fp = _fdopen(i, "w")) != NULL) { - /* Got the stream, re-initialize stdout without it. */ - (void)freopen("CONOUT$", "w", stdout); - setvbuf(stdout, NULL, _IONBF, 0); - fflush(stdout); - } - } + /* We got the handle, now open a file descriptor. */ + if ((i = _open_osfhandle((intptr_t) h, _O_TEXT)) != -1) { + /* We got a file descriptor, now allocate a new stream. */ + if ((fp = _fdopen(i, "w")) != NULL) { + /* Got the stream, re-initialize stdout without it. */ + (void) freopen("CONOUT$", "w", stdout); + setvbuf(stdout, NULL, _IONBF, 0); + fflush(stdout); + } + } } if (fp != NULL) { - fclose(fp); - fp = NULL; + fclose(fp); + fp = NULL; } } - static void CloseConsole(void) { CreateConsole(0); } - /* Process the commandline, and create standard argc/argv array. */ static int ProcessCommandLine(char ***argv) { char **args; - int argc_max; - int i, q, argc; + int argc_max; + int i, q, argc; if (acp_utf8) { - i = strlen(GetCommandLineA()) + 1; - argbuf = (char *)malloc(i); - strcpy(argbuf, GetCommandLineA()); + i = strlen(GetCommandLineA()) + 1; + argbuf = (char *) malloc(i); + strcpy(argbuf, GetCommandLineA()); } else { - i = c16stombs(NULL, GetCommandLineW(), 0) + 1; - argbuf = (char *)malloc(i); - c16stombs(argbuf, GetCommandLineW(), i); + i = c16stombs(NULL, GetCommandLineW(), 0) + 1; + argbuf = (char *) malloc(i); + c16stombs(argbuf, GetCommandLineW(), i); } - argc = 0; + argc = 0; argc_max = 64; - args = (char **)malloc(sizeof(char *) * argc_max); + args = (char **) malloc(sizeof(char *) * argc_max); if (args == NULL) { - free(argbuf); - return(0); + free(argbuf); + return (0); } /* parse commandline into argc/argv format */ i = 0; while (argbuf[i]) { - while (argbuf[i] == ' ') - i++; + while (argbuf[i] == ' ') + i++; - if (argbuf[i]) { - if ((argbuf[i] == '\'') || (argbuf[i] == '"')) { - q = argbuf[i++]; - if (!argbuf[i]) - break; - } else - q = 0; + if (argbuf[i]) { + if ((argbuf[i] == '\'') || (argbuf[i] == '"')) { + q = argbuf[i++]; + if (!argbuf[i]) + break; + } else + q = 0; - args[argc++] = &argbuf[i]; + args[argc++] = &argbuf[i]; - if (argc >= argc_max) { - argc_max += 64; - args = realloc(args, sizeof(char *)*argc_max); - if (args == NULL) { - free(argbuf); - return(0); - } - } + if (argc >= argc_max) { + argc_max += 64; + args = realloc(args, sizeof(char *) * argc_max); + if (args == NULL) { + free(argbuf); + return (0); + } + } - while ((argbuf[i]) && ((q) - ? (argbuf[i]!=q) : (argbuf[i]!=' '))) i++; + while ((argbuf[i]) && ((q) ? (argbuf[i] != q) : (argbuf[i] != ' '))) + i++; - if (argbuf[i]) { - argbuf[i] = 0; - i++; - } - } + if (argbuf[i]) { + argbuf[i] = 0; + i++; + } + } } args[argc] = NULL; - *argv = args; + *argv = args; - return(argc); + return (argc); } - /* For the Windows platform, this is the start of the application. */ int WINAPI WinMain(HINSTANCE hInst, HINSTANCE hPrev, LPSTR lpszArg, int nCmdShow) { char **argv = NULL; - int argc, i; + int argc, i; /* Initialize the COM library for the main thread. */ CoInitializeEx(NULL, COINIT_MULTITHREADED); /* Check if Windows supports UTF-8 */ if (GetACP() == CP_UTF8) - acp_utf8 = 1; + acp_utf8 = 1; else - acp_utf8 = 0; + acp_utf8 = 0; /* Set this to the default value (windowed mode). */ video_fullscreen = 0; @@ -474,25 +466,25 @@ WinMain(HINSTANCE hInst, HINSTANCE hPrev, LPSTR lpszArg, int nCmdShow) /* Set the application version ID string. */ sprintf(emu_version, "%s v%s", EMU_NAME, EMU_VERSION_FULL); - /* First, set our (default) language. */ - lang_sys = GetThreadUILanguage(); + /* First, set our (default) language. */ + lang_sys = GetThreadUILanguage(); set_language(DEFAULT_LANGUAGE); /* Process the command line for options. */ argc = ProcessCommandLine(&argv); /* Pre-initialize the system, this loads the config file. */ - if (! pc_init(argc, argv)) { - /* Detach from console. */ - if (force_debug) - CreateConsole(0); + if (!pc_init(argc, argv)) { + /* Detach from console. */ + if (force_debug) + CreateConsole(0); - if (source_hwnd) - PostMessage((HWND) (uintptr_t) source_hwnd, WM_HAS_SHUTDOWN, (WPARAM) 0, (LPARAM) hwndMain); + if (source_hwnd) + PostMessage((HWND) (uintptr_t) source_hwnd, WM_HAS_SHUTDOWN, (WPARAM) 0, (LPARAM) hwndMain); - free(argbuf); - free(argv); - return(1); + free(argbuf); + free(argv); + return (1); } extern int gfxcard_2; @@ -500,9 +492,9 @@ WinMain(HINSTANCE hInst, HINSTANCE hPrev, LPSTR lpszArg, int nCmdShow) /* Create console window. */ if (force_debug) { - CreateConsole(1); - atexit(CloseConsole); -} + CreateConsole(1); + atexit(CloseConsole); + } /* Handle our GUI. */ i = ui_init(nCmdShow); @@ -512,62 +504,60 @@ WinMain(HINSTANCE hInst, HINSTANCE hPrev, LPSTR lpszArg, int nCmdShow) free(argbuf); free(argv); - return(i); + return (i); } - void main_thread(void *param) { uint32_t old_time, new_time; - int drawits, frames; + int drawits, frames; - framecountx = 0; + framecountx = 0; title_update = 1; - old_time = GetTickCount(); + old_time = GetTickCount(); drawits = frames = 0; while (!is_quit && cpu_thread_run) { - /* See if it is time to run a frame of code. */ - new_time = GetTickCount(); + /* See if it is time to run a frame of code. */ + new_time = GetTickCount(); #ifdef USE_GDBSTUB - if (gdbstub_next_asap && (drawits <= 0)) - drawits = 10; - else + if (gdbstub_next_asap && (drawits <= 0)) + drawits = 10; + else #endif - drawits += (new_time - old_time); - old_time = new_time; - if (drawits > 0 && !dopause) { - /* Yes, so do one frame now. */ - drawits -= 10; - if (drawits > 50) - drawits = 0; + drawits += (new_time - old_time); + old_time = new_time; + if (drawits > 0 && !dopause) { + /* Yes, so do one frame now. */ + drawits -= 10; + if (drawits > 50) + drawits = 0; - /* Run a block of code. */ - pc_run(); + /* Run a block of code. */ + pc_run(); - /* Every 200 frames we save the machine status. */ - if (++frames >= 200 && nvr_dosave) { - nvr_save(); - nvr_dosave = 0; - frames = 0; - } - } else /* Just so we dont overload the host OS. */ - Sleep(1); + /* Every 200 frames we save the machine status. */ + if (++frames >= 200 && nvr_dosave) { + nvr_save(); + nvr_dosave = 0; + frames = 0; + } + } else /* Just so we dont overload the host OS. */ + Sleep(1); - /* If needed, handle a screen resize. */ - if (atomic_load(&doresize_monitors[0]) && !video_fullscreen && !is_quit) { - if (vid_resize & 2) - plat_resize(fixed_size_x, fixed_size_y); - else - plat_resize(scrnsz_x, scrnsz_y); - atomic_store(&doresize_monitors[0], 0); - } + /* If needed, handle a screen resize. */ + if (atomic_load(&doresize_monitors[0]) && !video_fullscreen && !is_quit) { + if (vid_resize & 2) + plat_resize(fixed_size_x, fixed_size_y); + else + plat_resize(scrnsz_x, scrnsz_y); + atomic_store(&doresize_monitors[0], 0); + } } is_quit = 1; } - /* * We do this here since there is platform-specific stuff * going on here, and we do it in a function separate from @@ -592,7 +582,6 @@ do_start(void) SetThreadPriority(thMain, THREAD_PRIORITY_HIGHEST); } - /* Cleanly stop the emulator. */ void do_stop(void) @@ -607,112 +596,106 @@ do_stop(void) thMain = NULL; if (source_hwnd) - PostMessage((HWND) (uintptr_t) source_hwnd, WM_HAS_SHUTDOWN, (WPARAM) 0, (LPARAM) hwndMain); + PostMessage((HWND) (uintptr_t) source_hwnd, WM_HAS_SHUTDOWN, (WPARAM) 0, (LPARAM) hwndMain); } - void plat_get_exe_name(char *s, int size) { wchar_t *temp; if (acp_utf8) - GetModuleFileNameA(hinstance, s, size); + GetModuleFileNameA(hinstance, s, size); else { - temp = malloc(size * sizeof(wchar_t)); - GetModuleFileNameW(hinstance, temp, size); - c16stombs(s, temp, size); - free(temp); + temp = malloc(size * sizeof(wchar_t)); + GetModuleFileNameW(hinstance, temp, size); + c16stombs(s, temp, size); + free(temp); } } - void plat_tempfile(char *bufp, char *prefix, char *suffix) { SYSTEMTIME SystemTime; if (prefix != NULL) - sprintf(bufp, "%s-", prefix); - else - strcpy(bufp, ""); + sprintf(bufp, "%s-", prefix); + else + strcpy(bufp, ""); GetSystemTime(&SystemTime); sprintf(&bufp[strlen(bufp)], "%d%02d%02d-%02d%02d%02d-%03d%s", - SystemTime.wYear, SystemTime.wMonth, SystemTime.wDay, - SystemTime.wHour, SystemTime.wMinute, SystemTime.wSecond, - SystemTime.wMilliseconds, - suffix); + SystemTime.wYear, SystemTime.wMonth, SystemTime.wDay, + SystemTime.wHour, SystemTime.wMinute, SystemTime.wSecond, + SystemTime.wMilliseconds, + suffix); } - int plat_getcwd(char *bufp, int max) { wchar_t *temp; if (acp_utf8) - (void)_getcwd(bufp, max); + (void) _getcwd(bufp, max); else { - temp = malloc(max * sizeof(wchar_t)); - (void)_wgetcwd(temp, max); - c16stombs(bufp, temp, max); - free(temp); + temp = malloc(max * sizeof(wchar_t)); + (void) _wgetcwd(temp, max); + c16stombs(bufp, temp, max); + free(temp); } - return(0); + return (0); } - int plat_chdir(char *path) { wchar_t *temp; - int len, ret; + int len, ret; if (acp_utf8) - return(_chdir(path)); + return (_chdir(path)); else { - len = mbstoc16s(NULL, path, 0) + 1; - temp = malloc(len * sizeof(wchar_t)); - mbstoc16s(temp, path, len); + len = mbstoc16s(NULL, path, 0) + 1; + temp = malloc(len * sizeof(wchar_t)); + mbstoc16s(temp, path, len); - ret = _wchdir(temp); + ret = _wchdir(temp); - free(temp); - return ret; + free(temp); + return ret; } } - FILE * plat_fopen(const char *path, const char *mode) { wchar_t *pathw, *modew; - int len; - FILE *fp; + int len; + FILE *fp; if (acp_utf8) - return fopen(path, mode); + return fopen(path, mode); else { - len = mbstoc16s(NULL, path, 0) + 1; - pathw = malloc(sizeof(wchar_t) * len); - mbstoc16s(pathw, path, len); + len = mbstoc16s(NULL, path, 0) + 1; + pathw = malloc(sizeof(wchar_t) * len); + mbstoc16s(pathw, path, len); - len = mbstoc16s(NULL, mode, 0) + 1; - modew = malloc(sizeof(wchar_t) * len); - mbstoc16s(modew, mode, len); + len = mbstoc16s(NULL, mode, 0) + 1; + modew = malloc(sizeof(wchar_t) * len); + mbstoc16s(modew, mode, len); - fp = _wfopen(pathw, modew); + fp = _wfopen(pathw, modew); - free(pathw); - free(modew); + free(pathw); + free(modew); - return fp; + return fp; } } - /* Open a file, using Unicode pathname, with 64bit pointers. */ FILE * plat_fopen64(const char *path, const char *mode) @@ -720,28 +703,27 @@ plat_fopen64(const char *path, const char *mode) return plat_fopen(path, mode); } - void plat_remove(char *path) { wchar_t *temp; - int len; + int len; if (acp_utf8) - remove(path); + remove(path); else { - len = mbstoc16s(NULL, path, 0) + 1; - temp = malloc(len * sizeof(wchar_t)); - mbstoc16s(temp, path, len); + len = mbstoc16s(NULL, path, 0) + 1; + temp = malloc(len * sizeof(wchar_t)); + mbstoc16s(temp, path, len); - _wremove(temp); + _wremove(temp); - free(temp); + free(temp); } } void -path_normalize(char* path) +path_normalize(char *path) { /* No-op */ } @@ -750,97 +732,90 @@ path_normalize(char* path) void path_slash(char *path) { - if ((path[strlen(path)-1] != '\\') && - (path[strlen(path)-1] != '/')) { - strcat(path, "\\"); + if ((path[strlen(path) - 1] != '\\') && (path[strlen(path) - 1] != '/')) { + strcat(path, "\\"); } } - /* Check if the given path is absolute or not. */ int path_abs(char *path) { if ((path[1] == ':') || (path[0] == '\\') || (path[0] == '/')) - return(1); + return (1); - return(0); + return (0); } - /* Return the last element of a pathname. */ char * plat_get_basename(const char *path) { - int c = (int)strlen(path); + int c = (int) strlen(path); while (c > 0) { - if (path[c] == '/' || path[c] == '\\') - return((char *)&path[c + 1]); - c--; + if (path[c] == '/' || path[c] == '\\') + return ((char *) &path[c + 1]); + c--; } - return((char *)path); + return ((char *) path); } - /* Return the 'directory' element of a pathname. */ void path_get_dirname(char *dest, const char *path) { - int c = (int)strlen(path); + int c = (int) strlen(path); char *ptr; - ptr = (char *)path; + ptr = (char *) path; while (c > 0) { - if (path[c] == '/' || path[c] == '\\') { - ptr = (char *)&path[c]; - break; - } - c--; + if (path[c] == '/' || path[c] == '\\') { + ptr = (char *) &path[c]; + break; + } + c--; } /* Copy to destination. */ while (path < ptr) - *dest++ = *path++; + *dest++ = *path++; *dest = '\0'; } - char * path_get_filename(char *s) { int c = strlen(s) - 1; while (c > 0) { - if (s[c] == '/' || s[c] == '\\') - return(&s[c+1]); - c--; + if (s[c] == '/' || s[c] == '\\') + return (&s[c + 1]); + c--; } - return(s); + return (s); } - char * path_get_extension(char *s) { int c = strlen(s) - 1; if (c <= 0) - return(s); + return (s); while (c && s[c] != '.') - c--; + c--; if (!c) - return(&s[strlen(s)]); + return (&s[strlen(s)]); - return(&s[c+1]); + return (&s[c + 1]); } - void path_append_filename(char *dest, const char *s1, const char *s2) { @@ -849,82 +824,76 @@ path_append_filename(char *dest, const char *s1, const char *s2) strcat(dest, s2); } - void plat_put_backslash(char *s) { int c = strlen(s) - 1; if (s[c] != '/' && s[c] != '\\') - s[c] = '/'; + s[c] = '/'; } - int plat_dir_check(char *path) { - DWORD dwAttrib; - int len; + DWORD dwAttrib; + int len; wchar_t *temp; if (acp_utf8) - dwAttrib = GetFileAttributesA(path); + dwAttrib = GetFileAttributesA(path); else { - len = mbstoc16s(NULL, path, 0) + 1; - temp = malloc(len * sizeof(wchar_t)); - mbstoc16s(temp, path, len); + len = mbstoc16s(NULL, path, 0) + 1; + temp = malloc(len * sizeof(wchar_t)); + mbstoc16s(temp, path, len); - dwAttrib = GetFileAttributesW(temp); + dwAttrib = GetFileAttributesW(temp); - free(temp); + free(temp); } - return(((dwAttrib != INVALID_FILE_ATTRIBUTES && - (dwAttrib & FILE_ATTRIBUTE_DIRECTORY))) ? 1 : 0); + return (((dwAttrib != INVALID_FILE_ATTRIBUTES && (dwAttrib & FILE_ATTRIBUTE_DIRECTORY))) ? 1 : 0); } - int plat_dir_create(char *path) { - int ret, len; + int ret, len; wchar_t *temp; if (acp_utf8) - return (int)SHCreateDirectoryExA(NULL, path, NULL); + return (int) SHCreateDirectoryExA(NULL, path, NULL); else { - len = mbstoc16s(NULL, path, 0) + 1; - temp = malloc(len * sizeof(wchar_t)); - mbstoc16s(temp, path, len); + len = mbstoc16s(NULL, path, 0) + 1; + temp = malloc(len * sizeof(wchar_t)); + mbstoc16s(temp, path, len); - ret = (int)SHCreateDirectoryExW(NULL, temp, NULL); + ret = (int) SHCreateDirectoryExW(NULL, temp, NULL); - free(temp); + free(temp); - return ret; + return ret; } } - void * plat_mmap(size_t size, uint8_t executable) { return VirtualAlloc(NULL, size, MEM_COMMIT, executable ? PAGE_EXECUTE_READWRITE : PAGE_READWRITE); } - void plat_init_rom_paths() { wchar_t appdata_dir[1024] = { L'\0' }; if (_wgetenv(L"LOCALAPPDATA") && _wgetenv(L"LOCALAPPDATA")[0] != L'\0') { - char appdata_dir_a[1024] = { '\0' }; - size_t len = 0; + char appdata_dir_a[1024] = { '\0' }; + size_t len = 0; wcsncpy(appdata_dir, _wgetenv(L"LOCALAPPDATA"), 1024); len = wcslen(appdata_dir); if (appdata_dir[len - 1] != L'\\') { - appdata_dir[len] = L'\\'; + appdata_dir[len] = L'\\'; appdata_dir[len + 1] = L'\0'; } wcscat(appdata_dir, L"86box"); @@ -943,7 +912,6 @@ plat_munmap(void *ptr, size_t size) VirtualFree(ptr, 0, MEM_RELEASE); } - uint64_t plat_timer_read(void) { @@ -951,7 +919,7 @@ plat_timer_read(void) QueryPerformanceCounter(&li); - return(li.QuadPart); + return (li.QuadPart); } static LARGE_INTEGER @@ -960,9 +928,9 @@ plat_get_ticks_common(void) LARGE_INTEGER EndingTime, ElapsedMicroseconds; if (first_use) { - QueryPerformanceFrequency(&Frequency); - QueryPerformanceCounter(&StartingTime); - first_use = 0; + QueryPerformanceFrequency(&Frequency); + QueryPerformanceCounter(&StartingTime); + first_use = 0; } QueryPerformanceCounter(&EndingTime); @@ -982,13 +950,13 @@ plat_get_ticks_common(void) uint32_t plat_get_ticks(void) { - return (uint32_t)(plat_get_ticks_common().QuadPart / 1000); + return (uint32_t) (plat_get_ticks_common().QuadPart / 1000); } uint32_t plat_get_micro_ticks(void) { - return (uint32_t)plat_get_ticks_common().QuadPart; + return (uint32_t) plat_get_ticks_common().QuadPart; } void @@ -997,7 +965,6 @@ plat_delay_ms(uint32_t count) Sleep(count); } - /* Return the VIDAPI number for the given name. */ int plat_vidapi(char *name) @@ -1005,53 +972,53 @@ plat_vidapi(char *name) int i; /* Default/System is SDL Hardware. */ - if (!strcasecmp(name, "default") || !strcasecmp(name, "system")) return(1); + if (!strcasecmp(name, "default") || !strcasecmp(name, "system")) + return (1); /* If DirectDraw or plain SDL was specified, return SDL Software. */ - if (!strcasecmp(name, "ddraw") || !strcasecmp(name, "sdl")) return(1); + if (!strcasecmp(name, "ddraw") || !strcasecmp(name, "sdl")) + return (1); for (i = 0; i < RENDERERS_NUM; i++) { - if (vid_apis[i].name && - !strcasecmp(vid_apis[i].name, name)) return(i); + if (vid_apis[i].name && !strcasecmp(vid_apis[i].name, name)) + return (i); } /* Default value. */ - return(1); + return (1); } - /* Return the VIDAPI name for the given number. */ char * plat_vidapi_name(int api) { char *name = "default"; - switch(api) { - case 0: - name = "sdl_software"; - break; - case 1: - break; - case 2: - name = "sdl_opengl"; - break; - case 3: - name = "opengl_core"; - break; + switch (api) { + case 0: + name = "sdl_software"; + break; + case 1: + break; + case 2: + name = "sdl_opengl"; + break; + case 3: + name = "opengl_core"; + break; #ifdef USE_VNC - case 4: - name = "vnc"; - break; + case 4: + name = "vnc"; + break; #endif - default: - fatal("Unknown renderer: %i\n", api); - break; + default: + fatal("Unknown renderer: %i\n", api); + break; } - return(name); + return (name); } - int plat_setvid(int api) { @@ -1065,130 +1032,128 @@ plat_setvid(int api) vid_api = api; if (vid_apis[vid_api].local) - ShowWindow(hwndRender, SW_SHOW); - else - ShowWindow(hwndRender, SW_HIDE); + ShowWindow(hwndRender, SW_SHOW); + else + ShowWindow(hwndRender, SW_HIDE); /* Initialize the (new) API. */ - i = vid_apis[vid_api].init((void *)hwndRender); + i = vid_apis[vid_api].init((void *) hwndRender); endblit(); - if (! i) return(0); + if (!i) + return (0); device_force_redraw(); vid_api_inited = 1; - return(1); + return (1); } - /* Tell the renderers about a new screen resolution. */ void plat_vidsize(int x, int y) { - if (!vid_api_inited || !vid_apis[vid_api].resize) return; + if (!vid_api_inited || !vid_apis[vid_api].resize) + return; startblit(); vid_apis[vid_api].resize(x, y); endblit(); } - void plat_vidapi_enable(int enable) { int i = 1; if (!vid_api_inited || !vid_apis[vid_api].enable) - return; + return; vid_apis[vid_api].enable(enable != 0); - if (! i) - return; + if (!i) + return; if (enable) - device_force_redraw(); + device_force_redraw(); } - int get_vidpause(void) { - return(vid_apis[vid_api].pause()); + return (vid_apis[vid_api].pause()); } - void plat_setfullscreen(int on) { RECT rect; - int temp_x, temp_y; - int dpi = win_get_dpi(hwndMain); + int temp_x, temp_y; + int dpi = win_get_dpi(hwndMain); /* Are we changing from the same state to the same state? */ if ((!!(on & 1)) == (!!video_fullscreen)) - return; + return; if (on && video_fullscreen_first) { - video_fullscreen |= 2; - if (ui_msgbox_header(MBX_INFO | MBX_DONTASK, (wchar_t *) IDS_2134, (wchar_t *) IDS_2052) == 10) { - video_fullscreen_first = 0; - config_save(); - } - video_fullscreen &= 1; + video_fullscreen |= 2; + if (ui_msgbox_header(MBX_INFO | MBX_DONTASK, (wchar_t *) IDS_2134, (wchar_t *) IDS_2052) == 10) { + video_fullscreen_first = 0; + config_save(); + } + video_fullscreen &= 1; } /* OK, claim the video. */ if (!(on & 2)) - win_mouse_close(); + win_mouse_close(); /* Close the current mode, and open the new one. */ video_fullscreen = (on & 1) | 2; if (vid_apis[vid_api].set_fs) - vid_apis[vid_api].set_fs(on & 1); + vid_apis[vid_api].set_fs(on & 1); if (!(on & 1)) { - plat_resize(scrnsz_x, scrnsz_y); - if (vid_resize) { - /* scale the screen base on DPI */ - if (!(vid_resize & 2) && window_remember) { - MoveWindow(hwndMain, window_x, window_y, window_w, window_h, TRUE); - GetClientRect(hwndMain, &rect); + plat_resize(scrnsz_x, scrnsz_y); + if (vid_resize) { + /* scale the screen base on DPI */ + if (!(vid_resize & 2) && window_remember) { + MoveWindow(hwndMain, window_x, window_y, window_w, window_h, TRUE); + GetClientRect(hwndMain, &rect); - temp_x = rect.right - rect.left + 1; - temp_y = rect.bottom - rect.top + 1 - (hide_status_bar ? 0 : sbar_height) - (hide_tool_bar ? 0 : tbar_height); - } else { - if (dpi_scale) { - temp_x = MulDiv((vid_resize & 2) ? fixed_size_x : unscaled_size_x, dpi, 96); - temp_y = MulDiv((vid_resize & 2) ? fixed_size_y : unscaled_size_y, dpi, 96); - } else { - temp_x = (vid_resize & 2) ? fixed_size_x : unscaled_size_x; - temp_y = (vid_resize & 2) ? fixed_size_y : unscaled_size_y; - } + temp_x = rect.right - rect.left + 1; + temp_y = rect.bottom - rect.top + 1 - (hide_status_bar ? 0 : sbar_height) - (hide_tool_bar ? 0 : tbar_height); + } else { + if (dpi_scale) { + temp_x = MulDiv((vid_resize & 2) ? fixed_size_x : unscaled_size_x, dpi, 96); + temp_y = MulDiv((vid_resize & 2) ? fixed_size_y : unscaled_size_y, dpi, 96); + } else { + temp_x = (vid_resize & 2) ? fixed_size_x : unscaled_size_x; + temp_y = (vid_resize & 2) ? fixed_size_y : unscaled_size_y; + } - /* Main Window. */ - if (vid_resize >= 2) - MoveWindow(hwndMain, window_x, window_y, window_w, window_h, TRUE); + /* Main Window. */ + if (vid_resize >= 2) + MoveWindow(hwndMain, window_x, window_y, window_w, window_h, TRUE); - ResizeWindowByClientArea(hwndMain, temp_x, temp_y + (hide_status_bar ? 0 : sbar_height) + (hide_tool_bar ? 0 : tbar_height)); - } + ResizeWindowByClientArea(hwndMain, temp_x, temp_y + (hide_status_bar ? 0 : sbar_height) + (hide_tool_bar ? 0 : tbar_height)); + } - /* Toolbar. */ - MoveWindow(hwndRebar, 0, 0, temp_x, tbar_height, TRUE); + /* Toolbar. */ + MoveWindow(hwndRebar, 0, 0, temp_x, tbar_height, TRUE); - /* Render window. */ - MoveWindow(hwndRender, 0, hide_tool_bar ? 0 : tbar_height, temp_x, temp_y, TRUE); + /* Render window. */ + MoveWindow(hwndRender, 0, hide_tool_bar ? 0 : tbar_height, temp_x, temp_y, TRUE); - /* Status bar. */ - GetClientRect(hwndMain, &rect); - MoveWindow(hwndSBAR, 0, rect.bottom - sbar_height, temp_x, sbar_height, TRUE); + /* Status bar. */ + GetClientRect(hwndMain, &rect); + MoveWindow(hwndSBAR, 0, rect.bottom - sbar_height, temp_x, sbar_height, TRUE); - if (mouse_capture) - ClipCursor(&rect); + if (mouse_capture) + ClipCursor(&rect); - scrnsz_x = (vid_resize & 2) ? fixed_size_x : unscaled_size_x; - scrnsz_y = (vid_resize & 2) ? fixed_size_y : unscaled_size_y; - } + scrnsz_x = (vid_resize & 2) ? fixed_size_x : unscaled_size_x; + scrnsz_y = (vid_resize & 2) ? fixed_size_y : unscaled_size_y; + } } video_fullscreen &= 1; video_force_resize_set(1); @@ -1198,11 +1163,11 @@ plat_setfullscreen(int on) win_mouse_init(); if (!(on & 2)) { - /* Release video and make it redraw the screen. */ - device_force_redraw(); + /* Release video and make it redraw the screen. */ + device_force_redraw(); - /* Send a CTRL break code so CTRL does not get stuck. */ - keyboard_input(0, 0x01D); + /* Send a CTRL break code so CTRL does not get stuck. */ + keyboard_input(0, 0x01D); } /* Finally, handle the host's mouse cursor. */ @@ -1210,61 +1175,57 @@ plat_setfullscreen(int on) show_cursor(video_fullscreen ? 0 : -1); if (!(on & 2)) { - /* This is needed for OpenGL. */ - plat_vidapi_enable(0); - plat_vidapi_enable(1); + /* This is needed for OpenGL. */ + plat_vidapi_enable(0); + plat_vidapi_enable(1); } } - void plat_vid_reload_options(void) { - if (!vid_api_inited || !vid_apis[vid_api].reload) - return; + if (!vid_api_inited || !vid_apis[vid_api].reload) + return; - vid_apis[vid_api].reload(); + vid_apis[vid_api].reload(); } - void plat_vidapi_reload(void) { vid_apis[vid_api].reload(); } - /* Sets up the program language before initialization. */ uint32_t -plat_language_code(char* langcode) +plat_language_code(char *langcode) { - if (!strcmp(langcode, "system")) - return 0xFFFF; + if (!strcmp(langcode, "system")) + return 0xFFFF; - int len = mbstoc16s(NULL, langcode, 0) + 1; - wchar_t *temp = malloc(len * sizeof(wchar_t)); - mbstoc16s(temp, langcode, len); + int len = mbstoc16s(NULL, langcode, 0) + 1; + wchar_t *temp = malloc(len * sizeof(wchar_t)); + mbstoc16s(temp, langcode, len); - LCID lcid = LocaleNameToLCID((LPWSTR)temp, 0); + LCID lcid = LocaleNameToLCID((LPWSTR) temp, 0); - free(temp); - return lcid; + free(temp); + return lcid; } /* Converts back the language code to LCID */ void -plat_language_code_r(uint32_t lcid, char* outbuf, int len) +plat_language_code_r(uint32_t lcid, char *outbuf, int len) { - if (lcid == 0xFFFF) - { - strcpy(outbuf, "system"); - return; - } + if (lcid == 0xFFFF) { + strcpy(outbuf, "system"); + return; + } - wchar_t buffer[LOCALE_NAME_MAX_LENGTH + 1]; - LCIDToLocaleName(lcid, buffer, LOCALE_NAME_MAX_LENGTH, 0); + wchar_t buffer[LOCALE_NAME_MAX_LENGTH + 1]; + LCIDToLocaleName(lcid, buffer, LOCALE_NAME_MAX_LENGTH, 0); - c16stombs(outbuf, buffer, len); + c16stombs(outbuf, buffer, len); } void @@ -1276,9 +1237,9 @@ take_screenshot(void) device_force_redraw(); } - /* LPARAM interface to plat_get_string(). */ -LPARAM win_get_string(int id) +LPARAM +win_get_string(int id) { wchar_t *ret; @@ -1286,15 +1247,13 @@ LPARAM win_get_string(int id) return ((LPARAM) ret); } - -void /* plat_ */ +void /* plat_ */ startblit(void) { WaitForSingleObject(ghMutex, INFINITE); } - -void /* plat_ */ +void /* plat_ */ endblit(void) { ReleaseMutex(ghMutex); diff --git a/src/win/win_about.c b/src/win/win_about.c index c508c7b3c..46009e686 100644 --- a/src/win/win_about.c +++ b/src/win/win_about.c @@ -32,15 +32,14 @@ #include <86box/win.h> #include <86box/version.h> - void AboutDialogCreate(HWND hwnd) { - int i; - TASKDIALOGCONFIG tdconfig = {0}; + int i; + TASKDIALOGCONFIG tdconfig = { 0 }; TASKDIALOG_BUTTON tdbuttons[] = { - {IDOK, EMU_SITE_W}, - {IDCANCEL, MAKEINTRESOURCE(IDS_2127)} + {IDOK, EMU_SITE_W }, + { IDCANCEL, MAKEINTRESOURCE(IDS_2127)} }; wchar_t emu_version[256]; @@ -49,19 +48,19 @@ AboutDialogCreate(HWND hwnd) swprintf(&emu_version[i], sizeof(emu_version) - i, L" [%ls]", EMU_GIT_HASH_W); #endif - tdconfig.cbSize = sizeof(tdconfig); - tdconfig.hwndParent = hwnd; - tdconfig.hInstance = hinstance; - tdconfig.dwCommonButtons = 0; - tdconfig.pszWindowTitle = MAKEINTRESOURCE(IDS_2124); - tdconfig.pszMainIcon = (PCWSTR) 10; + tdconfig.cbSize = sizeof(tdconfig); + tdconfig.hwndParent = hwnd; + tdconfig.hInstance = hinstance; + tdconfig.dwCommonButtons = 0; + tdconfig.pszWindowTitle = MAKEINTRESOURCE(IDS_2124); + tdconfig.pszMainIcon = (PCWSTR) 10; tdconfig.pszMainInstruction = emu_version; - tdconfig.pszContent = MAKEINTRESOURCE(IDS_2126); - tdconfig.cButtons = ARRAYSIZE(tdbuttons); - tdconfig.pButtons = tdbuttons; - tdconfig.nDefaultButton = IDCANCEL; + tdconfig.pszContent = MAKEINTRESOURCE(IDS_2126); + tdconfig.cButtons = ARRAYSIZE(tdbuttons); + tdconfig.pButtons = tdbuttons; + tdconfig.nDefaultButton = IDCANCEL; TaskDialogIndirect(&tdconfig, &i, NULL, NULL); if (i == IDOK) - ShellExecute(hwnd, L"open", L"https://" EMU_SITE_W, NULL, NULL, SW_SHOW); + ShellExecute(hwnd, L"open", L"https://" EMU_SITE_W, NULL, NULL, SW_SHOW); } diff --git a/src/win/win_cdrom.c b/src/win/win_cdrom.c index 8a32df295..dcff0d01b 100644 --- a/src/win/win_cdrom.c +++ b/src/win/win_cdrom.c @@ -44,7 +44,6 @@ #include <86box/ui.h> #include <86box/win.h> - void cassette_mount(char *fn, uint8_t wp) { @@ -53,14 +52,13 @@ cassette_mount(char *fn, uint8_t wp) cassette_ui_writeprot = wp; pc_cas_set_fname(cassette, fn); if (fn != NULL) - memcpy(cassette_fname, fn, MIN(511, strlen(fn))); + memcpy(cassette_fname, fn, MIN(511, strlen(fn))); ui_sb_update_icon_state(SB_CASSETTE, (fn == NULL) ? 1 : 0); media_menu_update_cassette(); ui_sb_update_tip(SB_CASSETTE); config_save(); } - void cassette_eject(void) { @@ -72,7 +70,6 @@ cassette_eject(void) config_save(); } - void cartridge_mount(uint8_t id, char *fn, uint8_t wp) { @@ -84,7 +81,6 @@ cartridge_mount(uint8_t id, char *fn, uint8_t wp) config_save(); } - void cartridge_eject(uint8_t id) { @@ -95,7 +91,6 @@ cartridge_eject(uint8_t id) config_save(); } - void floppy_mount(uint8_t id, char *fn, uint8_t wp) { @@ -108,7 +103,6 @@ floppy_mount(uint8_t id, char *fn, uint8_t wp) config_save(); } - void floppy_eject(uint8_t id) { @@ -119,20 +113,19 @@ floppy_eject(uint8_t id) config_save(); } - void plat_cdrom_ui_update(uint8_t id, uint8_t reload) { cdrom_t *drv = &cdrom[id]; if (drv->host_drive == 0) { - ui_sb_update_icon_state(SB_CDROM|id, 1); + ui_sb_update_icon_state(SB_CDROM | id, 1); } else { - ui_sb_update_icon_state(SB_CDROM|id, 0); + ui_sb_update_icon_state(SB_CDROM | id, 0); } media_menu_update_cdrom(id); - ui_sb_update_tip(SB_CDROM|id); + ui_sb_update_tip(SB_CDROM | id); } void @@ -141,18 +134,18 @@ cdrom_mount(uint8_t id, char *fn) cdrom[id].prev_host_drive = cdrom[id].host_drive; strcpy(cdrom[id].prev_image_path, cdrom[id].image_path); if (cdrom[id].ops && cdrom[id].ops->exit) - cdrom[id].ops->exit(&(cdrom[id])); + cdrom[id].ops->exit(&(cdrom[id])); cdrom[id].ops = NULL; memset(cdrom[id].image_path, 0, sizeof(cdrom[id].image_path)); cdrom_image_open(&(cdrom[id]), fn); /* Signal media change to the emulated machine. */ if (cdrom[id].insert) - cdrom[id].insert(cdrom[id].priv); + cdrom[id].insert(cdrom[id].priv); cdrom[id].host_drive = (strlen(cdrom[id].image_path) == 0) ? 0 : 200; if (cdrom[id].host_drive == 200) { - ui_sb_update_icon_state(SB_CDROM | id, 0); + ui_sb_update_icon_state(SB_CDROM | id, 0); } else { - ui_sb_update_icon_state(SB_CDROM | id, 1); + ui_sb_update_icon_state(SB_CDROM | id, 1); } media_menu_update_cdrom(id); ui_sb_update_tip(SB_CDROM | id); @@ -166,8 +159,8 @@ mo_eject(uint8_t id) mo_disk_close(dev); if (mo_drives[id].bus_type) { - /* Signal disk change to the emulated machine. */ - mo_insert(dev); + /* Signal disk change to the emulated machine. */ + mo_insert(dev); } ui_sb_update_icon_state(SB_MO | id, 1); @@ -176,7 +169,6 @@ mo_eject(uint8_t id) config_save(); } - void mo_mount(uint8_t id, char *fn, uint8_t wp) { @@ -194,7 +186,6 @@ mo_mount(uint8_t id, char *fn, uint8_t wp) config_save(); } - void mo_reload(uint8_t id) { @@ -202,13 +193,13 @@ mo_reload(uint8_t id) mo_disk_reload(dev); if (strlen(mo_drives[id].image_path) == 0) { - ui_sb_update_icon_state(SB_MO|id, 1); + ui_sb_update_icon_state(SB_MO | id, 1); } else { - ui_sb_update_icon_state(SB_MO|id, 0); + ui_sb_update_icon_state(SB_MO | id, 0); } media_menu_update_mo(id); - ui_sb_update_tip(SB_MO|id); + ui_sb_update_tip(SB_MO | id); config_save(); } @@ -220,8 +211,8 @@ zip_eject(uint8_t id) zip_disk_close(dev); if (zip_drives[id].bus_type) { - /* Signal disk change to the emulated machine. */ - zip_insert(dev); + /* Signal disk change to the emulated machine. */ + zip_insert(dev); } ui_sb_update_icon_state(SB_ZIP | id, 1); @@ -230,7 +221,6 @@ zip_eject(uint8_t id) config_save(); } - void zip_mount(uint8_t id, char *fn, uint8_t wp) { @@ -248,7 +238,6 @@ zip_mount(uint8_t id, char *fn, uint8_t wp) config_save(); } - void zip_reload(uint8_t id) { @@ -256,13 +245,13 @@ zip_reload(uint8_t id) zip_disk_reload(dev); if (strlen(zip_drives[id].image_path) == 0) { - ui_sb_update_icon_state(SB_ZIP|id, 1); + ui_sb_update_icon_state(SB_ZIP | id, 1); } else { - ui_sb_update_icon_state(SB_ZIP|id, 0); + ui_sb_update_icon_state(SB_ZIP | id, 0); } media_menu_update_zip(id); - ui_sb_update_tip(SB_ZIP|id); + ui_sb_update_tip(SB_ZIP | id); config_save(); } diff --git a/src/win/win_devconf.c b/src/win/win_devconf.c index 01bd58d0d..c5ddf9cb6 100644 --- a/src/win/win_devconf.c +++ b/src/win/win_devconf.c @@ -32,12 +32,10 @@ #include <86box/win.h> #include - static device_context_t config_device; -static uint8_t deviceconfig_changed = 0; -static int combo_to_struct[256]; - +static uint8_t deviceconfig_changed = 0; +static int combo_to_struct[256]; #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK @@ -53,466 +51,465 @@ deviceconfig_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) #ifdef USE_RTMIDI int num; #endif - int changed, cid; - const device_config_t *config; + int changed, cid; + const device_config_t *config; const device_config_selection_t *selection; - const device_config_bios_t *bios; - char s[512], file_filter[512]; - char *str, *val_str; - wchar_t ws[512], *wstr; - LPTSTR lptsTemp; + const device_config_bios_t *bios; + char s[512], file_filter[512]; + char *str, *val_str; + wchar_t ws[512], *wstr; + LPTSTR lptsTemp; config = config_device.dev->config; switch (message) { - case WM_INITDIALOG: - id = IDC_CONFIG_BASE; - config = config_device.dev->config; + case WM_INITDIALOG: + id = IDC_CONFIG_BASE; + config = config_device.dev->config; - lptsTemp = (LPTSTR) malloc(512); - memset(combo_to_struct, 0, 256 * sizeof(int)); + lptsTemp = (LPTSTR) malloc(512); + memset(combo_to_struct, 0, 256 * sizeof(int)); - while (config->type != -1) { - selection = config->selection; - bios = config->bios; - h = GetDlgItem(hdlg, id); + while (config->type != -1) { + selection = config->selection; + bios = config->bios; + h = GetDlgItem(hdlg, id); - switch (config->type) { - case CONFIG_BINARY: - val_int = config_get_int((char *) config_device.name, - (char *) config->name, config->default_int); + switch (config->type) { + case CONFIG_BINARY: + val_int = config_get_int((char *) config_device.name, + (char *) config->name, config->default_int); - SendMessage(h, BM_SETCHECK, val_int, 0); + SendMessage(h, BM_SETCHECK, val_int, 0); - id++; - break; - case CONFIG_SELECTION: - val_int = config_get_int((char *) config_device.name, - (char *) config->name, config->default_int); + id++; + break; + case CONFIG_SELECTION: + val_int = config_get_int((char *) config_device.name, + (char *) config->name, config->default_int); - c = 0; - while (selection && selection->description && selection->description[0]) { - mbstowcs(lptsTemp, selection->description, - strlen(selection->description) + 1); - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)lptsTemp); - if (val_int == selection->value) - SendMessage(h, CB_SETCURSEL, c, 0); - selection++; - c++; - } + c = 0; + while (selection && selection->description && selection->description[0]) { + mbstowcs(lptsTemp, selection->description, + strlen(selection->description) + 1); + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) lptsTemp); + if (val_int == selection->value) + SendMessage(h, CB_SETCURSEL, c, 0); + selection++; + c++; + } - id += 2; - break; - case CONFIG_BIOS: - val_str = config_get_string((char *) config_device.name, - (char *) config->name, (char *) config->default_string); + id += 2; + break; + case CONFIG_BIOS: + val_str = config_get_string((char *) config_device.name, + (char *) config->name, (char *) config->default_string); - c = 0; - q = 0; - while (bios && bios->name && bios->name[0]) { - mbstowcs(lptsTemp, bios->name, strlen(bios->name) + 1); - p = 0; - for (d = 0; d < bios->files_no; d++) - p += !!rom_present((char *) bios->files[d]); - if (p == bios->files_no) { - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)lptsTemp); - if (!strcmp(val_str, bios->internal_name)) - SendMessage(h, CB_SETCURSEL, c, 0); - combo_to_struct[c] = q; - c++; - } - q++; - bios++; - } + c = 0; + q = 0; + while (bios && bios->name && bios->name[0]) { + mbstowcs(lptsTemp, bios->name, strlen(bios->name) + 1); + p = 0; + for (d = 0; d < bios->files_no; d++) + p += !!rom_present((char *) bios->files[d]); + if (p == bios->files_no) { + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) lptsTemp); + if (!strcmp(val_str, bios->internal_name)) + SendMessage(h, CB_SETCURSEL, c, 0); + combo_to_struct[c] = q; + c++; + } + q++; + bios++; + } - id += 2; - break; + id += 2; + break; #ifdef USE_RTMIDI - case CONFIG_MIDI_OUT: - val_int = config_get_int((char *) config_device.name, - (char *) config->name, config->default_int); + case CONFIG_MIDI_OUT: + val_int = config_get_int((char *) config_device.name, + (char *) config->name, config->default_int); - num = rtmidi_out_get_num_devs(); - for (c = 0; c < num; c++) { - rtmidi_out_get_dev_name(c, s); - mbstowcs(lptsTemp, s, strlen(s) + 1); - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)lptsTemp); - if (val_int == c) - SendMessage(h, CB_SETCURSEL, c, 0); - } + num = rtmidi_out_get_num_devs(); + for (c = 0; c < num; c++) { + rtmidi_out_get_dev_name(c, s); + mbstowcs(lptsTemp, s, strlen(s) + 1); + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) lptsTemp); + if (val_int == c) + SendMessage(h, CB_SETCURSEL, c, 0); + } - id += 2; - break; - case CONFIG_MIDI_IN: - val_int = config_get_int((char *) config_device.name, - (char *) config->name, config->default_int); + id += 2; + break; + case CONFIG_MIDI_IN: + val_int = config_get_int((char *) config_device.name, + (char *) config->name, config->default_int); - num = rtmidi_in_get_num_devs(); - for (c = 0; c < num; c++) { - rtmidi_in_get_dev_name(c, s); - mbstowcs(lptsTemp, s, strlen(s) + 1); - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)lptsTemp); - if (val_int == c) - SendMessage(h, CB_SETCURSEL, c, 0); - } + num = rtmidi_in_get_num_devs(); + for (c = 0; c < num; c++) { + rtmidi_in_get_dev_name(c, s); + mbstowcs(lptsTemp, s, strlen(s) + 1); + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) lptsTemp); + if (val_int == c) + SendMessage(h, CB_SETCURSEL, c, 0); + } - id += 2; - break; + id += 2; + break; #endif - case CONFIG_SPINNER: - val_int = config_get_int((char *) config_device.name, - (char *) config->name, config->default_int); + case CONFIG_SPINNER: + val_int = config_get_int((char *) config_device.name, + (char *) config->name, config->default_int); - _swprintf(ws, L"%i", val_int); - SendMessage(h, WM_SETTEXT, 0, (LPARAM)ws); + _swprintf(ws, L"%i", val_int); + SendMessage(h, WM_SETTEXT, 0, (LPARAM) ws); - id += 2; - break; - case CONFIG_FNAME: - wstr = config_get_wstring((char *) config_device.name, - (char *) config->name, 0); - if (wstr) - SendMessage(h, WM_SETTEXT, 0, (LPARAM)wstr); - id += 3; - break; - case CONFIG_HEX16: - val_int = config_get_hex16((char *) config_device.name, - (char *) config->name, config->default_int); + id += 2; + break; + case CONFIG_FNAME: + wstr = config_get_wstring((char *) config_device.name, + (char *) config->name, 0); + if (wstr) + SendMessage(h, WM_SETTEXT, 0, (LPARAM) wstr); + id += 3; + break; + case CONFIG_HEX16: + val_int = config_get_hex16((char *) config_device.name, + (char *) config->name, config->default_int); - c = 0; - while (selection && selection->description && selection->description[0]) { - mbstowcs(lptsTemp, selection->description, - strlen(selection->description) + 1); - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)lptsTemp); - if (val_int == selection->value) - SendMessage(h, CB_SETCURSEL, c, 0); - selection++; - c++; - } + c = 0; + while (selection && selection->description && selection->description[0]) { + mbstowcs(lptsTemp, selection->description, + strlen(selection->description) + 1); + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) lptsTemp); + if (val_int == selection->value) + SendMessage(h, CB_SETCURSEL, c, 0); + selection++; + c++; + } - id += 2; - break; - case CONFIG_HEX20: - val_int = config_get_hex20((char *) config_device.name, - (char *) config->name, config->default_int); + id += 2; + break; + case CONFIG_HEX20: + val_int = config_get_hex20((char *) config_device.name, + (char *) config->name, config->default_int); - c = 0; - while (selection && selection->description && selection->description[0]) { - mbstowcs(lptsTemp, selection->description, - strlen(selection->description) + 1); - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)lptsTemp); - if (val_int == selection->value) - SendMessage(h, CB_SETCURSEL, c, 0); - selection++; - c++; - } + c = 0; + while (selection && selection->description && selection->description[0]) { + mbstowcs(lptsTemp, selection->description, + strlen(selection->description) + 1); + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) lptsTemp); + if (val_int == selection->value) + SendMessage(h, CB_SETCURSEL, c, 0); + selection++; + c++; + } - id += 2; - break; - } - config++; - } - free(lptsTemp); - return TRUE; - case WM_COMMAND: - cid = LOWORD(wParam); - if (cid == IDOK) { - id = IDC_CONFIG_BASE; - config = config_device.dev->config; - bios = config->bios; - changed = 0; - char s[512]; + id += 2; + break; + } + config++; + } + free(lptsTemp); + return TRUE; + case WM_COMMAND: + cid = LOWORD(wParam); + if (cid == IDOK) { + id = IDC_CONFIG_BASE; + config = config_device.dev->config; + bios = config->bios; + changed = 0; + char s[512]; - while (config->type != -1) { - const device_config_selection_t *selection = config->selection; - h = GetDlgItem(hdlg, id); + while (config->type != -1) { + const device_config_selection_t *selection = config->selection; + h = GetDlgItem(hdlg, id); - switch (config->type) { - case CONFIG_BINARY: - val_int = config_get_int((char *) config_device.name, - (char *) config->name, config->default_int); + switch (config->type) { + case CONFIG_BINARY: + val_int = config_get_int((char *) config_device.name, + (char *) config->name, config->default_int); - if (val_int != SendMessage(h, BM_GETCHECK, 0, 0)) - changed = 1; + if (val_int != SendMessage(h, BM_GETCHECK, 0, 0)) + changed = 1; - id++; - break; - case CONFIG_SELECTION: - val_int = config_get_int((char *) config_device.name, - (char *) config->name, config->default_int); + id++; + break; + case CONFIG_SELECTION: + val_int = config_get_int((char *) config_device.name, + (char *) config->name, config->default_int); - c = SendMessage(h, CB_GETCURSEL, 0, 0); + c = SendMessage(h, CB_GETCURSEL, 0, 0); - for (; c > 0; c--) - selection++; + for (; c > 0; c--) + selection++; - if (val_int != selection->value) - changed = 1; + if (val_int != selection->value) + changed = 1; - id += 2; - break; - case CONFIG_BIOS: - val_str = config_get_string((char *) config_device.name, - (char *) config->name, (char *) config->default_string); + id += 2; + break; + case CONFIG_BIOS: + val_str = config_get_string((char *) config_device.name, + (char *) config->name, (char *) config->default_string); - c = combo_to_struct[SendMessage(h, CB_GETCURSEL, 0, 0)]; + c = combo_to_struct[SendMessage(h, CB_GETCURSEL, 0, 0)]; - for (; c > 0; c--) - bios++; + for (; c > 0; c--) + bios++; - if (strcmp(val_str, bios->internal_name)) - changed = 1; + if (strcmp(val_str, bios->internal_name)) + changed = 1; - id += 2; - break; - case CONFIG_MIDI_OUT: - val_int = config_get_int((char *) config_device.name, - (char *) config->name, config->default_int); + id += 2; + break; + case CONFIG_MIDI_OUT: + val_int = config_get_int((char *) config_device.name, + (char *) config->name, config->default_int); - c = SendMessage(h, CB_GETCURSEL, 0, 0); + c = SendMessage(h, CB_GETCURSEL, 0, 0); - if (val_int != c) - changed = 1; + if (val_int != c) + changed = 1; - id += 2; - break; - case CONFIG_MIDI_IN: - val_int = config_get_int((char *) config_device.name, - (char *) config->name, config->default_int); + id += 2; + break; + case CONFIG_MIDI_IN: + val_int = config_get_int((char *) config_device.name, + (char *) config->name, config->default_int); - c = SendMessage(h, CB_GETCURSEL, 0, 0); + c = SendMessage(h, CB_GETCURSEL, 0, 0); - if (val_int != c) - changed = 1; + if (val_int != c) + changed = 1; - id += 2; - break; - case CONFIG_FNAME: - str = config_get_string((char *) config_device.name, - (char *) config->name, (char*)""); - SendMessage(h, WM_GETTEXT, 511, (LPARAM)s); - if (strcmp(str, s)) - changed = 1; + id += 2; + break; + case CONFIG_FNAME: + str = config_get_string((char *) config_device.name, + (char *) config->name, (char *) ""); + SendMessage(h, WM_GETTEXT, 511, (LPARAM) s); + if (strcmp(str, s)) + changed = 1; - id += 3; - break; - case CONFIG_SPINNER: - val_int = config_get_int((char *) config_device.name, - (char *) config->name, config->default_int); - if (val_int > config->spinner.max) - val_int = config->spinner.max; - else if (val_int < config->spinner.min) - val_int = config->spinner.min; + id += 3; + break; + case CONFIG_SPINNER: + val_int = config_get_int((char *) config_device.name, + (char *) config->name, config->default_int); + if (val_int > config->spinner.max) + val_int = config->spinner.max; + else if (val_int < config->spinner.min) + val_int = config->spinner.min; - SendMessage(h, WM_GETTEXT, 79, (LPARAM)ws); - wcstombs(s, ws, 512); - sscanf(s, "%i", &c); + SendMessage(h, WM_GETTEXT, 79, (LPARAM) ws); + wcstombs(s, ws, 512); + sscanf(s, "%i", &c); - if (val_int != c) - changed = 1; + if (val_int != c) + changed = 1; - id += 2; - break; - case CONFIG_HEX16: - val_int = config_get_hex16((char *) config_device.name, - (char *) config->name, config->default_int); + id += 2; + break; + case CONFIG_HEX16: + val_int = config_get_hex16((char *) config_device.name, + (char *) config->name, config->default_int); - c = SendMessage(h, CB_GETCURSEL, 0, 0); + c = SendMessage(h, CB_GETCURSEL, 0, 0); - for (; c > 0; c--) - selection++; + for (; c > 0; c--) + selection++; - if (val_int != selection->value) - changed = 1; + if (val_int != selection->value) + changed = 1; - id += 2; - break; - case CONFIG_HEX20: - val_int = config_get_hex20((char *) config_device.name, - (char *) config->name, config->default_int); + id += 2; + break; + case CONFIG_HEX20: + val_int = config_get_hex20((char *) config_device.name, + (char *) config->name, config->default_int); - c = SendMessage(h, CB_GETCURSEL, 0, 0); + c = SendMessage(h, CB_GETCURSEL, 0, 0); - for (; c > 0; c--) - selection++; + for (; c > 0; c--) + selection++; - if (val_int != selection->value) - changed = 1; + if (val_int != selection->value) + changed = 1; - id += 2; - break; - } - config++; - } + id += 2; + break; + } + config++; + } - if (!changed) { - deviceconfig_changed = 0; - EndDialog(hdlg, 0); - return TRUE; - } + if (!changed) { + deviceconfig_changed = 0; + EndDialog(hdlg, 0); + return TRUE; + } - deviceconfig_changed = 1; + deviceconfig_changed = 1; - id = IDC_CONFIG_BASE; - config = config_device.dev->config; + id = IDC_CONFIG_BASE; + config = config_device.dev->config; - while (config->type != -1) { - selection = config->selection; - h = GetDlgItem(hdlg, id); + while (config->type != -1) { + selection = config->selection; + h = GetDlgItem(hdlg, id); - switch (config->type) { - case CONFIG_BINARY: - config_set_int((char *) config_device.name, - (char *) config->name, SendMessage(h, BM_GETCHECK, 0, 0)); + switch (config->type) { + case CONFIG_BINARY: + config_set_int((char *) config_device.name, + (char *) config->name, SendMessage(h, BM_GETCHECK, 0, 0)); - id++; - break; - case CONFIG_SELECTION: - c = SendMessage(h, CB_GETCURSEL, 0, 0); - for (; c > 0; c--) - selection++; - config_set_int((char *) config_device.name, (char *) config->name, selection->value); + id++; + break; + case CONFIG_SELECTION: + c = SendMessage(h, CB_GETCURSEL, 0, 0); + for (; c > 0; c--) + selection++; + config_set_int((char *) config_device.name, (char *) config->name, selection->value); - id += 2; - break; - case CONFIG_BIOS: - c = combo_to_struct[SendMessage(h, CB_GETCURSEL, 0, 0)]; - for (; c > 0; c--) - bios++; - config_set_string((char *) config_device.name, (char *) config->name, (char *) bios->internal_name); + id += 2; + break; + case CONFIG_BIOS: + c = combo_to_struct[SendMessage(h, CB_GETCURSEL, 0, 0)]; + for (; c > 0; c--) + bios++; + config_set_string((char *) config_device.name, (char *) config->name, (char *) bios->internal_name); - id += 2; - break; - case CONFIG_MIDI_OUT: - c = SendMessage(h, CB_GETCURSEL, 0, 0); - config_set_int((char *) config_device.name, (char *) config->name, c); + id += 2; + break; + case CONFIG_MIDI_OUT: + c = SendMessage(h, CB_GETCURSEL, 0, 0); + config_set_int((char *) config_device.name, (char *) config->name, c); - id += 2; - break; - case CONFIG_MIDI_IN: - c = SendMessage(h, CB_GETCURSEL, 0, 0); - config_set_int((char *) config_device.name, (char *) config->name, c); + id += 2; + break; + case CONFIG_MIDI_IN: + c = SendMessage(h, CB_GETCURSEL, 0, 0); + config_set_int((char *) config_device.name, (char *) config->name, c); - id += 2; - break; - case CONFIG_FNAME: - SendMessage(h, WM_GETTEXT, 511, (LPARAM)ws); - config_set_wstring((char *) config_device.name, (char *) config->name, ws); + id += 2; + break; + case CONFIG_FNAME: + SendMessage(h, WM_GETTEXT, 511, (LPARAM) ws); + config_set_wstring((char *) config_device.name, (char *) config->name, ws); - id += 3; - break; - case CONFIG_SPINNER: - SendMessage(h, WM_GETTEXT, 79, (LPARAM)ws); - wcstombs(s, ws, 512); - sscanf(s, "%i", &c); - if (c > config->spinner.max) - c = config->spinner.max; - else if (c < config->spinner.min) - c = config->spinner.min; + id += 3; + break; + case CONFIG_SPINNER: + SendMessage(h, WM_GETTEXT, 79, (LPARAM) ws); + wcstombs(s, ws, 512); + sscanf(s, "%i", &c); + if (c > config->spinner.max) + c = config->spinner.max; + else if (c < config->spinner.min) + c = config->spinner.min; - config_set_int((char *) config_device.name, (char *) config->name, c); + config_set_int((char *) config_device.name, (char *) config->name, c); - id += 2; - break; - case CONFIG_HEX16: - c = SendMessage(h, CB_GETCURSEL, 0, 0); - for (; c > 0; c--) - selection++; - config_set_hex16((char *) config_device.name, (char *) config->name, selection->value); + id += 2; + break; + case CONFIG_HEX16: + c = SendMessage(h, CB_GETCURSEL, 0, 0); + for (; c > 0; c--) + selection++; + config_set_hex16((char *) config_device.name, (char *) config->name, selection->value); - id += 2; - break; - case CONFIG_HEX20: - c = SendMessage(h, CB_GETCURSEL, 0, 0); - for (; c > 0; c--) - selection++; - config_set_hex20((char *) config_device.name, (char *) config->name, selection->value); + id += 2; + break; + case CONFIG_HEX20: + c = SendMessage(h, CB_GETCURSEL, 0, 0); + for (; c > 0; c--) + selection++; + config_set_hex20((char *) config_device.name, (char *) config->name, selection->value); - id += 2; - break; - } - config++; - } + id += 2; + break; + } + config++; + } - EndDialog(hdlg, 0); - return TRUE; - } else if (cid == IDCANCEL) { - deviceconfig_changed = 0; - EndDialog(hdlg, 0); - return TRUE; - } else { - id = IDC_CONFIG_BASE; - while (config->type != -1) { - switch (config->type) { - case CONFIG_BINARY: - id++; - break; - case CONFIG_SELECTION: - case CONFIG_HEX16: - case CONFIG_HEX20: - case CONFIG_BIOS: - case CONFIG_MIDI_OUT: - case CONFIG_MIDI_IN: - case CONFIG_SPINNER: - id += 2; - break; - case CONFIG_FNAME: - if (cid == id+1) { - s[0] = 0; - h = GetDlgItem(hdlg, id); - SendMessage(h, WM_GETTEXT, 511, (LPARAM)s); - file_filter[0] = 0; + EndDialog(hdlg, 0); + return TRUE; + } else if (cid == IDCANCEL) { + deviceconfig_changed = 0; + EndDialog(hdlg, 0); + return TRUE; + } else { + id = IDC_CONFIG_BASE; + while (config->type != -1) { + switch (config->type) { + case CONFIG_BINARY: + id++; + break; + case CONFIG_SELECTION: + case CONFIG_HEX16: + case CONFIG_HEX20: + case CONFIG_BIOS: + case CONFIG_MIDI_OUT: + case CONFIG_MIDI_IN: + case CONFIG_SPINNER: + id += 2; + break; + case CONFIG_FNAME: + if (cid == id + 1) { + s[0] = 0; + h = GetDlgItem(hdlg, id); + SendMessage(h, WM_GETTEXT, 511, (LPARAM) s); + file_filter[0] = 0; - strcat(file_filter, config->file_filter); - strcat(file_filter, "|All files (*.*)|*.*|"); - mbstowcs(ws, file_filter, strlen(file_filter) + 1); - d = strlen(file_filter); + strcat(file_filter, config->file_filter); + strcat(file_filter, "|All files (*.*)|*.*|"); + mbstowcs(ws, file_filter, strlen(file_filter) + 1); + d = strlen(file_filter); - /* replace | with \0 */ - for (c = 0; c < d; ++c) { - if (ws[c] == L'|') - ws[c] = 0; - } + /* replace | with \0 */ + for (c = 0; c < d; ++c) { + if (ws[c] == L'|') + ws[c] = 0; + } - if (!file_dlg(hdlg, ws, s, NULL, 0)) - SendMessage(h, WM_SETTEXT, 0, (LPARAM)wopenfilestring); - } - break; - } - config++; - } - } - break; + if (!file_dlg(hdlg, ws, s, NULL, 0)) + SendMessage(h, WM_SETTEXT, 0, (LPARAM) wopenfilestring); + } + break; + } + config++; + } + } + break; } return FALSE; } - uint8_t deviceconfig_inst_open(HWND hwnd, const device_t *device, int inst) { const device_config_t *config = device->config; - uint16_t *data_block; - uint16_t *data; - DLGTEMPLATE *dlg; - DLGITEMTEMPLATE *item; + uint16_t *data_block; + uint16_t *data; + DLGTEMPLATE *dlg; + DLGITEMTEMPLATE *item; data_block = malloc(16384); - dlg = (DLGTEMPLATE *)data_block; - int y = 10; - int id = IDC_CONFIG_BASE; + dlg = (DLGTEMPLATE *) data_block; + int y = 10; + int id = IDC_CONFIG_BASE; deviceconfig_changed = 0; memset(data_block, 0, 16384); dlg->style = DS_SETFONT | DS_MODALFRAME | DS_FIXEDSYS | WS_POPUP | WS_CAPTION | WS_SYSMENU; - dlg->x = 10; - dlg->y = 10; - dlg->cx = 220; - dlg->cy = 70; + dlg->x = 10; + dlg->y = 10; + dlg->cx = 220; + dlg->cy = 70; - data = (uint16_t *)(dlg + 1); + data = (uint16_t *) (dlg + 1); *data++ = 0; /*no menu*/ *data++ = 0; /*predefined dialog box class*/ @@ -522,237 +519,237 @@ deviceconfig_inst_open(HWND hwnd, const device_t *device, int inst) *data++ = 9; /*Point*/ data += MultiByteToWideChar(CP_ACP, 0, "Segoe UI", -1, data, 120); - if (((uintptr_t)data) & 2) - data++; + if (((uintptr_t) data) & 2) + data++; while (config->type != -1) { - switch (config->type) { - case CONFIG_BINARY: - item = (DLGITEMTEMPLATE *)data; - item->x = 10; - item->y = y; - item->id = id++; + switch (config->type) { + case CONFIG_BINARY: + item = (DLGITEMTEMPLATE *) data; + item->x = 10; + item->y = y; + item->id = id++; - item->cx = 100; - item->cy = 15; + item->cx = 100; + item->cy = 15; - item->style = WS_CHILD | WS_VISIBLE | BS_AUTOCHECKBOX; + item->style = WS_CHILD | WS_VISIBLE | BS_AUTOCHECKBOX; - data = (uint16_t *)(item + 1); - *data++ = 0xFFFF; - *data++ = 0x0080; /* button class */ + data = (uint16_t *) (item + 1); + *data++ = 0xFFFF; + *data++ = 0x0080; /* button class */ - data += MultiByteToWideChar(CP_ACP, 0, config->description, -1, data, 256); - *data++ = 0; /* no creation data */ + data += MultiByteToWideChar(CP_ACP, 0, config->description, -1, data, 256); + *data++ = 0; /* no creation data */ - y += 20; - break; + y += 20; + break; - case CONFIG_SELECTION: - case CONFIG_MIDI_OUT: - case CONFIG_MIDI_IN: - case CONFIG_HEX16: - case CONFIG_HEX20: - /*Combo box*/ - item = (DLGITEMTEMPLATE *)data; - item->x = 70; - item->y = y; - item->id = id++; + case CONFIG_SELECTION: + case CONFIG_MIDI_OUT: + case CONFIG_MIDI_IN: + case CONFIG_HEX16: + case CONFIG_HEX20: + /*Combo box*/ + item = (DLGITEMTEMPLATE *) data; + item->x = 70; + item->y = y; + item->id = id++; - item->cx = 140; - item->cy = 150; + item->cx = 140; + item->cy = 150; - item->style = WS_CHILD | WS_VISIBLE | CBS_DROPDOWNLIST | WS_VSCROLL; + item->style = WS_CHILD | WS_VISIBLE | CBS_DROPDOWNLIST | WS_VSCROLL; - data = (uint16_t *)(item + 1); - *data++ = 0xFFFF; - *data++ = 0x0085; /* combo box class */ + data = (uint16_t *) (item + 1); + *data++ = 0xFFFF; + *data++ = 0x0085; /* combo box class */ - data += MultiByteToWideChar(CP_ACP, 0, config->description, -1, data, 256); - *data++ = 0; /* no creation data */ + data += MultiByteToWideChar(CP_ACP, 0, config->description, -1, data, 256); + *data++ = 0; /* no creation data */ - if (((uintptr_t)data) & 2) - data++; + if (((uintptr_t) data) & 2) + data++; - /*Static text*/ - item = (DLGITEMTEMPLATE *)data; - item->x = 10; - item->y = y + 2; - item->id = id++; + /*Static text*/ + item = (DLGITEMTEMPLATE *) data; + item->x = 10; + item->y = y + 2; + item->id = id++; - item->cx = 60; - item->cy = 20; + item->cx = 60; + item->cy = 20; - item->style = WS_CHILD | WS_VISIBLE; + item->style = WS_CHILD | WS_VISIBLE; - data = (uint16_t *)(item + 1); - *data++ = 0xFFFF; - *data++ = 0x0082; /* static class */ + data = (uint16_t *) (item + 1); + *data++ = 0xFFFF; + *data++ = 0x0082; /* static class */ - data += MultiByteToWideChar(CP_ACP, 0, config->description, -1, data, 256); - *data++ = 0; /* no creation data */ + data += MultiByteToWideChar(CP_ACP, 0, config->description, -1, data, 256); + *data++ = 0; /* no creation data */ - if (((uintptr_t)data) & 2) - data++; + if (((uintptr_t) data) & 2) + data++; - y += 20; - break; - case CONFIG_SPINNER: - /*Spinner*/ - item = (DLGITEMTEMPLATE *)data; - item->x = 70; - item->y = y; - item->id = id++; + y += 20; + break; + case CONFIG_SPINNER: + /*Spinner*/ + item = (DLGITEMTEMPLATE *) data; + item->x = 70; + item->y = y; + item->id = id++; - item->cx = 140; - item->cy = 14; + item->cx = 140; + item->cy = 14; - item->style = WS_CHILD | WS_VISIBLE | ES_AUTOHSCROLL | ES_NUMBER; - item->dwExtendedStyle = WS_EX_CLIENTEDGE; + item->style = WS_CHILD | WS_VISIBLE | ES_AUTOHSCROLL | ES_NUMBER; + item->dwExtendedStyle = WS_EX_CLIENTEDGE; - data = (uint16_t *)(item + 1); - *data++ = 0xFFFF; - *data++ = 0x0081; /* edit text class */ + data = (uint16_t *) (item + 1); + *data++ = 0xFFFF; + *data++ = 0x0081; /* edit text class */ - data += MultiByteToWideChar(CP_ACP, 0, "", -1, data, 256); - *data++ = 0; /* no creation data */ + data += MultiByteToWideChar(CP_ACP, 0, "", -1, data, 256); + *data++ = 0; /* no creation data */ - if (((uintptr_t)data) & 2) - data++; + if (((uintptr_t) data) & 2) + data++; - /* TODO: add up down class */ - /*Static text*/ - item = (DLGITEMTEMPLATE *)data; - item->x = 10; - item->y = y + 2; - item->id = id++; + /* TODO: add up down class */ + /*Static text*/ + item = (DLGITEMTEMPLATE *) data; + item->x = 10; + item->y = y + 2; + item->id = id++; - item->cx = 60; - item->cy = 20; + item->cx = 60; + item->cy = 20; - item->style = WS_CHILD | WS_VISIBLE; + item->style = WS_CHILD | WS_VISIBLE; - data = (uint16_t *)(item + 1); - *data++ = 0xFFFF; - *data++ = 0x0082; /* static class */ + data = (uint16_t *) (item + 1); + *data++ = 0xFFFF; + *data++ = 0x0082; /* static class */ - data += MultiByteToWideChar(CP_ACP, 0, config->description, -1, data, 256); - *data++ = 0; /* no creation data */ + data += MultiByteToWideChar(CP_ACP, 0, config->description, -1, data, 256); + *data++ = 0; /* no creation data */ - if (((uintptr_t)data) & 2) - data++; + if (((uintptr_t) data) & 2) + data++; - y += 20; - break; - case CONFIG_FNAME: - /*File*/ - item = (DLGITEMTEMPLATE *)data; - item->x = 70; - item->y = y; - item->id = id++; + y += 20; + break; + case CONFIG_FNAME: + /*File*/ + item = (DLGITEMTEMPLATE *) data; + item->x = 70; + item->y = y; + item->id = id++; - item->cx = 100; - item->cy = 14; + item->cx = 100; + item->cy = 14; - item->style = WS_CHILD | WS_VISIBLE | ES_READONLY; - item->dwExtendedStyle = WS_EX_CLIENTEDGE; + item->style = WS_CHILD | WS_VISIBLE | ES_READONLY; + item->dwExtendedStyle = WS_EX_CLIENTEDGE; - data = (uint16_t *)(item + 1); - *data++ = 0xFFFF; - *data++ = 0x0081; /* edit text class */ + data = (uint16_t *) (item + 1); + *data++ = 0xFFFF; + *data++ = 0x0081; /* edit text class */ - data += MultiByteToWideChar(CP_ACP, 0, "", -1, data, 256); - *data++ = 0; /* no creation data */ + data += MultiByteToWideChar(CP_ACP, 0, "", -1, data, 256); + *data++ = 0; /* no creation data */ - if (((uintptr_t)data) & 2) - data++; + if (((uintptr_t) data) & 2) + data++; - /* Button */ - item = (DLGITEMTEMPLATE *)data; - item->x = 175; - item->y = y; - item->id = id++; + /* Button */ + item = (DLGITEMTEMPLATE *) data; + item->x = 175; + item->y = y; + item->id = id++; - item->cx = 35; - item->cy = 14; + item->cx = 35; + item->cy = 14; - item->style = WS_CHILD | WS_VISIBLE | BS_PUSHBUTTON; + item->style = WS_CHILD | WS_VISIBLE | BS_PUSHBUTTON; - data = (uint16_t *)(item + 1); - *data++ = 0xFFFF; - *data++ = 0x0080; /* button class */ + data = (uint16_t *) (item + 1); + *data++ = 0xFFFF; + *data++ = 0x0080; /* button class */ - data += MultiByteToWideChar(CP_ACP, 0, "Browse", -1, data, 256); - *data++ = 0; /* no creation data */ + data += MultiByteToWideChar(CP_ACP, 0, "Browse", -1, data, 256); + *data++ = 0; /* no creation data */ - if (((uintptr_t)data) & 2) - data++; + if (((uintptr_t) data) & 2) + data++; - /*Static text*/ - item = (DLGITEMTEMPLATE *)data; - item->x = 10; - item->y = y + 2; - item->id = id++; + /*Static text*/ + item = (DLGITEMTEMPLATE *) data; + item->x = 10; + item->y = y + 2; + item->id = id++; - item->cx = 60; - item->cy = 20; + item->cx = 60; + item->cy = 20; - item->style = WS_CHILD | WS_VISIBLE; + item->style = WS_CHILD | WS_VISIBLE; - data = (uint16_t *)(item + 1); - *data++ = 0xFFFF; - *data++ = 0x0082; /* static class */ + data = (uint16_t *) (item + 1); + *data++ = 0xFFFF; + *data++ = 0x0082; /* static class */ - data += MultiByteToWideChar(CP_ACP, 0, config->description, -1, data, 256); - *data++ = 0; /* no creation data */ + data += MultiByteToWideChar(CP_ACP, 0, config->description, -1, data, 256); + *data++ = 0; /* no creation data */ - if (((uintptr_t)data) & 2) - data++; + if (((uintptr_t) data) & 2) + data++; - y += 20; - break; - } + y += 20; + break; + } - if (((uintptr_t)data) & 2) - data++; + if (((uintptr_t) data) & 2) + data++; - config++; + config++; } dlg->cdit = (id - IDC_CONFIG_BASE) + 2; - item = (DLGITEMTEMPLATE *)data; - item->x = 100; - item->y = y + 5; - item->cx = 50; - item->cy = 14; - item->id = IDOK; /* OK button identifier */ + item = (DLGITEMTEMPLATE *) data; + item->x = 100; + item->y = y + 5; + item->cx = 50; + item->cy = 14; + item->id = IDOK; /* OK button identifier */ item->style = WS_CHILD | WS_VISIBLE | BS_DEFPUSHBUTTON; - data = (uint16_t *)(item + 1); + data = (uint16_t *) (item + 1); *data++ = 0xFFFF; - *data++ = 0x0080; /* button class */ + *data++ = 0x0080; /* button class */ data += MultiByteToWideChar(CP_ACP, 0, "OK", -1, data, 50); - *data++ = 0; /* no creation data */ + *data++ = 0; /* no creation data */ - if (((uintptr_t)data) & 2) - data++; + if (((uintptr_t) data) & 2) + data++; - item = (DLGITEMTEMPLATE *)data; - item->x = 160; - item->y = y + 5; - item->cx = 50; - item->cy = 14; - item->id = IDCANCEL; /* OK button identifier */ + item = (DLGITEMTEMPLATE *) data; + item->x = 160; + item->y = y + 5; + item->cx = 50; + item->cy = 14; + item->id = IDCANCEL; /* OK button identifier */ item->style = WS_CHILD | WS_VISIBLE | BS_DEFPUSHBUTTON; - data = (uint16_t *)(item + 1); + data = (uint16_t *) (item + 1); *data++ = 0xFFFF; - *data++ = 0x0080; /* button class */ + *data++ = 0x0080; /* button class */ data += MultiByteToWideChar(CP_ACP, 0, "Cancel", -1, data, 50); - *data++ = 0; /* no creation data */ + *data++ = 0; /* no creation data */ dlg->cy = y + 25; @@ -765,7 +762,6 @@ deviceconfig_inst_open(HWND hwnd, const device_t *device, int inst) return deviceconfig_changed; } - uint8_t deviceconfig_open(HWND hwnd, const device_t *device) { diff --git a/src/win/win_dialog.c b/src/win/win_dialog.c index 3bf8f1662..a15974b01 100644 --- a/src/win/win_dialog.c +++ b/src/win/win_dialog.c @@ -33,15 +33,11 @@ #include <86box/ui.h> #include <86box/win.h> +#define STRING_OR_RESOURCE(s) ((!(s)) ? (NULL) : ((((uintptr_t) s) < ((uintptr_t) 65636)) ? (MAKEINTRESOURCE((uintptr_t) s)) : (s))) - -#define STRING_OR_RESOURCE(s) ((!(s)) ? (NULL) : ((((uintptr_t)s) < ((uintptr_t)65636)) ? (MAKEINTRESOURCE((uintptr_t)s)) : (s))) - - -WCHAR wopenfilestring[512]; -char openfilestring[512]; -uint8_t filterindex = 0; - +WCHAR wopenfilestring[512]; +char openfilestring[512]; +uint8_t filterindex = 0; int ui_msgbox(int flags, void *message) @@ -49,125 +45,127 @@ ui_msgbox(int flags, void *message) return ui_msgbox_ex(flags, NULL, message, NULL, NULL, NULL); } - int ui_msgbox_header(int flags, void *header, void *message) { return ui_msgbox_ex(flags, header, message, NULL, NULL, NULL); } - int -ui_msgbox_ex(int flags, void *header, void *message, void *btn1, void *btn2, void *btn3) { - WCHAR temp[512]; - TASKDIALOGCONFIG tdconfig = {0}; +ui_msgbox_ex(int flags, void *header, void *message, void *btn1, void *btn2, void *btn3) +{ + WCHAR temp[512]; + TASKDIALOGCONFIG tdconfig = { 0 }; TASKDIALOG_BUTTON tdbuttons[3], - tdb_yes = {IDYES, STRING_OR_RESOURCE(btn1)}, - tdb_no = {IDNO, STRING_OR_RESOURCE(btn2)}, - tdb_cancel = {IDCANCEL, STRING_OR_RESOURCE(btn3)}, - tdb_exit = {IDCLOSE, MAKEINTRESOURCE(IDS_2119)}; + tdb_yes = { IDYES, STRING_OR_RESOURCE(btn1) }, + tdb_no = { IDNO, STRING_OR_RESOURCE(btn2) }, + tdb_cancel = { IDCANCEL, STRING_OR_RESOURCE(btn3) }, + tdb_exit = { IDCLOSE, MAKEINTRESOURCE(IDS_2119) }; int ret = 0, checked = 0; /* Configure the default OK button. */ tdconfig.cButtons = 0; if (btn1) - tdbuttons[tdconfig.cButtons++] = tdb_yes; + tdbuttons[tdconfig.cButtons++] = tdb_yes; else - tdconfig.dwCommonButtons = TDCBF_OK_BUTTON; + tdconfig.dwCommonButtons = TDCBF_OK_BUTTON; /* Configure the message type. */ - switch(flags & 0x1f) { - case MBX_INFO: /* just an informational message */ - tdconfig.pszMainIcon = TD_INFORMATION_ICON; - break; + switch (flags & 0x1f) { + case MBX_INFO: /* just an informational message */ + tdconfig.pszMainIcon = TD_INFORMATION_ICON; + break; - case MBX_ERROR: /* error message */ - if (flags & MBX_FATAL) { - tdconfig.pszMainIcon = TD_ERROR_ICON; - tdconfig.pszMainInstruction = MAKEINTRESOURCE(IDS_2050); /* "Fatal error" */ + case MBX_ERROR: /* error message */ + if (flags & MBX_FATAL) { + tdconfig.pszMainIcon = TD_ERROR_ICON; + tdconfig.pszMainInstruction = MAKEINTRESOURCE(IDS_2050); /* "Fatal error" */ - /* replace default "OK" button with "Exit" button */ - if (btn1) - tdconfig.cButtons = 0; - else - tdconfig.dwCommonButtons = 0; - tdbuttons[tdconfig.cButtons++] = tdb_exit; - } else { - tdconfig.pszMainIcon = TD_WARNING_ICON; - tdconfig.pszMainInstruction = MAKEINTRESOURCE(IDS_2049); /* "Error" */ - } - break; + /* replace default "OK" button with "Exit" button */ + if (btn1) + tdconfig.cButtons = 0; + else + tdconfig.dwCommonButtons = 0; + tdbuttons[tdconfig.cButtons++] = tdb_exit; + } else { + tdconfig.pszMainIcon = TD_WARNING_ICON; + tdconfig.pszMainInstruction = MAKEINTRESOURCE(IDS_2049); /* "Error" */ + } + break; - case MBX_QUESTION: /* question */ - case MBX_QUESTION_YN: - case MBX_QUESTION_OK: - if (!btn1) /* replace default "OK" button with "Yes" button */ - tdconfig.dwCommonButtons = (flags & MBX_QUESTION_OK) ? TDCBF_OK_BUTTON : TDCBF_YES_BUTTON; + case MBX_QUESTION: /* question */ + case MBX_QUESTION_YN: + case MBX_QUESTION_OK: + if (!btn1) /* replace default "OK" button with "Yes" button */ + tdconfig.dwCommonButtons = (flags & MBX_QUESTION_OK) ? TDCBF_OK_BUTTON : TDCBF_YES_BUTTON; - if (btn2) /* "No" button */ - tdbuttons[tdconfig.cButtons++] = tdb_no; - else - tdconfig.dwCommonButtons |= (flags & MBX_QUESTION_OK) ? TDCBF_CANCEL_BUTTON : TDCBF_NO_BUTTON; + if (btn2) /* "No" button */ + tdbuttons[tdconfig.cButtons++] = tdb_no; + else + tdconfig.dwCommonButtons |= (flags & MBX_QUESTION_OK) ? TDCBF_CANCEL_BUTTON : TDCBF_NO_BUTTON; - if (flags & MBX_QUESTION) { - if (btn3) /* "Cancel" button */ - tdbuttons[tdconfig.cButtons++] = tdb_cancel; - else - tdconfig.dwCommonButtons |= TDCBF_CANCEL_BUTTON; - } + if (flags & MBX_QUESTION) { + if (btn3) /* "Cancel" button */ + tdbuttons[tdconfig.cButtons++] = tdb_cancel; + else + tdconfig.dwCommonButtons |= TDCBF_CANCEL_BUTTON; + } - if (flags & MBX_WARNING) - tdconfig.pszMainIcon = TD_WARNING_ICON; - break; + if (flags & MBX_WARNING) + tdconfig.pszMainIcon = TD_WARNING_ICON; + break; } /* If the message is an ANSI string, convert it. */ tdconfig.pszContent = (WCHAR *) STRING_OR_RESOURCE(message); if (flags & MBX_ANSI) { - mbstoc16s(temp, (char *)message, strlen((char *)message)+1); - tdconfig.pszContent = temp; + mbstoc16s(temp, (char *) message, strlen((char *) message) + 1); + tdconfig.pszContent = temp; } /* Configure the rest of the TaskDialog. */ - tdconfig.cbSize = sizeof(tdconfig); + tdconfig.cbSize = sizeof(tdconfig); tdconfig.hwndParent = hwndMain; if (flags & MBX_LINKS) - tdconfig.dwFlags = TDF_USE_COMMAND_LINKS; + tdconfig.dwFlags = TDF_USE_COMMAND_LINKS; tdconfig.pszWindowTitle = MAKEINTRESOURCE(IDS_STRINGS); if (header) - tdconfig.pszMainInstruction = STRING_OR_RESOURCE(header); + tdconfig.pszMainInstruction = STRING_OR_RESOURCE(header); tdconfig.pButtons = tdbuttons; if (flags & MBX_DONTASK) - tdconfig.pszVerificationText = MAKEINTRESOURCE(IDS_2135); + tdconfig.pszVerificationText = MAKEINTRESOURCE(IDS_2135); /* Run the TaskDialog. */ TaskDialogIndirect(&tdconfig, &ret, NULL, &checked); /* Convert return values to generic ones. */ - if (ret == IDNO) ret = 1; - else if (ret == IDCANCEL) ret = -1; - else ret = 0; + if (ret == IDNO) + ret = 1; + else if (ret == IDCANCEL) + ret = -1; + else + ret = 0; /* 10 is added to the return value if "don't show again" is checked. */ - if (checked) ret += 10; + if (checked) + ret += 10; - return(ret); + return (ret); } - int file_dlg_w(HWND hwnd, WCHAR *f, WCHAR *fn, WCHAR *title, int save) { OPENFILENAME ofn; - BOOL r; + BOOL r; /* DWORD err; */ int old_dopause; /* Initialize OPENFILENAME */ ZeroMemory(&ofn, sizeof(ofn)); ofn.lStructSize = sizeof(ofn); - ofn.hwndOwner = hwnd; - ofn.lpstrFile = wopenfilestring; + ofn.hwndOwner = hwnd; + ofn.lpstrFile = wopenfilestring; /* * Set lpstrFile[0] to '\0' so that GetOpenFileName does @@ -175,40 +173,39 @@ file_dlg_w(HWND hwnd, WCHAR *f, WCHAR *fn, WCHAR *title, int save) */ memset(ofn.lpstrFile, 0x00, 512 * sizeof(WCHAR)); memcpy(ofn.lpstrFile, fn, (wcslen(fn) << 1) + 2); - ofn.nMaxFile = sizeof_w(wopenfilestring); - ofn.lpstrFilter = f; - ofn.nFilterIndex = 1; - ofn.lpstrFileTitle = NULL; - ofn.nMaxFileTitle = 0; + ofn.nMaxFile = sizeof_w(wopenfilestring); + ofn.lpstrFilter = f; + ofn.nFilterIndex = 1; + ofn.lpstrFileTitle = NULL; + ofn.nMaxFileTitle = 0; ofn.lpstrInitialDir = NULL; - ofn.Flags = OFN_PATHMUSTEXIST; - if (! save) - ofn.Flags |= OFN_FILEMUSTEXIST; + ofn.Flags = OFN_PATHMUSTEXIST; + if (!save) + ofn.Flags |= OFN_FILEMUSTEXIST; if (title) - ofn.lpstrTitle = title; + ofn.lpstrTitle = title; /* Display the Open dialog box. */ old_dopause = dopause; plat_pause(1); if (save) - r = GetSaveFileName(&ofn); + r = GetSaveFileName(&ofn); else - r = GetOpenFileName(&ofn); + r = GetOpenFileName(&ofn); plat_pause(old_dopause); plat_chdir(usr_path); if (r) { - c16stombs(openfilestring, wopenfilestring, sizeof(openfilestring)); - filterindex = ofn.nFilterIndex; + c16stombs(openfilestring, wopenfilestring, sizeof(openfilestring)); + filterindex = ofn.nFilterIndex; - return(0); + return (0); } - return(1); + return (1); } - int file_dlg(HWND hwnd, WCHAR *f, char *fn, char *title, int save) { @@ -218,10 +215,9 @@ file_dlg(HWND hwnd, WCHAR *f, char *fn, char *title, int save) if (title) mbstoc16s(title_buf, title, sizeof title_buf); - return(file_dlg_w(hwnd, f, ufn, title ? title_buf : NULL, save)); + return (file_dlg_w(hwnd, f, ufn, title ? title_buf : NULL, save)); } - int file_dlg_mb(HWND hwnd, char *f, char *fn, char *title, int save) { @@ -232,22 +228,20 @@ file_dlg_mb(HWND hwnd, char *f, char *fn, char *title, int save) if (title) mbstoc16s(title_buf, title, sizeof title_buf); - return(file_dlg_w(hwnd, uf, ufn, title ? title_buf : NULL, save)); + return (file_dlg_w(hwnd, uf, ufn, title ? title_buf : NULL, save)); } - int file_dlg_w_st(HWND hwnd, int id, WCHAR *fn, char *title, int save) { WCHAR title_buf[512]; if (title) mbstoc16s(title_buf, title, sizeof title_buf); - return(file_dlg_w(hwnd, plat_get_string(id), fn, title ? title_buf : NULL, save)); + return (file_dlg_w(hwnd, plat_get_string(id), fn, title ? title_buf : NULL, save)); } - int file_dlg_st(HWND hwnd, int id, char *fn, char *title, int save) { - return(file_dlg(hwnd, plat_get_string(id), fn, title, save)); + return (file_dlg(hwnd, plat_get_string(id), fn, title, save)); } diff --git a/src/win/win_dynld.c b/src/win/win_dynld.c index 98eb4739f..66fd0503d 100644 --- a/src/win/win_dynld.c +++ b/src/win/win_dynld.c @@ -25,63 +25,59 @@ #include <86box/86box.h> #include <86box/plat_dynld.h> - #ifdef ENABLE_DYNLD_LOG int dynld_do_log = ENABLE_DYNLD_LOG; - static void dynld_log(const char *fmt, ...) { va_list ap; if (dynld_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define dynld_log(fmt, ...) +# define dynld_log(fmt, ...) #endif - void * dynld_module(const char *name, dllimp_t *table) { - HMODULE h; + HMODULE h; dllimp_t *imp; - void *func; + void *func; /* See if we can load the desired module. */ if ((h = LoadLibrary(name)) == NULL) { - dynld_log("DynLd(\"%s\"): library not found! (%08X)\n", name, GetLastError()); - return(NULL); + dynld_log("DynLd(\"%s\"): library not found! (%08X)\n", name, GetLastError()); + return (NULL); } /* Now load the desired function pointers. */ - for (imp=table; imp->name!=NULL; imp++) { - func = GetProcAddress(h, imp->name); - if (func == NULL) { - dynld_log("DynLd(\"%s\"): function '%s' not found! (%08X)\n", - name, imp->name, GetLastError()); - FreeLibrary(h); - return(NULL); - } + for (imp = table; imp->name != NULL; imp++) { + func = GetProcAddress(h, imp->name); + if (func == NULL) { + dynld_log("DynLd(\"%s\"): function '%s' not found! (%08X)\n", + name, imp->name, GetLastError()); + FreeLibrary(h); + return (NULL); + } - /* To overcome typing issues.. */ - *(char **)imp->func = (char *)func; + /* To overcome typing issues.. */ + *(char **) imp->func = (char *) func; } /* All good. */ dynld_log("loaded %s\n", name); - return((void *)h); + return ((void *) h); } - void dynld_close(void *handle) { if (handle != NULL) - FreeLibrary((HMODULE)handle); + FreeLibrary((HMODULE) handle); } diff --git a/src/win/win_icon.c b/src/win/win_icon.c index c11125ecd..7be30da1e 100644 --- a/src/win/win_icon.c +++ b/src/win/win_icon.c @@ -28,138 +28,138 @@ #include <86box/ui.h> #include <86box/win.h> -HICON hIcon[256]; /* icon data loaded from resources */ -char icon_set[256] = ""; /* name of the iconset to be used */ +HICON hIcon[256]; /* icon data loaded from resources */ +char icon_set[256] = ""; /* name of the iconset to be used */ -void win_clear_icon_set() +void +win_clear_icon_set() { - int i; + int i; - for (i = 0; i < 256; i++) - if (hIcon[i] != 0) - { - DestroyIcon(hIcon[i]); - hIcon[i] = 0; - } + for (i = 0; i < 256; i++) + if (hIcon[i] != 0) { + DestroyIcon(hIcon[i]); + hIcon[i] = 0; + } } -void win_system_icon_set() +void +win_system_icon_set() { - int i, x = win_get_system_metrics(SM_CXSMICON, dpi), y = win_get_system_metrics(SM_CYSMICON, dpi); + int i, x = win_get_system_metrics(SM_CXSMICON, dpi), y = win_get_system_metrics(SM_CYSMICON, dpi); - for (i = 0; i < 256; i++) - hIcon[i] = LoadImage(hinstance, MAKEINTRESOURCE(i), IMAGE_ICON, x, y, LR_DEFAULTCOLOR); + for (i = 0; i < 256; i++) + hIcon[i] = LoadImage(hinstance, MAKEINTRESOURCE(i), IMAGE_ICON, x, y, LR_DEFAULTCOLOR); } typedef struct { - int id; - char* filename; + int id; + char *filename; } _ICON_DATA; -const _ICON_DATA icon_files[] = - { - {16, "floppy_525.ico"}, - {17, "floppy_525_active.ico"}, - {24, "floppy_35.ico"}, - {25, "floppy_35_active.ico"}, - {32, "cdrom.ico"}, - {33, "cdrom_active.ico"}, - {48, "zip.ico"}, - {49, "zip_active.ico"}, - {56, "mo.ico"}, - {57, "mo_active.ico"}, - {64, "cassette.ico"}, - {65, "cassette_active.ico"}, - {80, "hard_disk.ico"}, - {81, "hard_disk_active.ico"}, - {96, "network.ico"}, - {97, "network_active.ico"}, - {104, "cartridge.ico"}, - {144, "floppy_525_empty.ico"}, - {145, "floppy_525_empty_active.ico"}, - {152, "floppy_35_empty.ico"}, - {153, "floppy_35_empty_active.ico"}, - {160, "cdrom_empty.ico"}, - {161, "cdrom_empty_active.ico"}, - {176, "zip_empty.ico"}, - {177, "zip_empty_active.ico"}, - {184, "mo_empty.ico"}, - {185, "mo_empty_active.ico"}, - {192, "cassette_empty.ico"}, - {193, "cassette_empty_active.ico"}, - {200, "run.ico"}, - {201, "pause.ico"}, - {202, "send_cad.ico"}, - {203, "send_cae.ico"}, - {204, "hard_reset.ico"}, - {205, "acpi_shutdown.ico"}, - {206, "settings.ico"}, - {232, "cartridge_empty.ico"}, - {240, "machine.ico"}, - {241, "display.ico"}, - {242, "input_devices.ico"}, - {243, "sound.ico"}, - {244, "ports.ico"}, - {245, "other_peripherals.ico"}, - {246, "floppy_and_cdrom_drives.ico"}, - {247, "other_removable_devices.ico"}, - {248, "floppy_disabled.ico"}, - {249, "cdrom_disabled.ico"}, - {250, "zip_disabled.ico"}, - {251, "mo_disabled.ico"}, - {252, "storage_controllers.ico"} - }; +const _ICON_DATA icon_files[] = { + {16, "floppy_525.ico" }, + { 17, "floppy_525_active.ico" }, + { 24, "floppy_35.ico" }, + { 25, "floppy_35_active.ico" }, + { 32, "cdrom.ico" }, + { 33, "cdrom_active.ico" }, + { 48, "zip.ico" }, + { 49, "zip_active.ico" }, + { 56, "mo.ico" }, + { 57, "mo_active.ico" }, + { 64, "cassette.ico" }, + { 65, "cassette_active.ico" }, + { 80, "hard_disk.ico" }, + { 81, "hard_disk_active.ico" }, + { 96, "network.ico" }, + { 97, "network_active.ico" }, + { 104, "cartridge.ico" }, + { 144, "floppy_525_empty.ico" }, + { 145, "floppy_525_empty_active.ico"}, + { 152, "floppy_35_empty.ico" }, + { 153, "floppy_35_empty_active.ico" }, + { 160, "cdrom_empty.ico" }, + { 161, "cdrom_empty_active.ico" }, + { 176, "zip_empty.ico" }, + { 177, "zip_empty_active.ico" }, + { 184, "mo_empty.ico" }, + { 185, "mo_empty_active.ico" }, + { 192, "cassette_empty.ico" }, + { 193, "cassette_empty_active.ico" }, + { 200, "run.ico" }, + { 201, "pause.ico" }, + { 202, "send_cad.ico" }, + { 203, "send_cae.ico" }, + { 204, "hard_reset.ico" }, + { 205, "acpi_shutdown.ico" }, + { 206, "settings.ico" }, + { 232, "cartridge_empty.ico" }, + { 240, "machine.ico" }, + { 241, "display.ico" }, + { 242, "input_devices.ico" }, + { 243, "sound.ico" }, + { 244, "ports.ico" }, + { 245, "other_peripherals.ico" }, + { 246, "floppy_and_cdrom_drives.ico"}, + { 247, "other_removable_devices.ico"}, + { 248, "floppy_disabled.ico" }, + { 249, "cdrom_disabled.ico" }, + { 250, "zip_disabled.ico" }, + { 251, "mo_disabled.ico" }, + { 252, "storage_controllers.ico" } +}; -void win_get_icons_path(char* path_root) +void +win_get_icons_path(char *path_root) { - char roms_root[1024] = {0}; - if (rom_path[0]) - strcpy(roms_root, rom_path); - else - path_append_filename(roms_root, exe_path, "roms"); + char roms_root[1024] = { 0 }; + if (rom_path[0]) + strcpy(roms_root, rom_path); + else + path_append_filename(roms_root, exe_path, "roms"); - path_append_filename(path_root, roms_root, "icons"); - path_slash(path_root); + path_append_filename(path_root, roms_root, "icons"); + path_slash(path_root); } -void win_load_icon_set() +void +win_load_icon_set() { - win_clear_icon_set(); - win_system_icon_set(); + win_clear_icon_set(); + win_system_icon_set(); - if (strlen(icon_set) == 0) { - ToolBarLoadIcons(); - return; - } + if (strlen(icon_set) == 0) { + ToolBarLoadIcons(); + return; + } - char path_root[2048] = {0}, temp[2048] = {0}; - wchar_t wtemp[2048] = {0}; + char path_root[2048] = { 0 }, temp[2048] = { 0 }; + wchar_t wtemp[2048] = { 0 }; - win_get_icons_path(path_root); - strcat(path_root, icon_set); - path_slash(path_root); + win_get_icons_path(path_root); + strcat(path_root, icon_set); + path_slash(path_root); - int i, count = sizeof(icon_files) / sizeof(_ICON_DATA), - x = win_get_system_metrics(SM_CXSMICON, dpi), y = win_get_system_metrics(SM_CYSMICON, dpi); - for (i = 0; i < count; i++) - { - path_append_filename(temp, path_root, icon_files[i].filename); - mbstoc16s(wtemp, temp, strlen(temp) + 1); + int i, count = sizeof(icon_files) / sizeof(_ICON_DATA), + x = win_get_system_metrics(SM_CXSMICON, dpi), y = win_get_system_metrics(SM_CYSMICON, dpi); + for (i = 0; i < count; i++) { + path_append_filename(temp, path_root, icon_files[i].filename); + mbstoc16s(wtemp, temp, strlen(temp) + 1); - HICON ictemp; - ictemp = LoadImageW(NULL, (LPWSTR)wtemp, IMAGE_ICON, x, y, LR_LOADFROMFILE | LR_DEFAULTCOLOR); - if (ictemp) - { - if (hIcon[icon_files[i].id]) - DestroyIcon(hIcon[icon_files[i].id]); - hIcon[icon_files[i].id] = ictemp; - } - } + HICON ictemp; + ictemp = LoadImageW(NULL, (LPWSTR) wtemp, IMAGE_ICON, x, y, LR_LOADFROMFILE | LR_DEFAULTCOLOR); + if (ictemp) { + if (hIcon[icon_files[i].id]) + DestroyIcon(hIcon[icon_files[i].id]); + hIcon[icon_files[i].id] = ictemp; + } + } - uint32_t curr_lang = lang_id; - lang_id = 0; - set_language(curr_lang); + uint32_t curr_lang = lang_id; + lang_id = 0; + set_language(curr_lang); - ToolBarLoadIcons(); + ToolBarLoadIcons(); } diff --git a/src/win/win_joystick_rawinput.c b/src/win/win_joystick_rawinput.c index d1fca0491..47441f8cf 100644 --- a/src/win/win_joystick_rawinput.c +++ b/src/win/win_joystick_rawinput.c @@ -36,435 +36,447 @@ #ifdef ENABLE_JOYSTICK_LOG int joystick_do_log = ENABLE_JOYSTICK_LOG; - static void joystick_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (joystick_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (joystick_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define joystick_log(fmt, ...) +# define joystick_log(fmt, ...) #endif typedef struct { - HANDLE hdevice; - PHIDP_PREPARSED_DATA data; + HANDLE hdevice; + PHIDP_PREPARSED_DATA data; - USAGE usage_button[256]; + USAGE usage_button[256]; - struct raw_axis_t { - USAGE usage; - USHORT link; - USHORT bitsize; - LONG max; - LONG min; - } axis[8]; + struct raw_axis_t { + USAGE usage; + USHORT link; + USHORT bitsize; + LONG max; + LONG min; + } axis[8]; - struct raw_pov_t { - USAGE usage; - USHORT link; - LONG max; - LONG min; - } pov[4]; + struct raw_pov_t { + USAGE usage; + USHORT link; + LONG max; + LONG min; + } pov[4]; } raw_joystick_t; plat_joystick_t plat_joystick_state[MAX_PLAT_JOYSTICKS]; -joystick_t joystick_state[MAX_JOYSTICKS]; -int joysticks_present = 0; +joystick_t joystick_state[MAX_JOYSTICKS]; +int joysticks_present = 0; raw_joystick_t raw_joystick_state[MAX_PLAT_JOYSTICKS]; /* We only use the first 32 buttons reported, from Usage ID 1-128 */ -void joystick_add_button(raw_joystick_t* rawjoy, plat_joystick_t* joy, USAGE usage) { - if (joy->nr_buttons >= 32) return; - if (usage < 1 || usage > 128) return; - - rawjoy->usage_button[usage] = joy->nr_buttons; - sprintf(joy->button[joy->nr_buttons].name, "Button %d", usage); - joy->nr_buttons++; -} - -void joystick_add_axis(raw_joystick_t* rawjoy, plat_joystick_t* joy, PHIDP_VALUE_CAPS prop) { - if (joy->nr_axes >= 8) return; - - switch (prop->Range.UsageMin) { - case HID_USAGE_GENERIC_X: - sprintf(joy->axis[joy->nr_axes].name, "X"); - break; - case HID_USAGE_GENERIC_Y: - sprintf(joy->axis[joy->nr_axes].name, "Y"); - break; - case HID_USAGE_GENERIC_Z: - sprintf(joy->axis[joy->nr_axes].name, "Z"); - break; - case HID_USAGE_GENERIC_RX: - sprintf(joy->axis[joy->nr_axes].name, "RX"); - break; - case HID_USAGE_GENERIC_RY: - sprintf(joy->axis[joy->nr_axes].name, "RY"); - break; - case HID_USAGE_GENERIC_RZ: - sprintf(joy->axis[joy->nr_axes].name, "RZ"); - break; - default: - return; - } - - joy->axis[joy->nr_axes].id = joy->nr_axes; - rawjoy->axis[joy->nr_axes].usage = prop->Range.UsageMin; - rawjoy->axis[joy->nr_axes].link = prop->LinkCollection; - rawjoy->axis[joy->nr_axes].bitsize = prop->BitSize; - - /* Assume unsigned when min >= 0 */ - if (prop->LogicalMin < 0) { - rawjoy->axis[joy->nr_axes].max = prop->LogicalMax; - } else { - /* - * Some joysticks will send -1 in LogicalMax, like Xbox Controllers - * so we need to mask that to appropriate value (instead of 0xFFFFFFFF) - */ - rawjoy->axis[joy->nr_axes].max = prop->LogicalMax & ((1 << prop->BitSize) - 1); - } - rawjoy->axis[joy->nr_axes].min = prop->LogicalMin; - - joy->nr_axes++; -} - -void joystick_add_pov(raw_joystick_t* rawjoy, plat_joystick_t* joy, PHIDP_VALUE_CAPS prop) { - if (joy->nr_povs >= 4) return; - - sprintf(joy->pov[joy->nr_povs].name, "POV %d", joy->nr_povs+1); - rawjoy->pov[joy->nr_povs].usage = prop->Range.UsageMin; - rawjoy->pov[joy->nr_povs].link = prop->LinkCollection; - rawjoy->pov[joy->nr_povs].min = prop->LogicalMin; - rawjoy->pov[joy->nr_povs].max = prop->LogicalMax; - - joy->nr_povs++; -} - -void joystick_get_capabilities(raw_joystick_t* rawjoy, plat_joystick_t* joy) { - UINT size = 0; - PHIDP_BUTTON_CAPS btn_caps = NULL; - PHIDP_VALUE_CAPS val_caps = NULL; - - /* Get preparsed data (HID data format) */ - GetRawInputDeviceInfoW(rawjoy->hdevice, RIDI_PREPARSEDDATA, NULL, &size); - rawjoy->data = malloc(size); - if (GetRawInputDeviceInfoW(rawjoy->hdevice, RIDI_PREPARSEDDATA, rawjoy->data, &size) <= 0) - fatal("joystick_get_capabilities: Failed to get preparsed data.\n"); - - HIDP_CAPS caps; - HidP_GetCaps(rawjoy->data, &caps); - - /* Buttons */ - if (caps.NumberInputButtonCaps > 0) { - btn_caps = calloc(caps.NumberInputButtonCaps, sizeof(HIDP_BUTTON_CAPS)); - if (HidP_GetButtonCaps(HidP_Input, btn_caps, &caps.NumberInputButtonCaps, rawjoy->data) != HIDP_STATUS_SUCCESS) { - joystick_log("joystick_get_capabilities: Failed to query input buttons.\n"); - goto end; - } - /* We only detect generic stuff */ - for (int c=0; c 0) { - val_caps = calloc(caps.NumberInputValueCaps, sizeof(HIDP_VALUE_CAPS)); - if (HidP_GetValueCaps(HidP_Input, val_caps, &caps.NumberInputValueCaps, rawjoy->data) != HIDP_STATUS_SUCCESS) { - joystick_log("joystick_get_capabilities: Failed to query axes and povs.\n"); - goto end; - } - /* We only detect generic stuff */ - for (int c=0; chdevice, RIDI_DEVICENAME, device_name, &size); - device_name = calloc(size, sizeof(char)); - if (GetRawInputDeviceInfoA(rawjoy->hdevice, RIDI_DEVICENAME, device_name, &size) <= 0) - fatal("joystick_get_capabilities: Failed to get device name.\n"); - - HANDLE hDevObj = CreateFile(device_name, GENERIC_READ | GENERIC_WRITE, - FILE_SHARE_READ | FILE_SHARE_WRITE, NULL, OPEN_EXISTING, 0, NULL); - if (hDevObj) { - HidD_GetProductString(hDevObj, device_desc_wide, sizeof(WCHAR) * 200); - CloseHandle(hDevObj); - } - free(device_name); - - int result = WideCharToMultiByte(CP_ACP, 0, device_desc_wide, 200, joy->name, 260, NULL, NULL); - if (result == 0 || strlen(joy->name) == 0) - sprintf(joy->name, - "RawInput %s, VID:%04lX PID:%04lX", - info->hid.usUsage == HID_USAGE_GENERIC_JOYSTICK ? "Joystick" : "Gamepad", - info->hid.dwVendorId, - info->hid.dwProductId); -} - -void joystick_init() +void +joystick_add_button(raw_joystick_t *rawjoy, plat_joystick_t *joy, USAGE usage) { - UINT size = 0; - atexit(joystick_close); + if (joy->nr_buttons >= 32) + return; + if (usage < 1 || usage > 128) + return; - joysticks_present = 0; - memset(raw_joystick_state, 0, sizeof(raw_joystick_t) * MAX_PLAT_JOYSTICKS); - - /* Get a list of raw input devices from Windows */ - UINT raw_devices = 0; - GetRawInputDeviceList(NULL, &raw_devices, sizeof(RAWINPUTDEVICELIST)); - PRAWINPUTDEVICELIST deviceList = calloc(raw_devices, sizeof(RAWINPUTDEVICELIST)); - GetRawInputDeviceList(deviceList, &raw_devices, sizeof(RAWINPUTDEVICELIST)); - - for (int i=0; i= MAX_PLAT_JOYSTICKS) break; - if (deviceList[i].dwType != RIM_TYPEHID) continue; - - /* Get device info: hardware IDs and usage IDs */ - GetRawInputDeviceInfoA(deviceList[i].hDevice, RIDI_DEVICEINFO, NULL, &size); - info = malloc(size); - info->cbSize = sizeof(RID_DEVICE_INFO); - if (GetRawInputDeviceInfoA(deviceList[i].hDevice, RIDI_DEVICEINFO, info, &size) <= 0) - goto end_loop; - - /* If this is not a joystick/gamepad, skip */ - if (info->hid.usUsagePage != HID_USAGE_PAGE_GENERIC) goto end_loop; - if (info->hid.usUsage != HID_USAGE_GENERIC_JOYSTICK && - info->hid.usUsage != HID_USAGE_GENERIC_GAMEPAD) goto end_loop; - - plat_joystick_t *joy = &plat_joystick_state[joysticks_present]; - raw_joystick_t *rawjoy = &raw_joystick_state[joysticks_present]; - rawjoy->hdevice = deviceList[i].hDevice; - - joystick_get_capabilities(rawjoy, joy); - joystick_get_device_name(rawjoy, joy, info); - - joystick_log("joystick_init: %s - %d buttons, %d axes, %d POVs\n", - joy->name, joy->nr_buttons, joy->nr_axes, joy->nr_povs); - - joysticks_present++; - - end_loop: - free(info); - } - - joystick_log("joystick_init: joysticks_present=%i\n", joysticks_present); - - /* Initialize the RawInput (joystick and gamepad) module. */ - RAWINPUTDEVICE ridev[2]; - ridev[0].dwFlags = 0; - ridev[0].hwndTarget = NULL; - ridev[0].usUsagePage = HID_USAGE_PAGE_GENERIC; - ridev[0].usUsage = HID_USAGE_GENERIC_JOYSTICK; - - ridev[1].dwFlags = 0; - ridev[1].hwndTarget = NULL; - ridev[1].usUsagePage = HID_USAGE_PAGE_GENERIC; - ridev[1].usUsage = HID_USAGE_GENERIC_GAMEPAD; - - if (!RegisterRawInputDevices(ridev, 2, sizeof(RAWINPUTDEVICE))) - fatal("plat_joystick_init: RegisterRawInputDevices failed\n"); + rawjoy->usage_button[usage] = joy->nr_buttons; + sprintf(joy->button[joy->nr_buttons].name, "Button %d", usage); + joy->nr_buttons++; } -void joystick_close() +void +joystick_add_axis(raw_joystick_t *rawjoy, plat_joystick_t *joy, PHIDP_VALUE_CAPS prop) { - RAWINPUTDEVICE ridev[2]; - ridev[0].dwFlags = RIDEV_REMOVE; - ridev[0].hwndTarget = NULL; - ridev[0].usUsagePage = HID_USAGE_PAGE_GENERIC; - ridev[0].usUsage = HID_USAGE_GENERIC_JOYSTICK; + if (joy->nr_axes >= 8) + return; - ridev[1].dwFlags = RIDEV_REMOVE; - ridev[1].hwndTarget = NULL; - ridev[1].usUsagePage = HID_USAGE_PAGE_GENERIC; - ridev[1].usUsage = HID_USAGE_GENERIC_GAMEPAD; + switch (prop->Range.UsageMin) { + case HID_USAGE_GENERIC_X: + sprintf(joy->axis[joy->nr_axes].name, "X"); + break; + case HID_USAGE_GENERIC_Y: + sprintf(joy->axis[joy->nr_axes].name, "Y"); + break; + case HID_USAGE_GENERIC_Z: + sprintf(joy->axis[joy->nr_axes].name, "Z"); + break; + case HID_USAGE_GENERIC_RX: + sprintf(joy->axis[joy->nr_axes].name, "RX"); + break; + case HID_USAGE_GENERIC_RY: + sprintf(joy->axis[joy->nr_axes].name, "RY"); + break; + case HID_USAGE_GENERIC_RZ: + sprintf(joy->axis[joy->nr_axes].name, "RZ"); + break; + default: + return; + } - RegisterRawInputDevices(ridev, 2, sizeof(RAWINPUTDEVICE)); + joy->axis[joy->nr_axes].id = joy->nr_axes; + rawjoy->axis[joy->nr_axes].usage = prop->Range.UsageMin; + rawjoy->axis[joy->nr_axes].link = prop->LinkCollection; + rawjoy->axis[joy->nr_axes].bitsize = prop->BitSize; + + /* Assume unsigned when min >= 0 */ + if (prop->LogicalMin < 0) { + rawjoy->axis[joy->nr_axes].max = prop->LogicalMax; + } else { + /* + * Some joysticks will send -1 in LogicalMax, like Xbox Controllers + * so we need to mask that to appropriate value (instead of 0xFFFFFFFF) + */ + rawjoy->axis[joy->nr_axes].max = prop->LogicalMax & ((1 << prop->BitSize) - 1); + } + rawjoy->axis[joy->nr_axes].min = prop->LogicalMin; + + joy->nr_axes++; } - -void win_joystick_handle(PRAWINPUT raw) +void +joystick_add_pov(raw_joystick_t *rawjoy, plat_joystick_t *joy, PHIDP_VALUE_CAPS prop) { - HRESULT r; - int j = -1; /* current joystick index, -1 when not found */ + if (joy->nr_povs >= 4) + return; - /* If the input is not from a known device, we ignore it */ - for (int i=0; iheader.hDevice) { - j = i; - break; - } - } - if (j == -1) return; + sprintf(joy->pov[joy->nr_povs].name, "POV %d", joy->nr_povs + 1); + rawjoy->pov[joy->nr_povs].usage = prop->Range.UsageMin; + rawjoy->pov[joy->nr_povs].link = prop->LinkCollection; + rawjoy->pov[joy->nr_povs].min = prop->LogicalMin; + rawjoy->pov[joy->nr_povs].max = prop->LogicalMax; - /* Read buttons */ - USAGE usage_list[128] = {0}; - ULONG usage_length = plat_joystick_state[j].nr_buttons; - memset(plat_joystick_state[j].b, 0, 32 * sizeof(int)); - - r = HidP_GetUsages(HidP_Input, HID_USAGE_PAGE_BUTTON, 0, usage_list, &usage_length, - raw_joystick_state[j].data, (PCHAR)raw->data.hid.bRawData, raw->data.hid.dwSizeHid); - - if (r == HIDP_STATUS_SUCCESS) { - for (int i=0; imax - axis->min + 1) / 2; - - r = HidP_GetUsageValue(HidP_Input, HID_USAGE_PAGE_GENERIC, axis->link, axis->usage, &uvalue, - raw_joystick_state[j].data, (PCHAR)raw->data.hid.bRawData, raw->data.hid.dwSizeHid); - - if (r == HIDP_STATUS_SUCCESS) { - if (axis->min < 0) { - /* extend signed uvalue to LONG */ - if (uvalue & (1 << (axis->bitsize-1))) { - ULONG mask = (1 << axis->bitsize) - 1; - value = -1U ^ mask; - value |= uvalue; - } else { - value = uvalue; - } - } else { - /* Assume unsigned when min >= 0, convert to a signed value */ - value = (LONG)uvalue - center; - } - if (abs(value) == 1) value = 0; - value = value * 32768 / center; - } - - plat_joystick_state[j].a[a] = value; - //joystick_log("%s %-06d ", plat_joystick_state[j].axis[a].name, plat_joystick_state[j].a[a]); - } - - /* read povs */ - for (int p=0; plink, pov->usage, &uvalue, - raw_joystick_state[j].data, (PCHAR)raw->data.hid.bRawData, raw->data.hid.dwSizeHid); - - if (r == HIDP_STATUS_SUCCESS && (uvalue >= pov->min && uvalue <= pov->max)) { - value = (uvalue - pov->min) * 36000; - value /= (pov->max - pov->min + 1); - value %= 36000; - } - - plat_joystick_state[j].p[p] = value; - - //joystick_log("%s %-3d ", plat_joystick_state[j].pov[p].name, plat_joystick_state[j].p[p]); - - } - //joystick_log("\n"); + joy->nr_povs++; } - -static int joystick_get_axis(int joystick_nr, int mapping) +void +joystick_get_capabilities(raw_joystick_t *rawjoy, plat_joystick_t *joy) { - if (mapping & POV_X) - { - int pov = plat_joystick_state[joystick_nr].p[mapping & 3]; - if (LOWORD(pov) == 0xFFFF) - return 0; - else - return sin((2*M_PI * (double)pov) / 36000.0) * 32767; - } - else if (mapping & POV_Y) - { - int pov = plat_joystick_state[joystick_nr].p[mapping & 3]; + UINT size = 0; + PHIDP_BUTTON_CAPS btn_caps = NULL; + PHIDP_VALUE_CAPS val_caps = NULL; - if (LOWORD(pov) == 0xFFFF) - return 0; - else - return -cos((2*M_PI * (double)pov) / 36000.0) * 32767; - } - else - return plat_joystick_state[joystick_nr].a[plat_joystick_state[joystick_nr].axis[mapping].id]; + /* Get preparsed data (HID data format) */ + GetRawInputDeviceInfoW(rawjoy->hdevice, RIDI_PREPARSEDDATA, NULL, &size); + rawjoy->data = malloc(size); + if (GetRawInputDeviceInfoW(rawjoy->hdevice, RIDI_PREPARSEDDATA, rawjoy->data, &size) <= 0) + fatal("joystick_get_capabilities: Failed to get preparsed data.\n"); + HIDP_CAPS caps; + HidP_GetCaps(rawjoy->data, &caps); + + /* Buttons */ + if (caps.NumberInputButtonCaps > 0) { + btn_caps = calloc(caps.NumberInputButtonCaps, sizeof(HIDP_BUTTON_CAPS)); + if (HidP_GetButtonCaps(HidP_Input, btn_caps, &caps.NumberInputButtonCaps, rawjoy->data) != HIDP_STATUS_SUCCESS) { + joystick_log("joystick_get_capabilities: Failed to query input buttons.\n"); + goto end; + } + /* We only detect generic stuff */ + for (int c = 0; c < caps.NumberInputButtonCaps; c++) { + if (btn_caps[c].UsagePage != HID_USAGE_PAGE_BUTTON) + continue; + + int button_count = btn_caps[c].Range.UsageMax - btn_caps[c].Range.UsageMin + 1; + for (int b = 0; b < button_count; b++) { + joystick_add_button(rawjoy, joy, b + btn_caps[c].Range.UsageMin); + } + } + } + + /* Values (axes and povs) */ + if (caps.NumberInputValueCaps > 0) { + val_caps = calloc(caps.NumberInputValueCaps, sizeof(HIDP_VALUE_CAPS)); + if (HidP_GetValueCaps(HidP_Input, val_caps, &caps.NumberInputValueCaps, rawjoy->data) != HIDP_STATUS_SUCCESS) { + joystick_log("joystick_get_capabilities: Failed to query axes and povs.\n"); + goto end; + } + /* We only detect generic stuff */ + for (int c = 0; c < caps.NumberInputValueCaps; c++) { + if (val_caps[c].UsagePage != HID_USAGE_PAGE_GENERIC) + continue; + + if (val_caps[c].Range.UsageMin == HID_USAGE_GENERIC_HATSWITCH) + joystick_add_pov(rawjoy, joy, &val_caps[c]); + else + joystick_add_axis(rawjoy, joy, &val_caps[c]); + } + } + +end: + free(btn_caps); + free(val_caps); } - -void joystick_process(void) +void +joystick_get_device_name(raw_joystick_t *rawjoy, plat_joystick_t *joy, PRID_DEVICE_INFO info) { - int c, d; + UINT size = 0; + char *device_name = NULL; + WCHAR device_desc_wide[200] = { 0 }; - if (joystick_type == 7) return; + GetRawInputDeviceInfoA(rawjoy->hdevice, RIDI_DEVICENAME, device_name, &size); + device_name = calloc(size, sizeof(char)); + if (GetRawInputDeviceInfoA(rawjoy->hdevice, RIDI_DEVICENAME, device_name, &size) <= 0) + fatal("joystick_get_capabilities: Failed to get device name.\n"); - for (c = 0; c < joystick_get_max_joysticks(joystick_type); c++) - { - if (joystick_state[c].plat_joystick_nr) - { - int joystick_nr = joystick_state[c].plat_joystick_nr - 1; + HANDLE hDevObj = CreateFile(device_name, GENERIC_READ | GENERIC_WRITE, + FILE_SHARE_READ | FILE_SHARE_WRITE, NULL, OPEN_EXISTING, 0, NULL); + if (hDevObj) { + HidD_GetProductString(hDevObj, device_desc_wide, sizeof(WCHAR) * 200); + CloseHandle(hDevObj); + } + free(device_name); - for (d = 0; d < joystick_get_axis_count(joystick_type); d++) - joystick_state[c].axis[d] = joystick_get_axis(joystick_nr, joystick_state[c].axis_mapping[d]); - for (d = 0; d < joystick_get_button_count(joystick_type); d++) - joystick_state[c].button[d] = plat_joystick_state[joystick_nr].b[joystick_state[c].button_mapping[d]]; - - for (d = 0; d < joystick_get_pov_count(joystick_type); d++) - { - int x, y; - double angle, magnitude; - - x = joystick_get_axis(joystick_nr, joystick_state[c].pov_mapping[d][0]); - y = joystick_get_axis(joystick_nr, joystick_state[c].pov_mapping[d][1]); - - angle = (atan2((double)y, (double)x) * 360.0) / (2*M_PI); - magnitude = sqrt((double)x*(double)x + (double)y*(double)y); - - if (magnitude < 16384) - joystick_state[c].pov[d] = -1; - else - joystick_state[c].pov[d] = ((int)angle + 90 + 360) % 360; - } - } - else - { - for (d = 0; d < joystick_get_axis_count(joystick_type); d++) - joystick_state[c].axis[d] = 0; - for (d = 0; d < joystick_get_button_count(joystick_type); d++) - joystick_state[c].button[d] = 0; - for (d = 0; d < joystick_get_pov_count(joystick_type); d++) - joystick_state[c].pov[d] = -1; - } - } + int result = WideCharToMultiByte(CP_ACP, 0, device_desc_wide, 200, joy->name, 260, NULL, NULL); + if (result == 0 || strlen(joy->name) == 0) + sprintf(joy->name, + "RawInput %s, VID:%04lX PID:%04lX", + info->hid.usUsage == HID_USAGE_GENERIC_JOYSTICK ? "Joystick" : "Gamepad", + info->hid.dwVendorId, + info->hid.dwProductId); +} + +void +joystick_init() +{ + UINT size = 0; + atexit(joystick_close); + + joysticks_present = 0; + memset(raw_joystick_state, 0, sizeof(raw_joystick_t) * MAX_PLAT_JOYSTICKS); + + /* Get a list of raw input devices from Windows */ + UINT raw_devices = 0; + GetRawInputDeviceList(NULL, &raw_devices, sizeof(RAWINPUTDEVICELIST)); + PRAWINPUTDEVICELIST deviceList = calloc(raw_devices, sizeof(RAWINPUTDEVICELIST)); + GetRawInputDeviceList(deviceList, &raw_devices, sizeof(RAWINPUTDEVICELIST)); + + for (int i = 0; i < raw_devices; i++) { + PRID_DEVICE_INFO info = NULL; + + if (joysticks_present >= MAX_PLAT_JOYSTICKS) + break; + if (deviceList[i].dwType != RIM_TYPEHID) + continue; + + /* Get device info: hardware IDs and usage IDs */ + GetRawInputDeviceInfoA(deviceList[i].hDevice, RIDI_DEVICEINFO, NULL, &size); + info = malloc(size); + info->cbSize = sizeof(RID_DEVICE_INFO); + if (GetRawInputDeviceInfoA(deviceList[i].hDevice, RIDI_DEVICEINFO, info, &size) <= 0) + goto end_loop; + + /* If this is not a joystick/gamepad, skip */ + if (info->hid.usUsagePage != HID_USAGE_PAGE_GENERIC) + goto end_loop; + if (info->hid.usUsage != HID_USAGE_GENERIC_JOYSTICK && info->hid.usUsage != HID_USAGE_GENERIC_GAMEPAD) + goto end_loop; + + plat_joystick_t *joy = &plat_joystick_state[joysticks_present]; + raw_joystick_t *rawjoy = &raw_joystick_state[joysticks_present]; + rawjoy->hdevice = deviceList[i].hDevice; + + joystick_get_capabilities(rawjoy, joy); + joystick_get_device_name(rawjoy, joy, info); + + joystick_log("joystick_init: %s - %d buttons, %d axes, %d POVs\n", + joy->name, joy->nr_buttons, joy->nr_axes, joy->nr_povs); + + joysticks_present++; + +end_loop: + free(info); + } + + joystick_log("joystick_init: joysticks_present=%i\n", joysticks_present); + + /* Initialize the RawInput (joystick and gamepad) module. */ + RAWINPUTDEVICE ridev[2]; + ridev[0].dwFlags = 0; + ridev[0].hwndTarget = NULL; + ridev[0].usUsagePage = HID_USAGE_PAGE_GENERIC; + ridev[0].usUsage = HID_USAGE_GENERIC_JOYSTICK; + + ridev[1].dwFlags = 0; + ridev[1].hwndTarget = NULL; + ridev[1].usUsagePage = HID_USAGE_PAGE_GENERIC; + ridev[1].usUsage = HID_USAGE_GENERIC_GAMEPAD; + + if (!RegisterRawInputDevices(ridev, 2, sizeof(RAWINPUTDEVICE))) + fatal("plat_joystick_init: RegisterRawInputDevices failed\n"); +} + +void +joystick_close() +{ + RAWINPUTDEVICE ridev[2]; + ridev[0].dwFlags = RIDEV_REMOVE; + ridev[0].hwndTarget = NULL; + ridev[0].usUsagePage = HID_USAGE_PAGE_GENERIC; + ridev[0].usUsage = HID_USAGE_GENERIC_JOYSTICK; + + ridev[1].dwFlags = RIDEV_REMOVE; + ridev[1].hwndTarget = NULL; + ridev[1].usUsagePage = HID_USAGE_PAGE_GENERIC; + ridev[1].usUsage = HID_USAGE_GENERIC_GAMEPAD; + + RegisterRawInputDevices(ridev, 2, sizeof(RAWINPUTDEVICE)); +} + +void +win_joystick_handle(PRAWINPUT raw) +{ + HRESULT r; + int j = -1; /* current joystick index, -1 when not found */ + + /* If the input is not from a known device, we ignore it */ + for (int i = 0; i < joysticks_present; i++) { + if (raw_joystick_state[i].hdevice == raw->header.hDevice) { + j = i; + break; + } + } + if (j == -1) + return; + + /* Read buttons */ + USAGE usage_list[128] = { 0 }; + ULONG usage_length = plat_joystick_state[j].nr_buttons; + memset(plat_joystick_state[j].b, 0, 32 * sizeof(int)); + + r = HidP_GetUsages(HidP_Input, HID_USAGE_PAGE_BUTTON, 0, usage_list, &usage_length, + raw_joystick_state[j].data, (PCHAR) raw->data.hid.bRawData, raw->data.hid.dwSizeHid); + + if (r == HIDP_STATUS_SUCCESS) { + for (int i = 0; i < usage_length; i++) { + int button = raw_joystick_state[j].usage_button[usage_list[i]]; + plat_joystick_state[j].b[button] = 128; + } + } + + /* Read axes */ + for (int a = 0; a < plat_joystick_state[j].nr_axes; a++) { + struct raw_axis_t *axis = &raw_joystick_state[j].axis[a]; + ULONG uvalue = 0; + LONG value = 0; + LONG center = (axis->max - axis->min + 1) / 2; + + r = HidP_GetUsageValue(HidP_Input, HID_USAGE_PAGE_GENERIC, axis->link, axis->usage, &uvalue, + raw_joystick_state[j].data, (PCHAR) raw->data.hid.bRawData, raw->data.hid.dwSizeHid); + + if (r == HIDP_STATUS_SUCCESS) { + if (axis->min < 0) { + /* extend signed uvalue to LONG */ + if (uvalue & (1 << (axis->bitsize - 1))) { + ULONG mask = (1 << axis->bitsize) - 1; + value = -1U ^ mask; + value |= uvalue; + } else { + value = uvalue; + } + } else { + /* Assume unsigned when min >= 0, convert to a signed value */ + value = (LONG) uvalue - center; + } + if (abs(value) == 1) + value = 0; + value = value * 32768 / center; + } + + plat_joystick_state[j].a[a] = value; + // joystick_log("%s %-06d ", plat_joystick_state[j].axis[a].name, plat_joystick_state[j].a[a]); + } + + /* read povs */ + for (int p = 0; p < plat_joystick_state[j].nr_povs; p++) { + struct raw_pov_t *pov = &raw_joystick_state[j].pov[p]; + ULONG uvalue = 0; + LONG value = -1; + + r = HidP_GetUsageValue(HidP_Input, HID_USAGE_PAGE_GENERIC, pov->link, pov->usage, &uvalue, + raw_joystick_state[j].data, (PCHAR) raw->data.hid.bRawData, raw->data.hid.dwSizeHid); + + if (r == HIDP_STATUS_SUCCESS && (uvalue >= pov->min && uvalue <= pov->max)) { + value = (uvalue - pov->min) * 36000; + value /= (pov->max - pov->min + 1); + value %= 36000; + } + + plat_joystick_state[j].p[p] = value; + + // joystick_log("%s %-3d ", plat_joystick_state[j].pov[p].name, plat_joystick_state[j].p[p]); + } + // joystick_log("\n"); +} + +static int +joystick_get_axis(int joystick_nr, int mapping) +{ + if (mapping & POV_X) { + int pov = plat_joystick_state[joystick_nr].p[mapping & 3]; + if (LOWORD(pov) == 0xFFFF) + return 0; + else + return sin((2 * M_PI * (double) pov) / 36000.0) * 32767; + } else if (mapping & POV_Y) { + int pov = plat_joystick_state[joystick_nr].p[mapping & 3]; + + if (LOWORD(pov) == 0xFFFF) + return 0; + else + return -cos((2 * M_PI * (double) pov) / 36000.0) * 32767; + } else + return plat_joystick_state[joystick_nr].a[plat_joystick_state[joystick_nr].axis[mapping].id]; +} + +void +joystick_process(void) +{ + int c, d; + + if (joystick_type == 7) + return; + + for (c = 0; c < joystick_get_max_joysticks(joystick_type); c++) { + if (joystick_state[c].plat_joystick_nr) { + int joystick_nr = joystick_state[c].plat_joystick_nr - 1; + + for (d = 0; d < joystick_get_axis_count(joystick_type); d++) + joystick_state[c].axis[d] = joystick_get_axis(joystick_nr, joystick_state[c].axis_mapping[d]); + for (d = 0; d < joystick_get_button_count(joystick_type); d++) + joystick_state[c].button[d] = plat_joystick_state[joystick_nr].b[joystick_state[c].button_mapping[d]]; + + for (d = 0; d < joystick_get_pov_count(joystick_type); d++) { + int x, y; + double angle, magnitude; + + x = joystick_get_axis(joystick_nr, joystick_state[c].pov_mapping[d][0]); + y = joystick_get_axis(joystick_nr, joystick_state[c].pov_mapping[d][1]); + + angle = (atan2((double) y, (double) x) * 360.0) / (2 * M_PI); + magnitude = sqrt((double) x * (double) x + (double) y * (double) y); + + if (magnitude < 16384) + joystick_state[c].pov[d] = -1; + else + joystick_state[c].pov[d] = ((int) angle + 90 + 360) % 360; + } + } else { + for (d = 0; d < joystick_get_axis_count(joystick_type); d++) + joystick_state[c].axis[d] = 0; + for (d = 0; d < joystick_get_button_count(joystick_type); d++) + joystick_state[c].button[d] = 0; + for (d = 0; d < joystick_get_pov_count(joystick_type); d++) + joystick_state[c].pov[d] = -1; + } + } } diff --git a/src/win/win_joystick_xinput.c b/src/win/win_joystick_xinput.c index 325d87bd9..605626420 100644 --- a/src/win/win_joystick_xinput.c +++ b/src/win/win_joystick_xinput.c @@ -32,233 +32,234 @@ #include <86box/win.h> #define XINPUT_MAX_JOYSTICKS 4 -#define XINPUT_NAME "Xinput compatiable controller" -#define XINPUT_NAME_LX "Left Stick X" -#define XINPUT_NAME_LY "Left Stick Y" -#define XINPUT_NAME_RX "Right Stick X" -#define XINPUT_NAME_RY "Right Stick Y" -#define XINPUT_NAME_DPAD_X "D-pad X" -#define XINPUT_NAME_DPAD_Y "D-pad Y" -#define XINPUT_NAME_LB "LB" -#define XINPUT_NAME_RB "RB" -#define XINPUT_NAME_LT "LT" -#define XINPUT_NAME_RT "RT" -#define XINPUT_NAME_A "A" -#define XINPUT_NAME_B "B" -#define XINPUT_NAME_X "X" -#define XINPUT_NAME_Y "Y" -#define XINPUT_NAME_BACK "Back/View" -#define XINPUT_NAME_START "Start/Menu" -#define XINPUT_NAME_LS "Left Stick" -#define XINPUT_NAME_RS "Right Stick" +#define XINPUT_NAME "Xinput compatiable controller" +#define XINPUT_NAME_LX "Left Stick X" +#define XINPUT_NAME_LY "Left Stick Y" +#define XINPUT_NAME_RX "Right Stick X" +#define XINPUT_NAME_RY "Right Stick Y" +#define XINPUT_NAME_DPAD_X "D-pad X" +#define XINPUT_NAME_DPAD_Y "D-pad Y" +#define XINPUT_NAME_LB "LB" +#define XINPUT_NAME_RB "RB" +#define XINPUT_NAME_LT "LT" +#define XINPUT_NAME_RT "RT" +#define XINPUT_NAME_A "A" +#define XINPUT_NAME_B "B" +#define XINPUT_NAME_X "X" +#define XINPUT_NAME_Y "Y" +#define XINPUT_NAME_BACK "Back/View" +#define XINPUT_NAME_START "Start/Menu" +#define XINPUT_NAME_LS "Left Stick" +#define XINPUT_NAME_RS "Right Stick" #ifdef ENABLE_JOYSTICK_LOG int joystick_do_log = ENABLE_JOYSTICK_LOG; - static void joystick_log(const char *fmt, ...) { va_list ap; if (joystick_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define joystick_log(fmt, ...) +# define joystick_log(fmt, ...) #endif plat_joystick_t plat_joystick_state[MAX_PLAT_JOYSTICKS]; -joystick_t joystick_state[MAX_JOYSTICKS]; -int joysticks_present = 0; +joystick_t joystick_state[MAX_JOYSTICKS]; +int joysticks_present = 0; XINPUT_STATE controllers[XINPUT_MAX_JOYSTICKS]; -void joystick_init() +void +joystick_init() { - int c; + int c; - atexit(joystick_close); + atexit(joystick_close); - joysticks_present = 0; + joysticks_present = 0; - memset(controllers, 0, sizeof(XINPUT_STATE) * XINPUT_MAX_JOYSTICKS); + memset(controllers, 0, sizeof(XINPUT_STATE) * XINPUT_MAX_JOYSTICKS); - for (c=0; c 127) ? 128 : 0; - plat_joystick_state[c].b[7] = (controllers[c].Gamepad.bRightTrigger > 127) ? 128 : 0; - plat_joystick_state[c].b[8] = (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_BACK) ? 128 : 0; - plat_joystick_state[c].b[9] = (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_START) ? 128 : 0; - plat_joystick_state[c].b[10] = (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_LEFT_THUMB) ? 128 : 0; - plat_joystick_state[c].b[11] = (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_RIGHT_THUMB) ? 128 : 0; + plat_joystick_state[c].b[0] = (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_A) ? 128 : 0; + plat_joystick_state[c].b[1] = (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_B) ? 128 : 0; + plat_joystick_state[c].b[2] = (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_X) ? 128 : 0; + plat_joystick_state[c].b[3] = (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_Y) ? 128 : 0; + plat_joystick_state[c].b[4] = (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_LEFT_SHOULDER) ? 128 : 0; + plat_joystick_state[c].b[5] = (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_RIGHT_SHOULDER) ? 128 : 0; + plat_joystick_state[c].b[6] = (controllers[c].Gamepad.bLeftTrigger > 127) ? 128 : 0; + plat_joystick_state[c].b[7] = (controllers[c].Gamepad.bRightTrigger > 127) ? 128 : 0; + plat_joystick_state[c].b[8] = (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_BACK) ? 128 : 0; + plat_joystick_state[c].b[9] = (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_START) ? 128 : 0; + plat_joystick_state[c].b[10] = (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_LEFT_THUMB) ? 128 : 0; + plat_joystick_state[c].b[11] = (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_RIGHT_THUMB) ? 128 : 0; - int dpad_x = 0, dpad_y = 0; - if (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_DPAD_UP) - dpad_y-=32767; - if (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_DPAD_DOWN) - dpad_y+=32767; - if (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_DPAD_LEFT) - dpad_x-=32767; - if (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_DPAD_RIGHT) - dpad_x+=32767; + int dpad_x = 0, dpad_y = 0; + if (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_DPAD_UP) + dpad_y -= 32767; + if (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_DPAD_DOWN) + dpad_y += 32767; + if (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_DPAD_LEFT) + dpad_x -= 32767; + if (controllers[c].Gamepad.wButtons & XINPUT_GAMEPAD_DPAD_RIGHT) + dpad_x += 32767; - plat_joystick_state[c].a[2] = dpad_x; - plat_joystick_state[c].a[5] = dpad_y; + plat_joystick_state[c].a[2] = dpad_x; + plat_joystick_state[c].a[5] = dpad_y; - for (int a=0; a<8; a++) { - if (plat_joystick_state[c].a[a] == -32768) - plat_joystick_state[c].a[a] = -32767; - if (plat_joystick_state[c].a[a] == 32768) - plat_joystick_state[c].a[a] = 32767; - } + for (int a = 0; a < 8; a++) { + if (plat_joystick_state[c].a[a] == -32768) + plat_joystick_state[c].a[a] = -32767; + if (plat_joystick_state[c].a[a] == 32768) + plat_joystick_state[c].a[a] = 32767; } + } } -static int joystick_get_axis(int joystick_nr, int mapping) +static int +joystick_get_axis(int joystick_nr, int mapping) { - if (mapping & POV_X) - { - int pov = plat_joystick_state[joystick_nr].p[mapping & 3]; + if (mapping & POV_X) { + int pov = plat_joystick_state[joystick_nr].p[mapping & 3]; - if (LOWORD(pov) == 0xFFFF) - return 0; - else - return sin((2*M_PI * (double)pov) / 36000.0) * 32767; - } - else if (mapping & POV_Y) - { - int pov = plat_joystick_state[joystick_nr].p[mapping & 3]; - - if (LOWORD(pov) == 0xFFFF) - return 0; - else - return -cos((2*M_PI * (double)pov) / 36000.0) * 32767; - } + if (LOWORD(pov) == 0xFFFF) + return 0; else - return plat_joystick_state[joystick_nr].a[plat_joystick_state[joystick_nr].axis[mapping].id]; + return sin((2 * M_PI * (double) pov) / 36000.0) * 32767; + } else if (mapping & POV_Y) { + int pov = plat_joystick_state[joystick_nr].p[mapping & 3]; + + if (LOWORD(pov) == 0xFFFF) + return 0; + else + return -cos((2 * M_PI * (double) pov) / 36000.0) * 32767; + } else + return plat_joystick_state[joystick_nr].a[plat_joystick_state[joystick_nr].axis[mapping].id]; } -void joystick_process(void) +void +joystick_process(void) { - int c, d; + int c, d; - if (!joystick_type) return; + if (!joystick_type) + return; - joystick_poll(); + joystick_poll(); - for (c = 0; c < joystick_get_max_joysticks(joystick_type); c++) - { - if (joystick_state[c].plat_joystick_nr) - { - int joystick_nr = joystick_state[c].plat_joystick_nr - 1; + for (c = 0; c < joystick_get_max_joysticks(joystick_type); c++) { + if (joystick_state[c].plat_joystick_nr) { + int joystick_nr = joystick_state[c].plat_joystick_nr - 1; - for (d = 0; d < joystick_get_axis_count(joystick_type); d++) - joystick_state[c].axis[d] = joystick_get_axis(joystick_nr, joystick_state[c].axis_mapping[d]); - for (d = 0; d < joystick_get_button_count(joystick_type); d++) - joystick_state[c].button[d] = plat_joystick_state[joystick_nr].b[joystick_state[c].button_mapping[d]]; + for (d = 0; d < joystick_get_axis_count(joystick_type); d++) + joystick_state[c].axis[d] = joystick_get_axis(joystick_nr, joystick_state[c].axis_mapping[d]); + for (d = 0; d < joystick_get_button_count(joystick_type); d++) + joystick_state[c].button[d] = plat_joystick_state[joystick_nr].b[joystick_state[c].button_mapping[d]]; - for (d = 0; d < joystick_get_pov_count(joystick_type); d++) - { - int x, y; - double angle, magnitude; + for (d = 0; d < joystick_get_pov_count(joystick_type); d++) { + int x, y; + double angle, magnitude; - x = joystick_get_axis(joystick_nr, joystick_state[c].pov_mapping[d][0]); - y = joystick_get_axis(joystick_nr, joystick_state[c].pov_mapping[d][1]); + x = joystick_get_axis(joystick_nr, joystick_state[c].pov_mapping[d][0]); + y = joystick_get_axis(joystick_nr, joystick_state[c].pov_mapping[d][1]); - angle = (atan2((double)y, (double)x) * 360.0) / (2*M_PI); - magnitude = sqrt((double)x*(double)x + (double)y*(double)y); + angle = (atan2((double) y, (double) x) * 360.0) / (2 * M_PI); + magnitude = sqrt((double) x * (double) x + (double) y * (double) y); - if (magnitude < 16384) - joystick_state[c].pov[d] = -1; - else - joystick_state[c].pov[d] = ((int)angle + 90 + 360) % 360; - } - } + if (magnitude < 16384) + joystick_state[c].pov[d] = -1; else - { - for (d = 0; d < joystick_get_axis_count(joystick_type); d++) - joystick_state[c].axis[d] = 0; - for (d = 0; d < joystick_get_button_count(joystick_type); d++) - joystick_state[c].button[d] = 0; - for (d = 0; d < joystick_get_pov_count(joystick_type); d++) - joystick_state[c].pov[d] = -1; - } + joystick_state[c].pov[d] = ((int) angle + 90 + 360) % 360; + } + } else { + for (d = 0; d < joystick_get_axis_count(joystick_type); d++) + joystick_state[c].axis[d] = 0; + for (d = 0; d < joystick_get_button_count(joystick_type); d++) + joystick_state[c].button[d] = 0; + for (d = 0; d < joystick_get_pov_count(joystick_type); d++) + joystick_state[c].pov[d] = -1; } + } } -void win_joystick_handle(PRAWINPUT raw) {} +void +win_joystick_handle(PRAWINPUT raw) +{ +} diff --git a/src/win/win_jsconf.c b/src/win/win_jsconf.c index 8afabe754..fe1967082 100644 --- a/src/win/win_jsconf.c +++ b/src/win/win_jsconf.c @@ -14,151 +14,134 @@ #include <86box/plat.h> #include <86box/win.h> - static int joystick_nr; static int joystick_config_type; #define AXIS_STRINGS_MAX 3 -static char *axis_strings[AXIS_STRINGS_MAX] = {"X Axis", "Y Axis", "Z Axis"}; +static char *axis_strings[AXIS_STRINGS_MAX] = { "X Axis", "Y Axis", "Z Axis" }; static uint8_t joystickconfig_changed = 0; - -static void rebuild_axis_button_selections(HWND hdlg) +static void +rebuild_axis_button_selections(HWND hdlg) { - int id = IDC_CONFIG_BASE + 2; - HWND h; - int joystick; - int c, d; - char s[269]; + int id = IDC_CONFIG_BASE + 2; + HWND h; + int joystick; + int c, d; + char s[269]; - h = GetDlgItem(hdlg, IDC_CONFIG_BASE); - joystick = SendMessage(h, CB_GETCURSEL, 0, 0); + h = GetDlgItem(hdlg, IDC_CONFIG_BASE); + joystick = SendMessage(h, CB_GETCURSEL, 0, 0); - for (c = 0; c < joystick_get_axis_count(joystick_config_type); c++) - { - int sel = c; + for (c = 0; c < joystick_get_axis_count(joystick_config_type); c++) { + int sel = c; - h = GetDlgItem(hdlg, id); - SendMessage(h, CB_RESETCONTENT, 0, 0); + h = GetDlgItem(hdlg, id); + SendMessage(h, CB_RESETCONTENT, 0, 0); - if (joystick) - { - for (d = 0; d < plat_joystick_state[joystick-1].nr_axes; d++) - { - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)plat_joystick_state[joystick-1].axis[d].name); - if (c < AXIS_STRINGS_MAX) - { - if (!stricmp(axis_strings[c], plat_joystick_state[joystick-1].axis[d].name)) - sel = d; - } - } - for (d = 0; d < plat_joystick_state[joystick-1].nr_povs; d++) - { - sprintf(s, "%s (X axis)", plat_joystick_state[joystick-1].pov[d].name); - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)s); - sprintf(s, "%s (Y axis)", plat_joystick_state[joystick-1].pov[d].name); - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)s); - } - for (d = 0; d < plat_joystick_state[joystick - 1].nr_sliders; d++) - { - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)plat_joystick_state[joystick - 1].slider[d].name); - } - SendMessage(h, CB_SETCURSEL, sel, 0); - EnableWindow(h, TRUE); + if (joystick) { + for (d = 0; d < plat_joystick_state[joystick - 1].nr_axes; d++) { + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) plat_joystick_state[joystick - 1].axis[d].name); + if (c < AXIS_STRINGS_MAX) { + if (!stricmp(axis_strings[c], plat_joystick_state[joystick - 1].axis[d].name)) + sel = d; } - else - EnableWindow(h, FALSE); + } + for (d = 0; d < plat_joystick_state[joystick - 1].nr_povs; d++) { + sprintf(s, "%s (X axis)", plat_joystick_state[joystick - 1].pov[d].name); + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) s); + sprintf(s, "%s (Y axis)", plat_joystick_state[joystick - 1].pov[d].name); + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) s); + } + for (d = 0; d < plat_joystick_state[joystick - 1].nr_sliders; d++) { + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) plat_joystick_state[joystick - 1].slider[d].name); + } + SendMessage(h, CB_SETCURSEL, sel, 0); + EnableWindow(h, TRUE); + } else + EnableWindow(h, FALSE); - id += 2; - } + id += 2; + } - for (c = 0; c < joystick_get_button_count(joystick_config_type); c++) - { - h = GetDlgItem(hdlg, id); - SendMessage(h, CB_RESETCONTENT, 0, 0); + for (c = 0; c < joystick_get_button_count(joystick_config_type); c++) { + h = GetDlgItem(hdlg, id); + SendMessage(h, CB_RESETCONTENT, 0, 0); - if (joystick) - { - for (d = 0; d < plat_joystick_state[joystick-1].nr_buttons; d++) - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)plat_joystick_state[joystick-1].button[d].name); - SendMessage(h, CB_SETCURSEL, c, 0); - EnableWindow(h, TRUE); - } - else - EnableWindow(h, FALSE); + if (joystick) { + for (d = 0; d < plat_joystick_state[joystick - 1].nr_buttons; d++) + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) plat_joystick_state[joystick - 1].button[d].name); + SendMessage(h, CB_SETCURSEL, c, 0); + EnableWindow(h, TRUE); + } else + EnableWindow(h, FALSE); - id += 2; - } + id += 2; + } - for (c = 0; c < joystick_get_pov_count(joystick_config_type)*2; c++) - { - int sel = c; + for (c = 0; c < joystick_get_pov_count(joystick_config_type) * 2; c++) { + int sel = c; - h = GetDlgItem(hdlg, id); - SendMessage(h, CB_RESETCONTENT, 0, 0); + h = GetDlgItem(hdlg, id); + SendMessage(h, CB_RESETCONTENT, 0, 0); - if (joystick) - { - for (d = 0; d < plat_joystick_state[joystick-1].nr_povs; d++) - { - sprintf(s, "%s (X axis)", plat_joystick_state[joystick-1].pov[d].name); - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)s); - sprintf(s, "%s (Y axis)", plat_joystick_state[joystick-1].pov[d].name); - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)s); - } - for (d = 0; d < plat_joystick_state[joystick-1].nr_axes; d++) - { - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)plat_joystick_state[joystick-1].axis[d].name); - } - SendMessage(h, CB_SETCURSEL, sel, 0); - EnableWindow(h, TRUE); - } - else - EnableWindow(h, FALSE); - - id += 2; - } + if (joystick) { + for (d = 0; d < plat_joystick_state[joystick - 1].nr_povs; d++) { + sprintf(s, "%s (X axis)", plat_joystick_state[joystick - 1].pov[d].name); + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) s); + sprintf(s, "%s (Y axis)", plat_joystick_state[joystick - 1].pov[d].name); + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) s); + } + for (d = 0; d < plat_joystick_state[joystick - 1].nr_axes; d++) { + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) plat_joystick_state[joystick - 1].axis[d].name); + } + SendMessage(h, CB_SETCURSEL, sel, 0); + EnableWindow(h, TRUE); + } else + EnableWindow(h, FALSE); + id += 2; + } } -static int get_axis(HWND hdlg, int id) +static int +get_axis(HWND hdlg, int id) { - HWND h = GetDlgItem(hdlg, id); - int axis_sel = SendMessage(h, CB_GETCURSEL, 0, 0); - int nr_axes = plat_joystick_state[joystick_state[joystick_nr].plat_joystick_nr-1].nr_axes; - int nr_povs = plat_joystick_state[joystick_state[joystick_nr].plat_joystick_nr - 1].nr_povs; + HWND h = GetDlgItem(hdlg, id); + int axis_sel = SendMessage(h, CB_GETCURSEL, 0, 0); + int nr_axes = plat_joystick_state[joystick_state[joystick_nr].plat_joystick_nr - 1].nr_axes; + int nr_povs = plat_joystick_state[joystick_state[joystick_nr].plat_joystick_nr - 1].nr_povs; - if (axis_sel < nr_axes) - return axis_sel; + if (axis_sel < nr_axes) + return axis_sel; - axis_sel -= nr_axes; - if (axis_sel < nr_povs * 2) - { - if (axis_sel & 1) - return POV_Y | (axis_sel >> 1); - else - return POV_X | (axis_sel >> 1); - } - axis_sel -= nr_povs; + axis_sel -= nr_axes; + if (axis_sel < nr_povs * 2) { + if (axis_sel & 1) + return POV_Y | (axis_sel >> 1); + else + return POV_X | (axis_sel >> 1); + } + axis_sel -= nr_povs; - return SLIDER | (axis_sel >> 1); + return SLIDER | (axis_sel >> 1); } -static int get_pov(HWND hdlg, int id) +static int +get_pov(HWND hdlg, int id) { - HWND h = GetDlgItem(hdlg, id); - int axis_sel = SendMessage(h, CB_GETCURSEL, 0, 0); - int nr_povs = plat_joystick_state[joystick_state[joystick_nr].plat_joystick_nr-1].nr_povs*2; + HWND h = GetDlgItem(hdlg, id); + int axis_sel = SendMessage(h, CB_GETCURSEL, 0, 0); + int nr_povs = plat_joystick_state[joystick_state[joystick_nr].plat_joystick_nr - 1].nr_povs * 2; - if (axis_sel < nr_povs) - { - if (axis_sel & 1) - return POV_Y | (axis_sel >> 1); - else - return POV_X | (axis_sel >> 1); - } + if (axis_sel < nr_povs) { + if (axis_sel & 1) + return POV_Y | (axis_sel >> 1); + else + return POV_X | (axis_sel >> 1); + } - return axis_sel - nr_povs; + return axis_sel - nr_povs; } #if defined(__amd64__) || defined(__aarch64__) @@ -168,175 +151,210 @@ static BOOL CALLBACK #endif joystickconfig_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { - HWND h; - int c; - int id; - int joystick; - int nr_axes; - int nr_povs; - int mapping; + HWND h; + int c; + int id; + int joystick; + int nr_axes; + int nr_povs; + int mapping; - switch (message) - { - case WM_INITDIALOG: - { - h = GetDlgItem(hdlg, IDC_CONFIG_BASE); - id = IDC_CONFIG_BASE + 2; - joystick = joystick_state[joystick_nr].plat_joystick_nr; + switch (message) { + case WM_INITDIALOG: + { + h = GetDlgItem(hdlg, IDC_CONFIG_BASE); + id = IDC_CONFIG_BASE + 2; + joystick = joystick_state[joystick_nr].plat_joystick_nr; - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)"None"); + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) "None"); - for (c = 0; c < joysticks_present; c++) - SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)plat_joystick_state[c].name); + for (c = 0; c < joysticks_present; c++) + SendMessage(h, CB_ADDSTRING, 0, (LPARAM) (LPCSTR) plat_joystick_state[c].name); - SendMessage(h, CB_SETCURSEL, joystick, 0); + SendMessage(h, CB_SETCURSEL, joystick, 0); + rebuild_axis_button_selections(hdlg); + + if (joystick_state[joystick_nr].plat_joystick_nr) { + nr_axes = plat_joystick_state[joystick - 1].nr_axes; + nr_povs = plat_joystick_state[joystick - 1].nr_povs; + + for (c = 0; c < joystick_get_axis_count(joystick_config_type); c++) { + int mapping = joystick_state[joystick_nr].axis_mapping[c]; + + h = GetDlgItem(hdlg, id); + if (mapping & POV_X) + SendMessage(h, CB_SETCURSEL, nr_axes + (mapping & 3) * 2, 0); + else if (mapping & POV_Y) + SendMessage(h, CB_SETCURSEL, nr_axes + (mapping & 3) * 2 + 1, 0); + else if (mapping & SLIDER) + SendMessage(h, CB_SETCURSEL, nr_axes + nr_povs * 2 + (mapping & 3), 0); + else + SendMessage(h, CB_SETCURSEL, mapping, 0); + id += 2; + } + for (c = 0; c < joystick_get_button_count(joystick_config_type); c++) { + h = GetDlgItem(hdlg, id); + SendMessage(h, CB_SETCURSEL, joystick_state[joystick_nr].button_mapping[c], 0); + id += 2; + } + for (c = 0; c < joystick_get_pov_count(joystick_config_type); c++) { + h = GetDlgItem(hdlg, id); + mapping = joystick_state[joystick_nr].pov_mapping[c][0]; + if (mapping & POV_X) + SendMessage(h, CB_SETCURSEL, (mapping & 3) * 2, 0); + else if (mapping & POV_Y) + SendMessage(h, CB_SETCURSEL, (mapping & 3) * 2 + 1, 0); + else + SendMessage(h, CB_SETCURSEL, mapping + nr_povs * 2, 0); + id += 2; + h = GetDlgItem(hdlg, id); + mapping = joystick_state[joystick_nr].pov_mapping[c][1]; + if (mapping & POV_X) + SendMessage(h, CB_SETCURSEL, (mapping & 3) * 2, 0); + else if (mapping & POV_Y) + SendMessage(h, CB_SETCURSEL, (mapping & 3) * 2 + 1, 0); + else + SendMessage(h, CB_SETCURSEL, mapping + nr_povs * 2, 0); + id += 2; + } + } + } + return TRUE; + + case WM_COMMAND: + switch (LOWORD(wParam)) { + case IDC_CONFIG_BASE: + if (HIWORD(wParam) == CBN_SELCHANGE) rebuild_axis_button_selections(hdlg); + break; - if (joystick_state[joystick_nr].plat_joystick_nr) - { - nr_axes = plat_joystick_state[joystick-1].nr_axes; - nr_povs = plat_joystick_state[joystick-1].nr_povs; + case IDOK: + { + id = IDC_CONFIG_BASE + 2; - for (c = 0; c < joystick_get_axis_count(joystick_config_type); c++) - { - int mapping = joystick_state[joystick_nr].axis_mapping[c]; + h = GetDlgItem(hdlg, IDC_CONFIG_BASE); + joystick_state[joystick_nr].plat_joystick_nr = SendMessage(h, CB_GETCURSEL, 0, 0); - h = GetDlgItem(hdlg, id); - if (mapping & POV_X) - SendMessage(h, CB_SETCURSEL, nr_axes + (mapping & 3)*2, 0); - else if (mapping & POV_Y) - SendMessage(h, CB_SETCURSEL, nr_axes + (mapping & 3)*2 + 1, 0); - else if (mapping & SLIDER) - SendMessage(h, CB_SETCURSEL, nr_axes + nr_povs * 2 + (mapping & 3), 0); - else - SendMessage(h, CB_SETCURSEL, mapping, 0); - id += 2; - } - for (c = 0; c < joystick_get_button_count(joystick_config_type); c++) - { - h = GetDlgItem(hdlg, id); - SendMessage(h, CB_SETCURSEL, joystick_state[joystick_nr].button_mapping[c], 0); - id += 2; - } - for (c = 0; c < joystick_get_pov_count(joystick_config_type); c++) - { - h = GetDlgItem(hdlg, id); - mapping = joystick_state[joystick_nr].pov_mapping[c][0]; - if (mapping & POV_X) - SendMessage(h, CB_SETCURSEL, (mapping & 3)*2, 0); - else if (mapping & POV_Y) - SendMessage(h, CB_SETCURSEL, (mapping & 3)*2 + 1, 0); - else - SendMessage(h, CB_SETCURSEL, mapping + nr_povs*2, 0); - id += 2; - h = GetDlgItem(hdlg, id); - mapping = joystick_state[joystick_nr].pov_mapping[c][1]; - if (mapping & POV_X) - SendMessage(h, CB_SETCURSEL, (mapping & 3)*2, 0); - else if (mapping & POV_Y) - SendMessage(h, CB_SETCURSEL, (mapping & 3)*2 + 1, 0); - else - SendMessage(h, CB_SETCURSEL, mapping + nr_povs*2, 0); - id += 2; - } + if (joystick_state[joystick_nr].plat_joystick_nr) { + for (c = 0; c < joystick_get_axis_count(joystick_config_type); c++) { + joystick_state[joystick_nr].axis_mapping[c] = get_axis(hdlg, id); + id += 2; + } + for (c = 0; c < joystick_get_button_count(joystick_config_type); c++) { + h = GetDlgItem(hdlg, id); + joystick_state[joystick_nr].button_mapping[c] = SendMessage(h, CB_GETCURSEL, 0, 0); + id += 2; + } + for (c = 0; c < joystick_get_button_count(joystick_config_type); c++) { + h = GetDlgItem(hdlg, id); + joystick_state[joystick_nr].pov_mapping[c][0] = get_pov(hdlg, id); + id += 2; + h = GetDlgItem(hdlg, id); + joystick_state[joystick_nr].pov_mapping[c][1] = get_pov(hdlg, id); + id += 2; + } } - } - return TRUE; - - case WM_COMMAND: - switch (LOWORD(wParam)) - { - case IDC_CONFIG_BASE: - if (HIWORD(wParam) == CBN_SELCHANGE) - rebuild_axis_button_selections(hdlg); - break; - - case IDOK: - { - id = IDC_CONFIG_BASE + 2; - - h = GetDlgItem(hdlg, IDC_CONFIG_BASE); - joystick_state[joystick_nr].plat_joystick_nr = SendMessage(h, CB_GETCURSEL, 0, 0); - - if (joystick_state[joystick_nr].plat_joystick_nr) - { - for (c = 0; c < joystick_get_axis_count(joystick_config_type); c++) - { - joystick_state[joystick_nr].axis_mapping[c] = get_axis(hdlg, id); - id += 2; - } - for (c = 0; c < joystick_get_button_count(joystick_config_type); c++) - { - h = GetDlgItem(hdlg, id); - joystick_state[joystick_nr].button_mapping[c] = SendMessage(h, CB_GETCURSEL, 0, 0); - id += 2; - } - for (c = 0; c < joystick_get_button_count(joystick_config_type); c++) - { - h = GetDlgItem(hdlg, id); - joystick_state[joystick_nr].pov_mapping[c][0] = get_pov(hdlg, id); - id += 2; - h = GetDlgItem(hdlg, id); - joystick_state[joystick_nr].pov_mapping[c][1] = get_pov(hdlg, id); - id += 2; - } - } - } - joystickconfig_changed = 1; - EndDialog(hdlg, 0); - return TRUE; - case IDCANCEL: - joystickconfig_changed = 0; - EndDialog(hdlg, 0); - return TRUE; - } - break; - } - return FALSE; + } + joystickconfig_changed = 1; + EndDialog(hdlg, 0); + return TRUE; + case IDCANCEL: + joystickconfig_changed = 0; + EndDialog(hdlg, 0); + return TRUE; + } + break; + } + return FALSE; } -uint8_t joystickconfig_open(HWND hwnd, int joy_nr, int type) +uint8_t +joystickconfig_open(HWND hwnd, int joy_nr, int type) { - uint16_t *data_block = malloc(16384); - uint16_t *data; - DLGTEMPLATE *dlg = (DLGTEMPLATE *)data_block; - DLGITEMTEMPLATE *item; - int y = 10; - int id = IDC_CONFIG_BASE; - int c; - char s[269]; + uint16_t *data_block = malloc(16384); + uint16_t *data; + DLGTEMPLATE *dlg = (DLGTEMPLATE *) data_block; + DLGITEMTEMPLATE *item; + int y = 10; + int id = IDC_CONFIG_BASE; + int c; + char s[269]; - joystickconfig_changed = 0; + joystickconfig_changed = 0; - joystick_nr = joy_nr; - joystick_config_type = type; + joystick_nr = joy_nr; + joystick_config_type = type; - memset(data_block, 0, 4096); + memset(data_block, 0, 4096); - dlg->style = DS_SETFONT | DS_MODALFRAME | DS_FIXEDSYS | WS_POPUP | WS_CAPTION | WS_SYSMENU; - dlg->x = 10; - dlg->y = 10; - dlg->cx = 220; - dlg->cy = 70; + dlg->style = DS_SETFONT | DS_MODALFRAME | DS_FIXEDSYS | WS_POPUP | WS_CAPTION | WS_SYSMENU; + dlg->x = 10; + dlg->y = 10; + dlg->cx = 220; + dlg->cy = 70; - data = (uint16_t *)(dlg + 1); + data = (uint16_t *) (dlg + 1); - *data++ = 0; /*no menu*/ - *data++ = 0; /*predefined dialog box class*/ - data += MultiByteToWideChar(CP_ACP, 0, "Joystick Configuration", -1, data, 50); + *data++ = 0; /*no menu*/ + *data++ = 0; /*predefined dialog box class*/ + data += MultiByteToWideChar(CP_ACP, 0, "Joystick Configuration", -1, data, 50); - *data++ = 9; /*Point*/ - data += MultiByteToWideChar(CP_ACP, 0, "Segoe UI", -1, data, 50); + *data++ = 9; /*Point*/ + data += MultiByteToWideChar(CP_ACP, 0, "Segoe UI", -1, data, 50); - if (((uintptr_t)data) & 2) - data++; + if (((uintptr_t) data) & 2) + data++; + /*Combo box*/ + item = (DLGITEMTEMPLATE *) data; + item->x = 70; + item->y = y; + item->id = id++; + item->cx = 140; + item->cy = 150; + + item->style = WS_CHILD | WS_VISIBLE | CBS_DROPDOWNLIST | WS_VSCROLL; + + data = (uint16_t *) (item + 1); + *data++ = 0xFFFF; + *data++ = 0x0085; /* combo box class */ + + data += MultiByteToWideChar(CP_ACP, 0, "Device", -1, data, 256); + *data++ = 0; /* no creation data */ + + if (((uintptr_t) data) & 2) + data++; + + /*Static text*/ + item = (DLGITEMTEMPLATE *) data; + item->x = 10; + item->y = y + 2; + item->id = id++; + + item->cx = 60; + item->cy = 15; + + item->style = WS_CHILD | WS_VISIBLE; + + data = (uint16_t *) (item + 1); + *data++ = 0xFFFF; + *data++ = 0x0082; /* static class */ + + data += MultiByteToWideChar(CP_ACP, 0, "Device", -1, data, 256); + *data++ = 0; /* no creation data */ + + if (((uintptr_t) data) & 2) + data++; + + y += 20; + + for (c = 0; c < joystick_get_axis_count(type); c++) { /*Combo box*/ - item = (DLGITEMTEMPLATE *)data; - item->x = 70; - item->y = y; + item = (DLGITEMTEMPLATE *) data; + item->x = 70; + item->y = y; item->id = id++; item->cx = 140; @@ -344,20 +362,20 @@ uint8_t joystickconfig_open(HWND hwnd, int joy_nr, int type) item->style = WS_CHILD | WS_VISIBLE | CBS_DROPDOWNLIST | WS_VSCROLL; - data = (uint16_t *)(item + 1); + data = (uint16_t *) (item + 1); *data++ = 0xFFFF; - *data++ = 0x0085; /* combo box class */ + *data++ = 0x0085; /* combo box class */ - data += MultiByteToWideChar(CP_ACP, 0, "Device", -1, data, 256); - *data++ = 0; /* no creation data */ + data += MultiByteToWideChar(CP_ACP, 0, joystick_get_axis_name(type, c), -1, data, 256); + *data++ = 0; /* no creation data */ - if (((uintptr_t)data) & 2) - data++; + if (((uintptr_t) data) & 2) + data++; /*Static text*/ - item = (DLGITEMTEMPLATE *)data; - item->x = 10; - item->y = y + 2; + item = (DLGITEMTEMPLATE *) data; + item->x = 10; + item->y = y + 2; item->id = id++; item->cx = 60; @@ -365,204 +383,155 @@ uint8_t joystickconfig_open(HWND hwnd, int joy_nr, int type) item->style = WS_CHILD | WS_VISIBLE; - data = (uint16_t *)(item + 1); + data = (uint16_t *) (item + 1); *data++ = 0xFFFF; - *data++ = 0x0082; /* static class */ + *data++ = 0x0082; /* static class */ - data += MultiByteToWideChar(CP_ACP, 0, "Device", -1, data, 256); - *data++ = 0; /* no creation data */ + data += MultiByteToWideChar(CP_ACP, 0, joystick_get_axis_name(type, c), -1, data, 256); + *data++ = 0; /* no creation data */ - if (((uintptr_t)data) & 2) - data++; + if (((uintptr_t) data) & 2) + data++; y += 20; + } + for (c = 0; c < joystick_get_button_count(type); c++) { + /*Combo box*/ + item = (DLGITEMTEMPLATE *) data; + item->x = 70; + item->y = y; + item->id = id++; - for (c = 0; c < joystick_get_axis_count(type); c++) - { - /*Combo box*/ - item = (DLGITEMTEMPLATE *)data; - item->x = 70; - item->y = y; - item->id = id++; + item->cx = 140; + item->cy = 150; - item->cx = 140; - item->cy = 150; + item->style = WS_CHILD | WS_VISIBLE | CBS_DROPDOWNLIST | WS_VSCROLL; - item->style = WS_CHILD | WS_VISIBLE | CBS_DROPDOWNLIST | WS_VSCROLL; - - data = (uint16_t *)(item + 1); - *data++ = 0xFFFF; - *data++ = 0x0085; /* combo box class */ - - data += MultiByteToWideChar(CP_ACP, 0, joystick_get_axis_name(type, c), -1, data, 256); - *data++ = 0; /* no creation data */ - - if (((uintptr_t)data) & 2) - data++; - - /*Static text*/ - item = (DLGITEMTEMPLATE *)data; - item->x = 10; - item->y = y + 2; - item->id = id++; - - item->cx = 60; - item->cy = 15; - - item->style = WS_CHILD | WS_VISIBLE; - - data = (uint16_t *)(item + 1); - *data++ = 0xFFFF; - *data++ = 0x0082; /* static class */ - - data += MultiByteToWideChar(CP_ACP, 0, joystick_get_axis_name(type, c), -1, data, 256); - *data++ = 0; /* no creation data */ - - if (((uintptr_t)data) & 2) - data++; - - y += 20; - } - - for (c = 0; c < joystick_get_button_count(type); c++) - { - /*Combo box*/ - item = (DLGITEMTEMPLATE *)data; - item->x = 70; - item->y = y; - item->id = id++; - - item->cx = 140; - item->cy = 150; - - item->style = WS_CHILD | WS_VISIBLE | CBS_DROPDOWNLIST | WS_VSCROLL; - - data = (uint16_t *)(item + 1); - *data++ = 0xFFFF; - *data++ = 0x0085; /* combo box class */ - - data += MultiByteToWideChar(CP_ACP, 0, joystick_get_button_name(type, c), -1, data, 256); - *data++ = 0; /* no creation data */ - - if (((uintptr_t)data) & 2) - data++; - - /*Static text*/ - item = (DLGITEMTEMPLATE *)data; - item->x = 10; - item->y = y + 2; - item->id = id++; - - item->cx = 60; - item->cy = 15; - - item->style = WS_CHILD | WS_VISIBLE; - - data = (uint16_t *)(item + 1); - *data++ = 0xFFFF; - *data++ = 0x0082; /* static class */ - - data += MultiByteToWideChar(CP_ACP, 0, joystick_get_button_name(type, c), -1, data, 256); - *data++ = 0; /* no creation data */ - - if (((uintptr_t)data) & 2) - data++; - - y += 20; - } - - for (c = 0; c < joystick_get_pov_count(type)*2; c++) - { - /*Combo box*/ - item = (DLGITEMTEMPLATE *)data; - item->x = 70; - item->y = y; - item->id = id++; - - item->cx = 140; - item->cy = 150; - - item->style = WS_CHILD | WS_VISIBLE | CBS_DROPDOWNLIST | WS_VSCROLL; - - data = (uint16_t *)(item + 1); - *data++ = 0xFFFF; - *data++ = 0x0085; /* combo box class */ - - if (c & 1) - sprintf(s, "%s (Y axis)", joystick_get_pov_name(type, c/2)); - else - sprintf(s, "%s (X axis)", joystick_get_pov_name(type, c/2)); - data += MultiByteToWideChar(CP_ACP, 0, s, -1, data, 256); - *data++ = 0; /* no creation data */ - - if (((uintptr_t)data) & 2) - data++; - - /*Static text*/ - item = (DLGITEMTEMPLATE *)data; - item->x = 10; - item->y = y + 2; - item->id = id++; - - item->cx = 60; - item->cy = 15; - - item->style = WS_CHILD | WS_VISIBLE; - - data = (uint16_t *)(item + 1); - *data++ = 0xFFFF; - *data++ = 0x0082; /* static class */ - - data += MultiByteToWideChar(CP_ACP, 0, s, -1, data, 256); - *data++ = 0; /* no creation data */ - - if (((uintptr_t)data) & 2) - data++; - - y += 20; - } - - dlg->cdit = (id - IDC_CONFIG_BASE) + 2; - - item = (DLGITEMTEMPLATE *)data; - item->x = 100; - item->y = y + 5; - item->cx = 50; - item->cy = 14; - item->id = IDOK; /* OK button identifier */ - item->style = WS_CHILD | WS_VISIBLE | BS_DEFPUSHBUTTON; - - data = (uint16_t *)(item + 1); + data = (uint16_t *) (item + 1); *data++ = 0xFFFF; - *data++ = 0x0080; /* button class */ + *data++ = 0x0085; /* combo box class */ - data += MultiByteToWideChar(CP_ACP, 0, "OK", -1, data, 50); - *data++ = 0; /* no creation data */ + data += MultiByteToWideChar(CP_ACP, 0, joystick_get_button_name(type, c), -1, data, 256); + *data++ = 0; /* no creation data */ - if (((uintptr_t)data) & 2) - data++; + if (((uintptr_t) data) & 2) + data++; + + /*Static text*/ + item = (DLGITEMTEMPLATE *) data; + item->x = 10; + item->y = y + 2; + item->id = id++; + + item->cx = 60; + item->cy = 15; - item = (DLGITEMTEMPLATE *)data; - item->x = 160; - item->y = y + 5; - item->cx = 50; - item->cy = 14; - item->id = IDCANCEL; /* Cancel button identifier */ item->style = WS_CHILD | WS_VISIBLE; - data = (uint16_t *)(item + 1); + data = (uint16_t *) (item + 1); *data++ = 0xFFFF; - *data++ = 0x0080; /* button class */ + *data++ = 0x0082; /* static class */ - data += MultiByteToWideChar(CP_ACP, 0, "Cancel", -1, data, 50); - *data++ = 0; /* no creation data */ + data += MultiByteToWideChar(CP_ACP, 0, joystick_get_button_name(type, c), -1, data, 256); + *data++ = 0; /* no creation data */ - dlg->cy = y + 25; + if (((uintptr_t) data) & 2) + data++; - DialogBoxIndirect(hinstance, dlg, hwnd, joystickconfig_dlgproc); + y += 20; + } - free(data_block); + for (c = 0; c < joystick_get_pov_count(type) * 2; c++) { + /*Combo box*/ + item = (DLGITEMTEMPLATE *) data; + item->x = 70; + item->y = y; + item->id = id++; - return joystickconfig_changed; + item->cx = 140; + item->cy = 150; + + item->style = WS_CHILD | WS_VISIBLE | CBS_DROPDOWNLIST | WS_VSCROLL; + + data = (uint16_t *) (item + 1); + *data++ = 0xFFFF; + *data++ = 0x0085; /* combo box class */ + + if (c & 1) + sprintf(s, "%s (Y axis)", joystick_get_pov_name(type, c / 2)); + else + sprintf(s, "%s (X axis)", joystick_get_pov_name(type, c / 2)); + data += MultiByteToWideChar(CP_ACP, 0, s, -1, data, 256); + *data++ = 0; /* no creation data */ + + if (((uintptr_t) data) & 2) + data++; + + /*Static text*/ + item = (DLGITEMTEMPLATE *) data; + item->x = 10; + item->y = y + 2; + item->id = id++; + + item->cx = 60; + item->cy = 15; + + item->style = WS_CHILD | WS_VISIBLE; + + data = (uint16_t *) (item + 1); + *data++ = 0xFFFF; + *data++ = 0x0082; /* static class */ + + data += MultiByteToWideChar(CP_ACP, 0, s, -1, data, 256); + *data++ = 0; /* no creation data */ + + if (((uintptr_t) data) & 2) + data++; + + y += 20; + } + + dlg->cdit = (id - IDC_CONFIG_BASE) + 2; + + item = (DLGITEMTEMPLATE *) data; + item->x = 100; + item->y = y + 5; + item->cx = 50; + item->cy = 14; + item->id = IDOK; /* OK button identifier */ + item->style = WS_CHILD | WS_VISIBLE | BS_DEFPUSHBUTTON; + + data = (uint16_t *) (item + 1); + *data++ = 0xFFFF; + *data++ = 0x0080; /* button class */ + + data += MultiByteToWideChar(CP_ACP, 0, "OK", -1, data, 50); + *data++ = 0; /* no creation data */ + + if (((uintptr_t) data) & 2) + data++; + + item = (DLGITEMTEMPLATE *) data; + item->x = 160; + item->y = y + 5; + item->cx = 50; + item->cy = 14; + item->id = IDCANCEL; /* Cancel button identifier */ + item->style = WS_CHILD | WS_VISIBLE; + + data = (uint16_t *) (item + 1); + *data++ = 0xFFFF; + *data++ = 0x0080; /* button class */ + + data += MultiByteToWideChar(CP_ACP, 0, "Cancel", -1, data, 50); + *data++ = 0; /* no creation data */ + + dlg->cy = y + 25; + + DialogBoxIndirect(hinstance, dlg, hwnd, joystickconfig_dlgproc); + + free(data_block); + + return joystickconfig_changed; } diff --git a/src/win/win_keyboard.c b/src/win/win_keyboard.c index e60da87d4..ae31c3ff6 100644 --- a/src/win/win_keyboard.c +++ b/src/win/win_keyboard.c @@ -15,8 +15,8 @@ * Copyright 2016-2018 Miran Grca. */ #define UNICODE -#define _WIN32_WINNT 0x0501 -#define BITMAP WINDOWS_BITMAP +#define _WIN32_WINNT 0x0501 +#define BITMAP WINDOWS_BITMAP #include #include #undef BITMAP @@ -30,9 +30,7 @@ #include <86box/plat.h> #include <86box/win.h> - -static uint16_t scancode_map[768]; - +static uint16_t scancode_map[768]; /* This is so we can disambiguate scan codes that would otherwise conflict and get passed on incorrectly. */ @@ -40,34 +38,33 @@ static UINT16 convert_scan_code(UINT16 scan_code) { if ((scan_code & 0xff00) == 0xe000) - scan_code = (scan_code & 0xff) | 0x0100; + scan_code = (scan_code & 0xff) | 0x0100; if (scan_code == 0xE11D) - scan_code = 0x0100; + scan_code = 0x0100; /* E0 00 is sent by some USB keyboards for their special keys, as it is an invalid scan code (it has no untranslated set 2 equivalent), we mark it appropriately so it does not get passed through. */ else if ((scan_code > 0x01FF) || (scan_code == 0x0100)) - scan_code = 0xFFFF; + scan_code = 0xFFFF; return scan_code; } - void keyboard_getkeymap(void) { - WCHAR *keyName = L"SYSTEM\\CurrentControlSet\\Control\\Keyboard Layout"; - WCHAR *valueName = L"Scancode Map"; + WCHAR *keyName = L"SYSTEM\\CurrentControlSet\\Control\\Keyboard Layout"; + WCHAR *valueName = L"Scancode Map"; unsigned char buf[32768]; - DWORD bufSize; - HKEY hKey; - int j; - UINT32 *bufEx2; - int scMapCount; - UINT16 *bufEx; - int scancode_unmapped; - int scancode_mapped; + DWORD bufSize; + HKEY hKey; + int j; + UINT32 *bufEx2; + int scMapCount; + UINT16 *bufEx; + int scancode_unmapped; + int scancode_mapped; /* First, prepare the default scan code map list which is 1:1. * Remappings will be inserted directly into it. @@ -75,131 +72,124 @@ keyboard_getkeymap(void) * prefix. */ for (j = 0; j < 512; j++) - scancode_map[j] = j; + scancode_map[j] = j; /* Get the scan code remappings from: HKEY_LOCAL_MACHINE\SYSTEM\CurrentControlSet\Control\Keyboard Layout */ bufSize = 32768; if (RegOpenKeyEx(HKEY_LOCAL_MACHINE, keyName, 0, 1, &hKey) == ERROR_SUCCESS) { - if (RegQueryValueEx(hKey, valueName, NULL, NULL, buf, &bufSize) == ERROR_SUCCESS) { - bufEx2 = (UINT32 *) buf; - scMapCount = bufEx2[2]; - if ((bufSize != 0) && (scMapCount != 0)) { - bufEx = (UINT16 *) (buf + 12); - for (j = 0; j < scMapCount*2; j += 2) { - /* Each scan code is 32-bit: 16 bits of remapped scan code, - and 16 bits of original scan code. */ - scancode_unmapped = bufEx[j + 1]; - scancode_mapped = bufEx[j]; + if (RegQueryValueEx(hKey, valueName, NULL, NULL, buf, &bufSize) == ERROR_SUCCESS) { + bufEx2 = (UINT32 *) buf; + scMapCount = bufEx2[2]; + if ((bufSize != 0) && (scMapCount != 0)) { + bufEx = (UINT16 *) (buf + 12); + for (j = 0; j < scMapCount * 2; j += 2) { + /* Each scan code is 32-bit: 16 bits of remapped scan code, + and 16 bits of original scan code. */ + scancode_unmapped = bufEx[j + 1]; + scancode_mapped = bufEx[j]; - scancode_unmapped = convert_scan_code(scancode_unmapped); - scancode_mapped = convert_scan_code(scancode_mapped); + scancode_unmapped = convert_scan_code(scancode_unmapped); + scancode_mapped = convert_scan_code(scancode_mapped); - /* Ignore source scan codes with prefixes other than E1 - that are not E1 1D. */ - if (scancode_unmapped != 0xFFFF) - scancode_map[scancode_unmapped] = scancode_mapped; - } - } - } - RegCloseKey(hKey); + /* Ignore source scan codes with prefixes other than E1 + that are not E1 1D. */ + if (scancode_unmapped != 0xFFFF) + scancode_map[scancode_unmapped] = scancode_mapped; + } + } + } + RegCloseKey(hKey); } } - void keyboard_handle(PRAWINPUT raw) { - USHORT scancode; + USHORT scancode; static int recv_lalt = 0, recv_ralt = 0, recv_tab = 0; RAWKEYBOARD rawKB = raw->data.keyboard; - scancode = rawKB.MakeCode; + scancode = rawKB.MakeCode; if (kbd_req_capture && !mouse_capture && !video_fullscreen) - return; + return; /* If it's not a scan code that starts with 0xE1 */ if (!(rawKB.Flags & RI_KEY_E1)) { - if (rawKB.Flags & RI_KEY_E0) - scancode |= 0x100; + if (rawKB.Flags & RI_KEY_E0) + scancode |= 0x100; - /* Translate the scan code to 9-bit */ - scancode = convert_scan_code(scancode); + /* Translate the scan code to 9-bit */ + scancode = convert_scan_code(scancode); - /* Remap it according to the list from the Registry */ - if (scancode != scancode_map[scancode]) - pclog("Scan code remap: %03X -> %03X\n", scancode, scancode); - scancode = scancode_map[scancode]; + /* Remap it according to the list from the Registry */ + if (scancode != scancode_map[scancode]) + pclog("Scan code remap: %03X -> %03X\n", scancode, scancode); + scancode = scancode_map[scancode]; - /* If it's not 0xFFFF, send it to the emulated - keyboard. - We use scan code 0xFFFF to mean a mapping that - has a prefix other than E0 and that is not E1 1D, - which is, for our purposes, invalid. */ - if ((scancode == 0x00F) && - !(rawKB.Flags & RI_KEY_BREAK) && - (recv_lalt || recv_ralt) && - !mouse_capture) { - /* We received a TAB while ALT was pressed, while the mouse - is not captured, suppress the TAB and send an ALT key up. */ - if (recv_lalt) { - keyboard_input(0, 0x038); - /* Extra key press and release so the guest is not stuck in the - menu bar. */ - keyboard_input(1, 0x038); - keyboard_input(0, 0x038); - recv_lalt = 0; - } - if (recv_ralt) { - keyboard_input(0, 0x138); - /* Extra key press and release so the guest is not stuck in the - menu bar. */ - keyboard_input(1, 0x138); - keyboard_input(0, 0x138); - recv_ralt = 0; - } - } else if (((scancode == 0x038) || (scancode == 0x138)) && - !(rawKB.Flags & RI_KEY_BREAK) && - recv_tab && - !mouse_capture) { - /* We received an ALT while TAB was pressed, while the mouse - is not captured, suppress the ALT and send a TAB key up. */ - keyboard_input(0, 0x00F); - recv_tab = 0; - } else { - switch(scancode) { - case 0x00F: - recv_tab = !(rawKB.Flags & RI_KEY_BREAK); - break; - case 0x038: - recv_lalt = !(rawKB.Flags & RI_KEY_BREAK); - break; - case 0x138: - recv_ralt = !(rawKB.Flags & RI_KEY_BREAK); - break; - } + /* If it's not 0xFFFF, send it to the emulated + keyboard. + We use scan code 0xFFFF to mean a mapping that + has a prefix other than E0 and that is not E1 1D, + which is, for our purposes, invalid. */ + if ((scancode == 0x00F) && !(rawKB.Flags & RI_KEY_BREAK) && (recv_lalt || recv_ralt) && !mouse_capture) { + /* We received a TAB while ALT was pressed, while the mouse + is not captured, suppress the TAB and send an ALT key up. */ + if (recv_lalt) { + keyboard_input(0, 0x038); + /* Extra key press and release so the guest is not stuck in the + menu bar. */ + keyboard_input(1, 0x038); + keyboard_input(0, 0x038); + recv_lalt = 0; + } + if (recv_ralt) { + keyboard_input(0, 0x138); + /* Extra key press and release so the guest is not stuck in the + menu bar. */ + keyboard_input(1, 0x138); + keyboard_input(0, 0x138); + recv_ralt = 0; + } + } else if (((scancode == 0x038) || (scancode == 0x138)) && !(rawKB.Flags & RI_KEY_BREAK) && recv_tab && !mouse_capture) { + /* We received an ALT while TAB was pressed, while the mouse + is not captured, suppress the ALT and send a TAB key up. */ + keyboard_input(0, 0x00F); + recv_tab = 0; + } else { + switch (scancode) { + case 0x00F: + recv_tab = !(rawKB.Flags & RI_KEY_BREAK); + break; + case 0x038: + recv_lalt = !(rawKB.Flags & RI_KEY_BREAK); + break; + case 0x138: + recv_ralt = !(rawKB.Flags & RI_KEY_BREAK); + break; + } - /* Translate right CTRL to left ALT if the user has so - chosen. */ - if ((scancode == 0x11D) && rctrl_is_lalt) - scancode = 0x038; + /* Translate right CTRL to left ALT if the user has so + chosen. */ + if ((scancode == 0x11D) && rctrl_is_lalt) + scancode = 0x038; - /* Normal scan code pass through, pass it through as is if - it's not an invalid scan code. */ - if (scancode != 0xFFFF) - keyboard_input(!(rawKB.Flags & RI_KEY_BREAK), scancode); - } + /* Normal scan code pass through, pass it through as is if + it's not an invalid scan code. */ + if (scancode != 0xFFFF) + keyboard_input(!(rawKB.Flags & RI_KEY_BREAK), scancode); + } } else { - if (rawKB.MakeCode == 0x1D) { - scancode = scancode_map[0x100]; /* Translate E1 1D to 0x100 (which would - otherwise be E0 00 but that is invalid - anyway). - Also, take a potential mapping into - account. */ - } else - scancode = 0xFFFF; - if (scancode != 0xFFFF) - keyboard_input(!(rawKB.Flags & RI_KEY_BREAK), scancode); + if (rawKB.MakeCode == 0x1D) { + scancode = scancode_map[0x100]; /* Translate E1 1D to 0x100 (which would + otherwise be E0 00 but that is invalid + anyway). + Also, take a potential mapping into + account. */ + } else + scancode = 0xFFFF; + if (scancode != 0xFFFF) + keyboard_input(!(rawKB.Flags & RI_KEY_BREAK), scancode); } } diff --git a/src/win/win_media_menu.c b/src/win/win_media_menu.c index cf7974dd4..1a37e2ce4 100644 --- a/src/win/win_media_menu.c +++ b/src/win/win_media_menu.c @@ -24,22 +24,20 @@ #include <86box/zip.h> #include <86box/win.h> -#define MACHINE_HAS_IDE (machine_has_flags(machine, MACHINE_IDE_QUAD)) -#define MACHINE_HAS_SCSI (machine_has_flags(machine, MACHINE_SCSI_DUAL)) +#define MACHINE_HAS_IDE (machine_has_flags(machine, MACHINE_IDE_QUAD)) +#define MACHINE_HAS_SCSI (machine_has_flags(machine, MACHINE_SCSI_DUAL)) -#define CASSETTE_FIRST 0 -#define CARTRIDGE_FIRST CASSETTE_FIRST + 1 -#define FDD_FIRST CARTRIDGE_FIRST + 2 -#define CDROM_FIRST FDD_FIRST + FDD_NUM -#define ZIP_FIRST CDROM_FIRST + CDROM_NUM -#define MO_FIRST ZIP_FIRST + ZIP_NUM +#define CASSETTE_FIRST 0 +#define CARTRIDGE_FIRST CASSETTE_FIRST + 1 +#define FDD_FIRST CARTRIDGE_FIRST + 2 +#define CDROM_FIRST FDD_FIRST + FDD_NUM +#define ZIP_FIRST CDROM_FIRST + CDROM_NUM +#define MO_FIRST ZIP_FIRST + ZIP_NUM +static HMENU media_menu, stbar_menu; +static HMENU menus[1 + 2 + FDD_NUM + CDROM_NUM + ZIP_NUM + MO_NUM]; -static HMENU media_menu, stbar_menu; -static HMENU menus[1 + 2 + FDD_NUM + CDROM_NUM + ZIP_NUM + MO_NUM]; - -static char index_map[255]; - +static char index_map[255]; static void media_menu_set_ids(HMENU hMenu, int id) @@ -47,18 +45,16 @@ media_menu_set_ids(HMENU hMenu, int id) int c = GetMenuItemCount(hMenu); MENUITEMINFO mii = { 0 }; - mii.fMask = MIIM_ID; - mii.cbSize = sizeof(mii); + mii.fMask = MIIM_ID; + mii.cbSize = sizeof(mii); - for(int i = 0; i < c; i++) - { - GetMenuItemInfo(hMenu, i, TRUE, &mii); - mii.wID |= id; - SetMenuItemInfo(hMenu, i, TRUE, &mii); + for (int i = 0; i < c; i++) { + GetMenuItemInfo(hMenu, i, TRUE, &mii); + mii.wID |= id; + SetMenuItemInfo(hMenu, i, TRUE, &mii); } } - /* Loads the submenu from resource by name */ static HMENU media_menu_load_resource(wchar_t *lpName) @@ -69,300 +65,287 @@ media_menu_load_resource(wchar_t *lpName) HMENU actual = GetSubMenu(loaded, 0); /* Now that we have our submenu, we can destroy the parent menu */ - RemoveMenu(loaded, (UINT_PTR)actual, MF_BYCOMMAND); + RemoveMenu(loaded, (UINT_PTR) actual, MF_BYCOMMAND); DestroyMenu(loaded); return actual; } - static void media_menu_set_name_cassette(void) { - wchar_t name[512], fn[512]; + wchar_t name[512], fn[512]; MENUITEMINFO mii = { 0 }; if (strlen(cassette_fname) == 0) - _swprintf(name, plat_get_string(IDS_2148), plat_get_string(IDS_2057)); + _swprintf(name, plat_get_string(IDS_2148), plat_get_string(IDS_2057)); else { - mbstoc16s(fn, cassette_fname, sizeof_w(fn)); - _swprintf(name, plat_get_string(IDS_2148), fn); + mbstoc16s(fn, cassette_fname, sizeof_w(fn)); + _swprintf(name, plat_get_string(IDS_2148), fn); } - mii.cbSize = sizeof(mii); - mii.fMask = MIIM_STRING; + mii.cbSize = sizeof(mii); + mii.fMask = MIIM_STRING; mii.dwTypeData = name; - SetMenuItemInfo(media_menu, (UINT_PTR)menus[CASSETTE_FIRST], FALSE, &mii); + SetMenuItemInfo(media_menu, (UINT_PTR) menus[CASSETTE_FIRST], FALSE, &mii); } - static void media_menu_set_name_cartridge(int drive) { - wchar_t name[512], fn[512]; + wchar_t name[512], fn[512]; MENUITEMINFO mii = { 0 }; if (strlen(cart_fns[drive]) == 0) { - _swprintf(name, plat_get_string(IDS_2150), - drive + 1, plat_get_string(IDS_2057)); + _swprintf(name, plat_get_string(IDS_2150), + drive + 1, plat_get_string(IDS_2057)); } else { - mbstoc16s(fn, cart_fns[drive], sizeof_w(fn)); - _swprintf(name, plat_get_string(IDS_2150), - drive + 1, fn); + mbstoc16s(fn, cart_fns[drive], sizeof_w(fn)); + _swprintf(name, plat_get_string(IDS_2150), + drive + 1, fn); } - mii.cbSize = sizeof(mii); - mii.fMask = MIIM_STRING; + mii.cbSize = sizeof(mii); + mii.fMask = MIIM_STRING; mii.dwTypeData = name; - SetMenuItemInfo(media_menu, (UINT_PTR)menus[CARTRIDGE_FIRST + drive], FALSE, &mii); + SetMenuItemInfo(media_menu, (UINT_PTR) menus[CARTRIDGE_FIRST + drive], FALSE, &mii); } - static void media_menu_set_name_floppy(int drive) { - wchar_t name[512], temp[512], fn[512]; + wchar_t name[512], temp[512], fn[512]; MENUITEMINFO mii = { 0 }; mbstoc16s(temp, fdd_getname(fdd_get_type(drive)), - strlen(fdd_getname(fdd_get_type(drive))) + 1); + strlen(fdd_getname(fdd_get_type(drive))) + 1); if (strlen(floppyfns[drive]) == 0) { - _swprintf(name, plat_get_string(IDS_2108), - drive + 1, temp, plat_get_string(IDS_2057)); + _swprintf(name, plat_get_string(IDS_2108), + drive + 1, temp, plat_get_string(IDS_2057)); } else { - mbstoc16s(fn, floppyfns[drive], sizeof_w(fn)); - _swprintf(name, plat_get_string(IDS_2108), - drive + 1, temp, fn); + mbstoc16s(fn, floppyfns[drive], sizeof_w(fn)); + _swprintf(name, plat_get_string(IDS_2108), + drive + 1, temp, fn); } - mii.cbSize = sizeof(mii); - mii.fMask = MIIM_STRING; + mii.cbSize = sizeof(mii); + mii.fMask = MIIM_STRING; mii.dwTypeData = name; - SetMenuItemInfo(media_menu, (UINT_PTR)menus[FDD_FIRST + drive], FALSE, &mii); + SetMenuItemInfo(media_menu, (UINT_PTR) menus[FDD_FIRST + drive], FALSE, &mii); } - static void media_menu_set_name_cdrom(int drive) { - wchar_t name[512], *temp, fn[512]; + wchar_t name[512], *temp, fn[512]; MENUITEMINFO mii = { 0 }; int bus = cdrom[drive].bus_type; - int id = IDS_5377 + (bus - 1); + int id = IDS_5377 + (bus - 1); temp = plat_get_string(id); if (cdrom[drive].host_drive == 200) { - if (strlen(cdrom[drive].image_path) == 0) { - _swprintf(name, plat_get_string(IDS_5120), - drive+1, temp, plat_get_string(IDS_2057)); - } else { - mbstoc16s(fn, cdrom[drive].image_path, sizeof_w(fn)); - _swprintf(name, plat_get_string(IDS_5120), - drive+1, temp, fn); - } + if (strlen(cdrom[drive].image_path) == 0) { + _swprintf(name, plat_get_string(IDS_5120), + drive + 1, temp, plat_get_string(IDS_2057)); + } else { + mbstoc16s(fn, cdrom[drive].image_path, sizeof_w(fn)); + _swprintf(name, plat_get_string(IDS_5120), + drive + 1, temp, fn); + } } else - _swprintf(name, plat_get_string(IDS_5120), drive+1, temp, plat_get_string(IDS_2057)); + _swprintf(name, plat_get_string(IDS_5120), drive + 1, temp, plat_get_string(IDS_2057)); - mii.cbSize = sizeof(mii); - mii.fMask = MIIM_STRING; + mii.cbSize = sizeof(mii); + mii.fMask = MIIM_STRING; mii.dwTypeData = name; - SetMenuItemInfo(media_menu, (UINT_PTR)menus[CDROM_FIRST + drive], FALSE, &mii); + SetMenuItemInfo(media_menu, (UINT_PTR) menus[CDROM_FIRST + drive], FALSE, &mii); } - static void media_menu_set_name_zip(int drive) { - wchar_t name[512], *temp, fn[512]; + wchar_t name[512], *temp, fn[512]; MENUITEMINFO mii = { 0 }; int bus = zip_drives[drive].bus_type; - int id = IDS_5377 + (bus - 1); + int id = IDS_5377 + (bus - 1); temp = plat_get_string(id); int type = zip_drives[drive].is_250 ? 250 : 100; if (strlen(zip_drives[drive].image_path) == 0) { - _swprintf(name, plat_get_string(IDS_2054), - type, drive+1, temp, plat_get_string(IDS_2057)); + _swprintf(name, plat_get_string(IDS_2054), + type, drive + 1, temp, plat_get_string(IDS_2057)); } else { - mbstoc16s(fn, zip_drives[drive].image_path, sizeof_w(fn)); - _swprintf(name, plat_get_string(IDS_2054), - type, drive+1, temp, fn); + mbstoc16s(fn, zip_drives[drive].image_path, sizeof_w(fn)); + _swprintf(name, plat_get_string(IDS_2054), + type, drive + 1, temp, fn); } - mii.cbSize = sizeof(mii); - mii.fMask = MIIM_STRING; + mii.cbSize = sizeof(mii); + mii.fMask = MIIM_STRING; mii.dwTypeData = name; - SetMenuItemInfo(media_menu, (UINT_PTR)menus[ZIP_FIRST + drive], FALSE, &mii); + SetMenuItemInfo(media_menu, (UINT_PTR) menus[ZIP_FIRST + drive], FALSE, &mii); } - static void media_menu_set_name_mo(int drive) { - wchar_t name[512], *temp, fn[512]; + wchar_t name[512], *temp, fn[512]; MENUITEMINFO mii = { 0 }; int bus = mo_drives[drive].bus_type; - int id = IDS_5377 + (bus - 1); + int id = IDS_5377 + (bus - 1); temp = plat_get_string(id); if (strlen(mo_drives[drive].image_path) == 0) { - _swprintf(name, plat_get_string(IDS_2115), - drive+1, temp, plat_get_string(IDS_2057)); + _swprintf(name, plat_get_string(IDS_2115), + drive + 1, temp, plat_get_string(IDS_2057)); } else { - mbstoc16s(fn, mo_drives[drive].image_path, sizeof_w(fn)); - _swprintf(name, plat_get_string(IDS_2115), - drive+1, temp, fn); + mbstoc16s(fn, mo_drives[drive].image_path, sizeof_w(fn)); + _swprintf(name, plat_get_string(IDS_2115), + drive + 1, temp, fn); } - mii.cbSize = sizeof(mii); - mii.fMask = MIIM_STRING; + mii.cbSize = sizeof(mii); + mii.fMask = MIIM_STRING; mii.dwTypeData = name; - SetMenuItemInfo(media_menu, (UINT_PTR)menus[MO_FIRST + drive], FALSE, &mii); + SetMenuItemInfo(media_menu, (UINT_PTR) menus[MO_FIRST + drive], FALSE, &mii); } - void media_menu_update_cassette(void) { int i = CASSETTE_FIRST; if (strlen(cassette_fname) == 0) { - EnableMenuItem(menus[i], IDM_CASSETTE_EJECT, MF_BYCOMMAND | MF_GRAYED); - EnableMenuItem(menus[i], IDM_CASSETTE_RECORD, MF_BYCOMMAND | MF_GRAYED); - EnableMenuItem(menus[i], IDM_CASSETTE_PLAY, MF_BYCOMMAND | MF_GRAYED); - CheckMenuItem(menus[i], IDM_CASSETTE_RECORD, MF_BYCOMMAND | MF_UNCHECKED); - CheckMenuItem(menus[i], IDM_CASSETTE_PLAY, MF_BYCOMMAND | MF_UNCHECKED); - EnableMenuItem(menus[i], IDM_CASSETTE_REWIND, MF_BYCOMMAND | MF_GRAYED); - EnableMenuItem(menus[i], IDM_CASSETTE_FAST_FORWARD, MF_BYCOMMAND | MF_GRAYED); + EnableMenuItem(menus[i], IDM_CASSETTE_EJECT, MF_BYCOMMAND | MF_GRAYED); + EnableMenuItem(menus[i], IDM_CASSETTE_RECORD, MF_BYCOMMAND | MF_GRAYED); + EnableMenuItem(menus[i], IDM_CASSETTE_PLAY, MF_BYCOMMAND | MF_GRAYED); + CheckMenuItem(menus[i], IDM_CASSETTE_RECORD, MF_BYCOMMAND | MF_UNCHECKED); + CheckMenuItem(menus[i], IDM_CASSETTE_PLAY, MF_BYCOMMAND | MF_UNCHECKED); + EnableMenuItem(menus[i], IDM_CASSETTE_REWIND, MF_BYCOMMAND | MF_GRAYED); + EnableMenuItem(menus[i], IDM_CASSETTE_FAST_FORWARD, MF_BYCOMMAND | MF_GRAYED); } else { - EnableMenuItem(menus[i], IDM_CASSETTE_EJECT, MF_BYCOMMAND | MF_ENABLED); - EnableMenuItem(menus[i], IDM_CASSETTE_RECORD, MF_BYCOMMAND | MF_ENABLED); - EnableMenuItem(menus[i], IDM_CASSETTE_PLAY, MF_BYCOMMAND | MF_ENABLED); - if (strcmp(cassette_mode, "save") == 0) { - CheckMenuItem(menus[i], IDM_CASSETTE_RECORD, MF_BYCOMMAND | MF_CHECKED); - CheckMenuItem(menus[i], IDM_CASSETTE_PLAY, MF_BYCOMMAND | MF_UNCHECKED); - } else { - CheckMenuItem(menus[i], IDM_CASSETTE_RECORD, MF_BYCOMMAND | MF_UNCHECKED); - CheckMenuItem(menus[i], IDM_CASSETTE_PLAY, MF_BYCOMMAND | MF_CHECKED); - } - EnableMenuItem(menus[i], IDM_CASSETTE_REWIND, MF_BYCOMMAND | MF_ENABLED); - EnableMenuItem(menus[i], IDM_CASSETTE_FAST_FORWARD, MF_BYCOMMAND | MF_ENABLED); + EnableMenuItem(menus[i], IDM_CASSETTE_EJECT, MF_BYCOMMAND | MF_ENABLED); + EnableMenuItem(menus[i], IDM_CASSETTE_RECORD, MF_BYCOMMAND | MF_ENABLED); + EnableMenuItem(menus[i], IDM_CASSETTE_PLAY, MF_BYCOMMAND | MF_ENABLED); + if (strcmp(cassette_mode, "save") == 0) { + CheckMenuItem(menus[i], IDM_CASSETTE_RECORD, MF_BYCOMMAND | MF_CHECKED); + CheckMenuItem(menus[i], IDM_CASSETTE_PLAY, MF_BYCOMMAND | MF_UNCHECKED); + } else { + CheckMenuItem(menus[i], IDM_CASSETTE_RECORD, MF_BYCOMMAND | MF_UNCHECKED); + CheckMenuItem(menus[i], IDM_CASSETTE_PLAY, MF_BYCOMMAND | MF_CHECKED); + } + EnableMenuItem(menus[i], IDM_CASSETTE_REWIND, MF_BYCOMMAND | MF_ENABLED); + EnableMenuItem(menus[i], IDM_CASSETTE_FAST_FORWARD, MF_BYCOMMAND | MF_ENABLED); } media_menu_set_name_cassette(); } - void media_menu_update_cartridge(int id) { int i = CARTRIDGE_FIRST + id; if (strlen(cart_fns[id]) == 0) - EnableMenuItem(menus[i], IDM_CARTRIDGE_EJECT | id, MF_BYCOMMAND | MF_GRAYED); + EnableMenuItem(menus[i], IDM_CARTRIDGE_EJECT | id, MF_BYCOMMAND | MF_GRAYED); else - EnableMenuItem(menus[i], IDM_CARTRIDGE_EJECT | id, MF_BYCOMMAND | MF_ENABLED); + EnableMenuItem(menus[i], IDM_CARTRIDGE_EJECT | id, MF_BYCOMMAND | MF_ENABLED); media_menu_set_name_cartridge(id); } - void media_menu_update_floppy(int id) { int i = FDD_FIRST + id; if (strlen(floppyfns[id]) == 0) { - EnableMenuItem(menus[i], IDM_FLOPPY_EJECT | id, MF_BYCOMMAND | MF_GRAYED); - EnableMenuItem(menus[i], IDM_FLOPPY_EXPORT_TO_86F | id, MF_BYCOMMAND | MF_GRAYED); + EnableMenuItem(menus[i], IDM_FLOPPY_EJECT | id, MF_BYCOMMAND | MF_GRAYED); + EnableMenuItem(menus[i], IDM_FLOPPY_EXPORT_TO_86F | id, MF_BYCOMMAND | MF_GRAYED); } else { - EnableMenuItem(menus[i], IDM_FLOPPY_EJECT | id, MF_BYCOMMAND | MF_ENABLED); - EnableMenuItem(menus[i], IDM_FLOPPY_EXPORT_TO_86F | id, MF_BYCOMMAND | MF_ENABLED); + EnableMenuItem(menus[i], IDM_FLOPPY_EJECT | id, MF_BYCOMMAND | MF_ENABLED); + EnableMenuItem(menus[i], IDM_FLOPPY_EXPORT_TO_86F | id, MF_BYCOMMAND | MF_ENABLED); } media_menu_set_name_floppy(id); } - void media_menu_update_cdrom(int id) { int i = CDROM_FIRST + id; - if (! cdrom[id].sound_on) - CheckMenuItem(menus[i], IDM_CDROM_MUTE | id, MF_BYCOMMAND | MF_CHECKED); + if (!cdrom[id].sound_on) + CheckMenuItem(menus[i], IDM_CDROM_MUTE | id, MF_BYCOMMAND | MF_CHECKED); else - CheckMenuItem(menus[i], IDM_CDROM_MUTE | id, MF_BYCOMMAND | MF_UNCHECKED); + CheckMenuItem(menus[i], IDM_CDROM_MUTE | id, MF_BYCOMMAND | MF_UNCHECKED); if (cdrom[id].host_drive == 200) { - CheckMenuItem(menus[i], IDM_CDROM_IMAGE | id, MF_BYCOMMAND | MF_CHECKED); - CheckMenuItem(menus[i], IDM_CDROM_EMPTY | id, MF_BYCOMMAND | MF_UNCHECKED); + CheckMenuItem(menus[i], IDM_CDROM_IMAGE | id, MF_BYCOMMAND | MF_CHECKED); + CheckMenuItem(menus[i], IDM_CDROM_EMPTY | id, MF_BYCOMMAND | MF_UNCHECKED); } else { - cdrom[id].host_drive = 0; - CheckMenuItem(menus[i], IDM_CDROM_IMAGE | id, MF_BYCOMMAND | MF_UNCHECKED); - CheckMenuItem(menus[i], IDM_CDROM_EMPTY | id, MF_BYCOMMAND | MF_CHECKED); + cdrom[id].host_drive = 0; + CheckMenuItem(menus[i], IDM_CDROM_IMAGE | id, MF_BYCOMMAND | MF_UNCHECKED); + CheckMenuItem(menus[i], IDM_CDROM_EMPTY | id, MF_BYCOMMAND | MF_CHECKED); } - if(cdrom[id].prev_host_drive == 0) - EnableMenuItem(menus[i], IDM_CDROM_RELOAD | id, MF_BYCOMMAND | MF_GRAYED); + if (cdrom[id].prev_host_drive == 0) + EnableMenuItem(menus[i], IDM_CDROM_RELOAD | id, MF_BYCOMMAND | MF_GRAYED); else - EnableMenuItem(menus[i], IDM_CDROM_RELOAD | id, MF_BYCOMMAND | MF_ENABLED); + EnableMenuItem(menus[i], IDM_CDROM_RELOAD | id, MF_BYCOMMAND | MF_ENABLED); media_menu_set_name_cdrom(id); } - void media_menu_update_zip(int id) { int i = ZIP_FIRST + id; if (strlen(zip_drives[id].image_path) == 0) - EnableMenuItem(menus[i], IDM_ZIP_EJECT | id, MF_BYCOMMAND | MF_GRAYED); + EnableMenuItem(menus[i], IDM_ZIP_EJECT | id, MF_BYCOMMAND | MF_GRAYED); else - EnableMenuItem(menus[i], IDM_ZIP_EJECT | id, MF_BYCOMMAND | MF_ENABLED); + EnableMenuItem(menus[i], IDM_ZIP_EJECT | id, MF_BYCOMMAND | MF_ENABLED); - if(strlen(zip_drives[id].prev_image_path) == 0) - EnableMenuItem(menus[i], IDM_ZIP_RELOAD | id, MF_BYCOMMAND | MF_GRAYED); + if (strlen(zip_drives[id].prev_image_path) == 0) + EnableMenuItem(menus[i], IDM_ZIP_RELOAD | id, MF_BYCOMMAND | MF_GRAYED); else - EnableMenuItem(menus[i], IDM_ZIP_RELOAD | id, MF_BYCOMMAND | MF_ENABLED); + EnableMenuItem(menus[i], IDM_ZIP_RELOAD | id, MF_BYCOMMAND | MF_ENABLED); media_menu_set_name_zip(id); } - void media_menu_update_mo(int id) { int i = MO_FIRST + id; if (strlen(mo_drives[id].image_path) == 0) - EnableMenuItem(menus[i], IDM_MO_EJECT | id, MF_BYCOMMAND | MF_GRAYED); + EnableMenuItem(menus[i], IDM_MO_EJECT | id, MF_BYCOMMAND | MF_GRAYED); else - EnableMenuItem(menus[i], IDM_MO_EJECT | id, MF_BYCOMMAND | MF_ENABLED); + EnableMenuItem(menus[i], IDM_MO_EJECT | id, MF_BYCOMMAND | MF_ENABLED); - if(strlen(mo_drives[id].prev_image_path) == 0) - EnableMenuItem(menus[i], IDM_MO_RELOAD | id, MF_BYCOMMAND | MF_GRAYED); + if (strlen(mo_drives[id].prev_image_path) == 0) + EnableMenuItem(menus[i], IDM_MO_RELOAD | id, MF_BYCOMMAND | MF_GRAYED); else - EnableMenuItem(menus[i], IDM_MO_RELOAD | id, MF_BYCOMMAND | MF_ENABLED); + EnableMenuItem(menus[i], IDM_MO_RELOAD | id, MF_BYCOMMAND | MF_ENABLED); media_menu_set_name_mo(id); } - static void media_menu_load_submenus() { @@ -373,176 +356,156 @@ media_menu_load_submenus() menus[curr] = media_menu_load_resource(CASSETTE_SUBMENU_NAME); media_menu_set_ids(menus[curr++], 0); - for(int i = 0; i < 2; i++) { - menus[curr] = media_menu_load_resource(CARTRIDGE_SUBMENU_NAME); - media_menu_set_ids(menus[curr++], i); + for (int i = 0; i < 2; i++) { + menus[curr] = media_menu_load_resource(CARTRIDGE_SUBMENU_NAME); + media_menu_set_ids(menus[curr++], i); } - for(int i = 0; i < FDD_NUM; i++) { - menus[curr] = media_menu_load_resource(FLOPPY_SUBMENU_NAME); - media_menu_set_ids(menus[curr++], i); + for (int i = 0; i < FDD_NUM; i++) { + menus[curr] = media_menu_load_resource(FLOPPY_SUBMENU_NAME); + media_menu_set_ids(menus[curr++], i); } - for(int i = 0; i < CDROM_NUM; i++) { - menus[curr] = media_menu_load_resource(CDROM_SUBMENU_NAME); - media_menu_set_ids(menus[curr++], i); + for (int i = 0; i < CDROM_NUM; i++) { + menus[curr] = media_menu_load_resource(CDROM_SUBMENU_NAME); + media_menu_set_ids(menus[curr++], i); } - for(int i = 0; i < ZIP_NUM; i++) { - menus[curr] = media_menu_load_resource(ZIP_SUBMENU_NAME); - media_menu_set_ids(menus[curr++], i); + for (int i = 0; i < ZIP_NUM; i++) { + menus[curr] = media_menu_load_resource(ZIP_SUBMENU_NAME); + media_menu_set_ids(menus[curr++], i); } - for(int i = 0; i < MO_NUM; i++) { - menus[curr] = media_menu_load_resource(MO_SUBMENU_NAME); - media_menu_set_ids(menus[curr++], i); + for (int i = 0; i < MO_NUM; i++) { + menus[curr] = media_menu_load_resource(MO_SUBMENU_NAME); + media_menu_set_ids(menus[curr++], i); } } - static inline int is_valid_cartridge(void) { return (machine_has_cartridge(machine)); } - static inline int is_valid_fdd(int i) { return fdd_get_type(i) != 0; } - static inline int is_valid_cdrom(int i) { - if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && !MACHINE_HAS_IDE && - memcmp(hdc_get_internal_name(hdc_current), "xtide", 5) && - memcmp(hdc_get_internal_name(hdc_current), "ide", 3)) - return 0; - if ((cdrom[i].bus_type == CDROM_BUS_SCSI) && !MACHINE_HAS_SCSI && - (scsi_card_current[0] == 0) && (scsi_card_current[1] == 0) && - (scsi_card_current[2] == 0) && (scsi_card_current[3] == 0)) - return 0; + if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && !MACHINE_HAS_IDE && memcmp(hdc_get_internal_name(hdc_current), "xtide", 5) && memcmp(hdc_get_internal_name(hdc_current), "ide", 3)) + return 0; + if ((cdrom[i].bus_type == CDROM_BUS_SCSI) && !MACHINE_HAS_SCSI && (scsi_card_current[0] == 0) && (scsi_card_current[1] == 0) && (scsi_card_current[2] == 0) && (scsi_card_current[3] == 0)) + return 0; return cdrom[i].bus_type != 0; } - static inline int is_valid_zip(int i) { - if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && !MACHINE_HAS_IDE && - memcmp(hdc_get_internal_name(hdc_current), "xtide", 5) && - memcmp(hdc_get_internal_name(hdc_current), "ide", 3)) - return 0; - if ((zip_drives[i].bus_type == ZIP_BUS_SCSI) && !MACHINE_HAS_SCSI && - (scsi_card_current[0] == 0) && (scsi_card_current[1] == 0) && - (scsi_card_current[2] == 0) && (scsi_card_current[3] == 0)) - return 0; + if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && !MACHINE_HAS_IDE && memcmp(hdc_get_internal_name(hdc_current), "xtide", 5) && memcmp(hdc_get_internal_name(hdc_current), "ide", 3)) + return 0; + if ((zip_drives[i].bus_type == ZIP_BUS_SCSI) && !MACHINE_HAS_SCSI && (scsi_card_current[0] == 0) && (scsi_card_current[1] == 0) && (scsi_card_current[2] == 0) && (scsi_card_current[3] == 0)) + return 0; return zip_drives[i].bus_type != 0; } - static inline int is_valid_mo(int i) { - if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && !MACHINE_HAS_IDE && - memcmp(hdc_get_internal_name(hdc_current), "xtide", 5) && - memcmp(hdc_get_internal_name(hdc_current), "ide", 3)) - return 0; - if ((mo_drives[i].bus_type == MO_BUS_SCSI) && !MACHINE_HAS_SCSI && - (scsi_card_current[0] == 0) && (scsi_card_current[1] == 0) && - (scsi_card_current[2] == 0) && (scsi_card_current[3] == 0)) - return 0; + if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && !MACHINE_HAS_IDE && memcmp(hdc_get_internal_name(hdc_current), "xtide", 5) && memcmp(hdc_get_internal_name(hdc_current), "ide", 3)) + return 0; + if ((mo_drives[i].bus_type == MO_BUS_SCSI) && !MACHINE_HAS_SCSI && (scsi_card_current[0] == 0) && (scsi_card_current[1] == 0) && (scsi_card_current[2] == 0) && (scsi_card_current[3] == 0)) + return 0; return mo_drives[i].bus_type != 0; } - void media_menu_reset() { /* Remove existing entries. */ int c = GetMenuItemCount(media_menu); - for(int i = 0; i < c; i++) - RemoveMenu(media_menu, 0, MF_BYPOSITION); + for (int i = 0; i < c; i++) + RemoveMenu(media_menu, 0, MF_BYPOSITION); /* Add new ones. */ int curr = 0; - if(cassette_enable) { - AppendMenu(media_menu, MF_POPUP | MF_STRING, (UINT_PTR)menus[curr], L"Test"); - media_menu_update_cassette(); + if (cassette_enable) { + AppendMenu(media_menu, MF_POPUP | MF_STRING, (UINT_PTR) menus[curr], L"Test"); + media_menu_update_cassette(); } curr++; - for(int i = 0; i < 2; i++) { - if(is_valid_cartridge()) { - AppendMenu(media_menu, MF_POPUP | MF_STRING, (UINT_PTR)menus[curr], L"Test"); - media_menu_update_cartridge(i); - } - curr++; + for (int i = 0; i < 2; i++) { + if (is_valid_cartridge()) { + AppendMenu(media_menu, MF_POPUP | MF_STRING, (UINT_PTR) menus[curr], L"Test"); + media_menu_update_cartridge(i); + } + curr++; } - for(int i = 0; i < FDD_NUM; i++) { - if(is_valid_fdd(i)) { - AppendMenu(media_menu, MF_POPUP | MF_STRING, (UINT_PTR)menus[curr], L"Test"); - media_menu_update_floppy(i); - } - curr++; + for (int i = 0; i < FDD_NUM; i++) { + if (is_valid_fdd(i)) { + AppendMenu(media_menu, MF_POPUP | MF_STRING, (UINT_PTR) menus[curr], L"Test"); + media_menu_update_floppy(i); + } + curr++; } - for(int i = 0; i < CDROM_NUM; i++) { - if(is_valid_cdrom(i)) { - AppendMenu(media_menu, MF_POPUP | MF_STRING, (UINT_PTR)menus[curr], L"Test"); - media_menu_update_cdrom(i); - } - curr++; + for (int i = 0; i < CDROM_NUM; i++) { + if (is_valid_cdrom(i)) { + AppendMenu(media_menu, MF_POPUP | MF_STRING, (UINT_PTR) menus[curr], L"Test"); + media_menu_update_cdrom(i); + } + curr++; } - for(int i = 0; i < ZIP_NUM; i++) { - if(is_valid_zip(i)) { - AppendMenu(media_menu, MF_POPUP | MF_STRING, (UINT_PTR)menus[curr], L"Test"); - media_menu_update_zip(i); - } - curr++; + for (int i = 0; i < ZIP_NUM; i++) { + if (is_valid_zip(i)) { + AppendMenu(media_menu, MF_POPUP | MF_STRING, (UINT_PTR) menus[curr], L"Test"); + media_menu_update_zip(i); + } + curr++; } - for(int i = 0; i < MO_NUM; i++) { - if(is_valid_mo(i)) { - AppendMenu(media_menu, MF_POPUP | MF_STRING, (UINT_PTR)menus[curr], L"Test"); - media_menu_update_mo(i); - } - curr++; + for (int i = 0; i < MO_NUM; i++) { + if (is_valid_mo(i)) { + AppendMenu(media_menu, MF_POPUP | MF_STRING, (UINT_PTR) menus[curr], L"Test"); + media_menu_update_mo(i); + } + curr++; } } - /* Initializes the Media menu in the main menu bar. */ static void media_menu_main_init() { - HMENU hMenu; + HMENU hMenu; LPWSTR lpMenuName; - hMenu = GetMenu(hwndMain); + hMenu = GetMenu(hwndMain); media_menu = CreatePopupMenu(); /* Get the menu name */ - int len = GetMenuString(hMenu, IDM_MEDIA, NULL, 0, MF_BYCOMMAND); + int len = GetMenuString(hMenu, IDM_MEDIA, NULL, 0, MF_BYCOMMAND); lpMenuName = malloc((len + 1) * sizeof(WCHAR)); GetMenuString(hMenu, IDM_MEDIA, lpMenuName, len + 1, MF_BYCOMMAND); /* Replace the placeholder menu item */ - ModifyMenu(hMenu, IDM_MEDIA, MF_BYCOMMAND | MF_STRING | MF_POPUP, (UINT_PTR)media_menu, lpMenuName); + ModifyMenu(hMenu, IDM_MEDIA, MF_BYCOMMAND | MF_STRING | MF_POPUP, (UINT_PTR) media_menu, lpMenuName); /* Clean up */ DrawMenuBar(hwndMain); free(lpMenuName); } - void media_menu_init() { @@ -551,7 +514,7 @@ media_menu_init() /* Initialize the dummy status bar menu. */ stbar_menu = CreateMenu(); - AppendMenu(stbar_menu, MF_POPUP, (UINT_PTR)media_menu, NULL); + AppendMenu(stbar_menu, MF_POPUP, (UINT_PTR) media_menu, NULL); /* Load the submenus for each drive type. */ media_menu_load_submenus(); @@ -560,7 +523,6 @@ media_menu_init() media_menu_reset(); } - int media_menu_proc(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam) { @@ -569,194 +531,188 @@ media_menu_proc(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam) id = LOWORD(wParam) & 0x00ff; switch (LOWORD(wParam) & 0xff00) { - case IDM_CASSETTE_IMAGE_NEW: - ret = file_dlg_st(hwnd, IDS_2149, "", NULL, 1); - if (! ret) { - if (strlen(openfilestring) == 0) - cassette_mount(NULL, wp); - else - cassette_mount(openfilestring, wp); - } - break; + case IDM_CASSETTE_IMAGE_NEW: + ret = file_dlg_st(hwnd, IDS_2149, "", NULL, 1); + if (!ret) { + if (strlen(openfilestring) == 0) + cassette_mount(NULL, wp); + else + cassette_mount(openfilestring, wp); + } + break; - case IDM_CASSETTE_RECORD: - pc_cas_set_mode(cassette, 1); - CheckMenuItem(menus[CASSETTE_FIRST], IDM_CASSETTE_RECORD, MF_BYCOMMAND | MF_CHECKED); - CheckMenuItem(menus[CASSETTE_FIRST], IDM_CASSETTE_PLAY, MF_BYCOMMAND | MF_UNCHECKED); - break; - case IDM_CASSETTE_PLAY: - pc_cas_set_mode(cassette, 0); - CheckMenuItem(menus[CASSETTE_FIRST], IDM_CASSETTE_RECORD, MF_BYCOMMAND | MF_UNCHECKED); - CheckMenuItem(menus[CASSETTE_FIRST], IDM_CASSETTE_PLAY, MF_BYCOMMAND | MF_CHECKED); - break; - case IDM_CASSETTE_REWIND: - pc_cas_rewind(cassette); - break; - case IDM_CASSETTE_FAST_FORWARD: - pc_cas_append(cassette); - break; + case IDM_CASSETTE_RECORD: + pc_cas_set_mode(cassette, 1); + CheckMenuItem(menus[CASSETTE_FIRST], IDM_CASSETTE_RECORD, MF_BYCOMMAND | MF_CHECKED); + CheckMenuItem(menus[CASSETTE_FIRST], IDM_CASSETTE_PLAY, MF_BYCOMMAND | MF_UNCHECKED); + break; + case IDM_CASSETTE_PLAY: + pc_cas_set_mode(cassette, 0); + CheckMenuItem(menus[CASSETTE_FIRST], IDM_CASSETTE_RECORD, MF_BYCOMMAND | MF_UNCHECKED); + CheckMenuItem(menus[CASSETTE_FIRST], IDM_CASSETTE_PLAY, MF_BYCOMMAND | MF_CHECKED); + break; + case IDM_CASSETTE_REWIND: + pc_cas_rewind(cassette); + break; + case IDM_CASSETTE_FAST_FORWARD: + pc_cas_append(cassette); + break; - case IDM_CASSETTE_IMAGE_EXISTING_WP: - wp = 1; - /* FALLTHROUGH */ - case IDM_CASSETTE_IMAGE_EXISTING: - ret = file_dlg_st(hwnd, IDS_2149, cassette_fname, NULL, 0); - if (! ret) { - if (strlen(openfilestring) == 0) - cassette_mount(NULL, wp); - else - cassette_mount(openfilestring, wp); - } - break; + case IDM_CASSETTE_IMAGE_EXISTING_WP: + wp = 1; + /* FALLTHROUGH */ + case IDM_CASSETTE_IMAGE_EXISTING: + ret = file_dlg_st(hwnd, IDS_2149, cassette_fname, NULL, 0); + if (!ret) { + if (strlen(openfilestring) == 0) + cassette_mount(NULL, wp); + else + cassette_mount(openfilestring, wp); + } + break; - case IDM_CASSETTE_EJECT: - cassette_eject(); - break; + case IDM_CASSETTE_EJECT: + cassette_eject(); + break; - case IDM_CARTRIDGE_IMAGE: - ret = file_dlg_st(hwnd, IDS_2151, cart_fns[id], NULL, 0); - if (! ret) - cartridge_mount(id, openfilestring, wp); - break; + case IDM_CARTRIDGE_IMAGE: + ret = file_dlg_st(hwnd, IDS_2151, cart_fns[id], NULL, 0); + if (!ret) + cartridge_mount(id, openfilestring, wp); + break; - case IDM_CARTRIDGE_EJECT: - cartridge_eject(id); - break; + case IDM_CARTRIDGE_EJECT: + cartridge_eject(id); + break; - case IDM_FLOPPY_IMAGE_NEW: - NewFloppyDialogCreate(hwnd, id, 0); - break; + case IDM_FLOPPY_IMAGE_NEW: + NewFloppyDialogCreate(hwnd, id, 0); + break; - case IDM_FLOPPY_IMAGE_EXISTING_WP: - wp = 1; - /* FALLTHROUGH */ - case IDM_FLOPPY_IMAGE_EXISTING: - ret = file_dlg_st(hwnd, IDS_2109, floppyfns[id], NULL, 0); - if (! ret) - floppy_mount(id, openfilestring, wp); - break; + case IDM_FLOPPY_IMAGE_EXISTING_WP: + wp = 1; + /* FALLTHROUGH */ + case IDM_FLOPPY_IMAGE_EXISTING: + ret = file_dlg_st(hwnd, IDS_2109, floppyfns[id], NULL, 0); + if (!ret) + floppy_mount(id, openfilestring, wp); + break; - case IDM_FLOPPY_EJECT: - floppy_eject(id); - break; + case IDM_FLOPPY_EJECT: + floppy_eject(id); + break; - case IDM_FLOPPY_EXPORT_TO_86F: - ret = file_dlg_st(hwnd, IDS_2076, floppyfns[id], NULL, 1); - if (! ret) { - plat_pause(1); - ret = d86f_export(id, openfilestring); - if (!ret) - ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_4108, (wchar_t *) IDS_4115); - plat_pause(0); - } - break; + case IDM_FLOPPY_EXPORT_TO_86F: + ret = file_dlg_st(hwnd, IDS_2076, floppyfns[id], NULL, 1); + if (!ret) { + plat_pause(1); + ret = d86f_export(id, openfilestring); + if (!ret) + ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_4108, (wchar_t *) IDS_4115); + plat_pause(0); + } + break; - case IDM_CDROM_MUTE: - cdrom[id].sound_on ^= 1; - config_save(); - media_menu_update_cdrom(id); - sound_cd_thread_reset(); - break; + case IDM_CDROM_MUTE: + cdrom[id].sound_on ^= 1; + config_save(); + media_menu_update_cdrom(id); + sound_cd_thread_reset(); + break; - case IDM_CDROM_EMPTY: - cdrom_eject(id); - break; + case IDM_CDROM_EMPTY: + cdrom_eject(id); + break; - case IDM_CDROM_RELOAD: - cdrom_reload(id); - break; + case IDM_CDROM_RELOAD: + cdrom_reload(id); + break; - case IDM_CDROM_IMAGE: - if (!file_dlg_st(hwnd, IDS_2140, cdrom[id].image_path, NULL, 0)) { - cdrom_mount(id, openfilestring); - } - break; + case IDM_CDROM_IMAGE: + if (!file_dlg_st(hwnd, IDS_2140, cdrom[id].image_path, NULL, 0)) { + cdrom_mount(id, openfilestring); + } + break; - case IDM_ZIP_IMAGE_NEW: - NewFloppyDialogCreate(hwnd, id | 0x80, 0); /* NewZIPDialogCreate */ - break; + case IDM_ZIP_IMAGE_NEW: + NewFloppyDialogCreate(hwnd, id | 0x80, 0); /* NewZIPDialogCreate */ + break; - case IDM_ZIP_IMAGE_EXISTING_WP: - wp = 1; - /* FALLTHROUGH */ - case IDM_ZIP_IMAGE_EXISTING: - ret = file_dlg_st(hwnd, IDS_2058, zip_drives[id].image_path, NULL, 0); - if (! ret) - zip_mount(id, openfilestring, wp); - break; + case IDM_ZIP_IMAGE_EXISTING_WP: + wp = 1; + /* FALLTHROUGH */ + case IDM_ZIP_IMAGE_EXISTING: + ret = file_dlg_st(hwnd, IDS_2058, zip_drives[id].image_path, NULL, 0); + if (!ret) + zip_mount(id, openfilestring, wp); + break; - case IDM_ZIP_EJECT: - zip_eject(id); - break; + case IDM_ZIP_EJECT: + zip_eject(id); + break; - case IDM_ZIP_RELOAD: - zip_reload(id); - break; + case IDM_ZIP_RELOAD: + zip_reload(id); + break; - case IDM_MO_IMAGE_NEW: - NewFloppyDialogCreate(hwnd, id | 0x100, 0); /* NewZIPDialogCreate */ - break; + case IDM_MO_IMAGE_NEW: + NewFloppyDialogCreate(hwnd, id | 0x100, 0); /* NewZIPDialogCreate */ + break; - case IDM_MO_IMAGE_EXISTING_WP: - wp = 1; - /* FALLTHROUGH */ - case IDM_MO_IMAGE_EXISTING: - ret = file_dlg_st(hwnd, IDS_2116, mo_drives[id].image_path, NULL, 0); - if (! ret) - mo_mount(id, openfilestring, wp); - break; + case IDM_MO_IMAGE_EXISTING_WP: + wp = 1; + /* FALLTHROUGH */ + case IDM_MO_IMAGE_EXISTING: + ret = file_dlg_st(hwnd, IDS_2116, mo_drives[id].image_path, NULL, 0); + if (!ret) + mo_mount(id, openfilestring, wp); + break; - case IDM_MO_EJECT: - mo_eject(id); - break; + case IDM_MO_EJECT: + mo_eject(id); + break; - case IDM_MO_RELOAD: - mo_reload(id); - break; + case IDM_MO_RELOAD: + mo_reload(id); + break; - default: - return(0); + default: + return (0); } - return(1); + return (1); } - HMENU media_menu_get_cassette(void) { return menus[CASSETTE_FIRST]; } - HMENU media_menu_get_cartridge(int id) { return menus[CARTRIDGE_FIRST + id]; } - HMENU media_menu_get_floppy(int id) { return menus[FDD_FIRST + id]; } - HMENU media_menu_get_cdrom(int id) { return menus[CDROM_FIRST + id]; } - HMENU media_menu_get_zip(int id) { return menus[ZIP_FIRST + id]; } - HMENU media_menu_get_mo(int id) { diff --git a/src/win/win_mouse.c b/src/win/win_mouse.c index b69646a6e..bb592f419 100644 --- a/src/win/win_mouse.c +++ b/src/win/win_mouse.c @@ -27,14 +27,14 @@ #include <86box/plat.h> #include <86box/win.h> -int mouse_capture; +int mouse_capture; double mouse_sensitivity = 1.0; /* Unused. */ typedef struct { - int buttons; - int dx; - int dy; - int dwheel; + int buttons; + int dx; + int dy; + int dwheel; } MOUSESTATE; MOUSESTATE mousestate; @@ -46,70 +46,69 @@ win_mouse_init(void) mouse_capture = 0; - /* Initialize the RawInput (mouse) module. */ - RAWINPUTDEVICE ridev; - ridev.dwFlags = 0; - ridev.hwndTarget = NULL; - ridev.usUsagePage = 0x01; - ridev.usUsage = 0x02; - if (! RegisterRawInputDevices(&ridev, 1, sizeof(ridev))) - fatal("plat_mouse_init: RegisterRawInputDevices failed\n"); + /* Initialize the RawInput (mouse) module. */ + RAWINPUTDEVICE ridev; + ridev.dwFlags = 0; + ridev.hwndTarget = NULL; + ridev.usUsagePage = 0x01; + ridev.usUsage = 0x02; + if (!RegisterRawInputDevices(&ridev, 1, sizeof(ridev))) + fatal("plat_mouse_init: RegisterRawInputDevices failed\n"); - memset(&mousestate, 0, sizeof(MOUSESTATE)); + memset(&mousestate, 0, sizeof(MOUSESTATE)); } void win_mouse_handle(PRAWINPUT raw) { - RAWMOUSE state = raw->data.mouse; + RAWMOUSE state = raw->data.mouse; static int x, y; - /* read mouse buttons and wheel */ - if (state.usButtonFlags & RI_MOUSE_LEFT_BUTTON_DOWN) - mousestate.buttons |= 1; - else if (state.usButtonFlags & RI_MOUSE_LEFT_BUTTON_UP) - mousestate.buttons &= ~1; + /* read mouse buttons and wheel */ + if (state.usButtonFlags & RI_MOUSE_LEFT_BUTTON_DOWN) + mousestate.buttons |= 1; + else if (state.usButtonFlags & RI_MOUSE_LEFT_BUTTON_UP) + mousestate.buttons &= ~1; - if (state.usButtonFlags & RI_MOUSE_MIDDLE_BUTTON_DOWN) - mousestate.buttons |= 4; - else if (state.usButtonFlags & RI_MOUSE_MIDDLE_BUTTON_UP) - mousestate.buttons &= ~4; + if (state.usButtonFlags & RI_MOUSE_MIDDLE_BUTTON_DOWN) + mousestate.buttons |= 4; + else if (state.usButtonFlags & RI_MOUSE_MIDDLE_BUTTON_UP) + mousestate.buttons &= ~4; - if (state.usButtonFlags & RI_MOUSE_RIGHT_BUTTON_DOWN) - mousestate.buttons |= 2; - else if (state.usButtonFlags & RI_MOUSE_RIGHT_BUTTON_UP) - mousestate.buttons &= ~2; - - if (state.usButtonFlags & RI_MOUSE_WHEEL) { - mousestate.dwheel += (SHORT)state.usButtonData / 120; - } + if (state.usButtonFlags & RI_MOUSE_RIGHT_BUTTON_DOWN) + mousestate.buttons |= 2; + else if (state.usButtonFlags & RI_MOUSE_RIGHT_BUTTON_UP) + mousestate.buttons &= ~2; + if (state.usButtonFlags & RI_MOUSE_WHEEL) { + mousestate.dwheel += (SHORT) state.usButtonData / 120; + } if (state.usFlags & MOUSE_MOVE_ABSOLUTE) { - /* absolute mouse, i.e. RDP or VNC - * seems to work fine for RDP on Windows 10 - * Not sure about other environments. - */ - mousestate.dx += (state.lLastX - x)/25; - mousestate.dy += (state.lLastY - y)/25; - x=state.lLastX; - y=state.lLastY; - } else { - /* relative mouse, i.e. regular mouse */ - mousestate.dx += state.lLastX; - mousestate.dy += state.lLastY; - } + /* absolute mouse, i.e. RDP or VNC + * seems to work fine for RDP on Windows 10 + * Not sure about other environments. + */ + mousestate.dx += (state.lLastX - x) / 25; + mousestate.dy += (state.lLastY - y) / 25; + x = state.lLastX; + y = state.lLastY; + } else { + /* relative mouse, i.e. regular mouse */ + mousestate.dx += state.lLastX; + mousestate.dy += state.lLastY; + } } void win_mouse_close(void) { - RAWINPUTDEVICE ridev; - ridev.dwFlags = RIDEV_REMOVE; - ridev.hwndTarget = NULL; - ridev.usUsagePage = 0x01; - ridev.usUsage = 0x02; - RegisterRawInputDevices(&ridev, 1, sizeof(ridev)); + RAWINPUTDEVICE ridev; + ridev.dwFlags = RIDEV_REMOVE; + ridev.hwndTarget = NULL; + ridev.usUsagePage = 0x01; + ridev.usUsage = 0x02; + RegisterRawInputDevices(&ridev, 1, sizeof(ridev)); } void @@ -117,21 +116,21 @@ mouse_poll(void) { static int b = 0; if (mouse_capture || video_fullscreen) { - if (mousestate.dx != 0 || mousestate.dy != 0 || mousestate.dwheel != 0) { - mouse_x += mousestate.dx; - mouse_y += mousestate.dy; - mouse_z = mousestate.dwheel; + if (mousestate.dx != 0 || mousestate.dy != 0 || mousestate.dwheel != 0) { + mouse_x += mousestate.dx; + mouse_y += mousestate.dy; + mouse_z = mousestate.dwheel; - mousestate.dx=0; - mousestate.dy=0; - mousestate.dwheel=0; + mousestate.dx = 0; + mousestate.dy = 0; + mousestate.dwheel = 0; - //pclog("dx=%d, dy=%d, dwheel=%d\n", mouse_x, mouse_y, mouse_z); - } + // pclog("dx=%d, dy=%d, dwheel=%d\n", mouse_x, mouse_y, mouse_z); + } - if (b != mousestate.buttons) { - mouse_buttons = mousestate.buttons; - b = mousestate.buttons; - } - } + if (b != mousestate.buttons) { + mouse_buttons = mousestate.buttons; + b = mousestate.buttons; + } + } } diff --git a/src/win/win_new_floppy.c b/src/win/win_new_floppy.c index 12983bef8..e1cf3bcbd 100644 --- a/src/win/win_new_floppy.c +++ b/src/win/win_new_floppy.c @@ -34,24 +34,22 @@ #include <86box/zip.h> #include <86box/win.h> - typedef struct { - int hole; - int sides; - int data_rate; - int encoding; - int rpm; - int tracks; - int sectors; /* For IMG and Japanese FDI only. */ - int sector_len; /* For IMG and Japanese FDI only. */ - int media_desc; - int spc; - int num_fats; - int spfat; - int root_dir_entries; + int hole; + int sides; + int data_rate; + int encoding; + int rpm; + int tracks; + int sectors; /* For IMG and Japanese FDI only. */ + int sector_len; /* For IMG and Japanese FDI only. */ + int media_desc; + int spc; + int num_fats; + int spfat; + int root_dir_entries; } disk_size_t; - static const disk_size_t disk_sizes[14] = { // { 1, 1, 2, 1, 1, 77, 26, 0, 0, 4, 2, 6, 68 }, /* 250k 8" */ // { 1, 2, 2, 1, 1, 77, 26, 0, 0, 4, 2, 6, 68 }, /* 500k 8" */ @@ -80,63 +78,63 @@ create_86f(char *file_name, disk_size_t disk_size, uint8_t rpm_mode) { FILE *f; - uint32_t magic = 0x46423638; - uint16_t version = 0x020C; - uint16_t dflags = 0; - uint16_t tflags = 0; + uint32_t magic = 0x46423638; + uint16_t version = 0x020C; + uint16_t dflags = 0; + uint16_t tflags = 0; uint32_t index_hole_pos = 0; uint32_t tarray[512]; uint32_t array_size; uint32_t track_base, track_size; - int i; + int i; uint32_t shift = 0; - dflags = 0; /* Has surface data? - Assume no for now. */ - dflags |= (disk_size.hole << 1); /* Hole */ - dflags |= ((disk_size.sides - 1) << 3); /* Sides. */ - dflags |= (0 << 4); /* Write protect? - Assume no for now. */ - dflags |= (rpm_mode << 5); /* RPM mode. */ - dflags |= (0 << 7); /* Has extra bit cells? - Assume no for now. */ + dflags = 0; /* Has surface data? - Assume no for now. */ + dflags |= (disk_size.hole << 1); /* Hole */ + dflags |= ((disk_size.sides - 1) << 3); /* Sides. */ + dflags |= (0 << 4); /* Write protect? - Assume no for now. */ + dflags |= (rpm_mode << 5); /* RPM mode. */ + dflags |= (0 << 7); /* Has extra bit cells? - Assume no for now. */ - tflags = disk_size.data_rate; /* Data rate. */ - tflags |= (disk_size.encoding << 3); /* Encoding. */ - tflags |= (disk_size.rpm << 5); /* RPM. */ + tflags = disk_size.data_rate; /* Data rate. */ + tflags |= (disk_size.encoding << 3); /* Encoding. */ + tflags |= (disk_size.rpm << 5); /* RPM. */ switch (disk_size.hole) { - case 0: - case 1: - default: - switch(rpm_mode) { - case 1: - array_size = 25250; - break; - case 2: - array_size = 25374; - break; - case 3: - array_size = 25750; - break; - default: - array_size = 25000; - break; - } - break; - case 2: - switch(rpm_mode) { - case 1: - array_size = 50500; - break; - case 2: - array_size = 50750; - break; - case 3: - array_size = 51000; - break; - default: - array_size = 50000; - break; - } - break; + case 0: + case 1: + default: + switch (rpm_mode) { + case 1: + array_size = 25250; + break; + case 2: + array_size = 25374; + break; + case 3: + array_size = 25750; + break; + default: + array_size = 25000; + break; + } + break; + case 2: + switch (rpm_mode) { + case 1: + array_size = 50500; + break; + case 2: + array_size = 50750; + break; + case 3: + array_size = 51000; + break; + default: + array_size = 50000; + break; + } + break; } empty = (unsigned char *) malloc(array_size); @@ -146,7 +144,7 @@ create_86f(char *file_name, disk_size_t disk_size, uint8_t rpm_mode) f = plat_fopen(file_name, "wb"); if (!f) - return 0; + return 0; fwrite(&magic, 4, 1, f); fwrite(&version, 2, 1, f); @@ -157,17 +155,17 @@ create_86f(char *file_name, disk_size_t disk_size, uint8_t rpm_mode) track_base = 8 + ((disk_size.sides == 2) ? 2048 : 1024); if (disk_size.tracks <= 43) - shift = 1; + shift = 1; for (i = 0; i < (disk_size.tracks * disk_size.sides) << shift; i++) - tarray[i] = track_base + (i * track_size); + tarray[i] = track_base + (i * track_size); fwrite(tarray, 1, (disk_size.sides == 2) ? 2048 : 1024, f); for (i = 0; i < (disk_size.tracks * disk_size.sides) << shift; i++) { - fwrite(&tflags, 2, 1, f); - fwrite(&index_hole_pos, 4, 1, f); - fwrite(empty, 1, array_size, f); + fwrite(&tflags, 2, 1, f); + fwrite(&index_hole_pos, 4, 1, f); + fwrite(empty, 1, array_size, f); } free(empty); @@ -177,106 +175,104 @@ create_86f(char *file_name, disk_size_t disk_size, uint8_t rpm_mode) return 1; } - -static int is_zip; -static int is_mo; - +static int is_zip; +static int is_mo; static int create_sector_image(char *file_name, disk_size_t disk_size, uint8_t is_fdi) { - FILE *f; - uint32_t total_size = 0; - uint32_t total_sectors = 0; - uint32_t sector_bytes = 0; + FILE *f; + uint32_t total_size = 0; + uint32_t total_sectors = 0; + uint32_t sector_bytes = 0; uint32_t root_dir_bytes = 0; - uint32_t fat_size = 0; - uint32_t fat1_offs = 0; - uint32_t fat2_offs = 0; - uint32_t zero_bytes = 0; - uint16_t base = 0x1000; + uint32_t fat_size = 0; + uint32_t fat1_offs = 0; + uint32_t fat2_offs = 0; + uint32_t zero_bytes = 0; + uint16_t base = 0x1000; f = plat_fopen(file_name, "wb"); if (!f) - return 0; + return 0; - sector_bytes = (128 << disk_size.sector_len); + sector_bytes = (128 << disk_size.sector_len); total_sectors = disk_size.sides * disk_size.tracks * disk_size.sectors; if (total_sectors > ZIP_SECTORS) - total_sectors = ZIP_250_SECTORS; - total_size = total_sectors * sector_bytes; + total_sectors = ZIP_250_SECTORS; + total_size = total_sectors * sector_bytes; root_dir_bytes = (disk_size.root_dir_entries << 5); - fat_size = (disk_size.spfat * sector_bytes); - fat1_offs = sector_bytes; - fat2_offs = fat1_offs + fat_size; - zero_bytes = fat2_offs + fat_size + root_dir_bytes; + fat_size = (disk_size.spfat * sector_bytes); + fat1_offs = sector_bytes; + fat2_offs = fat1_offs + fat_size; + zero_bytes = fat2_offs + fat_size + root_dir_bytes; if (!is_zip && !is_mo && is_fdi) { - empty = (unsigned char *) malloc(base); - memset(empty, 0, base); + empty = (unsigned char *) malloc(base); + memset(empty, 0, base); - *(uint32_t *) &(empty[0x08]) = (uint32_t) base; - *(uint32_t *) &(empty[0x0C]) = total_size; - *(uint16_t *) &(empty[0x10]) = (uint16_t) sector_bytes; - *(uint8_t *) &(empty[0x14]) = (uint8_t) disk_size.sectors; - *(uint8_t *) &(empty[0x18]) = (uint8_t) disk_size.sides; - *(uint8_t *) &(empty[0x1C]) = (uint8_t) disk_size.tracks; + *(uint32_t *) &(empty[0x08]) = (uint32_t) base; + *(uint32_t *) &(empty[0x0C]) = total_size; + *(uint16_t *) &(empty[0x10]) = (uint16_t) sector_bytes; + *(uint8_t *) &(empty[0x14]) = (uint8_t) disk_size.sectors; + *(uint8_t *) &(empty[0x18]) = (uint8_t) disk_size.sides; + *(uint8_t *) &(empty[0x1C]) = (uint8_t) disk_size.tracks; - fwrite(empty, 1, base, f); - free(empty); + fwrite(empty, 1, base, f); + free(empty); } empty = (unsigned char *) malloc(total_size); memset(empty, 0x00, zero_bytes); if (!is_zip && !is_mo) { - memset(empty + zero_bytes, 0xF6, total_size - zero_bytes); + memset(empty + zero_bytes, 0xF6, total_size - zero_bytes); - empty[0x00] = 0xEB; /* Jump to make MS-DOS happy. */ - empty[0x01] = 0x58; - empty[0x02] = 0x90; + empty[0x00] = 0xEB; /* Jump to make MS-DOS happy. */ + empty[0x01] = 0x58; + empty[0x02] = 0x90; - empty[0x03] = 0x38; /* '86BOX5.0' OEM ID. */ - empty[0x04] = 0x36; - empty[0x05] = 0x42; - empty[0x06] = 0x4F; - empty[0x07] = 0x58; - empty[0x08] = 0x35; - empty[0x09] = 0x2E; - empty[0x0A] = 0x30; + empty[0x03] = 0x38; /* '86BOX5.0' OEM ID. */ + empty[0x04] = 0x36; + empty[0x05] = 0x42; + empty[0x06] = 0x4F; + empty[0x07] = 0x58; + empty[0x08] = 0x35; + empty[0x09] = 0x2E; + empty[0x0A] = 0x30; - *(uint16_t *) &(empty[0x0B]) = (uint16_t) sector_bytes; - *(uint8_t *) &(empty[0x0D]) = (uint8_t) disk_size.spc; - *(uint16_t *) &(empty[0x0E]) = (uint16_t) 1; - *(uint8_t *) &(empty[0x10]) = (uint8_t) disk_size.num_fats; - *(uint16_t *) &(empty[0x11]) = (uint16_t) disk_size.root_dir_entries; - *(uint16_t *) &(empty[0x13]) = (uint16_t) total_sectors; - *(uint8_t *) &(empty[0x15]) = (uint8_t) disk_size.media_desc; - *(uint16_t *) &(empty[0x16]) = (uint16_t) disk_size.spfat; - *(uint8_t *) &(empty[0x18]) = (uint8_t) disk_size.sectors; - *(uint8_t *) &(empty[0x1A]) = (uint8_t) disk_size.sides; + *(uint16_t *) &(empty[0x0B]) = (uint16_t) sector_bytes; + *(uint8_t *) &(empty[0x0D]) = (uint8_t) disk_size.spc; + *(uint16_t *) &(empty[0x0E]) = (uint16_t) 1; + *(uint8_t *) &(empty[0x10]) = (uint8_t) disk_size.num_fats; + *(uint16_t *) &(empty[0x11]) = (uint16_t) disk_size.root_dir_entries; + *(uint16_t *) &(empty[0x13]) = (uint16_t) total_sectors; + *(uint8_t *) &(empty[0x15]) = (uint8_t) disk_size.media_desc; + *(uint16_t *) &(empty[0x16]) = (uint16_t) disk_size.spfat; + *(uint8_t *) &(empty[0x18]) = (uint8_t) disk_size.sectors; + *(uint8_t *) &(empty[0x1A]) = (uint8_t) disk_size.sides; - empty[0x26] = 0x29; /* ')' followed by randomly-generated volume serial number. */ - empty[0x27] = random_generate(); - empty[0x28] = random_generate(); - empty[0x29] = random_generate(); - empty[0x2A] = random_generate(); + empty[0x26] = 0x29; /* ')' followed by randomly-generated volume serial number. */ + empty[0x27] = random_generate(); + empty[0x28] = random_generate(); + empty[0x29] = random_generate(); + empty[0x2A] = random_generate(); - memset(&(empty[0x2B]), 0x20, 11); + memset(&(empty[0x2B]), 0x20, 11); - empty[0x36] = 'F'; - empty[0x37] = 'A'; - empty[0x38] = 'T'; - empty[0x39] = '1'; - empty[0x3A] = '2'; - memset(&(empty[0x3B]), 0x20, 0x0003); + empty[0x36] = 'F'; + empty[0x37] = 'A'; + empty[0x38] = 'T'; + empty[0x39] = '1'; + empty[0x3A] = '2'; + memset(&(empty[0x3B]), 0x20, 0x0003); - empty[0x1FE] = 0x55; - empty[0x1FF] = 0xAA; + empty[0x1FE] = 0x55; + empty[0x1FF] = 0xAA; - empty[fat1_offs + 0x00] = empty[fat2_offs + 0x00] = empty[0x15]; - empty[fat1_offs + 0x01] = empty[fat2_offs + 0x01] = 0xFF; - empty[fat1_offs + 0x02] = empty[fat2_offs + 0x02] = 0xFF; + empty[fat1_offs + 0x00] = empty[fat2_offs + 0x00] = empty[0x15]; + empty[fat1_offs + 0x01] = empty[fat2_offs + 0x01] = 0xFF; + empty[fat1_offs + 0x02] = empty[fat2_offs + 0x02] = 0xFF; } fwrite(empty, 1, total_size, f); @@ -287,43 +283,42 @@ create_sector_image(char *file_name, disk_size_t disk_size, uint8_t is_fdi) return 1; } - static int create_zip_sector_image(char *file_name, disk_size_t disk_size, uint8_t is_zdi, HWND hwnd) { - HWND h; - FILE *f; - uint32_t total_size = 0; - uint32_t total_sectors = 0; - uint32_t sector_bytes = 0; + HWND h; + FILE *f; + uint32_t total_size = 0; + uint32_t total_sectors = 0; + uint32_t sector_bytes = 0; uint32_t root_dir_bytes = 0; - uint32_t fat_size = 0; - uint32_t fat1_offs = 0; - uint32_t fat2_offs = 0; - uint32_t zero_bytes = 0; - uint16_t base = 0x1000; - uint32_t pbar_max = 0; + uint32_t fat_size = 0; + uint32_t fat1_offs = 0; + uint32_t fat2_offs = 0; + uint32_t zero_bytes = 0; + uint16_t base = 0x1000; + uint32_t pbar_max = 0; uint32_t i; - MSG msg; + MSG msg; f = plat_fopen(file_name, "wb"); if (!f) - return 0; + return 0; - sector_bytes = (128 << disk_size.sector_len); + sector_bytes = (128 << disk_size.sector_len); total_sectors = disk_size.sides * disk_size.tracks * disk_size.sectors; if (total_sectors > ZIP_SECTORS) - total_sectors = ZIP_250_SECTORS; - total_size = total_sectors * sector_bytes; + total_sectors = ZIP_250_SECTORS; + total_size = total_sectors * sector_bytes; root_dir_bytes = (disk_size.root_dir_entries << 5); - fat_size = (disk_size.spfat * sector_bytes); - fat1_offs = sector_bytes; - fat2_offs = fat1_offs + fat_size; - zero_bytes = fat2_offs + fat_size + root_dir_bytes; + fat_size = (disk_size.spfat * sector_bytes); + fat1_offs = sector_bytes; + fat2_offs = fat1_offs + fat_size; + zero_bytes = fat2_offs + fat_size + root_dir_bytes; pbar_max = total_size; if (is_zdi) - pbar_max += base; + pbar_max += base; pbar_max >>= 11; pbar_max--; @@ -346,175 +341,175 @@ create_zip_sector_image(char *file_name, disk_size_t disk_size, uint8_t is_zdi, pbar_max++; if (is_zdi) { - empty = (unsigned char *) malloc(base); - memset(empty, 0, base); + empty = (unsigned char *) malloc(base); + memset(empty, 0, base); - *(uint32_t *) &(empty[0x08]) = (uint32_t) base; - *(uint32_t *) &(empty[0x0C]) = total_size; - *(uint16_t *) &(empty[0x10]) = (uint16_t) sector_bytes; - *(uint8_t *) &(empty[0x14]) = (uint8_t) disk_size.sectors; - *(uint8_t *) &(empty[0x18]) = (uint8_t) disk_size.sides; - *(uint8_t *) &(empty[0x1C]) = (uint8_t) disk_size.tracks; + *(uint32_t *) &(empty[0x08]) = (uint32_t) base; + *(uint32_t *) &(empty[0x0C]) = total_size; + *(uint16_t *) &(empty[0x10]) = (uint16_t) sector_bytes; + *(uint8_t *) &(empty[0x14]) = (uint8_t) disk_size.sectors; + *(uint8_t *) &(empty[0x18]) = (uint8_t) disk_size.sides; + *(uint8_t *) &(empty[0x1C]) = (uint8_t) disk_size.tracks; - fwrite(empty, 1, 2048, f); - SendMessage(h, PBM_SETPOS, (WPARAM) 1, (LPARAM) 0); + fwrite(empty, 1, 2048, f); + SendMessage(h, PBM_SETPOS, (WPARAM) 1, (LPARAM) 0); - while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { - TranslateMessage(&msg); - DispatchMessage(&msg); - } + while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { + TranslateMessage(&msg); + DispatchMessage(&msg); + } - fwrite(&empty[0x0800], 1, 2048, f); - free(empty); + fwrite(&empty[0x0800], 1, 2048, f); + free(empty); - SendMessage(h, PBM_SETPOS, (WPARAM) 2, (LPARAM) 0); + SendMessage(h, PBM_SETPOS, (WPARAM) 2, (LPARAM) 0); - while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { - TranslateMessage(&msg); - DispatchMessage(&msg); - } + while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { + TranslateMessage(&msg); + DispatchMessage(&msg); + } - pbar_max -= 2; + pbar_max -= 2; } empty = (unsigned char *) malloc(total_size); memset(empty, 0x00, zero_bytes); if (total_sectors == ZIP_SECTORS) { - /* ZIP 100 */ - /* MBR */ - *(uint64_t *) &(empty[0x0000]) = 0x2054524150492EEBLL; - *(uint64_t *) &(empty[0x0008]) = 0x3930302065646F63LL; - *(uint64_t *) &(empty[0x0010]) = 0x67656D6F49202D20LL; - *(uint64_t *) &(empty[0x0018]) = 0x726F70726F432061LL; - *(uint64_t *) &(empty[0x0020]) = 0x202D206E6F697461LL; - *(uint64_t *) &(empty[0x0028]) = 0x30392F33322F3131LL; + /* ZIP 100 */ + /* MBR */ + *(uint64_t *) &(empty[0x0000]) = 0x2054524150492EEBLL; + *(uint64_t *) &(empty[0x0008]) = 0x3930302065646F63LL; + *(uint64_t *) &(empty[0x0010]) = 0x67656D6F49202D20LL; + *(uint64_t *) &(empty[0x0018]) = 0x726F70726F432061LL; + *(uint64_t *) &(empty[0x0020]) = 0x202D206E6F697461LL; + *(uint64_t *) &(empty[0x0028]) = 0x30392F33322F3131LL; - *(uint64_t *) &(empty[0x01AE]) = 0x0116010100E90644LL; - *(uint64_t *) &(empty[0x01B6]) = 0xED08BBE5014E0135LL; - *(uint64_t *) &(empty[0x01BE]) = 0xFFFFFE06FFFFFE80LL; - *(uint64_t *) &(empty[0x01C6]) = 0x0002FFE000000020LL; + *(uint64_t *) &(empty[0x01AE]) = 0x0116010100E90644LL; + *(uint64_t *) &(empty[0x01B6]) = 0xED08BBE5014E0135LL; + *(uint64_t *) &(empty[0x01BE]) = 0xFFFFFE06FFFFFE80LL; + *(uint64_t *) &(empty[0x01C6]) = 0x0002FFE000000020LL; - *(uint16_t *) &(empty[0x01FE]) = 0xAA55; + *(uint16_t *) &(empty[0x01FE]) = 0xAA55; - /* 31 sectors filled with 0x48 */ - memset(&(empty[0x0200]), 0x48, 0x3E00); + /* 31 sectors filled with 0x48 */ + memset(&(empty[0x0200]), 0x48, 0x3E00); - /* Boot sector */ - *(uint64_t *) &(empty[0x4000]) = 0x584F4236389058EBLL; - *(uint64_t *) &(empty[0x4008]) = 0x0008040200302E35LL; - *(uint64_t *) &(empty[0x4010]) = 0x00C0F80000020002LL; - *(uint64_t *) &(empty[0x4018]) = 0x0000002000FF003FLL; - *(uint32_t *) &(empty[0x4020]) = 0x0002FFE0; - *(uint16_t *) &(empty[0x4024]) = 0x0080; + /* Boot sector */ + *(uint64_t *) &(empty[0x4000]) = 0x584F4236389058EBLL; + *(uint64_t *) &(empty[0x4008]) = 0x0008040200302E35LL; + *(uint64_t *) &(empty[0x4010]) = 0x00C0F80000020002LL; + *(uint64_t *) &(empty[0x4018]) = 0x0000002000FF003FLL; + *(uint32_t *) &(empty[0x4020]) = 0x0002FFE0; + *(uint16_t *) &(empty[0x4024]) = 0x0080; - empty[0x4026] = 0x29; /* ')' followed by randomly-generated volume serial number. */ - empty[0x4027] = random_generate(); - empty[0x4028] = random_generate(); - empty[0x4029] = random_generate(); - empty[0x402A] = random_generate(); + empty[0x4026] = 0x29; /* ')' followed by randomly-generated volume serial number. */ + empty[0x4027] = random_generate(); + empty[0x4028] = random_generate(); + empty[0x4029] = random_generate(); + empty[0x402A] = random_generate(); - memset(&(empty[0x402B]), 0x00, 0x000B); - memset(&(empty[0x4036]), 0x20, 0x0008); + memset(&(empty[0x402B]), 0x00, 0x000B); + memset(&(empty[0x4036]), 0x20, 0x0008); - empty[0x4036] = 'F'; - empty[0x4037] = 'A'; - empty[0x4038] = 'T'; - empty[0x4039] = '1'; - empty[0x403A] = '6'; - memset(&(empty[0x403B]), 0x20, 0x0003); + empty[0x4036] = 'F'; + empty[0x4037] = 'A'; + empty[0x4038] = 'T'; + empty[0x4039] = '1'; + empty[0x403A] = '6'; + memset(&(empty[0x403B]), 0x20, 0x0003); - empty[0x41FE] = 0x55; - empty[0x41FF] = 0xAA; + empty[0x41FE] = 0x55; + empty[0x41FF] = 0xAA; - empty[0x5000] = empty[0x1D000] = empty[0x4015]; - empty[0x5001] = empty[0x1D001] = 0xFF; - empty[0x5002] = empty[0x1D002] = 0xFF; - empty[0x5003] = empty[0x1D003] = 0xFF; + empty[0x5000] = empty[0x1D000] = empty[0x4015]; + empty[0x5001] = empty[0x1D001] = 0xFF; + empty[0x5002] = empty[0x1D002] = 0xFF; + empty[0x5003] = empty[0x1D003] = 0xFF; - /* Root directory = 0x35000 - Data = 0x39000 */ + /* Root directory = 0x35000 + Data = 0x39000 */ } else { - /* ZIP 250 */ - /* MBR */ - *(uint64_t *) &(empty[0x0000]) = 0x2054524150492EEBLL; - *(uint64_t *) &(empty[0x0008]) = 0x3930302065646F63LL; - *(uint64_t *) &(empty[0x0010]) = 0x67656D6F49202D20LL; - *(uint64_t *) &(empty[0x0018]) = 0x726F70726F432061LL; - *(uint64_t *) &(empty[0x0020]) = 0x202D206E6F697461LL; - *(uint64_t *) &(empty[0x0028]) = 0x30392F33322F3131LL; + /* ZIP 250 */ + /* MBR */ + *(uint64_t *) &(empty[0x0000]) = 0x2054524150492EEBLL; + *(uint64_t *) &(empty[0x0008]) = 0x3930302065646F63LL; + *(uint64_t *) &(empty[0x0010]) = 0x67656D6F49202D20LL; + *(uint64_t *) &(empty[0x0018]) = 0x726F70726F432061LL; + *(uint64_t *) &(empty[0x0020]) = 0x202D206E6F697461LL; + *(uint64_t *) &(empty[0x0028]) = 0x30392F33322F3131LL; - *(uint64_t *) &(empty[0x01AE]) = 0x0116010100E900E9LL; - *(uint64_t *) &(empty[0x01B6]) = 0x2E32A7AC014E0135LL; + *(uint64_t *) &(empty[0x01AE]) = 0x0116010100E900E9LL; + *(uint64_t *) &(empty[0x01B6]) = 0x2E32A7AC014E0135LL; - *(uint64_t *) &(empty[0x01EE]) = 0xEE203F0600010180LL; - *(uint64_t *) &(empty[0x01F6]) = 0x000777E000000020LL; - *(uint16_t *) &(empty[0x01FE]) = 0xAA55; + *(uint64_t *) &(empty[0x01EE]) = 0xEE203F0600010180LL; + *(uint64_t *) &(empty[0x01F6]) = 0x000777E000000020LL; + *(uint16_t *) &(empty[0x01FE]) = 0xAA55; - /* 31 sectors filled with 0x48 */ - memset(&(empty[0x0200]), 0x48, 0x3E00); + /* 31 sectors filled with 0x48 */ + memset(&(empty[0x0200]), 0x48, 0x3E00); - /* The second sector begins with some strange data - in my reference image. */ - *(uint64_t *) &(empty[0x0200]) = 0x3831393230334409LL; - *(uint64_t *) &(empty[0x0208]) = 0x6A57766964483130LL; - *(uint64_t *) &(empty[0x0210]) = 0x3C3A34676063653FLL; - *(uint64_t *) &(empty[0x0218]) = 0x586A56A8502C4161LL; - *(uint64_t *) &(empty[0x0220]) = 0x6F2D702535673D6CLL; - *(uint64_t *) &(empty[0x0228]) = 0x255421B8602D3456LL; - *(uint64_t *) &(empty[0x0230]) = 0x577B22447B52603ELL; - *(uint64_t *) &(empty[0x0238]) = 0x46412CC871396170LL; - *(uint64_t *) &(empty[0x0240]) = 0x704F55237C5E2626LL; - *(uint64_t *) &(empty[0x0248]) = 0x6C7932C87D5C3C20LL; - *(uint64_t *) &(empty[0x0250]) = 0x2C50503E47543D6ELL; - *(uint64_t *) &(empty[0x0258]) = 0x46394E807721536ALL; - *(uint64_t *) &(empty[0x0260]) = 0x505823223F245325LL; - *(uint64_t *) &(empty[0x0268]) = 0x365C79B0393B5B6ELL; + /* The second sector begins with some strange data + in my reference image. */ + *(uint64_t *) &(empty[0x0200]) = 0x3831393230334409LL; + *(uint64_t *) &(empty[0x0208]) = 0x6A57766964483130LL; + *(uint64_t *) &(empty[0x0210]) = 0x3C3A34676063653FLL; + *(uint64_t *) &(empty[0x0218]) = 0x586A56A8502C4161LL; + *(uint64_t *) &(empty[0x0220]) = 0x6F2D702535673D6CLL; + *(uint64_t *) &(empty[0x0228]) = 0x255421B8602D3456LL; + *(uint64_t *) &(empty[0x0230]) = 0x577B22447B52603ELL; + *(uint64_t *) &(empty[0x0238]) = 0x46412CC871396170LL; + *(uint64_t *) &(empty[0x0240]) = 0x704F55237C5E2626LL; + *(uint64_t *) &(empty[0x0248]) = 0x6C7932C87D5C3C20LL; + *(uint64_t *) &(empty[0x0250]) = 0x2C50503E47543D6ELL; + *(uint64_t *) &(empty[0x0258]) = 0x46394E807721536ALL; + *(uint64_t *) &(empty[0x0260]) = 0x505823223F245325LL; + *(uint64_t *) &(empty[0x0268]) = 0x365C79B0393B5B6ELL; - /* Boot sector */ - *(uint64_t *) &(empty[0x4000]) = 0x584F4236389058EBLL; - *(uint64_t *) &(empty[0x4008]) = 0x0001080200302E35LL; - *(uint64_t *) &(empty[0x4010]) = 0x00EFF80000020002LL; - *(uint64_t *) &(empty[0x4018]) = 0x0000002000400020LL; - *(uint32_t *) &(empty[0x4020]) = 0x000777E0; - *(uint16_t *) &(empty[0x4024]) = 0x0080; + /* Boot sector */ + *(uint64_t *) &(empty[0x4000]) = 0x584F4236389058EBLL; + *(uint64_t *) &(empty[0x4008]) = 0x0001080200302E35LL; + *(uint64_t *) &(empty[0x4010]) = 0x00EFF80000020002LL; + *(uint64_t *) &(empty[0x4018]) = 0x0000002000400020LL; + *(uint32_t *) &(empty[0x4020]) = 0x000777E0; + *(uint16_t *) &(empty[0x4024]) = 0x0080; - empty[0x4026] = 0x29; /* ')' followed by randomly-generated volume serial number. */ - empty[0x4027] = random_generate(); - empty[0x4028] = random_generate(); - empty[0x4029] = random_generate(); - empty[0x402A] = random_generate(); + empty[0x4026] = 0x29; /* ')' followed by randomly-generated volume serial number. */ + empty[0x4027] = random_generate(); + empty[0x4028] = random_generate(); + empty[0x4029] = random_generate(); + empty[0x402A] = random_generate(); - memset(&(empty[0x402B]), 0x00, 0x000B); - memset(&(empty[0x4036]), 0x20, 0x0008); + memset(&(empty[0x402B]), 0x00, 0x000B); + memset(&(empty[0x4036]), 0x20, 0x0008); - empty[0x4036] = 'F'; - empty[0x4037] = 'A'; - empty[0x4038] = 'T'; - empty[0x4039] = '1'; - empty[0x403A] = '6'; - memset(&(empty[0x403B]), 0x20, 0x0003); + empty[0x4036] = 'F'; + empty[0x4037] = 'A'; + empty[0x4038] = 'T'; + empty[0x4039] = '1'; + empty[0x403A] = '6'; + memset(&(empty[0x403B]), 0x20, 0x0003); - empty[0x41FE] = 0x55; - empty[0x41FF] = 0xAA; + empty[0x41FE] = 0x55; + empty[0x41FF] = 0xAA; - empty[0x4200] = empty[0x22000] = empty[0x4015]; - empty[0x4201] = empty[0x22001] = 0xFF; - empty[0x4202] = empty[0x22002] = 0xFF; - empty[0x4203] = empty[0x22003] = 0xFF; + empty[0x4200] = empty[0x22000] = empty[0x4015]; + empty[0x4201] = empty[0x22001] = 0xFF; + empty[0x4202] = empty[0x22002] = 0xFF; + empty[0x4203] = empty[0x22003] = 0xFF; - /* Root directory = 0x3FE00 - Data = 0x38200 */ + /* Root directory = 0x3FE00 + Data = 0x38200 */ } for (i = 0; i < pbar_max; i++) { - fwrite(&empty[i << 11], 1, 2048, f); - SendMessage(h, PBM_SETPOS, (WPARAM) i + 2, (LPARAM) 0); + fwrite(&empty[i << 11], 1, 2048, f); + SendMessage(h, PBM_SETPOS, (WPARAM) i + 2, (LPARAM) 0); - while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { - TranslateMessage(&msg); - DispatchMessage(&msg); - } + while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { + TranslateMessage(&msg); + DispatchMessage(&msg); + } } free(empty); @@ -524,29 +519,28 @@ create_zip_sector_image(char *file_name, disk_size_t disk_size, uint8_t is_zdi, return 1; } - static int create_mo_sector_image(char *file_name, int8_t disk_size, uint8_t is_mdi, HWND hwnd) { - HWND h; - FILE *f; + HWND h; + FILE *f; const mo_type_t *dp = &mo_types[disk_size]; - uint8_t *empty, *empty2 = NULL; - uint32_t total_size = 0, total_size2; - uint32_t total_sectors = 0; - uint32_t sector_bytes = 0; - uint16_t base = 0x1000; - uint32_t pbar_max = 0, blocks_num; - uint32_t i, j; - MSG msg; + uint8_t *empty, *empty2 = NULL; + uint32_t total_size = 0, total_size2; + uint32_t total_sectors = 0; + uint32_t sector_bytes = 0; + uint16_t base = 0x1000; + uint32_t pbar_max = 0, blocks_num; + uint32_t i, j; + MSG msg; f = plat_fopen(file_name, "wb"); if (!f) - return 0; + return 0; - sector_bytes = dp->bytes_per_sector; + sector_bytes = dp->bytes_per_sector; total_sectors = dp->sectors; - total_size = total_sectors * sector_bytes; + total_size = total_sectors * sector_bytes; total_size2 = (total_size >> 20) << 20; total_size2 = total_size - total_size2; @@ -555,9 +549,9 @@ create_mo_sector_image(char *file_name, int8_t disk_size, uint8_t is_mdi, HWND h pbar_max >>= 20; blocks_num = pbar_max; if (is_mdi) - pbar_max++; + pbar_max++; if (total_size2 == 0) - pbar_max++; + pbar_max++; j = is_mdi ? 1 : 0; @@ -579,67 +573,67 @@ create_mo_sector_image(char *file_name, int8_t disk_size, uint8_t is_mdi, HWND h h = GetDlgItem(hwnd, IDC_PBAR_IMG_CREATE); if (is_mdi) { - empty = (unsigned char *) malloc(base); - memset(empty, 0, base); + empty = (unsigned char *) malloc(base); + memset(empty, 0, base); - *(uint32_t *) &(empty[0x08]) = (uint32_t) base; - *(uint32_t *) &(empty[0x0C]) = total_size; - *(uint16_t *) &(empty[0x10]) = (uint16_t) sector_bytes; - *(uint8_t *) &(empty[0x14]) = (uint8_t) 25; - *(uint8_t *) &(empty[0x18]) = (uint8_t) 64; - *(uint8_t *) &(empty[0x1C]) = (uint8_t) (dp->sectors / 64) / 25; + *(uint32_t *) &(empty[0x08]) = (uint32_t) base; + *(uint32_t *) &(empty[0x0C]) = total_size; + *(uint16_t *) &(empty[0x10]) = (uint16_t) sector_bytes; + *(uint8_t *) &(empty[0x14]) = (uint8_t) 25; + *(uint8_t *) &(empty[0x18]) = (uint8_t) 64; + *(uint8_t *) &(empty[0x1C]) = (uint8_t) (dp->sectors / 64) / 25; - fwrite(empty, 1, 2048, f); - SendMessage(h, PBM_SETPOS, (WPARAM) 1, (LPARAM) 0); + fwrite(empty, 1, 2048, f); + SendMessage(h, PBM_SETPOS, (WPARAM) 1, (LPARAM) 0); - while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { - TranslateMessage(&msg); - DispatchMessage(&msg); - } + while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { + TranslateMessage(&msg); + DispatchMessage(&msg); + } - fwrite(&empty[0x0800], 1, 2048, f); - free(empty); + fwrite(&empty[0x0800], 1, 2048, f); + free(empty); - SendMessage(h, PBM_SETPOS, (WPARAM) 1, (LPARAM) 0); + SendMessage(h, PBM_SETPOS, (WPARAM) 1, (LPARAM) 0); - while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { - TranslateMessage(&msg); - DispatchMessage(&msg); - } + while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { + TranslateMessage(&msg); + DispatchMessage(&msg); + } } empty = (unsigned char *) malloc(1048576); memset(empty, 0x00, 1048576); if (total_size2 > 0) { - empty2 = (unsigned char *) malloc(total_size2); - memset(empty, 0x00, total_size2); + empty2 = (unsigned char *) malloc(total_size2); + memset(empty, 0x00, total_size2); } for (i = 0; i < blocks_num; i++) { - fwrite(empty, 1, 1048576, f); + fwrite(empty, 1, 1048576, f); - SendMessage(h, PBM_SETPOS, (WPARAM) i + j, (LPARAM) 0); + SendMessage(h, PBM_SETPOS, (WPARAM) i + j, (LPARAM) 0); - while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { - TranslateMessage(&msg); - DispatchMessage(&msg); - } + while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { + TranslateMessage(&msg); + DispatchMessage(&msg); + } } if (total_size2 > 0) { - fwrite(empty2, 1, total_size2, f); + fwrite(empty2, 1, total_size2, f); - SendMessage(h, PBM_SETPOS, (WPARAM) pbar_max - 1, (LPARAM) 0); + SendMessage(h, PBM_SETPOS, (WPARAM) pbar_max - 1, (LPARAM) 0); - while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { - TranslateMessage(&msg); - DispatchMessage(&msg); - } + while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { + TranslateMessage(&msg); + DispatchMessage(&msg); + } } if (empty2 != NULL) - free(empty2); + free(empty2); free(empty); fclose(f); @@ -647,48 +641,44 @@ create_mo_sector_image(char *file_name, int8_t disk_size, uint8_t is_mdi, HWND h return 1; } +static int fdd_id, sb_part; -static int fdd_id, sb_part; - -static int file_type = 0; /* 0 = IMG, 1 = Japanese FDI, 2 = 86F */ -static char fd_file_name[1024]; - +static int file_type = 0; /* 0 = IMG, 1 = Japanese FDI, 2 = 86F */ +static char fd_file_name[1024]; /* Show a MessageBox dialog. This is nasty, I know. --FvK */ static int new_floppy_msgbox_header(HWND hwnd, int flags, void *header, void *message) { HWND h; - int i; + int i; - h = hwndMain; + h = hwndMain; hwndMain = hwnd; i = ui_msgbox_header(flags, header, message); hwndMain = h; - return(i); + return (i); } - static int new_floppy_msgbox_ex(HWND hwnd, int flags, void *header, void *message, void *btn1, void *btn2, void *btn3) { HWND h; - int i; + int i; - h = hwndMain; + h = hwndMain; hwndMain = hwnd; i = ui_msgbox_ex(flags, header, message, btn1, btn2, btn3); hwndMain = h; - return(i); + return (i); } - #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK #else @@ -696,185 +686,184 @@ static BOOL CALLBACK #endif NewFloppyDialogProcedure(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { - HWND h; - int i = 0; - int wcs_len, ext_offs; + HWND h; + int i = 0; + int wcs_len, ext_offs; wchar_t *ext; - uint8_t disk_size, rpm_mode; - int ret; - FILE *f; - int zip_types, mo_types, floppy_types; + uint8_t disk_size, rpm_mode; + int ret; + FILE *f; + int zip_types, mo_types, floppy_types; wchar_t *twcs; switch (message) { - case WM_INITDIALOG: - plat_pause(1); - memset(fd_file_name, 0, 1024); - h = GetDlgItem(hdlg, IDC_COMBO_DISK_SIZE); - if (is_zip) { - zip_types = zip_drives[fdd_id].is_250 ? 2 : 1; - for (i = 0; i < zip_types; i++) - SendMessage(h, CB_ADDSTRING, 0, win_get_string(IDS_5900 + i)); - } else if (is_mo) { - mo_types = 10; - /* TODO: Proper string ID's. */ - for (i = 0; i < mo_types; i++) - SendMessage(h, CB_ADDSTRING, 0, win_get_string(IDS_5902 + i)); - } else { - floppy_types = 12; - for (i = 0; i < floppy_types; i++) - SendMessage(h, CB_ADDSTRING, 0, win_get_string(IDS_5888 + i)); - } - SendMessage(h, CB_SETCURSEL, 0, 0); - EnableWindow(h, FALSE); - h = GetDlgItem(hdlg, IDC_COMBO_RPM_MODE); - for (i = 0; i < 4; i++) - SendMessage(h, CB_ADDSTRING, 0, win_get_string(IDS_6144 + i)); - SendMessage(h, CB_SETCURSEL, 0, 0); - EnableWindow(h, FALSE); - ShowWindow(h, SW_HIDE); - h = GetDlgItem(hdlg, IDT_FLP_RPM_MODE); - EnableWindow(h, FALSE); - ShowWindow(h, SW_HIDE); - h = GetDlgItem(hdlg, IDOK); - EnableWindow(h, FALSE); - h = GetDlgItem(hdlg, IDC_PBAR_IMG_CREATE); - EnableWindow(h, FALSE); - ShowWindow(h, SW_HIDE); - h = GetDlgItem(hdlg, IDT_FLP_PROGRESS); - EnableWindow(h, FALSE); - ShowWindow(h, SW_HIDE); - break; + case WM_INITDIALOG: + plat_pause(1); + memset(fd_file_name, 0, 1024); + h = GetDlgItem(hdlg, IDC_COMBO_DISK_SIZE); + if (is_zip) { + zip_types = zip_drives[fdd_id].is_250 ? 2 : 1; + for (i = 0; i < zip_types; i++) + SendMessage(h, CB_ADDSTRING, 0, win_get_string(IDS_5900 + i)); + } else if (is_mo) { + mo_types = 10; + /* TODO: Proper string ID's. */ + for (i = 0; i < mo_types; i++) + SendMessage(h, CB_ADDSTRING, 0, win_get_string(IDS_5902 + i)); + } else { + floppy_types = 12; + for (i = 0; i < floppy_types; i++) + SendMessage(h, CB_ADDSTRING, 0, win_get_string(IDS_5888 + i)); + } + SendMessage(h, CB_SETCURSEL, 0, 0); + EnableWindow(h, FALSE); + h = GetDlgItem(hdlg, IDC_COMBO_RPM_MODE); + for (i = 0; i < 4; i++) + SendMessage(h, CB_ADDSTRING, 0, win_get_string(IDS_6144 + i)); + SendMessage(h, CB_SETCURSEL, 0, 0); + EnableWindow(h, FALSE); + ShowWindow(h, SW_HIDE); + h = GetDlgItem(hdlg, IDT_FLP_RPM_MODE); + EnableWindow(h, FALSE); + ShowWindow(h, SW_HIDE); + h = GetDlgItem(hdlg, IDOK); + EnableWindow(h, FALSE); + h = GetDlgItem(hdlg, IDC_PBAR_IMG_CREATE); + EnableWindow(h, FALSE); + ShowWindow(h, SW_HIDE); + h = GetDlgItem(hdlg, IDT_FLP_PROGRESS); + EnableWindow(h, FALSE); + ShowWindow(h, SW_HIDE); + break; - case WM_COMMAND: - switch (LOWORD(wParam)) { - case IDOK: - h = GetDlgItem(hdlg, IDC_COMBO_DISK_SIZE); - disk_size = SendMessage(h, CB_GETCURSEL, 0, 0); - if (is_zip) - disk_size += 12; - if (!is_zip && !is_mo && (file_type == 2)) { - h = GetDlgItem(hdlg, IDC_COMBO_RPM_MODE); - rpm_mode = SendMessage(h, CB_GETCURSEL, 0, 0); - ret = create_86f(fd_file_name, disk_sizes[disk_size], rpm_mode); - } else { - if (is_zip) - ret = create_zip_sector_image(fd_file_name, disk_sizes[disk_size], file_type, hdlg); - if (is_mo) - ret = create_mo_sector_image(fd_file_name, disk_size, file_type, hdlg); - else - ret = create_sector_image(fd_file_name, disk_sizes[disk_size], file_type); - } - if (ret) { - if (is_zip) - zip_mount(fdd_id, fd_file_name, 0); - else if (is_mo) - mo_mount(fdd_id, fd_file_name, 0); - else - floppy_mount(fdd_id, fd_file_name, 0); - } else { - new_floppy_msgbox_header(hdlg, MBX_ERROR, (wchar_t *) IDS_4108, (wchar_t *) IDS_4115); - return TRUE; - } - /*FALLTHROUGH*/ - case IDCANCEL: - EndDialog(hdlg, 0); - plat_pause(0); - return TRUE; + case WM_COMMAND: + switch (LOWORD(wParam)) { + case IDOK: + h = GetDlgItem(hdlg, IDC_COMBO_DISK_SIZE); + disk_size = SendMessage(h, CB_GETCURSEL, 0, 0); + if (is_zip) + disk_size += 12; + if (!is_zip && !is_mo && (file_type == 2)) { + h = GetDlgItem(hdlg, IDC_COMBO_RPM_MODE); + rpm_mode = SendMessage(h, CB_GETCURSEL, 0, 0); + ret = create_86f(fd_file_name, disk_sizes[disk_size], rpm_mode); + } else { + if (is_zip) + ret = create_zip_sector_image(fd_file_name, disk_sizes[disk_size], file_type, hdlg); + if (is_mo) + ret = create_mo_sector_image(fd_file_name, disk_size, file_type, hdlg); + else + ret = create_sector_image(fd_file_name, disk_sizes[disk_size], file_type); + } + if (ret) { + if (is_zip) + zip_mount(fdd_id, fd_file_name, 0); + else if (is_mo) + mo_mount(fdd_id, fd_file_name, 0); + else + floppy_mount(fdd_id, fd_file_name, 0); + } else { + new_floppy_msgbox_header(hdlg, MBX_ERROR, (wchar_t *) IDS_4108, (wchar_t *) IDS_4115); + return TRUE; + } + /*FALLTHROUGH*/ + case IDCANCEL: + EndDialog(hdlg, 0); + plat_pause(0); + return TRUE; - case IDC_CFILE: - if (!file_dlg_w(hdlg, plat_get_string(is_mo ? IDS_2139 : (is_zip ? IDS_2055 : IDS_2062)), L"", NULL, 1)) { - if (!wcschr(wopenfilestring, L'.')) { - if (wcslen(wopenfilestring) && (wcslen(wopenfilestring) <= 256)) { - twcs = &wopenfilestring[wcslen(wopenfilestring)]; - twcs[0] = L'.'; - if (!is_zip && !is_mo && (filterindex == 3)) { - twcs[1] = L'8'; - twcs[2] = L'6'; - twcs[3] = L'f'; - } else { - twcs[1] = L'i'; - twcs[2] = L'm'; - twcs[3] = L'g'; - } - } - } - h = GetDlgItem(hdlg, IDC_EDIT_FILE_NAME); - f = _wfopen(wopenfilestring, L"rb"); - if (f != NULL) { - fclose(f); - if (new_floppy_msgbox_ex(hdlg, MBX_QUESTION, (wchar_t *) IDS_4111, (wchar_t *) IDS_4118, (wchar_t *) IDS_4120, (wchar_t *) IDS_4121, NULL) != 0) /* yes */ - return FALSE; - } - SendMessage(h, WM_SETTEXT, 0, (LPARAM) wopenfilestring); - memset(fd_file_name, 0, sizeof(fd_file_name)); - c16stombs(fd_file_name, wopenfilestring, sizeof(fd_file_name)); - h = GetDlgItem(hdlg, IDC_COMBO_DISK_SIZE); - if (!is_zip || zip_drives[fdd_id].is_250) - EnableWindow(h, TRUE); - wcs_len = wcslen(wopenfilestring); - ext_offs = wcs_len - 4; - ext = &(wopenfilestring[ext_offs]); - if (is_zip) { - if (((wcs_len >= 4) && !wcsicmp(ext, L".ZDI"))) - file_type = 1; - else - file_type = 0; - } else if (is_mo) { - if (((wcs_len >= 4) && !wcsicmp(ext, L".MDI"))) - file_type = 1; - else - file_type = 0; - } else { - if (((wcs_len >= 4) && !wcsicmp(ext, L".FDI"))) - file_type = 1; - else if ((((wcs_len >= 4) && !wcsicmp(ext, L".86F")) || (filterindex == 3))) - file_type = 2; - else - file_type = 0; - } - h = GetDlgItem(hdlg, IDT_FLP_RPM_MODE); - if (file_type == 2) { - EnableWindow(h, TRUE); - ShowWindow(h, SW_SHOW); - } else { - EnableWindow(h, FALSE); - ShowWindow(h, SW_HIDE); - } - h = GetDlgItem(hdlg, IDC_COMBO_RPM_MODE); - if (file_type == 2) { - EnableWindow(h, TRUE); - ShowWindow(h, SW_SHOW); - } else { - EnableWindow(h, FALSE); - ShowWindow(h, SW_HIDE); - } - h = GetDlgItem(hdlg, IDOK); - EnableWindow(h, TRUE); - return TRUE; - } else - return FALSE; + case IDC_CFILE: + if (!file_dlg_w(hdlg, plat_get_string(is_mo ? IDS_2139 : (is_zip ? IDS_2055 : IDS_2062)), L"", NULL, 1)) { + if (!wcschr(wopenfilestring, L'.')) { + if (wcslen(wopenfilestring) && (wcslen(wopenfilestring) <= 256)) { + twcs = &wopenfilestring[wcslen(wopenfilestring)]; + twcs[0] = L'.'; + if (!is_zip && !is_mo && (filterindex == 3)) { + twcs[1] = L'8'; + twcs[2] = L'6'; + twcs[3] = L'f'; + } else { + twcs[1] = L'i'; + twcs[2] = L'm'; + twcs[3] = L'g'; + } + } + } + h = GetDlgItem(hdlg, IDC_EDIT_FILE_NAME); + f = _wfopen(wopenfilestring, L"rb"); + if (f != NULL) { + fclose(f); + if (new_floppy_msgbox_ex(hdlg, MBX_QUESTION, (wchar_t *) IDS_4111, (wchar_t *) IDS_4118, (wchar_t *) IDS_4120, (wchar_t *) IDS_4121, NULL) != 0) /* yes */ + return FALSE; + } + SendMessage(h, WM_SETTEXT, 0, (LPARAM) wopenfilestring); + memset(fd_file_name, 0, sizeof(fd_file_name)); + c16stombs(fd_file_name, wopenfilestring, sizeof(fd_file_name)); + h = GetDlgItem(hdlg, IDC_COMBO_DISK_SIZE); + if (!is_zip || zip_drives[fdd_id].is_250) + EnableWindow(h, TRUE); + wcs_len = wcslen(wopenfilestring); + ext_offs = wcs_len - 4; + ext = &(wopenfilestring[ext_offs]); + if (is_zip) { + if (((wcs_len >= 4) && !wcsicmp(ext, L".ZDI"))) + file_type = 1; + else + file_type = 0; + } else if (is_mo) { + if (((wcs_len >= 4) && !wcsicmp(ext, L".MDI"))) + file_type = 1; + else + file_type = 0; + } else { + if (((wcs_len >= 4) && !wcsicmp(ext, L".FDI"))) + file_type = 1; + else if ((((wcs_len >= 4) && !wcsicmp(ext, L".86F")) || (filterindex == 3))) + file_type = 2; + else + file_type = 0; + } + h = GetDlgItem(hdlg, IDT_FLP_RPM_MODE); + if (file_type == 2) { + EnableWindow(h, TRUE); + ShowWindow(h, SW_SHOW); + } else { + EnableWindow(h, FALSE); + ShowWindow(h, SW_HIDE); + } + h = GetDlgItem(hdlg, IDC_COMBO_RPM_MODE); + if (file_type == 2) { + EnableWindow(h, TRUE); + ShowWindow(h, SW_SHOW); + } else { + EnableWindow(h, FALSE); + ShowWindow(h, SW_HIDE); + } + h = GetDlgItem(hdlg, IDOK); + EnableWindow(h, TRUE); + return TRUE; + } else + return FALSE; - default: - break; - } - break; + default: + break; + } + break; } - return(FALSE); + return (FALSE); } - void NewFloppyDialogCreate(HWND hwnd, int id, int part) { - fdd_id = id & 0x7f; + fdd_id = id & 0x7f; sb_part = part; - is_zip = !!(id & 0x80); - is_mo = !!(id & 0x100); + is_zip = !!(id & 0x80); + is_mo = !!(id & 0x100); if (is_zip && is_mo) { - fatal("Attempting to create a new image dialog that is for both ZIP and MO at the same time\n"); - return; + fatal("Attempting to create a new image dialog that is for both ZIP and MO at the same time\n"); + return; } - DialogBox(hinstance, (LPCTSTR)DLG_NEW_FLOPPY, hwnd, NewFloppyDialogProcedure); + DialogBox(hinstance, (LPCTSTR) DLG_NEW_FLOPPY, hwnd, NewFloppyDialogProcedure); } diff --git a/src/win/win_opendir.c b/src/win/win_opendir.c index 24fefc8c2..540083584 100644 --- a/src/win/win_opendir.c +++ b/src/win/win_opendir.c @@ -27,12 +27,10 @@ #include <86box/plat.h> #include <86box/plat_dir.h> - -#define SUFFIX "\\*" -#define FINDATA struct _finddata_t -#define FINDFIRST _findfirst -#define FINDNEXT _findnext - +#define SUFFIX "\\*" +#define FINDATA struct _finddata_t +#define FINDFIRST _findfirst +#define FINDNEXT _findnext /* Open a directory. */ DIR * @@ -43,17 +41,17 @@ opendir(const char *name) /* Create a new control structure. */ p = (DIR *) malloc(sizeof(DIR)); if (p == NULL) - return(NULL); + return (NULL); memset(p, 0x00, sizeof(DIR)); - p->flags = (DIR_F_LOWER | DIR_F_SANE); + p->flags = (DIR_F_LOWER | DIR_F_SANE); p->offset = 0; - p->sts = 0; + p->sts = 0; /* Create a work area. */ - p->dta = (char *)malloc(sizeof(FINDATA)); + p->dta = (char *) malloc(sizeof(FINDATA)); if (p->dta == NULL) { - free(p); - return(NULL); + free(p); + return (NULL); } memset(p->dta, 0x00, sizeof(struct _finddata_t)); @@ -63,38 +61,36 @@ opendir(const char *name) /* Special case: flag if we are in the root directory. */ if (strlen(p->dir) == 3) - p->flags |= DIR_F_ISROOT; + p->flags |= DIR_F_ISROOT; /* Start the searching by doing a FindFirst. */ - p->handle = FINDFIRST(p->dir, (FINDATA *)p->dta); + p->handle = FINDFIRST(p->dir, (FINDATA *) p->dta); if (p->handle < 0L) { - free(p->dta); - free(p); - return(NULL); + free(p->dta); + free(p); + return (NULL); } /* All OK. */ - return(p); + return (p); } - /* Close an open directory. */ int closedir(DIR *p) { if (p == NULL) - return(0); + return (0); _findclose(p->handle); if (p->dta != NULL) - free(p->dta); + free(p->dta); free(p); - return(0); + return (0); } - /* * Read the next entry from a directory. * Note that the DOS (FAT), Windows (FAT, FAT32) and Windows NTFS @@ -108,26 +104,26 @@ readdir(DIR *p) FINDATA *ffp; if (p == NULL || p->sts == 1) - return(NULL); + return (NULL); /* Format structure with current data. */ - ffp = (FINDATA *)p->dta; + ffp = (FINDATA *) p->dta; p->dent.d_ino = 1L; p->dent.d_off = p->offset++; - switch(p->offset) { - case 1: /* . */ - strncpy(p->dent.d_name, ".", MAXNAMLEN+1); - p->dent.d_reclen = 1; - break; + switch (p->offset) { + case 1: /* . */ + strncpy(p->dent.d_name, ".", MAXNAMLEN + 1); + p->dent.d_reclen = 1; + break; - case 2: /* .. */ - strncpy(p->dent.d_name, "..", MAXNAMLEN+1); - p->dent.d_reclen = 2; - break; + case 2: /* .. */ + strncpy(p->dent.d_name, "..", MAXNAMLEN + 1); + p->dent.d_reclen = 2; + break; - default: /* regular entry. */ - strncpy(p->dent.d_name, ffp->name, MAXNAMLEN+1); - p->dent.d_reclen = (char)strlen(p->dent.d_name); + default: /* regular entry. */ + strncpy(p->dent.d_name, ffp->name, MAXNAMLEN + 1); + p->dent.d_reclen = (char) strlen(p->dent.d_name); } /* Read next entry. */ @@ -135,48 +131,47 @@ readdir(DIR *p) /* Fake the "." and ".." entries here.. */ if ((p->flags & DIR_F_ISROOT) && (p->offset <= 2)) - return(&(p->dent)); + return (&(p->dent)); /* Get the next entry if we did not fake the above. */ if (FINDNEXT(p->handle, ffp) < 0) - p->sts = 1; + p->sts = 1; - return(&(p->dent)); + return (&(p->dent)); } - /* Report current position within the directory. */ long telldir(DIR *p) { - return(p->offset); + return (p->offset); } - void seekdir(DIR *p, long newpos) { short pos; /* First off, rewind to start of directory. */ - p->handle = FINDFIRST(p->dir, (FINDATA *)p->dta); + p->handle = FINDFIRST(p->dir, (FINDATA *) p->dta); if (p->handle < 0L) { - p->sts = 1; - return; + p->sts = 1; + return; } p->offset = 0; - p->sts = 0; + p->sts = 0; /* If we are rewinding, that's all... */ - if (newpos == 0L) return; + if (newpos == 0L) + return; /* Nope.. read entries until we hit the right spot. */ pos = (short) newpos; while (p->offset != pos) { - p->offset++; - if (FINDNEXT(p->handle, (FINDATA *)p->dta) < 0) { - p->sts = 1; - return; - } + p->offset++; + if (FINDNEXT(p->handle, (FINDATA *) p->dta) < 0) { + p->sts = 1; + return; + } } } diff --git a/src/win/win_opengl.c b/src/win/win_opengl.c index 271af462e..b473ce18f 100644 --- a/src/win/win_opengl.c +++ b/src/win/win_opengl.c @@ -45,11 +45,11 @@ #include #if !defined(_MSC_VER) || defined(__clang__) -#include +# include #else typedef LONG atomic_flag; -#define atomic_flag_clear(OBJ) InterlockedExchange(OBJ, 0) -#define atomic_flag_test_and_set(OBJ) InterlockedExchange(OBJ, 1) +# define atomic_flag_clear(OBJ) InterlockedExchange(OBJ, 0) +# define atomic_flag_test_and_set(OBJ) InterlockedExchange(OBJ, 1) #endif #include <86box/86box.h> @@ -61,91 +61,90 @@ typedef LONG atomic_flag; #include <86box/win_opengl.h> #include <86box/win_opengl_glslp.h> -static const int INIT_WIDTH = 640; -static const int INIT_HEIGHT = 400; -static const int BUFFERPIXELS = 4194304; /* Same size as render_buffer, pow(2048+64,2). */ -static const int BUFFERBYTES = 16777216; /* Pixel is 4 bytes. */ -static const int BUFFERCOUNT = 3; /* How many buffers to use for pixel transfer (2-3 is commonly recommended). */ -static const int ROW_LENGTH = 2048; /* Source buffer row lenght (including padding) */ +static const int INIT_WIDTH = 640; +static const int INIT_HEIGHT = 400; +static const int BUFFERPIXELS = 4194304; /* Same size as render_buffer, pow(2048+64,2). */ +static const int BUFFERBYTES = 16777216; /* Pixel is 4 bytes. */ +static const int BUFFERCOUNT = 3; /* How many buffers to use for pixel transfer (2-3 is commonly recommended). */ +static const int ROW_LENGTH = 2048; /* Source buffer row lenght (including padding) */ /** * @brief A dedicated OpenGL thread. * OpenGL context's don't handle multiple threads well. -*/ -static thread_t* thread = NULL; + */ +static thread_t *thread = NULL; /** * @brief A window usable with an OpenGL context -*/ -static SDL_Window* window = NULL; + */ +static SDL_Window *window = NULL; /** * @brief SDL window handle -*/ + */ static HWND window_hwnd = NULL; /** * @brief Parent window handle (hwndRender from win_ui) -*/ + */ static HWND parent = NULL; /** * @brief Events listened in OpenGL thread. -*/ -static union -{ - struct - { - HANDLE closing; - HANDLE resize; - HANDLE reload; - HANDLE blit_waiting; - }; - HANDLE asArray[4]; + */ +static union { + struct + { + HANDLE closing; + HANDLE resize; + HANDLE reload; + HANDLE blit_waiting; + }; + HANDLE asArray[4]; } sync_objects = { 0 }; /** * @brief Blit event parameters. -*/ + */ typedef struct { - int w, h; - void* buffer; /* Buffer for pixel transfer, allocated by gpu driver. */ - volatile atomic_flag in_use; /* Is buffer currently in use. */ - GLsync sync; /* Fence sync object used by opengl thread to track pixel transfer completion. */ + int w, h; + void *buffer; /* Buffer for pixel transfer, allocated by gpu driver. */ + volatile atomic_flag in_use; /* Is buffer currently in use. */ + GLsync sync; /* Fence sync object used by opengl thread to track pixel transfer completion. */ } blit_info_t; /** * @brief Array of blit_infos, one for each buffer. -*/ -static blit_info_t* blit_info = NULL; + */ +static blit_info_t *blit_info = NULL; /** * @brief Buffer index of next write operation. -*/ + */ static int write_pos = 0; /** * @brief Resize event parameters. -*/ + */ static struct { - int width, height, fullscreen, scaling_mode; - mutex_t* mutex; + int width, height, fullscreen, scaling_mode; + mutex_t *mutex; } resize_info = { 0 }; /** * @brief Renderer options -*/ + */ static struct { - int vsync; /* Vertical sync; 0 = off, 1 = on */ - int frametime; /* Frametime in microseconds, or -1 to sync with blitter */ - char shaderfile[512]; /* Shader file path. Match the length of openfilestring in win_dialog.c */ - int shaderfile_changed; /* Has shader file path changed. To prevent unnecessary shader recompilation. */ - int filter; /* 0 = Nearest, 1 = Linear */ - int filter_changed; /* Has filter changed. */ - mutex_t* mutex; + int vsync; /* Vertical sync; 0 = off, 1 = on */ + int frametime; /* Frametime in microseconds, or -1 to sync with blitter */ + char shaderfile[512]; /* Shader file path. Match the length of openfilestring in win_dialog.c */ + int shaderfile_changed; /* Has shader file path changed. To prevent unnecessary shader recompilation. */ + int filter; /* 0 = Nearest, 1 = Linear */ + int filter_changed; /* Has filter changed. */ + mutex_t *mutex; } options = { 0 }; /** @@ -153,18 +152,18 @@ static struct */ typedef struct { - GLuint vertexArrayID; - GLuint vertexBufferID; - GLuint textureID; - GLuint unpackBufferID; - GLuint shader_progID; + GLuint vertexArrayID; + GLuint vertexBufferID; + GLuint textureID; + GLuint unpackBufferID; + GLuint shader_progID; - /* Uniforms */ + /* Uniforms */ - GLint input_size; - GLint output_size; - GLint texture_size; - GLint frame_count; + GLint input_size; + GLint output_size; + GLint texture_size; + GLint frame_count; } gl_identifiers; /** @@ -173,26 +172,24 @@ typedef struct * Modifies the window style and sets the parent window. * WS_EX_NOACTIVATE keeps the window from stealing input focus. */ -static void set_parent_binding(int enable) +static void +set_parent_binding(int enable) { - long style = GetWindowLong(window_hwnd, GWL_STYLE); - long ex_style = GetWindowLong(window_hwnd, GWL_EXSTYLE); + long style = GetWindowLong(window_hwnd, GWL_STYLE); + long ex_style = GetWindowLong(window_hwnd, GWL_EXSTYLE); - if (enable) - { - style |= WS_CHILD; - ex_style |= WS_EX_NOACTIVATE; - } - else - { - style &= ~WS_CHILD; - ex_style &= ~WS_EX_NOACTIVATE; - } + if (enable) { + style |= WS_CHILD; + ex_style |= WS_EX_NOACTIVATE; + } else { + style &= ~WS_CHILD; + ex_style &= ~WS_EX_NOACTIVATE; + } - SetWindowLong(window_hwnd, GWL_STYLE, style); - SetWindowLong(window_hwnd, GWL_EXSTYLE, ex_style); + SetWindowLong(window_hwnd, GWL_STYLE, style); + SetWindowLong(window_hwnd, GWL_EXSTYLE, ex_style); - SetParent(window_hwnd, enable ? parent : NULL); + SetParent(window_hwnd, enable ? parent : NULL); } /** @@ -202,273 +199,264 @@ static void set_parent_binding(int enable) * @param lParam * @param fullscreen * @return Was message handled -*/ -static int handle_window_messages(UINT message, WPARAM wParam, LPARAM lParam, int fullscreen) + */ +static int +handle_window_messages(UINT message, WPARAM wParam, LPARAM lParam, int fullscreen) { - switch (message) - { - case WM_LBUTTONUP: - case WM_LBUTTONDOWN: - case WM_MBUTTONUP: - case WM_MBUTTONDOWN: - case WM_RBUTTONUP: - case WM_RBUTTONDOWN: - if (!fullscreen) - { - /* Bring main window to front. */ - SetForegroundWindow(GetAncestor(parent, GA_ROOT)); + switch (message) { + case WM_LBUTTONUP: + case WM_LBUTTONDOWN: + case WM_MBUTTONUP: + case WM_MBUTTONDOWN: + case WM_RBUTTONUP: + case WM_RBUTTONDOWN: + if (!fullscreen) { + /* Bring main window to front. */ + SetForegroundWindow(GetAncestor(parent, GA_ROOT)); - /* Mouse events that enter and exit capture. */ - PostMessage(parent, message, wParam, lParam); - } - return 1; - case WM_KEYDOWN: - case WM_KEYUP: - case WM_SYSKEYDOWN: - case WM_SYSKEYUP: - if (fullscreen) - { - PostMessage(parent, message, wParam, lParam); - } - return 1; - case WM_INPUT: - if (fullscreen) - { - /* Raw input handler from win_ui.c : input_proc */ + /* Mouse events that enter and exit capture. */ + PostMessage(parent, message, wParam, lParam); + } + return 1; + case WM_KEYDOWN: + case WM_KEYUP: + case WM_SYSKEYDOWN: + case WM_SYSKEYUP: + if (fullscreen) { + PostMessage(parent, message, wParam, lParam); + } + return 1; + case WM_INPUT: + if (fullscreen) { + /* Raw input handler from win_ui.c : input_proc */ - UINT size = 0; - PRAWINPUT raw = NULL; + UINT size = 0; + PRAWINPUT raw = NULL; - /* Here we read the raw input data */ - GetRawInputData((HRAWINPUT)(LPARAM)lParam, RID_INPUT, NULL, &size, sizeof(RAWINPUTHEADER)); - raw = (PRAWINPUT)malloc(size); - if (GetRawInputData((HRAWINPUT)(LPARAM)lParam, RID_INPUT, raw, &size, sizeof(RAWINPUTHEADER)) == size) { - switch (raw->header.dwType) - { - case RIM_TYPEKEYBOARD: - keyboard_handle(raw); - break; - case RIM_TYPEMOUSE: - win_mouse_handle(raw); - break; - case RIM_TYPEHID: - win_joystick_handle(raw); - break; - } - } - free(raw); - } - return 1; - case WM_MOUSELEAVE: - if (fullscreen) - { - /* Leave fullscreen if mouse leaves the renderer window. */ - PostMessage(GetAncestor(parent, GA_ROOT), WM_LEAVEFULLSCREEN, 0, 0); - } - return 0; - } + /* Here we read the raw input data */ + GetRawInputData((HRAWINPUT) (LPARAM) lParam, RID_INPUT, NULL, &size, sizeof(RAWINPUTHEADER)); + raw = (PRAWINPUT) malloc(size); + if (GetRawInputData((HRAWINPUT) (LPARAM) lParam, RID_INPUT, raw, &size, sizeof(RAWINPUTHEADER)) == size) { + switch (raw->header.dwType) { + case RIM_TYPEKEYBOARD: + keyboard_handle(raw); + break; + case RIM_TYPEMOUSE: + win_mouse_handle(raw); + break; + case RIM_TYPEHID: + win_joystick_handle(raw); + break; + } + } + free(raw); + } + return 1; + case WM_MOUSELEAVE: + if (fullscreen) { + /* Leave fullscreen if mouse leaves the renderer window. */ + PostMessage(GetAncestor(parent, GA_ROOT), WM_LEAVEFULLSCREEN, 0, 0); + } + return 0; + } - return 0; + return 0; } /** * @brief (Re-)apply shaders to OpenGL context. * @param gl Identifiers from initialize -*/ -static void apply_shaders(gl_identifiers* gl) + */ +static void +apply_shaders(gl_identifiers *gl) { - GLuint old_shader_ID = 0; + GLuint old_shader_ID = 0; - if (gl->shader_progID != 0) - old_shader_ID = gl->shader_progID; + if (gl->shader_progID != 0) + old_shader_ID = gl->shader_progID; - if (strlen(options.shaderfile) > 0) - gl->shader_progID = load_custom_shaders(options.shaderfile); - else - gl->shader_progID = 0; + if (strlen(options.shaderfile) > 0) + gl->shader_progID = load_custom_shaders(options.shaderfile); + else + gl->shader_progID = 0; - if (gl->shader_progID == 0) - gl->shader_progID = load_default_shaders(); + if (gl->shader_progID == 0) + gl->shader_progID = load_default_shaders(); - glUseProgram(gl->shader_progID); + glUseProgram(gl->shader_progID); - /* Delete old shader if one exists (changing shader) */ - if (old_shader_ID != 0) - glDeleteProgram(old_shader_ID); + /* Delete old shader if one exists (changing shader) */ + if (old_shader_ID != 0) + glDeleteProgram(old_shader_ID); - GLint vertex_coord = glGetAttribLocation(gl->shader_progID, "VertexCoord"); - if (vertex_coord != -1) - { - glEnableVertexAttribArray(vertex_coord); - glVertexAttribPointer(vertex_coord, 2, GL_FLOAT, GL_FALSE, 8 * sizeof(GLfloat), 0); - } + GLint vertex_coord = glGetAttribLocation(gl->shader_progID, "VertexCoord"); + if (vertex_coord != -1) { + glEnableVertexAttribArray(vertex_coord); + glVertexAttribPointer(vertex_coord, 2, GL_FLOAT, GL_FALSE, 8 * sizeof(GLfloat), 0); + } - GLint tex_coord = glGetAttribLocation(gl->shader_progID, "TexCoord"); - if (tex_coord != -1) - { - glEnableVertexAttribArray(tex_coord); - glVertexAttribPointer(tex_coord, 2, GL_FLOAT, GL_FALSE, 8 * sizeof(GLfloat), (void*)(2 * sizeof(GLfloat))); - } + GLint tex_coord = glGetAttribLocation(gl->shader_progID, "TexCoord"); + if (tex_coord != -1) { + glEnableVertexAttribArray(tex_coord); + glVertexAttribPointer(tex_coord, 2, GL_FLOAT, GL_FALSE, 8 * sizeof(GLfloat), (void *) (2 * sizeof(GLfloat))); + } - GLint color = glGetAttribLocation(gl->shader_progID, "Color"); - if (color != -1) - { - glEnableVertexAttribArray(color); - glVertexAttribPointer(color, 4, GL_FLOAT, GL_FALSE, 8 * sizeof(GLfloat), (void*)(4 * sizeof(GLfloat))); - } + GLint color = glGetAttribLocation(gl->shader_progID, "Color"); + if (color != -1) { + glEnableVertexAttribArray(color); + glVertexAttribPointer(color, 4, GL_FLOAT, GL_FALSE, 8 * sizeof(GLfloat), (void *) (4 * sizeof(GLfloat))); + } - GLint mvp_matrix = glGetUniformLocation(gl->shader_progID, "MVPMatrix"); - if (mvp_matrix != -1) - { - static const GLfloat mvp[] = { - 1.f, 0.f, 0.f, 0.f, - 0.f, 1.f, 0.f, 0.f, - 0.f, 0.f, 1.f, 0.f, - 0.f, 0.f, 0.f, 1.f - }; - glUniformMatrix4fv(mvp_matrix, 1, GL_FALSE, mvp); - } + GLint mvp_matrix = glGetUniformLocation(gl->shader_progID, "MVPMatrix"); + if (mvp_matrix != -1) { + static const GLfloat mvp[] = { + 1.f, 0.f, 0.f, 0.f, + 0.f, 1.f, 0.f, 0.f, + 0.f, 0.f, 1.f, 0.f, + 0.f, 0.f, 0.f, 1.f + }; + glUniformMatrix4fv(mvp_matrix, 1, GL_FALSE, mvp); + } - GLint frame_direction = glGetUniformLocation(gl->shader_progID, "FrameDirection"); - if (frame_direction != -1) - glUniform1i(frame_direction, 1); /* always forward */ + GLint frame_direction = glGetUniformLocation(gl->shader_progID, "FrameDirection"); + if (frame_direction != -1) + glUniform1i(frame_direction, 1); /* always forward */ - gl->input_size = glGetUniformLocation(gl->shader_progID, "InputSize"); - gl->output_size = glGetUniformLocation(gl->shader_progID, "OutputSize"); - gl->texture_size = glGetUniformLocation(gl->shader_progID, "TextureSize"); - gl->frame_count = glGetUniformLocation(gl->shader_progID, "FrameCount"); + gl->input_size = glGetUniformLocation(gl->shader_progID, "InputSize"); + gl->output_size = glGetUniformLocation(gl->shader_progID, "OutputSize"); + gl->texture_size = glGetUniformLocation(gl->shader_progID, "TextureSize"); + gl->frame_count = glGetUniformLocation(gl->shader_progID, "FrameCount"); } /** * @brief Initialize OpenGL context * @return Identifiers -*/ -static int initialize_glcontext(gl_identifiers* gl) + */ +static int +initialize_glcontext(gl_identifiers *gl) { - /* Vertex, texture 2d coordinates and color (white) making a quad as triangle strip */ - static const GLfloat surface[] = { - -1.f, 1.f, 0.f, 0.f, 1.f, 1.f, 1.f, 1.f, - 1.f, 1.f, 1.f, 0.f, 1.f, 1.f, 1.f, 1.f, - -1.f, -1.f, 0.f, 1.f, 1.f, 1.f, 1.f, 1.f, - 1.f, -1.f, 1.f, 1.f, 1.f, 1.f, 1.f, 1.f - }; + /* Vertex, texture 2d coordinates and color (white) making a quad as triangle strip */ + static const GLfloat surface[] = { + -1.f, 1.f, 0.f, 0.f, 1.f, 1.f, 1.f, 1.f, + 1.f, 1.f, 1.f, 0.f, 1.f, 1.f, 1.f, 1.f, + -1.f, -1.f, 0.f, 1.f, 1.f, 1.f, 1.f, 1.f, + 1.f, -1.f, 1.f, 1.f, 1.f, 1.f, 1.f, 1.f + }; - glGenVertexArrays(1, &gl->vertexArrayID); + glGenVertexArrays(1, &gl->vertexArrayID); - glBindVertexArray(gl->vertexArrayID); + glBindVertexArray(gl->vertexArrayID); - glGenBuffers(1, &gl->vertexBufferID); - glBindBuffer(GL_ARRAY_BUFFER, gl->vertexBufferID); - glBufferData(GL_ARRAY_BUFFER, sizeof(surface), surface, GL_STATIC_DRAW); + glGenBuffers(1, &gl->vertexBufferID); + glBindBuffer(GL_ARRAY_BUFFER, gl->vertexBufferID); + glBufferData(GL_ARRAY_BUFFER, sizeof(surface), surface, GL_STATIC_DRAW); - glGenTextures(1, &gl->textureID); - glBindTexture(GL_TEXTURE_2D, gl->textureID); + glGenTextures(1, &gl->textureID); + glBindTexture(GL_TEXTURE_2D, gl->textureID); - static const GLfloat border_color[] = { 0.f, 0.f, 0.f, 1.f }; - glTexParameterfv(GL_TEXTURE_2D, GL_TEXTURE_BORDER_COLOR, border_color); - glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP_TO_BORDER); - glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_T, GL_CLAMP_TO_BORDER); - glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, options.filter ? GL_LINEAR : GL_NEAREST); - glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, options.filter ? GL_LINEAR : GL_NEAREST); + static const GLfloat border_color[] = { 0.f, 0.f, 0.f, 1.f }; + glTexParameterfv(GL_TEXTURE_2D, GL_TEXTURE_BORDER_COLOR, border_color); + glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP_TO_BORDER); + glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_T, GL_CLAMP_TO_BORDER); + glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, options.filter ? GL_LINEAR : GL_NEAREST); + glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, options.filter ? GL_LINEAR : GL_NEAREST); - glTexImage2D(GL_TEXTURE_2D, 0, GL_RGBA8, INIT_WIDTH, INIT_HEIGHT, 0, GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV, NULL); + glTexImage2D(GL_TEXTURE_2D, 0, GL_RGBA8, INIT_WIDTH, INIT_HEIGHT, 0, GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV, NULL); - glGenBuffers(1, &gl->unpackBufferID); - glBindBuffer(GL_PIXEL_UNPACK_BUFFER, gl->unpackBufferID); + glGenBuffers(1, &gl->unpackBufferID); + glBindBuffer(GL_PIXEL_UNPACK_BUFFER, gl->unpackBufferID); - void* buf_ptr = NULL; + void *buf_ptr = NULL; - if (GLAD_GL_ARB_buffer_storage) - { - /* Create persistent buffer for pixel transfer. */ - glBufferStorage(GL_PIXEL_UNPACK_BUFFER, BUFFERBYTES * BUFFERCOUNT, NULL, GL_MAP_WRITE_BIT | GL_MAP_PERSISTENT_BIT | GL_MAP_COHERENT_BIT); + if (GLAD_GL_ARB_buffer_storage) { + /* Create persistent buffer for pixel transfer. */ + glBufferStorage(GL_PIXEL_UNPACK_BUFFER, BUFFERBYTES * BUFFERCOUNT, NULL, GL_MAP_WRITE_BIT | GL_MAP_PERSISTENT_BIT | GL_MAP_COHERENT_BIT); - buf_ptr = glMapBufferRange(GL_PIXEL_UNPACK_BUFFER, 0, BUFFERBYTES * BUFFERCOUNT, GL_MAP_WRITE_BIT | GL_MAP_PERSISTENT_BIT | GL_MAP_COHERENT_BIT); - } - else - { - /* Fallback; create our own buffer. */ - buf_ptr = malloc(BUFFERBYTES * BUFFERCOUNT); + buf_ptr = glMapBufferRange(GL_PIXEL_UNPACK_BUFFER, 0, BUFFERBYTES * BUFFERCOUNT, GL_MAP_WRITE_BIT | GL_MAP_PERSISTENT_BIT | GL_MAP_COHERENT_BIT); + } else { + /* Fallback; create our own buffer. */ + buf_ptr = malloc(BUFFERBYTES * BUFFERCOUNT); - glBufferData(GL_PIXEL_UNPACK_BUFFER, BUFFERBYTES * BUFFERCOUNT, NULL, GL_STREAM_DRAW); - } + glBufferData(GL_PIXEL_UNPACK_BUFFER, BUFFERBYTES * BUFFERCOUNT, NULL, GL_STREAM_DRAW); + } - if (buf_ptr == NULL) - return 0; /* Most likely out of memory. */ + if (buf_ptr == NULL) + return 0; /* Most likely out of memory. */ - /* Split the buffer area for each blit_info and set them available for use. */ - for (int i = 0; i < BUFFERCOUNT; i++) - { - blit_info[i].buffer = (byte*)buf_ptr + BUFFERBYTES * i; - atomic_flag_clear(&blit_info[i].in_use); - } + /* Split the buffer area for each blit_info and set them available for use. */ + for (int i = 0; i < BUFFERCOUNT; i++) { + blit_info[i].buffer = (byte *) buf_ptr + BUFFERBYTES * i; + atomic_flag_clear(&blit_info[i].in_use); + } - glClearColor(0.f, 0.f, 0.f, 1.f); + glClearColor(0.f, 0.f, 0.f, 1.f); - apply_shaders(gl); + apply_shaders(gl); - return 1; + return 1; } /** * @brief Clean up OpenGL context * @param gl Identifiers from initialize -*/ -static void finalize_glcontext(gl_identifiers* gl) + */ +static void +finalize_glcontext(gl_identifiers *gl) { - if (GLAD_GL_ARB_buffer_storage) - glUnmapBuffer(GL_PIXEL_UNPACK_BUFFER); - else - free(blit_info[0].buffer); + if (GLAD_GL_ARB_buffer_storage) + glUnmapBuffer(GL_PIXEL_UNPACK_BUFFER); + else + free(blit_info[0].buffer); - glDeleteProgram(gl->shader_progID); - glDeleteBuffers(1, &gl->unpackBufferID); - glDeleteTextures(1, &gl->textureID); - glDeleteBuffers(1, &gl->vertexBufferID); - glDeleteVertexArrays(1, &gl->vertexArrayID); + glDeleteProgram(gl->shader_progID); + glDeleteBuffers(1, &gl->unpackBufferID); + glDeleteTextures(1, &gl->textureID); + glDeleteBuffers(1, &gl->vertexBufferID); + glDeleteVertexArrays(1, &gl->vertexArrayID); } /** * @brief Renders a frame and swaps the buffer * @param gl Identifiers from initialize -*/ -static void render_and_swap(gl_identifiers* gl) + */ +static void +render_and_swap(gl_identifiers *gl) { - static int frame_counter = 0; + static int frame_counter = 0; - glClear(GL_COLOR_BUFFER_BIT); - glDrawArrays(GL_TRIANGLE_STRIP, 0, 4); + glClear(GL_COLOR_BUFFER_BIT); + glDrawArrays(GL_TRIANGLE_STRIP, 0, 4); - SDL_GL_SwapWindow(window); + SDL_GL_SwapWindow(window); - if (gl->frame_count != -1) - glUniform1i(gl->frame_count, frame_counter = (frame_counter + 1) & 1023); + if (gl->frame_count != -1) + glUniform1i(gl->frame_count, frame_counter = (frame_counter + 1) & 1023); } /** * @brief Handle failure in OpenGL thread. * Keeps the thread sleeping until closing. -*/ -static void opengl_fail() + */ +static void +opengl_fail() { - if (window != NULL) - { - SDL_DestroyWindow(window); - window = NULL; - } + if (window != NULL) { + SDL_DestroyWindow(window); + window = NULL; + } - wchar_t* message = plat_get_string(IDS_2152); - wchar_t* header = plat_get_string(IDS_2153); - MessageBox(parent, header, message, MB_OK); + wchar_t *message = plat_get_string(IDS_2152); + wchar_t *header = plat_get_string(IDS_2153); + MessageBox(parent, header, message, MB_OK); - WaitForSingleObject(sync_objects.closing, INFINITE); + WaitForSingleObject(sync_objects.closing, INFINITE); - _endthread(); + _endthread(); } -static void __stdcall opengl_debugmsg_callback(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar* message, const void* userParam) +static void __stdcall opengl_debugmsg_callback(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *message, const void *userParam) { - pclog("OpenGL: %s\n", message); + pclog("OpenGL: %s\n", message); } /** @@ -476,571 +464,531 @@ static void __stdcall opengl_debugmsg_callback(GLenum source, GLenum type, GLuin * * OpenGL context should be accessed only from this single thread. * Events are used to synchronize communication. -*/ -static void opengl_main(void* param) + */ +static void +opengl_main(void *param) { - /* Initialize COM library for this thread before SDL does so. */ - CoInitializeEx(NULL, COINIT_MULTITHREADED); - - SDL_InitSubSystem(SDL_INIT_VIDEO); - - SDL_SetHint(SDL_HINT_MOUSE_FOCUS_CLICKTHROUGH, "1"); /* Is this actually doing anything...? */ - - SDL_GL_SetAttribute(SDL_GL_CONTEXT_MAJOR_VERSION, 3); - SDL_GL_SetAttribute(SDL_GL_CONTEXT_MINOR_VERSION, 0); - SDL_GL_SetAttribute(SDL_GL_CONTEXT_PROFILE_MASK, SDL_GL_CONTEXT_PROFILE_CORE); - - if (GLAD_GL_ARB_debug_output && log_path[0] != '\0') - SDL_GL_SetAttribute(SDL_GL_CONTEXT_FLAGS, SDL_GL_CONTEXT_DEBUG_FLAG | SDL_GL_CONTEXT_FORWARD_COMPATIBLE_FLAG); - else - SDL_GL_SetAttribute(SDL_GL_CONTEXT_FLAGS, SDL_GL_CONTEXT_FORWARD_COMPATIBLE_FLAG); - - window = SDL_CreateWindow("86Box OpenGL Renderer", 0, 0, resize_info.width, resize_info.height, SDL_WINDOW_OPENGL | SDL_WINDOW_BORDERLESS); - - if (window == NULL) - { - pclog("OpenGL: failed to create OpenGL window.\n"); - opengl_fail(); - } - - /* Keep track of certain parameters, only changed in this thread to avoid race conditions */ - int fullscreen = resize_info.fullscreen, video_width = INIT_WIDTH, video_height = INIT_HEIGHT, - output_width = resize_info.width, output_height = resize_info.height, frametime = options.frametime; - - SDL_SysWMinfo wmi = { 0 }; - SDL_VERSION(&wmi.version); - SDL_GetWindowWMInfo(window, &wmi); - - if (wmi.subsystem != SDL_SYSWM_WINDOWS) - { - pclog("OpenGL: subsystem is not SDL_SYSWM_WINDOWS.\n"); - opengl_fail(); - } - - window_hwnd = wmi.info.win.window; - - if (!fullscreen) - set_parent_binding(1); - else - SDL_SetWindowFullscreen(window, SDL_WINDOW_FULLSCREEN_DESKTOP); - - SDL_GLContext context = SDL_GL_CreateContext(window); - - if (context == NULL) - { - pclog("OpenGL: failed to create OpenGL context.\n"); - opengl_fail(); - } - - SDL_GL_SetSwapInterval(options.vsync); - - if (!gladLoadGLLoader(SDL_GL_GetProcAddress)) - { - pclog("OpenGL: failed to set OpenGL loader.\n"); - SDL_GL_DeleteContext(context); - opengl_fail(); - } - - if (GLAD_GL_ARB_debug_output && log_path[0] != '\0') - { - glEnable(GL_DEBUG_OUTPUT_SYNCHRONOUS_ARB); - glDebugMessageControlARB(GL_DONT_CARE, GL_DEBUG_TYPE_PERFORMANCE_ARB, GL_DONT_CARE, 0, 0, GL_FALSE); - glDebugMessageCallbackARB(opengl_debugmsg_callback, NULL); - } - - pclog("OpenGL vendor: %s\n", glGetString(GL_VENDOR)); - pclog("OpenGL renderer: %s\n", glGetString(GL_RENDERER)); - pclog("OpenGL version: %s\n", glGetString(GL_VERSION)); - pclog("OpenGL shader language version: %s\n", glGetString(GL_SHADING_LANGUAGE_VERSION)); - - /* Check that the driver actually reports version 3.0 or later */ - GLint major = -1; - glGetIntegerv(GL_MAJOR_VERSION, &major); - if (major < 3) - { - pclog("OpenGL: Minimum OpenGL version 3.0 is required.\n"); - SDL_GL_DeleteContext(context); - opengl_fail(); - } - - /* Check if errors have been generated at this point */ - GLenum gl_error = glGetError(); - if (gl_error != GL_NO_ERROR) - { - /* Log up to 10 errors */ - int i = 0; - do - { - pclog("OpenGL: Error %u\n", gl_error); - i++; - } - while((gl_error = glGetError()) != GL_NO_ERROR && i < 10); - - SDL_GL_DeleteContext(context); - opengl_fail(); - } - - gl_identifiers gl = { 0 }; - - if (!initialize_glcontext(&gl)) - { - pclog("OpenGL: failed to initialize.\n"); - finalize_glcontext(&gl); - SDL_GL_DeleteContext(context); - opengl_fail(); - } - - if (gl.frame_count != -1) - glUniform1i(gl.frame_count, 0); - if (gl.output_size != -1) - glUniform2f(gl.output_size, output_width, output_height); - - uint32_t last_swap = plat_get_micro_ticks() - frametime; - - int read_pos = 0; /* Buffer index of next read operation. */ - - /* Render loop */ - int closing = 0; - while (!closing) - { - /* Rendering is done right after handling an event. */ - if (frametime < 0) - render_and_swap(&gl); - - DWORD wait_result = WAIT_TIMEOUT; - - do - { - /* Rendering is timed by frame capping. */ - if (frametime >= 0) - { - uint32_t ticks = plat_get_micro_ticks(); - - uint32_t elapsed = ticks - last_swap; - - if (elapsed + 1000 > frametime) - { - /* Spin the remaining time (< 1ms) to next frame */ - while (elapsed < frametime) - { - Sleep(0); /* Yield processor time */ - ticks = plat_get_micro_ticks(); - elapsed = ticks - last_swap; - } - - render_and_swap(&gl); - last_swap = ticks; - } - } - - if (GLAD_GL_ARB_sync) - { - /* Check if commands that use buffers have been completed. */ - for (int i = 0; i < BUFFERCOUNT; i++) - { - if (blit_info[i].sync != NULL && glClientWaitSync(blit_info[i].sync, GL_SYNC_FLUSH_COMMANDS_BIT, 0) != GL_TIMEOUT_EXPIRED) - { - glDeleteSync(blit_info[i].sync); - blit_info[i].sync = NULL; - atomic_flag_clear(&blit_info[i].in_use); - } - } - } - - /* Handle window messages */ - MSG msg; - while (PeekMessage(&msg, NULL, 0, 0, PM_REMOVE)) - { - if (msg.hwnd != window_hwnd || !handle_window_messages(msg.message, msg.wParam, msg.lParam, fullscreen)) - { - TranslateMessage(&msg); - DispatchMessage(&msg); - } - } - - /* Wait for synchronized events for 1ms before going back to window events */ - wait_result = WaitForMultipleObjects(sizeof(sync_objects) / sizeof(HANDLE), sync_objects.asArray, FALSE, 1); - - } while (wait_result == WAIT_TIMEOUT); - - HANDLE sync_event = sync_objects.asArray[wait_result - WAIT_OBJECT_0]; - - if (sync_event == sync_objects.closing) - { - closing = 1; - } - else if (sync_event == sync_objects.blit_waiting) - { - blit_info_t* info = &blit_info[read_pos]; - - if (video_width != info->w || video_height != info->h) - { - video_width = info->w; - video_height = info->h; - - /* Resize the texture */ - glBindBuffer(GL_PIXEL_UNPACK_BUFFER, 0); - glTexImage2D(GL_TEXTURE_2D, 0, GL_RGBA8, video_width, video_height, 0, GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV, NULL); - glBindBuffer(GL_PIXEL_UNPACK_BUFFER, gl.unpackBufferID); - - if (fullscreen) - SetEvent(sync_objects.resize); - } - - if (!GLAD_GL_ARB_buffer_storage) - { - /* Fallback method, copy data to pixel buffer. */ - glBufferSubData(GL_PIXEL_UNPACK_BUFFER, BUFFERBYTES * read_pos, info->h * ROW_LENGTH * sizeof(uint32_t), info->buffer); - } - - /* Update texture from pixel buffer. */ - glPixelStorei(GL_UNPACK_SKIP_PIXELS, BUFFERPIXELS * read_pos); - glPixelStorei(GL_UNPACK_ROW_LENGTH, ROW_LENGTH); - glTexSubImage2D(GL_TEXTURE_2D, 0, 0, 0, info->w, info->h, GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV, NULL); - - if (GLAD_GL_ARB_sync) - { - /* Add fence to track when above gl commands are complete. */ - info->sync = glFenceSync(GL_SYNC_GPU_COMMANDS_COMPLETE, 0); - } - else - { - /* No sync objects; block until commands are complete. */ - glFinish(); - atomic_flag_clear(&info->in_use); - } - - read_pos = (read_pos + 1) % BUFFERCOUNT; - - /* Update uniforms */ - if (gl.input_size != -1) - glUniform2f(gl.input_size, video_width, video_height); - if (gl.texture_size != -1) - glUniform2f(gl.texture_size, video_width, video_height); - } - else if (sync_event == sync_objects.resize) - { - thread_wait_mutex(resize_info.mutex); - - if (fullscreen != resize_info.fullscreen) - { - fullscreen = resize_info.fullscreen; - - set_parent_binding(!fullscreen); - - SDL_SetWindowFullscreen(window, fullscreen ? SDL_WINDOW_FULLSCREEN_DESKTOP : 0); - - if (fullscreen) - { - SetForegroundWindow(window_hwnd); - SetFocus(window_hwnd); - - /* Clip cursor to prevent it moving to another monitor. */ - RECT rect; - GetWindowRect(window_hwnd, &rect); - ClipCursor(&rect); - } - else - ClipCursor(NULL); - } - - if (fullscreen) - { - int width, height, pad_x = 0, pad_y = 0, px_size = 1; - float ratio = 0; - const float ratio43 = 4.f / 3.f; - - SDL_GetWindowSize(window, &width, &height); - - if (video_width > 0 && video_height > 0) - { - switch (resize_info.scaling_mode) - { - case FULLSCR_SCALE_INT: - px_size = max(min(width / video_width, height / video_height), 1); - - pad_x = width - (video_width * px_size); - pad_y = height - (video_height * px_size); - break; - - case FULLSCR_SCALE_KEEPRATIO: - ratio = (float)video_width / (float)video_height; - case FULLSCR_SCALE_43: - if (ratio == 0) - ratio = ratio43; - if (ratio < ((float)width / (float)height)) - pad_x = width - (int)roundf((float)height * ratio); - else - pad_y = height - (int)roundf((float)width / ratio); - break; - - case FULLSCR_SCALE_FULL: - default: - break; - } - } - - output_width = width - pad_x; - output_height = height - pad_y; - - glViewport(pad_x / 2, pad_y / 2, output_width, output_height); - - if (gl.output_size != -1) - glUniform2f(gl.output_size, output_width, output_height); - } - else - { - SDL_SetWindowSize(window, resize_info.width, resize_info.height); - - /* SWP_NOZORDER is needed for child window and SDL doesn't enable it. */ - SetWindowPos(window_hwnd, parent, 0, 0, resize_info.width, resize_info.height, SWP_NOZORDER | SWP_NOCOPYBITS | SWP_NOMOVE | SWP_NOACTIVATE); - - output_width = resize_info.width; - output_height = resize_info.height; - - glViewport(0, 0, resize_info.width, resize_info.height); - - if (gl.output_size != -1) - glUniform2f(gl.output_size, resize_info.width, resize_info.height); - } - - thread_release_mutex(resize_info.mutex); - } - else if (sync_event == sync_objects.reload) - { - thread_wait_mutex(options.mutex); - - frametime = options.frametime; - - SDL_GL_SetSwapInterval(options.vsync); - - if (options.shaderfile_changed) - { - /* Change shader program. */ - apply_shaders(&gl); - - /* Uniforms need to be updated after proram change. */ - if (gl.input_size != -1) - glUniform2f(gl.input_size, video_width, video_height); - if (gl.output_size != -1) - glUniform2f(gl.output_size, output_width, output_height); - if (gl.texture_size != -1) - glUniform2f(gl.texture_size, video_width, video_height); - if (gl.frame_count != -1) - glUniform1i(gl.frame_count, 0); - - options.shaderfile_changed = 0; - } - - if (options.filter_changed) - { - glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, options.filter ? GL_LINEAR : GL_NEAREST); - glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, options.filter ? GL_LINEAR : GL_NEAREST); - - options.filter_changed = 0; - } - - thread_release_mutex(options.mutex); - } - - /* Keep cursor hidden in full screen and mouse capture */ - int show_cursor = !(fullscreen || !!mouse_capture); - if (SDL_ShowCursor(-1) != show_cursor) - SDL_ShowCursor(show_cursor); - } - - if (GLAD_GL_ARB_sync) - { - for (int i = 0; i < BUFFERCOUNT; i++) - { - if (blit_info[i].sync != NULL) - glDeleteSync(blit_info[i].sync); - } - } - - finalize_glcontext(&gl); - - SDL_GL_DeleteContext(context); - - set_parent_binding(0); - - SDL_DestroyWindow(window); - - window = NULL; + /* Initialize COM library for this thread before SDL does so. */ + CoInitializeEx(NULL, COINIT_MULTITHREADED); + + SDL_InitSubSystem(SDL_INIT_VIDEO); + + SDL_SetHint(SDL_HINT_MOUSE_FOCUS_CLICKTHROUGH, "1"); /* Is this actually doing anything...? */ + + SDL_GL_SetAttribute(SDL_GL_CONTEXT_MAJOR_VERSION, 3); + SDL_GL_SetAttribute(SDL_GL_CONTEXT_MINOR_VERSION, 0); + SDL_GL_SetAttribute(SDL_GL_CONTEXT_PROFILE_MASK, SDL_GL_CONTEXT_PROFILE_CORE); + + if (GLAD_GL_ARB_debug_output && log_path[0] != '\0') + SDL_GL_SetAttribute(SDL_GL_CONTEXT_FLAGS, SDL_GL_CONTEXT_DEBUG_FLAG | SDL_GL_CONTEXT_FORWARD_COMPATIBLE_FLAG); + else + SDL_GL_SetAttribute(SDL_GL_CONTEXT_FLAGS, SDL_GL_CONTEXT_FORWARD_COMPATIBLE_FLAG); + + window = SDL_CreateWindow("86Box OpenGL Renderer", 0, 0, resize_info.width, resize_info.height, SDL_WINDOW_OPENGL | SDL_WINDOW_BORDERLESS); + + if (window == NULL) { + pclog("OpenGL: failed to create OpenGL window.\n"); + opengl_fail(); + } + + /* Keep track of certain parameters, only changed in this thread to avoid race conditions */ + int fullscreen = resize_info.fullscreen, video_width = INIT_WIDTH, video_height = INIT_HEIGHT, + output_width = resize_info.width, output_height = resize_info.height, frametime = options.frametime; + + SDL_SysWMinfo wmi = { 0 }; + SDL_VERSION(&wmi.version); + SDL_GetWindowWMInfo(window, &wmi); + + if (wmi.subsystem != SDL_SYSWM_WINDOWS) { + pclog("OpenGL: subsystem is not SDL_SYSWM_WINDOWS.\n"); + opengl_fail(); + } + + window_hwnd = wmi.info.win.window; + + if (!fullscreen) + set_parent_binding(1); + else + SDL_SetWindowFullscreen(window, SDL_WINDOW_FULLSCREEN_DESKTOP); + + SDL_GLContext context = SDL_GL_CreateContext(window); + + if (context == NULL) { + pclog("OpenGL: failed to create OpenGL context.\n"); + opengl_fail(); + } + + SDL_GL_SetSwapInterval(options.vsync); + + if (!gladLoadGLLoader(SDL_GL_GetProcAddress)) { + pclog("OpenGL: failed to set OpenGL loader.\n"); + SDL_GL_DeleteContext(context); + opengl_fail(); + } + + if (GLAD_GL_ARB_debug_output && log_path[0] != '\0') { + glEnable(GL_DEBUG_OUTPUT_SYNCHRONOUS_ARB); + glDebugMessageControlARB(GL_DONT_CARE, GL_DEBUG_TYPE_PERFORMANCE_ARB, GL_DONT_CARE, 0, 0, GL_FALSE); + glDebugMessageCallbackARB(opengl_debugmsg_callback, NULL); + } + + pclog("OpenGL vendor: %s\n", glGetString(GL_VENDOR)); + pclog("OpenGL renderer: %s\n", glGetString(GL_RENDERER)); + pclog("OpenGL version: %s\n", glGetString(GL_VERSION)); + pclog("OpenGL shader language version: %s\n", glGetString(GL_SHADING_LANGUAGE_VERSION)); + + /* Check that the driver actually reports version 3.0 or later */ + GLint major = -1; + glGetIntegerv(GL_MAJOR_VERSION, &major); + if (major < 3) { + pclog("OpenGL: Minimum OpenGL version 3.0 is required.\n"); + SDL_GL_DeleteContext(context); + opengl_fail(); + } + + /* Check if errors have been generated at this point */ + GLenum gl_error = glGetError(); + if (gl_error != GL_NO_ERROR) { + /* Log up to 10 errors */ + int i = 0; + do { + pclog("OpenGL: Error %u\n", gl_error); + i++; + } while ((gl_error = glGetError()) != GL_NO_ERROR && i < 10); + + SDL_GL_DeleteContext(context); + opengl_fail(); + } + + gl_identifiers gl = { 0 }; + + if (!initialize_glcontext(&gl)) { + pclog("OpenGL: failed to initialize.\n"); + finalize_glcontext(&gl); + SDL_GL_DeleteContext(context); + opengl_fail(); + } + + if (gl.frame_count != -1) + glUniform1i(gl.frame_count, 0); + if (gl.output_size != -1) + glUniform2f(gl.output_size, output_width, output_height); + + uint32_t last_swap = plat_get_micro_ticks() - frametime; + + int read_pos = 0; /* Buffer index of next read operation. */ + + /* Render loop */ + int closing = 0; + while (!closing) { + /* Rendering is done right after handling an event. */ + if (frametime < 0) + render_and_swap(&gl); + + DWORD wait_result = WAIT_TIMEOUT; + + do { + /* Rendering is timed by frame capping. */ + if (frametime >= 0) { + uint32_t ticks = plat_get_micro_ticks(); + + uint32_t elapsed = ticks - last_swap; + + if (elapsed + 1000 > frametime) { + /* Spin the remaining time (< 1ms) to next frame */ + while (elapsed < frametime) { + Sleep(0); /* Yield processor time */ + ticks = plat_get_micro_ticks(); + elapsed = ticks - last_swap; + } + + render_and_swap(&gl); + last_swap = ticks; + } + } + + if (GLAD_GL_ARB_sync) { + /* Check if commands that use buffers have been completed. */ + for (int i = 0; i < BUFFERCOUNT; i++) { + if (blit_info[i].sync != NULL && glClientWaitSync(blit_info[i].sync, GL_SYNC_FLUSH_COMMANDS_BIT, 0) != GL_TIMEOUT_EXPIRED) { + glDeleteSync(blit_info[i].sync); + blit_info[i].sync = NULL; + atomic_flag_clear(&blit_info[i].in_use); + } + } + } + + /* Handle window messages */ + MSG msg; + while (PeekMessage(&msg, NULL, 0, 0, PM_REMOVE)) { + if (msg.hwnd != window_hwnd || !handle_window_messages(msg.message, msg.wParam, msg.lParam, fullscreen)) { + TranslateMessage(&msg); + DispatchMessage(&msg); + } + } + + /* Wait for synchronized events for 1ms before going back to window events */ + wait_result = WaitForMultipleObjects(sizeof(sync_objects) / sizeof(HANDLE), sync_objects.asArray, FALSE, 1); + + } while (wait_result == WAIT_TIMEOUT); + + HANDLE sync_event = sync_objects.asArray[wait_result - WAIT_OBJECT_0]; + + if (sync_event == sync_objects.closing) { + closing = 1; + } else if (sync_event == sync_objects.blit_waiting) { + blit_info_t *info = &blit_info[read_pos]; + + if (video_width != info->w || video_height != info->h) { + video_width = info->w; + video_height = info->h; + + /* Resize the texture */ + glBindBuffer(GL_PIXEL_UNPACK_BUFFER, 0); + glTexImage2D(GL_TEXTURE_2D, 0, GL_RGBA8, video_width, video_height, 0, GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV, NULL); + glBindBuffer(GL_PIXEL_UNPACK_BUFFER, gl.unpackBufferID); + + if (fullscreen) + SetEvent(sync_objects.resize); + } + + if (!GLAD_GL_ARB_buffer_storage) { + /* Fallback method, copy data to pixel buffer. */ + glBufferSubData(GL_PIXEL_UNPACK_BUFFER, BUFFERBYTES * read_pos, info->h * ROW_LENGTH * sizeof(uint32_t), info->buffer); + } + + /* Update texture from pixel buffer. */ + glPixelStorei(GL_UNPACK_SKIP_PIXELS, BUFFERPIXELS * read_pos); + glPixelStorei(GL_UNPACK_ROW_LENGTH, ROW_LENGTH); + glTexSubImage2D(GL_TEXTURE_2D, 0, 0, 0, info->w, info->h, GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV, NULL); + + if (GLAD_GL_ARB_sync) { + /* Add fence to track when above gl commands are complete. */ + info->sync = glFenceSync(GL_SYNC_GPU_COMMANDS_COMPLETE, 0); + } else { + /* No sync objects; block until commands are complete. */ + glFinish(); + atomic_flag_clear(&info->in_use); + } + + read_pos = (read_pos + 1) % BUFFERCOUNT; + + /* Update uniforms */ + if (gl.input_size != -1) + glUniform2f(gl.input_size, video_width, video_height); + if (gl.texture_size != -1) + glUniform2f(gl.texture_size, video_width, video_height); + } else if (sync_event == sync_objects.resize) { + thread_wait_mutex(resize_info.mutex); + + if (fullscreen != resize_info.fullscreen) { + fullscreen = resize_info.fullscreen; + + set_parent_binding(!fullscreen); + + SDL_SetWindowFullscreen(window, fullscreen ? SDL_WINDOW_FULLSCREEN_DESKTOP : 0); + + if (fullscreen) { + SetForegroundWindow(window_hwnd); + SetFocus(window_hwnd); + + /* Clip cursor to prevent it moving to another monitor. */ + RECT rect; + GetWindowRect(window_hwnd, &rect); + ClipCursor(&rect); + } else + ClipCursor(NULL); + } + + if (fullscreen) { + int width, height, pad_x = 0, pad_y = 0, px_size = 1; + float ratio = 0; + const float ratio43 = 4.f / 3.f; + + SDL_GetWindowSize(window, &width, &height); + + if (video_width > 0 && video_height > 0) { + switch (resize_info.scaling_mode) { + case FULLSCR_SCALE_INT: + px_size = max(min(width / video_width, height / video_height), 1); + + pad_x = width - (video_width * px_size); + pad_y = height - (video_height * px_size); + break; + + case FULLSCR_SCALE_KEEPRATIO: + ratio = (float) video_width / (float) video_height; + case FULLSCR_SCALE_43: + if (ratio == 0) + ratio = ratio43; + if (ratio < ((float) width / (float) height)) + pad_x = width - (int) roundf((float) height * ratio); + else + pad_y = height - (int) roundf((float) width / ratio); + break; - CoUninitialize(); + case FULLSCR_SCALE_FULL: + default: + break; + } + } + + output_width = width - pad_x; + output_height = height - pad_y; + + glViewport(pad_x / 2, pad_y / 2, output_width, output_height); + + if (gl.output_size != -1) + glUniform2f(gl.output_size, output_width, output_height); + } else { + SDL_SetWindowSize(window, resize_info.width, resize_info.height); + + /* SWP_NOZORDER is needed for child window and SDL doesn't enable it. */ + SetWindowPos(window_hwnd, parent, 0, 0, resize_info.width, resize_info.height, SWP_NOZORDER | SWP_NOCOPYBITS | SWP_NOMOVE | SWP_NOACTIVATE); + + output_width = resize_info.width; + output_height = resize_info.height; + + glViewport(0, 0, resize_info.width, resize_info.height); + + if (gl.output_size != -1) + glUniform2f(gl.output_size, resize_info.width, resize_info.height); + } + + thread_release_mutex(resize_info.mutex); + } else if (sync_event == sync_objects.reload) { + thread_wait_mutex(options.mutex); + + frametime = options.frametime; + + SDL_GL_SetSwapInterval(options.vsync); + + if (options.shaderfile_changed) { + /* Change shader program. */ + apply_shaders(&gl); + + /* Uniforms need to be updated after proram change. */ + if (gl.input_size != -1) + glUniform2f(gl.input_size, video_width, video_height); + if (gl.output_size != -1) + glUniform2f(gl.output_size, output_width, output_height); + if (gl.texture_size != -1) + glUniform2f(gl.texture_size, video_width, video_height); + if (gl.frame_count != -1) + glUniform1i(gl.frame_count, 0); + + options.shaderfile_changed = 0; + } + + if (options.filter_changed) { + glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, options.filter ? GL_LINEAR : GL_NEAREST); + glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, options.filter ? GL_LINEAR : GL_NEAREST); + + options.filter_changed = 0; + } + + thread_release_mutex(options.mutex); + } + + /* Keep cursor hidden in full screen and mouse capture */ + int show_cursor = !(fullscreen || !!mouse_capture); + if (SDL_ShowCursor(-1) != show_cursor) + SDL_ShowCursor(show_cursor); + } + + if (GLAD_GL_ARB_sync) { + for (int i = 0; i < BUFFERCOUNT; i++) { + if (blit_info[i].sync != NULL) + glDeleteSync(blit_info[i].sync); + } + } + + finalize_glcontext(&gl); + + SDL_GL_DeleteContext(context); + + set_parent_binding(0); + + SDL_DestroyWindow(window); + + window = NULL; + + CoUninitialize(); } -static void opengl_blit(int x, int y, int w, int h, int monitor_index) +static void +opengl_blit(int x, int y, int w, int h, int monitor_index) { - int row; + int row; - if ((x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (buffer32 == NULL) || (thread == NULL) || - atomic_flag_test_and_set(&blit_info[write_pos].in_use) || monitor_index >= 1) - { - video_blit_complete_monitor(monitor_index); - return; - } + if ((x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (buffer32 == NULL) || (thread == NULL) || atomic_flag_test_and_set(&blit_info[write_pos].in_use) || monitor_index >= 1) { + video_blit_complete_monitor(monitor_index); + return; + } - for (row = 0; row < h; ++row) - video_copy(&(((uint8_t *) blit_info[write_pos].buffer)[row * ROW_LENGTH * sizeof(uint32_t)]), &(buffer32->line[y + row][x]), w * sizeof(uint32_t)); + for (row = 0; row < h; ++row) + video_copy(&(((uint8_t *) blit_info[write_pos].buffer)[row * ROW_LENGTH * sizeof(uint32_t)]), &(buffer32->line[y + row][x]), w * sizeof(uint32_t)); - if (monitors[0].mon_screenshots) - video_screenshot(blit_info[write_pos].buffer, 0, 0, ROW_LENGTH); + if (monitors[0].mon_screenshots) + video_screenshot(blit_info[write_pos].buffer, 0, 0, ROW_LENGTH); - video_blit_complete(); + video_blit_complete(); - blit_info[write_pos].w = w; - blit_info[write_pos].h = h; + blit_info[write_pos].w = w; + blit_info[write_pos].h = h; - write_pos = (write_pos + 1) % BUFFERCOUNT; + write_pos = (write_pos + 1) % BUFFERCOUNT; - ReleaseSemaphore(sync_objects.blit_waiting, 1, NULL); + ReleaseSemaphore(sync_objects.blit_waiting, 1, NULL); } -static int framerate_to_frametime(int framerate) +static int +framerate_to_frametime(int framerate) { - if (framerate < 0) - return -1; + if (framerate < 0) + return -1; - return (int)ceilf(1.e6f / (float)framerate); + return (int) ceilf(1.e6f / (float) framerate); } -int opengl_init(HWND hwnd) +int +opengl_init(HWND hwnd) { - if (thread != NULL) - return 0; + if (thread != NULL) + return 0; - for (int i = 0; i < sizeof(sync_objects) / sizeof(HANDLE); i++) - sync_objects.asArray[i] = CreateEvent(NULL, FALSE, FALSE, NULL); + for (int i = 0; i < sizeof(sync_objects) / sizeof(HANDLE); i++) + sync_objects.asArray[i] = CreateEvent(NULL, FALSE, FALSE, NULL); - sync_objects.closing = CreateEvent(NULL, FALSE, FALSE, NULL); - sync_objects.resize = CreateEvent(NULL, FALSE, FALSE, NULL); - sync_objects.reload = CreateEvent(NULL, FALSE, FALSE, NULL); - sync_objects.blit_waiting = CreateSemaphore(NULL, 0, BUFFERCOUNT * 2, NULL); + sync_objects.closing = CreateEvent(NULL, FALSE, FALSE, NULL); + sync_objects.resize = CreateEvent(NULL, FALSE, FALSE, NULL); + sync_objects.reload = CreateEvent(NULL, FALSE, FALSE, NULL); + sync_objects.blit_waiting = CreateSemaphore(NULL, 0, BUFFERCOUNT * 2, NULL); - parent = hwnd; + parent = hwnd; - RECT parent_size; + RECT parent_size; - GetWindowRect(parent, &parent_size); + GetWindowRect(parent, &parent_size); - resize_info.width = parent_size.right - parent_size.left; - resize_info.height = parent_size.bottom - parent_size.top; - resize_info.fullscreen = video_fullscreen & 1; - resize_info.scaling_mode = video_fullscreen_scale; - resize_info.mutex = thread_create_mutex(); + resize_info.width = parent_size.right - parent_size.left; + resize_info.height = parent_size.bottom - parent_size.top; + resize_info.fullscreen = video_fullscreen & 1; + resize_info.scaling_mode = video_fullscreen_scale; + resize_info.mutex = thread_create_mutex(); - options.vsync = video_vsync; - options.frametime = framerate_to_frametime(video_framerate); - strcpy_s(options.shaderfile, sizeof(options.shaderfile), video_shader); - options.shaderfile_changed = 0; - options.filter = video_filter_method; - options.filter_changed = 0; - options.mutex = thread_create_mutex(); + options.vsync = video_vsync; + options.frametime = framerate_to_frametime(video_framerate); + strcpy_s(options.shaderfile, sizeof(options.shaderfile), video_shader); + options.shaderfile_changed = 0; + options.filter = video_filter_method; + options.filter_changed = 0; + options.mutex = thread_create_mutex(); - blit_info = (blit_info_t*)malloc(BUFFERCOUNT * sizeof(blit_info_t)); - memset(blit_info, 0, BUFFERCOUNT * sizeof(blit_info_t)); + blit_info = (blit_info_t *) malloc(BUFFERCOUNT * sizeof(blit_info_t)); + memset(blit_info, 0, BUFFERCOUNT * sizeof(blit_info_t)); - /* Buffers are not yet allocated, set them as in use. */ - for (int i = 0; i < BUFFERCOUNT; i++) - atomic_flag_test_and_set(&blit_info[i].in_use); + /* Buffers are not yet allocated, set them as in use. */ + for (int i = 0; i < BUFFERCOUNT; i++) + atomic_flag_test_and_set(&blit_info[i].in_use); - write_pos = 0; + write_pos = 0; - thread = thread_create(opengl_main, (void*)NULL); + thread = thread_create(opengl_main, (void *) NULL); - atexit(opengl_close); + atexit(opengl_close); - video_setblit(opengl_blit); + video_setblit(opengl_blit); - return 1; + return 1; } -int opengl_pause(void) +int +opengl_pause(void) { - return 0; + return 0; } -void opengl_close(void) +void +opengl_close(void) { - if (thread == NULL) - return; + if (thread == NULL) + return; - SetEvent(sync_objects.closing); + SetEvent(sync_objects.closing); - thread_wait(thread); + thread_wait(thread); - thread_close_mutex(resize_info.mutex); - thread_close_mutex(options.mutex); + thread_close_mutex(resize_info.mutex); + thread_close_mutex(options.mutex); - thread = NULL; + thread = NULL; - free(blit_info); + free(blit_info); - for (int i = 0; i < sizeof(sync_objects) / sizeof(HANDLE); i++) - { - CloseHandle(sync_objects.asArray[i]); - sync_objects.asArray[i] = (HANDLE)NULL; - } + for (int i = 0; i < sizeof(sync_objects) / sizeof(HANDLE); i++) { + CloseHandle(sync_objects.asArray[i]); + sync_objects.asArray[i] = (HANDLE) NULL; + } - parent = NULL; + parent = NULL; } -void opengl_set_fs(int fs) +void +opengl_set_fs(int fs) { - if (thread == NULL) - return; + if (thread == NULL) + return; - thread_wait_mutex(resize_info.mutex); + thread_wait_mutex(resize_info.mutex); - resize_info.fullscreen = fs; - resize_info.scaling_mode = video_fullscreen_scale; + resize_info.fullscreen = fs; + resize_info.scaling_mode = video_fullscreen_scale; - thread_release_mutex(resize_info.mutex); + thread_release_mutex(resize_info.mutex); - SetEvent(sync_objects.resize); + SetEvent(sync_objects.resize); } -void opengl_resize(int w, int h) +void +opengl_resize(int w, int h) { - if (thread == NULL) - return; + if (thread == NULL) + return; - thread_wait_mutex(resize_info.mutex); + thread_wait_mutex(resize_info.mutex); - resize_info.width = w; - resize_info.height = h; - resize_info.scaling_mode = video_fullscreen_scale; + resize_info.width = w; + resize_info.height = h; + resize_info.scaling_mode = video_fullscreen_scale; - thread_release_mutex(resize_info.mutex); + thread_release_mutex(resize_info.mutex); - SetEvent(sync_objects.resize); + SetEvent(sync_objects.resize); } -void opengl_reload(void) +void +opengl_reload(void) { - if (thread == NULL) - return; + if (thread == NULL) + return; - thread_wait_mutex(options.mutex); + thread_wait_mutex(options.mutex); - options.vsync = video_vsync; - options.frametime = framerate_to_frametime(video_framerate); + options.vsync = video_vsync; + options.frametime = framerate_to_frametime(video_framerate); - if (strcmp(video_shader, options.shaderfile) != 0) - { - strcpy_s(options.shaderfile, sizeof(options.shaderfile), video_shader); - options.shaderfile_changed = 1; - } + if (strcmp(video_shader, options.shaderfile) != 0) { + strcpy_s(options.shaderfile, sizeof(options.shaderfile), video_shader); + options.shaderfile_changed = 1; + } - if (video_filter_method != options.filter) - { - options.filter = video_filter_method; - options.filter_changed = 1; - } + if (video_filter_method != options.filter) { + options.filter = video_filter_method; + options.filter_changed = 1; + } - thread_release_mutex(options.mutex); + thread_release_mutex(options.mutex); - SetEvent(sync_objects.reload); + SetEvent(sync_objects.reload); } diff --git a/src/win/win_opengl_glslp.c b/src/win/win_opengl_glslp.c index d8916bd83..10278b799 100644 --- a/src/win/win_opengl_glslp.c +++ b/src/win/win_opengl_glslp.c @@ -40,10 +40,10 @@ #include <86box/plat.h> #include <86box/win_opengl_glslp.h> - /** - * @brief Default vertex shader. +/** + * @brief Default vertex shader. */ -static const GLchar* vertex_shader = "#version 130\n\ +static const GLchar *vertex_shader = "#version 130\n\ in vec2 VertexCoord;\n\ in vec2 TexCoord;\n\ out vec2 tex;\n\ @@ -55,7 +55,7 @@ void main(){\n\ /** * @brief Default fragment shader. */ -static const GLchar* fragment_shader = "#version 130\n\ +static const GLchar *fragment_shader = "#version 130\n\ in vec2 tex;\n\ uniform sampler2D texsampler;\n\ out vec4 color;\n\ @@ -65,208 +65,204 @@ void main() {\n\ /** * @brief OpenGL shader program build targets -*/ -typedef enum -{ - OPENGL_BUILD_TARGET_VERTEX, - OPENGL_BUILD_TARGET_FRAGMENT, - OPENGL_BUILD_TARGET_LINK + */ +typedef enum { + OPENGL_BUILD_TARGET_VERTEX, + OPENGL_BUILD_TARGET_FRAGMENT, + OPENGL_BUILD_TARGET_LINK } opengl_build_target_t; /** * @brief Reads a whole file into a null terminated string. * @param Path Path to the file relative to executable path. * @return Pointer to the string or NULL on error. Remember to free() after use. -*/ -static char* read_file_to_string(const char* path) + */ +static char * +read_file_to_string(const char *path) { - FILE* file_handle = plat_fopen(path, "rb"); + FILE *file_handle = plat_fopen(path, "rb"); - if (file_handle != NULL) - { - /* get file size */ - fseek(file_handle, 0, SEEK_END); + if (file_handle != NULL) { + /* get file size */ + fseek(file_handle, 0, SEEK_END); - size_t file_size = (size_t)ftell(file_handle); + size_t file_size = (size_t) ftell(file_handle); - fseek(file_handle, 0, SEEK_SET); + fseek(file_handle, 0, SEEK_SET); - /* read to buffer and close */ - char* content = (char*)malloc(sizeof(char) * (file_size + 1)); + /* read to buffer and close */ + char *content = (char *) malloc(sizeof(char) * (file_size + 1)); - if (!content) - return NULL; + if (!content) + return NULL; - size_t length = fread(content, sizeof(char), file_size, file_handle); + size_t length = fread(content, sizeof(char), file_size, file_handle); - fclose(file_handle); + fclose(file_handle); - content[length] = 0; + content[length] = 0; - return content; - } - return NULL; + return content; + } + return NULL; } -static int check_status(GLuint id, opengl_build_target_t build_target, const char* shader_path) +static int +check_status(GLuint id, opengl_build_target_t build_target, const char *shader_path) { - GLint status = GL_FALSE; + GLint status = GL_FALSE; - if (build_target != OPENGL_BUILD_TARGET_LINK) - glGetShaderiv(id, GL_COMPILE_STATUS, &status); - else - glGetProgramiv(id, GL_LINK_STATUS, &status); + if (build_target != OPENGL_BUILD_TARGET_LINK) + glGetShaderiv(id, GL_COMPILE_STATUS, &status); + else + glGetProgramiv(id, GL_LINK_STATUS, &status); - if (status == GL_FALSE) - { - int info_log_length; + if (status == GL_FALSE) { + int info_log_length; - if (build_target != OPENGL_BUILD_TARGET_LINK) - glGetShaderiv(id, GL_INFO_LOG_LENGTH, &info_log_length); - else - glGetProgramiv(id, GL_INFO_LOG_LENGTH, &info_log_length); + if (build_target != OPENGL_BUILD_TARGET_LINK) + glGetShaderiv(id, GL_INFO_LOG_LENGTH, &info_log_length); + else + glGetProgramiv(id, GL_INFO_LOG_LENGTH, &info_log_length); - GLchar* info_log_text = (GLchar*)malloc(sizeof(GLchar) * info_log_length); + GLchar *info_log_text = (GLchar *) malloc(sizeof(GLchar) * info_log_length); - if (build_target != OPENGL_BUILD_TARGET_LINK) - glGetShaderInfoLog(id, info_log_length, NULL, info_log_text); - else - glGetProgramInfoLog(id, info_log_length, NULL, info_log_text); + if (build_target != OPENGL_BUILD_TARGET_LINK) + glGetShaderInfoLog(id, info_log_length, NULL, info_log_text); + else + glGetProgramInfoLog(id, info_log_length, NULL, info_log_text); - const char* reason = NULL; + const char *reason = NULL; - switch (build_target) - { - case OPENGL_BUILD_TARGET_VERTEX: - reason = "compiling vertex shader"; - break; - case OPENGL_BUILD_TARGET_FRAGMENT: - reason = "compiling fragment shader"; - break; - case OPENGL_BUILD_TARGET_LINK: - reason = "linking shader program"; - break; - } + switch (build_target) { + case OPENGL_BUILD_TARGET_VERTEX: + reason = "compiling vertex shader"; + break; + case OPENGL_BUILD_TARGET_FRAGMENT: + reason = "compiling fragment shader"; + break; + case OPENGL_BUILD_TARGET_LINK: + reason = "linking shader program"; + break; + } - /* Shader compilation log can be lengthy, mark begin and end */ - const char* line = "--------------------"; + /* Shader compilation log can be lengthy, mark begin and end */ + const char *line = "--------------------"; - pclog("OpenGL: Error when %s in %s:\n%sBEGIN%s\n%s\n%s END %s\n", reason, shader_path, line, line, info_log_text, line, line); + pclog("OpenGL: Error when %s in %s:\n%sBEGIN%s\n%s\n%s END %s\n", reason, shader_path, line, line, info_log_text, line, line); - free(info_log_text); + free(info_log_text); - return 0; - } + return 0; + } - return 1; + return 1; } /** * @brief Compile custom shaders into a program. * @return Shader program identifier. -*/ -GLuint load_custom_shaders(const char* path) + */ +GLuint +load_custom_shaders(const char *path) { - char* shader = read_file_to_string(path); + char *shader = read_file_to_string(path); - if (shader != NULL) - { - int success = 1; + if (shader != NULL) { + int success = 1; - const char* vertex_sources[3] = { "#version 130\n", "#define VERTEX\n", shader }; - const char* fragment_sources[3] = { "#version 130\n", "#define FRAGMENT\n", shader }; + const char *vertex_sources[3] = { "#version 130\n", "#define VERTEX\n", shader }; + const char *fragment_sources[3] = { "#version 130\n", "#define FRAGMENT\n", shader }; - /* Check if the shader program defines version directive */ - char* version_start = strstr(shader, "#version"); + /* Check if the shader program defines version directive */ + char *version_start = strstr(shader, "#version"); - /* If the shader program contains a version directive, - it must be captured and placed as the first statement. */ - if (version_start != NULL) - { - /* Version directive found, search the line end */ - char* version_end = strchr(version_start, '\n'); + /* If the shader program contains a version directive, + it must be captured and placed as the first statement. */ + if (version_start != NULL) { + /* Version directive found, search the line end */ + char *version_end = strchr(version_start, '\n'); - if (version_end != NULL) - { - char version[30] = ""; + if (version_end != NULL) { + char version[30] = ""; - size_t version_len = MIN(version_end - version_start + 1, 29); + size_t version_len = MIN(version_end - version_start + 1, 29); - strncat(version, version_start, version_len); + strncat(version, version_start, version_len); - /* replace the default version directive */ - vertex_sources[0] = version; - fragment_sources[0] = version; - } + /* replace the default version directive */ + vertex_sources[0] = version; + fragment_sources[0] = version; + } - /* Comment out the original version directive - as only one is allowed. */ - memset(version_start, '/', 2); - } + /* Comment out the original version directive + as only one is allowed. */ + memset(version_start, '/', 2); + } - GLuint vertex_id = glCreateShader(GL_VERTEX_SHADER); - GLuint fragment_id = glCreateShader(GL_FRAGMENT_SHADER); + GLuint vertex_id = glCreateShader(GL_VERTEX_SHADER); + GLuint fragment_id = glCreateShader(GL_FRAGMENT_SHADER); - glShaderSource(vertex_id, 3, vertex_sources, NULL); - glCompileShader(vertex_id); - success *= check_status(vertex_id, OPENGL_BUILD_TARGET_VERTEX, path); + glShaderSource(vertex_id, 3, vertex_sources, NULL); + glCompileShader(vertex_id); + success *= check_status(vertex_id, OPENGL_BUILD_TARGET_VERTEX, path); - glShaderSource(fragment_id, 3, fragment_sources, NULL); - glCompileShader(fragment_id); - success *= check_status(fragment_id, OPENGL_BUILD_TARGET_FRAGMENT, path); + glShaderSource(fragment_id, 3, fragment_sources, NULL); + glCompileShader(fragment_id); + success *= check_status(fragment_id, OPENGL_BUILD_TARGET_FRAGMENT, path); - free(shader); + free(shader); - GLuint prog_id = 0; + GLuint prog_id = 0; - if (success) - { - prog_id = glCreateProgram(); + if (success) { + prog_id = glCreateProgram(); - glAttachShader(prog_id, vertex_id); - glAttachShader(prog_id, fragment_id); - glLinkProgram(prog_id); - check_status(prog_id, OPENGL_BUILD_TARGET_LINK, path); + glAttachShader(prog_id, vertex_id); + glAttachShader(prog_id, fragment_id); + glLinkProgram(prog_id); + check_status(prog_id, OPENGL_BUILD_TARGET_LINK, path); - glDetachShader(prog_id, vertex_id); - glDetachShader(prog_id, fragment_id); - } + glDetachShader(prog_id, vertex_id); + glDetachShader(prog_id, fragment_id); + } - glDeleteShader(vertex_id); - glDeleteShader(fragment_id); + glDeleteShader(vertex_id); + glDeleteShader(fragment_id); - return prog_id; - } - return 0; + return prog_id; + } + return 0; } /** * @brief Compile default shaders into a program. * @return Shader program identifier. -*/ -GLuint load_default_shaders() + */ +GLuint +load_default_shaders() { - GLuint vertex_id = glCreateShader(GL_VERTEX_SHADER); - GLuint fragment_id = glCreateShader(GL_FRAGMENT_SHADER); + GLuint vertex_id = glCreateShader(GL_VERTEX_SHADER); + GLuint fragment_id = glCreateShader(GL_FRAGMENT_SHADER); - glShaderSource(vertex_id, 1, &vertex_shader, NULL); - glCompileShader(vertex_id); + glShaderSource(vertex_id, 1, &vertex_shader, NULL); + glCompileShader(vertex_id); - glShaderSource(fragment_id, 1, &fragment_shader, NULL); - glCompileShader(fragment_id); + glShaderSource(fragment_id, 1, &fragment_shader, NULL); + glCompileShader(fragment_id); - GLuint prog_id = glCreateProgram(); + GLuint prog_id = glCreateProgram(); - glAttachShader(prog_id, vertex_id); - glAttachShader(prog_id, fragment_id); + glAttachShader(prog_id, vertex_id); + glAttachShader(prog_id, fragment_id); - glLinkProgram(prog_id); + glLinkProgram(prog_id); - glDetachShader(prog_id, vertex_id); - glDetachShader(prog_id, fragment_id); + glDetachShader(prog_id, vertex_id); + glDetachShader(prog_id, fragment_id); - glDeleteShader(vertex_id); - glDeleteShader(fragment_id); + glDeleteShader(vertex_id); + glDeleteShader(fragment_id); - return prog_id; + return prog_id; } diff --git a/src/win/win_preferences.c b/src/win/win_preferences.c index 74b5a186a..227b52e35 100644 --- a/src/win/win_preferences.c +++ b/src/win/win_preferences.c @@ -35,7 +35,7 @@ /* Language */ static LCID temp_language; -static char temp_icon_set[256] = {0}; +static char temp_icon_set[256] = { 0 }; int enum_helper, c; @@ -44,112 +44,108 @@ HWND hwndPreferences; BOOL CALLBACK EnumResLangProc(HMODULE hModule, LPCTSTR lpszType, LPCTSTR lpszName, WORD wIDLanguage, LONG_PTR lParam) { - wchar_t temp[LOCALE_NAME_MAX_LENGTH + 1]; - LCIDToLocaleName(wIDLanguage, temp, LOCALE_NAME_MAX_LENGTH, 0); - wchar_t dispname[MAX_PATH + 1]; - GetLocaleInfoEx(temp, LOCALE_SENGLISHDISPLAYNAME, dispname, MAX_PATH); - SendMessage((HWND)lParam, CB_ADDSTRING, 0, (LPARAM)dispname); - SendMessage((HWND)lParam, CB_SETITEMDATA, c, (LPARAM)wIDLanguage); + wchar_t temp[LOCALE_NAME_MAX_LENGTH + 1]; + LCIDToLocaleName(wIDLanguage, temp, LOCALE_NAME_MAX_LENGTH, 0); + wchar_t dispname[MAX_PATH + 1]; + GetLocaleInfoEx(temp, LOCALE_SENGLISHDISPLAYNAME, dispname, MAX_PATH); + SendMessage((HWND) lParam, CB_ADDSTRING, 0, (LPARAM) dispname); + SendMessage((HWND) lParam, CB_SETITEMDATA, c, (LPARAM) wIDLanguage); - if (wIDLanguage == lang_id) - enum_helper = c; - c++; + if (wIDLanguage == lang_id) + enum_helper = c; + c++; - return 1; + return 1; } /* Load available languages */ static void preferences_fill_languages(HWND hdlg) { - temp_language = GetThreadUILanguage(); - HWND lang_combo = GetDlgItem(hdlg, IDC_COMBO_LANG); + temp_language = GetThreadUILanguage(); + HWND lang_combo = GetDlgItem(hdlg, IDC_COMBO_LANG); - SendMessage(lang_combo, CB_RESETCONTENT, 0, 0); - SendMessage(lang_combo, CB_ADDSTRING, 0, win_get_string(IDS_7168)); - SendMessage(lang_combo, CB_SETITEMDATA, 0, 0xFFFF); + SendMessage(lang_combo, CB_RESETCONTENT, 0, 0); + SendMessage(lang_combo, CB_ADDSTRING, 0, win_get_string(IDS_7168)); + SendMessage(lang_combo, CB_SETITEMDATA, 0, 0xFFFF); - enum_helper = 0; c = 1; - //if no one is selected, then it was 0xFFFF or unsupported language, in either case go with index enum_helper=0 - //also start enum index from c=1 - EnumResourceLanguages(hinstance, RT_MENU, L"MainMenu", &EnumResLangProc, (LPARAM)lang_combo); + enum_helper = 0; + c = 1; + // if no one is selected, then it was 0xFFFF or unsupported language, in either case go with index enum_helper=0 + // also start enum index from c=1 + EnumResourceLanguages(hinstance, RT_MENU, L"MainMenu", &EnumResLangProc, (LPARAM) lang_combo); - SendMessage(lang_combo, CB_SETCURSEL, enum_helper, 0); + SendMessage(lang_combo, CB_SETCURSEL, enum_helper, 0); } /* Load available iconsets */ static void preferences_fill_iconsets(HWND hdlg) { - HWND icon_combo = GetDlgItem(hdlg, IDC_COMBO_ICON); + HWND icon_combo = GetDlgItem(hdlg, IDC_COMBO_ICON); - /* Add the default one */ - wchar_t buffer[512] = L"("; - wcscat(buffer, plat_get_string(IDS_2090)); - wcscat(buffer, L")"); + /* Add the default one */ + wchar_t buffer[512] = L"("; + wcscat(buffer, plat_get_string(IDS_2090)); + wcscat(buffer, L")"); - SendMessage(icon_combo, CB_RESETCONTENT, 0, 0); - SendMessage(icon_combo, CB_ADDSTRING, 0, (LPARAM)buffer); - SendMessage(icon_combo, CB_SETITEMDATA, 0, (LPARAM)strdup("")); + SendMessage(icon_combo, CB_RESETCONTENT, 0, 0); + SendMessage(icon_combo, CB_ADDSTRING, 0, (LPARAM) buffer); + SendMessage(icon_combo, CB_SETITEMDATA, 0, (LPARAM) strdup("")); - int combo_index = -1; + int combo_index = -1; - /* Find for extra ones */ - HANDLE hFind; - WIN32_FIND_DATA data; + /* Find for extra ones */ + HANDLE hFind; + WIN32_FIND_DATA data; - char icon_path_root[512]; - win_get_icons_path(icon_path_root); + char icon_path_root[512]; + win_get_icons_path(icon_path_root); - wchar_t search[512]; - mbstoc16s(search, icon_path_root, strlen(icon_path_root) + 1); - wcscat(search, L"*.*"); + wchar_t search[512]; + mbstoc16s(search, icon_path_root, strlen(icon_path_root) + 1); + wcscat(search, L"*.*"); - hFind = FindFirstFile((LPCWSTR)search, &data); + hFind = FindFirstFile((LPCWSTR) search, &data); - if (hFind != INVALID_HANDLE_VALUE) { - do { - if (wcscmp(data.cFileName, L".") && wcscmp(data.cFileName, L"..") && - (data.dwFileAttributes & FILE_ATTRIBUTE_DIRECTORY)) - { - wchar_t temp[512] = {0}, dispname[512] = {0}; - mbstoc16s(temp, icon_path_root, strlen(icon_path_root) + 1); - wcscat(temp, data.cFileName); - wcscat(temp, L"\\iconinfo.txt"); + if (hFind != INVALID_HANDLE_VALUE) { + do { + if (wcscmp(data.cFileName, L".") && wcscmp(data.cFileName, L"..") && (data.dwFileAttributes & FILE_ATTRIBUTE_DIRECTORY)) { + wchar_t temp[512] = { 0 }, dispname[512] = { 0 }; + mbstoc16s(temp, icon_path_root, strlen(icon_path_root) + 1); + wcscat(temp, data.cFileName); + wcscat(temp, L"\\iconinfo.txt"); - wcscpy(dispname, data.cFileName); - FILE *fp = _wfopen(temp, L"r"); - if (fp) - { - char line[512] = {0}; - if (fgets(line, 511, fp)) - { - mbstoc16s(dispname, line, strlen(line) + 1); - } + wcscpy(dispname, data.cFileName); + FILE *fp = _wfopen(temp, L"r"); + if (fp) { + char line[512] = { 0 }; + if (fgets(line, 511, fp)) { + mbstoc16s(dispname, line, strlen(line) + 1); + } - fclose(fp); - } + fclose(fp); + } - char filename[512]; - c16stombs(filename, data.cFileName, 511); + char filename[512]; + c16stombs(filename, data.cFileName, 511); - int index = SendMessage(icon_combo, CB_ADDSTRING, 0, (LPARAM)dispname); - SendMessage(icon_combo, CB_SETITEMDATA, index, (LPARAM)(strdup(filename))); + int index = SendMessage(icon_combo, CB_ADDSTRING, 0, (LPARAM) dispname); + SendMessage(icon_combo, CB_SETITEMDATA, index, (LPARAM) (strdup(filename))); - if (!strcmp(filename, icon_set)) - combo_index = index; - } - } while (FindNextFile(hFind, &data)); - FindClose(hFind); - } + if (!strcmp(filename, icon_set)) + combo_index = index; + } + } while (FindNextFile(hFind, &data)); + FindClose(hFind); + } - if (combo_index == -1) - { - combo_index = 0; - strcpy(temp_icon_set, ""); - } + if (combo_index == -1) { + combo_index = 0; + strcpy(temp_icon_set, ""); + } - SendMessage(icon_combo, CB_SETCURSEL, combo_index, 0); + SendMessage(icon_combo, CB_SETCURSEL, combo_index, 0); } /* This returns 1 if any variable has changed, 0 if not. */ @@ -209,85 +205,84 @@ static BOOL CALLBACK PreferencesDlgProcedure(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { switch (message) { - case WM_INITDIALOG: - hwndPreferences = hdlg; - /* Language */ - temp_language = lang_id; - strcpy(temp_icon_set, icon_set); - preferences_fill_languages(hdlg); - preferences_fill_iconsets(hdlg); - break; + case WM_INITDIALOG: + hwndPreferences = hdlg; + /* Language */ + temp_language = lang_id; + strcpy(temp_icon_set, icon_set); + preferences_fill_languages(hdlg); + preferences_fill_iconsets(hdlg); + break; - case WM_COMMAND: - switch (LOWORD(wParam)) { - case IDOK: - if (preferences_settings_changed()) - preferences_settings_save(); - EndDialog(hdlg, 0); - return TRUE; + case WM_COMMAND: + switch (LOWORD(wParam)) { + case IDOK: + if (preferences_settings_changed()) + preferences_settings_save(); + EndDialog(hdlg, 0); + return TRUE; - case IDCANCEL: - EndDialog(hdlg, 0); - return TRUE; + case IDCANCEL: + EndDialog(hdlg, 0); + return TRUE; - case IDC_COMBO_LANG: - if (HIWORD(wParam) == CBN_SELCHANGE) { - HWND combo = GetDlgItem(hdlg, IDC_COMBO_LANG); - int index = SendMessage(combo, CB_GETCURSEL, 0, 0); - temp_language = SendMessage(combo, CB_GETITEMDATA, index, 0); - } - break; + case IDC_COMBO_LANG: + if (HIWORD(wParam) == CBN_SELCHANGE) { + HWND combo = GetDlgItem(hdlg, IDC_COMBO_LANG); + int index = SendMessage(combo, CB_GETCURSEL, 0, 0); + temp_language = SendMessage(combo, CB_GETITEMDATA, index, 0); + } + break; - case IDC_COMBO_ICON: - if (HIWORD(wParam) == CBN_SELCHANGE) { - HWND combo = GetDlgItem(hdlg, IDC_COMBO_ICON); - int index = SendMessage(combo, CB_GETCURSEL, 0, 0); - strcpy(temp_icon_set, (char*)SendMessage(combo, CB_GETITEMDATA, index, 0)); - } - break; + case IDC_COMBO_ICON: + if (HIWORD(wParam) == CBN_SELCHANGE) { + HWND combo = GetDlgItem(hdlg, IDC_COMBO_ICON); + int index = SendMessage(combo, CB_GETCURSEL, 0, 0); + strcpy(temp_icon_set, (char *) SendMessage(combo, CB_GETITEMDATA, index, 0)); + } + break; - case IDC_BUTTON_DEFAULT: { - HWND combo = GetDlgItem(hdlg, IDC_COMBO_LANG); - int index = preferences_indexof(combo, DEFAULT_LANGUAGE); - SendMessage(combo, CB_SETCURSEL, index, 0); - temp_language = DEFAULT_LANGUAGE; - break; - } + case IDC_BUTTON_DEFAULT: + { + HWND combo = GetDlgItem(hdlg, IDC_COMBO_LANG); + int index = preferences_indexof(combo, DEFAULT_LANGUAGE); + SendMessage(combo, CB_SETCURSEL, index, 0); + temp_language = DEFAULT_LANGUAGE; + break; + } - case IDC_BUTTON_DEFICON: { - SendMessage(GetDlgItem(hdlg, IDC_COMBO_ICON), CB_SETCURSEL, 0, 0); - strcpy(temp_icon_set, ""); - break; - } - default: - break; - } - break; - - case WM_DESTROY: { - int i; - LRESULT temp; - HWND combo = GetDlgItem(hdlg, IDC_COMBO_ICON); - for (i = 0; i < SendMessage(combo, CB_GETCOUNT, 0, 0); i++) - { - temp = SendMessage(combo, CB_GETITEMDATA, i, 0); - if (temp) - { - free((void*)temp); - SendMessage(combo, CB_SETITEMDATA, i, 0); - } - } - } - break; + case IDC_BUTTON_DEFICON: + { + SendMessage(GetDlgItem(hdlg, IDC_COMBO_ICON), CB_SETCURSEL, 0, 0); + strcpy(temp_icon_set, ""); + break; + } + default: + break; + } + break; + case WM_DESTROY: + { + int i; + LRESULT temp; + HWND combo = GetDlgItem(hdlg, IDC_COMBO_ICON); + for (i = 0; i < SendMessage(combo, CB_GETCOUNT, 0, 0); i++) { + temp = SendMessage(combo, CB_GETITEMDATA, i, 0); + if (temp) { + free((void *) temp); + SendMessage(combo, CB_SETITEMDATA, i, 0); + } + } + } + break; } - return(FALSE); + return (FALSE); } - void PreferencesDlgCreate(HWND hwnd) { - DialogBox(hinstance, (LPCTSTR)DLG_PREFERENCES, hwnd, PreferencesDlgProcedure); + DialogBox(hinstance, (LPCTSTR) DLG_PREFERENCES, hwnd, PreferencesDlgProcedure); } diff --git a/src/win/win_sdl.c b/src/win/win_sdl.c index ba9f5ba60..0a44b611e 100644 --- a/src/win/win_sdl.c +++ b/src/win/win_sdl.c @@ -72,48 +72,45 @@ #include <86box/win_sdl.h> #include <86box/version.h> +#define RENDERER_FULL_SCREEN 1 +#define RENDERER_HARDWARE 2 +#define RENDERER_OPENGL 4 -#define RENDERER_FULL_SCREEN 1 -#define RENDERER_HARDWARE 2 -#define RENDERER_OPENGL 4 - - -static SDL_Window *sdl_win = NULL; -static SDL_Renderer *sdl_render = NULL; -static SDL_Texture *sdl_tex = NULL; -static HWND sdl_parent_hwnd = NULL; -static int sdl_w, sdl_h; -static int sdl_fs, sdl_flags = -1; -static int cur_w, cur_h; -static int cur_wx = 0, cur_wy = 0, cur_ww =0, cur_wh = 0; -static volatile int sdl_enabled = 0; -static SDL_mutex* sdl_mutex = NULL; - +static SDL_Window *sdl_win = NULL; +static SDL_Renderer *sdl_render = NULL; +static SDL_Texture *sdl_tex = NULL; +static HWND sdl_parent_hwnd = NULL; +static int sdl_w, sdl_h; +static int sdl_fs, sdl_flags = -1; +static int cur_w, cur_h; +static int cur_wx = 0, cur_wy = 0, cur_ww = 0, cur_wh = 0; +static volatile int sdl_enabled = 0; +static SDL_mutex *sdl_mutex = NULL; typedef struct { - const void *magic; - Uint32 id; - char *title; + const void *magic; + Uint32 id; + char *title; SDL_Surface *icon; - int x, y; - int w, h; - int min_w, min_h; - int max_w, max_h; - Uint32 flags; - Uint32 last_fullscreen_flags; + int x, y; + int w, h; + int min_w, min_h; + int max_w, max_h; + Uint32 flags; + Uint32 last_fullscreen_flags; /* Stored position and size for windowed mode */ SDL_Rect windowed; SDL_DisplayMode fullscreen_mode; - float brightness; + float brightness; Uint16 *gamma; - Uint16 *saved_gamma; /* (just offset into gamma) */ + Uint16 *saved_gamma; /* (just offset into gamma) */ SDL_Surface *surface; - SDL_bool surface_valid; + SDL_bool surface_valid; SDL_bool is_hiding; SDL_bool is_destroying; @@ -121,7 +118,7 @@ typedef struct void *shaper; SDL_HitTest hit_test; - void *hit_test_data; + void *hit_test_data; void *data; @@ -131,112 +128,107 @@ typedef struct SDL_Window *next; } SDL_Window_Ex; - #ifdef ENABLE_SDL_LOG int sdl_do_log = ENABLE_SDL_LOG; - static void sdl_log(const char *fmt, ...) { va_list ap; if (sdl_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define sdl_log(fmt, ...) +# define sdl_log(fmt, ...) #endif - static void sdl_integer_scale(double *d, double *g) { double ratio; if (*d > *g) { - ratio = floor(*d / *g); - *d = *g * ratio; + ratio = floor(*d / *g); + *d = *g * ratio; } else { - ratio = ceil(*d / *g); - *d = *g / ratio; + ratio = ceil(*d / *g); + *d = *g / ratio; } } - static void sdl_stretch(int *w, int *h, int *x, int *y) { double hw, gw, hh, gh, dx, dy, dw, dh, gsr, hsr; - hw = (double) sdl_w; - hh = (double) sdl_h; - gw = (double) *w; - gh = (double) *h; + hw = (double) sdl_w; + hh = (double) sdl_h; + gw = (double) *w; + gh = (double) *h; hsr = hw / hh; switch (video_fullscreen_scale) { - case FULLSCR_SCALE_FULL: - default: - *w = sdl_w; - *h = sdl_h; - *x = 0; - *y = 0; - break; - case FULLSCR_SCALE_43: - case FULLSCR_SCALE_KEEPRATIO: - if (video_fullscreen_scale == FULLSCR_SCALE_43) - gsr = 4.0 / 3.0; - else - gsr = gw / gh; - if (gsr <= hsr) { - dw = hh * gsr; - dh = hh; - } else { - dw = hw; - dh = hw / gsr; - } - dx = (hw - dw) / 2.0; - dy = (hh - dh) / 2.0; - *w = (int) dw; - *h = (int) dh; - *x = (int) dx; - *y = (int) dy; - break; - case FULLSCR_SCALE_INT: - gsr = gw / gh; - if (gsr <= hsr) { - dw = hh * gsr; - dh = hh; - } else { - dw = hw; - dh = hw / gsr; - } - sdl_integer_scale(&dw, &gw); - sdl_integer_scale(&dh, &gh); - dx = (hw - dw) / 2.0; - dy = (hh - dh) / 2.0; - *w = (int) dw; - *h = (int) dh; - *x = (int) dx; - *y = (int) dy; - break; + case FULLSCR_SCALE_FULL: + default: + *w = sdl_w; + *h = sdl_h; + *x = 0; + *y = 0; + break; + case FULLSCR_SCALE_43: + case FULLSCR_SCALE_KEEPRATIO: + if (video_fullscreen_scale == FULLSCR_SCALE_43) + gsr = 4.0 / 3.0; + else + gsr = gw / gh; + if (gsr <= hsr) { + dw = hh * gsr; + dh = hh; + } else { + dw = hw; + dh = hw / gsr; + } + dx = (hw - dw) / 2.0; + dy = (hh - dh) / 2.0; + *w = (int) dw; + *h = (int) dh; + *x = (int) dx; + *y = (int) dy; + break; + case FULLSCR_SCALE_INT: + gsr = gw / gh; + if (gsr <= hsr) { + dw = hh * gsr; + dh = hh; + } else { + dw = hw; + dh = hw / gsr; + } + sdl_integer_scale(&dw, &gw); + sdl_integer_scale(&dh, &gh); + dx = (hw - dw) / 2.0; + dy = (hh - dh) / 2.0; + *w = (int) dw; + *h = (int) dh; + *x = (int) dx; + *y = (int) dy; + break; } } - static void sdl_blit(int x, int y, int w, int h, int monitor_index) { SDL_Rect r_src; - int ret; + int ret; if (!sdl_enabled || (x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (buffer32 == NULL) || (sdl_render == NULL) || (sdl_tex == NULL) || monitor_index >= 1) { - video_blit_complete_monitor(monitor_index); - return; + video_blit_complete_monitor(monitor_index); + return; } SDL_LockMutex(sdl_mutex); @@ -248,7 +240,7 @@ sdl_blit(int x, int y, int w, int h, int monitor_index) SDL_UpdateTexture(sdl_tex, &r_src, &(buffer32->line[y][x]), 2048 * sizeof(uint32_t)); if (monitors[0].mon_screenshots) - video_screenshot((uint32_t *) buffer32->dat, x, y, 2048); + video_screenshot((uint32_t *) buffer32->dat, x, y, 2048); video_blit_complete(); @@ -261,24 +253,23 @@ sdl_blit(int x, int y, int w, int h, int monitor_index) ret = SDL_RenderCopy(sdl_render, sdl_tex, &r_src, 0); if (ret) - sdl_log("SDL: unable to copy texture to renderer (%s)\n", sdl_GetError()); + sdl_log("SDL: unable to copy texture to renderer (%s)\n", sdl_GetError()); SDL_RenderPresent(sdl_render); SDL_UnlockMutex(sdl_mutex); } - static void sdl_blit_ex(int x, int y, int w, int h, int monitor_index) { SDL_Rect r_src; - void *pixeldata; - int pitch, ret; - int row; + void *pixeldata; + int pitch, ret; + int row; if (!sdl_enabled || (x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (buffer32 == NULL) || (sdl_render == NULL) || (sdl_tex == NULL)) { - video_blit_complete(); - return; + video_blit_complete(); + return; } SDL_LockMutex(sdl_mutex); @@ -286,10 +277,10 @@ sdl_blit_ex(int x, int y, int w, int h, int monitor_index) SDL_LockTexture(sdl_tex, 0, &pixeldata, &pitch); for (row = 0; row < h; ++row) - video_copy(&(((uint8_t *) pixeldata)[row * 2048 * sizeof(uint32_t)]), &(buffer32->line[y + row][x]), w * sizeof(uint32_t)); + video_copy(&(((uint8_t *) pixeldata)[row * 2048 * sizeof(uint32_t)]), &(buffer32->line[y + row][x]), w * sizeof(uint32_t)); if (monitors[0].mon_screenshots) - video_screenshot((uint32_t *) pixeldata, 0, 0, 2048); + video_screenshot((uint32_t *) pixeldata, 0, 0, 2048); SDL_UnlockTexture(sdl_tex); @@ -304,54 +295,51 @@ sdl_blit_ex(int x, int y, int w, int h, int monitor_index) ret = SDL_RenderCopy(sdl_render, sdl_tex, &r_src, 0); if (ret) - sdl_log("SDL: unable to copy texture to renderer (%s)\n", sdl_GetError()); + sdl_log("SDL: unable to copy texture to renderer (%s)\n", sdl_GetError()); SDL_RenderPresent(sdl_render); SDL_UnlockMutex(sdl_mutex); } - static void sdl_destroy_window(void) { if (sdl_win != NULL) { - SDL_DestroyWindow(sdl_win); - sdl_win = NULL; + SDL_DestroyWindow(sdl_win); + sdl_win = NULL; } } - static void sdl_destroy_texture(void) { if (sdl_tex != NULL) { - SDL_DestroyTexture(sdl_tex); - sdl_tex = NULL; + SDL_DestroyTexture(sdl_tex); + sdl_tex = NULL; } /* SDL_DestroyRenderer also automatically destroys all associated textures. */ if (sdl_render != NULL) { - SDL_DestroyRenderer(sdl_render); - sdl_render = NULL; + SDL_DestroyRenderer(sdl_render); + sdl_render = NULL; } } - void sdl_close(void) { if (sdl_mutex != NULL) - SDL_LockMutex(sdl_mutex); + SDL_LockMutex(sdl_mutex); /* Unregister our renderer! */ video_setblit(NULL); if (sdl_enabled) - sdl_enabled = 0; + sdl_enabled = 0; if (sdl_mutex != NULL) { - SDL_DestroyMutex(sdl_mutex); - sdl_mutex = NULL; + SDL_DestroyMutex(sdl_mutex); + sdl_mutex = NULL; } sdl_destroy_texture(); @@ -360,8 +348,8 @@ sdl_close(void) SetFocus(hwndMain); if (sdl_parent_hwnd != NULL) { - DestroyWindow(sdl_parent_hwnd); - sdl_parent_hwnd = NULL; + DestroyWindow(sdl_parent_hwnd); + sdl_parent_hwnd = NULL; } /* Quit. */ @@ -369,41 +357,36 @@ sdl_close(void) sdl_flags = -1; } - static int old_capture = 0; - static void sdl_select_best_hw_driver(void) { - int i; + int i; SDL_RendererInfo renderInfo; - for (i = 0; i < SDL_GetNumRenderDrivers(); ++i) - { - SDL_GetRenderDriverInfo(i, &renderInfo); - if (renderInfo.flags & SDL_RENDERER_ACCELERATED) { - SDL_SetHint(SDL_HINT_RENDER_DRIVER, renderInfo.name); - return; - } + for (i = 0; i < SDL_GetNumRenderDrivers(); ++i) { + SDL_GetRenderDriverInfo(i, &renderInfo); + if (renderInfo.flags & SDL_RENDERER_ACCELERATED) { + SDL_SetHint(SDL_HINT_RENDER_DRIVER, renderInfo.name); + return; + } } } - static void sdl_init_texture(void) { if (sdl_flags & RENDERER_HARDWARE) { - sdl_render = SDL_CreateRenderer(sdl_win, -1, SDL_RENDERER_ACCELERATED); - SDL_SetHint(SDL_HINT_RENDER_SCALE_QUALITY, video_filter_method ? "1" : "0"); + sdl_render = SDL_CreateRenderer(sdl_win, -1, SDL_RENDERER_ACCELERATED); + SDL_SetHint(SDL_HINT_RENDER_SCALE_QUALITY, video_filter_method ? "1" : "0"); } else - sdl_render = SDL_CreateRenderer(sdl_win, -1, SDL_RENDERER_SOFTWARE); + sdl_render = SDL_CreateRenderer(sdl_win, -1, SDL_RENDERER_SOFTWARE); sdl_tex = SDL_CreateTexture(sdl_render, SDL_PIXELFORMAT_ARGB8888, - SDL_TEXTUREACCESS_STREAMING, 2048, 2048); + SDL_TEXTUREACCESS_STREAMING, 2048, 2048); } - static void sdl_reinit_texture(void) { @@ -414,67 +397,65 @@ sdl_reinit_texture(void) sdl_init_texture(); } - void sdl_set_fs(int fs) { - int w = 0, h = 0, x = 0, y = 0; + int w = 0, h = 0, x = 0, y = 0; RECT rect; SDL_LockMutex(sdl_mutex); sdl_enabled = 0; if (fs) { - ShowWindow(sdl_parent_hwnd, TRUE); - SetParent(hwndRender, sdl_parent_hwnd); - ShowWindow(hwndRender, TRUE); - MoveWindow(sdl_parent_hwnd, 0, 0, sdl_w, sdl_h, TRUE); + ShowWindow(sdl_parent_hwnd, TRUE); + SetParent(hwndRender, sdl_parent_hwnd); + ShowWindow(hwndRender, TRUE); + MoveWindow(sdl_parent_hwnd, 0, 0, sdl_w, sdl_h, TRUE); - /* Show the window, make it topmost, and give it focus. */ - w = unscaled_size_x; - h = efscrnsz_y; - sdl_stretch(&w, &h, &x, &y); - MoveWindow(hwndRender, x, y, w, h, TRUE); - ImmAssociateContext(sdl_parent_hwnd, NULL); - SetFocus(sdl_parent_hwnd); + /* Show the window, make it topmost, and give it focus. */ + w = unscaled_size_x; + h = efscrnsz_y; + sdl_stretch(&w, &h, &x, &y); + MoveWindow(hwndRender, x, y, w, h, TRUE); + ImmAssociateContext(sdl_parent_hwnd, NULL); + SetFocus(sdl_parent_hwnd); - /* Redirect RawInput to this new window. */ - old_capture = mouse_capture; - GetWindowRect(hwndRender, &rect); - ClipCursor(&rect); - mouse_capture = 1; + /* Redirect RawInput to this new window. */ + old_capture = mouse_capture; + GetWindowRect(hwndRender, &rect); + ClipCursor(&rect); + mouse_capture = 1; } else { - SetParent(hwndRender, hwndMain); - ShowWindow(sdl_parent_hwnd, FALSE); - ShowWindow(hwndRender, TRUE); - ImmAssociateContext(hwndMain, NULL); - SetFocus(hwndMain); - mouse_capture = old_capture; + SetParent(hwndRender, hwndMain); + ShowWindow(sdl_parent_hwnd, FALSE); + ShowWindow(hwndRender, TRUE); + ImmAssociateContext(hwndMain, NULL); + SetFocus(hwndMain); + mouse_capture = old_capture; - if (mouse_capture) { - GetWindowRect(hwndRender, &rect); - ClipCursor(&rect); - } else - ClipCursor(&oldclip); + if (mouse_capture) { + GetWindowRect(hwndRender, &rect); + ClipCursor(&rect); + } else + ClipCursor(&oldclip); } sdl_fs = fs; if (fs) - sdl_flags |= RENDERER_FULL_SCREEN; + sdl_flags |= RENDERER_FULL_SCREEN; else - sdl_flags &= ~RENDERER_FULL_SCREEN; + sdl_flags &= ~RENDERER_FULL_SCREEN; // sdl_reinit_texture(); sdl_enabled = 1; SDL_UnlockMutex(sdl_mutex); } - static int sdl_init_common(int flags) { - wchar_t temp[128]; + wchar_t temp[128]; SDL_version ver; sdl_log("SDL: init (fs=%d)\n", fs); @@ -485,15 +466,15 @@ sdl_init_common(int flags) /* Initialize the SDL system. */ if (SDL_Init(SDL_INIT_VIDEO) < 0) { - sdl_log("SDL: initialization failed (%s)\n", sdl_GetError()); - return(0); + sdl_log("SDL: initialization failed (%s)\n", sdl_GetError()); + return (0); } if (flags & RENDERER_HARDWARE) { - if (flags & RENDERER_OPENGL) - SDL_SetHint(SDL_HINT_RENDER_DRIVER, "OpenGL"); - else - sdl_select_best_hw_driver(); + if (flags & RENDERER_OPENGL) + SDL_SetHint(SDL_HINT_RENDER_DRIVER, "OpenGL"); + else + sdl_select_best_hw_driver(); } /* Get the size of the (current) desktop. */ @@ -503,16 +484,16 @@ sdl_init_common(int flags) /* Create the desktop-covering window. */ _swprintf(temp, L"%s v%s", EMU_NAME_W, EMU_VERSION_FULL_W); sdl_parent_hwnd = CreateWindow(SDL_CLASS_NAME, temp, WS_POPUP, 0, 0, sdl_w, sdl_h, - HWND_DESKTOP, NULL, hinstance, NULL); + HWND_DESKTOP, NULL, hinstance, NULL); ShowWindow(sdl_parent_hwnd, FALSE); sdl_flags = flags; if (sdl_win == NULL) { - sdl_log("SDL: unable to CreateWindowFrom (%s)\n", SDL_GetError()); + sdl_log("SDL: unable to CreateWindowFrom (%s)\n", SDL_GetError()); } - sdl_win = SDL_CreateWindowFrom((void *)hwndRender); + sdl_win = SDL_CreateWindowFrom((void *) hwndRender); sdl_init_texture(); sdl_set_fs(video_fullscreen & 1); @@ -523,50 +504,45 @@ sdl_init_common(int flags) video_setblit((video_grayscale || invert_display) ? sdl_blit_ex : sdl_blit); sdl_enabled = 1; - sdl_mutex = SDL_CreateMutex(); + sdl_mutex = SDL_CreateMutex(); - return(1); + return (1); } - int sdl_inits(HWND h) { return sdl_init_common(0); } - int sdl_inith(HWND h) { return sdl_init_common(RENDERER_HARDWARE); } - int sdl_initho(HWND h) { return sdl_init_common(RENDERER_HARDWARE | RENDERER_OPENGL); } - int sdl_pause(void) { - return(0); + return (0); } - void sdl_resize(int x, int y) { int ww = 0, wh = 0, wx = 0, wy = 0; if (video_fullscreen & 2) - return; + return; if ((x == cur_w) && (y == cur_h)) - return; + return; SDL_LockMutex(sdl_mutex); @@ -574,8 +550,8 @@ sdl_resize(int x, int y) wh = y; if (sdl_fs) { - sdl_stretch(&ww, &wh, &wx, &wy); - MoveWindow(hwndRender, wx, wy, ww, wh, TRUE); + sdl_stretch(&ww, &wh, &wx, &wy); + MoveWindow(hwndRender, wx, wy, ww, wh, TRUE); } cur_w = x; @@ -594,35 +570,33 @@ sdl_resize(int x, int y) SDL_UnlockMutex(sdl_mutex); } - void sdl_enable(int enable) { if (sdl_flags == -1) - return; + return; SDL_LockMutex(sdl_mutex); sdl_enabled = !!enable; if (enable == 1) { - SDL_SetWindowSize(sdl_win, cur_ww, cur_wh); - sdl_reinit_texture(); + SDL_SetWindowSize(sdl_win, cur_ww, cur_wh); + sdl_reinit_texture(); } SDL_UnlockMutex(sdl_mutex); } - void sdl_reload(void) { if (sdl_flags & RENDERER_HARDWARE) { - SDL_LockMutex(sdl_mutex); + SDL_LockMutex(sdl_mutex); - SDL_SetHint(SDL_HINT_RENDER_SCALE_QUALITY, video_filter_method ? "1" : "0"); - sdl_reinit_texture(); + SDL_SetHint(SDL_HINT_RENDER_SCALE_QUALITY, video_filter_method ? "1" : "0"); + sdl_reinit_texture(); - SDL_UnlockMutex(sdl_mutex); + SDL_UnlockMutex(sdl_mutex); } video_setblit((video_grayscale || invert_display) ? sdl_blit_ex : sdl_blit); diff --git a/src/win/win_settings.c b/src/win/win_settings.c index 227c007b1..d7445867a 100644 --- a/src/win/win_settings.c +++ b/src/win/win_settings.c @@ -72,17 +72,15 @@ #include "../disk/minivhd/minivhd.h" #include "../disk/minivhd/minivhd_util.h" - /* Icon, Bus, File, C, H, S, Size */ -#define C_COLUMNS_HARD_DISKS 6 - +#define C_COLUMNS_HARD_DISKS 6 static int first_cat = 0; /* Machine category */ -static int temp_machine_type, temp_machine, temp_cpu, temp_wait_states, temp_fpu, temp_sync; +static int temp_machine_type, temp_machine, temp_cpu, temp_wait_states, temp_fpu, temp_sync; static cpu_family_t *temp_cpu_f; -static uint32_t temp_mem_size; +static uint32_t temp_mem_size; #ifdef USE_DYNAREC static int temp_dynarec; #endif @@ -98,7 +96,7 @@ static int temp_sound_card, temp_midi_output_device, temp_midi_input_device, tem static int temp_float, temp_fm_driver; /* Network category */ -static int temp_net_type, temp_net_card; +static int temp_net_type, temp_net_card; static char temp_pcap_dev[522]; /* Ports category */ @@ -124,9 +122,9 @@ static int temp_fdd_turbo[FDD_NUM]; static int temp_fdd_check_bpb[FDD_NUM]; /* Other removable devices category */ -static cdrom_t temp_cdrom[CDROM_NUM]; +static cdrom_t temp_cdrom[CDROM_NUM]; static zip_drive_t temp_zip_drives[ZIP_NUM]; -static mo_drive_t temp_mo_drives[MO_NUM]; +static mo_drive_t temp_mo_drives[MO_NUM]; static HWND hwndParentDialog, hwndChildDialog; @@ -139,20 +137,19 @@ static int settings_list_to_device[2][256], settings_list_to_fdc[20]; static int settings_list_to_midi[20], settings_list_to_midi_in[20]; static int settings_list_to_hdc[20]; -static int max_spt = 63, max_hpc = 255, max_tracks = 266305; +static int max_spt = 63, max_hpc = 255, max_tracks = 266305; static uint64_t mfm_tracking, esdi_tracking, xta_tracking, ide_tracking, scsi_tracking[8]; static uint64_t size; -static int hd_listview_items, hdc_id_to_listview_index[HDD_NUM]; -static int no_update = 0, existing = 0, chs_enabled = 0; -static int lv1_current_sel, lv2_current_sel; -static int hard_disk_added = 0, next_free_id = 0, selection = 127; -static int spt, hpc, tracks, ignore_change = 0; +static int hd_listview_items, hdc_id_to_listview_index[HDD_NUM]; +static int no_update = 0, existing = 0, chs_enabled = 0; +static int lv1_current_sel, lv2_current_sel; +static int hard_disk_added = 0, next_free_id = 0, selection = 127; +static int spt, hpc, tracks, ignore_change = 0; static hard_disk_t new_hdd, *hdd_ptr; static wchar_t hd_file_name[512]; -static WCHAR device_name[512]; - +static WCHAR device_name[512]; static int settings_get_check(HWND hdlg, int id) @@ -160,49 +157,42 @@ settings_get_check(HWND hdlg, int id) return SendMessage(GetDlgItem(hdlg, id), BM_GETCHECK, 0, 0); } - static int settings_get_cur_sel(HWND hdlg, int id) { return SendMessage(GetDlgItem(hdlg, id), CB_GETCURSEL, 0, 0); } - static void settings_set_check(HWND hdlg, int id, int val) { SendMessage(GetDlgItem(hdlg, id), BM_SETCHECK, val, 0); } - static void settings_set_cur_sel(HWND hdlg, int id, int val) { SendMessage(GetDlgItem(hdlg, id), CB_SETCURSEL, val, 0); } - static void settings_reset_content(HWND hdlg, int id) { SendMessage(GetDlgItem(hdlg, id), CB_RESETCONTENT, 0, 0); } - static void settings_add_string(HWND hdlg, int id, LPARAM string) { SendMessage(GetDlgItem(hdlg, id), CB_ADDSTRING, 0, string); } - static void settings_enable_window(HWND hdlg, int id, int condition) { EnableWindow(GetDlgItem(hdlg, id), condition ? TRUE : FALSE); } - static void settings_show_window(HWND hdlg, int id, int condition) { @@ -213,7 +203,6 @@ settings_show_window(HWND hdlg, int id, int condition) ShowWindow(h, condition ? SW_SHOW : SW_HIDE); } - static void settings_listview_enable_styles(HWND hdlg, int id) { @@ -224,7 +213,6 @@ settings_listview_enable_styles(HWND hdlg, int id) ListView_SetExtendedListViewStyle(h, LVS_EX_FULLROWSELECT | LVS_EX_DOUBLEBUFFER); } - static void settings_listview_select(HWND hdlg, int id, int selection) { @@ -234,42 +222,41 @@ settings_listview_select(HWND hdlg, int id, int selection) ListView_SetItemState(h, selection, LVIS_FOCUSED | LVIS_SELECTED, 0x000F); } - static void settings_process_messages() { MSG msg; while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { - TranslateMessage(&msg); - DispatchMessage(&msg); + TranslateMessage(&msg); + DispatchMessage(&msg); } } - static BOOL image_list_init(HWND hdlg, int id, const uint8_t *icon_ids) { - HICON hiconItem; + HICON hiconItem; HIMAGELIST hSmall; - HWND hwndList = GetDlgItem(hdlg, id); + HWND hwndList = GetDlgItem(hdlg, id); int i = 0; hSmall = ListView_GetImageList(hwndList, LVSIL_SMALL); - if (hSmall != 0) ImageList_Destroy(hSmall); + if (hSmall != 0) + ImageList_Destroy(hSmall); hSmall = ImageList_Create(win_get_system_metrics(SM_CXSMICON, dpi), - win_get_system_metrics(SM_CYSMICON, dpi), - ILC_MASK | ILC_COLOR32, 1, 1); + win_get_system_metrics(SM_CYSMICON, dpi), + ILC_MASK | ILC_COLOR32, 1, 1); - while(1) { - if (icon_ids[i] == 0) - break; + while (1) { + if (icon_ids[i] == 0) + break; - hiconItem = hIcon[icon_ids[i]]; - ImageList_AddIcon(hSmall, hiconItem); + hiconItem = hIcon[icon_ids[i]]; + ImageList_AddIcon(hSmall, hiconItem); - i++; + i++; } ListView_SetImageList(hwndList, hSmall, LVSIL_SMALL); @@ -277,42 +264,39 @@ image_list_init(HWND hdlg, int id, const uint8_t *icon_ids) return TRUE; } - /* Show a MessageBox dialog. This is nasty, I know. --FvK */ static int settings_msgbox_header(int flags, void *header, void *message) { HWND h; - int i; + int i; - h = hwndMain; + h = hwndMain; hwndMain = hwndParentDialog; i = ui_msgbox_header(flags, header, message); hwndMain = h; - return(i); + return (i); } - static int settings_msgbox_ex(int flags, void *header, void *message, void *btn1, void *btn2, void *btn3) { HWND h; - int i; + int i; - h = hwndMain; + h = hwndMain; hwndMain = hwndParentDialog; i = ui_msgbox_ex(flags, header, message, btn1, btn2, btn3); hwndMain = h; - return(i); + return (i); } - /* This does the initial read of global variables into the temporary ones. */ static void win_settings_init(void) @@ -321,37 +305,37 @@ win_settings_init(void) /* Machine category */ temp_machine_type = machine_get_type(machine); - temp_machine = machine; - temp_cpu_f = cpu_f; - temp_wait_states = cpu_waitstates; - temp_cpu = cpu; - temp_mem_size = mem_size; + temp_machine = machine; + temp_cpu_f = cpu_f; + temp_wait_states = cpu_waitstates; + temp_cpu = cpu; + temp_mem_size = mem_size; #ifdef USE_DYNAREC temp_dynarec = cpu_use_dynarec; #endif - temp_fpu = fpu_type; + temp_fpu = fpu_type; temp_sync = time_sync; /* Video category */ temp_gfxcard = gfxcard; - temp_voodoo = voodoo_enabled; + temp_voodoo = voodoo_enabled; temp_ibm8514 = ibm8514_enabled; - temp_xga = xga_enabled; + temp_xga = xga_enabled; /* Input devices category */ - temp_mouse = mouse_type; + temp_mouse = mouse_type; temp_joystick = joystick_type; /* Sound category */ - temp_sound_card = sound_card_current; + temp_sound_card = sound_card_current; temp_midi_output_device = midi_output_device_current; - temp_midi_input_device = midi_input_device_current; - temp_mpu401 = mpu401_standalone_enable; - temp_SSI2001 = SSI2001; - temp_GAMEBLASTER = GAMEBLASTER; - temp_GUS = GUS; - temp_float = sound_is_float; - temp_fm_driver = fm_driver; + temp_midi_input_device = midi_input_device_current; + temp_mpu401 = mpu401_standalone_enable; + temp_SSI2001 = SSI2001; + temp_GAMEBLASTER = GAMEBLASTER; + temp_GUS = GUS; + temp_float = sound_is_float; + temp_fm_driver = fm_driver; /* Network category */ temp_net_type = network_type; @@ -364,83 +348,82 @@ win_settings_init(void) /* Ports category */ for (i = 0; i < PARALLEL_MAX; i++) { - temp_lpt_devices[i] = lpt_ports[i].device; - temp_lpt[i] = lpt_ports[i].enabled; + temp_lpt_devices[i] = lpt_ports[i].device; + temp_lpt[i] = lpt_ports[i].enabled; } for (i = 0; i < SERIAL_MAX; i++) - temp_serial[i] = serial_enabled[i]; + temp_serial[i] = serial_enabled[i]; /* Storage devices category */ for (i = 0; i < SCSI_BUS_MAX; i++) - temp_scsi_card[i] = scsi_card_current[i]; + temp_scsi_card[i] = scsi_card_current[i]; temp_fdc_card = fdc_type; - temp_hdc = hdc_current; - temp_ide_ter = ide_ter_enabled; - temp_ide_qua = ide_qua_enabled; + temp_hdc = hdc_current; + temp_ide_ter = ide_ter_enabled; + temp_ide_qua = ide_qua_enabled; temp_cassette = cassette_enable; mfm_tracking = xta_tracking = esdi_tracking = ide_tracking = 0; for (i = 0; i < 8; i++) - scsi_tracking[i] = 0; + scsi_tracking[i] = 0; /* Hard disks category */ memcpy(temp_hdd, hdd, HDD_NUM * sizeof(hard_disk_t)); for (i = 0; i < HDD_NUM; i++) { - if (hdd[i].bus == HDD_BUS_MFM) - mfm_tracking |= (1 << (hdd[i].mfm_channel << 3)); - else if (hdd[i].bus == HDD_BUS_XTA) - xta_tracking |= (1 << (hdd[i].xta_channel << 3)); - else if (hdd[i].bus == HDD_BUS_ESDI) - esdi_tracking |= (1 << (hdd[i].esdi_channel << 3)); - else if ((hdd[i].bus == HDD_BUS_IDE) || (hdd[i].bus == HDD_BUS_ATAPI)) - ide_tracking |= (1 << (hdd[i].ide_channel << 3)); - else if (hdd[i].bus == HDD_BUS_SCSI) - scsi_tracking[hdd[i].scsi_id >> 3] |= (1 << ((hdd[i].scsi_id & 0x07) << 3)); + if (hdd[i].bus == HDD_BUS_MFM) + mfm_tracking |= (1 << (hdd[i].mfm_channel << 3)); + else if (hdd[i].bus == HDD_BUS_XTA) + xta_tracking |= (1 << (hdd[i].xta_channel << 3)); + else if (hdd[i].bus == HDD_BUS_ESDI) + esdi_tracking |= (1 << (hdd[i].esdi_channel << 3)); + else if ((hdd[i].bus == HDD_BUS_IDE) || (hdd[i].bus == HDD_BUS_ATAPI)) + ide_tracking |= (1 << (hdd[i].ide_channel << 3)); + else if (hdd[i].bus == HDD_BUS_SCSI) + scsi_tracking[hdd[i].scsi_id >> 3] |= (1 << ((hdd[i].scsi_id & 0x07) << 3)); } /* Floppy drives category */ for (i = 0; i < FDD_NUM; i++) { - temp_fdd_types[i] = fdd_get_type(i); - temp_fdd_turbo[i] = fdd_get_turbo(i); - temp_fdd_check_bpb[i] = fdd_get_check_bpb(i); + temp_fdd_types[i] = fdd_get_type(i); + temp_fdd_turbo[i] = fdd_get_turbo(i); + temp_fdd_check_bpb[i] = fdd_get_check_bpb(i); } /* Other removable devices category */ memcpy(temp_cdrom, cdrom, CDROM_NUM * sizeof(cdrom_t)); for (i = 0; i < CDROM_NUM; i++) { - if (cdrom[i].bus_type == CDROM_BUS_ATAPI) - ide_tracking |= (2 << (cdrom[i].ide_channel << 3)); - else if (cdrom[i].bus_type == CDROM_BUS_SCSI) - scsi_tracking[cdrom[i].scsi_device_id >> 3] |= (1 << ((cdrom[i].scsi_device_id & 0x07) << 3)); + if (cdrom[i].bus_type == CDROM_BUS_ATAPI) + ide_tracking |= (2 << (cdrom[i].ide_channel << 3)); + else if (cdrom[i].bus_type == CDROM_BUS_SCSI) + scsi_tracking[cdrom[i].scsi_device_id >> 3] |= (1 << ((cdrom[i].scsi_device_id & 0x07) << 3)); } memcpy(temp_zip_drives, zip_drives, ZIP_NUM * sizeof(zip_drive_t)); for (i = 0; i < ZIP_NUM; i++) { - if (zip_drives[i].bus_type == ZIP_BUS_ATAPI) - ide_tracking |= (4 << (zip_drives[i].ide_channel << 3)); - else if (zip_drives[i].bus_type == ZIP_BUS_SCSI) - scsi_tracking[zip_drives[i].scsi_device_id >> 3] |= (1 << ((zip_drives[i].scsi_device_id & 0x07) << 3)); + if (zip_drives[i].bus_type == ZIP_BUS_ATAPI) + ide_tracking |= (4 << (zip_drives[i].ide_channel << 3)); + else if (zip_drives[i].bus_type == ZIP_BUS_SCSI) + scsi_tracking[zip_drives[i].scsi_device_id >> 3] |= (1 << ((zip_drives[i].scsi_device_id & 0x07) << 3)); } memcpy(temp_mo_drives, mo_drives, MO_NUM * sizeof(mo_drive_t)); for (i = 0; i < MO_NUM; i++) { - if (mo_drives[i].bus_type == MO_BUS_ATAPI) - ide_tracking |= (1 << (mo_drives[i].ide_channel << 3)); - else if (mo_drives[i].bus_type == MO_BUS_SCSI) - scsi_tracking[mo_drives[i].scsi_device_id >> 3] |= (1 << ((mo_drives[i].scsi_device_id & 0x07) << 3)); + if (mo_drives[i].bus_type == MO_BUS_ATAPI) + ide_tracking |= (1 << (mo_drives[i].ide_channel << 3)); + else if (mo_drives[i].bus_type == MO_BUS_SCSI) + scsi_tracking[mo_drives[i].scsi_device_id >> 3] |= (1 << ((mo_drives[i].scsi_device_id & 0x07) << 3)); } /* Other peripherals category */ - temp_bugger = bugger_enabled; + temp_bugger = bugger_enabled; temp_postcard = postcard_enabled; - temp_isartc = isartc_type; + temp_isartc = isartc_type; /* ISA memory boards. */ for (i = 0; i < ISAMEM_MAX; i++) - temp_isamem[i] = isamem_type[i]; + temp_isamem[i] = isamem_type[i]; temp_deviceconfig = 0; } - /* This returns 1 if any variable has changed, 0 if not. */ static int win_settings_changed(void) @@ -487,15 +470,15 @@ win_settings_changed(void) /* Ports category */ for (j = 0; j < PARALLEL_MAX; j++) { - i = i || (temp_lpt_devices[j] != lpt_ports[j].device); - i = i || (temp_lpt[j] != lpt_ports[j].enabled); + i = i || (temp_lpt_devices[j] != lpt_ports[j].device); + i = i || (temp_lpt[j] != lpt_ports[j].enabled); } for (j = 0; j < SERIAL_MAX; j++) - i = i || (temp_serial[j] != serial_enabled[j]); + i = i || (temp_serial[j] != serial_enabled[j]); /* Storage devices category */ for (j = 0; j < SCSI_BUS_MAX; j++) - i = i || (temp_scsi_card[j] != scsi_card_current[j]); + i = i || (temp_scsi_card[j] != scsi_card_current[j]); i = i || (fdc_type != temp_fdc_card); i = i || (hdc_current != temp_hdc); i = i || (temp_ide_ter != ide_ter_enabled); @@ -507,9 +490,9 @@ win_settings_changed(void) /* Floppy drives category */ for (j = 0; j < FDD_NUM; j++) { - i = i || (temp_fdd_types[j] != fdd_get_type(j)); - i = i || (temp_fdd_turbo[j] != fdd_get_turbo(j)); - i = i || (temp_fdd_check_bpb[j] != fdd_get_check_bpb(j)); + i = i || (temp_fdd_types[j] != fdd_get_type(j)); + i = i || (temp_fdd_turbo[j] != fdd_get_turbo(j)); + i = i || (temp_fdd_check_bpb[j] != fdd_get_check_bpb(j)); } /* Other removable devices category */ @@ -524,14 +507,13 @@ win_settings_changed(void) /* ISA memory boards. */ for (j = 0; j < ISAMEM_MAX; j++) - i = i || (temp_isamem[j] != isamem_type[j]); + i = i || (temp_isamem[j] != isamem_type[j]); i = i || !!temp_deviceconfig; return i; } - /* This saves the settings back to the global variables. */ static void win_settings_save(void) @@ -541,37 +523,37 @@ win_settings_save(void) pc_reset_hard_close(); /* Machine category */ - machine = temp_machine; - cpu_f = temp_cpu_f; + machine = temp_machine; + cpu_f = temp_cpu_f; cpu_waitstates = temp_wait_states; - cpu = temp_cpu; - mem_size = temp_mem_size; + cpu = temp_cpu; + mem_size = temp_mem_size; #ifdef USE_DYNAREC cpu_use_dynarec = temp_dynarec; #endif - fpu_type = temp_fpu; + fpu_type = temp_fpu; time_sync = temp_sync; /* Video category */ - gfxcard = temp_gfxcard; - voodoo_enabled = temp_voodoo; + gfxcard = temp_gfxcard; + voodoo_enabled = temp_voodoo; ibm8514_enabled = temp_ibm8514; - xga_enabled = temp_xga; + xga_enabled = temp_xga; /* Input devices category */ - mouse_type = temp_mouse; + mouse_type = temp_mouse; joystick_type = temp_joystick; /* Sound category */ - sound_card_current = temp_sound_card; + sound_card_current = temp_sound_card; midi_output_device_current = temp_midi_output_device; - midi_input_device_current = temp_midi_input_device; - mpu401_standalone_enable = temp_mpu401; - SSI2001 = temp_SSI2001; - GAMEBLASTER = temp_GAMEBLASTER; - GUS = temp_GUS; - sound_is_float = temp_float; - fm_driver = temp_fm_driver; + midi_input_device_current = temp_midi_input_device; + mpu401_standalone_enable = temp_mpu401; + SSI2001 = temp_SSI2001; + GAMEBLASTER = temp_GAMEBLASTER; + GUS = temp_GUS; + sound_is_float = temp_float; + fm_driver = temp_fm_driver; /* Network category */ network_type = temp_net_type; @@ -581,17 +563,17 @@ win_settings_save(void) /* Ports category */ for (i = 0; i < PARALLEL_MAX; i++) { - lpt_ports[i].device = temp_lpt_devices[i]; - lpt_ports[i].enabled = temp_lpt[i]; + lpt_ports[i].device = temp_lpt_devices[i]; + lpt_ports[i].enabled = temp_lpt[i]; } for (i = 0; i < SERIAL_MAX; i++) - serial_enabled[i] = temp_serial[i]; + serial_enabled[i] = temp_serial[i]; /* Storage devices category */ for (i = 0; i < SCSI_BUS_MAX; i++) - scsi_card_current[i] = temp_scsi_card[i]; - hdc_current = temp_hdc; - fdc_type = temp_fdc_card; + scsi_card_current[i] = temp_scsi_card[i]; + hdc_current = temp_hdc; + fdc_type = temp_fdc_card; ide_ter_enabled = temp_ide_ter; ide_qua_enabled = temp_ide_qua; cassette_enable = temp_cassette; @@ -599,46 +581,46 @@ win_settings_save(void) /* Hard disks category */ memcpy(hdd, temp_hdd, HDD_NUM * sizeof(hard_disk_t)); for (i = 0; i < HDD_NUM; i++) - hdd[i].priv = NULL; + hdd[i].priv = NULL; /* Floppy drives category */ for (i = 0; i < FDD_NUM; i++) { - fdd_set_type(i, temp_fdd_types[i]); - fdd_set_turbo(i, temp_fdd_turbo[i]); - fdd_set_check_bpb(i, temp_fdd_check_bpb[i]); + fdd_set_type(i, temp_fdd_types[i]); + fdd_set_turbo(i, temp_fdd_turbo[i]); + fdd_set_check_bpb(i, temp_fdd_check_bpb[i]); } /* Removable devices category */ memcpy(cdrom, temp_cdrom, CDROM_NUM * sizeof(cdrom_t)); for (i = 0; i < CDROM_NUM; i++) { - cdrom[i].img_fp = NULL; - cdrom[i].priv = NULL; - cdrom[i].ops = NULL; - cdrom[i].image = NULL; - cdrom[i].insert = NULL; - cdrom[i].close = NULL; - cdrom[i].get_volume = NULL; - cdrom[i].get_channel = NULL; + cdrom[i].img_fp = NULL; + cdrom[i].priv = NULL; + cdrom[i].ops = NULL; + cdrom[i].image = NULL; + cdrom[i].insert = NULL; + cdrom[i].close = NULL; + cdrom[i].get_volume = NULL; + cdrom[i].get_channel = NULL; } memcpy(zip_drives, temp_zip_drives, ZIP_NUM * sizeof(zip_drive_t)); for (i = 0; i < ZIP_NUM; i++) { - zip_drives[i].f = NULL; - zip_drives[i].priv = NULL; + zip_drives[i].f = NULL; + zip_drives[i].priv = NULL; } memcpy(mo_drives, temp_mo_drives, MO_NUM * sizeof(mo_drive_t)); for (i = 0; i < MO_NUM; i++) { - mo_drives[i].f = NULL; - mo_drives[i].priv = NULL; + mo_drives[i].f = NULL; + mo_drives[i].priv = NULL; } /* Other peripherals category */ - bugger_enabled = temp_bugger; + bugger_enabled = temp_bugger; postcard_enabled = temp_postcard; - isartc_type = temp_isartc; + isartc_type = temp_isartc; /* ISA memory boards. */ for (i = 0; i < ISAMEM_MAX; i++) - isamem_type[i] = temp_isamem[i]; + isamem_type[i] = temp_isamem[i]; /* Mark configuration as changed. */ config_changed = 2; @@ -646,12 +628,11 @@ win_settings_save(void) pc_reset_hard_init(); } - static void win_settings_machine_recalc_fpu(HWND hdlg) { - int c, type; - LPTSTR lptsTemp; + int c, type; + LPTSTR lptsTemp; const char *stransi; lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); @@ -659,17 +640,17 @@ win_settings_machine_recalc_fpu(HWND hdlg) settings_reset_content(hdlg, IDC_COMBO_FPU); c = 0; while (1) { - stransi = (char *) fpu_get_name_from_index(temp_cpu_f, temp_cpu, c); - type = fpu_get_type_from_index(temp_cpu_f, temp_cpu, c); - if (!stransi) - break; + stransi = (char *) fpu_get_name_from_index(temp_cpu_f, temp_cpu, c); + type = fpu_get_type_from_index(temp_cpu_f, temp_cpu, c); + if (!stransi) + break; - mbstowcs(lptsTemp, stransi, strlen(stransi) + 1); - settings_add_string(hdlg, IDC_COMBO_FPU, (LPARAM)(LPCSTR)lptsTemp); - if (!c || (type == temp_fpu)) - settings_set_cur_sel(hdlg, IDC_COMBO_FPU, c); + mbstowcs(lptsTemp, stransi, strlen(stransi) + 1); + settings_add_string(hdlg, IDC_COMBO_FPU, (LPARAM) (LPCSTR) lptsTemp); + if (!c || (type == temp_fpu)) + settings_set_cur_sel(hdlg, IDC_COMBO_FPU, c); - c++; + c++; } settings_enable_window(hdlg, IDC_COMBO_FPU, c > 1); @@ -677,7 +658,6 @@ win_settings_machine_recalc_fpu(HWND hdlg) temp_fpu = fpu_get_type_from_index(temp_cpu_f, temp_cpu, settings_get_cur_sel(hdlg, IDC_COMBO_FPU)); } - static void win_settings_machine_recalc_cpu(HWND hdlg) { @@ -692,58 +672,57 @@ win_settings_machine_recalc_cpu(HWND hdlg) #ifdef USE_DYNAREC cpu_flags = temp_cpu_f->cpus[temp_cpu].cpu_flags; if (!(cpu_flags & CPU_SUPPORTS_DYNAREC) && (cpu_flags & CPU_REQUIRES_DYNAREC)) - fatal("Attempting to select a CPU that requires the recompiler and does not support it at the same time\n"); + fatal("Attempting to select a CPU that requires the recompiler and does not support it at the same time\n"); if (!(cpu_flags & CPU_SUPPORTS_DYNAREC) || (cpu_flags & CPU_REQUIRES_DYNAREC)) { - if (!(cpu_flags & CPU_SUPPORTS_DYNAREC)) - temp_dynarec = 0; - if (cpu_flags & CPU_REQUIRES_DYNAREC) - temp_dynarec = 1; - settings_set_check(hdlg, IDC_CHECK_DYNAREC, temp_dynarec); - settings_enable_window(hdlg, IDC_CHECK_DYNAREC, FALSE); + if (!(cpu_flags & CPU_SUPPORTS_DYNAREC)) + temp_dynarec = 0; + if (cpu_flags & CPU_REQUIRES_DYNAREC) + temp_dynarec = 1; + settings_set_check(hdlg, IDC_CHECK_DYNAREC, temp_dynarec); + settings_enable_window(hdlg, IDC_CHECK_DYNAREC, FALSE); } else { - settings_set_check(hdlg, IDC_CHECK_DYNAREC, temp_dynarec); - settings_enable_window(hdlg, IDC_CHECK_DYNAREC, TRUE); + settings_set_check(hdlg, IDC_CHECK_DYNAREC, temp_dynarec); + settings_enable_window(hdlg, IDC_CHECK_DYNAREC, TRUE); } #endif win_settings_machine_recalc_fpu(hdlg); } - static void win_settings_machine_recalc_cpu_m(HWND hdlg) { - int c, i, first_eligible = -1, current_eligible = 0, last_eligible = 0; + int c, i, first_eligible = -1, current_eligible = 0, last_eligible = 0; LPTSTR lptsTemp; - char *stransi; + char *stransi; lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); settings_reset_content(hdlg, IDC_COMBO_CPU_SPEED); c = i = 0; while (temp_cpu_f->cpus[c].cpu_type != 0) { - if (cpu_is_eligible(temp_cpu_f, c, temp_machine)) { - stransi = (char *) temp_cpu_f->cpus[c].name; - mbstowcs(lptsTemp, stransi, strlen(stransi) + 1); - settings_add_string(hdlg, IDC_COMBO_CPU_SPEED, (LPARAM)(LPCSTR)lptsTemp); + if (cpu_is_eligible(temp_cpu_f, c, temp_machine)) { + stransi = (char *) temp_cpu_f->cpus[c].name; + mbstowcs(lptsTemp, stransi, strlen(stransi) + 1); + settings_add_string(hdlg, IDC_COMBO_CPU_SPEED, (LPARAM) (LPCSTR) lptsTemp); - if (first_eligible == -1) - first_eligible = i; - if (temp_cpu == c) - current_eligible = i; - last_eligible = i; + if (first_eligible == -1) + first_eligible = i; + if (temp_cpu == c) + current_eligible = i; + last_eligible = i; - listtocpu[i++] = c; - } - c++; + listtocpu[i++] = c; + } + c++; } if (i == 0) - fatal("No eligible CPUs for the selected family\n"); + fatal("No eligible CPUs for the selected family\n"); settings_enable_window(hdlg, IDC_COMBO_CPU_SPEED, i != 1); if (current_eligible < first_eligible) - current_eligible = first_eligible; + current_eligible = first_eligible; else if (current_eligible > last_eligible) - current_eligible = last_eligible; + current_eligible = last_eligible; temp_cpu = listtocpu[current_eligible]; settings_set_cur_sel(hdlg, IDC_COMBO_CPU_SPEED, current_eligible); @@ -752,15 +731,14 @@ win_settings_machine_recalc_cpu_m(HWND hdlg) free(lptsTemp); } - static void win_settings_machine_recalc_machine(HWND hdlg) { - HWND h; - int c, i, current_eligible; - LPTSTR lptsTemp; - char *stransi; - UDACCEL accel; + HWND h; + int c, i, current_eligible; + LPTSTR lptsTemp; + char *stransi; + UDACCEL accel; device_t *d; lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); @@ -769,61 +747,61 @@ win_settings_machine_recalc_machine(HWND hdlg) settings_enable_window(hdlg, IDC_CONFIGURE_MACHINE, d && d->config); settings_reset_content(hdlg, IDC_COMBO_CPU_TYPE); - c = i = 0; + c = i = 0; current_eligible = -1; while (cpu_families[c].package != 0) { - if (cpu_family_is_eligible(&cpu_families[c], temp_machine)) { - stransi = malloc(strlen((char *) cpu_families[c].manufacturer) + strlen((char *) cpu_families[c].name) + 2); - sprintf(stransi, "%s %s", (char *) cpu_families[c].manufacturer, (char *) cpu_families[c].name); - mbstowcs(lptsTemp, stransi, strlen(stransi) + 1); - free(stransi); - settings_add_string(hdlg, IDC_COMBO_CPU_TYPE, (LPARAM)(LPCSTR)lptsTemp); - if (&cpu_families[c] == temp_cpu_f) - current_eligible = i; - listtocpufamily[i++] = c; - } - c++; + if (cpu_family_is_eligible(&cpu_families[c], temp_machine)) { + stransi = malloc(strlen((char *) cpu_families[c].manufacturer) + strlen((char *) cpu_families[c].name) + 2); + sprintf(stransi, "%s %s", (char *) cpu_families[c].manufacturer, (char *) cpu_families[c].name); + mbstowcs(lptsTemp, stransi, strlen(stransi) + 1); + free(stransi); + settings_add_string(hdlg, IDC_COMBO_CPU_TYPE, (LPARAM) (LPCSTR) lptsTemp); + if (&cpu_families[c] == temp_cpu_f) + current_eligible = i; + listtocpufamily[i++] = c; + } + c++; } if (i == 0) - fatal("No eligible CPU families for the selected machine\n"); + fatal("No eligible CPU families for the selected machine\n"); settings_enable_window(hdlg, IDC_COMBO_CPU_TYPE, TRUE); if (current_eligible == -1) { - temp_cpu_f = (cpu_family_t *) &cpu_families[listtocpufamily[0]]; - settings_set_cur_sel(hdlg, IDC_COMBO_CPU_TYPE, 0); + temp_cpu_f = (cpu_family_t *) &cpu_families[listtocpufamily[0]]; + settings_set_cur_sel(hdlg, IDC_COMBO_CPU_TYPE, 0); } else { - settings_set_cur_sel(hdlg, IDC_COMBO_CPU_TYPE, current_eligible); + settings_set_cur_sel(hdlg, IDC_COMBO_CPU_TYPE, current_eligible); } settings_enable_window(hdlg, IDC_COMBO_CPU_TYPE, i != 1); win_settings_machine_recalc_cpu_m(hdlg); if (machine_get_ram_granularity(temp_machine) & 1023) { - /* KB granularity */ - h = GetDlgItem(hdlg, IDC_MEMSPIN); - SendMessage(h, UDM_SETRANGE, 0, (machine_get_min_ram(temp_machine) << 16) | machine_get_max_ram(temp_machine)); + /* KB granularity */ + h = GetDlgItem(hdlg, IDC_MEMSPIN); + SendMessage(h, UDM_SETRANGE, 0, (machine_get_min_ram(temp_machine) << 16) | machine_get_max_ram(temp_machine)); - accel.nSec = 0; - accel.nInc = machine_get_ram_granularity(temp_machine); - SendMessage(h, UDM_SETACCEL, 1, (LPARAM)&accel); + accel.nSec = 0; + accel.nInc = machine_get_ram_granularity(temp_machine); + SendMessage(h, UDM_SETACCEL, 1, (LPARAM) &accel); - SendMessage(h, UDM_SETPOS, 0, temp_mem_size); + SendMessage(h, UDM_SETPOS, 0, temp_mem_size); - h = GetDlgItem(hdlg, IDC_TEXT_MB); - SendMessage(h, WM_SETTEXT, 0, win_get_string(IDS_2088)); + h = GetDlgItem(hdlg, IDC_TEXT_MB); + SendMessage(h, WM_SETTEXT, 0, win_get_string(IDS_2088)); } else { - /* MB granularity */ - h = GetDlgItem(hdlg, IDC_MEMSPIN); - SendMessage(h, UDM_SETRANGE, 0, (machine_get_min_ram(temp_machine) << 6) | (machine_get_max_ram(temp_machine) >> 10)); + /* MB granularity */ + h = GetDlgItem(hdlg, IDC_MEMSPIN); + SendMessage(h, UDM_SETRANGE, 0, (machine_get_min_ram(temp_machine) << 6) | (machine_get_max_ram(temp_machine) >> 10)); - accel.nSec = 0; - accel.nInc = machine_get_ram_granularity(temp_machine) >> 10; + accel.nSec = 0; + accel.nInc = machine_get_ram_granularity(temp_machine) >> 10; - SendMessage(h, UDM_SETACCEL, 1, (LPARAM)&accel); + SendMessage(h, UDM_SETACCEL, 1, (LPARAM) &accel); - SendMessage(h, UDM_SETPOS, 0, temp_mem_size >> 10); + SendMessage(h, UDM_SETPOS, 0, temp_mem_size >> 10); - h = GetDlgItem(hdlg, IDC_TEXT_MB); - SendMessage(h, WM_SETTEXT, 0, win_get_string(IDS_2086)); + h = GetDlgItem(hdlg, IDC_TEXT_MB); + SendMessage(h, WM_SETTEXT, 0, win_get_string(IDS_2086)); } settings_enable_window(hdlg, IDC_MEMSPIN, machine_get_min_ram(temp_machine) != machine_get_max_ram(temp_machine)); @@ -832,34 +810,31 @@ win_settings_machine_recalc_machine(HWND hdlg) free(lptsTemp); } - static char * machine_type_get_internal_name(int id) { if (id < MACHINE_TYPE_MAX) - return ""; + return ""; else - return NULL; + return NULL; } - int machine_type_available(int id) { int c = 0; if ((id > 0) && (id < MACHINE_TYPE_MAX)) { - while (machine_get_internal_name_ex(c) != NULL) { - if (machine_available(c) && (machine_get_type(c) == id)) - return 1; - c++; - } + while (machine_get_internal_name_ex(c) != NULL) { + if (machine_available(c) && (machine_get_type(c) == id)) + return 1; + c++; + } } return 0; } - #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK #else @@ -867,209 +842,207 @@ static BOOL CALLBACK #endif win_settings_machine_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { - HWND h, h2; - int c, d; - int old_machine_type; + HWND h, h2; + int c, d; + int old_machine_type; LPTSTR lptsTemp; - char *stransi; + char *stransi; switch (message) { - case WM_INITDIALOG: - lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); + case WM_INITDIALOG: + lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); - c = d = 0; - settings_reset_content(hdlg, IDC_COMBO_MACHINE_TYPE); - memset(listtomachinetype, 0x00, sizeof(listtomachinetype)); - while (machine_type_get_internal_name(c) != NULL) { - if (machine_type_available(c)) { - stransi = (char *)machine_types[c].name; - mbstowcs(lptsTemp, stransi, strlen(stransi) + 1); - settings_add_string(hdlg, IDC_COMBO_MACHINE_TYPE, (LPARAM) lptsTemp); - listtomachinetype[d] = c; - if (c == temp_machine_type) - settings_set_cur_sel(hdlg, IDC_COMBO_MACHINE_TYPE, d); - d++; - } - c++; - } + c = d = 0; + settings_reset_content(hdlg, IDC_COMBO_MACHINE_TYPE); + memset(listtomachinetype, 0x00, sizeof(listtomachinetype)); + while (machine_type_get_internal_name(c) != NULL) { + if (machine_type_available(c)) { + stransi = (char *) machine_types[c].name; + mbstowcs(lptsTemp, stransi, strlen(stransi) + 1); + settings_add_string(hdlg, IDC_COMBO_MACHINE_TYPE, (LPARAM) lptsTemp); + listtomachinetype[d] = c; + if (c == temp_machine_type) + settings_set_cur_sel(hdlg, IDC_COMBO_MACHINE_TYPE, d); + d++; + } + c++; + } - c = d = 0; - settings_reset_content(hdlg, IDC_COMBO_MACHINE); - memset(listtomachine, 0x00, sizeof(listtomachine)); - while (machine_get_internal_name_ex(c) != NULL) { - if (machine_available(c) && (machine_get_type(c) == temp_machine_type)) { - stransi = machine_getname_ex(c); - mbstowcs(lptsTemp, stransi, strlen(stransi) + 1); - settings_add_string(hdlg, IDC_COMBO_MACHINE, (LPARAM) lptsTemp); - listtomachine[d] = c; - if (c == temp_machine) - settings_set_cur_sel(hdlg, IDC_COMBO_MACHINE, d); - d++; - } - c++; - } + c = d = 0; + settings_reset_content(hdlg, IDC_COMBO_MACHINE); + memset(listtomachine, 0x00, sizeof(listtomachine)); + while (machine_get_internal_name_ex(c) != NULL) { + if (machine_available(c) && (machine_get_type(c) == temp_machine_type)) { + stransi = machine_getname_ex(c); + mbstowcs(lptsTemp, stransi, strlen(stransi) + 1); + settings_add_string(hdlg, IDC_COMBO_MACHINE, (LPARAM) lptsTemp); + listtomachine[d] = c; + if (c == temp_machine) + settings_set_cur_sel(hdlg, IDC_COMBO_MACHINE, d); + d++; + } + c++; + } - settings_add_string(hdlg, IDC_COMBO_WS, win_get_string(IDS_2090)); - for (c = 0; c < 8; c++) { - wsprintf(lptsTemp, plat_get_string(IDS_2091), c); - settings_add_string(hdlg, IDC_COMBO_WS, (LPARAM) lptsTemp); - } + settings_add_string(hdlg, IDC_COMBO_WS, win_get_string(IDS_2090)); + for (c = 0; c < 8; c++) { + wsprintf(lptsTemp, plat_get_string(IDS_2091), c); + settings_add_string(hdlg, IDC_COMBO_WS, (LPARAM) lptsTemp); + } - settings_set_cur_sel(hdlg, IDC_COMBO_WS, temp_wait_states); + settings_set_cur_sel(hdlg, IDC_COMBO_WS, temp_wait_states); #ifdef USE_DYNAREC - settings_set_check(hdlg, IDC_CHECK_DYNAREC, 0); + settings_set_check(hdlg, IDC_CHECK_DYNAREC, 0); #endif - h = GetDlgItem(hdlg, IDC_MEMSPIN); - h2 = GetDlgItem(hdlg, IDC_MEMTEXT); - SendMessage(h, UDM_SETBUDDY, (WPARAM)h2, 0); + h = GetDlgItem(hdlg, IDC_MEMSPIN); + h2 = GetDlgItem(hdlg, IDC_MEMTEXT); + SendMessage(h, UDM_SETBUDDY, (WPARAM) h2, 0); - if (temp_sync & TIME_SYNC_ENABLED) { - if (temp_sync & TIME_SYNC_UTC) - settings_set_check(hdlg, IDC_RADIO_TS_UTC, BST_CHECKED); - else - settings_set_check(hdlg, IDC_RADIO_TS_LOCAL, BST_CHECKED); - } else - settings_set_check(hdlg, IDC_RADIO_TS_DISABLED, BST_CHECKED); + if (temp_sync & TIME_SYNC_ENABLED) { + if (temp_sync & TIME_SYNC_UTC) + settings_set_check(hdlg, IDC_RADIO_TS_UTC, BST_CHECKED); + else + settings_set_check(hdlg, IDC_RADIO_TS_LOCAL, BST_CHECKED); + } else + settings_set_check(hdlg, IDC_RADIO_TS_DISABLED, BST_CHECKED); - win_settings_machine_recalc_machine(hdlg); + win_settings_machine_recalc_machine(hdlg); - free(lptsTemp); + free(lptsTemp); - return TRUE; + return TRUE; - case WM_COMMAND: - switch (LOWORD(wParam)) { - case IDC_COMBO_MACHINE_TYPE: - if (HIWORD(wParam) == CBN_SELCHANGE) { - old_machine_type = temp_machine_type; - temp_machine_type = listtomachinetype[settings_get_cur_sel(hdlg, IDC_COMBO_MACHINE_TYPE)]; + case WM_COMMAND: + switch (LOWORD(wParam)) { + case IDC_COMBO_MACHINE_TYPE: + if (HIWORD(wParam) == CBN_SELCHANGE) { + old_machine_type = temp_machine_type; + temp_machine_type = listtomachinetype[settings_get_cur_sel(hdlg, IDC_COMBO_MACHINE_TYPE)]; - lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); + lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); - settings_reset_content(hdlg, IDC_COMBO_MACHINE); - c = d = 0; - memset(listtomachine, 0x00, sizeof(listtomachine)); - while (machine_get_internal_name_ex(c) != NULL) { - if (machine_available(c) && (machine_get_type(c) == temp_machine_type)) { - stransi = machine_getname_ex(c); - mbstowcs(lptsTemp, stransi, strlen(stransi) + 1); - settings_add_string(hdlg, IDC_COMBO_MACHINE, (LPARAM) lptsTemp); - listtomachine[d] = c; - if (c == temp_machine) - settings_set_cur_sel(hdlg, IDC_COMBO_MACHINE, d); - d++; - } - c++; - } - if (old_machine_type != temp_machine_type) { - settings_set_cur_sel(hdlg, IDC_COMBO_MACHINE, 0); - temp_machine = listtomachine[0]; + settings_reset_content(hdlg, IDC_COMBO_MACHINE); + c = d = 0; + memset(listtomachine, 0x00, sizeof(listtomachine)); + while (machine_get_internal_name_ex(c) != NULL) { + if (machine_available(c) && (machine_get_type(c) == temp_machine_type)) { + stransi = machine_getname_ex(c); + mbstowcs(lptsTemp, stransi, strlen(stransi) + 1); + settings_add_string(hdlg, IDC_COMBO_MACHINE, (LPARAM) lptsTemp); + listtomachine[d] = c; + if (c == temp_machine) + settings_set_cur_sel(hdlg, IDC_COMBO_MACHINE, d); + d++; + } + c++; + } + if (old_machine_type != temp_machine_type) { + settings_set_cur_sel(hdlg, IDC_COMBO_MACHINE, 0); + temp_machine = listtomachine[0]; - win_settings_machine_recalc_machine(hdlg); - } + win_settings_machine_recalc_machine(hdlg); + } - free(lptsTemp); - } - break; - case IDC_COMBO_MACHINE: - if (HIWORD(wParam) == CBN_SELCHANGE) { - temp_machine = listtomachine[settings_get_cur_sel(hdlg, IDC_COMBO_MACHINE)]; - win_settings_machine_recalc_machine(hdlg); - } - break; - case IDC_COMBO_CPU_TYPE: - if (HIWORD(wParam) == CBN_SELCHANGE) { - temp_cpu_f = (cpu_family_t *) &cpu_families[listtocpufamily[settings_get_cur_sel(hdlg, IDC_COMBO_CPU_TYPE)]]; - temp_cpu = 0; - win_settings_machine_recalc_cpu_m(hdlg); - } - break; - case IDC_COMBO_CPU_SPEED: - if (HIWORD(wParam) == CBN_SELCHANGE) { - temp_cpu = listtocpu[settings_get_cur_sel(hdlg, IDC_COMBO_CPU_SPEED)]; - win_settings_machine_recalc_cpu(hdlg); - } - break; - case IDC_COMBO_FPU: - if (HIWORD(wParam) == CBN_SELCHANGE) { - temp_fpu = fpu_get_type_from_index(temp_cpu_f, temp_cpu, - settings_get_cur_sel(hdlg, IDC_COMBO_FPU)); - } - break; - case IDC_CONFIGURE_MACHINE: - temp_machine = listtomachine[settings_get_cur_sel(hdlg, IDC_COMBO_MACHINE)]; - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)machine_getdevice(temp_machine)); - break; - } + free(lptsTemp); + } + break; + case IDC_COMBO_MACHINE: + if (HIWORD(wParam) == CBN_SELCHANGE) { + temp_machine = listtomachine[settings_get_cur_sel(hdlg, IDC_COMBO_MACHINE)]; + win_settings_machine_recalc_machine(hdlg); + } + break; + case IDC_COMBO_CPU_TYPE: + if (HIWORD(wParam) == CBN_SELCHANGE) { + temp_cpu_f = (cpu_family_t *) &cpu_families[listtocpufamily[settings_get_cur_sel(hdlg, IDC_COMBO_CPU_TYPE)]]; + temp_cpu = 0; + win_settings_machine_recalc_cpu_m(hdlg); + } + break; + case IDC_COMBO_CPU_SPEED: + if (HIWORD(wParam) == CBN_SELCHANGE) { + temp_cpu = listtocpu[settings_get_cur_sel(hdlg, IDC_COMBO_CPU_SPEED)]; + win_settings_machine_recalc_cpu(hdlg); + } + break; + case IDC_COMBO_FPU: + if (HIWORD(wParam) == CBN_SELCHANGE) { + temp_fpu = fpu_get_type_from_index(temp_cpu_f, temp_cpu, + settings_get_cur_sel(hdlg, IDC_COMBO_FPU)); + } + break; + case IDC_CONFIGURE_MACHINE: + temp_machine = listtomachine[settings_get_cur_sel(hdlg, IDC_COMBO_MACHINE)]; + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) machine_getdevice(temp_machine)); + break; + } - return FALSE; + return FALSE; - case WM_SAVESETTINGS: - lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); - stransi = (char *)malloc(512); + case WM_SAVESETTINGS: + lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); + stransi = (char *) malloc(512); #ifdef USE_DYNAREC - temp_dynarec = settings_get_check(hdlg, IDC_CHECK_DYNAREC); + temp_dynarec = settings_get_check(hdlg, IDC_CHECK_DYNAREC); #endif - if (settings_get_check(hdlg, IDC_RADIO_TS_DISABLED)) - temp_sync = TIME_SYNC_DISABLED; + if (settings_get_check(hdlg, IDC_RADIO_TS_DISABLED)) + temp_sync = TIME_SYNC_DISABLED; - if (settings_get_check(hdlg, IDC_RADIO_TS_LOCAL)) - temp_sync = TIME_SYNC_ENABLED; + if (settings_get_check(hdlg, IDC_RADIO_TS_LOCAL)) + temp_sync = TIME_SYNC_ENABLED; - if (settings_get_check(hdlg, IDC_RADIO_TS_UTC)) - temp_sync = TIME_SYNC_ENABLED | TIME_SYNC_UTC; + if (settings_get_check(hdlg, IDC_RADIO_TS_UTC)) + temp_sync = TIME_SYNC_ENABLED | TIME_SYNC_UTC; - temp_wait_states = settings_get_cur_sel(hdlg, IDC_COMBO_WS); + temp_wait_states = settings_get_cur_sel(hdlg, IDC_COMBO_WS); - h = GetDlgItem(hdlg, IDC_MEMTEXT); - SendMessage(h, WM_GETTEXT, 255, (LPARAM) lptsTemp); - wcstombs(stransi, lptsTemp, 512); - sscanf(stransi, "%u", &temp_mem_size); - if (!(machine_get_ram_granularity(temp_machine) & 1023)) - temp_mem_size = temp_mem_size << 10; - temp_mem_size &= ~(machine_get_ram_granularity(temp_machine) - 1); - if (temp_mem_size < machine_get_min_ram(temp_machine)) - temp_mem_size = machine_get_min_ram(temp_machine); - else if (temp_mem_size > machine_get_max_ram(temp_machine)) - temp_mem_size = machine_get_max_ram(temp_machine); - free(stransi); - free(lptsTemp); + h = GetDlgItem(hdlg, IDC_MEMTEXT); + SendMessage(h, WM_GETTEXT, 255, (LPARAM) lptsTemp); + wcstombs(stransi, lptsTemp, 512); + sscanf(stransi, "%u", &temp_mem_size); + if (!(machine_get_ram_granularity(temp_machine) & 1023)) + temp_mem_size = temp_mem_size << 10; + temp_mem_size &= ~(machine_get_ram_granularity(temp_machine) - 1); + if (temp_mem_size < machine_get_min_ram(temp_machine)) + temp_mem_size = machine_get_min_ram(temp_machine); + else if (temp_mem_size > machine_get_max_ram(temp_machine)) + temp_mem_size = machine_get_max_ram(temp_machine); + free(stransi); + free(lptsTemp); - default: - return FALSE; + default: + return FALSE; } return FALSE; } - static void generate_device_name(const device_t *device, char *internal_name, int bus) { - char temp[512]; + char temp[512]; WCHAR *wtemp; memset(device_name, 0x00, 512 * sizeof(WCHAR)); memset(temp, 0x00, 512); if (!strcmp(internal_name, "none")) { - /* Translate "None". */ - wtemp = (WCHAR *) win_get_string(IDS_2103); - memcpy(device_name, wtemp, (wcslen(wtemp) + 1) * sizeof(WCHAR)); - return; + /* Translate "None". */ + wtemp = (WCHAR *) win_get_string(IDS_2103); + memcpy(device_name, wtemp, (wcslen(wtemp) + 1) * sizeof(WCHAR)); + return; } else if (!strcmp(internal_name, "internal")) - memcpy(temp, "Internal", 9); + memcpy(temp, "Internal", 9); else - device_get_name(device, bus, temp); + device_get_name(device, bus, temp); mbstowcs(device_name, temp, strlen(temp) + 1); } - #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK #else @@ -1081,123 +1054,120 @@ win_settings_video_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) int e; switch (message) { - case WM_INITDIALOG: - settings_reset_content(hdlg, IDC_COMBO_VIDEO); + case WM_INITDIALOG: + settings_reset_content(hdlg, IDC_COMBO_VIDEO); - while (1) { - /* Skip "internal" if machine doesn't have it. */ - if ((c == 1) && !machine_has_flags(temp_machine, MACHINE_VIDEO)) { - c++; - continue; - } + while (1) { + /* Skip "internal" if machine doesn't have it. */ + if ((c == 1) && !machine_has_flags(temp_machine, MACHINE_VIDEO)) { + c++; + continue; + } - generate_device_name(video_card_getdevice(c), video_get_internal_name(c), 1); + generate_device_name(video_card_getdevice(c), video_get_internal_name(c), 1); - if (!device_name[0]) - break; + if (!device_name[0]) + break; - if (video_card_available(c) && - device_is_valid(video_card_getdevice(c), temp_machine)) { - if (c == 0) - settings_add_string(hdlg, IDC_COMBO_VIDEO, win_get_string(IDS_2103)); - else if (c == 1) - settings_add_string(hdlg, IDC_COMBO_VIDEO, win_get_string(IDS_2118)); - else - settings_add_string(hdlg, IDC_COMBO_VIDEO, (LPARAM) device_name); - settings_list_to_device[0][d] = c; - if ((c == 0) || (c == temp_gfxcard)) - settings_set_cur_sel(hdlg, IDC_COMBO_VIDEO, d); - d++; - } + if (video_card_available(c) && device_is_valid(video_card_getdevice(c), temp_machine)) { + if (c == 0) + settings_add_string(hdlg, IDC_COMBO_VIDEO, win_get_string(IDS_2103)); + else if (c == 1) + settings_add_string(hdlg, IDC_COMBO_VIDEO, win_get_string(IDS_2118)); + else + settings_add_string(hdlg, IDC_COMBO_VIDEO, (LPARAM) device_name); + settings_list_to_device[0][d] = c; + if ((c == 0) || (c == temp_gfxcard)) + settings_set_cur_sel(hdlg, IDC_COMBO_VIDEO, d); + d++; + } - c++; + c++; - settings_process_messages(); - } + settings_process_messages(); + } - settings_enable_window(hdlg, IDC_COMBO_VIDEO, !machine_has_flags(temp_machine, MACHINE_VIDEO_ONLY)); - e = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_VIDEO)]; - settings_enable_window(hdlg, IDC_CONFIGURE_VID, video_card_has_config(e)); + settings_enable_window(hdlg, IDC_COMBO_VIDEO, !machine_has_flags(temp_machine, MACHINE_VIDEO_ONLY)); + e = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_VIDEO)]; + settings_enable_window(hdlg, IDC_CONFIGURE_VID, video_card_has_config(e)); - settings_enable_window(hdlg, IDC_CHECK_VOODOO, machine_has_bus(temp_machine, MACHINE_BUS_PCI)); - settings_set_check(hdlg, IDC_CHECK_VOODOO, temp_voodoo); - settings_enable_window(hdlg, IDC_BUTTON_VOODOO, machine_has_bus(temp_machine, MACHINE_BUS_PCI) && temp_voodoo); + settings_enable_window(hdlg, IDC_CHECK_VOODOO, machine_has_bus(temp_machine, MACHINE_BUS_PCI)); + settings_set_check(hdlg, IDC_CHECK_VOODOO, temp_voodoo); + settings_enable_window(hdlg, IDC_BUTTON_VOODOO, machine_has_bus(temp_machine, MACHINE_BUS_PCI) && temp_voodoo); - settings_enable_window(hdlg, IDC_CHECK_IBM8514, machine_has_bus(temp_machine, MACHINE_BUS_ISA16) || machine_has_bus(temp_machine, MACHINE_BUS_MCA)); - settings_set_check(hdlg, IDC_CHECK_IBM8514, temp_ibm8514); + settings_enable_window(hdlg, IDC_CHECK_IBM8514, machine_has_bus(temp_machine, MACHINE_BUS_ISA16) || machine_has_bus(temp_machine, MACHINE_BUS_MCA)); + settings_set_check(hdlg, IDC_CHECK_IBM8514, temp_ibm8514); - settings_enable_window(hdlg, IDC_CHECK_XGA, machine_has_bus(temp_machine, MACHINE_BUS_ISA16) || machine_has_bus(temp_machine, MACHINE_BUS_MCA)); - settings_set_check(hdlg, IDC_CHECK_XGA, temp_xga); - settings_enable_window(hdlg, IDC_BUTTON_XGA, (machine_has_bus(temp_machine, MACHINE_BUS_ISA16) || machine_has_bus(temp_machine, MACHINE_BUS_MCA)) && temp_xga); + settings_enable_window(hdlg, IDC_CHECK_XGA, machine_has_bus(temp_machine, MACHINE_BUS_ISA16) || machine_has_bus(temp_machine, MACHINE_BUS_MCA)); + settings_set_check(hdlg, IDC_CHECK_XGA, temp_xga); + settings_enable_window(hdlg, IDC_BUTTON_XGA, (machine_has_bus(temp_machine, MACHINE_BUS_ISA16) || machine_has_bus(temp_machine, MACHINE_BUS_MCA)) && temp_xga); - return TRUE; + return TRUE; - case WM_COMMAND: - switch (LOWORD(wParam)) { - case IDC_COMBO_VIDEO: - temp_gfxcard = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_VIDEO)]; - settings_enable_window(hdlg, IDC_CONFIGURE_VID, video_card_has_config(temp_gfxcard)); - break; + case WM_COMMAND: + switch (LOWORD(wParam)) { + case IDC_COMBO_VIDEO: + temp_gfxcard = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_VIDEO)]; + settings_enable_window(hdlg, IDC_CONFIGURE_VID, video_card_has_config(temp_gfxcard)); + break; - case IDC_CHECK_VOODOO: - temp_voodoo = settings_get_check(hdlg, IDC_CHECK_VOODOO); - settings_enable_window(hdlg, IDC_BUTTON_VOODOO, temp_voodoo); - break; + case IDC_CHECK_VOODOO: + temp_voodoo = settings_get_check(hdlg, IDC_CHECK_VOODOO); + settings_enable_window(hdlg, IDC_BUTTON_VOODOO, temp_voodoo); + break; - case IDC_CHECK_IBM8514: - temp_ibm8514 = settings_get_check(hdlg, IDC_CHECK_IBM8514); - break; + case IDC_CHECK_IBM8514: + temp_ibm8514 = settings_get_check(hdlg, IDC_CHECK_IBM8514); + break; - case IDC_CHECK_XGA: - temp_xga = settings_get_check(hdlg, IDC_CHECK_XGA); - settings_enable_window(hdlg, IDC_BUTTON_XGA, temp_xga); - break; + case IDC_CHECK_XGA: + temp_xga = settings_get_check(hdlg, IDC_CHECK_XGA); + settings_enable_window(hdlg, IDC_BUTTON_XGA, temp_xga); + break; - case IDC_BUTTON_VOODOO: - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)&voodoo_device); - break; + case IDC_BUTTON_VOODOO: + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) &voodoo_device); + break; - case IDC_BUTTON_XGA: - if (machine_has_bus(temp_machine, MACHINE_BUS_MCA) > 0) { - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)&xga_device); - } else { - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)&xga_isa_device); - } - break; + case IDC_BUTTON_XGA: + if (machine_has_bus(temp_machine, MACHINE_BUS_MCA) > 0) { + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) &xga_device); + } else { + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) &xga_isa_device); + } + break; - case IDC_CONFIGURE_VID: - temp_gfxcard = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_VIDEO)]; - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)video_card_getdevice(temp_gfxcard)); - break; - } - return FALSE; + case IDC_CONFIGURE_VID: + temp_gfxcard = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_VIDEO)]; + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) video_card_getdevice(temp_gfxcard)); + break; + } + return FALSE; - case WM_SAVESETTINGS: - temp_gfxcard = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_VIDEO)]; - temp_voodoo = settings_get_check(hdlg, IDC_CHECK_VOODOO); - temp_ibm8514 = settings_get_check(hdlg, IDC_CHECK_IBM8514); - temp_xga = settings_get_check(hdlg, IDC_CHECK_XGA); + case WM_SAVESETTINGS: + temp_gfxcard = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_VIDEO)]; + temp_voodoo = settings_get_check(hdlg, IDC_CHECK_VOODOO); + temp_ibm8514 = settings_get_check(hdlg, IDC_CHECK_IBM8514); + temp_xga = settings_get_check(hdlg, IDC_CHECK_XGA); - default: - return FALSE; + default: + return FALSE; } return FALSE; } - static int mouse_valid(int num, int m) { const device_t *dev; - if ((num == MOUSE_TYPE_INTERNAL) && - !machine_has_flags(m, MACHINE_MOUSE)) return(0); + if ((num == MOUSE_TYPE_INTERNAL) && !machine_has_flags(m, MACHINE_MOUSE)) + return (0); dev = mouse_get_device(num); - return(device_is_valid(dev, m)); + return (device_is_valid(dev, m)); } - #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK #else @@ -1206,107 +1176,107 @@ static BOOL CALLBACK win_settings_input_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { wchar_t str[128]; - char *joy_name; - int c, d; + char *joy_name; + int c, d; switch (message) { - case WM_INITDIALOG: - c = d = 0; - settings_reset_content(hdlg, IDC_COMBO_MOUSE); - for (c = 0; c < mouse_get_ndev(); c++) { - if (mouse_valid(c, temp_machine)) { - generate_device_name(mouse_get_device(c), mouse_get_internal_name(c), 0); - if (c == 0) - settings_add_string(hdlg, IDC_COMBO_MOUSE, win_get_string(IDS_2103)); - else if (c == 1) - settings_add_string(hdlg, IDC_COMBO_MOUSE, win_get_string(IDS_2118)); - else - settings_add_string(hdlg, IDC_COMBO_MOUSE, (LPARAM) device_name); - settings_list_to_device[0][d] = c; - if ((c == 0) || (c == temp_mouse)) - settings_set_cur_sel(hdlg, IDC_COMBO_MOUSE, d); - d++; - } - } + case WM_INITDIALOG: + c = d = 0; + settings_reset_content(hdlg, IDC_COMBO_MOUSE); + for (c = 0; c < mouse_get_ndev(); c++) { + if (mouse_valid(c, temp_machine)) { + generate_device_name(mouse_get_device(c), mouse_get_internal_name(c), 0); + if (c == 0) + settings_add_string(hdlg, IDC_COMBO_MOUSE, win_get_string(IDS_2103)); + else if (c == 1) + settings_add_string(hdlg, IDC_COMBO_MOUSE, win_get_string(IDS_2118)); + else + settings_add_string(hdlg, IDC_COMBO_MOUSE, (LPARAM) device_name); + settings_list_to_device[0][d] = c; + if ((c == 0) || (c == temp_mouse)) + settings_set_cur_sel(hdlg, IDC_COMBO_MOUSE, d); + d++; + } + } - settings_enable_window(hdlg, IDC_CONFIGURE_MOUSE, mouse_has_config(temp_mouse)); + settings_enable_window(hdlg, IDC_CONFIGURE_MOUSE, mouse_has_config(temp_mouse)); - c = 0; - joy_name = joystick_get_name(c); - while (joy_name) - { - mbstowcs(str, joy_name, strlen(joy_name) + 1); - settings_add_string(hdlg, IDC_COMBO_JOYSTICK, (LPARAM) str); + c = 0; + joy_name = joystick_get_name(c); + while (joy_name) { + mbstowcs(str, joy_name, strlen(joy_name) + 1); + settings_add_string(hdlg, IDC_COMBO_JOYSTICK, (LPARAM) str); - c++; - joy_name = joystick_get_name(c); - } - settings_enable_window(hdlg, IDC_COMBO_JOYSTICK, TRUE); - settings_set_cur_sel(hdlg, IDC_COMBO_JOYSTICK, temp_joystick); + c++; + joy_name = joystick_get_name(c); + } + settings_enable_window(hdlg, IDC_COMBO_JOYSTICK, TRUE); + settings_set_cur_sel(hdlg, IDC_COMBO_JOYSTICK, temp_joystick); - for (c = 0; c < 4; c++) - settings_enable_window(hdlg, IDC_JOY1 + c, joystick_get_max_joysticks(temp_joystick) > c); + for (c = 0; c < 4; c++) + settings_enable_window(hdlg, IDC_JOY1 + c, joystick_get_max_joysticks(temp_joystick) > c); - return TRUE; + return TRUE; - case WM_COMMAND: - switch (LOWORD(wParam)) { - case IDC_COMBO_MOUSE: - temp_mouse = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_MOUSE)]; - settings_enable_window(hdlg, IDC_CONFIGURE_MOUSE, mouse_has_config(temp_mouse)); - break; + case WM_COMMAND: + switch (LOWORD(wParam)) { + case IDC_COMBO_MOUSE: + temp_mouse = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_MOUSE)]; + settings_enable_window(hdlg, IDC_CONFIGURE_MOUSE, mouse_has_config(temp_mouse)); + break; - case IDC_CONFIGURE_MOUSE: - temp_mouse = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_MOUSE)]; - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)mouse_get_device(temp_mouse)); - break; + case IDC_CONFIGURE_MOUSE: + temp_mouse = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_MOUSE)]; + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) mouse_get_device(temp_mouse)); + break; - case IDC_COMBO_JOYSTICK: - temp_joystick = settings_get_cur_sel(hdlg, IDC_COMBO_JOYSTICK); + case IDC_COMBO_JOYSTICK: + temp_joystick = settings_get_cur_sel(hdlg, IDC_COMBO_JOYSTICK); - for (c = 0; c < 4; c++) - settings_enable_window(hdlg, IDC_JOY1 + c, joystick_get_max_joysticks(temp_joystick) > c); - break; + for (c = 0; c < 4; c++) + settings_enable_window(hdlg, IDC_JOY1 + c, joystick_get_max_joysticks(temp_joystick) > c); + break; - case IDC_JOY1: case IDC_JOY2: case IDC_JOY3: case IDC_JOY4: - temp_joystick = settings_get_cur_sel(hdlg, IDC_COMBO_JOYSTICK); - temp_deviceconfig |= joystickconfig_open(hdlg, LOWORD(wParam) - IDC_JOY1, temp_joystick); - break; - } - return FALSE; + case IDC_JOY1: + case IDC_JOY2: + case IDC_JOY3: + case IDC_JOY4: + temp_joystick = settings_get_cur_sel(hdlg, IDC_COMBO_JOYSTICK); + temp_deviceconfig |= joystickconfig_open(hdlg, LOWORD(wParam) - IDC_JOY1, temp_joystick); + break; + } + return FALSE; - case WM_SAVESETTINGS: - temp_mouse = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_MOUSE)]; - temp_joystick = settings_get_cur_sel(hdlg, IDC_COMBO_JOYSTICK); + case WM_SAVESETTINGS: + temp_mouse = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_MOUSE)]; + temp_joystick = settings_get_cur_sel(hdlg, IDC_COMBO_JOYSTICK); - default: - return FALSE; + default: + return FALSE; } return FALSE; } - static int mpu401_present(void) { return temp_mpu401 ? 1 : 0; } - int mpu401_standalone_allow(void) { char *md, *mdin; if (!machine_has_bus(temp_machine, MACHINE_BUS_ISA) && !machine_has_bus(temp_machine, MACHINE_BUS_MCA)) - return 0; + return 0; - md = midi_out_device_get_internal_name(temp_midi_output_device); + md = midi_out_device_get_internal_name(temp_midi_output_device); mdin = midi_in_device_get_internal_name(temp_midi_input_device); if (md != NULL) { - if (!strcmp(md, "none") && !strcmp(mdin, "none")) - return 0; + if (!strcmp(md, "none") && !strcmp(mdin, "none")) + return 0; } return 1; @@ -1319,224 +1289,222 @@ static BOOL CALLBACK #endif win_settings_sound_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { - int c, d; - LPTSTR lptsTemp; + int c, d; + LPTSTR lptsTemp; const device_t *sound_dev; switch (message) { - case WM_INITDIALOG: - lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); + case WM_INITDIALOG: + lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); - c = d = 0; - settings_reset_content(hdlg, IDC_COMBO_SOUND); - while (1) { - /* Skip "internal" if machine doesn't have it. */ - if ((c == 1) && !machine_has_flags(temp_machine, MACHINE_SOUND)) { - c++; - continue; - } + c = d = 0; + settings_reset_content(hdlg, IDC_COMBO_SOUND); + while (1) { + /* Skip "internal" if machine doesn't have it. */ + if ((c == 1) && !machine_has_flags(temp_machine, MACHINE_SOUND)) { + c++; + continue; + } - generate_device_name(sound_card_getdevice(c), sound_card_get_internal_name(c), 1); + generate_device_name(sound_card_getdevice(c), sound_card_get_internal_name(c), 1); - if (!device_name[0]) - break; + if (!device_name[0]) + break; - if (sound_card_available(c)) { - sound_dev = sound_card_getdevice(c); + if (sound_card_available(c)) { + sound_dev = sound_card_getdevice(c); - if (device_is_valid(sound_dev, temp_machine)) { - if (c == 0) - settings_add_string(hdlg, IDC_COMBO_SOUND, win_get_string(IDS_2103)); - else if (c == 1) - settings_add_string(hdlg, IDC_COMBO_SOUND, win_get_string(IDS_2118)); - else - settings_add_string(hdlg, IDC_COMBO_SOUND, (LPARAM) device_name); - settings_list_to_device[0][d] = c; - if ((c == 0) || (c == temp_sound_card)) - settings_set_cur_sel(hdlg, IDC_COMBO_SOUND, d); - d++; - } - } + if (device_is_valid(sound_dev, temp_machine)) { + if (c == 0) + settings_add_string(hdlg, IDC_COMBO_SOUND, win_get_string(IDS_2103)); + else if (c == 1) + settings_add_string(hdlg, IDC_COMBO_SOUND, win_get_string(IDS_2118)); + else + settings_add_string(hdlg, IDC_COMBO_SOUND, (LPARAM) device_name); + settings_list_to_device[0][d] = c; + if ((c == 0) || (c == temp_sound_card)) + settings_set_cur_sel(hdlg, IDC_COMBO_SOUND, d); + d++; + } + } - c++; - } + c++; + } - settings_enable_window(hdlg, IDC_COMBO_SOUND, d); - settings_enable_window(hdlg, IDC_CONFIGURE_SND, sound_card_has_config(temp_sound_card)); + settings_enable_window(hdlg, IDC_COMBO_SOUND, d); + settings_enable_window(hdlg, IDC_CONFIGURE_SND, sound_card_has_config(temp_sound_card)); - c = d = 0; - settings_reset_content(hdlg, IDC_COMBO_MIDI_OUT); - while (1) { - generate_device_name(midi_out_device_getdevice(c), midi_out_device_get_internal_name(c), 0); + c = d = 0; + settings_reset_content(hdlg, IDC_COMBO_MIDI_OUT); + while (1) { + generate_device_name(midi_out_device_getdevice(c), midi_out_device_get_internal_name(c), 0); - if (!device_name[0]) - break; + if (!device_name[0]) + break; - if (midi_out_device_available(c)) { - if (c == 0) - settings_add_string(hdlg, IDC_COMBO_MIDI_OUT, win_get_string(IDS_2103)); - else - settings_add_string(hdlg, IDC_COMBO_MIDI_OUT, (LPARAM) device_name); - settings_list_to_midi[d] = c; - if ((c == 0) || (c == temp_midi_output_device)) - settings_set_cur_sel(hdlg, IDC_COMBO_MIDI_OUT, d); - d++; - } + if (midi_out_device_available(c)) { + if (c == 0) + settings_add_string(hdlg, IDC_COMBO_MIDI_OUT, win_get_string(IDS_2103)); + else + settings_add_string(hdlg, IDC_COMBO_MIDI_OUT, (LPARAM) device_name); + settings_list_to_midi[d] = c; + if ((c == 0) || (c == temp_midi_output_device)) + settings_set_cur_sel(hdlg, IDC_COMBO_MIDI_OUT, d); + d++; + } - c++; - } + c++; + } - settings_enable_window(hdlg, IDC_CONFIGURE_MIDI_OUT, midi_out_device_has_config(temp_midi_output_device)); + settings_enable_window(hdlg, IDC_CONFIGURE_MIDI_OUT, midi_out_device_has_config(temp_midi_output_device)); - c = d = 0; - settings_reset_content(hdlg, IDC_COMBO_MIDI_IN); - while (1) { - generate_device_name(midi_in_device_getdevice(c), midi_in_device_get_internal_name(c), 0); + c = d = 0; + settings_reset_content(hdlg, IDC_COMBO_MIDI_IN); + while (1) { + generate_device_name(midi_in_device_getdevice(c), midi_in_device_get_internal_name(c), 0); - if (!device_name[0]) - break; + if (!device_name[0]) + break; - if (midi_in_device_available(c)) { - if (c == 0) - settings_add_string(hdlg, IDC_COMBO_MIDI_IN, win_get_string(IDS_2103)); - else - settings_add_string(hdlg, IDC_COMBO_MIDI_IN, (LPARAM) device_name); - settings_list_to_midi_in[d] = c; - if ((c == 0) || (c == temp_midi_input_device)) - settings_set_cur_sel(hdlg, IDC_COMBO_MIDI_IN, d); - d++; - } + if (midi_in_device_available(c)) { + if (c == 0) + settings_add_string(hdlg, IDC_COMBO_MIDI_IN, win_get_string(IDS_2103)); + else + settings_add_string(hdlg, IDC_COMBO_MIDI_IN, (LPARAM) device_name); + settings_list_to_midi_in[d] = c; + if ((c == 0) || (c == temp_midi_input_device)) + settings_set_cur_sel(hdlg, IDC_COMBO_MIDI_IN, d); + d++; + } - c++; - } + c++; + } - settings_enable_window(hdlg, IDC_CONFIGURE_MIDI_IN, midi_in_device_has_config(temp_midi_input_device)); - settings_set_check(hdlg, IDC_CHECK_MPU401, temp_mpu401); - settings_enable_window(hdlg, IDC_CHECK_MPU401, mpu401_standalone_allow()); - settings_enable_window(hdlg, IDC_CONFIGURE_MPU401, mpu401_standalone_allow() && temp_mpu401); - settings_enable_window(hdlg, IDC_CHECK_CMS, machine_has_bus(temp_machine, MACHINE_BUS_ISA)); - settings_set_check(hdlg, IDC_CHECK_CMS, temp_GAMEBLASTER); - settings_enable_window(hdlg, IDC_CONFIGURE_CMS, machine_has_bus(temp_machine, MACHINE_BUS_ISA) && temp_GAMEBLASTER); - settings_enable_window(hdlg, IDC_CHECK_GUS, machine_has_bus(temp_machine, MACHINE_BUS_ISA16)); - settings_set_check(hdlg, IDC_CHECK_GUS, temp_GUS); - settings_enable_window(hdlg, IDC_CONFIGURE_GUS, machine_has_bus(temp_machine, MACHINE_BUS_ISA16) && temp_GUS); - settings_enable_window(hdlg, IDC_CHECK_SSI, machine_has_bus(temp_machine, MACHINE_BUS_ISA)); - settings_set_check(hdlg, IDC_CHECK_SSI, temp_SSI2001); - settings_enable_window(hdlg, IDC_CONFIGURE_SSI, machine_has_bus(temp_machine, MACHINE_BUS_ISA) && temp_SSI2001); - settings_set_check(hdlg, IDC_CHECK_FLOAT, temp_float); + settings_enable_window(hdlg, IDC_CONFIGURE_MIDI_IN, midi_in_device_has_config(temp_midi_input_device)); + settings_set_check(hdlg, IDC_CHECK_MPU401, temp_mpu401); + settings_enable_window(hdlg, IDC_CHECK_MPU401, mpu401_standalone_allow()); + settings_enable_window(hdlg, IDC_CONFIGURE_MPU401, mpu401_standalone_allow() && temp_mpu401); + settings_enable_window(hdlg, IDC_CHECK_CMS, machine_has_bus(temp_machine, MACHINE_BUS_ISA)); + settings_set_check(hdlg, IDC_CHECK_CMS, temp_GAMEBLASTER); + settings_enable_window(hdlg, IDC_CONFIGURE_CMS, machine_has_bus(temp_machine, MACHINE_BUS_ISA) && temp_GAMEBLASTER); + settings_enable_window(hdlg, IDC_CHECK_GUS, machine_has_bus(temp_machine, MACHINE_BUS_ISA16)); + settings_set_check(hdlg, IDC_CHECK_GUS, temp_GUS); + settings_enable_window(hdlg, IDC_CONFIGURE_GUS, machine_has_bus(temp_machine, MACHINE_BUS_ISA16) && temp_GUS); + settings_enable_window(hdlg, IDC_CHECK_SSI, machine_has_bus(temp_machine, MACHINE_BUS_ISA)); + settings_set_check(hdlg, IDC_CHECK_SSI, temp_SSI2001); + settings_enable_window(hdlg, IDC_CONFIGURE_SSI, machine_has_bus(temp_machine, MACHINE_BUS_ISA) && temp_SSI2001); + settings_set_check(hdlg, IDC_CHECK_FLOAT, temp_float); - if (temp_fm_driver == FM_DRV_YMFM) - settings_set_check(hdlg, IDC_RADIO_FM_DRV_YMFM, BST_CHECKED); - else - settings_set_check(hdlg, IDC_RADIO_FM_DRV_NUKED, BST_CHECKED); + if (temp_fm_driver == FM_DRV_YMFM) + settings_set_check(hdlg, IDC_RADIO_FM_DRV_YMFM, BST_CHECKED); + else + settings_set_check(hdlg, IDC_RADIO_FM_DRV_NUKED, BST_CHECKED); - free(lptsTemp); + free(lptsTemp); - return TRUE; + return TRUE; - case WM_COMMAND: - switch (LOWORD(wParam)) { - case IDC_COMBO_SOUND: - temp_sound_card = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_SOUND)]; - settings_enable_window(hdlg, IDC_CONFIGURE_SND, sound_card_has_config(temp_sound_card)); - settings_set_check(hdlg, IDC_CHECK_MPU401, temp_mpu401); - settings_enable_window(hdlg, IDC_CHECK_MPU401, mpu401_standalone_allow()); - settings_enable_window(hdlg, IDC_CONFIGURE_MPU401, mpu401_standalone_allow() && temp_mpu401); - break; + case WM_COMMAND: + switch (LOWORD(wParam)) { + case IDC_COMBO_SOUND: + temp_sound_card = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_SOUND)]; + settings_enable_window(hdlg, IDC_CONFIGURE_SND, sound_card_has_config(temp_sound_card)); + settings_set_check(hdlg, IDC_CHECK_MPU401, temp_mpu401); + settings_enable_window(hdlg, IDC_CHECK_MPU401, mpu401_standalone_allow()); + settings_enable_window(hdlg, IDC_CONFIGURE_MPU401, mpu401_standalone_allow() && temp_mpu401); + break; - case IDC_CONFIGURE_SND: - temp_sound_card = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_SOUND)]; - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)sound_card_getdevice(temp_sound_card)); - break; + case IDC_CONFIGURE_SND: + temp_sound_card = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_SOUND)]; + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) sound_card_getdevice(temp_sound_card)); + break; - case IDC_COMBO_MIDI_OUT: - temp_midi_output_device = settings_list_to_midi[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_OUT)]; - settings_enable_window(hdlg, IDC_CONFIGURE_MIDI_OUT, midi_out_device_has_config(temp_midi_output_device)); - settings_set_check(hdlg, IDC_CHECK_MPU401, temp_mpu401); - settings_enable_window(hdlg, IDC_CHECK_MPU401, mpu401_standalone_allow()); - settings_enable_window(hdlg, IDC_CONFIGURE_MPU401, mpu401_standalone_allow() && temp_mpu401); - break; + case IDC_COMBO_MIDI_OUT: + temp_midi_output_device = settings_list_to_midi[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_OUT)]; + settings_enable_window(hdlg, IDC_CONFIGURE_MIDI_OUT, midi_out_device_has_config(temp_midi_output_device)); + settings_set_check(hdlg, IDC_CHECK_MPU401, temp_mpu401); + settings_enable_window(hdlg, IDC_CHECK_MPU401, mpu401_standalone_allow()); + settings_enable_window(hdlg, IDC_CONFIGURE_MPU401, mpu401_standalone_allow() && temp_mpu401); + break; - case IDC_CONFIGURE_MIDI_OUT: - temp_midi_output_device = settings_list_to_midi[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_OUT)]; - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)midi_out_device_getdevice(temp_midi_output_device)); - break; + case IDC_CONFIGURE_MIDI_OUT: + temp_midi_output_device = settings_list_to_midi[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_OUT)]; + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) midi_out_device_getdevice(temp_midi_output_device)); + break; - case IDC_COMBO_MIDI_IN: - temp_midi_input_device = settings_list_to_midi_in[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_IN)]; - settings_enable_window(hdlg, IDC_CONFIGURE_MIDI_IN, midi_in_device_has_config(temp_midi_input_device)); - settings_set_check(hdlg, IDC_CHECK_MPU401, temp_mpu401); - settings_enable_window(hdlg, IDC_CHECK_MPU401, mpu401_standalone_allow()); - settings_enable_window(hdlg, IDC_CONFIGURE_MPU401, mpu401_standalone_allow() && temp_mpu401); - break; + case IDC_COMBO_MIDI_IN: + temp_midi_input_device = settings_list_to_midi_in[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_IN)]; + settings_enable_window(hdlg, IDC_CONFIGURE_MIDI_IN, midi_in_device_has_config(temp_midi_input_device)); + settings_set_check(hdlg, IDC_CHECK_MPU401, temp_mpu401); + settings_enable_window(hdlg, IDC_CHECK_MPU401, mpu401_standalone_allow()); + settings_enable_window(hdlg, IDC_CONFIGURE_MPU401, mpu401_standalone_allow() && temp_mpu401); + break; - case IDC_CONFIGURE_MIDI_IN: - temp_midi_input_device = settings_list_to_midi_in[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_IN)]; - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)midi_in_device_getdevice(temp_midi_input_device)); - break; + case IDC_CONFIGURE_MIDI_IN: + temp_midi_input_device = settings_list_to_midi_in[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_IN)]; + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) midi_in_device_getdevice(temp_midi_input_device)); + break; - case IDC_CHECK_MPU401: - temp_mpu401 = settings_get_check(hdlg, IDC_CHECK_MPU401); + case IDC_CHECK_MPU401: + temp_mpu401 = settings_get_check(hdlg, IDC_CHECK_MPU401); - settings_enable_window(hdlg, IDC_CONFIGURE_MPU401, mpu401_present()); - break; + settings_enable_window(hdlg, IDC_CONFIGURE_MPU401, mpu401_present()); + break; - case IDC_CONFIGURE_MPU401: - temp_deviceconfig |= deviceconfig_open(hdlg, machine_has_bus(temp_machine, MACHINE_BUS_MCA) ? - (void *)&mpu401_mca_device : (void *)&mpu401_device); - break; + case IDC_CONFIGURE_MPU401: + temp_deviceconfig |= deviceconfig_open(hdlg, machine_has_bus(temp_machine, MACHINE_BUS_MCA) ? (void *) &mpu401_mca_device : (void *) &mpu401_device); + break; - case IDC_CHECK_CMS: - temp_GAMEBLASTER = settings_get_check(hdlg, IDC_CHECK_CMS); + case IDC_CHECK_CMS: + temp_GAMEBLASTER = settings_get_check(hdlg, IDC_CHECK_CMS); - settings_enable_window(hdlg, IDC_CONFIGURE_CMS, temp_GAMEBLASTER); - break; + settings_enable_window(hdlg, IDC_CONFIGURE_CMS, temp_GAMEBLASTER); + break; - case IDC_CONFIGURE_CMS: - temp_deviceconfig |= deviceconfig_open(hdlg, &cms_device); - break; + case IDC_CONFIGURE_CMS: + temp_deviceconfig |= deviceconfig_open(hdlg, &cms_device); + break; - case IDC_CHECK_GUS: - temp_GUS = settings_get_check(hdlg, IDC_CHECK_GUS); - settings_enable_window(hdlg, IDC_CONFIGURE_GUS, temp_GUS); - break; + case IDC_CHECK_GUS: + temp_GUS = settings_get_check(hdlg, IDC_CHECK_GUS); + settings_enable_window(hdlg, IDC_CONFIGURE_GUS, temp_GUS); + break; - case IDC_CONFIGURE_GUS: - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)&gus_device); - break; + case IDC_CONFIGURE_GUS: + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) &gus_device); + break; - case IDC_CHECK_SSI: - temp_SSI2001 = settings_get_check(hdlg, IDC_CHECK_SSI); + case IDC_CHECK_SSI: + temp_SSI2001 = settings_get_check(hdlg, IDC_CHECK_SSI); - settings_enable_window(hdlg, IDC_CONFIGURE_SSI, temp_SSI2001); - break; + settings_enable_window(hdlg, IDC_CONFIGURE_SSI, temp_SSI2001); + break; - case IDC_CONFIGURE_SSI: - temp_deviceconfig |= deviceconfig_open(hdlg, &ssi2001_device); - break; - } - return FALSE; + case IDC_CONFIGURE_SSI: + temp_deviceconfig |= deviceconfig_open(hdlg, &ssi2001_device); + break; + } + return FALSE; - case WM_SAVESETTINGS: - temp_sound_card = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_SOUND)]; - temp_midi_output_device = settings_list_to_midi[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_OUT)]; - temp_midi_input_device = settings_list_to_midi_in[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_IN)]; - temp_mpu401 = settings_get_check(hdlg, IDC_CHECK_MPU401); - temp_GAMEBLASTER = settings_get_check(hdlg, IDC_CHECK_CMS); - temp_GUS = settings_get_check(hdlg, IDC_CHECK_GUS); - temp_SSI2001 = settings_get_check(hdlg, IDC_CHECK_SSI); - temp_float = settings_get_check(hdlg, IDC_CHECK_FLOAT); - if (settings_get_check(hdlg, IDC_RADIO_FM_DRV_NUKED)) - temp_fm_driver = FM_DRV_NUKED; - if (settings_get_check(hdlg, IDC_RADIO_FM_DRV_YMFM)) - temp_fm_driver = FM_DRV_YMFM; - default: - return FALSE; + case WM_SAVESETTINGS: + temp_sound_card = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_SOUND)]; + temp_midi_output_device = settings_list_to_midi[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_OUT)]; + temp_midi_input_device = settings_list_to_midi_in[settings_get_cur_sel(hdlg, IDC_COMBO_MIDI_IN)]; + temp_mpu401 = settings_get_check(hdlg, IDC_CHECK_MPU401); + temp_GAMEBLASTER = settings_get_check(hdlg, IDC_CHECK_CMS); + temp_GUS = settings_get_check(hdlg, IDC_CHECK_GUS); + temp_SSI2001 = settings_get_check(hdlg, IDC_CHECK_SSI); + temp_float = settings_get_check(hdlg, IDC_CHECK_FLOAT); + if (settings_get_check(hdlg, IDC_RADIO_FM_DRV_NUKED)) + temp_fm_driver = FM_DRV_NUKED; + if (settings_get_check(hdlg, IDC_RADIO_FM_DRV_YMFM)) + temp_fm_driver = FM_DRV_YMFM; + default: + return FALSE; } return FALSE; } - #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK #else @@ -1544,73 +1512,72 @@ static BOOL CALLBACK #endif win_settings_ports_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { - int c, i; - char *s; + int c, i; + char *s; LPTSTR lptsTemp; switch (message) { - case WM_INITDIALOG: - lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); + case WM_INITDIALOG: + lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); - for (i = 0; i < PARALLEL_MAX; i++) { - c = 0; - while (1) { - s = lpt_device_get_name(c); + for (i = 0; i < PARALLEL_MAX; i++) { + c = 0; + while (1) { + s = lpt_device_get_name(c); - if (!s) - break; + if (!s) + break; - if (c == 0) - settings_add_string(hdlg, IDC_COMBO_LPT1 + i, win_get_string(IDS_2103)); - else { - mbstowcs(lptsTemp, s, strlen(s) + 1); - settings_add_string(hdlg, IDC_COMBO_LPT1 + i, (LPARAM) lptsTemp); - } + if (c == 0) + settings_add_string(hdlg, IDC_COMBO_LPT1 + i, win_get_string(IDS_2103)); + else { + mbstowcs(lptsTemp, s, strlen(s) + 1); + settings_add_string(hdlg, IDC_COMBO_LPT1 + i, (LPARAM) lptsTemp); + } - c++; - } - settings_set_cur_sel(hdlg, IDC_COMBO_LPT1 + i, temp_lpt_devices[i]); + c++; + } + settings_set_cur_sel(hdlg, IDC_COMBO_LPT1 + i, temp_lpt_devices[i]); - settings_set_check(hdlg, IDC_CHECK_PARALLEL1 + i, temp_lpt[i]); - settings_enable_window(hdlg, IDC_COMBO_LPT1 + i, temp_lpt[i]); - } + settings_set_check(hdlg, IDC_CHECK_PARALLEL1 + i, temp_lpt[i]); + settings_enable_window(hdlg, IDC_COMBO_LPT1 + i, temp_lpt[i]); + } - for (i = 0; i < SERIAL_MAX; i++) - settings_set_check(hdlg, IDC_CHECK_SERIAL1 + i, temp_serial[i]); + for (i = 0; i < SERIAL_MAX; i++) + settings_set_check(hdlg, IDC_CHECK_SERIAL1 + i, temp_serial[i]); - free(lptsTemp); + free(lptsTemp); - return TRUE; + return TRUE; - case WM_COMMAND: - switch (LOWORD(wParam)) { - case IDC_CHECK_PARALLEL1: - case IDC_CHECK_PARALLEL2: - case IDC_CHECK_PARALLEL3: - case IDC_CHECK_PARALLEL4: - i = LOWORD(wParam) - IDC_CHECK_PARALLEL1; - settings_enable_window(hdlg, IDC_COMBO_LPT1 + i, - settings_get_check(hdlg, IDC_CHECK_PARALLEL1 + i) == BST_CHECKED); - break; - } - break; + case WM_COMMAND: + switch (LOWORD(wParam)) { + case IDC_CHECK_PARALLEL1: + case IDC_CHECK_PARALLEL2: + case IDC_CHECK_PARALLEL3: + case IDC_CHECK_PARALLEL4: + i = LOWORD(wParam) - IDC_CHECK_PARALLEL1; + settings_enable_window(hdlg, IDC_COMBO_LPT1 + i, + settings_get_check(hdlg, IDC_CHECK_PARALLEL1 + i) == BST_CHECKED); + break; + } + break; - case WM_SAVESETTINGS: - for (i = 0; i < PARALLEL_MAX; i++) { - temp_lpt_devices[i] = settings_get_cur_sel(hdlg, IDC_COMBO_LPT1 + i); - temp_lpt[i] = settings_get_check(hdlg, IDC_CHECK_PARALLEL1 + i); - } + case WM_SAVESETTINGS: + for (i = 0; i < PARALLEL_MAX; i++) { + temp_lpt_devices[i] = settings_get_cur_sel(hdlg, IDC_COMBO_LPT1 + i); + temp_lpt[i] = settings_get_check(hdlg, IDC_CHECK_PARALLEL1 + i); + } - for (i = 0; i < SERIAL_MAX; i++) - temp_serial[i] = settings_get_check(hdlg, IDC_CHECK_SERIAL1 + i); + for (i = 0; i < SERIAL_MAX; i++) + temp_serial[i] = settings_get_check(hdlg, IDC_CHECK_SERIAL1 + i); - default: - return FALSE; + default: + return FALSE; } return FALSE; } - #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK #else @@ -1618,222 +1585,218 @@ static BOOL CALLBACK #endif win_settings_storage_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { - int c, d; - int e, is_at; - LPTSTR lptsTemp; - char *stransi; + int c, d; + int e, is_at; + LPTSTR lptsTemp; + char *stransi; const device_t *scsi_dev, *fdc_dev; const device_t *hdc_dev; switch (message) { - case WM_INITDIALOG: - lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); - stransi = (char *) malloc(512); + case WM_INITDIALOG: + lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); + stransi = (char *) malloc(512); - /*HD controller config*/ - c = d = 0; - settings_reset_content(hdlg, IDC_COMBO_HDC); - while (1) { - /* Skip "internal" if machine doesn't have it. */ - if ((c == 1) && !machine_has_flags(temp_machine, MACHINE_HDC)) { - c++; - continue; - } + /*HD controller config*/ + c = d = 0; + settings_reset_content(hdlg, IDC_COMBO_HDC); + while (1) { + /* Skip "internal" if machine doesn't have it. */ + if ((c == 1) && !machine_has_flags(temp_machine, MACHINE_HDC)) { + c++; + continue; + } - generate_device_name(hdc_get_device(c), hdc_get_internal_name(c), 1); + generate_device_name(hdc_get_device(c), hdc_get_internal_name(c), 1); - if (!device_name[0]) - break; + if (!device_name[0]) + break; - if (hdc_available(c)) { - hdc_dev = hdc_get_device(c); + if (hdc_available(c)) { + hdc_dev = hdc_get_device(c); - if (device_is_valid(hdc_dev, temp_machine)) { - if (c == 0) - settings_add_string(hdlg, IDC_COMBO_HDC, win_get_string(IDS_2103)); - else if (c == 1) - settings_add_string(hdlg, IDC_COMBO_HDC, win_get_string(IDS_2118)); - else - settings_add_string(hdlg, IDC_COMBO_HDC, (LPARAM) device_name); - settings_list_to_hdc[d] = c; - if ((c == 0) || (c == temp_hdc)) - settings_set_cur_sel(hdlg, IDC_COMBO_HDC, d); - d++; - } - } + if (device_is_valid(hdc_dev, temp_machine)) { + if (c == 0) + settings_add_string(hdlg, IDC_COMBO_HDC, win_get_string(IDS_2103)); + else if (c == 1) + settings_add_string(hdlg, IDC_COMBO_HDC, win_get_string(IDS_2118)); + else + settings_add_string(hdlg, IDC_COMBO_HDC, (LPARAM) device_name); + settings_list_to_hdc[d] = c; + if ((c == 0) || (c == temp_hdc)) + settings_set_cur_sel(hdlg, IDC_COMBO_HDC, d); + d++; + } + } - c++; - } + c++; + } - settings_enable_window(hdlg, IDC_COMBO_HDC, d); - settings_enable_window(hdlg, IDC_CONFIGURE_HDC, hdc_has_config(temp_hdc)); + settings_enable_window(hdlg, IDC_COMBO_HDC, d); + settings_enable_window(hdlg, IDC_CONFIGURE_HDC, hdc_has_config(temp_hdc)); - /*FD controller config*/ - c = d = 0; - settings_reset_content(hdlg, IDC_COMBO_FDC); - while (1) { - generate_device_name(fdc_card_getdevice(c), fdc_card_get_internal_name(c), 1); + /*FD controller config*/ + c = d = 0; + settings_reset_content(hdlg, IDC_COMBO_FDC); + while (1) { + generate_device_name(fdc_card_getdevice(c), fdc_card_get_internal_name(c), 1); - if (!device_name[0]) - break; + if (!device_name[0]) + break; - if (fdc_card_available(c)) { - fdc_dev = fdc_card_getdevice(c); + if (fdc_card_available(c)) { + fdc_dev = fdc_card_getdevice(c); - if (device_is_valid(fdc_dev, temp_machine)) { - if (c == 0) - settings_add_string(hdlg, IDC_COMBO_FDC, win_get_string(IDS_2118)); - else - settings_add_string(hdlg, IDC_COMBO_FDC, (LPARAM) device_name); - settings_list_to_fdc[d] = c; - if ((c == 0) || (c == temp_fdc_card)) - settings_set_cur_sel(hdlg, IDC_COMBO_FDC, d); - d++; - } - } + if (device_is_valid(fdc_dev, temp_machine)) { + if (c == 0) + settings_add_string(hdlg, IDC_COMBO_FDC, win_get_string(IDS_2118)); + else + settings_add_string(hdlg, IDC_COMBO_FDC, (LPARAM) device_name); + settings_list_to_fdc[d] = c; + if ((c == 0) || (c == temp_fdc_card)) + settings_set_cur_sel(hdlg, IDC_COMBO_FDC, d); + d++; + } + } - c++; - } + c++; + } - settings_enable_window(hdlg, IDC_COMBO_FDC, d); - settings_enable_window(hdlg, IDC_CONFIGURE_FDC, fdc_card_has_config(temp_fdc_card)); + settings_enable_window(hdlg, IDC_COMBO_FDC, d); + settings_enable_window(hdlg, IDC_CONFIGURE_FDC, fdc_card_has_config(temp_fdc_card)); - /*SCSI config*/ - c = d = 0; - for (e = 0; e < SCSI_BUS_MAX; e++) - settings_reset_content(hdlg, IDC_COMBO_SCSI_1 + e); - while (1) { - generate_device_name(scsi_card_getdevice(c), scsi_card_get_internal_name(c), 1); + /*SCSI config*/ + c = d = 0; + for (e = 0; e < SCSI_BUS_MAX; e++) + settings_reset_content(hdlg, IDC_COMBO_SCSI_1 + e); + while (1) { + generate_device_name(scsi_card_getdevice(c), scsi_card_get_internal_name(c), 1); - if (!device_name[0]) - break; + if (!device_name[0]) + break; - if (scsi_card_available(c)) { - scsi_dev = scsi_card_getdevice(c); + if (scsi_card_available(c)) { + scsi_dev = scsi_card_getdevice(c); - if (device_is_valid(scsi_dev, temp_machine)) { - for (e = 0; e < SCSI_BUS_MAX; e++) { - if (c == 0) - settings_add_string(hdlg, IDC_COMBO_SCSI_1 + e, win_get_string(IDS_2103)); - else - settings_add_string(hdlg, IDC_COMBO_SCSI_1 + e, (LPARAM) device_name); + if (device_is_valid(scsi_dev, temp_machine)) { + for (e = 0; e < SCSI_BUS_MAX; e++) { + if (c == 0) + settings_add_string(hdlg, IDC_COMBO_SCSI_1 + e, win_get_string(IDS_2103)); + else + settings_add_string(hdlg, IDC_COMBO_SCSI_1 + e, (LPARAM) device_name); - if ((c == 0) || (c == temp_scsi_card[e])) - settings_set_cur_sel(hdlg, IDC_COMBO_SCSI_1 + e, d); - } + if ((c == 0) || (c == temp_scsi_card[e])) + settings_set_cur_sel(hdlg, IDC_COMBO_SCSI_1 + e, d); + } - settings_list_to_device[0][d] = c; - d++; - } - } + settings_list_to_device[0][d] = c; + d++; + } + } - c++; - } + c++; + } - for (c = 0; c < SCSI_BUS_MAX; c++) { - settings_enable_window(hdlg, IDC_COMBO_SCSI_1 + c, d); - settings_enable_window(hdlg, IDC_CONFIGURE_SCSI_1 + c, scsi_card_has_config(temp_scsi_card[c])); - } - is_at = IS_AT(temp_machine); - settings_enable_window(hdlg, IDC_CHECK_IDE_TER, is_at); - settings_enable_window(hdlg, IDC_BUTTON_IDE_TER, is_at && temp_ide_ter); - settings_enable_window(hdlg, IDC_CHECK_IDE_QUA, is_at); - settings_enable_window(hdlg, IDC_BUTTON_IDE_QUA, is_at && temp_ide_qua); - settings_set_check(hdlg, IDC_CHECK_IDE_TER, temp_ide_ter); - settings_set_check(hdlg, IDC_CHECK_IDE_QUA, temp_ide_qua); - settings_set_check(hdlg, IDC_CHECK_CASSETTE, temp_cassette); + for (c = 0; c < SCSI_BUS_MAX; c++) { + settings_enable_window(hdlg, IDC_COMBO_SCSI_1 + c, d); + settings_enable_window(hdlg, IDC_CONFIGURE_SCSI_1 + c, scsi_card_has_config(temp_scsi_card[c])); + } + is_at = IS_AT(temp_machine); + settings_enable_window(hdlg, IDC_CHECK_IDE_TER, is_at); + settings_enable_window(hdlg, IDC_BUTTON_IDE_TER, is_at && temp_ide_ter); + settings_enable_window(hdlg, IDC_CHECK_IDE_QUA, is_at); + settings_enable_window(hdlg, IDC_BUTTON_IDE_QUA, is_at && temp_ide_qua); + settings_set_check(hdlg, IDC_CHECK_IDE_TER, temp_ide_ter); + settings_set_check(hdlg, IDC_CHECK_IDE_QUA, temp_ide_qua); + settings_set_check(hdlg, IDC_CHECK_CASSETTE, temp_cassette); - free(stransi); - free(lptsTemp); + free(stransi); + free(lptsTemp); - return TRUE; + return TRUE; - case WM_COMMAND: - switch (LOWORD(wParam)) { - case IDC_CONFIGURE_FDC: - temp_fdc_card = settings_list_to_fdc[settings_get_cur_sel(hdlg, IDC_COMBO_FDC)]; - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)fdc_card_getdevice(temp_fdc_card)); - break; + case WM_COMMAND: + switch (LOWORD(wParam)) { + case IDC_CONFIGURE_FDC: + temp_fdc_card = settings_list_to_fdc[settings_get_cur_sel(hdlg, IDC_COMBO_FDC)]; + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) fdc_card_getdevice(temp_fdc_card)); + break; - case IDC_COMBO_FDC: - temp_fdc_card = settings_list_to_fdc[settings_get_cur_sel(hdlg, IDC_COMBO_FDC)]; - settings_enable_window(hdlg, IDC_CONFIGURE_FDC, fdc_card_has_config(temp_fdc_card)); - break; + case IDC_COMBO_FDC: + temp_fdc_card = settings_list_to_fdc[settings_get_cur_sel(hdlg, IDC_COMBO_FDC)]; + settings_enable_window(hdlg, IDC_CONFIGURE_FDC, fdc_card_has_config(temp_fdc_card)); + break; - case IDC_CONFIGURE_HDC: - temp_hdc = settings_list_to_hdc[settings_get_cur_sel(hdlg, IDC_COMBO_HDC)]; - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)hdc_get_device(temp_hdc)); - break; + case IDC_CONFIGURE_HDC: + temp_hdc = settings_list_to_hdc[settings_get_cur_sel(hdlg, IDC_COMBO_HDC)]; + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) hdc_get_device(temp_hdc)); + break; - case IDC_COMBO_HDC: - temp_hdc = settings_list_to_hdc[settings_get_cur_sel(hdlg, IDC_COMBO_HDC)]; - settings_enable_window(hdlg, IDC_CONFIGURE_HDC, hdc_has_config(temp_hdc)); - break; + case IDC_COMBO_HDC: + temp_hdc = settings_list_to_hdc[settings_get_cur_sel(hdlg, IDC_COMBO_HDC)]; + settings_enable_window(hdlg, IDC_CONFIGURE_HDC, hdc_has_config(temp_hdc)); + break; - case IDC_CONFIGURE_SCSI_1 ... IDC_CONFIGURE_SCSI_4: - c = LOWORD(wParam) - IDC_CONFIGURE_SCSI_1; - temp_scsi_card[c] = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_SCSI_1 + c)]; - temp_deviceconfig |= deviceconfig_inst_open(hdlg, (void *)scsi_card_getdevice(temp_scsi_card[c]), c + 1); - break; + case IDC_CONFIGURE_SCSI_1 ... IDC_CONFIGURE_SCSI_4: + c = LOWORD(wParam) - IDC_CONFIGURE_SCSI_1; + temp_scsi_card[c] = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_SCSI_1 + c)]; + temp_deviceconfig |= deviceconfig_inst_open(hdlg, (void *) scsi_card_getdevice(temp_scsi_card[c]), c + 1); + break; - case IDC_COMBO_SCSI_1 ... IDC_COMBO_SCSI_4: - c = LOWORD(wParam) - IDC_COMBO_SCSI_1; - temp_scsi_card[c] = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_SCSI_1 + c)]; - settings_enable_window(hdlg, IDC_CONFIGURE_SCSI_1 + c, scsi_card_has_config(temp_scsi_card[c])); - break; + case IDC_COMBO_SCSI_1 ... IDC_COMBO_SCSI_4: + c = LOWORD(wParam) - IDC_COMBO_SCSI_1; + temp_scsi_card[c] = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_SCSI_1 + c)]; + settings_enable_window(hdlg, IDC_CONFIGURE_SCSI_1 + c, scsi_card_has_config(temp_scsi_card[c])); + break; - case IDC_CHECK_IDE_TER: - temp_ide_ter = settings_get_check(hdlg, IDC_CHECK_IDE_TER); - settings_enable_window(hdlg, IDC_BUTTON_IDE_TER, temp_ide_ter); - break; + case IDC_CHECK_IDE_TER: + temp_ide_ter = settings_get_check(hdlg, IDC_CHECK_IDE_TER); + settings_enable_window(hdlg, IDC_BUTTON_IDE_TER, temp_ide_ter); + break; - case IDC_BUTTON_IDE_TER: - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)&ide_ter_device); - break; + case IDC_BUTTON_IDE_TER: + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) &ide_ter_device); + break; - case IDC_CHECK_IDE_QUA: - temp_ide_qua = settings_get_check(hdlg, IDC_CHECK_IDE_QUA); - settings_enable_window(hdlg, IDC_BUTTON_IDE_QUA, temp_ide_qua); - break; + case IDC_CHECK_IDE_QUA: + temp_ide_qua = settings_get_check(hdlg, IDC_CHECK_IDE_QUA); + settings_enable_window(hdlg, IDC_BUTTON_IDE_QUA, temp_ide_qua); + break; - case IDC_BUTTON_IDE_QUA: - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)&ide_qua_device); - break; - } - return FALSE; + case IDC_BUTTON_IDE_QUA: + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) &ide_qua_device); + break; + } + return FALSE; - case WM_SAVESETTINGS: - temp_hdc = settings_list_to_hdc[settings_get_cur_sel(hdlg, IDC_COMBO_HDC)]; - temp_fdc_card = settings_list_to_fdc[settings_get_cur_sel(hdlg, IDC_COMBO_FDC)]; - for (c = 0; c < SCSI_BUS_MAX; c++) - temp_scsi_card[c] = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_SCSI_1 + c)]; - temp_ide_ter = settings_get_check(hdlg, IDC_CHECK_IDE_TER); - temp_ide_qua = settings_get_check(hdlg, IDC_CHECK_IDE_QUA); - temp_cassette = settings_get_check(hdlg, IDC_CHECK_CASSETTE); + case WM_SAVESETTINGS: + temp_hdc = settings_list_to_hdc[settings_get_cur_sel(hdlg, IDC_COMBO_HDC)]; + temp_fdc_card = settings_list_to_fdc[settings_get_cur_sel(hdlg, IDC_COMBO_FDC)]; + for (c = 0; c < SCSI_BUS_MAX; c++) + temp_scsi_card[c] = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_SCSI_1 + c)]; + temp_ide_ter = settings_get_check(hdlg, IDC_CHECK_IDE_TER); + temp_ide_qua = settings_get_check(hdlg, IDC_CHECK_IDE_QUA); + temp_cassette = settings_get_check(hdlg, IDC_CHECK_CASSETTE); - default: - return FALSE; + default: + return FALSE; } return FALSE; } - -static void network_recalc_combos(HWND hdlg) +static void +network_recalc_combos(HWND hdlg) { ignore_change = 1; settings_enable_window(hdlg, IDC_COMBO_PCAP, temp_net_type == NET_TYPE_PCAP); settings_enable_window(hdlg, IDC_COMBO_NET, - (temp_net_type == NET_TYPE_SLIRP) || - ((temp_net_type == NET_TYPE_PCAP) && (network_dev_to_id(temp_pcap_dev) > 0))); - settings_enable_window(hdlg, IDC_CONFIGURE_NET, network_card_has_config(temp_net_card) && - ((temp_net_type == NET_TYPE_SLIRP) || - ((temp_net_type == NET_TYPE_PCAP) && (network_dev_to_id(temp_pcap_dev) > 0)))); + (temp_net_type == NET_TYPE_SLIRP) || ((temp_net_type == NET_TYPE_PCAP) && (network_dev_to_id(temp_pcap_dev) > 0))); + settings_enable_window(hdlg, IDC_CONFIGURE_NET, network_card_has_config(temp_net_card) && ((temp_net_type == NET_TYPE_SLIRP) || ((temp_net_type == NET_TYPE_PCAP) && (network_dev_to_id(temp_pcap_dev) > 0)))); ignore_change = 0; } - #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK #else @@ -1841,311 +1804,302 @@ static BOOL CALLBACK #endif win_settings_network_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { - int c, d; + int c, d; LPTSTR lptsTemp; switch (message) { - case WM_INITDIALOG: - lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); + case WM_INITDIALOG: + lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); - settings_add_string(hdlg, IDC_COMBO_NET_TYPE, (LPARAM) L"None"); - settings_add_string(hdlg, IDC_COMBO_NET_TYPE, (LPARAM) L"PCap"); - settings_add_string(hdlg, IDC_COMBO_NET_TYPE, (LPARAM) L"SLiRP"); - settings_set_cur_sel(hdlg, IDC_COMBO_NET_TYPE, temp_net_type); - settings_enable_window(hdlg, IDC_COMBO_PCAP, temp_net_type == NET_TYPE_PCAP); + settings_add_string(hdlg, IDC_COMBO_NET_TYPE, (LPARAM) L"None"); + settings_add_string(hdlg, IDC_COMBO_NET_TYPE, (LPARAM) L"PCap"); + settings_add_string(hdlg, IDC_COMBO_NET_TYPE, (LPARAM) L"SLiRP"); + settings_set_cur_sel(hdlg, IDC_COMBO_NET_TYPE, temp_net_type); + settings_enable_window(hdlg, IDC_COMBO_PCAP, temp_net_type == NET_TYPE_PCAP); - for (c = 0; c < network_ndev; c++) { - mbstowcs(lptsTemp, network_devs[c].description, strlen(network_devs[c].description) + 1); - settings_add_string(hdlg, IDC_COMBO_PCAP, (LPARAM) lptsTemp); - } - settings_set_cur_sel(hdlg, IDC_COMBO_PCAP, network_dev_to_id(temp_pcap_dev)); + for (c = 0; c < network_ndev; c++) { + mbstowcs(lptsTemp, network_devs[c].description, strlen(network_devs[c].description) + 1); + settings_add_string(hdlg, IDC_COMBO_PCAP, (LPARAM) lptsTemp); + } + settings_set_cur_sel(hdlg, IDC_COMBO_PCAP, network_dev_to_id(temp_pcap_dev)); - /* NIC config */ - c = d = 0; - settings_reset_content(hdlg, IDC_COMBO_NET); - while (1) { - generate_device_name(network_card_getdevice(c), network_card_get_internal_name(c), 1); + /* NIC config */ + c = d = 0; + settings_reset_content(hdlg, IDC_COMBO_NET); + while (1) { + generate_device_name(network_card_getdevice(c), network_card_get_internal_name(c), 1); - if (device_name[0] == L'\0') - break; + if (device_name[0] == L'\0') + break; - if (network_card_available(c) && device_is_valid(network_card_getdevice(c), temp_machine)) { - if (c == 0) - settings_add_string(hdlg, IDC_COMBO_NET, win_get_string(IDS_2103)); - else - settings_add_string(hdlg, IDC_COMBO_NET, (LPARAM) device_name); - settings_list_to_device[0][d] = c; - if ((c == 0) || (c == temp_net_card)) - settings_set_cur_sel(hdlg, IDC_COMBO_NET, d); - d++; - } + if (network_card_available(c) && device_is_valid(network_card_getdevice(c), temp_machine)) { + if (c == 0) + settings_add_string(hdlg, IDC_COMBO_NET, win_get_string(IDS_2103)); + else + settings_add_string(hdlg, IDC_COMBO_NET, (LPARAM) device_name); + settings_list_to_device[0][d] = c; + if ((c == 0) || (c == temp_net_card)) + settings_set_cur_sel(hdlg, IDC_COMBO_NET, d); + d++; + } - c++; - } + c++; + } - settings_enable_window(hdlg, IDC_COMBO_NET, d); - network_recalc_combos(hdlg); - free(lptsTemp); + settings_enable_window(hdlg, IDC_COMBO_NET, d); + network_recalc_combos(hdlg); + free(lptsTemp); - return TRUE; + return TRUE; - case WM_COMMAND: - switch (LOWORD(wParam)) { - case IDC_COMBO_NET_TYPE: - if (ignore_change) - return FALSE; + case WM_COMMAND: + switch (LOWORD(wParam)) { + case IDC_COMBO_NET_TYPE: + if (ignore_change) + return FALSE; - temp_net_type = settings_get_cur_sel(hdlg, IDC_COMBO_NET_TYPE); - network_recalc_combos(hdlg); - break; + temp_net_type = settings_get_cur_sel(hdlg, IDC_COMBO_NET_TYPE); + network_recalc_combos(hdlg); + break; - case IDC_COMBO_PCAP: - if (ignore_change) - return FALSE; + case IDC_COMBO_PCAP: + if (ignore_change) + return FALSE; - memset(temp_pcap_dev, '\0', sizeof(temp_pcap_dev)); - strcpy(temp_pcap_dev, network_devs[settings_get_cur_sel(hdlg, IDC_COMBO_PCAP)].device); - network_recalc_combos(hdlg); - break; + memset(temp_pcap_dev, '\0', sizeof(temp_pcap_dev)); + strcpy(temp_pcap_dev, network_devs[settings_get_cur_sel(hdlg, IDC_COMBO_PCAP)].device); + network_recalc_combos(hdlg); + break; - case IDC_COMBO_NET: - if (ignore_change) - return FALSE; + case IDC_COMBO_NET: + if (ignore_change) + return FALSE; - temp_net_card = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_NET)]; - network_recalc_combos(hdlg); - break; + temp_net_card = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_NET)]; + network_recalc_combos(hdlg); + break; - case IDC_CONFIGURE_NET: - if (ignore_change) - return FALSE; + case IDC_CONFIGURE_NET: + if (ignore_change) + return FALSE; - temp_net_card = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_NET)]; - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)network_card_getdevice(temp_net_card)); - break; - } - return FALSE; + temp_net_card = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_NET)]; + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) network_card_getdevice(temp_net_card)); + break; + } + return FALSE; - case WM_SAVESETTINGS: - temp_net_type = settings_get_cur_sel(hdlg, IDC_COMBO_NET_TYPE); - memset(temp_pcap_dev, '\0', sizeof(temp_pcap_dev)); - strcpy(temp_pcap_dev, network_devs[settings_get_cur_sel(hdlg, IDC_COMBO_PCAP)].device); - temp_net_card = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_NET)]; + case WM_SAVESETTINGS: + temp_net_type = settings_get_cur_sel(hdlg, IDC_COMBO_NET_TYPE); + memset(temp_pcap_dev, '\0', sizeof(temp_pcap_dev)); + strcpy(temp_pcap_dev, network_devs[settings_get_cur_sel(hdlg, IDC_COMBO_PCAP)].device); + temp_net_card = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_NET)]; - default: - return FALSE; + default: + return FALSE; } return FALSE; } - static void normalize_hd_list() { hard_disk_t ihdd[HDD_NUM]; - int i, j; + int i, j; j = 0; memset(ihdd, 0x00, HDD_NUM * sizeof(hard_disk_t)); for (i = 0; i < HDD_NUM; i++) { - if (temp_hdd[i].bus != HDD_BUS_DISABLED) { - memcpy(&(ihdd[j]), &(temp_hdd[i]), sizeof(hard_disk_t)); - j++; - } + if (temp_hdd[i].bus != HDD_BUS_DISABLED) { + memcpy(&(ihdd[j]), &(temp_hdd[i]), sizeof(hard_disk_t)); + j++; + } } memcpy(temp_hdd, ihdd, HDD_NUM * sizeof(hard_disk_t)); } - static int get_selected_hard_disk(HWND hdlg) { - int hard_disk = -1; - int i, j = 0; + int hard_disk = -1; + int i, j = 0; HWND h; if (hd_listview_items == 0) - return 0; + return 0; for (i = 0; i < hd_listview_items; i++) { - h = GetDlgItem(hdlg, IDC_LIST_HARD_DISKS); - j = ListView_GetItemState(h, i, LVIS_SELECTED); - if (j) - hard_disk = i; + h = GetDlgItem(hdlg, IDC_LIST_HARD_DISKS); + j = ListView_GetItemState(h, i, LVIS_SELECTED); + if (j) + hard_disk = i; } return hard_disk; } - static void add_locations(HWND hdlg) { LPTSTR lptsTemp; - int i = 0; + int i = 0; lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); for (i = 0; i < 6; i++) - settings_add_string(hdlg, IDC_COMBO_HD_BUS, win_get_string(IDS_4352 + i)); + settings_add_string(hdlg, IDC_COMBO_HD_BUS, win_get_string(IDS_4352 + i)); for (i = 0; i < 2; i++) { - wsprintf(lptsTemp, plat_get_string(IDS_4097), i >> 1, i & 1); - settings_add_string(hdlg, IDC_COMBO_HD_CHANNEL, (LPARAM) lptsTemp); + wsprintf(lptsTemp, plat_get_string(IDS_4097), i >> 1, i & 1); + settings_add_string(hdlg, IDC_COMBO_HD_CHANNEL, (LPARAM) lptsTemp); } for (i = 0; i < 64; i++) { - wsprintf(lptsTemp, plat_get_string(IDS_4135), i >> 4, i & 15); - settings_add_string(hdlg, IDC_COMBO_HD_ID, (LPARAM) lptsTemp); + wsprintf(lptsTemp, plat_get_string(IDS_4135), i >> 4, i & 15); + settings_add_string(hdlg, IDC_COMBO_HD_ID, (LPARAM) lptsTemp); } for (i = 0; i < 8; i++) { - wsprintf(lptsTemp, plat_get_string(IDS_4097), i >> 1, i & 1); - settings_add_string(hdlg, IDC_COMBO_HD_CHANNEL_IDE, (LPARAM) lptsTemp); + wsprintf(lptsTemp, plat_get_string(IDS_4097), i >> 1, i & 1); + settings_add_string(hdlg, IDC_COMBO_HD_CHANNEL_IDE, (LPARAM) lptsTemp); } free(lptsTemp); } - static uint8_t next_free_binary_channel(uint64_t *tracking) { int64_t i; for (i = 0; i < 2; i++) { - if (!(*tracking & (0xffLL << (i << 3LL)))) - return i; + if (!(*tracking & (0xffLL << (i << 3LL)))) + return i; } return 2; } - static uint8_t next_free_ide_channel(void) { int64_t i; for (i = 0; i < 8; i++) { - if (!(ide_tracking & (0xffLL << (i << 3LL)))) - return i; + if (!(ide_tracking & (0xffLL << (i << 3LL)))) + return i; } return 7; } - static void next_free_scsi_id(uint8_t *id) { int64_t i; for (i = 0; i < 64; i++) { - if (!(scsi_tracking[i >> 3] & (0xffLL << ((i & 0x07) << 3LL)))) { - *id = i; - return; - } + if (!(scsi_tracking[i >> 3] & (0xffLL << ((i & 0x07) << 3LL)))) { + *id = i; + return; + } } *id = 6; } - static void recalc_location_controls(HWND hdlg, int is_add_dlg, int assign_id) { int i = 0, bus = 0; for (i = IDT_CHANNEL; i <= IDT_ID; i++) - settings_show_window(hdlg, i, FALSE); + settings_show_window(hdlg, i, FALSE); settings_show_window(hdlg, IDC_COMBO_HD_CHANNEL, FALSE); settings_show_window(hdlg, IDC_COMBO_HD_ID, FALSE); settings_show_window(hdlg, IDC_COMBO_HD_CHANNEL_IDE, FALSE); if ((hd_listview_items > 0) || is_add_dlg) { - bus = settings_get_cur_sel(hdlg, IDC_COMBO_HD_BUS) + 1; + bus = settings_get_cur_sel(hdlg, IDC_COMBO_HD_BUS) + 1; - switch(bus) { - case HDD_BUS_MFM: /* MFM */ - settings_show_window(hdlg, IDT_CHANNEL, TRUE); - settings_show_window(hdlg, IDC_COMBO_HD_CHANNEL, TRUE); + switch (bus) { + case HDD_BUS_MFM: /* MFM */ + settings_show_window(hdlg, IDT_CHANNEL, TRUE); + settings_show_window(hdlg, IDC_COMBO_HD_CHANNEL, TRUE); - if (assign_id) - temp_hdd[lv1_current_sel].mfm_channel = next_free_binary_channel(&mfm_tracking); - settings_set_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL, is_add_dlg ? new_hdd.mfm_channel : temp_hdd[lv1_current_sel].mfm_channel); - break; - case HDD_BUS_XTA: /* XTA */ - settings_show_window(hdlg, IDT_CHANNEL, TRUE); - settings_show_window(hdlg, IDC_COMBO_HD_CHANNEL, TRUE); + if (assign_id) + temp_hdd[lv1_current_sel].mfm_channel = next_free_binary_channel(&mfm_tracking); + settings_set_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL, is_add_dlg ? new_hdd.mfm_channel : temp_hdd[lv1_current_sel].mfm_channel); + break; + case HDD_BUS_XTA: /* XTA */ + settings_show_window(hdlg, IDT_CHANNEL, TRUE); + settings_show_window(hdlg, IDC_COMBO_HD_CHANNEL, TRUE); - if (assign_id) - temp_hdd[lv1_current_sel].xta_channel = next_free_binary_channel(&xta_tracking); - settings_set_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL, is_add_dlg ? new_hdd.xta_channel : temp_hdd[lv1_current_sel].xta_channel); - break; - case HDD_BUS_ESDI: /* ESDI */ - settings_show_window(hdlg, IDT_CHANNEL, TRUE); - settings_show_window(hdlg, IDC_COMBO_HD_CHANNEL, TRUE); + if (assign_id) + temp_hdd[lv1_current_sel].xta_channel = next_free_binary_channel(&xta_tracking); + settings_set_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL, is_add_dlg ? new_hdd.xta_channel : temp_hdd[lv1_current_sel].xta_channel); + break; + case HDD_BUS_ESDI: /* ESDI */ + settings_show_window(hdlg, IDT_CHANNEL, TRUE); + settings_show_window(hdlg, IDC_COMBO_HD_CHANNEL, TRUE); - if (assign_id) - temp_hdd[lv1_current_sel].esdi_channel = next_free_binary_channel(&esdi_tracking); - settings_set_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL, is_add_dlg ? new_hdd.esdi_channel : temp_hdd[lv1_current_sel].esdi_channel); - break; - case HDD_BUS_IDE: /* IDE */ - case HDD_BUS_ATAPI: /* ATAPI */ - settings_show_window(hdlg, IDT_CHANNEL, TRUE); - settings_show_window(hdlg, IDC_COMBO_HD_CHANNEL_IDE, TRUE); + if (assign_id) + temp_hdd[lv1_current_sel].esdi_channel = next_free_binary_channel(&esdi_tracking); + settings_set_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL, is_add_dlg ? new_hdd.esdi_channel : temp_hdd[lv1_current_sel].esdi_channel); + break; + case HDD_BUS_IDE: /* IDE */ + case HDD_BUS_ATAPI: /* ATAPI */ + settings_show_window(hdlg, IDT_CHANNEL, TRUE); + settings_show_window(hdlg, IDC_COMBO_HD_CHANNEL_IDE, TRUE); - if (assign_id) - temp_hdd[lv1_current_sel].ide_channel = next_free_ide_channel(); - settings_set_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL_IDE, is_add_dlg ? new_hdd.ide_channel : temp_hdd[lv1_current_sel].ide_channel); - break; - case HDD_BUS_SCSI: /* SCSI */ - settings_show_window(hdlg, IDT_ID, TRUE); - settings_show_window(hdlg, IDT_LUN, TRUE); - settings_show_window(hdlg, IDC_COMBO_HD_ID, TRUE); + if (assign_id) + temp_hdd[lv1_current_sel].ide_channel = next_free_ide_channel(); + settings_set_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL_IDE, is_add_dlg ? new_hdd.ide_channel : temp_hdd[lv1_current_sel].ide_channel); + break; + case HDD_BUS_SCSI: /* SCSI */ + settings_show_window(hdlg, IDT_ID, TRUE); + settings_show_window(hdlg, IDT_LUN, TRUE); + settings_show_window(hdlg, IDC_COMBO_HD_ID, TRUE); - if (assign_id) - next_free_scsi_id((uint8_t *) (is_add_dlg ? &(new_hdd.scsi_id) : &(temp_hdd[lv1_current_sel].scsi_id))); - settings_set_cur_sel(hdlg, IDC_COMBO_HD_ID, is_add_dlg ? new_hdd.scsi_id : temp_hdd[lv1_current_sel].scsi_id); - } + if (assign_id) + next_free_scsi_id((uint8_t *) (is_add_dlg ? &(new_hdd.scsi_id) : &(temp_hdd[lv1_current_sel].scsi_id))); + settings_set_cur_sel(hdlg, IDC_COMBO_HD_ID, is_add_dlg ? new_hdd.scsi_id : temp_hdd[lv1_current_sel].scsi_id); + } } settings_show_window(hdlg, IDT_BUS, (hd_listview_items != 0) || is_add_dlg); settings_show_window(hdlg, IDC_COMBO_HD_BUS, (hd_listview_items != 0) || is_add_dlg); } - static int bus_full(uint64_t *tracking, int count) { int full = 0; - switch(count) { - case 2: - default: - full = (*tracking & 0xFF00LL); - full = full && (*tracking & 0x00FFLL); - break; - case 8: - full = (*tracking & 0xFF00000000000000LL); - full = full && (*tracking & 0x00FF000000000000LL); - full = full && (*tracking & 0x0000FF0000000000LL); - full = full && (*tracking & 0x000000FF00000000LL); - full = full && (*tracking & 0x00000000FF000000LL); - full = full && (*tracking & 0x0000000000FF0000LL); - full = full && (*tracking & 0x000000000000FF00LL); - full = full && (*tracking & 0x00000000000000FFLL); - break; + switch (count) { + case 2: + default: + full = (*tracking & 0xFF00LL); + full = full && (*tracking & 0x00FFLL); + break; + case 8: + full = (*tracking & 0xFF00000000000000LL); + full = full && (*tracking & 0x00FF000000000000LL); + full = full && (*tracking & 0x0000FF0000000000LL); + full = full && (*tracking & 0x000000FF00000000LL); + full = full && (*tracking & 0x00000000FF000000LL); + full = full && (*tracking & 0x0000000000FF0000LL); + full = full && (*tracking & 0x000000000000FF00LL); + full = full && (*tracking & 0x00000000000000FFLL); + break; } return full; } - static void recalc_next_free_id(HWND hdlg) { @@ -2157,201 +2111,197 @@ recalc_next_free_id(HWND hdlg) next_free_id = -1; for (i = 0; i < HDD_NUM; i++) { - if (temp_hdd[i].bus == HDD_BUS_MFM) - c_mfm++; - else if (temp_hdd[i].bus == HDD_BUS_ESDI) - c_esdi++; - else if (temp_hdd[i].bus == HDD_BUS_XTA) - c_xta++; - else if (temp_hdd[i].bus == HDD_BUS_IDE) - c_ide++; - else if (temp_hdd[i].bus == HDD_BUS_ATAPI) - c_atapi++; - else if (temp_hdd[i].bus == HDD_BUS_SCSI) - c_scsi++; + if (temp_hdd[i].bus == HDD_BUS_MFM) + c_mfm++; + else if (temp_hdd[i].bus == HDD_BUS_ESDI) + c_esdi++; + else if (temp_hdd[i].bus == HDD_BUS_XTA) + c_xta++; + else if (temp_hdd[i].bus == HDD_BUS_IDE) + c_ide++; + else if (temp_hdd[i].bus == HDD_BUS_ATAPI) + c_atapi++; + else if (temp_hdd[i].bus == HDD_BUS_SCSI) + c_scsi++; } for (i = 0; i < HDD_NUM; i++) { - if (temp_hdd[i].bus == HDD_BUS_DISABLED) { - next_free_id = i; - break; - } + if (temp_hdd[i].bus == HDD_BUS_DISABLED) { + next_free_id = i; + break; + } } enable_add = enable_add || (next_free_id >= 0); - enable_add = enable_add && ((c_mfm < MFM_NUM) || (c_esdi < ESDI_NUM) || (c_xta < XTA_NUM) || - (c_ide < IDE_NUM) || (c_ide < ATAPI_NUM) || (c_scsi < SCSI_NUM)); + enable_add = enable_add && ((c_mfm < MFM_NUM) || (c_esdi < ESDI_NUM) || (c_xta < XTA_NUM) || (c_ide < IDE_NUM) || (c_ide < ATAPI_NUM) || (c_scsi < SCSI_NUM)); enable_add = enable_add && !bus_full(&mfm_tracking, 2); enable_add = enable_add && !bus_full(&esdi_tracking, 2); enable_add = enable_add && !bus_full(&xta_tracking, 2); enable_add = enable_add && !bus_full(&ide_tracking, 8); for (i = 0; i < 2; i++) - enable_add = enable_add && !bus_full(&(scsi_tracking[i]), 8); + enable_add = enable_add && !bus_full(&(scsi_tracking[i]), 8); settings_enable_window(hdlg, IDC_BUTTON_HDD_ADD_NEW, enable_add); settings_enable_window(hdlg, IDC_BUTTON_HDD_ADD, enable_add); settings_enable_window(hdlg, IDC_BUTTON_HDD_REMOVE, - (c_mfm != 0) || (c_esdi != 0) || (c_xta != 0) || (c_ide != 0) || - (c_atapi != 0) || (c_scsi != 0)); + (c_mfm != 0) || (c_esdi != 0) || (c_xta != 0) || (c_ide != 0) || (c_atapi != 0) || (c_scsi != 0)); } - static void win_settings_hard_disks_update_item(HWND hdlg, int i, int column) { - HWND hwndList = GetDlgItem(hdlg, IDC_LIST_HARD_DISKS); + HWND hwndList = GetDlgItem(hdlg, IDC_LIST_HARD_DISKS); LVITEM lvI; - WCHAR szText[256]; + WCHAR szText[256]; - lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; + lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; lvI.stateMask = lvI.iSubItem = lvI.state = 0; lvI.iSubItem = column; - lvI.iItem = i; + lvI.iItem = i; if (column == 0) { - switch(temp_hdd[i].bus) { - case HDD_BUS_MFM: - wsprintf(szText, plat_get_string(IDS_4608), temp_hdd[i].mfm_channel >> 1, temp_hdd[i].mfm_channel & 1); - break; - case HDD_BUS_XTA: - wsprintf(szText, plat_get_string(IDS_4609), temp_hdd[i].xta_channel >> 1, temp_hdd[i].xta_channel & 1); - break; - case HDD_BUS_ESDI: - wsprintf(szText, plat_get_string(IDS_4610), temp_hdd[i].esdi_channel >> 1, temp_hdd[i].esdi_channel & 1); - break; - case HDD_BUS_IDE: - wsprintf(szText, plat_get_string(IDS_4611), temp_hdd[i].ide_channel >> 1, temp_hdd[i].ide_channel & 1); - break; - case HDD_BUS_ATAPI: - wsprintf(szText, plat_get_string(IDS_4612), temp_hdd[i].ide_channel >> 1, temp_hdd[i].ide_channel & 1); - break; - case HDD_BUS_SCSI: - wsprintf(szText, plat_get_string(IDS_4613), temp_hdd[i].scsi_id >> 4, temp_hdd[i].scsi_id & 15); - break; - } - lvI.pszText = szText; - lvI.iImage = 0; + switch (temp_hdd[i].bus) { + case HDD_BUS_MFM: + wsprintf(szText, plat_get_string(IDS_4608), temp_hdd[i].mfm_channel >> 1, temp_hdd[i].mfm_channel & 1); + break; + case HDD_BUS_XTA: + wsprintf(szText, plat_get_string(IDS_4609), temp_hdd[i].xta_channel >> 1, temp_hdd[i].xta_channel & 1); + break; + case HDD_BUS_ESDI: + wsprintf(szText, plat_get_string(IDS_4610), temp_hdd[i].esdi_channel >> 1, temp_hdd[i].esdi_channel & 1); + break; + case HDD_BUS_IDE: + wsprintf(szText, plat_get_string(IDS_4611), temp_hdd[i].ide_channel >> 1, temp_hdd[i].ide_channel & 1); + break; + case HDD_BUS_ATAPI: + wsprintf(szText, plat_get_string(IDS_4612), temp_hdd[i].ide_channel >> 1, temp_hdd[i].ide_channel & 1); + break; + case HDD_BUS_SCSI: + wsprintf(szText, plat_get_string(IDS_4613), temp_hdd[i].scsi_id >> 4, temp_hdd[i].scsi_id & 15); + break; + } + lvI.pszText = szText; + lvI.iImage = 0; } else if (column == 1) { - if (!strnicmp(temp_hdd[i].fn, usr_path, strlen(usr_path))) - mbstoc16s(szText, temp_hdd[i].fn + strlen(usr_path), sizeof_w(szText)); - else - mbstoc16s(szText, temp_hdd[i].fn, sizeof_w(szText)); - lvI.pszText = szText; - lvI.iImage = 0; + if (!strnicmp(temp_hdd[i].fn, usr_path, strlen(usr_path))) + mbstoc16s(szText, temp_hdd[i].fn + strlen(usr_path), sizeof_w(szText)); + else + mbstoc16s(szText, temp_hdd[i].fn, sizeof_w(szText)); + lvI.pszText = szText; + lvI.iImage = 0; } else if (column == 2) { - wsprintf(szText, plat_get_string(IDS_4098), temp_hdd[i].tracks); - lvI.pszText = szText; - lvI.iImage = 0; + wsprintf(szText, plat_get_string(IDS_4098), temp_hdd[i].tracks); + lvI.pszText = szText; + lvI.iImage = 0; } else if (column == 3) { - wsprintf(szText, plat_get_string(IDS_4098), temp_hdd[i].hpc); - lvI.pszText = szText; - lvI.iImage = 0; + wsprintf(szText, plat_get_string(IDS_4098), temp_hdd[i].hpc); + lvI.pszText = szText; + lvI.iImage = 0; } else if (column == 4) { - wsprintf(szText, plat_get_string(IDS_4098), temp_hdd[i].spt); - lvI.pszText = szText; - lvI.iImage = 0; + wsprintf(szText, plat_get_string(IDS_4098), temp_hdd[i].spt); + lvI.pszText = szText; + lvI.iImage = 0; } else if (column == 5) { - wsprintf(szText, plat_get_string(IDS_4098), (temp_hdd[i].tracks * temp_hdd[i].hpc * temp_hdd[i].spt) >> 11); - lvI.pszText = szText; - lvI.iImage = 0; + wsprintf(szText, plat_get_string(IDS_4098), (temp_hdd[i].tracks * temp_hdd[i].hpc * temp_hdd[i].spt) >> 11); + lvI.pszText = szText; + lvI.iImage = 0; } if (ListView_SetItem(hwndList, &lvI) == -1) - return; + return; } - static BOOL win_settings_hard_disks_recalc_list(HWND hdlg) { LVITEM lvI; - int i, j = 0; - WCHAR szText[256], usr_path_w[1024]; - HWND hwndList = GetDlgItem(hdlg, IDC_LIST_HARD_DISKS); + int i, j = 0; + WCHAR szText[256], usr_path_w[1024]; + HWND hwndList = GetDlgItem(hdlg, IDC_LIST_HARD_DISKS); mbstoc16s(usr_path_w, usr_path, sizeof_w(usr_path_w)); hd_listview_items = 0; - lv1_current_sel = -1; + lv1_current_sel = -1; ListView_DeleteAllItems(hwndList); - lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; + lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; lvI.stateMask = lvI.iSubItem = lvI.state = 0; for (i = 0; i < HDD_NUM; i++) { - if (temp_hdd[i].bus > 0) { - hdc_id_to_listview_index[i] = j; - lvI.iSubItem = 0; - switch(temp_hdd[i].bus) { - case HDD_BUS_MFM: - wsprintf(szText, plat_get_string(IDS_4608), temp_hdd[i].mfm_channel >> 1, temp_hdd[i].mfm_channel & 1); - break; - case HDD_BUS_XTA: - wsprintf(szText, plat_get_string(IDS_4609), temp_hdd[i].xta_channel >> 1, temp_hdd[i].xta_channel & 1); - break; - case HDD_BUS_ESDI: - wsprintf(szText, plat_get_string(IDS_4610), temp_hdd[i].esdi_channel >> 1, temp_hdd[i].esdi_channel & 1); - break; - case HDD_BUS_IDE: - wsprintf(szText, plat_get_string(IDS_4611), temp_hdd[i].ide_channel >> 1, temp_hdd[i].ide_channel & 1); - break; - case HDD_BUS_ATAPI: - wsprintf(szText, plat_get_string(IDS_4612), temp_hdd[i].ide_channel >> 1, temp_hdd[i].ide_channel & 1); - break; - case HDD_BUS_SCSI: - wsprintf(szText, plat_get_string(IDS_4613), temp_hdd[i].scsi_id >> 4, temp_hdd[i].scsi_id & 15); - break; - } - lvI.pszText = szText; - lvI.iItem = j; - lvI.iImage = 0; + if (temp_hdd[i].bus > 0) { + hdc_id_to_listview_index[i] = j; + lvI.iSubItem = 0; + switch (temp_hdd[i].bus) { + case HDD_BUS_MFM: + wsprintf(szText, plat_get_string(IDS_4608), temp_hdd[i].mfm_channel >> 1, temp_hdd[i].mfm_channel & 1); + break; + case HDD_BUS_XTA: + wsprintf(szText, plat_get_string(IDS_4609), temp_hdd[i].xta_channel >> 1, temp_hdd[i].xta_channel & 1); + break; + case HDD_BUS_ESDI: + wsprintf(szText, plat_get_string(IDS_4610), temp_hdd[i].esdi_channel >> 1, temp_hdd[i].esdi_channel & 1); + break; + case HDD_BUS_IDE: + wsprintf(szText, plat_get_string(IDS_4611), temp_hdd[i].ide_channel >> 1, temp_hdd[i].ide_channel & 1); + break; + case HDD_BUS_ATAPI: + wsprintf(szText, plat_get_string(IDS_4612), temp_hdd[i].ide_channel >> 1, temp_hdd[i].ide_channel & 1); + break; + case HDD_BUS_SCSI: + wsprintf(szText, plat_get_string(IDS_4613), temp_hdd[i].scsi_id >> 4, temp_hdd[i].scsi_id & 15); + break; + } + lvI.pszText = szText; + lvI.iItem = j; + lvI.iImage = 0; - if (ListView_InsertItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_InsertItem(hwndList, &lvI) == -1) + return FALSE; - lvI.iSubItem = 1; - if (!strnicmp(temp_hdd[i].fn, usr_path, strlen(usr_path))) - mbstoc16s(szText, temp_hdd[i].fn + strlen(usr_path), sizeof_w(szText)); - else - mbstoc16s(szText, temp_hdd[i].fn, sizeof_w(szText)); - lvI.pszText = szText; + lvI.iSubItem = 1; + if (!strnicmp(temp_hdd[i].fn, usr_path, strlen(usr_path))) + mbstoc16s(szText, temp_hdd[i].fn + strlen(usr_path), sizeof_w(szText)); + else + mbstoc16s(szText, temp_hdd[i].fn, sizeof_w(szText)); + lvI.pszText = szText; - if (ListView_SetItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_SetItem(hwndList, &lvI) == -1) + return FALSE; - lvI.iSubItem = 2; - wsprintf(szText, plat_get_string(IDS_4098), temp_hdd[i].tracks); - lvI.pszText = szText; + lvI.iSubItem = 2; + wsprintf(szText, plat_get_string(IDS_4098), temp_hdd[i].tracks); + lvI.pszText = szText; - if (ListView_SetItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_SetItem(hwndList, &lvI) == -1) + return FALSE; - lvI.iSubItem = 3; - wsprintf(szText, plat_get_string(IDS_4098), temp_hdd[i].hpc); - lvI.pszText = szText; + lvI.iSubItem = 3; + wsprintf(szText, plat_get_string(IDS_4098), temp_hdd[i].hpc); + lvI.pszText = szText; - if (ListView_SetItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_SetItem(hwndList, &lvI) == -1) + return FALSE; - lvI.iSubItem = 4; - wsprintf(szText, plat_get_string(IDS_4098), temp_hdd[i].spt); - lvI.pszText = szText; + lvI.iSubItem = 4; + wsprintf(szText, plat_get_string(IDS_4098), temp_hdd[i].spt); + lvI.pszText = szText; - if (ListView_SetItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_SetItem(hwndList, &lvI) == -1) + return FALSE; - lvI.iSubItem = 5; - wsprintf(szText, plat_get_string(IDS_4098), (temp_hdd[i].tracks * temp_hdd[i].hpc * temp_hdd[i].spt) >> 11); - lvI.pszText = szText; + lvI.iSubItem = 5; + wsprintf(szText, plat_get_string(IDS_4098), (temp_hdd[i].tracks * temp_hdd[i].hpc * temp_hdd[i].spt) >> 11); + lvI.pszText = szText; - if (ListView_SetItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_SetItem(hwndList, &lvI) == -1) + return FALSE; - j++; - } else - hdc_id_to_listview_index[i] = -1; + j++; + } else + hdc_id_to_listview_index[i] = -1; } hd_listview_items = j; @@ -2359,82 +2309,79 @@ win_settings_hard_disks_recalc_list(HWND hdlg) return TRUE; } - static void win_settings_hard_disks_resize_columns(HWND hdlg) { /* Bus, File, Cylinders, Heads, Sectors, Size */ - int iCol, width[C_COLUMNS_HARD_DISKS] = {104, 354, 50, 26, 32, 50}; - int total = 0; + int iCol, width[C_COLUMNS_HARD_DISKS] = { 104, 354, 50, 26, 32, 50 }; + int total = 0; HWND hwndList = GetDlgItem(hdlg, IDC_LIST_HARD_DISKS); RECT r; GetWindowRect(hwndList, &r); for (iCol = 0; iCol < (C_COLUMNS_HARD_DISKS - 1); iCol++) { - width[iCol] = MulDiv(width[iCol], dpi, 96); - total += width[iCol]; - ListView_SetColumnWidth(hwndList, iCol, MulDiv(width[iCol], dpi, 96)); + width[iCol] = MulDiv(width[iCol], dpi, 96); + total += width[iCol]; + ListView_SetColumnWidth(hwndList, iCol, MulDiv(width[iCol], dpi, 96)); } width[C_COLUMNS_HARD_DISKS - 1] = (r.right - r.left) - 4 - total; ListView_SetColumnWidth(hwndList, C_COLUMNS_HARD_DISKS - 1, width[C_COLUMNS_HARD_DISKS - 1]); } - static BOOL win_settings_hard_disks_init_columns(HWND hdlg) { LVCOLUMN lvc; - int iCol; - HWND hwndList = GetDlgItem(hdlg, IDC_LIST_HARD_DISKS); + int iCol; + HWND hwndList = GetDlgItem(hdlg, IDC_LIST_HARD_DISKS); lvc.mask = LVCF_FMT | LVCF_WIDTH | LVCF_TEXT | LVCF_SUBITEM; for (iCol = 0; iCol < C_COLUMNS_HARD_DISKS; iCol++) { - lvc.iSubItem = iCol; - lvc.pszText = plat_get_string(IDS_2081 + iCol); + lvc.iSubItem = iCol; + lvc.pszText = plat_get_string(IDS_2081 + iCol); - switch(iCol) { - case 0: /* Bus */ - lvc.cx = 104; - lvc.fmt = LVCFMT_LEFT; - break; - case 1: /* File */ - lvc.cx = 354; - lvc.fmt = LVCFMT_LEFT; - break; - case 2: /* Cylinders */ - lvc.cx = 50; - lvc.fmt = LVCFMT_RIGHT; - break; - case 3: /* Heads */ - lvc.cx = 26; - lvc.fmt = LVCFMT_RIGHT; - break; - case 4: /* Sectors */ - lvc.cx = 32; - lvc.fmt = LVCFMT_RIGHT; - break; - case 5: /* Size (MB) 8 */ - lvc.cx = 50; - lvc.fmt = LVCFMT_RIGHT; - break; - } + switch (iCol) { + case 0: /* Bus */ + lvc.cx = 104; + lvc.fmt = LVCFMT_LEFT; + break; + case 1: /* File */ + lvc.cx = 354; + lvc.fmt = LVCFMT_LEFT; + break; + case 2: /* Cylinders */ + lvc.cx = 50; + lvc.fmt = LVCFMT_RIGHT; + break; + case 3: /* Heads */ + lvc.cx = 26; + lvc.fmt = LVCFMT_RIGHT; + break; + case 4: /* Sectors */ + lvc.cx = 32; + lvc.fmt = LVCFMT_RIGHT; + break; + case 5: /* Size (MB) 8 */ + lvc.cx = 50; + lvc.fmt = LVCFMT_RIGHT; + break; + } - if (ListView_InsertColumn(hwndList, iCol, &lvc) == -1) - return FALSE; + if (ListView_InsertColumn(hwndList, iCol, &lvc) == -1) + return FALSE; } win_settings_hard_disks_resize_columns(hdlg); return TRUE; } - static void get_edit_box_contents(HWND hdlg, int id, uint32_t *val) { - HWND h; + HWND h; WCHAR szText[256]; - char stransi[256]; + char stransi[256]; h = GetDlgItem(hdlg, id); SendMessage(h, WM_GETTEXT, 255, (LPARAM) szText); @@ -2442,11 +2389,10 @@ get_edit_box_contents(HWND hdlg, int id, uint32_t *val) sscanf(stransi, "%u", val); } - static void set_edit_box_contents(HWND hdlg, int id, uint32_t val) { - HWND h; + HWND h; WCHAR szText[256]; h = GetDlgItem(hdlg, id); @@ -2454,35 +2400,37 @@ set_edit_box_contents(HWND hdlg, int id, uint32_t val) SendMessage(h, WM_SETTEXT, (WPARAM) wcslen(szText), (LPARAM) szText); } -static void set_edit_box_text_contents(HWND hdlg, int id, WCHAR* text) +static void +set_edit_box_text_contents(HWND hdlg, int id, WCHAR *text) { - HWND h = GetDlgItem(hdlg, id); - SendMessage(h, WM_SETTEXT, (WPARAM) wcslen(text), (LPARAM) text); + HWND h = GetDlgItem(hdlg, id); + SendMessage(h, WM_SETTEXT, (WPARAM) wcslen(text), (LPARAM) text); } -static void get_edit_box_text_contents(HWND hdlg, int id, WCHAR* text_buffer, int buffer_size) +static void +get_edit_box_text_contents(HWND hdlg, int id, WCHAR *text_buffer, int buffer_size) { - HWND h = GetDlgItem(hdlg, id); - SendMessage(h, WM_GETTEXT, (WPARAM) buffer_size, (LPARAM) text_buffer); + HWND h = GetDlgItem(hdlg, id); + SendMessage(h, WM_GETTEXT, (WPARAM) buffer_size, (LPARAM) text_buffer); } -static int hdconf_initialize_hdt_combo(HWND hdlg) +static int +hdconf_initialize_hdt_combo(HWND hdlg) { - int i = 0; + int i = 0; uint64_t temp_size = 0; - uint32_t size_mb = 0; - WCHAR szText[256]; + uint32_t size_mb = 0; + WCHAR szText[256]; selection = 127; for (i = 0; i < 127; i++) { - temp_size = ((uint64_t) hdd_table[i][0]) * hdd_table[i][1] * hdd_table[i][2]; - size_mb = (uint32_t) (temp_size >> 11LL); - wsprintf(szText, plat_get_string(IDS_2107), size_mb, hdd_table[i][0], hdd_table[i][1], hdd_table[i][2]); - settings_add_string(hdlg, IDC_COMBO_HD_TYPE, (LPARAM) szText); - if ((tracks == (int) hdd_table[i][0]) && (hpc == (int) hdd_table[i][1]) && - (spt == (int) hdd_table[i][2])) - selection = i; + temp_size = ((uint64_t) hdd_table[i][0]) * hdd_table[i][1] * hdd_table[i][2]; + size_mb = (uint32_t) (temp_size >> 11LL); + wsprintf(szText, plat_get_string(IDS_2107), size_mb, hdd_table[i][0], hdd_table[i][1], hdd_table[i][2]); + settings_add_string(hdlg, IDC_COMBO_HD_TYPE, (LPARAM) szText); + if ((tracks == (int) hdd_table[i][0]) && (hpc == (int) hdd_table[i][1]) && (spt == (int) hdd_table[i][2])) + selection = i; } settings_add_string(hdlg, IDC_COMBO_HD_TYPE, win_get_string(IDS_4100)); settings_add_string(hdlg, IDC_COMBO_HD_TYPE, win_get_string(IDS_4101)); @@ -2490,7 +2438,6 @@ static int hdconf_initialize_hdt_combo(HWND hdlg) return selection; } - static void recalc_selection(HWND hdlg) { @@ -2498,27 +2445,26 @@ recalc_selection(HWND hdlg) selection = 127; for (i = 0; i < 127; i++) { - if ((tracks == (int) hdd_table[i][0]) && - (hpc == (int) hdd_table[i][1]) && - (spt == (int) hdd_table[i][2])) - selection = i; + if ((tracks == (int) hdd_table[i][0]) && (hpc == (int) hdd_table[i][1]) && (spt == (int) hdd_table[i][2])) + selection = i; } if ((selection == 127) && (hpc == 16) && (spt == 63)) - selection = 128; + selection = 128; settings_set_cur_sel(hdlg, IDC_COMBO_HD_TYPE, selection); } HWND vhd_progress_hdlg; -static void vhd_progress_callback(uint32_t current_sector, uint32_t total_sectors) +static void +vhd_progress_callback(uint32_t current_sector, uint32_t total_sectors) { - MSG msg; - HWND h = GetDlgItem(vhd_progress_hdlg, IDC_PBAR_IMG_CREATE); - SendMessage(h, PBM_SETPOS, (WPARAM) current_sector, (LPARAM) 0); - while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { - TranslateMessage(&msg); - DispatchMessage(&msg); - } + MSG msg; + HWND h = GetDlgItem(vhd_progress_hdlg, IDC_PBAR_IMG_CREATE); + SendMessage(h, PBM_SETPOS, (WPARAM) current_sector, (LPARAM) 0); + while (PeekMessage(&msg, 0, 0, 0, PM_REMOVE | PM_NOYIELD)) { + TranslateMessage(&msg); + DispatchMessage(&msg); + } } /* If the disk geometry requested in the 86Box GUI is not compatible with the internal VHD geometry, @@ -2526,134 +2472,138 @@ static void vhd_progress_callback(uint32_t current_sector, uint32_t total_sector * of about 21 MB, and should only be necessary for VHDs larger than 31.5 GB, so should never be more * than a tenth of a percent change in size. */ -static void adjust_86box_geometry_for_vhd(MVHDGeom *_86box_geometry, MVHDGeom *vhd_geometry) +static void +adjust_86box_geometry_for_vhd(MVHDGeom *_86box_geometry, MVHDGeom *vhd_geometry) { - if (_86box_geometry->cyl <= 65535) { - vhd_geometry->cyl = _86box_geometry->cyl; - vhd_geometry->heads = _86box_geometry->heads; - vhd_geometry->spt = _86box_geometry->spt; - return; - } + if (_86box_geometry->cyl <= 65535) { + vhd_geometry->cyl = _86box_geometry->cyl; + vhd_geometry->heads = _86box_geometry->heads; + vhd_geometry->spt = _86box_geometry->spt; + return; + } - int desired_sectors = _86box_geometry->cyl * _86box_geometry->heads * _86box_geometry->spt; - if (desired_sectors > 267321600) - desired_sectors = 267321600; + int desired_sectors = _86box_geometry->cyl * _86box_geometry->heads * _86box_geometry->spt; + if (desired_sectors > 267321600) + desired_sectors = 267321600; - int remainder = desired_sectors % 85680; /* 8560 is the LCM of 1008 (63*16) and 4080 (255*16) */ - if (remainder > 0) - desired_sectors += (85680 - remainder); + int remainder = desired_sectors % 85680; /* 8560 is the LCM of 1008 (63*16) and 4080 (255*16) */ + if (remainder > 0) + desired_sectors += (85680 - remainder); - _86box_geometry->cyl = desired_sectors / (16 * 63); - _86box_geometry->heads = 16; - _86box_geometry->spt = 63; + _86box_geometry->cyl = desired_sectors / (16 * 63); + _86box_geometry->heads = 16; + _86box_geometry->spt = 63; - vhd_geometry->cyl = desired_sectors / (16 * 255); - vhd_geometry->heads = 16; - vhd_geometry->spt = 255; + vhd_geometry->cyl = desired_sectors / (16 * 255); + vhd_geometry->heads = 16; + vhd_geometry->spt = 255; } -static void adjust_vhd_geometry_for_86box(MVHDGeom *vhd_geometry) +static void +adjust_vhd_geometry_for_86box(MVHDGeom *vhd_geometry) { - if (vhd_geometry->spt <= 63) - return; + if (vhd_geometry->spt <= 63) + return; - int desired_sectors = vhd_geometry->cyl * vhd_geometry->heads * vhd_geometry->spt; - if (desired_sectors > 267321600) - desired_sectors = 267321600; + int desired_sectors = vhd_geometry->cyl * vhd_geometry->heads * vhd_geometry->spt; + if (desired_sectors > 267321600) + desired_sectors = 267321600; - int remainder = desired_sectors % 85680; /* 8560 is the LCM of 1008 (63*16) and 4080 (255*16) */ - if (remainder > 0) - desired_sectors -= remainder; + int remainder = desired_sectors % 85680; /* 8560 is the LCM of 1008 (63*16) and 4080 (255*16) */ + if (remainder > 0) + desired_sectors -= remainder; - vhd_geometry->cyl = desired_sectors / (16 * 63); - vhd_geometry->heads = 16; - vhd_geometry->spt = 63; + vhd_geometry->cyl = desired_sectors / (16 * 63); + vhd_geometry->heads = 16; + vhd_geometry->spt = 63; } -static MVHDGeom create_drive_vhd_fixed(char* filename, int cyl, int heads, int spt) +static MVHDGeom +create_drive_vhd_fixed(char *filename, int cyl, int heads, int spt) { - MVHDGeom _86box_geometry = { .cyl = cyl, .heads = heads, .spt = spt }; - MVHDGeom vhd_geometry; - adjust_86box_geometry_for_vhd(&_86box_geometry, &vhd_geometry); + MVHDGeom _86box_geometry = { .cyl = cyl, .heads = heads, .spt = spt }; + MVHDGeom vhd_geometry; + adjust_86box_geometry_for_vhd(&_86box_geometry, &vhd_geometry); - HWND h = GetDlgItem(vhd_progress_hdlg, IDC_PBAR_IMG_CREATE); - settings_show_window(vhd_progress_hdlg, IDT_FILE_NAME, FALSE); - settings_show_window(vhd_progress_hdlg, IDC_EDIT_HD_FILE_NAME, FALSE); - settings_show_window(vhd_progress_hdlg, IDC_CFILE, FALSE); - settings_show_window(vhd_progress_hdlg, IDC_PBAR_IMG_CREATE, TRUE); - settings_enable_window(vhd_progress_hdlg, IDT_PROGRESS, TRUE); - SendMessage(h, PBM_SETRANGE32, (WPARAM) 0, (LPARAM) vhd_geometry.cyl * vhd_geometry.heads * vhd_geometry.spt); - SendMessage(h, PBM_SETPOS, (WPARAM) 0, (LPARAM) 0); + HWND h = GetDlgItem(vhd_progress_hdlg, IDC_PBAR_IMG_CREATE); + settings_show_window(vhd_progress_hdlg, IDT_FILE_NAME, FALSE); + settings_show_window(vhd_progress_hdlg, IDC_EDIT_HD_FILE_NAME, FALSE); + settings_show_window(vhd_progress_hdlg, IDC_CFILE, FALSE); + settings_show_window(vhd_progress_hdlg, IDC_PBAR_IMG_CREATE, TRUE); + settings_enable_window(vhd_progress_hdlg, IDT_PROGRESS, TRUE); + SendMessage(h, PBM_SETRANGE32, (WPARAM) 0, (LPARAM) vhd_geometry.cyl * vhd_geometry.heads * vhd_geometry.spt); + SendMessage(h, PBM_SETPOS, (WPARAM) 0, (LPARAM) 0); - int vhd_error = 0; - MVHDMeta *vhd = mvhd_create_fixed(filename, vhd_geometry, &vhd_error, vhd_progress_callback); - if (vhd == NULL) { - _86box_geometry.cyl = 0; - _86box_geometry.heads = 0; - _86box_geometry.spt = 0; - } else { - mvhd_close(vhd); - } + int vhd_error = 0; + MVHDMeta *vhd = mvhd_create_fixed(filename, vhd_geometry, &vhd_error, vhd_progress_callback); + if (vhd == NULL) { + _86box_geometry.cyl = 0; + _86box_geometry.heads = 0; + _86box_geometry.spt = 0; + } else { + mvhd_close(vhd); + } - return _86box_geometry; + return _86box_geometry; } -static MVHDGeom create_drive_vhd_dynamic(char* filename, int cyl, int heads, int spt, int blocksize) +static MVHDGeom +create_drive_vhd_dynamic(char *filename, int cyl, int heads, int spt, int blocksize) { - MVHDGeom _86box_geometry = { .cyl = cyl, .heads = heads, .spt = spt }; - MVHDGeom vhd_geometry; - adjust_86box_geometry_for_vhd(&_86box_geometry, &vhd_geometry); - int vhd_error = 0; - MVHDCreationOptions options; - options.block_size_in_sectors = blocksize; - options.path = filename; - options.size_in_bytes = 0; - options.geometry = vhd_geometry; - options.type = MVHD_TYPE_DYNAMIC; + MVHDGeom _86box_geometry = { .cyl = cyl, .heads = heads, .spt = spt }; + MVHDGeom vhd_geometry; + adjust_86box_geometry_for_vhd(&_86box_geometry, &vhd_geometry); + int vhd_error = 0; + MVHDCreationOptions options; + options.block_size_in_sectors = blocksize; + options.path = filename; + options.size_in_bytes = 0; + options.geometry = vhd_geometry; + options.type = MVHD_TYPE_DYNAMIC; - MVHDMeta *vhd = mvhd_create_ex(options, &vhd_error); - if (vhd == NULL) { - _86box_geometry.cyl = 0; - _86box_geometry.heads = 0; - _86box_geometry.spt = 0; - } else { - mvhd_close(vhd); - } + MVHDMeta *vhd = mvhd_create_ex(options, &vhd_error); + if (vhd == NULL) { + _86box_geometry.cyl = 0; + _86box_geometry.heads = 0; + _86box_geometry.spt = 0; + } else { + mvhd_close(vhd); + } - return _86box_geometry; + return _86box_geometry; } -static MVHDGeom create_drive_vhd_diff(char* filename, char* parent_filename, int blocksize) +static MVHDGeom +create_drive_vhd_diff(char *filename, char *parent_filename, int blocksize) { - int vhd_error = 0; - MVHDCreationOptions options; - options.block_size_in_sectors = blocksize; - options.path = filename; - options.parent_path = parent_filename; - options.type = MVHD_TYPE_DIFF; + int vhd_error = 0; + MVHDCreationOptions options; + options.block_size_in_sectors = blocksize; + options.path = filename; + options.parent_path = parent_filename; + options.type = MVHD_TYPE_DIFF; - MVHDMeta *vhd = mvhd_create_ex(options, &vhd_error); - MVHDGeom vhd_geometry; - if (vhd == NULL) { - vhd_geometry.cyl = 0; - vhd_geometry.heads = 0; - vhd_geometry.spt = 0; - } else { - vhd_geometry = mvhd_get_geometry(vhd); + MVHDMeta *vhd = mvhd_create_ex(options, &vhd_error); + MVHDGeom vhd_geometry; + if (vhd == NULL) { + vhd_geometry.cyl = 0; + vhd_geometry.heads = 0; + vhd_geometry.spt = 0; + } else { + vhd_geometry = mvhd_get_geometry(vhd); - if (vhd_geometry.spt > 63) { - vhd_geometry.cyl = mvhd_calc_size_sectors(&vhd_geometry) / (16 * 63); - vhd_geometry.heads = 16; - vhd_geometry.spt = 63; - } + if (vhd_geometry.spt > 63) { + vhd_geometry.cyl = mvhd_calc_size_sectors(&vhd_geometry) / (16 * 63); + vhd_geometry.heads = 16; + vhd_geometry.spt = 63; + } - mvhd_close(vhd); - } + mvhd_close(vhd); + } - return vhd_geometry; + return vhd_geometry; } - #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK #else @@ -2661,792 +2611,786 @@ static BOOL CALLBACK #endif win_settings_hard_disks_add_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { - HWND h; - FILE *f; - uint32_t temp, i = 0, sector_size = 512; - uint32_t zero = 0, base = 0x1000; - uint64_t signature = 0xD778A82044445459ll; - uint64_t r = 0; - char *big_buf; - char hd_file_name_multibyte[1200]; - int b = 0; - int vhd_error = 0; - uint8_t channel = 0; - uint8_t id = 0; - wchar_t *twcs; - int img_format, block_size; - WCHAR text_buf[256]; - RECT rect; - POINT point; - int dlg_height_adjust; + HWND h; + FILE *f; + uint32_t temp, i = 0, sector_size = 512; + uint32_t zero = 0, base = 0x1000; + uint64_t signature = 0xD778A82044445459ll; + uint64_t r = 0; + char *big_buf; + char hd_file_name_multibyte[1200]; + int b = 0; + int vhd_error = 0; + uint8_t channel = 0; + uint8_t id = 0; + wchar_t *twcs; + int img_format, block_size; + WCHAR text_buf[256]; + RECT rect; + POINT point; + int dlg_height_adjust; - switch (message) { - case WM_INITDIALOG: - memset(hd_file_name, 0, sizeof(hd_file_name)); + switch (message) { + case WM_INITDIALOG: + memset(hd_file_name, 0, sizeof(hd_file_name)); - hdd_ptr = &(temp_hdd[next_free_id]); + hdd_ptr = &(temp_hdd[next_free_id]); - SetWindowText(hdlg, plat_get_string((existing & 1) ? IDS_4103 : IDS_4102)); + SetWindowText(hdlg, plat_get_string((existing & 1) ? IDS_4103 : IDS_4102)); - no_update = 1; - spt = (existing & 1) ? 0 : 17; - set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, spt); - hpc = (existing & 1) ? 0 : 15; - set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, hpc); - tracks = (existing & 1) ? 0 : 1023; - set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, tracks); - size = (tracks * hpc * spt) << 9; - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20LL)); - hdconf_initialize_hdt_combo(hdlg); + no_update = 1; + spt = (existing & 1) ? 0 : 17; + set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, spt); + hpc = (existing & 1) ? 0 : 15; + set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, hpc); + tracks = (existing & 1) ? 0 : 1023; + set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, tracks); + size = (tracks * hpc * spt) << 9; + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20LL)); + hdconf_initialize_hdt_combo(hdlg); - settings_add_string(hdlg, IDC_COMBO_HD_IMG_FORMAT, win_get_string(IDS_4122)); - settings_add_string(hdlg, IDC_COMBO_HD_IMG_FORMAT, win_get_string(IDS_4123)); - settings_add_string(hdlg, IDC_COMBO_HD_IMG_FORMAT, win_get_string(IDS_4124)); - settings_add_string(hdlg, IDC_COMBO_HD_IMG_FORMAT, win_get_string(IDS_4125)); - settings_add_string(hdlg, IDC_COMBO_HD_IMG_FORMAT, win_get_string(IDS_4126)); - settings_add_string(hdlg, IDC_COMBO_HD_IMG_FORMAT, win_get_string(IDS_4127)); - settings_set_cur_sel(hdlg, IDC_COMBO_HD_IMG_FORMAT, 0); + settings_add_string(hdlg, IDC_COMBO_HD_IMG_FORMAT, win_get_string(IDS_4122)); + settings_add_string(hdlg, IDC_COMBO_HD_IMG_FORMAT, win_get_string(IDS_4123)); + settings_add_string(hdlg, IDC_COMBO_HD_IMG_FORMAT, win_get_string(IDS_4124)); + settings_add_string(hdlg, IDC_COMBO_HD_IMG_FORMAT, win_get_string(IDS_4125)); + settings_add_string(hdlg, IDC_COMBO_HD_IMG_FORMAT, win_get_string(IDS_4126)); + settings_add_string(hdlg, IDC_COMBO_HD_IMG_FORMAT, win_get_string(IDS_4127)); + settings_set_cur_sel(hdlg, IDC_COMBO_HD_IMG_FORMAT, 0); - settings_add_string(hdlg, IDC_COMBO_HD_BLOCK_SIZE, win_get_string(IDS_4128)); - settings_add_string(hdlg, IDC_COMBO_HD_BLOCK_SIZE, win_get_string(IDS_4129)); - settings_set_cur_sel(hdlg, IDC_COMBO_HD_BLOCK_SIZE, 0); + settings_add_string(hdlg, IDC_COMBO_HD_BLOCK_SIZE, win_get_string(IDS_4128)); + settings_add_string(hdlg, IDC_COMBO_HD_BLOCK_SIZE, win_get_string(IDS_4129)); + settings_set_cur_sel(hdlg, IDC_COMBO_HD_BLOCK_SIZE, 0); - settings_show_window(hdlg, IDC_COMBO_HD_BLOCK_SIZE, FALSE); - settings_show_window(hdlg, IDT_BLOCK_SIZE, FALSE); + settings_show_window(hdlg, IDC_COMBO_HD_BLOCK_SIZE, FALSE); + settings_show_window(hdlg, IDT_BLOCK_SIZE, FALSE); - if (existing & 1) { - settings_enable_window(hdlg, IDC_EDIT_HD_SPT, FALSE); - settings_enable_window(hdlg, IDC_EDIT_HD_HPC, FALSE); - settings_enable_window(hdlg, IDC_EDIT_HD_CYL, FALSE); - settings_enable_window(hdlg, IDC_EDIT_HD_SIZE, FALSE); - settings_enable_window(hdlg, IDC_COMBO_HD_TYPE, FALSE); - settings_show_window(hdlg, IDC_COMBO_HD_IMG_FORMAT, FALSE); - settings_show_window(hdlg, IDT_IMG_FORMAT, FALSE); + if (existing & 1) { + settings_enable_window(hdlg, IDC_EDIT_HD_SPT, FALSE); + settings_enable_window(hdlg, IDC_EDIT_HD_HPC, FALSE); + settings_enable_window(hdlg, IDC_EDIT_HD_CYL, FALSE); + settings_enable_window(hdlg, IDC_EDIT_HD_SIZE, FALSE); + settings_enable_window(hdlg, IDC_COMBO_HD_TYPE, FALSE); + settings_show_window(hdlg, IDC_COMBO_HD_IMG_FORMAT, FALSE); + settings_show_window(hdlg, IDT_IMG_FORMAT, FALSE); - /* adjust window size */ - GetWindowRect(hdlg, &rect); - OffsetRect(&rect, -rect.left, -rect.top); - dlg_height_adjust = rect.bottom / 5; - SetWindowPos(hdlg, NULL, 0, 0, rect.right, rect.bottom - dlg_height_adjust, SWP_NOMOVE | SWP_NOREPOSITION | SWP_NOZORDER); - h = GetDlgItem(hdlg, IDOK); - GetWindowRect(h, &rect); - point.x = rect.left; - point.y = rect.top; - ScreenToClient(hdlg, &point); - SetWindowPos(h, NULL, point.x, point.y - dlg_height_adjust, 0, 0, SWP_NOSIZE | SWP_NOREPOSITION | SWP_NOZORDER); - h = GetDlgItem(hdlg, IDCANCEL); - GetWindowRect(h, &rect); - point.x = rect.left; - point.y = rect.top; - ScreenToClient(hdlg, &point); - SetWindowPos(h, NULL, point.x, point.y - dlg_height_adjust, 0, 0, SWP_NOSIZE | SWP_NOREPOSITION | SWP_NOZORDER); + /* adjust window size */ + GetWindowRect(hdlg, &rect); + OffsetRect(&rect, -rect.left, -rect.top); + dlg_height_adjust = rect.bottom / 5; + SetWindowPos(hdlg, NULL, 0, 0, rect.right, rect.bottom - dlg_height_adjust, SWP_NOMOVE | SWP_NOREPOSITION | SWP_NOZORDER); + h = GetDlgItem(hdlg, IDOK); + GetWindowRect(h, &rect); + point.x = rect.left; + point.y = rect.top; + ScreenToClient(hdlg, &point); + SetWindowPos(h, NULL, point.x, point.y - dlg_height_adjust, 0, 0, SWP_NOSIZE | SWP_NOREPOSITION | SWP_NOZORDER); + h = GetDlgItem(hdlg, IDCANCEL); + GetWindowRect(h, &rect); + point.x = rect.left; + point.y = rect.top; + ScreenToClient(hdlg, &point); + SetWindowPos(h, NULL, point.x, point.y - dlg_height_adjust, 0, 0, SWP_NOSIZE | SWP_NOREPOSITION | SWP_NOZORDER); - chs_enabled = 0; - } else - chs_enabled = 1; + chs_enabled = 0; + } else + chs_enabled = 1; - add_locations(hdlg); - hdd_ptr->bus = HDD_BUS_IDE; - max_spt = 63; - max_hpc = 255; - settings_set_cur_sel(hdlg, IDC_COMBO_HD_BUS, hdd_ptr->bus - 1); - max_tracks = 266305; - recalc_location_controls(hdlg, 1, 0); + add_locations(hdlg); + hdd_ptr->bus = HDD_BUS_IDE; + max_spt = 63; + max_hpc = 255; + settings_set_cur_sel(hdlg, IDC_COMBO_HD_BUS, hdd_ptr->bus - 1); + max_tracks = 266305; + recalc_location_controls(hdlg, 1, 0); - channel = next_free_ide_channel(); - next_free_scsi_id(&id); - settings_set_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL, 0); - settings_set_cur_sel(hdlg, IDC_COMBO_HD_ID, id); - settings_set_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL_IDE, channel); + channel = next_free_ide_channel(); + next_free_scsi_id(&id); + settings_set_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL, 0); + settings_set_cur_sel(hdlg, IDC_COMBO_HD_ID, id); + settings_set_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL_IDE, channel); - new_hdd.mfm_channel = next_free_binary_channel(&mfm_tracking); - new_hdd.esdi_channel = next_free_binary_channel(&esdi_tracking); - new_hdd.xta_channel = next_free_binary_channel(&xta_tracking); - new_hdd.ide_channel = channel; - new_hdd.scsi_id = id; + new_hdd.mfm_channel = next_free_binary_channel(&mfm_tracking); + new_hdd.esdi_channel = next_free_binary_channel(&esdi_tracking); + new_hdd.xta_channel = next_free_binary_channel(&xta_tracking); + new_hdd.ide_channel = channel; + new_hdd.scsi_id = id; - settings_enable_window(hdlg, IDC_EDIT_HD_FILE_NAME, FALSE); - settings_show_window(hdlg, IDT_PROGRESS, FALSE); - settings_show_window(hdlg, IDC_PBAR_IMG_CREATE, FALSE); + settings_enable_window(hdlg, IDC_EDIT_HD_FILE_NAME, FALSE); + settings_show_window(hdlg, IDT_PROGRESS, FALSE); + settings_show_window(hdlg, IDC_PBAR_IMG_CREATE, FALSE); - no_update = 0; - return TRUE; + no_update = 0; + return TRUE; - case WM_COMMAND: - switch (LOWORD(wParam)) { - case IDOK: - hdd_ptr->bus = settings_get_cur_sel(hdlg, IDC_COMBO_HD_BUS) + 1; + case WM_COMMAND: + switch (LOWORD(wParam)) { + case IDOK: + hdd_ptr->bus = settings_get_cur_sel(hdlg, IDC_COMBO_HD_BUS) + 1; - /* Make sure no file name is allowed with removable SCSI hard disks. */ - if (wcslen(hd_file_name) == 0) { - hdd_ptr->bus = HDD_BUS_DISABLED; - settings_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2130, (wchar_t *) IDS_4112); - return TRUE; - } + /* Make sure no file name is allowed with removable SCSI hard disks. */ + if (wcslen(hd_file_name) == 0) { + hdd_ptr->bus = HDD_BUS_DISABLED; + settings_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2130, (wchar_t *) IDS_4112); + return TRUE; + } - get_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, &(hdd_ptr->spt)); - get_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, &(hdd_ptr->hpc)); - get_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, &(hdd_ptr->tracks)); - spt = hdd_ptr->spt; - hpc = hdd_ptr->hpc; - tracks = hdd_ptr->tracks; + get_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, &(hdd_ptr->spt)); + get_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, &(hdd_ptr->hpc)); + get_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, &(hdd_ptr->tracks)); + spt = hdd_ptr->spt; + hpc = hdd_ptr->hpc; + tracks = hdd_ptr->tracks; - switch(hdd_ptr->bus) { - case HDD_BUS_MFM: - hdd_ptr->mfm_channel = settings_get_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL); - break; - case HDD_BUS_ESDI: - hdd_ptr->esdi_channel = settings_get_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL); - break; - case HDD_BUS_XTA: - hdd_ptr->xta_channel = settings_get_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL); - break; - case HDD_BUS_IDE: - case HDD_BUS_ATAPI: - hdd_ptr->ide_channel = settings_get_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL_IDE); - break; - case HDD_BUS_SCSI: - hdd_ptr->scsi_id = settings_get_cur_sel(hdlg, IDC_COMBO_HD_ID); - break; - } + switch (hdd_ptr->bus) { + case HDD_BUS_MFM: + hdd_ptr->mfm_channel = settings_get_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL); + break; + case HDD_BUS_ESDI: + hdd_ptr->esdi_channel = settings_get_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL); + break; + case HDD_BUS_XTA: + hdd_ptr->xta_channel = settings_get_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL); + break; + case HDD_BUS_IDE: + case HDD_BUS_ATAPI: + hdd_ptr->ide_channel = settings_get_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL_IDE); + break; + case HDD_BUS_SCSI: + hdd_ptr->scsi_id = settings_get_cur_sel(hdlg, IDC_COMBO_HD_ID); + break; + } - memset(hdd_ptr->fn, 0, sizeof(hdd_ptr->fn)); - c16stombs(hdd_ptr->fn, hd_file_name, sizeof(hdd_ptr->fn)); - strcpy(hd_file_name_multibyte, hdd_ptr->fn); + memset(hdd_ptr->fn, 0, sizeof(hdd_ptr->fn)); + c16stombs(hdd_ptr->fn, hd_file_name, sizeof(hdd_ptr->fn)); + strcpy(hd_file_name_multibyte, hdd_ptr->fn); - sector_size = 512; + sector_size = 512; - if (!(existing & 1) && (wcslen(hd_file_name) > 0)) { - if (size > 0x1FFFFFFE00ll) { - settings_msgbox_header(MBX_ERROR, (wchar_t *) IDS_4116, (wchar_t *) IDS_4105); - return TRUE; - } + if (!(existing & 1) && (wcslen(hd_file_name) > 0)) { + if (size > 0x1FFFFFFE00ll) { + settings_msgbox_header(MBX_ERROR, (wchar_t *) IDS_4116, (wchar_t *) IDS_4105); + return TRUE; + } - img_format = settings_get_cur_sel(hdlg, IDC_COMBO_HD_IMG_FORMAT); - if (img_format < 3) { - f = _wfopen(hd_file_name, L"wb"); - } else { - f = (FILE *) 0; - } + img_format = settings_get_cur_sel(hdlg, IDC_COMBO_HD_IMG_FORMAT); + if (img_format < 3) { + f = _wfopen(hd_file_name, L"wb"); + } else { + f = (FILE *) 0; + } - if (img_format == 1) { /* HDI file */ - if (size >= 0x100000000ll) { - fclose(f); - settings_msgbox_header(MBX_ERROR, (wchar_t *) IDS_4116, (wchar_t *) IDS_4104); - return TRUE; - } + if (img_format == 1) { /* HDI file */ + if (size >= 0x100000000ll) { + fclose(f); + settings_msgbox_header(MBX_ERROR, (wchar_t *) IDS_4116, (wchar_t *) IDS_4104); + return TRUE; + } - fwrite(&zero, 1, 4, f); /* 00000000: Zero/unknown */ - fwrite(&zero, 1, 4, f); /* 00000004: Zero/unknown */ - fwrite(&base, 1, 4, f); /* 00000008: Offset at which data starts */ - fwrite(&size, 1, 4, f); /* 0000000C: Full size of the data (32-bit) */ - fwrite(§or_size, 1, 4, f); /* 00000010: Sector size in bytes */ - fwrite(&spt, 1, 4, f); /* 00000014: Sectors per cylinder */ - fwrite(&hpc, 1, 4, f); /* 00000018: Heads per cylinder */ - fwrite(&tracks, 1, 4, f); /* 0000001C: Cylinders */ + fwrite(&zero, 1, 4, f); /* 00000000: Zero/unknown */ + fwrite(&zero, 1, 4, f); /* 00000004: Zero/unknown */ + fwrite(&base, 1, 4, f); /* 00000008: Offset at which data starts */ + fwrite(&size, 1, 4, f); /* 0000000C: Full size of the data (32-bit) */ + fwrite(§or_size, 1, 4, f); /* 00000010: Sector size in bytes */ + fwrite(&spt, 1, 4, f); /* 00000014: Sectors per cylinder */ + fwrite(&hpc, 1, 4, f); /* 00000018: Heads per cylinder */ + fwrite(&tracks, 1, 4, f); /* 0000001C: Cylinders */ - for (i = 0; i < 0x3f8; i++) - fwrite(&zero, 1, 4, f); - } else if (img_format == 2) { /* HDX file */ - fwrite(&signature, 1, 8, f); /* 00000000: Signature */ - fwrite(&size, 1, 8, f); /* 00000008: Full size of the data (64-bit) */ - fwrite(§or_size, 1, 4, f); /* 00000010: Sector size in bytes */ - fwrite(&spt, 1, 4, f); /* 00000014: Sectors per cylinder */ - fwrite(&hpc, 1, 4, f); /* 00000018: Heads per cylinder */ - fwrite(&tracks, 1, 4, f); /* 0000001C: Cylinders */ - fwrite(&zero, 1, 4, f); /* 00000020: [Translation] Sectors per cylinder */ - fwrite(&zero, 1, 4, f); /* 00000004: [Translation] Heads per cylinder */ - } else if (img_format >= 3) { /* VHD file */ - MVHDGeom _86box_geometry; - block_size = settings_get_cur_sel(hdlg, IDC_COMBO_HD_BLOCK_SIZE) == 0 ? MVHD_BLOCK_LARGE : MVHD_BLOCK_SMALL; - switch (img_format) { - case 3: - vhd_progress_hdlg = hdlg; - _86box_geometry = create_drive_vhd_fixed(hd_file_name_multibyte, tracks, hpc, spt); - break; - case 4: - _86box_geometry = create_drive_vhd_dynamic(hd_file_name_multibyte, tracks, hpc, spt, block_size); - break; - case 5: - if (file_dlg_w(hdlg, plat_get_string(IDS_4130), L"", plat_get_string(IDS_4131), 0)) { - return TRUE; - } - _86box_geometry = create_drive_vhd_diff(hd_file_name_multibyte, openfilestring, block_size); - break; - } + for (i = 0; i < 0x3f8; i++) + fwrite(&zero, 1, 4, f); + } else if (img_format == 2) { /* HDX file */ + fwrite(&signature, 1, 8, f); /* 00000000: Signature */ + fwrite(&size, 1, 8, f); /* 00000008: Full size of the data (64-bit) */ + fwrite(§or_size, 1, 4, f); /* 00000010: Sector size in bytes */ + fwrite(&spt, 1, 4, f); /* 00000014: Sectors per cylinder */ + fwrite(&hpc, 1, 4, f); /* 00000018: Heads per cylinder */ + fwrite(&tracks, 1, 4, f); /* 0000001C: Cylinders */ + fwrite(&zero, 1, 4, f); /* 00000020: [Translation] Sectors per cylinder */ + fwrite(&zero, 1, 4, f); /* 00000004: [Translation] Heads per cylinder */ + } else if (img_format >= 3) { /* VHD file */ + MVHDGeom _86box_geometry; + block_size = settings_get_cur_sel(hdlg, IDC_COMBO_HD_BLOCK_SIZE) == 0 ? MVHD_BLOCK_LARGE : MVHD_BLOCK_SMALL; + switch (img_format) { + case 3: + vhd_progress_hdlg = hdlg; + _86box_geometry = create_drive_vhd_fixed(hd_file_name_multibyte, tracks, hpc, spt); + break; + case 4: + _86box_geometry = create_drive_vhd_dynamic(hd_file_name_multibyte, tracks, hpc, spt, block_size); + break; + case 5: + if (file_dlg_w(hdlg, plat_get_string(IDS_4130), L"", plat_get_string(IDS_4131), 0)) { + return TRUE; + } + _86box_geometry = create_drive_vhd_diff(hd_file_name_multibyte, openfilestring, block_size); + break; + } - if (img_format != 5) - settings_msgbox_header(MBX_INFO, (wchar_t *) IDS_4113, (wchar_t *) IDS_4117); + if (img_format != 5) + settings_msgbox_header(MBX_INFO, (wchar_t *) IDS_4113, (wchar_t *) IDS_4117); - hdd_ptr->tracks = _86box_geometry.cyl; - hdd_ptr->hpc = _86box_geometry.heads; - hdd_ptr->spt = _86box_geometry.spt; + hdd_ptr->tracks = _86box_geometry.cyl; + hdd_ptr->hpc = _86box_geometry.heads; + hdd_ptr->spt = _86box_geometry.spt; - hard_disk_added = 1; - EndDialog(hdlg, 0); - return TRUE; - } + hard_disk_added = 1; + EndDialog(hdlg, 0); + return TRUE; + } - big_buf = (char *) malloc(1048576); - memset(big_buf, 0, 1048576); + big_buf = (char *) malloc(1048576); + memset(big_buf, 0, 1048576); - r = size >> 20; - size &= 0xfffff; + r = size >> 20; + size &= 0xfffff; - if (size || r) { - settings_show_window(hdlg, IDT_FILE_NAME, FALSE); - settings_show_window(hdlg, IDC_EDIT_HD_FILE_NAME, FALSE); - settings_show_window(hdlg, IDC_CFILE, FALSE); - settings_show_window(hdlg, IDC_PBAR_IMG_CREATE, TRUE); - settings_enable_window(hdlg, IDT_PROGRESS, TRUE); + if (size || r) { + settings_show_window(hdlg, IDT_FILE_NAME, FALSE); + settings_show_window(hdlg, IDC_EDIT_HD_FILE_NAME, FALSE); + settings_show_window(hdlg, IDC_CFILE, FALSE); + settings_show_window(hdlg, IDC_PBAR_IMG_CREATE, TRUE); + settings_enable_window(hdlg, IDT_PROGRESS, TRUE); - h = GetDlgItem(hdlg, IDC_PBAR_IMG_CREATE); - SendMessage(h, PBM_SETRANGE32, (WPARAM) 0, (LPARAM) r); - SendMessage(h, PBM_SETPOS, (WPARAM) 0, (LPARAM) 0); - } + h = GetDlgItem(hdlg, IDC_PBAR_IMG_CREATE); + SendMessage(h, PBM_SETRANGE32, (WPARAM) 0, (LPARAM) r); + SendMessage(h, PBM_SETPOS, (WPARAM) 0, (LPARAM) 0); + } - h = GetDlgItem(hdlg, IDC_PBAR_IMG_CREATE); + h = GetDlgItem(hdlg, IDC_PBAR_IMG_CREATE); - if (size) { - if (f) { - fwrite(big_buf, 1, size, f); - } - SendMessage(h, PBM_SETPOS, (WPARAM) 1, (LPARAM) 0); - } + if (size) { + if (f) { + fwrite(big_buf, 1, size, f); + } + SendMessage(h, PBM_SETPOS, (WPARAM) 1, (LPARAM) 0); + } - if (r) { - for (i = 0; i < r; i++) { - if (f) { - fwrite(big_buf, 1, 1048576, f); - } - SendMessage(h, PBM_SETPOS, (WPARAM) (i + 1), (LPARAM) 0); + if (r) { + for (i = 0; i < r; i++) { + if (f) { + fwrite(big_buf, 1, 1048576, f); + } + SendMessage(h, PBM_SETPOS, (WPARAM) (i + 1), (LPARAM) 0); - settings_process_messages(); - } - } + settings_process_messages(); + } + } - free(big_buf); + free(big_buf); - if (f) { - fclose(f); - } - settings_msgbox_header(MBX_INFO, (wchar_t *) IDS_4113, (wchar_t *) IDS_4117); - } + if (f) { + fclose(f); + } + settings_msgbox_header(MBX_INFO, (wchar_t *) IDS_4113, (wchar_t *) IDS_4117); + } - hard_disk_added = 1; - EndDialog(hdlg, 0); - return TRUE; + hard_disk_added = 1; + EndDialog(hdlg, 0); + return TRUE; - case IDCANCEL: - hard_disk_added = 0; - hdd_ptr->bus = HDD_BUS_DISABLED; - EndDialog(hdlg, 0); - return TRUE; + case IDCANCEL: + hard_disk_added = 0; + hdd_ptr->bus = HDD_BUS_DISABLED; + EndDialog(hdlg, 0); + return TRUE; - case IDC_CFILE: - if (!file_dlg_w(hdlg, plat_get_string(IDS_4106), L"", NULL, !(existing & 1))) { - if (!wcschr(wopenfilestring, L'.')) { - if (wcslen(wopenfilestring) && (wcslen(wopenfilestring) <= 256)) { - twcs = &wopenfilestring[wcslen(wopenfilestring)]; - twcs[0] = L'.'; - twcs[1] = L'i'; - twcs[2] = L'm'; - twcs[3] = L'g'; - } - } + case IDC_CFILE: + if (!file_dlg_w(hdlg, plat_get_string(IDS_4106), L"", NULL, !(existing & 1))) { + if (!wcschr(wopenfilestring, L'.')) { + if (wcslen(wopenfilestring) && (wcslen(wopenfilestring) <= 256)) { + twcs = &wopenfilestring[wcslen(wopenfilestring)]; + twcs[0] = L'.'; + twcs[1] = L'i'; + twcs[2] = L'm'; + twcs[3] = L'g'; + } + } - if (!(existing & 1)) { - f = _wfopen(wopenfilestring, L"rb"); - if (f != NULL) { - fclose(f); - if (settings_msgbox_ex(MBX_QUESTION_YN, (wchar_t *) IDS_4111, (wchar_t *) IDS_4118, (wchar_t *) IDS_4120, (wchar_t *) IDS_4121, NULL) != 0) /* yes */ - return FALSE; - } - } + if (!(existing & 1)) { + f = _wfopen(wopenfilestring, L"rb"); + if (f != NULL) { + fclose(f); + if (settings_msgbox_ex(MBX_QUESTION_YN, (wchar_t *) IDS_4111, (wchar_t *) IDS_4118, (wchar_t *) IDS_4120, (wchar_t *) IDS_4121, NULL) != 0) /* yes */ + return FALSE; + } + } - f = _wfopen(wopenfilestring, (existing & 1) ? L"rb" : L"wb"); - if (f == NULL) { + f = _wfopen(wopenfilestring, (existing & 1) ? L"rb" : L"wb"); + if (f == NULL) { hdd_add_file_open_error: - fclose(f); - settings_msgbox_header(MBX_ERROR, (existing & 1) ? (wchar_t *) IDS_4114 : (wchar_t *) IDS_4115, (existing & 1) ? (wchar_t *) IDS_4107 : (wchar_t *) IDS_4108); - return TRUE; - } - if (existing & 1) { - if (image_is_hdi(openfilestring) || image_is_hdx(openfilestring, 1)) { - fseeko64(f, 0x10, SEEK_SET); - fread(§or_size, 1, 4, f); - if (sector_size != 512) { - settings_msgbox_header(MBX_ERROR, (wchar_t *) IDS_4119, (wchar_t *) IDS_4109); - fclose(f); - return TRUE; - } - spt = hpc = tracks = 0; - fread(&spt, 1, 4, f); - fread(&hpc, 1, 4, f); - fread(&tracks, 1, 4, f); - } else if (image_is_vhd(openfilestring, 1)) { - fclose(f); - MVHDMeta* vhd = mvhd_open(openfilestring, 0, &vhd_error); - if (vhd == NULL) { - settings_msgbox_header(MBX_ERROR, (existing & 1) ? (wchar_t *) IDS_4114 : (wchar_t *) IDS_4115, (existing & 1) ? (wchar_t *) IDS_4107 : (wchar_t *) IDS_4108); - return TRUE; - } else if (vhd_error == MVHD_ERR_TIMESTAMP) { - if (settings_msgbox_ex(MBX_QUESTION_YN | MBX_WARNING, plat_get_string(IDS_4133), plat_get_string(IDS_4132), NULL, NULL, NULL) != 0) { - int ts_res = mvhd_diff_update_par_timestamp(vhd, &vhd_error); - if (ts_res != 0) { - settings_msgbox_header(MBX_ERROR, plat_get_string(IDS_2049), plat_get_string(IDS_4134)); - mvhd_close(vhd); - return TRUE; - } - } else { - mvhd_close(vhd); - return TRUE; - } - } + fclose(f); + settings_msgbox_header(MBX_ERROR, (existing & 1) ? (wchar_t *) IDS_4114 : (wchar_t *) IDS_4115, (existing & 1) ? (wchar_t *) IDS_4107 : (wchar_t *) IDS_4108); + return TRUE; + } + if (existing & 1) { + if (image_is_hdi(openfilestring) || image_is_hdx(openfilestring, 1)) { + fseeko64(f, 0x10, SEEK_SET); + fread(§or_size, 1, 4, f); + if (sector_size != 512) { + settings_msgbox_header(MBX_ERROR, (wchar_t *) IDS_4119, (wchar_t *) IDS_4109); + fclose(f); + return TRUE; + } + spt = hpc = tracks = 0; + fread(&spt, 1, 4, f); + fread(&hpc, 1, 4, f); + fread(&tracks, 1, 4, f); + } else if (image_is_vhd(openfilestring, 1)) { + fclose(f); + MVHDMeta *vhd = mvhd_open(openfilestring, 0, &vhd_error); + if (vhd == NULL) { + settings_msgbox_header(MBX_ERROR, (existing & 1) ? (wchar_t *) IDS_4114 : (wchar_t *) IDS_4115, (existing & 1) ? (wchar_t *) IDS_4107 : (wchar_t *) IDS_4108); + return TRUE; + } else if (vhd_error == MVHD_ERR_TIMESTAMP) { + if (settings_msgbox_ex(MBX_QUESTION_YN | MBX_WARNING, plat_get_string(IDS_4133), plat_get_string(IDS_4132), NULL, NULL, NULL) != 0) { + int ts_res = mvhd_diff_update_par_timestamp(vhd, &vhd_error); + if (ts_res != 0) { + settings_msgbox_header(MBX_ERROR, plat_get_string(IDS_2049), plat_get_string(IDS_4134)); + mvhd_close(vhd); + return TRUE; + } + } else { + mvhd_close(vhd); + return TRUE; + } + } - MVHDGeom vhd_geom = mvhd_get_geometry(vhd); - adjust_vhd_geometry_for_86box(&vhd_geom); - tracks = vhd_geom.cyl; - hpc = vhd_geom.heads; - spt = vhd_geom.spt; - size = (uint64_t)tracks * hpc * spt * 512; - mvhd_close(vhd); - } else { - fseeko64(f, 0, SEEK_END); - size = ftello64(f); - if (((size % 17) == 0) && (size <= 142606336)) { - spt = 17; - if (size <= 26738688) - hpc = 4; - else if (((size % 3072) == 0) && (size <= 53477376)) - hpc = 6; - else { - for (i = 5; i < 16; i++) { - if (((size % (i << 9)) == 0) && (size <= ((i * 17) << 19))) - break; - if (i == 5) - i++; - } - hpc = i; - } - } else { - spt = 63; - hpc = 16; - } + MVHDGeom vhd_geom = mvhd_get_geometry(vhd); + adjust_vhd_geometry_for_86box(&vhd_geom); + tracks = vhd_geom.cyl; + hpc = vhd_geom.heads; + spt = vhd_geom.spt; + size = (uint64_t) tracks * hpc * spt * 512; + mvhd_close(vhd); + } else { + fseeko64(f, 0, SEEK_END); + size = ftello64(f); + if (((size % 17) == 0) && (size <= 142606336)) { + spt = 17; + if (size <= 26738688) + hpc = 4; + else if (((size % 3072) == 0) && (size <= 53477376)) + hpc = 6; + else { + for (i = 5; i < 16; i++) { + if (((size % (i << 9)) == 0) && (size <= ((i * 17) << 19))) + break; + if (i == 5) + i++; + } + hpc = i; + } + } else { + spt = 63; + hpc = 16; + } - tracks = ((size >> 9) / hpc) / spt; - } + tracks = ((size >> 9) / hpc) / spt; + } - if ((spt > max_spt) || (hpc > max_hpc) || (tracks > max_tracks)) - goto hdd_add_file_open_error; - no_update = 1; + if ((spt > max_spt) || (hpc > max_hpc) || (tracks > max_tracks)) + goto hdd_add_file_open_error; + no_update = 1; - set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, spt); - set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, hpc); - set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, tracks); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, size >> 20); - recalc_selection(hdlg); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, spt); + set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, hpc); + set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, tracks); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, size >> 20); + recalc_selection(hdlg); - settings_enable_window(hdlg, IDC_EDIT_HD_SPT, TRUE); - settings_enable_window(hdlg, IDC_EDIT_HD_HPC, TRUE); - settings_enable_window(hdlg, IDC_EDIT_HD_CYL, TRUE); - settings_enable_window(hdlg, IDC_EDIT_HD_SIZE, TRUE); - settings_enable_window(hdlg, IDC_COMBO_HD_TYPE, TRUE); + settings_enable_window(hdlg, IDC_EDIT_HD_SPT, TRUE); + settings_enable_window(hdlg, IDC_EDIT_HD_HPC, TRUE); + settings_enable_window(hdlg, IDC_EDIT_HD_CYL, TRUE); + settings_enable_window(hdlg, IDC_EDIT_HD_SIZE, TRUE); + settings_enable_window(hdlg, IDC_COMBO_HD_TYPE, TRUE); - chs_enabled = 1; + chs_enabled = 1; - no_update = 0; - } + no_update = 0; + } - fclose(f); - } + fclose(f); + } - h = GetDlgItem(hdlg, IDC_EDIT_HD_FILE_NAME); - SendMessage(h, WM_SETTEXT, 0, (LPARAM) wopenfilestring); - memset(hd_file_name, 0, sizeof(hd_file_name)); - wcscpy(hd_file_name, wopenfilestring); + h = GetDlgItem(hdlg, IDC_EDIT_HD_FILE_NAME); + SendMessage(h, WM_SETTEXT, 0, (LPARAM) wopenfilestring); + memset(hd_file_name, 0, sizeof(hd_file_name)); + wcscpy(hd_file_name, wopenfilestring); - return TRUE; + return TRUE; - case IDC_EDIT_HD_CYL: - if (no_update) - return FALSE; + case IDC_EDIT_HD_CYL: + if (no_update) + return FALSE; - no_update = 1; - get_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, &temp); - if (tracks != (int64_t) temp) { - tracks = temp; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - recalc_selection(hdlg); - } + no_update = 1; + get_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, &temp); + if (tracks != (int64_t) temp) { + tracks = temp; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + recalc_selection(hdlg); + } - if (tracks > max_tracks) { - tracks = max_tracks; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, (uint32_t) tracks); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - recalc_selection(hdlg); - } + if (tracks > max_tracks) { + tracks = max_tracks; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, (uint32_t) tracks); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + recalc_selection(hdlg); + } - no_update = 0; - break; + no_update = 0; + break; - case IDC_EDIT_HD_HPC: - if (no_update) - return FALSE; + case IDC_EDIT_HD_HPC: + if (no_update) + return FALSE; - no_update = 1; - get_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, &temp); - if (hpc != (int64_t) temp) { - hpc = temp; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - recalc_selection(hdlg); - } + no_update = 1; + get_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, &temp); + if (hpc != (int64_t) temp) { + hpc = temp; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + recalc_selection(hdlg); + } - if (hpc > max_hpc) { - hpc = max_hpc; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, (uint32_t) hpc); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - recalc_selection(hdlg); - } + if (hpc > max_hpc) { + hpc = max_hpc; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, (uint32_t) hpc); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + recalc_selection(hdlg); + } - no_update = 0; - break; + no_update = 0; + break; - case IDC_EDIT_HD_SPT: - if (no_update) - return FALSE; + case IDC_EDIT_HD_SPT: + if (no_update) + return FALSE; - no_update = 1; - get_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, &temp); - if (spt != (int64_t) temp) { - spt = temp; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - recalc_selection(hdlg); - } + no_update = 1; + get_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, &temp); + if (spt != (int64_t) temp) { + spt = temp; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + recalc_selection(hdlg); + } - if (spt > max_spt) { - spt = max_spt; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, spt); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - recalc_selection(hdlg); - } + if (spt > max_spt) { + spt = max_spt; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, spt); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + recalc_selection(hdlg); + } - no_update = 0; - break; + no_update = 0; + break; - case IDC_EDIT_HD_SIZE: - if (no_update) - return FALSE; + case IDC_EDIT_HD_SIZE: + if (no_update) + return FALSE; - no_update = 1; - get_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, &temp); - if (temp != (uint32_t) (size >> 20)) { - size = ((uint64_t) temp) << 20LL; - /* This is needed to ensure VHD standard compliance. */ - hdd_image_calc_chs((uint32_t *) &tracks, (uint32_t *) &hpc, (uint32_t *) &spt, temp); - set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, (uint32_t) tracks); - set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, (uint32_t) hpc); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, (uint32_t) spt); - recalc_selection(hdlg); - } + no_update = 1; + get_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, &temp); + if (temp != (uint32_t) (size >> 20)) { + size = ((uint64_t) temp) << 20LL; + /* This is needed to ensure VHD standard compliance. */ + hdd_image_calc_chs((uint32_t *) &tracks, (uint32_t *) &hpc, (uint32_t *) &spt, temp); + set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, (uint32_t) tracks); + set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, (uint32_t) hpc); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, (uint32_t) spt); + recalc_selection(hdlg); + } - if (tracks > max_tracks) { - tracks = max_tracks; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, (uint32_t) tracks); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - recalc_selection(hdlg); - } + if (tracks > max_tracks) { + tracks = max_tracks; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, (uint32_t) tracks); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + recalc_selection(hdlg); + } - if (hpc > max_hpc) { - hpc = max_hpc; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, (uint32_t) hpc); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - recalc_selection(hdlg); - } + if (hpc > max_hpc) { + hpc = max_hpc; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, (uint32_t) hpc); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + recalc_selection(hdlg); + } - if (spt > max_spt) { - spt = max_spt; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, (uint32_t) spt); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - recalc_selection(hdlg); - } + if (spt > max_spt) { + spt = max_spt; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, (uint32_t) spt); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + recalc_selection(hdlg); + } - no_update = 0; - break; + no_update = 0; + break; - case IDC_COMBO_HD_TYPE: - if (no_update) - return FALSE; + case IDC_COMBO_HD_TYPE: + if (no_update) + return FALSE; - no_update = 1; - temp = settings_get_cur_sel(hdlg, IDC_COMBO_HD_TYPE); - if ((temp != selection) && (temp != 127) && (temp != 128)) { - selection = temp; - tracks = hdd_table[selection][0]; - hpc = hdd_table[selection][1]; - spt = hdd_table[selection][2]; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, (uint32_t) tracks); - set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, (uint32_t) hpc); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, (uint32_t) spt); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - } else if ((temp != selection) && (temp == 127)) - selection = temp; - else if ((temp != selection) && (temp == 128)) { - selection = temp; - hpc = 16; - spt = 63; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, (uint32_t) hpc); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, (uint32_t) spt); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - } + no_update = 1; + temp = settings_get_cur_sel(hdlg, IDC_COMBO_HD_TYPE); + if ((temp != selection) && (temp != 127) && (temp != 128)) { + selection = temp; + tracks = hdd_table[selection][0]; + hpc = hdd_table[selection][1]; + spt = hdd_table[selection][2]; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, (uint32_t) tracks); + set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, (uint32_t) hpc); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, (uint32_t) spt); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + } else if ((temp != selection) && (temp == 127)) + selection = temp; + else if ((temp != selection) && (temp == 128)) { + selection = temp; + hpc = 16; + spt = 63; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, (uint32_t) hpc); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, (uint32_t) spt); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + } - if (spt > max_spt) { - spt = max_spt; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, (uint32_t) spt); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - recalc_selection(hdlg); - } + if (spt > max_spt) { + spt = max_spt; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, (uint32_t) spt); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + recalc_selection(hdlg); + } - if (hpc > max_hpc) { - hpc = max_hpc; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, (uint32_t) hpc); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - recalc_selection(hdlg); - } + if (hpc > max_hpc) { + hpc = max_hpc; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, (uint32_t) hpc); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + recalc_selection(hdlg); + } - if (tracks > max_tracks) { - tracks = max_tracks; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, (uint32_t) tracks); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - recalc_selection(hdlg); - } + if (tracks > max_tracks) { + tracks = max_tracks; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, (uint32_t) tracks); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + recalc_selection(hdlg); + } - no_update = 0; - break; + no_update = 0; + break; - case IDC_COMBO_HD_BUS: - if (no_update) - return FALSE; + case IDC_COMBO_HD_BUS: + if (no_update) + return FALSE; - no_update = 1; - recalc_location_controls(hdlg, 1, 0); - b = settings_get_cur_sel(hdlg, IDC_COMBO_HD_BUS) + 1; - if (b != hdd_ptr->bus) { - hdd_ptr->bus = b; + no_update = 1; + recalc_location_controls(hdlg, 1, 0); + b = settings_get_cur_sel(hdlg, IDC_COMBO_HD_BUS) + 1; + if (b != hdd_ptr->bus) { + hdd_ptr->bus = b; - switch(hdd_ptr->bus) { - case HDD_BUS_DISABLED: - default: - max_spt = max_hpc = max_tracks = 0; - break; - case HDD_BUS_MFM: - max_spt = 26; /* 17 for MFM, 26 for RLL. */ - max_hpc = 15; - max_tracks = 2047; - break; - case HDD_BUS_XTA: - max_spt = 63; - max_hpc = 16; - max_tracks = 1023; - break; - case HDD_BUS_ESDI: - max_spt = 99; /* ESDI drives usually had 32 to 43 sectors per track. */ - max_hpc = 16; - max_tracks = 266305; - break; - case HDD_BUS_IDE: - max_spt = 63; - max_hpc = 255; - max_tracks = 266305; - break; - case HDD_BUS_ATAPI: - case HDD_BUS_SCSI: - max_spt = 99; - max_hpc = 255; - max_tracks = 266305; - break; - } + switch (hdd_ptr->bus) { + case HDD_BUS_DISABLED: + default: + max_spt = max_hpc = max_tracks = 0; + break; + case HDD_BUS_MFM: + max_spt = 26; /* 17 for MFM, 26 for RLL. */ + max_hpc = 15; + max_tracks = 2047; + break; + case HDD_BUS_XTA: + max_spt = 63; + max_hpc = 16; + max_tracks = 1023; + break; + case HDD_BUS_ESDI: + max_spt = 99; /* ESDI drives usually had 32 to 43 sectors per track. */ + max_hpc = 16; + max_tracks = 266305; + break; + case HDD_BUS_IDE: + max_spt = 63; + max_hpc = 255; + max_tracks = 266305; + break; + case HDD_BUS_ATAPI: + case HDD_BUS_SCSI: + max_spt = 99; + max_hpc = 255; + max_tracks = 266305; + break; + } - if (!chs_enabled) { - settings_enable_window(hdlg, IDC_EDIT_HD_SPT, FALSE); - settings_enable_window(hdlg, IDC_EDIT_HD_HPC, FALSE); - settings_enable_window(hdlg, IDC_EDIT_HD_CYL, FALSE); - settings_enable_window(hdlg, IDC_EDIT_HD_SIZE, FALSE); - settings_enable_window(hdlg, IDC_COMBO_HD_TYPE, FALSE); - } + if (!chs_enabled) { + settings_enable_window(hdlg, IDC_EDIT_HD_SPT, FALSE); + settings_enable_window(hdlg, IDC_EDIT_HD_HPC, FALSE); + settings_enable_window(hdlg, IDC_EDIT_HD_CYL, FALSE); + settings_enable_window(hdlg, IDC_EDIT_HD_SIZE, FALSE); + settings_enable_window(hdlg, IDC_COMBO_HD_TYPE, FALSE); + } - if (spt > max_spt) { - spt = max_spt; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, (uint32_t) spt); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - recalc_selection(hdlg); - } + if (spt > max_spt) { + spt = max_spt; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, (uint32_t) spt); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + recalc_selection(hdlg); + } - if (hpc > max_hpc) { - hpc = max_hpc; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, (uint32_t) hpc); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - recalc_selection(hdlg); - } + if (hpc > max_hpc) { + hpc = max_hpc; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, (uint32_t) hpc); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + recalc_selection(hdlg); + } - if (tracks > max_tracks) { - tracks = max_tracks; - size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; - set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, (uint32_t) tracks); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); - recalc_selection(hdlg); - } - } + if (tracks > max_tracks) { + tracks = max_tracks; + size = ((uint64_t) tracks * (uint64_t) hpc * (uint64_t) spt) << 9LL; + set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, (uint32_t) tracks); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) (size >> 20)); + recalc_selection(hdlg); + } + } - no_update = 0; - break; - case IDC_COMBO_HD_IMG_FORMAT: - img_format = settings_get_cur_sel(hdlg, IDC_COMBO_HD_IMG_FORMAT); + no_update = 0; + break; + case IDC_COMBO_HD_IMG_FORMAT: + img_format = settings_get_cur_sel(hdlg, IDC_COMBO_HD_IMG_FORMAT); - no_update = 1; - if (img_format == 5) { /* They switched to a diff VHD; disable the geometry fields. */ - settings_enable_window(hdlg, IDC_EDIT_HD_SPT, FALSE); - set_edit_box_text_contents(hdlg, IDC_EDIT_HD_SPT, L"(N/A)"); - settings_enable_window(hdlg, IDC_EDIT_HD_HPC, FALSE); - set_edit_box_text_contents(hdlg, IDC_EDIT_HD_HPC, L"(N/A)"); - settings_enable_window(hdlg, IDC_EDIT_HD_CYL, FALSE); - set_edit_box_text_contents(hdlg, IDC_EDIT_HD_CYL, L"(N/A)"); - settings_enable_window(hdlg, IDC_EDIT_HD_SIZE, FALSE); - set_edit_box_text_contents(hdlg, IDC_EDIT_HD_SIZE, L"(N/A)"); - settings_enable_window(hdlg, IDC_COMBO_HD_TYPE, FALSE); - settings_reset_content(hdlg, IDC_COMBO_HD_TYPE); - settings_add_string(hdlg, IDC_COMBO_HD_TYPE, (LPARAM) L"(use parent)"); - settings_set_cur_sel(hdlg, IDC_COMBO_HD_TYPE, 0); - } else { - get_edit_box_text_contents(hdlg, IDC_EDIT_HD_SPT, text_buf, 256); - if (!wcscmp(text_buf, L"(N/A)")) { - settings_enable_window(hdlg, IDC_EDIT_HD_SPT, TRUE); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, 17); - spt = 17; - settings_enable_window(hdlg, IDC_EDIT_HD_HPC, TRUE); - set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, 15); - hpc = 15; - settings_enable_window(hdlg, IDC_EDIT_HD_CYL, TRUE); - set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, 1023); - tracks = 1023; - settings_enable_window(hdlg, IDC_EDIT_HD_SIZE, TRUE); - set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) ((uint64_t)17 * 15 * 1023 * 512 >> 20)); - size = (uint64_t)17 * 15 * 1023 * 512; + no_update = 1; + if (img_format == 5) { /* They switched to a diff VHD; disable the geometry fields. */ + settings_enable_window(hdlg, IDC_EDIT_HD_SPT, FALSE); + set_edit_box_text_contents(hdlg, IDC_EDIT_HD_SPT, L"(N/A)"); + settings_enable_window(hdlg, IDC_EDIT_HD_HPC, FALSE); + set_edit_box_text_contents(hdlg, IDC_EDIT_HD_HPC, L"(N/A)"); + settings_enable_window(hdlg, IDC_EDIT_HD_CYL, FALSE); + set_edit_box_text_contents(hdlg, IDC_EDIT_HD_CYL, L"(N/A)"); + settings_enable_window(hdlg, IDC_EDIT_HD_SIZE, FALSE); + set_edit_box_text_contents(hdlg, IDC_EDIT_HD_SIZE, L"(N/A)"); + settings_enable_window(hdlg, IDC_COMBO_HD_TYPE, FALSE); + settings_reset_content(hdlg, IDC_COMBO_HD_TYPE); + settings_add_string(hdlg, IDC_COMBO_HD_TYPE, (LPARAM) L"(use parent)"); + settings_set_cur_sel(hdlg, IDC_COMBO_HD_TYPE, 0); + } else { + get_edit_box_text_contents(hdlg, IDC_EDIT_HD_SPT, text_buf, 256); + if (!wcscmp(text_buf, L"(N/A)")) { + settings_enable_window(hdlg, IDC_EDIT_HD_SPT, TRUE); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SPT, 17); + spt = 17; + settings_enable_window(hdlg, IDC_EDIT_HD_HPC, TRUE); + set_edit_box_contents(hdlg, IDC_EDIT_HD_HPC, 15); + hpc = 15; + settings_enable_window(hdlg, IDC_EDIT_HD_CYL, TRUE); + set_edit_box_contents(hdlg, IDC_EDIT_HD_CYL, 1023); + tracks = 1023; + settings_enable_window(hdlg, IDC_EDIT_HD_SIZE, TRUE); + set_edit_box_contents(hdlg, IDC_EDIT_HD_SIZE, (uint32_t) ((uint64_t) 17 * 15 * 1023 * 512 >> 20)); + size = (uint64_t) 17 * 15 * 1023 * 512; - settings_reset_content(hdlg, IDC_COMBO_HD_TYPE); - hdconf_initialize_hdt_combo(hdlg); - settings_enable_window(hdlg, IDC_COMBO_HD_TYPE, TRUE); - } - } - no_update = 0; + settings_reset_content(hdlg, IDC_COMBO_HD_TYPE); + hdconf_initialize_hdt_combo(hdlg); + settings_enable_window(hdlg, IDC_COMBO_HD_TYPE, TRUE); + } + } + no_update = 0; - if (img_format == 4 || img_format == 5) { /* For dynamic and diff VHDs, show the block size dropdown. */ - settings_show_window(hdlg, IDC_COMBO_HD_BLOCK_SIZE, TRUE); - settings_show_window(hdlg, IDT_BLOCK_SIZE, TRUE); - } else { /* Hide it otherwise. */ - settings_show_window(hdlg, IDC_COMBO_HD_BLOCK_SIZE, FALSE); - settings_show_window(hdlg, IDT_BLOCK_SIZE, FALSE); - } - break; - } + if (img_format == 4 || img_format == 5) { /* For dynamic and diff VHDs, show the block size dropdown. */ + settings_show_window(hdlg, IDC_COMBO_HD_BLOCK_SIZE, TRUE); + settings_show_window(hdlg, IDT_BLOCK_SIZE, TRUE); + } else { /* Hide it otherwise. */ + settings_show_window(hdlg, IDC_COMBO_HD_BLOCK_SIZE, FALSE); + settings_show_window(hdlg, IDT_BLOCK_SIZE, FALSE); + } + break; + } - return FALSE; - } + return FALSE; + } - return FALSE; + return FALSE; } - int hard_disk_was_added(void) { return hard_disk_added; } - void hard_disk_add_open(HWND hwnd, int is_existing) { - existing = is_existing; + existing = is_existing; hard_disk_added = 0; - DialogBox(hinstance, (LPCWSTR)DLG_CFG_HARD_DISKS_ADD, hwnd, win_settings_hard_disks_add_proc); + DialogBox(hinstance, (LPCWSTR) DLG_CFG_HARD_DISKS_ADD, hwnd, win_settings_hard_disks_add_proc); } - static void hard_disk_track(uint8_t id) { - switch(temp_hdd[id].bus) { - case HDD_BUS_MFM: - mfm_tracking |= (1 << (temp_hdd[id].mfm_channel << 3)); - break; - case HDD_BUS_ESDI: - esdi_tracking |= (1 << (temp_hdd[id].esdi_channel << 3)); - break; - case HDD_BUS_XTA: - xta_tracking |= (1 << (temp_hdd[id].xta_channel << 3)); - break; - case HDD_BUS_IDE: - case HDD_BUS_ATAPI: - ide_tracking |= (1 << (temp_hdd[id].ide_channel << 3)); - break; - case HDD_BUS_SCSI: - scsi_tracking[temp_hdd[id].scsi_id >> 3] |= (1 << ((temp_hdd[id].scsi_id & 0x07) << 3)); - break; + switch (temp_hdd[id].bus) { + case HDD_BUS_MFM: + mfm_tracking |= (1 << (temp_hdd[id].mfm_channel << 3)); + break; + case HDD_BUS_ESDI: + esdi_tracking |= (1 << (temp_hdd[id].esdi_channel << 3)); + break; + case HDD_BUS_XTA: + xta_tracking |= (1 << (temp_hdd[id].xta_channel << 3)); + break; + case HDD_BUS_IDE: + case HDD_BUS_ATAPI: + ide_tracking |= (1 << (temp_hdd[id].ide_channel << 3)); + break; + case HDD_BUS_SCSI: + scsi_tracking[temp_hdd[id].scsi_id >> 3] |= (1 << ((temp_hdd[id].scsi_id & 0x07) << 3)); + break; } } - static void hard_disk_untrack(uint8_t id) { - switch(temp_hdd[id].bus) { - case HDD_BUS_MFM: - mfm_tracking &= ~(1 << (temp_hdd[id].mfm_channel << 3)); - break; - case HDD_BUS_ESDI: - esdi_tracking &= ~(1 << (temp_hdd[id].esdi_channel << 3)); - break; - case HDD_BUS_XTA: - xta_tracking &= ~(1 << (temp_hdd[id].xta_channel << 3)); - break; - case HDD_BUS_IDE: - case HDD_BUS_ATAPI: - ide_tracking &= ~(1 << (temp_hdd[id].ide_channel << 3)); - break; - case HDD_BUS_SCSI: - scsi_tracking[temp_hdd[id].scsi_id >> 3] &= ~(1 << ((temp_hdd[id].scsi_id & 0x07) << 3)); - break; + switch (temp_hdd[id].bus) { + case HDD_BUS_MFM: + mfm_tracking &= ~(1 << (temp_hdd[id].mfm_channel << 3)); + break; + case HDD_BUS_ESDI: + esdi_tracking &= ~(1 << (temp_hdd[id].esdi_channel << 3)); + break; + case HDD_BUS_XTA: + xta_tracking &= ~(1 << (temp_hdd[id].xta_channel << 3)); + break; + case HDD_BUS_IDE: + case HDD_BUS_ATAPI: + ide_tracking &= ~(1 << (temp_hdd[id].ide_channel << 3)); + break; + case HDD_BUS_SCSI: + scsi_tracking[temp_hdd[id].scsi_id >> 3] &= ~(1 << ((temp_hdd[id].scsi_id & 0x07) << 3)); + break; } } - static void hard_disk_track_all(void) { int i; for (i = 0; i < HDD_NUM; i++) - hard_disk_track(i); + hard_disk_track(i); } - #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK #else @@ -3454,435 +3398,425 @@ static BOOL CALLBACK #endif win_settings_hard_disks_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { - int old_sel = 0, b = 0, assign = 0; + int old_sel = 0, b = 0, assign = 0; const uint8_t hd_icons[2] = { 80, 0 }; switch (message) { - case WM_INITDIALOG: - ignore_change = 1; + case WM_INITDIALOG: + ignore_change = 1; - normalize_hd_list(); /* Normalize the hard disks so that non-disabled hard disks start from index 0, and so they are contiguous. - This will cause an emulator reset prompt on the first opening of this category with a messy hard disk list - (which can only happen by manually editing the configuration file). */ - win_settings_hard_disks_init_columns(hdlg); - image_list_init(hdlg, IDC_LIST_HARD_DISKS, (const uint8_t *) hd_icons); - win_settings_hard_disks_recalc_list(hdlg); - recalc_next_free_id(hdlg); - add_locations(hdlg); - if (hd_listview_items > 0) { - settings_listview_select(hdlg, IDC_LIST_HARD_DISKS, 0); - lv1_current_sel = 0; - settings_set_cur_sel(hdlg, IDC_COMBO_HD_BUS, temp_hdd[0].bus - 1); - } else - lv1_current_sel = -1; - recalc_location_controls(hdlg, 0, 0); + normalize_hd_list(); /* Normalize the hard disks so that non-disabled hard disks start from index 0, and so they are contiguous. + This will cause an emulator reset prompt on the first opening of this category with a messy hard disk list + (which can only happen by manually editing the configuration file). */ + win_settings_hard_disks_init_columns(hdlg); + image_list_init(hdlg, IDC_LIST_HARD_DISKS, (const uint8_t *) hd_icons); + win_settings_hard_disks_recalc_list(hdlg); + recalc_next_free_id(hdlg); + add_locations(hdlg); + if (hd_listview_items > 0) { + settings_listview_select(hdlg, IDC_LIST_HARD_DISKS, 0); + lv1_current_sel = 0; + settings_set_cur_sel(hdlg, IDC_COMBO_HD_BUS, temp_hdd[0].bus - 1); + } else + lv1_current_sel = -1; + recalc_location_controls(hdlg, 0, 0); - settings_listview_enable_styles(hdlg, IDC_LIST_HARD_DISKS); + settings_listview_enable_styles(hdlg, IDC_LIST_HARD_DISKS); - ignore_change = 0; - return TRUE; + ignore_change = 0; + return TRUE; - case WM_NOTIFY: - if ((hd_listview_items == 0) || ignore_change) - return FALSE; + case WM_NOTIFY: + if ((hd_listview_items == 0) || ignore_change) + return FALSE; - if ((((LPNMHDR)lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR)lParam)->idFrom == IDC_LIST_HARD_DISKS)) { - old_sel = lv1_current_sel; - lv1_current_sel = get_selected_hard_disk(hdlg); - if (lv1_current_sel == old_sel) - return FALSE; - ignore_change = 1; - settings_set_cur_sel(hdlg, IDC_COMBO_HD_BUS, temp_hdd[lv1_current_sel].bus - 1); - recalc_location_controls(hdlg, 0, 0); - ignore_change = 0; - } - break; + if ((((LPNMHDR) lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR) lParam)->idFrom == IDC_LIST_HARD_DISKS)) { + old_sel = lv1_current_sel; + lv1_current_sel = get_selected_hard_disk(hdlg); + if (lv1_current_sel == old_sel) + return FALSE; + ignore_change = 1; + settings_set_cur_sel(hdlg, IDC_COMBO_HD_BUS, temp_hdd[lv1_current_sel].bus - 1); + recalc_location_controls(hdlg, 0, 0); + ignore_change = 0; + } + break; - case WM_COMMAND: - if (ignore_change && (LOWORD(wParam) != IDC_BUTTON_HDD_ADD) && - (LOWORD(wParam) != IDC_BUTTON_HDD_ADD_NEW) && (LOWORD(wParam) != IDC_BUTTON_HDD_REMOVE)) - return FALSE; - switch (LOWORD(wParam)) { - case IDC_COMBO_HD_BUS: - ignore_change = 1; - b = settings_get_cur_sel(hdlg, IDC_COMBO_HD_BUS) + 1; - if (b != temp_hdd[lv1_current_sel].bus) { - hard_disk_untrack(lv1_current_sel); - assign = (temp_hdd[lv1_current_sel].bus == b) ? 0 : 1; - temp_hdd[lv1_current_sel].bus = b; - recalc_location_controls(hdlg, 0, assign); - hard_disk_track(lv1_current_sel); - win_settings_hard_disks_update_item(hdlg, lv1_current_sel, 0); - } - ignore_change = 0; - return FALSE; + case WM_COMMAND: + if (ignore_change && (LOWORD(wParam) != IDC_BUTTON_HDD_ADD) && (LOWORD(wParam) != IDC_BUTTON_HDD_ADD_NEW) && (LOWORD(wParam) != IDC_BUTTON_HDD_REMOVE)) + return FALSE; + switch (LOWORD(wParam)) { + case IDC_COMBO_HD_BUS: + ignore_change = 1; + b = settings_get_cur_sel(hdlg, IDC_COMBO_HD_BUS) + 1; + if (b != temp_hdd[lv1_current_sel].bus) { + hard_disk_untrack(lv1_current_sel); + assign = (temp_hdd[lv1_current_sel].bus == b) ? 0 : 1; + temp_hdd[lv1_current_sel].bus = b; + recalc_location_controls(hdlg, 0, assign); + hard_disk_track(lv1_current_sel); + win_settings_hard_disks_update_item(hdlg, lv1_current_sel, 0); + } + ignore_change = 0; + return FALSE; - case IDC_COMBO_HD_CHANNEL: - ignore_change = 1; - hard_disk_untrack(lv1_current_sel); - temp_hdd[lv1_current_sel].channel = settings_get_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL); - hard_disk_track(lv1_current_sel); - win_settings_hard_disks_update_item(hdlg, lv1_current_sel, 0); - ignore_change = 0; - return FALSE; + case IDC_COMBO_HD_CHANNEL: + ignore_change = 1; + hard_disk_untrack(lv1_current_sel); + temp_hdd[lv1_current_sel].channel = settings_get_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL); + hard_disk_track(lv1_current_sel); + win_settings_hard_disks_update_item(hdlg, lv1_current_sel, 0); + ignore_change = 0; + return FALSE; - case IDC_COMBO_HD_CHANNEL_IDE: - ignore_change = 1; - hard_disk_untrack(lv1_current_sel); - temp_hdd[lv1_current_sel].ide_channel = settings_get_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL_IDE); - hard_disk_track(lv1_current_sel); - win_settings_hard_disks_update_item(hdlg, lv1_current_sel, 0); - ignore_change = 0; - return FALSE; + case IDC_COMBO_HD_CHANNEL_IDE: + ignore_change = 1; + hard_disk_untrack(lv1_current_sel); + temp_hdd[lv1_current_sel].ide_channel = settings_get_cur_sel(hdlg, IDC_COMBO_HD_CHANNEL_IDE); + hard_disk_track(lv1_current_sel); + win_settings_hard_disks_update_item(hdlg, lv1_current_sel, 0); + ignore_change = 0; + return FALSE; - case IDC_COMBO_HD_ID: - ignore_change = 1; - hard_disk_untrack(lv1_current_sel); - temp_hdd[lv1_current_sel].scsi_id = settings_get_cur_sel(hdlg, IDC_COMBO_HD_ID); - hard_disk_track(lv1_current_sel); - win_settings_hard_disks_update_item(hdlg, lv1_current_sel, 0); - ignore_change = 0; - return FALSE; + case IDC_COMBO_HD_ID: + ignore_change = 1; + hard_disk_untrack(lv1_current_sel); + temp_hdd[lv1_current_sel].scsi_id = settings_get_cur_sel(hdlg, IDC_COMBO_HD_ID); + hard_disk_track(lv1_current_sel); + win_settings_hard_disks_update_item(hdlg, lv1_current_sel, 0); + ignore_change = 0; + return FALSE; - case IDC_BUTTON_HDD_ADD: - case IDC_BUTTON_HDD_ADD_NEW: - hard_disk_add_open(hdlg, (LOWORD(wParam) == IDC_BUTTON_HDD_ADD)); - if (hard_disk_added) { - ignore_change = 1; - win_settings_hard_disks_recalc_list(hdlg); - recalc_next_free_id(hdlg); - hard_disk_track_all(); - ignore_change = 0; - } - return FALSE; + case IDC_BUTTON_HDD_ADD: + case IDC_BUTTON_HDD_ADD_NEW: + hard_disk_add_open(hdlg, (LOWORD(wParam) == IDC_BUTTON_HDD_ADD)); + if (hard_disk_added) { + ignore_change = 1; + win_settings_hard_disks_recalc_list(hdlg); + recalc_next_free_id(hdlg); + hard_disk_track_all(); + ignore_change = 0; + } + return FALSE; - case IDC_BUTTON_HDD_REMOVE: - temp_hdd[lv1_current_sel].fn[0] = '\0'; - hard_disk_untrack(lv1_current_sel); - temp_hdd[lv1_current_sel].bus = HDD_BUS_DISABLED; /* Only set the bus to zero, the list normalize code below will take care of turning this entire entry to a complete zero. */ - normalize_hd_list(); /* Normalize the hard disks so that non-disabled hard disks start from index 0, and so they are contiguous. */ - ignore_change = 1; - win_settings_hard_disks_recalc_list(hdlg); - recalc_next_free_id(hdlg); - if (hd_listview_items > 0) { - settings_listview_select(hdlg, IDC_LIST_HARD_DISKS, 0); - lv1_current_sel = 0; - settings_set_cur_sel(hdlg, IDC_COMBO_HD_BUS, temp_hdd[0].bus - 1); - } else - lv1_current_sel = -1; - recalc_location_controls(hdlg, 0, 0); - ignore_change = 0; - return FALSE; - } + case IDC_BUTTON_HDD_REMOVE: + temp_hdd[lv1_current_sel].fn[0] = '\0'; + hard_disk_untrack(lv1_current_sel); + temp_hdd[lv1_current_sel].bus = HDD_BUS_DISABLED; /* Only set the bus to zero, the list normalize code below will take care of turning this entire entry to a complete zero. */ + normalize_hd_list(); /* Normalize the hard disks so that non-disabled hard disks start from index 0, and so they are contiguous. */ + ignore_change = 1; + win_settings_hard_disks_recalc_list(hdlg); + recalc_next_free_id(hdlg); + if (hd_listview_items > 0) { + settings_listview_select(hdlg, IDC_LIST_HARD_DISKS, 0); + lv1_current_sel = 0; + settings_set_cur_sel(hdlg, IDC_COMBO_HD_BUS, temp_hdd[0].bus - 1); + } else + lv1_current_sel = -1; + recalc_location_controls(hdlg, 0, 0); + ignore_change = 0; + return FALSE; + } - case WM_DPICHANGED_AFTERPARENT: - win_settings_hard_disks_resize_columns(hdlg); - image_list_init(hdlg, IDC_LIST_HARD_DISKS, (const uint8_t *) hd_icons); - break; - default: - return FALSE; + case WM_DPICHANGED_AFTERPARENT: + win_settings_hard_disks_resize_columns(hdlg); + image_list_init(hdlg, IDC_LIST_HARD_DISKS, (const uint8_t *) hd_icons); + break; + default: + return FALSE; } return FALSE; } - static int combo_id_to_string_id(int combo_id) { return IDS_5376 + combo_id; } - static int combo_id_to_format_string_id(int combo_id) { return IDS_5632 + combo_id; } - static BOOL win_settings_floppy_drives_recalc_list(HWND hdlg) { LVITEM lvI; - int i = 0; - char s[256], *t; - WCHAR szText[256]; - HWND hwndList = GetDlgItem(hdlg, IDC_LIST_FLOPPY_DRIVES); + int i = 0; + char s[256], *t; + WCHAR szText[256]; + HWND hwndList = GetDlgItem(hdlg, IDC_LIST_FLOPPY_DRIVES); - lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; + lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; lvI.stateMask = lvI.state = 0; for (i = 0; i < 4; i++) { - lvI.iSubItem = 0; - if (temp_fdd_types[i] > 0) { - t = fdd_getname(temp_fdd_types[i]); - strncpy(s, t, sizeof(s) - 1); - mbstowcs(szText, s, strlen(s) + 1); - lvI.pszText = szText; - } else - lvI.pszText = plat_get_string(IDS_5376); - lvI.iItem = i; - lvI.iImage = temp_fdd_types[i]; + lvI.iSubItem = 0; + if (temp_fdd_types[i] > 0) { + t = fdd_getname(temp_fdd_types[i]); + strncpy(s, t, sizeof(s) - 1); + mbstowcs(szText, s, strlen(s) + 1); + lvI.pszText = szText; + } else + lvI.pszText = plat_get_string(IDS_5376); + lvI.iItem = i; + lvI.iImage = temp_fdd_types[i]; - if (ListView_InsertItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_InsertItem(hwndList, &lvI) == -1) + return FALSE; - lvI.iSubItem = 1; - lvI.pszText = plat_get_string(temp_fdd_turbo[i] ? IDS_2060 : IDS_2061); - lvI.iItem = i; - lvI.iImage = 0; + lvI.iSubItem = 1; + lvI.pszText = plat_get_string(temp_fdd_turbo[i] ? IDS_2060 : IDS_2061); + lvI.iItem = i; + lvI.iImage = 0; - if (ListView_SetItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_SetItem(hwndList, &lvI) == -1) + return FALSE; - lvI.iSubItem = 2; - lvI.pszText = plat_get_string(temp_fdd_check_bpb[i] ? IDS_2060 : IDS_2061); - lvI.iItem = i; - lvI.iImage = 0; + lvI.iSubItem = 2; + lvI.pszText = plat_get_string(temp_fdd_check_bpb[i] ? IDS_2060 : IDS_2061); + lvI.iItem = i; + lvI.iImage = 0; - if (ListView_SetItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_SetItem(hwndList, &lvI) == -1) + return FALSE; } return TRUE; } - static BOOL win_settings_cdrom_drives_recalc_list(HWND hdlg) { LVITEM lvI; - int i = 0, fsid = 0; - WCHAR szText[256]; - HWND hwndList = GetDlgItem(hdlg, IDC_LIST_CDROM_DRIVES); + int i = 0, fsid = 0; + WCHAR szText[256]; + HWND hwndList = GetDlgItem(hdlg, IDC_LIST_CDROM_DRIVES); - lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; + lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; lvI.stateMask = lvI.iSubItem = lvI.state = 0; for (i = 0; i < 4; i++) { - fsid = combo_id_to_format_string_id(temp_cdrom[i].bus_type); + fsid = combo_id_to_format_string_id(temp_cdrom[i].bus_type); - lvI.iSubItem = 0; - switch (temp_cdrom[i].bus_type) { - case CDROM_BUS_DISABLED: - default: - lvI.pszText = plat_get_string(fsid); - lvI.iImage = 0; - break; - case CDROM_BUS_ATAPI: - wsprintf(szText, plat_get_string(fsid), temp_cdrom[i].ide_channel >> 1, temp_cdrom[i].ide_channel & 1); - lvI.pszText = szText; - lvI.iImage = 1; - break; - case CDROM_BUS_SCSI: - wsprintf(szText, plat_get_string(fsid), temp_cdrom[i].scsi_device_id >> 4, temp_cdrom[i].scsi_device_id & 15); - lvI.pszText = szText; - lvI.iImage = 1; - break; - } + lvI.iSubItem = 0; + switch (temp_cdrom[i].bus_type) { + case CDROM_BUS_DISABLED: + default: + lvI.pszText = plat_get_string(fsid); + lvI.iImage = 0; + break; + case CDROM_BUS_ATAPI: + wsprintf(szText, plat_get_string(fsid), temp_cdrom[i].ide_channel >> 1, temp_cdrom[i].ide_channel & 1); + lvI.pszText = szText; + lvI.iImage = 1; + break; + case CDROM_BUS_SCSI: + wsprintf(szText, plat_get_string(fsid), temp_cdrom[i].scsi_device_id >> 4, temp_cdrom[i].scsi_device_id & 15); + lvI.pszText = szText; + lvI.iImage = 1; + break; + } - lvI.iItem = i; + lvI.iItem = i; - if (ListView_InsertItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_InsertItem(hwndList, &lvI) == -1) + return FALSE; - lvI.iSubItem = 1; - if (temp_cdrom[i].bus_type == CDROM_BUS_DISABLED) - lvI.pszText = plat_get_string(IDS_2103); - else { - wsprintf(szText, L"%ix", temp_cdrom[i].speed); - lvI.pszText = szText; - } - lvI.iItem = i; - lvI.iImage = 0; + lvI.iSubItem = 1; + if (temp_cdrom[i].bus_type == CDROM_BUS_DISABLED) + lvI.pszText = plat_get_string(IDS_2103); + else { + wsprintf(szText, L"%ix", temp_cdrom[i].speed); + lvI.pszText = szText; + } + lvI.iItem = i; + lvI.iImage = 0; - if (ListView_SetItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_SetItem(hwndList, &lvI) == -1) + return FALSE; } return TRUE; } - static BOOL win_settings_mo_drives_recalc_list(HWND hdlg) { LVITEM lvI; - int i = 0, fsid = 0; - WCHAR szText[256]; - char szType[30]; - HWND hwndList = GetDlgItem(hdlg, IDC_LIST_MO_DRIVES); + int i = 0, fsid = 0; + WCHAR szText[256]; + char szType[30]; + HWND hwndList = GetDlgItem(hdlg, IDC_LIST_MO_DRIVES); - lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; - lvI.stateMask = lvI.iSubItem = lvI.state = 0; + lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; + lvI.stateMask = lvI.iSubItem = lvI.state = 0; for (i = 0; i < MO_NUM; i++) { - fsid = combo_id_to_format_string_id(temp_mo_drives[i].bus_type); + fsid = combo_id_to_format_string_id(temp_mo_drives[i].bus_type); - lvI.iSubItem = 0; - switch (temp_mo_drives[i].bus_type) { - case MO_BUS_DISABLED: - default: - lvI.pszText = plat_get_string(fsid); - lvI.iImage = 0; - break; - case MO_BUS_ATAPI: - wsprintf(szText, plat_get_string(fsid), temp_mo_drives[i].ide_channel >> 1, temp_mo_drives[i].ide_channel & 1); - lvI.pszText = szText; - lvI.iImage = 1; - break; - case MO_BUS_SCSI: - wsprintf(szText, plat_get_string(fsid), temp_mo_drives[i].scsi_device_id >> 4, temp_mo_drives[i].scsi_device_id & 15); - lvI.pszText = szText; - lvI.iImage = 1; - break; - } + lvI.iSubItem = 0; + switch (temp_mo_drives[i].bus_type) { + case MO_BUS_DISABLED: + default: + lvI.pszText = plat_get_string(fsid); + lvI.iImage = 0; + break; + case MO_BUS_ATAPI: + wsprintf(szText, plat_get_string(fsid), temp_mo_drives[i].ide_channel >> 1, temp_mo_drives[i].ide_channel & 1); + lvI.pszText = szText; + lvI.iImage = 1; + break; + case MO_BUS_SCSI: + wsprintf(szText, plat_get_string(fsid), temp_mo_drives[i].scsi_device_id >> 4, temp_mo_drives[i].scsi_device_id & 15); + lvI.pszText = szText; + lvI.iImage = 1; + break; + } - lvI.iItem = i; + lvI.iItem = i; - if (ListView_InsertItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_InsertItem(hwndList, &lvI) == -1) + return FALSE; - lvI.iSubItem = 1; - if (temp_mo_drives[i].bus_type == MO_BUS_DISABLED) - lvI.pszText = plat_get_string(IDS_2103); - else { - memset(szType, 0, 30); - memcpy(szType, mo_drive_types[temp_mo_drives[i].type].vendor, 8); - szType[strlen(szType)] = ' '; - memcpy(szType + strlen(szType), mo_drive_types[temp_mo_drives[i].type].model, 16); - szType[strlen(szType)] = ' '; - memcpy(szType + strlen(szType), mo_drive_types[temp_mo_drives[i].type].revision, 4); + lvI.iSubItem = 1; + if (temp_mo_drives[i].bus_type == MO_BUS_DISABLED) + lvI.pszText = plat_get_string(IDS_2103); + else { + memset(szType, 0, 30); + memcpy(szType, mo_drive_types[temp_mo_drives[i].type].vendor, 8); + szType[strlen(szType)] = ' '; + memcpy(szType + strlen(szType), mo_drive_types[temp_mo_drives[i].type].model, 16); + szType[strlen(szType)] = ' '; + memcpy(szType + strlen(szType), mo_drive_types[temp_mo_drives[i].type].revision, 4); - mbstowcs(szText, szType, strlen(szType)+1); - lvI.pszText = szText; - } - lvI.iItem = i; - lvI.iImage = 0; + mbstowcs(szText, szType, strlen(szType) + 1); + lvI.pszText = szText; + } + lvI.iItem = i; + lvI.iImage = 0; - if (ListView_SetItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_SetItem(hwndList, &lvI) == -1) + return FALSE; } return TRUE; } - static BOOL win_settings_zip_drives_recalc_list(HWND hdlg) { LVITEM lvI; - int i = 0, fsid = 0; - WCHAR szText[256]; - HWND hwndList = GetDlgItem(hdlg, IDC_LIST_ZIP_DRIVES); + int i = 0, fsid = 0; + WCHAR szText[256]; + HWND hwndList = GetDlgItem(hdlg, IDC_LIST_ZIP_DRIVES); - lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; + lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; lvI.stateMask = lvI.iSubItem = lvI.state = 0; for (i = 0; i < ZIP_NUM; i++) { - fsid = combo_id_to_format_string_id(temp_zip_drives[i].bus_type); + fsid = combo_id_to_format_string_id(temp_zip_drives[i].bus_type); - lvI.iSubItem = 0; - switch (temp_zip_drives[i].bus_type) { - case ZIP_BUS_DISABLED: - default: - lvI.pszText = plat_get_string(fsid); - lvI.iImage = 0; - break; - case ZIP_BUS_ATAPI: - wsprintf(szText, plat_get_string(fsid), temp_zip_drives[i].ide_channel >> 1, temp_zip_drives[i].ide_channel & 1); - lvI.pszText = szText; - lvI.iImage = 1; - break; - case ZIP_BUS_SCSI: - wsprintf(szText, plat_get_string(fsid), temp_zip_drives[i].scsi_device_id >> 4, temp_zip_drives[i].scsi_device_id & 15); - lvI.pszText = szText; - lvI.iImage = 1; - break; - } + lvI.iSubItem = 0; + switch (temp_zip_drives[i].bus_type) { + case ZIP_BUS_DISABLED: + default: + lvI.pszText = plat_get_string(fsid); + lvI.iImage = 0; + break; + case ZIP_BUS_ATAPI: + wsprintf(szText, plat_get_string(fsid), temp_zip_drives[i].ide_channel >> 1, temp_zip_drives[i].ide_channel & 1); + lvI.pszText = szText; + lvI.iImage = 1; + break; + case ZIP_BUS_SCSI: + wsprintf(szText, plat_get_string(fsid), temp_zip_drives[i].scsi_device_id >> 4, temp_zip_drives[i].scsi_device_id & 15); + lvI.pszText = szText; + lvI.iImage = 1; + break; + } - lvI.iItem = i; + lvI.iItem = i; - if (ListView_InsertItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_InsertItem(hwndList, &lvI) == -1) + return FALSE; - lvI.iSubItem = 1; - lvI.pszText = plat_get_string(temp_zip_drives[i].is_250 ? IDS_5901 : IDS_5900); - lvI.iItem = i; - lvI.iImage = 0; + lvI.iSubItem = 1; + lvI.pszText = plat_get_string(temp_zip_drives[i].is_250 ? IDS_5901 : IDS_5900); + lvI.iItem = i; + lvI.iImage = 0; - if (ListView_SetItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_SetItem(hwndList, &lvI) == -1) + return FALSE; } return TRUE; } - static void win_settings_floppy_drives_resize_columns(HWND hdlg) { - int iCol, width[3] = {292, 58, 89}; - int total = 0; + int iCol, width[3] = { 292, 58, 89 }; + int total = 0; HWND hwndList = GetDlgItem(hdlg, IDC_LIST_FLOPPY_DRIVES); RECT r; GetWindowRect(hwndList, &r); for (iCol = 0; iCol < 2; iCol++) { - width[iCol] = MulDiv(width[iCol], dpi, 96); - total += width[iCol]; - ListView_SetColumnWidth(hwndList, iCol, MulDiv(width[iCol], dpi, 96)); + width[iCol] = MulDiv(width[iCol], dpi, 96); + total += width[iCol]; + ListView_SetColumnWidth(hwndList, iCol, MulDiv(width[iCol], dpi, 96)); } width[2] = (r.right - r.left) - 4 - total; ListView_SetColumnWidth(hwndList, 2, width[2]); } - static BOOL win_settings_floppy_drives_init_columns(HWND hdlg) { LVCOLUMN lvc; - HWND hwndList = GetDlgItem(hdlg, IDC_LIST_FLOPPY_DRIVES); + HWND hwndList = GetDlgItem(hdlg, IDC_LIST_FLOPPY_DRIVES); lvc.mask = LVCF_FMT | LVCF_WIDTH | LVCF_TEXT | LVCF_SUBITEM; lvc.iSubItem = 0; - lvc.pszText = plat_get_string(IDS_2092); + lvc.pszText = plat_get_string(IDS_2092); - lvc.cx = 292; + lvc.cx = 292; lvc.fmt = LVCFMT_LEFT; if (ListView_InsertColumn(hwndList, 0, &lvc) == -1) - return FALSE; + return FALSE; lvc.iSubItem = 1; - lvc.pszText = plat_get_string(IDS_2059); + lvc.pszText = plat_get_string(IDS_2059); - lvc.cx = 58; + lvc.cx = 58; lvc.fmt = LVCFMT_LEFT; if (ListView_InsertColumn(hwndList, 1, &lvc) == -1) - return FALSE; + return FALSE; lvc.iSubItem = 2; - lvc.pszText = plat_get_string(IDS_2087); + lvc.pszText = plat_get_string(IDS_2087); - lvc.cx = 89; + lvc.cx = 89; lvc.fmt = LVCFMT_LEFT; if (ListView_InsertColumn(hwndList, 2, &lvc) == -1) - return FALSE; + return FALSE; win_settings_floppy_drives_resize_columns(hdlg); return TRUE; } - static void win_settings_cdrom_drives_resize_columns(HWND hdlg) { - int width[2] = {292, 147}; + int width[2] = { 292, 147 }; HWND hwndList = GetDlgItem(hdlg, IDC_LIST_CDROM_DRIVES); RECT r; @@ -3893,42 +3827,40 @@ win_settings_cdrom_drives_resize_columns(HWND hdlg) ListView_SetColumnWidth(hwndList, 1, width[1]); } - static BOOL win_settings_cdrom_drives_init_columns(HWND hdlg) { LVCOLUMN lvc; - HWND hwndList = GetDlgItem(hdlg, IDC_LIST_CDROM_DRIVES); + HWND hwndList = GetDlgItem(hdlg, IDC_LIST_CDROM_DRIVES); lvc.mask = LVCF_FMT | LVCF_WIDTH | LVCF_TEXT | LVCF_SUBITEM; lvc.iSubItem = 0; - lvc.pszText = plat_get_string(IDS_2081); + lvc.pszText = plat_get_string(IDS_2081); - lvc.cx = 292; + lvc.cx = 292; lvc.fmt = LVCFMT_LEFT; if (ListView_InsertColumn(hwndList, 0, &lvc) == -1) - return FALSE; + return FALSE; lvc.iSubItem = 1; - lvc.pszText = plat_get_string(IDS_2053); + lvc.pszText = plat_get_string(IDS_2053); - lvc.cx = 147; + lvc.cx = 147; lvc.fmt = LVCFMT_LEFT; if (ListView_InsertColumn(hwndList, 1, &lvc) == -1) - return FALSE; + return FALSE; win_settings_cdrom_drives_resize_columns(hdlg); return TRUE; } - static void win_settings_mo_drives_resize_columns(HWND hdlg) { - int width[2] = {292, 147}; + int width[2] = { 292, 147 }; HWND hwndList = GetDlgItem(hdlg, IDC_LIST_MO_DRIVES); RECT r; @@ -3939,42 +3871,40 @@ win_settings_mo_drives_resize_columns(HWND hdlg) ListView_SetColumnWidth(hwndList, 1, width[1]); } - static BOOL win_settings_mo_drives_init_columns(HWND hdlg) { LVCOLUMN lvc; - HWND hwndList = GetDlgItem(hdlg, IDC_LIST_MO_DRIVES); + HWND hwndList = GetDlgItem(hdlg, IDC_LIST_MO_DRIVES); lvc.mask = LVCF_FMT | LVCF_WIDTH | LVCF_TEXT | LVCF_SUBITEM; lvc.iSubItem = 0; - lvc.pszText = plat_get_string(IDS_2081); + lvc.pszText = plat_get_string(IDS_2081); - lvc.cx = 292; + lvc.cx = 292; lvc.fmt = LVCFMT_LEFT; if (ListView_InsertColumn(hwndList, 0, &lvc) == -1) - return FALSE; + return FALSE; lvc.iSubItem = 1; - lvc.pszText = plat_get_string(IDS_2092); + lvc.pszText = plat_get_string(IDS_2092); - lvc.cx = 147; + lvc.cx = 147; lvc.fmt = LVCFMT_LEFT; if (ListView_InsertColumn(hwndList, 1, &lvc) == -1) - return FALSE; + return FALSE; win_settings_mo_drives_resize_columns(hdlg); return TRUE; } - static void win_settings_zip_drives_resize_columns(HWND hdlg) { - int width[2] = {292, 147}; + int width[2] = { 292, 147 }; HWND hwndList = GetDlgItem(hdlg, IDC_LIST_ZIP_DRIVES); RECT r; @@ -3985,437 +3915,425 @@ win_settings_zip_drives_resize_columns(HWND hdlg) ListView_SetColumnWidth(hwndList, 1, width[1]); } - static BOOL win_settings_zip_drives_init_columns(HWND hdlg) { LVCOLUMN lvc; - HWND hwndList = GetDlgItem(hdlg, IDC_LIST_ZIP_DRIVES); + HWND hwndList = GetDlgItem(hdlg, IDC_LIST_ZIP_DRIVES); lvc.mask = LVCF_FMT | LVCF_WIDTH | LVCF_TEXT | LVCF_SUBITEM; lvc.iSubItem = 0; - lvc.pszText = plat_get_string(IDS_2081); + lvc.pszText = plat_get_string(IDS_2081); - lvc.cx = 292; + lvc.cx = 292; lvc.fmt = LVCFMT_LEFT; if (ListView_InsertColumn(hwndList, 0, &lvc) == -1) - return FALSE; + return FALSE; lvc.iSubItem = 1; - lvc.pszText = plat_get_string(IDS_2092); + lvc.pszText = plat_get_string(IDS_2092); - lvc.cx = 147; + lvc.cx = 147; lvc.fmt = LVCFMT_LEFT; if (ListView_InsertColumn(hwndList, 1, &lvc) == -1) - return FALSE; + return FALSE; win_settings_zip_drives_resize_columns(hdlg); return TRUE; } - static int get_selected_drive(HWND hdlg, int id) { - int drive = -1; - int i, j = 0; + int drive = -1; + int i, j = 0; HWND h; for (i = 0; i < 4; i++) { - h = GetDlgItem(hdlg, id); - j = ListView_GetItemState(h, i, LVIS_SELECTED); - if (j) - drive = i; + h = GetDlgItem(hdlg, id); + j = ListView_GetItemState(h, i, LVIS_SELECTED); + if (j) + drive = i; } return drive; } - static void win_settings_floppy_drives_update_item(HWND hdlg, int i) { LVITEM lvI; - char s[256], *t; - WCHAR szText[256]; - HWND hwndList = GetDlgItem(hdlg, IDC_LIST_FLOPPY_DRIVES); + char s[256], *t; + WCHAR szText[256]; + HWND hwndList = GetDlgItem(hdlg, IDC_LIST_FLOPPY_DRIVES); - lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; + lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; lvI.stateMask = lvI.iSubItem = lvI.state = 0; lvI.iSubItem = 0; - lvI.iItem = i; + lvI.iItem = i; if (temp_fdd_types[i] > 0) { - t = fdd_getname(temp_fdd_types[i]); - strncpy(s, t, sizeof(s) - 1); - mbstowcs(szText, s, strlen(s) + 1); - lvI.pszText = szText; + t = fdd_getname(temp_fdd_types[i]); + strncpy(s, t, sizeof(s) - 1); + mbstowcs(szText, s, strlen(s) + 1); + lvI.pszText = szText; } else - lvI.pszText = plat_get_string(IDS_5376); + lvI.pszText = plat_get_string(IDS_5376); lvI.iImage = temp_fdd_types[i]; if (ListView_SetItem(hwndList, &lvI) == -1) - return; + return; lvI.iSubItem = 1; - lvI.pszText = plat_get_string(temp_fdd_turbo[i] ? IDS_2060 : IDS_2061); - lvI.iItem = i; - lvI.iImage = 0; + lvI.pszText = plat_get_string(temp_fdd_turbo[i] ? IDS_2060 : IDS_2061); + lvI.iItem = i; + lvI.iImage = 0; if (ListView_SetItem(hwndList, &lvI) == -1) - return; + return; lvI.iSubItem = 2; - lvI.pszText = plat_get_string(temp_fdd_check_bpb[i] ? IDS_2060 : IDS_2061); - lvI.iItem = i; - lvI.iImage = 0; + lvI.pszText = plat_get_string(temp_fdd_check_bpb[i] ? IDS_2060 : IDS_2061); + lvI.iItem = i; + lvI.iImage = 0; if (ListView_SetItem(hwndList, &lvI) == -1) - return; + return; } - static void win_settings_cdrom_drives_update_item(HWND hdlg, int i) { LVITEM lvI; - WCHAR szText[256]; - int fsid; - HWND hwndList = GetDlgItem(hdlg, IDC_LIST_CDROM_DRIVES); + WCHAR szText[256]; + int fsid; + HWND hwndList = GetDlgItem(hdlg, IDC_LIST_CDROM_DRIVES); - lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; + lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; lvI.stateMask = lvI.iSubItem = lvI.state = 0; lvI.iSubItem = 0; - lvI.iItem = i; + lvI.iItem = i; fsid = combo_id_to_format_string_id(temp_cdrom[i].bus_type); switch (temp_cdrom[i].bus_type) { - case CDROM_BUS_DISABLED: - default: - lvI.pszText = plat_get_string(fsid); - lvI.iImage = 0; - break; - case CDROM_BUS_ATAPI: - wsprintf(szText, plat_get_string(fsid), temp_cdrom[i].ide_channel >> 1, temp_cdrom[i].ide_channel & 1); - lvI.pszText = szText; - lvI.iImage = 1; - break; - case CDROM_BUS_SCSI: - wsprintf(szText, plat_get_string(fsid), temp_cdrom[i].scsi_device_id >> 4, temp_cdrom[i].scsi_device_id & 15); - lvI.pszText = szText; - lvI.iImage = 1; - break; + case CDROM_BUS_DISABLED: + default: + lvI.pszText = plat_get_string(fsid); + lvI.iImage = 0; + break; + case CDROM_BUS_ATAPI: + wsprintf(szText, plat_get_string(fsid), temp_cdrom[i].ide_channel >> 1, temp_cdrom[i].ide_channel & 1); + lvI.pszText = szText; + lvI.iImage = 1; + break; + case CDROM_BUS_SCSI: + wsprintf(szText, plat_get_string(fsid), temp_cdrom[i].scsi_device_id >> 4, temp_cdrom[i].scsi_device_id & 15); + lvI.pszText = szText; + lvI.iImage = 1; + break; } if (ListView_SetItem(hwndList, &lvI) == -1) - return; + return; lvI.iSubItem = 1; if (temp_cdrom[i].bus_type == CDROM_BUS_DISABLED) - lvI.pszText = plat_get_string(IDS_2103); + lvI.pszText = plat_get_string(IDS_2103); else { - wsprintf(szText, L"%ix", temp_cdrom[i].speed); - lvI.pszText = szText; + wsprintf(szText, L"%ix", temp_cdrom[i].speed); + lvI.pszText = szText; } - lvI.iItem = i; + lvI.iItem = i; lvI.iImage = 0; if (ListView_SetItem(hwndList, &lvI) == -1) - return; + return; } - static void win_settings_mo_drives_update_item(HWND hdlg, int i) { LVITEM lvI; - WCHAR szText[256]; - char szType[30]; - int fsid; - HWND hwndList = GetDlgItem(hdlg, IDC_LIST_MO_DRIVES); + WCHAR szText[256]; + char szType[30]; + int fsid; + HWND hwndList = GetDlgItem(hdlg, IDC_LIST_MO_DRIVES); - lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; + lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; lvI.stateMask = lvI.iSubItem = lvI.state = 0; lvI.iSubItem = 0; - lvI.iItem = i; + lvI.iItem = i; fsid = combo_id_to_format_string_id(temp_mo_drives[i].bus_type); switch (temp_mo_drives[i].bus_type) { - case MO_BUS_DISABLED: - default: - lvI.pszText = plat_get_string(fsid); - lvI.iImage = 0; - break; - case MO_BUS_ATAPI: - wsprintf(szText, plat_get_string(fsid), temp_mo_drives[i].ide_channel >> 1, temp_mo_drives[i].ide_channel & 1); - lvI.pszText = szText; - lvI.iImage = 1; - break; - case MO_BUS_SCSI: - wsprintf(szText, plat_get_string(fsid), temp_mo_drives[i].scsi_device_id >> 4, temp_mo_drives[i].scsi_device_id & 15); - lvI.pszText = szText; - lvI.iImage = 1; - break; + case MO_BUS_DISABLED: + default: + lvI.pszText = plat_get_string(fsid); + lvI.iImage = 0; + break; + case MO_BUS_ATAPI: + wsprintf(szText, plat_get_string(fsid), temp_mo_drives[i].ide_channel >> 1, temp_mo_drives[i].ide_channel & 1); + lvI.pszText = szText; + lvI.iImage = 1; + break; + case MO_BUS_SCSI: + wsprintf(szText, plat_get_string(fsid), temp_mo_drives[i].scsi_device_id >> 4, temp_mo_drives[i].scsi_device_id & 15); + lvI.pszText = szText; + lvI.iImage = 1; + break; } if (ListView_SetItem(hwndList, &lvI) == -1) - return; + return; lvI.iSubItem = 1; if (temp_mo_drives[i].bus_type == MO_BUS_DISABLED) - lvI.pszText = plat_get_string(IDS_2103); + lvI.pszText = plat_get_string(IDS_2103); else { - memset(szType, 0, 30); - memcpy(szType, mo_drive_types[temp_mo_drives[i].type].vendor, 8); - szType[strlen(szType)] = ' '; - memcpy(szType + strlen(szType), mo_drive_types[temp_mo_drives[i].type].model, 16); - szType[strlen(szType)] = ' '; - memcpy(szType + strlen(szType), mo_drive_types[temp_mo_drives[i].type].revision, 4); - mbstowcs(szText, szType, strlen(szType)+1); - lvI.pszText = szText; + memset(szType, 0, 30); + memcpy(szType, mo_drive_types[temp_mo_drives[i].type].vendor, 8); + szType[strlen(szType)] = ' '; + memcpy(szType + strlen(szType), mo_drive_types[temp_mo_drives[i].type].model, 16); + szType[strlen(szType)] = ' '; + memcpy(szType + strlen(szType), mo_drive_types[temp_mo_drives[i].type].revision, 4); + mbstowcs(szText, szType, strlen(szType) + 1); + lvI.pszText = szText; } - lvI.iItem = i; + lvI.iItem = i; lvI.iImage = 0; if (ListView_SetItem(hwndList, &lvI) == -1) - return; + return; } - static void win_settings_zip_drives_update_item(HWND hdlg, int i) { LVITEM lvI; - WCHAR szText[256]; - int fsid; - HWND hwndList = GetDlgItem(hdlg, IDC_LIST_ZIP_DRIVES); + WCHAR szText[256]; + int fsid; + HWND hwndList = GetDlgItem(hdlg, IDC_LIST_ZIP_DRIVES); - lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; + lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; lvI.stateMask = lvI.iSubItem = lvI.state = 0; lvI.iSubItem = 0; - lvI.iItem = i; + lvI.iItem = i; fsid = combo_id_to_format_string_id(temp_zip_drives[i].bus_type); switch (temp_zip_drives[i].bus_type) { - case ZIP_BUS_DISABLED: - default: - lvI.pszText = plat_get_string(fsid); - lvI.iImage = 0; - break; - case ZIP_BUS_ATAPI: - wsprintf(szText, plat_get_string(fsid), temp_zip_drives[i].ide_channel >> 1, temp_zip_drives[i].ide_channel & 1); - lvI.pszText = szText; - lvI.iImage = 1; - break; - case ZIP_BUS_SCSI: - wsprintf(szText, plat_get_string(fsid), temp_zip_drives[i].scsi_device_id >> 4, temp_zip_drives[i].scsi_device_id & 15); - lvI.pszText = szText; - lvI.iImage = 1; - break; + case ZIP_BUS_DISABLED: + default: + lvI.pszText = plat_get_string(fsid); + lvI.iImage = 0; + break; + case ZIP_BUS_ATAPI: + wsprintf(szText, plat_get_string(fsid), temp_zip_drives[i].ide_channel >> 1, temp_zip_drives[i].ide_channel & 1); + lvI.pszText = szText; + lvI.iImage = 1; + break; + case ZIP_BUS_SCSI: + wsprintf(szText, plat_get_string(fsid), temp_zip_drives[i].scsi_device_id >> 4, temp_zip_drives[i].scsi_device_id & 15); + lvI.pszText = szText; + lvI.iImage = 1; + break; } if (ListView_SetItem(hwndList, &lvI) == -1) - return; + return; lvI.iSubItem = 1; - lvI.pszText = plat_get_string(temp_zip_drives[i].is_250 ? IDS_5901 : IDS_5900); - lvI.iItem = i; - lvI.iImage = 0; + lvI.pszText = plat_get_string(temp_zip_drives[i].is_250 ? IDS_5901 : IDS_5900); + lvI.iItem = i; + lvI.iImage = 0; if (ListView_SetItem(hwndList, &lvI) == -1) - return; + return; } - static void cdrom_add_locations(HWND hdlg) { LPTSTR lptsTemp; - int i = 0; + int i = 0; lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); for (i = CDROM_BUS_DISABLED; i <= CDROM_BUS_SCSI; i++) { - if ((i == CDROM_BUS_DISABLED) || (i >= CDROM_BUS_ATAPI)) - settings_add_string(hdlg, IDC_COMBO_CD_BUS, win_get_string(combo_id_to_string_id(i))); + if ((i == CDROM_BUS_DISABLED) || (i >= CDROM_BUS_ATAPI)) + settings_add_string(hdlg, IDC_COMBO_CD_BUS, win_get_string(combo_id_to_string_id(i))); } for (i = 1; i <= 72; i++) { - wsprintf(lptsTemp, L"%ix", i); - settings_add_string(hdlg, IDC_COMBO_CD_SPEED, (LPARAM) lptsTemp); + wsprintf(lptsTemp, L"%ix", i); + settings_add_string(hdlg, IDC_COMBO_CD_SPEED, (LPARAM) lptsTemp); } for (i = 0; i < 64; i++) { - wsprintf(lptsTemp, plat_get_string(IDS_4135), i >> 4, i & 15); - settings_add_string(hdlg, IDC_COMBO_CD_ID, (LPARAM) lptsTemp); + wsprintf(lptsTemp, plat_get_string(IDS_4135), i >> 4, i & 15); + settings_add_string(hdlg, IDC_COMBO_CD_ID, (LPARAM) lptsTemp); } for (i = 0; i < 8; i++) { - wsprintf(lptsTemp, plat_get_string(IDS_4097), i >> 1, i & 1); - settings_add_string(hdlg, IDC_COMBO_CD_CHANNEL_IDE, (LPARAM) lptsTemp); + wsprintf(lptsTemp, plat_get_string(IDS_4097), i >> 1, i & 1); + settings_add_string(hdlg, IDC_COMBO_CD_CHANNEL_IDE, (LPARAM) lptsTemp); } free(lptsTemp); } - static void cdrom_recalc_location_controls(HWND hdlg, int assign_id) { - int i = 0; + int i = 0; int bus = temp_cdrom[lv2_current_sel].bus_type; for (i = IDT_CD_ID; i <= (IDT_CD_LUN); i++) - settings_show_window(hdlg, i, FALSE); + settings_show_window(hdlg, i, FALSE); settings_show_window(hdlg, IDC_COMBO_CD_ID, FALSE); settings_show_window(hdlg, IDC_COMBO_CD_CHANNEL_IDE, FALSE); settings_show_window(hdlg, IDC_COMBO_CD_SPEED, bus != CDROM_BUS_DISABLED); settings_show_window(hdlg, IDT_CD_SPEED, bus != CDROM_BUS_DISABLED); if (bus != CDROM_BUS_DISABLED) - settings_set_cur_sel(hdlg, IDC_COMBO_CD_SPEED, temp_cdrom[lv2_current_sel].speed - 1); + settings_set_cur_sel(hdlg, IDC_COMBO_CD_SPEED, temp_cdrom[lv2_current_sel].speed - 1); - switch(bus) { - case CDROM_BUS_ATAPI: /* ATAPI */ - settings_show_window(hdlg, IDT_CD_LUN, TRUE); - settings_show_window(hdlg, IDC_COMBO_CD_CHANNEL_IDE, TRUE); + switch (bus) { + case CDROM_BUS_ATAPI: /* ATAPI */ + settings_show_window(hdlg, IDT_CD_LUN, TRUE); + settings_show_window(hdlg, IDC_COMBO_CD_CHANNEL_IDE, TRUE); - if (assign_id) - temp_cdrom[lv2_current_sel].ide_channel = next_free_ide_channel(); + if (assign_id) + temp_cdrom[lv2_current_sel].ide_channel = next_free_ide_channel(); - settings_set_cur_sel(hdlg, IDC_COMBO_CD_CHANNEL_IDE, temp_cdrom[lv2_current_sel].ide_channel); - break; - case CDROM_BUS_SCSI: /* SCSI */ - settings_show_window(hdlg, IDT_CD_ID, TRUE); - settings_show_window(hdlg, IDC_COMBO_CD_ID, TRUE); + settings_set_cur_sel(hdlg, IDC_COMBO_CD_CHANNEL_IDE, temp_cdrom[lv2_current_sel].ide_channel); + break; + case CDROM_BUS_SCSI: /* SCSI */ + settings_show_window(hdlg, IDT_CD_ID, TRUE); + settings_show_window(hdlg, IDC_COMBO_CD_ID, TRUE); - if (assign_id) - next_free_scsi_id((uint8_t *) &temp_cdrom[lv2_current_sel].scsi_device_id); + if (assign_id) + next_free_scsi_id((uint8_t *) &temp_cdrom[lv2_current_sel].scsi_device_id); - settings_set_cur_sel(hdlg, IDC_COMBO_CD_ID, temp_cdrom[lv2_current_sel].scsi_device_id); - break; + settings_set_cur_sel(hdlg, IDC_COMBO_CD_ID, temp_cdrom[lv2_current_sel].scsi_device_id); + break; } } - static void mo_add_locations(HWND hdlg) { LPTSTR lptsTemp; - char *temp; - int i = 0; + char *temp; + int i = 0; lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); - temp = (char*) malloc(30*sizeof(char)); + temp = (char *) malloc(30 * sizeof(char)); for (i = MO_BUS_DISABLED; i <= MO_BUS_SCSI; i++) { - if ((i == MO_BUS_DISABLED) || (i >= MO_BUS_ATAPI)) - settings_add_string(hdlg, IDC_COMBO_MO_BUS, win_get_string(combo_id_to_string_id(i))); + if ((i == MO_BUS_DISABLED) || (i >= MO_BUS_ATAPI)) + settings_add_string(hdlg, IDC_COMBO_MO_BUS, win_get_string(combo_id_to_string_id(i))); } for (i = 0; i < 64; i++) { - wsprintf(lptsTemp, plat_get_string(IDS_4135), i >> 4, i & 15); - settings_add_string(hdlg, IDC_COMBO_MO_ID, (LPARAM) lptsTemp); + wsprintf(lptsTemp, plat_get_string(IDS_4135), i >> 4, i & 15); + settings_add_string(hdlg, IDC_COMBO_MO_ID, (LPARAM) lptsTemp); } for (i = 0; i < 8; i++) { - wsprintf(lptsTemp, plat_get_string(IDS_4097), i >> 1, i & 1); - settings_add_string(hdlg, IDC_COMBO_MO_CHANNEL_IDE, (LPARAM) lptsTemp); + wsprintf(lptsTemp, plat_get_string(IDS_4097), i >> 1, i & 1); + settings_add_string(hdlg, IDC_COMBO_MO_CHANNEL_IDE, (LPARAM) lptsTemp); } for (int i = 0; i < KNOWN_MO_DRIVE_TYPES; i++) { - memset(temp, 0, 30); - memcpy(temp, mo_drive_types[i].vendor, 8); - temp[strlen(temp)] = ' '; - memcpy(temp + strlen(temp), mo_drive_types[i].model, 16); - temp[strlen(temp)] = ' '; - memcpy(temp + strlen(temp), mo_drive_types[i].revision, 4); + memset(temp, 0, 30); + memcpy(temp, mo_drive_types[i].vendor, 8); + temp[strlen(temp)] = ' '; + memcpy(temp + strlen(temp), mo_drive_types[i].model, 16); + temp[strlen(temp)] = ' '; + memcpy(temp + strlen(temp), mo_drive_types[i].revision, 4); - mbstowcs(lptsTemp, temp, strlen(temp)+1); - settings_add_string(hdlg, IDC_COMBO_MO_TYPE, (LPARAM) lptsTemp); + mbstowcs(lptsTemp, temp, strlen(temp) + 1); + settings_add_string(hdlg, IDC_COMBO_MO_TYPE, (LPARAM) lptsTemp); } free(temp); free(lptsTemp); } - static void mo_recalc_location_controls(HWND hdlg, int assign_id) { - int i = 0; + int i = 0; int bus = temp_mo_drives[lv1_current_sel].bus_type; for (i = IDT_MO_ID; i <= (IDT_MO_CHANNEL); i++) - settings_show_window(hdlg, i, FALSE); + settings_show_window(hdlg, i, FALSE); settings_show_window(hdlg, IDC_COMBO_MO_ID, FALSE); settings_show_window(hdlg, IDC_COMBO_MO_CHANNEL_IDE, FALSE); settings_show_window(hdlg, IDC_COMBO_MO_TYPE, bus != MO_BUS_DISABLED); settings_show_window(hdlg, IDT_MO_TYPE, bus != MO_BUS_DISABLED); if (bus != MO_BUS_DISABLED) - settings_set_cur_sel(hdlg, IDC_COMBO_MO_TYPE, temp_mo_drives[lv1_current_sel].type); + settings_set_cur_sel(hdlg, IDC_COMBO_MO_TYPE, temp_mo_drives[lv1_current_sel].type); - switch(bus) { - case MO_BUS_ATAPI: /* ATAPI */ - settings_show_window(hdlg, IDT_MO_CHANNEL, TRUE); - settings_show_window(hdlg, IDC_COMBO_MO_CHANNEL_IDE, TRUE); + switch (bus) { + case MO_BUS_ATAPI: /* ATAPI */ + settings_show_window(hdlg, IDT_MO_CHANNEL, TRUE); + settings_show_window(hdlg, IDC_COMBO_MO_CHANNEL_IDE, TRUE); - if (assign_id) - temp_mo_drives[lv1_current_sel].ide_channel = next_free_ide_channel(); + if (assign_id) + temp_mo_drives[lv1_current_sel].ide_channel = next_free_ide_channel(); - settings_set_cur_sel(hdlg, IDC_COMBO_MO_CHANNEL_IDE, temp_mo_drives[lv1_current_sel].ide_channel); - break; - case MO_BUS_SCSI: /* SCSI */ - settings_show_window(hdlg, IDT_MO_ID, TRUE); - settings_show_window(hdlg, IDC_COMBO_MO_ID, TRUE); + settings_set_cur_sel(hdlg, IDC_COMBO_MO_CHANNEL_IDE, temp_mo_drives[lv1_current_sel].ide_channel); + break; + case MO_BUS_SCSI: /* SCSI */ + settings_show_window(hdlg, IDT_MO_ID, TRUE); + settings_show_window(hdlg, IDC_COMBO_MO_ID, TRUE); - if (assign_id) - next_free_scsi_id((uint8_t *) &temp_mo_drives[lv1_current_sel].scsi_device_id); + if (assign_id) + next_free_scsi_id((uint8_t *) &temp_mo_drives[lv1_current_sel].scsi_device_id); - settings_set_cur_sel(hdlg, IDC_COMBO_MO_ID, temp_mo_drives[lv1_current_sel].scsi_device_id); - break; + settings_set_cur_sel(hdlg, IDC_COMBO_MO_ID, temp_mo_drives[lv1_current_sel].scsi_device_id); + break; } } - static void zip_add_locations(HWND hdlg) { LPTSTR lptsTemp; - int i = 0; + int i = 0; lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); for (i = ZIP_BUS_DISABLED; i <= ZIP_BUS_SCSI; i++) { - if ((i == ZIP_BUS_DISABLED) || (i >= ZIP_BUS_ATAPI)) - settings_add_string(hdlg, IDC_COMBO_ZIP_BUS, win_get_string(combo_id_to_string_id(i))); + if ((i == ZIP_BUS_DISABLED) || (i >= ZIP_BUS_ATAPI)) + settings_add_string(hdlg, IDC_COMBO_ZIP_BUS, win_get_string(combo_id_to_string_id(i))); } for (i = 0; i < 64; i++) { - wsprintf(lptsTemp, plat_get_string(IDS_4135), i >> 4, i & 15); - settings_add_string(hdlg, IDC_COMBO_ZIP_ID, (LPARAM) lptsTemp); + wsprintf(lptsTemp, plat_get_string(IDS_4135), i >> 4, i & 15); + settings_add_string(hdlg, IDC_COMBO_ZIP_ID, (LPARAM) lptsTemp); } for (i = 0; i < 8; i++) { - wsprintf(lptsTemp, plat_get_string(IDS_4097), i >> 1, i & 1); - settings_add_string(hdlg, IDC_COMBO_ZIP_CHANNEL_IDE, (LPARAM) lptsTemp); + wsprintf(lptsTemp, plat_get_string(IDS_4097), i >> 1, i & 1); + settings_add_string(hdlg, IDC_COMBO_ZIP_CHANNEL_IDE, (LPARAM) lptsTemp); } free(lptsTemp); } - static void zip_recalc_location_controls(HWND hdlg, int assign_id) { @@ -4424,97 +4342,90 @@ zip_recalc_location_controls(HWND hdlg, int assign_id) int bus = temp_zip_drives[lv2_current_sel].bus_type; for (i = IDT_ZIP_ID; i <= (IDT_ZIP_LUN); i++) - settings_show_window(hdlg, i, FALSE); + settings_show_window(hdlg, i, FALSE); settings_show_window(hdlg, IDC_COMBO_ZIP_ID, FALSE); settings_show_window(hdlg, IDC_COMBO_ZIP_CHANNEL_IDE, FALSE); settings_show_window(hdlg, IDC_CHECK250, bus != ZIP_BUS_DISABLED); if (bus != ZIP_BUS_DISABLED) - settings_set_check(hdlg, IDC_CHECK250, temp_zip_drives[lv2_current_sel].is_250); + settings_set_check(hdlg, IDC_CHECK250, temp_zip_drives[lv2_current_sel].is_250); - switch(bus) { - case ZIP_BUS_ATAPI: /* ATAPI */ - settings_show_window(hdlg, IDT_ZIP_LUN, TRUE); - settings_show_window(hdlg, IDC_COMBO_ZIP_CHANNEL_IDE, TRUE); + switch (bus) { + case ZIP_BUS_ATAPI: /* ATAPI */ + settings_show_window(hdlg, IDT_ZIP_LUN, TRUE); + settings_show_window(hdlg, IDC_COMBO_ZIP_CHANNEL_IDE, TRUE); - if (assign_id) - temp_zip_drives[lv2_current_sel].ide_channel = next_free_ide_channel(); + if (assign_id) + temp_zip_drives[lv2_current_sel].ide_channel = next_free_ide_channel(); - settings_set_cur_sel(hdlg, IDC_COMBO_ZIP_CHANNEL_IDE, temp_zip_drives[lv2_current_sel].ide_channel); - break; - case ZIP_BUS_SCSI: /* SCSI */ - settings_show_window(hdlg, IDT_ZIP_ID, TRUE); - settings_show_window(hdlg, IDC_COMBO_ZIP_ID, TRUE); + settings_set_cur_sel(hdlg, IDC_COMBO_ZIP_CHANNEL_IDE, temp_zip_drives[lv2_current_sel].ide_channel); + break; + case ZIP_BUS_SCSI: /* SCSI */ + settings_show_window(hdlg, IDT_ZIP_ID, TRUE); + settings_show_window(hdlg, IDC_COMBO_ZIP_ID, TRUE); - if (assign_id) - next_free_scsi_id((uint8_t *) &temp_zip_drives[lv2_current_sel].scsi_device_id); + if (assign_id) + next_free_scsi_id((uint8_t *) &temp_zip_drives[lv2_current_sel].scsi_device_id); - settings_set_cur_sel(hdlg, IDC_COMBO_ZIP_ID, temp_zip_drives[lv2_current_sel].scsi_device_id); - break; + settings_set_cur_sel(hdlg, IDC_COMBO_ZIP_ID, temp_zip_drives[lv2_current_sel].scsi_device_id); + break; } } - static void cdrom_track(uint8_t id) { if (temp_cdrom[id].bus_type == CDROM_BUS_ATAPI) - ide_tracking |= (2 << (temp_cdrom[id].ide_channel << 3)); + ide_tracking |= (2 << (temp_cdrom[id].ide_channel << 3)); else if (temp_cdrom[id].bus_type == CDROM_BUS_SCSI) - scsi_tracking[temp_cdrom[id].scsi_device_id >> 3] |= (1 << (temp_cdrom[id].scsi_device_id & 0x07)); + scsi_tracking[temp_cdrom[id].scsi_device_id >> 3] |= (1 << (temp_cdrom[id].scsi_device_id & 0x07)); } - static void cdrom_untrack(uint8_t id) { if (temp_cdrom[id].bus_type == CDROM_BUS_ATAPI) - ide_tracking &= ~(2 << (temp_cdrom[id].ide_channel << 3)); + ide_tracking &= ~(2 << (temp_cdrom[id].ide_channel << 3)); else if (temp_cdrom[id].bus_type == CDROM_BUS_SCSI) - scsi_tracking[temp_cdrom[id].scsi_device_id >> 3] &= ~(1 << (temp_cdrom[id].scsi_device_id & 0x07)); + scsi_tracking[temp_cdrom[id].scsi_device_id >> 3] &= ~(1 << (temp_cdrom[id].scsi_device_id & 0x07)); } - static void zip_track(uint8_t id) { if (temp_zip_drives[id].bus_type == ZIP_BUS_ATAPI) - ide_tracking |= (1 << temp_zip_drives[id].ide_channel); + ide_tracking |= (1 << temp_zip_drives[id].ide_channel); else if (temp_zip_drives[id].bus_type == ZIP_BUS_SCSI) - scsi_tracking[temp_zip_drives[id].scsi_device_id >> 3] |= (1 << (temp_zip_drives[id].scsi_device_id & 0x07)); + scsi_tracking[temp_zip_drives[id].scsi_device_id >> 3] |= (1 << (temp_zip_drives[id].scsi_device_id & 0x07)); } - static void zip_untrack(uint8_t id) { if (temp_zip_drives[id].bus_type == ZIP_BUS_ATAPI) - ide_tracking &= ~(1 << temp_zip_drives[id].ide_channel); + ide_tracking &= ~(1 << temp_zip_drives[id].ide_channel); else if (temp_zip_drives[id].bus_type == ZIP_BUS_SCSI) - scsi_tracking[temp_zip_drives[id].scsi_device_id >> 3] &= ~(1 << (temp_zip_drives[id].scsi_device_id & 0x07)); + scsi_tracking[temp_zip_drives[id].scsi_device_id >> 3] &= ~(1 << (temp_zip_drives[id].scsi_device_id & 0x07)); } - static void mo_track(uint8_t id) { if (temp_mo_drives[id].bus_type == MO_BUS_ATAPI) - ide_tracking |= (1 << (temp_zip_drives[id].ide_channel << 3)); + ide_tracking |= (1 << (temp_zip_drives[id].ide_channel << 3)); else if (temp_mo_drives[id].bus_type == MO_BUS_SCSI) - scsi_tracking[temp_mo_drives[id].scsi_device_id >> 3] |= (1 << (temp_mo_drives[id].scsi_device_id & 0x07)); + scsi_tracking[temp_mo_drives[id].scsi_device_id >> 3] |= (1 << (temp_mo_drives[id].scsi_device_id & 0x07)); } - static void mo_untrack(uint8_t id) { if (temp_mo_drives[id].bus_type == MO_BUS_ATAPI) - ide_tracking &= ~(1 << (temp_zip_drives[id].ide_channel << 3)); + ide_tracking &= ~(1 << (temp_zip_drives[id].ide_channel << 3)); else if (temp_mo_drives[id].bus_type == MO_BUS_SCSI) - scsi_tracking[temp_mo_drives[id].scsi_device_id >> 3] &= ~(1 << (temp_mo_drives[id].scsi_device_id & 0x07)); + scsi_tracking[temp_mo_drives[id].scsi_device_id >> 3] &= ~(1 << (temp_mo_drives[id].scsi_device_id & 0x07)); } - #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK #else @@ -4522,184 +4433,183 @@ static BOOL CALLBACK #endif win_settings_floppy_and_cdrom_drives_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { - int i = 0, old_sel = 0, b = 0, assign = 0; - uint32_t b2 = 0; - WCHAR szText[256]; + int i = 0, old_sel = 0, b = 0, assign = 0; + uint32_t b2 = 0; + WCHAR szText[256]; const uint8_t fd_icons[15] = { 248, 16, 16, 16, 16, 16, 16, 24, 24, 24, 24, 24, 24, 24, 0 }; - const uint8_t cd_icons[3] = { 249, 32, 0 }; + const uint8_t cd_icons[3] = { 249, 32, 0 }; switch (message) { - case WM_INITDIALOG: - ignore_change = 1; + case WM_INITDIALOG: + ignore_change = 1; - lv1_current_sel = 0; - win_settings_floppy_drives_init_columns(hdlg); - image_list_init(hdlg, IDC_LIST_FLOPPY_DRIVES, (const uint8_t *) fd_icons); - win_settings_floppy_drives_recalc_list(hdlg); - settings_listview_select(hdlg, IDC_LIST_FLOPPY_DRIVES, 0); - for (i = 0; i < 14; i++) { - if (i == 0) - settings_add_string(hdlg, IDC_COMBO_FD_TYPE, win_get_string(IDS_5376)); - else { - mbstowcs(szText, fdd_getname(i), strlen(fdd_getname(i)) + 1); - settings_add_string(hdlg, IDC_COMBO_FD_TYPE, (LPARAM) szText); - } - } - settings_set_cur_sel(hdlg, IDC_COMBO_FD_TYPE, temp_fdd_types[lv1_current_sel]); + lv1_current_sel = 0; + win_settings_floppy_drives_init_columns(hdlg); + image_list_init(hdlg, IDC_LIST_FLOPPY_DRIVES, (const uint8_t *) fd_icons); + win_settings_floppy_drives_recalc_list(hdlg); + settings_listview_select(hdlg, IDC_LIST_FLOPPY_DRIVES, 0); + for (i = 0; i < 14; i++) { + if (i == 0) + settings_add_string(hdlg, IDC_COMBO_FD_TYPE, win_get_string(IDS_5376)); + else { + mbstowcs(szText, fdd_getname(i), strlen(fdd_getname(i)) + 1); + settings_add_string(hdlg, IDC_COMBO_FD_TYPE, (LPARAM) szText); + } + } + settings_set_cur_sel(hdlg, IDC_COMBO_FD_TYPE, temp_fdd_types[lv1_current_sel]); - settings_set_check(hdlg, IDC_CHECKTURBO, temp_fdd_turbo[lv1_current_sel]); - settings_set_check(hdlg, IDC_CHECKBPB, temp_fdd_check_bpb[lv1_current_sel]); + settings_set_check(hdlg, IDC_CHECKTURBO, temp_fdd_turbo[lv1_current_sel]); + settings_set_check(hdlg, IDC_CHECKBPB, temp_fdd_check_bpb[lv1_current_sel]); - settings_listview_enable_styles(hdlg, IDC_LIST_FLOPPY_DRIVES); + settings_listview_enable_styles(hdlg, IDC_LIST_FLOPPY_DRIVES); - lv2_current_sel = 0; - win_settings_cdrom_drives_init_columns(hdlg); - image_list_init(hdlg, IDC_LIST_CDROM_DRIVES, (const uint8_t *) cd_icons); - win_settings_cdrom_drives_recalc_list(hdlg); - settings_listview_select(hdlg, IDC_LIST_CDROM_DRIVES, 0); - cdrom_add_locations(hdlg); + lv2_current_sel = 0; + win_settings_cdrom_drives_init_columns(hdlg); + image_list_init(hdlg, IDC_LIST_CDROM_DRIVES, (const uint8_t *) cd_icons); + win_settings_cdrom_drives_recalc_list(hdlg); + settings_listview_select(hdlg, IDC_LIST_CDROM_DRIVES, 0); + cdrom_add_locations(hdlg); - switch (temp_cdrom[lv2_current_sel].bus_type) { - case CDROM_BUS_DISABLED: - default: - b = 0; - break; - case CDROM_BUS_ATAPI: - b = 1; - break; - case CDROM_BUS_SCSI: - b = 2; - break; - } - settings_set_cur_sel(hdlg, IDC_COMBO_CD_BUS, b); - cdrom_recalc_location_controls(hdlg, 0); + switch (temp_cdrom[lv2_current_sel].bus_type) { + case CDROM_BUS_DISABLED: + default: + b = 0; + break; + case CDROM_BUS_ATAPI: + b = 1; + break; + case CDROM_BUS_SCSI: + b = 2; + break; + } + settings_set_cur_sel(hdlg, IDC_COMBO_CD_BUS, b); + cdrom_recalc_location_controls(hdlg, 0); - settings_listview_enable_styles(hdlg, IDC_LIST_CDROM_DRIVES); + settings_listview_enable_styles(hdlg, IDC_LIST_CDROM_DRIVES); - ignore_change = 0; - return TRUE; + ignore_change = 0; + return TRUE; - case WM_NOTIFY: - if (ignore_change) - return FALSE; + case WM_NOTIFY: + if (ignore_change) + return FALSE; - if ((((LPNMHDR)lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR)lParam)->idFrom == IDC_LIST_FLOPPY_DRIVES)) { - old_sel = lv1_current_sel; - lv1_current_sel = get_selected_drive(hdlg, IDC_LIST_FLOPPY_DRIVES); - if (lv1_current_sel == old_sel) - return FALSE; - ignore_change = 1; - settings_set_cur_sel(hdlg, IDC_COMBO_FD_TYPE, temp_fdd_types[lv1_current_sel]); - settings_set_check(hdlg, IDC_CHECKTURBO, temp_fdd_turbo[lv1_current_sel]); - settings_set_check(hdlg, IDC_CHECKBPB, temp_fdd_check_bpb[lv1_current_sel]); - ignore_change = 0; - } else if ((((LPNMHDR)lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR)lParam)->idFrom == IDC_LIST_CDROM_DRIVES)) { - old_sel = lv2_current_sel; - lv2_current_sel = get_selected_drive(hdlg, IDC_LIST_CDROM_DRIVES); - if (lv2_current_sel == old_sel) - return FALSE; - ignore_change = 1; + if ((((LPNMHDR) lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR) lParam)->idFrom == IDC_LIST_FLOPPY_DRIVES)) { + old_sel = lv1_current_sel; + lv1_current_sel = get_selected_drive(hdlg, IDC_LIST_FLOPPY_DRIVES); + if (lv1_current_sel == old_sel) + return FALSE; + ignore_change = 1; + settings_set_cur_sel(hdlg, IDC_COMBO_FD_TYPE, temp_fdd_types[lv1_current_sel]); + settings_set_check(hdlg, IDC_CHECKTURBO, temp_fdd_turbo[lv1_current_sel]); + settings_set_check(hdlg, IDC_CHECKBPB, temp_fdd_check_bpb[lv1_current_sel]); + ignore_change = 0; + } else if ((((LPNMHDR) lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR) lParam)->idFrom == IDC_LIST_CDROM_DRIVES)) { + old_sel = lv2_current_sel; + lv2_current_sel = get_selected_drive(hdlg, IDC_LIST_CDROM_DRIVES); + if (lv2_current_sel == old_sel) + return FALSE; + ignore_change = 1; - switch (temp_cdrom[lv2_current_sel].bus_type) { - case CDROM_BUS_DISABLED: - default: - b = 0; - break; - case CDROM_BUS_ATAPI: - b = 1; - break; - case CDROM_BUS_SCSI: - b = 2; - break; - } - settings_set_cur_sel(hdlg, IDC_COMBO_CD_BUS, b); + switch (temp_cdrom[lv2_current_sel].bus_type) { + case CDROM_BUS_DISABLED: + default: + b = 0; + break; + case CDROM_BUS_ATAPI: + b = 1; + break; + case CDROM_BUS_SCSI: + b = 2; + break; + } + settings_set_cur_sel(hdlg, IDC_COMBO_CD_BUS, b); - cdrom_recalc_location_controls(hdlg, 0); - ignore_change = 0; - } - break; + cdrom_recalc_location_controls(hdlg, 0); + ignore_change = 0; + } + break; - case WM_COMMAND: - if (ignore_change) - return FALSE; + case WM_COMMAND: + if (ignore_change) + return FALSE; - ignore_change = 1; - switch (LOWORD(wParam)) { - case IDC_COMBO_FD_TYPE: - temp_fdd_types[lv1_current_sel] = settings_get_cur_sel(hdlg, IDC_COMBO_FD_TYPE); - win_settings_floppy_drives_update_item(hdlg, lv1_current_sel); - break; + ignore_change = 1; + switch (LOWORD(wParam)) { + case IDC_COMBO_FD_TYPE: + temp_fdd_types[lv1_current_sel] = settings_get_cur_sel(hdlg, IDC_COMBO_FD_TYPE); + win_settings_floppy_drives_update_item(hdlg, lv1_current_sel); + break; - case IDC_CHECKTURBO: - temp_fdd_turbo[lv1_current_sel] = settings_get_check(hdlg, IDC_CHECKTURBO); - win_settings_floppy_drives_update_item(hdlg, lv1_current_sel); - break; + case IDC_CHECKTURBO: + temp_fdd_turbo[lv1_current_sel] = settings_get_check(hdlg, IDC_CHECKTURBO); + win_settings_floppy_drives_update_item(hdlg, lv1_current_sel); + break; - case IDC_CHECKBPB: - temp_fdd_check_bpb[lv1_current_sel] = settings_get_check(hdlg, IDC_CHECKBPB); - win_settings_floppy_drives_update_item(hdlg, lv1_current_sel); - break; + case IDC_CHECKBPB: + temp_fdd_check_bpb[lv1_current_sel] = settings_get_check(hdlg, IDC_CHECKBPB); + win_settings_floppy_drives_update_item(hdlg, lv1_current_sel); + break; - case IDC_COMBO_CD_BUS: - b = settings_get_cur_sel(hdlg, IDC_COMBO_CD_BUS); - switch (b) { - case 0: - b2 = CDROM_BUS_DISABLED; - break; - case 1: - b2 = CDROM_BUS_ATAPI; - break; - case 2: - b2 = CDROM_BUS_SCSI; - break; - } - if (b2 == temp_cdrom[lv2_current_sel].bus_type) - break; - cdrom_untrack(lv2_current_sel); - assign = (temp_cdrom[lv2_current_sel].bus_type == b2) ? 0 : 1; - if (temp_cdrom[lv2_current_sel].bus_type == CDROM_BUS_DISABLED) - temp_cdrom[lv2_current_sel].speed = 8; - temp_cdrom[lv2_current_sel].bus_type = b2; - cdrom_recalc_location_controls(hdlg, assign); - cdrom_track(lv2_current_sel); - win_settings_cdrom_drives_update_item(hdlg, lv2_current_sel); - break; + case IDC_COMBO_CD_BUS: + b = settings_get_cur_sel(hdlg, IDC_COMBO_CD_BUS); + switch (b) { + case 0: + b2 = CDROM_BUS_DISABLED; + break; + case 1: + b2 = CDROM_BUS_ATAPI; + break; + case 2: + b2 = CDROM_BUS_SCSI; + break; + } + if (b2 == temp_cdrom[lv2_current_sel].bus_type) + break; + cdrom_untrack(lv2_current_sel); + assign = (temp_cdrom[lv2_current_sel].bus_type == b2) ? 0 : 1; + if (temp_cdrom[lv2_current_sel].bus_type == CDROM_BUS_DISABLED) + temp_cdrom[lv2_current_sel].speed = 8; + temp_cdrom[lv2_current_sel].bus_type = b2; + cdrom_recalc_location_controls(hdlg, assign); + cdrom_track(lv2_current_sel); + win_settings_cdrom_drives_update_item(hdlg, lv2_current_sel); + break; - case IDC_COMBO_CD_ID: - cdrom_untrack(lv2_current_sel); - temp_cdrom[lv2_current_sel].scsi_device_id = settings_get_cur_sel(hdlg, IDC_COMBO_CD_ID); - cdrom_track(lv2_current_sel); - win_settings_cdrom_drives_update_item(hdlg, lv2_current_sel); - break; + case IDC_COMBO_CD_ID: + cdrom_untrack(lv2_current_sel); + temp_cdrom[lv2_current_sel].scsi_device_id = settings_get_cur_sel(hdlg, IDC_COMBO_CD_ID); + cdrom_track(lv2_current_sel); + win_settings_cdrom_drives_update_item(hdlg, lv2_current_sel); + break; - case IDC_COMBO_CD_CHANNEL_IDE: - cdrom_untrack(lv2_current_sel); - temp_cdrom[lv2_current_sel].ide_channel = settings_get_cur_sel(hdlg, IDC_COMBO_CD_CHANNEL_IDE); - cdrom_track(lv2_current_sel); - win_settings_cdrom_drives_update_item(hdlg, lv2_current_sel); - break; + case IDC_COMBO_CD_CHANNEL_IDE: + cdrom_untrack(lv2_current_sel); + temp_cdrom[lv2_current_sel].ide_channel = settings_get_cur_sel(hdlg, IDC_COMBO_CD_CHANNEL_IDE); + cdrom_track(lv2_current_sel); + win_settings_cdrom_drives_update_item(hdlg, lv2_current_sel); + break; - case IDC_COMBO_CD_SPEED: - temp_cdrom[lv2_current_sel].speed = settings_get_cur_sel(hdlg, IDC_COMBO_CD_SPEED) + 1; - win_settings_cdrom_drives_update_item(hdlg, lv2_current_sel); - break; - } - ignore_change = 0; + case IDC_COMBO_CD_SPEED: + temp_cdrom[lv2_current_sel].speed = settings_get_cur_sel(hdlg, IDC_COMBO_CD_SPEED) + 1; + win_settings_cdrom_drives_update_item(hdlg, lv2_current_sel); + break; + } + ignore_change = 0; - case WM_DPICHANGED_AFTERPARENT: - win_settings_floppy_drives_resize_columns(hdlg); - image_list_init(hdlg, IDC_LIST_FLOPPY_DRIVES, (const uint8_t *) fd_icons); - win_settings_cdrom_drives_resize_columns(hdlg); - image_list_init(hdlg, IDC_LIST_CDROM_DRIVES, (const uint8_t *) cd_icons); - break; - default: - return FALSE; + case WM_DPICHANGED_AFTERPARENT: + win_settings_floppy_drives_resize_columns(hdlg); + image_list_init(hdlg, IDC_LIST_FLOPPY_DRIVES, (const uint8_t *) fd_icons); + win_settings_cdrom_drives_resize_columns(hdlg); + image_list_init(hdlg, IDC_LIST_CDROM_DRIVES, (const uint8_t *) cd_icons); + break; + default: + return FALSE; } return FALSE; } - #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK #else @@ -4707,227 +4617,226 @@ static BOOL CALLBACK #endif win_settings_other_removable_devices_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { - int old_sel = 0, b = 0, assign = 0; - uint32_t b2 = 0; - const uint8_t mo_icons[3] = { 251, 56, 0 }; + int old_sel = 0, b = 0, assign = 0; + uint32_t b2 = 0; + const uint8_t mo_icons[3] = { 251, 56, 0 }; const uint8_t zip_icons[3] = { 250, 48, 0 }; switch (message) { - case WM_INITDIALOG: - ignore_change = 1; + case WM_INITDIALOG: + ignore_change = 1; - lv1_current_sel = 0; - win_settings_mo_drives_init_columns(hdlg); - image_list_init(hdlg, IDC_LIST_MO_DRIVES, (const uint8_t *) mo_icons); - win_settings_mo_drives_recalc_list(hdlg); - settings_listview_select(hdlg, IDC_LIST_MO_DRIVES, 0); - mo_add_locations(hdlg); + lv1_current_sel = 0; + win_settings_mo_drives_init_columns(hdlg); + image_list_init(hdlg, IDC_LIST_MO_DRIVES, (const uint8_t *) mo_icons); + win_settings_mo_drives_recalc_list(hdlg); + settings_listview_select(hdlg, IDC_LIST_MO_DRIVES, 0); + mo_add_locations(hdlg); - switch (temp_mo_drives[lv1_current_sel].bus_type) { - case MO_BUS_DISABLED: - default: - b = 0; - break; - case MO_BUS_ATAPI: - b = 1; - break; - case MO_BUS_SCSI: - b = 2; - break; - } - settings_set_cur_sel(hdlg, IDC_COMBO_MO_BUS, b); - mo_recalc_location_controls(hdlg, 0); + switch (temp_mo_drives[lv1_current_sel].bus_type) { + case MO_BUS_DISABLED: + default: + b = 0; + break; + case MO_BUS_ATAPI: + b = 1; + break; + case MO_BUS_SCSI: + b = 2; + break; + } + settings_set_cur_sel(hdlg, IDC_COMBO_MO_BUS, b); + mo_recalc_location_controls(hdlg, 0); - settings_listview_enable_styles(hdlg, IDC_LIST_MO_DRIVES); + settings_listview_enable_styles(hdlg, IDC_LIST_MO_DRIVES); - lv2_current_sel = 0; - win_settings_zip_drives_init_columns(hdlg); - image_list_init(hdlg, IDC_LIST_ZIP_DRIVES, (const uint8_t *) zip_icons); - win_settings_zip_drives_recalc_list(hdlg); - settings_listview_select(hdlg, IDC_LIST_ZIP_DRIVES, 0); - zip_add_locations(hdlg); + lv2_current_sel = 0; + win_settings_zip_drives_init_columns(hdlg); + image_list_init(hdlg, IDC_LIST_ZIP_DRIVES, (const uint8_t *) zip_icons); + win_settings_zip_drives_recalc_list(hdlg); + settings_listview_select(hdlg, IDC_LIST_ZIP_DRIVES, 0); + zip_add_locations(hdlg); - switch (temp_zip_drives[lv2_current_sel].bus_type) { - case ZIP_BUS_DISABLED: - default: - b = 0; - break; - case ZIP_BUS_ATAPI: - b = 1; - break; - case ZIP_BUS_SCSI: - b = 2; - break; - } - settings_set_cur_sel(hdlg, IDC_COMBO_ZIP_BUS, b); - zip_recalc_location_controls(hdlg, 0); + switch (temp_zip_drives[lv2_current_sel].bus_type) { + case ZIP_BUS_DISABLED: + default: + b = 0; + break; + case ZIP_BUS_ATAPI: + b = 1; + break; + case ZIP_BUS_SCSI: + b = 2; + break; + } + settings_set_cur_sel(hdlg, IDC_COMBO_ZIP_BUS, b); + zip_recalc_location_controls(hdlg, 0); - settings_listview_enable_styles(hdlg, IDC_LIST_ZIP_DRIVES); + settings_listview_enable_styles(hdlg, IDC_LIST_ZIP_DRIVES); - ignore_change = 0; - return TRUE; + ignore_change = 0; + return TRUE; - case WM_NOTIFY: - if (ignore_change) - return FALSE; + case WM_NOTIFY: + if (ignore_change) + return FALSE; - if ((((LPNMHDR)lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR)lParam)->idFrom == IDC_LIST_MO_DRIVES)) { - old_sel = lv1_current_sel; - lv1_current_sel = get_selected_drive(hdlg, IDC_LIST_MO_DRIVES); - if (lv1_current_sel == old_sel) - return FALSE; - ignore_change = 1; + if ((((LPNMHDR) lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR) lParam)->idFrom == IDC_LIST_MO_DRIVES)) { + old_sel = lv1_current_sel; + lv1_current_sel = get_selected_drive(hdlg, IDC_LIST_MO_DRIVES); + if (lv1_current_sel == old_sel) + return FALSE; + ignore_change = 1; - switch (temp_mo_drives[lv1_current_sel].bus_type) { - case MO_BUS_DISABLED: - default: - b = 0; - break; - case MO_BUS_ATAPI: - b = 1; - break; - case MO_BUS_SCSI: - b = 2; - break; - } - settings_set_cur_sel(hdlg, IDC_COMBO_MO_BUS, b); + switch (temp_mo_drives[lv1_current_sel].bus_type) { + case MO_BUS_DISABLED: + default: + b = 0; + break; + case MO_BUS_ATAPI: + b = 1; + break; + case MO_BUS_SCSI: + b = 2; + break; + } + settings_set_cur_sel(hdlg, IDC_COMBO_MO_BUS, b); - mo_recalc_location_controls(hdlg, 0); - ignore_change = 0; - } else if ((((LPNMHDR)lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR)lParam)->idFrom == IDC_LIST_ZIP_DRIVES)) { - old_sel = lv2_current_sel; - lv2_current_sel = get_selected_drive(hdlg, IDC_LIST_ZIP_DRIVES); - if (lv2_current_sel == old_sel) - return FALSE; - ignore_change = 1; + mo_recalc_location_controls(hdlg, 0); + ignore_change = 0; + } else if ((((LPNMHDR) lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR) lParam)->idFrom == IDC_LIST_ZIP_DRIVES)) { + old_sel = lv2_current_sel; + lv2_current_sel = get_selected_drive(hdlg, IDC_LIST_ZIP_DRIVES); + if (lv2_current_sel == old_sel) + return FALSE; + ignore_change = 1; - switch (temp_zip_drives[lv2_current_sel].bus_type) { - case ZIP_BUS_DISABLED: - default: - b = 0; - break; - case ZIP_BUS_ATAPI: - b = 1; - break; - case ZIP_BUS_SCSI: - b = 2; - break; - } - settings_set_cur_sel(hdlg, IDC_COMBO_ZIP_BUS, b); + switch (temp_zip_drives[lv2_current_sel].bus_type) { + case ZIP_BUS_DISABLED: + default: + b = 0; + break; + case ZIP_BUS_ATAPI: + b = 1; + break; + case ZIP_BUS_SCSI: + b = 2; + break; + } + settings_set_cur_sel(hdlg, IDC_COMBO_ZIP_BUS, b); - zip_recalc_location_controls(hdlg, 0); - ignore_change = 0; - } - break; + zip_recalc_location_controls(hdlg, 0); + ignore_change = 0; + } + break; - case WM_COMMAND: - if (ignore_change) - return FALSE; + case WM_COMMAND: + if (ignore_change) + return FALSE; - ignore_change = 1; - switch (LOWORD(wParam)) { - case IDC_COMBO_MO_BUS: - b = settings_get_cur_sel(hdlg, IDC_COMBO_MO_BUS); - switch (b) { - case 0: - b2 = MO_BUS_DISABLED; - break; - case 1: - b2 = MO_BUS_ATAPI; - break; - case 2: - b2 = MO_BUS_SCSI; - break; - } - if (b2 == temp_mo_drives[lv1_current_sel].bus_type) - break; - mo_untrack(lv1_current_sel); - assign = (temp_mo_drives[lv1_current_sel].bus_type == b2) ? 0 : 1; - if (temp_mo_drives[lv1_current_sel].bus_type == MO_BUS_DISABLED) - temp_mo_drives[lv1_current_sel].type = 0; - temp_mo_drives[lv1_current_sel].bus_type = b2; - mo_recalc_location_controls(hdlg, assign); - mo_track(lv1_current_sel); - win_settings_mo_drives_update_item(hdlg, lv1_current_sel); - break; + ignore_change = 1; + switch (LOWORD(wParam)) { + case IDC_COMBO_MO_BUS: + b = settings_get_cur_sel(hdlg, IDC_COMBO_MO_BUS); + switch (b) { + case 0: + b2 = MO_BUS_DISABLED; + break; + case 1: + b2 = MO_BUS_ATAPI; + break; + case 2: + b2 = MO_BUS_SCSI; + break; + } + if (b2 == temp_mo_drives[lv1_current_sel].bus_type) + break; + mo_untrack(lv1_current_sel); + assign = (temp_mo_drives[lv1_current_sel].bus_type == b2) ? 0 : 1; + if (temp_mo_drives[lv1_current_sel].bus_type == MO_BUS_DISABLED) + temp_mo_drives[lv1_current_sel].type = 0; + temp_mo_drives[lv1_current_sel].bus_type = b2; + mo_recalc_location_controls(hdlg, assign); + mo_track(lv1_current_sel); + win_settings_mo_drives_update_item(hdlg, lv1_current_sel); + break; - case IDC_COMBO_MO_ID: - mo_untrack(lv1_current_sel); - temp_mo_drives[lv1_current_sel].scsi_device_id = settings_get_cur_sel(hdlg, IDC_COMBO_MO_ID); - mo_track(lv1_current_sel); - win_settings_mo_drives_update_item(hdlg, lv1_current_sel); - break; + case IDC_COMBO_MO_ID: + mo_untrack(lv1_current_sel); + temp_mo_drives[lv1_current_sel].scsi_device_id = settings_get_cur_sel(hdlg, IDC_COMBO_MO_ID); + mo_track(lv1_current_sel); + win_settings_mo_drives_update_item(hdlg, lv1_current_sel); + break; - case IDC_COMBO_MO_CHANNEL_IDE: - mo_untrack(lv1_current_sel); - temp_mo_drives[lv1_current_sel].ide_channel = settings_get_cur_sel(hdlg, IDC_COMBO_MO_CHANNEL_IDE); - mo_track(lv1_current_sel); - win_settings_mo_drives_update_item(hdlg, lv1_current_sel); - break; + case IDC_COMBO_MO_CHANNEL_IDE: + mo_untrack(lv1_current_sel); + temp_mo_drives[lv1_current_sel].ide_channel = settings_get_cur_sel(hdlg, IDC_COMBO_MO_CHANNEL_IDE); + mo_track(lv1_current_sel); + win_settings_mo_drives_update_item(hdlg, lv1_current_sel); + break; - case IDC_COMBO_MO_TYPE: - temp_mo_drives[lv1_current_sel].type = settings_get_cur_sel(hdlg, IDC_COMBO_MO_TYPE); - win_settings_mo_drives_update_item(hdlg, lv1_current_sel); - break; + case IDC_COMBO_MO_TYPE: + temp_mo_drives[lv1_current_sel].type = settings_get_cur_sel(hdlg, IDC_COMBO_MO_TYPE); + win_settings_mo_drives_update_item(hdlg, lv1_current_sel); + break; - case IDC_COMBO_ZIP_BUS: - b = settings_get_cur_sel(hdlg, IDC_COMBO_ZIP_BUS); - switch (b) { - case 0: - b2 = ZIP_BUS_DISABLED; - break; - case 1: - b2 = ZIP_BUS_ATAPI; - break; - case 2: - b2 = ZIP_BUS_SCSI; - break; - } - if (b2 == temp_zip_drives[lv2_current_sel].bus_type) - break; - zip_untrack(lv2_current_sel); - assign = (temp_zip_drives[lv2_current_sel].bus_type == b2) ? 0 : 1; - temp_zip_drives[lv2_current_sel].bus_type = b2; - zip_recalc_location_controls(hdlg, assign); - zip_track(lv2_current_sel); - win_settings_zip_drives_update_item(hdlg, lv2_current_sel); - break; + case IDC_COMBO_ZIP_BUS: + b = settings_get_cur_sel(hdlg, IDC_COMBO_ZIP_BUS); + switch (b) { + case 0: + b2 = ZIP_BUS_DISABLED; + break; + case 1: + b2 = ZIP_BUS_ATAPI; + break; + case 2: + b2 = ZIP_BUS_SCSI; + break; + } + if (b2 == temp_zip_drives[lv2_current_sel].bus_type) + break; + zip_untrack(lv2_current_sel); + assign = (temp_zip_drives[lv2_current_sel].bus_type == b2) ? 0 : 1; + temp_zip_drives[lv2_current_sel].bus_type = b2; + zip_recalc_location_controls(hdlg, assign); + zip_track(lv2_current_sel); + win_settings_zip_drives_update_item(hdlg, lv2_current_sel); + break; - case IDC_COMBO_ZIP_ID: - zip_untrack(lv2_current_sel); - temp_zip_drives[lv2_current_sel].scsi_device_id = settings_get_cur_sel(hdlg, IDC_COMBO_ZIP_ID); - zip_track(lv2_current_sel); - win_settings_zip_drives_update_item(hdlg, lv2_current_sel); - break; + case IDC_COMBO_ZIP_ID: + zip_untrack(lv2_current_sel); + temp_zip_drives[lv2_current_sel].scsi_device_id = settings_get_cur_sel(hdlg, IDC_COMBO_ZIP_ID); + zip_track(lv2_current_sel); + win_settings_zip_drives_update_item(hdlg, lv2_current_sel); + break; - case IDC_COMBO_ZIP_CHANNEL_IDE: - zip_untrack(lv2_current_sel); - temp_zip_drives[lv2_current_sel].ide_channel = settings_get_cur_sel(hdlg, IDC_COMBO_ZIP_CHANNEL_IDE); - zip_track(lv2_current_sel); - win_settings_zip_drives_update_item(hdlg, lv2_current_sel); - break; + case IDC_COMBO_ZIP_CHANNEL_IDE: + zip_untrack(lv2_current_sel); + temp_zip_drives[lv2_current_sel].ide_channel = settings_get_cur_sel(hdlg, IDC_COMBO_ZIP_CHANNEL_IDE); + zip_track(lv2_current_sel); + win_settings_zip_drives_update_item(hdlg, lv2_current_sel); + break; - case IDC_CHECK250: - temp_zip_drives[lv2_current_sel].is_250 = settings_get_check(hdlg, IDC_CHECK250); - win_settings_zip_drives_update_item(hdlg, lv2_current_sel); - break; - } - ignore_change = 0; + case IDC_CHECK250: + temp_zip_drives[lv2_current_sel].is_250 = settings_get_check(hdlg, IDC_CHECK250); + win_settings_zip_drives_update_item(hdlg, lv2_current_sel); + break; + } + ignore_change = 0; - case WM_DPICHANGED_AFTERPARENT: - win_settings_mo_drives_resize_columns(hdlg); - image_list_init(hdlg, IDC_LIST_MO_DRIVES, (const uint8_t *) mo_icons); - win_settings_zip_drives_resize_columns(hdlg); - image_list_init(hdlg, IDC_LIST_ZIP_DRIVES, (const uint8_t *) zip_icons); - break; - default: - return FALSE; + case WM_DPICHANGED_AFTERPARENT: + win_settings_mo_drives_resize_columns(hdlg); + image_list_init(hdlg, IDC_LIST_MO_DRIVES, (const uint8_t *) mo_icons); + win_settings_zip_drives_resize_columns(hdlg); + image_list_init(hdlg, IDC_LIST_ZIP_DRIVES, (const uint8_t *) zip_icons); + break; + default: + return FALSE; } return FALSE; } - #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK #else @@ -4935,196 +4844,197 @@ static BOOL CALLBACK #endif win_settings_peripherals_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { - int c, d; - int e; - LPTSTR lptsTemp; - char *stransi; + int c, d; + int e; + LPTSTR lptsTemp; + char *stransi; const device_t *dev; switch (message) { - case WM_INITDIALOG: - lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); - stransi = (char *) malloc(512); + case WM_INITDIALOG: + lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); + stransi = (char *) malloc(512); - /* Populate the ISA RTC card dropdown. */ - e = 0; - settings_reset_content(hdlg, IDC_COMBO_ISARTC); - for (d = 0; ; d++) { - generate_device_name(isartc_get_device(d), isartc_get_internal_name(d), 0); + /* Populate the ISA RTC card dropdown. */ + e = 0; + settings_reset_content(hdlg, IDC_COMBO_ISARTC); + for (d = 0;; d++) { + generate_device_name(isartc_get_device(d), isartc_get_internal_name(d), 0); - if (!device_name[0]) - break; - dev = isartc_get_device(d); - if (device_is_valid(dev, temp_machine)) { - if (d == 0) { - settings_add_string(hdlg, IDC_COMBO_ISARTC, win_get_string(IDS_2103)); - settings_set_cur_sel(hdlg, IDC_COMBO_ISARTC, 0); - } else - settings_add_string(hdlg, IDC_COMBO_ISARTC, (LPARAM) device_name); - settings_list_to_device[1][e] = d; - if (d == temp_isartc) - settings_set_cur_sel(hdlg, IDC_COMBO_ISARTC, e); - e++; - } - } - settings_enable_window(hdlg, IDC_COMBO_ISARTC, machine_has_bus(temp_machine, MACHINE_BUS_ISA)); - settings_enable_window(hdlg, IDC_CONFIGURE_ISARTC, ((temp_isartc != 0) && machine_has_bus(temp_machine, MACHINE_BUS_ISA))); + if (!device_name[0]) + break; + dev = isartc_get_device(d); + if (device_is_valid(dev, temp_machine)) { + if (d == 0) { + settings_add_string(hdlg, IDC_COMBO_ISARTC, win_get_string(IDS_2103)); + settings_set_cur_sel(hdlg, IDC_COMBO_ISARTC, 0); + } else + settings_add_string(hdlg, IDC_COMBO_ISARTC, (LPARAM) device_name); + settings_list_to_device[1][e] = d; + if (d == temp_isartc) + settings_set_cur_sel(hdlg, IDC_COMBO_ISARTC, e); + e++; + } + } + settings_enable_window(hdlg, IDC_COMBO_ISARTC, machine_has_bus(temp_machine, MACHINE_BUS_ISA)); + settings_enable_window(hdlg, IDC_CONFIGURE_ISARTC, ((temp_isartc != 0) && machine_has_bus(temp_machine, MACHINE_BUS_ISA))); - /* Populate the ISA memory card dropdowns. */ - for (c = 0; c < ISAMEM_MAX; c++) { - e = 0; - settings_reset_content(hdlg, IDC_COMBO_ISAMEM_1 + c); - for (d = 0; ; d++) { - generate_device_name(isamem_get_device(d), (char *) isamem_get_internal_name(d), 0); + /* Populate the ISA memory card dropdowns. */ + for (c = 0; c < ISAMEM_MAX; c++) { + e = 0; + settings_reset_content(hdlg, IDC_COMBO_ISAMEM_1 + c); + for (d = 0;; d++) { + generate_device_name(isamem_get_device(d), (char *) isamem_get_internal_name(d), 0); - if (!device_name[0]) - break; + if (!device_name[0]) + break; - dev = isamem_get_device(d); - if (device_is_valid(dev, temp_machine)) { - if (d == 0) { - settings_add_string(hdlg, IDC_COMBO_ISAMEM_1 + c, win_get_string(IDS_2103)); - settings_set_cur_sel(hdlg, IDC_COMBO_ISAMEM_1 + c, 0); - } else - settings_add_string(hdlg, IDC_COMBO_ISAMEM_1 + c, (LPARAM) device_name); - settings_list_to_device[0][e] = d; - if (d == temp_isamem[c]) - settings_set_cur_sel(hdlg, IDC_COMBO_ISAMEM_1 + c, e); - e++; - } - } - settings_enable_window(hdlg, IDC_COMBO_ISAMEM_1 + c, machine_has_bus(temp_machine, MACHINE_BUS_ISA)); - settings_enable_window(hdlg, IDC_CONFIGURE_ISAMEM_1 + c, ((temp_isamem[c] != 0) && machine_has_bus(temp_machine, MACHINE_BUS_ISA))); - } + dev = isamem_get_device(d); + if (device_is_valid(dev, temp_machine)) { + if (d == 0) { + settings_add_string(hdlg, IDC_COMBO_ISAMEM_1 + c, win_get_string(IDS_2103)); + settings_set_cur_sel(hdlg, IDC_COMBO_ISAMEM_1 + c, 0); + } else + settings_add_string(hdlg, IDC_COMBO_ISAMEM_1 + c, (LPARAM) device_name); + settings_list_to_device[0][e] = d; + if (d == temp_isamem[c]) + settings_set_cur_sel(hdlg, IDC_COMBO_ISAMEM_1 + c, e); + e++; + } + } + settings_enable_window(hdlg, IDC_COMBO_ISAMEM_1 + c, machine_has_bus(temp_machine, MACHINE_BUS_ISA)); + settings_enable_window(hdlg, IDC_CONFIGURE_ISAMEM_1 + c, ((temp_isamem[c] != 0) && machine_has_bus(temp_machine, MACHINE_BUS_ISA))); + } - settings_enable_window(hdlg, IDC_CHECK_BUGGER, machine_has_bus(temp_machine, MACHINE_BUS_ISA)); - settings_set_check(hdlg, IDC_CHECK_BUGGER, temp_bugger); - settings_set_check(hdlg, IDC_CHECK_POSTCARD, temp_postcard); + settings_enable_window(hdlg, IDC_CHECK_BUGGER, machine_has_bus(temp_machine, MACHINE_BUS_ISA)); + settings_set_check(hdlg, IDC_CHECK_BUGGER, temp_bugger); + settings_set_check(hdlg, IDC_CHECK_POSTCARD, temp_postcard); - free(stransi); - free(lptsTemp); + free(stransi); + free(lptsTemp); - return TRUE; + return TRUE; - case WM_COMMAND: - switch (LOWORD(wParam)) { - case IDC_CONFIGURE_ISARTC: - temp_isartc = settings_list_to_device[1][settings_get_cur_sel(hdlg, IDC_COMBO_ISARTC)]; - temp_deviceconfig |= deviceconfig_open(hdlg, (void *)isartc_get_device(temp_isartc)); - break; + case WM_COMMAND: + switch (LOWORD(wParam)) { + case IDC_CONFIGURE_ISARTC: + temp_isartc = settings_list_to_device[1][settings_get_cur_sel(hdlg, IDC_COMBO_ISARTC)]; + temp_deviceconfig |= deviceconfig_open(hdlg, (void *) isartc_get_device(temp_isartc)); + break; - case IDC_COMBO_ISARTC: - temp_isartc = settings_list_to_device[1][settings_get_cur_sel(hdlg, IDC_COMBO_ISARTC)]; - settings_enable_window(hdlg, IDC_CONFIGURE_ISARTC, temp_isartc != 0); - break; + case IDC_COMBO_ISARTC: + temp_isartc = settings_list_to_device[1][settings_get_cur_sel(hdlg, IDC_COMBO_ISARTC)]; + settings_enable_window(hdlg, IDC_CONFIGURE_ISARTC, temp_isartc != 0); + break; - case IDC_COMBO_ISAMEM_1: case IDC_COMBO_ISAMEM_2: - case IDC_COMBO_ISAMEM_3: case IDC_COMBO_ISAMEM_4: - c = LOWORD(wParam) - IDC_COMBO_ISAMEM_1; - temp_isamem[c] = settings_list_to_device[0][settings_get_cur_sel(hdlg, LOWORD(wParam))]; - settings_enable_window(hdlg, IDC_CONFIGURE_ISAMEM_1 + c, temp_isamem[c] != 0); - break; + case IDC_COMBO_ISAMEM_1: + case IDC_COMBO_ISAMEM_2: + case IDC_COMBO_ISAMEM_3: + case IDC_COMBO_ISAMEM_4: + c = LOWORD(wParam) - IDC_COMBO_ISAMEM_1; + temp_isamem[c] = settings_list_to_device[0][settings_get_cur_sel(hdlg, LOWORD(wParam))]; + settings_enable_window(hdlg, IDC_CONFIGURE_ISAMEM_1 + c, temp_isamem[c] != 0); + break; - case IDC_CONFIGURE_ISAMEM_1: case IDC_CONFIGURE_ISAMEM_2: - case IDC_CONFIGURE_ISAMEM_3: case IDC_CONFIGURE_ISAMEM_4: - c = LOWORD(wParam) - IDC_CONFIGURE_ISAMEM_1; - temp_deviceconfig |= deviceconfig_inst_open(hdlg, (void *)isamem_get_device(temp_isamem[c]), c + 1); - break; - } - return FALSE; + case IDC_CONFIGURE_ISAMEM_1: + case IDC_CONFIGURE_ISAMEM_2: + case IDC_CONFIGURE_ISAMEM_3: + case IDC_CONFIGURE_ISAMEM_4: + c = LOWORD(wParam) - IDC_CONFIGURE_ISAMEM_1; + temp_deviceconfig |= deviceconfig_inst_open(hdlg, (void *) isamem_get_device(temp_isamem[c]), c + 1); + break; + } + return FALSE; - case WM_SAVESETTINGS: - temp_isartc = settings_list_to_device[1][settings_get_cur_sel(hdlg, IDC_COMBO_ISARTC)]; - for (c = 0; c < ISAMEM_MAX; c++) { - temp_isamem[c] = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_ISAMEM_1 + c)]; - } - temp_bugger = settings_get_check(hdlg, IDC_CHECK_BUGGER); - temp_postcard = settings_get_check(hdlg, IDC_CHECK_POSTCARD); + case WM_SAVESETTINGS: + temp_isartc = settings_list_to_device[1][settings_get_cur_sel(hdlg, IDC_COMBO_ISARTC)]; + for (c = 0; c < ISAMEM_MAX; c++) { + temp_isamem[c] = settings_list_to_device[0][settings_get_cur_sel(hdlg, IDC_COMBO_ISAMEM_1 + c)]; + } + temp_bugger = settings_get_check(hdlg, IDC_CHECK_BUGGER); + temp_postcard = settings_get_check(hdlg, IDC_CHECK_POSTCARD); - default: - return FALSE; + default: + return FALSE; } return FALSE; } - -void win_settings_show_child(HWND hwndParent, DWORD child_id) +void +win_settings_show_child(HWND hwndParent, DWORD child_id) { if (child_id == displayed_category) - return; + return; else - displayed_category = child_id; + displayed_category = child_id; SendMessage(hwndChildDialog, WM_SAVESETTINGS, 0, 0); DestroyWindow(hwndChildDialog); - switch(child_id) { - case SETTINGS_PAGE_MACHINE: - hwndChildDialog = CreateDialog(hinstance, (LPCWSTR)DLG_CFG_MACHINE, hwndParent, win_settings_machine_proc); - break; - case SETTINGS_PAGE_VIDEO: - hwndChildDialog = CreateDialog(hinstance, (LPCWSTR)DLG_CFG_VIDEO, hwndParent, win_settings_video_proc); - break; - case SETTINGS_PAGE_INPUT: - hwndChildDialog = CreateDialog(hinstance, (LPCWSTR)DLG_CFG_INPUT, hwndParent, win_settings_input_proc); - break; - case SETTINGS_PAGE_SOUND: - hwndChildDialog = CreateDialog(hinstance, (LPCWSTR)DLG_CFG_SOUND, hwndParent, win_settings_sound_proc); - break; - case SETTINGS_PAGE_NETWORK: - hwndChildDialog = CreateDialog(hinstance, (LPCWSTR)DLG_CFG_NETWORK, hwndParent, win_settings_network_proc); - break; - case SETTINGS_PAGE_PORTS: - hwndChildDialog = CreateDialog(hinstance, (LPCWSTR)DLG_CFG_PORTS, hwndParent, win_settings_ports_proc); - break; - case SETTINGS_PAGE_STORAGE: - hwndChildDialog = CreateDialog(hinstance, (LPCWSTR)DLG_CFG_STORAGE, hwndParent, win_settings_storage_proc); - break; - case SETTINGS_PAGE_HARD_DISKS: - hwndChildDialog = CreateDialog(hinstance, (LPCWSTR)DLG_CFG_HARD_DISKS, hwndParent, win_settings_hard_disks_proc); - break; - case SETTINGS_PAGE_FLOPPY_AND_CDROM_DRIVES: - hwndChildDialog = CreateDialog(hinstance, (LPCWSTR)DLG_CFG_FLOPPY_AND_CDROM_DRIVES, hwndParent, win_settings_floppy_and_cdrom_drives_proc); - break; - case SETTINGS_PAGE_OTHER_REMOVABLE_DEVICES: - hwndChildDialog = CreateDialog(hinstance, (LPCWSTR)DLG_CFG_OTHER_REMOVABLE_DEVICES, hwndParent, win_settings_other_removable_devices_proc); - break; - case SETTINGS_PAGE_PERIPHERALS: - hwndChildDialog = CreateDialog(hinstance, (LPCWSTR)DLG_CFG_PERIPHERALS, hwndParent, win_settings_peripherals_proc); - break; - default: - fatal("Invalid child dialog ID\n"); - return; + switch (child_id) { + case SETTINGS_PAGE_MACHINE: + hwndChildDialog = CreateDialog(hinstance, (LPCWSTR) DLG_CFG_MACHINE, hwndParent, win_settings_machine_proc); + break; + case SETTINGS_PAGE_VIDEO: + hwndChildDialog = CreateDialog(hinstance, (LPCWSTR) DLG_CFG_VIDEO, hwndParent, win_settings_video_proc); + break; + case SETTINGS_PAGE_INPUT: + hwndChildDialog = CreateDialog(hinstance, (LPCWSTR) DLG_CFG_INPUT, hwndParent, win_settings_input_proc); + break; + case SETTINGS_PAGE_SOUND: + hwndChildDialog = CreateDialog(hinstance, (LPCWSTR) DLG_CFG_SOUND, hwndParent, win_settings_sound_proc); + break; + case SETTINGS_PAGE_NETWORK: + hwndChildDialog = CreateDialog(hinstance, (LPCWSTR) DLG_CFG_NETWORK, hwndParent, win_settings_network_proc); + break; + case SETTINGS_PAGE_PORTS: + hwndChildDialog = CreateDialog(hinstance, (LPCWSTR) DLG_CFG_PORTS, hwndParent, win_settings_ports_proc); + break; + case SETTINGS_PAGE_STORAGE: + hwndChildDialog = CreateDialog(hinstance, (LPCWSTR) DLG_CFG_STORAGE, hwndParent, win_settings_storage_proc); + break; + case SETTINGS_PAGE_HARD_DISKS: + hwndChildDialog = CreateDialog(hinstance, (LPCWSTR) DLG_CFG_HARD_DISKS, hwndParent, win_settings_hard_disks_proc); + break; + case SETTINGS_PAGE_FLOPPY_AND_CDROM_DRIVES: + hwndChildDialog = CreateDialog(hinstance, (LPCWSTR) DLG_CFG_FLOPPY_AND_CDROM_DRIVES, hwndParent, win_settings_floppy_and_cdrom_drives_proc); + break; + case SETTINGS_PAGE_OTHER_REMOVABLE_DEVICES: + hwndChildDialog = CreateDialog(hinstance, (LPCWSTR) DLG_CFG_OTHER_REMOVABLE_DEVICES, hwndParent, win_settings_other_removable_devices_proc); + break; + case SETTINGS_PAGE_PERIPHERALS: + hwndChildDialog = CreateDialog(hinstance, (LPCWSTR) DLG_CFG_PERIPHERALS, hwndParent, win_settings_peripherals_proc); + break; + default: + fatal("Invalid child dialog ID\n"); + return; } ShowWindow(hwndChildDialog, SW_SHOWNORMAL); } - static BOOL win_settings_main_insert_categories(HWND hwndList) { LVITEM lvI; - int i = 0; + int i = 0; - lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; + lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; lvI.stateMask = lvI.iSubItem = lvI.state = 0; for (i = 0; i < 11; i++) { - lvI.pszText = plat_get_string(IDS_2065+i); - lvI.iItem = i; - lvI.iImage = i; + lvI.pszText = plat_get_string(IDS_2065 + i); + lvI.iItem = i; + lvI.iImage = i; - if (ListView_InsertItem(hwndList, &lvI) == -1) - return FALSE; + if (ListView_InsertItem(hwndList, &lvI) == -1) + return FALSE; } return TRUE; } - - #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK #else @@ -5137,20 +5047,20 @@ win_settings_confirm(HWND hdlg) SendMessage(hwndChildDialog, WM_SAVESETTINGS, 0, 0); if (win_settings_changed()) { - if (confirm_save && !settings_only) - i = settings_msgbox_ex(MBX_QUESTION_OK | MBX_WARNING | MBX_DONTASK, (wchar_t *) IDS_2121, (wchar_t *) IDS_2122, (wchar_t *) IDS_2123, NULL, NULL); - else - i = 0; + if (confirm_save && !settings_only) + i = settings_msgbox_ex(MBX_QUESTION_OK | MBX_WARNING | MBX_DONTASK, (wchar_t *) IDS_2121, (wchar_t *) IDS_2122, (wchar_t *) IDS_2123, NULL, NULL); + else + i = 0; - if (i == 10) { - confirm_save = 0; - i = 0; - } + if (i == 10) { + confirm_save = 0; + i = 0; + } - if (i == 0) - win_settings_save(); - else - return FALSE; + if (i == 0) + win_settings_save(); + else + return FALSE; } DestroyWindow(hwndChildDialog); @@ -5159,7 +5069,6 @@ win_settings_confirm(HWND hdlg) return TRUE; } - static void win_settings_categories_resize_columns(HWND hdlg) { @@ -5170,30 +5079,28 @@ win_settings_categories_resize_columns(HWND hdlg) ListView_SetColumnWidth(hwndList, 0, (r.right - r.left) + 1 - 5); } - static BOOL win_settings_categories_init_columns(HWND hdlg) { LVCOLUMN lvc; - int iCol = 0; - HWND hwndList = GetDlgItem(hdlg, IDC_SETTINGSCATLIST); + int iCol = 0; + HWND hwndList = GetDlgItem(hdlg, IDC_SETTINGSCATLIST); lvc.mask = LVCF_FMT | LVCF_WIDTH | LVCF_TEXT | LVCF_SUBITEM; lvc.iSubItem = 0; - lvc.pszText = plat_get_string(2048); + lvc.pszText = plat_get_string(2048); - lvc.cx = 171; + lvc.cx = 171; lvc.fmt = LVCFMT_LEFT; if (ListView_InsertColumn(hwndList, iCol, &lvc) == -1) - return FALSE; + return FALSE; win_settings_categories_resize_columns(hdlg); return TRUE; } - #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK #else @@ -5201,77 +5108,75 @@ static BOOL CALLBACK #endif win_settings_main_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { - HWND h = NULL; - int category, i = 0, j = 0; + HWND h = NULL; + int category, i = 0, j = 0; const uint8_t cat_icons[12] = { 240, 241, 242, 243, 96, 244, 252, 80, 246, 247, 245, 0 }; hwndParentDialog = hdlg; switch (message) { - case WM_INITDIALOG: - dpi = win_get_dpi(hdlg); - win_settings_init(); - displayed_category = -1; - h = GetDlgItem(hdlg, IDC_SETTINGSCATLIST); - win_settings_categories_init_columns(hdlg); - image_list_init(hdlg, IDC_SETTINGSCATLIST, (const uint8_t *) cat_icons); - win_settings_main_insert_categories(h); - settings_listview_select(hdlg, IDC_SETTINGSCATLIST, first_cat); - settings_listview_enable_styles(hdlg, IDC_SETTINGSCATLIST); - return TRUE; - case WM_NOTIFY: - if ((((LPNMHDR)lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR)lParam)->idFrom == IDC_SETTINGSCATLIST)) { - category = -1; - for (i = 0; i < 11; i++) { - h = GetDlgItem(hdlg, IDC_SETTINGSCATLIST); - j = ListView_GetItemState(h, i, LVIS_SELECTED); - if (j) - category = i; - } - if (category != -1) - win_settings_show_child(hdlg, category); - } - break; - case WM_CLOSE: - DestroyWindow(hwndChildDialog); - EndDialog(hdlg, 0); - win_notify_dlg_closed(); - return TRUE; - case WM_COMMAND: - switch (LOWORD(wParam)) { - case IDOK: - return win_settings_confirm(hdlg); - case IDCANCEL: - DestroyWindow(hwndChildDialog); - EndDialog(hdlg, 0); - win_notify_dlg_closed(); - return TRUE; - } - break; + case WM_INITDIALOG: + dpi = win_get_dpi(hdlg); + win_settings_init(); + displayed_category = -1; + h = GetDlgItem(hdlg, IDC_SETTINGSCATLIST); + win_settings_categories_init_columns(hdlg); + image_list_init(hdlg, IDC_SETTINGSCATLIST, (const uint8_t *) cat_icons); + win_settings_main_insert_categories(h); + settings_listview_select(hdlg, IDC_SETTINGSCATLIST, first_cat); + settings_listview_enable_styles(hdlg, IDC_SETTINGSCATLIST); + return TRUE; + case WM_NOTIFY: + if ((((LPNMHDR) lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR) lParam)->idFrom == IDC_SETTINGSCATLIST)) { + category = -1; + for (i = 0; i < 11; i++) { + h = GetDlgItem(hdlg, IDC_SETTINGSCATLIST); + j = ListView_GetItemState(h, i, LVIS_SELECTED); + if (j) + category = i; + } + if (category != -1) + win_settings_show_child(hdlg, category); + } + break; + case WM_CLOSE: + DestroyWindow(hwndChildDialog); + EndDialog(hdlg, 0); + win_notify_dlg_closed(); + return TRUE; + case WM_COMMAND: + switch (LOWORD(wParam)) { + case IDOK: + return win_settings_confirm(hdlg); + case IDCANCEL: + DestroyWindow(hwndChildDialog); + EndDialog(hdlg, 0); + win_notify_dlg_closed(); + return TRUE; + } + break; - case WM_DPICHANGED: - dpi = HIWORD(wParam); - win_settings_categories_resize_columns(hdlg); - image_list_init(hdlg, IDC_SETTINGSCATLIST, (const uint8_t *) cat_icons); - break; - default: - return FALSE; + case WM_DPICHANGED: + dpi = HIWORD(wParam); + win_settings_categories_resize_columns(hdlg); + image_list_init(hdlg, IDC_SETTINGSCATLIST, (const uint8_t *) cat_icons); + break; + default: + return FALSE; } return FALSE; } - void win_settings_open_ex(HWND hwnd, int category) { win_notify_dlg_open(); first_cat = category; - DialogBox(hinstance, (LPCWSTR)DLG_CONFIG, hwnd, win_settings_main_proc); + DialogBox(hinstance, (LPCWSTR) DLG_CONFIG, hwnd, win_settings_main_proc); } - void win_settings_open(HWND hwnd) { diff --git a/src/win/win_snd_gain.c b/src/win/win_snd_gain.c index 85cc9e3b8..6f5e834c5 100644 --- a/src/win/win_snd_gain.c +++ b/src/win/win_snd_gain.c @@ -31,9 +31,7 @@ #include <86box/sound.h> #include <86box/win.h> - -static uint8_t old_gain; - +static uint8_t old_gain; #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK @@ -45,48 +43,47 @@ SoundGainDialogProcedure(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) HWND h; switch (message) { - case WM_INITDIALOG: - old_gain = sound_gain; - h = GetDlgItem(hdlg, IDC_SLIDER_GAIN); - SendMessage(h, TBM_SETRANGE, (WPARAM)1, (LPARAM)MAKELONG(0, 9)); - SendMessage(h, TBM_SETPOS, (WPARAM)1, 9 - (sound_gain >> 1)); - SendMessage(h, TBM_SETTICFREQ, (WPARAM)1, 0); - SendMessage(h, TBM_SETLINESIZE, (WPARAM)0, 1); - SendMessage(h, TBM_SETPAGESIZE, (WPARAM)0, 2); - break; + case WM_INITDIALOG: + old_gain = sound_gain; + h = GetDlgItem(hdlg, IDC_SLIDER_GAIN); + SendMessage(h, TBM_SETRANGE, (WPARAM) 1, (LPARAM) MAKELONG(0, 9)); + SendMessage(h, TBM_SETPOS, (WPARAM) 1, 9 - (sound_gain >> 1)); + SendMessage(h, TBM_SETTICFREQ, (WPARAM) 1, 0); + SendMessage(h, TBM_SETLINESIZE, (WPARAM) 0, 1); + SendMessage(h, TBM_SETPAGESIZE, (WPARAM) 0, 2); + break; - case WM_VSCROLL: - h = GetDlgItem(hdlg, IDC_SLIDER_GAIN); - sound_gain = (9 - SendMessage(h, TBM_GETPOS, (WPARAM)0, 0)) << 1; - break; + case WM_VSCROLL: + h = GetDlgItem(hdlg, IDC_SLIDER_GAIN); + sound_gain = (9 - SendMessage(h, TBM_GETPOS, (WPARAM) 0, 0)) << 1; + break; - case WM_COMMAND: - switch (LOWORD(wParam)) { - case IDOK: - h = GetDlgItem(hdlg, IDC_SLIDER_GAIN); - sound_gain = (9 - SendMessage(h, TBM_GETPOS, (WPARAM)0, 0)) << 1; - config_save(); - EndDialog(hdlg, 0); - return TRUE; + case WM_COMMAND: + switch (LOWORD(wParam)) { + case IDOK: + h = GetDlgItem(hdlg, IDC_SLIDER_GAIN); + sound_gain = (9 - SendMessage(h, TBM_GETPOS, (WPARAM) 0, 0)) << 1; + config_save(); + EndDialog(hdlg, 0); + return TRUE; - case IDCANCEL: - sound_gain = old_gain; - config_save(); - EndDialog(hdlg, 0); - return TRUE; + case IDCANCEL: + sound_gain = old_gain; + config_save(); + EndDialog(hdlg, 0); + return TRUE; - default: - break; - } - break; + default: + break; + } + break; } - return(FALSE); + return (FALSE); } - void SoundGainDialogCreate(HWND hwnd) { - DialogBox(hinstance, (LPCTSTR)DLG_SND_GAIN, hwnd, SoundGainDialogProcedure); + DialogBox(hinstance, (LPCTSTR) DLG_SND_GAIN, hwnd, SoundGainDialogProcedure); } diff --git a/src/win/win_specify_dim.c b/src/win/win_specify_dim.c index f2d8a768d..b4d44087c 100644 --- a/src/win/win_specify_dim.c +++ b/src/win/win_specify_dim.c @@ -32,7 +32,6 @@ #include <86box/sound.h> #include <86box/win.h> - #if defined(__amd64__) || defined(__aarch64__) static LRESULT CALLBACK #else @@ -40,140 +39,139 @@ static BOOL CALLBACK #endif SpecifyDimensionsDialogProcedure(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) { - HWND h, h2; - HMENU hmenu; - UDACCEL accel, accel2; - RECT r; + HWND h, h2; + HMENU hmenu; + UDACCEL accel, accel2; + RECT r; uint32_t temp_x = 0, temp_y = 0; - int dpi = 96, lock; - LPTSTR lptsTemp; - char *stransi; + int dpi = 96, lock; + LPTSTR lptsTemp; + char *stransi; switch (message) { - case WM_INITDIALOG: - GetWindowRect(hwndRender, &r); + case WM_INITDIALOG: + GetWindowRect(hwndRender, &r); - h = GetDlgItem(hdlg, IDC_WIDTHSPIN); - h2 = GetDlgItem(hdlg, IDC_EDIT_WIDTH); - SendMessage(h, UDM_SETBUDDY, (WPARAM)h2, 0); - SendMessage(h, UDM_SETRANGE, 0, (120 << 16) | 2048); - accel.nSec = 0; - accel.nInc = 8; - SendMessage(h, UDM_SETACCEL, 1, (LPARAM)&accel); - SendMessage(h, UDM_SETPOS, 0, r.right - r.left); + h = GetDlgItem(hdlg, IDC_WIDTHSPIN); + h2 = GetDlgItem(hdlg, IDC_EDIT_WIDTH); + SendMessage(h, UDM_SETBUDDY, (WPARAM) h2, 0); + SendMessage(h, UDM_SETRANGE, 0, (120 << 16) | 2048); + accel.nSec = 0; + accel.nInc = 8; + SendMessage(h, UDM_SETACCEL, 1, (LPARAM) &accel); + SendMessage(h, UDM_SETPOS, 0, r.right - r.left); - h = GetDlgItem(hdlg, IDC_HEIGHTSPIN); - h2 = GetDlgItem(hdlg, IDC_EDIT_HEIGHT); - SendMessage(h, UDM_SETBUDDY, (WPARAM)h2, 0); - SendMessage(h, UDM_SETRANGE, 0, (120 << 16) | 2048); - accel2.nSec = 0; - accel2.nInc = 8; - SendMessage(h, UDM_SETACCEL, 1, (LPARAM)&accel2); - SendMessage(h, UDM_SETPOS, 0, r.bottom - r.top); + h = GetDlgItem(hdlg, IDC_HEIGHTSPIN); + h2 = GetDlgItem(hdlg, IDC_EDIT_HEIGHT); + SendMessage(h, UDM_SETBUDDY, (WPARAM) h2, 0); + SendMessage(h, UDM_SETRANGE, 0, (120 << 16) | 2048); + accel2.nSec = 0; + accel2.nInc = 8; + SendMessage(h, UDM_SETACCEL, 1, (LPARAM) &accel2); + SendMessage(h, UDM_SETPOS, 0, r.bottom - r.top); - h = GetDlgItem(hdlg, IDC_CHECK_LOCK_SIZE); - SendMessage(h, BM_SETCHECK, !!(vid_resize & 2), 0); - break; + h = GetDlgItem(hdlg, IDC_CHECK_LOCK_SIZE); + SendMessage(h, BM_SETCHECK, !!(vid_resize & 2), 0); + break; - case WM_COMMAND: - switch (LOWORD(wParam)) { - case IDOK: - lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); - stransi = (char *)malloc(512); + case WM_COMMAND: + switch (LOWORD(wParam)) { + case IDOK: + lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); + stransi = (char *) malloc(512); - h = GetDlgItem(hdlg, IDC_EDIT_WIDTH); - SendMessage(h, WM_GETTEXT, 255, (LPARAM) lptsTemp); - wcstombs(stransi, lptsTemp, 512); - sscanf(stransi, "%u", &temp_x); - fixed_size_x = temp_x; + h = GetDlgItem(hdlg, IDC_EDIT_WIDTH); + SendMessage(h, WM_GETTEXT, 255, (LPARAM) lptsTemp); + wcstombs(stransi, lptsTemp, 512); + sscanf(stransi, "%u", &temp_x); + fixed_size_x = temp_x; - h = GetDlgItem(hdlg, IDC_EDIT_HEIGHT); - SendMessage(h, WM_GETTEXT, 255, (LPARAM) lptsTemp); - wcstombs(stransi, lptsTemp, 512); - sscanf(stransi, "%u", &temp_y); - fixed_size_y = temp_y; + h = GetDlgItem(hdlg, IDC_EDIT_HEIGHT); + SendMessage(h, WM_GETTEXT, 255, (LPARAM) lptsTemp); + wcstombs(stransi, lptsTemp, 512); + sscanf(stransi, "%u", &temp_y); + fixed_size_y = temp_y; - h = GetDlgItem(hdlg, IDC_CHECK_LOCK_SIZE); - lock = SendMessage(h, BM_GETCHECK, 0, 0); + h = GetDlgItem(hdlg, IDC_CHECK_LOCK_SIZE); + lock = SendMessage(h, BM_GETCHECK, 0, 0); - if (lock) { - vid_resize = 2; - window_remember = 0; - } else { - vid_resize = 1; - window_remember = 1; - } - hmenu = GetMenu(hwndMain); - CheckMenuItem(hmenu, IDM_VID_REMEMBER, (window_remember == 1) ? MF_CHECKED : MF_UNCHECKED); - CheckMenuItem(hmenu, IDM_VID_RESIZE, (vid_resize == 1) ? MF_CHECKED : MF_UNCHECKED); - EnableMenuItem(hmenu, IDM_VID_RESIZE, (vid_resize & 2) ? MF_GRAYED : MF_ENABLED); + if (lock) { + vid_resize = 2; + window_remember = 0; + } else { + vid_resize = 1; + window_remember = 1; + } + hmenu = GetMenu(hwndMain); + CheckMenuItem(hmenu, IDM_VID_REMEMBER, (window_remember == 1) ? MF_CHECKED : MF_UNCHECKED); + CheckMenuItem(hmenu, IDM_VID_RESIZE, (vid_resize == 1) ? MF_CHECKED : MF_UNCHECKED); + EnableMenuItem(hmenu, IDM_VID_RESIZE, (vid_resize & 2) ? MF_GRAYED : MF_ENABLED); - if (vid_resize == 1) - SetWindowLongPtr(hwndMain, GWL_STYLE, (WS_OVERLAPPEDWINDOW) | WS_VISIBLE); - else - SetWindowLongPtr(hwndMain, GWL_STYLE, (WS_OVERLAPPEDWINDOW & ~WS_SIZEBOX & ~WS_MAXIMIZEBOX) | WS_VISIBLE); + if (vid_resize == 1) + SetWindowLongPtr(hwndMain, GWL_STYLE, (WS_OVERLAPPEDWINDOW) | WS_VISIBLE); + else + SetWindowLongPtr(hwndMain, GWL_STYLE, (WS_OVERLAPPEDWINDOW & ~WS_SIZEBOX & ~WS_MAXIMIZEBOX) | WS_VISIBLE); - /* scale the screen base on DPI */ - if (dpi_scale) { - dpi = win_get_dpi(hwndMain); - temp_x = MulDiv(temp_x, dpi, 96); - temp_y = MulDiv(temp_y, dpi, 96); - } + /* scale the screen base on DPI */ + if (dpi_scale) { + dpi = win_get_dpi(hwndMain); + temp_x = MulDiv(temp_x, dpi, 96); + temp_y = MulDiv(temp_y, dpi, 96); + } - ResizeWindowByClientArea(hwndMain, temp_x, temp_y + sbar_height + tbar_height); + ResizeWindowByClientArea(hwndMain, temp_x, temp_y + sbar_height + tbar_height); - if (vid_resize) { - CheckMenuItem(hmenu, IDM_VID_SCALE_1X + scale, MF_UNCHECKED); - CheckMenuItem(hmenu, IDM_VID_SCALE_2X, MF_CHECKED); - scale = 1; - } - EnableMenuItem(hmenu, IDM_VID_SCALE_1X, vid_resize ? MF_GRAYED : MF_ENABLED); - EnableMenuItem(hmenu, IDM_VID_SCALE_2X, vid_resize ? MF_GRAYED : MF_ENABLED); - EnableMenuItem(hmenu, IDM_VID_SCALE_3X, vid_resize ? MF_GRAYED : MF_ENABLED); - EnableMenuItem(hmenu, IDM_VID_SCALE_4X, vid_resize ? MF_GRAYED : MF_ENABLED); + if (vid_resize) { + CheckMenuItem(hmenu, IDM_VID_SCALE_1X + scale, MF_UNCHECKED); + CheckMenuItem(hmenu, IDM_VID_SCALE_2X, MF_CHECKED); + scale = 1; + } + EnableMenuItem(hmenu, IDM_VID_SCALE_1X, vid_resize ? MF_GRAYED : MF_ENABLED); + EnableMenuItem(hmenu, IDM_VID_SCALE_2X, vid_resize ? MF_GRAYED : MF_ENABLED); + EnableMenuItem(hmenu, IDM_VID_SCALE_3X, vid_resize ? MF_GRAYED : MF_ENABLED); + EnableMenuItem(hmenu, IDM_VID_SCALE_4X, vid_resize ? MF_GRAYED : MF_ENABLED); - scrnsz_x = fixed_size_x; - scrnsz_y = fixed_size_y; - atomic_store(&doresize_monitors[0], 1); + scrnsz_x = fixed_size_x; + scrnsz_y = fixed_size_y; + atomic_store(&doresize_monitors[0], 1); - GetWindowRect(hwndMain, &r); + GetWindowRect(hwndMain, &r); - if (mouse_capture) - ClipCursor(&r); + if (mouse_capture) + ClipCursor(&r); - if (window_remember || (vid_resize & 2)) { - window_x = r.left; - window_y = r.top; - if (!(vid_resize & 2)) { - window_w = r.right - r.left; - window_h = r.bottom - r.top; - } - } + if (window_remember || (vid_resize & 2)) { + window_x = r.left; + window_y = r.top; + if (!(vid_resize & 2)) { + window_w = r.right - r.left; + window_h = r.bottom - r.top; + } + } - config_save(); + config_save(); - free(stransi); - free(lptsTemp); + free(stransi); + free(lptsTemp); - EndDialog(hdlg, 0); - return TRUE; + EndDialog(hdlg, 0); + return TRUE; - case IDCANCEL: - EndDialog(hdlg, 0); - return TRUE; + case IDCANCEL: + EndDialog(hdlg, 0); + return TRUE; - default: - break; - } - break; + default: + break; + } + break; } - return(FALSE); + return (FALSE); } - void SpecifyDimensionsDialogCreate(HWND hwnd) { - DialogBox(hinstance, (LPCTSTR)DLG_SPECIFY_DIM, hwnd, SpecifyDimensionsDialogProcedure); + DialogBox(hinstance, (LPCTSTR) DLG_SPECIFY_DIM, hwnd, SpecifyDimensionsDialogProcedure); } diff --git a/src/win/win_stbar.c b/src/win/win_stbar.c index 406ae4f0f..a71587017 100644 --- a/src/win/win_stbar.c +++ b/src/win/win_stbar.c @@ -54,22 +54,20 @@ #include <86box/ui.h> #include <86box/win.h> +HWND hwndSBAR; +int update_icons = 1, reset_occurred = 1; -HWND hwndSBAR; -int update_icons = 1, reset_occurred = 1; - - -static LONG_PTR OriginalProcedure; -static WCHAR **sbTips; -static int *iStatusWidths; -static int *sb_part_meanings; -static uint8_t *sb_part_icons; -static int sb_parts = 0; -static int sb_ready = 0; -static uint8_t sb_map[256]; -static int icon_width = 24; -static wchar_t sb_text[512] = L"\0"; -static wchar_t sb_bugtext[512] = L"\0"; +static LONG_PTR OriginalProcedure; +static WCHAR **sbTips; +static int *iStatusWidths; +static int *sb_part_meanings; +static uint8_t *sb_part_icons; +static int sb_parts = 0; +static int sb_ready = 0; +static uint8_t sb_map[256]; +static int icon_width = 24; +static wchar_t sb_text[512] = L"\0"; +static wchar_t sb_bugtext[512] = L"\0"; /* Also used by win_settings.c */ intptr_t @@ -77,28 +75,36 @@ fdd_type_to_icon(int type) { int ret = 248; - switch(type) { - case 0: - break; + switch (type) { + case 0: + break; - case 1: case 2: case 3: case 4: - case 5: case 6: - ret = 16; - break; + case 1: + case 2: + case 3: + case 4: + case 5: + case 6: + ret = 16; + break; - case 7: case 8: case 9: case 10: - case 11: case 12: case 13: - ret = 24; - break; + case 7: + case 8: + case 9: + case 10: + case 11: + case 12: + case 13: + ret = 24; + break; - default: - break; + default: + break; } - return(ret); + return (ret); } - /* FIXME: should be hdd_count() in hdd.c */ static int hdd_count(int bus) @@ -106,33 +112,30 @@ hdd_count(int bus) int c = 0; int i; - for (i=0; i= SB_TEXT)) - return; + return; found = sb_map[tag]; if ((found != 0xff) && ((sb_part_icons[found] ^ active) & 1) && active) { - sb_part_icons[found] |= 1; + sb_part_icons[found] |= 1; - PostMessage(hwndSBAR, SB_SETICON, found, - (LPARAM)hIcon[sb_part_icons[found]]); + PostMessage(hwndSBAR, SB_SETICON, found, + (LPARAM) hIcon[sb_part_icons[found]]); - reset_occurred = 2; - SetTimer(hwndMain, 0x8000 | found, 75, NULL); + reset_occurred = 2; + SetTimer(hwndMain, 0x8000 | found, 75, NULL); } } - - /* API: This is for the drive state indicator. */ void ui_sb_update_icon_state(int tag, int state) @@ -167,19 +168,18 @@ ui_sb_update_icon_state(int tag, int state) uint8_t found = 0xff; if (!sb_ready || ((tag & 0xf0) >= SB_HDD)) - return; + return; found = sb_map[tag]; if (found != 0xff) { - sb_part_icons[found] &= ~128; - sb_part_icons[found] |= (state ? 128 : 0); + sb_part_icons[found] &= ~128; + sb_part_icons[found] |= (state ? 128 : 0); - SendMessage(hwndSBAR, SB_SETICON, found, - (LPARAM)hIcon[sb_part_icons[found]]); + SendMessage(hwndSBAR, SB_SETICON, found, + (LPARAM) hIcon[sb_part_icons[found]]); } } - static void StatusBarCreateCassetteTip(int part) { @@ -187,46 +187,44 @@ StatusBarCreateCassetteTip(int part) WCHAR fn[512]; if (strlen(cassette_fname) == 0) - _swprintf(tempTip, plat_get_string(IDS_2148), plat_get_string(IDS_2057)); + _swprintf(tempTip, plat_get_string(IDS_2148), plat_get_string(IDS_2057)); else { - mbstoc16s(fn, cassette_fname, sizeof_w(fn)); - _swprintf(tempTip, plat_get_string(IDS_2148), fn); + mbstoc16s(fn, cassette_fname, sizeof_w(fn)); + _swprintf(tempTip, plat_get_string(IDS_2148), fn); } if (sbTips[part] != NULL) { - free(sbTips[part]); - sbTips[part] = NULL; + free(sbTips[part]); + sbTips[part] = NULL; } - sbTips[part] = (WCHAR *)malloc((wcslen(tempTip) << 1) + 2); + sbTips[part] = (WCHAR *) malloc((wcslen(tempTip) << 1) + 2); wcscpy(sbTips[part], tempTip); } - static void StatusBarCreateCartridgeTip(int part) { WCHAR tempTip[512]; WCHAR fn[512]; - int drive = sb_part_meanings[part] & 0xf; + int drive = sb_part_meanings[part] & 0xf; if (strlen(cart_fns[drive]) == 0) { - _swprintf(tempTip, plat_get_string(IDS_2150), - drive+1, plat_get_string(IDS_2057)); + _swprintf(tempTip, plat_get_string(IDS_2150), + drive + 1, plat_get_string(IDS_2057)); } else { - mbstoc16s(fn, cart_fns[drive], sizeof_w(fn)); - _swprintf(tempTip, plat_get_string(IDS_2150), - drive+1, fn); + mbstoc16s(fn, cart_fns[drive], sizeof_w(fn)); + _swprintf(tempTip, plat_get_string(IDS_2150), + drive + 1, fn); } if (sbTips[part] != NULL) { - free(sbTips[part]); - sbTips[part] = NULL; + free(sbTips[part]); + sbTips[part] = NULL; } - sbTips[part] = (WCHAR *)malloc((wcslen(tempTip) << 1) + 2); + sbTips[part] = (WCHAR *) malloc((wcslen(tempTip) << 1) + 2); wcscpy(sbTips[part], tempTip); } - static void StatusBarCreateFloppyTip(int part) { @@ -237,142 +235,137 @@ StatusBarCreateFloppyTip(int part) int drive = sb_part_meanings[part] & 0xf; mbstoc16s(wtext, fdd_getname(fdd_get_type(drive)), - strlen(fdd_getname(fdd_get_type(drive))) + 1); + strlen(fdd_getname(fdd_get_type(drive))) + 1); if (strlen(floppyfns[drive]) == 0) { - _swprintf(tempTip, plat_get_string(IDS_2108), - drive+1, wtext, plat_get_string(IDS_2057)); + _swprintf(tempTip, plat_get_string(IDS_2108), + drive + 1, wtext, plat_get_string(IDS_2057)); } else { - mbstoc16s(fn, floppyfns[drive], sizeof_w(fn)); - _swprintf(tempTip, plat_get_string(IDS_2108), - drive+1, wtext, fn); + mbstoc16s(fn, floppyfns[drive], sizeof_w(fn)); + _swprintf(tempTip, plat_get_string(IDS_2108), + drive + 1, wtext, fn); } if (sbTips[part] != NULL) { - free(sbTips[part]); - sbTips[part] = NULL; + free(sbTips[part]); + sbTips[part] = NULL; } - sbTips[part] = (WCHAR *)malloc((wcslen(tempTip) << 1) + 2); + sbTips[part] = (WCHAR *) malloc((wcslen(tempTip) << 1) + 2); wcscpy(sbTips[part], tempTip); } - static void StatusBarCreateCdromTip(int part) { - WCHAR tempTip[512]; + WCHAR tempTip[512]; WCHAR *szText; - WCHAR fn[512]; - int id; - int drive = sb_part_meanings[part] & 0xf; - int bus = cdrom[drive].bus_type; + WCHAR fn[512]; + int id; + int drive = sb_part_meanings[part] & 0xf; + int bus = cdrom[drive].bus_type; - id = IDS_5377 + (bus - 1); + id = IDS_5377 + (bus - 1); szText = plat_get_string(id); if (cdrom[drive].host_drive == 200) { - if (strlen(cdrom[drive].image_path) == 0) { - _swprintf(tempTip, plat_get_string(IDS_5120), - drive+1, szText, plat_get_string(IDS_2057)); - } else { - mbstoc16s(fn, cdrom[drive].image_path, sizeof_w(fn)); - _swprintf(tempTip, plat_get_string(IDS_5120), - drive+1, szText, fn); - } + if (strlen(cdrom[drive].image_path) == 0) { + _swprintf(tempTip, plat_get_string(IDS_5120), + drive + 1, szText, plat_get_string(IDS_2057)); + } else { + mbstoc16s(fn, cdrom[drive].image_path, sizeof_w(fn)); + _swprintf(tempTip, plat_get_string(IDS_5120), + drive + 1, szText, fn); + } } else - _swprintf(tempTip, plat_get_string(IDS_5120), drive+1, szText, plat_get_string(IDS_2057)); + _swprintf(tempTip, plat_get_string(IDS_5120), drive + 1, szText, plat_get_string(IDS_2057)); if (sbTips[part] != NULL) { - free(sbTips[part]); - sbTips[part] = NULL; + free(sbTips[part]); + sbTips[part] = NULL; } - sbTips[part] = (WCHAR *)malloc((wcslen(tempTip) << 1) + 4); + sbTips[part] = (WCHAR *) malloc((wcslen(tempTip) << 1) + 4); wcscpy(sbTips[part], tempTip); } - static void StatusBarCreateZIPTip(int part) { - WCHAR tempTip[512]; + WCHAR tempTip[512]; WCHAR *szText; - WCHAR fn[512]; - int id; - int drive = sb_part_meanings[part] & 0xf; - int bus = zip_drives[drive].bus_type; + WCHAR fn[512]; + int id; + int drive = sb_part_meanings[part] & 0xf; + int bus = zip_drives[drive].bus_type; - id = IDS_5377 + (bus - 1); + id = IDS_5377 + (bus - 1); szText = plat_get_string(id); int type = zip_drives[drive].is_250 ? 250 : 100; if (strlen(zip_drives[drive].image_path) == 0) { - _swprintf(tempTip, plat_get_string(IDS_2054), - type, drive+1, szText, plat_get_string(IDS_2057)); + _swprintf(tempTip, plat_get_string(IDS_2054), + type, drive + 1, szText, plat_get_string(IDS_2057)); } else { - mbstoc16s(fn, zip_drives[drive].image_path, sizeof_w(fn)); - _swprintf(tempTip, plat_get_string(IDS_2054), - type, drive+1, szText, fn); + mbstoc16s(fn, zip_drives[drive].image_path, sizeof_w(fn)); + _swprintf(tempTip, plat_get_string(IDS_2054), + type, drive + 1, szText, fn); } if (sbTips[part] != NULL) { - free(sbTips[part]); - sbTips[part] = NULL; + free(sbTips[part]); + sbTips[part] = NULL; } - sbTips[part] = (WCHAR *)malloc((wcslen(tempTip) << 1) + 2); + sbTips[part] = (WCHAR *) malloc((wcslen(tempTip) << 1) + 2); wcscpy(sbTips[part], tempTip); } - static void StatusBarCreateMOTip(int part) { - WCHAR tempTip[512]; + WCHAR tempTip[512]; WCHAR *szText; - WCHAR fn[512]; - int id; - int drive = sb_part_meanings[part] & 0xf; - int bus = mo_drives[drive].bus_type; + WCHAR fn[512]; + int id; + int drive = sb_part_meanings[part] & 0xf; + int bus = mo_drives[drive].bus_type; - id = IDS_5377 + (bus - 1); + id = IDS_5377 + (bus - 1); szText = plat_get_string(id); if (strlen(mo_drives[drive].image_path) == 0) { - _swprintf(tempTip, plat_get_string(IDS_2115), - drive+1, szText, plat_get_string(IDS_2057)); + _swprintf(tempTip, plat_get_string(IDS_2115), + drive + 1, szText, plat_get_string(IDS_2057)); } else { - mbstoc16s(fn, mo_drives[drive].image_path, sizeof_w(fn)); - _swprintf(tempTip, plat_get_string(IDS_2115), - drive+1, szText, fn); + mbstoc16s(fn, mo_drives[drive].image_path, sizeof_w(fn)); + _swprintf(tempTip, plat_get_string(IDS_2115), + drive + 1, szText, fn); } if (sbTips[part] != NULL) { - free(sbTips[part]); - sbTips[part] = NULL; + free(sbTips[part]); + sbTips[part] = NULL; } - sbTips[part] = (WCHAR *)malloc((wcslen(tempTip) << 1) + 2); + sbTips[part] = (WCHAR *) malloc((wcslen(tempTip) << 1) + 2); wcscpy(sbTips[part], tempTip); } - static void StatusBarCreateDiskTip(int part) { - WCHAR tempTip[512]; + WCHAR tempTip[512]; WCHAR *szText; - int id; - int bus = sb_part_meanings[part] & 0xf; + int id; + int bus = sb_part_meanings[part] & 0xf; - id = IDS_4352 + (bus - 1); + id = IDS_4352 + (bus - 1); szText = plat_get_string(id); _swprintf(tempTip, plat_get_string(IDS_4096), szText); if (sbTips[part] != NULL) - free(sbTips[part]); - sbTips[part] = (WCHAR *)malloc((wcslen(tempTip) << 1) + 2); + free(sbTips[part]); + sbTips[part] = (WCHAR *) malloc((wcslen(tempTip) << 1) + 2); wcscpy(sbTips[part], tempTip); } - static void StatusBarCreateNetworkTip(int part) { @@ -381,12 +374,11 @@ StatusBarCreateNetworkTip(int part) _swprintf(tempTip, plat_get_string(IDS_2069)); if (sbTips[part] != NULL) - free(sbTips[part]); - sbTips[part] = (WCHAR *)malloc((wcslen(tempTip) << 1) + 2); + free(sbTips[part]); + sbTips[part] = (WCHAR *) malloc((wcslen(tempTip) << 1) + 2); wcscpy(sbTips[part], tempTip); } - static void StatusBarCreateSoundTip(int part) { @@ -395,12 +387,11 @@ StatusBarCreateSoundTip(int part) _swprintf(tempTip, plat_get_string(IDS_2068)); if (sbTips[part] != NULL) - free(sbTips[part]); - sbTips[part] = (WCHAR *)malloc((wcslen(tempTip) << 1) + 2); + free(sbTips[part]); + sbTips[part] = (WCHAR *) malloc((wcslen(tempTip) << 1) + 2); wcscpy(sbTips[part], tempTip); } - /* API */ void ui_sb_update_tip(int meaning) @@ -408,78 +399,78 @@ ui_sb_update_tip(int meaning) uint8_t part = 0xff; if (!sb_ready || (sb_parts == 0) || (sb_part_meanings == NULL)) - return; + return; part = sb_map[meaning]; if (part != 0xff) { - switch(meaning & 0xf0) { - case SB_CASSETTE: - StatusBarCreateCassetteTip(part); - break; + switch (meaning & 0xf0) { + case SB_CASSETTE: + StatusBarCreateCassetteTip(part); + break; - case SB_CARTRIDGE: - StatusBarCreateCartridgeTip(part); - break; + case SB_CARTRIDGE: + StatusBarCreateCartridgeTip(part); + break; - case SB_FLOPPY: - StatusBarCreateFloppyTip(part); - break; + case SB_FLOPPY: + StatusBarCreateFloppyTip(part); + break; - case SB_CDROM: - StatusBarCreateCdromTip(part); - break; + case SB_CDROM: + StatusBarCreateCdromTip(part); + break; - case SB_ZIP: - StatusBarCreateZIPTip(part); - break; + case SB_ZIP: + StatusBarCreateZIPTip(part); + break; - case SB_MO: - StatusBarCreateMOTip(part); - break; + case SB_MO: + StatusBarCreateMOTip(part); + break; - case SB_HDD: - StatusBarCreateDiskTip(part); - break; + case SB_HDD: + StatusBarCreateDiskTip(part); + break; - case SB_NETWORK: - StatusBarCreateNetworkTip(part); - break; + case SB_NETWORK: + StatusBarCreateNetworkTip(part); + break; - case SB_SOUND: - StatusBarCreateSoundTip(part); - break; + case SB_SOUND: + StatusBarCreateSoundTip(part); + break; - default: - break; - } + default: + break; + } - SendMessage(hwndSBAR, SB_SETTIPTEXT, part, (LPARAM)sbTips[part]); + SendMessage(hwndSBAR, SB_SETTIPTEXT, part, (LPARAM) sbTips[part]); } } - static void StatusBarDestroyTips(void) { int i; - if (sb_parts == 0) return; + if (sb_parts == 0) + return; - if (! sbTips) return; + if (!sbTips) + return; - for (i=0; i 0) { - for (i = 0; i < sb_parts; i++) - SendMessage(hwndSBAR, SB_SETICON, i, (LPARAM)NULL); - SendMessage(hwndSBAR, SB_SETPARTS, (WPARAM)0, (LPARAM)NULL); + for (i = 0; i < sb_parts; i++) + SendMessage(hwndSBAR, SB_SETICON, i, (LPARAM) NULL); + SendMessage(hwndSBAR, SB_SETPARTS, (WPARAM) 0, (LPARAM) NULL); - if (iStatusWidths) { - free(iStatusWidths); - iStatusWidths = NULL; - } - if (sb_part_meanings) { - free(sb_part_meanings); - sb_part_meanings = NULL; - } - if (sb_part_icons) { - free(sb_part_icons); - sb_part_icons = NULL; - } - StatusBarDestroyTips(); + if (iStatusWidths) { + free(iStatusWidths); + iStatusWidths = NULL; + } + if (sb_part_meanings) { + free(sb_part_meanings); + sb_part_meanings = NULL; + } + if (sb_part_icons) { + free(sb_part_icons); + sb_part_icons = NULL; + } + StatusBarDestroyTips(); } memset(sb_map, 0xff, sizeof(sb_map)); sb_parts = 0; if (cassette_enable) - sb_parts++; + sb_parts++; if (cart_int) - sb_parts += 2; - for (i=0; i= (sb_parts - 1)) return; + if (id >= (sb_parts - 1)) + return; - pt.x = id * icon_width; /* Justify to the left. */ - pt.y = 0; /* Justify to the top. */ + pt.x = id * icon_width; /* Justify to the left. */ + pt.y = 0; /* Justify to the top. */ ClientToScreen(hwnd, (LPPOINT) &pt); - switch(sb_part_meanings[id] & 0xF0) { - case SB_CASSETTE: - menu = media_menu_get_cassette(); - break; - case SB_CARTRIDGE: - menu = media_menu_get_cartridge(sb_part_meanings[id] & 0x0F); - break; - case SB_FLOPPY: - menu = media_menu_get_floppy(sb_part_meanings[id] & 0x0F); - break; - case SB_CDROM: - menu = media_menu_get_cdrom(sb_part_meanings[id] & 0x0F); - break; - case SB_ZIP: - menu = media_menu_get_zip(sb_part_meanings[id] & 0x0F); - break; - case SB_MO: - menu = media_menu_get_mo(sb_part_meanings[id] & 0x0F); - break; - default: - return; + switch (sb_part_meanings[id] & 0xF0) { + case SB_CASSETTE: + menu = media_menu_get_cassette(); + break; + case SB_CARTRIDGE: + menu = media_menu_get_cartridge(sb_part_meanings[id] & 0x0F); + break; + case SB_FLOPPY: + menu = media_menu_get_floppy(sb_part_meanings[id] & 0x0F); + break; + case SB_CDROM: + menu = media_menu_get_cdrom(sb_part_meanings[id] & 0x0F); + break; + case SB_ZIP: + menu = media_menu_get_zip(sb_part_meanings[id] & 0x0F); + break; + case SB_MO: + menu = media_menu_get_mo(sb_part_meanings[id] & 0x0F); + break; + default: + return; } TrackPopupMenu(menu, - TPM_LEFTALIGN | TPM_BOTTOMALIGN | TPM_LEFTBUTTON, - pt.x, pt.y, 0, hwndSBAR, NULL); + TPM_LEFTALIGN | TPM_BOTTOMALIGN | TPM_LEFTBUTTON, + pt.x, pt.y, 0, hwndSBAR, NULL); } /* API: Load status bar icons */ void -StatusBarLoadIcon(HINSTANCE hInst) { - win_load_icon_set(); +StatusBarLoadIcon(HINSTANCE hInst) +{ + win_load_icon_set(); } /* Handle messages for the Status Bar window. */ @@ -898,77 +869,76 @@ static BOOL CALLBACK #endif StatusBarProcedure(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam) { - RECT rc; - POINT pt; - int item_id = 0; - int i; - HINSTANCE hInst; + RECT rc; + POINT pt; + int item_id = 0; + int i; + HINSTANCE hInst; switch (message) { - case WM_COMMAND: - media_menu_proc(hwnd, message, wParam, lParam); - return(0); + case WM_COMMAND: + media_menu_proc(hwnd, message, wParam, lParam); + return (0); - case WM_LBUTTONDOWN: - case WM_RBUTTONDOWN: - GetClientRect(hwnd, (LPRECT)& rc); - pt.x = GET_X_LPARAM(lParam); - pt.y = GET_Y_LPARAM(lParam); - if (PtInRect((LPRECT) &rc, pt)) - StatusBarPopupMenu(hwnd, pt, (pt.x / icon_width)); - break; + case WM_LBUTTONDOWN: + case WM_RBUTTONDOWN: + GetClientRect(hwnd, (LPRECT) &rc); + pt.x = GET_X_LPARAM(lParam); + pt.y = GET_Y_LPARAM(lParam); + if (PtInRect((LPRECT) &rc, pt)) + StatusBarPopupMenu(hwnd, pt, (pt.x / icon_width)); + break; - case WM_LBUTTONDBLCLK: - GetClientRect(hwnd, (LPRECT)& rc); - pt.x = GET_X_LPARAM(lParam); - pt.y = GET_Y_LPARAM(lParam); - item_id = (pt.x / icon_width); - if (PtInRect((LPRECT) &rc, pt) && (item_id < sb_parts)) { - if (sb_part_meanings[item_id] == SB_SOUND) - SoundGainDialogCreate(hwndMain); - } - break; + case WM_LBUTTONDBLCLK: + GetClientRect(hwnd, (LPRECT) &rc); + pt.x = GET_X_LPARAM(lParam); + pt.y = GET_Y_LPARAM(lParam); + item_id = (pt.x / icon_width); + if (PtInRect((LPRECT) &rc, pt) && (item_id < sb_parts)) { + if (sb_part_meanings[item_id] == SB_SOUND) + SoundGainDialogCreate(hwndMain); + } + break; - case WM_DPICHANGED_AFTERPARENT: - /* DPI changed, reload icons */ - hInst = (HINSTANCE)GetWindowLongPtr(hwnd, GWLP_HINSTANCE); - dpi = win_get_dpi(hwnd); - icon_width = MulDiv(SB_ICON_WIDTH, dpi, 96); - StatusBarLoadIcon(hInst); + case WM_DPICHANGED_AFTERPARENT: + /* DPI changed, reload icons */ + hInst = (HINSTANCE) GetWindowLongPtr(hwnd, GWLP_HINSTANCE); + dpi = win_get_dpi(hwnd); + icon_width = MulDiv(SB_ICON_WIDTH, dpi, 96); + StatusBarLoadIcon(hInst); - for (i=0; ihandle = CreateEvent(NULL, FALSE, FALSE, NULL); - return((event_t *)ev); + return ((event_t *) ev); } - void thread_set_event(event_t *arg) { - win_event_t *ev = (win_event_t *)arg; + win_event_t *ev = (win_event_t *) arg; - if (arg == NULL) return; + if (arg == NULL) + return; SetEvent(ev->handle); } - void thread_reset_event(event_t *arg) { - win_event_t *ev = (win_event_t *)arg; + win_event_t *ev = (win_event_t *) arg; - if (arg == NULL) return; + if (arg == NULL) + return; ResetEvent(ev->handle); } - int thread_wait_event(event_t *arg, int timeout) { - win_event_t *ev = (win_event_t *)arg; + win_event_t *ev = (win_event_t *) arg; - if (arg == NULL) return(0); + if (arg == NULL) + return (0); - if (ev->handle == NULL) return(0); + if (ev->handle == NULL) + return (0); if (timeout == -1) - timeout = INFINITE; + timeout = INFINITE; - if (WaitForSingleObject(ev->handle, timeout)) return(1); + if (WaitForSingleObject(ev->handle, timeout)) + return (1); - return(0); + return (0); } - void thread_destroy_event(event_t *arg) { - win_event_t *ev = (win_event_t *)arg; + win_event_t *ev = (win_event_t *) arg; - if (arg == NULL) return; + if (arg == NULL) + return; CloseHandle(ev->handle); free(ev); } - mutex_t * thread_create_mutex(void) { @@ -140,39 +139,39 @@ thread_create_mutex(void) return mutex; } - int thread_wait_mutex(mutex_t *mutex) { - if (mutex == NULL) return(0); + if (mutex == NULL) + return (0); - LPCRITICAL_SECTION critsec = (LPCRITICAL_SECTION)mutex; + LPCRITICAL_SECTION critsec = (LPCRITICAL_SECTION) mutex; EnterCriticalSection(critsec); return 1; } - int thread_release_mutex(mutex_t *mutex) { - if (mutex == NULL) return(0); + if (mutex == NULL) + return (0); - LPCRITICAL_SECTION critsec = (LPCRITICAL_SECTION)mutex; + LPCRITICAL_SECTION critsec = (LPCRITICAL_SECTION) mutex; LeaveCriticalSection(critsec); return 1; } - void thread_close_mutex(mutex_t *mutex) { - if (mutex == NULL) return; + if (mutex == NULL) + return; - LPCRITICAL_SECTION critsec = (LPCRITICAL_SECTION)mutex; + LPCRITICAL_SECTION critsec = (LPCRITICAL_SECTION) mutex; DeleteCriticalSection(critsec); diff --git a/src/win/win_toolbar.c b/src/win/win_toolbar.c index 322038fda..008be5c9e 100644 --- a/src/win/win_toolbar.c +++ b/src/win/win_toolbar.c @@ -11,36 +11,34 @@ #include <86box/video.h> #include <86box/win.h> -HWND hwndRebar = NULL; -static HWND hwndToolbar = NULL; -static HIMAGELIST hImageList = NULL; -static wchar_t wTitle[512] = { 0 }; -static WNDPROC pOriginalProcedure = NULL; - +HWND hwndRebar = NULL; +static HWND hwndToolbar = NULL; +static HIMAGELIST hImageList = NULL; +static wchar_t wTitle[512] = { 0 }; +static WNDPROC pOriginalProcedure = NULL; enum image_index { - RUN, - PAUSE, - CTRL_ALT_DEL, - CTRL_ALT_ESC, - HARD_RESET, - ACPI_SHUTDOWN, - SETTINGS + RUN, + PAUSE, + CTRL_ALT_DEL, + CTRL_ALT_ESC, + HARD_RESET, + ACPI_SHUTDOWN, + SETTINGS }; - void ToolBarLoadIcons() { if (!hwndToolbar) - return; + return; if (hImageList) - ImageList_Destroy(hImageList); + ImageList_Destroy(hImageList); hImageList = ImageList_Create(win_get_system_metrics(SM_CXSMICON, dpi), - win_get_system_metrics(SM_CYSMICON, dpi), - ILC_MASK | ILC_COLOR32, 1, 1); + win_get_system_metrics(SM_CYSMICON, dpi), + ILC_MASK | ILC_COLOR32, 1, 1); // The icons must be loaded in the same order as the `image_index` // enumeration above. @@ -56,55 +54,54 @@ ToolBarLoadIcons() SendMessage(hwndToolbar, TB_SETIMAGELIST, 0, (LPARAM) hImageList); } - int ToolBarProcedure(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam) { switch (message) { - case WM_NOTIFY: - switch (((LPNMHDR) lParam)->code) { - case TTN_GETDISPINFO: { - LPTOOLTIPTEXT lpttt = (LPTOOLTIPTEXT)lParam; + case WM_NOTIFY: + switch (((LPNMHDR) lParam)->code) { + case TTN_GETDISPINFO: + { + LPTOOLTIPTEXT lpttt = (LPTOOLTIPTEXT) lParam; - // Set the instance of the module that contains the resource. - lpttt->hinst = hinstance; + // Set the instance of the module that contains the resource. + lpttt->hinst = hinstance; - uintptr_t idButton = lpttt->hdr.idFrom; + uintptr_t idButton = lpttt->hdr.idFrom; - switch (idButton) { - case IDM_ACTION_PAUSE: - if (dopause) - lpttt->lpszText = MAKEINTRESOURCE(IDS_2154); - else - lpttt->lpszText = MAKEINTRESOURCE(IDS_2155); - break; + switch (idButton) { + case IDM_ACTION_PAUSE: + if (dopause) + lpttt->lpszText = MAKEINTRESOURCE(IDS_2154); + else + lpttt->lpszText = MAKEINTRESOURCE(IDS_2155); + break; - case IDM_ACTION_RESET_CAD: - lpttt->lpszText = MAKEINTRESOURCE(IDS_2156); - break; + case IDM_ACTION_RESET_CAD: + lpttt->lpszText = MAKEINTRESOURCE(IDS_2156); + break; - case IDM_ACTION_CTRL_ALT_ESC: - lpttt->lpszText = MAKEINTRESOURCE(IDS_2157); - break; + case IDM_ACTION_CTRL_ALT_ESC: + lpttt->lpszText = MAKEINTRESOURCE(IDS_2157); + break; - case IDM_ACTION_HRESET: - lpttt->lpszText = MAKEINTRESOURCE(IDS_2158); - break; + case IDM_ACTION_HRESET: + lpttt->lpszText = MAKEINTRESOURCE(IDS_2158); + break; - case IDM_CONFIG: - lpttt->lpszText = MAKEINTRESOURCE(IDS_2160); - break; - } + case IDM_CONFIG: + lpttt->lpszText = MAKEINTRESOURCE(IDS_2160); + break; + } - return TRUE; - } - } + return TRUE; + } + } } - return(CallWindowProc(pOriginalProcedure, hwnd, message, wParam, lParam)); + return (CallWindowProc(pOriginalProcedure, hwnd, message, wParam, lParam)); } - void ToolBarUpdatePause(int pause) { @@ -117,35 +114,29 @@ ToolBarUpdatePause(int pause) SendMessage(hwndToolbar, TB_SETBUTTONINFO, IDM_ACTION_PAUSE, (LPARAM) &tbbi); } - static TBBUTTON buttons[] = { - { PAUSE, IDM_ACTION_PAUSE, TBSTATE_ENABLED, BTNS_BUTTON, { 0 }, 0, 0 }, - { HARD_RESET, IDM_ACTION_HRESET, TBSTATE_ENABLED, BTNS_BUTTON, { 0 }, 0, 0 }, - { ACPI_SHUTDOWN, 0, TBSTATE_HIDDEN, BTNS_BUTTON, { 0 }, 0, 0 }, - { 0, 0, TBSTATE_INDETERMINATE, BTNS_SEP, { 0 }, 0, 0 }, - { CTRL_ALT_DEL, IDM_ACTION_RESET_CAD, TBSTATE_ENABLED, BTNS_BUTTON, { 0 }, 0, 0 }, - { CTRL_ALT_ESC, IDM_ACTION_CTRL_ALT_ESC, TBSTATE_ENABLED, BTNS_BUTTON, { 0 }, 0, 0 }, - { 0, 0, TBSTATE_INDETERMINATE, BTNS_SEP, { 0 }, 0, 0 }, - { SETTINGS, IDM_CONFIG, TBSTATE_ENABLED, BTNS_BUTTON, { 0 }, 0, 0 } + {PAUSE, IDM_ACTION_PAUSE, TBSTATE_ENABLED, BTNS_BUTTON, { 0 }, 0, 0}, + { HARD_RESET, IDM_ACTION_HRESET, TBSTATE_ENABLED, BTNS_BUTTON, { 0 }, 0, 0}, + { ACPI_SHUTDOWN, 0, TBSTATE_HIDDEN, BTNS_BUTTON, { 0 }, 0, 0}, + { 0, 0, TBSTATE_INDETERMINATE, BTNS_SEP, { 0 }, 0, 0}, + { CTRL_ALT_DEL, IDM_ACTION_RESET_CAD, TBSTATE_ENABLED, BTNS_BUTTON, { 0 }, 0, 0}, + { CTRL_ALT_ESC, IDM_ACTION_CTRL_ALT_ESC, TBSTATE_ENABLED, BTNS_BUTTON, { 0 }, 0, 0}, + { 0, 0, TBSTATE_INDETERMINATE, BTNS_SEP, { 0 }, 0, 0}, + { SETTINGS, IDM_CONFIG, TBSTATE_ENABLED, BTNS_BUTTON, { 0 }, 0, 0} }; - void ToolBarCreate(HWND hwndParent, HINSTANCE hInst) { - REBARINFO rbi = { 0 }; + REBARINFO rbi = { 0 }; REBARBANDINFO rbbi = { 0 }; - int btnSize; + int btnSize; // Create the toolbar. hwndToolbar = CreateWindowEx(WS_EX_PALETTEWINDOW, TOOLBARCLASSNAME, NULL, - WS_CHILD | WS_VISIBLE | WS_CLIPCHILDREN | - WS_CLIPSIBLINGS | TBSTYLE_TOOLTIPS | - TBSTYLE_FLAT | CCS_TOP | BTNS_AUTOSIZE | - CCS_NOPARENTALIGN | CCS_NORESIZE | - CCS_NODIVIDER, - 0, 0, 0, 0, - hwndParent, NULL, hInst, NULL); + WS_CHILD | WS_VISIBLE | WS_CLIPCHILDREN | WS_CLIPSIBLINGS | TBSTYLE_TOOLTIPS | TBSTYLE_FLAT | CCS_TOP | BTNS_AUTOSIZE | CCS_NOPARENTALIGN | CCS_NORESIZE | CCS_NODIVIDER, + 0, 0, 0, 0, + hwndParent, NULL, hInst, NULL); ToolBarLoadIcons(); @@ -154,41 +145,39 @@ ToolBarCreate(HWND hwndParent, HINSTANCE hInst) SendMessage(hwndToolbar, TB_ADDBUTTONS, sizeof(buttons) / sizeof(TBBUTTON), (LPARAM) &buttons); // Autosize the toolbar and determine its size. - btnSize = LOWORD(SendMessage(hwndToolbar, TB_GETBUTTONSIZE, 0,0)); + btnSize = LOWORD(SendMessage(hwndToolbar, TB_GETBUTTONSIZE, 0, 0)); // Replace the original procedure with ours. pOriginalProcedure = (WNDPROC) GetWindowLongPtr(hwndToolbar, GWLP_WNDPROC); - SetWindowLongPtr(hwndToolbar, GWLP_WNDPROC, (LONG_PTR)&ToolBarProcedure); + SetWindowLongPtr(hwndToolbar, GWLP_WNDPROC, (LONG_PTR) &ToolBarProcedure); // Make sure the Pause button is in the correct state. ToolBarUpdatePause(dopause); // Create the containing Rebar. hwndRebar = CreateWindowEx(0, REBARCLASSNAME, NULL, - WS_CHILD | WS_VISIBLE | WS_CLIPSIBLINGS | - WS_CLIPCHILDREN | RBS_VARHEIGHT | - CCS_NODIVIDER | CCS_NOPARENTALIGN, - 0, 0, scrnsz_x, 0, - hwndParent, NULL, hInst, NULL); + WS_CHILD | WS_VISIBLE | WS_CLIPSIBLINGS | WS_CLIPCHILDREN | RBS_VARHEIGHT | CCS_NODIVIDER | CCS_NOPARENTALIGN, + 0, 0, scrnsz_x, 0, + hwndParent, NULL, hInst, NULL); // Create and send the REBARINFO structure. rbi.cbSize = sizeof(rbi); - SendMessage(hwndRebar, RB_SETBARINFO, 0, (LPARAM)&rbi); + SendMessage(hwndRebar, RB_SETBARINFO, 0, (LPARAM) &rbi); // Add the toolbar to the rebar. - rbbi.cbSize = sizeof(rbbi); - rbbi.fMask = RBBIM_CHILD | RBBIM_CHILDSIZE | RBBIM_STYLE; - rbbi.hwndChild = hwndToolbar; + rbbi.cbSize = sizeof(rbbi); + rbbi.fMask = RBBIM_CHILD | RBBIM_CHILDSIZE | RBBIM_STYLE; + rbbi.hwndChild = hwndToolbar; rbbi.cxMinChild = 0; rbbi.cyMinChild = btnSize; - rbbi.fStyle = RBBS_NOGRIPPER; - SendMessage(hwndRebar, RB_INSERTBAND, -1, (LPARAM)&rbbi); + rbbi.fStyle = RBBS_NOGRIPPER; + SendMessage(hwndRebar, RB_INSERTBAND, -1, (LPARAM) &rbbi); // Add a label for machine information. - rbbi.fMask = RBBIM_TEXT | RBBIM_STYLE; + rbbi.fMask = RBBIM_TEXT | RBBIM_STYLE; rbbi.lpText = TEXT("Test"); rbbi.fStyle = RBBS_NOGRIPPER; - SendMessage(hwndRebar, RB_INSERTBAND, -1, (LPARAM)&rbbi); + SendMessage(hwndRebar, RB_INSERTBAND, -1, (LPARAM) &rbbi); SendMessage(hwndRebar, RB_MAXIMIZEBAND, 0, 0); ShowWindow(hwndRebar, TRUE); @@ -196,25 +185,24 @@ ToolBarCreate(HWND hwndParent, HINSTANCE hInst) return; } - wchar_t * ui_window_title(wchar_t *s) { REBARBANDINFO rbbi = { 0 }; - if (! video_fullscreen) { - if (s != NULL) { - wcsncpy(wTitle, s, sizeof_w(wTitle) - 1); - } else - s = wTitle; + if (!video_fullscreen) { + if (s != NULL) { + wcsncpy(wTitle, s, sizeof_w(wTitle) - 1); + } else + s = wTitle; - rbbi.cbSize = sizeof(rbbi); - rbbi.fMask = RBBIM_TEXT; - rbbi.lpText = s; - SendMessage(hwndRebar, RB_SETBANDINFO, 1, (LPARAM) &rbbi); + rbbi.cbSize = sizeof(rbbi); + rbbi.fMask = RBBIM_TEXT; + rbbi.lpText = s; + SendMessage(hwndRebar, RB_SETBANDINFO, 1, (LPARAM) &rbbi); } else { - if (s == NULL) - s = wTitle; + if (s == NULL) + s = wTitle; } - return(s); + return (s); } diff --git a/src/win/win_ui.c b/src/win/win_ui.c index b96d8ffb4..4342626a4 100644 --- a/src/win/win_ui.c +++ b/src/win/win_ui.c @@ -47,74 +47,75 @@ #include <86box/discord.h> #ifdef MTR_ENABLED -#include +# include #endif -#define TIMER_1SEC 1 /* ID of the one-second timer */ - +#define TIMER_1SEC 1 /* ID of the one-second timer */ /* Platform Public data, specific. */ -HWND hwndMain = NULL, /* application main window */ - hwndRender = NULL; /* machine render window */ -HMENU menuMain; /* application main menu */ -RECT oldclip; /* mouse rect */ -int sbar_height = 23; /* statusbar height */ -int tbar_height = 23; /* toolbar height */ -int minimized = 0; -int infocus = 1, button_down = 0; -int rctrl_is_lalt = 0; -int user_resize = 0; -int fixed_size_x = 0, fixed_size_y = 0; -int kbd_req_capture = 0; -int hide_status_bar = 0; -int hide_tool_bar = 0; -int dpi = 96; - -extern char openfilestring[512]; -extern WCHAR wopenfilestring[512]; +HWND hwndMain = NULL, /* application main window */ + hwndRender = NULL; /* machine render window */ +HMENU menuMain; /* application main menu */ +RECT oldclip; /* mouse rect */ +int sbar_height = 23; /* statusbar height */ +int tbar_height = 23; /* toolbar height */ +int minimized = 0; +int infocus = 1, button_down = 0; +int rctrl_is_lalt = 0; +int user_resize = 0; +int fixed_size_x = 0, fixed_size_y = 0; +int kbd_req_capture = 0; +int hide_status_bar = 0; +int hide_tool_bar = 0; +int dpi = 96; +extern char openfilestring[512]; +extern WCHAR wopenfilestring[512]; /* Local data. */ -static int manager_wm = 0; -static int save_window_pos = 0, pause_state = 0; -static int padded_frame = 0; -static int vis = -1; +static int manager_wm = 0; +static int save_window_pos = 0, pause_state = 0; +static int padded_frame = 0; +static int vis = -1; /* Per Monitor DPI Aware v2 APIs, Windows 10 v1703+ */ -void* user32_handle = NULL; -static UINT (WINAPI *pGetDpiForWindow)(HWND); -static UINT (WINAPI *pGetSystemMetricsForDpi)(int i, UINT dpi); -static DPI_AWARENESS_CONTEXT (WINAPI *pGetWindowDpiAwarenessContext)(HWND); -static BOOL (WINAPI *pAreDpiAwarenessContextsEqual)(DPI_AWARENESS_CONTEXT A, DPI_AWARENESS_CONTEXT B); +void *user32_handle = NULL; +static UINT(WINAPI *pGetDpiForWindow)(HWND); +static UINT(WINAPI *pGetSystemMetricsForDpi)(int i, UINT dpi); +static DPI_AWARENESS_CONTEXT(WINAPI *pGetWindowDpiAwarenessContext)(HWND); +static BOOL(WINAPI *pAreDpiAwarenessContextsEqual)(DPI_AWARENESS_CONTEXT A, DPI_AWARENESS_CONTEXT B); static dllimp_t user32_imports[] = { -{ "GetDpiForWindow", &pGetDpiForWindow }, -{ "GetSystemMetricsForDpi", &pGetSystemMetricsForDpi }, -{ "GetWindowDpiAwarenessContext", &pGetWindowDpiAwarenessContext }, -{ "AreDpiAwarenessContextsEqual", &pAreDpiAwarenessContextsEqual }, -{ NULL, NULL } + {"GetDpiForWindow", &pGetDpiForWindow }, + { "GetSystemMetricsForDpi", &pGetSystemMetricsForDpi }, + { "GetWindowDpiAwarenessContext", &pGetWindowDpiAwarenessContext}, + { "AreDpiAwarenessContextsEqual", &pAreDpiAwarenessContextsEqual}, + { NULL, NULL } }; /* Taskbar application ID API, Windows 7+ */ -void* shell32_handle = NULL; -static HRESULT (WINAPI *pSetCurrentProcessExplicitAppUserModelID)(PCWSTR AppID); -static dllimp_t shell32_imports[]= { -{ "SetCurrentProcessExplicitAppUserModelID", &pSetCurrentProcessExplicitAppUserModelID }, -{ NULL, NULL } +void *shell32_handle = NULL; +static HRESULT(WINAPI *pSetCurrentProcessExplicitAppUserModelID)(PCWSTR AppID); +static dllimp_t shell32_imports[] = { + {"SetCurrentProcessExplicitAppUserModelID", &pSetCurrentProcessExplicitAppUserModelID}, + { NULL, NULL } }; int -win_get_dpi(HWND hwnd) { +win_get_dpi(HWND hwnd) +{ if (user32_handle != NULL) { return pGetDpiForWindow(hwnd); } else { - HDC dc = GetDC(hwnd); + HDC dc = GetDC(hwnd); UINT dpi = GetDeviceCaps(dc, LOGPIXELSX); ReleaseDC(hwnd, dc); return dpi; } } -int win_get_system_metrics(int index, int dpi) { +int +win_get_system_metrics(int index, int dpi) +{ if (user32_handle != NULL) { /* Only call GetSystemMetricsForDpi when we are using PMv2 */ DPI_AWARENESS_CONTEXT c = pGetWindowDpiAwarenessContext(hwndMain); @@ -128,19 +129,19 @@ int win_get_system_metrics(int index, int dpi) { void ResizeWindowByClientArea(HWND hwnd, int width, int height) { - if ((vid_resize == 1) || padded_frame) { - int padding = win_get_system_metrics(SM_CXPADDEDBORDER, dpi); - width += (win_get_system_metrics(SM_CXFRAME, dpi) + padding) * 2; - height += (win_get_system_metrics(SM_CYFRAME, dpi) + padding) * 2; - } else { - width += win_get_system_metrics(SM_CXFIXEDFRAME, dpi) * 2; - height += win_get_system_metrics(SM_CYFIXEDFRAME, dpi) * 2; - } + if ((vid_resize == 1) || padded_frame) { + int padding = win_get_system_metrics(SM_CXPADDEDBORDER, dpi); + width += (win_get_system_metrics(SM_CXFRAME, dpi) + padding) * 2; + height += (win_get_system_metrics(SM_CYFRAME, dpi) + padding) * 2; + } else { + width += win_get_system_metrics(SM_CXFIXEDFRAME, dpi) * 2; + height += win_get_system_metrics(SM_CYFIXEDFRAME, dpi) * 2; + } - height += win_get_system_metrics(SM_CYCAPTION, dpi); - height += win_get_system_metrics(SM_CYBORDER, dpi) + win_get_system_metrics(SM_CYMENUSIZE, dpi); + height += win_get_system_metrics(SM_CYCAPTION, dpi); + height += win_get_system_metrics(SM_CYBORDER, dpi) + win_get_system_metrics(SM_CYMENUSIZE, dpi); - SetWindowPos(hwnd, NULL, 0, 0, width, height, SWP_NOMOVE); + SetWindowPos(hwnd, NULL, 0, 0, width, height, SWP_NOMOVE); } /* Set host cursor visible or not. */ @@ -148,13 +149,14 @@ void show_cursor(int val) { if (val == vis) - return; + return; if (val == 0) { - while (1) - if (ShowCursor(FALSE) < 0) break; + while (1) + if (ShowCursor(FALSE) < 0) + break; } else - ShowCursor(TRUE); + ShowCursor(TRUE); vis = val; } @@ -174,74 +176,66 @@ video_toggle_option(HMENU h, int *val, int id) static int delete_submenu(HMENU parent, HMENU target) { - for (int i = 0; i < GetMenuItemCount(parent); i++) - { - MENUITEMINFO mii; - mii.cbSize = sizeof(mii); - mii.fMask = MIIM_SUBMENU; + for (int i = 0; i < GetMenuItemCount(parent); i++) { + MENUITEMINFO mii; + mii.cbSize = sizeof(mii); + mii.fMask = MIIM_SUBMENU; - if (GetMenuItemInfo(parent, i, TRUE, &mii) != 0) - { - if (mii.hSubMenu == target) - { - DeleteMenu(parent, i, MF_BYPOSITION); - return 1; - } - else if (mii.hSubMenu != NULL) - { - if (delete_submenu(mii.hSubMenu, target)) - return 1; - } - } - } + if (GetMenuItemInfo(parent, i, TRUE, &mii) != 0) { + if (mii.hSubMenu == target) { + DeleteMenu(parent, i, MF_BYPOSITION); + return 1; + } else if (mii.hSubMenu != NULL) { + if (delete_submenu(mii.hSubMenu, target)) + return 1; + } + } + } - return 0; + return 0; } -static int menu_vidapi = -1; -static HMENU cur_menu = NULL; +static int menu_vidapi = -1; +static HMENU cur_menu = NULL; static void show_render_options_menu() { - if (vid_api == menu_vidapi) - return; + if (vid_api == menu_vidapi) + return; - if (cur_menu != NULL) - { - if (delete_submenu(menuMain, cur_menu)) - cur_menu = NULL; - } + if (cur_menu != NULL) { + if (delete_submenu(menuMain, cur_menu)) + cur_menu = NULL; + } - if (cur_menu == NULL) - { - switch (IDM_VID_SDL_SW + vid_api) - { - case IDM_VID_OPENGL_CORE: - cur_menu = LoadMenu(hinstance, VID_GL_SUBMENU); - InsertMenu(GetSubMenu(menuMain, 1), 6, MF_BYPOSITION | MF_STRING | MF_POPUP, (UINT_PTR)cur_menu, plat_get_string(IDS_2144)); - CheckMenuItem(menuMain, IDM_VID_GL_FPS_BLITTER, video_framerate == -1 ? MF_CHECKED : MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_GL_FPS_25, video_framerate == 25 ? MF_CHECKED : MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_GL_FPS_30, video_framerate == 30 ? MF_CHECKED : MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_GL_FPS_50, video_framerate == 50 ? MF_CHECKED : MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_GL_FPS_60, video_framerate == 60 ? MF_CHECKED : MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_GL_FPS_75, video_framerate == 75 ? MF_CHECKED : MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_GL_VSYNC, video_vsync ? MF_CHECKED : MF_UNCHECKED); - EnableMenuItem(menuMain, IDM_VID_GL_NOSHADER, strlen(video_shader) > 0 ? MF_ENABLED : MF_DISABLED); - break; - } - } + if (cur_menu == NULL) { + switch (IDM_VID_SDL_SW + vid_api) { + case IDM_VID_OPENGL_CORE: + cur_menu = LoadMenu(hinstance, VID_GL_SUBMENU); + InsertMenu(GetSubMenu(menuMain, 1), 6, MF_BYPOSITION | MF_STRING | MF_POPUP, (UINT_PTR) cur_menu, plat_get_string(IDS_2144)); + CheckMenuItem(menuMain, IDM_VID_GL_FPS_BLITTER, video_framerate == -1 ? MF_CHECKED : MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_GL_FPS_25, video_framerate == 25 ? MF_CHECKED : MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_GL_FPS_30, video_framerate == 30 ? MF_CHECKED : MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_GL_FPS_50, video_framerate == 50 ? MF_CHECKED : MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_GL_FPS_60, video_framerate == 60 ? MF_CHECKED : MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_GL_FPS_75, video_framerate == 75 ? MF_CHECKED : MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_GL_VSYNC, video_vsync ? MF_CHECKED : MF_UNCHECKED); + EnableMenuItem(menuMain, IDM_VID_GL_NOSHADER, strlen(video_shader) > 0 ? MF_ENABLED : MF_DISABLED); + break; + } + } - menu_vidapi = vid_api; + menu_vidapi = vid_api; } static void video_set_filter_menu(HMENU menu) { - CheckMenuItem(menu, IDM_VID_FILTER_NEAREST, vid_api == 0 || video_filter_method == 0 ? MF_CHECKED : MF_UNCHECKED); - CheckMenuItem(menu, IDM_VID_FILTER_LINEAR, vid_api != 0 && video_filter_method == 1 ? MF_CHECKED : MF_UNCHECKED); - EnableMenuItem(menu, IDM_VID_FILTER_NEAREST, vid_api == 0 ? MF_GRAYED : MF_ENABLED); - EnableMenuItem(menu, IDM_VID_FILTER_LINEAR, vid_api == 0 ? MF_GRAYED : MF_ENABLED); + CheckMenuItem(menu, IDM_VID_FILTER_NEAREST, vid_api == 0 || video_filter_method == 0 ? MF_CHECKED : MF_UNCHECKED); + CheckMenuItem(menu, IDM_VID_FILTER_LINEAR, vid_api != 0 && video_filter_method == 1 ? MF_CHECKED : MF_UNCHECKED); + EnableMenuItem(menu, IDM_VID_FILTER_NEAREST, vid_api == 0 ? MF_GRAYED : MF_ENABLED); + EnableMenuItem(menu, IDM_VID_FILTER_LINEAR, vid_api == 0 ? MF_GRAYED : MF_ENABLED); } void @@ -265,32 +259,32 @@ ResetAllMenus(void) CheckMenuItem(menuMain, IDM_VID_OPENGL_CORE, MF_UNCHECKED); menu_vidapi = -1; - cur_menu = NULL; + cur_menu = NULL; show_render_options_menu(); #ifdef USE_VNC CheckMenuItem(menuMain, IDM_VID_VNC, MF_UNCHECKED); #endif - CheckMenuItem(menuMain, IDM_VID_FS_FULL+0, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_FS_FULL+1, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_FS_FULL+2, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_FS_FULL+3, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_FS_FULL+4, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_FS_FULL + 0, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_FS_FULL + 1, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_FS_FULL + 2, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_FS_FULL + 3, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_FS_FULL + 4, MF_UNCHECKED); CheckMenuItem(menuMain, IDM_VID_REMEMBER, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_SCALE_1X+0, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_SCALE_1X+1, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_SCALE_1X+2, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_SCALE_1X+3, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_HIDPI, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_SCALE_1X + 0, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_SCALE_1X + 1, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_SCALE_1X + 2, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_SCALE_1X + 3, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_HIDPI, MF_UNCHECKED); CheckMenuItem(menuMain, IDM_VID_CGACON, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_GRAYCT_601+0, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_GRAYCT_601+1, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_GRAYCT_601+2, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_GRAY_RGB+0, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_GRAY_RGB+1, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_GRAY_RGB+2, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_GRAY_RGB+3, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_GRAY_RGB+4, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_GRAYCT_601 + 0, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_GRAYCT_601 + 1, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_GRAYCT_601 + 2, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_GRAY_RGB + 0, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_GRAY_RGB + 1, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_GRAY_RGB + 2, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_GRAY_RGB + 3, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_GRAY_RGB + 4, MF_UNCHECKED); CheckMenuItem(menuMain, IDM_ACTION_RCTRL_IS_LALT, rctrl_is_lalt ? MF_CHECKED : MF_UNCHECKED); CheckMenuItem(menuMain, IDM_ACTION_KBD_REQ_CAPTURE, kbd_req_capture ? MF_CHECKED : MF_UNCHECKED); @@ -299,69 +293,66 @@ ResetAllMenus(void) CheckMenuItem(menuMain, IDM_VID_HIDE_STATUS_BAR, hide_status_bar ? MF_CHECKED : MF_UNCHECKED); CheckMenuItem(menuMain, IDM_VID_HIDE_TOOLBAR, hide_tool_bar ? MF_CHECKED : MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_FORCE43, force_43?MF_CHECKED:MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_OVERSCAN, enable_overscan?MF_CHECKED:MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_FORCE43, force_43 ? MF_CHECKED : MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_OVERSCAN, enable_overscan ? MF_CHECKED : MF_UNCHECKED); CheckMenuItem(menuMain, IDM_VID_INVERT, invert_display ? MF_CHECKED : MF_UNCHECKED); if (vid_resize == 1) - CheckMenuItem(menuMain, IDM_VID_RESIZE, MF_CHECKED); - CheckMenuItem(menuMain, IDM_VID_SDL_SW+vid_api, MF_CHECKED); - CheckMenuItem(menuMain, IDM_VID_FS_FULL+video_fullscreen_scale, MF_CHECKED); - CheckMenuItem(menuMain, IDM_VID_REMEMBER, window_remember?MF_CHECKED:MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_SCALE_1X+scale, MF_CHECKED); - CheckMenuItem(menuMain, IDM_VID_HIDPI, dpi_scale?MF_CHECKED:MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_RESIZE, MF_CHECKED); + CheckMenuItem(menuMain, IDM_VID_SDL_SW + vid_api, MF_CHECKED); + CheckMenuItem(menuMain, IDM_VID_FS_FULL + video_fullscreen_scale, MF_CHECKED); + CheckMenuItem(menuMain, IDM_VID_REMEMBER, window_remember ? MF_CHECKED : MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_SCALE_1X + scale, MF_CHECKED); + CheckMenuItem(menuMain, IDM_VID_HIDPI, dpi_scale ? MF_CHECKED : MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_CGACON, vid_cga_contrast?MF_CHECKED:MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_GRAYCT_601+video_graytype, MF_CHECKED); - CheckMenuItem(menuMain, IDM_VID_GRAY_RGB+video_grayscale, MF_CHECKED); + CheckMenuItem(menuMain, IDM_VID_CGACON, vid_cga_contrast ? MF_CHECKED : MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_GRAYCT_601 + video_graytype, MF_CHECKED); + CheckMenuItem(menuMain, IDM_VID_GRAY_RGB + video_grayscale, MF_CHECKED); video_set_filter_menu(menuMain); if (discord_loaded) - CheckMenuItem(menuMain, IDM_DISCORD, enable_discord ? MF_CHECKED : MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_DISCORD, enable_discord ? MF_CHECKED : MF_UNCHECKED); else - EnableMenuItem(menuMain, IDM_DISCORD, MF_DISABLED); + EnableMenuItem(menuMain, IDM_DISCORD, MF_DISABLED); #ifdef MTR_ENABLED EnableMenuItem(menuMain, IDM_ACTION_END_TRACE, MF_DISABLED); #endif if (vid_resize) { - if (vid_resize >= 2) { - CheckMenuItem(menuMain, IDM_VID_RESIZE, MF_UNCHECKED); - EnableMenuItem(menuMain, IDM_VID_RESIZE, MF_GRAYED); - } + if (vid_resize >= 2) { + CheckMenuItem(menuMain, IDM_VID_RESIZE, MF_UNCHECKED); + EnableMenuItem(menuMain, IDM_VID_RESIZE, MF_GRAYED); + } - CheckMenuItem(menuMain, IDM_VID_SCALE_1X + scale, MF_UNCHECKED); - CheckMenuItem(menuMain, IDM_VID_SCALE_2X, MF_CHECKED); - EnableMenuItem(menuMain, IDM_VID_SCALE_1X, MF_GRAYED); - EnableMenuItem(menuMain, IDM_VID_SCALE_2X, MF_GRAYED); - EnableMenuItem(menuMain, IDM_VID_SCALE_3X, MF_GRAYED); - EnableMenuItem(menuMain, IDM_VID_SCALE_4X, MF_GRAYED); + CheckMenuItem(menuMain, IDM_VID_SCALE_1X + scale, MF_UNCHECKED); + CheckMenuItem(menuMain, IDM_VID_SCALE_2X, MF_CHECKED); + EnableMenuItem(menuMain, IDM_VID_SCALE_1X, MF_GRAYED); + EnableMenuItem(menuMain, IDM_VID_SCALE_2X, MF_GRAYED); + EnableMenuItem(menuMain, IDM_VID_SCALE_3X, MF_GRAYED); + EnableMenuItem(menuMain, IDM_VID_SCALE_4X, MF_GRAYED); } } - void win_notify_dlg_open(void) { - manager_wm = 1; + manager_wm = 1; pause_state = dopause; plat_pause(1); if (source_hwnd) - PostMessage((HWND) (uintptr_t) source_hwnd, WM_SENDDLGSTATUS, (WPARAM) 1, (LPARAM) hwndMain); + PostMessage((HWND) (uintptr_t) source_hwnd, WM_SENDDLGSTATUS, (WPARAM) 1, (LPARAM) hwndMain); } - void win_notify_dlg_closed(void) { if (source_hwnd) - PostMessage((HWND) (uintptr_t) source_hwnd, WM_SENDDLGSTATUS, (WPARAM) 0, (LPARAM) hwndMain); + PostMessage((HWND) (uintptr_t) source_hwnd, WM_SENDDLGSTATUS, (WPARAM) 0, (LPARAM) hwndMain); plat_pause(pause_state); manager_wm = 0; } - void plat_power_off(void) { @@ -388,8 +379,8 @@ plat_power_off(void) static void handle_trace(HMENU hmenu, int trace) { - EnableMenuItem(hmenu, IDM_ACTION_BEGIN_TRACE, trace? MF_GRAYED : MF_ENABLED); - EnableMenuItem(hmenu, IDM_ACTION_END_TRACE, trace? MF_ENABLED : MF_GRAYED); + EnableMenuItem(hmenu, IDM_ACTION_BEGIN_TRACE, trace ? MF_GRAYED : MF_ENABLED); + EnableMenuItem(hmenu, IDM_ACTION_END_TRACE, trace ? MF_ENABLED : MF_GRAYED); if (trace) { init_trace(); } else { @@ -407,71 +398,69 @@ static BOOL CALLBACK input_proc(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam) { switch (message) { - case WM_INPUT: - if (infocus) { - UINT size = 0; - PRAWINPUT raw = NULL; + case WM_INPUT: + if (infocus) { + UINT size = 0; + PRAWINPUT raw = NULL; - /* Here we read the raw input data */ - GetRawInputData((HRAWINPUT)lParam, RID_INPUT, NULL, &size, sizeof(RAWINPUTHEADER)); - raw = (PRAWINPUT)malloc(size); - if (GetRawInputData((HRAWINPUT)lParam, RID_INPUT, raw, &size, sizeof(RAWINPUTHEADER)) == size) { - switch(raw->header.dwType) - { - case RIM_TYPEKEYBOARD: - keyboard_handle(raw); - break; - case RIM_TYPEMOUSE: - win_mouse_handle(raw); - break; - case RIM_TYPEHID: - win_joystick_handle(raw); - break; - } - } - free(raw); - } - break; - case WM_SETFOCUS: - infocus = 1; - break; + /* Here we read the raw input data */ + GetRawInputData((HRAWINPUT) lParam, RID_INPUT, NULL, &size, sizeof(RAWINPUTHEADER)); + raw = (PRAWINPUT) malloc(size); + if (GetRawInputData((HRAWINPUT) lParam, RID_INPUT, raw, &size, sizeof(RAWINPUTHEADER)) == size) { + switch (raw->header.dwType) { + case RIM_TYPEKEYBOARD: + keyboard_handle(raw); + break; + case RIM_TYPEMOUSE: + win_mouse_handle(raw); + break; + case RIM_TYPEHID: + win_joystick_handle(raw); + break; + } + } + free(raw); + } + break; + case WM_SETFOCUS: + infocus = 1; + break; - case WM_KILLFOCUS: - infocus = 0; - plat_mouse_capture(0); - break; + case WM_KILLFOCUS: + infocus = 0; + plat_mouse_capture(0); + break; - case WM_LBUTTONDOWN: - button_down |= 1; - break; + case WM_LBUTTONDOWN: + button_down |= 1; + break; - case WM_LBUTTONUP: - if ((button_down & 1) && !video_fullscreen) - plat_mouse_capture(1); - button_down &= ~1; - break; + case WM_LBUTTONUP: + if ((button_down & 1) && !video_fullscreen) + plat_mouse_capture(1); + button_down &= ~1; + break; - case WM_MBUTTONUP: - if (mouse_get_buttons() < 3) - plat_mouse_capture(0); - break; + case WM_MBUTTONUP: + if (mouse_get_buttons() < 3) + plat_mouse_capture(0); + break; - default: - return(1); - /* return(CallWindowProc((WNDPROC)input_orig_proc, - hwnd, message, wParam, lParam)); */ + default: + return (1); + /* return(CallWindowProc((WNDPROC)input_orig_proc, + hwnd, message, wParam, lParam)); */ } - return(0); + return (0); } - static LRESULT CALLBACK MainWindowProcedure(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam) { HMENU hmenu; - int i; + int i; RECT rect, *rect_p; WINDOWPOS *pos; @@ -479,699 +468,697 @@ MainWindowProcedure(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam) int temp_x, temp_y; if (input_proc(hwnd, message, wParam, lParam) == 0) - return(0); + return (0); switch (message) { - case WM_CREATE: - SetTimer(hwnd, TIMER_1SEC, 1000, NULL); - break; + case WM_CREATE: + SetTimer(hwnd, TIMER_1SEC, 1000, NULL); + break; - case WM_COMMAND: - hmenu = GetMenu(hwnd); - switch (LOWORD(wParam)) { - case IDM_ACTION_SCREENSHOT: - take_screenshot(); - break; + case WM_COMMAND: + hmenu = GetMenu(hwnd); + switch (LOWORD(wParam)) { + case IDM_ACTION_SCREENSHOT: + take_screenshot(); + break; #ifdef MTR_ENABLED - case IDM_ACTION_BEGIN_TRACE: - case IDM_ACTION_END_TRACE: - case IDM_ACTION_TRACE: - tracing_on = !tracing_on; - handle_trace(hmenu, tracing_on); - break; + case IDM_ACTION_BEGIN_TRACE: + case IDM_ACTION_END_TRACE: + case IDM_ACTION_TRACE: + tracing_on = !tracing_on; + handle_trace(hmenu, tracing_on); + break; #endif - case IDM_ACTION_HRESET: - win_notify_dlg_open(); - if (confirm_reset) - i = ui_msgbox_ex(MBX_QUESTION_YN | MBX_DONTASK, (wchar_t *) IDS_2112, NULL, (wchar_t *) IDS_2137, (wchar_t *) IDS_2138, NULL); - else - i = 0; - if ((i % 10) == 0) { - pc_reset_hard(); - if (i == 10) { - confirm_reset = 0; - nvr_save(); - config_save(); - } - } - win_notify_dlg_closed(); - break; + case IDM_ACTION_HRESET: + win_notify_dlg_open(); + if (confirm_reset) + i = ui_msgbox_ex(MBX_QUESTION_YN | MBX_DONTASK, (wchar_t *) IDS_2112, NULL, (wchar_t *) IDS_2137, (wchar_t *) IDS_2138, NULL); + else + i = 0; + if ((i % 10) == 0) { + pc_reset_hard(); + if (i == 10) { + confirm_reset = 0; + nvr_save(); + config_save(); + } + } + win_notify_dlg_closed(); + break; - case IDM_ACTION_RESET_CAD: - pc_send_cad(); - break; + case IDM_ACTION_RESET_CAD: + pc_send_cad(); + break; - case IDM_ACTION_EXIT: - win_notify_dlg_open(); - if (confirm_exit && confirm_exit_cmdl) - i = ui_msgbox_ex(MBX_QUESTION_YN | MBX_DONTASK, (wchar_t *) IDS_2113, NULL, (wchar_t *) IDS_2119, (wchar_t *) IDS_2136, NULL); - else - i = 0; - if ((i % 10) == 0) { - if (i == 10) { - confirm_exit = 0; - nvr_save(); - config_save(); - } - KillTimer(hwnd, TIMER_1SEC); - PostQuitMessage(0); - } - win_notify_dlg_closed(); - break; + case IDM_ACTION_EXIT: + win_notify_dlg_open(); + if (confirm_exit && confirm_exit_cmdl) + i = ui_msgbox_ex(MBX_QUESTION_YN | MBX_DONTASK, (wchar_t *) IDS_2113, NULL, (wchar_t *) IDS_2119, (wchar_t *) IDS_2136, NULL); + else + i = 0; + if ((i % 10) == 0) { + if (i == 10) { + confirm_exit = 0; + nvr_save(); + config_save(); + } + KillTimer(hwnd, TIMER_1SEC); + PostQuitMessage(0); + } + win_notify_dlg_closed(); + break; - case IDM_ACTION_CTRL_ALT_ESC: - pc_send_cae(); - break; + case IDM_ACTION_CTRL_ALT_ESC: + pc_send_cae(); + break; - case IDM_ACTION_RCTRL_IS_LALT: - rctrl_is_lalt ^= 1; - CheckMenuItem(hmenu, IDM_ACTION_RCTRL_IS_LALT, rctrl_is_lalt ? MF_CHECKED : MF_UNCHECKED); - config_save(); - break; + case IDM_ACTION_RCTRL_IS_LALT: + rctrl_is_lalt ^= 1; + CheckMenuItem(hmenu, IDM_ACTION_RCTRL_IS_LALT, rctrl_is_lalt ? MF_CHECKED : MF_UNCHECKED); + config_save(); + break; - case IDM_ACTION_KBD_REQ_CAPTURE: - kbd_req_capture ^= 1; - CheckMenuItem(hmenu, IDM_ACTION_KBD_REQ_CAPTURE, kbd_req_capture ? MF_CHECKED : MF_UNCHECKED); - config_save(); - break; + case IDM_ACTION_KBD_REQ_CAPTURE: + kbd_req_capture ^= 1; + CheckMenuItem(hmenu, IDM_ACTION_KBD_REQ_CAPTURE, kbd_req_capture ? MF_CHECKED : MF_UNCHECKED); + config_save(); + break; - case IDM_ACTION_PAUSE: - plat_pause(dopause ^ 1); - CheckMenuItem(menuMain, IDM_ACTION_PAUSE, dopause ? MF_CHECKED : MF_UNCHECKED); - break; + case IDM_ACTION_PAUSE: + plat_pause(dopause ^ 1); + CheckMenuItem(menuMain, IDM_ACTION_PAUSE, dopause ? MF_CHECKED : MF_UNCHECKED); + break; - case IDM_CONFIG: - win_settings_open(hwnd); - break; + case IDM_CONFIG: + win_settings_open(hwnd); + break; - case IDM_SND_GAIN: - SoundGainDialogCreate(hwnd); - break; + case IDM_SND_GAIN: + SoundGainDialogCreate(hwnd); + break; - case IDM_ABOUT: - AboutDialogCreate(hwnd); - break; + case IDM_ABOUT: + AboutDialogCreate(hwnd); + break; - case IDM_DOCS: - ShellExecute(hwnd, L"open", EMU_DOCS_URL_W, NULL, NULL, SW_SHOW); - break; + case IDM_DOCS: + ShellExecute(hwnd, L"open", EMU_DOCS_URL_W, NULL, NULL, SW_SHOW); + break; - case IDM_UPDATE_ICONS: - update_icons ^= 1; - CheckMenuItem(hmenu, IDM_UPDATE_ICONS, update_icons ? MF_CHECKED : MF_UNCHECKED); - config_save(); - break; + case IDM_UPDATE_ICONS: + update_icons ^= 1; + CheckMenuItem(hmenu, IDM_UPDATE_ICONS, update_icons ? MF_CHECKED : MF_UNCHECKED); + config_save(); + break; - case IDM_VID_HIDE_STATUS_BAR: - hide_status_bar ^= 1; - CheckMenuItem(hmenu, IDM_VID_HIDE_STATUS_BAR, hide_status_bar ? MF_CHECKED : MF_UNCHECKED); - ShowWindow(hwndSBAR, hide_status_bar ? SW_HIDE : SW_SHOW); - GetWindowRect(hwnd, &rect); - if (hide_status_bar) - MoveWindow(hwnd, rect.left, rect.top, rect.right - rect.left, rect.bottom - rect.top - sbar_height, TRUE); - else - MoveWindow(hwnd, rect.left, rect.top, rect.right - rect.left, rect.bottom - rect.top + sbar_height, TRUE); - config_save(); - break; + case IDM_VID_HIDE_STATUS_BAR: + hide_status_bar ^= 1; + CheckMenuItem(hmenu, IDM_VID_HIDE_STATUS_BAR, hide_status_bar ? MF_CHECKED : MF_UNCHECKED); + ShowWindow(hwndSBAR, hide_status_bar ? SW_HIDE : SW_SHOW); + GetWindowRect(hwnd, &rect); + if (hide_status_bar) + MoveWindow(hwnd, rect.left, rect.top, rect.right - rect.left, rect.bottom - rect.top - sbar_height, TRUE); + else + MoveWindow(hwnd, rect.left, rect.top, rect.right - rect.left, rect.bottom - rect.top + sbar_height, TRUE); + config_save(); + break; - case IDM_VID_HIDE_TOOLBAR: - hide_tool_bar ^= 1; - CheckMenuItem(hmenu, IDM_VID_HIDE_TOOLBAR, hide_tool_bar ? MF_CHECKED : MF_UNCHECKED); - ShowWindow(hwndRebar, hide_tool_bar ? SW_HIDE : SW_SHOW); - GetWindowRect(hwnd, &rect); - if (hide_tool_bar) { - MoveWindow(hwnd, rect.left, rect.top, rect.right - rect.left, rect.bottom - rect.top - tbar_height, TRUE); - SetWindowPos(hwndRender, NULL, 0, 0, 0, 0, SWP_NOSIZE | SWP_NOZORDER | SWP_NOACTIVATE); - } else { - MoveWindow(hwnd, rect.left, rect.top, rect.right - rect.left, rect.bottom - rect.top + tbar_height, TRUE); - SetWindowPos(hwndRender, NULL, 0, tbar_height, 0, 0, SWP_NOSIZE | SWP_NOZORDER | SWP_NOACTIVATE); - } - config_save(); - break; + case IDM_VID_HIDE_TOOLBAR: + hide_tool_bar ^= 1; + CheckMenuItem(hmenu, IDM_VID_HIDE_TOOLBAR, hide_tool_bar ? MF_CHECKED : MF_UNCHECKED); + ShowWindow(hwndRebar, hide_tool_bar ? SW_HIDE : SW_SHOW); + GetWindowRect(hwnd, &rect); + if (hide_tool_bar) { + MoveWindow(hwnd, rect.left, rect.top, rect.right - rect.left, rect.bottom - rect.top - tbar_height, TRUE); + SetWindowPos(hwndRender, NULL, 0, 0, 0, 0, SWP_NOSIZE | SWP_NOZORDER | SWP_NOACTIVATE); + } else { + MoveWindow(hwnd, rect.left, rect.top, rect.right - rect.left, rect.bottom - rect.top + tbar_height, TRUE); + SetWindowPos(hwndRender, NULL, 0, tbar_height, 0, 0, SWP_NOSIZE | SWP_NOZORDER | SWP_NOACTIVATE); + } + config_save(); + break; - case IDM_VID_RESIZE: - vid_resize ^= 1; - CheckMenuItem(hmenu, IDM_VID_RESIZE, (vid_resize & 1) ? MF_CHECKED : MF_UNCHECKED); + case IDM_VID_RESIZE: + vid_resize ^= 1; + CheckMenuItem(hmenu, IDM_VID_RESIZE, (vid_resize & 1) ? MF_CHECKED : MF_UNCHECKED); - if (vid_resize == 1) - SetWindowLongPtr(hwnd, GWL_STYLE, (WS_OVERLAPPEDWINDOW) | WS_VISIBLE); - else - SetWindowLongPtr(hwnd, GWL_STYLE, (WS_OVERLAPPEDWINDOW & ~WS_SIZEBOX & ~WS_MAXIMIZEBOX) | WS_VISIBLE); + if (vid_resize == 1) + SetWindowLongPtr(hwnd, GWL_STYLE, (WS_OVERLAPPEDWINDOW) | WS_VISIBLE); + else + SetWindowLongPtr(hwnd, GWL_STYLE, (WS_OVERLAPPEDWINDOW & ~WS_SIZEBOX & ~WS_MAXIMIZEBOX) | WS_VISIBLE); - /* scale the screen base on DPI */ - if (dpi_scale) { - temp_x = MulDiv(unscaled_size_x, dpi, 96); - temp_y = MulDiv(unscaled_size_y, dpi, 96); - } else { - temp_x = unscaled_size_x; - temp_y = unscaled_size_y; - } + /* scale the screen base on DPI */ + if (dpi_scale) { + temp_x = MulDiv(unscaled_size_x, dpi, 96); + temp_y = MulDiv(unscaled_size_y, dpi, 96); + } else { + temp_x = unscaled_size_x; + temp_y = unscaled_size_y; + } - ResizeWindowByClientArea(hwnd, temp_x, temp_y + (hide_status_bar ? 0 : sbar_height) + (hide_tool_bar ? 0 : tbar_height)); + ResizeWindowByClientArea(hwnd, temp_x, temp_y + (hide_status_bar ? 0 : sbar_height) + (hide_tool_bar ? 0 : tbar_height)); - if (mouse_capture) { - ClipCursor(&rect); - } + if (mouse_capture) { + ClipCursor(&rect); + } - if (vid_resize) { - CheckMenuItem(hmenu, IDM_VID_SCALE_1X + scale, MF_UNCHECKED); - CheckMenuItem(hmenu, IDM_VID_SCALE_2X, MF_CHECKED); - scale = 1; - } - EnableMenuItem(hmenu, IDM_VID_SCALE_1X, vid_resize ? MF_GRAYED : MF_ENABLED); - EnableMenuItem(hmenu, IDM_VID_SCALE_2X, vid_resize ? MF_GRAYED : MF_ENABLED); - EnableMenuItem(hmenu, IDM_VID_SCALE_3X, vid_resize ? MF_GRAYED : MF_ENABLED); - EnableMenuItem(hmenu, IDM_VID_SCALE_4X, vid_resize ? MF_GRAYED : MF_ENABLED); + if (vid_resize) { + CheckMenuItem(hmenu, IDM_VID_SCALE_1X + scale, MF_UNCHECKED); + CheckMenuItem(hmenu, IDM_VID_SCALE_2X, MF_CHECKED); + scale = 1; + } + EnableMenuItem(hmenu, IDM_VID_SCALE_1X, vid_resize ? MF_GRAYED : MF_ENABLED); + EnableMenuItem(hmenu, IDM_VID_SCALE_2X, vid_resize ? MF_GRAYED : MF_ENABLED); + EnableMenuItem(hmenu, IDM_VID_SCALE_3X, vid_resize ? MF_GRAYED : MF_ENABLED); + EnableMenuItem(hmenu, IDM_VID_SCALE_4X, vid_resize ? MF_GRAYED : MF_ENABLED); - scrnsz_x = unscaled_size_x; - scrnsz_y = unscaled_size_y; - atomic_store(&doresize_monitors[0], 1); - config_save(); - break; + scrnsz_x = unscaled_size_x; + scrnsz_y = unscaled_size_y; + atomic_store(&doresize_monitors[0], 1); + config_save(); + break; - case IDM_VID_REMEMBER: - window_remember = !window_remember; - CheckMenuItem(hmenu, IDM_VID_REMEMBER, window_remember ? MF_CHECKED : MF_UNCHECKED); - GetWindowRect(hwnd, &rect); - if (window_remember || (vid_resize & 2)) { - window_x = rect.left; - window_y = rect.top; - if (!(vid_resize & 2)) { - window_w = rect.right - rect.left; - window_h = rect.bottom - rect.top; - } - } - config_save(); - break; + case IDM_VID_REMEMBER: + window_remember = !window_remember; + CheckMenuItem(hmenu, IDM_VID_REMEMBER, window_remember ? MF_CHECKED : MF_UNCHECKED); + GetWindowRect(hwnd, &rect); + if (window_remember || (vid_resize & 2)) { + window_x = rect.left; + window_y = rect.top; + if (!(vid_resize & 2)) { + window_w = rect.right - rect.left; + window_h = rect.bottom - rect.top; + } + } + config_save(); + break; - case IDM_VID_SDL_SW: - case IDM_VID_SDL_HW: - case IDM_VID_SDL_OPENGL: - case IDM_VID_OPENGL_CORE: + case IDM_VID_SDL_SW: + case IDM_VID_SDL_HW: + case IDM_VID_SDL_OPENGL: + case IDM_VID_OPENGL_CORE: #ifdef USE_VNC - case IDM_VID_VNC: + case IDM_VID_VNC: #endif - CheckMenuItem(hmenu, IDM_VID_SDL_SW + vid_api, MF_UNCHECKED); - plat_setvid(LOWORD(wParam) - IDM_VID_SDL_SW); - CheckMenuItem(hmenu, IDM_VID_SDL_SW + vid_api, MF_CHECKED); - video_set_filter_menu(hmenu); - config_save(); - show_render_options_menu(); - break; + CheckMenuItem(hmenu, IDM_VID_SDL_SW + vid_api, MF_UNCHECKED); + plat_setvid(LOWORD(wParam) - IDM_VID_SDL_SW); + CheckMenuItem(hmenu, IDM_VID_SDL_SW + vid_api, MF_CHECKED); + video_set_filter_menu(hmenu); + config_save(); + show_render_options_menu(); + break; - case IDM_VID_GL_FPS_BLITTER: - case IDM_VID_GL_FPS_25: - case IDM_VID_GL_FPS_30: - case IDM_VID_GL_FPS_50: - case IDM_VID_GL_FPS_60: - case IDM_VID_GL_FPS_75: - { - static const int fps[] = { -1, 25, 30, 50, 60, 75 }; - int idx = 0; - for (; fps[idx] != video_framerate; idx++); - CheckMenuItem(hmenu, IDM_VID_GL_FPS_BLITTER + idx, MF_UNCHECKED); - video_framerate = fps[LOWORD(wParam) - IDM_VID_GL_FPS_BLITTER]; - CheckMenuItem(hmenu, LOWORD(wParam), MF_CHECKED); - plat_vid_reload_options(); - config_save(); - break; - } - case IDM_VID_GL_VSYNC: - video_vsync = !video_vsync; - CheckMenuItem(hmenu, IDM_VID_GL_VSYNC, video_vsync ? MF_CHECKED : MF_UNCHECKED); - plat_vid_reload_options(); - config_save(); - break; - case IDM_VID_GL_SHADER: - win_notify_dlg_open(); - if (file_dlg_st(hwnd, IDS_2143, video_shader, NULL, 0) == 0) - { - strcpy_s(video_shader, sizeof(video_shader), openfilestring); - EnableMenuItem(menuMain, IDM_VID_GL_NOSHADER, strlen(video_shader) > 0 ? MF_ENABLED : MF_DISABLED); - } - win_notify_dlg_closed(); - plat_vid_reload_options(); - break; - case IDM_VID_GL_NOSHADER: - video_shader[0] = '\0'; - EnableMenuItem(menuMain, IDM_VID_GL_NOSHADER, MF_DISABLED); - plat_vid_reload_options(); - break; + case IDM_VID_GL_FPS_BLITTER: + case IDM_VID_GL_FPS_25: + case IDM_VID_GL_FPS_30: + case IDM_VID_GL_FPS_50: + case IDM_VID_GL_FPS_60: + case IDM_VID_GL_FPS_75: + { + static const int fps[] = { -1, 25, 30, 50, 60, 75 }; + int idx = 0; + for (; fps[idx] != video_framerate; idx++) + ; + CheckMenuItem(hmenu, IDM_VID_GL_FPS_BLITTER + idx, MF_UNCHECKED); + video_framerate = fps[LOWORD(wParam) - IDM_VID_GL_FPS_BLITTER]; + CheckMenuItem(hmenu, LOWORD(wParam), MF_CHECKED); + plat_vid_reload_options(); + config_save(); + break; + } + case IDM_VID_GL_VSYNC: + video_vsync = !video_vsync; + CheckMenuItem(hmenu, IDM_VID_GL_VSYNC, video_vsync ? MF_CHECKED : MF_UNCHECKED); + plat_vid_reload_options(); + config_save(); + break; + case IDM_VID_GL_SHADER: + win_notify_dlg_open(); + if (file_dlg_st(hwnd, IDS_2143, video_shader, NULL, 0) == 0) { + strcpy_s(video_shader, sizeof(video_shader), openfilestring); + EnableMenuItem(menuMain, IDM_VID_GL_NOSHADER, strlen(video_shader) > 0 ? MF_ENABLED : MF_DISABLED); + } + win_notify_dlg_closed(); + plat_vid_reload_options(); + break; + case IDM_VID_GL_NOSHADER: + video_shader[0] = '\0'; + EnableMenuItem(menuMain, IDM_VID_GL_NOSHADER, MF_DISABLED); + plat_vid_reload_options(); + break; - case IDM_VID_FULLSCREEN: - plat_setfullscreen(1); - config_save(); - break; + case IDM_VID_FULLSCREEN: + plat_setfullscreen(1); + config_save(); + break; - case IDM_VID_FS_FULL: - case IDM_VID_FS_43: - case IDM_VID_FS_KEEPRATIO: - case IDM_VID_FS_INT: - CheckMenuItem(hmenu, IDM_VID_FS_FULL+video_fullscreen_scale, MF_UNCHECKED); - video_fullscreen_scale = LOWORD(wParam) - IDM_VID_FS_FULL; - CheckMenuItem(hmenu, IDM_VID_FS_FULL+video_fullscreen_scale, MF_CHECKED); - device_force_redraw(); - config_save(); - break; + case IDM_VID_FS_FULL: + case IDM_VID_FS_43: + case IDM_VID_FS_KEEPRATIO: + case IDM_VID_FS_INT: + CheckMenuItem(hmenu, IDM_VID_FS_FULL + video_fullscreen_scale, MF_UNCHECKED); + video_fullscreen_scale = LOWORD(wParam) - IDM_VID_FS_FULL; + CheckMenuItem(hmenu, IDM_VID_FS_FULL + video_fullscreen_scale, MF_CHECKED); + device_force_redraw(); + config_save(); + break; - case IDM_VID_SCALE_1X: - case IDM_VID_SCALE_2X: - case IDM_VID_SCALE_3X: - case IDM_VID_SCALE_4X: - CheckMenuItem(hmenu, IDM_VID_SCALE_1X+scale, MF_UNCHECKED); - scale = LOWORD(wParam) - IDM_VID_SCALE_1X; - CheckMenuItem(hmenu, IDM_VID_SCALE_1X+scale, MF_CHECKED); - reset_screen_size(); - device_force_redraw(); - video_force_resize_set(1); - atomic_store(&doresize_monitors[0], 1); - config_save(); - break; + case IDM_VID_SCALE_1X: + case IDM_VID_SCALE_2X: + case IDM_VID_SCALE_3X: + case IDM_VID_SCALE_4X: + CheckMenuItem(hmenu, IDM_VID_SCALE_1X + scale, MF_UNCHECKED); + scale = LOWORD(wParam) - IDM_VID_SCALE_1X; + CheckMenuItem(hmenu, IDM_VID_SCALE_1X + scale, MF_CHECKED); + reset_screen_size(); + device_force_redraw(); + video_force_resize_set(1); + atomic_store(&doresize_monitors[0], 1); + config_save(); + break; - case IDM_VID_FILTER_NEAREST: - case IDM_VID_FILTER_LINEAR: - video_filter_method = LOWORD(wParam) - IDM_VID_FILTER_NEAREST; - video_set_filter_menu(hmenu); - plat_vid_reload_options(); - config_save(); - break; + case IDM_VID_FILTER_NEAREST: + case IDM_VID_FILTER_LINEAR: + video_filter_method = LOWORD(wParam) - IDM_VID_FILTER_NEAREST; + video_set_filter_menu(hmenu); + plat_vid_reload_options(); + config_save(); + break; - case IDM_VID_HIDPI: - dpi_scale = !dpi_scale; - CheckMenuItem(hmenu, IDM_VID_HIDPI, dpi_scale ? MF_CHECKED : MF_UNCHECKED); - atomic_store(&doresize_monitors[0], 1); - config_save(); - break; + case IDM_VID_HIDPI: + dpi_scale = !dpi_scale; + CheckMenuItem(hmenu, IDM_VID_HIDPI, dpi_scale ? MF_CHECKED : MF_UNCHECKED); + atomic_store(&doresize_monitors[0], 1); + config_save(); + break; - case IDM_PREFERENCES: - PreferencesDlgCreate(hwnd); - break; + case IDM_PREFERENCES: + PreferencesDlgCreate(hwnd); + break; - case IDM_VID_SPECIFY_DIM: - SpecifyDimensionsDialogCreate(hwnd); - break; + case IDM_VID_SPECIFY_DIM: + SpecifyDimensionsDialogCreate(hwnd); + break; - case IDM_VID_FORCE43: - video_toggle_option(hmenu, &force_43, IDM_VID_FORCE43); - video_force_resize_set(1); - break; + case IDM_VID_FORCE43: + video_toggle_option(hmenu, &force_43, IDM_VID_FORCE43); + video_force_resize_set(1); + break; - case IDM_VID_INVERT: - video_toggle_option(hmenu, &invert_display, IDM_VID_INVERT); - video_copy = (video_grayscale || invert_display) ? video_transform_copy : memcpy; - plat_vidapi_reload(); - break; + case IDM_VID_INVERT: + video_toggle_option(hmenu, &invert_display, IDM_VID_INVERT); + video_copy = (video_grayscale || invert_display) ? video_transform_copy : memcpy; + plat_vidapi_reload(); + break; - case IDM_VID_OVERSCAN: - update_overscan = 1; - video_toggle_option(hmenu, &enable_overscan, IDM_VID_OVERSCAN); - video_force_resize_set(1); - break; + case IDM_VID_OVERSCAN: + update_overscan = 1; + video_toggle_option(hmenu, &enable_overscan, IDM_VID_OVERSCAN); + video_force_resize_set(1); + break; - case IDM_VID_CGACON: - vid_cga_contrast ^= 1; - CheckMenuItem(hmenu, IDM_VID_CGACON, vid_cga_contrast ? MF_CHECKED : MF_UNCHECKED); - cgapal_rebuild(); - config_save(); - break; + case IDM_VID_CGACON: + vid_cga_contrast ^= 1; + CheckMenuItem(hmenu, IDM_VID_CGACON, vid_cga_contrast ? MF_CHECKED : MF_UNCHECKED); + cgapal_rebuild(); + config_save(); + break; - case IDM_VID_GRAYCT_601: - case IDM_VID_GRAYCT_709: - case IDM_VID_GRAYCT_AVE: - CheckMenuItem(hmenu, IDM_VID_GRAYCT_601+video_graytype, MF_UNCHECKED); - video_graytype = LOWORD(wParam) - IDM_VID_GRAYCT_601; - CheckMenuItem(hmenu, IDM_VID_GRAYCT_601+video_graytype, MF_CHECKED); - device_force_redraw(); - config_save(); - break; + case IDM_VID_GRAYCT_601: + case IDM_VID_GRAYCT_709: + case IDM_VID_GRAYCT_AVE: + CheckMenuItem(hmenu, IDM_VID_GRAYCT_601 + video_graytype, MF_UNCHECKED); + video_graytype = LOWORD(wParam) - IDM_VID_GRAYCT_601; + CheckMenuItem(hmenu, IDM_VID_GRAYCT_601 + video_graytype, MF_CHECKED); + device_force_redraw(); + config_save(); + break; - case IDM_VID_GRAY_RGB: - case IDM_VID_GRAY_MONO: - case IDM_VID_GRAY_AMBER: - case IDM_VID_GRAY_GREEN: - case IDM_VID_GRAY_WHITE: - CheckMenuItem(hmenu, IDM_VID_GRAY_RGB+video_grayscale, MF_UNCHECKED); - video_grayscale = LOWORD(wParam) - IDM_VID_GRAY_RGB; - video_copy = (video_grayscale || invert_display) ? video_transform_copy : memcpy; - plat_vidapi_reload(); - CheckMenuItem(hmenu, IDM_VID_GRAY_RGB+video_grayscale, MF_CHECKED); - device_force_redraw(); - config_save(); - break; + case IDM_VID_GRAY_RGB: + case IDM_VID_GRAY_MONO: + case IDM_VID_GRAY_AMBER: + case IDM_VID_GRAY_GREEN: + case IDM_VID_GRAY_WHITE: + CheckMenuItem(hmenu, IDM_VID_GRAY_RGB + video_grayscale, MF_UNCHECKED); + video_grayscale = LOWORD(wParam) - IDM_VID_GRAY_RGB; + video_copy = (video_grayscale || invert_display) ? video_transform_copy : memcpy; + plat_vidapi_reload(); + CheckMenuItem(hmenu, IDM_VID_GRAY_RGB + video_grayscale, MF_CHECKED); + device_force_redraw(); + config_save(); + break; - case IDM_DISCORD: - if (! discord_loaded) break; - enable_discord ^= 1; - CheckMenuItem(hmenu, IDM_DISCORD, enable_discord ? MF_CHECKED : MF_UNCHECKED); - if(enable_discord) { - discord_init(); - discord_update_activity(dopause); - } else - discord_close(); - break; + case IDM_DISCORD: + if (!discord_loaded) + break; + enable_discord ^= 1; + CheckMenuItem(hmenu, IDM_DISCORD, enable_discord ? MF_CHECKED : MF_UNCHECKED); + if (enable_discord) { + discord_init(); + discord_update_activity(dopause); + } else + discord_close(); + break; - default: - media_menu_proc(hwnd, message, wParam, lParam); - break; - } - return(0); + default: + media_menu_proc(hwnd, message, wParam, lParam); + break; + } + return (0); - case WM_ENTERMENULOOP: - break; + case WM_ENTERMENULOOP: + break; - case WM_DPICHANGED: - dpi = HIWORD(wParam); - GetWindowRect(hwndSBAR, &rect); - sbar_height = rect.bottom - rect.top; - GetWindowRect(hwndRebar, &rect); - tbar_height = rect.bottom - rect.top; - rect_p = (RECT*)lParam; - if (vid_resize == 1) - MoveWindow(hwnd, rect_p->left, rect_p->top, rect_p->right - rect_p->left, rect_p->bottom - rect_p->top, TRUE); - else if (vid_resize >= 2) { - temp_x = fixed_size_x; - temp_y = fixed_size_y; - if (dpi_scale) { - temp_x = MulDiv(temp_x, dpi, 96); - temp_y = MulDiv(temp_y, dpi, 96); - } + case WM_DPICHANGED: + dpi = HIWORD(wParam); + GetWindowRect(hwndSBAR, &rect); + sbar_height = rect.bottom - rect.top; + GetWindowRect(hwndRebar, &rect); + tbar_height = rect.bottom - rect.top; + rect_p = (RECT *) lParam; + if (vid_resize == 1) + MoveWindow(hwnd, rect_p->left, rect_p->top, rect_p->right - rect_p->left, rect_p->bottom - rect_p->top, TRUE); + else if (vid_resize >= 2) { + temp_x = fixed_size_x; + temp_y = fixed_size_y; + if (dpi_scale) { + temp_x = MulDiv(temp_x, dpi, 96); + temp_y = MulDiv(temp_y, dpi, 96); + } - /* Main Window. */ - ResizeWindowByClientArea(hwndMain, temp_x, temp_y + (hide_status_bar ? 0 : sbar_height) + (hide_tool_bar ? 0 : tbar_height)); - } else if (!user_resize) - atomic_store(&doresize_monitors[0], 1); - break; + /* Main Window. */ + ResizeWindowByClientArea(hwndMain, temp_x, temp_y + (hide_status_bar ? 0 : sbar_height) + (hide_tool_bar ? 0 : tbar_height)); + } else if (!user_resize) + atomic_store(&doresize_monitors[0], 1); + break; - case WM_WINDOWPOSCHANGED: - if (video_fullscreen & 1) - PostMessage(hwndMain, WM_LEAVEFULLSCREEN, 0, 0); + case WM_WINDOWPOSCHANGED: + if (video_fullscreen & 1) + PostMessage(hwndMain, WM_LEAVEFULLSCREEN, 0, 0); - pos = (WINDOWPOS*)lParam; - GetClientRect(hwndMain, &rect); + pos = (WINDOWPOS *) lParam; + GetClientRect(hwndMain, &rect); - if (IsIconic(hwndMain)) { - plat_vidapi_enable(0); - minimized = 1; - return(0); - } else if (minimized) { - minimized = 0; - video_force_resize_set(1); - } + if (IsIconic(hwndMain)) { + plat_vidapi_enable(0); + minimized = 1; + return (0); + } else if (minimized) { + minimized = 0; + video_force_resize_set(1); + } - if (!(pos->flags & SWP_NOSIZE) && (window_remember || (vid_resize & 2))) { - window_x = pos->x; - window_y = pos->y; - if (!(vid_resize & 2)) { - window_w = pos->cx; - window_h = pos->cy; - } - save_window_pos = 1; - config_save(); - } + if (!(pos->flags & SWP_NOSIZE) && (window_remember || (vid_resize & 2))) { + window_x = pos->x; + window_y = pos->y; + if (!(vid_resize & 2)) { + window_w = pos->cx; + window_h = pos->cy; + } + save_window_pos = 1; + config_save(); + } - if (!(pos->flags & SWP_NOSIZE) || !user_resize) { - plat_vidapi_enable(0); + if (!(pos->flags & SWP_NOSIZE) || !user_resize) { + plat_vidapi_enable(0); - if (!hide_status_bar) - MoveWindow(hwndSBAR, 0, rect.bottom - sbar_height, sbar_height, rect.right, TRUE); + if (!hide_status_bar) + MoveWindow(hwndSBAR, 0, rect.bottom - sbar_height, sbar_height, rect.right, TRUE); - if (!hide_tool_bar) - MoveWindow(hwndRebar, 0, 0, rect.right, tbar_height, TRUE); + if (!hide_tool_bar) + MoveWindow(hwndRebar, 0, 0, rect.right, tbar_height, TRUE); - MoveWindow(hwndRender, 0, hide_tool_bar ? 0 : tbar_height, rect.right, rect.bottom - (hide_status_bar ? 0 : sbar_height) - (hide_tool_bar ? 0 : tbar_height), TRUE); + MoveWindow(hwndRender, 0, hide_tool_bar ? 0 : tbar_height, rect.right, rect.bottom - (hide_status_bar ? 0 : sbar_height) - (hide_tool_bar ? 0 : tbar_height), TRUE); - GetClientRect(hwndRender, &rect); - if (dpi_scale) { - temp_x = MulDiv(rect.right, 96, dpi); - temp_y = MulDiv(rect.bottom, 96, dpi); + GetClientRect(hwndRender, &rect); + if (dpi_scale) { + temp_x = MulDiv(rect.right, 96, dpi); + temp_y = MulDiv(rect.bottom, 96, dpi); - if (temp_x != scrnsz_x || temp_y != scrnsz_y) { - scrnsz_x = temp_x; - scrnsz_y = temp_y; - atomic_store(&doresize_monitors[0], 1); - } - } else { - if (rect.right != scrnsz_x || rect.bottom != scrnsz_y) { - scrnsz_x = rect.right; - scrnsz_y = rect.bottom; - atomic_store(&doresize_monitors[0], 1); - } - } + if (temp_x != scrnsz_x || temp_y != scrnsz_y) { + scrnsz_x = temp_x; + scrnsz_y = temp_y; + atomic_store(&doresize_monitors[0], 1); + } + } else { + if (rect.right != scrnsz_x || rect.bottom != scrnsz_y) { + scrnsz_x = rect.right; + scrnsz_y = rect.bottom; + atomic_store(&doresize_monitors[0], 1); + } + } - plat_vidsize(rect.right, rect.bottom); + plat_vidsize(rect.right, rect.bottom); - if (mouse_capture) { - GetWindowRect(hwndRender, &rect); - ClipCursor(&rect); - } + if (mouse_capture) { + GetWindowRect(hwndRender, &rect); + ClipCursor(&rect); + } - plat_vidapi_enable(2); - } + plat_vidapi_enable(2); + } - return(0); + return (0); - case WM_TIMER: - if (wParam == TIMER_1SEC) - pc_onesec(); - else if ((wParam >= 0x8000) && (wParam <= 0x80ff)) - ui_sb_timer_callback(wParam & 0xff); - break; + case WM_TIMER: + if (wParam == TIMER_1SEC) + pc_onesec(); + else if ((wParam >= 0x8000) && (wParam <= 0x80ff)) + ui_sb_timer_callback(wParam & 0xff); + break; - case WM_LEAVEFULLSCREEN: - plat_setfullscreen(0); - config_save(); - break; + case WM_LEAVEFULLSCREEN: + plat_setfullscreen(0); + config_save(); + break; - case WM_KEYDOWN: - case WM_KEYUP: - case WM_SYSKEYDOWN: - case WM_SYSKEYUP: - return(0); + case WM_KEYDOWN: + case WM_KEYUP: + case WM_SYSKEYDOWN: + case WM_SYSKEYUP: + return (0); - case WM_CLOSE: - win_notify_dlg_open(); - if (confirm_exit && confirm_exit_cmdl) - i = ui_msgbox_ex(MBX_QUESTION_YN | MBX_DONTASK, (wchar_t *) IDS_2113, NULL, (wchar_t *) IDS_2119, (wchar_t *) IDS_2136, NULL); - else - i = 0; - if ((i % 10) == 0) { - if (i == 10) { - confirm_exit = 0; - nvr_save(); - config_save(); - } - KillTimer(hwnd, TIMER_1SEC); - PostQuitMessage(0); - } - win_notify_dlg_closed(); - break; + case WM_CLOSE: + win_notify_dlg_open(); + if (confirm_exit && confirm_exit_cmdl) + i = ui_msgbox_ex(MBX_QUESTION_YN | MBX_DONTASK, (wchar_t *) IDS_2113, NULL, (wchar_t *) IDS_2119, (wchar_t *) IDS_2136, NULL); + else + i = 0; + if ((i % 10) == 0) { + if (i == 10) { + confirm_exit = 0; + nvr_save(); + config_save(); + } + KillTimer(hwnd, TIMER_1SEC); + PostQuitMessage(0); + } + win_notify_dlg_closed(); + break; - case WM_DESTROY: - win_clear_icon_set(); - KillTimer(hwnd, TIMER_1SEC); - PostQuitMessage(0); - break; + case WM_DESTROY: + win_clear_icon_set(); + KillTimer(hwnd, TIMER_1SEC); + PostQuitMessage(0); + break; - case WM_SHOWSETTINGS: - if (manager_wm) - break; - manager_wm = 1; - win_settings_open(hwnd); - manager_wm = 0; - break; + case WM_SHOWSETTINGS: + if (manager_wm) + break; + manager_wm = 1; + win_settings_open(hwnd); + manager_wm = 0; + break; - case WM_PAUSE: - if (manager_wm) - break; - manager_wm = 1; - plat_pause(dopause ^ 1); - CheckMenuItem(menuMain, IDM_ACTION_PAUSE, dopause ? MF_CHECKED : MF_UNCHECKED); - manager_wm = 0; - break; + case WM_PAUSE: + if (manager_wm) + break; + manager_wm = 1; + plat_pause(dopause ^ 1); + CheckMenuItem(menuMain, IDM_ACTION_PAUSE, dopause ? MF_CHECKED : MF_UNCHECKED); + manager_wm = 0; + break; - case WM_HARDRESET: - if (manager_wm) - break; - win_notify_dlg_open(); - if (confirm_reset) - i = ui_msgbox_ex(MBX_QUESTION_YN | MBX_DONTASK, (wchar_t *) IDS_2112, NULL, (wchar_t *) IDS_2137, (wchar_t *) IDS_2138, NULL); - else - i = 0; - if ((i % 10) == 0) { - pc_reset_hard(); - if (i == 10) { - confirm_reset = 0; - nvr_save(); - config_save(); - } - } - win_notify_dlg_closed(); - break; + case WM_HARDRESET: + if (manager_wm) + break; + win_notify_dlg_open(); + if (confirm_reset) + i = ui_msgbox_ex(MBX_QUESTION_YN | MBX_DONTASK, (wchar_t *) IDS_2112, NULL, (wchar_t *) IDS_2137, (wchar_t *) IDS_2138, NULL); + else + i = 0; + if ((i % 10) == 0) { + pc_reset_hard(); + if (i == 10) { + confirm_reset = 0; + nvr_save(); + config_save(); + } + } + win_notify_dlg_closed(); + break; - case WM_SHUTDOWN: - if (manager_wm) - break; - if (LOWORD(wParam) == 1) { - confirm_exit = 0; - nvr_save(); - config_save(); - KillTimer(hwnd, TIMER_1SEC); - PostQuitMessage(0); - } else { - win_notify_dlg_open(); - if (confirm_exit && confirm_exit_cmdl) - i = ui_msgbox_ex(MBX_QUESTION_YN | MBX_DONTASK, (wchar_t *) IDS_2113, NULL, (wchar_t *) IDS_2119, (wchar_t *) IDS_2136, NULL); - else - i = 0; - if ((i % 10) == 0) { - if (i == 10) { - confirm_exit = 0; - nvr_save(); - config_save(); - } - KillTimer(hwnd, TIMER_1SEC); - PostQuitMessage(0); - } - win_notify_dlg_closed(); - } - break; + case WM_SHUTDOWN: + if (manager_wm) + break; + if (LOWORD(wParam) == 1) { + confirm_exit = 0; + nvr_save(); + config_save(); + KillTimer(hwnd, TIMER_1SEC); + PostQuitMessage(0); + } else { + win_notify_dlg_open(); + if (confirm_exit && confirm_exit_cmdl) + i = ui_msgbox_ex(MBX_QUESTION_YN | MBX_DONTASK, (wchar_t *) IDS_2113, NULL, (wchar_t *) IDS_2119, (wchar_t *) IDS_2136, NULL); + else + i = 0; + if ((i % 10) == 0) { + if (i == 10) { + confirm_exit = 0; + nvr_save(); + config_save(); + } + KillTimer(hwnd, TIMER_1SEC); + PostQuitMessage(0); + } + win_notify_dlg_closed(); + } + break; - case WM_CTRLALTDEL: - if (manager_wm) - break; - manager_wm = 1; - pc_send_cad(); - manager_wm = 0; - break; + case WM_CTRLALTDEL: + if (manager_wm) + break; + manager_wm = 1; + pc_send_cad(); + manager_wm = 0; + break; - case WM_SYSCOMMAND: - /* - * Disable ALT key *ALWAYS*, - * I don't think there's any use for - * reaching the menu that way. - */ - if (wParam == SC_KEYMENU && HIWORD(lParam) <= 0) { - return 0; /*disable ALT key for menu*/ - } + case WM_SYSCOMMAND: + /* + * Disable ALT key *ALWAYS*, + * I don't think there's any use for + * reaching the menu that way. + */ + if (wParam == SC_KEYMENU && HIWORD(lParam) <= 0) { + return 0; /*disable ALT key for menu*/ + } - default: - return(DefWindowProc(hwnd, message, wParam, lParam)); + default: + return (DefWindowProc(hwnd, message, wParam, lParam)); - case WM_SETFOCUS: - infocus = 1; - break; + case WM_SETFOCUS: + infocus = 1; + break; - case WM_KILLFOCUS: - infocus = 0; - plat_mouse_capture(0); - break; + case WM_KILLFOCUS: + infocus = 0; + plat_mouse_capture(0); + break; - case WM_ACTIVATE: - if ((wParam != WA_INACTIVE) && !(video_fullscreen & 2)) { - video_force_resize_set(1); - plat_vidapi_enable(0); - plat_vidapi_enable(1); - } - break; + case WM_ACTIVATE: + if ((wParam != WA_INACTIVE) && !(video_fullscreen & 2)) { + video_force_resize_set(1); + plat_vidapi_enable(0); + plat_vidapi_enable(1); + } + break; - case WM_ACTIVATEAPP: - /* Leave full screen on switching application except - for OpenGL Core and VNC renderers. */ - if (video_fullscreen & 1 && wParam == FALSE && vid_api < 3) - PostMessage(hwndMain, WM_LEAVEFULLSCREEN, 0, 0); - break; + case WM_ACTIVATEAPP: + /* Leave full screen on switching application except + for OpenGL Core and VNC renderers. */ + if (video_fullscreen & 1 && wParam == FALSE && vid_api < 3) + PostMessage(hwndMain, WM_LEAVEFULLSCREEN, 0, 0); + break; - case WM_ENTERSIZEMOVE: - user_resize = 1; - break; + case WM_ENTERSIZEMOVE: + user_resize = 1; + break; - case WM_EXITSIZEMOVE: - user_resize = 0; + case WM_EXITSIZEMOVE: + user_resize = 0; - /* If window is not resizable, then tell the main thread to - resize it, as sometimes, moves can mess up the window size. */ - if (!vid_resize) - atomic_store(&doresize_monitors[0], 1); - break; + /* If window is not resizable, then tell the main thread to + resize it, as sometimes, moves can mess up the window size. */ + if (!vid_resize) + atomic_store(&doresize_monitors[0], 1); + break; } - return(0); + return (0); } - static LRESULT CALLBACK SubWindowProcedure(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam) { switch (message) { - case WM_LBUTTONDOWN: - button_down |= 2; - break; + case WM_LBUTTONDOWN: + button_down |= 2; + break; - case WM_LBUTTONUP: - if ((button_down & 2) && !video_fullscreen) - plat_mouse_capture(1); - button_down &= ~2; - break; + case WM_LBUTTONUP: + if ((button_down & 2) && !video_fullscreen) + plat_mouse_capture(1); + button_down &= ~2; + break; - case WM_MBUTTONUP: - if (mouse_get_buttons() < 3) - plat_mouse_capture(0); - break; + case WM_MBUTTONUP: + if (mouse_get_buttons() < 3) + plat_mouse_capture(0); + break; - default: - return(DefWindowProc(hwnd, message, wParam, lParam)); + default: + return (DefWindowProc(hwnd, message, wParam, lParam)); } - return(0); + return (0); } - static LRESULT CALLBACK SDLMainWindowProcedure(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam) { if (input_proc(hwnd, message, wParam, lParam) == 0) - return(0); + return (0); - return(DefWindowProc(hwnd, message, wParam, lParam)); + return (DefWindowProc(hwnd, message, wParam, lParam)); } - static LRESULT CALLBACK SDLSubWindowProcedure(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam) { - return(DefWindowProc(hwnd, message, wParam, lParam)); + return (DefWindowProc(hwnd, message, wParam, lParam)); } - static HRESULT CALLBACK TaskDialogProcedure(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam, LONG_PTR lpRefData) { switch (message) { - case TDN_HYPERLINK_CLICKED: - /* open linked URL */ - ShellExecute(hwnd, L"open", (LPCWSTR) lParam, NULL, NULL, SW_SHOW); - break; + case TDN_HYPERLINK_CLICKED: + /* open linked URL */ + ShellExecute(hwnd, L"open", (LPCWSTR) lParam, NULL, NULL, SW_SHOW); + break; } return S_OK; } - int ui_init(int nCmdShow) { - WCHAR title[200]; - WNDCLASSEX wincl; /* buffer for main window's class */ - RAWINPUTDEVICE ridev; /* RawInput device */ - MSG messages = {0}; /* received-messages buffer */ - HWND hwnd = NULL; /* handle for our window */ - HACCEL haccel; /* handle to accelerator table */ - RECT rect; - int bRet; - TASKDIALOGCONFIG tdconfig = {0}; - TASKDIALOG_BUTTON tdbuttons[] = {{IDCANCEL, MAKEINTRESOURCE(IDS_2119)}}; + WCHAR title[200]; + WNDCLASSEX wincl; /* buffer for main window's class */ + RAWINPUTDEVICE ridev; /* RawInput device */ + MSG messages = { 0 }; /* received-messages buffer */ + HWND hwnd = NULL; /* handle for our window */ + HACCEL haccel; /* handle to accelerator table */ + RECT rect; + int bRet; + TASKDIALOGCONFIG tdconfig = { 0 }; + TASKDIALOG_BUTTON tdbuttons[] = { + {IDCANCEL, MAKEINTRESOURCE(IDS_2119)} + }; uint32_t helper_lang; /* Load DPI related Windows 10 APIs */ @@ -1180,101 +1167,100 @@ ui_init(int nCmdShow) /* Set the application ID for the taskbar. */ shell32_handle = dynld_module("shell32.dll", shell32_imports); if (shell32_handle) - pSetCurrentProcessExplicitAppUserModelID(L"86Box.86Box"); + pSetCurrentProcessExplicitAppUserModelID(L"86Box.86Box"); /* Set up TaskDialog configuration. */ - tdconfig.cbSize = sizeof(tdconfig); - tdconfig.dwFlags = TDF_ENABLE_HYPERLINKS; - tdconfig.dwCommonButtons = 0; - tdconfig.pszWindowTitle = MAKEINTRESOURCE(IDS_STRINGS); - tdconfig.pszMainIcon = TD_ERROR_ICON; + tdconfig.cbSize = sizeof(tdconfig); + tdconfig.dwFlags = TDF_ENABLE_HYPERLINKS; + tdconfig.dwCommonButtons = 0; + tdconfig.pszWindowTitle = MAKEINTRESOURCE(IDS_STRINGS); + tdconfig.pszMainIcon = TD_ERROR_ICON; tdconfig.pszMainInstruction = MAKEINTRESOURCE(IDS_2050); - tdconfig.cButtons = ARRAYSIZE(tdbuttons); - tdconfig.pButtons = tdbuttons; - tdconfig.pfCallback = TaskDialogProcedure; + tdconfig.cButtons = ARRAYSIZE(tdbuttons); + tdconfig.pButtons = tdbuttons; + tdconfig.pfCallback = TaskDialogProcedure; /* Load the desired iconset */ win_load_icon_set(); /* Start settings-only mode if requested. */ if (settings_only) { - if (! pc_init_modules()) { - /* Dang, no ROMs found at all! */ - tdconfig.pszMainInstruction = MAKEINTRESOURCE(IDS_2120); - tdconfig.pszContent = MAKEINTRESOURCE(IDS_2056); - TaskDialogIndirect(&tdconfig, NULL, NULL, NULL); - return(6); - } + if (!pc_init_modules()) { + /* Dang, no ROMs found at all! */ + tdconfig.pszMainInstruction = MAKEINTRESOURCE(IDS_2120); + tdconfig.pszContent = MAKEINTRESOURCE(IDS_2056); + TaskDialogIndirect(&tdconfig, NULL, NULL, NULL); + return (6); + } + /* Load the desired language */ + helper_lang = lang_id; + lang_id = 0; + set_language(helper_lang); - /* Load the desired language */ - helper_lang = lang_id; - lang_id = 0; - set_language(helper_lang); - - win_settings_open(NULL); - return(0); + win_settings_open(NULL); + return (0); } - if(! discord_load()) { - enable_discord = 0; + if (!discord_load()) { + enable_discord = 0; } else if (enable_discord) { - /* Initialize the Discord API */ - discord_init(); + /* Initialize the Discord API */ + discord_init(); - /* Update Discord status */ - discord_update_activity(dopause); + /* Update Discord status */ + discord_update_activity(dopause); } /* Create our main window's class and register it. */ - wincl.hInstance = hinstance; + wincl.hInstance = hinstance; wincl.lpszClassName = CLASS_NAME; - wincl.lpfnWndProc = MainWindowProcedure; - wincl.style = CS_DBLCLKS; /* Catch double-clicks */ - wincl.cbSize = sizeof(WNDCLASSEX); - wincl.hIcon = NULL; - wincl.hIconSm = NULL; - wincl.hCursor = NULL; - wincl.lpszMenuName = NULL; - wincl.cbClsExtra = 0; - wincl.cbWndExtra = 0; - wincl.hbrBackground = CreateSolidBrush(RGB(0,0,0)); + wincl.lpfnWndProc = MainWindowProcedure; + wincl.style = CS_DBLCLKS; /* Catch double-clicks */ + wincl.cbSize = sizeof(WNDCLASSEX); + wincl.hIcon = NULL; + wincl.hIconSm = NULL; + wincl.hCursor = NULL; + wincl.lpszMenuName = NULL; + wincl.cbClsExtra = 0; + wincl.cbWndExtra = 0; + wincl.hbrBackground = CreateSolidBrush(RGB(0, 0, 0)); /* Load proper icons */ - wchar_t path[MAX_PATH + 1] = {0}; + wchar_t path[MAX_PATH + 1] = { 0 }; GetModuleFileNameW(hinstance, path, MAX_PATH); ExtractIconExW(path, 0, &wincl.hIcon, &wincl.hIconSm, 1); - if (! RegisterClassEx(&wincl)) - return(2); + if (!RegisterClassEx(&wincl)) + return (2); wincl.lpszClassName = SUB_CLASS_NAME; - wincl.lpfnWndProc = SubWindowProcedure; - if (! RegisterClassEx(&wincl)) - return(2); + wincl.lpfnWndProc = SubWindowProcedure; + if (!RegisterClassEx(&wincl)) + return (2); wincl.lpszClassName = SDL_CLASS_NAME; - wincl.lpfnWndProc = SDLMainWindowProcedure; - if (! RegisterClassEx(&wincl)) - return(2); + wincl.lpfnWndProc = SDLMainWindowProcedure; + if (!RegisterClassEx(&wincl)) + return (2); wincl.lpszClassName = SDL_SUB_CLASS_NAME; - wincl.lpfnWndProc = SDLSubWindowProcedure; - if (! RegisterClassEx(&wincl)) - return(2); + wincl.lpfnWndProc = SDLSubWindowProcedure; + if (!RegisterClassEx(&wincl)) + return (2); /* Now create our main window. */ swprintf_s(title, sizeof_w(title), L"%hs - %s %s", vm_name, EMU_NAME_W, EMU_VERSION_FULL_W); - hwnd = CreateWindowEx ( - 0, /* no extended possibilites */ - CLASS_NAME, /* class name */ - title, /* Title Text */ - (WS_OVERLAPPEDWINDOW & ~WS_SIZEBOX) | DS_3DLOOK, - CW_USEDEFAULT, /* Windows decides the position */ - CW_USEDEFAULT, /* where window ends up on the screen */ - scrnsz_x+(GetSystemMetrics(SM_CXFIXEDFRAME)*2), /* width */ - scrnsz_y+(GetSystemMetrics(SM_CYFIXEDFRAME)*2)+GetSystemMetrics(SM_CYMENUSIZE)+GetSystemMetrics(SM_CYCAPTION)+1, /* and height in pixels */ - HWND_DESKTOP, /* window is a child to desktop */ - NULL, /* no menu (yet) */ - hinstance, /* Program Instance handler */ - NULL); /* no Window Creation data */ + hwnd = CreateWindowEx( + 0, /* no extended possibilites */ + CLASS_NAME, /* class name */ + title, /* Title Text */ + (WS_OVERLAPPEDWINDOW & ~WS_SIZEBOX) | DS_3DLOOK, + CW_USEDEFAULT, /* Windows decides the position */ + CW_USEDEFAULT, /* where window ends up on the screen */ + scrnsz_x + (GetSystemMetrics(SM_CXFIXEDFRAME) * 2), /* width */ + scrnsz_y + (GetSystemMetrics(SM_CYFIXEDFRAME) * 2) + GetSystemMetrics(SM_CYMENUSIZE) + GetSystemMetrics(SM_CYCAPTION) + 1, /* and height in pixels */ + HWND_DESKTOP, /* window is a child to desktop */ + NULL, /* no menu (yet) */ + hinstance, /* Program Instance handler */ + NULL); /* no Window Creation data */ hwndMain = tdconfig.hwndParent = hwnd; ui_window_title(title); @@ -1292,7 +1278,7 @@ ui_init(int nCmdShow) GetWindowRect(hwndSBAR, &rect); sbar_height = rect.bottom - rect.top; if (hide_status_bar) - ShowWindow(hwndSBAR, SW_HIDE); + ShowWindow(hwndSBAR, SW_HIDE); /* Create the toolbar window. */ ToolBarCreate(hwndMain, hinstance); @@ -1300,46 +1286,45 @@ ui_init(int nCmdShow) /* Get the actual height of the toolbar */ tbar_height = SendMessage(hwndRebar, RB_GETROWHEIGHT, 0, 0); if (hide_tool_bar) - ShowWindow(hwndRebar, SW_HIDE); + ShowWindow(hwndRebar, SW_HIDE); /* Set up main window for resizing if configured. */ if (vid_resize == 1) - SetWindowLongPtr(hwnd, GWL_STYLE, - (WS_OVERLAPPEDWINDOW)); + SetWindowLongPtr(hwnd, GWL_STYLE, + (WS_OVERLAPPEDWINDOW)); else - SetWindowLongPtr(hwnd, GWL_STYLE, - (WS_OVERLAPPEDWINDOW&~WS_SIZEBOX&~WS_THICKFRAME&~WS_MAXIMIZEBOX)); + SetWindowLongPtr(hwnd, GWL_STYLE, + (WS_OVERLAPPEDWINDOW & ~WS_SIZEBOX & ~WS_THICKFRAME & ~WS_MAXIMIZEBOX)); /* Create the Machine Rendering window. */ - hwndRender = CreateWindow(/*L"STATIC"*/ SUB_CLASS_NAME, NULL, WS_CHILD|SS_BITMAP, - 0, 0, 1, 1, hwnd, NULL, hinstance, NULL); + hwndRender = CreateWindow(/*L"STATIC"*/ SUB_CLASS_NAME, NULL, WS_CHILD | SS_BITMAP, + 0, 0, 1, 1, hwnd, NULL, hinstance, NULL); /* Initiate a resize in order to properly arrange all controls. Move to the last-saved position if needed. */ if ((vid_resize < 2) && window_remember) - MoveWindow(hwnd, window_x, window_y, window_w, window_h, TRUE); + MoveWindow(hwnd, window_x, window_y, window_w, window_h, TRUE); else { - if (vid_resize >= 2) { - MoveWindow(hwnd, window_x, window_y, window_w, window_h, TRUE); - scrnsz_x = fixed_size_x; - scrnsz_y = fixed_size_y; - } - ResizeWindowByClientArea(hwnd, scrnsz_x, scrnsz_y + (hide_status_bar ? 0 : sbar_height) + (hide_tool_bar ? 0 : tbar_height)); + if (vid_resize >= 2) { + MoveWindow(hwnd, window_x, window_y, window_w, window_h, TRUE); + scrnsz_x = fixed_size_x; + scrnsz_y = fixed_size_y; + } + ResizeWindowByClientArea(hwnd, scrnsz_x, scrnsz_y + (hide_status_bar ? 0 : sbar_height) + (hide_tool_bar ? 0 : tbar_height)); } /* Load the desired language */ helper_lang = lang_id; - lang_id = 0; + lang_id = 0; set_language(helper_lang); /* Make the window visible on the screen. */ ShowWindow(hwnd, nCmdShow); /* Warn the user about unsupported configs. */ - if (cpu_override && ui_msgbox_ex(MBX_WARNING | MBX_QUESTION_OK, (void*)IDS_2145, (void*)IDS_2146, (void*)IDS_2147, (void*)IDS_2119, NULL)) - { - DestroyWindow(hwnd); - return(0); + if (cpu_override && ui_msgbox_ex(MBX_WARNING | MBX_QUESTION_OK, (void *) IDS_2145, (void *) IDS_2146, (void *) IDS_2147, (void *) IDS_2119, NULL)) { + DestroyWindow(hwnd); + return (0); } GetClipCursor(&oldclip); @@ -1347,27 +1332,27 @@ ui_init(int nCmdShow) /* Initialize the RawInput (keyboard) module. */ memset(&ridev, 0x00, sizeof(ridev)); ridev.usUsagePage = 0x01; - ridev.usUsage = 0x06; - ridev.dwFlags = RIDEV_NOHOTKEYS; - ridev.hwndTarget = NULL; /* current focus window */ - if (! RegisterRawInputDevices(&ridev, 1, sizeof(ridev))) { - tdconfig.pszContent = MAKEINTRESOURCE(IDS_2105); - TaskDialogIndirect(&tdconfig, NULL, NULL, NULL); - return(4); + ridev.usUsage = 0x06; + ridev.dwFlags = RIDEV_NOHOTKEYS; + ridev.hwndTarget = NULL; /* current focus window */ + if (!RegisterRawInputDevices(&ridev, 1, sizeof(ridev))) { + tdconfig.pszContent = MAKEINTRESOURCE(IDS_2105); + TaskDialogIndirect(&tdconfig, NULL, NULL, NULL); + return (4); } keyboard_getkeymap(); /* Load the accelerator table */ haccel = LoadAccelerators(hinstance, ACCEL_NAME); if (haccel == NULL) { - tdconfig.pszContent = MAKEINTRESOURCE(IDS_2104); - TaskDialogIndirect(&tdconfig, NULL, NULL, NULL); - return(3); + tdconfig.pszContent = MAKEINTRESOURCE(IDS_2104); + TaskDialogIndirect(&tdconfig, NULL, NULL, NULL); + return (3); } /* Initialize the mouse module. */ if (!start_in_fullscreen) - win_mouse_init(); + win_mouse_init(); /* * Before we can create the Render window, we first have @@ -1376,30 +1361,30 @@ ui_init(int nCmdShow) ghMutex = CreateMutex(NULL, FALSE, NULL); /* All done, fire up the actual emulated machine. */ - if (! pc_init_modules()) { - /* Dang, no ROMs found at all! */ - tdconfig.pszMainInstruction = MAKEINTRESOURCE(IDS_2120); - tdconfig.pszContent = MAKEINTRESOURCE(IDS_2056); - TaskDialogIndirect(&tdconfig, NULL, NULL, NULL); - return(6); + if (!pc_init_modules()) { + /* Dang, no ROMs found at all! */ + tdconfig.pszMainInstruction = MAKEINTRESOURCE(IDS_2120); + tdconfig.pszContent = MAKEINTRESOURCE(IDS_2056); + TaskDialogIndirect(&tdconfig, NULL, NULL, NULL); + return (6); } /* Initialize the configured Video API. */ - if (! plat_setvid(vid_api)) { - tdconfig.pszContent = MAKEINTRESOURCE(IDS_2089); - TaskDialogIndirect(&tdconfig, NULL, NULL, NULL); - return(5); + if (!plat_setvid(vid_api)) { + tdconfig.pszContent = MAKEINTRESOURCE(IDS_2089); + TaskDialogIndirect(&tdconfig, NULL, NULL, NULL); + return (5); } /* Set up the current window size. */ if (vid_resize & 2) - plat_resize(fixed_size_x, fixed_size_y); + plat_resize(fixed_size_x, fixed_size_y); else - plat_resize(scrnsz_x, scrnsz_y); + plat_resize(scrnsz_x, scrnsz_y); /* Initialize the rendering window, or fullscreen. */ if (start_in_fullscreen) - plat_setfullscreen(3); + plat_setfullscreen(3); /* Fire up the machine. */ pc_reset_hard_init(); @@ -1412,7 +1397,7 @@ ui_init(int nCmdShow) * the hWnd and unique ID the application has given * us. */ if (source_hwnd) - PostMessage((HWND) (uintptr_t) source_hwnd, WM_SENDHWND, (WPARAM) unique_id, (LPARAM) hwndMain); + PostMessage((HWND) (uintptr_t) source_hwnd, WM_SENDHWND, (WPARAM) unique_id, (LPARAM) hwndMain); /* * Everything has been configured, and all seems to work, @@ -1423,51 +1408,48 @@ ui_init(int nCmdShow) do_start(); /* Run the message loop. It will run until GetMessage() returns 0 */ - while (! is_quit) { - bRet = GetMessage(&messages, NULL, 0, 0); - if ((bRet == 0) || is_quit) break; + while (!is_quit) { + bRet = GetMessage(&messages, NULL, 0, 0); + if ((bRet == 0) || is_quit) + break; - if (bRet == -1) { - fatal("bRet is -1\n"); - } - - /* On WM_QUIT, tell the CPU thread to stop running. That will then tell us - to stop running as well. */ - if (messages.message == WM_QUIT) - cpu_thread_run = 0; - - if (! TranslateAccelerator(hwnd, haccel, &messages)) - { - /* Don't process other keypresses. */ - if (messages.message == WM_SYSKEYDOWN || - messages.message == WM_SYSKEYUP || - messages.message == WM_KEYDOWN || - messages.message == WM_KEYUP) - continue; - - TranslateMessage(&messages); - DispatchMessage(&messages); - } - - if (mouse_capture && keyboard_ismsexit()) { - /* Release the in-app mouse. */ - plat_mouse_capture(0); + if (bRet == -1) { + fatal("bRet is -1\n"); } - if (video_fullscreen && keyboard_isfsexit()) { - /* Signal "exit fullscreen mode". */ - plat_setfullscreen(0); - } + /* On WM_QUIT, tell the CPU thread to stop running. That will then tell us + to stop running as well. */ + if (messages.message == WM_QUIT) + cpu_thread_run = 0; - /* Run Discord API callbacks */ - if (enable_discord) - discord_run_callbacks(); + if (!TranslateAccelerator(hwnd, haccel, &messages)) { + /* Don't process other keypresses. */ + if (messages.message == WM_SYSKEYDOWN || messages.message == WM_SYSKEYUP || messages.message == WM_KEYDOWN || messages.message == WM_KEYUP) + continue; + + TranslateMessage(&messages); + DispatchMessage(&messages); + } + + if (mouse_capture && keyboard_ismsexit()) { + /* Release the in-app mouse. */ + plat_mouse_capture(0); + } + + if (video_fullscreen && keyboard_isfsexit()) { + /* Signal "exit fullscreen mode". */ + plat_setfullscreen(0); + } + + /* Run Discord API callbacks */ + if (enable_discord) + discord_run_callbacks(); } timeEndPeriod(1); if (mouse_capture) - plat_mouse_capture(0); + plat_mouse_capture(0); /* Close down the emulator. */ do_stop(); @@ -1483,107 +1465,104 @@ ui_init(int nCmdShow) discord_close(); if (user32_handle != NULL) - dynld_close(user32_handle); + dynld_close(user32_handle); - return(messages.wParam); + return (messages.wParam); } - /* We should have the language ID as a parameter. */ void plat_pause(int p) { static wchar_t oldtitle[512]; - wchar_t title[512]; + wchar_t title[512]; /* If un-pausing, as the renderer if that's OK. */ if (p == 0) - p = get_vidpause(); + p = get_vidpause(); /* If already so, done. */ if (dopause == p) { - /* Send the WM to a manager if needed. */ - if (source_hwnd) - PostMessage((HWND) (uintptr_t) source_hwnd, WM_SENDSTATUS, (WPARAM) !!dopause, (LPARAM) hwndMain); + /* Send the WM to a manager if needed. */ + if (source_hwnd) + PostMessage((HWND) (uintptr_t) source_hwnd, WM_SENDSTATUS, (WPARAM) !!dopause, (LPARAM) hwndMain); - return; + return; } if (p) { - wcsncpy(oldtitle, ui_window_title(NULL), sizeof_w(oldtitle) - 1); - wcscpy(title, oldtitle); - wcscat(title, plat_get_string(IDS_2051)); - ui_window_title(title); + wcsncpy(oldtitle, ui_window_title(NULL), sizeof_w(oldtitle) - 1); + wcscpy(title, oldtitle); + wcscat(title, plat_get_string(IDS_2051)); + ui_window_title(title); } else { - ui_window_title(oldtitle); + ui_window_title(oldtitle); } /* If un-pausing, synchronize the internal clock with the host's time. */ if ((p == 0) && (time_sync & TIME_SYNC_ENABLED)) - nvr_time_sync(); + nvr_time_sync(); dopause = p; /* Update the actual menu. */ CheckMenuItem(menuMain, IDM_ACTION_PAUSE, - (dopause) ? MF_CHECKED : MF_UNCHECKED); + (dopause) ? MF_CHECKED : MF_UNCHECKED); /* Update Discord status */ if (enable_discord) - discord_update_activity(dopause); + discord_update_activity(dopause); /* Update the toolbar */ ToolBarUpdatePause(p); /* Send the WM to a manager if needed. */ if (source_hwnd) - PostMessage((HWND) (uintptr_t) source_hwnd, WM_SENDSTATUS, (WPARAM) !!dopause, (LPARAM) hwndMain); + PostMessage((HWND) (uintptr_t) source_hwnd, WM_SENDSTATUS, (WPARAM) !!dopause, (LPARAM) hwndMain); } - /* Tell the UI about a new screen resolution. */ void plat_resize(int x, int y) { /* First, see if we should resize the UI window. */ if (!vid_resize) { - /* scale the screen base on DPI */ - if (dpi_scale) { - x = MulDiv(x, dpi, 96); - y = MulDiv(y, dpi, 96); - } - ResizeWindowByClientArea(hwndMain, x, y + (hide_status_bar ? 0 : sbar_height) + (hide_tool_bar ? 0 : tbar_height)); + /* scale the screen base on DPI */ + if (dpi_scale) { + x = MulDiv(x, dpi, 96); + y = MulDiv(y, dpi, 96); + } + ResizeWindowByClientArea(hwndMain, x, y + (hide_status_bar ? 0 : sbar_height) + (hide_tool_bar ? 0 : tbar_height)); } } - -void plat_resize_request(int w, int h, int monitor_index) +void +plat_resize_request(int w, int h, int monitor_index) { atomic_store((&doresize_monitors[monitor_index]), 1); } - void plat_mouse_capture(int on) { RECT rect; if (!kbd_req_capture && (mouse_type == MOUSE_TYPE_NONE)) - return; + return; if (on && !mouse_capture) { - /* Enable the in-app mouse. */ - GetClipCursor(&oldclip); - GetWindowRect(hwndRender, &rect); - ClipCursor(&rect); - show_cursor(0); - mouse_capture = 1; + /* Enable the in-app mouse. */ + GetClipCursor(&oldclip); + GetWindowRect(hwndRender, &rect); + ClipCursor(&rect); + show_cursor(0); + mouse_capture = 1; } else if (!on && mouse_capture) { - /* Disable the in-app mouse. */ - ClipCursor(&oldclip); - show_cursor(-1); + /* Disable the in-app mouse. */ + ClipCursor(&oldclip); + show_cursor(-1); - mouse_capture = 0; + mouse_capture = 0; } } From ac68a2e5eec448ac1352ae6dd95721e229973b97 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 27 Jul 2022 17:43:28 -0400 Subject: [PATCH 174/386] Boca Reseach 4610 --- src/include/86box/video.h | 1 + src/video/vid_cl54xx.c | 26 +++++++++++++++++++++++++- src/video/vid_table.c | 1 + 3 files changed, 27 insertions(+), 1 deletion(-) diff --git a/src/include/86box/video.h b/src/include/86box/video.h index fd402186a..a739b9282 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -328,6 +328,7 @@ extern const device_t gd5426_onboard_device; extern const device_t gd5428_isa_device; extern const device_t gd5428_vlb_device; extern const device_t gd5428_diamond_speedstar_pro_b1_vlb_device; +extern const device_t gd5428_boca_isa_device; extern const device_t gd5428_mca_device; extern const device_t gd5426_mca_device; extern const device_t gd5428_onboard_device; diff --git a/src/video/vid_cl54xx.c b/src/video/vid_cl54xx.c index 709e2a972..c18e4c532 100644 --- a/src/video/vid_cl54xx.c +++ b/src/video/vid_cl54xx.c @@ -51,6 +51,7 @@ #define BIOS_GD5428_ISA_PATH "roms/video/cirruslogic/5428.bin" #define BIOS_GD5428_MCA_PATH "roms/video/cirruslogic/SVGA141.ROM" #define BIOS_GD5428_PATH "roms/video/cirruslogic/vlbusjapan.BIN" +#define BIOS_GD5428_BOCA_ISA_PATH "roms/video/cirruslogic/boca_gd5428_1.30b.bin" #define BIOS_GD5429_PATH "roms/video/cirruslogic/5429.vbi" #define BIOS_GD5430_DIAMOND_A8_VLB_PATH "roms/video/cirruslogic/diamondvlbus.bin" #define BIOS_GD5430_PATH "roms/video/cirruslogic/pci.bin" @@ -3913,7 +3914,10 @@ static void case CIRRUS_ID_CLGD5428: if (info->local & 0x100) - romfn = BIOS_GD5428_DIAMOND_B1_VLB_PATH; + if (gd54xx->vlb) + romfn = BIOS_GD5428_DIAMOND_B1_VLB_PATH; + else + romfn = BIOS_GD5428_BOCA_ISA_PATH; else { if (gd54xx->vlb) romfn = BIOS_GD5428_PATH; @@ -4181,6 +4185,12 @@ gd5428_diamond_b1_available(void) return rom_present(BIOS_GD5428_DIAMOND_B1_VLB_PATH); } +static int +gd5428_boca_isa_available(void) +{ + return rom_present(BIOS_GD5428_BOCA_ISA_PATH); +} + static int gd5428_isa_available(void) { @@ -4694,6 +4704,20 @@ const device_t gd5428_diamond_speedstar_pro_b1_vlb_device = { .config = gd5426_config }; +const device_t gd5428_boca_isa_device = { + .name = "Cirrus Logic GD5428 (ISA) (BOCA Research 4610)", + .internal_name = "cl_gd5428_boca_isa", + .flags = DEVICE_AT | DEVICE_ISA, + .local = CIRRUS_ID_CLGD5428 | 0x100, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, + { .available = gd5428_boca_isa_available }, + .speed_changed = gd54xx_speed_changed, + .force_redraw = gd54xx_force_redraw, + .config = gd5426_config +}; + const device_t gd5428_mca_device = { .name = "Cirrus Logic GD5428 (MCA) (IBM SVGA Adapter/A)", .internal_name = "ibm1mbsvga", diff --git a/src/video/vid_table.c b/src/video/vid_table.c index 94d4601a8..6935769fd 100644 --- a/src/video/vid_table.c +++ b/src/video/vid_table.c @@ -101,6 +101,7 @@ video_cards[] = { { &gd5422_isa_device }, { &gd5426_isa_device }, { &gd5426_diamond_speedstar_pro_a1_isa_device }, + { &gd5428_boca_isa_device }, { &gd5428_isa_device }, { &gd5429_isa_device }, { &gd5434_isa_device }, From e47769d2f7385c35ff800f6a9b8589386d22bb1b Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 28 Jul 2022 03:49:35 +0200 Subject: [PATCH 175/386] Fixed a warning in the YMFM code. --- src/sound/snd_opl_ymfm.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sound/snd_opl_ymfm.cpp b/src/sound/snd_opl_ymfm.cpp index 28ea7a621..c5ee107c5 100644 --- a/src/sound/snd_opl_ymfm.cpp +++ b/src/sound/snd_opl_ymfm.cpp @@ -63,7 +63,7 @@ public: protected: int32_t m_buffer[SOUNDBUFLEN * 2]; - uint32_t m_buf_pos; + int m_buf_pos; int8_t m_flags; fm_type m_type; }; From 826d9cdf1c26967c3542987681b05aebeeb87090 Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 28 Jul 2022 03:53:52 +0200 Subject: [PATCH 176/386] Fixed a warning in the Sound Blaster code. --- src/sound/snd_sb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sound/snd_sb.c b/src/sound/snd_sb.c index 609786d0d..fb2332fbd 100644 --- a/src/sound/snd_sb.c +++ b/src/sound/snd_sb.c @@ -266,7 +266,7 @@ sb_get_buffer_sbpro(int32_t *buffer, int len, void *p) sb_ct1345_mixer_t *mixer = &sb->mixer_sbpro; int c; double out_l = 0.0, out_r = 0.0; - int32_t *opl_buf, *opl2_buf; + int32_t *opl_buf = NULL, *opl2_buf = NULL; if (sb->opl_enabled) { if (sb->dsp.sb_type == SBPRO) { From 15f9d87b5c83f613ad2a4f162cd8c081d3b415e2 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Thu, 28 Jul 2022 13:59:27 -0300 Subject: [PATCH 177/386] Jenkins: Only update changelog once when git cloning --- .ci/Jenkinsfile | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/.ci/Jenkinsfile b/.ci/Jenkinsfile index e6f717a3d..27cda4161 100644 --- a/.ci/Jenkinsfile +++ b/.ci/Jenkinsfile @@ -100,9 +100,10 @@ def gitClone(repository, branch) { /* Use stashes to pass the repository around debian.citadel, as it's known to be faster than git clone there. */ if (env.NODE_NAME != 'debian.citadel' || env.GIT_STASHED != 'true') { - /* Perform clone/checkout. */ + /* Perform clone/checkout, making sure to update the changelog only once to + avoid inaccurate entries caused by new commits pushed inbetween clones. */ def scmVars = checkout poll: true, - changelog: true, + changelog: env.GIT_STASHED != 'true', scm: [$class: 'GitSCM', branches: [[name: branch]], userRemoteConfigs: [[url: repository]]] From b1c2b2fef5376490725f43e54b6c7a3b69c2c910 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Thu, 28 Jul 2022 14:00:54 -0300 Subject: [PATCH 178/386] Jenkins: Dummy commit to test clone changelog behavior --- .ci/Jenkinsfile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.ci/Jenkinsfile b/.ci/Jenkinsfile index 27cda4161..efa98b07b 100644 --- a/.ci/Jenkinsfile +++ b/.ci/Jenkinsfile @@ -100,8 +100,8 @@ def gitClone(repository, branch) { /* Use stashes to pass the repository around debian.citadel, as it's known to be faster than git clone there. */ if (env.NODE_NAME != 'debian.citadel' || env.GIT_STASHED != 'true') { - /* Perform clone/checkout, making sure to update the changelog only once to - avoid inaccurate entries caused by new commits pushed inbetween clones. */ + /* Perform clone/checkout, making sure to update the changelog only once + to avoid inaccurate entries from new commits pushed inbetween clones. */ def scmVars = checkout poll: true, changelog: env.GIT_STASHED != 'true', scm: [$class: 'GitSCM', From 8b33566187f769ffcd1a0f7f786b5ac9eea82c98 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Thu, 28 Jul 2022 16:50:49 -0400 Subject: [PATCH 179/386] More serial cleanups --- src/86box.c | 1 - src/config.c | 21 +++++++++++---------- src/device/serial.c | 8 +++++--- src/include/86box/86box.h | 3 +-- src/include/86box/config.h | 2 -- src/include/86box/serial.h | 6 ++++++ src/qt/qt_settingsports.cpp | 5 +++-- src/win/win_settings.c | 7 ++++--- 8 files changed, 30 insertions(+), 23 deletions(-) diff --git a/src/86box.c b/src/86box.c index f6b791901..8569ae53f 100644 --- a/src/86box.c +++ b/src/86box.c @@ -157,7 +157,6 @@ int video_filter_method = 1; /* (C) video */ int video_vsync = 0; /* (C) video */ int video_framerate = -1; /* (C) video */ char video_shader[512] = { '\0' }; /* (C) video */ -int serial_enabled[SERIAL_MAX] = {0,0}; /* (C) enable serial ports */ int bugger_enabled = 0; /* (C) enable ISAbugger */ int postcard_enabled = 0; /* (C) enable POST card */ int isamem_type[ISAMEM_MAX] = { 0,0,0,0 }; /* (C) enable ISA mem cards */ diff --git a/src/config.c b/src/config.c index 81bbc016f..b46bfc22d 100644 --- a/src/config.c +++ b/src/config.c @@ -45,6 +45,7 @@ #include <86box/isamem.h> #include <86box/isartc.h> #include <86box/lpt.h> +#include <86box/serial.h> #include <86box/hdd.h> #include <86box/hdc.h> #include <86box/hdc_ide.h> @@ -1178,7 +1179,7 @@ load_ports(void) for (c = 0; c < SERIAL_MAX; c++) { sprintf(temp, "serial%d_enabled", c + 1); - serial_enabled[c] = !!config_get_int(cat, temp, (c >= 2) ? 0 : 1); + com_ports[c].enabled = !!config_get_int(cat, temp, (c >= 2) ? 0 : 1); /* sprintf(temp, "serial%d_device", c + 1); @@ -2163,10 +2164,10 @@ config_load(void) time_sync = TIME_SYNC_ENABLED; hdc_current = hdc_get_from_internal_name("none"); - serial_enabled[0] = 1; - serial_enabled[1] = 1; + com_ports[0].enabled = 1; + com_ports[1].enabled = 1; for (i = 2; i < SERIAL_MAX; i++) - serial_enabled[i] = 0; + com_ports[i].enabled = 0; lpt_ports[0].enabled = 1; @@ -2684,17 +2685,17 @@ save_ports(void) for (c = 0; c < SERIAL_MAX; c++) { sprintf(temp, "serial%d_enabled", c + 1); - if (((c < 2) && serial_enabled[c]) || ((c >= 2) && !serial_enabled[c])) + if (((c < 2) && com_ports[c].enabled) || ((c >= 2) && !com_ports[c].enabled)) config_delete_var(cat, temp); else - config_set_int(cat, temp, serial_enabled[c]); + config_set_int(cat, temp, com_ports[c].enabled); - /* +/* sprintf(temp, "serial%d_type", c + 1); - if (!serial_enabled[c]) + if (!com_ports[c].enabled)) config_delete_var(cat, temp); - // else - // config_set_string(cat, temp, (char *) serial_type[c]) +// else +// config_set_string(cat, temp, (char *) serial_type[c]) sprintf(temp, "serial%d_device", c + 1); if (com_ports[c].device == 0) diff --git a/src/device/serial.c b/src/device/serial.c index ebc87cd59..67063413f 100644 --- a/src/device/serial.c +++ b/src/device/serial.c @@ -38,6 +38,8 @@ #include <86box/serial.h> #include <86box/mouse.h> +serial_port_t com_ports[SERIAL_MAX]; + enum { SERIAL_INT_LSR = 1, SERIAL_INT_RECEIVE = 2, @@ -578,7 +580,7 @@ serial_remove(serial_t *dev) if (dev == NULL) return; - if (!serial_enabled[dev->inst]) + if (!com_ports[dev->inst].enabled) return; if (!dev->base_address) @@ -599,7 +601,7 @@ serial_setup(serial_t *dev, uint16_t addr, uint8_t irq) if (dev == NULL) return; - if (!serial_enabled[dev->inst]) + if (!com_ports[dev->inst].enabled) return; if (dev->base_address != 0x0000) serial_remove(dev); @@ -650,7 +652,7 @@ serial_init(const device_t *info) dev->inst = next_inst; - if (serial_enabled[next_inst]) { + if (com_ports[next_inst].enabled) { serial_log("Adding serial port %i...\n", next_inst); dev->type = info->local; memset(&(serial_devices[next_inst]), 0, sizeof(serial_device_t)); diff --git a/src/include/86box/86box.h b/src/include/86box/86box.h index 75226e727..93a9fa0a1 100644 --- a/src/include/86box/86box.h +++ b/src/include/86box/86box.h @@ -101,8 +101,7 @@ extern int vid_cga_contrast, /* (C) video */ video_framerate, /* (C) video */ gfxcard; /* (C) graphics/video card */ extern char video_shader[512]; /* (C) video */ -extern int serial_enabled[], /* (C) enable serial ports */ - bugger_enabled, /* (C) enable ISAbugger */ +extern int bugger_enabled, /* (C) enable ISAbugger */ postcard_enabled, /* (C) enable POST card */ isamem_type[], /* (C) enable ISA mem cards */ isartc_type; /* (C) enable ISA RTC card */ diff --git a/src/include/86box/config.h b/src/include/86box/config.h index d84b5d25f..86bf39dce 100644 --- a/src/include/86box/config.h +++ b/src/include/86box/config.h @@ -111,8 +111,6 @@ typedef struct { # ifdef USE_SERIAL_DEVICES char serial_devices[SERIAL_MAX][32]; /* Serial device names */ # endif - int serial_enabled[SERIAL_MAX], /* Serial ports 1, 2, 3, 4 enabled */ - parallel_enabled[PARALLEL_MAX]; /* LPT1, LPT2, LPT3, LPT4 enabled */ /* Other peripherals category */ int fdc_type, /* Floppy disk controller type */ diff --git a/src/include/86box/serial.h b/src/include/86box/serial.h index be1ab957e..9f8bf1b98 100644 --- a/src/include/86box/serial.h +++ b/src/include/86box/serial.h @@ -74,6 +74,12 @@ typedef struct serial_device_s { serial_t *serial; } serial_device_t; +typedef struct { + uint8_t enabled; +} serial_port_t; + +extern serial_port_t com_ports[SERIAL_MAX]; + extern serial_t *serial_attach(int port, void (*rcr_callback)(struct serial_s *serial, void *p), void (*dev_write)(struct serial_s *serial, void *p, uint8_t data), diff --git a/src/qt/qt_settingsports.cpp b/src/qt/qt_settingsports.cpp index 6e0388ede..34c000c87 100644 --- a/src/qt/qt_settingsports.cpp +++ b/src/qt/qt_settingsports.cpp @@ -26,6 +26,7 @@ extern "C" { #include <86box/device.h> #include <86box/machine.h> #include <86box/lpt.h> +#include <86box/serial.h> } #include "qt_deviceconfig.hpp" @@ -63,7 +64,7 @@ SettingsPorts::SettingsPorts(QWidget *parent) : for (int i = 0; i < SERIAL_MAX; i++) { auto* checkBox = findChild(QString("checkBoxSerial%1").arg(i+1)); - checkBox->setChecked(serial_enabled[i] > 0); + checkBox->setChecked(com_ports[i].enabled > 0); } } @@ -82,7 +83,7 @@ void SettingsPorts::save() { for (int i = 0; i < SERIAL_MAX; i++) { auto* checkBox = findChild(QString("checkBoxSerial%1").arg(i+1)); - serial_enabled[i] = checkBox->isChecked() ? 1 : 0; + com_ports[i].enabled = checkBox->isChecked() ? 1 : 0; } } diff --git a/src/win/win_settings.c b/src/win/win_settings.c index d7445867a..bd5451b64 100644 --- a/src/win/win_settings.c +++ b/src/win/win_settings.c @@ -48,6 +48,7 @@ #include <86box/isartc.h> #include <86box/lpt.h> #include <86box/mouse.h> +#include <86box/serial.h> #include <86box/scsi.h> #include <86box/scsi_device.h> #include <86box/cdrom.h> @@ -352,7 +353,7 @@ win_settings_init(void) temp_lpt[i] = lpt_ports[i].enabled; } for (i = 0; i < SERIAL_MAX; i++) - temp_serial[i] = serial_enabled[i]; + temp_serial[i] = com_ports[i].enabled; /* Storage devices category */ for (i = 0; i < SCSI_BUS_MAX; i++) @@ -474,7 +475,7 @@ win_settings_changed(void) i = i || (temp_lpt[j] != lpt_ports[j].enabled); } for (j = 0; j < SERIAL_MAX; j++) - i = i || (temp_serial[j] != serial_enabled[j]); + i = i || (temp_serial[j] != com_ports[j].enabled); /* Storage devices category */ for (j = 0; j < SCSI_BUS_MAX; j++) @@ -567,7 +568,7 @@ win_settings_save(void) lpt_ports[i].enabled = temp_lpt[i]; } for (i = 0; i < SERIAL_MAX; i++) - serial_enabled[i] = temp_serial[i]; + com_ports[i].enabled = temp_serial[i]; /* Storage devices category */ for (i = 0; i < SCSI_BUS_MAX; i++) From 6e6436acd7090cd493ccaa1bf940bb7e2f8b0ad9 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Fri, 29 Jul 2022 00:47:52 +0200 Subject: [PATCH 180/386] ESDI: implement HDD timings --- src/config.c | 3 +- src/disk/hdc_esdi_at.c | 86 +++++++++++++++++++++++++--------- src/qt/qt_harddrive_common.cpp | 1 + 3 files changed, 68 insertions(+), 22 deletions(-) diff --git a/src/config.c b/src/config.c index 81bbc016f..581c250b4 100644 --- a/src/config.c +++ b/src/config.c @@ -1386,6 +1386,7 @@ load_hard_disks(void) sprintf(temp, "hdd_%02i_speed", c + 1); switch (hdd[c].bus) { case HDD_BUS_IDE: + case HDD_BUS_ESDI: sprintf(tmp2, "1997_5400rpm"); break; default: @@ -2920,7 +2921,7 @@ save_hard_disks(void) config_delete_var(cat, temp); sprintf(temp, "hdd_%02i_speed", c + 1); - if (!hdd_is_valid(c) || (hdd[c].bus != HDD_BUS_IDE)) + if (!hdd_is_valid(c) || (hdd[c].bus != HDD_BUS_IDE && hdd[c].bus != HDD_BUS_ESDI)) config_delete_var(cat, temp); else config_set_string(cat, temp, hdd_preset_get_internal_name(hdd[c].speed_preset)); diff --git a/src/disk/hdc_esdi_at.c b/src/disk/hdc_esdi_at.c index ff284b231..d0524dcdf 100644 --- a/src/disk/hdc_esdi_at.c +++ b/src/disk/hdc_esdi_at.c @@ -41,7 +41,7 @@ #include <86box/hdd.h> -#define HDC_TIME (TIMER_USEC*10LL) +#define HDC_TIME 10.0 #define BIOS_FILE "roms/hdd/esdi_at/62-000279-061.bin" #define STAT_ERR 0x01 @@ -152,6 +152,26 @@ irq_update(esdi_t *esdi) picint(1 << 14); } +static void +esdi_set_callback(esdi_t *esdi, double callback) +{ + if (!esdi) { + esdi_at_log("esdi_set_callback(NULL): Set callback failed\n"); + return; + } + + if (callback == 0.0) + timer_stop(&esdi->callback_timer); + else + timer_on_auto(&esdi->callback_timer, callback); +} + +double +esdi_get_xfer_time(esdi_t *esdi, int size) +{ + /* 390.625 us per sector at 10 Mbit/s = 1280 kB/s. */ + return (3125.0 / 8.0) * (double)size; +} /* Return the sector offset for the current register values. */ static int @@ -160,7 +180,7 @@ get_sector(esdi_t *esdi, off64_t *addr) drive_t *drive = &esdi->drives[esdi->drive_sel]; int heads = drive->cfg_hpc; int sectors = drive->cfg_spt; - int c, h, s; + int c, h, s, sector; if (esdi->head > heads) { esdi_at_log("esdi_get_sector: past end of configured heads\n"); @@ -172,9 +192,11 @@ get_sector(esdi_t *esdi, off64_t *addr) return(1); } + sector = esdi->sector ? esdi->sector : 1; + if (drive->cfg_spt==drive->real_spt && drive->cfg_hpc==drive->real_hpc) { *addr = ((((off64_t) esdi->cylinder * heads) + esdi->head) * - sectors) + (esdi->sector - 1); + sectors) + (sector - 1); } else { /* * When performing translation, the firmware seems to leave 1 @@ -182,7 +204,7 @@ get_sector(esdi_t *esdi, off64_t *addr) */ *addr = ((((off64_t) esdi->cylinder * heads) + esdi->head) * - sectors) + (esdi->sector - 1); + sectors) + (sector - 1); s = *addr % (drive->real_spt - 1); h = (*addr / (drive->real_spt - 1)) % drive->real_hpc; @@ -218,6 +240,7 @@ static void esdi_writew(uint16_t port, uint16_t val, void *priv) { esdi_t *esdi = (esdi_t *)priv; + off64_t addr; if (port > 0x01f0) { esdi_write(port, val & 0xff, priv); @@ -230,8 +253,10 @@ esdi_writew(uint16_t port, uint16_t val, void *priv) if (esdi->pos >= 512) { esdi->pos = 0; esdi->status = STAT_BUSY; - /* 390.625 us per sector at 10 Mbit/s = 1280 kB/s. */ - timer_set_delay_u64(&esdi->callback_timer, (3125 * TIMER_USEC) / 8); + get_sector(esdi, &addr); + double seek_time = hdd_timing_write(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); + double xfer_time = esdi_get_xfer_time(esdi, 1); + esdi_set_callback(esdi, seek_time + xfer_time); } } } @@ -241,6 +266,8 @@ static void esdi_write(uint16_t port, uint8_t val, void *priv) { esdi_t *esdi = (esdi_t *)priv; + double seek_time, xfer_time; + off64_t addr; esdi_at_log("WD1007 write(%04x, %02x)\n", port, val); @@ -289,20 +316,22 @@ esdi_write(uint16_t port, uint8_t val, void *priv) case CMD_RESTORE: esdi->command &= ~0x0f; /*mask off step rate*/ esdi->status = STAT_BUSY; - timer_set_delay_u64(&esdi->callback_timer, 200 * HDC_TIME); + esdi_set_callback(esdi, 200 * HDC_TIME); break; case CMD_SEEK: esdi->command &= ~0x0f; /*mask off step rate*/ esdi->status = STAT_BUSY; - timer_set_delay_u64(&esdi->callback_timer, 200 * HDC_TIME); + get_sector(esdi, &addr); + seek_time = hdd_seek_get_time(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, HDD_OP_SEEK, 0, 0.0); + esdi_set_callback(esdi, seek_time); break; default: switch (val) { case CMD_NOP: esdi->status = STAT_BUSY; - timer_set_delay_u64(&esdi->callback_timer, 200 * HDC_TIME); + esdi_set_callback(esdi, 200 * HDC_TIME); break; case CMD_READ: @@ -316,7 +345,10 @@ esdi_write(uint16_t port, uint8_t val, void *priv) case 0xa0: esdi->status = STAT_BUSY; - timer_set_delay_u64(&esdi->callback_timer, 200 * HDC_TIME); + get_sector(esdi, &addr); + seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); + xfer_time = esdi_get_xfer_time(esdi, 1); + esdi_set_callback(esdi, seek_time + xfer_time); break; case CMD_WRITE: @@ -334,7 +366,10 @@ esdi_write(uint16_t port, uint8_t val, void *priv) case CMD_VERIFY+1: esdi->command &= ~0x01; esdi->status = STAT_BUSY; - timer_set_delay_u64(&esdi->callback_timer, 200 * HDC_TIME); + get_sector(esdi, &addr); + seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); + xfer_time = esdi_get_xfer_time(esdi, 1); + esdi_set_callback(esdi, seek_time + xfer_time); break; case CMD_FORMAT: @@ -344,18 +379,18 @@ esdi_write(uint16_t port, uint8_t val, void *priv) case CMD_SET_PARAMETERS: /* Initialize Drive Parameters */ esdi->status = STAT_BUSY; - timer_set_delay_u64(&esdi->callback_timer, 30 * HDC_TIME); + esdi_set_callback(esdi, 30 * HDC_TIME); break; case CMD_DIAGNOSE: /* Execute Drive Diagnostics */ esdi->status = STAT_BUSY; - timer_set_delay_u64(&esdi->callback_timer, 200 * HDC_TIME); + esdi_set_callback(esdi, 200 * HDC_TIME); break; case 0xe0: /*???*/ case CMD_READ_PARAMETERS: esdi->status = STAT_BUSY; - timer_set_delay_u64(&esdi->callback_timer, 200 * HDC_TIME); + esdi_set_callback(esdi, 200 * HDC_TIME); break; default: @@ -363,7 +398,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv) /*FALLTHROUGH*/ case 0xe8: /*???*/ esdi->status = STAT_BUSY; - timer_set_delay_u64(&esdi->callback_timer, 200 * HDC_TIME); + esdi_set_callback(esdi, 200 * HDC_TIME); break; } } @@ -371,14 +406,14 @@ esdi_write(uint16_t port, uint8_t val, void *priv) case 0x3f6: /* Device control */ if ((esdi->fdisk & 0x04) && !(val & 0x04)) { - timer_set_delay_u64(&esdi->callback_timer, 500 * HDC_TIME); + esdi_set_callback(esdi, 500 * HDC_TIME); esdi->reset = 1; esdi->status = STAT_BUSY; } if (val & 0x04) { /* Drive held in reset. */ - timer_disable(&esdi->callback_timer); + esdi_set_callback(esdi, 0); esdi->status = STAT_BUSY; } esdi->fdisk = val; @@ -393,6 +428,7 @@ esdi_readw(uint16_t port, void *priv) { esdi_t *esdi = (esdi_t *)priv; uint16_t temp; + off64_t addr; if (port > 0x01f0) { temp = esdi_read(port, priv); @@ -412,8 +448,11 @@ esdi_readw(uint16_t port, void *priv) if (esdi->secount) { next_sector(esdi); esdi->status = STAT_BUSY; + get_sector(esdi, &addr); + double seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); + double xfer_time = esdi_get_xfer_time(esdi, 1); /* 390.625 us per sector at 10 Mbit/s = 1280 kB/s. */ - timer_set_delay_u64(&esdi->callback_timer, (3125 * TIMER_USEC) / 8); + esdi_set_callback(esdi, seek_time + xfer_time); } else ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); } @@ -477,6 +516,7 @@ esdi_callback(void *priv) esdi_t *esdi = (esdi_t *)priv; drive_t *drive = &esdi->drives[esdi->drive_sel]; off64_t addr; + double seek_time; if (esdi->reset) { esdi->status = STAT_READY|STAT_DSC; @@ -580,9 +620,11 @@ esdi_callback(void *priv) ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); next_sector(esdi); esdi->secount = (esdi->secount - 1) & 0xff; - if (esdi->secount) - timer_set_delay_u64(&esdi->callback_timer, 6 * HDC_TIME); - else { + if (esdi->secount) { + get_sector(esdi, &addr); + seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); + esdi_set_callback(esdi, seek_time + HDC_TIME); + } else { esdi->pos = 0; esdi->status = STAT_READY|STAT_DSC; irq_raise(esdi); @@ -752,6 +794,8 @@ loadhd(esdi_t *esdi, int hdd_num, int d, const char *fn) return; } + hdd_preset_apply(d); + drive->cfg_spt = drive->real_spt = hdd[d].spt; drive->cfg_hpc = drive->real_hpc = hdd[d].hpc; drive->real_tracks = hdd[d].tracks; diff --git a/src/qt/qt_harddrive_common.cpp b/src/qt/qt_harddrive_common.cpp index 5ac46dd42..661e7992c 100644 --- a/src/qt/qt_harddrive_common.cpp +++ b/src/qt/qt_harddrive_common.cpp @@ -59,6 +59,7 @@ void Harddrives::populateSpeeds(QAbstractItemModel *model, int bus) { switch (bus) { case HDD_BUS_IDE: + case HDD_BUS_ESDI: num_preset = hdd_preset_get_num(); break; From e0dfb6d1837cea6ebff6393cbb8ad9b820ed967c Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Fri, 29 Jul 2022 01:17:36 +0200 Subject: [PATCH 181/386] ESDI: fix drive status icon updating --- src/disk/hdc_esdi_at.c | 60 ++++++++++++++++++++++++++++-------------- 1 file changed, 40 insertions(+), 20 deletions(-) diff --git a/src/disk/hdc_esdi_at.c b/src/disk/hdc_esdi_at.c index d0524dcdf..59d8308a8 100644 --- a/src/disk/hdc_esdi_at.c +++ b/src/disk/hdc_esdi_at.c @@ -253,9 +253,9 @@ esdi_writew(uint16_t port, uint16_t val, void *priv) if (esdi->pos >= 512) { esdi->pos = 0; esdi->status = STAT_BUSY; - get_sector(esdi, &addr); - double seek_time = hdd_timing_write(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); - double xfer_time = esdi_get_xfer_time(esdi, 1); + get_sector(esdi, &addr); + double seek_time = hdd_timing_write(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); + double xfer_time = esdi_get_xfer_time(esdi, 1); esdi_set_callback(esdi, seek_time + xfer_time); } } @@ -317,6 +317,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv) esdi->command &= ~0x0f; /*mask off step rate*/ esdi->status = STAT_BUSY; esdi_set_callback(esdi, 200 * HDC_TIME); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); break; case CMD_SEEK: @@ -325,6 +326,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv) get_sector(esdi, &addr); seek_time = hdd_seek_get_time(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, HDD_OP_SEEK, 0, 0.0); esdi_set_callback(esdi, seek_time); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); break; default: @@ -345,10 +347,11 @@ esdi_write(uint16_t port, uint8_t val, void *priv) case 0xa0: esdi->status = STAT_BUSY; - get_sector(esdi, &addr); - seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); - xfer_time = esdi_get_xfer_time(esdi, 1); + get_sector(esdi, &addr); + seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); + xfer_time = esdi_get_xfer_time(esdi, 1); esdi_set_callback(esdi, seek_time + xfer_time); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); break; case CMD_WRITE: @@ -360,21 +363,24 @@ esdi_write(uint16_t port, uint8_t val, void *priv) fatal("Write with ECC\n"); esdi->status = STAT_READY | STAT_DRQ | STAT_DSC; esdi->pos = 0; + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); break; case CMD_VERIFY: case CMD_VERIFY+1: esdi->command &= ~0x01; esdi->status = STAT_BUSY; - get_sector(esdi, &addr); - seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); - xfer_time = esdi_get_xfer_time(esdi, 1); + get_sector(esdi, &addr); + seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); + xfer_time = esdi_get_xfer_time(esdi, 1); esdi_set_callback(esdi, seek_time + xfer_time); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); break; case CMD_FORMAT: esdi->status = STAT_DRQ; esdi->pos = 0; + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); break; case CMD_SET_PARAMETERS: /* Initialize Drive Parameters */ @@ -385,6 +391,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv) case CMD_DIAGNOSE: /* Execute Drive Diagnostics */ esdi->status = STAT_BUSY; esdi_set_callback(esdi, 200 * HDC_TIME); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); break; case 0xe0: /*???*/ @@ -448,9 +455,9 @@ esdi_readw(uint16_t port, void *priv) if (esdi->secount) { next_sector(esdi); esdi->status = STAT_BUSY; - get_sector(esdi, &addr); - double seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); - double xfer_time = esdi_get_xfer_time(esdi, 1); + get_sector(esdi, &addr); + double seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); + double xfer_time = esdi_get_xfer_time(esdi, 1); /* 390.625 us per sector at 10 Mbit/s = 1280 kB/s. */ esdi_set_callback(esdi, seek_time + xfer_time); } else @@ -543,6 +550,7 @@ esdi_callback(void *priv) esdi->status = STAT_READY|STAT_DSC; } irq_raise(esdi); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); break; case CMD_SEEK: @@ -552,6 +560,7 @@ esdi_callback(void *priv) } else esdi->status = STAT_READY|STAT_DSC; irq_raise(esdi); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); break; case CMD_READ: @@ -571,7 +580,6 @@ esdi_callback(void *priv) esdi->pos = 0; esdi->status = STAT_DRQ|STAT_READY|STAT_DSC; irq_raise(esdi); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); } break; @@ -580,12 +588,14 @@ esdi_callback(void *priv) esdi->status = STAT_READY|STAT_ERR|STAT_DSC; esdi->error = ERR_ABRT; irq_raise(esdi); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); break; } else { if (get_sector(esdi, &addr)) { esdi->error = ERR_ID_NOT_FOUND; esdi->status = STAT_READY|STAT_DSC|STAT_ERR; irq_raise(esdi); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); break; } @@ -596,9 +606,11 @@ esdi_callback(void *priv) esdi->status = STAT_DRQ|STAT_READY|STAT_DSC; esdi->pos = 0; next_sector(esdi); - } else + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); + } else { esdi->status = STAT_READY|STAT_DSC; - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); + } } break; @@ -607,12 +619,14 @@ esdi_callback(void *priv) esdi->status = STAT_READY|STAT_ERR|STAT_DSC; esdi->error = ERR_ABRT; irq_raise(esdi); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); break; } else { if (get_sector(esdi, &addr)) { esdi->error = ERR_ID_NOT_FOUND; esdi->status = STAT_READY|STAT_DSC|STAT_ERR; irq_raise(esdi); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); break; } @@ -621,18 +635,20 @@ esdi_callback(void *priv) next_sector(esdi); esdi->secount = (esdi->secount - 1) & 0xff; if (esdi->secount) { - get_sector(esdi, &addr); - seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); + get_sector(esdi, &addr); + seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); esdi_set_callback(esdi, seek_time + HDC_TIME); } else { esdi->pos = 0; esdi->status = STAT_READY|STAT_DSC; irq_raise(esdi); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); } } break; case CMD_FORMAT: + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); if (! drive->present) { esdi->status = STAT_READY|STAT_ERR|STAT_DSC; esdi->error = ERR_ABRT; @@ -649,7 +665,6 @@ esdi_callback(void *priv) hdd_image_zero(drive->hdd_num, addr, esdi->secount); esdi->status = STAT_READY|STAT_DSC; irq_raise(esdi); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); } break; @@ -662,9 +677,11 @@ esdi_callback(void *priv) esdi->error = 1; /*no error detected*/ esdi->status = STAT_READY|STAT_DSC; irq_raise(esdi); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); break; case CMD_SET_PARAMETERS: /* Initialize Drive Parameters */ + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); if (! drive->present) { esdi->status = STAT_READY|STAT_ERR|STAT_DSC; esdi->error = ERR_ABRT; @@ -686,9 +703,11 @@ esdi_callback(void *priv) esdi->status = STAT_READY|STAT_ERR|STAT_DSC; esdi->error = ERR_ABRT; irq_raise(esdi); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); break; case 0xe0: + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); if (! drive->present) { esdi->status = STAT_READY|STAT_ERR|STAT_DSC; esdi->error = ERR_ABRT; @@ -731,6 +750,7 @@ esdi_callback(void *priv) esdi->status = STAT_DRQ|STAT_READY|STAT_DSC; } irq_raise(esdi); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); break; case CMD_READ_PARAMETERS: @@ -766,6 +786,7 @@ esdi_callback(void *priv) esdi->status = STAT_DRQ|STAT_READY|STAT_DSC; irq_raise(esdi); } + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); break; default: @@ -776,10 +797,9 @@ esdi_callback(void *priv) esdi->status = STAT_READY|STAT_ERR|STAT_DSC; esdi->error = ERR_ABRT; irq_raise(esdi); + ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); break; } - - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); } From 43339bd44a89e267adcccc6c603812223818fbbe Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Thu, 28 Jul 2022 20:39:34 -0400 Subject: [PATCH 182/386] Add orchid varients of the GD5430 and 5434 --- src/include/86box/video.h | 1 + src/video/vid_cl54xx.c | 39 +++++++++++++++++++++++++++++++++++---- src/video/vid_table.c | 1 + 3 files changed, 37 insertions(+), 4 deletions(-) diff --git a/src/include/86box/video.h b/src/include/86box/video.h index 3a1cb0d77..8661fcef8 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -326,6 +326,7 @@ extern const device_t gd5428_onboard_device; extern const device_t gd5429_isa_device; extern const device_t gd5429_vlb_device; extern const device_t gd5430_diamond_speedstar_pro_se_a8_vlb_device; +extern const device_t gd5430_vlb_device; extern const device_t gd5430_pci_device; extern const device_t gd5434_isa_device; extern const device_t gd5434_diamond_speedstar_64_a3_isa_device; diff --git a/src/video/vid_cl54xx.c b/src/video/vid_cl54xx.c index c18e4c532..7cded795e 100644 --- a/src/video/vid_cl54xx.c +++ b/src/video/vid_cl54xx.c @@ -54,6 +54,7 @@ #define BIOS_GD5428_BOCA_ISA_PATH "roms/video/cirruslogic/boca_gd5428_1.30b.bin" #define BIOS_GD5429_PATH "roms/video/cirruslogic/5429.vbi" #define BIOS_GD5430_DIAMOND_A8_VLB_PATH "roms/video/cirruslogic/diamondvlbus.bin" +#define BIOS_GD5430_ORCHID_VLB_PATH "roms/video/cirruslogic/orchidvlbus.bin" #define BIOS_GD5430_PATH "roms/video/cirruslogic/pci.bin" #define BIOS_GD5434_DIAMOND_A3_ISA_PATH "roms/video/cirruslogic/Diamond Multimedia SpeedStar 64 v2.02 EPROM Backup from ST M27C256B-12F1.BIN" #define BIOS_GD5434_PATH "roms/video/cirruslogic/gd5434.BIN" @@ -3944,6 +3945,8 @@ static void if (info->local & 0x200) { romfn = NULL; gd54xx->has_bios = 0; + } else if (gd54xx->vlb) { + romfn = BIOS_GD5430_ORCHID_VLB_PATH; } else { if (info->local & 0x100) romfn = BIOS_GD5434_DIAMOND_A3_ISA_PATH; @@ -3970,8 +3973,10 @@ static void if (info->local & 0x200) { romfn = NULL; gd54xx->has_bios = 0; - } else if (gd54xx->pci) + } else if (gd54xx->pci) { romfn = BIOS_GD5430_PATH; + } else if ((gd54xx->vlb) && (info->local & 0x100)) + romfn = BIOS_GD5430_ORCHID_VLB_PATH; else romfn = BIOS_GD5430_DIAMOND_A8_VLB_PATH; } @@ -4233,6 +4238,18 @@ gd5434_available(void) return rom_present(BIOS_GD5434_PATH); } +static int +gd5434_isa_available(void) +{ + return rom_present(BIOS_GD5434_PATH); +} + +static int +gd5430_orchid_vlb_available(void) +{ + return rom_present(BIOS_GD5430_ORCHID_VLB_PATH); +} + static int gd5434_diamond_a3_available(void) { @@ -4791,7 +4808,7 @@ const device_t gd5429_vlb_device = { /*According to a Diamond bios file listing and vgamuseum*/ const device_t gd5430_diamond_speedstar_pro_se_a8_vlb_device = { .name = "Cirrus Logic GD5430 (VLB) (Diamond SpeedStar Pro SE Rev. A8)", - .internal_name = "cl_gd5430_vlb", + .internal_name = "cl_gd5430_vlb_diamond", .flags = DEVICE_VLB, .local = CIRRUS_ID_CLGD5430, .init = gd54xx_init, @@ -4803,6 +4820,20 @@ const device_t gd5430_diamond_speedstar_pro_se_a8_vlb_device = { .config = gd5429_config }; +const device_t gd5430_vlb_device = { + .name = "Cirrus Logic GD5430", + .internal_name = "cl_gd5430_vlb", + .flags = DEVICE_VLB, + .local = CIRRUS_ID_CLGD5430 | 0x100, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, + { .available = gd5430_orchid_vlb_available }, + .speed_changed = gd54xx_speed_changed, + .force_redraw = gd54xx_force_redraw, + .config = gd5429_config +}; + const device_t gd5430_pci_device = { .name = "Cirrus Logic GD5430 (PCI)", .internal_name = "cl_gd5430_pci", @@ -4825,7 +4856,7 @@ const device_t gd5434_isa_device = { .init = gd54xx_init, .close = gd54xx_close, .reset = gd54xx_reset, - { .available = gd5434_available }, + { .available = gd5434_isa_available }, .speed_changed = gd54xx_speed_changed, .force_redraw = gd54xx_force_redraw, .config = gd5434_config @@ -4868,7 +4899,7 @@ const device_t gd5434_vlb_device = { .init = gd54xx_init, .close = gd54xx_close, .reset = gd54xx_reset, - { .available = gd5434_available }, + { .available = gd5430_orchid_vlb_available }, .speed_changed = gd54xx_speed_changed, .force_redraw = gd54xx_force_redraw, .config = gd5434_config diff --git a/src/video/vid_table.c b/src/video/vid_table.c index 6935769fd..5f53f4d8a 100644 --- a/src/video/vid_table.c +++ b/src/video/vid_table.c @@ -222,6 +222,7 @@ video_cards[] = { { &gd5428_diamond_speedstar_pro_b1_vlb_device }, { &gd5429_vlb_device }, { &gd5430_diamond_speedstar_pro_se_a8_vlb_device }, + { &gd5430_vlb_device }, { &gd5434_vlb_device }, { &s3_metheus_86c928_vlb_device }, { &s3_mirocrystal_8s_805_vlb_device }, From 0d72af0f55e6644a391141bb25a49975809fede2 Mon Sep 17 00:00:00 2001 From: Alexander Babikov <2708460+lemondrops@users.noreply.github.com> Date: Thu, 28 Jul 2022 23:45:13 +0500 Subject: [PATCH 183/386] Clear the MT-32 LCD message on reset --- src/sound/midi_mt32.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/sound/midi_mt32.c b/src/sound/midi_mt32.c index bb86210f3..ad2aaefa7 100644 --- a/src/sound/midi_mt32.c +++ b/src/sound/midi_mt32.c @@ -320,6 +320,8 @@ mt32_close(void *p) } context = NULL; + ui_sb_mt32lcd(""); + if (buffer) free(buffer); buffer = NULL; From be8784b17c671fbb01882ce35b4bd929ef1ebb89 Mon Sep 17 00:00:00 2001 From: Alexander Babikov <2708460+lemondrops@users.noreply.github.com> Date: Sun, 24 Jul 2022 07:50:54 +0500 Subject: [PATCH 184/386] Update internal MUNT to version 2.7.0 --- src/include/mt32emu/Enumerations.h | 2 +- src/include/mt32emu/Types.h | 2 +- src/include/mt32emu/c_interface/c_interface.h | 366 +++++++++--- src/include/mt32emu/c_interface/c_types.h | 319 +++++++---- .../mt32emu/c_interface/cpp_interface.h | 209 +++++-- src/include/mt32emu/config.h | 11 +- src/include/mt32emu/globals.h | 75 ++- src/include/mt32emu/mt32emu.h | 43 +- src/sound/midi_mt32.c | 12 +- src/sound/munt/Analog.cpp | 4 +- src/sound/munt/Analog.h | 2 +- src/sound/munt/BReverbModel.cpp | 4 +- src/sound/munt/BReverbModel.h | 2 +- src/sound/munt/CMakeLists.txt | 2 +- src/sound/munt/Display.cpp | 354 ++++++++++++ src/sound/munt/Display.h | 91 +++ src/sound/munt/Enumerations.h | 2 +- src/sound/munt/File.cpp | 2 +- src/sound/munt/File.h | 2 +- src/sound/munt/FileStream.cpp | 15 +- src/sound/munt/FileStream.h | 2 +- src/sound/munt/LA32FloatWaveGenerator.cpp | 4 +- src/sound/munt/LA32FloatWaveGenerator.h | 2 +- src/sound/munt/LA32Ramp.cpp | 2 +- src/sound/munt/LA32Ramp.h | 2 +- src/sound/munt/LA32WaveGenerator.cpp | 6 +- src/sound/munt/LA32WaveGenerator.h | 2 +- src/sound/munt/MemoryRegion.h | 6 +- src/sound/munt/MidiEventQueue.h | 2 +- src/sound/munt/MidiStreamParser.cpp | 2 +- src/sound/munt/MidiStreamParser.h | 2 +- src/sound/munt/Part.cpp | 44 +- src/sound/munt/Part.h | 13 +- src/sound/munt/Partial.cpp | 2 +- src/sound/munt/Partial.h | 2 +- src/sound/munt/PartialManager.cpp | 2 +- src/sound/munt/PartialManager.h | 2 +- src/sound/munt/Poly.cpp | 19 +- src/sound/munt/Poly.h | 4 +- src/sound/munt/ROMInfo.cpp | 305 +++++++++- src/sound/munt/ROMInfo.h | 129 ++++- src/sound/munt/SampleRateConverter.cpp | 2 +- src/sound/munt/SampleRateConverter.h | 2 +- src/sound/munt/SampleRateConverter_dummy.cpp | 63 --- src/sound/munt/Structures.h | 7 +- src/sound/munt/Synth.cpp | 309 +++++++--- src/sound/munt/Synth.h | 95 +++- src/sound/munt/TVA.cpp | 17 +- src/sound/munt/TVA.h | 3 +- src/sound/munt/TVF.cpp | 4 +- src/sound/munt/TVF.h | 2 +- src/sound/munt/TVP.cpp | 44 +- src/sound/munt/TVP.h | 3 +- src/sound/munt/Tables.cpp | 2 +- src/sound/munt/Tables.h | 2 +- src/sound/munt/Types.h | 2 +- src/sound/munt/VersionTagging.cpp | 32 ++ src/sound/munt/VersionTagging.h | 60 ++ src/sound/munt/c_interface/c_interface.cpp | 531 +++++++++++++----- src/sound/munt/c_interface/c_interface.h | 333 ++++++++--- src/sound/munt/c_interface/c_types.h | 313 +++++++---- src/sound/munt/c_interface/cpp_interface.h | 188 +++++-- src/sound/munt/config.h | 6 +- src/sound/munt/config.h.in | 33 +- src/sound/munt/globals.h | 75 ++- src/sound/munt/internals.h | 2 +- src/sound/munt/mmath.h | 2 +- src/sound/munt/mt32emu.h | 43 +- .../munt/srchelper/InternalResampler.cpp | 2 +- src/sound/munt/srchelper/InternalResampler.h | 2 +- .../munt/srchelper/SamplerateAdapter.cpp | 2 +- src/sound/munt/srchelper/SamplerateAdapter.h | 2 +- src/sound/munt/srchelper/SoxrAdapter.cpp | 2 +- src/sound/munt/srchelper/SoxrAdapter.h | 2 +- .../srchelper/srctools/include/FIRResampler.h | 2 +- .../srctools/include/FloatSampleProvider.h | 2 +- .../srctools/include/IIR2xResampler.h | 2 +- .../srctools/include/LinearResampler.h | 2 +- .../srctools/include/ResamplerModel.h | 2 +- .../srctools/include/ResamplerStage.h | 2 +- .../srctools/include/SincResampler.h | 2 +- .../srchelper/srctools/src/FIRResampler.cpp | 2 +- .../srchelper/srctools/src/IIR2xResampler.cpp | 2 +- .../srctools/src/LinearResampler.cpp | 2 +- .../srchelper/srctools/src/ResamplerModel.cpp | 2 +- .../srchelper/srctools/src/SincResampler.cpp | 2 +- src/win/Makefile.mingw | 2 +- 87 files changed, 3292 insertions(+), 994 deletions(-) create mode 100644 src/sound/munt/Display.cpp create mode 100644 src/sound/munt/Display.h delete mode 100644 src/sound/munt/SampleRateConverter_dummy.cpp create mode 100644 src/sound/munt/VersionTagging.cpp create mode 100644 src/sound/munt/VersionTagging.h diff --git a/src/include/mt32emu/Enumerations.h b/src/include/mt32emu/Enumerations.h index bb580ca5b..3cbfdd4c8 100644 --- a/src/include/mt32emu/Enumerations.h +++ b/src/include/mt32emu/Enumerations.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2017 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/include/mt32emu/Types.h b/src/include/mt32emu/Types.h index f70e4795c..12e454750 100644 --- a/src/include/mt32emu/Types.h +++ b/src/include/mt32emu/Types.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2017 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/include/mt32emu/c_interface/c_interface.h b/src/include/mt32emu/c_interface/c_interface.h index 2ca3a3b04..5653c9051 100644 --- a/src/include/mt32emu/c_interface/c_interface.h +++ b/src/include/mt32emu/c_interface/c_interface.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2017 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -24,7 +24,9 @@ #include "c_types.h" #undef MT32EMU_EXPORT +#undef MT32EMU_EXPORT_V #define MT32EMU_EXPORT MT32EMU_EXPORT_ATTRIBUTE +#define MT32EMU_EXPORT_V(symbol_version_tag) MT32EMU_EXPORT #ifdef __cplusplus extern "C" { @@ -35,24 +37,28 @@ extern "C" { /* === Interface handling === */ /** Returns mt32emu_service_i interface. */ -MT32EMU_EXPORT mt32emu_service_i mt32emu_get_service_i(); +MT32EMU_EXPORT mt32emu_service_i MT32EMU_C_CALL mt32emu_get_service_i(void); #if MT32EMU_EXPORTS_TYPE == 2 #undef MT32EMU_EXPORT +#undef MT32EMU_EXPORT_V #define MT32EMU_EXPORT +#define MT32EMU_EXPORT_V(symbol_version_tag) MT32EMU_EXPORT #endif /** * Returns the version ID of mt32emu_report_handler_i interface the library has been compiled with. * This allows a client to fall-back gracefully instead of silently not receiving expected event reports. */ -MT32EMU_EXPORT mt32emu_report_handler_version mt32emu_get_supported_report_handler_version(); +MT32EMU_EXPORT mt32emu_report_handler_version MT32EMU_C_CALL mt32emu_get_supported_report_handler_version(void); /** * Returns the version ID of mt32emu_midi_receiver_version_i interface the library has been compiled with. * This allows a client to fall-back gracefully instead of silently not receiving expected MIDI messages. */ -MT32EMU_EXPORT mt32emu_midi_receiver_version mt32emu_get_supported_midi_receiver_version(); +MT32EMU_EXPORT mt32emu_midi_receiver_version MT32EMU_C_CALL mt32emu_get_supported_midi_receiver_version(void); + +/* === Utility === */ /** * Returns library version as an integer in format: 0x00MMmmpp, where: @@ -60,67 +66,149 @@ MT32EMU_EXPORT mt32emu_midi_receiver_version mt32emu_get_supported_midi_receiver * mm - minor version number * pp - patch number */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_library_version_int(); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_library_version_int(void); /** * Returns library version as a C-string in format: "MAJOR.MINOR.PATCH". */ -MT32EMU_EXPORT const char *mt32emu_get_library_version_string(); +MT32EMU_EXPORT const char * MT32EMU_C_CALL mt32emu_get_library_version_string(void); /** * Returns output sample rate used in emulation of stereo analog circuitry of hardware units for particular analog_output_mode. * See comment for mt32emu_analog_output_mode. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_stereo_output_samplerate(const mt32emu_analog_output_mode analog_output_mode); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_stereo_output_samplerate(const mt32emu_analog_output_mode analog_output_mode); /** * Returns the value of analog_output_mode for which the output signal may retain its full frequency spectrum * at the sample rate specified by the target_samplerate argument. * See comment for mt32emu_analog_output_mode. */ -MT32EMU_EXPORT mt32emu_analog_output_mode mt32emu_get_best_analog_output_mode(const double target_samplerate); +MT32EMU_EXPORT mt32emu_analog_output_mode MT32EMU_C_CALL mt32emu_get_best_analog_output_mode(const double target_samplerate); + +/* === ROM handling === */ + +/** + * Retrieves a list of identifiers (as C-strings) of supported machines. Argument machine_ids points to the array of size + * machine_ids_size to be filled. + * Returns the number of identifiers available for retrieval. The size of the target array to be allocated can be found + * by passing NULL in argument machine_ids; argument machine_ids_size is ignored in this case. + */ +MT32EMU_EXPORT_V(2.5) size_t MT32EMU_C_CALL mt32emu_get_machine_ids(const char **machine_ids, size_t machine_ids_size); +/** + * Retrieves a list of identifiers (as C-strings) of supported ROM images. Argument rom_ids points to the array of size + * rom_ids_size to be filled. Optional argument machine_id can be used to indicate a specific machine to retrieve ROM identifiers + * for; if NULL, identifiers of all the ROM images supported by the emulation engine are retrieved. + * Returns the number of ROM identifiers available for retrieval. The size of the target array to be allocated can be found + * by passing NULL in argument rom_ids; argument rom_ids_size is ignored in this case. If argument machine_id contains + * an unrecognised value, 0 is returned. + */ +MT32EMU_EXPORT_V(2.5) size_t MT32EMU_C_CALL mt32emu_get_rom_ids(const char **rom_ids, size_t rom_ids_size, const char *machine_id); + +/** + * Identifies a ROM image the provided data array contains by its SHA1 digest. Optional argument machine_id can be used to indicate + * a specific machine to identify the ROM image for; if NULL, the ROM image is identified for any supported machine. + * A mt32emu_rom_info structure supplied in argument rom_info is filled in accordance with the provided ROM image; unused fields + * are filled with NULLs. If the content of the ROM image is not identified successfully (e.g. when the ROM image is incompatible + * with the specified machine), all fields of rom_info are filled with NULLs. + * Returns MT32EMU_RC_OK upon success or a negative error code otherwise. + */ +MT32EMU_EXPORT_V(2.5) mt32emu_return_code MT32EMU_C_CALL mt32emu_identify_rom_data(mt32emu_rom_info *rom_info, const mt32emu_bit8u *data, size_t data_size, const char *machine_id); +/** + * Loads the content of the file specified by argument filename and identifies a ROM image the file contains by its SHA1 digest. + * Optional argument machine_id can be used to indicate a specific machine to identify the ROM image for; if NULL, the ROM image + * is identified for any supported machine. + * A mt32emu_rom_info structure supplied in argument rom_info is filled in accordance with the provided ROM image; unused fields + * are filled with NULLs. If the content of the file is not identified successfully (e.g. when the ROM image is incompatible + * with the specified machine), all fields of rom_info are filled with NULLs. + * Returns MT32EMU_RC_OK upon success or a negative error code otherwise. + */ +MT32EMU_EXPORT_V(2.5) mt32emu_return_code MT32EMU_C_CALL mt32emu_identify_rom_file(mt32emu_rom_info *rom_info, const char *filename, const char *machine_id); /* == Context-dependent functions == */ /** Initialises a new emulation context and installs custom report handler if non-NULL. */ -MT32EMU_EXPORT mt32emu_context mt32emu_create_context(mt32emu_report_handler_i report_handler, void *instance_data); +MT32EMU_EXPORT mt32emu_context MT32EMU_C_CALL mt32emu_create_context(mt32emu_report_handler_i report_handler, void *instance_data); /** Closes and destroys emulation context. */ -MT32EMU_EXPORT void mt32emu_free_context(mt32emu_context context); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_free_context(mt32emu_context context); /** - * Adds new ROM identified by its SHA1 digest to the emulation context replacing previously added ROM of the same type if any. - * Argument sha1_digest can be NULL, in this case the digest will be computed using the actual ROM data. + * Adds a new full ROM data image identified by its SHA1 digest to the emulation context replacing previously added ROM of the same + * type if any. Argument sha1_digest can be NULL, in this case the digest will be computed using the actual ROM data. * If sha1_digest is set to non-NULL, it is assumed being correct and will not be recomputed. - * This function doesn't immediately change the state of already opened synth. Newly added ROM will take effect upon next call of mt32emu_open_synth(). + * The provided data array is NOT copied and used directly for efficiency. The caller should not deallocate it while the emulation + * context is referring to the ROM data. + * This function doesn't immediately change the state of already opened synth. Newly added ROM will take effect upon next call of + * mt32emu_open_synth(). * Returns positive value upon success. */ -MT32EMU_EXPORT mt32emu_return_code mt32emu_add_rom_data(mt32emu_context context, const mt32emu_bit8u *data, size_t data_size, const mt32emu_sha1_digest *sha1_digest); +MT32EMU_EXPORT mt32emu_return_code MT32EMU_C_CALL mt32emu_add_rom_data(mt32emu_context context, const mt32emu_bit8u *data, size_t data_size, const mt32emu_sha1_digest *sha1_digest); /** - * Loads a ROM file, identify it by SHA1 digest, and adds it to the emulation context replacing previously added ROM of the same type if any. - * This function doesn't immediately change the state of already opened synth. Newly added ROM will take effect upon next call of mt32emu_open_synth(). + * Loads a ROM file that contains a full ROM data image, identifies it by the SHA1 digest, and adds it to the emulation context + * replacing previously added ROM of the same type if any. + * This function doesn't immediately change the state of already opened synth. Newly added ROM will take effect upon next call of + * mt32emu_open_synth(). * Returns positive value upon success. */ -MT32EMU_EXPORT mt32emu_return_code mt32emu_add_rom_file(mt32emu_context context, const char *filename); +MT32EMU_EXPORT mt32emu_return_code MT32EMU_C_CALL mt32emu_add_rom_file(mt32emu_context context, const char *filename); + +/** + * Merges a pair of compatible ROM data image parts into a full image and adds it to the emulation context replacing previously + * added ROM of the same type if any. Each partial image is identified by its SHA1 digest. Arguments partN_sha1_digest can be NULL, + * in this case the digest will be computed using the actual ROM data. If a non-NULL SHA1 value is provided, it is assumed being + * correct and will not be recomputed. The provided data arrays may be deallocated as soon as the function completes. + * This function doesn't immediately change the state of already opened synth. Newly added ROM will take effect upon next call of + * mt32emu_open_synth(). + * Returns positive value upon success. + */ +MT32EMU_EXPORT_V(2.5) mt32emu_return_code MT32EMU_C_CALL mt32emu_merge_and_add_rom_data(mt32emu_context context, const mt32emu_bit8u *part1_data, size_t part1_data_size, const mt32emu_sha1_digest *part1_sha1_digest, const mt32emu_bit8u *part2_data, size_t part2_data_size, const mt32emu_sha1_digest *part2_sha1_digest); + +/** + * Loads a pair of files that contains compatible parts of a full ROM image, identifies them by the SHA1 digest, merges these + * parts into a full ROM image and adds it to the emulation context replacing previously added ROM of the same type if any. + * This function doesn't immediately change the state of already opened synth. Newly added ROM will take effect upon next call of + * mt32emu_open_synth(). + * Returns positive value upon success. + */ +MT32EMU_EXPORT_V(2.5) mt32emu_return_code MT32EMU_C_CALL mt32emu_merge_and_add_rom_files(mt32emu_context context, const char *part1_filename, const char *part2_filename); + +/** + * Loads a file that contains a ROM image of a specific machine, identifies it by the SHA1 digest, and adds it to the emulation + * context. The ROM image can only be identified successfully if it is compatible with the specified machine. + * Full and partial ROM images are supported and handled according to the following rules: + * - a file with any compatible ROM image is added if none (of the same type) exists in the emulation context; + * - a file with any compatible ROM image replaces any image of the same type that is incompatible with the specified machine; + * - a file with a full ROM image replaces the previously added partial ROM of the same type; + * - a file with a partial ROM image is merged with the previously added ROM image if pairable; + * - otherwise, the file is ignored. + * The described behaviour allows the caller application to traverse a directory with ROM files attempting to add each one in turn. + * As soon as both the full control and the full PCM ROM images are added and / or merged, the iteration can be stopped. + * This function doesn't immediately change the state of already opened synth. Newly added ROMs will take effect upon next call of + * mt32emu_open_synth(). + * Returns a positive value in case changes have been made, MT32EMU_RC_OK if the file has been ignored or a negative error code + * upon failure. + */ +MT32EMU_EXPORT_V(2.5) mt32emu_return_code MT32EMU_C_CALL mt32emu_add_machine_rom_file(mt32emu_context context, const char *machine_id, const char *filename); /** * Fills in mt32emu_rom_info structure with identifiers and descriptions of control and PCM ROM files identified and added to the synth context. * If one of the ROM files is not loaded and identified yet, NULL is returned in the corresponding fields of the mt32emu_rom_info structure. */ -MT32EMU_EXPORT void mt32emu_get_rom_info(mt32emu_const_context context, mt32emu_rom_info *rom_info); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_get_rom_info(mt32emu_const_context context, mt32emu_rom_info *rom_info); /** * Allows to override the default maximum number of partials playing simultaneously within the emulation session. * This function doesn't immediately change the state of already opened synth. Newly set value will take effect upon next call of mt32emu_open_synth(). */ -MT32EMU_EXPORT void mt32emu_set_partial_count(mt32emu_context context, const mt32emu_bit32u partial_count); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_partial_count(mt32emu_context context, const mt32emu_bit32u partial_count); /** * Allows to override the default mode for emulation of analogue circuitry of the hardware units within the emulation session. * This function doesn't immediately change the state of already opened synth. Newly set value will take effect upon next call of mt32emu_open_synth(). */ -MT32EMU_EXPORT void mt32emu_set_analog_output_mode(mt32emu_context context, const mt32emu_analog_output_mode analog_output_mode); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_analog_output_mode(mt32emu_context context, const mt32emu_analog_output_mode analog_output_mode); /** * Allows to convert the synthesiser output to any desired sample rate. The samplerate conversion @@ -131,7 +219,7 @@ MT32EMU_EXPORT void mt32emu_set_analog_output_mode(mt32emu_context context, cons * This function doesn't immediately change the state of already opened synth. * Newly set value will take effect upon next call of mt32emu_open_synth(). */ -MT32EMU_EXPORT void mt32emu_set_stereo_output_samplerate(mt32emu_context context, const double samplerate); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_stereo_output_samplerate(mt32emu_context context, const double samplerate); /** * Several samplerate conversion quality options are provided which allow to trade-off the conversion speed vs. @@ -140,66 +228,79 @@ MT32EMU_EXPORT void mt32emu_set_stereo_output_samplerate(mt32emu_context context * This function doesn't immediately change the state of already opened synth. * Newly set value will take effect upon next call of mt32emu_open_synth(). */ -MT32EMU_EXPORT void mt32emu_set_samplerate_conversion_quality(mt32emu_context context, const mt32emu_samplerate_conversion_quality quality); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_samplerate_conversion_quality(mt32emu_context context, const mt32emu_samplerate_conversion_quality quality); /** * Selects new type of the wave generator and renderer to be used during subsequent calls to mt32emu_open_synth(). * By default, MT32EMU_RT_BIT16S is selected. * See mt32emu_renderer_type for details. */ -MT32EMU_EXPORT void mt32emu_select_renderer_type(mt32emu_context context, const mt32emu_renderer_type renderer_type); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_select_renderer_type(mt32emu_context context, const mt32emu_renderer_type renderer_type); /** * Returns previously selected type of the wave generator and renderer. * See mt32emu_renderer_type for details. */ -MT32EMU_EXPORT mt32emu_renderer_type mt32emu_get_selected_renderer_type(mt32emu_context context); +MT32EMU_EXPORT mt32emu_renderer_type MT32EMU_C_CALL mt32emu_get_selected_renderer_type(mt32emu_context context); /** * Prepares the emulation context to receive MIDI messages and produce output audio data using aforehand added set of ROMs, * and optionally set the maximum partial count and the analog output mode. * Returns MT32EMU_RC_OK upon success. */ -MT32EMU_EXPORT mt32emu_return_code mt32emu_open_synth(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_return_code MT32EMU_C_CALL mt32emu_open_synth(mt32emu_const_context context); /** Closes the emulation context freeing allocated resources. Added ROMs remain unaffected and ready for reuse. */ -MT32EMU_EXPORT void mt32emu_close_synth(mt32emu_const_context context); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_close_synth(mt32emu_const_context context); /** Returns true if the synth is in completely initialized state, otherwise returns false. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_open(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_open(mt32emu_const_context context); /** * Returns actual sample rate of the fully processed output stereo signal. * If samplerate conversion is used (i.e. when mt32emu_set_stereo_output_samplerate() has been invoked with a non-zero value), * the returned value is the desired output samplerate rounded down to the closest integer. - * Otherwise, the output samplerate is choosen depending on the emulation mode of stereo analog circuitry of hardware units. + * Otherwise, the output samplerate is chosen depending on the emulation mode of stereo analog circuitry of hardware units. * See comment for mt32emu_analog_output_mode for more info. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_actual_stereo_output_samplerate(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_actual_stereo_output_samplerate(mt32emu_const_context context); /** * Returns the number of samples produced at the internal synth sample rate (32000 Hz) * that correspond to the given number of samples at the output sample rate. * Intended to facilitate audio time synchronisation. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_convert_output_to_synth_timestamp(mt32emu_const_context context, mt32emu_bit32u output_timestamp); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_convert_output_to_synth_timestamp(mt32emu_const_context context, mt32emu_bit32u output_timestamp); /** * Returns the number of samples produced at the output sample rate * that correspond to the given number of samples at the internal synth sample rate (32000 Hz). * Intended to facilitate audio time synchronisation. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_convert_synth_to_output_timestamp(mt32emu_const_context context, mt32emu_bit32u synth_timestamp); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_convert_synth_to_output_timestamp(mt32emu_const_context context, mt32emu_bit32u synth_timestamp); /** All the enqueued events are processed by the synth immediately. */ -MT32EMU_EXPORT void mt32emu_flush_midi_queue(mt32emu_const_context context); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_flush_midi_queue(mt32emu_const_context context); /** * Sets size of the internal MIDI event queue. The queue size is set to the minimum power of 2 that is greater or equal to the size specified. * The queue is flushed before reallocation. * Returns the actual queue size being used. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_set_midi_event_queue_size(mt32emu_const_context context, const mt32emu_bit32u queue_size); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_set_midi_event_queue_size(mt32emu_const_context context, const mt32emu_bit32u queue_size); + +/** + * Configures the SysEx storage of the internal MIDI event queue. + * Supplying 0 in the storage_buffer_size argument makes the SysEx data stored + * in multiple dynamically allocated buffers per MIDI event. These buffers are only disposed + * when a new MIDI event replaces the SysEx event in the queue, thus never on the rendering thread. + * This is the default behaviour. + * In contrast, when a positive value is specified, SysEx data will be stored in a single preallocated buffer, + * which makes this kind of storage safe for use in a realtime thread. Additionally, the space retained + * by a SysEx event, that has been processed and thus is no longer necessary, is disposed instantly. + * Note, the queue is flushed and recreated in the process so that its size remains intact. + */ +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_configure_midi_event_queue_sysex_storage(mt32emu_const_context context, const mt32emu_bit32u storage_buffer_size); /** * Installs custom MIDI receiver object intended for receiving MIDI messages generated by MIDI stream parser. @@ -207,13 +308,13 @@ MT32EMU_EXPORT mt32emu_bit32u mt32emu_set_midi_event_queue_size(mt32emu_const_co * By default, parsed short MIDI messages and System Exclusive messages are sent to the synth input MIDI queue. * This function allows to override default behaviour. If midi_receiver argument is set to NULL, the default behaviour is restored. */ -MT32EMU_EXPORT void mt32emu_set_midi_receiver(mt32emu_context context, mt32emu_midi_receiver_i midi_receiver, void *instance_data); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_midi_receiver(mt32emu_context context, mt32emu_midi_receiver_i midi_receiver, void *instance_data); /** * Returns current value of the global counter of samples rendered since the synth was created (at the native sample rate 32000 Hz). * This method helps to compute accurate timestamp of a MIDI message to use with the methods below. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_internal_rendered_sample_count(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_internal_rendered_sample_count(mt32emu_const_context context); /* Enqueues a MIDI event for subsequent playback. * The MIDI event will be processed not before the specified timestamp. @@ -230,7 +331,7 @@ MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_internal_rendered_sample_count(mt32emu * When a System Realtime MIDI message is parsed, onMIDISystemRealtime callback is invoked. * NOTE: the total length of a SysEx message being fragmented shall not exceed MT32EMU_MAX_STREAM_BUFFER_SIZE (32768 bytes). */ -MT32EMU_EXPORT void mt32emu_parse_stream(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_parse_stream(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length); /** * Parses a block of raw MIDI bytes and enqueues parsed MIDI messages to play at specified time. @@ -238,31 +339,31 @@ MT32EMU_EXPORT void mt32emu_parse_stream(mt32emu_const_context context, const mt * When a System Realtime MIDI message is parsed, onMIDISystemRealtime callback is invoked. * NOTE: the total length of a SysEx message being fragmented shall not exceed MT32EMU_MAX_STREAM_BUFFER_SIZE (32768 bytes). */ -MT32EMU_EXPORT void mt32emu_parse_stream_at(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length, mt32emu_bit32u timestamp); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_parse_stream_at(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length, mt32emu_bit32u timestamp); /** * Enqueues a single mt32emu_bit32u-encoded short MIDI message with full processing ASAP. * The short MIDI message may contain no status byte, the running status is used in this case. * When the argument is a System Realtime MIDI message, onMIDISystemRealtime callback is invoked. */ -MT32EMU_EXPORT void mt32emu_play_short_message(mt32emu_const_context context, mt32emu_bit32u message); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_play_short_message(mt32emu_const_context context, mt32emu_bit32u message); /** * Enqueues a single mt32emu_bit32u-encoded short MIDI message to play at specified time with full processing. * The short MIDI message may contain no status byte, the running status is used in this case. * When the argument is a System Realtime MIDI message, onMIDISystemRealtime callback is invoked. */ -MT32EMU_EXPORT void mt32emu_play_short_message_at(mt32emu_const_context context, mt32emu_bit32u message, mt32emu_bit32u timestamp); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_play_short_message_at(mt32emu_const_context context, mt32emu_bit32u message, mt32emu_bit32u timestamp); /** Enqueues a single short MIDI message to be processed ASAP. The message must contain a status byte. */ -MT32EMU_EXPORT mt32emu_return_code mt32emu_play_msg(mt32emu_const_context context, mt32emu_bit32u msg); +MT32EMU_EXPORT mt32emu_return_code MT32EMU_C_CALL mt32emu_play_msg(mt32emu_const_context context, mt32emu_bit32u msg); /** Enqueues a single well formed System Exclusive MIDI message to be processed ASAP. */ -MT32EMU_EXPORT mt32emu_return_code mt32emu_play_sysex(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); +MT32EMU_EXPORT mt32emu_return_code MT32EMU_C_CALL mt32emu_play_sysex(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); /** Enqueues a single short MIDI message to play at specified time. The message must contain a status byte. */ -MT32EMU_EXPORT mt32emu_return_code mt32emu_play_msg_at(mt32emu_const_context context, mt32emu_bit32u msg, mt32emu_bit32u timestamp); +MT32EMU_EXPORT mt32emu_return_code MT32EMU_C_CALL mt32emu_play_msg_at(mt32emu_const_context context, mt32emu_bit32u msg, mt32emu_bit32u timestamp); /** Enqueues a single well formed System Exclusive MIDI message to play at specified time. */ -MT32EMU_EXPORT mt32emu_return_code mt32emu_play_sysex_at(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len, mt32emu_bit32u timestamp); +MT32EMU_EXPORT mt32emu_return_code MT32EMU_C_CALL mt32emu_play_sysex_at(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len, mt32emu_bit32u timestamp); /* WARNING: * The methods below don't ensure minimum 1-sample delay between sequential MIDI events, @@ -274,66 +375,73 @@ MT32EMU_EXPORT mt32emu_return_code mt32emu_play_sysex_at(mt32emu_const_context c * Sends a short MIDI message to the synth for immediate playback. The message must contain a status byte. * See the WARNING above. */ -MT32EMU_EXPORT void mt32emu_play_msg_now(mt32emu_const_context context, mt32emu_bit32u msg); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_play_msg_now(mt32emu_const_context context, mt32emu_bit32u msg); /** * Sends unpacked short MIDI message to the synth for immediate playback. The message must contain a status byte. * See the WARNING above. */ -MT32EMU_EXPORT void mt32emu_play_msg_on_part(mt32emu_const_context context, mt32emu_bit8u part, mt32emu_bit8u code, mt32emu_bit8u note, mt32emu_bit8u velocity); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_play_msg_on_part(mt32emu_const_context context, mt32emu_bit8u part, mt32emu_bit8u code, mt32emu_bit8u note, mt32emu_bit8u velocity); /** * Sends a single well formed System Exclusive MIDI message for immediate processing. The length is in bytes. * See the WARNING above. */ -MT32EMU_EXPORT void mt32emu_play_sysex_now(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_play_sysex_now(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); /** * Sends inner body of a System Exclusive MIDI message for direct processing. The length is in bytes. * See the WARNING above. */ -MT32EMU_EXPORT void mt32emu_write_sysex(mt32emu_const_context context, mt32emu_bit8u channel, const mt32emu_bit8u *sysex, mt32emu_bit32u len); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_write_sysex(mt32emu_const_context context, mt32emu_bit8u channel, const mt32emu_bit8u *sysex, mt32emu_bit32u len); /** Allows to disable wet reverb output altogether. */ -MT32EMU_EXPORT void mt32emu_set_reverb_enabled(mt32emu_const_context context, const mt32emu_boolean reverb_enabled); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_reverb_enabled(mt32emu_const_context context, const mt32emu_boolean reverb_enabled); /** Returns whether wet reverb output is enabled. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_reverb_enabled(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_reverb_enabled(mt32emu_const_context context); /** * Sets override reverb mode. In this mode, emulation ignores sysexes (or the related part of them) which control the reverb parameters. * This mode is in effect until it is turned off. When the synth is re-opened, the override mode is unchanged but the state * of the reverb model is reset to default. */ -MT32EMU_EXPORT void mt32emu_set_reverb_overridden(mt32emu_const_context context, const mt32emu_boolean reverb_overridden); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_reverb_overridden(mt32emu_const_context context, const mt32emu_boolean reverb_overridden); /** Returns whether reverb settings are overridden. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_reverb_overridden(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_reverb_overridden(mt32emu_const_context context); /** * Forces reverb model compatibility mode. By default, the compatibility mode corresponds to the used control ROM version. * Invoking this method with the argument set to true forces emulation of old MT-32 reverb circuit. * When the argument is false, emulation of the reverb circuit used in new generation of MT-32 compatible modules is enforced * (these include CM-32L and LAPC-I). */ -MT32EMU_EXPORT void mt32emu_set_reverb_compatibility_mode(mt32emu_const_context context, const mt32emu_boolean mt32_compatible_mode); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_reverb_compatibility_mode(mt32emu_const_context context, const mt32emu_boolean mt32_compatible_mode); /** Returns whether reverb is in old MT-32 compatibility mode. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_mt32_reverb_compatibility_mode(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_mt32_reverb_compatibility_mode(mt32emu_const_context context); /** Returns whether default reverb compatibility mode is the old MT-32 compatibility mode. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_default_reverb_mt32_compatible(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_default_reverb_mt32_compatible(mt32emu_const_context context); + +/** + * If enabled, reverb buffers for all modes are kept around allocated all the time to avoid memory + * allocating/freeing in the rendering thread, which may be required for realtime operation. + * Otherwise, reverb buffers that are not in use are deleted to save memory (the default behaviour). + */ +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_preallocate_reverb_memory(mt32emu_const_context context, const mt32emu_boolean enabled); /** Sets new DAC input mode. See mt32emu_dac_input_mode for details. */ -MT32EMU_EXPORT void mt32emu_set_dac_input_mode(mt32emu_const_context context, const mt32emu_dac_input_mode mode); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_dac_input_mode(mt32emu_const_context context, const mt32emu_dac_input_mode mode); /** Returns current DAC input mode. See mt32emu_dac_input_mode for details. */ -MT32EMU_EXPORT mt32emu_dac_input_mode mt32emu_get_dac_input_mode(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_dac_input_mode MT32EMU_C_CALL mt32emu_get_dac_input_mode(mt32emu_const_context context); /** Sets new MIDI delay mode. See mt32emu_midi_delay_mode for details. */ -MT32EMU_EXPORT void mt32emu_set_midi_delay_mode(mt32emu_const_context context, const mt32emu_midi_delay_mode mode); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_midi_delay_mode(mt32emu_const_context context, const mt32emu_midi_delay_mode mode); /** Returns current MIDI delay mode. See mt32emu_midi_delay_mode for details. */ -MT32EMU_EXPORT mt32emu_midi_delay_mode mt32emu_get_midi_delay_mode(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_midi_delay_mode MT32EMU_C_CALL mt32emu_get_midi_delay_mode(mt32emu_const_context context); /** * Sets output gain factor for synth output channels. Applied to all output samples and unrelated with the synth's Master volume, * it rather corresponds to the gain of the output analog circuitry of the hardware units. However, together with mt32emu_set_reverb_output_gain() * it offers to the user a capability to control the gain of reverb and non-reverb output channels independently. */ -MT32EMU_EXPORT void mt32emu_set_output_gain(mt32emu_const_context context, float gain); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_output_gain(mt32emu_const_context context, float gain); /** Returns current output gain factor for synth output channels. */ -MT32EMU_EXPORT float mt32emu_get_output_gain(mt32emu_const_context context); +MT32EMU_EXPORT float MT32EMU_C_CALL mt32emu_get_output_gain(mt32emu_const_context context); /** * Sets output gain factor for the reverb wet output channels. It rather corresponds to the gain of the output @@ -345,14 +453,34 @@ MT32EMU_EXPORT float mt32emu_get_output_gain(mt32emu_const_context context); * there is a difference in the reverb analogue circuit, and the resulting output gain is 0.68 * of that for LA32 analogue output. This factor is applied to the reverb output gain. */ -MT32EMU_EXPORT void mt32emu_set_reverb_output_gain(mt32emu_const_context context, float gain); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_reverb_output_gain(mt32emu_const_context context, float gain); /** Returns current output gain factor for reverb wet output channels. */ -MT32EMU_EXPORT float mt32emu_get_reverb_output_gain(mt32emu_const_context context); +MT32EMU_EXPORT float MT32EMU_C_CALL mt32emu_get_reverb_output_gain(mt32emu_const_context context); + +/** + * Sets (or removes) an override for the current volume (output level) on a specific part. + * When the part volume is overridden, the MIDI controller Volume (7) on the MIDI channel this part is assigned to + * has no effect on the output level of this part. Similarly, the output level value set on this part via a SysEx that + * modifies the Patch temp structure is disregarded. + * To enable the override mode, argument volumeOverride should be in range 0..100, setting a value outside this range + * disables the previously set override, if any. + * Note: Setting volumeOverride to 0 mutes the part completely, meaning no sound is generated at all. + * This is unlike the behaviour of real devices - setting 0 volume on a part may leave it still producing + * sound at a very low level. + * Argument partNumber should be 0..7 for Part 1..8, or 8 for Rhythm. + */ +MT32EMU_EXPORT_V(2.6) void MT32EMU_C_CALL mt32emu_set_part_volume_override(mt32emu_const_context context, mt32emu_bit8u part_number, mt32emu_bit8u volume_override); +/** + * Returns the overridden volume previously set on a specific part; a value outside the range 0..100 means no override + * is currently in effect. + * Argument partNumber should be 0..7 for Part 1..8, or 8 for Rhythm. + */ +MT32EMU_EXPORT_V(2.6) mt32emu_bit8u MT32EMU_C_CALL mt32emu_get_part_volume_override(mt32emu_const_context context, mt32emu_bit8u part_number); /** Swaps left and right output channels. */ -MT32EMU_EXPORT void mt32emu_set_reversed_stereo_enabled(mt32emu_const_context context, const mt32emu_boolean enabled); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_reversed_stereo_enabled(mt32emu_const_context context, const mt32emu_boolean enabled); /** Returns whether left and right output channels are swapped. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_reversed_stereo_enabled(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_reversed_stereo_enabled(mt32emu_const_context context); /** * Allows to toggle the NiceAmpRamp mode. @@ -362,9 +490,36 @@ MT32EMU_EXPORT mt32emu_boolean mt32emu_is_reversed_stereo_enabled(mt32emu_const_ * We also prefer the quality improvement over the emulation accuracy, * so this mode is enabled by default. */ -MT32EMU_EXPORT void mt32emu_set_nice_amp_ramp_enabled(mt32emu_const_context context, const mt32emu_boolean enabled); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_nice_amp_ramp_enabled(mt32emu_const_context context, const mt32emu_boolean enabled); /** Returns whether NiceAmpRamp mode is enabled. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_nice_amp_ramp_enabled(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_nice_amp_ramp_enabled(mt32emu_const_context context); + +/** + * Allows to toggle the NicePanning mode. + * Despite the Roland's manual specifies allowed panpot values in range 0-14, + * the LA-32 only receives 3-bit pan setting in fact. In particular, this + * makes it impossible to set the "middle" panning for a single partial. + * In the NicePanning mode, we enlarge the pan setting accuracy to 4 bits + * making it smoother thus sacrificing the emulation accuracy. + * This mode is disabled by default. + */ +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_nice_panning_enabled(mt32emu_const_context context, const mt32emu_boolean enabled); +/** Returns whether NicePanning mode is enabled. */ +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_nice_panning_enabled(mt32emu_const_context context); + +/** + * Allows to toggle the NicePartialMixing mode. + * LA-32 is known to mix partials either in-phase (so that they are added) + * or in counter-phase (so that they are subtracted instead). + * In some cases, this quirk isn't highly desired because a pair of closely + * sounding partials may occasionally cancel out. + * In the NicePartialMixing mode, the mixing is always performed in-phase, + * thus making the behaviour more predictable. + * This mode is disabled by default. + */ +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_nice_partial_mixing_enabled(mt32emu_const_context context, const mt32emu_boolean enabled); +/** Returns whether NicePartialMixing mode is enabled. */ +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_nice_partial_mixing_enabled(mt32emu_const_context context); /** * Renders samples to the specified output stream as if they were sampled at the analog stereo output at the desired sample rate. @@ -372,9 +527,9 @@ MT32EMU_EXPORT mt32emu_boolean mt32emu_is_nice_amp_ramp_enabled(mt32emu_const_co * mode of analog circuitry emulation. See mt32emu_analog_output_mode. * The length is in frames, not bytes (in 16-bit stereo, one frame is 4 bytes). Uses NATIVE byte ordering. */ -MT32EMU_EXPORT void mt32emu_render_bit16s(mt32emu_const_context context, mt32emu_bit16s *stream, mt32emu_bit32u len); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_render_bit16s(mt32emu_const_context context, mt32emu_bit16s *stream, mt32emu_bit32u len); /** Same as above but outputs to a float stereo stream. */ -MT32EMU_EXPORT void mt32emu_render_float(mt32emu_const_context context, float *stream, mt32emu_bit32u len); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_render_float(mt32emu_const_context context, float *stream, mt32emu_bit32u len); /** * Renders samples to the specified output streams as if they appeared at the DAC entrance. @@ -382,25 +537,25 @@ MT32EMU_EXPORT void mt32emu_render_float(mt32emu_const_context context, float *s * NULL may be specified in place of any or all of the stream buffers to skip it. * The length is in samples, not bytes. Uses NATIVE byte ordering. */ -MT32EMU_EXPORT void mt32emu_render_bit16s_streams(mt32emu_const_context context, const mt32emu_dac_output_bit16s_streams *streams, mt32emu_bit32u len); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_render_bit16s_streams(mt32emu_const_context context, const mt32emu_dac_output_bit16s_streams *streams, mt32emu_bit32u len); /** Same as above but outputs to float streams. */ -MT32EMU_EXPORT void mt32emu_render_float_streams(mt32emu_const_context context, const mt32emu_dac_output_float_streams *streams, mt32emu_bit32u len); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_render_float_streams(mt32emu_const_context context, const mt32emu_dac_output_float_streams *streams, mt32emu_bit32u len); /** Returns true when there is at least one active partial, otherwise false. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_has_active_partials(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_has_active_partials(mt32emu_const_context context); /** Returns true if mt32emu_has_active_partials() returns true, or reverb is (somewhat unreliably) detected as being active. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_active(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_active(mt32emu_const_context context); /** Returns the maximum number of partials playing simultaneously. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_partial_count(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_partial_count(mt32emu_const_context context); /** * Returns current states of all the parts as a bit set. The least significant bit corresponds to the state of part 1, * total of 9 bits hold the states of all the parts. If the returned bit for a part is set, there is at least one active * non-releasing partial playing on this part. This info is useful in emulating behaviour of LCD display of the hardware units. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_part_states(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_part_states(mt32emu_const_context context); /** * Fills in current states of all the partials into the array provided. Each byte in the array holds states of 4 partials @@ -408,7 +563,7 @@ MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_part_states(mt32emu_const_context cont * The array must be large enough to accommodate states of all the partials. * @see getPartialCount() */ -MT32EMU_EXPORT void mt32emu_get_partial_states(mt32emu_const_context context, mt32emu_bit8u *partial_states); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_get_partial_states(mt32emu_const_context context, mt32emu_bit8u *partial_states); /** * Fills in information about currently playing notes on the specified part into the arrays provided. The arrays must be large enough @@ -416,16 +571,71 @@ MT32EMU_EXPORT void mt32emu_get_partial_states(mt32emu_const_context context, mt * Argument partNumber should be 0..7 for Part 1..8, or 8 for Rhythm. * Returns the number of currently playing notes on the specified part. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_playing_notes(mt32emu_const_context context, mt32emu_bit8u part_number, mt32emu_bit8u *keys, mt32emu_bit8u *velocities); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_playing_notes(mt32emu_const_context context, mt32emu_bit8u part_number, mt32emu_bit8u *keys, mt32emu_bit8u *velocities); /** * Returns name of the patch set on the specified part. * Argument partNumber should be 0..7 for Part 1..8, or 8 for Rhythm. + * The returned value is a null-terminated string which is guaranteed to remain valid until the next call to one of functions + * that perform sample rendering or immediate SysEx processing (e.g. mt32emu_play_sysex_now). */ -MT32EMU_EXPORT const char *mt32emu_get_patch_name(mt32emu_const_context context, mt32emu_bit8u part_number); +MT32EMU_EXPORT const char * MT32EMU_C_CALL mt32emu_get_patch_name(mt32emu_const_context context, mt32emu_bit8u part_number); + +/** + * Retrieves the name of the sound group the timbre identified by arguments timbre_group and timbre_number is associated with. + * Values 0-3 of timbre_group correspond to the timbre banks GROUP A, GROUP B, MEMORY and RHYTHM. + * For all but the RHYTHM timbre bank, allowed values of timbre_number are in range 0-63. The number of timbres + * contained in the RHYTHM bank depends on the used control ROM version. + * The argument sound_group_name must point to an array of at least 8 characters. The result is a null-terminated string. + * Returns whether the specified timbre has been found and the result written in sound_group_name. + */ +MT32EMU_EXPORT_V(2.7) mt32emu_boolean MT32EMU_C_CALL mt32emu_get_sound_group_name(mt32emu_const_context context, char *sound_group_name, mt32emu_bit8u timbre_group, mt32emu_bit8u timbre_number); +/** + * Retrieves the name of the timbre identified by arguments timbre_group and timbre_number. + * Values 0-3 of timbre_group correspond to the timbre banks GROUP A, GROUP B, MEMORY and RHYTHM. + * For all but the RHYTHM timbre bank, allowed values of timbre_number are in range 0-63. The number of timbres + * contained in the RHYTHM bank depends on the used control ROM version. + * The argument sound_name must point to an array of at least 11 characters. The result is a null-terminated string. + * Returns whether the specified timbre has been found and the result written in sound_name. + */ +MT32EMU_EXPORT_V(2.7) mt32emu_boolean MT32EMU_C_CALL mt32emu_get_sound_name(mt32emu_const_context context, char *sound_name, mt32emu_bit8u timbreGroup, mt32emu_bit8u timbreNumber); /** Stores internal state of emulated synth into an array provided (as it would be acquired from hardware). */ -MT32EMU_EXPORT void mt32emu_read_memory(mt32emu_const_context context, mt32emu_bit32u addr, mt32emu_bit32u len, mt32emu_bit8u *data); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_read_memory(mt32emu_const_context context, mt32emu_bit32u addr, mt32emu_bit32u len, mt32emu_bit8u *data); + +/** + * Retrieves the current state of the emulated MT-32 display facilities. + * Typically, the state is updated during the rendering. When that happens, a related callback from mt32emu_report_handler_i_v1 + * is invoked. However, there might be no need to invoke this method after each update, e.g. when the render buffer is just + * a few milliseconds long. + * The argument target_buffer must point to an array of at least 21 characters. The result is a null-terminated string. + * The argument narrow_lcd enables a condensed representation of the displayed information in some cases. This is mainly intended + * to route the result to a hardware LCD that is only 16 characters wide. Automatic scrolling of longer strings is not supported. + * Returns whether the MIDI MESSAGE LED is ON and fills the target_buffer parameter. + */ +MT32EMU_EXPORT_V(2.6) mt32emu_boolean MT32EMU_C_CALL mt32emu_get_display_state(mt32emu_const_context context, char *target_buffer, const mt32emu_boolean narrow_lcd); + +/** + * Resets the emulated LCD to the main mode (Master Volume). This has the same effect as pressing the Master Volume button + * while the display shows some other message. Useful for the new-gen devices as those require a special Display Reset SysEx + * to return to the main mode e.g. from showing a custom display message or a checksum error. + */ +MT32EMU_EXPORT_V(2.6) void MT32EMU_C_CALL mt32emu_set_main_display_mode(mt32emu_const_context context); + +/** + * Permits to select an arbitrary display emulation model that does not necessarily match the actual behaviour implemented + * in the control ROM version being used. + * Invoking this method with the argument set to true forces emulation of the old-gen MT-32 display features. + * Otherwise, emulation of the new-gen devices is enforced (these include CM-32L and LAPC-I as if these were connected to an LCD). + */ +MT32EMU_EXPORT_V(2.6) void MT32EMU_C_CALL mt32emu_set_display_compatibility(mt32emu_const_context context, mt32emu_boolean old_mt32_compatibility_enabled); +/** Returns whether the currently configured features of the emulated display are compatible with the old-gen MT-32 devices. */ +MT32EMU_EXPORT_V(2.6) mt32emu_boolean MT32EMU_C_CALL mt32emu_is_display_old_mt32_compatible(mt32emu_const_context context); +/** + * Returns whether the emulated display features configured by default depending on the actual control ROM version + * are compatible with the old-gen MT-32 devices. + */ +MT32EMU_EXPORT_V(2.6) mt32emu_boolean MT32EMU_C_CALL mt32emu_is_default_display_old_mt32_compatible(mt32emu_const_context context); #ifdef __cplusplus } // extern "C" diff --git a/src/include/mt32emu/c_interface/c_types.h b/src/include/mt32emu/c_interface/c_types.h index db612e282..8928bfeae 100644 --- a/src/include/mt32emu/c_interface/c_types.h +++ b/src/include/mt32emu/c_interface/c_types.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2017 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -27,6 +27,12 @@ #include "../Enumerations.h" #undef MT32EMU_C_ENUMERATIONS +#ifdef _WIN32 +# define MT32EMU_C_CALL __cdecl +#else +# define MT32EMU_C_CALL +#endif + typedef unsigned int mt32emu_bit32u; typedef signed int mt32emu_bit32s; typedef unsigned short int mt32emu_bit16u; @@ -45,6 +51,8 @@ typedef enum { MT32EMU_RC_OK = 0, MT32EMU_RC_ADDED_CONTROL_ROM = 1, MT32EMU_RC_ADDED_PCM_ROM = 2, + MT32EMU_RC_ADDED_PARTIAL_CONTROL_ROM = 3, + MT32EMU_RC_ADDED_PARTIAL_PCM_ROM = 4, /* Definite error occurred. */ MT32EMU_RC_ROM_NOT_IDENTIFIED = -1, @@ -53,6 +61,8 @@ typedef enum { MT32EMU_RC_MISSING_ROMS = -4, MT32EMU_RC_NOT_OPENED = -5, MT32EMU_RC_QUEUE_FULL = -6, + MT32EMU_RC_ROMS_NOT_PAIRABLE = -7, + MT32EMU_RC_MACHINE_NOT_IDENTIFIED = -8, /* Undefined error occurred. */ MT32EMU_RC_FAILED = -100 @@ -107,7 +117,8 @@ typedef struct { /** Report handler interface versions */ typedef enum { MT32EMU_REPORT_HANDLER_VERSION_0 = 0, - MT32EMU_REPORT_HANDLER_VERSION_CURRENT = MT32EMU_REPORT_HANDLER_VERSION_0 + MT32EMU_REPORT_HANDLER_VERSION_1 = 1, + MT32EMU_REPORT_HANDLER_VERSION_CURRENT = MT32EMU_REPORT_HANDLER_VERSION_1 } mt32emu_report_handler_version; /** MIDI receiver interface versions */ @@ -121,7 +132,11 @@ typedef enum { MT32EMU_SERVICE_VERSION_0 = 0, MT32EMU_SERVICE_VERSION_1 = 1, MT32EMU_SERVICE_VERSION_2 = 2, - MT32EMU_SERVICE_VERSION_CURRENT = MT32EMU_SERVICE_VERSION_2 + MT32EMU_SERVICE_VERSION_3 = 3, + MT32EMU_SERVICE_VERSION_4 = 4, + MT32EMU_SERVICE_VERSION_5 = 5, + MT32EMU_SERVICE_VERSION_6 = 6, + MT32EMU_SERVICE_VERSION_CURRENT = MT32EMU_SERVICE_VERSION_6 } mt32emu_service_version; /* === Report Handler Interface === */ @@ -129,42 +144,59 @@ typedef enum { typedef union mt32emu_report_handler_i mt32emu_report_handler_i; /** Interface for handling reported events (initial version) */ -typedef struct { - /** Returns the actual interface version ID */ - mt32emu_report_handler_version (*getVersionID)(mt32emu_report_handler_i i); - - /** Callback for debug messages, in vprintf() format */ - void (*printDebug)(void *instance_data, const char *fmt, va_list list); - /** Callbacks for reporting errors */ - void (*onErrorControlROM)(void *instance_data); - void (*onErrorPCMROM)(void *instance_data); - /** Callback for reporting about displaying a new custom message on LCD */ - void (*showLCDMessage)(void *instance_data, const char *message); - /** Callback for reporting actual processing of a MIDI message */ - void (*onMIDIMessagePlayed)(void *instance_data); +#define MT32EMU_REPORT_HANDLER_I_V0 \ + /** Returns the actual interface version ID */ \ + mt32emu_report_handler_version (MT32EMU_C_CALL *getVersionID)(mt32emu_report_handler_i i); \ +\ + /** Callback for debug messages, in vprintf() format */ \ + void (MT32EMU_C_CALL *printDebug)(void *instance_data, const char *fmt, va_list list); \ + /** Callbacks for reporting errors */ \ + void (MT32EMU_C_CALL *onErrorControlROM)(void *instance_data); \ + void (MT32EMU_C_CALL *onErrorPCMROM)(void *instance_data); \ + /** Callback for reporting about displaying a new custom message on LCD */ \ + void (MT32EMU_C_CALL *showLCDMessage)(void *instance_data, const char *message); \ + /** Callback for reporting actual processing of a MIDI message */ \ + void (MT32EMU_C_CALL *onMIDIMessagePlayed)(void *instance_data); \ /** * Callback for reporting an overflow of the input MIDI queue. * Returns MT32EMU_BOOL_TRUE if a recovery action was taken * and yet another attempt to enqueue the MIDI event is desired. - */ - mt32emu_boolean (*onMIDIQueueOverflow)(void *instance_data); + */ \ + mt32emu_boolean (MT32EMU_C_CALL *onMIDIQueueOverflow)(void *instance_data); \ /** * Callback invoked when a System Realtime MIDI message is detected in functions * mt32emu_parse_stream and mt32emu_play_short_message and the likes. - */ - void (*onMIDISystemRealtime)(void *instance_data, mt32emu_bit8u system_realtime); - /** Callbacks for reporting system events */ - void (*onDeviceReset)(void *instance_data); - void (*onDeviceReconfig)(void *instance_data); - /** Callbacks for reporting changes of reverb settings */ - void (*onNewReverbMode)(void *instance_data, mt32emu_bit8u mode); - void (*onNewReverbTime)(void *instance_data, mt32emu_bit8u time); - void (*onNewReverbLevel)(void *instance_data, mt32emu_bit8u level); - /** Callbacks for reporting various information */ - void (*onPolyStateChanged)(void *instance_data, mt32emu_bit8u part_num); - void (*onProgramChanged)(void *instance_data, mt32emu_bit8u part_num, const char *sound_group_name, const char *patch_name); + */ \ + void (MT32EMU_C_CALL *onMIDISystemRealtime)(void *instance_data, mt32emu_bit8u system_realtime); \ + /** Callbacks for reporting system events */ \ + void (MT32EMU_C_CALL *onDeviceReset)(void *instance_data); \ + void (MT32EMU_C_CALL *onDeviceReconfig)(void *instance_data); \ + /** Callbacks for reporting changes of reverb settings */ \ + void (MT32EMU_C_CALL *onNewReverbMode)(void *instance_data, mt32emu_bit8u mode); \ + void (MT32EMU_C_CALL *onNewReverbTime)(void *instance_data, mt32emu_bit8u time); \ + void (MT32EMU_C_CALL *onNewReverbLevel)(void *instance_data, mt32emu_bit8u level); \ + /** Callbacks for reporting various information */ \ + void (MT32EMU_C_CALL *onPolyStateChanged)(void *instance_data, mt32emu_bit8u part_num); \ + void (MT32EMU_C_CALL *onProgramChanged)(void *instance_data, mt32emu_bit8u part_num, const char *sound_group_name, const char *patch_name); + +#define MT32EMU_REPORT_HANDLER_I_V1 \ + /** + * Invoked to signal about a change of the emulated LCD state. Use mt32emu_get_display_state to retrieve the actual data. + * This callback will not be invoked on further changes, until the client retrieves the LCD state. + */ \ + void (MT32EMU_C_CALL *onLCDStateUpdated)(void *instance_data); \ + /** Invoked when the emulated MIDI MESSAGE LED changes state. The led_state parameter represents whether the LED is ON. */ \ + void (MT32EMU_C_CALL *onMidiMessageLEDStateUpdated)(void *instance_data, mt32emu_boolean led_state); + +typedef struct { + MT32EMU_REPORT_HANDLER_I_V0 } mt32emu_report_handler_i_v0; +typedef struct { + MT32EMU_REPORT_HANDLER_I_V0 + MT32EMU_REPORT_HANDLER_I_V1 +} mt32emu_report_handler_i_v1; + /** * Extensible interface for handling reported events. * Union intended to view an interface of any subsequent version as any parent interface not requiring a cast. @@ -172,8 +204,12 @@ typedef struct { */ union mt32emu_report_handler_i { const mt32emu_report_handler_i_v0 *v0; + const mt32emu_report_handler_i_v1 *v1; }; +#undef MT32EMU_REPORT_HANDLER_I_V0 +#undef MT32EMU_REPORT_HANDLER_I_V1 + /* === MIDI Receiver Interface === */ typedef union mt32emu_midi_receiver_i mt32emu_midi_receiver_i; @@ -181,16 +217,16 @@ typedef union mt32emu_midi_receiver_i mt32emu_midi_receiver_i; /** Interface for receiving MIDI messages generated by MIDI stream parser (initial version) */ typedef struct { /** Returns the actual interface version ID */ - mt32emu_midi_receiver_version (*getVersionID)(mt32emu_midi_receiver_i i); + mt32emu_midi_receiver_version (MT32EMU_C_CALL *getVersionID)(mt32emu_midi_receiver_i i); /** Invoked when a complete short MIDI message is parsed in the input MIDI stream. */ - void (*handleShortMessage)(void *instance_data, const mt32emu_bit32u message); + void (MT32EMU_C_CALL *handleShortMessage)(void *instance_data, const mt32emu_bit32u message); /** Invoked when a complete well-formed System Exclusive MIDI message is parsed in the input MIDI stream. */ - void (*handleSysex)(void *instance_data, const mt32emu_bit8u stream[], const mt32emu_bit32u length); + void (MT32EMU_C_CALL *handleSysex)(void *instance_data, const mt32emu_bit8u stream[], const mt32emu_bit32u length); /** Invoked when a System Realtime MIDI message is parsed in the input MIDI stream. */ - void (*handleSystemRealtimeMessage)(void *instance_data, const mt32emu_bit8u realtime); + void (MT32EMU_C_CALL *handleSystemRealtimeMessage)(void *instance_data, const mt32emu_bit8u realtime); } mt32emu_midi_receiver_i_v0; /** @@ -215,93 +251,124 @@ typedef union mt32emu_service_i mt32emu_service_i; */ #define MT32EMU_SERVICE_I_V0 \ /** Returns the actual interface version ID */ \ - mt32emu_service_version (*getVersionID)(mt32emu_service_i i); \ - mt32emu_report_handler_version (*getSupportedReportHandlerVersionID)(); \ - mt32emu_midi_receiver_version (*getSupportedMIDIReceiverVersionID)(); \ + mt32emu_service_version (MT32EMU_C_CALL *getVersionID)(mt32emu_service_i i); \ + mt32emu_report_handler_version (MT32EMU_C_CALL *getSupportedReportHandlerVersionID)(void); \ + mt32emu_midi_receiver_version (MT32EMU_C_CALL *getSupportedMIDIReceiverVersionID)(void); \ \ - mt32emu_bit32u (*getLibraryVersionInt)(); \ - const char *(*getLibraryVersionString)(); \ + mt32emu_bit32u (MT32EMU_C_CALL *getLibraryVersionInt)(void); \ + const char *(MT32EMU_C_CALL *getLibraryVersionString)(void); \ \ - mt32emu_bit32u (*getStereoOutputSamplerate)(const mt32emu_analog_output_mode analog_output_mode); \ + mt32emu_bit32u (MT32EMU_C_CALL *getStereoOutputSamplerate)(const mt32emu_analog_output_mode analog_output_mode); \ \ - mt32emu_context (*createContext)(mt32emu_report_handler_i report_handler, void *instance_data); \ - void (*freeContext)(mt32emu_context context); \ - mt32emu_return_code (*addROMData)(mt32emu_context context, const mt32emu_bit8u *data, size_t data_size, const mt32emu_sha1_digest *sha1_digest); \ - mt32emu_return_code (*addROMFile)(mt32emu_context context, const char *filename); \ - void (*getROMInfo)(mt32emu_const_context context, mt32emu_rom_info *rom_info); \ - void (*setPartialCount)(mt32emu_context context, const mt32emu_bit32u partial_count); \ - void (*setAnalogOutputMode)(mt32emu_context context, const mt32emu_analog_output_mode analog_output_mode); \ - mt32emu_return_code (*openSynth)(mt32emu_const_context context); \ - void (*closeSynth)(mt32emu_const_context context); \ - mt32emu_boolean (*isOpen)(mt32emu_const_context context); \ - mt32emu_bit32u (*getActualStereoOutputSamplerate)(mt32emu_const_context context); \ - void (*flushMIDIQueue)(mt32emu_const_context context); \ - mt32emu_bit32u (*setMIDIEventQueueSize)(mt32emu_const_context context, const mt32emu_bit32u queue_size); \ - void (*setMIDIReceiver)(mt32emu_context context, mt32emu_midi_receiver_i midi_receiver, void *instance_data); \ + mt32emu_context (MT32EMU_C_CALL *createContext)(mt32emu_report_handler_i report_handler, void *instance_data); \ + void (MT32EMU_C_CALL *freeContext)(mt32emu_context context); \ + mt32emu_return_code (MT32EMU_C_CALL *addROMData)(mt32emu_context context, const mt32emu_bit8u *data, size_t data_size, const mt32emu_sha1_digest *sha1_digest); \ + mt32emu_return_code (MT32EMU_C_CALL *addROMFile)(mt32emu_context context, const char *filename); \ + void (MT32EMU_C_CALL *getROMInfo)(mt32emu_const_context context, mt32emu_rom_info *rom_info); \ + void (MT32EMU_C_CALL *setPartialCount)(mt32emu_context context, const mt32emu_bit32u partial_count); \ + void (MT32EMU_C_CALL *setAnalogOutputMode)(mt32emu_context context, const mt32emu_analog_output_mode analog_output_mode); \ + mt32emu_return_code (MT32EMU_C_CALL *openSynth)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *closeSynth)(mt32emu_const_context context); \ + mt32emu_boolean (MT32EMU_C_CALL *isOpen)(mt32emu_const_context context); \ + mt32emu_bit32u (MT32EMU_C_CALL *getActualStereoOutputSamplerate)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *flushMIDIQueue)(mt32emu_const_context context); \ + mt32emu_bit32u (MT32EMU_C_CALL *setMIDIEventQueueSize)(mt32emu_const_context context, const mt32emu_bit32u queue_size); \ + void (MT32EMU_C_CALL *setMIDIReceiver)(mt32emu_context context, mt32emu_midi_receiver_i midi_receiver, void *instance_data); \ \ - void (*parseStream)(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length); \ - void (*parseStream_At)(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length, mt32emu_bit32u timestamp); \ - void (*playShortMessage)(mt32emu_const_context context, mt32emu_bit32u message); \ - void (*playShortMessageAt)(mt32emu_const_context context, mt32emu_bit32u message, mt32emu_bit32u timestamp); \ - mt32emu_return_code (*playMsg)(mt32emu_const_context context, mt32emu_bit32u msg); \ - mt32emu_return_code (*playSysex)(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); \ - mt32emu_return_code (*playMsgAt)(mt32emu_const_context context, mt32emu_bit32u msg, mt32emu_bit32u timestamp); \ - mt32emu_return_code (*playSysexAt)(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len, mt32emu_bit32u timestamp); \ + void (MT32EMU_C_CALL *parseStream)(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length); \ + void (MT32EMU_C_CALL *parseStream_At)(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length, mt32emu_bit32u timestamp); \ + void (MT32EMU_C_CALL *playShortMessage)(mt32emu_const_context context, mt32emu_bit32u message); \ + void (MT32EMU_C_CALL *playShortMessageAt)(mt32emu_const_context context, mt32emu_bit32u message, mt32emu_bit32u timestamp); \ + mt32emu_return_code (MT32EMU_C_CALL *playMsg)(mt32emu_const_context context, mt32emu_bit32u msg); \ + mt32emu_return_code (MT32EMU_C_CALL *playSysex)(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); \ + mt32emu_return_code (MT32EMU_C_CALL *playMsgAt)(mt32emu_const_context context, mt32emu_bit32u msg, mt32emu_bit32u timestamp); \ + mt32emu_return_code (MT32EMU_C_CALL *playSysexAt)(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len, mt32emu_bit32u timestamp); \ \ - void (*playMsgNow)(mt32emu_const_context context, mt32emu_bit32u msg); \ - void (*playMsgOnPart)(mt32emu_const_context context, mt32emu_bit8u part, mt32emu_bit8u code, mt32emu_bit8u note, mt32emu_bit8u velocity); \ - void (*playSysexNow)(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); \ - void (*writeSysex)(mt32emu_const_context context, mt32emu_bit8u channel, const mt32emu_bit8u *sysex, mt32emu_bit32u len); \ + void (MT32EMU_C_CALL *playMsgNow)(mt32emu_const_context context, mt32emu_bit32u msg); \ + void (MT32EMU_C_CALL *playMsgOnPart)(mt32emu_const_context context, mt32emu_bit8u part, mt32emu_bit8u code, mt32emu_bit8u note, mt32emu_bit8u velocity); \ + void (MT32EMU_C_CALL *playSysexNow)(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); \ + void (MT32EMU_C_CALL *writeSysex)(mt32emu_const_context context, mt32emu_bit8u channel, const mt32emu_bit8u *sysex, mt32emu_bit32u len); \ \ - void (*setReverbEnabled)(mt32emu_const_context context, const mt32emu_boolean reverb_enabled); \ - mt32emu_boolean (*isReverbEnabled)(mt32emu_const_context context); \ - void (*setReverbOverridden)(mt32emu_const_context context, const mt32emu_boolean reverb_overridden); \ - mt32emu_boolean (*isReverbOverridden)(mt32emu_const_context context); \ - void (*setReverbCompatibilityMode)(mt32emu_const_context context, const mt32emu_boolean mt32_compatible_mode); \ - mt32emu_boolean (*isMT32ReverbCompatibilityMode)(mt32emu_const_context context); \ - mt32emu_boolean (*isDefaultReverbMT32Compatible)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setReverbEnabled)(mt32emu_const_context context, const mt32emu_boolean reverb_enabled); \ + mt32emu_boolean (MT32EMU_C_CALL *isReverbEnabled)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setReverbOverridden)(mt32emu_const_context context, const mt32emu_boolean reverb_overridden); \ + mt32emu_boolean (MT32EMU_C_CALL *isReverbOverridden)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setReverbCompatibilityMode)(mt32emu_const_context context, const mt32emu_boolean mt32_compatible_mode); \ + mt32emu_boolean (MT32EMU_C_CALL *isMT32ReverbCompatibilityMode)(mt32emu_const_context context); \ + mt32emu_boolean (MT32EMU_C_CALL *isDefaultReverbMT32Compatible)(mt32emu_const_context context); \ \ - void (*setDACInputMode)(mt32emu_const_context context, const mt32emu_dac_input_mode mode); \ - mt32emu_dac_input_mode (*getDACInputMode)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setDACInputMode)(mt32emu_const_context context, const mt32emu_dac_input_mode mode); \ + mt32emu_dac_input_mode (MT32EMU_C_CALL *getDACInputMode)(mt32emu_const_context context); \ \ - void (*setMIDIDelayMode)(mt32emu_const_context context, const mt32emu_midi_delay_mode mode); \ - mt32emu_midi_delay_mode (*getMIDIDelayMode)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setMIDIDelayMode)(mt32emu_const_context context, const mt32emu_midi_delay_mode mode); \ + mt32emu_midi_delay_mode (MT32EMU_C_CALL *getMIDIDelayMode)(mt32emu_const_context context); \ \ - void (*setOutputGain)(mt32emu_const_context context, float gain); \ - float (*getOutputGain)(mt32emu_const_context context); \ - void (*setReverbOutputGain)(mt32emu_const_context context, float gain); \ - float (*getReverbOutputGain)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setOutputGain)(mt32emu_const_context context, float gain); \ + float (MT32EMU_C_CALL *getOutputGain)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setReverbOutputGain)(mt32emu_const_context context, float gain); \ + float (MT32EMU_C_CALL *getReverbOutputGain)(mt32emu_const_context context); \ \ - void (*setReversedStereoEnabled)(mt32emu_const_context context, const mt32emu_boolean enabled); \ - mt32emu_boolean (*isReversedStereoEnabled)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setReversedStereoEnabled)(mt32emu_const_context context, const mt32emu_boolean enabled); \ + mt32emu_boolean (MT32EMU_C_CALL *isReversedStereoEnabled)(mt32emu_const_context context); \ \ - void (*renderBit16s)(mt32emu_const_context context, mt32emu_bit16s *stream, mt32emu_bit32u len); \ - void (*renderFloat)(mt32emu_const_context context, float *stream, mt32emu_bit32u len); \ - void (*renderBit16sStreams)(mt32emu_const_context context, const mt32emu_dac_output_bit16s_streams *streams, mt32emu_bit32u len); \ - void (*renderFloatStreams)(mt32emu_const_context context, const mt32emu_dac_output_float_streams *streams, mt32emu_bit32u len); \ + void (MT32EMU_C_CALL *renderBit16s)(mt32emu_const_context context, mt32emu_bit16s *stream, mt32emu_bit32u len); \ + void (MT32EMU_C_CALL *renderFloat)(mt32emu_const_context context, float *stream, mt32emu_bit32u len); \ + void (MT32EMU_C_CALL *renderBit16sStreams)(mt32emu_const_context context, const mt32emu_dac_output_bit16s_streams *streams, mt32emu_bit32u len); \ + void (MT32EMU_C_CALL *renderFloatStreams)(mt32emu_const_context context, const mt32emu_dac_output_float_streams *streams, mt32emu_bit32u len); \ \ - mt32emu_boolean (*hasActivePartials)(mt32emu_const_context context); \ - mt32emu_boolean (*isActive)(mt32emu_const_context context); \ - mt32emu_bit32u (*getPartialCount)(mt32emu_const_context context); \ - mt32emu_bit32u (*getPartStates)(mt32emu_const_context context); \ - void (*getPartialStates)(mt32emu_const_context context, mt32emu_bit8u *partial_states); \ - mt32emu_bit32u (*getPlayingNotes)(mt32emu_const_context context, mt32emu_bit8u part_number, mt32emu_bit8u *keys, mt32emu_bit8u *velocities); \ - const char *(*getPatchName)(mt32emu_const_context context, mt32emu_bit8u part_number); \ - void (*readMemory)(mt32emu_const_context context, mt32emu_bit32u addr, mt32emu_bit32u len, mt32emu_bit8u *data); + mt32emu_boolean (MT32EMU_C_CALL *hasActivePartials)(mt32emu_const_context context); \ + mt32emu_boolean (MT32EMU_C_CALL *isActive)(mt32emu_const_context context); \ + mt32emu_bit32u (MT32EMU_C_CALL *getPartialCount)(mt32emu_const_context context); \ + mt32emu_bit32u (MT32EMU_C_CALL *getPartStates)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *getPartialStates)(mt32emu_const_context context, mt32emu_bit8u *partial_states); \ + mt32emu_bit32u (MT32EMU_C_CALL *getPlayingNotes)(mt32emu_const_context context, mt32emu_bit8u part_number, mt32emu_bit8u *keys, mt32emu_bit8u *velocities); \ + const char *(MT32EMU_C_CALL *getPatchName)(mt32emu_const_context context, mt32emu_bit8u part_number); \ + void (MT32EMU_C_CALL *readMemory)(mt32emu_const_context context, mt32emu_bit32u addr, mt32emu_bit32u len, mt32emu_bit8u *data); #define MT32EMU_SERVICE_I_V1 \ - mt32emu_analog_output_mode (*getBestAnalogOutputMode)(const double target_samplerate); \ - void (*setStereoOutputSampleRate)(mt32emu_context context, const double samplerate); \ - void (*setSamplerateConversionQuality)(mt32emu_context context, const mt32emu_samplerate_conversion_quality quality); \ - void (*selectRendererType)(mt32emu_context context, mt32emu_renderer_type renderer_type); \ - mt32emu_renderer_type (*getSelectedRendererType)(mt32emu_context context); \ - mt32emu_bit32u (*convertOutputToSynthTimestamp)(mt32emu_const_context context, mt32emu_bit32u output_timestamp); \ - mt32emu_bit32u (*convertSynthToOutputTimestamp)(mt32emu_const_context context, mt32emu_bit32u synth_timestamp); + mt32emu_analog_output_mode (MT32EMU_C_CALL *getBestAnalogOutputMode)(const double target_samplerate); \ + void (MT32EMU_C_CALL *setStereoOutputSampleRate)(mt32emu_context context, const double samplerate); \ + void (MT32EMU_C_CALL *setSamplerateConversionQuality)(mt32emu_context context, const mt32emu_samplerate_conversion_quality quality); \ + void (MT32EMU_C_CALL *selectRendererType)(mt32emu_context context, mt32emu_renderer_type renderer_type); \ + mt32emu_renderer_type (MT32EMU_C_CALL *getSelectedRendererType)(mt32emu_context context); \ + mt32emu_bit32u (MT32EMU_C_CALL *convertOutputToSynthTimestamp)(mt32emu_const_context context, mt32emu_bit32u output_timestamp); \ + mt32emu_bit32u (MT32EMU_C_CALL *convertSynthToOutputTimestamp)(mt32emu_const_context context, mt32emu_bit32u synth_timestamp); #define MT32EMU_SERVICE_I_V2 \ - mt32emu_bit32u (*getInternalRenderedSampleCount)(mt32emu_const_context context); \ - void (*setNiceAmpRampEnabled)(mt32emu_const_context context, const mt32emu_boolean enabled); \ - mt32emu_boolean (*isNiceAmpRampEnabled)(mt32emu_const_context context); + mt32emu_bit32u (MT32EMU_C_CALL *getInternalRenderedSampleCount)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setNiceAmpRampEnabled)(mt32emu_const_context context, const mt32emu_boolean enabled); \ + mt32emu_boolean (MT32EMU_C_CALL *isNiceAmpRampEnabled)(mt32emu_const_context context); + +#define MT32EMU_SERVICE_I_V3 \ + void (MT32EMU_C_CALL *setNicePanningEnabled)(mt32emu_const_context context, const mt32emu_boolean enabled); \ + mt32emu_boolean (MT32EMU_C_CALL *isNicePanningEnabled)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setNicePartialMixingEnabled)(mt32emu_const_context context, const mt32emu_boolean enabled); \ + mt32emu_boolean (MT32EMU_C_CALL *isNicePartialMixingEnabled)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *preallocateReverbMemory)(mt32emu_const_context context, const mt32emu_boolean enabled); \ + void (MT32EMU_C_CALL *configureMIDIEventQueueSysexStorage)(mt32emu_const_context context, const mt32emu_bit32u storage_buffer_size); + +#define MT32EMU_SERVICE_I_V4 \ + size_t (MT32EMU_C_CALL *getMachineIDs)(const char **machine_ids, size_t machine_ids_size); \ + size_t (MT32EMU_C_CALL *getROMIDs)(const char **rom_ids, size_t rom_ids_size, const char *machine_id); \ + mt32emu_return_code (MT32EMU_C_CALL *identifyROMData)(mt32emu_rom_info *rom_info, const mt32emu_bit8u *data, size_t data_size, const char *machine_id); \ + mt32emu_return_code (MT32EMU_C_CALL *identifyROMFile)(mt32emu_rom_info *rom_info, const char *filename, const char *machine_id); \ +\ + mt32emu_return_code (MT32EMU_C_CALL *mergeAndAddROMData)(mt32emu_context context, const mt32emu_bit8u *part1_data, size_t part1_data_size, const mt32emu_sha1_digest *part1_sha1_digest, const mt32emu_bit8u *part2_data, size_t part2_data_size, const mt32emu_sha1_digest *part2_sha1_digest); \ + mt32emu_return_code (MT32EMU_C_CALL *mergeAndAddROMFiles)(mt32emu_context context, const char *part1_filename, const char *part2_filename); \ + mt32emu_return_code (MT32EMU_C_CALL *addMachineROMFile)(mt32emu_context context, const char *machine_id, const char *filename); + +#define MT32EMU_SERVICE_I_V5 \ + mt32emu_boolean (MT32EMU_C_CALL *getDisplayState)(mt32emu_const_context context, char *target_buffer, const mt32emu_boolean narrow_lcd); \ + void (MT32EMU_C_CALL *setMainDisplayMode)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setDisplayCompatibility)(mt32emu_const_context context, mt32emu_boolean old_mt32_compatibility_enabled); \ + mt32emu_boolean (MT32EMU_C_CALL *isDisplayOldMT32Compatible)(mt32emu_const_context context); \ + mt32emu_boolean (MT32EMU_C_CALL *isDefaultDisplayOldMT32Compatible)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setPartVolumeOverride)(mt32emu_const_context context, mt32emu_bit8u part_number, mt32emu_bit8u volume_override); \ + mt32emu_bit8u (MT32EMU_C_CALL *getPartVolumeOverride)(mt32emu_const_context context, mt32emu_bit8u part_number); + +#define MT32EMU_SERVICE_I_V6 \ + mt32emu_boolean (MT32EMU_C_CALL *getSoundGroupName)(mt32emu_const_context context, char *sound_group_name, mt32emu_bit8u timbre_group, mt32emu_bit8u timbre_number); \ + mt32emu_boolean (MT32EMU_C_CALL *getSoundName)(mt32emu_const_context context, char *sound_name, mt32emu_bit8u timbre_group, mt32emu_bit8u timbre_number); typedef struct { MT32EMU_SERVICE_I_V0 @@ -318,6 +385,40 @@ typedef struct { MT32EMU_SERVICE_I_V2 } mt32emu_service_i_v2; +typedef struct { + MT32EMU_SERVICE_I_V0 + MT32EMU_SERVICE_I_V1 + MT32EMU_SERVICE_I_V2 + MT32EMU_SERVICE_I_V3 +} mt32emu_service_i_v3; + +typedef struct { + MT32EMU_SERVICE_I_V0 + MT32EMU_SERVICE_I_V1 + MT32EMU_SERVICE_I_V2 + MT32EMU_SERVICE_I_V3 + MT32EMU_SERVICE_I_V4 +} mt32emu_service_i_v4; + +typedef struct { + MT32EMU_SERVICE_I_V0 + MT32EMU_SERVICE_I_V1 + MT32EMU_SERVICE_I_V2 + MT32EMU_SERVICE_I_V3 + MT32EMU_SERVICE_I_V4 + MT32EMU_SERVICE_I_V5 +} mt32emu_service_i_v5; + +typedef struct { + MT32EMU_SERVICE_I_V0 + MT32EMU_SERVICE_I_V1 + MT32EMU_SERVICE_I_V2 + MT32EMU_SERVICE_I_V3 + MT32EMU_SERVICE_I_V4 + MT32EMU_SERVICE_I_V5 + MT32EMU_SERVICE_I_V6 +} mt32emu_service_i_v6; + /** * Extensible interface for all the library services. * Union intended to view an interface of any subsequent version as any parent interface not requiring a cast. @@ -327,10 +428,18 @@ union mt32emu_service_i { const mt32emu_service_i_v0 *v0; const mt32emu_service_i_v1 *v1; const mt32emu_service_i_v2 *v2; + const mt32emu_service_i_v3 *v3; + const mt32emu_service_i_v4 *v4; + const mt32emu_service_i_v5 *v5; + const mt32emu_service_i_v6 *v6; }; #undef MT32EMU_SERVICE_I_V0 #undef MT32EMU_SERVICE_I_V1 #undef MT32EMU_SERVICE_I_V2 +#undef MT32EMU_SERVICE_I_V3 +#undef MT32EMU_SERVICE_I_V4 +#undef MT32EMU_SERVICE_I_V5 +#undef MT32EMU_SERVICE_I_V6 #endif /* #ifndef MT32EMU_C_TYPES_H */ diff --git a/src/include/mt32emu/c_interface/cpp_interface.h b/src/include/mt32emu/c_interface/cpp_interface.h index 3b02c0325..d22897b74 100644 --- a/src/include/mt32emu/c_interface/cpp_interface.h +++ b/src/include/mt32emu/c_interface/cpp_interface.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2017 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -41,10 +41,17 @@ mt32emu_service_i mt32emu_get_service_i(); #define mt32emu_get_library_version_string i.v0->getLibraryVersionString #define mt32emu_get_stereo_output_samplerate i.v0->getStereoOutputSamplerate #define mt32emu_get_best_analog_output_mode iV1()->getBestAnalogOutputMode +#define mt32emu_get_machine_ids iV4()->getMachineIDs +#define mt32emu_get_rom_ids iV4()->getROMIDs +#define mt32emu_identify_rom_data iV4()->identifyROMData +#define mt32emu_identify_rom_file iV4()->identifyROMFile #define mt32emu_create_context i.v0->createContext #define mt32emu_free_context i.v0->freeContext #define mt32emu_add_rom_data i.v0->addROMData #define mt32emu_add_rom_file i.v0->addROMFile +#define mt32emu_merge_and_add_rom_data iV4()->mergeAndAddROMData +#define mt32emu_merge_and_add_rom_files iV4()->mergeAndAddROMFiles +#define mt32emu_add_machine_rom_file iV4()->addMachineROMFile #define mt32emu_get_rom_info i.v0->getROMInfo #define mt32emu_set_partial_count i.v0->setPartialCount #define mt32emu_set_analog_output_mode i.v0->setAnalogOutputMode @@ -60,6 +67,7 @@ mt32emu_service_i mt32emu_get_service_i(); #define mt32emu_convert_synth_to_output_timestamp iV1()->convertSynthToOutputTimestamp #define mt32emu_flush_midi_queue i.v0->flushMIDIQueue #define mt32emu_set_midi_event_queue_size i.v0->setMIDIEventQueueSize +#define mt32emu_configure_midi_event_queue_sysex_storage iV3()->configureMIDIEventQueueSysexStorage #define mt32emu_set_midi_receiver i.v0->setMIDIReceiver #define mt32emu_get_internal_rendered_sample_count iV2()->getInternalRenderedSampleCount #define mt32emu_parse_stream i.v0->parseStream @@ -81,6 +89,7 @@ mt32emu_service_i mt32emu_get_service_i(); #define mt32emu_set_reverb_compatibility_mode i.v0->setReverbCompatibilityMode #define mt32emu_is_mt32_reverb_compatibility_mode i.v0->isMT32ReverbCompatibilityMode #define mt32emu_is_default_reverb_mt32_compatible i.v0->isDefaultReverbMT32Compatible +#define mt32emu_preallocate_reverb_memory iV3()->preallocateReverbMemory #define mt32emu_set_dac_input_mode i.v0->setDACInputMode #define mt32emu_get_dac_input_mode i.v0->getDACInputMode #define mt32emu_set_midi_delay_mode i.v0->setMIDIDelayMode @@ -89,10 +98,16 @@ mt32emu_service_i mt32emu_get_service_i(); #define mt32emu_get_output_gain i.v0->getOutputGain #define mt32emu_set_reverb_output_gain i.v0->setReverbOutputGain #define mt32emu_get_reverb_output_gain i.v0->getReverbOutputGain +#define mt32emu_set_part_volume_override iV5()->setPartVolumeOverride +#define mt32emu_get_part_volume_override iV5()->getPartVolumeOverride #define mt32emu_set_reversed_stereo_enabled i.v0->setReversedStereoEnabled #define mt32emu_is_reversed_stereo_enabled i.v0->isReversedStereoEnabled #define mt32emu_set_nice_amp_ramp_enabled iV2()->setNiceAmpRampEnabled #define mt32emu_is_nice_amp_ramp_enabled iV2()->isNiceAmpRampEnabled +#define mt32emu_set_nice_panning_enabled iV3()->setNicePanningEnabled +#define mt32emu_is_nice_panning_enabled iV3()->isNicePanningEnabled +#define mt32emu_set_nice_partial_mixing_enabled iV3()->setNicePartialMixingEnabled +#define mt32emu_is_nice_partial_mixing_enabled iV3()->isNicePartialMixingEnabled #define mt32emu_render_bit16s i.v0->renderBit16s #define mt32emu_render_float i.v0->renderFloat #define mt32emu_render_bit16s_streams i.v0->renderBit16sStreams @@ -104,7 +119,14 @@ mt32emu_service_i mt32emu_get_service_i(); #define mt32emu_get_partial_states i.v0->getPartialStates #define mt32emu_get_playing_notes i.v0->getPlayingNotes #define mt32emu_get_patch_name i.v0->getPatchName +#define mt32emu_get_sound_group_name iV6()->getSoundGroupName +#define mt32emu_get_sound_name iV6()->getSoundName #define mt32emu_read_memory i.v0->readMemory +#define mt32emu_get_display_state iV5()->getDisplayState +#define mt32emu_set_main_display_mode iV5()->setMainDisplayMode +#define mt32emu_set_display_compatibility iV5()->setDisplayCompatibility +#define mt32emu_is_display_old_mt32_compatible iV5()->isDisplayOldMT32Compatible +#define mt32emu_is_default_display_old_mt32_compatible iV5()->isDefaultDisplayOldMT32Compatible #else // #if MT32EMU_API_TYPE == 2 @@ -117,7 +139,7 @@ namespace MT32Emu { namespace CppInterfaceImpl { static const mt32emu_report_handler_i NULL_REPORT_HANDLER = { NULL }; -static mt32emu_report_handler_i getReportHandlerThunk(); +static mt32emu_report_handler_i getReportHandlerThunk(mt32emu_report_handler_version); static mt32emu_midi_receiver_i getMidiReceiverThunk(); } @@ -130,8 +152,8 @@ static mt32emu_midi_receiver_i getMidiReceiverThunk(); * See c_types.h and c_interface.h for description of the corresponding interface methods. */ -// Defines the interface for handling reported events. -// Corresponds to the current version of mt32emu_report_handler_i interface. +// Defines the interface for handling reported events (initial version). +// Corresponds to the mt32emu_report_handler_i_v0 interface. class IReportHandler { public: virtual void printDebug(const char *fmt, va_list list) = 0; @@ -153,6 +175,17 @@ protected: ~IReportHandler() {} }; +// Extends IReportHandler, so that the client may supply callbacks for reporting signals about updated display state. +// Corresponds to the mt32emu_report_handler_i_v1 interface. +class IReportHandlerV1 : public IReportHandler { +public: + virtual void onLCDStateUpdated() = 0; + virtual void onMidiMessageLEDStateUpdated(bool ledState) = 0; + +protected: + ~IReportHandlerV1() {} +}; + // Defines the interface for receiving MIDI messages generated by MIDI stream parser. // Corresponds to the current version of mt32emu_midi_receiver_i interface. class IMidiReceiver { @@ -190,14 +223,24 @@ public: Bit32u getStereoOutputSamplerate(const AnalogOutputMode analog_output_mode) { return mt32emu_get_stereo_output_samplerate(static_cast(analog_output_mode)); } AnalogOutputMode getBestAnalogOutputMode(const double target_samplerate) { return static_cast(mt32emu_get_best_analog_output_mode(target_samplerate)); } + size_t getMachineIDs(const char **machine_ids, size_t machine_ids_size) { return mt32emu_get_machine_ids(machine_ids, machine_ids_size); } + size_t getROMIDs(const char **rom_ids, size_t rom_ids_size, const char *machine_id) { return mt32emu_get_rom_ids(rom_ids, rom_ids_size, machine_id); } + mt32emu_return_code identifyROMData(mt32emu_rom_info *rom_info, const Bit8u *data, size_t data_size, const char *machine_id) { return mt32emu_identify_rom_data(rom_info, data, data_size, machine_id); } + mt32emu_return_code identifyROMFile(mt32emu_rom_info *rom_info, const char *filename, const char *machine_id) { return mt32emu_identify_rom_file(rom_info, filename, machine_id); } + // Context-dependent methods mt32emu_context getContext() { return c; } void createContext(mt32emu_report_handler_i report_handler = CppInterfaceImpl::NULL_REPORT_HANDLER, void *instance_data = NULL) { freeContext(); c = mt32emu_create_context(report_handler, instance_data); } - void createContext(IReportHandler &report_handler) { createContext(CppInterfaceImpl::getReportHandlerThunk(), &report_handler); } + void createContext(IReportHandler &report_handler) { createContext(CppInterfaceImpl::getReportHandlerThunk(MT32EMU_REPORT_HANDLER_VERSION_0), &report_handler); } + void createContext(IReportHandlerV1 &report_handler) { createContext(CppInterfaceImpl::getReportHandlerThunk(MT32EMU_REPORT_HANDLER_VERSION_1), &report_handler); } void freeContext() { if (c != NULL) { mt32emu_free_context(c); c = NULL; } } mt32emu_return_code addROMData(const Bit8u *data, size_t data_size, const mt32emu_sha1_digest *sha1_digest = NULL) { return mt32emu_add_rom_data(c, data, data_size, sha1_digest); } mt32emu_return_code addROMFile(const char *filename) { return mt32emu_add_rom_file(c, filename); } + mt32emu_return_code mergeAndAddROMData(const Bit8u *part1_data, size_t part1_data_size, const Bit8u *part2_data, size_t part2_data_size) { return mt32emu_merge_and_add_rom_data(c, part1_data, part1_data_size, NULL, part2_data, part2_data_size, NULL); } + mt32emu_return_code mergeAndAddROMData(const Bit8u *part1_data, size_t part1_data_size, const mt32emu_sha1_digest *part1_sha1_digest, const Bit8u *part2_data, size_t part2_data_size, const mt32emu_sha1_digest *part2_sha1_digest) { return mt32emu_merge_and_add_rom_data(c, part1_data, part1_data_size, part1_sha1_digest, part2_data, part2_data_size, part2_sha1_digest); } + mt32emu_return_code mergeAndAddROMFiles(const char *part1_filename, const char *part2_filename) { return mt32emu_merge_and_add_rom_files(c, part1_filename, part2_filename); } + mt32emu_return_code addMachineROMFile(const char *machine_id, const char *filename) { return mt32emu_add_machine_rom_file(c, machine_id, filename); } void getROMInfo(mt32emu_rom_info *rom_info) { mt32emu_get_rom_info(c, rom_info); } void setPartialCount(const Bit32u partial_count) { mt32emu_set_partial_count(c, partial_count); } void setAnalogOutputMode(const AnalogOutputMode analog_output_mode) { mt32emu_set_analog_output_mode(c, static_cast(analog_output_mode)); } @@ -213,6 +256,7 @@ public: Bit32u convertSynthToOutputTimestamp(Bit32u synth_timestamp) { return mt32emu_convert_synth_to_output_timestamp(c, synth_timestamp); } void flushMIDIQueue() { mt32emu_flush_midi_queue(c); } Bit32u setMIDIEventQueueSize(const Bit32u queue_size) { return mt32emu_set_midi_event_queue_size(c, queue_size); } + void configureMIDIEventQueueSysexStorage(const Bit32u storage_buffer_size) { mt32emu_configure_midi_event_queue_sysex_storage(c, storage_buffer_size); } void setMIDIReceiver(mt32emu_midi_receiver_i midi_receiver, void *instance_data) { mt32emu_set_midi_receiver(c, midi_receiver, instance_data); } void setMIDIReceiver(IMidiReceiver &midi_receiver) { setMIDIReceiver(CppInterfaceImpl::getMidiReceiverThunk(), &midi_receiver); } @@ -238,6 +282,7 @@ public: void setReverbCompatibilityMode(const bool mt32_compatible_mode) { mt32emu_set_reverb_compatibility_mode(c, mt32_compatible_mode ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE); } bool isMT32ReverbCompatibilityMode() { return mt32emu_is_mt32_reverb_compatibility_mode(c) != MT32EMU_BOOL_FALSE; } bool isDefaultReverbMT32Compatible() { return mt32emu_is_default_reverb_mt32_compatible(c) != MT32EMU_BOOL_FALSE; } + void preallocateReverbMemory(const bool enabled) { mt32emu_preallocate_reverb_memory(c, enabled ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE); } void setDACInputMode(const DACInputMode mode) { mt32emu_set_dac_input_mode(c, static_cast(mode)); } DACInputMode getDACInputMode() { return static_cast(mt32emu_get_dac_input_mode(c)); } @@ -250,12 +295,21 @@ public: void setReverbOutputGain(float gain) { mt32emu_set_reverb_output_gain(c, gain); } float getReverbOutputGain() { return mt32emu_get_reverb_output_gain(c); } + void setPartVolumeOverride(Bit8u part_number, Bit8u volume_override) { mt32emu_set_part_volume_override(c, part_number, volume_override); } + Bit8u getPartVolumeOverride(Bit8u part_number) { return mt32emu_get_part_volume_override(c, part_number); } + void setReversedStereoEnabled(const bool enabled) { mt32emu_set_reversed_stereo_enabled(c, enabled ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE); } bool isReversedStereoEnabled() { return mt32emu_is_reversed_stereo_enabled(c) != MT32EMU_BOOL_FALSE; } void setNiceAmpRampEnabled(const bool enabled) { mt32emu_set_nice_amp_ramp_enabled(c, enabled ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE); } bool isNiceAmpRampEnabled() { return mt32emu_is_nice_amp_ramp_enabled(c) != MT32EMU_BOOL_FALSE; } + void setNicePanningEnabled(const bool enabled) { mt32emu_set_nice_panning_enabled(c, enabled ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE); } + bool isNicePanningEnabled() { return mt32emu_is_nice_panning_enabled(c) != MT32EMU_BOOL_FALSE; } + + void setNicePartialMixingEnabled(const bool enabled) { mt32emu_set_nice_partial_mixing_enabled(c, enabled ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE); } + bool isNicePartialMixingEnabled() { return mt32emu_is_nice_partial_mixing_enabled(c) != MT32EMU_BOOL_FALSE; } + void renderBit16s(Bit16s *stream, Bit32u len) { mt32emu_render_bit16s(c, stream, len); } void renderFloat(float *stream, Bit32u len) { mt32emu_render_float(c, stream, len); } void renderBit16sStreams(const mt32emu_dac_output_bit16s_streams *streams, Bit32u len) { mt32emu_render_bit16s_streams(c, streams, len); } @@ -268,8 +322,17 @@ public: void getPartialStates(Bit8u *partial_states) { mt32emu_get_partial_states(c, partial_states); } Bit32u getPlayingNotes(Bit8u part_number, Bit8u *keys, Bit8u *velocities) { return mt32emu_get_playing_notes(c, part_number, keys, velocities); } const char *getPatchName(Bit8u part_number) { return mt32emu_get_patch_name(c, part_number); } + bool getSoundGroupName(char *soundGroupName, Bit8u timbreGroup, Bit8u timbreNumber) { return mt32emu_get_sound_group_name(c, soundGroupName, timbreGroup, timbreNumber) != MT32EMU_BOOL_FALSE; } + bool getSoundName(char *soundName, Bit8u timbreGroup, Bit8u timbreNumber) { return mt32emu_get_sound_name(c, soundName, timbreGroup, timbreNumber) != MT32EMU_BOOL_FALSE; } void readMemory(Bit32u addr, Bit32u len, Bit8u *data) { mt32emu_read_memory(c, addr, len, data); } + bool getDisplayState(char *target_buffer, const bool narrow_lcd) { return mt32emu_get_display_state(c, target_buffer, narrow_lcd ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE) != MT32EMU_BOOL_FALSE; } + void setMainDisplayMode() { mt32emu_set_main_display_mode(c); } + + void setDisplayCompatibility(const bool oldMT32CompatibilityEnabled) { mt32emu_set_display_compatibility(c, oldMT32CompatibilityEnabled ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE); } + bool isDisplayOldMT32Compatible() { return mt32emu_is_display_old_mt32_compatible(c) != MT32EMU_BOOL_FALSE; } + bool isDefaultDisplayOldMT32Compatible() { return mt32emu_is_default_display_old_mt32_compatible(c) != MT32EMU_BOOL_FALSE; } + private: #if MT32EMU_API_TYPE == 2 const mt32emu_service_i i; @@ -279,108 +342,138 @@ private: #if MT32EMU_API_TYPE == 2 const mt32emu_service_i_v1 *iV1() { return (getVersionID() < MT32EMU_SERVICE_VERSION_1) ? NULL : i.v1; } const mt32emu_service_i_v2 *iV2() { return (getVersionID() < MT32EMU_SERVICE_VERSION_2) ? NULL : i.v2; } + const mt32emu_service_i_v3 *iV3() { return (getVersionID() < MT32EMU_SERVICE_VERSION_3) ? NULL : i.v3; } + const mt32emu_service_i_v4 *iV4() { return (getVersionID() < MT32EMU_SERVICE_VERSION_4) ? NULL : i.v4; } + const mt32emu_service_i_v5 *iV5() { return (getVersionID() < MT32EMU_SERVICE_VERSION_5) ? NULL : i.v5; } + const mt32emu_service_i_v6 *iV6() { return (getVersionID() < MT32EMU_SERVICE_VERSION_6) ? NULL : i.v6; } #endif + + Service(const Service &); // prevent copy-construction + Service& operator=(const Service &); // prevent assignment }; namespace CppInterfaceImpl { -static mt32emu_report_handler_version getReportHandlerVersionID(mt32emu_report_handler_i) { - return MT32EMU_REPORT_HANDLER_VERSION_CURRENT; -} +static mt32emu_report_handler_version MT32EMU_C_CALL getReportHandlerVersionID(mt32emu_report_handler_i); -static void printDebug(void *instance_data, const char *fmt, va_list list) { +static void MT32EMU_C_CALL printDebug(void *instance_data, const char *fmt, va_list list) { static_cast(instance_data)->printDebug(fmt, list); } -static void onErrorControlROM(void *instance_data) { +static void MT32EMU_C_CALL onErrorControlROM(void *instance_data) { static_cast(instance_data)->onErrorControlROM(); } -static void onErrorPCMROM(void *instance_data) { +static void MT32EMU_C_CALL onErrorPCMROM(void *instance_data) { static_cast(instance_data)->onErrorPCMROM(); } -static void showLCDMessage(void *instance_data, const char *message) { +static void MT32EMU_C_CALL showLCDMessage(void *instance_data, const char *message) { static_cast(instance_data)->showLCDMessage(message); } -static void onMIDIMessagePlayed(void *instance_data) { +static void MT32EMU_C_CALL onMIDIMessagePlayed(void *instance_data) { static_cast(instance_data)->onMIDIMessagePlayed(); } -static mt32emu_boolean onMIDIQueueOverflow(void *instance_data) { +static mt32emu_boolean MT32EMU_C_CALL onMIDIQueueOverflow(void *instance_data) { return static_cast(instance_data)->onMIDIQueueOverflow() ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; } -static void onMIDISystemRealtime(void *instance_data, mt32emu_bit8u system_realtime) { +static void MT32EMU_C_CALL onMIDISystemRealtime(void *instance_data, mt32emu_bit8u system_realtime) { static_cast(instance_data)->onMIDISystemRealtime(system_realtime); } -static void onDeviceReset(void *instance_data) { +static void MT32EMU_C_CALL onDeviceReset(void *instance_data) { static_cast(instance_data)->onDeviceReset(); } -static void onDeviceReconfig(void *instance_data) { +static void MT32EMU_C_CALL onDeviceReconfig(void *instance_data) { static_cast(instance_data)->onDeviceReconfig(); } -static void onNewReverbMode(void *instance_data, mt32emu_bit8u mode) { +static void MT32EMU_C_CALL onNewReverbMode(void *instance_data, mt32emu_bit8u mode) { static_cast(instance_data)->onNewReverbMode(mode); } -static void onNewReverbTime(void *instance_data, mt32emu_bit8u time) { +static void MT32EMU_C_CALL onNewReverbTime(void *instance_data, mt32emu_bit8u time) { static_cast(instance_data)->onNewReverbTime(time); } -static void onNewReverbLevel(void *instance_data, mt32emu_bit8u level) { +static void MT32EMU_C_CALL onNewReverbLevel(void *instance_data, mt32emu_bit8u level) { static_cast(instance_data)->onNewReverbLevel(level); } -static void onPolyStateChanged(void *instance_data, mt32emu_bit8u part_num) { +static void MT32EMU_C_CALL onPolyStateChanged(void *instance_data, mt32emu_bit8u part_num) { static_cast(instance_data)->onPolyStateChanged(part_num); } -static void onProgramChanged(void *instance_data, mt32emu_bit8u part_num, const char *sound_group_name, const char *patch_name) { +static void MT32EMU_C_CALL onProgramChanged(void *instance_data, mt32emu_bit8u part_num, const char *sound_group_name, const char *patch_name) { static_cast(instance_data)->onProgramChanged(part_num, sound_group_name, patch_name); } -static mt32emu_report_handler_i getReportHandlerThunk() { - static const mt32emu_report_handler_i_v0 REPORT_HANDLER_V0_THUNK = { - getReportHandlerVersionID, - printDebug, - onErrorControlROM, - onErrorPCMROM, - showLCDMessage, - onMIDIMessagePlayed, - onMIDIQueueOverflow, - onMIDISystemRealtime, - onDeviceReset, - onDeviceReconfig, - onNewReverbMode, - onNewReverbTime, - onNewReverbLevel, - onPolyStateChanged, - onProgramChanged - }; - - static const mt32emu_report_handler_i REPORT_HANDLER_THUNK = { &REPORT_HANDLER_V0_THUNK }; - - return REPORT_HANDLER_THUNK; +static void MT32EMU_C_CALL onLCDStateUpdated(void *instance_data) { + static_cast(instance_data)->onLCDStateUpdated(); } -static mt32emu_midi_receiver_version getMidiReceiverVersionID(mt32emu_midi_receiver_i) { +static void MT32EMU_C_CALL onMidiMessageLEDStateUpdated(void *instance_data, mt32emu_boolean led_state) { + static_cast(instance_data)->onMidiMessageLEDStateUpdated(led_state != MT32EMU_BOOL_FALSE); +} + +#define MT32EMU_REPORT_HANDLER_V0_THUNK \ + getReportHandlerVersionID, \ + printDebug, \ + onErrorControlROM, \ + onErrorPCMROM, \ + showLCDMessage, \ + onMIDIMessagePlayed, \ + onMIDIQueueOverflow, \ + onMIDISystemRealtime, \ + onDeviceReset, \ + onDeviceReconfig, \ + onNewReverbMode, \ + onNewReverbTime, \ + onNewReverbLevel, \ + onPolyStateChanged, \ + onProgramChanged + +static const mt32emu_report_handler_i_v0 REPORT_HANDLER_V0_THUNK = { + MT32EMU_REPORT_HANDLER_V0_THUNK +}; + +static const mt32emu_report_handler_i_v1 REPORT_HANDLER_V1_THUNK = { + MT32EMU_REPORT_HANDLER_V0_THUNK, + onLCDStateUpdated, + onMidiMessageLEDStateUpdated +}; + +#undef MT32EMU_REPORT_HANDLER_THUNK_V0 + +static mt32emu_report_handler_version MT32EMU_C_CALL getReportHandlerVersionID(mt32emu_report_handler_i thunk) { + if (thunk.v0 == &REPORT_HANDLER_V0_THUNK) return MT32EMU_REPORT_HANDLER_VERSION_0; + return MT32EMU_REPORT_HANDLER_VERSION_CURRENT; +} + +static mt32emu_report_handler_i getReportHandlerThunk(mt32emu_report_handler_version versionID) { + mt32emu_report_handler_i thunk; + if (versionID == MT32EMU_REPORT_HANDLER_VERSION_0) thunk.v0 = &REPORT_HANDLER_V0_THUNK; + else thunk.v1 = &REPORT_HANDLER_V1_THUNK; + return thunk; +} + +static mt32emu_midi_receiver_version MT32EMU_C_CALL getMidiReceiverVersionID(mt32emu_midi_receiver_i) { return MT32EMU_MIDI_RECEIVER_VERSION_CURRENT; } -static void handleShortMessage(void *instance_data, const mt32emu_bit32u message) { +static void MT32EMU_C_CALL handleShortMessage(void *instance_data, const mt32emu_bit32u message) { static_cast(instance_data)->handleShortMessage(message); } -static void handleSysex(void *instance_data, const mt32emu_bit8u stream[], const mt32emu_bit32u length) { +static void MT32EMU_C_CALL handleSysex(void *instance_data, const mt32emu_bit8u stream[], const mt32emu_bit32u length) { static_cast(instance_data)->handleSysex(stream, length); } -static void handleSystemRealtimeMessage(void *instance_data, const mt32emu_bit8u realtime) { +static void MT32EMU_C_CALL handleSystemRealtimeMessage(void *instance_data, const mt32emu_bit8u realtime) { static_cast(instance_data)->handleSystemRealtimeMessage(realtime); } @@ -409,10 +502,17 @@ static mt32emu_midi_receiver_i getMidiReceiverThunk() { #undef mt32emu_get_library_version_string #undef mt32emu_get_stereo_output_samplerate #undef mt32emu_get_best_analog_output_mode +#undef mt32emu_get_machine_ids +#undef mt32emu_get_rom_ids +#undef mt32emu_identify_rom_data +#undef mt32emu_identify_rom_file #undef mt32emu_create_context #undef mt32emu_free_context #undef mt32emu_add_rom_data #undef mt32emu_add_rom_file +#undef mt32emu_merge_and_add_rom_data +#undef mt32emu_merge_and_add_rom_files +#undef mt32emu_add_machine_rom_file #undef mt32emu_get_rom_info #undef mt32emu_set_partial_count #undef mt32emu_set_analog_output_mode @@ -428,6 +528,7 @@ static mt32emu_midi_receiver_i getMidiReceiverThunk() { #undef mt32emu_convert_synth_to_output_timestamp #undef mt32emu_flush_midi_queue #undef mt32emu_set_midi_event_queue_size +#undef mt32emu_configure_midi_event_queue_sysex_storage #undef mt32emu_set_midi_receiver #undef mt32emu_get_internal_rendered_sample_count #undef mt32emu_parse_stream @@ -449,6 +550,7 @@ static mt32emu_midi_receiver_i getMidiReceiverThunk() { #undef mt32emu_set_reverb_compatibility_mode #undef mt32emu_is_mt32_reverb_compatibility_mode #undef mt32emu_is_default_reverb_mt32_compatible +#undef mt32emu_preallocate_reverb_memory #undef mt32emu_set_dac_input_mode #undef mt32emu_get_dac_input_mode #undef mt32emu_set_midi_delay_mode @@ -461,6 +563,10 @@ static mt32emu_midi_receiver_i getMidiReceiverThunk() { #undef mt32emu_is_reversed_stereo_enabled #undef mt32emu_set_nice_amp_ramp_enabled #undef mt32emu_is_nice_amp_ramp_enabled +#undef mt32emu_set_nice_panning_enabled +#undef mt32emu_is_nice_panning_enabled +#undef mt32emu_set_nice_partial_mixing_enabled +#undef mt32emu_is_nice_partial_mixing_enabled #undef mt32emu_render_bit16s #undef mt32emu_render_float #undef mt32emu_render_bit16s_streams @@ -472,7 +578,14 @@ static mt32emu_midi_receiver_i getMidiReceiverThunk() { #undef mt32emu_get_partial_states #undef mt32emu_get_playing_notes #undef mt32emu_get_patch_name +#undef mt32emu_get_sound_group_name +#undef mt32emu_get_sound_name #undef mt32emu_read_memory +#undef mt32emu_get_display_state +#undef mt32emu_set_main_display_mode +#undef mt32emu_set_display_compatibility +#undef mt32emu_is_display_old_mt32_compatible +#undef mt32emu_is_default_display_old_mt32_compatible #endif // #if MT32EMU_API_TYPE == 2 diff --git a/src/include/mt32emu/config.h b/src/include/mt32emu/config.h index 5f5b6c9fb..906c23d56 100644 --- a/src/include/mt32emu/config.h +++ b/src/include/mt32emu/config.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2017 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -18,9 +18,9 @@ #ifndef MT32EMU_CONFIG_H #define MT32EMU_CONFIG_H -#define MT32EMU_VERSION "2.2.0" +#define MT32EMU_VERSION "2.7.0" #define MT32EMU_VERSION_MAJOR 2 -#define MT32EMU_VERSION_MINOR 2 +#define MT32EMU_VERSION_MINOR 7 #define MT32EMU_VERSION_PATCH 0 /* Library Exports Configuration @@ -37,4 +37,9 @@ #define MT32EMU_API_TYPE 0 +#define MT32EMU_WITH_LIBSOXR_RESAMPLER 0 +#define MT32EMU_WITH_LIBSAMPLERATE_RESAMPLER 0 +#define MT32EMU_WITH_INTERNAL_RESAMPLER 1 + + #endif diff --git a/src/include/mt32emu/globals.h b/src/include/mt32emu/globals.h index 2d984c82b..86ac1ca5b 100644 --- a/src/include/mt32emu/globals.h +++ b/src/include/mt32emu/globals.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2017 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -20,27 +20,35 @@ #include "config.h" -/* Support for compiling shared library. */ +/* Support for compiling shared library. + * MT32EMU_SHARED and mt32emu_EXPORTS are defined when building a shared library. + * MT32EMU_SHARED should also be defined for Windows platforms that provides for a small performance benefit, + * and it _must_ be defined along with MT32EMU_RUNTIME_VERSION_CHECK when using MSVC. + */ #ifdef MT32EMU_SHARED -#if defined _WIN32 || defined __CYGWIN__ -#ifdef _MSC_VER -#ifdef mt32emu_EXPORTS -#define MT32EMU_EXPORT_ATTRIBUTE _declspec(dllexport) -#else /* #ifdef mt32emu_EXPORTS */ -#define MT32EMU_EXPORT_ATTRIBUTE _declspec(dllimport) -#endif /* #ifdef mt32emu_EXPORTS */ -#else /* #ifdef _MSC_VER */ -#ifdef mt32emu_EXPORTS -#define MT32EMU_EXPORT_ATTRIBUTE __attribute__ ((dllexport)) -#else /* #ifdef mt32emu_EXPORTS */ -#define MT32EMU_EXPORT_ATTRIBUTE __attribute__ ((dllimport)) -#endif /* #ifdef mt32emu_EXPORTS */ -#endif /* #ifdef _MSC_VER */ -#else /* #if defined _WIN32 || defined __CYGWIN__ */ -#define MT32EMU_EXPORT_ATTRIBUTE __attribute__ ((visibility("default"))) -#endif /* #if defined _WIN32 || defined __CYGWIN__ */ +# if defined _WIN32 || defined __CYGWIN__ || defined __OS2__ +# ifdef _MSC_VER +# ifdef mt32emu_EXPORTS +# define MT32EMU_EXPORT_ATTRIBUTE _declspec(dllexport) +# else /* #ifdef mt32emu_EXPORTS */ +# define MT32EMU_EXPORT_ATTRIBUTE _declspec(dllimport) +# endif /* #ifdef mt32emu_EXPORTS */ +# else /* #ifdef _MSC_VER */ +# ifdef mt32emu_EXPORTS +# define MT32EMU_EXPORT_ATTRIBUTE __attribute__ ((dllexport)) +# else /* #ifdef mt32emu_EXPORTS */ +# define MT32EMU_EXPORT_ATTRIBUTE __attribute__ ((dllimport)) +# endif /* #ifdef mt32emu_EXPORTS */ +# endif /* #ifdef _MSC_VER */ +# else /* #if defined _WIN32 || defined __CYGWIN__ || defined __OS2__ */ +# ifdef mt32emu_EXPORTS +# define MT32EMU_EXPORT_ATTRIBUTE __attribute__ ((visibility("default"))) +# else /* #ifdef mt32emu_EXPORTS */ +# define MT32EMU_EXPORT_ATTRIBUTE +# endif /* #ifdef mt32emu_EXPORTS */ +# endif /* #if defined _WIN32 || defined __CYGWIN__ || defined __OS2__ */ #else /* #ifdef MT32EMU_SHARED */ -#define MT32EMU_EXPORT_ATTRIBUTE +# define MT32EMU_EXPORT_ATTRIBUTE #endif /* #ifdef MT32EMU_SHARED */ #if MT32EMU_EXPORTS_TYPE == 1 || MT32EMU_EXPORTS_TYPE == 2 @@ -49,6 +57,33 @@ #define MT32EMU_EXPORT MT32EMU_EXPORT_ATTRIBUTE #endif +/* Facilitates easier tracking of the library version when an external symbol was introduced. + * Particularly useful for shared library builds on POSIX systems that support symbol versioning, + * so that the version map file can be generated automatically. + */ +#define MT32EMU_EXPORT_V(symbol_version_tag) MT32EMU_EXPORT + +/* Helpers for compile-time version checks */ + +/* Encodes the given version components to a single integer value to simplify further checks. */ +#define MT32EMU_VERSION_INT(major, minor, patch) ((major << 16) | (minor << 8) | patch) + +/* The version of this library build, as an integer. */ +#define MT32EMU_CURRENT_VERSION_INT MT32EMU_VERSION_INT(MT32EMU_VERSION_MAJOR, MT32EMU_VERSION_MINOR, MT32EMU_VERSION_PATCH) + +/* Compares the current library version with the given version components. Intended for feature checks. */ +#define MT32EMU_VERSION_ATLEAST(major, minor, patch) (MT32EMU_CURRENT_VERSION_INT >= MT32EMU_VERSION_INT(major, minor, patch)) + +/* Implements a simple version check that ensures full API compatibility of this library build + * with the application requirements. The latter can be derived from the versions of used public symbols. + * + * Note: This macro is intended for a quick compile-time check. To ensure compatibility of an application + * linked with a shared library, an automatic version check can be engaged with help of the build option + * libmt32emu_WITH_VERSION_TAGGING. For a fine-grained feature checking in run-time, see functions + * mt32emu_get_library_version_int and Synth::getLibraryVersionInt. + */ +#define MT32EMU_IS_COMPATIBLE(major, minor) (MT32EMU_VERSION_MAJOR == major && MT32EMU_VERSION_MINOR >= minor) + /* Useful constants */ /* Sample rate to use in mixing. With the progress of development, we've found way too many thing dependent. diff --git a/src/include/mt32emu/mt32emu.h b/src/include/mt32emu/mt32emu.h index 6b93121be..571b25571 100644 --- a/src/include/mt32emu/mt32emu.h +++ b/src/include/mt32emu/mt32emu.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2017 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -37,28 +37,23 @@ */ #ifdef MT32EMU_API_TYPE -#if MT32EMU_API_TYPE == 0 && (MT32EMU_EXPORTS_TYPE == 1 || MT32EMU_EXPORTS_TYPE == 2) -#error Incompatible setting MT32EMU_API_TYPE=0 -#elif MT32EMU_API_TYPE == 1 && (MT32EMU_EXPORTS_TYPE == 0 || MT32EMU_EXPORTS_TYPE == 2) -#error Incompatible setting MT32EMU_API_TYPE=1 -#elif MT32EMU_API_TYPE == 2 && (MT32EMU_EXPORTS_TYPE == 0) -#error Incompatible setting MT32EMU_API_TYPE=2 -#elif MT32EMU_API_TYPE == 3 && (MT32EMU_EXPORTS_TYPE == 0 || MT32EMU_EXPORTS_TYPE == 2) -#error Incompatible setting MT32EMU_API_TYPE=3 -#endif +# if MT32EMU_API_TYPE == 0 && (MT32EMU_EXPORTS_TYPE == 1 || MT32EMU_EXPORTS_TYPE == 2) +# error Incompatible setting MT32EMU_API_TYPE=0 +# elif MT32EMU_API_TYPE == 1 && (MT32EMU_EXPORTS_TYPE == 0 || MT32EMU_EXPORTS_TYPE == 2) +# error Incompatible setting MT32EMU_API_TYPE=1 +# elif MT32EMU_API_TYPE == 2 && (MT32EMU_EXPORTS_TYPE == 0) +# error Incompatible setting MT32EMU_API_TYPE=2 +# elif MT32EMU_API_TYPE == 3 && (MT32EMU_EXPORTS_TYPE == 0 || MT32EMU_EXPORTS_TYPE == 2) +# error Incompatible setting MT32EMU_API_TYPE=3 +# endif #else /* #ifdef MT32EMU_API_TYPE */ -#if 0 < MT32EMU_EXPORTS_TYPE && MT32EMU_EXPORTS_TYPE < 3 -#define MT32EMU_API_TYPE MT32EMU_EXPORTS_TYPE -#else -#define MT32EMU_API_TYPE 0 -#endif +# if 0 < MT32EMU_EXPORTS_TYPE && MT32EMU_EXPORTS_TYPE < 3 +# define MT32EMU_API_TYPE MT32EMU_EXPORTS_TYPE +# else +# define MT32EMU_API_TYPE 0 +# endif #endif /* #ifdef MT32EMU_API_TYPE */ -/* MT32EMU_SHARED should be defined when building shared library, especially for Windows platforms. */ -/* -#define MT32EMU_SHARED -*/ - #include "globals.h" #if !defined(__cplusplus) || MT32EMU_API_TYPE == 1 @@ -79,6 +74,14 @@ #include "MidiStreamParser.h" #include "SampleRateConverter.h" +#if MT32EMU_RUNTIME_VERSION_CHECK == 1 +#include "VersionTagging.h" +#endif + #endif /* #if !defined(__cplusplus) || MT32EMU_API_TYPE == 1 */ +#if MT32EMU_RUNTIME_VERSION_CHECK == 2 +#include "VersionTagging.h" +#endif + #endif /* #ifndef MT32EMU_MT32EMU_H */ diff --git a/src/sound/midi_mt32.c b/src/sound/midi_mt32.c index bb86210f3..f9d45c42e 100644 --- a/src/sound/midi_mt32.c +++ b/src/sound/midi_mt32.c @@ -18,11 +18,13 @@ extern void givealbuffer_midi(void *buf, uint32_t size); extern void al_set_midi(int freq, int buf_size); + +static mt32emu_report_handler_version get_mt32_report_handler_version(mt32emu_report_handler_i i); static void display_mt32_message(void *instance_data, const char *message); static const mt32emu_report_handler_i_v0 handler_mt32_v0 = { /** Returns the actual interface version ID */ - NULL, // mt32emu_report_handler_version (*getVersionID)(mt32emu_report_handler_i i); + get_mt32_report_handler_version, // mt32emu_report_handler_version (*getVersionID)(mt32emu_report_handler_i i); /** Callback for debug messages, in vprintf() format */ NULL, // void (*printDebug)(void *instance_data, const char *fmt, va_list list); @@ -59,7 +61,7 @@ static const mt32emu_report_handler_i_v0 handler_mt32_v0 = { /** Alternate report handler for Roland CM-32L */ static const mt32emu_report_handler_i_v0 handler_cm32l_v0 = { /** Returns the actual interface version ID */ - NULL, // mt32emu_report_handler_version (*getVersionID)(mt32emu_report_handler_i i); + get_mt32_report_handler_version, // mt32emu_report_handler_version (*getVersionID)(mt32emu_report_handler_i i); /** Callback for debug messages, in vprintf() format */ NULL, // void (*printDebug)(void *instance_data, const char *fmt, va_list list); @@ -138,6 +140,12 @@ static float *buffer = NULL; static int16_t *buffer_int16 = NULL; static int midi_pos = 0; +static mt32emu_report_handler_version +get_mt32_report_handler_version(mt32emu_report_handler_i i) +{ + return MT32EMU_REPORT_HANDLER_VERSION_0; +} + static void display_mt32_message(void *instance_data, const char *message) { diff --git a/src/sound/munt/Analog.cpp b/src/sound/munt/Analog.cpp index b14d824dd..41fb19b44 100644 --- a/src/sound/munt/Analog.cpp +++ b/src/sound/munt/Analog.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -273,6 +273,8 @@ Analog *Analog::createAnalog(const AnalogOutputMode mode, const bool oldMT32Anal return new AnalogImpl(mode, oldMT32AnalogLPF); case RendererType_FLOAT: return new AnalogImpl(mode, oldMT32AnalogLPF); + default: + break; } return NULL; } diff --git a/src/sound/munt/Analog.h b/src/sound/munt/Analog.h index 244e4118f..62c092d9d 100644 --- a/src/sound/munt/Analog.h +++ b/src/sound/munt/Analog.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/BReverbModel.cpp b/src/sound/munt/BReverbModel.cpp index 1eb6f7e56..05a2e4240 100644 --- a/src/sound/munt/BReverbModel.cpp +++ b/src/sound/munt/BReverbModel.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -633,6 +633,8 @@ BReverbModel *BReverbModel::createBReverbModel(const ReverbMode mode, const bool return new BReverbModelImpl(mode, mt32CompatibleModel); case RendererType_FLOAT: return new BReverbModelImpl(mode, mt32CompatibleModel); + default: + break; } return NULL; } diff --git a/src/sound/munt/BReverbModel.h b/src/sound/munt/BReverbModel.h index ee2f838b2..ff34e9543 100644 --- a/src/sound/munt/BReverbModel.h +++ b/src/sound/munt/BReverbModel.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/CMakeLists.txt b/src/sound/munt/CMakeLists.txt index 79ac7b2d9..3ebbe40fa 100644 --- a/src/sound/munt/CMakeLists.txt +++ b/src/sound/munt/CMakeLists.txt @@ -13,7 +13,7 @@ # Copyright 2020,2021 David Hrdlička. # -add_library(mt32emu STATIC Analog.cpp BReverbModel.cpp File.cpp FileStream.cpp +add_library(mt32emu STATIC Analog.cpp BReverbModel.cpp Display.cpp File.cpp FileStream.cpp LA32Ramp.cpp LA32FloatWaveGenerator.cpp LA32WaveGenerator.cpp MidiStreamParser.cpp Part.cpp Partial.cpp PartialManager.cpp Poly.cpp ROMInfo.cpp SampleRateConverter.cpp diff --git a/src/sound/munt/Display.cpp b/src/sound/munt/Display.cpp new file mode 100644 index 000000000..e04ea2cd1 --- /dev/null +++ b/src/sound/munt/Display.cpp @@ -0,0 +1,354 @@ +/* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 2.1 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this program. If not, see . + */ + +#include +#include + +#include "internals.h" + +#include "Display.h" +#include "Part.h" +#include "Structures.h" +#include "Synth.h" + +namespace MT32Emu { + +/* Details on the emulation model. + * + * There are four display modes emulated: + * - main (Master Volume), set upon startup after showing the welcoming banner; + * - program change notification; + * - custom display message received via a SysEx; + * - error banner (e.g. the MIDI message checksum error). + * Stuff like cursor blinking, patch selection mode, test mode, reaction to the front panel buttons, etc. is out of scope, as more + * convenient UI/UX solutions are likely desired in applications, if at all. + * + * Note, despite the LAPC and CM devices come without the LCD and the front panel buttons, the control ROM does support these, + * if connected to the main board. That's intended for running the test mode in a service centre, as documented. + * + * Within the aforementioned scope, the observable hardware behaviour differs noticeably, depending on the control ROM version. + * At least three milestones can be identified: + * - with MT-32 control ROM V1.06, custom messages are no longer shown unless the display is in the main (Master Volume) mode; + * - with MT-32 control ROM V2.04, new function introduced - Display Reset yet added many other changes (taking the full SysEx + * address into account when processing custom messages and special handling of the ASCII control characters are among them); + * all the second-gen devices, including LAPC-I and CM-32L, behave very similarly; + * - in the third-gen devices, the LCD support was partially cut down in the control ROM (basically, only the status + * of the test mode, the ROM version and the checksum warnings are shown) - it's not fun, so this is NOT emulated. + * + * Features of the old-gen units. + * - Any message with the first address byte 0x20 is processed and has some effect on the LCD. Messages with any other first + * address byte (e.g. starting with 0x21 or 0x1F7F7F with an overlap) are not considered display-relevant. + * - The second and the third address byte are largely irrelevant. Only presence of the second address byte makes an observable + * difference, not the data within. + * - Any string received in the custom message is normalised - all ASCII control characters are replaced with spaces, messages + * shorter than 20 bytes are filled up with spaces to the full supported length. However, should a timbre name contain an ASCII + * control character, it is displayed nevertheless, with zero meaning the end-of-string. + * - Special message 0x20 (of just 1 address byte) shows the contents of the custom message buffer with either the last received + * message or the empty buffer initially filled with spaces. See the note below about the priorities of the display modes. + * - Messages containing two or three bytes with just the address are considered empty and fill the custom message buffer with + * all spaces. The contents of the empty buffer is then shown, depending on the priority of the current display mode. + * - Timing: custom messages are shown until an external event occurs like pressing a front panel button, receiving a new custom + * message, program change, etc., and for indefinitely long otherwise. A program change notification is shown for about 1300 + * milliseconds; when the timer expires, the display returns to the main mode (irrespective to the current display mode). + * When an error occurs, the warning is shown for a limited time only, similarly to the program change notifications. + * - The earlier old-gen devices treat all display modes with equal priority, except the main mode, which has a lower one. This + * makes it possible e.g. to replace the error banner with a custom message or a program change notification, and so on. + * A slightly improved behaviour is observed since the control ROM V1.06, when custom messages were de-prioritised. But still, + * a program change beats an error banner even in the later models. + * + * Features of the second-gen units. + * - All three bytes in SysEx address are now relevant. + * - It is possible to replace individual characters in the custom message buffer which are addressed individually within + * the range 0x200000-0x200013. + * - Writes to higher addresses up to 0x20007F simply make the custom message buffer shown, with either the last received message + * or the empty buffer initially filled with spaces. + * - Writes to address 0x200100 trigger the Display Reset function which resets the display to the main (Master Volume) mode. + * Similarly, showing an error banner is ended. If a program change notification is shown, this function does nothing, however. + * - Writes to other addresses are not considered display-relevant, albeit writing a long string to lower addresses + * (e.g. 0x1F7F7F) that overlaps the display range does result in updating and showing the custom display message. + * - Writing a long string that covers the custom message buffer and address 0x200100 does both things, i.e. updates the buffer + * and triggers the Display Reset function. + * - While the display is not in a user interaction mode, custom messages and error banners have the highest display priority. + * As long as these are shown, program change notifications are suppressed. The display only leaves this mode when the Display + * Reset function is triggered or a front panel button is pressed. Notably, when the user enters the menu, all custom messages + * are ignored, including the Display Reset command, but error banners are shown nevertheless. + * - Sending cut down messages with partially specified address rather leads to undefined behaviour, except for a two-byte message + * 0x20 0x00 which consistently shows the content of the custom message buffer (if priority permits). Otherwise, the behaviour + * depends on the previously submitted address, e.g. the two-byte version of Display Reset may fail depending on the third byte + * of the previous message. One-byte message 0x20 seemingly does Display Reset yet writes a zero character to a position derived + * from the third byte of the preceding message. + * + * Some notes on the behaviour that is common to all hardware models. + * - The display is DM2011 with LSI SED1200D-0A. This unit supports 4 user-programmable characters stored in CGRAM, all 4 get + * loaded at startup. Character #0 is empty (with the cursor underline), #1 is the full block (used to mark active parts), + * #2 is the pipe character (identical to #124 from the CGROM) and #3 is a variation on "down arrow". During normal operation, + * those duplicated characters #2 and #124 are both used in different places and character #3 can only be made visible by adding + * it either to a custom timbre name or a custom message. Character #0 is probably never shown as this code has special meaning + * in the processing routines. For simplicity, we only use characters #124 and #1 in this model. + * - When the main mode is active, the current state of the first 5 parts and the rhythm part is represented by replacing the part + * symbol with the full rectangle character (#1 from the CGRAM). For voice parts, the rectangle is shown as long as at least one + * partial is playing in a non-releasing phase on that part. For the rhythm part, the rectangle blinks briefly when a new NoteOn + * message is received on that part (sometimes even when that actually produces no sound). + */ + +static const char MASTER_VOLUME_WITH_DELIMITER[] = "| 0"; +static const char MASTER_VOLUME_WITH_DELIMITER_AND_PREFIX[] = "|vol: 0"; +static const Bit8u RHYTHM_PART_CODE = 'R'; +static const Bit8u FIELD_DELIMITER = '|'; +static const Bit8u ACTIVE_PART_INDICATOR = 1; + +static const Bit32u DISPLAYED_VOICE_PARTS_COUNT = 5; +static const Bit32u SOUND_GROUP_NAME_WITH_DELIMITER_SIZE = 8; +static const Bit32u MASTER_VOLUME_WITH_DELIMITER_SIZE = sizeof(MASTER_VOLUME_WITH_DELIMITER) - 1; +static const Bit32u MASTER_VOLUME_WITH_DELIMITER_AND_PREFIX_SIZE = sizeof(MASTER_VOLUME_WITH_DELIMITER_AND_PREFIX) - 1; + +// This is the period to show those short blinks of MIDI MESSAGE LED and the rhythm part state. +// Two related countdowns are initialised to 8 and touched each 10 milliseconds by the software timer 0 interrupt handler. +static const Bit32u BLINK_TIME_MILLIS = 80; +static const Bit32u BLINK_TIME_FRAMES = BLINK_TIME_MILLIS * SAMPLE_RATE / 1000; + +// This is based on the (free-running) TIMER1 overflow interrupt. The timer is 16-bit and clocked at 500KHz. +// The message is displayed until 10 overflow interrupts occur. At the standard sample rate, it counts +// precisely as 41943.04 frame times. +static const Bit32u SCHEDULED_DISPLAY_MODE_RESET_FRAMES = 41943; + +/** + * Copies up to lengthLimit characters from possibly null-terminated source to destination. The character of destination located + * at the position of the null terminator (if any) in source and the rest of destination are left untouched. + */ +static void copyNullTerminatedString(Bit8u *destination, const Bit8u *source, Bit32u lengthLimit) { + for (Bit32u i = 0; i < lengthLimit; i++) { + Bit8u c = source[i]; + if (c == 0) break; + destination[i] = c; + } +} + +Display::Display(Synth &useSynth) : + synth(useSynth), + lastLEDState(), + lcdDirty(), + lcdUpdateSignalled(), + lastRhythmPartState(), + mode(Mode_STARTUP_MESSAGE), + midiMessagePlayedSinceLastReset(), + rhythmNotePlayedSinceLastReset() +{ + scheduleDisplayReset(); + const Bit8u *startupMessage = &synth.controlROMData[synth.controlROMMap->startupMessage]; + memcpy(displayBuffer, startupMessage, LCD_TEXT_SIZE); + memset(customMessageBuffer, ' ', LCD_TEXT_SIZE); + memset(voicePartStates, 0, sizeof voicePartStates); +} + +void Display::checkDisplayStateUpdated(bool &midiMessageLEDState, bool &midiMessageLEDUpdated, bool &lcdUpdated) { + midiMessageLEDState = midiMessagePlayedSinceLastReset; + maybeResetTimer(midiMessagePlayedSinceLastReset, midiMessageLEDResetTimestamp); + // Note, the LED represents activity of the voice parts only. + for (Bit32u partIndex = 0; !midiMessageLEDState && partIndex < 8; partIndex++) { + midiMessageLEDState = voicePartStates[partIndex]; + } + midiMessageLEDUpdated = lastLEDState != midiMessageLEDState; + lastLEDState = midiMessageLEDState; + + if (displayResetScheduled && shouldResetTimer(displayResetTimestamp)) setMainDisplayMode(); + + if (lastRhythmPartState != rhythmNotePlayedSinceLastReset && mode == Mode_MAIN) lcdDirty = true; + lastRhythmPartState = rhythmNotePlayedSinceLastReset; + maybeResetTimer(rhythmNotePlayedSinceLastReset, rhythmStateResetTimestamp); + + lcdUpdated = lcdDirty && !lcdUpdateSignalled; + if (lcdUpdated) lcdUpdateSignalled = true; +} + +bool Display::getDisplayState(char *targetBuffer, bool narrowLCD) { + if (lcdUpdateSignalled) { + lcdDirty = false; + lcdUpdateSignalled = false; + + switch (mode) { + case Mode_CUSTOM_MESSAGE: + if (synth.isDisplayOldMT32Compatible()) { + memcpy(displayBuffer, customMessageBuffer, LCD_TEXT_SIZE); + } else { + copyNullTerminatedString(displayBuffer, customMessageBuffer, LCD_TEXT_SIZE); + } + break; + case Mode_ERROR_MESSAGE: { + const Bit8u *sysexErrorMessage = &synth.controlROMData[synth.controlROMMap->sysexErrorMessage]; + memcpy(displayBuffer, sysexErrorMessage, LCD_TEXT_SIZE); + break; + } + case Mode_PROGRAM_CHANGE: { + Bit8u *writePosition = displayBuffer; + *writePosition++ = '1' + lastProgramChangePartIndex; + *writePosition++ = FIELD_DELIMITER; + if (narrowLCD) { + writePosition[TIMBRE_NAME_SIZE] = 0; + } else { + memcpy(writePosition, lastProgramChangeSoundGroupName, SOUND_GROUP_NAME_WITH_DELIMITER_SIZE); + writePosition += SOUND_GROUP_NAME_WITH_DELIMITER_SIZE; + } + copyNullTerminatedString(writePosition, lastProgramChangeTimbreName, TIMBRE_NAME_SIZE); + break; + } + case Mode_MAIN: { + Bit8u *writePosition = displayBuffer; + for (Bit32u partIndex = 0; partIndex < DISPLAYED_VOICE_PARTS_COUNT; partIndex++) { + *writePosition++ = voicePartStates[partIndex] ? ACTIVE_PART_INDICATOR : '1' + partIndex; + *writePosition++ = ' '; + } + *writePosition++ = lastRhythmPartState ? ACTIVE_PART_INDICATOR : RHYTHM_PART_CODE; + *writePosition++ = ' '; + if (narrowLCD) { + memcpy(writePosition, MASTER_VOLUME_WITH_DELIMITER, MASTER_VOLUME_WITH_DELIMITER_SIZE); + writePosition += MASTER_VOLUME_WITH_DELIMITER_SIZE; + *writePosition = 0; + } else { + memcpy(writePosition, MASTER_VOLUME_WITH_DELIMITER_AND_PREFIX, MASTER_VOLUME_WITH_DELIMITER_AND_PREFIX_SIZE); + writePosition += MASTER_VOLUME_WITH_DELIMITER_AND_PREFIX_SIZE; + } + Bit32u masterVol = synth.mt32ram.system.masterVol; + while (masterVol > 0) { + std::div_t result = std::div(masterVol, 10); + *--writePosition = '0' + result.rem; + masterVol = result.quot; + } + break; + } + default: + break; + } + } + + memcpy(targetBuffer, displayBuffer, LCD_TEXT_SIZE); + targetBuffer[LCD_TEXT_SIZE] = 0; + return lastLEDState; +} + +void Display::setMainDisplayMode() { + displayResetScheduled = false; + mode = Mode_MAIN; + lcdDirty = true; +} + +void Display::midiMessagePlayed() { + midiMessagePlayedSinceLastReset = true; + midiMessageLEDResetTimestamp = synth.renderedSampleCount + BLINK_TIME_FRAMES; +} + +void Display::rhythmNotePlayed() { + rhythmNotePlayedSinceLastReset = true; + rhythmStateResetTimestamp = synth.renderedSampleCount + BLINK_TIME_FRAMES; + midiMessagePlayed(); + if (synth.isDisplayOldMT32Compatible() && mode == Mode_CUSTOM_MESSAGE) setMainDisplayMode(); +} + +void Display::voicePartStateChanged(Bit8u partIndex, bool activated) { + if (mode == Mode_MAIN) lcdDirty = true; + voicePartStates[partIndex] = activated; + if (synth.isDisplayOldMT32Compatible() && mode == Mode_CUSTOM_MESSAGE) setMainDisplayMode(); +} + +void Display::masterVolumeChanged() { + if (mode == Mode_MAIN) lcdDirty = true; +} + +void Display::programChanged(Bit8u partIndex) { + if (!synth.isDisplayOldMT32Compatible() && (mode == Mode_CUSTOM_MESSAGE || mode == Mode_ERROR_MESSAGE)) return; + mode = Mode_PROGRAM_CHANGE; + lcdDirty = true; + scheduleDisplayReset(); + lastProgramChangePartIndex = partIndex; + const Part *part = synth.getPart(partIndex); + lastProgramChangeSoundGroupName = synth.getSoundGroupName(part); + memcpy(lastProgramChangeTimbreName, part->getCurrentInstr(), TIMBRE_NAME_SIZE); +} + +void Display::checksumErrorOccurred() { + if (mode != Mode_ERROR_MESSAGE) { + mode = Mode_ERROR_MESSAGE; + lcdDirty = true; + } + if (synth.isDisplayOldMT32Compatible()) { + scheduleDisplayReset(); + } else { + displayResetScheduled = false; + } +} + +bool Display::customDisplayMessageReceived(const Bit8u *message, Bit32u startIndex, Bit32u length) { + if (synth.isDisplayOldMT32Compatible()) { + for (Bit32u i = 0; i < LCD_TEXT_SIZE; i++) { + Bit8u c = i < length ? message[i] : ' '; + if (c < 32 || 127 < c) c = ' '; + customMessageBuffer[i] = c; + } + if (!synth.controlROMFeatures->quirkDisplayCustomMessagePriority + && (mode == Mode_PROGRAM_CHANGE || mode == Mode_ERROR_MESSAGE)) return false; + // Note, real devices keep the display reset timer running. + } else { + if (startIndex > 0x80) return false; + if (startIndex == 0x80) { + if (mode != Mode_PROGRAM_CHANGE) setMainDisplayMode(); + return false; + } + displayResetScheduled = false; + if (startIndex < LCD_TEXT_SIZE) { + if (length > LCD_TEXT_SIZE - startIndex) length = LCD_TEXT_SIZE - startIndex; + memcpy(customMessageBuffer + startIndex, message, length); + } + } + mode = Mode_CUSTOM_MESSAGE; + lcdDirty = true; + return true; +} + +void Display::displayControlMessageReceived(const Bit8u *messageBytes, Bit32u length) { + Bit8u emptyMessage[] = { 0 }; + if (synth.isDisplayOldMT32Compatible()) { + if (length == 1) { + customDisplayMessageReceived(customMessageBuffer, 0, LCD_TEXT_SIZE); + } else { + customDisplayMessageReceived(emptyMessage, 0, 0); + } + } else { + // Always assume the third byte to be zero for simplicity. + if (length == 2) { + customDisplayMessageReceived(emptyMessage, messageBytes[1] << 7, 0); + } else if (length == 1) { + customMessageBuffer[0] = 0; + customDisplayMessageReceived(emptyMessage, 0x80, 0); + } + } +} + +void Display::scheduleDisplayReset() { + displayResetTimestamp = synth.renderedSampleCount + SCHEDULED_DISPLAY_MODE_RESET_FRAMES; + displayResetScheduled = true; +} + +bool Display::shouldResetTimer(Bit32u scheduledResetTimestamp) { + // Deals with wrapping of renderedSampleCount. + return Bit32s(scheduledResetTimestamp - synth.renderedSampleCount) < 0; +} + +void Display::maybeResetTimer(bool &timerState, Bit32u scheduledResetTimestamp) { + if (timerState && shouldResetTimer(scheduledResetTimestamp)) timerState = false; +} + +} // namespace MT32Emu diff --git a/src/sound/munt/Display.h b/src/sound/munt/Display.h new file mode 100644 index 000000000..1802b0bd2 --- /dev/null +++ b/src/sound/munt/Display.h @@ -0,0 +1,91 @@ +/* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 2.1 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this program. If not, see . + */ + +#ifndef MT32EMU_DISPLAY_H +#define MT32EMU_DISPLAY_H + +#include "globals.h" +#include "Types.h" + +namespace MT32Emu { + +class Synth; + +/** Facilitates emulation of internal state of the MIDI MESSAGE LED and the MT-32 LCD. */ +class Display { +public: + static const unsigned int LCD_TEXT_SIZE = 20; + + enum Mode { + Mode_MAIN, // a.k.a. Master Volume + Mode_STARTUP_MESSAGE, + Mode_PROGRAM_CHANGE, + Mode_CUSTOM_MESSAGE, + Mode_ERROR_MESSAGE + }; + + Display(Synth &synth); + void checkDisplayStateUpdated(bool &midiMessageLEDState, bool &midiMessageLEDUpdated, bool &lcdUpdated); + /** Returns whether the MIDI MESSAGE LED is ON and fills the targetBuffer parameter. */ + bool getDisplayState(char *targetBuffer, bool narrowLCD); + void setMainDisplayMode(); + + void midiMessagePlayed(); + void rhythmNotePlayed(); + void voicePartStateChanged(Bit8u partIndex, bool activated); + void masterVolumeChanged(); + void programChanged(Bit8u partIndex); + void checksumErrorOccurred(); + bool customDisplayMessageReceived(const Bit8u *message, Bit32u startIndex, Bit32u length); + void displayControlMessageReceived(const Bit8u *messageBytes, Bit32u length); + +private: + typedef Bit8u DisplayBuffer[LCD_TEXT_SIZE]; + + static const unsigned int TIMBRE_NAME_SIZE = 10; + + Synth &synth; + + bool lastLEDState; + bool lcdDirty; + bool lcdUpdateSignalled; + bool lastRhythmPartState; + bool voicePartStates[8]; + + Bit8u lastProgramChangePartIndex; + const char *lastProgramChangeSoundGroupName; + Bit8u lastProgramChangeTimbreName[TIMBRE_NAME_SIZE]; + + Mode mode; + Bit32u displayResetTimestamp; + bool displayResetScheduled; + Bit32u midiMessageLEDResetTimestamp; + bool midiMessagePlayedSinceLastReset; + Bit32u rhythmStateResetTimestamp; + bool rhythmNotePlayedSinceLastReset; + + DisplayBuffer displayBuffer; + DisplayBuffer customMessageBuffer; + + void scheduleDisplayReset(); + bool shouldResetTimer(Bit32u scheduledResetTimestamp); + void maybeResetTimer(bool &timerState, Bit32u scheduledResetTimestamp); +}; + +} // namespace MT32Emu + +#endif // #ifndef MT32EMU_DISPLAY_H diff --git a/src/sound/munt/Enumerations.h b/src/sound/munt/Enumerations.h index 05a2b6f6d..3cbfdd4c8 100644 --- a/src/sound/munt/Enumerations.h +++ b/src/sound/munt/Enumerations.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/File.cpp b/src/sound/munt/File.cpp index dbe226648..fb2febeb1 100644 --- a/src/sound/munt/File.cpp +++ b/src/sound/munt/File.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/File.h b/src/sound/munt/File.h index a4b099fbb..2aa34b4c7 100644 --- a/src/sound/munt/File.h +++ b/src/sound/munt/File.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/FileStream.cpp b/src/sound/munt/FileStream.cpp index 3fa1a3107..5e32c10d6 100644 --- a/src/sound/munt/FileStream.cpp +++ b/src/sound/munt/FileStream.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -15,8 +15,8 @@ * along with this program. If not, see . */ -#ifdef MT32EMU_SHARED -#include +#if defined MT32EMU_SHARED && defined MT32EMU_INSTALL_DEFAULT_LOCALE +#include #endif #include "internals.h" @@ -25,13 +25,18 @@ namespace MT32Emu { +// This initialises C locale with the user-preferred system locale once facilitating access +// to ROM files with localised pathnames. This is only necessary in rare cases e.g. when building +// shared library statically linked with C runtime with old MS VC versions, so that the C locale +// set by the client application does not have effect, and thus such ROM files cannot be opened. static inline void configureSystemLocale() { -#ifdef MT32EMU_SHARED +#if defined MT32EMU_SHARED && defined MT32EMU_INSTALL_DEFAULT_LOCALE static bool configured = false; if (configured) return; configured = true; - std::locale::global(std::locale("")); + + setlocale(LC_ALL, ""); #endif } diff --git a/src/sound/munt/FileStream.h b/src/sound/munt/FileStream.h index 2279890b4..3b3976869 100644 --- a/src/sound/munt/FileStream.h +++ b/src/sound/munt/FileStream.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/LA32FloatWaveGenerator.cpp b/src/sound/munt/LA32FloatWaveGenerator.cpp index 34ea1fbf4..7aea6c240 100644 --- a/src/sound/munt/LA32FloatWaveGenerator.cpp +++ b/src/sound/munt/LA32FloatWaveGenerator.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -236,7 +236,7 @@ float LA32FloatWaveGenerator::generateNextSample(const Bit32u ampVal, const Bit1 relWavePos -= cosineLen + hLen; } - // To ensure the output wave has no breaks, two different windows are appied to the beginning and the ending of the resonance sine segment + // To ensure the output wave has no breaks, two different windows are applied to the beginning and the ending of the resonance sine segment if (relWavePos < 0.5f * cosineLen) { float syncSine = sin(FLOAT_PI * relWavePos / cosineLen); if (relWavePos < 0.0f) { diff --git a/src/sound/munt/LA32FloatWaveGenerator.h b/src/sound/munt/LA32FloatWaveGenerator.h index a21d68e2b..b34c1fa86 100644 --- a/src/sound/munt/LA32FloatWaveGenerator.h +++ b/src/sound/munt/LA32FloatWaveGenerator.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/LA32Ramp.cpp b/src/sound/munt/LA32Ramp.cpp index 122ee05ac..cc61d8357 100644 --- a/src/sound/munt/LA32Ramp.cpp +++ b/src/sound/munt/LA32Ramp.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/LA32Ramp.h b/src/sound/munt/LA32Ramp.h index 802b34aa4..178e16b60 100644 --- a/src/sound/munt/LA32Ramp.h +++ b/src/sound/munt/LA32Ramp.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/LA32WaveGenerator.cpp b/src/sound/munt/LA32WaveGenerator.cpp index f4f7eeccb..cf1a34c9c 100644 --- a/src/sound/munt/LA32WaveGenerator.cpp +++ b/src/sound/munt/LA32WaveGenerator.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -173,7 +173,7 @@ void LA32WaveGenerator::generateNextResonanceWaveLogSample() { // Unsure about resonanceSinePosition here. It's possible that dedicated counter & decrement are used. Although, cutoff is finely ramped, so maybe not. logSampleValue += resonanceAmpSubtraction + (((resonanceSinePosition >> 4) * decayFactor) >> 8); - // To ensure the output wave has no breaks, two different windows are appied to the beginning and the ending of the resonance sine segment + // To ensure the output wave has no breaks, two different windows are applied to the beginning and the ending of the resonance sine segment if (phase == POSITIVE_RISING_SINE_SEGMENT || phase == NEGATIVE_FALLING_SINE_SEGMENT) { // The window is synchronous sine here logSampleValue += Tables::getInstance().logsin9[(squareWavePosition >> 9) & 511] << 2; @@ -183,7 +183,7 @@ void LA32WaveGenerator::generateNextResonanceWaveLogSample() { } if (cutoffVal < MIDDLE_CUTOFF_VALUE) { - // For the cutoff values below the cutoff middle point, it seems the amp of the resonance wave is expotentially decayed + // For the cutoff values below the cutoff middle point, it seems the amp of the resonance wave is exponentially decayed logSampleValue += 31743 + ((MIDDLE_CUTOFF_VALUE - cutoffVal) >> 9); } else if (cutoffVal < RESONANCE_DECAY_THRESHOLD_CUTOFF_VALUE) { // For the cutoff values below this point, the amp of the resonance wave is sinusoidally decayed diff --git a/src/sound/munt/LA32WaveGenerator.h b/src/sound/munt/LA32WaveGenerator.h index d2d74f48d..71d909df8 100644 --- a/src/sound/munt/LA32WaveGenerator.h +++ b/src/sound/munt/LA32WaveGenerator.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/MemoryRegion.h b/src/sound/munt/MemoryRegion.h index c8e85c7fb..1f224768c 100644 --- a/src/sound/munt/MemoryRegion.h +++ b/src/sound/munt/MemoryRegion.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -120,7 +120,9 @@ public: }; class DisplayMemoryRegion : public MemoryRegion { public: - DisplayMemoryRegion(Synth *useSynth) : MemoryRegion(useSynth, NULL, NULL, MR_Display, MT32EMU_MEMADDR(0x200000), SYSEX_BUFFER_SIZE - 1, 1) {} + // Note, we set realMemory to NULL despite the real devices buffer inbound strings. However, it is impossible to retrieve them. + // This entrySize permits emulation of handling a 20-byte display message sent to an old-gen device at address 0x207F7F. + DisplayMemoryRegion(Synth *useSynth) : MemoryRegion(useSynth, NULL, NULL, MR_Display, MT32EMU_MEMADDR(0x200000), 0x4013, 1) {} }; class ResetMemoryRegion : public MemoryRegion { public: diff --git a/src/sound/munt/MidiEventQueue.h b/src/sound/munt/MidiEventQueue.h index 846f47c51..b458b8190 100644 --- a/src/sound/munt/MidiEventQueue.h +++ b/src/sound/munt/MidiEventQueue.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/MidiStreamParser.cpp b/src/sound/munt/MidiStreamParser.cpp index e9fbf7690..7b64f97f9 100644 --- a/src/sound/munt/MidiStreamParser.cpp +++ b/src/sound/munt/MidiStreamParser.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/MidiStreamParser.h b/src/sound/munt/MidiStreamParser.h index f26fe11b7..d3a76c8a0 100644 --- a/src/sound/munt/MidiStreamParser.h +++ b/src/sound/munt/MidiStreamParser.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/Part.cpp b/src/sound/munt/Part.cpp index 465903a72..5888b97b2 100644 --- a/src/sound/munt/Part.cpp +++ b/src/sound/munt/Part.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -59,10 +59,12 @@ Part::Part(Synth *useSynth, unsigned int usePartNum) { } currentInstr[0] = 0; currentInstr[10] = 0; + volumeOverride = 255; modulation = 0; expression = 100; pitchBend = 0; activePartialCount = 0; + activeNonReleasingPolyCount = 0; memset(patchCache, 0, sizeof(patchCache)); } @@ -166,7 +168,7 @@ void Part::refresh() { patchCache[t].reverb = patchTemp->patch.reverbSwitch > 0; } memcpy(currentInstr, timbreTemp->common.name, 10); - synth->newTimbreSet(partNum, patchTemp->patch.timbreGroup, patchTemp->patch.timbreNum, currentInstr); + synth->newTimbreSet(partNum); updatePitchBenderRange(); } @@ -317,7 +319,21 @@ void Part::setVolume(unsigned int midiVolume) { } Bit8u Part::getVolume() const { - return patchTemp->outputLevel; + return volumeOverride <= 100 ? volumeOverride : patchTemp->outputLevel; +} + +void Part::setVolumeOverride(Bit8u volume) { + volumeOverride = volume; + // When volume is 0, we want the part to stop producing any sound at all. + // For that to achieve, we have to actually stop processing NoteOn MIDI messages; merely + // returning 0 volume is not enough - the output may still be generated at a very low level. + // But first, we have to stop all the currently playing polys. This behaviour may also help + // with performance issues, because parts muted this way barely consume CPU resources. + if (volume == 0) allSoundOff(); +} + +Bit8u Part::getVolumeOverride() const { + return volumeOverride; } Bit8u Part::getExpression() const { @@ -380,6 +396,7 @@ void RhythmPart::noteOn(unsigned int midiKey, unsigned int velocity) { synth->printDebug("%s: Attempted to play invalid key %d (velocity %d)", name, midiKey, velocity); return; } + synth->rhythmNotePlayed(); unsigned int key = midiKey; unsigned int drumNum = key - 24; int drumTimbreNum = rhythmTemp[drumNum].timbre; @@ -609,6 +626,27 @@ void Part::partialDeactivated(Poly *poly) { } } +void RhythmPart::polyStateChanged(PolyState, PolyState) {} + +void Part::polyStateChanged(PolyState oldState, PolyState newState) { + switch (newState) { + case POLY_Playing: + if (activeNonReleasingPolyCount++ == 0) synth->voicePartStateChanged(partNum, true); + break; + case POLY_Releasing: + case POLY_Inactive: + if (oldState == POLY_Playing || oldState == POLY_Held) { + if (--activeNonReleasingPolyCount == 0) synth->voicePartStateChanged(partNum, false); + } + break; + default: + break; + } +#ifdef MT32EMU_TRACE_POLY_STATE_CHANGES + synth->printDebug("Part %d: Changed poly state %d->%d, activeNonReleasingPolyCount=%d", partNum, oldState, newState, activeNonReleasingPolyCount); +#endif +} + PolyList::PolyList() : firstPoly(NULL), lastPoly(NULL) {} bool PolyList::isEmpty() const { diff --git a/src/sound/munt/Part.h b/src/sound/munt/Part.h index bc2e11416..d266efb7e 100644 --- a/src/sound/munt/Part.h +++ b/src/sound/munt/Part.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -55,6 +55,7 @@ private: bool holdpedal; unsigned int activePartialCount; + unsigned int activeNonReleasingPolyCount; PatchCache patchCache[4]; PolyList activePolys; @@ -69,6 +70,8 @@ protected: MemParams::PatchTemp *patchTemp; char name[8]; // "Part 1".."Part 8", "Rhythm" char currentInstr[11]; + // Values outside the valid range 0..100 imply no override. + Bit8u volumeOverride; Bit8u modulation; Bit8u expression; Bit32s pitchBend; @@ -95,8 +98,10 @@ public: virtual void noteOff(unsigned int midiKey); void allNotesOff(); void allSoundOff(); - Bit8u getVolume() const; // Internal volume, 0-100, exposed for use by ExternalInterface - void setVolume(unsigned int midiVolume); + Bit8u getVolume() const; // Effective output level, valid range 0..100. + void setVolume(unsigned int midiVolume); // Valid range 0..127, as defined for MIDI controller 7. + Bit8u getVolumeOverride() const; + void setVolumeOverride(Bit8u volumeOverride); Bit8u getModulation() const; void setModulation(unsigned int midiModulation); Bit8u getExpression() const; @@ -122,6 +127,7 @@ public: // This should only be called by Poly void partialDeactivated(Poly *poly); + virtual void polyStateChanged(PolyState oldState, PolyState newState); // These are rather specialised, and should probably only be used by PartialManager bool abortFirstPoly(PolyState polyState); @@ -146,6 +152,7 @@ public: unsigned int getAbsTimbreNum() const; void setPan(unsigned int midiPan); void setProgram(unsigned int patchNum); + void polyStateChanged(PolyState oldState, PolyState newState); }; } // namespace MT32Emu diff --git a/src/sound/munt/Partial.cpp b/src/sound/munt/Partial.cpp index 877d93b45..2a4b21d9f 100644 --- a/src/sound/munt/Partial.cpp +++ b/src/sound/munt/Partial.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/Partial.h b/src/sound/munt/Partial.h index 0c4355742..bfc6f6dca 100644 --- a/src/sound/munt/Partial.h +++ b/src/sound/munt/Partial.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/PartialManager.cpp b/src/sound/munt/PartialManager.cpp index 508d5fa6c..609adaa74 100644 --- a/src/sound/munt/PartialManager.cpp +++ b/src/sound/munt/PartialManager.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/PartialManager.h b/src/sound/munt/PartialManager.h index 6b59857cc..5c019effe 100644 --- a/src/sound/munt/PartialManager.h +++ b/src/sound/munt/PartialManager.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/Poly.cpp b/src/sound/munt/Poly.cpp index f37e471d4..0306e51ff 100644 --- a/src/sound/munt/Poly.cpp +++ b/src/sound/munt/Poly.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -53,7 +53,7 @@ void Poly::reset(unsigned int newKey, unsigned int newVelocity, bool newSustain, activePartialCount--; } } - state = POLY_Inactive; + setState(POLY_Inactive); } key = newKey; @@ -65,7 +65,7 @@ void Poly::reset(unsigned int newKey, unsigned int newVelocity, bool newSustain, partials[i] = newPartials[i]; if (newPartials[i] != NULL) { activePartialCount++; - state = POLY_Playing; + setState(POLY_Playing); } } } @@ -80,7 +80,7 @@ bool Poly::noteOff(bool pedalHeld) { if (state == POLY_Held) { return false; } - state = POLY_Held; + setState(POLY_Held); } else { startDecay(); } @@ -98,7 +98,7 @@ bool Poly::startDecay() { if (state == POLY_Inactive || state == POLY_Releasing) { return false; } - state = POLY_Releasing; + setState(POLY_Releasing); for (int t = 0; t < 4; t++) { Partial *partial = partials[t]; @@ -123,6 +123,13 @@ bool Poly::startAbort() { return true; } +void Poly::setState(PolyState newState) { + if (state == newState) return; + PolyState oldState = state; + state = newState; + part->polyStateChanged(oldState, newState); +} + void Poly::backupCacheToPartials(PatchCache cache[4]) { for (int partialNum = 0; partialNum < 4; partialNum++) { Partial *partial = partials[partialNum]; @@ -171,7 +178,7 @@ void Poly::partialDeactivated(Partial *partial) { } } if (activePartialCount == 0) { - state = POLY_Inactive; + setState(POLY_Inactive); if (part->getSynth()->abortingPoly == this) { part->getSynth()->abortingPoly = NULL; } diff --git a/src/sound/munt/Poly.h b/src/sound/munt/Poly.h index 5b7cc30e4..dd6def094 100644 --- a/src/sound/munt/Poly.h +++ b/src/sound/munt/Poly.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -41,6 +41,8 @@ private: Poly *next; + void setState(PolyState state); + public: Poly(); void setPart(Part *usePart); diff --git a/src/sound/munt/ROMInfo.cpp b/src/sound/munt/ROMInfo.cpp index 308d3eb1e..0f58cd292 100644 --- a/src/sound/munt/ROMInfo.cpp +++ b/src/sound/munt/ROMInfo.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -19,45 +19,164 @@ #include "internals.h" +#include "File.h" #include "ROMInfo.h" namespace MT32Emu { -static const ROMInfo *getKnownROMInfoFromList(Bit32u index) { - // Known ROMs - static const ROMInfo CTRL_MT32_V1_04 = {65536, "5a5cb5a77d7d55ee69657c2f870416daed52dea7", ROMInfo::Control, "ctrl_mt32_1_04", "MT-32 Control v1.04", ROMInfo::Full, NULL}; - static const ROMInfo CTRL_MT32_V1_05 = {65536, "e17a3a6d265bf1fa150312061134293d2b58288c", ROMInfo::Control, "ctrl_mt32_1_05", "MT-32 Control v1.05", ROMInfo::Full, NULL}; - static const ROMInfo CTRL_MT32_V1_06 = {65536, "a553481f4e2794c10cfe597fef154eef0d8257de", ROMInfo::Control, "ctrl_mt32_1_06", "MT-32 Control v1.06", ROMInfo::Full, NULL}; - static const ROMInfo CTRL_MT32_V1_07 = {65536, "b083518fffb7f66b03c23b7eb4f868e62dc5a987", ROMInfo::Control, "ctrl_mt32_1_07", "MT-32 Control v1.07", ROMInfo::Full, NULL}; - static const ROMInfo CTRL_MT32_BLUER = {65536, "7b8c2a5ddb42fd0732e2f22b3340dcf5360edf92", ROMInfo::Control, "ctrl_mt32_bluer", "MT-32 Control BlueRidge", ROMInfo::Full, NULL}; +namespace { +struct ROMInfoList { + const ROMInfo * const *romInfos; + const Bit32u itemCount; +}; + +struct ROMInfoLists { + ROMInfoList mt32_1_04; + ROMInfoList mt32_1_05; + ROMInfoList mt32_1_06; + ROMInfoList mt32_1_07; + ROMInfoList mt32_bluer; + ROMInfoList mt32_2_03; + ROMInfoList mt32_2_04; + ROMInfoList mt32_2_06; + ROMInfoList mt32_2_07; + ROMInfoList cm32l_1_00; + ROMInfoList cm32l_1_02; + ROMInfoList cm32ln_1_00; + ROMInfoList fullROMInfos; + ROMInfoList partialROMInfos; + ROMInfoList allROMInfos; +}; + +} + +#define _CALC_ARRAY_LENGTH(x) Bit32u(sizeof (x) / sizeof *(x) - 1) + +static const ROMInfoLists &getROMInfoLists() { + static ROMInfo CTRL_MT32_V1_04_A = {32768, "9cd4858014c4e8a9dff96053f784bfaac1092a2e", ROMInfo::Control, "ctrl_mt32_1_04_a", "MT-32 Control v1.04", ROMInfo::Mux0, NULL}; + static ROMInfo CTRL_MT32_V1_04_B = {32768, "fe8db469b5bfeb37edb269fd47e3ce6d91014652", ROMInfo::Control, "ctrl_mt32_1_04_b", "MT-32 Control v1.04", ROMInfo::Mux1, &CTRL_MT32_V1_04_A}; + static ROMInfo CTRL_MT32_V1_04 = {65536, "5a5cb5a77d7d55ee69657c2f870416daed52dea7", ROMInfo::Control, "ctrl_mt32_1_04", "MT-32 Control v1.04", ROMInfo::Full, NULL}; + static ROMInfo CTRL_MT32_V1_05_A = {32768, "57a09d80d2f7ca5b9734edbe9645e6e700f83701", ROMInfo::Control, "ctrl_mt32_1_05_a", "MT-32 Control v1.05", ROMInfo::Mux0, NULL}; + static ROMInfo CTRL_MT32_V1_05_B = {32768, "52e3c6666db9ef962591a8ee99be0cde17f3a6b6", ROMInfo::Control, "ctrl_mt32_1_05_b", "MT-32 Control v1.05", ROMInfo::Mux1, &CTRL_MT32_V1_05_A}; + static ROMInfo CTRL_MT32_V1_05 = {65536, "e17a3a6d265bf1fa150312061134293d2b58288c", ROMInfo::Control, "ctrl_mt32_1_05", "MT-32 Control v1.05", ROMInfo::Full, NULL}; + static ROMInfo CTRL_MT32_V1_06_A = {32768, "cc83bf23cee533097fb4c7e2c116e43b50ebacc8", ROMInfo::Control, "ctrl_mt32_1_06_a", "MT-32 Control v1.06", ROMInfo::Mux0, NULL}; + static ROMInfo CTRL_MT32_V1_06_B = {32768, "bf4f15666bc46679579498386704893b630c1171", ROMInfo::Control, "ctrl_mt32_1_06_b", "MT-32 Control v1.06", ROMInfo::Mux1, &CTRL_MT32_V1_06_A}; + static ROMInfo CTRL_MT32_V1_06 = {65536, "a553481f4e2794c10cfe597fef154eef0d8257de", ROMInfo::Control, "ctrl_mt32_1_06", "MT-32 Control v1.06", ROMInfo::Full, NULL}; + static ROMInfo CTRL_MT32_V1_07_A = {32768, "13f06b38f0d9e0fc050b6503ab777bb938603260", ROMInfo::Control, "ctrl_mt32_1_07_a", "MT-32 Control v1.07", ROMInfo::Mux0, NULL}; + static ROMInfo CTRL_MT32_V1_07_B = {32768, "c55e165487d71fa88bd8c5e9c083bc456c1a89aa", ROMInfo::Control, "ctrl_mt32_1_07_b", "MT-32 Control v1.07", ROMInfo::Mux1, &CTRL_MT32_V1_07_A}; + static ROMInfo CTRL_MT32_V1_07 = {65536, "b083518fffb7f66b03c23b7eb4f868e62dc5a987", ROMInfo::Control, "ctrl_mt32_1_07", "MT-32 Control v1.07", ROMInfo::Full, NULL}; + static ROMInfo CTRL_MT32_BLUER_A = {32768, "11a6ae5d8b6ee328b371af7f1e40b82125aa6b4d", ROMInfo::Control, "ctrl_mt32_bluer_a", "MT-32 Control BlueRidge", ROMInfo::Mux0, NULL}; + static ROMInfo CTRL_MT32_BLUER_B = {32768, "e0934320d7cbb5edfaa29e0d01ae835ef620085b", ROMInfo::Control, "ctrl_mt32_bluer_b", "MT-32 Control BlueRidge", ROMInfo::Mux1, &CTRL_MT32_BLUER_A}; + static ROMInfo CTRL_MT32_BLUER = {65536, "7b8c2a5ddb42fd0732e2f22b3340dcf5360edf92", ROMInfo::Control, "ctrl_mt32_bluer", "MT-32 Control BlueRidge", ROMInfo::Full, NULL}; + + static const ROMInfo CTRL_MT32_V2_03 = {131072, "5837064c9df4741a55f7c4d8787ac158dff2d3ce", ROMInfo::Control, "ctrl_mt32_2_03", "MT-32 Control v2.03", ROMInfo::Full, NULL}; static const ROMInfo CTRL_MT32_V2_04 = {131072, "2c16432b6c73dd2a3947cba950a0f4c19d6180eb", ROMInfo::Control, "ctrl_mt32_2_04", "MT-32 Control v2.04", ROMInfo::Full, NULL}; + static const ROMInfo CTRL_MT32_V2_06 = {131072, "2869cf4c235d671668cfcb62415e2ce8323ad4ed", ROMInfo::Control, "ctrl_mt32_2_06", "MT-32 Control v2.06", ROMInfo::Full, NULL}; + static const ROMInfo CTRL_MT32_V2_07 = {131072, "47b52adefedaec475c925e54340e37673c11707c", ROMInfo::Control, "ctrl_mt32_2_07", "MT-32 Control v2.07", ROMInfo::Full, NULL}; static const ROMInfo CTRL_CM32L_V1_00 = {65536, "73683d585cd6948cc19547942ca0e14a0319456d", ROMInfo::Control, "ctrl_cm32l_1_00", "CM-32L/LAPC-I Control v1.00", ROMInfo::Full, NULL}; static const ROMInfo CTRL_CM32L_V1_02 = {65536, "a439fbb390da38cada95a7cbb1d6ca199cd66ef8", ROMInfo::Control, "ctrl_cm32l_1_02", "CM-32L/LAPC-I Control v1.02", ROMInfo::Full, NULL}; + static const ROMInfo CTRL_CM32LN_V1_00 = {65536, "dc1c5b1b90a4646d00f7daf3679733c7badc7077", ROMInfo::Control, "ctrl_cm32ln_1_00", "CM-32LN/CM-500/LAPC-N Control v1.00", ROMInfo::Full, NULL}; - static const ROMInfo PCM_MT32 = {524288, "f6b1eebc4b2d200ec6d3d21d51325d5b48c60252", ROMInfo::PCM, "pcm_mt32", "MT-32 PCM ROM", ROMInfo::Full, NULL}; - static const ROMInfo PCM_CM32L = {1048576, "289cc298ad532b702461bfc738009d9ebe8025ea", ROMInfo::PCM, "pcm_cm32l", "CM-32L/CM-64/LAPC-I PCM ROM", ROMInfo::Full, NULL}; + static ROMInfo PCM_MT32_L = {262144, "3a1e19b0cd4036623fd1d1d11f5f25995585962b", ROMInfo::PCM, "pcm_mt32_l", "MT-32 PCM ROM", ROMInfo::FirstHalf, NULL}; + static ROMInfo PCM_MT32_H = {262144, "2cadb99d21a6a4a6f5b61b6218d16e9b43f61d01", ROMInfo::PCM, "pcm_mt32_h", "MT-32 PCM ROM", ROMInfo::SecondHalf, &PCM_MT32_L}; + static ROMInfo PCM_MT32 = {524288, "f6b1eebc4b2d200ec6d3d21d51325d5b48c60252", ROMInfo::PCM, "pcm_mt32", "MT-32 PCM ROM", ROMInfo::Full, NULL}; + // Alias of PCM_MT32 ROM, only useful for pairing with PCM_CM32L_H. + static ROMInfo PCM_CM32L_L = {524288, "f6b1eebc4b2d200ec6d3d21d51325d5b48c60252", ROMInfo::PCM, "pcm_cm32l_l", "CM-32L/CM-64/LAPC-I PCM ROM", ROMInfo::FirstHalf, NULL}; + static ROMInfo PCM_CM32L_H = {524288, "3ad889fde5db5b6437cbc2eb6e305312fec3df93", ROMInfo::PCM, "pcm_cm32l_h", "CM-32L/CM-64/LAPC-I PCM ROM", ROMInfo::SecondHalf, &PCM_CM32L_L}; + static ROMInfo PCM_CM32L = {1048576, "289cc298ad532b702461bfc738009d9ebe8025ea", ROMInfo::PCM, "pcm_cm32l", "CM-32L/CM-64/LAPC-I PCM ROM", ROMInfo::Full, NULL}; - static const ROMInfo * const ROM_INFOS[] = { + static const ROMInfo * const FULL_ROM_INFOS[] = { &CTRL_MT32_V1_04, &CTRL_MT32_V1_05, &CTRL_MT32_V1_06, &CTRL_MT32_V1_07, &CTRL_MT32_BLUER, + &CTRL_MT32_V2_03, &CTRL_MT32_V2_04, + &CTRL_MT32_V2_06, + &CTRL_MT32_V2_07, &CTRL_CM32L_V1_00, &CTRL_CM32L_V1_02, + &CTRL_CM32LN_V1_00, &PCM_MT32, &PCM_CM32L, - NULL}; + NULL + }; + static const ROMInfo * const PARTIAL_ROM_INFOS[] = { + &CTRL_MT32_V1_04_A, &CTRL_MT32_V1_04_B, + &CTRL_MT32_V1_05_A, &CTRL_MT32_V1_05_B, + &CTRL_MT32_V1_06_A, &CTRL_MT32_V1_06_B, + &CTRL_MT32_V1_07_A, &CTRL_MT32_V1_07_B, + &CTRL_MT32_BLUER_A, &CTRL_MT32_BLUER_B, + &PCM_MT32_L, &PCM_MT32_H, + &PCM_CM32L_L, &PCM_CM32L_H, + NULL + }; + static const ROMInfo *ALL_ROM_INFOS[_CALC_ARRAY_LENGTH(FULL_ROM_INFOS) + _CALC_ARRAY_LENGTH(PARTIAL_ROM_INFOS) + 1]; - return ROM_INFOS[index]; + if (CTRL_MT32_V1_04_A.pairROMInfo == NULL) { + CTRL_MT32_V1_04_A.pairROMInfo = &CTRL_MT32_V1_04_B; + CTRL_MT32_V1_05_A.pairROMInfo = &CTRL_MT32_V1_05_B; + CTRL_MT32_V1_06_A.pairROMInfo = &CTRL_MT32_V1_06_B; + CTRL_MT32_V1_07_A.pairROMInfo = &CTRL_MT32_V1_07_B; + CTRL_MT32_BLUER_A.pairROMInfo = &CTRL_MT32_BLUER_B; + PCM_MT32_L.pairROMInfo = &PCM_MT32_H; + PCM_CM32L_L.pairROMInfo = &PCM_CM32L_H; + + memcpy(&ALL_ROM_INFOS[0], FULL_ROM_INFOS, sizeof FULL_ROM_INFOS); + memcpy(&ALL_ROM_INFOS[_CALC_ARRAY_LENGTH(FULL_ROM_INFOS)], PARTIAL_ROM_INFOS, sizeof PARTIAL_ROM_INFOS); // Includes NULL terminator. + } + + static const ROMInfo * const MT32_V1_04_ROMS[] = {&CTRL_MT32_V1_04, &PCM_MT32, &CTRL_MT32_V1_04_A, &CTRL_MT32_V1_04_B, &PCM_MT32_L, &PCM_MT32_H, NULL}; + static const ROMInfo * const MT32_V1_05_ROMS[] = {&CTRL_MT32_V1_05, &PCM_MT32, &CTRL_MT32_V1_05_A, &CTRL_MT32_V1_05_B, &PCM_MT32_L, &PCM_MT32_H, NULL}; + static const ROMInfo * const MT32_V1_06_ROMS[] = {&CTRL_MT32_V1_06, &PCM_MT32, &CTRL_MT32_V1_06_A, &CTRL_MT32_V1_06_B, &PCM_MT32_L, &PCM_MT32_H, NULL}; + static const ROMInfo * const MT32_V1_07_ROMS[] = {&CTRL_MT32_V1_07, &PCM_MT32, &CTRL_MT32_V1_07_A, &CTRL_MT32_V1_07_B, &PCM_MT32_L, &PCM_MT32_H, NULL}; + static const ROMInfo * const MT32_BLUER_ROMS[] = {&CTRL_MT32_BLUER, &PCM_MT32, &CTRL_MT32_BLUER_A, &CTRL_MT32_BLUER_B, &PCM_MT32_L, &PCM_MT32_H, NULL}; + static const ROMInfo * const MT32_V2_03_ROMS[] = {&CTRL_MT32_V2_03, &PCM_MT32, &PCM_MT32_L, &PCM_MT32_H, NULL}; + static const ROMInfo * const MT32_V2_04_ROMS[] = {&CTRL_MT32_V2_04, &PCM_MT32, &PCM_MT32_L, &PCM_MT32_H, NULL}; + static const ROMInfo * const MT32_V2_06_ROMS[] = {&CTRL_MT32_V2_06, &PCM_MT32, &PCM_MT32_L, &PCM_MT32_H, NULL}; + static const ROMInfo * const MT32_V2_07_ROMS[] = {&CTRL_MT32_V2_07, &PCM_MT32, &PCM_MT32_L, &PCM_MT32_H, NULL}; + static const ROMInfo * const CM32L_V1_00_ROMS[] = {&CTRL_CM32L_V1_00, &PCM_CM32L, &PCM_CM32L_L, &PCM_CM32L_H, NULL}; + static const ROMInfo * const CM32L_V1_02_ROMS[] = {&CTRL_CM32L_V1_02, &PCM_CM32L, &PCM_CM32L_L, &PCM_CM32L_H, NULL}; + static const ROMInfo * const CM32LN_V1_00_ROMS[] = {&CTRL_CM32LN_V1_00, &PCM_CM32L, NULL}; + + static const ROMInfoLists romInfoLists = { + {MT32_V1_04_ROMS, _CALC_ARRAY_LENGTH(MT32_V1_04_ROMS)}, + {MT32_V1_05_ROMS, _CALC_ARRAY_LENGTH(MT32_V1_05_ROMS)}, + {MT32_V1_06_ROMS, _CALC_ARRAY_LENGTH(MT32_V1_06_ROMS)}, + {MT32_V1_07_ROMS, _CALC_ARRAY_LENGTH(MT32_V1_07_ROMS)}, + {MT32_BLUER_ROMS, _CALC_ARRAY_LENGTH(MT32_BLUER_ROMS)}, + {MT32_V2_03_ROMS, _CALC_ARRAY_LENGTH(MT32_V2_03_ROMS)}, + {MT32_V2_04_ROMS, _CALC_ARRAY_LENGTH(MT32_V2_04_ROMS)}, + {MT32_V2_06_ROMS, _CALC_ARRAY_LENGTH(MT32_V2_06_ROMS)}, + {MT32_V2_07_ROMS, _CALC_ARRAY_LENGTH(MT32_V2_07_ROMS)}, + {CM32L_V1_00_ROMS, _CALC_ARRAY_LENGTH(CM32L_V1_00_ROMS)}, + {CM32L_V1_02_ROMS, _CALC_ARRAY_LENGTH(CM32L_V1_02_ROMS)}, + {CM32LN_V1_00_ROMS, _CALC_ARRAY_LENGTH(CM32LN_V1_00_ROMS)}, + {FULL_ROM_INFOS, _CALC_ARRAY_LENGTH(FULL_ROM_INFOS)}, + {PARTIAL_ROM_INFOS, _CALC_ARRAY_LENGTH(PARTIAL_ROM_INFOS)}, + {ALL_ROM_INFOS, _CALC_ARRAY_LENGTH(ALL_ROM_INFOS)} + }; + return romInfoLists; } -const ROMInfo* ROMInfo::getROMInfo(File *file) { +static const ROMInfo * const *getKnownROMInfoList() { + return getROMInfoLists().allROMInfos.romInfos; +} + +static const ROMInfo *getKnownROMInfoFromList(Bit32u index) { + return getKnownROMInfoList()[index]; +} + +const ROMInfo *ROMInfo::getROMInfo(File *file) { + return getROMInfo(file, getKnownROMInfoList()); +} + +const ROMInfo *ROMInfo::getROMInfo(File *file, const ROMInfo * const *romInfos) { size_t fileSize = file->getSize(); - for (Bit32u i = 0; getKnownROMInfoFromList(i) != NULL; i++) { - const ROMInfo *romInfo = getKnownROMInfoFromList(i); + for (Bit32u i = 0; romInfos[i] != NULL; i++) { + const ROMInfo *romInfo = romInfos[i]; if (fileSize == romInfo->fileSize && !strcmp(file->getSHA1(), romInfo->sha1Digest)) { return romInfo; } @@ -69,17 +188,11 @@ void ROMInfo::freeROMInfo(const ROMInfo *romInfo) { (void) romInfo; } -static Bit32u getROMCount() { - Bit32u count; - for(count = 0; getKnownROMInfoFromList(count) != NULL; count++) { - } - return count; -} - -const ROMInfo** ROMInfo::getROMInfoList(Bit32u types, Bit32u pairTypes) { - const ROMInfo **romInfoList = new const ROMInfo*[getROMCount() + 1]; +const ROMInfo **ROMInfo::getROMInfoList(Bit32u types, Bit32u pairTypes) { + Bit32u romCount = getROMInfoLists().allROMInfos.itemCount; // Excludes the NULL terminator. + const ROMInfo **romInfoList = new const ROMInfo*[romCount + 1]; const ROMInfo **currentROMInList = romInfoList; - for (Bit32u i = 0; getKnownROMInfoFromList(i) != NULL; i++) { + for (Bit32u i = 0; i < romCount; i++) { const ROMInfo *romInfo = getKnownROMInfoFromList(i); if ((types & (1 << romInfo->type)) && (pairTypes & (1 << romInfo->pairType))) { *currentROMInList++ = romInfo; @@ -93,27 +206,157 @@ void ROMInfo::freeROMInfoList(const ROMInfo **romInfoList) { delete[] romInfoList; } -ROMImage::ROMImage(File *useFile) : file(useFile), romInfo(ROMInfo::getROMInfo(file)) +const ROMInfo * const *ROMInfo::getAllROMInfos(Bit32u *itemCount) { + if (itemCount != NULL) *itemCount = getROMInfoLists().allROMInfos.itemCount; + return getROMInfoLists().allROMInfos.romInfos; +} + +const ROMInfo * const *ROMInfo::getFullROMInfos(Bit32u *itemCount) { + if (itemCount != NULL) *itemCount = getROMInfoLists().fullROMInfos.itemCount; + return getROMInfoLists().fullROMInfos.romInfos; +} + +const ROMInfo * const *ROMInfo::getPartialROMInfos(Bit32u *itemCount) { + if (itemCount != NULL) *itemCount = getROMInfoLists().partialROMInfos.itemCount; + return getROMInfoLists().partialROMInfos.romInfos; +} + +const ROMImage *ROMImage::makeFullROMImage(Bit8u *data, size_t dataSize) { + return new ROMImage(new ArrayFile(data, dataSize), true, getKnownROMInfoList()); +} + +const ROMImage *ROMImage::appendImages(const ROMImage *romImageLow, const ROMImage *romImageHigh) { + const Bit8u *romDataLow = romImageLow->getFile()->getData(); + const Bit8u *romDataHigh = romImageHigh->getFile()->getData(); + size_t partSize = romImageLow->getFile()->getSize(); + Bit8u *data = new Bit8u[2 * partSize]; + memcpy(data, romDataLow, partSize); + memcpy(data + partSize, romDataHigh, partSize); + const ROMImage *romImageFull = makeFullROMImage(data, 2 * partSize); + if (romImageFull->getROMInfo() == NULL) { + freeROMImage(romImageFull); + return NULL; + } + return romImageFull; +} + +const ROMImage *ROMImage::interleaveImages(const ROMImage *romImageEven, const ROMImage *romImageOdd) { + const Bit8u *romDataEven = romImageEven->getFile()->getData(); + const Bit8u *romDataOdd = romImageOdd->getFile()->getData(); + size_t partSize = romImageEven->getFile()->getSize(); + Bit8u *data = new Bit8u[2 * partSize]; + Bit8u *writePtr = data; + for (size_t romDataIx = 0; romDataIx < partSize; romDataIx++) { + *(writePtr++) = romDataEven[romDataIx]; + *(writePtr++) = romDataOdd[romDataIx]; + } + const ROMImage *romImageFull = makeFullROMImage(data, 2 * partSize); + if (romImageFull->getROMInfo() == NULL) { + freeROMImage(romImageFull); + return NULL; + } + return romImageFull; +} + +ROMImage::ROMImage(File *useFile, bool useOwnFile, const ROMInfo * const *romInfos) : + file(useFile), ownFile(useOwnFile), romInfo(ROMInfo::getROMInfo(file, romInfos)) {} ROMImage::~ROMImage() { ROMInfo::freeROMInfo(romInfo); + if (ownFile) { + const Bit8u *data = file->getData(); + delete file; + delete[] data; + } } -const ROMImage* ROMImage::makeROMImage(File *file) { - return new ROMImage(file); +const ROMImage *ROMImage::makeROMImage(File *file) { + return new ROMImage(file, false, getKnownROMInfoList()); +} + +const ROMImage *ROMImage::makeROMImage(File *file, const ROMInfo * const *romInfos) { + return new ROMImage(file, false, romInfos); +} + +const ROMImage *ROMImage::makeROMImage(File *file1, File *file2) { + const ROMInfo * const *partialROMInfos = getROMInfoLists().partialROMInfos.romInfos; + const ROMImage *image1 = makeROMImage(file1, partialROMInfos); + const ROMImage *image2 = makeROMImage(file2, partialROMInfos); + const ROMImage *fullImage = image1->getROMInfo() == NULL || image2->getROMInfo() == NULL ? NULL : mergeROMImages(image1, image2); + freeROMImage(image1); + freeROMImage(image2); + return fullImage; } void ROMImage::freeROMImage(const ROMImage *romImage) { delete romImage; } -File* ROMImage::getFile() const { +const ROMImage *ROMImage::mergeROMImages(const ROMImage *romImage1, const ROMImage *romImage2) { + if (romImage1->romInfo->pairROMInfo != romImage2->romInfo) { + return NULL; + } + switch (romImage1->romInfo->pairType) { + case ROMInfo::FirstHalf: + return appendImages(romImage1, romImage2); + case ROMInfo::SecondHalf: + return appendImages(romImage2, romImage1); + case ROMInfo::Mux0: + return interleaveImages(romImage1, romImage2); + case ROMInfo::Mux1: + return interleaveImages(romImage2, romImage1); + default: + break; + } + return NULL; +} + +File *ROMImage::getFile() const { return file; } -const ROMInfo* ROMImage::getROMInfo() const { +bool ROMImage::isFileUserProvided() const { + return !ownFile; +} + +const ROMInfo *ROMImage::getROMInfo() const { return romInfo; } +const MachineConfiguration * const *MachineConfiguration::getAllMachineConfigurations(Bit32u *itemCount) { + static const ROMInfoLists &romInfoLists = getROMInfoLists(); + static const MachineConfiguration MT32_1_04 = MachineConfiguration("mt32_1_04", romInfoLists.mt32_1_04.romInfos, romInfoLists.mt32_1_04.itemCount); + static const MachineConfiguration MT32_1_05 = MachineConfiguration("mt32_1_05", romInfoLists.mt32_1_05.romInfos, romInfoLists.mt32_1_05.itemCount); + static const MachineConfiguration MT32_1_06 = MachineConfiguration("mt32_1_06", romInfoLists.mt32_1_06.romInfos, romInfoLists.mt32_1_06.itemCount); + static const MachineConfiguration MT32_1_07 = MachineConfiguration("mt32_1_07", romInfoLists.mt32_1_07.romInfos, romInfoLists.mt32_1_07.itemCount); + static const MachineConfiguration MT32_BLUER = MachineConfiguration("mt32_bluer", romInfoLists.mt32_bluer.romInfos, romInfoLists.mt32_bluer.itemCount); + static const MachineConfiguration MT32_2_03 = MachineConfiguration("mt32_2_03", romInfoLists.mt32_2_03.romInfos, romInfoLists.mt32_2_03.itemCount); + static const MachineConfiguration MT32_2_04 = MachineConfiguration("mt32_2_04", romInfoLists.mt32_2_04.romInfos, romInfoLists.mt32_2_04.itemCount); + static const MachineConfiguration MT32_2_06 = MachineConfiguration("mt32_2_06", romInfoLists.mt32_2_06.romInfos, romInfoLists.mt32_2_06.itemCount); + static const MachineConfiguration MT32_2_07 = MachineConfiguration("mt32_2_07", romInfoLists.mt32_2_07.romInfos, romInfoLists.mt32_2_07.itemCount); + static const MachineConfiguration CM32L_1_00 = MachineConfiguration("cm32l_1_00", romInfoLists.cm32l_1_00.romInfos, romInfoLists.cm32l_1_00.itemCount); + static const MachineConfiguration CM32L_1_02 = MachineConfiguration("cm32l_1_02", romInfoLists.cm32l_1_02.romInfos, romInfoLists.cm32l_1_02.itemCount); + static const MachineConfiguration CM32LN_1_00 = MachineConfiguration("cm32ln_1_00", romInfoLists.cm32ln_1_00.romInfos, romInfoLists.cm32ln_1_00.itemCount); + static const MachineConfiguration * const MACHINE_CONFIGURATIONS[] = { + &MT32_1_04, &MT32_1_05, &MT32_1_06, &MT32_1_07, &MT32_BLUER, &MT32_2_03, &MT32_2_04, &MT32_2_06, &MT32_2_07, &CM32L_1_00, &CM32L_1_02, &CM32LN_1_00, NULL + }; + + if (itemCount != NULL) *itemCount = _CALC_ARRAY_LENGTH(MACHINE_CONFIGURATIONS); + return MACHINE_CONFIGURATIONS; +} + +MachineConfiguration::MachineConfiguration(const char *useMachineID, const ROMInfo * const *useROMInfos, Bit32u useROMInfosCount) : + machineID(useMachineID), romInfos(useROMInfos), romInfosCount(useROMInfosCount) +{} + +const char *MachineConfiguration::getMachineID() const { + return machineID; +} + +const ROMInfo * const *MachineConfiguration::getCompatibleROMInfos(Bit32u *itemCount) const { + if (itemCount != NULL) *itemCount = romInfosCount; + return romInfos; +} + } // namespace MT32Emu diff --git a/src/sound/munt/ROMInfo.h b/src/sound/munt/ROMInfo.h index b695ba2a1..1580362f4 100644 --- a/src/sound/munt/ROMInfo.h +++ b/src/sound/munt/ROMInfo.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -34,11 +34,28 @@ public: enum Type {PCM, Control, Reverb} type; const char *shortName; const char *description; - enum PairType {Full, FirstHalf, SecondHalf, Mux0, Mux1} pairType; - ROMInfo *pairROMInfo; + enum PairType { + // Complete ROM image ready to use with Synth. + Full, + // ROM image contains data that occupies lower addresses. Needs pairing before use. + FirstHalf, + // ROM image contains data that occupies higher addresses. Needs pairing before use. + SecondHalf, + // ROM image contains data that occupies even addresses. Needs pairing before use. + Mux0, + // ROM image contains data that occupies odd addresses. Needs pairing before use. + Mux1 + } pairType; + // NULL for Full images or a pointer to the corresponding other image for pairing. + const ROMInfo *pairROMInfo; - // Returns a ROMInfo struct by inspecting the size and the SHA1 hash - MT32EMU_EXPORT static const ROMInfo* getROMInfo(File *file); + // Returns a ROMInfo struct by inspecting the size and the SHA1 hash of the file + // among all the known ROMInfos. + MT32EMU_EXPORT static const ROMInfo *getROMInfo(File *file); + + // Returns a ROMInfo struct by inspecting the size and the SHA1 hash of the file + // among the ROMInfos listed in the NULL-terminated list romInfos. + MT32EMU_EXPORT_V(2.5) static const ROMInfo *getROMInfo(File *file, const ROMInfo * const *romInfos); // Currently no-op MT32EMU_EXPORT static void freeROMInfo(const ROMInfo *romInfo); @@ -46,33 +63,111 @@ public: // Allows retrieving a NULL-terminated list of ROMInfos for a range of types and pairTypes // (specified by bitmasks) // Useful for GUI/console app to output information on what ROMs it supports - MT32EMU_EXPORT static const ROMInfo** getROMInfoList(Bit32u types, Bit32u pairTypes); + // The caller must free the returned list with freeROMInfoList when finished. + MT32EMU_EXPORT static const ROMInfo **getROMInfoList(Bit32u types, Bit32u pairTypes); - // Frees the list of ROMInfos given + // Frees the list of ROMInfos given that has been created by getROMInfoList. MT32EMU_EXPORT static void freeROMInfoList(const ROMInfo **romInfos); + + // Returns an immutable NULL-terminated list of all (full and partial) supported ROMInfos. + // For convenience, this method also can fill the number of non-NULL items present in the list + // if a non-NULL value is provided in optional argument itemCount. + MT32EMU_EXPORT_V(2.5) static const ROMInfo * const *getAllROMInfos(Bit32u *itemCount = NULL); + // Returns an immutable NULL-terminated list of all supported full ROMInfos. + // For convenience, this method also can fill the number of non-NULL items present in the list + // if a non-NULL value is provided in optional argument itemCount. + MT32EMU_EXPORT_V(2.5) static const ROMInfo * const *getFullROMInfos(Bit32u *itemCount = NULL); + // Returns an immutable NULL-terminated list of all supported partial ROMInfos. + // For convenience, this method also can fill the number of non-NULL items present in the list + // if a non-NULL value is provided in optional argument itemCount. + MT32EMU_EXPORT_V(2.5) static const ROMInfo * const *getPartialROMInfos(Bit32u *itemCount = NULL); }; -// Synth::open() is to require a full control ROMImage and a full PCM ROMImage to work +// Synth::open() requires a full control ROMImage and a compatible full PCM ROMImage to work class ROMImage { -private: - File * const file; - const ROMInfo * const romInfo; - - ROMImage(File *file); - ~ROMImage(); - public: // Creates a ROMImage object given a ROMInfo and a File. Keeps a reference // to the File and ROMInfo given, which must be freed separately by the user - // after the ROMImage is freed - MT32EMU_EXPORT static const ROMImage* makeROMImage(File *file); + // after the ROMImage is freed. + // CAVEAT: This method always prefers full ROM images over partial ones. + // Because the lower half of CM-32L/CM-64/LAPC-I PCM ROM is essentially the full + // MT-32 PCM ROM, it is therefore aliased. In this case a partial image can only be + // created by the overridden method makeROMImage(File *, const ROMInfo * const *). + MT32EMU_EXPORT static const ROMImage *makeROMImage(File *file); + + // Same as the method above but only permits creation of a ROMImage if the file content + // matches one of the ROMs described in a NULL-terminated list romInfos. This list can be + // created using e.g. method ROMInfo::getROMInfoList. + MT32EMU_EXPORT_V(2.5) static const ROMImage *makeROMImage(File *file, const ROMInfo * const *romInfos); + + // Creates a ROMImage object given a couple of files that contain compatible partial ROM images. + // The files aren't referenced by the resulting ROMImage and may be freed anytime afterwards. + // The file in the resulting image will be automatically freed along with the ROMImage. + // If the given files contain incompatible partial images, NULL is returned. + MT32EMU_EXPORT_V(2.5) static const ROMImage *makeROMImage(File *file1, File *file2); // Must only be done after all Synths using the ROMImage are deleted MT32EMU_EXPORT static void freeROMImage(const ROMImage *romImage); + // Checks whether the given ROMImages are pairable and merges them into a full image, if possible. + // If the check fails, NULL is returned. + MT32EMU_EXPORT_V(2.5) static const ROMImage *mergeROMImages(const ROMImage *romImage1, const ROMImage *romImage2); + MT32EMU_EXPORT File *getFile() const; + + // Returns true in case this ROMImage is built with a user provided File that has to be deallocated separately. + // For a ROMImage created via merging two partial ROMImages, this method returns false. + MT32EMU_EXPORT_V(2.5) bool isFileUserProvided() const; MT32EMU_EXPORT const ROMInfo *getROMInfo() const; + +private: + static const ROMImage *makeFullROMImage(Bit8u *data, size_t dataSize); + static const ROMImage *appendImages(const ROMImage *romImageLow, const ROMImage *romImageHigh); + static const ROMImage *interleaveImages(const ROMImage *romImageEven, const ROMImage *romImageOdd); + + File * const file; + const bool ownFile; + const ROMInfo * const romInfo; + + ROMImage(File *file, bool ownFile, const ROMInfo * const *romInfos); + ~ROMImage(); + + // Make ROMIMage an identity class. + ROMImage(const ROMImage &); + ROMImage &operator=(const ROMImage &); +}; + +class MachineConfiguration { +public: + // Returns an immutable NULL-terminated list of all supported machine configurations. + // For convenience, this method also can fill the number of non-NULL items present in the list + // if a non-NULL value is provided in optional argument itemCount. + MT32EMU_EXPORT_V(2.5) static const MachineConfiguration * const *getAllMachineConfigurations(Bit32u *itemCount = NULL); + + // Returns a string identifier of this MachineConfiguration. + MT32EMU_EXPORT_V(2.5) const char *getMachineID() const; + + // Returns an immutable NULL-terminated list of ROMInfos that are compatible with this + // MachineConfiguration. That means the respective ROMImages can be successfully used together + // by the emulation engine. Calling ROMInfo::getROMInfo or ROMImage::makeROMImage with this list + // supplied enables identification of all files containing desired ROM images while filtering out + // any incompatible ones. + // For convenience, this method also can fill the number of non-NULL items present in the list + // if a non-NULL value is provided in optional argument itemCount. + MT32EMU_EXPORT_V(2.5) const ROMInfo * const *getCompatibleROMInfos(Bit32u *itemCount = NULL) const; + +private: + const char * const machineID; + const ROMInfo * const * const romInfos; + const Bit32u romInfosCount; + + MachineConfiguration(const char *machineID, const ROMInfo * const *romInfos, Bit32u romInfosCount); + + // Make MachineConfiguration an identity class. + MachineConfiguration(const MachineConfiguration &); + ~MachineConfiguration() {} + MachineConfiguration &operator=(const MachineConfiguration &); }; } // namespace MT32Emu diff --git a/src/sound/munt/SampleRateConverter.cpp b/src/sound/munt/SampleRateConverter.cpp index 9ae35e962..cce6f59fd 100644 --- a/src/sound/munt/SampleRateConverter.cpp +++ b/src/sound/munt/SampleRateConverter.cpp @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/SampleRateConverter.h b/src/sound/munt/SampleRateConverter.h index 96f3925e3..6831ff2a0 100644 --- a/src/sound/munt/SampleRateConverter.h +++ b/src/sound/munt/SampleRateConverter.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/SampleRateConverter_dummy.cpp b/src/sound/munt/SampleRateConverter_dummy.cpp deleted file mode 100644 index 09f491338..000000000 --- a/src/sound/munt/SampleRateConverter_dummy.cpp +++ /dev/null @@ -1,63 +0,0 @@ -/* Copyright (C) 2015-2017 Sergey V. Mikayev - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 2.1 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this program. If not, see . - */ - -#include -#include -#include <86box/plat.h> -#include "SampleRateConverter.h" - -#include "Synth.h" - -using namespace MT32Emu; - -static inline void *createDelegate(UNUSED(Synth &synth), UNUSED(double targetSampleRate), UNUSED(SamplerateConversionQuality quality)) { - return 0; -} - -AnalogOutputMode SampleRateConverter::getBestAnalogOutputMode(UNUSED(double targetSampleRate)) { - return AnalogOutputMode_COARSE; -} - -SampleRateConverter::SampleRateConverter(Synth &useSynth, double targetSampleRate, SamplerateConversionQuality useQuality) : - synthInternalToTargetSampleRateRatio(SAMPLE_RATE / targetSampleRate), - useSynthDelegate(useSynth.getStereoOutputSampleRate() == targetSampleRate), - srcDelegate(useSynthDelegate ? &useSynth : createDelegate(useSynth, targetSampleRate, useQuality)) -{} - -SampleRateConverter::~SampleRateConverter() { -} - -void SampleRateConverter::getOutputSamples(float *buffer, unsigned int length) { - if (useSynthDelegate) { - static_cast(srcDelegate)->render(buffer, length); - return; - } -} - -void SampleRateConverter::getOutputSamples(Bit16s *outBuffer, unsigned int length) { - if (useSynthDelegate) { - static_cast(srcDelegate)->render(outBuffer, length); - return; - } -} - -double SampleRateConverter::convertOutputToSynthTimestamp(double outputTimestamp) const { - return outputTimestamp * synthInternalToTargetSampleRateRatio; -} - -double SampleRateConverter::convertSynthToOutputTimestamp(double synthTimestamp) const { - return synthTimestamp / synthInternalToTargetSampleRateRatio; -} diff --git a/src/sound/munt/Structures.h b/src/sound/munt/Structures.h index 8202c44b9..171033325 100644 --- a/src/sound/munt/Structures.h +++ b/src/sound/munt/Structures.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -191,6 +191,9 @@ struct ControlROMFeatureSet { unsigned int quirkPanMult : 1; unsigned int quirkKeyShift : 1; unsigned int quirkTVFBaseCutoffLimit : 1; + unsigned int quirkFastPitchChanges : 1; + unsigned int quirkDisplayCustomMessagePriority : 1; + unsigned int oldMT32DisplayFeatures : 1; // Features below don't actually depend on control ROM version, which is used to identify hardware model unsigned int defaultReverbMT32Compatible : 1; @@ -221,6 +224,8 @@ struct ControlROMMap { Bit16u timbreMaxTable; // 72 bytes Bit16u soundGroupsTable; // 14 bytes each entry Bit16u soundGroupsCount; + Bit16u startupMessage; // 20 characters + NULL terminator + Bit16u sysexErrorMessage; // 20 characters + NULL terminator }; struct ControlROMPCMStruct { diff --git a/src/sound/munt/Synth.cpp b/src/sound/munt/Synth.cpp index d61ad44a6..0b81edb93 100644 --- a/src/sound/munt/Synth.cpp +++ b/src/sound/munt/Synth.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -22,6 +22,7 @@ #include "Synth.h" #include "Analog.h" #include "BReverbModel.h" +#include "Display.h" #include "File.h" #include "MemoryRegion.h" #include "MidiEventQueue.h" @@ -41,19 +42,35 @@ namespace MT32Emu { // MIDI interface data transfer rate in samples. Used to simulate the transfer delay. static const double MIDI_DATA_TRANSFER_RATE = double(SAMPLE_RATE) / 31250.0 * 8.0; -// FIXME: there should be more specific feature sets for various MT-32 control ROM versions -static const ControlROMFeatureSet OLD_MT32_COMPATIBLE = { - true, // quirkBasePitchOverflow - true, // quirkPitchEnvelopeOverflow - true, // quirkRingModulationNoMix - true, // quirkTVAZeroEnvLevels - true, // quirkPanMult - true, // quirkKeyShift - true, // quirkTVFBaseCutoffLimit - true, // defaultReverbMT32Compatible - true // oldMT32AnalogLPF +static const ControlROMFeatureSet OLD_MT32_ELDER = { + true, // quirkBasePitchOverflow + true, // quirkPitchEnvelopeOverflow + true, // quirkRingModulationNoMix + true, // quirkTVAZeroEnvLevels + true, // quirkPanMult + true, // quirkKeyShift + true, // quirkTVFBaseCutoffLimit + false, // quirkFastPitchChanges + true, // quirkDisplayCustomMessagePriority + true, // oldMT32DisplayFeatures + true, // defaultReverbMT32Compatible + true // oldMT32AnalogLPF }; -static const ControlROMFeatureSet CM32L_COMPATIBLE = { +static const ControlROMFeatureSet OLD_MT32_LATER = { + true, // quirkBasePitchOverflow + true, // quirkPitchEnvelopeOverflow + true, // quirkRingModulationNoMix + true, // quirkTVAZeroEnvLevels + true, // quirkPanMult + true, // quirkKeyShift + true, // quirkTVFBaseCutoffLimit + false, // quirkFastPitchChanges + false, // quirkDisplayCustomMessagePriority + true, // oldMT32DisplayFeatures + true, // defaultReverbMT32Compatible + true // oldMT32AnalogLPF +}; +static const ControlROMFeatureSet NEW_MT32_COMPATIBLE = { false, // quirkBasePitchOverflow false, // quirkPitchEnvelopeOverflow false, // quirkRingModulationNoMix @@ -61,20 +78,41 @@ static const ControlROMFeatureSet CM32L_COMPATIBLE = { false, // quirkPanMult false, // quirkKeyShift false, // quirkTVFBaseCutoffLimit + false, // quirkFastPitchChanges + false, // quirkDisplayCustomMessagePriority + false, // oldMT32DisplayFeatures false, // defaultReverbMT32Compatible - false // oldMT32AnalogLPF + false // oldMT32AnalogLPF +}; +static const ControlROMFeatureSet CM32LN_COMPATIBLE = { + false, // quirkBasePitchOverflow + false, // quirkPitchEnvelopeOverflow + false, // quirkRingModulationNoMix + false, // quirkTVAZeroEnvLevels + false, // quirkPanMult + false, // quirkKeyShift + false, // quirkTVFBaseCutoffLimit + true, // quirkFastPitchChanges + false, // quirkDisplayCustomMessagePriority + false, // oldMT32DisplayFeatures + false, // defaultReverbMT32Compatible + false // oldMT32AnalogLPF }; -static const ControlROMMap ControlROMMaps[8] = { - // ID Features PCMmap PCMc tmbrA tmbrAO, tmbrAC tmbrB tmbrBO tmbrBC tmbrR trC rhythm rhyC rsrv panpot prog rhyMax patMax sysMax timMax sndGrp sGC - { "ctrl_mt32_1_04", OLD_MT32_COMPATIBLE, 0x3000, 128, 0x8000, 0x0000, false, 0xC000, 0x4000, false, 0x3200, 30, 0x73A6, 85, 0x57C7, 0x57E2, 0x57D0, 0x5252, 0x525E, 0x526E, 0x520A, 0x7064, 19 }, - { "ctrl_mt32_1_05", OLD_MT32_COMPATIBLE, 0x3000, 128, 0x8000, 0x0000, false, 0xC000, 0x4000, false, 0x3200, 30, 0x7414, 85, 0x57C7, 0x57E2, 0x57D0, 0x5252, 0x525E, 0x526E, 0x520A, 0x70CA, 19 }, - { "ctrl_mt32_1_06", OLD_MT32_COMPATIBLE, 0x3000, 128, 0x8000, 0x0000, false, 0xC000, 0x4000, false, 0x3200, 30, 0x7414, 85, 0x57D9, 0x57F4, 0x57E2, 0x5264, 0x5270, 0x5280, 0x521C, 0x70CA, 19 }, - { "ctrl_mt32_1_07", OLD_MT32_COMPATIBLE, 0x3000, 128, 0x8000, 0x0000, false, 0xC000, 0x4000, false, 0x3200, 30, 0x73fe, 85, 0x57B1, 0x57CC, 0x57BA, 0x523C, 0x5248, 0x5258, 0x51F4, 0x70B0, 19 }, // MT-32 revision 1 - {"ctrl_mt32_bluer", OLD_MT32_COMPATIBLE, 0x3000, 128, 0x8000, 0x0000, false, 0xC000, 0x4000, false, 0x3200, 30, 0x741C, 85, 0x57E5, 0x5800, 0x57EE, 0x5270, 0x527C, 0x528C, 0x5228, 0x70CE, 19 }, // MT-32 Blue Ridge mod - {"ctrl_mt32_2_04", CM32L_COMPATIBLE, 0x8100, 128, 0x8000, 0x8000, true, 0x8080, 0x8000, true, 0x8500, 30, 0x8580, 85, 0x4F5D, 0x4F78, 0x4F66, 0x4899, 0x489D, 0x48B6, 0x48CD, 0x5A58, 19 }, - {"ctrl_cm32l_1_00", CM32L_COMPATIBLE, 0x8100, 256, 0x8000, 0x8000, true, 0x8080, 0x8000, true, 0x8500, 64, 0x8580, 85, 0x4F65, 0x4F80, 0x4F6E, 0x48A1, 0x48A5, 0x48BE, 0x48D5, 0x5A6C, 19 }, - {"ctrl_cm32l_1_02", CM32L_COMPATIBLE, 0x8100, 256, 0x8000, 0x8000, true, 0x8080, 0x8000, true, 0x8500, 64, 0x8580, 85, 0x4F93, 0x4FAE, 0x4F9C, 0x48CB, 0x48CF, 0x48E8, 0x48FF, 0x5A96, 19 } // CM-32L +static const ControlROMMap ControlROMMaps[] = { + // ID Features PCMmap PCMc tmbrA tmbrAO, tmbrAC tmbrB tmbrBO tmbrBC tmbrR trC rhythm rhyC rsrv panpot prog rhyMax patMax sysMax timMax sndGrp sGC stMsg sErMsg + {"ctrl_mt32_1_04", OLD_MT32_ELDER, 0x3000, 128, 0x8000, 0x0000, false, 0xC000, 0x4000, false, 0x3200, 30, 0x73A6, 85, 0x57C7, 0x57E2, 0x57D0, 0x5252, 0x525E, 0x526E, 0x520A, 0x7064, 19, 0x217A, 0x4BB6}, + {"ctrl_mt32_1_05", OLD_MT32_ELDER, 0x3000, 128, 0x8000, 0x0000, false, 0xC000, 0x4000, false, 0x3200, 30, 0x7414, 85, 0x57C7, 0x57E2, 0x57D0, 0x5252, 0x525E, 0x526E, 0x520A, 0x70CA, 19, 0x217A, 0x4BB6}, + {"ctrl_mt32_1_06", OLD_MT32_LATER, 0x3000, 128, 0x8000, 0x0000, false, 0xC000, 0x4000, false, 0x3200, 30, 0x7414, 85, 0x57D9, 0x57F4, 0x57E2, 0x5264, 0x5270, 0x5280, 0x521C, 0x70CA, 19, 0x217A, 0x4BBA}, + {"ctrl_mt32_1_07", OLD_MT32_LATER, 0x3000, 128, 0x8000, 0x0000, false, 0xC000, 0x4000, false, 0x3200, 30, 0x73fe, 85, 0x57B1, 0x57CC, 0x57BA, 0x523C, 0x5248, 0x5258, 0x51F4, 0x70B0, 19, 0x217A, 0x4B92}, + {"ctrl_mt32_bluer", OLD_MT32_LATER, 0x3000, 128, 0x8000, 0x0000, false, 0xC000, 0x4000, false, 0x3200, 30, 0x741C, 85, 0x57E5, 0x5800, 0x57EE, 0x5270, 0x527C, 0x528C, 0x5228, 0x70CE, 19, 0x217A, 0x4BC6}, + {"ctrl_mt32_2_03", NEW_MT32_COMPATIBLE, 0x8100, 128, 0x8000, 0x8000, true, 0x8080, 0x8000, true, 0x8500, 64, 0x8580, 85, 0x4F49, 0x4F64, 0x4F52, 0x4885, 0x4889, 0x48A2, 0x48B9, 0x5A44, 19, 0x1EF0, 0x4066}, + {"ctrl_mt32_2_04", NEW_MT32_COMPATIBLE, 0x8100, 128, 0x8000, 0x8000, true, 0x8080, 0x8000, true, 0x8500, 64, 0x8580, 85, 0x4F5D, 0x4F78, 0x4F66, 0x4899, 0x489D, 0x48B6, 0x48CD, 0x5A58, 19, 0x1EF0, 0x406D}, + {"ctrl_mt32_2_06", NEW_MT32_COMPATIBLE, 0x8100, 128, 0x8000, 0x8000, true, 0x8080, 0x8000, true, 0x8500, 64, 0x8580, 85, 0x4F69, 0x4F84, 0x4F72, 0x48A5, 0x48A9, 0x48C2, 0x48D9, 0x5A64, 19, 0x1EF0, 0x4021}, + {"ctrl_mt32_2_07", NEW_MT32_COMPATIBLE, 0x8100, 128, 0x8000, 0x8000, true, 0x8080, 0x8000, true, 0x8500, 64, 0x8580, 85, 0x4F81, 0x4F9C, 0x4F8A, 0x48B9, 0x48BD, 0x48D6, 0x48ED, 0x5A78, 19, 0x1EE7, 0x4035}, + {"ctrl_cm32l_1_00", NEW_MT32_COMPATIBLE, 0x8100, 256, 0x8000, 0x8000, true, 0x8080, 0x8000, true, 0x8500, 64, 0x8580, 85, 0x4F65, 0x4F80, 0x4F6E, 0x48A1, 0x48A5, 0x48BE, 0x48D5, 0x5A6C, 19, 0x1EF0, 0x401D}, + {"ctrl_cm32l_1_02", NEW_MT32_COMPATIBLE, 0x8100, 256, 0x8000, 0x8000, true, 0x8080, 0x8000, true, 0x8500, 64, 0x8580, 85, 0x4F93, 0x4FAE, 0x4F9C, 0x48CB, 0x48CF, 0x48E8, 0x48FF, 0x5A96, 19, 0x1EE7, 0x4047}, + {"ctrl_cm32ln_1_00", CM32LN_COMPATIBLE, 0x8100, 256, 0x8000, 0x8000, true, 0x8080, 0x8000, true, 0x8500, 64, 0x8580, 85, 0x4EC7, 0x4EE2, 0x4ED0, 0x47FF, 0x4803, 0x481C, 0x4833, 0x55A2, 19, 0x1F59, 0x3F7C} // (Note that old MT-32 ROMs actually have 86 entries for rhythmTemp) }; @@ -138,6 +176,8 @@ protected: synth.renderedSampleCount += count; } + void updateDisplayState(); + public: Renderer(Synth &useSynth) : synth(useSynth) {} @@ -209,10 +249,16 @@ public: Bit32u midiEventQueueSize; Bit32u midiEventQueueSysexStorageBufferSize; + + Display *display; + bool oldMT32DisplayFeatures; + + ReportHandler2 defaultReportHandler; + ReportHandler2 *reportHandler2; }; Bit32u Synth::getLibraryVersionInt() { - return (MT32EMU_VERSION_MAJOR << 16) | (MT32EMU_VERSION_MINOR << 8) | (MT32EMU_VERSION_PATCH); + return MT32EMU_CURRENT_VERSION_INT; } const char *Synth::getLibraryVersionString() { @@ -244,13 +290,8 @@ Synth::Synth(ReportHandler *useReportHandler) : controlROMMap = NULL; controlROMFeatures = NULL; - if (useReportHandler == NULL) { - reportHandler = new ReportHandler; - isDefaultReportHandler = true; - } else { - reportHandler = useReportHandler; - isDefaultReportHandler = false; - } + reportHandler = useReportHandler != NULL ? useReportHandler : &extensions.defaultReportHandler; + extensions.reportHandler2 = &extensions.defaultReportHandler; extensions.preallocatedReverbMemory = false; for (int i = REVERB_MODE_ROOM; i <= REVERB_MODE_TAP_DELAY; i++) { @@ -289,18 +330,27 @@ Synth::Synth(ReportHandler *useReportHandler) : lastReceivedMIDIEventTimestamp = 0; memset(parts, 0, sizeof(parts)); renderedSampleCount = 0; + extensions.display = NULL; + extensions.oldMT32DisplayFeatures = false; } Synth::~Synth() { close(); // Make sure we're closed and everything is freed - if (isDefaultReportHandler) { - delete reportHandler; - } delete &mt32ram; delete &mt32default; delete &extensions; } +void Synth::setReportHandler2(ReportHandler2 *reportHandler2) { + if (reportHandler2 != NULL) { + reportHandler = reportHandler2; + extensions.reportHandler2 = reportHandler2; + } else { + reportHandler = &extensions.defaultReportHandler; + extensions.reportHandler2 = &extensions.defaultReportHandler; + } +} + void ReportHandler::showLCDMessage(const char *data) { printf("WRITE-LCD: %s\n", data); } @@ -310,26 +360,38 @@ void ReportHandler::printDebug(const char *fmt, va_list list) { printf("\n"); } -void Synth::newTimbreSet(Bit8u partNum, Bit8u timbreGroup, Bit8u timbreNumber, const char patchName[]) { - const char *soundGroupName; +void Synth::rhythmNotePlayed() const { + extensions.display->rhythmNotePlayed(); +} + +void Synth::voicePartStateChanged(Bit8u partNum, bool partActivated) const { + extensions.display->voicePartStateChanged(partNum, partActivated); +} + +void Synth::newTimbreSet(Bit8u partNum) const { + const Part *part = getPart(partNum); + reportHandler->onProgramChanged(partNum, getSoundGroupName(part), part->getCurrentInstr()); +} + +const char *Synth::getSoundGroupName(const Part *part) const { + const PatchParam &patch = part->getPatchTemp()->patch; + return getSoundGroupName(patch.timbreGroup, patch.timbreNum); +} + +const char *Synth::getSoundGroupName(Bit8u timbreGroup, Bit8u timbreNumber) const { switch (timbreGroup) { case 1: timbreNumber += 64; // Fall-through case 0: - soundGroupName = soundGroupNames[soundGroupIx[timbreNumber]]; - break; + return soundGroupNames[soundGroupIx[timbreNumber]]; case 2: - soundGroupName = soundGroupNames[controlROMMap->soundGroupsCount - 2]; - break; + return soundGroupNames[controlROMMap->soundGroupsCount - 2]; case 3: - soundGroupName = soundGroupNames[controlROMMap->soundGroupsCount - 1]; - break; + return soundGroupNames[controlROMMap->soundGroupsCount - 1]; default: - soundGroupName = NULL; - break; + return NULL; } - reportHandler->onProgramChanged(partNum, soundGroupName, patchName); } #define MT32EMU_PRINT_DEBUG \ @@ -450,6 +512,16 @@ float Synth::getReverbOutputGain() const { return reverbOutputGain; } +void Synth::setPartVolumeOverride(Bit8u partNumber, Bit8u volumeOverride) { + if (opened && partNumber < 9) { + parts[partNumber]->setVolumeOverride(volumeOverride); + } +} + +Bit8u Synth::getPartVolumeOverride(Bit8u partNumber) const { + return (!opened || partNumber > 8) ? 255 : parts[partNumber]->getVolumeOverride(); +} + void Synth::setReversedStereoEnabled(bool enabled) { reversedStereoEnabled = enabled; } @@ -542,7 +614,7 @@ bool Synth::loadPCMROM(const ROMImage &pcmROMImage) { int order[16] = {0, 9, 1, 2, 3, 4, 5, 6, 7, 10, 11, 12, 13, 14, 15, 8}; Bit16s log = 0; - for (int u = 0; u < 15; u++) { + for (int u = 0; u < 16; u++) { int bit; if (order[u] < 8) { bit = (s >> (7 - order[u])) & 0x1; @@ -717,6 +789,16 @@ bool Synth::open(const ROMImage &controlROMImage, const ROMImage &pcmROMImage, B return false; } + if (controlROMMap->timbreRCount == 30) { + // We must initialise all 64 rhythm timbres to avoid undefined behaviour. + // SEMI-CONFIRMED: Old-gen MT-32 units likely map timbres 30..59 to 0..29. + // Attempts to play rhythm timbres 60..63 exhibit undefined behaviour. + // We want to emulate the wrap around, so merely copy the entire set of standard + // timbres once more. The last 4 dangerous timbres are zeroed out. + memcpy(&mt32ram.timbres[222], &mt32ram.timbres[192], sizeof(*mt32ram.timbres) * 30); + memset(&mt32ram.timbres[252], 0, sizeof(*mt32ram.timbres) * 4); + } + #if MT32EMU_MONITOR_INIT printDebug("Initialising Timbre Bank M"); #endif @@ -838,6 +920,9 @@ bool Synth::open(const ROMImage &controlROMImage, const ROMImage &pcmROMImage, B return false; } + extensions.display = new Display(*this); + extensions.oldMT32DisplayFeatures = controlROMFeatures->oldMT32DisplayFeatures; + opened = true; activated = false; @@ -850,6 +935,9 @@ bool Synth::open(const ROMImage &controlROMImage, const ROMImage &pcmROMImage, B void Synth::dispose() { opened = false; + delete extensions.display; + extensions.display = NULL; + delete midiQueue; midiQueue = NULL; @@ -1064,7 +1152,7 @@ void Synth::playMsgOnPart(Bit8u part, Bit8u code, Bit8u note, Bit8u velocity) { if (velocity == 0) { // MIDI defines note-on with velocity 0 as being the same as note-off with velocity 40 parts[part]->noteOff(note); - } else { + } else if (parts[part]->getVolumeOverride() > 0) { parts[part]->noteOn(note, velocity); } break; @@ -1130,16 +1218,21 @@ void Synth::playMsgOnPart(Bit8u part, Bit8u code, Bit8u note, Bit8u velocity) { #endif return; } - + extensions.display->midiMessagePlayed(); break; case 0xC: // Program change //printDebug("Program change %01x", note); parts[part]->setProgram(note); + if (part < 8) { + extensions.display->midiMessagePlayed(); + extensions.display->programChanged(part); + } break; case 0xE: // Pitch bender bend = (velocity << 7) | (note); //printDebug("Pitch bender %02x", bend); parts[part]->setBend(bend); + extensions.display->midiMessagePlayed(); break; default: #if MT32EMU_MONITOR_MIDI > 0 @@ -1197,12 +1290,19 @@ void Synth::playSysexWithoutHeader(Bit8u device, Bit8u command, const Bit8u *sys printDebug("playSysexWithoutHeader: Message is not intended for this device ID (provided: %02x, expected: 0x10 or channel)", int(device)); return; } - // This is checked early in the real devices (before any sysex length checks or further processing) - // FIXME: Response to SYSEX_CMD_DAT reset with partials active (and in general) is untested. - if ((command == SYSEX_CMD_DT1 || command == SYSEX_CMD_DAT) && sysex[0] == 0x7F) { - reset(); + + // All models process the checksum before anything else and ignore messages lacking the checksum, or containing the checksum only. + if (len < 2) { + printDebug("playSysexWithoutHeader: Message is too short (%d bytes)!", len); return; } + Bit8u checksum = calcSysexChecksum(sysex, len - 1); + if (checksum != sysex[len - 1]) { + printDebug("playSysexWithoutHeader: Message checksum is incorrect (provided: %02x, expected: %02x)!", sysex[len - 1], checksum); + if (opened) extensions.display->checksumErrorOccurred(); + return; + } + len -= 1; // Exclude checksum if (command == SYSEX_CMD_EOD) { #if MT32EMU_MONITOR_SYSEX > 0 @@ -1210,16 +1310,6 @@ void Synth::playSysexWithoutHeader(Bit8u device, Bit8u command, const Bit8u *sys #endif return; } - if (len < 4) { - printDebug("playSysexWithoutHeader: Message is too short (%d bytes)!", len); - return; - } - Bit8u checksum = calcSysexChecksum(sysex, len - 1); - if (checksum != sysex[len - 1]) { - printDebug("playSysexWithoutHeader: Message checksum is incorrect (provided: %02x, expected: %02x)!", sysex[len - 1], checksum); - return; - } - len -= 1; // Exclude checksum switch (command) { case SYSEX_CMD_WSD: #if MT32EMU_MONITOR_SYSEX > 0 @@ -1259,12 +1349,34 @@ void Synth::readSysex(Bit8u /*device*/, const Bit8u * /*sysex*/, Bit32u /*len*/) } void Synth::writeSysex(Bit8u device, const Bit8u *sysex, Bit32u len) { - if (!opened) return; + if (!opened || len < 1) return; + + // This is checked early in the real devices (before any sysex length checks or further processing) + if (sysex[0] == 0x7F) { + if (!isDisplayOldMT32Compatible()) extensions.display->midiMessagePlayed(); + reset(); + return; + } + + extensions.display->midiMessagePlayed(); reportHandler->onMIDIMessagePlayed(); + + if (len < 3) { + // A short message of just 1 or 2 bytes may be written to the display area yet it may cause a user-visible effect, + // similarly to the reset area. + if (sysex[0] == 0x20) { + extensions.display->displayControlMessageReceived(sysex, len); + return; + } + printDebug("writeSysex: Message is too short (%d bytes)!", len); + return; + } + Bit32u addr = (sysex[0] << 16) | (sysex[1] << 8) | (sysex[2]); addr = MT32EMU_MEMADDR(addr); sysex += 3; len -= 3; + //printDebug("Sysex addr: 0x%06x", MT32EMU_SYSEXMEMADDR(addr)); // NOTE: Please keep both lower and upper bounds in each check, for ease of reading @@ -1345,6 +1457,7 @@ void Synth::writeSysexGlobal(Bit32u addr, const Bit8u *sysex, Bit32u len) { if (region == NULL) { printDebug("Sysex write to unrecognised address %06x, len %d", MT32EMU_SYSEXMEMADDR(addr), len); + // FIXME: Real devices may respond differently to a long SysEx that covers adjacent regions. break; } writeMemoryRegion(region, addr, region->getClampedLen(addr, len), sysex); @@ -1663,7 +1776,10 @@ void Synth::writeMemoryRegion(const MemoryRegion *region, Bit32u addr, Bit32u le } break; case MR_Display: - char buf[SYSEX_BUFFER_SIZE]; + if (len > Display::LCD_TEXT_SIZE) len = Display::LCD_TEXT_SIZE; + if (!extensions.display->customDisplayMessageReceived(data, off, len)) break; + // Holds zero-terminated string of the maximum length. + char buf[Display::LCD_TEXT_SIZE + 1]; memcpy(&buf, &data[0], len); buf[len] = 0; #if MT32EMU_MONITOR_SYSEX > 0 @@ -1674,6 +1790,8 @@ void Synth::writeMemoryRegion(const MemoryRegion *region, Bit32u addr, Bit32u le case MR_Reset: reset(); break; + default: + break; } } @@ -1767,6 +1885,10 @@ void Synth::refreshSystemChanAssign(Bit8u firstPart, Bit8u lastPart) { } void Synth::refreshSystemMasterVol() { + // Note, this should only occur when the user turns the volume knob. When the master volume is set via a SysEx, display + // doesn't actually update on all real devices. However, we anyway update the display, as we don't foresee a dedicated + // API for setting the master volume yet it's rather dubious that one really needs this quirk to be fairly emulated. + if (opened) extensions.display->masterVolumeChanged(); #if MT32EMU_MONITOR_SYSEX > 0 printDebug(" Master volume: %d", mt32ram.system.masterVol); #endif @@ -1816,6 +1938,32 @@ Bit32s Synth::getMasterTunePitchDelta() const { return extensions.masterTunePitchDelta; } +bool Synth::getDisplayState(char *targetBuffer, bool narrowLCD) const { + if (!opened) { + memset(targetBuffer, ' ', Display::LCD_TEXT_SIZE); + targetBuffer[Display::LCD_TEXT_SIZE] = 0; + return false; + } + return extensions.display->getDisplayState(targetBuffer, narrowLCD); +} + +void Synth::setMainDisplayMode() { + if (opened) extensions.display->setMainDisplayMode(); +} + + +void Synth::setDisplayCompatibility(bool oldMT32CompatibilityEnabled) { + extensions.oldMT32DisplayFeatures = oldMT32CompatibilityEnabled; +} + +bool Synth::isDisplayOldMT32Compatible() const { + return extensions.oldMT32DisplayFeatures; +} + +bool Synth::isDefaultDisplayOldMT32Compatible() const { + return opened && controlROMFeatures->oldMT32DisplayFeatures; +} + /** Defines an interface of a class that maintains storage of variable-sized data of SysEx messages. */ class MidiEventQueue::SysexDataStorage { public: @@ -1994,6 +2142,15 @@ Bit32u Synth::getStereoOutputSampleRate() const { return (analog == NULL) ? SAMPLE_RATE : analog->getOutputSampleRate(); } +void Renderer::updateDisplayState() { + bool midiMessageLEDState; + bool midiMessageLEDStateUpdated; + bool lcdUpdated; + synth.extensions.display->checkDisplayStateUpdated(midiMessageLEDState, midiMessageLEDStateUpdated, lcdUpdated); + if (midiMessageLEDStateUpdated) synth.extensions.reportHandler2->onMidiMessageLEDStateUpdated(midiMessageLEDState); + if (lcdUpdated) synth.extensions.reportHandler2->onLCDStateUpdated(); +} + template void RendererImpl::doRender(Sample *stereoStream, Bit32u len) { if (!isActivated()) { @@ -2002,6 +2159,7 @@ void RendererImpl::doRender(Sample *stereoStream, Bit32u len) { printDebug("RendererImpl: Invalid call to Analog::process()!\n"); } Synth::muteSampleBuffer(stereoStream, len << 1); + updateDisplayState(); return; } @@ -2358,6 +2516,7 @@ void RendererImpl::produceStreams(const DACOutputStreams &stream getPartialManager().clearAlreadyOutputed(); incRenderedSampleCount(len); + updateDisplayState(); } void Synth::printPartialUsage(Bit32u sampleOffset) { @@ -2468,6 +2627,26 @@ const char *Synth::getPatchName(Bit8u partNumber) const { return (!opened || partNumber > 8) ? NULL : parts[partNumber]->getCurrentInstr(); } +bool Synth::getSoundGroupName(char *soundGroupName, Bit8u timbreGroup, Bit8u timbreNumber) const { + if (!opened || 63 < timbreNumber) return false; + const char *foundGroupName = getSoundGroupName(timbreGroup, timbreNumber); + if (foundGroupName == NULL) return false; + memcpy(soundGroupName, foundGroupName, 7); + soundGroupName[7] = 0; + return true; +} + +bool Synth::getSoundName(char *soundName, Bit8u timbreGroup, Bit8u timbreNumber) const { + if (!opened || 3 < timbreGroup) return false; + Bit8u timbresInGroup = 3 == timbreGroup ? controlROMMap->timbreRCount : 64; + if (timbresInGroup <= timbreNumber) return false; + TimbreParam::CommonParam &timbreCommon = mt32ram.timbres[timbreGroup * 64 + timbreNumber].timbre.common; + if (timbreCommon.partialMute == 0) return false; + memcpy(soundName, timbreCommon.name, sizeof timbreCommon.name); + soundName[sizeof timbreCommon.name] = 0; + return true; +} + const Part *Synth::getPart(Bit8u partNum) const { if (partNum > 8) { return NULL; diff --git a/src/sound/munt/Synth.h b/src/sound/munt/Synth.h index 65f2656e6..0f88eb9f0 100644 --- a/src/sound/munt/Synth.h +++ b/src/sound/munt/Synth.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -69,6 +69,9 @@ const Bit8u SYSEX_CMD_EOD = 0x45; // End of data const Bit8u SYSEX_CMD_ERR = 0x4E; // Communications error const Bit8u SYSEX_CMD_RJC = 0x4F; // Rejection +// This value isn't quite correct: the new-gen MT-32 control ROMs (ver. 2.XX) are twice as big. +// Nevertheless, this is still relevant for library internal usage because the higher half +// of those ROMs only contains the demo songs in all cases. const Bit32u CONTROL_ROM_SIZE = 64 * 1024; // Set of multiplexed output streams appeared at the DAC entrance. @@ -113,8 +116,21 @@ public: virtual void onProgramChanged(Bit8u /* partNum */, const char * /* soundGroupName */, const char * /* patchName */) {} }; +// Extends ReportHandler, so that the client may supply callbacks for reporting signals about updated display state. +class MT32EMU_EXPORT_V(2.6) ReportHandler2 : public ReportHandler { +public: + virtual ~ReportHandler2() {} + + // Invoked to signal about a change of the emulated LCD state. Use method Synth::getDisplayState to retrieve the actual data. + // This callback will not be invoked on further changes, until the client retrieves the LCD state. + virtual void onLCDStateUpdated() {} + // Invoked when the emulated MIDI MESSAGE LED changes state. The ledState parameter represents whether the LED is ON. + virtual void onMidiMessageLEDStateUpdated(bool /* ledState */) {} +}; + class Synth { friend class DefaultMidiStreamParser; +friend class Display; friend class MemoryRegion; friend class Part; friend class Partial; @@ -177,7 +193,7 @@ private: bool opened; bool activated; - bool isDefaultReportHandler; + bool isDefaultReportHandler; // No longer used, retained for binary compatibility only. ReportHandler *reportHandler; PartialManager *partialManager; @@ -227,7 +243,11 @@ private: void printPartialUsage(Bit32u sampleOffset = 0); - void newTimbreSet(Bit8u partNum, Bit8u timbreGroup, Bit8u timbreNumber, const char patchName[]); + void rhythmNotePlayed() const; + void voicePartStateChanged(Bit8u partNum, bool activated) const; + void newTimbreSet(Bit8u partNum) const; + const char *getSoundGroupName(const Part *part) const; + const char *getSoundGroupName(Bit8u timbreGroup, Bit8u timbreNumber) const; void printDebug(const char *fmt, ...); // partNum should be 0..7 for Part 1..8, or 8 for Rhythm @@ -290,9 +310,13 @@ public: MT32EMU_EXPORT explicit Synth(ReportHandler *useReportHandler = NULL); MT32EMU_EXPORT ~Synth(); + // Sets an implementation of ReportHandler2 interface for reporting various errors, information and debug messages. + // If the argument is NULL, the default implementation is installed as a fallback. + MT32EMU_EXPORT_V(2.6) void setReportHandler2(ReportHandler2 *reportHandler2); + // Used to initialise the MT-32. Must be called before any other function. - // Returns true if initialization was sucessful, otherwise returns false. - // controlROMImage and pcmROMImage represent Control and PCM ROM images for use by synth. + // Returns true if initialization was successful, otherwise returns false. + // controlROMImage and pcmROMImage represent full Control and PCM ROM images for use by synth. // usePartialCount sets the maximum number of partials playing simultaneously for this session (optional). // analogOutputMode sets the mode for emulation of analogue circuitry of the hardware units (optional). MT32EMU_EXPORT bool open(const ROMImage &controlROMImage, const ROMImage &pcmROMImage, Bit32u usePartialCount = DEFAULT_MAX_PARTIALS, AnalogOutputMode analogOutputMode = AnalogOutputMode_COARSE); @@ -391,7 +415,7 @@ public: MT32EMU_EXPORT bool isMT32ReverbCompatibilityMode() const; // Returns whether default reverb compatibility mode is the old MT-32 compatibility mode. MT32EMU_EXPORT bool isDefaultReverbMT32Compatible() const; - // If enabled, reverb buffers for all modes are keept around allocated all the time to avoid memory + // If enabled, reverb buffers for all modes are kept around allocated all the time to avoid memory // allocating/freeing in the rendering thread, which may be required for realtime operation. // Otherwise, reverb buffers that are not in use are deleted to save memory (the default behaviour). MT32EMU_EXPORT void preallocateReverbMemory(bool enabled); @@ -423,6 +447,22 @@ public: // Returns current output gain factor for reverb wet output channels. MT32EMU_EXPORT float getReverbOutputGain() const; + // Sets (or removes) an override for the current volume (output level) on a specific part. + // When the part volume is overridden, the MIDI controller Volume (7) on the MIDI channel this part is assigned to + // has no effect on the output level of this part. Similarly, the output level value set on this part via a SysEx that + // modifies the Patch temp structure is disregarded. + // To enable the override mode, argument volumeOverride should be in range 0..100, setting a value outside this range + // disables the previously set override, if any. + // Note: Setting volumeOverride to 0 mutes the part completely, meaning no sound is generated at all. + // This is unlike the behaviour of real devices - setting 0 volume on a part may leave it still producing + // sound at a very low level. + // Argument partNumber should be 0..7 for Part 1..8, or 8 for Rhythm. + MT32EMU_EXPORT_V(2.6) void setPartVolumeOverride(Bit8u partNumber, Bit8u volumeOverride); + // Returns the overridden volume previously set on a specific part; a value outside the range 0..100 means no override + // is currently in effect. + // Argument partNumber should be 0..7 for Part 1..8, or 8 for Rhythm. + MT32EMU_EXPORT_V(2.6) Bit8u getPartVolumeOverride(Bit8u partNumber) const; + // Swaps left and right output channels. MT32EMU_EXPORT void setReversedStereoEnabled(bool enabled); // Returns whether left and right output channels are swapped. @@ -529,10 +569,53 @@ public: // Returns name of the patch set on the specified part. // Argument partNumber should be 0..7 for Part 1..8, or 8 for Rhythm. + // The returned value is a null-terminated string which is guaranteed to remain valid until the next call to one of render methods. MT32EMU_EXPORT const char *getPatchName(Bit8u partNumber) const; + // Retrieves the name of the sound group the timbre identified by arguments timbreGroup and timbreNumber is associated with. + // Values 0-3 of timbreGroup correspond to the timbre banks GROUP A, GROUP B, MEMORY and RHYTHM. + // For all but the RHYTHM timbre bank, allowed values of timbreNumber are in range 0-63. The number of timbres + // contained in the RHYTHM bank depends on the used control ROM version. + // The argument soundGroupName must point to an array of at least 8 characters. The result is a null-terminated string. + // Returns whether the specified timbre has been found and the result written in soundGroupName. + MT32EMU_EXPORT_V(2.7) bool getSoundGroupName(char *soundGroupName, Bit8u timbreGroup, Bit8u timbreNumber) const; + // Retrieves the name of the timbre identified by arguments timbreGroup and timbreNumber. + // Values 0-3 of timbreGroup correspond to the timbre banks GROUP A, GROUP B, MEMORY and RHYTHM. + // For all but the RHYTHM timbre bank, allowed values of timbreNumber are in range 0-63. The number of timbres + // contained in the RHYTHM bank depends on the used control ROM version. + // The argument soundName must point to an array of at least 11 characters. The result is a null-terminated string. + // Returns whether the specified timbre has been found and the result written in soundName. + MT32EMU_EXPORT_V(2.7) bool getSoundName(char *soundName, Bit8u timbreGroup, Bit8u timbreNumber) const; + // Stores internal state of emulated synth into an array provided (as it would be acquired from hardware). MT32EMU_EXPORT void readMemory(Bit32u addr, Bit32u len, Bit8u *data); + + // Retrieves the current state of the emulated MT-32 display facilities. + // Typically, the state is updated during the rendering. When that happens, a related callback from ReportHandler2 is invoked. + // However, there might be no need to invoke this method after each update, e.g. when the render buffer is just a few milliseconds + // long. + // The argument targetBuffer must point to an array of at least 21 characters. The result is a null-terminated string. + // The optional argument narrowLCD enables a condensed representation of the displayed information in some cases. This is mainly + // intended to route the result to a hardware LCD that is only 16 characters wide. Automatic scrolling of longer strings + // is not supported. + // Returns whether the MIDI MESSAGE LED is ON and fills the targetBuffer parameter. + MT32EMU_EXPORT_V(2.6) bool getDisplayState(char *targetBuffer, bool narrowLCD = false) const; + + // Resets the emulated LCD to the main mode (Master Volume). This has the same effect as pressing the Master Volume button + // while the display shows some other message. Useful for the new-gen devices as those require a special Display Reset SysEx + // to return to the main mode e.g. from showing a custom display message or a checksum error. + MT32EMU_EXPORT_V(2.6) void setMainDisplayMode(); + + // Permits to select an arbitrary display emulation model that does not necessarily match the actual behaviour implemented + // in the control ROM version being used. + // Invoking this method with the argument set to true forces emulation of the old-gen MT-32 display features. + // Otherwise, emulation of the new-gen devices is enforced (these include CM-32L and LAPC-I as if these were connected to an LCD). + MT32EMU_EXPORT_V(2.6) void setDisplayCompatibility(bool oldMT32CompatibilityEnabled); + // Returns whether the currently configured features of the emulated display are compatible with the old-gen MT-32 devices. + MT32EMU_EXPORT_V(2.6) bool isDisplayOldMT32Compatible() const; + // Returns whether the emulated display features configured by default depending on the actual control ROM version + // are compatible with the old-gen MT-32 devices. + MT32EMU_EXPORT_V(2.6) bool isDefaultDisplayOldMT32Compatible() const; }; // class Synth } // namespace MT32Emu diff --git a/src/sound/munt/TVA.cpp b/src/sound/munt/TVA.cpp index a49ad0193..e3f76181f 100644 --- a/src/sound/munt/TVA.cpp +++ b/src/sound/munt/TVA.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -99,7 +99,7 @@ static int calcVeloAmpSubtraction(Bit8u veloSensitivity, unsigned int velocity) return absVelocityMult - (velocityMult >> 8); // PORTABILITY NOTE: Assumes arithmetic shift } -static int calcBasicAmp(const Tables *tables, const Partial *partial, const MemParams::System *system, const TimbreParam::PartialParam *partialParam, const MemParams::PatchTemp *patchTemp, const MemParams::RhythmTemp *rhythmTemp, int biasAmpSubtraction, int veloAmpSubtraction, Bit8u expression, bool hasRingModQuirk) { +static int calcBasicAmp(const Tables *tables, const Partial *partial, const MemParams::System *system, const TimbreParam::PartialParam *partialParam, Bit8u partVolume, const MemParams::RhythmTemp *rhythmTemp, int biasAmpSubtraction, int veloAmpSubtraction, Bit8u expression, bool hasRingModQuirk) { int amp = 155; if (!(hasRingModQuirk ? partial->isRingModulatingNoMix() : partial->isRingModulatingSlave())) { @@ -107,7 +107,7 @@ static int calcBasicAmp(const Tables *tables, const Partial *partial, const MemP if (amp < 0) { return 0; } - amp -= tables->levelToAmpSubtraction[patchTemp->outputLevel]; + amp -= tables->levelToAmpSubtraction[partVolume]; if (amp < 0) { return 0; } @@ -154,7 +154,6 @@ static int calcKeyTimeSubtraction(Bit8u envTimeKeyfollow, int key) { void TVA::reset(const Part *newPart, const TimbreParam::PartialParam *newPartialParam, const MemParams::RhythmTemp *newRhythmTemp) { part = newPart; partialParam = newPartialParam; - patchTemp = newPart->getPatchTemp(); rhythmTemp = newRhythmTemp; playing = true; @@ -169,7 +168,7 @@ void TVA::reset(const Part *newPart, const TimbreParam::PartialParam *newPartial biasAmpSubtraction = calcBiasAmpSubtractions(partialParam, key); veloAmpSubtraction = calcVeloAmpSubtraction(partialParam->tva.veloSensitivity, velocity); - int newTarget = calcBasicAmp(tables, partial, system, partialParam, patchTemp, newRhythmTemp, biasAmpSubtraction, veloAmpSubtraction, part->getExpression(), partial->getSynth()->controlROMFeatures->quirkRingModulationNoMix); + int newTarget = calcBasicAmp(tables, partial, system, partialParam, part->getVolume(), newRhythmTemp, biasAmpSubtraction, veloAmpSubtraction, part->getExpression(), partial->getSynth()->controlROMFeatures->quirkRingModulationNoMix); int newPhase; if (partialParam->tva.envTime[0] == 0) { // Initially go to the TVA_PHASE_ATTACK target amp, and spend the next phase going from there to the TVA_PHASE_2 target amp @@ -221,7 +220,7 @@ void TVA::recalcSustain() { } // We're sustaining. Recalculate all the values const Tables *tables = &Tables::getInstance(); - int newTarget = calcBasicAmp(tables, partial, system, partialParam, patchTemp, rhythmTemp, biasAmpSubtraction, veloAmpSubtraction, part->getExpression(), partial->getSynth()->controlROMFeatures->quirkRingModulationNoMix); + int newTarget = calcBasicAmp(tables, partial, system, partialParam, part->getVolume(), rhythmTemp, biasAmpSubtraction, veloAmpSubtraction, part->getExpression(), partial->getSynth()->controlROMFeatures->quirkRingModulationNoMix); newTarget += partialParam->tva.envLevel[3]; // Although we're in TVA_PHASE_SUSTAIN at this point, we cannot be sure that there is no active ramp at the moment. @@ -271,10 +270,10 @@ void TVA::nextPhase() { } bool allLevelsZeroFromNowOn = false; - if (!partial->getSynth()->controlROMFeatures->quirkTVAZeroEnvLevels && partialParam->tva.envLevel[3] == 0) { + if (partialParam->tva.envLevel[3] == 0) { if (newPhase == TVA_PHASE_4) { allLevelsZeroFromNowOn = true; - } else if (partialParam->tva.envLevel[2] == 0) { + } else if (!partial->getSynth()->controlROMFeatures->quirkTVAZeroEnvLevels && partialParam->tva.envLevel[2] == 0) { if (newPhase == TVA_PHASE_3) { allLevelsZeroFromNowOn = true; } else if (partialParam->tva.envLevel[1] == 0) { @@ -294,7 +293,7 @@ void TVA::nextPhase() { int envPointIndex = phase; if (!allLevelsZeroFromNowOn) { - newTarget = calcBasicAmp(tables, partial, system, partialParam, patchTemp, rhythmTemp, biasAmpSubtraction, veloAmpSubtraction, part->getExpression(), partial->getSynth()->controlROMFeatures->quirkRingModulationNoMix); + newTarget = calcBasicAmp(tables, partial, system, partialParam, part->getVolume(), rhythmTemp, biasAmpSubtraction, veloAmpSubtraction, part->getExpression(), partial->getSynth()->controlROMFeatures->quirkRingModulationNoMix); if (newPhase == TVA_PHASE_SUSTAIN || newPhase == TVA_PHASE_RELEASE) { if (partialParam->tva.envLevel[3] == 0) { diff --git a/src/sound/munt/TVA.h b/src/sound/munt/TVA.h index de6e61017..415909be8 100644 --- a/src/sound/munt/TVA.h +++ b/src/sound/munt/TVA.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -67,7 +67,6 @@ private: const Part *part; const TimbreParam::PartialParam *partialParam; - const MemParams::PatchTemp *patchTemp; const MemParams::RhythmTemp *rhythmTemp; bool playing; diff --git a/src/sound/munt/TVF.cpp b/src/sound/munt/TVF.cpp index 3d5f26049..47ce0a936 100644 --- a/src/sound/munt/TVF.cpp +++ b/src/sound/munt/TVF.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -206,6 +206,8 @@ void TVF::nextPhase() { } startRamp((levelMult * partialParam->tvf.envLevel[3]) >> 8, 0, newPhase); return; + default: + break; } int envPointIndex = phase; diff --git a/src/sound/munt/TVF.h b/src/sound/munt/TVF.h index 149b1d09b..1b766e8ed 100644 --- a/src/sound/munt/TVF.h +++ b/src/sound/munt/TVF.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/TVP.cpp b/src/sound/munt/TVP.cpp index 3d5f492fd..9921f3a4d 100644 --- a/src/sound/munt/TVP.cpp +++ b/src/sound/munt/TVP.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -54,13 +54,32 @@ static Bit16u keyToPitchTable[] = { // We want to do processing 4000 times per second. FIXME: This is pretty arbitrary. static const int NOMINAL_PROCESS_TIMER_PERIOD_SAMPLES = SAMPLE_RATE / 4000; -// The timer runs at 500kHz. This is how much to increment it after 8 samples passes. -// We multiply by 8 to get rid of the fraction and deal with just integers. -static const int PROCESS_TIMER_INCREMENT_x8 = 8 * 500000 / SAMPLE_RATE; +// In all hardware units we emulate, the main clock frequency of the MCU is 12MHz. +// However, the MCU used in the 3rd-gen sound modules (like CM-500 and LAPC-N) +// is significantly faster. Importantly, the software timer also works faster, +// yet this fact has been seemingly missed. To be more specific, the software timer +// ticks each 8 "state times", and 1 state time equals to 3 clock periods +// for 8095 and 8098 but 2 clock periods for 80C198. That is, on MT-32 and CM-32L, +// the software timer tick rate is 12,000,000 / 3 / 8 = 500kHz, but on the 3rd-gen +// devices it's 12,000,000 / 2 / 8 = 750kHz instead. + +// For 1st- and 2nd-gen devices, the timer ticks at 500kHz. This is how much to increment +// timeElapsed once 16 samples passes. We multiply by 16 to get rid of the fraction +// and deal with just integers. +static const int PROCESS_TIMER_TICKS_PER_SAMPLE_X16_1N2_GEN = (500000 << 4) / SAMPLE_RATE; +// For 3rd-gen devices, the timer ticks at 750kHz. This is how much to increment +// timeElapsed once 16 samples passes. We multiply by 16 to get rid of the fraction +// and deal with just integers. +static const int PROCESS_TIMER_TICKS_PER_SAMPLE_X16_3_GEN = (750000 << 4) / SAMPLE_RATE; TVP::TVP(const Partial *usePartial) : - partial(usePartial), system(&usePartial->getSynth()->mt32ram.system) { -} + partial(usePartial), + system(&usePartial->getSynth()->mt32ram.system), + processTimerTicksPerSampleX16( + partial->getSynth()->controlROMFeatures->quirkFastPitchChanges + ? PROCESS_TIMER_TICKS_PER_SAMPLE_X16_3_GEN + : PROCESS_TIMER_TICKS_PER_SAMPLE_X16_1N2_GEN) +{} static Bit16s keyToPitch(unsigned int key) { // We're using a table to do: return round_to_nearest_or_even((key - 60) * (4096.0 / 12.0)) @@ -270,7 +289,7 @@ void TVP::setupPitchChange(int targetPitchOffset, Bit8u changeDuration) { pitchOffsetDelta = -pitchOffsetDelta; } // We want to maximise the number of bits of the Bit16s "pitchOffsetChangePerBigTick" we use in order to get the best possible precision later - Bit32u absPitchOffsetDelta = pitchOffsetDelta << 16; + Bit32u absPitchOffsetDelta = (pitchOffsetDelta & 0xFFFF) << 16; Bit8u normalisationShifts = normalise(absPitchOffsetDelta); // FIXME: Double-check: normalisationShifts is usually between 0 and 15 here, unless the delta is 0, in which case it's 31 absPitchOffsetDelta = absPitchOffsetDelta >> 1; // Make room for the sign bit @@ -301,7 +320,7 @@ void TVP::startDecay() { Bit16u TVP::nextPitch() { // We emulate MCU software timer using these counter and processTimerIncrement variables. - // The value of nominalProcessTimerPeriod approximates the period in samples + // The value of NOMINAL_PROCESS_TIMER_PERIOD_SAMPLES approximates the period in samples // between subsequent firings of the timer that normally occur. // However, accurate emulation is quite complicated because the timer is not guaranteed to fire in time. // This makes pitch variations on real unit non-deterministic and dependent on various factors. @@ -309,7 +328,7 @@ Bit16u TVP::nextPitch() { timeElapsed = (timeElapsed + processTimerIncrement) & 0x00FFFFFF; // This roughly emulates pitch deviations observed on real units when playing a single partial that uses TVP/LFO. counter = NOMINAL_PROCESS_TIMER_PERIOD_SAMPLES + (rand() & 3); - processTimerIncrement = (PROCESS_TIMER_INCREMENT_x8 * counter) >> 3; + processTimerIncrement = (processTimerTicksPerSampleX16 * counter) >> 4; process(); } counter--; @@ -337,13 +356,16 @@ void TVP::process() { return; } // FIXME: Write explanation for this stuff + // NOTE: Value of shifts may happily exceed the maximum of 31 specified for the 8095 MCU. + // We assume the device performs a shift with the rightmost 5 bits of the counter regardless of argument size, + // since shift instructions of any size have the same maximum. int rightShifts = shifts; if (rightShifts > 13) { rightShifts -= 13; - negativeBigTicksRemaining = negativeBigTicksRemaining >> rightShifts; // PORTABILITY NOTE: Assumes arithmetic shift + negativeBigTicksRemaining = negativeBigTicksRemaining >> (rightShifts & 0x1F); // PORTABILITY NOTE: Assumes arithmetic shift rightShifts = 13; } - int newResult = (negativeBigTicksRemaining * pitchOffsetChangePerBigTick) >> rightShifts; // PORTABILITY NOTE: Assumes arithmetic shift + int newResult = (negativeBigTicksRemaining * pitchOffsetChangePerBigTick) >> (rightShifts & 0x1F); // PORTABILITY NOTE: Assumes arithmetic shift newResult += targetPitchOffsetWithoutLFO + lfoPitchOffset; currentPitchOffset = newResult; updatePitch(); diff --git a/src/sound/munt/TVP.h b/src/sound/munt/TVP.h index c3dc314b4..61bd2033e 100644 --- a/src/sound/munt/TVP.h +++ b/src/sound/munt/TVP.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -36,6 +36,7 @@ private: const TimbreParam::PartialParam *partialParam; const MemParams::PatchTemp *patchTemp; + const int processTimerTicksPerSampleX16; int processTimerIncrement; int counter; Bit32u timeElapsed; diff --git a/src/sound/munt/Tables.cpp b/src/sound/munt/Tables.cpp index 7fee467e8..dff042d20 100644 --- a/src/sound/munt/Tables.cpp +++ b/src/sound/munt/Tables.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/Tables.h b/src/sound/munt/Tables.h index 790ee17b9..2f9053215 100644 --- a/src/sound/munt/Tables.h +++ b/src/sound/munt/Tables.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/Types.h b/src/sound/munt/Types.h index 17c33e568..12e454750 100644 --- a/src/sound/munt/Types.h +++ b/src/sound/munt/Types.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/VersionTagging.cpp b/src/sound/munt/VersionTagging.cpp new file mode 100644 index 000000000..0a3388f3b --- /dev/null +++ b/src/sound/munt/VersionTagging.cpp @@ -0,0 +1,32 @@ +/* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 2.1 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this program. If not, see . + */ + +#include "globals.h" + +extern "C" { +// Here's a list of all tagged minor library versions through global (potentially versioned) symbols. +// An application that's been linked with an older library version will be able to find a matching tag, +// while for an application linked with a newer library version there will be no match. + +MT32EMU_EXPORT_V(2.5) extern const volatile char mt32emu_2_5 = 0; +MT32EMU_EXPORT_V(2.6) extern const volatile char mt32emu_2_6 = 0; +MT32EMU_EXPORT_V(2.7) extern const volatile char mt32emu_2_7 = 0; + +#if MT32EMU_VERSION_MAJOR > 2 || MT32EMU_VERSION_MINOR > 7 +#error "Missing version tag definition for current library version" +#endif +} diff --git a/src/sound/munt/VersionTagging.h b/src/sound/munt/VersionTagging.h new file mode 100644 index 000000000..df211f3c0 --- /dev/null +++ b/src/sound/munt/VersionTagging.h @@ -0,0 +1,60 @@ +/* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 2.1 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this program. If not, see . + */ + +#ifndef MT32EMU_VERSION_TAG_H +#define MT32EMU_VERSION_TAG_H + +#include "globals.h" + +/* This is intended to implement a simple check of a shared library version in runtime. Sadly, per-symbol versioning + * is unavailable on many platforms, and even where it is, it's still not too easy to maintain for a C++ library. + * Therefore, the goal here is just to ensure that the client application quickly bails out when attempted to run + * with an older version of shared library, as well as to produce a more readable error message indicating a version mismatch + * rather than a report about some missing symbols with unreadable mangled names. + * This is an optional feature, since it adds some minor burden to both the library and client applications code, + * albeit it is ought to work on platforms that do not implement symbol versioning. + */ + +#define MT32EMU_REALLY_BUILD_VERSION_TAG(major, minor) mt32emu_ ## major ## _ ## minor +/* This macro expansion step permits resolution the actual version numbers. */ +#define MT32EMU_BUILD_VERSION_TAG(major, minor) MT32EMU_REALLY_BUILD_VERSION_TAG(major, minor) +#define MT32EMU_VERSION_TAG MT32EMU_BUILD_VERSION_TAG(MT32EMU_VERSION_MAJOR, MT32EMU_VERSION_MINOR) + +#if defined(__cplusplus) + +extern "C" { +MT32EMU_EXPORT extern const volatile char MT32EMU_VERSION_TAG; +} +// This pulls the external reference in yet prevents it from being optimised out. +static const volatile char mt32emu_version_tag = MT32EMU_VERSION_TAG; + +#else + +static void mt32emu_refer_version_tag(void) { + MT32EMU_EXPORT extern const volatile char MT32EMU_VERSION_TAG; + (void)MT32EMU_VERSION_TAG; +} + +static void (*const volatile mt32emu_refer_version_tag_ref)(void) = mt32emu_refer_version_tag; + +#endif + +#undef MT32EMU_REALLY_BUILD_VERSION_TAG +#undef MT32EMU_BUILD_VERSION_TAG +#undef MT32EMU_VERSION_TAG + +#endif diff --git a/src/sound/munt/c_interface/c_interface.cpp b/src/sound/munt/c_interface/c_interface.cpp index 48eb2824a..4c7706be8 100644 --- a/src/sound/munt/c_interface/c_interface.cpp +++ b/src/sound/munt/c_interface/c_interface.cpp @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -15,6 +15,8 @@ * along with this program. If not, see . */ +#include + #include "../globals.h" #include "../Types.h" #include "../File.h" @@ -37,11 +39,11 @@ struct SamplerateConversionState { SampleRateConverter *src; }; -static mt32emu_service_version getSynthVersionID(mt32emu_service_i) { +static mt32emu_service_version MT32EMU_C_CALL getSynthVersionID(mt32emu_service_i) { return MT32EMU_SERVICE_VERSION_CURRENT; } -static const mt32emu_service_i_v3 SERVICE_VTABLE = { +static const mt32emu_service_i_v6 SERVICE_VTABLE = { getSynthVersionID, mt32emu_get_supported_report_handler_version, mt32emu_get_supported_midi_receiver_version, @@ -118,13 +120,29 @@ static const mt32emu_service_i_v3 SERVICE_VTABLE = { mt32emu_set_nice_partial_mixing_enabled, mt32emu_is_nice_partial_mixing_enabled, mt32emu_preallocate_reverb_memory, - mt32emu_configure_midi_event_queue_sysex_storage + mt32emu_configure_midi_event_queue_sysex_storage, + mt32emu_get_machine_ids, + mt32emu_get_rom_ids, + mt32emu_identify_rom_data, + mt32emu_identify_rom_file, + mt32emu_merge_and_add_rom_data, + mt32emu_merge_and_add_rom_files, + mt32emu_add_machine_rom_file, + mt32emu_get_display_state, + mt32emu_set_main_display_mode, + mt32emu_set_display_compatibility, + mt32emu_is_display_old_mt32_compatible, + mt32emu_is_default_display_old_mt32_compatible, + mt32emu_set_part_volume_override, + mt32emu_get_part_volume_override, + mt32emu_get_sound_group_name, + mt32emu_get_sound_name }; } // namespace MT32Emu struct mt32emu_data { - ReportHandler *reportHandler; + ReportHandler2 *reportHandler; Synth *synth; const ROMImage *controlROMImage; const ROMImage *pcmROMImage; @@ -138,16 +156,19 @@ struct mt32emu_data { namespace MT32Emu { -class DelegatingReportHandlerAdapter : public ReportHandler { +class DelegatingReportHandlerAdapter : public ReportHandler2 { public: DelegatingReportHandlerAdapter(mt32emu_report_handler_i useReportHandler, void *useInstanceData) : delegate(useReportHandler), instanceData(useInstanceData) {} -protected: +private: const mt32emu_report_handler_i delegate; void * const instanceData; -private: + bool isVersionLess(mt32emu_report_handler_version versionID) { + return delegate.v0->getVersionID(delegate) < versionID; + } + void printDebug(const char *fmt, va_list list) { if (delegate.v0->printDebug == NULL) { ReportHandler::printDebug(fmt, list); @@ -258,6 +279,22 @@ private: delegate.v0->onProgramChanged(instanceData, partNum, soundGroupName, patchName); } } + + void onLCDStateUpdated() { + if (isVersionLess(MT32EMU_REPORT_HANDLER_VERSION_1) || delegate.v1->onLCDStateUpdated == NULL) { + ReportHandler2::onLCDStateUpdated(); + } else { + delegate.v1->onLCDStateUpdated(instanceData); + } + } + + void onMidiMessageLEDStateUpdated(bool ledState) { + if (isVersionLess(MT32EMU_REPORT_HANDLER_VERSION_1) || delegate.v1->onMidiMessageLEDStateUpdated == NULL) { + ReportHandler2::onMidiMessageLEDStateUpdated(ledState); + } else { + delegate.v1->onMidiMessageLEDStateUpdated(instanceData, ledState ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE); + } + } }; class DelegatingMidiStreamParser : public DefaultMidiStreamParser { @@ -295,30 +332,130 @@ private: } }; -static mt32emu_return_code addROMFile(mt32emu_data *data, File *file) { - const ROMImage *image = ROMImage::makeROMImage(file); - const ROMInfo *info = image->getROMInfo(); - if (info == NULL) { - ROMImage::freeROMImage(image); +static void fillROMInfo(mt32emu_rom_info *rom_info, const ROMInfo *controlROMInfo, const ROMInfo *pcmROMInfo) { + if (controlROMInfo != NULL) { + rom_info->control_rom_id = controlROMInfo->shortName; + rom_info->control_rom_description = controlROMInfo->description; + rom_info->control_rom_sha1_digest = controlROMInfo->sha1Digest; + } else { + rom_info->control_rom_id = NULL; + rom_info->control_rom_description = NULL; + rom_info->control_rom_sha1_digest = NULL; + } + if (pcmROMInfo != NULL) { + rom_info->pcm_rom_id = pcmROMInfo->shortName; + rom_info->pcm_rom_description = pcmROMInfo->description; + rom_info->pcm_rom_sha1_digest = pcmROMInfo->sha1Digest; + } else { + rom_info->pcm_rom_id = NULL; + rom_info->pcm_rom_description = NULL; + rom_info->pcm_rom_sha1_digest = NULL; + } +} + +static const MachineConfiguration *findMachineConfiguration(const char *machine_id) { + Bit32u configurationCount; + const MachineConfiguration * const *configurations = MachineConfiguration::getAllMachineConfigurations(&configurationCount); + for (Bit32u i = 0; i < configurationCount; i++) { + if (!strcmp(configurations[i]->getMachineID(), machine_id)) return configurations[i]; + } + return NULL; +} + +static mt32emu_return_code identifyROM(mt32emu_rom_info *rom_info, File *romFile, const char *machineID) { + const ROMInfo *romInfo; + if (machineID == NULL) { + romInfo = ROMInfo::getROMInfo(romFile); + } else { + const MachineConfiguration *configuration = findMachineConfiguration(machineID); + if (configuration == NULL) { + fillROMInfo(rom_info, NULL, NULL); + return MT32EMU_RC_MACHINE_NOT_IDENTIFIED; + } + romInfo = ROMInfo::getROMInfo(romFile, configuration->getCompatibleROMInfos()); + } + if (romInfo == NULL) { + fillROMInfo(rom_info, NULL, NULL); return MT32EMU_RC_ROM_NOT_IDENTIFIED; } - if (info->type == ROMInfo::Control) { - if (data->controlROMImage != NULL) { - delete data->controlROMImage->getFile(); - ROMImage::freeROMImage(data->controlROMImage); - } - data->controlROMImage = image; - return MT32EMU_RC_ADDED_CONTROL_ROM; - } else if (info->type == ROMInfo::PCM) { - if (data->pcmROMImage != NULL) { - delete data->pcmROMImage->getFile(); - ROMImage::freeROMImage(data->pcmROMImage); - } - data->pcmROMImage = image; - return MT32EMU_RC_ADDED_PCM_ROM; + if (romInfo->type == ROMInfo::Control) fillROMInfo(rom_info, romInfo, NULL); + else if (romInfo->type == ROMInfo::PCM) fillROMInfo(rom_info, NULL, romInfo); + else fillROMInfo(rom_info, NULL, NULL); + return MT32EMU_RC_OK; +} + +static bool isROMInfoCompatible(const MachineConfiguration *machineConfiguration, const ROMInfo *romInfo) { + Bit32u romCount; + const ROMInfo * const *compatibleROMInfos = machineConfiguration->getCompatibleROMInfos(&romCount); + for (Bit32u i = 0; i < romCount; i++) { + if (romInfo == compatibleROMInfos[i]) return true; } - ROMImage::freeROMImage(image); - return MT32EMU_RC_OK; // No support for reverb ROM yet. + return false; +} + +static mt32emu_return_code replaceOrMergeROMImage(const ROMImage *&contextROMImage, const ROMImage *newROMImage, const MachineConfiguration *machineConfiguration, mt32emu_return_code addedFullROM, mt32emu_return_code addedPartialROM) { + if (contextROMImage != NULL) { + if (machineConfiguration != NULL) { + const ROMImage *mergedROMImage = ROMImage::mergeROMImages(contextROMImage, newROMImage); + if (mergedROMImage != NULL) { + if (newROMImage->isFileUserProvided()) delete newROMImage->getFile(); + ROMImage::freeROMImage(newROMImage); + if (contextROMImage->isFileUserProvided()) delete contextROMImage->getFile(); + ROMImage::freeROMImage(contextROMImage); + contextROMImage = mergedROMImage; + return addedFullROM; + } + if (newROMImage->getROMInfo() == contextROMImage->getROMInfo() + || (newROMImage->getROMInfo()->pairType != ROMInfo::Full + && isROMInfoCompatible(machineConfiguration, contextROMImage->getROMInfo()))) { + ROMImage::freeROMImage(newROMImage); + return MT32EMU_RC_OK; + } + } + if (contextROMImage->isFileUserProvided()) delete contextROMImage->getFile(); + ROMImage::freeROMImage(contextROMImage); + } + contextROMImage = newROMImage; + return newROMImage->getROMInfo()->pairType == ROMInfo::Full ? addedFullROM: addedPartialROM; +} + +static mt32emu_return_code addROMFiles(mt32emu_data *data, File *file1, File *file2 = NULL, const MachineConfiguration *machineConfiguration = NULL) { + const ROMImage *romImage; + if (machineConfiguration != NULL) { + romImage = ROMImage::makeROMImage(file1, machineConfiguration->getCompatibleROMInfos()); + } else { + romImage = file2 == NULL ? ROMImage::makeROMImage(file1, ROMInfo::getFullROMInfos()) : ROMImage::makeROMImage(file1, file2); + } + if (romImage == NULL) return MT32EMU_RC_ROMS_NOT_PAIRABLE; + const ROMInfo *info = romImage->getROMInfo(); + if (info == NULL) { + ROMImage::freeROMImage(romImage); + return MT32EMU_RC_ROM_NOT_IDENTIFIED; + } + switch (info->type) { + case ROMInfo::Control: + return replaceOrMergeROMImage(data->controlROMImage, romImage, machineConfiguration, MT32EMU_RC_ADDED_CONTROL_ROM, MT32EMU_RC_ADDED_PARTIAL_CONTROL_ROM); + case ROMInfo::PCM: + return replaceOrMergeROMImage(data->pcmROMImage, romImage, machineConfiguration, MT32EMU_RC_ADDED_PCM_ROM, MT32EMU_RC_ADDED_PARTIAL_PCM_ROM); + default: + ROMImage::freeROMImage(romImage); + return MT32EMU_RC_OK; // No support for reverb ROM yet. + } +} + +static mt32emu_return_code createFileStream(const char *filename, FileStream *&fileStream) { + mt32emu_return_code rc; + fileStream = new FileStream; + if (!fileStream->open(filename)) { + rc = MT32EMU_RC_FILE_NOT_FOUND; + } else if (fileStream->getSize() == 0) { + rc = MT32EMU_RC_FILE_NOT_LOADED; + } else { + return MT32EMU_RC_OK; + } + delete fileStream; + fileStream = NULL; + return rc; } } // namespace MT32Emu @@ -327,40 +464,92 @@ static mt32emu_return_code addROMFile(mt32emu_data *data, File *file) { extern "C" { -mt32emu_service_i mt32emu_get_service_i() { +mt32emu_service_i MT32EMU_C_CALL mt32emu_get_service_i() { mt32emu_service_i i; - i.v3 = &SERVICE_VTABLE; + i.v6 = &SERVICE_VTABLE; return i; } -mt32emu_report_handler_version mt32emu_get_supported_report_handler_version() { +mt32emu_report_handler_version MT32EMU_C_CALL mt32emu_get_supported_report_handler_version() { return MT32EMU_REPORT_HANDLER_VERSION_CURRENT; } -mt32emu_midi_receiver_version mt32emu_get_supported_midi_receiver_version() { +mt32emu_midi_receiver_version MT32EMU_C_CALL mt32emu_get_supported_midi_receiver_version() { return MT32EMU_MIDI_RECEIVER_VERSION_CURRENT; } -mt32emu_bit32u mt32emu_get_library_version_int() { +mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_library_version_int() { return Synth::getLibraryVersionInt(); } -const char *mt32emu_get_library_version_string() { +const char * MT32EMU_C_CALL mt32emu_get_library_version_string() { return Synth::getLibraryVersionString(); } -mt32emu_bit32u mt32emu_get_stereo_output_samplerate(const mt32emu_analog_output_mode analog_output_mode) { +mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_stereo_output_samplerate(const mt32emu_analog_output_mode analog_output_mode) { return Synth::getStereoOutputSampleRate(static_cast(analog_output_mode)); } -mt32emu_analog_output_mode mt32emu_get_best_analog_output_mode(const double target_samplerate) { +mt32emu_analog_output_mode MT32EMU_C_CALL mt32emu_get_best_analog_output_mode(const double target_samplerate) { return mt32emu_analog_output_mode(SampleRateConverter::getBestAnalogOutputMode(target_samplerate)); } -mt32emu_context mt32emu_create_context(mt32emu_report_handler_i report_handler, void *instance_data) { +size_t MT32EMU_C_CALL mt32emu_get_machine_ids(const char **machine_ids, size_t machine_ids_size) { + Bit32u configurationCount; + const MachineConfiguration * const *configurations = MachineConfiguration::getAllMachineConfigurations(&configurationCount); + if (machine_ids != NULL) { + for (Bit32u i = 0; i < machine_ids_size; i++) { + machine_ids[i] = i < configurationCount ? configurations[i]->getMachineID() : NULL; + } + } + return configurationCount; +} + +size_t MT32EMU_C_CALL mt32emu_get_rom_ids(const char **rom_ids, size_t rom_ids_size, const char *machine_id) { + const ROMInfo * const *romInfos; + Bit32u romCount; + if (machine_id != NULL) { + const MachineConfiguration *configuration = findMachineConfiguration(machine_id); + if (configuration != NULL) { + romInfos = configuration->getCompatibleROMInfos(&romCount); + } else { + romInfos = NULL; + romCount = 0U; + } + } else { + romInfos = ROMInfo::getAllROMInfos(&romCount); + } + if (rom_ids != NULL) { + for (size_t i = 0; i < rom_ids_size; i++) { + rom_ids[i] = i < romCount ? romInfos[i]->shortName : NULL; + } + } + return romCount; +} + +mt32emu_return_code MT32EMU_C_CALL mt32emu_identify_rom_data(mt32emu_rom_info *rom_info, const mt32emu_bit8u *data, size_t data_size, const char *machine_id) { + ArrayFile romFile = ArrayFile(data, data_size); + return identifyROM(rom_info, &romFile, machine_id); +} + +mt32emu_return_code MT32EMU_C_CALL mt32emu_identify_rom_file(mt32emu_rom_info *rom_info, const char *filename, const char *machine_id) { + FileStream *fs; + mt32emu_return_code rc = createFileStream(filename, fs); + if (fs == NULL) return rc; + rc = identifyROM(rom_info, fs, machine_id); + delete fs; + return rc; +} + +mt32emu_context MT32EMU_C_CALL mt32emu_create_context(mt32emu_report_handler_i report_handler, void *instance_data) { mt32emu_data *data = new mt32emu_data; - data->reportHandler = (report_handler.v0 != NULL) ? new DelegatingReportHandlerAdapter(report_handler, instance_data) : new ReportHandler; - data->synth = new Synth(data->reportHandler); + data->synth = new Synth; + if (report_handler.v0 != NULL) { + data->reportHandler = new DelegatingReportHandlerAdapter(report_handler, instance_data); + data->synth->setReportHandler2(data->reportHandler); + } else { + data->reportHandler = NULL; + } data->midiParser = new DefaultMidiStreamParser(*data->synth); data->controlROMImage = NULL; data->pcmROMImage = NULL; @@ -375,7 +564,7 @@ mt32emu_context mt32emu_create_context(mt32emu_report_handler_i report_handler, return data; } -void mt32emu_free_context(mt32emu_context data) { +void MT32EMU_C_CALL mt32emu_free_context(mt32emu_context data) { if (data == NULL) return; delete data->srcState->src; @@ -384,12 +573,12 @@ void mt32emu_free_context(mt32emu_context data) { data->srcState = NULL; if (data->controlROMImage != NULL) { - delete data->controlROMImage->getFile(); + if (data->controlROMImage->isFileUserProvided()) delete data->controlROMImage->getFile(); ROMImage::freeROMImage(data->controlROMImage); data->controlROMImage = NULL; } if (data->pcmROMImage != NULL) { - delete data->pcmROMImage->getFile(); + if (data->pcmROMImage->isFileUserProvided()) delete data->pcmROMImage->getFile(); ROMImage::freeROMImage(data->pcmROMImage); data->pcmROMImage = NULL; } @@ -402,76 +591,86 @@ void mt32emu_free_context(mt32emu_context data) { delete data; } -mt32emu_return_code mt32emu_add_rom_data(mt32emu_context context, const mt32emu_bit8u *data, size_t data_size, const mt32emu_sha1_digest *sha1_digest) { - if (sha1_digest == NULL) return addROMFile(context, new ArrayFile(data, data_size)); - return addROMFile(context, new ArrayFile(data, data_size, *sha1_digest)); +mt32emu_return_code MT32EMU_C_CALL mt32emu_add_rom_data(mt32emu_context context, const mt32emu_bit8u *data, size_t data_size, const mt32emu_sha1_digest *sha1_digest) { + if (sha1_digest == NULL) return addROMFiles(context, new ArrayFile(data, data_size)); + return addROMFiles(context, new ArrayFile(data, data_size, *sha1_digest)); } -mt32emu_return_code mt32emu_add_rom_file(mt32emu_context context, const char *filename) { - mt32emu_return_code rc = MT32EMU_RC_OK; - FileStream *fs = new FileStream; - if (fs->open(filename)) { - if (fs->getData() != NULL) { - rc = addROMFile(context, fs); - if (rc > 0) return rc; - } else { - rc = MT32EMU_RC_FILE_NOT_LOADED; - } - } else { - rc = MT32EMU_RC_FILE_NOT_FOUND; - } - delete fs; +mt32emu_return_code MT32EMU_C_CALL mt32emu_add_rom_file(mt32emu_context context, const char *filename) { + FileStream *fs; + mt32emu_return_code rc = createFileStream(filename, fs); + if (fs != NULL) rc = addROMFiles(context, fs); + if (rc <= MT32EMU_RC_OK) delete fs; return rc; } -void mt32emu_get_rom_info(mt32emu_const_context context, mt32emu_rom_info *rom_info) { - const ROMInfo *romInfo = context->controlROMImage == NULL ? NULL : context->controlROMImage->getROMInfo(); - if (romInfo != NULL) { - rom_info->control_rom_id = romInfo->shortName; - rom_info->control_rom_description = romInfo->description; - rom_info->control_rom_sha1_digest = romInfo->sha1Digest; - } else { - rom_info->control_rom_id = NULL; - rom_info->control_rom_description = NULL; - rom_info->control_rom_sha1_digest = NULL; - } - romInfo = context->pcmROMImage == NULL ? NULL : context->pcmROMImage->getROMInfo(); - if (romInfo != NULL) { - rom_info->pcm_rom_id = romInfo->shortName; - rom_info->pcm_rom_description = romInfo->description; - rom_info->pcm_rom_sha1_digest = romInfo->sha1Digest; - } else { - rom_info->pcm_rom_id = NULL; - rom_info->pcm_rom_description = NULL; - rom_info->pcm_rom_sha1_digest = NULL; - } +mt32emu_return_code MT32EMU_C_CALL mt32emu_merge_and_add_rom_data(mt32emu_context context, const mt32emu_bit8u *part1_data, size_t part1_data_size, const mt32emu_sha1_digest *part1_sha1_digest, const mt32emu_bit8u *part2_data, size_t part2_data_size, const mt32emu_sha1_digest *part2_sha1_digest) { + ArrayFile *file1 = part1_sha1_digest == NULL ? new ArrayFile(part1_data, part1_data_size) : new ArrayFile(part1_data, part1_data_size, *part1_sha1_digest); + ArrayFile *file2 = part2_sha1_digest == NULL ? new ArrayFile(part2_data, part2_data_size) : new ArrayFile(part2_data, part2_data_size, *part2_sha1_digest); + mt32emu_return_code rc = addROMFiles(context, file1, file2); + delete file1; + delete file2; + return rc; } -void mt32emu_set_partial_count(mt32emu_context context, const mt32emu_bit32u partial_count) { +mt32emu_return_code MT32EMU_C_CALL mt32emu_merge_and_add_rom_files(mt32emu_context context, const char *part1_filename, const char *part2_filename) { + FileStream *fs1; + mt32emu_return_code rc = createFileStream(part1_filename, fs1); + if (fs1 != NULL) { + FileStream *fs2; + rc = createFileStream(part2_filename, fs2); + if (fs2 != NULL) { + rc = addROMFiles(context, fs1, fs2); + delete fs2; + } + delete fs1; + } + return rc; +} + +mt32emu_return_code MT32EMU_C_CALL mt32emu_add_machine_rom_file(mt32emu_context context, const char *machine_id, const char *filename) { + const MachineConfiguration *machineConfiguration = findMachineConfiguration(machine_id); + if (machineConfiguration == NULL) return MT32EMU_RC_MACHINE_NOT_IDENTIFIED; + + FileStream *fs; + mt32emu_return_code rc = createFileStream(filename, fs); + if (fs == NULL) return rc; + rc = addROMFiles(context, fs, NULL, machineConfiguration); + if (rc <= MT32EMU_RC_OK) delete fs; + return rc; +} + +void MT32EMU_C_CALL mt32emu_get_rom_info(mt32emu_const_context context, mt32emu_rom_info *rom_info) { + const ROMInfo *controlROMInfo = context->controlROMImage == NULL ? NULL : context->controlROMImage->getROMInfo(); + const ROMInfo *pcmROMInfo = context->pcmROMImage == NULL ? NULL : context->pcmROMImage->getROMInfo(); + fillROMInfo(rom_info, controlROMInfo, pcmROMInfo); +} + +void MT32EMU_C_CALL mt32emu_set_partial_count(mt32emu_context context, const mt32emu_bit32u partial_count) { context->partialCount = partial_count; } -void mt32emu_set_analog_output_mode(mt32emu_context context, const mt32emu_analog_output_mode analog_output_mode) { +void MT32EMU_C_CALL mt32emu_set_analog_output_mode(mt32emu_context context, const mt32emu_analog_output_mode analog_output_mode) { context->analogOutputMode = static_cast(analog_output_mode); } -void mt32emu_set_stereo_output_samplerate(mt32emu_context context, const double samplerate) { +void MT32EMU_C_CALL mt32emu_set_stereo_output_samplerate(mt32emu_context context, const double samplerate) { context->srcState->outputSampleRate = SampleRateConverter::getSupportedOutputSampleRate(samplerate); } -void mt32emu_set_samplerate_conversion_quality(mt32emu_context context, const mt32emu_samplerate_conversion_quality quality) { +void MT32EMU_C_CALL mt32emu_set_samplerate_conversion_quality(mt32emu_context context, const mt32emu_samplerate_conversion_quality quality) { context->srcState->srcQuality = SamplerateConversionQuality(quality); } -void mt32emu_select_renderer_type(mt32emu_context context, const mt32emu_renderer_type renderer_type) { +void MT32EMU_C_CALL mt32emu_select_renderer_type(mt32emu_context context, const mt32emu_renderer_type renderer_type) { context->synth->selectRendererType(static_cast(renderer_type)); } -mt32emu_renderer_type mt32emu_get_selected_renderer_type(mt32emu_context context) { +mt32emu_renderer_type MT32EMU_C_CALL mt32emu_get_selected_renderer_type(mt32emu_context context) { return static_cast(context->synth->getSelectedRendererType()); } -mt32emu_return_code mt32emu_open_synth(mt32emu_const_context context) { +mt32emu_return_code MT32EMU_C_CALL mt32emu_open_synth(mt32emu_const_context context) { if ((context->controlROMImage == NULL) || (context->pcmROMImage == NULL)) { return MT32EMU_RC_MISSING_ROMS; } @@ -484,211 +683,219 @@ mt32emu_return_code mt32emu_open_synth(mt32emu_const_context context) { return MT32EMU_RC_OK; } -void mt32emu_close_synth(mt32emu_const_context context) { +void MT32EMU_C_CALL mt32emu_close_synth(mt32emu_const_context context) { context->synth->close(); delete context->srcState->src; context->srcState->src = NULL; } -mt32emu_boolean mt32emu_is_open(mt32emu_const_context context) { +mt32emu_boolean MT32EMU_C_CALL mt32emu_is_open(mt32emu_const_context context) { return context->synth->isOpen() ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; } -mt32emu_bit32u mt32emu_get_actual_stereo_output_samplerate(mt32emu_const_context context) { +mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_actual_stereo_output_samplerate(mt32emu_const_context context) { if (context->srcState->src == NULL) { return context->synth->getStereoOutputSampleRate(); } return mt32emu_bit32u(0.5 + context->srcState->src->convertSynthToOutputTimestamp(SAMPLE_RATE)); } -mt32emu_bit32u mt32emu_convert_output_to_synth_timestamp(mt32emu_const_context context, mt32emu_bit32u output_timestamp) { +mt32emu_bit32u MT32EMU_C_CALL mt32emu_convert_output_to_synth_timestamp(mt32emu_const_context context, mt32emu_bit32u output_timestamp) { if (context->srcState->src == NULL) { return output_timestamp; } return mt32emu_bit32u(0.5 + context->srcState->src->convertOutputToSynthTimestamp(output_timestamp)); } -mt32emu_bit32u mt32emu_convert_synth_to_output_timestamp(mt32emu_const_context context, mt32emu_bit32u synth_timestamp) { +mt32emu_bit32u MT32EMU_C_CALL mt32emu_convert_synth_to_output_timestamp(mt32emu_const_context context, mt32emu_bit32u synth_timestamp) { if (context->srcState->src == NULL) { return synth_timestamp; } return mt32emu_bit32u(0.5 + context->srcState->src->convertSynthToOutputTimestamp(synth_timestamp)); } -void mt32emu_flush_midi_queue(mt32emu_const_context context) { +void MT32EMU_C_CALL mt32emu_flush_midi_queue(mt32emu_const_context context) { context->synth->flushMIDIQueue(); } -mt32emu_bit32u mt32emu_set_midi_event_queue_size(mt32emu_const_context context, const mt32emu_bit32u queue_size) { +mt32emu_bit32u MT32EMU_C_CALL mt32emu_set_midi_event_queue_size(mt32emu_const_context context, const mt32emu_bit32u queue_size) { return context->synth->setMIDIEventQueueSize(queue_size); } -void mt32emu_configure_midi_event_queue_sysex_storage(mt32emu_const_context context, const mt32emu_bit32u storage_buffer_size) { - return context->synth->configureMIDIEventQueueSysexStorage(storage_buffer_size); +void MT32EMU_C_CALL mt32emu_configure_midi_event_queue_sysex_storage(mt32emu_const_context context, const mt32emu_bit32u storage_buffer_size) { + context->synth->configureMIDIEventQueueSysexStorage(storage_buffer_size); } -void mt32emu_set_midi_receiver(mt32emu_context context, mt32emu_midi_receiver_i midi_receiver, void *instance_data) { +void MT32EMU_C_CALL mt32emu_set_midi_receiver(mt32emu_context context, mt32emu_midi_receiver_i midi_receiver, void *instance_data) { delete context->midiParser; context->midiParser = (midi_receiver.v0 != NULL) ? new DelegatingMidiStreamParser(context, midi_receiver, instance_data) : new DefaultMidiStreamParser(*context->synth); } -mt32emu_bit32u mt32emu_get_internal_rendered_sample_count(mt32emu_const_context context) { +mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_internal_rendered_sample_count(mt32emu_const_context context) { return context->synth->getInternalRenderedSampleCount(); } -void mt32emu_parse_stream(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length) { +void MT32EMU_C_CALL mt32emu_parse_stream(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length) { context->midiParser->resetTimestamp(); context->midiParser->parseStream(stream, length); } -void mt32emu_parse_stream_at(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length, mt32emu_bit32u timestamp) { +void MT32EMU_C_CALL mt32emu_parse_stream_at(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length, mt32emu_bit32u timestamp) { context->midiParser->setTimestamp(timestamp); context->midiParser->parseStream(stream, length); } -void mt32emu_play_short_message(mt32emu_const_context context, mt32emu_bit32u message) { +void MT32EMU_C_CALL mt32emu_play_short_message(mt32emu_const_context context, mt32emu_bit32u message) { context->midiParser->resetTimestamp(); context->midiParser->processShortMessage(message); } -void mt32emu_play_short_message_at(mt32emu_const_context context, mt32emu_bit32u message, mt32emu_bit32u timestamp) { +void MT32EMU_C_CALL mt32emu_play_short_message_at(mt32emu_const_context context, mt32emu_bit32u message, mt32emu_bit32u timestamp) { context->midiParser->setTimestamp(timestamp); context->midiParser->processShortMessage(message); } -mt32emu_return_code mt32emu_play_msg(mt32emu_const_context context, mt32emu_bit32u msg) { +mt32emu_return_code MT32EMU_C_CALL mt32emu_play_msg(mt32emu_const_context context, mt32emu_bit32u msg) { if (!context->synth->isOpen()) return MT32EMU_RC_NOT_OPENED; return (context->synth->playMsg(msg)) ? MT32EMU_RC_OK : MT32EMU_RC_QUEUE_FULL; } -mt32emu_return_code mt32emu_play_sysex(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len) { +mt32emu_return_code MT32EMU_C_CALL mt32emu_play_sysex(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len) { if (!context->synth->isOpen()) return MT32EMU_RC_NOT_OPENED; return (context->synth->playSysex(sysex, len)) ? MT32EMU_RC_OK : MT32EMU_RC_QUEUE_FULL; } -mt32emu_return_code mt32emu_play_msg_at(mt32emu_const_context context, mt32emu_bit32u msg, mt32emu_bit32u timestamp) { +mt32emu_return_code MT32EMU_C_CALL mt32emu_play_msg_at(mt32emu_const_context context, mt32emu_bit32u msg, mt32emu_bit32u timestamp) { if (!context->synth->isOpen()) return MT32EMU_RC_NOT_OPENED; return (context->synth->playMsg(msg, timestamp)) ? MT32EMU_RC_OK : MT32EMU_RC_QUEUE_FULL; } -mt32emu_return_code mt32emu_play_sysex_at(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len, mt32emu_bit32u timestamp) { +mt32emu_return_code MT32EMU_C_CALL mt32emu_play_sysex_at(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len, mt32emu_bit32u timestamp) { if (!context->synth->isOpen()) return MT32EMU_RC_NOT_OPENED; return (context->synth->playSysex(sysex, len, timestamp)) ? MT32EMU_RC_OK : MT32EMU_RC_QUEUE_FULL; } -void mt32emu_play_msg_now(mt32emu_const_context context, mt32emu_bit32u msg) { +void MT32EMU_C_CALL mt32emu_play_msg_now(mt32emu_const_context context, mt32emu_bit32u msg) { context->synth->playMsgNow(msg); } -void mt32emu_play_msg_on_part(mt32emu_const_context context, mt32emu_bit8u part, mt32emu_bit8u code, mt32emu_bit8u note, mt32emu_bit8u velocity) { +void MT32EMU_C_CALL mt32emu_play_msg_on_part(mt32emu_const_context context, mt32emu_bit8u part, mt32emu_bit8u code, mt32emu_bit8u note, mt32emu_bit8u velocity) { context->synth->playMsgOnPart(part, code, note, velocity); } -void mt32emu_play_sysex_now(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len) { +void MT32EMU_C_CALL mt32emu_play_sysex_now(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len) { context->synth->playSysexNow(sysex, len); } -void mt32emu_write_sysex(mt32emu_const_context context, mt32emu_bit8u channel, const mt32emu_bit8u *sysex, mt32emu_bit32u len) { +void MT32EMU_C_CALL mt32emu_write_sysex(mt32emu_const_context context, mt32emu_bit8u channel, const mt32emu_bit8u *sysex, mt32emu_bit32u len) { context->synth->writeSysex(channel, sysex, len); } -void mt32emu_set_reverb_enabled(mt32emu_const_context context, const mt32emu_boolean reverb_enabled) { +void MT32EMU_C_CALL mt32emu_set_reverb_enabled(mt32emu_const_context context, const mt32emu_boolean reverb_enabled) { context->synth->setReverbEnabled(reverb_enabled != MT32EMU_BOOL_FALSE); } -mt32emu_boolean mt32emu_is_reverb_enabled(mt32emu_const_context context) { +mt32emu_boolean MT32EMU_C_CALL mt32emu_is_reverb_enabled(mt32emu_const_context context) { return context->synth->isReverbEnabled() ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; } -void mt32emu_set_reverb_overridden(mt32emu_const_context context, const mt32emu_boolean reverb_overridden) { +void MT32EMU_C_CALL mt32emu_set_reverb_overridden(mt32emu_const_context context, const mt32emu_boolean reverb_overridden) { context->synth->setReverbOverridden(reverb_overridden != MT32EMU_BOOL_FALSE); } -mt32emu_boolean mt32emu_is_reverb_overridden(mt32emu_const_context context) { +mt32emu_boolean MT32EMU_C_CALL mt32emu_is_reverb_overridden(mt32emu_const_context context) { return context->synth->isReverbOverridden() ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; } -void mt32emu_set_reverb_compatibility_mode(mt32emu_const_context context, const mt32emu_boolean mt32_compatible_mode) { +void MT32EMU_C_CALL mt32emu_set_reverb_compatibility_mode(mt32emu_const_context context, const mt32emu_boolean mt32_compatible_mode) { context->synth->setReverbCompatibilityMode(mt32_compatible_mode != MT32EMU_BOOL_FALSE); } -mt32emu_boolean mt32emu_is_mt32_reverb_compatibility_mode(mt32emu_const_context context) { +mt32emu_boolean MT32EMU_C_CALL mt32emu_is_mt32_reverb_compatibility_mode(mt32emu_const_context context) { return context->synth->isMT32ReverbCompatibilityMode() ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; } -mt32emu_boolean mt32emu_is_default_reverb_mt32_compatible(mt32emu_const_context context) { +mt32emu_boolean MT32EMU_C_CALL mt32emu_is_default_reverb_mt32_compatible(mt32emu_const_context context) { return context->synth->isDefaultReverbMT32Compatible() ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; } -void mt32emu_preallocate_reverb_memory(mt32emu_const_context context, const mt32emu_boolean enabled) { - return context->synth->preallocateReverbMemory(enabled != MT32EMU_BOOL_FALSE); +void MT32EMU_C_CALL mt32emu_preallocate_reverb_memory(mt32emu_const_context context, const mt32emu_boolean enabled) { + context->synth->preallocateReverbMemory(enabled != MT32EMU_BOOL_FALSE); } -void mt32emu_set_dac_input_mode(mt32emu_const_context context, const mt32emu_dac_input_mode mode) { +void MT32EMU_C_CALL mt32emu_set_dac_input_mode(mt32emu_const_context context, const mt32emu_dac_input_mode mode) { context->synth->setDACInputMode(static_cast(mode)); } -mt32emu_dac_input_mode mt32emu_get_dac_input_mode(mt32emu_const_context context) { +mt32emu_dac_input_mode MT32EMU_C_CALL mt32emu_get_dac_input_mode(mt32emu_const_context context) { return static_cast(context->synth->getDACInputMode()); } -void mt32emu_set_midi_delay_mode(mt32emu_const_context context, const mt32emu_midi_delay_mode mode) { +void MT32EMU_C_CALL mt32emu_set_midi_delay_mode(mt32emu_const_context context, const mt32emu_midi_delay_mode mode) { context->synth->setMIDIDelayMode(static_cast(mode)); } -mt32emu_midi_delay_mode mt32emu_get_midi_delay_mode(mt32emu_const_context context) { +mt32emu_midi_delay_mode MT32EMU_C_CALL mt32emu_get_midi_delay_mode(mt32emu_const_context context) { return static_cast(context->synth->getMIDIDelayMode()); } -void mt32emu_set_output_gain(mt32emu_const_context context, float gain) { +void MT32EMU_C_CALL mt32emu_set_output_gain(mt32emu_const_context context, float gain) { context->synth->setOutputGain(gain); } -float mt32emu_get_output_gain(mt32emu_const_context context) { +float MT32EMU_C_CALL mt32emu_get_output_gain(mt32emu_const_context context) { return context->synth->getOutputGain(); } -void mt32emu_set_reverb_output_gain(mt32emu_const_context context, float gain) { +void MT32EMU_C_CALL mt32emu_set_reverb_output_gain(mt32emu_const_context context, float gain) { context->synth->setReverbOutputGain(gain); } -float mt32emu_get_reverb_output_gain(mt32emu_const_context context) { +float MT32EMU_C_CALL mt32emu_get_reverb_output_gain(mt32emu_const_context context) { return context->synth->getReverbOutputGain(); } -void mt32emu_set_reversed_stereo_enabled(mt32emu_const_context context, const mt32emu_boolean enabled) { +void MT32EMU_C_CALL mt32emu_set_part_volume_override(mt32emu_const_context context, mt32emu_bit8u part_number, mt32emu_bit8u volume_override) { + context->synth->setPartVolumeOverride(part_number, volume_override); +} + +mt32emu_bit8u MT32EMU_C_CALL mt32emu_get_part_volume_override(mt32emu_const_context context, mt32emu_bit8u part_number) { + return context->synth->getPartVolumeOverride(part_number); +} + +void MT32EMU_C_CALL mt32emu_set_reversed_stereo_enabled(mt32emu_const_context context, const mt32emu_boolean enabled) { context->synth->setReversedStereoEnabled(enabled != MT32EMU_BOOL_FALSE); } -mt32emu_boolean mt32emu_is_reversed_stereo_enabled(mt32emu_const_context context) { +mt32emu_boolean MT32EMU_C_CALL mt32emu_is_reversed_stereo_enabled(mt32emu_const_context context) { return context->synth->isReversedStereoEnabled() ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; } -void mt32emu_set_nice_amp_ramp_enabled(mt32emu_const_context context, const mt32emu_boolean enabled) { +void MT32EMU_C_CALL mt32emu_set_nice_amp_ramp_enabled(mt32emu_const_context context, const mt32emu_boolean enabled) { context->synth->setNiceAmpRampEnabled(enabled != MT32EMU_BOOL_FALSE); } -mt32emu_boolean mt32emu_is_nice_amp_ramp_enabled(mt32emu_const_context context) { +mt32emu_boolean MT32EMU_C_CALL mt32emu_is_nice_amp_ramp_enabled(mt32emu_const_context context) { return context->synth->isNiceAmpRampEnabled() ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; } -MT32EMU_EXPORT void mt32emu_set_nice_panning_enabled(mt32emu_const_context context, const mt32emu_boolean enabled) { +void MT32EMU_C_CALL mt32emu_set_nice_panning_enabled(mt32emu_const_context context, const mt32emu_boolean enabled) { context->synth->setNicePanningEnabled(enabled != MT32EMU_BOOL_FALSE); } -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_nice_panning_enabled(mt32emu_const_context context) { +mt32emu_boolean MT32EMU_C_CALL mt32emu_is_nice_panning_enabled(mt32emu_const_context context) { return context->synth->isNicePanningEnabled() ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; } -MT32EMU_EXPORT void mt32emu_set_nice_partial_mixing_enabled(mt32emu_const_context context, const mt32emu_boolean enabled) { +void MT32EMU_C_CALL mt32emu_set_nice_partial_mixing_enabled(mt32emu_const_context context, const mt32emu_boolean enabled) { context->synth->setNicePartialMixingEnabled(enabled != MT32EMU_BOOL_FALSE); } -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_nice_partial_mixing_enabled(mt32emu_const_context context) { +mt32emu_boolean MT32EMU_C_CALL mt32emu_is_nice_partial_mixing_enabled(mt32emu_const_context context) { return context->synth->isNicePartialMixingEnabled() ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; } -void mt32emu_render_bit16s(mt32emu_const_context context, mt32emu_bit16s *stream, mt32emu_bit32u len) { +void MT32EMU_C_CALL mt32emu_render_bit16s(mt32emu_const_context context, mt32emu_bit16s *stream, mt32emu_bit32u len) { if (context->srcState->src != NULL) { context->srcState->src->getOutputSamples(stream, len); } else { @@ -696,7 +903,7 @@ void mt32emu_render_bit16s(mt32emu_const_context context, mt32emu_bit16s *stream } } -void mt32emu_render_float(mt32emu_const_context context, float *stream, mt32emu_bit32u len) { +void MT32EMU_C_CALL mt32emu_render_float(mt32emu_const_context context, float *stream, mt32emu_bit32u len) { if (context->srcState->src != NULL) { context->srcState->src->getOutputSamples(stream, len); } else { @@ -704,44 +911,72 @@ void mt32emu_render_float(mt32emu_const_context context, float *stream, mt32emu_ } } -void mt32emu_render_bit16s_streams(mt32emu_const_context context, const mt32emu_dac_output_bit16s_streams *streams, mt32emu_bit32u len) { +void MT32EMU_C_CALL mt32emu_render_bit16s_streams(mt32emu_const_context context, const mt32emu_dac_output_bit16s_streams *streams, mt32emu_bit32u len) { context->synth->renderStreams(*reinterpret_cast *>(streams), len); } -void mt32emu_render_float_streams(mt32emu_const_context context, const mt32emu_dac_output_float_streams *streams, mt32emu_bit32u len) { +void MT32EMU_C_CALL mt32emu_render_float_streams(mt32emu_const_context context, const mt32emu_dac_output_float_streams *streams, mt32emu_bit32u len) { context->synth->renderStreams(*reinterpret_cast *>(streams), len); } -mt32emu_boolean mt32emu_has_active_partials(mt32emu_const_context context) { +mt32emu_boolean MT32EMU_C_CALL mt32emu_has_active_partials(mt32emu_const_context context) { return context->synth->hasActivePartials() ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; } -mt32emu_boolean mt32emu_is_active(mt32emu_const_context context) { +mt32emu_boolean MT32EMU_C_CALL mt32emu_is_active(mt32emu_const_context context) { return context->synth->isActive() ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; } -mt32emu_bit32u mt32emu_get_partial_count(mt32emu_const_context context) { +mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_partial_count(mt32emu_const_context context) { return context->synth->getPartialCount(); } -mt32emu_bit32u mt32emu_get_part_states(mt32emu_const_context context) { +mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_part_states(mt32emu_const_context context) { return context->synth->getPartStates(); } -void mt32emu_get_partial_states(mt32emu_const_context context, mt32emu_bit8u *partial_states) { +void MT32EMU_C_CALL mt32emu_get_partial_states(mt32emu_const_context context, mt32emu_bit8u *partial_states) { context->synth->getPartialStates(partial_states); } -mt32emu_bit32u mt32emu_get_playing_notes(mt32emu_const_context context, mt32emu_bit8u part_number, mt32emu_bit8u *keys, mt32emu_bit8u *velocities) { +mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_playing_notes(mt32emu_const_context context, mt32emu_bit8u part_number, mt32emu_bit8u *keys, mt32emu_bit8u *velocities) { return context->synth->getPlayingNotes(part_number, keys, velocities); } -const char *mt32emu_get_patch_name(mt32emu_const_context context, mt32emu_bit8u part_number) { +const char * MT32EMU_C_CALL mt32emu_get_patch_name(mt32emu_const_context context, mt32emu_bit8u part_number) { return context->synth->getPatchName(part_number); } -void mt32emu_read_memory(mt32emu_const_context context, mt32emu_bit32u addr, mt32emu_bit32u len, mt32emu_bit8u *data) { +mt32emu_boolean MT32EMU_C_CALL mt32emu_get_sound_group_name(mt32emu_const_context context, char *sound_group_name, mt32emu_bit8u timbre_group, mt32emu_bit8u timbre_number) { + return context->synth->getSoundGroupName(sound_group_name, timbre_group, timbre_number) ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; +} + +mt32emu_boolean MT32EMU_C_CALL mt32emu_get_sound_name(mt32emu_const_context context, char *sound_name, mt32emu_bit8u timbre_group, mt32emu_bit8u timbre_number) { + return context->synth->getSoundName(sound_name, timbre_group, timbre_number) ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; +} + +void MT32EMU_C_CALL mt32emu_read_memory(mt32emu_const_context context, mt32emu_bit32u addr, mt32emu_bit32u len, mt32emu_bit8u *data) { context->synth->readMemory(addr, len, data); } +mt32emu_boolean MT32EMU_C_CALL mt32emu_get_display_state(mt32emu_const_context context, char *target_buffer, const mt32emu_boolean narrow_lcd) { + return context->synth->getDisplayState(target_buffer, narrow_lcd != MT32EMU_BOOL_FALSE) ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; +} + +void MT32EMU_C_CALL mt32emu_set_main_display_mode(mt32emu_const_context context) { + context->synth->setMainDisplayMode(); +} + +void MT32EMU_C_CALL mt32emu_set_display_compatibility(mt32emu_const_context context, mt32emu_boolean old_mt32_compatibility_enabled) { + context->synth->setDisplayCompatibility(old_mt32_compatibility_enabled != MT32EMU_BOOL_FALSE); +} + +mt32emu_boolean MT32EMU_C_CALL mt32emu_is_display_old_mt32_compatible(mt32emu_const_context context) { + return context->synth->isDisplayOldMT32Compatible() ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; +} + +mt32emu_boolean MT32EMU_C_CALL mt32emu_is_default_display_old_mt32_compatible(mt32emu_const_context context) { + return context->synth->isDefaultDisplayOldMT32Compatible() ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; +} + } // extern "C" diff --git a/src/sound/munt/c_interface/c_interface.h b/src/sound/munt/c_interface/c_interface.h index 0924dcce5..5653c9051 100644 --- a/src/sound/munt/c_interface/c_interface.h +++ b/src/sound/munt/c_interface/c_interface.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -24,7 +24,9 @@ #include "c_types.h" #undef MT32EMU_EXPORT +#undef MT32EMU_EXPORT_V #define MT32EMU_EXPORT MT32EMU_EXPORT_ATTRIBUTE +#define MT32EMU_EXPORT_V(symbol_version_tag) MT32EMU_EXPORT #ifdef __cplusplus extern "C" { @@ -35,24 +37,28 @@ extern "C" { /* === Interface handling === */ /** Returns mt32emu_service_i interface. */ -MT32EMU_EXPORT mt32emu_service_i mt32emu_get_service_i(void); +MT32EMU_EXPORT mt32emu_service_i MT32EMU_C_CALL mt32emu_get_service_i(void); #if MT32EMU_EXPORTS_TYPE == 2 #undef MT32EMU_EXPORT +#undef MT32EMU_EXPORT_V #define MT32EMU_EXPORT +#define MT32EMU_EXPORT_V(symbol_version_tag) MT32EMU_EXPORT #endif /** * Returns the version ID of mt32emu_report_handler_i interface the library has been compiled with. * This allows a client to fall-back gracefully instead of silently not receiving expected event reports. */ -MT32EMU_EXPORT mt32emu_report_handler_version mt32emu_get_supported_report_handler_version(void); +MT32EMU_EXPORT mt32emu_report_handler_version MT32EMU_C_CALL mt32emu_get_supported_report_handler_version(void); /** * Returns the version ID of mt32emu_midi_receiver_version_i interface the library has been compiled with. * This allows a client to fall-back gracefully instead of silently not receiving expected MIDI messages. */ -MT32EMU_EXPORT mt32emu_midi_receiver_version mt32emu_get_supported_midi_receiver_version(void); +MT32EMU_EXPORT mt32emu_midi_receiver_version MT32EMU_C_CALL mt32emu_get_supported_midi_receiver_version(void); + +/* === Utility === */ /** * Returns library version as an integer in format: 0x00MMmmpp, where: @@ -60,67 +66,149 @@ MT32EMU_EXPORT mt32emu_midi_receiver_version mt32emu_get_supported_midi_receiver * mm - minor version number * pp - patch number */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_library_version_int(void); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_library_version_int(void); /** * Returns library version as a C-string in format: "MAJOR.MINOR.PATCH". */ -MT32EMU_EXPORT const char *mt32emu_get_library_version_string(void); +MT32EMU_EXPORT const char * MT32EMU_C_CALL mt32emu_get_library_version_string(void); /** * Returns output sample rate used in emulation of stereo analog circuitry of hardware units for particular analog_output_mode. * See comment for mt32emu_analog_output_mode. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_stereo_output_samplerate(const mt32emu_analog_output_mode analog_output_mode); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_stereo_output_samplerate(const mt32emu_analog_output_mode analog_output_mode); /** * Returns the value of analog_output_mode for which the output signal may retain its full frequency spectrum * at the sample rate specified by the target_samplerate argument. * See comment for mt32emu_analog_output_mode. */ -MT32EMU_EXPORT mt32emu_analog_output_mode mt32emu_get_best_analog_output_mode(const double target_samplerate); +MT32EMU_EXPORT mt32emu_analog_output_mode MT32EMU_C_CALL mt32emu_get_best_analog_output_mode(const double target_samplerate); + +/* === ROM handling === */ + +/** + * Retrieves a list of identifiers (as C-strings) of supported machines. Argument machine_ids points to the array of size + * machine_ids_size to be filled. + * Returns the number of identifiers available for retrieval. The size of the target array to be allocated can be found + * by passing NULL in argument machine_ids; argument machine_ids_size is ignored in this case. + */ +MT32EMU_EXPORT_V(2.5) size_t MT32EMU_C_CALL mt32emu_get_machine_ids(const char **machine_ids, size_t machine_ids_size); +/** + * Retrieves a list of identifiers (as C-strings) of supported ROM images. Argument rom_ids points to the array of size + * rom_ids_size to be filled. Optional argument machine_id can be used to indicate a specific machine to retrieve ROM identifiers + * for; if NULL, identifiers of all the ROM images supported by the emulation engine are retrieved. + * Returns the number of ROM identifiers available for retrieval. The size of the target array to be allocated can be found + * by passing NULL in argument rom_ids; argument rom_ids_size is ignored in this case. If argument machine_id contains + * an unrecognised value, 0 is returned. + */ +MT32EMU_EXPORT_V(2.5) size_t MT32EMU_C_CALL mt32emu_get_rom_ids(const char **rom_ids, size_t rom_ids_size, const char *machine_id); + +/** + * Identifies a ROM image the provided data array contains by its SHA1 digest. Optional argument machine_id can be used to indicate + * a specific machine to identify the ROM image for; if NULL, the ROM image is identified for any supported machine. + * A mt32emu_rom_info structure supplied in argument rom_info is filled in accordance with the provided ROM image; unused fields + * are filled with NULLs. If the content of the ROM image is not identified successfully (e.g. when the ROM image is incompatible + * with the specified machine), all fields of rom_info are filled with NULLs. + * Returns MT32EMU_RC_OK upon success or a negative error code otherwise. + */ +MT32EMU_EXPORT_V(2.5) mt32emu_return_code MT32EMU_C_CALL mt32emu_identify_rom_data(mt32emu_rom_info *rom_info, const mt32emu_bit8u *data, size_t data_size, const char *machine_id); +/** + * Loads the content of the file specified by argument filename and identifies a ROM image the file contains by its SHA1 digest. + * Optional argument machine_id can be used to indicate a specific machine to identify the ROM image for; if NULL, the ROM image + * is identified for any supported machine. + * A mt32emu_rom_info structure supplied in argument rom_info is filled in accordance with the provided ROM image; unused fields + * are filled with NULLs. If the content of the file is not identified successfully (e.g. when the ROM image is incompatible + * with the specified machine), all fields of rom_info are filled with NULLs. + * Returns MT32EMU_RC_OK upon success or a negative error code otherwise. + */ +MT32EMU_EXPORT_V(2.5) mt32emu_return_code MT32EMU_C_CALL mt32emu_identify_rom_file(mt32emu_rom_info *rom_info, const char *filename, const char *machine_id); /* == Context-dependent functions == */ /** Initialises a new emulation context and installs custom report handler if non-NULL. */ -MT32EMU_EXPORT mt32emu_context mt32emu_create_context(mt32emu_report_handler_i report_handler, void *instance_data); +MT32EMU_EXPORT mt32emu_context MT32EMU_C_CALL mt32emu_create_context(mt32emu_report_handler_i report_handler, void *instance_data); /** Closes and destroys emulation context. */ -MT32EMU_EXPORT void mt32emu_free_context(mt32emu_context context); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_free_context(mt32emu_context context); /** - * Adds new ROM identified by its SHA1 digest to the emulation context replacing previously added ROM of the same type if any. - * Argument sha1_digest can be NULL, in this case the digest will be computed using the actual ROM data. + * Adds a new full ROM data image identified by its SHA1 digest to the emulation context replacing previously added ROM of the same + * type if any. Argument sha1_digest can be NULL, in this case the digest will be computed using the actual ROM data. * If sha1_digest is set to non-NULL, it is assumed being correct and will not be recomputed. - * This function doesn't immediately change the state of already opened synth. Newly added ROM will take effect upon next call of mt32emu_open_synth(). + * The provided data array is NOT copied and used directly for efficiency. The caller should not deallocate it while the emulation + * context is referring to the ROM data. + * This function doesn't immediately change the state of already opened synth. Newly added ROM will take effect upon next call of + * mt32emu_open_synth(). * Returns positive value upon success. */ -MT32EMU_EXPORT mt32emu_return_code mt32emu_add_rom_data(mt32emu_context context, const mt32emu_bit8u *data, size_t data_size, const mt32emu_sha1_digest *sha1_digest); +MT32EMU_EXPORT mt32emu_return_code MT32EMU_C_CALL mt32emu_add_rom_data(mt32emu_context context, const mt32emu_bit8u *data, size_t data_size, const mt32emu_sha1_digest *sha1_digest); /** - * Loads a ROM file, identify it by SHA1 digest, and adds it to the emulation context replacing previously added ROM of the same type if any. - * This function doesn't immediately change the state of already opened synth. Newly added ROM will take effect upon next call of mt32emu_open_synth(). + * Loads a ROM file that contains a full ROM data image, identifies it by the SHA1 digest, and adds it to the emulation context + * replacing previously added ROM of the same type if any. + * This function doesn't immediately change the state of already opened synth. Newly added ROM will take effect upon next call of + * mt32emu_open_synth(). * Returns positive value upon success. */ -MT32EMU_EXPORT mt32emu_return_code mt32emu_add_rom_file(mt32emu_context context, const char *filename); +MT32EMU_EXPORT mt32emu_return_code MT32EMU_C_CALL mt32emu_add_rom_file(mt32emu_context context, const char *filename); + +/** + * Merges a pair of compatible ROM data image parts into a full image and adds it to the emulation context replacing previously + * added ROM of the same type if any. Each partial image is identified by its SHA1 digest. Arguments partN_sha1_digest can be NULL, + * in this case the digest will be computed using the actual ROM data. If a non-NULL SHA1 value is provided, it is assumed being + * correct and will not be recomputed. The provided data arrays may be deallocated as soon as the function completes. + * This function doesn't immediately change the state of already opened synth. Newly added ROM will take effect upon next call of + * mt32emu_open_synth(). + * Returns positive value upon success. + */ +MT32EMU_EXPORT_V(2.5) mt32emu_return_code MT32EMU_C_CALL mt32emu_merge_and_add_rom_data(mt32emu_context context, const mt32emu_bit8u *part1_data, size_t part1_data_size, const mt32emu_sha1_digest *part1_sha1_digest, const mt32emu_bit8u *part2_data, size_t part2_data_size, const mt32emu_sha1_digest *part2_sha1_digest); + +/** + * Loads a pair of files that contains compatible parts of a full ROM image, identifies them by the SHA1 digest, merges these + * parts into a full ROM image and adds it to the emulation context replacing previously added ROM of the same type if any. + * This function doesn't immediately change the state of already opened synth. Newly added ROM will take effect upon next call of + * mt32emu_open_synth(). + * Returns positive value upon success. + */ +MT32EMU_EXPORT_V(2.5) mt32emu_return_code MT32EMU_C_CALL mt32emu_merge_and_add_rom_files(mt32emu_context context, const char *part1_filename, const char *part2_filename); + +/** + * Loads a file that contains a ROM image of a specific machine, identifies it by the SHA1 digest, and adds it to the emulation + * context. The ROM image can only be identified successfully if it is compatible with the specified machine. + * Full and partial ROM images are supported and handled according to the following rules: + * - a file with any compatible ROM image is added if none (of the same type) exists in the emulation context; + * - a file with any compatible ROM image replaces any image of the same type that is incompatible with the specified machine; + * - a file with a full ROM image replaces the previously added partial ROM of the same type; + * - a file with a partial ROM image is merged with the previously added ROM image if pairable; + * - otherwise, the file is ignored. + * The described behaviour allows the caller application to traverse a directory with ROM files attempting to add each one in turn. + * As soon as both the full control and the full PCM ROM images are added and / or merged, the iteration can be stopped. + * This function doesn't immediately change the state of already opened synth. Newly added ROMs will take effect upon next call of + * mt32emu_open_synth(). + * Returns a positive value in case changes have been made, MT32EMU_RC_OK if the file has been ignored or a negative error code + * upon failure. + */ +MT32EMU_EXPORT_V(2.5) mt32emu_return_code MT32EMU_C_CALL mt32emu_add_machine_rom_file(mt32emu_context context, const char *machine_id, const char *filename); /** * Fills in mt32emu_rom_info structure with identifiers and descriptions of control and PCM ROM files identified and added to the synth context. * If one of the ROM files is not loaded and identified yet, NULL is returned in the corresponding fields of the mt32emu_rom_info structure. */ -MT32EMU_EXPORT void mt32emu_get_rom_info(mt32emu_const_context context, mt32emu_rom_info *rom_info); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_get_rom_info(mt32emu_const_context context, mt32emu_rom_info *rom_info); /** * Allows to override the default maximum number of partials playing simultaneously within the emulation session. * This function doesn't immediately change the state of already opened synth. Newly set value will take effect upon next call of mt32emu_open_synth(). */ -MT32EMU_EXPORT void mt32emu_set_partial_count(mt32emu_context context, const mt32emu_bit32u partial_count); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_partial_count(mt32emu_context context, const mt32emu_bit32u partial_count); /** * Allows to override the default mode for emulation of analogue circuitry of the hardware units within the emulation session. * This function doesn't immediately change the state of already opened synth. Newly set value will take effect upon next call of mt32emu_open_synth(). */ -MT32EMU_EXPORT void mt32emu_set_analog_output_mode(mt32emu_context context, const mt32emu_analog_output_mode analog_output_mode); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_analog_output_mode(mt32emu_context context, const mt32emu_analog_output_mode analog_output_mode); /** * Allows to convert the synthesiser output to any desired sample rate. The samplerate conversion @@ -131,7 +219,7 @@ MT32EMU_EXPORT void mt32emu_set_analog_output_mode(mt32emu_context context, cons * This function doesn't immediately change the state of already opened synth. * Newly set value will take effect upon next call of mt32emu_open_synth(). */ -MT32EMU_EXPORT void mt32emu_set_stereo_output_samplerate(mt32emu_context context, const double samplerate); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_stereo_output_samplerate(mt32emu_context context, const double samplerate); /** * Several samplerate conversion quality options are provided which allow to trade-off the conversion speed vs. @@ -140,66 +228,66 @@ MT32EMU_EXPORT void mt32emu_set_stereo_output_samplerate(mt32emu_context context * This function doesn't immediately change the state of already opened synth. * Newly set value will take effect upon next call of mt32emu_open_synth(). */ -MT32EMU_EXPORT void mt32emu_set_samplerate_conversion_quality(mt32emu_context context, const mt32emu_samplerate_conversion_quality quality); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_samplerate_conversion_quality(mt32emu_context context, const mt32emu_samplerate_conversion_quality quality); /** * Selects new type of the wave generator and renderer to be used during subsequent calls to mt32emu_open_synth(). * By default, MT32EMU_RT_BIT16S is selected. * See mt32emu_renderer_type for details. */ -MT32EMU_EXPORT void mt32emu_select_renderer_type(mt32emu_context context, const mt32emu_renderer_type renderer_type); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_select_renderer_type(mt32emu_context context, const mt32emu_renderer_type renderer_type); /** * Returns previously selected type of the wave generator and renderer. * See mt32emu_renderer_type for details. */ -MT32EMU_EXPORT mt32emu_renderer_type mt32emu_get_selected_renderer_type(mt32emu_context context); +MT32EMU_EXPORT mt32emu_renderer_type MT32EMU_C_CALL mt32emu_get_selected_renderer_type(mt32emu_context context); /** * Prepares the emulation context to receive MIDI messages and produce output audio data using aforehand added set of ROMs, * and optionally set the maximum partial count and the analog output mode. * Returns MT32EMU_RC_OK upon success. */ -MT32EMU_EXPORT mt32emu_return_code mt32emu_open_synth(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_return_code MT32EMU_C_CALL mt32emu_open_synth(mt32emu_const_context context); /** Closes the emulation context freeing allocated resources. Added ROMs remain unaffected and ready for reuse. */ -MT32EMU_EXPORT void mt32emu_close_synth(mt32emu_const_context context); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_close_synth(mt32emu_const_context context); /** Returns true if the synth is in completely initialized state, otherwise returns false. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_open(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_open(mt32emu_const_context context); /** * Returns actual sample rate of the fully processed output stereo signal. * If samplerate conversion is used (i.e. when mt32emu_set_stereo_output_samplerate() has been invoked with a non-zero value), * the returned value is the desired output samplerate rounded down to the closest integer. - * Otherwise, the output samplerate is choosen depending on the emulation mode of stereo analog circuitry of hardware units. + * Otherwise, the output samplerate is chosen depending on the emulation mode of stereo analog circuitry of hardware units. * See comment for mt32emu_analog_output_mode for more info. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_actual_stereo_output_samplerate(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_actual_stereo_output_samplerate(mt32emu_const_context context); /** * Returns the number of samples produced at the internal synth sample rate (32000 Hz) * that correspond to the given number of samples at the output sample rate. * Intended to facilitate audio time synchronisation. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_convert_output_to_synth_timestamp(mt32emu_const_context context, mt32emu_bit32u output_timestamp); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_convert_output_to_synth_timestamp(mt32emu_const_context context, mt32emu_bit32u output_timestamp); /** * Returns the number of samples produced at the output sample rate * that correspond to the given number of samples at the internal synth sample rate (32000 Hz). * Intended to facilitate audio time synchronisation. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_convert_synth_to_output_timestamp(mt32emu_const_context context, mt32emu_bit32u synth_timestamp); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_convert_synth_to_output_timestamp(mt32emu_const_context context, mt32emu_bit32u synth_timestamp); /** All the enqueued events are processed by the synth immediately. */ -MT32EMU_EXPORT void mt32emu_flush_midi_queue(mt32emu_const_context context); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_flush_midi_queue(mt32emu_const_context context); /** * Sets size of the internal MIDI event queue. The queue size is set to the minimum power of 2 that is greater or equal to the size specified. * The queue is flushed before reallocation. * Returns the actual queue size being used. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_set_midi_event_queue_size(mt32emu_const_context context, const mt32emu_bit32u queue_size); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_set_midi_event_queue_size(mt32emu_const_context context, const mt32emu_bit32u queue_size); /** * Configures the SysEx storage of the internal MIDI event queue. @@ -212,7 +300,7 @@ MT32EMU_EXPORT mt32emu_bit32u mt32emu_set_midi_event_queue_size(mt32emu_const_co * by a SysEx event, that has been processed and thus is no longer necessary, is disposed instantly. * Note, the queue is flushed and recreated in the process so that its size remains intact. */ -void mt32emu_configure_midi_event_queue_sysex_storage(mt32emu_const_context context, const mt32emu_bit32u storage_buffer_size); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_configure_midi_event_queue_sysex_storage(mt32emu_const_context context, const mt32emu_bit32u storage_buffer_size); /** * Installs custom MIDI receiver object intended for receiving MIDI messages generated by MIDI stream parser. @@ -220,13 +308,13 @@ void mt32emu_configure_midi_event_queue_sysex_storage(mt32emu_const_context cont * By default, parsed short MIDI messages and System Exclusive messages are sent to the synth input MIDI queue. * This function allows to override default behaviour. If midi_receiver argument is set to NULL, the default behaviour is restored. */ -MT32EMU_EXPORT void mt32emu_set_midi_receiver(mt32emu_context context, mt32emu_midi_receiver_i midi_receiver, void *instance_data); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_midi_receiver(mt32emu_context context, mt32emu_midi_receiver_i midi_receiver, void *instance_data); /** * Returns current value of the global counter of samples rendered since the synth was created (at the native sample rate 32000 Hz). * This method helps to compute accurate timestamp of a MIDI message to use with the methods below. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_internal_rendered_sample_count(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_internal_rendered_sample_count(mt32emu_const_context context); /* Enqueues a MIDI event for subsequent playback. * The MIDI event will be processed not before the specified timestamp. @@ -243,7 +331,7 @@ MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_internal_rendered_sample_count(mt32emu * When a System Realtime MIDI message is parsed, onMIDISystemRealtime callback is invoked. * NOTE: the total length of a SysEx message being fragmented shall not exceed MT32EMU_MAX_STREAM_BUFFER_SIZE (32768 bytes). */ -MT32EMU_EXPORT void mt32emu_parse_stream(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_parse_stream(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length); /** * Parses a block of raw MIDI bytes and enqueues parsed MIDI messages to play at specified time. @@ -251,31 +339,31 @@ MT32EMU_EXPORT void mt32emu_parse_stream(mt32emu_const_context context, const mt * When a System Realtime MIDI message is parsed, onMIDISystemRealtime callback is invoked. * NOTE: the total length of a SysEx message being fragmented shall not exceed MT32EMU_MAX_STREAM_BUFFER_SIZE (32768 bytes). */ -MT32EMU_EXPORT void mt32emu_parse_stream_at(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length, mt32emu_bit32u timestamp); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_parse_stream_at(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length, mt32emu_bit32u timestamp); /** * Enqueues a single mt32emu_bit32u-encoded short MIDI message with full processing ASAP. * The short MIDI message may contain no status byte, the running status is used in this case. * When the argument is a System Realtime MIDI message, onMIDISystemRealtime callback is invoked. */ -MT32EMU_EXPORT void mt32emu_play_short_message(mt32emu_const_context context, mt32emu_bit32u message); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_play_short_message(mt32emu_const_context context, mt32emu_bit32u message); /** * Enqueues a single mt32emu_bit32u-encoded short MIDI message to play at specified time with full processing. * The short MIDI message may contain no status byte, the running status is used in this case. * When the argument is a System Realtime MIDI message, onMIDISystemRealtime callback is invoked. */ -MT32EMU_EXPORT void mt32emu_play_short_message_at(mt32emu_const_context context, mt32emu_bit32u message, mt32emu_bit32u timestamp); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_play_short_message_at(mt32emu_const_context context, mt32emu_bit32u message, mt32emu_bit32u timestamp); /** Enqueues a single short MIDI message to be processed ASAP. The message must contain a status byte. */ -MT32EMU_EXPORT mt32emu_return_code mt32emu_play_msg(mt32emu_const_context context, mt32emu_bit32u msg); +MT32EMU_EXPORT mt32emu_return_code MT32EMU_C_CALL mt32emu_play_msg(mt32emu_const_context context, mt32emu_bit32u msg); /** Enqueues a single well formed System Exclusive MIDI message to be processed ASAP. */ -MT32EMU_EXPORT mt32emu_return_code mt32emu_play_sysex(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); +MT32EMU_EXPORT mt32emu_return_code MT32EMU_C_CALL mt32emu_play_sysex(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); /** Enqueues a single short MIDI message to play at specified time. The message must contain a status byte. */ -MT32EMU_EXPORT mt32emu_return_code mt32emu_play_msg_at(mt32emu_const_context context, mt32emu_bit32u msg, mt32emu_bit32u timestamp); +MT32EMU_EXPORT mt32emu_return_code MT32EMU_C_CALL mt32emu_play_msg_at(mt32emu_const_context context, mt32emu_bit32u msg, mt32emu_bit32u timestamp); /** Enqueues a single well formed System Exclusive MIDI message to play at specified time. */ -MT32EMU_EXPORT mt32emu_return_code mt32emu_play_sysex_at(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len, mt32emu_bit32u timestamp); +MT32EMU_EXPORT mt32emu_return_code MT32EMU_C_CALL mt32emu_play_sysex_at(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len, mt32emu_bit32u timestamp); /* WARNING: * The methods below don't ensure minimum 1-sample delay between sequential MIDI events, @@ -287,73 +375,73 @@ MT32EMU_EXPORT mt32emu_return_code mt32emu_play_sysex_at(mt32emu_const_context c * Sends a short MIDI message to the synth for immediate playback. The message must contain a status byte. * See the WARNING above. */ -MT32EMU_EXPORT void mt32emu_play_msg_now(mt32emu_const_context context, mt32emu_bit32u msg); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_play_msg_now(mt32emu_const_context context, mt32emu_bit32u msg); /** * Sends unpacked short MIDI message to the synth for immediate playback. The message must contain a status byte. * See the WARNING above. */ -MT32EMU_EXPORT void mt32emu_play_msg_on_part(mt32emu_const_context context, mt32emu_bit8u part, mt32emu_bit8u code, mt32emu_bit8u note, mt32emu_bit8u velocity); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_play_msg_on_part(mt32emu_const_context context, mt32emu_bit8u part, mt32emu_bit8u code, mt32emu_bit8u note, mt32emu_bit8u velocity); /** * Sends a single well formed System Exclusive MIDI message for immediate processing. The length is in bytes. * See the WARNING above. */ -MT32EMU_EXPORT void mt32emu_play_sysex_now(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_play_sysex_now(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); /** * Sends inner body of a System Exclusive MIDI message for direct processing. The length is in bytes. * See the WARNING above. */ -MT32EMU_EXPORT void mt32emu_write_sysex(mt32emu_const_context context, mt32emu_bit8u channel, const mt32emu_bit8u *sysex, mt32emu_bit32u len); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_write_sysex(mt32emu_const_context context, mt32emu_bit8u channel, const mt32emu_bit8u *sysex, mt32emu_bit32u len); /** Allows to disable wet reverb output altogether. */ -MT32EMU_EXPORT void mt32emu_set_reverb_enabled(mt32emu_const_context context, const mt32emu_boolean reverb_enabled); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_reverb_enabled(mt32emu_const_context context, const mt32emu_boolean reverb_enabled); /** Returns whether wet reverb output is enabled. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_reverb_enabled(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_reverb_enabled(mt32emu_const_context context); /** * Sets override reverb mode. In this mode, emulation ignores sysexes (or the related part of them) which control the reverb parameters. * This mode is in effect until it is turned off. When the synth is re-opened, the override mode is unchanged but the state * of the reverb model is reset to default. */ -MT32EMU_EXPORT void mt32emu_set_reverb_overridden(mt32emu_const_context context, const mt32emu_boolean reverb_overridden); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_reverb_overridden(mt32emu_const_context context, const mt32emu_boolean reverb_overridden); /** Returns whether reverb settings are overridden. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_reverb_overridden(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_reverb_overridden(mt32emu_const_context context); /** * Forces reverb model compatibility mode. By default, the compatibility mode corresponds to the used control ROM version. * Invoking this method with the argument set to true forces emulation of old MT-32 reverb circuit. * When the argument is false, emulation of the reverb circuit used in new generation of MT-32 compatible modules is enforced * (these include CM-32L and LAPC-I). */ -MT32EMU_EXPORT void mt32emu_set_reverb_compatibility_mode(mt32emu_const_context context, const mt32emu_boolean mt32_compatible_mode); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_reverb_compatibility_mode(mt32emu_const_context context, const mt32emu_boolean mt32_compatible_mode); /** Returns whether reverb is in old MT-32 compatibility mode. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_mt32_reverb_compatibility_mode(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_mt32_reverb_compatibility_mode(mt32emu_const_context context); /** Returns whether default reverb compatibility mode is the old MT-32 compatibility mode. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_default_reverb_mt32_compatible(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_default_reverb_mt32_compatible(mt32emu_const_context context); /** - * If enabled, reverb buffers for all modes are keept around allocated all the time to avoid memory + * If enabled, reverb buffers for all modes are kept around allocated all the time to avoid memory * allocating/freeing in the rendering thread, which may be required for realtime operation. * Otherwise, reverb buffers that are not in use are deleted to save memory (the default behaviour). */ -MT32EMU_EXPORT void mt32emu_preallocate_reverb_memory(mt32emu_const_context context, const mt32emu_boolean enabled); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_preallocate_reverb_memory(mt32emu_const_context context, const mt32emu_boolean enabled); /** Sets new DAC input mode. See mt32emu_dac_input_mode for details. */ -MT32EMU_EXPORT void mt32emu_set_dac_input_mode(mt32emu_const_context context, const mt32emu_dac_input_mode mode); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_dac_input_mode(mt32emu_const_context context, const mt32emu_dac_input_mode mode); /** Returns current DAC input mode. See mt32emu_dac_input_mode for details. */ -MT32EMU_EXPORT mt32emu_dac_input_mode mt32emu_get_dac_input_mode(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_dac_input_mode MT32EMU_C_CALL mt32emu_get_dac_input_mode(mt32emu_const_context context); /** Sets new MIDI delay mode. See mt32emu_midi_delay_mode for details. */ -MT32EMU_EXPORT void mt32emu_set_midi_delay_mode(mt32emu_const_context context, const mt32emu_midi_delay_mode mode); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_midi_delay_mode(mt32emu_const_context context, const mt32emu_midi_delay_mode mode); /** Returns current MIDI delay mode. See mt32emu_midi_delay_mode for details. */ -MT32EMU_EXPORT mt32emu_midi_delay_mode mt32emu_get_midi_delay_mode(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_midi_delay_mode MT32EMU_C_CALL mt32emu_get_midi_delay_mode(mt32emu_const_context context); /** * Sets output gain factor for synth output channels. Applied to all output samples and unrelated with the synth's Master volume, * it rather corresponds to the gain of the output analog circuitry of the hardware units. However, together with mt32emu_set_reverb_output_gain() * it offers to the user a capability to control the gain of reverb and non-reverb output channels independently. */ -MT32EMU_EXPORT void mt32emu_set_output_gain(mt32emu_const_context context, float gain); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_output_gain(mt32emu_const_context context, float gain); /** Returns current output gain factor for synth output channels. */ -MT32EMU_EXPORT float mt32emu_get_output_gain(mt32emu_const_context context); +MT32EMU_EXPORT float MT32EMU_C_CALL mt32emu_get_output_gain(mt32emu_const_context context); /** * Sets output gain factor for the reverb wet output channels. It rather corresponds to the gain of the output @@ -365,14 +453,34 @@ MT32EMU_EXPORT float mt32emu_get_output_gain(mt32emu_const_context context); * there is a difference in the reverb analogue circuit, and the resulting output gain is 0.68 * of that for LA32 analogue output. This factor is applied to the reverb output gain. */ -MT32EMU_EXPORT void mt32emu_set_reverb_output_gain(mt32emu_const_context context, float gain); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_reverb_output_gain(mt32emu_const_context context, float gain); /** Returns current output gain factor for reverb wet output channels. */ -MT32EMU_EXPORT float mt32emu_get_reverb_output_gain(mt32emu_const_context context); +MT32EMU_EXPORT float MT32EMU_C_CALL mt32emu_get_reverb_output_gain(mt32emu_const_context context); + +/** + * Sets (or removes) an override for the current volume (output level) on a specific part. + * When the part volume is overridden, the MIDI controller Volume (7) on the MIDI channel this part is assigned to + * has no effect on the output level of this part. Similarly, the output level value set on this part via a SysEx that + * modifies the Patch temp structure is disregarded. + * To enable the override mode, argument volumeOverride should be in range 0..100, setting a value outside this range + * disables the previously set override, if any. + * Note: Setting volumeOverride to 0 mutes the part completely, meaning no sound is generated at all. + * This is unlike the behaviour of real devices - setting 0 volume on a part may leave it still producing + * sound at a very low level. + * Argument partNumber should be 0..7 for Part 1..8, or 8 for Rhythm. + */ +MT32EMU_EXPORT_V(2.6) void MT32EMU_C_CALL mt32emu_set_part_volume_override(mt32emu_const_context context, mt32emu_bit8u part_number, mt32emu_bit8u volume_override); +/** + * Returns the overridden volume previously set on a specific part; a value outside the range 0..100 means no override + * is currently in effect. + * Argument partNumber should be 0..7 for Part 1..8, or 8 for Rhythm. + */ +MT32EMU_EXPORT_V(2.6) mt32emu_bit8u MT32EMU_C_CALL mt32emu_get_part_volume_override(mt32emu_const_context context, mt32emu_bit8u part_number); /** Swaps left and right output channels. */ -MT32EMU_EXPORT void mt32emu_set_reversed_stereo_enabled(mt32emu_const_context context, const mt32emu_boolean enabled); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_reversed_stereo_enabled(mt32emu_const_context context, const mt32emu_boolean enabled); /** Returns whether left and right output channels are swapped. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_reversed_stereo_enabled(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_reversed_stereo_enabled(mt32emu_const_context context); /** * Allows to toggle the NiceAmpRamp mode. @@ -382,9 +490,9 @@ MT32EMU_EXPORT mt32emu_boolean mt32emu_is_reversed_stereo_enabled(mt32emu_const_ * We also prefer the quality improvement over the emulation accuracy, * so this mode is enabled by default. */ -MT32EMU_EXPORT void mt32emu_set_nice_amp_ramp_enabled(mt32emu_const_context context, const mt32emu_boolean enabled); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_nice_amp_ramp_enabled(mt32emu_const_context context, const mt32emu_boolean enabled); /** Returns whether NiceAmpRamp mode is enabled. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_nice_amp_ramp_enabled(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_nice_amp_ramp_enabled(mt32emu_const_context context); /** * Allows to toggle the NicePanning mode. @@ -395,9 +503,9 @@ MT32EMU_EXPORT mt32emu_boolean mt32emu_is_nice_amp_ramp_enabled(mt32emu_const_co * making it smoother thus sacrificing the emulation accuracy. * This mode is disabled by default. */ -MT32EMU_EXPORT void mt32emu_set_nice_panning_enabled(mt32emu_const_context context, const mt32emu_boolean enabled); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_nice_panning_enabled(mt32emu_const_context context, const mt32emu_boolean enabled); /** Returns whether NicePanning mode is enabled. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_nice_panning_enabled(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_nice_panning_enabled(mt32emu_const_context context); /** * Allows to toggle the NicePartialMixing mode. @@ -409,9 +517,9 @@ MT32EMU_EXPORT mt32emu_boolean mt32emu_is_nice_panning_enabled(mt32emu_const_con * thus making the behaviour more predictable. * This mode is disabled by default. */ -MT32EMU_EXPORT void mt32emu_set_nice_partial_mixing_enabled(mt32emu_const_context context, const mt32emu_boolean enabled); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_set_nice_partial_mixing_enabled(mt32emu_const_context context, const mt32emu_boolean enabled); /** Returns whether NicePartialMixing mode is enabled. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_nice_partial_mixing_enabled(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_nice_partial_mixing_enabled(mt32emu_const_context context); /** * Renders samples to the specified output stream as if they were sampled at the analog stereo output at the desired sample rate. @@ -419,9 +527,9 @@ MT32EMU_EXPORT mt32emu_boolean mt32emu_is_nice_partial_mixing_enabled(mt32emu_co * mode of analog circuitry emulation. See mt32emu_analog_output_mode. * The length is in frames, not bytes (in 16-bit stereo, one frame is 4 bytes). Uses NATIVE byte ordering. */ -MT32EMU_EXPORT void mt32emu_render_bit16s(mt32emu_const_context context, mt32emu_bit16s *stream, mt32emu_bit32u len); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_render_bit16s(mt32emu_const_context context, mt32emu_bit16s *stream, mt32emu_bit32u len); /** Same as above but outputs to a float stereo stream. */ -MT32EMU_EXPORT void mt32emu_render_float(mt32emu_const_context context, float *stream, mt32emu_bit32u len); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_render_float(mt32emu_const_context context, float *stream, mt32emu_bit32u len); /** * Renders samples to the specified output streams as if they appeared at the DAC entrance. @@ -429,25 +537,25 @@ MT32EMU_EXPORT void mt32emu_render_float(mt32emu_const_context context, float *s * NULL may be specified in place of any or all of the stream buffers to skip it. * The length is in samples, not bytes. Uses NATIVE byte ordering. */ -MT32EMU_EXPORT void mt32emu_render_bit16s_streams(mt32emu_const_context context, const mt32emu_dac_output_bit16s_streams *streams, mt32emu_bit32u len); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_render_bit16s_streams(mt32emu_const_context context, const mt32emu_dac_output_bit16s_streams *streams, mt32emu_bit32u len); /** Same as above but outputs to float streams. */ -MT32EMU_EXPORT void mt32emu_render_float_streams(mt32emu_const_context context, const mt32emu_dac_output_float_streams *streams, mt32emu_bit32u len); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_render_float_streams(mt32emu_const_context context, const mt32emu_dac_output_float_streams *streams, mt32emu_bit32u len); /** Returns true when there is at least one active partial, otherwise false. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_has_active_partials(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_has_active_partials(mt32emu_const_context context); /** Returns true if mt32emu_has_active_partials() returns true, or reverb is (somewhat unreliably) detected as being active. */ -MT32EMU_EXPORT mt32emu_boolean mt32emu_is_active(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_boolean MT32EMU_C_CALL mt32emu_is_active(mt32emu_const_context context); /** Returns the maximum number of partials playing simultaneously. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_partial_count(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_partial_count(mt32emu_const_context context); /** * Returns current states of all the parts as a bit set. The least significant bit corresponds to the state of part 1, * total of 9 bits hold the states of all the parts. If the returned bit for a part is set, there is at least one active * non-releasing partial playing on this part. This info is useful in emulating behaviour of LCD display of the hardware units. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_part_states(mt32emu_const_context context); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_part_states(mt32emu_const_context context); /** * Fills in current states of all the partials into the array provided. Each byte in the array holds states of 4 partials @@ -455,7 +563,7 @@ MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_part_states(mt32emu_const_context cont * The array must be large enough to accommodate states of all the partials. * @see getPartialCount() */ -MT32EMU_EXPORT void mt32emu_get_partial_states(mt32emu_const_context context, mt32emu_bit8u *partial_states); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_get_partial_states(mt32emu_const_context context, mt32emu_bit8u *partial_states); /** * Fills in information about currently playing notes on the specified part into the arrays provided. The arrays must be large enough @@ -463,16 +571,71 @@ MT32EMU_EXPORT void mt32emu_get_partial_states(mt32emu_const_context context, mt * Argument partNumber should be 0..7 for Part 1..8, or 8 for Rhythm. * Returns the number of currently playing notes on the specified part. */ -MT32EMU_EXPORT mt32emu_bit32u mt32emu_get_playing_notes(mt32emu_const_context context, mt32emu_bit8u part_number, mt32emu_bit8u *keys, mt32emu_bit8u *velocities); +MT32EMU_EXPORT mt32emu_bit32u MT32EMU_C_CALL mt32emu_get_playing_notes(mt32emu_const_context context, mt32emu_bit8u part_number, mt32emu_bit8u *keys, mt32emu_bit8u *velocities); /** * Returns name of the patch set on the specified part. * Argument partNumber should be 0..7 for Part 1..8, or 8 for Rhythm. + * The returned value is a null-terminated string which is guaranteed to remain valid until the next call to one of functions + * that perform sample rendering or immediate SysEx processing (e.g. mt32emu_play_sysex_now). */ -MT32EMU_EXPORT const char *mt32emu_get_patch_name(mt32emu_const_context context, mt32emu_bit8u part_number); +MT32EMU_EXPORT const char * MT32EMU_C_CALL mt32emu_get_patch_name(mt32emu_const_context context, mt32emu_bit8u part_number); + +/** + * Retrieves the name of the sound group the timbre identified by arguments timbre_group and timbre_number is associated with. + * Values 0-3 of timbre_group correspond to the timbre banks GROUP A, GROUP B, MEMORY and RHYTHM. + * For all but the RHYTHM timbre bank, allowed values of timbre_number are in range 0-63. The number of timbres + * contained in the RHYTHM bank depends on the used control ROM version. + * The argument sound_group_name must point to an array of at least 8 characters. The result is a null-terminated string. + * Returns whether the specified timbre has been found and the result written in sound_group_name. + */ +MT32EMU_EXPORT_V(2.7) mt32emu_boolean MT32EMU_C_CALL mt32emu_get_sound_group_name(mt32emu_const_context context, char *sound_group_name, mt32emu_bit8u timbre_group, mt32emu_bit8u timbre_number); +/** + * Retrieves the name of the timbre identified by arguments timbre_group and timbre_number. + * Values 0-3 of timbre_group correspond to the timbre banks GROUP A, GROUP B, MEMORY and RHYTHM. + * For all but the RHYTHM timbre bank, allowed values of timbre_number are in range 0-63. The number of timbres + * contained in the RHYTHM bank depends on the used control ROM version. + * The argument sound_name must point to an array of at least 11 characters. The result is a null-terminated string. + * Returns whether the specified timbre has been found and the result written in sound_name. + */ +MT32EMU_EXPORT_V(2.7) mt32emu_boolean MT32EMU_C_CALL mt32emu_get_sound_name(mt32emu_const_context context, char *sound_name, mt32emu_bit8u timbreGroup, mt32emu_bit8u timbreNumber); /** Stores internal state of emulated synth into an array provided (as it would be acquired from hardware). */ -MT32EMU_EXPORT void mt32emu_read_memory(mt32emu_const_context context, mt32emu_bit32u addr, mt32emu_bit32u len, mt32emu_bit8u *data); +MT32EMU_EXPORT void MT32EMU_C_CALL mt32emu_read_memory(mt32emu_const_context context, mt32emu_bit32u addr, mt32emu_bit32u len, mt32emu_bit8u *data); + +/** + * Retrieves the current state of the emulated MT-32 display facilities. + * Typically, the state is updated during the rendering. When that happens, a related callback from mt32emu_report_handler_i_v1 + * is invoked. However, there might be no need to invoke this method after each update, e.g. when the render buffer is just + * a few milliseconds long. + * The argument target_buffer must point to an array of at least 21 characters. The result is a null-terminated string. + * The argument narrow_lcd enables a condensed representation of the displayed information in some cases. This is mainly intended + * to route the result to a hardware LCD that is only 16 characters wide. Automatic scrolling of longer strings is not supported. + * Returns whether the MIDI MESSAGE LED is ON and fills the target_buffer parameter. + */ +MT32EMU_EXPORT_V(2.6) mt32emu_boolean MT32EMU_C_CALL mt32emu_get_display_state(mt32emu_const_context context, char *target_buffer, const mt32emu_boolean narrow_lcd); + +/** + * Resets the emulated LCD to the main mode (Master Volume). This has the same effect as pressing the Master Volume button + * while the display shows some other message. Useful for the new-gen devices as those require a special Display Reset SysEx + * to return to the main mode e.g. from showing a custom display message or a checksum error. + */ +MT32EMU_EXPORT_V(2.6) void MT32EMU_C_CALL mt32emu_set_main_display_mode(mt32emu_const_context context); + +/** + * Permits to select an arbitrary display emulation model that does not necessarily match the actual behaviour implemented + * in the control ROM version being used. + * Invoking this method with the argument set to true forces emulation of the old-gen MT-32 display features. + * Otherwise, emulation of the new-gen devices is enforced (these include CM-32L and LAPC-I as if these were connected to an LCD). + */ +MT32EMU_EXPORT_V(2.6) void MT32EMU_C_CALL mt32emu_set_display_compatibility(mt32emu_const_context context, mt32emu_boolean old_mt32_compatibility_enabled); +/** Returns whether the currently configured features of the emulated display are compatible with the old-gen MT-32 devices. */ +MT32EMU_EXPORT_V(2.6) mt32emu_boolean MT32EMU_C_CALL mt32emu_is_display_old_mt32_compatible(mt32emu_const_context context); +/** + * Returns whether the emulated display features configured by default depending on the actual control ROM version + * are compatible with the old-gen MT-32 devices. + */ +MT32EMU_EXPORT_V(2.6) mt32emu_boolean MT32EMU_C_CALL mt32emu_is_default_display_old_mt32_compatible(mt32emu_const_context context); #ifdef __cplusplus } // extern "C" diff --git a/src/sound/munt/c_interface/c_types.h b/src/sound/munt/c_interface/c_types.h index 74bae8df4..8928bfeae 100644 --- a/src/sound/munt/c_interface/c_types.h +++ b/src/sound/munt/c_interface/c_types.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -27,6 +27,12 @@ #include "../Enumerations.h" #undef MT32EMU_C_ENUMERATIONS +#ifdef _WIN32 +# define MT32EMU_C_CALL __cdecl +#else +# define MT32EMU_C_CALL +#endif + typedef unsigned int mt32emu_bit32u; typedef signed int mt32emu_bit32s; typedef unsigned short int mt32emu_bit16u; @@ -45,6 +51,8 @@ typedef enum { MT32EMU_RC_OK = 0, MT32EMU_RC_ADDED_CONTROL_ROM = 1, MT32EMU_RC_ADDED_PCM_ROM = 2, + MT32EMU_RC_ADDED_PARTIAL_CONTROL_ROM = 3, + MT32EMU_RC_ADDED_PARTIAL_PCM_ROM = 4, /* Definite error occurred. */ MT32EMU_RC_ROM_NOT_IDENTIFIED = -1, @@ -53,6 +61,8 @@ typedef enum { MT32EMU_RC_MISSING_ROMS = -4, MT32EMU_RC_NOT_OPENED = -5, MT32EMU_RC_QUEUE_FULL = -6, + MT32EMU_RC_ROMS_NOT_PAIRABLE = -7, + MT32EMU_RC_MACHINE_NOT_IDENTIFIED = -8, /* Undefined error occurred. */ MT32EMU_RC_FAILED = -100 @@ -107,7 +117,8 @@ typedef struct { /** Report handler interface versions */ typedef enum { MT32EMU_REPORT_HANDLER_VERSION_0 = 0, - MT32EMU_REPORT_HANDLER_VERSION_CURRENT = MT32EMU_REPORT_HANDLER_VERSION_0 + MT32EMU_REPORT_HANDLER_VERSION_1 = 1, + MT32EMU_REPORT_HANDLER_VERSION_CURRENT = MT32EMU_REPORT_HANDLER_VERSION_1 } mt32emu_report_handler_version; /** MIDI receiver interface versions */ @@ -122,7 +133,10 @@ typedef enum { MT32EMU_SERVICE_VERSION_1 = 1, MT32EMU_SERVICE_VERSION_2 = 2, MT32EMU_SERVICE_VERSION_3 = 3, - MT32EMU_SERVICE_VERSION_CURRENT = MT32EMU_SERVICE_VERSION_3 + MT32EMU_SERVICE_VERSION_4 = 4, + MT32EMU_SERVICE_VERSION_5 = 5, + MT32EMU_SERVICE_VERSION_6 = 6, + MT32EMU_SERVICE_VERSION_CURRENT = MT32EMU_SERVICE_VERSION_6 } mt32emu_service_version; /* === Report Handler Interface === */ @@ -130,42 +144,59 @@ typedef enum { typedef union mt32emu_report_handler_i mt32emu_report_handler_i; /** Interface for handling reported events (initial version) */ -typedef struct { - /** Returns the actual interface version ID */ - mt32emu_report_handler_version (*getVersionID)(mt32emu_report_handler_i i); - - /** Callback for debug messages, in vprintf() format */ - void (*printDebug)(void *instance_data, const char *fmt, va_list list); - /** Callbacks for reporting errors */ - void (*onErrorControlROM)(void *instance_data); - void (*onErrorPCMROM)(void *instance_data); - /** Callback for reporting about displaying a new custom message on LCD */ - void (*showLCDMessage)(void *instance_data, const char *message); - /** Callback for reporting actual processing of a MIDI message */ - void (*onMIDIMessagePlayed)(void *instance_data); +#define MT32EMU_REPORT_HANDLER_I_V0 \ + /** Returns the actual interface version ID */ \ + mt32emu_report_handler_version (MT32EMU_C_CALL *getVersionID)(mt32emu_report_handler_i i); \ +\ + /** Callback for debug messages, in vprintf() format */ \ + void (MT32EMU_C_CALL *printDebug)(void *instance_data, const char *fmt, va_list list); \ + /** Callbacks for reporting errors */ \ + void (MT32EMU_C_CALL *onErrorControlROM)(void *instance_data); \ + void (MT32EMU_C_CALL *onErrorPCMROM)(void *instance_data); \ + /** Callback for reporting about displaying a new custom message on LCD */ \ + void (MT32EMU_C_CALL *showLCDMessage)(void *instance_data, const char *message); \ + /** Callback for reporting actual processing of a MIDI message */ \ + void (MT32EMU_C_CALL *onMIDIMessagePlayed)(void *instance_data); \ /** * Callback for reporting an overflow of the input MIDI queue. * Returns MT32EMU_BOOL_TRUE if a recovery action was taken * and yet another attempt to enqueue the MIDI event is desired. - */ - mt32emu_boolean (*onMIDIQueueOverflow)(void *instance_data); + */ \ + mt32emu_boolean (MT32EMU_C_CALL *onMIDIQueueOverflow)(void *instance_data); \ /** * Callback invoked when a System Realtime MIDI message is detected in functions * mt32emu_parse_stream and mt32emu_play_short_message and the likes. - */ - void (*onMIDISystemRealtime)(void *instance_data, mt32emu_bit8u system_realtime); - /** Callbacks for reporting system events */ - void (*onDeviceReset)(void *instance_data); - void (*onDeviceReconfig)(void *instance_data); - /** Callbacks for reporting changes of reverb settings */ - void (*onNewReverbMode)(void *instance_data, mt32emu_bit8u mode); - void (*onNewReverbTime)(void *instance_data, mt32emu_bit8u time); - void (*onNewReverbLevel)(void *instance_data, mt32emu_bit8u level); - /** Callbacks for reporting various information */ - void (*onPolyStateChanged)(void *instance_data, mt32emu_bit8u part_num); - void (*onProgramChanged)(void *instance_data, mt32emu_bit8u part_num, const char *sound_group_name, const char *patch_name); + */ \ + void (MT32EMU_C_CALL *onMIDISystemRealtime)(void *instance_data, mt32emu_bit8u system_realtime); \ + /** Callbacks for reporting system events */ \ + void (MT32EMU_C_CALL *onDeviceReset)(void *instance_data); \ + void (MT32EMU_C_CALL *onDeviceReconfig)(void *instance_data); \ + /** Callbacks for reporting changes of reverb settings */ \ + void (MT32EMU_C_CALL *onNewReverbMode)(void *instance_data, mt32emu_bit8u mode); \ + void (MT32EMU_C_CALL *onNewReverbTime)(void *instance_data, mt32emu_bit8u time); \ + void (MT32EMU_C_CALL *onNewReverbLevel)(void *instance_data, mt32emu_bit8u level); \ + /** Callbacks for reporting various information */ \ + void (MT32EMU_C_CALL *onPolyStateChanged)(void *instance_data, mt32emu_bit8u part_num); \ + void (MT32EMU_C_CALL *onProgramChanged)(void *instance_data, mt32emu_bit8u part_num, const char *sound_group_name, const char *patch_name); + +#define MT32EMU_REPORT_HANDLER_I_V1 \ + /** + * Invoked to signal about a change of the emulated LCD state. Use mt32emu_get_display_state to retrieve the actual data. + * This callback will not be invoked on further changes, until the client retrieves the LCD state. + */ \ + void (MT32EMU_C_CALL *onLCDStateUpdated)(void *instance_data); \ + /** Invoked when the emulated MIDI MESSAGE LED changes state. The led_state parameter represents whether the LED is ON. */ \ + void (MT32EMU_C_CALL *onMidiMessageLEDStateUpdated)(void *instance_data, mt32emu_boolean led_state); + +typedef struct { + MT32EMU_REPORT_HANDLER_I_V0 } mt32emu_report_handler_i_v0; +typedef struct { + MT32EMU_REPORT_HANDLER_I_V0 + MT32EMU_REPORT_HANDLER_I_V1 +} mt32emu_report_handler_i_v1; + /** * Extensible interface for handling reported events. * Union intended to view an interface of any subsequent version as any parent interface not requiring a cast. @@ -173,8 +204,12 @@ typedef struct { */ union mt32emu_report_handler_i { const mt32emu_report_handler_i_v0 *v0; + const mt32emu_report_handler_i_v1 *v1; }; +#undef MT32EMU_REPORT_HANDLER_I_V0 +#undef MT32EMU_REPORT_HANDLER_I_V1 + /* === MIDI Receiver Interface === */ typedef union mt32emu_midi_receiver_i mt32emu_midi_receiver_i; @@ -182,16 +217,16 @@ typedef union mt32emu_midi_receiver_i mt32emu_midi_receiver_i; /** Interface for receiving MIDI messages generated by MIDI stream parser (initial version) */ typedef struct { /** Returns the actual interface version ID */ - mt32emu_midi_receiver_version (*getVersionID)(mt32emu_midi_receiver_i i); + mt32emu_midi_receiver_version (MT32EMU_C_CALL *getVersionID)(mt32emu_midi_receiver_i i); /** Invoked when a complete short MIDI message is parsed in the input MIDI stream. */ - void (*handleShortMessage)(void *instance_data, const mt32emu_bit32u message); + void (MT32EMU_C_CALL *handleShortMessage)(void *instance_data, const mt32emu_bit32u message); /** Invoked when a complete well-formed System Exclusive MIDI message is parsed in the input MIDI stream. */ - void (*handleSysex)(void *instance_data, const mt32emu_bit8u stream[], const mt32emu_bit32u length); + void (MT32EMU_C_CALL *handleSysex)(void *instance_data, const mt32emu_bit8u stream[], const mt32emu_bit32u length); /** Invoked when a System Realtime MIDI message is parsed in the input MIDI stream. */ - void (*handleSystemRealtimeMessage)(void *instance_data, const mt32emu_bit8u realtime); + void (MT32EMU_C_CALL *handleSystemRealtimeMessage)(void *instance_data, const mt32emu_bit8u realtime); } mt32emu_midi_receiver_i_v0; /** @@ -216,101 +251,124 @@ typedef union mt32emu_service_i mt32emu_service_i; */ #define MT32EMU_SERVICE_I_V0 \ /** Returns the actual interface version ID */ \ - mt32emu_service_version (*getVersionID)(mt32emu_service_i i); \ - mt32emu_report_handler_version (*getSupportedReportHandlerVersionID)(void); \ - mt32emu_midi_receiver_version (*getSupportedMIDIReceiverVersionID)(void); \ + mt32emu_service_version (MT32EMU_C_CALL *getVersionID)(mt32emu_service_i i); \ + mt32emu_report_handler_version (MT32EMU_C_CALL *getSupportedReportHandlerVersionID)(void); \ + mt32emu_midi_receiver_version (MT32EMU_C_CALL *getSupportedMIDIReceiverVersionID)(void); \ \ - mt32emu_bit32u (*getLibraryVersionInt)(void); \ - const char *(*getLibraryVersionString)(void); \ + mt32emu_bit32u (MT32EMU_C_CALL *getLibraryVersionInt)(void); \ + const char *(MT32EMU_C_CALL *getLibraryVersionString)(void); \ \ - mt32emu_bit32u (*getStereoOutputSamplerate)(const mt32emu_analog_output_mode analog_output_mode); \ + mt32emu_bit32u (MT32EMU_C_CALL *getStereoOutputSamplerate)(const mt32emu_analog_output_mode analog_output_mode); \ \ - mt32emu_context (*createContext)(mt32emu_report_handler_i report_handler, void *instance_data); \ - void (*freeContext)(mt32emu_context context); \ - mt32emu_return_code (*addROMData)(mt32emu_context context, const mt32emu_bit8u *data, size_t data_size, const mt32emu_sha1_digest *sha1_digest); \ - mt32emu_return_code (*addROMFile)(mt32emu_context context, const char *filename); \ - void (*getROMInfo)(mt32emu_const_context context, mt32emu_rom_info *rom_info); \ - void (*setPartialCount)(mt32emu_context context, const mt32emu_bit32u partial_count); \ - void (*setAnalogOutputMode)(mt32emu_context context, const mt32emu_analog_output_mode analog_output_mode); \ - mt32emu_return_code (*openSynth)(mt32emu_const_context context); \ - void (*closeSynth)(mt32emu_const_context context); \ - mt32emu_boolean (*isOpen)(mt32emu_const_context context); \ - mt32emu_bit32u (*getActualStereoOutputSamplerate)(mt32emu_const_context context); \ - void (*flushMIDIQueue)(mt32emu_const_context context); \ - mt32emu_bit32u (*setMIDIEventQueueSize)(mt32emu_const_context context, const mt32emu_bit32u queue_size); \ - void (*setMIDIReceiver)(mt32emu_context context, mt32emu_midi_receiver_i midi_receiver, void *instance_data); \ + mt32emu_context (MT32EMU_C_CALL *createContext)(mt32emu_report_handler_i report_handler, void *instance_data); \ + void (MT32EMU_C_CALL *freeContext)(mt32emu_context context); \ + mt32emu_return_code (MT32EMU_C_CALL *addROMData)(mt32emu_context context, const mt32emu_bit8u *data, size_t data_size, const mt32emu_sha1_digest *sha1_digest); \ + mt32emu_return_code (MT32EMU_C_CALL *addROMFile)(mt32emu_context context, const char *filename); \ + void (MT32EMU_C_CALL *getROMInfo)(mt32emu_const_context context, mt32emu_rom_info *rom_info); \ + void (MT32EMU_C_CALL *setPartialCount)(mt32emu_context context, const mt32emu_bit32u partial_count); \ + void (MT32EMU_C_CALL *setAnalogOutputMode)(mt32emu_context context, const mt32emu_analog_output_mode analog_output_mode); \ + mt32emu_return_code (MT32EMU_C_CALL *openSynth)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *closeSynth)(mt32emu_const_context context); \ + mt32emu_boolean (MT32EMU_C_CALL *isOpen)(mt32emu_const_context context); \ + mt32emu_bit32u (MT32EMU_C_CALL *getActualStereoOutputSamplerate)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *flushMIDIQueue)(mt32emu_const_context context); \ + mt32emu_bit32u (MT32EMU_C_CALL *setMIDIEventQueueSize)(mt32emu_const_context context, const mt32emu_bit32u queue_size); \ + void (MT32EMU_C_CALL *setMIDIReceiver)(mt32emu_context context, mt32emu_midi_receiver_i midi_receiver, void *instance_data); \ \ - void (*parseStream)(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length); \ - void (*parseStream_At)(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length, mt32emu_bit32u timestamp); \ - void (*playShortMessage)(mt32emu_const_context context, mt32emu_bit32u message); \ - void (*playShortMessageAt)(mt32emu_const_context context, mt32emu_bit32u message, mt32emu_bit32u timestamp); \ - mt32emu_return_code (*playMsg)(mt32emu_const_context context, mt32emu_bit32u msg); \ - mt32emu_return_code (*playSysex)(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); \ - mt32emu_return_code (*playMsgAt)(mt32emu_const_context context, mt32emu_bit32u msg, mt32emu_bit32u timestamp); \ - mt32emu_return_code (*playSysexAt)(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len, mt32emu_bit32u timestamp); \ + void (MT32EMU_C_CALL *parseStream)(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length); \ + void (MT32EMU_C_CALL *parseStream_At)(mt32emu_const_context context, const mt32emu_bit8u *stream, mt32emu_bit32u length, mt32emu_bit32u timestamp); \ + void (MT32EMU_C_CALL *playShortMessage)(mt32emu_const_context context, mt32emu_bit32u message); \ + void (MT32EMU_C_CALL *playShortMessageAt)(mt32emu_const_context context, mt32emu_bit32u message, mt32emu_bit32u timestamp); \ + mt32emu_return_code (MT32EMU_C_CALL *playMsg)(mt32emu_const_context context, mt32emu_bit32u msg); \ + mt32emu_return_code (MT32EMU_C_CALL *playSysex)(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); \ + mt32emu_return_code (MT32EMU_C_CALL *playMsgAt)(mt32emu_const_context context, mt32emu_bit32u msg, mt32emu_bit32u timestamp); \ + mt32emu_return_code (MT32EMU_C_CALL *playSysexAt)(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len, mt32emu_bit32u timestamp); \ \ - void (*playMsgNow)(mt32emu_const_context context, mt32emu_bit32u msg); \ - void (*playMsgOnPart)(mt32emu_const_context context, mt32emu_bit8u part, mt32emu_bit8u code, mt32emu_bit8u note, mt32emu_bit8u velocity); \ - void (*playSysexNow)(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); \ - void (*writeSysex)(mt32emu_const_context context, mt32emu_bit8u channel, const mt32emu_bit8u *sysex, mt32emu_bit32u len); \ + void (MT32EMU_C_CALL *playMsgNow)(mt32emu_const_context context, mt32emu_bit32u msg); \ + void (MT32EMU_C_CALL *playMsgOnPart)(mt32emu_const_context context, mt32emu_bit8u part, mt32emu_bit8u code, mt32emu_bit8u note, mt32emu_bit8u velocity); \ + void (MT32EMU_C_CALL *playSysexNow)(mt32emu_const_context context, const mt32emu_bit8u *sysex, mt32emu_bit32u len); \ + void (MT32EMU_C_CALL *writeSysex)(mt32emu_const_context context, mt32emu_bit8u channel, const mt32emu_bit8u *sysex, mt32emu_bit32u len); \ \ - void (*setReverbEnabled)(mt32emu_const_context context, const mt32emu_boolean reverb_enabled); \ - mt32emu_boolean (*isReverbEnabled)(mt32emu_const_context context); \ - void (*setReverbOverridden)(mt32emu_const_context context, const mt32emu_boolean reverb_overridden); \ - mt32emu_boolean (*isReverbOverridden)(mt32emu_const_context context); \ - void (*setReverbCompatibilityMode)(mt32emu_const_context context, const mt32emu_boolean mt32_compatible_mode); \ - mt32emu_boolean (*isMT32ReverbCompatibilityMode)(mt32emu_const_context context); \ - mt32emu_boolean (*isDefaultReverbMT32Compatible)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setReverbEnabled)(mt32emu_const_context context, const mt32emu_boolean reverb_enabled); \ + mt32emu_boolean (MT32EMU_C_CALL *isReverbEnabled)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setReverbOverridden)(mt32emu_const_context context, const mt32emu_boolean reverb_overridden); \ + mt32emu_boolean (MT32EMU_C_CALL *isReverbOverridden)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setReverbCompatibilityMode)(mt32emu_const_context context, const mt32emu_boolean mt32_compatible_mode); \ + mt32emu_boolean (MT32EMU_C_CALL *isMT32ReverbCompatibilityMode)(mt32emu_const_context context); \ + mt32emu_boolean (MT32EMU_C_CALL *isDefaultReverbMT32Compatible)(mt32emu_const_context context); \ \ - void (*setDACInputMode)(mt32emu_const_context context, const mt32emu_dac_input_mode mode); \ - mt32emu_dac_input_mode (*getDACInputMode)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setDACInputMode)(mt32emu_const_context context, const mt32emu_dac_input_mode mode); \ + mt32emu_dac_input_mode (MT32EMU_C_CALL *getDACInputMode)(mt32emu_const_context context); \ \ - void (*setMIDIDelayMode)(mt32emu_const_context context, const mt32emu_midi_delay_mode mode); \ - mt32emu_midi_delay_mode (*getMIDIDelayMode)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setMIDIDelayMode)(mt32emu_const_context context, const mt32emu_midi_delay_mode mode); \ + mt32emu_midi_delay_mode (MT32EMU_C_CALL *getMIDIDelayMode)(mt32emu_const_context context); \ \ - void (*setOutputGain)(mt32emu_const_context context, float gain); \ - float (*getOutputGain)(mt32emu_const_context context); \ - void (*setReverbOutputGain)(mt32emu_const_context context, float gain); \ - float (*getReverbOutputGain)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setOutputGain)(mt32emu_const_context context, float gain); \ + float (MT32EMU_C_CALL *getOutputGain)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setReverbOutputGain)(mt32emu_const_context context, float gain); \ + float (MT32EMU_C_CALL *getReverbOutputGain)(mt32emu_const_context context); \ \ - void (*setReversedStereoEnabled)(mt32emu_const_context context, const mt32emu_boolean enabled); \ - mt32emu_boolean (*isReversedStereoEnabled)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setReversedStereoEnabled)(mt32emu_const_context context, const mt32emu_boolean enabled); \ + mt32emu_boolean (MT32EMU_C_CALL *isReversedStereoEnabled)(mt32emu_const_context context); \ \ - void (*renderBit16s)(mt32emu_const_context context, mt32emu_bit16s *stream, mt32emu_bit32u len); \ - void (*renderFloat)(mt32emu_const_context context, float *stream, mt32emu_bit32u len); \ - void (*renderBit16sStreams)(mt32emu_const_context context, const mt32emu_dac_output_bit16s_streams *streams, mt32emu_bit32u len); \ - void (*renderFloatStreams)(mt32emu_const_context context, const mt32emu_dac_output_float_streams *streams, mt32emu_bit32u len); \ + void (MT32EMU_C_CALL *renderBit16s)(mt32emu_const_context context, mt32emu_bit16s *stream, mt32emu_bit32u len); \ + void (MT32EMU_C_CALL *renderFloat)(mt32emu_const_context context, float *stream, mt32emu_bit32u len); \ + void (MT32EMU_C_CALL *renderBit16sStreams)(mt32emu_const_context context, const mt32emu_dac_output_bit16s_streams *streams, mt32emu_bit32u len); \ + void (MT32EMU_C_CALL *renderFloatStreams)(mt32emu_const_context context, const mt32emu_dac_output_float_streams *streams, mt32emu_bit32u len); \ \ - mt32emu_boolean (*hasActivePartials)(mt32emu_const_context context); \ - mt32emu_boolean (*isActive)(mt32emu_const_context context); \ - mt32emu_bit32u (*getPartialCount)(mt32emu_const_context context); \ - mt32emu_bit32u (*getPartStates)(mt32emu_const_context context); \ - void (*getPartialStates)(mt32emu_const_context context, mt32emu_bit8u *partial_states); \ - mt32emu_bit32u (*getPlayingNotes)(mt32emu_const_context context, mt32emu_bit8u part_number, mt32emu_bit8u *keys, mt32emu_bit8u *velocities); \ - const char *(*getPatchName)(mt32emu_const_context context, mt32emu_bit8u part_number); \ - void (*readMemory)(mt32emu_const_context context, mt32emu_bit32u addr, mt32emu_bit32u len, mt32emu_bit8u *data); + mt32emu_boolean (MT32EMU_C_CALL *hasActivePartials)(mt32emu_const_context context); \ + mt32emu_boolean (MT32EMU_C_CALL *isActive)(mt32emu_const_context context); \ + mt32emu_bit32u (MT32EMU_C_CALL *getPartialCount)(mt32emu_const_context context); \ + mt32emu_bit32u (MT32EMU_C_CALL *getPartStates)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *getPartialStates)(mt32emu_const_context context, mt32emu_bit8u *partial_states); \ + mt32emu_bit32u (MT32EMU_C_CALL *getPlayingNotes)(mt32emu_const_context context, mt32emu_bit8u part_number, mt32emu_bit8u *keys, mt32emu_bit8u *velocities); \ + const char *(MT32EMU_C_CALL *getPatchName)(mt32emu_const_context context, mt32emu_bit8u part_number); \ + void (MT32EMU_C_CALL *readMemory)(mt32emu_const_context context, mt32emu_bit32u addr, mt32emu_bit32u len, mt32emu_bit8u *data); #define MT32EMU_SERVICE_I_V1 \ - mt32emu_analog_output_mode (*getBestAnalogOutputMode)(const double target_samplerate); \ - void (*setStereoOutputSampleRate)(mt32emu_context context, const double samplerate); \ - void (*setSamplerateConversionQuality)(mt32emu_context context, const mt32emu_samplerate_conversion_quality quality); \ - void (*selectRendererType)(mt32emu_context context, mt32emu_renderer_type renderer_type); \ - mt32emu_renderer_type (*getSelectedRendererType)(mt32emu_context context); \ - mt32emu_bit32u (*convertOutputToSynthTimestamp)(mt32emu_const_context context, mt32emu_bit32u output_timestamp); \ - mt32emu_bit32u (*convertSynthToOutputTimestamp)(mt32emu_const_context context, mt32emu_bit32u synth_timestamp); + mt32emu_analog_output_mode (MT32EMU_C_CALL *getBestAnalogOutputMode)(const double target_samplerate); \ + void (MT32EMU_C_CALL *setStereoOutputSampleRate)(mt32emu_context context, const double samplerate); \ + void (MT32EMU_C_CALL *setSamplerateConversionQuality)(mt32emu_context context, const mt32emu_samplerate_conversion_quality quality); \ + void (MT32EMU_C_CALL *selectRendererType)(mt32emu_context context, mt32emu_renderer_type renderer_type); \ + mt32emu_renderer_type (MT32EMU_C_CALL *getSelectedRendererType)(mt32emu_context context); \ + mt32emu_bit32u (MT32EMU_C_CALL *convertOutputToSynthTimestamp)(mt32emu_const_context context, mt32emu_bit32u output_timestamp); \ + mt32emu_bit32u (MT32EMU_C_CALL *convertSynthToOutputTimestamp)(mt32emu_const_context context, mt32emu_bit32u synth_timestamp); #define MT32EMU_SERVICE_I_V2 \ - mt32emu_bit32u (*getInternalRenderedSampleCount)(mt32emu_const_context context); \ - void (*setNiceAmpRampEnabled)(mt32emu_const_context context, const mt32emu_boolean enabled); \ - mt32emu_boolean (*isNiceAmpRampEnabled)(mt32emu_const_context context); + mt32emu_bit32u (MT32EMU_C_CALL *getInternalRenderedSampleCount)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setNiceAmpRampEnabled)(mt32emu_const_context context, const mt32emu_boolean enabled); \ + mt32emu_boolean (MT32EMU_C_CALL *isNiceAmpRampEnabled)(mt32emu_const_context context); #define MT32EMU_SERVICE_I_V3 \ - void (*setNicePanningEnabled)(mt32emu_const_context context, const mt32emu_boolean enabled); \ - mt32emu_boolean (*isNicePanningEnabled)(mt32emu_const_context context); \ - void (*setNicePartialMixingEnabled)(mt32emu_const_context context, const mt32emu_boolean enabled); \ - mt32emu_boolean (*isNicePartialMixingEnabled)(mt32emu_const_context context); \ - void (*preallocateReverbMemory)(mt32emu_const_context context, const mt32emu_boolean enabled); \ - void (*configureMIDIEventQueueSysexStorage)(mt32emu_const_context context, const mt32emu_bit32u storage_buffer_size); + void (MT32EMU_C_CALL *setNicePanningEnabled)(mt32emu_const_context context, const mt32emu_boolean enabled); \ + mt32emu_boolean (MT32EMU_C_CALL *isNicePanningEnabled)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setNicePartialMixingEnabled)(mt32emu_const_context context, const mt32emu_boolean enabled); \ + mt32emu_boolean (MT32EMU_C_CALL *isNicePartialMixingEnabled)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *preallocateReverbMemory)(mt32emu_const_context context, const mt32emu_boolean enabled); \ + void (MT32EMU_C_CALL *configureMIDIEventQueueSysexStorage)(mt32emu_const_context context, const mt32emu_bit32u storage_buffer_size); + +#define MT32EMU_SERVICE_I_V4 \ + size_t (MT32EMU_C_CALL *getMachineIDs)(const char **machine_ids, size_t machine_ids_size); \ + size_t (MT32EMU_C_CALL *getROMIDs)(const char **rom_ids, size_t rom_ids_size, const char *machine_id); \ + mt32emu_return_code (MT32EMU_C_CALL *identifyROMData)(mt32emu_rom_info *rom_info, const mt32emu_bit8u *data, size_t data_size, const char *machine_id); \ + mt32emu_return_code (MT32EMU_C_CALL *identifyROMFile)(mt32emu_rom_info *rom_info, const char *filename, const char *machine_id); \ +\ + mt32emu_return_code (MT32EMU_C_CALL *mergeAndAddROMData)(mt32emu_context context, const mt32emu_bit8u *part1_data, size_t part1_data_size, const mt32emu_sha1_digest *part1_sha1_digest, const mt32emu_bit8u *part2_data, size_t part2_data_size, const mt32emu_sha1_digest *part2_sha1_digest); \ + mt32emu_return_code (MT32EMU_C_CALL *mergeAndAddROMFiles)(mt32emu_context context, const char *part1_filename, const char *part2_filename); \ + mt32emu_return_code (MT32EMU_C_CALL *addMachineROMFile)(mt32emu_context context, const char *machine_id, const char *filename); + +#define MT32EMU_SERVICE_I_V5 \ + mt32emu_boolean (MT32EMU_C_CALL *getDisplayState)(mt32emu_const_context context, char *target_buffer, const mt32emu_boolean narrow_lcd); \ + void (MT32EMU_C_CALL *setMainDisplayMode)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setDisplayCompatibility)(mt32emu_const_context context, mt32emu_boolean old_mt32_compatibility_enabled); \ + mt32emu_boolean (MT32EMU_C_CALL *isDisplayOldMT32Compatible)(mt32emu_const_context context); \ + mt32emu_boolean (MT32EMU_C_CALL *isDefaultDisplayOldMT32Compatible)(mt32emu_const_context context); \ + void (MT32EMU_C_CALL *setPartVolumeOverride)(mt32emu_const_context context, mt32emu_bit8u part_number, mt32emu_bit8u volume_override); \ + mt32emu_bit8u (MT32EMU_C_CALL *getPartVolumeOverride)(mt32emu_const_context context, mt32emu_bit8u part_number); + +#define MT32EMU_SERVICE_I_V6 \ + mt32emu_boolean (MT32EMU_C_CALL *getSoundGroupName)(mt32emu_const_context context, char *sound_group_name, mt32emu_bit8u timbre_group, mt32emu_bit8u timbre_number); \ + mt32emu_boolean (MT32EMU_C_CALL *getSoundName)(mt32emu_const_context context, char *sound_name, mt32emu_bit8u timbre_group, mt32emu_bit8u timbre_number); typedef struct { MT32EMU_SERVICE_I_V0 @@ -334,6 +392,33 @@ typedef struct { MT32EMU_SERVICE_I_V3 } mt32emu_service_i_v3; +typedef struct { + MT32EMU_SERVICE_I_V0 + MT32EMU_SERVICE_I_V1 + MT32EMU_SERVICE_I_V2 + MT32EMU_SERVICE_I_V3 + MT32EMU_SERVICE_I_V4 +} mt32emu_service_i_v4; + +typedef struct { + MT32EMU_SERVICE_I_V0 + MT32EMU_SERVICE_I_V1 + MT32EMU_SERVICE_I_V2 + MT32EMU_SERVICE_I_V3 + MT32EMU_SERVICE_I_V4 + MT32EMU_SERVICE_I_V5 +} mt32emu_service_i_v5; + +typedef struct { + MT32EMU_SERVICE_I_V0 + MT32EMU_SERVICE_I_V1 + MT32EMU_SERVICE_I_V2 + MT32EMU_SERVICE_I_V3 + MT32EMU_SERVICE_I_V4 + MT32EMU_SERVICE_I_V5 + MT32EMU_SERVICE_I_V6 +} mt32emu_service_i_v6; + /** * Extensible interface for all the library services. * Union intended to view an interface of any subsequent version as any parent interface not requiring a cast. @@ -344,11 +429,17 @@ union mt32emu_service_i { const mt32emu_service_i_v1 *v1; const mt32emu_service_i_v2 *v2; const mt32emu_service_i_v3 *v3; + const mt32emu_service_i_v4 *v4; + const mt32emu_service_i_v5 *v5; + const mt32emu_service_i_v6 *v6; }; #undef MT32EMU_SERVICE_I_V0 #undef MT32EMU_SERVICE_I_V1 #undef MT32EMU_SERVICE_I_V2 #undef MT32EMU_SERVICE_I_V3 +#undef MT32EMU_SERVICE_I_V4 +#undef MT32EMU_SERVICE_I_V5 +#undef MT32EMU_SERVICE_I_V6 #endif /* #ifndef MT32EMU_C_TYPES_H */ diff --git a/src/sound/munt/c_interface/cpp_interface.h b/src/sound/munt/c_interface/cpp_interface.h index 82fa44b2e..d22897b74 100644 --- a/src/sound/munt/c_interface/cpp_interface.h +++ b/src/sound/munt/c_interface/cpp_interface.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -41,10 +41,17 @@ mt32emu_service_i mt32emu_get_service_i(); #define mt32emu_get_library_version_string i.v0->getLibraryVersionString #define mt32emu_get_stereo_output_samplerate i.v0->getStereoOutputSamplerate #define mt32emu_get_best_analog_output_mode iV1()->getBestAnalogOutputMode +#define mt32emu_get_machine_ids iV4()->getMachineIDs +#define mt32emu_get_rom_ids iV4()->getROMIDs +#define mt32emu_identify_rom_data iV4()->identifyROMData +#define mt32emu_identify_rom_file iV4()->identifyROMFile #define mt32emu_create_context i.v0->createContext #define mt32emu_free_context i.v0->freeContext #define mt32emu_add_rom_data i.v0->addROMData #define mt32emu_add_rom_file i.v0->addROMFile +#define mt32emu_merge_and_add_rom_data iV4()->mergeAndAddROMData +#define mt32emu_merge_and_add_rom_files iV4()->mergeAndAddROMFiles +#define mt32emu_add_machine_rom_file iV4()->addMachineROMFile #define mt32emu_get_rom_info i.v0->getROMInfo #define mt32emu_set_partial_count i.v0->setPartialCount #define mt32emu_set_analog_output_mode i.v0->setAnalogOutputMode @@ -91,6 +98,8 @@ mt32emu_service_i mt32emu_get_service_i(); #define mt32emu_get_output_gain i.v0->getOutputGain #define mt32emu_set_reverb_output_gain i.v0->setReverbOutputGain #define mt32emu_get_reverb_output_gain i.v0->getReverbOutputGain +#define mt32emu_set_part_volume_override iV5()->setPartVolumeOverride +#define mt32emu_get_part_volume_override iV5()->getPartVolumeOverride #define mt32emu_set_reversed_stereo_enabled i.v0->setReversedStereoEnabled #define mt32emu_is_reversed_stereo_enabled i.v0->isReversedStereoEnabled #define mt32emu_set_nice_amp_ramp_enabled iV2()->setNiceAmpRampEnabled @@ -110,7 +119,14 @@ mt32emu_service_i mt32emu_get_service_i(); #define mt32emu_get_partial_states i.v0->getPartialStates #define mt32emu_get_playing_notes i.v0->getPlayingNotes #define mt32emu_get_patch_name i.v0->getPatchName +#define mt32emu_get_sound_group_name iV6()->getSoundGroupName +#define mt32emu_get_sound_name iV6()->getSoundName #define mt32emu_read_memory i.v0->readMemory +#define mt32emu_get_display_state iV5()->getDisplayState +#define mt32emu_set_main_display_mode iV5()->setMainDisplayMode +#define mt32emu_set_display_compatibility iV5()->setDisplayCompatibility +#define mt32emu_is_display_old_mt32_compatible iV5()->isDisplayOldMT32Compatible +#define mt32emu_is_default_display_old_mt32_compatible iV5()->isDefaultDisplayOldMT32Compatible #else // #if MT32EMU_API_TYPE == 2 @@ -123,7 +139,7 @@ namespace MT32Emu { namespace CppInterfaceImpl { static const mt32emu_report_handler_i NULL_REPORT_HANDLER = { NULL }; -static mt32emu_report_handler_i getReportHandlerThunk(); +static mt32emu_report_handler_i getReportHandlerThunk(mt32emu_report_handler_version); static mt32emu_midi_receiver_i getMidiReceiverThunk(); } @@ -136,8 +152,8 @@ static mt32emu_midi_receiver_i getMidiReceiverThunk(); * See c_types.h and c_interface.h for description of the corresponding interface methods. */ -// Defines the interface for handling reported events. -// Corresponds to the current version of mt32emu_report_handler_i interface. +// Defines the interface for handling reported events (initial version). +// Corresponds to the mt32emu_report_handler_i_v0 interface. class IReportHandler { public: virtual void printDebug(const char *fmt, va_list list) = 0; @@ -159,6 +175,17 @@ protected: ~IReportHandler() {} }; +// Extends IReportHandler, so that the client may supply callbacks for reporting signals about updated display state. +// Corresponds to the mt32emu_report_handler_i_v1 interface. +class IReportHandlerV1 : public IReportHandler { +public: + virtual void onLCDStateUpdated() = 0; + virtual void onMidiMessageLEDStateUpdated(bool ledState) = 0; + +protected: + ~IReportHandlerV1() {} +}; + // Defines the interface for receiving MIDI messages generated by MIDI stream parser. // Corresponds to the current version of mt32emu_midi_receiver_i interface. class IMidiReceiver { @@ -196,14 +223,24 @@ public: Bit32u getStereoOutputSamplerate(const AnalogOutputMode analog_output_mode) { return mt32emu_get_stereo_output_samplerate(static_cast(analog_output_mode)); } AnalogOutputMode getBestAnalogOutputMode(const double target_samplerate) { return static_cast(mt32emu_get_best_analog_output_mode(target_samplerate)); } + size_t getMachineIDs(const char **machine_ids, size_t machine_ids_size) { return mt32emu_get_machine_ids(machine_ids, machine_ids_size); } + size_t getROMIDs(const char **rom_ids, size_t rom_ids_size, const char *machine_id) { return mt32emu_get_rom_ids(rom_ids, rom_ids_size, machine_id); } + mt32emu_return_code identifyROMData(mt32emu_rom_info *rom_info, const Bit8u *data, size_t data_size, const char *machine_id) { return mt32emu_identify_rom_data(rom_info, data, data_size, machine_id); } + mt32emu_return_code identifyROMFile(mt32emu_rom_info *rom_info, const char *filename, const char *machine_id) { return mt32emu_identify_rom_file(rom_info, filename, machine_id); } + // Context-dependent methods mt32emu_context getContext() { return c; } void createContext(mt32emu_report_handler_i report_handler = CppInterfaceImpl::NULL_REPORT_HANDLER, void *instance_data = NULL) { freeContext(); c = mt32emu_create_context(report_handler, instance_data); } - void createContext(IReportHandler &report_handler) { createContext(CppInterfaceImpl::getReportHandlerThunk(), &report_handler); } + void createContext(IReportHandler &report_handler) { createContext(CppInterfaceImpl::getReportHandlerThunk(MT32EMU_REPORT_HANDLER_VERSION_0), &report_handler); } + void createContext(IReportHandlerV1 &report_handler) { createContext(CppInterfaceImpl::getReportHandlerThunk(MT32EMU_REPORT_HANDLER_VERSION_1), &report_handler); } void freeContext() { if (c != NULL) { mt32emu_free_context(c); c = NULL; } } mt32emu_return_code addROMData(const Bit8u *data, size_t data_size, const mt32emu_sha1_digest *sha1_digest = NULL) { return mt32emu_add_rom_data(c, data, data_size, sha1_digest); } mt32emu_return_code addROMFile(const char *filename) { return mt32emu_add_rom_file(c, filename); } + mt32emu_return_code mergeAndAddROMData(const Bit8u *part1_data, size_t part1_data_size, const Bit8u *part2_data, size_t part2_data_size) { return mt32emu_merge_and_add_rom_data(c, part1_data, part1_data_size, NULL, part2_data, part2_data_size, NULL); } + mt32emu_return_code mergeAndAddROMData(const Bit8u *part1_data, size_t part1_data_size, const mt32emu_sha1_digest *part1_sha1_digest, const Bit8u *part2_data, size_t part2_data_size, const mt32emu_sha1_digest *part2_sha1_digest) { return mt32emu_merge_and_add_rom_data(c, part1_data, part1_data_size, part1_sha1_digest, part2_data, part2_data_size, part2_sha1_digest); } + mt32emu_return_code mergeAndAddROMFiles(const char *part1_filename, const char *part2_filename) { return mt32emu_merge_and_add_rom_files(c, part1_filename, part2_filename); } + mt32emu_return_code addMachineROMFile(const char *machine_id, const char *filename) { return mt32emu_add_machine_rom_file(c, machine_id, filename); } void getROMInfo(mt32emu_rom_info *rom_info) { mt32emu_get_rom_info(c, rom_info); } void setPartialCount(const Bit32u partial_count) { mt32emu_set_partial_count(c, partial_count); } void setAnalogOutputMode(const AnalogOutputMode analog_output_mode) { mt32emu_set_analog_output_mode(c, static_cast(analog_output_mode)); } @@ -258,6 +295,9 @@ public: void setReverbOutputGain(float gain) { mt32emu_set_reverb_output_gain(c, gain); } float getReverbOutputGain() { return mt32emu_get_reverb_output_gain(c); } + void setPartVolumeOverride(Bit8u part_number, Bit8u volume_override) { mt32emu_set_part_volume_override(c, part_number, volume_override); } + Bit8u getPartVolumeOverride(Bit8u part_number) { return mt32emu_get_part_volume_override(c, part_number); } + void setReversedStereoEnabled(const bool enabled) { mt32emu_set_reversed_stereo_enabled(c, enabled ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE); } bool isReversedStereoEnabled() { return mt32emu_is_reversed_stereo_enabled(c) != MT32EMU_BOOL_FALSE; } @@ -282,8 +322,17 @@ public: void getPartialStates(Bit8u *partial_states) { mt32emu_get_partial_states(c, partial_states); } Bit32u getPlayingNotes(Bit8u part_number, Bit8u *keys, Bit8u *velocities) { return mt32emu_get_playing_notes(c, part_number, keys, velocities); } const char *getPatchName(Bit8u part_number) { return mt32emu_get_patch_name(c, part_number); } + bool getSoundGroupName(char *soundGroupName, Bit8u timbreGroup, Bit8u timbreNumber) { return mt32emu_get_sound_group_name(c, soundGroupName, timbreGroup, timbreNumber) != MT32EMU_BOOL_FALSE; } + bool getSoundName(char *soundName, Bit8u timbreGroup, Bit8u timbreNumber) { return mt32emu_get_sound_name(c, soundName, timbreGroup, timbreNumber) != MT32EMU_BOOL_FALSE; } void readMemory(Bit32u addr, Bit32u len, Bit8u *data) { mt32emu_read_memory(c, addr, len, data); } + bool getDisplayState(char *target_buffer, const bool narrow_lcd) { return mt32emu_get_display_state(c, target_buffer, narrow_lcd ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE) != MT32EMU_BOOL_FALSE; } + void setMainDisplayMode() { mt32emu_set_main_display_mode(c); } + + void setDisplayCompatibility(const bool oldMT32CompatibilityEnabled) { mt32emu_set_display_compatibility(c, oldMT32CompatibilityEnabled ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE); } + bool isDisplayOldMT32Compatible() { return mt32emu_is_display_old_mt32_compatible(c) != MT32EMU_BOOL_FALSE; } + bool isDefaultDisplayOldMT32Compatible() { return mt32emu_is_default_display_old_mt32_compatible(c) != MT32EMU_BOOL_FALSE; } + private: #if MT32EMU_API_TYPE == 2 const mt32emu_service_i i; @@ -294,108 +343,137 @@ private: const mt32emu_service_i_v1 *iV1() { return (getVersionID() < MT32EMU_SERVICE_VERSION_1) ? NULL : i.v1; } const mt32emu_service_i_v2 *iV2() { return (getVersionID() < MT32EMU_SERVICE_VERSION_2) ? NULL : i.v2; } const mt32emu_service_i_v3 *iV3() { return (getVersionID() < MT32EMU_SERVICE_VERSION_3) ? NULL : i.v3; } + const mt32emu_service_i_v4 *iV4() { return (getVersionID() < MT32EMU_SERVICE_VERSION_4) ? NULL : i.v4; } + const mt32emu_service_i_v5 *iV5() { return (getVersionID() < MT32EMU_SERVICE_VERSION_5) ? NULL : i.v5; } + const mt32emu_service_i_v6 *iV6() { return (getVersionID() < MT32EMU_SERVICE_VERSION_6) ? NULL : i.v6; } #endif + + Service(const Service &); // prevent copy-construction + Service& operator=(const Service &); // prevent assignment }; namespace CppInterfaceImpl { -static mt32emu_report_handler_version getReportHandlerVersionID(mt32emu_report_handler_i) { - return MT32EMU_REPORT_HANDLER_VERSION_CURRENT; -} +static mt32emu_report_handler_version MT32EMU_C_CALL getReportHandlerVersionID(mt32emu_report_handler_i); -static void printDebug(void *instance_data, const char *fmt, va_list list) { +static void MT32EMU_C_CALL printDebug(void *instance_data, const char *fmt, va_list list) { static_cast(instance_data)->printDebug(fmt, list); } -static void onErrorControlROM(void *instance_data) { +static void MT32EMU_C_CALL onErrorControlROM(void *instance_data) { static_cast(instance_data)->onErrorControlROM(); } -static void onErrorPCMROM(void *instance_data) { +static void MT32EMU_C_CALL onErrorPCMROM(void *instance_data) { static_cast(instance_data)->onErrorPCMROM(); } -static void showLCDMessage(void *instance_data, const char *message) { +static void MT32EMU_C_CALL showLCDMessage(void *instance_data, const char *message) { static_cast(instance_data)->showLCDMessage(message); } -static void onMIDIMessagePlayed(void *instance_data) { +static void MT32EMU_C_CALL onMIDIMessagePlayed(void *instance_data) { static_cast(instance_data)->onMIDIMessagePlayed(); } -static mt32emu_boolean onMIDIQueueOverflow(void *instance_data) { +static mt32emu_boolean MT32EMU_C_CALL onMIDIQueueOverflow(void *instance_data) { return static_cast(instance_data)->onMIDIQueueOverflow() ? MT32EMU_BOOL_TRUE : MT32EMU_BOOL_FALSE; } -static void onMIDISystemRealtime(void *instance_data, mt32emu_bit8u system_realtime) { +static void MT32EMU_C_CALL onMIDISystemRealtime(void *instance_data, mt32emu_bit8u system_realtime) { static_cast(instance_data)->onMIDISystemRealtime(system_realtime); } -static void onDeviceReset(void *instance_data) { +static void MT32EMU_C_CALL onDeviceReset(void *instance_data) { static_cast(instance_data)->onDeviceReset(); } -static void onDeviceReconfig(void *instance_data) { +static void MT32EMU_C_CALL onDeviceReconfig(void *instance_data) { static_cast(instance_data)->onDeviceReconfig(); } -static void onNewReverbMode(void *instance_data, mt32emu_bit8u mode) { +static void MT32EMU_C_CALL onNewReverbMode(void *instance_data, mt32emu_bit8u mode) { static_cast(instance_data)->onNewReverbMode(mode); } -static void onNewReverbTime(void *instance_data, mt32emu_bit8u time) { +static void MT32EMU_C_CALL onNewReverbTime(void *instance_data, mt32emu_bit8u time) { static_cast(instance_data)->onNewReverbTime(time); } -static void onNewReverbLevel(void *instance_data, mt32emu_bit8u level) { +static void MT32EMU_C_CALL onNewReverbLevel(void *instance_data, mt32emu_bit8u level) { static_cast(instance_data)->onNewReverbLevel(level); } -static void onPolyStateChanged(void *instance_data, mt32emu_bit8u part_num) { +static void MT32EMU_C_CALL onPolyStateChanged(void *instance_data, mt32emu_bit8u part_num) { static_cast(instance_data)->onPolyStateChanged(part_num); } -static void onProgramChanged(void *instance_data, mt32emu_bit8u part_num, const char *sound_group_name, const char *patch_name) { +static void MT32EMU_C_CALL onProgramChanged(void *instance_data, mt32emu_bit8u part_num, const char *sound_group_name, const char *patch_name) { static_cast(instance_data)->onProgramChanged(part_num, sound_group_name, patch_name); } -static mt32emu_report_handler_i getReportHandlerThunk() { - static const mt32emu_report_handler_i_v0 REPORT_HANDLER_V0_THUNK = { - getReportHandlerVersionID, - printDebug, - onErrorControlROM, - onErrorPCMROM, - showLCDMessage, - onMIDIMessagePlayed, - onMIDIQueueOverflow, - onMIDISystemRealtime, - onDeviceReset, - onDeviceReconfig, - onNewReverbMode, - onNewReverbTime, - onNewReverbLevel, - onPolyStateChanged, - onProgramChanged - }; - - static const mt32emu_report_handler_i REPORT_HANDLER_THUNK = { &REPORT_HANDLER_V0_THUNK }; - - return REPORT_HANDLER_THUNK; +static void MT32EMU_C_CALL onLCDStateUpdated(void *instance_data) { + static_cast(instance_data)->onLCDStateUpdated(); } -static mt32emu_midi_receiver_version getMidiReceiverVersionID(mt32emu_midi_receiver_i) { +static void MT32EMU_C_CALL onMidiMessageLEDStateUpdated(void *instance_data, mt32emu_boolean led_state) { + static_cast(instance_data)->onMidiMessageLEDStateUpdated(led_state != MT32EMU_BOOL_FALSE); +} + +#define MT32EMU_REPORT_HANDLER_V0_THUNK \ + getReportHandlerVersionID, \ + printDebug, \ + onErrorControlROM, \ + onErrorPCMROM, \ + showLCDMessage, \ + onMIDIMessagePlayed, \ + onMIDIQueueOverflow, \ + onMIDISystemRealtime, \ + onDeviceReset, \ + onDeviceReconfig, \ + onNewReverbMode, \ + onNewReverbTime, \ + onNewReverbLevel, \ + onPolyStateChanged, \ + onProgramChanged + +static const mt32emu_report_handler_i_v0 REPORT_HANDLER_V0_THUNK = { + MT32EMU_REPORT_HANDLER_V0_THUNK +}; + +static const mt32emu_report_handler_i_v1 REPORT_HANDLER_V1_THUNK = { + MT32EMU_REPORT_HANDLER_V0_THUNK, + onLCDStateUpdated, + onMidiMessageLEDStateUpdated +}; + +#undef MT32EMU_REPORT_HANDLER_THUNK_V0 + +static mt32emu_report_handler_version MT32EMU_C_CALL getReportHandlerVersionID(mt32emu_report_handler_i thunk) { + if (thunk.v0 == &REPORT_HANDLER_V0_THUNK) return MT32EMU_REPORT_HANDLER_VERSION_0; + return MT32EMU_REPORT_HANDLER_VERSION_CURRENT; +} + +static mt32emu_report_handler_i getReportHandlerThunk(mt32emu_report_handler_version versionID) { + mt32emu_report_handler_i thunk; + if (versionID == MT32EMU_REPORT_HANDLER_VERSION_0) thunk.v0 = &REPORT_HANDLER_V0_THUNK; + else thunk.v1 = &REPORT_HANDLER_V1_THUNK; + return thunk; +} + +static mt32emu_midi_receiver_version MT32EMU_C_CALL getMidiReceiverVersionID(mt32emu_midi_receiver_i) { return MT32EMU_MIDI_RECEIVER_VERSION_CURRENT; } -static void handleShortMessage(void *instance_data, const mt32emu_bit32u message) { +static void MT32EMU_C_CALL handleShortMessage(void *instance_data, const mt32emu_bit32u message) { static_cast(instance_data)->handleShortMessage(message); } -static void handleSysex(void *instance_data, const mt32emu_bit8u stream[], const mt32emu_bit32u length) { +static void MT32EMU_C_CALL handleSysex(void *instance_data, const mt32emu_bit8u stream[], const mt32emu_bit32u length) { static_cast(instance_data)->handleSysex(stream, length); } -static void handleSystemRealtimeMessage(void *instance_data, const mt32emu_bit8u realtime) { +static void MT32EMU_C_CALL handleSystemRealtimeMessage(void *instance_data, const mt32emu_bit8u realtime) { static_cast(instance_data)->handleSystemRealtimeMessage(realtime); } @@ -424,10 +502,17 @@ static mt32emu_midi_receiver_i getMidiReceiverThunk() { #undef mt32emu_get_library_version_string #undef mt32emu_get_stereo_output_samplerate #undef mt32emu_get_best_analog_output_mode +#undef mt32emu_get_machine_ids +#undef mt32emu_get_rom_ids +#undef mt32emu_identify_rom_data +#undef mt32emu_identify_rom_file #undef mt32emu_create_context #undef mt32emu_free_context #undef mt32emu_add_rom_data #undef mt32emu_add_rom_file +#undef mt32emu_merge_and_add_rom_data +#undef mt32emu_merge_and_add_rom_files +#undef mt32emu_add_machine_rom_file #undef mt32emu_get_rom_info #undef mt32emu_set_partial_count #undef mt32emu_set_analog_output_mode @@ -493,7 +578,14 @@ static mt32emu_midi_receiver_i getMidiReceiverThunk() { #undef mt32emu_get_partial_states #undef mt32emu_get_playing_notes #undef mt32emu_get_patch_name +#undef mt32emu_get_sound_group_name +#undef mt32emu_get_sound_name #undef mt32emu_read_memory +#undef mt32emu_get_display_state +#undef mt32emu_set_main_display_mode +#undef mt32emu_set_display_compatibility +#undef mt32emu_is_display_old_mt32_compatible +#undef mt32emu_is_default_display_old_mt32_compatible #endif // #if MT32EMU_API_TYPE == 2 diff --git a/src/sound/munt/config.h b/src/sound/munt/config.h index e41d4664b..906c23d56 100644 --- a/src/sound/munt/config.h +++ b/src/sound/munt/config.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2017 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -18,9 +18,9 @@ #ifndef MT32EMU_CONFIG_H #define MT32EMU_CONFIG_H -#define MT32EMU_VERSION "2.4.0" +#define MT32EMU_VERSION "2.7.0" #define MT32EMU_VERSION_MAJOR 2 -#define MT32EMU_VERSION_MINOR 4 +#define MT32EMU_VERSION_MINOR 7 #define MT32EMU_VERSION_PATCH 0 /* Library Exports Configuration diff --git a/src/sound/munt/config.h.in b/src/sound/munt/config.h.in index 48dfb0076..b120f407c 100644 --- a/src/sound/munt/config.h.in +++ b/src/sound/munt/config.h.in @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -33,6 +33,35 @@ * is exported, and thus the client application may ONLY use MT32EMU_API_TYPE 2. * 3: All the available API types are provided by the library build. */ -#define MT32EMU_EXPORTS_TYPE @libmt32emu_EXPORTS_TYPE@ +#define MT32EMU_EXPORTS_TYPE @libmt32emu_EXPORTS_TYPE@ +/* Type of library build. + * + * For shared library builds, MT32EMU_SHARED is defined, so that compiler-specific attributes are assigned + * to all the exported symbols as appropriate. MT32EMU_SHARED is undefined for static library builds. + */ +@libmt32emu_SHARED_DEFINITION@ + +/* Whether the library is built as a shared object with a version tag to enable runtime version checks. */ +#define MT32EMU_WITH_VERSION_TAGGING @libmt32emu_RUNTIME_VERSION_CHECK@ + +/* Automatic runtime check of the shared library version in client applications. + * + * When the shared library is built with version tagging enabled, the client application may rely on an automatic + * version check that ensures forward compatibility. See VersionTagging.h for more info. + * 0: Disables the automatic runtime version check in the client application. Implied for static library builds + * and when version tagging is not used in a shared object. + * 1: Enables an automatic runtime version check in client applications that utilise low-level C++ API, + * i.e. when MT32EMU_API_TYPE 0. Client applications that rely on the C-compatible API are supposed + * to check the version of the shared object by other means (e.g. using versioned C symbols, etc.). + * 2: Enables an automatic runtime version check for C++ and C client applications. + */ +#if MT32EMU_WITH_VERSION_TAGGING +# ifndef MT32EMU_RUNTIME_VERSION_CHECK +# define MT32EMU_RUNTIME_VERSION_CHECK @libmt32emu_RUNTIME_VERSION_CHECK@ +# endif +#else +# undef MT32EMU_RUNTIME_VERSION_CHECK #endif + +#endif /* #ifndef MT32EMU_CONFIG_H */ diff --git a/src/sound/munt/globals.h b/src/sound/munt/globals.h index 243ff82ae..86ac1ca5b 100644 --- a/src/sound/munt/globals.h +++ b/src/sound/munt/globals.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -20,27 +20,35 @@ #include "config.h" -/* Support for compiling shared library. */ +/* Support for compiling shared library. + * MT32EMU_SHARED and mt32emu_EXPORTS are defined when building a shared library. + * MT32EMU_SHARED should also be defined for Windows platforms that provides for a small performance benefit, + * and it _must_ be defined along with MT32EMU_RUNTIME_VERSION_CHECK when using MSVC. + */ #ifdef MT32EMU_SHARED -#if defined _WIN32 || defined __CYGWIN__ -#ifdef _MSC_VER -#ifdef mt32emu_EXPORTS -#define MT32EMU_EXPORT_ATTRIBUTE _declspec(dllexport) -#else /* #ifdef mt32emu_EXPORTS */ -#define MT32EMU_EXPORT_ATTRIBUTE _declspec(dllimport) -#endif /* #ifdef mt32emu_EXPORTS */ -#else /* #ifdef _MSC_VER */ -#ifdef mt32emu_EXPORTS -#define MT32EMU_EXPORT_ATTRIBUTE __attribute__ ((dllexport)) -#else /* #ifdef mt32emu_EXPORTS */ -#define MT32EMU_EXPORT_ATTRIBUTE __attribute__ ((dllimport)) -#endif /* #ifdef mt32emu_EXPORTS */ -#endif /* #ifdef _MSC_VER */ -#else /* #if defined _WIN32 || defined __CYGWIN__ */ -#define MT32EMU_EXPORT_ATTRIBUTE __attribute__ ((visibility("default"))) -#endif /* #if defined _WIN32 || defined __CYGWIN__ */ +# if defined _WIN32 || defined __CYGWIN__ || defined __OS2__ +# ifdef _MSC_VER +# ifdef mt32emu_EXPORTS +# define MT32EMU_EXPORT_ATTRIBUTE _declspec(dllexport) +# else /* #ifdef mt32emu_EXPORTS */ +# define MT32EMU_EXPORT_ATTRIBUTE _declspec(dllimport) +# endif /* #ifdef mt32emu_EXPORTS */ +# else /* #ifdef _MSC_VER */ +# ifdef mt32emu_EXPORTS +# define MT32EMU_EXPORT_ATTRIBUTE __attribute__ ((dllexport)) +# else /* #ifdef mt32emu_EXPORTS */ +# define MT32EMU_EXPORT_ATTRIBUTE __attribute__ ((dllimport)) +# endif /* #ifdef mt32emu_EXPORTS */ +# endif /* #ifdef _MSC_VER */ +# else /* #if defined _WIN32 || defined __CYGWIN__ || defined __OS2__ */ +# ifdef mt32emu_EXPORTS +# define MT32EMU_EXPORT_ATTRIBUTE __attribute__ ((visibility("default"))) +# else /* #ifdef mt32emu_EXPORTS */ +# define MT32EMU_EXPORT_ATTRIBUTE +# endif /* #ifdef mt32emu_EXPORTS */ +# endif /* #if defined _WIN32 || defined __CYGWIN__ || defined __OS2__ */ #else /* #ifdef MT32EMU_SHARED */ -#define MT32EMU_EXPORT_ATTRIBUTE +# define MT32EMU_EXPORT_ATTRIBUTE #endif /* #ifdef MT32EMU_SHARED */ #if MT32EMU_EXPORTS_TYPE == 1 || MT32EMU_EXPORTS_TYPE == 2 @@ -49,6 +57,33 @@ #define MT32EMU_EXPORT MT32EMU_EXPORT_ATTRIBUTE #endif +/* Facilitates easier tracking of the library version when an external symbol was introduced. + * Particularly useful for shared library builds on POSIX systems that support symbol versioning, + * so that the version map file can be generated automatically. + */ +#define MT32EMU_EXPORT_V(symbol_version_tag) MT32EMU_EXPORT + +/* Helpers for compile-time version checks */ + +/* Encodes the given version components to a single integer value to simplify further checks. */ +#define MT32EMU_VERSION_INT(major, minor, patch) ((major << 16) | (minor << 8) | patch) + +/* The version of this library build, as an integer. */ +#define MT32EMU_CURRENT_VERSION_INT MT32EMU_VERSION_INT(MT32EMU_VERSION_MAJOR, MT32EMU_VERSION_MINOR, MT32EMU_VERSION_PATCH) + +/* Compares the current library version with the given version components. Intended for feature checks. */ +#define MT32EMU_VERSION_ATLEAST(major, minor, patch) (MT32EMU_CURRENT_VERSION_INT >= MT32EMU_VERSION_INT(major, minor, patch)) + +/* Implements a simple version check that ensures full API compatibility of this library build + * with the application requirements. The latter can be derived from the versions of used public symbols. + * + * Note: This macro is intended for a quick compile-time check. To ensure compatibility of an application + * linked with a shared library, an automatic version check can be engaged with help of the build option + * libmt32emu_WITH_VERSION_TAGGING. For a fine-grained feature checking in run-time, see functions + * mt32emu_get_library_version_int and Synth::getLibraryVersionInt. + */ +#define MT32EMU_IS_COMPATIBLE(major, minor) (MT32EMU_VERSION_MAJOR == major && MT32EMU_VERSION_MINOR >= minor) + /* Useful constants */ /* Sample rate to use in mixing. With the progress of development, we've found way too many thing dependent. diff --git a/src/sound/munt/internals.h b/src/sound/munt/internals.h index 8a609546c..1b3ad0de2 100644 --- a/src/sound/munt/internals.h +++ b/src/sound/munt/internals.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/mmath.h b/src/sound/munt/mmath.h index a66fad566..3164c7bfc 100644 --- a/src/sound/munt/mmath.h +++ b/src/sound/munt/mmath.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/mt32emu.h b/src/sound/munt/mt32emu.h index cfb50fb28..571b25571 100644 --- a/src/sound/munt/mt32emu.h +++ b/src/sound/munt/mt32emu.h @@ -1,5 +1,5 @@ /* Copyright (C) 2003, 2004, 2005, 2006, 2008, 2009 Dean Beeler, Jerome Fisher - * Copyright (C) 2011-2020 Dean Beeler, Jerome Fisher, Sergey V. Mikayev + * Copyright (C) 2011-2022 Dean Beeler, Jerome Fisher, Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by @@ -37,28 +37,23 @@ */ #ifdef MT32EMU_API_TYPE -#if MT32EMU_API_TYPE == 0 && (MT32EMU_EXPORTS_TYPE == 1 || MT32EMU_EXPORTS_TYPE == 2) -#error Incompatible setting MT32EMU_API_TYPE=0 -#elif MT32EMU_API_TYPE == 1 && (MT32EMU_EXPORTS_TYPE == 0 || MT32EMU_EXPORTS_TYPE == 2) -#error Incompatible setting MT32EMU_API_TYPE=1 -#elif MT32EMU_API_TYPE == 2 && (MT32EMU_EXPORTS_TYPE == 0) -#error Incompatible setting MT32EMU_API_TYPE=2 -#elif MT32EMU_API_TYPE == 3 && (MT32EMU_EXPORTS_TYPE == 0 || MT32EMU_EXPORTS_TYPE == 2) -#error Incompatible setting MT32EMU_API_TYPE=3 -#endif +# if MT32EMU_API_TYPE == 0 && (MT32EMU_EXPORTS_TYPE == 1 || MT32EMU_EXPORTS_TYPE == 2) +# error Incompatible setting MT32EMU_API_TYPE=0 +# elif MT32EMU_API_TYPE == 1 && (MT32EMU_EXPORTS_TYPE == 0 || MT32EMU_EXPORTS_TYPE == 2) +# error Incompatible setting MT32EMU_API_TYPE=1 +# elif MT32EMU_API_TYPE == 2 && (MT32EMU_EXPORTS_TYPE == 0) +# error Incompatible setting MT32EMU_API_TYPE=2 +# elif MT32EMU_API_TYPE == 3 && (MT32EMU_EXPORTS_TYPE == 0 || MT32EMU_EXPORTS_TYPE == 2) +# error Incompatible setting MT32EMU_API_TYPE=3 +# endif #else /* #ifdef MT32EMU_API_TYPE */ -#if 0 < MT32EMU_EXPORTS_TYPE && MT32EMU_EXPORTS_TYPE < 3 -#define MT32EMU_API_TYPE MT32EMU_EXPORTS_TYPE -#else -#define MT32EMU_API_TYPE 0 -#endif +# if 0 < MT32EMU_EXPORTS_TYPE && MT32EMU_EXPORTS_TYPE < 3 +# define MT32EMU_API_TYPE MT32EMU_EXPORTS_TYPE +# else +# define MT32EMU_API_TYPE 0 +# endif #endif /* #ifdef MT32EMU_API_TYPE */ -/* MT32EMU_SHARED should be defined when building shared library, especially for Windows platforms. */ -/* -#define MT32EMU_SHARED -*/ - #include "globals.h" #if !defined(__cplusplus) || MT32EMU_API_TYPE == 1 @@ -79,6 +74,14 @@ #include "MidiStreamParser.h" #include "SampleRateConverter.h" +#if MT32EMU_RUNTIME_VERSION_CHECK == 1 +#include "VersionTagging.h" +#endif + #endif /* #if !defined(__cplusplus) || MT32EMU_API_TYPE == 1 */ +#if MT32EMU_RUNTIME_VERSION_CHECK == 2 +#include "VersionTagging.h" +#endif + #endif /* #ifndef MT32EMU_MT32EMU_H */ diff --git a/src/sound/munt/srchelper/InternalResampler.cpp b/src/sound/munt/srchelper/InternalResampler.cpp index 56bd1ac05..4e6a5a748 100644 --- a/src/sound/munt/srchelper/InternalResampler.cpp +++ b/src/sound/munt/srchelper/InternalResampler.cpp @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/InternalResampler.h b/src/sound/munt/srchelper/InternalResampler.h index cf08c8261..a80cc7dc4 100644 --- a/src/sound/munt/srchelper/InternalResampler.h +++ b/src/sound/munt/srchelper/InternalResampler.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/SamplerateAdapter.cpp b/src/sound/munt/srchelper/SamplerateAdapter.cpp index 2a417ed2e..aeb695a2e 100644 --- a/src/sound/munt/srchelper/SamplerateAdapter.cpp +++ b/src/sound/munt/srchelper/SamplerateAdapter.cpp @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/SamplerateAdapter.h b/src/sound/munt/srchelper/SamplerateAdapter.h index eed9799a9..6da9b64aa 100644 --- a/src/sound/munt/srchelper/SamplerateAdapter.h +++ b/src/sound/munt/srchelper/SamplerateAdapter.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/SoxrAdapter.cpp b/src/sound/munt/srchelper/SoxrAdapter.cpp index a88c133ec..754f55d56 100644 --- a/src/sound/munt/srchelper/SoxrAdapter.cpp +++ b/src/sound/munt/srchelper/SoxrAdapter.cpp @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/SoxrAdapter.h b/src/sound/munt/srchelper/SoxrAdapter.h index c6b9d3ade..2abcbdd8a 100644 --- a/src/sound/munt/srchelper/SoxrAdapter.h +++ b/src/sound/munt/srchelper/SoxrAdapter.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/srctools/include/FIRResampler.h b/src/sound/munt/srchelper/srctools/include/FIRResampler.h index 9032131dc..b8e0be1bb 100644 --- a/src/sound/munt/srchelper/srctools/include/FIRResampler.h +++ b/src/sound/munt/srchelper/srctools/include/FIRResampler.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/srctools/include/FloatSampleProvider.h b/src/sound/munt/srchelper/srctools/include/FloatSampleProvider.h index 4056db373..9b88bced6 100644 --- a/src/sound/munt/srchelper/srctools/include/FloatSampleProvider.h +++ b/src/sound/munt/srchelper/srctools/include/FloatSampleProvider.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/srctools/include/IIR2xResampler.h b/src/sound/munt/srchelper/srctools/include/IIR2xResampler.h index ea150f9db..247d57568 100644 --- a/src/sound/munt/srchelper/srctools/include/IIR2xResampler.h +++ b/src/sound/munt/srchelper/srctools/include/IIR2xResampler.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/srctools/include/LinearResampler.h b/src/sound/munt/srchelper/srctools/include/LinearResampler.h index 0e30ea2e9..a55f4ae67 100644 --- a/src/sound/munt/srchelper/srctools/include/LinearResampler.h +++ b/src/sound/munt/srchelper/srctools/include/LinearResampler.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/srctools/include/ResamplerModel.h b/src/sound/munt/srchelper/srctools/include/ResamplerModel.h index b7a64f02e..622ccbb18 100644 --- a/src/sound/munt/srchelper/srctools/include/ResamplerModel.h +++ b/src/sound/munt/srchelper/srctools/include/ResamplerModel.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/srctools/include/ResamplerStage.h b/src/sound/munt/srchelper/srctools/include/ResamplerStage.h index edd7678c1..2d8507037 100644 --- a/src/sound/munt/srchelper/srctools/include/ResamplerStage.h +++ b/src/sound/munt/srchelper/srctools/include/ResamplerStage.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/srctools/include/SincResampler.h b/src/sound/munt/srchelper/srctools/include/SincResampler.h index bac844043..8db9f5bb9 100644 --- a/src/sound/munt/srchelper/srctools/include/SincResampler.h +++ b/src/sound/munt/srchelper/srctools/include/SincResampler.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/srctools/src/FIRResampler.cpp b/src/sound/munt/srchelper/srctools/src/FIRResampler.cpp index b5ab5585c..0df8acd16 100644 --- a/src/sound/munt/srchelper/srctools/src/FIRResampler.cpp +++ b/src/sound/munt/srchelper/srctools/src/FIRResampler.cpp @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/srctools/src/IIR2xResampler.cpp b/src/sound/munt/srchelper/srctools/src/IIR2xResampler.cpp index 98f7a3a5b..a09b48d9e 100644 --- a/src/sound/munt/srchelper/srctools/src/IIR2xResampler.cpp +++ b/src/sound/munt/srchelper/srctools/src/IIR2xResampler.cpp @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/srctools/src/LinearResampler.cpp b/src/sound/munt/srchelper/srctools/src/LinearResampler.cpp index 1ca143a38..18224833b 100644 --- a/src/sound/munt/srchelper/srctools/src/LinearResampler.cpp +++ b/src/sound/munt/srchelper/srctools/src/LinearResampler.cpp @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/srctools/src/ResamplerModel.cpp b/src/sound/munt/srchelper/srctools/src/ResamplerModel.cpp index 2a7f75822..504024629 100644 --- a/src/sound/munt/srchelper/srctools/src/ResamplerModel.cpp +++ b/src/sound/munt/srchelper/srctools/src/ResamplerModel.cpp @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/sound/munt/srchelper/srctools/src/SincResampler.cpp b/src/sound/munt/srchelper/srctools/src/SincResampler.cpp index 60a18256c..de9048093 100644 --- a/src/sound/munt/srchelper/srctools/src/SincResampler.cpp +++ b/src/sound/munt/srchelper/srctools/src/SincResampler.cpp @@ -1,4 +1,4 @@ -/* Copyright (C) 2015-2020 Sergey V. Mikayev +/* Copyright (C) 2015-2022 Sergey V. Mikayev * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU Lesser General Public License as published by diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 75b847dde..e072adadc 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -397,7 +397,7 @@ endif ifeq ($(MUNT), y) OPTS += -DUSE_MUNT MUNTOBJ := midi_mt32.o \ - Analog.o BReverbModel.o File.o FileStream.o LA32Ramp.o \ + Analog.o BReverbModel.o Display.o File.o FileStream.o LA32Ramp.o \ LA32FloatWaveGenerator.o LA32WaveGenerator.o \ MidiStreamParser.o Part.o Partial.o PartialManager.o \ Poly.o ROMInfo.o SampleRateConverter.o \ From 08722ffdf51b65ae5ac5c24f10589c48c3fa6e89 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Fri, 29 Jul 2022 14:46:54 +0600 Subject: [PATCH 185/386] qt: Fix black screen when switching between renderers --- src/qt/qt_rendererstack.cpp | 53 +++++++++++++++++++++++-------------- src/qt/qt_rendererstack.hpp | 5 +++- 2 files changed, 37 insertions(+), 21 deletions(-) diff --git a/src/qt/qt_rendererstack.cpp b/src/qt/qt_rendererstack.cpp index fab20b5b7..ef415a82c 100644 --- a/src/qt/qt_rendererstack.cpp +++ b/src/qt/qt_rendererstack.cpp @@ -237,28 +237,40 @@ RendererStack::switchRenderer(Renderer renderer) { startblit(); if (current) { - rendererWindow->finalize(); - if (rendererWindow->hasBlitFunc()) { - while (directBlitting) {} - connect(this, &RendererStack::blit, this, &RendererStack::blitDummy, Qt::DirectConnection); - disconnect(this, &RendererStack::blit, this, &RendererStack::blitRenderer); + if ((current_vid_api == Renderer::Direct3D9 && renderer != Renderer::Direct3D9) + || (current_vid_api != Renderer::Direct3D9 && renderer == Renderer::Direct3D9)) { + rendererWindow->finalize(); + if (rendererWindow->hasBlitFunc()) { + while (directBlitting) {} + connect(this, &RendererStack::blit, this, &RendererStack::blitDummy, Qt::DirectConnection); + disconnect(this, &RendererStack::blit, this, &RendererStack::blitRenderer); + } else { + connect(this, &RendererStack::blit, this, &RendererStack::blitDummy, Qt::DirectConnection); + disconnect(this, &RendererStack::blit, this, &RendererStack::blitCommon); + } + + removeWidget(current.get()); + disconnect(this, &RendererStack::blitToRenderer, nullptr, nullptr); + + /* Create new renderer only after previous is destroyed! */ + connect(current.get(), &QObject::destroyed, [this, renderer](QObject *) { + createRenderer(renderer); + disconnect(this, &RendererStack::blit, this, &RendererStack::blitDummy); + blitDummied = false; + QTimer::singleShot(1000, this, [this]() { this->blitDummied = false; } ); + }); + + rendererWindow->hasBlitFunc() ? current.reset() : current.release()->deleteLater(); } else { - connect(this, &RendererStack::blit, this, &RendererStack::blitDummy, Qt::DirectConnection); - disconnect(this, &RendererStack::blit, this, &RendererStack::blitCommon); + rendererWindow->finalize(); + removeWidget(current.get()); + disconnect(this, &RendererStack::blitToRenderer, nullptr, nullptr); + + /* Create new renderer only after previous is destroyed! */ + connect(current.get(), &QObject::destroyed, [this, renderer](QObject *) { createRenderer(renderer); }); + + current.release()->deleteLater(); } - - removeWidget(current.get()); - disconnect(this, &RendererStack::blitToRenderer, nullptr, nullptr); - - /* Create new renderer only after previous is destroyed! */ - connect(current.get(), &QObject::destroyed, [this, renderer](QObject *) { - createRenderer(renderer); - disconnect(this, &RendererStack::blit, this, &RendererStack::blitDummy); - blitDummied = false; - QTimer::singleShot(1000, this, [this]() { this->blitDummied = false; } ); - }); - - rendererWindow->hasBlitFunc() ? current.reset() : current.release()->deleteLater(); } else { createRenderer(renderer); } @@ -267,6 +279,7 @@ RendererStack::switchRenderer(Renderer renderer) void RendererStack::createRenderer(Renderer renderer) { + current_vid_api = renderer; switch (renderer) { default: case Renderer::Software: diff --git a/src/qt/qt_rendererstack.hpp b/src/qt/qt_rendererstack.hpp index 72495ec33..6ee1a0433 100644 --- a/src/qt/qt_rendererstack.hpp +++ b/src/qt/qt_rendererstack.hpp @@ -47,7 +47,8 @@ public: OpenGLES, OpenGL3, Vulkan, - Direct3D9 + Direct3D9, + None = -1 }; void switchRenderer(Renderer renderer); @@ -96,6 +97,8 @@ private: int isMouseDown = 0; int m_monitor_index = 0; + Renderer current_vid_api = Renderer::None; + std::vector> imagebufs; RendererCommon *rendererWindow { nullptr }; From 67a2d987ea1dee0db4ee0dbd77e5316fa08787ea Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Fri, 29 Jul 2022 16:56:48 +0600 Subject: [PATCH 186/386] unix: Fix compilation --- src/unix/unix.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/unix/unix.c b/src/unix/unix.c index 9185fae47..598eb9acc 100644 --- a/src/unix/unix.c +++ b/src/unix/unix.c @@ -36,6 +36,7 @@ #include <86box/unix_sdl.h> #include <86box/timer.h> #include <86box/nvr.h> +#include <86box/video.h> #include <86box/ui.h> #include <86box/gdbstub.h> @@ -602,7 +603,6 @@ do_stop(void) if (blitreq) { blitreq = 0; - extern void video_blit_complete(); video_blit_complete(); } @@ -611,7 +611,6 @@ do_stop(void) if (blitreq) { blitreq = 0; - extern void video_blit_complete(); video_blit_complete(); } } From 2869f114c26ad2e35240db75ca5929f5f120a2f4 Mon Sep 17 00:00:00 2001 From: richardg867 Date: Fri, 29 Jul 2022 13:03:43 -0300 Subject: [PATCH 187/386] Jenkins: Fall back to stashed data if the node can't reach github --- .ci/Jenkinsfile | 65 +++++++++++++++++++++++++++++-------------------- 1 file changed, 38 insertions(+), 27 deletions(-) diff --git a/.ci/Jenkinsfile b/.ci/Jenkinsfile index efa98b07b..8542e317d 100644 --- a/.ci/Jenkinsfile +++ b/.ci/Jenkinsfile @@ -98,37 +98,48 @@ def gitClone(repository, branch) { /* Clean workspace. */ cleanWs() - /* Use stashes to pass the repository around debian.citadel, as it's known to be faster than git clone there. */ - if (env.NODE_NAME != 'debian.citadel' || env.GIT_STASHED != 'true') { - /* Perform clone/checkout, making sure to update the changelog only once - to avoid inaccurate entries from new commits pushed inbetween clones. */ - def scmVars = checkout poll: true, - changelog: env.GIT_STASHED != 'true', - scm: [$class: 'GitSCM', - branches: [[name: branch]], - userRemoteConfigs: [[url: repository]]] + /* Perform git clone if stashed data isn't available yet, or if + this is not debian.citadel where stash is faster than clone. */ + if (env.GIT_STASHED != 'true' || env.NODE_NAME != 'debian.citadel') { + /* Catch network issues in clone. */ + try { + /* Perform clone/checkout, making sure to update the changelog only once + to avoid inaccurate entries from new commits pushed inbetween clones. */ + def scmVars = checkout(poll: true, + changelog: env.GIT_STASHED != 'true', + scm: [$class: 'GitSCM', + branches: [[name: branch]], + userRemoteConfigs: [[url: repository]]]) - if (env.GIT_COMMIT == null) { - /* Save the current HEAD commit. */ - env.GIT_COMMIT = scmVars.GIT_COMMIT - } else if (env.GIT_COMMIT != scmVars.GIT_COMMIT) { - /* Checkout the commit read from the polling log. */ - if (isUnix()) - sh(returnStatus: true, script: "git checkout ${env.GIT_COMMIT}") - else - bat(returnStatus: true, script: "git checkout ${env.GIT_COMMIT}") - } - println "[-] Using git commit [${env.GIT_COMMIT}]" + if (env.GIT_COMMIT == null) { + /* Save the current HEAD commit. */ + env.GIT_COMMIT = scmVars.GIT_COMMIT + } else if (env.GIT_COMMIT != scmVars.GIT_COMMIT) { + /* Checkout the commit read from the polling log. */ + if (isUnix()) + sh(returnStatus: true, script: "git checkout ${env.GIT_COMMIT}") + else + bat(returnStatus: true, script: "git checkout ${env.GIT_COMMIT}") + } + println "[-] Using git commit [${env.GIT_COMMIT}]" - /* Stash data and mark it as stashed if required. */ - if (env.GIT_STASHED != 'true') { - stash name: 'git', useDefaultExcludes: false - env.GIT_STASHED = 'true' + /* Stash data if required, marking it as stashed. */ + if (env.GIT_STASHED != 'true') { + stash(name: 'git', useDefaultExcludes: false) + env.GIT_STASHED = 'true' + } + + /* No need to use stashed data. */ + return; + } catch (e) { + /* If clone fails, use stashed data if available, or re-throw exception otherwise. */ + if (env.GIT_STASHED != 'true') + throw e; } - } else { - /* Unstash data. */ - unstash name: 'git' } + + /* Unstash data. */ + unstash(name: 'git') } def removeDir(dir) { From d671b95d3eb24d6fd217f1b20040c497d914e134 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sat, 30 Jul 2022 00:09:09 +0600 Subject: [PATCH 188/386] qt: Fix separators not showing up on macOS --- src/qt/qt_mainwindow.cpp | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 0725d21a4..3fe6aa883 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -525,6 +525,23 @@ MainWindow::MainWindow(QWidget *parent) : connect(this, &MainWindow::initRendererMonitorForNonQtThread, this, &MainWindow::initRendererMonitorSlot, Qt::BlockingQueuedConnection); connect(this, &MainWindow::destroyRendererMonitor, this, &MainWindow::destroyRendererMonitorSlot); connect(this, &MainWindow::destroyRendererMonitorForNonQtThread, this, &MainWindow::destroyRendererMonitorSlot, Qt::BlockingQueuedConnection); + +#ifdef Q_OS_MACOS + QTimer::singleShot(0, this, [this] () { + for (auto curObj : this->menuBar()->children()) { + if (qobject_cast(curObj)) { + auto menu = qobject_cast(curObj); + menu->setSeparatorsCollapsible(false); + for (auto curObj2 : menu->children()) { + if (qobject_cast(curObj2)) { + auto menu2 = qobject_cast(curObj2); + menu2->setSeparatorsCollapsible(false); + } + } + } + } + }); +#endif } void MainWindow::closeEvent(QCloseEvent *event) { From 0bd6e90da41773430a3e85bb118a8df9122cff01 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sat, 30 Jul 2022 00:20:22 +0600 Subject: [PATCH 189/386] Add IRQ selection for MPU-IMC This existed in later revisions of the card in real hardware --- src/sound/snd_mpu401.c | 40 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/src/sound/snd_mpu401.c b/src/sound/snd_mpu401.c index 6ee107923..cb442032c 100644 --- a/src/sound/snd_mpu401.c +++ b/src/sound/snd_mpu401.c @@ -1784,7 +1784,9 @@ mpu401_standalone_init(const device_t *info) mpu->pos_regs[0] = 0x0F; mpu->pos_regs[1] = 0x6C; base = 0; /* Tell mpu401_init() that this is the MCA variant. */ - irq = 2; /* According to @6c0f.adf, the IRQ is fixed to 2. */ + /* According to @6c0f.adf, the IRQ is supposed to be fixed to 2. + This is only true for earlier models. Later ones have selectable IRQ. */ + irq = device_get_config_int("irq"); } else { base = device_get_config_hex16("base"); irq = device_get_config_int("irq"); @@ -1901,6 +1903,42 @@ static const device_config_t mpu401_standalone_config[] = { static const device_config_t mpu401_standalone_mca_config[] = { // clang-format off + { + .name = "irq", + .description = "MPU-401 IRQ", + .type = CONFIG_SELECTION, + .default_string = "", + .default_int = 9, + .file_filter = "", + .spinner = { 0 }, + .selection = { + { + .description = "IRQ 3", + .value = 3 + }, + { + .description = "IRQ 4", + .value = 4 + }, + { + .description = "IRQ 5", + .value = 5 + }, + { + .description = "IRQ 6", + .value = 6 + }, + { + .description = "IRQ 7", + .value = 7 + }, + { + .description = "IRQ 9", + .value = 9 + }, + { .description = "" } + } + }, { .name = "receive_input", .description = "Receive input", From 2ad0c27f7190e5a03a07c465f0e3ead2ec53ebad Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sat, 30 Jul 2022 00:38:51 +0600 Subject: [PATCH 190/386] qt: Fix fullscreen at start with Direct3D 9 renderer --- src/qt/qt_mainwindow.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 0725d21a4..8c1563242 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -470,7 +470,7 @@ MainWindow::MainWindow(QWidget *parent) : video_setblit(qt_blit); if (start_in_fullscreen) { - connect(ui->stackedWidget, &RendererStack::blitToRenderer, this, [this] () { + connect(ui->stackedWidget, &RendererStack::blit, this, [this] () { if (start_in_fullscreen) { QTimer::singleShot(100, ui->actionFullscreen, &QAction::trigger); start_in_fullscreen = 0; From f5bc5f47397eca769c35c7c874654b71c36416e3 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sat, 30 Jul 2022 01:45:08 +0600 Subject: [PATCH 191/386] qt: Fix fullscreen crashes on NVIDIA GPUs --- src/qt/qt_mainwindow.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 8c1563242..dc02f5030 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -1467,6 +1467,7 @@ void MainWindow::on_actionFullscreen_triggered() { ui->statusbar->hide(); ui->toolBar->hide(); showFullScreen(); + if (vid_api == 5) ui->stackedWidget->switchRenderer(RendererStack::Renderer::Direct3D9); } ui->stackedWidget->onResize(width(), height()); } From 4e3e4355c76b29a42c6ab8a116f2f04a1c4283f7 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sat, 30 Jul 2022 01:53:32 +0600 Subject: [PATCH 192/386] Fix D3D9 for real --- src/qt/qt_mainwindow.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index dc02f5030..350057a1a 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -1433,7 +1433,7 @@ void MainWindow::processMacKeyboardInput(bool down, const QKeyEvent* event) { void MainWindow::on_actionFullscreen_triggered() { if (video_fullscreen > 0) { showNormal(); - if (vid_api == 5) ui->stackedWidget->switchRenderer(RendererStack::Renderer::Direct3D9); + if (vid_api == 5) QTimer::singleShot(0, this, [this] () { ui->stackedWidget->switchRenderer(RendererStack::Renderer::Direct3D9); }); ui->menubar->show(); if (!hide_status_bar) ui->statusbar->show(); if (!hide_tool_bar) ui->toolBar->show(); @@ -1467,7 +1467,7 @@ void MainWindow::on_actionFullscreen_triggered() { ui->statusbar->hide(); ui->toolBar->hide(); showFullScreen(); - if (vid_api == 5) ui->stackedWidget->switchRenderer(RendererStack::Renderer::Direct3D9); + if (vid_api == 5) QTimer::singleShot(0, this, [this] () { ui->stackedWidget->switchRenderer(RendererStack::Renderer::Direct3D9); }); } ui->stackedWidget->onResize(width(), height()); } From 94c84b299d6b9c58b01bfd07b2d9f6a2be4f04d6 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sat, 30 Jul 2022 14:38:02 +0600 Subject: [PATCH 193/386] qt: Fix hide toggles on resizable main window --- src/qt/qt_mainwindow.cpp | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 7da72e569..017e19ee3 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -1474,7 +1474,7 @@ void MainWindow::on_actionFullscreen_triggered() { questionbox.exec(); config_save(); - /* (re-capture mouse after dialog. */ + /* (re-capture mouse after dialog). */ if (wasCaptured) emit setMouseCapture(true); } @@ -1915,6 +1915,8 @@ void MainWindow::on_actionHiDPI_scaling_triggered() void MainWindow::on_actionHide_status_bar_triggered() { + auto w = ui->stackedWidget->width(); + auto h = ui->stackedWidget->height(); hide_status_bar ^= 1; ui->actionHide_status_bar->setChecked(hide_status_bar); statusBar()->setVisible(!hide_status_bar); @@ -1926,13 +1928,16 @@ void MainWindow::on_actionHide_status_bar_triggered() } else { int vid_resize_orig = vid_resize; vid_resize = 0; - emit resizeContents(monitors[0].mon_scrnsz_x, monitors[0].mon_scrnsz_y); + emit resizeContents(w, h); vid_resize = vid_resize_orig; + if (vid_resize == 1) setFixedSize(QWIDGETSIZE_MAX, QWIDGETSIZE_MAX); } } void MainWindow::on_actionHide_tool_bar_triggered() { + auto w = ui->stackedWidget->width(); + auto h = ui->stackedWidget->height(); hide_tool_bar ^= 1; ui->actionHide_tool_bar->setChecked(hide_tool_bar); ui->toolBar->setVisible(!hide_tool_bar); @@ -1944,8 +1949,9 @@ void MainWindow::on_actionHide_tool_bar_triggered() } else { int vid_resize_orig = vid_resize; vid_resize = 0; - emit resizeContents(monitors[0].mon_scrnsz_x, monitors[0].mon_scrnsz_y); + emit resizeContents(w, h); vid_resize = vid_resize_orig; + if (vid_resize == 1) setFixedSize(QWIDGETSIZE_MAX, QWIDGETSIZE_MAX); } } From 313b2ab8523beabea87229505ec1abab61c04dbe Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sat, 30 Jul 2022 14:38:44 +0600 Subject: [PATCH 194/386] qt: Properly display tertiary/quarternary IDE toggle in Settings --- src/qt/qt_settingsstoragecontrollers.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/qt/qt_settingsstoragecontrollers.cpp b/src/qt/qt_settingsstoragecontrollers.cpp index 114654340..54016ad24 100644 --- a/src/qt/qt_settingsstoragecontrollers.cpp +++ b/src/qt/qt_settingsstoragecontrollers.cpp @@ -161,6 +161,8 @@ void SettingsStorageControllers::onCurrentMachineChanged(int machineId) { int is_at = IS_AT(machineId); ui->checkBoxTertiaryIDE->setEnabled(is_at > 0); ui->checkBoxQuaternaryIDE->setEnabled(is_at > 0); + ui->checkBoxTertiaryIDE->setChecked(ui->checkBoxTertiaryIDE->isEnabled() && ide_ter_enabled); + ui->checkBoxQuaternaryIDE->setChecked(ui->checkBoxQuaternaryIDE->isEnabled() && ide_ter_enabled); } void SettingsStorageControllers::on_comboBoxHD_currentIndexChanged(int index) { From e6cfdf4f6991d4d36d3d2e29ae4cdbb9173cc7d6 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sat, 30 Jul 2022 14:42:23 +0600 Subject: [PATCH 195/386] config: Save and load cassette toggle properly --- src/config.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/config.c b/src/config.c index 8d488936e..84645fa4f 100644 --- a/src/config.c +++ b/src/config.c @@ -2767,7 +2767,7 @@ save_storage_controllers(void) delete_section_if_empty(cat); - if (cassette_enable == 1) + if (cassette_enable == 0) config_delete_var(cat, "cassette_enabled"); else config_set_int(cat, "cassette_enabled", cassette_enable); From 180682aa363f536e9f2f332ce046868640784268 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sat, 30 Jul 2022 15:46:44 +0600 Subject: [PATCH 196/386] Fix mislabled variable reference Co-authored-by: Alexander Babikov <2708460+lemondrops@users.noreply.github.com> --- src/qt/qt_settingsstoragecontrollers.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_settingsstoragecontrollers.cpp b/src/qt/qt_settingsstoragecontrollers.cpp index 54016ad24..7664fdd5f 100644 --- a/src/qt/qt_settingsstoragecontrollers.cpp +++ b/src/qt/qt_settingsstoragecontrollers.cpp @@ -162,7 +162,7 @@ void SettingsStorageControllers::onCurrentMachineChanged(int machineId) { ui->checkBoxTertiaryIDE->setEnabled(is_at > 0); ui->checkBoxQuaternaryIDE->setEnabled(is_at > 0); ui->checkBoxTertiaryIDE->setChecked(ui->checkBoxTertiaryIDE->isEnabled() && ide_ter_enabled); - ui->checkBoxQuaternaryIDE->setChecked(ui->checkBoxQuaternaryIDE->isEnabled() && ide_ter_enabled); + ui->checkBoxQuaternaryIDE->setChecked(ui->checkBoxQuaternaryIDE->isEnabled() && ide_qua_enabled); } void SettingsStorageControllers::on_comboBoxHD_currentIndexChanged(int index) { From 7aec47583d12246f140371c30cb8f4f9c34737ac Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sat, 30 Jul 2022 17:14:03 +0200 Subject: [PATCH 197/386] ESDI MCA: implement HDD timings and fix status icon updating (#2538) * esdi_mca: clang-format * esdi_mca: implement hdd timings * esdi_mca: fix drive status icon updating --- src/disk/hdc_esdi_mca.c | 1597 ++++++++++++++++++++------------------- 1 file changed, 811 insertions(+), 786 deletions(-) diff --git a/src/disk/hdc_esdi_mca.c b/src/disk/hdc_esdi_mca.c index e0859697f..72db74359 100644 --- a/src/disk/hdc_esdi_mca.c +++ b/src/disk/hdc_esdi_mca.c @@ -60,12 +60,14 @@ * Copyright 2008-2018 Sarah Walker. * Copyright 2017,2018 Fred N. van Kempen. */ + #include #include #include #include #include #include +#include #define HAVE_STDARG_H #include <86box/86box.h> #include <86box/device.h> @@ -80,19 +82,16 @@ #include <86box/hdc.h> #include <86box/hdd.h> - /* These are hardwired. */ -#define ESDI_IOADDR_PRI 0x3510 -#define ESDI_IOADDR_SEC 0x3518 -#define ESDI_IRQCHAN 14 +#define ESDI_IOADDR_PRI 0x3510 +#define ESDI_IOADDR_SEC 0x3518 +#define ESDI_IRQCHAN 14 -#define BIOS_FILE_L "roms/hdd/esdi/90x8969.bin" -#define BIOS_FILE_H "roms/hdd/esdi/90x8970.bin" - - -#define ESDI_TIME 512 -#define CMD_ADAPTER 0 +#define BIOS_FILE_L "roms/hdd/esdi/90x8969.bin" +#define BIOS_FILE_H "roms/hdd/esdi/90x8970.bin" +#define ESDI_TIME 512.0 +#define CMD_ADAPTER 0 typedef struct esdi_drive_t { int spt, hpc; @@ -103,128 +102,123 @@ typedef struct esdi_drive_t { } drive_t; typedef struct esdi_t { - int8_t dma; + int8_t dma; - uint32_t bios; - rom_t bios_rom; + uint32_t bios; + rom_t bios_rom; - uint8_t basic_ctrl; - uint8_t status; - uint8_t irq_status; - int irq_in_progress; - int cmd_req_in_progress; - int cmd_pos; - uint16_t cmd_data[4]; - int cmd_dev; + uint8_t basic_ctrl; + uint8_t status; + uint8_t irq_status; + int irq_in_progress; + int cmd_req_in_progress; + int cmd_pos; + uint16_t cmd_data[4]; + int cmd_dev; - int status_pos, - status_len; + int status_pos, + status_len; - uint16_t status_data[256]; + uint16_t status_data[256]; - int data_pos; - uint16_t data[256]; + int data_pos; + uint16_t data[256]; - uint16_t sector_buffer[256][256]; + uint16_t sector_buffer[256][256]; - int sector_pos; - int sector_count; + int sector_pos; + int sector_count; - int command; - int cmd_state; + int command; + int cmd_state; - int in_reset; - uint64_t callback; - pc_timer_t timer; + int in_reset; + pc_timer_t timer; - uint32_t rba; + uint32_t rba; struct { int req_in_progress; - } cmds[3]; + } cmds[3]; - drive_t drives[2]; + drive_t drives[2]; - uint8_t pos_regs[8]; + uint8_t pos_regs[8]; } esdi_t; -#define STATUS_DMA_ENA (1 << 7) -#define STATUS_IRQ_PENDING (1 << 6) -#define STATUS_CMD_IN_PROGRESS (1 << 5) -#define STATUS_BUSY (1 << 4) -#define STATUS_STATUS_OUT_FULL (1 << 3) -#define STATUS_CMD_IR_FULL (1 << 2) -#define STATUS_TRANSFER_REQ (1 << 1) -#define STATUS_IRQ (1 << 0) +#define STATUS_DMA_ENA (1 << 7) +#define STATUS_IRQ_PENDING (1 << 6) +#define STATUS_CMD_IN_PROGRESS (1 << 5) +#define STATUS_BUSY (1 << 4) +#define STATUS_STATUS_OUT_FULL (1 << 3) +#define STATUS_CMD_IR_FULL (1 << 2) +#define STATUS_TRANSFER_REQ (1 << 1) +#define STATUS_IRQ (1 << 0) -#define CTRL_RESET (1 << 7) -#define CTRL_DMA_ENA (1 << 1) -#define CTRL_IRQ_ENA (1 << 0) +#define CTRL_RESET (1 << 7) +#define CTRL_DMA_ENA (1 << 1) +#define CTRL_IRQ_ENA (1 << 0) -#define IRQ_HOST_ADAPTER (7 << 5) -#define IRQ_DEVICE_0 (0 << 5) -#define IRQ_CMD_COMPLETE_SUCCESS 0x1 -#define IRQ_RESET_COMPLETE 0xa -#define IRQ_DATA_TRANSFER_READY 0xb -#define IRQ_CMD_COMPLETE_FAILURE 0xc +#define IRQ_HOST_ADAPTER (7 << 5) +#define IRQ_DEVICE_0 (0 << 5) +#define IRQ_CMD_COMPLETE_SUCCESS 0x1 +#define IRQ_RESET_COMPLETE 0xa +#define IRQ_DATA_TRANSFER_READY 0xb +#define IRQ_CMD_COMPLETE_FAILURE 0xc -#define ATTN_DEVICE_SEL (7 << 5) -#define ATTN_HOST_ADAPTER (7 << 5) -#define ATTN_DEVICE_0 (0 << 5) -#define ATTN_DEVICE_1 (1 << 5) -#define ATTN_REQ_MASK 0x0f -#define ATTN_CMD_REQ 1 -#define ATTN_EOI 2 -#define ATTN_RESET 4 +#define ATTN_DEVICE_SEL (7 << 5) +#define ATTN_HOST_ADAPTER (7 << 5) +#define ATTN_DEVICE_0 (0 << 5) +#define ATTN_DEVICE_1 (1 << 5) +#define ATTN_REQ_MASK 0x0f +#define ATTN_CMD_REQ 1 +#define ATTN_EOI 2 +#define ATTN_RESET 4 -#define CMD_SIZE_4 (1 << 14) +#define CMD_SIZE_4 (1 << 14) -#define CMD_DEVICE_SEL (7 << 5) -#define CMD_MASK 0x1f -#define CMD_READ 0x01 -#define CMD_WRITE 0x02 -#define CMD_READ_VERIFY 0x03 -#define CMD_WRITE_VERIFY 0x04 -#define CMD_SEEK 0x05 -#define CMD_GET_DEV_STATUS 0x08 -#define CMD_GET_DEV_CONFIG 0x09 -#define CMD_GET_POS_INFO 0x0a -#define CMD_FORMAT_UNIT 0x16 -#define CMD_FORMAT_PREPARE 0x17 +#define CMD_DEVICE_SEL (7 << 5) +#define CMD_MASK 0x1f +#define CMD_READ 0x01 +#define CMD_WRITE 0x02 +#define CMD_READ_VERIFY 0x03 +#define CMD_WRITE_VERIFY 0x04 +#define CMD_SEEK 0x05 +#define CMD_GET_DEV_STATUS 0x08 +#define CMD_GET_DEV_CONFIG 0x09 +#define CMD_GET_POS_INFO 0x0a +#define CMD_FORMAT_UNIT 0x16 +#define CMD_FORMAT_PREPARE 0x17 -#define STATUS_LEN(x) ((x) << 8) -#define STATUS_DEVICE(x) ((x) << 5) +#define STATUS_LEN(x) ((x) << 8) +#define STATUS_DEVICE(x) ((x) << 5) #define STATUS_DEVICE_HOST_ADAPTER (7 << 5) - #ifdef ENABLE_ESDI_MCA_LOG int esdi_mca_do_log = ENABLE_ESDI_MCA_LOG; - static void esdi_mca_log(const char *fmt, ...) { va_list ap; if (esdi_mca_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define esdi_mca_log(fmt, ...) +# define esdi_mca_log(fmt, ...) #endif - static __inline void set_irq(esdi_t *dev) { if (dev->basic_ctrl & CTRL_IRQ_ENA) - picint(1 << 14); + picint(1 << 14); } - static __inline void clear_irq(esdi_t *dev) { @@ -232,26 +226,30 @@ clear_irq(esdi_t *dev) } static void -esdi_mca_set_callback(esdi_t *dev, uint64_t callback) +esdi_mca_set_callback(esdi_t *dev, double callback) { if (!dev) { - return; + return; } if (callback) { - dev->callback = callback; - timer_on_auto(&dev->timer, dev->callback); - } else { - dev->callback = 0; - timer_stop(&dev->timer); - } + timer_on_auto(&dev->timer, callback); + } else { + timer_stop(&dev->timer); + } } +static double +esdi_mca_get_xfer_time(esdi_t *esdi, int size) +{ + /* 390.625 us per sector at 10 Mbit/s = 1280 kB/s. */ + return (3125.0 / 8.0) * (double)size; +} static void cmd_unsupported(esdi_t *dev) { - dev->status_len = 9; + dev->status_len = 9; dev->status_data[0] = dev->command | STATUS_LEN(9) | dev->cmd_dev; dev->status_data[1] = 0x0f03; /*Attention error, command not supported*/ dev->status_data[2] = 0x0002; /*Interface fault*/ @@ -262,17 +260,17 @@ cmd_unsupported(esdi_t *dev) dev->status_data[7] = 0; dev->status_data[8] = 0; - dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; - dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_FAILURE; + dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; + dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_FAILURE; dev->irq_in_progress = 1; set_irq(dev); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); } - static void device_not_present(esdi_t *dev) { - dev->status_len = 9; + dev->status_len = 9; dev->status_data[0] = dev->command | STATUS_LEN(9) | dev->cmd_dev; dev->status_data[1] = 0x0c11; /*Command failed, internal hardware error*/ dev->status_data[2] = 0x000b; /*Selection error*/ @@ -283,17 +281,17 @@ device_not_present(esdi_t *dev) dev->status_data[7] = 0; dev->status_data[8] = 0; - dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; - dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_FAILURE; + dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; + dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_FAILURE; dev->irq_in_progress = 1; set_irq(dev); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); } - static void rba_out_of_range(esdi_t *dev) { - dev->status_len = 9; + dev->status_len = 9; dev->status_data[0] = dev->command | STATUS_LEN(9) | dev->cmd_dev; dev->status_data[1] = 0x0e01; /*Command block error, invalid parameter*/ dev->status_data[2] = 0x0007; /*RBA out of range*/ @@ -304,834 +302,863 @@ rba_out_of_range(esdi_t *dev) dev->status_data[7] = 0; dev->status_data[8] = 0; - dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; - dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_FAILURE; + dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; + dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_FAILURE; dev->irq_in_progress = 1; set_irq(dev); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); } - static void complete_command_status(esdi_t *dev) { dev->status_len = 7; if (dev->cmd_dev == ATTN_DEVICE_0) - dev->status_data[0] = CMD_READ | STATUS_LEN(7) | STATUS_DEVICE(0); + dev->status_data[0] = CMD_READ | STATUS_LEN(7) | STATUS_DEVICE(0); else - dev->status_data[0] = CMD_READ | STATUS_LEN(7) | STATUS_DEVICE(1); - dev->status_data[1] = 0x0000; /*Error bits*/ - dev->status_data[2] = 0x1900; /*Device status*/ - dev->status_data[3] = 0; /*Number of blocks left to do*/ - dev->status_data[4] = (dev->rba-1) & 0xffff; /*Last RBA processed*/ - dev->status_data[5] = (dev->rba-1) >> 8; + dev->status_data[0] = CMD_READ | STATUS_LEN(7) | STATUS_DEVICE(1); + dev->status_data[1] = 0x0000; /*Error bits*/ + dev->status_data[2] = 0x1900; /*Device status*/ + dev->status_data[3] = 0; /*Number of blocks left to do*/ + dev->status_data[4] = (dev->rba - 1) & 0xffff; /*Last RBA processed*/ + dev->status_data[5] = (dev->rba - 1) >> 8; dev->status_data[6] = 0; /*Number of blocks requiring error recovery*/ + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); } -#define ESDI_ADAPTER_ONLY() do \ - { \ - if (dev->cmd_dev != ATTN_HOST_ADAPTER) \ - { \ - cmd_unsupported(dev); \ - return; \ - } \ - } while (0) - -#define ESDI_DRIVE_ONLY() do \ - { \ - if (dev->cmd_dev != ATTN_DEVICE_0 && dev->cmd_dev != ATTN_DEVICE_1) \ - { \ - cmd_unsupported(dev); \ - return; \ - } \ - if (dev->cmd_dev == ATTN_DEVICE_0) \ - drive = &dev->drives[0]; \ - else \ - drive = &dev->drives[1]; \ - } while (0) +#define ESDI_ADAPTER_ONLY() \ + do { \ + if (dev->cmd_dev != ATTN_HOST_ADAPTER) { \ + cmd_unsupported(dev); \ + return; \ + } \ + } while (0) +#define ESDI_DRIVE_ONLY() \ + do { \ + if (dev->cmd_dev != ATTN_DEVICE_0 && dev->cmd_dev != ATTN_DEVICE_1) { \ + cmd_unsupported(dev); \ + return; \ + } \ + if (dev->cmd_dev == ATTN_DEVICE_0) \ + drive = &dev->drives[0]; \ + else \ + drive = &dev->drives[1]; \ + } while (0) static void esdi_callback(void *priv) { - esdi_t *dev = (esdi_t *)priv; + esdi_t *dev = (esdi_t *) priv; drive_t *drive; - int val; + int val; + double cmd_time = 0.0; esdi_mca_set_callback(dev, 0); /* If we are returning from a RESET, handle this first. */ if (dev->in_reset) { - dev->in_reset = 0; - dev->status = STATUS_IRQ; - dev->irq_status = IRQ_HOST_ADAPTER | IRQ_RESET_COMPLETE; + dev->in_reset = 0; + dev->status = STATUS_IRQ; + dev->irq_status = IRQ_HOST_ADAPTER | IRQ_RESET_COMPLETE; - return; + return; } switch (dev->command) { - case CMD_READ: - ESDI_DRIVE_ONLY(); + case CMD_READ: + ESDI_DRIVE_ONLY(); - if (! drive->present) { - device_not_present(dev); + if (!drive->present) { + device_not_present(dev); + return; + } + + switch (dev->cmd_state) { + case 0: + dev->rba = (dev->cmd_data[2] | (dev->cmd_data[3] << 16)) & 0x0fffffff; + + dev->sector_pos = 0; + dev->sector_count = dev->cmd_data[1]; + + if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) { + rba_out_of_range(dev); return; - } + } - switch (dev->cmd_state) { - case 0: - dev->rba = (dev->cmd_data[2] | (dev->cmd_data[3] << 16)) & 0x0fffffff; + dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ; + dev->irq_status = dev->cmd_dev | IRQ_DATA_TRANSFER_READY; + dev->irq_in_progress = 1; + set_irq(dev); - dev->sector_pos = 0; - dev->sector_count = dev->cmd_data[1]; + dev->cmd_state = 1; + esdi_mca_set_callback(dev, ESDI_TIME); + dev->data_pos = 0; + break; - if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) { - rba_out_of_range(dev); - return; - } - - dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ; - dev->irq_status = dev->cmd_dev | IRQ_DATA_TRANSFER_READY; - dev->irq_in_progress = 1; - set_irq(dev); - - dev->cmd_state = 1; - esdi_mca_set_callback(dev, ESDI_TIME); - dev->data_pos = 0; - break; - - case 1: - if (!(dev->basic_ctrl & CTRL_DMA_ENA)) { - esdi_mca_set_callback(dev, ESDI_TIME); - return; - } - - while (dev->sector_pos < dev->sector_count) { - if (! dev->data_pos) { - if (dev->rba >= drive->sectors) - fatal("Read past end of drive\n"); - hdd_image_read(drive->hdd_num, dev->rba, 1, (uint8_t *)dev->data); - ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1); - } - - while (dev->data_pos < 256) { - val = dma_channel_write(dev->dma, dev->data[dev->data_pos]); - - if (val == DMA_NODATA) { - esdi_mca_set_callback(dev, ESDI_TIME); - return; - } - - dev->data_pos++; - } - - dev->data_pos = 0; - dev->sector_pos++; - dev->rba++; - } - - dev->status = STATUS_CMD_IN_PROGRESS; - dev->cmd_state = 2; - esdi_mca_set_callback(dev, ESDI_TIME); - break; - - case 2: - complete_command_status(dev); - dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; - dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS; - dev->irq_in_progress = 1; - set_irq(dev); - break; - } - break; - - case CMD_WRITE: - case CMD_WRITE_VERIFY: - ESDI_DRIVE_ONLY(); - if (! drive->present) { - device_not_present(dev); + case 1: + if (!(dev->basic_ctrl & CTRL_DMA_ENA)) { + esdi_mca_set_callback(dev, ESDI_TIME); return; - } + } - switch (dev->cmd_state) { - case 0: - dev->rba = (dev->cmd_data[2] | (dev->cmd_data[3] << 16)) & 0x0fffffff; + while (dev->sector_pos < dev->sector_count) { + if (!dev->data_pos) { + if (dev->rba >= drive->sectors) + fatal("Read past end of drive\n"); + hdd_image_read(drive->hdd_num, dev->rba, 1, (uint8_t *) dev->data); + cmd_time += hdd_timing_read(&hdd[drive->hdd_num], dev->rba, 1); + cmd_time += esdi_mca_get_xfer_time(dev, 1); + } - dev->sector_pos = 0; - dev->sector_count = dev->cmd_data[1]; + while (dev->data_pos < 256) { + val = dma_channel_write(dev->dma, dev->data[dev->data_pos]); - if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) { - rba_out_of_range(dev); - return; - } - - dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ; - dev->irq_status = dev->cmd_dev | IRQ_DATA_TRANSFER_READY; - dev->irq_in_progress = 1; - set_irq(dev); - - dev->cmd_state = 1; - esdi_mca_set_callback(dev, ESDI_TIME); - dev->data_pos = 0; - break; - - case 1: - if (! (dev->basic_ctrl & CTRL_DMA_ENA)) { - esdi_mca_set_callback(dev, ESDI_TIME); - return; - } - - while (dev->sector_pos < dev->sector_count) { - while (dev->data_pos < 256) { - val = dma_channel_read(dev->dma); - - if (val == DMA_NODATA) { - esdi_mca_set_callback(dev, ESDI_TIME); - return; - } - - dev->data[dev->data_pos++] = val & 0xffff; - } - - if (dev->rba >= drive->sectors) - fatal("Write past end of drive\n"); - hdd_image_write(drive->hdd_num, dev->rba, 1, (uint8_t *)dev->data); - dev->rba++; - dev->sector_pos++; - ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, - dev->cmd_dev == ATTN_DEVICE_0 ? 0 : 1); - - dev->data_pos = 0; - } - - dev->status = STATUS_CMD_IN_PROGRESS; - dev->cmd_state = 2; - esdi_mca_set_callback(dev, ESDI_TIME); - break; - - case 2: - complete_command_status(dev); - dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; - dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS; - dev->irq_in_progress = 1; - set_irq(dev); - break; - } - break; - - case CMD_READ_VERIFY: - ESDI_DRIVE_ONLY(); - - if (! drive->present) { - device_not_present(dev); - return; - } - - if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) { - rba_out_of_range(dev); - return; - } - - dev->rba += dev->sector_count; - complete_command_status(dev); - dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; - dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS; - dev->irq_in_progress = 1; - set_irq(dev); - break; - - case CMD_SEEK: - ESDI_DRIVE_ONLY(); - - if (! drive->present) { - device_not_present(dev); - return; - } - - complete_command_status(dev); - dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; - dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS; - dev->irq_in_progress = 1; - set_irq(dev); - break; - - case CMD_GET_DEV_STATUS: - ESDI_DRIVE_ONLY(); - - if (! drive->present) { - device_not_present(dev); - return; - } - - if ((dev->status & STATUS_IRQ) || dev->irq_in_progress) - fatal("IRQ in progress %02x %i\n", dev->status, dev->irq_in_progress); - - dev->status_len = 9; - dev->status_data[0] = CMD_GET_DEV_STATUS | STATUS_LEN(9) | STATUS_DEVICE_HOST_ADAPTER; - dev->status_data[1] = 0x0000; /*Error bits*/ - dev->status_data[2] = 0x1900; /*Device status*/ - dev->status_data[3] = 0; /*ESDI Standard Status*/ - dev->status_data[4] = 0; /*ESDI Vendor Unique Status*/ - dev->status_data[5] = 0; - dev->status_data[6] = 0; - dev->status_data[7] = 0; - dev->status_data[8] = 0; - - dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; - dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS; - dev->irq_in_progress = 1; - set_irq(dev); - break; - - case CMD_GET_DEV_CONFIG: - ESDI_DRIVE_ONLY(); - - if (! drive->present) { - device_not_present(dev); - return; - } - - if ((dev->status & STATUS_IRQ) || dev->irq_in_progress) - fatal("IRQ in progress %02x %i\n", dev->status, dev->irq_in_progress); - - dev->status_len = 6; - dev->status_data[0] = CMD_GET_DEV_CONFIG | STATUS_LEN(6) | STATUS_DEVICE_HOST_ADAPTER; - dev->status_data[1] = 0x10; /*Zero defect*/ - dev->status_data[2] = drive->sectors & 0xffff; - dev->status_data[3] = drive->sectors >> 16; - dev->status_data[4] = drive->tracks; - dev->status_data[5] = drive->hpc | (drive->spt << 16); - - esdi_mca_log("CMD_GET_DEV_CONFIG %i %04x %04x %04x %04x %04x %04x\n", - drive->sectors, - dev->status_data[0], dev->status_data[1], - dev->status_data[2], dev->status_data[3], - dev->status_data[4], dev->status_data[5]); - - dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; - dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS; - dev->irq_in_progress = 1; - set_irq(dev); - break; - - case CMD_GET_POS_INFO: - ESDI_ADAPTER_ONLY(); - - if ((dev->status & STATUS_IRQ) || dev->irq_in_progress) - fatal("IRQ in progress %02x %i\n", dev->status, dev->irq_in_progress); - - dev->status_len = 5; - dev->status_data[0] = CMD_GET_POS_INFO | STATUS_LEN(5) | STATUS_DEVICE_HOST_ADAPTER; - dev->status_data[1] = 0xffdd; /*MCA ID*/ - dev->status_data[2] = dev->pos_regs[3] | - (dev->pos_regs[2] << 8); - dev->status_data[3] = 0xff; - dev->status_data[4] = 0xff; - - dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; - dev->irq_status = IRQ_HOST_ADAPTER | IRQ_CMD_COMPLETE_SUCCESS; - dev->irq_in_progress = 1; - set_irq(dev); - break; - - case 0x10: - ESDI_ADAPTER_ONLY(); - switch (dev->cmd_state) { - case 0: - dev->sector_pos = 0; - dev->sector_count = dev->cmd_data[1]; - if (dev->sector_count > 256) - fatal("Write sector buffer count %04x\n", dev->cmd_data[1]); - - dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ; - dev->irq_status = IRQ_HOST_ADAPTER | IRQ_DATA_TRANSFER_READY; - dev->irq_in_progress = 1; - set_irq(dev); - - dev->cmd_state = 1; - esdi_mca_set_callback(dev, ESDI_TIME); - dev->data_pos = 0; - break; - - case 1: - if (! (dev->basic_ctrl & CTRL_DMA_ENA)) { - esdi_mca_set_callback(dev, ESDI_TIME); - return; - } - while (dev->sector_pos < dev->sector_count) { - while (dev->data_pos < 256) { - val = dma_channel_read(dev->dma); - - if (val == DMA_NODATA) { - esdi_mca_set_callback(dev, ESDI_TIME); - return; - } - - dev->data[dev->data_pos++] = val & 0xffff;; - } - - memcpy(dev->sector_buffer[dev->sector_pos++], dev->data, 512); - dev->data_pos = 0; - } - - dev->status = STATUS_CMD_IN_PROGRESS; - dev->cmd_state = 2; - esdi_mca_set_callback(dev, ESDI_TIME); - break; - - case 2: - dev->status = STATUS_IRQ; - dev->irq_status = IRQ_HOST_ADAPTER | IRQ_CMD_COMPLETE_SUCCESS; - dev->irq_in_progress = 1; - set_irq(dev); - break; - } - break; - - case 0x11: - ESDI_ADAPTER_ONLY(); - switch (dev->cmd_state) { - case 0: - dev->sector_pos = 0; - dev->sector_count = dev->cmd_data[1]; - if (dev->sector_count > 256) - fatal("Read sector buffer count %04x\n", dev->cmd_data[1]); - - dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ; - dev->irq_status = IRQ_HOST_ADAPTER | IRQ_DATA_TRANSFER_READY; - dev->irq_in_progress = 1; - set_irq(dev); - - dev->cmd_state = 1; - esdi_mca_set_callback(dev, ESDI_TIME); - dev->data_pos = 0; - break; - - case 1: - if (! (dev->basic_ctrl & CTRL_DMA_ENA)) { - esdi_mca_set_callback(dev, ESDI_TIME); - return; - } - - while (dev->sector_pos < dev->sector_count) { - if (! dev->data_pos) - memcpy(dev->data, dev->sector_buffer[dev->sector_pos++], 512); - while (dev->data_pos < 256) { - val = dma_channel_write(dev->dma, dev->data[dev->data_pos]); - - if (val == DMA_NODATA) { - esdi_mca_set_callback(dev, ESDI_TIME); - return; - } - - dev->data_pos++; - } - - dev->data_pos = 0; - } - - dev->status = STATUS_CMD_IN_PROGRESS; - dev->cmd_state = 2; - esdi_mca_set_callback(dev, ESDI_TIME); - break; - - case 2: - dev->status = STATUS_IRQ; - dev->irq_status = IRQ_HOST_ADAPTER | IRQ_CMD_COMPLETE_SUCCESS; - dev->irq_in_progress = 1; - set_irq(dev); - break; - } - break; - - case 0x12: - ESDI_ADAPTER_ONLY(); - if ((dev->status & STATUS_IRQ) || dev->irq_in_progress) - fatal("IRQ in progress %02x %i\n", dev->status, dev->irq_in_progress); - - dev->status_len = 2; - dev->status_data[0] = 0x12 | STATUS_LEN(5) | STATUS_DEVICE_HOST_ADAPTER; - dev->status_data[1] = 0; - - dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; - dev->irq_status = IRQ_HOST_ADAPTER | IRQ_CMD_COMPLETE_SUCCESS; - dev->irq_in_progress = 1; - set_irq(dev); - break; - - case CMD_FORMAT_UNIT: - case CMD_FORMAT_PREPARE: - ESDI_DRIVE_ONLY(); - - if (! drive->present) { - device_not_present(dev); - return; - } - - switch (dev->cmd_state) { - case 0: - dev->rba = (dev->cmd_data[2] | (dev->cmd_data[3] << 16)) & 0x0fffffff; - - dev->sector_count = dev->cmd_data[1]; - - if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) { - rba_out_of_range(dev); - return; + if (val == DMA_NODATA) { + esdi_mca_set_callback(dev, ESDI_TIME + cmd_time); + return; } - dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ; - dev->irq_status = dev->cmd_dev | IRQ_DATA_TRANSFER_READY; - dev->irq_in_progress = 1; - set_irq(dev); + dev->data_pos++; + } - dev->cmd_state = 1; - esdi_mca_set_callback(dev, ESDI_TIME); - break; + dev->data_pos = 0; + dev->sector_pos++; + dev->rba++; + } - case 1: - if (!(dev->basic_ctrl & CTRL_DMA_ENA)) { - esdi_mca_set_callback(dev, ESDI_TIME); - return; + dev->status = STATUS_CMD_IN_PROGRESS; + dev->cmd_state = 2; + esdi_mca_set_callback(dev, cmd_time); + break; + + case 2: + complete_command_status(dev); + dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; + dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS; + dev->irq_in_progress = 1; + set_irq(dev); + break; + } + break; + + case CMD_WRITE: + case CMD_WRITE_VERIFY: + ESDI_DRIVE_ONLY(); + if (!drive->present) { + device_not_present(dev); + return; + } + + switch (dev->cmd_state) { + case 0: + dev->rba = (dev->cmd_data[2] | (dev->cmd_data[3] << 16)) & 0x0fffffff; + + dev->sector_pos = 0; + dev->sector_count = dev->cmd_data[1]; + + if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) { + rba_out_of_range(dev); + return; + } + + dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ; + dev->irq_status = dev->cmd_dev | IRQ_DATA_TRANSFER_READY; + dev->irq_in_progress = 1; + set_irq(dev); + + dev->cmd_state = 1; + esdi_mca_set_callback(dev, ESDI_TIME); + dev->data_pos = 0; + break; + + case 1: + if (!(dev->basic_ctrl & CTRL_DMA_ENA)) { + esdi_mca_set_callback(dev, ESDI_TIME); + return; + } + + while (dev->sector_pos < dev->sector_count) { + while (dev->data_pos < 256) { + val = dma_channel_read(dev->dma); + + if (val == DMA_NODATA) { + esdi_mca_set_callback(dev, ESDI_TIME + cmd_time); + return; } - hdd_image_zero(drive->hdd_num, dev->rba, dev->sector_count); - ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1); + dev->data[dev->data_pos++] = val & 0xffff; + } - dev->status = STATUS_CMD_IN_PROGRESS; - dev->cmd_state = 2; - esdi_mca_set_callback(dev, ESDI_TIME); - break; + if (dev->rba >= drive->sectors) + fatal("Write past end of drive\n"); + hdd_image_write(drive->hdd_num, dev->rba, 1, (uint8_t *) dev->data); + cmd_time += hdd_timing_write(&hdd[drive->hdd_num], dev->rba, 1); + cmd_time += esdi_mca_get_xfer_time(dev, 1); + dev->rba++; + dev->sector_pos++; + dev->data_pos = 0; + } - case 2: - complete_command_status(dev); - dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; - dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS; - dev->irq_in_progress = 1; - set_irq(dev); - break; - } - break; + dev->status = STATUS_CMD_IN_PROGRESS; + dev->cmd_state = 2; + esdi_mca_set_callback(dev, cmd_time); + break; - default: - fatal("BAD COMMAND %02x %i\n", dev->command, dev->cmd_dev); + case 2: + complete_command_status(dev); + dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; + dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS; + dev->irq_in_progress = 1; + set_irq(dev); + break; + } + break; + + case CMD_READ_VERIFY: + ESDI_DRIVE_ONLY(); + + if (!drive->present) { + device_not_present(dev); + return; + } + + switch (dev->cmd_state) { + case 0: + dev->rba = (dev->cmd_data[2] | (dev->cmd_data[3] << 16)) & 0x0fffffff; + dev->sector_count = dev->cmd_data[1]; + + if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) { + rba_out_of_range(dev); + return; + } + + cmd_time = hdd_timing_read(&hdd[drive->hdd_num], dev->rba, dev->sector_count); + esdi_mca_set_callback(dev, ESDI_TIME + cmd_time); + dev->cmd_state = 1; + break; + + case 1: + complete_command_status(dev); + dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; + dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS; + dev->irq_in_progress = 1; + set_irq(dev); + break; + } + break; + + case CMD_SEEK: + ESDI_DRIVE_ONLY(); + + if (!drive->present) { + device_not_present(dev); + return; + } + + if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) { + rba_out_of_range(dev); + return; + } + + switch (dev->cmd_state) { + case 0: + dev->rba = (dev->cmd_data[2] | (dev->cmd_data[3] << 16)) & 0x0fffffff; + cmd_time = hdd_seek_get_time(&hdd[drive->hdd_num], dev->rba, HDD_OP_SEEK, 0, 0.0); + esdi_mca_set_callback(dev, ESDI_TIME + cmd_time); + dev->cmd_state = 1; + break; + + case 1: + complete_command_status(dev); + dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; + dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS; + dev->irq_in_progress = 1; + set_irq(dev); + break; + } + break; + + case CMD_GET_DEV_STATUS: + ESDI_DRIVE_ONLY(); + + if (!drive->present) { + device_not_present(dev); + return; + } + + if ((dev->status & STATUS_IRQ) || dev->irq_in_progress) + fatal("IRQ in progress %02x %i\n", dev->status, dev->irq_in_progress); + + dev->status_len = 9; + dev->status_data[0] = CMD_GET_DEV_STATUS | STATUS_LEN(9) | STATUS_DEVICE_HOST_ADAPTER; + dev->status_data[1] = 0x0000; /*Error bits*/ + dev->status_data[2] = 0x1900; /*Device status*/ + dev->status_data[3] = 0; /*ESDI Standard Status*/ + dev->status_data[4] = 0; /*ESDI Vendor Unique Status*/ + dev->status_data[5] = 0; + dev->status_data[6] = 0; + dev->status_data[7] = 0; + dev->status_data[8] = 0; + + dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; + dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS; + dev->irq_in_progress = 1; + set_irq(dev); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; + + case CMD_GET_DEV_CONFIG: + ESDI_DRIVE_ONLY(); + + if (!drive->present) { + device_not_present(dev); + return; + } + + if ((dev->status & STATUS_IRQ) || dev->irq_in_progress) + fatal("IRQ in progress %02x %i\n", dev->status, dev->irq_in_progress); + + dev->status_len = 6; + dev->status_data[0] = CMD_GET_DEV_CONFIG | STATUS_LEN(6) | STATUS_DEVICE_HOST_ADAPTER; + dev->status_data[1] = 0x10; /*Zero defect*/ + dev->status_data[2] = drive->sectors & 0xffff; + dev->status_data[3] = drive->sectors >> 16; + dev->status_data[4] = drive->tracks; + dev->status_data[5] = drive->hpc | (drive->spt << 16); + + esdi_mca_log("CMD_GET_DEV_CONFIG %i %04x %04x %04x %04x %04x %04x\n", + drive->sectors, + dev->status_data[0], dev->status_data[1], + dev->status_data[2], dev->status_data[3], + dev->status_data[4], dev->status_data[5]); + + dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; + dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS; + dev->irq_in_progress = 1; + set_irq(dev); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; + + case CMD_GET_POS_INFO: + ESDI_ADAPTER_ONLY(); + + if ((dev->status & STATUS_IRQ) || dev->irq_in_progress) + fatal("IRQ in progress %02x %i\n", dev->status, dev->irq_in_progress); + + dev->status_len = 5; + dev->status_data[0] = CMD_GET_POS_INFO | STATUS_LEN(5) | STATUS_DEVICE_HOST_ADAPTER; + dev->status_data[1] = 0xffdd; /*MCA ID*/ + dev->status_data[2] = dev->pos_regs[3] | (dev->pos_regs[2] << 8); + dev->status_data[3] = 0xff; + dev->status_data[4] = 0xff; + + dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; + dev->irq_status = IRQ_HOST_ADAPTER | IRQ_CMD_COMPLETE_SUCCESS; + dev->irq_in_progress = 1; + set_irq(dev); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; + + case 0x10: + ESDI_ADAPTER_ONLY(); + switch (dev->cmd_state) { + case 0: + dev->sector_pos = 0; + dev->sector_count = dev->cmd_data[1]; + if (dev->sector_count > 256) + fatal("Write sector buffer count %04x\n", dev->cmd_data[1]); + + dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ; + dev->irq_status = IRQ_HOST_ADAPTER | IRQ_DATA_TRANSFER_READY; + dev->irq_in_progress = 1; + set_irq(dev); + + dev->cmd_state = 1; + esdi_mca_set_callback(dev, ESDI_TIME); + dev->data_pos = 0; + break; + + case 1: + if (!(dev->basic_ctrl & CTRL_DMA_ENA)) { + esdi_mca_set_callback(dev, ESDI_TIME); + return; + } + while (dev->sector_pos < dev->sector_count) { + while (dev->data_pos < 256) { + val = dma_channel_read(dev->dma); + + if (val == DMA_NODATA) { + esdi_mca_set_callback(dev, ESDI_TIME); + return; + } + + dev->data[dev->data_pos++] = val & 0xffff; + ; + } + + memcpy(dev->sector_buffer[dev->sector_pos++], dev->data, 512); + dev->data_pos = 0; + } + + dev->status = STATUS_CMD_IN_PROGRESS; + dev->cmd_state = 2; + esdi_mca_set_callback(dev, ESDI_TIME); + break; + + case 2: + dev->status = STATUS_IRQ; + dev->irq_status = IRQ_HOST_ADAPTER | IRQ_CMD_COMPLETE_SUCCESS; + dev->irq_in_progress = 1; + set_irq(dev); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; + } + break; + + case 0x11: + ESDI_ADAPTER_ONLY(); + switch (dev->cmd_state) { + case 0: + dev->sector_pos = 0; + dev->sector_count = dev->cmd_data[1]; + if (dev->sector_count > 256) + fatal("Read sector buffer count %04x\n", dev->cmd_data[1]); + + dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ; + dev->irq_status = IRQ_HOST_ADAPTER | IRQ_DATA_TRANSFER_READY; + dev->irq_in_progress = 1; + set_irq(dev); + + dev->cmd_state = 1; + esdi_mca_set_callback(dev, ESDI_TIME); + dev->data_pos = 0; + break; + + case 1: + if (!(dev->basic_ctrl & CTRL_DMA_ENA)) { + esdi_mca_set_callback(dev, ESDI_TIME); + return; + } + + while (dev->sector_pos < dev->sector_count) { + if (!dev->data_pos) + memcpy(dev->data, dev->sector_buffer[dev->sector_pos++], 512); + while (dev->data_pos < 256) { + val = dma_channel_write(dev->dma, dev->data[dev->data_pos]); + + if (val == DMA_NODATA) { + esdi_mca_set_callback(dev, ESDI_TIME); + return; + } + + dev->data_pos++; + } + + dev->data_pos = 0; + } + + dev->status = STATUS_CMD_IN_PROGRESS; + dev->cmd_state = 2; + esdi_mca_set_callback(dev, ESDI_TIME); + break; + + case 2: + dev->status = STATUS_IRQ; + dev->irq_status = IRQ_HOST_ADAPTER | IRQ_CMD_COMPLETE_SUCCESS; + dev->irq_in_progress = 1; + set_irq(dev); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; + } + break; + + case 0x12: + ESDI_ADAPTER_ONLY(); + if ((dev->status & STATUS_IRQ) || dev->irq_in_progress) + fatal("IRQ in progress %02x %i\n", dev->status, dev->irq_in_progress); + + dev->status_len = 2; + dev->status_data[0] = 0x12 | STATUS_LEN(5) | STATUS_DEVICE_HOST_ADAPTER; + dev->status_data[1] = 0; + + dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; + dev->irq_status = IRQ_HOST_ADAPTER | IRQ_CMD_COMPLETE_SUCCESS; + dev->irq_in_progress = 1; + set_irq(dev); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; + + case CMD_FORMAT_UNIT: + case CMD_FORMAT_PREPARE: + ESDI_DRIVE_ONLY(); + + if (!drive->present) { + device_not_present(dev); + return; + } + + switch (dev->cmd_state) { + case 0: + dev->rba = (dev->cmd_data[2] | (dev->cmd_data[3] << 16)) & 0x0fffffff; + + dev->sector_count = dev->cmd_data[1]; + + if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) { + rba_out_of_range(dev); + return; + } + + dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ; + dev->irq_status = dev->cmd_dev | IRQ_DATA_TRANSFER_READY; + dev->irq_in_progress = 1; + set_irq(dev); + + dev->cmd_state = 1; + esdi_mca_set_callback(dev, ESDI_TIME); + break; + + case 1: + if (!(dev->basic_ctrl & CTRL_DMA_ENA)) { + esdi_mca_set_callback(dev, ESDI_TIME); + return; + } + + hdd_image_zero(drive->hdd_num, dev->rba, dev->sector_count); + + dev->status = STATUS_CMD_IN_PROGRESS; + dev->cmd_state = 2; + esdi_mca_set_callback(dev, ESDI_TIME); + break; + + case 2: + complete_command_status(dev); + dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; + dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS; + dev->irq_in_progress = 1; + set_irq(dev); + break; + } + break; + + default: + fatal("BAD COMMAND %02x %i\n", dev->command, dev->cmd_dev); } } - static uint8_t esdi_read(uint16_t port, void *priv) { - esdi_t *dev = (esdi_t *)priv; + esdi_t *dev = (esdi_t *) priv; uint8_t ret = 0xff; switch (port & 7) { - case 2: /*Basic status register*/ - ret = dev->status; - break; + case 2: /*Basic status register*/ + ret = dev->status; + break; - case 3: /*IRQ status*/ - dev->status &= ~STATUS_IRQ; - ret = dev->irq_status; - break; + case 3: /*IRQ status*/ + dev->status &= ~STATUS_IRQ; + ret = dev->irq_status; + break; - default: - fatal("esdi_read port=%04x\n", port); + default: + fatal("esdi_read port=%04x\n", port); } - return(ret); + return (ret); } - static void esdi_write(uint16_t port, uint8_t val, void *priv) { - esdi_t *dev = (esdi_t *)priv; + esdi_t *dev = (esdi_t *) priv; esdi_mca_log("ESDI: wr(%04x, %02x)\n", port & 7, val); switch (port & 7) { - case 2: /*Basic control register*/ - if ((dev->basic_ctrl & CTRL_RESET) && !(val & CTRL_RESET)) { - dev->in_reset = 1; - esdi_mca_set_callback(dev, ESDI_TIME * 50); - dev->status = STATUS_BUSY; - } - dev->basic_ctrl = val; + case 2: /*Basic control register*/ + if ((dev->basic_ctrl & CTRL_RESET) && !(val & CTRL_RESET)) { + dev->in_reset = 1; + esdi_mca_set_callback(dev, ESDI_TIME * 50); + dev->status = STATUS_BUSY; + } + dev->basic_ctrl = val; - if (! (dev->basic_ctrl & CTRL_IRQ_ENA)) - picintc(1 << 14); - break; + if (!(dev->basic_ctrl & CTRL_IRQ_ENA)) + picintc(1 << 14); + break; - case 3: /*Attention register*/ - switch (val & ATTN_DEVICE_SEL) { - case ATTN_HOST_ADAPTER: - switch (val & ATTN_REQ_MASK) { - case ATTN_CMD_REQ: - if (dev->cmd_req_in_progress) - fatal("Try to start command on in_progress adapter\n"); - dev->cmd_req_in_progress = 1; - dev->cmd_dev = ATTN_HOST_ADAPTER; - dev->status |= STATUS_BUSY; - dev->cmd_pos = 0; - dev->status_pos = 0; - break; + case 3: /*Attention register*/ + switch (val & ATTN_DEVICE_SEL) { + case ATTN_HOST_ADAPTER: + switch (val & ATTN_REQ_MASK) { + case ATTN_CMD_REQ: + if (dev->cmd_req_in_progress) + fatal("Try to start command on in_progress adapter\n"); + dev->cmd_req_in_progress = 1; + dev->cmd_dev = ATTN_HOST_ADAPTER; + dev->status |= STATUS_BUSY; + dev->cmd_pos = 0; + dev->status_pos = 0; + break; - case ATTN_EOI: - dev->irq_in_progress = 0; - dev->status &= ~STATUS_IRQ; - clear_irq(dev); - break; + case ATTN_EOI: + dev->irq_in_progress = 0; + dev->status &= ~STATUS_IRQ; + clear_irq(dev); + break; - case ATTN_RESET: - dev->in_reset = 1; - esdi_mca_set_callback(dev, ESDI_TIME * 50); - dev->status = STATUS_BUSY; - break; + case ATTN_RESET: + dev->in_reset = 1; + esdi_mca_set_callback(dev, ESDI_TIME * 50); + dev->status = STATUS_BUSY; + break; - default: - fatal("Bad attention request %02x\n", val); - } - break; + default: + fatal("Bad attention request %02x\n", val); + } + break; - case ATTN_DEVICE_0: - switch (val & ATTN_REQ_MASK) { - case ATTN_CMD_REQ: - if (dev->cmd_req_in_progress) - fatal("Try to start command on in_progress device0\n"); - dev->cmd_req_in_progress = 1; - dev->cmd_dev = ATTN_DEVICE_0; - dev->status |= STATUS_BUSY; - dev->cmd_pos = 0; - dev->status_pos = 0; - break; + case ATTN_DEVICE_0: + switch (val & ATTN_REQ_MASK) { + case ATTN_CMD_REQ: + if (dev->cmd_req_in_progress) + fatal("Try to start command on in_progress device0\n"); + dev->cmd_req_in_progress = 1; + dev->cmd_dev = ATTN_DEVICE_0; + dev->status |= STATUS_BUSY; + dev->cmd_pos = 0; + dev->status_pos = 0; + break; - case ATTN_EOI: - dev->irq_in_progress = 0; - dev->status &= ~STATUS_IRQ; - clear_irq(dev); - break; + case ATTN_EOI: + dev->irq_in_progress = 0; + dev->status &= ~STATUS_IRQ; + clear_irq(dev); + break; - default: - fatal("Bad attention request %02x\n", val); - } - break; + default: + fatal("Bad attention request %02x\n", val); + } + break; - case ATTN_DEVICE_1: - switch (val & ATTN_REQ_MASK) { - case ATTN_CMD_REQ: - if (dev->cmd_req_in_progress) - fatal("Try to start command on in_progress device0\n"); - dev->cmd_req_in_progress = 1; - dev->cmd_dev = ATTN_DEVICE_1; - dev->status |= STATUS_BUSY; - dev->cmd_pos = 0; - dev->status_pos = 0; - break; + case ATTN_DEVICE_1: + switch (val & ATTN_REQ_MASK) { + case ATTN_CMD_REQ: + if (dev->cmd_req_in_progress) + fatal("Try to start command on in_progress device0\n"); + dev->cmd_req_in_progress = 1; + dev->cmd_dev = ATTN_DEVICE_1; + dev->status |= STATUS_BUSY; + dev->cmd_pos = 0; + dev->status_pos = 0; + break; - case ATTN_EOI: - dev->irq_in_progress = 0; - dev->status &= ~STATUS_IRQ; - clear_irq(dev); - break; + case ATTN_EOI: + dev->irq_in_progress = 0; + dev->status &= ~STATUS_IRQ; + clear_irq(dev); + break; - default: - fatal("Bad attention request %02x\n", val); - } - break; + default: + fatal("Bad attention request %02x\n", val); + } + break; - default: - fatal("Attention to unknown device %02x\n", val); - } - break; + default: + fatal("Attention to unknown device %02x\n", val); + } + break; - default: - fatal("esdi_write port=%04x val=%02x\n", port, val); + default: + fatal("esdi_write port=%04x val=%02x\n", port, val); } } - static uint16_t esdi_readw(uint16_t port, void *priv) { - esdi_t *dev = (esdi_t *)priv; + esdi_t *dev = (esdi_t *) priv; uint16_t ret = 0xffff; switch (port & 7) { - case 0: /*Status Interface Register*/ - if (dev->status_pos >= dev->status_len) - return(0); - ret = dev->status_data[dev->status_pos++]; if (dev->status_pos >= dev->status_len) { - dev->status &= ~STATUS_STATUS_OUT_FULL; - dev->status_pos = dev->status_len = 0; - } - break; + case 0: /*Status Interface Register*/ + if (dev->status_pos >= dev->status_len) + return (0); + ret = dev->status_data[dev->status_pos++]; + if (dev->status_pos >= dev->status_len) { + dev->status &= ~STATUS_STATUS_OUT_FULL; + dev->status_pos = dev->status_len = 0; + } + break; - default: - fatal("esdi_readw port=%04x\n", port); + default: + fatal("esdi_readw port=%04x\n", port); } - return(ret); + return (ret); } - static void esdi_writew(uint16_t port, uint16_t val, void *priv) { - esdi_t *dev = (esdi_t *)priv; + esdi_t *dev = (esdi_t *) priv; esdi_mca_log("ESDI: wrw(%04x, %04x)\n", port & 7, val); switch (port & 7) { - case 0: /*Command Interface Register*/ - if (dev->cmd_pos >= 4) - fatal("CIR pos 4\n"); - dev->cmd_data[dev->cmd_pos++] = val; - if (((dev->cmd_data[0] & CMD_SIZE_4) && dev->cmd_pos == 4) || - (!(dev->cmd_data[0] & CMD_SIZE_4) && dev->cmd_pos == 2)) { - dev->cmd_pos = 0; - dev->cmd_req_in_progress = 0; - dev->cmd_state = 0; + case 0: /*Command Interface Register*/ + if (dev->cmd_pos >= 4) + fatal("CIR pos 4\n"); + dev->cmd_data[dev->cmd_pos++] = val; + if (((dev->cmd_data[0] & CMD_SIZE_4) && dev->cmd_pos == 4) || (!(dev->cmd_data[0] & CMD_SIZE_4) && dev->cmd_pos == 2)) { + dev->cmd_pos = 0; + dev->cmd_req_in_progress = 0; + dev->cmd_state = 0; - if ((dev->cmd_data[0] & CMD_DEVICE_SEL) != dev->cmd_dev) - fatal("Command device mismatch with attn\n"); - dev->command = dev->cmd_data[0] & CMD_MASK; - esdi_mca_set_callback(dev, ESDI_TIME); - dev->status = STATUS_BUSY; - dev->data_pos = 0; - } - break; + if ((dev->cmd_data[0] & CMD_DEVICE_SEL) != dev->cmd_dev) + fatal("Command device mismatch with attn\n"); + dev->command = dev->cmd_data[0] & CMD_MASK; + esdi_mca_set_callback(dev, ESDI_TIME); + dev->status = STATUS_BUSY; + dev->data_pos = 0; + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1); + } + break; - default: - fatal("esdi_writew port=%04x val=%04x\n", port, val); + default: + fatal("esdi_writew port=%04x val=%04x\n", port, val); } } - static uint8_t esdi_mca_read(int port, void *priv) { - esdi_t *dev = (esdi_t *)priv; + esdi_t *dev = (esdi_t *) priv; esdi_mca_log("ESDI: mcard(%04x)\n", port); - return(dev->pos_regs[port & 7]); + return (dev->pos_regs[port & 7]); } - static void esdi_mca_write(int port, uint8_t val, void *priv) { - esdi_t *dev = (esdi_t *)priv; + esdi_t *dev = (esdi_t *) priv; esdi_mca_log("ESDI: mcawr(%04x, %02x) pos[2]=%02x pos[3]=%02x\n", - port, val, dev->pos_regs[2], dev->pos_regs[3]); + port, val, dev->pos_regs[2], dev->pos_regs[3]); if (port < 0x102) - return; + return; /* Save the new value. */ dev->pos_regs[port & 7] = val; io_removehandler(ESDI_IOADDR_PRI, 8, - esdi_read, esdi_readw, NULL, - esdi_write, esdi_writew, NULL, dev); + esdi_read, esdi_readw, NULL, + esdi_write, esdi_writew, NULL, dev); mem_mapping_disable(&dev->bios_rom.mapping); - switch(dev->pos_regs[2] & 0x3c) { - case 0x14: - dev->dma = 5; - break; - case 0x18: - dev->dma = 6; - break; - case 0x1c: - dev->dma = 7; - break; - case 0x00: - dev->dma = 0; - break; - case 0x04: - dev->dma = 1; - break; - case 0x0c: - dev->dma = 3; - break; - case 0x10: - dev->dma = 4; - break; + switch (dev->pos_regs[2] & 0x3c) { + case 0x14: + dev->dma = 5; + break; + case 0x18: + dev->dma = 6; + break; + case 0x1c: + dev->dma = 7; + break; + case 0x00: + dev->dma = 0; + break; + case 0x04: + dev->dma = 1; + break; + case 0x0c: + dev->dma = 3; + break; + case 0x10: + dev->dma = 4; + break; } if (dev->pos_regs[2] & 1) { - io_sethandler(ESDI_IOADDR_PRI, 8, - esdi_read, esdi_readw, NULL, - esdi_write, esdi_writew, NULL, dev); + io_sethandler(ESDI_IOADDR_PRI, 8, + esdi_read, esdi_readw, NULL, + esdi_write, esdi_writew, NULL, dev); - if (!(dev->pos_regs[3] & 8)) { - mem_mapping_enable(&dev->bios_rom.mapping); - mem_mapping_set_addr(&dev->bios_rom.mapping, - ((dev->pos_regs[3] & 7) * 0x4000) + 0xc0000, 0x4000); - } + if (!(dev->pos_regs[3] & 8)) { + mem_mapping_enable(&dev->bios_rom.mapping); + mem_mapping_set_addr(&dev->bios_rom.mapping, + ((dev->pos_regs[3] & 7) * 0x4000) + 0xc0000, 0x4000); + } - /* Say hello. */ - esdi_mca_log("ESDI: I/O=3510, IRQ=14, DMA=%d, BIOS @%05X\n", - dev->dma, dev->bios); + /* Say hello. */ + esdi_mca_log("ESDI: I/O=3510, IRQ=14, DMA=%d, BIOS @%05X\n", + dev->dma, dev->bios); } } - static uint8_t esdi_mca_feedb(void *priv) { - esdi_t *dev = (esdi_t *)priv; + esdi_t *dev = (esdi_t *) priv; return (dev->pos_regs[2] & 1); } - static void * esdi_init(const device_t *info) { drive_t *drive; - esdi_t *dev; - int c, i; + esdi_t *dev; + int c, i; dev = malloc(sizeof(esdi_t)); - if (dev == NULL) return(NULL); + if (dev == NULL) + return (NULL); memset(dev, 0x00, sizeof(esdi_t)); /* Mark as unconfigured. */ dev->irq_status = 0xff; rom_init_interleaved(&dev->bios_rom, - BIOS_FILE_H, BIOS_FILE_L, - 0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); + BIOS_FILE_H, BIOS_FILE_L, + 0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); mem_mapping_disable(&dev->bios_rom.mapping); dev->drives[0].present = dev->drives[1].present = 0; - for (c=0,i=0; idrives[hdd[i].esdi_channel]; + for (c = 0, i = 0; i < HDD_NUM; i++) { + if ((hdd[i].bus == HDD_BUS_ESDI) && (hdd[i].esdi_channel < ESDI_NUM)) { + /* This is an ESDI drive. */ + drive = &dev->drives[hdd[i].esdi_channel]; - /* Try to load an image for the drive. */ - if (! hdd_image_load(i)) { - /* Nope. */ - drive->present = 0; - continue; - } + /* Try to load an image for the drive. */ + if (!hdd_image_load(i)) { + /* Nope. */ + drive->present = 0; + continue; + } - /* OK, so fill in geometry info. */ - drive->spt = hdd[i].spt; - drive->hpc = hdd[i].hpc; - drive->tracks = hdd[i].tracks; - drive->sectors = hdd_image_get_last_sector(i) + 1; - drive->hdd_num = i; + hdd_preset_apply(i); - /* Mark drive as present. */ - drive->present = 1; - } + /* OK, so fill in geometry info. */ + drive->spt = hdd[i].spt; + drive->hpc = hdd[i].hpc; + drive->tracks = hdd[i].tracks; + drive->sectors = hdd_image_get_last_sector(i) + 1; + drive->hdd_num = i; - if (++c >= ESDI_NUM) break; + /* Mark drive as present. */ + drive->present = 1; + } + + if (++c >= ESDI_NUM) + break; } /* Set the MCA ID for this controller, 0xFFDD. */ @@ -1147,47 +1174,45 @@ esdi_init(const device_t *info) dev->status = STATUS_BUSY; /* Set the reply timer. */ - timer_add(&dev->timer, esdi_callback, dev, 0); + timer_add(&dev->timer, esdi_callback, dev, 0); - return(dev); + return (dev); } - static void esdi_close(void *priv) { - esdi_t *dev = (esdi_t *)priv; + esdi_t *dev = (esdi_t *) priv; drive_t *drive; - int d; + int d; dev->drives[0].present = dev->drives[1].present = 0; - for (d=0; d<2; d++) { - drive = &dev->drives[d]; + for (d = 0; d < 2; d++) { + drive = &dev->drives[d]; - hdd_image_close(drive->hdd_num); + hdd_image_close(drive->hdd_num); } free(dev); } - static int esdi_available(void) { - return(rom_present(BIOS_FILE_L) && rom_present(BIOS_FILE_H)); + return (rom_present(BIOS_FILE_L) && rom_present(BIOS_FILE_H)); } const device_t esdi_ps2_device = { - .name = "IBM PS/2 ESDI Fixed Disk Adapter (MCA)", + .name = "IBM PS/2 ESDI Fixed Disk Adapter (MCA)", .internal_name = "esdi_mca", - .flags = DEVICE_MCA, - .local = 0, - .init = esdi_init, - .close = esdi_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = 0, + .init = esdi_init, + .close = esdi_close, + .reset = NULL, { .available = esdi_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; From ef213a80dd9e38cd8eddf3e447f17c0a81353bde Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sat, 30 Jul 2022 14:09:38 -0400 Subject: [PATCH 198/386] Re-add other machines which went missing from the machine table --- src/machine/machine_table.c | 170 ++++++++++++++++++++++++++++++++++++ 1 file changed, 170 insertions(+) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 6a2624fec..07034c805 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -440,6 +440,40 @@ const machine_t machines[] = { .device = NULL, .vid_device = NULL }, + { + .name = "[8088] Bondwell BW230", + .internal_name = "bw230", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_bw230_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 64, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, { .name = "[8088] Columbia Data Products MPC-1600", .internal_name = "mpc1600", @@ -610,6 +644,108 @@ const machine_t machines[] = { .device = NULL, .vid_device = NULL }, + { + .name = "[8088] Hyosung Topstar 88T", + .internal_name = "top88", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_top88_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 128, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Hyundai SUPER-16T", + .internal_name = "super16t", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_super16t_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 4772728, + .max_bus = 7159092, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 128, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, + { + .name = "[8088] Hyundai SUPER-16TE", + .internal_name = "super16te", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_super16te_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 10000000, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 128, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, { .name = "[8088] Juko ST", .internal_name = "jukopc", @@ -916,6 +1052,40 @@ const machine_t machines[] = { .device = NULL, .vid_device = NULL }, + { + .name = "[8088] Sanyo SX-16", + .internal_name = "sansx16", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_sansx16_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + MACHINE_FLAGS_NONE, + .ram = { + .min = 256, + .max = 640, + .step = 256 + }, + .nvrmask = 0, + .kbc = KBC_IBM_PC_XT, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .vid_device = NULL + }, { .name = "[8088] Schneider EuroPC", .internal_name = "europc", From 2dab754b4cea00e2987b90e3b119fd452e8fc138 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sat, 30 Jul 2022 14:54:16 -0400 Subject: [PATCH 199/386] Possibly fix some issues in Voodoo --- src/video/vid_voodoo_fifo.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/video/vid_voodoo_fifo.c b/src/video/vid_voodoo_fifo.c index 013c21db3..87260ce54 100644 --- a/src/video/vid_voodoo_fifo.c +++ b/src/video/vid_voodoo_fifo.c @@ -494,6 +494,7 @@ void voodoo_fifo_thread(void *param) switch (header >> 30) { case 0: /*Linear framebuffer (Banshee)*/ + case 1: /*Planar YUV*/ if (voodoo->texture_present[0][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) { // voodoo_fifo_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); From 9f15ffd4e9845a295a67898929a4c37644139fce Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Sat, 30 Jul 2022 14:56:44 -0400 Subject: [PATCH 200/386] qt: Adds a global option in preferences to use usr_path as the default open directory for image file selection. --- src/86box.c | 1 + src/config.c | 7 ++ src/include/86box/86box.h | 1 + src/qt/qt_mediamenu.cpp | 18 +++-- src/qt/qt_mediamenu.hpp | 2 + src/qt/qt_progsettings.cpp | 2 + src/qt/qt_progsettings.ui | 136 ++++++++++++++++++++----------------- 7 files changed, 99 insertions(+), 68 deletions(-) diff --git a/src/86box.c b/src/86box.c index 8569ae53f..deded3382 100644 --- a/src/86box.c +++ b/src/86box.c @@ -183,6 +183,7 @@ int confirm_save = 1; /* (C) enable save confirmation */ int enable_discord = 0; /* (C) enable Discord integration */ int pit_mode = -1; /* (C) force setting PIT mode */ int fm_driver = 0; /* (C) select FM sound driver */ +int open_dir_usr_path = 0; /* default file open dialog directory of usr_path */ /* Statistics. */ extern int mmuflush; diff --git a/src/config.c b/src/config.c index 8d488936e..f518b35bc 100644 --- a/src/config.c +++ b/src/config.c @@ -611,6 +611,8 @@ load_general(void) enable_discord = !!config_get_int(cat, "enable_discord", 0); + open_dir_usr_path = config_get_int(cat, "open_dir_usr_path", 0); + video_framerate = config_get_int(cat, "video_gl_framerate", -1); video_vsync = config_get_int(cat, "video_gl_vsync", 0); strncpy(video_shader, config_get_string(cat, "video_gl_shader", ""), sizeof(video_shader)); @@ -2380,6 +2382,11 @@ save_general(void) else config_delete_var(cat, "enable_discord"); + if (open_dir_usr_path) + config_set_int(cat, "open_dir_usr_path", open_dir_usr_path); + else + config_delete_var(cat, "open_dir_usr_path"); + if (video_framerate != -1) config_set_int(cat, "video_gl_framerate", video_framerate); else diff --git a/src/include/86box/86box.h b/src/include/86box/86box.h index 93a9fa0a1..ca7fbb99c 100644 --- a/src/include/86box/86box.h +++ b/src/include/86box/86box.h @@ -137,6 +137,7 @@ extern int fm_driver; /* (C) select FM sound driver */ extern char exe_path[2048]; /* path (dir) of executable */ extern char usr_path[1024]; /* path (dir) of user data */ extern char cfg_path[1024]; /* full path of config file */ +extern int open_dir_usr_path; /* default file open dialog directory of usr_path */ #ifndef USE_NEW_DYNAREC extern FILE *stdlog; /* file to log output to */ #endif diff --git a/src/qt/qt_mediamenu.cpp b/src/qt/qt_mediamenu.cpp index ebfe68bef..96fba3808 100644 --- a/src/qt/qt_mediamenu.cpp +++ b/src/qt/qt_mediamenu.cpp @@ -28,6 +28,7 @@ #include extern "C" { +#include <86box/86box.h> #include <86box/config.h> #include <86box/device.h> #include <86box/timer.h> @@ -173,7 +174,7 @@ void MediaMenu::cassetteNewImage() { void MediaMenu::cassetteSelectImage(bool wp) { auto filename = QFileDialog::getOpenFileName(parentWidget, QString(), - QString(), + getMediaOpenDirectory(), tr("Cassette images") % util::DlgFilter({ "pcm","raw","wav","cas" }) % tr("All files") % @@ -247,7 +248,7 @@ void MediaMenu::cartridgeSelectImage(int i) { auto filename = QFileDialog::getOpenFileName( parentWidget, QString(), - QString(), + getMediaOpenDirectory(), tr("Cartridge images") % util::DlgFilter({ "a","b","jrc" }) % tr("All files") % @@ -291,7 +292,7 @@ void MediaMenu::floppySelectImage(int i, bool wp) { auto filename = QFileDialog::getOpenFileName( parentWidget, QString(), - QString(), + getMediaOpenDirectory(), tr("All images") % util::DlgFilter({ "0??","1??","??0","86f","bin","cq?","d??","flp","hdm","im?","json","td0","*fd?","mfm","xdf" }) % tr("Advanced sector images") % @@ -400,7 +401,7 @@ void MediaMenu::cdromMount(int i) { auto filename = QFileDialog::getOpenFileName( parentWidget, QString(), - QString(), + getMediaOpenDirectory(), tr("CD-ROM images") % util::DlgFilter({ "iso","cue" }) % tr("All files") % @@ -571,7 +572,7 @@ void MediaMenu::moSelectImage(int i, bool wp) { auto filename = QFileDialog::getOpenFileName( parentWidget, QString(), - QString(), + getMediaOpenDirectory(), tr("MO images") % util::DlgFilter({ "im?", "mdi" }) % tr("All files") % @@ -656,6 +657,13 @@ void MediaMenu::moUpdateMenu(int i) { menu->setTitle(QString::asprintf(tr("MO %i (%ls): %ls").toUtf8().constData(), i + 1, busName.toStdU16String().data(), name.isEmpty() ? tr("(empty)").toStdU16String().data() : name.toStdU16String().data())); } +QString MediaMenu::getMediaOpenDirectory() { + QString openDirectory; + if (open_dir_usr_path > 0) { + openDirectory = QString::fromUtf8(usr_path); + } + return openDirectory; +} // callbacks from 86box C code extern "C" { diff --git a/src/qt/qt_mediamenu.hpp b/src/qt/qt_mediamenu.hpp index 3c45b2414..94f547d3f 100644 --- a/src/qt/qt_mediamenu.hpp +++ b/src/qt/qt_mediamenu.hpp @@ -66,6 +66,8 @@ private: QMap zipMenus; QMap moMenus; + QString getMediaOpenDirectory(); + int cassetteRecordPos; int cassettePlayPos; int cassetteRewindPos; diff --git a/src/qt/qt_progsettings.cpp b/src/qt/qt_progsettings.cpp index b11466c08..0b4f0e955 100644 --- a/src/qt/qt_progsettings.cpp +++ b/src/qt/qt_progsettings.cpp @@ -113,12 +113,14 @@ ProgSettings::ProgSettings(QWidget *parent) : mouseSensitivity = mouse_sensitivity; ui->horizontalSlider->setValue(mouseSensitivity * 100.); + ui->openDirUsrPath->setChecked(open_dir_usr_path > 0); } void ProgSettings::accept() { strcpy(icon_set, ui->comboBox->currentData().toString().toUtf8().data()); lang_id = ui->comboBoxLanguage->currentData().toUInt(); + open_dir_usr_path = ui->openDirUsrPath->isChecked() ? 1 : 0; loadTranslators(QCoreApplication::instance()); reloadStrings(); diff --git a/src/qt/qt_progsettings.ui b/src/qt/qt_progsettings.ui index 11bb39b74..05775489f 100644 --- a/src/qt/qt_progsettings.ui +++ b/src/qt/qt_progsettings.ui @@ -7,7 +7,7 @@ 0 0 458 - 303 + 374 @@ -29,24 +29,14 @@ QLayout::SetFixedSize - - - - Qt::Horizontal + + + + false - - - 40 - 20 - - - - - - - (System Default) + (Default) @@ -58,30 +48,6 @@ - - - - Default - - - - - - - Qt::Horizontal - - - QDialogButtonBox::Cancel|QDialogButtonBox::Ok - - - - - - - Default - - - @@ -89,8 +55,8 @@ - - + + Default @@ -109,25 +75,15 @@ - - - - Language: - - - - - + + Qt::Horizontal - - - 40 - 20 - + + QDialogButtonBox::Cancel|QDialogButtonBox::Ok - + @@ -151,18 +107,72 @@ - - - - false - + + - (Default) + (System Default) + + + + Language: + + + + + + + Default + + + + + + + Default + + + + + + + Qt::Horizontal + + + + 40 + 20 + + + + + + + + Qt::Horizontal + + + + 40 + 20 + + + + + + + + <html><head/><body><p>When selecting media images (CD-ROM, floppy, etc.) the open dialog will start in the same directory as the 86Box configuration file. This setting will likely only make a difference on macOS.</p></body></html> + + + Select media images from program working directory + + + From 28dd2d386f706a4ad2aade2c97df5e821594b386 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Sat, 30 Jul 2022 16:47:19 -0300 Subject: [PATCH 201/386] Bump version to 3.7 --- CMakeLists.txt | 2 +- src/include_make/86box/version.h | 6 +++--- src/unix/assets/86Box.spec | 6 +++--- src/unix/assets/net.86box.86Box.metainfo.xml | 2 +- vcpkg.json | 2 +- 5 files changed, 9 insertions(+), 9 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 561e1eeda..f3d7ae4f6 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -40,7 +40,7 @@ if(MUNT_EXTERNAL) endif() project(86Box - VERSION 3.6 + VERSION 3.7 DESCRIPTION "Emulator of x86-based systems" HOMEPAGE_URL "https://86box.net" LANGUAGES C CXX) diff --git a/src/include_make/86box/version.h b/src/include_make/86box/version.h index 63e675c1e..4c7bca1bd 100644 --- a/src/include_make/86box/version.h +++ b/src/include_make/86box/version.h @@ -20,11 +20,11 @@ #define EMU_NAME "86Box" #define EMU_NAME_W LSTR(EMU_NAME) -#define EMU_VERSION "3.6" +#define EMU_VERSION "3.7" #define EMU_VERSION_W LSTR(EMU_VERSION) #define EMU_VERSION_EX "3.50" /* frozen due to IDE re-detection behavior on Windows */ #define EMU_VERSION_MAJ 3 -#define EMU_VERSION_MIN 6 +#define EMU_VERSION_MIN 7 #define EMU_VERSION_PATCH 0 #define EMU_BUILD_NUM 0 @@ -40,7 +40,7 @@ #define EMU_ROMS_URL "https://github.com/86Box/roms/releases/latest" #define EMU_ROMS_URL_W LSTR(EMU_ROMS_URL) #ifdef RELEASE_BUILD -# define EMU_DOCS_URL "https://86box.readthedocs.io/en/v3.6/" +# define EMU_DOCS_URL "https://86box.readthedocs.io/en/v3.7/" #else # define EMU_DOCS_URL "https://86box.readthedocs.io" #endif diff --git a/src/unix/assets/86Box.spec b/src/unix/assets/86Box.spec index 55df4b7d9..a48acdee7 100644 --- a/src/unix/assets/86Box.spec +++ b/src/unix/assets/86Box.spec @@ -12,10 +12,10 @@ # After a successful build, you can install the RPMs as follows: # sudo dnf install RPMS/$(uname -m)/86Box-3* RPMS/noarch/86Box-roms* -%global romver 20220701 +%global romver 20220730 Name: 86Box -Version: 3.6 +Version: 3.7 Release: 1%{?dist} Summary: Classic PC emulator License: GPLv2+ @@ -120,5 +120,5 @@ popd %{_bindir}/roms %changelog -* Fri Jul 01 2022 Robert de Rooy 3.6-1 +* Sat Jul 30 2022 Robert de Rooy 3.7-1 - Bump release diff --git a/src/unix/assets/net.86box.86Box.metainfo.xml b/src/unix/assets/net.86box.86Box.metainfo.xml index 982ae9b4d..d024b0a1e 100644 --- a/src/unix/assets/net.86box.86Box.metainfo.xml +++ b/src/unix/assets/net.86box.86Box.metainfo.xml @@ -10,7 +10,7 @@ net.86box.86Box.desktop - + diff --git a/vcpkg.json b/vcpkg.json index f3b639078..2f70e4456 100644 --- a/vcpkg.json +++ b/vcpkg.json @@ -1,6 +1,6 @@ { "name": "86box", - "version-string": "3.6", + "version-string": "3.7", "homepage": "https://86box.net/", "documentation": "http://86box.readthedocs.io/", "license": "GPL-2.0-or-later", From fc48e5a284ce0e3befdfc56dced2d3b424dbf331 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Sat, 30 Jul 2022 21:55:41 +0200 Subject: [PATCH 202/386] Fixed the rom loading of the boca cirrus 5428 bios. --- src/video/vid_cl54xx.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/src/video/vid_cl54xx.c b/src/video/vid_cl54xx.c index 7cded795e..cea6ee807 100644 --- a/src/video/vid_cl54xx.c +++ b/src/video/vid_cl54xx.c @@ -51,7 +51,8 @@ #define BIOS_GD5428_ISA_PATH "roms/video/cirruslogic/5428.bin" #define BIOS_GD5428_MCA_PATH "roms/video/cirruslogic/SVGA141.ROM" #define BIOS_GD5428_PATH "roms/video/cirruslogic/vlbusjapan.BIN" -#define BIOS_GD5428_BOCA_ISA_PATH "roms/video/cirruslogic/boca_gd5428_1.30b.bin" +#define BIOS_GD5428_BOCA_ISA_PATH_1 "roms/video/cirruslogic/boca_gd5428_1.30b_1.bin" +#define BIOS_GD5428_BOCA_ISA_PATH_2 "roms/video/cirruslogic/boca_gd5428_1.30b_2.bin" #define BIOS_GD5429_PATH "roms/video/cirruslogic/5429.vbi" #define BIOS_GD5430_DIAMOND_A8_VLB_PATH "roms/video/cirruslogic/diamondvlbus.bin" #define BIOS_GD5430_ORCHID_VLB_PATH "roms/video/cirruslogic/orchidvlbus.bin" @@ -3863,6 +3864,7 @@ static void int id = info->local & 0xff; int vram; char *romfn = NULL; + char *romfn1 = NULL, *romfn2 = NULL; memset(gd54xx, 0, sizeof(gd54xx_t)); gd54xx->pci = !!(info->flags & DEVICE_PCI); @@ -3917,8 +3919,10 @@ static void if (info->local & 0x100) if (gd54xx->vlb) romfn = BIOS_GD5428_DIAMOND_B1_VLB_PATH; - else - romfn = BIOS_GD5428_BOCA_ISA_PATH; + else { + romfn1 = BIOS_GD5428_BOCA_ISA_PATH_1; + romfn2 = BIOS_GD5428_BOCA_ISA_PATH_2; + } else { if (gd54xx->vlb) romfn = BIOS_GD5428_PATH; @@ -4016,7 +4020,10 @@ static void gd54xx->vram_mask = gd54xx->vram_size - 1; if (romfn) - rom_init(&gd54xx->bios_rom, romfn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + rom_init(&gd54xx->bios_rom, romfn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + else if (romfn1 && romfn2) + rom_init_interleaved(&gd54xx->bios_rom, BIOS_GD5428_BOCA_ISA_PATH_1, BIOS_GD5428_BOCA_ISA_PATH_2, 0xc0000, + 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); if (info->flags & DEVICE_ISA) video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_gd54xx_isa); @@ -4193,7 +4200,7 @@ gd5428_diamond_b1_available(void) static int gd5428_boca_isa_available(void) { - return rom_present(BIOS_GD5428_BOCA_ISA_PATH); + return rom_present(BIOS_GD5428_BOCA_ISA_PATH_1) && rom_present(BIOS_GD5428_BOCA_ISA_PATH_2); } static int From a5a419a8caaf459b2c07450c0087231aea1a98db Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 30 Jul 2022 23:36:12 +0200 Subject: [PATCH 203/386] The device config struct now has a local variable for local flags and points for up to two devices (neeeded for graphics cards and their RAMDAC's and clock chips). --- src/include/86box/device.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/include/86box/device.h b/src/include/86box/device.h index 47f9b2448..e1342eb74 100644 --- a/src/include/86box/device.h +++ b/src/include/86box/device.h @@ -80,6 +80,8 @@ typedef struct { const char *internal_name; int bios_type; int files_no; + uint32_t local; + const device_t *dev1, *dev2; const char **files; } device_config_bios_t; From 338fd9acdf3a5978371a8d6d66e28b740e243c3e Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 30 Jul 2022 23:42:41 +0200 Subject: [PATCH 204/386] BIOS type defines and size variable. --- src/include/86box/device.h | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/src/include/86box/device.h b/src/include/86box/device.h index e1342eb74..4b88442ae 100644 --- a/src/include/86box/device.h +++ b/src/include/86box/device.h @@ -70,6 +70,17 @@ enum { DEVICE_LPT = 0x2000 /* requires a parallel port */ }; + +#define BIOS_NORMAL 0 +#define BIOS_INTERLEAVED 1 +#define BIOS_INTERLEAVED_SINGLEFILE 2 +#define BIOS_INTERLEAVED_QUAD 3 +#define BIOS_INTERLEAVED_QUAD_SINGLEFILE 4 +#define BIOS_INTEL_AMI 5 +#define BIOS_INTERLEAVED_INVERT 8 +#define BIOS_HIGH_BIT_INVERT 16 + + typedef struct { const char *description; int value; @@ -80,7 +91,7 @@ typedef struct { const char *internal_name; int bios_type; int files_no; - uint32_t local; + uint32_t local, size; const device_t *dev1, *dev2; const char **files; } device_config_bios_t; From f199ddcbcc14a0432b98181404fce45c9871d2b5 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 30 Jul 2022 23:56:33 +0200 Subject: [PATCH 205/386] Changed the pointers to void pointers. --- src/include/86box/device.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/include/86box/device.h b/src/include/86box/device.h index 4b88442ae..25cf5c3f2 100644 --- a/src/include/86box/device.h +++ b/src/include/86box/device.h @@ -92,7 +92,7 @@ typedef struct { int bios_type; int files_no; uint32_t local, size; - const device_t *dev1, *dev2; + void *dev1, *dev2; const char **files; } device_config_bios_t; From 64c67f3cdee38c45f2e49430c43a25e6db48417d Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 31 Jul 2022 02:01:20 +0200 Subject: [PATCH 206/386] Fixed device_available(). --- src/device.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/src/device.c b/src/device.c index 331305f2d..1a4b1ca13 100644 --- a/src/device.c +++ b/src/device.c @@ -331,17 +331,19 @@ device_get_priv(const device_t *d) int device_available(const device_t *d) { - device_config_t *config; - device_config_bios_t *bios; + device_config_t *config = NULL; + device_config_bios_t *bios = NULL; int bf, roms_present = 0; int i = 0; -#ifdef RELEASE_BUILD - if (d->flags & DEVICE_NOT_WORKING) return(0); -#endif if (d != NULL) { +#ifdef RELEASE_BUILD + if (d->flags & DEVICE_NOT_WORKING) + return(0); +#endif + config = (device_config_t *) d->config; - if (config != NULL) { + if (config != NULL) { while (config->type != -1) { if (config->type == CONFIG_BIOS) { bios = (device_config_bios_t *) config->bios; @@ -362,9 +364,9 @@ device_available(const device_t *d) } } - /* No CONFIG_BIOS field present, use the classic available(). */ + /* No CONFIG_BIOS field present, use the classic available(). */ if (d->available != NULL) - return(d->available()); + return(d->available()); else return(1); } From 37bf41ec1713e121aca8848248c21cdbe0018e8c Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 31 Jul 2022 02:23:58 +0200 Subject: [PATCH 207/386] MegaPC NVR device. --- src/nvr_at.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/src/nvr_at.c b/src/nvr_at.c index fc5ae4bde..bb4c38b85 100644 --- a/src/nvr_at.c +++ b/src/nvr_at.c @@ -1050,7 +1050,9 @@ nvr_at_init(const device_t *info) if (info->local == 12) { local->def = 0x00; local->flags |= FLAG_AMI_1992_HACK; - } else + } else if (info->local == 20) + local->def = 0x00; + else local->def = 0xff; nvr->irq = 8; local->cent = RTC_CENTURY_AT; @@ -1297,3 +1299,17 @@ const device_t p6rp4_nvr_device = { .force_redraw = NULL, .config = NULL }; + +const device_t amstrad_megapc_nvr_device = { + .name = "Amstrad MegapC NVRAM", + .internal_name = "amstrad_megapc_nvr", + .flags = DEVICE_ISA | DEVICE_AT, + .local = 20, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, + { .available = NULL }, + .speed_changed = nvr_at_speed_changed, + .force_redraw = NULL, + .config = NULL +}; From acf66baaad8ab5e07938998206aebe4331307ddc Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sat, 30 Jul 2022 21:12:01 -0400 Subject: [PATCH 208/386] Remove unnecessary DEVICE_NOT_WORKING --- src/device.c | 5 ----- src/include/86box/device.h | 1 - src/sound/snd_pas16.c | 2 +- 3 files changed, 1 insertion(+), 7 deletions(-) diff --git a/src/device.c b/src/device.c index 1a4b1ca13..c69acaad0 100644 --- a/src/device.c +++ b/src/device.c @@ -337,11 +337,6 @@ device_available(const device_t *d) int i = 0; if (d != NULL) { -#ifdef RELEASE_BUILD - if (d->flags & DEVICE_NOT_WORKING) - return(0); -#endif - config = (device_config_t *) d->config; if (config != NULL) { while (config->type != -1) { diff --git a/src/include/86box/device.h b/src/include/86box/device.h index 25cf5c3f2..948c4b03b 100644 --- a/src/include/86box/device.h +++ b/src/include/86box/device.h @@ -54,7 +54,6 @@ #define CONFIG_BIOS 11 enum { - DEVICE_NOT_WORKING = 1, /* does not currently work correctly and will be disabled in a release build */ DEVICE_PCJR = 2, /* requires an IBM PCjr */ DEVICE_AT = 4, /* requires an AT-compatible system */ DEVICE_PS2 = 8, /* requires a PS/1 or PS/2 system */ diff --git a/src/sound/snd_pas16.c b/src/sound/snd_pas16.c index 1662598c9..0dd35c049 100644 --- a/src/sound/snd_pas16.c +++ b/src/sound/snd_pas16.c @@ -745,7 +745,7 @@ pas16_close(void *p) const device_t pas16_device = { .name = "Pro Audio Spectrum 16", .internal_name = "pas16", - .flags = DEVICE_ISA | DEVICE_NOT_WORKING, + .flags = DEVICE_ISA, .local = 0, .init = pas16_init, .close = pas16_close, From 69379b68b02e1074983dea371684ff3419778788 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 31 Jul 2022 04:45:26 +0200 Subject: [PATCH 209/386] Implemented PIC IRQ freeze on poll mode start. --- src/pic.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/pic.c b/src/pic.c index fe6b29fc8..857f45cfc 100644 --- a/src/pic.c +++ b/src/pic.c @@ -436,6 +436,7 @@ pic_read(uint16_t addr, void *priv) dev->data_bus = dev->irr; #endif if (dev->ocw3 & 0x04) { + dev->interrupt &= ~0x20; /* Freeze the interrupt until the poll is over. */ if (dev->int_pending) { dev->data_bus = 0x80 | (dev->interrupt & 7); pic_acknowledge(dev); @@ -516,6 +517,8 @@ pic_write(uint16_t addr, uint8_t val, void *priv) update_pending(); } else if (val & 0x08) { dev->ocw3 = val; + if (dev->ocw3 & 0x04) + dev->interrupt |= 0x20; /* Freeze the interrupt until the poll is over. */ if (dev->ocw3 & 0x40) dev->special_mask_mode = !!(dev->ocw3 & 0x20); } else { From d04f9b602f555e0ee3918e7cd661331854620a12 Mon Sep 17 00:00:00 2001 From: Robert de Rooy Date: Sun, 31 Jul 2022 15:07:27 +0200 Subject: [PATCH 210/386] Remove obsolete symlink hack --- src/unix/assets/86Box.spec | 4 ---- 1 file changed, 4 deletions(-) diff --git a/src/unix/assets/86Box.spec b/src/unix/assets/86Box.spec index a48acdee7..f0b15a45a 100644 --- a/src/unix/assets/86Box.spec +++ b/src/unix/assets/86Box.spec @@ -100,9 +100,6 @@ appstream-util validate-relax --nonet %{buildroot}%{_metainfodir}/net.86box.86Bo pushd roms-%{romver} mkdir -p %{buildroot}%{_datadir}/%{name}/roms cp -a * %{buildroot}%{_datadir}/%{name}/roms/ - # hack to create symlink in /usr/bin - cd %{buildroot}%{_bindir} - ln -s ../share/%{name}/roms roms popd # files part of the main package @@ -117,7 +114,6 @@ popd %files roms %license roms-%{romver}/LICENSE %{_datadir}/%{name}/roms -%{_bindir}/roms %changelog * Sat Jul 30 2022 Robert de Rooy 3.7-1 From 831835b884445e05e7643ed9fde401388e7e2251 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 1 Aug 2022 02:39:50 +0600 Subject: [PATCH 211/386] qt: fix hard freeze on hidden second windows --- src/qt/qt_mainwindow.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 017e19ee3..745b62ec0 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -1594,7 +1594,7 @@ void MainWindow::keyPressEvent(QKeyEvent* event) void MainWindow::blitToWidget(int x, int y, int w, int h, int monitor_index) { if (monitor_index >= 1) { - if (renderers[monitor_index]) renderers[monitor_index]->blit(x, y, w, h); + if (renderers[monitor_index] && renderers[monitor_index].isVisible()) renderers[monitor_index]->blit(x, y, w, h); else video_blit_complete_monitor(monitor_index); } else ui->stackedWidget->blit(x, y, w, h); From 34d80ce170dd0cca96a247f7c3b6535cde00c624 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 1 Aug 2022 02:42:51 +0600 Subject: [PATCH 212/386] It's '->' --- src/qt/qt_mainwindow.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 745b62ec0..efe1e8682 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -1594,7 +1594,7 @@ void MainWindow::keyPressEvent(QKeyEvent* event) void MainWindow::blitToWidget(int x, int y, int w, int h, int monitor_index) { if (monitor_index >= 1) { - if (renderers[monitor_index] && renderers[monitor_index].isVisible()) renderers[monitor_index]->blit(x, y, w, h); + if (renderers[monitor_index] && renderers[monitor_index]->isVisible()) renderers[monitor_index]->blit(x, y, w, h); else video_blit_complete_monitor(monitor_index); } else ui->stackedWidget->blit(x, y, w, h); From 16f7460c737433f7cc3348af133295115abce76e Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 31 Jul 2022 23:31:59 +0200 Subject: [PATCH 213/386] Attempt at some QT fixes. --- src/qt/qt_d3d9renderer.cpp | 2 +- src/qt/qt_mainwindow.cpp | 8 ++++++++ src/qt/qt_rendererstack.cpp | 2 +- src/qt/qt_ui.cpp | 3 +++ 4 files changed, 13 insertions(+), 2 deletions(-) diff --git a/src/qt/qt_d3d9renderer.cpp b/src/qt/qt_d3d9renderer.cpp index cb2d0a25a..14357c12d 100644 --- a/src/qt/qt_d3d9renderer.cpp +++ b/src/qt/qt_d3d9renderer.cpp @@ -139,7 +139,7 @@ void D3D9Renderer::resizeEvent(QResizeEvent *event) void D3D9Renderer::blit(int x, int y, int w, int h) { - if ((x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (monitors[m_monitor_index].target_buffer == NULL) || surfaceInUse) { + if (blitDummied || (x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (monitors[m_monitor_index].target_buffer == NULL) || surfaceInUse) { video_blit_complete_monitor(m_monitor_index); return; } diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index efe1e8682..d4bb122c3 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -1594,7 +1594,11 @@ void MainWindow::keyPressEvent(QKeyEvent* event) void MainWindow::blitToWidget(int x, int y, int w, int h, int monitor_index) { if (monitor_index >= 1) { +#ifdef STRICTER_CHECK if (renderers[monitor_index] && renderers[monitor_index]->isVisible()) renderers[monitor_index]->blit(x, y, w, h); +#else + if (renderers[monitor_index]) renderers[monitor_index]->blit(x, y, w, h); +#endif else video_blit_complete_monitor(monitor_index); } else ui->stackedWidget->blit(x, y, w, h); @@ -2053,6 +2057,8 @@ void MainWindow::on_actionShow_non_primary_monitors_triggered() { show_second_monitors ^= 1; + blitDummied = true; + if (show_second_monitors) { for (int monitor_index = 1; monitor_index < MONITORS_NUM; monitor_index++) { auto& secondaryRenderer = renderers[monitor_index]; @@ -2079,5 +2085,7 @@ void MainWindow::on_actionShow_non_primary_monitors_triggered() } } } + + blitDummied = false; } diff --git a/src/qt/qt_rendererstack.cpp b/src/qt/qt_rendererstack.cpp index ef415a82c..a5955dbe9 100644 --- a/src/qt/qt_rendererstack.cpp +++ b/src/qt/qt_rendererstack.cpp @@ -435,7 +435,7 @@ RendererStack::blitRenderer(int x, int y, int w, int h) void RendererStack::blitCommon(int x, int y, int w, int h) { - if ((x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (monitors[m_monitor_index].target_buffer == NULL) || imagebufs.empty() || std::get(imagebufs[currentBuf])->test_and_set() || blitDummied) { + if (blitDummied || (x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (monitors[m_monitor_index].target_buffer == NULL) || imagebufs.empty() || std::get(imagebufs[currentBuf])->test_and_set()) { video_blit_complete_monitor(m_monitor_index); return; } diff --git a/src/qt/qt_ui.cpp b/src/qt/qt_ui.cpp index 7400a4f7a..b7f2cffaf 100644 --- a/src/qt/qt_ui.cpp +++ b/src/qt/qt_ui.cpp @@ -73,6 +73,9 @@ wchar_t* ui_window_title(wchar_t* str) extern "C" void qt_blit(int x, int y, int w, int h, int monitor_index) { + if (blitDummied) + return; + main_window->blitToWidget(x, y, w, h, monitor_index); } From f3db64317cdc063b5b867ff298bf7efdb3c5ccad Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 31 Jul 2022 23:37:24 +0200 Subject: [PATCH 214/386] Attempted fix of the fix. --- src/qt/qt_mainwindow.cpp | 2 ++ src/qt/qt_mainwindow.hpp | 2 ++ src/qt/qt_rendererstack.hpp | 2 +- 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index d4bb122c3..a9d3ee216 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -103,6 +103,8 @@ namespace IOKit { extern MainWindow* main_window; +std::atomic blitDummied{false}; + filter_result keyb_filter(BMessage *message, BHandler **target, BMessageFilter *filter) { if (message->what == B_KEY_DOWN || message->what == B_KEY_UP diff --git a/src/qt/qt_mainwindow.hpp b/src/qt/qt_mainwindow.hpp index 49300e72b..eeccc8fe2 100644 --- a/src/qt/qt_mainwindow.hpp +++ b/src/qt/qt_mainwindow.hpp @@ -12,6 +12,8 @@ class MediaMenu; class RendererStack; +extern std::atomic blitDummied{false}; + namespace Ui { class MainWindow; } diff --git a/src/qt/qt_rendererstack.hpp b/src/qt/qt_rendererstack.hpp index 6ee1a0433..75cabec49 100644 --- a/src/qt/qt_rendererstack.hpp +++ b/src/qt/qt_rendererstack.hpp @@ -103,7 +103,7 @@ private: RendererCommon *rendererWindow { nullptr }; std::unique_ptr current; - std::atomic directBlitting{false}, blitDummied{false}; + std::atomic directBlitting{false}; }; #endif // QT_RENDERERCONTAINER_HPP From 14fa83402ed03c0ed53950961bbede59f61bdd78 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 31 Jul 2022 23:38:43 +0200 Subject: [PATCH 215/386] One last fix. --- src/qt/qt_rendererstack.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_rendererstack.cpp b/src/qt/qt_rendererstack.cpp index a5955dbe9..7a802e898 100644 --- a/src/qt/qt_rendererstack.cpp +++ b/src/qt/qt_rendererstack.cpp @@ -257,7 +257,7 @@ RendererStack::switchRenderer(Renderer renderer) createRenderer(renderer); disconnect(this, &RendererStack::blit, this, &RendererStack::blitDummy); blitDummied = false; - QTimer::singleShot(1000, this, [this]() { this->blitDummied = false; } ); + QTimer::singleShot(1000, this, [this]() { blitDummied = false; } ); }); rendererWindow->hasBlitFunc() ? current.reset() : current.release()->deleteLater(); From 68992c0020012ddb1ff73110f37db895ad32d7f0 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 31 Jul 2022 23:48:58 +0200 Subject: [PATCH 216/386] And another fix. --- src/qt/qt_d3d9renderer.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/qt/qt_d3d9renderer.cpp b/src/qt/qt_d3d9renderer.cpp index 14357c12d..e7ef16f77 100644 --- a/src/qt/qt_d3d9renderer.cpp +++ b/src/qt/qt_d3d9renderer.cpp @@ -1,3 +1,4 @@ +#include "qt_mainwindow.hpp" #include "qt_d3d9renderer.hpp" #include #include From 1280cbd4a5bf361efa2719a23ac184a87f8c0628 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 31 Jul 2022 23:53:24 +0200 Subject: [PATCH 217/386] Attempted fix for the extern. --- src/qt/qt_mainwindow.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_mainwindow.hpp b/src/qt/qt_mainwindow.hpp index eeccc8fe2..a7d029bff 100644 --- a/src/qt/qt_mainwindow.hpp +++ b/src/qt/qt_mainwindow.hpp @@ -12,7 +12,7 @@ class MediaMenu; class RendererStack; -extern std::atomic blitDummied{false}; +extern std::atomic blitDummied; namespace Ui { class MainWindow; From 42fade36d0cc766a9848c113f6713137928e4701 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 1 Aug 2022 00:02:28 +0200 Subject: [PATCH 218/386] Another fix attempt. --- src/qt/qt_mainwindow.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index a9d3ee216..9e8d23912 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -103,7 +103,7 @@ namespace IOKit { extern MainWindow* main_window; -std::atomic blitDummied{false}; +std::atomic blitDummied = false; filter_result keyb_filter(BMessage *message, BHandler **target, BMessageFilter *filter) { From b69565d0ae072ac523f69f84dd9b4e22d22c5995 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 1 Aug 2022 00:28:15 +0200 Subject: [PATCH 219/386] And actually fixed compile now. --- src/qt/qt_mainwindow.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 9e8d23912..a7142463e 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -103,8 +103,6 @@ namespace IOKit { extern MainWindow* main_window; -std::atomic blitDummied = false; - filter_result keyb_filter(BMessage *message, BHandler **target, BMessageFilter *filter) { if (message->what == B_KEY_DOWN || message->what == B_KEY_UP @@ -125,6 +123,8 @@ filter_result keyb_filter(BMessage *message, BHandler **target, BMessageFilter * static BMessageFilter* filter; #endif +std::atomic blitDummied{false}; + extern void qt_mouse_capture(int); extern "C" void qt_blit(int x, int y, int w, int h, int monitor_index); From 93404cf291309fa47d0ed6dbccb2d8d84afd5a90 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 1 Aug 2022 00:40:31 +0200 Subject: [PATCH 220/386] Actually fixed the hang. --- src/qt/qt_mainwindow.cpp | 6 +----- src/qt/qt_ui.cpp | 3 --- 2 files changed, 1 insertion(+), 8 deletions(-) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index a7142463e..144c55d2d 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -1596,11 +1596,7 @@ void MainWindow::keyPressEvent(QKeyEvent* event) void MainWindow::blitToWidget(int x, int y, int w, int h, int monitor_index) { if (monitor_index >= 1) { -#ifdef STRICTER_CHECK - if (renderers[monitor_index] && renderers[monitor_index]->isVisible()) renderers[monitor_index]->blit(x, y, w, h); -#else - if (renderers[monitor_index]) renderers[monitor_index]->blit(x, y, w, h); -#endif + if (!blitDummied && renderers[monitor_index] && renderers[monitor_index]->isVisible()) renderers[monitor_index]->blit(x, y, w, h); else video_blit_complete_monitor(monitor_index); } else ui->stackedWidget->blit(x, y, w, h); diff --git a/src/qt/qt_ui.cpp b/src/qt/qt_ui.cpp index b7f2cffaf..7400a4f7a 100644 --- a/src/qt/qt_ui.cpp +++ b/src/qt/qt_ui.cpp @@ -73,9 +73,6 @@ wchar_t* ui_window_title(wchar_t* str) extern "C" void qt_blit(int x, int y, int w, int h, int monitor_index) { - if (blitDummied) - return; - main_window->blitToWidget(x, y, w, h, monitor_index); } From dc38b7d950d71425c89eff81799de26724798d2a Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 1 Aug 2022 03:16:44 +0200 Subject: [PATCH 221/386] The PIC now correctly processes slave interrupts in XT mode as well, fixes PS/2 mouse on the Xi8088, fixes #2045. --- src/pic.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/src/pic.c b/src/pic.c index 857f45cfc..12fd80264 100644 --- a/src/pic.c +++ b/src/pic.c @@ -724,10 +724,25 @@ pic_irq_ack(void) { int ret; + /* Needed for Xi8088. */ + if ((pic.ack_bytes == 0) && pic.int_pending && pic_slave_on(&pic, pic.interrupt)) { + if (!pic.slaves[pic.interrupt]->int_pending) { + /* If we are on AT, IRQ 2 is pending, and we cannot find a pending IRQ on PIC 2, fatal out. */ + fatal("IRQ %i pending on AT without a pending IRQ on PIC %i (normal)\n", pic.interrupt, pic.interrupt); + exit(-1); + return -1; + } + + pic.interrupt |= 0x40; /* Mark slave pending. */ + } + ret = pic_irq_ack_read(&pic, pic.ack_bytes); pic.ack_bytes = (pic.ack_bytes + 1) % (pic_i86_mode(&pic) ? 2 : 3); if (pic.ack_bytes == 0) { + /* Needed for Xi8088. */ + if (pic.interrupt & 0x40) + pic2.interrupt = 0x17; pic.interrupt = 0x17; update_pending(); } From 039b9e766259338c5070539f16d34ca8be2dc2db Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 1 Aug 2022 03:28:34 +0200 Subject: [PATCH 222/386] Non-PS/2 AMI keyboard controller again identifies as 'H' instead of 'F', fixes #2545 as the AOpen Vi15G absolutely demands a 'H' keyboard controller. --- src/device/keyboard_at.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/device/keyboard_at.c b/src/device/keyboard_at.c index 8bb436a0c..24b0775c4 100644 --- a/src/device/keyboard_at.c +++ b/src/device/keyboard_at.c @@ -1398,7 +1398,7 @@ write64_ami(void *priv, uint8_t val) else add_data(dev, 'H'); } else - add_data(dev, 'F'); + add_data(dev, 'H'); return 0; case 0xa2: /* clear keyboard controller lines P22/P23 */ From 63513949189b501500961721b5186c90c9672df3 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 1 Aug 2022 12:45:38 +0600 Subject: [PATCH 223/386] qt: Fix compile on ARM64 with GLES2 headers --- src/qt/qt_openglrenderer.cpp | 14 ++++++++++++-- src/qt/qt_openglrenderer.hpp | 4 +++- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/src/qt/qt_openglrenderer.cpp b/src/qt/qt_openglrenderer.cpp index 7c7cd55fa..3a5f58846 100644 --- a/src/qt/qt_openglrenderer.cpp +++ b/src/qt/qt_openglrenderer.cpp @@ -26,6 +26,14 @@ #include "qt_opengloptionsdialog.hpp" #include "qt_openglrenderer.hpp" +#ifndef GL_MAP_PERSISTENT_BIT +#define GL_MAP_PERSISTENT_BIT 0x0040 +#endif + +#ifndef GL_MAP_COHERENT_BIT +#define GL_MAP_COHERENT_BIT 0x0080 +#endif + OpenGLRenderer::OpenGLRenderer(QWidget *parent) : QWindow(parent->windowHandle()) , renderTimer(new QTimer(this)) @@ -239,10 +247,12 @@ void OpenGLRenderer::initializeExtensions() { #ifndef NO_BUFFER_STORAGE - if (context->hasExtension("GL_ARB_buffer_storage")) { + if (context->hasExtension("GL_ARB_buffer_storage") || context->hasExtension("GL_EXT_buffer_storage")) { hasBufferStorage = true; - glBufferStorage = (PFNGLBUFFERSTORAGEPROC) context->getProcAddress("glBufferStorage"); + glBufferStorage = (PFNGLBUFFERSTORAGEEXTPROC_LOCAL) context->getProcAddress(context->hasExtension("GL_EXT_buffer_storage") ? "glBufferStorageEXT" : "glBufferStorage"); + if (!glBufferStorage) + glBufferStorage = glBufferStorage = (PFNGLBUFFERSTORAGEEXTPROC_LOCAL) context->getProcAddress("glBufferStorage"); } #endif } diff --git a/src/qt/qt_openglrenderer.hpp b/src/qt/qt_openglrenderer.hpp index a27e0fe21..da64ea79b 100644 --- a/src/qt/qt_openglrenderer.hpp +++ b/src/qt/qt_openglrenderer.hpp @@ -39,6 +39,8 @@ #include "qt_opengloptions.hpp" #include "qt_renderercommon.hpp" +typedef void (QOPENGLF_APIENTRYP PFNGLBUFFERSTORAGEEXTPROC_LOCAL) (GLenum target, GLsizeiptr size, const void *data, GLbitfield flags); + class OpenGLRenderer : public QWindow, protected QOpenGLExtraFunctions, public RendererCommon { Q_OBJECT @@ -103,7 +105,7 @@ private: /* GL_ARB_buffer_storage */ bool hasBufferStorage = false; #ifndef NO_BUFFER_STORAGE - PFNGLBUFFERSTORAGEPROC glBufferStorage = nullptr; + PFNGLBUFFERSTORAGEEXTPROC_LOCAL glBufferStorage = nullptr; #endif private slots: From ac12ad224391cadb868c6402fd84e9321d8c4223 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 1 Aug 2022 13:26:07 +0600 Subject: [PATCH 224/386] Revert "Fix crash at exit due to a unreleased mutex." This reverts commit 80e547000673b1f8f9804a3cacbe5dc934077493. std::unique_lock is incapable of recursively locking a mutex, which is needed for multi-monitor setups. As a result it will crash/show undefined behaviour when switching renderers. Switch to instead calling endblit() after pc_close to avoid crashes; at this point the CPU thread is now terminated so the mutex no longer remains held by it. --- src/qt/qt_main.cpp | 1 + src/qt/qt_platform.cpp | 7 +++---- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/qt/qt_main.cpp b/src/qt/qt_main.cpp index c30304eb8..a74958511 100644 --- a/src/qt/qt_main.cpp +++ b/src/qt/qt_main.cpp @@ -289,6 +289,7 @@ int main(int argc, char* argv[]) { cpu_thread_run = 0; main_thread->join(); pc_close(nullptr); + endblit(); socket.close(); return ret; diff --git a/src/qt/qt_platform.cpp b/src/qt/qt_platform.cpp index d1f5318ba..527b4e2ab 100644 --- a/src/qt/qt_platform.cpp +++ b/src/qt/qt_platform.cpp @@ -54,7 +54,6 @@ QElapsedTimer elapsed_timer; static std::atomic_int blitmx_contention = 0; static std::recursive_mutex blitmx; -static thread_local std::unique_lock blit_lock { blitmx, std::defer_lock }; class CharPointer { public: @@ -469,17 +468,17 @@ void dynld_close(void *handle) void startblit() { blitmx_contention++; - if (blit_lock.try_lock()) { + if (blitmx.try_lock()) { return; } - blit_lock.lock(); + blitmx.lock(); } void endblit() { blitmx_contention--; - blit_lock.unlock(); + blitmx.unlock(); if (blitmx_contention > 0) { // a deadlock has been observed on linux when toggling via video_toggle_option // because the mutex is typically unfair on linux From 8b99f9f3604242555c071ad4fbb4834a6084dd5c Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 1 Aug 2022 17:36:46 +0600 Subject: [PATCH 225/386] qt: avoid zero-sized main window --- src/qt/qt_mainwindow.cpp | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 144c55d2d..63e876944 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -650,6 +650,11 @@ MainWindow::~MainWindow() { void MainWindow::showEvent(QShowEvent *event) { if (shownonce) return; shownonce = true; + if (window_remember) { + if (window_w < 320) window_w = 320; + if (window_h < 200) window_h = 200; + } + if (window_remember && !QApplication::platformName().contains("wayland")) { setGeometry(window_x, window_y, window_w, window_h + menuBar()->height() + (hide_status_bar ? 0 : statusBar()->height()) + (hide_tool_bar ? 0 : ui->toolBar->height())); } From af316716199207c786e032eaafc67e5242da2908 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 1 Aug 2022 18:06:45 +0600 Subject: [PATCH 226/386] Update qt_mainwindow.cpp --- src/qt/qt_mainwindow.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 63e876944..ebccbe0cb 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -651,8 +651,8 @@ void MainWindow::showEvent(QShowEvent *event) { if (shownonce) return; shownonce = true; if (window_remember) { - if (window_w < 320) window_w = 320; - if (window_h < 200) window_h = 200; + if (window_w == 0) window_w = 320; + if (window_h == 0) window_h = 200; } if (window_remember && !QApplication::platformName().contains("wayland")) { From e2a03f436e240d4400f4f5bbdb7487b047f35c05 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Tue, 2 Aug 2022 00:14:09 +0600 Subject: [PATCH 227/386] qt: properly update "Show non-primary monitors" settings when they are closed --- src/qt/qt_mainwindow.cpp | 2 +- src/qt/qt_mainwindow.hpp | 1 + src/qt/qt_rendererstack.cpp | 6 ++++-- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 63e876944..4c2c8297a 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -2058,7 +2058,7 @@ void MainWindow::on_actionMCA_devices_triggered() void MainWindow::on_actionShow_non_primary_monitors_triggered() { - show_second_monitors ^= 1; + show_second_monitors = (int)ui->actionShow_non_primary_monitors->isChecked(); blitDummied = true; diff --git a/src/qt/qt_mainwindow.hpp b/src/qt/qt_mainwindow.hpp index a7d029bff..0f8a5ecd2 100644 --- a/src/qt/qt_mainwindow.hpp +++ b/src/qt/qt_mainwindow.hpp @@ -148,6 +148,7 @@ private: friend class SpecifyDimensions; friend class ProgSettings; friend class RendererCommon; + friend class RendererStack; // For UI variable access by non-primary renderer windows. }; #endif // QT_MAINWINDOW_HPP diff --git a/src/qt/qt_rendererstack.cpp b/src/qt/qt_rendererstack.cpp index 7a802e898..273bc4c95 100644 --- a/src/qt/qt_rendererstack.cpp +++ b/src/qt/qt_rendererstack.cpp @@ -32,6 +32,8 @@ #include "qt_mainwindow.hpp" #include "qt_util.hpp" +#include "ui_qt_mainwindow.h" + #include "evdev_mouse.hpp" #include @@ -459,9 +461,9 @@ RendererStack::blitCommon(int x, int y, int w, int h) void RendererStack::closeEvent(QCloseEvent* event) { - if (cpu_thread_run == 0 || is_quit == 0) { + if (cpu_thread_run == 1 || is_quit == 0) { event->accept(); - show_second_monitors = 0; // TODO: This isn't actually the right fix, so fix this properly. + main_window->ui->actionShow_non_primary_monitors->setChecked(false); return; } event->ignore(); From 754058e2e509298f70107fc1648099251ba5fa47 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 1 Aug 2022 23:40:11 +0200 Subject: [PATCH 228/386] AAM and AAD instruction fixes, fixes #2551. --- src/cpu/386_common.c | 6 ++++++ src/cpu/cpu.c | 8 +++++--- src/cpu/cpu.h | 1 + src/cpu/x86.h | 5 +++-- src/cpu/x86_ops_bcd.h | 9 ++++++++- src/cpu/x86seg.c | 8 ++++++++ 6 files changed, 31 insertions(+), 6 deletions(-) diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c index 6c09e588a..92360a248 100644 --- a/src/cpu/386_common.c +++ b/src/cpu/386_common.c @@ -1481,10 +1481,16 @@ checkio(uint32_t port) } +#ifdef OLD_DIVEXCP #define divexcp() { \ x386_common_log("Divide exception at %04X(%06X):%04X\n",CS,cs,cpu_state.pc); \ x86_int(0); \ } +#else +#define divexcp() { \ + x86de(NULL, 0); \ +} +#endif int diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index 68cf6c38f..36d92605f 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -382,10 +382,10 @@ cpu_set(void) is_am486 = (cpu_s->cpu_type == CPU_ENH_Am486DX); is_am486dxl = (cpu_s->cpu_type == CPU_Am486DXL); - is6117 = !strcmp(cpu_f->manufacturer, "ALi"); + is6117 = !strcmp(cpu_f->manufacturer, "ALi"); - cpu_isintel = !strcmp(cpu_f->manufacturer, "Intel"); - cpu_iscyrix = !strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST"); + cpu_isintel = !strcmp(cpu_f->manufacturer, "Intel"); + cpu_iscyrix = !strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST"); /* SL-Enhanced Intel 486s have the same SMM save state table layout as Pentiums, and the WinChip datasheet claims those are Pentium-compatible as well. AMD Am486DXL/DXL2 also has compatible SMM, or would if not for it's different SMBase*/ @@ -398,6 +398,8 @@ cpu_set(void) is_cxsmm = (!strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST")) && (cpu_s->cpu_type >= CPU_Cx486S); + cpu_isintel = cpu_isintel || !strcmp(cpu_f->manufacturer, "AMD"); + hasfpu = (fpu_type != FPU_NONE); hascache = (cpu_s->cpu_type >= CPU_486SLC) || (cpu_s->cpu_type == CPU_IBM386SLC) || (cpu_s->cpu_type == CPU_IBM486SLC) || (cpu_s->cpu_type == CPU_IBM486BL); diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index b6998162f..964c456eb 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -669,6 +669,7 @@ extern void hardresetx86(void); extern void x86_int(int num); extern void x86_int_sw(int num); extern int x86_int_sw_rm(int num); +extern void x86de(char *s, uint16_t error); extern void x86gpf(char *s, uint16_t error); extern void x86np(char *s, uint16_t error); extern void x86ss(char *s, uint16_t error); diff --git a/src/cpu/x86.h b/src/cpu/x86.h index b9726dc57..32a3317ea 100644 --- a/src/cpu/x86.h +++ b/src/cpu/x86.h @@ -1,4 +1,4 @@ -#define ABRT_MASK 0x7f +#define ABRT_MASK 0x3f /*An 'expected' exception is one that would be expected to occur on every execution of this code path; eg a GPF due to being in v86 mode. An 'unexpected' exception is one that would be unlikely to occur on the next exception, eg a page fault may be @@ -71,7 +71,8 @@ enum ABRT_NP = 0xB, ABRT_SS = 0xC, ABRT_GPF = 0xD, - ABRT_PF = 0xE + ABRT_PF = 0xE, + ABRT_DE = 0x40 /* INT 0, but we have to distinguish it from ABRT_NONE. */ }; diff --git a/src/cpu/x86_ops_bcd.h b/src/cpu/x86_ops_bcd.h index 385d63cd7..b37b6a6df 100644 --- a/src/cpu/x86_ops_bcd.h +++ b/src/cpu/x86_ops_bcd.h @@ -31,7 +31,14 @@ static int opAAD(uint32_t fetchdat) static int opAAM(uint32_t fetchdat) { int base = getbytef(); - if (!base || !cpu_isintel) base = 10; + + if (base == 0) { + x86de(NULL, 0); + return 1; + } + + if (!cpu_isintel) base = 10; + AH = AL / base; AL %= base; setznp16(AX); diff --git a/src/cpu/x86seg.c b/src/cpu/x86seg.c index e103f0247..c9398dd69 100644 --- a/src/cpu/x86seg.c +++ b/src/cpu/x86seg.c @@ -165,6 +165,14 @@ x86_doabrt(int x86_abrt) } +void +x86de(char *s, uint16_t error) +{ + cpu_state.abrt = ABRT_DE; + abrt_error = error; +} + + void x86gpf(char *s, uint16_t error) { From 49f8ae46999c4c62f7d17702d9d327485d440f97 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 2 Aug 2022 00:05:23 +0200 Subject: [PATCH 229/386] Fixed migration of old window coordinates, fixes #2550. --- src/config.c | 96 ++++++++++++++++++++++++++++++---------------------- 1 file changed, 55 insertions(+), 41 deletions(-) diff --git a/src/config.c b/src/config.c index d22d25b1d..2a2f58c6c 100644 --- a/src/config.c +++ b/src/config.c @@ -72,6 +72,9 @@ #include <86box/snd_opl.h> +static int cx, cy, cw, ch; + + typedef struct _list_ { struct _list_ *next; } list_t; @@ -616,6 +619,40 @@ load_general(void) video_framerate = config_get_int(cat, "video_gl_framerate", -1); video_vsync = config_get_int(cat, "video_gl_vsync", 0); strncpy(video_shader, config_get_string(cat, "video_gl_shader", ""), sizeof(video_shader)); + + window_remember = config_get_int(cat, "window_remember", 0); + if (window_remember) { + p = config_get_string(cat, "window_coordinates", NULL); + if (p == NULL) + p = "0, 0, 0, 0"; + sscanf(p, "%i, %i, %i, %i", &cw, &ch, &cx, &cy); + } else { + cw = ch = cx = cy = 0; + config_delete_var(cat, "window_remember"); + } + + config_delete_var(cat, "window_coordinates"); +} + +/* Load monitor section. */ +static void +load_monitor(int monitor_index) +{ + char cat[512], temp[512]; + char *p = NULL; + + sprintf(cat, "Monitor #%i", monitor_index + 1); + sprintf(temp, "%i, %i, %i, %i", cx, cy, cw, ch); + + p = config_get_string(cat, "window_coordinates", NULL); + + if (p == NULL) + p = temp; + + if (window_remember) + sscanf(p, "%i, %i, %i, %i", + &monitor_settings[monitor_index].mon_window_x, &monitor_settings[monitor_index].mon_window_y, + &monitor_settings[monitor_index].mon_window_w, &monitor_settings[monitor_index].mon_window_h); } /* Load "Machine" section. */ @@ -938,47 +975,6 @@ load_video(void) gfxcard_2 = video_get_video_from_internal_name(p); } -static void -load_monitor(int monitor_index) -{ - char monitor_config_name[sizeof("Monitor #") + 12] = { [0] = 0 }; - char *ptr = NULL; - - if (monitor_index == 0) { - /* Migrate configs */ - ptr = config_get_string("General", "window_coordinates", NULL); - - config_delete_var("General", "window_coordinates"); - } - snprintf(monitor_config_name, sizeof(monitor_config_name), "Monitor #%i", monitor_index + 1); - if (!ptr) - ptr = config_get_string(monitor_config_name, "window_coordinates", "0, 0, 0, 0"); - if (window_remember || (vid_resize & 2)) - sscanf(ptr, "%i, %i, %i, %i", - &monitor_settings[monitor_index].mon_window_x, &monitor_settings[monitor_index].mon_window_y, - &monitor_settings[monitor_index].mon_window_w, &monitor_settings[monitor_index].mon_window_h); -} - -static void -save_monitor(int monitor_index) -{ - char monitor_config_name[sizeof("Monitor #") + 12] = { [0] = 0 }; - char saved_coordinates[12 * 4 + 8 + 1] = { [0] = 0 }; - - snprintf(monitor_config_name, sizeof(monitor_config_name), "Monitor #%i", monitor_index + 1); - if (!(monitor_settings[monitor_index].mon_window_x == 0 - && monitor_settings[monitor_index].mon_window_y == 0 - && monitor_settings[monitor_index].mon_window_w == 0 - && monitor_settings[monitor_index].mon_window_h == 0) - && (window_remember || (vid_resize & 2))) { - snprintf(saved_coordinates, sizeof(saved_coordinates), "%i, %i, %i, %i", monitor_settings[monitor_index].mon_window_x, monitor_settings[monitor_index].mon_window_y, - monitor_settings[monitor_index].mon_window_w, monitor_settings[monitor_index].mon_window_h); - - config_set_string(monitor_config_name, "window_coordinates", saved_coordinates); - } else - config_delete_var(monitor_config_name, "window_coordinates"); -} - /* Load "Input Devices" section. */ static void load_input_devices(void) @@ -2403,6 +2399,24 @@ save_general(void) delete_section_if_empty(cat); } +/* Save monitor section. */ +static void +save_monitor(int monitor_index) +{ + char cat[sizeof("Monitor #") + 12] = { [0] = 0 }; + char temp[512]; + + snprintf(cat, sizeof(cat), "Monitor #%i", monitor_index + 1); + if (window_remember) { + sprintf(temp, "%i, %i, %i, %i", + monitor_settings[monitor_index].mon_window_x, monitor_settings[monitor_index].mon_window_y, + monitor_settings[monitor_index].mon_window_w, monitor_settings[monitor_index].mon_window_h); + + config_set_string(cat, "window_coordinates", temp); + } else + config_delete_var(cat, "window_coordinates"); +} + /* Save "Machine" section. */ static void save_machine(void) From f5be05a19c7c69e97337dbaa4552b58484bf08b5 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 2 Aug 2022 02:30:41 +0200 Subject: [PATCH 230/386] Implement OAK OTi-0x7 clock select. --- src/video/vid_oak_oti.c | 54 ++++++++++++++++++++++++++++++++--------- 1 file changed, 43 insertions(+), 11 deletions(-) diff --git a/src/video/vid_oak_oti.c b/src/video/vid_oak_oti.c index 210afc2b2..7572e44b6 100644 --- a/src/video/vid_oak_oti.c +++ b/src/video/vid_oak_oti.c @@ -41,7 +41,7 @@ enum { OTI_037C, OTI_067 = 2, OTI_067_AMA932J, - OTI_067_M300 = 4, + OTI_067_M300 = 4, OTI_077 = 5 }; @@ -342,29 +342,61 @@ oti_pos_in(uint16_t addr, void *p) } +static float +oti_getclock(int clock) +{ + float ret = 0.0; + + switch (clock) { + case 0: + default: + ret = 25175000.0; + break; + case 1: + ret = 28322000.0; + break; + case 4: + ret = 14318000.0; + break; + case 5: + ret = 16257000.0; + break; + case 7: + ret = 35500000.0; + break; + } + +} + + static void oti_recalctimings(svga_t *svga) { oti_t *oti = (oti_t *)svga->p; + int clk_sel = ((svga->miscout >> 2) & 3) | ((oti->regs[0x0d] & 0x20) >> 3); - if (oti->regs[0x14] & 0x08) svga->ma_latch |= 0x10000; + svga->clock = (cpuclock * (double)(1ull << 32)) / oti_getclock(clk_sel); + + if (oti->chip_id > 0) { + if (oti->regs[0x14] & 0x08) svga->ma_latch |= 0x10000; if (oti->regs[0x16] & 0x08) svga->ma_latch |= 0x20000; if (oti->regs[0x14] & 0x01) svga->vtotal += 0x400; if (oti->regs[0x14] & 0x02) svga->dispend += 0x400; if (oti->regs[0x14] & 0x04) svga->vsyncstart += 0x400; + svga->interlace = oti->regs[0x14] & 0x80; + } + if ((oti->regs[0x0d] & 0x0c) && !(oti->regs[0x0d] & 0x10)) svga->rowoffset <<= 1; - svga->interlace = oti->regs[0x14] & 0x80; - - if (svga->bpp == 16) { - svga->render = svga_render_16bpp_highres; - svga->hdisp >>= 1; - } else if (svga->bpp == 15) { - svga->render = svga_render_15bpp_highres; - svga->hdisp >>= 1; - } + if (svga->bpp == 16) { + svga->render = svga_render_16bpp_highres; + svga->hdisp >>= 1; + } else if (svga->bpp == 15) { + svga->render = svga_render_15bpp_highres; + svga->hdisp >>= 1; + } } From f96eb5a2fcbca7d07fc1d0c1b8bd91d3548a42cb Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 2 Aug 2022 02:57:00 +0200 Subject: [PATCH 231/386] Pausing the emulator, including using the Pause key, now also releases mouse capture, closes #2293. --- src/qt/qt_platform.cpp | 4 ++++ src/win/win_ui.c | 6 ++++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/src/qt/qt_platform.cpp b/src/qt/qt_platform.cpp index 527b4e2ab..8aa85fb9c 100644 --- a/src/qt/qt_platform.cpp +++ b/src/qt/qt_platform.cpp @@ -336,11 +336,15 @@ plat_pause(int p) #endif return; } + if ((p == 0) && (time_sync & TIME_SYNC_ENABLED)) nvr_time_sync(); dopause = p; if (p) { + if (mouse_capture) + plat_mouse_capture(0); + wcsncpy(oldtitle, ui_window_title(NULL), sizeof_w(oldtitle) - 1); wcscpy(title, oldtitle); paused_msg[QObject::tr(" - PAUSED").toWCharArray(paused_msg)] = 0; diff --git a/src/win/win_ui.c b/src/win/win_ui.c index 4342626a4..96ad662bd 100644 --- a/src/win/win_ui.c +++ b/src/win/win_ui.c @@ -1491,13 +1491,15 @@ plat_pause(int p) } if (p) { + if (mouse_capture) + plat_mouse_capture(0); + wcsncpy(oldtitle, ui_window_title(NULL), sizeof_w(oldtitle) - 1); wcscpy(title, oldtitle); wcscat(title, plat_get_string(IDS_2051)); ui_window_title(title); - } else { + } else ui_window_title(oldtitle); - } /* If un-pausing, synchronize the internal clock with the host's time. */ if ((p == 0) && (time_sync & TIME_SYNC_ENABLED)) From 31fde716b74e6bfbbb880cc24d017f6c2fd76c46 Mon Sep 17 00:00:00 2001 From: Robert de Rooy Date: Tue, 2 Aug 2022 07:49:01 +0200 Subject: [PATCH 232/386] add openal to build requirements --- src/unix/assets/86Box.spec | 1 + 1 file changed, 1 insertion(+) diff --git a/src/unix/assets/86Box.spec b/src/unix/assets/86Box.spec index f0b15a45a..bc2fc3a0a 100644 --- a/src/unix/assets/86Box.spec +++ b/src/unix/assets/86Box.spec @@ -34,6 +34,7 @@ BuildRequires: libappstream-glib BuildRequires: libevdev-devel BuildRequires: libXi-devel BuildRequires: ninja-build +BuildRequires: openal-soft-devel BuildRequires: qt5-linguist BuildRequires: qt5-qtconfiguration-devel BuildRequires: qt5-qtbase-private-devel From 99b231b0a9a1b3fcc8711e5a1fc715a47e38f4dd Mon Sep 17 00:00:00 2001 From: Robert de Rooy Date: Tue, 2 Aug 2022 07:52:01 +0200 Subject: [PATCH 233/386] drop romversion since it is now in sync with release --- bumpversion.sh | 11 +---------- src/unix/assets/86Box.spec | 10 ++++------ 2 files changed, 5 insertions(+), 16 deletions(-) diff --git a/bumpversion.sh b/bumpversion.sh index 7fb0e96eb..31ebf154b 100644 --- a/bumpversion.sh +++ b/bumpversion.sh @@ -17,10 +17,9 @@ # Parse arguments. newversion="$1" -romversion="$2" if [ -z "$(echo "$newversion" | grep '\.')" ] then - echo '[!] Usage: bumpversion.sh x.y[.z] [romversion]' + echo '[!] Usage: bumpversion.sh x.y[.z]' exit 1 fi shift @@ -32,13 +31,6 @@ newversion_patch=$(echo "$newversion" | cut -d. -f3) [ -z "$newversion_patch" ] && newversion_patch=0 -if [ -z "${romversion}" ]; then - # Get the latest ROM release from the GitHub API. - romversion=$(curl --silent "https://api.github.com/repos/86Box/roms/releases/latest" | - grep '"tag_name":' | - sed -E 's/.*"([^"]+)".*/\1/') -fi - # Switch to the repository root directory. cd "$(dirname "$0")" || exit @@ -69,7 +61,6 @@ patch_file src/include_make/*/version.h EMU_VERSION_PATCH 's/(#\s*define\s+EMU_V patch_file src/include_make/*/version.h COPYRIGHT_YEAR 's/(#\s*define\s+COPYRIGHT_YEAR\s+)[0-9]+/\1'"$(date +%Y)"'/' patch_file src/include_make/*/version.h EMU_DOCS_URL 's/(#\s*define\s+EMU_DOCS_URL\s+"https:\/\/[^\/]+\/en\/v)[^\/]+/\1'"$newversion_maj.$newversion_min"'/' patch_file src/unix/assets/*.spec Version 's/(Version:\s+)[0-9].+/\1'"$newversion"'/' -patch_file src/unix/assets/*.spec '%global romver' 's/(^%global\ romver\s+)[0-9]{8}/\1'"$romversion"'/' patch_file src/unix/assets/*.spec 'changelog version' 's/(^[*]\s.*>\s+)[0-9].+/\1'"$newversion"-1'/' patch_file src/unix/assets/*.spec 'changelog date' 's/(^[*]\s)[a-zA-Z]{3}\s[a-zA-Z]{3}\s[0-9]{2}\s[0-9]{4}/\1'"$(pretty_date)"'/' patch_file src/unix/assets/*.metainfo.xml release 's/( Date: Tue, 2 Aug 2022 16:59:24 +0600 Subject: [PATCH 234/386] qt: Fix unresponsive progress bar when creating floppy images --- src/qt/qt_newfloppydialog.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/qt/qt_newfloppydialog.cpp b/src/qt/qt_newfloppydialog.cpp index 576798e54..1581c6e52 100644 --- a/src/qt/qt_newfloppydialog.cpp +++ b/src/qt/qt_newfloppydialog.cpp @@ -187,6 +187,7 @@ void NewFloppyDialog::onCreate() { QProgressDialog progress("Creating floppy image", QString(), 0, 100, this); connect(this, &NewFloppyDialog::fileProgress, &progress, &QProgressDialog::setValue); + connect(this, &NewFloppyDialog::fileProgress, [] { QApplication::processEvents(); }); switch (mediaType_) { case MediaType::Floppy: if (fi.suffix().toLower() == QStringLiteral("86f")) { From f394fb20fb0404edbd948b278bbd03a6786909d3 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Tue, 2 Aug 2022 16:24:33 -0300 Subject: [PATCH 235/386] Bump version to 3.7.1 --- CMakeLists.txt | 2 +- src/include_make/86box/version.h | 4 ++-- src/unix/assets/86Box.spec | 4 ++-- src/unix/assets/net.86box.86Box.metainfo.xml | 2 +- vcpkg.json | 2 +- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index f3d7ae4f6..542d446cb 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -40,7 +40,7 @@ if(MUNT_EXTERNAL) endif() project(86Box - VERSION 3.7 + VERSION 3.7.1 DESCRIPTION "Emulator of x86-based systems" HOMEPAGE_URL "https://86box.net" LANGUAGES C CXX) diff --git a/src/include_make/86box/version.h b/src/include_make/86box/version.h index 4c7bca1bd..4fccf12f7 100644 --- a/src/include_make/86box/version.h +++ b/src/include_make/86box/version.h @@ -20,12 +20,12 @@ #define EMU_NAME "86Box" #define EMU_NAME_W LSTR(EMU_NAME) -#define EMU_VERSION "3.7" +#define EMU_VERSION "3.7.1" #define EMU_VERSION_W LSTR(EMU_VERSION) #define EMU_VERSION_EX "3.50" /* frozen due to IDE re-detection behavior on Windows */ #define EMU_VERSION_MAJ 3 #define EMU_VERSION_MIN 7 -#define EMU_VERSION_PATCH 0 +#define EMU_VERSION_PATCH 1 #define EMU_BUILD_NUM 0 diff --git a/src/unix/assets/86Box.spec b/src/unix/assets/86Box.spec index 5014c3768..d5fe0a0b1 100644 --- a/src/unix/assets/86Box.spec +++ b/src/unix/assets/86Box.spec @@ -13,7 +13,7 @@ # sudo dnf install RPMS/$(uname -m)/86Box-3* RPMS/noarch/86Box-roms* Name: 86Box -Version: 3.7 +Version: 3.7.1 Release: 1%{?dist} Summary: Classic PC emulator License: GPLv2+ @@ -115,5 +115,5 @@ popd %{_datadir}/%{name}/roms %changelog -* Sat Jul 30 2022 Robert de Rooy 3.7-1 +* Tue Aug 02 2022 Robert de Rooy 3.7.1-1 - Bump release diff --git a/src/unix/assets/net.86box.86Box.metainfo.xml b/src/unix/assets/net.86box.86Box.metainfo.xml index d024b0a1e..a4458cfad 100644 --- a/src/unix/assets/net.86box.86Box.metainfo.xml +++ b/src/unix/assets/net.86box.86Box.metainfo.xml @@ -10,7 +10,7 @@ net.86box.86Box.desktop - + diff --git a/vcpkg.json b/vcpkg.json index 2f70e4456..19dd09354 100644 --- a/vcpkg.json +++ b/vcpkg.json @@ -1,6 +1,6 @@ { "name": "86box", - "version-string": "3.7", + "version-string": "3.7.1", "homepage": "https://86box.net/", "documentation": "http://86box.readthedocs.io/", "license": "GPL-2.0-or-later", From b793e9fe2b4856fc8a824bf824eaed36f1785801 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Wed, 3 Aug 2022 01:39:43 +0600 Subject: [PATCH 236/386] fluidsynth: Add channel pressure handling --- src/sound/midi_fluidsynth.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/sound/midi_fluidsynth.c b/src/sound/midi_fluidsynth.c index 749c74b9f..79a2bcad6 100644 --- a/src/sound/midi_fluidsynth.c +++ b/src/sound/midi_fluidsynth.c @@ -58,6 +58,7 @@ static int (*f_delete_fluid_synth)(void *synth); static int (*f_fluid_synth_noteon)(void *synth, int chan, int key, int vel); static int (*f_fluid_synth_noteoff)(void *synth, int chan, int key); static int (*f_fluid_synth_cc)(void *synth, int chan, int ctrl, int val); +static int (*f_fluid_synth_channel_pressure)(void *synth, int chan, int val); static int (*f_fluid_synth_sysex)(void *synth, const char *data, int len, char *response, int *response_len, int *handled, int dryrun); static int (*f_fluid_synth_pitch_bend)(void *synth, int chan, int val); static int (*f_fluid_synth_program_change)(void *synth, int chan, int program); @@ -83,6 +84,7 @@ static dllimp_t fluidsynth_imports[] = { { "fluid_synth_noteon", &f_fluid_synth_noteon }, { "fluid_synth_noteoff", &f_fluid_synth_noteoff }, { "fluid_synth_cc", &f_fluid_synth_cc }, + { "fluid_synth_channel_pressure", &f_fluid_synth_channel_pressure }, { "fluid_synth_sysex", &f_fluid_synth_sysex }, { "fluid_synth_pitch_bend", &f_fluid_synth_pitch_bend }, { "fluid_synth_program_change", &f_fluid_synth_program_change }, @@ -199,6 +201,7 @@ fluidsynth_msg(uint8_t *msg) f_fluid_synth_program_change(data->synth, chan, param1); break; case 0xD0: /* Channel Pressure */ + f_fluid_synth_channel_pressure(data->synth, chan, param1); break; case 0xE0: /* Pitch Bend */ f_fluid_synth_pitch_bend(data->synth, chan, (param2 << 7) | param1); From 81978c95392fa9797f2b7f439ebd4d8cbf5b7e69 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Tue, 2 Aug 2022 22:38:20 +0200 Subject: [PATCH 237/386] pit_fast: fix off by one error with mode 2 counter --- src/pit_fast.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/pit_fast.c b/src/pit_fast.c index 704cfd68c..758183d5e 100644 --- a/src/pit_fast.c +++ b/src/pit_fast.c @@ -145,6 +145,8 @@ pitf_dump_and_disable_timer(ctrf_t *ctr) { if (ctr->using_timer && timer_is_enabled(&ctr->timer)) { ctr->count = pitf_read_timer(ctr); + if (ctr->m == 2) + ctr->count--; /* Don't store the offset from pitf_read_timer */ timer_disable(&ctr->timer); } } From acd2d8b801d033c34a762b064dbf3e4c3cd31525 Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Tue, 2 Aug 2022 17:08:12 -0400 Subject: [PATCH 238/386] qt: Update cdrom media menu to make it more consistent with floppy. Add current image name to cdrom and floppy media menu. Don't display reload option unless previous image is set. --- src/qt/qt_mediamenu.cpp | 19 ++++++++++++------- src/qt/qt_mediamenu.hpp | 1 - 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/src/qt/qt_mediamenu.cpp b/src/qt/qt_mediamenu.cpp index 96fba3808..a4fcb5113 100644 --- a/src/qt/qt_mediamenu.cpp +++ b/src/qt/qt_mediamenu.cpp @@ -115,13 +115,12 @@ void MediaMenu::refresh(QMenu *parentMenu) { cdromMutePos = menu->children().count(); menu->addAction(tr("&Mute"), [this, i]() { cdromMute(i); })->setCheckable(true); menu->addSeparator(); - cdromEmptyPos = menu->children().count(); - menu->addAction(tr("E&mpty"), [this, i]() { cdromEject(i); })->setCheckable(true); + menu->addAction(tr("&Image..."), [this, i]() { cdromMount(i); })->setCheckable(false); cdromReloadPos = menu->children().count(); menu->addAction(tr("&Reload previous image"), [this, i]() { cdromReload(i); }); menu->addSeparator(); cdromImagePos = menu->children().count(); - menu->addAction(tr("&Image"), [this, i]() { cdromMount(i); })->setCheckable(true); + menu->addAction(tr("E&ject"), [this, i]() { cdromEject(i); })->setCheckable(false); cdromMenus[i] = menu; cdromUpdateMenu(i); }); @@ -344,6 +343,7 @@ void MediaMenu::floppyExportTo86f(int i) { void MediaMenu::floppyUpdateMenu(int i) { QString name = floppyfns[i]; + QFileInfo fi(floppyfns[i]); if (!floppyMenus.contains(i)) return; @@ -354,6 +354,7 @@ void MediaMenu::floppyUpdateMenu(int i) { auto* ejectMenu = dynamic_cast(childs[floppyEjectPos]); auto* exportMenu = dynamic_cast(childs[floppyExportPos]); ejectMenu->setEnabled(!name.isEmpty()); + ejectMenu->setText(QString::asprintf(tr("Eject %s").toUtf8().constData(), name.isEmpty() ? QString().toUtf8().constData() : fi.fileName().toUtf8().constData())); exportMenu->setEnabled(!name.isEmpty()); int type = fdd_get_type(i); @@ -428,6 +429,10 @@ void MediaMenu::cdromReload(int i) { void MediaMenu::cdromUpdateMenu(int i) { QString name = cdrom[i].image_path; + QString prev_name = cdrom[i].prev_image_path; + QFileInfo fi(cdrom[i].image_path); + QFileInfo fi_prev(cdrom[i].prev_image_path); + if (!cdromMenus.contains(i)) return; auto* menu = cdromMenus[i]; @@ -437,12 +442,12 @@ void MediaMenu::cdromUpdateMenu(int i) { muteMenu->setChecked(cdrom[i].sound_on == 0); auto* imageMenu = dynamic_cast(childs[cdromImagePos]); - auto* emptyMenu = dynamic_cast(childs[cdromEmptyPos]); - imageMenu->setChecked(cdrom[i].host_drive == 200); - emptyMenu->setChecked(cdrom[i].host_drive != 200); + imageMenu->setEnabled(!name.isEmpty()); + imageMenu->setText(QString::asprintf(tr("Eject %s").toUtf8().constData(), name.isEmpty() ? QString().toUtf8().constData() : fi.fileName().toUtf8().constData())); auto* prevMenu = dynamic_cast(childs[cdromReloadPos]); - prevMenu->setEnabled(cdrom[i].prev_host_drive != 0); + prevMenu->setText(QString::asprintf(tr("Reload %s").toUtf8().constData(), prev_name.isEmpty() ? tr("previous image").toUtf8().constData() : fi_prev.fileName().toUtf8().constData())); + prevMenu->setVisible(name.isEmpty() && cdrom[i].prev_host_drive != 0); QString busName = tr("Unknown Bus"); switch (cdrom[i].bus_type) { diff --git a/src/qt/qt_mediamenu.hpp b/src/qt/qt_mediamenu.hpp index 94f547d3f..9b08d3ee3 100644 --- a/src/qt/qt_mediamenu.hpp +++ b/src/qt/qt_mediamenu.hpp @@ -80,7 +80,6 @@ private: int floppyEjectPos; int cdromMutePos; - int cdromEmptyPos; int cdromReloadPos; int cdromImagePos; From ef4cb332590203160a763e0bfb78a4bc35de5d8e Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 3 Aug 2022 00:19:13 +0200 Subject: [PATCH 239/386] Reverted the old AMIkeyboard controller fix and implemented proper fixes to some AMI keyboard controller commands to make the Vi15G work with a 'F' keyboard controller. --- src/device/keyboard_at.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/src/device/keyboard_at.c b/src/device/keyboard_at.c index 24b0775c4..5d38088ed 100644 --- a/src/device/keyboard_at.c +++ b/src/device/keyboard_at.c @@ -1398,7 +1398,7 @@ write64_ami(void *priv, uint8_t val) else add_data(dev, 'H'); } else - add_data(dev, 'H'); + add_data(dev, 'F'); return 0; case 0xa2: /* clear keyboard controller lines P22/P23 */ @@ -1438,7 +1438,7 @@ write64_ami(void *priv, uint8_t val) case 0xa6: /* read clock */ if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { kbd_log("ATkbc: AMI - read clock\n"); - add_data(dev, !!(dev->ami_stat & 1)); + add_to_kbc_queue_front(dev, (dev->ami_stat & 1) ? 0xff : 0x00, 0, 0x00); return 0; } break; @@ -1462,7 +1462,7 @@ write64_ami(void *priv, uint8_t val) case 0xa9: /* read cache */ if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { kbd_log("ATkbc: AMI - read cache\n"); - add_data(dev, !!(dev->ami_stat & 2)); + add_to_kbc_queue_front(dev, (dev->ami_stat & 2) ? 0xff : 0x00, 0, 0x00); return 0; } break; @@ -1535,7 +1535,7 @@ write64_ami(void *priv, uint8_t val) * (allow command D1 to change bits 2/3 of the output port) */ kbd_log("ATkbc: AMI - unblock KBC lines P22 and P23\n"); - dev->output_locked = 1; + dev->ami_flags &= 0xfb; return 0; case 0xc9: @@ -1544,7 +1544,7 @@ write64_ami(void *priv, uint8_t val) * (disallow command D1 from changing bits 2/3 of the port) */ kbd_log("ATkbc: AMI - block KBC lines P22 and P23\n"); - dev->output_locked = 1; + dev->ami_flags |= 0x04; return 0; case 0xcc: @@ -1796,7 +1796,9 @@ kbd_write(uint16_t port, uint8_t val, void *priv) case 0xd1: /* write output port */ kbd_log("ATkbc: write output port\n"); - if (dev->output_locked) { + /* Bit 2 of AMI flags is P22-P23 blocked (1 = yes, 0 = no), + discovered by reverse-engineering the AOpeN Vi15G BIOS. */ + if (dev->ami_flags & 0x04) { /*If keyboard controller lines P22-P23 are blocked, we force them to remain unchanged.*/ val &= ~0x0c; @@ -2259,6 +2261,7 @@ kbd_reset(void *priv) set_scancode_map(dev); dev->ami_flags = ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) ? 0x01 : 0x00; + dev->ami_stat |= 0x02; } From 04e7fc2640bb7ba33cc28dcc6fc23a362c61d543 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 2 Aug 2022 18:48:35 -0400 Subject: [PATCH 240/386] Add missing functions, and machine_table device entries --- src/include/86box/machine.h | 3 + src/machine/machine_table.c | 1242 ++++++++++++++++++++++++++--------- 2 files changed, 939 insertions(+), 306 deletions(-) diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index b43f9e1ec..656809932 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -320,6 +320,9 @@ extern int machine_get_machine_from_internal_name(char *s); extern void machine_init(void); #ifdef EMU_DEVICE_H extern const device_t *machine_getdevice(int m); +extern const device_t *machine_getviddevice(int m); +extern const device_t *machine_getsnddevice(int m); +extern const device_t *machine_getnetdevice(int m); #endif extern char *machine_get_internal_name_ex(int m); extern int machine_get_nvrmask(int m); diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 07034c805..eaeed3e6b 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -234,7 +234,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] IBM PC (1982)", @@ -268,7 +270,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] IBM PCjr", @@ -302,7 +306,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = &pcjr_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] IBM XT (1982)", @@ -336,7 +342,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] IBM XT (1986)", @@ -370,7 +378,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] American XT Computer", @@ -404,7 +414,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] AMI XT clone", @@ -438,7 +450,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Bondwell BW230", @@ -472,7 +486,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Columbia Data Products MPC-1600", @@ -506,7 +522,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Compaq Portable", @@ -540,7 +558,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] DTK PIM-TB10-Z", @@ -574,7 +594,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Eagle PC Spirit", @@ -608,7 +630,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Generic XT clone", @@ -642,7 +666,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Hyosung Topstar 88T", @@ -676,7 +702,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Hyundai SUPER-16T", @@ -710,7 +738,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Hyundai SUPER-16TE", @@ -744,7 +774,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Juko ST", @@ -778,7 +810,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Kaypro PC", @@ -812,7 +846,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Multitech PC-500", @@ -846,7 +882,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Multitech PC-700", @@ -880,7 +918,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] NCR PC4i", @@ -914,7 +954,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Olivetti M19", @@ -948,7 +990,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = &m19_vid_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] OpenXT", @@ -982,7 +1026,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Philips P3105/NMS9100", @@ -1016,7 +1062,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Phoenix XT clone", @@ -1050,7 +1098,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Sanyo SX-16", @@ -1084,7 +1134,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Schneider EuroPC", @@ -1118,7 +1170,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Super PC/Turbo XT", @@ -1152,7 +1206,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Tandy 1000", @@ -1186,7 +1242,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = &vid_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Tandy 1000 HX", @@ -1220,7 +1278,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = &vid_device_hx, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Toshiba T1000", @@ -1254,7 +1314,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = &t1000_video_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Vendex HeadStart Turbo 888-XT", @@ -1288,7 +1350,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, #if defined(DEV_BRANCH) && defined(USE_LASERXT) { @@ -1323,7 +1387,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, #endif /* Has a standard PS/2 KBC (so, use IBM PS/2 Type 1). */ @@ -1359,7 +1425,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff04, .gpio = 0xffffffff, .device = &xi8088_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Z-NIX PC-1600", @@ -1393,7 +1461,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Zenith Data Systems Z-151/152/161", @@ -1427,7 +1497,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Zenith Data Systems Z-159", @@ -1461,7 +1533,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8088] Zenith Data Systems SupersPort (Z-184)", @@ -1495,7 +1569,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = &cga_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[GC100A] Philips P3120", @@ -1529,7 +1605,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 8086 Machines */ @@ -1565,7 +1643,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = &vid_1512_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8086] Amstrad PC1640", @@ -1599,7 +1679,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = &vid_1640_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8086] Amstrad PC2086", @@ -1633,7 +1715,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = &vid_pc2086_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8086] Amstrad PC3086", @@ -1667,7 +1751,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = &vid_pc3086_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8086] Amstrad PC20(0)", @@ -1701,7 +1787,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = &vid_200_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8086] Amstrad PPC512/640", @@ -1735,7 +1823,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = &vid_ppc512_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8086] Compaq Deskpro", @@ -1769,7 +1859,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8086] Olivetti M21/24/24SP", @@ -1803,7 +1895,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = &ogc_m24_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has Olivetti KBC firmware. */ { @@ -1838,7 +1932,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff04, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8086] Schetmash Iskra-3104", @@ -1872,7 +1968,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8086] Tandy 1000 SL/2", @@ -1906,7 +2004,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = &vid_device_sl, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8086] Victor V86P", @@ -1940,7 +2040,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[8086] Toshiba T1200", @@ -1974,7 +2076,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = &t1200_video_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, #if defined(DEV_BRANCH) && defined(USE_LASERXT) @@ -2010,7 +2114,9 @@ const machine_t machines[] = { .kbc_p1 = 0xff00, .gpio = 0xffffffff, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, #endif @@ -2048,7 +2154,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -2083,7 +2191,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -2118,7 +2228,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM AT KBC firmware. */ { @@ -2153,7 +2265,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* AMI BIOS for a chipset-less machine, most likely has AMI 'F' KBC firmware. */ { @@ -2188,7 +2302,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Uses Commodore (CBM) KBC firmware, to be implemented as identical to the IBM AT KBC firmware unless evidence emerges of any proprietary commands. */ @@ -2224,7 +2340,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Uses Compaq KBC firmware. */ { @@ -2259,7 +2377,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Uses Compaq KBC firmware. */ { @@ -2294,7 +2414,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &compaq_plasma_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM AT KBC firmware. */ { @@ -2329,7 +2451,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM AT KBC firmware. */ { @@ -2364,7 +2488,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, #if defined(DEV_BRANCH) && defined(USE_OLIVETTI) /* Has Olivetti KBC firmware. */ @@ -2400,7 +2526,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, #endif #if defined(DEV_BRANCH) && defined(USE_OPEN_AT) @@ -2437,7 +2565,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, #endif /* Has IBM AT KBC firmware. */ @@ -2473,7 +2603,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has Quadtel KBC firmware. */ { @@ -2508,7 +2640,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has a Siemens proprietary KBC which is completely undocumented. */ { @@ -2543,7 +2677,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has Toshiba's proprietary KBC, which is already implemented. */ { @@ -2578,7 +2714,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has Quadtel KBC firmware. */ { @@ -2613,7 +2751,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Most likely has AMI 'F' KBC firmware. */ { @@ -2648,7 +2788,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has "AMI KEYBOARD BIOS", most likely 'F'. */ { @@ -2683,7 +2825,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM AT KBC firmware. */ { @@ -2718,7 +2862,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM AT KBC firmware. */ { @@ -2753,7 +2899,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has Chips & Technologies KBC firmware. */ { @@ -2788,7 +2936,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -2823,7 +2973,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a VIA VT82C42N KBC. */ { @@ -2858,7 +3010,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a VIA VT82C42N KBC. */ { @@ -2893,7 +3047,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -2928,7 +3084,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -2963,7 +3121,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -2998,7 +3158,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM AT KBC firmware. */ { @@ -3033,7 +3195,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 286 machines that utilize the MCA bus */ @@ -3070,7 +3234,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 2 KBC firmware. */ { @@ -3105,7 +3271,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 386SX machines */ @@ -3143,7 +3311,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM AT KBC firmware. */ { @@ -3178,7 +3348,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has Quadtel KBC firmware. */ { @@ -3213,7 +3385,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ { @@ -3248,7 +3422,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has the AMIKey KBC firmware, which is an updated 'F' type. */ { @@ -3283,7 +3459,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has an AMI KBC firmware, the only photo of this is too low resolution for me to read what's on the KBC chip, so I'm going to assume AMI 'F' @@ -3320,7 +3498,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &tvga8900d_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* I'm going to assume this has a standard/generic IBM-compatible AT KBC firmware until the board is identified. */ @@ -3356,7 +3536,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -3391,7 +3573,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -3426,7 +3610,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has an AMI KBC firmware, the only photo of this is too low resolution for me to read what's on the KBC chip, so I'm going to assume AMI 'F' @@ -3463,7 +3649,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &oti067_ama932j_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has an unknown KBC firmware with commands B8 and BB in the style of Phoenix MultiKey and AMIKey-3(!), but also commands E1 and EA with @@ -3500,7 +3688,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has an AMI Keyboard BIOS PLUS KBC firmware ('8'). */ { .name = "[Intel 82335] Shuttle 386SX", @@ -3534,7 +3724,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Uses Commodore (CBM) KBC firmware, to be implemented as identical to the IBM PS/2 Type 1 KBC firmware unless evidence emerges of any @@ -3571,7 +3763,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM AT KBC firmware. */ { @@ -3606,7 +3800,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM AT KBC firmware. */ { @@ -3641,7 +3837,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Uses Commodore (CBM) KBC firmware, to be implemented as identical to the IBM PS/2 Type 1 KBC firmware unless evidence emerges of any @@ -3678,7 +3876,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &gd5402_onboard_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* The closest BIOS string I find to this one's, differs only in one part, and ends in -8, so I'm going to assume that this, too, has an AMI '8' @@ -3715,7 +3915,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -3750,7 +3952,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &ati28800k_spc6033p_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has an unknown AMI KBC firmware, I'm going to assume 'F' until a photo or real hardware BIOS string is found. */ @@ -3786,7 +3990,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has Quadtel KBC firmware. */ { @@ -3821,7 +4027,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 386SX machines which utilize the MCA bus */ @@ -3858,7 +4066,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -3893,7 +4103,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 486SLC machines */ @@ -3931,7 +4143,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 386DX machines */ @@ -3967,7 +4181,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has an AMI Keyboard BIOS PLUS KBC firmware ('8'). */ { @@ -4002,7 +4218,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM AT KBC firmware. */ { @@ -4037,7 +4255,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Uses Compaq KBC firmware. */ #if defined(DEV_BRANCH) && defined(USE_DESKPRO386) @@ -4073,7 +4293,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, #endif { @@ -4108,7 +4330,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &compaq_plasma_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM AT KBC firmware. */ { @@ -4143,7 +4367,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMIKey F KBC firmware. */ { @@ -4178,7 +4404,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 386DX machines which utilize the MCA bus */ @@ -4215,7 +4443,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 386DX/486 machines */ @@ -4253,7 +4483,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMIKey F KBC firmware. */ { @@ -4288,7 +4520,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMIKey F KBC firmware (it's just the MR BIOS for the above machine). */ { @@ -4323,7 +4557,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -4358,7 +4594,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -4393,7 +4631,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 486 machines - Socket 1 */ @@ -4434,7 +4674,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has JetKey 5 KBC Firmware - but the BIOS string ends in a hardcoded -F, and the BIOS also explicitly expects command A1 to return a 'F', so it looks like @@ -4471,7 +4713,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Uses some variant of Phoenix MultiKey/42 as the Intel 8242 chip has a Phoenix copyright. */ @@ -4507,7 +4751,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMI KF KBC firmware. */ { @@ -4542,7 +4788,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMIKey H KBC firmware, per the screenshot in "How computers & MS-DOS work". */ { @@ -4577,7 +4825,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMIKey F KBC firmware, per a photo of a monitor with the BIOS screen on eBay. */ @@ -4613,7 +4863,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a MR (!) KBC firmware, which is a clone of the standard IBM PS/2 KBC firmware. */ { @@ -4648,7 +4900,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* The chip is a Lance LT38C41, a clone of the Intel 8041, and the BIOS sends commands BC, BD, and C9 which exist on both AMIKey and Phoenix MultiKey/42, @@ -4686,7 +4940,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* According to Deksor on the Win3x.org forum, the BIOS string ends in a -0, indicating an unknown KBC firmware. But it does send the AMIKey get version @@ -4723,7 +4979,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &gd5428_onboard_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a standard IBM PS/2 KBC firmware or a clone thereof. */ { @@ -4758,7 +5016,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &gd5428_onboard_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 486 machines - Socket 2 */ @@ -4797,7 +5057,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Uses an ACER/NEC 90M002A (UPD82C42C, 8042 clone) with unknown firmware (V4.01H). */ { @@ -4832,7 +5094,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &gd5428_onboard_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ { @@ -4867,7 +5131,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Uses an Intel KBC with Phoenix MultiKey KBC firmware. */ { @@ -4902,7 +5168,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &s3_86c805_onboard_vlb_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Uses an NEC 90M002A (UPD82C42C, 8042 clone) with unknown firmware. */ { @@ -4937,7 +5205,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* The BIOS does not send any non-standard keyboard controller commands and wants a PS/2 mouse, so it's an IBM PS/2 KBC (Type 1) firmware. */ @@ -4973,7 +5243,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* The BIOS string ends in -U, unless command 0xA1 (AMIKey get version) returns an 'F', in which case, it ends in -F, so it has an AMIKey F KBC firmware. @@ -5010,7 +5282,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 486 machines - Socket 3 */ @@ -5048,7 +5322,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a VIA VT82C42N KBC. */ { @@ -5083,7 +5359,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has JetKey 5 KBC Firmware which looks like it is a clone of AMIKey type F. */ { @@ -5118,7 +5396,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has JetKey 5 KBC Firmware which looks like it is a clone of AMIKey type F. */ { @@ -5153,7 +5433,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMIKey H keyboard BIOS. */ { @@ -5188,7 +5470,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ { @@ -5223,7 +5507,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has JetKey 5 KBC Firmware which looks like it is a clone of AMIKey type F. */ { @@ -5258,7 +5544,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Unknown Epox VLB Socket 3 board, has AMIKey F keyboard BIOS. */ { @@ -5293,7 +5581,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 486 machines which utilize the PCI bus */ @@ -5330,7 +5620,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &tgui9440_onboard_pci_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has the ALi M1487/9's on-chip keyboard controller which clones a standard AT KBC. */ @@ -5366,7 +5658,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has the ALi M1487/9's on-chip keyboard controller which clones a standard AT KBC. @@ -5405,7 +5699,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has the ALi M1487/9's on-chip keyboard controller which clones a standard AT KBC. @@ -5444,7 +5740,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has an ALi M5042 keyboard controller with Phoenix MultiKey/42 v1.40 firmware. */ { @@ -5479,7 +5777,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -5514,7 +5814,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ { @@ -5549,7 +5851,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has the Phoenix MultiKey KBC firmware. */ { @@ -5584,7 +5888,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* I'm going to assume this as an AMIKey-2 like the other two 486SP3's. */ { @@ -5619,7 +5925,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has the Phoenix MultiKey KBC firmware. */ { @@ -5654,7 +5962,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has an AMIKey-2, which is an updated version of type 'H'. Also has a SST 29EE010 Flash chip. */ @@ -5690,7 +6000,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This most likely has a standalone AMI Megakey 1993, which is type 'P', like the below Tekram board. */ { @@ -5725,7 +6037,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has a standalone AMI Megakey 1993, which is type 'P'. */ { @@ -5760,7 +6074,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ { @@ -5795,7 +6111,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ { @@ -5830,7 +6148,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* The BIOS does not send a single non-standard KBC command, so it has a standard PS/2 KBC. */ { @@ -5865,7 +6185,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a BestKey KBC which clones AMI type 'H'. */ { @@ -5900,7 +6222,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has a Holtek KBC and the BIOS does not send a single non-standard KBC command, so it must be an ASIC that clones the standard IBM PS/2 KBC. */ @@ -5936,7 +6260,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* According to MrKsoft, his real 4DPS has an AMIKey-2, which is an updated version of type 'H'. */ @@ -5972,7 +6298,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has the UMC 88xx on-chip KBC. */ { @@ -6007,7 +6335,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ { @@ -6042,7 +6372,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMIKey Z(!) KBC firmware. */ { @@ -6077,7 +6409,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has the UMC 88xx on-chip KBC. All the copies of the BIOS string I can find, end in in -H, so the UMC on-chip KBC likely emulates the AMI 'H' KBC firmware. */ @@ -6113,7 +6447,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. Uses a mysterious I/O port C05. */ { @@ -6148,7 +6484,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has a Holtek KBC. */ { @@ -6183,7 +6521,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a VIA VT82C406 KBC+RTC that likely has identical commands to the VT82C42N. */ { @@ -6218,7 +6558,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a VIA VT82C42N KBC. */ { @@ -6253,7 +6595,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 486 machines - Miscellaneous */ @@ -6292,7 +6636,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977F Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -6328,7 +6674,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977F Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -6364,7 +6712,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977F Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -6400,7 +6750,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977F Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -6436,7 +6788,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Socket 4 machines */ @@ -6478,7 +6832,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMIKey F KBC firmware (AMIKey). */ { @@ -6513,7 +6869,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -6548,7 +6906,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -6583,7 +6943,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has the Phoenix MultiKey KBC firmware. This is basically an Intel Batman (*NOT* Batman's Revenge) with a fancier @@ -6620,7 +6982,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has IBM PS/2 Type 1 KBC firmware. */ { @@ -6655,7 +7019,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has the Phoenix MultiKey KBC firmware. */ { @@ -6690,7 +7056,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMI MegaKey KBC firmware. */ { @@ -6725,7 +7093,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has the Phoenix MultiKey KBC firmware. */ { @@ -6760,7 +7130,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &gd5434_onboard_pci_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* OPTi 596/597 */ @@ -6799,7 +7171,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* OPTi 596/597/822 */ @@ -6836,7 +7210,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* SiS 50x */ @@ -6873,7 +7249,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ { @@ -6908,7 +7286,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Socket 5 machines */ @@ -6946,7 +7326,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has the Phoenix MultiKey KBC firmware. This is basically an Intel Premiere/PCI II with a fancier POST screen. */ @@ -6982,7 +7364,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMI MegaKey KBC firmware. */ { @@ -7017,7 +7401,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 430FX */ @@ -7054,7 +7440,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMIKey F KBC firmware. */ { @@ -7089,7 +7477,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMIKey H KBC firmware. */ { @@ -7124,7 +7514,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. @@ -7161,7 +7553,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* The BIOS sends KBC command B3 which indicates an AMI (or VIA VT82C42N) KBC. */ { @@ -7196,7 +7590,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a VIA VT82C42N KBC. */ { @@ -7231,7 +7627,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMIKey Z(!) KBC firmware. */ { @@ -7266,7 +7664,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* OPTi 596/597 */ @@ -7305,7 +7705,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* OPTi 596/597/822 */ @@ -7341,7 +7743,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* SiS 85C50x */ @@ -7378,7 +7782,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ { @@ -7413,7 +7819,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Socket 7 (Single Voltage) machines */ @@ -7451,7 +7859,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ { @@ -7486,7 +7896,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. @@ -7523,7 +7935,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* The BIOS does not send a single non-standard KBC command, but the board has a SMC Super I/O chip with on-chip KBC and AMI MegaKey KBC firmware. */ @@ -7559,7 +7973,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &s3_phoenix_trio64_onboard_pci_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. @@ -7596,7 +8012,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &s3_phoenix_trio64vplus_onboard_pci_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. @@ -7633,7 +8051,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &s3_phoenix_trio64vplus_onboard_pci_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. @@ -7670,7 +8090,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &s3_phoenix_trio64_onboard_pci_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ { @@ -7705,7 +8127,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This most likely uses AMI MegaKey KBC firmware as well due to having the same Super I/O chip (that has the KBC firmware on it) as eg. the Advanced/EV. */ @@ -7741,7 +8165,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &gd5440_onboard_pci_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has an AMI 'H' KBC firmware (1992). */ { @@ -7776,7 +8202,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 430HX */ @@ -7815,7 +8243,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMIKey F KBC firmware. */ { @@ -7850,7 +8280,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* [TEST] Has a VIA 82C42N KBC, with AMIKey F KBC firmware. */ { @@ -7885,7 +8317,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* [TEST] Unable to determine what KBC this has. A list on a Danish site shows the BIOS as having a -0 string, indicating non-AMI KBC firmware. */ @@ -7921,7 +8355,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 430VX */ @@ -7958,7 +8394,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. @@ -7995,7 +8433,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* SiS 5511 */ @@ -8032,7 +8472,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Socket 7 (Dual Voltage) machines */ @@ -8070,7 +8512,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMIKey H KBC firmware (AMIKey-2). */ { @@ -8105,7 +8549,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has the SMC FDC73C935's on-chip KBC with Phoenix MultiKey firmware. */ { @@ -8140,7 +8586,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. @@ -8177,7 +8625,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. @@ -8214,7 +8664,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. @@ -8252,7 +8704,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* The base board has AMIKey-2 (updated 'H') KBC firmware. */ { @@ -8287,7 +8741,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 430VX */ @@ -8324,7 +8780,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has AMIKey H KBC firmware (AMIKey-2). */ { @@ -8359,7 +8817,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* The BIOS does not send a single non-standard KBC command, so it must have a standard IBM PS/2 KBC firmware or a clone thereof. */ @@ -8395,7 +8855,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* [TEST] Has AMIKey 'F' KBC firmware. */ { @@ -8430,7 +8892,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* The BIOS does not send a single non-standard KBC command, but the board has a SMC Super I/O chip with on-chip KBC and AMI MegaKey KBC firmware. */ @@ -8466,7 +8930,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &s3_trio64v2_dx_onboard_pci_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This most likely has AMI MegaKey as above. */ { @@ -8501,7 +8967,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &s3_trio64v2_dx_onboard_pci_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* The BIOS sends KBC command CB which is an AMI KBC command, so it has an AMI KBC firmware. */ { @@ -8536,7 +9004,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* The BIOS does not send a single non-standard KBC command. */ { @@ -8571,7 +9041,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. @@ -8608,7 +9080,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has the AMIKey 'H' firmware, possibly AMIKey-2. Photos show it with a BestKey, so it likely clones the behavior of AMIKey 'H'. */ @@ -8644,7 +9118,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has a Holtek KBC and the BIOS does not send a single non-standard KBC command, so it must be an ASIC that clones the standard IBM PS/2 KBC. */ @@ -8680,7 +9156,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 430TX */ @@ -8717,7 +9195,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has the AMIKey KBC firmware, which is an updated 'F' type (YM430TX is based on the TX97). */ { @@ -8752,7 +9232,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, #if defined(DEV_BRANCH) && defined(USE_AN430TX) /* This has the Phoenix MultiKey KBC firmware. */ @@ -8788,7 +9270,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, #endif /* This has the AMIKey KBC firmware, which is an updated 'F' type. */ @@ -8824,7 +9308,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* The BIOS sends KBC command BB and expects it to output a byte, which is AMI KBC behavior. */ { @@ -8859,7 +9345,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Award BIOS, PS2, EDO, SDRAM, 4 PCI, 4 ISA, VIA VT82C42N KBC */ { @@ -8894,7 +9382,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* [TEST] Has AMIKey 'H' KBC firmware. */ { @@ -8929,7 +9419,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Apollo VPX */ @@ -8967,7 +9459,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Apollo VP3 */ @@ -9005,7 +9499,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* SiS 5571 */ @@ -9042,7 +9538,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has the SiS 5571 chipset with on-chip KBC. */ { @@ -9077,7 +9575,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* ALi ALADDiN IV+ */ @@ -9114,7 +9614,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has the ALi M1543 southbridge with on-chip KBC. */ { @@ -9149,7 +9651,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Super Socket 7 machines */ @@ -9187,7 +9691,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Is the exact same as the Matsonic MS6260S. Has the ALi M1543C southbridge with on-chip KBC. */ @@ -9223,7 +9729,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has the ALi M1543C southbridge with on-chip KBC. */ { @@ -9258,7 +9766,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has the ALi M1543C southbridge with on-chip KBC. */ { @@ -9293,7 +9803,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Apollo MVP3 */ @@ -9331,7 +9843,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has the VIA VT82C586B southbridge with on-chip KBC identical to the VIA VT82C42N. */ @@ -9367,7 +9881,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has the VIA VT82C686A southbridge with on-chip KBC identical to the VIA VT82C42N. */ @@ -9403,7 +9919,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has the VIA VT82C686A southbridge with on-chip KBC identical to the VIA VT82C42N. */ @@ -9439,7 +9957,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Socket 8 machines */ @@ -9477,7 +9997,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 440FX */ @@ -9514,7 +10036,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* The base board has AMIKey-2 (updated 'H') KBC firmware. */ { @@ -9549,7 +10073,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* The MB-8600TTX has an AMIKey 'F' KBC firmware, so I'm going to assume so does the MB-8600TTC until someone can actually identify it. */ @@ -9585,7 +10111,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { .name = "[i440FX] Gigabyte GA-686NX", @@ -9619,7 +10147,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. @@ -9656,7 +10186,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* According to tests from real hardware: This has AMI MegaKey KBC firmware on the PC87306 Super I/O chip, command 0xA1 returns '5'. @@ -9693,7 +10225,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has the SMC FDC73C935's on-chip KBC with Phoenix MultiKey firmware. */ { @@ -9728,7 +10262,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* I found a BIOS string of it that ends in -S, but it could be a typo for -5 (there's quite a few AMI BIOS strings around with typo'd KBC codes), so I'm @@ -9765,7 +10301,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Slot 1 machines */ @@ -9803,7 +10341,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 440FX */ @@ -9840,7 +10380,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* This has a Holtek KBC and the BIOS does not send a single non-standard KBC command, so it must be an ASIC that clones the standard IBM PS/2 KBC. */ @@ -9876,7 +10418,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 440LX */ @@ -9914,7 +10458,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a SM(S)C FDC37C935 Super I/O chip with on-chip KBC with Phoenix MultiKey KBC firmware. */ @@ -9950,7 +10496,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 440EX */ @@ -9988,7 +10536,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 440BX */ @@ -10026,7 +10576,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -10062,7 +10614,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -10098,7 +10652,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977TF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -10134,7 +10690,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977TF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -10170,7 +10728,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a SM(S)C FDC37M60x Super I/O chip with on-chip KBC with most likely AMIKey-2 KBC firmware. */ @@ -10206,7 +10766,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a National Semiconductors PC87309 Super I/O chip with on-chip KBC with most likely AMIKey-2 KBC firmware. */ @@ -10242,7 +10804,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &es1371_onboard_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977TF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -10278,7 +10842,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 440ZX */ @@ -10316,7 +10882,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &voodoo_3_2000_agp_onboard_8m_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -10352,7 +10920,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &voodoo_3_2000_agp_onboard_8m_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* SMSC VictoryBX-66 */ @@ -10390,7 +10960,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* VIA Apollo Pro */ @@ -10428,7 +11000,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -10464,7 +11038,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -10500,7 +11076,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Slot 1/2 machines */ @@ -10539,7 +11117,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Slot 1/Socket 370 machines */ @@ -10578,7 +11158,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &es1371_onboard_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Slot 2 machines */ @@ -10617,7 +11199,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977TF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -10653,7 +11237,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* PGA370 machines */ @@ -10692,7 +11278,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 440BX */ @@ -10730,7 +11318,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -10766,7 +11356,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -10802,7 +11394,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* 440ZX */ @@ -10840,7 +11434,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* SMSC VictoryBX-66 */ @@ -10878,7 +11474,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* VIA Apollo Pro */ @@ -10916,7 +11514,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -10952,7 +11552,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has the VIA VT82C686B southbridge with on-chip KBC identical to the VIA VT82C42N. */ @@ -10988,7 +11590,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has the VIA VT82C686B southbridge with on-chip KBC identical to the VIA VT82C42N. */ @@ -11024,7 +11628,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &cmi8738_onboard_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC firmware. */ @@ -11060,7 +11666,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = &es1371_onboard_device, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, /* Miscellaneous/Fake/Hypervisor machines */ @@ -11098,7 +11706,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL }, { @@ -11133,7 +11743,9 @@ const machine_t machines[] = { .kbc_p1 = 0, .gpio = 0, .device = NULL, - .vid_device = NULL + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL } }; @@ -11208,6 +11820,24 @@ machine_getviddevice(int m) return(NULL); } +const device_t * +machine_getsnddevice(int m) +{ + if (machines[m].snd_device) + return(machines[m].snd_device); + + return(NULL); +} + +const device_t * +machine_getnetdevice(int m) +{ + if (machines[m].net_device) + return(machines[m].net_device); + + return(NULL); +} + char * machine_get_internal_name(void) { From 1837785bd9fdc299b6383454ad0926c0bf2c24be Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 2 Aug 2022 18:49:35 -0400 Subject: [PATCH 241/386] Remove obsolete functions --- src/machine/m_at_286_386sx.c | 18 ------------------ src/machine/m_at_slot1.c | 6 ------ src/machine/m_xt_t1000.c | 6 ------ 3 files changed, 30 deletions(-) diff --git a/src/machine/m_at_286_386sx.c b/src/machine/m_at_286_386sx.c index d524e4c4a..fb4186c4e 100644 --- a/src/machine/m_at_286_386sx.c +++ b/src/machine/m_at_286_386sx.c @@ -568,12 +568,6 @@ machine_at_scamp_common_init(const machine_t *model, int is_ps2) device_add(&vlsi_scamp_device); } -const device_t * -at_cmdsl386sx25_get_device(void) -{ - return &gd5402_onboard_device; -} - int machine_at_cmdsl386sx25_init(const machine_t *model) { @@ -609,12 +603,6 @@ machine_at_dataexpert386sx_init(const machine_t *model) return ret; } -const device_t * -at_spc6033p_get_device(void) -{ - return &ati28800k_spc6033p_device; -} - int machine_at_spc6033p_init(const machine_t *model) { @@ -719,12 +707,6 @@ machine_at_flytech386_init(const machine_t *model) return ret; } -const device_t * -at_flytech386_get_device(void) -{ - return &tvga8900d_device; -} - int machine_at_mr1217_init(const machine_t *model) { diff --git a/src/machine/m_at_slot1.c b/src/machine/m_at_slot1.c index 1204384a5..8f361ba78 100644 --- a/src/machine/m_at_slot1.c +++ b/src/machine/m_at_slot1.c @@ -634,12 +634,6 @@ machine_at_ms6168_common_init(const machine_t *model) } } -const device_t * -at_ms6168_get_device(void) -{ - return &voodoo_3_2000_agp_onboard_8m_device; -} - int machine_at_borapro_init(const machine_t *model) { diff --git a/src/machine/m_xt_t1000.c b/src/machine/m_xt_t1000.c index afad725a3..526833a98 100644 --- a/src/machine/m_xt_t1000.c +++ b/src/machine/m_xt_t1000.c @@ -902,12 +902,6 @@ machine_xt_t1000_init(const machine_t *model) return ret; } -const device_t * -t1200_get_device(void) -{ - return (&t1200_video_device); -} - int machine_xt_t1200_init(const machine_t *model) { From fff8800a208b3a8443619f2fcb935f27074833e5 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 2 Aug 2022 20:03:14 -0400 Subject: [PATCH 242/386] Use defines for limits --- src/include/86box/hdc_ide.h | 3 +++ src/include/86box/scsi.h | 2 +- src/win/win_settings.c | 40 ++++++++++++++++++------------------- 3 files changed, 24 insertions(+), 21 deletions(-) diff --git a/src/include/86box/hdc_ide.h b/src/include/86box/hdc_ide.h index 9e2539359..1deb6dd86 100644 --- a/src/include/86box/hdc_ide.h +++ b/src/include/86box/hdc_ide.h @@ -19,6 +19,9 @@ #ifndef EMU_IDE_H # define EMU_IDE_H +#define IDE_BUS_MAX 4 +#define IDE_CHAN_MAX 2 + #define HDC_PRIMARY_BASE 0x01F0 #define HDC_PRIMARY_SIDE 0x03F6 #define HDC_PRIMARY_IRQ 14 diff --git a/src/include/86box/scsi.h b/src/include/86box/scsi.h index 03de1a4ac..88259f18e 100644 --- a/src/include/86box/scsi.h +++ b/src/include/86box/scsi.h @@ -21,7 +21,7 @@ #ifndef EMU_SCSI_H # define EMU_SCSI_H -extern int scsi_card_current[4]; +extern int scsi_card_current[SCSI_BUS_MAX]; extern int scsi_card_available(int card); #ifdef EMU_DEVICE_H diff --git a/src/win/win_settings.c b/src/win/win_settings.c index bd5451b64..d6780a8bc 100644 --- a/src/win/win_settings.c +++ b/src/win/win_settings.c @@ -365,7 +365,7 @@ win_settings_init(void) temp_cassette = cassette_enable; mfm_tracking = xta_tracking = esdi_tracking = ide_tracking = 0; - for (i = 0; i < 8; i++) + for (i = 0; i < SCSI_LUN_MAX; i++) scsi_tracking[i] = 0; /* Hard disks category */ @@ -1958,12 +1958,12 @@ add_locations(HWND hdlg) settings_add_string(hdlg, IDC_COMBO_HD_CHANNEL, (LPARAM) lptsTemp); } - for (i = 0; i < 64; i++) { + for (i = 0; i < (SCSI_BUS_MAX * SCSI_ID_MAX); i++) { wsprintf(lptsTemp, plat_get_string(IDS_4135), i >> 4, i & 15); settings_add_string(hdlg, IDC_COMBO_HD_ID, (LPARAM) lptsTemp); } - for (i = 0; i < 8; i++) { + for (i = 0; i < (IDE_BUS_MAX * IDE_CHAN_MAX); i++) { wsprintf(lptsTemp, plat_get_string(IDS_4097), i >> 1, i & 1); settings_add_string(hdlg, IDC_COMBO_HD_CHANNEL_IDE, (LPARAM) lptsTemp); } @@ -1989,7 +1989,7 @@ next_free_ide_channel(void) { int64_t i; - for (i = 0; i < 8; i++) { + for (i = 0; i < (IDE_BUS_MAX * IDE_CHAN_MAX); i++) { if (!(ide_tracking & (0xffLL << (i << 3LL)))) return i; } @@ -2002,7 +2002,7 @@ next_free_scsi_id(uint8_t *id) { int64_t i; - for (i = 0; i < 64; i++) { + for (i = 0; i < (SCSI_BUS_MAX * SCSI_ID_MAX); i++) { if (!(scsi_tracking[i >> 3] & (0xffLL << ((i & 0x07) << 3LL)))) { *id = i; return; @@ -2138,7 +2138,7 @@ recalc_next_free_id(HWND hdlg) enable_add = enable_add && !bus_full(&mfm_tracking, 2); enable_add = enable_add && !bus_full(&esdi_tracking, 2); enable_add = enable_add && !bus_full(&xta_tracking, 2); - enable_add = enable_add && !bus_full(&ide_tracking, 8); + enable_add = enable_add && !bus_full(&ide_tracking, IDE_CHAN_MAX); for (i = 0; i < 2; i++) enable_add = enable_add && !bus_full(&(scsi_tracking[i]), 8); @@ -3554,7 +3554,7 @@ win_settings_floppy_drives_recalc_list(HWND hdlg) lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; lvI.stateMask = lvI.state = 0; - for (i = 0; i < 4; i++) { + for (i = 0; i < FDD_NUM; i++) { lvI.iSubItem = 0; if (temp_fdd_types[i] > 0) { t = fdd_getname(temp_fdd_types[i]); @@ -3600,7 +3600,7 @@ win_settings_cdrom_drives_recalc_list(HWND hdlg) lvI.mask = LVIF_TEXT | LVIF_IMAGE | LVIF_STATE; lvI.stateMask = lvI.iSubItem = lvI.state = 0; - for (i = 0; i < 4; i++) { + for (i = 0; i < CDROM_NUM; i++) { fsid = combo_id_to_format_string_id(temp_cdrom[i].bus_type); lvI.iSubItem = 0; @@ -3947,13 +3947,13 @@ win_settings_zip_drives_init_columns(HWND hdlg) } static int -get_selected_drive(HWND hdlg, int id) +get_selected_drive(HWND hdlg, int id, int max) { int drive = -1; int i, j = 0; HWND h; - for (i = 0; i < 4; i++) { + for (i = 0; i < max; i++) { h = GetDlgItem(hdlg, id); j = ListView_GetItemState(h, i, LVIS_SELECTED); if (j) @@ -4179,12 +4179,12 @@ cdrom_add_locations(HWND hdlg) settings_add_string(hdlg, IDC_COMBO_CD_SPEED, (LPARAM) lptsTemp); } - for (i = 0; i < 64; i++) { + for (i = 0; i < (SCSI_BUS_MAX * SCSI_ID_MAX); i++) { wsprintf(lptsTemp, plat_get_string(IDS_4135), i >> 4, i & 15); settings_add_string(hdlg, IDC_COMBO_CD_ID, (LPARAM) lptsTemp); } - for (i = 0; i < 8; i++) { + for (i = 0; i < (IDE_BUS_MAX * IDE_CHAN_MAX); i++) { wsprintf(lptsTemp, plat_get_string(IDS_4097), i >> 1, i & 1); settings_add_string(hdlg, IDC_COMBO_CD_CHANNEL_IDE, (LPARAM) lptsTemp); } @@ -4245,12 +4245,12 @@ mo_add_locations(HWND hdlg) settings_add_string(hdlg, IDC_COMBO_MO_BUS, win_get_string(combo_id_to_string_id(i))); } - for (i = 0; i < 64; i++) { + for (i = 0; i < (SCSI_BUS_MAX * SCSI_ID_MAX); i++) { wsprintf(lptsTemp, plat_get_string(IDS_4135), i >> 4, i & 15); settings_add_string(hdlg, IDC_COMBO_MO_ID, (LPARAM) lptsTemp); } - for (i = 0; i < 8; i++) { + for (i = 0; i < (IDE_BUS_MAX * IDE_CHAN_MAX); i++) { wsprintf(lptsTemp, plat_get_string(IDS_4097), i >> 1, i & 1); settings_add_string(hdlg, IDC_COMBO_MO_CHANNEL_IDE, (LPARAM) lptsTemp); } @@ -4322,12 +4322,12 @@ zip_add_locations(HWND hdlg) settings_add_string(hdlg, IDC_COMBO_ZIP_BUS, win_get_string(combo_id_to_string_id(i))); } - for (i = 0; i < 64; i++) { + for (i = 0; i < (SCSI_BUS_MAX * SCSI_LUN_MAX) ; i++) { wsprintf(lptsTemp, plat_get_string(IDS_4135), i >> 4, i & 15); settings_add_string(hdlg, IDC_COMBO_ZIP_ID, (LPARAM) lptsTemp); } - for (i = 0; i < 8; i++) { + for (i = 0; i < (IDE_BUS_MAX * IDE_CHAN_MAX); i++) { wsprintf(lptsTemp, plat_get_string(IDS_4097), i >> 1, i & 1); settings_add_string(hdlg, IDC_COMBO_ZIP_CHANNEL_IDE, (LPARAM) lptsTemp); } @@ -4497,7 +4497,7 @@ win_settings_floppy_and_cdrom_drives_proc(HWND hdlg, UINT message, WPARAM wParam if ((((LPNMHDR) lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR) lParam)->idFrom == IDC_LIST_FLOPPY_DRIVES)) { old_sel = lv1_current_sel; - lv1_current_sel = get_selected_drive(hdlg, IDC_LIST_FLOPPY_DRIVES); + lv1_current_sel = get_selected_drive(hdlg, IDC_LIST_FLOPPY_DRIVES, FDD_NUM); if (lv1_current_sel == old_sel) return FALSE; ignore_change = 1; @@ -4507,7 +4507,7 @@ win_settings_floppy_and_cdrom_drives_proc(HWND hdlg, UINT message, WPARAM wParam ignore_change = 0; } else if ((((LPNMHDR) lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR) lParam)->idFrom == IDC_LIST_CDROM_DRIVES)) { old_sel = lv2_current_sel; - lv2_current_sel = get_selected_drive(hdlg, IDC_LIST_CDROM_DRIVES); + lv2_current_sel = get_selected_drive(hdlg, IDC_LIST_CDROM_DRIVES, CDROM_NUM); if (lv2_current_sel == old_sel) return FALSE; ignore_change = 1; @@ -4684,7 +4684,7 @@ win_settings_other_removable_devices_proc(HWND hdlg, UINT message, WPARAM wParam if ((((LPNMHDR) lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR) lParam)->idFrom == IDC_LIST_MO_DRIVES)) { old_sel = lv1_current_sel; - lv1_current_sel = get_selected_drive(hdlg, IDC_LIST_MO_DRIVES); + lv1_current_sel = get_selected_drive(hdlg, IDC_LIST_MO_DRIVES, MO_NUM); if (lv1_current_sel == old_sel) return FALSE; ignore_change = 1; @@ -4707,7 +4707,7 @@ win_settings_other_removable_devices_proc(HWND hdlg, UINT message, WPARAM wParam ignore_change = 0; } else if ((((LPNMHDR) lParam)->code == LVN_ITEMCHANGED) && (((LPNMHDR) lParam)->idFrom == IDC_LIST_ZIP_DRIVES)) { old_sel = lv2_current_sel; - lv2_current_sel = get_selected_drive(hdlg, IDC_LIST_ZIP_DRIVES); + lv2_current_sel = get_selected_drive(hdlg, IDC_LIST_ZIP_DRIVES, ZIP_NUM); if (lv2_current_sel == old_sel) return FALSE; ignore_change = 1; From 57a7ba69a63af325d5899258fab1c3ff71c79982 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 3 Aug 2022 03:36:24 +0200 Subject: [PATCH 243/386] Small fix to the VNC renderer. --- src/vnc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/vnc.c b/src/vnc.c index 768b08b57..46ef21c5d 100644 --- a/src/vnc.c +++ b/src/vnc.c @@ -167,12 +167,12 @@ vnc_display(rfbClientPtr cl) static void -vnc_blit(int x, int y, int w, int h) +vnc_blit(int x, int y, int w, int h, int monitor_index) { uint32_t *p; int yy; - if ((x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (buffer32 == NULL)) + if (monitor_index || (x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (buffer32 == NULL)) return; for (yy=0; yy Date: Tue, 2 Aug 2022 23:25:34 -0300 Subject: [PATCH 244/386] Jenkins: Also make poll only true once when cloning --- .ci/Jenkinsfile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/.ci/Jenkinsfile b/.ci/Jenkinsfile index 8542e317d..26ee36593 100644 --- a/.ci/Jenkinsfile +++ b/.ci/Jenkinsfile @@ -103,9 +103,9 @@ def gitClone(repository, branch) { if (env.GIT_STASHED != 'true' || env.NODE_NAME != 'debian.citadel') { /* Catch network issues in clone. */ try { - /* Perform clone/checkout, making sure to update the changelog only once - to avoid inaccurate entries from new commits pushed inbetween clones. */ - def scmVars = checkout(poll: true, + /* Perform clone/checkout, making sure to set poll and changelog only + once to avoid interference from new commits pushed inbetween clones. */ + def scmVars = checkout(poll: env.GIT_STASHED != 'true', changelog: env.GIT_STASHED != 'true', scm: [$class: 'GitSCM', branches: [[name: branch]], From 5d999920f5c2e2865165d2a4eabb4e69a241d9bc Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 2 Aug 2022 20:11:23 -0400 Subject: [PATCH 245/386] Move SCSI defines to scsi.h --- src/cdrom/cdrom.c | 1 + src/disk/mo.c | 1 + src/disk/zip.c | 1 + src/include/86box/scsi.h | 6 ++++++ src/include/86box/scsi_device.h | 7 ++----- src/scsi/scsi_cdrom.c | 1 + src/scsi/scsi_disk.c | 1 + 7 files changed, 13 insertions(+), 5 deletions(-) diff --git a/src/cdrom/cdrom.c b/src/cdrom/cdrom.c index f57981234..ee5972756 100644 --- a/src/cdrom/cdrom.c +++ b/src/cdrom/cdrom.c @@ -25,6 +25,7 @@ #include <86box/cdrom.h> #include <86box/cdrom_image.h> #include <86box/plat.h> +#include <86box/scsi.h> #include <86box/scsi_device.h> #include <86box/sound.h> diff --git a/src/disk/mo.c b/src/disk/mo.c index d30cf9d94..18e49b2d7 100644 --- a/src/disk/mo.c +++ b/src/disk/mo.c @@ -31,6 +31,7 @@ #include <86box/config.h> #include <86box/timer.h> #include <86box/device.h> +#include <86box/scsi.h> #include <86box/scsi_device.h> #include <86box/nvr.h> #include <86box/path.h> diff --git a/src/disk/zip.c b/src/disk/zip.c index 1f45e4737..a4e124fee 100644 --- a/src/disk/zip.c +++ b/src/disk/zip.c @@ -27,6 +27,7 @@ #include <86box/config.h> #include <86box/timer.h> #include <86box/device.h> +#include <86box/scsi.h> #include <86box/scsi_device.h> #include <86box/nvr.h> #include <86box/plat.h> diff --git a/src/include/86box/scsi.h b/src/include/86box/scsi.h index 88259f18e..b0af25e44 100644 --- a/src/include/86box/scsi.h +++ b/src/include/86box/scsi.h @@ -21,6 +21,12 @@ #ifndef EMU_SCSI_H # define EMU_SCSI_H +/* Configuration. */ +#define SCSI_BUS_MAX 4 /* currently we support up to 4 controllers */ + +#define SCSI_ID_MAX 16 /* 16 on wide buses */ +#define SCSI_LUN_MAX 8 /* always 8 */ + extern int scsi_card_current[SCSI_BUS_MAX]; extern int scsi_card_available(int card); diff --git a/src/include/86box/scsi_device.h b/src/include/86box/scsi_device.h index 6b6600d8e..f1a2a4728 100644 --- a/src/include/86box/scsi_device.h +++ b/src/include/86box/scsi_device.h @@ -21,10 +21,6 @@ # define SCSI_DEVICE_H /* Configuration. */ -#define SCSI_BUS_MAX 4 /* currently we support up to 4 controllers */ - -#define SCSI_ID_MAX 16 /* 16 on wide buses */ -#define SCSI_LUN_MAX 8 /* always 8 */ #define SCSI_LUN_USE_CDB 0xff @@ -361,8 +357,9 @@ typedef struct { #define SCSI_REMOVABLE_DISK 0x8000 #define SCSI_REMOVABLE_CDROM 0x8005 +#ifdef EMU_SCSI_H extern scsi_device_t scsi_devices[SCSI_BUS_MAX][SCSI_ID_MAX]; - +#endif /* EMU_SCSI_H */ extern int cdrom_add_error_and_subchannel(uint8_t *b, int real_sector_type); extern int cdrom_LBAtoMSF_accurate(void); diff --git a/src/scsi/scsi_cdrom.c b/src/scsi/scsi_cdrom.c index c7e9060e9..e90e0d773 100644 --- a/src/scsi/scsi_cdrom.c +++ b/src/scsi/scsi_cdrom.c @@ -27,6 +27,7 @@ #include <86box/config.h> #include <86box/timer.h> #include <86box/device.h> +#include <86box/scsi.h> #include <86box/scsi_device.h> #include <86box/nvr.h> #include <86box/hdc.h> diff --git a/src/scsi/scsi_disk.c b/src/scsi/scsi_disk.c index d3e7b6f11..133c23997 100644 --- a/src/scsi/scsi_disk.c +++ b/src/scsi/scsi_disk.c @@ -25,6 +25,7 @@ #include <86box/nvr.h> #include <86box/hdd.h> #include <86box/hdc.h> +#include <86box/scsi.h> #include <86box/scsi_device.h> #include <86box/hdc_ide.h> #include <86box/plat.h> From 468ef843994211acd98d4a6ea5c58f7a4fc6a3f1 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Wed, 3 Aug 2022 13:05:21 +0600 Subject: [PATCH 246/386] qt: Enable and make VNC work properly --- src/qt/qt.c | 5 +++++ src/qt/qt_mainwindow.cpp | 32 +++++++++++++++++++++++++++++++- src/qt/qt_mainwindow.hpp | 1 + src/qt/qt_mainwindow.ui | 12 ++++++++++++ src/vnc.c | 10 ++++++---- 5 files changed, 55 insertions(+), 5 deletions(-) diff --git a/src/qt/qt.c b/src/qt/qt.c index 68b204dbc..bb6d9658d 100644 --- a/src/qt/qt.c +++ b/src/qt/qt.c @@ -51,6 +51,8 @@ plat_vidapi(char* api) { return 4; } else if (!strcasecmp(api, "qt_d3d9")) { return 5; + } else if (!strcasecmp(api, "vnc")) { + return 6; } return 0; @@ -78,6 +80,9 @@ char* plat_vidapi_name(int api) { case 5: name = "qt_d3d9"; break; + case 6: + name = "vnc"; + break; default: fatal("Unknown renderer: %i\n", api); break; diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 00ebb578e..f05c32ba6 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -46,6 +46,10 @@ extern "C" { #include <86box/vid_ega.h> #include <86box/version.h> +#ifdef USE_VNC +#include <86box/vnc.h> +#endif + extern int qt_nvr_save(void); #ifdef MTR_ENABLED @@ -141,6 +145,8 @@ MainWindow::MainWindow(QWidget *parent) : ((BWindow*)this->winId())->AddFilter(filter); #endif setUnifiedTitleAndToolBarOnMac(true); + extern MainWindow* main_window; + main_window = this; ui->setupUi(this); ui->stackedWidget->setMouseTracking(true); statusBar()->setVisible(!hide_status_bar); @@ -308,6 +314,11 @@ MainWindow::MainWindow(QWidget *parent) : if (vid_api == 5) vid_api = 0; #endif +#ifndef USE_VNC + if (vid_api == 6) vid_api = 0; + ui->actionVNC->setVisible(false); +#endif + #if !QT_CONFIG(vulkan) if (vid_api == 4) vid_api = 0; ui->actionVulkan->setVisible(false); @@ -322,10 +333,20 @@ MainWindow::MainWindow(QWidget *parent) : actGroup->addAction(ui->actionOpenGL_3_0_Core); actGroup->addAction(ui->actionVulkan); actGroup->addAction(ui->actionDirect3D_9); + actGroup->addAction(ui->actionVNC); actGroup->setExclusive(true); connect(actGroup, &QActionGroup::triggered, [this](QAction* action) { vid_api = action->property("vid_api").toInt(); +#ifdef USE_VNC + if (vnc_enabled && vid_api != 6) { + startblit(); + vnc_enabled = 0; + vnc_close(); + video_setblit(qt_blit); + endblit(); + } +#endif RendererStack::Renderer newVidApi = RendererStack::Renderer::Software; switch (vid_api) { @@ -347,6 +368,15 @@ MainWindow::MainWindow(QWidget *parent) : case 5: newVidApi = (RendererStack::Renderer::Direct3D9); break; +#ifdef USE_VNC + case 6: + { + newVidApi = RendererStack::Renderer::Software; + startblit(); + vnc_enabled = vnc_init(nullptr); + endblit(); + } +#endif } ui->stackedWidget->switchRenderer(newVidApi); if (!show_second_monitors) return; @@ -469,7 +499,7 @@ MainWindow::MainWindow(QWidget *parent) : ui->actionCtrl_Alt_Del->setShortcutVisibleInContextMenu(true); ui->actionTake_screenshot->setShortcutVisibleInContextMenu(true); #endif - video_setblit(qt_blit); + if (!vnc_enabled) video_setblit(qt_blit); if (start_in_fullscreen) { connect(ui->stackedWidget, &RendererStack::blit, this, [this] () { diff --git a/src/qt/qt_mainwindow.hpp b/src/qt/qt_mainwindow.hpp index 0f8a5ecd2..c33decb44 100644 --- a/src/qt/qt_mainwindow.hpp +++ b/src/qt/qt_mainwindow.hpp @@ -144,6 +144,7 @@ private: bool send_keyboard_input = true; bool shownonce = false; bool resizableonce = false; + bool vnc_enabled = false; friend class SpecifyDimensions; friend class ProgSettings; diff --git a/src/qt/qt_mainwindow.ui b/src/qt/qt_mainwindow.ui index f077f7e97..522d2f081 100644 --- a/src/qt/qt_mainwindow.ui +++ b/src/qt/qt_mainwindow.ui @@ -106,6 +106,7 @@ + @@ -766,6 +767,17 @@ Show non-primary monitors + + + true + + + VNC + + + 6 + + diff --git a/src/vnc.c b/src/vnc.c index 46ef21c5d..27df6cb22 100644 --- a/src/vnc.c +++ b/src/vnc.c @@ -172,8 +172,10 @@ vnc_blit(int x, int y, int w, int h, int monitor_index) uint32_t *p; int yy; - if (monitor_index || (x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (buffer32 == NULL)) - return; + if (monitor_index || (x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (buffer32 == NULL)) { + video_blit_complete_monitor(monitor_index); + return; + } for (yy=0; yyframeBuffer)[yy*VNC_MAX_X]); @@ -185,7 +187,7 @@ vnc_blit(int x, int y, int w, int h, int monitor_index) if (screenshots) video_screenshot((uint32_t *) rfb->frameBuffer, 0, 0, VNC_MAX_X); - video_blit_complete(); + video_blit_complete_monitor(monitor_index); if (! updatingSize) rfbMarkRectAsModified(rfb, 0,0, allowedX,allowedY); @@ -210,7 +212,7 @@ vnc_init(UNUSED(void *arg)) 32, 32, 0, 1, 255,255,255, 16, 8, 0, 0, 0 }; - cgapal_rebuild(); + cgapal_rebuild_monitor(0); if (rfb == NULL) { wcstombs(title, ui_window_title(NULL), sizeof(title)); From 9473640552b05afc6d00fc76856eb0b28fb8c57d Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Wed, 3 Aug 2022 13:38:44 +0600 Subject: [PATCH 247/386] mpu401: Add MPU-401AT I/O address ranges --- src/sound/snd_mpu401.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/sound/snd_mpu401.c b/src/sound/snd_mpu401.c index cb442032c..10ef7b5e0 100644 --- a/src/sound/snd_mpu401.c +++ b/src/sound/snd_mpu401.c @@ -1844,6 +1844,18 @@ static const device_config_t mpu401_standalone_config[] = { .description = "0x330", .value = 0x330 }, + { + .description = "0x332", + .value = 0x332 + }, + { + .description = "0x334", + .value = 0x334 + }, + { + .description = "0x336", + .value = 0x336 + }, { .description = "0x340", .value = 0x340 From 828334c48235723d0f58bd72e44968df418bc84d Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Wed, 3 Aug 2022 12:18:41 -0400 Subject: [PATCH 248/386] qt: Update machine settings layout to make mac and linux consistent with windows layout --- src/qt/qt_settingsmachine.ui | 148 +++++++++++++++++------------------ 1 file changed, 74 insertions(+), 74 deletions(-) diff --git a/src/qt/qt_settingsmachine.ui b/src/qt/qt_settingsmachine.ui index 30f375f7e..d5ff1ca59 100644 --- a/src/qt/qt_settingsmachine.ui +++ b/src/qt/qt_settingsmachine.ui @@ -7,7 +7,7 @@ 0 0 458 - 390 + 391 @@ -28,7 +28,7 @@ - + 0 @@ -51,58 +51,55 @@ - + Machine: - + + + + + 0 + + + 0 + + + 0 + + + 0 + + + + + + + + + 0 + 0 + + + + Configure + + + + + + + CPU type: - - - - FPU: - - - - - - - Wait states: - - - - - - - Memory: - - - - - - - - - - - - - - 0 - 0 - - - - - + @@ -150,38 +147,41 @@ - - - - - 0 - - - 0 - - - 0 - - - 0 - - - - - - - - - 0 - 0 - - - - Configure - - - - + + + + FPU: + + + + + + + + + + Wait states: + + + + + + + + + + Memory: + + + + + + + + 0 + 0 + + From 93f01dfb2e0aef65433a69d43eb08c69e5ef1a9d Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Thu, 4 Aug 2022 00:21:27 +0600 Subject: [PATCH 249/386] vnc: Pause always when switching to VNC renderer --- src/vnc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/vnc.c b/src/vnc.c index 27df6cb22..0cc745883 100644 --- a/src/vnc.c +++ b/src/vnc.c @@ -212,6 +212,7 @@ vnc_init(UNUSED(void *arg)) 32, 32, 0, 1, 255,255,255, 16, 8, 0, 0, 0 }; + plat_pause(1); cgapal_rebuild_monitor(0); if (rfb == NULL) { From 0e9686371ea2eeecae85f3aaf944a3b6a5fbf825 Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 4 Aug 2022 01:41:52 +0200 Subject: [PATCH 250/386] Fixed OTi-0x7 clock select. --- src/video/vid_oak_oti.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/video/vid_oak_oti.c b/src/video/vid_oak_oti.c index 7572e44b6..cea26a71f 100644 --- a/src/video/vid_oak_oti.c +++ b/src/video/vid_oak_oti.c @@ -366,6 +366,7 @@ oti_getclock(int clock) break; } + return ret; } From 61828a89fc2ef1472c28c5537541a7dc02f6caa9 Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 4 Aug 2022 04:39:37 +0200 Subject: [PATCH 251/386] Added the GC113 used by the real TriGem 286M, and fixed that EMS driver on GC113 onwards, closes #2567. --- src/chipset/headland.c | 93 +++++++++++++++++++++++++++++++----- src/include/86box/chipset.h | 3 ++ src/io.c | 4 +- src/machine/m_at_286_386sx.c | 10 ++-- 4 files changed, 93 insertions(+), 17 deletions(-) diff --git a/src/chipset/headland.c b/src/chipset/headland.c index ed2e318fc..91f1658d8 100644 --- a/src/chipset/headland.c +++ b/src/chipset/headland.c @@ -38,6 +38,23 @@ #include <86box/chipset.h> +enum { + HEADLAND_GC103 = 0x00, + HEADLAND_GC113 = 0x10, + HEADLAND_HT18_A = 0x11, + HEADLAND_HT18_B = 0x12, + HEADLAND_HT18_C = 0x18, + HEADLAND_HT21_C_D = 0x31, + HEADLAND_HT21_E = 0x32, +}; + + +#define HEADLAND_REV_MASK 0x0F + +#define HEADLAND_HAS_CRI 0x10 +#define HEADLAND_HAS_SLEEP 0x20 + + typedef struct { uint8_t valid, enabled; uint16_t mr; @@ -49,6 +66,7 @@ typedef struct { typedef struct headland_t { uint8_t revision; + uint8_t has_cri, has_sleep; uint8_t cri; uint8_t cr[7]; @@ -330,7 +348,7 @@ hl_write(uint16_t addr, uint8_t val, void *priv) break; case 0x01ed: - if (dev->revision > 0) + if (dev->has_cri) dev->cri = val; break; @@ -339,7 +357,7 @@ hl_write(uint16_t addr, uint8_t val, void *priv) break; case 0x01ef: - switch(dev->cri) { + switch(dev->cri & 0x07) { case 0: dev->cr[0] = (val & 0x1f) | mem_conf_cr0[(mem_size > 640 ? mem_size : mem_size - 128) >> 9]; memmap_state_update(dev); @@ -352,11 +370,18 @@ hl_write(uint16_t addr, uint8_t val, void *priv) case 2: case 3: - case 5: dev->cr[dev->cri] = val; memmap_state_update(dev); break; + case 5: + if (dev->has_sleep) + dev->cr[dev->cri] = val; + else + dev->cr[dev->cri] = val & 0x0f; + memmap_state_update(dev); + break; + case 4: dev->cr[4] = (dev->cr[4] & 0xf0) | (val & 0x0f); memmap_state_update(dev); @@ -421,7 +446,7 @@ hl_read(uint16_t addr, void *priv) break; case 0x01ed: - if (dev->revision > 0) + if (dev->has_cri) ret = dev->cri; break; @@ -430,7 +455,7 @@ hl_read(uint16_t addr, void *priv) break; case 0x01ef: - switch(dev->cri) { + switch(dev->cri & 0x07) { case 0: ret = (dev->cr[0] & 0x1f) | mem_conf_cr0[(mem_size > 640 ? mem_size : mem_size - 128) >> 9]; break; @@ -593,11 +618,14 @@ headland_init(const device_t *info) dev = (headland_t *) malloc(sizeof(headland_t)); memset(dev, 0x00, sizeof(headland_t)); - dev->revision = info->local; + dev->has_cri = (info->local & HEADLAND_HAS_CRI); + dev->has_sleep = (info->local & HEADLAND_HAS_SLEEP); + dev->revision = info->local & HEADLAND_REV_MASK; if (dev->revision > 0) ht386 = 1; + dev->cr[0] = 0x04; dev->cr[4] = dev->revision << 4; if (ht386) @@ -627,7 +655,7 @@ headland_init(const device_t *info) ram, MEM_MAPPING_INTERNAL, &dev->null_mr); if (mem_size > 640) { - mem_mapping_add(&dev->mid_mapping, 0xa0000, 0x40000, + mem_mapping_add(&dev->mid_mapping, 0xa0000, 0x60000, mem_read_b, mem_read_w, mem_read_l, mem_write_b, mem_write_w, mem_write_l, ram + 0xa0000, MEM_MAPPING_INTERNAL, &dev->null_mr); @@ -684,11 +712,26 @@ headland_init(const device_t *info) return(dev); } + const device_t headland_gc10x_device = { .name = "Headland GC101/102/103", .internal_name = "headland_gc10x", .flags = 0, - .local = 0, + .local = HEADLAND_GC103, + .init = headland_init, + .close = headland_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + +const device_t headland_gc113_device = { + .name = "Headland GC101/102/113", + .internal_name = "headland_gc113", + .flags = 0, + .local = HEADLAND_GC113, .init = headland_init, .close = headland_close, .reset = NULL, @@ -702,7 +745,7 @@ const device_t headland_ht18a_device = { .name = "Headland HT18 Rev. A", .internal_name = "headland_ht18a", .flags = 0, - .local = 1, + .local = HEADLAND_HT18_A, .init = headland_init, .close = headland_close, .reset = NULL, @@ -716,7 +759,7 @@ const device_t headland_ht18b_device = { .name = "Headland HT18 Rev. B", .internal_name = "headland_ht18b", .flags = 0, - .local = 2, + .local = HEADLAND_HT18_B, .init = headland_init, .close = headland_close, .reset = NULL, @@ -730,7 +773,35 @@ const device_t headland_ht18c_device = { .name = "Headland HT18 Rev. C", .internal_name = "headland_ht18c", .flags = 0, - .local = 8, + .local = HEADLAND_HT18_C, + .init = headland_init, + .close = headland_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + +const device_t headland_ht21c_d_device = { + .name = "Headland HT21 Rev. C/D", + .internal_name = "headland_ht21cd", + .flags = 0, + .local = HEADLAND_HT21_C_D, + .init = headland_init, + .close = headland_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + +const device_t headland_ht21e_device = { + .name = "Headland HT21 Rev. E", + .internal_name = "headland_ht21", + .flags = 0, + .local = HEADLAND_HT21_E, .init = headland_init, .close = headland_close, .reset = NULL, diff --git a/src/include/86box/chipset.h b/src/include/86box/chipset.h index eddb37bff..cc36578fa 100644 --- a/src/include/86box/chipset.h +++ b/src/include/86box/chipset.h @@ -55,9 +55,12 @@ extern const device_t gc100a_device; /* Headland */ extern const device_t headland_gc10x_device; +extern const device_t headland_gc113_device; extern const device_t headland_ht18a_device; extern const device_t headland_ht18b_device; extern const device_t headland_ht18c_device; +extern const device_t headland_ht21c_d_device; +extern const device_t headland_ht21e_device; /* IMS */ extern const device_t ims8848_device; diff --git a/src/io.c b/src/io.c index 268305e1a..08e61f7ba 100644 --- a/src/io.c +++ b/src/io.c @@ -323,8 +323,8 @@ inb(uint16_t port) cycles -= io_delay; /* TriGem 486-BIOS MHz output. */ - if (port == 0x1ed) - ret = 0xfe; + /* if (port == 0x1ed) + ret = 0xfe; */ io_log("[%04X:%08X] (%i, %i, %04i) in b(%04X) = %02X\n", CS, cpu_state.pc, in_smm, found, qfound, port, ret); diff --git a/src/machine/m_at_286_386sx.c b/src/machine/m_at_286_386sx.c index fb4186c4e..e30272063 100644 --- a/src/machine/m_at_286_386sx.c +++ b/src/machine/m_at_286_386sx.c @@ -67,15 +67,17 @@ machine_at_mr286_init(const machine_t *model) } static void -machine_at_headland_common_init(int ht386) +machine_at_headland_common_init(int type) { device_add(&keyboard_at_ami_device); if (fdc_type == FDC_INTERNAL) device_add(&fdc_at_device); - if (ht386) + if (type == 2) device_add(&headland_ht18b_device); + else if (type == 1) + device_add(&headland_gc113_device); else device_add(&headland_gc10x_device); } @@ -93,7 +95,7 @@ machine_at_tg286m_init(const machine_t *model) machine_at_common_ide_init(model); - machine_at_headland_common_init(0); + machine_at_headland_common_init(1); return ret; } @@ -114,7 +116,7 @@ machine_at_ama932j_init(const machine_t *model) if (gfxcard == VID_INTERNAL) device_add(&oti067_ama932j_device); - machine_at_headland_common_init(1); + machine_at_headland_common_init(2); return ret; } From ab154faf88ace1bba5503d1b20d6796f6a2f0852 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Thu, 4 Aug 2022 16:17:55 +0600 Subject: [PATCH 252/386] x86: mov r, DR6 now always writes bits 4-11 and bits 16-31 as 1 --- src/cpu/x86_ops_mov_ctrl.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/cpu/x86_ops_mov_ctrl.h b/src/cpu/x86_ops_mov_ctrl.h index 667ea9d31..0d973338e 100644 --- a/src/cpu/x86_ops_mov_ctrl.h +++ b/src/cpu/x86_ops_mov_ctrl.h @@ -91,7 +91,7 @@ static int opMOV_r_DRx_a16(uint32_t fetchdat) return 1; } fetch_ea_16(fetchdat); - cpu_state.regs[cpu_rm].l = dr[cpu_reg]; + cpu_state.regs[cpu_rm].l = dr[cpu_reg] | (cpu_reg == 6 ? 0xffff0ff0u : 0); CLOCK_CYCLES(6); PREFETCH_RUN(6, 2, rmdat, 0,0,0,0, 0); return 0; @@ -104,7 +104,7 @@ static int opMOV_r_DRx_a32(uint32_t fetchdat) return 1; } fetch_ea_32(fetchdat); - cpu_state.regs[cpu_rm].l = dr[cpu_reg]; + cpu_state.regs[cpu_rm].l = dr[cpu_reg] | (cpu_reg == 6 ? 0xffff0ff0u : 0); CLOCK_CYCLES(6); PREFETCH_RUN(6, 2, rmdat, 0,0,0,0, 1); return 0; From 64195df373f28de8bc806781e2873773e7eda047 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Thu, 4 Aug 2022 16:43:21 +0600 Subject: [PATCH 253/386] 386: set bit 14 of DR6 to 1 on INT 01 with TF set --- src/cpu/386.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/cpu/386.c b/src/cpu/386.c index 5f30e1199..d6d4ded16 100644 --- a/src/cpu/386.c +++ b/src/cpu/386.c @@ -196,6 +196,7 @@ exec386(int cycs) enter_smm_check(0); else if (trap) { flags_rebuild(); + dr[6] |= 0x4000; if (msw&1) pmodeint(1,0); else { From c743d360282736f038510997b909708245dfe7e6 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Thu, 4 Aug 2022 18:04:40 +0600 Subject: [PATCH 254/386] 386: Set BS flag in DR6 other interpreter as well --- src/cpu/386_dynarec.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/cpu/386_dynarec.c b/src/cpu/386_dynarec.c index 3e4d91ed2..f90ce5f80 100644 --- a/src/cpu/386_dynarec.c +++ b/src/cpu/386_dynarec.c @@ -404,6 +404,7 @@ exec386_dynarec_int(void) oldcs = CS; #endif cpu_state.oldpc = cpu_state.pc; + dr[6] |= 0x4000; x86_int(1); } From 730af4dd536b2d043c7aa13405bc4dc332adbced Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 4 Aug 2022 23:52:25 +0200 Subject: [PATCH 255/386] Implemented more previously unimplemented AT NVR behavior. --- src/nvr_at.c | 36 +++++++++++++++++++++++------------- 1 file changed, 23 insertions(+), 13 deletions(-) diff --git a/src/nvr_at.c b/src/nvr_at.c index bb4c38b85..eb749ff49 100644 --- a/src/nvr_at.c +++ b/src/nvr_at.c @@ -467,10 +467,10 @@ timer_update(void *priv) nvr->regs[RTC_REGC] |= REGC_AF; if (nvr->regs[RTC_REGB] & REGB_AIE) { /* Generate an interrupt. */ - if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) - picint(1 << nvr->irq); - - nvr->regs[RTC_REGC] |= REGC_IRQF; + if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) { + picintlevel(1 << nvr->irq); + nvr->regs[RTC_REGC] |= REGC_IRQF; + } } } @@ -481,10 +481,10 @@ timer_update(void *priv) nvr->regs[RTC_REGC] |= REGC_UF; if (nvr->regs[RTC_REGB] & REGB_UIE) { /* Generate an interrupt. */ - if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) - picint(1 << nvr->irq); - - nvr->regs[RTC_REGC] |= REGC_IRQF; + if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) { + picintlevel(1 << nvr->irq); + nvr->regs[RTC_REGC] |= REGC_IRQF; + } } } } @@ -533,10 +533,10 @@ timer_intr(void *priv) nvr->regs[RTC_REGC] |= REGC_PF; if (nvr->regs[RTC_REGB] & REGB_PIE) { /* Generate an interrupt. */ - if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) - picint(1 << nvr->irq); - - nvr->regs[RTC_REGC] |= REGC_IRQF; + if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) { + picintlevel(1 << nvr->irq); + nvr->regs[RTC_REGC] |= REGC_IRQF; + } } } } @@ -592,6 +592,7 @@ nvr_reg_write(uint16_t reg, uint8_t val, void *priv) local_t *local = (local_t *)nvr->data; struct tm tm; uint8_t old; + uint8_t irq = 0, old_irq = 0; old = nvr->regs[reg]; switch(reg) { @@ -601,12 +602,21 @@ nvr_reg_write(uint16_t reg, uint8_t val, void *priv) break; case RTC_REGB: + old_irq = (nvr->regs[RTC_REGB] & nvr->regs[RTC_REGC]) & 0x70; nvr->regs[RTC_REGB] = val; if (((old^val) & REGB_SET) && (val & REGB_SET)) { /* According to the datasheet... */ nvr->regs[RTC_REGA] &= ~REGA_UIP; nvr->regs[RTC_REGB] &= ~REGB_UIE; } + irq = (nvr->regs[RTC_REGB] & nvr->regs[RTC_REGC]) & 0x70; + if (old_irq && !irq) { + picintc(1 << nvr->irq); + nvr->regs[RTC_REGC] &= ~REGC_IRQF; + } else if (!old_irq && irq) { + picintlevel(1 << nvr->irq); + nvr->regs[RTC_REGC] |= REGC_IRQF; + } break; case RTC_REGC: /* R/O */ @@ -694,8 +704,8 @@ nvr_read(uint16_t addr, void *priv) break; case RTC_REGC: - picintc(1 << nvr->irq); ret = nvr->regs[RTC_REGC]; + picintc(1 << nvr->irq); nvr->regs[RTC_REGC] = 0x00; break; From be063529daebc47dcbe35c454174dd7b0c623cf0 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Fri, 5 Aug 2022 15:04:26 +0600 Subject: [PATCH 256/386] NVR: Don't fatal on failure to read NVR properly --- src/nvr.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/nvr.c b/src/nvr.c index b73aa6fa7..a68331e34 100644 --- a/src/nvr.c +++ b/src/nvr.c @@ -237,6 +237,7 @@ nvr_load(void) { char *path; FILE *fp; + uint8_t regs[NVR_MAXSIZE] = { 0 }; /* Make sure we have been initialized. */ if (saved_nvr == NULL) return(0); @@ -255,9 +256,12 @@ nvr_load(void) fp = plat_fopen(path, "rb"); saved_nvr->is_new = (fp == NULL); if (fp != NULL) { + memcpy(regs, saved_nvr->regs, sizeof(regs)); /* Read NVR contents from file. */ - if (fread(saved_nvr->regs, 1, saved_nvr->size, fp) != saved_nvr->size) - fatal("nvr_load(): Error reading data\n"); + if (fread(saved_nvr->regs, 1, saved_nvr->size, fp) != saved_nvr->size) { + memcpy(saved_nvr->regs, regs, sizeof(regs)); + saved_nvr->is_new = 1; + } (void)fclose(fp); } } else From 0faca6ae49d3d2eca7f6c951fb9953df2c712c8c Mon Sep 17 00:00:00 2001 From: Robert de Rooy Date: Fri, 5 Aug 2022 18:22:03 +0200 Subject: [PATCH 257/386] use zip for roms to prevent clobbering --- src/unix/assets/86Box.spec | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/unix/assets/86Box.spec b/src/unix/assets/86Box.spec index d5fe0a0b1..2f48d1687 100644 --- a/src/unix/assets/86Box.spec +++ b/src/unix/assets/86Box.spec @@ -20,7 +20,7 @@ License: GPLv2+ URL: https://86box.net Source0: https://github.com/86Box/86Box/archive/refs/tags/v%%{version}.tar.gz -Source1: https://github.com/86Box/roms/archive/refs/tags/%{version}.tar.gz +Source1: https://github.com/86Box/roms/archive/refs/tags/v%{version}.zip BuildRequires: cmake BuildRequires: desktop-file-utils From 1ec594b28152c6a7ae9b42caca347380d7f399a7 Mon Sep 17 00:00:00 2001 From: Robert de Rooy Date: Fri, 5 Aug 2022 21:09:37 +0200 Subject: [PATCH 258/386] revert ROM package back to it's own version --- bumpversion.sh | 11 ++++++++++- src/unix/assets/86Box.spec | 8 +++++--- 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/bumpversion.sh b/bumpversion.sh index 31ebf154b..ac6116bcc 100644 --- a/bumpversion.sh +++ b/bumpversion.sh @@ -17,9 +17,11 @@ # Parse arguments. newversion="$1" +romversion="$2" + if [ -z "$(echo "$newversion" | grep '\.')" ] then - echo '[!] Usage: bumpversion.sh x.y[.z]' + echo '[!] Usage: bumpversion.sh x.y[.z] [romversion]' exit 1 fi shift @@ -30,6 +32,12 @@ newversion_min=$(echo "$newversion" | cut -d. -f2) newversion_patch=$(echo "$newversion" | cut -d. -f3) [ -z "$newversion_patch" ] && newversion_patch=0 +if [ -z "${romversion}" ]; then + # Get the latest ROM release from the GitHub API. + romversion=$(curl --silent "https://api.github.com/repos/86Box/roms/releases/latest" | + grep '"tag_name":' | + sed -E 's/.*"([^"]+)".*/\1/') +fi # Switch to the repository root directory. cd "$(dirname "$0")" || exit @@ -61,6 +69,7 @@ patch_file src/include_make/*/version.h EMU_VERSION_PATCH 's/(#\s*define\s+EMU_V patch_file src/include_make/*/version.h COPYRIGHT_YEAR 's/(#\s*define\s+COPYRIGHT_YEAR\s+)[0-9]+/\1'"$(date +%Y)"'/' patch_file src/include_make/*/version.h EMU_DOCS_URL 's/(#\s*define\s+EMU_DOCS_URL\s+"https:\/\/[^\/]+\/en\/v)[^\/]+/\1'"$newversion_maj.$newversion_min"'/' patch_file src/unix/assets/*.spec Version 's/(Version:\s+)[0-9].+/\1'"$newversion"'/' +patch_file src/unix/assets/*.spec '%global romver' 's/(^%global\ romver\s+)[0-9]{8}/\1'"$romversion"'/' patch_file src/unix/assets/*.spec 'changelog version' 's/(^[*]\s.*>\s+)[0-9].+/\1'"$newversion"-1'/' patch_file src/unix/assets/*.spec 'changelog date' 's/(^[*]\s)[a-zA-Z]{3}\s[a-zA-Z]{3}\s[0-9]{2}\s[0-9]{4}/\1'"$(pretty_date)"'/' patch_file src/unix/assets/*.metainfo.xml release 's/( Date: Fri, 5 Aug 2022 23:12:03 +0200 Subject: [PATCH 259/386] qt: fix busy looping with evdev mouse Replace busy looping which was using 100% cpu with poll() --- src/qt/evdev_mouse.cpp | 26 +++++++++++++++++++++----- 1 file changed, 21 insertions(+), 5 deletions(-) diff --git a/src/qt/evdev_mouse.cpp b/src/qt/evdev_mouse.cpp index 120f4572c..186f49813 100644 --- a/src/qt/evdev_mouse.cpp +++ b/src/qt/evdev_mouse.cpp @@ -31,6 +31,7 @@ extern "C" #include <86box/86box.h> #include <86box/plat.h> #include <86box/mouse.h> +#include } static std::vector> evdev_mice; @@ -54,25 +55,40 @@ void evdev_mouse_poll() void evdev_thread_func() { + struct pollfd *pfds = (struct pollfd*)calloc(evdev_mice.size(), sizeof(struct pollfd)); + for (unsigned int i = 0; i < evdev_mice.size(); i++) + { + pfds[i].fd = libevdev_get_fd(evdev_mice[i].second); + pfds[i].events = POLLIN; + } + while (!stopped) { + poll(pfds, evdev_mice.size(), 500); for (unsigned int i = 0; i < evdev_mice.size(); i++) { struct input_event ev; - int rc = libevdev_next_event(evdev_mice[i].second, LIBEVDEV_READ_FLAG_NORMAL, &ev); - if (rc == 0 && ev.type == EV_REL && mouse_capture) - { - if (ev.code == REL_X) evdev_mouse_rel_x += ev.value; - if (ev.code == REL_Y) evdev_mouse_rel_y += ev.value; + if (pfds[i].revents & POLLIN) { + int rc; + while ((rc = libevdev_next_event(evdev_mice[i].second, LIBEVDEV_READ_FLAG_NORMAL, &ev)) == 0) + { + if (ev.type == EV_REL && mouse_capture) + { + if (ev.code == REL_X) evdev_mouse_rel_x += ev.value; + if (ev.code == REL_Y) evdev_mouse_rel_y += ev.value; + } + } } } } + for (unsigned int i = 0; i < evdev_mice.size(); i++) { libevdev_free(evdev_mice[i].second); evdev_mice[i].second = nullptr; close(evdev_mice[i].first); } + free(pfds); evdev_mice.clear(); } From ce4d7f9fc886a04ac743b1c85a39dec3b9bf8e1b Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Fri, 5 Aug 2022 23:22:39 +0200 Subject: [PATCH 260/386] Small cleanup --- src/qt/evdev_mouse.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/qt/evdev_mouse.cpp b/src/qt/evdev_mouse.cpp index 186f49813..5ad252f1a 100644 --- a/src/qt/evdev_mouse.cpp +++ b/src/qt/evdev_mouse.cpp @@ -69,8 +69,7 @@ void evdev_thread_func() { struct input_event ev; if (pfds[i].revents & POLLIN) { - int rc; - while ((rc = libevdev_next_event(evdev_mice[i].second, LIBEVDEV_READ_FLAG_NORMAL, &ev)) == 0) + while (libevdev_next_event(evdev_mice[i].second, LIBEVDEV_READ_FLAG_NORMAL, &ev) == 0) { if (ev.type == EV_REL && mouse_capture) { From 68812d4368355b04042526b7abd1fda01d5ac6da Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sat, 6 Aug 2022 11:51:39 +0200 Subject: [PATCH 261/386] qt_openglrenderer: fix fullscreen rendering on mac --- src/qt/qt_openglrenderer.cpp | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/src/qt/qt_openglrenderer.cpp b/src/qt/qt_openglrenderer.cpp index 3a5f58846..cce5b5014 100644 --- a/src/qt/qt_openglrenderer.cpp +++ b/src/qt/qt_openglrenderer.cpp @@ -95,8 +95,8 @@ OpenGLRenderer::resizeEvent(QResizeEvent *event) context->makeCurrent(this); glViewport( - destination.x(), - destination.y(), + destination.x() * devicePixelRatio(), + destination.y() * devicePixelRatio(), destination.width() * devicePixelRatio(), destination.height() * devicePixelRatio()); } @@ -179,8 +179,8 @@ OpenGLRenderer::initialize() glClearColor(0.f, 0.f, 0.f, 1.f); glViewport( - destination.x(), - destination.y(), + destination.x() * devicePixelRatio(), + destination.y() * devicePixelRatio(), destination.width() * devicePixelRatio(), destination.height() * devicePixelRatio()); @@ -425,6 +425,14 @@ OpenGLRenderer::onBlit(int buf_idx, int x, int y, int w, int h) context->makeCurrent(this); +#ifdef Q_OS_MACOS + glViewport( + destination.x() * devicePixelRatio(), + destination.y() * devicePixelRatio(), + destination.width() * devicePixelRatio(), + destination.height() * devicePixelRatio()); +#endif + if (source.width() != w || source.height() != h) { source.setRect(0, 0, w, h); From 3a1d9cff9aa70c3e434b878a091255e20485fe87 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sat, 6 Aug 2022 14:23:11 +0200 Subject: [PATCH 262/386] Add an instrumentation option for performance profiling Not built by default, this allows printing the emulation speed on stdout and exiting after a certain emulation time. --- src/86box.c | 10 ++++++++++ src/CMakeLists.txt | 4 ++++ src/include/86box/86box.h | 4 ++++ src/qt/qt_main.cpp | 12 ++++++++++++ 4 files changed, 30 insertions(+) diff --git a/src/86box.c b/src/86box.c index deded3382..56847b2a9 100644 --- a/src/86box.c +++ b/src/86box.c @@ -138,6 +138,10 @@ char rom_path[1024] = { '\0'}; /* (O) full path to ROMs */ rom_path_t rom_paths = { "", NULL }; /* (O) full paths to ROMs */ char log_path[1024] = { '\0'}; /* (O) full path of logfile */ char vm_name[1024] = { '\0'}; /* (O) display name of the VM */ +#ifdef USE_INSTRUMENT +uint8_t instru_enabled = 0; +uint64_t instru_run_ms = 0; +#endif /* Configuration values. */ int window_remember; @@ -567,6 +571,12 @@ usage: /* .. and then exit. */ return(0); +#ifdef USE_INSTRUMENT + } else if (!strcasecmp(argv[c], "--instrument")) { + if ((c+1) == argc) goto usage; + instru_enabled = 1; + sscanf(argv[++c], "%llu", &instru_run_ms); +#endif } /* Uhm... out of options here.. */ diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 1420aaa89..428d5b521 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -57,6 +57,10 @@ if(VNC) endif() endif() +if(INSTRUMENT) + add_compile_definitions(USE_INSTRUMENT) +endif() + target_link_libraries(86Box cpu chipset mch dev mem fdd game cdrom zip mo hdd net print scsi sio snd vid voodoo plat ui) diff --git a/src/include/86box/86box.h b/src/include/86box/86box.h index ca7fbb99c..30a7542dc 100644 --- a/src/include/86box/86box.h +++ b/src/include/86box/86box.h @@ -76,6 +76,10 @@ extern uint64_t source_hwnd; extern char rom_path[1024]; /* (O) full path to ROMs */ extern char log_path[1024]; /* (O) full path of logfile */ extern char vm_name[1024]; /* (O) display name of the VM */ +#ifdef USE_INSTRUMENT +extern uint8_t instru_enabled; +extern uint64_t instru_run_ms; +#endif #define window_x monitor_settings[0].mon_window_x #define window_y monitor_settings[0].mon_window_y diff --git a/src/qt/qt_main.cpp b/src/qt/qt_main.cpp index a74958511..df35095b9 100644 --- a/src/qt/qt_main.cpp +++ b/src/qt/qt_main.cpp @@ -109,9 +109,21 @@ main_thread_fn() if (drawits > 50) drawits = 0; +#ifdef USE_INSTRUMENT + uint64_t start_time = elapsed_timer.nsecsElapsed(); +#endif /* Run a block of code. */ pc_run(); +#ifdef USE_INSTRUMENT + if (instru_enabled) { + uint64_t elapsed_us = (elapsed_timer.nsecsElapsed() - start_time) / 1000; + uint64_t total_elapsed_us = (uint64_t)((double)tsc / cpu_s->rspeed * 1000); + printf("[instrument] %llu, %llu\n", total_elapsed_us, elapsed_us); + if (instru_run_ms && total_elapsed_us >= instru_run_ms) + break; + } +#endif /* Every 200 frames we save the machine status. */ if (++frames >= 200 && nvr_dosave) { qt_nvr_save(); From c6cf8486932c902ab0f03fcd889b046f91517cf4 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sat, 6 Aug 2022 14:51:42 +0200 Subject: [PATCH 263/386] Fix var name --- src/qt/qt_main.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/qt/qt_main.cpp b/src/qt/qt_main.cpp index df35095b9..694a0e5f6 100644 --- a/src/qt/qt_main.cpp +++ b/src/qt/qt_main.cpp @@ -118,9 +118,9 @@ main_thread_fn() #ifdef USE_INSTRUMENT if (instru_enabled) { uint64_t elapsed_us = (elapsed_timer.nsecsElapsed() - start_time) / 1000; - uint64_t total_elapsed_us = (uint64_t)((double)tsc / cpu_s->rspeed * 1000); - printf("[instrument] %llu, %llu\n", total_elapsed_us, elapsed_us); - if (instru_run_ms && total_elapsed_us >= instru_run_ms) + uint64_t total_elapsed_ms = (uint64_t)((double)tsc / cpu_s->rspeed * 1000); + printf("[instrument] %llu, %llu\n", total_elapsed_ms, elapsed_us); + if (instru_run_ms && total_elapsed_ms >= instru_run_ms) break; } #endif From 4bd7cf3653507814cb84e5c45bda59d6a2576494 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 7 Aug 2022 23:35:12 +0200 Subject: [PATCH 264/386] Made AAM with base 0 work as before, fixes Microsoft Flight Simulator 98. --- src/cpu/x86_ops_bcd.h | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/src/cpu/x86_ops_bcd.h b/src/cpu/x86_ops_bcd.h index b37b6a6df..2f64cbaf8 100644 --- a/src/cpu/x86_ops_bcd.h +++ b/src/cpu/x86_ops_bcd.h @@ -32,12 +32,7 @@ static int opAAM(uint32_t fetchdat) { int base = getbytef(); - if (base == 0) { - x86de(NULL, 0); - return 1; - } - - if (!cpu_isintel) base = 10; + if (!base || !cpu_isintel) base = 10; AH = AL / base; AL %= base; From 745c9f3eb52bd614c08926e9939ad396aa0bc361 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 8 Aug 2022 02:24:20 +0200 Subject: [PATCH 265/386] Another fix. --- src/cpu/x86_ops_bcd.h | 7 ++++++- src/cpu/x86seg.c | 4 ++++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/src/cpu/x86_ops_bcd.h b/src/cpu/x86_ops_bcd.h index 2f64cbaf8..efb0de264 100644 --- a/src/cpu/x86_ops_bcd.h +++ b/src/cpu/x86_ops_bcd.h @@ -32,7 +32,12 @@ static int opAAM(uint32_t fetchdat) { int base = getbytef(); - if (!base || !cpu_isintel) base = 10; + if (base == 0) { + x86de(NULL, 0); + return 1; + } + + if (!cpu_isintel) base = 10; AH = AL / base; AL %= base; diff --git a/src/cpu/x86seg.c b/src/cpu/x86seg.c index c9398dd69..2fda437e7 100644 --- a/src/cpu/x86seg.c +++ b/src/cpu/x86seg.c @@ -168,8 +168,12 @@ x86_doabrt(int x86_abrt) void x86de(char *s, uint16_t error) { +#ifdef BAD_CODE cpu_state.abrt = ABRT_DE; abrt_error = error; +#else + x86_int(0); +#endif } From 3407708a9efbc0f2a1686e421f2c75283fe576d3 Mon Sep 17 00:00:00 2001 From: Dominus Iniquitatis Date: Mon, 8 Aug 2022 06:52:20 +0300 Subject: [PATCH 266/386] qt: Adjusted "Controller 4" vertical position --- src/qt/qt_settingsstoragecontrollers.ui | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_settingsstoragecontrollers.ui b/src/qt/qt_settingsstoragecontrollers.ui index c4c44b019..30a59f982 100644 --- a/src/qt/qt_settingsstoragecontrollers.ui +++ b/src/qt/qt_settingsstoragecontrollers.ui @@ -172,7 +172,7 @@ - + Controller 4: From 4cb84a3a805be6c1bd2af566042eeb5cd4971341 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Mon, 8 Aug 2022 23:55:58 +0200 Subject: [PATCH 267/386] Optimize svga_render_blank --- src/video/vid_svga_render.c | 40 ++++++++++++++++--------------------- 1 file changed, 17 insertions(+), 23 deletions(-) diff --git a/src/video/vid_svga_render.c b/src/video/vid_svga_render.c index 17b4c4981..8c4735d4f 100644 --- a/src/video/vid_svga_render.c +++ b/src/video/vid_svga_render.c @@ -43,35 +43,29 @@ svga_render_null(svga_t *svga) void svga_render_blank(svga_t *svga) { - int x, xx; - if ((svga->displine + svga->y_add) < 0) - return; + return; if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; + svga->firstline_draw = svga->displine; svga->lastline_draw = svga->displine; - for (x = 0; x < (svga->hdisp + svga->scrollcache); x++) { - switch (svga->seqregs[1] & 9) { - case 0: - for (xx = 0; xx < 9; xx++) - buffer32->line[svga->displine + svga->y_add][svga->x_add + (x * 9) + xx] = 0x00000000; - break; - case 1: - for (xx = 0; xx < 8; xx++) - buffer32->line[svga->displine + svga->y_add][svga->x_add + (x * 8) + xx] = 0x00000000; - break; - case 8: - for (xx = 0; xx < 18; xx++) - buffer32->line[svga->displine + svga->y_add][svga->x_add + (x * 18) + xx] = 0x00000000; - break; - case 9: - for (xx = 0; xx < 16; xx++) - buffer32->line[svga->displine + svga->y_add][svga->x_add + (x * 16) + xx] = 0x00000000; - break; - } + uint32_t char_width = 0; + + switch (svga->seqregs[1] & 9) { + case 0: + char_width = 9; + case 1: + char_width = 8; + case 8: + char_width = 18; + case 9: + char_width = 16; } + + uint32_t *line_ptr = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + uint32_t line_width = (svga->hdisp + svga->scrollcache) * char_width * sizeof(uint32_t); + memset(line_ptr, 0, line_width); } From ce95d2e7bde908ea1a414061ae86afeabdc542a4 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Tue, 9 Aug 2022 00:29:04 +0200 Subject: [PATCH 268/386] Optimize svga_render_overscan --- src/video/vid_svga_render.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/src/video/vid_svga_render.c b/src/video/vid_svga_render.c index 8c4735d4f..3e8f53286 100644 --- a/src/video/vid_svga_render.c +++ b/src/video/vid_svga_render.c @@ -75,13 +75,14 @@ svga_render_overscan_left(svga_t *svga) int i; if ((svga->displine + svga->y_add) < 0) - return; + return; if (svga->scrblank || (svga->hdisp == 0)) - return; + return; + uint32_t *line_ptr = buffer32->line[svga->displine + svga->y_add]; for (i = 0; i < svga->x_add; i++) - buffer32->line[svga->displine + svga->y_add][i] = svga->overscan_color; + *line_ptr++ = svga->overscan_color; } @@ -91,14 +92,15 @@ svga_render_overscan_right(svga_t *svga) int i, right; if ((svga->displine + svga->y_add) < 0) - return; + return; if (svga->scrblank || (svga->hdisp == 0)) - return; + return; + uint32_t *line_ptr = &buffer32->line[svga->displine + svga->y_add][svga->x_add + svga->hdisp]; right = (overscan_x >> 1); for (i = 0; i < right; i++) - buffer32->line[svga->displine + svga->y_add][svga->x_add + svga->hdisp + i] = svga->overscan_color; + *line_ptr++ = svga->overscan_color; } From d3e6d13a84486f3f3ede97e964ef2ceef2739761 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Tue, 9 Aug 2022 01:37:29 +0200 Subject: [PATCH 269/386] Fix stupid mistake in svga_render_blank --- src/video/vid_svga_render.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/video/vid_svga_render.c b/src/video/vid_svga_render.c index 3e8f53286..3a8c4b10a 100644 --- a/src/video/vid_svga_render.c +++ b/src/video/vid_svga_render.c @@ -55,12 +55,16 @@ svga_render_blank(svga_t *svga) switch (svga->seqregs[1] & 9) { case 0: char_width = 9; + break; case 1: char_width = 8; + break; case 8: char_width = 18; + break; case 9: char_width = 16; + break; } uint32_t *line_ptr = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; From 2a6a0615569cc0eebfbdbb2a1624808125e49fe7 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 9 Aug 2022 04:34:48 +0200 Subject: [PATCH 270/386] nmi_raise() actually raises NMI, should fix ES1371 legacy device and other stuff. --- src/cpu/386_common.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c index 92360a248..3c0cd168a 100644 --- a/src/cpu/386_common.c +++ b/src/cpu/386_common.c @@ -1897,6 +1897,8 @@ nmi_raise(void) { if (is486 && (cpu_fast_off_flags & 0x20000000)) cpu_fast_off_advance(); + + nmi = 1; } From f70102c52966db845ba5b11841917122ee88ef9c Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Tue, 9 Aug 2022 15:35:32 +0600 Subject: [PATCH 271/386] qt: Add ability to open screenshots folder --- src/qt/qt_mainwindow.cpp | 8 ++++++++ src/qt/qt_mainwindow.hpp | 2 ++ src/qt/qt_mainwindow.ui | 7 +++++++ 3 files changed, 17 insertions(+) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index f05c32ba6..38abfda62 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -74,6 +74,7 @@ extern "C" { #include #include #include +#include #include #include @@ -2122,3 +2123,10 @@ void MainWindow::on_actionShow_non_primary_monitors_triggered() blitDummied = false; } + +void MainWindow::on_actionOpen_screenshots_folder_triggered() +{ + QDir(QString(usr_path) + QString("/screenshots/")).mkpath("."); + QDesktopServices::openUrl(QUrl(QString("file:///") + usr_path + QString("/screenshots/"))); +} + diff --git a/src/qt/qt_mainwindow.hpp b/src/qt/qt_mainwindow.hpp index c33decb44..feb50fb94 100644 --- a/src/qt/qt_mainwindow.hpp +++ b/src/qt/qt_mainwindow.hpp @@ -129,6 +129,8 @@ protected: private slots: void on_actionShow_non_primary_monitors_triggered(); + void on_actionOpen_screenshots_folder_triggered(); + private: Ui::MainWindow *ui; std::unique_ptr status; diff --git a/src/qt/qt_mainwindow.ui b/src/qt/qt_mainwindow.ui index 522d2f081..b1e954693 100644 --- a/src/qt/qt_mainwindow.ui +++ b/src/qt/qt_mainwindow.ui @@ -91,6 +91,8 @@ + + @@ -778,6 +780,11 @@ 6 + + + Open screenshots folder... + + From 4c4ac5438a5f2a81dfd6492412fcbbe2342ed1ff Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Tue, 9 Aug 2022 18:13:21 +0200 Subject: [PATCH 272/386] Optimize timer processing Around 25% faster timer processing --- src/include/86box/timer.h | 27 +++++------------- src/timer.c | 58 ++++++++++++++++++--------------------- 2 files changed, 34 insertions(+), 51 deletions(-) diff --git a/src/include/86box/timer.h b/src/include/86box/timer.h index afbcec140..fcccb8494 100644 --- a/src/include/86box/timer.h +++ b/src/include/86box/timer.h @@ -198,30 +198,12 @@ extern pc_timer_t * timer_head; extern int timer_inited; -static __inline void -timer_remove_head_inline(void) -{ - pc_timer_t *timer; - - if (timer_inited && timer_head) { - timer = timer_head; - timer_head = timer->next; - if (timer_head) { - timer_head->prev = NULL; - timer->next->prev = NULL; - } - timer->next = timer->prev = NULL; - timer->flags &= ~TIMER_ENABLED; - } -} - - static __inline void timer_process_inline(void) { pc_timer_t *timer; - if (!timer_inited || !timer_head) + if (!timer_head) return; while(1) { @@ -230,7 +212,12 @@ timer_process_inline(void) if (!TIMER_LESS_THAN_VAL(timer, (uint32_t)tsc)) break; - timer_remove_head_inline(); + timer_head = timer->next; + if (timer_head) + timer_head->prev = NULL; + + timer->next = timer->prev = NULL; + timer->flags &= ~TIMER_ENABLED; if (timer->flags & TIMER_SPLIT) timer_advance_ex(timer, 0); /* We're splitting a > 1 s period into multiple <= 1 s periods. */ diff --git a/src/timer.c b/src/timer.c index 32d382d54..f8e17be2e 100644 --- a/src/timer.c +++ b/src/timer.c @@ -41,20 +41,31 @@ timer_enable(pc_timer_t *timer) return; } - timer_node = timer_head; + if (TIMER_LESS_THAN(timer, timer_head)) { + timer->next = timer_head; + timer->prev = NULL; + timer_head->prev = timer; + timer_head = timer; + timer_target = timer_head->ts.ts32.integer; + return; + } + + if (!timer_head->next) { + timer_head->next = timer; + timer->prev = timer_head; + return; + } + + pc_timer_t *prev = timer_head; + timer_node = timer_head->next; while(1) { /*Timer expires before timer_node. Add to list in front of timer_node*/ if (TIMER_LESS_THAN(timer, timer_node)) { timer->next = timer_node; - timer->prev = timer_node->prev; + timer->prev = prev; timer_node->prev = timer; - if (timer->prev) - timer->prev->next = timer; - else { - timer_head = timer; - timer_target = timer_head->ts.ts32.integer; - } + prev->next = timer; return; } @@ -65,6 +76,7 @@ timer_enable(pc_timer_t *timer) return; } + prev = timer_node; timer_node = timer_node->next; } } @@ -91,33 +103,12 @@ timer_disable(pc_timer_t *timer) } -void -timer_remove_head(void) -{ - pc_timer_t *timer; - - if (!timer_inited) - return; - - if (timer_head) { - timer = timer_head; - timer_head = timer->next; - if (timer_head) { - timer_head->prev = NULL; - timer->next->prev = NULL; - } - timer->next = timer->prev = NULL; - timer->flags &= ~TIMER_ENABLED; - } -} - - void timer_process(void) { pc_timer_t *timer; - if (!timer_inited || !timer_head) + if (!timer_head) return; while(1) { @@ -126,7 +117,12 @@ timer_process(void) if (!TIMER_LESS_THAN_VAL(timer, (uint32_t)tsc)) break; - timer_remove_head(); + timer_head = timer->next; + if (timer_head) + timer_head->prev = NULL; + + timer->next = timer->prev = NULL; + timer->flags &= ~TIMER_ENABLED; if (timer->flags & TIMER_SPLIT) timer_advance_ex(timer, 0); /* We're splitting a > 1 s period into multiple <= 1 s periods. */ From 26d6b308a90631b545e92f46b55a406118147021 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Tue, 9 Aug 2022 19:14:42 +0200 Subject: [PATCH 273/386] Optimize IO in Around 36% faster --- src/include/86box/m_amstrad.h | 2 +- src/io.c | 73 +++++++++++++++++++++-------------- src/machine/m_amstrad.c | 5 ++- 3 files changed, 48 insertions(+), 32 deletions(-) diff --git a/src/include/86box/m_amstrad.h b/src/include/86box/m_amstrad.h index c33d10c70..1b99617ca 100644 --- a/src/include/86box/m_amstrad.h +++ b/src/include/86box/m_amstrad.h @@ -20,7 +20,7 @@ #ifndef MACHINE_AMSTRAD_H #define MACHINE_AMSTRAD_H -extern int amstrad_latch; +extern uint32_t amstrad_latch; enum { AMSTRAD_NOLATCH, diff --git a/src/io.c b/src/io.c index 08e61f7ba..6501a199a 100644 --- a/src/io.c +++ b/src/io.c @@ -312,12 +312,14 @@ inb(uint16_t port) p = q; } - if (port & 0x80) - amstrad_latch = AMSTRAD_NOLATCH; - else if (port & 0x4000) - amstrad_latch = AMSTRAD_SW10; - else - amstrad_latch = AMSTRAD_SW9; + if (amstrad_latch & 0x80000000) { + if (port & 0x80) + amstrad_latch = AMSTRAD_NOLATCH | 0x80000000; + else if (port & 0x4000) + amstrad_latch = AMSTRAD_SW10 | 0x80000000; + else + amstrad_latch = AMSTRAD_SW9 | 0x80000000; + } if (!found) cycles -= io_delay; @@ -401,12 +403,14 @@ inw(uint16_t port) } ret = (ret8[1] << 8) | ret8[0]; - if (port & 0x80) - amstrad_latch = AMSTRAD_NOLATCH; - else if (port & 0x4000) - amstrad_latch = AMSTRAD_SW10; - else - amstrad_latch = AMSTRAD_SW9; + if (amstrad_latch & 0x80000000) { + if (port & 0x80) + amstrad_latch = AMSTRAD_NOLATCH | 0x80000000; + else if (port & 0x4000) + amstrad_latch = AMSTRAD_SW10 | 0x80000000; + else + amstrad_latch = AMSTRAD_SW9 | 0x80000000; + } if (!found) cycles -= io_delay; @@ -487,17 +491,26 @@ inl(uint16_t port) ret16[0] = ret & 0xffff; ret16[1] = (ret >> 16) & 0xffff; - for (i = 0; i < 4; i += 2) { - p = io[(port + i) & 0xffff]; - while(p) { - q = p->next; - if (p->inw && !p->inl) { - ret16[i >> 1] &= p->inw(port + i, p->priv); - found |= 2; - qfound++; - } - p = q; - } + p = io[port & 0xffff]; + while (p) { + q = p->next; + if (p->inw && !p->inl) { + ret16[0] &= p->inw(port, p->priv); + found |= 2; + qfound++; + } + p = q; + } + + p = io[(port + 2) & 0xffff]; + while (p) { + q = p->next; + if (p->inw && !p->inl) { + ret16[1] &= p->inw(port + 2, p->priv); + found |= 2; + qfound++; + } + p = q; } ret = (ret16[1] << 16) | ret16[0]; @@ -519,12 +532,14 @@ inl(uint16_t port) } ret = (ret8[3] << 24) | (ret8[2] << 16) | (ret8[1] << 8) | ret8[0]; - if (port & 0x80) - amstrad_latch = AMSTRAD_NOLATCH; - else if (port & 0x4000) - amstrad_latch = AMSTRAD_SW10; - else - amstrad_latch = AMSTRAD_SW9; + if (amstrad_latch & 0x80000000) { + if (port & 0x80) + amstrad_latch = AMSTRAD_NOLATCH | 0x80000000; + else if (port & 0x4000) + amstrad_latch = AMSTRAD_SW10 | 0x80000000; + else + amstrad_latch = AMSTRAD_SW9 | 0x80000000; + } if (!found) cycles -= io_delay; diff --git a/src/machine/m_amstrad.c b/src/machine/m_amstrad.c index 5dc82226d..eb934ebd1 100644 --- a/src/machine/m_amstrad.c +++ b/src/machine/m_amstrad.c @@ -156,7 +156,7 @@ typedef struct { fdc_t *fdc; } amstrad_t; -int amstrad_latch; +uint32_t amstrad_latch; static uint8_t key_queue[16]; static int key_queue_start = 0, @@ -2255,7 +2255,7 @@ ams_read(uint16_t port, void *priv) else if (video_is_mda()) ret |= 0xc0; - switch (amstrad_latch) { + switch (amstrad_latch & 0x7fffffff) { case AMSTRAD_NOLATCH: ret &= ~0x20; break; @@ -2293,6 +2293,7 @@ machine_amstrad_init(const machine_t *model, int type) ams = (amstrad_t *) malloc(sizeof(amstrad_t)); memset(ams, 0x00, sizeof(amstrad_t)); ams->type = type; + amstrad_latch = 0x80000000; switch (type) { case AMS_PC200: From dd233978544d3d88f6aeec10c7123c959a6a364e Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Wed, 10 Aug 2022 01:27:54 +0600 Subject: [PATCH 274/386] qt: Add option to apply fullscreen stretching modes when maximized --- src/86box.c | 1 + src/config.c | 7 +++++++ src/include/86box/video.h | 1 + src/qt/qt_d3d9renderer.cpp | 2 ++ src/qt/qt_hardwarerenderer.cpp | 3 +++ src/qt/qt_hardwarerenderer.hpp | 4 ++++ src/qt/qt_mainwindow.cpp | 25 ++++++++++++++++++++++++- src/qt/qt_mainwindow.hpp | 5 ++++- src/qt/qt_mainwindow.ui | 9 +++++++++ src/qt/qt_openglrenderer.cpp | 2 ++ src/qt/qt_renderercommon.cpp | 2 +- src/qt/qt_renderercommon.hpp | 2 +- src/qt/qt_rendererstack.cpp | 1 + src/qt/qt_rendererstack.hpp | 4 ++++ src/qt/qt_softwarerenderer.cpp | 3 +++ src/qt/qt_vulkanwindowrenderer.cpp | 2 ++ 16 files changed, 69 insertions(+), 4 deletions(-) diff --git a/src/86box.c b/src/86box.c index 56847b2a9..85845b050 100644 --- a/src/86box.c +++ b/src/86box.c @@ -188,6 +188,7 @@ int enable_discord = 0; /* (C) enable Discord integration */ int pit_mode = -1; /* (C) force setting PIT mode */ int fm_driver = 0; /* (C) select FM sound driver */ int open_dir_usr_path = 0; /* default file open dialog directory of usr_path */ +int video_fullscreen_scale_maximized = 0; /* (C) Whether fullscreen scaling settings also apply when maximized. */ /* Statistics. */ extern int mmuflush; diff --git a/src/config.c b/src/config.c index 2a2f58c6c..768bbe3e4 100644 --- a/src/config.c +++ b/src/config.c @@ -969,6 +969,8 @@ load_video(void) ibm8514_enabled = !!config_get_int(cat, "8514a", 0); xga_enabled = !!config_get_int(cat, "xga", 0); show_second_monitors = !!config_get_int(cat, "show_second_monitors", 1); + video_fullscreen_scale_maximized = !!config_get_int(cat, "video_fullscreen_scale_maximized", 0); + p = config_get_string(cat, "gfxcard_2", NULL); if (!p) p = "none"; @@ -2554,6 +2556,11 @@ save_video(void) else config_set_int(cat, "show_second_monitors", show_second_monitors); + if (video_fullscreen_scale_maximized == 0) + config_delete_var(cat, "video_fullscreen_scale_maximized"); + else + config_set_int(cat, "video_fullscreen_scale_maximized", video_fullscreen_scale_maximized); + delete_section_if_empty(cat); } diff --git a/src/include/86box/video.h b/src/include/86box/video.h index 8661fcef8..85c95c98d 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -133,6 +133,7 @@ extern atomic_bool doresize_monitors[MONITORS_NUM]; extern int monitor_index_global; extern int gfxcard_2; extern int show_second_monitors; +extern int video_fullscreen_scale_maximized; typedef rgb_t PALETTE[256]; diff --git a/src/qt/qt_d3d9renderer.cpp b/src/qt/qt_d3d9renderer.cpp index e7ef16f77..96718a4a2 100644 --- a/src/qt/qt_d3d9renderer.cpp +++ b/src/qt/qt_d3d9renderer.cpp @@ -145,6 +145,7 @@ void D3D9Renderer::blit(int x, int y, int w, int h) return; } surfaceInUse = true; + auto origSource = source; source.setRect(x, y, w, h); RECT srcRect; D3DLOCKED_RECT lockRect; @@ -164,6 +165,7 @@ void D3D9Renderer::blit(int x, int y, int w, int h) d3d9surface->UnlockRect(); } else video_blit_complete_monitor(m_monitor_index); + if (origSource != source) onResize(this->width() * devicePixelRatioF(), this->height() * devicePixelRatioF()); surfaceInUse = false; QTimer::singleShot(0, this, [this] { this->update(); }); } diff --git a/src/qt/qt_hardwarerenderer.cpp b/src/qt/qt_hardwarerenderer.cpp index 30ca74ecd..3577234ee 100644 --- a/src/qt/qt_hardwarerenderer.cpp +++ b/src/qt/qt_hardwarerenderer.cpp @@ -134,6 +134,7 @@ void HardwareRenderer::initializeGL() pclog("OpenGL version: %s\n", glGetString(GL_VERSION)); pclog("OpenGL shader language version: %s\n", glGetString(GL_SHADING_LANGUAGE_VERSION)); glClearColor(0, 0, 0, 1); + m_texture->setWrapMode(QOpenGLTexture::ClampToEdge); } void HardwareRenderer::paintGL() { @@ -187,6 +188,7 @@ void HardwareRenderer::onBlit(int buf_idx, int x, int y, int w, int h) { auto tval = this; void* nuldata = 0; if (memcmp(&tval, &nuldata, sizeof(void*)) == 0) return; + auto origSource = source; if (!m_texture || !m_texture->isCreated()) { buf_usage[buf_idx].clear(); @@ -197,6 +199,7 @@ void HardwareRenderer::onBlit(int buf_idx, int x, int y, int w, int h) { m_texture->setData(QOpenGLTexture::PixelFormat::RGBA, QOpenGLTexture::PixelType::UInt8, (const void*)imagebufs[buf_idx].get()); buf_usage[buf_idx].clear(); source.setRect(x, y, w, h); + if (origSource != source) onResize(this->width(), this->height()); update(); } diff --git a/src/qt/qt_hardwarerenderer.hpp b/src/qt/qt_hardwarerenderer.hpp index af4f05464..b9b7895e0 100644 --- a/src/qt/qt_hardwarerenderer.hpp +++ b/src/qt/qt_hardwarerenderer.hpp @@ -47,6 +47,10 @@ public: void resizeGL(int w, int h) override; void initializeGL() override; void paintGL() override; + void exposeEvent(QExposeEvent* event) override + { + onResize(size().width(), size().height()); + } std::vector> getBuffers() override; HardwareRenderer(QWidget* parent = nullptr, RenderType rtype = RenderType::OpenGL) : QOpenGLWindow(QOpenGLWindow::NoPartialUpdate, parent->windowHandle()), QOpenGLFunctions() diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 38abfda62..c19dc4f54 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -133,6 +133,8 @@ std::atomic blitDummied{false}; extern void qt_mouse_capture(int); extern "C" void qt_blit(int x, int y, int w, int h, int monitor_index); +extern MainWindow* main_window; + MainWindow::MainWindow(QWidget *parent) : QMainWindow(parent), ui(new Ui::MainWindow) @@ -293,6 +295,7 @@ MainWindow::MainWindow(QWidget *parent) : ui->actionShow_non_primary_monitors->setChecked(show_second_monitors); ui->actionUpdate_status_bar_icons->setChecked(update_icons); ui->actionEnable_Discord_integration->setChecked(enable_discord); + ui->actionApply_fullscreen_stretch_mode_when_maximized->setChecked(video_fullscreen_scale_maximized); #if defined Q_OS_WINDOWS || defined Q_OS_MACOS /* Make the option visible only if ANGLE is loaded. */ @@ -1773,11 +1776,15 @@ static void update_fullscreen_scale_checkboxes(Ui::MainWindow* ui, QAction* sele ui->actionFullScreen_keepRatio->setChecked(ui->actionFullScreen_keepRatio == selected); ui->actionFullScreen_int->setChecked(ui->actionFullScreen_int == selected); - if (video_fullscreen > 0) { + { auto widget = ui->stackedWidget->currentWidget(); ui->stackedWidget->onResize(widget->width(), widget->height()); } + for (int i = 1; i < MONITORS_NUM; i++) { + if (main_window->renderers[i]) main_window->renderers[i]->onResize(main_window->renderers[i]->width(), main_window->renderers[i]->height()); + } + device_force_redraw(); config_save(); } @@ -2130,3 +2137,19 @@ void MainWindow::on_actionOpen_screenshots_folder_triggered() QDesktopServices::openUrl(QUrl(QString("file:///") + usr_path + QString("/screenshots/"))); } + +void MainWindow::on_actionApply_fullscreen_stretch_mode_when_maximized_triggered(bool checked) +{ + video_fullscreen_scale_maximized = checked; + + auto widget = ui->stackedWidget->currentWidget(); + ui->stackedWidget->onResize(widget->width(), widget->height()); + + for (int i = 1; i < MONITORS_NUM; i++) { + if (renderers[i]) renderers[i]->onResize(renderers[i]->width(), renderers[i]->height()); + } + + device_force_redraw(); + config_save(); +} + diff --git a/src/qt/qt_mainwindow.hpp b/src/qt/qt_mainwindow.hpp index feb50fb94..c48333706 100644 --- a/src/qt/qt_mainwindow.hpp +++ b/src/qt/qt_mainwindow.hpp @@ -33,6 +33,8 @@ public: void blitToWidget(int x, int y, int w, int h, int monitor_index); QSize getRenderWidgetSize(); void setSendKeyboardInput(bool enabled); + + std::array, 8> renderers; signals: void paint(const QImage& image); void resizeContents(int w, int h); @@ -131,10 +133,11 @@ private slots: void on_actionOpen_screenshots_folder_triggered(); + void on_actionApply_fullscreen_stretch_mode_when_maximized_triggered(bool checked); + private: Ui::MainWindow *ui; std::unique_ptr status; - std::array, 8> renderers; std::shared_ptr mm; #ifdef Q_OS_MACOS diff --git a/src/qt/qt_mainwindow.ui b/src/qt/qt_mainwindow.ui index b1e954693..3551eddb1 100644 --- a/src/qt/qt_mainwindow.ui +++ b/src/qt/qt_mainwindow.ui @@ -179,6 +179,7 @@ + @@ -785,6 +786,14 @@ Open screenshots folder... + + + true + + + Apply fullscreen stretch mode when maximized + + diff --git a/src/qt/qt_openglrenderer.cpp b/src/qt/qt_openglrenderer.cpp index cce5b5014..115e6af7f 100644 --- a/src/qt/qt_openglrenderer.cpp +++ b/src/qt/qt_openglrenderer.cpp @@ -80,6 +80,8 @@ OpenGLRenderer::exposeEvent(QExposeEvent *event) if (!isInitialized) initialize(); + + onResize(size().width(), size().height()); } void diff --git a/src/qt/qt_renderercommon.cpp b/src/qt/qt_renderercommon.cpp index 0974c1f78..bb4903ee8 100644 --- a/src/qt/qt_renderercommon.cpp +++ b/src/qt/qt_renderercommon.cpp @@ -47,7 +47,7 @@ static void integer_scale(double *d, double *g) { } void RendererCommon::onResize(int width, int height) { - if (video_fullscreen == 0) { + if (video_fullscreen == 0 && video_fullscreen_scale_maximized ? (parentWidget->isMaximized() == false && (main_window->isAncestorOf(parentWidget) && main_window->isMaximized() == false)) : 1) { destination.setRect(0, 0, width, height); return; } diff --git a/src/qt/qt_renderercommon.hpp b/src/qt/qt_renderercommon.hpp index 1a0bf73e1..4a1b18341 100644 --- a/src/qt/qt_renderercommon.hpp +++ b/src/qt/qt_renderercommon.hpp @@ -37,7 +37,7 @@ public: protected: bool eventDelegate(QEvent *event, bool &result); - QRect source, destination; + QRect source{0, 0, 0, 0}, destination; QWidget *parentWidget { nullptr }; std::vector buf_usage; diff --git a/src/qt/qt_rendererstack.cpp b/src/qt/qt_rendererstack.cpp index 273bc4c95..3ff223ce4 100644 --- a/src/qt/qt_rendererstack.cpp +++ b/src/qt/qt_rendererstack.cpp @@ -397,6 +397,7 @@ RendererStack::createRenderer(Renderer renderer) if (current.get() == nullptr) return; current->setFocusPolicy(Qt::NoFocus); current->setFocusProxy(this); + current->setSizePolicy(QSizePolicy::Expanding, QSizePolicy::Expanding); addWidget(current.get()); this->setStyleSheet("background-color: black"); diff --git a/src/qt/qt_rendererstack.hpp b/src/qt/qt_rendererstack.hpp index 75cabec49..b2eccc84a 100644 --- a/src/qt/qt_rendererstack.hpp +++ b/src/qt/qt_rendererstack.hpp @@ -32,6 +32,10 @@ public: void wheelEvent(QWheelEvent *event) override; void leaveEvent(QEvent *event) override; void closeEvent(QCloseEvent *event) override; + void resizeEvent(QResizeEvent *event) override + { + onResize(event->size().width(), event->size().height()); + } void keyPressEvent(QKeyEvent *event) override { event->ignore(); diff --git a/src/qt/qt_softwarerenderer.cpp b/src/qt/qt_softwarerenderer.cpp index 850e8369a..44a69c144 100644 --- a/src/qt/qt_softwarerenderer.cpp +++ b/src/qt/qt_softwarerenderer.cpp @@ -57,11 +57,14 @@ void SoftwareRenderer::onBlit(int buf_idx, int x, int y, int w, int h) { auto tval = this; void* nuldata = 0; if (memcmp(&tval, &nuldata, sizeof(void*)) == 0) return; + auto origSource = source; cur_image = buf_idx; buf_usage[(buf_idx + 1) % 2].clear(); source.setRect(x, y, w, h); + + if (source != origSource) onResize(this->width(), this->height()); update(); } diff --git a/src/qt/qt_vulkanwindowrenderer.cpp b/src/qt/qt_vulkanwindowrenderer.cpp index cb3b96e14..629665d62 100644 --- a/src/qt/qt_vulkanwindowrenderer.cpp +++ b/src/qt/qt_vulkanwindowrenderer.cpp @@ -836,9 +836,11 @@ bool VulkanWindowRenderer::event(QEvent *event) void VulkanWindowRenderer::onBlit(int buf_idx, int x, int y, int w, int h) { + auto origSource = source; source.setRect(x, y, w, h); if (isExposed()) requestUpdate(); buf_usage[0].clear(); + if (origSource != source) onResize(this->width(), this->height()); } uint32_t VulkanWindowRenderer::getBytesPerRow() From 0c2d9cb2891009c6cd53036e7ca9fc1ab8d10d3b Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 9 Aug 2022 23:16:38 +0200 Subject: [PATCH 275/386] XGA: Cursor no longer gets black parts when returning from Mystify screensaver to GUI and, at the same time, keeping the Win95 cursor intact. Mono blits no longer cause transparency issues in some programs (e.g.: Creative utilities such as MIDI and CD on Win3.1x). --- src/include/86box/vid_xga.h | 2 +- src/video/vid_xga.c | 144 ++++++++++++++++++++---------------- 2 files changed, 82 insertions(+), 64 deletions(-) diff --git a/src/include/86box/vid_xga.h b/src/include/86box/vid_xga.h index 866aea4a3..f60b3359b 100644 --- a/src/include/86box/vid_xga.h +++ b/src/include/86box/vid_xga.h @@ -92,7 +92,7 @@ typedef struct xga_t { int on; int op_mode_reset, linear_endian_reverse; int sprite_pos, sprite_pos_prefetch, cursor_data_on; - int pal_test; + int pal_test, a5_test; int type, bus; uint32_t linear_base, linear_size, banked_mask; diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index 2941d9cb2..4a141660b 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -73,6 +73,8 @@ linear: } xga->on = 0; vga_on = 1; + if (((xga->op_mode & 7) == 4) && ((svga->gdcreg[6] & 0x0c) == 0x0c) && !xga->a5_test) + xga->linear_endian_reverse = 1; } else { mem_mapping_disable(&svga->mapping); mem_mapping_set_addr(&xga->video_mapping, 0xb0000, 0x10000); @@ -320,8 +322,18 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) xga->cursor_data_on = 0; } } - if ((xga->sprite_pos > 16) && (xga->sprite_pos <= 0x1ff)) - xga->cursor_data_on = 0; + + if ((xga->sprite_pos > 16) && (xga->sprite_pos <= 0x1ff)) { + if (xga->aperture_cntl) { + if (xga->sprite_pos & 0x0f) + xga->cursor_data_on = 1; + else + xga->cursor_data_on = 0; + } else { + xga->cursor_data_on = 0; + } + } + //pclog("Sprite POS = %d, data on = %d, idx = %d, apcntl = %d\n", xga->sprite_pos, xga->cursor_data_on, xga->sprite_pal_addr_idx, xga->aperture_cntl); break; case 0x62: @@ -716,7 +728,7 @@ xga_accel_read_pattern_map_pixel(svga_t *svga, int x, int y, int map, uint32_t b xga_t *xga = &svga->xga; uint32_t addr = base; int bits; - uint32_t byte, byte2; + uint32_t byte; uint8_t px; int skip = 0; @@ -735,7 +747,6 @@ xga_accel_read_pattern_map_pixel(svga_t *svga, int x, int y, int map, uint32_t b } else { byte = mem_readb_phys(addr); } - byte2 = byte; if ((xga->accel.px_map_format[map] & 8) && !(xga->access_mode & 8)) if (xga->linear_endian_reverse) bits = 7 - (x & 7); @@ -744,18 +755,18 @@ xga_accel_read_pattern_map_pixel(svga_t *svga, int x, int y, int map, uint32_t b else { bits = 7 - (x & 7); } - px = (byte2 >> bits) & 1; + px = (byte >> bits) & 1; return px; } static uint32_t -xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int width, int height) +xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int width) { xga_t *xga = &svga->xga; uint32_t addr = base; int bits; - uint32_t byte, byte2; + uint32_t byte; uint8_t px; int skip = 0; @@ -776,7 +787,6 @@ xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int } else { byte = mem_readb_phys(addr); } - byte2 = byte; if ((xga->accel.px_map_format[map] & 8) && !(xga->access_mode & 8)) if (xga->linear_endian_reverse) bits = 7 - (x & 7); @@ -785,7 +795,7 @@ xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int else { bits = 7 - (x & 7); } - px = (byte2 >> bits) & 1; + px = (byte >> bits) & 1; return px; case 3: /*8-bit*/ addr += (y * width); @@ -819,12 +829,11 @@ xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int } static void -xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, uint32_t pixel, int width, int height) +xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, uint32_t pixel, int width) { xga_t *xga = &svga->xga; uint32_t addr = base; uint8_t byte, mask; - uint8_t byte2; int skip = 0; if (xga->base_addr_1mb) { @@ -844,7 +853,6 @@ xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, ui } else { byte = mem_readb_phys(addr); } - byte2 = byte; if ((xga->accel.px_map_format[map] & 8) && !(xga->access_mode & 8)) { if (xga->linear_endian_reverse) mask = 1 << (7 - (x & 7)); @@ -853,11 +861,19 @@ xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, ui } else { mask = 1 << (7 - (x & 7)); } - byte2 = (byte2 & ~mask) | ((pixel ? 0xff : 0) & mask); - if (!skip) { - WRITE(addr, byte2); + byte = (byte & ~mask) | ((pixel ? 0xff : 0) & mask); + if (pixel & 1) { + if (!skip) { + xga->vram[((addr)) & (xga->vram_mask)] |= mask; + xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = changeframecount; + } + } else { + if (!skip) { + xga->vram[((addr)) & (xga->vram_mask)] &= ~mask; + xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = changeframecount; + } } - mem_writeb_phys(addr, byte2); + mem_writeb_phys(addr, byte); break; case 3: /*8-bit*/ addr += (y * width); @@ -947,8 +963,8 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) if (xga->accel.command & 0xc0) { if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1, xga->accel.px_map_height[xga->accel.src_map] + 1) : xga->accel.frgd_color; - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || @@ -962,19 +978,19 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); if ((xga->accel.command & 0x30) == 0) { if (ssv & 0x10) - xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); } else if (((xga->accel.command & 0x30) == 0x10) && x) { if (ssv & 0x10) - xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); } else if (((xga->accel.command & 0x30) == 0x20) && y) { if (ssv & 0x10) - xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); } } } } else { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1, xga->accel.px_map_height[xga->accel.src_map] + 1) : xga->accel.frgd_color; - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || @@ -988,13 +1004,13 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); if ((xga->accel.command & 0x30) == 0) { if (ssv & 0x10) - xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); } else if (((xga->accel.command & 0x30) == 0x10) && x) { if (ssv & 0x10) - xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); } else if (((xga->accel.command & 0x30) == 0x20) && y) { if (ssv & 0x10) - xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); } } } @@ -1080,8 +1096,8 @@ xga_line_draw_write(svga_t *svga) if (steep) { if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1, xga->accel.px_map_height[xga->accel.src_map] + 1) : xga->accel.frgd_color; - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || @@ -1094,18 +1110,18 @@ xga_line_draw_write(svga_t *svga) ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); if ((xga->accel.command & 0x30) == 0) - xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); else if (((xga->accel.command & 0x30) == 0x10) && x) - xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); else if (((xga->accel.command & 0x30) == 0x20) && y) - xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); } } } else { if ((dy >= xga->accel.mask_map_origin_x_off) && (dy <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dx >= xga->accel.mask_map_origin_y_off) && (dx <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1, xga->accel.px_map_height[xga->accel.src_map] + 1) : xga->accel.frgd_color; - dest_dat = xga_accel_read_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + dest_dat = xga_accel_read_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || @@ -1118,18 +1134,18 @@ xga_line_draw_write(svga_t *svga) ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); if ((xga->accel.command & 0x30) == 0) - xga_accel_write_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); else if (((xga->accel.command & 0x30) == 0x10) && x) - xga_accel_write_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); else if (((xga->accel.command & 0x30) == 0x20) && y) - xga_accel_write_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); } } } } else { if (steep) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1, xga->accel.px_map_height[xga->accel.src_map] + 1) : xga->accel.frgd_color; - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || @@ -1142,15 +1158,15 @@ xga_line_draw_write(svga_t *svga) ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); if ((xga->accel.command & 0x30) == 0) - xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); else if (((xga->accel.command & 0x30) == 0x10) && x) - xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); else if (((xga->accel.command & 0x30) == 0x20) && y) - xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); } } else { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1, xga->accel.px_map_height[xga->accel.src_map] + 1) : xga->accel.frgd_color; - dest_dat = xga_accel_read_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + dest_dat = xga_accel_read_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || @@ -1163,11 +1179,11 @@ xga_line_draw_write(svga_t *svga) ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); if ((xga->accel.command & 0x30) == 0) - xga_accel_write_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); else if (((xga->accel.command & 0x30) == 0x10) && x) - xga_accel_write_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); else if (((xga->accel.command & 0x30) == 0x20) && y) - xga_accel_write_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); } } } @@ -1267,8 +1283,8 @@ xga_bitblt(svga_t *svga) if (xga->accel.command & 0xc0) { if ((xga->accel.dx >= xga->accel.mask_map_origin_x_off) && (xga->accel.dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (xga->accel.dy >= xga->accel.mask_map_origin_y_off) && (xga->accel.dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1, xga->accel.px_map_height[xga->accel.src_map] + 1) : xga->accel.frgd_color; - dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; + dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || @@ -1280,12 +1296,12 @@ xga_bitblt(svga_t *svga) old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); - xga_accel_write_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dest_dat, dstwidth + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dest_dat, dstwidth + 1); } } } else { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1, xga->accel.px_map_height[xga->accel.src_map] + 1) : xga->accel.frgd_color; - dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; + dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || @@ -1297,7 +1313,7 @@ xga_bitblt(svga_t *svga) old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); - xga_accel_write_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dest_dat, dstwidth + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dest_dat, dstwidth + 1); } } @@ -1361,11 +1377,11 @@ xga_bitblt(svga_t *svga) if ((xga->accel.dx >= xga->accel.mask_map_origin_x_off) && (xga->accel.dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (xga->accel.dy >= xga->accel.mask_map_origin_y_off) && (xga->accel.dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { if (mix) - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1, xga->accel.px_map_height[xga->accel.src_map] + 1) : xga->accel.frgd_color; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; else - src_dat = (((xga->accel.command >> 30) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1, xga->accel.px_map_height[xga->accel.src_map] + 1) : xga->accel.bkgd_color; + src_dat = (((xga->accel.command >> 30) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.bkgd_color; - dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || @@ -1377,16 +1393,16 @@ xga_bitblt(svga_t *svga) old_dest_dat = dest_dat; ROP(mix, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); - xga_accel_write_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dest_dat, dstwidth + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dest_dat, dstwidth + 1); } } } else { if (mix) - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1, xga->accel.px_map_height[xga->accel.src_map] + 1) : xga->accel.frgd_color; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; else - src_dat = (((xga->accel.command >> 30) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1, xga->accel.px_map_height[xga->accel.src_map] + 1) : xga->accel.bkgd_color; + src_dat = (((xga->accel.command >> 30) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.bkgd_color; - dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || @@ -1398,7 +1414,7 @@ xga_bitblt(svga_t *svga) old_dest_dat = dest_dat; ROP(mix, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); - xga_accel_write_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dest_dat, dstwidth + 1, xga->accel.px_map_height[xga->accel.dst_map] + 1); + xga_accel_write_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dest_dat, dstwidth + 1); } } @@ -1827,7 +1843,7 @@ exec_command: xga->accel.src_map = ((xga->accel.command >> 20) & 0x0f); //if (xga->accel.pat_src) { - // pclog("[%04X:%08X]: Accel Command = %02x, full = %08x, patwidth = %d, dstwidth = %d, srcwidth = %d, patheight = %d, dstheight = %d, srcheight = %d, px = %d, py = %d, dx = %d, dy = %d, sx = %d, sy = %d, patsrc = %d, dstmap = %d, srcmap = %d, dstbase = %08x, srcbase = %08x, patbase = %08x, dstformat = %x, srcformat = %x\n", + // pclog("[%04X:%08X]: Accel Command = %02x, full = %08x, patwidth = %d, dstwidth = %d, srcwidth = %d, patheight = %d, dstheight = %d, srcheight = %d, px = %d, py = %d, dx = %d, dy = %d, sx = %d, sy = %d, patsrc = %d, dstmap = %d, srcmap = %d, dstbase = %08x, srcbase = %08x, patbase = %08x, dstformat = %x, srcformat = %x, planemask = %08x\n", // CS, cpu_state.pc, ((xga->accel.command >> 24) & 0x0f), xga->accel.command, xga->accel.px_map_width[xga->accel.pat_src], // xga->accel.px_map_width[xga->accel.dst_map], xga->accel.px_map_width[xga->accel.src_map], // xga->accel.px_map_height[xga->accel.pat_src], xga->accel.px_map_height[xga->accel.dst_map], @@ -1837,8 +1853,8 @@ exec_command: // xga->accel.src_map_x, xga->accel.src_map_y, // xga->accel.pat_src, xga->accel.dst_map, xga->accel.src_map, // xga->accel.px_map_base[xga->accel.dst_map], xga->accel.px_map_base[xga->accel.src_map], xga->accel.px_map_base[xga->accel.pat_src], - // xga->accel.px_map_format[xga->accel.dst_map] & 0x0f, xga->accel.px_map_format[xga->accel.src_map] & 0x0f); - // pclog("\n"); + // xga->accel.px_map_format[xga->accel.dst_map] & 0x0f, xga->accel.px_map_format[xga->accel.src_map] & 0x0f, xga->accel.plane_mask); + // //pclog("\n"); //} switch ((xga->accel.command >> 24) & 0x0f) { case 3: /*Bresenham Line Draw Read*/ @@ -2681,6 +2697,8 @@ static void xga->hwcursor.cur_xsize = 64; xga->hwcursor.cur_ysize = 64; xga->bios_rom.sz = 0x2000; + xga->linear_endian_reverse = 0; + xga->a5_test = 0; f = rom_fopen(xga->type ? XGA2_BIOS_PATH : XGA_BIOS_PATH, "rb"); (void)fseek(f, 0L, SEEK_END); From 43952325ba4aecd91be2e5a4d05ce1507c99b45c Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 9 Aug 2022 23:21:56 +0200 Subject: [PATCH 276/386] Fixed initialized 8-bit blits for OS/2 2.0 Limited Availability (6H.177) and other builds before GA/RTM. --- src/video/vid_svga.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index ea70248dc..9ab96c169 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -1079,6 +1079,7 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p) if (((svga->xga.op_mode & 7) >= 4) && (svga->xga.aperture_cntl == 1)) { if (val == 0xa5) { /*Memory size test of XGA*/ svga->xga.test = val; + svga->xga.a5_test = 1; return; } else if (val == 0x5a) { svga->xga.test = val; From 8c8a42a9be0c2476fa1cd3c3c33a73644d60db89 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 9 Aug 2022 23:27:03 +0200 Subject: [PATCH 277/386] ESDI MCA: No longer fatal on default reads, fixes Win3.0 MME installation to hard disk using ESDI MCA. --- src/disk/hdc_esdi_mca.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/disk/hdc_esdi_mca.c b/src/disk/hdc_esdi_mca.c index 72db74359..6f6b77723 100644 --- a/src/disk/hdc_esdi_mca.c +++ b/src/disk/hdc_esdi_mca.c @@ -863,7 +863,8 @@ esdi_read(uint16_t port, void *priv) break; default: - fatal("esdi_read port=%04x\n", port); + esdi_mca_log("esdi_read port=%04x\n", port); + break; } return (ret); From 2ebee217b542ec007df7caa48b7f28e89eeff69e Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Wed, 10 Aug 2022 11:10:54 +0600 Subject: [PATCH 278/386] qt_d3d9renderer: Clear screen backbuffer at each render --- src/qt/qt_d3d9renderer.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/qt/qt_d3d9renderer.cpp b/src/qt/qt_d3d9renderer.cpp index 96718a4a2..b4269d2e7 100644 --- a/src/qt/qt_d3d9renderer.cpp +++ b/src/qt/qt_d3d9renderer.cpp @@ -108,6 +108,7 @@ void D3D9Renderer::paintEvent(QPaintEvent *event) dstRect.left = destination.left(); dstRect.right = destination.right(); d3d9dev->BeginScene(); + d3d9dev->Clear(0, nullptr, D3DCLEAR_TARGET, 0xFF000000, 0, 0); while (surfaceInUse) {} surfaceInUse = true; d3d9dev->StretchRect(d3d9surface, &srcRect, backbuffer, &dstRect, video_filter_method == 0 ? D3DTEXF_POINT : D3DTEXF_LINEAR); From 740108c37c84f22ae2cca1c8145d85a12b2de2b0 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Thu, 11 Aug 2022 01:13:49 +0600 Subject: [PATCH 279/386] cdrom: Properly empty the path of image if it can't be loaded --- src/cdrom/cdrom_image.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/cdrom/cdrom_image.c b/src/cdrom/cdrom_image.c index 9a653b310..f8f7536e6 100644 --- a/src/cdrom/cdrom_image.c +++ b/src/cdrom/cdrom_image.c @@ -257,6 +257,7 @@ image_open_abort(cdrom_t *dev) cdrom_image_close(dev); dev->ops = NULL; dev->host_drive = 0; + dev->image_path[0] = 0; return 1; } From 97242168ded8a5f1fbd289512056961952784d15 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Thu, 11 Aug 2022 01:16:56 +0600 Subject: [PATCH 280/386] qt: Fix usage of unconverted path in plat_fopen64 UTF-8 paths are not supported on all Windows installations, only some of them. This was only accounted for in the 32-bit plat_fopen function, not on 64-bit plat_fopen64. Fix that oversight. --- src/qt/qt_platform.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_platform.cpp b/src/qt/qt_platform.cpp index 8aa85fb9c..8a41769a9 100644 --- a/src/qt/qt_platform.cpp +++ b/src/qt/qt_platform.cpp @@ -167,7 +167,7 @@ plat_fopen(const char *path, const char *mode) FILE * plat_fopen64(const char *path, const char *mode) { - return fopen(path, mode); + return fopen(QString::fromUtf8(path).toLocal8Bit(), mode); } int From ee38432bb7d8a4d30bdb3c0d8adc14409be3a5ba Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 10 Aug 2022 22:44:08 +0200 Subject: [PATCH 281/386] Added some parentheses. --- src/qt/qt_renderercommon.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_renderercommon.cpp b/src/qt/qt_renderercommon.cpp index bb4903ee8..0b8108b00 100644 --- a/src/qt/qt_renderercommon.cpp +++ b/src/qt/qt_renderercommon.cpp @@ -47,7 +47,7 @@ static void integer_scale(double *d, double *g) { } void RendererCommon::onResize(int width, int height) { - if (video_fullscreen == 0 && video_fullscreen_scale_maximized ? (parentWidget->isMaximized() == false && (main_window->isAncestorOf(parentWidget) && main_window->isMaximized() == false)) : 1) { + if ((video_fullscreen == 0) && (video_fullscreen_scale_maximized ? ((parentWidget->isMaximized() == false) && (main_window->isAncestorOf(parentWidget) && main_window->isMaximized() == false)) : 1)) { destination.setRect(0, 0, width, height); return; } From f2cf5dd841d97aae615cc277947e39523915d7ff Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Fri, 12 Aug 2022 00:35:40 +0600 Subject: [PATCH 282/386] qt: Restore Xinput2 for Qt5 builds --- src/qt/qt_rendererstack.cpp | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/src/qt/qt_rendererstack.cpp b/src/qt/qt_rendererstack.cpp index 3ff223ce4..d7ff5214b 100644 --- a/src/qt/qt_rendererstack.cpp +++ b/src/qt/qt_rendererstack.cpp @@ -75,8 +75,15 @@ RendererStack::RendererStack(QWidget *parent, int monitor_index) if (!mouse_type || (mouse_type[0] == '\0') || !stricmp(mouse_type, "auto")) { if (QApplication::platformName().contains("wayland")) strcpy(auto_mouse_type, "wayland"); +# if QT_VERSION < QT_VERSION_CHECK(6, 0, 0) + else if (QApplication::platformName() == "eglfs") + strcpy(auto_mouse_type, "evdev"); + else if (QApplication::platformName() == "xcb") + strcpy(auto_mouse_type, "xinput2"); +# else else if (QApplication::platformName() == "eglfs" || QApplication::platformName() == "xcb") strcpy(auto_mouse_type, "evdev"); +# endif else auto_mouse_type[0] = '\0'; mouse_type = auto_mouse_type; @@ -96,6 +103,14 @@ RendererStack::RendererStack(QWidget *parent, int monitor_index) this->mouse_poll_func = evdev_mouse_poll; } # endif + if (!stricmp(mouse_type, "xinput2")) { + extern void xinput2_init(); + extern void xinput2_poll(); + extern void xinput2_exit(); + xinput2_init(); + this->mouse_poll_func = xinput2_poll; + this->mouse_exit_func = xinput2_exit; + } #endif #ifdef __APPLE__ this->mouse_poll_func = macos_poll_mouse; From ad3bba009a8b52ccd53c9e71d428812d537c1fad Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Fri, 12 Aug 2022 13:24:29 +0600 Subject: [PATCH 283/386] qt: Raise minimum Xi2 version requirement to 2.1 This is needed for click-and-drag to work with both Qt5 and Qt6, especially the latter which was previously broken, without any hacks. --- src/qt/qt_rendererstack.cpp | 5 ----- src/qt/xinput2_mouse.cpp | 5 ++--- 2 files changed, 2 insertions(+), 8 deletions(-) diff --git a/src/qt/qt_rendererstack.cpp b/src/qt/qt_rendererstack.cpp index d7ff5214b..c5ae2b423 100644 --- a/src/qt/qt_rendererstack.cpp +++ b/src/qt/qt_rendererstack.cpp @@ -75,15 +75,10 @@ RendererStack::RendererStack(QWidget *parent, int monitor_index) if (!mouse_type || (mouse_type[0] == '\0') || !stricmp(mouse_type, "auto")) { if (QApplication::platformName().contains("wayland")) strcpy(auto_mouse_type, "wayland"); -# if QT_VERSION < QT_VERSION_CHECK(6, 0, 0) else if (QApplication::platformName() == "eglfs") strcpy(auto_mouse_type, "evdev"); else if (QApplication::platformName() == "xcb") strcpy(auto_mouse_type, "xinput2"); -# else - else if (QApplication::platformName() == "eglfs" || QApplication::platformName() == "xcb") - strcpy(auto_mouse_type, "evdev"); -# endif else auto_mouse_type[0] = '\0'; mouse_type = auto_mouse_type; diff --git a/src/qt/xinput2_mouse.cpp b/src/qt/xinput2_mouse.cpp index 07791b5ba..b1887bedc 100644 --- a/src/qt/xinput2_mouse.cpp +++ b/src/qt/xinput2_mouse.cpp @@ -81,8 +81,7 @@ void xinput2_proc() Window win; win = DefaultRootWindow(disp); - // XIAllMasterDevices doesn't work for click-and-drag operations. - ximask.deviceid = XIAllDevices; + ximask.deviceid = XIAllMasterDevices; ximask.mask_len = XIMaskLen(XI_LASTEVENT); ximask.mask = (unsigned char*)calloc(ximask.mask_len, sizeof(unsigned char)); @@ -166,7 +165,7 @@ void xinput2_init() qWarning() << "Cannot open current X11 display"; return; } - auto event = 0, err = 0, minor = 0, major = 2; + auto event = 0, err = 0, minor = 1, major = 2; if (XQueryExtension(disp, "XInputExtension", &xi2opcode, &event, &err)) { if (XIQueryVersion(disp, &major, &minor) == Success) From 3194130bcdb118cbc7d9f06adc4a6154e03be1af Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Fri, 12 Aug 2022 14:33:15 +0600 Subject: [PATCH 284/386] qt: large sizes when entered no longer decrement by 1MB --- src/qt/qt_harddiskdialog.cpp | 5 +++++ src/qt/qt_harddiskdialog.hpp | 2 ++ 2 files changed, 7 insertions(+) diff --git a/src/qt/qt_harddiskdialog.cpp b/src/qt/qt_harddiskdialog.cpp index 91179cdbc..3040db9c3 100644 --- a/src/qt/qt_harddiskdialog.cpp +++ b/src/qt/qt_harddiskdialog.cpp @@ -39,6 +39,7 @@ extern "C" { #include #include #include +#include #include "qt_harddrive_common.hpp" #include "qt_settings_bus_tracking.hpp" @@ -608,6 +609,7 @@ void HarddiskDialog::onExistingFileSelected(const QString &fileName) { } void HarddiskDialog::recalcSize() { + if (disallowSizeModifications) return; uint64_t size = (static_cast(cylinders_) * static_cast(heads_) * static_cast(sectors_)) << 9; ui->lineEditSize->setText(QString::number(size >> 20)); } @@ -731,6 +733,7 @@ void HarddiskDialog::on_comboBoxBus_currentIndexChanged(int index) { } void HarddiskDialog::on_lineEditSize_textEdited(const QString &text) { + disallowSizeModifications = true; uint32_t size = text.toUInt(); /* This is needed to ensure VHD standard compliance. */ hdd_image_calc_chs(&cylinders_, &heads_, §ors_, size); @@ -742,6 +745,8 @@ void HarddiskDialog::on_lineEditSize_textEdited(const QString &text) { checkAndAdjustCylinders(); checkAndAdjustHeads(); checkAndAdjustSectors(); + + disallowSizeModifications = false; } void HarddiskDialog::on_lineEditCylinders_textEdited(const QString &text) { diff --git a/src/qt/qt_harddiskdialog.hpp b/src/qt/qt_harddiskdialog.hpp index 408726f63..f876d35dd 100644 --- a/src/qt/qt_harddiskdialog.hpp +++ b/src/qt/qt_harddiskdialog.hpp @@ -49,6 +49,8 @@ private: uint32_t max_sectors = 0; uint32_t max_heads = 0; uint32_t max_cylinders = 0; + + bool disallowSizeModifications = false; bool checkAndAdjustCylinders(); bool checkAndAdjustHeads(); From 9d5c73101704ba55542acb3a220ee2b3611c054d Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 12 Aug 2022 18:50:17 +0200 Subject: [PATCH 285/386] Kasan VGA fix. --- src/video/vid_et4000.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/video/vid_et4000.c b/src/video/vid_et4000.c index c18a422a3..76e609ee0 100644 --- a/src/video/vid_et4000.c +++ b/src/video/vid_et4000.c @@ -728,7 +728,7 @@ et4000_init(const device_t *info) et4000_kasan_recalctimings, et4000_in, et4000_out, NULL, NULL); io_sethandler(0x03c0, 32, - et4000_in,NULL,NULL, et4000_out,NULL,NULL, dev); + et4000k_in,NULL,NULL, et4000k_out,NULL,NULL, dev); io_sethandler(0x0250, 8, et4000_kasan_in, NULL, NULL, et4000_kasan_out, NULL, NULL, dev); io_sethandler(0x0258, 2, From a85caea4a9f2294a3b85ea9f0f8675c80c9b4ee6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Miran=20Gr=C4=8Da?= Date: Fri, 12 Aug 2022 18:59:46 +0200 Subject: [PATCH 286/386] Update qt_harddiskdialog.cpp Removed the stray QTimer include. --- src/qt/qt_harddiskdialog.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/src/qt/qt_harddiskdialog.cpp b/src/qt/qt_harddiskdialog.cpp index 3040db9c3..c5ced345f 100644 --- a/src/qt/qt_harddiskdialog.cpp +++ b/src/qt/qt_harddiskdialog.cpp @@ -39,7 +39,6 @@ extern "C" { #include #include #include -#include #include "qt_harddrive_common.hpp" #include "qt_settings_bus_tracking.hpp" From 603cdcbb375023aa35c8d4b0145fb04578b540e7 Mon Sep 17 00:00:00 2001 From: Alexander Babikov <2708460+lemondrops@users.noreply.github.com> Date: Fri, 12 Aug 2022 00:39:33 +0500 Subject: [PATCH 287/386] Clear unfilled registers when returning CPUID results on K6-2/III/+ CPUs --- src/cpu/cpu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index 36d92605f..3ec257674 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -1742,9 +1742,11 @@ cpu_CPUID(void) break; case 0x80000000: EAX = 0x80000005; + EBX = ECX = EDX = 0; break; case 0x80000001: EAX = CPUID + 0x100; + EBX = ECX = 0; EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW; break; case 0x80000002: /* Processor name string */ @@ -1760,6 +1762,7 @@ cpu_CPUID(void) EDX = 0x00000000; break; case 0x80000005: /*Cache information*/ + EAX = 0; EBX = 0x02800140; /*TLBs*/ ECX = 0x20020220; /*L1 data cache*/ EDX = 0x20020220; /*L1 instruction cache*/ @@ -1785,9 +1788,11 @@ cpu_CPUID(void) break; case 0x80000000: EAX = 0x80000006; + EBX = ECX = EDX = 0; break; case 0x80000001: EAX = CPUID + 0x100; + EBX = ECX = 0; EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW; break; case 0x80000002: /* Processor name string */ @@ -1803,11 +1808,13 @@ cpu_CPUID(void) EDX = 0x00000000; break; case 0x80000005: /* Cache information */ + EAX = 0; EBX = 0x02800140; /* TLBs */ ECX = 0x20020220; /*L1 data cache*/ EDX = 0x20020220; /*L1 instruction cache*/ break; case 0x80000006: /* L2 Cache information */ + EAX = EBX = EDX = 0; ECX = 0x01004220; break; default: @@ -1832,9 +1839,11 @@ cpu_CPUID(void) break; case 0x80000000: EAX = 0x80000007; + EBX = ECX = EDX = 0; break; case 0x80000001: EAX = CPUID + 0x100; + EBX = ECX = 0; EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW; break; case 0x80000002: /* Processor name string */ @@ -1850,17 +1859,20 @@ cpu_CPUID(void) EDX = 0x00000000; break; case 0x80000005: /* Cache information */ + EAX = 0; EBX = 0x02800140; /* TLBs */ ECX = 0x20020220; /* L1 data cache */ EDX = 0x20020220; /* L1 instruction cache */ break; case 0x80000006: /* L2 Cache information */ + EAX = EBX = EDX = 0; if (cpu_s->cpu_type == CPU_K6_3P) ECX = 0x01004220; else ECX = 0x00804220; break; case 0x80000007: /* PowerNow information */ + EAX = EBX = ECX = 0; EDX = 7; break; default: From 94f76ef3c0aa1ec4f7ee4230d4ca6cda77fae7d9 Mon Sep 17 00:00:00 2001 From: Alexander Babikov <2708460+lemondrops@users.noreply.github.com> Date: Mon, 4 Jul 2022 16:45:17 +0500 Subject: [PATCH 288/386] Fix some warnings in Qt code --- src/qt/qt_openglrenderer.cpp | 2 +- src/qt/qt_openglrenderer.hpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/qt/qt_openglrenderer.cpp b/src/qt/qt_openglrenderer.cpp index 115e6af7f..b3e771fea 100644 --- a/src/qt/qt_openglrenderer.cpp +++ b/src/qt/qt_openglrenderer.cpp @@ -254,7 +254,7 @@ OpenGLRenderer::initializeExtensions() glBufferStorage = (PFNGLBUFFERSTORAGEEXTPROC_LOCAL) context->getProcAddress(context->hasExtension("GL_EXT_buffer_storage") ? "glBufferStorageEXT" : "glBufferStorage"); if (!glBufferStorage) - glBufferStorage = glBufferStorage = (PFNGLBUFFERSTORAGEEXTPROC_LOCAL) context->getProcAddress("glBufferStorage"); + glBufferStorage = (PFNGLBUFFERSTORAGEEXTPROC_LOCAL) context->getProcAddress("glBufferStorage"); } #endif } diff --git a/src/qt/qt_openglrenderer.hpp b/src/qt/qt_openglrenderer.hpp index da64ea79b..99393c30d 100644 --- a/src/qt/qt_openglrenderer.hpp +++ b/src/qt/qt_openglrenderer.hpp @@ -77,8 +77,8 @@ private: static constexpr int BUFFERBYTES = 16777216; /* Pixel is 4 bytes. */ static constexpr int BUFFERCOUNT = 3; /* How many buffers to use for pixel transfer (2-3 is commonly recommended). */ - OpenGLOptions *options; QTimer *renderTimer; + OpenGLOptions *options; QString glslVersion; From 789e2c950ffe0f05ecba826b87886a7371c2421e Mon Sep 17 00:00:00 2001 From: Alexander Babikov <2708460+lemondrops@users.noreply.github.com> Date: Sun, 17 Oct 2021 03:21:27 +0500 Subject: [PATCH 289/386] Remove the PS/2 mouse flag from the Gigabyte GA-586IP --- src/machine/machine_table.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index eaeed3e6b..4a41b6ef1 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -7389,7 +7389,7 @@ const machine_t machines[] = { .min_multi = 1.5, .max_multi = 1.5 }, - .bus_flags = MACHINE_PS2_PCI, + .bus_flags = MACHINE_PCI, .flags = MACHINE_IDE_DUAL, .ram = { .min = 2048, From bd31c57d60eebd4405bdc74a68a743c435aa04bb Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sat, 13 Aug 2022 23:16:44 +0200 Subject: [PATCH 290/386] Fix SB 2.0 OPL crash --- src/sound/snd_sb.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/sound/snd_sb.c b/src/sound/snd_sb.c index fb2332fbd..1431365ad 100644 --- a/src/sound/snd_sb.c +++ b/src/sound/snd_sb.c @@ -1654,16 +1654,16 @@ sb_2_init(const device_t *info) io_sethandler(addr, 0x0002, sb->opl.read, NULL, NULL, sb->opl.write, NULL, NULL, - sb->opl.write); + sb->opl.priv); } io_sethandler(addr + 8, 0x0002, sb->opl.read, NULL, NULL, sb->opl.write, NULL, NULL, - sb->opl.write); + sb->opl.priv); io_sethandler(0x0388, 0x0002, sb->opl.read, NULL, NULL, sb->opl.write, NULL, NULL, - sb->opl.write); + sb->opl.priv); } if (sb->cms_enabled) { From 012db280e2706e277a1f22503b83189a144c60cb Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sun, 14 Aug 2022 12:28:36 +0600 Subject: [PATCH 291/386] qt: Remember maximized state of monitor windows if enabled --- src/config.c | 15 +++++++++++++-- src/include/86box/video.h | 1 + src/qt/qt_main.cpp | 8 +++++++- src/qt/qt_mainwindow.cpp | 7 +++++++ src/qt/qt_rendererstack.cpp | 8 ++++++++ src/qt/qt_rendererstack.hpp | 1 + 6 files changed, 37 insertions(+), 3 deletions(-) diff --git a/src/config.c b/src/config.c index 768bbe3e4..79fd7433b 100644 --- a/src/config.c +++ b/src/config.c @@ -649,10 +649,14 @@ load_monitor(int monitor_index) if (p == NULL) p = temp; - if (window_remember) + if (window_remember) { sscanf(p, "%i, %i, %i, %i", &monitor_settings[monitor_index].mon_window_x, &monitor_settings[monitor_index].mon_window_y, &monitor_settings[monitor_index].mon_window_w, &monitor_settings[monitor_index].mon_window_h); + monitor_settings[monitor_index].mon_window_maximized = !!config_get_int(cat, "window_maximized", 0); + } else { + monitor_settings[monitor_index].mon_window_maximized = 0; + } } /* Load "Machine" section. */ @@ -2415,8 +2419,15 @@ save_monitor(int monitor_index) monitor_settings[monitor_index].mon_window_w, monitor_settings[monitor_index].mon_window_h); config_set_string(cat, "window_coordinates", temp); - } else + if (monitor_settings[monitor_index].mon_window_maximized != 0) { + config_set_int(cat, "window_maximized", monitor_settings[monitor_index].mon_window_maximized); + } else { + config_delete_var(cat, "window_maximized"); + } + } else { config_delete_var(cat, "window_coordinates"); + config_delete_var(cat, "window_maximized"); + } } /* Save "Machine" section. */ diff --git a/src/include/86box/video.h b/src/include/86box/video.h index 85c95c98d..34cc2cb81 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -124,6 +124,7 @@ typedef struct monitor_settings_t { int mon_window_y; int mon_window_w; int mon_window_h; + int mon_window_maximized; } monitor_settings_t; #define MONITORS_NUM 2 diff --git a/src/qt/qt_main.cpp b/src/qt/qt_main.cpp index 694a0e5f6..de2fef1bd 100644 --- a/src/qt/qt_main.cpp +++ b/src/qt/qt_main.cpp @@ -173,6 +173,7 @@ int main(int argc, char* argv[]) { return 0; } + bool startMaximized = window_remember && monitor_settings[0].mon_window_maximized; fprintf(stderr, "Qt: version %s, platform \"%s\"\n", qVersion(), QApplication::platformName().toUtf8().data()); ProgSettings::loadTranslators(&app); #ifdef Q_OS_WINDOWS @@ -200,7 +201,12 @@ int main(int argc, char* argv[]) { discord_load(); main_window = new MainWindow(); - main_window->show(); + if (startMaximized) { + main_window->showMaximized(); + } else { + main_window->show(); + } + app.installEventFilter(main_window); #ifdef Q_OS_WINDOWS diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index c19dc4f54..0ee5a3161 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -657,6 +657,9 @@ void MainWindow::initRendererMonitorSlot(int monitor_index) monitor_settings[monitor_index].mon_window_w > 2048 ? 2048 : monitor_settings[monitor_index].mon_window_w, monitor_settings[monitor_index].mon_window_h > 2048 ? 2048 : monitor_settings[monitor_index].mon_window_h); } + if (monitor_settings[monitor_index].mon_window_maximized) { + secondaryRenderer->showMaximized(); + } secondaryRenderer->switchRenderer((RendererStack::Renderer)vid_api); } @@ -2070,6 +2073,10 @@ void MainWindow::changeEvent(QEvent* event) } #endif QWidget::changeEvent(event); + if (isVisible()) { + monitor_settings[0].mon_window_maximized = isMaximized(); + config_save(); + } } void MainWindow::on_actionRenderer_options_triggered() diff --git a/src/qt/qt_rendererstack.cpp b/src/qt/qt_rendererstack.cpp index c5ae2b423..6beb37516 100644 --- a/src/qt/qt_rendererstack.cpp +++ b/src/qt/qt_rendererstack.cpp @@ -48,6 +48,7 @@ extern "C" { #include <86box/86box.h> +#include <86box/config.h> #include <86box/mouse.h> #include <86box/plat.h> #include <86box/video.h> @@ -481,3 +482,10 @@ void RendererStack::closeEvent(QCloseEvent* event) main_window->close(); } +void RendererStack::changeEvent(QEvent *event) +{ + if (m_monitor_index != 0 && isVisible()) { + monitor_settings[m_monitor_index].mon_window_maximized = isMaximized(); + config_save(); + } +} diff --git a/src/qt/qt_rendererstack.hpp b/src/qt/qt_rendererstack.hpp index b2eccc84a..4d06ed1cf 100644 --- a/src/qt/qt_rendererstack.hpp +++ b/src/qt/qt_rendererstack.hpp @@ -32,6 +32,7 @@ public: void wheelEvent(QWheelEvent *event) override; void leaveEvent(QEvent *event) override; void closeEvent(QCloseEvent *event) override; + void changeEvent(QEvent* event) override; void resizeEvent(QResizeEvent *event) override { onResize(event->size().width(), event->size().height()); From ee651ae48ffbaafd6e507604185143e3dbda69ec Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Miran=20Gr=C4=8Da?= Date: Sun, 14 Aug 2022 20:47:36 +0200 Subject: [PATCH 292/386] Update x86_ops_bcd.h Reverted the AAM instruction to again set the divisor to 10 when 0 is specified. --- src/cpu/x86_ops_bcd.h | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/src/cpu/x86_ops_bcd.h b/src/cpu/x86_ops_bcd.h index efb0de264..385d63cd7 100644 --- a/src/cpu/x86_ops_bcd.h +++ b/src/cpu/x86_ops_bcd.h @@ -31,14 +31,7 @@ static int opAAD(uint32_t fetchdat) static int opAAM(uint32_t fetchdat) { int base = getbytef(); - - if (base == 0) { - x86de(NULL, 0); - return 1; - } - - if (!cpu_isintel) base = 10; - + if (!base || !cpu_isintel) base = 10; AH = AL / base; AL %= base; setznp16(AX); From 7702d05a10a89c68b981f831a38048f7089698e2 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Thu, 18 Aug 2022 17:22:59 -0300 Subject: [PATCH 293/386] gdbstub: Add IDA optimized mode --- src/gdbstub.c | 40 ++++++++++++++++++++++++++++++---------- 1 file changed, 30 insertions(+), 10 deletions(-) diff --git a/src/gdbstub.c b/src/gdbstub.c index 5140d6c54..b63b13f72 100644 --- a/src/gdbstub.c +++ b/src/gdbstub.c @@ -114,7 +114,8 @@ typedef struct _gdbstub_client_ { struct sockaddr_in addr; char packet[16384], response[16384]; - int has_packet, waiting_stop, packet_pos, response_pos; + int has_packet: 1, first_packet_received: 1, ida_mode: 1, waiting_stop: 1, + packet_pos, response_pos; event_t *processed_event, *response_event; @@ -133,7 +134,6 @@ typedef struct _gdbstub_breakpoint_ { struct _gdbstub_breakpoint_ *next; } gdbstub_breakpoint_t; -#define ENABLE_GDBSTUB_LOG 1 #ifdef ENABLE_GDBSTUB_LOG int gdbstub_do_log = ENABLE_GDBSTUB_LOG; @@ -152,15 +152,15 @@ gdbstub_log(const char *fmt, ...) # define gdbstub_log(fmt, ...) #endif -static x86seg *segment_regs[] = { &cpu_state.seg_cs, &cpu_state.seg_ss, &cpu_state.seg_ds, &cpu_state.seg_es, &cpu_state.seg_fs, &cpu_state.seg_gs }; -static uint32_t *cr_regs[] = { &cpu_state.CR0.l, &cr2, &cr3, &cr4 }; -static void *fpu_regs[] = { &cpu_state.npxc, &cpu_state.npxs, NULL, &x87_pc_seg, &x87_pc_off, &x87_op_seg, &x87_op_off }; -static const char target_xml[] = /* QEMU gdb-xml/i386-32bit.xml with modifications (described in comments) */ +static x86seg *segment_regs[] = { &cpu_state.seg_cs, &cpu_state.seg_ss, &cpu_state.seg_ds, &cpu_state.seg_es, &cpu_state.seg_fs, &cpu_state.seg_gs }; +static uint32_t *cr_regs[] = { &cpu_state.CR0.l, &cr2, &cr3, &cr4 }; +static void *fpu_regs[] = { &cpu_state.npxc, &cpu_state.npxs, NULL, &x87_pc_seg, &x87_pc_off, &x87_op_seg, &x87_op_off }; +static char target_xml[] = /* QEMU gdb-xml/i386-32bit.xml with modifications (described in comments) */ // clang-format off "" "" "" - "i8086" /* start in 16-bit mode to work around known GDB bug preventing 32->16 switching */ + "" /* patched in here (length must be kept) */ "" "" "" @@ -753,6 +753,15 @@ gdbstub_client_packet(gdbstub_client_t *client) client->response_pos = 0; client->packet_pos = 1; + /* Handle IDA-specific hacks. */ + if (!client->first_packet_received) { + client->first_packet_received = 1; + if (!strcmp(client->packet, "qSupported:xmlRegisters=i386,arm,mips")) { + gdbstub_log("GDB Stub: Enabling IDA mode\n"); + client->ida_mode = 1; + } + } + /* Parse command. */ switch (client->packet[0]) { case '?': /* stop reason */ @@ -982,10 +991,21 @@ e14: if (!strcmp(client->response, "read")) { /* Read the transfer annex. */ client->packet_pos += gdbstub_client_read_string(client, client->response, sizeof(client->response) - 1, ':') + 1; - if (!strcmp(client->response, "target.xml")) - p = (char *) target_xml; - else + if (!strcmp(client->response, "target.xml")) { + /* Patch architecture for IDA. */ + p = strstr(target_xml, ""); + if (p) { + if (client->ida_mode) + memcpy(p, "i386 ", 35); /* make IDA not complain about i8086 being unknown */ + else + memcpy(p, "i8086 ", 35); /* start in 16-bit mode to work around known GDB bug preventing 32->16 switching */ + } + + /* Send target XML. */ + p = target_xml; + } else { p = NULL; + } /* Stop if the file wasn't found. */ if (!p) { From 48b372c60a5bd897b5920dec3d9efcc014be0cb8 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Thu, 18 Aug 2022 17:23:41 -0300 Subject: [PATCH 294/386] gdbstub: Always ignore dynarec choice when compiled in --- src/cpu/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index 36d92605f..9248fe4ad 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -1378,7 +1378,7 @@ cpu_set(void) } if (is386) { -#ifdef USE_DYNAREC +#if defined(USE_DYNAREC) && !defined(USE_GDBSTUB) if (cpu_use_dynarec) cpu_exec = exec386_dynarec; else From 19db1d2c7b195cfbaf14eeea5c90401b170b791b Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sun, 21 Aug 2022 16:55:47 +0200 Subject: [PATCH 295/386] Network overhaul : support for multiple NICs, performance improvement - Add support for multiple NICs - Switch from polling to an event loop for the host networking to avoid latency and locking issues --- src/86box.c | 7 +- src/config.c | 169 ++++++--- src/include/86box/net_dp8390.h | 2 + src/include/86box/net_event.h | 22 ++ src/include/86box/network.h | 94 +++-- src/network/CMakeLists.txt | 2 +- src/network/net_3c503.c | 6 +- src/network/net_dp8390.c | 12 +- src/network/net_event.c | 76 ++++ src/network/net_ne2000.c | 6 +- src/network/net_pcap.c | 539 ++++++++++++++++------------ src/network/net_pcnet.c | 12 +- src/network/net_plip.c | 15 +- src/network/net_slirp.c | 625 +++++++++++++++++---------------- src/network/net_wd8003.c | 6 +- src/network/network.c | 531 ++++++++++++---------------- src/qt/qt_machinestatus.cpp | 1 + src/qt/qt_settingsnetwork.cpp | 152 ++++---- src/qt/qt_settingsnetwork.hpp | 10 +- src/qt/qt_settingsnetwork.ui | 343 +++++++++++++++--- src/win/Makefile.mingw | 2 +- 21 files changed, 1557 insertions(+), 1075 deletions(-) create mode 100644 src/include/86box/net_event.h create mode 100644 src/network/net_event.c diff --git a/src/86box.c b/src/86box.c index 85845b050..3e1bd6e3c 100644 --- a/src/86box.c +++ b/src/86box.c @@ -60,7 +60,6 @@ #include <86box/device.h> #include <86box/pit.h> #include <86box/random.h> -#include <86box/timer.h> #include <86box/nvr.h> #include <86box/machine.h> #include <86box/bugger.h> @@ -85,6 +84,7 @@ #include <86box/mo.h> #include <86box/scsi_disk.h> #include <86box/cdrom_image.h> +#include <86box/thread.h> #include <86box/network.h> #include <86box/sound.h> #include <86box/midi.h> @@ -93,7 +93,6 @@ #include <86box/ui.h> #include <86box/path.h> #include <86box/plat.h> -#include <86box/thread.h> #include <86box/version.h> #include <86box/gdbstub.h> #include <86box/machine_status.h> @@ -951,8 +950,6 @@ pc_reset_hard_close(void) /* Close all the memory mappings. */ mem_close(); - network_timer_stop(); - /* Turn off timer processing to avoid potential segmentation faults. */ timer_close(); @@ -1173,8 +1170,6 @@ pc_close(thread_t *ptr) /* Close all the memory mappings. */ mem_close(); - network_timer_stop(); - /* Turn off timer processing to avoid potential segmentation faults. */ timer_close(); diff --git a/src/config.c b/src/config.c index 79fd7433b..b0c73e0d0 100644 --- a/src/config.c +++ b/src/config.c @@ -55,6 +55,7 @@ #include <86box/gameport.h> #include <86box/machine.h> #include <86box/mouse.h> +#include <86box/thread.h> #include <86box/network.h> #include <86box/scsi.h> #include <86box/scsi_device.h> @@ -1131,45 +1132,89 @@ load_network(void) { char *cat = "Network"; char *p; + char temp[512]; + int c = 0, min = 0; - p = config_get_string(cat, "net_type", NULL); - if (p != NULL) { - if (!strcmp(p, "pcap") || !strcmp(p, "1")) - network_type = NET_TYPE_PCAP; - else if (!strcmp(p, "slirp") || !strcmp(p, "2")) - network_type = NET_TYPE_SLIRP; - else - network_type = NET_TYPE_NONE; - } else - network_type = NET_TYPE_NONE; - - memset(network_host, '\0', sizeof(network_host)); - p = config_get_string(cat, "net_host_device", NULL); - if (p == NULL) { - p = config_get_string(cat, "net_host_device", NULL); - if (p != NULL) - config_delete_var(cat, "net_host_device"); - } - if (p != NULL) { - if ((network_dev_to_id(p) == -1) || (network_ndev == 1)) { - if ((network_ndev == 1) && strcmp(network_host, "none")) { - ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2094, (wchar_t *) IDS_2129); - } else if (network_dev_to_id(p) == -1) { - ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2095, (wchar_t *) IDS_2129); - } - - strcpy(network_host, "none"); - } else { - strncpy(network_host, p, sizeof(network_host) - 1); - } - } else - strcpy(network_host, "none"); - + /* Handle legacy configuration which supported only one NIC */ p = config_get_string(cat, "net_card", NULL); - if (p != NULL) - network_card = network_card_get_from_internal_name(p); - else - network_card = 0; + if (p != NULL) { + net_cards_conf[c].device_num = network_card_get_from_internal_name(p); + + p = config_get_string(cat, "net_type", NULL); + if (p != NULL) { + if (!strcmp(p, "pcap") || !strcmp(p, "1")) + net_cards_conf[c].net_type = NET_TYPE_PCAP; + else if (!strcmp(p, "slirp") || !strcmp(p, "2")) + net_cards_conf[c].net_type = NET_TYPE_SLIRP; + else + net_cards_conf[c].net_type = NET_TYPE_NONE; + } else { + net_cards_conf[c].net_type = NET_TYPE_NONE; + } + + p = config_get_string(cat, "net_host_device", NULL); + if (p != NULL) { + if ((network_dev_to_id(p) == -1) || (network_ndev == 1)) { + if (network_ndev == 1) { + ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2094, (wchar_t *) IDS_2129); + } else if (network_dev_to_id(p) == -1) { + ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2095, (wchar_t *) IDS_2129); + } + strcpy(net_cards_conf[c].host_dev_name, "none"); + } else { + strncpy(net_cards_conf[c].host_dev_name, p, sizeof(net_cards_conf[c].host_dev_name) - 1); + } + } else { + strcpy(net_cards_conf[c].host_dev_name, "none"); + } + + min++; + } + + config_delete_var(cat, "net_card"); + config_delete_var(cat, "net_type"); + config_delete_var(cat, "net_host_device"); + + for (c = min; c < NET_CARD_MAX; c++) { + sprintf(temp, "net_%02i_card", c + 1); + p = config_get_string(cat, temp, NULL); + if (p != NULL) { + net_cards_conf[c].device_num = network_card_get_from_internal_name(p); + } else { + net_cards_conf[c].device_num = 0; + } + + sprintf(temp, "net_%02i_net_type", c + 1); + p = config_get_string(cat, temp, NULL); + if (p != NULL) { + if (!strcmp(p, "pcap") || !strcmp(p, "1")) { + net_cards_conf[c].net_type = NET_TYPE_PCAP; + } else if (!strcmp(p, "slirp") || !strcmp(p, "2")) { + net_cards_conf[c].net_type = NET_TYPE_SLIRP; + } else { + net_cards_conf[c].net_type = NET_TYPE_NONE; + } + } else { + net_cards_conf[c].net_type = NET_TYPE_NONE; + } + + sprintf(temp, "net_%02i_host_device", c + 1); + p = config_get_string(cat, temp, NULL); + if (p != NULL) { + if ((network_dev_to_id(p) == -1) || (network_ndev == 1)) { + if (network_ndev == 1) { + ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2094, (wchar_t *) IDS_2129); + } else if (network_dev_to_id(p) == -1) { + ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2095, (wchar_t *) IDS_2129); + } + strcpy(net_cards_conf[c].host_dev_name, "none"); + } else { + strncpy(net_cards_conf[c].host_dev_name, p, sizeof(net_cards_conf[c].host_dev_name) - 1); + } + } else { + strcpy(net_cards_conf[c].host_dev_name, "none"); + } + } } /* Load "Ports" section. */ @@ -2688,30 +2733,42 @@ save_sound(void) static void save_network(void) { + int c = 0; + char temp[512]; char *cat = "Network"; - if (network_type == NET_TYPE_NONE) - config_delete_var(cat, "net_type"); - else - config_set_string(cat, "net_type", - (network_type == NET_TYPE_SLIRP) ? "slirp" : "pcap"); + config_delete_var(cat, "net_type"); + config_delete_var(cat, "net_host_device"); + config_delete_var(cat, "net_card"); - if (network_host[0] != '\0') { - if (!strcmp(network_host, "none")) - config_delete_var(cat, "net_host_device"); - else - config_set_string(cat, "net_host_device", network_host); - } else { - /* config_set_string(cat, "net_host_device", "none"); */ - config_delete_var(cat, "net_host_device"); + for (c = 0; c < NET_CARD_MAX; c++) { + sprintf(temp, "net_%02i_card", c + 1); + if (net_cards_conf[c].device_num == 0) { + config_delete_var(cat, temp); + } else { + config_set_string(cat, temp, network_card_get_internal_name(net_cards_conf[c].device_num)); + } + + sprintf(temp, "net_%02i_net_type", c + 1); + if (net_cards_conf[c].net_type == NET_TYPE_NONE) { + config_delete_var(cat, temp); + } else { + config_set_string(cat, temp, + (net_cards_conf[c].net_type == NET_TYPE_SLIRP) ? "slirp" : "pcap"); + } + + sprintf(temp, "net_%02i_host_device", c + 1); + if (net_cards_conf[c].host_dev_name[0] != '\0') { + if (!strcmp(net_cards_conf[c].host_dev_name, "none")) + config_delete_var(cat, temp); + else + config_set_string(cat, temp, net_cards_conf[c].host_dev_name); + } else { + /* config_set_string(cat, temp, "none"); */ + config_delete_var(cat, temp); + } } - if (network_card == 0) - config_delete_var(cat, "net_card"); - else - config_set_string(cat, "net_card", - network_card_get_internal_name(network_card)); - delete_section_if_empty(cat); } diff --git a/src/include/86box/net_dp8390.h b/src/include/86box/net_dp8390.h index 027bce576..264febc93 100644 --- a/src/include/86box/net_dp8390.h +++ b/src/include/86box/net_dp8390.h @@ -184,11 +184,13 @@ typedef struct { int tx_timer_active; void *priv; + netcard_t *card; void (*interrupt)(void *priv, int set); } dp8390_t; extern const device_t dp8390_device; +extern int dp3890_inst; extern uint32_t dp8390_chipmem_read(dp8390_t *dev, uint32_t addr, unsigned int len); diff --git a/src/include/86box/net_event.h b/src/include/86box/net_event.h new file mode 100644 index 000000000..61eaad166 --- /dev/null +++ b/src/include/86box/net_event.h @@ -0,0 +1,22 @@ +#ifndef EMU_NET_EVENT_H +#define EMU_NET_EVENT_H + +typedef struct { +#ifdef _WIN32 + HANDLE handle; +#else + int fds[2]; +#endif +} net_evt_t; + +extern void net_event_init(net_evt_t *event); +extern void net_event_set(net_evt_t *event); +extern void net_event_clear(net_evt_t *event); +extern void net_event_close(net_evt_t *event); +#ifdef _WIN32 +extern HANDLE net_event_get_handle(net_evt_t *event); +#else +extern int net_event_get_fd(net_evt_t *event); +#endif + +#endif \ No newline at end of file diff --git a/src/include/86box/network.h b/src/include/86box/network.h index 8e23e671f..f38db801a 100644 --- a/src/include/86box/network.h +++ b/src/include/86box/network.h @@ -52,8 +52,12 @@ /* Network provider types. */ #define NET_TYPE_NONE 0 /* networking disabled */ -#define NET_TYPE_PCAP 1 /* use the (Win)Pcap API */ -#define NET_TYPE_SLIRP 2 /* use the SLiRP port forwarder */ +#define NET_TYPE_SLIRP 1 /* use the SLiRP port forwarder */ +#define NET_TYPE_PCAP 2 /* use the (Win)Pcap API */ + +#define NET_MAX_FRAME 1518 +#define NET_QUEUE_LEN 8 +#define NET_CARD_MAX 4 /* Supported network cards. */ enum { @@ -64,6 +68,20 @@ enum { RTL8029AS }; +enum { + NET_QUEUE_RX, + NET_QUEUE_TX_VM, + NET_QUEUE_TX_HOST +}; + +typedef struct { + int device_num; + int net_type; + char host_dev_name[128]; +} netcard_conf_t; + +extern netcard_conf_t net_cards_conf[NET_CARD_MAX]; +extern int net_card_current; typedef int (*NETRXCB)(void *, uint8_t *, int); typedef int (*NETWAITCB)(void *); @@ -71,21 +89,44 @@ typedef int (*NETSETLINKSTATE)(void *); typedef struct netpkt { - void *priv; - uint8_t data[65536]; /* Maximum length + 1 to round up to the nearest power of 2. */ + uint8_t *data; int len; - - struct netpkt *prev, *next; + uint64_t tsc; } netpkt_t; typedef struct { - const device_t *device; - void *priv; - int (*poll)(void *); - NETRXCB rx; - NETWAITCB wait; - NETSETLINKSTATE set_link_state; -} netcard_t; + netpkt_t packets[NET_QUEUE_LEN]; + int size; + int head; + int tail; +} netqueue_t; + +typedef struct _netcard_t netcard_t; + +typedef struct netdrv_t { + void (*notify_in)(void *priv); + void *(*init)(const netcard_t *card, const uint8_t *mac_addr, void *priv); + void (*close)(void *priv); + void *priv; +} netdrv_t; + +extern const netdrv_t net_pcap_drv; +extern const netdrv_t net_slirp_drv; + +struct _netcard_t { + const device_t *device; + void *card_drv; + struct netdrv_t host_drv; + int (*poll)(void *); + NETRXCB rx; + NETWAITCB wait; + NETSETLINKSTATE set_link_state; + netqueue_t queues[3]; + netpkt_t queued_pkt; + mutex_t *tx_mutex; + mutex_t *rx_mutex; + pc_timer_t timer; +}; typedef struct { char device[128]; @@ -100,31 +141,19 @@ extern "C" { /* Global variables. */ extern int nic_do_log; /* config */ extern int network_ndev; -extern int network_rx_pause; extern netdev_t network_devs[32]; /* Function prototypes. */ -extern void network_wait(uint8_t wait); - extern void network_init(void); -extern void network_attach(void *, uint8_t *, NETRXCB, NETWAITCB, NETSETLINKSTATE); +extern netcard_t *network_attach(void *card_drv, uint8_t *mac, NETRXCB rx, NETWAITCB wait, NETSETLINKSTATE set_link_state); +extern void netcard_close(netcard_t *card); extern void network_close(void); extern void network_reset(void); extern int network_available(void); -extern void network_tx(uint8_t *, int); -extern int network_tx_queue_check(void); +extern void network_tx(netcard_t *card, uint8_t *, int); extern int net_pcap_prepare(netdev_t *); -extern int net_pcap_init(void); -extern int net_pcap_reset(const netcard_t *, uint8_t *); -extern void net_pcap_close(void); -extern void net_pcap_in(uint8_t *, int); - -extern int net_slirp_init(void); -extern int net_slirp_reset(const netcard_t *, uint8_t *); -extern void net_slirp_close(void); -extern void net_slirp_in(uint8_t *, int); extern int network_dev_to_id(char *); extern int network_card_available(int); @@ -133,13 +162,8 @@ extern char *network_card_get_internal_name(int); extern int network_card_get_from_internal_name(char *); extern const device_t *network_card_getdevice(int); -extern void network_set_wait(int wait); -extern int network_get_wait(void); - -extern void network_timer_stop(void); - -extern void network_queue_put(int tx, void *priv, uint8_t *data, int len); - +extern int network_tx_pop(netcard_t *card, netpkt_t *out_pkt); +extern int network_rx_put(netcard_t *card, uint8_t *bufp, int len); #ifdef __cplusplus } #endif diff --git a/src/network/CMakeLists.txt b/src/network/CMakeLists.txt index e5a03a8ce..ffd5d03a7 100644 --- a/src/network/CMakeLists.txt +++ b/src/network/CMakeLists.txt @@ -14,7 +14,7 @@ # add_library(net OBJECT network.c net_pcap.c net_slirp.c net_dp8390.c net_3c503.c - net_ne2000.c net_pcnet.c net_wd8003.c net_plip.c) + net_ne2000.c net_pcnet.c net_wd8003.c net_plip.c net_event.c) option(SLIRP_EXTERNAL "Link against the system-provided libslirp library" OFF) mark_as_advanced(SLIRP_EXTERNAL) diff --git a/src/network/net_3c503.c b/src/network/net_3c503.c index bb2ed1628..d54a00593 100644 --- a/src/network/net_3c503.c +++ b/src/network/net_3c503.c @@ -55,6 +55,8 @@ #include <86box/mem.h> #include <86box/random.h> #include <86box/device.h> +#include <86box/thread.h> +#include <86box/timer.h> #include <86box/network.h> #include <86box/net_dp8390.h> #include <86box/net_3c503.h> @@ -592,7 +594,7 @@ threec503_nic_init(const device_t *info) dev->maclocal[5] = (mac & 0xff); } - dev->dp8390 = device_add(&dp8390_device); + dev->dp8390 = device_add_inst(&dp8390_device, dp3890_inst++); dev->dp8390->priv = dev; dev->dp8390->interrupt = threec503_interrupt; dp8390_set_defaults(dev->dp8390, DP8390_FLAG_CHECK_CR | DP8390_FLAG_CLEAR_IRQ); @@ -617,7 +619,7 @@ threec503_nic_init(const device_t *info) dev->regs.gacfr = 0x09; /* Start with RAM mapping enabled. */ /* Attach ourselves to the network module. */ - network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL, NULL); + dev->dp8390->card = network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL, NULL); return(dev); } diff --git a/src/network/net_dp8390.c b/src/network/net_dp8390.c index a5f26b69f..c9908f883 100644 --- a/src/network/net_dp8390.c +++ b/src/network/net_dp8390.c @@ -25,6 +25,8 @@ #define HAVE_STDARG_H #include <86box/86box.h> #include <86box/device.h> +#include <86box/thread.h> +#include <86box/timer.h> #include <86box/network.h> #include <86box/net_dp8390.h> @@ -33,6 +35,7 @@ static void dp8390_tx(dp8390_t *dev, uint32_t val); static int dp8390_rx_common(void *priv, uint8_t *buf, int io_len); int dp8390_rx(void *priv, uint8_t *buf, int io_len); +int dp3890_inst = 0; #ifdef ENABLE_DP8390_LOG int dp8390_do_log = ENABLE_DP8390_LOG; @@ -225,7 +228,7 @@ dp8390_write_cr(dp8390_t *dev, uint32_t val) /* Send the packet to the system driver */ dev->CR.tx_packet = 1; - network_tx(&dev->mem[(dev->tx_page_start * 256) - dev->mem_start], dev->tx_bytes); + network_tx(dev->card, &dev->mem[(dev->tx_page_start * 256) - dev->mem_start], dev->tx_bytes); /* some more debug */ #ifdef ENABLE_DP8390_LOG @@ -1099,13 +1102,14 @@ dp8390_close(void *priv) { dp8390_t *dp8390 = (dp8390_t *) priv; - /* Make sure the platform layer is shut down. */ - network_close(); - if (dp8390) { if (dp8390->mem) free(dp8390->mem); + if (dp8390->card) { + netcard_close(dp8390->card); + } + free(dp8390); } } diff --git a/src/network/net_event.c b/src/network/net_event.c new file mode 100644 index 000000000..e7b09d723 --- /dev/null +++ b/src/network/net_event.c @@ -0,0 +1,76 @@ +#ifdef _WIN32 +#define WIN32_LEAN_AND_MEAN +#include +#else +#include +#include +#endif + +#include <86box/net_event.h> + + +#ifndef _WIN32 +static void setup_fd(int fd) +{ + fcntl(fd, F_SETFD, FD_CLOEXEC); + fcntl(fd, F_SETFL, O_NONBLOCK); +} +#endif + +void +net_event_init(net_evt_t *event) +{ +#ifdef _WIN32 + event->handle = CreateEvent(NULL, FALSE, FALSE, NULL); +#else + (void)pipe(event->fds); + setup_fd(event->fds[0]); + setup_fd(event->fds[1]); +#endif +} + +void +net_event_set(net_evt_t *event) +{ +#ifdef _WIN32 + SetEvent(event->handle); +#else + (void)write(event->fds[1], "a", 1); +#endif +} + +void +net_event_clear(net_evt_t *event) +{ +#ifdef _WIN32 + /* Do nothing on WIN32 since we use an auto-reset event */ +#else + char dummy[1]; + (void)read(event->fds[0], &dummy, sizeof(dummy)); +#endif +} + +void +net_event_close(net_evt_t *event) +{ +#ifdef _WIN32 + CloseHandle(event->handle); +#else + close(event->fds[0]); + close(event->fds[1]); +#endif +} + +#ifdef _WIN32 +HANDLE +net_event_get_handle(net_evt_t *event) +{ + return event->handle; +} +#else +int +net_event_get_fd(net_evt_t *event) +{ + return event->fds[0]; +} +#endif \ No newline at end of file diff --git a/src/network/net_ne2000.c b/src/network/net_ne2000.c index 5c0a7ba61..960f7cdbf 100644 --- a/src/network/net_ne2000.c +++ b/src/network/net_ne2000.c @@ -61,6 +61,8 @@ #include <86box/pic.h> #include <86box/random.h> #include <86box/device.h> +#include <86box/thread.h> +#include <86box/timer.h> #include <86box/network.h> #include <86box/net_dp8390.h> #include <86box/net_ne2000.h> @@ -973,7 +975,7 @@ nic_init(const device_t *info) dev->maclocal[5] = (mac & 0xff); } - dev->dp8390 = device_add(&dp8390_device); + dev->dp8390 = device_add_inst(&dp8390_device, dp3890_inst++); dev->dp8390->priv = dev; dev->dp8390->interrupt = nic_interrupt; @@ -1120,7 +1122,7 @@ nic_init(const device_t *info) nic_reset(dev); /* Attach ourselves to the network module. */ - network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL, NULL); + dev->dp8390->card = network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL, NULL); nelog(1, "%s: %s attached IO=0x%X IRQ=%d\n", dev->name, dev->is_pci?"PCI":"ISA", dev->base_address, dev->base_irq); diff --git a/src/network/net_pcap.c b/src/network/net_pcap.c index c76b62581..d695d4992 100644 --- a/src/network/net_pcap.c +++ b/src/network/net_pcap.c @@ -50,15 +50,38 @@ #include #include #include +#include +#ifdef _WIN32 +#define WIN32_LEAN_AND_MEAN +#include +#include +#else +#include +#include +#include +#include +#endif + #define HAVE_STDARG_H #include <86box/86box.h> #include <86box/device.h> #include <86box/plat.h> #include <86box/plat_dynld.h> #include <86box/thread.h> +#include <86box/timer.h> #include <86box/network.h> +#include <86box/net_event.h> +enum { + NET_EVENT_STOP = 0, + NET_EVENT_TX, + NET_EVENT_RX, + NET_EVENT_MAX +}; +#ifdef __APPLE__ +#include +#else typedef int bpf_int32; typedef unsigned int bpf_u_int32; @@ -66,33 +89,28 @@ typedef unsigned int bpf_u_int32; * The instruction data structure. */ struct bpf_insn { - unsigned short code; - unsigned char jt; - unsigned char jf; - bpf_u_int32 k; + unsigned short code; + unsigned char jt; + unsigned char jf; + bpf_u_int32 k; }; /* * Structure for "pcap_compile()", "pcap_setfilter()", etc.. */ struct bpf_program { - unsigned int bf_len; - struct bpf_insn *bf_insns; + unsigned int bf_len; + struct bpf_insn *bf_insns; }; -typedef struct pcap_if pcap_if_t; +typedef struct pcap_if pcap_if_t; -typedef struct net_timeval { - long tv_sec; - long tv_usec; -} net_timeval; - -#define PCAP_ERRBUF_SIZE 256 +#define PCAP_ERRBUF_SIZE 256 struct pcap_pkthdr { - struct net_timeval ts; - bpf_u_int32 caplen; - bpf_u_int32 len; + struct timeval ts; + bpf_u_int32 caplen; + bpf_u_int32 len; }; struct pcap_if { @@ -100,49 +118,79 @@ struct pcap_if { char *name; char *description; void *addresses; - unsigned int flags; + bpf_u_int32 flags; }; +#endif +typedef struct { + void *pcap; /* handle to pcap lib instance */ + netcard_t *card; /* netcard linked to us */ + thread_t *poll_tid; + net_evt_t tx_event; + net_evt_t stop_event; + netpkt_t pkt; + uint8_t mac_addr[6]; +} net_pcap_t; -static volatile void *pcap_handle; /* handle to WinPcap DLL */ -static volatile void *pcap; /* handle to WinPcap library */ -static volatile thread_t *poll_tid; -static const netcard_t *poll_card; /* netcard linked to us */ -static event_t *poll_state; +typedef struct { + char *intf_name; + uint8_t *mac_addr; +} net_pcap_params_t; +static volatile void *libpcap_handle; /* handle to WinPcap DLL */ /* Pointers to the real functions. */ static const char *(*f_pcap_lib_version)(void); -static int (*f_pcap_findalldevs)(pcap_if_t **,char *); -static void (*f_pcap_freealldevs)(void *); -static void *(*f_pcap_open_live)(const char *,int,int,int,char *); -static int (*f_pcap_compile)(void *,void *, - const char *,int,bpf_u_int32); -static int (*f_pcap_setfilter)(void *,void *); +static int (*f_pcap_findalldevs)(pcap_if_t **,char *); +static void (*f_pcap_freealldevs)(void *); +static void *(*f_pcap_open_live)(const char *,int,int,int,char *); +static int (*f_pcap_compile)(void *,void *, const char *,int,bpf_u_int32); +static int (*f_pcap_setfilter)(void *,void *); static const unsigned char - *(*f_pcap_next)(void *,void *); -static int (*f_pcap_sendpacket)(void *,const unsigned char *,int); -static void (*f_pcap_close)(void *); -static int (*f_pcap_setnonblock)(void*, int, char*); -static dllimp_t pcap_imports[] = { - { "pcap_lib_version", &f_pcap_lib_version }, - { "pcap_findalldevs", &f_pcap_findalldevs }, - { "pcap_freealldevs", &f_pcap_freealldevs }, - { "pcap_open_live", &f_pcap_open_live }, - { "pcap_compile", &f_pcap_compile }, - { "pcap_setfilter", &f_pcap_setfilter }, - { "pcap_next", &f_pcap_next }, - { "pcap_sendpacket", &f_pcap_sendpacket }, - { "pcap_close", &f_pcap_close }, - { "pcap_setnonblock", &f_pcap_setnonblock }, - { NULL, NULL }, -}; + *(*f_pcap_next)(void *,void *); +static int (*f_pcap_sendpacket)(void *,const unsigned char *,int); +static void (*f_pcap_close)(void *); +static int (*f_pcap_setnonblock)(void*, int, char*); +static int (*f_pcap_set_immediate_mode)(void *, int); +static int (*f_pcap_set_promisc)(void *, int); +static int (*f_pcap_set_snaplen)(void *, int); +static void *(*f_pcap_create)(const char *, char*); +static int (*f_pcap_activate)(void *); +static void *(*f_pcap_geterr)(void *); +#ifdef _WIN32 +static HANDLE (*f_pcap_getevent)(void *); +#else +static int (*f_pcap_get_selectable_fd)(void *); +#endif +static dllimp_t pcap_imports[] = { + { "pcap_lib_version", &f_pcap_lib_version }, + { "pcap_findalldevs", &f_pcap_findalldevs }, + { "pcap_freealldevs", &f_pcap_freealldevs }, + { "pcap_open_live", &f_pcap_open_live }, + { "pcap_compile", &f_pcap_compile }, + { "pcap_setfilter", &f_pcap_setfilter }, + { "pcap_next", &f_pcap_next }, + { "pcap_sendpacket", &f_pcap_sendpacket }, + { "pcap_close", &f_pcap_close }, + { "pcap_setnonblock", &f_pcap_setnonblock }, + { "pcap_set_immediate_mode", &f_pcap_set_immediate_mode}, + { "pcap_set_promisc", &f_pcap_set_promisc }, + { "pcap_set_snaplen", &f_pcap_set_snaplen }, + { "pcap_create", &f_pcap_create }, + { "pcap_activate", &f_pcap_activate }, + { "pcap_geterr", &f_pcap_geterr }, +#ifdef _WIN32 + { "pcap_getevent", &f_pcap_getevent }, +#else + { "pcap_get_selectable_fd", &f_pcap_get_selectable_fd }, +#endif + { NULL, NULL }, +}; #ifdef ENABLE_PCAP_LOG int pcap_do_log = ENABLE_PCAP_LOG; - static void pcap_log(const char *fmt, ...) { @@ -159,76 +207,118 @@ pcap_log(const char *fmt, ...) #endif -/* Handle the receiving of frames from the channel. */ static void -poll_thread(void *arg) +net_pcap_read_packet(net_pcap_t *pcap) { - uint8_t *mac = (uint8_t *)arg; - uint8_t *data = NULL; struct pcap_pkthdr h; - uint32_t mac_cmp32[2]; - uint16_t mac_cmp16[2]; - event_t *evt; - int tx; - pcap_log("PCAP: polling started.\n"); - thread_set_event(poll_state); + uint8_t *data = (uint8_t *) f_pcap_next((void *) pcap->pcap, &h); + if (!data) + return; - /* Create a waitable event. */ - pcap_log("PCAP: Creating event...\n"); - evt = thread_create_event(); - - /* As long as the channel is open.. */ - while (pcap != NULL) { - /* Request ownership of the device. */ - network_wait(1); - - if (pcap == NULL) { - network_wait(0); - break; - } - - if (network_get_wait() || (poll_card->set_link_state && poll_card->set_link_state(poll_card->priv)) || (poll_card->wait && poll_card->wait(poll_card->priv))) - data = NULL; - else - data = (uint8_t *)f_pcap_next((void *)pcap, &h); - if (data != NULL) { - /* Received MAC. */ - mac_cmp32[0] = *(uint32_t *)(data+6); - mac_cmp16[0] = *(uint16_t *)(data+10); - - /* Local MAC. */ - mac_cmp32[1] = *(uint32_t *)mac; - mac_cmp16[1] = *(uint16_t *)(mac+4); - if ((mac_cmp32[0] != mac_cmp32[1]) || - (mac_cmp16[0] != mac_cmp16[1])) - network_queue_put(0, poll_card->priv, data, h.caplen); - else { - /* Mark as invalid packet. */ - data = NULL; - } - } - - /* Wait for the next packet to arrive - network_do_tx() is called from there. */ - tx = network_tx_queue_check(); - - /* Release ownership of the device. */ - network_wait(0); - - /* If we did not get anything, wait a while. */ - if (!tx) - thread_wait_event(evt, 10); - } - - /* No longer needed. */ - if (evt != NULL) - thread_destroy_event(evt); - - pcap_log("PCAP: polling stopped.\n"); - if (poll_state != NULL) - thread_set_event(poll_state); + network_rx_put(pcap->card, data, h.caplen); } +/* Send a packet to the Pcap interface. */ +void +net_pcap_in(void *pcap, uint8_t *bufp, int len) +{ + if (pcap == NULL) + return; + + f_pcap_sendpacket((void *)pcap, bufp, len); +} + +void +net_pcap_in_available(void *priv) +{ + net_pcap_t *pcap = (net_pcap_t *)priv; + net_event_set(&pcap->tx_event); +} + +#ifdef _WIN32 +static void +net_pcap_thread(void *priv) +{ + net_pcap_t *pcap = (net_pcap_t*)priv; + + pcap_log("PCAP: polling started.\n"); + + HANDLE events[NET_EVENT_MAX]; + events[NET_EVENT_STOP] = net_event_get_handle(&pcap->stop_event); + events[NET_EVENT_TX] = net_event_get_handle(&pcap->tx_event); + events[NET_EVENT_RX] = f_pcap_getevent((void *)pcap->pcap); + + bool run = true; + + while (run) { + int ret = WaitForMultipleObjects(NET_EVENT_MAX, events, FALSE, INFINITE); + + switch (ret - WAIT_OBJECT_0) { + case NET_EVENT_STOP: + net_event_clear(&pcap->stop_event); + run = false; + break; + + case NET_EVENT_TX: + net_event_clear(&pcap->tx_event); + while (network_tx_pop(pcap->card, &pcap->pkt)) { + net_pcap_in(pcap->pcap, pcap->pkt.data, pcap->pkt.len); + } + break; + + case NET_EVENT_RX: + net_pcap_read_packet(pcap); + break; + } + } + + pcap_log("PCAP: polling stopped.\n"); +} +#else +static void +net_pcap_thread(void *priv) +{ + net_pcap_t *pcap = (net_pcap_t*)priv; + + pcap_log("PCAP: polling started.\n"); + + struct pollfd pfd[NET_EVENT_MAX]; + pfd[NET_EVENT_STOP].fd = net_event_get_fd(&pcap->stop_event); + pfd[NET_EVENT_STOP].events = POLLIN | POLLPRI; + + pfd[NET_EVENT_TX].fd = net_event_get_fd(&pcap->tx_event); + pfd[NET_EVENT_TX].events = POLLIN | POLLPRI; + + pfd[NET_EVENT_RX].fd = f_pcap_get_selectable_fd((void *) pcap->pcap); + pfd[NET_EVENT_RX].events = POLLIN | POLLPRI; + + /* As long as the channel is open.. */ + while (1) { + poll(pfd, NET_EVENT_MAX, -1); + + if (pfd[NET_EVENT_STOP].revents & POLLIN) { + net_event_clear(&pcap->stop_event); + break; + } + + if (pfd[NET_EVENT_TX].revents & POLLIN) { + net_event_clear(&pcap->tx_event); + + if (network_tx_pop(pcap->card, &pcap->pkt)) { + net_pcap_in(pcap->pcap, pcap->pkt.data, pcap->pkt.len); + } + } + + if (pfd[NET_EVENT_RX].revents & POLLIN) { + net_pcap_read_packet(pcap); + } + + } + + pcap_log("PCAP: polling stopped.\n"); +} +#endif /* * Prepare the (Win)Pcap module for use. @@ -244,18 +334,18 @@ net_pcap_prepare(netdev_t *list) pcap_if_t *devlist, *dev; int i = 0; - /* Local variables. */ - pcap = NULL; - /* Try loading the DLL. */ #ifdef _WIN32 - pcap_handle = dynld_module("wpcap.dll", pcap_imports); + libpcap_handle = dynld_module("wpcap.dll", pcap_imports); #elif defined __APPLE__ - pcap_handle = dynld_module("libpcap.dylib", pcap_imports); + libpcap_handle = dynld_module("libpcap.dylib", pcap_imports); #else - pcap_handle = dynld_module("libpcap.so", pcap_imports); + libpcap_handle = dynld_module("libpcap.so", pcap_imports); #endif - if (pcap_handle == NULL) return(-1); + if (libpcap_handle == NULL) { + pcap_log("PCAP: error loading pcap module\n"); + return(-1); + } /* Retrieve the device list from the local machine */ if (f_pcap_findalldevs(&devlist, errbuf) == -1) { @@ -292,141 +382,132 @@ net_pcap_prepare(netdev_t *list) /* * Initialize (Win)Pcap for use. * - * This is called on every 'cycle' of the emulator, - * if and as long the NetworkType is set to PCAP, - * and also as long as we have a NetCard defined. - */ -int -net_pcap_init(void) -{ - char errbuf[PCAP_ERRBUF_SIZE]; - char *str; - - /* Did we already load the library? */ - if (pcap_handle == NULL) - return(-1); - - /* Get the PCAP library name and version. */ - strcpy(errbuf, f_pcap_lib_version()); - str = strchr(errbuf, '('); - if (str != NULL) *(str-1) = '\0'; - pcap_log("PCAP: initializing, %s\n", errbuf); - - /* Get the value of our capture interface. */ - if ((network_host[0] == '\0') || !strcmp(network_host, "none")) { - pcap_log("PCAP: no interface configured!\n"); - return(-1); - } - - poll_tid = NULL; - poll_state = NULL; - poll_card = NULL; - - return(0); -} - - -/* Close up shop. */ -void -net_pcap_close(void) -{ - void *pc; - - if (pcap == NULL) return; - - pcap_log("PCAP: closing.\n"); - - /* Tell the polling thread to shut down. */ - pc = (void *)pcap; pcap = NULL; - - /* Tell the thread to terminate. */ - if (poll_tid != NULL) { - /* Wait for the thread to finish. */ - pcap_log("PCAP: waiting for thread to end...\n"); - thread_wait_event(poll_state, -1); - pcap_log("PCAP: thread ended\n"); - thread_destroy_event(poll_state); - - poll_tid = NULL; - poll_state = NULL; - poll_card = NULL; - } - - /* OK, now shut down Pcap itself. */ - f_pcap_close(pc); - pcap = NULL; -} - - -/* - * Reset (Win)Pcap and activate it. - * - * This is called on every 'cycle' of the emulator, - * if and as long the NetworkType is set to PCAP, - * and also as long as we have a NetCard defined. - * * We already know we have PCAP available, as this * is called when the network activates itself and * tries to attach to the network module. */ -int -net_pcap_reset(const netcard_t *card, uint8_t *mac) +void * +net_pcap_init(const netcard_t *card, const uint8_t *mac_addr, void *priv) { - char errbuf[PCAP_ERRBUF_SIZE]; + char errbuf[PCAP_ERRBUF_SIZE]; + char *str; char filter_exp[255]; struct bpf_program fp; - /* Open a PCAP live channel. */ - if ((pcap = f_pcap_open_live(network_host, /* interface name */ - 1518, /* max packet size */ - 1, /* promiscuous mode? */ - 10, /* timeout in msec */ - errbuf)) == NULL) { /* error buffer */ - pcap_log(" Unable to open device: %s!\n", network_host); - return(-1); + char *intf_name = (char*)priv; + + /* Did we already load the library? */ + if (libpcap_handle == NULL) { + pcap_log("PCAP: net_pcap_init without handle.\n"); + return NULL; } - if (f_pcap_setnonblock((void*)pcap, 1, errbuf) != 0) + + /* Get the PCAP library name and version. */ + strcpy(errbuf, f_pcap_lib_version()); + str = strchr(errbuf, '('); + if (str != NULL) + *(str - 1) = '\0'; + pcap_log("PCAP: initializing, %s\n", errbuf); + + /* Get the value of our capture interface. */ + if ((intf_name[0] == '\0') || !strcmp(intf_name, "none")) { + pcap_log("PCAP: no interface configured!\n"); + return NULL; + } + + pcap_log("PCAP: interface: %s\n", intf_name); + + net_pcap_t *pcap = calloc(1, sizeof(net_pcap_t)); + pcap->card = (netcard_t *)card; + memcpy(pcap->mac_addr, mac_addr, sizeof(pcap->mac_addr)); + + if ((pcap->pcap = f_pcap_create(intf_name, errbuf)) == NULL) { + pcap_log(" Unable to open device: %s!\n", intf_name); + free(pcap); + return NULL; + } + + if (f_pcap_setnonblock((void *) pcap->pcap, 1, errbuf) != 0) pcap_log("PCAP: failed nonblock %s\n", errbuf); - pcap_log("PCAP: interface: %s\n", network_host); + if (f_pcap_set_immediate_mode((void *) pcap->pcap, 1) != 0) + pcap_log("PCAP: error setting immediate mode\n"); + + if (f_pcap_set_promisc((void *) pcap->pcap, 1) != 0) + pcap_log("PCAP: error enabling promiscuous mode\n"); + + if (f_pcap_set_snaplen((void *) pcap->pcap, NET_MAX_FRAME) != 0) + pcap_log("PCAP: error setting snaplen\n"); + + if (f_pcap_activate((void *) pcap->pcap) != 0) { + pcap_log("PCAP: failed pcap_activate"); + f_pcap_close((void *) pcap->pcap); + free(pcap); + return NULL; + } /* Create a MAC address based packet filter. */ pcap_log("PCAP: installing filter for MAC=%02x:%02x:%02x:%02x:%02x:%02x\n", - mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); + mac_addr[0], mac_addr[1], mac_addr[2], mac_addr[3], mac_addr[4], mac_addr[5]); sprintf(filter_exp, - "( ((ether dst ff:ff:ff:ff:ff:ff) or (ether dst %02x:%02x:%02x:%02x:%02x:%02x)) and not (ether src %02x:%02x:%02x:%02x:%02x:%02x) )", - mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], - mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); - if (f_pcap_compile((void *)pcap, &fp, filter_exp, 0, 0xffffffff) != -1) { - if (f_pcap_setfilter((void *)pcap, &fp) != 0) { - pcap_log("PCAP: error installing filter (%s) !\n", filter_exp); - f_pcap_close((void *)pcap); - return(-1); - } + "( ((ether dst ff:ff:ff:ff:ff:ff) or (ether dst %02x:%02x:%02x:%02x:%02x:%02x)) and not (ether src %02x:%02x:%02x:%02x:%02x:%02x) )", + mac_addr[0], mac_addr[1], mac_addr[2], mac_addr[3], mac_addr[4], mac_addr[5], + mac_addr[0], mac_addr[1], mac_addr[2], mac_addr[3], mac_addr[4], mac_addr[5]); + if (f_pcap_compile((void *) pcap->pcap, &fp, filter_exp, 0, 0xffffffff) != -1) { + if (f_pcap_setfilter((void *) pcap->pcap, &fp) != 0) { + pcap_log("PCAP: error installing filter (%s) !\n", filter_exp); + f_pcap_close((void *) pcap->pcap); + free(pcap); + return NULL; + } } else { - pcap_log("PCAP: could not compile filter (%s) !\n", filter_exp); - f_pcap_close((void *)pcap); - return(-1); + pcap_log("PCAP: could not compile filter (%s) : %s!\n", filter_exp, f_pcap_geterr((void*)pcap->pcap)); + f_pcap_close((void *) pcap->pcap); + free(pcap); + return NULL; } - /* Save the callback info. */ - poll_card = card; + pcap->pkt.data = calloc(1, NET_MAX_FRAME); + net_event_init(&pcap->tx_event); + net_event_init(&pcap->stop_event); + pcap->poll_tid = thread_create(net_pcap_thread, pcap); - pcap_log("PCAP: starting thread..\n"); - poll_state = thread_create_event(); - poll_tid = thread_create(poll_thread, mac); - thread_wait_event(poll_state, -1); - - return(0); + return pcap; } - -/* Send a packet to the Pcap interface. */ +/* Close up shop. */ void -net_pcap_in(uint8_t *bufp, int len) +net_pcap_close(void *priv) { - if (pcap == NULL) - return; + if (!priv) + return; - f_pcap_sendpacket((void *)pcap, bufp, len); + net_pcap_t *pcap = (net_pcap_t *)priv; + + pcap_log("PCAP: closing.\n"); + + /* Tell the thread to terminate. */ + net_event_set(&pcap->stop_event); + + /* Wait for the thread to finish. */ + pcap_log("PCAP: waiting for thread to end...\n"); + thread_wait(pcap->poll_tid); + pcap_log("PCAP: thread ended\n"); + + free(pcap->pkt.data); + + /* OK, now shut down Pcap itself. */ + f_pcap_close((void*)pcap->pcap); + + net_event_close(&pcap->tx_event); + net_event_close(&pcap->stop_event); + + free(pcap); } + +const netdrv_t net_pcap_drv = { + &net_pcap_in_available, + &net_pcap_init, + &net_pcap_close, + NULL +}; diff --git a/src/network/net_pcnet.c b/src/network/net_pcnet.c index b4c56af53..25ced4679 100644 --- a/src/network/net_pcnet.c +++ b/src/network/net_pcnet.c @@ -41,6 +41,8 @@ #include <86box/random.h> #include <86box/device.h> #include <86box/isapnp.h> +#include <86box/timer.h> +#include <86box/thread.h> #include <86box/network.h> #include <86box/net_pcnet.h> #include <86box/bswap.h> @@ -259,6 +261,7 @@ typedef struct { int transfer_size; uint8_t maclocal[6]; /* configured MAC (local) address */ pc_timer_t timer, timer_soft_int, timer_restore; + netcard_t *netcard; } nic_t; /** @todo All structs: big endian? */ @@ -1528,7 +1531,7 @@ pcnetAsyncTransmit(nic_t *dev) pcnetReceiveNoSync(dev, dev->abLoopBuf, dev->xmit_pos); } else { pcnetlog(3, "%s: pcnetAsyncTransmit: transmit loopbuf stp and enp, xmit pos = %d\n", dev->name, dev->xmit_pos); - network_tx(dev->abLoopBuf, dev->xmit_pos); + network_tx(dev->netcard, dev->abLoopBuf, dev->xmit_pos); } } else if (cb == 4096) { /* The Windows NT4 pcnet driver sometimes marks the first @@ -1639,7 +1642,7 @@ pcnetAsyncTransmit(nic_t *dev) pcnetReceiveNoSync(dev, dev->abLoopBuf, dev->xmit_pos); } else { pcnetlog(3, "%s: pcnetAsyncTransmit: transmit loopbuf enp\n", dev->name); - network_tx(dev->abLoopBuf, dev->xmit_pos); + network_tx(dev->netcard, dev->abLoopBuf, dev->xmit_pos); } /* Write back the TMD, pass it to the host */ @@ -3051,7 +3054,7 @@ pcnet_init(const device_t *info) pcnetHardReset(dev); /* Attach ourselves to the network module. */ - network_attach(dev, dev->aPROM, pcnetReceiveNoSync, pcnetWaitReceiveAvail, pcnetSetLinkState); + dev->netcard = network_attach(dev, dev->aPROM, pcnetReceiveNoSync, pcnetWaitReceiveAvail, pcnetSetLinkState); timer_add(&dev->timer, pcnetPollTimer, dev, 0); @@ -3071,8 +3074,7 @@ pcnet_close(void *priv) pcnetlog(1, "%s: closed\n", dev->name); - /* Make sure the platform layer is shut down. */ - network_close(); + netcard_close(dev->netcard); if (dev) { free(dev); diff --git a/src/network/net_plip.c b/src/network/net_plip.c index 6da355632..cf1a0f9c3 100644 --- a/src/network/net_plip.c +++ b/src/network/net_plip.c @@ -31,6 +31,8 @@ #include <86box/timer.h> #include <86box/pit.h> #include <86box/device.h> +#include <86box/thread.h> +#include <86box/timer.h> #include <86box/network.h> #include <86box/net_plip.h> @@ -70,6 +72,7 @@ typedef struct uint8_t *rx_pkt, rx_checksum, rx_return_state; uint16_t rx_len, rx_ptr; + netcard_t *card; } plip_t; @@ -117,8 +120,6 @@ timeout_timer(void *priv) dev->rx_pkt = NULL; } - network_rx_pause = 0; - timer_disable(&dev->timeout_timer); } @@ -229,7 +230,7 @@ plip_write_data(uint8_t val, void *priv) /* Transmit packet. */ plip_log(2, "PLIP: transmitting %d-byte packet\n", dev->tx_len); - network_tx(dev->tx_pkt, dev->tx_len); + network_tx(dev->card, dev->tx_pkt, dev->tx_len); } else { plip_log(1, "PLIP: checksum error: expected %02X, got %02X\n", dev->tx_checksum_calc, dev->tx_checksum); } @@ -381,7 +382,6 @@ plip_receive_packet(plip_t *dev) } if (!dev->rx_pkt || !dev->rx_len) { /* unpause RX queue if there's no packet to receive */ - network_rx_pause = 0; return; } @@ -432,8 +432,6 @@ plip_rx(void *priv, uint8_t *buf, int io_len) if (!(dev->rx_pkt = malloc(io_len))) /* unlikely */ fatal("PLIP: unable to allocate rx_pkt\n"); - network_rx_pause = 1; /* make sure we don't get any more packets while processing this one */ - /* Copy this packet to our buffer. */ dev->rx_len = io_len; memcpy(dev->rx_pkt, buf, dev->rx_len); @@ -478,7 +476,7 @@ plip_net_init(const device_t *info) } plip_log(1, " (attached to LPT)\n"); - network_attach(instance, instance->mac, plip_rx, NULL, NULL); + instance->card = network_attach(instance, instance->mac, plip_rx, NULL, NULL); return instance; } @@ -487,6 +485,9 @@ plip_net_init(const device_t *info) static void plip_close(void *priv) { + if (instance->card) { + netcard_close(instance->card); + } free(priv); } diff --git a/src/network/net_slirp.c b/src/network/net_slirp.c index bc7c68783..90812d17e 100644 --- a/src/network/net_slirp.c +++ b/src/network/net_slirp.c @@ -24,52 +24,51 @@ #include #include #include +#include #include +#include +#include #include #define HAVE_STDARG_H #include <86box/86box.h> #include <86box/device.h> #include <86box/plat.h> #include <86box/thread.h> +#include <86box/timer.h> #include <86box/network.h> #include <86box/machine.h> -#include <86box/timer.h> #include <86box/config.h> - - -/* SLiRP can use poll() or select() for socket polling. - poll() is best on *nix but slow and limited on Windows. */ -#ifndef _WIN32 -# define SLIRP_USE_POLL 1 -#endif -#ifdef SLIRP_USE_POLL -# ifdef _WIN32 -# include -# define poll WSAPoll -# else -# include -# endif +#include <86box/video.h> +#ifdef _WIN32 +#define WIN32_LEAN_AND_MEAN +#include +#else +#include #endif +#include <86box/net_event.h> +enum { + NET_EVENT_STOP = 0, + NET_EVENT_TX, + NET_EVENT_RX, + NET_EVENT_MAX +}; typedef struct { - Slirp *slirp; - void *mac; - const netcard_t *card; /* netcard attached to us */ - volatile thread_t *poll_tid; - event_t *poll_state; - uint8_t stop; -#ifdef SLIRP_USE_POLL - uint32_t pfd_len, pfd_size; - struct pollfd *pfd; + Slirp *slirp; + uint8_t mac_addr[6]; + netcard_t *card; /* netcard attached to us */ + thread_t *poll_tid; + net_evt_t tx_event; + net_evt_t stop_event; + netpkt_t pkt; +#ifdef _WIN32 + HANDLE sock_event; #else - uint32_t nfds; - fd_set rfds, wfds, xfds; + uint32_t pfd_len, pfd_size; + struct pollfd *pfd; #endif -} slirp_t; - -static slirp_t *slirp; - +} net_slirp_t; #ifdef ENABLE_SLIRP_LOG int slirp_do_log = ENABLE_SLIRP_LOG; @@ -101,7 +100,7 @@ net_slirp_guest_error(const char *msg, void *opaque) static int64_t net_slirp_clock_get_ns(void *opaque) { - return (TIMER_USEC ? (tsc / (TIMER_USEC / 1000)) : 0); + return (int64_t)((double)tsc / cpuclock * 1000000000.0); } @@ -118,13 +117,14 @@ static void net_slirp_timer_free(void *timer, void *opaque) { timer_stop(timer); + free(timer); } static void net_slirp_timer_mod(void *timer, int64_t expire_timer, void *opaque) { - timer_set_delay_u64(timer, expire_timer); + timer_on_auto(timer, expire_timer * 1000); } @@ -154,138 +154,131 @@ net_slirp_notify(void *opaque) ssize_t net_slirp_send_packet(const void *qp, size_t pkt_len, void *opaque) { - slirp_t *slirp = (slirp_t *) opaque; - uint8_t *mac = slirp->mac; + net_slirp_t *slirp = (net_slirp_t *) opaque; + uint8_t *mac = slirp->mac_addr; uint32_t mac_cmp32[2]; uint16_t mac_cmp16[2]; - if (!(slirp->card->set_link_state && slirp->card->set_link_state(slirp->card->priv)) && !(slirp->card->wait && slirp->card->wait(slirp->card->priv))) { - slirp_log("SLiRP: received %d-byte packet\n", pkt_len); + slirp_log("SLiRP: received %d-byte packet\n", pkt_len); - /* Received MAC. */ - mac_cmp32[0] = *(uint32_t *) (((uint8_t *) qp) + 6); - mac_cmp16[0] = *(uint16_t *) (((uint8_t *) qp) + 10); + /* Received MAC. */ + mac_cmp32[0] = *(uint32_t *) (((uint8_t *) qp) + 6); + mac_cmp16[0] = *(uint16_t *) (((uint8_t *) qp) + 10); - /* Local MAC. */ - mac_cmp32[1] = *(uint32_t *) mac; - mac_cmp16[1] = *(uint16_t *) (mac + 4); - if ((mac_cmp32[0] != mac_cmp32[1]) || - (mac_cmp16[0] != mac_cmp16[1])) { - network_queue_put(0, slirp->card->priv, (uint8_t *) qp, pkt_len); - } - - return pkt_len; - } else { - slirp_log("SLiRP: ignored %d-byte packet\n", pkt_len); + /* Local MAC. */ + mac_cmp32[1] = *(uint32_t *) mac; + mac_cmp16[1] = *(uint16_t *) (mac + 4); + if ((mac_cmp32[0] != mac_cmp32[1]) || (mac_cmp16[0] != mac_cmp16[1])) { + network_rx_put(slirp->card, (uint8_t *) qp, pkt_len); } - return 0; + return pkt_len; } +#ifdef _WIN32 static int net_slirp_add_poll(int fd, int events, void *opaque) { - slirp_t *slirp = (slirp_t *) opaque; -#ifdef SLIRP_USE_POLL + net_slirp_t *slirp = (net_slirp_t *) opaque; + long bitmask = 0; + if (events & SLIRP_POLL_IN) + bitmask |= FD_READ | FD_ACCEPT; + if (events & SLIRP_POLL_OUT) + bitmask |= FD_WRITE | FD_CONNECT; + if (events & SLIRP_POLL_HUP) + bitmask |= FD_CLOSE; + if (events & SLIRP_POLL_PRI) + bitmask |= FD_OOB; + + WSAEventSelect(fd, slirp->sock_event, bitmask); + return fd; +} +#else +static int +net_slirp_add_poll(int fd, int events, void *opaque) +{ + net_slirp_t *slirp = (net_slirp_t *) opaque; + if (slirp->pfd_len >= slirp->pfd_size) { - int newsize = slirp->pfd_size + 16; - struct pollfd *new = realloc(slirp->pfd, newsize * sizeof(struct pollfd)); - if (new) { - slirp->pfd = new; - slirp->pfd_size = newsize; - } + int newsize = slirp->pfd_size + 16; + struct pollfd *new = realloc(slirp->pfd, newsize * sizeof(struct pollfd)); + if (new) { + slirp->pfd = new; + slirp->pfd_size = newsize; + } } if ((slirp->pfd_len < slirp->pfd_size)) { - int idx = slirp->pfd_len++; - slirp->pfd[idx].fd = fd; - int pevents = 0; - if (events & SLIRP_POLL_IN) pevents |= POLLIN; - if (events & SLIRP_POLL_OUT) pevents |= POLLOUT; -# ifndef _WIN32 - /* Windows does not support some events. */ - if (events & SLIRP_POLL_ERR) pevents |= POLLERR; - if (events & SLIRP_POLL_PRI) pevents |= POLLPRI; - if (events & SLIRP_POLL_HUP) pevents |= POLLHUP; -# endif - slirp->pfd[idx].events = pevents; - return idx; + int idx = slirp->pfd_len++; + slirp->pfd[idx].fd = fd; + int pevents = 0; + if (events & SLIRP_POLL_IN) + pevents |= POLLIN; + if (events & SLIRP_POLL_OUT) + pevents |= POLLOUT; + if (events & SLIRP_POLL_ERR) + pevents |= POLLERR; + if (events & SLIRP_POLL_PRI) + pevents |= POLLPRI; + if (events & SLIRP_POLL_HUP) + pevents |= POLLHUP; + slirp->pfd[idx].events = pevents; + return idx; } else - return -1; -#else - if (events & SLIRP_POLL_IN) - FD_SET(fd, &slirp->rfds); - if (events & SLIRP_POLL_OUT) - FD_SET(fd, &slirp->wfds); - if (events & SLIRP_POLL_PRI) - FD_SET(fd, &slirp->xfds); - if (fd > slirp->nfds) - slirp->nfds = fd; - return fd; -#endif + return -1; } +#endif - +#ifdef _WIN32 static int net_slirp_get_revents(int idx, void *opaque) { - slirp_t *slirp = (slirp_t *) opaque; + net_slirp_t *slirp = (net_slirp_t *) opaque; int ret = 0; -#ifdef SLIRP_USE_POLL - int events = slirp->pfd[idx].revents; - if (events & POLLIN) ret |= SLIRP_POLL_IN; - if (events & POLLOUT) ret |= SLIRP_POLL_OUT; - if (events & POLLPRI) ret |= SLIRP_POLL_PRI; - if (events & POLLERR) ret |= SLIRP_POLL_ERR; - if (events & POLLHUP) ret |= SLIRP_POLL_HUP; -#else - if (FD_ISSET(idx, &slirp->rfds)) - ret |= SLIRP_POLL_IN; - if (FD_ISSET(idx, &slirp->wfds)) - ret |= SLIRP_POLL_OUT; - if (FD_ISSET(idx, &slirp->xfds)) - ret |= SLIRP_POLL_PRI; -#endif + WSANETWORKEVENTS ev; + if (WSAEnumNetworkEvents(idx, slirp->sock_event, &ev) != 0) { + return ret; + } + +# define WSA_TO_POLL(_wsaev, _pollev) \ + do { \ + if (ev.lNetworkEvents & (_wsaev)) { \ + ret |= (_pollev); \ + if (ev.iErrorCode[_wsaev##_BIT] != 0) { \ + ret |= SLIRP_POLL_ERR; \ + } \ + } \ + } while (0) + + WSA_TO_POLL(FD_READ, SLIRP_POLL_IN); + WSA_TO_POLL(FD_ACCEPT, SLIRP_POLL_IN); + WSA_TO_POLL(FD_WRITE, SLIRP_POLL_OUT); + WSA_TO_POLL(FD_CONNECT, SLIRP_POLL_OUT); + WSA_TO_POLL(FD_OOB, SLIRP_POLL_PRI); + WSA_TO_POLL(FD_CLOSE, SLIRP_POLL_HUP); + return ret; } - - -static void -slirp_tic(slirp_t *slirp) +#else +static int +net_slirp_get_revents(int idx, void *opaque) { - int ret; - uint32_t tmo; - - /* Let SLiRP create a list of all open sockets. */ -#ifdef SLIRP_USE_POLL - tmo = -1; - slirp->pfd_len = 0; -#else - slirp->nfds = -1; - FD_ZERO(&slirp->rfds); - FD_ZERO(&slirp->wfds); - FD_ZERO(&slirp->xfds); -#endif - slirp_pollfds_fill(slirp->slirp, &tmo, net_slirp_add_poll, slirp); - - /* Now wait for something to happen, or at most 'tmo' usec. */ -#ifdef SLIRP_USE_POLL - ret = poll(slirp->pfd, slirp->pfd_len, tmo); -#else - if (tmo < 0) - tmo = 500; - - struct timeval tv; - tv.tv_sec = 0; - tv.tv_usec = tmo; - - ret = select(slirp->nfds + 1, &slirp->rfds, &slirp->wfds, &slirp->xfds, &tv); -#endif - - /* If something happened, let SLiRP handle it. */ - slirp_pollfds_poll(slirp->slirp, (ret <= 0), net_slirp_get_revents, slirp); + net_slirp_t *slirp = (net_slirp_t *) opaque; + int ret = 0; + int events = slirp->pfd[idx].revents; + if (events & POLLIN) + ret |= SLIRP_POLL_IN; + if (events & POLLOUT) + ret |= SLIRP_POLL_OUT; + if (events & POLLPRI) + ret |= SLIRP_POLL_PRI; + if (events & POLLERR) + ret |= SLIRP_POLL_ERR; + if (events & POLLHUP) + ret |= SLIRP_POLL_HUP; + return ret; } - +#endif static const SlirpCb slirp_cb = { .send_packet = net_slirp_send_packet, @@ -299,176 +292,210 @@ static const SlirpCb slirp_cb = { .notify = net_slirp_notify }; - -/* Handle the receiving of frames. */ +/* Send a packet to the SLiRP interface. */ static void -poll_thread(void *arg) -{ - slirp_t *slirp = (slirp_t *) arg; - event_t *evt; - int tx; - - slirp_log("SLiRP: initializing...\n"); - - /* Set the IP addresses to use. */ - struct in_addr net = { .s_addr = htonl(0x0a000200) }; /* 10.0.2.0 */ - struct in_addr mask = { .s_addr = htonl(0xffffff00) }; /* 255.255.255.0 */ - struct in_addr host = { .s_addr = htonl(0x0a000202) }; /* 10.0.2.2 */ - struct in_addr dhcp = { .s_addr = htonl(0x0a00020f) }; /* 10.0.2.15 */ - struct in_addr dns = { .s_addr = htonl(0x0a000203) }; /* 10.0.2.3 */ - struct in_addr bind = { .s_addr = htonl(0x00000000) }; /* 0.0.0.0 */ - struct in6_addr ipv6_dummy = { 0 }; /* contents don't matter; we're not using IPv6 */ - - /* Initialize SLiRP. */ - slirp->slirp = slirp_init(0, 1, net, mask, host, 0, ipv6_dummy, 0, ipv6_dummy, NULL, NULL, NULL, NULL, dhcp, dns, ipv6_dummy, NULL, NULL, &slirp_cb, arg); - if (!slirp->slirp) { - slirp_log("SLiRP: initialization failed\n"); - return; - } - - /* Set up port forwarding. */ - int udp, external, internal, i = 0; - char *category = "SLiRP Port Forwarding"; - char key[20]; - while (1) { - sprintf(key, "%d_protocol", i); - udp = strcmp(config_get_string(category, key, "tcp"), "udp") == 0; - sprintf(key, "%d_external", i); - external = config_get_int(category, key, 0); - sprintf(key, "%d_internal", i); - internal = config_get_int(category, key, 0); - if ((external <= 0) && (internal <= 0)) - break; - else if (internal <= 0) - internal = external; - else if (external <= 0) - external = internal; - - if (slirp_add_hostfwd(slirp->slirp, udp, bind, external, dhcp, internal) == 0) - pclog("SLiRP: Forwarded %s port external:%d to internal:%d\n", udp ? "UDP" : "TCP", external, internal); - else - pclog("SLiRP: Failed to forward %s port external:%d to internal:%d\n", udp ? "UDP" : "TCP", external, internal); - - i++; - } - - /* Start polling. */ - slirp_log("SLiRP: polling started.\n"); - thread_set_event(slirp->poll_state); - - /* Create a waitable event. */ - evt = thread_create_event(); - - while (!slirp->stop) { - /* Request ownership of the queue. */ - network_wait(1); - - /* Stop processing if asked to. */ - if (slirp->stop) { - network_wait(0); - break; - } - - /* See if there is any work. */ - slirp_tic(slirp); - - /* Wait for the next packet to arrive - network_do_tx() is called from there. */ - tx = network_tx_queue_check(); - - /* Release ownership of the queue. */ - network_wait(0); - - /* If we did not get anything, wait a while. */ - if (!tx) - thread_wait_event(evt, 10); - } - - /* No longer needed. */ - if (evt) - thread_destroy_event(evt); - - slirp_log("SLiRP: polling stopped.\n"); - thread_set_event(slirp->poll_state); - - /* Destroy event here to avoid a crash. */ - slirp_log("SLiRP: thread ended\n"); - thread_destroy_event(slirp->poll_state); - /* Free here instead of immediately freeing the global slirp on the main - thread to avoid a race condition. */ - slirp_cleanup(slirp->slirp); - free(slirp); -} - - -/* Initialize SLiRP for use. */ -int -net_slirp_init(void) -{ - return 0; -} - - -/* Initialize SLiRP for use. */ -int -net_slirp_reset(const netcard_t *card, uint8_t *mac) -{ - slirp_t *new_slirp = malloc(sizeof(slirp_t)); - memset(new_slirp, 0, sizeof(slirp_t)); - new_slirp->mac = mac; - new_slirp->card = card; -#ifdef SLIRP_USE_POLL - new_slirp->pfd_size = 16 * sizeof(struct pollfd); - new_slirp->pfd = malloc(new_slirp->pfd_size); - memset(new_slirp->pfd, 0, new_slirp->pfd_size); -#endif - - /* Save the callback info. */ - slirp = new_slirp; - - slirp_log("SLiRP: creating thread...\n"); - slirp->poll_state = thread_create_event(); - slirp->poll_tid = thread_create(poll_thread, new_slirp); - thread_wait_event(slirp->poll_state, -1); - - return 0; -} - - -void -net_slirp_close(void) +net_slirp_in(net_slirp_t *slirp, uint8_t *pkt, int pkt_len) { if (!slirp) - return; + return; - slirp_log("SLiRP: closing\n"); - - /* Tell the polling thread to shut down. */ - slirp->stop = 1; - - /* Tell the thread to terminate. */ - if (slirp->poll_tid) { - /* Wait for the thread to finish. */ - slirp_log("SLiRP: waiting for thread to end...\n"); - thread_wait_event(slirp->poll_state, -1); - } - - /* Shutdown work is done by the thread on its local copy of slirp. */ - slirp = NULL; -} - - -/* Send a packet to the SLiRP interface. */ -void -net_slirp_in(uint8_t *pkt, int pkt_len) -{ - if (!slirp || !slirp->slirp) - return; - - slirp_log("SLiRP: sending %d-byte packet\n", pkt_len); + slirp_log("SLiRP: sending %d-byte packet to host network\n", pkt_len); slirp_input(slirp->slirp, (const uint8_t *) pkt, pkt_len); } +void +net_slirp_in_available(void *priv) +{ + net_slirp_t *slirp = (net_slirp_t *)priv; + net_event_set(&slirp->tx_event); +} + +#ifdef _WIN32 +static void +net_slirp_thread(void *priv) +{ + net_slirp_t *slirp = (net_slirp_t *) priv; + + /* Start polling. */ + slirp_log("SLiRP: polling started.\n"); + + HANDLE events[3]; + events[NET_EVENT_STOP] = net_event_get_handle(&slirp->stop_event); + events[NET_EVENT_TX] = net_event_get_handle(&slirp->tx_event); + events[NET_EVENT_RX] = slirp->sock_event; + bool run = true; + while (run) { + uint32_t timeout = -1; + slirp_pollfds_fill(slirp->slirp, &timeout, net_slirp_add_poll, slirp); + if (timeout < 0) + timeout = INFINITE; + + int ret = WaitForMultipleObjects(3, events, FALSE, (DWORD)timeout); + switch (ret - WAIT_OBJECT_0) { + case NET_EVENT_STOP: + run = false; + break; + + case NET_EVENT_TX: + while (network_tx_pop(slirp->card, &slirp->pkt)) { + net_slirp_in(slirp, slirp->pkt.data, slirp->pkt.len); + } + break; + + default: + slirp_pollfds_poll(slirp->slirp, ret == WAIT_FAILED, net_slirp_get_revents, slirp); + break; + + } + } + + slirp_log("SLiRP: polling stopped.\n"); +} +#else +/* Handle the receiving of frames. */ +static void +net_slirp_thread(void *priv) +{ + net_slirp_t *slirp = (net_slirp_t *) priv; + + /* Start polling. */ + slirp_log("SLiRP: polling started.\n"); + + while (1) { + uint32_t timeout = -1; + + slirp->pfd_len = 0; + net_slirp_add_poll(net_event_get_fd(&slirp->stop_event), SLIRP_POLL_IN, slirp); + net_slirp_add_poll(net_event_get_fd(&slirp->tx_event), SLIRP_POLL_IN, slirp); + + slirp_pollfds_fill(slirp->slirp, &timeout, net_slirp_add_poll, slirp); + + int ret = poll(slirp->pfd, slirp->pfd_len, timeout); + + slirp_pollfds_poll(slirp->slirp, (ret < 0), net_slirp_get_revents, slirp); + + if (slirp->pfd[NET_EVENT_STOP].revents & POLLIN) { + net_event_clear(&slirp->stop_event); + break; + } + + if (slirp->pfd[NET_EVENT_TX].revents & POLLIN) { + net_event_clear(&slirp->tx_event); + + if (network_tx_pop(slirp->card, &slirp->pkt)) { + net_slirp_in(slirp, slirp->pkt.data, slirp->pkt.len); + } + } + + } + + slirp_log("SLiRP: polling stopped.\n"); +} +#endif + +static int slirp_card_num = 2; + +/* Initialize SLiRP for use. */ +void * +net_slirp_init(const netcard_t *card, const uint8_t *mac_addr, void *priv) +{ + slirp_log("SLiRP: initializing...\n"); + net_slirp_t *slirp = calloc(1, sizeof(net_slirp_t)); + memcpy(slirp->mac_addr, mac_addr, sizeof(slirp->mac_addr)); + slirp->card = (netcard_t*)card; + +#ifndef _WIN32 + slirp->pfd_size = 16 * sizeof(struct pollfd); + slirp->pfd = malloc(slirp->pfd_size); + memset(slirp->pfd, 0, slirp->pfd_size); +#endif + + /* Set the IP addresses to use. */ + struct in_addr net = { .s_addr = htonl(0x0a000000 | (slirp_card_num << 8)) }; /* 10.0.x.0 */ + struct in_addr mask = { .s_addr = htonl(0xffffff00) }; /* 255.255.255.0 */ + struct in_addr host = { .s_addr = htonl(0x0a000002 | (slirp_card_num << 8)) }; /* 10.0.x.2 */ + struct in_addr dhcp = { .s_addr = htonl(0x0a00000f | (slirp_card_num << 8)) }; /* 10.0.x.15 */ + struct in_addr dns = { .s_addr = htonl(0x0a000003 | (slirp_card_num << 8)) }; /* 10.0.x.3 */ + struct in_addr bind = { .s_addr = htonl(0x00000000 | (slirp_card_num << 8)) }; /* 0.0.0.0 */ + struct in6_addr ipv6_dummy = { 0 }; /* contents don't matter; we're not using IPv6 */ + + /* Initialize SLiRP. */ + slirp->slirp = slirp_init(0, 1, net, mask, host, 0, ipv6_dummy, 0, ipv6_dummy, NULL, NULL, NULL, NULL, dhcp, dns, ipv6_dummy, NULL, NULL, &slirp_cb, slirp); + if (!slirp->slirp) { + slirp_log("SLiRP: initialization failed\n"); + free(slirp); + return NULL; + } + + /* Set up port forwarding. */ + int udp, external, internal, i = 0; + char *category = "SLiRP Port Forwarding"; + char key[20]; + while (1) { + sprintf(key, "%d_protocol", i); + udp = strcmp(config_get_string(category, key, "tcp"), "udp") == 0; + sprintf(key, "%d_external", i); + external = config_get_int(category, key, 0); + sprintf(key, "%d_internal", i); + internal = config_get_int(category, key, 0); + if ((external <= 0) && (internal <= 0)) + break; + else if (internal <= 0) + internal = external; + else if (external <= 0) + external = internal; + + if (slirp_add_hostfwd(slirp->slirp, udp, bind, external, dhcp, internal) == 0) + pclog("SLiRP: Forwarded %s port external:%d to internal:%d\n", udp ? "UDP" : "TCP", external, internal); + else + pclog("SLiRP: Failed to forward %s port external:%d to internal:%d\n", udp ? "UDP" : "TCP", external, internal); + + i++; + } + + slirp->pkt.data = calloc(1, NET_MAX_FRAME); + net_event_init(&slirp->tx_event); + net_event_init(&slirp->stop_event); +#ifdef _WIN32 + slirp->sock_event = CreateEvent(NULL, FALSE, FALSE, NULL); +#endif + slirp_log("SLiRP: creating thread...\n"); + slirp->poll_tid = thread_create(net_slirp_thread, slirp); + + slirp_card_num++; + return slirp; +} + +void +net_slirp_close(void *priv) +{ + if (!priv) + return; + + net_slirp_t *slirp = (net_slirp_t *) priv; + + slirp_log("SLiRP: closing\n"); + /* Tell the polling thread to shut down. */ + net_event_set(&slirp->stop_event); + + /* Wait for the thread to finish. */ + slirp_log("SLiRP: waiting for thread to end...\n"); + thread_wait(slirp->poll_tid); + + net_event_close(&slirp->tx_event); + net_event_close(&slirp->stop_event); + slirp_cleanup(slirp->slirp); + free(slirp->pkt.data); + free(slirp); + slirp_card_num--; +} + +const netdrv_t net_slirp_drv = { + &net_slirp_in_available, + &net_slirp_init, + &net_slirp_close +}; /* Stubs to stand in for the parts of libslirp we skip compiling. */ void ncsi_input(void *slirp, const uint8_t *pkt, int pkt_len) {} diff --git a/src/network/net_wd8003.c b/src/network/net_wd8003.c index 81429fe19..be52a11aa 100644 --- a/src/network/net_wd8003.c +++ b/src/network/net_wd8003.c @@ -58,6 +58,8 @@ #include <86box/pic.h> #include <86box/random.h> #include <86box/device.h> +#include <86box/timer.h> +#include <86box/thread.h> #include <86box/network.h> #include <86box/net_dp8390.h> #include <86box/net_wd8003.h> @@ -696,7 +698,7 @@ wd_init(const device_t *info) dev->ram_addr = device_get_config_hex20("ram_addr"); } - dev->dp8390 = device_add(&dp8390_device); + dev->dp8390 = device_add_inst(&dp8390_device, dp3890_inst++); dev->dp8390->priv = dev; dev->dp8390->interrupt = wd_interrupt; dp8390_set_defaults(dev->dp8390, DP8390_FLAG_CHECK_CR | DP8390_FLAG_CLEAR_IRQ); @@ -786,7 +788,7 @@ wd_init(const device_t *info) mem_mapping_disable(&dev->ram_mapping); /* Attach ourselves to the network module. */ - network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL, NULL); + dev->dp8390->card = network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL, NULL); if (!(dev->board_chip & WE_ID_BUS_MCA)) { wdlog("%s: attached IO=0x%X IRQ=%d, RAM addr=0x%06x\n", dev->name, diff --git a/src/network/network.c b/src/network/network.c index 6a7fbdfa5..714037b4c 100644 --- a/src/network/network.c +++ b/src/network/network.c @@ -56,6 +56,7 @@ #include #include #include +#include #define HAVE_STDARG_H #include <86box/86box.h> #include <86box/device.h> @@ -63,6 +64,7 @@ #include <86box/plat.h> #include <86box/thread.h> #include <86box/ui.h> +#include <86box/timer.h> #include <86box/network.h> #include <86box/net_3c503.h> #include <86box/net_ne2000.h> @@ -70,6 +72,11 @@ #include <86box/net_plip.h> #include <86box/net_wd8003.h> +#ifdef _WIN32 +#define WIN32_LEAN_AND_MEAN +#include +#include +#endif static const device_t net_none_device = { .name = "None", @@ -86,32 +93,32 @@ static const device_t net_none_device = { }; -static netcard_t net_cards[] = { -// clang-format off - { &net_none_device, NULL }, - { &threec503_device, NULL }, - { &pcnet_am79c960_device, NULL }, - { &pcnet_am79c961_device, NULL }, - { &ne1000_device, NULL }, - { &ne2000_device, NULL }, - { &pcnet_am79c960_eb_device, NULL }, - { &rtl8019as_device, NULL }, - { &wd8003e_device, NULL }, - { &wd8003eb_device, NULL }, - { &wd8013ebt_device, NULL }, - { &plip_device, NULL }, - { ðernext_mc_device, NULL }, - { &wd8003eta_device, NULL }, - { &wd8003ea_device, NULL }, - { &wd8013epa_device, NULL }, - { &pcnet_am79c973_device, NULL }, - { &pcnet_am79c970a_device, NULL }, - { &rtl8029as_device, NULL }, - { &pcnet_am79c960_vlb_device, NULL }, - { NULL, NULL } -// clang-format off +static const device_t *net_cards[] = { + &net_none_device, + &threec503_device, + &pcnet_am79c960_device, + &pcnet_am79c961_device, + &ne1000_device, + &ne2000_device, + &pcnet_am79c960_eb_device, + &rtl8019as_device, + &wd8003e_device, + &wd8003eb_device, + &wd8013ebt_device, + &plip_device, + ðernext_mc_device, + &wd8003eta_device, + &wd8003ea_device, + &wd8013epa_device, + &pcnet_am79c973_device, + &pcnet_am79c970a_device, + &rtl8029as_device, + &pcnet_am79c960_vlb_device, + NULL }; +netcard_conf_t net_cards_conf[NET_CARD_MAX]; +int net_card_current = 0; /* Global variables. */ int network_type; @@ -119,20 +126,9 @@ int network_ndev; int network_card; char network_host[522]; netdev_t network_devs[32]; -int network_rx_pause = 0, - network_tx_pause = 0; /* Local variables. */ -static volatile atomic_int net_wait = 0; -static mutex_t *network_mutex; -static uint8_t *network_mac; -static uint8_t network_timer_active = 0; -static pc_timer_t network_rx_queue_timer; -static netpkt_t *first_pkt[3] = { NULL, NULL, NULL }, - *last_pkt[3] = { NULL, NULL, NULL }; -static netpkt_t queued_pkt; - #ifdef ENABLE_NETWORK_LOG int network_do_log = ENABLE_NETWORK_LOG; @@ -191,15 +187,13 @@ network_dump_packet(netpkt_t *pkt) #endif -void -network_wait(uint8_t wait) +#ifdef _WIN32 +static void +network_winsock_clean(void) { - if (wait) - thread_wait_mutex(network_mutex); - else - thread_release_mutex(network_mutex); + WSACleanup(); } - +#endif /* * Initialize the configured network cards. @@ -213,9 +207,11 @@ network_init(void) { int i; - /* Initialize to a known state. */ - network_type = NET_TYPE_NONE; - network_card = 0; +#ifdef _WIN32 + WSADATA Data; + WSAStartup(MAKEWORD(2, 0), &Data); + atexit(network_winsock_clean); +#endif /* Create a first device entry that's always there, as needed by UI. */ strcpy(network_devs[0].device, "none"); @@ -247,156 +243,133 @@ network_init(void) #endif } - -void -network_queue_put(int tx, void *priv, uint8_t *data, int len) -{ - netpkt_t *temp; - - temp = (netpkt_t *) calloc(sizeof(netpkt_t), 1); - temp->priv = priv; - memcpy(temp->data, data, len); - temp->len = len; - temp->prev = last_pkt[tx]; - temp->next = NULL; - - if (last_pkt[tx] != NULL) - last_pkt[tx]->next = temp; - last_pkt[tx] = temp; - - if (first_pkt[tx] == NULL) - first_pkt[tx] = temp; -} - - static void -network_queue_get(int tx, netpkt_t *pkt) +network_queue_init(netqueue_t *queue) { - netpkt_t *temp; - - temp = first_pkt[tx]; - - if (temp == NULL) { - memset(pkt, 0x00, sizeof(netpkt_t)); - return; + queue->size = NET_QUEUE_LEN; + queue->head = queue->tail = 0; + for (int i=0; isize; i++) { + queue->packets[i].data = calloc(1, NET_MAX_FRAME); + queue->packets[i].len = 0; } - memcpy(pkt, temp, sizeof(netpkt_t)); - - first_pkt[tx] = temp->next; - free(temp); - - if (first_pkt[tx] == NULL) - last_pkt[tx] = NULL; } - -static void -network_queue_transmit(int tx) +static bool +network_queue_full(netqueue_t *queue) { - netpkt_t *temp; + return ((queue->head + 1) % queue->size) == queue->tail; +} - temp = first_pkt[tx]; +static bool +network_queue_empty(netqueue_t *queue) +{ + return (queue->head == queue->tail); +} - if (temp == NULL) - return; - - if (temp->len > 0) { - network_dump_packet(temp); - /* Why on earth is this not a function pointer?! */ - switch(network_type) { - case NET_TYPE_PCAP: - net_pcap_in(temp->data, temp->len); - break; - - case NET_TYPE_SLIRP: - net_slirp_in(temp->data, temp->len); - break; - } +int +network_queue_put(netqueue_t *queue, uint8_t *data, int len) +{ + if (len > NET_MAX_FRAME || network_queue_full(queue)) { + return 0; } - first_pkt[tx] = temp->next; - free(temp); - - if (first_pkt[tx] == NULL) - last_pkt[tx] = NULL; + netpkt_t *pkt = &queue->packets[queue->head]; + memcpy(pkt->data, data, len); + pkt->len = len; + queue->head = (queue->head + 1) % queue->size; + return 1; } +static int +network_queue_get(netqueue_t *queue, netpkt_t *dst_pkt) { + if (network_queue_empty(queue)) + return 0; -static void -network_queue_copy(int dest, int src) -{ - netpkt_t *temp, *temp2; + netpkt_t *pkt = &queue->packets[queue->tail]; + memcpy(dst_pkt->data, pkt->data, pkt->len); + dst_pkt->len = pkt->len; + queue->tail = (queue->tail + 1) % queue->size; - temp = first_pkt[src]; - - if (temp == NULL) - return; - - temp2 = (netpkt_t *) calloc(sizeof(netpkt_t), 1); - temp2->priv = temp->priv; - memcpy(temp2->data, temp->data, temp->len); - temp2->len = temp->len; - temp2->prev = last_pkt[dest]; - temp2->next = NULL; - - if (last_pkt[dest] != NULL) - last_pkt[dest]->next = temp2; - last_pkt[dest] = temp2; - - if (first_pkt[dest] == NULL) - first_pkt[dest] = temp2; - - first_pkt[src] = temp->next; - free(temp); - - if (first_pkt[src] == NULL) - last_pkt[src] = NULL; + return 1; } +static int +network_queue_move(netqueue_t *dst_q, netqueue_t *src_q) +{ + if (network_queue_empty(src_q)) + return 0; + + if (network_queue_full(dst_q)) { + return 0; + } + + netpkt_t *src_pkt = &src_q->packets[src_q->tail]; + netpkt_t *dst_pkt = &dst_q->packets[dst_q->head]; + uint8_t *tmp_dat = dst_pkt->data; + + dst_pkt->data = src_pkt->data; + dst_pkt->len = src_pkt->len; + dst_q->head = (dst_q->head + 1) % dst_q->size; + + src_pkt->data = tmp_dat; + src_pkt->len = 0; + src_q->tail = (src_q->tail + 1) % src_q->size; + + return 1; +} static void -network_queue_clear(int tx) +network_queue_clear(netqueue_t *queue) { - netpkt_t *temp = first_pkt[tx], *temp2; - - if (temp == NULL) - return; - - do { - temp2 = temp->next; - free(temp); - temp = temp2; - } while (temp != NULL); - - first_pkt[tx] = last_pkt[tx] = NULL; + for (int i=0; isize; i++) { + free(queue->packets[i].data); + queue->packets[i].len = 0; + } + queue->tail = queue->head = 0; } static void network_rx_queue(void *priv) { - int ret = 1; + netcard_t *card = (netcard_t *)priv; + double timer_period; + int ret = 0; - if (network_rx_pause || !thread_test_mutex(network_mutex)) { - timer_on_auto(&network_rx_queue_timer, 0.762939453125 * 2.0 * 128.0); - return; + bool activity = false; + + if (card->queued_pkt.len == 0) { + thread_wait_mutex(card->rx_mutex); + network_queue_get(&card->queues[NET_QUEUE_RX], &card->queued_pkt); + thread_release_mutex(card->rx_mutex); } - if (queued_pkt.len == 0) - network_queue_get(0, &queued_pkt); - if (queued_pkt.len > 0) { - network_dump_packet(&queued_pkt); - ret = net_cards[network_card].rx(queued_pkt.priv, queued_pkt.data, queued_pkt.len); + if (card->queued_pkt.len > 0) { + network_dump_packet(&card->queued_pkt); + ret = card->rx(card->card_drv, card->queued_pkt.data, card->queued_pkt.len); } - timer_on_auto(&network_rx_queue_timer, 0.762939453125 * 2.0 * ((queued_pkt.len >= 128) ? ((double) queued_pkt.len) : 128.0)); - if (ret) - queued_pkt.len = 0; + + if (ret) { + activity = true; + timer_period = 0.762939453125 * ((card->queued_pkt.len >= 128) ? ((double) card->queued_pkt.len) : 128.0); + card->queued_pkt.len = 0; + } else { + timer_period = 0.762939453125 * 128.0; + } + timer_on_auto(&card->timer, timer_period); /* Transmission. */ - network_queue_copy(1, 2); + thread_wait_mutex(card->tx_mutex); + ret = network_queue_move(&card->queues[NET_QUEUE_TX_HOST], &card->queues[NET_QUEUE_TX_VM]); + thread_release_mutex(card->tx_mutex); + if (ret) { + /* Notify host that a packet is available in the TX queue */ + card->host_drv.notify_in(card->host_drv.priv); + activity = true; + } - network_wait(0); + ui_sb_update_icon(SB_NETWORK, activity); } @@ -407,51 +380,67 @@ network_rx_queue(void *priv) * finished initializing itself, to link itself to the platform support * modules. */ -void -network_attach(void *dev, uint8_t *mac, NETRXCB rx, NETWAITCB wait, NETSETLINKSTATE set_link_state) +netcard_t * +network_attach(void *card_drv, uint8_t *mac, NETRXCB rx, NETWAITCB wait, NETSETLINKSTATE set_link_state) { - if (network_card == 0) return; + netcard_t *card = calloc(1, sizeof(netcard_t)); + card->queued_pkt.data = calloc(1, NET_MAX_FRAME); + card->card_drv = card_drv; + card->rx = rx; + card->wait = wait; + card->set_link_state = set_link_state; + card->tx_mutex = thread_create_mutex(); + card->rx_mutex = thread_create_mutex(); - /* Save the card's info. */ - net_cards[network_card].priv = dev; - net_cards[network_card].rx = rx; - net_cards[network_card].wait = wait; - net_cards[network_card].set_link_state = set_link_state; - network_mac = mac; - - network_set_wait(0); - - /* Activate the platform module. */ - switch(network_type) { - case NET_TYPE_PCAP: - (void)net_pcap_reset(&net_cards[network_card], network_mac); - break; - - case NET_TYPE_SLIRP: - (void)net_slirp_reset(&net_cards[network_card], network_mac); - break; + for (int i=0; i<3; i++) { + network_queue_init(&card->queues[i]); } - first_pkt[0] = first_pkt[1] = first_pkt[2] = NULL; - last_pkt[0] = last_pkt[1] = last_pkt[2] = NULL; - memset(&queued_pkt, 0x00, sizeof(netpkt_t)); - memset(&network_rx_queue_timer, 0x00, sizeof(pc_timer_t)); - timer_add(&network_rx_queue_timer, network_rx_queue, NULL, 0); - /* 10 mbps. */ - timer_on_auto(&network_rx_queue_timer, 0.762939453125 * 2.0); - network_timer_active = 1; + switch (net_cards_conf[net_card_current].net_type) { + case NET_TYPE_SLIRP: + default: + card->host_drv = net_slirp_drv; + card->host_drv.priv = card->host_drv.init(card, mac, NULL); + break; + + case NET_TYPE_PCAP: + card->host_drv = net_pcap_drv; + card->host_drv.priv = card->host_drv.init(card, mac, net_cards_conf[net_card_current].host_dev_name); + break; + } + + if (!card->host_drv.priv) { + thread_close_mutex(card->tx_mutex); + thread_close_mutex(card->rx_mutex); + for (int i=0; i<3; i++) { + network_queue_clear(&card->queues[i]); + } + + free(card->queued_pkt.data); + free(card); + return NULL; + } + + timer_add(&card->timer, network_rx_queue, card, 0); + timer_on_auto(&card->timer, 0.762939453125 * 2.0); + + return card; } - -/* Stop the network timer. */ void -network_timer_stop(void) +netcard_close(netcard_t *card) { - if (network_timer_active) { - timer_stop(&network_rx_queue_timer); - memset(&network_rx_queue_timer, 0x00, sizeof(pc_timer_t)); - network_timer_active = 0; + timer_stop(&card->timer); + card->host_drv.close(card->host_drv.priv); + + thread_close_mutex(card->tx_mutex); + thread_close_mutex(card->rx_mutex); + for (int i=0; i<3; i++) { + network_queue_clear(&card->queues[i]); } + + free(card->queued_pkt.data); + free(card); } @@ -459,30 +448,11 @@ network_timer_stop(void) void network_close(void) { - network_timer_stop(); - - /* If already closed, do nothing. */ - if (network_mutex == NULL) return; - - /* Force-close the PCAP module. */ - net_pcap_close(); - - /* Force-close the SLIRP module. */ - net_slirp_close(); - - /* Close the network thread mutex. */ - thread_close_mutex(network_mutex); - network_mutex = NULL; - network_mac = NULL; #ifdef ENABLE_NETWORK_LOG thread_close_mutex(network_dump_mutex); network_dump_mutex = NULL; #endif - /* Here is where we clear the queues. */ - network_queue_clear(0); - network_queue_clear(1); - network_log("NETWORK: closed.\n"); } @@ -500,86 +470,52 @@ network_reset(void) { int i = -1; - network_log("NETWORK: reset (type=%d, card=%d)\n", - network_type, network_card); - ui_sb_update_icon(SB_NETWORK, 0); - /* Just in case.. */ - network_close(); - - /* If no active card, we're done. */ - if ((network_type==NET_TYPE_NONE) || (network_card==0)) return; - - network_mutex = thread_create_mutex(); #ifdef ENABLE_NETWORK_LOG network_dump_mutex = thread_create_mutex(); #endif - /* Initialize the platform module. */ - switch(network_type) { - case NET_TYPE_PCAP: - i = net_pcap_init(); - break; + for (i = 0; i < NET_CARD_MAX; i++) { + if (!net_cards_conf[i].device_num || net_cards_conf[i].net_type == NET_TYPE_NONE || + (net_cards_conf[i].net_type == NET_TYPE_PCAP && !strcmp(net_cards_conf[i].host_dev_name, "none"))) { + continue; + } - case NET_TYPE_SLIRP: - i = net_slirp_init(); - break; - } - - if (i < 0) { - /* Tell user we can't do this (at the moment.) */ - ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2093, (wchar_t *) IDS_2129); - - // FIXME: we should ask in the dialog if they want to - // reconfigure or quit, and throw them into the - // Settings dialog if yes. - - /* Disable network. */ - network_type = NET_TYPE_NONE; - - return; - } - - network_log("NETWORK: set up for %s, card='%s'\n", - (network_type==NET_TYPE_SLIRP)?"SLiRP":"Pcap", - net_cards[network_card].device->name); - - /* Add the (new?) card to the I/O system. */ - if (net_cards[network_card].device) { - network_log("NETWORK: adding device '%s'\n", - net_cards[network_card].device->name); - device_add(net_cards[network_card].device); + net_card_current = i; + device_add_inst(net_cards[net_cards_conf[i].device_num], i + 1); } } /* Queue a packet for transmission to one of the network providers. */ void -network_tx(uint8_t *bufp, int len) +network_tx(netcard_t *card, uint8_t *bufp, int len) { - ui_sb_update_icon(SB_NETWORK, 1); - - network_queue_put(2, NULL, bufp, len); - - ui_sb_update_icon(SB_NETWORK, 0); + network_queue_put(&card->queues[NET_QUEUE_TX_VM], bufp, len); } - -/* Actually transmit the packet. */ -int -network_tx_queue_check(void) +int network_tx_pop(netcard_t *card, netpkt_t *out_pkt) { - if ((first_pkt[1] == NULL) && (last_pkt[1] == NULL)) - return 0; + int ret = 0; - if (network_tx_pause) - return 1; + thread_wait_mutex(card->tx_mutex); + ret = network_queue_get(&card->queues[NET_QUEUE_TX_HOST], out_pkt); + thread_release_mutex(card->tx_mutex); - network_queue_transmit(1); - return 1; + return ret; } +int network_rx_put(netcard_t *card, uint8_t *bufp, int len) +{ + int ret = 0; + + thread_wait_mutex(card->rx_mutex); + ret = network_queue_put(&card->queues[NET_QUEUE_RX], bufp, len); + thread_release_mutex(card->rx_mutex); + + return ret; +} int network_dev_to_id(char *devname) @@ -601,9 +537,13 @@ network_dev_to_id(char *devname) int network_available(void) { - if ((network_type == NET_TYPE_NONE) || (network_card == 0)) return(0); + int available = 0; - return(1); + for (int i = 0; i < NET_CARD_MAX; i ++) { + available |= (net_cards_conf[i].device_num > 0) && (net_cards_conf[i].net_type != NET_TYPE_NONE); + } + + return available; } @@ -611,8 +551,8 @@ network_available(void) int network_card_available(int card) { - if (net_cards[card].device) - return(device_available(net_cards[card].device)); + if (net_cards[card]) + return(device_available(net_cards[card])); return(1); } @@ -622,7 +562,7 @@ network_card_available(int card) const device_t * network_card_getdevice(int card) { - return(net_cards[card].device); + return(net_cards[card]); } @@ -630,9 +570,9 @@ network_card_getdevice(int card) int network_card_has_config(int card) { - if (! net_cards[card].device) return(0); + if (!net_cards[card]) return(0); - return(device_has_config(net_cards[card].device) ? 1 : 0); + return(device_has_config(net_cards[card]) ? 1 : 0); } @@ -640,7 +580,7 @@ network_card_has_config(int card) char * network_card_get_internal_name(int card) { - return device_get_internal_name(net_cards[card].device); + return device_get_internal_name(net_cards[card]); } @@ -650,28 +590,11 @@ network_card_get_from_internal_name(char *s) { int c = 0; - while (net_cards[c].device != NULL) { - if (! strcmp((char *)net_cards[c].device->internal_name, s)) + while (net_cards[c] != NULL) { + if (! strcmp((char *)net_cards[c]->internal_name, s)) return(c); c++; } return 0; -} - - -void -network_set_wait(int wait) -{ - net_wait = wait; -} - - -int -network_get_wait(void) -{ - int ret; - - ret = net_wait; - return ret; -} +} \ No newline at end of file diff --git a/src/qt/qt_machinestatus.cpp b/src/qt/qt_machinestatus.cpp index 773566319..a6ea65fd3 100644 --- a/src/qt/qt_machinestatus.cpp +++ b/src/qt/qt_machinestatus.cpp @@ -37,6 +37,7 @@ extern uint64_t tsc; #include <86box/mo.h> #include <86box/plat.h> #include <86box/machine.h> +#include <86box/thread.h> #include <86box/network.h> #include <86box/ui.h> #include <86box/machine_status.h> diff --git a/src/qt/qt_settingsnetwork.cpp b/src/qt/qt_settingsnetwork.cpp index ec5ebbe53..7bf26b263 100644 --- a/src/qt/qt_settingsnetwork.cpp +++ b/src/qt/qt_settingsnetwork.cpp @@ -21,20 +21,29 @@ extern "C" { #include <86box/86box.h> #include <86box/device.h> #include <86box/machine.h> +#include <86box/timer.h> +#include <86box/thread.h> #include <86box/network.h> } #include "qt_models_common.hpp" #include "qt_deviceconfig.hpp" -static void enableElements(Ui::SettingsNetwork *ui) { - int netType = ui->comboBoxNetwork->currentData().toInt(); - ui->comboBoxPcap->setEnabled(netType == NET_TYPE_PCAP); +void SettingsNetwork::enableElements(Ui::SettingsNetwork *ui) { + for (int i = 0; i < NET_CARD_MAX; ++i) { + auto* nic_cbox = findChild(QString("comboBoxNIC%1").arg(i+1)); + auto* net_type_cbox = findChild(QString("comboBoxNet%1").arg(i+1)); + auto* intf_cbox = findChild(QString("comboBoxIntf%1").arg(i+1)); + auto* conf_btn = findChild(QString("pushButtonConf%1").arg(i+1)); - bool adaptersEnabled = netType == NET_TYPE_SLIRP || - (netType == NET_TYPE_PCAP && ui->comboBoxPcap->currentData().toInt() > 0); - ui->comboBoxAdapter->setEnabled(adaptersEnabled); - ui->pushButtonConfigure->setEnabled(adaptersEnabled && ui->comboBoxAdapter->currentIndex() > 0 && network_card_has_config(ui->comboBoxAdapter->currentData().toInt())); + int netType = net_type_cbox->currentData().toInt(); + bool adaptersEnabled = netType == NET_TYPE_SLIRP || + (netType == NET_TYPE_PCAP && intf_cbox->currentData().toInt() > 0); + + intf_cbox->setEnabled(net_type_cbox->currentData().toInt() == NET_TYPE_PCAP); + nic_cbox->setEnabled(adaptersEnabled); + conf_btn->setEnabled(adaptersEnabled && network_card_has_config(nic_cbox->currentData().toInt())); + } } SettingsNetwork::SettingsNetwork(QWidget *parent) : @@ -43,27 +52,16 @@ SettingsNetwork::SettingsNetwork(QWidget *parent) : { ui->setupUi(this); - auto* model = ui->comboBoxNetwork->model(); - Models::AddEntry(model, tr("None"), NET_TYPE_NONE); - Models::AddEntry(model, "PCap", NET_TYPE_PCAP); - Models::AddEntry(model, "SLiRP", NET_TYPE_SLIRP); - ui->comboBoxNetwork->setCurrentIndex(network_type); - - int selectedRow = 0; - model = ui->comboBoxPcap->model(); - QString currentPcapDevice = network_host; - for (int c = 0; c < network_ndev; c++) { - - Models::AddEntry(model, tr(network_devs[c].description), c); - if (QString(network_devs[c].device) == currentPcapDevice) { - selectedRow = c; - } - } - ui->comboBoxPcap->setCurrentIndex(-1); - ui->comboBoxPcap->setCurrentIndex(selectedRow); - onCurrentMachineChanged(machine); enableElements(ui); + for (int i = 0; i < NET_CARD_MAX; i++) { + auto* nic_cbox = findChild(QString("comboBoxNIC%1").arg(i+1)); + auto* net_type_cbox = findChild(QString("comboBoxNet%1").arg(i+1)); + auto* intf_cbox = findChild(QString("comboBoxIntf%1").arg(i+1)); + connect(nic_cbox, QOverload::of(&QComboBox::currentIndexChanged), this, &SettingsNetwork::on_comboIndexChanged); + connect(net_type_cbox, QOverload::of(&QComboBox::currentIndexChanged), this, &SettingsNetwork::on_comboIndexChanged); + connect(intf_cbox, QOverload::of(&QComboBox::currentIndexChanged), this, &SettingsNetwork::on_comboIndexChanged); + } } SettingsNetwork::~SettingsNetwork() @@ -72,41 +70,75 @@ SettingsNetwork::~SettingsNetwork() } void SettingsNetwork::save() { - network_type = ui->comboBoxNetwork->currentData().toInt(); - memset(network_host, '\0', sizeof(network_host)); - strcpy(network_host, network_devs[ui->comboBoxPcap->currentData().toInt()].device); - network_card = ui->comboBoxAdapter->currentData().toInt(); + for (int i = 0; i < NET_CARD_MAX; ++i) { + auto* cbox = findChild(QString("comboBoxNIC%1").arg(i+1)); + net_cards_conf[i].device_num = cbox->currentData().toInt(); + cbox = findChild(QString("comboBoxNet%1").arg(i+1)); + net_cards_conf[i].net_type = cbox->currentData().toInt(); + cbox = findChild(QString("comboBoxIntf%1").arg(i+1)); + memset(net_cards_conf[i].host_dev_name, '\0', sizeof(net_cards_conf[i].host_dev_name)); + strncpy(net_cards_conf[i].host_dev_name, network_devs[cbox->currentData().toInt()].device, sizeof(net_cards_conf[i].host_dev_name) - 1); + } } void SettingsNetwork::onCurrentMachineChanged(int machineId) { this->machineId = machineId; - auto* model = ui->comboBoxAdapter->model(); - auto removeRows = model->rowCount(); int c = 0; int selectedRow = 0; - while (true) { - auto name = DeviceConfig::DeviceName(network_card_getdevice(c), network_card_get_internal_name(c), 1); - if (name.isEmpty()) { - break; + + for (int i = 0; i < NET_CARD_MAX; ++i) { + auto* cbox = findChild(QString("comboBoxNIC%1").arg(i+1)); + auto *model = cbox->model(); + auto removeRows = model->rowCount(); + c = 0; + selectedRow = 0; + + while (true) { + auto name = DeviceConfig::DeviceName(network_card_getdevice(c), network_card_get_internal_name(c), 1); + if (name.isEmpty()) { + break; + } + + if (network_card_available(c) && device_is_valid(network_card_getdevice(c), machineId)) { + int row = Models::AddEntry(model, name, c); + if (c == net_cards_conf[i].device_num) { + selectedRow = row - removeRows; + } + } + c++; } - if (network_card_available(c) && device_is_valid(network_card_getdevice(c), machineId)) { - int row = Models::AddEntry(model, name, c); - if (c == network_card) { - selectedRow = row - removeRows; + model->removeRows(0, removeRows); + cbox->setEnabled(model->rowCount() > 0); + cbox->setCurrentIndex(-1); + cbox->setCurrentIndex(selectedRow); + + cbox = findChild(QString("comboBoxNet%1").arg(i+1)); + model = cbox->model(); + Models::AddEntry(model, tr("None"), NET_TYPE_NONE); + Models::AddEntry(model, "SLiRP", NET_TYPE_SLIRP); + if (network_ndev > 1) { + Models::AddEntry(model, "PCap", NET_TYPE_PCAP); + } + cbox->setCurrentIndex(net_cards_conf[i].net_type); + + selectedRow = 0; + + QString currentPcapDevice = net_cards_conf[i].host_dev_name; + cbox = findChild(QString("comboBoxIntf%1").arg(i+1)); + model = cbox->model(); + for (int c = 0; c < network_ndev; c++) { + Models::AddEntry(model, tr(network_devs[c].description), c); + if (QString(network_devs[c].device) == currentPcapDevice) { + selectedRow = c; } } - - c++; + cbox->setCurrentIndex(selectedRow); } - model->removeRows(0, removeRows); - ui->comboBoxAdapter->setEnabled(model->rowCount() > 0); - ui->comboBoxAdapter->setCurrentIndex(-1); - ui->comboBoxAdapter->setCurrentIndex(selectedRow); } -void SettingsNetwork::on_comboBoxNetwork_currentIndexChanged(int index) { +void SettingsNetwork::on_comboIndexChanged(int index) { if (index < 0) { return; } @@ -114,24 +146,18 @@ void SettingsNetwork::on_comboBoxNetwork_currentIndexChanged(int index) { enableElements(ui); } -void SettingsNetwork::on_comboBoxAdapter_currentIndexChanged(int index) { - if (index < 0) { - return; - } - - enableElements(ui); +void SettingsNetwork::on_pushButtonConf1_clicked() { + DeviceConfig::ConfigureDevice(network_card_getdevice(ui->comboBoxNIC1->currentData().toInt()), 0, qobject_cast(Settings::settings)); } -void SettingsNetwork::on_pushButtonConfigure_clicked() { - DeviceConfig::ConfigureDevice(network_card_getdevice(ui->comboBoxAdapter->currentData().toInt()), 0, qobject_cast(Settings::settings)); +void SettingsNetwork::on_pushButtonConf2_clicked() { + DeviceConfig::ConfigureDevice(network_card_getdevice(ui->comboBoxNIC2->currentData().toInt()), 0, qobject_cast(Settings::settings)); } - -void SettingsNetwork::on_comboBoxPcap_currentIndexChanged(int index) -{ - if (index < 0) { - return; - } - - enableElements(ui); +void SettingsNetwork::on_pushButtonConf3_clicked() { + DeviceConfig::ConfigureDevice(network_card_getdevice(ui->comboBoxNIC3->currentData().toInt()), 0, qobject_cast(Settings::settings)); +} + +void SettingsNetwork::on_pushButtonConf4_clicked() { + DeviceConfig::ConfigureDevice(network_card_getdevice(ui->comboBoxNIC4->currentData().toInt()), 0, qobject_cast(Settings::settings)); } diff --git a/src/qt/qt_settingsnetwork.hpp b/src/qt/qt_settingsnetwork.hpp index b473ee3df..55d983b5f 100644 --- a/src/qt/qt_settingsnetwork.hpp +++ b/src/qt/qt_settingsnetwork.hpp @@ -21,11 +21,13 @@ public slots: void onCurrentMachineChanged(int machineId); private slots: - void on_pushButtonConfigure_clicked(); - void on_comboBoxAdapter_currentIndexChanged(int index); - void on_comboBoxNetwork_currentIndexChanged(int index); + void on_pushButtonConf1_clicked(); + void on_pushButtonConf2_clicked(); + void on_pushButtonConf3_clicked(); + void on_pushButtonConf4_clicked(); + void on_comboIndexChanged(int index); - void on_comboBoxPcap_currentIndexChanged(int index); + void enableElements(Ui::SettingsNetwork *ui); private: Ui::SettingsNetwork *ui; diff --git a/src/qt/qt_settingsnetwork.ui b/src/qt/qt_settingsnetwork.ui index 751e3854d..763537c9e 100644 --- a/src/qt/qt_settingsnetwork.ui +++ b/src/qt/qt_settingsnetwork.ui @@ -6,14 +6,14 @@ 0 0 - 400 - 300 + 548 + 458 Form - + 0 @@ -26,7 +26,291 @@ 0 - + + + + Network Interface Contollers + + + + + + + 0 + 0 + + + + Adapter + + + + + + + + 0 + 0 + + + + + + + + + 0 + 0 + + + + + + + + + 0 + 0 + + + + Configure + + + + + + + + 0 + 0 + + + + + + + + + 0 + 0 + + + + Card 3: + + + + + + + + 0 + 0 + + + + QComboBox::AdjustToContents + + + + + + + + 0 + 0 + + + + Card 1: + + + + + + + + 0 + 0 + + + + Interface + + + + + + + + 0 + 0 + + + + QComboBox::AdjustToContents + + + + + + + + 0 + 0 + + + + Configure + + + + + + + + 0 + 0 + + + + QComboBox::AdjustToContents + + + + + + + + 0 + 0 + + + + + + + + + 0 + 0 + + + + Card 4: + + + + + + + + 0 + 0 + + + + Mode + + + + + + + + 0 + 0 + + + + Card 2: + + + + + + + + 0 + 0 + + + + + + + + + 0 + 0 + + + + + + + + + 0 + 0 + + + + Configure + + + + + + + + 0 + 0 + + + + Configure + + + + + + + + 0 + 0 + + + + + + + + + 0 + 0 + + + + + + + + + 0 + 0 + + + + QComboBox::AdjustToContents + + + + + + + Qt::Vertical @@ -39,57 +323,6 @@ - - - - PCap device: - - - - - - - Network type: - - - - - - - - 0 - 0 - - - - - - - - Network adapter: - - - - - - - Configure - - - - - - - - 0 - 0 - - - - - - - diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index e072adadc..7014d504c 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -664,7 +664,7 @@ NETOBJ := network.o \ net_dp8390.o \ net_3c503.o net_ne2000.o \ net_pcnet.o net_wd8003.o \ - net_plip.o + net_plip.o net_event.o PRINTOBJ := png.o prt_cpmap.o \ prt_escp.o prt_text.o prt_ps.o From d52bc438029807af548d6070037033c960aa7ca9 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sun, 21 Aug 2022 17:29:24 +0200 Subject: [PATCH 296/386] network: fix win32 build error --- src/win/Makefile.mingw | 6 +++--- src/win/win_settings.c | 1 + src/win/win_stbar.c | 1 + 3 files changed, 5 insertions(+), 3 deletions(-) diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 7014d504c..6d5fb92fe 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -778,12 +778,12 @@ OBJ += $(EXOBJ) endif ifeq ($(OPENAL), y) -LIBS := -mwindows -lopenal -lcomctl32 -lSDL2 -limagehlp -ldinput8 -ldxguid -ldxerr8 -luser32 -lgdi32 -lwinmm -limm32 -lole32 -loleaut32 -lshell32 -lversion -luuid +LIBS := -mwindows -lopenal -lcomctl32 -lSDL2 -limagehlp -ldinput8 -ldxguid -ldxerr8 -luser32 -lgdi32 -lwinmm -limm32 -lole32 -loleaut32 -lshell32 -lversion -luuid -lws2_32 else ifeq ($(FAUDIO), y) -LIBS := -mwindows -lfaudio -lcomctl32 -lSDL2 -limagehlp -ldinput8 -ldxguid -ldxerr8 -luser32 -lgdi32 -lwinmm -limm32 -lole32 -loleaut32 -lshell32 -lversion -luuid +LIBS := -mwindows -lfaudio -lcomctl32 -lSDL2 -limagehlp -ldinput8 -ldxguid -ldxerr8 -luser32 -lgdi32 -lwinmm -limm32 -lole32 -loleaut32 -lshell32 -lversion -luuid -lws2_32 else -LIBS := -mwindows -lcomctl32 -lSDL2 -limagehlp -ldinput8 -ldxguid -ldxerr8 -luser32 -lgdi32 -lwinmm -limm32 -lole32 -loleaut32 -lshell32 -lversion -luuid +LIBS := -mwindows -lcomctl32 -lSDL2 -limagehlp -ldinput8 -ldxguid -ldxerr8 -luser32 -lgdi32 -lwinmm -limm32 -lole32 -loleaut32 -lshell32 -lversion -luuid -lws2_32 endif endif diff --git a/src/win/win_settings.c b/src/win/win_settings.c index d6780a8bc..91dce4547 100644 --- a/src/win/win_settings.c +++ b/src/win/win_settings.c @@ -60,6 +60,7 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/fdc_ext.h> +#include <86box/thread.h> #include <86box/network.h> #include <86box/sound.h> #include <86box/midi.h> diff --git a/src/win/win_stbar.c b/src/win/win_stbar.c index a71587017..6178b73ce 100644 --- a/src/win/win_stbar.c +++ b/src/win/win_stbar.c @@ -47,6 +47,7 @@ #include <86box/mo.h> #include <86box/cdrom_image.h> #include <86box/scsi_disk.h> +#include <86box/thread.h> #include <86box/network.h> #include <86box/video.h> #include <86box/sound.h> From bf87193f912cfd63346ef9db056e18b11a4a51b4 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sun, 21 Aug 2022 17:39:40 +0200 Subject: [PATCH 297/386] network: fix another win32 build error --- src/network/net_slirp.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/network/net_slirp.c b/src/network/net_slirp.c index 90812d17e..a74d06173 100644 --- a/src/network/net_slirp.c +++ b/src/network/net_slirp.c @@ -26,8 +26,6 @@ #include #include #include -#include -#include #include #define HAVE_STDARG_H #include <86box/86box.h> From 552ea55a92aa06d763cabe507c2323b933e0a8d9 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sun, 21 Aug 2022 19:48:00 +0200 Subject: [PATCH 298/386] network: always link to ws2_32 on win32 --- src/network/CMakeLists.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/network/CMakeLists.txt b/src/network/CMakeLists.txt index ffd5d03a7..50f07612b 100644 --- a/src/network/CMakeLists.txt +++ b/src/network/CMakeLists.txt @@ -35,3 +35,7 @@ endif() if (HAIKU) target_link_libraries(86Box network) endif() + +if(WIN32) + target_link_libraries(86Box ws2_32) +endif() From 2f57de3f6056631af026a2eea5c0b505467c8a94 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sun, 21 Aug 2022 21:05:07 +0200 Subject: [PATCH 299/386] Restore the ability to configure the first NIC with the win32 ui --- src/include/86box/86box.h | 3 --- src/network/network.c | 3 --- src/win/win_settings.c | 26 +++++++++++++------------- 3 files changed, 13 insertions(+), 19 deletions(-) diff --git a/src/include/86box/86box.h b/src/include/86box/86box.h index 30a7542dc..28c370e78 100644 --- a/src/include/86box/86box.h +++ b/src/include/86box/86box.h @@ -122,9 +122,6 @@ extern int cpu, /* (C) cpu type */ cpu_use_dynarec, /* (C) cpu uses/needs Dyna */ fpu_type; /* (C) fpu type */ extern int time_sync; /* (C) enable time sync */ -extern int network_type; /* (C) net provider type */ -extern int network_card; /* (C) net interface num */ -extern char network_host[522]; /* (C) host network intf */ extern int hdd_format_type; /* (C) hard disk file format */ extern int confirm_reset, /* (C) enable reset confirmation */ confirm_exit, /* (C) enable exit confirmation */ diff --git a/src/network/network.c b/src/network/network.c index 714037b4c..5ea866c01 100644 --- a/src/network/network.c +++ b/src/network/network.c @@ -121,10 +121,7 @@ netcard_conf_t net_cards_conf[NET_CARD_MAX]; int net_card_current = 0; /* Global variables. */ -int network_type; int network_ndev; -int network_card; -char network_host[522]; netdev_t network_devs[32]; diff --git a/src/win/win_settings.c b/src/win/win_settings.c index 91dce4547..365532ead 100644 --- a/src/win/win_settings.c +++ b/src/win/win_settings.c @@ -99,7 +99,7 @@ static int temp_float, temp_fm_driver; /* Network category */ static int temp_net_type, temp_net_card; -static char temp_pcap_dev[522]; +static char temp_pcap_dev[128]; /* Ports category */ static int temp_lpt_devices[PARALLEL_MAX]; @@ -340,13 +340,13 @@ win_settings_init(void) temp_fm_driver = fm_driver; /* Network category */ - temp_net_type = network_type; + temp_net_type = net_cards_conf[0].net_type; memset(temp_pcap_dev, 0, sizeof(temp_pcap_dev)); #ifdef ENABLE_SETTINGS_LOG - assert(sizeof(temp_pcap_dev) == sizeof(network_host)); + assert(sizeof(temp_pcap_dev) == sizeof(net_cards_conf[0].host_dev_name)); #endif - memcpy(temp_pcap_dev, network_host, sizeof(network_host)); - temp_net_card = network_card; + memcpy(temp_pcap_dev, net_cards_conf[0].host_dev_name, sizeof(net_cards_conf[0].host_dev_name)); + temp_net_card = net_cards_conf[0].device_num; /* Ports category */ for (i = 0; i < PARALLEL_MAX; i++) { @@ -466,9 +466,9 @@ win_settings_changed(void) i = i || (fm_driver != temp_fm_driver); /* Network category */ - i = i || (network_type != temp_net_type); - i = i || strcmp(temp_pcap_dev, network_host); - i = i || (network_card != temp_net_card); + i = i || (net_cards_conf[i].net_type != temp_net_type); + i = i || strcmp(temp_pcap_dev, net_cards_conf[0].host_dev_name); + i = i || (net_cards_conf[0].device_num != temp_net_card); /* Ports category */ for (j = 0; j < PARALLEL_MAX; j++) { @@ -558,10 +558,10 @@ win_settings_save(void) fm_driver = temp_fm_driver; /* Network category */ - network_type = temp_net_type; - memset(network_host, '\0', sizeof(network_host)); - strcpy(network_host, temp_pcap_dev); - network_card = temp_net_card; + net_cards_conf[i].net_type = temp_net_type; + memset(net_cards_conf[0].host_dev_name, '\0', sizeof(net_cards_conf[0].host_dev_name)); + strcpy(net_cards_conf[0].host_dev_name, temp_pcap_dev); + net_cards_conf[0].device_num = temp_net_card; /* Ports category */ for (i = 0; i < PARALLEL_MAX; i++) { @@ -1814,8 +1814,8 @@ win_settings_network_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) lptsTemp = (LPTSTR) malloc(512 * sizeof(WCHAR)); settings_add_string(hdlg, IDC_COMBO_NET_TYPE, (LPARAM) L"None"); - settings_add_string(hdlg, IDC_COMBO_NET_TYPE, (LPARAM) L"PCap"); settings_add_string(hdlg, IDC_COMBO_NET_TYPE, (LPARAM) L"SLiRP"); + settings_add_string(hdlg, IDC_COMBO_NET_TYPE, (LPARAM) L"PCap"); settings_set_cur_sel(hdlg, IDC_COMBO_NET_TYPE, temp_net_type); settings_enable_window(hdlg, IDC_COMBO_PCAP, temp_net_type == NET_TYPE_PCAP); From 2a4df321641d1c1023e687f265ae63a402022df2 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 17 Aug 2022 17:06:44 -0400 Subject: [PATCH 300/386] Correct BCM GT694VA --- src/machine/machine_table.c | 76 ++++++++++++++++++------------------- 1 file changed, 38 insertions(+), 38 deletions(-) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 4a41b6ef1..ef1c2a566 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -11080,6 +11080,44 @@ const machine_t machines[] = { .snd_device = NULL, .net_device = NULL }, + /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC + firmware. */ + { + .name = "[VIA Apollo Pro 133A] BCM GT694VA", + .internal_name = "gt694va", + .type = MACHINE_TYPE_SLOT1, + .chipset = MACHINE_CHIPSET_VIA_APOLLO_PRO_133A, + .init = machine_at_gt694va_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SLOT1, + .block = CPU_BLOCK_NONE, + .min_bus = 66666667, + .max_bus = 133333333, + .min_voltage = 1300, + .max_voltage = 3500, + .min_multi = 1.5, + .max_multi = 8.0 + }, + .bus_flags = MACHINE_PS2_AGP, + .flags = MACHINE_IDE_DUAL | MACHINE_SOUND, + .ram = { + .min = 8192, + .max = 3145728, + .step = 8192 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = &es1371_onboard_device, + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL + }, /* Slot 1/2 machines */ /* 440GX */ @@ -11632,44 +11670,6 @@ const machine_t machines[] = { .snd_device = NULL, .net_device = NULL }, - /* Has a Winbond W83977EF Super I/O chip with on-chip KBC with AMIKey-2 KBC - firmware. */ - { - .name = "[VIA Apollo Pro 133A] BCM GT694VA", - .internal_name = "gt694va", - .type = MACHINE_TYPE_SOCKET370, - .chipset = MACHINE_CHIPSET_VIA_APOLLO_PRO_133A, - .init = machine_at_gt694va_init, - .pad = 0, - .pad0 = 0, - .pad1 = MACHINE_AVAILABLE, - .pad2 = 0, - .cpu = { - .package = CPU_PKG_SOCKET370, - .block = CPU_BLOCK_NONE, - .min_bus = 66666667, - .max_bus = 133333333, - .min_voltage = 1300, - .max_voltage = 3500, - .min_multi = 1.5, - .max_multi = 8.0 - }, - .bus_flags = MACHINE_PS2_AGP, - .flags = MACHINE_IDE_DUAL | MACHINE_SOUND, - .ram = { - .min = 16384, - .max = 3145728, - .step = 8192 - }, - .nvrmask = 255, - .kbc = KBC_UNKNOWN, - .kbc_p1 = 0, - .gpio = 0, - .device = &es1371_onboard_device, - .vid_device = NULL, - .snd_device = NULL, - .net_device = NULL - }, /* Miscellaneous/Fake/Hypervisor machines */ /* Has a Winbond W83977F Super I/O chip with on-chip KBC with AMIKey-2 KBC From 8ec983b1ef362030c891d3c043a43ca4310f727f Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Thu, 25 Aug 2022 00:43:48 +0200 Subject: [PATCH 301/386] pcap: do bounds checking in net_pcap_prepare when processing the list of host interfaces --- src/include/86box/network.h | 3 ++- src/network/net_pcap.c | 3 +++ src/network/network.c | 2 +- 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/src/include/86box/network.h b/src/include/86box/network.h index f38db801a..967c581b1 100644 --- a/src/include/86box/network.h +++ b/src/include/86box/network.h @@ -58,6 +58,7 @@ #define NET_MAX_FRAME 1518 #define NET_QUEUE_LEN 8 #define NET_CARD_MAX 4 +#define NET_HOST_INTF_MAX 64 /* Supported network cards. */ enum { @@ -141,7 +142,7 @@ extern "C" { /* Global variables. */ extern int nic_do_log; /* config */ extern int network_ndev; -extern netdev_t network_devs[32]; +extern netdev_t network_devs[NET_HOST_INTF_MAX]; /* Function prototypes. */ diff --git a/src/network/net_pcap.c b/src/network/net_pcap.c index d695d4992..0baa16186 100644 --- a/src/network/net_pcap.c +++ b/src/network/net_pcap.c @@ -354,6 +354,9 @@ net_pcap_prepare(netdev_t *list) } for (dev=devlist; dev!=NULL; dev=dev->next) { + if (i >= (NET_HOST_INTF_MAX - 1)) + break; + /** * we initialize the strings to NULL first for strncpy */ diff --git a/src/network/network.c b/src/network/network.c index 5ea866c01..58ff2516d 100644 --- a/src/network/network.c +++ b/src/network/network.c @@ -122,7 +122,7 @@ int net_card_current = 0; /* Global variables. */ int network_ndev; -netdev_t network_devs[32]; +netdev_t network_devs[NET_HOST_INTF_MAX]; /* Local variables. */ From 06ec705098458d1f71addb77dcb0bb1ee9b7f5bc Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Thu, 25 Aug 2022 22:25:11 +0200 Subject: [PATCH 302/386] qt: fix duplicate entries in network settings --- src/qt/qt_settingsnetwork.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/qt/qt_settingsnetwork.cpp b/src/qt/qt_settingsnetwork.cpp index 7bf26b263..8c4c82904 100644 --- a/src/qt/qt_settingsnetwork.cpp +++ b/src/qt/qt_settingsnetwork.cpp @@ -116,11 +116,13 @@ void SettingsNetwork::onCurrentMachineChanged(int machineId) { cbox = findChild(QString("comboBoxNet%1").arg(i+1)); model = cbox->model(); + removeRows = model->rowCount(); Models::AddEntry(model, tr("None"), NET_TYPE_NONE); Models::AddEntry(model, "SLiRP", NET_TYPE_SLIRP); if (network_ndev > 1) { Models::AddEntry(model, "PCap", NET_TYPE_PCAP); } + model->removeRows(0, removeRows); cbox->setCurrentIndex(net_cards_conf[i].net_type); selectedRow = 0; @@ -128,12 +130,14 @@ void SettingsNetwork::onCurrentMachineChanged(int machineId) { QString currentPcapDevice = net_cards_conf[i].host_dev_name; cbox = findChild(QString("comboBoxIntf%1").arg(i+1)); model = cbox->model(); + removeRows = model->rowCount(); for (int c = 0; c < network_ndev; c++) { Models::AddEntry(model, tr(network_devs[c].description), c); if (QString(network_devs[c].device) == currentPcapDevice) { selectedRow = c; } } + model->removeRows(0, removeRows); cbox->setCurrentIndex(selectedRow); } } From 9ad587dbfd8735f62d6a0a6162f15e7f0255ed79 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Thu, 25 Aug 2022 23:53:09 +0200 Subject: [PATCH 303/386] qt: fix instance number not set when editing nic config --- src/qt/qt_settingsnetwork.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/qt/qt_settingsnetwork.cpp b/src/qt/qt_settingsnetwork.cpp index 8c4c82904..1cb42cc22 100644 --- a/src/qt/qt_settingsnetwork.cpp +++ b/src/qt/qt_settingsnetwork.cpp @@ -151,17 +151,17 @@ void SettingsNetwork::on_comboIndexChanged(int index) { } void SettingsNetwork::on_pushButtonConf1_clicked() { - DeviceConfig::ConfigureDevice(network_card_getdevice(ui->comboBoxNIC1->currentData().toInt()), 0, qobject_cast(Settings::settings)); + DeviceConfig::ConfigureDevice(network_card_getdevice(ui->comboBoxNIC1->currentData().toInt()), 1, qobject_cast(Settings::settings)); } void SettingsNetwork::on_pushButtonConf2_clicked() { - DeviceConfig::ConfigureDevice(network_card_getdevice(ui->comboBoxNIC2->currentData().toInt()), 0, qobject_cast(Settings::settings)); + DeviceConfig::ConfigureDevice(network_card_getdevice(ui->comboBoxNIC2->currentData().toInt()), 2, qobject_cast(Settings::settings)); } void SettingsNetwork::on_pushButtonConf3_clicked() { - DeviceConfig::ConfigureDevice(network_card_getdevice(ui->comboBoxNIC3->currentData().toInt()), 0, qobject_cast(Settings::settings)); + DeviceConfig::ConfigureDevice(network_card_getdevice(ui->comboBoxNIC3->currentData().toInt()), 3, qobject_cast(Settings::settings)); } void SettingsNetwork::on_pushButtonConf4_clicked() { - DeviceConfig::ConfigureDevice(network_card_getdevice(ui->comboBoxNIC4->currentData().toInt()), 0, qobject_cast(Settings::settings)); + DeviceConfig::ConfigureDevice(network_card_getdevice(ui->comboBoxNIC4->currentData().toInt()), 4, qobject_cast(Settings::settings)); } From 448bd9d958294c5ac8b9529f0d9fd63f5042b61e Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Fri, 26 Aug 2022 18:22:19 +0200 Subject: [PATCH 304/386] slirp: fix port forwarding and handle configuration with multiple nics --- src/include/86box/network.h | 1 + src/network/net_slirp.c | 5 +++-- src/network/network.c | 1 + 3 files changed, 5 insertions(+), 2 deletions(-) diff --git a/src/include/86box/network.h b/src/include/86box/network.h index 967c581b1..2fe0553f8 100644 --- a/src/include/86box/network.h +++ b/src/include/86box/network.h @@ -127,6 +127,7 @@ struct _netcard_t { mutex_t *tx_mutex; mutex_t *rx_mutex; pc_timer_t timer; + int card_num; }; typedef struct { diff --git a/src/network/net_slirp.c b/src/network/net_slirp.c index a74d06173..7535a0609 100644 --- a/src/network/net_slirp.c +++ b/src/network/net_slirp.c @@ -415,7 +415,7 @@ net_slirp_init(const netcard_t *card, const uint8_t *mac_addr, void *priv) struct in_addr host = { .s_addr = htonl(0x0a000002 | (slirp_card_num << 8)) }; /* 10.0.x.2 */ struct in_addr dhcp = { .s_addr = htonl(0x0a00000f | (slirp_card_num << 8)) }; /* 10.0.x.15 */ struct in_addr dns = { .s_addr = htonl(0x0a000003 | (slirp_card_num << 8)) }; /* 10.0.x.3 */ - struct in_addr bind = { .s_addr = htonl(0x00000000 | (slirp_card_num << 8)) }; /* 0.0.0.0 */ + struct in_addr bind = { .s_addr = htonl(0x00000000) }; /* 0.0.0.0 */ struct in6_addr ipv6_dummy = { 0 }; /* contents don't matter; we're not using IPv6 */ /* Initialize SLiRP. */ @@ -428,7 +428,8 @@ net_slirp_init(const netcard_t *card, const uint8_t *mac_addr, void *priv) /* Set up port forwarding. */ int udp, external, internal, i = 0; - char *category = "SLiRP Port Forwarding"; + char category[32]; + snprintf(category, sizeof(category), "SLiRP Port Forwarding #%i", card->card_num + 1); char key[20]; while (1) { sprintf(key, "%d_protocol", i); diff --git a/src/network/network.c b/src/network/network.c index 58ff2516d..a406140c4 100644 --- a/src/network/network.c +++ b/src/network/network.c @@ -388,6 +388,7 @@ network_attach(void *card_drv, uint8_t *mac, NETRXCB rx, NETWAITCB wait, NETSETL card->set_link_state = set_link_state; card->tx_mutex = thread_create_mutex(); card->rx_mutex = thread_create_mutex(); + card->card_num = net_card_current; for (int i=0; i<3; i++) { network_queue_init(&card->queues[i]); From 147c27b96ef54fda0dac1df91bbf273618424811 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sat, 27 Aug 2022 01:51:56 +0600 Subject: [PATCH 305/386] voodoo_codegen_x86*: Remove bounds checking for block_pos Block sizes are sufficiently large enough to ensure no buffer overrun as block_pos is initialized to 0 every time a block is requested. It should cause a good performance increase on x86 and x86-64. --- src/include/86box/vid_voodoo_codegen_x86-64.h | 8 -------- src/include/86box/vid_voodoo_codegen_x86.h | 8 -------- 2 files changed, 16 deletions(-) diff --git a/src/include/86box/vid_voodoo_codegen_x86-64.h b/src/include/86box/vid_voodoo_codegen_x86-64.h index bd992e1d0..4999f38c5 100644 --- a/src/include/86box/vid_voodoo_codegen_x86-64.h +++ b/src/include/86box/vid_voodoo_codegen_x86-64.h @@ -46,32 +46,24 @@ static int next_block_to_write[4] = { 0, 0 }; #define addbyte(val) \ do { \ code_block[block_pos++] = val; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ } while (0) #define addword(val) \ do { \ *(uint16_t *) &code_block[block_pos] = val; \ block_pos += 2; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ } while (0) #define addlong(val) \ do { \ *(uint32_t *) &code_block[block_pos] = val; \ block_pos += 4; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ } while (0) #define addquad(val) \ do { \ *(uint64_t *) &code_block[block_pos] = val; \ block_pos += 8; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ } while (0) static __m128i xmm_01_w; // = 0x0001000100010001ull; diff --git a/src/include/86box/vid_voodoo_codegen_x86.h b/src/include/86box/vid_voodoo_codegen_x86.h index f9685344f..9432fa3b3 100644 --- a/src/include/86box/vid_voodoo_codegen_x86.h +++ b/src/include/86box/vid_voodoo_codegen_x86.h @@ -44,32 +44,24 @@ static int next_block_to_write[4] = { 0, 0 }; #define addbyte(val) \ do { \ code_block[block_pos++] = val; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ } while (0) #define addword(val) \ do { \ *(uint16_t *) &code_block[block_pos] = val; \ block_pos += 2; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ } while (0) #define addlong(val) \ do { \ *(uint32_t *) &code_block[block_pos] = val; \ block_pos += 4; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ } while (0) #define addquad(val) \ do { \ *(uint64_t *) &code_block[block_pos] = val; \ block_pos += 8; \ - if (block_pos >= BLOCK_SIZE) \ - fatal("Over!\n"); \ } while (0) static __m128i xmm_01_w; // = 0x0001000100010001ull; From 4efd1d90c2892e6636c572262ec226d41d3f5f0b Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Sat, 27 Aug 2022 10:47:55 -0400 Subject: [PATCH 306/386] macos: Add RPATH to the installed binary to enable dynamic loading of bundled libraries. --- src/qt/CMakeLists.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/qt/CMakeLists.txt b/src/qt/CMakeLists.txt index 0cb4560c4..1db01301d 100644 --- a/src/qt/CMakeLists.txt +++ b/src/qt/CMakeLists.txt @@ -309,7 +309,11 @@ if (APPLE AND CMAKE_MACOSX_BUNDLE) install(CODE " include(BundleUtilities) get_filename_component(CMAKE_INSTALL_PREFIX_ABSOLUTE \$ENV{DESTDIR}\${CMAKE_INSTALL_PREFIX} ABSOLUTE) - fixup_bundle(\"\${CMAKE_INSTALL_PREFIX_ABSOLUTE}/86Box.app\" \"${QT_PLUGINS}\" \"${DIRS}\")") + fixup_bundle(\"\${CMAKE_INSTALL_PREFIX_ABSOLUTE}/86Box.app\" \"${QT_PLUGINS}\" \"${DIRS}\") + execute_process( + COMMAND ${CMAKE_INSTALL_NAME_TOOL} -add_rpath \"@executable_path/../Frameworks/\" + \"\${CMAKE_INSTALL_PREFIX_ABSOLUTE}/${INSTALL_RUNTIME_DIR}/86Box\") + ") endif() if (UNIX AND NOT APPLE AND NOT HAIKU) From 9c65d20621d360bd5bc6331507c9269c1087293b Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sat, 27 Aug 2022 16:52:33 +0200 Subject: [PATCH 307/386] network: improve throughput by batch processing packets --- src/include/86box/network.h | 8 ++- src/network/net_pcap.c | 74 +++++++++++++++---- src/network/net_slirp.c | 36 +++++----- src/network/network.c | 140 ++++++++++++++++++++++++------------ 4 files changed, 176 insertions(+), 82 deletions(-) diff --git a/src/include/86box/network.h b/src/include/86box/network.h index 2fe0553f8..54181ae8e 100644 --- a/src/include/86box/network.h +++ b/src/include/86box/network.h @@ -56,7 +56,9 @@ #define NET_TYPE_PCAP 2 /* use the (Win)Pcap API */ #define NET_MAX_FRAME 1518 -#define NET_QUEUE_LEN 8 +/* Queue size must be a power of 2 */ +#define NET_QUEUE_LEN 16 +#define NET_QUEUE_LEN_MASK (NET_QUEUE_LEN - 1) #define NET_CARD_MAX 4 #define NET_HOST_INTF_MAX 64 @@ -92,12 +94,10 @@ typedef int (*NETSETLINKSTATE)(void *); typedef struct netpkt { uint8_t *data; int len; - uint64_t tsc; } netpkt_t; typedef struct { netpkt_t packets[NET_QUEUE_LEN]; - int size; int head; int tail; } netqueue_t; @@ -165,7 +165,9 @@ extern int network_card_get_from_internal_name(char *); extern const device_t *network_card_getdevice(int); extern int network_tx_pop(netcard_t *card, netpkt_t *out_pkt); +extern int network_tx_popv(netcard_t *card, netpkt_t *pkt_vec, int vec_size); extern int network_rx_put(netcard_t *card, uint8_t *bufp, int len); +extern int network_rx_put_pkt(netcard_t *card, netpkt_t *pkt); #ifdef __cplusplus } #endif diff --git a/src/network/net_pcap.c b/src/network/net_pcap.c index 0baa16186..9aa486316 100644 --- a/src/network/net_pcap.c +++ b/src/network/net_pcap.c @@ -72,6 +72,8 @@ #include <86box/network.h> #include <86box/net_event.h> +#define PCAP_PKT_BATCH NET_QUEUE_LEN + enum { NET_EVENT_STOP = 0, NET_EVENT_TX, @@ -120,6 +122,17 @@ struct pcap_if { void *addresses; bpf_u_int32 flags; }; + +struct pcap_send_queue { + u_int maxlen; /* Maximum size of the queue, in bytes. This + variable contains the size of the buffer field. */ + u_int len; /* Current size of the queue, in bytes. */ + char *buffer; /* Buffer containing the packets to be sent. */ +}; + +typedef struct pcap_send_queue pcap_send_queue; + +typedef void (*pcap_handler)(u_char *user, const struct pcap_pkthdr *h, const u_char *bytes); #endif typedef struct { @@ -129,7 +142,11 @@ typedef struct { net_evt_t tx_event; net_evt_t stop_event; netpkt_t pkt; + netpkt_t pktv[PCAP_PKT_BATCH]; uint8_t mac_addr[6]; +#ifdef _WIN32 + struct pcap_send_queue *pcap_queue; +#endif } net_pcap_t; typedef struct { @@ -154,11 +171,16 @@ static int (*f_pcap_setnonblock)(void*, int, char*); static int (*f_pcap_set_immediate_mode)(void *, int); static int (*f_pcap_set_promisc)(void *, int); static int (*f_pcap_set_snaplen)(void *, int); +static int (*f_pcap_dispatch)(void *, int, pcap_handler callback, u_char *user); static void *(*f_pcap_create)(const char *, char*); static int (*f_pcap_activate)(void *); static void *(*f_pcap_geterr)(void *); #ifdef _WIN32 static HANDLE (*f_pcap_getevent)(void *); +static int (*f_pcap_sendqueue_queue)(void *, void *, void *); +static u_int (*f_pcap_sendqueue_transmit)(void *, void *, int sync); +static void *(*f_pcap_sendqueue_alloc)(u_int memsize); +static void (*f_pcap_sendqueue_destroy)(void *); #else static int (*f_pcap_get_selectable_fd)(void *); #endif @@ -177,13 +199,18 @@ static dllimp_t pcap_imports[] = { { "pcap_set_immediate_mode", &f_pcap_set_immediate_mode}, { "pcap_set_promisc", &f_pcap_set_promisc }, { "pcap_set_snaplen", &f_pcap_set_snaplen }, + { "pcap_dispatch", &f_pcap_dispatch }, { "pcap_create", &f_pcap_create }, { "pcap_activate", &f_pcap_activate }, { "pcap_geterr", &f_pcap_geterr }, #ifdef _WIN32 { "pcap_getevent", &f_pcap_getevent }, + { "pcap_sendqueue_queue", &f_pcap_sendqueue_queue }, + { "pcap_sendqueue_transmit", &f_pcap_sendqueue_transmit}, + { "pcap_sendqueue_alloc", &f_pcap_sendqueue_alloc }, + { "pcap_sendqueue_destroy", &f_pcap_sendqueue_destroy }, #else - { "pcap_get_selectable_fd", &f_pcap_get_selectable_fd }, + { "pcap_get_selectable_fd", &f_pcap_get_selectable_fd }, #endif { NULL, NULL }, }; @@ -208,15 +235,12 @@ pcap_log(const char *fmt, ...) static void -net_pcap_read_packet(net_pcap_t *pcap) +net_pcap_rx_handler(uint8_t *user, const struct pcap_pkthdr *h, const uint8_t *bytes) { - struct pcap_pkthdr h; - - uint8_t *data = (uint8_t *) f_pcap_next((void *) pcap->pcap, &h); - if (!data) - return; - - network_rx_put(pcap->card, data, h.caplen); + net_pcap_t *pcap = (net_pcap_t*)user; + memcpy(pcap->pkt.data, bytes, h->caplen); + pcap->pkt.len = h->caplen; + network_rx_put_pkt(pcap->card, &pcap->pkt); } /* Send a packet to the Pcap interface. */ @@ -251,6 +275,7 @@ net_pcap_thread(void *priv) bool run = true; + struct pcap_pkthdr h; while (run) { int ret = WaitForMultipleObjects(NET_EVENT_MAX, events, FALSE, INFINITE); @@ -262,13 +287,17 @@ net_pcap_thread(void *priv) case NET_EVENT_TX: net_event_clear(&pcap->tx_event); - while (network_tx_pop(pcap->card, &pcap->pkt)) { - net_pcap_in(pcap->pcap, pcap->pkt.data, pcap->pkt.len); + int packets = network_tx_popv(pcap->card, pcap->pktv, PCAP_PKT_BATCH); + for (int i = 0; i < packets; i++) { + h.caplen = pcap->pktv[i].len; + f_pcap_sendqueue_queue(pcap->pcap_queue, &h, pcap->pktv[i].data); } + f_pcap_sendqueue_transmit(pcap->pcap, pcap->pcap_queue, 0); + pcap->pcap_queue->len = 0; break; case NET_EVENT_RX: - net_pcap_read_packet(pcap); + f_pcap_dispatch(pcap->pcap, PCAP_PKT_BATCH, net_pcap_rx_handler, (u_char *)pcap); break; } } @@ -305,13 +334,14 @@ net_pcap_thread(void *priv) if (pfd[NET_EVENT_TX].revents & POLLIN) { net_event_clear(&pcap->tx_event); - if (network_tx_pop(pcap->card, &pcap->pkt)) { - net_pcap_in(pcap->pcap, pcap->pkt.data, pcap->pkt.len); + int packets = network_tx_popv(pcap->card, pcap->pktv, PCAP_PKT_BATCH); + for (int i = 0; i < packets; i++) { + net_pcap_in(pcap->pcap, pcap->pktv[i].data, pcap->pktv[i].len); } } if (pfd[NET_EVENT_RX].revents & POLLIN) { - net_pcap_read_packet(pcap); + f_pcap_dispatch(pcap->pcap, PCAP_PKT_BATCH, net_pcap_rx_handler, (u_char *)pcap); } } @@ -470,7 +500,15 @@ net_pcap_init(const netcard_t *card, const uint8_t *mac_addr, void *priv) return NULL; } +#ifdef _WIN32 + pcap->pcap_queue = f_pcap_sendqueue_alloc(PCAP_PKT_BATCH * NET_MAX_FRAME); +#endif + + for (int i = 0; i < PCAP_PKT_BATCH; i++) { + pcap->pktv[i].data = calloc(1, NET_MAX_FRAME); + } pcap->pkt.data = calloc(1, NET_MAX_FRAME); + net_event_init(&pcap->tx_event); net_event_init(&pcap->stop_event); pcap->poll_tid = thread_create(net_pcap_thread, pcap); @@ -497,8 +535,14 @@ net_pcap_close(void *priv) thread_wait(pcap->poll_tid); pcap_log("PCAP: thread ended\n"); + for (int i = 0; i < PCAP_PKT_BATCH; i++) { + free(pcap->pktv[i].data); + } free(pcap->pkt.data); +#ifdef _WIN32 + f_pcap_sendqueue_destroy((void*)pcap->pcap_queue); +#endif /* OK, now shut down Pcap itself. */ f_pcap_close((void*)pcap->pcap); diff --git a/src/network/net_slirp.c b/src/network/net_slirp.c index 7535a0609..46b913416 100644 --- a/src/network/net_slirp.c +++ b/src/network/net_slirp.c @@ -45,6 +45,8 @@ #endif #include <86box/net_event.h> +#define SLIRP_PKT_BATCH NET_QUEUE_LEN + enum { NET_EVENT_STOP = 0, NET_EVENT_TX, @@ -60,6 +62,7 @@ typedef struct { net_evt_t tx_event; net_evt_t stop_event; netpkt_t pkt; + netpkt_t pkt_tx_v[SLIRP_PKT_BATCH]; #ifdef _WIN32 HANDLE sock_event; #else @@ -153,22 +156,12 @@ ssize_t net_slirp_send_packet(const void *qp, size_t pkt_len, void *opaque) { net_slirp_t *slirp = (net_slirp_t *) opaque; - uint8_t *mac = slirp->mac_addr; - uint32_t mac_cmp32[2]; - uint16_t mac_cmp16[2]; slirp_log("SLiRP: received %d-byte packet\n", pkt_len); - /* Received MAC. */ - mac_cmp32[0] = *(uint32_t *) (((uint8_t *) qp) + 6); - mac_cmp16[0] = *(uint16_t *) (((uint8_t *) qp) + 10); - - /* Local MAC. */ - mac_cmp32[1] = *(uint32_t *) mac; - mac_cmp16[1] = *(uint16_t *) (mac + 4); - if ((mac_cmp32[0] != mac_cmp32[1]) || (mac_cmp16[0] != mac_cmp16[1])) { - network_rx_put(slirp->card, (uint8_t *) qp, pkt_len); - } + memcpy(slirp->pkt.data, (uint8_t*) qp, pkt_len); + slirp->pkt.len = pkt_len; + network_rx_put_pkt(slirp->card, &slirp->pkt); return pkt_len; } @@ -336,8 +329,9 @@ net_slirp_thread(void *priv) break; case NET_EVENT_TX: - while (network_tx_pop(slirp->card, &slirp->pkt)) { - net_slirp_in(slirp, slirp->pkt.data, slirp->pkt.len); + int packets = network_tx_popv(slirp->card, slirp->pkt_tx_v, SLIRP_PKT_BATCH); + for (int i = 0; i < packets; i++) { + net_slirp_in(slirp, slirp->pkt_tx_v[i].data, slirp->pkt_tx_v[i].len); } break; @@ -381,11 +375,11 @@ net_slirp_thread(void *priv) if (slirp->pfd[NET_EVENT_TX].revents & POLLIN) { net_event_clear(&slirp->tx_event); - if (network_tx_pop(slirp->card, &slirp->pkt)) { - net_slirp_in(slirp, slirp->pkt.data, slirp->pkt.len); + int packets = network_tx_popv(slirp->card, slirp->pkt_tx_v, SLIRP_PKT_BATCH); + for (int i = 0; i < packets; i++) { + net_slirp_in(slirp, slirp->pkt_tx_v[i].data, slirp->pkt_tx_v[i].len); } } - } slirp_log("SLiRP: polling stopped.\n"); @@ -453,6 +447,9 @@ net_slirp_init(const netcard_t *card, const uint8_t *mac_addr, void *priv) i++; } + for (int i = 0; i < SLIRP_PKT_BATCH; i++) { + slirp->pkt_tx_v[i].data = calloc(1, NET_MAX_FRAME); + } slirp->pkt.data = calloc(1, NET_MAX_FRAME); net_event_init(&slirp->tx_event); net_event_init(&slirp->stop_event); @@ -485,6 +482,9 @@ net_slirp_close(void *priv) net_event_close(&slirp->tx_event); net_event_close(&slirp->stop_event); slirp_cleanup(slirp->slirp); + for (int i = 0; i < SLIRP_PKT_BATCH; i++) { + free(slirp->pkt_tx_v[i].data); + } free(slirp->pkt.data); free(slirp); slirp_card_num--; diff --git a/src/network/network.c b/src/network/network.c index a406140c4..a01eb938e 100644 --- a/src/network/network.c +++ b/src/network/network.c @@ -240,12 +240,11 @@ network_init(void) #endif } -static void +void network_queue_init(netqueue_t *queue) { - queue->size = NET_QUEUE_LEN; queue->head = queue->tail = 0; - for (int i=0; isize; i++) { + for (int i=0; ipackets[i].data = calloc(1, NET_MAX_FRAME); queue->packets[i].len = 0; } @@ -255,7 +254,7 @@ network_queue_init(netqueue_t *queue) static bool network_queue_full(netqueue_t *queue) { - return ((queue->head + 1) % queue->size) == queue->tail; + return ((queue->head + 1) & NET_QUEUE_LEN_MASK) == queue->tail; } static bool @@ -264,30 +263,50 @@ network_queue_empty(netqueue_t *queue) return (queue->head == queue->tail); } +static inline void +network_swap_packet(netpkt_t *pkt1, netpkt_t *pkt2) +{ + netpkt_t tmp = *pkt2; + *pkt2 = *pkt1; + *pkt1 = tmp; +} + int network_queue_put(netqueue_t *queue, uint8_t *data, int len) { - if (len > NET_MAX_FRAME || network_queue_full(queue)) { + if (len == 0 || len > NET_MAX_FRAME || network_queue_full(queue)) { return 0; } netpkt_t *pkt = &queue->packets[queue->head]; memcpy(pkt->data, data, len); pkt->len = len; - queue->head = (queue->head + 1) % queue->size; + queue->head = (queue->head + 1) & NET_QUEUE_LEN_MASK; + return 1; +} + +int +network_queue_put_swap(netqueue_t *queue, netpkt_t *src_pkt) +{ + if (src_pkt->len == 0 || src_pkt->len > NET_MAX_FRAME || network_queue_full(queue)) { + return 0; + } + + netpkt_t *dst_pkt = &queue->packets[queue->head]; + network_swap_packet(src_pkt, dst_pkt); + + queue->head = (queue->head + 1) & NET_QUEUE_LEN_MASK; return 1; } static int -network_queue_get(netqueue_t *queue, netpkt_t *dst_pkt) { +network_queue_get_swap(netqueue_t *queue, netpkt_t *dst_pkt) { if (network_queue_empty(queue)) return 0; - netpkt_t *pkt = &queue->packets[queue->tail]; - memcpy(dst_pkt->data, pkt->data, pkt->len); - dst_pkt->len = pkt->len; - queue->tail = (queue->tail + 1) % queue->size; - + netpkt_t *src_pkt = &queue->packets[queue->tail]; + network_swap_packet(src_pkt, dst_pkt); + queue->tail = (queue->tail + 1) & NET_QUEUE_LEN_MASK; return 1; } @@ -303,23 +322,18 @@ network_queue_move(netqueue_t *dst_q, netqueue_t *src_q) netpkt_t *src_pkt = &src_q->packets[src_q->tail]; netpkt_t *dst_pkt = &dst_q->packets[dst_q->head]; - uint8_t *tmp_dat = dst_pkt->data; - dst_pkt->data = src_pkt->data; - dst_pkt->len = src_pkt->len; - dst_q->head = (dst_q->head + 1) % dst_q->size; + network_swap_packet(src_pkt, dst_pkt); + dst_q->head = (dst_q->head + 1) & NET_QUEUE_LEN_MASK; + src_q->tail = (src_q->tail + 1) & NET_QUEUE_LEN_MASK; - src_pkt->data = tmp_dat; - src_pkt->len = 0; - src_q->tail = (src_q->tail + 1) % src_q->size; - - return 1; + return dst_pkt->len; } -static void +void network_queue_clear(netqueue_t *queue) { - for (int i=0; isize; i++) { + for (int i=0; ipackets[i].data); queue->packets[i].len = 0; } @@ -331,41 +345,47 @@ static void network_rx_queue(void *priv) { netcard_t *card = (netcard_t *)priv; - double timer_period; - int ret = 0; - bool activity = false; + uint32_t rx_bytes = 0; + for (int i = 0; i < NET_QUEUE_LEN; i++) { + if (card->queued_pkt.len == 0) { + thread_wait_mutex(card->rx_mutex); + int res = network_queue_get_swap(&card->queues[NET_QUEUE_RX], &card->queued_pkt); + thread_release_mutex(card->rx_mutex); + if (!res) + break; + } - if (card->queued_pkt.len == 0) { - thread_wait_mutex(card->rx_mutex); - network_queue_get(&card->queues[NET_QUEUE_RX], &card->queued_pkt); - thread_release_mutex(card->rx_mutex); - } - - if (card->queued_pkt.len > 0) { network_dump_packet(&card->queued_pkt); - ret = card->rx(card->card_drv, card->queued_pkt.data, card->queued_pkt.len); - } - - if (ret) { - activity = true; - timer_period = 0.762939453125 * ((card->queued_pkt.len >= 128) ? ((double) card->queued_pkt.len) : 128.0); + int res = card->rx(card->card_drv, card->queued_pkt.data, card->queued_pkt.len); + if (!res) + break; + rx_bytes += card->queued_pkt.len; card->queued_pkt.len = 0; - } else { - timer_period = 0.762939453125 * 128.0; } - timer_on_auto(&card->timer, timer_period); /* Transmission. */ + uint32_t tx_bytes = 0; thread_wait_mutex(card->tx_mutex); - ret = network_queue_move(&card->queues[NET_QUEUE_TX_HOST], &card->queues[NET_QUEUE_TX_VM]); + for (int i = 0; i < NET_QUEUE_LEN; i++) { + uint32_t bytes = network_queue_move(&card->queues[NET_QUEUE_TX_HOST], &card->queues[NET_QUEUE_TX_VM]); + if (!bytes) + break; + tx_bytes += bytes; + } thread_release_mutex(card->tx_mutex); - if (ret) { + if (tx_bytes) { /* Notify host that a packet is available in the TX queue */ card->host_drv.notify_in(card->host_drv.priv); - activity = true; } + double timer_period = 0.762939453125 * (rx_bytes > tx_bytes ? rx_bytes : tx_bytes); + if (timer_period < 200) + timer_period = 200; + + timer_on_auto(&card->timer, timer_period); + + bool activity = rx_bytes || tx_bytes; ui_sb_update_icon(SB_NETWORK, activity); } @@ -498,12 +518,29 @@ int network_tx_pop(netcard_t *card, netpkt_t *out_pkt) int ret = 0; thread_wait_mutex(card->tx_mutex); - ret = network_queue_get(&card->queues[NET_QUEUE_TX_HOST], out_pkt); + ret = network_queue_get_swap(&card->queues[NET_QUEUE_TX_HOST], out_pkt); thread_release_mutex(card->tx_mutex); return ret; } +int network_tx_popv(netcard_t *card, netpkt_t *pkt_vec, int vec_size) +{ + int pkt_count = 0; + + netqueue_t *queue = &card->queues[NET_QUEUE_TX_HOST]; + thread_wait_mutex(card->tx_mutex); + for (int i = 0; i < vec_size; i++) { + if (!network_queue_get_swap(queue, pkt_vec)) + break; + pkt_count++; + pkt_vec++; + } + thread_release_mutex(card->tx_mutex); + + return pkt_count; +} + int network_rx_put(netcard_t *card, uint8_t *bufp, int len) { int ret = 0; @@ -515,6 +552,17 @@ int network_rx_put(netcard_t *card, uint8_t *bufp, int len) return ret; } +int network_rx_put_pkt(netcard_t *card, netpkt_t *pkt) +{ + int ret = 0; + + thread_wait_mutex(card->rx_mutex); + ret = network_queue_put_swap(&card->queues[NET_QUEUE_RX], pkt); + thread_release_mutex(card->rx_mutex); + + return ret; +} + int network_dev_to_id(char *devname) { From 5384eb35bbb42a6aa03cec562a8e4ee1bea41bb3 Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Sat, 27 Aug 2022 11:03:45 -0400 Subject: [PATCH 308/386] macos: Fix the name of the bundled freetype library --- src/printer/prt_escp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/printer/prt_escp.c b/src/printer/prt_escp.c index ec07dc95f..013726c06 100644 --- a/src/printer/prt_escp.c +++ b/src/printer/prt_escp.c @@ -90,7 +90,7 @@ #ifdef _WIN32 # define PATH_FREETYPE_DLL "freetype.dll" #elif defined __APPLE__ -# define PATH_FREETYPE_DLL "libfreetype.dylib" +# define PATH_FREETYPE_DLL "libfreetype.6.dylib" #else # define PATH_FREETYPE_DLL "libfreetype.so.6" #endif From c0b6c55926c4526f267fc742714a8e67d691d1ee Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sat, 27 Aug 2022 17:08:50 +0200 Subject: [PATCH 309/386] network: support > 10Mbps throughput --- src/include/86box/network.h | 4 ++++ src/network/net_pcnet.c | 7 ++++++- src/network/network.c | 5 +++-- 3 files changed, 13 insertions(+), 3 deletions(-) diff --git a/src/include/86box/network.h b/src/include/86box/network.h index 54181ae8e..4f9e6b70e 100644 --- a/src/include/86box/network.h +++ b/src/include/86box/network.h @@ -62,6 +62,9 @@ #define NET_CARD_MAX 4 #define NET_HOST_INTF_MAX 64 +#define NET_PERIOD_10M 0.8 +#define NET_PERIOD_100M 0.08 + /* Supported network cards. */ enum { NONE = 0, @@ -128,6 +131,7 @@ struct _netcard_t { mutex_t *rx_mutex; pc_timer_t timer; int card_num; + double byte_period; }; typedef struct { diff --git a/src/network/net_pcnet.c b/src/network/net_pcnet.c index 25ced4679..2b2b22540 100644 --- a/src/network/net_pcnet.c +++ b/src/network/net_pcnet.c @@ -2025,11 +2025,15 @@ pcnet_bcr_writew(nic_t *dev, uint16_t rap, uint16_t val) case BCR_BSBC: case BCR_EECAS: case BCR_PLAT: - case BCR_MIICAS: case BCR_MIIADDR: dev->aBCR[rap] = val; break; + case BCR_MIICAS: + dev->netcard->byte_period = (dev->board == DEV_AM79C973 && (val & 0x28)) ? NET_PERIOD_100M : NET_PERIOD_10M; + dev->aBCR[rap] = val; + break; + case BCR_STVAL: val &= 0xffff; dev->aBCR[BCR_STVAL] = val; @@ -3055,6 +3059,7 @@ pcnet_init(const device_t *info) /* Attach ourselves to the network module. */ dev->netcard = network_attach(dev, dev->aPROM, pcnetReceiveNoSync, pcnetWaitReceiveAvail, pcnetSetLinkState); + dev->netcard->byte_period = (dev->board == DEV_AM79C973) ? NET_PERIOD_100M : NET_PERIOD_10M; timer_add(&dev->timer, pcnetPollTimer, dev, 0); diff --git a/src/network/network.c b/src/network/network.c index a01eb938e..a8106afeb 100644 --- a/src/network/network.c +++ b/src/network/network.c @@ -379,7 +379,7 @@ network_rx_queue(void *priv) card->host_drv.notify_in(card->host_drv.priv); } - double timer_period = 0.762939453125 * (rx_bytes > tx_bytes ? rx_bytes : tx_bytes); + double timer_period = card->byte_period * (rx_bytes > tx_bytes ? rx_bytes : tx_bytes); if (timer_period < 200) timer_period = 200; @@ -409,6 +409,7 @@ network_attach(void *card_drv, uint8_t *mac, NETRXCB rx, NETWAITCB wait, NETSETL card->tx_mutex = thread_create_mutex(); card->rx_mutex = thread_create_mutex(); card->card_num = net_card_current; + card->byte_period = NET_PERIOD_10M; for (int i=0; i<3; i++) { network_queue_init(&card->queues[i]); @@ -440,7 +441,7 @@ network_attach(void *card_drv, uint8_t *mac, NETRXCB rx, NETWAITCB wait, NETSETL } timer_add(&card->timer, network_rx_queue, card, 0); - timer_on_auto(&card->timer, 0.762939453125 * 2.0); + timer_on_auto(&card->timer, 100); return card; } From ea21790fc9a3dec558c17a01e54cb5c98ce3f35c Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sat, 27 Aug 2022 19:08:28 +0200 Subject: [PATCH 310/386] network: allow to set a NIC's link from the status bar --- src/config.c | 12 ++++++ src/include/86box/machine_status.h | 2 +- src/include/86box/network.h | 25 +++++++++--- src/machine_status.c | 6 ++- src/network/net_3c503.c | 2 +- src/network/net_dp8390.c | 6 ++- src/network/net_ne2000.c | 2 +- src/network/net_pcnet.c | 62 ++++++++++++++---------------- src/network/net_plip.c | 2 +- src/network/net_wd8003.c | 2 +- src/network/network.c | 59 ++++++++++++++++++++++++---- src/qt/qt_machinestatus.cpp | 41 ++++++++++++++------ src/qt/qt_machinestatus.hpp | 1 + src/qt/qt_mediamenu.cpp | 38 ++++++++++++++++++ src/qt/qt_mediamenu.hpp | 5 +++ src/qt/qt_ui.cpp | 4 +- 16 files changed, 202 insertions(+), 67 deletions(-) diff --git a/src/config.c b/src/config.c index b0c73e0d0..0c6c0e28b 100644 --- a/src/config.c +++ b/src/config.c @@ -1214,6 +1214,11 @@ load_network(void) } else { strcpy(net_cards_conf[c].host_dev_name, "none"); } + + sprintf(temp, "net_%02i_link", c +1); + net_cards_conf[c].link_state = config_get_int(cat, temp, + (NET_LINK_10_HD|NET_LINK_10_FD|NET_LINK_100_HD|NET_LINK_100_FD|NET_LINK_1000_HD|NET_LINK_1000_FD)); + } } @@ -2767,6 +2772,13 @@ save_network(void) /* config_set_string(cat, temp, "none"); */ config_delete_var(cat, temp); } + + sprintf(temp, "net_%02i_link", c + 1); + if (net_cards_conf[c].link_state == (NET_LINK_10_HD|NET_LINK_10_FD|NET_LINK_100_HD|NET_LINK_100_FD|NET_LINK_1000_HD|NET_LINK_1000_FD)) { + config_delete_var(cat, temp); + } else { + config_set_int(cat, temp, net_cards_conf[c].link_state); + } } delete_section_if_empty(cat); diff --git a/src/include/86box/machine_status.h b/src/include/86box/machine_status.h index 2afed078e..6baafeeb0 100644 --- a/src/include/86box/machine_status.h +++ b/src/include/86box/machine_status.h @@ -21,7 +21,7 @@ typedef struct { dev_status_empty_active_t mo[MO_NUM]; dev_status_empty_active_t cassette; dev_status_active_t hdd[HDD_BUS_USB]; - dev_status_active_t net; + dev_status_active_t net[NET_CARD_MAX]; dev_status_empty_t cartridge[2]; } machine_status_t; diff --git a/src/include/86box/network.h b/src/include/86box/network.h index 4f9e6b70e..f294bf500 100644 --- a/src/include/86box/network.h +++ b/src/include/86box/network.h @@ -65,6 +65,17 @@ #define NET_PERIOD_10M 0.8 #define NET_PERIOD_100M 0.08 +enum { + NET_LINK_DOWN = (1 << 1), + NET_LINK_TEMP_DOWN = (1 << 2), + NET_LINK_10_HD = (1 << 3), + NET_LINK_10_FD = (1 << 4), + NET_LINK_100_HD = (1 << 5), + NET_LINK_100_FD = (1 << 6), + NET_LINK_1000_HD = (1 << 7), + NET_LINK_1000_FD = (1 << 8), +}; + /* Supported network cards. */ enum { NONE = 0, @@ -84,14 +95,14 @@ typedef struct { int device_num; int net_type; char host_dev_name[128]; + uint32_t link_state; } netcard_conf_t; extern netcard_conf_t net_cards_conf[NET_CARD_MAX]; extern int net_card_current; typedef int (*NETRXCB)(void *, uint8_t *, int); -typedef int (*NETWAITCB)(void *); -typedef int (*NETSETLINKSTATE)(void *); +typedef int (*NETSETLINKSTATE)(void *, uint32_t link_state); typedef struct netpkt { @@ -121,9 +132,7 @@ struct _netcard_t { const device_t *device; void *card_drv; struct netdrv_t host_drv; - int (*poll)(void *); NETRXCB rx; - NETWAITCB wait; NETSETLINKSTATE set_link_state; netqueue_t queues[3]; netpkt_t queued_pkt; @@ -132,6 +141,9 @@ struct _netcard_t { pc_timer_t timer; int card_num; double byte_period; + uint32_t led_timer; + uint32_t led_state; + uint32_t link_state; }; typedef struct { @@ -152,7 +164,7 @@ extern netdev_t network_devs[NET_HOST_INTF_MAX]; /* Function prototypes. */ extern void network_init(void); -extern netcard_t *network_attach(void *card_drv, uint8_t *mac, NETRXCB rx, NETWAITCB wait, NETSETLINKSTATE set_link_state); +extern netcard_t *network_attach(void *card_drv, uint8_t *mac, NETRXCB rx, NETSETLINKSTATE set_link_state); extern void netcard_close(netcard_t *card); extern void network_close(void); extern void network_reset(void); @@ -161,6 +173,9 @@ extern void network_tx(netcard_t *card, uint8_t *, int); extern int net_pcap_prepare(netdev_t *); +extern void network_connect(int id, int connect); +extern int network_is_connected(int id); +extern int network_dev_available(int); extern int network_dev_to_id(char *); extern int network_card_available(int); extern int network_card_has_config(int); diff --git a/src/machine_status.c b/src/machine_status.c index 258c16821..3031c9ad3 100644 --- a/src/machine_status.c +++ b/src/machine_status.c @@ -19,6 +19,8 @@ #include <86box/zip.h> #include <86box/mo.h> #include <86box/hdd.h> +#include <86box/thread.h> +#include <86box/network.h> #include <86box/machine_status.h> machine_status_t machine_status; @@ -48,5 +50,7 @@ machine_status_init() { machine_status.hdd[i].active = false; } - machine_status.net.active = false; + for (size_t i = 0; i < NET_CARD_MAX; i++) { + machine_status.net[i].active = false; + } } \ No newline at end of file diff --git a/src/network/net_3c503.c b/src/network/net_3c503.c index d54a00593..2e5c97519 100644 --- a/src/network/net_3c503.c +++ b/src/network/net_3c503.c @@ -619,7 +619,7 @@ threec503_nic_init(const device_t *info) dev->regs.gacfr = 0x09; /* Start with RAM mapping enabled. */ /* Attach ourselves to the network module. */ - dev->dp8390->card = network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL, NULL); + dev->dp8390->card = network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL); return(dev); } diff --git a/src/network/net_dp8390.c b/src/network/net_dp8390.c index c9908f883..ad4345ae6 100644 --- a/src/network/net_dp8390.c +++ b/src/network/net_dp8390.c @@ -228,7 +228,9 @@ dp8390_write_cr(dp8390_t *dev, uint32_t val) /* Send the packet to the system driver */ dev->CR.tx_packet = 1; - network_tx(dev->card, &dev->mem[(dev->tx_page_start * 256) - dev->mem_start], dev->tx_bytes); + /* TODO: report TX error to the driver ? */ + if (!(dev->card->link_state & NET_LINK_DOWN)) + network_tx(dev->card, &dev->mem[(dev->tx_page_start * 256) - dev->mem_start], dev->tx_bytes); /* some more debug */ #ifdef ENABLE_DP8390_LOG @@ -291,6 +293,8 @@ dp8390_rx_common(void *priv, uint8_t *buf, int io_len) if ((dev->CR.stop != 0) || (dev->page_start == 0)) return 0; + if (dev->card->link_state & NET_LINK_DOWN) + return 0; /* * Add the pkt header + CRC to the length, and work * out how many 256-byte pages the frame would occupy. diff --git a/src/network/net_ne2000.c b/src/network/net_ne2000.c index 960f7cdbf..c7f1a0ccb 100644 --- a/src/network/net_ne2000.c +++ b/src/network/net_ne2000.c @@ -1122,7 +1122,7 @@ nic_init(const device_t *info) nic_reset(dev); /* Attach ourselves to the network module. */ - dev->dp8390->card = network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL, NULL); + dev->dp8390->card = network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL); nelog(1, "%s: %s attached IO=0x%X IRQ=%d\n", dev->name, dev->is_pci?"PCI":"ISA", dev->base_address, dev->base_irq); diff --git a/src/network/net_pcnet.c b/src/network/net_pcnet.c index 2b2b22540..340b056d3 100644 --- a/src/network/net_pcnet.c +++ b/src/network/net_pcnet.c @@ -29,6 +29,7 @@ #include #include #include +#include #define HAVE_STDARG_H #include <86box/86box.h> #include <86box/io.h> @@ -1253,6 +1254,10 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size) if (!pcnetIsLinkUp(dev)) return 0; + dev->fMaybeOutOfSpace = !pcnetCanReceive(dev); + if (dev->fMaybeOutOfSpace) + return 0; + pcnetlog(1, "%s: pcnetReceiveNoSync: RX %x:%x:%x:%x:%x:%x > %x:%x:%x:%x:%x:%x len %d\n", dev->name, buf[6], buf[7], buf[8], buf[9], buf[10], buf[11], buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], @@ -2095,12 +2100,13 @@ pcnet_mii_readw(nic_t *dev, uint16_t miiaddr) | 0x0008 /* Able to do auto-negotiation. */ | 0x0004 /* Link up. */ | 0x0001; /* Extended Capability, i.e. registers 4+ valid. */ - if (!dev->fLinkUp || dev->fLinkTempDown || isolate) { + if (!pcnetIsLinkUp(dev) || isolate) { val &= ~(0x0020 | 0x0004); dev->cLinkDownReported++; } if (!autoneg) { /* Auto-negotiation disabled. */ + val &= ~(0x0020 | 0x0008); if (duplex) val &= ~0x2800; /* Full duplex forced. */ else @@ -2131,7 +2137,7 @@ pcnet_mii_readw(nic_t *dev, uint16_t miiaddr) case 5: /* Link partner ability register. */ - if (dev->fLinkUp && !dev->fLinkTempDown && !isolate) { + if (pcnetIsLinkUp(dev) && !isolate) { val = 0x8000 /* Next page bit. */ | 0x4000 /* Link partner acked us. */ | 0x0400 /* Can do flow control. */ @@ -2145,7 +2151,7 @@ pcnet_mii_readw(nic_t *dev, uint16_t miiaddr) case 6: /* Auto negotiation expansion register. */ - if (dev->fLinkUp && !dev->fLinkTempDown && !isolate) { + if (pcnetIsLinkUp(dev) && !isolate) { val = 0x0008 /* Link partner supports npage. */ | 0x0004 /* Enable npage words. */ | 0x0001; /* Can do N-way auto-negotiation. */ @@ -2157,7 +2163,7 @@ pcnet_mii_readw(nic_t *dev, uint16_t miiaddr) case 18: /* Diagnostic Register (FreeBSD pcn/ac101 driver reads this). */ - if (dev->fLinkUp && !dev->fLinkTempDown && !isolate) { + if (pcnetIsLinkUp(dev) && !isolate) { val = 0x1000 /* Receive PLL locked. */ | 0x0200; /* Signal detected. */ @@ -2195,7 +2201,7 @@ pcnet_bcr_readw(nic_t *dev, uint16_t rap) case BCR_LED2: case BCR_LED3: val = dev->aBCR[rap] & ~0x8000; - if (dev->fLinkTempDown || !dev->fLinkUp) { + if (!(pcnetIsLinkUp(dev))) { if (rap == 4) dev->cLinkDownReported++; val &= ~0x40; @@ -2846,40 +2852,28 @@ pcnetCanReceive(nic_t *dev) return rc; } - static int -pcnetWaitReceiveAvail(void *priv) +pcnetSetLinkState(void *priv, uint32_t link_state) { nic_t *dev = (nic_t *) priv; - dev->fMaybeOutOfSpace = !pcnetCanReceive(dev); - - return dev->fMaybeOutOfSpace; -} - -static int -pcnetSetLinkState(void *priv) -{ - nic_t *dev = (nic_t *) priv; - int fLinkUp; - - if (dev->fLinkTempDown) { - pcnetTempLinkDown(dev); - return 1; + if (link_state & NET_LINK_TEMP_DOWN) { + pcnetTempLinkDown(dev); + return 1; } - fLinkUp = (dev->fLinkUp && !dev->fLinkTempDown); - if (dev->fLinkUp != fLinkUp) { - dev->fLinkUp = fLinkUp; - if (fLinkUp) { - dev->fLinkTempDown = 1; - dev->cLinkDownReported = 0; - dev->aCSR[0] |= 0x8000 | 0x2000; /* ERR | CERR (this is probably wrong) */ - timer_set_delay_u64(&dev->timer_restore, (dev->cMsLinkUpDelay * 1000) * TIMER_USEC); - } else { - dev->cLinkDownReported = 0; - dev->aCSR[0] |= 0x8000 | 0x2000; /* ERR | CERR (this is probably wrong) */ - } + bool link_up = !(link_state & NET_LINK_DOWN); + if (dev->fLinkUp != link_up) { + dev->fLinkUp = link_up; + if (link_up) { + dev->fLinkTempDown = 1; + dev->cLinkDownReported = 0; + dev->aCSR[0] |= 0x8000 | 0x2000; + timer_set_delay_u64(&dev->timer_restore, (dev->cMsLinkUpDelay * 1000) * TIMER_USEC); + } else { + dev->cLinkDownReported = 0; + dev->aCSR[0] |= 0x8000 | 0x2000; + } } return 0; @@ -3058,7 +3052,7 @@ pcnet_init(const device_t *info) pcnetHardReset(dev); /* Attach ourselves to the network module. */ - dev->netcard = network_attach(dev, dev->aPROM, pcnetReceiveNoSync, pcnetWaitReceiveAvail, pcnetSetLinkState); + dev->netcard = network_attach(dev, dev->aPROM, pcnetReceiveNoSync, pcnetSetLinkState); dev->netcard->byte_period = (dev->board == DEV_AM79C973) ? NET_PERIOD_100M : NET_PERIOD_10M; timer_add(&dev->timer, pcnetPollTimer, dev, 0); diff --git a/src/network/net_plip.c b/src/network/net_plip.c index cf1a0f9c3..9372e8022 100644 --- a/src/network/net_plip.c +++ b/src/network/net_plip.c @@ -476,7 +476,7 @@ plip_net_init(const device_t *info) } plip_log(1, " (attached to LPT)\n"); - instance->card = network_attach(instance, instance->mac, plip_rx, NULL, NULL); + instance->card = network_attach(instance, instance->mac, plip_rx, NULL); return instance; } diff --git a/src/network/net_wd8003.c b/src/network/net_wd8003.c index be52a11aa..d53f570f0 100644 --- a/src/network/net_wd8003.c +++ b/src/network/net_wd8003.c @@ -788,7 +788,7 @@ wd_init(const device_t *info) mem_mapping_disable(&dev->ram_mapping); /* Attach ourselves to the network module. */ - dev->dp8390->card = network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL, NULL); + dev->dp8390->card = network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL); if (!(dev->board_chip & WE_ID_BUS_MCA)) { wdlog("%s: attached IO=0x%X IRQ=%d, RAM addr=0x%06x\n", dev->name, diff --git a/src/network/network.c b/src/network/network.c index a8106afeb..7c6ab0826 100644 --- a/src/network/network.c +++ b/src/network/network.c @@ -346,6 +346,13 @@ network_rx_queue(void *priv) { netcard_t *card = (netcard_t *)priv; + uint32_t new_link_state = net_cards_conf[card->card_num].link_state; + if (new_link_state != card->link_state) { + if (card->set_link_state) + card->set_link_state(card->card_drv, new_link_state); + card->link_state = new_link_state; + } + uint32_t rx_bytes = 0; for (int i = 0; i < NET_QUEUE_LEN; i++) { if (card->queued_pkt.len == 0) { @@ -386,7 +393,13 @@ network_rx_queue(void *priv) timer_on_auto(&card->timer, timer_period); bool activity = rx_bytes || tx_bytes; - ui_sb_update_icon(SB_NETWORK, activity); + bool led_on = card->led_timer & 0x80000000; + if ((activity && !led_on) || (card->led_timer & 0x7fffffff) >= 150000) { + ui_sb_update_icon(SB_NETWORK | card->card_num, activity); + card->led_timer = 0 | (activity << 31); + } + + card->led_timer += timer_period; } @@ -398,13 +411,12 @@ network_rx_queue(void *priv) * modules. */ netcard_t * -network_attach(void *card_drv, uint8_t *mac, NETRXCB rx, NETWAITCB wait, NETSETLINKSTATE set_link_state) +network_attach(void *card_drv, uint8_t *mac, NETRXCB rx, NETSETLINKSTATE set_link_state) { netcard_t *card = calloc(1, sizeof(netcard_t)); card->queued_pkt.data = calloc(1, NET_MAX_FRAME); card->card_drv = card_drv; card->rx = rx; - card->wait = wait; card->set_link_state = set_link_state; card->tx_mutex = thread_create_mutex(); card->rx_mutex = thread_create_mutex(); @@ -496,8 +508,7 @@ network_reset(void) #endif for (i = 0; i < NET_CARD_MAX; i++) { - if (!net_cards_conf[i].device_num || net_cards_conf[i].net_type == NET_TYPE_NONE || - (net_cards_conf[i].net_type == NET_TYPE_PCAP && !strcmp(net_cards_conf[i].host_dev_name, "none"))) { + if (!network_dev_available(i)) { continue; } @@ -564,6 +575,28 @@ int network_rx_put_pkt(netcard_t *card, netpkt_t *pkt) return ret; } +void +network_connect(int id, int connect) +{ + if (id >= NET_CARD_MAX) + return; + + if (connect) { + net_cards_conf[id].link_state &= ~NET_LINK_DOWN; + } else { + net_cards_conf[id].link_state |= NET_LINK_DOWN; + } +} + +int +network_is_connected(int id) +{ + if (id >= NET_CARD_MAX) + return 0; + + return !(net_cards_conf[id].link_state & NET_LINK_DOWN); +} + int network_dev_to_id(char *devname) { @@ -575,19 +608,29 @@ network_dev_to_id(char *devname) } } - /* If no match found, assume "none". */ - return(0); + return(-1); } /* UI */ +int +network_dev_available(int id) +{ + int available = (net_cards_conf[id].device_num > 0) && (net_cards_conf[id].net_type != NET_TYPE_NONE); + + if ((net_cards_conf[id].net_type == NET_TYPE_PCAP && (network_dev_to_id(net_cards_conf[id].host_dev_name) <= 0))) + available = 0; + + return available; +} + int network_available(void) { int available = 0; for (int i = 0; i < NET_CARD_MAX; i ++) { - available |= (net_cards_conf[i].device_num > 0) && (net_cards_conf[i].net_type != NET_TYPE_NONE); + available |= network_dev_available(i); } return available; diff --git a/src/qt/qt_machinestatus.cpp b/src/qt/qt_machinestatus.cpp index a6ea65fd3..c04d6ee5c 100644 --- a/src/qt/qt_machinestatus.cpp +++ b/src/qt/qt_machinestatus.cpp @@ -220,7 +220,9 @@ struct MachineStatus::States { for (auto& h : hdds) { h.pixmaps = &pixmaps.hd; } - net.pixmaps = &pixmaps.net; + for (auto& n : net) { + n.pixmaps = &pixmaps.net; + } } std::array cartridge; @@ -230,7 +232,7 @@ struct MachineStatus::States { std::array zip; std::array mo; std::array hdds; - StateActive net; + std::array net; std::unique_ptr sound; std::unique_ptr text; }; @@ -320,6 +322,14 @@ void MachineStatus::iterateMO(const std::function &cb) { } } +void MachineStatus::iterateNIC(const std::function &cb) { + for (int i = 0; i < NET_CARD_MAX; i++) { + if (network_dev_available(i)) { + cb(i); + } + } +} + static int hdd_count(int bus) { int c = 0; int i; @@ -357,7 +367,9 @@ void MachineStatus::refreshIcons() { d->hdds[i].setActive(machine_status.hdd[i].active); } - d->net.setActive(machine_status.net.active); + for (size_t i = 0; i < NET_CARD_MAX; i++) { + d->net[i].setActive(machine_status.net[i].active); + } for (int i = 0; i < 2; ++i) { d->cartridge[i].setEmpty(machine_status.cartridge[i].empty); @@ -375,7 +387,6 @@ void MachineStatus::refresh(QStatusBar* sbar) { int c_xta = hdd_count(HDD_BUS_XTA); int c_ide = hdd_count(HDD_BUS_IDE); int c_scsi = hdd_count(HDD_BUS_SCSI); - int do_net = network_available(); sbar->removeWidget(d->cassette.label.get()); for (int i = 0; i < 2; ++i) { @@ -396,7 +407,9 @@ void MachineStatus::refresh(QStatusBar* sbar) { for (size_t i = 0; i < HDD_BUS_USB; i++) { sbar->removeWidget(d->hdds[i].label.get()); } - sbar->removeWidget(d->net.label.get()); + for (size_t i = 0; i < NET_CARD_MAX; i++) { + sbar->removeWidget(d->net[i].label.get()); + } sbar->removeWidget(d->sound.get()); if (cassette_enable) { @@ -503,6 +516,17 @@ void MachineStatus::refresh(QStatusBar* sbar) { sbar->addWidget(d->mo[i].label.get()); }); + iterateNIC([this, sbar](int i) { + d->net[i].label = std::make_unique(); + d->net[i].setActive(false); + d->net[i].refresh(); + d->net[i].label->setToolTip(MediaMenu::ptr->netMenus[i]->title()); + connect((ClickableLabel*)d->net[i].label.get(), &ClickableLabel::clicked, [i](QPoint pos) { + MediaMenu::ptr->netMenus[i]->popup(pos - QPoint(0, MediaMenu::ptr->netMenus[i]->sizeHint().height())); + }); + sbar->addWidget(d->net[i].label.get()); + }); + auto hdc_name = QString(hdc_get_internal_name(hdc_current)); if ((has_mfm || hdc_name.left(5) == QStringLiteral("st506")) && c_mfm > 0) { d->hdds[HDD_BUS_MFM].label = std::make_unique(); @@ -541,13 +565,6 @@ void MachineStatus::refresh(QStatusBar* sbar) { sbar->addWidget(d->hdds[HDD_BUS_SCSI].label.get()); } - if (do_net) { - d->net.label = std::make_unique(); - d->net.setActive(false); - d->net.refresh(); - d->net.label->setToolTip(tr("Network")); - sbar->addWidget(d->net.label.get()); - } d->sound = std::make_unique(); d->sound->setPixmap(d->pixmaps.sound); diff --git a/src/qt/qt_machinestatus.hpp b/src/qt/qt_machinestatus.hpp index 8c31dd238..8d085f93a 100644 --- a/src/qt/qt_machinestatus.hpp +++ b/src/qt/qt_machinestatus.hpp @@ -66,6 +66,7 @@ public: static void iterateCDROM(const std::function& cb); static void iterateZIP(const std::function& cb); static void iterateMO(const std::function& cb); + static void iterateNIC(const std::function& cb); QString getMessage(); public slots: diff --git a/src/qt/qt_mediamenu.cpp b/src/qt/qt_mediamenu.cpp index a4fcb5113..90cd80257 100644 --- a/src/qt/qt_mediamenu.cpp +++ b/src/qt/qt_mediamenu.cpp @@ -44,10 +44,14 @@ extern "C" { #include <86box/mo.h> #include <86box/sound.h> #include <86box/ui.h> +#include <86box/thread.h> +#include <86box/network.h> + }; #include "qt_newfloppydialog.hpp" #include "qt_util.hpp" +#include "qt_deviceconfig.hpp" std::shared_ptr MediaMenu::ptr; @@ -156,6 +160,16 @@ void MediaMenu::refresh(QMenu *parentMenu) { moMenus[i] = menu; moUpdateMenu(i); }); + + netMenus.clear(); + MachineStatus::iterateNIC([this, parentMenu](int i) { + auto *menu = parentMenu->addMenu(""); + netDisconnPos = menu->children().count(); + auto *action = menu->addAction(tr("&Disconnected"), [i] { network_connect(i, !network_is_connected(i)); config_save(); }); + action->setCheckable(true); + netMenus[i] = menu; + nicUpdateMenu(i); + }); } void MediaMenu::cassetteNewImage() { @@ -662,6 +676,30 @@ void MediaMenu::moUpdateMenu(int i) { menu->setTitle(QString::asprintf(tr("MO %i (%ls): %ls").toUtf8().constData(), i + 1, busName.toStdU16String().data(), name.isEmpty() ? tr("(empty)").toStdU16String().data() : name.toStdU16String().data())); } +void MediaMenu::nicUpdateMenu(int i) { + if (!netMenus.contains(i)) + return; + + QString netType = tr("None"); + switch (net_cards_conf[i].net_type) { + case NET_TYPE_SLIRP: + netType = "SLiRP"; + break; + case NET_TYPE_PCAP: + netType = "PCAP"; + break; + } + + QString devName = DeviceConfig::DeviceName(network_card_getdevice(net_cards_conf[i].device_num), network_card_get_internal_name(net_cards_conf[i].device_num), 1); + + auto *menu = netMenus[i]; + auto childs = menu->children(); + auto *connectedAction = dynamic_cast(childs[netDisconnPos]); + connectedAction->setChecked(!network_is_connected(i)); + + menu->setTitle(QString::asprintf(tr("NIC %02i (%ls) %ls").toUtf8().constData(), i + 1, netType.toStdU16String().data(), devName.toStdU16String().data())); +} + QString MediaMenu::getMediaOpenDirectory() { QString openDirectory; if (open_dir_usr_path > 0) { diff --git a/src/qt/qt_mediamenu.hpp b/src/qt/qt_mediamenu.hpp index 9b08d3ee3..a5c50a472 100644 --- a/src/qt/qt_mediamenu.hpp +++ b/src/qt/qt_mediamenu.hpp @@ -56,6 +56,8 @@ public: void moEject(int i); void moReload(int i); void moUpdateMenu(int i); + + void nicUpdateMenu(int i); private: QWidget* parentWidget = nullptr; @@ -65,6 +67,7 @@ private: QMap cdromMenus; QMap zipMenus; QMap moMenus; + QMap netMenus; QString getMediaOpenDirectory(); @@ -89,5 +92,7 @@ private: int moEjectPos; int moReloadPos; + int netDisconnPos; + friend class MachineStatus; }; diff --git a/src/qt/qt_ui.cpp b/src/qt/qt_ui.cpp index 7400a4f7a..65a8cec44 100644 --- a/src/qt/qt_ui.cpp +++ b/src/qt/qt_ui.cpp @@ -50,6 +50,8 @@ extern "C" { #include <86box/zip.h> #include <86box/mo.h> #include <86box/hdd.h> +#include <86box/thread.h> +#include <86box/network.h> #include <86box/machine_status.h> void @@ -246,7 +248,7 @@ ui_sb_update_icon(int tag, int active) { machine_status.hdd[item].active = active > 0 ? true : false; break; case SB_NETWORK: - machine_status.net.active = active > 0 ? true : false; + machine_status.net[item].active = active > 0 ? true : false; break; case SB_SOUND: break; From d3dde1737a6a8f11dbf83beacde9aeeefd710682 Mon Sep 17 00:00:00 2001 From: Adrien Moulin Date: Sun, 28 Aug 2022 13:56:24 +0200 Subject: [PATCH 311/386] network: add a new status bar icon for the network disconnected state --- src/include/86box/machine_status.h | 2 +- src/machine_status.c | 1 + src/qt/qt_machinestatus.cpp | 6 ++++-- src/qt/qt_mediamenu.cpp | 18 ++++++++++++++++-- src/qt/qt_mediamenu.hpp | 2 ++ src/qt/qt_ui.cpp | 1 + src/qt_resources.qrc | 1 + src/win/icons/network_empty.ico | Bin 0 -> 6950 bytes 8 files changed, 26 insertions(+), 5 deletions(-) create mode 100644 src/win/icons/network_empty.ico diff --git a/src/include/86box/machine_status.h b/src/include/86box/machine_status.h index 6baafeeb0..31cefdfd4 100644 --- a/src/include/86box/machine_status.h +++ b/src/include/86box/machine_status.h @@ -21,7 +21,7 @@ typedef struct { dev_status_empty_active_t mo[MO_NUM]; dev_status_empty_active_t cassette; dev_status_active_t hdd[HDD_BUS_USB]; - dev_status_active_t net[NET_CARD_MAX]; + dev_status_empty_active_t net[NET_CARD_MAX]; dev_status_empty_t cartridge[2]; } machine_status_t; diff --git a/src/machine_status.c b/src/machine_status.c index 3031c9ad3..1429d9295 100644 --- a/src/machine_status.c +++ b/src/machine_status.c @@ -52,5 +52,6 @@ machine_status_init() { for (size_t i = 0; i < NET_CARD_MAX; i++) { machine_status.net[i].active = false; + machine_status.net[i].empty = !network_is_connected(i); } } \ No newline at end of file diff --git a/src/qt/qt_machinestatus.cpp b/src/qt/qt_machinestatus.cpp index c04d6ee5c..9e93e882b 100644 --- a/src/qt/qt_machinestatus.cpp +++ b/src/qt/qt_machinestatus.cpp @@ -88,7 +88,7 @@ namespace { PixmapSetEmptyActive zip; PixmapSetEmptyActive mo; PixmapSetActive hd; - PixmapSetActive net; + PixmapSetEmptyActive net; QPixmap sound; }; @@ -232,7 +232,7 @@ struct MachineStatus::States { std::array zip; std::array mo; std::array hdds; - std::array net; + std::array net; std::unique_ptr sound; std::unique_ptr text; }; @@ -369,6 +369,7 @@ void MachineStatus::refreshIcons() { for (size_t i = 0; i < NET_CARD_MAX; i++) { d->net[i].setActive(machine_status.net[i].active); + d->net[i].setEmpty(machine_status.net[i].empty); } for (int i = 0; i < 2; ++i) { @@ -518,6 +519,7 @@ void MachineStatus::refresh(QStatusBar* sbar) { iterateNIC([this, sbar](int i) { d->net[i].label = std::make_unique(); + d->net[i].setEmpty(!network_is_connected(i)); d->net[i].setActive(false); d->net[i].refresh(); d->net[i].label->setToolTip(MediaMenu::ptr->netMenus[i]->title()); diff --git a/src/qt/qt_mediamenu.cpp b/src/qt/qt_mediamenu.cpp index 90cd80257..0050da900 100644 --- a/src/qt/qt_mediamenu.cpp +++ b/src/qt/qt_mediamenu.cpp @@ -165,7 +165,7 @@ void MediaMenu::refresh(QMenu *parentMenu) { MachineStatus::iterateNIC([this, parentMenu](int i) { auto *menu = parentMenu->addMenu(""); netDisconnPos = menu->children().count(); - auto *action = menu->addAction(tr("&Disconnected"), [i] { network_connect(i, !network_is_connected(i)); config_save(); }); + auto *action = menu->addAction(tr("&Connected"), [this, i] { network_is_connected(i) ? nicDisconnect(i) : nicConnect(i); }); action->setCheckable(true); netMenus[i] = menu; nicUpdateMenu(i); @@ -676,6 +676,20 @@ void MediaMenu::moUpdateMenu(int i) { menu->setTitle(QString::asprintf(tr("MO %i (%ls): %ls").toUtf8().constData(), i + 1, busName.toStdU16String().data(), name.isEmpty() ? tr("(empty)").toStdU16String().data() : name.toStdU16String().data())); } +void MediaMenu::nicConnect(int i) { + network_connect(i, 1); + ui_sb_update_icon_state(SB_NETWORK|i, 0); + nicUpdateMenu(i); + config_save(); +} + +void MediaMenu::nicDisconnect(int i) { + network_connect(i, 0); + ui_sb_update_icon_state(SB_NETWORK|i, 1); + nicUpdateMenu(i); + config_save(); +} + void MediaMenu::nicUpdateMenu(int i) { if (!netMenus.contains(i)) return; @@ -695,7 +709,7 @@ void MediaMenu::nicUpdateMenu(int i) { auto *menu = netMenus[i]; auto childs = menu->children(); auto *connectedAction = dynamic_cast(childs[netDisconnPos]); - connectedAction->setChecked(!network_is_connected(i)); + connectedAction->setChecked(network_is_connected(i)); menu->setTitle(QString::asprintf(tr("NIC %02i (%ls) %ls").toUtf8().constData(), i + 1, netType.toStdU16String().data(), devName.toStdU16String().data())); } diff --git a/src/qt/qt_mediamenu.hpp b/src/qt/qt_mediamenu.hpp index a5c50a472..de892d73c 100644 --- a/src/qt/qt_mediamenu.hpp +++ b/src/qt/qt_mediamenu.hpp @@ -57,6 +57,8 @@ public: void moReload(int i); void moUpdateMenu(int i); + void nicConnect(int i); + void nicDisconnect(int i); void nicUpdateMenu(int i); private: QWidget* parentWidget = nullptr; diff --git a/src/qt/qt_ui.cpp b/src/qt/qt_ui.cpp index 65a8cec44..febf4cba7 100644 --- a/src/qt/qt_ui.cpp +++ b/src/qt/qt_ui.cpp @@ -215,6 +215,7 @@ ui_sb_update_icon_state(int tag, int state) { case SB_HDD: break; case SB_NETWORK: + machine_status.net[item].empty = state > 0 ? true : false; break; case SB_SOUND: break; diff --git a/src/qt_resources.qrc b/src/qt_resources.qrc index fec56ad71..67f9cadac 100644 --- a/src/qt_resources.qrc +++ b/src/qt_resources.qrc @@ -33,6 +33,7 @@ win/icons/mo_empty_active.ico win/icons/network.ico win/icons/network_active.ico + win/icons/network_empty.ico win/icons/other_peripherals.ico win/icons/other_removable_devices.ico win/icons/ports.ico diff --git a/src/win/icons/network_empty.ico b/src/win/icons/network_empty.ico new file mode 100644 index 0000000000000000000000000000000000000000..4a1a102846ea018ba6d899b5352dd9fbdcfce858 GIT binary patch literal 6950 zcmZQzU}Run5D);-91Iz(3=D1z3=AS75IzSR1H(F21_lWU2>%2d1H(3M1_lKM2!90! z14Eq<1A_(w1A_nq1A_tsM4SN+5D*Yx5EK+-@bU3s$jZuMsH>}EsIRYQXlQ6)Xl`z1 z*tTsO!~XsI84escz;N~IRfhln|Kl-jRBAK?Mnhoega9L|Q$d9fNQi}j86?5Vz{9}E zz|H{Tf(1au2|EK112Y3N0}Dh20|PTufE^?YQqIG`0@lL7#=yn^Q4TVJoq>UufdMK2 zGJ}DQftP_7ECA+0^n*+Qna<9@z{bGMz{SALzz&8CApIN+91Pqbn?ab3fsuiefrEhw z!~tPm21W)(WO*^ zPhU_^uf z69Wi>y~+tL%Rt2|NC;f6F@XyfHUFn85;|0uRIomu{fK7^V(Xjx&G+ z7#Ki>CJ2Mf1X}|V1{Iqi0VWU!WFs@!3XpXmVFpgHN`xg~b({aofBnF)desJo(9i&eRZ#lfss#+!!Tbd%;vo5}p&uAlt^dGqH6D|G zwf_USy)D7Oz+gZ`dmC3hFxs|;#Na478UiCa1VDv3xL^f^0;rG%(V!v>R4PLym>Af> zoL%nkpmg^*!Jz)N5_cZF*V8<4S~@RKnej+ zISehckwl?PQ0WIMyWzDJNE}x6fr>~_odT*SK-~#&#RsZ)AXOkpFGvc6nHZo7K!q)sP)jA6e0m5!TMolfGhw-6-*Kw$sk7|W6^gsACNZ z1(*z&1{nz&!(@SmB-~!GEHr>X4F*ul0F)BY6oB-Dq(LnTP&A`SLjoA20Hhz}NHhf? z{Sd1_Eex#g2PpwzklR5Rq8v^lJP2Z;84pqgvK4``C;%Cbz#uJf{Qv*e`v3n|?f+UI z8vkn5s`a6vq2aGqty=x}YiQ`NSF2Vb)2mjkS```^8j3`(2B}}QYSsFyp`r1sR;}89 gH8iw-)vERXuZG6|$3?$dwf_It(D?tqR_*@}0J&!nAOHXW literal 0 HcmV?d00001 From edb8c03171e571c82a18ee0d7d1fc6bb6c88cfe2 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Mon, 29 Aug 2022 14:57:12 +0600 Subject: [PATCH 312/386] machine: Add MSI MS-5124 --- src/include/86box/machine.h | 1 + src/machine/m_at_socket7_3v.c | 31 +++++++++++++++++++++++++++++ src/machine/machine_table.c | 37 +++++++++++++++++++++++++++++++++++ 3 files changed, 69 insertions(+) diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index 656809932..32163142f 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -581,6 +581,7 @@ extern int machine_at_p5vxb_init(const machine_t *); extern int machine_at_gw2kte_init(const machine_t *); extern int machine_at_ap5s_init(const machine_t *); +extern int machine_at_ms5124_init(const machine_t *); extern int machine_at_vectra54_init(const machine_t *); /* m_at_socket7.c */ diff --git a/src/machine/m_at_socket7_3v.c b/src/machine/m_at_socket7_3v.c index 21550ce89..9e84ec6c0 100644 --- a/src/machine/m_at_socket7_3v.c +++ b/src/machine/m_at_socket7_3v.c @@ -506,6 +506,37 @@ machine_at_ap5s_init(const machine_t *model) return ret; } + +int +machine_at_ms5124_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear("roms/machines/ms5124/AG77.ROM", + 0x000e0000, 131072, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_init(model); + + pci_init(PCI_CONFIG_TYPE_1); + pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); + pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); + pci_register_slot(0x10, PCI_CARD_NORMAL, 41, 42, 43, 44); + pci_register_slot(0x11, PCI_CARD_NORMAL, 44, 41, 42, 43); + pci_register_slot(0x12, PCI_CARD_NORMAL, 43, 44, 41, 42); + pci_register_slot(0x0F, PCI_CARD_NORMAL, 42, 43, 44, 41); + + device_add(&sis_5511_device); + device_add(&keyboard_ps2_ami_pci_device); + device_add(&w83787f_device); + device_add(&sst_flash_29ee010_device); + + return ret; +} + + int machine_at_vectra54_init(const machine_t *model) { diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index ef1c2a566..efd4a4895 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -8476,6 +8476,43 @@ const machine_t machines[] = { .snd_device = NULL, .net_device = NULL }, + /* Has AMIKey H KBC firmware (AMIKey-2). */ + { + .name = "[SiS 5511] MSI MS-5124", + .internal_name = "ms5124", + .type = MACHINE_TYPE_SOCKET7_3V, + .chipset = MACHINE_CHIPSET_SIS_5511, + .init = machine_at_ms5124_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET5_7, + .block = CPU_BLOCK_NONE, + .min_bus = 50000000, + .max_bus = 66666667, + .min_voltage = 3380, + .max_voltage = 3520, + .min_multi = 1.5, + .max_multi = 3.0 + }, + .bus_flags = MACHINE_PS2_PCI, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 8192, + .max = 524288, + .step = 8192 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL + }, /* Socket 7 (Dual Voltage) machines */ /* 430HX */ From d6a8950f8a78a6b644991db2f3ae51f83b971faf Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Wed, 31 Aug 2022 00:36:15 +0600 Subject: [PATCH 313/386] Correct INTX value base --- src/machine/m_at_socket7_3v.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/machine/m_at_socket7_3v.c b/src/machine/m_at_socket7_3v.c index 9e84ec6c0..69d325aaf 100644 --- a/src/machine/m_at_socket7_3v.c +++ b/src/machine/m_at_socket7_3v.c @@ -523,10 +523,10 @@ machine_at_ms5124_init(const machine_t *model) pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); - pci_register_slot(0x10, PCI_CARD_NORMAL, 41, 42, 43, 44); - pci_register_slot(0x11, PCI_CARD_NORMAL, 44, 41, 42, 43); - pci_register_slot(0x12, PCI_CARD_NORMAL, 43, 44, 41, 42); - pci_register_slot(0x0F, PCI_CARD_NORMAL, 42, 43, 44, 41); + pci_register_slot(0x10, PCI_CARD_NORMAL, 0x41, 0x42, 0x43, 0x44); + pci_register_slot(0x11, PCI_CARD_NORMAL, 0x44, 0x41, 0x42, 0x43); + pci_register_slot(0x12, PCI_CARD_NORMAL, 0x43, 0x44, 0x41, 0x42); + pci_register_slot(0x0F, PCI_CARD_NORMAL, 0x42, 0x43, 0x44, 0x41); device_add(&sis_5511_device); device_add(&keyboard_ps2_ami_pci_device); From fcfca020af39cd8843bef6d78f0afe8317376358 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Tue, 30 Aug 2022 17:42:52 -0300 Subject: [PATCH 314/386] Correct 5ivg PCI steering table --- src/machine/m_at_socket7.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/machine/m_at_socket7.c b/src/machine/m_at_socket7.c index 043faddda..1fb4abfdc 100644 --- a/src/machine/m_at_socket7.c +++ b/src/machine/m_at_socket7.c @@ -332,8 +332,8 @@ machine_at_5ivg_init(const machine_t *model) pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); - pci_register_slot(0x11, PCI_CARD_NORMAL, 2, 3, 4, 1); - pci_register_slot(0x12, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1); pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2); pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); device_add(&i430vx_device); From a08ad7007d20259d2454dcfae095ac5caaf752d5 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 30 Aug 2022 16:47:32 -0400 Subject: [PATCH 315/386] Use defines for roms --- src/sound/midi_mt32.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/src/sound/midi_mt32.c b/src/sound/midi_mt32.c index bb7cb97c2..ec0850282 100644 --- a/src/sound/midi_mt32.c +++ b/src/sound/midi_mt32.c @@ -15,6 +15,10 @@ #include <86box/ui.h> #include +#define MT32_CTRL_ROM "roms/sound/mt32/MT32_CONTROL.ROM" +#define MT32_PCM_ROM "roms/sound/mt32/MT32_PCM.ROM" +#define CM32L_CTRL_ROM "roms/sound/cm32l/CM32L_CONTROL.ROM" +#define CM32L_PCM_ROM "roms/sound/cm32l/CM32L_PCM.ROM" extern void givealbuffer_midi(void *buf, uint32_t size); extern void al_set_midi(int freq, int buf_size); @@ -114,7 +118,7 @@ int mt32_available() { if (roms_present[0] < 0) - roms_present[0] = (rom_present("roms/sound/mt32/MT32_CONTROL.ROM") && rom_present("roms/sound/mt32/MT32_PCM.ROM")); + roms_present[0] = (rom_present(MT32_CTRL_ROM) && rom_present(MT32_PCM_ROM)); return roms_present[0]; } @@ -122,7 +126,7 @@ int cm32l_available() { if (roms_present[1] < 0) - roms_present[1] = (rom_present("roms/sound/cm32l/CM32L_CONTROL.ROM") && rom_present("roms/sound/cm32l/CM32L_PCM.ROM")); + roms_present[1] = (rom_present(CM32L_CTRL_ROM) && rom_present(CM32L_PCM_ROM)); return roms_present[1]; } @@ -299,13 +303,13 @@ mt32emu_init(char *control_rom, char *pcm_rom) void * mt32_init(const device_t *info) { - return mt32emu_init("roms/sound/mt32/MT32_CONTROL.ROM", "roms/sound/mt32/MT32_PCM.ROM"); + return mt32emu_init(MT32_CTRL_ROM, MT32_PCM_ROM); } void * cm32l_init(const device_t *info) { - return mt32emu_init("roms/sound/cm32l/CM32L_CONTROL.ROM", "roms/sound/cm32l/CM32L_PCM.ROM"); + return mt32emu_init(CM32L_CTRL_ROM, CM32L_PCM_ROM); } void From 9daa721d44dc2a650fe49a64a430d9998cfc40c4 Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Tue, 30 Aug 2022 17:18:51 -0400 Subject: [PATCH 316/386] qt: Add media history manager for recently used images --- src/config.c | 18 ++ src/include/86box/86box.h | 4 + src/include/86box/cdrom.h | 4 + src/qt/CMakeLists.txt | 3 + src/qt/qt_mediahistorymanager.cpp | 326 ++++++++++++++++++++++++++++++ src/qt/qt_mediahistorymanager.hpp | 139 +++++++++++++ src/qt/qt_mediamenu.cpp | 67 ++++-- src/qt/qt_mediamenu.hpp | 11 +- src/qt/qt_platform.cpp | 6 + 9 files changed, 564 insertions(+), 14 deletions(-) create mode 100644 src/qt/qt_mediahistorymanager.cpp create mode 100644 src/qt/qt_mediahistorymanager.hpp diff --git a/src/config.c b/src/config.c index 0c6c0e28b..45655c8a7 100644 --- a/src/config.c +++ b/src/config.c @@ -1829,6 +1829,15 @@ load_floppy_and_cdrom_drives(void) sprintf(temp, "cdrom_%02i_iso_path", c + 1); config_delete_var(cat, temp); + + for (int i = 0; i < MAX_PREV_IMAGES; i++) { + cdrom[c].image_history[i] = (char *) calloc(MAX_IMAGE_PATH_LEN + 1, sizeof(char)); + sprintf(temp, "cdrom_%02i_image_history_%02i", c + 1, i + 1); + p = config_get_string(cat, temp, NULL); + if(p) { + sprintf(cdrom[c].image_history[i], "%s", p); + } + } } } @@ -3137,6 +3146,15 @@ save_floppy_and_cdrom_drives(void) } else { config_set_string(cat, temp, cdrom[c].image_path); } + + for (int i = 0; i < MAX_PREV_IMAGES; i++) { + sprintf(temp, "cdrom_%02i_image_history_%02i", c + 1, i + 1); + if(strlen(cdrom[c].image_history[i]) == 0) { + config_delete_var(cat, temp); + } else { + config_set_string(cat, temp, cdrom[c].image_history[i]); + } + } } delete_section_if_empty(cat); diff --git a/src/include/86box/86box.h b/src/include/86box/86box.h index 28c370e78..fce923e4f 100644 --- a/src/include/86box/86box.h +++ b/src/include/86box/86box.h @@ -31,6 +31,10 @@ #define NVR_PATH "nvr" #define SCREENSHOT_PATH "screenshots" +/* Recently used images */ +#define MAX_PREV_IMAGES 4 +#define MAX_IMAGE_PATH_LEN 256 + /* Default language 0xFFFF = from system, 0x409 = en-US */ #define DEFAULT_LANGUAGE 0x0409 diff --git a/src/include/86box/cdrom.h b/src/include/86box/cdrom.h index f9040a4ed..4daad5821 100644 --- a/src/include/86box/cdrom.h +++ b/src/include/86box/cdrom.h @@ -39,6 +39,8 @@ #define CD_TOC_SESSION 1 #define CD_TOC_RAW 2 +#define CD_IMAGE_HISTORY 4 + #define BUF_SIZE 32768 #define CDROM_IMAGE 200 @@ -110,6 +112,8 @@ typedef struct cdrom { char image_path[1024], prev_image_path[1024]; + char *image_history[CD_IMAGE_HISTORY]; + uint32_t sound_on, cdrom_capacity, pad, seek_pos, seek_diff, cd_end; diff --git a/src/qt/CMakeLists.txt b/src/qt/CMakeLists.txt index 1db01301d..6a4b74bd0 100644 --- a/src/qt/CMakeLists.txt +++ b/src/qt/CMakeLists.txt @@ -166,6 +166,9 @@ add_library(ui STATIC qt_mcadevicelist.cpp qt_mcadevicelist.ui + qt_mediahistorymanager.cpp + qt_mediahistorymanager.hpp + ../qt_resources.qrc ) diff --git a/src/qt/qt_mediahistorymanager.cpp b/src/qt/qt_mediahistorymanager.cpp new file mode 100644 index 000000000..2c08f66f9 --- /dev/null +++ b/src/qt/qt_mediahistorymanager.cpp @@ -0,0 +1,326 @@ +/* +* 86Box A hypervisor and IBM PC system emulator that specializes in +* running old operating systems and software designed for IBM +* PC systems and compatibles from 1981 through fairly recent +* system designs based on the PCI bus. +* +* This file is part of the 86Box distribution. +* +* Media history management module +* +* +* +* Authors: cold-brewed +* +* Copyright 2022 The 86Box development team +*/ + + +#include +#include +#include +#include +#include + +#include "86box/cdrom.h" +#include "qt_mediahistorymanager.hpp" + +namespace ui { + +MediaHistoryManager::MediaHistoryManager() { + initializeImageHistory(); + deserializeAllImageHistory(); + initialDeduplication(); + +} + +MediaHistoryManager::~MediaHistoryManager() += default; + +master_list_t & +MediaHistoryManager::blankImageHistory(master_list_t &initialized_master_list) const +{ + for ( const auto device_type : ui::AllSupportedMediaHistoryTypes ) { + device_media_history_t device_media_history; + // Loop for all possible media devices + for (int device_index = 0 ; device_index < maxDevicesSupported(device_type); device_index++) { + device_index_list_t indexing_list; + device_media_history[device_index] = indexing_list; + // Loop for each history slot + for (int slot_index = 0; slot_index < max_images; slot_index++) { + device_media_history[device_index].append(QString()); + } + } + initialized_master_list.insert(device_type, device_media_history); + } + return initialized_master_list; +} + + +const device_index_list_t& +MediaHistoryManager::getHistoryListForDeviceIndex(int index, ui::MediaType type) +{ + if (master_list.contains(type)) { + if ((index >= 0 ) && (index < master_list[type].size())) { + return master_list[type][index]; + } else { + qWarning("Media device index %i for device type %s was requested but index %i is out of range (valid range: >= 0 && < %i)", + index, mediaTypeToString(type).toUtf8().constData(), index, master_list[type].size()); + } + } + // Failure gets an empty list + return empty_device_index_list; +} + +void MediaHistoryManager::setHistoryListForDeviceIndex(int index, ui::MediaType type, device_index_list_t history_list) +{ + master_list[type][index] = std::move(history_list); +} + +QString +MediaHistoryManager::getImageForSlot(int index, int slot, ui::MediaType type) +{ + QString image_name; + device_index_list_t device_history = getHistoryListForDeviceIndex(index, type); + if ((slot >= 0) && (slot < device_history.size())) { + image_name = device_history[slot]; + } else { + qWarning("Media history slot %i, index %i for device type %s was requested but slot %i is out of range (valid range: >= 0 && < %i, device_history.size() is %i)", + slot, index, mediaTypeToString(type).toUtf8().constData(), slot, maxDevicesSupported(type), device_history.size()); + } + return image_name; +} + +// These are hardcoded since we can't include the various +// header files where they are defined (e.g., fdd.h, mo.h). +// However, all in ui::MediaType support 4 except cassette. +int MediaHistoryManager::maxDevicesSupported(ui::MediaType type) +{ + return type == ui::MediaType::Cassette ? 1 : 4; + +} + +void MediaHistoryManager::deserializeImageHistoryType(ui::MediaType type) +{ + for (int device = 0; device < maxDevicesSupported(type); device++) { + char **device_history_ptr = getEmuHistoryVarForType(type, device); + if(device_history_ptr == nullptr) { + // Device not supported, return and do not deserialize. + // This will leave the image listing at the default initialization state + // from the ui side (this class) + continue; + } + for ( int slot = 0; slot < MAX_PREV_IMAGES; slot++) { + master_list[type][device][slot] = device_history_ptr[slot]; + } + } +} +void MediaHistoryManager::deserializeAllImageHistory() +{ + for ( const auto device_type : ui::AllSupportedMediaHistoryTypes ) { + deserializeImageHistoryType(device_type); + } +} +void MediaHistoryManager::serializeImageHistoryType(ui::MediaType type) +{ + for (int device = 0; device < maxDevicesSupported(type); device++) { + char **device_history_ptr = getEmuHistoryVarForType(type, device); + if(device_history_ptr == nullptr) { + // Device not supported, return and do not serialize. + // This will leave the image listing at the current state, + // and it will not be saved on the emu side + continue; + } + for ( int slot = 0; slot < MAX_PREV_IMAGES; slot++) { + strncpy(device_history_ptr[slot], master_list[type][device][slot].toUtf8().constData(), MAX_IMAGE_PATH_LEN); + + } + } +} + +void MediaHistoryManager::serializeAllImageHistory() +{ + for ( const auto device_type : ui::AllSupportedMediaHistoryTypes ) { + serializeImageHistoryType(device_type); + } +} + +void MediaHistoryManager::initialDeduplication() +{ + + QString current_image; + // Perform initial dedup if an image is loaded + for ( const auto device_type : ui::AllSupportedMediaHistoryTypes ) { + for (int device_index = 0; device_index < maxDevicesSupported(device_type); device_index++) { + device_index_list_t device_history = getHistoryListForDeviceIndex(device_index, device_type); + switch (device_type) { + case ui::MediaType::Optical: + current_image = cdrom[device_index].image_path; + break; + default: + continue; + break; + } + deduplicateList(device_history, QVector (1, current_image)); + // Fill in missing, if any + int missing = MAX_PREV_IMAGES - device_history.size(); + if(missing) { + for (int i = 0; i < missing; i++) { + device_history.push_back(QString()); + } + } + setHistoryListForDeviceIndex(device_index, device_type, device_history); + } + } +} + +char ** MediaHistoryManager::getEmuHistoryVarForType(ui::MediaType type, int index) +{ + switch (type) { + case ui::MediaType::Optical: + return &cdrom[index].image_history[0]; + default: + return nullptr; + + } +} + +device_index_list_t & +MediaHistoryManager::deduplicateList(device_index_list_t &device_history, const QVector& filenames) +{ + QVector items_to_delete; + for (auto &list_item_path : device_history) { + if(list_item_path.isEmpty()) { + continue ; + } + for (const auto& path_to_check : filenames) { + if(path_to_check.isEmpty()) { + continue ; + } + QString adjusted_path = pathAdjustSingle(path_to_check); + int match = QString::localeAwareCompare(list_item_path, adjusted_path); + if (match == 0) { + items_to_delete.append(list_item_path); + } + } + } + // Remove by name rather than index because the index would change + // after each removal + for (const auto& path: items_to_delete) { + device_history.removeAll(path); + } + return device_history; +} + +void MediaHistoryManager::addImageToHistory(int index, ui::MediaType type, const QString& image_name, const QString& new_image_name) +{ + device_index_list_t device_history = getHistoryListForDeviceIndex(index, type); + QVector files_to_check; + + files_to_check.append(image_name); + files_to_check.append(new_image_name); + device_history = deduplicateList(device_history, files_to_check); + + + if (!image_name.isEmpty()) { + device_history.push_front(image_name); + } + + // Pop any extras + if ((device_history.size() > MAX_PREV_IMAGES)) { + device_history.pop_back(); + } + + // Fill in missing, if any + int missing = MAX_PREV_IMAGES - device_history.size(); + if(missing) { + for (int i = 0; i < missing; i++) { + device_history.push_back(QString()); + } + } + + device_history = removeMissingImages(device_history); + device_history = pathAdjustFull(device_history); + + setHistoryListForDeviceIndex(index, type, device_history); + serializeImageHistoryType(type); +} + +QString MediaHistoryManager::mediaTypeToString(ui::MediaType type) +{ + QMetaEnum qme = QMetaEnum::fromType(); + return qme.valueToKey(static_cast(type)); +} + +QString +MediaHistoryManager::pathAdjustSingle(QString checked_path) +{ + QString current_usr_path = getUsrPath(); + QFileInfo file_info(checked_path); + if (file_info.filePath().isEmpty() || current_usr_path.isEmpty() || file_info.isRelative()) { + return checked_path; + } + if (file_info.filePath().startsWith(current_usr_path)) { + checked_path = file_info.filePath().remove(current_usr_path); + } + return checked_path; +} + +device_index_list_t & +MediaHistoryManager::pathAdjustFull(device_index_list_t &device_history) +{ + for (auto &checked_path : device_history) { + checked_path = pathAdjustSingle(checked_path); + } + return device_history; +} +QString MediaHistoryManager::getUsrPath() +{ + QString current_usr_path(usr_path); + // Ensure `usr_path` has a trailing slash + return current_usr_path.endsWith("/") ? current_usr_path : current_usr_path.append("/"); +} +device_index_list_t & +MediaHistoryManager::removeMissingImages(device_index_list_t &device_history) +{ + for (auto &checked_path : device_history) { + QFileInfo file_info(checked_path); + if (file_info.filePath().isEmpty()) { + continue; + } + // For this check, explicitly prepend `usr_path` to relative paths to account for $CWD platform variances + QFileInfo absolute_path = file_info.isRelative() ? getUsrPath().append(file_info.filePath()) : file_info; + if(!absolute_path.exists()) { + qWarning("Image file %s does not exist - removing from history", qPrintable(file_info.filePath())); + checked_path = ""; + } + } + return device_history; +} + +void MediaHistoryManager::initializeImageHistory() +{ + auto initial_master_list = getMasterList(); + setMasterList(blankImageHistory(initial_master_list)); +} + +const master_list_t & +MediaHistoryManager::getMasterList() const +{ + return master_list; +} + +void +MediaHistoryManager::setMasterList(const master_list_t &masterList) +{ + master_list = masterList; +} + +void +MediaHistoryManager::clearImageHistory() +{ + initializeImageHistory(); + serializeAllImageHistory(); +} + +} // ui \ No newline at end of file diff --git a/src/qt/qt_mediahistorymanager.hpp b/src/qt/qt_mediahistorymanager.hpp new file mode 100644 index 000000000..0a69aa100 --- /dev/null +++ b/src/qt/qt_mediahistorymanager.hpp @@ -0,0 +1,139 @@ +/* +* 86Box A hypervisor and IBM PC system emulator that specializes in +* running old operating systems and software designed for IBM +* PC systems and compatibles from 1981 through fairly recent +* system designs based on the PCI bus. +* +* This file is part of the 86Box distribution. +* +* Header for the media history management module +* +* +* +* Authors: cold-brewed +* +* Copyright 2022 The 86Box development team +*/ + +#ifndef QT_MEDIAHISTORYMANAGER_HPP +#define QT_MEDIAHISTORYMANAGER_HPP + +#include +#include +#include + +#include + +extern "C" { +#include <86box/86box.h> +} + +// This macro helps give us the required `qHash()` function in order to use the +// enum as a hash key +#define QHASH_FOR_CLASS_ENUM(T) \ +inline uint qHash(const T &t, uint seed) { \ + return ::qHash(static_cast::type>(t), seed); \ +} + +typedef QVector device_index_list_t; +typedef QHash> device_media_history_t; + + +namespace ui { + Q_NAMESPACE + + enum class MediaType { + Floppy, + Optical, + Zip, + Mo, + Cassette + }; + // This macro allows us to do a reverse lookup of the enum with `QMetaEnum` + Q_ENUM_NS(MediaType) + + QHASH_FOR_CLASS_ENUM(MediaType) + + typedef QHash master_list_t; + + // Used to iterate over all supported types when preparing data structures + // Also useful to indicate which types support history + static const MediaType AllSupportedMediaHistoryTypes[] = { + MediaType::Optical + }; + + class MediaHistoryManager { + + public: + MediaHistoryManager(); + virtual ~MediaHistoryManager(); + + // Get the image name for a particular slot, + // index, and type combination + QString getImageForSlot(int index, int slot, ui::MediaType type); + + // Add an image to history + void addImageToHistory(int index, ui::MediaType type, const QString& image_name, const QString& new_image_name); + + // Convert the enum value to a string + static QString mediaTypeToString(ui::MediaType type); + + // Clear out the image history + void clearImageHistory(); + + + private: + int max_images = MAX_PREV_IMAGES; + + // Main hash of hash of vector of strings + master_list_t master_list; + const master_list_t &getMasterList() const; + void setMasterList(const master_list_t &masterList); + + device_index_list_t index_list, empty_device_index_list; + + // Return a blank, initialized image history list + master_list_t &blankImageHistory(master_list_t &initialized_master_list) const; + + // Initialize the image history + void initializeImageHistory(); + + // Max number of devices supported by media type + static int maxDevicesSupported(ui::MediaType type); + + // Serialize the data back into the C array + // on the emu side + void serializeImageHistoryType(ui::MediaType type); + void serializeAllImageHistory(); + + // Deserialize the data from C array on the emu side + // for the ui side + void deserializeImageHistoryType(ui::MediaType type); + void deserializeAllImageHistory(); + + // Get emu history variable for a device type + static char** getEmuHistoryVarForType(ui::MediaType type, int index); + + // Get or set the history for a specific device/index combo + const device_index_list_t &getHistoryListForDeviceIndex(int index, ui::MediaType type); + void setHistoryListForDeviceIndex(int index, ui::MediaType type, device_index_list_t history_list); + + // Remove missing image files from history list + static device_index_list_t &removeMissingImages(device_index_list_t &device_history); + + // If an absolute path is contained within `usr_path`, convert to a relative path + static device_index_list_t &pathAdjustFull(device_index_list_t &device_history); + static QString pathAdjustSingle(QString checked_path); + + // Deduplicate history entries + static device_index_list_t &deduplicateList(device_index_list_t &device_history, const QVector& filenames); + void initialDeduplication(); + + // Gets the `usr_path` from the emu side and appends a + // trailing slash if necessary + static QString getUsrPath(); + }; + +} // ui + +#endif // QT_MEDIAHISTORYMANAGER_HPP diff --git a/src/qt/qt_mediamenu.cpp b/src/qt/qt_mediamenu.cpp index 0050da900..ba52074cf 100644 --- a/src/qt/qt_mediamenu.cpp +++ b/src/qt/qt_mediamenu.cpp @@ -52,6 +52,7 @@ extern "C" { #include "qt_newfloppydialog.hpp" #include "qt_util.hpp" #include "qt_deviceconfig.hpp" +#include "qt_mediahistorymanager.hpp" std::shared_ptr MediaMenu::ptr; @@ -120,8 +121,11 @@ void MediaMenu::refresh(QMenu *parentMenu) { menu->addAction(tr("&Mute"), [this, i]() { cdromMute(i); })->setCheckable(true); menu->addSeparator(); menu->addAction(tr("&Image..."), [this, i]() { cdromMount(i); })->setCheckable(false); - cdromReloadPos = menu->children().count(); - menu->addAction(tr("&Reload previous image"), [this, i]() { cdromReload(i); }); + menu->addSeparator(); + for (int slot = 0; slot < MAX_PREV_IMAGES; slot++) { + cdromImageHistoryPos[slot] = menu->children().count(); + menu->addAction(QString::asprintf(tr("Image %i").toUtf8().constData(), slot), [this, i, slot]() { cdromReload(i, slot); })->setCheckable(false); + } menu->addSeparator(); cdromImagePos = menu->children().count(); menu->addAction(tr("E&ject"), [this, i]() { cdromEject(i); })->setCheckable(false); @@ -170,6 +174,7 @@ void MediaMenu::refresh(QMenu *parentMenu) { netMenus[i] = menu; nicUpdateMenu(i); }); + parentMenu->addAction(tr("Clear image history"), [this]() { clearImageHistory(); }); } void MediaMenu::cassetteNewImage() { @@ -404,14 +409,13 @@ void MediaMenu::cdromMount(int i, const QString &filename) } else { ui_sb_update_icon_state(SB_CDROM | i, 1); } + mhm.addImageToHistory(i, ui::MediaType::Optical, cdrom[i].prev_image_path, cdrom[i].image_path); cdromUpdateMenu(i); ui_sb_update_tip(SB_CDROM | i); config_save(); } void MediaMenu::cdromMount(int i) { - QString dir; - QFileInfo fi(cdrom[i].image_path); auto filename = QFileDialog::getOpenFileName( parentWidget, @@ -430,22 +434,60 @@ void MediaMenu::cdromMount(int i) { } void MediaMenu::cdromEject(int i) { + mhm.addImageToHistory(i, ui::MediaType::Optical, cdrom[i].image_path, QString()); cdrom_eject(i); cdromUpdateMenu(i); ui_sb_update_tip(SB_CDROM | i); } -void MediaMenu::cdromReload(int i) { - cdrom_reload(i); - cdromUpdateMenu(i); - ui_sb_update_tip(SB_CDROM | i); +void MediaMenu::cdromReload(int index, int slot) { + QString filename = mhm.getImageForSlot(index, slot, ui::MediaType::Optical); + cdromMount(index, filename.toUtf8().constData()); + cdromUpdateMenu(index); + ui_sb_update_tip(SB_CDROM | index); +} + +void MediaMenu::updateImageHistory(int index, int slot, ui::MediaType type) { + QMenu* menu; + QAction* imageHistoryUpdatePos; + QString image_path; + QObjectList children; + + switch (type) { + case ui::MediaType::Optical: + if (!cdromMenus.contains(index)) + return; + menu = cdromMenus[index]; + children = menu->children(); + imageHistoryUpdatePos = dynamic_cast(children[cdromImageHistoryPos[slot]]); + image_path = mhm.getImageForSlot(index, slot, type); + break; + case ui::MediaType::Floppy: + if (!floppyMenus.contains(index)) + return; + menu = floppyMenus[index]; + children = menu->children(); + imageHistoryUpdatePos = dynamic_cast(children[floppyImageHistoryPos[slot]]); + image_path = mhm.getImageForSlot(index, slot, type); + break; + default: + pclog("History not yet implemented for media type %s\n", qPrintable(mhm.mediaTypeToString(type))); + return; + } + + QFileInfo fi(image_path); + imageHistoryUpdatePos->setText(QString::asprintf(tr("%s").toUtf8().constData(), fi.fileName().isEmpty() ? tr("previous image").toUtf8().constData() : fi.fileName().toUtf8().constData())); + imageHistoryUpdatePos->setVisible(!fi.fileName().isEmpty()); +} + +void MediaMenu::clearImageHistory() { + mhm.clearImageHistory(); + ui_sb_update_panes(); } void MediaMenu::cdromUpdateMenu(int i) { QString name = cdrom[i].image_path; - QString prev_name = cdrom[i].prev_image_path; QFileInfo fi(cdrom[i].image_path); - QFileInfo fi_prev(cdrom[i].prev_image_path); if (!cdromMenus.contains(i)) return; @@ -459,9 +501,8 @@ void MediaMenu::cdromUpdateMenu(int i) { imageMenu->setEnabled(!name.isEmpty()); imageMenu->setText(QString::asprintf(tr("Eject %s").toUtf8().constData(), name.isEmpty() ? QString().toUtf8().constData() : fi.fileName().toUtf8().constData())); - auto* prevMenu = dynamic_cast(childs[cdromReloadPos]); - prevMenu->setText(QString::asprintf(tr("Reload %s").toUtf8().constData(), prev_name.isEmpty() ? tr("previous image").toUtf8().constData() : fi_prev.fileName().toUtf8().constData())); - prevMenu->setVisible(name.isEmpty() && cdrom[i].prev_host_drive != 0); + for (int slot = 0; slot < MAX_PREV_IMAGES; slot++) + updateImageHistory(i, slot, ui::MediaType::Optical); QString busName = tr("Unknown Bus"); switch (cdrom[i].bus_type) { diff --git a/src/qt/qt_mediamenu.hpp b/src/qt/qt_mediamenu.hpp index de892d73c..4503c1b93 100644 --- a/src/qt/qt_mediamenu.hpp +++ b/src/qt/qt_mediamenu.hpp @@ -3,7 +3,11 @@ #include #include #include +#include "qt_mediahistorymanager.hpp" +extern "C" { +#include <86box/86box.h> +} class QMenu; class MediaMenu : QObject @@ -40,7 +44,9 @@ public: void cdromMount(int i); void cdromMount(int i, const QString& filename); void cdromEject(int i); - void cdromReload(int i); + void cdromReload(int index, int slot); + void updateImageHistory(int index, int slot, ui::MediaType type); + void clearImageHistory(); void cdromUpdateMenu(int i); void zipNewImage(int i); @@ -72,6 +78,7 @@ private: QMap netMenus; QString getMediaOpenDirectory(); + ui::MediaHistoryManager mhm; int cassetteRecordPos; int cassettePlayPos; @@ -87,6 +94,8 @@ private: int cdromMutePos; int cdromReloadPos; int cdromImagePos; + int cdromImageHistoryPos[MAX_PREV_IMAGES]; + int floppyImageHistoryPos[MAX_PREV_IMAGES]; int zipEjectPos; int zipReloadPos; diff --git a/src/qt/qt_platform.cpp b/src/qt/qt_platform.cpp index 8a41769a9..ae0baf64b 100644 --- a/src/qt/qt_platform.cpp +++ b/src/qt/qt_platform.cpp @@ -167,7 +167,13 @@ plat_fopen(const char *path, const char *mode) FILE * plat_fopen64(const char *path, const char *mode) { +#ifdef Q_OS_MACOS + QFileInfo fi(path); + QString filename = fi.isRelative() ? usr_path + fi.filePath() : fi.filePath(); + return fopen(filename.toUtf8().constData(), mode); +#else return fopen(QString::fromUtf8(path).toLocal8Bit(), mode); +#endif } int From b59f8ab14d57ee9a10a31f55f53796f262350fad Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 30 Aug 2022 16:50:29 -0400 Subject: [PATCH 317/386] Add CM-32LN Update midi_mt32.c --- src/include/86box/midi.h | 1 + src/sound/midi.c | 1 + src/sound/midi_mt32.c | 35 +++++++++++++++++++++++++++++++++-- 3 files changed, 35 insertions(+), 2 deletions(-) diff --git a/src/include/86box/midi.h b/src/include/86box/midi.h index 01ec88881..0ae167ace 100644 --- a/src/include/86box/midi.h +++ b/src/include/86box/midi.h @@ -98,6 +98,7 @@ extern const device_t fluidsynth_device; # ifdef USE_MUNT extern const device_t mt32_device; extern const device_t cm32l_device; +extern const device_t cm32ln_device; # endif #endif diff --git a/src/sound/midi.c b/src/sound/midi.c index ae5cdc456..9d3306603 100644 --- a/src/sound/midi.c +++ b/src/sound/midi.c @@ -94,6 +94,7 @@ static const MIDI_OUT_DEVICE devices[] = { #ifdef USE_MUNT { &mt32_device }, { &cm32l_device }, + { &cm32ln_device }, #endif #ifdef USE_RTMIDI { &rtmidi_output_device }, diff --git a/src/sound/midi_mt32.c b/src/sound/midi_mt32.c index ec0850282..6bc26c849 100644 --- a/src/sound/midi_mt32.c +++ b/src/sound/midi_mt32.c @@ -19,6 +19,9 @@ #define MT32_PCM_ROM "roms/sound/mt32/MT32_PCM.ROM" #define CM32L_CTRL_ROM "roms/sound/cm32l/CM32L_CONTROL.ROM" #define CM32L_PCM_ROM "roms/sound/cm32l/CM32L_PCM.ROM" +#define CM32LN_CTRL_ROM "roms/sound/cm32ln/CM32LN_CONTROL.ROM" +#define CM32LN_PCM_ROM "roms/sound/cm32ln/CM32LN_PCM.ROM" + extern void givealbuffer_midi(void *buf, uint32_t size); extern void al_set_midi(int freq, int buf_size); @@ -62,7 +65,7 @@ static const mt32emu_report_handler_i_v0 handler_mt32_v0 = { NULL, // void (*onProgramChanged)(void *instance_data, mt32emu_bit8u part_num, const char *sound_group_name, const char *patch_name); }; -/** Alternate report handler for Roland CM-32L */ +/** Alternate report handler for Roland CM-32L/CM-32LN */ static const mt32emu_report_handler_i_v0 handler_cm32l_v0 = { /** Returns the actual interface version ID */ get_mt32_report_handler_version, // mt32emu_report_handler_version (*getVersionID)(mt32emu_report_handler_i i); @@ -130,6 +133,14 @@ cm32l_available() return roms_present[1]; } +int +cm32ln_available() +{ + if (roms_present[1] < 0) + roms_present[1] = (rom_present(CM32LN_CTRL_ROM) && rom_present(CM32LN_PCM_ROM)); + return roms_present[1]; +} + static thread_t *thread_h = NULL; static event_t *event = NULL; static event_t *start_event = NULL; @@ -244,7 +255,7 @@ mt32emu_init(char *control_rom, char *pcm_rom) midi_device_t *dev; char fn[512]; - context = mt32emu_create_context(strstr(control_rom, "CM32L_CONTROL.ROM") ? handler_cm32l : handler_mt32, NULL); + context = mt32emu_create_context(strstr(control_rom, "MT32_CONTROL.ROM") ? handler_mt32 : handler_cm32l, NULL); if (!rom_getfile(control_rom, fn, 512)) return 0; @@ -312,6 +323,12 @@ cm32l_init(const device_t *info) return mt32emu_init(CM32L_CTRL_ROM, CM32L_PCM_ROM); } +void * +cm32ln_init(const device_t *info) +{ + return mt32emu_init(CM32LN_CTRL_ROM, CM32LN_PCM_ROM); +} + void mt32_close(void *p) { @@ -414,3 +431,17 @@ const device_t cm32l_device = { .force_redraw = NULL, .config = mt32_config }; + +const device_t cm32ln_device = { + .name = "Roland CM-32LN Emulation", + .internal_name = "cm32ln", + .flags = 0, + .local = 0, + .init = cm32ln_init, + .close = mt32_close, + .reset = NULL, + { .available = cm32ln_available }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = mt32_config +}; From 1e201dce09c9164a60e1a1f5852f9d5db6b6e233 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 30 Aug 2022 16:56:47 -0400 Subject: [PATCH 318/386] Rename rom define for old mt32 --- src/include/86box/midi.h | 2 +- src/sound/midi.c | 2 +- src/sound/midi_mt32.c | 26 +++++++++++++------------- 3 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src/include/86box/midi.h b/src/include/86box/midi.h index 0ae167ace..9aae23f55 100644 --- a/src/include/86box/midi.h +++ b/src/include/86box/midi.h @@ -96,7 +96,7 @@ extern const device_t rtmidi_input_device; extern const device_t fluidsynth_device; # endif # ifdef USE_MUNT -extern const device_t mt32_device; +extern const device_t mt32_old_device; extern const device_t cm32l_device; extern const device_t cm32ln_device; # endif diff --git a/src/sound/midi.c b/src/sound/midi.c index 9d3306603..851e9cfad 100644 --- a/src/sound/midi.c +++ b/src/sound/midi.c @@ -92,7 +92,7 @@ static const MIDI_OUT_DEVICE devices[] = { { &fluidsynth_device }, #endif #ifdef USE_MUNT - { &mt32_device }, + { &mt32_old_device }, { &cm32l_device }, { &cm32ln_device }, #endif diff --git a/src/sound/midi_mt32.c b/src/sound/midi_mt32.c index 6bc26c849..05002b1f3 100644 --- a/src/sound/midi_mt32.c +++ b/src/sound/midi_mt32.c @@ -15,12 +15,12 @@ #include <86box/ui.h> #include -#define MT32_CTRL_ROM "roms/sound/mt32/MT32_CONTROL.ROM" -#define MT32_PCM_ROM "roms/sound/mt32/MT32_PCM.ROM" -#define CM32L_CTRL_ROM "roms/sound/cm32l/CM32L_CONTROL.ROM" -#define CM32L_PCM_ROM "roms/sound/cm32l/CM32L_PCM.ROM" -#define CM32LN_CTRL_ROM "roms/sound/cm32ln/CM32LN_CONTROL.ROM" -#define CM32LN_PCM_ROM "roms/sound/cm32ln/CM32LN_PCM.ROM" +#define MT32_OLD_CTRL_ROM "roms/sound/mt32/MT32_CONTROL.ROM" +#define MT32_OLD_PCM_ROM "roms/sound/mt32/MT32_PCM.ROM" +#define CM32L_CTRL_ROM "roms/sound/cm32l/CM32L_CONTROL.ROM" +#define CM32L_PCM_ROM "roms/sound/cm32l/CM32L_PCM.ROM" +#define CM32LN_CTRL_ROM "roms/sound/cm32ln/CM32LN_CONTROL.ROM" +#define CM32LN_PCM_ROM "roms/sound/cm32ln/CM32LN_PCM.ROM" extern void givealbuffer_midi(void *buf, uint32_t size); extern void al_set_midi(int freq, int buf_size); @@ -118,10 +118,10 @@ mt32_check(const char *func, mt32emu_return_code ret, mt32emu_return_code expect } int -mt32_available() +mt32_old_available() { if (roms_present[0] < 0) - roms_present[0] = (rom_present(MT32_CTRL_ROM) && rom_present(MT32_PCM_ROM)); + roms_present[0] = (rom_present(MT32_OLD_CTRL_ROM) && rom_present(MT32_OLD_PCM_ROM)); return roms_present[0]; } @@ -312,9 +312,9 @@ mt32emu_init(char *control_rom, char *pcm_rom) } void * -mt32_init(const device_t *info) +mt32_old_init(const device_t *info) { - return mt32emu_init(MT32_CTRL_ROM, MT32_PCM_ROM); + return mt32emu_init(MT32_OLD_CTRL_ROM, MT32_OLD_PCM_ROM); } void * @@ -404,15 +404,15 @@ static const device_config_t mt32_config[] = { // clang-format on }; -const device_t mt32_device = { +const device_t mt32_old_device = { .name = "Roland MT-32 Emulation", .internal_name = "mt32", .flags = 0, .local = 0, - .init = mt32_init, + .init = mt32_old_init, .close = mt32_close, .reset = NULL, - { .available = mt32_available }, + { .available = mt32_old_available }, .speed_changed = NULL, .force_redraw = NULL, .config = mt32_config From 4a759e5f98c5e35a4edc114e995d42626e7f2d0c Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 30 Aug 2022 17:08:02 -0400 Subject: [PATCH 319/386] Add Roland MT-32 2.x device --- src/include/86box/midi.h | 1 + src/sound/midi.c | 1 + src/sound/midi_mt32.c | 30 ++++++++++++++++++++++++++++++ 3 files changed, 32 insertions(+) diff --git a/src/include/86box/midi.h b/src/include/86box/midi.h index 9aae23f55..d3ed78af4 100644 --- a/src/include/86box/midi.h +++ b/src/include/86box/midi.h @@ -97,6 +97,7 @@ extern const device_t fluidsynth_device; # endif # ifdef USE_MUNT extern const device_t mt32_old_device; +extern const device_t mt32_new_device; extern const device_t cm32l_device; extern const device_t cm32ln_device; # endif diff --git a/src/sound/midi.c b/src/sound/midi.c index 851e9cfad..b150c423b 100644 --- a/src/sound/midi.c +++ b/src/sound/midi.c @@ -93,6 +93,7 @@ static const MIDI_OUT_DEVICE devices[] = { #endif #ifdef USE_MUNT { &mt32_old_device }, + { &mt32_new_device }, { &cm32l_device }, { &cm32ln_device }, #endif diff --git a/src/sound/midi_mt32.c b/src/sound/midi_mt32.c index 05002b1f3..914680010 100644 --- a/src/sound/midi_mt32.c +++ b/src/sound/midi_mt32.c @@ -17,6 +17,8 @@ #define MT32_OLD_CTRL_ROM "roms/sound/mt32/MT32_CONTROL.ROM" #define MT32_OLD_PCM_ROM "roms/sound/mt32/MT32_PCM.ROM" +#define MT32_NEW_CTRL_ROM "roms/sound/mt32_new/MT32_CONTROL.ROM" +#define MT32_NEW_PCM_ROM "roms/sound/mt32_new/MT32_PCM.ROM" #define CM32L_CTRL_ROM "roms/sound/cm32l/CM32L_CONTROL.ROM" #define CM32L_PCM_ROM "roms/sound/cm32l/CM32L_PCM.ROM" #define CM32LN_CTRL_ROM "roms/sound/cm32ln/CM32LN_CONTROL.ROM" @@ -125,6 +127,14 @@ mt32_old_available() return roms_present[0]; } +int +mt32_new_available() +{ + if (roms_present[0] < 0) + roms_present[0] = (rom_present(MT32_NEW_CTRL_ROM) && rom_present(MT32_NEW_PCM_ROM)); + return roms_present[0]; +} + int cm32l_available() { @@ -317,6 +327,12 @@ mt32_old_init(const device_t *info) return mt32emu_init(MT32_OLD_CTRL_ROM, MT32_OLD_PCM_ROM); } +void * +mt32_new_init(const device_t *info) +{ + return mt32emu_init(MT32_NEW_CTRL_ROM, MT32_NEW_PCM_ROM); +} + void * cm32l_init(const device_t *info) { @@ -418,6 +434,20 @@ const device_t mt32_old_device = { .config = mt32_config }; +const device_t mt32_new_device = { + .name = "Roland MT-32 (New) Emulation", + .internal_name = "mt32", + .flags = 0, + .local = 0, + .init = mt32_new_init, + .close = mt32_close, + .reset = NULL, + { .available = mt32_new_available }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = mt32_config +}; + const device_t cm32l_device = { .name = "Roland CM-32L Emulation", .internal_name = "cm32l", From b7aeb806ab4b9563a8cb28b6848c6ff0c0d02fb0 Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Tue, 30 Aug 2022 19:35:44 -0400 Subject: [PATCH 320/386] Media history: Address potential null pointer when saving config --- src/config.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/config.c b/src/config.c index 45655c8a7..55dd5dff2 100644 --- a/src/config.c +++ b/src/config.c @@ -3149,7 +3149,7 @@ save_floppy_and_cdrom_drives(void) for (int i = 0; i < MAX_PREV_IMAGES; i++) { sprintf(temp, "cdrom_%02i_image_history_%02i", c + 1, i + 1); - if(strlen(cdrom[c].image_history[i]) == 0) { + if((cdrom[c].image_history[i] == 0) || strlen(cdrom[c].image_history[i]) == 0) { config_delete_var(cat, temp); } else { config_set_string(cat, temp, cdrom[c].image_history[i]); From 23e587b9091e85fab9a80f6c38b1c20a965387eb Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Tue, 30 Aug 2022 19:38:22 -0400 Subject: [PATCH 321/386] qt: Append usr_path for relative paths in plat_fopen64() on linux as well as macOS --- src/qt/qt_platform.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_platform.cpp b/src/qt/qt_platform.cpp index ae0baf64b..019d38cf4 100644 --- a/src/qt/qt_platform.cpp +++ b/src/qt/qt_platform.cpp @@ -167,7 +167,7 @@ plat_fopen(const char *path, const char *mode) FILE * plat_fopen64(const char *path, const char *mode) { -#ifdef Q_OS_MACOS +#if defined(Q_OS_MACOS) or defined(Q_OS_LINUX) QFileInfo fi(path); QString filename = fi.isRelative() ? usr_path + fi.filePath() : fi.filePath(); return fopen(filename.toUtf8().constData(), mode); From 79ede777c6580256244efe1c18f27c25142e7050 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Wed, 31 Aug 2022 13:48:13 +0600 Subject: [PATCH 322/386] Correct INTA and INTB pins for southbridge --- src/machine/m_at_socket7_3v.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/machine/m_at_socket7_3v.c b/src/machine/m_at_socket7_3v.c index 69d325aaf..ef43077b5 100644 --- a/src/machine/m_at_socket7_3v.c +++ b/src/machine/m_at_socket7_3v.c @@ -522,7 +522,7 @@ machine_at_ms5124_init(const machine_t *model) pci_init(PCI_CONFIG_TYPE_1); pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); - pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); + pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0xFE, 0xFF, 0, 0); pci_register_slot(0x10, PCI_CARD_NORMAL, 0x41, 0x42, 0x43, 0x44); pci_register_slot(0x11, PCI_CARD_NORMAL, 0x44, 0x41, 0x42, 0x43); pci_register_slot(0x12, PCI_CARD_NORMAL, 0x43, 0x44, 0x41, 0x42); From 06599013eaca9b5cc7c55bda57c62f26f100c52a Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Wed, 31 Aug 2022 15:10:42 -0300 Subject: [PATCH 323/386] Jenkins: Add x86_64h slice and patch in Qt Vulkan for it and arm64 --- .ci/Jenkinsfile | 13 +++-- .ci/build.sh | 61 ++++++++++++++++---- .ci/dependencies_macports.txt | 3 + CMakeLists.txt | 2 +- src/include_make/86box/version.h | 8 +-- src/unix/assets/86Box.spec | 4 +- src/unix/assets/net.86box.86Box.metainfo.xml | 2 +- vcpkg.json | 2 +- 8 files changed, 68 insertions(+), 27 deletions(-) diff --git a/.ci/Jenkinsfile b/.ci/Jenkinsfile index 26ee36593..d7b2f94aa 100644 --- a/.ci/Jenkinsfile +++ b/.ci/Jenkinsfile @@ -25,7 +25,7 @@ def buildBranch = env.JOB_BASE_NAME.contains('-') ? 1 : 0 def osArchs = [ 'Windows': ['32', '64'], 'Linux': ['x86', 'x86_64', 'arm32', 'arm64'], - 'macOS': ['x86_64+arm64'] + 'macOS': ['x86_64+x86_64h+arm64'] ] def osFlags = [ @@ -261,12 +261,13 @@ pipeline { osArchs.each { os, thisOsArchs -> def combinations = [:] thisOsArchs.each { arch -> - def thisArchDynarecs = dynarecArchs[arch.toLowerCase()] + def archSlug = arch.replace('+x86_64h', '') /* all instances of arch except the one passed to -b */ + def thisArchDynarecs = dynarecArchs[archSlug.toLowerCase()] if (!thisArchDynarecs) thisArchDynarecs = ['NoDR'] thisArchDynarecs.each { dynarec -> presets.each { preset -> - def combination = "$os $arch $dynarec $preset" + def combination = "$os $archSlug $dynarec $preset" combinations[combination] = { catchError(buildResult: 'FAILURE', stageResult: 'SUCCESS') { retry(10) { @@ -278,11 +279,11 @@ pipeline { /* Switch to output directory. */ dir("${env.WORKSPACE_TMP}/output") { /* Run build process. */ - def packageName = "${env.JOB_BASE_NAME}${dynarecSlugs[dynarec]}${presetSlugs[preset]}-$os-$arch$buildSuffix" + def packageName = "${env.JOB_BASE_NAME}${dynarecSlugs[dynarec]}${presetSlugs[preset]}-$os-$archSlug$buildSuffix" def ret = -1 - def archName = archNames[arch] + def archName = archNames[archSlug] if (os == 'macOS') - archName = archNamesMac[arch] + archName = archNamesMac[archSlug] dir("${dynarecNames[dynarec]}/$os - $archName") { ret = runBuild("-b \"$packageName\" \"$arch\" ${presetFlags[preset]} ${dynarecFlags[dynarec]} ${osFlags[os]} $buildFlags") } diff --git a/.ci/build.sh b/.ci/build.sh index b5edae736..d129b4edf 100644 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -37,10 +37,17 @@ # build_arch x86_64 (or arm64) # universal_archs (blank) # ui_interactive no -# macosx_deployment_target 10.13 (for x86_64, or 11.0 for arm64) +# macosx_deployment_target 10.13 (for x86_64, 10.14 for Qt Vulkan, or 11.0 for arm64) # - For universal building on Apple Silicon hardware, install native MacPorts on the default # /opt/local and Intel MacPorts on /opt/intel, then tell build.sh to build for "x86_64+arm64" -# - port is called through sudo to manage dependencies; make sure it is configured +# - Qt Vulkan support through MoltenVK requires 10.14 while we target 10.13. We deal with that +# (at least for now) by abusing the x86_64h universal slice to branch Haswell and newer Macs +# into a Vulkan-enabled but 10.14+ binary, with older ones opting for a 10.13-compatible, +# non-Vulkan binary. With this approach, the only machines that miss out on Vulkan despite +# supporting Metal are Ivy Bridge ones as well as GPU-upgraded Mac Pros. For building that +# Vulkan binary, install another Intel MacPorts on /opt/x86_64h, then use the "x86_64h" +# architecture when invoking build.sh (either standalone or as part of an universal build) +# - port and sed are called through sudo to manage dependencies; make sure those are configured # as NOPASSWD in /etc/sudoers if you're doing unattended builds # @@ -401,10 +408,10 @@ then args= [ $strip -ne 0 ] && args="-t $args" case $arch_universal in # workaround: force new dynarec on for ARM - arm32 | arm64) cmake_flags_extra="-D NEW_DYNAREC=ON";; - *) cmake_flags_extra=;; + arm*) cmake_flags_extra="-D NEW_DYNAREC=ON";; + *) cmake_flags_extra=;; esac - zsh -lc 'exec "'"$0"'" -n -b "universal part" "'"$arch_universal"'" '"$args""$cmake_flags"' '"$cmake_flags_extra" + zsh -lc 'exec "'"$0"'" -n -b "universal slice" "'"$arch_universal"'" '"$args""$cmake_flags"' '"$cmake_flags_extra" status=$? if [ $status -eq 0 ] @@ -538,8 +545,8 @@ then # Switch into the correct architecture if required. case $arch in - x86_64) arch_mac="i386";; - *) arch_mac="$arch";; + x86_64*) arch_mac="i386";; + *) arch_mac="$arch";; esac if [ "$(arch)" != "$arch" -a "$(arch)" != "$arch_mac" ] then @@ -560,17 +567,33 @@ then [ "$arch" = "x86_64" -a -e "/opt/intel/bin/port" ] && macports="/opt/intel" export PATH="$macports/bin:$macports/sbin:$macports/libexec/qt5/bin:$PATH" - # Install dependencies only if we're in a new build and/or architecture. - if check_buildtag "$(arch)" + # Enable MoltenVK on x86_64h and arm64, but not on x86_64. + # The rationale behind that is explained on the big comment up top. + moltenvk=0 + if [ "$arch" != "x86_64" ] + then + moltenvk=1 + cmake_flags_extra="$cmake_flags_extra -D MOLTENVK=ON -D \"MOLTENVK_INCLUDE_DIR=$macports\"" + fi + + # Install dependencies only if we're in a new build and/or MacPorts prefix. + if check_buildtag "$(basename "$macports")" then # Install dependencies. echo [-] Installing dependencies through MacPorts sudo "$macports/bin/port" selfupdate + if [ $moltenvk -ne 0 ] + then + # Patch Qt to enable Vulkan support where supported. + qt5_portfile="$macports/var/macports/sources/rsync.macports.org/macports/release/tarballs/ports/aqua/qt5/Portfile" + sudo sed -i -e 's/-no-feature-vulkan/-feature-vulkan/g' "$qt5_portfile" + sudo sed -i -e 's/configure.env-append MAKE=/configure.env-append VULKAN_SDK=${prefix} MAKE=/g' "$qt5_portfile" + fi sudo "$macports/bin/port" install $(cat .ci/dependencies_macports.txt) # Save build tag to skip this later. Doing it here (once everything is # in place) is important to avoid potential issues with retried builds. - save_buildtag "$(arch)" + save_buildtag "$(basename "$macports")" else echo [-] Not installing dependencies again @@ -697,7 +720,7 @@ rm -rf build # Add ARCH to skip the arch_detect process. case $arch in 32 | x86) cmake_flags_extra="$cmake_flags_extra -D ARCH=i386";; - 64 | x86_64) cmake_flags_extra="$cmake_flags_extra -D ARCH=x86_64";; + 64 | x86_64*) cmake_flags_extra="$cmake_flags_extra -D ARCH=x86_64";; ARM32 | arm32) cmake_flags_extra="$cmake_flags_extra -D ARCH=arm";; ARM64 | arm64) cmake_flags_extra="$cmake_flags_extra -D ARCH=arm64";; *) cmake_flags_extra="$cmake_flags_extra -D \"ARCH=$arch\"";; @@ -778,7 +801,7 @@ fi # Determine Discord Game SDK architecture. case $arch in 32) arch_discord="x86";; - 64) arch_discord="x86_64";; + 64 | x86_64*) arch_discord="x86_64";; arm64 | ARM64) arch_discord="aarch64";; *) arch_discord="$arch";; esac @@ -844,6 +867,20 @@ then unzip -j "$discord_zip" "lib/$arch_discord/discord_game_sdk.dylib" -d "archive_tmp/"*".app/Contents/Frameworks" [ ! -e "archive_tmp/"*".app/Contents/Frameworks/discord_game_sdk.dylib" ] && echo [!] No Discord Game SDK for architecture [$arch_discord] + # Hack to convert x86_64 binaries to x86_64h when building that architecture. + if [ "$arch" = "x86_64h" ] + then + find archive_tmp -type f | while IFS= read line + do + # Act only on 64-bit Mach-Os (0xFEEDFACF) for CPU type x86_64 (0x01000007). + if [ "$(dd if="$line" bs=1 count=8 status=none)" = "$(printf '\xCF\xFA\xED\xFE\x07\x00\x00\x01')" ] + then + # Change CPU subtype from ALL (0x00000003) to H (0x00000008). + printf '\x08\x00\x00\x00' | dd of="$line" bs=1 seek=8 count=4 conv=notrunc status=none + fi + done + fi + # Sign app bundle, unless we're in an universal build. [ $skip_archive -eq 0 ] && codesign --force --deep -s - "archive_tmp/"*".app" elif [ "$BUILD_TAG" = "precondition" ] diff --git a/.ci/dependencies_macports.txt b/.ci/dependencies_macports.txt index 88270b4da..b78331f9e 100644 --- a/.ci/dependencies_macports.txt +++ b/.ci/dependencies_macports.txt @@ -4,7 +4,10 @@ ninja freetype libsdl2 libpng +openal-soft FAudio rtmidi +vulkan-headers +MoltenVK qt5 wget diff --git a/CMakeLists.txt b/CMakeLists.txt index 542d446cb..89495234d 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -40,7 +40,7 @@ if(MUNT_EXTERNAL) endif() project(86Box - VERSION 3.7.1 + VERSION 3.8 DESCRIPTION "Emulator of x86-based systems" HOMEPAGE_URL "https://86box.net" LANGUAGES C CXX) diff --git a/src/include_make/86box/version.h b/src/include_make/86box/version.h index 4fccf12f7..098c120f0 100644 --- a/src/include_make/86box/version.h +++ b/src/include_make/86box/version.h @@ -20,12 +20,12 @@ #define EMU_NAME "86Box" #define EMU_NAME_W LSTR(EMU_NAME) -#define EMU_VERSION "3.7.1" +#define EMU_VERSION "3.8" #define EMU_VERSION_W LSTR(EMU_VERSION) #define EMU_VERSION_EX "3.50" /* frozen due to IDE re-detection behavior on Windows */ #define EMU_VERSION_MAJ 3 -#define EMU_VERSION_MIN 7 -#define EMU_VERSION_PATCH 1 +#define EMU_VERSION_MIN 8 +#define EMU_VERSION_PATCH 0 #define EMU_BUILD_NUM 0 @@ -40,7 +40,7 @@ #define EMU_ROMS_URL "https://github.com/86Box/roms/releases/latest" #define EMU_ROMS_URL_W LSTR(EMU_ROMS_URL) #ifdef RELEASE_BUILD -# define EMU_DOCS_URL "https://86box.readthedocs.io/en/v3.7/" +# define EMU_DOCS_URL "https://86box.readthedocs.io/en/v3.8/" #else # define EMU_DOCS_URL "https://86box.readthedocs.io" #endif diff --git a/src/unix/assets/86Box.spec b/src/unix/assets/86Box.spec index 585e1aa17..c6378dddf 100644 --- a/src/unix/assets/86Box.spec +++ b/src/unix/assets/86Box.spec @@ -15,7 +15,7 @@ %global romver v3.7 Name: 86Box -Version: 3.7.1 +Version: 3.8 Release: 1%{?dist} Summary: Classic PC emulator License: GPLv2+ @@ -117,5 +117,5 @@ popd %{_datadir}/%{name}/roms %changelog -* Tue Aug 02 2022 Robert de Rooy 3.7.1-1 +* Tue Aug 30 2022 Robert de Rooy 3.8-1 - Bump release diff --git a/src/unix/assets/net.86box.86Box.metainfo.xml b/src/unix/assets/net.86box.86Box.metainfo.xml index a4458cfad..21e84b16a 100644 --- a/src/unix/assets/net.86box.86Box.metainfo.xml +++ b/src/unix/assets/net.86box.86Box.metainfo.xml @@ -10,7 +10,7 @@ net.86box.86Box.desktop - + diff --git a/vcpkg.json b/vcpkg.json index 19dd09354..0bf171db8 100644 --- a/vcpkg.json +++ b/vcpkg.json @@ -1,6 +1,6 @@ { "name": "86box", - "version-string": "3.7.1", + "version-string": "3.8", "homepage": "https://86box.net/", "documentation": "http://86box.readthedocs.io/", "license": "GPL-2.0-or-later", From aeee37490ac0be468b61dba3dbc456dfb4fa839f Mon Sep 17 00:00:00 2001 From: cold-brewed <47337035+cold-brewed@users.noreply.github.com> Date: Wed, 31 Aug 2022 14:59:29 -0400 Subject: [PATCH 324/386] macOS: Add Vulkan support via MoltenVK (#2650) * macOS: Add the ability to build with and bundle MoltenVK for Vulkan support * macOS: Add cmake variable for RPATH as needed by macports moltenvk lib * macOS: Change minimum macOS target for vulkan builds Co-authored-by: cold-brewed --- CMakeLists.txt | 3 +++ src/CMakeLists.txt | 12 ++++++++++-- src/qt/CMakeLists.txt | 23 +++++++++++++++++++++++ 3 files changed, 36 insertions(+), 2 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 89495234d..4e49ac784 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -165,6 +165,9 @@ cmake_dependent_option(XL24 "ATI VGA Wonder XL24 (ATI-28800-6)" # Ditto but for Qt if(QT) option(USE_QT6 "Use Qt6 instead of Qt5" OFF) + if(APPLE) + option(MOLTENVK "Use MoltenVK libraries for Vulkan support on macOS. Requires a Vulkan-enabled QT." OFF) + endif() endif() # Determine the build type diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 428d5b521..01de9a473 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -14,6 +14,9 @@ # Copyright 2020-2022 David Hrdlička. # Copyright 2021 dob205. # +if(APPLE) + set(CMAKE_INSTALL_RPATH_USE_LINK_PATH TRUE) +endif() add_executable(86Box 86box.c config.c log.c random.c timer.c io.c acpi.c apm.c dma.c ddma.c discord.c nmi.c pic.c pit.c pit_fast.c port_6x.c port_92.c ppi.c pci.c @@ -83,11 +86,16 @@ if(APPLE) # Force using the newest library if it's installed by homebrew set(CMAKE_FIND_FRAMEWORK LAST) - # setting our compilation target to macOS 10.15 Catalina if targetting Qt6, macOS 10.13 High Sierra otherwise + # setting our compilation target to macOS 10.15 Catalina if targeting Qt6, + # macOS 10.14 Mojave for vulkan support, 10.13 High Sierra otherwise if (USE_QT6) set(CMAKE_OSX_DEPLOYMENT_TARGET "10.15") else() - set(CMAKE_OSX_DEPLOYMENT_TARGET "10.13") + if(MOLTENVK) + set(CMAKE_OSX_DEPLOYMENT_TARGET "10.14") + else() + set(CMAKE_OSX_DEPLOYMENT_TARGET "10.13") + endif() endif() endif() diff --git a/src/qt/CMakeLists.txt b/src/qt/CMakeLists.txt index 6a4b74bd0..0b7ac7092 100644 --- a/src/qt/CMakeLists.txt +++ b/src/qt/CMakeLists.txt @@ -209,6 +209,18 @@ endif() if (APPLE) target_sources(ui PRIVATE macos_event_filter.mm) + if(MOLTENVK) + find_path(MOLTENVK_INCLUDE "vulkan/vulkan.h" PATHS "/opt/homebrew/opt/molten-vk/libexec/include" "/usr/local/opt/molten-vk/libexec/include" ${MOLTENVK_INCLUDE_DIR}) + if (NOT MOLTENVK_INCLUDE) + message(FATAL_ERROR "Could not find vulkan/vulkan.h. If the headers are installed please use -DMOLTENVK_INCLUDE_DIR=/path/to/headers") + endif() + target_include_directories(ui PRIVATE ${MOLTENVK_INCLUDE}) + find_library(MOLTENVK_LIB MoltenVK) + if (NOT MOLTENVK_LIB) + message(FATAL_ERROR "Could not find MoltenVK library") + endif() + target_link_libraries(ui PRIVATE "${MOLTENVK_LIB}") + endif() endif() if (WIN32) @@ -285,6 +297,7 @@ if (APPLE AND CMAKE_MACOSX_BUNDLE) set(prefix "86Box.app/Contents") set(INSTALL_RUNTIME_DIR "${prefix}/MacOS") set(INSTALL_CMAKE_DIR "${prefix}/Resources") + set(INSTALL_LIB_DIR "${prefix}/Frameworks") # using the install_qt5_plugin to add Qt plugins into the macOS app bundle install_qt5_plugin("Qt${QT_MAJOR}::QCocoaIntegrationPlugin" QT_PLUGINS ${prefix}) @@ -317,6 +330,16 @@ if (APPLE AND CMAKE_MACOSX_BUNDLE) COMMAND ${CMAKE_INSTALL_NAME_TOOL} -add_rpath \"@executable_path/../Frameworks/\" \"\${CMAKE_INSTALL_PREFIX_ABSOLUTE}/${INSTALL_RUNTIME_DIR}/86Box\") ") + if(MOLTENVK) + install(CODE " + execute_process( + COMMAND bash -c \"set -e + echo \\\"-- Creating vulkan dylib symlink for QT (libVulkan.dylib -> libMoltenVK.dylib)\\\" + cd \${CMAKE_INSTALL_PREFIX_ABSOLUTE}/${INSTALL_LIB_DIR} + ln -sf libMoltenVK.dylib libVulkan.dylib + \") + ") + endif() endif() if (UNIX AND NOT APPLE AND NOT HAIKU) From cd3497383bef3d280211d3c2b9486db29c80fbe4 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Wed, 31 Aug 2022 17:07:15 -0300 Subject: [PATCH 325/386] Jenkins: Patch fat Mach-O header on MoltenVK as well --- .ci/build.sh | 38 ++++++++++++++++++++++++++++++++++---- 1 file changed, 34 insertions(+), 4 deletions(-) diff --git a/.ci/build.sh b/.ci/build.sh index d129b4edf..a9639c3fc 100644 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -872,11 +872,41 @@ then then find archive_tmp -type f | while IFS= read line do - # Act only on 64-bit Mach-Os (0xFEEDFACF) for CPU type x86_64 (0x01000007). - if [ "$(dd if="$line" bs=1 count=8 status=none)" = "$(printf '\xCF\xFA\xED\xFE\x07\x00\x00\x01')" ] + # Parse and patch a fat header (0xCAFEBABE, big endian) first. + macho_offset=0 + if [ "$(dd if="$line" bs=1 count=4 status=none)" = "$(printf '\xCA\xFE\xBA\xBE')" ] then - # Change CPU subtype from ALL (0x00000003) to H (0x00000008). - printf '\x08\x00\x00\x00' | dd of="$line" bs=1 seek=8 count=4 conv=notrunc status=none + # Get the number of fat architectures. + fat_archs=$(($(dd if="$line" bs=1 skip=4 count=4 status=none | rev | tr -d '\n' | od -An -vtu4))) + + # Go through fat architectures. + fat_offset=8 + for fat_arch in $(seq 1 $fat_archs) + do + # Check CPU type. + if [ "$(dd if="$line" bs=1 skip=$fat_offset count=4 status=none)" = "$(printf '\x01\x00\x00\x07')" ] + then + # Change CPU subtype in the fat header from ALL (0x00000003) to H (0x00000008). + printf '\x00\x00\x00\x08' | dd of="$line" bs=1 seek=$((fat_offset + 4)) count=4 conv=notrunc status=none + + # Save offset for this architecture's Mach-O header. + macho_offset=$(($(dd if="$line" bs=1 skip=$((fat_offset + 8)) count=4 status=none | rev | tr -d '\n' | od -An -vtu4))) + + # Stop looking for the x86_64 slice. + break + fi + + # Move on to the next architecture. + fat_offset=$((fat_offset + 20)) + done + fi + + # Now patch a 64-bit Mach-O header (0xFEEDFACF, little endian), either at + # the beginning or as a sub-header within a fat binary as parsed above. + if [ "$(dd if="$line" bs=1 seek=$macho_offset count=8 status=none)" = "$(printf '\xCF\xFA\xED\xFE\x07\x00\x00\x01')" ] + then + # Change CPU subtype in the Mach-O header from ALL (0x00000003) to H (0x00000008). + printf '\x08\x00\x00\x00' | dd of="$line" bs=1 seek=$((macho_offset + 8)) count=4 conv=notrunc status=none fi done fi From 65fbe568ec5c05f430accabb51bfb25906c506b5 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Wed, 31 Aug 2022 18:16:31 -0300 Subject: [PATCH 326/386] Jenkins: Fix MoltenVK secondary header patching --- .ci/build.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.ci/build.sh b/.ci/build.sh index a9639c3fc..455ba3995 100644 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -903,7 +903,7 @@ then # Now patch a 64-bit Mach-O header (0xFEEDFACF, little endian), either at # the beginning or as a sub-header within a fat binary as parsed above. - if [ "$(dd if="$line" bs=1 seek=$macho_offset count=8 status=none)" = "$(printf '\xCF\xFA\xED\xFE\x07\x00\x00\x01')" ] + if [ "$(dd if="$line" bs=1 skip=$macho_offset count=8 status=none)" = "$(printf '\xCF\xFA\xED\xFE\x07\x00\x00\x01')" ] then # Change CPU subtype in the Mach-O header from ALL (0x00000003) to H (0x00000008). printf '\x08\x00\x00\x00' | dd of="$line" bs=1 seek=$((macho_offset + 8)) count=4 conv=notrunc status=none From 5e0c1ac209f7664a9300f2639ae47a90a65146df Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 31 Aug 2022 17:35:32 -0400 Subject: [PATCH 327/386] Gdbstub, Minitrace and more (#2653) * Fix gdbstub compilation * Fix minitrace compilation * Fix many warnings on Linux Builds * Support DirectInput for Joysticks in QT UI too --- src/config.c | 8 +++--- src/device/cartridge.c | 6 ++--- src/device/hwm_lm78.c | 2 +- src/disk/minivhd/minivhd_convert.c | 2 +- src/disk/minivhd/minivhd_create.c | 2 +- src/disk/minivhd/minivhd_io.c | 10 +++---- src/disk/minivhd/minivhd_manage.c | 10 +++---- src/floppy/fdd_86f.c | 12 ++++----- src/floppy/fdd_img.c | 42 +++++++++++++++--------------- src/floppy/fdd_td0.c | 2 +- src/gdbstub.c | 12 +++++++-- src/include/86box/resource.h | 6 ++--- src/machine/m_xt_t1000.c | 2 +- src/mem/catalyst_flash.c | 2 +- src/mem/intel_flash.c | 12 ++++----- src/minitrace/minitrace.c | 7 ++++- src/network/net_event.c | 6 ++--- src/qt/CMakeLists.txt | 7 ++++- src/scsi/scsi_aha154x.c | 10 +++---- src/scsi/scsi_buslogic.c | 4 +-- src/scsi/scsi_ncr53c8xx.c | 2 +- src/sound/snd_cs423x.c | 2 +- src/video/vid_xga.c | 2 +- src/video/video.c | 20 +++++++------- 24 files changed, 104 insertions(+), 86 deletions(-) diff --git a/src/config.c b/src/config.c index 55dd5dff2..0cc782854 100644 --- a/src/config.c +++ b/src/config.c @@ -291,7 +291,7 @@ config_detect_bom(char *fn) #endif if (f == NULL) return (0); - fread(bom, 1, 3, f); + (void) !fread(bom, 1, 3, f); if (bom[0] == 0xEF && bom[1] == 0xBB && bom[2] == 0xBF) { fclose(f); return 1; @@ -357,7 +357,7 @@ config_read(char *fn) #ifdef __HAIKU__ config_fgetws(buff, sizeof_w(buff), f); #else - fgetws(buff, sizeof_w(buff), f); + (void) !fgetws(buff, sizeof_w(buff), f); #endif if (feof(f)) break; @@ -387,7 +387,7 @@ config_read(char *fn) c++; d = 0; while (buff[c] != L']' && buff[c]) - wctomb(&(sname[d++]), buff[c++]); + (void) !wctomb(&(sname[d++]), buff[c++]); sname[d] = L'\0'; /* Is the section name properly terminated? */ @@ -408,7 +408,7 @@ config_read(char *fn) /* Get the variable name. */ d = 0; while ((buff[c] != L'=') && (buff[c] != L' ') && buff[c]) - wctomb(&(ename[d++]), buff[c++]); + (void) !wctomb(&(ename[d++]), buff[c++]); ename[d] = L'\0'; /* Skip incomplete lines. */ diff --git a/src/device/cartridge.c b/src/device/cartridge.c index 9743c2e87..c4bd69cc2 100644 --- a/src/device/cartridge.c +++ b/src/device/cartridge.c @@ -119,12 +119,12 @@ cart_image_load(int drive, char *fn) if (size & 0x00000fff) { size -= 0x00000200; fseek(f, 0x000001ce, SEEK_SET); - fread(&base, 1, 2, f); + (void) !fread(&base, 1, 2, f); base <<= 4; fseek(f, 0x00000200, SEEK_SET); carts[drive].buf = (uint8_t *) malloc(size); memset(carts[drive].buf, 0x00, size); - fread(carts[drive].buf, 1, size, f); + (void) !fread(carts[drive].buf, 1, size, f); fclose(f); } else { base = drive ? 0xe0000 : 0xd0000; @@ -133,7 +133,7 @@ cart_image_load(int drive, char *fn) fseek(f, 0x00000000, SEEK_SET); carts[drive].buf = (uint8_t *) malloc(size); memset(carts[drive].buf, 0x00, size); - fread(carts[drive].buf, 1, size, f); + (void) !fread(carts[drive].buf, 1, size, f); fclose(f); } diff --git a/src/device/hwm_lm78.c b/src/device/hwm_lm78.c index 627a0e15e..03e4bb477 100644 --- a/src/device/hwm_lm78.c +++ b/src/device/hwm_lm78.c @@ -112,7 +112,7 @@ lm78_nvram(lm78_t *dev, uint8_t save) if (save) fwrite(&dev->as99127f.nvram, sizeof(dev->as99127f.nvram), 1, f); else - fread(&dev->as99127f.nvram, sizeof(dev->as99127f.nvram), 1, f); + (void) !fread(&dev->as99127f.nvram, sizeof(dev->as99127f.nvram), 1, f); fclose(f); } diff --git a/src/disk/minivhd/minivhd_convert.c b/src/disk/minivhd/minivhd_convert.c index 01c430300..3ae1d084f 100644 --- a/src/disk/minivhd/minivhd_convert.c +++ b/src/disk/minivhd/minivhd_convert.c @@ -71,7 +71,7 @@ MVHDMeta* mvhd_convert_to_vhd_sparse(const char* utf8_raw_path, const char* utf8 copy_sect = total_sectors - i; memset(buff, 0, sizeof buff); } - fread(buff, MVHD_SECTOR_SIZE, copy_sect, raw_img); + (void) !fread(buff, MVHD_SECTOR_SIZE, copy_sect, raw_img); /* Only write data if there's data to write, to take advantage of the sparse VHD format */ if (memcmp(buff, empty_buff, sizeof buff) != 0) { mvhd_write_sectors(vhdm, i, copy_sect, buff); diff --git a/src/disk/minivhd/minivhd_create.c b/src/disk/minivhd/minivhd_create.c index 57f748a5c..b56437c28 100644 --- a/src/disk/minivhd/minivhd_create.c +++ b/src/disk/minivhd/minivhd_create.c @@ -214,7 +214,7 @@ MVHDMeta* mvhd_create_fixed_raw(const char* path, FILE* raw_img, uint64_t size_i mvhd_gen_footer(&vhdm->footer, raw_size, geom, MVHD_TYPE_FIXED, 0); mvhd_fseeko64(raw_img, 0, SEEK_SET); for (s = 0; s < size_sectors; s++) { - fread(img_data, sizeof img_data, 1, raw_img); + (void) !fread(img_data, sizeof img_data, 1, raw_img); fwrite(img_data, sizeof img_data, 1, f); if (progress_callback) progress_callback(s + 1, size_sectors); diff --git a/src/disk/minivhd/minivhd_io.c b/src/disk/minivhd/minivhd_io.c index 74cc62883..63017bbf8 100644 --- a/src/disk/minivhd/minivhd_io.c +++ b/src/disk/minivhd/minivhd_io.c @@ -62,7 +62,7 @@ void mvhd_write_empty_sectors(FILE* f, int sector_count) { static void mvhd_read_sect_bitmap(MVHDMeta* vhdm, int blk) { if (vhdm->block_offset[blk] != MVHD_SPARSE_BLK) { mvhd_fseeko64(vhdm->f, (uint64_t)vhdm->block_offset[blk] * MVHD_SECTOR_SIZE, SEEK_SET); - fread(vhdm->bitmap.curr_bitmap, vhdm->bitmap.sector_count * MVHD_SECTOR_SIZE, 1, vhdm->f); + (void) !fread(vhdm->bitmap.curr_bitmap, vhdm->bitmap.sector_count * MVHD_SECTOR_SIZE, 1, vhdm->f); } else { memset(vhdm->bitmap.curr_bitmap, 0, vhdm->bitmap.sector_count * MVHD_SECTOR_SIZE); } @@ -113,12 +113,12 @@ static void mvhd_create_block(MVHDMeta* vhdm, int blk) { uint8_t footer[MVHD_FOOTER_SIZE]; /* Seek to where the footer SHOULD be */ mvhd_fseeko64(vhdm->f, -MVHD_FOOTER_SIZE, SEEK_END); - fread(footer, sizeof footer, 1, vhdm->f); + (void) !fread(footer, sizeof footer, 1, vhdm->f); mvhd_fseeko64(vhdm->f, -MVHD_FOOTER_SIZE, SEEK_END); if (!mvhd_is_conectix_str(footer)) { /* Oh dear. We use the header instead, since something has gone wrong at the footer */ mvhd_fseeko64(vhdm->f, 0, SEEK_SET); - fread(footer, sizeof footer, 1, vhdm->f); + (void) !fread(footer, sizeof footer, 1, vhdm->f); mvhd_fseeko64(vhdm->f, 0, SEEK_END); } int64_t abs_offset = mvhd_ftello64(vhdm->f); @@ -150,7 +150,7 @@ int mvhd_fixed_read(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* out_ mvhd_check_sectors(offset, num_sectors, total_sectors, &transfer_sectors, &truncated_sectors); addr = (int64_t)offset * MVHD_SECTOR_SIZE; mvhd_fseeko64(vhdm->f, addr, SEEK_SET); - fread(out_buff, transfer_sectors*MVHD_SECTOR_SIZE, 1, vhdm->f); + (void) !fread(out_buff, transfer_sectors*MVHD_SECTOR_SIZE, 1, vhdm->f); return truncated_sectors; } @@ -178,7 +178,7 @@ int mvhd_sparse_read(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* out } } if (VHD_TESTBIT(vhdm->bitmap.curr_bitmap, sib)) { - fread(buff, MVHD_SECTOR_SIZE, 1, vhdm->f); + (void) !fread(buff, MVHD_SECTOR_SIZE, 1, vhdm->f); } else { memset(buff, 0, MVHD_SECTOR_SIZE); mvhd_fseeko64(vhdm->f, MVHD_SECTOR_SIZE, SEEK_CUR); diff --git a/src/disk/minivhd/minivhd_manage.c b/src/disk/minivhd/minivhd_manage.c index f76826566..ce0f31f60 100644 --- a/src/disk/minivhd/minivhd_manage.c +++ b/src/disk/minivhd/minivhd_manage.c @@ -45,7 +45,7 @@ static int mvhd_init_sector_bitmap(MVHDMeta* vhdm, MVHDError* err); static void mvhd_read_footer(MVHDMeta* vhdm) { uint8_t buffer[MVHD_FOOTER_SIZE]; mvhd_fseeko64(vhdm->f, -MVHD_FOOTER_SIZE, SEEK_END); - fread(buffer, sizeof buffer, 1, vhdm->f); + (void) !fread(buffer, sizeof buffer, 1, vhdm->f); mvhd_buffer_to_footer(&vhdm->footer, buffer); } @@ -57,7 +57,7 @@ static void mvhd_read_footer(MVHDMeta* vhdm) { static void mvhd_read_sparse_header(MVHDMeta* vhdm) { uint8_t buffer[MVHD_SPARSE_SIZE]; mvhd_fseeko64(vhdm->f, vhdm->footer.data_offset, SEEK_SET); - fread(buffer, sizeof buffer, 1, vhdm->f); + (void) !fread(buffer, sizeof buffer, 1, vhdm->f); mvhd_buffer_to_header(&vhdm->sparse, buffer); } @@ -104,7 +104,7 @@ static int mvhd_read_bat(MVHDMeta *vhdm, MVHDError* err) { } mvhd_fseeko64(vhdm->f, vhdm->sparse.bat_offset, SEEK_SET); for (uint32_t i = 0; i < vhdm->sparse.max_bat_ent; i++) { - fread(&vhdm->block_offset[i], sizeof *vhdm->block_offset, 1, vhdm->f); + (void) !fread(&vhdm->block_offset[i], sizeof *vhdm->block_offset, 1, vhdm->f); vhdm->block_offset[i] = mvhd_from_be32(vhdm->block_offset[i]); } return 0; @@ -254,7 +254,7 @@ static char* mvhd_get_diff_parent_path(MVHDMeta* vhdm, int* err) { goto paths_cleanup; } mvhd_fseeko64(vhdm->f, vhdm->sparse.par_loc_entry[i].plat_data_offset, SEEK_SET); - fread(paths->tmp_src_path, sizeof (uint8_t), utf_inlen, vhdm->f); + (void) !fread(paths->tmp_src_path, sizeof (uint8_t), utf_inlen, vhdm->f); /* Note, the W2*u parent locators are UTF-16LE, unlike the filename field previously obtained, which is UTF-16BE */ utf_ret = UTF16LEToUTF8(loc_path, &utf_outlen, (const unsigned char*)paths->tmp_src_path, &utf_inlen); @@ -322,7 +322,7 @@ bool mvhd_file_is_vhd(FILE* f) { if (f) { uint8_t con_str[8]; mvhd_fseeko64(f, -MVHD_FOOTER_SIZE, SEEK_END); - fread(con_str, sizeof con_str, 1, f); + (void) !fread(con_str, sizeof con_str, 1, f); return mvhd_is_conectix_str(con_str); } else { return false; diff --git a/src/floppy/fdd_86f.c b/src/floppy/fdd_86f.c index ac4de1ee4..2be0b86db 100644 --- a/src/floppy/fdd_86f.c +++ b/src/floppy/fdd_86f.c @@ -2923,13 +2923,13 @@ d86f_read_track(int drive, int track, int thin_track, int side, uint16_t *da, ui } } else dev->extra_bit_cells[side] = 0; - fread(&(dev->index_hole_pos[side]), 4, 1, dev->f); + (void) !fread(&(dev->index_hole_pos[side]), 4, 1, dev->f); } else fseek(dev->f, dev->track_offset[logical_track] + d86f_track_header_size(drive), SEEK_SET); array_size = d86f_get_array_size(drive, side, 0); - fread(da, 1, array_size, dev->f); + (void) !fread(da, 1, array_size, dev->f); if (d86f_has_surface_desc(drive)) - fread(sa, 1, array_size, dev->f); + (void) !fread(sa, 1, array_size, dev->f); } else { if (! thin_track) { switch((dev->disk_flags >> 1) & 3) { @@ -3529,7 +3529,7 @@ d86f_load(int drive, char *fn) len = ftell(dev->f); fseek(dev->f, 0, SEEK_SET); - fread(&magic, 4, 1, dev->f); + (void) !fread(&magic, 4, 1, dev->f); if (len < 16) { /* File is WAY too small, abort. */ @@ -3570,7 +3570,7 @@ d86f_load(int drive, char *fn) d86f_log("86F: Recognized file version: %i.%02i\n", dev->version >> 8, dev->version & 0xff); } - fread(&(dev->disk_flags), 2, 1, dev->f); + (void) !fread(&(dev->disk_flags), 2, 1, dev->f); if (d86f_has_surface_desc(drive)) { for (i = 0; i < 2; i++) @@ -3719,7 +3719,7 @@ d86f_load(int drive, char *fn) fseek(dev->f, 8, SEEK_SET); - fread(dev->track_offset, 1, d86f_get_track_table_size(drive), dev->f); + (void) !fread(dev->track_offset, 1, d86f_get_track_table_size(drive), dev->f); if (! (dev->track_offset[0])) { /* File has no track 0 side 0, abort. */ diff --git a/src/floppy/fdd_img.c b/src/floppy/fdd_img.c index 722a25af9..e0a10a6e1 100644 --- a/src/floppy/fdd_img.c +++ b/src/floppy/fdd_img.c @@ -684,12 +684,12 @@ img_load(int drive, char *fn) /* This is a Japanese FDI image, so let's read the header */ img_log("img_load(): File is a Japanese FDI image...\n"); fseek(dev->f, 0x10, SEEK_SET); - (void)fread(&bpb_bps, 1, 2, dev->f); + (void) !fread(&bpb_bps, 1, 2, dev->f); fseek(dev->f, 0x0C, SEEK_SET); - (void)fread(&size, 1, 4, dev->f); + (void) !fread(&size, 1, 4, dev->f); bpb_total = size / bpb_bps; fseek(dev->f, 0x08, SEEK_SET); - (void)fread(&(dev->base), 1, 4, dev->f); + (void) !fread(&(dev->base), 1, 4, dev->f); fseek(dev->f, dev->base + 0x15, SEEK_SET); bpb_mid = fgetc(dev->f); if (bpb_mid < 0xF0) @@ -729,7 +729,7 @@ img_load(int drive, char *fn) dev->disk_at_once = 1; fseek(dev->f, 0x50, SEEK_SET); - (void)fread(&dev->tracks, 1, 4, dev->f); + (void) !fread(&dev->tracks, 1, 4, dev->f); /* Decode the entire file - pass 1, no write to buffer, determine length. */ fseek(dev->f, 0x80, SEEK_SET); @@ -740,10 +740,10 @@ img_load(int drive, char *fn) if (! track_bytes) { /* Skip first 3 bytes - their meaning is unknown to us but could be a checksum. */ first_byte = fgetc(dev->f); - fread(&track_bytes, 1, 2, dev->f); + (void) !fread(&track_bytes, 1, 2, dev->f); img_log("Block header: %02X %04X ", first_byte, track_bytes); /* Read the length of encoded data block. */ - fread(&track_bytes, 1, 2, dev->f); + (void) !fread(&track_bytes, 1, 2, dev->f); img_log("%04X\n", track_bytes); } @@ -765,7 +765,7 @@ img_load(int drive, char *fn) /* Literal. */ track_bytes -= (run & 0x7f); literal = (uint8_t *)malloc(run & 0x7f); - fread(literal, 1, (run & 0x7f), dev->f); + (void) !fread(literal, 1, (run & 0x7f), dev->f); free(literal); } size += (run & 0x7f); @@ -775,7 +775,7 @@ img_load(int drive, char *fn) /* Literal block. */ size += (track_bytes - fdf_suppress_final_byte); literal = (uint8_t *)malloc(track_bytes); - fread(literal, 1, track_bytes, dev->f); + (void) !fread(literal, 1, track_bytes, dev->f); free(literal); track_bytes = 0; } @@ -794,10 +794,10 @@ img_load(int drive, char *fn) if (! track_bytes) { /* Skip first 3 bytes - their meaning is unknown to us but could be a checksum. */ first_byte = fgetc(dev->f); - fread(&track_bytes, 1, 2, dev->f); + (void) !fread(&track_bytes, 1, 2, dev->f); img_log("Block header: %02X %04X ", first_byte, track_bytes); /* Read the length of encoded data block. */ - fread(&track_bytes, 1, 2, dev->f); + (void) !fread(&track_bytes, 1, 2, dev->f); img_log("%04X\n", track_bytes); } @@ -824,7 +824,7 @@ img_load(int drive, char *fn) /* Literal. */ track_bytes -= real_run; literal = (uint8_t *) malloc(real_run); - fread(literal, 1, real_run, dev->f); + (void) !fread(literal, 1, real_run, dev->f); if (! track_bytes) real_run -= fdf_suppress_final_byte; if (run & 0x7f) @@ -835,7 +835,7 @@ img_load(int drive, char *fn) } else { /* Literal block. */ literal = (uint8_t *) malloc(track_bytes); - fread(literal, 1, track_bytes, dev->f); + (void) !fread(literal, 1, track_bytes, dev->f); memcpy(bpos, literal, track_bytes - fdf_suppress_final_byte); free(literal); bpos += (track_bytes - fdf_suppress_final_byte); @@ -865,10 +865,10 @@ img_load(int drive, char *fn) dev->f = plat_fopen(fn, "rb"); fseek(dev->f, 0x03, SEEK_SET); - fread(&bpb_bps, 1, 2, dev->f); + (void) !fread(&bpb_bps, 1, 2, dev->f); #if 0 fseek(dev->f, 0x0B, SEEK_SET); - fread(&bpb_total, 1, 2, dev->f); + (void) !fread(&bpb_total, 1, 2, dev->f); #endif fseek(dev->f, 0x10, SEEK_SET); bpb_sectors = fgetc(dev->f); @@ -888,7 +888,7 @@ img_load(int drive, char *fn) memset(dev->disk_data, 0xf6, ((uint32_t) bpb_total) * ((uint32_t) bpb_bps)); fseek(dev->f, 0x6F, SEEK_SET); - fread(&comment_len, 1, 2, dev->f); + (void) !fread(&comment_len, 1, 2, dev->f); fseek(dev->f, -1, SEEK_END); size = ftell(dev->f) + 1; @@ -898,7 +898,7 @@ img_load(int drive, char *fn) cur_pos = 0; while(! feof(dev->f)) { - fread(&block_len, 1, 2, dev->f); + (void) !fread(&block_len, 1, 2, dev->f); if (! feof(dev->f)) { if (block_len < 0) { @@ -915,10 +915,10 @@ img_load(int drive, char *fn) } else if (block_len > 0) { if ((cur_pos + block_len) > ((uint32_t) bpb_total) * ((uint32_t) bpb_bps)) { block_len = ((uint32_t) bpb_total) * ((uint32_t) bpb_bps) - cur_pos; - fread(dev->disk_data + cur_pos, 1, block_len, dev->f); + (void) !fread(dev->disk_data + cur_pos, 1, block_len, dev->f); break; } else { - fread(dev->disk_data + cur_pos, 1, block_len, dev->f); + (void) !fread(dev->disk_data + cur_pos, 1, block_len, dev->f); cur_pos += block_len; } } @@ -939,9 +939,9 @@ img_load(int drive, char *fn) } else img_log("img_load(): File is a raw image...\n"); fseek(dev->f, dev->base + 0x0B, SEEK_SET); - fread(&bpb_bps, 1, 2, dev->f); + (void) !fread(&bpb_bps, 1, 2, dev->f); fseek(dev->f, dev->base + 0x13, SEEK_SET); - fread(&bpb_total, 1, 2, dev->f); + (void) !fread(&bpb_total, 1, 2, dev->f); fseek(dev->f, dev->base + 0x15, SEEK_SET); bpb_mid = fgetc(dev->f); fseek(dev->f, dev->base + 0x18, SEEK_SET); @@ -1112,7 +1112,7 @@ jump_if_fdf: /* The image is a Japanese FDI, therefore we read the number of tracks from the header. */ if (fseek(dev->f, 0x1C, SEEK_SET) == -1) fatal("Japanese FDI: Failed when seeking to 0x1C\n"); - fread(&(dev->tracks), 1, 4, dev->f); + (void) !fread(&(dev->tracks), 1, 4, dev->f); } else { if (!cqm && !fdf) { /* Number of tracks = number of total sectors divided by sides times sectors per track. */ diff --git a/src/floppy/fdd_td0.c b/src/floppy/fdd_td0.c index 6fa4ab96d..9be4f62ce 100644 --- a/src/floppy/fdd_td0.c +++ b/src/floppy/fdd_td0.c @@ -645,7 +645,7 @@ td0_initialize(int drive) } fseek(dev->f, 0, SEEK_SET); - fread(header, 1, 12, dev->f); + (void) !fread(header, 1, 12, dev->f); head_count = header[9]; if (header[0] == 't') { diff --git a/src/gdbstub.c b/src/gdbstub.c index b63b13f72..d609c68e2 100644 --- a/src/gdbstub.c +++ b/src/gdbstub.c @@ -20,11 +20,18 @@ #include #include #include -#include #ifdef _WIN32 +# ifndef __clang__ +# include +# else +# include +# define ssize_t long +# define strtok_r(a, b, c) strtok_s(a, b, c) +# endif # include # include #else +# include # include # include # include @@ -706,6 +713,8 @@ gdbstub_client_read_reg(int index, uint8_t *buf) static void gdbstub_client_packet(gdbstub_client_t *client) { + gdbstub_breakpoint_t *breakpoint, *prev_breakpoint = NULL, **first_breakpoint = NULL; + #ifdef GDBSTUB_CHECK_CHECKSUM /* msys2 gdb 11.1 transmits qSupported and H with invalid checksum... */ uint8_t rcv_checksum = 0, checksum = 0; #endif @@ -1202,7 +1211,6 @@ unknown: case 'z': /* remove break/watchpoint */ case 'Z': /* insert break/watchpoint */ - gdbstub_breakpoint_t *breakpoint, *prev_breakpoint = NULL, **first_breakpoint; /* Parse breakpoint type. */ switch (client->packet[1]) { diff --git a/src/include/86box/resource.h b/src/include/86box/resource.h index f0dd948ae..a3708eb42 100644 --- a/src/include/86box/resource.h +++ b/src/include/86box/resource.h @@ -361,9 +361,9 @@ #define IDM_ACTION_END_TRACE 40019 #define IDM_ACTION_TRACE 40020 #endif -#define IDM_CONFIG 40020 -#define IDM_VID_HIDE_STATUS_BAR 40021 -#define IDM_VID_HIDE_TOOLBAR 40022 +#define IDM_CONFIG 40021 +#define IDM_VID_HIDE_STATUS_BAR 40022 +#define IDM_VID_HIDE_TOOLBAR 40023 #define IDM_UPDATE_ICONS 40030 #define IDM_SND_GAIN 40031 #define IDM_VID_RESIZE 40040 diff --git a/src/machine/m_xt_t1000.c b/src/machine/m_xt_t1000.c index 526833a98..3b45dcdcb 100644 --- a/src/machine/m_xt_t1000.c +++ b/src/machine/m_xt_t1000.c @@ -1041,7 +1041,7 @@ t1000_emsboard_load(void) if (mem_size > 512) { f = plat_fopen(nvr_path("t1000_ems.nvr"), "rb"); if (f != NULL) { - fread(&ram[512 * 1024], 1024, (mem_size - 512), f); + (void) !fread(&ram[512 * 1024], 1024, (mem_size - 512), f); fclose(f); } } diff --git a/src/mem/catalyst_flash.c b/src/mem/catalyst_flash.c index 0a7fe2cdf..bfc54e4b4 100644 --- a/src/mem/catalyst_flash.c +++ b/src/mem/catalyst_flash.c @@ -217,7 +217,7 @@ catalyst_flash_init(const device_t *info) f = nvr_fopen(flash_path, "rb"); if (f) { - fread(dev->array, 0x20000, 1, f); + (void) !fread(dev->array, 0x20000, 1, f); fclose(f); } diff --git a/src/mem/intel_flash.c b/src/mem/intel_flash.c index 66c59914d..40a7581d7 100644 --- a/src/mem/intel_flash.c +++ b/src/mem/intel_flash.c @@ -518,16 +518,16 @@ intel_flash_init(const device_t *info) f = nvr_fopen(flash_path, "rb"); if (f) { - fread(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, f); + (void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, f); if (dev->block_len[BLOCK_MAIN2]) - fread(&(dev->array[dev->block_start[BLOCK_MAIN2]]), dev->block_len[BLOCK_MAIN2], 1, f); + (void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN2]]), dev->block_len[BLOCK_MAIN2], 1, f); if (dev->block_len[BLOCK_MAIN3]) - fread(&(dev->array[dev->block_start[BLOCK_MAIN3]]), dev->block_len[BLOCK_MAIN3], 1, f); + (void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN3]]), dev->block_len[BLOCK_MAIN3], 1, f); if (dev->block_len[BLOCK_MAIN4]) - fread(&(dev->array[dev->block_start[BLOCK_MAIN4]]), dev->block_len[BLOCK_MAIN4], 1, f); + (void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN4]]), dev->block_len[BLOCK_MAIN4], 1, f); - fread(&(dev->array[dev->block_start[BLOCK_DATA1]]), dev->block_len[BLOCK_DATA1], 1, f); - fread(&(dev->array[dev->block_start[BLOCK_DATA2]]), dev->block_len[BLOCK_DATA2], 1, f); + (void) !fread(&(dev->array[dev->block_start[BLOCK_DATA1]]), dev->block_len[BLOCK_DATA1], 1, f); + (void) !fread(&(dev->array[dev->block_start[BLOCK_DATA2]]), dev->block_len[BLOCK_DATA2], 1, f); fclose(f); } diff --git a/src/minitrace/minitrace.c b/src/minitrace/minitrace.c index 89f12d6a8..d8f0e97a9 100644 --- a/src/minitrace/minitrace.c +++ b/src/minitrace/minitrace.c @@ -30,9 +30,9 @@ #include #include #include -#include #endif +#include #include #ifdef __GNUC__ @@ -293,8 +293,13 @@ void mtr_start() { #ifndef MTR_ENABLED return; #endif +#ifdef _WIN32 + pthread_cond_init(&buffer_not_full_cond); + pthread_cond_init(&buffer_full_cond); +#else pthread_cond_init(&buffer_not_full_cond, NULL); pthread_cond_init(&buffer_full_cond, NULL); +#endif atomic_store(&is_tracing, TRUE); init_flushing_thread(); } diff --git a/src/network/net_event.c b/src/network/net_event.c index e7b09d723..c0e915c8b 100644 --- a/src/network/net_event.c +++ b/src/network/net_event.c @@ -23,7 +23,7 @@ net_event_init(net_evt_t *event) #ifdef _WIN32 event->handle = CreateEvent(NULL, FALSE, FALSE, NULL); #else - (void)pipe(event->fds); + (void) !pipe(event->fds); setup_fd(event->fds[0]); setup_fd(event->fds[1]); #endif @@ -35,7 +35,7 @@ net_event_set(net_evt_t *event) #ifdef _WIN32 SetEvent(event->handle); #else - (void)write(event->fds[1], "a", 1); + (void) !write(event->fds[1], "a", 1); #endif } @@ -46,7 +46,7 @@ net_event_clear(net_evt_t *event) /* Do nothing on WIN32 since we use an auto-reset event */ #else char dummy[1]; - (void)read(event->fds[0], &dummy, sizeof(dummy)); + (void) !read(event->fds[0], &dummy, sizeof(dummy)); #endif } diff --git a/src/qt/CMakeLists.txt b/src/qt/CMakeLists.txt index 0b7ac7092..63ebbbdef 100644 --- a/src/qt/CMakeLists.txt +++ b/src/qt/CMakeLists.txt @@ -182,7 +182,12 @@ if(WIN32) enable_language(RC) target_sources(86Box PUBLIC ../win/86Box-qt.rc) target_sources(plat PRIVATE win_dynld.c) - target_sources(plat PRIVATE win_joystick_rawinput.c) + if(DINPUT) + target_sources(plat PRIVATE win_joystick.cpp) + target_link_libraries(86Box dinput8) + else() + target_sources(plat PRIVATE win_joystick_rawinput.c) + endif() target_sources(ui PRIVATE qt_d3d9renderer.hpp qt_d3d9renderer.cpp) target_link_libraries(86Box hid d3d9) diff --git a/src/scsi/scsi_aha154x.c b/src/scsi/scsi_aha154x.c index cdf1f1a56..36b0964c2 100644 --- a/src/scsi/scsi_aha154x.c +++ b/src/scsi/scsi_aha154x.c @@ -758,11 +758,11 @@ aha_setbios(x54x_t *dev) /* Load first chunk of BIOS (which is the main BIOS, aka ROM1.) */ dev->rom1 = malloc(ROM_SIZE); - (void)fread(dev->rom1, ROM_SIZE, 1, f); + (void) !fread(dev->rom1, ROM_SIZE, 1, f); temp -= ROM_SIZE; if (temp > 0) { dev->rom2 = malloc(ROM_SIZE); - (void)fread(dev->rom2, ROM_SIZE, 1, f); + (void) !fread(dev->rom2, ROM_SIZE, 1, f); temp -= ROM_SIZE; } else { dev->rom2 = NULL; @@ -875,10 +875,10 @@ aha_setmcode(x54x_t *dev) } aha1542cp_pnp_rom = (uint8_t *) malloc(dev->pnp_len + 7); fseek(f, dev->pnp_offset, SEEK_SET); - (void)fread(aha1542cp_pnp_rom, dev->pnp_len, 1, f); + (void) !fread(aha1542cp_pnp_rom, dev->pnp_len, 1, f); memset(&(aha1542cp_pnp_rom[4]), 0x00, 5); fseek(f, dev->pnp_offset + 4, SEEK_SET); - (void)fread(&(aha1542cp_pnp_rom[9]), dev->pnp_len - 4, 1, f); + (void) !fread(&(aha1542cp_pnp_rom[9]), dev->pnp_len - 4, 1, f); /* Even the real AHA-1542CP microcode seem to be flipping bit 4 to not erroneously indicate there is a range length. */ aha1542cp_pnp_rom[0x87] |= 0x04; @@ -889,7 +889,7 @@ aha_setmcode(x54x_t *dev) /* Load the SCSISelect decompression code. */ fseek(f, dev->cmd_33_offset, SEEK_SET); - (void)fread(dev->cmd_33_buf, dev->cmd_33_len, 1, f); + (void) !fread(dev->cmd_33_buf, dev->cmd_33_len, 1, f); (void)fclose(f); } diff --git a/src/scsi/scsi_buslogic.c b/src/scsi/scsi_buslogic.c index e8c4dde57..00fda1c89 100644 --- a/src/scsi/scsi_buslogic.c +++ b/src/scsi/scsi_buslogic.c @@ -1747,7 +1747,7 @@ buslogic_init(const device_t *info) if (has_autoscsi_rom) { f = rom_fopen(autoscsi_rom_name, "rb"); if (f) { - fread(bl->AutoSCSIROM, 1, autoscsi_rom_size, f); + (void) !fread(bl->AutoSCSIROM, 1, autoscsi_rom_size, f); fclose(f); f = NULL; } @@ -1756,7 +1756,7 @@ buslogic_init(const device_t *info) if (has_scam_rom) { f = rom_fopen(scam_rom_name, "rb"); if (f) { - fread(bl->SCAMData, 1, scam_rom_size, f); + (void) !fread(bl->SCAMData, 1, scam_rom_size, f); fclose(f); f = NULL; } diff --git a/src/scsi/scsi_ncr53c8xx.c b/src/scsi/scsi_ncr53c8xx.c index 999948648..7a9344d62 100644 --- a/src/scsi/scsi_ncr53c8xx.c +++ b/src/scsi/scsi_ncr53c8xx.c @@ -1464,7 +1464,7 @@ ncr53c8xx_eeprom(ncr53c8xx_t *dev, uint8_t save) if (save) fwrite(&dev->nvram, sizeof(dev->nvram), 1, f); else - fread(&dev->nvram, sizeof(dev->nvram), 1, f); + (void) !fread(&dev->nvram, sizeof(dev->nvram), 1, f); fclose(f); } } diff --git a/src/sound/snd_cs423x.c b/src/sound/snd_cs423x.c index 31f4e8e6c..fa9e7f23c 100644 --- a/src/sound/snd_cs423x.c +++ b/src/sound/snd_cs423x.c @@ -156,7 +156,7 @@ cs423x_nvram(cs423x_t *dev, uint8_t save) if (save) fwrite(dev->eeprom_data, sizeof(dev->eeprom_data), 1, f); else - fread(dev->eeprom_data, sizeof(dev->eeprom_data), 1, f); + (void) !fread(dev->eeprom_data, sizeof(dev->eeprom_data), 1, f); fclose(f); } } diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index 4a141660b..f6734627b 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -2707,7 +2707,7 @@ static void rom = malloc(xga->bios_rom.sz); memset(rom, 0xff, xga->bios_rom.sz); - (void)fread(rom, xga->bios_rom.sz, 1, f); + (void) !fread(rom, xga->bios_rom.sz, 1, f); temp -= xga->bios_rom.sz; (void)fclose(f); diff --git a/src/video/video.c b/src/video/video.c index 1bfb148a3..945247934 100644 --- a/src/video/video.c +++ b/src/video/video.c @@ -1021,9 +1021,9 @@ loadfont_common(FILE *f, int format) for (d = 0; d < 4; d++) { /* There are 4 fonts in the ROM */ for (c = 0; c < 256; c++) /* 8x14 MDA in 8x16 cell */ - fread(&fontdatm[256*d + c][0], 1, 16, f); + (void) !fread(&fontdatm[256*d + c][0], 1, 16, f); for (c = 0; c < 256; c++) { /* 8x8 CGA in 8x16 cell */ - fread(&fontdat[256*d + c][0], 1, 8, f); + (void) !fread(&fontdat[256*d + c][0], 1, 8, f); fseek(f, 8, SEEK_CUR); } } @@ -1053,28 +1053,28 @@ loadfont_common(FILE *f, int format) { for (c = d; c < d+256; c++) { - fread(&fontdatm[c][8], 1, 8, f); + (void) !fread(&fontdatm[c][8], 1, 8, f); } for (c = d+256; c < d+512; c++) { - fread(&fontdatm[c][8], 1, 8, f); + (void) !fread(&fontdatm[c][8], 1, 8, f); } for (c = d; c < d+256; c++) { - fread(&fontdatm[c][0], 1, 8, f); + (void) !fread(&fontdatm[c][0], 1, 8, f); } for (c = d+256; c < d+512; c++) { - fread(&fontdatm[c][0], 1, 8, f); + (void) !fread(&fontdatm[c][0], 1, 8, f); } fseek(f, 4096, SEEK_CUR); /* Skip blank section */ for (c = d; c < d+256; c++) { - fread(&fontdat[c][0], 1, 8, f); + (void) !fread(&fontdat[c][0], 1, 8, f); } for (c = d+256; c < d+512; c++) { - fread(&fontdat[c][0], 1, 8, f); + (void) !fread(&fontdat[c][0], 1, 8, f); } } break; @@ -1096,7 +1096,7 @@ loadfont_common(FILE *f, int format) case 7: /* Sigma Color 400 */ /* The first 4k of the character ROM holds an 8x8 font */ for (c = 0; c < 256; c++) { - fread(&fontdat[c][0], 1, 8, f); + (void) !fread(&fontdat[c][0], 1, 8, f); fseek(f, 8, SEEK_CUR); } /* The second 4k holds an 8x16 font */ @@ -1114,7 +1114,7 @@ loadfont_common(FILE *f, int format) case 9: /* Image Manager 1024 native font */ for (c = 0; c < 256; c++) - fread(&fontdat12x18[c][0], 1, 36, f); + (void) !fread(&fontdat12x18[c][0], 1, 36, f); break; } From a75aa6f41242788d795cbcfc34975b475f9cb124 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 31 Aug 2022 18:23:38 -0400 Subject: [PATCH 328/386] Expose agpgart_t (#2655) --- src/chipset/intel_4x0.c | 4 ++-- src/chipset/via_apollo.c | 6 +++--- src/include/86box/agpgart.h | 35 +++++++++++++++++++++++++++++++++++ src/include/86box/video.h | 5 ----- src/video/agpgart.c | 16 +++------------- 5 files changed, 43 insertions(+), 23 deletions(-) create mode 100644 src/include/86box/agpgart.h diff --git a/src/chipset/intel_4x0.c b/src/chipset/intel_4x0.c index 7e8ff9405..49b8f3fc2 100644 --- a/src/chipset/intel_4x0.c +++ b/src/chipset/intel_4x0.c @@ -29,7 +29,7 @@ #include <86box/chipset.h> #include <86box/spd.h> #include <86box/machine.h> -#include <86box/video.h> +#include <86box/agpgart.h> enum @@ -59,7 +59,7 @@ typedef struct uint8_t mem_state[256]; int type; smram_t *smram_low, *smram_high; - void *agpgart; + agpgart_t *agpgart; void (*write_drbs)(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit); } i4x0_t; diff --git a/src/chipset/via_apollo.c b/src/chipset/via_apollo.c index 9a491478f..bb30a0264 100644 --- a/src/chipset/via_apollo.c +++ b/src/chipset/via_apollo.c @@ -33,7 +33,7 @@ #include <86box/pci.h> #include <86box/chipset.h> #include <86box/spd.h> -#include <86box/video.h> +#include <86box/agpgart.h> #define VIA_585 0x05851000 #define VIA_595 0x05950000 @@ -50,8 +50,8 @@ typedef struct via_apollo_t uint8_t drb_unit; uint8_t pci_conf[256]; - smram_t *smram; - void *agpgart; + smram_t *smram; + agpgart_t *agpgart; } via_apollo_t; diff --git a/src/include/86box/agpgart.h b/src/include/86box/agpgart.h new file mode 100644 index 000000000..c6823fc0f --- /dev/null +++ b/src/include/86box/agpgart.h @@ -0,0 +1,35 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * AGP Graphics Address Remapping Table remapping emulation. + * + * + * + * Authors: RichardG, + * + * Copyright 2021 RichardG. + */ + +#ifndef EMU_AGPGART_H +#define EMU_AGPGART_H + +typedef struct agpgart_s { + int aperture_enable; + uint32_t aperture_base, aperture_size, aperture_mask, gart_base; + mem_mapping_t aperture_mapping; +} agpgart_t; + +extern void agpgart_set_aperture(agpgart_t *dev, uint32_t base, uint32_t size, int enable); +extern void agpgart_set_gart(agpgart_t *dev, uint32_t base); + +#ifdef EMU_DEVICE_H +/* AGP GART */ +extern const device_t agpgart_device; +#endif + +#endif /*EMU_AGPGART_H*/ diff --git a/src/include/86box/video.h b/src/include/86box/video.h index 34cc2cb81..4e5e426eb 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -258,9 +258,6 @@ extern int get_actual_size_y(void); extern uint32_t video_color_transform(uint32_t color); -extern void agpgart_set_aperture(void *handle, uint32_t base, uint32_t size, int enable); -extern void agpgart_set_gart(void *handle, uint32_t base); - #define video_inform(type, video_timings_ptr) video_inform_monitor(type, video_timings_ptr, monitor_index_global) #define video_get_type() video_get_type_monitor(0) #define video_blend(x, y) video_blend_monitor(x, y, monitor_index_global) @@ -532,8 +529,6 @@ extern const device_t velocity_100_agp_device; /* Wyse 700 */ extern const device_t wy700_device; -/* AGP GART */ -extern const device_t agpgart_device; #endif #endif /*EMU_VIDEO_H*/ diff --git a/src/video/agpgart.c b/src/video/agpgart.c index b115d0b54..a1374cb10 100644 --- a/src/video/agpgart.c +++ b/src/video/agpgart.c @@ -23,13 +23,7 @@ #include <86box/86box.h> #include <86box/device.h> #include <86box/mem.h> - - -typedef struct { - int aperture_enable; - uint32_t aperture_base, aperture_size, aperture_mask, gart_base; - mem_mapping_t aperture_mapping; -} agpgart_t; +#include <86box/agpgart.h> #ifdef ENABLE_AGPGART_LOG @@ -52,10 +46,8 @@ agpgart_log(const char *fmt, ...) void -agpgart_set_aperture(void *handle, uint32_t base, uint32_t size, int enable) +agpgart_set_aperture(agpgart_t *dev, uint32_t base, uint32_t size, int enable) { - agpgart_t *dev = (agpgart_t *) handle; - agpgart_log("AGP GART: set_aperture(%08X, %d, %d)\n", base, size, enable); /* Disable old aperture mapping. */ @@ -75,10 +67,8 @@ agpgart_set_aperture(void *handle, uint32_t base, uint32_t size, int enable) void -agpgart_set_gart(void *handle, uint32_t base) +agpgart_set_gart(agpgart_t *dev, uint32_t base) { - agpgart_t *dev = (agpgart_t *) handle; - agpgart_log("AGP GART: set_gart(%08X)\n", base); /* Set GART base address. */ From 883e7c256a34b32406dd5c594cd5326e661721e6 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 31 Aug 2022 19:19:29 -0400 Subject: [PATCH 329/386] clang format in src/video (#2654) --- src/video/agpgart.c | 46 +- src/video/vid_8514a.c | 3826 +++--- src/video/vid_ati18800.c | 407 +- src/video/vid_ati28800.c | 1009 +- src/video/vid_ati68860_ramdac.c | 323 +- src/video/vid_ati_eeprom.c | 304 +- src/video/vid_ati_mach64.c | 6264 ++++----- src/video/vid_att20c49x_ramdac.c | 228 +- src/video/vid_att2xc498_ramdac.c | 200 +- src/video/vid_av9194.c | 112 +- src/video/vid_bt48x_ramdac.c | 788 +- src/video/vid_cga.c | 758 +- src/video/vid_cga_comp.c | 415 +- src/video/vid_cl54xx.c | 6351 +++++----- src/video/vid_colorplus.c | 649 +- src/video/vid_compaq_cga.c | 646 +- src/video/vid_ddc.c | 234 +- src/video/vid_ega.c | 1694 +-- src/video/vid_ega_render.c | 258 +- src/video/vid_et4000.c | 1146 +- src/video/vid_et4000w32.c | 4051 +++--- src/video/vid_f82c425.c | 847 +- src/video/vid_genius.c | 872 +- src/video/vid_hercules.c | 736 +- src/video/vid_herculesplus.c | 792 +- src/video/vid_ht216.c | 2064 ++- src/video/vid_ibm_rgb528_ramdac.c | 1494 ++- src/video/vid_icd2061.c | 144 +- src/video/vid_ics2494.c | 75 +- src/video/vid_ics2595.c | 90 +- src/video/vid_im1024.c | 813 +- src/video/vid_incolor.c | 1519 ++- src/video/vid_mda.c | 555 +- src/video/vid_mga.c | 7982 ++++++------ src/video/vid_nga.c | 893 +- src/video/vid_oak_oti.c | 700 +- src/video/vid_ogc.c | 925 +- src/video/vid_paradise.c | 1303 +- src/video/vid_pgc.c | 2218 ++-- src/video/vid_rtg310x.c | 446 +- src/video/vid_s3.c | 15340 ++++++++++++----------- src/video/vid_s3_virge.c | 7444 +++++------ src/video/vid_sc1148x_ramdac.c | 208 +- src/video/vid_sc1502x_ramdac.c | 169 +- src/video/vid_sdac_ramdac.c | 380 +- src/video/vid_sigma.c | 994 +- src/video/vid_stg_ramdac.c | 311 +- src/video/vid_svga.c | 2139 ++-- src/video/vid_svga_render.c | 2571 ++-- src/video/vid_table.c | 113 +- src/video/vid_tgui9440.c | 5767 +++++---- src/video/vid_ti_cf62011.c | 207 +- src/video/vid_tkd8001_ramdac.c | 106 +- src/video/vid_tvga.c | 705 +- src/video/vid_tvp3026_ramdac.c | 919 +- src/video/vid_vga.c | 255 +- src/video/vid_voodoo.c | 1890 ++- src/video/vid_voodoo_banshee.c | 5044 ++++---- src/video/vid_voodoo_banshee_blitter.c | 2551 ++-- src/video/vid_voodoo_blitter.c | 816 +- src/video/vid_voodoo_display.c | 1070 +- src/video/vid_voodoo_fb.c | 676 +- src/video/vid_voodoo_fifo.c | 869 +- src/video/vid_voodoo_reg.c | 2489 ++-- src/video/vid_voodoo_render.c | 2766 ++-- src/video/vid_voodoo_setup.c | 348 +- src/video/vid_voodoo_texture.c | 963 +- src/video/vid_wy700.c | 1583 ++- src/video/vid_xga.c | 1069 +- src/video/video.c | 921 +- 70 files changed, 58560 insertions(+), 56300 deletions(-) diff --git a/src/video/agpgart.c b/src/video/agpgart.c index a1374cb10..cf4fcd7a8 100644 --- a/src/video/agpgart.c +++ b/src/video/agpgart.c @@ -25,7 +25,6 @@ #include <86box/mem.h> #include <86box/agpgart.h> - #ifdef ENABLE_AGPGART_LOG int agpgart_do_log = ENABLE_AGPGART_LOG; @@ -35,16 +34,15 @@ agpgart_log(const char *fmt, ...) va_list ap; if (agpgart_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define agpgart_log(fmt, ...) +# define agpgart_log(fmt, ...) #endif - void agpgart_set_aperture(agpgart_t *dev, uint32_t base, uint32_t size, int enable) { @@ -60,12 +58,11 @@ agpgart_set_aperture(agpgart_t *dev, uint32_t base, uint32_t size, int enable) /* Enable new aperture mapping if requested. */ if (dev->aperture_base && dev->aperture_size && dev->aperture_enable) { - mem_mapping_set_addr(&dev->aperture_mapping, dev->aperture_base, dev->aperture_size); - mem_mapping_enable(&dev->aperture_mapping); + mem_mapping_set_addr(&dev->aperture_mapping, dev->aperture_base, dev->aperture_size); + mem_mapping_enable(&dev->aperture_mapping); } } - void agpgart_set_gart(agpgart_t *dev, uint32_t base) { @@ -75,7 +72,6 @@ agpgart_set_gart(agpgart_t *dev, uint32_t base) dev->gart_base = base; } - static uint32_t agpgart_translate(uint32_t addr, agpgart_t *dev) { @@ -89,7 +85,6 @@ agpgart_translate(uint32_t addr, agpgart_t *dev) return gart_ptr | (addr & 0x00000fff); } - static uint8_t agpgart_aperture_readb(uint32_t addr, void *priv) { @@ -97,7 +92,6 @@ agpgart_aperture_readb(uint32_t addr, void *priv) return mem_readb_phys(agpgart_translate(addr, dev)); } - static uint16_t agpgart_aperture_readw(uint32_t addr, void *priv) { @@ -105,7 +99,6 @@ agpgart_aperture_readw(uint32_t addr, void *priv) return mem_readw_phys(agpgart_translate(addr, dev)); } - static uint32_t agpgart_aperture_readl(uint32_t addr, void *priv) { @@ -113,7 +106,6 @@ agpgart_aperture_readl(uint32_t addr, void *priv) return mem_readl_phys(agpgart_translate(addr, dev)); } - static void agpgart_aperture_writeb(uint32_t addr, uint8_t val, void *priv) { @@ -121,7 +113,6 @@ agpgart_aperture_writeb(uint32_t addr, uint8_t val, void *priv) mem_writeb_phys(agpgart_translate(addr, dev), val); } - static void agpgart_aperture_writew(uint32_t addr, uint16_t val, void *priv) { @@ -129,7 +120,6 @@ agpgart_aperture_writew(uint32_t addr, uint16_t val, void *priv) mem_writew_phys(agpgart_translate(addr, dev), val); } - static void agpgart_aperture_writel(uint32_t addr, uint32_t val, void *priv) { @@ -137,7 +127,6 @@ agpgart_aperture_writel(uint32_t addr, uint32_t val, void *priv) mem_writel_phys(agpgart_translate(addr, dev), val); } - static void * agpgart_init(const device_t *info) { @@ -148,14 +137,13 @@ agpgart_init(const device_t *info) /* Create aperture mapping. */ mem_mapping_add(&dev->aperture_mapping, 0, 0, - agpgart_aperture_readb, agpgart_aperture_readw, agpgart_aperture_readl, - agpgart_aperture_writeb, agpgart_aperture_writew, agpgart_aperture_writel, - NULL, MEM_MAPPING_EXTERNAL, dev); + agpgart_aperture_readb, agpgart_aperture_readw, agpgart_aperture_readl, + agpgart_aperture_writeb, agpgart_aperture_writew, agpgart_aperture_writel, + NULL, MEM_MAPPING_EXTERNAL, dev); return dev; } - static void agpgart_close(void *priv) { @@ -170,15 +158,15 @@ agpgart_close(void *priv) } const device_t agpgart_device = { - .name = "AGP Graphics Address Remapping Table", + .name = "AGP Graphics Address Remapping Table", .internal_name = "agpgart", - .flags = DEVICE_PCI, - .local = 0, - .init = agpgart_init, - .close = agpgart_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = 0, + .init = agpgart_init, + .close = agpgart_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_8514a.c b/src/video/vid_8514a.c index 1cb0a5407..88dcee020 100644 --- a/src/video/vid_8514a.c +++ b/src/video/vid_8514a.c @@ -37,69 +37,133 @@ #include <86box/vid_svga_render.h> #include "cpu.h" -static void ibm8514_accel_out_fifo(ibm8514_t *dev, uint16_t port, uint32_t val, int len); -static void ibm8514_accel_outb(uint16_t port, uint8_t val, void *p); -static void ibm8514_accel_outw(uint16_t port, uint16_t val, void *p); -static uint8_t ibm8514_accel_inb(uint16_t port, void *p); +static void ibm8514_accel_out_fifo(ibm8514_t *dev, uint16_t port, uint32_t val, int len); +static void ibm8514_accel_outb(uint16_t port, uint8_t val, void *p); +static void ibm8514_accel_outw(uint16_t port, uint16_t val, void *p); +static uint8_t ibm8514_accel_inb(uint16_t port, void *p); static uint16_t ibm8514_accel_inw(uint16_t port, void *p); static void ibm8514_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, ibm8514_t *dev, uint8_t ssv, int len); static void ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, ibm8514_t *dev, int len); -#define READ_PIXTRANS_WORD(cx, n) \ - if (cmd <= 1 || (cmd == 5)) { \ - temp = dev->vram[((dev->accel.cy * dev->h_disp) + (cx) + (n)) & dev->vram_mask]; \ - temp |= (dev->vram[((dev->accel.cy * dev->h_disp) + (cx) + (n + 1)) & dev->vram_mask] << 8); \ - } else { \ - temp = dev->vram[(dev->accel.dest + (cx) + (n)) & dev->vram_mask]; \ - temp |= (dev->vram[(dev->accel.dest + (cx) + (n + 1)) & dev->vram_mask] << 8); \ - } +#define READ_PIXTRANS_WORD(cx, n) \ + if (cmd <= 1 || (cmd == 5)) { \ + temp = dev->vram[((dev->accel.cy * dev->h_disp) + (cx) + (n)) & dev->vram_mask]; \ + temp |= (dev->vram[((dev->accel.cy * dev->h_disp) + (cx) + (n + 1)) & dev->vram_mask] << 8); \ + } else { \ + temp = dev->vram[(dev->accel.dest + (cx) + (n)) & dev->vram_mask]; \ + temp |= (dev->vram[(dev->accel.dest + (cx) + (n + 1)) & dev->vram_mask] << 8); \ + } #define READ(addr, dat) \ - dat = dev->vram[(addr) & (dev->vram_mask)]; + dat = dev->vram[(addr) & (dev->vram_mask)]; -#define MIX(mixmode, dest_dat, src_dat) { \ - switch ((mixmode) ? (dev->accel.frgd_mix & 0x1f) : (dev->accel.bkgd_mix & 0x1f)) { \ - case 0x00: dest_dat = ~dest_dat; break; \ - case 0x01: dest_dat = 0; break; \ - case 0x02: dest_dat = ~0; break; \ - case 0x03: dest_dat = dest_dat; break; \ - case 0x04: dest_dat = ~src_dat; break; \ - case 0x05: dest_dat = src_dat ^ dest_dat; break; \ - case 0x06: dest_dat = ~(src_dat ^ dest_dat); break; \ - case 0x07: dest_dat = src_dat; break; \ - case 0x08: dest_dat = ~(src_dat & dest_dat); break; \ - case 0x09: dest_dat = ~src_dat | dest_dat; break; \ - case 0x0a: dest_dat = src_dat | ~dest_dat; break; \ - case 0x0b: dest_dat = src_dat | dest_dat; break; \ - case 0x0c: dest_dat = src_dat & dest_dat; break; \ - case 0x0d: dest_dat = src_dat & ~dest_dat; break; \ - case 0x0e: dest_dat = ~src_dat & dest_dat; break; \ - case 0x0f: dest_dat = ~(src_dat | dest_dat); break; \ - case 0x10: dest_dat = MIN(src_dat, dest_dat); break; \ - case 0x11: dest_dat = dest_dat - src_dat; break; \ - case 0x12: dest_dat = src_dat - dest_dat; break; \ - case 0x13: dest_dat = src_dat + dest_dat; break; \ - case 0x14: dest_dat = MAX(src_dat, dest_dat); break; \ - case 0x15: dest_dat = (dest_dat - src_dat) / 2; break; \ - case 0x16: dest_dat = (src_dat - dest_dat) / 2; break; \ - case 0x17: dest_dat = (dest_dat + src_dat) / 2; break; \ - case 0x18: dest_dat = MAX(0, (dest_dat - src_dat)); break; \ - case 0x19: dest_dat = MAX(0, (dest_dat - src_dat)); break; \ - case 0x1a: dest_dat = MAX(0, (src_dat - dest_dat)); break; \ - case 0x1b: dest_dat = MIN(0xff, (dest_dat + src_dat)); break; \ - case 0x1c: dest_dat = MAX(0, (dest_dat - src_dat)) / 2; break; \ - case 0x1d: dest_dat = MAX(0, (dest_dat - src_dat)) / 2; break; \ - case 0x1e: dest_dat = MAX(0, (src_dat - dest_dat)) / 2; break; \ - case 0x1f: dest_dat = (0xff < (src_dat + dest_dat)) ? 0xff : ((src_dat + dest_dat) / 2); break; \ - } \ - } +#define MIX(mixmode, dest_dat, src_dat) \ + { \ + switch ((mixmode) ? (dev->accel.frgd_mix & 0x1f) : (dev->accel.bkgd_mix & 0x1f)) { \ + case 0x00: \ + dest_dat = ~dest_dat; \ + break; \ + case 0x01: \ + dest_dat = 0; \ + break; \ + case 0x02: \ + dest_dat = ~0; \ + break; \ + case 0x03: \ + dest_dat = dest_dat; \ + break; \ + case 0x04: \ + dest_dat = ~src_dat; \ + break; \ + case 0x05: \ + dest_dat = src_dat ^ dest_dat; \ + break; \ + case 0x06: \ + dest_dat = ~(src_dat ^ dest_dat); \ + break; \ + case 0x07: \ + dest_dat = src_dat; \ + break; \ + case 0x08: \ + dest_dat = ~(src_dat & dest_dat); \ + break; \ + case 0x09: \ + dest_dat = ~src_dat | dest_dat; \ + break; \ + case 0x0a: \ + dest_dat = src_dat | ~dest_dat; \ + break; \ + case 0x0b: \ + dest_dat = src_dat | dest_dat; \ + break; \ + case 0x0c: \ + dest_dat = src_dat & dest_dat; \ + break; \ + case 0x0d: \ + dest_dat = src_dat & ~dest_dat; \ + break; \ + case 0x0e: \ + dest_dat = ~src_dat & dest_dat; \ + break; \ + case 0x0f: \ + dest_dat = ~(src_dat | dest_dat); \ + break; \ + case 0x10: \ + dest_dat = MIN(src_dat, dest_dat); \ + break; \ + case 0x11: \ + dest_dat = dest_dat - src_dat; \ + break; \ + case 0x12: \ + dest_dat = src_dat - dest_dat; \ + break; \ + case 0x13: \ + dest_dat = src_dat + dest_dat; \ + break; \ + case 0x14: \ + dest_dat = MAX(src_dat, dest_dat); \ + break; \ + case 0x15: \ + dest_dat = (dest_dat - src_dat) / 2; \ + break; \ + case 0x16: \ + dest_dat = (src_dat - dest_dat) / 2; \ + break; \ + case 0x17: \ + dest_dat = (dest_dat + src_dat) / 2; \ + break; \ + case 0x18: \ + dest_dat = MAX(0, (dest_dat - src_dat)); \ + break; \ + case 0x19: \ + dest_dat = MAX(0, (dest_dat - src_dat)); \ + break; \ + case 0x1a: \ + dest_dat = MAX(0, (src_dat - dest_dat)); \ + break; \ + case 0x1b: \ + dest_dat = MIN(0xff, (dest_dat + src_dat)); \ + break; \ + case 0x1c: \ + dest_dat = MAX(0, (dest_dat - src_dat)) / 2; \ + break; \ + case 0x1d: \ + dest_dat = MAX(0, (dest_dat - src_dat)) / 2; \ + break; \ + case 0x1e: \ + dest_dat = MAX(0, (src_dat - dest_dat)) / 2; \ + break; \ + case 0x1f: \ + dest_dat = (0xff < (src_dat + dest_dat)) ? 0xff : ((src_dat + dest_dat) / 2); \ + break; \ + } \ + } -#define WRITE(addr, dat) \ - dev->vram[((addr)) & (dev->vram_mask)] = dat; \ +#define WRITE(addr, dat) \ + dev->vram[((addr)) & (dev->vram_mask)] = dat; \ dev->changedvram[(((addr)) & (dev->vram_mask)) >> 12] = changeframecount; - static int ibm8514_cpu_src(ibm8514_t *dev) { @@ -124,18 +188,17 @@ ibm8514_cpu_dest(ibm8514_t *dev) return 1; } - static void ibm8514_accel_out_pixtrans(ibm8514_t *dev, uint16_t port, uint16_t val, int len) { - uint8_t nibble = 0; + uint8_t nibble = 0; uint32_t pixelxfer = 0, monoxfer = 0xffffffff; - int pixcnt = 0; - int pixcntl = (dev->accel.multifunc[0x0a] >> 6) & 3; - int frgd_mix = (dev->accel.frgd_mix >> 5) & 3; - int bkgd_mix = (dev->accel.bkgd_mix >> 5) & 3; - int cmd = dev->accel.cmd >> 13; - int and3 = dev->accel.cur_x & 3; + int pixcnt = 0; + int pixcntl = (dev->accel.multifunc[0x0a] >> 6) & 3; + int frgd_mix = (dev->accel.frgd_mix >> 5) & 3; + int bkgd_mix = (dev->accel.bkgd_mix >> 5) & 3; + int cmd = dev->accel.cmd >> 13; + int and3 = dev->accel.cur_x & 3; if (dev->accel.cmd & 0x100) { if (len != 1) { @@ -459,9 +522,9 @@ ibm8514_accel_out_fifo(ibm8514_t *dev, uint16_t port, uint32_t val, int len) if (len == 1) dev->accel.cmd = (dev->accel.cmd & 0xff00) | val; else { - dev->data_available = 0; + dev->data_available = 0; dev->data_available2 = 0; - dev->accel.cmd = val; + dev->accel.cmd = val; if (dev->accel.cmd & 0x100) dev->accel.cmd_back = 0; ibm8514_accel_start(-1, 0, -1, 0, dev, len); @@ -470,9 +533,9 @@ ibm8514_accel_out_fifo(ibm8514_t *dev, uint16_t port, uint32_t val, int len) case 0x9ae9: case 0xdae9: if (len == 1) { - dev->data_available = 0; + dev->data_available = 0; dev->data_available2 = 0; - dev->accel.cmd = (dev->accel.cmd & 0xff) | (val << 8); + dev->accel.cmd = (dev->accel.cmd & 0xff) | (val << 8); if (port == 0xdae9) { if (dev->accel.cmd & 0x100) dev->accel.cmd_back = 0; @@ -488,8 +551,8 @@ ibm8514_accel_out_fifo(ibm8514_t *dev, uint16_t port, uint32_t val, int len) dev->accel.short_stroke = (dev->accel.short_stroke & 0xff00) | val; else { dev->accel.short_stroke = val; - dev->accel.cx = dev->accel.cur_x; - dev->accel.cy = dev->accel.cur_y; + dev->accel.cx = dev->accel.cur_x; + dev->accel.cy = dev->accel.cur_y; if (dev->accel.cur_x & 0x400) dev->accel.cx |= ~0x3ff; if (dev->accel.cur_y & 0x400) @@ -507,8 +570,8 @@ ibm8514_accel_out_fifo(ibm8514_t *dev, uint16_t port, uint32_t val, int len) case 0xdee9: if (len == 1) { dev->accel.short_stroke = (dev->accel.short_stroke & 0xff) | (val << 8); - dev->accel.cx = dev->accel.cur_x; - dev->accel.cy = dev->accel.cur_y; + dev->accel.cx = dev->accel.cur_x; + dev->accel.cy = dev->accel.cur_y; if (dev->accel.cur_x & 0x400) dev->accel.cx |= ~0x3ff; if (dev->accel.cur_y & 0x400) @@ -630,7 +693,7 @@ ibm8514_accel_out_fifo(ibm8514_t *dev, uint16_t port, uint32_t val, int len) if (len == 1) dev->accel.multifunc_cntl = (dev->accel.multifunc_cntl & 0xff00) | val; else { - dev->accel.multifunc_cntl = val; + dev->accel.multifunc_cntl = val; dev->accel.multifunc[dev->accel.multifunc_cntl >> 12] = dev->accel.multifunc_cntl & 0xfff; if ((dev->accel.multifunc_cntl >> 12) == 1) { dev->accel.clip_top = val & 0x3ff; @@ -647,7 +710,7 @@ ibm8514_accel_out_fifo(ibm8514_t *dev, uint16_t port, uint32_t val, int len) case 0xbee9: case 0xfee9: if (len == 1) { - dev->accel.multifunc_cntl = (dev->accel.multifunc_cntl & 0xff) | (val << 8); + dev->accel.multifunc_cntl = (dev->accel.multifunc_cntl & 0xff) | (val << 8); dev->accel.multifunc[dev->accel.multifunc_cntl >> 12] = dev->accel.multifunc_cntl & 0xfff; if (port == 0xfee9) dev->accel.cmd_back = 1; @@ -661,7 +724,7 @@ ibm8514_accel_out_fifo(ibm8514_t *dev, uint16_t port, uint32_t val, int len) static void ibm8514_ramdac_out(uint16_t port, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; switch (port) { case 0x2ea: @@ -682,8 +745,8 @@ ibm8514_ramdac_out(uint16_t port, uint8_t val, void *p) static uint8_t ibm8514_ramdac_in(uint16_t port, void *p) { - svga_t *svga = (svga_t *)p; - uint8_t ret = 0xff; + svga_t *svga = (svga_t *) p; + uint8_t ret = 0xff; switch (port) { case 0x2ea: @@ -698,7 +761,6 @@ ibm8514_ramdac_in(uint16_t port, void *p) case 0x2ed: ret = svga_in(0x3c9, svga); break; - } return ret; } @@ -779,24 +841,24 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len) case 0x2e9: if (len != 1) { dev->htotal = (dev->htotal & 0xff) | (val << 8); - //pclog("IBM 8514/A: H_TOTAL write 02E8 = %d\n", dev->htotal + 1); + // pclog("IBM 8514/A: H_TOTAL write 02E8 = %d\n", dev->htotal + 1); svga_recalctimings(svga); } break; case 0x6e8: dev->hdisp = val; - //pclog("IBM 8514/A: H_DISP write 06E8 = %d\n", dev->hdisp + 1); + // pclog("IBM 8514/A: H_DISP write 06E8 = %d\n", dev->hdisp + 1); svga_recalctimings(svga); break; case 0xae8: - //pclog("IBM 8514/A: H_SYNC_STRT write 0AE8 = %d\n", val + 1); + // pclog("IBM 8514/A: H_SYNC_STRT write 0AE8 = %d\n", val + 1); svga_recalctimings(svga); break; case 0xee8: - //pclog("IBM 8514/A: H_SYNC_WID write 0EE8 = %d\n", val + 1); + // pclog("IBM 8514/A: H_SYNC_WID write 0EE8 = %d\n", val + 1); svga_recalctimings(svga); break; @@ -811,7 +873,7 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len) case 0x12e9: if (len == 1) { dev->vtotal = (dev->vtotal & 0xff) | ((val & 0x1f) << 8); - //pclog("IBM 8514/A: V_TOTAL write 12E8 = %d\n", dev->vtotal); + // pclog("IBM 8514/A: V_TOTAL write 12E8 = %d\n", dev->vtotal); svga_recalctimings(svga); } break; @@ -827,7 +889,7 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len) case 0x16e9: if (len == 1) { dev->vdisp = (dev->vdisp & 0xff) | ((val & 0x1f) << 8); - //pclog("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->vdisp); + // pclog("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->vdisp); svga_recalctimings(svga); } break; @@ -843,21 +905,21 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len) case 0x1ae9: if (len == 1) { dev->vsyncstart = (dev->vsyncstart & 0xff) | ((val & 0x1f) << 8); - //pclog("IBM 8514/A: V_SYNC_STRT write 1AE8 = %d\n", dev->vsyncstart); + // pclog("IBM 8514/A: V_SYNC_STRT write 1AE8 = %d\n", dev->vsyncstart); svga_recalctimings(svga); } break; case 0x1ee8: dev->vsyncwidth = val; - //pclog("IBM 8514/A: V_SYNC_WID write 1EE8 = %02x\n", val); + // pclog("IBM 8514/A: V_SYNC_WID write 1EE8 = %02x\n", val); svga_recalctimings(svga); break; case 0x22e8: dev->disp_cntl = val & 0x7e; dev->interlace = !!(val & 0x10); - //pclog("IBM 8514/A: DISP_CNTL write 22E8 = %02x, SCANMODULOS = %d\n", dev->disp_cntl, dev->scanmodulos); + // pclog("IBM 8514/A: DISP_CNTL write 22E8 = %02x, SCANMODULOS = %d\n", dev->disp_cntl, dev->scanmodulos); svga_recalctimings(svga); break; @@ -877,9 +939,9 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len) case 0x4ae8: dev->accel.advfunc_cntl = val & 7; - vga_on = ((dev->accel.advfunc_cntl & 1) == 0) ? 1 : 0; - ibm8514_on = !vga_on; - //pclog("IBM 8514/A: VGA ON = %i, val = %02x\n", vga_on, val); + vga_on = ((dev->accel.advfunc_cntl & 1) == 0) ? 1 : 0; + ibm8514_on = !vga_on; + // pclog("IBM 8514/A: VGA ON = %i, val = %02x\n", vga_on, val); svga_recalctimings(svga); break; } @@ -889,23 +951,23 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len) static void ibm8514_accel_outb(uint16_t port, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; ibm8514_accel_out(port, val, svga, 1); } static void ibm8514_accel_outw(uint16_t port, uint16_t val, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; ibm8514_accel_out(port, val, svga, 2); } static uint32_t ibm8514_accel_in(uint16_t port, svga_t *svga, int len) { - ibm8514_t *dev = &svga->dev8514; - uint32_t temp = 0; - int cmd; + ibm8514_t *dev = &svga->dev8514; + uint32_t temp = 0; + int cmd; switch (port) { case 0x6e8: @@ -980,7 +1042,7 @@ ibm8514_accel_in(uint16_t port, svga_t *svga, int len) case 0xe6e8: if (ibm8514_cpu_dest(dev)) { if (len == 1) { - ;//READ_PIXTRANS_BYTE_IO(0) + ; // READ_PIXTRANS_BYTE_IO(0) } else { cmd = (dev->accel.cmd >> 13); READ_PIXTRANS_WORD(dev->accel.cx, 0) @@ -996,7 +1058,7 @@ ibm8514_accel_in(uint16_t port, svga_t *svga, int len) case 0xe6e9: if (ibm8514_cpu_dest(dev)) { if (len == 1) { - ;//READ_PIXTRANS_BYTE_IO(1) + ; // READ_PIXTRANS_BYTE_IO(1) ibm8514_accel_out_pixtrans(dev, port, temp, len); } } @@ -1005,28 +1067,26 @@ ibm8514_accel_in(uint16_t port, svga_t *svga, int len) return temp; } - static uint8_t ibm8514_accel_inb(uint16_t port, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; return ibm8514_accel_in(port, svga, 1); } static uint16_t ibm8514_accel_inw(uint16_t port, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; return ibm8514_accel_in(port, svga, 2); } - static void ibm8514_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, ibm8514_t *dev, uint8_t ssv, int len) { if (!cpu_input) { - dev->accel.ssv_len = ssv & 0x0f; - dev->accel.ssv_dir = ssv & 0xe0; + dev->accel.ssv_len = ssv & 0x0f; + dev->accel.ssv_dir = ssv & 0xe0; dev->accel.ssv_draw = ssv & 0x10; if (ibm8514_cpu_src(dev)) { @@ -1040,28 +1100,28 @@ ibm8514_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t static void ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, ibm8514_t *dev, int len) { - uint8_t src_dat = 0, dest_dat, old_dest_dat; - int frgd_mix, bkgd_mix; - uint16_t clip_b = dev->accel.multifunc[3] & 0x7ff; - uint16_t clip_r = dev->accel.multifunc[4] & 0x7ff; - int pixcntl = (dev->accel.multifunc[0x0a] >> 6) & 3; - uint8_t mix_mask = 0x80; - uint8_t compare = dev->accel.color_cmp & 0xff; - int compare_mode = dev->accel.multifunc[0x0a] & 0x38; - int cmd = dev->accel.cmd >> 13; - uint8_t wrt_mask = dev->accel.wrt_mask & 0xff; - uint8_t rd_mask = ((dev->accel.rd_mask & 0x01) << 7) | ((dev->accel.rd_mask & 0xfe) >> 1); - uint8_t rd_mask_polygon = dev->accel.rd_mask & 0xff; - uint8_t frgd_color = dev->accel.frgd_color; - uint8_t bkgd_color = dev->accel.bkgd_color; - uint32_t old_mix_dat; - int and3 = dev->accel.cur_x & 3; - uint8_t poly_src = 0; + uint8_t src_dat = 0, dest_dat, old_dest_dat; + int frgd_mix, bkgd_mix; + uint16_t clip_b = dev->accel.multifunc[3] & 0x7ff; + uint16_t clip_r = dev->accel.multifunc[4] & 0x7ff; + int pixcntl = (dev->accel.multifunc[0x0a] >> 6) & 3; + uint8_t mix_mask = 0x80; + uint8_t compare = dev->accel.color_cmp & 0xff; + int compare_mode = dev->accel.multifunc[0x0a] & 0x38; + int cmd = dev->accel.cmd >> 13; + uint8_t wrt_mask = dev->accel.wrt_mask & 0xff; + uint8_t rd_mask = ((dev->accel.rd_mask & 0x01) << 7) | ((dev->accel.rd_mask & 0xfe) >> 1); + uint8_t rd_mask_polygon = dev->accel.rd_mask & 0xff; + uint8_t frgd_color = dev->accel.frgd_color; + uint8_t bkgd_color = dev->accel.bkgd_color; + uint32_t old_mix_dat; + int and3 = dev->accel.cur_x & 3; + uint8_t poly_src = 0; - if (dev->accel.cmd & 0x100) { - dev->force_busy = 1; + if (dev->accel.cmd & 0x100) { + dev->force_busy = 1; dev->force_busy2 = 1; - } + } frgd_mix = (dev->accel.frgd_mix >> 5) & 3; bkgd_mix = (dev->accel.bkgd_mix >> 5) & 3; @@ -1159,335 +1219,149 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat old_mix_dat = mix_dat; - /*Bit 4 of the Command register is the draw yes bit, which enables writing to memory/reading from memory when enabled. - When this bit is disabled, no writing to memory/reading from memory is allowed. (This bit is almost meaningless on - the NOP command)*/ + /*Bit 4 of the Command register is the draw yes bit, which enables writing to memory/reading from memory when enabled. + When this bit is disabled, no writing to memory/reading from memory is allowed. (This bit is almost meaningless on + the NOP command)*/ switch (cmd) { case 0: /*NOP (Short Stroke Vectors)*/ - if (dev->accel.ssv_state == 0) - break; + if (dev->accel.ssv_state == 0) + break; - if (dev->accel.cmd & 8) { - while (count-- && dev->accel.ssv_len >= 0) { - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && - dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = cpu_dat & 0xff; break; - case 3: src_dat = 0; break; - } - READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { - MIX(mix_dat & mix_mask, dest_dat, src_dat); - - if (dev->accel.ssv_draw) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + if (dev->accel.cmd & 8) { + while (count-- && dev->accel.ssv_len >= 0) { + if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat & 0xff; + break; + case 3: + src_dat = 0; + break; } - } - } - - mix_dat <<= 1; - mix_dat |= 1; - cpu_dat >>= 8; - - if (!dev->accel.ssv_len) - break; - - switch (dev->accel.ssv_dir & 0xe0) { - case 0x00: dev->accel.cx++; break; - case 0x20: dev->accel.cx++; dev->accel.cy--; break; - case 0x40: dev->accel.cy--; break; - case 0x60: dev->accel.cx--; dev->accel.cy--; break; - case 0x80: dev->accel.cx--; break; - case 0xa0: dev->accel.cx--; dev->accel.cy++; break; - case 0xc0: dev->accel.cy++; break; - case 0xe0: dev->accel.cx++; dev->accel.cy++; break; - } - - dev->accel.ssv_len--; - } - - dev->accel.cur_x = dev->accel.cx; - dev->accel.cur_y = dev->accel.cy; - } - break; - - case 1: /*Draw line*/ - if (!cpu_input) { - dev->accel.xx_count = 0; - dev->accel.cx = dev->accel.cur_x; - dev->accel.cy = dev->accel.cur_y; - - if (dev->accel.cur_x & 0x400) { - dev->accel.cx |= ~0x3ff; - } - if (dev->accel.cur_y & 0x400) { - dev->accel.cy |= ~0x3ff; - } - - dev->accel.sy = dev->accel.maj_axis_pcnt; - - if (ibm8514_cpu_src(dev)) { - if (dev->accel.cmd & 2) { - if (dev->accel.cmd & 8) { - if (and3 == 1) { - dev->accel.sy += 4; - if (dev->accel.cmd & 0x20) - dev->accel.cx += 4; - else - dev->accel.cx -= 4; - } else if (and3 == 2) { - dev->accel.sy += 5; - if (dev->accel.cmd & 0x20) - dev->accel.cx += 5; - else - dev->accel.cx -= 5; - } else if (and3 == 3) { - dev->accel.sy += 6; - if (dev->accel.cmd & 0x20) - dev->accel.cx += 6; - else - dev->accel.cx -= 6; - } else { - dev->accel.sy += 3; - if (dev->accel.cmd & 0x20) - dev->accel.cx += 3; - else - dev->accel.cx -= 3; - } - } - } - dev->data_available = 0; - dev->data_available2 = 0; - return; /*Wait for data from CPU*/ - } else if (ibm8514_cpu_dest(dev)) { - dev->data_available = 1; - dev->data_available2 = 1; - return; - } - } - - if (dev->accel.cmd & 8) { /*Vector Line*/ - if (ibm8514_cpu_dest(dev) && cpu_input && (dev->accel.cmd & 2)) - count >>= 1; - dev->accel.xx_count++; - while (count-- && (dev->accel.sy >= 0)) { - if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && - dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { - if (ibm8514_cpu_dest(dev) && (pixcntl == 0)) { - mix_dat = mix_mask; /* Mix data = forced to foreground register. */ - } else if (ibm8514_cpu_dest(dev) && (pixcntl == 3)) { - /* Mix data = current video memory value. */ - READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } - - if (ibm8514_cpu_dest(dev)) { - READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, src_dat); - if (pixcntl == 3) - src_dat = ((src_dat & rd_mask) == rd_mask); - } else switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = cpu_dat & 0xff; break; - case 3: src_dat = 0; break; - } - - READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - if ((dev->accel.cmd & 2) && ibm8514_cpu_src(dev)) { - if (and3 == 1) { - if (dev->accel.xx_count >= 2) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } - } - } else if (and3 == 2) { - if (dev->accel.xx_count == 2) { - if (count <= 2) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } - } - } else if (dev->accel.xx_count >= 3) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } - } - } else if (and3 == 3) { - if (dev->accel.xx_count == 2) { - if (count <= 1) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } - } - } else if (dev->accel.xx_count >= 3) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } - } - } else { - if (dev->accel.xx_count == 1) { - if (!count) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } - } - } else if (dev->accel.xx_count >= 2) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } - } - } - } else { - if (ibm8514_cpu_src(dev) || !cpu_input) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } - } - } - } - } - - mix_dat <<= 1; - mix_dat |= 1; - cpu_dat >>= 8; - - if (dev->accel.sy == 0) { - break; - } - - switch (dev->accel.cmd & 0xe0) { - case 0x00: dev->accel.cx++; break; - case 0x20: dev->accel.cx++; dev->accel.cy--; break; - case 0x40: dev->accel.cy--; break; - case 0x60: dev->accel.cx--; dev->accel.cy--; break; - case 0x80: dev->accel.cx--; break; - case 0xa0: dev->accel.cx--; dev->accel.cy++; break; - case 0xc0: dev->accel.cy++; break; - case 0xe0: dev->accel.cx++; dev->accel.cy++; break; - } - - dev->accel.sy--; - } - dev->accel.cur_x = dev->accel.cx; - dev->accel.cur_y = dev->accel.cy; - } else { /*Bresenham*/ - if (pixcntl == 1) { - dev->accel.temp_cnt = 8; - while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.temp_cnt == 0) { - dev->accel.temp_cnt = 8; - mix_dat = old_mix_dat; - } - if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && - dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { - if (ibm8514_cpu_dest(dev)) { - READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, src_dat); - } else switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = cpu_dat & 0xff; break; - case 3: src_dat = 0; break; - } - READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & 1, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + MIX(mix_dat & mix_mask, dest_dat, src_dat); + + if (dev->accel.ssv_draw) { WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); } } } - dev->accel.temp_cnt--; - mix_dat >>= 1; + mix_dat <<= 1; + mix_dat |= 1; cpu_dat >>= 8; - if (dev->accel.sy == 0) { + if (!dev->accel.ssv_len) break; + + switch (dev->accel.ssv_dir & 0xe0) { + case 0x00: + dev->accel.cx++; + break; + case 0x20: + dev->accel.cx++; + dev->accel.cy--; + break; + case 0x40: + dev->accel.cy--; + break; + case 0x60: + dev->accel.cx--; + dev->accel.cy--; + break; + case 0x80: + dev->accel.cx--; + break; + case 0xa0: + dev->accel.cx--; + dev->accel.cy++; + break; + case 0xc0: + dev->accel.cy++; + break; + case 0xe0: + dev->accel.cx++; + dev->accel.cy++; + break; } - if (dev->accel.err_term >= dev->accel.maj_axis_pcnt) { - dev->accel.err_term += dev->accel.destx_distp; - /*Step minor axis*/ - switch (dev->accel.cmd & 0xe0) { - case 0x00: dev->accel.cy--; break; - case 0x20: dev->accel.cy--; break; - case 0x40: dev->accel.cx--; break; - case 0x60: dev->accel.cx++; break; - case 0x80: dev->accel.cy++; break; - case 0xa0: dev->accel.cy++; break; - case 0xc0: dev->accel.cx--; break; - case 0xe0: dev->accel.cx++; break; - } - } else - dev->accel.err_term += dev->accel.desty_axstp; - - /*Step major axis*/ - switch (dev->accel.cmd & 0xe0) { - case 0x00: dev->accel.cx--; break; - case 0x20: dev->accel.cx++; break; - case 0x40: dev->accel.cy--; break; - case 0x60: dev->accel.cy--; break; - case 0x80: dev->accel.cx--; break; - case 0xa0: dev->accel.cx++; break; - case 0xc0: dev->accel.cy++; break; - case 0xe0: dev->accel.cy++; break; - } - - dev->accel.sy--; + dev->accel.ssv_len--; } - } else { + + dev->accel.cur_x = dev->accel.cx; + dev->accel.cur_y = dev->accel.cy; + } + break; + + case 1: /*Draw line*/ + if (!cpu_input) { + dev->accel.xx_count = 0; + dev->accel.cx = dev->accel.cur_x; + dev->accel.cy = dev->accel.cur_y; + + if (dev->accel.cur_x & 0x400) { + dev->accel.cx |= ~0x3ff; + } + if (dev->accel.cur_y & 0x400) { + dev->accel.cy |= ~0x3ff; + } + + dev->accel.sy = dev->accel.maj_axis_pcnt; + + if (ibm8514_cpu_src(dev)) { + if (dev->accel.cmd & 2) { + if (dev->accel.cmd & 8) { + if (and3 == 1) { + dev->accel.sy += 4; + if (dev->accel.cmd & 0x20) + dev->accel.cx += 4; + else + dev->accel.cx -= 4; + } else if (and3 == 2) { + dev->accel.sy += 5; + if (dev->accel.cmd & 0x20) + dev->accel.cx += 5; + else + dev->accel.cx -= 5; + } else if (and3 == 3) { + dev->accel.sy += 6; + if (dev->accel.cmd & 0x20) + dev->accel.cx += 6; + else + dev->accel.cx -= 6; + } else { + dev->accel.sy += 3; + if (dev->accel.cmd & 0x20) + dev->accel.cx += 3; + else + dev->accel.cx -= 3; + } + } + } + dev->data_available = 0; + dev->data_available2 = 0; + return; /*Wait for data from CPU*/ + } else if (ibm8514_cpu_dest(dev)) { + dev->data_available = 1; + dev->data_available2 = 1; + return; + } + } + + if (dev->accel.cmd & 8) { /*Vector Line*/ + if (ibm8514_cpu_dest(dev) && cpu_input && (dev->accel.cmd & 2)) + count >>= 1; + dev->accel.xx_count++; while (count-- && (dev->accel.sy >= 0)) { - if (((dev->accel.cx) >= dev->accel.clip_left && (dev->accel.cx) <= clip_r && - (dev->accel.cy) >= dev->accel.clip_top && (dev->accel.cy) <= clip_b)) { + if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { if (ibm8514_cpu_dest(dev) && (pixcntl == 0)) { mix_dat = mix_mask; /* Mix data = forced to foreground register. */ } else if (ibm8514_cpu_dest(dev) && (pixcntl == 3)) { @@ -1501,29 +1375,94 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, src_dat); if (pixcntl == 3) src_dat = ((src_dat & rd_mask) == rd_mask); - } else switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = cpu_dat & 0xff; break; - case 3: src_dat = 0; break; - } + } else + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat & 0xff; + break; + case 3: + src_dat = 0; + break; + } READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + if ((dev->accel.cmd & 2) && ibm8514_cpu_src(dev)) { + if (and3 == 1) { + if (dev->accel.xx_count >= 2) { + if ((dev->accel.cmd & 4) && dev->accel.sy) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } + } + } else if (and3 == 2) { + if (dev->accel.xx_count == 2) { + if (count <= 2) { + if ((dev->accel.cmd & 4) && dev->accel.sy) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } + } + } else if (dev->accel.xx_count >= 3) { + if ((dev->accel.cmd & 4) && dev->accel.sy) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } + } + } else if (and3 == 3) { + if (dev->accel.xx_count == 2) { + if (count <= 1) { + if ((dev->accel.cmd & 4) && dev->accel.sy) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } + } + } else if (dev->accel.xx_count >= 3) { + if ((dev->accel.cmd & 4) && dev->accel.sy) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } + } + } else { + if (dev->accel.xx_count == 1) { + if (!count) { + if ((dev->accel.cmd & 4) && dev->accel.sy) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } + } + } else if (dev->accel.xx_count >= 2) { + if ((dev->accel.cmd & 4) && dev->accel.sy) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } + } + } + } else { + if (ibm8514_cpu_src(dev) || !cpu_input) { + if ((dev->accel.cmd & 4) && dev->accel.sy) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } + } } } } @@ -1536,311 +1475,195 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat break; } - if (dev->accel.err_term >= dev->accel.maj_axis_pcnt) { - dev->accel.err_term += dev->accel.destx_distp; - /*Step minor axis*/ - switch (dev->accel.cmd & 0xe0) { - case 0x00: dev->accel.cy--; break; - case 0x20: dev->accel.cy--; break; - case 0x40: dev->accel.cx--; break; - case 0x60: dev->accel.cx++; break; - case 0x80: dev->accel.cy++; break; - case 0xa0: dev->accel.cy++; break; - case 0xc0: dev->accel.cx--; break; - case 0xe0: dev->accel.cx++; break; - } - } else - dev->accel.err_term += dev->accel.desty_axstp; - - /*Step major axis*/ switch (dev->accel.cmd & 0xe0) { - case 0x00: dev->accel.cx--; break; - case 0x20: dev->accel.cx++; break; - case 0x40: dev->accel.cy--; break; - case 0x60: dev->accel.cy--; break; - case 0x80: dev->accel.cx--; break; - case 0xa0: dev->accel.cx++; break; - case 0xc0: dev->accel.cy++; break; - case 0xe0: dev->accel.cy++; break; + case 0x00: + dev->accel.cx++; + break; + case 0x20: + dev->accel.cx++; + dev->accel.cy--; + break; + case 0x40: + dev->accel.cy--; + break; + case 0x60: + dev->accel.cx--; + dev->accel.cy--; + break; + case 0x80: + dev->accel.cx--; + break; + case 0xa0: + dev->accel.cx--; + dev->accel.cy++; + break; + case 0xc0: + dev->accel.cy++; + break; + case 0xe0: + dev->accel.cx++; + dev->accel.cy++; + break; } dev->accel.sy--; } - } - dev->accel.cur_x = dev->accel.cx; - dev->accel.cur_y = dev->accel.cy; - } - break; - - case 2: /*Rectangle fill (X direction)*/ - case 3: /*Rectangle fill (Y direction)*/ - case 4: /*Rectangle fill (Y direction using nibbles)*/ - if (!cpu_input) { - dev->accel.x_count = 0; - dev->accel.xx_count = 0; - dev->accel.odd_out = 0; - dev->accel.odd_in = 0; - dev->accel.input = 0; - dev->accel.output = 0; - dev->accel.newdest_out = 0; - dev->accel.newdest_in = 0; - - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - dev->accel.sy = dev->accel.multifunc[0] & 0x7ff; - - dev->accel.cx = dev->accel.cur_x & 0x3ff; - if (dev->accel.cur_x & 0x400) - dev->accel.cx |= ~0x3ff; - dev->accel.cy = dev->accel.cur_y & 0x3ff; - if (dev->accel.cur_y & 0x400) - dev->accel.cy |= ~0x3ff; - - dev->accel.dest = dev->accel.cy * dev->h_disp; - dev->accel.fill_state = 0; - - if (cmd == 4) - dev->accel.cmd |= 2; - else if (cmd == 3) - dev->accel.cmd &= ~2; - - if (ibm8514_cpu_src(dev)) { - if (dev->accel.cmd & 2) { - if (!(dev->accel.cmd & 0x1000)) { - if (!(dev->accel.cmd & 8)) { - dev->accel.sx += and3; - dev->accel.nibbleset = (uint8_t *)calloc(1, (dev->accel.sx >> 3) + 1); - dev->accel.writemono = (uint8_t *)calloc(1, (dev->accel.sx >> 3) + 1); - dev->accel.sys_cnt = (dev->accel.sx >> 3) + 1; - } else { - if (and3 == 1) { - dev->accel.sx += 4; - if (dev->accel.cmd & 0x20) - dev->accel.cx += 4; - else - dev->accel.cx -= 4; - } else if (and3 == 2) { - dev->accel.sx += 5; - if (dev->accel.cmd & 0x20) - dev->accel.cx += 5; - else - dev->accel.cx -= 5; - } else if (and3 == 3) { - dev->accel.sx += 6; - if (dev->accel.cmd & 0x20) - dev->accel.cx += 6; - else - dev->accel.cx -= 6; - } else { - dev->accel.sx += 3; - if (dev->accel.cmd & 0x20) - dev->accel.cx += 3; - else - dev->accel.cx -= 3; - } - } - } - } else { - if (!(dev->accel.cmd & 0x40) && (frgd_mix == 2) && (bkgd_mix == 2) && (pixcntl == 0) && (cmd == 2)) { - if (!(dev->accel.sx & 1)) { - dev->accel.output = 1; - dev->accel.newdest_out = (dev->accel.cy + 1) * dev->h_disp; - } - } - } - dev->data_available = 0; - dev->data_available2 = 0; - return; /*Wait for data from CPU*/ - } else if (ibm8514_cpu_dest(dev)) { - if (!(dev->accel.cmd & 2) && (frgd_mix == 2) && (pixcntl == 0) && (cmd == 2)) { - if (!(dev->accel.sx & 1)) { - dev->accel.input = 1; - dev->accel.newdest_in = (dev->accel.cy + 1) * dev->h_disp; - } - } else if (dev->accel.cmd & 2) { - if (dev->accel.cmd & 8) { - dev->accel.sx += and3; - dev->accel.nibbleset = (uint8_t *)calloc(1, (dev->accel.sx >> 3) + 1); - dev->accel.writemono = (uint8_t *)calloc(1, (dev->accel.sx >> 3) + 1); - dev->accel.sys_cnt = (dev->accel.sx >> 3) + 1; - } - } - dev->data_available = 1; - dev->data_available2 = 1; - return; /*Wait for data from CPU*/ - } - } - - if (dev->accel.cmd & 2) { - if (cpu_input) { -rect_fill_pix: - if ((dev->accel.cmd & 8) && ibm8514_cpu_src(dev)) { - dev->accel.xx_count++; + dev->accel.cur_x = dev->accel.cx; + dev->accel.cur_y = dev->accel.cy; + } else { /*Bresenham*/ + if (pixcntl == 1) { + dev->accel.temp_cnt = 8; while (count-- && (dev->accel.sy >= 0)) { - if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && - dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = cpu_dat & 0xff; break; - case 3: src_dat = 0; break; - } + if (dev->accel.temp_cnt == 0) { + dev->accel.temp_cnt = 8; + mix_dat = old_mix_dat; + } + if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { + if (ibm8514_cpu_dest(dev)) { + READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, src_dat); + } else + switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat & 0xff; + break; + case 3: + src_dat = 0; + break; + } - READ(dev->accel.dest + dev->accel.cx, dest_dat); + READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); + MIX(mix_dat & 1, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - if (and3 == 1) { - if (dev->accel.xx_count >= 2) { - if ((dev->accel.cmd & 4) && dev->accel.sx) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } else if (and3 == 2) { - if (dev->accel.xx_count == 2) { - if (count <= 2) { - if ((dev->accel.cmd & 4) && dev->accel.sx) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } else if (dev->accel.xx_count >= 3) { - if ((dev->accel.cmd & 4) && dev->accel.sx) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } else if (and3 == 3) { - if (dev->accel.xx_count == 2) { - if (count <= 1) { - if ((dev->accel.cmd & 4) && dev->accel.sx) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } else if (dev->accel.xx_count >= 3) { - if ((dev->accel.cmd & 4) && dev->accel.sx) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } else { - if (dev->accel.xx_count == 1) { - if (!count) { - if ((dev->accel.cmd & 4) && dev->accel.sx) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } else if (dev->accel.xx_count >= 2) { - if ((dev->accel.cmd & 4) && dev->accel.sx) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } + if ((dev->accel.cmd & 4) && dev->accel.sy) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); } } } - mix_dat <<= 1; - mix_dat |= 1; + dev->accel.temp_cnt--; + mix_dat >>= 1; cpu_dat >>= 8; - switch (dev->accel.cmd & 0xe0) { - case 0x00: dev->accel.cx++; break; - case 0x20: dev->accel.cx++; break; - case 0x60: dev->accel.cx--; break; - case 0x80: dev->accel.cx--; break; - case 0xa0: dev->accel.cx--; break; - case 0xe0: dev->accel.cx++; break; + if (dev->accel.sy == 0) { + break; } - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - if (and3 == 1) { - dev->accel.sx += 4; - } else if (and3 == 2) { - dev->accel.sx += 5; - } else if (and3 == 3) { - dev->accel.sx += 6; - } else { - dev->accel.sx += 3; - } - - if (dev->accel.cmd & 0x20) - dev->accel.cx -= (dev->accel.sx + 1); - else - dev->accel.cx += (dev->accel.sx + 1); - + if (dev->accel.err_term >= dev->accel.maj_axis_pcnt) { + dev->accel.err_term += dev->accel.destx_distp; + /*Step minor axis*/ switch (dev->accel.cmd & 0xe0) { - case 0x20: dev->accel.cy--; break; - case 0x40: dev->accel.cy--; break; - case 0x60: dev->accel.cy--; break; - case 0xa0: dev->accel.cy++; break; - case 0xc0: dev->accel.cy++; break; - case 0xe0: dev->accel.cy++; break; + case 0x00: + dev->accel.cy--; + break; + case 0x20: + dev->accel.cy--; + break; + case 0x40: + dev->accel.cx--; + break; + case 0x60: + dev->accel.cx++; + break; + case 0x80: + dev->accel.cy++; + break; + case 0xa0: + dev->accel.cy++; + break; + case 0xc0: + dev->accel.cx--; + break; + case 0xe0: + dev->accel.cx++; + break; } + } else + dev->accel.err_term += dev->accel.desty_axstp; - dev->accel.dest = dev->accel.cy * dev->h_disp; - dev->accel.sy--; - return; + /*Step major axis*/ + switch (dev->accel.cmd & 0xe0) { + case 0x00: + dev->accel.cx--; + break; + case 0x20: + dev->accel.cx++; + break; + case 0x40: + dev->accel.cy--; + break; + case 0x60: + dev->accel.cy--; + break; + case 0x80: + dev->accel.cx--; + break; + case 0xa0: + dev->accel.cx++; + break; + case 0xc0: + dev->accel.cy++; + break; + case 0xe0: + dev->accel.cy++; + break; } + + dev->accel.sy--; } - break; - } - if (count < 8) { + } else { while (count-- && (dev->accel.sy >= 0)) { - if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && - dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { + if (((dev->accel.cx) >= dev->accel.clip_left && (dev->accel.cx) <= clip_r && (dev->accel.cy) >= dev->accel.clip_top && (dev->accel.cy) <= clip_b)) { if (ibm8514_cpu_dest(dev) && (pixcntl == 0)) { mix_dat = mix_mask; /* Mix data = forced to foreground register. */ } else if (ibm8514_cpu_dest(dev) && (pixcntl == 3)) { /* Mix data = current video memory value. */ - READ(dev->accel.dest + dev->accel.cx, mix_dat); + READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, mix_dat); mix_dat = ((mix_dat & rd_mask) == rd_mask); mix_dat = mix_dat ? mix_mask : 0; } if (ibm8514_cpu_dest(dev)) { - READ(dev->accel.dest + dev->accel.cx, src_dat); + READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, src_dat); if (pixcntl == 3) src_dat = ((src_dat & rd_mask) == rd_mask); - } else switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = cpu_dat & 0xff; break; - case 3: src_dat = 0; break; - } + } else + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat & 0xff; + break; + case 3: + src_dat = 0; + break; + } - READ(dev->accel.dest + dev->accel.cx, dest_dat); + READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + if ((dev->accel.cmd & 4) && dev->accel.sy) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } } } @@ -1848,276 +1671,338 @@ rect_fill_pix: mix_dat |= 1; cpu_dat >>= 8; - if (dev->accel.cmd & 0x20) - dev->accel.cx++; - else - dev->accel.cx--; + if (dev->accel.sy == 0) { + break; + } - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 2) { - dev->accel.sx += (dev->accel.cur_x & 3); + if (dev->accel.err_term >= dev->accel.maj_axis_pcnt) { + dev->accel.err_term += dev->accel.destx_distp; + /*Step minor axis*/ + switch (dev->accel.cmd & 0xe0) { + case 0x00: + dev->accel.cy--; + break; + case 0x20: + dev->accel.cy--; + break; + case 0x40: + dev->accel.cx--; + break; + case 0x60: + dev->accel.cx++; + break; + case 0x80: + dev->accel.cy++; + break; + case 0xa0: + dev->accel.cy++; + break; + case 0xc0: + dev->accel.cx--; + break; + case 0xe0: + dev->accel.cx++; + break; } + } else + dev->accel.err_term += dev->accel.desty_axstp; - if (dev->accel.cmd & 0x20) { - dev->accel.cx -= (dev->accel.sx) + 1; - } else - dev->accel.cx += (dev->accel.sx) + 1; - - if (dev->accel.cmd & 0x80) - dev->accel.cy++; - else + /*Step major axis*/ + switch (dev->accel.cmd & 0xe0) { + case 0x00: + dev->accel.cx--; + break; + case 0x20: + dev->accel.cx++; + break; + case 0x40: dev->accel.cy--; - - dev->accel.dest = dev->accel.cy * dev->h_disp; - dev->accel.sy--; - return; - } - } - } else { - while (count-- && (dev->accel.sy >= 0)) { - if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && - dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { - if (ibm8514_cpu_dest(dev) && (pixcntl == 0)) { - mix_dat = 1; /* Mix data = forced to foreground register. */ - } else if (ibm8514_cpu_dest(dev) && (pixcntl == 3)) { - /* Mix data = current video memory value. */ - READ(dev->accel.dest + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? 1 : 0; - } - - if (ibm8514_cpu_dest(dev)) { - READ(dev->accel.dest + dev->accel.cx, src_dat); - if (pixcntl == 3) - src_dat = ((src_dat & rd_mask) == rd_mask); - } else { - switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = cpu_dat & 0xff; break; - case 3: src_dat = 0; break; - } - } - - READ(dev->accel.dest + dev->accel.cx, dest_dat); - - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & 1, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - mix_dat >>= 1; - cpu_dat >>= 8; - - if (dev->accel.cmd & 0x20) - dev->accel.cx++; - else - dev->accel.cx--; - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 2) { - if (!(dev->accel.cmd & 0x1000)) - dev->accel.sx += (dev->accel.cur_x & 3); - } - - if (dev->accel.cmd & 0x20) { - dev->accel.cx -= (dev->accel.sx) + 1; - } else - dev->accel.cx += (dev->accel.sx) + 1; - - if (dev->accel.cmd & 2) { - if (dev->accel.cmd & 0x1000) { - dev->accel.cx = dev->accel.cur_x & 0x3ff; - if (dev->accel.cur_x & 0x400) - dev->accel.cx |= ~0x3ff; - } - } - - if (dev->accel.cmd & 0x80) - dev->accel.cy++; - else + break; + case 0x60: dev->accel.cy--; - - dev->accel.dest = dev->accel.cy * dev->h_disp; - dev->accel.sy--; - return; + break; + case 0x80: + dev->accel.cx--; + break; + case 0xa0: + dev->accel.cx++; + break; + case 0xc0: + dev->accel.cy++; + break; + case 0xe0: + dev->accel.cy++; + break; } + + dev->accel.sy--; } } - } else { - goto rect_fill; + dev->accel.cur_x = dev->accel.cx; + dev->accel.cur_y = dev->accel.cy; } - } else { - if (cpu_input) { - if (pixcntl == 2) { - goto rect_fill_pix; - } else { - if (dev->accel.input && !dev->accel.output) { - while (count-- && (dev->accel.sy >= 0)) { - if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && - dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { - mix_dat = mix_mask; /* Mix data = forced to foreground register. */ - if (!dev->accel.odd_in && !dev->accel.sx) { - READ(dev->accel.newdest_in + dev->accel.cur_x, src_dat); - READ(dev->accel.newdest_in + dev->accel.cur_x, dest_dat); - } else { - READ(dev->accel.dest + dev->accel.cx, src_dat); - READ(dev->accel.dest + dev->accel.cx, dest_dat); - } - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - if (!dev->accel.odd_in && !dev->accel.sx) { - WRITE(dev->accel.newdest_in + dev->accel.cur_x, dest_dat); - } else { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } - mix_dat <<= 1; - mix_dat |= 1; + break; - if (dev->accel.cmd & 0x20) - dev->accel.cx++; - else - dev->accel.cx--; + case 2: /*Rectangle fill (X direction)*/ + case 3: /*Rectangle fill (Y direction)*/ + case 4: /*Rectangle fill (Y direction using nibbles)*/ + if (!cpu_input) { + dev->accel.x_count = 0; + dev->accel.xx_count = 0; + dev->accel.odd_out = 0; + dev->accel.odd_in = 0; + dev->accel.input = 0; + dev->accel.output = 0; + dev->accel.newdest_out = 0; + dev->accel.newdest_in = 0; - dev->accel.sx--; - if (dev->accel.odd_in) { - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - dev->accel.odd_in = 0; - dev->accel.cx = dev->accel.cur_x; - if (dev->accel.cmd & 0x80) - dev->accel.cy++; - else - dev->accel.cy--; - dev->accel.dest = dev->accel.cy * dev->h_disp; - dev->accel.newdest_in = (dev->accel.cy + 1) * dev->h_disp; - dev->accel.sy--; - return; - } + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + dev->accel.sy = dev->accel.multifunc[0] & 0x7ff; + + dev->accel.cx = dev->accel.cur_x & 0x3ff; + if (dev->accel.cur_x & 0x400) + dev->accel.cx |= ~0x3ff; + dev->accel.cy = dev->accel.cur_y & 0x3ff; + if (dev->accel.cur_y & 0x400) + dev->accel.cy |= ~0x3ff; + + dev->accel.dest = dev->accel.cy * dev->h_disp; + dev->accel.fill_state = 0; + + if (cmd == 4) + dev->accel.cmd |= 2; + else if (cmd == 3) + dev->accel.cmd &= ~2; + + if (ibm8514_cpu_src(dev)) { + if (dev->accel.cmd & 2) { + if (!(dev->accel.cmd & 0x1000)) { + if (!(dev->accel.cmd & 8)) { + dev->accel.sx += and3; + dev->accel.nibbleset = (uint8_t *) calloc(1, (dev->accel.sx >> 3) + 1); + dev->accel.writemono = (uint8_t *) calloc(1, (dev->accel.sx >> 3) + 1); + dev->accel.sys_cnt = (dev->accel.sx >> 3) + 1; } else { - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - dev->accel.sx--; - dev->accel.cx = dev->accel.cur_x; - dev->accel.odd_in = 1; + if (and3 == 1) { + dev->accel.sx += 4; if (dev->accel.cmd & 0x20) - dev->accel.cx++; + dev->accel.cx += 4; else - dev->accel.cx--; - if (dev->accel.cmd & 0x80) - dev->accel.cy++; + dev->accel.cx -= 4; + } else if (and3 == 2) { + dev->accel.sx += 5; + if (dev->accel.cmd & 0x20) + dev->accel.cx += 5; else - dev->accel.cy--; - dev->accel.dest = dev->accel.cy * dev->h_disp; - dev->accel.newdest_in = (dev->accel.cy + 1) * dev->h_disp; - dev->accel.sy--; - return; - } - } - } - } else if (dev->accel.output && !dev->accel.input) { - while (count-- && (dev->accel.sy >= 0)) { - if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && - dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { - src_dat = cpu_dat; - if (!dev->accel.odd_out && !dev->accel.sx) { - READ(dev->accel.newdest_out + dev->accel.cur_x, dest_dat); + dev->accel.cx -= 5; + } else if (and3 == 3) { + dev->accel.sx += 6; + if (dev->accel.cmd & 0x20) + dev->accel.cx += 6; + else + dev->accel.cx -= 6; } else { - READ(dev->accel.dest + dev->accel.cx, dest_dat); - } - - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - if (!dev->accel.odd_out && !dev->accel.sx) { - WRITE(dev->accel.newdest_out + dev->accel.cur_x, dest_dat); - } else { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } - mix_dat <<= 1; - mix_dat |= 1; - cpu_dat >>= 8; - - if (dev->accel.cmd & 0x20) - dev->accel.cx++; - else - dev->accel.cx--; - - dev->accel.sx--; - if (dev->accel.odd_out) { - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - dev->accel.odd_out = 0; - dev->accel.cx = dev->accel.cur_x; - if (dev->accel.cmd & 0x80) - dev->accel.cy++; - else - dev->accel.cy--; - - dev->accel.dest = dev->accel.cy * dev->h_disp; - dev->accel.newdest_out = (dev->accel.cy + 1) * dev->h_disp; - dev->accel.sy--; - return; - } - } else { - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - dev->accel.odd_out = 1; - dev->accel.sx--; - dev->accel.cx = dev->accel.cur_x; + dev->accel.sx += 3; if (dev->accel.cmd & 0x20) - dev->accel.cx++; + dev->accel.cx += 3; else - dev->accel.cx--; - if (dev->accel.cmd & 0x80) - dev->accel.cy++; - else - dev->accel.cy--; - - dev->accel.dest = dev->accel.cy * dev->h_disp; - dev->accel.newdest_out = (dev->accel.cy + 1) * dev->h_disp; - dev->accel.sy--; - return; + dev->accel.cx -= 3; } } } } else { + if (!(dev->accel.cmd & 0x40) && (frgd_mix == 2) && (bkgd_mix == 2) && (pixcntl == 0) && (cmd == 2)) { + if (!(dev->accel.sx & 1)) { + dev->accel.output = 1; + dev->accel.newdest_out = (dev->accel.cy + 1) * dev->h_disp; + } + } + } + dev->data_available = 0; + dev->data_available2 = 0; + return; /*Wait for data from CPU*/ + } else if (ibm8514_cpu_dest(dev)) { + if (!(dev->accel.cmd & 2) && (frgd_mix == 2) && (pixcntl == 0) && (cmd == 2)) { + if (!(dev->accel.sx & 1)) { + dev->accel.input = 1; + dev->accel.newdest_in = (dev->accel.cy + 1) * dev->h_disp; + } + } else if (dev->accel.cmd & 2) { + if (dev->accel.cmd & 8) { + dev->accel.sx += and3; + dev->accel.nibbleset = (uint8_t *) calloc(1, (dev->accel.sx >> 3) + 1); + dev->accel.writemono = (uint8_t *) calloc(1, (dev->accel.sx >> 3) + 1); + dev->accel.sys_cnt = (dev->accel.sx >> 3) + 1; + } + } + dev->data_available = 1; + dev->data_available2 = 1; + return; /*Wait for data from CPU*/ + } + } + + if (dev->accel.cmd & 2) { + if (cpu_input) { +rect_fill_pix: + if ((dev->accel.cmd & 8) && ibm8514_cpu_src(dev)) { + dev->accel.xx_count++; while (count-- && (dev->accel.sy >= 0)) { - if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && - dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { + if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat & 0xff; + break; + case 3: + src_dat = 0; + break; + } + + READ(dev->accel.dest + dev->accel.cx, dest_dat); + + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & mix_mask, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + if (and3 == 1) { + if (dev->accel.xx_count >= 2) { + if ((dev->accel.cmd & 4) && dev->accel.sx) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } + } + } else if (and3 == 2) { + if (dev->accel.xx_count == 2) { + if (count <= 2) { + if ((dev->accel.cmd & 4) && dev->accel.sx) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } + } + } else if (dev->accel.xx_count >= 3) { + if ((dev->accel.cmd & 4) && dev->accel.sx) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } + } + } else if (and3 == 3) { + if (dev->accel.xx_count == 2) { + if (count <= 1) { + if ((dev->accel.cmd & 4) && dev->accel.sx) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } + } + } else if (dev->accel.xx_count >= 3) { + if ((dev->accel.cmd & 4) && dev->accel.sx) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } + } + } else { + if (dev->accel.xx_count == 1) { + if (!count) { + if ((dev->accel.cmd & 4) && dev->accel.sx) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } + } + } else if (dev->accel.xx_count >= 2) { + if ((dev->accel.cmd & 4) && dev->accel.sx) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 4)) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } + } + } + } + } + + mix_dat <<= 1; + mix_dat |= 1; + cpu_dat >>= 8; + + switch (dev->accel.cmd & 0xe0) { + case 0x00: + dev->accel.cx++; + break; + case 0x20: + dev->accel.cx++; + break; + case 0x60: + dev->accel.cx--; + break; + case 0x80: + dev->accel.cx--; + break; + case 0xa0: + dev->accel.cx--; + break; + case 0xe0: + dev->accel.cx++; + break; + } + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + if (and3 == 1) { + dev->accel.sx += 4; + } else if (and3 == 2) { + dev->accel.sx += 5; + } else if (and3 == 3) { + dev->accel.sx += 6; + } else { + dev->accel.sx += 3; + } + + if (dev->accel.cmd & 0x20) + dev->accel.cx -= (dev->accel.sx + 1); + else + dev->accel.cx += (dev->accel.sx + 1); + + switch (dev->accel.cmd & 0xe0) { + case 0x20: + dev->accel.cy--; + break; + case 0x40: + dev->accel.cy--; + break; + case 0x60: + dev->accel.cy--; + break; + case 0xa0: + dev->accel.cy++; + break; + case 0xc0: + dev->accel.cy++; + break; + case 0xe0: + dev->accel.cy++; + break; + } + + dev->accel.dest = dev->accel.cy * dev->h_disp; + dev->accel.sy--; + return; + } + } + break; + } + if (count < 8) { + while (count-- && (dev->accel.sy >= 0)) { + if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { if (ibm8514_cpu_dest(dev) && (pixcntl == 0)) { mix_dat = mix_mask; /* Mix data = forced to foreground register. */ } else if (ibm8514_cpu_dest(dev) && (pixcntl == 3)) { @@ -2129,33 +2014,29 @@ rect_fill_pix: if (ibm8514_cpu_dest(dev)) { READ(dev->accel.dest + dev->accel.cx, src_dat); - if (pixcntl == 3) { + if (pixcntl == 3) src_dat = ((src_dat & rd_mask) == rd_mask); + } else + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat & 0xff; + break; + case 3: + src_dat = 0; + break; } - } else switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = cpu_dat & 0xff; break; - case 3: src_dat = 0; break; - } READ(dev->accel.dest + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; - if (ibm8514_cpu_dest(dev)) { - if (pixcntl == 3) { - MIX(mix_dat & mix_mask, dest_dat, src_dat); - } - } else { - MIX(mix_dat & mix_mask, dest_dat, src_dat); - } + MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); WRITE(dev->accel.dest + dev->accel.cx, dest_dat); } @@ -2174,11 +2055,97 @@ rect_fill_pix: if (dev->accel.sx < 0) { dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + if (dev->accel.cmd & 2) { + dev->accel.sx += (dev->accel.cur_x & 3); + } + if (dev->accel.cmd & 0x20) { dev->accel.cx -= (dev->accel.sx) + 1; } else dev->accel.cx += (dev->accel.sx) + 1; + if (dev->accel.cmd & 0x80) + dev->accel.cy++; + else + dev->accel.cy--; + + dev->accel.dest = dev->accel.cy * dev->h_disp; + dev->accel.sy--; + return; + } + } + } else { + while (count-- && (dev->accel.sy >= 0)) { + if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { + if (ibm8514_cpu_dest(dev) && (pixcntl == 0)) { + mix_dat = 1; /* Mix data = forced to foreground register. */ + } else if (ibm8514_cpu_dest(dev) && (pixcntl == 3)) { + /* Mix data = current video memory value. */ + READ(dev->accel.dest + dev->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + mix_dat = mix_dat ? 1 : 0; + } + + if (ibm8514_cpu_dest(dev)) { + READ(dev->accel.dest + dev->accel.cx, src_dat); + if (pixcntl == 3) + src_dat = ((src_dat & rd_mask) == rd_mask); + } else { + switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat & 0xff; + break; + case 3: + src_dat = 0; + break; + } + } + + READ(dev->accel.dest + dev->accel.cx, dest_dat); + + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & 1, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } + } + mix_dat >>= 1; + cpu_dat >>= 8; + + if (dev->accel.cmd & 0x20) + dev->accel.cx++; + else + dev->accel.cx--; + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + + if (dev->accel.cmd & 2) { + if (!(dev->accel.cmd & 0x1000)) + dev->accel.sx += (dev->accel.cur_x & 3); + } + + if (dev->accel.cmd & 0x20) { + dev->accel.cx -= (dev->accel.sx) + 1; + } else + dev->accel.cx += (dev->accel.sx) + 1; + + if (dev->accel.cmd & 2) { + if (dev->accel.cmd & 0x1000) { + dev->accel.cx = dev->accel.cur_x & 0x3ff; + if (dev->accel.cur_x & 0x400) + dev->accel.cx |= ~0x3ff; + } + } + if (dev->accel.cmd & 0x80) dev->accel.cy++; else @@ -2190,248 +2157,694 @@ rect_fill_pix: } } } + } else { + goto rect_fill; } } else { -rect_fill: - if (pixcntl == 1) { - if (dev->accel.cmd & 0x40) { - count = dev->accel.maj_axis_pcnt + 1; - dev->accel.temp_cnt = 8; - while (count-- && dev->accel.sy >= 0) { - if (dev->accel.temp_cnt == 0) { - mix_dat >>= 8; - dev->accel.temp_cnt = 8; - } - if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && - dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = 0; break; - case 3: src_dat = 0; break; + if (cpu_input) { + if (pixcntl == 2) { + goto rect_fill_pix; + } else { + if (dev->accel.input && !dev->accel.output) { + while (count-- && (dev->accel.sy >= 0)) { + if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { + mix_dat = mix_mask; /* Mix data = forced to foreground register. */ + if (!dev->accel.odd_in && !dev->accel.sx) { + READ(dev->accel.newdest_in + dev->accel.cur_x, src_dat); + READ(dev->accel.newdest_in + dev->accel.cur_x, dest_dat); + } else { + READ(dev->accel.dest + dev->accel.cx, src_dat); + READ(dev->accel.dest + dev->accel.cx, dest_dat); + } + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & mix_mask, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + if (!dev->accel.odd_in && !dev->accel.sx) { + WRITE(dev->accel.newdest_in + dev->accel.cur_x, dest_dat); + } else { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } + } } - - READ(dev->accel.dest + dev->accel.cx, dest_dat); - - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - - if (dev->accel.temp_cnt > 0) { - dev->accel.temp_cnt--; mix_dat <<= 1; mix_dat |= 1; - } - if (dev->accel.cmd & 0x20) - dev->accel.cx++; - else - dev->accel.cx--; - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 0x20) { - dev->accel.cx -= (dev->accel.sx) + 1; - } else - dev->accel.cx += (dev->accel.sx) + 1; - - if (dev->accel.cmd & 0x80) - dev->accel.cy++; + if (dev->accel.cmd & 0x20) + dev->accel.cx++; else - dev->accel.cy--; + dev->accel.cx--; - dev->accel.dest = dev->accel.cy * dev->h_disp; - dev->accel.sy--; - - dev->accel.cur_x = dev->accel.cx; - dev->accel.cur_y = dev->accel.cy; - return; - } - } - } else { - dev->accel.temp_cnt = 8; - while (count-- && dev->accel.sy >= 0) { - if (dev->accel.temp_cnt == 0) { - dev->accel.temp_cnt = 8; - mix_dat = old_mix_dat; - } - if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && - dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { - switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = 0; break; - case 3: src_dat = 0; break; - } - - READ(dev->accel.dest + dev->accel.cx, dest_dat); - - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & 1, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + dev->accel.sx--; + if (dev->accel.odd_in) { + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + dev->accel.odd_in = 0; + dev->accel.cx = dev->accel.cur_x; + if (dev->accel.cmd & 0x80) + dev->accel.cy++; + else + dev->accel.cy--; + dev->accel.dest = dev->accel.cy * dev->h_disp; + dev->accel.newdest_in = (dev->accel.cy + 1) * dev->h_disp; + dev->accel.sy--; + return; + } + } else { + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + dev->accel.sx--; + dev->accel.cx = dev->accel.cur_x; + dev->accel.odd_in = 1; + if (dev->accel.cmd & 0x20) + dev->accel.cx++; + else + dev->accel.cx--; + if (dev->accel.cmd & 0x80) + dev->accel.cy++; + else + dev->accel.cy--; + dev->accel.dest = dev->accel.cy * dev->h_disp; + dev->accel.newdest_in = (dev->accel.cy + 1) * dev->h_disp; + dev->accel.sy--; + return; + } } } + } else if (dev->accel.output && !dev->accel.input) { + while (count-- && (dev->accel.sy >= 0)) { + if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { + src_dat = cpu_dat; + if (!dev->accel.odd_out && !dev->accel.sx) { + READ(dev->accel.newdest_out + dev->accel.cur_x, dest_dat); + } else { + READ(dev->accel.dest + dev->accel.cx, dest_dat); + } - dev->accel.temp_cnt--; - mix_dat >>= 1; + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & mix_mask, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + if (!dev->accel.odd_out && !dev->accel.sx) { + WRITE(dev->accel.newdest_out + dev->accel.cur_x, dest_dat); + } else { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } + } + } + mix_dat <<= 1; + mix_dat |= 1; + cpu_dat >>= 8; - if (dev->accel.cmd & 0x20) - dev->accel.cx++; - else - dev->accel.cx--; - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 0x20) { - dev->accel.cx -= (dev->accel.sx) + 1; - } else - dev->accel.cx += (dev->accel.sx) + 1; - - if (dev->accel.cmd & 0x80) - dev->accel.cy++; + if (dev->accel.cmd & 0x20) + dev->accel.cx++; else - dev->accel.cy--; + dev->accel.cx--; - dev->accel.dest = dev->accel.cy * dev->h_disp; - dev->accel.sy--; + dev->accel.sx--; + if (dev->accel.odd_out) { + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + dev->accel.odd_out = 0; + dev->accel.cx = dev->accel.cur_x; + if (dev->accel.cmd & 0x80) + dev->accel.cy++; + else + dev->accel.cy--; - if (dev->accel.sy < 0) { - dev->accel.cur_x = dev->accel.cx; - dev->accel.cur_y = dev->accel.cy; + dev->accel.dest = dev->accel.cy * dev->h_disp; + dev->accel.newdest_out = (dev->accel.cy + 1) * dev->h_disp; + dev->accel.sy--; + return; + } + } else { + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + dev->accel.odd_out = 1; + dev->accel.sx--; + dev->accel.cx = dev->accel.cur_x; + if (dev->accel.cmd & 0x20) + dev->accel.cx++; + else + dev->accel.cx--; + if (dev->accel.cmd & 0x80) + dev->accel.cy++; + else + dev->accel.cy--; + + dev->accel.dest = dev->accel.cy * dev->h_disp; + dev->accel.newdest_out = (dev->accel.cy + 1) * dev->h_disp; + dev->accel.sy--; + return; + } + } + } + } else { + while (count-- && (dev->accel.sy >= 0)) { + if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { + if (ibm8514_cpu_dest(dev) && (pixcntl == 0)) { + mix_dat = mix_mask; /* Mix data = forced to foreground register. */ + } else if (ibm8514_cpu_dest(dev) && (pixcntl == 3)) { + /* Mix data = current video memory value. */ + READ(dev->accel.dest + dev->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + mix_dat = mix_dat ? mix_mask : 0; + } + + if (ibm8514_cpu_dest(dev)) { + READ(dev->accel.dest + dev->accel.cx, src_dat); + if (pixcntl == 3) { + src_dat = ((src_dat & rd_mask) == rd_mask); + } + } else + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat & 0xff; + break; + case 3: + src_dat = 0; + break; + } + + READ(dev->accel.dest + dev->accel.cx, dest_dat); + + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + if (ibm8514_cpu_dest(dev)) { + if (pixcntl == 3) { + MIX(mix_dat & mix_mask, dest_dat, src_dat); + } + } else { + MIX(mix_dat & mix_mask, dest_dat, src_dat); + } + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } + } + + mix_dat <<= 1; + mix_dat |= 1; + cpu_dat >>= 8; + + if (dev->accel.cmd & 0x20) + dev->accel.cx++; + else + dev->accel.cx--; + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + + if (dev->accel.cmd & 0x20) { + dev->accel.cx -= (dev->accel.sx) + 1; + } else + dev->accel.cx += (dev->accel.sx) + 1; + + if (dev->accel.cmd & 0x80) + dev->accel.cy++; + else + dev->accel.cy--; + + dev->accel.dest = dev->accel.cy * dev->h_disp; + dev->accel.sy--; return; } } } } } else { - if (dev->accel.multifunc[0x0a] & 6) { - while (count-- && dev->accel.sy >= 0) { - if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && - dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = 0; break; - case 3: src_dat = 0; break; +rect_fill: + if (pixcntl == 1) { + if (dev->accel.cmd & 0x40) { + count = dev->accel.maj_axis_pcnt + 1; + dev->accel.temp_cnt = 8; + while (count-- && dev->accel.sy >= 0) { + if (dev->accel.temp_cnt == 0) { + mix_dat >>= 8; + dev->accel.temp_cnt = 8; } + if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = 0; + break; + case 3: + src_dat = 0; + break; + } - READ(dev->accel.dest + dev->accel.cx, poly_src); - if (dev->accel.multifunc[0x0a] & 2) { - poly_src = ((poly_src & wrt_mask) == wrt_mask); - } else { - poly_src = ((poly_src & rd_mask_polygon) == rd_mask_polygon); - } - - if (poly_src) { - dev->accel.fill_state = !dev->accel.fill_state; - } - - if (dev->accel.fill_state) { READ(dev->accel.dest + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & mix_mask, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } + } + + if (dev->accel.temp_cnt > 0) { + dev->accel.temp_cnt--; + mix_dat <<= 1; + mix_dat |= 1; + } + + if (dev->accel.cmd & 0x20) + dev->accel.cx++; + else + dev->accel.cx--; + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + + if (dev->accel.cmd & 0x20) { + dev->accel.cx -= (dev->accel.sx) + 1; + } else + dev->accel.cx += (dev->accel.sx) + 1; + + if (dev->accel.cmd & 0x80) + dev->accel.cy++; + else + dev->accel.cy--; + + dev->accel.dest = dev->accel.cy * dev->h_disp; + dev->accel.sy--; + + dev->accel.cur_x = dev->accel.cx; + dev->accel.cur_y = dev->accel.cy; + return; + } + } + } else { + dev->accel.temp_cnt = 8; + while (count-- && dev->accel.sy >= 0) { + if (dev->accel.temp_cnt == 0) { + dev->accel.temp_cnt = 8; + mix_dat = old_mix_dat; + } + if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { + switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = 0; + break; + case 3: + src_dat = 0; + break; + } + + READ(dev->accel.dest + dev->accel.cx, dest_dat); + + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & 1, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } + } + + dev->accel.temp_cnt--; + mix_dat >>= 1; + + if (dev->accel.cmd & 0x20) + dev->accel.cx++; + else + dev->accel.cx--; + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + + if (dev->accel.cmd & 0x20) { + dev->accel.cx -= (dev->accel.sx) + 1; + } else + dev->accel.cx += (dev->accel.sx) + 1; + + if (dev->accel.cmd & 0x80) + dev->accel.cy++; + else + dev->accel.cy--; + + dev->accel.dest = dev->accel.cy * dev->h_disp; + dev->accel.sy--; + + if (dev->accel.sy < 0) { + dev->accel.cur_x = dev->accel.cx; + dev->accel.cur_y = dev->accel.cy; + return; + } + } + } + } + } else { + if (dev->accel.multifunc[0x0a] & 6) { + while (count-- && dev->accel.sy >= 0) { + if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = 0; + break; + case 3: + src_dat = 0; + break; + } + + READ(dev->accel.dest + dev->accel.cx, poly_src); + if (dev->accel.multifunc[0x0a] & 2) { + poly_src = ((poly_src & wrt_mask) == wrt_mask); + } else { + poly_src = ((poly_src & rd_mask_polygon) == rd_mask_polygon); + } + + if (poly_src) { + dev->accel.fill_state = !dev->accel.fill_state; + } + + if (dev->accel.fill_state) { + READ(dev->accel.dest + dev->accel.cx, dest_dat); + + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & mix_mask, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } + } + } + + mix_dat <<= 1; + mix_dat |= 1; + + if (dev->accel.cmd & 0x20) { + dev->accel.cx++; + } else { + dev->accel.cx--; + } + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + dev->accel.fill_state = 0; + + if (dev->accel.cmd & 0x20) { + dev->accel.cx -= (dev->accel.sx) + 1; + } else { + dev->accel.cx += (dev->accel.sx) + 1; + } + + if (dev->accel.cmd & 0x80) + dev->accel.cy++; + else + dev->accel.cy--; + + dev->accel.dest = dev->accel.cy * dev->h_disp; + dev->accel.sy--; + + if (dev->accel.sy < 0) { + dev->accel.cur_x = dev->accel.cx; + dev->accel.cur_y = dev->accel.cy; + return; + } + } + } + } else { + while (count-- && dev->accel.sy >= 0) { + if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = 0; + break; + case 3: + src_dat = 0; + break; + } + + READ(dev->accel.dest + dev->accel.cx, dest_dat); + + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); WRITE(dev->accel.dest + dev->accel.cx, dest_dat); } } - } - mix_dat <<= 1; - mix_dat |= 1; + mix_dat <<= 1; + mix_dat |= 1; - if (dev->accel.cmd & 0x20) { - dev->accel.cx++; - } else { - dev->accel.cx--; - } - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - dev->accel.fill_state = 0; - - if (dev->accel.cmd & 0x20) { - dev->accel.cx -= (dev->accel.sx) + 1; - } else { - dev->accel.cx += (dev->accel.sx) + 1; - } - - if (dev->accel.cmd & 0x80) - dev->accel.cy++; + if (dev->accel.cmd & 0x20) + dev->accel.cx++; else - dev->accel.cy--; + dev->accel.cx--; - dev->accel.dest = dev->accel.cy * dev->h_disp; - dev->accel.sy--; + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - if (dev->accel.sy < 0) { - dev->accel.cur_x = dev->accel.cx; - dev->accel.cur_y = dev->accel.cy; - return; + if (dev->accel.cmd & 0x20) { + dev->accel.cx -= (dev->accel.sx) + 1; + } else + dev->accel.cx += (dev->accel.sx) + 1; + + if (dev->accel.cmd & 0x80) + dev->accel.cy++; + else + dev->accel.cy--; + + dev->accel.dest = dev->accel.cy * dev->h_disp; + dev->accel.sy--; + + if (dev->accel.sy < 0) { + dev->accel.cur_x = dev->accel.cx; + dev->accel.cur_y = dev->accel.cy; + return; + } } } } + } + } + } + break; + + case 5: /*Draw Polygon Boundary Line*/ + if (!cpu_input) { + dev->accel.cx = dev->accel.cur_x; + dev->accel.cy = dev->accel.cur_y; + dev->accel.oldcy = dev->accel.cy; + + dev->accel.xdir = (dev->accel.cmd & 0x20) ? 1 : -1; + dev->accel.ydir = (dev->accel.cmd & 0x80) ? 1 : -1; + + dev->accel.sy = 0; + + if (ibm8514_cpu_src(dev)) { + dev->data_available = 0; + dev->data_available2 = 0; + return; /*Wait for data from CPU*/ + } else if (ibm8514_cpu_dest(dev)) { + dev->data_available = 1; + dev->data_available2 = 1; + return; + } + } + + while (count-- && (dev->accel.sy >= 0)) { + if (((dev->accel.cx) >= dev->accel.clip_left && (dev->accel.cx <= clip_r) && (dev->accel.cy) >= dev->accel.clip_top && (dev->accel.cy) <= clip_b)) { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat & 0xff; + break; + case 3: + src_dat = 0; + break; + } + + READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & mix_mask, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + if ((dev->accel.cmd & 4) && (dev->accel.sy < dev->accel.maj_axis_pcnt)) { + if (!dev->accel.sy) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } else if ((dev->accel.cmd & 0x40) && dev->accel.sy && (dev->accel.cy == dev->accel.oldcy + 1)) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 0x40) && dev->accel.sy && (dev->accel.err_term >= 0) && (dev->accel.cy == (dev->accel.oldcy + 1))) { + WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); + } + } + } + } + + mix_dat <<= 1; + mix_dat |= 1; + cpu_dat >>= 8; + + if (dev->accel.sy == dev->accel.maj_axis_pcnt) { + return; + } + + if (dev->accel.cmd & 0x40) { + dev->accel.oldcy = dev->accel.cy; + dev->accel.cy += dev->accel.ydir; + if (dev->accel.err_term >= 0) { + dev->accel.err_term += dev->accel.destx_distp; + dev->accel.cx += dev->accel.xdir; } else { - while (count-- && dev->accel.sy >= 0) { - if ((dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && - dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b)) { + dev->accel.err_term += dev->accel.desty_axstp; + } + } else { + dev->accel.cx += dev->accel.xdir; + if (dev->accel.err_term >= 0) { + dev->accel.err_term += dev->accel.destx_distp; + dev->accel.oldcy = dev->accel.cy; + dev->accel.cy += dev->accel.ydir; + } else { + dev->accel.err_term += dev->accel.desty_axstp; + } + } + + dev->accel.sy++; + } + break; + + case 6: /*BitBlt*/ + if (!cpu_input) /*!cpu_input is trigger to start operation*/ + { + dev->accel.x_count = 0; + dev->accel.output = 0; + + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + dev->accel.sy = dev->accel.multifunc[0] & 0x7ff; + + dev->accel.dx = dev->accel.destx_distp & 0x3ff; + dev->accel.dy = dev->accel.desty_axstp & 0x3ff; + + if (dev->accel.destx_distp & 0x400) + dev->accel.dx |= ~0x3ff; + if (dev->accel.desty_axstp & 0x400) + dev->accel.dy |= ~0x3ff; + + dev->accel.cx = dev->accel.cur_x & 0x3ff; + dev->accel.cy = dev->accel.cur_y & 0x3ff; + + if (dev->accel.cur_x & 0x400) + dev->accel.cx |= ~0x3ff; + if (dev->accel.cur_y & 0x400) + dev->accel.cy |= ~0x3ff; + + dev->accel.src = dev->accel.cy * dev->h_disp; + dev->accel.dest = dev->accel.dy * dev->h_disp; + + if (ibm8514_cpu_src(dev)) { + if (dev->accel.cmd & 2) { + if (!(dev->accel.cmd & 0x1000)) { + dev->accel.sx += (dev->accel.cur_x & 3); + dev->accel.nibbleset = (uint8_t *) calloc(1, (dev->accel.sx >> 3) + 1); + dev->accel.writemono = (uint8_t *) calloc(1, (dev->accel.sx >> 3) + 1); + dev->accel.sys_cnt = (dev->accel.sx >> 3) + 1; + } + } + dev->data_available = 0; + dev->data_available2 = 0; + return; /*Wait for data from CPU*/ + } else if (ibm8514_cpu_dest(dev)) { + dev->data_available = 1; + dev->data_available2 = 1; + return; /*Wait for data from CPU*/ + } + } + + if (dev->accel.cmd & 2) { + if (cpu_input) { +bitblt_pix: + if (count < 8) { + while (count-- && (dev->accel.sy >= 0)) { + if ((dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b)) { + if (pixcntl == 3) { + if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) { + READ(dev->accel.src + dev->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + mix_dat = mix_dat ? mix_mask : 0; + } else if (dev->accel.cmd & 0x10) { + READ(dev->accel.src + dev->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + mix_dat = mix_dat ? mix_mask : 0; + } + } switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = 0; break; - case 3: src_dat = 0; break; + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat & 0xff; + break; + case 3: + READ(dev->accel.src + dev->accel.cx, src_dat); + if (pixcntl == 3) { + if (dev->accel.cmd & 0x10) { + src_dat = ((src_dat & rd_mask) == rd_mask); + } + } + break; } - READ(dev->accel.dest + dev->accel.cx, dest_dat); + READ(dev->accel.dest + dev->accel.dx, dest_dat); - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + WRITE(dev->accel.dest + dev->accel.dx, dest_dat); } } mix_dat <<= 1; mix_dat |= 1; + cpu_dat >>= 8; if (dev->accel.cmd & 0x20) dev->accel.cx++; @@ -2442,6 +2855,10 @@ rect_fill: if (dev->accel.sx < 0) { dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + if (dev->accel.cmd & 2) { + dev->accel.sx += (dev->accel.cur_x & 3); + } + if (dev->accel.cmd & 0x20) { dev->accel.cx -= (dev->accel.sx) + 1; } else @@ -2454,450 +2871,384 @@ rect_fill: dev->accel.dest = dev->accel.cy * dev->h_disp; dev->accel.sy--; - - if (dev->accel.sy < 0) { - dev->accel.cur_x = dev->accel.cx; - dev->accel.cur_y = dev->accel.cy; - return; - } + return; } } - } - } - } - } - break; - - case 5: /*Draw Polygon Boundary Line*/ - if (!cpu_input) { - dev->accel.cx = dev->accel.cur_x; - dev->accel.cy = dev->accel.cur_y; - dev->accel.oldcy = dev->accel.cy; - - dev->accel.xdir = (dev->accel.cmd & 0x20) ? 1 : -1; - dev->accel.ydir = (dev->accel.cmd & 0x80) ? 1 : -1; - - dev->accel.sy = 0; - - if (ibm8514_cpu_src(dev)) { - dev->data_available = 0; - dev->data_available2 = 0; - return; /*Wait for data from CPU*/ - } else if (ibm8514_cpu_dest(dev)) { - dev->data_available = 1; - dev->data_available2 = 1; - return; - } - } - - while (count-- && (dev->accel.sy >= 0)) { - if (((dev->accel.cx) >= dev->accel.clip_left && (dev->accel.cx <= clip_r) && - (dev->accel.cy) >= dev->accel.clip_top && (dev->accel.cy) <= clip_b)) { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = cpu_dat & 0xff; break; - case 3: src_dat = 0; break; - } - - READ((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - if ((dev->accel.cmd & 4) && (dev->accel.sy < dev->accel.maj_axis_pcnt)) { - if (!dev->accel.sy) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } else if ((dev->accel.cmd & 0x40) && dev->accel.sy && (dev->accel.cy == dev->accel.oldcy + 1)) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 0x40) && dev->accel.sy && (dev->accel.err_term >= 0) && (dev->accel.cy == (dev->accel.oldcy + 1))) { - WRITE((dev->accel.cy * dev->h_disp) + dev->accel.cx, dest_dat); - } - } - } - } - - mix_dat <<= 1; - mix_dat |= 1; - cpu_dat >>= 8; - - if (dev->accel.sy == dev->accel.maj_axis_pcnt) { - return; - } - - if (dev->accel.cmd & 0x40) { - dev->accel.oldcy = dev->accel.cy; - dev->accel.cy += dev->accel.ydir; - if (dev->accel.err_term >= 0) { - dev->accel.err_term += dev->accel.destx_distp; - dev->accel.cx += dev->accel.xdir; - } else { - dev->accel.err_term += dev->accel.desty_axstp; - } - } else { - dev->accel.cx += dev->accel.xdir; - if (dev->accel.err_term >= 0) { - dev->accel.err_term += dev->accel.destx_distp; - dev->accel.oldcy = dev->accel.cy; - dev->accel.cy += dev->accel.ydir; - } else { - dev->accel.err_term += dev->accel.desty_axstp; - } - } - - dev->accel.sy++; - } - break; - - case 6: /*BitBlt*/ - if (!cpu_input) /*!cpu_input is trigger to start operation*/ - { - dev->accel.x_count = 0; - dev->accel.output = 0; - - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - dev->accel.sy = dev->accel.multifunc[0] & 0x7ff; - - dev->accel.dx = dev->accel.destx_distp & 0x3ff; - dev->accel.dy = dev->accel.desty_axstp & 0x3ff; - - if (dev->accel.destx_distp & 0x400) - dev->accel.dx |= ~0x3ff; - if (dev->accel.desty_axstp & 0x400) - dev->accel.dy |= ~0x3ff; - - dev->accel.cx = dev->accel.cur_x & 0x3ff; - dev->accel.cy = dev->accel.cur_y & 0x3ff; - - if (dev->accel.cur_x & 0x400) - dev->accel.cx |= ~0x3ff; - if (dev->accel.cur_y & 0x400) - dev->accel.cy |= ~0x3ff; - - dev->accel.src = dev->accel.cy * dev->h_disp; - dev->accel.dest = dev->accel.dy * dev->h_disp; - - if (ibm8514_cpu_src(dev)) { - if (dev->accel.cmd & 2) { - if (!(dev->accel.cmd & 0x1000)) { - dev->accel.sx += (dev->accel.cur_x & 3); - dev->accel.nibbleset = (uint8_t *)calloc(1, (dev->accel.sx >> 3) + 1); - dev->accel.writemono = (uint8_t *)calloc(1, (dev->accel.sx >> 3) + 1); - dev->accel.sys_cnt = (dev->accel.sx >> 3) + 1; - } - } - dev->data_available = 0; - dev->data_available2 = 0; - return; /*Wait for data from CPU*/ - } else if (ibm8514_cpu_dest(dev)) { - dev->data_available = 1; - dev->data_available2 = 1; - return; /*Wait for data from CPU*/ - } - } - - if (dev->accel.cmd & 2) { - if (cpu_input) { -bitblt_pix: - if (count < 8) { - while (count-- && (dev->accel.sy >= 0)) { - if ((dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && - dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b)) { - if (pixcntl == 3) { - if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) { - READ(dev->accel.src + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } else if (dev->accel.cmd & 0x10) { - READ(dev->accel.src + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } - } - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = cpu_dat & 0xff; break; - case 3: READ(dev->accel.src + dev->accel.cx, src_dat); - if (pixcntl == 3) { - if (dev->accel.cmd & 0x10) { - src_dat = ((src_dat & rd_mask) == rd_mask); - } + } else { + while (count-- && (dev->accel.sy >= 0)) { + if ((dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b)) { + if (pixcntl == 3) { + if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) { + READ(dev->accel.src + dev->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + mix_dat = mix_dat ? 1 : 0; + } else if (dev->accel.cmd & 0x10) { + READ(dev->accel.src + dev->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + mix_dat = mix_dat ? 1 : 0; } - break; - } - - READ(dev->accel.dest + dev->accel.dx, dest_dat); - - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - WRITE(dev->accel.dest + dev->accel.dx, dest_dat); - } - } - - mix_dat <<= 1; - mix_dat |= 1; - cpu_dat >>= 8; - - if (dev->accel.cmd & 0x20) - dev->accel.cx++; - else - dev->accel.cx--; - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 2) { - dev->accel.sx += (dev->accel.cur_x & 3); - } - - if (dev->accel.cmd & 0x20) { - dev->accel.cx -= (dev->accel.sx) + 1; - } else - dev->accel.cx += (dev->accel.sx) + 1; - - if (dev->accel.cmd & 0x80) - dev->accel.cy++; - else - dev->accel.cy--; - - dev->accel.dest = dev->accel.cy * dev->h_disp; - dev->accel.sy--; - return; - } - } - } else { - while (count-- && (dev->accel.sy >= 0)) { - if ((dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && - dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b)) { - if (pixcntl == 3) { - if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) { - READ(dev->accel.src + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? 1 : 0; - } else if (dev->accel.cmd & 0x10) { - READ(dev->accel.src + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? 1 : 0; } - } - switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = cpu_dat & 0xff; break; - case 3: READ(dev->accel.src + dev->accel.cx, src_dat); - if (pixcntl == 3) { - if (dev->accel.cmd & 0x10) { - src_dat = ((src_dat & rd_mask) == rd_mask); + switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat & 0xff; + break; + case 3: + READ(dev->accel.src + dev->accel.cx, src_dat); + if (pixcntl == 3) { + if (dev->accel.cmd & 0x10) { + src_dat = ((src_dat & rd_mask) == rd_mask); + } } - } - break; - } - - READ(dev->accel.dest + dev->accel.dx, dest_dat); - - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & 1, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - WRITE(dev->accel.dest + dev->accel.dx, dest_dat); - } - } - mix_dat >>= 1; - cpu_dat >>= 8; - - if (dev->accel.cmd & 0x20) { - dev->accel.dx++; - dev->accel.cx++; - } else { - dev->accel.dx--; - dev->accel.cx--; - } - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 2) { - if (!(dev->accel.cmd & 0x1000)) - dev->accel.sx += (dev->accel.cur_x & 3); - } - - if (dev->accel.cmd & 0x20) { - dev->accel.dx -= (dev->accel.sx) + 1; - dev->accel.cx -= (dev->accel.sx) + 1; - } else { - dev->accel.dx += (dev->accel.sx) + 1; - dev->accel.cx += (dev->accel.sx) + 1; - } - - if (dev->accel.cmd & 2) { - if (dev->accel.cmd & 0x1000) { - dev->accel.cx = dev->accel.cur_x & 0x3ff; - if (dev->accel.cur_x & 0x400) - dev->accel.cx |= ~0x3ff; - dev->accel.dx = dev->accel.destx_distp & 0x3ff; - if (dev->accel.destx_distp & 0x400) - dev->accel.dx |= ~0x3ff; - } - } - - if (dev->accel.cmd & 0x80) { - dev->accel.dy++; - dev->accel.cy++; - } else { - dev->accel.dy--; - dev->accel.cy--; - } - - dev->accel.dest = dev->accel.dy * dev->h_disp; - dev->accel.src = dev->accel.cy * dev->h_disp; - dev->accel.sy--; - return; - } - } - } - } else { - goto bitblt; - } - } else { - if (cpu_input) { - if (pixcntl == 2) { - goto bitblt_pix; - } else { - while (count-- && (dev->accel.sy >= 0)) { - if ((dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && - dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b)) { - if (pixcntl == 3) { - if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) { - READ(dev->accel.src + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } else if (dev->accel.cmd & 0x10) { - READ(dev->accel.src + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } - } - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = cpu_dat & 0xff; break; - case 3: READ(dev->accel.src + dev->accel.cx, src_dat); - if (pixcntl == 3) { - if (dev->accel.cmd & 0x10) { - src_dat = ((src_dat & rd_mask) == rd_mask); - } - } - break; - } - - READ(dev->accel.dest + dev->accel.dx, dest_dat); - - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - WRITE(dev->accel.dest + dev->accel.dx, dest_dat); - } - } - mix_dat <<= 1; - mix_dat |= 1; - cpu_dat >>= 8; - - if (dev->accel.cmd & 0x20) { - dev->accel.dx++; - dev->accel.cx++; - } else { - dev->accel.dx--; - dev->accel.cx--; - } - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 0x20) { - dev->accel.dx -= (dev->accel.sx) + 1; - dev->accel.cx -= (dev->accel.sx) + 1; - } else { - dev->accel.dx += (dev->accel.sx) + 1; - dev->accel.cx += (dev->accel.sx) + 1; - } - - if (dev->accel.cmd & 0x80) { - dev->accel.dy++; - dev->accel.cy++; - } else { - dev->accel.dy--; - dev->accel.cy--; - } - - dev->accel.dest = dev->accel.dy * dev->h_disp; - dev->accel.src = dev->accel.cy * dev->h_disp; - dev->accel.sy--; - return; - } - } - } - } else { -bitblt: - if (pixcntl == 1) { - if (dev->accel.cmd & 0x40) { - count = dev->accel.maj_axis_pcnt + 1; - dev->accel.temp_cnt = 8; - while (count-- && dev->accel.sy >= 0) { - if (dev->accel.temp_cnt == 0) { - mix_dat >>= 8; - dev->accel.temp_cnt = 8; - } - if ((dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && - dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b)) { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = 0; break; - case 3: READ(dev->accel.src + dev->accel.cx, src_dat); - break; + break; } READ(dev->accel.dest + dev->accel.dx, dest_dat); - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & 1, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + WRITE(dev->accel.dest + dev->accel.dx, dest_dat); + } + } + mix_dat >>= 1; + cpu_dat >>= 8; + + if (dev->accel.cmd & 0x20) { + dev->accel.dx++; + dev->accel.cx++; + } else { + dev->accel.dx--; + dev->accel.cx--; + } + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + + if (dev->accel.cmd & 2) { + if (!(dev->accel.cmd & 0x1000)) + dev->accel.sx += (dev->accel.cur_x & 3); + } + + if (dev->accel.cmd & 0x20) { + dev->accel.dx -= (dev->accel.sx) + 1; + dev->accel.cx -= (dev->accel.sx) + 1; + } else { + dev->accel.dx += (dev->accel.sx) + 1; + dev->accel.cx += (dev->accel.sx) + 1; + } + + if (dev->accel.cmd & 2) { + if (dev->accel.cmd & 0x1000) { + dev->accel.cx = dev->accel.cur_x & 0x3ff; + if (dev->accel.cur_x & 0x400) + dev->accel.cx |= ~0x3ff; + dev->accel.dx = dev->accel.destx_distp & 0x3ff; + if (dev->accel.destx_distp & 0x400) + dev->accel.dx |= ~0x3ff; + } + } + + if (dev->accel.cmd & 0x80) { + dev->accel.dy++; + dev->accel.cy++; + } else { + dev->accel.dy--; + dev->accel.cy--; + } + + dev->accel.dest = dev->accel.dy * dev->h_disp; + dev->accel.src = dev->accel.cy * dev->h_disp; + dev->accel.sy--; + return; + } + } + } + } else { + goto bitblt; + } + } else { + if (cpu_input) { + if (pixcntl == 2) { + goto bitblt_pix; + } else { + while (count-- && (dev->accel.sy >= 0)) { + if ((dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b)) { + if (pixcntl == 3) { + if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) { + READ(dev->accel.src + dev->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + mix_dat = mix_dat ? mix_mask : 0; + } else if (dev->accel.cmd & 0x10) { + READ(dev->accel.src + dev->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + mix_dat = mix_dat ? mix_mask : 0; + } + } + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat & 0xff; + break; + case 3: + READ(dev->accel.src + dev->accel.cx, src_dat); + if (pixcntl == 3) { + if (dev->accel.cmd & 0x10) { + src_dat = ((src_dat & rd_mask) == rd_mask); + } + } + break; + } + + READ(dev->accel.dest + dev->accel.dx, dest_dat); + + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & mix_mask, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + WRITE(dev->accel.dest + dev->accel.dx, dest_dat); + } + } + mix_dat <<= 1; + mix_dat |= 1; + cpu_dat >>= 8; + + if (dev->accel.cmd & 0x20) { + dev->accel.dx++; + dev->accel.cx++; + } else { + dev->accel.dx--; + dev->accel.cx--; + } + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + + if (dev->accel.cmd & 0x20) { + dev->accel.dx -= (dev->accel.sx) + 1; + dev->accel.cx -= (dev->accel.sx) + 1; + } else { + dev->accel.dx += (dev->accel.sx) + 1; + dev->accel.cx += (dev->accel.sx) + 1; + } + + if (dev->accel.cmd & 0x80) { + dev->accel.dy++; + dev->accel.cy++; + } else { + dev->accel.dy--; + dev->accel.cy--; + } + + dev->accel.dest = dev->accel.dy * dev->h_disp; + dev->accel.src = dev->accel.cy * dev->h_disp; + dev->accel.sy--; + return; + } + } + } + } else { +bitblt: + if (pixcntl == 1) { + if (dev->accel.cmd & 0x40) { + count = dev->accel.maj_axis_pcnt + 1; + dev->accel.temp_cnt = 8; + while (count-- && dev->accel.sy >= 0) { + if (dev->accel.temp_cnt == 0) { + mix_dat >>= 8; + dev->accel.temp_cnt = 8; + } + if ((dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b)) { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = 0; + break; + case 3: + READ(dev->accel.src + dev->accel.cx, src_dat); + break; + } + + READ(dev->accel.dest + dev->accel.dx, dest_dat); + + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & mix_mask, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + + WRITE(dev->accel.dest + dev->accel.dx, dest_dat); + } + } + + if (dev->accel.temp_cnt > 0) { + dev->accel.temp_cnt--; + mix_dat <<= 1; + mix_dat |= 1; + } + + if (dev->accel.cmd & 0x20) { + dev->accel.dx++; + dev->accel.cx++; + } else { + dev->accel.dx--; + dev->accel.cx--; + } + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + + if (dev->accel.cmd & 0x20) { + dev->accel.dx -= (dev->accel.sx) + 1; + dev->accel.cx -= (dev->accel.sx) + 1; + } else { + dev->accel.dx += (dev->accel.sx) + 1; + dev->accel.cx += (dev->accel.sx) + 1; + } + + if (dev->accel.cmd & 0x80) { + dev->accel.dy++; + dev->accel.cy++; + } else { + dev->accel.dy--; + dev->accel.cy--; + } + + dev->accel.dest = dev->accel.dy * dev->h_disp; + dev->accel.src = dev->accel.cy * dev->h_disp; + dev->accel.sy--; + return; + } + } + } else { + dev->accel.temp_cnt = 8; + while (count-- && dev->accel.sy >= 0) { + if (dev->accel.temp_cnt == 0) { + dev->accel.temp_cnt = 8; + mix_dat = old_mix_dat; + } + if ((dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b)) { + switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = 0; + break; + case 3: + READ(dev->accel.src + dev->accel.cx, src_dat); + break; + } + + READ(dev->accel.dest + dev->accel.dx, dest_dat); + + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & 1, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + + WRITE(dev->accel.dest + dev->accel.dx, dest_dat); + } + } + dev->accel.temp_cnt--; + mix_dat >>= 1; + + if (dev->accel.cmd & 0x20) { + dev->accel.dx++; + dev->accel.cx++; + } else { + dev->accel.dx--; + dev->accel.cx--; + } + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + + if (dev->accel.cmd & 0x20) { + dev->accel.dx -= (dev->accel.sx) + 1; + dev->accel.cx -= (dev->accel.sx) + 1; + } else { + dev->accel.dx += (dev->accel.sx) + 1; + dev->accel.cx += (dev->accel.sx) + 1; + } + + if (dev->accel.cmd & 0x80) { + dev->accel.dy++; + dev->accel.cy++; + } else { + dev->accel.dy--; + dev->accel.cy--; + } + + dev->accel.dest = dev->accel.dy * dev->h_disp; + dev->accel.src = dev->accel.cy * dev->h_disp; + dev->accel.sy--; + + if (dev->accel.sy < 0) { + return; + } + } + } + } + } else { + while (count-- && dev->accel.sy >= 0) { + if ((dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b)) { + if (pixcntl == 3) { + if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) { + READ(dev->accel.src + dev->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + mix_dat = mix_dat ? mix_mask : 0; + } else if (dev->accel.cmd & 0x10) { + READ(dev->accel.src + dev->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + mix_dat = mix_dat ? mix_mask : 0; + } + } + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = 0; + break; + case 3: + READ(dev->accel.src + dev->accel.cx, src_dat); + if (pixcntl == 3) { + if (dev->accel.cmd & 0x10) { + src_dat = ((src_dat & rd_mask) == rd_mask); + } + } + break; + } + + READ(dev->accel.dest + dev->accel.dx, dest_dat); + + if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); @@ -2905,12 +3256,8 @@ bitblt: WRITE(dev->accel.dest + dev->accel.dx, dest_dat); } } - - if (dev->accel.temp_cnt > 0) { - dev->accel.temp_cnt--; - mix_dat <<= 1; - mix_dat |= 1; - } + mix_dat <<= 1; + mix_dat |= 1; if (dev->accel.cmd & 0x20) { dev->accel.dx++; @@ -2941,77 +3288,7 @@ bitblt: } dev->accel.dest = dev->accel.dy * dev->h_disp; - dev->accel.src = dev->accel.cy * dev->h_disp; - dev->accel.sy--; - return; - } - } - } else { - dev->accel.temp_cnt = 8; - while (count-- && dev->accel.sy >= 0) { - if (dev->accel.temp_cnt == 0) { - dev->accel.temp_cnt = 8; - mix_dat = old_mix_dat; - } - if ((dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && - dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b)) { - switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = 0; break; - case 3: READ(dev->accel.src + dev->accel.cx, src_dat); - break; - } - - READ(dev->accel.dest + dev->accel.dx, dest_dat); - - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & 1, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - - WRITE(dev->accel.dest + dev->accel.dx, dest_dat); - } - } - dev->accel.temp_cnt--; - mix_dat >>= 1; - - if (dev->accel.cmd & 0x20) { - dev->accel.dx++; - dev->accel.cx++; - } else { - dev->accel.dx--; - dev->accel.cx--; - } - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 0x20) { - dev->accel.dx -= (dev->accel.sx) + 1; - dev->accel.cx -= (dev->accel.sx) + 1; - } else { - dev->accel.dx += (dev->accel.sx) + 1; - dev->accel.cx += (dev->accel.sx) + 1; - } - - if (dev->accel.cmd & 0x80) { - dev->accel.dy++; - dev->accel.cy++; - } else { - dev->accel.dy--; - dev->accel.cy--; - } - - dev->accel.dest = dev->accel.dy * dev->h_disp; - dev->accel.src = dev->accel.cy * dev->h_disp; + dev->accel.src = dev->accel.cy * dev->h_disp; dev->accel.sy--; if (dev->accel.sy < 0) { @@ -3020,104 +3297,19 @@ bitblt: } } } - } else { - while (count-- && dev->accel.sy >= 0) { - if ((dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && - dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b)) { - if (pixcntl == 3) { - if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) { - READ(dev->accel.src + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } else if (dev->accel.cmd & 0x10) { - READ(dev->accel.src + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } - } - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: src_dat = bkgd_color; break; - case 1: src_dat = frgd_color; break; - case 2: src_dat = 0; break; - case 3: READ(dev->accel.src + dev->accel.cx, src_dat); - if (pixcntl == 3) { - if (dev->accel.cmd & 0x10) { - src_dat = ((src_dat & rd_mask) == rd_mask); - } - } - break; - } - - READ(dev->accel.dest + dev->accel.dx, dest_dat); - - if ((compare_mode == 0) || - ((compare_mode == 0x10) && (dest_dat >= compare)) || - ((compare_mode == 0x18) && (dest_dat < compare)) || - ((compare_mode == 0x20) && (dest_dat != compare)) || - ((compare_mode == 0x28) && (dest_dat == compare)) || - ((compare_mode == 0x30) && (dest_dat <= compare)) || - ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - - WRITE(dev->accel.dest + dev->accel.dx, dest_dat); - } - } - mix_dat <<= 1; - mix_dat |= 1; - - if (dev->accel.cmd & 0x20) { - dev->accel.dx++; - dev->accel.cx++; - } else { - dev->accel.dx--; - dev->accel.cx--; - } - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 0x20) { - dev->accel.dx -= (dev->accel.sx) + 1; - dev->accel.cx -= (dev->accel.sx) + 1; - } else { - dev->accel.dx += (dev->accel.sx) + 1; - dev->accel.cx += (dev->accel.sx) + 1; - } - - if (dev->accel.cmd & 0x80) { - dev->accel.dy++; - dev->accel.cy++; - } else { - dev->accel.dy--; - dev->accel.cy--; - } - - dev->accel.dest = dev->accel.dy * dev->h_disp; - dev->accel.src = dev->accel.cy * dev->h_disp; - dev->accel.sy--; - - if (dev->accel.sy < 0) { - return; - } - } - } } } - } - break; - } + break; + } } static void ibm8514_render_8bpp(svga_t *svga) { ibm8514_t *dev = &svga->dev8514; - int x; - uint32_t *p; - uint32_t dat; + int x; + uint32_t *p; + uint32_t dat; if ((dev->displine + svga->y_add) < 0) { return; @@ -3131,13 +3323,13 @@ ibm8514_render_8bpp(svga_t *svga) dev->lastline_draw = dev->displine; for (x = 0; x <= dev->h_disp; x += 8) { - dat = *(uint32_t *)(&dev->vram[dev->ma & dev->vram_mask]); + dat = *(uint32_t *) (&dev->vram[dev->ma & dev->vram_mask]); p[0] = dev->map8[dat & 0xff]; p[1] = dev->map8[(dat >> 8) & 0xff]; p[2] = dev->map8[(dat >> 16) & 0xff]; p[3] = dev->map8[(dat >> 24) & 0xff]; - dat = *(uint32_t *)(&dev->vram[(dev->ma + 4) & dev->vram_mask]); + dat = *(uint32_t *) (&dev->vram[(dev->ma + 4) & dev->vram_mask]); p[4] = dev->map8[dat & 0xff]; p[5] = dev->map8[(dat >> 8) & 0xff]; p[6] = dev->map8[(dat >> 16) & 0xff]; @@ -3165,7 +3357,6 @@ ibm8514_render_overscan_left(ibm8514_t *dev, svga_t *svga) buffer32->line[dev->displine + svga->y_add][i] = svga->overscan_color; } - static void ibm8514_render_overscan_right(ibm8514_t *dev, svga_t *svga) { @@ -3186,7 +3377,7 @@ void ibm8514_poll(ibm8514_t *dev, svga_t *svga) { uint32_t x; - int wx, wy; + int wx, wy; if (!dev->linepos) { timer_advance_u64(&svga->timer, svga->dispofftime); @@ -3226,7 +3417,7 @@ ibm8514_poll(ibm8514_t *dev, svga_t *svga) if (dev->dispon) { if (dev->sc == dev->rowcount) { dev->linecountff = 0; - dev->sc = 0; + dev->sc = 0; dev->maback += (dev->rowoffset << 3); if (dev->interlace) @@ -3257,7 +3448,7 @@ ibm8514_poll(ibm8514_t *dev, svga_t *svga) } if (dev->vc == dev->v_syncstart) { dev->dispon = 0; - x = dev->h_disp; + x = dev->h_disp; if (dev->interlace && !dev->oddeven) dev->lastline++; @@ -3270,10 +3461,10 @@ ibm8514_poll(ibm8514_t *dev, svga_t *svga) svga_doblit(wx, wy, svga); dev->firstline = 2000; - dev->lastline = 0; + dev->lastline = 0; dev->firstline_draw = 2000; - dev->lastline_draw = 0; + dev->lastline_draw = 0; dev->oddeven ^= 1; @@ -3284,13 +3475,13 @@ ibm8514_poll(ibm8514_t *dev, svga_t *svga) else dev->ma = dev->maback = 0; - dev->ma = (dev->ma << 2); + dev->ma = (dev->ma << 2); dev->maback = (dev->maback << 2); } if (dev->vc == dev->v_total) { - dev->vc = 0; - dev->sc = 0; - dev->dispon = 1; + dev->vc = 0; + dev->sc = 0; + dev->dispon = 1; dev->displine = (dev->interlace && dev->oddeven) ? 1 : 0; svga->x_add = (overscan_x >> 1); @@ -3306,16 +3497,16 @@ ibm8514_recalctimings(svga_t *svga) ibm8514_t *dev = &svga->dev8514; dev->h_disp_time = dev->h_disp = (dev->hdisp + 1) << 3; - dev->rowoffset = (dev->hdisp + 1); - dev->h_total = (dev->htotal + 1); - dev->v_total = (dev->vtotal + 1); - dev->v_syncstart = (dev->vsyncstart + 1); - dev->rowcount = !!(dev->disp_cntl & 0x08); + dev->rowoffset = (dev->hdisp + 1); + dev->h_total = (dev->htotal + 1); + dev->v_total = (dev->vtotal + 1); + dev->v_syncstart = (dev->vsyncstart + 1); + dev->rowcount = !!(dev->disp_cntl & 0x08); if (dev->accel.advfunc_cntl & 4) { if (dev->hdisp == 0) { dev->rowoffset = 128; - dev->h_disp = 1024; + dev->h_disp = 1024; } if (dev->vtotal == 0) @@ -3333,63 +3524,62 @@ ibm8514_recalctimings(svga_t *svga) dev->v_total >>= 1; dev->v_syncstart >>= 1; } - //pclog("1024x768 clock mode, hdisp = %d, htotal = %d, vtotal = %d, vsyncstart = %d, interlace = %02x\n", dev->h_disp, dev->h_total, dev->v_total, dev->v_syncstart, dev->interlace); - svga->clock = (cpuclock * (double)(1ull << 32)) / 44900000.0; + // pclog("1024x768 clock mode, hdisp = %d, htotal = %d, vtotal = %d, vsyncstart = %d, interlace = %02x\n", dev->h_disp, dev->h_total, dev->v_total, dev->v_syncstart, dev->interlace); + svga->clock = (cpuclock * (double) (1ull << 32)) / 44900000.0; } else { - //pclog("640x480 clock mode\n"); + // pclog("640x480 clock mode\n"); dev->dispend = 480; dev->v_total >>= 1; dev->v_syncstart >>= 1; - svga->clock = (cpuclock * (double)(1ull << 32)) / 25175000.0; + svga->clock = (cpuclock * (double) (1ull << 32)) / 25175000.0; } - //pclog("8514 enabled, hdisp=%d, vtotal=%d, htotal=%d, dispend=%d, rowoffset=%d, split=%d, vsyncstart=%d, split=%08x\n", dev->hdisp, dev->vtotal, dev->htotal, dev->dispend, dev->rowoffset, dev->split, dev->vsyncstart, dev->split); + // pclog("8514 enabled, hdisp=%d, vtotal=%d, htotal=%d, dispend=%d, rowoffset=%d, split=%d, vsyncstart=%d, split=%08x\n", dev->hdisp, dev->vtotal, dev->htotal, dev->dispend, dev->rowoffset, dev->split, dev->vsyncstart, dev->split); } static uint8_t ibm8514_mca_read(int port, void *priv) { - svga_t *svga = (svga_t *)priv; - ibm8514_t *dev = &svga->dev8514; + svga_t *svga = (svga_t *) priv; + ibm8514_t *dev = &svga->dev8514; - return(dev->pos_regs[port & 7]); + return (dev->pos_regs[port & 7]); } - static void ibm8514_mca_write(int port, uint8_t val, void *priv) { - svga_t *svga = (svga_t *)priv; - ibm8514_t *dev = &svga->dev8514; + svga_t *svga = (svga_t *) priv; + ibm8514_t *dev = &svga->dev8514; /* MCA does not write registers below 0x0100. */ - if (port < 0x0102) return; + if (port < 0x0102) + return; /* Save the MCA register value. */ dev->pos_regs[port & 7] = val; } - static uint8_t ibm8514_mca_feedb(void *priv) { - svga_t *svga = (svga_t *)priv; - ibm8514_t *dev = &svga->dev8514; + svga_t *svga = (svga_t *) priv; + ibm8514_t *dev = &svga->dev8514; return dev->pos_regs[2] & 1; } - static void -*ibm8514_init(const device_t *info) + * + ibm8514_init(const device_t *info) { - svga_t *svga = svga_get_pri(); - ibm8514_t *dev = &svga->dev8514; + svga_t *svga = svga_get_pri(); + ibm8514_t *dev = &svga->dev8514; - dev->vram_size = 1024 << 10; - dev->vram = calloc(dev->vram_size, 1); + dev->vram_size = 1024 << 10; + dev->vram = calloc(dev->vram_size, 1); dev->changedvram = calloc(dev->vram_size >> 12, 1); - dev->vram_mask = dev->vram_size - 1; - dev->map8 = svga->pallook; + dev->vram_mask = dev->vram_size - 1; + dev->map8 = svga->pallook; dev->type = info->flags; @@ -3407,8 +3597,8 @@ static void static void ibm8514_close(void *p) { - svga_t *svga = (svga_t *)p; - ibm8514_t *dev = &svga->dev8514; + svga_t *svga = (svga_t *) p; + ibm8514_t *dev = &svga->dev8514; if (dev) { free(dev->vram); @@ -3419,7 +3609,7 @@ ibm8514_close(void *p) static void ibm8514_speed_changed(void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; svga_recalctimings(svga); } @@ -3427,9 +3617,9 @@ ibm8514_speed_changed(void *p) static void ibm8514_force_redraw(void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; - svga->fullchange = changeframecount; + svga->fullchange = changeframecount; } // clang-format off diff --git a/src/video/vid_ati18800.c b/src/video/vid_ati18800.c index 4c5f8cb24..2fb58aa5b 100644 --- a/src/video/vid_ati18800.c +++ b/src/video/vid_ati18800.c @@ -32,296 +32,293 @@ #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> - #if defined(DEV_BRANCH) && defined(USE_VGAWONDER) -#define BIOS_ROM_PATH_WONDER "roms/video/ati18800/VGA_Wonder_V3-1.02.bin" +# define BIOS_ROM_PATH_WONDER "roms/video/ati18800/VGA_Wonder_V3-1.02.bin" #endif -#define BIOS_ROM_PATH_VGA88 "roms/video/ati18800/vga88.bin" -#define BIOS_ROM_PATH_EDGE16 "roms/video/ati18800/vgaedge16.vbi" +#define BIOS_ROM_PATH_VGA88 "roms/video/ati18800/vga88.bin" +#define BIOS_ROM_PATH_EDGE16 "roms/video/ati18800/vgaedge16.vbi" enum { #if defined(DEV_BRANCH) && defined(USE_VGAWONDER) - ATI18800_WONDER = 0, - ATI18800_VGA88, - ATI18800_EDGE16 + ATI18800_WONDER = 0, + ATI18800_VGA88, + ATI18800_EDGE16 #else - ATI18800_VGA88 = 0, - ATI18800_EDGE16 + ATI18800_VGA88 = 0, + ATI18800_EDGE16 #endif }; +typedef struct ati18800_t { + svga_t svga; + ati_eeprom_t eeprom; -typedef struct ati18800_t -{ - svga_t svga; - ati_eeprom_t eeprom; + rom_t bios_rom; - rom_t bios_rom; - - uint8_t regs[256]; - int index; + uint8_t regs[256]; + int index; } ati18800_t; -static video_timings_t timing_ati18800 = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; +static video_timings_t timing_ati18800 = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; - -static void ati18800_out(uint16_t addr, uint8_t val, void *p) +static void +ati18800_out(uint16_t addr, uint8_t val, void *p) { - ati18800_t *ati18800 = (ati18800_t *)p; - svga_t *svga = &ati18800->svga; - uint8_t old; + ati18800_t *ati18800 = (ati18800_t *) p; + svga_t *svga = &ati18800->svga; + uint8_t old; - if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x1ce: - ati18800->index = val; - break; - case 0x1cf: - ati18800->regs[ati18800->index] = val; - switch (ati18800->index) - { - case 0xb0: - svga_recalctimings(svga); - break; - case 0xb2: - case 0xbe: - if (ati18800->regs[0xbe] & 8) /*Read/write bank mode*/ - { - svga->read_bank = ((ati18800->regs[0xb2] >> 5) & 7) * 0x10000; - svga->write_bank = ((ati18800->regs[0xb2] >> 1) & 7) * 0x10000; - } - else /*Single bank mode*/ - svga->read_bank = svga->write_bank = ((ati18800->regs[0xb2] >> 1) & 7) * 0x10000; - break; - case 0xb3: - ati_eeprom_write(&ati18800->eeprom, val & 8, val & 2, val & 1); - break; - } - break; + switch (addr) { + case 0x1ce: + ati18800->index = val; + break; + case 0x1cf: + ati18800->regs[ati18800->index] = val; + switch (ati18800->index) { + case 0xb0: + svga_recalctimings(svga); + break; + case 0xb2: + case 0xbe: + if (ati18800->regs[0xbe] & 8) /*Read/write bank mode*/ + { + svga->read_bank = ((ati18800->regs[0xb2] >> 5) & 7) * 0x10000; + svga->write_bank = ((ati18800->regs[0xb2] >> 1) & 7) * 0x10000; + } else /*Single bank mode*/ + svga->read_bank = svga->write_bank = ((ati18800->regs[0xb2] >> 1) & 7) * 0x10000; + break; + case 0xb3: + ati_eeprom_write(&ati18800->eeprom, val & 8, val & 2, val & 1); + break; + } + break; - case 0x3D4: - svga->crtcreg = val & 0x3f; + case 0x3D4: + svga->crtcreg = val & 0x3f; + return; + case 0x3D5: + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80) && !(ati18800->regs[0xb4] & 0x80)) return; - case 0x3D5: - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80) && !(ati18800->regs[0xb4] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80) && !(ati18800->regs[0xb4] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - old = svga->crtc[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; - if (old != val) - { - if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) - { - if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - } + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80) && !(ati18800->regs[0xb4] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } } - break; - } - svga_out(addr, val, svga); + } + break; + } + svga_out(addr, val, svga); } -static uint8_t ati18800_in(uint16_t addr, void *p) +static uint8_t +ati18800_in(uint16_t addr, void *p) { - ati18800_t *ati18800 = (ati18800_t *)p; - svga_t *svga = &ati18800->svga; - uint8_t temp = 0xff; + ati18800_t *ati18800 = (ati18800_t *) p; + svga_t *svga = &ati18800->svga; + uint8_t temp = 0xff; - if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout&1)) addr ^= 0x60; + if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x1ce: - temp = ati18800->index; - break; - case 0x1cf: - switch (ati18800->index) - { - case 0xb7: - temp = ati18800->regs[ati18800->index] & ~8; - if (ati_eeprom_read(&ati18800->eeprom)) - temp |= 8; - break; - default: - temp = ati18800->regs[ati18800->index]; - break; - } - break; - - case 0x3D4: - temp = svga->crtcreg; - break; - case 0x3D5: - temp = svga->crtc[svga->crtcreg]; - break; + switch (addr) { + case 0x1ce: + temp = ati18800->index; + break; + case 0x1cf: + switch (ati18800->index) { + case 0xb7: + temp = ati18800->regs[ati18800->index] & ~8; + if (ati_eeprom_read(&ati18800->eeprom)) + temp |= 8; + break; default: - temp = svga_in(addr, svga); - break; - } - return temp; + temp = ati18800->regs[ati18800->index]; + break; + } + break; + + case 0x3D4: + temp = svga->crtcreg; + break; + case 0x3D5: + temp = svga->crtc[svga->crtcreg]; + break; + default: + temp = svga_in(addr, svga); + break; + } + return temp; } -static void ati18800_recalctimings(svga_t *svga) +static void +ati18800_recalctimings(svga_t *svga) { - ati18800_t *ati18800 = (ati18800_t *)svga->p; + ati18800_t *ati18800 = (ati18800_t *) svga->p; - if(svga->crtc[0x17] & 4) - { - svga->vtotal <<= 1; - svga->dispend <<= 1; - svga->vsyncstart <<= 1; - svga->split <<= 1; - svga->vblankstart <<= 1; - } + if (svga->crtc[0x17] & 4) { + svga->vtotal <<= 1; + svga->dispend <<= 1; + svga->vsyncstart <<= 1; + svga->split <<= 1; + svga->vblankstart <<= 1; + } - if (!svga->scrblank && ((ati18800->regs[0xb0] & 0x02) || (ati18800->regs[0xb0] & 0x04))) /*Extended 256 colour modes*/ - { - svga->render = svga_render_8bpp_highres; - svga->bpp = 8; - svga->rowoffset <<= 1; - svga->ma <<= 1; - } + if (!svga->scrblank && ((ati18800->regs[0xb0] & 0x02) || (ati18800->regs[0xb0] & 0x04))) /*Extended 256 colour modes*/ + { + svga->render = svga_render_8bpp_highres; + svga->bpp = 8; + svga->rowoffset <<= 1; + svga->ma <<= 1; + } } -static void *ati18800_init(const device_t *info) +static void * +ati18800_init(const device_t *info) { - ati18800_t *ati18800 = malloc(sizeof(ati18800_t)); - memset(ati18800, 0, sizeof(ati18800_t)); + ati18800_t *ati18800 = malloc(sizeof(ati18800_t)); + memset(ati18800, 0, sizeof(ati18800_t)); - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_ati18800); + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_ati18800); - switch (info->local) { + switch (info->local) { #if defined(DEV_BRANCH) && defined(USE_VGAWONDER) - case ATI18800_WONDER: + case ATI18800_WONDER: #endif - default: + default: #if defined(DEV_BRANCH) && defined(USE_VGAWONDER) - rom_init(&ati18800->bios_rom, BIOS_ROM_PATH_WONDER, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - break; + rom_init(&ati18800->bios_rom, BIOS_ROM_PATH_WONDER, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + break; #endif - case ATI18800_VGA88: - rom_init(&ati18800->bios_rom, BIOS_ROM_PATH_VGA88, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - break; - case ATI18800_EDGE16: - rom_init(&ati18800->bios_rom, BIOS_ROM_PATH_EDGE16, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - break; - }; + case ATI18800_VGA88: + rom_init(&ati18800->bios_rom, BIOS_ROM_PATH_VGA88, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + break; + case ATI18800_EDGE16: + rom_init(&ati18800->bios_rom, BIOS_ROM_PATH_EDGE16, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + break; + }; - if (info->local == ATI18800_EDGE16) { - svga_init(info, &ati18800->svga, ati18800, 1 << 18, /*256kb*/ - ati18800_recalctimings, - ati18800_in, ati18800_out, - NULL, - NULL); - } else { - svga_init(info, &ati18800->svga, ati18800, 1 << 19, /*512kb*/ - ati18800_recalctimings, - ati18800_in, ati18800_out, - NULL, - NULL); - } + if (info->local == ATI18800_EDGE16) { + svga_init(info, &ati18800->svga, ati18800, 1 << 18, /*256kb*/ + ati18800_recalctimings, + ati18800_in, ati18800_out, + NULL, + NULL); + } else { + svga_init(info, &ati18800->svga, ati18800, 1 << 19, /*512kb*/ + ati18800_recalctimings, + ati18800_in, ati18800_out, + NULL, + NULL); + } - io_sethandler(0x01ce, 0x0002, ati18800_in, NULL, NULL, ati18800_out, NULL, NULL, ati18800); - io_sethandler(0x03c0, 0x0020, ati18800_in, NULL, NULL, ati18800_out, NULL, NULL, ati18800); + io_sethandler(0x01ce, 0x0002, ati18800_in, NULL, NULL, ati18800_out, NULL, NULL, ati18800); + io_sethandler(0x03c0, 0x0020, ati18800_in, NULL, NULL, ati18800_out, NULL, NULL, ati18800); - ati18800->svga.miscout = 1; + ati18800->svga.miscout = 1; - ati_eeprom_load(&ati18800->eeprom, "ati18800.nvr", 0); + ati_eeprom_load(&ati18800->eeprom, "ati18800.nvr", 0); - return ati18800; + return ati18800; } #if defined(DEV_BRANCH) && defined(USE_VGAWONDER) -static int ati18800_wonder_available(void) +static int +ati18800_wonder_available(void) { - return rom_present(BIOS_ROM_PATH_WONDER); + return rom_present(BIOS_ROM_PATH_WONDER); } #endif -static int ati18800_vga88_available(void) +static int +ati18800_vga88_available(void) { - return rom_present(BIOS_ROM_PATH_VGA88); + return rom_present(BIOS_ROM_PATH_VGA88); } -static int ati18800_available(void) +static int +ati18800_available(void) { - return rom_present(BIOS_ROM_PATH_EDGE16); + return rom_present(BIOS_ROM_PATH_EDGE16); } -static void ati18800_close(void *p) +static void +ati18800_close(void *p) { - ati18800_t *ati18800 = (ati18800_t *)p; + ati18800_t *ati18800 = (ati18800_t *) p; - svga_close(&ati18800->svga); + svga_close(&ati18800->svga); - free(ati18800); + free(ati18800); } -static void ati18800_speed_changed(void *p) +static void +ati18800_speed_changed(void *p) { - ati18800_t *ati18800 = (ati18800_t *)p; + ati18800_t *ati18800 = (ati18800_t *) p; - svga_recalctimings(&ati18800->svga); + svga_recalctimings(&ati18800->svga); } -static void ati18800_force_redraw(void *p) +static void +ati18800_force_redraw(void *p) { - ati18800_t *ati18800 = (ati18800_t *)p; + ati18800_t *ati18800 = (ati18800_t *) p; - ati18800->svga.fullchange = changeframecount; + ati18800->svga.fullchange = changeframecount; } #if defined(DEV_BRANCH) && defined(USE_VGAWONDER) const device_t ati18800_wonder_device = { - .name = "ATI-18800", + .name = "ATI-18800", .internal_name = "ati18800w", - .flags = DEVICE_ISA, - .local = ATI18800_WONDER, - .init = ati18800_init, - .close = ati18800_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ATI18800_WONDER, + .init = ati18800_init, + .close = ati18800_close, + .reset = NULL, { .available = ati18800_wonder_available }, .speed_changed = ati18800_speed_changed, - .force_redraw = ati18800_force_redraw, - .config = NULL + .force_redraw = ati18800_force_redraw, + .config = NULL }; #endif -const device_t ati18800_vga88_device = -{ - .name = "ATI-18800-1", +const device_t ati18800_vga88_device = { + .name = "ATI-18800-1", .internal_name = "ati18800v", - .flags = DEVICE_ISA, - .local = ATI18800_VGA88, - .init = ati18800_init, - .close = ati18800_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ATI18800_VGA88, + .init = ati18800_init, + .close = ati18800_close, + .reset = NULL, { .available = ati18800_vga88_available }, .speed_changed = ati18800_speed_changed, - .force_redraw = ati18800_force_redraw, - .config = NULL + .force_redraw = ati18800_force_redraw, + .config = NULL }; -const device_t ati18800_device = -{ - .name = "ATI-18800-5", +const device_t ati18800_device = { + .name = "ATI-18800-5", .internal_name = "ati18800", - .flags = DEVICE_ISA, - .local = ATI18800_EDGE16, - .init = ati18800_init, - .close = ati18800_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ATI18800_EDGE16, + .init = ati18800_init, + .close = ati18800_close, + .reset = NULL, { .available = ati18800_available }, .speed_changed = ati18800_speed_changed, - .force_redraw = ati18800_force_redraw, - .config = NULL + .force_redraw = ati18800_force_redraw, + .config = NULL }; diff --git a/src/video/vid_ati28800.c b/src/video/vid_ati28800.c index 87abb7da8..06b61d41f 100644 --- a/src/video/vid_ati28800.c +++ b/src/video/vid_ati28800.c @@ -36,461 +36,484 @@ #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> - -#define VGAWONDERXL 1 +#define VGAWONDERXL 1 #if defined(DEV_BRANCH) && defined(USE_XL24) -#define VGAWONDERXL24 2 +# define VGAWONDERXL24 2 #endif -#define BIOS_ATIKOR_PATH "roms/video/ati28800/atikorvga.bin" +#define BIOS_ATIKOR_PATH "roms/video/ati28800/atikorvga.bin" #define BIOS_ATIKOR_4620P_PATH_L "roms/machines/spc4620p/31005h.u8" #define BIOS_ATIKOR_4620P_PATH_H "roms/machines/spc4620p/31005h.u10" -#define BIOS_ATIKOR_6033P_PATH "roms/machines/spc6033p/phoenix.BIN" -#define FONT_ATIKOR_PATH "roms/video/ati28800/ati_ksc5601.rom" -#define FONT_ATIKOR_4620P_PATH "roms/machines/spc4620p/svb6120a_font.rom" -#define FONT_ATIKOR_6033P_PATH "roms/machines/spc6033p/svb6120a_font.rom" +#define BIOS_ATIKOR_6033P_PATH "roms/machines/spc6033p/phoenix.BIN" +#define FONT_ATIKOR_PATH "roms/video/ati28800/ati_ksc5601.rom" +#define FONT_ATIKOR_4620P_PATH "roms/machines/spc4620p/svb6120a_font.rom" +#define FONT_ATIKOR_6033P_PATH "roms/machines/spc6033p/svb6120a_font.rom" -#define BIOS_VGAXL_EVEN_PATH "roms/video/ati28800/xleven.bin" -#define BIOS_VGAXL_ODD_PATH "roms/video/ati28800/xlodd.bin" +#define BIOS_VGAXL_EVEN_PATH "roms/video/ati28800/xleven.bin" +#define BIOS_VGAXL_ODD_PATH "roms/video/ati28800/xlodd.bin" #if defined(DEV_BRANCH) && defined(USE_XL24) -#define BIOS_XL24_EVEN_PATH "roms/video/ati28800/112-14318-102.bin" -#define BIOS_XL24_ODD_PATH "roms/video/ati28800/112-14319-102.bin" +# define BIOS_XL24_EVEN_PATH "roms/video/ati28800/112-14318-102.bin" +# define BIOS_XL24_ODD_PATH "roms/video/ati28800/112-14319-102.bin" #endif -#define BIOS_ROM_PATH "roms/video/ati28800/bios.bin" +#define BIOS_ROM_PATH "roms/video/ati28800/bios.bin" #define BIOS_VGAXL_ROM_PATH "roms/video/ati28800/ATI_VGAWonder_XL.bin" +typedef struct ati28800_t { + svga_t svga; + ati_eeprom_t eeprom; -typedef struct ati28800_t -{ - svga_t svga; - ati_eeprom_t eeprom; + rom_t bios_rom; - rom_t bios_rom; + uint8_t regs[256]; + int index; + uint16_t vtotal; - uint8_t regs[256]; - int index; - uint16_t vtotal; + uint32_t memory; + uint8_t id; - uint32_t memory; - uint8_t id; + uint8_t port_03dd_val; + uint16_t get_korean_font_kind; + int in_get_korean_font_kind_set; + int get_korean_font_enabled; + int get_korean_font_index; + uint16_t get_korean_font_base; + int ksc5601_mode_enabled; - uint8_t port_03dd_val; - uint16_t get_korean_font_kind; - int in_get_korean_font_kind_set; - int get_korean_font_enabled; - int get_korean_font_index; - uint16_t get_korean_font_base; - int ksc5601_mode_enabled; - - int type, type_korean; + int type, type_korean; } ati28800_t; - -static video_timings_t timing_ati28800 = {VIDEO_ISA, 3, 3, 6, 5, 5, 10}; -static video_timings_t timing_ati28800_spc = {VIDEO_ISA, 2, 2, 4, 4, 4, 8}; - +static video_timings_t timing_ati28800 = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 5, .read_w = 5, .read_l = 10 }; +static video_timings_t timing_ati28800_spc = { .type = VIDEO_ISA, .write_b = 2, .write_w = 2, .write_l = 4, .read_b = 4, .read_w = 4, .read_l = 8 }; #ifdef ENABLE_ATI28800_LOG int ati28800_do_log = ENABLE_ATI28800_LOG; - static void ati28800_log(const char *fmt, ...) { va_list ap; if (ati28800_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define ati28800_log(fmt, ...) +# define ati28800_log(fmt, ...) #endif - static void ati28800_recalctimings(svga_t *svga); static void ati28800_out(uint16_t addr, uint8_t val, void *p) { - ati28800_t *ati28800 = (ati28800_t *)p; - svga_t *svga = &ati28800->svga; - uint8_t old; + ati28800_t *ati28800 = (ati28800_t *) p; + svga_t *svga = &ati28800->svga; + uint8_t old; ati28800_log("ati28800_out : %04X %02X\n", addr, val); if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1)) - addr ^= 0x60; + addr ^= 0x60; switch (addr) { - case 0x1ce: - ati28800->index = val; - break; - case 0x1cf: - old = ati28800->regs[ati28800->index]; - ati28800->regs[ati28800->index] = val; - ati28800_log("ATI 28800 write reg=0x%02X, val=0x%02X\n", ati28800->index, val); - switch (ati28800->index) { - case 0xa3: - if ((old ^ val) & 0x10) - svga_recalctimings(svga); - break; - case 0xa7: - if ((old ^ val) & 0x80) - svga_recalctimings(svga); - break; - case 0xb0: - if ((old ^ val) & 0x60) - svga_recalctimings(svga); - break; - case 0xb2: - case 0xbe: - if (ati28800->regs[0xbe] & 0x08) { /* Read/write bank mode */ - svga->read_bank = (((ati28800->regs[0xb2] & 0x01) << 3) | ((ati28800->regs[0xb2] & 0xe0) >> 5)) * 0x10000; - svga->write_bank = ((ati28800->regs[0xb2] & 0x1e) >> 1) * 0x10000; - } else { /* Single bank mode */ - svga->read_bank = ((ati28800->regs[0xb2] & 0x1e) >> 1) * 0x10000; - svga->write_bank = ((ati28800->regs[0xb2] & 0x1e) >> 1) * 0x10000; - } - if (ati28800->index == 0xbe) { - if ((old ^ val) & 0x10) - svga_recalctimings(svga); - } - break; - case 0xb3: - ati_eeprom_write(&ati28800->eeprom, val & 8, val & 2, val & 1); - break; - case 0xb6: - if ((old ^ val) & 0x10) - svga_recalctimings(svga); - break; - case 0xb8: - if ((old ^ val) & 0x40) - svga_recalctimings(svga); - break; - case 0xb9: - if ((old ^ val) & 2) - svga_recalctimings(svga); - break; - } - break; + case 0x1ce: + ati28800->index = val; + break; + case 0x1cf: + old = ati28800->regs[ati28800->index]; + ati28800->regs[ati28800->index] = val; + ati28800_log("ATI 28800 write reg=0x%02X, val=0x%02X\n", ati28800->index, val); + switch (ati28800->index) { + case 0xa3: + if ((old ^ val) & 0x10) + svga_recalctimings(svga); + break; + case 0xa7: + if ((old ^ val) & 0x80) + svga_recalctimings(svga); + break; + case 0xb0: + if ((old ^ val) & 0x60) + svga_recalctimings(svga); + break; + case 0xb2: + case 0xbe: + if (ati28800->regs[0xbe] & 0x08) { /* Read/write bank mode */ + svga->read_bank = (((ati28800->regs[0xb2] & 0x01) << 3) | ((ati28800->regs[0xb2] & 0xe0) >> 5)) * 0x10000; + svga->write_bank = ((ati28800->regs[0xb2] & 0x1e) >> 1) * 0x10000; + } else { /* Single bank mode */ + svga->read_bank = ((ati28800->regs[0xb2] & 0x1e) >> 1) * 0x10000; + svga->write_bank = ((ati28800->regs[0xb2] & 0x1e) >> 1) * 0x10000; + } + if (ati28800->index == 0xbe) { + if ((old ^ val) & 0x10) + svga_recalctimings(svga); + } + break; + case 0xb3: + ati_eeprom_write(&ati28800->eeprom, val & 8, val & 2, val & 1); + break; + case 0xb6: + if ((old ^ val) & 0x10) + svga_recalctimings(svga); + break; + case 0xb8: + if ((old ^ val) & 0x40) + svga_recalctimings(svga); + break; + case 0xb9: + if ((old ^ val) & 2) + svga_recalctimings(svga); + break; + } + break; - case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9: - if (ati28800->type == 1) - sc1148x_ramdac_out(addr, 0, val, svga->ramdac, svga); - else - svga_out(addr, val, svga); - return; + case 0x3C6: + case 0x3C7: + case 0x3C8: + case 0x3C9: + if (ati28800->type == 1) + sc1148x_ramdac_out(addr, 0, val, svga->ramdac, svga); + else + svga_out(addr, val, svga); + return; - case 0x3D4: - svga->crtcreg = val & 0x3f; - return; - case 0x3D5: - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); + case 0x3D4: + svga->crtcreg = val & 0x3f; + return; + case 0x3D5: + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); - old = svga->crtc[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; - if (old != val) - { - if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) - { - if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - } + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } } - break; + } + break; } svga_out(addr, val, svga); } - static void ati28800k_out(uint16_t addr, uint8_t val, void *p) { - ati28800_t *ati28800 = (ati28800_t *)p; - svga_t *svga = &ati28800->svga; - uint16_t oldaddr = addr; + ati28800_t *ati28800 = (ati28800_t *) p; + svga_t *svga = &ati28800->svga; + uint16_t oldaddr = addr; - if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout&1)) - addr ^= 0x60; + if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1)) + addr ^= 0x60; switch (addr) { - case 0x1CF: - if (ati28800->index == 0xBF && ((ati28800->regs[0xBF] ^ val) & 0x20)) { - ati28800->ksc5601_mode_enabled = val & 0x20; - svga_recalctimings(svga); - } - ati28800_out(oldaddr, val, p); - break; - case 0x3DD: - ati28800->port_03dd_val = val; - if (val == 1) - ati28800->get_korean_font_enabled = 0; - if (ati28800->in_get_korean_font_kind_set) { - ati28800->get_korean_font_kind = (val << 8) | (ati28800->get_korean_font_kind & 0xFF); - ati28800->get_korean_font_enabled = 1; - ati28800->get_korean_font_index = 0; - ati28800->in_get_korean_font_kind_set = 0; - } - break; - case 0x3DE: - ati28800->in_get_korean_font_kind_set = 0; - if (ati28800->get_korean_font_enabled) { - if ((ati28800->get_korean_font_base & 0x7F) > 0x20 && (ati28800->get_korean_font_base & 0x7F) < 0x7F) { - fontdatksc5601_user[(ati28800->get_korean_font_kind & 4) * 24 + - (ati28800->get_korean_font_base & 0x7F) - 0x20].chr[ati28800->get_korean_font_index] = val; - } - ati28800->get_korean_font_index++; - ati28800->get_korean_font_index &= 0x1F; - } else { - switch (ati28800->port_03dd_val) { - case 0x10: - ati28800->get_korean_font_base = ((val & 0x7F) << 7) | (ati28800->get_korean_font_base & 0x7F); - break; - case 8: - ati28800->get_korean_font_base = (ati28800->get_korean_font_base & 0x3F80) | (val & 0x7F); - break; - case 1: - ati28800->get_korean_font_kind = (ati28800->get_korean_font_kind & 0xFF00) | val; - if (val & 2) - ati28800->in_get_korean_font_kind_set = 1; - break; - } - break; - } - break; - default: - ati28800_out(oldaddr, val, p); - break; + case 0x1CF: + if (ati28800->index == 0xBF && ((ati28800->regs[0xBF] ^ val) & 0x20)) { + ati28800->ksc5601_mode_enabled = val & 0x20; + svga_recalctimings(svga); + } + ati28800_out(oldaddr, val, p); + break; + case 0x3DD: + ati28800->port_03dd_val = val; + if (val == 1) + ati28800->get_korean_font_enabled = 0; + if (ati28800->in_get_korean_font_kind_set) { + ati28800->get_korean_font_kind = (val << 8) | (ati28800->get_korean_font_kind & 0xFF); + ati28800->get_korean_font_enabled = 1; + ati28800->get_korean_font_index = 0; + ati28800->in_get_korean_font_kind_set = 0; + } + break; + case 0x3DE: + ati28800->in_get_korean_font_kind_set = 0; + if (ati28800->get_korean_font_enabled) { + if ((ati28800->get_korean_font_base & 0x7F) > 0x20 && (ati28800->get_korean_font_base & 0x7F) < 0x7F) { + fontdatksc5601_user[(ati28800->get_korean_font_kind & 4) * 24 + (ati28800->get_korean_font_base & 0x7F) - 0x20].chr[ati28800->get_korean_font_index] = val; + } + ati28800->get_korean_font_index++; + ati28800->get_korean_font_index &= 0x1F; + } else { + switch (ati28800->port_03dd_val) { + case 0x10: + ati28800->get_korean_font_base = ((val & 0x7F) << 7) | (ati28800->get_korean_font_base & 0x7F); + break; + case 8: + ati28800->get_korean_font_base = (ati28800->get_korean_font_base & 0x3F80) | (val & 0x7F); + break; + case 1: + ati28800->get_korean_font_kind = (ati28800->get_korean_font_kind & 0xFF00) | val; + if (val & 2) + ati28800->in_get_korean_font_kind_set = 1; + break; + } + break; + } + break; + default: + ati28800_out(oldaddr, val, p); + break; } } - static uint8_t ati28800_in(uint16_t addr, void *p) { - ati28800_t *ati28800 = (ati28800_t *)p; - svga_t *svga = &ati28800->svga; - uint8_t temp; + ati28800_t *ati28800 = (ati28800_t *) p; + svga_t *svga = &ati28800->svga; + uint8_t temp; if (addr != 0x3da) - ati28800_log("ati28800_in : %04X ", addr); + ati28800_log("ati28800_in : %04X ", addr); - if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout&1)) - addr ^= 0x60; + if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1)) + addr ^= 0x60; switch (addr) { - case 0x1ce: - temp = ati28800->index; - break; - case 0x1cf: - switch (ati28800->index) { - case 0xaa: - temp = ati28800->id; - break; - case 0xb0: - temp = ati28800->regs[0xb0] | 0x80; - if (ati28800->memory == 1024) { - temp &= ~0x10; - temp |= 0x08; - } else if (ati28800->memory == 512) { - temp |= 0x10; - temp &= ~0x08; - } else { - temp &= ~0x18; - } - break; - case 0xb7: - temp = ati28800->regs[0xb7] & ~8; - if (ati_eeprom_read(&ati28800->eeprom)) - temp |= 8; - break; + case 0x1ce: + temp = ati28800->index; + break; + case 0x1cf: + switch (ati28800->index) { + case 0xaa: + temp = ati28800->id; + break; + case 0xb0: + temp = ati28800->regs[0xb0] | 0x80; + if (ati28800->memory == 1024) { + temp &= ~0x10; + temp |= 0x08; + } else if (ati28800->memory == 512) { + temp |= 0x10; + temp &= ~0x08; + } else { + temp &= ~0x18; + } + break; + case 0xb7: + temp = ati28800->regs[0xb7] & ~8; + if (ati_eeprom_read(&ati28800->eeprom)) + temp |= 8; + break; - default: - temp = ati28800->regs[ati28800->index]; - break; - } - break; + default: + temp = ati28800->regs[ati28800->index]; + break; + } + break; - case 0x3c2: - if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x50) - temp = 0; - else - temp = 0x10; - break; + case 0x3c2: + if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x50) + temp = 0; + else + temp = 0x10; + break; - case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9: - if (ati28800->type == 1) - return sc1148x_ramdac_in(addr, 0, svga->ramdac, svga); - return svga_in(addr, svga); + case 0x3C6: + case 0x3C7: + case 0x3C8: + case 0x3C9: + if (ati28800->type == 1) + return sc1148x_ramdac_in(addr, 0, svga->ramdac, svga); + return svga_in(addr, svga); - case 0x3D4: - temp = svga->crtcreg; - break; - case 0x3D5: - temp = svga->crtc[svga->crtcreg]; - break; - default: - temp = svga_in(addr, svga); - break; + case 0x3D4: + temp = svga->crtcreg; + break; + case 0x3D5: + temp = svga->crtc[svga->crtcreg]; + break; + default: + temp = svga_in(addr, svga); + break; } if (addr != 0x3da) - ati28800_log("%02X\n", temp); + ati28800_log("%02X\n", temp); return temp; } - static uint8_t ati28800k_in(uint16_t addr, void *p) { - ati28800_t *ati28800 = (ati28800_t *)p; - svga_t *svga = &ati28800->svga; - uint16_t oldaddr = addr; - uint8_t temp = 0xFF; + ati28800_t *ati28800 = (ati28800_t *) p; + svga_t *svga = &ati28800->svga; + uint16_t oldaddr = addr; + uint8_t temp = 0xFF; if (addr != 0x3da) - ati28800_log("ati28800k_in : %04X ", addr); + ati28800_log("ati28800k_in : %04X ", addr); - if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout&1)) - addr ^= 0x60; + if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1)) + addr ^= 0x60; switch (addr) { - case 0x3DE: - if (ati28800->get_korean_font_enabled) { - switch (ati28800->get_korean_font_kind >> 8) { - case 4: /* ROM font */ - temp = fontdatksc5601[ati28800->get_korean_font_base].chr[ati28800->get_korean_font_index++]; - break; - case 2: /* User defined font */ - if ((ati28800->get_korean_font_base & 0x7F) > 0x20 && (ati28800->get_korean_font_base & 0x7F) < 0x7F) { - temp = fontdatksc5601_user[(ati28800->get_korean_font_kind & 4) * 24 + - (ati28800->get_korean_font_base & 0x7F) - 0x20].chr[ati28800->get_korean_font_index]; - } else - temp = 0xFF; - ati28800->get_korean_font_index++; - break; - default: - break; - } - ati28800->get_korean_font_index &= 0x1F; - } - break; - default: - temp = ati28800_in(oldaddr, p); - break; + case 0x3DE: + if (ati28800->get_korean_font_enabled) { + switch (ati28800->get_korean_font_kind >> 8) { + case 4: /* ROM font */ + temp = fontdatksc5601[ati28800->get_korean_font_base].chr[ati28800->get_korean_font_index++]; + break; + case 2: /* User defined font */ + if ((ati28800->get_korean_font_base & 0x7F) > 0x20 && (ati28800->get_korean_font_base & 0x7F) < 0x7F) { + temp = fontdatksc5601_user[(ati28800->get_korean_font_kind & 4) * 24 + (ati28800->get_korean_font_base & 0x7F) - 0x20].chr[ati28800->get_korean_font_index]; + } else + temp = 0xFF; + ati28800->get_korean_font_index++; + break; + default: + break; + } + ati28800->get_korean_font_index &= 0x1F; + } + break; + default: + temp = ati28800_in(oldaddr, p); + break; } if (addr != 0x3da) - ati28800_log("%02X\n", temp); + ati28800_log("%02X\n", temp); return temp; } - static void ati28800_recalctimings(svga_t *svga) { - ati28800_t *ati28800 = (ati28800_t *)svga->p; + ati28800_t *ati28800 = (ati28800_t *) svga->p; - if (ati28800->regs[0xa3] & 0x10) - svga->ma_latch |= 0x10000; + if (ati28800->regs[0xa3] & 0x10) + svga->ma_latch |= 0x10000; - if (ati28800->regs[0xb0] & 0x40) - svga->ma_latch |= 0x20000; + if (ati28800->regs[0xb0] & 0x40) + svga->ma_latch |= 0x20000; - switch (((ati28800->regs[0xbe] & 0x10) >> 1) | ((ati28800->regs[0xb9] & 2) << 1) | - ((svga->miscout & 0x0C) >> 2)) { - case 0x00: svga->clock = (cpuclock * (double)(1ull << 32)) / 42954000.0; break; - case 0x01: svga->clock = (cpuclock * (double)(1ull << 32)) / 48771000.0; break; - case 0x02: ati28800_log ("clock 2\n"); break; - case 0x03: svga->clock = (cpuclock * (double)(1ull << 32)) / 36000000.0; break; - case 0x04: svga->clock = (cpuclock * (double)(1ull << 32)) / 50350000.0; break; - case 0x05: svga->clock = (cpuclock * (double)(1ull << 32)) / 56640000.0; break; - case 0x06: ati28800_log ("clock 2\n"); break; - case 0x07: svga->clock = (cpuclock * (double)(1ull << 32)) / 44900000.0; break; - case 0x08: svga->clock = (cpuclock * (double)(1ull << 32)) / 30240000.0; break; - case 0x09: svga->clock = (cpuclock * (double)(1ull << 32)) / 32000000.0; break; - case 0x0A: svga->clock = (cpuclock * (double)(1ull << 32)) / 37500000.0; break; - case 0x0B: svga->clock = (cpuclock * (double)(1ull << 32)) / 39000000.0; break; - case 0x0C: svga->clock = (cpuclock * (double)(1ull << 32)) / 50350000.0; break; - case 0x0D: svga->clock = (cpuclock * (double)(1ull << 32)) / 56644000.0; break; - case 0x0E: svga->clock = (cpuclock * (double)(1ull << 32)) / 75000000.0; break; - case 0x0F: svga->clock = (cpuclock * (double)(1ull << 32)) / 65000000.0; break; - default: break; - } + switch (((ati28800->regs[0xbe] & 0x10) >> 1) | ((ati28800->regs[0xb9] & 2) << 1) | ((svga->miscout & 0x0C) >> 2)) { + case 0x00: + svga->clock = (cpuclock * (double) (1ull << 32)) / 42954000.0; + break; + case 0x01: + svga->clock = (cpuclock * (double) (1ull << 32)) / 48771000.0; + break; + case 0x02: + ati28800_log("clock 2\n"); + break; + case 0x03: + svga->clock = (cpuclock * (double) (1ull << 32)) / 36000000.0; + break; + case 0x04: + svga->clock = (cpuclock * (double) (1ull << 32)) / 50350000.0; + break; + case 0x05: + svga->clock = (cpuclock * (double) (1ull << 32)) / 56640000.0; + break; + case 0x06: + ati28800_log("clock 2\n"); + break; + case 0x07: + svga->clock = (cpuclock * (double) (1ull << 32)) / 44900000.0; + break; + case 0x08: + svga->clock = (cpuclock * (double) (1ull << 32)) / 30240000.0; + break; + case 0x09: + svga->clock = (cpuclock * (double) (1ull << 32)) / 32000000.0; + break; + case 0x0A: + svga->clock = (cpuclock * (double) (1ull << 32)) / 37500000.0; + break; + case 0x0B: + svga->clock = (cpuclock * (double) (1ull << 32)) / 39000000.0; + break; + case 0x0C: + svga->clock = (cpuclock * (double) (1ull << 32)) / 50350000.0; + break; + case 0x0D: + svga->clock = (cpuclock * (double) (1ull << 32)) / 56644000.0; + break; + case 0x0E: + svga->clock = (cpuclock * (double) (1ull << 32)) / 75000000.0; + break; + case 0x0F: + svga->clock = (cpuclock * (double) (1ull << 32)) / 65000000.0; + break; + default: + break; + } - if (ati28800->regs[0xb8] & 0x40) - svga->clock *= 2; + if (ati28800->regs[0xb8] & 0x40) + svga->clock *= 2; - if (ati28800->regs[0xa7] & 0x80) - svga->clock *= 3; + if (ati28800->regs[0xa7] & 0x80) + svga->clock *= 3; - if (ati28800->regs[0xb6] & 0x10) { - svga->hdisp <<= 1; - svga->htotal <<= 1; - svga->rowoffset <<= 1; - svga->gdcreg[5] &= ~0x40; - } + if (ati28800->regs[0xb6] & 0x10) { + svga->hdisp <<= 1; + svga->htotal <<= 1; + svga->rowoffset <<= 1; + svga->gdcreg[5] &= ~0x40; + } - if (ati28800->regs[0xb0] & 0x20) { - svga->gdcreg[5] |= 0x40; - } + if (ati28800->regs[0xb0] & 0x20) { + svga->gdcreg[5] |= 0x40; + } - if (!svga->scrblank && svga->attr_palette_enable) { - if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { - switch (svga->gdcreg[5] & 0x60) { - case 0x00: - if (svga->seqregs[1] & 8) /*Low res (320)*/ - svga->render = svga_render_4bpp_lowres; - else - svga->render = svga_render_4bpp_highres; - break; - case 0x20: /*4 colours*/ - if (svga->seqregs[1] & 8) /*Low res (320)*/ - svga->render = svga_render_2bpp_lowres; - else - svga->render = svga_render_2bpp_highres; - break; - case 0x40: case 0x60: /*256+ colours*/ - switch (svga->bpp) { - case 8: - svga->map8 = svga->pallook; - if (svga->lowres) - svga->render = svga_render_8bpp_lowres; - else { - svga->render = svga_render_8bpp_highres; - svga->rowoffset <<= 1; - svga->ma_latch <<= 1; - } - break; - case 15: - if (svga->lowres) - svga->render = svga_render_15bpp_lowres; - else { - svga->render = svga_render_15bpp_highres; - svga->hdisp >>= 1; - svga->rowoffset <<= 1; - svga->ma_latch <<= 1; - } - break; - } - break; - } - } - } + if (!svga->scrblank && svga->attr_palette_enable) { + if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { + switch (svga->gdcreg[5] & 0x60) { + case 0x00: + if (svga->seqregs[1] & 8) /*Low res (320)*/ + svga->render = svga_render_4bpp_lowres; + else + svga->render = svga_render_4bpp_highres; + break; + case 0x20: /*4 colours*/ + if (svga->seqregs[1] & 8) /*Low res (320)*/ + svga->render = svga_render_2bpp_lowres; + else + svga->render = svga_render_2bpp_highres; + break; + case 0x40: + case 0x60: /*256+ colours*/ + switch (svga->bpp) { + case 8: + svga->map8 = svga->pallook; + if (svga->lowres) + svga->render = svga_render_8bpp_lowres; + else { + svga->render = svga_render_8bpp_highres; + svga->rowoffset <<= 1; + svga->ma_latch <<= 1; + } + break; + case 15: + if (svga->lowres) + svga->render = svga_render_15bpp_lowres; + else { + svga->render = svga_render_15bpp_highres; + svga->hdisp >>= 1; + svga->rowoffset <<= 1; + svga->ma_latch <<= 1; + } + break; + } + break; + } + } + } } - static void ati28800k_recalctimings(svga_t *svga) { @@ -499,7 +522,7 @@ ati28800k_recalctimings(svga_t *svga) ati28800_recalctimings(svga); if (svga->render == svga_render_text_80 && ati28800->ksc5601_mode_enabled) - svga->render = svga_render_text_80_ksc5601; + svga->render = svga_render_text_80_ksc5601; } void * @@ -508,57 +531,57 @@ ati28800k_init(const device_t *info) ati28800_t *ati28800 = (ati28800_t *) malloc(sizeof(ati28800_t)); memset(ati28800, 0, sizeof(ati28800_t)); - ati28800->type_korean = info->local; + ati28800->type_korean = info->local; if (ati28800->type_korean == 0) { - ati28800->memory = device_get_config_int("memory"); - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_ati28800); + ati28800->memory = device_get_config_int("memory"); + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_ati28800); } else { - ati28800->memory = 512; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_ati28800_spc); + ati28800->memory = 512; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_ati28800_spc); } - ati28800->port_03dd_val = 0; - ati28800->get_korean_font_base = 0; - ati28800->get_korean_font_index = 0; - ati28800->get_korean_font_enabled = 0; - ati28800->get_korean_font_kind = 0; + ati28800->port_03dd_val = 0; + ati28800->get_korean_font_base = 0; + ati28800->get_korean_font_index = 0; + ati28800->get_korean_font_enabled = 0; + ati28800->get_korean_font_kind = 0; ati28800->in_get_korean_font_kind_set = 0; - ati28800->ksc5601_mode_enabled = 0; + ati28800->ksc5601_mode_enabled = 0; - switch(ati28800->type_korean) { - case 0: - default: - rom_init(&ati28800->bios_rom, BIOS_ATIKOR_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - loadfont(FONT_ATIKOR_PATH, 6); - break; - case 1: - rom_init_interleaved(&ati28800->bios_rom, BIOS_ATIKOR_4620P_PATH_L, BIOS_ATIKOR_4620P_PATH_H, 0xc0000, - 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - loadfont(FONT_ATIKOR_4620P_PATH, 6); - break; - case 2: - rom_init(&ati28800->bios_rom, BIOS_ATIKOR_6033P_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - loadfont(FONT_ATIKOR_6033P_PATH, 6); - break; + switch (ati28800->type_korean) { + case 0: + default: + rom_init(&ati28800->bios_rom, BIOS_ATIKOR_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + loadfont(FONT_ATIKOR_PATH, 6); + break; + case 1: + rom_init_interleaved(&ati28800->bios_rom, BIOS_ATIKOR_4620P_PATH_L, BIOS_ATIKOR_4620P_PATH_H, 0xc0000, + 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + loadfont(FONT_ATIKOR_4620P_PATH, 6); + break; + case 2: + rom_init(&ati28800->bios_rom, BIOS_ATIKOR_6033P_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + loadfont(FONT_ATIKOR_6033P_PATH, 6); + break; } svga_init(info, &ati28800->svga, ati28800, ati28800->memory << 10, /*Memory size, default 512KB*/ - ati28800k_recalctimings, - ati28800k_in, ati28800k_out, - NULL, - NULL); + ati28800k_recalctimings, + ati28800k_in, ati28800k_out, + NULL, + NULL); io_sethandler(0x01ce, 0x0002, ati28800k_in, NULL, NULL, ati28800k_out, NULL, NULL, ati28800); io_sethandler(0x03c0, 0x0020, ati28800k_in, NULL, NULL, ati28800k_out, NULL, NULL, ati28800); - ati28800->svga.miscout = 1; - ati28800->svga.bpp = 8; - ati28800->svga.packed_chain4 = 1; - ati28800->svga.ksc5601_sbyte_mask = 0; - ati28800->svga.ksc5601_udc_area_msb[0] = 0xC9; - ati28800->svga.ksc5601_udc_area_msb[1] = 0xFE; - ati28800->svga.ksc5601_swap_mode = 0; + ati28800->svga.miscout = 1; + ati28800->svga.bpp = 8; + ati28800->svga.packed_chain4 = 1; + ati28800->svga.ksc5601_sbyte_mask = 0; + ati28800->svga.ksc5601_udc_area_msb[0] = 0xC9; + ati28800->svga.ksc5601_udc_area_msb[1] = 0xFE; + ati28800->svga.ksc5601_swap_mode = 0; ati28800->svga.ksc5601_english_font_type = 0; ati_eeprom_load(&ati28800->eeprom, "atikorvga.nvr", 0); @@ -566,7 +589,6 @@ ati28800k_init(const device_t *info) return ati28800; } - static void * ati28800_init(const device_t *info) { @@ -578,129 +600,122 @@ ati28800_init(const device_t *info) ati28800->memory = device_get_config_int("memory"); - ati28800->type = info->local; + ati28800->type = info->local; - switch(ati28800->type) { - case VGAWONDERXL: - ati28800->id = 5; - rom_init(&ati28800->bios_rom, - BIOS_VGAXL_ROM_PATH, - 0xc0000, 0x8000, 0x7fff, - 0, MEM_MAPPING_EXTERNAL); - ati28800->svga.ramdac = device_add(&sc11486_ramdac_device); - break; + switch (ati28800->type) { + case VGAWONDERXL: + ati28800->id = 5; + rom_init(&ati28800->bios_rom, + BIOS_VGAXL_ROM_PATH, + 0xc0000, 0x8000, 0x7fff, + 0, MEM_MAPPING_EXTERNAL); + ati28800->svga.ramdac = device_add(&sc11486_ramdac_device); + break; #if defined(DEV_BRANCH) && defined(USE_XL24) - case VGAWONDERXL24: - ati28800->id = 6; - rom_init_interleaved(&ati28800->bios_rom, - BIOS_XL24_EVEN_PATH, - BIOS_XL24_ODD_PATH, - 0xc0000, 0x10000, 0xffff, - 0, MEM_MAPPING_EXTERNAL); - break; + case VGAWONDERXL24: + ati28800->id = 6; + rom_init_interleaved(&ati28800->bios_rom, + BIOS_XL24_EVEN_PATH, + BIOS_XL24_ODD_PATH, + 0xc0000, 0x10000, 0xffff, + 0, MEM_MAPPING_EXTERNAL); + break; #endif - default: - ati28800->id = 5; - rom_init(&ati28800->bios_rom, - BIOS_ROM_PATH, - 0xc0000, 0x8000, 0x7fff, - 0, MEM_MAPPING_EXTERNAL); - break; + default: + ati28800->id = 5; + rom_init(&ati28800->bios_rom, + BIOS_ROM_PATH, + 0xc0000, 0x8000, 0x7fff, + 0, MEM_MAPPING_EXTERNAL); + break; } svga_init(info, &ati28800->svga, ati28800, ati28800->memory << 10, /*default: 512kb*/ - ati28800_recalctimings, - ati28800_in, ati28800_out, - NULL, - NULL); + ati28800_recalctimings, + ati28800_in, ati28800_out, + NULL, + NULL); io_sethandler(0x01ce, 2, - ati28800_in, NULL, NULL, - ati28800_out, NULL, NULL, ati28800); + ati28800_in, NULL, NULL, + ati28800_out, NULL, NULL, ati28800); io_sethandler(0x03c0, 32, - ati28800_in, NULL, NULL, - ati28800_out, NULL, NULL, ati28800); + ati28800_in, NULL, NULL, + ati28800_out, NULL, NULL, ati28800); - ati28800->svga.miscout = 1; - ati28800->svga.bpp = 8; - ati28800->svga.packed_chain4 = 1; + ati28800->svga.miscout = 1; + ati28800->svga.bpp = 8; + ati28800->svga.packed_chain4 = 1; switch (ati28800->type) { - case VGAWONDERXL: - ati_eeprom_load(&ati28800->eeprom, "ati28800xl.nvr", 0); - break; + case VGAWONDERXL: + ati_eeprom_load(&ati28800->eeprom, "ati28800xl.nvr", 0); + break; #if defined(DEV_BRANCH) && defined(USE_XL24) - case VGAWONDERXL24: - ati_eeprom_load(&ati28800->eeprom, "ati28800xl24.nvr", 0); - break; + case VGAWONDERXL24: + ati_eeprom_load(&ati28800->eeprom, "ati28800xl24.nvr", 0); + break; #endif - default: - ati_eeprom_load(&ati28800->eeprom, "ati28800.nvr", 0); - break; + default: + ati_eeprom_load(&ati28800->eeprom, "ati28800.nvr", 0); + break; } - return(ati28800); + return (ati28800); } - static int ati28800_available(void) { - return(rom_present(BIOS_ROM_PATH)); + return (rom_present(BIOS_ROM_PATH)); } - static int ati28800k_available(void) { return ((rom_present(BIOS_ATIKOR_PATH) && rom_present(FONT_ATIKOR_PATH))); } - static int compaq_ati28800_available(void) { - return((rom_present(BIOS_VGAXL_ROM_PATH))); + return ((rom_present(BIOS_VGAXL_ROM_PATH))); } - #if defined(DEV_BRANCH) && defined(USE_XL24) static int ati28800_wonderxl24_available(void) { - return((rom_present(BIOS_XL24_EVEN_PATH) && rom_present(BIOS_XL24_ODD_PATH))); + return ((rom_present(BIOS_XL24_EVEN_PATH) && rom_present(BIOS_XL24_ODD_PATH))); } #endif - static void ati28800_close(void *priv) { - ati28800_t *ati28800 = (ati28800_t *)priv; + ati28800_t *ati28800 = (ati28800_t *) priv; svga_close(&ati28800->svga); free(ati28800); } - static void ati28800_speed_changed(void *p) { - ati28800_t *ati28800 = (ati28800_t *)p; + ati28800_t *ati28800 = (ati28800_t *) p; - svga_recalctimings(&ati28800->svga); + svga_recalctimings(&ati28800->svga); } - static void ati28800_force_redraw(void *priv) { - ati28800_t *ati28800 = (ati28800_t *)priv; + ati28800_t *ati28800 = (ati28800_t *) priv; ati28800->svga.fullchange = changeframecount; } @@ -768,87 +783,87 @@ static const device_config_t ati28800_wonderxl_config[] = { // clang-format on const device_t ati28800_device = { - .name = "ATI 28800-5 (ATI VGA Charger)", + .name = "ATI 28800-5 (ATI VGA Charger)", .internal_name = "ati28800", - .flags = DEVICE_ISA, - .local = 0, - .init = ati28800_init, - .close = ati28800_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = ati28800_init, + .close = ati28800_close, + .reset = NULL, { .available = ati28800_available }, .speed_changed = ati28800_speed_changed, - .force_redraw = ati28800_force_redraw, - .config = ati28800_config + .force_redraw = ati28800_force_redraw, + .config = ati28800_config }; const device_t ati28800k_device = { - .name = "ATI Korean VGA", + .name = "ATI Korean VGA", .internal_name = "ati28800k", - .flags = DEVICE_ISA, - .local = 0, - .init = ati28800k_init, - .close = ati28800_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = ati28800k_init, + .close = ati28800_close, + .reset = NULL, { .available = ati28800k_available }, .speed_changed = ati28800_speed_changed, - .force_redraw = ati28800_force_redraw, - .config = ati28800_config + .force_redraw = ati28800_force_redraw, + .config = ati28800_config }; const device_t ati28800k_spc4620p_device = { - .name = "ATI Korean VGA On-Board SPC-4620P", + .name = "ATI Korean VGA On-Board SPC-4620P", .internal_name = "ati28800k_spc4620p", - .flags = DEVICE_ISA, - .local = 1, - .init = ati28800k_init, - .close = ati28800_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 1, + .init = ati28800k_init, + .close = ati28800_close, + .reset = NULL, { .available = NULL }, .speed_changed = ati28800_speed_changed, - .force_redraw = ati28800_force_redraw, - .config = NULL + .force_redraw = ati28800_force_redraw, + .config = NULL }; const device_t ati28800k_spc6033p_device = { - .name = "ATI Korean VGA On-Board SPC-6033P", + .name = "ATI Korean VGA On-Board SPC-6033P", .internal_name = "ati28800k_spc6033p", - .flags = DEVICE_ISA, - .local = 2, - .init = ati28800k_init, - .close = ati28800_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 2, + .init = ati28800k_init, + .close = ati28800_close, + .reset = NULL, { .available = NULL }, .speed_changed = ati28800_speed_changed, - .force_redraw = ati28800_force_redraw, - .config = NULL + .force_redraw = ati28800_force_redraw, + .config = NULL }; const device_t compaq_ati28800_device = { - .name = "ATI 28800-5 (ATI VGA Wonder XL)", + .name = "ATI 28800-5 (ATI VGA Wonder XL)", .internal_name = "compaq_ati28800", - .flags = DEVICE_ISA, - .local = VGAWONDERXL, - .init = ati28800_init, - .close = ati28800_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = VGAWONDERXL, + .init = ati28800_init, + .close = ati28800_close, + .reset = NULL, { .available = compaq_ati28800_available }, .speed_changed = ati28800_speed_changed, - .force_redraw = ati28800_force_redraw, - .config = ati28800_config + .force_redraw = ati28800_force_redraw, + .config = ati28800_config }; #if defined(DEV_BRANCH) && defined(USE_XL24) const device_t ati28800_wonderxl24_device = { - .name = "ATI-28800 (VGA Wonder XL24)", + .name = "ATI-28800 (VGA Wonder XL24)", .internal_name = "ati28800w", - .flags = DEVICE_ISA, - .local = VGAWONDERXL24, - .init = ati28800_init, - .close = ati28800_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = VGAWONDERXL24, + .init = ati28800_init, + .close = ati28800_close, + .reset = NULL, { .available = ati28800_wonderxl24_available }, .speed_changed = ati28800_speed_changed, - .force_redraw = ati28800_force_redraw, - .config = ati28800_wonderxl_config + .force_redraw = ati28800_force_redraw, + .config = ati28800_wonderxl_config }; #endif diff --git a/src/video/vid_ati68860_ramdac.c b/src/video/vid_ati68860_ramdac.c index 46967ce3d..1bf74067a 100644 --- a/src/video/vid_ati68860_ramdac.c +++ b/src/video/vid_ati68860_ramdac.c @@ -49,111 +49,112 @@ #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> - -typedef struct ati68860_ramdac_t -{ +typedef struct ati68860_ramdac_t { uint8_t regs[16]; void (*render)(struct svga_t *svga); - int dac_addr, dac_pos; - int dac_r, dac_g; - PALETTE pal; + int dac_addr, dac_pos; + int dac_r, dac_g; + PALETTE pal; uint32_t pallook[2]; int ramdac_type; } ati68860_ramdac_t; - void ati68860_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga) { ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) p; switch (addr) { - case 0: - svga_out(0x3c8, val, svga); - break; - case 1: - svga_out(0x3c9, val, svga); - break; - case 2: - svga_out(0x3c6, val, svga); - break; - case 3: - svga_out(0x3c7, val, svga); - break; - default: - ramdac->regs[addr & 0xf] = val; - switch (addr & 0xf) { - case 0x4: - ramdac->dac_addr = val; - ramdac->dac_pos = 0; - break; - case 0x5: - switch (ramdac->dac_pos) { - case 0: - ramdac->dac_r = val; - ramdac->dac_pos++; - break; - case 1: - ramdac->dac_g = val; - ramdac->dac_pos++; - break; - case 2: - if (ramdac->dac_addr > 1) - break; - ramdac->pal[ramdac->dac_addr].r = ramdac->dac_r; - ramdac->pal[ramdac->dac_addr].g = ramdac->dac_g; - ramdac->pal[ramdac->dac_addr].b = val; - if (ramdac->ramdac_type == RAMDAC_8BIT) - ramdac->pallook[ramdac->dac_addr] = makecol32(ramdac->pal[ramdac->dac_addr].r, - ramdac->pal[ramdac->dac_addr].g, - ramdac->pal[ramdac->dac_addr].b); - else - ramdac->pallook[ramdac->dac_addr] = makecol32(video_6to8[ramdac->pal[ramdac->dac_addr].r & 0x3f], - video_6to8[ramdac->pal[ramdac->dac_addr].g & 0x3f], - video_6to8[ramdac->pal[ramdac->dac_addr].b & 0x3f]); - ramdac->dac_pos = 0; - ramdac->dac_addr = (ramdac->dac_addr + 1) & 255; - break; - } - break; - case 0xb: - switch (val) { - case 0x82: - ramdac->render = svga_render_4bpp_highres; - break; - case 0x83: - ramdac->render = svga_render_8bpp_highres; - break; - case 0xa0: case 0xb0: - ramdac->render = svga_render_15bpp_highres; - break; - case 0xa1: case 0xb1: - ramdac->render = svga_render_16bpp_highres; - break; - case 0xc0: case 0xd0: - ramdac->render = svga_render_24bpp_highres; - break; - case 0xe2: case 0xf7: - ramdac->render = svga_render_32bpp_highres; - break; - case 0xe3: - ramdac->render = svga_render_ABGR8888_highres; - break; - case 0xf2: - ramdac->render = svga_render_RGBA8888_highres; - break; - default: - ramdac->render = svga_render_8bpp_highres; - break; - } - break; - case 0xc: - svga_set_ramdac_type(svga, (val & 1) ? RAMDAC_6BIT : RAMDAC_8BIT); - break; - } - break; + case 0: + svga_out(0x3c8, val, svga); + break; + case 1: + svga_out(0x3c9, val, svga); + break; + case 2: + svga_out(0x3c6, val, svga); + break; + case 3: + svga_out(0x3c7, val, svga); + break; + default: + ramdac->regs[addr & 0xf] = val; + switch (addr & 0xf) { + case 0x4: + ramdac->dac_addr = val; + ramdac->dac_pos = 0; + break; + case 0x5: + switch (ramdac->dac_pos) { + case 0: + ramdac->dac_r = val; + ramdac->dac_pos++; + break; + case 1: + ramdac->dac_g = val; + ramdac->dac_pos++; + break; + case 2: + if (ramdac->dac_addr > 1) + break; + ramdac->pal[ramdac->dac_addr].r = ramdac->dac_r; + ramdac->pal[ramdac->dac_addr].g = ramdac->dac_g; + ramdac->pal[ramdac->dac_addr].b = val; + if (ramdac->ramdac_type == RAMDAC_8BIT) + ramdac->pallook[ramdac->dac_addr] = makecol32(ramdac->pal[ramdac->dac_addr].r, + ramdac->pal[ramdac->dac_addr].g, + ramdac->pal[ramdac->dac_addr].b); + else + ramdac->pallook[ramdac->dac_addr] = makecol32(video_6to8[ramdac->pal[ramdac->dac_addr].r & 0x3f], + video_6to8[ramdac->pal[ramdac->dac_addr].g & 0x3f], + video_6to8[ramdac->pal[ramdac->dac_addr].b & 0x3f]); + ramdac->dac_pos = 0; + ramdac->dac_addr = (ramdac->dac_addr + 1) & 255; + break; + } + break; + case 0xb: + switch (val) { + case 0x82: + ramdac->render = svga_render_4bpp_highres; + break; + case 0x83: + ramdac->render = svga_render_8bpp_highres; + break; + case 0xa0: + case 0xb0: + ramdac->render = svga_render_15bpp_highres; + break; + case 0xa1: + case 0xb1: + ramdac->render = svga_render_16bpp_highres; + break; + case 0xc0: + case 0xd0: + ramdac->render = svga_render_24bpp_highres; + break; + case 0xe2: + case 0xf7: + ramdac->render = svga_render_32bpp_highres; + break; + case 0xe3: + ramdac->render = svga_render_ABGR8888_highres; + break; + case 0xf2: + ramdac->render = svga_render_RGBA8888_highres; + break; + default: + ramdac->render = svga_render_8bpp_highres; + break; + } + break; + case 0xc: + svga_set_ramdac_type(svga, (val & 1) ? RAMDAC_6BIT : RAMDAC_8BIT); + break; + } + break; } } @@ -161,61 +162,61 @@ uint8_t ati68860_ramdac_in(uint16_t addr, void *p, svga_t *svga) { ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) p; - uint8_t temp = 0; + uint8_t temp = 0; switch (addr) { - case 0: - temp = svga_in(0x3c8, svga); - break; - case 1: - temp = svga_in(0x3c9, svga); - break; - case 2: - temp = svga_in(0x3c6, svga); - break; - case 3: - temp = svga_in(0x3c7, svga); - break; - case 4: case 8: - temp = 2; - break; - case 6: case 0xa: - temp = 0x1d; - break; - case 0xf: - temp = 0xd0; - break; + case 0: + temp = svga_in(0x3c8, svga); + break; + case 1: + temp = svga_in(0x3c9, svga); + break; + case 2: + temp = svga_in(0x3c6, svga); + break; + case 3: + temp = svga_in(0x3c7, svga); + break; + case 4: + case 8: + temp = 2; + break; + case 6: + case 0xa: + temp = 0x1d; + break; + case 0xf: + temp = 0xd0; + break; - default: - temp = ramdac->regs[addr & 0xf]; - break; + default: + temp = ramdac->regs[addr & 0xf]; + break; } return temp; } - void ati68860_set_ramdac_type(void *p, int type) { ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) p; - int c; + int c; if (ramdac->ramdac_type != type) { - ramdac->ramdac_type = type; + ramdac->ramdac_type = type; - for (c = 0; c < 2; c++) { - if (ramdac->ramdac_type == RAMDAC_8BIT) - ramdac->pallook[c] = makecol32(ramdac->pal[c].r, ramdac->pal[c].g, - ramdac->pal[c].b); - else - ramdac->pallook[c] = makecol32(video_6to8[ramdac->pal[c].r & 0x3f], video_6to8[ramdac->pal[c].g & 0x3f], - video_6to8[ramdac->pal[c].b & 0x3f]); - } + for (c = 0; c < 2; c++) { + if (ramdac->ramdac_type == RAMDAC_8BIT) + ramdac->pallook[c] = makecol32(ramdac->pal[c].r, ramdac->pal[c].g, + ramdac->pal[c].b); + else + ramdac->pallook[c] = makecol32(video_6to8[ramdac->pal[c].r & 0x3f], video_6to8[ramdac->pal[c].g & 0x3f], + video_6to8[ramdac->pal[c].b & 0x3f]); + } } } - static void * ati68860_ramdac_init(const device_t *info) { @@ -227,7 +228,6 @@ ati68860_ramdac_init(const device_t *info) return ramdac; } - void ati68860_ramdac_set_render(void *p, svga_t *svga) { @@ -236,7 +236,6 @@ ati68860_ramdac_set_render(void *p, svga_t *svga) svga->render = ramdac->render; } - void ati68860_ramdac_set_pallook(void *p, int i, uint32_t col) { @@ -245,57 +244,63 @@ ati68860_ramdac_set_pallook(void *p, int i, uint32_t col) ramdac->pallook[i] = col; } - void ati68860_hwcursor_draw(svga_t *svga, int displine) { ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) svga->ramdac; - int x, offset; - uint8_t dat; - uint32_t col0 = ramdac->pallook[0]; - uint32_t col1 = ramdac->pallook[1]; + int x, offset; + uint8_t dat; + uint32_t col0 = ramdac->pallook[0]; + uint32_t col1 = ramdac->pallook[1]; offset = svga->dac_hwcursor_latch.xoff; for (x = 0; x < 64 - svga->dac_hwcursor_latch.xoff; x += 4) { - dat = svga->vram[svga->dac_hwcursor_latch.addr + (offset >> 2)]; - if (!(dat & 2)) buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add] = (dat & 1) ? col1 : col0; - else if ((dat & 3) == 3) buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add] ^= 0xFFFFFF; - dat >>= 2; - if (!(dat & 2)) buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add + 1] = (dat & 1) ? col1 : col0; - else if ((dat & 3) == 3) buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add + 1] ^= 0xFFFFFF; - dat >>= 2; - if (!(dat & 2)) buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add + 2] = (dat & 1) ? col1 : col0; - else if ((dat & 3) == 3) buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add + 2] ^= 0xFFFFFF; - dat >>= 2; - if (!(dat & 2)) buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add + 3] = (dat & 1) ? col1 : col0; - else if ((dat & 3) == 3) buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add + 3] ^= 0xFFFFFF; - dat >>= 2; - offset += 4; + dat = svga->vram[svga->dac_hwcursor_latch.addr + (offset >> 2)]; + if (!(dat & 2)) + buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add] = (dat & 1) ? col1 : col0; + else if ((dat & 3) == 3) + buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add] ^= 0xFFFFFF; + dat >>= 2; + if (!(dat & 2)) + buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add + 1] = (dat & 1) ? col1 : col0; + else if ((dat & 3) == 3) + buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add + 1] ^= 0xFFFFFF; + dat >>= 2; + if (!(dat & 2)) + buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add + 2] = (dat & 1) ? col1 : col0; + else if ((dat & 3) == 3) + buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add + 2] ^= 0xFFFFFF; + dat >>= 2; + if (!(dat & 2)) + buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add + 3] = (dat & 1) ? col1 : col0; + else if ((dat & 3) == 3) + buffer32->line[displine][svga->dac_hwcursor_latch.x + x + svga->x_add + 3] ^= 0xFFFFFF; + dat >>= 2; + offset += 4; } svga->dac_hwcursor_latch.addr += 16; } - static void ati68860_ramdac_close(void *priv) { ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) priv; if (ramdac) - free(ramdac); + free(ramdac); } const device_t ati68860_ramdac_device = { - .name = "ATI-68860 RAMDAC", + .name = "ATI-68860 RAMDAC", .internal_name = "ati68860_ramdac", - .flags = 0, - .local = 0, - .init = ati68860_ramdac_init, - .close = ati68860_ramdac_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = ati68860_ramdac_init, + .close = ati68860_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_ati_eeprom.c b/src/video/vid_ati_eeprom.c index 561f6229b..15696be63 100644 --- a/src/video/vid_ati_eeprom.c +++ b/src/video/vid_ati_eeprom.c @@ -27,184 +27,168 @@ #include <86box/nvr.h> #include <86box/vid_ati_eeprom.h> - -void ati_eeprom_load(ati_eeprom_t *eeprom, char *fn, int type) +void +ati_eeprom_load(ati_eeprom_t *eeprom, char *fn, int type) { - FILE *f; - int size; - eeprom->type = type; - strncpy(eeprom->fn, fn, sizeof(eeprom->fn) - 1); - f = nvr_fopen(eeprom->fn, "rb"); - size = eeprom->type ? 512 : 128; - if (!f) { - memset(eeprom->data, 0xff, size); - return; - } - if (fread(eeprom->data, 1, size, f) != size) - memset(eeprom->data, 0, size); - fclose(f); + FILE *f; + int size; + eeprom->type = type; + strncpy(eeprom->fn, fn, sizeof(eeprom->fn) - 1); + f = nvr_fopen(eeprom->fn, "rb"); + size = eeprom->type ? 512 : 128; + if (!f) { + memset(eeprom->data, 0xff, size); + return; + } + if (fread(eeprom->data, 1, size, f) != size) + memset(eeprom->data, 0, size); + fclose(f); } -void ati_eeprom_save(ati_eeprom_t *eeprom) +void +ati_eeprom_save(ati_eeprom_t *eeprom) { - FILE *f = nvr_fopen(eeprom->fn, "wb"); - if (!f) return; - fwrite(eeprom->data, 1, eeprom->type ? 512 : 128, f); - fclose(f); + FILE *f = nvr_fopen(eeprom->fn, "wb"); + if (!f) + return; + fwrite(eeprom->data, 1, eeprom->type ? 512 : 128, f); + fclose(f); } -void ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat) +void +ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat) { - int c; - if (!ena) - { - eeprom->out = 1; - } - if (clk && !eeprom->oldclk) - { - if (ena && !eeprom->oldena) - { - eeprom->state = EEPROM_WAIT; - eeprom->opcode = 0; - eeprom->count = 3; - eeprom->out = 1; - } - else if (ena) - { - switch (eeprom->state) - { - case EEPROM_WAIT: - if (!dat) + int c; + if (!ena) { + eeprom->out = 1; + } + if (clk && !eeprom->oldclk) { + if (ena && !eeprom->oldena) { + eeprom->state = EEPROM_WAIT; + eeprom->opcode = 0; + eeprom->count = 3; + eeprom->out = 1; + } else if (ena) { + switch (eeprom->state) { + case EEPROM_WAIT: + if (!dat) + break; + eeprom->state = EEPROM_OPCODE; + /* fall through */ + case EEPROM_OPCODE: + eeprom->opcode = (eeprom->opcode << 1) | (dat ? 1 : 0); + eeprom->count--; + if (!eeprom->count) { + switch (eeprom->opcode) { + case EEPROM_OP_WRITE: + eeprom->count = eeprom->type ? 24 : 22; + eeprom->state = EEPROM_INPUT; + eeprom->dat = 0; + break; + case EEPROM_OP_READ: + eeprom->count = eeprom->type ? 8 : 6; + eeprom->state = EEPROM_INPUT; + eeprom->dat = 0; + break; + case EEPROM_OP_EW: + eeprom->count = 2; + eeprom->state = EEPROM_INPUT; + eeprom->dat = 0; + break; + case EEPROM_OP_ERASE: + eeprom->count = eeprom->type ? 8 : 6; + eeprom->state = EEPROM_INPUT; + eeprom->dat = 0; + break; + } + } + break; + + case EEPROM_INPUT: + eeprom->dat = (eeprom->dat << 1) | (dat ? 1 : 0); + eeprom->count--; + if (!eeprom->count) { + switch (eeprom->opcode) { + case EEPROM_OP_WRITE: + if (!eeprom->wp) { + eeprom->data[(eeprom->dat >> 16) & (eeprom->type ? 255 : 63)] = eeprom->dat & 0xffff; + ati_eeprom_save(eeprom); + } + eeprom->state = EEPROM_IDLE; + eeprom->out = 1; + break; + + case EEPROM_OP_READ: + eeprom->count = 17; + eeprom->state = EEPROM_OUTPUT; + eeprom->dat = eeprom->data[eeprom->dat]; + break; + case EEPROM_OP_EW: + switch (eeprom->dat) { + case EEPROM_OP_EWDS: + eeprom->wp = 1; break; - eeprom->state = EEPROM_OPCODE; - /* fall through */ - case EEPROM_OPCODE: - eeprom->opcode = (eeprom->opcode << 1) | (dat ? 1 : 0); - eeprom->count--; - if (!eeprom->count) - { - switch (eeprom->opcode) - { - case EEPROM_OP_WRITE: - eeprom->count = eeprom->type ? 24 : 22; - eeprom->state = EEPROM_INPUT; - eeprom->dat = 0; - break; - case EEPROM_OP_READ: - eeprom->count = eeprom->type ? 8 : 6; - eeprom->state = EEPROM_INPUT; - eeprom->dat = 0; - break; - case EEPROM_OP_EW: - eeprom->count = 2; - eeprom->state = EEPROM_INPUT; - eeprom->dat = 0; - break; - case EEPROM_OP_ERASE: - eeprom->count = eeprom->type ? 8 : 6; - eeprom->state = EEPROM_INPUT; - eeprom->dat = 0; - break; + case EEPROM_OP_WRAL: + eeprom->opcode = EEPROM_OP_WRALMAIN; + eeprom->count = 20; + break; + case EEPROM_OP_ERAL: + if (!eeprom->wp) { + memset(eeprom->data, 0xff, 128); + ati_eeprom_save(eeprom); } + break; + case EEPROM_OP_EWEN: + eeprom->wp = 0; + break; } + eeprom->state = EEPROM_IDLE; + eeprom->out = 1; break; - case EEPROM_INPUT: - eeprom->dat = (eeprom->dat << 1) | (dat ? 1 : 0); - eeprom->count--; - if (!eeprom->count) - { - switch (eeprom->opcode) - { - case EEPROM_OP_WRITE: - if (!eeprom->wp) - { - eeprom->data[(eeprom->dat >> 16) & (eeprom->type ? 255 : 63)] = eeprom->dat & 0xffff; - ati_eeprom_save(eeprom); - } - eeprom->state = EEPROM_IDLE; - eeprom->out = 1; - break; - - case EEPROM_OP_READ: - eeprom->count = 17; - eeprom->state = EEPROM_OUTPUT; - eeprom->dat = eeprom->data[eeprom->dat]; - break; - case EEPROM_OP_EW: - switch (eeprom->dat) - { - case EEPROM_OP_EWDS: - eeprom->wp = 1; - break; - case EEPROM_OP_WRAL: - eeprom->opcode = EEPROM_OP_WRALMAIN; - eeprom->count = 20; - break; - case EEPROM_OP_ERAL: - if (!eeprom->wp) - { - memset(eeprom->data, 0xff, 128); - ati_eeprom_save(eeprom); - } - break; - case EEPROM_OP_EWEN: - eeprom->wp = 0; - break; - } - eeprom->state = EEPROM_IDLE; - eeprom->out = 1; - break; - - case EEPROM_OP_ERASE: - if (!eeprom->wp) - { - eeprom->data[eeprom->dat] = 0xffff; - ati_eeprom_save(eeprom); - } - eeprom->state = EEPROM_IDLE; - eeprom->out = 1; - break; - - case EEPROM_OP_WRALMAIN: - if (!eeprom->wp) - { - for (c = 0; c < 256; c++) - eeprom->data[c] = eeprom->dat; - ati_eeprom_save(eeprom); - } - eeprom->state = EEPROM_IDLE; - eeprom->out = 1; - break; - } + case EEPROM_OP_ERASE: + if (!eeprom->wp) { + eeprom->data[eeprom->dat] = 0xffff; + ati_eeprom_save(eeprom); } + eeprom->state = EEPROM_IDLE; + eeprom->out = 1; + break; + + case EEPROM_OP_WRALMAIN: + if (!eeprom->wp) { + for (c = 0; c < 256; c++) + eeprom->data[c] = eeprom->dat; + ati_eeprom_save(eeprom); + } + eeprom->state = EEPROM_IDLE; + eeprom->out = 1; break; } - } - eeprom->oldena = ena; + } + break; + } } - else if (!clk && eeprom->oldclk) - { - if (ena) - { - switch (eeprom->state) - { - case EEPROM_OUTPUT: - eeprom->out = (eeprom->dat & 0x10000) ? 1 : 0; - eeprom->dat <<= 1; - eeprom->count--; - if (!eeprom->count) - { - eeprom->state = EEPROM_IDLE; - } - break; - } - } + eeprom->oldena = ena; + } else if (!clk && eeprom->oldclk) { + if (ena) { + switch (eeprom->state) { + case EEPROM_OUTPUT: + eeprom->out = (eeprom->dat & 0x10000) ? 1 : 0; + eeprom->dat <<= 1; + eeprom->count--; + if (!eeprom->count) { + eeprom->state = EEPROM_IDLE; + } + break; + } } - eeprom->oldclk = clk; + } + eeprom->oldclk = clk; } -int ati_eeprom_read(ati_eeprom_t *eeprom) +int +ati_eeprom_read(ati_eeprom_t *eeprom) { - return eeprom->out; + return eeprom->out; } diff --git a/src/video/vid_ati_mach64.c b/src/video/vid_ati_mach64.c index 7f4e2c7c9..46663af51 100644 --- a/src/video/vid_ati_mach64.c +++ b/src/video/vid_ati_mach64.c @@ -40,311 +40,299 @@ #include <86box/vid_ati_eeprom.h> #ifdef CLAMP -#undef CLAMP +# undef CLAMP #endif -#define BIOS_ROM_PATH "roms/video/mach64/bios.bin" -#define BIOS_ISA_ROM_PATH "roms/video/mach64/M64-1994.VBI" -#define BIOS_VLB_ROM_PATH "roms/video/mach64/mach64_vlb_vram.bin" -#define BIOS_ROMVT2_PATH "roms/video/mach64/atimach64vt2pci.bin" +#define BIOS_ROM_PATH "roms/video/mach64/bios.bin" +#define BIOS_ISA_ROM_PATH "roms/video/mach64/M64-1994.VBI" +#define BIOS_VLB_ROM_PATH "roms/video/mach64/mach64_vlb_vram.bin" +#define BIOS_ROMVT2_PATH "roms/video/mach64/atimach64vt2pci.bin" +#define FIFO_SIZE 65536 +#define FIFO_MASK (FIFO_SIZE - 1) +#define FIFO_ENTRY_SIZE (1 << 31) -#define FIFO_SIZE 65536 -#define FIFO_MASK (FIFO_SIZE - 1) -#define FIFO_ENTRY_SIZE (1 << 31) +#define FIFO_ENTRIES (mach64->fifo_write_idx - mach64->fifo_read_idx) +#define FIFO_FULL ((mach64->fifo_write_idx - mach64->fifo_read_idx) >= FIFO_SIZE) +#define FIFO_EMPTY (mach64->fifo_read_idx == mach64->fifo_write_idx) -#define FIFO_ENTRIES (mach64->fifo_write_idx - mach64->fifo_read_idx) -#define FIFO_FULL ((mach64->fifo_write_idx - mach64->fifo_read_idx) >= FIFO_SIZE) -#define FIFO_EMPTY (mach64->fifo_read_idx == mach64->fifo_write_idx) +#define FIFO_TYPE 0xff000000 +#define FIFO_ADDR 0x00ffffff -#define FIFO_TYPE 0xff000000 -#define FIFO_ADDR 0x00ffffff - -enum -{ - FIFO_INVALID = (0x00 << 24), - FIFO_WRITE_BYTE = (0x01 << 24), - FIFO_WRITE_WORD = (0x02 << 24), - FIFO_WRITE_DWORD = (0x03 << 24) +enum { + FIFO_INVALID = (0x00 << 24), + FIFO_WRITE_BYTE = (0x01 << 24), + FIFO_WRITE_WORD = (0x02 << 24), + FIFO_WRITE_DWORD = (0x03 << 24) }; typedef struct { - uint32_t addr_type; - uint32_t val; + uint32_t addr_type; + uint32_t val; } fifo_entry_t; -enum -{ - MACH64_GX = 0, - MACH64_VT2 +enum { + MACH64_GX = 0, + MACH64_VT2 }; -typedef struct mach64_t -{ - mem_mapping_t linear_mapping; - mem_mapping_t mmio_mapping; - mem_mapping_t mmio_linear_mapping; - mem_mapping_t mmio_linear_mapping_2; +typedef struct mach64_t { + mem_mapping_t linear_mapping; + mem_mapping_t mmio_mapping; + mem_mapping_t mmio_linear_mapping; + mem_mapping_t mmio_linear_mapping_2; - ati_eeprom_t eeprom; - svga_t svga; + ati_eeprom_t eeprom; + svga_t svga; - rom_t bios_rom; + rom_t bios_rom; - uint8_t regs[256]; - int index; + uint8_t regs[256]; + int index; - int type, pci; + int type, pci; - uint8_t pci_regs[256]; - uint8_t int_line; - int card; + uint8_t pci_regs[256]; + uint8_t int_line; + int card; - int bank_r[2]; - int bank_w[2]; + int bank_r[2]; + int bank_w[2]; - uint32_t vram_size; - uint32_t vram_mask; + uint32_t vram_size; + uint32_t vram_mask; - uint32_t config_cntl; + uint32_t config_cntl; - uint32_t context_load_cntl; - uint32_t context_mask; + uint32_t context_load_cntl; + uint32_t context_mask; - uint32_t crtc_gen_cntl; - uint8_t crtc_int_cntl; - uint32_t crtc_h_total_disp; - uint32_t crtc_v_sync_strt_wid; - uint32_t crtc_v_total_disp; - uint32_t crtc_off_pitch; + uint32_t crtc_gen_cntl; + uint8_t crtc_int_cntl; + uint32_t crtc_h_total_disp; + uint32_t crtc_v_sync_strt_wid; + uint32_t crtc_v_total_disp; + uint32_t crtc_off_pitch; - uint32_t clock_cntl; + uint32_t clock_cntl; - uint32_t clr_cmp_clr; - uint32_t clr_cmp_cntl; - uint32_t clr_cmp_mask; + uint32_t clr_cmp_clr; + uint32_t clr_cmp_cntl; + uint32_t clr_cmp_mask; - uint32_t cur_horz_vert_off; - uint32_t cur_horz_vert_posn; - uint32_t cur_offset; + uint32_t cur_horz_vert_off; + uint32_t cur_horz_vert_posn; + uint32_t cur_offset; - uint32_t dac_cntl; + uint32_t dac_cntl; + + uint32_t dp_bkgd_clr; + uint32_t dp_frgd_clr; + uint32_t dp_mix; + uint32_t dp_pix_width; + uint32_t dp_src; + + uint32_t dst_bres_lnth; + uint32_t dst_bres_dec; + uint32_t dst_bres_err; + uint32_t dst_bres_inc; + + uint32_t dst_cntl; + uint32_t dst_height_width; + uint32_t dst_off_pitch; + uint32_t dst_y_x; + + uint32_t gen_test_cntl; + + uint32_t gui_traj_cntl; + + uint32_t host_cntl; + + uint32_t mem_cntl; + + uint32_t ovr_clr; + uint32_t ovr_wid_left_right; + uint32_t ovr_wid_top_bottom; + + uint32_t pat_cntl; + uint32_t pat_reg0, pat_reg1; + + uint32_t sc_left_right, sc_top_bottom; + + uint32_t scratch_reg0, scratch_reg1; + + uint32_t src_cntl; + uint32_t src_off_pitch; + uint32_t src_y_x; + uint32_t src_y_x_start; + uint32_t src_height1_width1, src_height2_width2; + + uint32_t write_mask; + uint32_t chain_mask; + + uint32_t linear_base, old_linear_base; + uint32_t io_base; + + struct + { + int op; + + int dst_x, dst_y; + int dst_x_start, dst_y_start; + int src_x, src_y; + int src_x_start, src_y_start; + int xinc, yinc; + int x_count, y_count; + int src_x_count, src_y_count; + int src_width1, src_height1; + int src_width2, src_height2; + uint32_t src_offset, src_pitch; + uint32_t dst_offset, dst_pitch; + int mix_bg, mix_fg; + int source_bg, source_fg, source_mix; + int source_host; + int dst_width, dst_height; + int busy; + int pattern[8][8]; + uint8_t pattern_clr4x2[2][4]; + uint8_t pattern_clr8x1[8]; + int sc_left, sc_right, sc_top, sc_bottom; + int dst_pix_width, src_pix_width, host_pix_width; + int dst_size, src_size, host_size; uint32_t dp_bkgd_clr; uint32_t dp_frgd_clr; - uint32_t dp_mix; - uint32_t dp_pix_width; - uint32_t dp_src; - - uint32_t dst_bres_lnth; - uint32_t dst_bres_dec; - uint32_t dst_bres_err; - uint32_t dst_bres_inc; - - uint32_t dst_cntl; - uint32_t dst_height_width; - uint32_t dst_off_pitch; - uint32_t dst_y_x; - - uint32_t gen_test_cntl; - - uint32_t gui_traj_cntl; - - uint32_t host_cntl; - - uint32_t mem_cntl; - - uint32_t ovr_clr; - uint32_t ovr_wid_left_right; - uint32_t ovr_wid_top_bottom; - - uint32_t pat_cntl; - uint32_t pat_reg0, pat_reg1; - - uint32_t sc_left_right, sc_top_bottom; - - uint32_t scratch_reg0, scratch_reg1; - - uint32_t src_cntl; - uint32_t src_off_pitch; - uint32_t src_y_x; - uint32_t src_y_x_start; - uint32_t src_height1_width1, src_height2_width2; - uint32_t write_mask; - uint32_t chain_mask; - uint32_t linear_base, old_linear_base; - uint32_t io_base; + uint32_t clr_cmp_clr; + uint32_t clr_cmp_mask; + int clr_cmp_fn; + int clr_cmp_src; - struct - { - int op; + int err; + int poly_draw; + } accel; - int dst_x, dst_y; - int dst_x_start, dst_y_start; - int src_x, src_y; - int src_x_start, src_y_start; - int xinc, yinc; - int x_count, y_count; - int src_x_count, src_y_count; - int src_width1, src_height1; - int src_width2, src_height2; - uint32_t src_offset, src_pitch; - uint32_t dst_offset, dst_pitch; - int mix_bg, mix_fg; - int source_bg, source_fg, source_mix; - int source_host; - int dst_width, dst_height; - int busy; - int pattern[8][8]; - uint8_t pattern_clr4x2[2][4]; - uint8_t pattern_clr8x1[8]; - int sc_left, sc_right, sc_top, sc_bottom; - int dst_pix_width, src_pix_width, host_pix_width; - int dst_size, src_size, host_size; + fifo_entry_t fifo[FIFO_SIZE]; + volatile int fifo_read_idx, fifo_write_idx; - uint32_t dp_bkgd_clr; - uint32_t dp_frgd_clr; - uint32_t write_mask; + thread_t *fifo_thread; + event_t *wake_fifo_thread; + event_t *fifo_not_full_event; - uint32_t clr_cmp_clr; - uint32_t clr_cmp_mask; - int clr_cmp_fn; - int clr_cmp_src; + int blitter_busy; + uint64_t blitter_time; + uint64_t status_time; - int err; - int poly_draw; - } accel; + uint16_t pci_id; + uint32_t config_chip_id; + uint32_t block_decoded_io; + int use_block_decoded_io; - fifo_entry_t fifo[FIFO_SIZE]; - volatile int fifo_read_idx, fifo_write_idx; + int pll_addr; + uint8_t pll_regs[16]; + double pll_freq[4]; - thread_t *fifo_thread; - event_t *wake_fifo_thread; - event_t *fifo_not_full_event; + uint32_t config_stat0; - int blitter_busy; - uint64_t blitter_time; - uint64_t status_time; + uint32_t cur_clr0, cur_clr1; - uint16_t pci_id; - uint32_t config_chip_id; - uint32_t block_decoded_io; - int use_block_decoded_io; + uint32_t overlay_dat[1024]; + uint32_t overlay_graphics_key_clr, overlay_graphics_key_msk; + uint32_t overlay_video_key_clr, overlay_video_key_msk; + uint32_t overlay_key_cntl; + uint32_t overlay_scale_inc; + uint32_t overlay_scale_cntl; + uint32_t overlay_y_x_start, overlay_y_x_end; - int pll_addr; - uint8_t pll_regs[16]; - double pll_freq[4]; + uint32_t scaler_height_width; + int scaler_format; + int scaler_update; - uint32_t config_stat0; + uint32_t buf_offset[2], buf_pitch[2]; - uint32_t cur_clr0, cur_clr1; + int overlay_v_acc; - uint32_t overlay_dat[1024]; - uint32_t overlay_graphics_key_clr, overlay_graphics_key_msk; - uint32_t overlay_video_key_clr, overlay_video_key_msk; - uint32_t overlay_key_cntl; - uint32_t overlay_scale_inc; - uint32_t overlay_scale_cntl; - uint32_t overlay_y_x_start, overlay_y_x_end; - - uint32_t scaler_height_width; - int scaler_format; - int scaler_update; - - uint32_t buf_offset[2], buf_pitch[2]; - - int overlay_v_acc; - - uint8_t thread_run; - void *i2c, *ddc; + uint8_t thread_run; + void *i2c, *ddc; } mach64_t; -static video_timings_t timing_mach64_isa = {VIDEO_ISA, 3, 3, 6, 5, 5, 10}; -static video_timings_t timing_mach64_vlb = {VIDEO_BUS, 2, 2, 1, 20, 20, 21}; -static video_timings_t timing_mach64_pci = {VIDEO_PCI, 2, 2, 1, 20, 20, 21}; +static video_timings_t timing_mach64_isa = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 5, .read_w = 5, .read_l = 10 }; +static video_timings_t timing_mach64_vlb = { .type = VIDEO_BUS, .write_b = 2, .write_w = 2, .write_l = 1, .read_b = 20, .read_w = 20, .read_l = 21 }; +static video_timings_t timing_mach64_pci = { .type = VIDEO_PCI, .write_b = 2, .write_w = 2, .write_l = 1, .read_b = 20, .read_w = 20, .read_l = 21 }; -enum -{ - SRC_BG = 0, - SRC_FG = 1, - SRC_HOST = 2, - SRC_BLITSRC = 3, - SRC_PAT = 4 +enum { + SRC_BG = 0, + SRC_FG = 1, + SRC_HOST = 2, + SRC_BLITSRC = 3, + SRC_PAT = 4 }; -enum -{ - MONO_SRC_1 = 0, - MONO_SRC_PAT = 1, - MONO_SRC_HOST = 2, - MONO_SRC_BLITSRC = 3 +enum { + MONO_SRC_1 = 0, + MONO_SRC_PAT = 1, + MONO_SRC_HOST = 2, + MONO_SRC_BLITSRC = 3 }; -enum -{ - BPP_1 = 0, - BPP_4 = 1, - BPP_8 = 2, - BPP_15 = 3, - BPP_16 = 4, - BPP_24 = 5, - BPP_32 = 6 +enum { + BPP_1 = 0, + BPP_4 = 1, + BPP_8 = 2, + BPP_15 = 3, + BPP_16 = 4, + BPP_24 = 5, + BPP_32 = 6 }; -enum -{ - OP_RECT, - OP_LINE +enum { + OP_RECT, + OP_LINE }; -enum -{ - SRC_PATT_EN = 1, - SRC_PATT_ROT_EN = 2, - SRC_LINEAR_EN = 4 +enum { + SRC_PATT_EN = 1, + SRC_PATT_ROT_EN = 2, + SRC_LINEAR_EN = 4 }; -enum -{ - DP_BYTE_PIX_ORDER = (1 << 24) +enum { + DP_BYTE_PIX_ORDER = (1 << 24) }; #define WIDTH_1BIT 3 -static int mach64_width[8] = {WIDTH_1BIT, 0, 0, 1, 1, 2, 2, 0}; +static int mach64_width[8] = { WIDTH_1BIT, 0, 0, 1, 1, 2, 2, 0 }; -enum -{ - DST_X_DIR = 0x01, - DST_Y_DIR = 0x02, - DST_Y_MAJOR = 0x04, - DST_X_TILE = 0x08, - DST_Y_TILE = 0x10, - DST_LAST_PEL = 0x20, - DST_POLYGON_EN = 0x40, - DST_24_ROT_EN = 0x80 +enum { + DST_X_DIR = 0x01, + DST_Y_DIR = 0x02, + DST_Y_MAJOR = 0x04, + DST_X_TILE = 0x08, + DST_Y_TILE = 0x10, + DST_LAST_PEL = 0x20, + DST_POLYGON_EN = 0x40, + DST_24_ROT_EN = 0x80 }; -enum -{ - HOST_BYTE_ALIGN = (1 << 0) +enum { + HOST_BYTE_ALIGN = (1 << 0) }; -void mach64_write(uint32_t addr, uint8_t val, void *priv); -void mach64_writew(uint32_t addr, uint16_t val, void *priv); -void mach64_writel(uint32_t addr, uint32_t val, void *priv); -uint8_t mach64_read(uint32_t addr, void *priv); +void mach64_write(uint32_t addr, uint8_t val, void *priv); +void mach64_writew(uint32_t addr, uint16_t val, void *priv); +void mach64_writel(uint32_t addr, uint32_t val, void *priv); +uint8_t mach64_read(uint32_t addr, void *priv); uint16_t mach64_readw(uint32_t addr, void *priv); uint32_t mach64_readl(uint32_t addr, void *priv); -void mach64_updatemapping(mach64_t *mach64); -void mach64_recalctimings(svga_t *svga); -void mach64_start_fill(mach64_t *mach64); -void mach64_start_line(mach64_t *mach64); -void mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64); -void mach64_load_context(mach64_t *mach64); +void mach64_updatemapping(mach64_t *mach64); +void mach64_recalctimings(svga_t *svga); +void mach64_start_fill(mach64_t *mach64); +void mach64_start_line(mach64_t *mach64); +void mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64); +void mach64_load_context(mach64_t *mach64); uint8_t mach64_ext_readb(uint32_t addr, void *priv); uint16_t mach64_ext_readw(uint32_t addr, void *priv); @@ -353,3336 +341,4030 @@ void mach64_ext_writeb(uint32_t addr, uint8_t val, void *priv); void mach64_ext_writew(uint32_t addr, uint16_t val, void *priv); void mach64_ext_writel(uint32_t addr, uint32_t val, void *priv); - #ifdef ENABLE_MACH64_LOG int mach64_do_log = ENABLE_MACH64_LOG; - static void mach64_log(const char *fmt, ...) { va_list ap; if (mach64_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define mach64_log(fmt, ...) +# define mach64_log(fmt, ...) #endif - -void mach64_out(uint16_t addr, uint8_t val, void *p) +void +mach64_out(uint16_t addr, uint8_t val, void *p) { - mach64_t *mach64 = p; - svga_t *svga = &mach64->svga; - uint8_t old; + mach64_t *mach64 = p; + svga_t *svga = &mach64->svga; + uint8_t old; - if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1)) - addr ^= 0x60; + if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x1ce: - mach64->index = val; - break; - case 0x1cf: - mach64->regs[mach64->index & 0x3f] = val; - if ((mach64->index & 0x3f) == 0x36) + switch (addr) { + case 0x1ce: + mach64->index = val; + break; + case 0x1cf: + mach64->regs[mach64->index & 0x3f] = val; + if ((mach64->index & 0x3f) == 0x36) + svga_recalctimings(svga); + break; + + case 0x3C6: + case 0x3C7: + case 0x3C8: + case 0x3C9: + if (mach64->type == MACH64_GX) + ati68860_ramdac_out((addr & 3) | ((mach64->dac_cntl & 3) << 2), val, mach64->svga.ramdac, svga); + else + svga_out(addr, val, svga); + return; + + case 0x3cf: + if (svga->gdcaddr == 6) { + uint8_t old_val = svga->gdcreg[6]; + svga->gdcreg[6] = val; + if ((svga->gdcreg[6] & 0xc) != (old_val & 0xc)) + mach64_updatemapping(mach64); + return; + } + break; + + case 0x3D4: + svga->crtcreg = val & 0x3f; + return; + case 0x3D5: + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + if (svga->crtcreg > 0x18) + return; + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; + + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; svga_recalctimings(svga); - break; - - case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9: - if (mach64->type == MACH64_GX) - ati68860_ramdac_out((addr & 3) | ((mach64->dac_cntl & 3) << 2), val, mach64->svga.ramdac, svga); - else - svga_out(addr, val, svga); - return; - - case 0x3cf: - if (svga->gdcaddr == 6) - { - uint8_t old_val = svga->gdcreg[6]; - svga->gdcreg[6] = val; - if ((svga->gdcreg[6] & 0xc) != (old_val & 0xc)) - mach64_updatemapping(mach64); - return; + } } - break; - - case 0x3D4: - svga->crtcreg = val & 0x3f; - return; - case 0x3D5: - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - if (svga->crtcreg > 0x18) - return; - old = svga->crtc[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; - - if (old != val) - { - if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) - { - if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - } - } - break; - } - svga_out(addr, val, svga); + } + break; + } + svga_out(addr, val, svga); } -uint8_t mach64_in(uint16_t addr, void *p) +uint8_t +mach64_in(uint16_t addr, void *p) { - mach64_t *mach64 = p; - svga_t *svga = &mach64->svga; + mach64_t *mach64 = p; + svga_t *svga = &mach64->svga; - if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout&1)) - addr ^= 0x60; + if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x1ce: - return mach64->index; - case 0x1cf: - return mach64->regs[mach64->index & 0x3f]; + switch (addr) { + case 0x1ce: + return mach64->index; + case 0x1cf: + return mach64->regs[mach64->index & 0x3f]; - case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9: - if (mach64->type == MACH64_GX) - return ati68860_ramdac_in((addr & 3) | ((mach64->dac_cntl & 3) << 2), mach64->svga.ramdac, svga); - return svga_in(addr, svga); + case 0x3C6: + case 0x3C7: + case 0x3C8: + case 0x3C9: + if (mach64->type == MACH64_GX) + return ati68860_ramdac_in((addr & 3) | ((mach64->dac_cntl & 3) << 2), mach64->svga.ramdac, svga); + return svga_in(addr, svga); - case 0x3D4: - return svga->crtcreg; - case 0x3D5: - if (svga->crtcreg > 0x18) - return 0xff; - return svga->crtc[svga->crtcreg]; - } - return svga_in(addr, svga); + case 0x3D4: + return svga->crtcreg; + case 0x3D5: + if (svga->crtcreg > 0x18) + return 0xff; + return svga->crtc[svga->crtcreg]; + } + return svga_in(addr, svga); } -void mach64_recalctimings(svga_t *svga) +void +mach64_recalctimings(svga_t *svga) { - mach64_t *mach64 = (mach64_t *)svga->p; + mach64_t *mach64 = (mach64_t *) svga->p; - if (((mach64->crtc_gen_cntl >> 24) & 3) == 3) - { - svga->vtotal = (mach64->crtc_v_total_disp & 2047) + 1; - svga->dispend = ((mach64->crtc_v_total_disp >> 16) & 2047) + 1; - svga->htotal = (mach64->crtc_h_total_disp & 255) + 1; - svga->hdisp_time = svga->hdisp = ((mach64->crtc_h_total_disp >> 16) & 255) + 1; - svga->vsyncstart = (mach64->crtc_v_sync_strt_wid & 2047) + 1; - svga->rowoffset = (mach64->crtc_off_pitch >> 22); - svga->clock = (cpuclock * (double)(1ull << 32)) / ics2595_getclock(svga->clock_gen); - svga->ma_latch = (mach64->crtc_off_pitch & 0x1fffff) * 2; - svga->linedbl = svga->rowcount = 0; - svga->split = 0xffffff; - svga->vblankstart = svga->dispend; - svga->rowcount = mach64->crtc_gen_cntl & 1; - svga->rowoffset <<= 1; - if (mach64->type == MACH64_GX) - ati68860_ramdac_set_render(svga->ramdac, svga); - switch ((mach64->crtc_gen_cntl >> 8) & 7) - { - case BPP_4: - if (mach64->type != MACH64_GX) - svga->render = svga_render_4bpp_highres; - svga->hdisp *= 8; - break; - case BPP_8: - if (mach64->type != MACH64_GX) - svga->render = svga_render_8bpp_highres; - svga->hdisp *= 8; - svga->rowoffset /= 2; - break; - case BPP_15: - if (mach64->type != MACH64_GX) - svga->render = svga_render_15bpp_highres; - svga->hdisp *= 8; - break; - case BPP_16: - if (mach64->type != MACH64_GX) - svga->render = svga_render_16bpp_highres; - svga->hdisp *= 8; - break; - case BPP_24: - if (mach64->type != MACH64_GX) - svga->render = svga_render_24bpp_highres; - svga->hdisp *= 8; - svga->rowoffset = (svga->rowoffset * 3) / 2; - break; - case BPP_32: - if (mach64->type != MACH64_GX) - svga->render = svga_render_32bpp_highres; - svga->hdisp *= 8; - svga->rowoffset *= 2; - break; - } + if (((mach64->crtc_gen_cntl >> 24) & 3) == 3) { + svga->vtotal = (mach64->crtc_v_total_disp & 2047) + 1; + svga->dispend = ((mach64->crtc_v_total_disp >> 16) & 2047) + 1; + svga->htotal = (mach64->crtc_h_total_disp & 255) + 1; + svga->hdisp_time = svga->hdisp = ((mach64->crtc_h_total_disp >> 16) & 255) + 1; + svga->vsyncstart = (mach64->crtc_v_sync_strt_wid & 2047) + 1; + svga->rowoffset = (mach64->crtc_off_pitch >> 22); + svga->clock = (cpuclock * (double) (1ull << 32)) / ics2595_getclock(svga->clock_gen); + svga->ma_latch = (mach64->crtc_off_pitch & 0x1fffff) * 2; + svga->linedbl = svga->rowcount = 0; + svga->split = 0xffffff; + svga->vblankstart = svga->dispend; + svga->rowcount = mach64->crtc_gen_cntl & 1; + svga->rowoffset <<= 1; + if (mach64->type == MACH64_GX) + ati68860_ramdac_set_render(svga->ramdac, svga); + switch ((mach64->crtc_gen_cntl >> 8) & 7) { + case BPP_4: + if (mach64->type != MACH64_GX) + svga->render = svga_render_4bpp_highres; + svga->hdisp *= 8; + break; + case BPP_8: + if (mach64->type != MACH64_GX) + svga->render = svga_render_8bpp_highres; + svga->hdisp *= 8; + svga->rowoffset /= 2; + break; + case BPP_15: + if (mach64->type != MACH64_GX) + svga->render = svga_render_15bpp_highres; + svga->hdisp *= 8; + break; + case BPP_16: + if (mach64->type != MACH64_GX) + svga->render = svga_render_16bpp_highres; + svga->hdisp *= 8; + break; + case BPP_24: + if (mach64->type != MACH64_GX) + svga->render = svga_render_24bpp_highres; + svga->hdisp *= 8; + svga->rowoffset = (svga->rowoffset * 3) / 2; + break; + case BPP_32: + if (mach64->type != MACH64_GX) + svga->render = svga_render_32bpp_highres; + svga->hdisp *= 8; + svga->rowoffset *= 2; + break; + } - svga->vram_display_mask = mach64->vram_mask; - } - else - { - svga->vram_display_mask = (mach64->regs[0x36] & 0x01) ? mach64->vram_mask : 0x3ffff; - } + svga->vram_display_mask = mach64->vram_mask; + } else { + svga->vram_display_mask = (mach64->regs[0x36] & 0x01) ? mach64->vram_mask : 0x3ffff; + } } -void mach64_updatemapping(mach64_t *mach64) +void +mach64_updatemapping(mach64_t *mach64) { - svga_t *svga = &mach64->svga; - - if (!(mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) - { - mach64_log("Update mapping - PCI disabled\n"); - mem_mapping_disable(&svga->mapping); - mem_mapping_disable(&mach64->linear_mapping); - mem_mapping_disable(&mach64->mmio_mapping); - mem_mapping_disable(&mach64->mmio_linear_mapping); - mem_mapping_disable(&mach64->mmio_linear_mapping_2); - return; - } + svga_t *svga = &mach64->svga; + if (!(mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) { + mach64_log("Update mapping - PCI disabled\n"); + mem_mapping_disable(&svga->mapping); + mem_mapping_disable(&mach64->linear_mapping); mem_mapping_disable(&mach64->mmio_mapping); - switch (svga->gdcreg[6] & 0xc) - { - case 0x0: /*128k at A0000*/ - mem_mapping_set_handler(&mach64->svga.mapping, mach64_read, mach64_readw, mach64_readl, mach64_write, mach64_writew, mach64_writel); - mem_mapping_set_p(&mach64->svga.mapping, mach64); - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); - mem_mapping_enable(&mach64->mmio_mapping); - svga->banked_mask = 0xffff; - break; - case 0x4: /*64k at A0000*/ - mem_mapping_set_handler(&mach64->svga.mapping, mach64_read, mach64_readw, mach64_readl, mach64_write, mach64_writew, mach64_writel); - mem_mapping_set_p(&mach64->svga.mapping, mach64); - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); - svga->banked_mask = 0xffff; - break; - case 0x8: /*32k at B0000*/ - mem_mapping_set_handler(&mach64->svga.mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel); - mem_mapping_set_p(&mach64->svga.mapping, svga); - mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); - svga->banked_mask = 0x7fff; - break; - case 0xC: /*32k at B8000*/ - mem_mapping_set_handler(&mach64->svga.mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel); - mem_mapping_set_p(&mach64->svga.mapping, svga); - mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); - svga->banked_mask = 0x7fff; - break; - } - if (mach64->linear_base) - { - if (mach64->type == MACH64_GX) - { - if ((mach64->config_cntl & 3) == 2) - { - /*8 MB aperture*/ - mem_mapping_set_addr(&mach64->linear_mapping, mach64->linear_base, (8 << 20) - 0x4000); - mem_mapping_set_addr(&mach64->mmio_linear_mapping, mach64->linear_base + ((8 << 20) - 0x4000), 0x4000); - } - else - { - /*4 MB aperture*/ - mem_mapping_set_addr(&mach64->linear_mapping, mach64->linear_base, (4 << 20) - 0x4000); - mem_mapping_set_addr(&mach64->mmio_linear_mapping, mach64->linear_base + ((4 << 20) - 0x4000), 0x4000); - } - } - else - { - /*2*8 MB aperture*/ - mem_mapping_set_addr(&mach64->linear_mapping, mach64->linear_base, (8 << 20) - 0x4000); - mem_mapping_set_addr(&mach64->mmio_linear_mapping, mach64->linear_base + ((8 << 20) - 0x4000), 0x4000); - mem_mapping_set_addr(&mach64->mmio_linear_mapping_2, mach64->linear_base + ((16 << 20) - 0x4000), 0x4000); - } - } - else - { - mem_mapping_disable(&mach64->linear_mapping); - mem_mapping_disable(&mach64->mmio_linear_mapping); - mem_mapping_disable(&mach64->mmio_linear_mapping_2); + mem_mapping_disable(&mach64->mmio_linear_mapping); + mem_mapping_disable(&mach64->mmio_linear_mapping_2); + return; + } + + mem_mapping_disable(&mach64->mmio_mapping); + switch (svga->gdcreg[6] & 0xc) { + case 0x0: /*128k at A0000*/ + mem_mapping_set_handler(&mach64->svga.mapping, mach64_read, mach64_readw, mach64_readl, mach64_write, mach64_writew, mach64_writel); + mem_mapping_set_p(&mach64->svga.mapping, mach64); + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); + mem_mapping_enable(&mach64->mmio_mapping); + svga->banked_mask = 0xffff; + break; + case 0x4: /*64k at A0000*/ + mem_mapping_set_handler(&mach64->svga.mapping, mach64_read, mach64_readw, mach64_readl, mach64_write, mach64_writew, mach64_writel); + mem_mapping_set_p(&mach64->svga.mapping, mach64); + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + svga->banked_mask = 0xffff; + break; + case 0x8: /*32k at B0000*/ + mem_mapping_set_handler(&mach64->svga.mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel); + mem_mapping_set_p(&mach64->svga.mapping, svga); + mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); + svga->banked_mask = 0x7fff; + break; + case 0xC: /*32k at B8000*/ + mem_mapping_set_handler(&mach64->svga.mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel); + mem_mapping_set_p(&mach64->svga.mapping, svga); + mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); + svga->banked_mask = 0x7fff; + break; + } + if (mach64->linear_base) { + if (mach64->type == MACH64_GX) { + if ((mach64->config_cntl & 3) == 2) { + /*8 MB aperture*/ + mem_mapping_set_addr(&mach64->linear_mapping, mach64->linear_base, (8 << 20) - 0x4000); + mem_mapping_set_addr(&mach64->mmio_linear_mapping, mach64->linear_base + ((8 << 20) - 0x4000), 0x4000); + } else { + /*4 MB aperture*/ + mem_mapping_set_addr(&mach64->linear_mapping, mach64->linear_base, (4 << 20) - 0x4000); + mem_mapping_set_addr(&mach64->mmio_linear_mapping, mach64->linear_base + ((4 << 20) - 0x4000), 0x4000); + } + } else { + /*2*8 MB aperture*/ + mem_mapping_set_addr(&mach64->linear_mapping, mach64->linear_base, (8 << 20) - 0x4000); + mem_mapping_set_addr(&mach64->mmio_linear_mapping, mach64->linear_base + ((8 << 20) - 0x4000), 0x4000); + mem_mapping_set_addr(&mach64->mmio_linear_mapping_2, mach64->linear_base + ((16 << 20) - 0x4000), 0x4000); } + } else { + mem_mapping_disable(&mach64->linear_mapping); + mem_mapping_disable(&mach64->mmio_linear_mapping); + mem_mapping_disable(&mach64->mmio_linear_mapping_2); + } } -static void mach64_update_irqs(mach64_t *mach64) +static void +mach64_update_irqs(mach64_t *mach64) { - if (!mach64->pci) - { - return; - } + if (!mach64->pci) { + return; + } - if ((mach64->crtc_int_cntl & 0xaa0024) & ((mach64->crtc_int_cntl << 1) & 0xaa0024)) - pci_set_irq(mach64->card, PCI_INTA); - else - pci_clear_irq(mach64->card, PCI_INTA); + if ((mach64->crtc_int_cntl & 0xaa0024) & ((mach64->crtc_int_cntl << 1) & 0xaa0024)) + pci_set_irq(mach64->card, PCI_INTA); + else + pci_clear_irq(mach64->card, PCI_INTA); } -static __inline void wake_fifo_thread(mach64_t *mach64) +static __inline void +wake_fifo_thread(mach64_t *mach64) { - thread_set_event(mach64->wake_fifo_thread); /*Wake up FIFO thread if moving from idle*/ + thread_set_event(mach64->wake_fifo_thread); /*Wake up FIFO thread if moving from idle*/ } -static void mach64_wait_fifo_idle(mach64_t *mach64) +static void +mach64_wait_fifo_idle(mach64_t *mach64) { - while (!FIFO_EMPTY) - { - wake_fifo_thread(mach64); - thread_wait_event(mach64->fifo_not_full_event, 1); - } + while (!FIFO_EMPTY) { + wake_fifo_thread(mach64); + thread_wait_event(mach64->fifo_not_full_event, 1); + } } -#define READ8(addr, var) switch ((addr) & 3) \ - { \ - case 0: ret = (var) & 0xff; break; \ - case 1: ret = ((var) >> 8) & 0xff; break; \ - case 2: ret = ((var) >> 16) & 0xff; break; \ - case 3: ret = ((var) >> 24) & 0xff; break; \ - } +#define READ8(addr, var) \ + switch ((addr) &3) { \ + case 0: \ + ret = (var) &0xff; \ + break; \ + case 1: \ + ret = ((var) >> 8) & 0xff; \ + break; \ + case 2: \ + ret = ((var) >> 16) & 0xff; \ + break; \ + case 3: \ + ret = ((var) >> 24) & 0xff; \ + break; \ + } -#define WRITE8(addr, var, val) switch ((addr) & 3) \ - { \ - case 0: var = (var & 0xffffff00) | (val); break; \ - case 1: var = (var & 0xffff00ff) | ((val) << 8); break; \ - case 2: var = (var & 0xff00ffff) | ((val) << 16); break; \ - case 3: var = (var & 0x00ffffff) | ((val) << 24); break; \ - } +#define WRITE8(addr, var, val) \ + switch ((addr) &3) { \ + case 0: \ + var = (var & 0xffffff00) | (val); \ + break; \ + case 1: \ + var = (var & 0xffff00ff) | ((val) << 8); \ + break; \ + case 2: \ + var = (var & 0xff00ffff) | ((val) << 16); \ + break; \ + case 3: \ + var = (var & 0x00ffffff) | ((val) << 24); \ + break; \ + } -static void mach64_accel_write_fifo(mach64_t *mach64, uint32_t addr, uint8_t val) +static void +mach64_accel_write_fifo(mach64_t *mach64, uint32_t addr, uint8_t val) { - switch (addr & 0x3ff) - { - case 0x100: case 0x101: case 0x102: case 0x103: - WRITE8(addr, mach64->dst_off_pitch, val); - break; - case 0x104: case 0x105: case 0x11c: case 0x11d: - WRITE8(addr + 2, mach64->dst_y_x, val); - break; - case 0x108: case 0x109: - WRITE8(addr, mach64->dst_y_x, val); - break; - case 0x10c: case 0x10d: case 0x10e: case 0x10f: - WRITE8(addr, mach64->dst_y_x, val); - break; - case 0x110: case 0x111: - WRITE8(addr + 2, mach64->dst_height_width, val); - break; - case 0x114: case 0x115: - case 0x118: case 0x119: case 0x11a: case 0x11b: - case 0x11e: case 0x11f: - WRITE8(addr, mach64->dst_height_width, val); - /*FALLTHROUGH*/ - case 0x113: - if (((addr & 0x3ff) == 0x11b || (addr & 0x3ff) == 0x11f || - (addr & 0x3ff) == 0x113) && !(val & 0x80)) - { - mach64_start_fill(mach64); - mach64_log("%i %i %i %i %i %08x\n", (mach64->dst_height_width & 0x7ff), (mach64->dst_height_width & 0x7ff0000), - ((mach64->dp_src & 7) != SRC_HOST), (((mach64->dp_src >> 8) & 7) != SRC_HOST), - (((mach64->dp_src >> 16) & 3) != MONO_SRC_HOST), mach64->dp_src); - if ((mach64->dst_height_width & 0x7ff) && (mach64->dst_height_width & 0x7ff0000) && - ((mach64->dp_src & 7) != SRC_HOST) && (((mach64->dp_src >> 8) & 7) != SRC_HOST) && - (((mach64->dp_src >> 16) & 3) != MONO_SRC_HOST)) - mach64_blit(0, -1, mach64); - } - break; + switch (addr & 0x3ff) { + case 0x100: + case 0x101: + case 0x102: + case 0x103: + WRITE8(addr, mach64->dst_off_pitch, val); + break; + case 0x104: + case 0x105: + case 0x11c: + case 0x11d: + WRITE8(addr + 2, mach64->dst_y_x, val); + break; + case 0x108: + case 0x109: + WRITE8(addr, mach64->dst_y_x, val); + break; + case 0x10c: + case 0x10d: + case 0x10e: + case 0x10f: + WRITE8(addr, mach64->dst_y_x, val); + break; + case 0x110: + case 0x111: + WRITE8(addr + 2, mach64->dst_height_width, val); + break; + case 0x114: + case 0x115: + case 0x118: + case 0x119: + case 0x11a: + case 0x11b: + case 0x11e: + case 0x11f: + WRITE8(addr, mach64->dst_height_width, val); + /*FALLTHROUGH*/ + case 0x113: + if (((addr & 0x3ff) == 0x11b || (addr & 0x3ff) == 0x11f || (addr & 0x3ff) == 0x113) && !(val & 0x80)) { + mach64_start_fill(mach64); + mach64_log("%i %i %i %i %i %08x\n", (mach64->dst_height_width & 0x7ff), (mach64->dst_height_width & 0x7ff0000), + ((mach64->dp_src & 7) != SRC_HOST), (((mach64->dp_src >> 8) & 7) != SRC_HOST), + (((mach64->dp_src >> 16) & 3) != MONO_SRC_HOST), mach64->dp_src); + if ((mach64->dst_height_width & 0x7ff) && (mach64->dst_height_width & 0x7ff0000) && ((mach64->dp_src & 7) != SRC_HOST) && (((mach64->dp_src >> 8) & 7) != SRC_HOST) && (((mach64->dp_src >> 16) & 3) != MONO_SRC_HOST)) + mach64_blit(0, -1, mach64); + } + break; - case 0x120: case 0x121: case 0x122: case 0x123: - WRITE8(addr, mach64->dst_bres_lnth, val); - if ((addr & 0x3ff) == 0x123 && !(val & 0x80)) - { - mach64_start_line(mach64); + case 0x120: + case 0x121: + case 0x122: + case 0x123: + WRITE8(addr, mach64->dst_bres_lnth, val); + if ((addr & 0x3ff) == 0x123 && !(val & 0x80)) { + mach64_start_line(mach64); - if ((mach64->dst_bres_lnth & 0x7fff) && - ((mach64->dp_src & 7) != SRC_HOST) && (((mach64->dp_src >> 8) & 7) != SRC_HOST) && - (((mach64->dp_src >> 16) & 3) != MONO_SRC_HOST)) - mach64_blit(0, -1, mach64); - } - break; - case 0x124: case 0x125: case 0x126: case 0x127: - WRITE8(addr, mach64->dst_bres_err, val); - break; - case 0x128: case 0x129: case 0x12a: case 0x12b: - WRITE8(addr, mach64->dst_bres_inc, val); - break; - case 0x12c: case 0x12d: case 0x12e: case 0x12f: - WRITE8(addr, mach64->dst_bres_dec, val); - break; + if ((mach64->dst_bres_lnth & 0x7fff) && ((mach64->dp_src & 7) != SRC_HOST) && (((mach64->dp_src >> 8) & 7) != SRC_HOST) && (((mach64->dp_src >> 16) & 3) != MONO_SRC_HOST)) + mach64_blit(0, -1, mach64); + } + break; + case 0x124: + case 0x125: + case 0x126: + case 0x127: + WRITE8(addr, mach64->dst_bres_err, val); + break; + case 0x128: + case 0x129: + case 0x12a: + case 0x12b: + WRITE8(addr, mach64->dst_bres_inc, val); + break; + case 0x12c: + case 0x12d: + case 0x12e: + case 0x12f: + WRITE8(addr, mach64->dst_bres_dec, val); + break; - case 0x130: case 0x131: case 0x132: case 0x133: - WRITE8(addr, mach64->dst_cntl, val); - break; + case 0x130: + case 0x131: + case 0x132: + case 0x133: + WRITE8(addr, mach64->dst_cntl, val); + break; - case 0x180: case 0x181: case 0x182: case 0x183: - WRITE8(addr, mach64->src_off_pitch, val); - break; - case 0x184: case 0x185: - WRITE8(addr, mach64->src_y_x, val); - break; - case 0x188: case 0x189: - WRITE8(addr + 2, mach64->src_y_x, val); - break; - case 0x18c: case 0x18d: case 0x18e: case 0x18f: - WRITE8(addr, mach64->src_y_x, val); - break; - case 0x190: case 0x191: - WRITE8(addr + 2, mach64->src_height1_width1, val); - break; - case 0x194: case 0x195: - WRITE8(addr, mach64->src_height1_width1, val); - break; - case 0x198: case 0x199: case 0x19a: case 0x19b: - WRITE8(addr, mach64->src_height1_width1, val); - break; - case 0x19c: case 0x19d: - WRITE8(addr, mach64->src_y_x_start, val); - break; - case 0x1a0: case 0x1a1: - WRITE8(addr + 2, mach64->src_y_x_start, val); - break; - case 0x1a4: case 0x1a5: case 0x1a6: case 0x1a7: - WRITE8(addr, mach64->src_y_x_start, val); - break; - case 0x1a8: case 0x1a9: - WRITE8(addr + 2, mach64->src_height2_width2, val); - break; - case 0x1ac: case 0x1ad: - WRITE8(addr, mach64->src_height2_width2, val); - break; - case 0x1b0: case 0x1b1: case 0x1b2: case 0x1b3: - WRITE8(addr, mach64->src_height2_width2, val); - break; + case 0x180: + case 0x181: + case 0x182: + case 0x183: + WRITE8(addr, mach64->src_off_pitch, val); + break; + case 0x184: + case 0x185: + WRITE8(addr, mach64->src_y_x, val); + break; + case 0x188: + case 0x189: + WRITE8(addr + 2, mach64->src_y_x, val); + break; + case 0x18c: + case 0x18d: + case 0x18e: + case 0x18f: + WRITE8(addr, mach64->src_y_x, val); + break; + case 0x190: + case 0x191: + WRITE8(addr + 2, mach64->src_height1_width1, val); + break; + case 0x194: + case 0x195: + WRITE8(addr, mach64->src_height1_width1, val); + break; + case 0x198: + case 0x199: + case 0x19a: + case 0x19b: + WRITE8(addr, mach64->src_height1_width1, val); + break; + case 0x19c: + case 0x19d: + WRITE8(addr, mach64->src_y_x_start, val); + break; + case 0x1a0: + case 0x1a1: + WRITE8(addr + 2, mach64->src_y_x_start, val); + break; + case 0x1a4: + case 0x1a5: + case 0x1a6: + case 0x1a7: + WRITE8(addr, mach64->src_y_x_start, val); + break; + case 0x1a8: + case 0x1a9: + WRITE8(addr + 2, mach64->src_height2_width2, val); + break; + case 0x1ac: + case 0x1ad: + WRITE8(addr, mach64->src_height2_width2, val); + break; + case 0x1b0: + case 0x1b1: + case 0x1b2: + case 0x1b3: + WRITE8(addr, mach64->src_height2_width2, val); + break; - case 0x1b4: case 0x1b5: case 0x1b6: case 0x1b7: - WRITE8(addr, mach64->src_cntl, val); - break; + case 0x1b4: + case 0x1b5: + case 0x1b6: + case 0x1b7: + WRITE8(addr, mach64->src_cntl, val); + break; - case 0x200: case 0x201: case 0x202: case 0x203: - case 0x204: case 0x205: case 0x206: case 0x207: - case 0x208: case 0x209: case 0x20a: case 0x20b: - case 0x20c: case 0x20d: case 0x20e: case 0x20f: - case 0x210: case 0x211: case 0x212: case 0x213: - case 0x214: case 0x215: case 0x216: case 0x217: - case 0x218: case 0x219: case 0x21a: case 0x21b: - case 0x21c: case 0x21d: case 0x21e: case 0x21f: - case 0x220: case 0x221: case 0x222: case 0x223: - case 0x224: case 0x225: case 0x226: case 0x227: - case 0x228: case 0x229: case 0x22a: case 0x22b: - case 0x22c: case 0x22d: case 0x22e: case 0x22f: - case 0x230: case 0x231: case 0x232: case 0x233: - case 0x234: case 0x235: case 0x236: case 0x237: - case 0x238: case 0x239: case 0x23a: case 0x23b: - case 0x23c: case 0x23d: case 0x23e: case 0x23f: - mach64_blit(val, 8, mach64); - break; + case 0x200: + case 0x201: + case 0x202: + case 0x203: + case 0x204: + case 0x205: + case 0x206: + case 0x207: + case 0x208: + case 0x209: + case 0x20a: + case 0x20b: + case 0x20c: + case 0x20d: + case 0x20e: + case 0x20f: + case 0x210: + case 0x211: + case 0x212: + case 0x213: + case 0x214: + case 0x215: + case 0x216: + case 0x217: + case 0x218: + case 0x219: + case 0x21a: + case 0x21b: + case 0x21c: + case 0x21d: + case 0x21e: + case 0x21f: + case 0x220: + case 0x221: + case 0x222: + case 0x223: + case 0x224: + case 0x225: + case 0x226: + case 0x227: + case 0x228: + case 0x229: + case 0x22a: + case 0x22b: + case 0x22c: + case 0x22d: + case 0x22e: + case 0x22f: + case 0x230: + case 0x231: + case 0x232: + case 0x233: + case 0x234: + case 0x235: + case 0x236: + case 0x237: + case 0x238: + case 0x239: + case 0x23a: + case 0x23b: + case 0x23c: + case 0x23d: + case 0x23e: + case 0x23f: + mach64_blit(val, 8, mach64); + break; - case 0x240: case 0x241: case 0x242: case 0x243: - WRITE8(addr, mach64->host_cntl, val); - break; + case 0x240: + case 0x241: + case 0x242: + case 0x243: + WRITE8(addr, mach64->host_cntl, val); + break; - case 0x280: case 0x281: case 0x282: case 0x283: - WRITE8(addr, mach64->pat_reg0, val); - break; - case 0x284: case 0x285: case 0x286: case 0x287: - WRITE8(addr, mach64->pat_reg1, val); - break; + case 0x280: + case 0x281: + case 0x282: + case 0x283: + WRITE8(addr, mach64->pat_reg0, val); + break; + case 0x284: + case 0x285: + case 0x286: + case 0x287: + WRITE8(addr, mach64->pat_reg1, val); + break; - case 0x288: case 0x289: case 0x28a: case 0x28b: - WRITE8(addr, mach64->pat_cntl, val); - break; + case 0x288: + case 0x289: + case 0x28a: + case 0x28b: + WRITE8(addr, mach64->pat_cntl, val); + break; - case 0x2a0: case 0x2a1: case 0x2a8: case 0x2a9: - WRITE8(addr, mach64->sc_left_right, val); - break; - case 0x2a4: case 0x2a5: - addr += 2; - /*FALLTHROUGH*/ - case 0x2aa: case 0x2ab: - WRITE8(addr, mach64->sc_left_right, val); - break; + case 0x2a0: + case 0x2a1: + case 0x2a8: + case 0x2a9: + WRITE8(addr, mach64->sc_left_right, val); + break; + case 0x2a4: + case 0x2a5: + addr += 2; + /*FALLTHROUGH*/ + case 0x2aa: + case 0x2ab: + WRITE8(addr, mach64->sc_left_right, val); + break; - case 0x2ac: case 0x2ad: case 0x2b4: case 0x2b5: - WRITE8(addr, mach64->sc_top_bottom, val); - break; - case 0x2b0: case 0x2b1: - addr += 2; - /*FALLTHROUGH*/ - case 0x2b6: case 0x2b7: - WRITE8(addr, mach64->sc_top_bottom, val); - break; + case 0x2ac: + case 0x2ad: + case 0x2b4: + case 0x2b5: + WRITE8(addr, mach64->sc_top_bottom, val); + break; + case 0x2b0: + case 0x2b1: + addr += 2; + /*FALLTHROUGH*/ + case 0x2b6: + case 0x2b7: + WRITE8(addr, mach64->sc_top_bottom, val); + break; - case 0x2c0: case 0x2c1: case 0x2c2: case 0x2c3: - WRITE8(addr, mach64->dp_bkgd_clr, val); - break; - case 0x2c4: case 0x2c5: case 0x2c6: case 0x2c7: - WRITE8(addr, mach64->dp_frgd_clr, val); - break; - case 0x2c8: case 0x2c9: case 0x2ca: case 0x2cb: - WRITE8(addr, mach64->write_mask, val); - break; - case 0x2cc: case 0x2cd: case 0x2ce: case 0x2cf: - WRITE8(addr, mach64->chain_mask, val); - break; + case 0x2c0: + case 0x2c1: + case 0x2c2: + case 0x2c3: + WRITE8(addr, mach64->dp_bkgd_clr, val); + break; + case 0x2c4: + case 0x2c5: + case 0x2c6: + case 0x2c7: + WRITE8(addr, mach64->dp_frgd_clr, val); + break; + case 0x2c8: + case 0x2c9: + case 0x2ca: + case 0x2cb: + WRITE8(addr, mach64->write_mask, val); + break; + case 0x2cc: + case 0x2cd: + case 0x2ce: + case 0x2cf: + WRITE8(addr, mach64->chain_mask, val); + break; - case 0x2d0: case 0x2d1: case 0x2d2: case 0x2d3: - WRITE8(addr, mach64->dp_pix_width, val); - break; - case 0x2d4: case 0x2d5: case 0x2d6: case 0x2d7: - WRITE8(addr, mach64->dp_mix, val); - break; - case 0x2d8: case 0x2d9: case 0x2da: case 0x2db: - WRITE8(addr, mach64->dp_src, val); - break; + case 0x2d0: + case 0x2d1: + case 0x2d2: + case 0x2d3: + WRITE8(addr, mach64->dp_pix_width, val); + break; + case 0x2d4: + case 0x2d5: + case 0x2d6: + case 0x2d7: + WRITE8(addr, mach64->dp_mix, val); + break; + case 0x2d8: + case 0x2d9: + case 0x2da: + case 0x2db: + WRITE8(addr, mach64->dp_src, val); + break; - case 0x300: case 0x301: case 0x302: case 0x303: - WRITE8(addr, mach64->clr_cmp_clr, val); - break; - case 0x304: case 0x305: case 0x306: case 0x307: - WRITE8(addr, mach64->clr_cmp_mask, val); - break; - case 0x308: case 0x309: case 0x30a: case 0x30b: - WRITE8(addr, mach64->clr_cmp_cntl, val); - break; + case 0x300: + case 0x301: + case 0x302: + case 0x303: + WRITE8(addr, mach64->clr_cmp_clr, val); + break; + case 0x304: + case 0x305: + case 0x306: + case 0x307: + WRITE8(addr, mach64->clr_cmp_mask, val); + break; + case 0x308: + case 0x309: + case 0x30a: + case 0x30b: + WRITE8(addr, mach64->clr_cmp_cntl, val); + break; - case 0x320: case 0x321: case 0x322: case 0x323: - WRITE8(addr, mach64->context_mask, val); - break; + case 0x320: + case 0x321: + case 0x322: + case 0x323: + WRITE8(addr, mach64->context_mask, val); + break; - case 0x330: case 0x331: - WRITE8(addr, mach64->dst_cntl, val); - break; - case 0x332: - WRITE8(addr - 2, mach64->src_cntl, val); - break; - case 0x333: - WRITE8(addr - 3, mach64->pat_cntl, val & 7); - if (val & 0x10) - mach64->host_cntl |= HOST_BYTE_ALIGN; - else - mach64->host_cntl &= ~HOST_BYTE_ALIGN; - break; - } + case 0x330: + case 0x331: + WRITE8(addr, mach64->dst_cntl, val); + break; + case 0x332: + WRITE8(addr - 2, mach64->src_cntl, val); + break; + case 0x333: + WRITE8(addr - 3, mach64->pat_cntl, val & 7); + if (val & 0x10) + mach64->host_cntl |= HOST_BYTE_ALIGN; + else + mach64->host_cntl &= ~HOST_BYTE_ALIGN; + break; + } } -static void mach64_accel_write_fifo_w(mach64_t *mach64, uint32_t addr, uint16_t val) +static void +mach64_accel_write_fifo_w(mach64_t *mach64, uint32_t addr, uint16_t val) { - switch (addr & 0x3fe) - { - case 0x200: case 0x202: case 0x204: case 0x206: - case 0x208: case 0x20a: case 0x20c: case 0x20e: - case 0x210: case 0x212: case 0x214: case 0x216: - case 0x218: case 0x21a: case 0x21c: case 0x21e: - case 0x220: case 0x222: case 0x224: case 0x226: - case 0x228: case 0x22a: case 0x22c: case 0x22e: - case 0x230: case 0x232: case 0x234: case 0x236: - case 0x238: case 0x23a: case 0x23c: case 0x23e: - mach64_blit(val, 16, mach64); - break; + switch (addr & 0x3fe) { + case 0x200: + case 0x202: + case 0x204: + case 0x206: + case 0x208: + case 0x20a: + case 0x20c: + case 0x20e: + case 0x210: + case 0x212: + case 0x214: + case 0x216: + case 0x218: + case 0x21a: + case 0x21c: + case 0x21e: + case 0x220: + case 0x222: + case 0x224: + case 0x226: + case 0x228: + case 0x22a: + case 0x22c: + case 0x22e: + case 0x230: + case 0x232: + case 0x234: + case 0x236: + case 0x238: + case 0x23a: + case 0x23c: + case 0x23e: + mach64_blit(val, 16, mach64); + break; - case 0x32c: - mach64->context_load_cntl = (mach64->context_load_cntl & 0xffff0000) | val; - break; + case 0x32c: + mach64->context_load_cntl = (mach64->context_load_cntl & 0xffff0000) | val; + break; - case 0x32e: - mach64->context_load_cntl = (mach64->context_load_cntl & 0x0000ffff) | (val << 16); - if (val & 0x30000) - mach64_load_context(mach64); - break; + case 0x32e: + mach64->context_load_cntl = (mach64->context_load_cntl & 0x0000ffff) | (val << 16); + if (val & 0x30000) + mach64_load_context(mach64); + break; - default: - mach64_accel_write_fifo(mach64, addr, val); - mach64_accel_write_fifo(mach64, addr + 1, val >> 8); - break; - } + default: + mach64_accel_write_fifo(mach64, addr, val); + mach64_accel_write_fifo(mach64, addr + 1, val >> 8); + break; + } } -static void mach64_accel_write_fifo_l(mach64_t *mach64, uint32_t addr, uint32_t val) +static void +mach64_accel_write_fifo_l(mach64_t *mach64, uint32_t addr, uint32_t val) { - switch (addr & 0x3fc) - { - case 0x32c: - mach64->context_load_cntl = val; - if (val & 0x30000) - mach64_load_context(mach64); - break; + switch (addr & 0x3fc) { + case 0x32c: + mach64->context_load_cntl = val; + if (val & 0x30000) + mach64_load_context(mach64); + break; - case 0x200: case 0x204: case 0x208: case 0x20c: - case 0x210: case 0x214: case 0x218: case 0x21c: - case 0x220: case 0x224: case 0x228: case 0x22c: - case 0x230: case 0x234: case 0x238: case 0x23c: - if (mach64->accel.source_host || (mach64->dp_pix_width & DP_BYTE_PIX_ORDER)) - mach64_blit(val, 32, mach64); - else - mach64_blit(((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24), 32, mach64); - break; + case 0x200: + case 0x204: + case 0x208: + case 0x20c: + case 0x210: + case 0x214: + case 0x218: + case 0x21c: + case 0x220: + case 0x224: + case 0x228: + case 0x22c: + case 0x230: + case 0x234: + case 0x238: + case 0x23c: + if (mach64->accel.source_host || (mach64->dp_pix_width & DP_BYTE_PIX_ORDER)) + mach64_blit(val, 32, mach64); + else + mach64_blit(((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24), 32, mach64); + break; - default: - mach64_accel_write_fifo_w(mach64, addr, val); - mach64_accel_write_fifo_w(mach64, addr + 2, val >> 16); - break; - } + default: + mach64_accel_write_fifo_w(mach64, addr, val); + mach64_accel_write_fifo_w(mach64, addr + 2, val >> 16); + break; + } } -static void fifo_thread(void *param) +static void +fifo_thread(void *param) { - mach64_t *mach64 = (mach64_t *)param; + mach64_t *mach64 = (mach64_t *) param; - while (mach64->thread_run) - { + while (mach64->thread_run) { + thread_set_event(mach64->fifo_not_full_event); + thread_wait_event(mach64->wake_fifo_thread, -1); + thread_reset_event(mach64->wake_fifo_thread); + mach64->blitter_busy = 1; + while (!FIFO_EMPTY) { + uint64_t start_time = plat_timer_read(); + uint64_t end_time; + fifo_entry_t *fifo = &mach64->fifo[mach64->fifo_read_idx & FIFO_MASK]; + + switch (fifo->addr_type & FIFO_TYPE) { + case FIFO_WRITE_BYTE: + mach64_accel_write_fifo(mach64, fifo->addr_type & FIFO_ADDR, fifo->val); + break; + case FIFO_WRITE_WORD: + mach64_accel_write_fifo_w(mach64, fifo->addr_type & FIFO_ADDR, fifo->val); + break; + case FIFO_WRITE_DWORD: + mach64_accel_write_fifo_l(mach64, fifo->addr_type & FIFO_ADDR, fifo->val); + break; + } + + mach64->fifo_read_idx++; + fifo->addr_type = FIFO_INVALID; + + if (FIFO_ENTRIES > 0xe000) thread_set_event(mach64->fifo_not_full_event); - thread_wait_event(mach64->wake_fifo_thread, -1); - thread_reset_event(mach64->wake_fifo_thread); - mach64->blitter_busy = 1; - while (!FIFO_EMPTY) - { - uint64_t start_time = plat_timer_read(); - uint64_t end_time; - fifo_entry_t *fifo = &mach64->fifo[mach64->fifo_read_idx & FIFO_MASK]; - switch (fifo->addr_type & FIFO_TYPE) - { - case FIFO_WRITE_BYTE: - mach64_accel_write_fifo(mach64, fifo->addr_type & FIFO_ADDR, fifo->val); - break; - case FIFO_WRITE_WORD: - mach64_accel_write_fifo_w(mach64, fifo->addr_type & FIFO_ADDR, fifo->val); - break; - case FIFO_WRITE_DWORD: - mach64_accel_write_fifo_l(mach64, fifo->addr_type & FIFO_ADDR, fifo->val); - break; - } - - mach64->fifo_read_idx++; - fifo->addr_type = FIFO_INVALID; - - if (FIFO_ENTRIES > 0xe000) - thread_set_event(mach64->fifo_not_full_event); - - end_time = plat_timer_read(); - mach64->blitter_time += end_time - start_time; - } - mach64->blitter_busy = 0; + end_time = plat_timer_read(); + mach64->blitter_time += end_time - start_time; } + mach64->blitter_busy = 0; + } } -static void mach64_queue(mach64_t *mach64, uint32_t addr, uint32_t val, uint32_t type) +static void +mach64_queue(mach64_t *mach64, uint32_t addr, uint32_t val, uint32_t type) { - fifo_entry_t *fifo = &mach64->fifo[mach64->fifo_write_idx & FIFO_MASK]; + fifo_entry_t *fifo = &mach64->fifo[mach64->fifo_write_idx & FIFO_MASK]; - if (FIFO_FULL) - { - thread_reset_event(mach64->fifo_not_full_event); - if (FIFO_FULL) - { - thread_wait_event(mach64->fifo_not_full_event, -1); /*Wait for room in ringbuffer*/ - } + if (FIFO_FULL) { + thread_reset_event(mach64->fifo_not_full_event); + if (FIFO_FULL) { + thread_wait_event(mach64->fifo_not_full_event, -1); /*Wait for room in ringbuffer*/ } + } - fifo->val = val; - fifo->addr_type = (addr & FIFO_ADDR) | type; + fifo->val = val; + fifo->addr_type = (addr & FIFO_ADDR) | type; - mach64->fifo_write_idx++; + mach64->fifo_write_idx++; - if (FIFO_ENTRIES > 0xe000 || FIFO_ENTRIES < 8) - wake_fifo_thread(mach64); + if (FIFO_ENTRIES > 0xe000 || FIFO_ENTRIES < 8) + wake_fifo_thread(mach64); } - -void mach64_start_fill(mach64_t *mach64) +void +mach64_start_fill(mach64_t *mach64) { - int x, y; + int x, y; - mach64->accel.dst_x = 0; - mach64->accel.dst_y = 0; - mach64->accel.dst_x_start = (mach64->dst_y_x >> 16) & 0xfff; - mach64->accel.dst_y_start = mach64->dst_y_x & 0xfff; + mach64->accel.dst_x = 0; + mach64->accel.dst_y = 0; + mach64->accel.dst_x_start = (mach64->dst_y_x >> 16) & 0xfff; + mach64->accel.dst_y_start = mach64->dst_y_x & 0xfff; - mach64->accel.dst_width = (mach64->dst_height_width >> 16) & 0x1fff; - mach64->accel.dst_height = mach64->dst_height_width & 0x1fff; + mach64->accel.dst_width = (mach64->dst_height_width >> 16) & 0x1fff; + mach64->accel.dst_height = mach64->dst_height_width & 0x1fff; - if (((mach64->dp_src >> 16) & 7) == MONO_SRC_BLITSRC) - { - if (mach64->accel.dst_width & 7) - mach64->accel.dst_width = (mach64->accel.dst_width & ~7) + 8; - } + if (((mach64->dp_src >> 16) & 7) == MONO_SRC_BLITSRC) { + if (mach64->accel.dst_width & 7) + mach64->accel.dst_width = (mach64->accel.dst_width & ~7) + 8; + } - mach64->accel.x_count = mach64->accel.dst_width; + mach64->accel.x_count = mach64->accel.dst_width; - mach64->accel.src_x = 0; - mach64->accel.src_y = 0; - mach64->accel.src_x_start = (mach64->src_y_x >> 16) & 0xfff; - mach64->accel.src_y_start = mach64->src_y_x & 0xfff; - if (mach64->src_cntl & SRC_LINEAR_EN) - mach64->accel.src_x_count = 0x7ffffff; /*Essentially infinite*/ - else - mach64->accel.src_x_count = (mach64->src_height1_width1 >> 16) & 0x7fff; - if (!(mach64->src_cntl & SRC_PATT_EN)) - mach64->accel.src_y_count = 0x7ffffff; /*Essentially infinite*/ - else - mach64->accel.src_y_count = mach64->src_height1_width1 & 0x1fff; + mach64->accel.src_x = 0; + mach64->accel.src_y = 0; + mach64->accel.src_x_start = (mach64->src_y_x >> 16) & 0xfff; + mach64->accel.src_y_start = mach64->src_y_x & 0xfff; + if (mach64->src_cntl & SRC_LINEAR_EN) + mach64->accel.src_x_count = 0x7ffffff; /*Essentially infinite*/ + else + mach64->accel.src_x_count = (mach64->src_height1_width1 >> 16) & 0x7fff; + if (!(mach64->src_cntl & SRC_PATT_EN)) + mach64->accel.src_y_count = 0x7ffffff; /*Essentially infinite*/ + else + mach64->accel.src_y_count = mach64->src_height1_width1 & 0x1fff; - mach64->accel.src_width1 = (mach64->src_height1_width1 >> 16) & 0x7fff; - mach64->accel.src_height1 = mach64->src_height1_width1 & 0x1fff; - mach64->accel.src_width2 = (mach64->src_height2_width2 >> 16) & 0x7fff; - mach64->accel.src_height2 = mach64->src_height2_width2 & 0x1fff; + mach64->accel.src_width1 = (mach64->src_height1_width1 >> 16) & 0x7fff; + mach64->accel.src_height1 = mach64->src_height1_width1 & 0x1fff; + mach64->accel.src_width2 = (mach64->src_height2_width2 >> 16) & 0x7fff; + mach64->accel.src_height2 = mach64->src_height2_width2 & 0x1fff; - mach64_log("src %i %i %i %i %08X %08X\n", mach64->accel.src_x_count, - mach64->accel.src_y_count, - mach64->accel.src_width1, - mach64->accel.src_height1, - mach64->src_height1_width1, - mach64->src_height2_width2); + mach64_log("src %i %i %i %i %08X %08X\n", mach64->accel.src_x_count, + mach64->accel.src_y_count, + mach64->accel.src_width1, + mach64->accel.src_height1, + mach64->src_height1_width1, + mach64->src_height2_width2); - mach64->accel.src_pitch = (mach64->src_off_pitch >> 22) * 8; - mach64->accel.src_offset = (mach64->src_off_pitch & 0xfffff) * 8; + mach64->accel.src_pitch = (mach64->src_off_pitch >> 22) * 8; + mach64->accel.src_offset = (mach64->src_off_pitch & 0xfffff) * 8; - mach64->accel.dst_pitch = (mach64->dst_off_pitch >> 22) * 8; - mach64->accel.dst_offset = (mach64->dst_off_pitch & 0xfffff) * 8; + mach64->accel.dst_pitch = (mach64->dst_off_pitch >> 22) * 8; + mach64->accel.dst_offset = (mach64->dst_off_pitch & 0xfffff) * 8; - mach64->accel.mix_fg = (mach64->dp_mix >> 16) & 0x1f; - mach64->accel.mix_bg = mach64->dp_mix & 0x1f; + mach64->accel.mix_fg = (mach64->dp_mix >> 16) & 0x1f; + mach64->accel.mix_bg = mach64->dp_mix & 0x1f; - mach64->accel.source_bg = mach64->dp_src & 7; - mach64->accel.source_fg = (mach64->dp_src >> 8) & 7; - mach64->accel.source_mix = (mach64->dp_src >> 16) & 7; + mach64->accel.source_bg = mach64->dp_src & 7; + mach64->accel.source_fg = (mach64->dp_src >> 8) & 7; + mach64->accel.source_mix = (mach64->dp_src >> 16) & 7; - mach64->accel.dst_pix_width = mach64->dp_pix_width & 7; - mach64->accel.src_pix_width = (mach64->dp_pix_width >> 8) & 7; - mach64->accel.host_pix_width = (mach64->dp_pix_width >> 16) & 7; + mach64->accel.dst_pix_width = mach64->dp_pix_width & 7; + mach64->accel.src_pix_width = (mach64->dp_pix_width >> 8) & 7; + mach64->accel.host_pix_width = (mach64->dp_pix_width >> 16) & 7; - mach64->accel.dst_size = mach64_width[mach64->accel.dst_pix_width]; - mach64->accel.src_size = mach64_width[mach64->accel.src_pix_width]; - mach64->accel.host_size = mach64_width[mach64->accel.host_pix_width]; + mach64->accel.dst_size = mach64_width[mach64->accel.dst_pix_width]; + mach64->accel.src_size = mach64_width[mach64->accel.src_pix_width]; + mach64->accel.host_size = mach64_width[mach64->accel.host_pix_width]; - if (mach64->accel.src_size == WIDTH_1BIT) - mach64->accel.src_offset <<= 3; - else - mach64->accel.src_offset >>= mach64->accel.src_size; + if (mach64->accel.src_size == WIDTH_1BIT) + mach64->accel.src_offset <<= 3; + else + mach64->accel.src_offset >>= mach64->accel.src_size; - if (mach64->accel.dst_size == WIDTH_1BIT) - mach64->accel.dst_offset <<= 3; - else - mach64->accel.dst_offset >>= mach64->accel.dst_size; + if (mach64->accel.dst_size == WIDTH_1BIT) + mach64->accel.dst_offset <<= 3; + else + mach64->accel.dst_offset >>= mach64->accel.dst_size; - mach64->accel.xinc = (mach64->dst_cntl & DST_X_DIR) ? 1 : -1; - mach64->accel.yinc = (mach64->dst_cntl & DST_Y_DIR) ? 1 : -1; + mach64->accel.xinc = (mach64->dst_cntl & DST_X_DIR) ? 1 : -1; + mach64->accel.yinc = (mach64->dst_cntl & DST_Y_DIR) ? 1 : -1; - mach64->accel.source_host = ((mach64->dp_src & 7) == SRC_HOST) || (((mach64->dp_src >> 8) & 7) == SRC_HOST); + mach64->accel.source_host = ((mach64->dp_src & 7) == SRC_HOST) || (((mach64->dp_src >> 8) & 7) == SRC_HOST); - - for (y = 0; y < 8; y++) - { - for (x = 0; x < 8; x++) - { - uint32_t temp = (y & 4) ? mach64->pat_reg1 : mach64->pat_reg0; - mach64->accel.pattern[y][7 - x] = (temp >> (x + ((y & 3) * 8))) & 1; - } + for (y = 0; y < 8; y++) { + for (x = 0; x < 8; x++) { + uint32_t temp = (y & 4) ? mach64->pat_reg1 : mach64->pat_reg0; + mach64->accel.pattern[y][7 - x] = (temp >> (x + ((y & 3) * 8))) & 1; } + } - if (mach64->pat_cntl & 2) { - mach64->accel.pattern_clr4x2[0][0] = (mach64->pat_reg0 & 0xff); - mach64->accel.pattern_clr4x2[0][1] = ((mach64->pat_reg0 >> 8) & 0xff); - mach64->accel.pattern_clr4x2[0][2] = ((mach64->pat_reg0 >> 16) & 0xff); - mach64->accel.pattern_clr4x2[0][3] = ((mach64->pat_reg0 >> 24) & 0xff); - mach64->accel.pattern_clr4x2[1][0] = (mach64->pat_reg1 & 0xff); - mach64->accel.pattern_clr4x2[1][1] = ((mach64->pat_reg1 >> 8) & 0xff); - mach64->accel.pattern_clr4x2[1][2] = ((mach64->pat_reg1 >> 16) & 0xff); - mach64->accel.pattern_clr4x2[1][3] = ((mach64->pat_reg1 >> 24) & 0xff); - } else if (mach64->pat_cntl & 4) { - mach64->accel.pattern_clr8x1[0] = (mach64->pat_reg0 & 0xff); - mach64->accel.pattern_clr8x1[1] = ((mach64->pat_reg0 >> 8) & 0xff); - mach64->accel.pattern_clr8x1[2] = ((mach64->pat_reg0 >> 16) & 0xff); - mach64->accel.pattern_clr8x1[3] = ((mach64->pat_reg0 >> 24) & 0xff); - mach64->accel.pattern_clr8x1[4] = (mach64->pat_reg1 & 0xff); - mach64->accel.pattern_clr8x1[5] = ((mach64->pat_reg1 >> 8) & 0xff); - mach64->accel.pattern_clr8x1[6] = ((mach64->pat_reg1 >> 16) & 0xff); - mach64->accel.pattern_clr8x1[7] = ((mach64->pat_reg1 >> 24) & 0xff); - } + if (mach64->pat_cntl & 2) { + mach64->accel.pattern_clr4x2[0][0] = (mach64->pat_reg0 & 0xff); + mach64->accel.pattern_clr4x2[0][1] = ((mach64->pat_reg0 >> 8) & 0xff); + mach64->accel.pattern_clr4x2[0][2] = ((mach64->pat_reg0 >> 16) & 0xff); + mach64->accel.pattern_clr4x2[0][3] = ((mach64->pat_reg0 >> 24) & 0xff); + mach64->accel.pattern_clr4x2[1][0] = (mach64->pat_reg1 & 0xff); + mach64->accel.pattern_clr4x2[1][1] = ((mach64->pat_reg1 >> 8) & 0xff); + mach64->accel.pattern_clr4x2[1][2] = ((mach64->pat_reg1 >> 16) & 0xff); + mach64->accel.pattern_clr4x2[1][3] = ((mach64->pat_reg1 >> 24) & 0xff); + } else if (mach64->pat_cntl & 4) { + mach64->accel.pattern_clr8x1[0] = (mach64->pat_reg0 & 0xff); + mach64->accel.pattern_clr8x1[1] = ((mach64->pat_reg0 >> 8) & 0xff); + mach64->accel.pattern_clr8x1[2] = ((mach64->pat_reg0 >> 16) & 0xff); + mach64->accel.pattern_clr8x1[3] = ((mach64->pat_reg0 >> 24) & 0xff); + mach64->accel.pattern_clr8x1[4] = (mach64->pat_reg1 & 0xff); + mach64->accel.pattern_clr8x1[5] = ((mach64->pat_reg1 >> 8) & 0xff); + mach64->accel.pattern_clr8x1[6] = ((mach64->pat_reg1 >> 16) & 0xff); + mach64->accel.pattern_clr8x1[7] = ((mach64->pat_reg1 >> 24) & 0xff); + } - mach64->accel.sc_left = mach64->sc_left_right & 0x1fff; - mach64->accel.sc_right = (mach64->sc_left_right >> 16) & 0x1fff; - mach64->accel.sc_top = mach64->sc_top_bottom & 0x7fff; - mach64->accel.sc_bottom = (mach64->sc_top_bottom >> 16) & 0x7fff; + mach64->accel.sc_left = mach64->sc_left_right & 0x1fff; + mach64->accel.sc_right = (mach64->sc_left_right >> 16) & 0x1fff; + mach64->accel.sc_top = mach64->sc_top_bottom & 0x7fff; + mach64->accel.sc_bottom = (mach64->sc_top_bottom >> 16) & 0x7fff; - mach64->accel.dp_frgd_clr = mach64->dp_frgd_clr; - mach64->accel.dp_bkgd_clr = mach64->dp_bkgd_clr; - mach64->accel.write_mask = mach64->write_mask; + mach64->accel.dp_frgd_clr = mach64->dp_frgd_clr; + mach64->accel.dp_bkgd_clr = mach64->dp_bkgd_clr; + mach64->accel.write_mask = mach64->write_mask; - mach64->accel.clr_cmp_clr = mach64->clr_cmp_clr & mach64->clr_cmp_mask; - mach64->accel.clr_cmp_mask = mach64->clr_cmp_mask; - mach64->accel.clr_cmp_fn = mach64->clr_cmp_cntl & 7; - mach64->accel.clr_cmp_src = mach64->clr_cmp_cntl & (1 << 24); + mach64->accel.clr_cmp_clr = mach64->clr_cmp_clr & mach64->clr_cmp_mask; + mach64->accel.clr_cmp_mask = mach64->clr_cmp_mask; + mach64->accel.clr_cmp_fn = mach64->clr_cmp_cntl & 7; + mach64->accel.clr_cmp_src = mach64->clr_cmp_cntl & (1 << 24); - mach64->accel.poly_draw = 0; + mach64->accel.poly_draw = 0; - mach64->accel.busy = 1; - mach64_log("mach64_start_fill : dst %i, %i src %i, %i size %i, %i src pitch %i offset %X dst pitch %i offset %X scissor %i %i %i %i src_fg %i mix %02X %02X\n", mach64->accel.dst_x_start, mach64->accel.dst_y_start, mach64->accel.src_x_start, mach64->accel.src_y_start, mach64->accel.dst_width, mach64->accel.dst_height, mach64->accel.src_pitch, mach64->accel.src_offset, mach64->accel.dst_pitch, mach64->accel.dst_offset, mach64->accel.sc_left, mach64->accel.sc_right, mach64->accel.sc_top, mach64->accel.sc_bottom, mach64->accel.source_fg, mach64->accel.mix_fg, mach64->accel.mix_bg); + mach64->accel.busy = 1; + mach64_log("mach64_start_fill : dst %i, %i src %i, %i size %i, %i src pitch %i offset %X dst pitch %i offset %X scissor %i %i %i %i src_fg %i mix %02X %02X\n", mach64->accel.dst_x_start, mach64->accel.dst_y_start, mach64->accel.src_x_start, mach64->accel.src_y_start, mach64->accel.dst_width, mach64->accel.dst_height, mach64->accel.src_pitch, mach64->accel.src_offset, mach64->accel.dst_pitch, mach64->accel.dst_offset, mach64->accel.sc_left, mach64->accel.sc_right, mach64->accel.sc_top, mach64->accel.sc_bottom, mach64->accel.source_fg, mach64->accel.mix_fg, mach64->accel.mix_bg); - mach64->accel.op = OP_RECT; + mach64->accel.op = OP_RECT; } -void mach64_start_line(mach64_t *mach64) +void +mach64_start_line(mach64_t *mach64) { - int x, y; + int x, y; - mach64->accel.dst_x = (mach64->dst_y_x >> 16) & 0xfff; - mach64->accel.dst_y = mach64->dst_y_x & 0xfff; + mach64->accel.dst_x = (mach64->dst_y_x >> 16) & 0xfff; + mach64->accel.dst_y = mach64->dst_y_x & 0xfff; - mach64->accel.src_x = (mach64->src_y_x >> 16) & 0xfff; - mach64->accel.src_y = mach64->src_y_x & 0xfff; + mach64->accel.src_x = (mach64->src_y_x >> 16) & 0xfff; + mach64->accel.src_y = mach64->src_y_x & 0xfff; - mach64->accel.src_pitch = (mach64->src_off_pitch >> 22) * 8; - mach64->accel.src_offset = (mach64->src_off_pitch & 0xfffff) * 8; + mach64->accel.src_pitch = (mach64->src_off_pitch >> 22) * 8; + mach64->accel.src_offset = (mach64->src_off_pitch & 0xfffff) * 8; - mach64->accel.dst_pitch = (mach64->dst_off_pitch >> 22) * 8; - mach64->accel.dst_offset = (mach64->dst_off_pitch & 0xfffff) * 8; + mach64->accel.dst_pitch = (mach64->dst_off_pitch >> 22) * 8; + mach64->accel.dst_offset = (mach64->dst_off_pitch & 0xfffff) * 8; - mach64->accel.mix_fg = (mach64->dp_mix >> 16) & 0x1f; - mach64->accel.mix_bg = mach64->dp_mix & 0x1f; + mach64->accel.mix_fg = (mach64->dp_mix >> 16) & 0x1f; + mach64->accel.mix_bg = mach64->dp_mix & 0x1f; - mach64->accel.source_bg = mach64->dp_src & 7; - mach64->accel.source_fg = (mach64->dp_src >> 8) & 7; - mach64->accel.source_mix = (mach64->dp_src >> 16) & 7; + mach64->accel.source_bg = mach64->dp_src & 7; + mach64->accel.source_fg = (mach64->dp_src >> 8) & 7; + mach64->accel.source_mix = (mach64->dp_src >> 16) & 7; - mach64->accel.dst_pix_width = mach64->dp_pix_width & 7; - mach64->accel.src_pix_width = (mach64->dp_pix_width >> 8) & 7; - mach64->accel.host_pix_width = (mach64->dp_pix_width >> 16) & 7; + mach64->accel.dst_pix_width = mach64->dp_pix_width & 7; + mach64->accel.src_pix_width = (mach64->dp_pix_width >> 8) & 7; + mach64->accel.host_pix_width = (mach64->dp_pix_width >> 16) & 7; - mach64->accel.dst_size = mach64_width[mach64->accel.dst_pix_width]; - mach64->accel.src_size = mach64_width[mach64->accel.src_pix_width]; - mach64->accel.host_size = mach64_width[mach64->accel.host_pix_width]; + mach64->accel.dst_size = mach64_width[mach64->accel.dst_pix_width]; + mach64->accel.src_size = mach64_width[mach64->accel.src_pix_width]; + mach64->accel.host_size = mach64_width[mach64->accel.host_pix_width]; - if (mach64->accel.src_size == WIDTH_1BIT) - mach64->accel.src_offset <<= 3; - else - mach64->accel.src_offset >>= mach64->accel.src_size; + if (mach64->accel.src_size == WIDTH_1BIT) + mach64->accel.src_offset <<= 3; + else + mach64->accel.src_offset >>= mach64->accel.src_size; - if (mach64->accel.dst_size == WIDTH_1BIT) - mach64->accel.dst_offset <<= 3; - else - mach64->accel.dst_offset >>= mach64->accel.dst_size; + if (mach64->accel.dst_size == WIDTH_1BIT) + mach64->accel.dst_offset <<= 3; + else + mach64->accel.dst_offset >>= mach64->accel.dst_size; -/* mach64->accel.src_pitch *= mach64_inc[mach64->accel.src_pix_width]; - mach64->accel.dst_pitch *= mach64_inc[mach64->accel.dst_pix_width];*/ + /* mach64->accel.src_pitch *= mach64_inc[mach64->accel.src_pix_width]; + mach64->accel.dst_pitch *= mach64_inc[mach64->accel.dst_pix_width];*/ - mach64->accel.source_host = ((mach64->dp_src & 7) == SRC_HOST) || (((mach64->dp_src >> 8) & 7) == SRC_HOST); + mach64->accel.source_host = ((mach64->dp_src & 7) == SRC_HOST) || (((mach64->dp_src >> 8) & 7) == SRC_HOST); - for (y = 0; y < 8; y++) - { - for (x = 0; x < 8; x++) - { - uint32_t temp = (y & 4) ? mach64->pat_reg1 : mach64->pat_reg0; - mach64->accel.pattern[y][7 - x] = (temp >> (x + ((y & 3) * 8))) & 1; - } + for (y = 0; y < 8; y++) { + for (x = 0; x < 8; x++) { + uint32_t temp = (y & 4) ? mach64->pat_reg1 : mach64->pat_reg0; + mach64->accel.pattern[y][7 - x] = (temp >> (x + ((y & 3) * 8))) & 1; } + } - mach64->accel.sc_left = mach64->sc_left_right & 0x1fff; - mach64->accel.sc_right = (mach64->sc_left_right >> 16) & 0x1fff; - mach64->accel.sc_top = mach64->sc_top_bottom & 0x7fff; - mach64->accel.sc_bottom = (mach64->sc_top_bottom >> 16) & 0x7fff; + mach64->accel.sc_left = mach64->sc_left_right & 0x1fff; + mach64->accel.sc_right = (mach64->sc_left_right >> 16) & 0x1fff; + mach64->accel.sc_top = mach64->sc_top_bottom & 0x7fff; + mach64->accel.sc_bottom = (mach64->sc_top_bottom >> 16) & 0x7fff; - mach64->accel.dp_frgd_clr = mach64->dp_frgd_clr; - mach64->accel.dp_bkgd_clr = mach64->dp_bkgd_clr; - mach64->accel.write_mask = mach64->write_mask; + mach64->accel.dp_frgd_clr = mach64->dp_frgd_clr; + mach64->accel.dp_bkgd_clr = mach64->dp_bkgd_clr; + mach64->accel.write_mask = mach64->write_mask; - mach64->accel.x_count = mach64->dst_bres_lnth & 0x7fff; - mach64->accel.err = (mach64->dst_bres_err & 0x3ffff) | ((mach64->dst_bres_err & 0x40000) ? 0xfffc0000 : 0); + mach64->accel.x_count = mach64->dst_bres_lnth & 0x7fff; + mach64->accel.err = (mach64->dst_bres_err & 0x3ffff) | ((mach64->dst_bres_err & 0x40000) ? 0xfffc0000 : 0); - mach64->accel.clr_cmp_clr = mach64->clr_cmp_clr & mach64->clr_cmp_mask; - mach64->accel.clr_cmp_mask = mach64->clr_cmp_mask; - mach64->accel.clr_cmp_fn = mach64->clr_cmp_cntl & 7; - mach64->accel.clr_cmp_src = mach64->clr_cmp_cntl & (1 << 24); + mach64->accel.clr_cmp_clr = mach64->clr_cmp_clr & mach64->clr_cmp_mask; + mach64->accel.clr_cmp_mask = mach64->clr_cmp_mask; + mach64->accel.clr_cmp_fn = mach64->clr_cmp_cntl & 7; + mach64->accel.clr_cmp_src = mach64->clr_cmp_cntl & (1 << 24); - mach64->accel.xinc = (mach64->dst_cntl & DST_X_DIR) ? 1 : -1; - mach64->accel.yinc = (mach64->dst_cntl & DST_Y_DIR) ? 1 : -1; + mach64->accel.xinc = (mach64->dst_cntl & DST_X_DIR) ? 1 : -1; + mach64->accel.yinc = (mach64->dst_cntl & DST_Y_DIR) ? 1 : -1; - mach64->accel.busy = 1; - mach64_log("mach64_start_line\n"); + mach64->accel.busy = 1; + mach64_log("mach64_start_line\n"); - mach64->accel.op = OP_LINE; + mach64->accel.op = OP_LINE; } -#define READ(addr, dat, width) if (width == 0) dat = svga->vram[((addr)) & mach64->vram_mask]; \ - else if (width == 1) dat = *(uint16_t *)&svga->vram[((addr) << 1) & mach64->vram_mask]; \ - else if (width == 2) dat = *(uint32_t *)&svga->vram[((addr) << 2) & mach64->vram_mask]; \ - else if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) dat = (svga->vram[((addr) >> 3) & mach64->vram_mask] >> ((addr) & 7)) & 1; \ - else dat = (svga->vram[((addr) >> 3) & mach64->vram_mask] >> (7 - ((addr) & 7))) & 1; +#define READ(addr, dat, width) \ + if (width == 0) \ + dat = svga->vram[((addr)) & mach64->vram_mask]; \ + else if (width == 1) \ + dat = *(uint16_t *) &svga->vram[((addr) << 1) & mach64->vram_mask]; \ + else if (width == 2) \ + dat = *(uint32_t *) &svga->vram[((addr) << 2) & mach64->vram_mask]; \ + else if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) \ + dat = (svga->vram[((addr) >> 3) & mach64->vram_mask] >> ((addr) &7)) & 1; \ + else \ + dat = (svga->vram[((addr) >> 3) & mach64->vram_mask] >> (7 - ((addr) &7))) & 1; -#define MIX switch (mix ? mach64->accel.mix_fg : mach64->accel.mix_bg) \ - { \ - case 0x0: dest_dat = ~dest_dat; break; \ - case 0x1: dest_dat = 0; break; \ - case 0x2: dest_dat = 0xffffffff; break; \ - case 0x3: dest_dat = dest_dat; break; \ - case 0x4: dest_dat = ~src_dat; break; \ - case 0x5: dest_dat = src_dat ^ dest_dat; break; \ - case 0x6: dest_dat = ~(src_dat ^ dest_dat); break; \ - case 0x7: dest_dat = src_dat; break; \ - case 0x8: dest_dat = ~(src_dat & dest_dat); break; \ - case 0x9: dest_dat = ~src_dat | dest_dat; break; \ - case 0xa: dest_dat = src_dat | ~dest_dat; break; \ - case 0xb: dest_dat = src_dat | dest_dat; break; \ - case 0xc: dest_dat = src_dat & dest_dat; break; \ - case 0xd: dest_dat = src_dat & ~dest_dat; break; \ - case 0xe: dest_dat = ~src_dat & dest_dat; break; \ - case 0xf: dest_dat = ~(src_dat | dest_dat); break; \ - case 0x17: dest_dat = (dest_dat + src_dat) >> 1; \ +#define MIX \ + switch (mix ? mach64->accel.mix_fg : mach64->accel.mix_bg) { \ + case 0x0: \ + dest_dat = ~dest_dat; \ + break; \ + case 0x1: \ + dest_dat = 0; \ + break; \ + case 0x2: \ + dest_dat = 0xffffffff; \ + break; \ + case 0x3: \ + dest_dat = dest_dat; \ + break; \ + case 0x4: \ + dest_dat = ~src_dat; \ + break; \ + case 0x5: \ + dest_dat = src_dat ^ dest_dat; \ + break; \ + case 0x6: \ + dest_dat = ~(src_dat ^ dest_dat); \ + break; \ + case 0x7: \ + dest_dat = src_dat; \ + break; \ + case 0x8: \ + dest_dat = ~(src_dat & dest_dat); \ + break; \ + case 0x9: \ + dest_dat = ~src_dat | dest_dat; \ + break; \ + case 0xa: \ + dest_dat = src_dat | ~dest_dat; \ + break; \ + case 0xb: \ + dest_dat = src_dat | dest_dat; \ + break; \ + case 0xc: \ + dest_dat = src_dat & dest_dat; \ + break; \ + case 0xd: \ + dest_dat = src_dat & ~dest_dat; \ + break; \ + case 0xe: \ + dest_dat = ~src_dat & dest_dat; \ + break; \ + case 0xf: \ + dest_dat = ~(src_dat | dest_dat); \ + break; \ + case 0x17: \ + dest_dat = (dest_dat + src_dat) >> 1; \ + } + +#define WRITE(addr, width) \ + if (width == 0) { \ + svga->vram[(addr) &mach64->vram_mask] = dest_dat; \ + svga->changedvram[((addr) &mach64->vram_mask) >> 12] = changeframecount; \ + } else if (width == 1) { \ + *(uint16_t *) &svga->vram[((addr) << 1) & mach64->vram_mask] = dest_dat; \ + svga->changedvram[(((addr) << 1) & mach64->vram_mask) >> 12] = changeframecount; \ + } else if (width == 2) { \ + *(uint32_t *) &svga->vram[((addr) << 2) & mach64->vram_mask] = dest_dat; \ + svga->changedvram[(((addr) << 2) & mach64->vram_mask) >> 12] = changeframecount; \ + } else { \ + if (dest_dat & 1) { \ + if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) \ + svga->vram[((addr) >> 3) & mach64->vram_mask] |= 1 << ((addr) &7); \ + else \ + svga->vram[((addr) >> 3) & mach64->vram_mask] |= 1 << (7 - ((addr) &7)); \ + } else { \ + if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) \ + svga->vram[((addr) >> 3) & mach64->vram_mask] &= ~(1 << ((addr) &7)); \ + else \ + svga->vram[((addr) >> 3) & mach64->vram_mask] &= ~(1 << (7 - ((addr) &7))); \ + } \ + svga->changedvram[(((addr) >> 3) & mach64->vram_mask) >> 12] = changeframecount; \ + } + +void +mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64) +{ + svga_t *svga = &mach64->svga; + int cmp_clr = 0; + + if (!mach64->accel.busy) { + mach64_log("mach64_blit : return as not busy\n"); + return; + } + switch (mach64->accel.op) { + case OP_RECT: + while (count) { + uint32_t src_dat = 0, dest_dat; + uint32_t host_dat = 0; + uint32_t old_dest_dat; + int mix = 0; + int dst_x = (mach64->accel.dst_x + mach64->accel.dst_x_start) & 0xfff; + int dst_y = (mach64->accel.dst_y + mach64->accel.dst_y_start) & 0xfff; + int src_x; + int src_y = (mach64->accel.src_y + mach64->accel.src_y_start) & 0xfff; + + if (mach64->src_cntl & SRC_LINEAR_EN) + src_x = mach64->accel.src_x; + else + src_x = (mach64->accel.src_x + mach64->accel.src_x_start) & 0xfff; + + if (mach64->accel.source_host) { + host_dat = cpu_dat; + switch (mach64->accel.host_size) { + case 0: + cpu_dat >>= 8; + count -= 8; + break; + case 1: + cpu_dat >>= 16; + count -= 16; + break; + case 2: + count -= 32; + break; + } + } else + count--; + + switch (mach64->accel.source_mix) { + case MONO_SRC_HOST: + if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) { + mix = cpu_dat & 1; + cpu_dat >>= 1; + } else { + mix = cpu_dat >> 31; + cpu_dat <<= 1; + } + break; + case MONO_SRC_PAT: + mix = mach64->accel.pattern[dst_y & 7][dst_x & 7]; + break; + case MONO_SRC_1: + mix = 1; + break; + case MONO_SRC_BLITSRC: + if (mach64->src_cntl & SRC_LINEAR_EN) { + READ(mach64->accel.src_offset + src_x, mix, WIDTH_1BIT); + } else { + READ(mach64->accel.src_offset + (src_y * mach64->accel.src_pitch) + src_x, mix, WIDTH_1BIT); + } + break; } -#define WRITE(addr, width) if (width == 0) \ - { \ - svga->vram[(addr) & mach64->vram_mask] = dest_dat; \ - svga->changedvram[((addr) & mach64->vram_mask) >> 12] = changeframecount; \ - } \ - else if (width == 1) \ - { \ - *(uint16_t *)&svga->vram[((addr) << 1) & mach64->vram_mask] = dest_dat; \ - svga->changedvram[(((addr) << 1) & mach64->vram_mask) >> 12] = changeframecount; \ - } \ - else if (width == 2) \ - { \ - *(uint32_t *)&svga->vram[((addr) << 2) & mach64->vram_mask] = dest_dat; \ - svga->changedvram[(((addr) << 2) & mach64->vram_mask) >> 12] = changeframecount; \ - } \ - else \ - { \ - if (dest_dat & 1) { \ - if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) \ - svga->vram[((addr) >> 3) & mach64->vram_mask] |= 1 << ((addr) & 7); \ - else \ - svga->vram[((addr) >> 3) & mach64->vram_mask] |= 1 << (7 - ((addr) & 7)); \ - } else { \ - if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) \ - svga->vram[((addr) >> 3) & mach64->vram_mask] &= ~(1 << ((addr) & 7)); \ - else \ - svga->vram[((addr) >> 3) & mach64->vram_mask] &= ~(1 << (7 - ((addr) & 7)));\ - } \ - svga->changedvram[(((addr) >> 3) & mach64->vram_mask) >> 12] = changeframecount; \ - } - -void mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64) -{ - svga_t *svga = &mach64->svga; - int cmp_clr = 0; - - if (!mach64->accel.busy) - { - mach64_log("mach64_blit : return as not busy\n"); - return; - } - switch (mach64->accel.op) - { - case OP_RECT: - while (count) - { - uint32_t src_dat = 0, dest_dat; - uint32_t host_dat = 0; - uint32_t old_dest_dat; - int mix = 0; - int dst_x = (mach64->accel.dst_x + mach64->accel.dst_x_start) & 0xfff; - int dst_y = (mach64->accel.dst_y + mach64->accel.dst_y_start) & 0xfff; - int src_x; - int src_y = (mach64->accel.src_y + mach64->accel.src_y_start) & 0xfff; - - if (mach64->src_cntl & SRC_LINEAR_EN) - src_x = mach64->accel.src_x; - else - src_x = (mach64->accel.src_x + mach64->accel.src_x_start) & 0xfff; - - if (mach64->accel.source_host) - { - host_dat = cpu_dat; - switch (mach64->accel.host_size) - { - case 0: - cpu_dat >>= 8; - count -= 8; - break; - case 1: - cpu_dat >>= 16; - count -= 16; - break; - case 2: - count -= 32; - break; - } - } - else - count--; - - switch (mach64->accel.source_mix) - { - case MONO_SRC_HOST: - if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) - { - mix = cpu_dat & 1; - cpu_dat >>= 1; - } - else - { - mix = cpu_dat >> 31; - cpu_dat <<= 1; - } + if (dst_x >= mach64->accel.sc_left && dst_x <= mach64->accel.sc_right && dst_y >= mach64->accel.sc_top && dst_y <= mach64->accel.sc_bottom) { + switch (mix ? mach64->accel.source_fg : mach64->accel.source_bg) { + case SRC_HOST: + src_dat = host_dat; + break; + case SRC_BLITSRC: + READ(mach64->accel.src_offset + (src_y * mach64->accel.src_pitch) + src_x, src_dat, mach64->accel.src_size); + break; + case SRC_FG: + if ((mach64->dst_cntl & (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) == (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) { + if ((mach64->accel.x_count % 3) == 2) + src_dat = mach64->accel.dp_frgd_clr & 0xff; + else if ((mach64->accel.x_count % 3) == 1) + src_dat = (mach64->accel.dp_frgd_clr >> 8) & 0xff; + else if ((mach64->accel.x_count % 3) == 0) + src_dat = (mach64->accel.dp_frgd_clr >> 16) & 0xff; + } else + src_dat = mach64->accel.dp_frgd_clr; + break; + case SRC_BG: + if ((mach64->dst_cntl & (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) == (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) { + if ((mach64->accel.x_count % 3) == 2) + src_dat = mach64->accel.dp_bkgd_clr & 0xff; + else if ((mach64->accel.x_count % 3) == 1) + src_dat = (mach64->accel.dp_bkgd_clr >> 8) & 0xff; + else if ((mach64->accel.x_count % 3) == 0) + src_dat = (mach64->accel.dp_bkgd_clr >> 16) & 0xff; + } else + src_dat = mach64->accel.dp_bkgd_clr; + break; + case SRC_PAT: + if (mach64->pat_cntl & 2) { + src_dat = mach64->accel.pattern_clr4x2[dst_y & 1][dst_x & 3]; break; - case MONO_SRC_PAT: - mix = mach64->accel.pattern[dst_y & 7][dst_x & 7]; + } else if (mach64->pat_cntl & 4) { + src_dat = mach64->accel.pattern_clr8x1[dst_x & 7]; break; - case MONO_SRC_1: - mix = 1; - break; - case MONO_SRC_BLITSRC: - if (mach64->src_cntl & SRC_LINEAR_EN) - { - READ(mach64->accel.src_offset + src_x, mix, WIDTH_1BIT); - } - else - { - READ(mach64->accel.src_offset + (src_y * mach64->accel.src_pitch) + src_x, mix, WIDTH_1BIT); - } - break; - } - - if (dst_x >= mach64->accel.sc_left && dst_x <= mach64->accel.sc_right && - dst_y >= mach64->accel.sc_top && dst_y <= mach64->accel.sc_bottom) - { - switch (mix ? mach64->accel.source_fg : mach64->accel.source_bg) - { - case SRC_HOST: - src_dat = host_dat; - break; - case SRC_BLITSRC: - READ(mach64->accel.src_offset + (src_y * mach64->accel.src_pitch) + src_x, src_dat, mach64->accel.src_size); - break; - case SRC_FG: - if ((mach64->dst_cntl & (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) == (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) { - if ((mach64->accel.x_count % 3) == 2) - src_dat = mach64->accel.dp_frgd_clr & 0xff; - else if ((mach64->accel.x_count % 3) == 1) - src_dat = (mach64->accel.dp_frgd_clr >> 8) & 0xff; - else if ((mach64->accel.x_count % 3) == 0) - src_dat = (mach64->accel.dp_frgd_clr >> 16) & 0xff; - } else - src_dat = mach64->accel.dp_frgd_clr; - break; - case SRC_BG: - if ((mach64->dst_cntl & (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) == (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) { - if ((mach64->accel.x_count % 3) == 2) - src_dat = mach64->accel.dp_bkgd_clr & 0xff; - else if ((mach64->accel.x_count % 3) == 1) - src_dat = (mach64->accel.dp_bkgd_clr >> 8) & 0xff; - else if ((mach64->accel.x_count % 3) == 0) - src_dat = (mach64->accel.dp_bkgd_clr >> 16) & 0xff; - } else - src_dat = mach64->accel.dp_bkgd_clr; - break; - case SRC_PAT: - if (mach64->pat_cntl & 2) { - src_dat = mach64->accel.pattern_clr4x2[dst_y & 1][dst_x & 3]; - break; - } else if (mach64->pat_cntl & 4) { - src_dat = mach64->accel.pattern_clr8x1[dst_x & 7]; - break; - } - default: - src_dat = 0; - break; - } - - if (mach64->dst_cntl & DST_POLYGON_EN) - { - int poly_src; - READ(mach64->accel.src_offset + (src_y * mach64->accel.src_pitch) + src_x, poly_src, mach64->accel.src_size); - if (poly_src) - mach64->accel.poly_draw = !mach64->accel.poly_draw; - } - - if (!(mach64->dst_cntl & DST_POLYGON_EN) || mach64->accel.poly_draw) - { - READ(mach64->accel.dst_offset + (dst_y * mach64->accel.dst_pitch) + dst_x, dest_dat, mach64->accel.dst_size); - - switch (mach64->accel.clr_cmp_fn) - { - case 1: /*TRUE*/ - cmp_clr = 1; - break; - case 4: /*DST_CLR != CLR_CMP_CLR*/ - cmp_clr = (((mach64->accel.clr_cmp_src) ? src_dat : dest_dat) & mach64->accel.clr_cmp_mask) != mach64->accel.clr_cmp_clr; - break; - case 5: /*DST_CLR == CLR_CMP_CLR*/ - cmp_clr = (((mach64->accel.clr_cmp_src) ? src_dat : dest_dat) & mach64->accel.clr_cmp_mask) == mach64->accel.clr_cmp_clr; - break; - } - - if (!cmp_clr) { - old_dest_dat = dest_dat; - MIX - dest_dat = (dest_dat & mach64->accel.write_mask) | (old_dest_dat & ~mach64->accel.write_mask); - } - - WRITE(mach64->accel.dst_offset + (dst_y * mach64->accel.dst_pitch) + dst_x, mach64->accel.dst_size); - } - } - - if (((mach64->crtc_gen_cntl >> 8) & 7) == BPP_24) { - if ((mach64->dst_cntl & (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) != (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) { - mach64->accel.dp_frgd_clr = ((mach64->accel.dp_frgd_clr >> 8) & 0xffff) | (mach64->accel.dp_frgd_clr << 16); - mach64->accel.dp_bkgd_clr = ((mach64->accel.dp_bkgd_clr >> 8) & 0xffff) | (mach64->accel.dp_bkgd_clr << 16); - mach64->accel.write_mask = ((mach64->accel.write_mask >> 8) & 0xffff) | (mach64->accel.write_mask << 16); } - } + default: + src_dat = 0; + break; + } - mach64->accel.src_x += mach64->accel.xinc; - mach64->accel.dst_x += mach64->accel.xinc; - if (!(mach64->src_cntl & SRC_LINEAR_EN)) - { - mach64->accel.src_x_count--; - if (mach64->accel.src_x_count <= 0) - { - mach64->accel.src_x = 0; - if ((mach64->src_cntl & (SRC_PATT_ROT_EN | SRC_PATT_EN)) == (SRC_PATT_ROT_EN | SRC_PATT_EN)) - { - mach64->accel.src_x_start = (mach64->src_y_x_start >> 16) & 0xfff; - mach64->accel.src_x_count = mach64->accel.src_width2; - } - else - mach64->accel.src_x_count = mach64->accel.src_width1; - } - } + if (mach64->dst_cntl & DST_POLYGON_EN) { + int poly_src; + READ(mach64->accel.src_offset + (src_y * mach64->accel.src_pitch) + src_x, poly_src, mach64->accel.src_size); + if (poly_src) + mach64->accel.poly_draw = !mach64->accel.poly_draw; + } - mach64->accel.x_count--; - if (mach64->accel.x_count <= 0) - { - mach64->accel.x_count = mach64->accel.dst_width; - mach64->accel.dst_x = 0; - mach64->accel.dst_y += mach64->accel.yinc; - mach64->accel.src_x_start = (mach64->src_y_x >> 16) & 0xfff; - mach64->accel.src_x_count = mach64->accel.src_width1; + if (!(mach64->dst_cntl & DST_POLYGON_EN) || mach64->accel.poly_draw) { + READ(mach64->accel.dst_offset + (dst_y * mach64->accel.dst_pitch) + dst_x, dest_dat, mach64->accel.dst_size); - if (!(mach64->src_cntl & SRC_LINEAR_EN)) - { - mach64->accel.src_x = 0; - mach64->accel.src_y += mach64->accel.yinc; - mach64->accel.src_y_count--; - if (mach64->accel.src_y_count <= 0) - { - mach64->accel.src_y = 0; - if ((mach64->src_cntl & (SRC_PATT_ROT_EN | SRC_PATT_EN)) == (SRC_PATT_ROT_EN | SRC_PATT_EN)) - { - mach64->accel.src_y_start = mach64->src_y_x_start & 0xfff; - mach64->accel.src_y_count = mach64->accel.src_height2; - } - else - mach64->accel.src_y_count = mach64->accel.src_height1; - } - } - - mach64->accel.poly_draw = 0; - - mach64->accel.dst_height--; - - if (mach64->accel.dst_height <= 0) - { - /*Blit finished*/ - mach64_log("mach64 blit finished\n"); - mach64->accel.busy = 0; - if (mach64->dst_cntl & DST_X_TILE) - mach64->dst_y_x = (mach64->dst_y_x & 0xfff) | ((mach64->dst_y_x + (mach64->accel.dst_width << 16)) & 0xfff0000); - if (mach64->dst_cntl & DST_Y_TILE) - mach64->dst_y_x = (mach64->dst_y_x & 0xfff0000) | ((mach64->dst_y_x + (mach64->dst_height_width & 0x1fff)) & 0xfff); - return; - } - if (mach64->host_cntl & HOST_BYTE_ALIGN) - { - if (mach64->accel.source_mix == MONO_SRC_HOST) - { - if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) - cpu_dat >>= (count & 7); - else - cpu_dat <<= (count & 7); - count &= ~7; - } - } - } - } - break; - - case OP_LINE: - if (((mach64->crtc_gen_cntl >> 8) & 7) == BPP_24) { - int x = 0; - while (count) { - uint32_t src_dat = 0, dest_dat; - uint32_t host_dat = 0; - int mix = 0; - - if (mach64->accel.source_host) - { - host_dat = cpu_dat; - switch (mach64->accel.src_size) - { - case 0: - cpu_dat >>= 8; - count -= 8; - break; - case 1: - cpu_dat >>= 16; - count -= 16; - break; - case 2: - count -= 32; - break; - } - } - else - count--; - - switch (mach64->accel.source_mix) - { - case MONO_SRC_HOST: - if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) - { - mix = cpu_dat & 1; - cpu_dat >>= 1; - } - else - { - mix = cpu_dat >> 31; - cpu_dat <<= 1; - } - break; - case MONO_SRC_PAT: - mix = mach64->accel.pattern[mach64->accel.dst_y & 7][mach64->accel.dst_x & 7]; - break; - case MONO_SRC_1: - mix = 1; - break; - case MONO_SRC_BLITSRC: - READ(mach64->accel.src_offset + (mach64->accel.src_y * mach64->accel.src_pitch) + mach64->accel.src_x, mix, WIDTH_1BIT); - break; - } - - if ((mach64->accel.dst_x >= mach64->accel.sc_left) && (mach64->accel.dst_x <= mach64->accel.sc_right) && - (mach64->accel.dst_y >= mach64->accel.sc_top) && (mach64->accel.dst_y <= mach64->accel.sc_bottom)) { - switch (mix ? mach64->accel.source_fg : mach64->accel.source_bg) - { - case SRC_HOST: - src_dat = host_dat; - break; - case SRC_BLITSRC: - READ(mach64->accel.src_offset + (mach64->accel.src_y * mach64->accel.src_pitch) + mach64->accel.src_x, src_dat, mach64->accel.src_size); - break; - case SRC_FG: - src_dat = mach64->accel.dp_frgd_clr; - break; - case SRC_BG: - src_dat = mach64->accel.dp_bkgd_clr; - break; - case SRC_PAT: - if (mach64->pat_cntl & 2) { - src_dat = mach64->accel.pattern_clr4x2[mach64->accel.dst_y & 1][mach64->accel.dst_x & 3]; - break; - } else if (mach64->pat_cntl & 4) { - src_dat = mach64->accel.pattern_clr8x1[mach64->accel.dst_x & 7]; - break; - } - default: - src_dat = 0; - break; - } - - READ(mach64->accel.dst_offset + (mach64->accel.dst_y * mach64->accel.dst_pitch) + mach64->accel.dst_x, dest_dat, mach64->accel.dst_size); - - switch (mach64->accel.clr_cmp_fn) { - case 1: /*TRUE*/ + switch (mach64->accel.clr_cmp_fn) { + case 1: /*TRUE*/ cmp_clr = 1; break; - case 4: /*DST_CLR != CLR_CMP_CLR*/ + case 4: /*DST_CLR != CLR_CMP_CLR*/ cmp_clr = (((mach64->accel.clr_cmp_src) ? src_dat : dest_dat) & mach64->accel.clr_cmp_mask) != mach64->accel.clr_cmp_clr; break; - case 5: /*DST_CLR == CLR_CMP_CLR*/ + case 5: /*DST_CLR == CLR_CMP_CLR*/ cmp_clr = (((mach64->accel.clr_cmp_src) ? src_dat : dest_dat) & mach64->accel.clr_cmp_mask) == mach64->accel.clr_cmp_clr; break; - } - - if (!cmp_clr) - MIX - - if (!(mach64->dst_cntl & DST_Y_MAJOR)) { - if (x == 0) - dest_dat &= ~1; - } else { - if (x == (mach64->accel.x_count - 1)) - dest_dat &= ~1; - } - - WRITE(mach64->accel.dst_offset + (mach64->accel.dst_y * mach64->accel.dst_pitch) + mach64->accel.dst_x, mach64->accel.dst_size); } - x++; - if (x >= mach64->accel.x_count) { - mach64->accel.busy = 0; - mach64_log("mach64 line24 finished\n"); - return; + if (!cmp_clr) { + old_dest_dat = dest_dat; + MIX + dest_dat + = (dest_dat & mach64->accel.write_mask) | (old_dest_dat & ~mach64->accel.write_mask); } - if (mach64->dst_cntl & DST_Y_MAJOR) { - mach64->accel.dst_y += mach64->accel.yinc; - if (mach64->accel.err >= 0) { - mach64->accel.err += mach64->dst_bres_dec; - mach64->accel.dst_x += mach64->accel.xinc; - } else { - mach64->accel.err += mach64->dst_bres_inc; - } - } else { - mach64->accel.dst_x += mach64->accel.xinc; - if (mach64->accel.err >= 0) { - mach64->accel.err += mach64->dst_bres_dec; - mach64->accel.dst_y += mach64->accel.yinc; - } else { - mach64->accel.err += mach64->dst_bres_inc; - } - } - } - } else { - while (count) - { - uint32_t src_dat = 0, dest_dat; - uint32_t host_dat = 0; - int mix = 0; - int draw_pixel = !(mach64->dst_cntl & DST_POLYGON_EN); - - if (mach64->accel.source_host) - { - host_dat = cpu_dat; - switch (mach64->accel.src_size) - { - case 0: - cpu_dat >>= 8; - count -= 8; - break; - case 1: - cpu_dat >>= 16; - count -= 16; - break; - case 2: - count -= 32; - break; - } - } - else - count--; - - switch (mach64->accel.source_mix) - { - case MONO_SRC_HOST: - mix = cpu_dat >> 31; - cpu_dat <<= 1; - break; - case MONO_SRC_PAT: - mix = mach64->accel.pattern[mach64->accel.dst_y & 7][mach64->accel.dst_x & 7]; - break; - case MONO_SRC_1: - default: - mix = 1; - break; - } - - if (mach64->dst_cntl & DST_POLYGON_EN) - { - if (mach64->dst_cntl & DST_Y_MAJOR) - draw_pixel = 1; - else if ((mach64->dst_cntl & DST_X_DIR) && mach64->accel.err < (mach64->dst_bres_dec + mach64->dst_bres_inc)) /*X+*/ - draw_pixel = 1; - else if (!(mach64->dst_cntl & DST_X_DIR) && mach64->accel.err >= 0) /*X-*/ - draw_pixel = 1; - } - - if (mach64->accel.x_count == 1 && !(mach64->dst_cntl & DST_LAST_PEL)) - draw_pixel = 0; - - if (mach64->accel.dst_x >= mach64->accel.sc_left && mach64->accel.dst_x <= mach64->accel.sc_right && - mach64->accel.dst_y >= mach64->accel.sc_top && mach64->accel.dst_y <= mach64->accel.sc_bottom && draw_pixel) - { - switch (mix ? mach64->accel.source_fg : mach64->accel.source_bg) - { - case SRC_HOST: - src_dat = host_dat; - break; - case SRC_BLITSRC: - READ(mach64->accel.src_offset + (mach64->accel.src_y * mach64->accel.src_pitch) + mach64->accel.src_x, src_dat, mach64->accel.src_size); - break; - case SRC_FG: - src_dat = mach64->accel.dp_frgd_clr; - break; - case SRC_BG: - src_dat = mach64->accel.dp_bkgd_clr; - break; - default: - src_dat = 0; - break; - } - - READ(mach64->accel.dst_offset + (mach64->accel.dst_y * mach64->accel.dst_pitch) + mach64->accel.dst_x, dest_dat, mach64->accel.dst_size); - - switch (mach64->accel.clr_cmp_fn) - { - case 1: /*TRUE*/ - cmp_clr = 1; - break; - case 4: /*DST_CLR != CLR_CMP_CLR*/ - cmp_clr = (((mach64->accel.clr_cmp_src) ? src_dat : dest_dat) & mach64->accel.clr_cmp_mask) != mach64->accel.clr_cmp_clr; - break; - case 5: /*DST_CLR == CLR_CMP_CLR*/ - cmp_clr = (((mach64->accel.clr_cmp_src) ? src_dat : dest_dat) & mach64->accel.clr_cmp_mask) == mach64->accel.clr_cmp_clr; - break; - } - - if (!cmp_clr) - MIX - - WRITE(mach64->accel.dst_offset + (mach64->accel.dst_y * mach64->accel.dst_pitch) + mach64->accel.dst_x, mach64->accel.dst_size); - } - - mach64->accel.x_count--; - if (mach64->accel.x_count <= 0) - { - /*Blit finished*/ - mach64_log("mach64 blit finished\n"); - mach64->accel.busy = 0; - return; - } - - switch (mach64->dst_cntl & 7) - { - case 0: case 2: - mach64->accel.src_x--; - mach64->accel.dst_x--; - break; - case 1: case 3: - mach64->accel.src_x++; - mach64->accel.dst_x++; - break; - case 4: case 5: - mach64->accel.src_y--; - mach64->accel.dst_y--; - break; - case 6: case 7: - mach64->accel.src_y++; - mach64->accel.dst_y++; - break; - } - mach64_log("x %i y %i err %i inc %i dec %i\n", mach64->accel.dst_x, mach64->accel.dst_y, mach64->accel.err, mach64->dst_bres_inc, mach64->dst_bres_dec); - if (mach64->accel.err >= 0) - { - mach64->accel.err += mach64->dst_bres_dec; - - switch (mach64->dst_cntl & 7) - { - case 0: case 1: - mach64->accel.src_y--; - mach64->accel.dst_y--; - break; - case 2: case 3: - mach64->accel.src_y++; - mach64->accel.dst_y++; - break; - case 4: case 6: - mach64->accel.src_x--; - mach64->accel.dst_x--; - break; - case 5: case 7: - mach64->accel.src_x++; - mach64->accel.dst_x++; - break; - } - } - else - mach64->accel.err += mach64->dst_bres_inc; + WRITE(mach64->accel.dst_offset + (dst_y * mach64->accel.dst_pitch) + dst_x, mach64->accel.dst_size); } } - break; - } + + if (((mach64->crtc_gen_cntl >> 8) & 7) == BPP_24) { + if ((mach64->dst_cntl & (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) != (DST_LAST_PEL | DST_X_DIR | DST_Y_DIR | DST_24_ROT_EN)) { + mach64->accel.dp_frgd_clr = ((mach64->accel.dp_frgd_clr >> 8) & 0xffff) | (mach64->accel.dp_frgd_clr << 16); + mach64->accel.dp_bkgd_clr = ((mach64->accel.dp_bkgd_clr >> 8) & 0xffff) | (mach64->accel.dp_bkgd_clr << 16); + mach64->accel.write_mask = ((mach64->accel.write_mask >> 8) & 0xffff) | (mach64->accel.write_mask << 16); + } + } + + mach64->accel.src_x += mach64->accel.xinc; + mach64->accel.dst_x += mach64->accel.xinc; + if (!(mach64->src_cntl & SRC_LINEAR_EN)) { + mach64->accel.src_x_count--; + if (mach64->accel.src_x_count <= 0) { + mach64->accel.src_x = 0; + if ((mach64->src_cntl & (SRC_PATT_ROT_EN | SRC_PATT_EN)) == (SRC_PATT_ROT_EN | SRC_PATT_EN)) { + mach64->accel.src_x_start = (mach64->src_y_x_start >> 16) & 0xfff; + mach64->accel.src_x_count = mach64->accel.src_width2; + } else + mach64->accel.src_x_count = mach64->accel.src_width1; + } + } + + mach64->accel.x_count--; + if (mach64->accel.x_count <= 0) { + mach64->accel.x_count = mach64->accel.dst_width; + mach64->accel.dst_x = 0; + mach64->accel.dst_y += mach64->accel.yinc; + mach64->accel.src_x_start = (mach64->src_y_x >> 16) & 0xfff; + mach64->accel.src_x_count = mach64->accel.src_width1; + + if (!(mach64->src_cntl & SRC_LINEAR_EN)) { + mach64->accel.src_x = 0; + mach64->accel.src_y += mach64->accel.yinc; + mach64->accel.src_y_count--; + if (mach64->accel.src_y_count <= 0) { + mach64->accel.src_y = 0; + if ((mach64->src_cntl & (SRC_PATT_ROT_EN | SRC_PATT_EN)) == (SRC_PATT_ROT_EN | SRC_PATT_EN)) { + mach64->accel.src_y_start = mach64->src_y_x_start & 0xfff; + mach64->accel.src_y_count = mach64->accel.src_height2; + } else + mach64->accel.src_y_count = mach64->accel.src_height1; + } + } + + mach64->accel.poly_draw = 0; + + mach64->accel.dst_height--; + + if (mach64->accel.dst_height <= 0) { + /*Blit finished*/ + mach64_log("mach64 blit finished\n"); + mach64->accel.busy = 0; + if (mach64->dst_cntl & DST_X_TILE) + mach64->dst_y_x = (mach64->dst_y_x & 0xfff) | ((mach64->dst_y_x + (mach64->accel.dst_width << 16)) & 0xfff0000); + if (mach64->dst_cntl & DST_Y_TILE) + mach64->dst_y_x = (mach64->dst_y_x & 0xfff0000) | ((mach64->dst_y_x + (mach64->dst_height_width & 0x1fff)) & 0xfff); + return; + } + if (mach64->host_cntl & HOST_BYTE_ALIGN) { + if (mach64->accel.source_mix == MONO_SRC_HOST) { + if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) + cpu_dat >>= (count & 7); + else + cpu_dat <<= (count & 7); + count &= ~7; + } + } + } + } + break; + + case OP_LINE: + if (((mach64->crtc_gen_cntl >> 8) & 7) == BPP_24) { + int x = 0; + while (count) { + uint32_t src_dat = 0, dest_dat; + uint32_t host_dat = 0; + int mix = 0; + + if (mach64->accel.source_host) { + host_dat = cpu_dat; + switch (mach64->accel.src_size) { + case 0: + cpu_dat >>= 8; + count -= 8; + break; + case 1: + cpu_dat >>= 16; + count -= 16; + break; + case 2: + count -= 32; + break; + } + } else + count--; + + switch (mach64->accel.source_mix) { + case MONO_SRC_HOST: + if (mach64->dp_pix_width & DP_BYTE_PIX_ORDER) { + mix = cpu_dat & 1; + cpu_dat >>= 1; + } else { + mix = cpu_dat >> 31; + cpu_dat <<= 1; + } + break; + case MONO_SRC_PAT: + mix = mach64->accel.pattern[mach64->accel.dst_y & 7][mach64->accel.dst_x & 7]; + break; + case MONO_SRC_1: + mix = 1; + break; + case MONO_SRC_BLITSRC: + READ(mach64->accel.src_offset + (mach64->accel.src_y * mach64->accel.src_pitch) + mach64->accel.src_x, mix, WIDTH_1BIT); + break; + } + + if ((mach64->accel.dst_x >= mach64->accel.sc_left) && (mach64->accel.dst_x <= mach64->accel.sc_right) && (mach64->accel.dst_y >= mach64->accel.sc_top) && (mach64->accel.dst_y <= mach64->accel.sc_bottom)) { + switch (mix ? mach64->accel.source_fg : mach64->accel.source_bg) { + case SRC_HOST: + src_dat = host_dat; + break; + case SRC_BLITSRC: + READ(mach64->accel.src_offset + (mach64->accel.src_y * mach64->accel.src_pitch) + mach64->accel.src_x, src_dat, mach64->accel.src_size); + break; + case SRC_FG: + src_dat = mach64->accel.dp_frgd_clr; + break; + case SRC_BG: + src_dat = mach64->accel.dp_bkgd_clr; + break; + case SRC_PAT: + if (mach64->pat_cntl & 2) { + src_dat = mach64->accel.pattern_clr4x2[mach64->accel.dst_y & 1][mach64->accel.dst_x & 3]; + break; + } else if (mach64->pat_cntl & 4) { + src_dat = mach64->accel.pattern_clr8x1[mach64->accel.dst_x & 7]; + break; + } + default: + src_dat = 0; + break; + } + + READ(mach64->accel.dst_offset + (mach64->accel.dst_y * mach64->accel.dst_pitch) + mach64->accel.dst_x, dest_dat, mach64->accel.dst_size); + + switch (mach64->accel.clr_cmp_fn) { + case 1: /*TRUE*/ + cmp_clr = 1; + break; + case 4: /*DST_CLR != CLR_CMP_CLR*/ + cmp_clr = (((mach64->accel.clr_cmp_src) ? src_dat : dest_dat) & mach64->accel.clr_cmp_mask) != mach64->accel.clr_cmp_clr; + break; + case 5: /*DST_CLR == CLR_CMP_CLR*/ + cmp_clr = (((mach64->accel.clr_cmp_src) ? src_dat : dest_dat) & mach64->accel.clr_cmp_mask) == mach64->accel.clr_cmp_clr; + break; + } + + if (!cmp_clr) + MIX + + if (!(mach64->dst_cntl & DST_Y_MAJOR)) + { + if (x == 0) + dest_dat &= ~1; + } + else { + if (x == (mach64->accel.x_count - 1)) + dest_dat &= ~1; + } + + WRITE(mach64->accel.dst_offset + (mach64->accel.dst_y * mach64->accel.dst_pitch) + mach64->accel.dst_x, mach64->accel.dst_size); + } + + x++; + if (x >= mach64->accel.x_count) { + mach64->accel.busy = 0; + mach64_log("mach64 line24 finished\n"); + return; + } + + if (mach64->dst_cntl & DST_Y_MAJOR) { + mach64->accel.dst_y += mach64->accel.yinc; + if (mach64->accel.err >= 0) { + mach64->accel.err += mach64->dst_bres_dec; + mach64->accel.dst_x += mach64->accel.xinc; + } else { + mach64->accel.err += mach64->dst_bres_inc; + } + } else { + mach64->accel.dst_x += mach64->accel.xinc; + if (mach64->accel.err >= 0) { + mach64->accel.err += mach64->dst_bres_dec; + mach64->accel.dst_y += mach64->accel.yinc; + } else { + mach64->accel.err += mach64->dst_bres_inc; + } + } + } + } else { + while (count) { + uint32_t src_dat = 0, dest_dat; + uint32_t host_dat = 0; + int mix = 0; + int draw_pixel = !(mach64->dst_cntl & DST_POLYGON_EN); + + if (mach64->accel.source_host) { + host_dat = cpu_dat; + switch (mach64->accel.src_size) { + case 0: + cpu_dat >>= 8; + count -= 8; + break; + case 1: + cpu_dat >>= 16; + count -= 16; + break; + case 2: + count -= 32; + break; + } + } else + count--; + + switch (mach64->accel.source_mix) { + case MONO_SRC_HOST: + mix = cpu_dat >> 31; + cpu_dat <<= 1; + break; + case MONO_SRC_PAT: + mix = mach64->accel.pattern[mach64->accel.dst_y & 7][mach64->accel.dst_x & 7]; + break; + case MONO_SRC_1: + default: + mix = 1; + break; + } + + if (mach64->dst_cntl & DST_POLYGON_EN) { + if (mach64->dst_cntl & DST_Y_MAJOR) + draw_pixel = 1; + else if ((mach64->dst_cntl & DST_X_DIR) && mach64->accel.err < (mach64->dst_bres_dec + mach64->dst_bres_inc)) /*X+*/ + draw_pixel = 1; + else if (!(mach64->dst_cntl & DST_X_DIR) && mach64->accel.err >= 0) /*X-*/ + draw_pixel = 1; + } + + if (mach64->accel.x_count == 1 && !(mach64->dst_cntl & DST_LAST_PEL)) + draw_pixel = 0; + + if (mach64->accel.dst_x >= mach64->accel.sc_left && mach64->accel.dst_x <= mach64->accel.sc_right && mach64->accel.dst_y >= mach64->accel.sc_top && mach64->accel.dst_y <= mach64->accel.sc_bottom && draw_pixel) { + switch (mix ? mach64->accel.source_fg : mach64->accel.source_bg) { + case SRC_HOST: + src_dat = host_dat; + break; + case SRC_BLITSRC: + READ(mach64->accel.src_offset + (mach64->accel.src_y * mach64->accel.src_pitch) + mach64->accel.src_x, src_dat, mach64->accel.src_size); + break; + case SRC_FG: + src_dat = mach64->accel.dp_frgd_clr; + break; + case SRC_BG: + src_dat = mach64->accel.dp_bkgd_clr; + break; + default: + src_dat = 0; + break; + } + + READ(mach64->accel.dst_offset + (mach64->accel.dst_y * mach64->accel.dst_pitch) + mach64->accel.dst_x, dest_dat, mach64->accel.dst_size); + + switch (mach64->accel.clr_cmp_fn) { + case 1: /*TRUE*/ + cmp_clr = 1; + break; + case 4: /*DST_CLR != CLR_CMP_CLR*/ + cmp_clr = (((mach64->accel.clr_cmp_src) ? src_dat : dest_dat) & mach64->accel.clr_cmp_mask) != mach64->accel.clr_cmp_clr; + break; + case 5: /*DST_CLR == CLR_CMP_CLR*/ + cmp_clr = (((mach64->accel.clr_cmp_src) ? src_dat : dest_dat) & mach64->accel.clr_cmp_mask) == mach64->accel.clr_cmp_clr; + break; + } + + if (!cmp_clr) + MIX + + WRITE(mach64->accel.dst_offset + (mach64->accel.dst_y * mach64->accel.dst_pitch) + mach64->accel.dst_x, mach64->accel.dst_size); + } + + mach64->accel.x_count--; + if (mach64->accel.x_count <= 0) { + /*Blit finished*/ + mach64_log("mach64 blit finished\n"); + mach64->accel.busy = 0; + return; + } + + switch (mach64->dst_cntl & 7) { + case 0: + case 2: + mach64->accel.src_x--; + mach64->accel.dst_x--; + break; + case 1: + case 3: + mach64->accel.src_x++; + mach64->accel.dst_x++; + break; + case 4: + case 5: + mach64->accel.src_y--; + mach64->accel.dst_y--; + break; + case 6: + case 7: + mach64->accel.src_y++; + mach64->accel.dst_y++; + break; + } + mach64_log("x %i y %i err %i inc %i dec %i\n", mach64->accel.dst_x, mach64->accel.dst_y, mach64->accel.err, mach64->dst_bres_inc, mach64->dst_bres_dec); + if (mach64->accel.err >= 0) { + mach64->accel.err += mach64->dst_bres_dec; + + switch (mach64->dst_cntl & 7) { + case 0: + case 1: + mach64->accel.src_y--; + mach64->accel.dst_y--; + break; + case 2: + case 3: + mach64->accel.src_y++; + mach64->accel.dst_y++; + break; + case 4: + case 6: + mach64->accel.src_x--; + mach64->accel.dst_x--; + break; + case 5: + case 7: + mach64->accel.src_x++; + mach64->accel.dst_x++; + break; + } + } else + mach64->accel.err += mach64->dst_bres_inc; + } + } + break; + } } -void mach64_load_context(mach64_t *mach64) +void +mach64_load_context(mach64_t *mach64) { - svga_t *svga = &mach64->svga; - uint32_t addr; + svga_t *svga = &mach64->svga; + uint32_t addr; - while (mach64->context_load_cntl & 0x30000) - { - addr = ((0x3fff - (mach64->context_load_cntl & 0x3fff)) * 256) & mach64->vram_mask; - mach64->context_mask = *(uint32_t *)&svga->vram[addr]; - mach64_log("mach64_load_context %08X from %08X : mask %08X\n", mach64->context_load_cntl, addr, mach64->context_mask); + while (mach64->context_load_cntl & 0x30000) { + addr = ((0x3fff - (mach64->context_load_cntl & 0x3fff)) * 256) & mach64->vram_mask; + mach64->context_mask = *(uint32_t *) &svga->vram[addr]; + mach64_log("mach64_load_context %08X from %08X : mask %08X\n", mach64->context_load_cntl, addr, mach64->context_mask); - if (mach64->context_mask & (1 << 2)) - mach64_accel_write_fifo_l(mach64, 0x100, *(uint32_t *)&svga->vram[addr + 0x08]); - if (mach64->context_mask & (1 << 3)) - mach64_accel_write_fifo_l(mach64, 0x10c, *(uint32_t *)&svga->vram[addr + 0x0c]); - if (mach64->context_mask & (1 << 4)) - mach64_accel_write_fifo_l(mach64, 0x118, *(uint32_t *)&svga->vram[addr + 0x10]); - if (mach64->context_mask & (1 << 5)) - mach64_accel_write_fifo_l(mach64, 0x124, *(uint32_t *)&svga->vram[addr + 0x14]); - if (mach64->context_mask & (1 << 6)) - mach64_accel_write_fifo_l(mach64, 0x128, *(uint32_t *)&svga->vram[addr + 0x18]); - if (mach64->context_mask & (1 << 7)) - mach64_accel_write_fifo_l(mach64, 0x12c, *(uint32_t *)&svga->vram[addr + 0x1c]); - if (mach64->context_mask & (1 << 8)) - mach64_accel_write_fifo_l(mach64, 0x180, *(uint32_t *)&svga->vram[addr + 0x20]); - if (mach64->context_mask & (1 << 9)) - mach64_accel_write_fifo_l(mach64, 0x18c, *(uint32_t *)&svga->vram[addr + 0x24]); - if (mach64->context_mask & (1 << 10)) - mach64_accel_write_fifo_l(mach64, 0x198, *(uint32_t *)&svga->vram[addr + 0x28]); - if (mach64->context_mask & (1 << 11)) - mach64_accel_write_fifo_l(mach64, 0x1a4, *(uint32_t *)&svga->vram[addr + 0x2c]); - if (mach64->context_mask & (1 << 12)) - mach64_accel_write_fifo_l(mach64, 0x1b0, *(uint32_t *)&svga->vram[addr + 0x30]); - if (mach64->context_mask & (1 << 13)) - mach64_accel_write_fifo_l(mach64, 0x280, *(uint32_t *)&svga->vram[addr + 0x34]); - if (mach64->context_mask & (1 << 14)) - mach64_accel_write_fifo_l(mach64, 0x284, *(uint32_t *)&svga->vram[addr + 0x38]); - if (mach64->context_mask & (1 << 15)) - mach64_accel_write_fifo_l(mach64, 0x2a8, *(uint32_t *)&svga->vram[addr + 0x3c]); - if (mach64->context_mask & (1 << 16)) - mach64_accel_write_fifo_l(mach64, 0x2b4, *(uint32_t *)&svga->vram[addr + 0x40]); - if (mach64->context_mask & (1 << 17)) - mach64_accel_write_fifo_l(mach64, 0x2c0, *(uint32_t *)&svga->vram[addr + 0x44]); - if (mach64->context_mask & (1 << 18)) - mach64_accel_write_fifo_l(mach64, 0x2c4, *(uint32_t *)&svga->vram[addr + 0x48]); - if (mach64->context_mask & (1 << 19)) - mach64_accel_write_fifo_l(mach64, 0x2c8, *(uint32_t *)&svga->vram[addr + 0x4c]); - if (mach64->context_mask & (1 << 20)) - mach64_accel_write_fifo_l(mach64, 0x2cc, *(uint32_t *)&svga->vram[addr + 0x50]); - if (mach64->context_mask & (1 << 21)) - mach64_accel_write_fifo_l(mach64, 0x2d0, *(uint32_t *)&svga->vram[addr + 0x54]); - if (mach64->context_mask & (1 << 22)) - mach64_accel_write_fifo_l(mach64, 0x2d4, *(uint32_t *)&svga->vram[addr + 0x58]); - if (mach64->context_mask & (1 << 23)) - mach64_accel_write_fifo_l(mach64, 0x2d8, *(uint32_t *)&svga->vram[addr + 0x5c]); - if (mach64->context_mask & (1 << 24)) - mach64_accel_write_fifo_l(mach64, 0x300, *(uint32_t *)&svga->vram[addr + 0x60]); - if (mach64->context_mask & (1 << 25)) - mach64_accel_write_fifo_l(mach64, 0x304, *(uint32_t *)&svga->vram[addr + 0x64]); - if (mach64->context_mask & (1 << 26)) - mach64_accel_write_fifo_l(mach64, 0x308, *(uint32_t *)&svga->vram[addr + 0x68]); - if (mach64->context_mask & (1 << 27)) - mach64_accel_write_fifo_l(mach64, 0x330, *(uint32_t *)&svga->vram[addr + 0x6c]); + if (mach64->context_mask & (1 << 2)) + mach64_accel_write_fifo_l(mach64, 0x100, *(uint32_t *) &svga->vram[addr + 0x08]); + if (mach64->context_mask & (1 << 3)) + mach64_accel_write_fifo_l(mach64, 0x10c, *(uint32_t *) &svga->vram[addr + 0x0c]); + if (mach64->context_mask & (1 << 4)) + mach64_accel_write_fifo_l(mach64, 0x118, *(uint32_t *) &svga->vram[addr + 0x10]); + if (mach64->context_mask & (1 << 5)) + mach64_accel_write_fifo_l(mach64, 0x124, *(uint32_t *) &svga->vram[addr + 0x14]); + if (mach64->context_mask & (1 << 6)) + mach64_accel_write_fifo_l(mach64, 0x128, *(uint32_t *) &svga->vram[addr + 0x18]); + if (mach64->context_mask & (1 << 7)) + mach64_accel_write_fifo_l(mach64, 0x12c, *(uint32_t *) &svga->vram[addr + 0x1c]); + if (mach64->context_mask & (1 << 8)) + mach64_accel_write_fifo_l(mach64, 0x180, *(uint32_t *) &svga->vram[addr + 0x20]); + if (mach64->context_mask & (1 << 9)) + mach64_accel_write_fifo_l(mach64, 0x18c, *(uint32_t *) &svga->vram[addr + 0x24]); + if (mach64->context_mask & (1 << 10)) + mach64_accel_write_fifo_l(mach64, 0x198, *(uint32_t *) &svga->vram[addr + 0x28]); + if (mach64->context_mask & (1 << 11)) + mach64_accel_write_fifo_l(mach64, 0x1a4, *(uint32_t *) &svga->vram[addr + 0x2c]); + if (mach64->context_mask & (1 << 12)) + mach64_accel_write_fifo_l(mach64, 0x1b0, *(uint32_t *) &svga->vram[addr + 0x30]); + if (mach64->context_mask & (1 << 13)) + mach64_accel_write_fifo_l(mach64, 0x280, *(uint32_t *) &svga->vram[addr + 0x34]); + if (mach64->context_mask & (1 << 14)) + mach64_accel_write_fifo_l(mach64, 0x284, *(uint32_t *) &svga->vram[addr + 0x38]); + if (mach64->context_mask & (1 << 15)) + mach64_accel_write_fifo_l(mach64, 0x2a8, *(uint32_t *) &svga->vram[addr + 0x3c]); + if (mach64->context_mask & (1 << 16)) + mach64_accel_write_fifo_l(mach64, 0x2b4, *(uint32_t *) &svga->vram[addr + 0x40]); + if (mach64->context_mask & (1 << 17)) + mach64_accel_write_fifo_l(mach64, 0x2c0, *(uint32_t *) &svga->vram[addr + 0x44]); + if (mach64->context_mask & (1 << 18)) + mach64_accel_write_fifo_l(mach64, 0x2c4, *(uint32_t *) &svga->vram[addr + 0x48]); + if (mach64->context_mask & (1 << 19)) + mach64_accel_write_fifo_l(mach64, 0x2c8, *(uint32_t *) &svga->vram[addr + 0x4c]); + if (mach64->context_mask & (1 << 20)) + mach64_accel_write_fifo_l(mach64, 0x2cc, *(uint32_t *) &svga->vram[addr + 0x50]); + if (mach64->context_mask & (1 << 21)) + mach64_accel_write_fifo_l(mach64, 0x2d0, *(uint32_t *) &svga->vram[addr + 0x54]); + if (mach64->context_mask & (1 << 22)) + mach64_accel_write_fifo_l(mach64, 0x2d4, *(uint32_t *) &svga->vram[addr + 0x58]); + if (mach64->context_mask & (1 << 23)) + mach64_accel_write_fifo_l(mach64, 0x2d8, *(uint32_t *) &svga->vram[addr + 0x5c]); + if (mach64->context_mask & (1 << 24)) + mach64_accel_write_fifo_l(mach64, 0x300, *(uint32_t *) &svga->vram[addr + 0x60]); + if (mach64->context_mask & (1 << 25)) + mach64_accel_write_fifo_l(mach64, 0x304, *(uint32_t *) &svga->vram[addr + 0x64]); + if (mach64->context_mask & (1 << 26)) + mach64_accel_write_fifo_l(mach64, 0x308, *(uint32_t *) &svga->vram[addr + 0x68]); + if (mach64->context_mask & (1 << 27)) + mach64_accel_write_fifo_l(mach64, 0x330, *(uint32_t *) &svga->vram[addr + 0x6c]); - mach64->context_load_cntl = *(uint32_t *)&svga->vram[addr + 0x70]; - } + mach64->context_load_cntl = *(uint32_t *) &svga->vram[addr + 0x70]; + } } #define PLL_REF_DIV 0x2 #define VCLK_POST_DIV 0x6 #define VCLK0_FB_DIV 0x7 -static void pll_write(mach64_t *mach64, uint32_t addr, uint8_t val) +static void +pll_write(mach64_t *mach64, uint32_t addr, uint8_t val) { - int c; + int c; - switch (addr & 3) - { - case 0: /*Clock sel*/ - break; - case 1: /*Addr*/ - mach64->pll_addr = (val >> 2) & 0xf; - break; - case 2: /*Data*/ - mach64->pll_regs[mach64->pll_addr] = val; - mach64_log("pll_write %02x,%02x\n", mach64->pll_addr, val); + switch (addr & 3) { + case 0: /*Clock sel*/ + break; + case 1: /*Addr*/ + mach64->pll_addr = (val >> 2) & 0xf; + break; + case 2: /*Data*/ + mach64->pll_regs[mach64->pll_addr] = val; + mach64_log("pll_write %02x,%02x\n", mach64->pll_addr, val); - for (c = 0; c < 4; c++) - { - double m = (double)mach64->pll_regs[PLL_REF_DIV]; - double n = (double)mach64->pll_regs[VCLK0_FB_DIV+c]; - double r = 14318184.0; - double p = (double)(1 << ((mach64->pll_regs[VCLK_POST_DIV] >> (c*2)) & 3)); + for (c = 0; c < 4; c++) { + double m = (double) mach64->pll_regs[PLL_REF_DIV]; + double n = (double) mach64->pll_regs[VCLK0_FB_DIV + c]; + double r = 14318184.0; + double p = (double) (1 << ((mach64->pll_regs[VCLK_POST_DIV] >> (c * 2)) & 3)); - mach64_log("PLLfreq %i = %g %g m=%02x n=%02x p=%02x\n", c, (2.0 * r * n) / (m * p), p, mach64->pll_regs[PLL_REF_DIV], mach64->pll_regs[VCLK0_FB_DIV+c], mach64->pll_regs[VCLK_POST_DIV]); - mach64->pll_freq[c] = (2.0 * r * n) / (m * p); - mach64_log(" %g\n", mach64->pll_freq[c]); - } - break; - } + mach64_log("PLLfreq %i = %g %g m=%02x n=%02x p=%02x\n", c, (2.0 * r * n) / (m * p), p, mach64->pll_regs[PLL_REF_DIV], mach64->pll_regs[VCLK0_FB_DIV + c], mach64->pll_regs[VCLK_POST_DIV]); + mach64->pll_freq[c] = (2.0 * r * n) / (m * p); + mach64_log(" %g\n", mach64->pll_freq[c]); + } + break; + } } #define OVERLAY_EN (1 << 30) -static void mach64_vblank_start(svga_t *svga) +static void +mach64_vblank_start(svga_t *svga) { - mach64_t *mach64 = (mach64_t *)svga->p; - int overlay_cmp_mix = (mach64->overlay_key_cntl >> 8) & 0xf; + mach64_t *mach64 = (mach64_t *) svga->p; + int overlay_cmp_mix = (mach64->overlay_key_cntl >> 8) & 0xf; - mach64->crtc_int_cntl |= 4; - mach64_update_irqs(mach64); + mach64->crtc_int_cntl |= 4; + mach64_update_irqs(mach64); - svga->overlay.x = (mach64->overlay_y_x_start >> 16) & 0x7ff; - svga->overlay.y = mach64->overlay_y_x_start & 0x7ff; + svga->overlay.x = (mach64->overlay_y_x_start >> 16) & 0x7ff; + svga->overlay.y = mach64->overlay_y_x_start & 0x7ff; - svga->overlay.cur_xsize = ((mach64->overlay_y_x_end >> 16) & 0x7ff) - svga->overlay.x; - svga->overlay.cur_ysize = (mach64->overlay_y_x_end & 0x7ff) - svga->overlay.y; + svga->overlay.cur_xsize = ((mach64->overlay_y_x_end >> 16) & 0x7ff) - svga->overlay.x; + svga->overlay.cur_ysize = (mach64->overlay_y_x_end & 0x7ff) - svga->overlay.y; - svga->overlay.addr = mach64->buf_offset[0] & 0x3ffff8; - svga->overlay.pitch = mach64->buf_pitch[0] & 0xfff; + svga->overlay.addr = mach64->buf_offset[0] & 0x3ffff8; + svga->overlay.pitch = mach64->buf_pitch[0] & 0xfff; - svga->overlay.ena = (mach64->overlay_scale_cntl & OVERLAY_EN) && (overlay_cmp_mix != 1); + svga->overlay.ena = (mach64->overlay_scale_cntl & OVERLAY_EN) && (overlay_cmp_mix != 1); - mach64->overlay_v_acc = 0; - mach64->scaler_update = 1; + mach64->overlay_v_acc = 0; + mach64->scaler_update = 1; } -uint8_t mach64_ext_readb(uint32_t addr, void *p) +uint8_t +mach64_ext_readb(uint32_t addr, void *p) { - mach64_t *mach64 = (mach64_t *)p; + mach64_t *mach64 = (mach64_t *) p; - uint8_t ret = 0xff; - if (!(addr & 0x400)) - { - mach64_log("nmach64_ext_readb: addr=%04x\n", addr); - switch (addr & 0x3ff) - { - case 0x00: case 0x01: case 0x02: case 0x03: - READ8(addr, mach64->overlay_y_x_start); - break; - case 0x04: case 0x05: case 0x06: case 0x07: - READ8(addr, mach64->overlay_y_x_end); - break; - case 0x08: case 0x09: case 0x0a: case 0x0b: - READ8(addr, mach64->overlay_video_key_clr); - break; - case 0x0c: case 0x0d: case 0x0e: case 0x0f: - READ8(addr, mach64->overlay_video_key_msk); - break; - case 0x10: case 0x11: case 0x12: case 0x13: - READ8(addr, mach64->overlay_graphics_key_clr); - break; - case 0x14: case 0x15: case 0x16: case 0x17: - READ8(addr, mach64->overlay_graphics_key_msk); - break; - case 0x18: case 0x19: case 0x1a: case 0x1b: - READ8(addr, mach64->overlay_key_cntl); - break; + uint8_t ret = 0xff; + if (!(addr & 0x400)) { + mach64_log("nmach64_ext_readb: addr=%04x\n", addr); + switch (addr & 0x3ff) { + case 0x00: + case 0x01: + case 0x02: + case 0x03: + READ8(addr, mach64->overlay_y_x_start); + break; + case 0x04: + case 0x05: + case 0x06: + case 0x07: + READ8(addr, mach64->overlay_y_x_end); + break; + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + READ8(addr, mach64->overlay_video_key_clr); + break; + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: + READ8(addr, mach64->overlay_video_key_msk); + break; + case 0x10: + case 0x11: + case 0x12: + case 0x13: + READ8(addr, mach64->overlay_graphics_key_clr); + break; + case 0x14: + case 0x15: + case 0x16: + case 0x17: + READ8(addr, mach64->overlay_graphics_key_msk); + break; + case 0x18: + case 0x19: + case 0x1a: + case 0x1b: + READ8(addr, mach64->overlay_key_cntl); + break; - case 0x20: case 0x21: case 0x22: case 0x23: - READ8(addr, mach64->overlay_scale_inc); - break; - case 0x24: case 0x25: case 0x26: case 0x27: - READ8(addr, mach64->overlay_scale_cntl); - break; - case 0x28: case 0x29: case 0x2a: case 0x2b: - READ8(addr, mach64->scaler_height_width); - break; + case 0x20: + case 0x21: + case 0x22: + case 0x23: + READ8(addr, mach64->overlay_scale_inc); + break; + case 0x24: + case 0x25: + case 0x26: + case 0x27: + READ8(addr, mach64->overlay_scale_cntl); + break; + case 0x28: + case 0x29: + case 0x2a: + case 0x2b: + READ8(addr, mach64->scaler_height_width); + break; - case 0x4a: - ret = mach64->scaler_format; - break; + case 0x4a: + ret = mach64->scaler_format; + break; - default: - ret = 0xff; - break; - } + default: + ret = 0xff; + break; } - else switch (addr & 0x3ff) - { - case 0x00: case 0x01: case 0x02: case 0x03: + } else + switch (addr & 0x3ff) { + case 0x00: + case 0x01: + case 0x02: + case 0x03: READ8(addr, mach64->crtc_h_total_disp); break; - case 0x08: case 0x09: case 0x0a: case 0x0b: + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: READ8(addr, mach64->crtc_v_total_disp); break; - case 0x0c: case 0x0d: case 0x0e: case 0x0f: + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: READ8(addr, mach64->crtc_v_sync_strt_wid); break; - case 0x12: case 0x13: + case 0x12: + case 0x13: READ8(addr - 2, mach64->svga.vc); break; - case 0x14: case 0x15: case 0x16: case 0x17: + case 0x14: + case 0x15: + case 0x16: + case 0x17: READ8(addr, mach64->crtc_off_pitch); break; - case 0x18: + case 0x18: ret = mach64->crtc_int_cntl & ~1; if (mach64->svga.cgastat & 8) - ret |= 1; + ret |= 1; break; - case 0x1c: case 0x1d: case 0x1e: case 0x1f: + case 0x1c: + case 0x1d: + case 0x1e: + case 0x1f: READ8(addr, mach64->crtc_gen_cntl); break; - case 0x40: case 0x41: case 0x42: case 0x43: + case 0x40: + case 0x41: + case 0x42: + case 0x43: READ8(addr, mach64->ovr_clr); break; - case 0x44: case 0x45: case 0x46: case 0x47: + case 0x44: + case 0x45: + case 0x46: + case 0x47: READ8(addr, mach64->ovr_wid_left_right); break; - case 0x48: case 0x49: case 0x4a: case 0x4b: + case 0x48: + case 0x49: + case 0x4a: + case 0x4b: READ8(addr, mach64->ovr_wid_top_bottom); break; - case 0x60: case 0x61: case 0x62: case 0x63: + case 0x60: + case 0x61: + case 0x62: + case 0x63: READ8(addr, mach64->cur_clr0); break; - case 0x64: case 0x65: case 0x66: case 0x67: + case 0x64: + case 0x65: + case 0x66: + case 0x67: READ8(addr, mach64->cur_clr1); break; - case 0x68: case 0x69: case 0x6a: case 0x6b: + case 0x68: + case 0x69: + case 0x6a: + case 0x6b: READ8(addr, mach64->cur_offset); break; - case 0x6c: case 0x6d: case 0x6e: case 0x6f: + case 0x6c: + case 0x6d: + case 0x6e: + case 0x6f: READ8(addr, mach64->cur_horz_vert_posn); break; - case 0x70: case 0x71: case 0x72: case 0x73: + case 0x70: + case 0x71: + case 0x72: + case 0x73: READ8(addr, mach64->cur_horz_vert_off); break; - case 0x79: + case 0x79: ret = 0x30; break; - case 0x80: case 0x81: case 0x82: case 0x83: + case 0x80: + case 0x81: + case 0x82: + case 0x83: READ8(addr, mach64->scratch_reg0); break; - case 0x84: case 0x85: case 0x86: case 0x87: + case 0x84: + case 0x85: + case 0x86: + case 0x87: READ8(addr, mach64->scratch_reg1); break; - case 0x90: case 0x91: case 0x92: case 0x93: + case 0x90: + case 0x91: + case 0x92: + case 0x93: READ8(addr, mach64->clock_cntl); break; - case 0xb0: case 0xb1: case 0xb2: case 0xb3: + case 0xb0: + case 0xb1: + case 0xb2: + case 0xb3: READ8(addr, mach64->mem_cntl); break; - case 0xc0: case 0xc1: case 0xc2: case 0xc3: + case 0xc0: + case 0xc1: + case 0xc2: + case 0xc3: if (mach64->type == MACH64_GX) - ret = ati68860_ramdac_in((addr & 3) | ((mach64->dac_cntl & 3) << 2), mach64->svga.ramdac, &mach64->svga); + ret = ati68860_ramdac_in((addr & 3) | ((mach64->dac_cntl & 3) << 2), mach64->svga.ramdac, &mach64->svga); else - ret = ati68860_ramdac_in(addr & 3, mach64->svga.ramdac, &mach64->svga); + ret = ati68860_ramdac_in(addr & 3, mach64->svga.ramdac, &mach64->svga); break; - case 0xc4: case 0xc5: case 0xc6: + case 0xc4: + case 0xc5: + case 0xc6: READ8(addr, mach64->dac_cntl); break; - case 0xc7: + case 0xc7: READ8(addr, mach64->dac_cntl); if (mach64->type == MACH64_VT2) { - ret &= 0xf9; - if (i2c_gpio_get_scl(mach64->i2c)) - ret |= 0x04; - if (i2c_gpio_get_sda(mach64->i2c)) - ret |= 0x02; + ret &= 0xf9; + if (i2c_gpio_get_scl(mach64->i2c)) + ret |= 0x04; + if (i2c_gpio_get_sda(mach64->i2c)) + ret |= 0x02; } break; - case 0xd0: case 0xd1: case 0xd2: case 0xd3: + case 0xd0: + case 0xd1: + case 0xd2: + case 0xd3: READ8(addr, mach64->gen_test_cntl); break; - case 0xdc: case 0xdd: case 0xde: case 0xdf: + case 0xdc: + case 0xdd: + case 0xde: + case 0xdf: if (mach64->type == MACH64_GX) - mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 22) << 4); + mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 22) << 4); else - mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 24) << 4); + mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 24) << 4); READ8(addr, mach64->config_cntl); break; - case 0xe0: case 0xe1: case 0xe2: case 0xe3: + case 0xe0: + case 0xe1: + case 0xe2: + case 0xe3: READ8(addr, mach64->config_chip_id); break; - case 0xe4: case 0xe5: case 0xe6: case 0xe7: + case 0xe4: + case 0xe5: + case 0xe6: + case 0xe7: READ8(addr, mach64->config_stat0); break; - case 0x100: case 0x101: case 0x102: case 0x103: + case 0x100: + case 0x101: + case 0x102: + case 0x103: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_off_pitch); break; - case 0x104: case 0x105: + case 0x104: + case 0x105: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_y_x); break; - case 0x108: case 0x109: case 0x11c: case 0x11d: + case 0x108: + case 0x109: + case 0x11c: + case 0x11d: mach64_wait_fifo_idle(mach64); READ8(addr + 2, mach64->dst_y_x); break; - case 0x10c: case 0x10d: case 0x10e: case 0x10f: + case 0x10c: + case 0x10d: + case 0x10e: + case 0x10f: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_y_x); break; - case 0x110: case 0x111: + case 0x110: + case 0x111: addr += 2; - /*FALLTHROUGH*/ - case 0x114: case 0x115: - case 0x118: case 0x119: case 0x11a: case 0x11b: - case 0x11e: case 0x11f: + /*FALLTHROUGH*/ + case 0x114: + case 0x115: + case 0x118: + case 0x119: + case 0x11a: + case 0x11b: + case 0x11e: + case 0x11f: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_height_width); break; - case 0x120: case 0x121: case 0x122: case 0x123: + case 0x120: + case 0x121: + case 0x122: + case 0x123: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_bres_lnth); break; - case 0x124: case 0x125: case 0x126: case 0x127: + case 0x124: + case 0x125: + case 0x126: + case 0x127: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_bres_err); break; - case 0x128: case 0x129: case 0x12a: case 0x12b: + case 0x128: + case 0x129: + case 0x12a: + case 0x12b: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_bres_inc); break; - case 0x12c: case 0x12d: case 0x12e: case 0x12f: + case 0x12c: + case 0x12d: + case 0x12e: + case 0x12f: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_bres_dec); break; - case 0x130: case 0x131: case 0x132: case 0x133: + case 0x130: + case 0x131: + case 0x132: + case 0x133: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_cntl); break; - case 0x180: case 0x181: case 0x182: case 0x183: + case 0x180: + case 0x181: + case 0x182: + case 0x183: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_off_pitch); break; - case 0x184: case 0x185: + case 0x184: + case 0x185: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_y_x); break; - case 0x188: case 0x189: + case 0x188: + case 0x189: mach64_wait_fifo_idle(mach64); READ8(addr + 2, mach64->src_y_x); break; - case 0x18c: case 0x18d: case 0x18e: case 0x18f: + case 0x18c: + case 0x18d: + case 0x18e: + case 0x18f: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_y_x); break; - case 0x190: case 0x191: + case 0x190: + case 0x191: mach64_wait_fifo_idle(mach64); READ8(addr + 2, mach64->src_height1_width1); break; - case 0x194: case 0x195: + case 0x194: + case 0x195: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_height1_width1); break; - case 0x198: case 0x199: case 0x19a: case 0x19b: + case 0x198: + case 0x199: + case 0x19a: + case 0x19b: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_height1_width1); break; - case 0x19c: case 0x19d: + case 0x19c: + case 0x19d: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_y_x_start); break; - case 0x1a0: case 0x1a1: + case 0x1a0: + case 0x1a1: mach64_wait_fifo_idle(mach64); READ8(addr + 2, mach64->src_y_x_start); break; - case 0x1a4: case 0x1a5: case 0x1a6: case 0x1a7: + case 0x1a4: + case 0x1a5: + case 0x1a6: + case 0x1a7: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_y_x_start); break; - case 0x1a8: case 0x1a9: + case 0x1a8: + case 0x1a9: mach64_wait_fifo_idle(mach64); READ8(addr + 2, mach64->src_height2_width2); break; - case 0x1ac: case 0x1ad: + case 0x1ac: + case 0x1ad: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_height2_width2); break; - case 0x1b0: case 0x1b1: case 0x1b2: case 0x1b3: + case 0x1b0: + case 0x1b1: + case 0x1b2: + case 0x1b3: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_height2_width2); break; - case 0x1b4: case 0x1b5: case 0x1b6: case 0x1b7: + case 0x1b4: + case 0x1b5: + case 0x1b6: + case 0x1b7: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->src_cntl); break; - case 0x240: case 0x241: case 0x242: case 0x243: + case 0x240: + case 0x241: + case 0x242: + case 0x243: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->host_cntl); break; - case 0x280: case 0x281: case 0x282: case 0x283: + case 0x280: + case 0x281: + case 0x282: + case 0x283: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->pat_reg0); break; - case 0x284: case 0x285: case 0x286: case 0x287: + case 0x284: + case 0x285: + case 0x286: + case 0x287: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->pat_reg1); break; - case 0x288: case 0x289: case 0x28a: case 0x28b: + case 0x288: + case 0x289: + case 0x28a: + case 0x28b: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->pat_cntl); break; - case 0x2a0: case 0x2a1: case 0x2a8: case 0x2a9: + case 0x2a0: + case 0x2a1: + case 0x2a8: + case 0x2a9: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->sc_left_right); break; - case 0x2a4: case 0x2a5: + case 0x2a4: + case 0x2a5: addr += 2; - /*FALLTHROUGH*/ - case 0x2aa: case 0x2ab: + /*FALLTHROUGH*/ + case 0x2aa: + case 0x2ab: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->sc_left_right); break; - case 0x2ac: case 0x2ad: case 0x2b4: case 0x2b5: + case 0x2ac: + case 0x2ad: + case 0x2b4: + case 0x2b5: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->sc_top_bottom); break; - case 0x2b0: case 0x2b1: + case 0x2b0: + case 0x2b1: addr += 2; - /*FALLTHROUGH*/ - case 0x2b6: case 0x2b7: + /*FALLTHROUGH*/ + case 0x2b6: + case 0x2b7: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->sc_top_bottom); break; - case 0x2c0: case 0x2c1: case 0x2c2: case 0x2c3: + case 0x2c0: + case 0x2c1: + case 0x2c2: + case 0x2c3: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dp_bkgd_clr); break; - case 0x2c4: case 0x2c5: case 0x2c6: case 0x2c7: + case 0x2c4: + case 0x2c5: + case 0x2c6: + case 0x2c7: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dp_frgd_clr); break; - case 0x2c8: case 0x2c9: case 0x2ca: case 0x2cb: + case 0x2c8: + case 0x2c9: + case 0x2ca: + case 0x2cb: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->write_mask); break; - case 0x2cc: case 0x2cd: case 0x2ce: case 0x2cf: + case 0x2cc: + case 0x2cd: + case 0x2ce: + case 0x2cf: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->chain_mask); break; - case 0x2d0: case 0x2d1: case 0x2d2: case 0x2d3: + case 0x2d0: + case 0x2d1: + case 0x2d2: + case 0x2d3: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dp_pix_width); break; - case 0x2d4: case 0x2d5: case 0x2d6: case 0x2d7: + case 0x2d4: + case 0x2d5: + case 0x2d6: + case 0x2d7: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dp_mix); break; - case 0x2d8: case 0x2d9: case 0x2da: case 0x2db: + case 0x2d8: + case 0x2d9: + case 0x2da: + case 0x2db: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dp_src); break; - case 0x300: case 0x301: case 0x302: case 0x303: + case 0x300: + case 0x301: + case 0x302: + case 0x303: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->clr_cmp_clr); break; - case 0x304: case 0x305: case 0x306: case 0x307: + case 0x304: + case 0x305: + case 0x306: + case 0x307: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->clr_cmp_mask); break; - case 0x308: case 0x309: case 0x30a: case 0x30b: + case 0x308: + case 0x309: + case 0x30a: + case 0x30b: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->clr_cmp_cntl); break; - case 0x310: - case 0x311: + case 0x310: + case 0x311: if (!FIFO_EMPTY) - wake_fifo_thread(mach64); + wake_fifo_thread(mach64); ret = 0; if (FIFO_FULL) - ret = 0xff; + ret = 0xff; break; - case 0x320: case 0x321: case 0x322: case 0x323: + case 0x320: + case 0x321: + case 0x322: + case 0x323: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->context_mask); break; - case 0x330: case 0x331: + case 0x330: + case 0x331: mach64_wait_fifo_idle(mach64); READ8(addr, mach64->dst_cntl); break; - case 0x332: + case 0x332: mach64_wait_fifo_idle(mach64); READ8(addr - 2, mach64->src_cntl); break; - case 0x333: + case 0x333: mach64_wait_fifo_idle(mach64); READ8(addr - 3, mach64->pat_cntl); break; - case 0x338: + case 0x338: ret = FIFO_EMPTY ? 0 : 1; break; - default: + default: ret = 0; break; } - if ((addr & 0x3fc) != 0x018) mach64_log("mach64_ext_readb : addr %08X ret %02X\n", addr, ret); - return ret; + if ((addr & 0x3fc) != 0x018) + mach64_log("mach64_ext_readb : addr %08X ret %02X\n", addr, ret); + return ret; } -uint16_t mach64_ext_readw(uint32_t addr, void *p) +uint16_t +mach64_ext_readw(uint32_t addr, void *p) { - mach64_t *mach64 = (mach64_t *)p; - uint16_t ret; - if (!(addr & 0x400)) - { - mach64_log("nmach64_ext_readw: addr=%04x\n", addr); - ret = 0xffff; - } - else switch (addr & 0x3ff) - { - case 0xb4: case 0xb6: + mach64_t *mach64 = (mach64_t *) p; + uint16_t ret; + if (!(addr & 0x400)) { + mach64_log("nmach64_ext_readw: addr=%04x\n", addr); + ret = 0xffff; + } else + switch (addr & 0x3ff) { + case 0xb4: + case 0xb6: ret = (mach64->bank_w[(addr & 2) >> 1] >> 15); break; - case 0xb8: case 0xba: + case 0xb8: + case 0xba: ret = (mach64->bank_r[(addr & 2) >> 1] >> 15); break; - default: + default: ret = mach64_ext_readb(addr, p); ret |= mach64_ext_readb(addr + 1, p) << 8; break; } - if ((addr & 0x3fc) != 0x018) mach64_log("mach64_ext_readw : addr %08X ret %04X\n", addr, ret); - return ret; + if ((addr & 0x3fc) != 0x018) + mach64_log("mach64_ext_readw : addr %08X ret %04X\n", addr, ret); + return ret; } -uint32_t mach64_ext_readl(uint32_t addr, void *p) +uint32_t +mach64_ext_readl(uint32_t addr, void *p) { - mach64_t *mach64 = (mach64_t *)p; - uint32_t ret; - if (!(addr & 0x400)) - { - mach64_log("nmach64_ext_readl: addr=%04x\n", addr); - ret = 0xffffffff; - } - else switch (addr & 0x3ff) - { - case 0x18: + mach64_t *mach64 = (mach64_t *) p; + uint32_t ret; + if (!(addr & 0x400)) { + mach64_log("nmach64_ext_readl: addr=%04x\n", addr); + ret = 0xffffffff; + } else + switch (addr & 0x3ff) { + case 0x18: ret = mach64->crtc_int_cntl & ~1; if (mach64->svga.cgastat & 8) - ret |= 1; + ret |= 1; break; - case 0xb4: + case 0xb4: ret = (mach64->bank_w[0] >> 15) | ((mach64->bank_w[1] >> 15) << 16); break; - case 0xb8: + case 0xb8: ret = (mach64->bank_r[0] >> 15) | ((mach64->bank_r[1] >> 15) << 16); break; - default: + default: ret = mach64_ext_readw(addr, p); ret |= mach64_ext_readw(addr + 2, p) << 16; break; } - if ((addr & 0x3fc) != 0x018) mach64_log("mach64_ext_readl : addr %08X ret %08X\n", addr, ret); - return ret; + if ((addr & 0x3fc) != 0x018) + mach64_log("mach64_ext_readl : addr %08X ret %08X\n", addr, ret); + return ret; } -void mach64_ext_writeb(uint32_t addr, uint8_t val, void *p) +void +mach64_ext_writeb(uint32_t addr, uint8_t val, void *p) { - mach64_t *mach64 = (mach64_t *)p; - svga_t *svga = &mach64->svga; + mach64_t *mach64 = (mach64_t *) p; + svga_t *svga = &mach64->svga; - mach64_log("mach64_ext_writeb : addr %08X val %02X\n", addr, val); + mach64_log("mach64_ext_writeb : addr %08X val %02X\n", addr, val); - if (!(addr & 0x400)) - { - switch (addr & 0x3ff) - { - case 0x00: case 0x01: case 0x02: case 0x03: - WRITE8(addr, mach64->overlay_y_x_start, val); - break; - case 0x04: case 0x05: case 0x06: case 0x07: - WRITE8(addr, mach64->overlay_y_x_end, val); - break; - case 0x08: case 0x09: case 0x0a: case 0x0b: - WRITE8(addr, mach64->overlay_video_key_clr, val); - break; - case 0x0c: case 0x0d: case 0x0e: case 0x0f: - WRITE8(addr, mach64->overlay_video_key_msk, val); - break; - case 0x10: case 0x11: case 0x12: case 0x13: - WRITE8(addr, mach64->overlay_graphics_key_clr, val); - break; - case 0x14: case 0x15: case 0x16: case 0x17: - WRITE8(addr, mach64->overlay_graphics_key_msk, val); - break; - case 0x18: case 0x19: case 0x1a: case 0x1b: - WRITE8(addr, mach64->overlay_key_cntl, val); - break; + if (!(addr & 0x400)) { + switch (addr & 0x3ff) { + case 0x00: + case 0x01: + case 0x02: + case 0x03: + WRITE8(addr, mach64->overlay_y_x_start, val); + break; + case 0x04: + case 0x05: + case 0x06: + case 0x07: + WRITE8(addr, mach64->overlay_y_x_end, val); + break; + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + WRITE8(addr, mach64->overlay_video_key_clr, val); + break; + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: + WRITE8(addr, mach64->overlay_video_key_msk, val); + break; + case 0x10: + case 0x11: + case 0x12: + case 0x13: + WRITE8(addr, mach64->overlay_graphics_key_clr, val); + break; + case 0x14: + case 0x15: + case 0x16: + case 0x17: + WRITE8(addr, mach64->overlay_graphics_key_msk, val); + break; + case 0x18: + case 0x19: + case 0x1a: + case 0x1b: + WRITE8(addr, mach64->overlay_key_cntl, val); + break; - case 0x20: case 0x21: case 0x22: case 0x23: - WRITE8(addr, mach64->overlay_scale_inc, val); - break; - case 0x24: case 0x25: case 0x26: case 0x27: - WRITE8(addr, mach64->overlay_scale_cntl, val); - break; - case 0x28: case 0x29: case 0x2a: case 0x2b: - WRITE8(addr, mach64->scaler_height_width, val); - break; + case 0x20: + case 0x21: + case 0x22: + case 0x23: + WRITE8(addr, mach64->overlay_scale_inc, val); + break; + case 0x24: + case 0x25: + case 0x26: + case 0x27: + WRITE8(addr, mach64->overlay_scale_cntl, val); + break; + case 0x28: + case 0x29: + case 0x2a: + case 0x2b: + WRITE8(addr, mach64->scaler_height_width, val); + break; - case 0x4a: - mach64->scaler_format = val & 0xf; - break; + case 0x4a: + mach64->scaler_format = val & 0xf; + break; - case 0x80: case 0x81: case 0x82: case 0x83: - WRITE8(addr, mach64->buf_offset[0], val); - break; + case 0x80: + case 0x81: + case 0x82: + case 0x83: + WRITE8(addr, mach64->buf_offset[0], val); + break; - case 0x8c: case 0x8d: case 0x8e: case 0x8f: - WRITE8(addr, mach64->buf_pitch[0], val); - break; + case 0x8c: + case 0x8d: + case 0x8e: + case 0x8f: + WRITE8(addr, mach64->buf_pitch[0], val); + break; - case 0x98: case 0x99: case 0x9a: case 0x9b: - WRITE8(addr, mach64->buf_offset[1], val); - break; + case 0x98: + case 0x99: + case 0x9a: + case 0x9b: + WRITE8(addr, mach64->buf_offset[1], val); + break; - case 0xa4: case 0xa5: case 0xa6: case 0xa7: - WRITE8(addr, mach64->buf_pitch[1], val); - break; - } - - mach64_log("nmach64_ext_writeb: addr=%04x val=%02x\n", addr, val); + case 0xa4: + case 0xa5: + case 0xa6: + case 0xa7: + WRITE8(addr, mach64->buf_pitch[1], val); + break; } - else if (addr & 0x300) - { - mach64_queue(mach64, addr & 0x3ff, val, FIFO_WRITE_BYTE); - } - else switch (addr & 0x3ff) - { - case 0x00: case 0x01: case 0x02: case 0x03: + + mach64_log("nmach64_ext_writeb: addr=%04x val=%02x\n", addr, val); + } else if (addr & 0x300) { + mach64_queue(mach64, addr & 0x3ff, val, FIFO_WRITE_BYTE); + } else + switch (addr & 0x3ff) { + case 0x00: + case 0x01: + case 0x02: + case 0x03: WRITE8(addr, mach64->crtc_h_total_disp, val); svga_recalctimings(&mach64->svga); break; - case 0x08: case 0x09: case 0x0a: case 0x0b: + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: WRITE8(addr, mach64->crtc_v_total_disp, val); svga_recalctimings(&mach64->svga); break; - case 0x0c: case 0x0d: case 0x0e: case 0x0f: + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: WRITE8(addr, mach64->crtc_v_sync_strt_wid, val); svga_recalctimings(&mach64->svga); break; - case 0x14: case 0x15: case 0x16: case 0x17: + case 0x14: + case 0x15: + case 0x16: + case 0x17: WRITE8(addr, mach64->crtc_off_pitch, val); svga_recalctimings(&mach64->svga); svga->fullchange = changeframecount; break; - case 0x18: + case 0x18: mach64->crtc_int_cntl = (mach64->crtc_int_cntl & 0x75) | (val & ~0x75); if (val & 4) - mach64->crtc_int_cntl &= ~4; + mach64->crtc_int_cntl &= ~4; mach64_update_irqs(mach64); break; - case 0x1c: case 0x1d: case 0x1e: case 0x1f: + case 0x1c: + case 0x1d: + case 0x1e: + case 0x1f: WRITE8(addr, mach64->crtc_gen_cntl, val); if (((mach64->crtc_gen_cntl >> 24) & 3) == 3) - svga->fb_only = 1; + svga->fb_only = 1; else - svga->fb_only = 0; + svga->fb_only = 0; svga->dpms = !!(mach64->crtc_gen_cntl & 0x0c); svga_recalctimings(&mach64->svga); break; - case 0x40: case 0x41: case 0x42: case 0x43: + case 0x40: + case 0x41: + case 0x42: + case 0x43: WRITE8(addr, mach64->ovr_clr, val); break; - case 0x44: case 0x45: case 0x46: case 0x47: + case 0x44: + case 0x45: + case 0x46: + case 0x47: WRITE8(addr, mach64->ovr_wid_left_right, val); break; - case 0x48: case 0x49: case 0x4a: case 0x4b: + case 0x48: + case 0x49: + case 0x4a: + case 0x4b: WRITE8(addr, mach64->ovr_wid_top_bottom, val); break; - case 0x60: case 0x61: case 0x62: case 0x63: + case 0x60: + case 0x61: + case 0x62: + case 0x63: WRITE8(addr, mach64->cur_clr0, val); if (mach64->type == MACH64_VT2) - ati68860_ramdac_set_pallook(mach64->svga.ramdac, 0, makecol32((mach64->cur_clr0 >> 24) & 0xff, (mach64->cur_clr0 >> 16) & 0xff, (mach64->cur_clr0 >> 8) & 0xff)); + ati68860_ramdac_set_pallook(mach64->svga.ramdac, 0, makecol32((mach64->cur_clr0 >> 24) & 0xff, (mach64->cur_clr0 >> 16) & 0xff, (mach64->cur_clr0 >> 8) & 0xff)); break; - case 0x64: case 0x65: case 0x66: case 0x67: + case 0x64: + case 0x65: + case 0x66: + case 0x67: WRITE8(addr, mach64->cur_clr1, val); if (mach64->type == MACH64_VT2) - ati68860_ramdac_set_pallook(mach64->svga.ramdac, 1, makecol32((mach64->cur_clr1 >> 24) & 0xff, (mach64->cur_clr1 >> 16) & 0xff, (mach64->cur_clr1 >> 8) & 0xff)); + ati68860_ramdac_set_pallook(mach64->svga.ramdac, 1, makecol32((mach64->cur_clr1 >> 24) & 0xff, (mach64->cur_clr1 >> 16) & 0xff, (mach64->cur_clr1 >> 8) & 0xff)); break; - case 0x68: case 0x69: case 0x6a: case 0x6b: + case 0x68: + case 0x69: + case 0x6a: + case 0x6b: WRITE8(addr, mach64->cur_offset, val); svga->dac_hwcursor.addr = (mach64->cur_offset & 0xfffff) * 8; break; - case 0x6c: case 0x6d: case 0x6e: case 0x6f: + case 0x6c: + case 0x6d: + case 0x6e: + case 0x6f: WRITE8(addr, mach64->cur_horz_vert_posn, val); svga->dac_hwcursor.x = mach64->cur_horz_vert_posn & 0x7ff; svga->dac_hwcursor.y = (mach64->cur_horz_vert_posn >> 16) & 0x7ff; break; - case 0x70: case 0x71: case 0x72: case 0x73: + case 0x70: + case 0x71: + case 0x72: + case 0x73: WRITE8(addr, mach64->cur_horz_vert_off, val); svga->dac_hwcursor.xoff = mach64->cur_horz_vert_off & 0x3f; svga->dac_hwcursor.yoff = (mach64->cur_horz_vert_off >> 16) & 0x3f; break; - case 0x80: case 0x81: case 0x82: case 0x83: + case 0x80: + case 0x81: + case 0x82: + case 0x83: WRITE8(addr, mach64->scratch_reg0, val); break; - case 0x84: case 0x85: case 0x86: case 0x87: + case 0x84: + case 0x85: + case 0x86: + case 0x87: WRITE8(addr, mach64->scratch_reg1, val); break; - case 0x90: case 0x91: case 0x92: case 0x93: + case 0x90: + case 0x91: + case 0x92: + case 0x93: WRITE8(addr, mach64->clock_cntl, val); if (mach64->type == MACH64_GX) - ics2595_write(svga->clock_gen, val & 0x40, val & 0xf); - else - { - pll_write(mach64, addr, val); - ics2595_setclock(svga->clock_gen, mach64->pll_freq[mach64->clock_cntl & 3]); + ics2595_write(svga->clock_gen, val & 0x40, val & 0xf); + else { + pll_write(mach64, addr, val); + ics2595_setclock(svga->clock_gen, mach64->pll_freq[mach64->clock_cntl & 3]); } svga_recalctimings(&mach64->svga); break; - case 0xb0: case 0xb1: case 0xb2: case 0xb3: + case 0xb0: + case 0xb1: + case 0xb2: + case 0xb3: WRITE8(addr, mach64->mem_cntl, val); break; - case 0xb4: + case 0xb4: mach64->bank_w[0] = val * 32768; mach64_log("mach64 : write bank A0000-A7FFF set to %08X\n", mach64->bank_w[0]); break; - case 0xb5: case 0xb6: + case 0xb5: + case 0xb6: mach64->bank_w[1] = val * 32768; mach64_log("mach64 : write bank A8000-AFFFF set to %08X\n", mach64->bank_w[1]); break; - case 0xb8: + case 0xb8: mach64->bank_r[0] = val * 32768; mach64_log("mach64 : read bank A0000-A7FFF set to %08X\n", mach64->bank_r[0]); break; - case 0xb9: case 0xba: + case 0xb9: + case 0xba: mach64->bank_r[1] = val * 32768; mach64_log("mach64 : read bank A8000-AFFFF set to %08X\n", mach64->bank_r[1]); break; - case 0xc0: case 0xc1: case 0xc2: case 0xc3: + case 0xc0: + case 0xc1: + case 0xc2: + case 0xc3: if (mach64->type == MACH64_GX) - ati68860_ramdac_out((addr & 3) | ((mach64->dac_cntl & 3) << 2), val, mach64->svga.ramdac, &mach64->svga); + ati68860_ramdac_out((addr & 3) | ((mach64->dac_cntl & 3) << 2), val, mach64->svga.ramdac, &mach64->svga); else - ati68860_ramdac_out(addr & 3, val, mach64->svga.ramdac, &mach64->svga); + ati68860_ramdac_out(addr & 3, val, mach64->svga.ramdac, &mach64->svga); break; - case 0xc4: case 0xc5: case 0xc6: case 0xc7: + case 0xc4: + case 0xc5: + case 0xc6: + case 0xc7: WRITE8(addr, mach64->dac_cntl, val); svga_set_ramdac_type(svga, (mach64->dac_cntl & 0x100) ? RAMDAC_8BIT : RAMDAC_6BIT); ati68860_set_ramdac_type(mach64->svga.ramdac, (mach64->dac_cntl & 0x100) ? RAMDAC_8BIT : RAMDAC_6BIT); i2c_gpio_set(mach64->i2c, !(mach64->dac_cntl & 0x20000000) || (mach64->dac_cntl & 0x04000000), !(mach64->dac_cntl & 0x10000000) || (mach64->dac_cntl & 0x02000000)); break; - case 0xd0: case 0xd1: case 0xd2: case 0xd3: + case 0xd0: + case 0xd1: + case 0xd2: + case 0xd3: WRITE8(addr, mach64->gen_test_cntl, val); ati_eeprom_write(&mach64->eeprom, mach64->gen_test_cntl & 0x10, mach64->gen_test_cntl & 2, mach64->gen_test_cntl & 1); - mach64->gen_test_cntl = (mach64->gen_test_cntl & ~8) | (ati_eeprom_read(&mach64->eeprom) ? 8 : 0); + mach64->gen_test_cntl = (mach64->gen_test_cntl & ~8) | (ati_eeprom_read(&mach64->eeprom) ? 8 : 0); svga->dac_hwcursor.ena = mach64->gen_test_cntl & 0x80; break; - case 0xdc: case 0xdd: case 0xde: case 0xdf: + case 0xdc: + case 0xdd: + case 0xde: + case 0xdf: WRITE8(addr, mach64->config_cntl, val); mach64_updatemapping(mach64); break; - case 0xe4: case 0xe5: case 0xe6: case 0xe7: + case 0xe4: + case 0xe5: + case 0xe6: + case 0xe7: if (mach64->type != MACH64_GX) - WRITE8(addr, mach64->config_stat0, val); + WRITE8(addr, mach64->config_stat0, val); break; } } -void mach64_ext_writew(uint32_t addr, uint16_t val, void *p) +void +mach64_ext_writew(uint32_t addr, uint16_t val, void *p) { - mach64_t *mach64 = (mach64_t *)p; - mach64_log("mach64_ext_writew : addr %08X val %04X\n", addr, val); - if (!(addr & 0x400)) - { - mach64_log("mach64_ext_writew: addr=%04x val=%04x\n", addr, val); + mach64_t *mach64 = (mach64_t *) p; + mach64_log("mach64_ext_writew : addr %08X val %04X\n", addr, val); + if (!(addr & 0x400)) { + mach64_log("mach64_ext_writew: addr=%04x val=%04x\n", addr, val); - mach64_ext_writeb(addr, val, p); - mach64_ext_writeb(addr + 1, val >> 8, p); - } - else if (addr & 0x300) - { - mach64_queue(mach64, addr & 0x3fe, val, FIFO_WRITE_WORD); - } - else switch (addr & 0x3fe) - { - default: + mach64_ext_writeb(addr, val, p); + mach64_ext_writeb(addr + 1, val >> 8, p); + } else if (addr & 0x300) { + mach64_queue(mach64, addr & 0x3fe, val, FIFO_WRITE_WORD); + } else + switch (addr & 0x3fe) { + default: mach64_ext_writeb(addr, val, p); mach64_ext_writeb(addr + 1, val >> 8, p); break; } } -void mach64_ext_writel(uint32_t addr, uint32_t val, void *p) +void +mach64_ext_writel(uint32_t addr, uint32_t val, void *p) { - mach64_t *mach64 = (mach64_t *)p; - if ((addr & 0x3c0) != 0x200) - mach64_log("mach64_ext_writel : addr %08X val %08X\n", addr, val); - if (!(addr & 0x400)) - { - mach64_log("mach64_ext_writel: addr=%04x val=%08x\n", addr, val); + mach64_t *mach64 = (mach64_t *) p; + if ((addr & 0x3c0) != 0x200) + mach64_log("mach64_ext_writel : addr %08X val %08X\n", addr, val); + if (!(addr & 0x400)) { + mach64_log("mach64_ext_writel: addr=%04x val=%08x\n", addr, val); - mach64_ext_writew(addr, val, p); - mach64_ext_writew(addr + 2, val >> 16, p); - } - else if (addr & 0x300) - { - mach64_queue(mach64, addr & 0x3fc, val, FIFO_WRITE_DWORD); - } - else switch (addr & 0x3fc) - { - default: + mach64_ext_writew(addr, val, p); + mach64_ext_writew(addr + 2, val >> 16, p); + } else if (addr & 0x300) { + mach64_queue(mach64, addr & 0x3fc, val, FIFO_WRITE_DWORD); + } else + switch (addr & 0x3fc) { + default: mach64_ext_writew(addr, val, p); mach64_ext_writew(addr + 2, val >> 16, p); break; } } -uint8_t mach64_ext_inb(uint16_t port, void *p) +uint8_t +mach64_ext_inb(uint16_t port, void *p) { - mach64_t *mach64 = (mach64_t *)p; - uint8_t ret; + mach64_t *mach64 = (mach64_t *) p; + uint8_t ret; - switch (port) - { - case 0x02ec: case 0x02ed: case 0x02ee: case 0x02ef: - case 0x7eec: case 0x7eed: case 0x7eee: case 0x7eef: - ret = mach64_ext_readb(0x400 | 0x00 | (port & 3), p); - break; - case 0x0aec: case 0x0aed: case 0x0aee: case 0x0aef: - ret = mach64_ext_readb(0x400 | 0x08 | (port & 3), p); - break; - case 0x0eec: case 0x0eed: case 0x0eee: case 0x0eef: - ret = mach64_ext_readb(0x400 | 0x0c | (port & 3), p); - break; + switch (port) { + case 0x02ec: + case 0x02ed: + case 0x02ee: + case 0x02ef: + case 0x7eec: + case 0x7eed: + case 0x7eee: + case 0x7eef: + ret = mach64_ext_readb(0x400 | 0x00 | (port & 3), p); + break; + case 0x0aec: + case 0x0aed: + case 0x0aee: + case 0x0aef: + ret = mach64_ext_readb(0x400 | 0x08 | (port & 3), p); + break; + case 0x0eec: + case 0x0eed: + case 0x0eee: + case 0x0eef: + ret = mach64_ext_readb(0x400 | 0x0c | (port & 3), p); + break; - case 0x12ec: case 0x12ed: case 0x12ee: case 0x12ef: - ret = mach64_ext_readb(0x400 | 0x10 | (port & 3), p); - break; + case 0x12ec: + case 0x12ed: + case 0x12ee: + case 0x12ef: + ret = mach64_ext_readb(0x400 | 0x10 | (port & 3), p); + break; - case 0x16ec: case 0x16ed: case 0x16ee: case 0x16ef: - ret = mach64_ext_readb(0x400 | 0x14 | (port & 3), p); - break; + case 0x16ec: + case 0x16ed: + case 0x16ee: + case 0x16ef: + ret = mach64_ext_readb(0x400 | 0x14 | (port & 3), p); + break; - case 0x1aec: - ret = mach64_ext_readb(0x400 | 0x18, p); - break; + case 0x1aec: + ret = mach64_ext_readb(0x400 | 0x18, p); + break; - case 0x1eec: case 0x1eed: case 0x1eee: case 0x1eef: - ret = mach64_ext_readb(0x400 | 0x1c | (port & 3), p); - break; + case 0x1eec: + case 0x1eed: + case 0x1eee: + case 0x1eef: + ret = mach64_ext_readb(0x400 | 0x1c | (port & 3), p); + break; - case 0x22ec: case 0x22ed: case 0x22ee: case 0x22ef: - ret = mach64_ext_readb(0x400 | 0x40 | (port & 3), p); - break; - case 0x26ec: case 0x26ed: case 0x26ee: case 0x26ef: - ret = mach64_ext_readb(0x400 | 0x44 | (port & 3), p); - break; - case 0x2aec: case 0x2aed: case 0x2aee: case 0x2aef: - ret = mach64_ext_readb(0x400 | 0x48 | (port & 3), p); - break; - case 0x2eec: case 0x2eed: case 0x2eee: case 0x2eef: - ret = mach64_ext_readb(0x400 | 0x60 | (port & 3), p); - break; + case 0x22ec: + case 0x22ed: + case 0x22ee: + case 0x22ef: + ret = mach64_ext_readb(0x400 | 0x40 | (port & 3), p); + break; + case 0x26ec: + case 0x26ed: + case 0x26ee: + case 0x26ef: + ret = mach64_ext_readb(0x400 | 0x44 | (port & 3), p); + break; + case 0x2aec: + case 0x2aed: + case 0x2aee: + case 0x2aef: + ret = mach64_ext_readb(0x400 | 0x48 | (port & 3), p); + break; + case 0x2eec: + case 0x2eed: + case 0x2eee: + case 0x2eef: + ret = mach64_ext_readb(0x400 | 0x60 | (port & 3), p); + break; - case 0x32ec: case 0x32ed: case 0x32ee: case 0x32ef: - ret = mach64_ext_readb(0x400 | 0x64 | (port & 3), p); - break; - case 0x36ec: case 0x36ed: case 0x36ee: case 0x36ef: - ret = mach64_ext_readb(0x400 | 0x68 | (port & 3), p); - break; - case 0x3aec: case 0x3aed: case 0x3aee: case 0x3aef: - ret = mach64_ext_readb(0x400 | 0x6c | (port & 3), p); - break; - case 0x3eec: case 0x3eed: case 0x3eee: case 0x3eef: - ret = mach64_ext_readb(0x400 | 0x70 | (port & 3), p); - break; + case 0x32ec: + case 0x32ed: + case 0x32ee: + case 0x32ef: + ret = mach64_ext_readb(0x400 | 0x64 | (port & 3), p); + break; + case 0x36ec: + case 0x36ed: + case 0x36ee: + case 0x36ef: + ret = mach64_ext_readb(0x400 | 0x68 | (port & 3), p); + break; + case 0x3aec: + case 0x3aed: + case 0x3aee: + case 0x3aef: + ret = mach64_ext_readb(0x400 | 0x6c | (port & 3), p); + break; + case 0x3eec: + case 0x3eed: + case 0x3eee: + case 0x3eef: + ret = mach64_ext_readb(0x400 | 0x70 | (port & 3), p); + break; - case 0x42ec: case 0x42ed: case 0x42ee: case 0x42ef: - ret = mach64_ext_readb(0x400 | 0x80 | (port & 3), p); - break; - case 0x46ec: case 0x46ed: case 0x46ee: case 0x46ef: - ret = mach64_ext_readb(0x400 | 0x84 | (port & 3), p); - break; - case 0x4aec: case 0x4aed: case 0x4aee: case 0x4aef: - ret = mach64_ext_readb(0x400 | 0x90 | (port & 3), p); - break; + case 0x42ec: + case 0x42ed: + case 0x42ee: + case 0x42ef: + ret = mach64_ext_readb(0x400 | 0x80 | (port & 3), p); + break; + case 0x46ec: + case 0x46ed: + case 0x46ee: + case 0x46ef: + ret = mach64_ext_readb(0x400 | 0x84 | (port & 3), p); + break; + case 0x4aec: + case 0x4aed: + case 0x4aee: + case 0x4aef: + ret = mach64_ext_readb(0x400 | 0x90 | (port & 3), p); + break; - case 0x52ec: case 0x52ed: case 0x52ee: case 0x52ef: - ret = mach64_ext_readb(0x400 | 0xb0 | (port & 3), p); - break; + case 0x52ec: + case 0x52ed: + case 0x52ee: + case 0x52ef: + ret = mach64_ext_readb(0x400 | 0xb0 | (port & 3), p); + break; - case 0x56ec: - ret = mach64_ext_readb(0x400 | 0xb4, p); - break; - case 0x56ed: case 0x56ee: - ret = mach64_ext_readb(0x400 | 0xb5, p); - break; - case 0x5aec: - ret = mach64_ext_readb(0x400 | 0xb8, p); - break; - case 0x5aed: case 0x5aee: - ret = mach64_ext_readb(0x400 | 0xb9, p); - break; + case 0x56ec: + ret = mach64_ext_readb(0x400 | 0xb4, p); + break; + case 0x56ed: + case 0x56ee: + ret = mach64_ext_readb(0x400 | 0xb5, p); + break; + case 0x5aec: + ret = mach64_ext_readb(0x400 | 0xb8, p); + break; + case 0x5aed: + case 0x5aee: + ret = mach64_ext_readb(0x400 | 0xb9, p); + break; - case 0x5eec: case 0x5eed: case 0x5eee: case 0x5eef: - if (mach64->type == MACH64_GX) - ret = ati68860_ramdac_in((port & 3) | ((mach64->dac_cntl & 3) << 2), mach64->svga.ramdac, &mach64->svga); - else - ret = ati68860_ramdac_in(port & 3, mach64->svga.ramdac, &mach64->svga); - break; + case 0x5eec: + case 0x5eed: + case 0x5eee: + case 0x5eef: + if (mach64->type == MACH64_GX) + ret = ati68860_ramdac_in((port & 3) | ((mach64->dac_cntl & 3) << 2), mach64->svga.ramdac, &mach64->svga); + else + ret = ati68860_ramdac_in(port & 3, mach64->svga.ramdac, &mach64->svga); + break; - case 0x62ec: case 0x62ed: case 0x62ee: case 0x62ef: - ret = mach64_ext_readb(0x400 | 0xc4 | (port & 3), p); - break; + case 0x62ec: + case 0x62ed: + case 0x62ee: + case 0x62ef: + ret = mach64_ext_readb(0x400 | 0xc4 | (port & 3), p); + break; - case 0x66ec: case 0x66ed: case 0x66ee: case 0x66ef: - ret = mach64_ext_readb(0x400 | 0xd0 | (port & 3), p); - break; + case 0x66ec: + case 0x66ed: + case 0x66ee: + case 0x66ef: + ret = mach64_ext_readb(0x400 | 0xd0 | (port & 3), p); + break; - case 0x6aec: case 0x6aed: case 0x6aee: case 0x6aef: - mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 22) << 4); - READ8(port, mach64->config_cntl); - break; + case 0x6aec: + case 0x6aed: + case 0x6aee: + case 0x6aef: + mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 22) << 4); + READ8(port, mach64->config_cntl); + break; - case 0x6eec: case 0x6eed: case 0x6eee: case 0x6eef: - ret = mach64_ext_readb(0x400 | 0xe0 | (port & 3), p); - break; + case 0x6eec: + case 0x6eed: + case 0x6eee: + case 0x6eef: + ret = mach64_ext_readb(0x400 | 0xe0 | (port & 3), p); + break; - case 0x72ec: case 0x72ed: case 0x72ee: case 0x72ef: - ret = mach64_ext_readb(0x400 | 0xe4 | (port & 3), p); - break; + case 0x72ec: + case 0x72ed: + case 0x72ee: + case 0x72ef: + ret = mach64_ext_readb(0x400 | 0xe4 | (port & 3), p); + break; - default: - ret = 0; - break; - } - mach64_log("mach64_ext_inb : port %04X ret %02X\n", port, ret); - return ret; + default: + ret = 0; + break; + } + mach64_log("mach64_ext_inb : port %04X ret %02X\n", port, ret); + return ret; } -uint16_t mach64_ext_inw(uint16_t port, void *p) +uint16_t +mach64_ext_inw(uint16_t port, void *p) { - uint16_t ret; - switch (port) - { - default: - ret = mach64_ext_inb(port, p); - ret |= (mach64_ext_inb(port + 1, p) << 8); - break; - } - mach64_log("mach64_ext_inw : port %04X ret %04X\n", port, ret); - return ret; + uint16_t ret; + switch (port) { + default: + ret = mach64_ext_inb(port, p); + ret |= (mach64_ext_inb(port + 1, p) << 8); + break; + } + mach64_log("mach64_ext_inw : port %04X ret %04X\n", port, ret); + return ret; } -uint32_t mach64_ext_inl(uint16_t port, void *p) +uint32_t +mach64_ext_inl(uint16_t port, void *p) { - uint32_t ret; - switch (port) - { - case 0x56ec: - ret = mach64_ext_readl(0x400 | 0xb4, p); - break; - case 0x5aec: - ret = mach64_ext_readl(0x400 | 0xb8, p); - break; + uint32_t ret; + switch (port) { + case 0x56ec: + ret = mach64_ext_readl(0x400 | 0xb4, p); + break; + case 0x5aec: + ret = mach64_ext_readl(0x400 | 0xb8, p); + break; - default: - ret = mach64_ext_inw(port, p); - ret |= (mach64_ext_inw(port + 2, p) << 16); - break; - } - mach64_log("mach64_ext_inl : port %04X ret %08X\n", port, ret); - return ret; + default: + ret = mach64_ext_inw(port, p); + ret |= (mach64_ext_inw(port + 2, p) << 16); + break; + } + mach64_log("mach64_ext_inl : port %04X ret %08X\n", port, ret); + return ret; } -void mach64_ext_outb(uint16_t port, uint8_t val, void *p) +void +mach64_ext_outb(uint16_t port, uint8_t val, void *p) { - mach64_t *mach64 = (mach64_t *)p; + mach64_t *mach64 = (mach64_t *) p; - mach64_log("mach64_ext_outb : port %04X val %02X\n", port, val); - switch (port) - { - case 0x02ec: case 0x02ed: case 0x02ee: case 0x02ef: - case 0x7eec: case 0x7eed: case 0x7eee: case 0x7eef: - mach64_ext_writeb(0x400 | 0x00 | (port & 3), val, p); - break; - case 0x0aec: case 0x0aed: case 0x0aee: case 0x0aef: - mach64_ext_writeb(0x400 | 0x08 | (port & 3), val, p); - break; - case 0x0eec: case 0x0eed: case 0x0eee: case 0x0eef: - mach64_ext_writeb(0x400 | 0x0c | (port & 3), val, p); - break; + mach64_log("mach64_ext_outb : port %04X val %02X\n", port, val); + switch (port) { + case 0x02ec: + case 0x02ed: + case 0x02ee: + case 0x02ef: + case 0x7eec: + case 0x7eed: + case 0x7eee: + case 0x7eef: + mach64_ext_writeb(0x400 | 0x00 | (port & 3), val, p); + break; + case 0x0aec: + case 0x0aed: + case 0x0aee: + case 0x0aef: + mach64_ext_writeb(0x400 | 0x08 | (port & 3), val, p); + break; + case 0x0eec: + case 0x0eed: + case 0x0eee: + case 0x0eef: + mach64_ext_writeb(0x400 | 0x0c | (port & 3), val, p); + break; - case 0x16ec: case 0x16ed: case 0x16ee: case 0x16ef: - mach64_ext_writeb(0x400 | 0x14 | (port & 3), val, p); - break; + case 0x16ec: + case 0x16ed: + case 0x16ee: + case 0x16ef: + mach64_ext_writeb(0x400 | 0x14 | (port & 3), val, p); + break; - case 0x1aec: - mach64_ext_writeb(0x400 | 0x18, val, p); - break; + case 0x1aec: + mach64_ext_writeb(0x400 | 0x18, val, p); + break; - case 0x1eec: case 0x1eed: case 0x1eee: case 0x1eef: - mach64_ext_writeb(0x400 | 0x1c | (port & 3), val, p); - break; + case 0x1eec: + case 0x1eed: + case 0x1eee: + case 0x1eef: + mach64_ext_writeb(0x400 | 0x1c | (port & 3), val, p); + break; - case 0x22ec: case 0x22ed: case 0x22ee: case 0x22ef: - mach64_ext_writeb(0x400 | 0x40 | (port & 3), val, p); - break; - case 0x26ec: case 0x26ed: case 0x26ee: case 0x26ef: - mach64_ext_writeb(0x400 | 0x44 | (port & 3), val, p); - break; - case 0x2aec: case 0x2aed: case 0x2aee: case 0x2aef: - mach64_ext_writeb(0x400 | 0x48 | (port & 3), val, p); - break; - case 0x2eec: case 0x2eed: case 0x2eee: case 0x2eef: - mach64_ext_writeb(0x400 | 0x60 | (port & 3), val, p); - break; + case 0x22ec: + case 0x22ed: + case 0x22ee: + case 0x22ef: + mach64_ext_writeb(0x400 | 0x40 | (port & 3), val, p); + break; + case 0x26ec: + case 0x26ed: + case 0x26ee: + case 0x26ef: + mach64_ext_writeb(0x400 | 0x44 | (port & 3), val, p); + break; + case 0x2aec: + case 0x2aed: + case 0x2aee: + case 0x2aef: + mach64_ext_writeb(0x400 | 0x48 | (port & 3), val, p); + break; + case 0x2eec: + case 0x2eed: + case 0x2eee: + case 0x2eef: + mach64_ext_writeb(0x400 | 0x60 | (port & 3), val, p); + break; - case 0x32ec: case 0x32ed: case 0x32ee: case 0x32ef: - mach64_ext_writeb(0x400 | 0x64 | (port & 3), val, p); - break; - case 0x36ec: case 0x36ed: case 0x36ee: case 0x36ef: - mach64_ext_writeb(0x400 | 0x68 | (port & 3), val, p); - break; - case 0x3aec: case 0x3aed: case 0x3aee: case 0x3aef: - mach64_ext_writeb(0x400 | 0x6c | (port & 3), val, p); - break; - case 0x3eec: case 0x3eed: case 0x3eee: case 0x3eef: - mach64_ext_writeb(0x400 | 0x70 | (port & 3), val, p); - break; + case 0x32ec: + case 0x32ed: + case 0x32ee: + case 0x32ef: + mach64_ext_writeb(0x400 | 0x64 | (port & 3), val, p); + break; + case 0x36ec: + case 0x36ed: + case 0x36ee: + case 0x36ef: + mach64_ext_writeb(0x400 | 0x68 | (port & 3), val, p); + break; + case 0x3aec: + case 0x3aed: + case 0x3aee: + case 0x3aef: + mach64_ext_writeb(0x400 | 0x6c | (port & 3), val, p); + break; + case 0x3eec: + case 0x3eed: + case 0x3eee: + case 0x3eef: + mach64_ext_writeb(0x400 | 0x70 | (port & 3), val, p); + break; - case 0x42ec: case 0x42ed: case 0x42ee: case 0x42ef: - mach64_ext_writeb(0x400 | 0x80 | (port & 3), val, p); - break; - case 0x46ec: case 0x46ed: case 0x46ee: case 0x46ef: - mach64_ext_writeb(0x400 | 0x84 | (port & 3), val, p); - break; - case 0x4aec: case 0x4aed: case 0x4aee: case 0x4aef: - mach64_ext_writeb(0x400 | 0x90 | (port & 3), val, p); - break; + case 0x42ec: + case 0x42ed: + case 0x42ee: + case 0x42ef: + mach64_ext_writeb(0x400 | 0x80 | (port & 3), val, p); + break; + case 0x46ec: + case 0x46ed: + case 0x46ee: + case 0x46ef: + mach64_ext_writeb(0x400 | 0x84 | (port & 3), val, p); + break; + case 0x4aec: + case 0x4aed: + case 0x4aee: + case 0x4aef: + mach64_ext_writeb(0x400 | 0x90 | (port & 3), val, p); + break; - case 0x52ec: case 0x52ed: case 0x52ee: case 0x52ef: - mach64_ext_writeb(0x400 | 0xb0 | (port & 3), val, p); - break; + case 0x52ec: + case 0x52ed: + case 0x52ee: + case 0x52ef: + mach64_ext_writeb(0x400 | 0xb0 | (port & 3), val, p); + break; - case 0x56ec: - mach64_ext_writeb(0x400 | 0xb4, val, p); - break; - case 0x56ed: case 0x56ee: - mach64_ext_writeb(0x400 | 0xb5, val, p); - break; - case 0x5aec: - mach64_ext_writeb(0x400 | 0xb8, val, p); - break; - case 0x5aed: case 0x5aee: - mach64_ext_writeb(0x400 | 0xb9, val, p); - break; + case 0x56ec: + mach64_ext_writeb(0x400 | 0xb4, val, p); + break; + case 0x56ed: + case 0x56ee: + mach64_ext_writeb(0x400 | 0xb5, val, p); + break; + case 0x5aec: + mach64_ext_writeb(0x400 | 0xb8, val, p); + break; + case 0x5aed: + case 0x5aee: + mach64_ext_writeb(0x400 | 0xb9, val, p); + break; - case 0x5eec: case 0x5eed: case 0x5eee: case 0x5eef: - if (mach64->type == MACH64_GX) - ati68860_ramdac_out((port & 3) | ((mach64->dac_cntl & 3) << 2), val, mach64->svga.ramdac, &mach64->svga); - else - ati68860_ramdac_out(port & 3, val, mach64->svga.ramdac, &mach64->svga); - break; + case 0x5eec: + case 0x5eed: + case 0x5eee: + case 0x5eef: + if (mach64->type == MACH64_GX) + ati68860_ramdac_out((port & 3) | ((mach64->dac_cntl & 3) << 2), val, mach64->svga.ramdac, &mach64->svga); + else + ati68860_ramdac_out(port & 3, val, mach64->svga.ramdac, &mach64->svga); + break; - case 0x62ec: case 0x62ed: case 0x62ee: case 0x62ef: - mach64_ext_writeb(0x400 | 0xc4 | (port & 3), val, p); - break; + case 0x62ec: + case 0x62ed: + case 0x62ee: + case 0x62ef: + mach64_ext_writeb(0x400 | 0xc4 | (port & 3), val, p); + break; - case 0x66ec: case 0x66ed: case 0x66ee: case 0x66ef: - mach64_ext_writeb(0x400 | 0xd0 | (port & 3), val, p); - break; + case 0x66ec: + case 0x66ed: + case 0x66ee: + case 0x66ef: + mach64_ext_writeb(0x400 | 0xd0 | (port & 3), val, p); + break; - case 0x6aec: case 0x6aed: case 0x6aee: case 0x6aef: - WRITE8(port, mach64->config_cntl, val); - mach64_updatemapping(mach64); - break; - } + case 0x6aec: + case 0x6aed: + case 0x6aee: + case 0x6aef: + WRITE8(port, mach64->config_cntl, val); + mach64_updatemapping(mach64); + break; + } } -void mach64_ext_outw(uint16_t port, uint16_t val, void *p) +void +mach64_ext_outw(uint16_t port, uint16_t val, void *p) { - mach64_log("mach64_ext_outw : port %04X val %04X\n", port, val); - switch (port) - { - default: - mach64_ext_outb(port, val, p); - mach64_ext_outb(port + 1, val >> 8, p); - break; - } + mach64_log("mach64_ext_outw : port %04X val %04X\n", port, val); + switch (port) { + default: + mach64_ext_outb(port, val, p); + mach64_ext_outb(port + 1, val >> 8, p); + break; + } } -void mach64_ext_outl(uint16_t port, uint32_t val, void *p) +void +mach64_ext_outl(uint16_t port, uint32_t val, void *p) { - mach64_log("mach64_ext_outl : port %04X val %08X\n", port, val); - switch (port) - { - default: - mach64_ext_outw(port, val, p); - mach64_ext_outw(port + 2, val >> 16, p); - break; - } + mach64_log("mach64_ext_outl : port %04X val %08X\n", port, val); + switch (port) { + default: + mach64_ext_outw(port, val, p); + mach64_ext_outw(port + 2, val >> 16, p); + break; + } } -static uint8_t mach64_block_inb(uint16_t port, void *p) +static uint8_t +mach64_block_inb(uint16_t port, void *p) { - mach64_t *mach64 = (mach64_t *)p; - uint8_t ret; + mach64_t *mach64 = (mach64_t *) p; + uint8_t ret; - ret = mach64_ext_readb(0x400 | (port & 0x3ff), mach64); - mach64_log("mach64_block_inb : port %04X ret %02X\n", port, ret); - return ret; + ret = mach64_ext_readb(0x400 | (port & 0x3ff), mach64); + mach64_log("mach64_block_inb : port %04X ret %02X\n", port, ret); + return ret; } -static uint16_t mach64_block_inw(uint16_t port, void *p) +static uint16_t +mach64_block_inw(uint16_t port, void *p) { - mach64_t *mach64 = (mach64_t *)p; - uint16_t ret; + mach64_t *mach64 = (mach64_t *) p; + uint16_t ret; - ret = mach64_ext_readw(0x400 | (port & 0x3ff), mach64); - mach64_log("mach64_block_inw : port %04X ret %04X\n", port, ret); - return ret; + ret = mach64_ext_readw(0x400 | (port & 0x3ff), mach64); + mach64_log("mach64_block_inw : port %04X ret %04X\n", port, ret); + return ret; } -static uint32_t mach64_block_inl(uint16_t port, void *p) +static uint32_t +mach64_block_inl(uint16_t port, void *p) { - mach64_t *mach64 = (mach64_t *)p; - uint32_t ret; + mach64_t *mach64 = (mach64_t *) p; + uint32_t ret; - ret = mach64_ext_readl(0x400 | (port & 0x3ff), mach64); - mach64_log("mach64_block_inl : port %04X ret %08X\n", port, ret); - return ret; + ret = mach64_ext_readl(0x400 | (port & 0x3ff), mach64); + mach64_log("mach64_block_inl : port %04X ret %08X\n", port, ret); + return ret; } -static void mach64_block_outb(uint16_t port, uint8_t val, void *p) +static void +mach64_block_outb(uint16_t port, uint8_t val, void *p) { - mach64_t *mach64 = (mach64_t *)p; + mach64_t *mach64 = (mach64_t *) p; - mach64_log("mach64_block_outb : port %04X val %02X\n ", port, val); - mach64_ext_writeb(0x400 | (port & 0x3ff), val, mach64); + mach64_log("mach64_block_outb : port %04X val %02X\n ", port, val); + mach64_ext_writeb(0x400 | (port & 0x3ff), val, mach64); } -static void mach64_block_outw(uint16_t port, uint16_t val, void *p) +static void +mach64_block_outw(uint16_t port, uint16_t val, void *p) { - mach64_t *mach64 = (mach64_t *)p; + mach64_t *mach64 = (mach64_t *) p; - mach64_log("mach64_block_outw : port %04X val %04X\n ", port, val); - mach64_ext_writew(0x400 | (port & 0x3ff), val, mach64); + mach64_log("mach64_block_outw : port %04X val %04X\n ", port, val); + mach64_ext_writew(0x400 | (port & 0x3ff), val, mach64); } -static void mach64_block_outl(uint16_t port, uint32_t val, void *p) +static void +mach64_block_outl(uint16_t port, uint32_t val, void *p) { - mach64_t *mach64 = (mach64_t *)p; + mach64_t *mach64 = (mach64_t *) p; - mach64_log("mach64_block_outl : port %04X val %08X\n ", port, val); - mach64_ext_writel(0x400 | (port & 0x3ff), val, mach64); + mach64_log("mach64_block_outl : port %04X val %08X\n ", port, val); + mach64_ext_writel(0x400 | (port & 0x3ff), val, mach64); } -void mach64_write(uint32_t addr, uint8_t val, void *p) +void +mach64_write(uint32_t addr, uint8_t val, void *p) { - mach64_t *mach64 = (mach64_t *)p; - svga_t *svga = &mach64->svga; - addr = (addr & 0x7fff) + mach64->bank_w[(addr >> 15) & 1]; - svga_write_linear(addr, val, svga); + mach64_t *mach64 = (mach64_t *) p; + svga_t *svga = &mach64->svga; + addr = (addr & 0x7fff) + mach64->bank_w[(addr >> 15) & 1]; + svga_write_linear(addr, val, svga); } -void mach64_writew(uint32_t addr, uint16_t val, void *p) +void +mach64_writew(uint32_t addr, uint16_t val, void *p) { - mach64_t *mach64 = (mach64_t *)p; - svga_t *svga = &mach64->svga; + mach64_t *mach64 = (mach64_t *) p; + svga_t *svga = &mach64->svga; - addr = (addr & 0x7fff) + mach64->bank_w[(addr >> 15) & 1]; - svga_writew_linear(addr, val, svga); + addr = (addr & 0x7fff) + mach64->bank_w[(addr >> 15) & 1]; + svga_writew_linear(addr, val, svga); } -void mach64_writel(uint32_t addr, uint32_t val, void *p) +void +mach64_writel(uint32_t addr, uint32_t val, void *p) { - mach64_t *mach64 = (mach64_t *)p; - svga_t *svga = &mach64->svga; + mach64_t *mach64 = (mach64_t *) p; + svga_t *svga = &mach64->svga; - addr = (addr & 0x7fff) + mach64->bank_w[(addr >> 15) & 1]; - svga_writel_linear(addr, val, svga); + addr = (addr & 0x7fff) + mach64->bank_w[(addr >> 15) & 1]; + svga_writel_linear(addr, val, svga); } -uint8_t mach64_read(uint32_t addr, void *p) +uint8_t +mach64_read(uint32_t addr, void *p) { - mach64_t *mach64 = (mach64_t *)p; - svga_t *svga = &mach64->svga; - uint8_t ret; - addr = (addr & 0x7fff) + mach64->bank_r[(addr >> 15) & 1]; - ret = svga_read_linear(addr, svga); - return ret; + mach64_t *mach64 = (mach64_t *) p; + svga_t *svga = &mach64->svga; + uint8_t ret; + addr = (addr & 0x7fff) + mach64->bank_r[(addr >> 15) & 1]; + ret = svga_read_linear(addr, svga); + return ret; } -uint16_t mach64_readw(uint32_t addr, void *p) +uint16_t +mach64_readw(uint32_t addr, void *p) { - mach64_t *mach64 = (mach64_t *)p; - svga_t *svga = &mach64->svga; + mach64_t *mach64 = (mach64_t *) p; + svga_t *svga = &mach64->svga; - addr = (addr & 0x7fff) + mach64->bank_r[(addr >> 15) & 1]; - return svga_readw_linear(addr, svga); + addr = (addr & 0x7fff) + mach64->bank_r[(addr >> 15) & 1]; + return svga_readw_linear(addr, svga); } -uint32_t mach64_readl(uint32_t addr, void *p) +uint32_t +mach64_readl(uint32_t addr, void *p) { - mach64_t *mach64 = (mach64_t *)p; - svga_t *svga = &mach64->svga; + mach64_t *mach64 = (mach64_t *) p; + svga_t *svga = &mach64->svga; - addr = (addr & 0x7fff) + mach64->bank_r[(addr >> 15) & 1]; - return svga_readl_linear(addr, svga); + addr = (addr & 0x7fff) + mach64->bank_r[(addr >> 15) & 1]; + return svga_readl_linear(addr, svga); } +#define CLAMP(x) \ + do { \ + if ((x) & ~0xff) \ + x = ((x) < 0) ? 0 : 0xff; \ + } while (0) -#define CLAMP(x) do \ - { \ - if ((x) & ~0xff) \ - x = ((x) < 0) ? 0 : 0xff; \ - } \ - while (0) +#define DECODE_ARGB1555() \ + do { \ + for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x++) { \ + uint16_t dat = ((uint16_t *) src)[x]; \ + \ + int b = dat & 0x1f; \ + int g = (dat >> 5) & 0x1f; \ + int r = (dat >> 10) & 0x1f; \ + \ + b = (b << 3) | (b >> 2); \ + g = (g << 3) | (g >> 2); \ + r = (r << 3) | (r >> 2); \ + \ + mach64->overlay_dat[x] = (r << 16) | (g << 8) | b; \ + } \ + } while (0) -#define DECODE_ARGB1555() \ - do \ - { \ - for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x++) \ - { \ - uint16_t dat = ((uint16_t *)src)[x]; \ +#define DECODE_RGB565() \ + do { \ + for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x++) { \ + uint16_t dat = ((uint16_t *) src)[x]; \ + \ + int b = dat & 0x1f; \ + int g = (dat >> 5) & 0x3f; \ + int r = (dat >> 11) & 0x1f; \ + \ + b = (b << 3) | (b >> 2); \ + g = (g << 2) | (g >> 4); \ + r = (r << 3) | (r >> 2); \ + \ + mach64->overlay_dat[x] = (r << 16) | (g << 8) | b; \ + } \ + } while (0) + +#define DECODE_ARGB8888() \ + do { \ + for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x++) { \ + int b = src[0]; \ + int g = src[1]; \ + int r = src[2]; \ + src += 4; \ + \ + mach64->overlay_dat[x] = (r << 16) | (g << 8) | b; \ + } \ + } while (0) + +#define DECODE_VYUY422() \ + do { \ + for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x += 2) { \ + uint8_t y1, y2; \ + int8_t u, v; \ + int dR, dG, dB; \ + int r, g, b; \ \ - int b = dat & 0x1f; \ - int g = (dat >> 5) & 0x1f; \ - int r = (dat >> 10) & 0x1f; \ + y1 = src[0]; \ + u = src[1] - 0x80; \ + y2 = src[2]; \ + v = src[3] - 0x80; \ + src += 4; \ \ - b = (b << 3) | (b >> 2); \ - g = (g << 3) | (g >> 2); \ - r = (r << 3) | (r >> 2); \ + dR = (359 * v) >> 8; \ + dG = (88 * u + 183 * v) >> 8; \ + dB = (453 * u) >> 8; \ \ - mach64->overlay_dat[x] = (r << 16) | (g << 8) | b; \ - } \ - } while (0) + r = y1 + dR; \ + CLAMP(r); \ + g = y1 - dG; \ + CLAMP(g); \ + b = y1 + dB; \ + CLAMP(b); \ + mach64->overlay_dat[x] = (r << 16) | (g << 8) | b; \ + \ + r = y2 + dR; \ + CLAMP(r); \ + g = y2 - dG; \ + CLAMP(g); \ + b = y2 + dB; \ + CLAMP(b); \ + mach64->overlay_dat[x + 1] = (r << 16) | (g << 8) | b; \ + } \ + } while (0) -#define DECODE_RGB565() \ - do \ - { \ - for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x++) \ - { \ - uint16_t dat = ((uint16_t *)src)[x]; \ +#define DECODE_YVYU422() \ + do { \ + for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x += 2) { \ + uint8_t y1, y2; \ + int8_t u, v; \ + int dR, dG, dB; \ + int r, g, b; \ \ - int b = dat & 0x1f; \ - int g = (dat >> 5) & 0x3f; \ - int r = (dat >> 11) & 0x1f; \ + u = src[0] - 0x80; \ + y1 = src[1]; \ + v = src[2] - 0x80; \ + y2 = src[3]; \ + src += 4; \ \ - b = (b << 3) | (b >> 2); \ - g = (g << 2) | (g >> 4); \ - r = (r << 3) | (r >> 2); \ + dR = (359 * v) >> 8; \ + dG = (88 * u + 183 * v) >> 8; \ + dB = (453 * u) >> 8; \ \ - mach64->overlay_dat[x] = (r << 16) | (g << 8) | b; \ - } \ - } while (0) + r = y1 + dR; \ + CLAMP(r); \ + g = y1 - dG; \ + CLAMP(g); \ + b = y1 + dB; \ + CLAMP(b); \ + mach64->overlay_dat[x] = (r << 16) | (g << 8) | b; \ + \ + r = y2 + dR; \ + CLAMP(r); \ + g = y2 - dG; \ + CLAMP(g); \ + b = y2 + dB; \ + CLAMP(b); \ + mach64->overlay_dat[x + 1] = (r << 16) | (g << 8) | b; \ + } \ + } while (0) -#define DECODE_ARGB8888() \ - do \ - { \ - for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x++) \ - { \ - int b = src[0]; \ - int g = src[1]; \ - int r = src[2]; \ - src += 4; \ - \ - mach64->overlay_dat[x] = (r << 16) | (g << 8) | b; \ - } \ - } while (0) - -#define DECODE_VYUY422() \ - do \ - { \ - for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x += 2) \ - { \ - uint8_t y1, y2; \ - int8_t u, v; \ - int dR, dG, dB; \ - int r, g, b; \ - \ - y1 = src[0]; \ - u = src[1] - 0x80; \ - y2 = src[2]; \ - v = src[3] - 0x80; \ - src += 4; \ - \ - dR = (359*v) >> 8; \ - dG = (88*u + 183*v) >> 8; \ - dB = (453*u) >> 8; \ - \ - r = y1 + dR; \ - CLAMP(r); \ - g = y1 - dG; \ - CLAMP(g); \ - b = y1 + dB; \ - CLAMP(b); \ - mach64->overlay_dat[x] = (r << 16) | (g << 8) | b; \ - \ - r = y2 + dR; \ - CLAMP(r); \ - g = y2 - dG; \ - CLAMP(g); \ - b = y2 + dB; \ - CLAMP(b); \ - mach64->overlay_dat[x+1] = (r << 16) | (g << 8) | b; \ - } \ - } while (0) - -#define DECODE_YVYU422() \ - do \ - { \ - for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x += 2) \ - { \ - uint8_t y1, y2; \ - int8_t u, v; \ - int dR, dG, dB; \ - int r, g, b; \ - \ - u = src[0] - 0x80; \ - y1 = src[1]; \ - v = src[2] - 0x80; \ - y2 = src[3]; \ - src += 4; \ - \ - dR = (359*v) >> 8; \ - dG = (88*u + 183*v) >> 8; \ - dB = (453*u) >> 8; \ - \ - r = y1 + dR; \ - CLAMP(r); \ - g = y1 - dG; \ - CLAMP(g); \ - b = y1 + dB; \ - CLAMP(b); \ - mach64->overlay_dat[x] = (r << 16) | (g << 8) | b; \ - \ - r = y2 + dR; \ - CLAMP(r); \ - g = y2 - dG; \ - CLAMP(g); \ - b = y2 + dB; \ - CLAMP(b); \ - mach64->overlay_dat[x+1] = (r << 16) | (g << 8) | b; \ - } \ - } while (0) - -void mach64_overlay_draw(svga_t *svga, int displine) +void +mach64_overlay_draw(svga_t *svga, int displine) { - mach64_t *mach64 = (mach64_t *)svga->p; - int x; - int h_acc = 0; - int h_max = (mach64->scaler_height_width >> 16) & 0x3ff; - int h_inc = mach64->overlay_scale_inc >> 16; - int v_max = mach64->scaler_height_width & 0x3ff; - int v_inc = mach64->overlay_scale_inc & 0xffff; - uint32_t *p; - uint8_t *src = &svga->vram[svga->overlay.addr]; - int old_y = mach64->overlay_v_acc; - int y_diff; - int video_key_fn = mach64->overlay_key_cntl & 5; - int graphics_key_fn = (mach64->overlay_key_cntl >> 4) & 5; - int overlay_cmp_mix = (mach64->overlay_key_cntl >> 8) & 0xf; + mach64_t *mach64 = (mach64_t *) svga->p; + int x; + int h_acc = 0; + int h_max = (mach64->scaler_height_width >> 16) & 0x3ff; + int h_inc = mach64->overlay_scale_inc >> 16; + int v_max = mach64->scaler_height_width & 0x3ff; + int v_inc = mach64->overlay_scale_inc & 0xffff; + uint32_t *p; + uint8_t *src = &svga->vram[svga->overlay.addr]; + int old_y = mach64->overlay_v_acc; + int y_diff; + int video_key_fn = mach64->overlay_key_cntl & 5; + int graphics_key_fn = (mach64->overlay_key_cntl >> 4) & 5; + int overlay_cmp_mix = (mach64->overlay_key_cntl >> 8) & 0xf; - p = &buffer32->line[displine][svga->x_add + mach64->svga.overlay_latch.x]; + p = &buffer32->line[displine][svga->x_add + mach64->svga.overlay_latch.x]; - if (mach64->scaler_update) - { - switch (mach64->scaler_format) - { - case 0x3: - DECODE_ARGB1555(); - break; - case 0x4: - DECODE_RGB565(); - break; - case 0x6: - DECODE_ARGB8888(); - break; - case 0xb: - DECODE_VYUY422(); - break; - case 0xc: - DECODE_YVYU422(); - break; + if (mach64->scaler_update) { + switch (mach64->scaler_format) { + case 0x3: + DECODE_ARGB1555(); + break; + case 0x4: + DECODE_RGB565(); + break; + case 0x6: + DECODE_ARGB8888(); + break; + case 0xb: + DECODE_VYUY422(); + break; + case 0xc: + DECODE_YVYU422(); + break; - default: - mach64_log("Unknown Mach64 scaler format %x\n", mach64->scaler_format); - /*Fill buffer with something recognisably wrong*/ - for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x++) - mach64->overlay_dat[x] = 0xff00ff; - break; - } - } - - if (overlay_cmp_mix == 2) - { + default: + mach64_log("Unknown Mach64 scaler format %x\n", mach64->scaler_format); + /*Fill buffer with something recognisably wrong*/ for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x++) - { - int h = h_acc >> 12; - - p[x] = mach64->overlay_dat[h]; - - h_acc += h_inc; - if (h_acc > (h_max << 12)) - h_acc = (h_max << 12); - } + mach64->overlay_dat[x] = 0xff00ff; + break; } - else - { - for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x++) - { - int h = h_acc >> 12; - int gr_cmp = 0, vid_cmp = 0; - int use_video = 0; + } - switch (video_key_fn) - { - case 0: vid_cmp = 0; break; - case 1: vid_cmp = 1; break; - case 4: vid_cmp = ((mach64->overlay_dat[h] ^ mach64->overlay_video_key_clr) & mach64->overlay_video_key_msk); break; - case 5: vid_cmp = !((mach64->overlay_dat[h] ^ mach64->overlay_video_key_clr) & mach64->overlay_video_key_msk); break; - } - switch (graphics_key_fn) - { - case 0: gr_cmp = 0; break; - case 1: gr_cmp = 1; break; - case 4: gr_cmp = (((p[x]) ^ mach64->overlay_graphics_key_clr) & mach64->overlay_graphics_key_msk & 0xffffff); break; - case 5: gr_cmp = !(((p[x]) ^ mach64->overlay_graphics_key_clr) & mach64->overlay_graphics_key_msk & 0xffffff); break; - } - vid_cmp = vid_cmp ? -1 : 0; - gr_cmp = gr_cmp ? -1 : 0; + if (overlay_cmp_mix == 2) { + for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x++) { + int h = h_acc >> 12; - switch (overlay_cmp_mix) - { - case 0x0: use_video = gr_cmp; break; - case 0x1: use_video = 0; break; - case 0x2: use_video = ~0; break; - case 0x3: use_video = ~gr_cmp; break; - case 0x4: use_video = ~vid_cmp; break; - case 0x5: use_video = gr_cmp ^ vid_cmp; break; - case 0x6: use_video = ~gr_cmp ^ vid_cmp; break; - case 0x7: use_video = vid_cmp; break; - case 0x8: use_video = ~gr_cmp | ~vid_cmp; break; - case 0x9: use_video = gr_cmp | ~vid_cmp; break; - case 0xa: use_video = ~gr_cmp | vid_cmp; break; - case 0xb: use_video = gr_cmp | vid_cmp; break; - case 0xc: use_video = gr_cmp & vid_cmp; break; - case 0xd: use_video = ~gr_cmp & vid_cmp; break; - case 0xe: use_video = gr_cmp & ~vid_cmp; break; - case 0xf: use_video = ~gr_cmp & ~vid_cmp; break; - } + p[x] = mach64->overlay_dat[h]; - if (use_video) - p[x] = mach64->overlay_dat[h]; - - h_acc += h_inc; - if (h_acc > (h_max << 12)) - h_acc = (h_max << 12); - } + h_acc += h_inc; + if (h_acc > (h_max << 12)) + h_acc = (h_max << 12); } + } else { + for (x = 0; x < mach64->svga.overlay_latch.cur_xsize; x++) { + int h = h_acc >> 12; + int gr_cmp = 0, vid_cmp = 0; + int use_video = 0; - mach64->overlay_v_acc += v_inc; - if (mach64->overlay_v_acc > (v_max << 12)) - mach64->overlay_v_acc = v_max << 12; + switch (video_key_fn) { + case 0: + vid_cmp = 0; + break; + case 1: + vid_cmp = 1; + break; + case 4: + vid_cmp = ((mach64->overlay_dat[h] ^ mach64->overlay_video_key_clr) & mach64->overlay_video_key_msk); + break; + case 5: + vid_cmp = !((mach64->overlay_dat[h] ^ mach64->overlay_video_key_clr) & mach64->overlay_video_key_msk); + break; + } + switch (graphics_key_fn) { + case 0: + gr_cmp = 0; + break; + case 1: + gr_cmp = 1; + break; + case 4: + gr_cmp = (((p[x]) ^ mach64->overlay_graphics_key_clr) & mach64->overlay_graphics_key_msk & 0xffffff); + break; + case 5: + gr_cmp = !(((p[x]) ^ mach64->overlay_graphics_key_clr) & mach64->overlay_graphics_key_msk & 0xffffff); + break; + } + vid_cmp = vid_cmp ? -1 : 0; + gr_cmp = gr_cmp ? -1 : 0; - y_diff = (mach64->overlay_v_acc >> 12) - (old_y >> 12); + switch (overlay_cmp_mix) { + case 0x0: + use_video = gr_cmp; + break; + case 0x1: + use_video = 0; + break; + case 0x2: + use_video = ~0; + break; + case 0x3: + use_video = ~gr_cmp; + break; + case 0x4: + use_video = ~vid_cmp; + break; + case 0x5: + use_video = gr_cmp ^ vid_cmp; + break; + case 0x6: + use_video = ~gr_cmp ^ vid_cmp; + break; + case 0x7: + use_video = vid_cmp; + break; + case 0x8: + use_video = ~gr_cmp | ~vid_cmp; + break; + case 0x9: + use_video = gr_cmp | ~vid_cmp; + break; + case 0xa: + use_video = ~gr_cmp | vid_cmp; + break; + case 0xb: + use_video = gr_cmp | vid_cmp; + break; + case 0xc: + use_video = gr_cmp & vid_cmp; + break; + case 0xd: + use_video = ~gr_cmp & vid_cmp; + break; + case 0xe: + use_video = gr_cmp & ~vid_cmp; + break; + case 0xf: + use_video = ~gr_cmp & ~vid_cmp; + break; + } - if (mach64->scaler_format == 6) - svga->overlay.addr += svga->overlay.pitch*4*y_diff; - else - svga->overlay.addr += svga->overlay.pitch*2*y_diff; + if (use_video) + p[x] = mach64->overlay_dat[h]; - mach64->scaler_update = y_diff; + h_acc += h_inc; + if (h_acc > (h_max << 12)) + h_acc = (h_max << 12); + } + } + + mach64->overlay_v_acc += v_inc; + if (mach64->overlay_v_acc > (v_max << 12)) + mach64->overlay_v_acc = v_max << 12; + + y_diff = (mach64->overlay_v_acc >> 12) - (old_y >> 12); + + if (mach64->scaler_format == 6) + svga->overlay.addr += svga->overlay.pitch * 4 * y_diff; + else + svga->overlay.addr += svga->overlay.pitch * 2 * y_diff; + + mach64->scaler_update = y_diff; } -static void mach64_io_remove(mach64_t *mach64) +static void +mach64_io_remove(mach64_t *mach64) { - int c; - uint16_t io_base = 0x02ec; + int c; + uint16_t io_base = 0x02ec; - switch (mach64->io_base) - { - case 0: - default: - io_base = 0x02ec; - break; - case 1: - io_base = 0x01cc; - break; - case 2: - io_base = 0x01c8; - break; - case 3: - fatal("Attempting to use the reserved value for I/O Base\n"); - return; - } + switch (mach64->io_base) { + case 0: + default: + io_base = 0x02ec; + break; + case 1: + io_base = 0x01cc; + break; + case 2: + io_base = 0x01c8; + break; + case 3: + fatal("Attempting to use the reserved value for I/O Base\n"); + return; + } - io_removehandler(0x03c0, 0x0020, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64); + io_removehandler(0x03c0, 0x0020, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64); - for (c = 0; c < 8; c++) - { - io_removehandler((c * 0x1000) + 0x0000 + io_base, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); - io_removehandler((c * 0x1000) + 0x0400 + io_base, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); - io_removehandler((c * 0x1000) + 0x0800 + io_base, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); - io_removehandler((c * 0x1000) + 0x0c00 + io_base, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); - } + for (c = 0; c < 8; c++) { + io_removehandler((c * 0x1000) + 0x0000 + io_base, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); + io_removehandler((c * 0x1000) + 0x0400 + io_base, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); + io_removehandler((c * 0x1000) + 0x0800 + io_base, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); + io_removehandler((c * 0x1000) + 0x0c00 + io_base, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); + } - io_removehandler(0x01ce, 0x0002, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64); + io_removehandler(0x01ce, 0x0002, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64); - if (mach64->block_decoded_io && mach64->block_decoded_io < 0x10000) - io_removehandler(mach64->block_decoded_io, 0x0400, mach64_block_inb, mach64_block_inw, mach64_block_inl, mach64_block_outb, mach64_block_outw, mach64_block_outl, mach64); + if (mach64->block_decoded_io && mach64->block_decoded_io < 0x10000) + io_removehandler(mach64->block_decoded_io, 0x0400, mach64_block_inb, mach64_block_inw, mach64_block_inl, mach64_block_outb, mach64_block_outw, mach64_block_outl, mach64); } -static void mach64_io_set(mach64_t *mach64) +static void +mach64_io_set(mach64_t *mach64) { - int c; + int c; - mach64_io_remove(mach64); + mach64_io_remove(mach64); - io_sethandler(0x03c0, 0x0020, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64); + io_sethandler(0x03c0, 0x0020, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64); - if (!mach64->use_block_decoded_io) - { - for (c = 0; c < 8; c++) - { - io_sethandler((c * 0x1000) + 0x2ec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); - io_sethandler((c * 0x1000) + 0x6ec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); - io_sethandler((c * 0x1000) + 0xaec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); - io_sethandler((c * 0x1000) + 0xeec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); - } + if (!mach64->use_block_decoded_io) { + for (c = 0; c < 8; c++) { + io_sethandler((c * 0x1000) + 0x2ec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); + io_sethandler((c * 0x1000) + 0x6ec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); + io_sethandler((c * 0x1000) + 0xaec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); + io_sethandler((c * 0x1000) + 0xeec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64); } + } - io_sethandler(0x01ce, 0x0002, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64); + io_sethandler(0x01ce, 0x0002, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64); - if (mach64->use_block_decoded_io && mach64->block_decoded_io && mach64->block_decoded_io < 0x10000) - io_sethandler(mach64->block_decoded_io, 0x0400, mach64_block_inb, mach64_block_inw, mach64_block_inl, mach64_block_outb, mach64_block_outw, mach64_block_outl, mach64); + if (mach64->use_block_decoded_io && mach64->block_decoded_io && mach64->block_decoded_io < 0x10000) + io_sethandler(mach64->block_decoded_io, 0x0400, mach64_block_inb, mach64_block_inw, mach64_block_inl, mach64_block_outb, mach64_block_outw, mach64_block_outl, mach64); } -uint8_t mach64_pci_read(int func, int addr, void *p) +uint8_t +mach64_pci_read(int func, int addr, void *p) { - mach64_t *mach64 = (mach64_t *)p; + mach64_t *mach64 = (mach64_t *) p; - switch (addr) - { - case 0x00: return 0x02; /*ATi*/ - case 0x01: return 0x10; + switch (addr) { + case 0x00: + return 0x02; /*ATi*/ + case 0x01: + return 0x10; - case 0x02: return mach64->pci_id & 0xff; - case 0x03: return mach64->pci_id >> 8; + case 0x02: + return mach64->pci_id & 0xff; + case 0x03: + return mach64->pci_id >> 8; - case PCI_REG_COMMAND: - return mach64->pci_regs[PCI_REG_COMMAND]; /*Respond to IO and memory accesses*/ + case PCI_REG_COMMAND: + return mach64->pci_regs[PCI_REG_COMMAND]; /*Respond to IO and memory accesses*/ - case 0x07: return 1 << 1; /*Medium DEVSEL timing*/ + case 0x07: + return 1 << 1; /*Medium DEVSEL timing*/ - case 0x08: /*Revision ID*/ - if (mach64->type == MACH64_GX) - return 0; - return 0x40; + case 0x08: /*Revision ID*/ + if (mach64->type == MACH64_GX) + return 0; + return 0x40; - case 0x09: return 0; /*Programming interface*/ + case 0x09: + return 0; /*Programming interface*/ - case 0x0a: return 0x01; /*Supports VGA interface, XGA compatible*/ - case 0x0b: return 0x03; + case 0x0a: + return 0x01; /*Supports VGA interface, XGA compatible*/ + case 0x0b: + return 0x03; - case 0x10: return 0x00; /*Linear frame buffer address*/ - case 0x11: return 0x00; - case 0x12: return mach64->linear_base >> 16; - case 0x13: return mach64->linear_base >> 24; + case 0x10: + return 0x00; /*Linear frame buffer address*/ + case 0x11: + return 0x00; + case 0x12: + return mach64->linear_base >> 16; + case 0x13: + return mach64->linear_base >> 24; - case 0x14: - if (mach64->type == MACH64_VT2) - return 0x01; /*Block decoded IO address*/ - return 0x00; - case 0x15: - if (mach64->type == MACH64_VT2) - return mach64->block_decoded_io >> 8; - return 0x00; - case 0x16: - if (mach64->type == MACH64_VT2) - return mach64->block_decoded_io >> 16; - return 0x00; - case 0x17: - if (mach64->type == MACH64_VT2) - return mach64->block_decoded_io >> 24; - return 0x00; + case 0x14: + if (mach64->type == MACH64_VT2) + return 0x01; /*Block decoded IO address*/ + return 0x00; + case 0x15: + if (mach64->type == MACH64_VT2) + return mach64->block_decoded_io >> 8; + return 0x00; + case 0x16: + if (mach64->type == MACH64_VT2) + return mach64->block_decoded_io >> 16; + return 0x00; + case 0x17: + if (mach64->type == MACH64_VT2) + return mach64->block_decoded_io >> 24; + return 0x00; - case 0x30: return mach64->pci_regs[0x30] & 0x01; /*BIOS ROM address*/ - case 0x31: return 0x00; - case 0x32: return mach64->pci_regs[0x32]; - case 0x33: return mach64->pci_regs[0x33]; + case 0x30: + return mach64->pci_regs[0x30] & 0x01; /*BIOS ROM address*/ + case 0x31: + return 0x00; + case 0x32: + return mach64->pci_regs[0x32]; + case 0x33: + return mach64->pci_regs[0x33]; - case 0x3c: return mach64->int_line; - case 0x3d: return PCI_INTA; + case 0x3c: + return mach64->int_line; + case 0x3d: + return PCI_INTA; - case 0x40: return mach64->use_block_decoded_io | mach64->io_base; - } - return 0; + case 0x40: + return mach64->use_block_decoded_io | mach64->io_base; + } + return 0; } -void mach64_pci_write(int func, int addr, uint8_t val, void *p) +void +mach64_pci_write(int func, int addr, uint8_t val, void *p) { - mach64_t *mach64 = (mach64_t *)p; + mach64_t *mach64 = (mach64_t *) p; - switch (addr) - { - case PCI_REG_COMMAND: - mach64->pci_regs[PCI_REG_COMMAND] = val & 0x27; - if (val & PCI_COMMAND_IO) - mach64_io_set(mach64); - else - mach64_io_remove(mach64); - mach64_updatemapping(mach64); - break; + switch (addr) { + case PCI_REG_COMMAND: + mach64->pci_regs[PCI_REG_COMMAND] = val & 0x27; + if (val & PCI_COMMAND_IO) + mach64_io_set(mach64); + else + mach64_io_remove(mach64); + mach64_updatemapping(mach64); + break; - case 0x12: - if (mach64->type == MACH64_VT2) - val = 0; - mach64->linear_base = (mach64->linear_base & 0xff000000) | ((val & 0x80) << 16); - mach64_updatemapping(mach64); - break; - case 0x13: - mach64->linear_base = (mach64->linear_base & 0x800000) | (val << 24); - mach64_updatemapping(mach64); - break; + case 0x12: + if (mach64->type == MACH64_VT2) + val = 0; + mach64->linear_base = (mach64->linear_base & 0xff000000) | ((val & 0x80) << 16); + mach64_updatemapping(mach64); + break; + case 0x13: + mach64->linear_base = (mach64->linear_base & 0x800000) | (val << 24); + mach64_updatemapping(mach64); + break; - case 0x15: - if (mach64->type == MACH64_VT2) - { - if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) - mach64_io_remove(mach64); - mach64->block_decoded_io = (mach64->block_decoded_io & 0xffff0000) | ((val & 0xfc) << 8); - if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) - mach64_io_set(mach64); - } - break; - case 0x16: - if (mach64->type == MACH64_VT2) - { - if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) - mach64_io_remove(mach64); - mach64->block_decoded_io = (mach64->block_decoded_io & 0xff00fc00) | (val << 16); - if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) - mach64_io_set(mach64); - } - break; - case 0x17: - if (mach64->type == MACH64_VT2) - { - if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) - mach64_io_remove(mach64); - mach64->block_decoded_io = (mach64->block_decoded_io & 0x00fffc00) | (val << 24); - if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) - mach64_io_set(mach64); - } - break; + case 0x15: + if (mach64->type == MACH64_VT2) { + if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) + mach64_io_remove(mach64); + mach64->block_decoded_io = (mach64->block_decoded_io & 0xffff0000) | ((val & 0xfc) << 8); + if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) + mach64_io_set(mach64); + } + break; + case 0x16: + if (mach64->type == MACH64_VT2) { + if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) + mach64_io_remove(mach64); + mach64->block_decoded_io = (mach64->block_decoded_io & 0xff00fc00) | (val << 16); + if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) + mach64_io_set(mach64); + } + break; + case 0x17: + if (mach64->type == MACH64_VT2) { + if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) + mach64_io_remove(mach64); + mach64->block_decoded_io = (mach64->block_decoded_io & 0x00fffc00) | (val << 24); + if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) + mach64_io_set(mach64); + } + break; - case 0x30: case 0x32: case 0x33: - mach64->pci_regs[addr] = val; - if (mach64->pci_regs[0x30] & 0x01) - { - uint32_t addr = (mach64->pci_regs[0x32] << 16) | (mach64->pci_regs[0x33] << 24); - mach64_log("Mach64 bios_rom enabled at %08x\n", addr); - mem_mapping_set_addr(&mach64->bios_rom.mapping, addr, 0x8000); - } - else - { - mach64_log("Mach64 bios_rom disabled\n"); - mem_mapping_disable(&mach64->bios_rom.mapping); - } - return; + case 0x30: + case 0x32: + case 0x33: + mach64->pci_regs[addr] = val; + if (mach64->pci_regs[0x30] & 0x01) { + uint32_t addr = (mach64->pci_regs[0x32] << 16) | (mach64->pci_regs[0x33] << 24); + mach64_log("Mach64 bios_rom enabled at %08x\n", addr); + mem_mapping_set_addr(&mach64->bios_rom.mapping, addr, 0x8000); + } else { + mach64_log("Mach64 bios_rom disabled\n"); + mem_mapping_disable(&mach64->bios_rom.mapping); + } + return; - case 0x3c: - mach64->int_line = val; - break; + case 0x3c: + mach64->int_line = val; + break; - case 0x40: - if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) - mach64_io_remove(mach64); - mach64->io_base = val & 0x03; - if (mach64->type == MACH64_VT2) - mach64->use_block_decoded_io = val & 0x04; - if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) - mach64_io_set(mach64); - break; - } + case 0x40: + if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) + mach64_io_remove(mach64); + mach64->io_base = val & 0x03; + if (mach64->type == MACH64_VT2) + mach64->use_block_decoded_io = val & 0x04; + if (mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) + mach64_io_set(mach64); + break; + } } -static void *mach64_common_init(const device_t *info) +static void * +mach64_common_init(const device_t *info) { - mach64_t *mach64 = malloc(sizeof(mach64_t)); - memset(mach64, 0, sizeof(mach64_t)); + mach64_t *mach64 = malloc(sizeof(mach64_t)); + memset(mach64, 0, sizeof(mach64_t)); - mach64->vram_size = device_get_config_int("memory"); - mach64->vram_mask = (mach64->vram_size << 20) - 1; + mach64->vram_size = device_get_config_int("memory"); + mach64->vram_mask = (mach64->vram_size << 20) - 1; - svga_init(info, &mach64->svga, mach64, mach64->vram_size << 20, - mach64_recalctimings, - mach64_in, mach64_out, - NULL, - mach64_overlay_draw); + svga_init(info, &mach64->svga, mach64, mach64->vram_size << 20, + mach64_recalctimings, + mach64_in, mach64_out, + NULL, + mach64_overlay_draw); mach64->svga.dac_hwcursor.cur_ysize = 64; - mem_mapping_add(&mach64->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, NULL, MEM_MAPPING_EXTERNAL, &mach64->svga); - mem_mapping_add(&mach64->mmio_linear_mapping, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64); - mem_mapping_add(&mach64->mmio_linear_mapping_2, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64); - mem_mapping_add(&mach64->mmio_mapping, 0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64); - mem_mapping_disable(&mach64->mmio_mapping); + mem_mapping_add(&mach64->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, NULL, MEM_MAPPING_EXTERNAL, &mach64->svga); + mem_mapping_add(&mach64->mmio_linear_mapping, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64); + mem_mapping_add(&mach64->mmio_linear_mapping_2, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64); + mem_mapping_add(&mach64->mmio_mapping, 0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64); + mem_mapping_disable(&mach64->mmio_mapping); - mach64_io_set(mach64); + mach64_io_set(mach64); - if (info->flags & DEVICE_PCI) - { - mach64->card = pci_add_card(PCI_ADD_VIDEO, mach64_pci_read, mach64_pci_write, mach64); - } + if (info->flags & DEVICE_PCI) { + mach64->card = pci_add_card(PCI_ADD_VIDEO, mach64_pci_read, mach64_pci_write, mach64); + } - mach64->pci_regs[PCI_REG_COMMAND] = 3; - mach64->pci_regs[0x30] = 0x00; - mach64->pci_regs[0x32] = 0x0c; - mach64->pci_regs[0x33] = 0x00; + mach64->pci_regs[PCI_REG_COMMAND] = 3; + mach64->pci_regs[0x30] = 0x00; + mach64->pci_regs[0x32] = 0x0c; + mach64->pci_regs[0x33] = 0x00; - mach64->svga.ramdac = device_add(&ati68860_ramdac_device); - mach64->svga.dac_hwcursor_draw = ati68860_hwcursor_draw; + mach64->svga.ramdac = device_add(&ati68860_ramdac_device); + mach64->svga.dac_hwcursor_draw = ati68860_hwcursor_draw; - mach64->svga.clock_gen = device_add(&ics2595_device); + mach64->svga.clock_gen = device_add(&ics2595_device); - mach64->dst_cntl = 3; + mach64->dst_cntl = 3; - mach64->i2c = i2c_gpio_init("ddc_ati_mach64"); - mach64->ddc = ddc_init(i2c_gpio_get_bus(mach64->i2c)); + mach64->i2c = i2c_gpio_init("ddc_ati_mach64"); + mach64->ddc = ddc_init(i2c_gpio_get_bus(mach64->i2c)); - mach64->wake_fifo_thread = thread_create_event(); - mach64->fifo_not_full_event = thread_create_event(); - mach64->thread_run = 1; - mach64->fifo_thread = thread_create(fifo_thread, mach64); + mach64->wake_fifo_thread = thread_create_event(); + mach64->fifo_not_full_event = thread_create_event(); + mach64->thread_run = 1; + mach64->fifo_thread = thread_create(fifo_thread, mach64); - return mach64; + return mach64; } -static void *mach64gx_init(const device_t *info) +static void * +mach64gx_init(const device_t *info) { - mach64_t *mach64 = mach64_common_init(info); + mach64_t *mach64 = mach64_common_init(info); - if (info->flags & DEVICE_ISA) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_isa); - else if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_vlb); + if (info->flags & DEVICE_ISA) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_isa); + else if (info->flags & DEVICE_PCI) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_vlb); - mach64->type = MACH64_GX; - mach64->pci = !!(info->flags & DEVICE_PCI); - mach64->pci_id = (int)'X' | ((int)'G' << 8); - mach64->config_chip_id = 0x020000d7; - mach64->dac_cntl = 5 << 16; /*ATI 68860 RAMDAC*/ - mach64->config_stat0 = (5 << 9) | (3 << 3); /*ATI-68860, 256Kx16 DRAM*/ - if (info->flags & DEVICE_PCI) - mach64->config_stat0 |= 0; /*PCI, 256Kx16 DRAM*/ - else if (info->flags & DEVICE_VLB) - mach64->config_stat0 |= 1; /*VLB, 256Kx16 DRAM*/ - else if (info->flags & DEVICE_ISA) - mach64->config_stat0 |= 7; /*ISA 16-bit, 256k16 DRAM*/ + mach64->type = MACH64_GX; + mach64->pci = !!(info->flags & DEVICE_PCI); + mach64->pci_id = (int) 'X' | ((int) 'G' << 8); + mach64->config_chip_id = 0x020000d7; + mach64->dac_cntl = 5 << 16; /*ATI 68860 RAMDAC*/ + mach64->config_stat0 = (5 << 9) | (3 << 3); /*ATI-68860, 256Kx16 DRAM*/ + if (info->flags & DEVICE_PCI) + mach64->config_stat0 |= 0; /*PCI, 256Kx16 DRAM*/ + else if (info->flags & DEVICE_VLB) + mach64->config_stat0 |= 1; /*VLB, 256Kx16 DRAM*/ + else if (info->flags & DEVICE_ISA) + mach64->config_stat0 |= 7; /*ISA 16-bit, 256k16 DRAM*/ - ati_eeprom_load(&mach64->eeprom, "mach64.nvr", 1); + ati_eeprom_load(&mach64->eeprom, "mach64.nvr", 1); - if (info->flags & DEVICE_PCI) - rom_init(&mach64->bios_rom, BIOS_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - else if (info->flags & DEVICE_VLB) - rom_init(&mach64->bios_rom, BIOS_VLB_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - else if (info->flags & DEVICE_ISA) - rom_init(&mach64->bios_rom, BIOS_ISA_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + if (info->flags & DEVICE_PCI) + rom_init(&mach64->bios_rom, BIOS_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + else if (info->flags & DEVICE_VLB) + rom_init(&mach64->bios_rom, BIOS_VLB_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + else if (info->flags & DEVICE_ISA) + rom_init(&mach64->bios_rom, BIOS_ISA_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - if (info->flags & DEVICE_PCI) - mem_mapping_disable(&mach64->bios_rom.mapping); + if (info->flags & DEVICE_PCI) + mem_mapping_disable(&mach64->bios_rom.mapping); - return mach64; + return mach64; } -static void *mach64vt2_init(const device_t *info) +static void * +mach64vt2_init(const device_t *info) { - mach64_t *mach64 = mach64_common_init(info); - svga_t *svga = &mach64->svga; + mach64_t *mach64 = mach64_common_init(info); + svga_t *svga = &mach64->svga; - if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_vlb); + if (info->flags & DEVICE_PCI) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_mach64_vlb); - mach64->type = MACH64_VT2; - mach64->pci = 1; - mach64->pci_id = 0x5654; - mach64->config_chip_id = 0x40005654; - mach64->dac_cntl = 1 << 16; /*Internal 24-bit DAC*/ - mach64->config_stat0 = 4; - mach64->use_block_decoded_io = 4; + mach64->type = MACH64_VT2; + mach64->pci = 1; + mach64->pci_id = 0x5654; + mach64->config_chip_id = 0x40005654; + mach64->dac_cntl = 1 << 16; /*Internal 24-bit DAC*/ + mach64->config_stat0 = 4; + mach64->use_block_decoded_io = 4; - ati_eeprom_load(&mach64->eeprom, "mach64vt.nvr", 1); + ati_eeprom_load(&mach64->eeprom, "mach64vt.nvr", 1); - rom_init(&mach64->bios_rom, BIOS_ROMVT2_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + rom_init(&mach64->bios_rom, BIOS_ROMVT2_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - if (info->flags & DEVICE_PCI) - mem_mapping_disable(&mach64->bios_rom.mapping); + if (info->flags & DEVICE_PCI) + mem_mapping_disable(&mach64->bios_rom.mapping); - svga->vblank_start = mach64_vblank_start; + svga->vblank_start = mach64_vblank_start; - return mach64; + return mach64; } -int mach64gx_available(void) +int +mach64gx_available(void) { - return rom_present(BIOS_ROM_PATH); + return rom_present(BIOS_ROM_PATH); } -int mach64gx_isa_available(void) +int +mach64gx_isa_available(void) { - return rom_present(BIOS_ISA_ROM_PATH); + return rom_present(BIOS_ISA_ROM_PATH); } -int mach64gx_vlb_available(void) +int +mach64gx_vlb_available(void) { - return rom_present(BIOS_VLB_ROM_PATH); + return rom_present(BIOS_VLB_ROM_PATH); } -int mach64vt2_available(void) +int +mach64vt2_available(void) { - return rom_present(BIOS_ROMVT2_PATH); + return rom_present(BIOS_ROMVT2_PATH); } -void mach64_close(void *p) +void +mach64_close(void *p) { - mach64_t *mach64 = (mach64_t *)p; + mach64_t *mach64 = (mach64_t *) p; - mach64->thread_run = 0; - thread_set_event(mach64->wake_fifo_thread); - thread_wait(mach64->fifo_thread); - thread_destroy_event(mach64->fifo_not_full_event); - thread_destroy_event(mach64->wake_fifo_thread); + mach64->thread_run = 0; + thread_set_event(mach64->wake_fifo_thread); + thread_wait(mach64->fifo_thread); + thread_destroy_event(mach64->fifo_not_full_event); + thread_destroy_event(mach64->wake_fifo_thread); - svga_close(&mach64->svga); + svga_close(&mach64->svga); - ddc_close(mach64->ddc); - i2c_gpio_close(mach64->i2c); + ddc_close(mach64->ddc); + i2c_gpio_close(mach64->i2c); - free(mach64); + free(mach64); } -void mach64_speed_changed(void *p) +void +mach64_speed_changed(void *p) { - mach64_t *mach64 = (mach64_t *)p; + mach64_t *mach64 = (mach64_t *) p; - svga_recalctimings(&mach64->svga); + svga_recalctimings(&mach64->svga); } -void mach64_force_redraw(void *p) +void +mach64_force_redraw(void *p) { - mach64_t *mach64 = (mach64_t *)p; + mach64_t *mach64 = (mach64_t *) p; - mach64->svga.fullchange = changeframecount; + mach64->svga.fullchange = changeframecount; } // clang-format off @@ -3742,57 +4424,57 @@ static const device_config_t mach64vt2_config[] = { // clang-format on const device_t mach64gx_isa_device = { - .name = "ATI Mach64GX ISA", + .name = "ATI Mach64GX ISA", .internal_name = "mach64gx_isa", - .flags = DEVICE_AT | DEVICE_ISA, - .local = 0, - .init = mach64gx_init, - .close = mach64_close, - .reset = NULL, + .flags = DEVICE_AT | DEVICE_ISA, + .local = 0, + .init = mach64gx_init, + .close = mach64_close, + .reset = NULL, { .available = mach64gx_isa_available }, .speed_changed = mach64_speed_changed, - .force_redraw = mach64_force_redraw, - .config = mach64gx_config + .force_redraw = mach64_force_redraw, + .config = mach64gx_config }; const device_t mach64gx_vlb_device = { - .name = "ATI Mach64GX VLB", + .name = "ATI Mach64GX VLB", .internal_name = "mach64gx_vlb", - .flags = DEVICE_VLB, - .local = 0, - .init = mach64gx_init, - .close = mach64_close, - .reset = NULL, + .flags = DEVICE_VLB, + .local = 0, + .init = mach64gx_init, + .close = mach64_close, + .reset = NULL, { .available = mach64gx_vlb_available }, .speed_changed = mach64_speed_changed, - .force_redraw = mach64_force_redraw, - .config = mach64gx_config + .force_redraw = mach64_force_redraw, + .config = mach64gx_config }; const device_t mach64gx_pci_device = { - .name = "ATI Mach64GX PCI", + .name = "ATI Mach64GX PCI", .internal_name = "mach64gx_pci", - .flags = DEVICE_PCI, - .local = 0, - .init = mach64gx_init, - .close = mach64_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = 0, + .init = mach64gx_init, + .close = mach64_close, + .reset = NULL, { .available = mach64gx_available }, .speed_changed = mach64_speed_changed, - .force_redraw = mach64_force_redraw, - .config = mach64gx_config + .force_redraw = mach64_force_redraw, + .config = mach64gx_config }; const device_t mach64vt2_device = { - .name = "ATI Mach64VT2", + .name = "ATI Mach64VT2", .internal_name = "mach64vt2", - .flags = DEVICE_PCI, - .local = 0, - .init = mach64vt2_init, - .close = mach64_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = 0, + .init = mach64vt2_init, + .close = mach64_close, + .reset = NULL, { .available = mach64vt2_available }, .speed_changed = mach64_speed_changed, - .force_redraw = mach64_force_redraw, - .config = mach64vt2_config + .force_redraw = mach64_force_redraw, + .config = mach64vt2_config }; diff --git a/src/video/vid_att20c49x_ramdac.c b/src/video/vid_att20c49x_ramdac.c index 509256f19..81cde31a4 100644 --- a/src/video/vid_att20c49x_ramdac.c +++ b/src/video/vid_att20c49x_ramdac.c @@ -28,131 +28,126 @@ #include <86box/video.h> #include <86box/vid_svga.h> - typedef struct { - int type; - int state; + int type; + int state; uint8_t ctrl; } att49x_ramdac_t; - -enum -{ - ATT_490 = 0, - ATT_491, - ATT_492 +enum { + ATT_490 = 0, + ATT_491, + ATT_492 }; - static void att49x_ramdac_control(uint8_t val, void *p, svga_t *svga) { - att49x_ramdac_t *ramdac = (att49x_ramdac_t *) p; - ramdac->ctrl = val; - switch ((ramdac->ctrl >> 5) & 7) { - case 0: - case 1: - case 2: - case 3: - svga->bpp = 8; - break; - case 4: - case 5: - svga->bpp = 15; - break; - case 6: - svga->bpp = 16; - break; - case 7: - svga->bpp = 24; - break; - } - if (ramdac->type == ATT_490 || ramdac->type == ATT_491) - svga_set_ramdac_type(svga, (val & 2) ? RAMDAC_8BIT : RAMDAC_6BIT); - svga_recalctimings(svga); + att49x_ramdac_t *ramdac = (att49x_ramdac_t *) p; + ramdac->ctrl = val; + switch ((ramdac->ctrl >> 5) & 7) { + case 0: + case 1: + case 2: + case 3: + svga->bpp = 8; + break; + case 4: + case 5: + svga->bpp = 15; + break; + case 6: + svga->bpp = 16; + break; + case 7: + svga->bpp = 24; + break; + } + if (ramdac->type == ATT_490 || ramdac->type == ATT_491) + svga_set_ramdac_type(svga, (val & 2) ? RAMDAC_8BIT : RAMDAC_6BIT); + svga_recalctimings(svga); } void att49x_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga) { att49x_ramdac_t *ramdac = (att49x_ramdac_t *) p; - uint8_t rs = (addr & 0x03); + uint8_t rs = (addr & 0x03); rs |= ((!!rs2) << 2); switch (rs) { - case 0x00: - case 0x01: - case 0x03: - case 0x04: - case 0x05: - case 0x07: - svga_out(addr, val, svga); - ramdac->state = 0; - break; - case 0x02: - switch (ramdac->state) { - case 4: - att49x_ramdac_control(val, ramdac, svga); - break; - default: - svga_out(addr, val, svga); - break; - } - break; - case 0x06: - att49x_ramdac_control(val, ramdac, svga); - ramdac->state = 0; - break; + case 0x00: + case 0x01: + case 0x03: + case 0x04: + case 0x05: + case 0x07: + svga_out(addr, val, svga); + ramdac->state = 0; + break; + case 0x02: + switch (ramdac->state) { + case 4: + att49x_ramdac_control(val, ramdac, svga); + break; + default: + svga_out(addr, val, svga); + break; + } + break; + case 0x06: + att49x_ramdac_control(val, ramdac, svga); + ramdac->state = 0; + break; } } - uint8_t att49x_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga) { att49x_ramdac_t *ramdac = (att49x_ramdac_t *) p; - uint8_t temp = 0xff; - uint8_t rs = (addr & 0x03); + uint8_t temp = 0xff; + uint8_t rs = (addr & 0x03); rs |= ((!!rs2) << 2); switch (rs) { - case 0x00: - case 0x01: - case 0x03: - case 0x04: - case 0x05: - case 0x07: - temp = svga_in(addr, svga); - ramdac->state = 0; - break; - case 0x02: - switch (ramdac->state) { - case 1: - case 2: case 3: - temp = 0x00; - ramdac->state++; - break; - case 4: - temp = ramdac->ctrl; - ramdac->state = 0; - break; - default: - temp = svga_in(addr, svga); - ramdac->state++; - break; - } - break; - case 0x06: - temp = ramdac->ctrl; - ramdac->state = 0; - break; + case 0x00: + case 0x01: + case 0x03: + case 0x04: + case 0x05: + case 0x07: + temp = svga_in(addr, svga); + ramdac->state = 0; + break; + case 0x02: + switch (ramdac->state) { + case 1: + case 2: + case 3: + temp = 0x00; + ramdac->state++; + break; + case 4: + temp = ramdac->ctrl; + ramdac->state = 0; + break; + default: + temp = svga_in(addr, svga); + ramdac->state++; + break; + } + break; + case 0x06: + temp = ramdac->ctrl; + ramdac->state = 0; + break; } return temp; } - static void * att49x_ramdac_init(const device_t *info) { @@ -164,54 +159,53 @@ att49x_ramdac_init(const device_t *info) return ramdac; } - static void att49x_ramdac_close(void *priv) { att49x_ramdac_t *ramdac = (att49x_ramdac_t *) priv; if (ramdac) - free(ramdac); + free(ramdac); } const device_t att490_ramdac_device = { - .name = "AT&T 20c490 RAMDAC", + .name = "AT&T 20c490 RAMDAC", .internal_name = "att490_ramdac", - .flags = 0, - .local = ATT_490, - .init = att49x_ramdac_init, - .close = att49x_ramdac_close, - .reset = NULL, + .flags = 0, + .local = ATT_490, + .init = att49x_ramdac_init, + .close = att49x_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t att491_ramdac_device = { - .name = "AT&T 20c491 RAMDAC", + .name = "AT&T 20c491 RAMDAC", .internal_name = "att491_ramdac", - .flags = 0, - .local = ATT_491, - .init = att49x_ramdac_init, - .close = att49x_ramdac_close, - .reset = NULL, + .flags = 0, + .local = ATT_491, + .init = att49x_ramdac_init, + .close = att49x_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t att492_ramdac_device = { - .name = "AT&T 20c492 RAMDAC", + .name = "AT&T 20c492 RAMDAC", .internal_name = "att492_ramdac", - .flags = 0, - .local = ATT_492, - .init = att49x_ramdac_init, - .close = att49x_ramdac_close, - .reset = NULL, + .flags = 0, + .local = ATT_492, + .init = att49x_ramdac_init, + .close = att49x_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_att2xc498_ramdac.c b/src/video/vid_att2xc498_ramdac.c index 3e4617f8c..5983677db 100644 --- a/src/video/vid_att2xc498_ramdac.c +++ b/src/video/vid_att2xc498_ramdac.c @@ -28,133 +28,130 @@ #include <86box/video.h> #include <86box/vid_svga.h> - typedef struct { - int type; - int state; - int loop; + int type; + int state; + int loop; uint8_t ctrl; } att498_ramdac_t; static void att498_ramdac_control(uint8_t val, void *p, svga_t *svga) { - att498_ramdac_t *ramdac = (att498_ramdac_t *) p; - ramdac->ctrl = val; + att498_ramdac_t *ramdac = (att498_ramdac_t *) p; + ramdac->ctrl = val; - if (val == 0xff) - return; + if (val == 0xff) + return; - switch ((ramdac->ctrl >> 4) & 0x0f) { - default: - svga->bpp = 8; - break; - case 1: - if (ramdac->ctrl & 4) - svga->bpp = 15; - else - svga->bpp = 8; - break; - case 3: - case 6: - svga->bpp = 16; - break; - case 5: - case 7: - svga->bpp = 32; - break; - case 0x0e: - svga->bpp = 24; - break; - } + switch ((ramdac->ctrl >> 4) & 0x0f) { + default: + svga->bpp = 8; + break; + case 1: + if (ramdac->ctrl & 4) + svga->bpp = 15; + else + svga->bpp = 8; + break; + case 3: + case 6: + svga->bpp = 16; + break; + case 5: + case 7: + svga->bpp = 32; + break; + case 0x0e: + svga->bpp = 24; + break; + } - svga_set_ramdac_type(svga, (ramdac->ctrl & 2) ? RAMDAC_8BIT : RAMDAC_6BIT); - svga_recalctimings(svga); + svga_set_ramdac_type(svga, (ramdac->ctrl & 2) ? RAMDAC_8BIT : RAMDAC_6BIT); + svga_recalctimings(svga); } void att498_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga) { att498_ramdac_t *ramdac = (att498_ramdac_t *) p; - uint8_t rs = (addr & 0x03); + uint8_t rs = (addr & 0x03); rs |= ((!!rs2) << 2); switch (rs) { - case 0x00: - case 0x01: - case 0x03: - case 0x04: - case 0x05: - case 0x07: - svga_out(addr, val, svga); - ramdac->state = 0; - break; - case 0x02: - switch (ramdac->state) { - case 4: - att498_ramdac_control(val, ramdac, svga); - break; - default: - svga_out(addr, val, svga); - break; - } - break; - case 0x06: - att498_ramdac_control(val, ramdac, svga); - break; + case 0x00: + case 0x01: + case 0x03: + case 0x04: + case 0x05: + case 0x07: + svga_out(addr, val, svga); + ramdac->state = 0; + break; + case 0x02: + switch (ramdac->state) { + case 4: + att498_ramdac_control(val, ramdac, svga); + break; + default: + svga_out(addr, val, svga); + break; + } + break; + case 0x06: + att498_ramdac_control(val, ramdac, svga); + break; } } - uint8_t att498_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga) { att498_ramdac_t *ramdac = (att498_ramdac_t *) p; - uint8_t temp = 0xff; - uint8_t rs = (addr & 0x03); + uint8_t temp = 0xff; + uint8_t rs = (addr & 0x03); rs |= ((!!rs2) << 2); switch (rs) { - case 0x00: - case 0x01: - case 0x03: - case 0x04: - case 0x05: - case 0x07: - temp = svga_in(addr, svga); - ramdac->state = 0; - break; - case 0x02: - switch (ramdac->state) { - case 4: - temp = ramdac->ctrl; - ramdac->state++; - break; - case 5: - temp = 0x84; - ramdac->state++; - break; - case 6: - temp = ramdac->ctrl; - ramdac->state = 0; - break; - default: - temp = svga_in(addr, svga); - ramdac->state++; - break; - } - break; - case 0x06: - temp = ramdac->ctrl; - ramdac->state = 0; - break; + case 0x00: + case 0x01: + case 0x03: + case 0x04: + case 0x05: + case 0x07: + temp = svga_in(addr, svga); + ramdac->state = 0; + break; + case 0x02: + switch (ramdac->state) { + case 4: + temp = ramdac->ctrl; + ramdac->state++; + break; + case 5: + temp = 0x84; + ramdac->state++; + break; + case 6: + temp = ramdac->ctrl; + ramdac->state = 0; + break; + default: + temp = svga_in(addr, svga); + ramdac->state++; + break; + } + break; + case 0x06: + temp = ramdac->ctrl; + ramdac->state = 0; + break; } return temp; } - static void * att498_ramdac_init(const device_t *info) { @@ -166,26 +163,25 @@ att498_ramdac_init(const device_t *info) return ramdac; } - static void att498_ramdac_close(void *priv) { att498_ramdac_t *ramdac = (att498_ramdac_t *) priv; if (ramdac) - free(ramdac); + free(ramdac); } const device_t att498_ramdac_device = { - .name = "AT&T 22c498 RAMDAC", + .name = "AT&T 22c498 RAMDAC", .internal_name = "att498_ramdac", - .flags = 0, - .local = 0, - .init = att498_ramdac_init, - .close = att498_ramdac_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = att498_ramdac_init, + .close = att498_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_av9194.c b/src/video/vid_av9194.c index a736effa2..20d39f247 100644 --- a/src/video/vid_av9194.c +++ b/src/video/vid_av9194.c @@ -28,65 +28,62 @@ #include <86box/video.h> #include <86box/vid_svga.h> - float av9194_getclock(int clock, void *p) { float ret = 0.0; - switch (clock & 0x0f) - { - case 0: - ret = 25175000.0; - break; - case 1: - ret = 28322000.0; - break; - case 2: - ret = 40000000.0; - break; - case 4: - ret = 50000000.0; - break; - case 5: - ret = 77000000.0; - break; - case 6: - ret = 36000000.0; - break; - case 7: - ret = 44900000.0; - break; - case 8: - ret = 130000000.0; - break; - case 9: - ret = 120000000.0; - break; - case 0xa: - ret = 80000000.0; - break; - case 0xb: - ret = 31500000.0; - break; - case 0xc: - ret = 110000000.0; - break; - case 0xd: - ret = 65000000.0; - break; - case 0xe: - ret = 75000000.0; - break; - case 0xf: - ret = 94500000.0; - break; + switch (clock & 0x0f) { + case 0: + ret = 25175000.0; + break; + case 1: + ret = 28322000.0; + break; + case 2: + ret = 40000000.0; + break; + case 4: + ret = 50000000.0; + break; + case 5: + ret = 77000000.0; + break; + case 6: + ret = 36000000.0; + break; + case 7: + ret = 44900000.0; + break; + case 8: + ret = 130000000.0; + break; + case 9: + ret = 120000000.0; + break; + case 0xa: + ret = 80000000.0; + break; + case 0xb: + ret = 31500000.0; + break; + case 0xc: + ret = 110000000.0; + break; + case 0xd: + ret = 65000000.0; + break; + case 0xe: + ret = 75000000.0; + break; + case 0xf: + ret = 94500000.0; + break; } return ret; } - static void * av9194_init(const device_t *info) { @@ -94,17 +91,16 @@ av9194_init(const device_t *info) return (void *) &av9194_device; } - const device_t av9194_device = { - .name = "AV9194 Clock Generator", + .name = "AV9194 Clock Generator", .internal_name = "av9194", - .flags = 0, - .local = 0, - .init = av9194_init, - .close = NULL, - .reset = NULL, + .flags = 0, + .local = 0, + .init = av9194_init, + .close = NULL, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_bt48x_ramdac.c b/src/video/vid_bt48x_ramdac.c index 43b02fa6e..05ade0cc3 100644 --- a/src/video/vid_bt48x_ramdac.c +++ b/src/video/vid_bt48x_ramdac.c @@ -29,324 +29,319 @@ #include <86box/video.h> #include <86box/vid_svga.h> - typedef struct { - PALETTE extpal; - uint32_t extpallook[256]; - uint8_t cursor32_data[256]; - uint8_t cursor64_data[1024]; - int hwc_y, hwc_x; - uint8_t cmd_r0; - uint8_t cmd_r1; - uint8_t cmd_r2; - uint8_t cmd_r3; - uint8_t cmd_r4; - uint8_t status; - uint8_t type; + PALETTE extpal; + uint32_t extpallook[256]; + uint8_t cursor32_data[256]; + uint8_t cursor64_data[1024]; + int hwc_y, hwc_x; + uint8_t cmd_r0; + uint8_t cmd_r1; + uint8_t cmd_r2; + uint8_t cmd_r3; + uint8_t cmd_r4; + uint8_t status; + uint8_t type; } bt48x_ramdac_t; - enum { - BT484 = 0, - ATT20C504, - BT485, - ATT20C505, - BT485A + BT484 = 0, + ATT20C504, + BT485, + ATT20C505, + BT485A }; - static void bt48x_set_bpp(bt48x_ramdac_t *ramdac, svga_t *svga) { if ((!(ramdac->cmd_r2 & 0x20)) || ((ramdac->type >= BT485A) && ((ramdac->cmd_r3 & 0x60) == 0x60))) - svga->bpp = 8; + svga->bpp = 8; else if ((ramdac->type >= BT485A) && ((ramdac->cmd_r3 & 0x60) == 0x40)) - svga->bpp = 24; - else switch (ramdac->cmd_r1 & 0x60) { - case 0x00: - svga->bpp = 32; - break; - case 0x20: - if (ramdac->cmd_r1 & 0x08) - svga->bpp = 16; - else - svga->bpp = 15; - break; - case 0x40: - svga->bpp = 8; - break; - case 0x60: - svga->bpp = 4; - break; - } + svga->bpp = 24; + else + switch (ramdac->cmd_r1 & 0x60) { + case 0x00: + svga->bpp = 32; + break; + case 0x20: + if (ramdac->cmd_r1 & 0x08) + svga->bpp = 16; + else + svga->bpp = 15; + break; + case 0x40: + svga->bpp = 8; + break; + case 0x60: + svga->bpp = 4; + break; + } svga_recalctimings(svga); } - void bt48x_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t *svga) { bt48x_ramdac_t *ramdac = (bt48x_ramdac_t *) p; - uint32_t o32; - uint8_t *cd; - uint16_t index; - uint8_t rs = (addr & 0x03); - uint16_t da_mask = 0x03ff; + uint32_t o32; + uint8_t *cd; + uint16_t index; + uint8_t rs = (addr & 0x03); + uint16_t da_mask = 0x03ff; rs |= (!!rs2 << 2); rs |= (!!rs3 << 3); if (ramdac->type < BT485) - da_mask = 0x00ff; + da_mask = 0x00ff; switch (rs) { - case 0x00: /* Palette Write Index Register (RS value = 0000) */ - case 0x04: /* Ext Palette Write Index Register (RS value = 0100) */ - case 0x03: - case 0x07: /* Ext Palette Read Index Register (RS value = 0111) */ - svga->dac_pos = 0; - svga->dac_status = addr & 0x03; - svga->dac_addr = val; - if (ramdac->type >= BT485) - svga->dac_addr |= ((int) (ramdac->cmd_r3 & 0x03) << 8); - if (svga->dac_status) - svga->dac_addr = (svga->dac_addr + 1) & da_mask; - break; - case 0x01: /* Palette Data Register (RS value = 0001) */ - case 0x02: /* Pixel Read Mask Register (RS value = 0010) */ - svga_out(addr, val, svga); - break; - case 0x05: /* Ext Palette Data Register (RS value = 0101) */ - svga->dac_status = 0; - svga->fullchange = changeframecount; - switch (svga->dac_pos) { - case 0: - svga->dac_r = val; - svga->dac_pos++; - break; - case 1: - svga->dac_g = val; - svga->dac_pos++; - break; - case 2: - index = svga->dac_addr & 3; - ramdac->extpal[index].r = svga->dac_r; - ramdac->extpal[index].g = svga->dac_g; - ramdac->extpal[index].b = val; - if (svga->ramdac_type == RAMDAC_8BIT) - ramdac->extpallook[index] = makecol32(ramdac->extpal[index].r, ramdac->extpal[index].g, ramdac->extpal[index].b); - else - ramdac->extpallook[index] = makecol32(video_6to8[ramdac->extpal[index].r & 0x3f], video_6to8[ramdac->extpal[index].g & 0x3f], video_6to8[ramdac->extpal[index].b & 0x3f]); + case 0x00: /* Palette Write Index Register (RS value = 0000) */ + case 0x04: /* Ext Palette Write Index Register (RS value = 0100) */ + case 0x03: + case 0x07: /* Ext Palette Read Index Register (RS value = 0111) */ + svga->dac_pos = 0; + svga->dac_status = addr & 0x03; + svga->dac_addr = val; + if (ramdac->type >= BT485) + svga->dac_addr |= ((int) (ramdac->cmd_r3 & 0x03) << 8); + if (svga->dac_status) + svga->dac_addr = (svga->dac_addr + 1) & da_mask; + break; + case 0x01: /* Palette Data Register (RS value = 0001) */ + case 0x02: /* Pixel Read Mask Register (RS value = 0010) */ + svga_out(addr, val, svga); + break; + case 0x05: /* Ext Palette Data Register (RS value = 0101) */ + svga->dac_status = 0; + svga->fullchange = changeframecount; + switch (svga->dac_pos) { + case 0: + svga->dac_r = val; + svga->dac_pos++; + break; + case 1: + svga->dac_g = val; + svga->dac_pos++; + break; + case 2: + index = svga->dac_addr & 3; + ramdac->extpal[index].r = svga->dac_r; + ramdac->extpal[index].g = svga->dac_g; + ramdac->extpal[index].b = val; + if (svga->ramdac_type == RAMDAC_8BIT) + ramdac->extpallook[index] = makecol32(ramdac->extpal[index].r, ramdac->extpal[index].g, ramdac->extpal[index].b); + else + ramdac->extpallook[index] = makecol32(video_6to8[ramdac->extpal[index].r & 0x3f], video_6to8[ramdac->extpal[index].g & 0x3f], video_6to8[ramdac->extpal[index].b & 0x3f]); - if (svga->ext_overscan && !index) { - o32 = svga->overscan_color; - svga->overscan_color = ramdac->extpallook[0]; - if (o32 != svga->overscan_color) - svga_recalctimings(svga); - } - svga->dac_addr = (svga->dac_addr + 1) & 0xff; - svga->dac_pos = 0; - break; - } - break; - case 0x06: /* Command Register 0 (RS value = 0110) */ - ramdac->cmd_r0 = val; - svga->ramdac_type = (val & 0x02) ? RAMDAC_8BIT : RAMDAC_6BIT; - break; - case 0x08: /* Command Register 1 (RS value = 1000) */ - ramdac->cmd_r1 = val; - bt48x_set_bpp(ramdac, svga); - break; - case 0x09: /* Command Register 2 (RS value = 1001) */ - ramdac->cmd_r2 = val; - svga->dac_hwcursor.ena = !!(val & 0x03); - bt48x_set_bpp(ramdac, svga); - break; - case 0x0a: - if ((ramdac->type >= BT485) && (ramdac->cmd_r0 & 0x80)) { - switch ((svga->dac_addr & ((ramdac->type >= BT485A) ? 0xff : 0x3f))) { - case 0x01: - /* Command Register 3 (RS value = 1010) */ - ramdac->cmd_r3 = val; - if (ramdac->type >= BT485A) - bt48x_set_bpp(ramdac, svga); - svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = (val & 4) ? 64 : 32; - svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; - svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; - svga->dac_addr = (svga->dac_addr & 0x00ff) | ((val & 0x03) << 8); - svga_recalctimings(svga); - break; - case 0x02: - case 0x20: - case 0x21: - case 0x22: - if (ramdac->type != BT485A) - break; - else if (svga->dac_addr == 2) { - ramdac->cmd_r4 = val; - break; - } - break; - } - } - break; - case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */ - index = svga->dac_addr & da_mask; - if ((ramdac->type >= BT485) && (svga->dac_hwcursor.cur_xsize == 64)) - cd = (uint8_t *) ramdac->cursor64_data; - else { - index &= 0xff; - cd = (uint8_t *) ramdac->cursor32_data; - } + if (svga->ext_overscan && !index) { + o32 = svga->overscan_color; + svga->overscan_color = ramdac->extpallook[0]; + if (o32 != svga->overscan_color) + svga_recalctimings(svga); + } + svga->dac_addr = (svga->dac_addr + 1) & 0xff; + svga->dac_pos = 0; + break; + } + break; + case 0x06: /* Command Register 0 (RS value = 0110) */ + ramdac->cmd_r0 = val; + svga->ramdac_type = (val & 0x02) ? RAMDAC_8BIT : RAMDAC_6BIT; + break; + case 0x08: /* Command Register 1 (RS value = 1000) */ + ramdac->cmd_r1 = val; + bt48x_set_bpp(ramdac, svga); + break; + case 0x09: /* Command Register 2 (RS value = 1001) */ + ramdac->cmd_r2 = val; + svga->dac_hwcursor.ena = !!(val & 0x03); + bt48x_set_bpp(ramdac, svga); + break; + case 0x0a: + if ((ramdac->type >= BT485) && (ramdac->cmd_r0 & 0x80)) { + switch ((svga->dac_addr & ((ramdac->type >= BT485A) ? 0xff : 0x3f))) { + case 0x01: + /* Command Register 3 (RS value = 1010) */ + ramdac->cmd_r3 = val; + if (ramdac->type >= BT485A) + bt48x_set_bpp(ramdac, svga); + svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = (val & 4) ? 64 : 32; + svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; + svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; + svga->dac_addr = (svga->dac_addr & 0x00ff) | ((val & 0x03) << 8); + svga_recalctimings(svga); + break; + case 0x02: + case 0x20: + case 0x21: + case 0x22: + if (ramdac->type != BT485A) + break; + else if (svga->dac_addr == 2) { + ramdac->cmd_r4 = val; + break; + } + break; + } + } + break; + case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */ + index = svga->dac_addr & da_mask; + if ((ramdac->type >= BT485) && (svga->dac_hwcursor.cur_xsize == 64)) + cd = (uint8_t *) ramdac->cursor64_data; + else { + index &= 0xff; + cd = (uint8_t *) ramdac->cursor32_data; + } - cd[index] = val; + cd[index] = val; - svga->dac_addr = (svga->dac_addr + 1) & da_mask; - break; - case 0x0c: /* Cursor X Low Register (RS value = 1100) */ - ramdac->hwc_x = (ramdac->hwc_x & 0x0f00) | val; - svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; - break; - case 0x0d: /* Cursor X High Register (RS value = 1101) */ - ramdac->hwc_x = (ramdac->hwc_x & 0x00ff) | ((val & 0x0f) << 8); - svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; - break; - case 0x0e: /* Cursor Y Low Register (RS value = 1110) */ - ramdac->hwc_y = (ramdac->hwc_y & 0x0f00) | val; - svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; - break; - case 0x0f: /* Cursor Y High Register (RS value = 1111) */ - ramdac->hwc_y = (ramdac->hwc_y & 0x00ff) | ((val & 0x0f) << 8); - svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; - break; + svga->dac_addr = (svga->dac_addr + 1) & da_mask; + break; + case 0x0c: /* Cursor X Low Register (RS value = 1100) */ + ramdac->hwc_x = (ramdac->hwc_x & 0x0f00) | val; + svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; + break; + case 0x0d: /* Cursor X High Register (RS value = 1101) */ + ramdac->hwc_x = (ramdac->hwc_x & 0x00ff) | ((val & 0x0f) << 8); + svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; + break; + case 0x0e: /* Cursor Y Low Register (RS value = 1110) */ + ramdac->hwc_y = (ramdac->hwc_y & 0x0f00) | val; + svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; + break; + case 0x0f: /* Cursor Y High Register (RS value = 1111) */ + ramdac->hwc_y = (ramdac->hwc_y & 0x00ff) | ((val & 0x0f) << 8); + svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; + break; } return; } - uint8_t bt48x_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga) { bt48x_ramdac_t *ramdac = (bt48x_ramdac_t *) p; - uint8_t temp = 0xff; - uint8_t *cd; - uint16_t index; - uint8_t rs = (addr & 0x03); - uint16_t da_mask = 0x03ff; + uint8_t temp = 0xff; + uint8_t *cd; + uint16_t index; + uint8_t rs = (addr & 0x03); + uint16_t da_mask = 0x03ff; rs |= (!!rs2 << 2); rs |= (!!rs3 << 3); if (ramdac->type < BT485) - da_mask = 0x00ff; + da_mask = 0x00ff; switch (rs) { - case 0x00: /* Palette Write Index Register (RS value = 0000) */ - case 0x01: /* Palette Data Register (RS value = 0001) */ - case 0x02: /* Pixel Read Mask Register (RS value = 0010) */ - case 0x04: /* Ext Palette Write Index Register (RS value = 0100) */ - temp = svga_in(addr, svga); - break; - case 0x03: /* Palette Read Index Register (RS value = 0011) */ - case 0x07: /* Ext Palette Read Index Register (RS value = 0111) */ - temp = svga->dac_addr & 0xff; - break; - case 0x05: /* Ext Palette Data Register (RS value = 0101) */ - index = (svga->dac_addr - 1) & 3; - svga->dac_status = 3; - switch (svga->dac_pos) { - case 0: - svga->dac_pos++; - if (svga->ramdac_type == RAMDAC_8BIT) - temp = ramdac->extpal[index].r; - else - temp = ramdac->extpal[index].r & 0x3f; - break; - case 1: - svga->dac_pos++; - if (svga->ramdac_type == RAMDAC_8BIT) - temp = ramdac->extpal[index].g; - else - temp = ramdac->extpal[index].g & 0x3f; - break; - case 2: - svga->dac_pos=0; - svga->dac_addr = svga->dac_addr + 1; - if (svga->ramdac_type == RAMDAC_8BIT) - temp = ramdac->extpal[index].b; - else - temp = ramdac->extpal[index].b & 0x3f; - break; - } - break; - case 0x06: /* Command Register 0 (RS value = 0110) */ - temp = ramdac->cmd_r0; - break; - case 0x08: /* Command Register 1 (RS value = 1000) */ - temp = ramdac->cmd_r1; - break; - case 0x09: /* Command Register 2 (RS value = 1001) */ - temp = ramdac->cmd_r2; - break; - case 0x0a: - if ((ramdac->type >= BT485) && (ramdac->cmd_r0 & 0x80)) { - switch ((svga->dac_addr & ((ramdac->type >= BT485A) ? 0xff : 0x3f))) { - case 0x00: - default: - temp = ramdac->status | (svga->dac_status ? 0x04 : 0x00); - break; - case 0x01: - temp = ramdac->cmd_r3 & 0xfc; - temp |= (svga->dac_addr & 0x300) >> 8; - break; - case 0x02: - case 0x20: - case 0x21: - case 0x22: - if (ramdac->type != BT485A) - break; - else if (svga->dac_addr == 2) { - temp = ramdac->cmd_r4; - break; - } else { - /* TODO: Red, Green, and Blue Signature Analysis Registers */ - temp = 0xff; - break; - } - break; - } - } else - temp = ramdac->status | (svga->dac_status ? 0x04 : 0x00); - break; - case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */ - index = (svga->dac_addr - 1) & da_mask; - if ((ramdac->type >= BT485) && (svga->dac_hwcursor.cur_xsize == 64)) - cd = (uint8_t *) ramdac->cursor64_data; - else { - index &= 0xff; - cd = (uint8_t *) ramdac->cursor32_data; - } + case 0x00: /* Palette Write Index Register (RS value = 0000) */ + case 0x01: /* Palette Data Register (RS value = 0001) */ + case 0x02: /* Pixel Read Mask Register (RS value = 0010) */ + case 0x04: /* Ext Palette Write Index Register (RS value = 0100) */ + temp = svga_in(addr, svga); + break; + case 0x03: /* Palette Read Index Register (RS value = 0011) */ + case 0x07: /* Ext Palette Read Index Register (RS value = 0111) */ + temp = svga->dac_addr & 0xff; + break; + case 0x05: /* Ext Palette Data Register (RS value = 0101) */ + index = (svga->dac_addr - 1) & 3; + svga->dac_status = 3; + switch (svga->dac_pos) { + case 0: + svga->dac_pos++; + if (svga->ramdac_type == RAMDAC_8BIT) + temp = ramdac->extpal[index].r; + else + temp = ramdac->extpal[index].r & 0x3f; + break; + case 1: + svga->dac_pos++; + if (svga->ramdac_type == RAMDAC_8BIT) + temp = ramdac->extpal[index].g; + else + temp = ramdac->extpal[index].g & 0x3f; + break; + case 2: + svga->dac_pos = 0; + svga->dac_addr = svga->dac_addr + 1; + if (svga->ramdac_type == RAMDAC_8BIT) + temp = ramdac->extpal[index].b; + else + temp = ramdac->extpal[index].b & 0x3f; + break; + } + break; + case 0x06: /* Command Register 0 (RS value = 0110) */ + temp = ramdac->cmd_r0; + break; + case 0x08: /* Command Register 1 (RS value = 1000) */ + temp = ramdac->cmd_r1; + break; + case 0x09: /* Command Register 2 (RS value = 1001) */ + temp = ramdac->cmd_r2; + break; + case 0x0a: + if ((ramdac->type >= BT485) && (ramdac->cmd_r0 & 0x80)) { + switch ((svga->dac_addr & ((ramdac->type >= BT485A) ? 0xff : 0x3f))) { + case 0x00: + default: + temp = ramdac->status | (svga->dac_status ? 0x04 : 0x00); + break; + case 0x01: + temp = ramdac->cmd_r3 & 0xfc; + temp |= (svga->dac_addr & 0x300) >> 8; + break; + case 0x02: + case 0x20: + case 0x21: + case 0x22: + if (ramdac->type != BT485A) + break; + else if (svga->dac_addr == 2) { + temp = ramdac->cmd_r4; + break; + } else { + /* TODO: Red, Green, and Blue Signature Analysis Registers */ + temp = 0xff; + break; + } + break; + } + } else + temp = ramdac->status | (svga->dac_status ? 0x04 : 0x00); + break; + case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */ + index = (svga->dac_addr - 1) & da_mask; + if ((ramdac->type >= BT485) && (svga->dac_hwcursor.cur_xsize == 64)) + cd = (uint8_t *) ramdac->cursor64_data; + else { + index &= 0xff; + cd = (uint8_t *) ramdac->cursor32_data; + } - temp = cd[index]; + temp = cd[index]; - svga->dac_addr = (svga->dac_addr + 1) & da_mask; - break; - case 0x0c: /* Cursor X Low Register (RS value = 1100) */ - temp = ramdac->hwc_x & 0xff; - break; - case 0x0d: /* Cursor X High Register (RS value = 1101) */ - temp = (ramdac->hwc_x >> 8) & 0xff; - break; - case 0x0e: /* Cursor Y Low Register (RS value = 1110) */ - temp = ramdac->hwc_y & 0xff; - break; - case 0x0f: /* Cursor Y High Register (RS value = 1111) */ - temp = (ramdac->hwc_y >> 8) & 0xff; - break; + svga->dac_addr = (svga->dac_addr + 1) & da_mask; + break; + case 0x0c: /* Cursor X Low Register (RS value = 1100) */ + temp = ramdac->hwc_x & 0xff; + break; + case 0x0d: /* Cursor X High Register (RS value = 1101) */ + temp = (ramdac->hwc_x >> 8) & 0xff; + break; + case 0x0e: /* Cursor Y Low Register (RS value = 1110) */ + temp = ramdac->hwc_y & 0xff; + break; + case 0x0f: /* Cursor Y High Register (RS value = 1111) */ + temp = (ramdac->hwc_y >> 8) & 0xff; + break; } return temp; } - void bt48x_recalctimings(void *p, svga_t *svga) { @@ -354,19 +349,18 @@ bt48x_recalctimings(void *p, svga_t *svga) svga->interlace = ramdac->cmd_r2 & 0x08; if (ramdac->cmd_r3 & 0x08) - svga->hdisp *= 2; /* x2 clock multiplier */ + svga->hdisp *= 2; /* x2 clock multiplier */ } - void bt48x_hwcursor_draw(svga_t *svga, int displine) { - int x, xx, comb, b0, b1; - uint16_t dat[2]; - int offset = svga->dac_hwcursor_latch.x - svga->dac_hwcursor_latch.xoff; - int pitch, bppl, mode, x_pos, y_pos; - uint32_t clr1, clr2, clr3, *p; - uint8_t *cd; + int x, xx, comb, b0, b1; + uint16_t dat[2]; + int offset = svga->dac_hwcursor_latch.x - svga->dac_hwcursor_latch.xoff; + int pitch, bppl, mode, x_pos, y_pos; + uint32_t clr1, clr2, clr3, *p; + uint8_t *cd; bt48x_ramdac_t *ramdac = (bt48x_ramdac_t *) svga->ramdac; clr1 = ramdac->extpallook[1]; @@ -376,85 +370,82 @@ bt48x_hwcursor_draw(svga_t *svga, int displine) /* The planes come in two parts, and each plane is 1bpp, so a 32x32 cursor has 4 bytes per line, and a 64x64 cursor has 8 bytes per line. */ - pitch = (svga->dac_hwcursor_latch.cur_xsize >> 3); /* Bytes per line. */ + pitch = (svga->dac_hwcursor_latch.cur_xsize >> 3); /* Bytes per line. */ /* A 32x32 cursor has 128 bytes per line, and a 64x64 cursor has 512 bytes per line. */ - bppl = (pitch * svga->dac_hwcursor_latch.cur_ysize); /* Bytes per plane. */ + bppl = (pitch * svga->dac_hwcursor_latch.cur_ysize); /* Bytes per plane. */ mode = ramdac->cmd_r2 & 0x03; if (svga->interlace && svga->dac_hwcursor_oddeven) - svga->dac_hwcursor_latch.addr += pitch; + svga->dac_hwcursor_latch.addr += pitch; if (svga->dac_hwcursor_latch.cur_xsize == 64) - cd = (uint8_t *) ramdac->cursor64_data; + cd = (uint8_t *) ramdac->cursor64_data; else - cd = (uint8_t *) ramdac->cursor32_data; + cd = (uint8_t *) ramdac->cursor32_data; for (x = 0; x < svga->dac_hwcursor_latch.cur_xsize; x += 16) { - dat[0] = (cd[svga->dac_hwcursor_latch.addr] << 8) | - cd[svga->dac_hwcursor_latch.addr + 1]; - dat[1] = (cd[svga->dac_hwcursor_latch.addr + bppl] << 8) | - cd[svga->dac_hwcursor_latch.addr + bppl + 1]; + dat[0] = (cd[svga->dac_hwcursor_latch.addr] << 8) | cd[svga->dac_hwcursor_latch.addr + 1]; + dat[1] = (cd[svga->dac_hwcursor_latch.addr + bppl] << 8) | cd[svga->dac_hwcursor_latch.addr + bppl + 1]; - for (xx = 0; xx < 16; xx++) { - b0 = (dat[0] >> (15 - xx)) & 1; - b1 = (dat[1] >> (15 - xx)) & 1; - comb = (b0 | (b1 << 1)); + for (xx = 0; xx < 16; xx++) { + b0 = (dat[0] >> (15 - xx)) & 1; + b1 = (dat[1] >> (15 - xx)) & 1; + comb = (b0 | (b1 << 1)); - y_pos = displine; - x_pos = offset + svga->x_add; - p = buffer32->line[y_pos]; + y_pos = displine; + x_pos = offset + svga->x_add; + p = buffer32->line[y_pos]; - if (offset >= svga->dac_hwcursor_latch.x) { - switch (mode) { - case 1: /* Three Color */ - switch (comb) { - case 1: - p[x_pos] = clr1; - break; - case 2: - p[x_pos] = clr2; - break; - case 3: - p[x_pos] = clr3; - break; - } - break; - case 2: /* PM/Windows */ - switch (comb) { - case 0: - p[x_pos] = clr1; - break; - case 1: - p[x_pos] = clr2; - break; - case 3: - p[x_pos] ^= 0xffffff; - break; - } - break; - case 3: /* X-Windows */ - switch (comb) { - case 2: - p[x_pos] = clr1; - break; - case 3: - p[x_pos] = clr2; - break; - } - break; - } - } - offset++; - } - svga->dac_hwcursor_latch.addr += 2; + if (offset >= svga->dac_hwcursor_latch.x) { + switch (mode) { + case 1: /* Three Color */ + switch (comb) { + case 1: + p[x_pos] = clr1; + break; + case 2: + p[x_pos] = clr2; + break; + case 3: + p[x_pos] = clr3; + break; + } + break; + case 2: /* PM/Windows */ + switch (comb) { + case 0: + p[x_pos] = clr1; + break; + case 1: + p[x_pos] = clr2; + break; + case 3: + p[x_pos] ^= 0xffffff; + break; + } + break; + case 3: /* X-Windows */ + switch (comb) { + case 2: + p[x_pos] = clr1; + break; + case 3: + p[x_pos] = clr2; + break; + } + break; + } + } + offset++; + } + svga->dac_hwcursor_latch.addr += 2; } if (svga->interlace && !svga->dac_hwcursor_oddeven) - svga->dac_hwcursor_latch.addr += pitch; + svga->dac_hwcursor_latch.addr += pitch; } - void * bt48x_ramdac_init(const device_t *info) { @@ -465,106 +456,105 @@ bt48x_ramdac_init(const device_t *info) /* Set the RAM DAC status byte to the correct ID bits. - Both the BT484 and BT485 datasheets say this: - SR7-SR6: These bits are identification values. SR7=0 and SR6=1. - But all other sources seem to assume SR7=1 and SR6=0. */ + Both the BT484 and BT485 datasheets say this: + SR7-SR6: These bits are identification values. SR7=0 and SR6=1. + But all other sources seem to assume SR7=1 and SR6=0. */ switch (ramdac->type) { - case BT484: - ramdac->status = 0x40; - break; - case ATT20C504: - ramdac->status = 0x40; - break; - case BT485: - ramdac->status = 0x60; - break; - case ATT20C505: - ramdac->status = 0xd0; - break; - case BT485A: - ramdac->status = 0x20; - break; + case BT484: + ramdac->status = 0x40; + break; + case ATT20C504: + ramdac->status = 0x40; + break; + case BT485: + ramdac->status = 0x60; + break; + case ATT20C505: + ramdac->status = 0xd0; + break; + case BT485A: + ramdac->status = 0x20; + break; } return ramdac; } - static void bt48x_ramdac_close(void *priv) { bt48x_ramdac_t *ramdac = (bt48x_ramdac_t *) priv; if (ramdac) - free(ramdac); + free(ramdac); } const device_t bt484_ramdac_device = { - .name = "Brooktree Bt484 RAMDAC", + .name = "Brooktree Bt484 RAMDAC", .internal_name = "bt484_ramdac", - .flags = 0, - .local = BT484, - .init = bt48x_ramdac_init, - .close = bt48x_ramdac_close, - .reset = NULL, + .flags = 0, + .local = BT484, + .init = bt48x_ramdac_init, + .close = bt48x_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t att20c504_ramdac_device = { - .name = "AT&T 20c504 RAMDAC", + .name = "AT&T 20c504 RAMDAC", .internal_name = "att20c504_ramdac", - .flags = 0, - .local = ATT20C504, - .init = bt48x_ramdac_init, - .close = bt48x_ramdac_close, - .reset = NULL, + .flags = 0, + .local = ATT20C504, + .init = bt48x_ramdac_init, + .close = bt48x_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t bt485_ramdac_device = { - .name = "Brooktree Bt485 RAMDAC", + .name = "Brooktree Bt485 RAMDAC", .internal_name = "bt485_ramdac", - .flags = 0, - .local = BT485, - .init = bt48x_ramdac_init, - .close = bt48x_ramdac_close, - .reset = NULL, + .flags = 0, + .local = BT485, + .init = bt48x_ramdac_init, + .close = bt48x_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t att20c505_ramdac_device = { - .name = "AT&T 20c505 RAMDAC", + .name = "AT&T 20c505 RAMDAC", .internal_name = "att20c505_ramdac", - .flags = 0, - .local = ATT20C505, - .init = bt48x_ramdac_init, - .close = bt48x_ramdac_close, - .reset = NULL, + .flags = 0, + .local = ATT20C505, + .init = bt48x_ramdac_init, + .close = bt48x_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t bt485a_ramdac_device = { - .name = "Brooktree Bt485A RAMDAC", + .name = "Brooktree Bt485A RAMDAC", .internal_name = "bt485a_ramdac", - .flags = 0, - .local = BT485A, - .init = bt48x_ramdac_init, - .close = bt48x_ramdac_close, - .reset = NULL, + .flags = 0, + .local = BT485A, + .init = bt48x_ramdac_init, + .close = bt48x_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_cga.c b/src/video/vid_cga.c index d7827732d..ee3987fe0 100644 --- a/src/video/vid_cga.c +++ b/src/video/vid_cga.c @@ -34,68 +34,64 @@ #include <86box/vid_cga.h> #include <86box/vid_cga_comp.h> - -#define CGA_RGB 0 +#define CGA_RGB 0 #define CGA_COMPOSITE 1 #define COMPOSITE_OLD 0 #define COMPOSITE_NEW 1 -static uint8_t crtcmask[32] = -{ - 0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f, 0xf3, 0x1f, 0x7f, 0x1f, 0x3f, 0xff, 0x3f, 0xff, - 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +static uint8_t crtcmask[32] = { + 0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f, 0xf3, 0x1f, 0x7f, 0x1f, 0x3f, 0xff, 0x3f, 0xff, + 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; -static video_timings_t timing_cga = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; +static video_timings_t timing_cga = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; void cga_recalctimings(cga_t *cga); - void cga_out(uint16_t addr, uint8_t val, void *p) { - cga_t *cga = (cga_t *) p; + cga_t *cga = (cga_t *) p; uint8_t old; if ((addr >= 0x3d0) && (addr <= 0x3d7)) - addr = (addr & 0xff9) | 0x004; + addr = (addr & 0xff9) | 0x004; switch (addr) { - case 0x3D4: - cga->crtcreg = val & 31; - return; - case 0x3D5: - old = cga->crtc[cga->crtcreg]; - cga->crtc[cga->crtcreg] = val & crtcmask[cga->crtcreg]; - if (old != val) { - if ((cga->crtcreg < 0xe) || (cga->crtcreg > 0x10)) { - cga->fullchange = changeframecount; - cga_recalctimings(cga); - } - } - return; - case 0x3D8: - old = cga->cgamode; - cga->cgamode = val; + case 0x3D4: + cga->crtcreg = val & 31; + return; + case 0x3D5: + old = cga->crtc[cga->crtcreg]; + cga->crtc[cga->crtcreg] = val & crtcmask[cga->crtcreg]; + if (old != val) { + if ((cga->crtcreg < 0xe) || (cga->crtcreg > 0x10)) { + cga->fullchange = changeframecount; + cga_recalctimings(cga); + } + } + return; + case 0x3D8: + old = cga->cgamode; + cga->cgamode = val; - if (old ^ val) { - if ((old ^ val) & 0x05) - update_cga16_color(val); + if (old ^ val) { + if ((old ^ val) & 0x05) + update_cga16_color(val); - cga_recalctimings(cga); - } - return; - case 0x3D9: - old = cga->cgacol; - cga->cgacol = val; - if (old ^ val) - cga_recalctimings(cga); - return; + cga_recalctimings(cga); + } + return; + case 0x3D9: + old = cga->cgacol; + cga->cgacol = val; + if (old ^ val) + cga_recalctimings(cga); + return; } } - uint8_t cga_in(uint16_t addr, void *p) { @@ -104,35 +100,33 @@ cga_in(uint16_t addr, void *p) uint8_t ret = 0xff; if ((addr >= 0x3d0) && (addr <= 0x3d7)) - addr = (addr & 0xff9) | 0x004; + addr = (addr & 0xff9) | 0x004; switch (addr) { - case 0x3D4: - ret = cga->crtcreg; - break; - case 0x3D5: - ret = cga->crtc[cga->crtcreg]; - break; - case 0x3DA: - ret = cga->cgastat; - break; + case 0x3D4: + ret = cga->crtcreg; + break; + case 0x3D5: + ret = cga->crtc[cga->crtcreg]; + break; + case 0x3DA: + ret = cga->cgastat; + break; } return ret; } - void cga_waitstates(void *p) { - int ws_array[16] = {3, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8}; + int ws_array[16] = { 3, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8 }; int ws; ws = ws_array[cycles & 0xf]; cycles -= ws; } - void cga_write(uint32_t addr, uint8_t val, void *p) { @@ -140,14 +134,13 @@ cga_write(uint32_t addr, uint8_t val, void *p) cga->vram[addr & 0x3fff] = val; if (cga->snow_enabled) { - int offset = ((timer_get_remaining_u64(&cga->timer) / CGACONST) * 2) & 0xfc; - cga->charbuffer[offset] = cga->vram[addr & 0x3fff]; - cga->charbuffer[offset | 1] = cga->vram[addr & 0x3fff]; + int offset = ((timer_get_remaining_u64(&cga->timer) / CGACONST) * 2) & 0xfc; + cga->charbuffer[offset] = cga->vram[addr & 0x3fff]; + cga->charbuffer[offset | 1] = cga->vram[addr & 0x3fff]; } cga_waitstates(cga); } - uint8_t cga_read(uint32_t addr, void *p) { @@ -155,14 +148,13 @@ cga_read(uint32_t addr, void *p) cga_waitstates(cga); if (cga->snow_enabled) { - int offset = ((timer_get_remaining_u64(&cga->timer) / CGACONST) * 2) & 0xfc; - cga->charbuffer[offset] = cga->vram[addr & 0x3fff]; - cga->charbuffer[offset | 1] = cga->vram[addr & 0x3fff]; + int offset = ((timer_get_remaining_u64(&cga->timer) / CGACONST) * 2) & 0xfc; + cga->charbuffer[offset] = cga->vram[addr & 0x3fff]; + cga->charbuffer[offset | 1] = cga->vram[addr & 0x3fff]; } return cga->vram[addr & 0x3fff]; } - void cga_recalctimings(cga_t *cga) { @@ -170,354 +162,331 @@ cga_recalctimings(cga_t *cga) double _dispontime, _dispofftime; if (cga->cgamode & 1) { - disptime = (double) (cga->crtc[0] + 1); - _dispontime = (double) cga->crtc[1]; + disptime = (double) (cga->crtc[0] + 1); + _dispontime = (double) cga->crtc[1]; } else { - disptime = (double) ((cga->crtc[0] + 1) << 1); - _dispontime = (double) (cga->crtc[1] << 1); + disptime = (double) ((cga->crtc[0] + 1) << 1); + _dispontime = (double) (cga->crtc[1] << 1); } - _dispofftime = disptime - _dispontime; - _dispontime = _dispontime * CGACONST; - _dispofftime = _dispofftime * CGACONST; - cga->dispontime = (uint64_t)(_dispontime); - cga->dispofftime = (uint64_t)(_dispofftime); + _dispofftime = disptime - _dispontime; + _dispontime = _dispontime * CGACONST; + _dispofftime = _dispofftime * CGACONST; + cga->dispontime = (uint64_t) (_dispontime); + cga->dispofftime = (uint64_t) (_dispofftime); } - void cga_poll(void *p) { - cga_t *cga = (cga_t *)p; - uint16_t ca = (cga->crtc[15] | (cga->crtc[14] << 8)) & 0x3fff; - int drawcursor; - int x, c, xs_temp, ys_temp; - int oldvc; - uint8_t chr, attr; - uint8_t border; + cga_t *cga = (cga_t *) p; + uint16_t ca = (cga->crtc[15] | (cga->crtc[14] << 8)) & 0x3fff; + int drawcursor; + int x, c, xs_temp, ys_temp; + int oldvc; + uint8_t chr, attr; + uint8_t border; uint16_t dat; - int cols[4]; - int col; - int oldsc; + int cols[4]; + int col; + int oldsc; if (!cga->linepos) { - timer_advance_u64(&cga->timer, cga->dispofftime); - cga->cgastat |= 1; - cga->linepos = 1; - oldsc = cga->sc; - if ((cga->crtc[8] & 3) == 3) - cga->sc = ((cga->sc << 1) + cga->oddeven) & 7; - if (cga->cgadispon) { - if (cga->displine < cga->firstline) { - cga->firstline = cga->displine; - video_wait_for_buffer(); - } - cga->lastline = cga->displine; - for (c = 0; c < 8; c++) { - if ((cga->cgamode & 0x12) == 0x12) { - buffer32->line[(cga->displine << 1)][c] = - buffer32->line[(cga->displine << 1) + 1][c] = 0; - if (cga->cgamode & 1) { - buffer32->line[(cga->displine << 1)][c + (cga->crtc[1] << 3) + 8] = - buffer32->line[(cga->displine << 1) + 1][c + (cga->crtc[1] << 3) + 8] = 0; - } else { - buffer32->line[(cga->displine << 1)][c + (cga->crtc[1] << 4) + 8] = - buffer32->line[(cga->displine << 1) + 1][c + (cga->crtc[1] << 4) + 8] = 0; - } - } else { - buffer32->line[(cga->displine << 1)][c] = - buffer32->line[(cga->displine << 1) + 1][c] = (cga->cgacol & 15) + 16; - if (cga->cgamode & 1) { - buffer32->line[(cga->displine << 1)][c + (cga->crtc[1] << 3) + 8] = - buffer32->line[(cga->displine << 1) + 1][c + (cga->crtc[1] << 3) + 8] = (cga->cgacol & 15) + 16; - } else { - buffer32->line[(cga->displine << 1)][c + (cga->crtc[1] << 4) + 8] = - buffer32->line[(cga->displine << 1) + 1][c + (cga->crtc[1] << 4) + 8] = (cga->cgacol & 15) + 16; - } - } - } - if (cga->cgamode & 1) { - for (x = 0; x < cga->crtc[1]; x++) { - if (cga->cgamode & 8) { - chr = cga->charbuffer[x << 1]; - attr = cga->charbuffer[(x << 1) + 1]; - } else - chr = attr = 0; - drawcursor = ((cga->ma == ca) && cga->con && cga->cursoron); - cols[1] = (attr & 15) + 16; - if (cga->cgamode & 0x20) { - cols[0] = ((attr >> 4) & 7) + 16; - if ((cga->cgablink & 8) && (attr & 0x80) && !cga->drawcursor) - cols[1] = cols[0]; - } else - cols[0] = (attr >> 4) + 16; - if (drawcursor) { - for (c = 0; c < 8; c++) { - buffer32->line[(cga->displine << 1)][(x << 3) + c + 8] = - buffer32->line[(cga->displine << 1) + 1][(x << 3) + c + 8] = - cols[(fontdat[chr + cga->fontbase][cga->sc & 7] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; - } - } else { - for (c = 0; c < 8; c++) { - buffer32->line[(cga->displine << 1)][(x << 3) + c + 8] = - buffer32->line[(cga->displine << 1) + 1][(x << 3) + c + 8] = - cols[(fontdat[chr + cga->fontbase][cga->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; - } - } - cga->ma++; - } - } else if (!(cga->cgamode & 2)) { - for (x = 0; x < cga->crtc[1]; x++) { - if (cga->cgamode & 8) { - chr = cga->vram[((cga->ma << 1) & 0x3fff)]; - attr = cga->vram[(((cga->ma << 1) + 1) & 0x3fff)]; - } else - chr = attr = 0; - drawcursor = ((cga->ma == ca) && cga->con && cga->cursoron); - cols[1] = (attr & 15) + 16; - if (cga->cgamode & 0x20) { - cols[0] = ((attr >> 4) & 7) + 16; - if ((cga->cgablink & 8) && (attr & 0x80)) - cols[1] = cols[0]; - } else - cols[0] = (attr >> 4) + 16; - cga->ma++; - if (drawcursor) { - for (c = 0; c < 8; c++) { - buffer32->line[(cga->displine << 1)][(x << 4) + (c << 1) + 8] = - buffer32->line[(cga->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = - buffer32->line[(cga->displine << 1) + 1][(x << 4) + (c << 1) + 8] = - buffer32->line[(cga->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = - cols[(fontdat[chr + cga->fontbase][cga->sc & 7] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; - } - } else { - for (c = 0; c < 8; c++) { - buffer32->line[(cga->displine << 1)][(x << 4) + (c << 1) + 8] = - buffer32->line[(cga->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = - buffer32->line[(cga->displine << 1) + 1][(x << 4) + (c << 1) + 8] = - buffer32->line[(cga->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = - cols[(fontdat[chr + cga->fontbase][cga->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; - } - } - } - } else if (!(cga->cgamode & 16)) { - cols[0] = (cga->cgacol & 15) | 16; - col = (cga->cgacol & 16) ? 24 : 16; - if (cga->cgamode & 4) { - cols[1] = col | 3; /* Cyan */ - cols[2] = col | 4; /* Red */ - cols[3] = col | 7; /* White */ - } else if (cga->cgacol & 32) { - cols[1] = col | 3; /* Cyan */ - cols[2] = col | 5; /* Magenta */ - cols[3] = col | 7; /* White */ - } else { - cols[1] = col | 2; /* Green */ - cols[2] = col | 4; /* Red */ - cols[3] = col | 6; /* Yellow */ - } - for (x = 0; x < cga->crtc[1]; x++) { - if (cga->cgamode & 8) - dat = (cga->vram[((cga->ma << 1) & 0x1fff) + ((cga->sc & 1) * 0x2000)] << 8) | cga->vram[((cga->ma << 1) & 0x1fff) + ((cga->sc & 1) * 0x2000) + 1]; - else - dat = 0; - cga->ma++; - for (c = 0; c < 8; c++) { - buffer32->line[(cga->displine << 1)][(x << 4) + (c << 1) + 8] = - buffer32->line[(cga->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = - buffer32->line[(cga->displine << 1) + 1][(x << 4) + (c << 1) + 8] = - buffer32->line[(cga->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = - cols[dat >> 14]; - dat <<= 2; - } - } - } else { - cols[0] = 0; cols[1] = (cga->cgacol & 15) + 16; - for (x = 0; x < cga->crtc[1]; x++) { - if (cga->cgamode & 8) - dat = (cga->vram[((cga->ma << 1) & 0x1fff) + ((cga->sc & 1) * 0x2000)] << 8) | cga->vram[((cga->ma << 1) & 0x1fff) + ((cga->sc & 1) * 0x2000) + 1]; - else - dat = 0; - cga->ma++; - for (c = 0; c < 16; c++) { - buffer32->line[(cga->displine << 1)][(x << 4) + c + 8] = - buffer32->line[(cga->displine << 1) + 1][(x << 4) + c + 8] = - cols[dat >> 15]; - dat <<= 1; - } - } - } - } else { - cols[0] = ((cga->cgamode & 0x12) == 0x12) ? 0 : (cga->cgacol & 15) + 16; - if (cga->cgamode & 1) { - hline(buffer32, 0, (cga->displine << 1), ((cga->crtc[1] << 3) + 16) << 2, cols[0]); - hline(buffer32, 0, (cga->displine << 1) + 1, ((cga->crtc[1] << 3) + 16) << 2, cols[0]); - } else { - hline(buffer32, 0, (cga->displine << 1), ((cga->crtc[1] << 4) + 16) << 2, cols[0]); - hline(buffer32, 0, (cga->displine << 1) + 1, ((cga->crtc[1] << 4) + 16) << 2, cols[0]); - } - } + timer_advance_u64(&cga->timer, cga->dispofftime); + cga->cgastat |= 1; + cga->linepos = 1; + oldsc = cga->sc; + if ((cga->crtc[8] & 3) == 3) + cga->sc = ((cga->sc << 1) + cga->oddeven) & 7; + if (cga->cgadispon) { + if (cga->displine < cga->firstline) { + cga->firstline = cga->displine; + video_wait_for_buffer(); + } + cga->lastline = cga->displine; + for (c = 0; c < 8; c++) { + if ((cga->cgamode & 0x12) == 0x12) { + buffer32->line[(cga->displine << 1)][c] = buffer32->line[(cga->displine << 1) + 1][c] = 0; + if (cga->cgamode & 1) { + buffer32->line[(cga->displine << 1)][c + (cga->crtc[1] << 3) + 8] = buffer32->line[(cga->displine << 1) + 1][c + (cga->crtc[1] << 3) + 8] = 0; + } else { + buffer32->line[(cga->displine << 1)][c + (cga->crtc[1] << 4) + 8] = buffer32->line[(cga->displine << 1) + 1][c + (cga->crtc[1] << 4) + 8] = 0; + } + } else { + buffer32->line[(cga->displine << 1)][c] = buffer32->line[(cga->displine << 1) + 1][c] = (cga->cgacol & 15) + 16; + if (cga->cgamode & 1) { + buffer32->line[(cga->displine << 1)][c + (cga->crtc[1] << 3) + 8] = buffer32->line[(cga->displine << 1) + 1][c + (cga->crtc[1] << 3) + 8] = (cga->cgacol & 15) + 16; + } else { + buffer32->line[(cga->displine << 1)][c + (cga->crtc[1] << 4) + 8] = buffer32->line[(cga->displine << 1) + 1][c + (cga->crtc[1] << 4) + 8] = (cga->cgacol & 15) + 16; + } + } + } + if (cga->cgamode & 1) { + for (x = 0; x < cga->crtc[1]; x++) { + if (cga->cgamode & 8) { + chr = cga->charbuffer[x << 1]; + attr = cga->charbuffer[(x << 1) + 1]; + } else + chr = attr = 0; + drawcursor = ((cga->ma == ca) && cga->con && cga->cursoron); + cols[1] = (attr & 15) + 16; + if (cga->cgamode & 0x20) { + cols[0] = ((attr >> 4) & 7) + 16; + if ((cga->cgablink & 8) && (attr & 0x80) && !cga->drawcursor) + cols[1] = cols[0]; + } else + cols[0] = (attr >> 4) + 16; + if (drawcursor) { + for (c = 0; c < 8; c++) { + buffer32->line[(cga->displine << 1)][(x << 3) + c + 8] = buffer32->line[(cga->displine << 1) + 1][(x << 3) + c + 8] = cols[(fontdat[chr + cga->fontbase][cga->sc & 7] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; + } + } else { + for (c = 0; c < 8; c++) { + buffer32->line[(cga->displine << 1)][(x << 3) + c + 8] = buffer32->line[(cga->displine << 1) + 1][(x << 3) + c + 8] = cols[(fontdat[chr + cga->fontbase][cga->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; + } + } + cga->ma++; + } + } else if (!(cga->cgamode & 2)) { + for (x = 0; x < cga->crtc[1]; x++) { + if (cga->cgamode & 8) { + chr = cga->vram[((cga->ma << 1) & 0x3fff)]; + attr = cga->vram[(((cga->ma << 1) + 1) & 0x3fff)]; + } else + chr = attr = 0; + drawcursor = ((cga->ma == ca) && cga->con && cga->cursoron); + cols[1] = (attr & 15) + 16; + if (cga->cgamode & 0x20) { + cols[0] = ((attr >> 4) & 7) + 16; + if ((cga->cgablink & 8) && (attr & 0x80)) + cols[1] = cols[0]; + } else + cols[0] = (attr >> 4) + 16; + cga->ma++; + if (drawcursor) { + for (c = 0; c < 8; c++) { + buffer32->line[(cga->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(cga->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = buffer32->line[(cga->displine << 1) + 1][(x << 4) + (c << 1) + 8] = buffer32->line[(cga->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdat[chr + cga->fontbase][cga->sc & 7] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; + } + } else { + for (c = 0; c < 8; c++) { + buffer32->line[(cga->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(cga->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = buffer32->line[(cga->displine << 1) + 1][(x << 4) + (c << 1) + 8] = buffer32->line[(cga->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdat[chr + cga->fontbase][cga->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; + } + } + } + } else if (!(cga->cgamode & 16)) { + cols[0] = (cga->cgacol & 15) | 16; + col = (cga->cgacol & 16) ? 24 : 16; + if (cga->cgamode & 4) { + cols[1] = col | 3; /* Cyan */ + cols[2] = col | 4; /* Red */ + cols[3] = col | 7; /* White */ + } else if (cga->cgacol & 32) { + cols[1] = col | 3; /* Cyan */ + cols[2] = col | 5; /* Magenta */ + cols[3] = col | 7; /* White */ + } else { + cols[1] = col | 2; /* Green */ + cols[2] = col | 4; /* Red */ + cols[3] = col | 6; /* Yellow */ + } + for (x = 0; x < cga->crtc[1]; x++) { + if (cga->cgamode & 8) + dat = (cga->vram[((cga->ma << 1) & 0x1fff) + ((cga->sc & 1) * 0x2000)] << 8) | cga->vram[((cga->ma << 1) & 0x1fff) + ((cga->sc & 1) * 0x2000) + 1]; + else + dat = 0; + cga->ma++; + for (c = 0; c < 8; c++) { + buffer32->line[(cga->displine << 1)][(x << 4) + (c << 1) + 8] = buffer32->line[(cga->displine << 1)][(x << 4) + (c << 1) + 1 + 8] = buffer32->line[(cga->displine << 1) + 1][(x << 4) + (c << 1) + 8] = buffer32->line[(cga->displine << 1) + 1][(x << 4) + (c << 1) + 1 + 8] = cols[dat >> 14]; + dat <<= 2; + } + } + } else { + cols[0] = 0; + cols[1] = (cga->cgacol & 15) + 16; + for (x = 0; x < cga->crtc[1]; x++) { + if (cga->cgamode & 8) + dat = (cga->vram[((cga->ma << 1) & 0x1fff) + ((cga->sc & 1) * 0x2000)] << 8) | cga->vram[((cga->ma << 1) & 0x1fff) + ((cga->sc & 1) * 0x2000) + 1]; + else + dat = 0; + cga->ma++; + for (c = 0; c < 16; c++) { + buffer32->line[(cga->displine << 1)][(x << 4) + c + 8] = buffer32->line[(cga->displine << 1) + 1][(x << 4) + c + 8] = cols[dat >> 15]; + dat <<= 1; + } + } + } + } else { + cols[0] = ((cga->cgamode & 0x12) == 0x12) ? 0 : (cga->cgacol & 15) + 16; + if (cga->cgamode & 1) { + hline(buffer32, 0, (cga->displine << 1), ((cga->crtc[1] << 3) + 16) << 2, cols[0]); + hline(buffer32, 0, (cga->displine << 1) + 1, ((cga->crtc[1] << 3) + 16) << 2, cols[0]); + } else { + hline(buffer32, 0, (cga->displine << 1), ((cga->crtc[1] << 4) + 16) << 2, cols[0]); + hline(buffer32, 0, (cga->displine << 1) + 1, ((cga->crtc[1] << 4) + 16) << 2, cols[0]); + } + } - if (cga->cgamode & 1) - x = (cga->crtc[1] << 3) + 16; - else - x = (cga->crtc[1] << 4) + 16; + if (cga->cgamode & 1) + x = (cga->crtc[1] << 3) + 16; + else + x = (cga->crtc[1] << 4) + 16; - if (cga->composite) { - if (cga->cgamode & 0x10) - border = 0x00; - else - border = cga->cgacol & 0x0f; + if (cga->composite) { + if (cga->cgamode & 0x10) + border = 0x00; + else + border = cga->cgacol & 0x0f; - Composite_Process(cga->cgamode, border, x >> 2, buffer32->line[(cga->displine << 1)]); - Composite_Process(cga->cgamode, border, x >> 2, buffer32->line[(cga->displine << 1) + 1]); - } + Composite_Process(cga->cgamode, border, x >> 2, buffer32->line[(cga->displine << 1)]); + Composite_Process(cga->cgamode, border, x >> 2, buffer32->line[(cga->displine << 1) + 1]); + } - cga->sc = oldsc; - if (cga->vc == cga->crtc[7] && !cga->sc) - cga->cgastat |= 8; - cga->displine++; - if (cga->displine >= 360) - cga->displine = 0; + cga->sc = oldsc; + if (cga->vc == cga->crtc[7] && !cga->sc) + cga->cgastat |= 8; + cga->displine++; + if (cga->displine >= 360) + cga->displine = 0; } else { - timer_advance_u64(&cga->timer, cga->dispontime); - cga->linepos = 0; - if (cga->vsynctime) { - cga->vsynctime--; - if (!cga->vsynctime) - cga->cgastat &= ~8; - } - if (cga->sc == (cga->crtc[11] & 31) || ((cga->crtc[8] & 3) == 3 && cga->sc == ((cga->crtc[11] & 31) >> 1))) { - cga->con = 0; - cga->coff = 1; - } - if ((cga->crtc[8] & 3) == 3 && cga->sc == (cga->crtc[9] >> 1)) - cga->maback = cga->ma; - if (cga->vadj) { - cga->sc++; - cga->sc &= 31; - cga->ma = cga->maback; - cga->vadj--; - if (!cga->vadj) { - cga->cgadispon = 1; - cga->ma = cga->maback = (cga->crtc[13] | (cga->crtc[12] << 8)) & 0x3fff; - cga->sc = 0; - } - } else if (cga->sc == cga->crtc[9]) { - cga->maback = cga->ma; - cga->sc = 0; - oldvc = cga->vc; - cga->vc++; - cga->vc &= 127; + timer_advance_u64(&cga->timer, cga->dispontime); + cga->linepos = 0; + if (cga->vsynctime) { + cga->vsynctime--; + if (!cga->vsynctime) + cga->cgastat &= ~8; + } + if (cga->sc == (cga->crtc[11] & 31) || ((cga->crtc[8] & 3) == 3 && cga->sc == ((cga->crtc[11] & 31) >> 1))) { + cga->con = 0; + cga->coff = 1; + } + if ((cga->crtc[8] & 3) == 3 && cga->sc == (cga->crtc[9] >> 1)) + cga->maback = cga->ma; + if (cga->vadj) { + cga->sc++; + cga->sc &= 31; + cga->ma = cga->maback; + cga->vadj--; + if (!cga->vadj) { + cga->cgadispon = 1; + cga->ma = cga->maback = (cga->crtc[13] | (cga->crtc[12] << 8)) & 0x3fff; + cga->sc = 0; + } + } else if (cga->sc == cga->crtc[9]) { + cga->maback = cga->ma; + cga->sc = 0; + oldvc = cga->vc; + cga->vc++; + cga->vc &= 127; - if (cga->vc == cga->crtc[6]) - cga->cgadispon = 0; + if (cga->vc == cga->crtc[6]) + cga->cgadispon = 0; - if (oldvc == cga->crtc[4]) { - cga->vc = 0; - cga->vadj = cga->crtc[5]; - if (!cga->vadj) { - cga->cgadispon = 1; - cga->ma = cga->maback = (cga->crtc[13] | (cga->crtc[12] << 8)) & 0x3fff; - } - switch (cga->crtc[10] & 0x60) { - case 0x20: - cga->cursoron = 0; - break; - case 0x60: - cga->cursoron = cga->cgablink & 0x10; - break; - default: - cga->cursoron = cga->cgablink & 0x08; - break; - } - } + if (oldvc == cga->crtc[4]) { + cga->vc = 0; + cga->vadj = cga->crtc[5]; + if (!cga->vadj) { + cga->cgadispon = 1; + cga->ma = cga->maback = (cga->crtc[13] | (cga->crtc[12] << 8)) & 0x3fff; + } + switch (cga->crtc[10] & 0x60) { + case 0x20: + cga->cursoron = 0; + break; + case 0x60: + cga->cursoron = cga->cgablink & 0x10; + break; + default: + cga->cursoron = cga->cgablink & 0x08; + break; + } + } - if (cga->vc == cga->crtc[7]) { - cga->cgadispon = 0; - cga->displine = 0; - cga->vsynctime = 16; - if (cga->crtc[7]) { - if (cga->cgamode & 1) - x = (cga->crtc[1] << 3) + 16; - else - x = (cga->crtc[1] << 4) + 16; - cga->lastline++; + if (cga->vc == cga->crtc[7]) { + cga->cgadispon = 0; + cga->displine = 0; + cga->vsynctime = 16; + if (cga->crtc[7]) { + if (cga->cgamode & 1) + x = (cga->crtc[1] << 3) + 16; + else + x = (cga->crtc[1] << 4) + 16; + cga->lastline++; - xs_temp = x; - ys_temp = (cga->lastline - cga->firstline) << 1; + xs_temp = x; + ys_temp = (cga->lastline - cga->firstline) << 1; - if ((xs_temp > 0) && (ys_temp > 0)) { - if (xs_temp < 64) xs_temp = 656; - if (ys_temp < 32) ys_temp = 400; - if (!enable_overscan) - xs_temp -= 16; + if ((xs_temp > 0) && (ys_temp > 0)) { + if (xs_temp < 64) + xs_temp = 656; + if (ys_temp < 32) + ys_temp = 400; + if (!enable_overscan) + xs_temp -= 16; - if ((cga->cgamode & 8) && ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get())) { - xsize = xs_temp; - ysize = ys_temp; - set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); + if ((cga->cgamode & 8) && ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get())) { + xsize = xs_temp; + ysize = ys_temp; + set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); - if (video_force_resize_get()) - video_force_resize_set(0); - } + if (video_force_resize_get()) + video_force_resize_set(0); + } - if (enable_overscan) { - if (cga->composite) - video_blit_memtoscreen(0, (cga->firstline - 4) << 1, - xsize, ((cga->lastline - cga->firstline) + 8) << 1); - else - video_blit_memtoscreen_8(0, (cga->firstline - 4) << 1, - xsize, ((cga->lastline - cga->firstline) + 8) << 1); - } else { - if (cga->composite) - video_blit_memtoscreen(8, cga->firstline << 1, - xsize, (cga->lastline - cga->firstline) << 1); - else - video_blit_memtoscreen_8(8, cga->firstline << 1, - xsize, (cga->lastline - cga->firstline) << 1); - } - } + if (enable_overscan) { + if (cga->composite) + video_blit_memtoscreen(0, (cga->firstline - 4) << 1, + xsize, ((cga->lastline - cga->firstline) + 8) << 1); + else + video_blit_memtoscreen_8(0, (cga->firstline - 4) << 1, + xsize, ((cga->lastline - cga->firstline) + 8) << 1); + } else { + if (cga->composite) + video_blit_memtoscreen(8, cga->firstline << 1, + xsize, (cga->lastline - cga->firstline) << 1); + else + video_blit_memtoscreen_8(8, cga->firstline << 1, + xsize, (cga->lastline - cga->firstline) << 1); + } + } - frames++; + frames++; - video_res_x = xsize; - video_res_y = ysize; - if (cga->cgamode & 1) { - video_res_x /= 8; - video_res_y /= cga->crtc[9] + 1; - video_bpp = 0; - } else if (!(cga->cgamode & 2)) { - video_res_x /= 16; - video_res_y /= cga->crtc[9] + 1; - video_bpp = 0; - } else if (!(cga->cgamode & 16)) { - video_res_x /= 2; - video_bpp = 2; - } else - video_bpp = 1; - } - cga->firstline = 1000; - cga->lastline = 0; - cga->cgablink++; - cga->oddeven ^= 1; - } - } else { - cga->sc++; - cga->sc &= 31; - cga->ma = cga->maback; - } - if (cga->cgadispon) - cga->cgastat &= ~1; - if ((cga->sc == (cga->crtc[10] & 31) || ((cga->crtc[8] & 3) == 3 && cga->sc == ((cga->crtc[10] & 31) >> 1)))) - cga->con = 1; - if (cga->cgadispon && (cga->cgamode & 1)) { - for (x = 0; x < (cga->crtc[1] << 1); x++) - cga->charbuffer[x] = cga->vram[(((cga->ma << 1) + x) & 0x3fff)]; - } + video_res_x = xsize; + video_res_y = ysize; + if (cga->cgamode & 1) { + video_res_x /= 8; + video_res_y /= cga->crtc[9] + 1; + video_bpp = 0; + } else if (!(cga->cgamode & 2)) { + video_res_x /= 16; + video_res_y /= cga->crtc[9] + 1; + video_bpp = 0; + } else if (!(cga->cgamode & 16)) { + video_res_x /= 2; + video_bpp = 2; + } else + video_bpp = 1; + } + cga->firstline = 1000; + cga->lastline = 0; + cga->cgablink++; + cga->oddeven ^= 1; + } + } else { + cga->sc++; + cga->sc &= 31; + cga->ma = cga->maback; + } + if (cga->cgadispon) + cga->cgastat &= ~1; + if ((cga->sc == (cga->crtc[10] & 31) || ((cga->crtc[8] & 3) == 3 && cga->sc == ((cga->crtc[10] & 31) >> 1)))) + cga->con = 1; + if (cga->cgadispon && (cga->cgamode & 1)) { + for (x = 0; x < (cga->crtc[1] << 1); x++) + cga->charbuffer[x] = cga->vram[(((cga->ma << 1) + x) & 0x3fff)]; + } } } - void cga_init(cga_t *cga) { @@ -525,19 +494,18 @@ cga_init(cga_t *cga) cga->composite = 0; } - void * cga_standalone_init(const device_t *info) { - int display_type; + int display_type; cga_t *cga = malloc(sizeof(cga_t)); memset(cga, 0, sizeof(cga_t)); video_inform(VIDEO_FLAG_TYPE_CGA, &timing_cga); - display_type = device_get_config_int("display_type"); - cga->composite = (display_type != CGA_RGB); - cga->revision = device_get_config_int("composite_type"); + display_type = device_get_config_int("display_type"); + cga->composite = (display_type != CGA_RGB); + cga->revision = device_get_config_int("composite_type"); cga->snow_enabled = device_get_config_int("snow_enabled"); cga->vram = malloc(0x4000); @@ -550,13 +518,12 @@ cga_standalone_init(const device_t *info) overscan_x = overscan_y = 16; cga->rgb_type = device_get_config_int("rgb_type"); - cga_palette = (cga->rgb_type << 1); + cga_palette = (cga->rgb_type << 1); cgapal_rebuild(); return cga; } - void cga_close(void *p) { @@ -566,7 +533,6 @@ cga_close(void *p) free(cga); } - void cga_speed_changed(void *p) { @@ -659,15 +625,15 @@ const device_config_t cga_config[] = { // clang-format on const device_t cga_device = { - .name = "CGA", + .name = "CGA", .internal_name = "cga", - .flags = DEVICE_ISA, - .local = 0, - .init = cga_standalone_init, - .close = cga_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = cga_standalone_init, + .close = cga_close, + .reset = NULL, { .available = NULL }, .speed_changed = cga_speed_changed, - .force_redraw = NULL, - .config = cga_config + .force_redraw = NULL, + .config = cga_config }; diff --git a/src/video/vid_cga_comp.c b/src/video/vid_cga_comp.c index a0b5c08a8..077084000 100644 --- a/src/video/vid_cga_comp.c +++ b/src/video/vid_cga_comp.c @@ -29,14 +29,12 @@ #include <86box/vid_cga.h> #include <86box/vid_cga_comp.h> - int CGA_Composite_Table[1024]; - static double brightness = 0; -static double contrast = 100; +static double contrast = 100; static double saturation = 100; -static double sharpness = 0; +static double sharpness = 0; static double hue_offset = 0; /* New algorithm by reenigne @@ -45,6 +43,7 @@ static double hue_offset = 0; static const double tau = 6.28318531; /* == 2*pi */ static unsigned char chroma_multiplexer[256] = { + // clang-format off 2, 2, 2, 2, 114,174, 4, 3, 2, 1,133,135, 2,113,150, 4, 133, 2, 1, 99, 151,152, 2, 1, 3, 2, 96,136, 151,152,151,152, 2, 56, 62, 4, 111,250,118, 4, 0, 51,207,137, 1,171,209, 5, @@ -60,12 +59,15 @@ static unsigned char chroma_multiplexer[256] = { 78, 4, 0, 75, 166,180, 20, 38, 78, 1,143,246, 42,113,156, 37, 252, 4, 1,188, 175,129, 1, 37, 118, 4, 88,249, 202,150,145,200, 61, 59, 60, 60, 228,252,117, 77, 60, 58,248,251, 81,212,254,107, - 198, 59, 58,169, 250,251, 81, 80, 100, 58,154,250, 251,252,252,252}; + 198, 59, 58,169, 250,251, 81, 80, 100, 58,154,250, 251,252,252,252 + // clang-format on +}; static double intensity[4] = { - 77.175381, 88.654656, 166.564623, 174.228438}; + 77.175381, 88.654656, 166.564623, 174.228438 +}; -#define NEW_CGA(c,i,r,g,b) (((c)/0.72)*0.29 + ((i)/0.28)*0.32 + ((r)/0.28)*0.1 + ((g)/0.28)*0.22 + ((b)/0.28)*0.07) +#define NEW_CGA(c, i, r, g, b) (((c) / 0.72) * 0.29 + ((i) / 0.28) * 0.32 + ((r) / 0.28) * 0.1 + ((g) / 0.28) * 0.22 + ((b) / 0.28) * 0.07) double mode_brightness; double mode_contrast; @@ -74,272 +76,291 @@ double min_v; double max_v; double video_ri, video_rq, video_gi, video_gq, video_bi, video_bq; -int video_sharpness; -int tandy_mode_control = 0; +int video_sharpness; +int tandy_mode_control = 0; static bool new_cga = 0; -void update_cga16_color(uint8_t cgamode) { - int x; - double c, i, v; - double q, a, s, r; - double iq_adjust_i, iq_adjust_q; - double i0, i3, mode_saturation; +void +update_cga16_color(uint8_t cgamode) +{ + int x; + double c, i, v; + double q, a, s, r; + double iq_adjust_i, iq_adjust_q; + double i0, i3, mode_saturation; - static const double ri = 0.9563; - static const double rq = 0.6210; - static const double gi = -0.2721; - static const double gq = -0.6474; - static const double bi = -1.1069; - static const double bq = 1.7046; + static const double ri = 0.9563; + static const double rq = 0.6210; + static const double gi = -0.2721; + static const double gq = -0.6474; + static const double bi = -1.1069; + static const double bq = 1.7046; - if (!new_cga) { - min_v = chroma_multiplexer[0] + intensity[0]; - max_v = chroma_multiplexer[255] + intensity[3]; + if (!new_cga) { + min_v = chroma_multiplexer[0] + intensity[0]; + max_v = chroma_multiplexer[255] + intensity[3]; + } else { + i0 = intensity[0]; + i3 = intensity[3]; + min_v = NEW_CGA(chroma_multiplexer[0], i0, i0, i0, i0); + max_v = NEW_CGA(chroma_multiplexer[255], i3, i3, i3, i3); + } + mode_contrast = 256 / (max_v - min_v); + mode_brightness = -min_v * mode_contrast; + if ((cgamode & 3) == 1) + mode_hue = 14; + else + mode_hue = 4; + + mode_contrast *= contrast * (new_cga ? 1.2 : 1) / 100; /* new CGA: 120% */ + mode_brightness += (new_cga ? brightness - 10 : brightness) * 5; /* new CGA: -10 */ + mode_saturation = (new_cga ? 4.35 : 2.9) * saturation / 100; /* new CGA: 150% */ + + for (x = 0; x < 1024; ++x) { + int phase = x & 3; + int right = (x >> 2) & 15; + int left = (x >> 6) & 15; + int rc = right; + int lc = left; + if ((cgamode & 4) != 0) { + rc = (right & 8) | ((right & 7) != 0 ? 7 : 0); + lc = (left & 8) | ((left & 7) != 0 ? 7 : 0); } + c = chroma_multiplexer[((lc & 7) << 5) | ((rc & 7) << 2) | phase]; + i = intensity[(left >> 3) | ((right >> 2) & 2)]; + if (!new_cga) + v = c + i; else { - i0 = intensity[0]; - i3 = intensity[3]; - min_v = NEW_CGA(chroma_multiplexer[0], i0, i0, i0, i0); - max_v = NEW_CGA(chroma_multiplexer[255], i3, i3, i3, i3); + double r = intensity[((left >> 2) & 1) | ((right >> 1) & 2)]; + double g = intensity[((left >> 1) & 1) | (right & 2)]; + double b = intensity[(left & 1) | ((right << 1) & 2)]; + v = NEW_CGA(c, i, r, g, b); } - mode_contrast = 256/(max_v - min_v); - mode_brightness = -min_v*mode_contrast; - if ((cgamode & 3) == 1) - mode_hue = 14; - else - mode_hue = 4; + CGA_Composite_Table[x] = (int) (v * mode_contrast + mode_brightness); + } - mode_contrast *= contrast * (new_cga ? 1.2 : 1)/100; /* new CGA: 120% */ - mode_brightness += (new_cga ? brightness-10 : brightness)*5; /* new CGA: -10 */ - mode_saturation = (new_cga ? 4.35 : 2.9)*saturation/100; /* new CGA: 150% */ + i = CGA_Composite_Table[6 * 68] - CGA_Composite_Table[6 * 68 + 2]; + q = CGA_Composite_Table[6 * 68 + 1] - CGA_Composite_Table[6 * 68 + 3]; - for (x = 0; x < 1024; ++x) { - int phase = x & 3; - int right = (x >> 2) & 15; - int left = (x >> 6) & 15; - int rc = right; - int lc = left; - if ((cgamode & 4) != 0) { - rc = (right & 8) | ((right & 7) != 0 ? 7 : 0); - lc = (left & 8) | ((left & 7) != 0 ? 7 : 0); - } - c = chroma_multiplexer[((lc & 7) << 5) | ((rc & 7) << 2) | phase]; - i = intensity[(left >> 3) | ((right >> 2) & 2)]; - if (!new_cga) - v = c + i; - else { - double r = intensity[((left >> 2) & 1) | ((right >> 1) & 2)]; - double g = intensity[((left >> 1) & 1) | (right & 2)]; - double b = intensity[(left & 1) | ((right << 1) & 2)]; - v = NEW_CGA(c, i, r, g, b); - } - CGA_Composite_Table[x] = (int) (v*mode_contrast + mode_brightness); - } + a = tau * (33 + 90 + hue_offset + mode_hue) / 360.0; + c = cos(a); + s = sin(a); + r = 256 * mode_saturation / sqrt(i * i + q * q); - i = CGA_Composite_Table[6*68] - CGA_Composite_Table[6*68 + 2]; - q = CGA_Composite_Table[6*68 + 1] - CGA_Composite_Table[6*68 + 3]; + iq_adjust_i = -(i * c + q * s) * r; + iq_adjust_q = (q * c - i * s) * r; - a = tau*(33 + 90 + hue_offset + mode_hue)/360.0; - c = cos(a); - s = sin(a); - r = 256*mode_saturation/sqrt(i*i+q*q); - - iq_adjust_i = -(i*c + q*s)*r; - iq_adjust_q = (q*c - i*s)*r; - - video_ri = (int) (ri*iq_adjust_i + rq*iq_adjust_q); - video_rq = (int) (-ri*iq_adjust_q + rq*iq_adjust_i); - video_gi = (int) (gi*iq_adjust_i + gq*iq_adjust_q); - video_gq = (int) (-gi*iq_adjust_q + gq*iq_adjust_i); - video_bi = (int) (bi*iq_adjust_i + bq*iq_adjust_q); - video_bq = (int) (-bi*iq_adjust_q + bq*iq_adjust_i); - video_sharpness = (int) (sharpness*256/100); + video_ri = (int) (ri * iq_adjust_i + rq * iq_adjust_q); + video_rq = (int) (-ri * iq_adjust_q + rq * iq_adjust_i); + video_gi = (int) (gi * iq_adjust_i + gq * iq_adjust_q); + video_gq = (int) (-gi * iq_adjust_q + gq * iq_adjust_i); + video_bi = (int) (bi * iq_adjust_i + bq * iq_adjust_q); + video_bq = (int) (-bi * iq_adjust_q + bq * iq_adjust_i); + video_sharpness = (int) (sharpness * 256 / 100); } -static Bit8u byte_clamp(int v) { - v >>= 13; - return v < 0 ? 0 : (v > 255 ? 255 : v); +static Bit8u +byte_clamp(int v) +{ + v >>= 13; + return v < 0 ? 0 : (v > 255 ? 255 : v); } /* 2048x1536 is the maximum we can possibly support. */ #define SCALER_MAXWIDTH 2048 -static int temp[SCALER_MAXWIDTH + 10]={0}; -static int atemp[SCALER_MAXWIDTH + 2]={0}; -static int btemp[SCALER_MAXWIDTH + 2]={0}; +static int temp[SCALER_MAXWIDTH + 10] = { 0 }; +static int atemp[SCALER_MAXWIDTH + 2] = { 0 }; +static int btemp[SCALER_MAXWIDTH + 2] = { 0 }; -Bit32u * Composite_Process(uint8_t cgamode, Bit8u border, Bit32u blocks/*, bool doublewidth*/, Bit32u *TempLine) +Bit32u * +Composite_Process(uint8_t cgamode, Bit8u border, Bit32u blocks /*, bool doublewidth*/, Bit32u *TempLine) { - int x; - Bit32u x2; + int x; + Bit32u x2; - int w = blocks*4; + int w = blocks * 4; - int *o; - Bit32u *rgbi; - int *b; - int *i; - Bit32u* srgb; - int *ap, *bp; + int *o; + Bit32u *rgbi; + int *b; + int *i; + Bit32u *srgb; + int *ap, *bp; -#define COMPOSITE_CONVERT(I, Q) do { \ - i[1] = (i[1]<<3) - ap[1]; \ - a = ap[0]; \ - b = bp[0]; \ - c = i[0]+i[0]; \ - d = i[-1]+i[1]; \ - y = ((c+d)<<8) + video_sharpness*(c-d); \ - rr = y + video_ri*(I) + video_rq*(Q); \ - gg = y + video_gi*(I) + video_gq*(Q); \ - bb = y + video_bi*(I) + video_bq*(Q); \ - ++i; \ - ++ap; \ - ++bp; \ - *srgb = (byte_clamp(rr)<<16) | (byte_clamp(gg)<<8) | byte_clamp(bb); \ - ++srgb; \ -} while (0) +#define COMPOSITE_CONVERT(I, Q) \ + do { \ + i[1] = (i[1] << 3) - ap[1]; \ + a = ap[0]; \ + b = bp[0]; \ + c = i[0] + i[0]; \ + d = i[-1] + i[1]; \ + y = ((c + d) << 8) + video_sharpness * (c - d); \ + rr = y + video_ri * (I) + video_rq * (Q); \ + gg = y + video_gi * (I) + video_gq * (Q); \ + bb = y + video_bi * (I) + video_bq * (Q); \ + ++i; \ + ++ap; \ + ++bp; \ + *srgb = (byte_clamp(rr) << 16) | (byte_clamp(gg) << 8) | byte_clamp(bb); \ + ++srgb; \ + } while (0) -#define OUT(v) do { *o = (v); ++o; } while (0) +#define OUT(v) \ + do { \ + *o = (v); \ + ++o; \ + } while (0) - /* Simulate CGA composite output */ - o = temp; - rgbi = TempLine; - b = &CGA_Composite_Table[border*68]; - for (x = 0; x < 4; ++x) - OUT(b[(x+3)&3]); - OUT(CGA_Composite_Table[(border<<6) | ((*rgbi & 0x0f)<<2) | 3]); - for (x = 0; x < w-1; ++x) { - OUT(CGA_Composite_Table[((rgbi[0] & 0x0f)<<6) | ((rgbi[1] & 0x0f)<<2) | (x&3)]); - ++rgbi; + /* Simulate CGA composite output */ + o = temp; + rgbi = TempLine; + b = &CGA_Composite_Table[border * 68]; + for (x = 0; x < 4; ++x) + OUT(b[(x + 3) & 3]); + OUT(CGA_Composite_Table[(border << 6) | ((*rgbi & 0x0f) << 2) | 3]); + for (x = 0; x < w - 1; ++x) { + OUT(CGA_Composite_Table[((rgbi[0] & 0x0f) << 6) | ((rgbi[1] & 0x0f) << 2) | (x & 3)]); + ++rgbi; + } + OUT(CGA_Composite_Table[((*rgbi & 0x0f) << 6) | (border << 2) | 3]); + for (x = 0; x < 5; ++x) + OUT(b[x & 3]); + + if ((cgamode & 4) != 0) { + /* Decode */ + i = temp + 5; + srgb = (Bit32u *) TempLine; + for (x2 = 0; x2 < blocks * 4; ++x2) { + int c = (i[0] + i[0]) << 3; + int d = (i[-1] + i[1]) << 3; + int y = ((c + d) << 8) + video_sharpness * (c - d); + ++i; + *srgb = byte_clamp(y) * 0x10101; + ++srgb; } - OUT(CGA_Composite_Table[((*rgbi & 0x0f)<<6) | (border<<2) | 3]); - for (x = 0; x < 5; ++x) - OUT(b[x&3]); - - if ((cgamode & 4) != 0) { - /* Decode */ - i = temp + 5; - srgb = (Bit32u *)TempLine; - for (x2 = 0; x2 < blocks*4; ++x2) { - int c = (i[0]+i[0])<<3; - int d = (i[-1]+i[1])<<3; - int y = ((c+d)<<8) + video_sharpness*(c-d); - ++i; - *srgb = byte_clamp(y)*0x10101; - ++srgb; - } + } else { + /* Store chroma */ + i = temp + 4; + ap = atemp + 1; + bp = btemp + 1; + for (x = -1; x < w + 1; ++x) { + ap[x] = i[-4] - ((i[-2] - i[0] + i[2]) << 1) + i[4]; + bp[x] = (i[-3] - i[-1] + i[1] - i[3]) << 1; + ++i; } - else { - /* Store chroma */ - i = temp + 4; - ap = atemp + 1; - bp = btemp + 1; - for (x = -1; x < w + 1; ++x) { - ap[x] = i[-4]-((i[-2]-i[0]+i[2])<<1)+i[4]; - bp[x] = (i[-3]-i[-1]+i[1]-i[3])<<1; - ++i; - } - /* Decode */ - i = temp + 5; - i[-1] = (i[-1]<<3) - ap[-1]; - i[0] = (i[0]<<3) - ap[0]; - srgb = (Bit32u *)TempLine; - for (x2 = 0; x2 < blocks; ++x2) { - int y,a,b,c,d,rr,gg,bb; - COMPOSITE_CONVERT(a, b); - COMPOSITE_CONVERT(-b, a); - COMPOSITE_CONVERT(-a, -b); - COMPOSITE_CONVERT(b, -a); - } + /* Decode */ + i = temp + 5; + i[-1] = (i[-1] << 3) - ap[-1]; + i[0] = (i[0] << 3) - ap[0]; + srgb = (Bit32u *) TempLine; + for (x2 = 0; x2 < blocks; ++x2) { + int y, a, b, c, d, rr, gg, bb; + COMPOSITE_CONVERT(a, b); + COMPOSITE_CONVERT(-b, a); + COMPOSITE_CONVERT(-a, -b); + COMPOSITE_CONVERT(b, -a); } + } #undef COMPOSITE_CONVERT #undef OUT - return TempLine; + return TempLine; } -void IncreaseHue(uint8_t cgamode) +void +IncreaseHue(uint8_t cgamode) { - hue_offset += 5.0; + hue_offset += 5.0; - update_cga16_color(cgamode); + update_cga16_color(cgamode); } -void DecreaseHue(uint8_t cgamode) +void +DecreaseHue(uint8_t cgamode) { - hue_offset -= 5.0; + hue_offset -= 5.0; - update_cga16_color(cgamode); + update_cga16_color(cgamode); } -void IncreaseSaturation(uint8_t cgamode) +void +IncreaseSaturation(uint8_t cgamode) { - saturation += 5; + saturation += 5; - update_cga16_color(cgamode); + update_cga16_color(cgamode); } -void DecreaseSaturation(uint8_t cgamode) +void +DecreaseSaturation(uint8_t cgamode) { - saturation -= 5; + saturation -= 5; - update_cga16_color(cgamode); + update_cga16_color(cgamode); } -void IncreaseContrast(uint8_t cgamode) +void +IncreaseContrast(uint8_t cgamode) { - contrast += 5; + contrast += 5; - update_cga16_color(cgamode); + update_cga16_color(cgamode); } -void DecreaseContrast(uint8_t cgamode) +void +DecreaseContrast(uint8_t cgamode) { - contrast -= 5; + contrast -= 5; - update_cga16_color(cgamode); + update_cga16_color(cgamode); } -void IncreaseBrightness(uint8_t cgamode) +void +IncreaseBrightness(uint8_t cgamode) { - brightness += 5; + brightness += 5; - update_cga16_color(cgamode); + update_cga16_color(cgamode); } -void DecreaseBrightness(uint8_t cgamode) +void +DecreaseBrightness(uint8_t cgamode) { - brightness -= 5; + brightness -= 5; - update_cga16_color(cgamode); + update_cga16_color(cgamode); } -void IncreaseSharpness(uint8_t cgamode) +void +IncreaseSharpness(uint8_t cgamode) { - sharpness += 10; + sharpness += 10; - update_cga16_color(cgamode); + update_cga16_color(cgamode); } -void DecreaseSharpness(uint8_t cgamode) +void +DecreaseSharpness(uint8_t cgamode) { - sharpness -= 10; + sharpness -= 10; - update_cga16_color(cgamode); + update_cga16_color(cgamode); } -void cga_comp_init(int revision) +void +cga_comp_init(int revision) { - new_cga = revision; + new_cga = revision; - /* Making sure this gets reset after reset. */ - brightness = 0; - contrast = 100; - saturation = 100; - sharpness = 0; - hue_offset = 0; + /* Making sure this gets reset after reset. */ + brightness = 0; + contrast = 100; + saturation = 100; + sharpness = 0; + hue_offset = 0; - update_cga16_color(0); + update_cga16_color(0); } diff --git a/src/video/vid_cl54xx.c b/src/video/vid_cl54xx.c index cea6ee807..16839d93a 100644 --- a/src/video/vid_cl54xx.c +++ b/src/video/vid_cl54xx.c @@ -40,63 +40,63 @@ #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> -#define BIOS_GD5401_PATH "roms/video/cirruslogic/avga1.rom" -#define BIOS_GD5402_PATH "roms/video/cirruslogic/avga2.rom" -#define BIOS_GD5402_ONBOARD_PATH "roms/machines/cmdsl386sx25/c000.rom" -#define BIOS_GD5420_PATH "roms/video/cirruslogic/5420.vbi" -#define BIOS_GD5422_PATH "roms/video/cirruslogic/cl5422.bin" -#define BIOS_GD5426_DIAMOND_A1_ISA_PATH "roms/video/cirruslogic/diamond5426.vbi" -#define BIOS_GD5426_MCA_PATH "roms/video/cirruslogic/Reply.BIN" -#define BIOS_GD5428_DIAMOND_B1_VLB_PATH "roms/video/cirruslogic/Diamond SpeedStar PRO VLB v3.04.bin" -#define BIOS_GD5428_ISA_PATH "roms/video/cirruslogic/5428.bin" -#define BIOS_GD5428_MCA_PATH "roms/video/cirruslogic/SVGA141.ROM" -#define BIOS_GD5428_PATH "roms/video/cirruslogic/vlbusjapan.BIN" -#define BIOS_GD5428_BOCA_ISA_PATH_1 "roms/video/cirruslogic/boca_gd5428_1.30b_1.bin" -#define BIOS_GD5428_BOCA_ISA_PATH_2 "roms/video/cirruslogic/boca_gd5428_1.30b_2.bin" -#define BIOS_GD5429_PATH "roms/video/cirruslogic/5429.vbi" -#define BIOS_GD5430_DIAMOND_A8_VLB_PATH "roms/video/cirruslogic/diamondvlbus.bin" -#define BIOS_GD5430_ORCHID_VLB_PATH "roms/video/cirruslogic/orchidvlbus.bin" -#define BIOS_GD5430_PATH "roms/video/cirruslogic/pci.bin" -#define BIOS_GD5434_DIAMOND_A3_ISA_PATH "roms/video/cirruslogic/Diamond Multimedia SpeedStar 64 v2.02 EPROM Backup from ST M27C256B-12F1.BIN" -#define BIOS_GD5434_PATH "roms/video/cirruslogic/gd5434.BIN" -#define BIOS_GD5436_PATH "roms/video/cirruslogic/5436.vbi" -#define BIOS_GD5440_PATH "roms/video/cirruslogic/BIOS.BIN" -#define BIOS_GD5446_PATH "roms/video/cirruslogic/5446bv.vbi" -#define BIOS_GD5446_STB_PATH "roms/video/cirruslogic/stb nitro64v.BIN" -#define BIOS_GD5480_PATH "roms/video/cirruslogic/clgd5480.rom" +#define BIOS_GD5401_PATH "roms/video/cirruslogic/avga1.rom" +#define BIOS_GD5402_PATH "roms/video/cirruslogic/avga2.rom" +#define BIOS_GD5402_ONBOARD_PATH "roms/machines/cmdsl386sx25/c000.rom" +#define BIOS_GD5420_PATH "roms/video/cirruslogic/5420.vbi" +#define BIOS_GD5422_PATH "roms/video/cirruslogic/cl5422.bin" +#define BIOS_GD5426_DIAMOND_A1_ISA_PATH "roms/video/cirruslogic/diamond5426.vbi" +#define BIOS_GD5426_MCA_PATH "roms/video/cirruslogic/Reply.BIN" +#define BIOS_GD5428_DIAMOND_B1_VLB_PATH "roms/video/cirruslogic/Diamond SpeedStar PRO VLB v3.04.bin" +#define BIOS_GD5428_ISA_PATH "roms/video/cirruslogic/5428.bin" +#define BIOS_GD5428_MCA_PATH "roms/video/cirruslogic/SVGA141.ROM" +#define BIOS_GD5428_PATH "roms/video/cirruslogic/vlbusjapan.BIN" +#define BIOS_GD5428_BOCA_ISA_PATH_1 "roms/video/cirruslogic/boca_gd5428_1.30b_1.bin" +#define BIOS_GD5428_BOCA_ISA_PATH_2 "roms/video/cirruslogic/boca_gd5428_1.30b_2.bin" +#define BIOS_GD5429_PATH "roms/video/cirruslogic/5429.vbi" +#define BIOS_GD5430_DIAMOND_A8_VLB_PATH "roms/video/cirruslogic/diamondvlbus.bin" +#define BIOS_GD5430_ORCHID_VLB_PATH "roms/video/cirruslogic/orchidvlbus.bin" +#define BIOS_GD5430_PATH "roms/video/cirruslogic/pci.bin" +#define BIOS_GD5434_DIAMOND_A3_ISA_PATH "roms/video/cirruslogic/Diamond Multimedia SpeedStar 64 v2.02 EPROM Backup from ST M27C256B-12F1.BIN" +#define BIOS_GD5434_PATH "roms/video/cirruslogic/gd5434.BIN" +#define BIOS_GD5436_PATH "roms/video/cirruslogic/5436.vbi" +#define BIOS_GD5440_PATH "roms/video/cirruslogic/BIOS.BIN" +#define BIOS_GD5446_PATH "roms/video/cirruslogic/5446bv.vbi" +#define BIOS_GD5446_STB_PATH "roms/video/cirruslogic/stb nitro64v.BIN" +#define BIOS_GD5480_PATH "roms/video/cirruslogic/clgd5480.rom" -#define CIRRUS_ID_CLGD5401 0x88 -#define CIRRUS_ID_CLGD5402 0x89 -#define CIRRUS_ID_CLGD5420 0x8a -#define CIRRUS_ID_CLGD5422 0x8c -#define CIRRUS_ID_CLGD5424 0x94 -#define CIRRUS_ID_CLGD5426 0x90 -#define CIRRUS_ID_CLGD5428 0x98 -#define CIRRUS_ID_CLGD5429 0x9c -#define CIRRUS_ID_CLGD5430 0xa0 -#define CIRRUS_ID_CLGD5432 0xa2 -#define CIRRUS_ID_CLGD5434_4 0xa4 -#define CIRRUS_ID_CLGD5434 0xa8 -#define CIRRUS_ID_CLGD5436 0xac -#define CIRRUS_ID_CLGD5440 0xa0 /* Yes, the 5440 has the same ID as the 5430. */ -#define CIRRUS_ID_CLGD5446 0xb8 -#define CIRRUS_ID_CLGD5480 0xbc +#define CIRRUS_ID_CLGD5401 0x88 +#define CIRRUS_ID_CLGD5402 0x89 +#define CIRRUS_ID_CLGD5420 0x8a +#define CIRRUS_ID_CLGD5422 0x8c +#define CIRRUS_ID_CLGD5424 0x94 +#define CIRRUS_ID_CLGD5426 0x90 +#define CIRRUS_ID_CLGD5428 0x98 +#define CIRRUS_ID_CLGD5429 0x9c +#define CIRRUS_ID_CLGD5430 0xa0 +#define CIRRUS_ID_CLGD5432 0xa2 +#define CIRRUS_ID_CLGD5434_4 0xa4 +#define CIRRUS_ID_CLGD5434 0xa8 +#define CIRRUS_ID_CLGD5436 0xac +#define CIRRUS_ID_CLGD5440 0xa0 /* Yes, the 5440 has the same ID as the 5430. */ +#define CIRRUS_ID_CLGD5446 0xb8 +#define CIRRUS_ID_CLGD5480 0xbc /* sequencer 0x07 */ -#define CIRRUS_SR7_BPP_VGA 0x00 -#define CIRRUS_SR7_BPP_SVGA 0x01 -#define CIRRUS_SR7_BPP_MASK 0x0e -#define CIRRUS_SR7_BPP_8 0x00 -#define CIRRUS_SR7_BPP_16_DOUBLEVCLK 0x02 -#define CIRRUS_SR7_BPP_24 0x04 -#define CIRRUS_SR7_BPP_16 0x06 -#define CIRRUS_SR7_BPP_32 0x08 -#define CIRRUS_SR7_ISAADDR_MASK 0xe0 +#define CIRRUS_SR7_BPP_VGA 0x00 +#define CIRRUS_SR7_BPP_SVGA 0x01 +#define CIRRUS_SR7_BPP_MASK 0x0e +#define CIRRUS_SR7_BPP_8 0x00 +#define CIRRUS_SR7_BPP_16_DOUBLEVCLK 0x02 +#define CIRRUS_SR7_BPP_24 0x04 +#define CIRRUS_SR7_BPP_16 0x06 +#define CIRRUS_SR7_BPP_32 0x08 +#define CIRRUS_SR7_ISAADDR_MASK 0xe0 /* sequencer 0x12 */ -#define CIRRUS_CURSOR_SHOW 0x01 -#define CIRRUS_CURSOR_HIDDENPEL 0x02 -#define CIRRUS_CURSOR_LARGE 0x04 /* 64x64 if set, 32x32 if clear */ +#define CIRRUS_CURSOR_SHOW 0x01 +#define CIRRUS_CURSOR_HIDDENPEL 0x02 +#define CIRRUS_CURSOR_LARGE 0x04 /* 64x64 if set, 32x32 if clear */ /* sequencer 0x17 */ #define CIRRUS_BUSTYPE_VLBFAST 0x10 @@ -104,34 +104,34 @@ #define CIRRUS_BUSTYPE_VLBSLOW 0x30 #define CIRRUS_BUSTYPE_ISA 0x38 #define CIRRUS_MMIO_ENABLE 0x04 -#define CIRRUS_MMIO_USE_PCIADDR 0x40 /* 0xb8000 if cleared. */ +#define CIRRUS_MMIO_USE_PCIADDR 0x40 /* 0xb8000 if cleared. */ #define CIRRUS_MEMSIZEEXT_DOUBLE 0x80 /* control 0x0b */ -#define CIRRUS_BANKING_DUAL 0x01 -#define CIRRUS_BANKING_GRANULARITY_16K 0x20 /* set:16k, clear:4k */ +#define CIRRUS_BANKING_DUAL 0x01 +#define CIRRUS_BANKING_GRANULARITY_16K 0x20 /* set:16k, clear:4k */ /* control 0x30 */ -#define CIRRUS_BLTMODE_BACKWARDS 0x01 -#define CIRRUS_BLTMODE_MEMSYSDEST 0x02 -#define CIRRUS_BLTMODE_MEMSYSSRC 0x04 -#define CIRRUS_BLTMODE_TRANSPARENTCOMP 0x08 -#define CIRRUS_BLTMODE_PATTERNCOPY 0x40 -#define CIRRUS_BLTMODE_COLOREXPAND 0x80 -#define CIRRUS_BLTMODE_PIXELWIDTHMASK 0x30 -#define CIRRUS_BLTMODE_PIXELWIDTH8 0x00 -#define CIRRUS_BLTMODE_PIXELWIDTH16 0x10 -#define CIRRUS_BLTMODE_PIXELWIDTH24 0x20 -#define CIRRUS_BLTMODE_PIXELWIDTH32 0x30 +#define CIRRUS_BLTMODE_BACKWARDS 0x01 +#define CIRRUS_BLTMODE_MEMSYSDEST 0x02 +#define CIRRUS_BLTMODE_MEMSYSSRC 0x04 +#define CIRRUS_BLTMODE_TRANSPARENTCOMP 0x08 +#define CIRRUS_BLTMODE_PATTERNCOPY 0x40 +#define CIRRUS_BLTMODE_COLOREXPAND 0x80 +#define CIRRUS_BLTMODE_PIXELWIDTHMASK 0x30 +#define CIRRUS_BLTMODE_PIXELWIDTH8 0x00 +#define CIRRUS_BLTMODE_PIXELWIDTH16 0x10 +#define CIRRUS_BLTMODE_PIXELWIDTH24 0x20 +#define CIRRUS_BLTMODE_PIXELWIDTH32 0x30 /* control 0x31 */ -#define CIRRUS_BLT_BUSY 0x01 -#define CIRRUS_BLT_START 0x02 -#define CIRRUS_BLT_RESET 0x04 -#define CIRRUS_BLT_FIFOUSED 0x10 -#define CIRRUS_BLT_PAUSED 0x20 -#define CIRRUS_BLT_APERTURE2 0x40 -#define CIRRUS_BLT_AUTOSTART 0x80 +#define CIRRUS_BLT_BUSY 0x01 +#define CIRRUS_BLT_START 0x02 +#define CIRRUS_BLT_RESET 0x04 +#define CIRRUS_BLT_FIFOUSED 0x10 +#define CIRRUS_BLT_PAUSED 0x20 +#define CIRRUS_BLT_APERTURE2 0x40 +#define CIRRUS_BLT_AUTOSTART 0x80 /* control 0x33 */ #define CIRRUS_BLTMODEEXT_BACKGROUNDONLY 0x08 @@ -139,104 +139,101 @@ #define CIRRUS_BLTMODEEXT_COLOREXPINV 0x02 #define CIRRUS_BLTMODEEXT_DWORDGRANULARITY 0x01 -#define CL_GD5428_SYSTEM_BUS_MCA 5 -#define CL_GD5428_SYSTEM_BUS_VESA 6 -#define CL_GD5428_SYSTEM_BUS_ISA 7 +#define CL_GD5428_SYSTEM_BUS_MCA 5 +#define CL_GD5428_SYSTEM_BUS_VESA 6 +#define CL_GD5428_SYSTEM_BUS_ISA 7 -#define CL_GD5429_SYSTEM_BUS_VESA 5 -#define CL_GD5429_SYSTEM_BUS_ISA 7 +#define CL_GD5429_SYSTEM_BUS_VESA 5 +#define CL_GD5429_SYSTEM_BUS_ISA 7 -#define CL_GD543X_SYSTEM_BUS_PCI 4 -#define CL_GD543X_SYSTEM_BUS_VESA 6 -#define CL_GD543X_SYSTEM_BUS_ISA 7 +#define CL_GD543X_SYSTEM_BUS_PCI 4 +#define CL_GD543X_SYSTEM_BUS_VESA 6 +#define CL_GD543X_SYSTEM_BUS_ISA 7 -typedef struct gd54xx_t -{ - mem_mapping_t mmio_mapping; - mem_mapping_t linear_mapping; - mem_mapping_t aperture2_mapping; - mem_mapping_t vgablt_mapping; +typedef struct gd54xx_t { + mem_mapping_t mmio_mapping; + mem_mapping_t linear_mapping; + mem_mapping_t aperture2_mapping; + mem_mapping_t vgablt_mapping; - svga_t svga; + svga_t svga; - int has_bios, rev, - bit32; - rom_t bios_rom; + int has_bios, rev, + bit32; + rom_t bios_rom; - uint32_t vram_size; - uint32_t vram_mask; + uint32_t vram_size; + uint32_t vram_mask; - uint8_t vclk_n[4]; - uint8_t vclk_d[4]; + uint8_t vclk_n[4]; + uint8_t vclk_d[4]; struct { - uint8_t state; - int ctrl; + uint8_t state; + int ctrl; } ramdac; struct { - uint16_t width, height; - uint16_t dst_pitch, src_pitch; - uint16_t trans_col, trans_mask; - uint16_t height_internal; - uint16_t msd_buf_pos, msd_buf_cnt; + uint16_t width, height; + uint16_t dst_pitch, src_pitch; + uint16_t trans_col, trans_mask; + uint16_t height_internal; + uint16_t msd_buf_pos, msd_buf_cnt; - uint8_t status; - uint8_t mask, mode, rop, modeext; - uint8_t ms_is_dest, msd_buf[32]; + uint8_t status; + uint8_t mask, mode, rop, modeext; + uint8_t ms_is_dest, msd_buf[32]; - uint32_t fg_col, bg_col; - uint32_t dst_addr_backup, src_addr_backup; - uint32_t dst_addr, src_addr; - uint32_t sys_src32, sys_cnt; + uint32_t fg_col, bg_col; + uint32_t dst_addr_backup, src_addr_backup; + uint32_t dst_addr, src_addr; + uint32_t sys_src32, sys_cnt; - /* Internal state */ - int pixel_width, pattern_x; - int x_count, y_count; - int xx_count, dir; - int unlock_special; + /* Internal state */ + int pixel_width, pattern_x; + int x_count, y_count; + int xx_count, dir; + int unlock_special; } blt; struct { - int mode; - uint16_t stride, r1sz, r1adjust, r2sz, - r2adjust, r2sdz, wvs, wve, - hzoom, vzoom; - uint8_t occlusion, colorkeycomparemask, - colorkeycompare; - int region1size, region2size, - colorkeymode; - uint32_t ck; + int mode; + uint16_t stride, r1sz, r1adjust, r2sz, + r2adjust, r2sdz, wvs, wve, + hzoom, vzoom; + uint8_t occlusion, colorkeycomparemask, + colorkeycompare; + int region1size, region2size, + colorkeymode; + uint32_t ck; } overlay; - int pci, vlb, mca, countminusone; - int vblank_irq, vportsync; + int pci, vlb, mca, countminusone; + int vblank_irq, vportsync; - uint8_t pci_regs[256]; - uint8_t int_line, unlocked, status, extensions; - uint8_t crtcreg_mask; + uint8_t pci_regs[256]; + uint8_t int_line, unlocked, status, extensions; + uint8_t crtcreg_mask; - uint8_t fc; /* Feature Connector */ + uint8_t fc; /* Feature Connector */ - int card, id; + int card, id; - uint8_t pos_regs[8]; + uint8_t pos_regs[8]; - uint32_t lfb_base, vgablt_base; + uint32_t lfb_base, vgablt_base; - int mmio_vram_overlap; + int mmio_vram_overlap; - uint32_t extpallook[256]; - PALETTE extpal; + uint32_t extpallook[256]; + PALETTE extpal; - void *i2c, *ddc; + void *i2c, *ddc; } gd54xx_t; - -static video_timings_t timing_gd54xx_isa = {VIDEO_ISA, 3, 3, 6, 8, 8, 12}; -static video_timings_t timing_gd54xx_vlb = {VIDEO_BUS, 4, 4, 8, 10, 10, 20}; -static video_timings_t timing_gd54xx_pci = {VIDEO_PCI, 4, 4, 8, 10, 10, 20}; - +static video_timings_t timing_gd54xx_isa = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 8, .read_w = 8, .read_l = 12 }; +static video_timings_t timing_gd54xx_vlb = { .type = VIDEO_BUS, .write_b = 4, .write_w = 4, .write_l = 8, .read_b = 10, .read_w = 10, .read_l = 20 }; +static video_timings_t timing_gd54xx_pci = { .type = VIDEO_PCI, .write_b = 4, .write_w = 4, .write_l = 8, .read_b = 10, .read_w = 10, .read_l = 20 }; static void gd543x_mmio_write(uint32_t addr, uint8_t val, void *p); @@ -264,225 +261,207 @@ gd54xx_reset_blit(gd54xx_t *gd54xx); static void gd54xx_start_blit(uint32_t cpu_dat, uint32_t count, gd54xx_t *gd54xx, svga_t *svga); +#define CLAMP(x) \ + do { \ + if ((x) & ~0xff) \ + x = ((x) < 0) ? 0 : 0xff; \ + } while (0) -#define CLAMP(x) do \ - { \ - if ((x) & ~0xff) \ - x = ((x) < 0) ? 0 : 0xff; \ - } \ - while (0) - -#define DECODE_YCbCr() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 2; c++) \ - { \ - uint8_t y1, y2; \ - int8_t Cr, Cb; \ - int dR, dG, dB; \ - \ - y1 = src[0]; \ - Cr = src[1] - 0x80; \ - y2 = src[2]; \ - Cb = src[3] - 0x80; \ - src += 4; \ - \ - dR = (359*Cr) >> 8; \ - dG = (88*Cb + 183*Cr) >> 8; \ - dB = (453*Cb) >> 8; \ - \ - r[x_write] = y1 + dR; \ - CLAMP(r[x_write]); \ - g[x_write] = y1 - dG; \ - CLAMP(g[x_write]); \ - b[x_write] = y1 + dB; \ - CLAMP(b[x_write]); \ - \ - r[x_write+1] = y2 + dR; \ - CLAMP(r[x_write+1]); \ - g[x_write+1] = y2 - dG; \ - CLAMP(g[x_write+1]); \ - b[x_write+1] = y2 + dB; \ - CLAMP(b[x_write+1]); \ - \ - x_write = (x_write + 2) & 7; \ - } \ - } while (0) +#define DECODE_YCbCr() \ + do { \ + int c; \ + \ + for (c = 0; c < 2; c++) { \ + uint8_t y1, y2; \ + int8_t Cr, Cb; \ + int dR, dG, dB; \ + \ + y1 = src[0]; \ + Cr = src[1] - 0x80; \ + y2 = src[2]; \ + Cb = src[3] - 0x80; \ + src += 4; \ + \ + dR = (359 * Cr) >> 8; \ + dG = (88 * Cb + 183 * Cr) >> 8; \ + dB = (453 * Cb) >> 8; \ + \ + r[x_write] = y1 + dR; \ + CLAMP(r[x_write]); \ + g[x_write] = y1 - dG; \ + CLAMP(g[x_write]); \ + b[x_write] = y1 + dB; \ + CLAMP(b[x_write]); \ + \ + r[x_write + 1] = y2 + dR; \ + CLAMP(r[x_write + 1]); \ + g[x_write + 1] = y2 - dG; \ + CLAMP(g[x_write + 1]); \ + b[x_write + 1] = y2 + dB; \ + CLAMP(b[x_write + 1]); \ + \ + x_write = (x_write + 2) & 7; \ + } \ + } while (0) /*Both YUV formats are untested*/ -#define DECODE_YUV211() \ - do \ - { \ - uint8_t y1, y2, y3, y4; \ - int8_t U, V; \ - int dR, dG, dB; \ - \ - U = src[0] - 0x80; \ - y1 = (298 * (src[1] - 16)) >> 8; \ - y2 = (298 * (src[2] - 16)) >> 8; \ - V = src[3] - 0x80; \ - y3 = (298 * (src[4] - 16)) >> 8; \ - y4 = (298 * (src[5] - 16)) >> 8; \ - src += 6; \ - \ - dR = (309*V) >> 8; \ - dG = (100*U + 208*V) >> 8; \ - dB = (516*U) >> 8; \ - \ - r[x_write] = y1 + dR; \ - CLAMP(r[x_write]); \ - g[x_write] = y1 - dG; \ - CLAMP(g[x_write]); \ - b[x_write] = y1 + dB; \ - CLAMP(b[x_write]); \ - \ - r[x_write+1] = y2 + dR; \ - CLAMP(r[x_write+1]); \ - g[x_write+1] = y2 - dG; \ - CLAMP(g[x_write+1]); \ - b[x_write+1] = y2 + dB; \ - CLAMP(b[x_write+1]); \ - \ - r[x_write+2] = y3 + dR; \ - CLAMP(r[x_write+2]); \ - g[x_write+2] = y3 - dG; \ - CLAMP(g[x_write+2]); \ - b[x_write+2] = y3 + dB; \ - CLAMP(b[x_write+2]); \ - \ - r[x_write+3] = y4 + dR; \ - CLAMP(r[x_write+3]); \ - g[x_write+3] = y4 - dG; \ - CLAMP(g[x_write+3]); \ - b[x_write+3] = y4 + dB; \ - CLAMP(b[x_write+3]); \ - \ - x_write = (x_write + 4) & 7; \ - } while (0) +#define DECODE_YUV211() \ + do { \ + uint8_t y1, y2, y3, y4; \ + int8_t U, V; \ + int dR, dG, dB; \ + \ + U = src[0] - 0x80; \ + y1 = (298 * (src[1] - 16)) >> 8; \ + y2 = (298 * (src[2] - 16)) >> 8; \ + V = src[3] - 0x80; \ + y3 = (298 * (src[4] - 16)) >> 8; \ + y4 = (298 * (src[5] - 16)) >> 8; \ + src += 6; \ + \ + dR = (309 * V) >> 8; \ + dG = (100 * U + 208 * V) >> 8; \ + dB = (516 * U) >> 8; \ + \ + r[x_write] = y1 + dR; \ + CLAMP(r[x_write]); \ + g[x_write] = y1 - dG; \ + CLAMP(g[x_write]); \ + b[x_write] = y1 + dB; \ + CLAMP(b[x_write]); \ + \ + r[x_write + 1] = y2 + dR; \ + CLAMP(r[x_write + 1]); \ + g[x_write + 1] = y2 - dG; \ + CLAMP(g[x_write + 1]); \ + b[x_write + 1] = y2 + dB; \ + CLAMP(b[x_write + 1]); \ + \ + r[x_write + 2] = y3 + dR; \ + CLAMP(r[x_write + 2]); \ + g[x_write + 2] = y3 - dG; \ + CLAMP(g[x_write + 2]); \ + b[x_write + 2] = y3 + dB; \ + CLAMP(b[x_write + 2]); \ + \ + r[x_write + 3] = y4 + dR; \ + CLAMP(r[x_write + 3]); \ + g[x_write + 3] = y4 - dG; \ + CLAMP(g[x_write + 3]); \ + b[x_write + 3] = y4 + dB; \ + CLAMP(b[x_write + 3]); \ + \ + x_write = (x_write + 4) & 7; \ + } while (0) -#define DECODE_YUV422() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 2; c++) \ - { \ - uint8_t y1, y2; \ - int8_t U, V; \ - int dR, dG, dB; \ - \ - U = src[0] - 0x80; \ - y1 = (298 * (src[1] - 16)) >> 8; \ - V = src[2] - 0x80; \ - y2 = (298 * (src[3] - 16)) >> 8; \ - src += 4; \ - \ - dR = (309*V) >> 8; \ - dG = (100*U + 208*V) >> 8; \ - dB = (516*U) >> 8; \ - \ - r[x_write] = y1 + dR; \ - CLAMP(r[x_write]); \ - g[x_write] = y1 - dG; \ - CLAMP(g[x_write]); \ - b[x_write] = y1 + dB; \ - CLAMP(b[x_write]); \ - \ - r[x_write+1] = y2 + dR; \ - CLAMP(r[x_write+1]); \ - g[x_write+1] = y2 - dG; \ - CLAMP(g[x_write+1]); \ - b[x_write+1] = y2 + dB; \ - CLAMP(b[x_write+1]); \ - \ - x_write = (x_write + 2) & 7; \ - } \ - } while (0) +#define DECODE_YUV422() \ + do { \ + int c; \ + \ + for (c = 0; c < 2; c++) { \ + uint8_t y1, y2; \ + int8_t U, V; \ + int dR, dG, dB; \ + \ + U = src[0] - 0x80; \ + y1 = (298 * (src[1] - 16)) >> 8; \ + V = src[2] - 0x80; \ + y2 = (298 * (src[3] - 16)) >> 8; \ + src += 4; \ + \ + dR = (309 * V) >> 8; \ + dG = (100 * U + 208 * V) >> 8; \ + dB = (516 * U) >> 8; \ + \ + r[x_write] = y1 + dR; \ + CLAMP(r[x_write]); \ + g[x_write] = y1 - dG; \ + CLAMP(g[x_write]); \ + b[x_write] = y1 + dB; \ + CLAMP(b[x_write]); \ + \ + r[x_write + 1] = y2 + dR; \ + CLAMP(r[x_write + 1]); \ + g[x_write + 1] = y2 - dG; \ + CLAMP(g[x_write + 1]); \ + b[x_write + 1] = y2 + dB; \ + CLAMP(b[x_write + 1]); \ + \ + x_write = (x_write + 2) & 7; \ + } \ + } while (0) -#define DECODE_RGB555() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 4; c++) \ - { \ - uint16_t dat; \ - \ - dat = *(uint16_t *)src; \ - src += 2; \ - \ - r[x_write + c] = ((dat & 0x001f) << 3) | ((dat & 0x001f) >> 2); \ - g[x_write + c] = ((dat & 0x03e0) >> 2) | ((dat & 0x03e0) >> 7); \ - b[x_write + c] = ((dat & 0x7c00) >> 7) | ((dat & 0x7c00) >> 12); \ - } \ - x_write = (x_write + 4) & 7; \ - } while (0) +#define DECODE_RGB555() \ + do { \ + int c; \ + \ + for (c = 0; c < 4; c++) { \ + uint16_t dat; \ + \ + dat = *(uint16_t *) src; \ + src += 2; \ + \ + r[x_write + c] = ((dat & 0x001f) << 3) | ((dat & 0x001f) >> 2); \ + g[x_write + c] = ((dat & 0x03e0) >> 2) | ((dat & 0x03e0) >> 7); \ + b[x_write + c] = ((dat & 0x7c00) >> 7) | ((dat & 0x7c00) >> 12); \ + } \ + x_write = (x_write + 4) & 7; \ + } while (0) -#define DECODE_RGB565() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 4; c++) \ - { \ - uint16_t dat; \ - \ - dat = *(uint16_t *)src; \ - src += 2; \ - \ - r[x_write + c] = ((dat & 0x001f) << 3) | ((dat & 0x001f) >> 2); \ - g[x_write + c] = ((dat & 0x07e0) >> 3) | ((dat & 0x07e0) >> 9); \ - b[x_write + c] = ((dat & 0xf800) >> 8) | ((dat & 0xf800) >> 13); \ - } \ - x_write = (x_write + 4) & 7; \ - } while (0) +#define DECODE_RGB565() \ + do { \ + int c; \ + \ + for (c = 0; c < 4; c++) { \ + uint16_t dat; \ + \ + dat = *(uint16_t *) src; \ + src += 2; \ + \ + r[x_write + c] = ((dat & 0x001f) << 3) | ((dat & 0x001f) >> 2); \ + g[x_write + c] = ((dat & 0x07e0) >> 3) | ((dat & 0x07e0) >> 9); \ + b[x_write + c] = ((dat & 0xf800) >> 8) | ((dat & 0xf800) >> 13); \ + } \ + x_write = (x_write + 4) & 7; \ + } while (0) -#define DECODE_CLUT() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 4; c++) \ - { \ - uint8_t dat; \ - \ - dat = *(uint8_t *)src; \ - src++; \ - \ - r[x_write + c] = svga->pallook[dat] >> 0; \ - g[x_write + c] = svga->pallook[dat] >> 8; \ - b[x_write + c] = svga->pallook[dat] >> 16; \ - } \ - x_write = (x_write + 4) & 7; \ - } while (0) - - - -#define OVERLAY_SAMPLE() \ - do \ - { \ - switch (gd54xx->overlay.mode) \ - { \ - case 0: \ - DECODE_YUV422(); \ - break; \ - case 2: \ - DECODE_CLUT(); \ - break; \ - case 3: \ - DECODE_YUV211(); \ - break; \ - case 4: \ - DECODE_RGB555(); \ - break; \ - case 5: \ - DECODE_RGB565(); \ - break; \ - } \ - } while (0) +#define DECODE_CLUT() \ + do { \ + int c; \ + \ + for (c = 0; c < 4; c++) { \ + uint8_t dat; \ + \ + dat = *(uint8_t *) src; \ + src++; \ + \ + r[x_write + c] = svga->pallook[dat] >> 0; \ + g[x_write + c] = svga->pallook[dat] >> 8; \ + b[x_write + c] = svga->pallook[dat] >> 16; \ + } \ + x_write = (x_write + 4) & 7; \ + } while (0) +#define OVERLAY_SAMPLE() \ + do { \ + switch (gd54xx->overlay.mode) { \ + case 0: \ + DECODE_YUV422(); \ + break; \ + case 2: \ + DECODE_CLUT(); \ + break; \ + case 3: \ + DECODE_YUV211(); \ + break; \ + case 4: \ + DECODE_RGB555(); \ + break; \ + case 5: \ + DECODE_RGB565(); \ + break; \ + } \ + } while (0) static int gd54xx_interrupt_enabled(gd54xx_t *gd54xx) @@ -490,22 +469,19 @@ gd54xx_interrupt_enabled(gd54xx_t *gd54xx) return !gd54xx->pci || (gd54xx->svga.gdcreg[0x17] & 0x04); } - static int gd54xx_vga_vsync_enabled(gd54xx_t *gd54xx) { - if (!(gd54xx->svga.crtc[0x11] & 0x20) && (gd54xx->svga.crtc[0x11] & 0x10) && - gd54xx_interrupt_enabled(gd54xx)) + if (!(gd54xx->svga.crtc[0x11] & 0x20) && (gd54xx->svga.crtc[0x11] & 0x10) && gd54xx_interrupt_enabled(gd54xx)) return 1; return 0; } - static void gd54xx_update_irqs(gd54xx_t *gd54xx) { if (!gd54xx->pci) - return; + return; if ((gd54xx->vblank_irq > 0) && gd54xx_vga_vsync_enabled(gd54xx)) pci_set_irq(gd54xx->card, PCI_INTA); @@ -513,94 +489,89 @@ gd54xx_update_irqs(gd54xx_t *gd54xx) pci_clear_irq(gd54xx->card, PCI_INTA); } - static void gd54xx_vblank_start(svga_t *svga) { - gd54xx_t *gd54xx = (gd54xx_t*) svga->p; + gd54xx_t *gd54xx = (gd54xx_t *) svga->p; if (gd54xx->vblank_irq >= 0) { gd54xx->vblank_irq = 1; gd54xx_update_irqs(gd54xx); } } - /* Returns 1 if the card is a 5422+ */ static int gd54xx_is_5422(svga_t *svga) { if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422) - return 1; + return 1; else - return 0; + return 0; } - static void gd54xx_overlay_draw(svga_t *svga, int displine) { gd54xx_t *gd54xx = (gd54xx_t *) svga->p; - int shift = (svga->crtc[0x27] >= CIRRUS_ID_CLGD5446) ? 2 : 0; - int h_acc = svga->overlay_latch.h_acc; - int r[8], g[8], b[8]; - int x_read = 4, x_write = 4; - int x; + int shift = (svga->crtc[0x27] >= CIRRUS_ID_CLGD5446) ? 2 : 0; + int h_acc = svga->overlay_latch.h_acc; + int r[8], g[8], b[8]; + int x_read = 4, x_write = 4; + int x; uint32_t *p; - uint8_t *src = &svga->vram[(svga->overlay_latch.addr << shift) & svga->vram_mask]; - int bpp = svga->bpp; - int bytesperpix = (bpp + 7) / 8; - uint8_t *src2 = &svga->vram[(svga->ma - (svga->hdisp * bytesperpix)) & svga->vram_display_mask]; - int occl, ckval; + uint8_t *src = &svga->vram[(svga->overlay_latch.addr << shift) & svga->vram_mask]; + int bpp = svga->bpp; + int bytesperpix = (bpp + 7) / 8; + uint8_t *src2 = &svga->vram[(svga->ma - (svga->hdisp * bytesperpix)) & svga->vram_display_mask]; + int occl, ckval; - p = &((uint32_t *)buffer32->line[displine])[gd54xx->overlay.region1size + svga->x_add]; + p = &((uint32_t *) buffer32->line[displine])[gd54xx->overlay.region1size + svga->x_add]; src2 += gd54xx->overlay.region1size * bytesperpix; OVERLAY_SAMPLE(); - for (x = 0; (x < gd54xx->overlay.region2size) && - ((x + gd54xx->overlay.region1size) < svga->hdisp); x++) { - if (gd54xx->overlay.occlusion) { - occl = 1; - ckval = gd54xx->overlay.ck; - if (bytesperpix == 1) { - if (*src2 == ckval) - occl = 0; - } else if (bytesperpix == 2) { - if (*((uint16_t*)src2) == ckval) - occl = 0; - } else - occl = 0; - if (!occl) - *p++ = r[x_read] | (g[x_read] << 8) | (b[x_read] << 16); - src2 += bytesperpix; - } else - *p++ = r[x_read] | (g[x_read] << 8) | (b[x_read] << 16); + for (x = 0; (x < gd54xx->overlay.region2size) && ((x + gd54xx->overlay.region1size) < svga->hdisp); x++) { + if (gd54xx->overlay.occlusion) { + occl = 1; + ckval = gd54xx->overlay.ck; + if (bytesperpix == 1) { + if (*src2 == ckval) + occl = 0; + } else if (bytesperpix == 2) { + if (*((uint16_t *) src2) == ckval) + occl = 0; + } else + occl = 0; + if (!occl) + *p++ = r[x_read] | (g[x_read] << 8) | (b[x_read] << 16); + src2 += bytesperpix; + } else + *p++ = r[x_read] | (g[x_read] << 8) | (b[x_read] << 16); - h_acc += gd54xx->overlay.hzoom; - if (h_acc >= 256) { - if ((x_read ^ (x_read + 1)) & ~3) - OVERLAY_SAMPLE(); - x_read = (x_read + 1) & 7; + h_acc += gd54xx->overlay.hzoom; + if (h_acc >= 256) { + if ((x_read ^ (x_read + 1)) & ~3) + OVERLAY_SAMPLE(); + x_read = (x_read + 1) & 7; - h_acc -= 256; - } + h_acc -= 256; + } } svga->overlay_latch.v_acc += gd54xx->overlay.vzoom; if (svga->overlay_latch.v_acc >= 256) { - svga->overlay_latch.v_acc -= 256; - svga->overlay_latch.addr += svga->overlay.pitch << 1; + svga->overlay_latch.v_acc -= 256; + svga->overlay_latch.addr += svga->overlay.pitch << 1; } } - static void gd54xx_update_overlay(gd54xx_t *gd54xx) { svga_t *svga = &gd54xx->svga; - int bpp = svga->bpp; + int bpp = svga->bpp; - svga->overlay.cur_ysize = gd54xx->overlay.wve - gd54xx->overlay.wvs + 1; + svga->overlay.cur_ysize = gd54xx->overlay.wve - gd54xx->overlay.wvs + 1; gd54xx->overlay.region1size = 32 * gd54xx->overlay.r1sz / bpp + (gd54xx->overlay.r1adjust * 8 / bpp); gd54xx->overlay.region2size = 32 * gd54xx->overlay.r2sz / bpp + (gd54xx->overlay.r2adjust * 8 / bpp); @@ -608,1051 +579,1058 @@ gd54xx_update_overlay(gd54xx_t *gd54xx) /* Mask and chroma key ignored. */ if (gd54xx->overlay.colorkeymode == 0) - gd54xx->overlay.ck = gd54xx->overlay.colorkeycompare; + gd54xx->overlay.ck = gd54xx->overlay.colorkeycompare; else if (gd54xx->overlay.colorkeymode == 1) - gd54xx->overlay.ck = gd54xx->overlay.colorkeycompare | (gd54xx->overlay.colorkeycomparemask << 8); + gd54xx->overlay.ck = gd54xx->overlay.colorkeycompare | (gd54xx->overlay.colorkeycomparemask << 8); else - gd54xx->overlay.occlusion = 0; + gd54xx->overlay.occlusion = 0; } - /* Returns 1 if the card supports the 8-bpp/16-bpp transparency color or mask. */ static int gd54xx_has_transp(svga_t *svga, int mask) { - if (((svga->crtc[0x27] == CIRRUS_ID_CLGD5446) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5480)) && - !mask) - return 1; /* 5446 and 5480 have mask but not transparency. */ + if (((svga->crtc[0x27] == CIRRUS_ID_CLGD5446) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5480)) && !mask) + return 1; /* 5446 and 5480 have mask but not transparency. */ if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5426) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5428)) - return 1; /* 5426 and 5428 have both. */ + return 1; /* 5426 and 5428 have both. */ else - return 0; /* The rest have neither. */ + return 0; /* The rest have neither. */ } - /* Returns 1 if the card is a 5434, 5436/46, or 5480. */ static int gd54xx_is_5434(svga_t *svga) { if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5434) - return 1; + return 1; else - return 0; + return 0; } - static void gd54xx_out(uint16_t addr, uint8_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; - uint8_t old; - int c; - uint8_t o, index; - uint32_t o32; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; + uint8_t old; + int c; + uint8_t o, index; + uint32_t o32; if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; + addr ^= 0x60; switch (addr) { - case 0x3c0: - case 0x3c1: - if (!svga->attrff) { - svga->attraddr = val & 31; - if ((val & 0x20) != svga->attr_palette_enable) { - svga->fullchange = 3; - svga->attr_palette_enable = val & 0x20; - svga_recalctimings(svga); - } - } else { - o = svga->attrregs[svga->attraddr & 31]; - svga->attrregs[svga->attraddr & 31] = val; - if (svga->attraddr < 16) - svga->fullchange = changeframecount; - if (svga->attraddr == 0x10 || svga->attraddr == 0x14 || svga->attraddr < 0x10) { - for (c = 0; c < 16; c++) { - if (svga->attrregs[0x10] & 0x80) svga->egapal[c] = (svga->attrregs[c] & 0xf) | ((svga->attrregs[0x14] & 0xf) << 4); - else svga->egapal[c] = (svga->attrregs[c] & 0x3f) | ((svga->attrregs[0x14] & 0xc) << 4); - } - } - /* Recalculate timings on change of attribute register 0x11 (overscan border color) too. */ - if (svga->attraddr == 0x10) { - if (o != val) - svga_recalctimings(svga); - } else if (svga->attraddr == 0x11) { - if (!(svga->seqregs[0x12] & 0x80)) { - svga->overscan_color = svga->pallook[svga->attrregs[0x11]]; - if (o != val) svga_recalctimings(svga); - } - } else if (svga->attraddr == 0x12) { - if ((val & 0xf) != svga->plane_mask) - svga->fullchange = changeframecount; - svga->plane_mask = val & 0xf; - } - } - svga->attrff ^= 1; + case 0x3c0: + case 0x3c1: + if (!svga->attrff) { + svga->attraddr = val & 31; + if ((val & 0x20) != svga->attr_palette_enable) { + svga->fullchange = 3; + svga->attr_palette_enable = val & 0x20; + svga_recalctimings(svga); + } + } else { + o = svga->attrregs[svga->attraddr & 31]; + svga->attrregs[svga->attraddr & 31] = val; + if (svga->attraddr < 16) + svga->fullchange = changeframecount; + if (svga->attraddr == 0x10 || svga->attraddr == 0x14 || svga->attraddr < 0x10) { + for (c = 0; c < 16; c++) { + if (svga->attrregs[0x10] & 0x80) + svga->egapal[c] = (svga->attrregs[c] & 0xf) | ((svga->attrregs[0x14] & 0xf) << 4); + else + svga->egapal[c] = (svga->attrregs[c] & 0x3f) | ((svga->attrregs[0x14] & 0xc) << 4); + } + } + /* Recalculate timings on change of attribute register 0x11 (overscan border color) too. */ + if (svga->attraddr == 0x10) { + if (o != val) + svga_recalctimings(svga); + } else if (svga->attraddr == 0x11) { + if (!(svga->seqregs[0x12] & 0x80)) { + svga->overscan_color = svga->pallook[svga->attrregs[0x11]]; + if (o != val) + svga_recalctimings(svga); + } + } else if (svga->attraddr == 0x12) { + if ((val & 0xf) != svga->plane_mask) + svga->fullchange = changeframecount; + svga->plane_mask = val & 0xf; + } + } + svga->attrff ^= 1; + return; + + case 0x3c4: + svga->seqaddr = val; + break; + case 0x3c5: + if ((svga->seqaddr == 2) && !gd54xx->unlocked) { + o = svga->seqregs[svga->seqaddr & 0x1f]; + svga_out(addr, val, svga); + svga->seqregs[svga->seqaddr & 0x1f] = (o & 0xf0) | (val & 0x0f); + return; + } else if ((svga->seqaddr > 6) && !gd54xx->unlocked) return; - case 0x3c4: - svga->seqaddr = val; - break; - case 0x3c5: - if ((svga->seqaddr == 2) && !gd54xx->unlocked) { - o = svga->seqregs[svga->seqaddr & 0x1f]; - svga_out(addr, val, svga); - svga->seqregs[svga->seqaddr & 0x1f] = (o & 0xf0) | (val & 0x0f); - return; - } else if ((svga->seqaddr > 6) && !gd54xx->unlocked) - return; + if (svga->seqaddr > 5) { + o = svga->seqregs[svga->seqaddr & 0x1f]; + svga->seqregs[svga->seqaddr & 0x1f] = val; + switch (svga->seqaddr) { + case 6: + val &= 0x17; + if (val == 0x12) + svga->seqregs[6] = 0x12; + else + svga->seqregs[6] = 0x0f; + if (svga->crtc[0x27] < CIRRUS_ID_CLGD5429) + gd54xx->unlocked = (svga->seqregs[6] == 0x12); + break; + case 0x08: + if (gd54xx->i2c) + i2c_gpio_set(gd54xx->i2c, !!(val & 0x01), !!(val & 0x02)); + break; + case 0x0b: + case 0x0c: + case 0x0d: + case 0x0e: /* VCLK stuff */ + gd54xx->vclk_n[svga->seqaddr - 0x0b] = val; + break; + case 0x1b: + case 0x1c: + case 0x1d: + case 0x1e: /* VCLK stuff */ + gd54xx->vclk_d[svga->seqaddr - 0x1b] = val; + break; + case 0x10: + case 0x30: + case 0x50: + case 0x70: + case 0x90: + case 0xb0: + case 0xd0: + case 0xf0: + svga->hwcursor.x = (val << 3) | (svga->seqaddr >> 5); + break; + case 0x11: + case 0x31: + case 0x51: + case 0x71: + case 0x91: + case 0xb1: + case 0xd1: + case 0xf1: + svga->hwcursor.y = (val << 3) | (svga->seqaddr >> 5); + break; + case 0x12: + svga->ext_overscan = !!(val & 0x80); + if (svga->ext_overscan && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5426)) + svga->overscan_color = gd54xx->extpallook[2]; + else + svga->overscan_color = svga->pallook[svga->attrregs[0x11]]; + svga_recalctimings(svga); + svga->hwcursor.ena = val & CIRRUS_CURSOR_SHOW; + if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422) + svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((val & CIRRUS_CURSOR_LARGE) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422)) ? 64 : 32; + else + svga->hwcursor.cur_xsize = 32; - if (svga->seqaddr > 5) { - o = svga->seqregs[svga->seqaddr & 0x1f]; - svga->seqregs[svga->seqaddr & 0x1f] = val; - switch (svga->seqaddr) { - case 6: - val &= 0x17; - if (val == 0x12) - svga->seqregs[6] = 0x12; - else - svga->seqregs[6] = 0x0f; - if (svga->crtc[0x27] < CIRRUS_ID_CLGD5429) - gd54xx->unlocked = (svga->seqregs[6] == 0x12); - break; - case 0x08: - if (gd54xx->i2c) - i2c_gpio_set(gd54xx->i2c, !!(val & 0x01), !!(val & 0x02)); - break; - case 0x0b: case 0x0c: case 0x0d: case 0x0e: /* VCLK stuff */ - gd54xx->vclk_n[svga->seqaddr-0x0b] = val; - break; - case 0x1b: case 0x1c: case 0x1d: case 0x1e: /* VCLK stuff */ - gd54xx->vclk_d[svga->seqaddr-0x1b] = val; - break; - case 0x10: case 0x30: case 0x50: case 0x70: - case 0x90: case 0xb0: case 0xd0: case 0xf0: - svga->hwcursor.x = (val << 3) | (svga->seqaddr >> 5); - break; - case 0x11: case 0x31: case 0x51: case 0x71: - case 0x91: case 0xb1: case 0xd1: case 0xf1: - svga->hwcursor.y = (val << 3) | (svga->seqaddr >> 5); - break; - case 0x12: - svga->ext_overscan = !!(val & 0x80); - if (svga->ext_overscan && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5426)) - svga->overscan_color = gd54xx->extpallook[2]; - else - svga->overscan_color = svga->pallook[svga->attrregs[0x11]]; - svga_recalctimings(svga); - svga->hwcursor.ena = val & CIRRUS_CURSOR_SHOW; - if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422) - svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = - ((val & CIRRUS_CURSOR_LARGE) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422)) ? 64 : 32; - else - svga->hwcursor.cur_xsize = 32; - - if ((svga->seqregs[0x12] & CIRRUS_CURSOR_LARGE) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422)) - svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) + ((svga->seqregs[0x13] & 0x3c) * 256)); - else - svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) + ((svga->seqregs[0x13] & 0x3f) * 256)); - break; - case 0x13: - if ((svga->seqregs[0x12] & CIRRUS_CURSOR_LARGE) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422)) - svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) + ((val & 0x3c) * 256)); - else - svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) + ((val & 0x3f) * 256)); - break; - case 0x07: - svga->packed_chain4 = svga->seqregs[7] & 1; - svga_recalctimings(svga); - if (gd54xx_is_5422(svga)) - gd543x_recalc_mapping(gd54xx); - else - svga->seqregs[svga->seqaddr] &= 0x0f; - if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429) - svga->set_reset_disabled = svga->seqregs[7] & 1; - break; - case 0x17: - if (gd54xx_is_5422(svga)) - gd543x_recalc_mapping(gd54xx); - else - return; - break; - } - return; - } - break; - case 0x3c6: - if (!gd54xx->unlocked) - break; - if (gd54xx->ramdac.state == 4) { - gd54xx->ramdac.state = 0; - gd54xx->ramdac.ctrl = val; - svga_recalctimings(svga); - return; - } - gd54xx->ramdac.state = 0; - break; - case 0x3c7: case 0x3c8: - gd54xx->ramdac.state = 0; - break; - case 0x3c9: - gd54xx->ramdac.state = 0; - svga->dac_status = 0; - svga->fullchange = changeframecount; - switch (svga->dac_pos) { - case 0: - svga->dac_r = val; - svga->dac_pos++; - break; - case 1: - svga->dac_g = val; - svga->dac_pos++; - break; - case 2: - index = svga->dac_addr & 0xff; - if (svga->seqregs[0x12] & 2) { - index &= 0x0f; - gd54xx->extpal[index].r = svga->dac_r; - gd54xx->extpal[index].g = svga->dac_g; - gd54xx->extpal[index].b = val; - gd54xx->extpallook[index] = makecol32(video_6to8[gd54xx->extpal[index].r & 0x3f], video_6to8[gd54xx->extpal[index].g & 0x3f], video_6to8[gd54xx->extpal[index].b & 0x3f]); - if (svga->ext_overscan && (index == 2)) { - o32 = svga->overscan_color; - svga->overscan_color = gd54xx->extpallook[2]; - if (o32 != svga->overscan_color) - svga_recalctimings(svga); - } - } else { - svga->vgapal[index].r = svga->dac_r; - svga->vgapal[index].g = svga->dac_g; - svga->vgapal[index].b = val; - svga->pallook[index] = makecol32(video_6to8[svga->vgapal[index].r & 0x3f], video_6to8[svga->vgapal[index].g & 0x3f], video_6to8[svga->vgapal[index].b & 0x3f]); - } - svga->dac_addr = (svga->dac_addr + 1) & 255; - svga->dac_pos = 0; + if ((svga->seqregs[0x12] & CIRRUS_CURSOR_LARGE) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422)) + svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) + ((svga->seqregs[0x13] & 0x3c) * 256)); + else + svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) + ((svga->seqregs[0x13] & 0x3f) * 256)); + break; + case 0x13: + if ((svga->seqregs[0x12] & CIRRUS_CURSOR_LARGE) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5422)) + svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) + ((val & 0x3c) * 256)); + else + svga->hwcursor.addr = ((gd54xx->vram_size - 0x4000) + ((val & 0x3f) * 256)); + break; + case 0x07: + svga->packed_chain4 = svga->seqregs[7] & 1; + svga_recalctimings(svga); + if (gd54xx_is_5422(svga)) + gd543x_recalc_mapping(gd54xx); + else + svga->seqregs[svga->seqaddr] &= 0x0f; + if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429) + svga->set_reset_disabled = svga->seqregs[7] & 1; + break; + case 0x17: + if (gd54xx_is_5422(svga)) + gd543x_recalc_mapping(gd54xx); + else + return; break; } return; - case 0x3ce: - /* Per the CL-GD 5446 manual: bits 0-5 are the GDC register index, bits 6-7 are reserved. */ - svga->gdcaddr = val/* & 0x3f*/; - return; - case 0x3cf: - if ((svga->gdcaddr > 0x1f) && ((svga->crtc[0x27] <= CIRRUS_ID_CLGD5422) || - (svga->crtc[0x27] == CIRRUS_ID_CLGD5424))) - return; - - o = svga->gdcreg[svga->gdcaddr]; - - if ((svga->gdcaddr < 2) && !gd54xx->unlocked) - svga->gdcreg[svga->gdcaddr] = (svga->gdcreg[svga->gdcaddr] & 0xf0) | (val & 0x0f); - else if ((svga->gdcaddr <= 8) || gd54xx->unlocked) - svga->gdcreg[svga->gdcaddr] = val; - - if (svga->gdcaddr <= 8) { - switch (svga->gdcaddr) { - case 0: - gd543x_mmio_write(0xb8000, val, gd54xx); - break; - case 1: - gd543x_mmio_write(0xb8004, val, gd54xx); - break; - case 2: - svga->colourcompare = val; - break; - case 4: - svga->readplane = val & 3; - break; - case 5: - if (svga->gdcreg[0xb] & 0x04) - svga->writemode = val & 7; - else - svga->writemode = val & 3; - svga->readmode = val & 8; - svga->chain2_read = val & 0x10; - break; - case 6: - if ((o ^ val) & 0x0c) - gd543x_recalc_mapping(gd54xx); - break; - case 7: - svga->colournocare = val; - break; - } - - if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5422) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5424)) - svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) && - !svga->gdcreg[1]) && ((svga->chain4 && svga->packed_chain4) || svga->fb_only) && !(svga->adv_flags & FLAG_ADDR_BY8); /*TODO: needs verification on other Cirrus chips*/ - else - svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) && - !svga->gdcreg[1]) && ((svga->chain4 && svga->packed_chain4) || svga->fb_only); - if (((svga->gdcaddr == 5) && ((val ^ o) & 0x70)) || - ((svga->gdcaddr == 6) && ((val ^ o) & 1))) - svga_recalctimings(svga); - } else { - switch (svga->gdcaddr) { - case 0x09: case 0x0a: case 0x0b: - if (svga->gdcreg[0xb] & 0x04) - svga->writemode = svga->gdcreg[5] & 7; - else - svga->writemode = svga->gdcreg[5] & 3; - svga->adv_flags = 0; - if (svga->gdcreg[0xb] & 0x01) - svga->adv_flags = FLAG_EXTRA_BANKS; - if (svga->gdcreg[0xb] & 0x02) - svga->adv_flags |= FLAG_ADDR_BY8; - if (svga->gdcreg[0xb] & 0x04) - svga->adv_flags |= FLAG_EXT_WRITE; - if (svga->gdcreg[0xb] & 0x08) - svga->adv_flags |= FLAG_LATCH8; - if (svga->gdcreg[0xb] & 0x10) - svga->adv_flags |= FLAG_ADDR_BY16; - gd54xx_recalc_banking(gd54xx); - break; - - case 0x0c: - gd54xx->overlay.colorkeycompare = val; - gd54xx_update_overlay(gd54xx); - break; - case 0x0d: - gd54xx->overlay.colorkeycomparemask = val; - gd54xx_update_overlay(gd54xx); - break; - - case 0x0e: - if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429) { - svga->dpms = (val & 0x06) && ((svga->miscout & ((val & 0x06) << 5)) != 0xc0); - svga_recalctimings(svga); - } - break; - - case 0x10: - gd543x_mmio_write(0xb8001, val, gd54xx); - break; - case 0x11: - gd543x_mmio_write(0xb8005, val, gd54xx); - break; - case 0x12: - gd543x_mmio_write(0xb8002, val, gd54xx); - break; - case 0x13: - gd543x_mmio_write(0xb8006, val, gd54xx); - break; - case 0x14: - gd543x_mmio_write(0xb8003, val, gd54xx); - break; - case 0x15: - gd543x_mmio_write(0xb8007, val, gd54xx); - break; - - case 0x20: - gd543x_mmio_write(0xb8008, val, gd54xx); - break; - case 0x21: - gd543x_mmio_write(0xb8009, val, gd54xx); - break; - case 0x22: - gd543x_mmio_write(0xb800a, val, gd54xx); - break; - case 0x23: - gd543x_mmio_write(0xb800b, val, gd54xx); - break; - case 0x24: - gd543x_mmio_write(0xb800c, val, gd54xx); - break; - case 0x25: - gd543x_mmio_write(0xb800d, val, gd54xx); - break; - case 0x26: - gd543x_mmio_write(0xb800e, val, gd54xx); - break; - case 0x27: - gd543x_mmio_write(0xb800f, val, gd54xx); - break; - - case 0x28: - gd543x_mmio_write(0xb8010, val, gd54xx); - break; - case 0x29: - gd543x_mmio_write(0xb8011, val, gd54xx); - break; - case 0x2a: - gd543x_mmio_write(0xb8012, val, gd54xx); - break; - - case 0x2c: - gd543x_mmio_write(0xb8014, val, gd54xx); - break; - case 0x2d: - gd543x_mmio_write(0xb8015, val, gd54xx); - break; - case 0x2e: - gd543x_mmio_write(0xb8016, val, gd54xx); - break; - - case 0x2f: - gd543x_mmio_write(0xb8017, val, gd54xx); - break; - case 0x30: - gd543x_mmio_write(0xb8018, val, gd54xx); - break; - - case 0x32: - gd543x_mmio_write(0xb801a, val, gd54xx); - break; - - case 0x33: - gd543x_mmio_write(0xb801b, val, gd54xx); - break; - - case 0x31: - gd543x_mmio_write(0xb8040, val, gd54xx); - break; - - case 0x34: - gd543x_mmio_write(0xb801c, val, gd54xx); - break; - - case 0x35: - gd543x_mmio_write(0xb801d, val, gd54xx); - break; - - case 0x38: - gd543x_mmio_write(0xb8020, val, gd54xx); - break; - - case 0x39: - gd543x_mmio_write(0xb8021, val, gd54xx); - break; - } - } - return; - - case 0x3d4: - svga->crtcreg = val & gd54xx->crtcreg_mask; - return; - case 0x3d5: - if (((svga->crtcreg == 0x19) || (svga->crtcreg == 0x1a) || - (svga->crtcreg == 0x1b) || (svga->crtcreg == 0x1d) || - (svga->crtcreg == 0x25) || (svga->crtcreg == 0x27)) && - !gd54xx->unlocked) - return; - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - old = svga->crtc[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; - - if (svga->crtcreg == 0x11) { - if (!(val & 0x10)) { - if (gd54xx->vblank_irq > 0) - gd54xx->vblank_irq = -1; - } else if (gd54xx->vblank_irq < 0) - gd54xx->vblank_irq = 0; - gd54xx_update_irqs(gd54xx); - if ((val & ~0x30) == (old & ~0x30)) - old = val; - } - - if (old != val) { - /* Overlay registers */ - switch (svga->crtcreg) { - case 0x1d: - if (((old >> 3) & 7) != ((val >> 3) & 7)) { - gd54xx->overlay.colorkeymode = (val >> 3) & 7; - gd54xx_update_overlay(gd54xx); - } - break; - case 0x31: - gd54xx->overlay.hzoom = val == 0 ? 256 : val; - gd54xx_update_overlay(gd54xx); - break; - case 0x32: - gd54xx->overlay.vzoom = val == 0 ? 256 : val; - gd54xx_update_overlay(gd54xx); - break; - case 0x33: - gd54xx->overlay.r1sz &= ~0xff; - gd54xx->overlay.r1sz |= val; - gd54xx_update_overlay(gd54xx); - break; - case 0x34: - gd54xx->overlay.r2sz &= ~0xff; - gd54xx->overlay.r2sz |= val; - gd54xx_update_overlay(gd54xx); - break; - case 0x35: - gd54xx->overlay.r2sdz &= ~0xff; - gd54xx->overlay.r2sdz |= val; - gd54xx_update_overlay(gd54xx); - break; - case 0x36: - gd54xx->overlay.r1sz &= 0xff; - gd54xx->overlay.r1sz |= (val << 8) & 0x300; - gd54xx->overlay.r2sz &= 0xff; - gd54xx->overlay.r2sz |= (val << 6) & 0x300; - gd54xx->overlay.r2sdz &= 0xff; - gd54xx->overlay.r2sdz |= (val << 4) & 0x300; - gd54xx_update_overlay(gd54xx); - break; - case 0x37: - gd54xx->overlay.wvs &= ~0xff; - gd54xx->overlay.wvs |= val; - svga->overlay.y = gd54xx->overlay.wvs; - break; - case 0x38: - gd54xx->overlay.wve &= ~0xff; - gd54xx->overlay.wve |= val; - gd54xx_update_overlay(gd54xx); - break; - case 0x39: - gd54xx->overlay.wvs &= 0xff; - gd54xx->overlay.wvs |= (val << 8) & 0x300; - gd54xx->overlay.wve &= 0xff; - gd54xx->overlay.wve |= (val << 6) & 0x300; - gd54xx_update_overlay(gd54xx); - break; - case 0x3a: - svga->overlay.addr &= ~0xff; - svga->overlay.addr |= val; - gd54xx_update_overlay(gd54xx); - break; - case 0x3b: - svga->overlay.addr &= ~0xff00; - svga->overlay.addr |= val << 8; - gd54xx_update_overlay(gd54xx); - break; - case 0x3c: - svga->overlay.addr &= ~0x0f0000; - svga->overlay.addr |= (val << 16) & 0x0f0000; - svga->overlay.pitch &= ~0x100; - svga->overlay.pitch |= (val & 0x20) << 3; - gd54xx_update_overlay(gd54xx); - break; - case 0x3d: - svga->overlay.pitch &= ~0xff; - svga->overlay.pitch |= val; - gd54xx_update_overlay(gd54xx); - break; - case 0x3e: - gd54xx->overlay.mode = (val >> 1) & 7; - svga->overlay.ena = (val & 1) != 0; - gd54xx_update_overlay(gd54xx); - break; - } - - if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) - { - if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } + } + break; + case 0x3c6: + if (!gd54xx->unlocked) + break; + if (gd54xx->ramdac.state == 4) { + gd54xx->ramdac.state = 0; + gd54xx->ramdac.ctrl = val; + svga_recalctimings(svga); + return; + } + gd54xx->ramdac.state = 0; + break; + case 0x3c7: + case 0x3c8: + gd54xx->ramdac.state = 0; + break; + case 0x3c9: + gd54xx->ramdac.state = 0; + svga->dac_status = 0; + svga->fullchange = changeframecount; + switch (svga->dac_pos) { + case 0: + svga->dac_r = val; + svga->dac_pos++; + break; + case 1: + svga->dac_g = val; + svga->dac_pos++; + break; + case 2: + index = svga->dac_addr & 0xff; + if (svga->seqregs[0x12] & 2) { + index &= 0x0f; + gd54xx->extpal[index].r = svga->dac_r; + gd54xx->extpal[index].g = svga->dac_g; + gd54xx->extpal[index].b = val; + gd54xx->extpallook[index] = makecol32(video_6to8[gd54xx->extpal[index].r & 0x3f], video_6to8[gd54xx->extpal[index].g & 0x3f], video_6to8[gd54xx->extpal[index].b & 0x3f]); + if (svga->ext_overscan && (index == 2)) { + o32 = svga->overscan_color; + svga->overscan_color = gd54xx->extpallook[2]; + if (o32 != svga->overscan_color) + svga_recalctimings(svga); } - } - break; + } else { + svga->vgapal[index].r = svga->dac_r; + svga->vgapal[index].g = svga->dac_g; + svga->vgapal[index].b = val; + svga->pallook[index] = makecol32(video_6to8[svga->vgapal[index].r & 0x3f], video_6to8[svga->vgapal[index].g & 0x3f], video_6to8[svga->vgapal[index].b & 0x3f]); + } + svga->dac_addr = (svga->dac_addr + 1) & 255; + svga->dac_pos = 0; + break; + } + return; + case 0x3ce: + /* Per the CL-GD 5446 manual: bits 0-5 are the GDC register index, bits 6-7 are reserved. */ + svga->gdcaddr = val /* & 0x3f*/; + return; + case 0x3cf: + if ((svga->gdcaddr > 0x1f) && ((svga->crtc[0x27] <= CIRRUS_ID_CLGD5422) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5424))) + return; + + o = svga->gdcreg[svga->gdcaddr]; + + if ((svga->gdcaddr < 2) && !gd54xx->unlocked) + svga->gdcreg[svga->gdcaddr] = (svga->gdcreg[svga->gdcaddr] & 0xf0) | (val & 0x0f); + else if ((svga->gdcaddr <= 8) || gd54xx->unlocked) + svga->gdcreg[svga->gdcaddr] = val; + + if (svga->gdcaddr <= 8) { + switch (svga->gdcaddr) { + case 0: + gd543x_mmio_write(0xb8000, val, gd54xx); + break; + case 1: + gd543x_mmio_write(0xb8004, val, gd54xx); + break; + case 2: + svga->colourcompare = val; + break; + case 4: + svga->readplane = val & 3; + break; + case 5: + if (svga->gdcreg[0xb] & 0x04) + svga->writemode = val & 7; + else + svga->writemode = val & 3; + svga->readmode = val & 8; + svga->chain2_read = val & 0x10; + break; + case 6: + if ((o ^ val) & 0x0c) + gd543x_recalc_mapping(gd54xx); + break; + case 7: + svga->colournocare = val; + break; + } + + if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5422) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5424)) + svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) && !svga->gdcreg[1]) && ((svga->chain4 && svga->packed_chain4) || svga->fb_only) && !(svga->adv_flags & FLAG_ADDR_BY8); /*TODO: needs verification on other Cirrus chips*/ + else + svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) && !svga->gdcreg[1]) && ((svga->chain4 && svga->packed_chain4) || svga->fb_only); + if (((svga->gdcaddr == 5) && ((val ^ o) & 0x70)) || ((svga->gdcaddr == 6) && ((val ^ o) & 1))) + svga_recalctimings(svga); + } else { + switch (svga->gdcaddr) { + case 0x09: + case 0x0a: + case 0x0b: + if (svga->gdcreg[0xb] & 0x04) + svga->writemode = svga->gdcreg[5] & 7; + else + svga->writemode = svga->gdcreg[5] & 3; + svga->adv_flags = 0; + if (svga->gdcreg[0xb] & 0x01) + svga->adv_flags = FLAG_EXTRA_BANKS; + if (svga->gdcreg[0xb] & 0x02) + svga->adv_flags |= FLAG_ADDR_BY8; + if (svga->gdcreg[0xb] & 0x04) + svga->adv_flags |= FLAG_EXT_WRITE; + if (svga->gdcreg[0xb] & 0x08) + svga->adv_flags |= FLAG_LATCH8; + if (svga->gdcreg[0xb] & 0x10) + svga->adv_flags |= FLAG_ADDR_BY16; + gd54xx_recalc_banking(gd54xx); + break; + + case 0x0c: + gd54xx->overlay.colorkeycompare = val; + gd54xx_update_overlay(gd54xx); + break; + case 0x0d: + gd54xx->overlay.colorkeycomparemask = val; + gd54xx_update_overlay(gd54xx); + break; + + case 0x0e: + if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429) { + svga->dpms = (val & 0x06) && ((svga->miscout & ((val & 0x06) << 5)) != 0xc0); + svga_recalctimings(svga); + } + break; + + case 0x10: + gd543x_mmio_write(0xb8001, val, gd54xx); + break; + case 0x11: + gd543x_mmio_write(0xb8005, val, gd54xx); + break; + case 0x12: + gd543x_mmio_write(0xb8002, val, gd54xx); + break; + case 0x13: + gd543x_mmio_write(0xb8006, val, gd54xx); + break; + case 0x14: + gd543x_mmio_write(0xb8003, val, gd54xx); + break; + case 0x15: + gd543x_mmio_write(0xb8007, val, gd54xx); + break; + + case 0x20: + gd543x_mmio_write(0xb8008, val, gd54xx); + break; + case 0x21: + gd543x_mmio_write(0xb8009, val, gd54xx); + break; + case 0x22: + gd543x_mmio_write(0xb800a, val, gd54xx); + break; + case 0x23: + gd543x_mmio_write(0xb800b, val, gd54xx); + break; + case 0x24: + gd543x_mmio_write(0xb800c, val, gd54xx); + break; + case 0x25: + gd543x_mmio_write(0xb800d, val, gd54xx); + break; + case 0x26: + gd543x_mmio_write(0xb800e, val, gd54xx); + break; + case 0x27: + gd543x_mmio_write(0xb800f, val, gd54xx); + break; + + case 0x28: + gd543x_mmio_write(0xb8010, val, gd54xx); + break; + case 0x29: + gd543x_mmio_write(0xb8011, val, gd54xx); + break; + case 0x2a: + gd543x_mmio_write(0xb8012, val, gd54xx); + break; + + case 0x2c: + gd543x_mmio_write(0xb8014, val, gd54xx); + break; + case 0x2d: + gd543x_mmio_write(0xb8015, val, gd54xx); + break; + case 0x2e: + gd543x_mmio_write(0xb8016, val, gd54xx); + break; + + case 0x2f: + gd543x_mmio_write(0xb8017, val, gd54xx); + break; + case 0x30: + gd543x_mmio_write(0xb8018, val, gd54xx); + break; + + case 0x32: + gd543x_mmio_write(0xb801a, val, gd54xx); + break; + + case 0x33: + gd543x_mmio_write(0xb801b, val, gd54xx); + break; + + case 0x31: + gd543x_mmio_write(0xb8040, val, gd54xx); + break; + + case 0x34: + gd543x_mmio_write(0xb801c, val, gd54xx); + break; + + case 0x35: + gd543x_mmio_write(0xb801d, val, gd54xx); + break; + + case 0x38: + gd543x_mmio_write(0xb8020, val, gd54xx); + break; + + case 0x39: + gd543x_mmio_write(0xb8021, val, gd54xx); + break; + } + } + return; + + case 0x3d4: + svga->crtcreg = val & gd54xx->crtcreg_mask; + return; + case 0x3d5: + if (((svga->crtcreg == 0x19) || (svga->crtcreg == 0x1a) || (svga->crtcreg == 0x1b) || (svga->crtcreg == 0x1d) || (svga->crtcreg == 0x25) || (svga->crtcreg == 0x27)) && !gd54xx->unlocked) + return; + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; + + if (svga->crtcreg == 0x11) { + if (!(val & 0x10)) { + if (gd54xx->vblank_irq > 0) + gd54xx->vblank_irq = -1; + } else if (gd54xx->vblank_irq < 0) + gd54xx->vblank_irq = 0; + gd54xx_update_irqs(gd54xx); + if ((val & ~0x30) == (old & ~0x30)) + old = val; + } + + if (old != val) { + /* Overlay registers */ + switch (svga->crtcreg) { + case 0x1d: + if (((old >> 3) & 7) != ((val >> 3) & 7)) { + gd54xx->overlay.colorkeymode = (val >> 3) & 7; + gd54xx_update_overlay(gd54xx); + } + break; + case 0x31: + gd54xx->overlay.hzoom = val == 0 ? 256 : val; + gd54xx_update_overlay(gd54xx); + break; + case 0x32: + gd54xx->overlay.vzoom = val == 0 ? 256 : val; + gd54xx_update_overlay(gd54xx); + break; + case 0x33: + gd54xx->overlay.r1sz &= ~0xff; + gd54xx->overlay.r1sz |= val; + gd54xx_update_overlay(gd54xx); + break; + case 0x34: + gd54xx->overlay.r2sz &= ~0xff; + gd54xx->overlay.r2sz |= val; + gd54xx_update_overlay(gd54xx); + break; + case 0x35: + gd54xx->overlay.r2sdz &= ~0xff; + gd54xx->overlay.r2sdz |= val; + gd54xx_update_overlay(gd54xx); + break; + case 0x36: + gd54xx->overlay.r1sz &= 0xff; + gd54xx->overlay.r1sz |= (val << 8) & 0x300; + gd54xx->overlay.r2sz &= 0xff; + gd54xx->overlay.r2sz |= (val << 6) & 0x300; + gd54xx->overlay.r2sdz &= 0xff; + gd54xx->overlay.r2sdz |= (val << 4) & 0x300; + gd54xx_update_overlay(gd54xx); + break; + case 0x37: + gd54xx->overlay.wvs &= ~0xff; + gd54xx->overlay.wvs |= val; + svga->overlay.y = gd54xx->overlay.wvs; + break; + case 0x38: + gd54xx->overlay.wve &= ~0xff; + gd54xx->overlay.wve |= val; + gd54xx_update_overlay(gd54xx); + break; + case 0x39: + gd54xx->overlay.wvs &= 0xff; + gd54xx->overlay.wvs |= (val << 8) & 0x300; + gd54xx->overlay.wve &= 0xff; + gd54xx->overlay.wve |= (val << 6) & 0x300; + gd54xx_update_overlay(gd54xx); + break; + case 0x3a: + svga->overlay.addr &= ~0xff; + svga->overlay.addr |= val; + gd54xx_update_overlay(gd54xx); + break; + case 0x3b: + svga->overlay.addr &= ~0xff00; + svga->overlay.addr |= val << 8; + gd54xx_update_overlay(gd54xx); + break; + case 0x3c: + svga->overlay.addr &= ~0x0f0000; + svga->overlay.addr |= (val << 16) & 0x0f0000; + svga->overlay.pitch &= ~0x100; + svga->overlay.pitch |= (val & 0x20) << 3; + gd54xx_update_overlay(gd54xx); + break; + case 0x3d: + svga->overlay.pitch &= ~0xff; + svga->overlay.pitch |= val; + gd54xx_update_overlay(gd54xx); + break; + case 0x3e: + gd54xx->overlay.mode = (val >> 1) & 7; + svga->overlay.ena = (val & 1) != 0; + gd54xx_update_overlay(gd54xx); + break; + } + + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + } + } + break; } svga_out(addr, val, svga); } - static uint8_t gd54xx_in(uint16_t addr, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; uint8_t index, ret = 0xff; if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; + addr ^= 0x60; switch (addr) { - case 0x3c2: - ret = svga_in(addr, svga); - ret |= gd54xx->vblank_irq > 0 ? 0x80 : 0x00; - break; + case 0x3c2: + ret = svga_in(addr, svga); + ret |= gd54xx->vblank_irq > 0 ? 0x80 : 0x00; + break; - case 0x3c4: - if (svga->seqregs[6] == 0x12) { - ret = svga->seqaddr; - if ((ret & 0x1e) == 0x10) { - if (ret & 1) - ret = ((svga->hwcursor.y & 7) << 5) | 0x11; - else - ret = ((svga->hwcursor.x & 7) << 5) | 0x10; - } - } else - ret = svga->seqaddr; - break; + case 0x3c4: + if (svga->seqregs[6] == 0x12) { + ret = svga->seqaddr; + if ((ret & 0x1e) == 0x10) { + if (ret & 1) + ret = ((svga->hwcursor.y & 7) << 5) | 0x11; + else + ret = ((svga->hwcursor.x & 7) << 5) | 0x10; + } + } else + ret = svga->seqaddr; + break; - case 0x3c5: - if ((svga->seqaddr == 2) && !gd54xx->unlocked) - ret = svga_in(addr, svga) & 0x0f; - else if ((svga->seqaddr > 6) && !gd54xx->unlocked) - ret = 0xff; - else if (svga->seqaddr > 5) { - ret = svga->seqregs[svga->seqaddr & 0x3f]; - switch (svga->seqaddr) { - case 6: - ret = svga->seqregs[6]; - break; - case 0x08: - if (gd54xx->i2c) { - ret &= 0x7b; - if (i2c_gpio_get_scl(gd54xx->i2c)) - ret |= 0x04; - if (i2c_gpio_get_sda(gd54xx->i2c)) - ret |= 0x80; - } - break; - case 0x0a: /*Scratch Pad 1 (Memory size for 5402/542x)*/ - ret = svga->seqregs[0x0a] & ~0x1a; - if (svga->crtc[0x27] == CIRRUS_ID_CLGD5402) { - ret |= 0x01; /*512K of memory*/ - } else if (svga->crtc[0x27] > CIRRUS_ID_CLGD5402) { - switch (gd54xx->vram_size >> 10) { - case 512: - ret |= 0x08; - break; - case 1024: - ret |= 0x10; - break; - case 2048: - ret |= 0x18; - break; - } - } - break; - case 0x0b: case 0x0c: case 0x0d: case 0x0e: - ret = gd54xx->vclk_n[svga->seqaddr-0x0b]; - break; - case 0x0f: /*DRAM control*/ - ret = svga->seqregs[0x0f] & ~0x98; - switch (gd54xx->vram_size >> 10) { - case 512: - ret |= 0x08; /*16-bit DRAM data bus width*/ - break; - case 1024: - ret |= 0x10; /*32-bit DRAM data bus width for 1M of memory*/ - break; - case 2048: - ret |= (gd54xx_is_5434(svga)) ? 0x98 : 0x18; /*32-bit (Pre-5434)/64-bit (5434 and up) DRAM data bus width for 2M of memory*/ - break; - case 4096: - ret |= 0x98; /*64-bit (5434 and up) DRAM data bus width for 4M of memory*/ - break; - } - break; - case 0x15: /*Scratch Pad 3 (Memory size for 543x)*/ - ret = svga->seqregs[0x15] & ~0x0f; - if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5430) { - switch (gd54xx->vram_size >> 20) { - case 1: - ret |= 0x02; - break; - case 2: - ret |= 0x03; - break; - case 4: - ret |= 0x04; - break; - } - } - break; - case 0x17: - ret = svga->seqregs[0x17] & ~(7 << 3); - if (svga->crtc[0x27] <= CIRRUS_ID_CLGD5429) { - if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5428) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5426)) { - if (gd54xx->vlb) - ret |= (CL_GD5428_SYSTEM_BUS_VESA << 3); - else if (gd54xx->mca) - ret |= (CL_GD5428_SYSTEM_BUS_MCA << 3); - else - ret |= (CL_GD5428_SYSTEM_BUS_ISA << 3); - } else { - if (gd54xx->vlb) - ret |= (CL_GD5429_SYSTEM_BUS_VESA << 3); - else - ret |= (CL_GD5429_SYSTEM_BUS_ISA << 3); - } - } else { - if (gd54xx->pci) - ret |= (CL_GD543X_SYSTEM_BUS_PCI << 3); - else if (gd54xx->vlb) - ret |= (CL_GD543X_SYSTEM_BUS_VESA << 3); - else - ret |= (CL_GD543X_SYSTEM_BUS_ISA << 3); - } - break; - case 0x18: - ret = svga->seqregs[0x18] & 0xfe; - break; - case 0x1b: case 0x1c: case 0x1d: case 0x1e: - ret = gd54xx->vclk_d[svga->seqaddr - 0x1b]; - break; - } - break; - } else - ret = svga_in(addr, svga); - break; - case 0x3c6: - if (!gd54xx->unlocked) - ret = svga_in(addr, svga); - else if (gd54xx->ramdac.state == 4) { - /* CL-GD 5428 does not lock the register when it's read. */ - if (svga->crtc[0x27] != CIRRUS_ID_CLGD5428) - gd54xx->ramdac.state = 0; - ret = gd54xx->ramdac.ctrl; - } else { - gd54xx->ramdac.state++; - if (gd54xx->ramdac.state == 4) - ret = gd54xx->ramdac.ctrl; - else - ret = svga_in(addr, svga); - } - break; - case 0x3c7: case 0x3c8: - gd54xx->ramdac.state = 0; - ret = svga_in(addr, svga); - break; - case 0x3c9: - gd54xx->ramdac.state = 0; - svga->dac_status = 3; - index = (svga->dac_addr - 1) & 0xff; - if (svga->seqregs[0x12] & 2) - index &= 0x0f; - switch (svga->dac_pos) { - case 0: - svga->dac_pos++; - if (svga->seqregs[0x12] & 2) - ret = gd54xx->extpal[index].r & 0x3f; - else - ret = svga->vgapal[index].r & 0x3f; - break; - case 1: - svga->dac_pos++; - if (svga->seqregs[0x12] & 2) - ret = gd54xx->extpal[index].g & 0x3f; - else - ret = svga->vgapal[index].g & 0x3f; - break; - case 2: - svga->dac_pos=0; - svga->dac_addr = (svga->dac_addr + 1) & 255; - if (svga->seqregs[0x12] & 2) - ret = gd54xx->extpal[index].b & 0x3f; - else - ret = svga->vgapal[index].b & 0x3f; - break; + case 0x3c5: + if ((svga->seqaddr == 2) && !gd54xx->unlocked) + ret = svga_in(addr, svga) & 0x0f; + else if ((svga->seqaddr > 6) && !gd54xx->unlocked) + ret = 0xff; + else if (svga->seqaddr > 5) { + ret = svga->seqregs[svga->seqaddr & 0x3f]; + switch (svga->seqaddr) { + case 6: + ret = svga->seqregs[6]; + break; + case 0x08: + if (gd54xx->i2c) { + ret &= 0x7b; + if (i2c_gpio_get_scl(gd54xx->i2c)) + ret |= 0x04; + if (i2c_gpio_get_sda(gd54xx->i2c)) + ret |= 0x80; + } + break; + case 0x0a: /*Scratch Pad 1 (Memory size for 5402/542x)*/ + ret = svga->seqregs[0x0a] & ~0x1a; + if (svga->crtc[0x27] == CIRRUS_ID_CLGD5402) { + ret |= 0x01; /*512K of memory*/ + } else if (svga->crtc[0x27] > CIRRUS_ID_CLGD5402) { + switch (gd54xx->vram_size >> 10) { + case 512: + ret |= 0x08; + break; + case 1024: + ret |= 0x10; + break; + case 2048: + ret |= 0x18; + break; + } + } + break; + case 0x0b: + case 0x0c: + case 0x0d: + case 0x0e: + ret = gd54xx->vclk_n[svga->seqaddr - 0x0b]; + break; + case 0x0f: /*DRAM control*/ + ret = svga->seqregs[0x0f] & ~0x98; + switch (gd54xx->vram_size >> 10) { + case 512: + ret |= 0x08; /*16-bit DRAM data bus width*/ + break; + case 1024: + ret |= 0x10; /*32-bit DRAM data bus width for 1M of memory*/ + break; + case 2048: + ret |= (gd54xx_is_5434(svga)) ? 0x98 : 0x18; /*32-bit (Pre-5434)/64-bit (5434 and up) DRAM data bus width for 2M of memory*/ + break; + case 4096: + ret |= 0x98; /*64-bit (5434 and up) DRAM data bus width for 4M of memory*/ + break; + } + break; + case 0x15: /*Scratch Pad 3 (Memory size for 543x)*/ + ret = svga->seqregs[0x15] & ~0x0f; + if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5430) { + switch (gd54xx->vram_size >> 20) { + case 1: + ret |= 0x02; + break; + case 2: + ret |= 0x03; + break; + case 4: + ret |= 0x04; + break; + } + } + break; + case 0x17: + ret = svga->seqregs[0x17] & ~(7 << 3); + if (svga->crtc[0x27] <= CIRRUS_ID_CLGD5429) { + if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5428) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5426)) { + if (gd54xx->vlb) + ret |= (CL_GD5428_SYSTEM_BUS_VESA << 3); + else if (gd54xx->mca) + ret |= (CL_GD5428_SYSTEM_BUS_MCA << 3); + else + ret |= (CL_GD5428_SYSTEM_BUS_ISA << 3); + } else { + if (gd54xx->vlb) + ret |= (CL_GD5429_SYSTEM_BUS_VESA << 3); + else + ret |= (CL_GD5429_SYSTEM_BUS_ISA << 3); + } + } else { + if (gd54xx->pci) + ret |= (CL_GD543X_SYSTEM_BUS_PCI << 3); + else if (gd54xx->vlb) + ret |= (CL_GD543X_SYSTEM_BUS_VESA << 3); + else + ret |= (CL_GD543X_SYSTEM_BUS_ISA << 3); + } + break; + case 0x18: + ret = svga->seqregs[0x18] & 0xfe; + break; + case 0x1b: + case 0x1c: + case 0x1d: + case 0x1e: + ret = gd54xx->vclk_d[svga->seqaddr - 0x1b]; + break; } break; - case 0x3ce: - ret = svga->gdcaddr & 0x3f; - break; - case 0x3cf: - if (svga->gdcaddr >= 0x10) { - if ((svga->gdcaddr > 8) && !gd54xx->unlocked) - ret = 0xff; - else if ((svga->gdcaddr > 0x1f) && ((svga->crtc[0x27] <= CIRRUS_ID_CLGD5422) || - (svga->crtc[0x27] == CIRRUS_ID_CLGD5424))) - ret = 0xff; - else switch (svga->gdcaddr) { - case 0x10: - ret = gd543x_mmio_read(0xb8001, gd54xx); - break; - case 0x11: - ret = gd543x_mmio_read(0xb8005, gd54xx); - break; - case 0x12: - ret = gd543x_mmio_read(0xb8002, gd54xx); - break; - case 0x13: - ret = gd543x_mmio_read(0xb8006, gd54xx); - break; - case 0x14: - ret = gd543x_mmio_read(0xb8003, gd54xx); - break; - case 0x15: - ret = gd543x_mmio_read(0xb8007, gd54xx); - break; + } else + ret = svga_in(addr, svga); + break; + case 0x3c6: + if (!gd54xx->unlocked) + ret = svga_in(addr, svga); + else if (gd54xx->ramdac.state == 4) { + /* CL-GD 5428 does not lock the register when it's read. */ + if (svga->crtc[0x27] != CIRRUS_ID_CLGD5428) + gd54xx->ramdac.state = 0; + ret = gd54xx->ramdac.ctrl; + } else { + gd54xx->ramdac.state++; + if (gd54xx->ramdac.state == 4) + ret = gd54xx->ramdac.ctrl; + else + ret = svga_in(addr, svga); + } + break; + case 0x3c7: + case 0x3c8: + gd54xx->ramdac.state = 0; + ret = svga_in(addr, svga); + break; + case 0x3c9: + gd54xx->ramdac.state = 0; + svga->dac_status = 3; + index = (svga->dac_addr - 1) & 0xff; + if (svga->seqregs[0x12] & 2) + index &= 0x0f; + switch (svga->dac_pos) { + case 0: + svga->dac_pos++; + if (svga->seqregs[0x12] & 2) + ret = gd54xx->extpal[index].r & 0x3f; + else + ret = svga->vgapal[index].r & 0x3f; + break; + case 1: + svga->dac_pos++; + if (svga->seqregs[0x12] & 2) + ret = gd54xx->extpal[index].g & 0x3f; + else + ret = svga->vgapal[index].g & 0x3f; + break; + case 2: + svga->dac_pos = 0; + svga->dac_addr = (svga->dac_addr + 1) & 255; + if (svga->seqregs[0x12] & 2) + ret = gd54xx->extpal[index].b & 0x3f; + else + ret = svga->vgapal[index].b & 0x3f; + break; + } + break; + case 0x3ce: + ret = svga->gdcaddr & 0x3f; + break; + case 0x3cf: + if (svga->gdcaddr >= 0x10) { + if ((svga->gdcaddr > 8) && !gd54xx->unlocked) + ret = 0xff; + else if ((svga->gdcaddr > 0x1f) && ((svga->crtc[0x27] <= CIRRUS_ID_CLGD5422) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5424))) + ret = 0xff; + else + switch (svga->gdcaddr) { + case 0x10: + ret = gd543x_mmio_read(0xb8001, gd54xx); + break; + case 0x11: + ret = gd543x_mmio_read(0xb8005, gd54xx); + break; + case 0x12: + ret = gd543x_mmio_read(0xb8002, gd54xx); + break; + case 0x13: + ret = gd543x_mmio_read(0xb8006, gd54xx); + break; + case 0x14: + ret = gd543x_mmio_read(0xb8003, gd54xx); + break; + case 0x15: + ret = gd543x_mmio_read(0xb8007, gd54xx); + break; - case 0x20: - ret = gd543x_mmio_read(0xb8008, gd54xx); - break; - case 0x21: - ret = gd543x_mmio_read(0xb8009, gd54xx); - break; - case 0x22: - ret = gd543x_mmio_read(0xb800a, gd54xx); - break; - case 0x23: - ret = gd543x_mmio_read(0xb800b, gd54xx); - break; - case 0x24: - ret = gd543x_mmio_read(0xb800c, gd54xx); - break; - case 0x25: - ret = gd543x_mmio_read(0xb800d, gd54xx); - break; - case 0x26: - ret = gd543x_mmio_read(0xb800e, gd54xx); - break; - case 0x27: - ret = gd543x_mmio_read(0xb800f, gd54xx); - break; + case 0x20: + ret = gd543x_mmio_read(0xb8008, gd54xx); + break; + case 0x21: + ret = gd543x_mmio_read(0xb8009, gd54xx); + break; + case 0x22: + ret = gd543x_mmio_read(0xb800a, gd54xx); + break; + case 0x23: + ret = gd543x_mmio_read(0xb800b, gd54xx); + break; + case 0x24: + ret = gd543x_mmio_read(0xb800c, gd54xx); + break; + case 0x25: + ret = gd543x_mmio_read(0xb800d, gd54xx); + break; + case 0x26: + ret = gd543x_mmio_read(0xb800e, gd54xx); + break; + case 0x27: + ret = gd543x_mmio_read(0xb800f, gd54xx); + break; - case 0x28: - ret = gd543x_mmio_read(0xb8010, gd54xx); - break; - case 0x29: - ret = gd543x_mmio_read(0xb8011, gd54xx); - break; - case 0x2a: - ret = gd543x_mmio_read(0xb8012, gd54xx); - break; + case 0x28: + ret = gd543x_mmio_read(0xb8010, gd54xx); + break; + case 0x29: + ret = gd543x_mmio_read(0xb8011, gd54xx); + break; + case 0x2a: + ret = gd543x_mmio_read(0xb8012, gd54xx); + break; - case 0x2c: - ret = gd543x_mmio_read(0xb8014, gd54xx); - break; - case 0x2d: - ret = gd543x_mmio_read(0xb8015, gd54xx); - break; - case 0x2e: - ret = gd543x_mmio_read(0xb8016, gd54xx); - break; + case 0x2c: + ret = gd543x_mmio_read(0xb8014, gd54xx); + break; + case 0x2d: + ret = gd543x_mmio_read(0xb8015, gd54xx); + break; + case 0x2e: + ret = gd543x_mmio_read(0xb8016, gd54xx); + break; - case 0x2f: - ret = gd543x_mmio_read(0xb8017, gd54xx); - break; - case 0x30: - ret = gd543x_mmio_read(0xb8018, gd54xx); - break; + case 0x2f: + ret = gd543x_mmio_read(0xb8017, gd54xx); + break; + case 0x30: + ret = gd543x_mmio_read(0xb8018, gd54xx); + break; - case 0x32: - ret = gd543x_mmio_read(0xb801a, gd54xx); - break; + case 0x32: + ret = gd543x_mmio_read(0xb801a, gd54xx); + break; - case 0x33: - ret = gd543x_mmio_read(0xb801b, gd54xx); - break; + case 0x33: + ret = gd543x_mmio_read(0xb801b, gd54xx); + break; - case 0x31: - ret = gd543x_mmio_read(0xb8040, gd54xx); - break; + case 0x31: + ret = gd543x_mmio_read(0xb8040, gd54xx); + break; - case 0x34: - ret = gd543x_mmio_read(0xb801c, gd54xx); - break; + case 0x34: + ret = gd543x_mmio_read(0xb801c, gd54xx); + break; - case 0x35: - ret = gd543x_mmio_read(0xb801d, gd54xx); - break; + case 0x35: + ret = gd543x_mmio_read(0xb801d, gd54xx); + break; - case 0x38: - ret = gd543x_mmio_read(0xb8020, gd54xx); - break; + case 0x38: + ret = gd543x_mmio_read(0xb8020, gd54xx); + break; - case 0x39: - ret = gd543x_mmio_read(0xb8021, gd54xx); - break; + case 0x39: + ret = gd543x_mmio_read(0xb8021, gd54xx); + break; - case 0x3f: - if (svga->crtc[0x27] == CIRRUS_ID_CLGD5446) - gd54xx->vportsync = !gd54xx->vportsync; - ret = gd54xx->vportsync ? 0x80 : 0x00; - break; - } - } else { - if ((svga->gdcaddr < 2) && !gd54xx->unlocked) - ret = (svga->gdcreg[svga->gdcaddr] & 0x0f); - else { - if (svga->gdcaddr == 0) - ret = gd543x_mmio_read(0xb8000, gd54xx); - else if (svga->gdcaddr == 1) - ret = gd543x_mmio_read(0xb8004, gd54xx); - else - ret = svga->gdcreg[svga->gdcaddr]; - } - } - break; - case 0x3d4: - ret = svga->crtcreg; - break; - case 0x3d5: - ret = svga->crtc[svga->crtcreg]; - if (((svga->crtcreg == 0x19) || (svga->crtcreg == 0x1a) || - (svga->crtcreg == 0x1b) || (svga->crtcreg == 0x1d) || - (svga->crtcreg == 0x25) || (svga->crtcreg == 0x27)) && - !gd54xx->unlocked) - ret = 0xff; - else switch (svga->crtcreg) { - case 0x22: /*Graphics Data Latches Readback Register*/ - /*Should this be & 7 if 8 byte latch is enabled? */ - ret = svga->latch.b[svga->gdcreg[4] & 3]; - break; - case 0x24: /*Attribute controller toggle readback (R)*/ - ret = svga->attrff << 7; - break; - case 0x26: /*Attribute controller index readback (R)*/ - ret = svga->attraddr & 0x3f; - break; - case 0x27: /*ID*/ - ret = svga->crtc[0x27]; /*GD542x/GD543x*/ - break; - case 0x28: /*Class ID*/ - if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5430) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5440)) - ret = 0xff; /*Standard CL-GD5430/40*/ - break; - } - break; - default: - ret = svga_in(addr, svga); - break; + case 0x3f: + if (svga->crtc[0x27] == CIRRUS_ID_CLGD5446) + gd54xx->vportsync = !gd54xx->vportsync; + ret = gd54xx->vportsync ? 0x80 : 0x00; + break; + } + } else { + if ((svga->gdcaddr < 2) && !gd54xx->unlocked) + ret = (svga->gdcreg[svga->gdcaddr] & 0x0f); + else { + if (svga->gdcaddr == 0) + ret = gd543x_mmio_read(0xb8000, gd54xx); + else if (svga->gdcaddr == 1) + ret = gd543x_mmio_read(0xb8004, gd54xx); + else + ret = svga->gdcreg[svga->gdcaddr]; + } + } + break; + case 0x3d4: + ret = svga->crtcreg; + break; + case 0x3d5: + ret = svga->crtc[svga->crtcreg]; + if (((svga->crtcreg == 0x19) || (svga->crtcreg == 0x1a) || (svga->crtcreg == 0x1b) || (svga->crtcreg == 0x1d) || (svga->crtcreg == 0x25) || (svga->crtcreg == 0x27)) && !gd54xx->unlocked) + ret = 0xff; + else + switch (svga->crtcreg) { + case 0x22: /*Graphics Data Latches Readback Register*/ + /*Should this be & 7 if 8 byte latch is enabled? */ + ret = svga->latch.b[svga->gdcreg[4] & 3]; + break; + case 0x24: /*Attribute controller toggle readback (R)*/ + ret = svga->attrff << 7; + break; + case 0x26: /*Attribute controller index readback (R)*/ + ret = svga->attraddr & 0x3f; + break; + case 0x27: /*ID*/ + ret = svga->crtc[0x27]; /*GD542x/GD543x*/ + break; + case 0x28: /*Class ID*/ + if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5430) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5440)) + ret = 0xff; /*Standard CL-GD5430/40*/ + break; + } + break; + default: + ret = svga_in(addr, svga); + break; } return ret; } - static void gd54xx_recalc_banking(gd54xx_t *gd54xx) { svga_t *svga = &gd54xx->svga; if (!gd54xx_is_5422(svga)) { - svga->extra_banks[0] = (svga->gdcreg[0x09] & 0x7f) << 12; + svga->extra_banks[0] = (svga->gdcreg[0x09] & 0x7f) << 12; - if (svga->gdcreg[0x0b] & CIRRUS_BANKING_DUAL) - svga->extra_banks[1] = (svga->gdcreg[0x0a] & 0x7f) << 12; - else - svga->extra_banks[1] = svga->extra_banks[0] + 0x8000; + if (svga->gdcreg[0x0b] & CIRRUS_BANKING_DUAL) + svga->extra_banks[1] = (svga->gdcreg[0x0a] & 0x7f) << 12; + else + svga->extra_banks[1] = svga->extra_banks[0] + 0x8000; } else { - if ((svga->gdcreg[0x0b] & CIRRUS_BANKING_GRANULARITY_16K) && - (svga->crtc[0x27] >= CIRRUS_ID_CLGD5426) && (svga->crtc[0x27] != CIRRUS_ID_CLGD5424)) - svga->extra_banks[0] = svga->gdcreg[0x09] << 14; - else - svga->extra_banks[0] = svga->gdcreg[0x09] << 12; + if ((svga->gdcreg[0x0b] & CIRRUS_BANKING_GRANULARITY_16K) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5426) && (svga->crtc[0x27] != CIRRUS_ID_CLGD5424)) + svga->extra_banks[0] = svga->gdcreg[0x09] << 14; + else + svga->extra_banks[0] = svga->gdcreg[0x09] << 12; - if (svga->gdcreg[0x0b] & CIRRUS_BANKING_DUAL) { - if ((svga->gdcreg[0x0b] & CIRRUS_BANKING_GRANULARITY_16K) && - (svga->crtc[0x27] >= CIRRUS_ID_CLGD5426) && (svga->crtc[0x27] != CIRRUS_ID_CLGD5424)) - svga->extra_banks[1] = svga->gdcreg[0x0a] << 14; - else - svga->extra_banks[1] = svga->gdcreg[0x0a] << 12; - } else - svga->extra_banks[1] = svga->extra_banks[0] + 0x8000; + if (svga->gdcreg[0x0b] & CIRRUS_BANKING_DUAL) { + if ((svga->gdcreg[0x0b] & CIRRUS_BANKING_GRANULARITY_16K) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5426) && (svga->crtc[0x27] != CIRRUS_ID_CLGD5424)) + svga->extra_banks[1] = svga->gdcreg[0x0a] << 14; + else + svga->extra_banks[1] = svga->gdcreg[0x0a] << 12; + } else + svga->extra_banks[1] = svga->extra_banks[0] + 0x8000; } svga->write_bank = svga->read_bank = svga->extra_banks[0]; } - static void gd543x_recalc_mapping(gd54xx_t *gd54xx) { - svga_t *svga = &gd54xx->svga; + svga_t *svga = &gd54xx->svga; uint32_t base, size; - if ((gd54xx->pci && (!(gd54xx->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM))) || - (gd54xx->mca && (!(gd54xx->pos_regs[2] & 1)))) { - mem_mapping_disable(&svga->mapping); - mem_mapping_disable(&gd54xx->linear_mapping); - mem_mapping_disable(&gd54xx->mmio_mapping); - return; + if ((gd54xx->pci && (!(gd54xx->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM))) || (gd54xx->mca && (!(gd54xx->pos_regs[2] & 1)))) { + mem_mapping_disable(&svga->mapping); + mem_mapping_disable(&gd54xx->linear_mapping); + mem_mapping_disable(&gd54xx->mmio_mapping); + return; } gd54xx->mmio_vram_overlap = 0; if (!gd54xx_is_5422(svga) || !(svga->seqregs[7] & 0xf0) || !(svga->seqregs[0x07] & 0x01)) { - mem_mapping_disable(&gd54xx->linear_mapping); - mem_mapping_disable(&gd54xx->aperture2_mapping); - switch (svga->gdcreg[6] & 0x0c) { - case 0x0: /*128k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); - svga->banked_mask = 0xffff; - break; - case 0x4: /*64k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); - svga->banked_mask = 0xffff; - break; - case 0x8: /*32k at B0000*/ - mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); - svga->banked_mask = 0x7fff; - break; - case 0xC: /*32k at B8000*/ - mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); - svga->banked_mask = 0x7fff; - gd54xx->mmio_vram_overlap = 1; - break; - } + mem_mapping_disable(&gd54xx->linear_mapping); + mem_mapping_disable(&gd54xx->aperture2_mapping); + switch (svga->gdcreg[6] & 0x0c) { + case 0x0: /*128k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); + svga->banked_mask = 0xffff; + break; + case 0x4: /*64k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + svga->banked_mask = 0xffff; + break; + case 0x8: /*32k at B0000*/ + mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); + svga->banked_mask = 0x7fff; + break; + case 0xC: /*32k at B8000*/ + mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); + svga->banked_mask = 0x7fff; + gd54xx->mmio_vram_overlap = 1; + break; + } - if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x07] & 0x01) && - (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429)) { - if (gd54xx->mmio_vram_overlap) { - mem_mapping_disable(&svga->mapping); - mem_mapping_set_addr(&gd54xx->mmio_mapping, 0xb8000, 0x08000); - } else - mem_mapping_set_addr(&gd54xx->mmio_mapping, 0xb8000, 0x00100); - } else - mem_mapping_disable(&gd54xx->mmio_mapping); + if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x07] & 0x01) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429)) { + if (gd54xx->mmio_vram_overlap) { + mem_mapping_disable(&svga->mapping); + mem_mapping_set_addr(&gd54xx->mmio_mapping, 0xb8000, 0x08000); + } else + mem_mapping_set_addr(&gd54xx->mmio_mapping, 0xb8000, 0x00100); + } else + mem_mapping_disable(&gd54xx->mmio_mapping); } else { - if ((svga->crtc[0x27] <= CIRRUS_ID_CLGD5429) || (!gd54xx->pci && !gd54xx->vlb)) { - if (svga->gdcreg[0x0b] & CIRRUS_BANKING_GRANULARITY_16K) { - base = (svga->seqregs[7] & 0xf0) << 16; - size = 1 * 1024 * 1024; - } else { - base = (svga->seqregs[7] & 0xe0) << 16; - size = 2 * 1024 * 1024; - } - } else if (gd54xx->pci) { - base = gd54xx->lfb_base; - /* if (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) - size = 32 * 1024 * 1024; - else */ if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) - size = 16 * 1024 * 1024; - else - size = 4 * 1024 * 1024; - } else { /*VLB/ISA/MCA*/ - base = 128*1024*1024; - if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) - size = 16 * 1024 * 1024; - else - size = 4 * 1024 * 1024; - } + if ((svga->crtc[0x27] <= CIRRUS_ID_CLGD5429) || (!gd54xx->pci && !gd54xx->vlb)) { + if (svga->gdcreg[0x0b] & CIRRUS_BANKING_GRANULARITY_16K) { + base = (svga->seqregs[7] & 0xf0) << 16; + size = 1 * 1024 * 1024; + } else { + base = (svga->seqregs[7] & 0xe0) << 16; + size = 2 * 1024 * 1024; + } + } else if (gd54xx->pci) { + base = gd54xx->lfb_base; + /* if (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) + size = 32 * 1024 * 1024; + else */ + if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) + size = 16 * 1024 * 1024; + else + size = 4 * 1024 * 1024; + } else { /*VLB/ISA/MCA*/ + base = 128 * 1024 * 1024; + if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) + size = 16 * 1024 * 1024; + else + size = 4 * 1024 * 1024; + } - mem_mapping_disable(&svga->mapping); - mem_mapping_set_addr(&gd54xx->linear_mapping, base, size); - if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429)) { - if (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR) - mem_mapping_disable(&gd54xx->mmio_mapping); /* MMIO is handled in the linear read/write functions */ - else - mem_mapping_set_addr(&gd54xx->mmio_mapping, 0xb8000, 0x00100); - } else - mem_mapping_disable(&gd54xx->mmio_mapping); + mem_mapping_disable(&svga->mapping); + mem_mapping_set_addr(&gd54xx->linear_mapping, base, size); + if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429)) { + if (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR) + mem_mapping_disable(&gd54xx->mmio_mapping); /* MMIO is handled in the linear read/write functions */ + else + mem_mapping_set_addr(&gd54xx->mmio_mapping, 0xb8000, 0x00100); + } else + mem_mapping_disable(&gd54xx->mmio_mapping); - if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) && (gd54xx->blt.status & CIRRUS_BLT_APERTURE2) && - ((gd54xx->blt.mode & (CIRRUS_BLTMODE_COLOREXPAND | CIRRUS_BLTMODE_MEMSYSSRC)) == - (CIRRUS_BLTMODE_COLOREXPAND | CIRRUS_BLTMODE_MEMSYSSRC))) { - if (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) - mem_mapping_set_addr(&gd54xx->aperture2_mapping, gd54xx->lfb_base + (16777216), 16777216); - else - mem_mapping_set_addr(&gd54xx->aperture2_mapping, 0xbc000, 0x04000); - } else - mem_mapping_disable(&gd54xx->aperture2_mapping); + if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) && (gd54xx->blt.status & CIRRUS_BLT_APERTURE2) && ((gd54xx->blt.mode & (CIRRUS_BLTMODE_COLOREXPAND | CIRRUS_BLTMODE_MEMSYSSRC)) == (CIRRUS_BLTMODE_COLOREXPAND | CIRRUS_BLTMODE_MEMSYSSRC))) { + if (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) + mem_mapping_set_addr(&gd54xx->aperture2_mapping, gd54xx->lfb_base + (16777216), 16777216); + else + mem_mapping_set_addr(&gd54xx->aperture2_mapping, 0xbc000, 0x04000); + } else + mem_mapping_disable(&gd54xx->aperture2_mapping); } } - static void gd54xx_recalctimings(svga_t *svga) { - gd54xx_t *gd54xx = (gd54xx_t *)svga->p; - uint8_t clocksel, rdmask; - uint8_t linedbl = svga->dispend * 9 / 10 >= svga->hdisp; + gd54xx_t *gd54xx = (gd54xx_t *) svga->p; + uint8_t clocksel, rdmask; + uint8_t linedbl = svga->dispend * 9 / 10 >= svga->hdisp; svga->rowoffset = (svga->crtc[0x13]) | (((int) (uint32_t) (svga->crtc[0x1b] & 0x10)) << 4); @@ -1660,290 +1638,318 @@ gd54xx_recalctimings(svga_t *svga) svga->map8 = svga->pallook; if (svga->seqregs[7] & CIRRUS_SR7_BPP_SVGA) { - if (linedbl) - svga->render = svga_render_8bpp_lowres; - else { - svga->render = svga_render_8bpp_highres; - if ((svga->dispend == 512) && !svga->interlace && gd54xx_is_5434(svga)) - svga->hdisp <<= 1; - } + if (linedbl) + svga->render = svga_render_8bpp_lowres; + else { + svga->render = svga_render_8bpp_highres; + if ((svga->dispend == 512) && !svga->interlace && gd54xx_is_5434(svga)) + svga->hdisp <<= 1; + } } else if (svga->gdcreg[5] & 0x40) - svga->render = svga_render_8bpp_lowres; + svga->render = svga_render_8bpp_lowres; svga->ma_latch |= ((svga->crtc[0x1b] & 0x01) << 16) | ((svga->crtc[0x1b] & 0xc) << 15); svga->bpp = 8; - if (gd54xx->ramdac.ctrl & 0x80) { - if (gd54xx->ramdac.ctrl & 0x40) { - if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5428) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5426)) - rdmask = 0xf; - else - rdmask = 0x7; + if (gd54xx->ramdac.ctrl & 0x80) { + if (gd54xx->ramdac.ctrl & 0x40) { + if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5428) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5426)) + rdmask = 0xf; + else + rdmask = 0x7; - switch (gd54xx->ramdac.ctrl & rdmask) { - case 0: - svga->bpp = 15; - if (linedbl) { - if (gd54xx->ramdac.ctrl & 0x10) - svga->render = svga_render_15bpp_mix_lowres; - else - svga->render = svga_render_15bpp_lowres; - } else { - if (gd54xx->ramdac.ctrl & 0x10) - svga->render = svga_render_15bpp_mix_highres; - else - svga->render = svga_render_15bpp_highres; - } - break; + switch (gd54xx->ramdac.ctrl & rdmask) { + case 0: + svga->bpp = 15; + if (linedbl) { + if (gd54xx->ramdac.ctrl & 0x10) + svga->render = svga_render_15bpp_mix_lowres; + else + svga->render = svga_render_15bpp_lowres; + } else { + if (gd54xx->ramdac.ctrl & 0x10) + svga->render = svga_render_15bpp_mix_highres; + else + svga->render = svga_render_15bpp_highres; + } + break; - case 1: - svga->bpp = 16; - if (linedbl) - svga->render = svga_render_16bpp_lowres; - else - svga->render = svga_render_16bpp_highres; - break; + case 1: + svga->bpp = 16; + if (linedbl) + svga->render = svga_render_16bpp_lowres; + else + svga->render = svga_render_16bpp_highres; + break; - case 5: - if (gd54xx_is_5434(svga) && (svga->seqregs[7] & CIRRUS_SR7_BPP_32)) { - svga->bpp = 32; - if (linedbl) - svga->render = svga_render_32bpp_lowres; - else - svga->render = svga_render_32bpp_highres; - if (svga->crtc[0x27] < CIRRUS_ID_CLGD5436) { - svga->rowoffset *= 2; - } - } else { - svga->bpp = 24; - if (linedbl) - svga->render = svga_render_24bpp_lowres; - else - svga->render = svga_render_24bpp_highres; - } - break; + case 5: + if (gd54xx_is_5434(svga) && (svga->seqregs[7] & CIRRUS_SR7_BPP_32)) { + svga->bpp = 32; + if (linedbl) + svga->render = svga_render_32bpp_lowres; + else + svga->render = svga_render_32bpp_highres; + if (svga->crtc[0x27] < CIRRUS_ID_CLGD5436) { + svga->rowoffset *= 2; + } + } else { + svga->bpp = 24; + if (linedbl) + svga->render = svga_render_24bpp_lowres; + else + svga->render = svga_render_24bpp_highres; + } + break; - case 8: - svga->bpp = 8; - svga->map8 = video_8togs; - if (linedbl) - svga->render = svga_render_8bpp_lowres; - else - svga->render = svga_render_8bpp_highres; - break; + case 8: + svga->bpp = 8; + svga->map8 = video_8togs; + if (linedbl) + svga->render = svga_render_8bpp_lowres; + else + svga->render = svga_render_8bpp_highres; + break; - case 9: - svga->bpp = 8; - svga->map8 = video_8to32; - if (linedbl) - svga->render = svga_render_8bpp_lowres; - else - svga->render = svga_render_8bpp_highres; - break; + case 9: + svga->bpp = 8; + svga->map8 = video_8to32; + if (linedbl) + svga->render = svga_render_8bpp_lowres; + else + svga->render = svga_render_8bpp_highres; + break; - case 0xf: - switch (svga->seqregs[7] & CIRRUS_SR7_BPP_MASK) { - case CIRRUS_SR7_BPP_32: - if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5430) { - svga->bpp = 32; - if (linedbl) - svga->render = svga_render_32bpp_lowres; - else - svga->render = svga_render_32bpp_highres; - svga->rowoffset *= 2; - } - break; + case 0xf: + switch (svga->seqregs[7] & CIRRUS_SR7_BPP_MASK) { + case CIRRUS_SR7_BPP_32: + if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5430) { + svga->bpp = 32; + if (linedbl) + svga->render = svga_render_32bpp_lowres; + else + svga->render = svga_render_32bpp_highres; + svga->rowoffset *= 2; + } + break; - case CIRRUS_SR7_BPP_24: - svga->bpp = 24; - if (linedbl) - svga->render = svga_render_24bpp_lowres; - else - svga->render = svga_render_24bpp_highres; - break; + case CIRRUS_SR7_BPP_24: + svga->bpp = 24; + if (linedbl) + svga->render = svga_render_24bpp_lowres; + else + svga->render = svga_render_24bpp_highres; + break; - case CIRRUS_SR7_BPP_16: - if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5428) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5426)) { - svga->bpp = 16; - if (linedbl) - svga->render = svga_render_16bpp_lowres; - else - svga->render = svga_render_16bpp_highres; - } - break; + case CIRRUS_SR7_BPP_16: + if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5428) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5426)) { + svga->bpp = 16; + if (linedbl) + svga->render = svga_render_16bpp_lowres; + else + svga->render = svga_render_16bpp_highres; + } + break; - case CIRRUS_SR7_BPP_16_DOUBLEVCLK: - svga->bpp = 16; - if (linedbl) - svga->render = svga_render_16bpp_lowres; - else - svga->render = svga_render_16bpp_highres; - break; + case CIRRUS_SR7_BPP_16_DOUBLEVCLK: + svga->bpp = 16; + if (linedbl) + svga->render = svga_render_16bpp_lowres; + else + svga->render = svga_render_16bpp_highres; + break; - case CIRRUS_SR7_BPP_8: - svga->bpp = 8; - if (linedbl) - svga->render = svga_render_8bpp_lowres; - else - svga->render = svga_render_8bpp_highres; - break; - } - break; - } - } else { - svga->bpp = 15; - if (linedbl) { - if (gd54xx->ramdac.ctrl & 0x10) - svga->render = svga_render_15bpp_mix_lowres; - else - svga->render = svga_render_15bpp_lowres; - } else { - if (gd54xx->ramdac.ctrl & 0x10) - svga->render = svga_render_15bpp_mix_highres; - else - svga->render = svga_render_15bpp_highres; - } - } + case CIRRUS_SR7_BPP_8: + svga->bpp = 8; + if (linedbl) + svga->render = svga_render_8bpp_lowres; + else + svga->render = svga_render_8bpp_highres; + break; + } + break; + } + } else { + svga->bpp = 15; + if (linedbl) { + if (gd54xx->ramdac.ctrl & 0x10) + svga->render = svga_render_15bpp_mix_lowres; + else + svga->render = svga_render_15bpp_lowres; + } else { + if (gd54xx->ramdac.ctrl & 0x10) + svga->render = svga_render_15bpp_mix_highres; + else + svga->render = svga_render_15bpp_highres; + } + } } clocksel = (svga->miscout >> 2) & 3; if (!gd54xx->vclk_n[clocksel] || !gd54xx->vclk_d[clocksel]) - svga->clock = (cpuclock * (float)(1ull << 32)) / ((svga->miscout & 0xc) ? 28322000.0 : 25175000.0); + svga->clock = (cpuclock * (float) (1ull << 32)) / ((svga->miscout & 0xc) ? 28322000.0 : 25175000.0); else { - int n = gd54xx->vclk_n[clocksel] & 0x7f; - int d = (gd54xx->vclk_d[clocksel] & 0x3e) >> 1; - int m = gd54xx->vclk_d[clocksel] & 0x01 ? 2 : 1; - float freq = (14318184.0 * ((float)n / ((float)d * m))); - if (gd54xx_is_5422(svga)) { - switch (svga->seqregs[7] & (gd54xx_is_5434(svga) ? 0xe : 6)) { - case 2: - freq /= 2.0; - break; - case 4: - if (!gd54xx_is_5434(svga)) - freq /= 3.0; - break; - } - } - svga->clock = (cpuclock * (double)(1ull << 32)) / freq; + int n = gd54xx->vclk_n[clocksel] & 0x7f; + int d = (gd54xx->vclk_d[clocksel] & 0x3e) >> 1; + int m = gd54xx->vclk_d[clocksel] & 0x01 ? 2 : 1; + float freq = (14318184.0 * ((float) n / ((float) d * m))); + if (gd54xx_is_5422(svga)) { + switch (svga->seqregs[7] & (gd54xx_is_5434(svga) ? 0xe : 6)) { + case 2: + freq /= 2.0; + break; + case 4: + if (!gd54xx_is_5434(svga)) + freq /= 3.0; + break; + } + } + svga->clock = (cpuclock * (double) (1ull << 32)) / freq; } svga->vram_display_mask = (svga->crtc[0x1b] & 2) ? gd54xx->vram_mask : 0x3ffff; } - -static -void gd54xx_hwcursor_draw(svga_t *svga, int displine) +static void +gd54xx_hwcursor_draw(svga_t *svga, int displine) { - gd54xx_t *gd54xx = (gd54xx_t *)svga->p; - int x, xx, comb, b0, b1; - uint8_t dat[2]; - int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff; - int pitch = (svga->hwcursor.cur_xsize == 64) ? 16 : 4; - uint32_t bgcol = gd54xx->extpallook[0x00]; - uint32_t fgcol = gd54xx->extpallook[0x0f]; - uint8_t linedbl = svga->dispend * 9 / 10 >= svga->hdisp; + gd54xx_t *gd54xx = (gd54xx_t *) svga->p; + int x, xx, comb, b0, b1; + uint8_t dat[2]; + int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff; + int pitch = (svga->hwcursor.cur_xsize == 64) ? 16 : 4; + uint32_t bgcol = gd54xx->extpallook[0x00]; + uint32_t fgcol = gd54xx->extpallook[0x0f]; + uint8_t linedbl = svga->dispend * 9 / 10 >= svga->hdisp; offset <<= linedbl; if (svga->interlace && svga->hwcursor_oddeven) - svga->hwcursor_latch.addr += pitch; + svga->hwcursor_latch.addr += pitch; for (x = 0; x < svga->hwcursor.cur_xsize; x += 8) { - dat[0] = svga->vram[svga->hwcursor_latch.addr & svga->vram_display_mask]; - if (svga->hwcursor.cur_xsize == 64) - dat[1] = svga->vram[(svga->hwcursor_latch.addr + 0x08) & svga->vram_display_mask]; - else - dat[1] = svga->vram[(svga->hwcursor_latch.addr + 0x80) & svga->vram_display_mask]; - for (xx = 0; xx < 8; xx++) { - b0 = (dat[0] >> (7 - xx)) & 1; - b1 = (dat[1] >> (7 - xx)) & 1; - comb = (b1 | (b0 << 1)); - if (offset >= svga->hwcursor_latch.x) { - switch(comb) { - case 0: - /* The original screen pixel is shown (invisible cursor) */ - break; - case 1: - /* The pixel is shown in the cursor background color */ - ((uint32_t *)buffer32->line[displine])[offset + svga->x_add] = bgcol; - break; - case 2: - /* The pixel is shown as the inverse of the original screen pixel - (XOR cursor) */ - ((uint32_t *)buffer32->line[displine])[offset + svga->x_add] ^= 0xffffff; - break; - case 3: - /* The pixel is shown in the cursor foreground color */ - ((uint32_t *)buffer32->line[displine])[offset + svga->x_add] = fgcol; - break; - } - } + dat[0] = svga->vram[svga->hwcursor_latch.addr & svga->vram_display_mask]; + if (svga->hwcursor.cur_xsize == 64) + dat[1] = svga->vram[(svga->hwcursor_latch.addr + 0x08) & svga->vram_display_mask]; + else + dat[1] = svga->vram[(svga->hwcursor_latch.addr + 0x80) & svga->vram_display_mask]; + for (xx = 0; xx < 8; xx++) { + b0 = (dat[0] >> (7 - xx)) & 1; + b1 = (dat[1] >> (7 - xx)) & 1; + comb = (b1 | (b0 << 1)); + if (offset >= svga->hwcursor_latch.x) { + switch (comb) { + case 0: + /* The original screen pixel is shown (invisible cursor) */ + break; + case 1: + /* The pixel is shown in the cursor background color */ + ((uint32_t *) buffer32->line[displine])[offset + svga->x_add] = bgcol; + break; + case 2: + /* The pixel is shown as the inverse of the original screen pixel + (XOR cursor) */ + ((uint32_t *) buffer32->line[displine])[offset + svga->x_add] ^= 0xffffff; + break; + case 3: + /* The pixel is shown in the cursor foreground color */ + ((uint32_t *) buffer32->line[displine])[offset + svga->x_add] = fgcol; + break; + } + } - offset++; - } - svga->hwcursor_latch.addr++; + offset++; + } + svga->hwcursor_latch.addr++; } if (svga->hwcursor.cur_xsize == 64) - svga->hwcursor_latch.addr += 8; + svga->hwcursor_latch.addr += 8; if (svga->interlace && !svga->hwcursor_oddeven) - svga->hwcursor_latch.addr += pitch; + svga->hwcursor_latch.addr += pitch; } - static void -gd54xx_rop(gd54xx_t *gd54xx, uint8_t *res, uint8_t *dst, const uint8_t *src) { +gd54xx_rop(gd54xx_t *gd54xx, uint8_t *res, uint8_t *dst, const uint8_t *src) +{ switch (gd54xx->blt.rop) { - case 0x00: *res = 0x00; break; - case 0x05: *res = *src & *dst; break; - case 0x06: *res = *dst; break; - case 0x09: *res = *src & ~*dst; break; - case 0x0b: *res = ~*dst; break; - case 0x0d: *res = *src; break; - case 0x0e: *res = 0xff; break; - case 0x50: *res = ~*src & *dst; break; - case 0x59: *res = *src ^ *dst; break; - case 0x6d: *res = *src | *dst; break; - case 0x90: *res = ~(*src | *dst); break; - case 0x95: *res = ~(*src ^ *dst); break; - case 0xad: *res = *src | ~*dst; break; - case 0xd0: *res = ~*src; break; - case 0xd6: *res = ~*src | *dst; break; - case 0xda: *res = ~(*src & *dst); break; + case 0x00: + *res = 0x00; + break; + case 0x05: + *res = *src & *dst; + break; + case 0x06: + *res = *dst; + break; + case 0x09: + *res = *src & ~*dst; + break; + case 0x0b: + *res = ~*dst; + break; + case 0x0d: + *res = *src; + break; + case 0x0e: + *res = 0xff; + break; + case 0x50: + *res = ~*src & *dst; + break; + case 0x59: + *res = *src ^ *dst; + break; + case 0x6d: + *res = *src | *dst; + break; + case 0x90: + *res = ~(*src | *dst); + break; + case 0x95: + *res = ~(*src ^ *dst); + break; + case 0xad: + *res = *src | ~*dst; + break; + case 0xd0: + *res = ~*src; + break; + case 0xd6: + *res = ~*src | *dst; + break; + case 0xda: + *res = ~(*src & *dst); + break; } } - static uint8_t gd54xx_mem_sys_dest_read(gd54xx_t *gd54xx) { uint8_t ret = 0xff; if (gd54xx->blt.msd_buf_cnt != 0) { - ret = gd54xx->blt.msd_buf[gd54xx->blt.msd_buf_pos++]; - gd54xx->blt.msd_buf_cnt--; + ret = gd54xx->blt.msd_buf[gd54xx->blt.msd_buf_pos++]; + gd54xx->blt.msd_buf_cnt--; - if (gd54xx->blt.msd_buf_cnt == 0) { - if (gd54xx->countminusone == 1) { - gd54xx->blt.msd_buf_pos = 0; - if ((gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && - !(gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_DWORDGRANULARITY)) - gd54xx_start_blit(0xff, 8, gd54xx, &gd54xx->svga); - else - gd54xx_start_blit(0xffffffff, 32, gd54xx, &gd54xx->svga); - } else - gd54xx_reset_blit(gd54xx); /* End of blit, do no more. */ - } + if (gd54xx->blt.msd_buf_cnt == 0) { + if (gd54xx->countminusone == 1) { + gd54xx->blt.msd_buf_pos = 0; + if ((gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && !(gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_DWORDGRANULARITY)) + gd54xx_start_blit(0xff, 8, gd54xx, &gd54xx->svga); + else + gd54xx_start_blit(0xffffffff, 32, gd54xx, &gd54xx->svga); + } else + gd54xx_reset_blit(gd54xx); /* End of blit, do no more. */ + } } return ret; } - static void gd54xx_mem_sys_src_write(gd54xx_t *gd54xx, uint8_t val) { @@ -1954,31 +1960,28 @@ gd54xx_mem_sys_src_write(gd54xx_t *gd54xx, uint8_t val) gd54xx->blt.sys_cnt = (gd54xx->blt.sys_cnt + 1) & 3; if (gd54xx->blt.sys_cnt == 0) { - if ((gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && - !(gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_DWORDGRANULARITY)) { - for (i = 0; i < 32; i += 8) - gd54xx_start_blit((gd54xx->blt.sys_src32 >> i) & 0xff, 8, gd54xx, &gd54xx->svga); - } else - gd54xx_start_blit(gd54xx->blt.sys_src32, 32, gd54xx, &gd54xx->svga); + if ((gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && !(gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_DWORDGRANULARITY)) { + for (i = 0; i < 32; i += 8) + gd54xx_start_blit((gd54xx->blt.sys_src32 >> i) & 0xff, 8, gd54xx, &gd54xx->svga); + } else + gd54xx_start_blit(gd54xx->blt.sys_src32, 32, gd54xx, &gd54xx->svga); } } - static void gd54xx_write(uint32_t addr, uint8_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; - if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && - !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - gd54xx_mem_sys_src_write(gd54xx, val); - return; + if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + gd54xx_mem_sys_src_write(gd54xx, val); + return; } if ((svga->seqregs[0x07] & 0x01) == 0) { - svga_write(addr, val, svga); - return; + svga_write(addr, val, svga); + return; } addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1]; @@ -1986,69 +1989,64 @@ gd54xx_write(uint32_t addr, uint8_t val, void *p) svga_write_linear(addr, val, svga); } - static void gd54xx_writew(uint32_t addr, uint16_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; - if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && - !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - gd54xx_write(addr, val, gd54xx); - gd54xx_write(addr + 1, val >> 8, gd54xx); - return; + if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + gd54xx_write(addr, val, gd54xx); + gd54xx_write(addr + 1, val >> 8, gd54xx); + return; } if ((svga->seqregs[0x07] & 0x01) == 0) { - svga_writew(addr, val, svga); - return; + svga_writew(addr, val, svga); + return; } addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1]; if (svga->writemode < 4) - svga_writew_linear(addr, val, svga); + svga_writew_linear(addr, val, svga); else { - svga_write_linear(addr, val, svga); - svga_write_linear(addr + 1, val >> 8, svga); + svga_write_linear(addr, val, svga); + svga_write_linear(addr + 1, val >> 8, svga); } } - static void gd54xx_writel(uint32_t addr, uint32_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; - if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && - !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - gd54xx_write(addr, val, gd54xx); - gd54xx_write(addr + 1, val >> 8, gd54xx); - gd54xx_write(addr + 2, val >> 16, gd54xx); - gd54xx_write(addr + 3, val >> 24, gd54xx); - return; + if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + gd54xx_write(addr, val, gd54xx); + gd54xx_write(addr + 1, val >> 8, gd54xx); + gd54xx_write(addr + 2, val >> 16, gd54xx); + gd54xx_write(addr + 3, val >> 24, gd54xx); + return; } if ((svga->seqregs[0x07] & 0x01) == 0) { - svga_writel(addr, val, svga); - return; + svga_writel(addr, val, svga); + return; } addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1]; if (svga->writemode < 4) - svga_writel_linear(addr, val, svga); + svga_writel_linear(addr, val, svga); else { - svga_write_linear(addr, val, svga); - svga_write_linear(addr+1, val >> 8, svga); - svga_write_linear(addr+2, val >> 16, svga); - svga_write_linear(addr+3, val >> 24, svga); + svga_write_linear(addr, val, svga); + svga_write_linear(addr + 1, val >> 8, svga); + svga_write_linear(addr + 2, val >> 16, svga); + svga_write_linear(addr + 3, val >> 24, svga); } } - /* This adds write modes 4 and 5 to SVGA. */ static void gd54xx_write_modes45(svga_t *svga, uint8_t val, uint32_t addr) @@ -2056,57 +2054,54 @@ gd54xx_write_modes45(svga_t *svga, uint8_t val, uint32_t addr) uint32_t i, j; switch (svga->writemode) { - case 4: - if (svga->adv_flags & FLAG_ADDR_BY16) { - addr &= svga->decode_mask; + case 4: + if (svga->adv_flags & FLAG_ADDR_BY16) { + addr &= svga->decode_mask; - for (i = 0; i < 8; i++) { - if (val & svga->seqregs[2] & (0x80 >> i)) { - svga->vram[addr + (i << 1)] = svga->gdcreg[1]; - svga->vram[addr + (i << 1) + 1] = svga->gdcreg[0x11]; - } - } - } else { - addr <<= 1; - addr &= svga->decode_mask; + for (i = 0; i < 8; i++) { + if (val & svga->seqregs[2] & (0x80 >> i)) { + svga->vram[addr + (i << 1)] = svga->gdcreg[1]; + svga->vram[addr + (i << 1) + 1] = svga->gdcreg[0x11]; + } + } + } else { + addr <<= 1; + addr &= svga->decode_mask; - for (i = 0; i < 8; i++) { - if (val & svga->seqregs[2] & (0x80 >> i)) - svga->vram[addr + i] = svga->gdcreg[1]; - } - } - break; + for (i = 0; i < 8; i++) { + if (val & svga->seqregs[2] & (0x80 >> i)) + svga->vram[addr + i] = svga->gdcreg[1]; + } + } + break; - case 5: - if (svga->adv_flags & FLAG_ADDR_BY16) { - addr &= svga->decode_mask; + case 5: + if (svga->adv_flags & FLAG_ADDR_BY16) { + addr &= svga->decode_mask; - for (i = 0; i < 8; i++) { - j = (0x80 >> i); - if (svga->seqregs[2] & j) { - svga->vram[addr + (i << 1)] = (val & j) ? - svga->gdcreg[1] : svga->gdcreg[0]; - svga->vram[addr + (i << 1) + 1] = (val & j) ? - svga->gdcreg[0x11] : svga->gdcreg[0x10]; - } - } - } else { - addr <<= 1; - addr &= svga->decode_mask; + for (i = 0; i < 8; i++) { + j = (0x80 >> i); + if (svga->seqregs[2] & j) { + svga->vram[addr + (i << 1)] = (val & j) ? svga->gdcreg[1] : svga->gdcreg[0]; + svga->vram[addr + (i << 1) + 1] = (val & j) ? svga->gdcreg[0x11] : svga->gdcreg[0x10]; + } + } + } else { + addr <<= 1; + addr &= svga->decode_mask; - for (i = 0; i < 8; i++) { - j = (0x80 >> i); - if (svga->seqregs[2] & j) - svga->vram[addr + i] = (val & j) ? svga->gdcreg[1] : svga->gdcreg[0]; - } - } - break; + for (i = 0; i < 8; i++) { + j = (0x80 >> i); + if (svga->seqregs[2] & j) + svga->vram[addr + i] = (val & j) ? svga->gdcreg[1] : svga->gdcreg[0]; + } + } + break; } svga->changedvram[addr >> 12] = changeframecount; } - static uint8_t gd54xx_get_aperture(uint32_t addr) { @@ -2114,995 +2109,948 @@ gd54xx_get_aperture(uint32_t addr) return (uint8_t) (ap & 0x03); } - static int gd54xx_aperture2_enabled(gd54xx_t *gd54xx) { svga_t *svga = &gd54xx->svga; if (svga->crtc[0x27] < CIRRUS_ID_CLGD5436) - return 0; + return 0; if (!(gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND)) - return 0; + return 0; if (!(gd54xx->blt.status & CIRRUS_BLT_APERTURE2)) - return 0; + return 0; return 1; } - static uint8_t gd54xx_readb_linear(uint32_t addr, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; uint8_t ap = gd54xx_get_aperture(addr); - addr &= 0x003fffff; /* 4 MB mask */ + addr &= 0x003fffff; /* 4 MB mask */ if ((svga->seqregs[0x07] & 0x01) == 0) - return svga_read_linear(addr, svga); + return svga_read_linear(addr, svga); if ((addr >= (svga->vram_max - 256)) && (addr < svga->vram_max)) { - if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) - return gd543x_mmio_read(addr & 0x000000ff, gd54xx); + if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) + return gd543x_mmio_read(addr & 0x000000ff, gd54xx); } /* Do mem sys dest reads here if the blitter is neither paused, nor is there a second aperture. */ - if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && - !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) - return gd54xx_mem_sys_dest_read(gd54xx); + if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) + return gd54xx_mem_sys_dest_read(gd54xx); switch (ap) { - case 0: - default: - break; - case 1: - /* 0 -> 1, 1 -> 0, 2 -> 3, 3 -> 2 */ - addr ^= 0x00000001; - break; - case 2: - /* 0 -> 3, 1 -> 2, 2 -> 1, 3 -> 0 */ - addr ^= 0x00000003; - break; - case 3: - return 0xff; + case 0: + default: + break; + case 1: + /* 0 -> 1, 1 -> 0, 2 -> 3, 3 -> 2 */ + addr ^= 0x00000001; + break; + case 2: + /* 0 -> 3, 1 -> 2, 2 -> 1, 3 -> 0 */ + addr ^= 0x00000003; + break; + case 3: + return 0xff; } return svga_read_linear(addr, svga); } - static uint16_t gd54xx_readw_linear(uint32_t addr, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; - uint8_t ap = gd54xx_get_aperture(addr); + uint8_t ap = gd54xx_get_aperture(addr); uint16_t temp; - addr &= 0x003fffff; /* 4 MB mask */ + addr &= 0x003fffff; /* 4 MB mask */ if ((svga->seqregs[0x07] & 0x01) == 0) - return svga_readw_linear(addr, svga); + return svga_readw_linear(addr, svga); if ((addr >= (svga->vram_max - 256)) && (addr < svga->vram_max)) { - if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) { - temp = gd543x_mmio_readw(addr & 0x000000ff, gd54xx); - return temp; - } + if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) { + temp = gd543x_mmio_readw(addr & 0x000000ff, gd54xx); + return temp; + } } /* Do mem sys dest reads here if the blitter is neither paused, nor is there a second aperture. */ - if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && - !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - temp = gd54xx_readb_linear(addr, p); - temp |= gd54xx_readb_linear(addr + 1, p) << 8; - return temp; + if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + temp = gd54xx_readb_linear(addr, p); + temp |= gd54xx_readb_linear(addr + 1, p) << 8; + return temp; } switch (ap) { - case 0: - default: - return svga_readw_linear(addr, svga); - case 2: - /* 0 -> 3, 1 -> 2, 2 -> 1, 3 -> 0 */ - addr ^= 0x00000002; - case 1: - temp = svga_readb_linear(addr + 1, svga); - temp |= (svga_readb_linear(addr, svga) << 8); + case 0: + default: + return svga_readw_linear(addr, svga); + case 2: + /* 0 -> 3, 1 -> 2, 2 -> 1, 3 -> 0 */ + addr ^= 0x00000002; + case 1: + temp = svga_readb_linear(addr + 1, svga); + temp |= (svga_readb_linear(addr, svga) << 8); - if (svga->fast) - cycles -= video_timing_read_w; + if (svga->fast) + cycles -= video_timing_read_w; - return temp; - case 3: - return 0xffff; + return temp; + case 3: + return 0xffff; } } - static uint32_t gd54xx_readl_linear(uint32_t addr, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; - uint8_t ap = gd54xx_get_aperture(addr); + uint8_t ap = gd54xx_get_aperture(addr); uint32_t temp; - addr &= 0x003fffff; /* 4 MB mask */ + addr &= 0x003fffff; /* 4 MB mask */ if ((svga->seqregs[0x07] & 0x01) == 0) - return svga_readl_linear(addr, svga); + return svga_readl_linear(addr, svga); if ((addr >= (svga->vram_max - 256)) && (addr < svga->vram_max)) { - if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) { - temp = gd543x_mmio_readl(addr & 0x000000ff, gd54xx); - return temp; - } + if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) { + temp = gd543x_mmio_readl(addr & 0x000000ff, gd54xx); + return temp; + } } /* Do mem sys dest reads here if the blitter is neither paused, nor is there a second aperture. */ - if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && - !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - temp = gd54xx_readb_linear(addr, p); - temp |= gd54xx_readb_linear(addr + 1, p) << 8; - temp |= gd54xx_readb_linear(addr + 2, p) << 16; - temp |= gd54xx_readb_linear(addr + 3, p) << 24; - return temp; + if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + temp = gd54xx_readb_linear(addr, p); + temp |= gd54xx_readb_linear(addr + 1, p) << 8; + temp |= gd54xx_readb_linear(addr + 2, p) << 16; + temp |= gd54xx_readb_linear(addr + 3, p) << 24; + return temp; } switch (ap) { - case 0: - default: - return svga_readl_linear(addr, svga); - case 1: - temp = svga_readb_linear(addr + 1, svga); - temp |= (svga_readb_linear(addr, svga) << 8); - temp |= (svga_readb_linear(addr + 3, svga) << 16); - temp |= (svga_readb_linear(addr + 2, svga) << 24); + case 0: + default: + return svga_readl_linear(addr, svga); + case 1: + temp = svga_readb_linear(addr + 1, svga); + temp |= (svga_readb_linear(addr, svga) << 8); + temp |= (svga_readb_linear(addr + 3, svga) << 16); + temp |= (svga_readb_linear(addr + 2, svga) << 24); - if (svga->fast) - cycles -= video_timing_read_l; + if (svga->fast) + cycles -= video_timing_read_l; - return temp; - case 2: - temp = svga_readb_linear(addr + 3, svga); - temp |= (svga_readb_linear(addr + 2, svga) << 8); - temp |= (svga_readb_linear(addr + 1, svga) << 16); - temp |= (svga_readb_linear(addr, svga) << 24); + return temp; + case 2: + temp = svga_readb_linear(addr + 3, svga); + temp |= (svga_readb_linear(addr + 2, svga) << 8); + temp |= (svga_readb_linear(addr + 1, svga) << 16); + temp |= (svga_readb_linear(addr, svga) << 24); - if (svga->fast) - cycles -= video_timing_read_l; + if (svga->fast) + cycles -= video_timing_read_l; - return temp; - case 3: - return 0xffffffff; + return temp; + case 3: + return 0xffffffff; } } - static uint8_t gd5436_aperture2_readb(uint32_t addr, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; + gd54xx_t *gd54xx = (gd54xx_t *) p; - if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && - gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) - return gd54xx_mem_sys_dest_read(gd54xx); + if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) + return gd54xx_mem_sys_dest_read(gd54xx); return 0xff; } - static uint16_t gd5436_aperture2_readw(uint32_t addr, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - uint16_t ret = 0xffff; + gd54xx_t *gd54xx = (gd54xx_t *) p; + uint16_t ret = 0xffff; - if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && - gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - ret = gd5436_aperture2_readb(addr, p); - ret |= gd5436_aperture2_readb(addr + 1, p) << 8; - return ret; + if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + ret = gd5436_aperture2_readb(addr, p); + ret |= gd5436_aperture2_readb(addr + 1, p) << 8; + return ret; } return ret; } - static uint32_t gd5436_aperture2_readl(uint32_t addr, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - uint32_t ret = 0xffffffff; + gd54xx_t *gd54xx = (gd54xx_t *) p; + uint32_t ret = 0xffffffff; - if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && - gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - ret = gd5436_aperture2_readb(addr, p); - ret |= gd5436_aperture2_readb(addr + 1, p) << 8; - ret |= gd5436_aperture2_readb(addr + 2, p) << 16; - ret |= gd5436_aperture2_readb(addr + 3, p) << 24; - return ret; + if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + ret = gd5436_aperture2_readb(addr, p); + ret |= gd5436_aperture2_readb(addr + 1, p) << 8; + ret |= gd5436_aperture2_readb(addr + 2, p) << 16; + ret |= gd5436_aperture2_readb(addr + 3, p) << 24; + return ret; } return ret; } - static void gd5436_aperture2_writeb(uint32_t addr, uint8_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; + gd54xx_t *gd54xx = (gd54xx_t *) p; if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest - && gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) - gd54xx_mem_sys_src_write(gd54xx, val); + && gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) + gd54xx_mem_sys_src_write(gd54xx, val); } - static void gd5436_aperture2_writew(uint32_t addr, uint16_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; + gd54xx_t *gd54xx = (gd54xx_t *) p; if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest - && gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - gd5436_aperture2_writeb(addr, val, gd54xx); - gd5436_aperture2_writeb(addr + 1, val >> 8, gd54xx); + && gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + gd5436_aperture2_writeb(addr, val, gd54xx); + gd5436_aperture2_writeb(addr + 1, val >> 8, gd54xx); } } - static void gd5436_aperture2_writel(uint32_t addr, uint32_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; + gd54xx_t *gd54xx = (gd54xx_t *) p; if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest - && gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - gd5436_aperture2_writeb(addr, val, gd54xx); - gd5436_aperture2_writeb(addr + 1, val >> 8, gd54xx); - gd5436_aperture2_writeb(addr + 2, val >> 16, gd54xx); - gd5436_aperture2_writeb(addr + 3, val >> 24, gd54xx); + && gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + gd5436_aperture2_writeb(addr, val, gd54xx); + gd5436_aperture2_writeb(addr + 1, val >> 8, gd54xx); + gd5436_aperture2_writeb(addr + 2, val >> 16, gd54xx); + gd5436_aperture2_writeb(addr + 3, val >> 24, gd54xx); } } - static void gd54xx_writeb_linear(uint32_t addr, uint8_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; uint8_t ap = gd54xx_get_aperture(addr); if ((svga->seqregs[0x07] & 0x01) == 0) { - svga_write_linear(addr, val, svga); - return; + svga_write_linear(addr, val, svga); + return; } - addr &= 0x003fffff; /* 4 MB mask */ + addr &= 0x003fffff; /* 4 MB mask */ if ((addr >= (svga->vram_max - 256)) && (addr < svga->vram_max)) { - if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) { - gd543x_mmio_write(addr & 0x000000ff, val, gd54xx); - return; - } + if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) { + gd543x_mmio_write(addr & 0x000000ff, val, gd54xx); + return; + } } /* Do mem sys src writes here if the blitter is neither paused, nor is there a second aperture. */ - if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && - !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - gd54xx_mem_sys_src_write(gd54xx, val); - return; + if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + gd54xx_mem_sys_src_write(gd54xx, val); + return; } switch (ap) { - case 0: - default: - break; - case 1: - /* 0 -> 1, 1 -> 0, 2 -> 3, 3 -> 2 */ - addr ^= 0x00000001; - break; - case 2: - /* 0 -> 3, 1 -> 2, 2 -> 1, 3 -> 0 */ - addr ^= 0x00000003; - break; - case 3: - return; + case 0: + default: + break; + case 1: + /* 0 -> 1, 1 -> 0, 2 -> 3, 3 -> 2 */ + addr ^= 0x00000001; + break; + case 2: + /* 0 -> 3, 1 -> 2, 2 -> 1, 3 -> 0 */ + addr ^= 0x00000003; + break; + case 3: + return; } svga_write_linear(addr, val, svga); } - static void gd54xx_writew_linear(uint32_t addr, uint16_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; uint8_t ap = gd54xx_get_aperture(addr); if ((svga->seqregs[0x07] & 0x01) == 0) { - svga_writew_linear(addr, val, svga); - return; + svga_writew_linear(addr, val, svga); + return; } - addr &= 0x003fffff; /* 4 MB mask */ + addr &= 0x003fffff; /* 4 MB mask */ if ((addr >= (svga->vram_max - 256)) && (addr < svga->vram_max)) { - if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) { - gd543x_mmio_writew(addr & 0x000000ff, val, gd54xx); - return; - } + if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) { + gd543x_mmio_writew(addr & 0x000000ff, val, gd54xx); + return; + } } /* Do mem sys src writes here if the blitter is neither paused, nor is there a second aperture. */ - if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && - !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - gd54xx_writeb_linear(addr, val, gd54xx); - gd54xx_writeb_linear(addr + 1, val >> 8, gd54xx); - return; + if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + gd54xx_writeb_linear(addr, val, gd54xx); + gd54xx_writeb_linear(addr + 1, val >> 8, gd54xx); + return; } if (svga->writemode < 4) { - switch(ap) { - case 0: - default: - svga_writew_linear(addr, val, svga); - return; - case 2: - addr ^= 0x00000002; - case 1: - svga_writeb_linear(addr + 1, val & 0xff, svga); - svga_writeb_linear(addr, val >> 8, svga); + switch (ap) { + case 0: + default: + svga_writew_linear(addr, val, svga); + return; + case 2: + addr ^= 0x00000002; + case 1: + svga_writeb_linear(addr + 1, val & 0xff, svga); + svga_writeb_linear(addr, val >> 8, svga); - if (svga->fast) - cycles -= video_timing_write_w; - case 3: - return; - } + if (svga->fast) + cycles -= video_timing_write_w; + case 3: + return; + } } else { - switch(ap) { - case 0: - default: - svga_write_linear(addr, val & 0xff, svga); - svga_write_linear(addr + 1, val >> 8, svga); - return; - case 2: - addr ^= 0x00000002; - case 1: - svga_write_linear(addr + 1, val & 0xff, svga); - svga_write_linear(addr, val >> 8, svga); - case 3: - return; - } + switch (ap) { + case 0: + default: + svga_write_linear(addr, val & 0xff, svga); + svga_write_linear(addr + 1, val >> 8, svga); + return; + case 2: + addr ^= 0x00000002; + case 1: + svga_write_linear(addr + 1, val & 0xff, svga); + svga_write_linear(addr, val >> 8, svga); + case 3: + return; + } } } - static void gd54xx_writel_linear(uint32_t addr, uint32_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; uint8_t ap = gd54xx_get_aperture(addr); if ((svga->seqregs[0x07] & 0x01) == 0) { - svga_writel_linear(addr, val, svga); - return; + svga_writel_linear(addr, val, svga); + return; } - addr &= 0x003fffff; /* 4 MB mask */ + addr &= 0x003fffff; /* 4 MB mask */ if ((addr >= (svga->vram_max - 256)) && (addr < svga->vram_max)) { - if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) { - gd543x_mmio_writel(addr & 0x000000ff, val, gd54xx); - return; - } + if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR)) { + gd543x_mmio_writel(addr & 0x000000ff, val, gd54xx); + return; + } } /* Do mem sys src writes here if the blitter is neither paused, nor is there a second aperture. */ - if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && - !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - gd54xx_writeb_linear(addr, val, gd54xx); - gd54xx_writeb_linear(addr + 1, val >> 8, gd54xx); - gd54xx_writeb_linear(addr + 2, val >> 16, gd54xx); - gd54xx_writeb_linear(addr + 3, val >> 24, gd54xx); - return; + if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !gd54xx_aperture2_enabled(gd54xx) && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + gd54xx_writeb_linear(addr, val, gd54xx); + gd54xx_writeb_linear(addr + 1, val >> 8, gd54xx); + gd54xx_writeb_linear(addr + 2, val >> 16, gd54xx); + gd54xx_writeb_linear(addr + 3, val >> 24, gd54xx); + return; } if (svga->writemode < 4) { - switch(ap) { - case 0: - default: - svga_writel_linear(addr, val, svga); - return; - case 1: - svga_writeb_linear(addr + 1, val & 0xff, svga); - svga_writeb_linear(addr, val >> 8, svga); - svga_writeb_linear(addr + 3, val >> 16, svga); - svga_writeb_linear(addr + 2, val >> 24, svga); - return; - case 2: - svga_writeb_linear(addr + 3, val & 0xff, svga); - svga_writeb_linear(addr + 2, val >> 8, svga); - svga_writeb_linear(addr + 1, val >> 16, svga); - svga_writeb_linear(addr, val >> 24, svga); - case 3: - return; - } + switch (ap) { + case 0: + default: + svga_writel_linear(addr, val, svga); + return; + case 1: + svga_writeb_linear(addr + 1, val & 0xff, svga); + svga_writeb_linear(addr, val >> 8, svga); + svga_writeb_linear(addr + 3, val >> 16, svga); + svga_writeb_linear(addr + 2, val >> 24, svga); + return; + case 2: + svga_writeb_linear(addr + 3, val & 0xff, svga); + svga_writeb_linear(addr + 2, val >> 8, svga); + svga_writeb_linear(addr + 1, val >> 16, svga); + svga_writeb_linear(addr, val >> 24, svga); + case 3: + return; + } } else { - switch(ap) { - case 0: - default: - svga_write_linear(addr, val & 0xff, svga); - svga_write_linear(addr+1, val >> 8, svga); - svga_write_linear(addr+2, val >> 16, svga); - svga_write_linear(addr+3, val >> 24, svga); - return; - case 1: - svga_write_linear(addr + 1, val & 0xff, svga); - svga_write_linear(addr, val >> 8, svga); - svga_write_linear(addr + 3, val >> 16, svga); - svga_write_linear(addr + 2, val >> 24, svga); - return; - case 2: - svga_write_linear(addr + 3, val & 0xff, svga); - svga_write_linear(addr + 2, val >> 8, svga); - svga_write_linear(addr + 1, val >> 16, svga); - svga_write_linear(addr, val >> 24, svga); - case 3: - return; - } + switch (ap) { + case 0: + default: + svga_write_linear(addr, val & 0xff, svga); + svga_write_linear(addr + 1, val >> 8, svga); + svga_write_linear(addr + 2, val >> 16, svga); + svga_write_linear(addr + 3, val >> 24, svga); + return; + case 1: + svga_write_linear(addr + 1, val & 0xff, svga); + svga_write_linear(addr, val >> 8, svga); + svga_write_linear(addr + 3, val >> 16, svga); + svga_write_linear(addr + 2, val >> 24, svga); + return; + case 2: + svga_write_linear(addr + 3, val & 0xff, svga); + svga_write_linear(addr + 2, val >> 8, svga); + svga_write_linear(addr + 1, val >> 16, svga); + svga_write_linear(addr, val >> 24, svga); + case 3: + return; + } } } - static uint8_t gd54xx_read(uint32_t addr, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; if ((svga->seqregs[0x07] & 0x01) == 0) - return svga_read(addr, svga); + return svga_read(addr, svga); - if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && - !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) - return gd54xx_mem_sys_dest_read(gd54xx); + if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) + return gd54xx_mem_sys_dest_read(gd54xx); addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1]; return svga_read_linear(addr, svga); } - static uint16_t gd54xx_readw(uint32_t addr, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; - uint16_t ret; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; + uint16_t ret; if ((svga->seqregs[0x07] & 0x01) == 0) - return svga_readw(addr, svga); + return svga_readw(addr, svga); - if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && - !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - ret = gd54xx_read(addr, p); - ret |= gd54xx_read(addr + 1, p) << 8; - return ret; + if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + ret = gd54xx_read(addr, p); + ret |= gd54xx_read(addr + 1, p) << 8; + return ret; } addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1]; return svga_readw_linear(addr, svga); } - static uint32_t gd54xx_readl(uint32_t addr, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; - uint32_t ret; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; + uint32_t ret; if ((svga->seqregs[0x07] & 0x01) == 0) - return svga_readl(addr, svga); + return svga_readl(addr, svga); - if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && - !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - ret = gd54xx_read(addr, p); - ret |= gd54xx_read(addr + 1, p) << 8; - ret |= gd54xx_read(addr + 2, p) << 16; - ret |= gd54xx_read(addr + 3, p) << 24; - return ret; + if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + ret = gd54xx_read(addr, p); + ret |= gd54xx_read(addr + 1, p) << 8; + ret |= gd54xx_read(addr + 2, p) << 16; + ret |= gd54xx_read(addr + 3, p) << 24; + return ret; } addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1]; return svga_readl_linear(addr, svga); } - static int gd543x_do_mmio(svga_t *svga, uint32_t addr) { if (svga->seqregs[0x17] & CIRRUS_MMIO_USE_PCIADDR) - return 1; + return 1; else - return ((addr & ~0xff) == 0xb8000); + return ((addr & ~0xff) == 0xb8000); } - static void gd543x_mmio_write(uint32_t addr, uint8_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; - uint8_t old; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; + uint8_t old; if (gd543x_do_mmio(svga, addr)) { - switch (addr & 0xff) { - case 0x00: - if (gd54xx_is_5434(svga)) - gd54xx->blt.bg_col = (gd54xx->blt.bg_col & 0xffffff00) | val; - else - gd54xx->blt.bg_col = (gd54xx->blt.bg_col & 0xff00) | val; - break; - case 0x01: - if (gd54xx_is_5434(svga)) - gd54xx->blt.bg_col = (gd54xx->blt.bg_col & 0xffff00ff) | (val << 8); - else - gd54xx->blt.bg_col = (gd54xx->blt.bg_col & 0x00ff) | (val << 8); - break; - case 0x02: - if (gd54xx_is_5434(svga)) - gd54xx->blt.bg_col = (gd54xx->blt.bg_col & 0xff00ffff) | (val << 16); - break; - case 0x03: - if (gd54xx_is_5434(svga)) - gd54xx->blt.bg_col = (gd54xx->blt.bg_col & 0x00ffffff) | (val << 24); - break; + switch (addr & 0xff) { + case 0x00: + if (gd54xx_is_5434(svga)) + gd54xx->blt.bg_col = (gd54xx->blt.bg_col & 0xffffff00) | val; + else + gd54xx->blt.bg_col = (gd54xx->blt.bg_col & 0xff00) | val; + break; + case 0x01: + if (gd54xx_is_5434(svga)) + gd54xx->blt.bg_col = (gd54xx->blt.bg_col & 0xffff00ff) | (val << 8); + else + gd54xx->blt.bg_col = (gd54xx->blt.bg_col & 0x00ff) | (val << 8); + break; + case 0x02: + if (gd54xx_is_5434(svga)) + gd54xx->blt.bg_col = (gd54xx->blt.bg_col & 0xff00ffff) | (val << 16); + break; + case 0x03: + if (gd54xx_is_5434(svga)) + gd54xx->blt.bg_col = (gd54xx->blt.bg_col & 0x00ffffff) | (val << 24); + break; - case 0x04: - if (gd54xx_is_5434(svga)) - gd54xx->blt.fg_col = (gd54xx->blt.fg_col & 0xffffff00) | val; - else - gd54xx->blt.fg_col = (gd54xx->blt.fg_col & 0xff00) | val; - break; - case 0x05: - if (gd54xx_is_5434(svga)) - gd54xx->blt.fg_col = (gd54xx->blt.fg_col & 0xffff00ff) | (val << 8); - else - gd54xx->blt.fg_col = (gd54xx->blt.fg_col & 0x00ff) | (val << 8); - break; - case 0x06: - if (gd54xx_is_5434(svga)) - gd54xx->blt.fg_col = (gd54xx->blt.fg_col & 0xff00ffff) | (val << 16); - break; - case 0x07: - if (gd54xx_is_5434(svga)) - gd54xx->blt.fg_col = (gd54xx->blt.fg_col & 0x00ffffff) | (val << 24); - break; + case 0x04: + if (gd54xx_is_5434(svga)) + gd54xx->blt.fg_col = (gd54xx->blt.fg_col & 0xffffff00) | val; + else + gd54xx->blt.fg_col = (gd54xx->blt.fg_col & 0xff00) | val; + break; + case 0x05: + if (gd54xx_is_5434(svga)) + gd54xx->blt.fg_col = (gd54xx->blt.fg_col & 0xffff00ff) | (val << 8); + else + gd54xx->blt.fg_col = (gd54xx->blt.fg_col & 0x00ff) | (val << 8); + break; + case 0x06: + if (gd54xx_is_5434(svga)) + gd54xx->blt.fg_col = (gd54xx->blt.fg_col & 0xff00ffff) | (val << 16); + break; + case 0x07: + if (gd54xx_is_5434(svga)) + gd54xx->blt.fg_col = (gd54xx->blt.fg_col & 0x00ffffff) | (val << 24); + break; - case 0x08: - gd54xx->blt.width = (gd54xx->blt.width & 0xff00) | val; - break; - case 0x09: - gd54xx->blt.width = (gd54xx->blt.width & 0x00ff) | (val << 8); - if (gd54xx_is_5434(svga)) - gd54xx->blt.width &= 0x1fff; - else - gd54xx->blt.width &= 0x07ff; - break; - case 0x0a: - gd54xx->blt.height = (gd54xx->blt.height & 0xff00) | val; - break; - case 0x0b: - gd54xx->blt.height = (gd54xx->blt.height & 0x00ff) | (val << 8); - if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) - gd54xx->blt.height &= 0x07ff; - else - gd54xx->blt.height &= 0x03ff; - break; - case 0x0c: - gd54xx->blt.dst_pitch = (gd54xx->blt.dst_pitch & 0xff00) | val; - break; - case 0x0d: - gd54xx->blt.dst_pitch = (gd54xx->blt.dst_pitch & 0x00ff) | (val << 8); - gd54xx->blt.dst_pitch &= 0x1fff; - break; - case 0x0e: - gd54xx->blt.src_pitch = (gd54xx->blt.src_pitch & 0xff00) | val; - break; - case 0x0f: - gd54xx->blt.src_pitch = (gd54xx->blt.src_pitch & 0x00ff) | (val << 8); - gd54xx->blt.src_pitch &= 0x1fff; - break; + case 0x08: + gd54xx->blt.width = (gd54xx->blt.width & 0xff00) | val; + break; + case 0x09: + gd54xx->blt.width = (gd54xx->blt.width & 0x00ff) | (val << 8); + if (gd54xx_is_5434(svga)) + gd54xx->blt.width &= 0x1fff; + else + gd54xx->blt.width &= 0x07ff; + break; + case 0x0a: + gd54xx->blt.height = (gd54xx->blt.height & 0xff00) | val; + break; + case 0x0b: + gd54xx->blt.height = (gd54xx->blt.height & 0x00ff) | (val << 8); + if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) + gd54xx->blt.height &= 0x07ff; + else + gd54xx->blt.height &= 0x03ff; + break; + case 0x0c: + gd54xx->blt.dst_pitch = (gd54xx->blt.dst_pitch & 0xff00) | val; + break; + case 0x0d: + gd54xx->blt.dst_pitch = (gd54xx->blt.dst_pitch & 0x00ff) | (val << 8); + gd54xx->blt.dst_pitch &= 0x1fff; + break; + case 0x0e: + gd54xx->blt.src_pitch = (gd54xx->blt.src_pitch & 0xff00) | val; + break; + case 0x0f: + gd54xx->blt.src_pitch = (gd54xx->blt.src_pitch & 0x00ff) | (val << 8); + gd54xx->blt.src_pitch &= 0x1fff; + break; - case 0x10: - gd54xx->blt.dst_addr = (gd54xx->blt.dst_addr & 0xffff00) | val; - break; - case 0x11: - gd54xx->blt.dst_addr = (gd54xx->blt.dst_addr & 0xff00ff) | (val << 8); - break; - case 0x12: - gd54xx->blt.dst_addr = (gd54xx->blt.dst_addr & 0x00ffff) | (val << 16); - if (gd54xx_is_5434(svga)) - gd54xx->blt.dst_addr &= 0x3fffff; - else - gd54xx->blt.dst_addr &= 0x1fffff; + case 0x10: + gd54xx->blt.dst_addr = (gd54xx->blt.dst_addr & 0xffff00) | val; + break; + case 0x11: + gd54xx->blt.dst_addr = (gd54xx->blt.dst_addr & 0xff00ff) | (val << 8); + break; + case 0x12: + gd54xx->blt.dst_addr = (gd54xx->blt.dst_addr & 0x00ffff) | (val << 16); + if (gd54xx_is_5434(svga)) + gd54xx->blt.dst_addr &= 0x3fffff; + else + gd54xx->blt.dst_addr &= 0x1fffff; - if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) && (gd54xx->blt.status & CIRRUS_BLT_AUTOSTART) && - !(gd54xx->blt.status & CIRRUS_BLT_BUSY)) { - gd54xx->blt.status |= CIRRUS_BLT_BUSY; - gd54xx_start_blit(0, 0xffffffff, gd54xx, svga); - } - break; + if ((svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) && (gd54xx->blt.status & CIRRUS_BLT_AUTOSTART) && !(gd54xx->blt.status & CIRRUS_BLT_BUSY)) { + gd54xx->blt.status |= CIRRUS_BLT_BUSY; + gd54xx_start_blit(0, 0xffffffff, gd54xx, svga); + } + break; - case 0x14: - gd54xx->blt.src_addr = (gd54xx->blt.src_addr & 0xffff00) | val; - break; - case 0x15: - gd54xx->blt.src_addr = (gd54xx->blt.src_addr & 0xff00ff) | (val << 8); - break; - case 0x16: - gd54xx->blt.src_addr = (gd54xx->blt.src_addr & 0x00ffff) | (val << 16); - if (gd54xx_is_5434(svga)) - gd54xx->blt.src_addr &= 0x3fffff; - else - gd54xx->blt.src_addr &= 0x1fffff; - break; + case 0x14: + gd54xx->blt.src_addr = (gd54xx->blt.src_addr & 0xffff00) | val; + break; + case 0x15: + gd54xx->blt.src_addr = (gd54xx->blt.src_addr & 0xff00ff) | (val << 8); + break; + case 0x16: + gd54xx->blt.src_addr = (gd54xx->blt.src_addr & 0x00ffff) | (val << 16); + if (gd54xx_is_5434(svga)) + gd54xx->blt.src_addr &= 0x3fffff; + else + gd54xx->blt.src_addr &= 0x1fffff; + break; - case 0x17: - gd54xx->blt.mask = val; - break; - case 0x18: - gd54xx->blt.mode = val; - gd543x_recalc_mapping(gd54xx); - break; + case 0x17: + gd54xx->blt.mask = val; + break; + case 0x18: + gd54xx->blt.mode = val; + gd543x_recalc_mapping(gd54xx); + break; - case 0x1a: - gd54xx->blt.rop = val; - break; + case 0x1a: + gd54xx->blt.rop = val; + break; - case 0x1b: - if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) - gd54xx->blt.modeext = val; - break; + case 0x1b: + if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) + gd54xx->blt.modeext = val; + break; - case 0x1c: - gd54xx->blt.trans_col = (gd54xx->blt.trans_col & 0xff00) | val; - break; - case 0x1d: - gd54xx->blt.trans_col = (gd54xx->blt.trans_col & 0x00ff) | (val << 8); - break; + case 0x1c: + gd54xx->blt.trans_col = (gd54xx->blt.trans_col & 0xff00) | val; + break; + case 0x1d: + gd54xx->blt.trans_col = (gd54xx->blt.trans_col & 0x00ff) | (val << 8); + break; - case 0x20: - gd54xx->blt.trans_mask = (gd54xx->blt.trans_mask & 0xff00) | val; - break; - case 0x21: - gd54xx->blt.trans_mask = (gd54xx->blt.trans_mask & 0x00ff) | (val << 8); - break; + case 0x20: + gd54xx->blt.trans_mask = (gd54xx->blt.trans_mask & 0xff00) | val; + break; + case 0x21: + gd54xx->blt.trans_mask = (gd54xx->blt.trans_mask & 0x00ff) | (val << 8); + break; - case 0x40: - old = gd54xx->blt.status; - gd54xx->blt.status = val; - gd543x_recalc_mapping(gd54xx); - if (!(old & CIRRUS_BLT_RESET) && (gd54xx->blt.status & CIRRUS_BLT_RESET)) - gd54xx_reset_blit(gd54xx); - else if (!(old & CIRRUS_BLT_START) && (gd54xx->blt.status & CIRRUS_BLT_START)) { - gd54xx->blt.status |= CIRRUS_BLT_BUSY; - gd54xx_start_blit(0, 0xffffffff, gd54xx, svga); - } - break; - } + case 0x40: + old = gd54xx->blt.status; + gd54xx->blt.status = val; + gd543x_recalc_mapping(gd54xx); + if (!(old & CIRRUS_BLT_RESET) && (gd54xx->blt.status & CIRRUS_BLT_RESET)) + gd54xx_reset_blit(gd54xx); + else if (!(old & CIRRUS_BLT_START) && (gd54xx->blt.status & CIRRUS_BLT_START)) { + gd54xx->blt.status |= CIRRUS_BLT_BUSY; + gd54xx_start_blit(0, 0xffffffff, gd54xx, svga); + } + break; + } } else if (gd54xx->mmio_vram_overlap) - gd54xx_write(addr, val, gd54xx); + gd54xx_write(addr, val, gd54xx); } - static void gd543x_mmio_writeb(uint32_t addr, uint8_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; - if (!gd543x_do_mmio(svga, addr) && !gd54xx->blt.ms_is_dest && - gd54xx->countminusone && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - gd54xx_mem_sys_src_write(gd54xx, val); - return; + if (!gd543x_do_mmio(svga, addr) && !gd54xx->blt.ms_is_dest && gd54xx->countminusone && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + gd54xx_mem_sys_src_write(gd54xx, val); + return; } gd543x_mmio_write(addr, val, p); } - static void gd543x_mmio_writew(uint32_t addr, uint16_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; if (gd543x_do_mmio(svga, addr)) { - gd543x_mmio_write(addr, val & 0xff, gd54xx); - gd543x_mmio_write(addr + 1, val >> 8, gd54xx); + gd543x_mmio_write(addr, val & 0xff, gd54xx); + gd543x_mmio_write(addr + 1, val >> 8, gd54xx); } else if (gd54xx->mmio_vram_overlap) { - if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && - !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - gd543x_mmio_write(addr, val & 0xff, gd54xx); - gd543x_mmio_write(addr + 1, val >> 8, gd54xx); - } else { - gd54xx_write(addr, val, gd54xx); - gd54xx_write(addr + 1, val >> 8, gd54xx); - } + if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + gd543x_mmio_write(addr, val & 0xff, gd54xx); + gd543x_mmio_write(addr + 1, val >> 8, gd54xx); + } else { + gd54xx_write(addr, val, gd54xx); + gd54xx_write(addr + 1, val >> 8, gd54xx); + } } } - static void gd543x_mmio_writel(uint32_t addr, uint32_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; if (gd543x_do_mmio(svga, addr)) { - gd543x_mmio_write(addr, val & 0xff, gd54xx); - gd543x_mmio_write(addr+1, val >> 8, gd54xx); - gd543x_mmio_write(addr+2, val >> 16, gd54xx); - gd543x_mmio_write(addr+3, val >> 24, gd54xx); + gd543x_mmio_write(addr, val & 0xff, gd54xx); + gd543x_mmio_write(addr + 1, val >> 8, gd54xx); + gd543x_mmio_write(addr + 2, val >> 16, gd54xx); + gd543x_mmio_write(addr + 3, val >> 24, gd54xx); } else if (gd54xx->mmio_vram_overlap) { - if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && - !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - gd543x_mmio_write(addr, val & 0xff, gd54xx); - gd543x_mmio_write(addr+1, val >> 8, gd54xx); - gd543x_mmio_write(addr+2, val >> 16, gd54xx); - gd543x_mmio_write(addr+3, val >> 24, gd54xx); - } else { - gd54xx_write(addr, val, gd54xx); - gd54xx_write(addr+1, val >> 8, gd54xx); - gd54xx_write(addr+2, val >> 16, gd54xx); - gd54xx_write(addr+3, val >> 24, gd54xx); - } + if (gd54xx->countminusone && !gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + gd543x_mmio_write(addr, val & 0xff, gd54xx); + gd543x_mmio_write(addr + 1, val >> 8, gd54xx); + gd543x_mmio_write(addr + 2, val >> 16, gd54xx); + gd543x_mmio_write(addr + 3, val >> 24, gd54xx); + } else { + gd54xx_write(addr, val, gd54xx); + gd54xx_write(addr + 1, val >> 8, gd54xx); + gd54xx_write(addr + 2, val >> 16, gd54xx); + gd54xx_write(addr + 3, val >> 24, gd54xx); + } } } - static uint8_t gd543x_mmio_read(uint32_t addr, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; - uint8_t ret = 0xff; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; + uint8_t ret = 0xff; if (gd543x_do_mmio(svga, addr)) { - switch (addr & 0xff) { - case 0x00: - ret = gd54xx->blt.bg_col & 0xff; - break; - case 0x01: - ret = (gd54xx->blt.bg_col >> 8) & 0xff; - break; - case 0x02: - if (gd54xx_is_5434(svga)) - ret = (gd54xx->blt.bg_col >> 16) & 0xff; - break; - case 0x03: - if (gd54xx_is_5434(svga)) - ret = (gd54xx->blt.bg_col >> 24) & 0xff; - break; + switch (addr & 0xff) { + case 0x00: + ret = gd54xx->blt.bg_col & 0xff; + break; + case 0x01: + ret = (gd54xx->blt.bg_col >> 8) & 0xff; + break; + case 0x02: + if (gd54xx_is_5434(svga)) + ret = (gd54xx->blt.bg_col >> 16) & 0xff; + break; + case 0x03: + if (gd54xx_is_5434(svga)) + ret = (gd54xx->blt.bg_col >> 24) & 0xff; + break; - case 0x04: - ret = gd54xx->blt.fg_col & 0xff; - break; - case 0x05: - ret = (gd54xx->blt.fg_col >> 8) & 0xff; - break; - case 0x06: - if (gd54xx_is_5434(svga)) - ret = (gd54xx->blt.fg_col >> 16) & 0xff; - break; - case 0x07: - if (gd54xx_is_5434(svga)) - ret = (gd54xx->blt.fg_col >> 24) & 0xff; - break; + case 0x04: + ret = gd54xx->blt.fg_col & 0xff; + break; + case 0x05: + ret = (gd54xx->blt.fg_col >> 8) & 0xff; + break; + case 0x06: + if (gd54xx_is_5434(svga)) + ret = (gd54xx->blt.fg_col >> 16) & 0xff; + break; + case 0x07: + if (gd54xx_is_5434(svga)) + ret = (gd54xx->blt.fg_col >> 24) & 0xff; + break; - case 0x08: - ret = gd54xx->blt.width & 0xff; - break; - case 0x09: - if (gd54xx_is_5434(svga)) - ret = (gd54xx->blt.width >> 8) & 0x1f; - else - ret = (gd54xx->blt.width >> 8) & 0x07; - break; - case 0x0a: - ret = gd54xx->blt.height & 0xff; - break; - case 0x0b: - if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) - ret = (gd54xx->blt.height >> 8) & 0x07; - else - ret = (gd54xx->blt.height >> 8) & 0x03; - break; - case 0x0c: - ret = gd54xx->blt.dst_pitch & 0xff; - break; - case 0x0d: - ret = (gd54xx->blt.dst_pitch >> 8) & 0x1f; - break; - case 0x0e: - ret = gd54xx->blt.src_pitch & 0xff; - break; - case 0x0f: - ret = (gd54xx->blt.src_pitch >> 8) & 0x1f; - break; + case 0x08: + ret = gd54xx->blt.width & 0xff; + break; + case 0x09: + if (gd54xx_is_5434(svga)) + ret = (gd54xx->blt.width >> 8) & 0x1f; + else + ret = (gd54xx->blt.width >> 8) & 0x07; + break; + case 0x0a: + ret = gd54xx->blt.height & 0xff; + break; + case 0x0b: + if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) + ret = (gd54xx->blt.height >> 8) & 0x07; + else + ret = (gd54xx->blt.height >> 8) & 0x03; + break; + case 0x0c: + ret = gd54xx->blt.dst_pitch & 0xff; + break; + case 0x0d: + ret = (gd54xx->blt.dst_pitch >> 8) & 0x1f; + break; + case 0x0e: + ret = gd54xx->blt.src_pitch & 0xff; + break; + case 0x0f: + ret = (gd54xx->blt.src_pitch >> 8) & 0x1f; + break; - case 0x10: - ret = gd54xx->blt.dst_addr & 0xff; - break; - case 0x11: - ret = (gd54xx->blt.dst_addr >> 8) & 0xff; - break; - case 0x12: - if (gd54xx_is_5434(svga)) - ret = (gd54xx->blt.dst_addr >> 16) & 0x3f; - else - ret = (gd54xx->blt.dst_addr >> 16) & 0x1f; - break; + case 0x10: + ret = gd54xx->blt.dst_addr & 0xff; + break; + case 0x11: + ret = (gd54xx->blt.dst_addr >> 8) & 0xff; + break; + case 0x12: + if (gd54xx_is_5434(svga)) + ret = (gd54xx->blt.dst_addr >> 16) & 0x3f; + else + ret = (gd54xx->blt.dst_addr >> 16) & 0x1f; + break; - case 0x14: - ret = gd54xx->blt.src_addr & 0xff; - break; - case 0x15: - ret = (gd54xx->blt.src_addr >> 8) & 0xff; - break; - case 0x16: - if (gd54xx_is_5434(svga)) - ret = (gd54xx->blt.src_addr >> 16) & 0x3f; - else - ret = (gd54xx->blt.src_addr >> 16) & 0x1f; - break; + case 0x14: + ret = gd54xx->blt.src_addr & 0xff; + break; + case 0x15: + ret = (gd54xx->blt.src_addr >> 8) & 0xff; + break; + case 0x16: + if (gd54xx_is_5434(svga)) + ret = (gd54xx->blt.src_addr >> 16) & 0x3f; + else + ret = (gd54xx->blt.src_addr >> 16) & 0x1f; + break; - case 0x17: - ret = gd54xx->blt.mask; - break; - case 0x18: - ret = gd54xx->blt.mode; - break; + case 0x17: + ret = gd54xx->blt.mask; + break; + case 0x18: + ret = gd54xx->blt.mode; + break; - case 0x1a: - ret = gd54xx->blt.rop; - break; + case 0x1a: + ret = gd54xx->blt.rop; + break; - case 0x1b: - if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) - ret = gd54xx->blt.modeext; - break; + case 0x1b: + if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) + ret = gd54xx->blt.modeext; + break; - case 0x1c: - ret = gd54xx->blt.trans_col & 0xff; - break; - case 0x1d: - ret = (gd54xx->blt.trans_col >> 8) & 0xff; - break; + case 0x1c: + ret = gd54xx->blt.trans_col & 0xff; + break; + case 0x1d: + ret = (gd54xx->blt.trans_col >> 8) & 0xff; + break; - case 0x20: - ret = gd54xx->blt.trans_mask & 0xff; - break; - case 0x21: - ret = (gd54xx->blt.trans_mask >> 8) & 0xff; - break; + case 0x20: + ret = gd54xx->blt.trans_mask & 0xff; + break; + case 0x21: + ret = (gd54xx->blt.trans_mask >> 8) & 0xff; + break; - case 0x40: - ret = gd54xx->blt.status; - break; - } + case 0x40: + ret = gd54xx->blt.status; + break; + } } else if (gd54xx->mmio_vram_overlap) - ret = gd54xx_read(addr, gd54xx); - else if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && - !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - ret = gd54xx_mem_sys_dest_read(gd54xx); + ret = gd54xx_read(addr, gd54xx); + else if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + ret = gd54xx_mem_sys_dest_read(gd54xx); } return ret; } - static uint16_t gd543x_mmio_readw(uint32_t addr, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; - uint16_t ret = 0xffff; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; + uint16_t ret = 0xffff; if (gd543x_do_mmio(svga, addr)) - ret = gd543x_mmio_read(addr, gd54xx) | (gd543x_mmio_read(addr+1, gd54xx) << 8); + ret = gd543x_mmio_read(addr, gd54xx) | (gd543x_mmio_read(addr + 1, gd54xx) << 8); else if (gd54xx->mmio_vram_overlap) - ret = gd54xx_read(addr, gd54xx) | (gd54xx_read(addr+1, gd54xx) << 8); - else if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && - !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - ret = gd543x_mmio_read(addr, p); - ret |= gd543x_mmio_read(addr + 1, p) << 8; - return ret; + ret = gd54xx_read(addr, gd54xx) | (gd54xx_read(addr + 1, gd54xx) << 8); + else if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + ret = gd543x_mmio_read(addr, p); + ret |= gd543x_mmio_read(addr + 1, p) << 8; + return ret; } return ret; } - static uint32_t gd543x_mmio_readl(uint32_t addr, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; - uint32_t ret = 0xffffffff; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; + uint32_t ret = 0xffffffff; if (gd543x_do_mmio(svga, addr)) - ret = gd543x_mmio_read(addr, gd54xx) | (gd543x_mmio_read(addr+1, gd54xx) << 8) | (gd543x_mmio_read(addr+2, gd54xx) << 16) | (gd543x_mmio_read(addr+3, gd54xx) << 24); + ret = gd543x_mmio_read(addr, gd54xx) | (gd543x_mmio_read(addr + 1, gd54xx) << 8) | (gd543x_mmio_read(addr + 2, gd54xx) << 16) | (gd543x_mmio_read(addr + 3, gd54xx) << 24); else if (gd54xx->mmio_vram_overlap) - ret = gd54xx_read(addr, gd54xx) | (gd54xx_read(addr+1, gd54xx) << 8) | (gd54xx_read(addr+2, gd54xx) << 16) | (gd54xx_read(addr+3, gd54xx) << 24); - else if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && - !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { - ret = gd543x_mmio_read(addr, p); - ret |= gd543x_mmio_read(addr + 1, p) << 8; - ret |= gd543x_mmio_read(addr + 2, p) << 16; - ret |= gd543x_mmio_read(addr + 3, p) << 24; - return ret; + ret = gd54xx_read(addr, gd54xx) | (gd54xx_read(addr + 1, gd54xx) << 8) | (gd54xx_read(addr + 2, gd54xx) << 16) | (gd54xx_read(addr + 3, gd54xx) << 24); + else if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED)) { + ret = gd543x_mmio_read(addr, p); + ret |= gd543x_mmio_read(addr + 1, p) << 8; + ret |= gd543x_mmio_read(addr + 2, p) << 16; + ret |= gd543x_mmio_read(addr + 3, p) << 24; + return ret; } return ret; } - static void gd5480_vgablt_write(uint32_t addr, uint8_t val, void *p) { addr &= 0x00000fff; if ((addr >= 0x00000100) && (addr < 0x00000200)) - gd543x_mmio_writeb((addr & 0x000000ff) | 0x000b8000, val, p); + gd543x_mmio_writeb((addr & 0x000000ff) | 0x000b8000, val, p); else if (addr < 0x00000100) - gd54xx_out(0x03c0 + addr, val, p); + gd54xx_out(0x03c0 + addr, val, p); } - static void gd5480_vgablt_writew(uint32_t addr, uint16_t val, void *p) { addr &= 0x00000fff; if ((addr >= 0x00000100) && (addr < 0x00000200)) - gd543x_mmio_writew((addr & 0x000000ff) | 0x000b8000, val, p); + gd543x_mmio_writew((addr & 0x000000ff) | 0x000b8000, val, p); else if (addr < 0x00000100) { - gd5480_vgablt_write(addr, val & 0xff, p); - gd5480_vgablt_write(addr + 1, val >> 8, p); - } + gd5480_vgablt_write(addr, val & 0xff, p); + gd5480_vgablt_write(addr + 1, val >> 8, p); + } } - static void gd5480_vgablt_writel(uint32_t addr, uint32_t val, void *p) { addr &= 0x00000fff; if ((addr >= 0x00000100) && (addr < 0x00000200)) - gd543x_mmio_writel((addr & 0x000000ff) | 0x000b8000, val, p); + gd543x_mmio_writel((addr & 0x000000ff) | 0x000b8000, val, p); else if (addr < 0x00000100) { - gd5480_vgablt_writew(addr, val & 0xffff, p); - gd5480_vgablt_writew(addr + 2, val >> 16, p); - } + gd5480_vgablt_writew(addr, val & 0xffff, p); + gd5480_vgablt_writew(addr + 2, val >> 16, p); + } } - static uint8_t gd5480_vgablt_read(uint32_t addr, void *p) { @@ -3111,14 +3059,13 @@ gd5480_vgablt_read(uint32_t addr, void *p) addr &= 0x00000fff; if ((addr >= 0x00000100) && (addr < 0x00000200)) - ret = gd543x_mmio_read((addr & 0x000000ff) | 0x000b8000, p); + ret = gd543x_mmio_read((addr & 0x000000ff) | 0x000b8000, p); else if (addr < 0x00000100) - ret = gd54xx_in(0x03c0 + addr, p); + ret = gd54xx_in(0x03c0 + addr, p); return ret; } - static uint16_t gd5480_vgablt_readw(uint32_t addr, void *p) { @@ -3127,16 +3074,15 @@ gd5480_vgablt_readw(uint32_t addr, void *p) addr &= 0x00000fff; if ((addr >= 0x00000100) && (addr < 0x00000200)) - ret = gd543x_mmio_readw((addr & 0x000000ff) | 0x000b8000, p); + ret = gd543x_mmio_readw((addr & 0x000000ff) | 0x000b8000, p); else if (addr < 0x00000100) { - ret = gd5480_vgablt_read(addr, p); - ret |= (gd5480_vgablt_read(addr + 1, p) << 8); + ret = gd5480_vgablt_read(addr, p); + ret |= (gd5480_vgablt_read(addr + 1, p) << 8); } return ret; } - static uint32_t gd5480_vgablt_readl(uint32_t addr, void *p) { @@ -3145,54 +3091,51 @@ gd5480_vgablt_readl(uint32_t addr, void *p) addr &= 0x00000fff; if ((addr >= 0x00000100) && (addr < 0x00000200)) - ret = gd543x_mmio_readl((addr & 0x000000ff) | 0x000b8000, p); + ret = gd543x_mmio_readl((addr & 0x000000ff) | 0x000b8000, p); else if (addr < 0x00000100) { - ret = gd5480_vgablt_readw(addr, p); - ret |= (gd5480_vgablt_readw(addr + 2, p) << 16); + ret = gd5480_vgablt_readw(addr, p); + ret |= (gd5480_vgablt_readw(addr + 2, p) << 16); } return ret; } - static uint8_t gd54xx_color_expand(gd54xx_t *gd54xx, int mask, int shift) { uint8_t ret; if (gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP) - ret = gd54xx->blt.fg_col >> (shift << 3); + ret = gd54xx->blt.fg_col >> (shift << 3); else - ret = mask ? (gd54xx->blt.fg_col >> (shift << 3)) : (gd54xx->blt.bg_col >> (shift << 3)); + ret = mask ? (gd54xx->blt.fg_col >> (shift << 3)) : (gd54xx->blt.bg_col >> (shift << 3)); return ret; } - static int gd54xx_get_pixel_width(gd54xx_t *gd54xx) { int ret = 1; switch (gd54xx->blt.mode & CIRRUS_BLTMODE_PIXELWIDTHMASK) { - case CIRRUS_BLTMODE_PIXELWIDTH8: - ret = 1; - break; - case CIRRUS_BLTMODE_PIXELWIDTH16: - ret = 2; - break; - case CIRRUS_BLTMODE_PIXELWIDTH24: - ret = 3; - break; - case CIRRUS_BLTMODE_PIXELWIDTH32: - ret = 4; - break; + case CIRRUS_BLTMODE_PIXELWIDTH8: + ret = 1; + break; + case CIRRUS_BLTMODE_PIXELWIDTH16: + ret = 2; + break; + case CIRRUS_BLTMODE_PIXELWIDTH24: + ret = 3; + break; + case CIRRUS_BLTMODE_PIXELWIDTH32: + ret = 4; + break; } return ret; } - static void gd54xx_blit(gd54xx_t *gd54xx, uint8_t mask, uint8_t *dst, uint8_t target, int skip) { @@ -3200,70 +3143,67 @@ gd54xx_blit(gd54xx_t *gd54xx, uint8_t mask, uint8_t *dst, uint8_t target, int sk /* skip indicates whether or not it is a pixel to be skipped (used for left skip); mask indicates transparency or not (only when transparent comparison is enabled): - color expand: direct pattern bit; 1 = write, 0 = do not write - (the other way around in inverse mode); - normal 8-bpp or 16-bpp: does not match transparent color = write, - matches transparent color = do not write */ + color expand: direct pattern bit; 1 = write, 0 = do not write + (the other way around in inverse mode); + normal 8-bpp or 16-bpp: does not match transparent color = write, + matches transparent color = do not write */ /* Make sure to always ignore transparency and skip in case of mem sys dest. */ is_transp = (gd54xx->blt.mode & CIRRUS_BLTMODE_MEMSYSDEST) ? 0 : (gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP); is_bgonly = (gd54xx->blt.mode & CIRRUS_BLTMODE_MEMSYSDEST) ? 0 : (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_BACKGROUNDONLY); - skip = (gd54xx->blt.mode & CIRRUS_BLTMODE_MEMSYSDEST) ? 0 : skip; + skip = (gd54xx->blt.mode & CIRRUS_BLTMODE_MEMSYSDEST) ? 0 : skip; if (is_transp) { - if ((gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && - (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_COLOREXPINV)) - mask = !mask; + if ((gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_COLOREXPINV)) + mask = !mask; - /* If mask is 1 and it is not a pixel to be skipped, write it. */ - if (mask && !skip) - *dst = target; + /* If mask is 1 and it is not a pixel to be skipped, write it. */ + if (mask && !skip) + *dst = target; } else if ((gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && is_bgonly) { - /* If mask is 1 or it is not a pixel to be skipped, write it. - (Skip only background pixels.) */ - if (mask || !skip) - *dst = target; + /* If mask is 1 or it is not a pixel to be skipped, write it. + (Skip only background pixels.) */ + if (mask || !skip) + *dst = target; } else { - /* If if it is not a pixel to be skipped, write it. */ - if (!skip) - *dst = target; + /* If if it is not a pixel to be skipped, write it. */ + if (!skip) + *dst = target; } } - static int gd54xx_transparent_comp(gd54xx_t *gd54xx, uint32_t xx, uint8_t src) { svga_t *svga = &gd54xx->svga; - int ret = 1; + int ret = 1; if ((gd54xx->blt.pixel_width <= 2) && gd54xx_has_transp(svga, 0)) { - ret = src ^ ((uint8_t *) &(gd54xx->blt.trans_col))[xx]; - if (gd54xx_has_transp(svga, 1)) - ret &= ~(((uint8_t *) &(gd54xx->blt.trans_mask))[xx]); - ret = !ret; + ret = src ^ ((uint8_t *) &(gd54xx->blt.trans_col))[xx]; + if (gd54xx_has_transp(svga, 1)) + ret &= ~(((uint8_t *) &(gd54xx->blt.trans_mask))[xx]); + ret = !ret; } return ret; } - static void gd54xx_pattern_copy(gd54xx_t *gd54xx) { - uint8_t target, src, *dst; - int x, y, pattern_y, pattern_pitch; + uint8_t target, src, *dst; + int x, y, pattern_y, pattern_pitch; uint32_t bitmask = 0, xx, pixel; uint32_t srca, srca2, dsta; - svga_t *svga = &gd54xx->svga; + svga_t *svga = &gd54xx->svga; pattern_pitch = gd54xx->blt.pixel_width << 3; if (gd54xx->blt.pixel_width == 3) - pattern_pitch = 32; + pattern_pitch = 32; if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) - pattern_pitch = 1; + pattern_pitch = 1; dsta = gd54xx->blt.dst_addr & svga->vram_mask; /* The vertical offset is in the three low-order bits of the Source Address register. */ @@ -3282,144 +3222,141 @@ gd54xx_pattern_copy(gd54xx_t *gd54xx) srca = (gd54xx->blt.src_addr & ~0x07) & svga->vram_mask; for (y = 0; y <= gd54xx->blt.height; y++) { - /* Go to the correct pattern line. */ - srca2 = srca + (pattern_y * pattern_pitch); - pixel = 0; - for (x = 0; x <= gd54xx->blt.width; x += gd54xx->blt.pixel_width) { - if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) { - if (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_SOLIDFILL) - bitmask = 1; - else - bitmask = svga->vram[srca2 & svga->vram_mask] & (0x80 >> pixel); - } - for (xx = 0; xx < gd54xx->blt.pixel_width; xx++) { - if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) - src = gd54xx_color_expand(gd54xx, bitmask, xx); - else { - src = svga->vram[(srca2 + (x % (gd54xx->blt.pixel_width << 3)) + xx) & svga->vram_mask]; - bitmask = gd54xx_transparent_comp(gd54xx, xx, src); - } - dst = &(svga->vram[(dsta + x + xx) & svga->vram_mask]); - target = *dst; - gd54xx_rop(gd54xx, &target, &target, &src); - if (gd54xx->blt.pixel_width == 3) - gd54xx_blit(gd54xx, bitmask, dst, target, ((x + xx) < gd54xx->blt.pattern_x)); - else - gd54xx_blit(gd54xx, bitmask, dst, target, (x < gd54xx->blt.pattern_x)); - } - pixel = (pixel + 1) & 7; - svga->changedvram[((dsta + x) & svga->vram_mask) >> 12] = changeframecount; - } - pattern_y = (pattern_y + 1) & 7; - dsta += gd54xx->blt.dst_pitch; + /* Go to the correct pattern line. */ + srca2 = srca + (pattern_y * pattern_pitch); + pixel = 0; + for (x = 0; x <= gd54xx->blt.width; x += gd54xx->blt.pixel_width) { + if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) { + if (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_SOLIDFILL) + bitmask = 1; + else + bitmask = svga->vram[srca2 & svga->vram_mask] & (0x80 >> pixel); + } + for (xx = 0; xx < gd54xx->blt.pixel_width; xx++) { + if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) + src = gd54xx_color_expand(gd54xx, bitmask, xx); + else { + src = svga->vram[(srca2 + (x % (gd54xx->blt.pixel_width << 3)) + xx) & svga->vram_mask]; + bitmask = gd54xx_transparent_comp(gd54xx, xx, src); + } + dst = &(svga->vram[(dsta + x + xx) & svga->vram_mask]); + target = *dst; + gd54xx_rop(gd54xx, &target, &target, &src); + if (gd54xx->blt.pixel_width == 3) + gd54xx_blit(gd54xx, bitmask, dst, target, ((x + xx) < gd54xx->blt.pattern_x)); + else + gd54xx_blit(gd54xx, bitmask, dst, target, (x < gd54xx->blt.pattern_x)); + } + pixel = (pixel + 1) & 7; + svga->changedvram[((dsta + x) & svga->vram_mask) >> 12] = changeframecount; + } + pattern_y = (pattern_y + 1) & 7; + dsta += gd54xx->blt.dst_pitch; } } - static void gd54xx_reset_blit(gd54xx_t *gd54xx) { gd54xx->countminusone = 0; - gd54xx->blt.status &= ~(CIRRUS_BLT_START|CIRRUS_BLT_BUSY|CIRRUS_BLT_FIFOUSED); + gd54xx->blt.status &= ~(CIRRUS_BLT_START | CIRRUS_BLT_BUSY | CIRRUS_BLT_FIFOUSED); } - /* Each blit is either 1 byte -> 1 byte (non-color expand blit) or 1 byte -> 8/16/24/32 bytes (color expand blit). */ static void gd54xx_mem_sys_src(gd54xx_t *gd54xx, uint32_t cpu_dat, uint32_t count) { uint8_t *dst, exp, target; - int mask_shift; + int mask_shift; uint32_t byte_pos, bitmask = 0; - svga_t *svga = &gd54xx->svga; + svga_t *svga = &gd54xx->svga; gd54xx->blt.ms_is_dest = 0; if (gd54xx->blt.mode & (CIRRUS_BLTMODE_MEMSYSDEST | CIRRUS_BLTMODE_PATTERNCOPY)) - gd54xx_reset_blit(gd54xx); + gd54xx_reset_blit(gd54xx); else if (count == 0xffffffff) { - gd54xx->blt.dst_addr_backup = gd54xx->blt.dst_addr; - gd54xx->blt.src_addr_backup = gd54xx->blt.src_addr; - gd54xx->blt.x_count = gd54xx->blt.xx_count = 0; - gd54xx->blt.y_count = 0; - gd54xx->countminusone = 1; - gd54xx->blt.sys_src32 = 0x00000000; - gd54xx->blt.sys_cnt = 0; - return; + gd54xx->blt.dst_addr_backup = gd54xx->blt.dst_addr; + gd54xx->blt.src_addr_backup = gd54xx->blt.src_addr; + gd54xx->blt.x_count = gd54xx->blt.xx_count = 0; + gd54xx->blt.y_count = 0; + gd54xx->countminusone = 1; + gd54xx->blt.sys_src32 = 0x00000000; + gd54xx->blt.sys_cnt = 0; + return; } else if (gd54xx->countminusone) { - if (!(gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) || (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_DWORDGRANULARITY)) { - if (!gd54xx->blt.xx_count && !gd54xx->blt.x_count) - byte_pos = (((gd54xx->blt.mask >> 5) & 3) << 3); - else - byte_pos = 0; - mask_shift = 31 - byte_pos; - if (!(gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND)) - cpu_dat >>= byte_pos; - } else - mask_shift = 7; + if (!(gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) || (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_DWORDGRANULARITY)) { + if (!gd54xx->blt.xx_count && !gd54xx->blt.x_count) + byte_pos = (((gd54xx->blt.mask >> 5) & 3) << 3); + else + byte_pos = 0; + mask_shift = 31 - byte_pos; + if (!(gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND)) + cpu_dat >>= byte_pos; + } else + mask_shift = 7; - while (mask_shift > -1) { - if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) { - bitmask = (cpu_dat >> mask_shift) & 0x01; - exp = gd54xx_color_expand(gd54xx, bitmask, gd54xx->blt.xx_count); - } else { - exp = cpu_dat & 0xff; - bitmask = gd54xx_transparent_comp(gd54xx, gd54xx->blt.xx_count, exp); - } + while (mask_shift > -1) { + if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) { + bitmask = (cpu_dat >> mask_shift) & 0x01; + exp = gd54xx_color_expand(gd54xx, bitmask, gd54xx->blt.xx_count); + } else { + exp = cpu_dat & 0xff; + bitmask = gd54xx_transparent_comp(gd54xx, gd54xx->blt.xx_count, exp); + } - dst = &(svga->vram[gd54xx->blt.dst_addr_backup & svga->vram_mask]); - target = *dst; - gd54xx_rop(gd54xx, &target, &target, &exp); - if ((gd54xx->blt.pixel_width == 3) && (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND)) - gd54xx_blit(gd54xx, bitmask, dst, target, ((gd54xx->blt.x_count + gd54xx->blt.xx_count) < gd54xx->blt.pattern_x)); - else - gd54xx_blit(gd54xx, bitmask, dst, target, (gd54xx->blt.x_count < gd54xx->blt.pattern_x)); + dst = &(svga->vram[gd54xx->blt.dst_addr_backup & svga->vram_mask]); + target = *dst; + gd54xx_rop(gd54xx, &target, &target, &exp); + if ((gd54xx->blt.pixel_width == 3) && (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND)) + gd54xx_blit(gd54xx, bitmask, dst, target, ((gd54xx->blt.x_count + gd54xx->blt.xx_count) < gd54xx->blt.pattern_x)); + else + gd54xx_blit(gd54xx, bitmask, dst, target, (gd54xx->blt.x_count < gd54xx->blt.pattern_x)); - gd54xx->blt.dst_addr_backup += gd54xx->blt.dir; + gd54xx->blt.dst_addr_backup += gd54xx->blt.dir; - if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) - gd54xx->blt.xx_count = (gd54xx->blt.xx_count + 1) % gd54xx->blt.pixel_width; + if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) + gd54xx->blt.xx_count = (gd54xx->blt.xx_count + 1) % gd54xx->blt.pixel_width; - svga->changedvram[(gd54xx->blt.dst_addr_backup & svga->vram_mask) >> 12] = changeframecount; + svga->changedvram[(gd54xx->blt.dst_addr_backup & svga->vram_mask) >> 12] = changeframecount; - if (!gd54xx->blt.xx_count) { - /* 1 mask bit = 1 blitted pixel */ - if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) - mask_shift--; - else { - cpu_dat >>= 8; - mask_shift -= 8; - } + if (!gd54xx->blt.xx_count) { + /* 1 mask bit = 1 blitted pixel */ + if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) + mask_shift--; + else { + cpu_dat >>= 8; + mask_shift -= 8; + } - if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) - gd54xx->blt.x_count = (gd54xx->blt.x_count + gd54xx->blt.pixel_width) % (gd54xx->blt.width + 1); - else - gd54xx->blt.x_count = (gd54xx->blt.x_count + 1) % (gd54xx->blt.width + 1); + if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) + gd54xx->blt.x_count = (gd54xx->blt.x_count + gd54xx->blt.pixel_width) % (gd54xx->blt.width + 1); + else + gd54xx->blt.x_count = (gd54xx->blt.x_count + 1) % (gd54xx->blt.width + 1); - if (!gd54xx->blt.x_count) { - gd54xx->blt.y_count = (gd54xx->blt.y_count + 1) % (gd54xx->blt.height + 1); - if (gd54xx->blt.y_count) - gd54xx->blt.dst_addr_backup = gd54xx->blt.dst_addr + (gd54xx->blt.dst_pitch * gd54xx->blt.y_count * gd54xx->blt.dir); - else { - /* If we're here, the blit is over, reset. */ - gd54xx_reset_blit(gd54xx); - } - /* Stop blitting and request new data if end of line reached. */ - return; - } - } - } + if (!gd54xx->blt.x_count) { + gd54xx->blt.y_count = (gd54xx->blt.y_count + 1) % (gd54xx->blt.height + 1); + if (gd54xx->blt.y_count) + gd54xx->blt.dst_addr_backup = gd54xx->blt.dst_addr + (gd54xx->blt.dst_pitch * gd54xx->blt.y_count * gd54xx->blt.dir); + else { + /* If we're here, the blit is over, reset. */ + gd54xx_reset_blit(gd54xx); + } + /* Stop blitting and request new data if end of line reached. */ + return; + } + } + } } } - static void gd54xx_normal_blit(uint32_t count, gd54xx_t *gd54xx, svga_t *svga) { - uint8_t src = 0, dst; + uint8_t src = 0, dst; uint16_t width = gd54xx->blt.width; - int x_max = 0, shift = 0, mask = 0; + int x_max = 0, shift = 0, mask = 0; uint32_t src_addr = gd54xx->blt.src_addr; uint32_t dst_addr = gd54xx->blt.dst_addr; @@ -3428,353 +3365,349 @@ gd54xx_normal_blit(uint32_t count, gd54xx_t *gd54xx, svga_t *svga) gd54xx->blt.dst_addr_backup = gd54xx->blt.dst_addr; gd54xx->blt.src_addr_backup = gd54xx->blt.src_addr; gd54xx->blt.height_internal = gd54xx->blt.height; - gd54xx->blt.x_count = 0; - gd54xx->blt.y_count = 0; + gd54xx->blt.x_count = 0; + gd54xx->blt.y_count = 0; while (count) { - src = 0; - mask = 0; + src = 0; + mask = 0; - if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) { - mask = svga->vram[src_addr & svga->vram_mask] & (0x80 >> (gd54xx->blt.x_count / gd54xx->blt.pixel_width)); - shift = (gd54xx->blt.x_count % gd54xx->blt.pixel_width); - src = gd54xx_color_expand(gd54xx, mask, shift); - } else { - src = svga->vram[src_addr & svga->vram_mask]; - src_addr += gd54xx->blt.dir; - mask = 1; - } - count--; + if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) { + mask = svga->vram[src_addr & svga->vram_mask] & (0x80 >> (gd54xx->blt.x_count / gd54xx->blt.pixel_width)); + shift = (gd54xx->blt.x_count % gd54xx->blt.pixel_width); + src = gd54xx_color_expand(gd54xx, mask, shift); + } else { + src = svga->vram[src_addr & svga->vram_mask]; + src_addr += gd54xx->blt.dir; + mask = 1; + } + count--; - dst = svga->vram[dst_addr & svga->vram_mask]; - svga->changedvram[(dst_addr & svga->vram_mask) >> 12] = changeframecount; + dst = svga->vram[dst_addr & svga->vram_mask]; + svga->changedvram[(dst_addr & svga->vram_mask) >> 12] = changeframecount; - gd54xx_rop(gd54xx, (uint8_t *) &dst, (uint8_t *) &dst, (const uint8_t *) &src); + gd54xx_rop(gd54xx, (uint8_t *) &dst, (uint8_t *) &dst, (const uint8_t *) &src); - if ((gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_COLOREXPINV)) - mask = !mask; + if ((gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_COLOREXPINV)) + mask = !mask; - /* This handles 8bpp and 16bpp non-color-expanding transparent comparisons. */ - if ((gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP) && !(gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && - ((gd54xx->blt.mode & CIRRUS_BLTMODE_PIXELWIDTHMASK) <= CIRRUS_BLTMODE_PIXELWIDTH16) && - (src != ((gd54xx->blt.trans_mask >> (shift << 3)) & 0xff))) - mask = 0; + /* This handles 8bpp and 16bpp non-color-expanding transparent comparisons. */ + if ((gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP) && !(gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && ((gd54xx->blt.mode & CIRRUS_BLTMODE_PIXELWIDTHMASK) <= CIRRUS_BLTMODE_PIXELWIDTH16) && (src != ((gd54xx->blt.trans_mask >> (shift << 3)) & 0xff))) + mask = 0; - if (((gd54xx->blt.width - width) >= gd54xx->blt.pattern_x) && - !((gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP) && !mask)) { - svga->vram[dst_addr & svga->vram_mask] = dst; - } + if (((gd54xx->blt.width - width) >= gd54xx->blt.pattern_x) && !((gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP) && !mask)) { + svga->vram[dst_addr & svga->vram_mask] = dst; + } - dst_addr += gd54xx->blt.dir; - gd54xx->blt.x_count++; + dst_addr += gd54xx->blt.dir; + gd54xx->blt.x_count++; - if (gd54xx->blt.x_count == x_max) { - gd54xx->blt.x_count = 0; - if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) - src_addr++; - } + if (gd54xx->blt.x_count == x_max) { + gd54xx->blt.x_count = 0; + if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) + src_addr++; + } - width--; - if (width == 0xffff) { - width = gd54xx->blt.width; - dst_addr = gd54xx->blt.dst_addr_backup = gd54xx->blt.dst_addr_backup + (gd54xx->blt.dst_pitch * gd54xx->blt.dir); - gd54xx->blt.y_count = (gd54xx->blt.y_count + gd54xx->blt.dir) & 7; + width--; + if (width == 0xffff) { + width = gd54xx->blt.width; + dst_addr = gd54xx->blt.dst_addr_backup = gd54xx->blt.dst_addr_backup + (gd54xx->blt.dst_pitch * gd54xx->blt.dir); + gd54xx->blt.y_count = (gd54xx->blt.y_count + gd54xx->blt.dir) & 7; - if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) { - if (gd54xx->blt.x_count != 0) - src_addr++; - } else - src_addr = gd54xx->blt.src_addr_backup = gd54xx->blt.src_addr_backup + (gd54xx->blt.src_pitch * gd54xx->blt.dir); + if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) { + if (gd54xx->blt.x_count != 0) + src_addr++; + } else + src_addr = gd54xx->blt.src_addr_backup = gd54xx->blt.src_addr_backup + (gd54xx->blt.src_pitch * gd54xx->blt.dir); - dst_addr &= svga->vram_mask; - gd54xx->blt.dst_addr_backup &= svga->vram_mask; - src_addr &= svga->vram_mask; - gd54xx->blt.src_addr_backup &= svga->vram_mask; + dst_addr &= svga->vram_mask; + gd54xx->blt.dst_addr_backup &= svga->vram_mask; + src_addr &= svga->vram_mask; + gd54xx->blt.src_addr_backup &= svga->vram_mask; - gd54xx->blt.x_count = 0; + gd54xx->blt.x_count = 0; - gd54xx->blt.height_internal--; - if (gd54xx->blt.height_internal == 0xffff) { - gd54xx_reset_blit(gd54xx); - return; - } - } + gd54xx->blt.height_internal--; + if (gd54xx->blt.height_internal == 0xffff) { + gd54xx_reset_blit(gd54xx); + return; + } + } } /* Count exhausted, stuff still left to blit. */ gd54xx_reset_blit(gd54xx); } - static void gd54xx_mem_sys_dest(uint32_t count, gd54xx_t *gd54xx, svga_t *svga) { gd54xx->blt.ms_is_dest = 1; if (gd54xx->blt.mode & CIRRUS_BLTMODE_PATTERNCOPY) { - fatal("mem sys dest pattern copy not allowed (see 1994 manual)\n"); - gd54xx_reset_blit(gd54xx); + fatal("mem sys dest pattern copy not allowed (see 1994 manual)\n"); + gd54xx_reset_blit(gd54xx); } else if (gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) { - fatal("mem sys dest color expand not allowed (see 1994 manual)\n"); - gd54xx_reset_blit(gd54xx); + fatal("mem sys dest color expand not allowed (see 1994 manual)\n"); + gd54xx_reset_blit(gd54xx); } else { - if (count == 0xffffffff) { - gd54xx->blt.dst_addr_backup = gd54xx->blt.dst_addr; - gd54xx->blt.msd_buf_cnt = 0; - gd54xx->blt.src_addr_backup = gd54xx->blt.src_addr; - gd54xx->blt.x_count = gd54xx->blt.xx_count = 0; - gd54xx->blt.y_count = 0; - gd54xx->countminusone = 1; - count = 32; - } + if (count == 0xffffffff) { + gd54xx->blt.dst_addr_backup = gd54xx->blt.dst_addr; + gd54xx->blt.msd_buf_cnt = 0; + gd54xx->blt.src_addr_backup = gd54xx->blt.src_addr; + gd54xx->blt.x_count = gd54xx->blt.xx_count = 0; + gd54xx->blt.y_count = 0; + gd54xx->countminusone = 1; + count = 32; + } - gd54xx->blt.msd_buf_pos = 0; + gd54xx->blt.msd_buf_pos = 0; - while (gd54xx->blt.msd_buf_pos < 32) { - gd54xx->blt.msd_buf[gd54xx->blt.msd_buf_pos & 0x1f] = svga->vram[gd54xx->blt.src_addr_backup & svga->vram_mask]; - gd54xx->blt.src_addr_backup += gd54xx->blt.dir; - gd54xx->blt.msd_buf_pos++; + while (gd54xx->blt.msd_buf_pos < 32) { + gd54xx->blt.msd_buf[gd54xx->blt.msd_buf_pos & 0x1f] = svga->vram[gd54xx->blt.src_addr_backup & svga->vram_mask]; + gd54xx->blt.src_addr_backup += gd54xx->blt.dir; + gd54xx->blt.msd_buf_pos++; - gd54xx->blt.x_count = (gd54xx->blt.x_count + 1) % (gd54xx->blt.width + 1); + gd54xx->blt.x_count = (gd54xx->blt.x_count + 1) % (gd54xx->blt.width + 1); - if (!gd54xx->blt.x_count) { - gd54xx->blt.y_count = (gd54xx->blt.y_count + 1) % (gd54xx->blt.height + 1); + if (!gd54xx->blt.x_count) { + gd54xx->blt.y_count = (gd54xx->blt.y_count + 1) % (gd54xx->blt.height + 1); - if (gd54xx->blt.y_count) - gd54xx->blt.src_addr_backup = gd54xx->blt.src_addr + (gd54xx->blt.src_pitch * gd54xx->blt.y_count * gd54xx->blt.dir); - else - gd54xx->countminusone = 2; /* Signal end of blit. */ - /* End of line reached, stop and notify regardless of how much we already transferred. */ - goto request_more_data; - } - } + if (gd54xx->blt.y_count) + gd54xx->blt.src_addr_backup = gd54xx->blt.src_addr + (gd54xx->blt.src_pitch * gd54xx->blt.y_count * gd54xx->blt.dir); + else + gd54xx->countminusone = 2; /* Signal end of blit. */ + /* End of line reached, stop and notify regardless of how much we already transferred. */ + goto request_more_data; + } + } - /* End of while. */ + /* End of while. */ request_more_data: - /* If the byte count we have blitted are not divisible by 4, round them up. */ - if (gd54xx->blt.msd_buf_pos & 3) - gd54xx->blt.msd_buf_cnt = (gd54xx->blt.msd_buf_pos & ~3) + 4; - else - gd54xx->blt.msd_buf_cnt = gd54xx->blt.msd_buf_pos; - gd54xx->blt.msd_buf_pos = 0; - return; + /* If the byte count we have blitted are not divisible by 4, round them up. */ + if (gd54xx->blt.msd_buf_pos & 3) + gd54xx->blt.msd_buf_cnt = (gd54xx->blt.msd_buf_pos & ~3) + 4; + else + gd54xx->blt.msd_buf_cnt = gd54xx->blt.msd_buf_pos; + gd54xx->blt.msd_buf_pos = 0; + return; } } - static void gd54xx_start_blit(uint32_t cpu_dat, uint32_t count, gd54xx_t *gd54xx, svga_t *svga) { - if ((gd54xx->blt.mode & CIRRUS_BLTMODE_BACKWARDS) && - !(gd54xx->blt.mode & (CIRRUS_BLTMODE_PATTERNCOPY|CIRRUS_BLTMODE_COLOREXPAND)) && - !(gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP)) - gd54xx->blt.dir = -1; + if ((gd54xx->blt.mode & CIRRUS_BLTMODE_BACKWARDS) && !(gd54xx->blt.mode & (CIRRUS_BLTMODE_PATTERNCOPY | CIRRUS_BLTMODE_COLOREXPAND)) && !(gd54xx->blt.mode & CIRRUS_BLTMODE_TRANSPARENTCOMP)) + gd54xx->blt.dir = -1; else - gd54xx->blt.dir = 1; + gd54xx->blt.dir = 1; gd54xx->blt.pixel_width = gd54xx_get_pixel_width(gd54xx); - if (gd54xx->blt.mode & (CIRRUS_BLTMODE_PATTERNCOPY|CIRRUS_BLTMODE_COLOREXPAND)) { - if (gd54xx->blt.pixel_width == 3) - gd54xx->blt.pattern_x = gd54xx->blt.mask & 0x1f; /* (Mask & 0x1f) bytes. */ - else - gd54xx->blt.pattern_x = (gd54xx->blt.mask & 0x07) * gd54xx->blt.pixel_width; /* (Mask & 0x07) pixels. */ + if (gd54xx->blt.mode & (CIRRUS_BLTMODE_PATTERNCOPY | CIRRUS_BLTMODE_COLOREXPAND)) { + if (gd54xx->blt.pixel_width == 3) + gd54xx->blt.pattern_x = gd54xx->blt.mask & 0x1f; /* (Mask & 0x1f) bytes. */ + else + gd54xx->blt.pattern_x = (gd54xx->blt.mask & 0x07) * gd54xx->blt.pixel_width; /* (Mask & 0x07) pixels. */ } else - gd54xx->blt.pattern_x = 0; /* No skip in normal blit mode. */ + gd54xx->blt.pattern_x = 0; /* No skip in normal blit mode. */ if (gd54xx->blt.mode & CIRRUS_BLTMODE_MEMSYSSRC) - gd54xx_mem_sys_src(gd54xx, cpu_dat, count); + gd54xx_mem_sys_src(gd54xx, cpu_dat, count); else if (gd54xx->blt.mode & CIRRUS_BLTMODE_MEMSYSDEST) - gd54xx_mem_sys_dest(count, gd54xx, svga); + gd54xx_mem_sys_dest(count, gd54xx, svga); else if (gd54xx->blt.mode & CIRRUS_BLTMODE_PATTERNCOPY) { - gd54xx_pattern_copy(gd54xx); - gd54xx_reset_blit(gd54xx); + gd54xx_pattern_copy(gd54xx); + gd54xx_reset_blit(gd54xx); } else - gd54xx_normal_blit(count, gd54xx, svga); + gd54xx_normal_blit(count, gd54xx, svga); } - static uint8_t cl_pci_read(int func, int addr, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; - uint8_t ret = 0x00; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; + uint8_t ret = 0x00; if ((addr >= 0x30) && (addr <= 0x33) && (!gd54xx->has_bios)) - ret = 0x00; - else switch (addr) { - case 0x00: - ret = 0x13; /*Cirrus Logic*/ - break; - case 0x01: - ret = 0x10; - break; + ret = 0x00; + else + switch (addr) { + case 0x00: + ret = 0x13; /*Cirrus Logic*/ + break; + case 0x01: + ret = 0x10; + break; - case 0x02: - ret = svga->crtc[0x27]; - break; - case 0x03: - ret = 0x00; - break; + case 0x02: + ret = svga->crtc[0x27]; + break; + case 0x03: + ret = 0x00; + break; - case PCI_REG_COMMAND: - ret = gd54xx->pci_regs[PCI_REG_COMMAND]; /*Respond to IO and memory accesses*/ - break; + case PCI_REG_COMMAND: + ret = gd54xx->pci_regs[PCI_REG_COMMAND]; /*Respond to IO and memory accesses*/ + break; - case 0x07: - ret = 0x02; /*Fast DEVSEL timing*/ - break; + case 0x07: + ret = 0x02; /*Fast DEVSEL timing*/ + break; - case 0x08: - ret = gd54xx->rev; /*Revision ID*/ - break; - case 0x09: - ret = 0x00; /*Programming interface*/ - break; + case 0x08: + ret = gd54xx->rev; /*Revision ID*/ + break; + case 0x09: + ret = 0x00; /*Programming interface*/ + break; - case 0x0a: - ret = 0x00; /*Supports VGA interface*/ - break; - case 0x0b: - ret = 0x03; - break; + case 0x0a: + ret = 0x00; /*Supports VGA interface*/ + break; + case 0x0b: + ret = 0x03; + break; - case 0x10: - ret = 0x08; /*Linear frame buffer address*/ - break; - case 0x11: - ret = 0x00; - break; - case 0x12: - ret = 0x00; - break; - case 0x13: - ret = gd54xx->lfb_base >> 24; - if (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) - ret = 0xfe; - break; + case 0x10: + ret = 0x08; /*Linear frame buffer address*/ + break; + case 0x11: + ret = 0x00; + break; + case 0x12: + ret = 0x00; + break; + case 0x13: + ret = gd54xx->lfb_base >> 24; + if (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) + ret = 0xfe; + break; - case 0x14: - ret = 0x00; /*PCI VGA/BitBLT Register Base Address*/ - break; - case 0x15: - ret = (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) ? ((gd54xx->vgablt_base >> 8) & 0xf0) : 0x00; - break; - case 0x16: - ret = (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) ? ((gd54xx->vgablt_base >> 16) & 0xff) : 0x00; - break; - case 0x17: - ret = (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) ? ((gd54xx->vgablt_base >> 24) & 0xff) : 0x00; - break; + case 0x14: + ret = 0x00; /*PCI VGA/BitBLT Register Base Address*/ + break; + case 0x15: + ret = (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) ? ((gd54xx->vgablt_base >> 8) & 0xf0) : 0x00; + break; + case 0x16: + ret = (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) ? ((gd54xx->vgablt_base >> 16) & 0xff) : 0x00; + break; + case 0x17: + ret = (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) ? ((gd54xx->vgablt_base >> 24) & 0xff) : 0x00; + break; - case 0x30: - ret = (gd54xx->pci_regs[0x30] & 0x01); /*BIOS ROM address*/ - break; - case 0x31: - ret = 0x00; - break; - case 0x32: - ret = gd54xx->pci_regs[0x32]; - break; - case 0x33: - ret = gd54xx->pci_regs[0x33]; - break; + case 0x30: + ret = (gd54xx->pci_regs[0x30] & 0x01); /*BIOS ROM address*/ + break; + case 0x31: + ret = 0x00; + break; + case 0x32: + ret = gd54xx->pci_regs[0x32]; + break; + case 0x33: + ret = gd54xx->pci_regs[0x33]; + break; - case 0x3c: - ret = gd54xx->int_line; - break; - case 0x3d: - ret = PCI_INTA; - break; - } + case 0x3c: + ret = gd54xx->int_line; + break; + case 0x3d: + ret = PCI_INTA; + break; + } return ret; } - static void cl_pci_write(int func, int addr, uint8_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; - svga_t *svga = &gd54xx->svga; - uint32_t byte; + gd54xx_t *gd54xx = (gd54xx_t *) p; + svga_t *svga = &gd54xx->svga; + uint32_t byte; if ((addr >= 0x30) && (addr <= 0x33) && (!gd54xx->has_bios)) - return; + return; switch (addr) { - case PCI_REG_COMMAND: - gd54xx->pci_regs[PCI_REG_COMMAND] = val & 0x23; - mem_mapping_disable(&gd54xx->vgablt_mapping); - io_removehandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); - if (val & PCI_COMMAND_IO) - io_sethandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); - if ((val & PCI_COMMAND_MEM) && (gd54xx->vgablt_base != 0x00000000) && (gd54xx->vgablt_base < 0xfff00000)) - mem_mapping_set_addr(&gd54xx->vgablt_mapping, gd54xx->vgablt_base, 0x1000); - if ((gd54xx->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM) && (gd54xx->pci_regs[0x30] & 0x01)) { - uint32_t addr = (gd54xx->pci_regs[0x32] << 16) | (gd54xx->pci_regs[0x33] << 24); - mem_mapping_set_addr(&gd54xx->bios_rom.mapping, addr, 0x8000); - } else - mem_mapping_disable(&gd54xx->bios_rom.mapping); - gd543x_recalc_mapping(gd54xx); - break; + case PCI_REG_COMMAND: + gd54xx->pci_regs[PCI_REG_COMMAND] = val & 0x23; + mem_mapping_disable(&gd54xx->vgablt_mapping); + io_removehandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); + if (val & PCI_COMMAND_IO) + io_sethandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); + if ((val & PCI_COMMAND_MEM) && (gd54xx->vgablt_base != 0x00000000) && (gd54xx->vgablt_base < 0xfff00000)) + mem_mapping_set_addr(&gd54xx->vgablt_mapping, gd54xx->vgablt_base, 0x1000); + if ((gd54xx->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM) && (gd54xx->pci_regs[0x30] & 0x01)) { + uint32_t addr = (gd54xx->pci_regs[0x32] << 16) | (gd54xx->pci_regs[0x33] << 24); + mem_mapping_set_addr(&gd54xx->bios_rom.mapping, addr, 0x8000); + } else + mem_mapping_disable(&gd54xx->bios_rom.mapping); + gd543x_recalc_mapping(gd54xx); + break; - case 0x13: - /* 5480, like 5446 rev. B, has a 32 MB aperture, with the second set used for - BitBLT transfers. */ - if (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) - val &= 0xfe; - gd54xx->lfb_base = val << 24; - gd543x_recalc_mapping(gd54xx); - break; + case 0x13: + /* 5480, like 5446 rev. B, has a 32 MB aperture, with the second set used for + BitBLT transfers. */ + if (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) + val &= 0xfe; + gd54xx->lfb_base = val << 24; + gd543x_recalc_mapping(gd54xx); + break; - case 0x15: case 0x16: case 0x17: - if (svga->crtc[0x27] != CIRRUS_ID_CLGD5480) - return; - byte = (addr & 3) << 3; - gd54xx->vgablt_base &= ~(0xff << byte); - if (addr == 0x15) - val &= 0xf0; - gd54xx->vgablt_base |= (val << byte); - mem_mapping_disable(&gd54xx->vgablt_mapping); - if ((gd54xx->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM) && (gd54xx->vgablt_base != 0x00000000) && (gd54xx->vgablt_base < 0xfff00000)) - mem_mapping_set_addr(&gd54xx->vgablt_mapping, gd54xx->vgablt_base, 0x1000); - break; + case 0x15: + case 0x16: + case 0x17: + if (svga->crtc[0x27] != CIRRUS_ID_CLGD5480) + return; + byte = (addr & 3) << 3; + gd54xx->vgablt_base &= ~(0xff << byte); + if (addr == 0x15) + val &= 0xf0; + gd54xx->vgablt_base |= (val << byte); + mem_mapping_disable(&gd54xx->vgablt_mapping); + if ((gd54xx->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM) && (gd54xx->vgablt_base != 0x00000000) && (gd54xx->vgablt_base < 0xfff00000)) + mem_mapping_set_addr(&gd54xx->vgablt_mapping, gd54xx->vgablt_base, 0x1000); + break; - case 0x30: case 0x32: case 0x33: - gd54xx->pci_regs[addr] = val; - if ((gd54xx->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM) && (gd54xx->pci_regs[0x30] & 0x01)) { - uint32_t addr = (gd54xx->pci_regs[0x32] << 16) | (gd54xx->pci_regs[0x33] << 24); - mem_mapping_set_addr(&gd54xx->bios_rom.mapping, addr, 0x8000); - } else - mem_mapping_disable(&gd54xx->bios_rom.mapping); - return; + case 0x30: + case 0x32: + case 0x33: + gd54xx->pci_regs[addr] = val; + if ((gd54xx->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM) && (gd54xx->pci_regs[0x30] & 0x01)) { + uint32_t addr = (gd54xx->pci_regs[0x32] << 16) | (gd54xx->pci_regs[0x33] << 24); + mem_mapping_set_addr(&gd54xx->bios_rom.mapping, addr, 0x8000); + } else + mem_mapping_disable(&gd54xx->bios_rom.mapping); + return; - case 0x3c: - gd54xx->int_line = val; - return; + case 0x3c: + gd54xx->int_line = val; + return; } } static uint8_t gd5428_mca_read(int port, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; + gd54xx_t *gd54xx = (gd54xx_t *) p; - return gd54xx->pos_regs[port & 7]; + return gd54xx->pos_regs[port & 7]; } static void gd5428_mca_write(int port, uint8_t val, void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; + gd54xx_t *gd54xx = (gd54xx_t *) p; - if (port < 0x102) - return; + if (port < 0x102) + return; - gd54xx->pos_regs[port & 7] = val; - gd543x_recalc_mapping(gd54xx); + gd54xx->pos_regs[port & 7] = val; + gd543x_recalc_mapping(gd54xx); } static uint8_t @@ -3787,23 +3720,23 @@ static void gd54xx_reset(void *priv) { gd54xx_t *gd54xx = (gd54xx_t *) priv; - svga_t *svga = &gd54xx->svga; + svga_t *svga = &gd54xx->svga; memset(svga->crtc, 0x00, sizeof(svga->crtc)); memset(svga->seqregs, 0x00, sizeof(svga->seqregs)); memset(svga->gdcreg, 0x00, sizeof(svga->gdcreg)); - svga->crtc[0] = 63; - svga->crtc[6] = 255; - svga->dispontime = 1000ull << 32; + svga->crtc[0] = 63; + svga->crtc[6] = 255; + svga->dispontime = 1000ull << 32; svga->dispofftime = 1000ull << 32; - svga->bpp = 8; + svga->bpp = 8; io_removehandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); io_sethandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); mem_mapping_disable(&gd54xx->vgablt_mapping); if (gd54xx->has_bios && gd54xx->pci) - mem_mapping_disable(&gd54xx->bios_rom.mapping); + mem_mapping_disable(&gd54xx->bios_rom.mapping); memset(gd54xx->pci_regs, 0x00, 256); @@ -3819,23 +3752,23 @@ gd54xx_reset(void *priv) svga->hwcursor.yoff = svga->hwcursor.xoff = 0; if (gd54xx->id >= CIRRUS_ID_CLGD5420) { - gd54xx->vclk_n[0] = 0x4a; - gd54xx->vclk_d[0] = 0x2b; - gd54xx->vclk_n[1] = 0x5b; - gd54xx->vclk_d[1] = 0x2f; - gd54xx->vclk_n[2] = 0x45; - gd54xx->vclk_d[2] = 0x30; - gd54xx->vclk_n[3] = 0x7e; - gd54xx->vclk_d[3] = 0x33; + gd54xx->vclk_n[0] = 0x4a; + gd54xx->vclk_d[0] = 0x2b; + gd54xx->vclk_n[1] = 0x5b; + gd54xx->vclk_d[1] = 0x2f; + gd54xx->vclk_n[2] = 0x45; + gd54xx->vclk_d[2] = 0x30; + gd54xx->vclk_n[3] = 0x7e; + gd54xx->vclk_d[3] = 0x33; } else { - gd54xx->vclk_n[0] = 0x66; - gd54xx->vclk_d[0] = 0x3b; - gd54xx->vclk_n[1] = 0x5b; - gd54xx->vclk_d[1] = 0x2f; - gd54xx->vclk_n[2] = 0x45; - gd54xx->vclk_d[2] = 0x2c; - gd54xx->vclk_n[3] = 0x7e; - gd54xx->vclk_d[3] = 0x33; + gd54xx->vclk_n[0] = 0x66; + gd54xx->vclk_d[0] = 0x3b; + gd54xx->vclk_n[1] = 0x5b; + gd54xx->vclk_d[1] = 0x2f; + gd54xx->vclk_n[2] = 0x45; + gd54xx->vclk_d[2] = 0x2c; + gd54xx->vclk_n[3] = 0x7e; + gd54xx->vclk_d[3] = 0x33; } svga->extra_banks[1] = 0x8000; @@ -3850,244 +3783,244 @@ gd54xx_reset(void *priv) svga->seqregs[6] = 0x0f; if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429) - gd54xx->unlocked = 1; + gd54xx->unlocked = 1; else - gd54xx->unlocked = 0; + gd54xx->unlocked = 0; } - static void -*gd54xx_init(const device_t *info) + * + gd54xx_init(const device_t *info) { gd54xx_t *gd54xx = malloc(sizeof(gd54xx_t)); - svga_t *svga = &gd54xx->svga; - int id = info->local & 0xff; - int vram; - char *romfn = NULL; - char *romfn1 = NULL, *romfn2 = NULL; + svga_t *svga = &gd54xx->svga; + int id = info->local & 0xff; + int vram; + char *romfn = NULL; + char *romfn1 = NULL, *romfn2 = NULL; memset(gd54xx, 0, sizeof(gd54xx_t)); - gd54xx->pci = !!(info->flags & DEVICE_PCI); - gd54xx->vlb = !!(info->flags & DEVICE_VLB); - gd54xx->mca = !!(info->flags & DEVICE_MCA); + gd54xx->pci = !!(info->flags & DEVICE_PCI); + gd54xx->vlb = !!(info->flags & DEVICE_VLB); + gd54xx->mca = !!(info->flags & DEVICE_MCA); gd54xx->bit32 = gd54xx->pci || gd54xx->vlb; - gd54xx->rev = 0; + gd54xx->rev = 0; gd54xx->has_bios = 1; gd54xx->id = id; switch (id) { - case CIRRUS_ID_CLGD5401: - romfn = BIOS_GD5401_PATH; - break; + case CIRRUS_ID_CLGD5401: + romfn = BIOS_GD5401_PATH; + break; - case CIRRUS_ID_CLGD5402: - if (info->local & 0x200) - romfn = BIOS_GD5402_ONBOARD_PATH; - else - romfn = BIOS_GD5402_PATH; - break; + case CIRRUS_ID_CLGD5402: + if (info->local & 0x200) + romfn = BIOS_GD5402_ONBOARD_PATH; + else + romfn = BIOS_GD5402_PATH; + break; - case CIRRUS_ID_CLGD5420: - romfn = BIOS_GD5420_PATH; - break; + case CIRRUS_ID_CLGD5420: + romfn = BIOS_GD5420_PATH; + break; - case CIRRUS_ID_CLGD5422: - case CIRRUS_ID_CLGD5424: - romfn = BIOS_GD5422_PATH; - break; + case CIRRUS_ID_CLGD5422: + case CIRRUS_ID_CLGD5424: + romfn = BIOS_GD5422_PATH; + break; - case CIRRUS_ID_CLGD5426: - if (info->local & 0x200) - romfn = NULL; - else { - if (info->local & 0x100) - romfn = BIOS_GD5426_DIAMOND_A1_ISA_PATH; - else { - if (gd54xx->vlb) - romfn = BIOS_GD5428_PATH; - else if (gd54xx->mca) - romfn = BIOS_GD5426_MCA_PATH; - else - romfn = BIOS_GD5428_ISA_PATH; - } - } - break; + case CIRRUS_ID_CLGD5426: + if (info->local & 0x200) + romfn = NULL; + else { + if (info->local & 0x100) + romfn = BIOS_GD5426_DIAMOND_A1_ISA_PATH; + else { + if (gd54xx->vlb) + romfn = BIOS_GD5428_PATH; + else if (gd54xx->mca) + romfn = BIOS_GD5426_MCA_PATH; + else + romfn = BIOS_GD5428_ISA_PATH; + } + } + break; - case CIRRUS_ID_CLGD5428: - if (info->local & 0x100) - if (gd54xx->vlb) - romfn = BIOS_GD5428_DIAMOND_B1_VLB_PATH; - else { - romfn1 = BIOS_GD5428_BOCA_ISA_PATH_1; - romfn2 = BIOS_GD5428_BOCA_ISA_PATH_2; - } - else { - if (gd54xx->vlb) - romfn = BIOS_GD5428_PATH; - else if (gd54xx->mca) - romfn = BIOS_GD5428_MCA_PATH; - else - romfn = BIOS_GD5428_ISA_PATH; - } - break; + case CIRRUS_ID_CLGD5428: + if (info->local & 0x100) + if (gd54xx->vlb) + romfn = BIOS_GD5428_DIAMOND_B1_VLB_PATH; + else { + romfn1 = BIOS_GD5428_BOCA_ISA_PATH_1; + romfn2 = BIOS_GD5428_BOCA_ISA_PATH_2; + } + else { + if (gd54xx->vlb) + romfn = BIOS_GD5428_PATH; + else if (gd54xx->mca) + romfn = BIOS_GD5428_MCA_PATH; + else + romfn = BIOS_GD5428_ISA_PATH; + } + break; - case CIRRUS_ID_CLGD5429: - romfn = BIOS_GD5429_PATH; - break; + case CIRRUS_ID_CLGD5429: + romfn = BIOS_GD5429_PATH; + break; - case CIRRUS_ID_CLGD5432: - case CIRRUS_ID_CLGD5434_4: - if (info->local & 0x200) { - romfn = NULL; - gd54xx->has_bios = 0; - } - break; + case CIRRUS_ID_CLGD5432: + case CIRRUS_ID_CLGD5434_4: + if (info->local & 0x200) { + romfn = NULL; + gd54xx->has_bios = 0; + } + break; - case CIRRUS_ID_CLGD5434: - if (info->local & 0x200) { - romfn = NULL; - gd54xx->has_bios = 0; - } else if (gd54xx->vlb) { - romfn = BIOS_GD5430_ORCHID_VLB_PATH; - } else { - if (info->local & 0x100) - romfn = BIOS_GD5434_DIAMOND_A3_ISA_PATH; - else - romfn = BIOS_GD5434_PATH; - } - break; + case CIRRUS_ID_CLGD5434: + if (info->local & 0x200) { + romfn = NULL; + gd54xx->has_bios = 0; + } else if (gd54xx->vlb) { + romfn = BIOS_GD5430_ORCHID_VLB_PATH; + } else { + if (info->local & 0x100) + romfn = BIOS_GD5434_DIAMOND_A3_ISA_PATH; + else + romfn = BIOS_GD5434_PATH; + } + break; - case CIRRUS_ID_CLGD5436: - romfn = BIOS_GD5436_PATH; - break; + case CIRRUS_ID_CLGD5436: + romfn = BIOS_GD5436_PATH; + break; - case CIRRUS_ID_CLGD5430: - if (info->local & 0x400) { - /* CL-GD 5440 */ - gd54xx->rev = 0x47; - if (info->local & 0x200) { - romfn = NULL; - gd54xx->has_bios = 0; - } else - romfn = BIOS_GD5440_PATH; - } else { - /* CL-GD 5430 */ - if (info->local & 0x200) { - romfn = NULL; - gd54xx->has_bios = 0; - } else if (gd54xx->pci) { - romfn = BIOS_GD5430_PATH; - } else if ((gd54xx->vlb) && (info->local & 0x100)) - romfn = BIOS_GD5430_ORCHID_VLB_PATH; - else - romfn = BIOS_GD5430_DIAMOND_A8_VLB_PATH; - } - break; + case CIRRUS_ID_CLGD5430: + if (info->local & 0x400) { + /* CL-GD 5440 */ + gd54xx->rev = 0x47; + if (info->local & 0x200) { + romfn = NULL; + gd54xx->has_bios = 0; + } else + romfn = BIOS_GD5440_PATH; + } else { + /* CL-GD 5430 */ + if (info->local & 0x200) { + romfn = NULL; + gd54xx->has_bios = 0; + } else if (gd54xx->pci) { + romfn = BIOS_GD5430_PATH; + } else if ((gd54xx->vlb) && (info->local & 0x100)) + romfn = BIOS_GD5430_ORCHID_VLB_PATH; + else + romfn = BIOS_GD5430_DIAMOND_A8_VLB_PATH; + } + break; - case CIRRUS_ID_CLGD5446: - if (info->local & 0x100) - romfn = BIOS_GD5446_STB_PATH; - else - romfn = BIOS_GD5446_PATH; - break; + case CIRRUS_ID_CLGD5446: + if (info->local & 0x100) + romfn = BIOS_GD5446_STB_PATH; + else + romfn = BIOS_GD5446_PATH; + break; - case CIRRUS_ID_CLGD5480: - romfn = BIOS_GD5480_PATH; - break; + case CIRRUS_ID_CLGD5480: + romfn = BIOS_GD5480_PATH; + break; } if (info->flags & DEVICE_MCA) { - vram = 1024; - gd54xx->vram_size = vram << 10; + vram = 1024; + gd54xx->vram_size = vram << 10; } else { - if (id <= CIRRUS_ID_CLGD5428) { - if ((id == CIRRUS_ID_CLGD5426) && (info->local & 0x200)) - vram = 1024; - else if (id == CIRRUS_ID_CLGD5401) - vram = 256; - else if (id == CIRRUS_ID_CLGD5402) - vram = 512; - else - vram = device_get_config_int("memory"); - gd54xx->vram_size = vram << 10; - } else { - vram = device_get_config_int("memory"); - gd54xx->vram_size = vram << 20; - } + if (id <= CIRRUS_ID_CLGD5428) { + if ((id == CIRRUS_ID_CLGD5426) && (info->local & 0x200)) + vram = 1024; + else if (id == CIRRUS_ID_CLGD5401) + vram = 256; + else if (id == CIRRUS_ID_CLGD5402) + vram = 512; + else + vram = device_get_config_int("memory"); + gd54xx->vram_size = vram << 10; + } else { + vram = device_get_config_int("memory"); + gd54xx->vram_size = vram << 20; + } } gd54xx->vram_mask = gd54xx->vram_size - 1; if (romfn) rom_init(&gd54xx->bios_rom, romfn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); else if (romfn1 && romfn2) - rom_init_interleaved(&gd54xx->bios_rom, BIOS_GD5428_BOCA_ISA_PATH_1, BIOS_GD5428_BOCA_ISA_PATH_2, 0xc0000, - 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + rom_init_interleaved(&gd54xx->bios_rom, BIOS_GD5428_BOCA_ISA_PATH_1, BIOS_GD5428_BOCA_ISA_PATH_2, 0xc0000, + 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); if (info->flags & DEVICE_ISA) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_gd54xx_isa); + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_gd54xx_isa); else if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_gd54xx_pci); + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_gd54xx_pci); else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_gd54xx_vlb); + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_gd54xx_vlb); if (id >= CIRRUS_ID_CLGD5426) { - svga_init(info, &gd54xx->svga, gd54xx, gd54xx->vram_size, - gd54xx_recalctimings, gd54xx_in, gd54xx_out, - gd54xx_hwcursor_draw, gd54xx_overlay_draw); + svga_init(info, &gd54xx->svga, gd54xx, gd54xx->vram_size, + gd54xx_recalctimings, gd54xx_in, gd54xx_out, + gd54xx_hwcursor_draw, gd54xx_overlay_draw); } else { - svga_init(info, &gd54xx->svga, gd54xx, gd54xx->vram_size, - gd54xx_recalctimings, gd54xx_in, gd54xx_out, - gd54xx_hwcursor_draw, NULL); + svga_init(info, &gd54xx->svga, gd54xx, gd54xx->vram_size, + gd54xx_recalctimings, gd54xx_in, gd54xx_out, + gd54xx_hwcursor_draw, NULL); } svga->vblank_start = gd54xx_vblank_start; - svga->ven_write = gd54xx_write_modes45; - if ((vram == 1) || (vram >= 256 && vram <= 1024)) - svga->decode_mask = gd54xx->vram_mask; + svga->ven_write = gd54xx_write_modes45; + if ((vram == 1) || (vram >= 256 && vram <= 1024)) + svga->decode_mask = gd54xx->vram_mask; if (gd54xx->bit32) { - mem_mapping_set_handler(&svga->mapping, gd54xx_read, gd54xx_readw, gd54xx_readl, gd54xx_write, gd54xx_writew, gd54xx_writel); - mem_mapping_add(&gd54xx->mmio_mapping, 0, 0, - gd543x_mmio_read, gd543x_mmio_readw, gd543x_mmio_readl, - gd543x_mmio_writeb, gd543x_mmio_writew, gd543x_mmio_writel, - NULL, MEM_MAPPING_EXTERNAL, gd54xx); - mem_mapping_add(&gd54xx->linear_mapping, 0, 0, - gd54xx_readb_linear, gd54xx_readw_linear, gd54xx_readl_linear, - gd54xx_writeb_linear, gd54xx_writew_linear, gd54xx_writel_linear, - NULL, MEM_MAPPING_EXTERNAL, gd54xx); - mem_mapping_add(&gd54xx->aperture2_mapping, 0, 0, - gd5436_aperture2_readb, gd5436_aperture2_readw, gd5436_aperture2_readl, - gd5436_aperture2_writeb, gd5436_aperture2_writew, gd5436_aperture2_writel, - NULL, MEM_MAPPING_EXTERNAL, gd54xx); - mem_mapping_add(&gd54xx->vgablt_mapping, 0, 0, - gd5480_vgablt_read, gd5480_vgablt_readw, gd5480_vgablt_readl, - gd5480_vgablt_write, gd5480_vgablt_writew, gd5480_vgablt_writel, - NULL, MEM_MAPPING_EXTERNAL, gd54xx); + mem_mapping_set_handler(&svga->mapping, gd54xx_read, gd54xx_readw, gd54xx_readl, gd54xx_write, gd54xx_writew, gd54xx_writel); + mem_mapping_add(&gd54xx->mmio_mapping, 0, 0, + gd543x_mmio_read, gd543x_mmio_readw, gd543x_mmio_readl, + gd543x_mmio_writeb, gd543x_mmio_writew, gd543x_mmio_writel, + NULL, MEM_MAPPING_EXTERNAL, gd54xx); + mem_mapping_add(&gd54xx->linear_mapping, 0, 0, + gd54xx_readb_linear, gd54xx_readw_linear, gd54xx_readl_linear, + gd54xx_writeb_linear, gd54xx_writew_linear, gd54xx_writel_linear, + NULL, MEM_MAPPING_EXTERNAL, gd54xx); + mem_mapping_add(&gd54xx->aperture2_mapping, 0, 0, + gd5436_aperture2_readb, gd5436_aperture2_readw, gd5436_aperture2_readl, + gd5436_aperture2_writeb, gd5436_aperture2_writew, gd5436_aperture2_writel, + NULL, MEM_MAPPING_EXTERNAL, gd54xx); + mem_mapping_add(&gd54xx->vgablt_mapping, 0, 0, + gd5480_vgablt_read, gd5480_vgablt_readw, gd5480_vgablt_readl, + gd5480_vgablt_write, gd5480_vgablt_writew, gd5480_vgablt_writel, + NULL, MEM_MAPPING_EXTERNAL, gd54xx); } else { - mem_mapping_set_handler(&svga->mapping, gd54xx_read, gd54xx_readw, NULL, gd54xx_write, gd54xx_writew, NULL); - mem_mapping_add(&gd54xx->mmio_mapping, 0, 0, - gd543x_mmio_read, gd543x_mmio_readw, NULL, - gd543x_mmio_writeb, gd543x_mmio_writew, NULL, - NULL, MEM_MAPPING_EXTERNAL, gd54xx); - mem_mapping_add(&gd54xx->linear_mapping, 0, 0, - gd54xx_readb_linear, gd54xx_readw_linear, NULL, - gd54xx_writeb_linear, gd54xx_writew_linear, NULL, - NULL, MEM_MAPPING_EXTERNAL, gd54xx); - mem_mapping_add(&gd54xx->aperture2_mapping, 0, 0, - gd5436_aperture2_readb, gd5436_aperture2_readw, NULL, - gd5436_aperture2_writeb, gd5436_aperture2_writew, NULL, - NULL, MEM_MAPPING_EXTERNAL, gd54xx); - mem_mapping_add(&gd54xx->vgablt_mapping, 0, 0, - gd5480_vgablt_read, gd5480_vgablt_readw, NULL, - gd5480_vgablt_write, gd5480_vgablt_writew, NULL, - NULL, MEM_MAPPING_EXTERNAL, gd54xx); + mem_mapping_set_handler(&svga->mapping, gd54xx_read, gd54xx_readw, NULL, gd54xx_write, gd54xx_writew, NULL); + mem_mapping_add(&gd54xx->mmio_mapping, 0, 0, + gd543x_mmio_read, gd543x_mmio_readw, NULL, + gd543x_mmio_writeb, gd543x_mmio_writew, NULL, + NULL, MEM_MAPPING_EXTERNAL, gd54xx); + mem_mapping_add(&gd54xx->linear_mapping, 0, 0, + gd54xx_readb_linear, gd54xx_readw_linear, NULL, + gd54xx_writeb_linear, gd54xx_writew_linear, NULL, + NULL, MEM_MAPPING_EXTERNAL, gd54xx); + mem_mapping_add(&gd54xx->aperture2_mapping, 0, 0, + gd5436_aperture2_readb, gd5436_aperture2_readw, NULL, + gd5436_aperture2_writeb, gd5436_aperture2_writew, NULL, + NULL, MEM_MAPPING_EXTERNAL, gd54xx); + mem_mapping_add(&gd54xx->vgablt_mapping, 0, 0, + gd5480_vgablt_read, gd5480_vgablt_readw, NULL, + gd5480_vgablt_write, gd5480_vgablt_writew, NULL, + NULL, MEM_MAPPING_EXTERNAL, gd54xx); } io_sethandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); if (gd54xx->pci && id >= CIRRUS_ID_CLGD5430) { - pci_add_card(PCI_ADD_VIDEO, cl_pci_read, cl_pci_write, gd54xx); - mem_mapping_disable(&gd54xx->bios_rom.mapping); + pci_add_card(PCI_ADD_VIDEO, cl_pci_read, cl_pci_write, gd54xx); + mem_mapping_disable(&gd54xx->bios_rom.mapping); } mem_mapping_set_p(&svga->mapping, gd54xx); @@ -4099,23 +4032,23 @@ static void svga->hwcursor.yoff = svga->hwcursor.xoff = 0; if (id >= CIRRUS_ID_CLGD5420) { - gd54xx->vclk_n[0] = 0x4a; - gd54xx->vclk_d[0] = 0x2b; - gd54xx->vclk_n[1] = 0x5b; - gd54xx->vclk_d[1] = 0x2f; - gd54xx->vclk_n[2] = 0x45; - gd54xx->vclk_d[2] = 0x30; - gd54xx->vclk_n[3] = 0x7e; - gd54xx->vclk_d[3] = 0x33; + gd54xx->vclk_n[0] = 0x4a; + gd54xx->vclk_d[0] = 0x2b; + gd54xx->vclk_n[1] = 0x5b; + gd54xx->vclk_d[1] = 0x2f; + gd54xx->vclk_n[2] = 0x45; + gd54xx->vclk_d[2] = 0x30; + gd54xx->vclk_n[3] = 0x7e; + gd54xx->vclk_d[3] = 0x33; } else { - gd54xx->vclk_n[0] = 0x66; - gd54xx->vclk_d[0] = 0x3b; - gd54xx->vclk_n[1] = 0x5b; - gd54xx->vclk_d[1] = 0x2f; - gd54xx->vclk_n[2] = 0x45; - gd54xx->vclk_d[2] = 0x2c; - gd54xx->vclk_n[3] = 0x7e; - gd54xx->vclk_d[3] = 0x33; + gd54xx->vclk_n[0] = 0x66; + gd54xx->vclk_d[0] = 0x3b; + gd54xx->vclk_n[1] = 0x5b; + gd54xx->vclk_d[1] = 0x2f; + gd54xx->vclk_n[2] = 0x45; + gd54xx->vclk_d[2] = 0x2c; + gd54xx->vclk_n[3] = 0x7e; + gd54xx->vclk_d[3] = 0x33; } svga->extra_banks[1] = 0x8000; @@ -4131,24 +4064,24 @@ static void svga->seqregs[6] = 0x0f; if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429) - gd54xx->unlocked = 1; + gd54xx->unlocked = 1; if (gd54xx->mca) { - gd54xx->pos_regs[0] = svga->crtc[0x27] == CIRRUS_ID_CLGD5426 ? 0x82 : 0x7b; - gd54xx->pos_regs[1] = svga->crtc[0x27] == CIRRUS_ID_CLGD5426 ? 0x81 : 0x91; - mca_add(gd5428_mca_read, gd5428_mca_write, gd5428_mca_feedb, NULL, gd54xx); - io_sethandler(0x46e8, 0x0001, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); + gd54xx->pos_regs[0] = svga->crtc[0x27] == CIRRUS_ID_CLGD5426 ? 0x82 : 0x7b; + gd54xx->pos_regs[1] = svga->crtc[0x27] == CIRRUS_ID_CLGD5426 ? 0x81 : 0x91; + mca_add(gd5428_mca_read, gd5428_mca_write, gd5428_mca_feedb, NULL, gd54xx); + io_sethandler(0x46e8, 0x0001, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); } if (gd54xx_is_5434(svga)) { - gd54xx->i2c = i2c_gpio_init("ddc_cl54xx"); - gd54xx->ddc = ddc_init(i2c_gpio_get_bus(gd54xx->i2c)); + gd54xx->i2c = i2c_gpio_init("ddc_cl54xx"); + gd54xx->ddc = ddc_init(i2c_gpio_get_bus(gd54xx->i2c)); } if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5446) - gd54xx->crtcreg_mask = 0x7f; + gd54xx->crtcreg_mask = 0x7f; else - gd54xx->crtcreg_mask = 0x3f; + gd54xx->crtcreg_mask = 0x3f; gd54xx->overlay.colorkeycompare = 0xff; @@ -4296,32 +4229,30 @@ gd5480_available(void) void gd54xx_close(void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; + gd54xx_t *gd54xx = (gd54xx_t *) p; svga_close(&gd54xx->svga); if (gd54xx->i2c) { - ddc_close(gd54xx->ddc); - i2c_gpio_close(gd54xx->i2c); + ddc_close(gd54xx->ddc); + i2c_gpio_close(gd54xx->i2c); } free(gd54xx); } - void gd54xx_speed_changed(void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; + gd54xx_t *gd54xx = (gd54xx_t *) p; svga_recalctimings(&gd54xx->svga); } - void gd54xx_force_redraw(void *p) { - gd54xx_t *gd54xx = (gd54xx_t *)p; + gd54xx_t *gd54xx = (gd54xx_t *) p; gd54xx->svga.fullchange = changeframecount; } @@ -4545,467 +4476,467 @@ static const device_config_t gd5480_config[] = { // clang-format on const device_t gd5401_isa_device = { - .name = "Cirrus Logic GD5401 (ISA) (ACUMOS AVGA1)", + .name = "Cirrus Logic GD5401 (ISA) (ACUMOS AVGA1)", .internal_name = "cl_gd5401_isa", - .flags = DEVICE_ISA, - .local = CIRRUS_ID_CLGD5401, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_ISA, + .local = CIRRUS_ID_CLGD5401, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5401_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = NULL, + .force_redraw = gd54xx_force_redraw, + .config = NULL, }; const device_t gd5402_isa_device = { - .name = "Cirrus Logic GD5402 (ISA) (ACUMOS AVGA2)", + .name = "Cirrus Logic GD5402 (ISA) (ACUMOS AVGA2)", .internal_name = "cl_gd5402_isa", - .flags = DEVICE_ISA, - .local = CIRRUS_ID_CLGD5402, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_ISA, + .local = CIRRUS_ID_CLGD5402, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5402_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = NULL, + .force_redraw = gd54xx_force_redraw, + .config = NULL, }; const device_t gd5402_onboard_device = { - .name = "Cirrus Logic GD5402 (ISA) (ACUMOS AVGA2) (On-Board)", + .name = "Cirrus Logic GD5402 (ISA) (ACUMOS AVGA2) (On-Board)", .internal_name = "cl_gd5402_onboard", - .flags = DEVICE_AT | DEVICE_ISA, - .local = CIRRUS_ID_CLGD5402 | 0x200, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = CIRRUS_ID_CLGD5402 | 0x200, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = NULL }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = NULL, + .force_redraw = gd54xx_force_redraw, + .config = NULL, }; const device_t gd5420_isa_device = { - .name = "Cirrus Logic GD5420 (ISA)", + .name = "Cirrus Logic GD5420 (ISA)", .internal_name = "cl_gd5420_isa", - .flags = DEVICE_AT | DEVICE_ISA, - .local = CIRRUS_ID_CLGD5420, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = CIRRUS_ID_CLGD5420, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5420_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd542x_config, + .force_redraw = gd54xx_force_redraw, + .config = gd542x_config, }; const device_t gd5422_isa_device = { - .name = "Cirrus Logic GD5422 (ISA)", + .name = "Cirrus Logic GD5422 (ISA)", .internal_name = "cl_gd5422_isa", - .flags = DEVICE_AT | DEVICE_ISA, - .local = CIRRUS_ID_CLGD5422, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = CIRRUS_ID_CLGD5422, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5422_available }, /* Common BIOS between 5422 and 5424 */ .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd542x_config, + .force_redraw = gd54xx_force_redraw, + .config = gd542x_config, }; const device_t gd5424_vlb_device = { - .name = "Cirrus Logic GD5424 (VLB)", + .name = "Cirrus Logic GD5424 (VLB)", .internal_name = "cl_gd5424_vlb", - .flags = DEVICE_VLB, - .local = CIRRUS_ID_CLGD5424, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_VLB, + .local = CIRRUS_ID_CLGD5424, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5422_available }, /* Common BIOS between 5422 and 5424 */ .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd542x_config, + .force_redraw = gd54xx_force_redraw, + .config = gd542x_config, }; const device_t gd5426_isa_device = { - .name = "Cirrus Logic GD5426 (ISA)", + .name = "Cirrus Logic GD5426 (ISA)", .internal_name = "cl_gd5426_isa", - .flags = DEVICE_AT | DEVICE_ISA, - .local = CIRRUS_ID_CLGD5426, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = CIRRUS_ID_CLGD5426, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5428_isa_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5426_config + .force_redraw = gd54xx_force_redraw, + .config = gd5426_config }; /*According to a Diamond bios file listing and vgamuseum*/ const device_t gd5426_diamond_speedstar_pro_a1_isa_device = { - .name = "Cirrus Logic GD5426 (ISA) (Diamond SpeedStar Pro Rev. A1)", + .name = "Cirrus Logic GD5426 (ISA) (Diamond SpeedStar Pro Rev. A1)", .internal_name = "cl_gd5426_diamond_a1_isa", - .flags = DEVICE_AT | DEVICE_ISA, - .local = CIRRUS_ID_CLGD5426 | 0x100, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = CIRRUS_ID_CLGD5426 | 0x100, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5426_diamond_a1_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5426_config + .force_redraw = gd54xx_force_redraw, + .config = gd5426_config }; const device_t gd5426_vlb_device = { - .name = "Cirrus Logic GD5426 (VLB)", + .name = "Cirrus Logic GD5426 (VLB)", .internal_name = "cl_gd5426_vlb", - .flags = DEVICE_VLB, - .local = CIRRUS_ID_CLGD5426, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_VLB, + .local = CIRRUS_ID_CLGD5426, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5428_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5426_config + .force_redraw = gd54xx_force_redraw, + .config = gd5426_config }; const device_t gd5426_onboard_device = { - .name = "Cirrus Logic GD5426 (VLB) (On-Board)", + .name = "Cirrus Logic GD5426 (VLB) (On-Board)", .internal_name = "cl_gd5426_onboard", - .flags = DEVICE_VLB, - .local = CIRRUS_ID_CLGD5426 | 0x200, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_VLB, + .local = CIRRUS_ID_CLGD5426 | 0x200, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = NULL }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = NULL + .force_redraw = gd54xx_force_redraw, + .config = NULL }; const device_t gd5428_isa_device = { - .name = "Cirrus Logic GD5428 (ISA)", + .name = "Cirrus Logic GD5428 (ISA)", .internal_name = "cl_gd5428_isa", - .flags = DEVICE_AT | DEVICE_ISA, - .local = CIRRUS_ID_CLGD5428, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = CIRRUS_ID_CLGD5428, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5428_isa_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5426_config + .force_redraw = gd54xx_force_redraw, + .config = gd5426_config }; const device_t gd5428_vlb_device = { - .name = "Cirrus Logic GD5428 (VLB)", + .name = "Cirrus Logic GD5428 (VLB)", .internal_name = "cl_gd5428_vlb", - .flags = DEVICE_VLB, - .local = CIRRUS_ID_CLGD5428, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_VLB, + .local = CIRRUS_ID_CLGD5428, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5428_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5426_config + .force_redraw = gd54xx_force_redraw, + .config = gd5426_config }; /*According to a Diamond bios file listing and vgamuseum*/ const device_t gd5428_diamond_speedstar_pro_b1_vlb_device = { - .name = "Cirrus Logic GD5428 (VLB) (Diamond SpeedStar Pro Rev. B1)", + .name = "Cirrus Logic GD5428 (VLB) (Diamond SpeedStar Pro Rev. B1)", .internal_name = "cl_gd5428_diamond_b1_vlb", - .flags = DEVICE_VLB, - .local = CIRRUS_ID_CLGD5428 | 0x100, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_VLB, + .local = CIRRUS_ID_CLGD5428 | 0x100, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5428_diamond_b1_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5426_config + .force_redraw = gd54xx_force_redraw, + .config = gd5426_config }; const device_t gd5428_boca_isa_device = { - .name = "Cirrus Logic GD5428 (ISA) (BOCA Research 4610)", + .name = "Cirrus Logic GD5428 (ISA) (BOCA Research 4610)", .internal_name = "cl_gd5428_boca_isa", - .flags = DEVICE_AT | DEVICE_ISA, - .local = CIRRUS_ID_CLGD5428 | 0x100, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = CIRRUS_ID_CLGD5428 | 0x100, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5428_boca_isa_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5426_config + .force_redraw = gd54xx_force_redraw, + .config = gd5426_config }; const device_t gd5428_mca_device = { - .name = "Cirrus Logic GD5428 (MCA) (IBM SVGA Adapter/A)", + .name = "Cirrus Logic GD5428 (MCA) (IBM SVGA Adapter/A)", .internal_name = "ibm1mbsvga", - .flags = DEVICE_MCA, - .local = CIRRUS_ID_CLGD5428, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_MCA, + .local = CIRRUS_ID_CLGD5428, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5428_mca_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = NULL + .force_redraw = gd54xx_force_redraw, + .config = NULL }; const device_t gd5426_mca_device = { - .name = "Cirrus Logic GD5426 (MCA) (Reply Video Adapter)", + .name = "Cirrus Logic GD5426 (MCA) (Reply Video Adapter)", .internal_name = "replymcasvga", - .flags = DEVICE_MCA, - .local = CIRRUS_ID_CLGD5426, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_MCA, + .local = CIRRUS_ID_CLGD5426, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5426_mca_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5426_config + .force_redraw = gd54xx_force_redraw, + .config = gd5426_config }; const device_t gd5428_onboard_device = { - .name = "Cirrus Logic GD5428 (ISA) (On-Board)", + .name = "Cirrus Logic GD5428 (ISA) (On-Board)", .internal_name = "cl_gd5428_onboard", - .flags = DEVICE_AT | DEVICE_ISA, - .local = CIRRUS_ID_CLGD5428, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = CIRRUS_ID_CLGD5428, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5428_isa_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5428_onboard_config + .force_redraw = gd54xx_force_redraw, + .config = gd5428_onboard_config }; const device_t gd5429_isa_device = { - .name = "Cirrus Logic GD5429 (ISA)", + .name = "Cirrus Logic GD5429 (ISA)", .internal_name = "cl_gd5429_isa", - .flags = DEVICE_AT | DEVICE_ISA, - .local = CIRRUS_ID_CLGD5429, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = CIRRUS_ID_CLGD5429, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5429_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5429_config + .force_redraw = gd54xx_force_redraw, + .config = gd5429_config }; const device_t gd5429_vlb_device = { - .name = "Cirrus Logic GD5429 (VLB)", + .name = "Cirrus Logic GD5429 (VLB)", .internal_name = "cl_gd5429_vlb", - .flags = DEVICE_VLB, - .local = CIRRUS_ID_CLGD5429, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_VLB, + .local = CIRRUS_ID_CLGD5429, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5429_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5429_config + .force_redraw = gd54xx_force_redraw, + .config = gd5429_config }; /*According to a Diamond bios file listing and vgamuseum*/ const device_t gd5430_diamond_speedstar_pro_se_a8_vlb_device = { - .name = "Cirrus Logic GD5430 (VLB) (Diamond SpeedStar Pro SE Rev. A8)", + .name = "Cirrus Logic GD5430 (VLB) (Diamond SpeedStar Pro SE Rev. A8)", .internal_name = "cl_gd5430_vlb_diamond", - .flags = DEVICE_VLB, - .local = CIRRUS_ID_CLGD5430, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_VLB, + .local = CIRRUS_ID_CLGD5430, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5430_diamond_a8_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5429_config + .force_redraw = gd54xx_force_redraw, + .config = gd5429_config }; const device_t gd5430_vlb_device = { - .name = "Cirrus Logic GD5430", + .name = "Cirrus Logic GD5430", .internal_name = "cl_gd5430_vlb", - .flags = DEVICE_VLB, - .local = CIRRUS_ID_CLGD5430 | 0x100, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_VLB, + .local = CIRRUS_ID_CLGD5430 | 0x100, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5430_orchid_vlb_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5429_config + .force_redraw = gd54xx_force_redraw, + .config = gd5429_config }; const device_t gd5430_pci_device = { - .name = "Cirrus Logic GD5430 (PCI)", + .name = "Cirrus Logic GD5430 (PCI)", .internal_name = "cl_gd5430_pci", - .flags = DEVICE_PCI, - .local = CIRRUS_ID_CLGD5430, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_PCI, + .local = CIRRUS_ID_CLGD5430, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5430_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5429_config + .force_redraw = gd54xx_force_redraw, + .config = gd5429_config }; const device_t gd5434_isa_device = { - .name = "Cirrus Logic GD5434 (ISA)", + .name = "Cirrus Logic GD5434 (ISA)", .internal_name = "cl_gd5434_isa", - .flags = DEVICE_AT | DEVICE_ISA, - .local = CIRRUS_ID_CLGD5434, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = CIRRUS_ID_CLGD5434, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5434_isa_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5434_config + .force_redraw = gd54xx_force_redraw, + .config = gd5434_config }; /*According to a Diamond bios file listing and vgamuseum*/ const device_t gd5434_diamond_speedstar_64_a3_isa_device = { - .name = "Cirrus Logic GD5434 (ISA) (Diamond SpeedStar 64 Rev. A3)", + .name = "Cirrus Logic GD5434 (ISA) (Diamond SpeedStar 64 Rev. A3)", .internal_name = "cl_gd5434_diamond_a3_isa", - .flags = DEVICE_AT | DEVICE_ISA, - .local = CIRRUS_ID_CLGD5434 | 0x100, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = CIRRUS_ID_CLGD5434 | 0x100, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5434_diamond_a3_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5429_config + .force_redraw = gd54xx_force_redraw, + .config = gd5429_config }; const device_t gd5434_onboard_pci_device = { - .name = "Cirrus Logic GD5434-4 (PCI) (On-Board)", + .name = "Cirrus Logic GD5434-4 (PCI) (On-Board)", .internal_name = "cl_gd5434_onboard_pci", - .flags = DEVICE_PCI, - .local = CIRRUS_ID_CLGD5434 | 0x200, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_PCI, + .local = CIRRUS_ID_CLGD5434 | 0x200, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = NULL }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5434_onboard_config + .force_redraw = gd54xx_force_redraw, + .config = gd5434_onboard_config }; const device_t gd5434_vlb_device = { - .name = "Cirrus Logic GD5434 (VLB)", + .name = "Cirrus Logic GD5434 (VLB)", .internal_name = "cl_gd5434_vlb", - .flags = DEVICE_VLB, - .local = CIRRUS_ID_CLGD5434, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_VLB, + .local = CIRRUS_ID_CLGD5434, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5430_orchid_vlb_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5434_config + .force_redraw = gd54xx_force_redraw, + .config = gd5434_config }; const device_t gd5434_pci_device = { - .name = "Cirrus Logic GD5434 (PCI)", + .name = "Cirrus Logic GD5434 (PCI)", .internal_name = "cl_gd5434_pci", - .flags = DEVICE_PCI, - .local = CIRRUS_ID_CLGD5434, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_PCI, + .local = CIRRUS_ID_CLGD5434, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5434_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5434_config + .force_redraw = gd54xx_force_redraw, + .config = gd5434_config }; const device_t gd5436_pci_device = { - .name = "Cirrus Logic GD5436 (PCI)", + .name = "Cirrus Logic GD5436 (PCI)", .internal_name = "cl_gd5436_pci", - .flags = DEVICE_PCI, - .local = CIRRUS_ID_CLGD5436, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_PCI, + .local = CIRRUS_ID_CLGD5436, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5436_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5434_config + .force_redraw = gd54xx_force_redraw, + .config = gd5434_config }; const device_t gd5440_onboard_pci_device = { - .name = "Cirrus Logic GD5440 (PCI) (On-Board)", + .name = "Cirrus Logic GD5440 (PCI) (On-Board)", .internal_name = "cl_gd5440_onboard_pci", - .flags = DEVICE_PCI, - .local = CIRRUS_ID_CLGD5440 | 0x600, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_PCI, + .local = CIRRUS_ID_CLGD5440 | 0x600, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = NULL }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5440_onboard_config + .force_redraw = gd54xx_force_redraw, + .config = gd5440_onboard_config }; const device_t gd5440_pci_device = { - .name = "Cirrus Logic GD5440 (PCI)", + .name = "Cirrus Logic GD5440 (PCI)", .internal_name = "cl_gd5440_pci", - .flags = DEVICE_PCI, - .local = CIRRUS_ID_CLGD5440 | 0x400, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_PCI, + .local = CIRRUS_ID_CLGD5440 | 0x400, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5440_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5429_config + .force_redraw = gd54xx_force_redraw, + .config = gd5429_config }; const device_t gd5446_pci_device = { - .name = "Cirrus Logic GD5446 (PCI)", + .name = "Cirrus Logic GD5446 (PCI)", .internal_name = "cl_gd5446_pci", - .flags = DEVICE_PCI, - .local = CIRRUS_ID_CLGD5446, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_PCI, + .local = CIRRUS_ID_CLGD5446, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5446_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5434_config + .force_redraw = gd54xx_force_redraw, + .config = gd5434_config }; const device_t gd5446_stb_pci_device = { - .name = "Cirrus Logic GD5446 (PCI) (STB Nitro 64V)", + .name = "Cirrus Logic GD5446 (PCI) (STB Nitro 64V)", .internal_name = "cl_gd5446_stb_pci", - .flags = DEVICE_PCI, - .local = CIRRUS_ID_CLGD5446 | 0x100, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_PCI, + .local = CIRRUS_ID_CLGD5446 | 0x100, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5446_stb_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5434_config + .force_redraw = gd54xx_force_redraw, + .config = gd5434_config }; const device_t gd5480_pci_device = { - .name = "Cirrus Logic GD5480 (PCI)", + .name = "Cirrus Logic GD5480 (PCI)", .internal_name = "cl_gd5480_pci", - .flags = DEVICE_PCI, - .local = CIRRUS_ID_CLGD5480, - .init = gd54xx_init, - .close = gd54xx_close, - .reset = gd54xx_reset, + .flags = DEVICE_PCI, + .local = CIRRUS_ID_CLGD5480, + .init = gd54xx_init, + .close = gd54xx_close, + .reset = gd54xx_reset, { .available = gd5480_available }, .speed_changed = gd54xx_speed_changed, - .force_redraw = gd54xx_force_redraw, - .config = gd5480_config + .force_redraw = gd54xx_force_redraw, + .config = gd5480_config }; diff --git a/src/video/vid_colorplus.c b/src/video/vid_colorplus.c index 2dc2d2308..03f20543d 100644 --- a/src/video/vid_colorplus.c +++ b/src/video/vid_colorplus.c @@ -35,400 +35,350 @@ #include <86box/vid_colorplus.h> #include <86box/vid_cga_comp.h> - /* Bits in the colorplus control register: */ -#define COLORPLUS_PLANE_SWAP 0x40 /* Swap planes at 0000h and 4000h */ -#define COLORPLUS_640x200_MODE 0x20 /* 640x200x4 mode active */ -#define COLORPLUS_320x200_MODE 0x10 /* 320x200x16 mode active */ -#define COLORPLUS_EITHER_MODE 0x30 /* Either mode active */ +#define COLORPLUS_PLANE_SWAP 0x40 /* Swap planes at 0000h and 4000h */ +#define COLORPLUS_640x200_MODE 0x20 /* 640x200x4 mode active */ +#define COLORPLUS_320x200_MODE 0x10 /* 320x200x16 mode active */ +#define COLORPLUS_EITHER_MODE 0x30 /* Either mode active */ /* Bits in the CGA graphics mode register */ -#define CGA_GRAPHICS_MODE 0x02 /* CGA graphics mode selected? */ +#define CGA_GRAPHICS_MODE 0x02 /* CGA graphics mode selected? */ -#define CGA_RGB 0 -#define CGA_COMPOSITE 1 +#define CGA_RGB 0 +#define CGA_COMPOSITE 1 -#define COMPOSITE_OLD 0 -#define COMPOSITE_NEW 1 - - -video_timings_t timing_colorplus = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; +#define COMPOSITE_OLD 0 +#define COMPOSITE_NEW 1 +video_timings_t timing_colorplus = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; void cga_recalctimings(cga_t *cga); -void colorplus_out(uint16_t addr, uint8_t val, void *p) +void +colorplus_out(uint16_t addr, uint8_t val, void *p) { - colorplus_t *colorplus = (colorplus_t *)p; + colorplus_t *colorplus = (colorplus_t *) p; - if (addr == 0x3DD) - { - colorplus->control = val & 0x70; - } - else - { - cga_out(addr, val, &colorplus->cga); - } + if (addr == 0x3DD) { + colorplus->control = val & 0x70; + } else { + cga_out(addr, val, &colorplus->cga); + } } -uint8_t colorplus_in(uint16_t addr, void *p) +uint8_t +colorplus_in(uint16_t addr, void *p) { - colorplus_t *colorplus = (colorplus_t *)p; + colorplus_t *colorplus = (colorplus_t *) p; - return cga_in(addr, &colorplus->cga); + return cga_in(addr, &colorplus->cga); } -void colorplus_write(uint32_t addr, uint8_t val, void *p) +void +colorplus_write(uint32_t addr, uint8_t val, void *p) { - colorplus_t *colorplus = (colorplus_t *)p; + colorplus_t *colorplus = (colorplus_t *) p; - if ((colorplus->control & COLORPLUS_PLANE_SWAP) && - (colorplus->control & COLORPLUS_EITHER_MODE) && - (colorplus->cga.cgamode & CGA_GRAPHICS_MODE)) - { - addr ^= 0x4000; - } - else if (!(colorplus->control & COLORPLUS_EITHER_MODE)) - { - addr &= 0x3FFF; - } - colorplus->cga.vram[addr & 0x7fff] = val; - if (colorplus->cga.snow_enabled) + if ((colorplus->control & COLORPLUS_PLANE_SWAP) && (colorplus->control & COLORPLUS_EITHER_MODE) && (colorplus->cga.cgamode & CGA_GRAPHICS_MODE)) { + addr ^= 0x4000; + } else if (!(colorplus->control & COLORPLUS_EITHER_MODE)) { + addr &= 0x3FFF; + } + colorplus->cga.vram[addr & 0x7fff] = val; + if (colorplus->cga.snow_enabled) { + int offset = ((timer_get_remaining_u64(&colorplus->cga.timer) / CGACONST) * 2) & 0xfc; + colorplus->cga.charbuffer[offset] = colorplus->cga.vram[addr & 0x7fff]; + colorplus->cga.charbuffer[offset | 1] = colorplus->cga.vram[addr & 0x7fff]; + } + cycles -= 4; +} + +uint8_t +colorplus_read(uint32_t addr, void *p) +{ + colorplus_t *colorplus = (colorplus_t *) p; + + if ((colorplus->control & COLORPLUS_PLANE_SWAP) && (colorplus->control & COLORPLUS_EITHER_MODE) && (colorplus->cga.cgamode & CGA_GRAPHICS_MODE)) { + addr ^= 0x4000; + } else if (!(colorplus->control & COLORPLUS_EITHER_MODE)) { + addr &= 0x3FFF; + } + cycles -= 4; + if (colorplus->cga.snow_enabled) { + int offset = ((timer_get_remaining_u64(&colorplus->cga.timer) / CGACONST) * 2) & 0xfc; + colorplus->cga.charbuffer[offset] = colorplus->cga.vram[addr & 0x7fff]; + colorplus->cga.charbuffer[offset | 1] = colorplus->cga.vram[addr & 0x7fff]; + } + return colorplus->cga.vram[addr & 0x7fff]; +} + +void +colorplus_recalctimings(colorplus_t *colorplus) +{ + cga_recalctimings(&colorplus->cga); +} + +void +colorplus_poll(void *p) +{ + colorplus_t *colorplus = (colorplus_t *) p; + int x, c; + int oldvc; + uint16_t dat0, dat1; + int cols[4]; + int col; + int oldsc; + static const int cols16[16] = { 0x10, 0x12, 0x14, 0x16, + 0x18, 0x1A, 0x1C, 0x1E, + 0x11, 0x13, 0x15, 0x17, + 0x19, 0x1B, 0x1D, 0x1F }; + uint8_t *plane0 = colorplus->cga.vram; + uint8_t *plane1 = colorplus->cga.vram + 0x4000; + + /* If one of the extra modes is not selected, drop down to the CGA + * drawing code. */ + if (!((colorplus->control & COLORPLUS_EITHER_MODE) && (colorplus->cga.cgamode & CGA_GRAPHICS_MODE))) { + cga_poll(&colorplus->cga); + return; + } + + if (!colorplus->cga.linepos) { + timer_advance_u64(&colorplus->cga.timer, colorplus->cga.dispofftime); + colorplus->cga.cgastat |= 1; + colorplus->cga.linepos = 1; + oldsc = colorplus->cga.sc; + if ((colorplus->cga.crtc[8] & 3) == 3) + colorplus->cga.sc = ((colorplus->cga.sc << 1) + colorplus->cga.oddeven) & 7; + if (colorplus->cga.cgadispon) { + if (colorplus->cga.displine < colorplus->cga.firstline) { + colorplus->cga.firstline = colorplus->cga.displine; + video_wait_for_buffer(); + } + colorplus->cga.lastline = colorplus->cga.displine; + /* Left / right border */ + for (c = 0; c < 8; c++) { + buffer32->line[colorplus->cga.displine][c] = buffer32->line[colorplus->cga.displine][c + (colorplus->cga.crtc[1] << 4) + 8] = (colorplus->cga.cgacol & 15) + 16; + } + if (colorplus->control & COLORPLUS_320x200_MODE) { + for (x = 0; x < colorplus->cga.crtc[1]; x++) { + dat0 = (plane0[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000)] << 8) | plane0[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000) + 1]; + dat1 = (plane1[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000)] << 8) | plane1[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000) + 1]; + colorplus->cga.ma++; + for (c = 0; c < 8; c++) { + buffer32->line[colorplus->cga.displine][(x << 4) + (c << 1) + 8] = buffer32->line[colorplus->cga.displine][(x << 4) + (c << 1) + 1 + 8] = cols16[(dat0 >> 14) | ((dat1 >> 14) << 2)]; + dat0 <<= 2; + dat1 <<= 2; + } + } + } else if (colorplus->control & COLORPLUS_640x200_MODE) { + cols[0] = (colorplus->cga.cgacol & 15) | 16; + col = (colorplus->cga.cgacol & 16) ? 24 : 16; + if (colorplus->cga.cgamode & 4) { + cols[1] = col | 3; + cols[2] = col | 4; + cols[3] = col | 7; + } else if (colorplus->cga.cgacol & 32) { + cols[1] = col | 3; + cols[2] = col | 5; + cols[3] = col | 7; + } else { + cols[1] = col | 2; + cols[2] = col | 4; + cols[3] = col | 6; + } + for (x = 0; x < colorplus->cga.crtc[1]; x++) { + dat0 = (plane0[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000)] << 8) | plane0[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000) + 1]; + dat1 = (plane1[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000)] << 8) | plane1[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000) + 1]; + colorplus->cga.ma++; + for (c = 0; c < 16; c++) { + buffer32->line[colorplus->cga.displine][(x << 4) + c + 8] = cols[(dat0 >> 15) | ((dat1 >> 15) << 1)]; + dat0 <<= 1; + dat1 <<= 1; + } + } + } + } else /* Top / bottom border */ { - int offset = ((timer_get_remaining_u64(&colorplus->cga.timer) / CGACONST) * 2) & 0xfc; - colorplus->cga.charbuffer[offset] = colorplus->cga.vram[addr & 0x7fff]; - colorplus->cga.charbuffer[offset | 1] = colorplus->cga.vram[addr & 0x7fff]; + cols[0] = (colorplus->cga.cgacol & 15) + 16; + hline(buffer32, 0, colorplus->cga.displine, (colorplus->cga.crtc[1] << 4) + 16, cols[0]); } - cycles -= 4; -} -uint8_t colorplus_read(uint32_t addr, void *p) -{ - colorplus_t *colorplus = (colorplus_t *)p; + x = (colorplus->cga.crtc[1] << 4) + 16; - if ((colorplus->control & COLORPLUS_PLANE_SWAP) && - (colorplus->control & COLORPLUS_EITHER_MODE) && - (colorplus->cga.cgamode & CGA_GRAPHICS_MODE)) - { - addr ^= 0x4000; - } - else if (!(colorplus->control & COLORPLUS_EITHER_MODE)) - { - addr &= 0x3FFF; - } - cycles -= 4; - if (colorplus->cga.snow_enabled) - { - int offset = ((timer_get_remaining_u64(&colorplus->cga.timer) / CGACONST) * 2) & 0xfc; - colorplus->cga.charbuffer[offset] = colorplus->cga.vram[addr & 0x7fff]; - colorplus->cga.charbuffer[offset | 1] = colorplus->cga.vram[addr & 0x7fff]; + if (colorplus->cga.composite) + Composite_Process(colorplus->cga.cgamode, 0, x >> 2, buffer32->line[colorplus->cga.displine]); + + colorplus->cga.sc = oldsc; + if (colorplus->cga.vc == colorplus->cga.crtc[7] && !colorplus->cga.sc) + colorplus->cga.cgastat |= 8; + colorplus->cga.displine++; + if (colorplus->cga.displine >= 360) + colorplus->cga.displine = 0; + } else { + timer_advance_u64(&colorplus->cga.timer, colorplus->cga.dispontime); + colorplus->cga.linepos = 0; + if (colorplus->cga.vsynctime) { + colorplus->cga.vsynctime--; + if (!colorplus->cga.vsynctime) + colorplus->cga.cgastat &= ~8; } - return colorplus->cga.vram[addr & 0x7fff]; -} - -void colorplus_recalctimings(colorplus_t *colorplus) -{ - cga_recalctimings(&colorplus->cga); -} - -void colorplus_poll(void *p) -{ - colorplus_t *colorplus = (colorplus_t *)p; - int x, c; - int oldvc; - uint16_t dat0, dat1; - int cols[4]; - int col; - int oldsc; - static const int cols16[16] = { 0x10,0x12,0x14,0x16, - 0x18,0x1A,0x1C,0x1E, - 0x11,0x13,0x15,0x17, - 0x19,0x1B,0x1D,0x1F }; - uint8_t *plane0 = colorplus->cga.vram; - uint8_t *plane1 = colorplus->cga.vram + 0x4000; - - /* If one of the extra modes is not selected, drop down to the CGA - * drawing code. */ - if (!((colorplus->control & COLORPLUS_EITHER_MODE) && - (colorplus->cga.cgamode & CGA_GRAPHICS_MODE))) - { - cga_poll(&colorplus->cga); - return; - } - - if (!colorplus->cga.linepos) - { - timer_advance_u64(&colorplus->cga.timer, colorplus->cga.dispofftime); - colorplus->cga.cgastat |= 1; - colorplus->cga.linepos = 1; - oldsc = colorplus->cga.sc; - if ((colorplus->cga.crtc[8] & 3) == 3) - colorplus->cga.sc = ((colorplus->cga.sc << 1) + colorplus->cga.oddeven) & 7; - if (colorplus->cga.cgadispon) - { - if (colorplus->cga.displine < colorplus->cga.firstline) - { - colorplus->cga.firstline = colorplus->cga.displine; - video_wait_for_buffer(); - } - colorplus->cga.lastline = colorplus->cga.displine; - /* Left / right border */ - for (c = 0; c < 8; c++) - { - buffer32->line[colorplus->cga.displine][c] = - buffer32->line[colorplus->cga.displine][c + (colorplus->cga.crtc[1] << 4) + 8] = - (colorplus->cga.cgacol & 15) + 16; - } - if (colorplus->control & COLORPLUS_320x200_MODE) - { - for (x = 0; x < colorplus->cga.crtc[1]; x++) - { - dat0 = (plane0[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000)] << 8) | - plane0[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000) + 1]; - dat1 = (plane1[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000)] << 8) | - plane1[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000) + 1]; - colorplus->cga.ma++; - for (c = 0; c < 8; c++) - { - buffer32->line[colorplus->cga.displine][(x << 4) + (c << 1) + 8] = - buffer32->line[colorplus->cga.displine][(x << 4) + (c << 1) + 1 + 8] = - cols16[(dat0 >> 14) | ((dat1 >> 14) << 2)]; - dat0 <<= 2; - dat1 <<= 2; - } - } - } - else if (colorplus->control & COLORPLUS_640x200_MODE) - { - cols[0] = (colorplus->cga.cgacol & 15) | 16; - col = (colorplus->cga.cgacol & 16) ? 24 : 16; - if (colorplus->cga.cgamode & 4) - { - cols[1] = col | 3; - cols[2] = col | 4; - cols[3] = col | 7; - } - else if (colorplus->cga.cgacol & 32) - { - cols[1] = col | 3; - cols[2] = col | 5; - cols[3] = col | 7; - } - else - { - cols[1] = col | 2; - cols[2] = col | 4; - cols[3] = col | 6; - } - for (x = 0; x < colorplus->cga.crtc[1]; x++) - { - dat0 = (plane0[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000)] << 8) | - plane0[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000) + 1]; - dat1 = (plane1[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000)] << 8) | - plane1[((colorplus->cga.ma << 1) & 0x1fff) + ((colorplus->cga.sc & 1) * 0x2000) + 1]; - colorplus->cga.ma++; - for (c = 0; c < 16; c++) - { - buffer32->line[colorplus->cga.displine][(x << 4) + c + 8] = - cols[(dat0 >> 15) | ((dat1 >> 15) << 1)]; - dat0 <<= 1; - dat1 <<= 1; - } - } - } - } - else /* Top / bottom border */ - { - cols[0] = (colorplus->cga.cgacol & 15) + 16; - hline(buffer32, 0, colorplus->cga.displine, (colorplus->cga.crtc[1] << 4) + 16, cols[0]); - } - - x = (colorplus->cga.crtc[1] << 4) + 16; - - if (colorplus->cga.composite) - Composite_Process(colorplus->cga.cgamode, 0, x >> 2, buffer32->line[colorplus->cga.displine]); - - colorplus->cga.sc = oldsc; - if (colorplus->cga.vc == colorplus->cga.crtc[7] && !colorplus->cga.sc) - colorplus->cga.cgastat |= 8; - colorplus->cga.displine++; - if (colorplus->cga.displine >= 360) - colorplus->cga.displine = 0; + if (colorplus->cga.sc == (colorplus->cga.crtc[11] & 31) || ((colorplus->cga.crtc[8] & 3) == 3 && colorplus->cga.sc == ((colorplus->cga.crtc[11] & 31) >> 1))) { + colorplus->cga.con = 0; + colorplus->cga.coff = 1; } - else - { - timer_advance_u64(&colorplus->cga.timer, colorplus->cga.dispontime); - colorplus->cga.linepos = 0; - if (colorplus->cga.vsynctime) - { - colorplus->cga.vsynctime--; - if (!colorplus->cga.vsynctime) - colorplus->cga.cgastat &= ~8; - } - if (colorplus->cga.sc == (colorplus->cga.crtc[11] & 31) || ((colorplus->cga.crtc[8] & 3) == 3 && colorplus->cga.sc == ((colorplus->cga.crtc[11] & 31) >> 1))) - { - colorplus->cga.con = 0; - colorplus->cga.coff = 1; - } - if ((colorplus->cga.crtc[8] & 3) == 3 && colorplus->cga.sc == (colorplus->cga.crtc[9] >> 1)) - colorplus->cga.maback = colorplus->cga.ma; - if (colorplus->cga.vadj) - { - colorplus->cga.sc++; - colorplus->cga.sc &= 31; - colorplus->cga.ma = colorplus->cga.maback; - colorplus->cga.vadj--; - if (!colorplus->cga.vadj) - { - colorplus->cga.cgadispon = 1; - colorplus->cga.ma = colorplus->cga.maback = (colorplus->cga.crtc[13] | (colorplus->cga.crtc[12] << 8)) & 0x3fff; - colorplus->cga.sc = 0; - } - } - else if (colorplus->cga.sc == colorplus->cga.crtc[9]) - { - colorplus->cga.maback = colorplus->cga.ma; - colorplus->cga.sc = 0; - oldvc = colorplus->cga.vc; - colorplus->cga.vc++; - colorplus->cga.vc &= 127; + if ((colorplus->cga.crtc[8] & 3) == 3 && colorplus->cga.sc == (colorplus->cga.crtc[9] >> 1)) + colorplus->cga.maback = colorplus->cga.ma; + if (colorplus->cga.vadj) { + colorplus->cga.sc++; + colorplus->cga.sc &= 31; + colorplus->cga.ma = colorplus->cga.maback; + colorplus->cga.vadj--; + if (!colorplus->cga.vadj) { + colorplus->cga.cgadispon = 1; + colorplus->cga.ma = colorplus->cga.maback = (colorplus->cga.crtc[13] | (colorplus->cga.crtc[12] << 8)) & 0x3fff; + colorplus->cga.sc = 0; + } + } else if (colorplus->cga.sc == colorplus->cga.crtc[9]) { + colorplus->cga.maback = colorplus->cga.ma; + colorplus->cga.sc = 0; + oldvc = colorplus->cga.vc; + colorplus->cga.vc++; + colorplus->cga.vc &= 127; - if (colorplus->cga.vc == colorplus->cga.crtc[6]) - colorplus->cga.cgadispon = 0; + if (colorplus->cga.vc == colorplus->cga.crtc[6]) + colorplus->cga.cgadispon = 0; - if (oldvc == colorplus->cga.crtc[4]) - { - colorplus->cga.vc = 0; - colorplus->cga.vadj = colorplus->cga.crtc[5]; - if (!colorplus->cga.vadj) colorplus->cga.cgadispon = 1; - if (!colorplus->cga.vadj) colorplus->cga.ma = colorplus->cga.maback = (colorplus->cga.crtc[13] | (colorplus->cga.crtc[12] << 8)) & 0x3fff; - if ((colorplus->cga.crtc[10] & 0x60) == 0x20) colorplus->cga.cursoron = 0; - else colorplus->cga.cursoron = colorplus->cga.cgablink & 8; - } - - if (colorplus->cga.vc == colorplus->cga.crtc[7]) - { - colorplus->cga.cgadispon = 0; - colorplus->cga.displine = 0; - colorplus->cga.vsynctime = 16; - if (colorplus->cga.crtc[7]) - { - if (colorplus->cga.cgamode & 1) x = (colorplus->cga.crtc[1] << 3) + 16; - else x = (colorplus->cga.crtc[1] << 4) + 16; - colorplus->cga.lastline++; - if (x != xsize || (colorplus->cga.lastline - colorplus->cga.firstline) != ysize) - { - xsize = x; - ysize = colorplus->cga.lastline - colorplus->cga.firstline; - if (xsize < 64) xsize = 656; - if (ysize < 32) ysize = 200; - set_screen_size(xsize, (ysize << 1) + 16); - } - - if (colorplus->cga.composite) - video_blit_memtoscreen(0, colorplus->cga.firstline - 4, xsize, (colorplus->cga.lastline - colorplus->cga.firstline) + 8); - else - video_blit_memtoscreen_8(0, colorplus->cga.firstline - 4, xsize, (colorplus->cga.lastline - colorplus->cga.firstline) + 8); - frames++; - - video_res_x = xsize - 16; - video_res_y = ysize; - if (colorplus->cga.cgamode & 1) - { - video_res_x /= 8; - video_res_y /= colorplus->cga.crtc[9] + 1; - video_bpp = 0; - } - else if (!(colorplus->cga.cgamode & 2)) - { - video_res_x /= 16; - video_res_y /= colorplus->cga.crtc[9] + 1; - video_bpp = 0; - } - else if (!(colorplus->cga.cgamode & 16)) - { - video_res_x /= 2; - video_bpp = 2; - } - else - { - video_bpp = 1; - } - } - colorplus->cga.firstline = 1000; - colorplus->cga.lastline = 0; - colorplus->cga.cgablink++; - colorplus->cga.oddeven ^= 1; - } - } + if (oldvc == colorplus->cga.crtc[4]) { + colorplus->cga.vc = 0; + colorplus->cga.vadj = colorplus->cga.crtc[5]; + if (!colorplus->cga.vadj) + colorplus->cga.cgadispon = 1; + if (!colorplus->cga.vadj) + colorplus->cga.ma = colorplus->cga.maback = (colorplus->cga.crtc[13] | (colorplus->cga.crtc[12] << 8)) & 0x3fff; + if ((colorplus->cga.crtc[10] & 0x60) == 0x20) + colorplus->cga.cursoron = 0; else - { - colorplus->cga.sc++; - colorplus->cga.sc &= 31; - colorplus->cga.ma = colorplus->cga.maback; - } - if (colorplus->cga.cgadispon) - colorplus->cga.cgastat &= ~1; - if ((colorplus->cga.sc == (colorplus->cga.crtc[10] & 31) || ((colorplus->cga.crtc[8] & 3) == 3 && colorplus->cga.sc == ((colorplus->cga.crtc[10] & 31) >> 1)))) - colorplus->cga.con = 1; - if (colorplus->cga.cgadispon && (colorplus->cga.cgamode & 1)) - { - for (x = 0; x < (colorplus->cga.crtc[1] << 1); x++) - colorplus->cga.charbuffer[x] = colorplus->cga.vram[(((colorplus->cga.ma << 1) + x) & 0x3fff)]; + colorplus->cga.cursoron = colorplus->cga.cgablink & 8; + } + + if (colorplus->cga.vc == colorplus->cga.crtc[7]) { + colorplus->cga.cgadispon = 0; + colorplus->cga.displine = 0; + colorplus->cga.vsynctime = 16; + if (colorplus->cga.crtc[7]) { + if (colorplus->cga.cgamode & 1) + x = (colorplus->cga.crtc[1] << 3) + 16; + else + x = (colorplus->cga.crtc[1] << 4) + 16; + colorplus->cga.lastline++; + if (x != xsize || (colorplus->cga.lastline - colorplus->cga.firstline) != ysize) { + xsize = x; + ysize = colorplus->cga.lastline - colorplus->cga.firstline; + if (xsize < 64) + xsize = 656; + if (ysize < 32) + ysize = 200; + set_screen_size(xsize, (ysize << 1) + 16); + } + + if (colorplus->cga.composite) + video_blit_memtoscreen(0, colorplus->cga.firstline - 4, xsize, (colorplus->cga.lastline - colorplus->cga.firstline) + 8); + else + video_blit_memtoscreen_8(0, colorplus->cga.firstline - 4, xsize, (colorplus->cga.lastline - colorplus->cga.firstline) + 8); + frames++; + + video_res_x = xsize - 16; + video_res_y = ysize; + if (colorplus->cga.cgamode & 1) { + video_res_x /= 8; + video_res_y /= colorplus->cga.crtc[9] + 1; + video_bpp = 0; + } else if (!(colorplus->cga.cgamode & 2)) { + video_res_x /= 16; + video_res_y /= colorplus->cga.crtc[9] + 1; + video_bpp = 0; + } else if (!(colorplus->cga.cgamode & 16)) { + video_res_x /= 2; + video_bpp = 2; + } else { + video_bpp = 1; + } } + colorplus->cga.firstline = 1000; + colorplus->cga.lastline = 0; + colorplus->cga.cgablink++; + colorplus->cga.oddeven ^= 1; + } + } else { + colorplus->cga.sc++; + colorplus->cga.sc &= 31; + colorplus->cga.ma = colorplus->cga.maback; } + if (colorplus->cga.cgadispon) + colorplus->cga.cgastat &= ~1; + if ((colorplus->cga.sc == (colorplus->cga.crtc[10] & 31) || ((colorplus->cga.crtc[8] & 3) == 3 && colorplus->cga.sc == ((colorplus->cga.crtc[10] & 31) >> 1)))) + colorplus->cga.con = 1; + if (colorplus->cga.cgadispon && (colorplus->cga.cgamode & 1)) { + for (x = 0; x < (colorplus->cga.crtc[1] << 1); x++) + colorplus->cga.charbuffer[x] = colorplus->cga.vram[(((colorplus->cga.ma << 1) + x) & 0x3fff)]; + } + } } -void colorplus_init(colorplus_t *colorplus) +void +colorplus_init(colorplus_t *colorplus) { - cga_init(&colorplus->cga); + cga_init(&colorplus->cga); } -void *colorplus_standalone_init(const device_t *info) +void * +colorplus_standalone_init(const device_t *info) { - int display_type; + int display_type; - colorplus_t *colorplus = malloc(sizeof(colorplus_t)); - memset(colorplus, 0, sizeof(colorplus_t)); + colorplus_t *colorplus = malloc(sizeof(colorplus_t)); + memset(colorplus, 0, sizeof(colorplus_t)); - video_inform(VIDEO_FLAG_TYPE_CGA, &timing_colorplus); + video_inform(VIDEO_FLAG_TYPE_CGA, &timing_colorplus); - /* Copied from the CGA init. Ideally this would be done by - * calling a helper function rather than duplicating code */ - display_type = device_get_config_int("display_type"); - colorplus->cga.composite = (display_type != CGA_RGB); - colorplus->cga.revision = device_get_config_int("composite_type"); - colorplus->cga.snow_enabled = device_get_config_int("snow_enabled"); + /* Copied from the CGA init. Ideally this would be done by + * calling a helper function rather than duplicating code */ + display_type = device_get_config_int("display_type"); + colorplus->cga.composite = (display_type != CGA_RGB); + colorplus->cga.revision = device_get_config_int("composite_type"); + colorplus->cga.snow_enabled = device_get_config_int("snow_enabled"); - colorplus->cga.vram = malloc(0x8000); + colorplus->cga.vram = malloc(0x8000); - cga_comp_init(colorplus->cga.revision); - timer_add(&colorplus->cga.timer, colorplus_poll, colorplus, 1); - mem_mapping_add(&colorplus->cga.mapping, 0xb8000, 0x08000, colorplus_read, NULL, NULL, colorplus_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, colorplus); - io_sethandler(0x03d0, 0x0010, colorplus_in, NULL, NULL, colorplus_out, NULL, NULL, colorplus); + cga_comp_init(colorplus->cga.revision); + timer_add(&colorplus->cga.timer, colorplus_poll, colorplus, 1); + mem_mapping_add(&colorplus->cga.mapping, 0xb8000, 0x08000, colorplus_read, NULL, NULL, colorplus_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, colorplus); + io_sethandler(0x03d0, 0x0010, colorplus_in, NULL, NULL, colorplus_out, NULL, NULL, colorplus); - lpt3_init(0x3BC); + lpt3_init(0x3BC); - return colorplus; + return colorplus; } -void colorplus_close(void *p) +void +colorplus_close(void *p) { - colorplus_t *colorplus = (colorplus_t *)p; + colorplus_t *colorplus = (colorplus_t *) p; - free(colorplus->cga.vram); - free(colorplus); + free(colorplus->cga.vram); + free(colorplus); } -void colorplus_speed_changed(void *p) +void +colorplus_speed_changed(void *p) { - colorplus_t *colorplus = (colorplus_t *)p; + colorplus_t *colorplus = (colorplus_t *) p; - cga_recalctimings(&colorplus->cga); + cga_recalctimings(&colorplus->cga); } static const device_config_t colorplus_config[] = { -// clang-format off + // clang-format off { .name = "display_type", .description = "Display type", @@ -479,17 +429,16 @@ static const device_config_t colorplus_config[] = { // clang-format on }; -const device_t colorplus_device = -{ - .name = "Colorplus", +const device_t colorplus_device = { + .name = "Colorplus", .internal_name = "plantronics", - .flags = DEVICE_ISA, - .local = 0, - .init = colorplus_standalone_init, - .close = colorplus_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = colorplus_standalone_init, + .close = colorplus_close, + .reset = NULL, { .available = NULL }, .speed_changed = colorplus_speed_changed, - .force_redraw = NULL, - .config = colorplus_config + .force_redraw = NULL, + .config = colorplus_config }; diff --git a/src/video/vid_compaq_cga.c b/src/video/vid_compaq_cga.c index 052fcfb7d..9b61b70f5 100644 --- a/src/video/vid_compaq_cga.c +++ b/src/video/vid_compaq_cga.c @@ -36,378 +36,375 @@ #include <86box/vid_cga.h> #include <86box/vid_cga_comp.h> - -#define CGA_RGB 0 +#define CGA_RGB 0 #define CGA_COMPOSITE 1 +static uint32_t vflags; +static uint8_t mdaattr[256][2][2]; -static uint32_t vflags; -static uint8_t mdaattr[256][2][2]; - - -typedef struct compaq_cga_t -{ +typedef struct compaq_cga_t { cga_t cga; } compaq_cga_t; - #ifdef ENABLE_COMPAQ_CGA_LOG int compaq_cga_do_log = ENABLE_COMPAQ_CGA_LOG; - static void compaq_cga_log(const char *fmt, ...) { va_list ap; if (compaq_cga_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define compaq_cga_log(fmt, ...) +# define compaq_cga_log(fmt, ...) #endif - void compaq_cga_recalctimings(compaq_cga_t *self) { double _dispontime, _dispofftime, disptime; disptime = self->cga.crtc[0] + 1; - _dispontime = self->cga.crtc[1]; + _dispontime = self->cga.crtc[1]; _dispofftime = disptime - _dispontime; _dispontime *= MDACONST; _dispofftime *= MDACONST; - self->cga.dispontime = (uint64_t)(_dispontime); - self->cga.dispofftime = (uint64_t)(_dispofftime); + self->cga.dispontime = (uint64_t) (_dispontime); + self->cga.dispofftime = (uint64_t) (_dispofftime); } - void compaq_cga_poll(void *p) { - compaq_cga_t *self = (compaq_cga_t *)p; - uint16_t ca = (self->cga.crtc[15] | (self->cga.crtc[14] << 8)) & 0x3fff; - int drawcursor; - int x, c, xs_temp, ys_temp; - int oldvc; - uint8_t chr, attr; - uint8_t border; - uint8_t cols[4]; - int oldsc; - int underline = 0; - int blink = 0; + compaq_cga_t *self = (compaq_cga_t *) p; + uint16_t ca = (self->cga.crtc[15] | (self->cga.crtc[14] << 8)) & 0x3fff; + int drawcursor; + int x, c, xs_temp, ys_temp; + int oldvc; + uint8_t chr, attr; + uint8_t border; + uint8_t cols[4]; + int oldsc; + int underline = 0; + int blink = 0; /* If in graphics mode or character height is not 13, behave as CGA */ if ((self->cga.cgamode & 0x12) || (self->cga.crtc[9] != 13)) { - overscan_x = overscan_y = 16; - cga_poll(&self->cga); - return; + overscan_x = overscan_y = 16; + cga_poll(&self->cga); + return; } else - overscan_x = overscan_y = 0; + overscan_x = overscan_y = 0; /* We are in Compaq 350-line CGA territory */ if (!self->cga.linepos) { - timer_advance_u64(&self->cga.timer, self->cga.dispofftime); - self->cga.cgastat |= 1; - self->cga.linepos = 1; - oldsc = self->cga.sc; - if ((self->cga.crtc[8] & 3) == 3) - self->cga.sc = ((self->cga.sc << 1) + self->cga.oddeven) & 7; - if (self->cga.cgadispon) { - if (self->cga.displine < self->cga.firstline) { - self->cga.firstline = self->cga.displine; - video_wait_for_buffer(); - compaq_cga_log("Firstline %i\n", firstline); - } - self->cga.lastline = self->cga.displine; + timer_advance_u64(&self->cga.timer, self->cga.dispofftime); + self->cga.cgastat |= 1; + self->cga.linepos = 1; + oldsc = self->cga.sc; + if ((self->cga.crtc[8] & 3) == 3) + self->cga.sc = ((self->cga.sc << 1) + self->cga.oddeven) & 7; + if (self->cga.cgadispon) { + if (self->cga.displine < self->cga.firstline) { + self->cga.firstline = self->cga.displine; + video_wait_for_buffer(); + compaq_cga_log("Firstline %i\n", firstline); + } + self->cga.lastline = self->cga.displine; - cols[0] = (self->cga.cgacol & 15) + 16; + cols[0] = (self->cga.cgacol & 15) + 16; - for (c = 0; c < 8; c++) { - buffer32->line[self->cga.displine][c] = cols[0]; - if (self->cga.cgamode & 1) - buffer32->line[self->cga.displine][c + (self->cga.crtc[1] << 3) + 8] = cols[0]; - else - buffer32->line[self->cga.displine][c + (self->cga.crtc[1] << 4) + 8] = cols[0]; - } + for (c = 0; c < 8; c++) { + buffer32->line[self->cga.displine][c] = cols[0]; + if (self->cga.cgamode & 1) + buffer32->line[self->cga.displine][c + (self->cga.crtc[1] << 3) + 8] = cols[0]; + else + buffer32->line[self->cga.displine][c + (self->cga.crtc[1] << 4) + 8] = cols[0]; + } - if (self->cga.cgamode & 1) { - for (x = 0; x < self->cga.crtc[1]; x++) { - chr = self->cga.charbuffer[x << 1]; - attr = self->cga.charbuffer[(x << 1) + 1]; - drawcursor = ((self->cga.ma == ca) && self->cga.con && self->cga.cursoron); + if (self->cga.cgamode & 1) { + for (x = 0; x < self->cga.crtc[1]; x++) { + chr = self->cga.charbuffer[x << 1]; + attr = self->cga.charbuffer[(x << 1) + 1]; + drawcursor = ((self->cga.ma == ca) && self->cga.con && self->cga.cursoron); - if (vflags) { - underline = 0; - blink = ((self->cga.cgablink & 8) && (self->cga.cgamode & 0x20) && (attr & 0x80) && !drawcursor); - } + if (vflags) { + underline = 0; + blink = ((self->cga.cgablink & 8) && (self->cga.cgamode & 0x20) && (attr & 0x80) && !drawcursor); + } - if (vflags && (self->cga.cgamode & 0x80)) { - cols[0] = mdaattr[attr][blink][0]; - cols[1] = mdaattr[attr][blink][1]; + if (vflags && (self->cga.cgamode & 0x80)) { + cols[0] = mdaattr[attr][blink][0]; + cols[1] = mdaattr[attr][blink][1]; - if ((self->cga.sc == 12) && ((attr & 7) == 1)) - underline = 1; - } else if (self->cga.cgamode & 0x20) { - cols[1] = (attr & 15) + 16; - cols[0] = ((attr >> 4) & 7) + 16; + if ((self->cga.sc == 12) && ((attr & 7) == 1)) + underline = 1; + } else if (self->cga.cgamode & 0x20) { + cols[1] = (attr & 15) + 16; + cols[0] = ((attr >> 4) & 7) + 16; - if (vflags) { - if (blink) - cols[1] = cols[0]; - } else { - if ((self->cga.cgablink & 8) && (attr & 0x80) && !self->cga.drawcursor) - cols[1] = cols[0]; - } - } else { - cols[1] = (attr & 15) + 16; - cols[0] = (attr >> 4) + 16; - } + if (vflags) { + if (blink) + cols[1] = cols[0]; + } else { + if ((self->cga.cgablink & 8) && (attr & 0x80) && !self->cga.drawcursor) + cols[1] = cols[0]; + } + } else { + cols[1] = (attr & 15) + 16; + cols[0] = (attr >> 4) + 16; + } - if (vflags && underline) { - for (c = 0; c < 8; c++) - buffer32->line[self->cga.displine][(x << 3) + c + 8] = mdaattr[attr][blink][1]; - } else if (drawcursor) { - for (c = 0; c < 8; c++) - buffer32->line[self->cga.displine][(x << 3) + c + 8] = cols[(fontdatm[chr + self->cga.fontbase][self->cga.sc & 15] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; - } else { - for (c = 0; c < 8; c++) - buffer32->line[self->cga.displine][(x << 3) + c + 8] = cols[(fontdatm[chr + self->cga.fontbase][self->cga.sc & 15] & (1 << (c ^ 7))) ? 1 : 0]; - } - self->cga.ma++; - } - } else { - for (x = 0; x < self->cga.crtc[1]; x++) { - chr = self->cga.vram[((self->cga.ma << 1) & 0x3fff)]; - attr = self->cga.vram[(((self->cga.ma << 1) + 1) & 0x3fff)]; - drawcursor = ((self->cga.ma == ca) && self->cga.con && self->cga.cursoron); + if (vflags && underline) { + for (c = 0; c < 8; c++) + buffer32->line[self->cga.displine][(x << 3) + c + 8] = mdaattr[attr][blink][1]; + } else if (drawcursor) { + for (c = 0; c < 8; c++) + buffer32->line[self->cga.displine][(x << 3) + c + 8] = cols[(fontdatm[chr + self->cga.fontbase][self->cga.sc & 15] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; + } else { + for (c = 0; c < 8; c++) + buffer32->line[self->cga.displine][(x << 3) + c + 8] = cols[(fontdatm[chr + self->cga.fontbase][self->cga.sc & 15] & (1 << (c ^ 7))) ? 1 : 0]; + } + self->cga.ma++; + } + } else { + for (x = 0; x < self->cga.crtc[1]; x++) { + chr = self->cga.vram[((self->cga.ma << 1) & 0x3fff)]; + attr = self->cga.vram[(((self->cga.ma << 1) + 1) & 0x3fff)]; + drawcursor = ((self->cga.ma == ca) && self->cga.con && self->cga.cursoron); - if (vflags) { - underline = 0; - blink = ((self->cga.cgablink & 8) && (self->cga.cgamode & 0x20) && (attr & 0x80) && !drawcursor); - } + if (vflags) { + underline = 0; + blink = ((self->cga.cgablink & 8) && (self->cga.cgamode & 0x20) && (attr & 0x80) && !drawcursor); + } - if (vflags && (self->cga.cgamode & 0x80)) { - cols[0] = mdaattr[attr][blink][0]; - cols[1] = mdaattr[attr][blink][1]; - if (self->cga.sc == 12 && (attr & 7) == 1) underline = 1; - } else if (self->cga.cgamode & 0x20) { - cols[1] = (attr & 15) + 16; - cols[0] = ((attr >> 4) & 7) + 16; + if (vflags && (self->cga.cgamode & 0x80)) { + cols[0] = mdaattr[attr][blink][0]; + cols[1] = mdaattr[attr][blink][1]; + if (self->cga.sc == 12 && (attr & 7) == 1) + underline = 1; + } else if (self->cga.cgamode & 0x20) { + cols[1] = (attr & 15) + 16; + cols[0] = ((attr >> 4) & 7) + 16; - if (vflags) { - if (blink) - cols[1] = cols[0]; - } else { - if ((self->cga.cgablink & 8) && (attr & 0x80) && !self->cga.drawcursor) - cols[1] = cols[0]; - } - } else { - cols[1] = (attr & 15) + 16; - cols[0] = (attr >> 4) + 16; - } - self->cga.ma++; + if (vflags) { + if (blink) + cols[1] = cols[0]; + } else { + if ((self->cga.cgablink & 8) && (attr & 0x80) && !self->cga.drawcursor) + cols[1] = cols[0]; + } + } else { + cols[1] = (attr & 15) + 16; + cols[0] = (attr >> 4) + 16; + } + self->cga.ma++; - if (vflags && underline) { - for (c = 0; c < 8; c++) - buffer32->line[self->cga.displine][(x << 4)+(c << 1) + 8] = - buffer32->line[self->cga.displine][(x << 4)+(c << 1) + 9] = mdaattr[attr][blink][1]; - } else if (drawcursor) { - for (c = 0; c < 8; c++) - buffer32->line[self->cga.displine][(x << 4)+(c << 1) + 8] = - buffer32->line[self->cga.displine][(x << 4) + (c << 1) + 1 + 8] = - cols[(fontdatm[chr + self->cga.fontbase][self->cga.sc & 15] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; - } else { - for (c = 0; c < 8; c++) - buffer32->line[self->cga.displine][(x << 4) + (c << 1) + 8] = - buffer32->line[self->cga.displine][(x << 4) + (c << 1) + 1 + 8] = - cols[(fontdatm[chr + self->cga.fontbase][self->cga.sc & 15] & (1 << (c ^ 7))) ? 1 : 0]; - } - } - } - } else { - cols[0] = (self->cga.cgacol & 15) + 16; + if (vflags && underline) { + for (c = 0; c < 8; c++) + buffer32->line[self->cga.displine][(x << 4) + (c << 1) + 8] = buffer32->line[self->cga.displine][(x << 4) + (c << 1) + 9] = mdaattr[attr][blink][1]; + } else if (drawcursor) { + for (c = 0; c < 8; c++) + buffer32->line[self->cga.displine][(x << 4) + (c << 1) + 8] = buffer32->line[self->cga.displine][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdatm[chr + self->cga.fontbase][self->cga.sc & 15] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; + } else { + for (c = 0; c < 8; c++) + buffer32->line[self->cga.displine][(x << 4) + (c << 1) + 8] = buffer32->line[self->cga.displine][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdatm[chr + self->cga.fontbase][self->cga.sc & 15] & (1 << (c ^ 7))) ? 1 : 0]; + } + } + } + } else { + cols[0] = (self->cga.cgacol & 15) + 16; - if (self->cga.cgamode & 1) hline(buffer32, 0, self->cga.displine, (self->cga.crtc[1] << 3) + 16, cols[0]); - else hline(buffer32, 0, self->cga.displine, (self->cga.crtc[1] << 4) + 16, cols[0]); - } + if (self->cga.cgamode & 1) + hline(buffer32, 0, self->cga.displine, (self->cga.crtc[1] << 3) + 16, cols[0]); + else + hline(buffer32, 0, self->cga.displine, (self->cga.crtc[1] << 4) + 16, cols[0]); + } - if (self->cga.cgamode & 1) x = (self->cga.crtc[1] << 3) + 16; - else x = (self->cga.crtc[1] << 4) + 16; + if (self->cga.cgamode & 1) + x = (self->cga.crtc[1] << 3) + 16; + else + x = (self->cga.crtc[1] << 4) + 16; - if (self->cga.composite) { - if (self->cga.cgamode & 0x10) - border = 0x00; - else - border = self->cga.cgacol & 0x0f; + if (self->cga.composite) { + if (self->cga.cgamode & 0x10) + border = 0x00; + else + border = self->cga.cgacol & 0x0f; - if (vflags) - Composite_Process(self->cga.cgamode & 0x7f, border, x >> 2, buffer32->line[self->cga.displine]); - else - Composite_Process(self->cga.cgamode, border, x >> 2, buffer32->line[self->cga.displine]); - } + if (vflags) + Composite_Process(self->cga.cgamode & 0x7f, border, x >> 2, buffer32->line[self->cga.displine]); + else + Composite_Process(self->cga.cgamode, border, x >> 2, buffer32->line[self->cga.displine]); + } - self->cga.sc = oldsc; - if (self->cga.vc == self->cga.crtc[7] && !self->cga.sc) - self->cga.cgastat |= 8; - self->cga.displine++; - if (self->cga.displine >= 500) - self->cga.displine = 0; + self->cga.sc = oldsc; + if (self->cga.vc == self->cga.crtc[7] && !self->cga.sc) + self->cga.cgastat |= 8; + self->cga.displine++; + if (self->cga.displine >= 500) + self->cga.displine = 0; } else { - timer_advance_u64(&self->cga.timer, self->cga.dispontime); - self->cga.linepos = 0; - if (self->cga.vsynctime) { - self->cga.vsynctime--; - if (!self->cga.vsynctime) - self->cga.cgastat &= ~8; - } + timer_advance_u64(&self->cga.timer, self->cga.dispontime); + self->cga.linepos = 0; + if (self->cga.vsynctime) { + self->cga.vsynctime--; + if (!self->cga.vsynctime) + self->cga.cgastat &= ~8; + } - if (self->cga.sc == (self->cga.crtc[11] & 31) || ((self->cga.crtc[8] & 3) == 3 && self->cga.sc == ((self->cga.crtc[11] & 31) >> 1))) { - self->cga.con = 0; - self->cga.coff = 1; - } - if ((self->cga.crtc[8] & 3) == 3 && self->cga.sc == (self->cga.crtc[9] >> 1)) - self->cga.maback = self->cga.ma; - if (self->cga.vadj) { - self->cga.sc++; - self->cga.sc &= 31; - self->cga.ma = self->cga.maback; - self->cga.vadj--; - if (!self->cga.vadj) { - self->cga.cgadispon = 1; - self->cga.ma = self->cga.maback = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x3fff; - self->cga.sc = 0; - } - } else if (self->cga.sc == self->cga.crtc[9]) { - self->cga.maback = self->cga.ma; - self->cga.sc = 0; - oldvc = self->cga.vc; - self->cga.vc++; - self->cga.vc &= 127; + if (self->cga.sc == (self->cga.crtc[11] & 31) || ((self->cga.crtc[8] & 3) == 3 && self->cga.sc == ((self->cga.crtc[11] & 31) >> 1))) { + self->cga.con = 0; + self->cga.coff = 1; + } + if ((self->cga.crtc[8] & 3) == 3 && self->cga.sc == (self->cga.crtc[9] >> 1)) + self->cga.maback = self->cga.ma; + if (self->cga.vadj) { + self->cga.sc++; + self->cga.sc &= 31; + self->cga.ma = self->cga.maback; + self->cga.vadj--; + if (!self->cga.vadj) { + self->cga.cgadispon = 1; + self->cga.ma = self->cga.maback = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x3fff; + self->cga.sc = 0; + } + } else if (self->cga.sc == self->cga.crtc[9]) { + self->cga.maback = self->cga.ma; + self->cga.sc = 0; + oldvc = self->cga.vc; + self->cga.vc++; + self->cga.vc &= 127; - if (self->cga.vc == self->cga.crtc[6]) - self->cga.cgadispon = 0; + if (self->cga.vc == self->cga.crtc[6]) + self->cga.cgadispon = 0; - if (oldvc == self->cga.crtc[4]) { - self->cga.vc = 0; - self->cga.vadj = self->cga.crtc[5]; + if (oldvc == self->cga.crtc[4]) { + self->cga.vc = 0; + self->cga.vadj = self->cga.crtc[5]; - if (!self->cga.vadj) self->cga.cgadispon = 1; + if (!self->cga.vadj) + self->cga.cgadispon = 1; - if (!self->cga.vadj) self->cga.ma = self->cga.maback = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x3fff; + if (!self->cga.vadj) + self->cga.ma = self->cga.maback = (self->cga.crtc[13] | (self->cga.crtc[12] << 8)) & 0x3fff; - if ((self->cga.crtc[10] & 0x60) == 0x20) - self->cga.cursoron = 0; - else - self->cga.cursoron = self->cga.cgablink & 8; - } + if ((self->cga.crtc[10] & 0x60) == 0x20) + self->cga.cursoron = 0; + else + self->cga.cursoron = self->cga.cgablink & 8; + } - if (self->cga.vc == self->cga.crtc[7]) { - self->cga.cgadispon = 0; - self->cga.displine = 0; - self->cga.vsynctime = 16; + if (self->cga.vc == self->cga.crtc[7]) { + self->cga.cgadispon = 0; + self->cga.displine = 0; + self->cga.vsynctime = 16; - if (self->cga.crtc[7]) { - compaq_cga_log("Lastline %i Firstline %i %i\n", self->cga.lastline, - self->cga.firstline ,self->cga.lastline - self->cga.firstline); + if (self->cga.crtc[7]) { + compaq_cga_log("Lastline %i Firstline %i %i\n", self->cga.lastline, + self->cga.firstline, self->cga.lastline - self->cga.firstline); - if (self->cga.cgamode & 1) x = (self->cga.crtc[1] << 3) + 16; - else x = (self->cga.crtc[1] << 4) + 16; + if (self->cga.cgamode & 1) + x = (self->cga.crtc[1] << 3) + 16; + else + x = (self->cga.crtc[1] << 4) + 16; - self->cga.lastline++; + self->cga.lastline++; - xs_temp = x; - ys_temp = (self->cga.lastline - self->cga.firstline); + xs_temp = x; + ys_temp = (self->cga.lastline - self->cga.firstline); - if ((xs_temp > 0) && (ys_temp > 0)) { - if (xs_temp < 64) xs_temp = 656; - if (ys_temp < 32) ys_temp = 400; - if (!enable_overscan) - xs_temp -= 16; + if ((xs_temp > 0) && (ys_temp > 0)) { + if (xs_temp < 64) + xs_temp = 656; + if (ys_temp < 32) + ys_temp = 400; + if (!enable_overscan) + xs_temp -= 16; - if ((self->cga.cgamode & 8) && ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get())) { - xsize = xs_temp; - ysize = ys_temp; - set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); + if ((self->cga.cgamode & 8) && ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get())) { + xsize = xs_temp; + ysize = ys_temp; + set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); - if (video_force_resize_get()) - video_force_resize_set(0); - } + if (video_force_resize_get()) + video_force_resize_set(0); + } - if (enable_overscan) { - if (self->cga.composite) - video_blit_memtoscreen(0, self->cga.firstline - 8, xsize, (self->cga.lastline - self->cga.firstline) + 16); - else - video_blit_memtoscreen_8(0, self->cga.firstline - 8, xsize, (self->cga.lastline - self->cga.firstline) + 16); - } else { - if (self->cga.composite) - video_blit_memtoscreen(8, self->cga.firstline, xsize, self->cga.lastline - self->cga.firstline); - else - video_blit_memtoscreen_8(8, self->cga.firstline, xsize, self->cga.lastline - self->cga.firstline); - } - } + if (enable_overscan) { + if (self->cga.composite) + video_blit_memtoscreen(0, self->cga.firstline - 8, xsize, (self->cga.lastline - self->cga.firstline) + 16); + else + video_blit_memtoscreen_8(0, self->cga.firstline - 8, xsize, (self->cga.lastline - self->cga.firstline) + 16); + } else { + if (self->cga.composite) + video_blit_memtoscreen(8, self->cga.firstline, xsize, self->cga.lastline - self->cga.firstline); + else + video_blit_memtoscreen_8(8, self->cga.firstline, xsize, self->cga.lastline - self->cga.firstline); + } + } - frames++; + frames++; - video_res_x = xsize; - if (enable_overscan) - xsize -= 16; - video_res_y = ysize; - if (self->cga.cgamode & 1) { - video_res_x /= 8; - video_res_y /= self->cga.crtc[9] + 1; - video_bpp = 0; - } else if (!(self->cga.cgamode & 2)) { - video_res_x /= 16; - video_res_y /= self->cga.crtc[9] + 1; - video_bpp = 0; - } else if (!(self->cga.cgamode & 16)) { - video_res_x /= 2; - video_bpp = 2; - } else - video_bpp = 1; - } + video_res_x = xsize; + if (enable_overscan) + xsize -= 16; + video_res_y = ysize; + if (self->cga.cgamode & 1) { + video_res_x /= 8; + video_res_y /= self->cga.crtc[9] + 1; + video_bpp = 0; + } else if (!(self->cga.cgamode & 2)) { + video_res_x /= 16; + video_res_y /= self->cga.crtc[9] + 1; + video_bpp = 0; + } else if (!(self->cga.cgamode & 16)) { + video_res_x /= 2; + video_bpp = 2; + } else + video_bpp = 1; + } - self->cga.firstline = 1000; - self->cga.lastline = 0; - self->cga.cgablink++; - self->cga.oddeven ^= 1; - } - } else { - self->cga.sc++; - self->cga.sc &= 31; - self->cga.ma = self->cga.maback; - } + self->cga.firstline = 1000; + self->cga.lastline = 0; + self->cga.cgablink++; + self->cga.oddeven ^= 1; + } + } else { + self->cga.sc++; + self->cga.sc &= 31; + self->cga.ma = self->cga.maback; + } - if (self->cga.cgadispon) - self->cga.cgastat &= ~1; + if (self->cga.cgadispon) + self->cga.cgastat &= ~1; - if ((self->cga.sc == (self->cga.crtc[10] & 31) || ((self->cga.crtc[8] & 3) == 3 && self->cga.sc == ((self->cga.crtc[10] & 31) >> 1)))) - self->cga.con = 1; + if ((self->cga.sc == (self->cga.crtc[10] & 31) || ((self->cga.crtc[8] & 3) == 3 && self->cga.sc == ((self->cga.crtc[10] & 31) >> 1)))) + self->cga.con = 1; - if (self->cga.cgadispon && (self->cga.cgamode & 1)) { - for (x = 0; x < (self->cga.crtc[1] << 1); x++) - self->cga.charbuffer[x] = self->cga.vram[(((self->cga.ma << 1) + x) & 0x3fff)]; - } + if (self->cga.cgadispon && (self->cga.cgamode & 1)) { + for (x = 0; x < (self->cga.crtc[1] << 1); x++) + self->cga.charbuffer[x] = self->cga.vram[(((self->cga.ma << 1) + x) & 0x3fff)]; + } } } - void * compaq_cga_init(const device_t *info) { - int display_type; - int c; + int display_type; + int c; compaq_cga_t *self = malloc(sizeof(compaq_cga_t)); memset(self, 0, sizeof(compaq_cga_t)); - display_type = device_get_config_int("display_type"); - self->cga.composite = (display_type != CGA_RGB); - self->cga.revision = device_get_config_int("composite_type"); + display_type = device_get_config_int("display_type"); + self->cga.composite = (display_type != CGA_RGB); + self->cga.revision = device_get_config_int("composite_type"); self->cga.snow_enabled = device_get_config_int("snow_enabled"); self->cga.vram = malloc(0x4000); @@ -418,24 +415,26 @@ compaq_cga_init(const device_t *info) io_sethandler(0x03d0, 0x0010, cga_in, NULL, NULL, cga_out, NULL, NULL, self); if (info->local) { - for (c = 0; c < 256; c++) { - mdaattr[c][0][0] = mdaattr[c][1][0] = mdaattr[c][1][1] = 16; - if (c & 8) mdaattr[c][0][1] = 15 + 16; - else mdaattr[c][0][1] = 7 + 16; - } + for (c = 0; c < 256; c++) { + mdaattr[c][0][0] = mdaattr[c][1][0] = mdaattr[c][1][1] = 16; + if (c & 8) + mdaattr[c][0][1] = 15 + 16; + else + mdaattr[c][0][1] = 7 + 16; + } - mdaattr[0x70][0][1] = 16; - mdaattr[0x70][0][0] = mdaattr[0x70][1][0] = mdaattr[0x70][1][1] = 16 + 15; - mdaattr[0xF0][0][1] = 16; - mdaattr[0xF0][0][0] = mdaattr[0xF0][1][0] = mdaattr[0xF0][1][1] = 16 + 15; - mdaattr[0x78][0][1] = 16 + 7; - mdaattr[0x78][0][0] = mdaattr[0x78][1][0] = mdaattr[0x78][1][1] = 16 + 15; - mdaattr[0xF8][0][1] = 16 + 7; - mdaattr[0xF8][0][0] = mdaattr[0xF8][1][0] = mdaattr[0xF8][1][1] = 16 + 15; - mdaattr[0x00][0][1] = mdaattr[0x00][1][1] = 16; - mdaattr[0x08][0][1] = mdaattr[0x08][1][1] = 16; - mdaattr[0x80][0][1] = mdaattr[0x80][1][1] = 16; - mdaattr[0x88][0][1] = mdaattr[0x88][1][1] = 16; + mdaattr[0x70][0][1] = 16; + mdaattr[0x70][0][0] = mdaattr[0x70][1][0] = mdaattr[0x70][1][1] = 16 + 15; + mdaattr[0xF0][0][1] = 16; + mdaattr[0xF0][0][0] = mdaattr[0xF0][1][0] = mdaattr[0xF0][1][1] = 16 + 15; + mdaattr[0x78][0][1] = 16 + 7; + mdaattr[0x78][0][0] = mdaattr[0x78][1][0] = mdaattr[0x78][1][1] = 16 + 15; + mdaattr[0xF8][0][1] = 16 + 7; + mdaattr[0xF8][0][0] = mdaattr[0xF8][1][0] = mdaattr[0xF8][1][1] = 16 + 15; + mdaattr[0x00][0][1] = mdaattr[0x00][1][1] = 16; + mdaattr[0x08][0][1] = mdaattr[0x08][1][1] = 16; + mdaattr[0x80][0][1] = mdaattr[0x80][1][1] = 16; + mdaattr[0x88][0][1] = mdaattr[0x88][1][1] = 16; } vflags = info->local; @@ -443,7 +442,7 @@ compaq_cga_init(const device_t *info) overscan_x = overscan_y = 16; self->cga.rgb_type = device_get_config_int("rgb_type"); - cga_palette = (self->cga.rgb_type << 1); + cga_palette = (self->cga.rgb_type << 1); cgapal_rebuild(); self->cga.crtc[9] = 13; @@ -451,55 +450,52 @@ compaq_cga_init(const device_t *info) return self; } - void compaq_cga_close(void *p) { - compaq_cga_t *self = (compaq_cga_t *)p; + compaq_cga_t *self = (compaq_cga_t *) p; free(self->cga.vram); free(self); } - void compaq_cga_speed_changed(void *p) { - compaq_cga_t *self = (compaq_cga_t *)p; + compaq_cga_t *self = (compaq_cga_t *) p; - if (self->cga.crtc[9] == 13) /* Character height */ - compaq_cga_recalctimings(self); + if (self->cga.crtc[9] == 13) /* Character height */ + compaq_cga_recalctimings(self); else - cga_recalctimings(&self->cga); + cga_recalctimings(&self->cga); } - extern const device_config_t cga_config[]; const device_t compaq_cga_device = { - .name = "Compaq CGA", + .name = "Compaq CGA", .internal_name = "compaq_cga", - .flags = DEVICE_ISA, - .local = 0, - .init = compaq_cga_init, - .close = compaq_cga_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = compaq_cga_init, + .close = compaq_cga_close, + .reset = NULL, { .available = NULL }, .speed_changed = compaq_cga_speed_changed, - .force_redraw = NULL, - .config = cga_config + .force_redraw = NULL, + .config = cga_config }; const device_t compaq_cga_2_device = { - .name = "Compaq CGA 2", + .name = "Compaq CGA 2", .internal_name = "compaq_cga_2", - .flags = DEVICE_ISA, - .local = 1, - .init = compaq_cga_init, - .close = compaq_cga_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 1, + .init = compaq_cga_init, + .close = compaq_cga_close, + .reset = NULL, { .available = NULL }, .speed_changed = compaq_cga_speed_changed, - .force_redraw = NULL, - .config = cga_config + .force_redraw = NULL, + .config = cga_config }; diff --git a/src/video/vid_ddc.c b/src/video/vid_ddc.c index 6fc8276e4..b263448fc 100644 --- a/src/video/vid_ddc.c +++ b/src/video/vid_ddc.c @@ -24,30 +24,30 @@ #include <86box/86box.h> #include <86box/i2c.h> - -#define PIXEL_MM(px) ((uint16_t) (((px) * 25.4) / 96)) -#define STANDARD_TIMING(slot, width, aspect_ratio, refresh) do { \ - edid->slot.horiz_pixels = ((width) >> 3) - 31; \ - edid->slot.aspect_ratio_refresh_rate = ((aspect_ratio) << 6) | ((refresh) - 60); \ - } while (0) -#define DETAILED_TIMING(slot, clk, width, height, hblank, vblank, hfp, hsp, vfp, vsp) do { \ - edid->slot.pixel_clock_lsb = ((clk) / 10) & 0xff; \ - edid->slot.pixel_clock_msb = ((clk) / 10) >> 8; \ - edid->slot.h_active_lsb = (width) & 0xff; \ - edid->slot.h_blank_lsb = (hblank) & 0xff; \ - edid->slot.h_active_blank_msb = (((width) >> 4) & 0xf0) | (((hblank) >> 8) & 0x0f); \ - edid->slot.v_active_lsb = (height) & 0xff; \ - edid->slot.v_blank_lsb = (vblank) & 0xff; \ - edid->slot.v_active_blank_msb = (((height) >> 4) & 0xf0) | (((vblank) >> 8) & 0x0f); \ - edid->slot.h_front_porch_lsb = (hfp) & 0xff; \ - edid->slot.h_sync_pulse_lsb = (hsp) & 0xff; \ - edid->slot.v_front_porch_sync_pulse_lsb = (((vfp) & 0x0f) << 4) | ((vsp) & 0x0f); \ - edid->slot.hv_front_porch_sync_pulse_msb = (((hfp) >> 2) & 0xc0) | (((hsp) >> 4) & 0x30) | (((vfp) >> 2) & 0x0c) | (((vsp) >> 4) & 0x03); \ - edid->slot.h_size_lsb = horiz_mm & 0xff; \ - edid->slot.v_size_lsb = vert_mm & 0xff; \ - edid->slot.hv_size_msb = ((horiz_mm >> 4) & 0xf0) | ((vert_mm >> 8) & 0x0f); \ - } while (0) - +#define PIXEL_MM(px) ((uint16_t) (((px) *25.4) / 96)) +#define STANDARD_TIMING(slot, width, aspect_ratio, refresh) \ + do { \ + edid->slot.horiz_pixels = ((width) >> 3) - 31; \ + edid->slot.aspect_ratio_refresh_rate = ((aspect_ratio) << 6) | ((refresh) -60); \ + } while (0) +#define DETAILED_TIMING(slot, clk, width, height, hblank, vblank, hfp, hsp, vfp, vsp) \ + do { \ + edid->slot.pixel_clock_lsb = ((clk) / 10) & 0xff; \ + edid->slot.pixel_clock_msb = ((clk) / 10) >> 8; \ + edid->slot.h_active_lsb = (width) &0xff; \ + edid->slot.h_blank_lsb = (hblank) &0xff; \ + edid->slot.h_active_blank_msb = (((width) >> 4) & 0xf0) | (((hblank) >> 8) & 0x0f); \ + edid->slot.v_active_lsb = (height) &0xff; \ + edid->slot.v_blank_lsb = (vblank) &0xff; \ + edid->slot.v_active_blank_msb = (((height) >> 4) & 0xf0) | (((vblank) >> 8) & 0x0f); \ + edid->slot.h_front_porch_lsb = (hfp) &0xff; \ + edid->slot.h_sync_pulse_lsb = (hsp) &0xff; \ + edid->slot.v_front_porch_sync_pulse_lsb = (((vfp) &0x0f) << 4) | ((vsp) &0x0f); \ + edid->slot.hv_front_porch_sync_pulse_msb = (((hfp) >> 2) & 0xc0) | (((hsp) >> 4) & 0x30) | (((vfp) >> 2) & 0x0c) | (((vsp) >> 4) & 0x03); \ + edid->slot.h_size_lsb = horiz_mm & 0xff; \ + edid->slot.v_size_lsb = vert_mm & 0xff; \ + edid->slot.hv_size_msb = ((horiz_mm >> 4) & 0xf0) | ((vert_mm >> 8) & 0x0f); \ + } while (0) enum { STD_ASPECT_16_10 = 0x0, @@ -57,76 +57,75 @@ enum { }; typedef struct { - uint8_t horiz_pixels, aspect_ratio_refresh_rate; + uint8_t horiz_pixels, aspect_ratio_refresh_rate; } edid_standard_timing_t; typedef struct { - uint8_t pixel_clock_lsb, pixel_clock_msb, h_active_lsb, h_blank_lsb, - h_active_blank_msb, v_active_lsb, v_blank_lsb, v_active_blank_msb, - h_front_porch_lsb, h_sync_pulse_lsb, v_front_porch_sync_pulse_lsb, - hv_front_porch_sync_pulse_msb, h_size_lsb, v_size_lsb, hv_size_msb, - h_border, v_border, features; + uint8_t pixel_clock_lsb, pixel_clock_msb, h_active_lsb, h_blank_lsb, + h_active_blank_msb, v_active_lsb, v_blank_lsb, v_active_blank_msb, + h_front_porch_lsb, h_sync_pulse_lsb, v_front_porch_sync_pulse_lsb, + hv_front_porch_sync_pulse_msb, h_size_lsb, v_size_lsb, hv_size_msb, + h_border, v_border, features; } edid_detailed_timing_t; typedef struct { - uint8_t magic[2], reserved, tag, range_limit_offsets; + uint8_t magic[2], reserved, tag, range_limit_offsets; union { - char ascii[13]; - struct { - uint8_t min_v_field, max_v_field, min_h_line, max_h_line, max_pixel_clock, - timing_type; - union { - uint8_t padding[7]; - struct { - uint8_t reserved, gtf_start_freq, gtf_c, gtf_m_lsb, gtf_m_msb, - gtf_k, gtf_j; - }; - struct { - uint8_t cvt_version, add_clock_precision, max_active_pixels, - aspect_ratios, aspect_ratio_pref, scaling_support, - refresh_pref; - }; - }; - } range_limits; - struct { - edid_standard_timing_t timings[6]; - uint8_t padding; - } ext_standard_timings; - struct { - uint8_t version; - struct { - uint8_t lines_lsb, lines_msb_aspect_ratio, refresh_rate; - } timings[4]; - } cvt_timings; - struct { - uint8_t version, timings[6], reserved[6]; - } established_timings3; + char ascii[13]; + struct { + uint8_t min_v_field, max_v_field, min_h_line, max_h_line, max_pixel_clock, + timing_type; + union { + uint8_t padding[7]; + struct { + uint8_t reserved, gtf_start_freq, gtf_c, gtf_m_lsb, gtf_m_msb, + gtf_k, gtf_j; + }; + struct { + uint8_t cvt_version, add_clock_precision, max_active_pixels, + aspect_ratios, aspect_ratio_pref, scaling_support, + refresh_pref; + }; + }; + } range_limits; + struct { + edid_standard_timing_t timings[6]; + uint8_t padding; + } ext_standard_timings; + struct { + uint8_t version; + struct { + uint8_t lines_lsb, lines_msb_aspect_ratio, refresh_rate; + } timings[4]; + } cvt_timings; + struct { + uint8_t version, timings[6], reserved[6]; + } established_timings3; }; } edid_descriptor_t; typedef struct { - uint8_t magic[8], mfg[2], mfg_product[2], serial[4], mfg_week, mfg_year, - edid_version, edid_rev; - uint8_t input_params, horiz_size, vert_size, gamma, features; - uint8_t red_green_lsb, blue_white_lsb, red_x_msb, red_y_msb, green_x_msb, - green_y_msb, blue_x_msb, blue_y_msb, white_x_msb, white_y_msb; - uint8_t established_timings[3]; + uint8_t magic[8], mfg[2], mfg_product[2], serial[4], mfg_week, mfg_year, + edid_version, edid_rev; + uint8_t input_params, horiz_size, vert_size, gamma, features; + uint8_t red_green_lsb, blue_white_lsb, red_x_msb, red_y_msb, green_x_msb, + green_y_msb, blue_x_msb, blue_y_msb, white_x_msb, white_y_msb; + uint8_t established_timings[3]; edid_standard_timing_t standard_timings[8]; union { - edid_detailed_timing_t detailed_timings[4]; - edid_descriptor_t descriptors[4]; + edid_detailed_timing_t detailed_timings[4]; + edid_descriptor_t descriptors[4]; }; - uint8_t extensions, checksum; + uint8_t extensions, checksum; - uint8_t ext_tag, ext_rev, ext_dtd_offset, ext_native_dtds; + uint8_t ext_tag, ext_rev, ext_dtd_offset, ext_native_dtds; union { - edid_detailed_timing_t ext_detailed_timings[6]; - edid_descriptor_t ext_descriptors[6]; + edid_detailed_timing_t ext_detailed_timings[6]; + edid_descriptor_t ext_descriptors[6]; }; - uint8_t padding[15], checksum2; + uint8_t padding[15], checksum2; } edid_t; - void * ddc_init(void *i2c) { @@ -138,60 +137,60 @@ ddc_init(void *i2c) memset(&edid->magic[1], 0xff, sizeof(edid->magic) - 2); - edid->mfg[0] = 0x09; /* manufacturer "BOX" (apparently unassigned by UEFI) */ - edid->mfg[1] = 0xf8; - edid->mfg_week = 48; - edid->mfg_year = 2020 - 1990; + edid->mfg[0] = 0x09; /* manufacturer "BOX" (apparently unassigned by UEFI) */ + edid->mfg[1] = 0xf8; + edid->mfg_week = 48; + edid->mfg_year = 2020 - 1990; edid->edid_version = 0x01; - edid->edid_rev = 0x03; /* EDID 1.3 */ + edid->edid_rev = 0x03; /* EDID 1.3 */ edid->input_params = 0x0e; /* analog input; separate sync; composite sync; sync on green */ - edid->horiz_size = horiz_mm / 10; - edid->vert_size = vert_mm / 10; - edid->features = 0xeb; /* DPMS standby/suspend/active-off; RGB color; first timing is preferred; GTF/CVT */ + edid->horiz_size = horiz_mm / 10; + edid->vert_size = vert_mm / 10; + edid->features = 0xeb; /* DPMS standby/suspend/active-off; RGB color; first timing is preferred; GTF/CVT */ - edid->red_green_lsb = 0x81; + edid->red_green_lsb = 0x81; edid->blue_white_lsb = 0xf1; - edid->red_x_msb = 0xa3; - edid->red_y_msb = 0x57; - edid->green_x_msb = 0x53; - edid->green_y_msb = 0x9f; - edid->blue_x_msb = 0x27; - edid->blue_y_msb = 0x0a; - edid->white_x_msb = 0x50; - edid->white_y_msb = 0x00; + edid->red_x_msb = 0xa3; + edid->red_y_msb = 0x57; + edid->green_x_msb = 0x53; + edid->green_y_msb = 0x9f; + edid->blue_x_msb = 0x27; + edid->blue_y_msb = 0x0a; + edid->white_x_msb = 0x50; + edid->white_y_msb = 0x00; memset(&edid->established_timings, 0xff, sizeof(edid->established_timings)); /* all enabled */ /* 60 Hz timings */ - STANDARD_TIMING(standard_timings[0], 1280, STD_ASPECT_16_9, 60); /* 1280x720 */ + STANDARD_TIMING(standard_timings[0], 1280, STD_ASPECT_16_9, 60); /* 1280x720 */ STANDARD_TIMING(standard_timings[1], 1280, STD_ASPECT_16_10, 60); /* 1280x800 */ - STANDARD_TIMING(standard_timings[2], 1366, STD_ASPECT_16_9, 60); /* 1360x768 (closest to 1366x768) */ + STANDARD_TIMING(standard_timings[2], 1366, STD_ASPECT_16_9, 60); /* 1360x768 (closest to 1366x768) */ STANDARD_TIMING(standard_timings[3], 1440, STD_ASPECT_16_10, 60); /* 1440x900 */ - STANDARD_TIMING(standard_timings[4], 1600, STD_ASPECT_16_9, 60); /* 1600x900 */ + STANDARD_TIMING(standard_timings[4], 1600, STD_ASPECT_16_9, 60); /* 1600x900 */ STANDARD_TIMING(standard_timings[5], 1680, STD_ASPECT_16_10, 60); /* 1680x1050 */ - STANDARD_TIMING(standard_timings[6], 1920, STD_ASPECT_16_9, 60); /* 1920x1080 */ - STANDARD_TIMING(standard_timings[7], 2048, STD_ASPECT_4_3, 60); /* 2048x1536 */ + STANDARD_TIMING(standard_timings[6], 1920, STD_ASPECT_16_9, 60); /* 1920x1080 */ + STANDARD_TIMING(standard_timings[7], 2048, STD_ASPECT_4_3, 60); /* 2048x1536 */ /* Detailed timing for the preferred mode of 800x600 @ 60 Hz */ DETAILED_TIMING(detailed_timings[0], 40000, 800, 600, 256, 28, 40, 128, 1, 4); - edid->descriptors[1].tag = 0xf7; /* established timings 3 */ + edid->descriptors[1].tag = 0xf7; /* established timings 3 */ edid->descriptors[1].established_timings3.version = 0x0a; memset(&edid->descriptors[1].established_timings3.timings, 0xff, sizeof(edid->descriptors[1].established_timings3.timings)); /* all enabled */ - edid->descriptors[1].established_timings3.timings[5] &= 0xf0; /* reserved bits */ + edid->descriptors[1].established_timings3.timings[5] &= 0xf0; /* reserved bits */ - edid->descriptors[2].tag = 0xfd; /* range limits */ - edid->descriptors[2].range_limits.min_v_field = 45; - edid->descriptors[2].range_limits.max_v_field = 125; - edid->descriptors[2].range_limits.min_h_line = 30; /* 640x480 = ~31.5 KHz */ - edid->descriptors[2].range_limits.max_h_line = 115; /* 1920x1440 = 112.5 KHz */ - edid->descriptors[2].range_limits.max_pixel_clock = 30; /* 1920x1440 = 297 MHz */ - edid->descriptors[2].range_limits.timing_type = 0x00; /* default GTF */ - edid->descriptors[2].range_limits.padding[0] = 0x0a; + edid->descriptors[2].tag = 0xfd; /* range limits */ + edid->descriptors[2].range_limits.min_v_field = 45; + edid->descriptors[2].range_limits.max_v_field = 125; + edid->descriptors[2].range_limits.min_h_line = 30; /* 640x480 = ~31.5 KHz */ + edid->descriptors[2].range_limits.max_h_line = 115; /* 1920x1440 = 112.5 KHz */ + edid->descriptors[2].range_limits.max_pixel_clock = 30; /* 1920x1440 = 297 MHz */ + edid->descriptors[2].range_limits.timing_type = 0x00; /* default GTF */ + edid->descriptors[2].range_limits.padding[0] = 0x0a; memset(&edid->descriptors[2].range_limits.padding[1], 0x20, sizeof(edid->descriptors[2].range_limits.padding) - 1); - edid->descriptors[3].tag = 0xfc; /* display name */ + edid->descriptors[3].tag = 0xfc; /* display name */ memcpy(&edid->descriptors[3].ascii, "86Box Monitor", 13); /* exactly 13 characters (would otherwise require LF termination and space padding) */ edid->extensions = 1; @@ -199,10 +198,10 @@ ddc_init(void *i2c) edid->checksum += edid_bytes[c]; edid->checksum = 256 - edid->checksum; - edid->ext_tag = 0x02; - edid->ext_rev = 0x03; + edid->ext_tag = 0x02; + edid->ext_rev = 0x03; edid->ext_native_dtds = 0x80; /* underscans IT; no native extended modes */ - edid->ext_dtd_offset = 0x04; + edid->ext_dtd_offset = 0x04; /* Detailed timing for 1366x768 */ DETAILED_TIMING(ext_detailed_timings[0], 85500, 1366, 768, 426, 30, 70, 143, 3, 3); @@ -210,12 +209,12 @@ ddc_init(void *i2c) /* High refresh rate timings (VGA is limited to 85 Hz) */ edid->ext_descriptors[1].tag = 0xfa; /* standard timing identifiers */ #define ext_standard_timings0 ext_descriptors[1].ext_standard_timings.timings - STANDARD_TIMING(ext_standard_timings0[0], 640, STD_ASPECT_4_3, 90); /* 640x480 @ 90 Hz */ - STANDARD_TIMING(ext_standard_timings0[1], 640, STD_ASPECT_4_3, 120); /* 640x480 @ 120 Hz */ - STANDARD_TIMING(ext_standard_timings0[2], 800, STD_ASPECT_4_3, 90); /* 800x600 @ 90 Hz */ - STANDARD_TIMING(ext_standard_timings0[3], 800, STD_ASPECT_4_3, 120); /* 800x600 @ 120 Hz */ - STANDARD_TIMING(ext_standard_timings0[4], 1024, STD_ASPECT_4_3, 90); /* 1024x768 @ 90 Hz */ - STANDARD_TIMING(ext_standard_timings0[5], 1280, STD_ASPECT_5_4, 90); /* 1280x1024 @ 90 Hz */ + STANDARD_TIMING(ext_standard_timings0[0], 640, STD_ASPECT_4_3, 90); /* 640x480 @ 90 Hz */ + STANDARD_TIMING(ext_standard_timings0[1], 640, STD_ASPECT_4_3, 120); /* 640x480 @ 120 Hz */ + STANDARD_TIMING(ext_standard_timings0[2], 800, STD_ASPECT_4_3, 90); /* 800x600 @ 90 Hz */ + STANDARD_TIMING(ext_standard_timings0[3], 800, STD_ASPECT_4_3, 120); /* 800x600 @ 120 Hz */ + STANDARD_TIMING(ext_standard_timings0[4], 1024, STD_ASPECT_4_3, 90); /* 1024x768 @ 90 Hz */ + STANDARD_TIMING(ext_standard_timings0[5], 1280, STD_ASPECT_5_4, 90); /* 1280x1024 @ 90 Hz */ edid->ext_descriptors[1].ext_standard_timings.padding = 0x0a; for (uint8_t c = 128; c < 255; c++) @@ -225,7 +224,6 @@ ddc_init(void *i2c) return i2c_eeprom_init(i2c, 0x50, edid_bytes, sizeof(edid_t), 0); } - void ddc_close(void *eeprom) { diff --git a/src/video/vid_ega.c b/src/video/vid_ega.c index a8f23b7b8..ba18a0ba8 100644 --- a/src/video/vid_ega.c +++ b/src/video/vid_ega.c @@ -34,17 +34,14 @@ #include <86box/vid_ati_eeprom.h> #include <86box/vid_ega.h> - void ega_doblit(int wx, int wy, ega_t *ega); - -#define BIOS_IBM_PATH "roms/video/ega/ibm_6277356_ega_card_u44_27128.bin" -#define BIOS_CPQ_PATH "roms/video/ega/108281-001.bin" -#define BIOS_SEGA_PATH "roms/video/ega/lega.vbi" -#define BIOS_ATIEGA_PATH "roms/video/ega/ATI EGA Wonder 800+ N1.00.BIN" -#define BIOS_ISKRA_PATH "roms/video/ega/143-02.bin", "roms/video/ega/143-03.bin" -#define BIOS_TSENG_PATH "roms/video/ega/EGA ET2000.BIN" - +#define BIOS_IBM_PATH "roms/video/ega/ibm_6277356_ega_card_u44_27128.bin" +#define BIOS_CPQ_PATH "roms/video/ega/108281-001.bin" +#define BIOS_SEGA_PATH "roms/video/ega/lega.vbi" +#define BIOS_ATIEGA_PATH "roms/video/ega/ATI EGA Wonder 800+ N1.00.BIN" +#define BIOS_ISKRA_PATH "roms/video/ega/143-02.bin", "roms/video/ega/143-03.bin" +#define BIOS_TSENG_PATH "roms/video/ega/EGA ET2000.BIN" enum { EGA_IBM = 0, @@ -55,44 +52,42 @@ enum { EGA_TSENG }; +static video_timings_t timing_ega = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; +static uint8_t ega_rotate[8][256]; +static uint32_t pallook16[256], pallook64[256]; +static int ega_type = 0, old_overscan_color = 0; -static video_timings_t timing_ega = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; -static uint8_t ega_rotate[8][256]; -static uint32_t pallook16[256], pallook64[256]; -static int ega_type = 0, old_overscan_color = 0; - -extern uint8_t edatlookup[4][4]; +extern uint8_t edatlookup[4][4]; /* 3C2 controls default mode on EGA. On VGA, it determines monitor type (mono or colour): 7=CGA mode (200 lines), 9=EGA mode (350 lines), 8=EGA mode (200 lines). */ -int egaswitchread, egaswitches=9; -int update_overscan = 0; - - -uint8_t ega_in(uint16_t addr, void *p); +int egaswitchread, egaswitches = 9; +int update_overscan = 0; +uint8_t ega_in(uint16_t addr, void *p); void ega_out(uint16_t addr, uint8_t val, void *p) { - ega_t *ega = (ega_t *)p; - int c; + ega_t *ega = (ega_t *) p; + int c; uint8_t o, old; if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(ega->miscout & 1)) - addr ^= 0x60; + addr ^= 0x60; switch (addr) { - case 0x1ce: - ega->index = val; - break; - case 0x1cf: - ega->regs[ega->index] = val; - switch (ega->index) { - case 0xb0: - ega_recalctimings(ega); - break; - case 0xb2: case 0xbe: + case 0x1ce: + ega->index = val; + break; + case 0x1cf: + ega->regs[ega->index] = val; + switch (ega->index) { + case 0xb0: + ega_recalctimings(ega); + break; + case 0xb2: + case 0xbe: #if 0 if (ega->regs[0xbe] & 8) { /*Read/write bank mode*/ svga->read_bank = ((ega->regs[0xb2] >> 5) & 7) * 0x10000; @@ -100,232 +95,236 @@ ega_out(uint16_t addr, uint8_t val, void *p) } else /*Single bank mode*/ svga->read_bank = svga->write_bank = ((ega->regs[0xb2] >> 1) & 7) * 0x10000; #endif - break; - case 0xb3: - ati_eeprom_write((ati_eeprom_t *) ega->eeprom, val & 8, val & 2, val & 1); - break; - } - break; + break; + case 0xb3: + ati_eeprom_write((ati_eeprom_t *) ega->eeprom, val & 8, val & 2, val & 1); + break; + } + break; - case 0x3c0: case 0x3c1: - if (!ega->attrff) { - ega->attraddr = val & 31; - if ((val & 0x20) != ega->attr_palette_enable) { - ega->fullchange = 3; - ega->attr_palette_enable = val & 0x20; - ega_recalctimings(ega); - } - } else { - o = ega->attrregs[ega->attraddr & 31]; - ega->attrregs[ega->attraddr & 31] = val; - if (ega->attraddr < 16) - ega->fullchange = changeframecount; - if (ega->attraddr == 0x10 || ega->attraddr == 0x14 || ega->attraddr < 0x10) { - for (c = 0; c < 16; c++) { - if (ega->attrregs[0x10] & 0x80) ega->egapal[c] = (ega->attrregs[c] & 0xf) | ((ega->attrregs[0x14] & 0xf) << 4); - else ega->egapal[c] = (ega->attrregs[c] & 0x3f) | ((ega->attrregs[0x14] & 0xc) << 4); - } - ega->fullchange = changeframecount; - } - /* Recalculate timings on change of attribute register 0x11 - (overscan border color) too. */ - if (ega->attraddr == 0x10) { - if (o != val) - ega_recalctimings(ega); - } else if (ega->attraddr == 0x11) { - ega->overscan_color = ega->vres ? pallook16[val & 0x0f] : pallook64[val & 0x3f]; - if (o != val) - ega_recalctimings(ega); - } else if (ega->attraddr == 0x12) - ega->plane_mask = val & 0xf; - } - ega->attrff ^= 1; - break; - case 0x3c2: - o = ega->miscout; - egaswitchread = (val & 0xc) >> 2; - ega->vres = !(val & 0x80); - ega->pallook = ega->vres ? pallook16 : pallook64; - ega->vidclock = val & 4; - ega->miscout = val; - ega->overscan_color = ega->vres ? pallook16[ega->attrregs[0x11] & 0x0f] : pallook64[ega->attrregs[0x11] & 0x3f]; - io_removehandler(0x03a0, 0x0020, ega_in, NULL, NULL, ega_out, NULL, NULL, ega); - if (!(val & 1)) - io_sethandler(0x03a0, 0x0020, ega_in, NULL, NULL, ega_out, NULL, NULL, ega); - if ((o ^ val) & 0x80) - ega_recalctimings(ega); - break; - case 0x3c4: - ega->seqaddr = val; - break; - case 0x3c5: - o = ega->seqregs[ega->seqaddr & 0xf]; - ega->seqregs[ega->seqaddr & 0xf] = val; - if (o != val && (ega->seqaddr & 0xf) == 1) - ega_recalctimings(ega); - switch (ega->seqaddr & 0xf) { - case 1: - if (ega->scrblank && !(val & 0x20)) - ega->fullchange = 3; - ega->scrblank = (ega->scrblank & ~0x20) | (val & 0x20); - break; - case 2: - ega->writemask = val & 0xf; - break; - case 3: - ega->charsetb = (((val >> 2) & 3) * 0x10000) + 2; - ega->charseta = ((val & 3) * 0x10000) + 2; - break; - case 4: - ega->chain2_write = !(val & 4); - break; - } - break; - case 0x3ce: - ega->gdcaddr = val; - break; - case 0x3cf: - ega->gdcreg[ega->gdcaddr & 15] = val; - switch (ega->gdcaddr & 15) { - case 2: - ega->colourcompare = val; - break; - case 4: - ega->readplane = val & 3; - break; - case 5: - ega->writemode = val & 3; - ega->readmode = val & 8; - ega->chain2_read = val & 0x10; - break; - case 6: - switch (val & 0xc) { - case 0x0: /*128k at A0000*/ - mem_mapping_set_addr(&ega->mapping, 0xa0000, 0x20000); - break; - case 0x4: /*64k at A0000*/ - mem_mapping_set_addr(&ega->mapping, 0xa0000, 0x10000); - break; - case 0x8: /*32k at B0000*/ - mem_mapping_set_addr(&ega->mapping, 0xb0000, 0x08000); - break; - case 0xC: /*32k at B8000*/ - mem_mapping_set_addr(&ega->mapping, 0xb8000, 0x08000); - break; - } - break; - case 7: - ega->colournocare = val; - break; - } - break; - case 0x3d0: case 0x3d4: - ega->crtcreg = val & 31; - return; - case 0x3d1: case 0x3d5: - if ((ega->crtcreg < 7) && (ega->crtc[0x11] & 0x80)) - return; - if ((ega->crtcreg == 7) && (ega->crtc[0x11] & 0x80)) - val = (ega->crtc[7] & ~0x10) | (val & 0x10); - old = ega->crtc[ega->crtcreg]; - ega->crtc[ega->crtcreg] = val; - if (old != val) { - if (ega->crtcreg < 0xe || ega->crtcreg > 0x10) { - if ((ega->crtcreg == 0xc) || (ega->crtcreg == 0xd)) { - ega->fullchange = 3; - ega->ma_latch = ((ega->crtc[0xc] << 8) | ega->crtc[0xd]) + ((ega->crtc[8] & 0x60) >> 5); - } else { + case 0x3c0: + case 0x3c1: + if (!ega->attrff) { + ega->attraddr = val & 31; + if ((val & 0x20) != ega->attr_palette_enable) { + ega->fullchange = 3; + ega->attr_palette_enable = val & 0x20; + ega_recalctimings(ega); + } + } else { + o = ega->attrregs[ega->attraddr & 31]; + ega->attrregs[ega->attraddr & 31] = val; + if (ega->attraddr < 16) ega->fullchange = changeframecount; - ega_recalctimings(ega); - } - } - } - break; + if (ega->attraddr == 0x10 || ega->attraddr == 0x14 || ega->attraddr < 0x10) { + for (c = 0; c < 16; c++) { + if (ega->attrregs[0x10] & 0x80) + ega->egapal[c] = (ega->attrregs[c] & 0xf) | ((ega->attrregs[0x14] & 0xf) << 4); + else + ega->egapal[c] = (ega->attrregs[c] & 0x3f) | ((ega->attrregs[0x14] & 0xc) << 4); + } + ega->fullchange = changeframecount; + } + /* Recalculate timings on change of attribute register 0x11 + (overscan border color) too. */ + if (ega->attraddr == 0x10) { + if (o != val) + ega_recalctimings(ega); + } else if (ega->attraddr == 0x11) { + ega->overscan_color = ega->vres ? pallook16[val & 0x0f] : pallook64[val & 0x3f]; + if (o != val) + ega_recalctimings(ega); + } else if (ega->attraddr == 0x12) + ega->plane_mask = val & 0xf; + } + ega->attrff ^= 1; + break; + case 0x3c2: + o = ega->miscout; + egaswitchread = (val & 0xc) >> 2; + ega->vres = !(val & 0x80); + ega->pallook = ega->vres ? pallook16 : pallook64; + ega->vidclock = val & 4; + ega->miscout = val; + ega->overscan_color = ega->vres ? pallook16[ega->attrregs[0x11] & 0x0f] : pallook64[ega->attrregs[0x11] & 0x3f]; + io_removehandler(0x03a0, 0x0020, ega_in, NULL, NULL, ega_out, NULL, NULL, ega); + if (!(val & 1)) + io_sethandler(0x03a0, 0x0020, ega_in, NULL, NULL, ega_out, NULL, NULL, ega); + if ((o ^ val) & 0x80) + ega_recalctimings(ega); + break; + case 0x3c4: + ega->seqaddr = val; + break; + case 0x3c5: + o = ega->seqregs[ega->seqaddr & 0xf]; + ega->seqregs[ega->seqaddr & 0xf] = val; + if (o != val && (ega->seqaddr & 0xf) == 1) + ega_recalctimings(ega); + switch (ega->seqaddr & 0xf) { + case 1: + if (ega->scrblank && !(val & 0x20)) + ega->fullchange = 3; + ega->scrblank = (ega->scrblank & ~0x20) | (val & 0x20); + break; + case 2: + ega->writemask = val & 0xf; + break; + case 3: + ega->charsetb = (((val >> 2) & 3) * 0x10000) + 2; + ega->charseta = ((val & 3) * 0x10000) + 2; + break; + case 4: + ega->chain2_write = !(val & 4); + break; + } + break; + case 0x3ce: + ega->gdcaddr = val; + break; + case 0x3cf: + ega->gdcreg[ega->gdcaddr & 15] = val; + switch (ega->gdcaddr & 15) { + case 2: + ega->colourcompare = val; + break; + case 4: + ega->readplane = val & 3; + break; + case 5: + ega->writemode = val & 3; + ega->readmode = val & 8; + ega->chain2_read = val & 0x10; + break; + case 6: + switch (val & 0xc) { + case 0x0: /*128k at A0000*/ + mem_mapping_set_addr(&ega->mapping, 0xa0000, 0x20000); + break; + case 0x4: /*64k at A0000*/ + mem_mapping_set_addr(&ega->mapping, 0xa0000, 0x10000); + break; + case 0x8: /*32k at B0000*/ + mem_mapping_set_addr(&ega->mapping, 0xb0000, 0x08000); + break; + case 0xC: /*32k at B8000*/ + mem_mapping_set_addr(&ega->mapping, 0xb8000, 0x08000); + break; + } + break; + case 7: + ega->colournocare = val; + break; + } + break; + case 0x3d0: + case 0x3d4: + ega->crtcreg = val & 31; + return; + case 0x3d1: + case 0x3d5: + if ((ega->crtcreg < 7) && (ega->crtc[0x11] & 0x80)) + return; + if ((ega->crtcreg == 7) && (ega->crtc[0x11] & 0x80)) + val = (ega->crtc[7] & ~0x10) | (val & 0x10); + old = ega->crtc[ega->crtcreg]; + ega->crtc[ega->crtcreg] = val; + if (old != val) { + if (ega->crtcreg < 0xe || ega->crtcreg > 0x10) { + if ((ega->crtcreg == 0xc) || (ega->crtcreg == 0xd)) { + ega->fullchange = 3; + ega->ma_latch = ((ega->crtc[0xc] << 8) | ega->crtc[0xd]) + ((ega->crtc[8] & 0x60) >> 5); + } else { + ega->fullchange = changeframecount; + ega_recalctimings(ega); + } + } + } + break; } } - uint8_t ega_in(uint16_t addr, void *p) { - ega_t *ega = (ega_t *)p; + ega_t *ega = (ega_t *) p; uint8_t ret = 0xff; if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(ega->miscout & 1)) - addr ^= 0x60; + addr ^= 0x60; switch (addr) { - case 0x1ce: - ret = ega->index; - break; - case 0x1cf: - switch (ega->index) { - case 0xb7: - ret = ega->regs[ega->index] & ~8; - if (ati_eeprom_read((ati_eeprom_t *) ega->eeprom)) - ret |= 8; - break; - default: - ret = ega->regs[ega->index]; - break; - } - break; + case 0x1ce: + ret = ega->index; + break; + case 0x1cf: + switch (ega->index) { + case 0xb7: + ret = ega->regs[ega->index] & ~8; + if (ati_eeprom_read((ati_eeprom_t *) ega->eeprom)) + ret |= 8; + break; + default: + ret = ega->regs[ega->index]; + break; + } + break; - case 0x3c0: - if (ega_type) - ret = ega->attraddr | ega->attr_palette_enable; - break; - case 0x3c1: - if (ega_type) - ret = ega->attrregs[ega->attraddr]; - break; - case 0x3c2: - ret = (egaswitches & (8 >> egaswitchread)) ? 0x10 : 0x00; - break; - case 0x3c4: - if (ega_type) - ret = ega->seqaddr; - break; - case 0x3c5: - if (ega_type) - ret = ega->seqregs[ega->seqaddr & 0xf]; - break; - case 0x3c8: - if (ega_type) - ret = 2; - break; - case 0x3cc: - if (ega_type) - ret = ega->miscout; - break; - case 0x3ce: - if (ega_type) - ret = ega->gdcaddr; - break; - case 0x3cf: - if (ega_type) - ret = ega->gdcreg[ega->gdcaddr & 0xf]; - break; - case 0x3d0: case 0x3d4: - if (ega_type) - ret = ega->crtcreg; - break; - case 0x3d1: - case 0x3d5: - if (ega_type) - ret = ega->crtc[ega->crtcreg]; - break; - case 0x3da: - ega->attrff = 0; - ega->stat ^= 0x30; /*Fools IBM EGA video BIOS self-test*/ - ret = ega->stat; - break; + case 0x3c0: + if (ega_type) + ret = ega->attraddr | ega->attr_palette_enable; + break; + case 0x3c1: + if (ega_type) + ret = ega->attrregs[ega->attraddr]; + break; + case 0x3c2: + ret = (egaswitches & (8 >> egaswitchread)) ? 0x10 : 0x00; + break; + case 0x3c4: + if (ega_type) + ret = ega->seqaddr; + break; + case 0x3c5: + if (ega_type) + ret = ega->seqregs[ega->seqaddr & 0xf]; + break; + case 0x3c8: + if (ega_type) + ret = 2; + break; + case 0x3cc: + if (ega_type) + ret = ega->miscout; + break; + case 0x3ce: + if (ega_type) + ret = ega->gdcaddr; + break; + case 0x3cf: + if (ega_type) + ret = ega->gdcreg[ega->gdcaddr & 0xf]; + break; + case 0x3d0: + case 0x3d4: + if (ega_type) + ret = ega->crtcreg; + break; + case 0x3d1: + case 0x3d5: + if (ega_type) + ret = ega->crtc[ega->crtcreg]; + break; + case 0x3da: + ega->attrff = 0; + ega->stat ^= 0x30; /*Fools IBM EGA video BIOS self-test*/ + ret = ega->stat; + break; } return ret; } - void ega_recalctimings(ega_t *ega) { @@ -334,25 +333,33 @@ ega_recalctimings(ega_t *ega) double _dispontime, _dispofftime, disptime; double crtcconst; - ega->vtotal = ega->crtc[6]; - ega->dispend = ega->crtc[0x12]; + ega->vtotal = ega->crtc[6]; + ega->dispend = ega->crtc[0x12]; ega->vsyncstart = ega->crtc[0x10]; - ega->split = ega->crtc[0x18]; + ega->split = ega->crtc[0x18]; - if (ega->crtc[7] & 1) ega->vtotal |= 0x100; - if (ega->crtc[7] & 32) ega->vtotal |= 0x200; + if (ega->crtc[7] & 1) + ega->vtotal |= 0x100; + if (ega->crtc[7] & 32) + ega->vtotal |= 0x200; ega->vtotal += 2; - if (ega->crtc[7] & 2) ega->dispend |= 0x100; - if (ega->crtc[7] & 64) ega->dispend |= 0x200; + if (ega->crtc[7] & 2) + ega->dispend |= 0x100; + if (ega->crtc[7] & 64) + ega->dispend |= 0x200; ega->dispend++; - if (ega->crtc[7] & 4) ega->vsyncstart |= 0x100; - if (ega->crtc[7] & 128) ega->vsyncstart |= 0x200; + if (ega->crtc[7] & 4) + ega->vsyncstart |= 0x100; + if (ega->crtc[7] & 128) + ega->vsyncstart |= 0x200; ega->vsyncstart++; - if (ega->crtc[7] & 0x10) ega->split |= 0x100; - if (ega->crtc[9] & 0x40) ega->split |= 0x200; + if (ega->crtc[7] & 0x10) + ega->split |= 0x100; + if (ega->crtc[9] & 0x40) + ega->split |= 0x200; ega->split++; ega->hdisp = ega->crtc[1]; @@ -360,37 +367,39 @@ ega_recalctimings(ega_t *ega) ega->rowoffset = ega->crtc[0x13]; - ega->linedbl = ega->crtc[9] & 0x80; + ega->linedbl = ega->crtc[9] & 0x80; ega->rowcount = ega->crtc[9] & 0x1f; if (ega->eeprom) { - clksel = ((ega->miscout & 0xc) >> 2) | ((ega->regs[0xbe] & 0x10) ? 4 : 0); + clksel = ((ega->miscout & 0xc) >> 2) | ((ega->regs[0xbe] & 0x10) ? 4 : 0); - switch (clksel) { - case 0: - crtcconst = (cpuclock / 25175000.0 * (double)(1ull << 32)); - break; - case 1: - crtcconst = (cpuclock / 28322000.0 * (double)(1ull << 32)); - break; - case 4: - crtcconst = (cpuclock / 14318181.0 * (double)(1ull << 32)); - break; - case 5: - crtcconst = (cpuclock / 16257000.0 * (double)(1ull << 32)); - break; - case 7: - default: - crtcconst = (cpuclock / 36000000.0 * (double)(1ull << 32)); - break; - } - if (!(ega->seqregs[1] & 1)) - crtcconst *= 9.0; - else - crtcconst *= 8.0; + switch (clksel) { + case 0: + crtcconst = (cpuclock / 25175000.0 * (double) (1ull << 32)); + break; + case 1: + crtcconst = (cpuclock / 28322000.0 * (double) (1ull << 32)); + break; + case 4: + crtcconst = (cpuclock / 14318181.0 * (double) (1ull << 32)); + break; + case 5: + crtcconst = (cpuclock / 16257000.0 * (double) (1ull << 32)); + break; + case 7: + default: + crtcconst = (cpuclock / 36000000.0 * (double) (1ull << 32)); + break; + } + if (!(ega->seqregs[1] & 1)) + crtcconst *= 9.0; + else + crtcconst *= 8.0; } else { - if (ega->vidclock) crtcconst = (ega->seqregs[1] & 1) ? MDACONST : (MDACONST * (9.0 / 8.0)); - else crtcconst = (ega->seqregs[1] & 1) ? CGACONST : (CGACONST * (9.0 / 8.0)); + if (ega->vidclock) + crtcconst = (ega->seqregs[1] & 1) ? MDACONST : (MDACONST * (9.0 / 8.0)); + else + crtcconst = (ega->seqregs[1] & 1) ? CGACONST : (CGACONST * (9.0 / 8.0)); } ega->interlace = 0; @@ -399,610 +408,668 @@ ega_recalctimings(ega_t *ega) ega->render = ega_render_blank; if (!ega->scrblank && ega->attr_palette_enable) { - if (!(ega->gdcreg[6] & 1)) { - if (ega->seqregs[1] & 8) { - ega->render = ega_render_text_40; - ega->hdisp *= (ega->seqregs[1] & 1) ? 16 : 18; - } else { - ega->render = ega_render_text_80; - ega->hdisp *= (ega->seqregs[1] & 1) ? 8 : 9; - } - ega->hdisp_old = ega->hdisp; - } else { - ega->hdisp *= (ega->seqregs[1] & 8) ? 16 : 8; - ega->hdisp_old = ega->hdisp; + if (!(ega->gdcreg[6] & 1)) { + if (ega->seqregs[1] & 8) { + ega->render = ega_render_text_40; + ega->hdisp *= (ega->seqregs[1] & 1) ? 16 : 18; + } else { + ega->render = ega_render_text_80; + ega->hdisp *= (ega->seqregs[1] & 1) ? 8 : 9; + } + ega->hdisp_old = ega->hdisp; + } else { + ega->hdisp *= (ega->seqregs[1] & 8) ? 16 : 8; + ega->hdisp_old = ega->hdisp; - switch (ega->gdcreg[5] & 0x20) { - case 0x00: - if (ega->seqregs[1] & 8) - ega->render = ega_render_4bpp_lowres; - else - ega->render = ega_render_4bpp_highres; - break; - case 0x20: - if (ega->seqregs[1] & 8) - ega->render = ega_render_2bpp_lowres; - else - ega->render = ega_render_2bpp_highres; - break; - } - } + switch (ega->gdcreg[5] & 0x20) { + case 0x00: + if (ega->seqregs[1] & 8) + ega->render = ega_render_4bpp_lowres; + else + ega->render = ega_render_4bpp_highres; + break; + case 0x20: + if (ega->seqregs[1] & 8) + ega->render = ega_render_2bpp_lowres; + else + ega->render = ega_render_2bpp_highres; + break; + } + } } if (enable_overscan) { - overscan_y = (ega->rowcount + 1) << 1; + overscan_y = (ega->rowcount + 1) << 1; - if (overscan_y < 16) - overscan_y = 16; + if (overscan_y < 16) + overscan_y = 16; } overscan_x = (ega->seqregs[1] & 1) ? 16 : 18; if (ega->seqregs[1] & 8) - overscan_x <<= 1; + overscan_x <<= 1; ega->y_add = (overscan_y >> 1) - (ega->crtc[8] & 0x1f); ega->x_add = (overscan_x >> 1); if (ega->seqregs[1] & 8) { - disptime = (double) ((ega->crtc[0] + 2) << 1); - _dispontime = (double) ((ega->crtc[1] + 1) << 1); + disptime = (double) ((ega->crtc[0] + 2) << 1); + _dispontime = (double) ((ega->crtc[1] + 1) << 1); } else { - disptime = (double) (ega->crtc[0] + 2); - _dispontime = (double) (ega->crtc[1] + 1); + disptime = (double) (ega->crtc[0] + 2); + _dispontime = (double) (ega->crtc[1] + 1); } _dispofftime = disptime - _dispontime; _dispontime *= crtcconst; _dispofftime *= crtcconst; - ega->dispontime = (uint64_t)(_dispontime); - ega->dispofftime = (uint64_t)(_dispofftime); + ega->dispontime = (uint64_t) (_dispontime); + ega->dispofftime = (uint64_t) (_dispofftime); if (ega->dispontime < TIMER_USEC) - ega->dispontime = TIMER_USEC; + ega->dispontime = TIMER_USEC; if (ega->dispofftime < TIMER_USEC) - ega->dispofftime = TIMER_USEC; + ega->dispofftime = TIMER_USEC; ega_recalc_remap_func(ega); } - void ega_poll(void *p) { - ega_t *ega = (ega_t *)p; - int x, old_ma; - int wx = 640, wy = 350; + ega_t *ega = (ega_t *) p; + int x, old_ma; + int wx = 640, wy = 350; uint32_t blink_delay; if (!ega->linepos) { - timer_advance_u64(&ega->timer, ega->dispofftime); - ega->stat |= 1; - ega->linepos = 1; + timer_advance_u64(&ega->timer, ega->dispofftime); + ega->stat |= 1; + ega->linepos = 1; - if (ega->dispon) { - ega->hdisp_on = 1; + if (ega->dispon) { + ega->hdisp_on = 1; - ega->ma &= ega->vrammask; - if (ega->firstline == 2000) { - ega->firstline = ega->displine; - video_wait_for_buffer(); - } + ega->ma &= ega->vrammask; + if (ega->firstline == 2000) { + ega->firstline = ega->displine; + video_wait_for_buffer(); + } - if (ega->vres) { - old_ma = ega->ma; + if (ega->vres) { + old_ma = ega->ma; - ega->displine <<= 1; - ega->y_add <<= 1; + ega->displine <<= 1; + ega->y_add <<= 1; - ega->render(ega); + ega->render(ega); - ega->x_add = (overscan_x >> 1); - ega_render_overscan_left(ega); - ega_render_overscan_right(ega); - ega->x_add = (overscan_x >> 1) - ega->scrollcache; + ega->x_add = (overscan_x >> 1); + ega_render_overscan_left(ega); + ega_render_overscan_right(ega); + ega->x_add = (overscan_x >> 1) - ega->scrollcache; - ega->displine++; + ega->displine++; - ega->ma = old_ma; + ega->ma = old_ma; - ega->render(ega); + ega->render(ega); - ega->x_add = (overscan_x >> 1); - ega_render_overscan_left(ega); - ega_render_overscan_right(ega); - ega->x_add = (overscan_x >> 1) - ega->scrollcache; + ega->x_add = (overscan_x >> 1); + ega_render_overscan_left(ega); + ega_render_overscan_right(ega); + ega->x_add = (overscan_x >> 1) - ega->scrollcache; - ega->y_add >>= 1; - ega->displine >>= 1; - } else { - ega_render_overscan_left(ega); - ega->render(ega); - ega_render_overscan_right(ega); - } + ega->y_add >>= 1; + ega->displine >>= 1; + } else { + ega_render_overscan_left(ega); + ega->render(ega); + ega_render_overscan_right(ega); + } - if (ega->lastline < ega->displine) - ega->lastline = ega->displine; - } + if (ega->lastline < ega->displine) + ega->lastline = ega->displine; + } - ega->displine++; - if (ega->interlace) - ega->displine++; - if ((ega->stat & 8) && ((ega->displine & 15) == (ega->crtc[0x11] & 15)) && ega->vslines) - ega->stat &= ~8; - ega->vslines++; - if (ega->displine > 500) - ega->displine = 0; + ega->displine++; + if (ega->interlace) + ega->displine++; + if ((ega->stat & 8) && ((ega->displine & 15) == (ega->crtc[0x11] & 15)) && ega->vslines) + ega->stat &= ~8; + ega->vslines++; + if (ega->displine > 500) + ega->displine = 0; } else { - timer_advance_u64(&ega->timer, ega->dispontime); + timer_advance_u64(&ega->timer, ega->dispontime); - if (ega->dispon) - ega->stat &= ~1; - ega->hdisp_on = 0; + if (ega->dispon) + ega->stat &= ~1; + ega->hdisp_on = 0; - ega->linepos = 0; - if ((ega->sc == (ega->crtc[11] & 31)) || (ega->sc == ega->rowcount)) - ega->con = 0; - if (ega->dispon) { - if (ega->linedbl && !ega->linecountff) { - ega->linecountff = 1; - ega->ma = ega->maback; - } if (ega->sc == (ega->crtc[9] & 31)) { - ega->linecountff = 0; - ega->sc = 0; + ega->linepos = 0; + if ((ega->sc == (ega->crtc[11] & 31)) || (ega->sc == ega->rowcount)) + ega->con = 0; + if (ega->dispon) { + if (ega->linedbl && !ega->linecountff) { + ega->linecountff = 1; + ega->ma = ega->maback; + } + if (ega->sc == (ega->crtc[9] & 31)) { + ega->linecountff = 0; + ega->sc = 0; - ega->maback += (ega->rowoffset << 3); - if (ega->interlace) - ega->maback += (ega->rowoffset << 3); - ega->maback &= ega->vrammask; - ega->ma = ega->maback; - } else { - ega->linecountff = 0; - ega->sc++; - ega->sc &= 31; - ega->ma = ega->maback; - } - } - ega->vc++; - ega->vc &= 511; - if (ega->vc == ega->split) { - if (ega->interlace && ega->oddeven) - ega->ma = ega->maback = ega->ma_latch + (ega->rowoffset << 1); - else - ega->ma = ega->maback = ega->ma_latch; - ega->ma <<= 2; - ega->maback <<= 2; - ega->sc = 0; - if (ega->attrregs[0x10] & 0x20) { - ega->scrollcache = 0; - ega->x_add = (overscan_x >> 1); - } - } - if (ega->vc == ega->dispend) { - ega->dispon = 0; - blink_delay = (ega->crtc[11] & 0x60) >> 5; - if (ega->crtc[10] & 0x20) - ega->cursoron = 0; - else if (blink_delay == 2) - ega->cursoron = ((ega->blink % 96) >= 48); - else - ega->cursoron = ega->blink & (16 + (16 * blink_delay)); + ega->maback += (ega->rowoffset << 3); + if (ega->interlace) + ega->maback += (ega->rowoffset << 3); + ega->maback &= ega->vrammask; + ega->ma = ega->maback; + } else { + ega->linecountff = 0; + ega->sc++; + ega->sc &= 31; + ega->ma = ega->maback; + } + } + ega->vc++; + ega->vc &= 511; + if (ega->vc == ega->split) { + if (ega->interlace && ega->oddeven) + ega->ma = ega->maback = ega->ma_latch + (ega->rowoffset << 1); + else + ega->ma = ega->maback = ega->ma_latch; + ega->ma <<= 2; + ega->maback <<= 2; + ega->sc = 0; + if (ega->attrregs[0x10] & 0x20) { + ega->scrollcache = 0; + ega->x_add = (overscan_x >> 1); + } + } + if (ega->vc == ega->dispend) { + ega->dispon = 0; + blink_delay = (ega->crtc[11] & 0x60) >> 5; + if (ega->crtc[10] & 0x20) + ega->cursoron = 0; + else if (blink_delay == 2) + ega->cursoron = ((ega->blink % 96) >= 48); + else + ega->cursoron = ega->blink & (16 + (16 * blink_delay)); - if (!(ega->gdcreg[6] & 1) && !(ega->blink & 15)) - ega->fullchange = 2; - ega->blink = (ega->blink + 1) & 0x7f; + if (!(ega->gdcreg[6] & 1) && !(ega->blink & 15)) + ega->fullchange = 2; + ega->blink = (ega->blink + 1) & 0x7f; - if (ega->fullchange) - ega->fullchange--; - } - if (ega->vc == ega->vsyncstart) { - ega->dispon = 0; - ega->stat |= 8; - x = ega->hdisp; + if (ega->fullchange) + ega->fullchange--; + } + if (ega->vc == ega->vsyncstart) { + ega->dispon = 0; + ega->stat |= 8; + x = ega->hdisp; - if (ega->interlace && !ega->oddeven) - ega->lastline++; - if (ega->interlace && ega->oddeven) - ega->firstline--; + if (ega->interlace && !ega->oddeven) + ega->lastline++; + if (ega->interlace && ega->oddeven) + ega->firstline--; - wx = x; + wx = x; - if (ega->vres) { - wy = (ega->lastline - ega->firstline) << 1; - ega_doblit(wx, wy, ega); - } else { - wy = ega->lastline - ega->firstline; - ega_doblit(wx, wy, ega); - } + if (ega->vres) { + wy = (ega->lastline - ega->firstline) << 1; + ega_doblit(wx, wy, ega); + } else { + wy = ega->lastline - ega->firstline; + ega_doblit(wx, wy, ega); + } - frames++; + frames++; - ega->firstline = 2000; - ega->lastline = 0; + ega->firstline = 2000; + ega->lastline = 0; - ega->firstline_draw = 2000; - ega->lastline_draw = 0; + ega->firstline_draw = 2000; + ega->lastline_draw = 0; - ega->oddeven ^= 1; + ega->oddeven ^= 1; - changeframecount = ega->interlace ? 3 : 2; - ega->vslines = 0; + changeframecount = ega->interlace ? 3 : 2; + ega->vslines = 0; - if (ega->interlace && ega->oddeven) - ega->ma = ega->maback = ega->ma_latch + (ega->rowoffset << 1); - else - ega->ma = ega->maback = ega->ma_latch; - ega->ca = (ega->crtc[0xe] << 8) | ega->crtc[0xf]; + if (ega->interlace && ega->oddeven) + ega->ma = ega->maback = ega->ma_latch + (ega->rowoffset << 1); + else + ega->ma = ega->maback = ega->ma_latch; + ega->ca = (ega->crtc[0xe] << 8) | ega->crtc[0xf]; - ega->ma <<= 2; - ega->maback <<= 2; - ega->ca <<= 2; - } - if (ega->vc == ega->vtotal) { - ega->vc = 0; - ega->sc = 0; - ega->dispon = 1; - ega->displine = (ega->interlace && ega->oddeven) ? 1 : 0; + ega->ma <<= 2; + ega->maback <<= 2; + ega->ca <<= 2; + } + if (ega->vc == ega->vtotal) { + ega->vc = 0; + ega->sc = 0; + ega->dispon = 1; + ega->displine = (ega->interlace && ega->oddeven) ? 1 : 0; - ega->scrollcache = (ega->attrregs[0x13] & 0x0f); - if (!(ega->gdcreg[6] & 1) && !(ega->attrregs[0x10] & 1)) { /*Text mode*/ - if (ega->seqregs[1] & 1) - ega->scrollcache &= 0x07; - else { - ega->scrollcache++; - if (ega->scrollcache > 8) - ega->scrollcache = 0; - } - } else - ega->scrollcache &= 0x07; + ega->scrollcache = (ega->attrregs[0x13] & 0x0f); + if (!(ega->gdcreg[6] & 1) && !(ega->attrregs[0x10] & 1)) { /*Text mode*/ + if (ega->seqregs[1] & 1) + ega->scrollcache &= 0x07; + else { + ega->scrollcache++; + if (ega->scrollcache > 8) + ega->scrollcache = 0; + } + } else + ega->scrollcache &= 0x07; - if (ega->seqregs[1] & 8) - ega->scrollcache <<= 1; + if (ega->seqregs[1] & 8) + ega->scrollcache <<= 1; - ega->x_add = (overscan_x >> 1) - ega->scrollcache; + ega->x_add = (overscan_x >> 1) - ega->scrollcache; - ega->linecountff = 0; - } - if (ega->sc == (ega->crtc[10] & 31)) - ega->con = 1; + ega->linecountff = 0; + } + if (ega->sc == (ega->crtc[10] & 31)) + ega->con = 1; } } - void ega_doblit(int wx, int wy, ega_t *ega) { - int y_add = (enable_overscan) ? overscan_y : 0; - int x_add = (enable_overscan) ? overscan_x : 0; - int y_start = (enable_overscan) ? 0 : (overscan_y >> 1); - int x_start = (enable_overscan) ? 0 : (overscan_x >> 1); - int bottom = (overscan_y >> 1) + (ega->crtc[8] & 0x1f); + int y_add = (enable_overscan) ? overscan_y : 0; + int x_add = (enable_overscan) ? overscan_x : 0; + int y_start = (enable_overscan) ? 0 : (overscan_y >> 1); + int x_start = (enable_overscan) ? 0 : (overscan_x >> 1); + int bottom = (overscan_y >> 1) + (ega->crtc[8] & 0x1f); uint32_t *p; - int i, j; - int xs_temp, ys_temp; + int i, j; + int xs_temp, ys_temp; if (ega->vres) { - y_add <<= 1; - y_start <<= 1; - bottom <<= 1; + y_add <<= 1; + y_start <<= 1; + bottom <<= 1; } if ((wx <= 0) || (wy <= 0)) - return; + return; if (ega->vres) - ega->y_add <<= 1; + ega->y_add <<= 1; xs_temp = wx; ys_temp = wy + 1; if (ega->vres) - ys_temp++; + ys_temp++; if (xs_temp < 64) - xs_temp = 640; + xs_temp = 640; if (ys_temp < 32) - ys_temp = 200; + ys_temp = 200; if ((ega->crtc[0x17] & 0x80) && ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get())) { - /* Screen res has changed.. fix up, and let them know. */ - xsize = xs_temp; - ysize = ys_temp; + /* Screen res has changed.. fix up, and let them know. */ + xsize = xs_temp; + ysize = ys_temp; - if ((xsize > 1984) || (ysize > 2016)) { - /* 2048x2048 is the biggest safe render texture, to account for overscan, - we suppress overscan starting from x 1984 and y 2016. */ - x_add = 0; - y_add = 0; - suppress_overscan = 1; - } else - suppress_overscan = 0; + if ((xsize > 1984) || (ysize > 2016)) { + /* 2048x2048 is the biggest safe render texture, to account for overscan, + we suppress overscan starting from x 1984 and y 2016. */ + x_add = 0; + y_add = 0; + suppress_overscan = 1; + } else + suppress_overscan = 0; - set_screen_size(xsize + x_add, ysize + y_add); + set_screen_size(xsize + x_add, ysize + y_add); - if (video_force_resize_get()) - video_force_resize_set(0); + if (video_force_resize_get()) + video_force_resize_set(0); } if ((wx >= 160) && ((wy + 1) >= 120)) { - /* Draw (overscan_size - scroll size) lines of overscan on top and bottom. */ - for (i = 0; i < ega->y_add; i++) { - p = &buffer32->line[i & 0x7ff][0]; + /* Draw (overscan_size - scroll size) lines of overscan on top and bottom. */ + for (i = 0; i < ega->y_add; i++) { + p = &buffer32->line[i & 0x7ff][0]; - for (j = 0; j < (xsize + x_add); j++) - p[j] = ega->overscan_color; - } + for (j = 0; j < (xsize + x_add); j++) + p[j] = ega->overscan_color; + } - for (i = 0; i < bottom; i++) { - p = &buffer32->line[(ysize + ega->y_add + i) & 0x7ff][0]; + for (i = 0; i < bottom; i++) { + p = &buffer32->line[(ysize + ega->y_add + i) & 0x7ff][0]; - for (j = 0; j < (xsize + x_add); j++) - p[j] = ega->overscan_color; - } + for (j = 0; j < (xsize + x_add); j++) + p[j] = ega->overscan_color; + } } video_blit_memtoscreen(x_start, y_start, xsize + x_add, ysize + y_add); if (ega->vres) - ega->y_add >>= 1; + ega->y_add >>= 1; } - void ega_write(uint32_t addr, uint8_t val, void *p) { - ega_t *ega = (ega_t *)p; + ega_t *ega = (ega_t *) p; uint8_t vala, valb, valc, vald; - int writemask2 = ega->writemask; + int writemask2 = ega->writemask; cycles -= video_timing_write_b; - if (addr >= 0xB0000) addr &= 0x7fff; - else addr &= 0xffff; + if (addr >= 0xB0000) + addr &= 0x7fff; + else + addr &= 0xffff; if (ega->chain2_write) { - writemask2 &= ~0xa; - if (addr & 1) - writemask2 <<= 1; - addr &= ~1; - if (addr & 0x4000) - addr |= 1; - addr &= ~0x4000; + writemask2 &= ~0xa; + if (addr & 1) + writemask2 <<= 1; + addr &= ~1; + if (addr & 0x4000) + addr |= 1; + addr &= ~0x4000; } addr <<= 2; if (addr >= ega->vram_limit) - return; + return; if (!(ega->gdcreg[6] & 1)) - ega->fullchange = 2; + ega->fullchange = 2; switch (ega->writemode) { - case 1: - if (writemask2 & 1) ega->vram[addr] = ega->la; - if (writemask2 & 2) ega->vram[addr | 0x1] = ega->lb; - if (writemask2 & 4) ega->vram[addr | 0x2] = ega->lc; - if (writemask2 & 8) ega->vram[addr | 0x3] = ega->ld; - break; - case 0: - if (ega->gdcreg[3] & 7) - val = ega_rotate[ega->gdcreg[3] & 7][val]; + case 1: + if (writemask2 & 1) + ega->vram[addr] = ega->la; + if (writemask2 & 2) + ega->vram[addr | 0x1] = ega->lb; + if (writemask2 & 4) + ega->vram[addr | 0x2] = ega->lc; + if (writemask2 & 8) + ega->vram[addr | 0x3] = ega->ld; + break; + case 0: + if (ega->gdcreg[3] & 7) + val = ega_rotate[ega->gdcreg[3] & 7][val]; - if ((ega->gdcreg[8] == 0xff) && !(ega->gdcreg[3] & 0x18) && !ega->gdcreg[1]) { - if (writemask2 & 1) ega->vram[addr] = val; - if (writemask2 & 2) ega->vram[addr | 0x1] = val; - if (writemask2 & 4) ega->vram[addr | 0x2] = val; - if (writemask2 & 8) ega->vram[addr | 0x3] = val; - } else { - if (ega->gdcreg[1] & 1) vala = (ega->gdcreg[0] & 1) ? 0xff : 0; - else vala = val; - if (ega->gdcreg[1] & 2) valb = (ega->gdcreg[0] & 2) ? 0xff : 0; - else valb = val; - if (ega->gdcreg[1] & 4) valc = (ega->gdcreg[0] & 4) ? 0xff : 0; - else valc = val; - if (ega->gdcreg[1] & 8) vald = (ega->gdcreg[0] & 8) ? 0xff : 0; - else vald = val; - switch (ega->gdcreg[3] & 0x18) { - case 0: /*Set*/ - if (writemask2 & 1) ega->vram[addr] = (vala & ega->gdcreg[8]) | (ega->la & ~ega->gdcreg[8]); - if (writemask2 & 2) ega->vram[addr | 0x1] = (valb & ega->gdcreg[8]) | (ega->lb & ~ega->gdcreg[8]); - if (writemask2 & 4) ega->vram[addr | 0x2] = (valc & ega->gdcreg[8]) | (ega->lc & ~ega->gdcreg[8]); - if (writemask2 & 8) ega->vram[addr | 0x3] = (vald & ega->gdcreg[8]) | (ega->ld & ~ega->gdcreg[8]); - break; - case 8: /*AND*/ - if (writemask2 & 1) ega->vram[addr] = (vala | ~ega->gdcreg[8]) & ega->la; - if (writemask2 & 2) ega->vram[addr | 0x1] = (valb | ~ega->gdcreg[8]) & ega->lb; - if (writemask2 & 4) ega->vram[addr | 0x2] = (valc | ~ega->gdcreg[8]) & ega->lc; - if (writemask2 & 8) ega->vram[addr | 0x3] = (vald | ~ega->gdcreg[8]) & ega->ld; - break; - case 0x10: /*OR*/ - if (writemask2 & 1) ega->vram[addr] = (vala & ega->gdcreg[8]) | ega->la; - if (writemask2 & 2) ega->vram[addr | 0x1] = (valb & ega->gdcreg[8]) | ega->lb; - if (writemask2 & 4) ega->vram[addr | 0x2] = (valc & ega->gdcreg[8]) | ega->lc; - if (writemask2 & 8) ega->vram[addr | 0x3] = (vald & ega->gdcreg[8]) | ega->ld; - break; - case 0x18: /*XOR*/ - if (writemask2 & 1) ega->vram[addr] = (vala & ega->gdcreg[8]) ^ ega->la; - if (writemask2 & 2) ega->vram[addr | 0x1] = (valb & ega->gdcreg[8]) ^ ega->lb; - if (writemask2 & 4) ega->vram[addr | 0x2] = (valc & ega->gdcreg[8]) ^ ega->lc; - if (writemask2 & 8) ega->vram[addr | 0x3] = (vald & ega->gdcreg[8]) ^ ega->ld; - break; - } - } - break; - case 2: - if (!(ega->gdcreg[3] & 0x18) && !ega->gdcreg[1]) { - if (writemask2 & 1) ega->vram[addr] = (((val & 1) ? 0xff : 0) & ega->gdcreg[8]) | (ega->la & ~ega->gdcreg[8]); - if (writemask2 & 2) ega->vram[addr | 0x1] = (((val & 2) ? 0xff : 0) & ega->gdcreg[8]) | (ega->lb & ~ega->gdcreg[8]); - if (writemask2 & 4) ega->vram[addr | 0x2] = (((val & 4) ? 0xff : 0) & ega->gdcreg[8]) | (ega->lc & ~ega->gdcreg[8]); - if (writemask2 & 8) ega->vram[addr | 0x3] = (((val & 8) ? 0xff : 0) & ega->gdcreg[8]) | (ega->ld & ~ega->gdcreg[8]); - } else { - vala = ((val & 1) ? 0xff : 0); - valb = ((val & 2) ? 0xff : 0); - valc = ((val & 4) ? 0xff : 0); - vald = ((val & 8) ? 0xff : 0); - switch (ega->gdcreg[3] & 0x18) { - case 0: /*Set*/ - if (writemask2 & 1) ega->vram[addr] = (vala & ega->gdcreg[8]) | (ega->la & ~ega->gdcreg[8]); - if (writemask2 & 2) ega->vram[addr | 0x1] = (valb & ega->gdcreg[8]) | (ega->lb & ~ega->gdcreg[8]); - if (writemask2 & 4) ega->vram[addr | 0x2] = (valc & ega->gdcreg[8]) | (ega->lc & ~ega->gdcreg[8]); - if (writemask2 & 8) ega->vram[addr | 0x3] = (vald & ega->gdcreg[8]) | (ega->ld & ~ega->gdcreg[8]); - break; - case 8: /*AND*/ - if (writemask2 & 1) ega->vram[addr] = (vala | ~ega->gdcreg[8]) & ega->la; - if (writemask2 & 2) ega->vram[addr | 0x1] = (valb | ~ega->gdcreg[8]) & ega->lb; - if (writemask2 & 4) ega->vram[addr | 0x2] = (valc | ~ega->gdcreg[8]) & ega->lc; - if (writemask2 & 8) ega->vram[addr | 0x3] = (vald | ~ega->gdcreg[8]) & ega->ld; - break; - case 0x10: /*OR*/ - if (writemask2 & 1) ega->vram[addr] = (vala & ega->gdcreg[8]) | ega->la; - if (writemask2 & 2) ega->vram[addr | 0x1] = (valb & ega->gdcreg[8]) | ega->lb; - if (writemask2 & 4) ega->vram[addr | 0x2] = (valc & ega->gdcreg[8]) | ega->lc; - if (writemask2 & 8) ega->vram[addr | 0x3] = (vald & ega->gdcreg[8]) | ega->ld; - break; - case 0x18: /*XOR*/ - if (writemask2 & 1) ega->vram[addr] = (vala & ega->gdcreg[8]) ^ ega->la; - if (writemask2 & 2) ega->vram[addr | 0x1] = (valb & ega->gdcreg[8]) ^ ega->lb; - if (writemask2 & 4) ega->vram[addr | 0x2] = (valc & ega->gdcreg[8]) ^ ega->lc; - if (writemask2 & 8) ega->vram[addr | 0x3] = (vald & ega->gdcreg[8]) ^ ega->ld; - break; - } - } - break; + if ((ega->gdcreg[8] == 0xff) && !(ega->gdcreg[3] & 0x18) && !ega->gdcreg[1]) { + if (writemask2 & 1) + ega->vram[addr] = val; + if (writemask2 & 2) + ega->vram[addr | 0x1] = val; + if (writemask2 & 4) + ega->vram[addr | 0x2] = val; + if (writemask2 & 8) + ega->vram[addr | 0x3] = val; + } else { + if (ega->gdcreg[1] & 1) + vala = (ega->gdcreg[0] & 1) ? 0xff : 0; + else + vala = val; + if (ega->gdcreg[1] & 2) + valb = (ega->gdcreg[0] & 2) ? 0xff : 0; + else + valb = val; + if (ega->gdcreg[1] & 4) + valc = (ega->gdcreg[0] & 4) ? 0xff : 0; + else + valc = val; + if (ega->gdcreg[1] & 8) + vald = (ega->gdcreg[0] & 8) ? 0xff : 0; + else + vald = val; + switch (ega->gdcreg[3] & 0x18) { + case 0: /*Set*/ + if (writemask2 & 1) + ega->vram[addr] = (vala & ega->gdcreg[8]) | (ega->la & ~ega->gdcreg[8]); + if (writemask2 & 2) + ega->vram[addr | 0x1] = (valb & ega->gdcreg[8]) | (ega->lb & ~ega->gdcreg[8]); + if (writemask2 & 4) + ega->vram[addr | 0x2] = (valc & ega->gdcreg[8]) | (ega->lc & ~ega->gdcreg[8]); + if (writemask2 & 8) + ega->vram[addr | 0x3] = (vald & ega->gdcreg[8]) | (ega->ld & ~ega->gdcreg[8]); + break; + case 8: /*AND*/ + if (writemask2 & 1) + ega->vram[addr] = (vala | ~ega->gdcreg[8]) & ega->la; + if (writemask2 & 2) + ega->vram[addr | 0x1] = (valb | ~ega->gdcreg[8]) & ega->lb; + if (writemask2 & 4) + ega->vram[addr | 0x2] = (valc | ~ega->gdcreg[8]) & ega->lc; + if (writemask2 & 8) + ega->vram[addr | 0x3] = (vald | ~ega->gdcreg[8]) & ega->ld; + break; + case 0x10: /*OR*/ + if (writemask2 & 1) + ega->vram[addr] = (vala & ega->gdcreg[8]) | ega->la; + if (writemask2 & 2) + ega->vram[addr | 0x1] = (valb & ega->gdcreg[8]) | ega->lb; + if (writemask2 & 4) + ega->vram[addr | 0x2] = (valc & ega->gdcreg[8]) | ega->lc; + if (writemask2 & 8) + ega->vram[addr | 0x3] = (vald & ega->gdcreg[8]) | ega->ld; + break; + case 0x18: /*XOR*/ + if (writemask2 & 1) + ega->vram[addr] = (vala & ega->gdcreg[8]) ^ ega->la; + if (writemask2 & 2) + ega->vram[addr | 0x1] = (valb & ega->gdcreg[8]) ^ ega->lb; + if (writemask2 & 4) + ega->vram[addr | 0x2] = (valc & ega->gdcreg[8]) ^ ega->lc; + if (writemask2 & 8) + ega->vram[addr | 0x3] = (vald & ega->gdcreg[8]) ^ ega->ld; + break; + } + } + break; + case 2: + if (!(ega->gdcreg[3] & 0x18) && !ega->gdcreg[1]) { + if (writemask2 & 1) + ega->vram[addr] = (((val & 1) ? 0xff : 0) & ega->gdcreg[8]) | (ega->la & ~ega->gdcreg[8]); + if (writemask2 & 2) + ega->vram[addr | 0x1] = (((val & 2) ? 0xff : 0) & ega->gdcreg[8]) | (ega->lb & ~ega->gdcreg[8]); + if (writemask2 & 4) + ega->vram[addr | 0x2] = (((val & 4) ? 0xff : 0) & ega->gdcreg[8]) | (ega->lc & ~ega->gdcreg[8]); + if (writemask2 & 8) + ega->vram[addr | 0x3] = (((val & 8) ? 0xff : 0) & ega->gdcreg[8]) | (ega->ld & ~ega->gdcreg[8]); + } else { + vala = ((val & 1) ? 0xff : 0); + valb = ((val & 2) ? 0xff : 0); + valc = ((val & 4) ? 0xff : 0); + vald = ((val & 8) ? 0xff : 0); + switch (ega->gdcreg[3] & 0x18) { + case 0: /*Set*/ + if (writemask2 & 1) + ega->vram[addr] = (vala & ega->gdcreg[8]) | (ega->la & ~ega->gdcreg[8]); + if (writemask2 & 2) + ega->vram[addr | 0x1] = (valb & ega->gdcreg[8]) | (ega->lb & ~ega->gdcreg[8]); + if (writemask2 & 4) + ega->vram[addr | 0x2] = (valc & ega->gdcreg[8]) | (ega->lc & ~ega->gdcreg[8]); + if (writemask2 & 8) + ega->vram[addr | 0x3] = (vald & ega->gdcreg[8]) | (ega->ld & ~ega->gdcreg[8]); + break; + case 8: /*AND*/ + if (writemask2 & 1) + ega->vram[addr] = (vala | ~ega->gdcreg[8]) & ega->la; + if (writemask2 & 2) + ega->vram[addr | 0x1] = (valb | ~ega->gdcreg[8]) & ega->lb; + if (writemask2 & 4) + ega->vram[addr | 0x2] = (valc | ~ega->gdcreg[8]) & ega->lc; + if (writemask2 & 8) + ega->vram[addr | 0x3] = (vald | ~ega->gdcreg[8]) & ega->ld; + break; + case 0x10: /*OR*/ + if (writemask2 & 1) + ega->vram[addr] = (vala & ega->gdcreg[8]) | ega->la; + if (writemask2 & 2) + ega->vram[addr | 0x1] = (valb & ega->gdcreg[8]) | ega->lb; + if (writemask2 & 4) + ega->vram[addr | 0x2] = (valc & ega->gdcreg[8]) | ega->lc; + if (writemask2 & 8) + ega->vram[addr | 0x3] = (vald & ega->gdcreg[8]) | ega->ld; + break; + case 0x18: /*XOR*/ + if (writemask2 & 1) + ega->vram[addr] = (vala & ega->gdcreg[8]) ^ ega->la; + if (writemask2 & 2) + ega->vram[addr | 0x1] = (valb & ega->gdcreg[8]) ^ ega->lb; + if (writemask2 & 4) + ega->vram[addr | 0x2] = (valc & ega->gdcreg[8]) ^ ega->lc; + if (writemask2 & 8) + ega->vram[addr | 0x3] = (vald & ega->gdcreg[8]) ^ ega->ld; + break; + } + } + break; } } - uint8_t ega_read(uint32_t addr, void *p) { - ega_t *ega = (ega_t *)p; + ega_t *ega = (ega_t *) p; uint8_t temp, temp2, temp3, temp4; - int readplane = ega->readplane; + int readplane = ega->readplane; cycles -= video_timing_read_b; - if (addr >= 0xb0000) addr &= 0x7fff; - else addr &= 0xffff; + if (addr >= 0xb0000) + addr &= 0x7fff; + else + addr &= 0xffff; if (ega->chain2_read) { - readplane = (readplane & 2) | (addr & 1); - addr &= ~1; - if (addr & 0x4000) - addr |= 1; - addr &= ~0x4000; + readplane = (readplane & 2) | (addr & 1); + addr &= ~1; + if (addr & 0x4000) + addr |= 1; + addr &= ~0x4000; } addr <<= 2; if (addr >= ega->vram_limit) - return 0xff; + return 0xff; ega->la = ega->vram[addr]; ega->lb = ega->vram[addr | 0x1]; ega->lc = ega->vram[addr | 0x2]; ega->ld = ega->vram[addr | 0x3]; if (ega->readmode) { - temp = ega->la; - temp ^= (ega->colourcompare & 1) ? 0xff : 0; - temp &= (ega->colournocare & 1) ? 0xff : 0; - temp2 = ega->lb; - temp2 ^= (ega->colourcompare & 2) ? 0xff : 0; - temp2 &= (ega->colournocare & 2) ? 0xff : 0; - temp3 = ega->lc; - temp3 ^= (ega->colourcompare & 4) ? 0xff : 0; - temp3 &= (ega->colournocare & 4) ? 0xff : 0; - temp4 = ega->ld; - temp4 ^= (ega->colourcompare & 8) ? 0xff : 0; - temp4 &= (ega->colournocare & 8) ? 0xff : 0; - return ~(temp | temp2 | temp3 | temp4); + temp = ega->la; + temp ^= (ega->colourcompare & 1) ? 0xff : 0; + temp &= (ega->colournocare & 1) ? 0xff : 0; + temp2 = ega->lb; + temp2 ^= (ega->colourcompare & 2) ? 0xff : 0; + temp2 &= (ega->colournocare & 2) ? 0xff : 0; + temp3 = ega->lc; + temp3 ^= (ega->colourcompare & 4) ? 0xff : 0; + temp3 &= (ega->colournocare & 4) ? 0xff : 0; + temp4 = ega->ld; + temp4 ^= (ega->colourcompare & 8) ? 0xff : 0; + temp4 &= (ega->colournocare & 8) ? 0xff : 0; + return ~(temp | temp2 | temp3 | temp4); } return ega->vram[addr | readplane]; } - void ega_init(ega_t *ega, int monitor_type, int is_mono) { int c, d, e; - ega->vram = malloc(0x40000); + ega->vram = malloc(0x40000); ega->vrammask = 0x3ffff; for (c = 0; c < 256; c++) { - e = c; - for (d = 0; d < 8; d++) { - ega_rotate[d][c] = e; - e = (e >> 1) | ((e & 1) ? 0x80 : 0); - } + e = c; + for (d = 0; d < 8; d++) { + ega_rotate[d][c] = e; + e = (e >> 1) | ((e & 1) ? 0x80 : 0); + } } for (c = 0; c < 4; c++) { - for (d = 0; d < 4; d++) { - edatlookup[c][d] = 0; - if (c & 1) edatlookup[c][d] |= 1; - if (d & 1) edatlookup[c][d] |= 2; - if (c & 2) edatlookup[c][d] |= 0x10; - if (d & 2) edatlookup[c][d] |= 0x20; - } + for (d = 0; d < 4; d++) { + edatlookup[c][d] = 0; + if (c & 1) + edatlookup[c][d] |= 1; + if (d & 1) + edatlookup[c][d] |= 2; + if (c & 2) + edatlookup[c][d] |= 0x10; + if (d & 2) + edatlookup[c][d] |= 0x20; + } } if (is_mono) { - for (c = 0; c < 256; c++) { - if (((c >> 3) & 3) == 0) - pallook64[c] = pallook16[c] = makecol32(0, 0, 0); - else switch (monitor_type >> 4) { - case DISPLAY_GREEN: - switch ((c >> 3) & 3) { - case 1: - pallook64[c] = pallook16[c] = makecol32(0x08, 0xc7, 0x2c); - break; - case 2: - pallook64[c] = pallook16[c] = makecol32(0x04, 0x8a, 0x20); - break; - case 3: - pallook64[c] = pallook16[c] = makecol32(0x34, 0xff, 0x5d); - break; - } - break; - case DISPLAY_AMBER: - switch ((c >> 3) & 3) { - case 1: - pallook64[c] = pallook16[c] = makecol32(0xef, 0x79, 0x00); - break; - case 2: - pallook64[c] = pallook16[c] = makecol32(0xb2, 0x4d, 0x00); - break; - case 3: - pallook64[c] = pallook16[c] = makecol32(0xff, 0xe3, 0x34); - break; - } - break; - case DISPLAY_WHITE: default: - switch ((c >> 3) & 3) { - case 1: - pallook64[c] = pallook16[c] = makecol32(0xaf, 0xb3, 0xb0); - break; - case 2: - pallook64[c] = pallook16[c] = makecol32(0x7a, 0x81, 0x83); - break; - case 3: - pallook64[c] = pallook16[c] = makecol32(0xff, 0xfd, 0xed); - break; - } - break; - } - } + for (c = 0; c < 256; c++) { + if (((c >> 3) & 3) == 0) + pallook64[c] = pallook16[c] = makecol32(0, 0, 0); + else + switch (monitor_type >> 4) { + case DISPLAY_GREEN: + switch ((c >> 3) & 3) { + case 1: + pallook64[c] = pallook16[c] = makecol32(0x08, 0xc7, 0x2c); + break; + case 2: + pallook64[c] = pallook16[c] = makecol32(0x04, 0x8a, 0x20); + break; + case 3: + pallook64[c] = pallook16[c] = makecol32(0x34, 0xff, 0x5d); + break; + } + break; + case DISPLAY_AMBER: + switch ((c >> 3) & 3) { + case 1: + pallook64[c] = pallook16[c] = makecol32(0xef, 0x79, 0x00); + break; + case 2: + pallook64[c] = pallook16[c] = makecol32(0xb2, 0x4d, 0x00); + break; + case 3: + pallook64[c] = pallook16[c] = makecol32(0xff, 0xe3, 0x34); + break; + } + break; + case DISPLAY_WHITE: + default: + switch ((c >> 3) & 3) { + case 1: + pallook64[c] = pallook16[c] = makecol32(0xaf, 0xb3, 0xb0); + break; + case 2: + pallook64[c] = pallook16[c] = makecol32(0x7a, 0x81, 0x83); + break; + case 3: + pallook64[c] = pallook16[c] = makecol32(0xff, 0xfd, 0xed); + break; + } + break; + } + } - io_sethandler(0x03a0, 0x0020, ega_in, NULL, NULL, ega_out, NULL, NULL, ega); + io_sethandler(0x03a0, 0x0020, ega_in, NULL, NULL, ega_out, NULL, NULL, ega); } else { - for (c = 0; c < 256; c++) { - pallook64[c] = makecol32(((c >> 2) & 1) * 0xaa, ((c >> 1) & 1) * 0xaa, (c & 1) * 0xaa); - pallook64[c] += makecol32(((c >> 5) & 1) * 0x55, ((c >> 4) & 1) * 0x55, ((c >> 3) & 1) * 0x55); - pallook16[c] = makecol32(((c >> 2) & 1) * 0xaa, ((c >> 1) & 1) * 0xaa, (c & 1) * 0xaa); - pallook16[c] += makecol32(((c >> 4) & 1) * 0x55, ((c >> 4) & 1) * 0x55, ((c >> 4) & 1) * 0x55); - if ((c & 0x17) == 6) - pallook16[c] = makecol32(0xaa, 0x55, 0); - } + for (c = 0; c < 256; c++) { + pallook64[c] = makecol32(((c >> 2) & 1) * 0xaa, ((c >> 1) & 1) * 0xaa, (c & 1) * 0xaa); + pallook64[c] += makecol32(((c >> 5) & 1) * 0x55, ((c >> 4) & 1) * 0x55, ((c >> 3) & 1) * 0x55); + pallook16[c] = makecol32(((c >> 2) & 1) * 0xaa, ((c >> 1) & 1) * 0xaa, (c & 1) * 0xaa); + pallook16[c] += makecol32(((c >> 4) & 1) * 0x55, ((c >> 4) & 1) * 0x55, ((c >> 4) & 1) * 0x55); + if ((c & 0x17) == 6) + pallook16[c] = makecol32(0xaa, 0x55, 0); + } - ega->miscout |= 1; + ega->miscout |= 1; } ega->pallook = pallook16; @@ -1010,7 +1077,7 @@ ega_init(ega_t *ega, int monitor_type, int is_mono) egaswitches = monitor_type & 0xf; ega->vram_limit = 256 * 1024; - ega->vrammask = ega->vram_limit - 1; + ega->vrammask = ega->vram_limit - 1; old_overscan_color = 0; @@ -1028,12 +1095,11 @@ ega_init(ega_t *ega, int monitor_type, int is_mono) timer_add(&ega->timer, ega_poll, ega, 1); } - static void * ega_standalone_init(const device_t *info) { ega_t *ega = malloc(sizeof(ega_t)); - int monitor_type, c; + int monitor_type, c; memset(ega, 0, sizeof(ega_t)); @@ -1044,131 +1110,121 @@ ega_standalone_init(const device_t *info) ega->x_add = 8; ega->y_add = 14; - if ((info->local == EGA_IBM) || (info->local == EGA_ISKRA) || - (info->local == EGA_TSENG)) - ega_type = 0; + if ((info->local == EGA_IBM) || (info->local == EGA_ISKRA) || (info->local == EGA_TSENG)) + ega_type = 0; else - ega_type = 1; + ega_type = 1; - switch(info->local) { - case EGA_IBM: - default: - rom_init(&ega->bios_rom, BIOS_IBM_PATH, - 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - break; - case EGA_COMPAQ: - rom_init(&ega->bios_rom, BIOS_CPQ_PATH, - 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - break; - case EGA_SUPEREGA: - rom_init(&ega->bios_rom, BIOS_SEGA_PATH, - 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - break; - case EGA_ATI: - rom_init(&ega->bios_rom, BIOS_ATIEGA_PATH, - 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - break; - case EGA_ISKRA: - rom_init_interleaved(&ega->bios_rom, BIOS_ISKRA_PATH, - 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - break; - case EGA_TSENG: - rom_init(&ega->bios_rom, BIOS_TSENG_PATH, - 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - break; + switch (info->local) { + case EGA_IBM: + default: + rom_init(&ega->bios_rom, BIOS_IBM_PATH, + 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + break; + case EGA_COMPAQ: + rom_init(&ega->bios_rom, BIOS_CPQ_PATH, + 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + break; + case EGA_SUPEREGA: + rom_init(&ega->bios_rom, BIOS_SEGA_PATH, + 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + break; + case EGA_ATI: + rom_init(&ega->bios_rom, BIOS_ATIEGA_PATH, + 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + break; + case EGA_ISKRA: + rom_init_interleaved(&ega->bios_rom, BIOS_ISKRA_PATH, + 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + break; + case EGA_TSENG: + rom_init(&ega->bios_rom, BIOS_TSENG_PATH, + 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + break; } if ((ega->bios_rom.rom[0x3ffe] == 0xaa) && (ega->bios_rom.rom[0x3fff] == 0x55)) { - for (c = 0; c < 0x2000; c++) { - uint8_t temp = ega->bios_rom.rom[c]; - ega->bios_rom.rom[c] = ega->bios_rom.rom[0x3fff - c]; - ega->bios_rom.rom[0x3fff - c] = temp; - } + for (c = 0; c < 0x2000; c++) { + uint8_t temp = ega->bios_rom.rom[c]; + ega->bios_rom.rom[c] = ega->bios_rom.rom[0x3fff - c]; + ega->bios_rom.rom[0x3fff - c] = temp; + } } monitor_type = device_get_config_int("monitor_type"); ega_init(ega, monitor_type, (monitor_type & 0x0F) == 0x0B); ega->vram_limit = device_get_config_int("memory") * 1024; - ega->vrammask = ega->vram_limit - 1; + ega->vrammask = ega->vram_limit - 1; mem_mapping_add(&ega->mapping, 0xa0000, 0x20000, ega_read, NULL, NULL, ega_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, ega); io_sethandler(0x03c0, 0x0020, ega_in, NULL, NULL, ega_out, NULL, NULL, ega); if (info->local == EGA_ATI) { - io_sethandler(0x01ce, 0x0002, ega_in, NULL, NULL, ega_out, NULL, NULL, ega); - ega->eeprom = malloc(sizeof(ati_eeprom_t)); - memset(ega->eeprom, 0, sizeof(ati_eeprom_t)); - ati_eeprom_load((ati_eeprom_t *) ega->eeprom, "egawonder800.nvr", 0); + io_sethandler(0x01ce, 0x0002, ega_in, NULL, NULL, ega_out, NULL, NULL, ega); + ega->eeprom = malloc(sizeof(ati_eeprom_t)); + memset(ega->eeprom, 0, sizeof(ati_eeprom_t)); + ati_eeprom_load((ati_eeprom_t *) ega->eeprom, "egawonder800.nvr", 0); } return ega; } - static int ega_standalone_available(void) { return rom_present(BIOS_IBM_PATH); } - static int cpqega_standalone_available(void) { return rom_present(BIOS_CPQ_PATH); } - static int sega_standalone_available(void) { return rom_present(BIOS_SEGA_PATH); } - static int atiega_standalone_available(void) { return rom_present(BIOS_ATIEGA_PATH); } - static int iskra_ega_standalone_available(void) { return rom_present("roms/video/ega/143-02.bin") && rom_present("roms/video/ega/143-03.bin"); } - static int et2000_standalone_available(void) { return rom_present(BIOS_TSENG_PATH); } - static void ega_close(void *p) { - ega_t *ega = (ega_t *)p; + ega_t *ega = (ega_t *) p; if (ega->eeprom) - free(ega->eeprom); + free(ega->eeprom); free(ega->vram); free(ega); } - static void ega_speed_changed(void *p) { - ega_t *ega = (ega_t *)p; + ega_t *ega = (ega_t *) p; ega_recalctimings(ega); } - /* SW1 SW2 SW3 SW4 OFF OFF ON OFF Monochrome (5151) 1011 0x0B ON OFF OFF ON Color 40x25 (5153) 0110 0x06 @@ -1179,7 +1235,7 @@ ega_speed_changed(void *p) 0 = Switch closed (ON); 1 = Switch open (OFF). */ static const device_config_t ega_config[] = { -// clang-format off + // clang-format off { .name = "memory", .description = "Memory size", @@ -1253,85 +1309,85 @@ static const device_config_t ega_config[] = { }; const device_t ega_device = { - .name = "EGA", + .name = "EGA", .internal_name = "ega", - .flags = DEVICE_ISA, - .local = EGA_IBM, - .init = ega_standalone_init, - .close = ega_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = EGA_IBM, + .init = ega_standalone_init, + .close = ega_close, + .reset = NULL, { .available = ega_standalone_available }, .speed_changed = ega_speed_changed, - .force_redraw = NULL, - .config = ega_config + .force_redraw = NULL, + .config = ega_config }; const device_t cpqega_device = { - .name = "Compaq EGA", + .name = "Compaq EGA", .internal_name = "compaq_ega", - .flags = DEVICE_ISA, - .local = EGA_COMPAQ, - .init = ega_standalone_init, - .close = ega_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = EGA_COMPAQ, + .init = ega_standalone_init, + .close = ega_close, + .reset = NULL, { .available = cpqega_standalone_available }, .speed_changed = ega_speed_changed, - .force_redraw = NULL, - .config = ega_config + .force_redraw = NULL, + .config = ega_config }; const device_t sega_device = { - .name = "SuperEGA", + .name = "SuperEGA", .internal_name = "superega", - .flags = DEVICE_ISA, - .local = EGA_SUPEREGA, - .init = ega_standalone_init, - .close = ega_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = EGA_SUPEREGA, + .init = ega_standalone_init, + .close = ega_close, + .reset = NULL, { .available = sega_standalone_available }, .speed_changed = ega_speed_changed, - .force_redraw = NULL, - .config = ega_config + .force_redraw = NULL, + .config = ega_config }; const device_t atiega_device = { - .name = "ATI EGA Wonder 800+", + .name = "ATI EGA Wonder 800+", .internal_name = "egawonder800", - .flags = DEVICE_ISA, - .local = EGA_ATI, - .init = ega_standalone_init, - .close = ega_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = EGA_ATI, + .init = ega_standalone_init, + .close = ega_close, + .reset = NULL, { .available = atiega_standalone_available }, .speed_changed = ega_speed_changed, - .force_redraw = NULL, - .config = ega_config + .force_redraw = NULL, + .config = ega_config }; const device_t iskra_ega_device = { - .name = "Iskra EGA (Cyrillic ROM)", + .name = "Iskra EGA (Cyrillic ROM)", .internal_name = "iskra_ega", - .flags = DEVICE_ISA, - .local = EGA_ISKRA, - .init = ega_standalone_init, - .close = ega_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = EGA_ISKRA, + .init = ega_standalone_init, + .close = ega_close, + .reset = NULL, { .available = iskra_ega_standalone_available }, .speed_changed = ega_speed_changed, - .force_redraw = NULL, - .config = ega_config + .force_redraw = NULL, + .config = ega_config }; const device_t et2000_device = { - .name = "Tseng Labs ET2000", + .name = "Tseng Labs ET2000", .internal_name = "et2000", - .flags = DEVICE_ISA, - .local = EGA_TSENG, - .init = ega_standalone_init, - .close = ega_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = EGA_TSENG, + .init = ega_standalone_init, + .close = ega_close, + .reset = NULL, { .available = et2000_standalone_available }, .speed_changed = ega_speed_changed, - .force_redraw = NULL, - .config = ega_config + .force_redraw = NULL, + .config = ega_config }; diff --git a/src/video/vid_ega_render.c b/src/video/vid_ega_render.c index b925ab944..a9699dbf9 100644 --- a/src/video/vid_ega_render.c +++ b/src/video/vid_ega_render.c @@ -29,174 +29,172 @@ #include <86box/vid_ega.h> #include <86box/vid_ega_render_remap.h> - int ega_display_line(ega_t *ega) { - int y_add = (enable_overscan) ? (overscan_y >> 1) : 0; - unsigned int dl = ega->displine; + int y_add = (enable_overscan) ? (overscan_y >> 1) : 0; + unsigned int dl = ega->displine; if (ega->crtc[9] & 0x1f) - dl -= (ega->crtc[8] & 0x1f); + dl -= (ega->crtc[8] & 0x1f); dl += y_add; dl &= 0x7ff; return dl; } - void ega_render_blank(ega_t *ega) { int x, xx; if ((ega->displine + ega->y_add) < 0) - return; + return; for (x = 0; x < (ega->hdisp + ega->scrollcache); x++) { - switch (ega->seqregs[1] & 9) { - case 0: - for (xx = 0; xx < 9; xx++) buffer32->line[ega->displine + ega->y_add][ega->x_add + (x * 9) + xx] = 0; - break; - case 1: - for (xx = 0; xx < 8; xx++) buffer32->line[ega->displine + ega->y_add][ega->x_add + (x * 8) + xx] = 0; - break; - case 8: - for (xx = 0; xx < 18; xx++) buffer32->line[ega->displine + ega->y_add][ega->x_add + (x * 18) + xx] = 0; - break; - case 9: - for (xx = 0; xx < 16; xx++) buffer32->line[ega->displine + ega->y_add][ega->x_add + (x * 16) + xx] = 0; - break; - } + switch (ega->seqregs[1] & 9) { + case 0: + for (xx = 0; xx < 9; xx++) + buffer32->line[ega->displine + ega->y_add][ega->x_add + (x * 9) + xx] = 0; + break; + case 1: + for (xx = 0; xx < 8; xx++) + buffer32->line[ega->displine + ega->y_add][ega->x_add + (x * 8) + xx] = 0; + break; + case 8: + for (xx = 0; xx < 18; xx++) + buffer32->line[ega->displine + ega->y_add][ega->x_add + (x * 18) + xx] = 0; + break; + case 9: + for (xx = 0; xx < 16; xx++) + buffer32->line[ega->displine + ega->y_add][ega->x_add + (x * 16) + xx] = 0; + break; + } } } - void ega_render_overscan_left(ega_t *ega) { int i; if ((ega->displine + ega->y_add) < 0) - return; + return; if (ega->scrblank || (ega->hdisp == 0)) - return; + return; for (i = 0; i < ega->x_add; i++) - buffer32->line[ega->displine + ega->y_add][i] = ega->overscan_color; + buffer32->line[ega->displine + ega->y_add][i] = ega->overscan_color; } - void ega_render_overscan_right(ega_t *ega) { int i, right; if ((ega->displine + ega->y_add) < 0) - return; + return; if (ega->scrblank || (ega->hdisp == 0)) - return; + return; right = (overscan_x >> 1) + ega->scrollcache; for (i = 0; i < right; i++) - buffer32->line[ega->displine + ega->y_add][ega->x_add + ega->hdisp + i] = ega->overscan_color; + buffer32->line[ega->displine + ega->y_add][ega->x_add + ega->hdisp + i] = ega->overscan_color; } - void ega_render_text_40(ega_t *ega) { uint32_t *p; - int x, xx; - int drawcursor, xinc; - uint8_t chr, attr, dat; - uint32_t charaddr; - int fg, bg; - uint32_t addr; + int x, xx; + int drawcursor, xinc; + uint8_t chr, attr, dat; + uint32_t charaddr; + int fg, bg; + uint32_t addr; if ((ega->displine + ega->y_add) < 0) - return; + return; if (ega->firstline_draw == 2000) - ega->firstline_draw = ega->displine; + ega->firstline_draw = ega->displine; ega->lastline_draw = ega->displine; if (ega->fullchange) { - p = &buffer32->line[ega->displine + ega->y_add][ega->x_add]; - xinc = (ega->seqregs[1] & 1) ? 16 : 18; + p = &buffer32->line[ega->displine + ega->y_add][ega->x_add]; + xinc = (ega->seqregs[1] & 1) ? 16 : 18; - for (x = 0; x < (ega->hdisp + ega->scrollcache); x += xinc) { - addr = ega->remap_func(ega, ega->ma) & ega->vrammask; + for (x = 0; x < (ega->hdisp + ega->scrollcache); x += xinc) { + addr = ega->remap_func(ega, ega->ma) & ega->vrammask; - drawcursor = ((ega->ma == ega->ca) && ega->con && ega->cursoron); + drawcursor = ((ega->ma == ega->ca) && ega->con && ega->cursoron); - if (ega->crtc[0x17] & 0x80) { - chr = ega->vram[addr]; - attr = ega->vram[addr + 1]; - } else - chr = attr = 0; + if (ega->crtc[0x17] & 0x80) { + chr = ega->vram[addr]; + attr = ega->vram[addr + 1]; + } else + chr = attr = 0; - if (attr & 8) - charaddr = ega->charsetb + ((chr * 0x80)); - else - charaddr = ega->charseta + ((chr * 0x80)); + if (attr & 8) + charaddr = ega->charsetb + ((chr * 0x80)); + else + charaddr = ega->charseta + ((chr * 0x80)); - if (drawcursor) { - bg = ega->pallook[ega->egapal[attr & 0x0f]]; - fg = ega->pallook[ega->egapal[attr >> 4]]; - } else { - fg = ega->pallook[ega->egapal[attr & 0x0f]]; - bg = ega->pallook[ega->egapal[attr >> 4]]; + if (drawcursor) { + bg = ega->pallook[ega->egapal[attr & 0x0f]]; + fg = ega->pallook[ega->egapal[attr >> 4]]; + } else { + fg = ega->pallook[ega->egapal[attr & 0x0f]]; + bg = ega->pallook[ega->egapal[attr >> 4]]; - if ((attr & 0x80) && ega->attrregs[0x10] & 8) { - bg = ega->pallook[ega->egapal[(attr >> 4) & 7]]; - if (ega->blink & 0x10) - fg = bg; - } - } + if ((attr & 0x80) && ega->attrregs[0x10] & 8) { + bg = ega->pallook[ega->egapal[(attr >> 4) & 7]]; + if (ega->blink & 0x10) + fg = bg; + } + } - dat = ega->vram[charaddr + (ega->sc << 2)]; - if (ega->seqregs[1] & 1) { - for (xx = 0; xx < 16; xx += 2) - p[xx] = p[xx + 1] = (dat & (0x80 >> (xx >> 1))) ? fg : bg; - } else { - for (xx = 0; xx < 16; xx += 2) - p[xx] = p[xx + 1] = (dat & (0x80 >> (xx >> 1))) ? fg : bg; - if ((chr & ~0x1f) != 0xc0 || !(ega->attrregs[0x10] & 4)) - p[16] = p[17] = bg; - else - p[16] = p[17] = (dat & 1) ? fg : bg; - } - ega->ma += 4; - p += xinc; - } - ega->ma &= ega->vrammask; + dat = ega->vram[charaddr + (ega->sc << 2)]; + if (ega->seqregs[1] & 1) { + for (xx = 0; xx < 16; xx += 2) + p[xx] = p[xx + 1] = (dat & (0x80 >> (xx >> 1))) ? fg : bg; + } else { + for (xx = 0; xx < 16; xx += 2) + p[xx] = p[xx + 1] = (dat & (0x80 >> (xx >> 1))) ? fg : bg; + if ((chr & ~0x1f) != 0xc0 || !(ega->attrregs[0x10] & 4)) + p[16] = p[17] = bg; + else + p[16] = p[17] = (dat & 1) ? fg : bg; + } + ega->ma += 4; + p += xinc; + } + ega->ma &= ega->vrammask; } } - void ega_render_text_80(ega_t *ega) { uint32_t *p; - int x, xx; - int drawcursor, xinc; - uint8_t chr, attr, dat; - uint32_t charaddr; - int fg, bg; - uint32_t addr; + int x, xx; + int drawcursor, xinc; + uint8_t chr, attr, dat; + uint32_t charaddr; + int fg, bg; + uint32_t addr; if ((ega->displine + ega->y_add) < 0) - return; + return; if (ega->firstline_draw == 2000) - ega->firstline_draw = ega->displine; + ega->firstline_draw = ega->displine; ega->lastline_draw = ega->displine; if (ega->fullchange) { - p = &buffer32->line[ega->displine + ega->y_add][ega->x_add]; + p = &buffer32->line[ega->displine + ega->y_add][ega->x_add]; xinc = (ega->seqregs[1] & 1) ? 8 : 9; for (x = 0; x < (ega->hdisp + ega->scrollcache); x += xinc) { @@ -205,8 +203,8 @@ ega_render_text_80(ega_t *ega) drawcursor = ((ega->ma == ega->ca) && ega->con && ega->cursoron); if (ega->crtc[0x17] & 0x80) { - chr = ega->vram[addr]; - attr = ega->vram[addr + 1]; + chr = ega->vram[addr]; + attr = ega->vram[addr + 1]; } else chr = attr = 0; @@ -229,7 +227,7 @@ ega_render_text_80(ega_t *ega) } dat = ega->vram[charaddr + (ega->sc << 2)]; - if (ega->seqregs[1] & 1) { + if (ega->seqregs[1] & 1) { for (xx = 0; xx < 8; xx++) p[xx] = (dat & (0x80 >> xx)) ? fg : bg; } else { @@ -247,16 +245,15 @@ ega_render_text_80(ega_t *ega) } } - void ega_render_2bpp_lowres(ega_t *ega) { - int x; - uint8_t dat[2]; + int x; + uint8_t dat[2]; uint32_t addr, *p; if ((ega->displine + ega->y_add) < 0) - return; + return; p = &buffer32->line[ega->displine + ega->y_add][ega->x_add]; @@ -277,11 +274,11 @@ ega_render_2bpp_lowres(ega_t *ega) ega->ma &= ega->vrammask; if (ega->crtc[0x17] & 0x80) { - p[0] = p[1] = ega->pallook[ega->egapal[(dat[0] >> 6) & 3]]; - p[2] = p[3] = ega->pallook[ega->egapal[(dat[0] >> 4) & 3]]; - p[4] = p[5] = ega->pallook[ega->egapal[(dat[0] >> 2) & 3]]; - p[6] = p[7] = ega->pallook[ega->egapal[dat[0] & 3]]; - p[8] = p[9] = ega->pallook[ega->egapal[(dat[1] >> 6) & 3]]; + p[0] = p[1] = ega->pallook[ega->egapal[(dat[0] >> 6) & 3]]; + p[2] = p[3] = ega->pallook[ega->egapal[(dat[0] >> 4) & 3]]; + p[4] = p[5] = ega->pallook[ega->egapal[(dat[0] >> 2) & 3]]; + p[6] = p[7] = ega->pallook[ega->egapal[dat[0] & 3]]; + p[8] = p[9] = ega->pallook[ega->egapal[(dat[1] >> 6) & 3]]; p[10] = p[11] = ega->pallook[ega->egapal[(dat[1] >> 4) & 3]]; p[12] = p[13] = ega->pallook[ega->egapal[(dat[1] >> 2) & 3]]; p[14] = p[15] = ega->pallook[ega->egapal[dat[1] & 3]]; @@ -292,16 +289,15 @@ ega_render_2bpp_lowres(ega_t *ega) } } - void ega_render_2bpp_highres(ega_t *ega) { - int x; - uint8_t dat[2]; + int x; + uint8_t dat[2]; uint32_t addr, *p; if ((ega->displine + ega->y_add) < 0) - return; + return; p = &buffer32->line[ega->displine + ega->y_add][ega->x_add]; @@ -337,16 +333,15 @@ ega_render_2bpp_highres(ega_t *ega) } } - void ega_render_4bpp_lowres(ega_t *ega) { - int x, oddeven; - uint8_t dat, edat[4]; + int x, oddeven; + uint8_t dat, edat[4]; uint32_t addr, *p; if ((ega->displine + ega->y_add) < 0) - return; + return; p = &buffer32->line[ega->displine + ega->y_add][ega->x_add]; @@ -355,32 +350,32 @@ ega_render_4bpp_lowres(ega_t *ega) ega->lastline_draw = ega->displine; for (x = 0; x <= (ega->hdisp + ega->scrollcache); x += 16) { - addr = ega->remap_func(ega, ega->ma); + addr = ega->remap_func(ega, ega->ma); oddeven = 0; if (ega->seqregs[1] & 4) { oddeven = (addr & 4) ? 1 : 0; edat[0] = ega->vram[addr | oddeven]; edat[2] = ega->vram[addr | oddeven | 0x2]; - edat[1] = edat[3] = 0; + edat[1] = edat[3] = 0; ega->ma += 2; } else { - *(uint32_t *)(&edat[0]) = *(uint32_t *)(&ega->vram[addr]); + *(uint32_t *) (&edat[0]) = *(uint32_t *) (&ega->vram[addr]); ega->ma += 4; } ega->ma &= ega->vrammask; if (ega->crtc[0x17] & 0x80) { - dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); - p[0] = p[1] = ega->pallook[ega->egapal[(dat >> 4) & ega->plane_mask]]; - p[2] = p[3] = ega->pallook[ega->egapal[dat & ega->plane_mask]]; - dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); - p[4] = p[5] = ega->pallook[ega->egapal[(dat >> 4) & ega->plane_mask]]; - p[6] = p[7] = ega->pallook[ega->egapal[dat & ega->plane_mask]]; - dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); - p[8] = p[9] = ega->pallook[ega->egapal[(dat >> 4) & ega->plane_mask]]; + dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); + p[0] = p[1] = ega->pallook[ega->egapal[(dat >> 4) & ega->plane_mask]]; + p[2] = p[3] = ega->pallook[ega->egapal[dat & ega->plane_mask]]; + dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); + p[4] = p[5] = ega->pallook[ega->egapal[(dat >> 4) & ega->plane_mask]]; + p[6] = p[7] = ega->pallook[ega->egapal[dat & ega->plane_mask]]; + dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); + p[8] = p[9] = ega->pallook[ega->egapal[(dat >> 4) & ega->plane_mask]]; p[10] = p[11] = ega->pallook[ega->egapal[dat & ega->plane_mask]]; - dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); + dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); p[12] = p[13] = ega->pallook[ega->egapal[(dat >> 4) & ega->plane_mask]]; p[14] = p[15] = ega->pallook[ega->egapal[dat & ega->plane_mask]]; } else @@ -390,16 +385,15 @@ ega_render_4bpp_lowres(ega_t *ega) } } - void ega_render_4bpp_highres(ega_t *ega) { - int x, oddeven; - uint8_t dat, edat[4]; + int x, oddeven; + uint8_t dat, edat[4]; uint32_t addr, *p; if ((ega->displine + ega->y_add) < 0) - return; + return; p = &buffer32->line[ega->displine + ega->y_add][ega->x_add]; @@ -408,32 +402,32 @@ ega_render_4bpp_highres(ega_t *ega) ega->lastline_draw = ega->displine; for (x = 0; x <= (ega->hdisp + ega->scrollcache); x += 8) { - addr = ega->remap_func(ega, ega->ma); + addr = ega->remap_func(ega, ega->ma); oddeven = 0; if (ega->seqregs[1] & 4) { oddeven = (addr & 4) ? 1 : 0; edat[0] = ega->vram[addr | oddeven]; edat[2] = ega->vram[addr | oddeven | 0x2]; - edat[1] = edat[3] = 0; + edat[1] = edat[3] = 0; ega->ma += 2; } else { - *(uint32_t *)(&edat[0]) = *(uint32_t *)(&ega->vram[addr]); + *(uint32_t *) (&edat[0]) = *(uint32_t *) (&ega->vram[addr]); ega->ma += 4; } ega->ma &= ega->vrammask; if (ega->crtc[0x17] & 0x80) { - dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); + dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); p[0] = ega->pallook[ega->egapal[(dat >> 4) & ega->plane_mask]]; p[1] = ega->pallook[ega->egapal[dat & ega->plane_mask]]; - dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); + dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); p[2] = ega->pallook[ega->egapal[(dat >> 4) & ega->plane_mask]]; p[3] = ega->pallook[ega->egapal[dat & ega->plane_mask]]; - dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); + dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); p[4] = ega->pallook[ega->egapal[(dat >> 4) & ega->plane_mask]]; p[5] = ega->pallook[ega->egapal[dat & ega->plane_mask]]; - dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); + dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); p[6] = ega->pallook[ega->egapal[(dat >> 4) & ega->plane_mask]]; p[7] = ega->pallook[ega->egapal[dat & ega->plane_mask]]; } else diff --git a/src/video/vid_et4000.c b/src/video/vid_et4000.c index 76e609ee0..bafaeb887 100644 --- a/src/video/vid_et4000.c +++ b/src/video/vid_et4000.c @@ -53,40 +53,44 @@ #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> +#define ET4000_TYPE_ISA 1 /* ISA ET4000AX */ +#define ET4000_TYPE_MCA 2 /* MCA ET4000AX */ +#define ET4000_TYPE_KOREAN 3 /* Korean ET4000 */ +#define ET4000_TYPE_TRIGEM 4 /* Trigem 286M ET4000 */ +#define ET4000_TYPE_KASAN 5 /* Kasan ET4000 */ -#define BIOS_ROM_PATH "roms/video/et4000/ET4000.BIN" -#define KOREAN_BIOS_ROM_PATH "roms/video/et4000/tgkorvga.bin" -#define KOREAN_FONT_ROM_PATH "roms/video/et4000/tg_ksc5601.rom" -#define KASAN_BIOS_ROM_PATH "roms/video/et4000/et4000_kasan16.bin" -#define KASAN_FONT_ROM_PATH "roms/video/et4000/kasan_ksc5601.rom" +#define BIOS_ROM_PATH "roms/video/et4000/ET4000.BIN" +#define KOREAN_BIOS_ROM_PATH "roms/video/et4000/tgkorvga.bin" +#define KOREAN_FONT_ROM_PATH "roms/video/et4000/tg_ksc5601.rom" +#define KASAN_BIOS_ROM_PATH "roms/video/et4000/et4000_kasan16.bin" +#define KASAN_FONT_ROM_PATH "roms/video/et4000/kasan_ksc5601.rom" typedef struct { - const char *name; - int type; + const char *name; + int type; - svga_t svga; + svga_t svga; - uint8_t pos_regs[8]; + uint8_t pos_regs[8]; - rom_t bios_rom; + rom_t bios_rom; - uint8_t banking; - uint32_t vram_size, - vram_mask; + uint8_t banking; + uint32_t vram_size, + vram_mask; - uint8_t port_22cb_val; - uint8_t port_32cb_val; - int get_korean_font_enabled; - int get_korean_font_index; - uint16_t get_korean_font_base; + uint8_t port_22cb_val; + uint8_t port_32cb_val; + int get_korean_font_enabled; + int get_korean_font_index; + uint16_t get_korean_font_base; - uint8_t kasan_cfg_index; - uint8_t kasan_cfg_regs[16]; - uint16_t kasan_access_addr; - uint8_t kasan_font_data[4]; + uint8_t kasan_cfg_index; + uint8_t kasan_cfg_regs[16]; + uint16_t kasan_access_addr; + uint8_t kasan_font_data[4]; } et4000_t; - static const uint8_t crtc_mask[0x40] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, @@ -98,645 +102,638 @@ static const uint8_t crtc_mask[0x40] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; -static video_timings_t timing_et4000_isa = {VIDEO_ISA, 3, 3, 6, 5, 5, 10}; -static video_timings_t timing_et4000_mca = {VIDEO_MCA, 4, 5, 10, 5, 5, 10}; +static video_timings_t timing_et4000_isa = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 5, .read_w = 5, .read_l = 10 }; +static video_timings_t timing_et4000_mca = { .type = VIDEO_MCA, .write_b = 4, .write_w = 5, .write_l = 10, .read_b = 5, .read_w = 5, .read_l = 10 }; -static void et4000_kasan_out(uint16_t addr, uint8_t val, void *p); +static void et4000_kasan_out(uint16_t addr, uint8_t val, void *p); static uint8_t et4000_kasan_in(uint16_t addr, void *p); static uint8_t et4000_in(uint16_t addr, void *priv) { - et4000_t *dev = (et4000_t *)priv; - svga_t *svga = &dev->svga; + et4000_t *dev = (et4000_t *) priv; + svga_t *svga = &dev->svga; - if (((addr & 0xfff0) == 0x3d0 || - (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60; + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; switch (addr) { - case 0x3c2: - if (dev->type == 1) { - if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x4e) - return 0; - else - return 0x10; - } - break; + case 0x3c2: + if (dev->type == ET4000_TYPE_MCA) { + if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x4e) + return 0; + else + return 0x10; + } + break; - case 0x3c5: - if ((svga->seqaddr & 0xf) == 7) - return svga->seqregs[svga->seqaddr & 0xf] | 4; - break; + case 0x3c5: + if ((svga->seqaddr & 0xf) == 7) + return svga->seqregs[svga->seqaddr & 0xf] | 4; + break; - case 0x3c6: - case 0x3c7: - case 0x3c8: - case 0x3c9: - return sc1502x_ramdac_in(addr, svga->ramdac, svga); + case 0x3c6: + case 0x3c7: + case 0x3c8: + case 0x3c9: + return sc1502x_ramdac_in(addr, svga->ramdac, svga); - case 0x3cd: /*Banking*/ - return dev->banking; + case 0x3cd: /*Banking*/ + return dev->banking; - case 0x3d4: - return svga->crtcreg; + case 0x3d4: + return svga->crtcreg; - case 0x3d5: - return svga->crtc[svga->crtcreg]; + case 0x3d5: + return svga->crtc[svga->crtcreg]; } return svga_in(addr, svga); } - static uint8_t et4000k_in(uint16_t addr, void *priv) { - et4000_t *dev = (et4000_t *)priv; - uint8_t val = 0xff; + et4000_t *dev = (et4000_t *) priv; + uint8_t val = 0xff; switch (addr) { - case 0x22cb: - return dev->port_22cb_val; + case 0x22cb: + return dev->port_22cb_val; - case 0x22cf: - val = 0; - switch(dev->get_korean_font_enabled) { - case 3: - if ((dev->port_32cb_val & 0x30) == 0x30) { - val = fontdatksc5601[dev->get_korean_font_base].chr[dev->get_korean_font_index++]; - dev->get_korean_font_index &= 0x1f; - } else - if ((dev->port_32cb_val & 0x30) == 0x20 && - (dev->get_korean_font_base & 0x7f) > 0x20 && - (dev->get_korean_font_base & 0x7f) < 0x7f) { - switch(dev->get_korean_font_base & 0x3f80) { - case 0x2480: - if (dev->get_korean_font_index < 16) - val = fontdatksc5601_user[(dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index]; - else - if (dev->get_korean_font_index >= 24 && dev->get_korean_font_index < 40) - val = fontdatksc5601_user[(dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index - 8]; - break; + case 0x22cf: + val = 0; + switch (dev->get_korean_font_enabled) { + case 3: + if ((dev->port_32cb_val & 0x30) == 0x30) { + val = fontdatksc5601[dev->get_korean_font_base].chr[dev->get_korean_font_index++]; + dev->get_korean_font_index &= 0x1f; + } else if ((dev->port_32cb_val & 0x30) == 0x20 && (dev->get_korean_font_base & 0x7f) > 0x20 && (dev->get_korean_font_base & 0x7f) < 0x7f) { + switch (dev->get_korean_font_base & 0x3f80) { + case 0x2480: + if (dev->get_korean_font_index < 16) + val = fontdatksc5601_user[(dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index]; + else if (dev->get_korean_font_index >= 24 && dev->get_korean_font_index < 40) + val = fontdatksc5601_user[(dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index - 8]; + break; - case 0x3f00: - if (dev->get_korean_font_index < 16) - val = fontdatksc5601_user[96 + (dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index]; - else - if (dev->get_korean_font_index >= 24 && dev->get_korean_font_index < 40) - val = fontdatksc5601_user[96 + (dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index - 8]; - break; + case 0x3f00: + if (dev->get_korean_font_index < 16) + val = fontdatksc5601_user[96 + (dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index]; + else if (dev->get_korean_font_index >= 24 && dev->get_korean_font_index < 40) + val = fontdatksc5601_user[96 + (dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index - 8]; + break; - default: - break; - } - dev->get_korean_font_index++; - dev->get_korean_font_index %= 72; - } - break; + default: + break; + } + dev->get_korean_font_index++; + dev->get_korean_font_index %= 72; + } + break; - case 4: - val = 0x0f; - break; + case 4: + val = 0x0f; + break; - default: - break; - } - return val; + default: + break; + } + return val; - case 0x32cb: - return dev->port_32cb_val; + case 0x32cb: + return dev->port_32cb_val; - default: - return et4000_in(addr, priv); + default: + return et4000_in(addr, priv); } } - static void et4000_out(uint16_t addr, uint8_t val, void *priv) { - et4000_t *dev = (et4000_t *)priv; - svga_t *svga = &dev->svga; - uint8_t old; + et4000_t *dev = (et4000_t *) priv; + svga_t *svga = &dev->svga; + uint8_t old; - if (((addr & 0xfff0) == 0x3d0 || - (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60; + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; switch (addr) { - case 0x3c6: - case 0x3c7: - case 0x3c8: - case 0x3c9: - sc1502x_ramdac_out(addr, val, svga->ramdac, svga); - return; + case 0x3c6: + case 0x3c7: + case 0x3c8: + case 0x3c9: + sc1502x_ramdac_out(addr, val, svga->ramdac, svga); + return; - case 0x3cd: /*Banking*/ - if (!(svga->crtc[0x36] & 0x10) && !(svga->gdcreg[6] & 0x08)) { - svga->write_bank = (val & 0xf) * 0x10000; - svga->read_bank = ((val >> 4) & 0xf) * 0x10000; - } - dev->banking = val; - return; + case 0x3cd: /*Banking*/ + if (!(svga->crtc[0x36] & 0x10) && !(svga->gdcreg[6] & 0x08)) { + svga->write_bank = (val & 0xf) * 0x10000; + svga->read_bank = ((val >> 4) & 0xf) * 0x10000; + } + dev->banking = val; + return; - case 0x3cf: - if ((svga->gdcaddr & 15) == 6) { - if (!(svga->crtc[0x36] & 0x10) && !(val & 0x08)) { - svga->write_bank = (dev->banking & 0x0f) * 0x10000; - svga->read_bank = ((dev->banking >> 4) & 0x0f) * 0x10000; - } else - svga->write_bank = svga->read_bank = 0; + case 0x3cf: + if ((svga->gdcaddr & 15) == 6) { + if (!(svga->crtc[0x36] & 0x10) && !(val & 0x08)) { + svga->write_bank = (dev->banking & 0x0f) * 0x10000; + svga->read_bank = ((dev->banking >> 4) & 0x0f) * 0x10000; + } else + svga->write_bank = svga->read_bank = 0; - old = svga->gdcreg[6]; - svga_out(addr, val, svga); - if ((old & 0xc) != 0 && (val & 0xc) == 0) - { - /*override mask - ET4000 supports linear 128k at A0000*/ - svga->banked_mask = 0x1ffff; - } - return; - } - break; + old = svga->gdcreg[6]; + svga_out(addr, val, svga); + if ((old & 0xc) != 0 && (val & 0xc) == 0) { + /*override mask - ET4000 supports linear 128k at A0000*/ + svga->banked_mask = 0x1ffff; + } + return; + } + break; - case 0x3d4: - svga->crtcreg = val & 0x3f; - return; + case 0x3d4: + svga->crtcreg = val & 0x3f; + return; - case 0x3d5: - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 0x35) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - old = svga->crtc[svga->crtcreg]; - val &= crtc_mask[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; + case 0x3d5: + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 0x35) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + old = svga->crtc[svga->crtcreg]; + val &= crtc_mask[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; - if (svga->crtcreg == 0x36) { - if (!(val & 0x10) && !(svga->gdcreg[6] & 0x08)) { - svga->write_bank = (dev->banking & 0x0f) * 0x10000; - svga->read_bank = ((dev->banking >> 4) & 0x0f) * 0x10000; - } else - svga->write_bank = svga->read_bank = 0; - } + if (svga->crtcreg == 0x36) { + if (!(val & 0x10) && !(svga->gdcreg[6] & 0x08)) { + svga->write_bank = (dev->banking & 0x0f) * 0x10000; + svga->read_bank = ((dev->banking >> 4) & 0x0f) * 0x10000; + } else + svga->write_bank = svga->read_bank = 0; + } - if (old != val) { - if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) - { - if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - } - } - break; + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + } + } + break; } svga_out(addr, val, svga); } - static void et4000k_out(uint16_t addr, uint8_t val, void *priv) { - et4000_t *dev = (et4000_t *)priv; + et4000_t *dev = (et4000_t *) priv; switch (addr) { - case 0x22cb: - dev->port_22cb_val = (dev->port_22cb_val & 0xf0) | (val & 0x0f); - dev->get_korean_font_enabled = val & 7; - if (dev->get_korean_font_enabled == 3) - dev->get_korean_font_index = 0; - break; + case 0x22cb: + dev->port_22cb_val = (dev->port_22cb_val & 0xf0) | (val & 0x0f); + dev->get_korean_font_enabled = val & 7; + if (dev->get_korean_font_enabled == 3) + dev->get_korean_font_index = 0; + break; - case 0x22cf: - switch(dev->get_korean_font_enabled) { - case 1: - dev->get_korean_font_base = ((val & 0x7f) << 7) | (dev->get_korean_font_base & 0x7f); - break; + case 0x22cf: + switch (dev->get_korean_font_enabled) { + case 1: + dev->get_korean_font_base = ((val & 0x7f) << 7) | (dev->get_korean_font_base & 0x7f); + break; - case 2: - dev->get_korean_font_base = (dev->get_korean_font_base & 0x3f80) | (val & 0x7f) | (((val ^ 0x80) & 0x80) << 8); - break; + case 2: + dev->get_korean_font_base = (dev->get_korean_font_base & 0x3f80) | (val & 0x7f) | (((val ^ 0x80) & 0x80) << 8); + break; - case 3: - if ((dev->port_32cb_val & 0x30) == 0x20 && - (dev->get_korean_font_base & 0x7f) > 0x20 && - (dev->get_korean_font_base & 0x7f) < 0x7f) { - switch (dev->get_korean_font_base & 0x3f80) { - case 0x2480: - if (dev->get_korean_font_index < 16) - fontdatksc5601_user[(dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index] = val; - else - if (dev->get_korean_font_index >= 24 && dev->get_korean_font_index < 40) - fontdatksc5601_user[(dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index - 8] = val; - break; + case 3: + if ((dev->port_32cb_val & 0x30) == 0x20 && (dev->get_korean_font_base & 0x7f) > 0x20 && (dev->get_korean_font_base & 0x7f) < 0x7f) { + switch (dev->get_korean_font_base & 0x3f80) { + case 0x2480: + if (dev->get_korean_font_index < 16) + fontdatksc5601_user[(dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index] = val; + else if (dev->get_korean_font_index >= 24 && dev->get_korean_font_index < 40) + fontdatksc5601_user[(dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index - 8] = val; + break; - case 0x3f00: - if (dev->get_korean_font_index < 16) - fontdatksc5601_user[96 + (dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index] = val; - else - if (dev->get_korean_font_index >= 24 && dev->get_korean_font_index < 40) - fontdatksc5601_user[96 + (dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index - 8] = val; - break; + case 0x3f00: + if (dev->get_korean_font_index < 16) + fontdatksc5601_user[96 + (dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index] = val; + else if (dev->get_korean_font_index >= 24 && dev->get_korean_font_index < 40) + fontdatksc5601_user[96 + (dev->get_korean_font_base & 0x7f) - 0x20].chr[dev->get_korean_font_index - 8] = val; + break; - default: - break; - } - dev->get_korean_font_index++; - } - break; + default: + break; + } + dev->get_korean_font_index++; + } + break; - default: - break; - } - break; + default: + break; + } + break; - case 0x32cb: - dev->port_32cb_val = val; - svga_recalctimings(&dev->svga); - break; + case 0x32cb: + dev->port_32cb_val = val; + svga_recalctimings(&dev->svga); + break; - default: - et4000_out(addr, val, priv); - break; + default: + et4000_out(addr, val, priv); + break; } } static uint8_t et4000_kasan_in(uint16_t addr, void *priv) { - et4000_t *et4000 = (et4000_t *)priv; - uint8_t val = 0xFF; + et4000_t *et4000 = (et4000_t *) priv; + uint8_t val = 0xFF; - if (addr == 0x258) { - val = et4000->kasan_cfg_index; - } else if (addr == 0x259) { - if (et4000->kasan_cfg_index >= 0xF0) { - val = et4000->kasan_cfg_regs[et4000->kasan_cfg_index - 0xF0]; - if (et4000->kasan_cfg_index == 0xF4 && et4000->kasan_cfg_regs[0] & 0x20) - val |= 0x80; - } - } else if (addr >= et4000->kasan_access_addr && addr < et4000->kasan_access_addr + 8) { - switch (addr - ((et4000->kasan_cfg_regs[2] << 8) | (et4000->kasan_cfg_regs[1]))) { - case 2: - val = 0; - break; - case 5: - if (((et4000->get_korean_font_base >> 7) & 0x7F) == (et4000->svga.ksc5601_udc_area_msb[0] & 0x7F) && (et4000->svga.ksc5601_udc_area_msb[0] & 0x80)) - val = fontdatksc5601_user[(et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index]; - else if (((et4000->get_korean_font_base >> 7) & 0x7F) == (et4000->svga.ksc5601_udc_area_msb[1] & 0x7F) && (et4000->svga.ksc5601_udc_area_msb[1] & 0x80)) - val = fontdatksc5601_user[96 + (et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index]; - else - val = fontdatksc5601[et4000->get_korean_font_base].chr[et4000->get_korean_font_index]; - break; - default: - break; - } - } else - val = et4000_in(addr, priv); + if (addr == 0x258) { + val = et4000->kasan_cfg_index; + } else if (addr == 0x259) { + if (et4000->kasan_cfg_index >= 0xF0) { + val = et4000->kasan_cfg_regs[et4000->kasan_cfg_index - 0xF0]; + if (et4000->kasan_cfg_index == 0xF4 && et4000->kasan_cfg_regs[0] & 0x20) + val |= 0x80; + } + } else if (addr >= et4000->kasan_access_addr && addr < et4000->kasan_access_addr + 8) { + switch (addr - ((et4000->kasan_cfg_regs[2] << 8) | (et4000->kasan_cfg_regs[1]))) { + case 2: + val = 0; + break; + case 5: + if (((et4000->get_korean_font_base >> 7) & 0x7F) == (et4000->svga.ksc5601_udc_area_msb[0] & 0x7F) && (et4000->svga.ksc5601_udc_area_msb[0] & 0x80)) + val = fontdatksc5601_user[(et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index]; + else if (((et4000->get_korean_font_base >> 7) & 0x7F) == (et4000->svga.ksc5601_udc_area_msb[1] & 0x7F) && (et4000->svga.ksc5601_udc_area_msb[1] & 0x80)) + val = fontdatksc5601_user[96 + (et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index]; + else + val = fontdatksc5601[et4000->get_korean_font_base].chr[et4000->get_korean_font_index]; + break; + default: + break; + } + } else + val = et4000_in(addr, priv); - return val; + return val; } static void et4000_kasan_out(uint16_t addr, uint8_t val, void *priv) { - et4000_t *et4000 = (et4000_t *)priv; + et4000_t *et4000 = (et4000_t *) priv; - if (addr == 0x258) { - et4000->kasan_cfg_index = val; - } else if (addr == 0x259) { - if (et4000->kasan_cfg_index >= 0xF0) { - switch (et4000->kasan_cfg_index - 0xF0) { - case 0: - if (et4000->kasan_cfg_regs[4] & 8) - val = (val & 0xFC) | (et4000->kasan_cfg_regs[0] & 3); - et4000->kasan_cfg_regs[0] = val; - svga_recalctimings(&et4000->svga); - break; - case 1: - case 2: - et4000->kasan_cfg_regs[et4000->kasan_cfg_index - 0xF0] = val; - io_removehandler(et4000->kasan_access_addr, 0x0008, et4000_kasan_in, NULL, NULL, et4000_kasan_out, NULL, NULL, et4000); - et4000->kasan_access_addr = (et4000->kasan_cfg_regs[2] << 8) | et4000->kasan_cfg_regs[1]; - io_sethandler(et4000->kasan_access_addr, 0x0008, et4000_kasan_in, NULL, NULL, et4000_kasan_out, NULL, NULL, et4000); - break; - case 4: - if (et4000->kasan_cfg_regs[0] & 0x20) - val |= 0x80; - et4000->svga.ksc5601_swap_mode = (val & 4) >> 2; - et4000->kasan_cfg_regs[4] = val; - svga_recalctimings(&et4000->svga); - break; - case 5: - et4000->kasan_cfg_regs[5] = val; - et4000->svga.ksc5601_english_font_type = 0x100 | val; - case 6: - case 7: - et4000->svga.ksc5601_udc_area_msb[et4000->kasan_cfg_index - 0xF6] = val; - default: - et4000->kasan_cfg_regs[et4000->kasan_cfg_index - 0xF0] = val; - svga_recalctimings(&et4000->svga); - break; - } - } - } else if (addr >= et4000->kasan_access_addr && addr < et4000->kasan_access_addr + 8) { - switch (addr - ((et4000->kasan_cfg_regs[2] << 8) | (et4000->kasan_cfg_regs[1]))) { - case 0: - if (et4000->kasan_cfg_regs[0] & 2) { - et4000->get_korean_font_index = ((val & 1) << 4) | ((val & 0x1E) >> 1); - et4000->get_korean_font_base = (et4000->get_korean_font_base & ~7) | (val >> 5); - } - break; - case 1: - if (et4000->kasan_cfg_regs[0] & 2) - et4000->get_korean_font_base = (et4000->get_korean_font_base & ~0x7F8) | (val << 3); - break; - case 2: - if (et4000->kasan_cfg_regs[0] & 2) - et4000->get_korean_font_base = (et4000->get_korean_font_base & ~0x7F800) | ((val & 7) << 11); - break; - case 3: - case 4: - case 5: - if (et4000->kasan_cfg_regs[0] & 1) - et4000->kasan_font_data[addr - (((et4000->kasan_cfg_regs[2] << 8) | (et4000->kasan_cfg_regs[1])) + 3)] = val; - break; - case 6: - if ((et4000->kasan_cfg_regs[0] & 1) && (et4000->kasan_font_data[3] & !(val & 0x80)) && (et4000->get_korean_font_base & 0x7F) >= 0x20 && (et4000->get_korean_font_base & 0x7F) < 0x7F) { - if (((et4000->get_korean_font_base >> 7) & 0x7F) == (et4000->svga.ksc5601_udc_area_msb[0] & 0x7F) && (et4000->svga.ksc5601_udc_area_msb[0] & 0x80)) - fontdatksc5601_user[(et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index] = et4000->kasan_font_data[2]; - else if (((et4000->get_korean_font_base >> 7) & 0x7F) == (et4000->svga.ksc5601_udc_area_msb[1] & 0x7F) && (et4000->svga.ksc5601_udc_area_msb[1] & 0x80)) - fontdatksc5601_user[96 + (et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index] = et4000->kasan_font_data[2]; - } - et4000->kasan_font_data[3] = val; - break; - default: - break; - } - } else - et4000_out(addr, val, priv); + if (addr == 0x258) { + et4000->kasan_cfg_index = val; + } else if (addr == 0x259) { + if (et4000->kasan_cfg_index >= 0xF0) { + switch (et4000->kasan_cfg_index - 0xF0) { + case 0: + if (et4000->kasan_cfg_regs[4] & 8) + val = (val & 0xFC) | (et4000->kasan_cfg_regs[0] & 3); + et4000->kasan_cfg_regs[0] = val; + svga_recalctimings(&et4000->svga); + break; + case 1: + case 2: + et4000->kasan_cfg_regs[et4000->kasan_cfg_index - 0xF0] = val; + io_removehandler(et4000->kasan_access_addr, 0x0008, et4000_kasan_in, NULL, NULL, et4000_kasan_out, NULL, NULL, et4000); + et4000->kasan_access_addr = (et4000->kasan_cfg_regs[2] << 8) | et4000->kasan_cfg_regs[1]; + io_sethandler(et4000->kasan_access_addr, 0x0008, et4000_kasan_in, NULL, NULL, et4000_kasan_out, NULL, NULL, et4000); + break; + case 4: + if (et4000->kasan_cfg_regs[0] & 0x20) + val |= 0x80; + et4000->svga.ksc5601_swap_mode = (val & 4) >> 2; + et4000->kasan_cfg_regs[4] = val; + svga_recalctimings(&et4000->svga); + break; + case 5: + et4000->kasan_cfg_regs[5] = val; + et4000->svga.ksc5601_english_font_type = 0x100 | val; + case 6: + case 7: + et4000->svga.ksc5601_udc_area_msb[et4000->kasan_cfg_index - 0xF6] = val; + default: + et4000->kasan_cfg_regs[et4000->kasan_cfg_index - 0xF0] = val; + svga_recalctimings(&et4000->svga); + break; + } + } + } else if (addr >= et4000->kasan_access_addr && addr < et4000->kasan_access_addr + 8) { + switch (addr - ((et4000->kasan_cfg_regs[2] << 8) | (et4000->kasan_cfg_regs[1]))) { + case 0: + if (et4000->kasan_cfg_regs[0] & 2) { + et4000->get_korean_font_index = ((val & 1) << 4) | ((val & 0x1E) >> 1); + et4000->get_korean_font_base = (et4000->get_korean_font_base & ~7) | (val >> 5); + } + break; + case 1: + if (et4000->kasan_cfg_regs[0] & 2) + et4000->get_korean_font_base = (et4000->get_korean_font_base & ~0x7F8) | (val << 3); + break; + case 2: + if (et4000->kasan_cfg_regs[0] & 2) + et4000->get_korean_font_base = (et4000->get_korean_font_base & ~0x7F800) | ((val & 7) << 11); + break; + case 3: + case 4: + case 5: + if (et4000->kasan_cfg_regs[0] & 1) { + et4000->kasan_font_data[addr - (((et4000->kasan_cfg_regs[2] << 8) | (et4000->kasan_cfg_regs[1])) + 3)] = val; + } + break; + case 6: + if ((et4000->kasan_cfg_regs[0] & 1) && (et4000->kasan_font_data[3] & !(val & 0x80)) && (et4000->get_korean_font_base & 0x7F) >= 0x20 && (et4000->get_korean_font_base & 0x7F) < 0x7F) { + if (((et4000->get_korean_font_base >> 7) & 0x7F) == (et4000->svga.ksc5601_udc_area_msb[0] & 0x7F) && (et4000->svga.ksc5601_udc_area_msb[0] & 0x80)) + fontdatksc5601_user[(et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index] = et4000->kasan_font_data[2]; + else if (((et4000->get_korean_font_base >> 7) & 0x7F) == (et4000->svga.ksc5601_udc_area_msb[1] & 0x7F) && (et4000->svga.ksc5601_udc_area_msb[1] & 0x80)) + fontdatksc5601_user[96 + (et4000->get_korean_font_base & 0x7F) - 0x20].chr[et4000->get_korean_font_index] = et4000->kasan_font_data[2]; + } + et4000->kasan_font_data[3] = val; + break; + default: + break; + } + } else + et4000_out(addr, val, priv); } uint32_t get_et4000_addr(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - uint32_t nbank; + svga_t *svga = (svga_t *) p; + uint32_t nbank; - switch (svga->crtc[0x37] & 0x0B) { - case 0x00: - case 0x01: - nbank = 0; - addr &= 0xFFFF; - break; - case 0x02: - nbank = (addr & 1) << 1; - addr = (addr >> 1) & 0xFFFF; - break; - case 0x03: - nbank = addr & 3; - addr = (addr >> 2) & 0xFFFF; - break; - case 0x08: - case 0x09: - nbank = 0; - addr &= 0x3FFFF; - break; - case 0x0A: - nbank = (addr & 1) << 1; - addr = (addr >> 1) & 0x3FFFF; - break; - case 0x0B: - nbank = addr & 3; - addr = (addr >> 2) & 0x3FFFF; - break; - default: - nbank = 0; - break; - } + switch (svga->crtc[0x37] & 0x0B) { + case 0x00: + case 0x01: + nbank = 0; + addr &= 0xFFFF; + break; + case 0x02: + nbank = (addr & 1) << 1; + addr = (addr >> 1) & 0xFFFF; + break; + case 0x03: + nbank = addr & 3; + addr = (addr >> 2) & 0xFFFF; + break; + case 0x08: + case 0x09: + nbank = 0; + addr &= 0x3FFFF; + break; + case 0x0A: + nbank = (addr & 1) << 1; + addr = (addr >> 1) & 0x3FFFF; + break; + case 0x0B: + nbank = addr & 3; + addr = (addr >> 2) & 0x3FFFF; + break; + default: + nbank = 0; + break; + } - if (svga->vram_max >= 1024 * 1024) { - addr = (addr << 2) | (nbank & 3); - if ((svga->crtc[0x37] & 3) == 2) - addr >>= 1; - else if ((svga->crtc[0x37] & 3) < 2) - addr >>= 2; - } else if (svga->vram_max >= 512 * 1024) { - addr = (addr << 1) | ((nbank & 2) >> 1) | ((nbank & 1) << 19); - if ((svga->crtc[0x37] & 3) < 2) - addr >>= 1; - } else if(svga->vram_max >= 256 * 1024) - addr = addr | (nbank << 18); - else if (svga->vram_max > 128 * 1024) { - addr = (addr << 1) | ((nbank & 2) >> 1) | ((nbank & 1) << 17); - if ((svga->crtc[0x37] & 3) < 2) - addr >>= 1; - } else - addr = addr | (nbank << 16); + if (svga->vram_max >= 1024 * 1024) { + addr = (addr << 2) | (nbank & 3); + if ((svga->crtc[0x37] & 3) == 2) + addr >>= 1; + else if ((svga->crtc[0x37] & 3) < 2) + addr >>= 2; + } else if (svga->vram_max >= 512 * 1024) { + addr = (addr << 1) | ((nbank & 2) >> 1) | ((nbank & 1) << 19); + if ((svga->crtc[0x37] & 3) < 2) + addr >>= 1; + } else if (svga->vram_max >= 256 * 1024) + addr = addr | (nbank << 18); + else if (svga->vram_max > 128 * 1024) { + addr = (addr << 1) | ((nbank & 2) >> 1) | ((nbank & 1) << 17); + if ((svga->crtc[0x37] & 3) < 2) + addr >>= 1; + } else + addr = addr | (nbank << 16); - return addr; + return addr; } static void et4000_recalctimings(svga_t *svga) { - et4000_t *dev = (et4000_t *)svga->p; + et4000_t *dev = (et4000_t *) svga->p; - svga->ma_latch |= (svga->crtc[0x33] & 3) << 16; - if (svga->crtc[0x35] & 1) svga->vblankstart += 0x400; - if (svga->crtc[0x35] & 2) svga->vtotal += 0x400; - if (svga->crtc[0x35] & 4) svga->dispend += 0x400; - if (svga->crtc[0x35] & 8) svga->vsyncstart += 0x400; - if (svga->crtc[0x35] & 0x10) svga->split += 0x400; - if (!svga->rowoffset) svga->rowoffset = 0x100; - if (svga->crtc[0x3f] & 1) svga->htotal += 256; - if (svga->attrregs[0x16] & 0x20) svga->hdisp <<= 1; + svga->ma_latch |= (svga->crtc[0x33] & 3) << 16; + if (svga->crtc[0x35] & 1) + svga->vblankstart += 0x400; + if (svga->crtc[0x35] & 2) + svga->vtotal += 0x400; + if (svga->crtc[0x35] & 4) + svga->dispend += 0x400; + if (svga->crtc[0x35] & 8) + svga->vsyncstart += 0x400; + if (svga->crtc[0x35] & 0x10) + svga->split += 0x400; + if (!svga->rowoffset) + svga->rowoffset = 0x100; + if (svga->crtc[0x3f] & 1) + svga->htotal += 256; + if (svga->attrregs[0x16] & 0x20) + svga->hdisp <<= 1; - switch (((svga->miscout >> 2) & 3) | ((svga->crtc[0x34] << 1) & 4)) { - case 0: - case 1: - break; - case 3: - svga->clock = (cpuclock * (double)(1ull << 32)) / 40000000.0; - break; - case 5: - svga->clock = (cpuclock * (double)(1ull << 32)) / 65000000.0; - break; - default: - svga->clock = (cpuclock * (double)(1ull << 32)) / 36000000.0; - break; - } + switch (((svga->miscout >> 2) & 3) | ((svga->crtc[0x34] << 1) & 4)) { + case 0: + case 1: + break; + case 3: + svga->clock = (cpuclock * (double) (1ull << 32)) / 40000000.0; + break; + case 5: + svga->clock = (cpuclock * (double) (1ull << 32)) / 65000000.0; + break; + default: + svga->clock = (cpuclock * (double) (1ull << 32)) / 36000000.0; + break; + } - switch (svga->bpp) { - case 15: - case 16: - svga->hdisp /= 2; - break; + switch (svga->bpp) { + case 15: + case 16: + svga->hdisp /= 2; + break; - case 24: - svga->hdisp /= 3; - break; - } + case 24: + svga->hdisp /= 3; + break; + } - if (dev->type == 2 || dev->type == 3 || dev->type == 4) { - if ((svga->render == svga_render_text_80) && ((svga->crtc[0x37] & 0x0A) == 0x0A)) { - if (dev->port_32cb_val & 0x80) { - svga->ma_latch -= 2; - svga->ca_adj = -2; - } - if ((dev->port_32cb_val & 0xB4) == ((svga->crtc[0x37] & 3) == 2 ? 0xB4 : 0xB0)) { - svga->render = svga_render_text_80_ksc5601; - } - } - } + if (dev->type == ET4000_TYPE_KOREAN || dev->type == ET4000_TYPE_TRIGEM || dev->type == ET4000_TYPE_KASAN) { + if ((svga->render == svga_render_text_80) && ((svga->crtc[0x37] & 0x0A) == 0x0A)) { + if (dev->port_32cb_val & 0x80) { + svga->ma_latch -= 2; + svga->ca_adj = -2; + } + if ((dev->port_32cb_val & 0xB4) == ((svga->crtc[0x37] & 3) == 2 ? 0xB4 : 0xB0)) { + svga->render = svga_render_text_80_ksc5601; + } + } + } } static void et4000_kasan_recalctimings(svga_t *svga) { - et4000_t *et4000 = (et4000_t *)svga->p; + et4000_t *et4000 = (et4000_t *) svga->p; - et4000_recalctimings(svga); + et4000_recalctimings(svga); - if (svga->render == svga_render_text_80 && (et4000->kasan_cfg_regs[0] & 8)) { - svga->ma_latch -= 3; - svga->ca_adj = (et4000->kasan_cfg_regs[0] >> 6) - 3; - svga->ksc5601_sbyte_mask = (et4000->kasan_cfg_regs[0] & 4) << 5; - if((et4000->kasan_cfg_regs[0] & 0x23) == 0x20 && (et4000->kasan_cfg_regs[4] & 0x80) && ((svga->crtc[0x37] & 0x0B) == 0x0A)) - svga->render = svga_render_text_80_ksc5601; - } + if (svga->render == svga_render_text_80 && (et4000->kasan_cfg_regs[0] & 8)) { + svga->ma_latch -= 3; + svga->ca_adj = (et4000->kasan_cfg_regs[0] >> 6) - 3; + svga->ksc5601_sbyte_mask = (et4000->kasan_cfg_regs[0] & 4) << 5; + if ((et4000->kasan_cfg_regs[0] & 0x23) == 0x20 && (et4000->kasan_cfg_regs[4] & 0x80) && ((svga->crtc[0x37] & 0x0B) == 0x0A)) + svga->render = svga_render_text_80_ksc5601; + } } static uint8_t et4000_mca_read(int port, void *priv) { - et4000_t *et4000 = (et4000_t *)priv; + et4000_t *et4000 = (et4000_t *) priv; - return(et4000->pos_regs[port & 7]); + return (et4000->pos_regs[port & 7]); } - static void et4000_mca_write(int port, uint8_t val, void *priv) { - et4000_t *et4000 = (et4000_t *)priv; + et4000_t *et4000 = (et4000_t *) priv; /* MCA does not write registers below 0x0100. */ - if (port < 0x0102) return; + if (port < 0x0102) + return; /* Save the MCA register value. */ et4000->pos_regs[port & 7] = val; } - static uint8_t et4000_mca_feedb(void *priv) { return 1; } - static void * et4000_init(const device_t *info) { const char *fn; - et4000_t *dev; - int i; + et4000_t *dev; + int i; - dev = (et4000_t *)malloc(sizeof(et4000_t)); + dev = (et4000_t *) malloc(sizeof(et4000_t)); memset(dev, 0x00, sizeof(et4000_t)); dev->name = info->name; dev->type = info->local; - fn = BIOS_ROM_PATH; + fn = BIOS_ROM_PATH; - switch(dev->type) { - case 0: /* ISA ET4000AX */ - dev->vram_size = device_get_config_int("memory") << 10; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000_isa); - svga_init(info, &dev->svga, dev, dev->vram_size, - et4000_recalctimings, et4000_in, et4000_out, - NULL, NULL); - io_sethandler(0x03c0, 32, - et4000_in,NULL,NULL, et4000_out,NULL,NULL, dev); - break; + switch (dev->type) { + case ET4000_TYPE_ISA: /* ISA ET4000AX */ + dev->vram_size = device_get_config_int("memory") << 10; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000_isa); + svga_init(info, &dev->svga, dev, dev->vram_size, + et4000_recalctimings, et4000_in, et4000_out, + NULL, NULL); + io_sethandler(0x03c0, 32, + et4000_in, NULL, NULL, et4000_out, NULL, NULL, dev); + break; - case 1: /* MCA ET4000AX */ - dev->vram_size = 1024 << 10; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000_mca); - svga_init(info, &dev->svga, dev, dev->vram_size, - et4000_recalctimings, et4000_in, et4000_out, - NULL, NULL); - io_sethandler(0x03c0, 32, - et4000_in,NULL,NULL, et4000_out,NULL,NULL, dev); - dev->pos_regs[0] = 0xf2; /* ET4000 MCA board ID */ - dev->pos_regs[1] = 0x80; - mca_add(et4000_mca_read, et4000_mca_write, et4000_mca_feedb, NULL, dev); - break; + case ET4000_TYPE_MCA: /* MCA ET4000AX */ + dev->vram_size = 1024 << 10; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000_mca); + svga_init(info, &dev->svga, dev, dev->vram_size, + et4000_recalctimings, et4000_in, et4000_out, + NULL, NULL); + io_sethandler(0x03c0, 32, + et4000_in, NULL, NULL, et4000_out, NULL, NULL, dev); + dev->pos_regs[0] = 0xf2; /* ET4000 MCA board ID */ + dev->pos_regs[1] = 0x80; + mca_add(et4000_mca_read, et4000_mca_write, et4000_mca_feedb, NULL, dev); + break; - case 2: /* Korean ET4000 */ - case 3: /* Trigem 286M ET4000 */ - dev->vram_size = device_get_config_int("memory") << 10; - dev->port_22cb_val = 0x60; - dev->port_32cb_val = 0; - dev->svga.ksc5601_sbyte_mask = 0x80; - dev->svga.ksc5601_udc_area_msb[0] = 0xC9; - dev->svga.ksc5601_udc_area_msb[1] = 0xFE; - dev->svga.ksc5601_swap_mode = 0; - dev->svga.ksc5601_english_font_type = 0; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000_isa); - svga_init(info, &dev->svga, dev, dev->vram_size, - et4000_recalctimings, et4000k_in, et4000k_out, - NULL, NULL); - io_sethandler(0x03c0, 32, - et4000k_in,NULL,NULL, et4000k_out,NULL,NULL, dev); - io_sethandler(0x22cb, 1, - et4000k_in,NULL,NULL, et4000k_out,NULL,NULL, dev); - io_sethandler(0x22cf, 1, - et4000k_in,NULL,NULL, et4000k_out,NULL,NULL, dev); - io_sethandler(0x32cb, 1, - et4000k_in,NULL,NULL, et4000k_out,NULL,NULL, dev); - loadfont(KOREAN_FONT_ROM_PATH, 6); - fn = KOREAN_BIOS_ROM_PATH; - break; - case 4: /* Kasan ET4000 */ - dev->vram_size = device_get_config_int("memory") << 10; - dev->svga.ksc5601_sbyte_mask = 0; - dev->svga.ksc5601_udc_area_msb[0] = 0xC9; - dev->svga.ksc5601_udc_area_msb[1] = 0xFE; - dev->svga.ksc5601_swap_mode = 0; - dev->svga.ksc5601_english_font_type = 0x1FF; - dev->kasan_cfg_index = 0; - for (i=0; i<16; i++) - dev->kasan_cfg_regs[i] = 0; - for(i=0; i<4; i++) - dev->kasan_font_data[i] = 0; - dev->kasan_cfg_regs[1] = 0x50; - dev->kasan_cfg_regs[2] = 2; - dev->kasan_cfg_regs[3] = 6; - dev->kasan_cfg_regs[4] = 0x78; - dev->kasan_cfg_regs[5] = 0xFF; - dev->kasan_cfg_regs[6] = 0xC9; - dev->kasan_cfg_regs[7] = 0xFE; - dev->kasan_access_addr = 0x250; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000_isa); - svga_init(info, &dev->svga, dev, dev->vram_size, - et4000_kasan_recalctimings, et4000_in, et4000_out, - NULL, NULL); - io_sethandler(0x03c0, 32, - et4000k_in,NULL,NULL, et4000k_out,NULL,NULL, dev); - io_sethandler(0x0250, 8, - et4000_kasan_in, NULL, NULL, et4000_kasan_out, NULL, NULL, dev); - io_sethandler(0x0258, 2, - et4000_kasan_in, NULL, NULL, et4000_kasan_out, NULL, NULL, dev); - loadfont(KASAN_FONT_ROM_PATH, 6); - fn = KASAN_BIOS_ROM_PATH; - break; + case ET4000_TYPE_KOREAN: /* Korean ET4000 */ + case ET4000_TYPE_TRIGEM: /* Trigem 286M ET4000 */ + dev->vram_size = device_get_config_int("memory") << 10; + dev->port_22cb_val = 0x60; + dev->port_32cb_val = 0; + dev->svga.ksc5601_sbyte_mask = 0x80; + dev->svga.ksc5601_udc_area_msb[0] = 0xC9; + dev->svga.ksc5601_udc_area_msb[1] = 0xFE; + dev->svga.ksc5601_swap_mode = 0; + dev->svga.ksc5601_english_font_type = 0; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000_isa); + svga_init(info, &dev->svga, dev, dev->vram_size, + et4000_recalctimings, et4000k_in, et4000k_out, + NULL, NULL); + io_sethandler(0x03c0, 32, + et4000k_in, NULL, NULL, et4000k_out, NULL, NULL, dev); + io_sethandler(0x22cb, 1, + et4000k_in, NULL, NULL, et4000k_out, NULL, NULL, dev); + io_sethandler(0x22cf, 1, + et4000k_in, NULL, NULL, et4000k_out, NULL, NULL, dev); + io_sethandler(0x32cb, 1, + et4000k_in, NULL, NULL, et4000k_out, NULL, NULL, dev); + loadfont(KOREAN_FONT_ROM_PATH, 6); + fn = KOREAN_BIOS_ROM_PATH; + break; + case ET4000_TYPE_KASAN: /* Kasan ET4000 */ + dev->vram_size = device_get_config_int("memory") << 10; + dev->svga.ksc5601_sbyte_mask = 0; + dev->svga.ksc5601_udc_area_msb[0] = 0xC9; + dev->svga.ksc5601_udc_area_msb[1] = 0xFE; + dev->svga.ksc5601_swap_mode = 0; + dev->svga.ksc5601_english_font_type = 0x1FF; + dev->kasan_cfg_index = 0; + for (i = 0; i < 16; i++) + dev->kasan_cfg_regs[i] = 0; + for (i = 0; i < 4; i++) + dev->kasan_font_data[i] = 0; + dev->kasan_cfg_regs[1] = 0x50; + dev->kasan_cfg_regs[2] = 2; + dev->kasan_cfg_regs[3] = 6; + dev->kasan_cfg_regs[4] = 0x78; + dev->kasan_cfg_regs[5] = 0xFF; + dev->kasan_cfg_regs[6] = 0xC9; + dev->kasan_cfg_regs[7] = 0xFE; + dev->kasan_access_addr = 0x250; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000_isa); + svga_init(info, &dev->svga, dev, dev->vram_size, + et4000_kasan_recalctimings, et4000_in, et4000_out, + NULL, NULL); + io_sethandler(0x03c0, 32, + et4000_in, NULL, NULL, et4000_out, NULL, NULL, dev); + io_sethandler(0x0250, 8, + et4000_kasan_in, NULL, NULL, et4000_kasan_out, NULL, NULL, dev); + io_sethandler(0x0258, 2, + et4000_kasan_in, NULL, NULL, et4000_kasan_out, NULL, NULL, dev); + loadfont(KASAN_FONT_ROM_PATH, 6); + fn = KASAN_BIOS_ROM_PATH; + break; } dev->svga.ramdac = device_add(&sc1502x_ramdac_device); @@ -744,68 +741,61 @@ et4000_init(const device_t *info) dev->vram_mask = dev->vram_size - 1; rom_init(&dev->bios_rom, (char *) fn, - 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); dev->svga.translate_address = get_et4000_addr; - dev->svga.packed_chain4 = 1; + dev->svga.packed_chain4 = 1; - return(dev); + return (dev); } - static void et4000_close(void *priv) { - et4000_t *dev = (et4000_t *)priv; + et4000_t *dev = (et4000_t *) priv; svga_close(&dev->svga); free(dev); } - static void et4000_speed_changed(void *priv) { - et4000_t *dev = (et4000_t *)priv; + et4000_t *dev = (et4000_t *) priv; svga_recalctimings(&dev->svga); } - static void et4000_force_redraw(void *priv) { - et4000_t *dev = (et4000_t *)priv; + et4000_t *dev = (et4000_t *) priv; dev->svga.fullchange = changeframecount; } - static int et4000_available(void) { return rom_present(BIOS_ROM_PATH); } - static int et4000k_available(void) { - return rom_present(KOREAN_BIOS_ROM_PATH) && - rom_present(KOREAN_FONT_ROM_PATH); + return rom_present(KOREAN_BIOS_ROM_PATH) && rom_present(KOREAN_FONT_ROM_PATH); } static int et4000_kasan_available(void) { - return rom_present(KASAN_BIOS_ROM_PATH) && - rom_present(KASAN_FONT_ROM_PATH); + return rom_present(KASAN_BIOS_ROM_PATH) && rom_present(KASAN_FONT_ROM_PATH); } static const device_config_t et4000_config[] = { -// clang-format off + // clang-format off { .name = "memory", .description = "Memory size", @@ -836,71 +826,71 @@ static const device_config_t et4000_config[] = { }; const device_t et4000_isa_device = { - .name = "Tseng Labs ET4000AX (ISA)", + .name = "Tseng Labs ET4000AX (ISA)", .internal_name = "et4000ax", - .flags = DEVICE_ISA, - .local = 0, - .init = et4000_init, - .close = et4000_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ET4000_TYPE_ISA, + .init = et4000_init, + .close = et4000_close, + .reset = NULL, { .available = et4000_available }, .speed_changed = et4000_speed_changed, - .force_redraw = et4000_force_redraw, - .config = et4000_config + .force_redraw = et4000_force_redraw, + .config = et4000_config }; const device_t et4000_mca_device = { - .name = "Tseng Labs ET4000AX (MCA)", + .name = "Tseng Labs ET4000AX (MCA)", .internal_name = "et4000mca", - .flags = DEVICE_MCA, - .local = 1, - .init = et4000_init, - .close = et4000_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = ET4000_TYPE_MCA, + .init = et4000_init, + .close = et4000_close, + .reset = NULL, { .available = et4000_available }, .speed_changed = et4000_speed_changed, - .force_redraw = et4000_force_redraw, - .config = et4000_config + .force_redraw = et4000_force_redraw, + .config = et4000_config }; const device_t et4000k_isa_device = { - .name = "Trigem Korean VGA (Tseng Labs ET4000AX Korean)", + .name = "Trigem Korean VGA (Tseng Labs ET4000AX Korean)", .internal_name = "tgkorvga", - .flags = DEVICE_ISA, - .local = 2, - .init = et4000_init, - .close = et4000_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ET4000_TYPE_KOREAN, + .init = et4000_init, + .close = et4000_close, + .reset = NULL, { .available = et4000k_available }, .speed_changed = et4000_speed_changed, - .force_redraw = et4000_force_redraw, - .config = et4000_config + .force_redraw = et4000_force_redraw, + .config = et4000_config }; const device_t et4000k_tg286_isa_device = { - .name = "Trigem Korean VGA (Trigem 286M)", + .name = "Trigem Korean VGA (Trigem 286M)", .internal_name = "et4000k_tg286_isa", - .flags = DEVICE_ISA, - .local = 3, - .init = et4000_init, - .close = et4000_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ET4000_TYPE_TRIGEM, + .init = et4000_init, + .close = et4000_close, + .reset = NULL, { .available = et4000k_available }, .speed_changed = et4000_speed_changed, - .force_redraw = et4000_force_redraw, - .config = et4000_config + .force_redraw = et4000_force_redraw, + .config = et4000_config }; const device_t et4000_kasan_isa_device = { - .name = "Kasan Hangulmadang-16 VGA (Tseng Labs ET4000AX Korean)", + .name = "Kasan Hangulmadang-16 VGA (Tseng Labs ET4000AX Korean)", .internal_name = "kasan16vga", - .flags = DEVICE_ISA, - .local = 4, - .init = et4000_init, - .close = et4000_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ET4000_TYPE_KASAN, + .init = et4000_init, + .close = et4000_close, + .reset = NULL, { .available = et4000_kasan_available }, .speed_changed = et4000_speed_changed, - .force_redraw = et4000_force_redraw, - .config = et4000_config + .force_redraw = et4000_force_redraw, + .config = et4000_config }; diff --git a/src/video/vid_et4000w32.c b/src/video/vid_et4000w32.c index 5a897fcc1..7e97fe543 100644 --- a/src/video/vid_et4000w32.c +++ b/src/video/vid_et4000w32.c @@ -37,752 +37,788 @@ #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> +#define BIOS_ROM_PATH_DIAMOND "roms/video/et4000w32/et4000w32.bin" +#define BIOS_ROM_PATH_CARDEX "roms/video/et4000w32/cardex.vbi" +#define BIOS_ROM_PATH_W32 "roms/video/et4000w32/ET4000W32VLB_bios_MX27C512.BIN" +#define BIOS_ROM_PATH_W32I_ISA "roms/video/et4000w32/ET4KW32I.VBI" +#define BIOS_ROM_PATH_W32I_VLB "roms/video/et4000w32/tseng.u41.bin" +#define BIOS_ROM_PATH_W32P_VIDEOMAGIC_REVB_VLB "roms/video/et4000w32/VideoMagic-BioS-HXIRTW32PWSRL.BIN" +#define BIOS_ROM_PATH_W32P "roms/video/et4000w32/ET4K_W32.BIN" +#define BIOS_ROM_PATH_W32P_REVC "roms/video/et4000w32/et4000w32pcardex.BIN" -#define BIOS_ROM_PATH_DIAMOND "roms/video/et4000w32/et4000w32.bin" -#define BIOS_ROM_PATH_CARDEX "roms/video/et4000w32/cardex.vbi" -#define BIOS_ROM_PATH_W32 "roms/video/et4000w32/ET4000W32VLB_bios_MX27C512.BIN" -#define BIOS_ROM_PATH_W32I_ISA "roms/video/et4000w32/ET4KW32I.VBI" -#define BIOS_ROM_PATH_W32I_VLB "roms/video/et4000w32/tseng.u41.bin" -#define BIOS_ROM_PATH_W32P_VIDEOMAGIC_REVB_VLB "roms/video/et4000w32/VideoMagic-BioS-HXIRTW32PWSRL.BIN" -#define BIOS_ROM_PATH_W32P "roms/video/et4000w32/ET4K_W32.BIN" -#define BIOS_ROM_PATH_W32P_REVC "roms/video/et4000w32/et4000w32pcardex.BIN" +#define ACL_WRST 1 +#define ACL_RDST 2 +#define ACL_XYST 4 +#define ACL_SSO 8 - -#define ACL_WRST 1 -#define ACL_RDST 2 -#define ACL_XYST 4 -#define ACL_SSO 8 - - -enum -{ +enum { ET4000W32, ET4000W32I, ET4000W32P_REVC, - ET4000W32P_VIDEOMAGIC_REVB, + ET4000W32P_VIDEOMAGIC_REVB, ET4000W32P, ET4000W32P_CARDEX, ET4000W32P_DIAMOND }; +typedef struct et4000w32p_t { + mem_mapping_t linear_mapping; + mem_mapping_t mmu_mapping; -typedef struct et4000w32p_t -{ - mem_mapping_t linear_mapping; - mem_mapping_t mmu_mapping; + rom_t bios_rom; - rom_t bios_rom; + svga_t svga; - svga_t svga; + uint8_t banking, banking2, adjust_cursor, rev; - uint8_t banking, banking2, adjust_cursor, rev; + uint8_t regs[256], pci_regs[256]; - uint8_t regs[256], pci_regs[256]; + int index, vlb, pci, interleaved, + bank, type; - int index, vlb, pci, interleaved, - bank, type; - - uint32_t linearbase; - uint32_t vram_mask; + uint32_t linearbase; + uint32_t vram_mask; /* Accelerator */ struct { - struct { - uint8_t vbus, pixel_depth, xy_dir, pattern_wrap, - source_wrap, ctrl_routing, ctrl_reload, rop_fg, - rop_bg; + struct { + uint8_t vbus, pixel_depth, xy_dir, pattern_wrap, + source_wrap, ctrl_routing, ctrl_reload, rop_fg, + rop_bg; - uint16_t pattern_off, source_off, dest_off, mix_off, - count_x,count_y, pos_x, pos_y, - error, dmin, dmaj; + uint16_t pattern_off, source_off, dest_off, mix_off, + count_x, count_y, pos_x, pos_y, + error, dmin, dmaj; - uint32_t pattern_addr, source_addr, dest_addr, mix_addr; - } queued, internal; + uint32_t pattern_addr, source_addr, dest_addr, mix_addr; + } queued, internal; - uint8_t suspend_terminate, osr; - uint8_t status; - uint16_t x_count, y_count; + uint8_t suspend_terminate, osr; + uint8_t status; + uint16_t x_count, y_count; - int pattern_x, source_x, pattern_x_back, source_x_back, - pattern_y, source_y, cpu_dat_pos, pix_pos, - cpu_input_num, fifo_queue; - int pattern_x_diff, pattern_y_diff, pattern_x_diff2, pattern_y_diff2; - int patcnt, mmu_start; + int pattern_x, source_x, pattern_x_back, source_x_back, + pattern_y, source_y, cpu_dat_pos, pix_pos, + cpu_input_num, fifo_queue; + int pattern_x_diff, pattern_y_diff, pattern_x_diff2, pattern_y_diff2; + int patcnt, mmu_start; - uint32_t pattern_addr, source_addr, dest_addr, mix_addr, - pattern_back, source_back, dest_back, mix_back, - cpu_input; + uint32_t pattern_addr, source_addr, dest_addr, mix_addr, + pattern_back, source_back, dest_back, mix_back, + cpu_input; - uint64_t cpu_dat; + uint64_t cpu_dat; } acl; struct { - uint32_t base[3]; - uint8_t ctrl; + uint32_t base[3]; + uint8_t ctrl; } mmu; - volatile int busy; + volatile int busy; } et4000w32p_t; +static int et4000w32_vbus[4] = { 1, 2, 4, 4 }; -static int et4000w32_vbus[4] = {1, 2, 4, 4}; +static int et4000w32_max_x[8] = { 0, 0, 4, 8, 0x10, 0x20, 0x40, 0x70000000 }; +static int et4000w32_wrap_x[8] = { 0, 0, 3, 7, 0x0F, 0x1F, 0x3F, ~0 }; +static int et4000w32_wrap_y[8] = { 1, 2, 4, 8, ~0, ~0, ~0, ~0 }; -static int et4000w32_max_x[8] = {0,0,4,8,0x10,0x20,0x40,0x70000000}; -static int et4000w32_wrap_x[8] = {0,0,3,7,0x0F,0x1F,0x3F,~0}; -static int et4000w32_wrap_y[8] = {1,2,4,8,~0,~0,~0,~0}; +static video_timings_t timing_et4000w32_vlb = { .type = VIDEO_BUS, .write_b = 4, .write_w = 4, .write_l = 4, .read_b = 10, .read_w = 10, .read_l = 10 }; +static video_timings_t timing_et4000w32_pci = { .type = VIDEO_PCI, .write_b = 4, .write_w = 4, .write_l = 4, .read_b = 10, .read_w = 10, .read_l = 10 }; +static video_timings_t timing_et4000w32_isa = { .type = VIDEO_ISA, .write_b = 4, .write_w = 4, .write_l = 4, .read_b = 10, .read_w = 10, .read_l = 10 }; -static video_timings_t timing_et4000w32_vlb = {VIDEO_BUS, 4, 4, 4, 10, 10, 10}; -static video_timings_t timing_et4000w32_pci = {VIDEO_PCI, 4, 4, 4, 10, 10, 10}; -static video_timings_t timing_et4000w32_isa = {VIDEO_ISA, 4, 4, 4, 10, 10, 10}; +void et4000w32p_recalcmapping(et4000w32p_t *et4000); +static uint8_t et4000w32p_mmu_read(uint32_t addr, void *p); +static void et4000w32p_mmu_write(uint32_t addr, uint8_t val, void *p); -void et4000w32p_recalcmapping(et4000w32p_t *et4000); - -static uint8_t et4000w32p_mmu_read(uint32_t addr, void *p); -static void et4000w32p_mmu_write(uint32_t addr, uint8_t val, void *p); - -static void et4000w32_blit_start(et4000w32p_t *et4000); -static void et4000w32p_blit_start(et4000w32p_t *et4000); -static void et4000w32_blit(int count, int cpu_input, uint32_t src_dat, uint32_t mix_dat, et4000w32p_t *et4000); -static void et4000w32p_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et4000w32p_t *et4000); -uint8_t et4000w32p_in(uint16_t addr, void *p); - +static void et4000w32_blit_start(et4000w32p_t *et4000); +static void et4000w32p_blit_start(et4000w32p_t *et4000); +static void et4000w32_blit(int count, int cpu_input, uint32_t src_dat, uint32_t mix_dat, et4000w32p_t *et4000); +static void et4000w32p_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et4000w32p_t *et4000); +uint8_t et4000w32p_in(uint16_t addr, void *p); #ifdef ENABLE_ET4000W32_LOG int et4000w32_do_log = ENABLE_ET4000W32_LOG; - static void et4000w32_log(const char *fmt, ...) { va_list ap; if (et4000w32_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define et4000w32_log(fmt, ...) +# define et4000w32_log(fmt, ...) #endif - void et4000w32p_out(uint16_t addr, uint8_t val, void *p) { - et4000w32p_t *et4000 = (et4000w32p_t *)p; - svga_t *svga = &et4000->svga; - uint8_t old; - uint32_t add2addr = 0; + et4000w32p_t *et4000 = (et4000w32p_t *) p; + svga_t *svga = &et4000->svga; + uint8_t old; + uint32_t add2addr = 0; if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; + addr ^= 0x60; switch (addr) { - case 0x3c2: - if (et4000->type == ET4000W32P_DIAMOND) - icd2061_write(svga->clock_gen, (val >> 2) & 3); - break; + case 0x3c2: + if (et4000->type == ET4000W32P_DIAMOND) + icd2061_write(svga->clock_gen, (val >> 2) & 3); + break; - case 0x3c6: case 0x3c7: case 0x3c8: case 0x3c9: - if (et4000->type <= ET4000W32P_REVC) - sdac_ramdac_out(addr, 0, val, svga->ramdac, svga); - else - stg_ramdac_out(addr, val, svga->ramdac, svga); - return; + case 0x3c6: + case 0x3c7: + case 0x3c8: + case 0x3c9: + if (et4000->type <= ET4000W32P_REVC) + sdac_ramdac_out(addr, 0, val, svga->ramdac, svga); + else + stg_ramdac_out(addr, val, svga->ramdac, svga); + return; - case 0x3cb: /* Banking extension */ - if (!(svga->crtc[0x36] & 0x10) && !(svga->gdcreg[6] & 0x08)) { - svga->write_bank = (svga->write_bank & 0xfffff) | ((val & 1) << 20); - svga->read_bank = (svga->read_bank & 0xfffff) | ((val & 0x10) << 16); - } - et4000->banking2 = val; - return; - case 0x3cd: /* Banking */ - if (!(svga->crtc[0x36] & 0x10) && !(svga->gdcreg[6] & 0x08)) { - svga->write_bank = (svga->write_bank & 0x100000) | ((val & 0xf) * 65536); - svga->read_bank = (svga->read_bank & 0x100000) | (((val >> 4) & 0xf) * 65536); - } - et4000->banking = val; - return; - case 0x3cf: - switch (svga->gdcaddr & 15) { - case 6: - if (!(svga->crtc[0x36] & 0x10) && !(val & 0x08)) { - svga->write_bank = ((et4000->banking2 & 1) << 20) | ((et4000->banking & 0xf) * 65536); - svga->read_bank = ((et4000->banking2 & 0x10) << 16) | (((et4000->banking >> 4) & 0xf) * 65536); - } else - svga->write_bank = svga->read_bank = 0; + case 0x3cb: /* Banking extension */ + if (!(svga->crtc[0x36] & 0x10) && !(svga->gdcreg[6] & 0x08)) { + svga->write_bank = (svga->write_bank & 0xfffff) | ((val & 1) << 20); + svga->read_bank = (svga->read_bank & 0xfffff) | ((val & 0x10) << 16); + } + et4000->banking2 = val; + return; + case 0x3cd: /* Banking */ + if (!(svga->crtc[0x36] & 0x10) && !(svga->gdcreg[6] & 0x08)) { + svga->write_bank = (svga->write_bank & 0x100000) | ((val & 0xf) * 65536); + svga->read_bank = (svga->read_bank & 0x100000) | (((val >> 4) & 0xf) * 65536); + } + et4000->banking = val; + return; + case 0x3cf: + switch (svga->gdcaddr & 15) { + case 6: + if (!(svga->crtc[0x36] & 0x10) && !(val & 0x08)) { + svga->write_bank = ((et4000->banking2 & 1) << 20) | ((et4000->banking & 0xf) * 65536); + svga->read_bank = ((et4000->banking2 & 0x10) << 16) | (((et4000->banking >> 4) & 0xf) * 65536); + } else + svga->write_bank = svga->read_bank = 0; - svga->gdcreg[svga->gdcaddr & 15] = val; - et4000w32p_recalcmapping(et4000); - return; - } - break; - case 0x3d4: - svga->crtcreg = val & 0x3f; - return; - case 0x3d5: - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 0x35) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - old = svga->crtc[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; - if (svga->crtcreg == 0x36) { - if (!(val & 0x10) && !(svga->gdcreg[6] & 0x08)) { - svga->write_bank = ((et4000->banking2 & 1) << 20) | ((et4000->banking & 0xf) * 65536); - svga->read_bank = ((et4000->banking2 & 0x10) << 16) | (((et4000->banking >> 4) & 0xf) * 65536); - } else - svga->write_bank = svga->read_bank = 0; - } - if (old != val) { - if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) - { - if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - } - } - if (svga->crtcreg == 0x30) { - if (et4000->pci && (et4000->rev != 5)) - et4000->linearbase = (et4000->linearbase & 0xc0000000) | ((val & 0xfc) << 22); - else - et4000->linearbase = val << 22; - et4000w32p_recalcmapping(et4000); - } - if (svga->crtcreg == 0x32 || svga->crtcreg == 0x36) - et4000w32p_recalcmapping(et4000); - break; + svga->gdcreg[svga->gdcaddr & 15] = val; + et4000w32p_recalcmapping(et4000); + return; + } + break; + case 0x3d4: + svga->crtcreg = val & 0x3f; + return; + case 0x3d5: + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 0x35) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; + if (svga->crtcreg == 0x36) { + if (!(val & 0x10) && !(svga->gdcreg[6] & 0x08)) { + svga->write_bank = ((et4000->banking2 & 1) << 20) | ((et4000->banking & 0xf) * 65536); + svga->read_bank = ((et4000->banking2 & 0x10) << 16) | (((et4000->banking >> 4) & 0xf) * 65536); + } else + svga->write_bank = svga->read_bank = 0; + } + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + } + } + if (svga->crtcreg == 0x30) { + if (et4000->pci && (et4000->rev != 5)) + et4000->linearbase = (et4000->linearbase & 0xc0000000) | ((val & 0xfc) << 22); + else + et4000->linearbase = val << 22; + et4000w32p_recalcmapping(et4000); + } + if (svga->crtcreg == 0x32 || svga->crtcreg == 0x36) + et4000w32p_recalcmapping(et4000); + break; - case 0x210a: case 0x211a: case 0x212a: case 0x213a: - case 0x214a: case 0x215a: case 0x216a: case 0x217a: - et4000->index = val; - return; - case 0x210b: case 0x211b: case 0x212b: case 0x213b: - case 0x214b: case 0x215b: case 0x216b: case 0x217b: - et4000->regs[et4000->index] = val; - svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((et4000->regs[0xEF] & 4) || (et4000->type == ET4000W32)) ? 128 : 64; - svga->hwcursor.x = et4000->regs[0xE0] | ((et4000->regs[0xE1] & 7) << 8); - svga->hwcursor.y = et4000->regs[0xE4] | ((et4000->regs[0xE5] & 7) << 8); - svga->hwcursor.ena = !!(et4000->regs[0xF7] & 0x80); - svga->hwcursor.xoff = et4000->regs[0xE2]; - svga->hwcursor.yoff = et4000->regs[0xE6]; + case 0x210a: + case 0x211a: + case 0x212a: + case 0x213a: + case 0x214a: + case 0x215a: + case 0x216a: + case 0x217a: + et4000->index = val; + return; + case 0x210b: + case 0x211b: + case 0x212b: + case 0x213b: + case 0x214b: + case 0x215b: + case 0x216b: + case 0x217b: + et4000->regs[et4000->index] = val; + svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((et4000->regs[0xEF] & 4) || (et4000->type == ET4000W32)) ? 128 : 64; + svga->hwcursor.x = et4000->regs[0xE0] | ((et4000->regs[0xE1] & 7) << 8); + svga->hwcursor.y = et4000->regs[0xE4] | ((et4000->regs[0xE5] & 7) << 8); + svga->hwcursor.ena = !!(et4000->regs[0xF7] & 0x80); + svga->hwcursor.xoff = et4000->regs[0xE2]; + svga->hwcursor.yoff = et4000->regs[0xE6]; - if (et4000->type == ET4000W32) { - switch (svga->bpp) { - case 8: - svga->hwcursor.xoff += 32; - break; - } - } + if (et4000->type == ET4000W32) { + switch (svga->bpp) { + case 8: + svga->hwcursor.xoff += 32; + break; + } + } - if (svga->hwcursor.cur_xsize == 128) { - svga->hwcursor.xoff &= 0x7f; - svga->hwcursor.yoff &= 0x7f; - if (et4000->type > ET4000W32P_REVC) { - if (svga->bpp == 24) { - et4000->adjust_cursor = 2; - } - } - } else { - if (et4000->type > ET4000W32P_REVC) { - if (svga->bpp == 24 && et4000->adjust_cursor) { - et4000->adjust_cursor = 0; - } - } - svga->hwcursor.xoff &= 0x3f; - svga->hwcursor.yoff &= 0x3f; - } - svga->hwcursor.addr = (et4000->regs[0xe8] | (et4000->regs[0xe9] << 8) | ((et4000->regs[0xea] & 7) << 16)) << 2; + if (svga->hwcursor.cur_xsize == 128) { + svga->hwcursor.xoff &= 0x7f; + svga->hwcursor.yoff &= 0x7f; + if (et4000->type > ET4000W32P_REVC) { + if (svga->bpp == 24) { + et4000->adjust_cursor = 2; + } + } + } else { + if (et4000->type > ET4000W32P_REVC) { + if (svga->bpp == 24 && et4000->adjust_cursor) { + et4000->adjust_cursor = 0; + } + } + svga->hwcursor.xoff &= 0x3f; + svga->hwcursor.yoff &= 0x3f; + } + svga->hwcursor.addr = (et4000->regs[0xe8] | (et4000->regs[0xe9] << 8) | ((et4000->regs[0xea] & 7) << 16)) << 2; - add2addr = svga->hwcursor.yoff * ((svga->hwcursor.cur_xsize == 128) ? 32 : 16); - svga->hwcursor.addr += add2addr; - return; + add2addr = svga->hwcursor.yoff * ((svga->hwcursor.cur_xsize == 128) ? 32 : 16); + svga->hwcursor.addr += add2addr; + return; } svga_out(addr, val, svga); } - uint8_t et4000w32p_in(uint16_t addr, void *p) { - et4000w32p_t *et4000 = (et4000w32p_t *)p; - svga_t *svga = &et4000->svga; + et4000w32p_t *et4000 = (et4000w32p_t *) p; + svga_t *svga = &et4000->svga; if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; + addr ^= 0x60; switch (addr) { - case 0x3c5: - if ((svga->seqaddr & 0xf) == 7) - return svga->seqregs[svga->seqaddr & 0xf] | 4; - break; + case 0x3c5: + if ((svga->seqaddr & 0xf) == 7) + return svga->seqregs[svga->seqaddr & 0xf] | 4; + break; - case 0x3c6: case 0x3c7: case 0x3c8: case 0x3c9: - if (et4000->type <= ET4000W32P_REVC) - return sdac_ramdac_in(addr, 0, svga->ramdac, svga); - else - return stg_ramdac_in(addr, svga->ramdac, svga); - break; + case 0x3c6: + case 0x3c7: + case 0x3c8: + case 0x3c9: + if (et4000->type <= ET4000W32P_REVC) + return sdac_ramdac_in(addr, 0, svga->ramdac, svga); + else + return stg_ramdac_in(addr, svga->ramdac, svga); + break; - case 0x3cb: - return et4000->banking2; - case 0x3cd: - return et4000->banking; - case 0x3d4: - return svga->crtcreg; - case 0x3d5: - if (et4000->type == ET4000W32) { - if (svga->crtcreg == 0x37) - return 0x09; - } - return svga->crtc[svga->crtcreg]; + case 0x3cb: + return et4000->banking2; + case 0x3cd: + return et4000->banking; + case 0x3d4: + return svga->crtcreg; + case 0x3d5: + if (et4000->type == ET4000W32) { + if (svga->crtcreg == 0x37) + return 0x09; + } + return svga->crtc[svga->crtcreg]; - case 0x3da: - svga->attrff = 0; + case 0x3da: + svga->attrff = 0; - /*Bit 1 of the Input Status Register is required by the OS/2 and NT ET4000W32/I drivers to be set otherwise - the guest will loop infinitely upon reaching the GUI*/ - if (svga->cgastat & 0x01) - svga->cgastat &= ~0x32; - else - svga->cgastat ^= 0x32; - return svga->cgastat; + /*Bit 1 of the Input Status Register is required by the OS/2 and NT ET4000W32/I drivers to be set otherwise + the guest will loop infinitely upon reaching the GUI*/ + if (svga->cgastat & 0x01) + svga->cgastat &= ~0x32; + else + svga->cgastat ^= 0x32; + return svga->cgastat; - case 0x210a: case 0x211a: case 0x212a: case 0x213a: - case 0x214a: case 0x215a: case 0x216a: case 0x217a: - return et4000->index; - case 0x210B: case 0x211B: case 0x212B: case 0x213B: - case 0x214B: case 0x215B: case 0x216B: case 0x217B: - if (et4000->index == 0xec) { - return (et4000->regs[0xec] & 0xf) | (et4000->rev << 4); - } - if (et4000->index == 0xee) { - if (svga->bpp == 8) { - if ((svga->gdcreg[5] & 0x60) >= 0x40) - return 3; - else if ((svga->gdcreg[5] & 0x60) == 0x20) - return 1; - else - return 2; - } else if (svga->bpp == 15 || svga->bpp == 16) - return 4; - else - break; - } - if (et4000->index == 0xef) { - if (et4000->pci) - return (et4000->regs[0xef] & 0x0f) | (et4000->rev << 4) | et4000->pci; - else - return (et4000->regs[0xef] & 0x8f) | (et4000->rev << 4) | et4000->vlb; - } - return et4000->regs[et4000->index]; + case 0x210a: + case 0x211a: + case 0x212a: + case 0x213a: + case 0x214a: + case 0x215a: + case 0x216a: + case 0x217a: + return et4000->index; + case 0x210B: + case 0x211B: + case 0x212B: + case 0x213B: + case 0x214B: + case 0x215B: + case 0x216B: + case 0x217B: + if (et4000->index == 0xec) { + return (et4000->regs[0xec] & 0xf) | (et4000->rev << 4); + } + if (et4000->index == 0xee) { + if (svga->bpp == 8) { + if ((svga->gdcreg[5] & 0x60) >= 0x40) + return 3; + else if ((svga->gdcreg[5] & 0x60) == 0x20) + return 1; + else + return 2; + } else if (svga->bpp == 15 || svga->bpp == 16) + return 4; + else + break; + } + if (et4000->index == 0xef) { + if (et4000->pci) + return (et4000->regs[0xef] & 0x0f) | (et4000->rev << 4) | et4000->pci; + else + return (et4000->regs[0xef] & 0x8f) | (et4000->rev << 4) | et4000->vlb; + } + return et4000->regs[et4000->index]; } return svga_in(addr, svga); } - void et4000w32p_recalctimings(svga_t *svga) { - et4000w32p_t *et4000 = (et4000w32p_t *)svga->p; + et4000w32p_t *et4000 = (et4000w32p_t *) svga->p; svga->ma_latch |= (svga->crtc[0x33] & 0x7) << 16; - if (svga->crtc[0x35] & 0x01) svga->vblankstart += 0x400; - if (svga->crtc[0x35] & 0x02) svga->vtotal += 0x400; - if (svga->crtc[0x35] & 0x04) svga->dispend += 0x400; - if (svga->crtc[0x35] & 0x08) svga->vsyncstart += 0x400; - if (svga->crtc[0x35] & 0x10) svga->split += 0x400; - if (svga->crtc[0x3F] & 0x80) svga->rowoffset += 0x100; - if (svga->crtc[0x3F] & 0x01) svga->htotal += 256; - if (svga->attrregs[0x16] & 0x20) svga->hdisp <<= 1; + if (svga->crtc[0x35] & 0x01) + svga->vblankstart += 0x400; + if (svga->crtc[0x35] & 0x02) + svga->vtotal += 0x400; + if (svga->crtc[0x35] & 0x04) + svga->dispend += 0x400; + if (svga->crtc[0x35] & 0x08) + svga->vsyncstart += 0x400; + if (svga->crtc[0x35] & 0x10) + svga->split += 0x400; + if (svga->crtc[0x3F] & 0x80) + svga->rowoffset += 0x100; + if (svga->crtc[0x3F] & 0x01) + svga->htotal += 256; + if (svga->attrregs[0x16] & 0x20) + svga->hdisp <<= 1; - svga->clock = (cpuclock * (double)(1ull << 32)) / svga->getclock((svga->miscout >> 2) & 3, svga->clock_gen); + svga->clock = (cpuclock * (double) (1ull << 32)) / svga->getclock((svga->miscout >> 2) & 3, svga->clock_gen); - if (et4000->type != ET4000W32P_DIAMOND) { - if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { - if (svga->gdcreg[5] & 0x40) { - switch (svga->bpp) { - case 8: - svga->clock /= 2; - break; - case 15: case 16: - svga->clock /= 3; - break; - case 24: - svga->clock /= 4; - break; - } - } - } - } - - if (svga->adv_flags & FLAG_NOSKEW) { - /* On the Cardex ET4000/W32p-based cards, adjust text mode clocks by 1. */ - if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /* Text mode */ - svga->ma_latch--; - - if ((svga->seqregs[1] & 8)) /*40 column*/ - svga->hdisp += (svga->seqregs[1] & 1) ? 16 : 18; - else - svga->hdisp += (svga->seqregs[1] & 1) ? 8 : 9; - } else { - /* Also adjust the graphics mode clocks in some cases. */ - if ((svga->gdcreg[5] & 0x40) && (svga->bpp != 32)) { - if ((svga->bpp == 15) || (svga->bpp == 16) || (svga->bpp == 24)) - svga->hdisp += (svga->seqregs[1] & 1) ? 16 : 18; - else - svga->hdisp += (svga->seqregs[1] & 1) ? 8 : 9; - } else if ((svga->gdcreg[5] & 0x40) == 0) { - svga->hdisp += (svga->seqregs[1] & 1) ? 8 : 9; - if (svga->hdisp == 648 || svga->hdisp == 808 || svga->hdisp == 1032) - svga->hdisp -= 8; - } - } + if (et4000->type != ET4000W32P_DIAMOND) { + if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { + if (svga->gdcreg[5] & 0x40) { + switch (svga->bpp) { + case 8: + svga->clock /= 2; + break; + case 15: + case 16: + svga->clock /= 3; + break; + case 24: + svga->clock /= 4; + break; + } + } + } } - if (et4000->type == ET4000W32) { - if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { - if (svga->gdcreg[5] & 0x40) { - switch (svga->bpp) { - case 8: - if (svga->hdisp == 640 || svga->hdisp == 800 || svga->hdisp == 1024) - break; - svga->hdisp -= 24; - break; - } - } - } - } + if (svga->adv_flags & FLAG_NOSKEW) { + /* On the Cardex ET4000/W32p-based cards, adjust text mode clocks by 1. */ + if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /* Text mode */ + svga->ma_latch--; + + if ((svga->seqregs[1] & 8)) /*40 column*/ + svga->hdisp += (svga->seqregs[1] & 1) ? 16 : 18; + else + svga->hdisp += (svga->seqregs[1] & 1) ? 8 : 9; + } else { + /* Also adjust the graphics mode clocks in some cases. */ + if ((svga->gdcreg[5] & 0x40) && (svga->bpp != 32)) { + if ((svga->bpp == 15) || (svga->bpp == 16) || (svga->bpp == 24)) + svga->hdisp += (svga->seqregs[1] & 1) ? 16 : 18; + else + svga->hdisp += (svga->seqregs[1] & 1) ? 8 : 9; + } else if ((svga->gdcreg[5] & 0x40) == 0) { + svga->hdisp += (svga->seqregs[1] & 1) ? 8 : 9; + if (svga->hdisp == 648 || svga->hdisp == 808 || svga->hdisp == 1032) + svga->hdisp -= 8; + } + } + } + + if (et4000->type == ET4000W32) { + if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { + if (svga->gdcreg[5] & 0x40) { + switch (svga->bpp) { + case 8: + if (svga->hdisp == 640 || svga->hdisp == 800 || svga->hdisp == 1024) + break; + svga->hdisp -= 24; + break; + } + } + } + } et4000->adjust_cursor = 0; - switch (svga->bpp) { - case 15: case 16: - svga->hdisp >>= 1; - if (et4000->type <= ET4000W32P_REVC) { - if (et4000->type == ET4000W32P_REVC) { - if (svga->hdisp != 1024) - et4000->adjust_cursor = 1; - } else - et4000->adjust_cursor = 1; - } - break; - case 24: - svga->hdisp /= 3; - if (et4000->type <= ET4000W32P_REVC) - et4000->adjust_cursor = 2; - if (et4000->type == ET4000W32P_DIAMOND && (svga->hdisp == 640/2 || svga->hdisp == 1232)) { - svga->hdisp = 640; - } - break; - } + switch (svga->bpp) { + case 15: + case 16: + svga->hdisp >>= 1; + if (et4000->type <= ET4000W32P_REVC) { + if (et4000->type == ET4000W32P_REVC) { + if (svga->hdisp != 1024) + et4000->adjust_cursor = 1; + } else + et4000->adjust_cursor = 1; + } + break; + case 24: + svga->hdisp /= 3; + if (et4000->type <= ET4000W32P_REVC) + et4000->adjust_cursor = 2; + if (et4000->type == ET4000W32P_DIAMOND && (svga->hdisp == 640 / 2 || svga->hdisp == 1232)) { + svga->hdisp = 640; + } + break; + } svga->render = svga_render_blank; if (!svga->scrblank && svga->attr_palette_enable) { - if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /* Text mode */ - if (svga->seqregs[1] & 8) /* 40 column */ - svga->render = svga_render_text_40; - else - svga->render = svga_render_text_80; - } else { - if (svga->adv_flags & FLAG_NOSKEW) { - svga->ma_latch--; - } + if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /* Text mode */ + if (svga->seqregs[1] & 8) /* 40 column */ + svga->render = svga_render_text_40; + else + svga->render = svga_render_text_80; + } else { + if (svga->adv_flags & FLAG_NOSKEW) { + svga->ma_latch--; + } - switch (svga->gdcreg[5] & 0x60) { - case 0x00: - if (et4000->rev == 5) - svga->ma_latch++; + switch (svga->gdcreg[5] & 0x60) { + case 0x00: + if (et4000->rev == 5) + svga->ma_latch++; - if (svga->seqregs[1] & 8) /* Low res (320) */ - svga->render = svga_render_4bpp_lowres; - else - svga->render = svga_render_4bpp_highres; - break; - case 0x20: /* 4 colours */ - if (svga->seqregs[1] & 8) /*Low res (320)*/ - svga->render = svga_render_2bpp_lowres; - else - svga->render = svga_render_2bpp_highres; - break; - case 0x40: case 0x60: /* 256+ colours */ - if (et4000->type <= ET4000W32P_REVC) - svga->clock /= 2; + if (svga->seqregs[1] & 8) /* Low res (320) */ + svga->render = svga_render_4bpp_lowres; + else + svga->render = svga_render_4bpp_highres; + break; + case 0x20: /* 4 colours */ + if (svga->seqregs[1] & 8) /*Low res (320)*/ + svga->render = svga_render_2bpp_lowres; + else + svga->render = svga_render_2bpp_highres; + break; + case 0x40: + case 0x60: /* 256+ colours */ + if (et4000->type <= ET4000W32P_REVC) + svga->clock /= 2; - switch (svga->bpp) { - case 8: - svga->map8 = svga->pallook; - if (svga->lowres) - svga->render = svga_render_8bpp_lowres; - else - svga->render = svga_render_8bpp_highres; - break; - case 15: - if (svga->lowres || (svga->seqregs[1] & 8)) - svga->render = svga_render_15bpp_lowres; - else - svga->render = svga_render_15bpp_highres; - break; - case 16: - if (svga->lowres || (svga->seqregs[1] & 8)) - svga->render = svga_render_16bpp_lowres; - else - svga->render = svga_render_16bpp_highres; - break; - case 17: - if (svga->lowres || (svga->seqregs[1] & 8)) - svga->render = svga_render_15bpp_mix_lowres; - else - svga->render = svga_render_15bpp_mix_highres; - break; - case 24: - if (svga->lowres || (svga->seqregs[1] & 8)) - svga->render = svga_render_24bpp_lowres; - else - svga->render = svga_render_24bpp_highres; - break; - case 32: - if (svga->lowres || (svga->seqregs[1] & 8)) - svga->render = svga_render_32bpp_lowres; - else - svga->render = svga_render_32bpp_highres; - break; - } - break; - } - } + switch (svga->bpp) { + case 8: + svga->map8 = svga->pallook; + if (svga->lowres) + svga->render = svga_render_8bpp_lowres; + else + svga->render = svga_render_8bpp_highres; + break; + case 15: + if (svga->lowres || (svga->seqregs[1] & 8)) + svga->render = svga_render_15bpp_lowres; + else + svga->render = svga_render_15bpp_highres; + break; + case 16: + if (svga->lowres || (svga->seqregs[1] & 8)) + svga->render = svga_render_16bpp_lowres; + else + svga->render = svga_render_16bpp_highres; + break; + case 17: + if (svga->lowres || (svga->seqregs[1] & 8)) + svga->render = svga_render_15bpp_mix_lowres; + else + svga->render = svga_render_15bpp_mix_highres; + break; + case 24: + if (svga->lowres || (svga->seqregs[1] & 8)) + svga->render = svga_render_24bpp_lowres; + else + svga->render = svga_render_24bpp_highres; + break; + case 32: + if (svga->lowres || (svga->seqregs[1] & 8)) + svga->render = svga_render_32bpp_lowres; + else + svga->render = svga_render_32bpp_highres; + break; + } + break; + } + } } } - void et4000w32p_recalcmapping(et4000w32p_t *et4000) { svga_t *svga = &et4000->svga; - int map; + int map; if (et4000->pci && !(et4000->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) { - mem_mapping_disable(&svga->mapping); - mem_mapping_disable(&et4000->linear_mapping); - mem_mapping_disable(&et4000->mmu_mapping); - return; + mem_mapping_disable(&svga->mapping); + mem_mapping_disable(&et4000->linear_mapping); + mem_mapping_disable(&et4000->mmu_mapping); + return; } - if (svga->crtc[0x36] & 0x10) { /* Linear frame buffer */ - mem_mapping_set_addr(&et4000->linear_mapping, et4000->linearbase, 0x200000); - mem_mapping_disable(&svga->mapping); - mem_mapping_disable(&et4000->mmu_mapping); + if (svga->crtc[0x36] & 0x10) { /* Linear frame buffer */ + mem_mapping_set_addr(&et4000->linear_mapping, et4000->linearbase, 0x200000); + mem_mapping_disable(&svga->mapping); + mem_mapping_disable(&et4000->mmu_mapping); } else { - map = (svga->gdcreg[6] & 0xc) >> 2; - if (svga->crtc[0x36] & 0x20) map |= 4; - if (svga->crtc[0x36] & 0x08) map |= 8; - mem_mapping_disable(&et4000->linear_mapping); - switch (map) { - case 0x0: case 0x4: case 0x8: case 0xc: /* 128k at A0000 */ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); - mem_mapping_disable(&et4000->mmu_mapping); - svga->banked_mask = 0x1ffff; - break; - case 0x1: /* 64k at A0000 */ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); - mem_mapping_disable(&et4000->mmu_mapping); - svga->banked_mask = 0xffff; - break; - case 0x2: /* 32k at B0000 */ - mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); - mem_mapping_disable(&et4000->mmu_mapping); - svga->banked_mask = 0x7fff; - break; - case 0x3: /* 32k at B8000 */ - mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); - mem_mapping_disable(&et4000->mmu_mapping); - svga->banked_mask = 0x7fff; - break; - case 0x5: case 0x9: case 0xd: /* 64k at A0000, MMU at B8000 */ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); - mem_mapping_set_addr(&et4000->mmu_mapping, 0xb8000, 0x08000); - svga->banked_mask = 0xffff; - break; - case 0x6: case 0xa: case 0xe: /* 32k at B0000, MMU at A8000 */ - mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); - mem_mapping_set_addr(&et4000->mmu_mapping, 0xa8000, 0x08000); - svga->banked_mask = 0x7fff; - break; - case 0x7: case 0xb: case 0xf: /* 32k at B8000, MMU at A8000 */ - mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); - mem_mapping_set_addr(&et4000->mmu_mapping, 0xa8000, 0x08000); - svga->banked_mask = 0x7fff; - break; - } + map = (svga->gdcreg[6] & 0xc) >> 2; + if (svga->crtc[0x36] & 0x20) + map |= 4; + if (svga->crtc[0x36] & 0x08) + map |= 8; + mem_mapping_disable(&et4000->linear_mapping); + switch (map) { + case 0x0: + case 0x4: + case 0x8: + case 0xc: /* 128k at A0000 */ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); + mem_mapping_disable(&et4000->mmu_mapping); + svga->banked_mask = 0x1ffff; + break; + case 0x1: /* 64k at A0000 */ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + mem_mapping_disable(&et4000->mmu_mapping); + svga->banked_mask = 0xffff; + break; + case 0x2: /* 32k at B0000 */ + mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); + mem_mapping_disable(&et4000->mmu_mapping); + svga->banked_mask = 0x7fff; + break; + case 0x3: /* 32k at B8000 */ + mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); + mem_mapping_disable(&et4000->mmu_mapping); + svga->banked_mask = 0x7fff; + break; + case 0x5: + case 0x9: + case 0xd: /* 64k at A0000, MMU at B8000 */ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + mem_mapping_set_addr(&et4000->mmu_mapping, 0xb8000, 0x08000); + svga->banked_mask = 0xffff; + break; + case 0x6: + case 0xa: + case 0xe: /* 32k at B0000, MMU at A8000 */ + mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); + mem_mapping_set_addr(&et4000->mmu_mapping, 0xa8000, 0x08000); + svga->banked_mask = 0x7fff; + break; + case 0x7: + case 0xb: + case 0xf: /* 32k at B8000, MMU at A8000 */ + mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); + mem_mapping_set_addr(&et4000->mmu_mapping, 0xa8000, 0x08000); + svga->banked_mask = 0x7fff; + break; + } } if (!et4000->interleaved && (svga->crtc[0x32] & 0x80)) - mem_mapping_disable(&svga->mapping); + mem_mapping_disable(&svga->mapping); } - static void et4000w32p_accel_write_fifo(et4000w32p_t *et4000, uint32_t addr, uint8_t val) { - et4000->acl.fifo_queue++; + et4000->acl.fifo_queue++; switch (addr & 0xff) { - case 0x80: - et4000->acl.queued.pattern_addr = (et4000->acl.queued.pattern_addr & 0x3fff00) | val; - break; - case 0x81: - et4000->acl.queued.pattern_addr = (et4000->acl.queued.pattern_addr & 0x3f00ff) | (val << 8); - break; - case 0x82: - et4000->acl.queued.pattern_addr = (et4000->acl.queued.pattern_addr & 0x00ffff) | ((val & 0x3f) << 16); - break; - case 0x84: - et4000->acl.queued.source_addr = (et4000->acl.queued.source_addr & 0x3fff00) | val; - break; - case 0x85: - et4000->acl.queued.source_addr = (et4000->acl.queued.source_addr & 0x3f00ff) | (val << 8); - break; - case 0x86: - et4000->acl.queued.source_addr = (et4000->acl.queued.source_addr & 0x00ffff) | ((val & 0x3f) << 16); - break; - case 0x88: - et4000->acl.queued.pattern_off = (et4000->acl.queued.pattern_off & 0x0f00) | val; - break; - case 0x89: - et4000->acl.queued.pattern_off = (et4000->acl.queued.pattern_off & 0x00ff) | ((val & 0x0f) << 8); - break; - case 0x8a: - et4000->acl.queued.source_off = (et4000->acl.queued.source_off & 0x0f00) | val; - break; - case 0x8b: - et4000->acl.queued.source_off = (et4000->acl.queued.source_off & 0x00ff) | ((val & 0x0f) << 8); - break; - case 0x8c: - et4000->acl.queued.dest_off = (et4000->acl.queued.dest_off & 0x0f00) | val; - break; - case 0x8d: - et4000->acl.queued.dest_off = (et4000->acl.queued.dest_off & 0x00ff) | ((val & 0x0f) << 8); - break; - case 0x8e: - if (et4000->type >= ET4000W32P_REVC) - et4000->acl.queued.pixel_depth = val & 0x30; - else - et4000->acl.queued.vbus = val & 0x03; - break; - case 0x8f: - if (et4000->type >= ET4000W32P_REVC) - et4000->acl.queued.xy_dir = val & 0xb7; - else - et4000->acl.queued.xy_dir = val & 0x03; - break; - case 0x90: - et4000->acl.queued.pattern_wrap = val & 0x77; - break; - case 0x92: - et4000->acl.queued.source_wrap = val & 0x77; - break; - case 0x98: - et4000->acl.queued.count_x = (et4000->acl.queued.count_x & 0x0f00) | val; - break; - case 0x99: - et4000->acl.queued.count_x = (et4000->acl.queued.count_x & 0x00ff) | ((val & 0x0f) << 8); - break; - case 0x9a: - et4000->acl.queued.count_y = (et4000->acl.queued.count_y & 0x0f00) | val; - break; - case 0x9b: - et4000->acl.queued.count_y = (et4000->acl.queued.count_y & 0x00ff) | ((val & 0x0f) << 8); - break; - case 0x9c: - if (et4000->type >= ET4000W32P_REVC) - et4000->acl.queued.ctrl_routing = val & 0xdb; - else - et4000->acl.queued.ctrl_routing = val & 0xb7; - break; - case 0x9d: - et4000->acl.queued.ctrl_reload = val & 0x03; - break; - case 0x9e: - et4000->acl.queued.rop_bg = val; - break; - case 0x9f: - et4000->acl.queued.rop_fg = val; - break; - case 0xa0: - et4000->acl.queued.dest_addr = (et4000->acl.queued.dest_addr & 0x3fff00) | val; - break; - case 0xa1: - et4000->acl.queued.dest_addr = (et4000->acl.queued.dest_addr & 0x3f00ff) | (val << 8); - break; - case 0xa2: - et4000->acl.queued.dest_addr = (et4000->acl.queued.dest_addr & 0x00ffff) | ((val & 0x3f) << 16); - break; - case 0xa3: - et4000->acl.internal = et4000->acl.queued; - if (et4000->type >= ET4000W32P_REVC) { - et4000w32p_blit_start(et4000); - et4000w32_log("Destination Address write and start XY Block, xcnt = %i, ycnt = %i\n", et4000->acl.x_count + 1, et4000->acl.y_count + 1); - if (!(et4000->acl.queued.ctrl_routing & 0x43)) { - et4000w32p_blit(0xffffff, ~0, 0, 0, et4000); - } - if ((et4000->acl.queued.ctrl_routing & 0x40) && !(et4000->acl.internal.ctrl_routing & 3)) { - et4000w32p_blit(4, ~0, 0, 0, et4000); - } - } else { - et4000w32_blit_start(et4000); - et4000->acl.cpu_input_num = 0; - if (!(et4000->acl.queued.ctrl_routing & 0x37)) { - et4000->acl.mmu_start = 0; - et4000w32_blit(-1, 0, 0, 0xffffffff, et4000); - } - } - break; - case 0xa4: - et4000->acl.queued.mix_addr = (et4000->acl.queued.mix_addr & 0xFFFFFF00) | val; - break; - case 0xa5: - et4000->acl.queued.mix_addr = (et4000->acl.queued.mix_addr & 0xFFFF00FF) | (val << 8); - break; - case 0xa6: - et4000->acl.queued.mix_addr = (et4000->acl.queued.mix_addr & 0xFF00FFFF) | (val << 16); - break; - case 0xa7: - et4000->acl.queued.mix_addr = (et4000->acl.queued.mix_addr & 0x00FFFFFF) | (val << 24); - break; - case 0xa8: - et4000->acl.queued.mix_off = (et4000->acl.queued.mix_off & 0xFF00) | val; - break; - case 0xa9: - et4000->acl.queued.mix_off = (et4000->acl.queued.mix_off & 0x00FF) | (val << 8); - break; - case 0xaa: - et4000->acl.queued.error = (et4000->acl.queued.error & 0xFF00) | val; - break; - case 0xab: - et4000->acl.queued.error = (et4000->acl.queued.error & 0x00FF) | (val << 8); - break; - case 0xac: - et4000->acl.queued.dmin = (et4000->acl.queued.dmin & 0xFF00) | val; - break; - case 0xad: - et4000->acl.queued.dmin = (et4000->acl.queued.dmin & 0x00FF) | (val << 8); - break; - case 0xae: - et4000->acl.queued.dmaj = (et4000->acl.queued.dmaj & 0xFF00) | val; - break; - case 0xaf: - et4000->acl.queued.dmaj = (et4000->acl.queued.dmaj & 0x00FF) | (val << 8); - break; + case 0x80: + et4000->acl.queued.pattern_addr = (et4000->acl.queued.pattern_addr & 0x3fff00) | val; + break; + case 0x81: + et4000->acl.queued.pattern_addr = (et4000->acl.queued.pattern_addr & 0x3f00ff) | (val << 8); + break; + case 0x82: + et4000->acl.queued.pattern_addr = (et4000->acl.queued.pattern_addr & 0x00ffff) | ((val & 0x3f) << 16); + break; + case 0x84: + et4000->acl.queued.source_addr = (et4000->acl.queued.source_addr & 0x3fff00) | val; + break; + case 0x85: + et4000->acl.queued.source_addr = (et4000->acl.queued.source_addr & 0x3f00ff) | (val << 8); + break; + case 0x86: + et4000->acl.queued.source_addr = (et4000->acl.queued.source_addr & 0x00ffff) | ((val & 0x3f) << 16); + break; + case 0x88: + et4000->acl.queued.pattern_off = (et4000->acl.queued.pattern_off & 0x0f00) | val; + break; + case 0x89: + et4000->acl.queued.pattern_off = (et4000->acl.queued.pattern_off & 0x00ff) | ((val & 0x0f) << 8); + break; + case 0x8a: + et4000->acl.queued.source_off = (et4000->acl.queued.source_off & 0x0f00) | val; + break; + case 0x8b: + et4000->acl.queued.source_off = (et4000->acl.queued.source_off & 0x00ff) | ((val & 0x0f) << 8); + break; + case 0x8c: + et4000->acl.queued.dest_off = (et4000->acl.queued.dest_off & 0x0f00) | val; + break; + case 0x8d: + et4000->acl.queued.dest_off = (et4000->acl.queued.dest_off & 0x00ff) | ((val & 0x0f) << 8); + break; + case 0x8e: + if (et4000->type >= ET4000W32P_REVC) + et4000->acl.queued.pixel_depth = val & 0x30; + else + et4000->acl.queued.vbus = val & 0x03; + break; + case 0x8f: + if (et4000->type >= ET4000W32P_REVC) + et4000->acl.queued.xy_dir = val & 0xb7; + else + et4000->acl.queued.xy_dir = val & 0x03; + break; + case 0x90: + et4000->acl.queued.pattern_wrap = val & 0x77; + break; + case 0x92: + et4000->acl.queued.source_wrap = val & 0x77; + break; + case 0x98: + et4000->acl.queued.count_x = (et4000->acl.queued.count_x & 0x0f00) | val; + break; + case 0x99: + et4000->acl.queued.count_x = (et4000->acl.queued.count_x & 0x00ff) | ((val & 0x0f) << 8); + break; + case 0x9a: + et4000->acl.queued.count_y = (et4000->acl.queued.count_y & 0x0f00) | val; + break; + case 0x9b: + et4000->acl.queued.count_y = (et4000->acl.queued.count_y & 0x00ff) | ((val & 0x0f) << 8); + break; + case 0x9c: + if (et4000->type >= ET4000W32P_REVC) + et4000->acl.queued.ctrl_routing = val & 0xdb; + else + et4000->acl.queued.ctrl_routing = val & 0xb7; + break; + case 0x9d: + et4000->acl.queued.ctrl_reload = val & 0x03; + break; + case 0x9e: + et4000->acl.queued.rop_bg = val; + break; + case 0x9f: + et4000->acl.queued.rop_fg = val; + break; + case 0xa0: + et4000->acl.queued.dest_addr = (et4000->acl.queued.dest_addr & 0x3fff00) | val; + break; + case 0xa1: + et4000->acl.queued.dest_addr = (et4000->acl.queued.dest_addr & 0x3f00ff) | (val << 8); + break; + case 0xa2: + et4000->acl.queued.dest_addr = (et4000->acl.queued.dest_addr & 0x00ffff) | ((val & 0x3f) << 16); + break; + case 0xa3: + et4000->acl.internal = et4000->acl.queued; + if (et4000->type >= ET4000W32P_REVC) { + et4000w32p_blit_start(et4000); + et4000w32_log("Destination Address write and start XY Block, xcnt = %i, ycnt = %i\n", et4000->acl.x_count + 1, et4000->acl.y_count + 1); + if (!(et4000->acl.queued.ctrl_routing & 0x43)) { + et4000w32p_blit(0xffffff, ~0, 0, 0, et4000); + } + if ((et4000->acl.queued.ctrl_routing & 0x40) && !(et4000->acl.internal.ctrl_routing & 3)) { + et4000w32p_blit(4, ~0, 0, 0, et4000); + } + } else { + et4000w32_blit_start(et4000); + et4000->acl.cpu_input_num = 0; + if (!(et4000->acl.queued.ctrl_routing & 0x37)) { + et4000->acl.mmu_start = 0; + et4000w32_blit(-1, 0, 0, 0xffffffff, et4000); + } + } + break; + case 0xa4: + et4000->acl.queued.mix_addr = (et4000->acl.queued.mix_addr & 0xFFFFFF00) | val; + break; + case 0xa5: + et4000->acl.queued.mix_addr = (et4000->acl.queued.mix_addr & 0xFFFF00FF) | (val << 8); + break; + case 0xa6: + et4000->acl.queued.mix_addr = (et4000->acl.queued.mix_addr & 0xFF00FFFF) | (val << 16); + break; + case 0xa7: + et4000->acl.queued.mix_addr = (et4000->acl.queued.mix_addr & 0x00FFFFFF) | (val << 24); + break; + case 0xa8: + et4000->acl.queued.mix_off = (et4000->acl.queued.mix_off & 0xFF00) | val; + break; + case 0xa9: + et4000->acl.queued.mix_off = (et4000->acl.queued.mix_off & 0x00FF) | (val << 8); + break; + case 0xaa: + et4000->acl.queued.error = (et4000->acl.queued.error & 0xFF00) | val; + break; + case 0xab: + et4000->acl.queued.error = (et4000->acl.queued.error & 0x00FF) | (val << 8); + break; + case 0xac: + et4000->acl.queued.dmin = (et4000->acl.queued.dmin & 0xFF00) | val; + break; + case 0xad: + et4000->acl.queued.dmin = (et4000->acl.queued.dmin & 0x00FF) | (val << 8); + break; + case 0xae: + et4000->acl.queued.dmaj = (et4000->acl.queued.dmaj & 0xFF00) | val; + break; + case 0xaf: + et4000->acl.queued.dmaj = (et4000->acl.queued.dmaj & 0x00FF) | (val << 8); + break; } } @@ -790,339 +826,351 @@ static void et4000w32p_accel_write_mmu(et4000w32p_t *et4000, uint32_t addr, uint8_t val, uint8_t bank) { if (et4000->type >= ET4000W32P_REVC) { - if (!(et4000->acl.status & ACL_XYST)) { - et4000w32_log("XY MMU block not started\n"); - return; - } - if (et4000->acl.internal.ctrl_routing & 3) { - et4000->acl.fifo_queue++; - if ((et4000->acl.internal.ctrl_routing & 3) == 2) /*CPU data is Mix data*/ - et4000w32p_blit(8 - (et4000->acl.mix_addr & 7), val >> (et4000->acl.mix_addr & 7), 0, 1, et4000); - else if ((et4000->acl.internal.ctrl_routing & 3) == 1) /*CPU data is Source data*/ - et4000w32p_blit(1, ~0, val, 2, et4000); - } + if (!(et4000->acl.status & ACL_XYST)) { + et4000w32_log("XY MMU block not started\n"); + return; + } + if (et4000->acl.internal.ctrl_routing & 3) { + et4000->acl.fifo_queue++; + if ((et4000->acl.internal.ctrl_routing & 3) == 2) /*CPU data is Mix data*/ + et4000w32p_blit(8 - (et4000->acl.mix_addr & 7), val >> (et4000->acl.mix_addr & 7), 0, 1, et4000); + else if ((et4000->acl.internal.ctrl_routing & 3) == 1) /*CPU data is Source data*/ + et4000w32p_blit(1, ~0, val, 2, et4000); + } } else { - if (!(et4000->acl.status & ACL_XYST)) { - et4000->acl.fifo_queue++; - et4000->acl.queued.dest_addr = ((addr & 0x1fff) + et4000->mmu.base[bank]); - et4000->acl.internal = et4000->acl.queued; - et4000w32_blit_start(et4000); - et4000w32_log("ET4000W32 Accelerated MMU aperture start XY Block (Implicit): bank = %i, patx = %i, paty = %i, wrap y = %i\n", et4000->bank, et4000->acl.pattern_x, et4000->acl.pattern_y, et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7]); - et4000->acl.cpu_input_num = 0; - if (!(et4000->acl.queued.ctrl_routing & 0x37)) { - et4000->acl.mmu_start = 1; - et4000w32_blit(-1, 0, 0, 0xffffffff, et4000); - } - } + if (!(et4000->acl.status & ACL_XYST)) { + et4000->acl.fifo_queue++; + et4000->acl.queued.dest_addr = ((addr & 0x1fff) + et4000->mmu.base[bank]); + et4000->acl.internal = et4000->acl.queued; + et4000w32_blit_start(et4000); + et4000w32_log("ET4000W32 Accelerated MMU aperture start XY Block (Implicit): bank = %i, patx = %i, paty = %i, wrap y = %i\n", et4000->bank, et4000->acl.pattern_x, et4000->acl.pattern_y, et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7]); + et4000->acl.cpu_input_num = 0; + if (!(et4000->acl.queued.ctrl_routing & 0x37)) { + et4000->acl.mmu_start = 1; + et4000w32_blit(-1, 0, 0, 0xffffffff, et4000); + } + } - if (et4000->acl.internal.ctrl_routing & 7) { - et4000->acl.fifo_queue++; - et4000->acl.cpu_input = (et4000->acl.cpu_input & ~(0xff << (et4000->acl.cpu_input_num << 3))) | - (val << (et4000->acl.cpu_input_num << 3)); - et4000->acl.cpu_input_num++; + if (et4000->acl.internal.ctrl_routing & 7) { + et4000->acl.fifo_queue++; + et4000->acl.cpu_input = (et4000->acl.cpu_input & ~(0xff << (et4000->acl.cpu_input_num << 3))) | (val << (et4000->acl.cpu_input_num << 3)); + et4000->acl.cpu_input_num++; - if (et4000->acl.cpu_input_num == et4000w32_vbus[et4000->acl.internal.vbus]) { - if ((et4000->acl.internal.ctrl_routing & 7) == 2) /*CPU data is Mix data*/ - et4000w32_blit(et4000->acl.cpu_input_num << 3, 2, 0, et4000->acl.cpu_input, et4000); - else if ((et4000->acl.internal.ctrl_routing & 7) == 1) /*CPU data is Source data*/ - et4000w32_blit(et4000->acl.cpu_input_num, 1, et4000->acl.cpu_input, 0xffffffff, et4000); + if (et4000->acl.cpu_input_num == et4000w32_vbus[et4000->acl.internal.vbus]) { + if ((et4000->acl.internal.ctrl_routing & 7) == 2) /*CPU data is Mix data*/ + et4000w32_blit(et4000->acl.cpu_input_num << 3, 2, 0, et4000->acl.cpu_input, et4000); + else if ((et4000->acl.internal.ctrl_routing & 7) == 1) /*CPU data is Source data*/ + et4000w32_blit(et4000->acl.cpu_input_num, 1, et4000->acl.cpu_input, 0xffffffff, et4000); - et4000->acl.cpu_input_num = 0; - } + et4000->acl.cpu_input_num = 0; + } - if ((et4000->acl.internal.ctrl_routing & 7) == 4) /*CPU data is X Count*/ - et4000w32_blit(val | (et4000->acl.queued.count_x << 8), 0, 0, 0xffffffff, et4000); - if ((et4000->acl.internal.ctrl_routing & 7) == 5) /*CPU data is Y Count*/ - et4000w32_blit(val | (et4000->acl.queued.count_y << 8), 0, 0, 0xffffffff, et4000); - } + if ((et4000->acl.internal.ctrl_routing & 7) == 4) /*CPU data is X Count*/ + et4000w32_blit(val | (et4000->acl.queued.count_x << 8), 0, 0, 0xffffffff, et4000); + if ((et4000->acl.internal.ctrl_routing & 7) == 5) /*CPU data is Y Count*/ + et4000w32_blit(val | (et4000->acl.queued.count_y << 8), 0, 0, 0xffffffff, et4000); + } } } static void et4000w32p_mmu_write(uint32_t addr, uint8_t val, void *p) { - et4000w32p_t *et4000 = (et4000w32p_t *)p; - svga_t *svga = &et4000->svga; + et4000w32p_t *et4000 = (et4000w32p_t *) p; + svga_t *svga = &et4000->svga; switch (addr & 0x6000) { - case 0x0000: /* MMU 0 */ - case 0x2000: /* MMU 1 */ - case 0x4000: /* MMU 2 */ - et4000->bank = (addr >> 13) & 3; - if (et4000->mmu.ctrl & (1 << et4000->bank)) { - et4000w32p_accel_write_mmu(et4000, addr & 0x7fff, val, et4000->bank); - } else { - if (((addr & 0x1fff) + et4000->mmu.base[et4000->bank]) < svga->vram_max) { - svga->vram[((addr & 0x1fff) + et4000->mmu.base[et4000->bank]) & et4000->vram_mask] = val; - svga->changedvram[(((addr & 0x1fff) + et4000->mmu.base[et4000->bank]) & et4000->vram_mask) >> 12] = changeframecount; - } - } - break; - case 0x6000: - if ((addr & 0xff) >= 0x80) { - et4000w32p_accel_write_fifo(et4000, addr & 0x7fff, val); - } else { - switch (addr & 0xff) { - case 0x00: - et4000->mmu.base[0] = (et4000->mmu.base[0] & 0x3fff00) | val; - break; - case 0x01: - et4000->mmu.base[0] = (et4000->mmu.base[0] & 0x3f00ff) | (val << 8); - break; - case 0x02: - et4000->mmu.base[0] = (et4000->mmu.base[0] & 0x00ffff) | ((val & 0x3f) << 16); - break; - case 0x04: - et4000->mmu.base[1] = (et4000->mmu.base[1] & 0x3fff00) | val; - break; - case 0x05: - et4000->mmu.base[1] = (et4000->mmu.base[1] & 0x3f00ff) | (val << 8); - break; - case 0x06: - et4000->mmu.base[1] = (et4000->mmu.base[1] & 0x00ffff) | ((val & 0x3f) << 16); - break; - case 0x08: - et4000->mmu.base[2] = (et4000->mmu.base[2] & 0x3fff00) | val; - break; - case 0x09: - et4000->mmu.base[2] = (et4000->mmu.base[2] & 0x3f00ff) | (val << 8); - break; - case 0x0a: - et4000->mmu.base[2] = (et4000->mmu.base[2] & 0x00ffff) | ((val & 0x3f) << 16); - break; - case 0x13: - et4000->mmu.ctrl = val; - break; - case 0x30: - et4000->acl.suspend_terminate = val; - break; - case 0x31: - et4000->acl.osr = val; - break; - } - } - break; + case 0x0000: /* MMU 0 */ + case 0x2000: /* MMU 1 */ + case 0x4000: /* MMU 2 */ + et4000->bank = (addr >> 13) & 3; + if (et4000->mmu.ctrl & (1 << et4000->bank)) { + et4000w32p_accel_write_mmu(et4000, addr & 0x7fff, val, et4000->bank); + } else { + if (((addr & 0x1fff) + et4000->mmu.base[et4000->bank]) < svga->vram_max) { + svga->vram[((addr & 0x1fff) + et4000->mmu.base[et4000->bank]) & et4000->vram_mask] = val; + svga->changedvram[(((addr & 0x1fff) + et4000->mmu.base[et4000->bank]) & et4000->vram_mask) >> 12] = changeframecount; + } + } + break; + case 0x6000: + if ((addr & 0xff) >= 0x80) { + et4000w32p_accel_write_fifo(et4000, addr & 0x7fff, val); + } else { + switch (addr & 0xff) { + case 0x00: + et4000->mmu.base[0] = (et4000->mmu.base[0] & 0x3fff00) | val; + break; + case 0x01: + et4000->mmu.base[0] = (et4000->mmu.base[0] & 0x3f00ff) | (val << 8); + break; + case 0x02: + et4000->mmu.base[0] = (et4000->mmu.base[0] & 0x00ffff) | ((val & 0x3f) << 16); + break; + case 0x04: + et4000->mmu.base[1] = (et4000->mmu.base[1] & 0x3fff00) | val; + break; + case 0x05: + et4000->mmu.base[1] = (et4000->mmu.base[1] & 0x3f00ff) | (val << 8); + break; + case 0x06: + et4000->mmu.base[1] = (et4000->mmu.base[1] & 0x00ffff) | ((val & 0x3f) << 16); + break; + case 0x08: + et4000->mmu.base[2] = (et4000->mmu.base[2] & 0x3fff00) | val; + break; + case 0x09: + et4000->mmu.base[2] = (et4000->mmu.base[2] & 0x3f00ff) | (val << 8); + break; + case 0x0a: + et4000->mmu.base[2] = (et4000->mmu.base[2] & 0x00ffff) | ((val & 0x3f) << 16); + break; + case 0x13: + et4000->mmu.ctrl = val; + break; + case 0x30: + et4000->acl.suspend_terminate = val; + break; + case 0x31: + et4000->acl.osr = val; + break; + } + } + break; } } static uint8_t et4000w32p_mmu_read(uint32_t addr, void *p) { - et4000w32p_t *et4000 = (et4000w32p_t *)p; - svga_t *svga = &et4000->svga; - uint8_t temp; + et4000w32p_t *et4000 = (et4000w32p_t *) p; + svga_t *svga = &et4000->svga; + uint8_t temp; switch (addr & 0x6000) { - case 0x0000: /* MMU 0 */ - case 0x2000: /* MMU 1 */ - case 0x4000: /* MMU 2 */ - et4000->bank = (addr >> 13) & 3; - if (et4000->mmu.ctrl & (1 << et4000->bank)) { - temp = 0xff; - if (et4000->acl.cpu_dat_pos) { - et4000->acl.cpu_dat_pos--; - temp = et4000->acl.cpu_dat & 0xff; - et4000->acl.cpu_dat >>= 8; - } - if ((et4000->acl.queued.ctrl_routing & 0x40) && !et4000->acl.cpu_dat_pos && !(et4000->acl.internal.ctrl_routing & 3)) - et4000w32p_blit(4, ~0, 0, 0, et4000); + case 0x0000: /* MMU 0 */ + case 0x2000: /* MMU 1 */ + case 0x4000: /* MMU 2 */ + et4000->bank = (addr >> 13) & 3; + if (et4000->mmu.ctrl & (1 << et4000->bank)) { + temp = 0xff; + if (et4000->acl.cpu_dat_pos) { + et4000->acl.cpu_dat_pos--; + temp = et4000->acl.cpu_dat & 0xff; + et4000->acl.cpu_dat >>= 8; + } + if ((et4000->acl.queued.ctrl_routing & 0x40) && !et4000->acl.cpu_dat_pos && !(et4000->acl.internal.ctrl_routing & 3)) + et4000w32p_blit(4, ~0, 0, 0, et4000); - /* ???? */ - return temp; - } + /* ???? */ + return temp; + } - if ((addr & 0x1fff) + et4000->mmu.base[et4000->bank] >= svga->vram_max) - return 0xff; + if ((addr & 0x1fff) + et4000->mmu.base[et4000->bank] >= svga->vram_max) + return 0xff; - return svga->vram[(addr & 0x1fff) + et4000->mmu.base[et4000->bank]]; + return svga->vram[(addr & 0x1fff) + et4000->mmu.base[et4000->bank]]; - case 0x6000: - switch (addr & 0xff) { - case 0x00: - return et4000->mmu.base[0] & 0xff; - case 0x01: - return et4000->mmu.base[0] >> 8; - case 0x02: - return et4000->mmu.base[0] >> 16; - case 0x03: - return et4000->mmu.base[0] >> 24; - case 0x04: - return et4000->mmu.base[1] & 0xff; - case 0x05: - return et4000->mmu.base[1] >> 8; - case 0x06: - return et4000->mmu.base[1] >> 16; - case 0x07: - return et4000->mmu.base[1] >> 24; - case 0x08: - return et4000->mmu.base[2] & 0xff; - case 0x09: - return et4000->mmu.base[2] >> 8; - case 0x0a: - return et4000->mmu.base[2] >> 16; - case 0x0b: - return et4000->mmu.base[2] >> 24; - case 0x13: - return et4000->mmu.ctrl; + case 0x6000: + switch (addr & 0xff) { + case 0x00: + return et4000->mmu.base[0] & 0xff; + case 0x01: + return et4000->mmu.base[0] >> 8; + case 0x02: + return et4000->mmu.base[0] >> 16; + case 0x03: + return et4000->mmu.base[0] >> 24; + case 0x04: + return et4000->mmu.base[1] & 0xff; + case 0x05: + return et4000->mmu.base[1] >> 8; + case 0x06: + return et4000->mmu.base[1] >> 16; + case 0x07: + return et4000->mmu.base[1] >> 24; + case 0x08: + return et4000->mmu.base[2] & 0xff; + case 0x09: + return et4000->mmu.base[2] >> 8; + case 0x0a: + return et4000->mmu.base[2] >> 16; + case 0x0b: + return et4000->mmu.base[2] >> 24; + case 0x13: + return et4000->mmu.ctrl; - case 0x36: - if (et4000->acl.fifo_queue) { - et4000->acl.status |= ACL_RDST; - et4000->acl.fifo_queue = 0; - } else - et4000->acl.status &= ~ACL_RDST; - return et4000->acl.status; + case 0x36: + if (et4000->acl.fifo_queue) { + et4000->acl.status |= ACL_RDST; + et4000->acl.fifo_queue = 0; + } else + et4000->acl.status &= ~ACL_RDST; + return et4000->acl.status; - case 0x80: - return et4000->acl.internal.pattern_addr & 0xff; - case 0x81: - return et4000->acl.internal.pattern_addr >> 8; - case 0x82: - return et4000->acl.internal.pattern_addr >> 16; - case 0x83: - return et4000->acl.internal.pattern_addr >> 24; - case 0x84: - return et4000->acl.internal.source_addr & 0xff; - case 0x85: - return et4000->acl.internal.source_addr >> 8; - case 0x86: - return et4000->acl.internal.source_addr >> 16; - case 0x87: - return et4000->acl.internal.source_addr >> 24; - case 0x88: - return et4000->acl.internal.pattern_off & 0xff; - case 0x89: - return et4000->acl.internal.pattern_off >> 8; - case 0x8a: - return et4000->acl.internal.source_off & 0xff; - case 0x8b: - return et4000->acl.internal.source_off >> 8; - case 0x8c: - return et4000->acl.internal.dest_off & 0xff; - case 0x8d: - return et4000->acl.internal.dest_off >> 8; - case 0x8e: - if (et4000->type >= ET4000W32P_REVC) - return et4000->acl.internal.pixel_depth; - else - return et4000->acl.internal.vbus; - break; - case 0x8f: return et4000->acl.internal.xy_dir; - case 0x90: return et4000->acl.internal.pattern_wrap; - case 0x92: return et4000->acl.internal.source_wrap; - case 0x98: return et4000->acl.internal.count_x & 0xff; - case 0x99: return et4000->acl.internal.count_x >> 8; - case 0x9a: return et4000->acl.internal.count_y & 0xff; - case 0x9b: return et4000->acl.internal.count_y >> 8; - case 0x9c: return et4000->acl.internal.ctrl_routing; - case 0x9d: return et4000->acl.internal.ctrl_reload; - case 0x9e: return et4000->acl.internal.rop_bg; - case 0x9f: return et4000->acl.internal.rop_fg; - case 0xa0: return et4000->acl.internal.dest_addr & 0xff; - case 0xa1: return et4000->acl.internal.dest_addr >> 8; - case 0xa2: return et4000->acl.internal.dest_addr >> 16; - case 0xa3: return et4000->acl.internal.dest_addr >> 24; - } + case 0x80: + return et4000->acl.internal.pattern_addr & 0xff; + case 0x81: + return et4000->acl.internal.pattern_addr >> 8; + case 0x82: + return et4000->acl.internal.pattern_addr >> 16; + case 0x83: + return et4000->acl.internal.pattern_addr >> 24; + case 0x84: + return et4000->acl.internal.source_addr & 0xff; + case 0x85: + return et4000->acl.internal.source_addr >> 8; + case 0x86: + return et4000->acl.internal.source_addr >> 16; + case 0x87: + return et4000->acl.internal.source_addr >> 24; + case 0x88: + return et4000->acl.internal.pattern_off & 0xff; + case 0x89: + return et4000->acl.internal.pattern_off >> 8; + case 0x8a: + return et4000->acl.internal.source_off & 0xff; + case 0x8b: + return et4000->acl.internal.source_off >> 8; + case 0x8c: + return et4000->acl.internal.dest_off & 0xff; + case 0x8d: + return et4000->acl.internal.dest_off >> 8; + case 0x8e: + if (et4000->type >= ET4000W32P_REVC) + return et4000->acl.internal.pixel_depth; + else + return et4000->acl.internal.vbus; + break; + case 0x8f: + return et4000->acl.internal.xy_dir; + case 0x90: + return et4000->acl.internal.pattern_wrap; + case 0x92: + return et4000->acl.internal.source_wrap; + case 0x98: + return et4000->acl.internal.count_x & 0xff; + case 0x99: + return et4000->acl.internal.count_x >> 8; + case 0x9a: + return et4000->acl.internal.count_y & 0xff; + case 0x9b: + return et4000->acl.internal.count_y >> 8; + case 0x9c: + return et4000->acl.internal.ctrl_routing; + case 0x9d: + return et4000->acl.internal.ctrl_reload; + case 0x9e: + return et4000->acl.internal.rop_bg; + case 0x9f: + return et4000->acl.internal.rop_fg; + case 0xa0: + return et4000->acl.internal.dest_addr & 0xff; + case 0xa1: + return et4000->acl.internal.dest_addr >> 8; + case 0xa2: + return et4000->acl.internal.dest_addr >> 16; + case 0xa3: + return et4000->acl.internal.dest_addr >> 24; + } - return 0xff; + return 0xff; } return 0xff; } - void et4000w32_blit_start(et4000w32p_t *et4000) { - et4000->acl.x_count = et4000->acl.internal.count_x; - et4000->acl.y_count = et4000->acl.internal.count_y; + et4000->acl.x_count = et4000->acl.internal.count_x; + et4000->acl.y_count = et4000->acl.internal.count_y; - et4000->acl.pattern_addr = et4000->acl.internal.pattern_addr; - et4000->acl.source_addr = et4000->acl.internal.source_addr; - et4000->acl.dest_addr = et4000->acl.internal.dest_addr; - et4000->acl.dest_back = et4000->acl.dest_addr; + et4000->acl.pattern_addr = et4000->acl.internal.pattern_addr; + et4000->acl.source_addr = et4000->acl.internal.source_addr; + et4000->acl.dest_addr = et4000->acl.internal.dest_addr; + et4000->acl.dest_back = et4000->acl.dest_addr; et4000->acl.pattern_x = et4000->acl.source_x = et4000->acl.pattern_y = et4000->acl.source_y = 0; et4000->acl.status |= ACL_XYST; - et4000->acl.status &= ~ACL_SSO; + et4000->acl.status &= ~ACL_SSO; if (!(et4000->acl.internal.ctrl_routing & 7) || (et4000->acl.internal.ctrl_routing & 4)) - et4000->acl.status |= ACL_SSO; + et4000->acl.status |= ACL_SSO; if (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7]) { - et4000->acl.pattern_x = et4000->acl.pattern_addr & et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7]; - et4000->acl.pattern_addr &= ~et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7]; + et4000->acl.pattern_x = et4000->acl.pattern_addr & et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7]; + et4000->acl.pattern_addr &= ~et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7]; } et4000->acl.pattern_back = et4000->acl.pattern_addr; if (!(et4000->acl.internal.pattern_wrap & 0x40)) { - if ((et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1) == 0x00) { /*This is to avoid a division by zero crash*/ - et4000->acl.pattern_y = (et4000->acl.pattern_addr / (0x7f + 1)) & (et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7] - 1); - } else - et4000->acl.pattern_y = (et4000->acl.pattern_addr / (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1)) & (et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7] - 1); - et4000->acl.pattern_back &= ~(((et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1) * et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7]) - 1); + if ((et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1) == 0x00) { /*This is to avoid a division by zero crash*/ + et4000->acl.pattern_y = (et4000->acl.pattern_addr / (0x7f + 1)) & (et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7] - 1); + } else + et4000->acl.pattern_y = (et4000->acl.pattern_addr / (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1)) & (et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7] - 1); + et4000->acl.pattern_back &= ~(((et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1) * et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7]) - 1); } et4000->acl.pattern_x_back = et4000->acl.pattern_x; if (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7]) { - et4000->acl.source_x = et4000->acl.source_addr & et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7]; - et4000->acl.source_addr &= ~et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7]; + et4000->acl.source_x = et4000->acl.source_addr & et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7]; + et4000->acl.source_addr &= ~et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7]; } et4000->acl.source_back = et4000->acl.source_addr; if (!(et4000->acl.internal.source_wrap & 0x40)) { - if ((et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1) == 0x00) { /*This is to avoid a division by zero crash*/ - et4000->acl.source_y = (et4000->acl.source_addr / (0x7f + 1)) & (et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7] - 1); - } else - et4000->acl.source_y = (et4000->acl.source_addr / (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1)) & (et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7] - 1); - et4000->acl.source_back &= ~(((et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1) * et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7]) - 1); + if ((et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1) == 0x00) { /*This is to avoid a division by zero crash*/ + et4000->acl.source_y = (et4000->acl.source_addr / (0x7f + 1)) & (et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7] - 1); + } else + et4000->acl.source_y = (et4000->acl.source_addr / (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1)) & (et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7] - 1); + et4000->acl.source_back &= ~(((et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1) * et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7]) - 1); } et4000->acl.source_x_back = et4000->acl.source_x; } - static void et4000w32p_blit_start(et4000w32p_t *et4000) { - et4000->acl.x_count = et4000->acl.internal.count_x; - et4000->acl.y_count = et4000->acl.internal.count_y; + et4000->acl.x_count = et4000->acl.internal.count_x; + et4000->acl.y_count = et4000->acl.internal.count_y; if (!(et4000->acl.queued.xy_dir & 0x20)) - et4000->acl.internal.error = et4000->acl.internal.dmaj / 2; - et4000->acl.pattern_addr = et4000->acl.internal.pattern_addr; - et4000->acl.source_addr = et4000->acl.internal.source_addr; - et4000->acl.mix_addr = et4000->acl.internal.mix_addr; - et4000->acl.mix_back = et4000->acl.mix_addr; - et4000->acl.dest_addr = et4000->acl.internal.dest_addr; - et4000->acl.dest_back = et4000->acl.dest_addr; - et4000->acl.internal.pos_x = et4000->acl.internal.pos_y = 0; - et4000->acl.pattern_x = et4000->acl.source_x = et4000->acl.pattern_y = et4000->acl.source_y = 0; + et4000->acl.internal.error = et4000->acl.internal.dmaj / 2; + et4000->acl.pattern_addr = et4000->acl.internal.pattern_addr; + et4000->acl.source_addr = et4000->acl.internal.source_addr; + et4000->acl.mix_addr = et4000->acl.internal.mix_addr; + et4000->acl.mix_back = et4000->acl.mix_addr; + et4000->acl.dest_addr = et4000->acl.internal.dest_addr; + et4000->acl.dest_back = et4000->acl.dest_addr; + et4000->acl.internal.pos_x = et4000->acl.internal.pos_y = 0; + et4000->acl.pattern_x = et4000->acl.source_x = et4000->acl.pattern_y = et4000->acl.source_y = 0; et4000->acl.status |= ACL_XYST; - et4000w32_log("ACL status XYST set\n"); + et4000w32_log("ACL status XYST set\n"); if ((!(et4000->acl.internal.ctrl_routing & 7) || (et4000->acl.internal.ctrl_routing & 4)) && !(et4000->acl.internal.ctrl_routing & 0x40)) - et4000->acl.status |= ACL_SSO; + et4000->acl.status |= ACL_SSO; if (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7]) { - et4000->acl.pattern_x = et4000->acl.pattern_addr & et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7]; - et4000->acl.pattern_addr &= ~et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7]; + et4000->acl.pattern_x = et4000->acl.pattern_addr & et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7]; + et4000->acl.pattern_addr &= ~et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7]; } et4000->acl.pattern_back = et4000->acl.pattern_addr; if (!(et4000->acl.internal.pattern_wrap & 0x40)) { - et4000->acl.pattern_y = (et4000->acl.pattern_addr / (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1)) & (et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7] - 1); - et4000->acl.pattern_back &= ~(((et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1) * et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7]) - 1); + et4000->acl.pattern_y = (et4000->acl.pattern_addr / (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1)) & (et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7] - 1); + et4000->acl.pattern_back &= ~(((et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1) * et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7]) - 1); } et4000->acl.pattern_x_back = et4000->acl.pattern_x; if (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7]) { - et4000->acl.source_x = et4000->acl.source_addr & et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7]; - et4000->acl.source_addr &= ~et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7]; + et4000->acl.source_x = et4000->acl.source_addr & et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7]; + et4000->acl.source_addr &= ~et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7]; } et4000->acl.source_back = et4000->acl.source_addr; if (!(et4000->acl.internal.source_wrap & 0x40)) { - et4000->acl.source_y = (et4000->acl.source_addr / (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1)) & (et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7] - 1); - et4000->acl.source_back &= ~(((et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1) * et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7]) - 1); + et4000->acl.source_y = (et4000->acl.source_addr / (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1)) & (et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7] - 1); + et4000->acl.source_back &= ~(((et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1) * et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7]) - 1); } et4000->acl.source_x_back = et4000->acl.source_x; @@ -1130,341 +1178,848 @@ et4000w32p_blit_start(et4000w32p_t *et4000) et4000->acl.internal.count_x += (et4000->acl.internal.pixel_depth >> 4) & 3; et4000->acl.cpu_dat_pos = 0; - et4000->acl.cpu_dat = 0; + et4000->acl.cpu_dat = 0; et4000->acl.pix_pos = 0; } - void et4000w32_incx(int c, et4000w32p_t *et4000) { - et4000->acl.dest_addr += c; - et4000->acl.pattern_x += c; - et4000->acl.source_x += c; - et4000->acl.mix_addr += c; + et4000->acl.dest_addr += c; + et4000->acl.pattern_x += c; + et4000->acl.source_x += c; + et4000->acl.mix_addr += c; if (et4000->acl.pattern_x >= et4000w32_max_x[et4000->acl.internal.pattern_wrap & 7]) - et4000->acl.pattern_x -= et4000w32_max_x[et4000->acl.internal.pattern_wrap & 7]; - if (et4000->acl.source_x >= et4000w32_max_x[et4000->acl.internal.source_wrap & 7]) - et4000->acl.source_x -= et4000w32_max_x[et4000->acl.internal.source_wrap & 7]; + et4000->acl.pattern_x -= et4000w32_max_x[et4000->acl.internal.pattern_wrap & 7]; + if (et4000->acl.source_x >= et4000w32_max_x[et4000->acl.internal.source_wrap & 7]) + et4000->acl.source_x -= et4000w32_max_x[et4000->acl.internal.source_wrap & 7]; } - void et4000w32_decx(int c, et4000w32p_t *et4000) { - et4000->acl.dest_addr -= c; - et4000->acl.pattern_x -= c; - et4000->acl.source_x -= c; - et4000->acl.mix_addr -= c; + et4000->acl.dest_addr -= c; + et4000->acl.pattern_x -= c; + et4000->acl.source_x -= c; + et4000->acl.mix_addr -= c; if (et4000->acl.pattern_x < 0) - et4000->acl.pattern_x += et4000w32_max_x[et4000->acl.internal.pattern_wrap & 7]; - if (et4000->acl.source_x < 0) - et4000->acl.source_x += et4000w32_max_x[et4000->acl.internal.source_wrap & 7]; + et4000->acl.pattern_x += et4000w32_max_x[et4000->acl.internal.pattern_wrap & 7]; + if (et4000->acl.source_x < 0) + et4000->acl.source_x += et4000w32_max_x[et4000->acl.internal.source_wrap & 7]; } - void et4000w32_incy(et4000w32p_t *et4000) { - et4000->acl.pattern_addr += et4000->acl.internal.pattern_off + 1; - et4000->acl.source_addr += et4000->acl.internal.source_off + 1; - et4000->acl.mix_addr += et4000->acl.internal.mix_off + 1; - et4000->acl.dest_addr += et4000->acl.internal.dest_off + 1; + et4000->acl.pattern_addr += et4000->acl.internal.pattern_off + 1; + et4000->acl.source_addr += et4000->acl.internal.source_off + 1; + et4000->acl.mix_addr += et4000->acl.internal.mix_off + 1; + et4000->acl.dest_addr += et4000->acl.internal.dest_off + 1; et4000->acl.pattern_y++; if (et4000->acl.pattern_y == et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7]) { - et4000->acl.pattern_y = 0; - et4000->acl.pattern_addr = et4000->acl.pattern_back; + et4000->acl.pattern_y = 0; + et4000->acl.pattern_addr = et4000->acl.pattern_back; } et4000->acl.source_y++; if (et4000->acl.source_y == et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7]) { - et4000->acl.source_y = 0; - et4000->acl.source_addr = et4000->acl.source_back; + et4000->acl.source_y = 0; + et4000->acl.source_addr = et4000->acl.source_back; } } - void et4000w32_decy(et4000w32p_t *et4000) { - et4000->acl.pattern_addr -= et4000->acl.internal.pattern_off + 1; - et4000->acl.source_addr -= et4000->acl.internal.source_off + 1; - et4000->acl.mix_addr -= et4000->acl.internal.mix_off + 1; - et4000->acl.dest_addr -= et4000->acl.internal.dest_off + 1; + et4000->acl.pattern_addr -= et4000->acl.internal.pattern_off + 1; + et4000->acl.source_addr -= et4000->acl.internal.source_off + 1; + et4000->acl.mix_addr -= et4000->acl.internal.mix_off + 1; + et4000->acl.dest_addr -= et4000->acl.internal.dest_off + 1; et4000->acl.pattern_y--; if (et4000->acl.pattern_y < 0 && !(et4000->acl.internal.pattern_wrap & 0x40)) { - et4000->acl.pattern_y = et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7] - 1; - et4000->acl.pattern_addr = et4000->acl.pattern_back + (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] * (et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7] - 1)); + et4000->acl.pattern_y = et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7] - 1; + et4000->acl.pattern_addr = et4000->acl.pattern_back + (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] * (et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7] - 1)); } et4000->acl.source_y--; if (et4000->acl.source_y < 0 && !(et4000->acl.internal.source_wrap & 0x40)) { - et4000->acl.source_y = et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7] - 1; - et4000->acl.source_addr = et4000->acl.source_back + (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] *(et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7] - 1)); + et4000->acl.source_y = et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7] - 1; + et4000->acl.source_addr = et4000->acl.source_back + (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] * (et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7] - 1)); } } - -#define ROPMIX(R, D, P, S, out) \ - { \ - switch (R) { \ - case 0x00: out = 0; break; \ - case 0x01: out = ~(D | (P | S)); break; \ - case 0x02: out = D & ~(P | S); break; \ - case 0x03: out = ~(P | S); break; \ - case 0x04: out = S & ~(D | P); break; \ - case 0x05: out = ~(D | P); break; \ - case 0x06: out = ~(P | ~(D ^ S)); break; \ - case 0x07: out = ~(P | (D & S)); break; \ - case 0x08: out = S & (D & ~P); break; \ - case 0x09: out = ~(P | (D ^ S)); break; \ - case 0x0a: out = D & ~P; break; \ - case 0x0b: out = ~(P | (S & ~D)); break; \ - case 0x0c: out = S & ~P; break; \ - case 0x0d: out = ~(P | (D & ~S)); break; \ - case 0x0e: out = ~(P | ~(D | S)); break; \ - case 0x0f: out = ~P; break; \ - case 0x10: out = P & ~(D | S); break; \ - case 0x11: out = ~(D | S); break; \ - case 0x12: out = ~(S | ~(D ^ P)); break; \ - case 0x13: out = ~(S | (D & P)); break; \ - case 0x14: out = ~(D | ~(P ^ S)); break; \ - case 0x15: out = ~(D | (P & S)); break; \ - case 0x16: out = P ^ (S ^ (D & ~(P & S))); break; \ - case 0x17: out = ~(S ^ ((S ^ P) & (D ^ S))); break; \ - case 0x18: out = (S ^ P) & (P ^ D); break; \ - case 0x19: out = ~(S ^ (D & ~(P & S))); break; \ - case 0x1a: out = P ^ (D | (S & P)); break; \ - case 0x1b: out = ~(S ^ (D & (P ^ S))); break; \ - case 0x1c: out = P ^ (S | (D & P)); break; \ - case 0x1d: out = ~(D ^ (S & (P ^ D))); break; \ - case 0x1e: out = P ^ (D | S); break; \ - case 0x1f: out = ~(P & (D | S)); break; \ - case 0x20: out = D & (P & ~S); break; \ - case 0x21: out = ~(S | (D ^ P)); break; \ - case 0x22: out = D & ~S; break; \ - case 0x23: out = ~(S | (P & ~D)); break; \ - case 0x24: out = (S ^ P) & (D ^ S); break; \ - case 0x25: out = ~(P ^ (D & ~(S & P))); break; \ - case 0x26: out = S ^ (D | (P & S)); break; \ - case 0x27: out = S ^ (D | ~(P ^ S)); break; \ - case 0x28: out = D & (P ^ S); break; \ - case 0x29: out = ~(P ^ (S ^ (D | (P & S)))); break; \ - case 0x2a: out = D & ~(P & S); break; \ - case 0x2b: out = ~(S ^ ((S ^ P) & (P ^ D))); break; \ - case 0x2c: out = S ^ (P & (D | S)); break; \ - case 0x2d: out = P ^ (S | ~D); break; \ - case 0x2e: out = P ^ (S | (D ^ P)); break; \ - case 0x2f: out = ~(P & (S | ~D)); break; \ - case 0x30: out = P & ~S; break; \ - case 0x31: out = ~(S | (D & ~P)); break; \ - case 0x32: out = S ^ (D | (P | S)); break; \ - case 0x33: out = ~S; break; \ - case 0x34: out = S ^ (P | (D & S)); break; \ - case 0x35: out = S ^ (P | ~(D ^ S)); break; \ - case 0x36: out = S ^ (D | P); break; \ - case 0x37: out = ~(S & (D | P)); break; \ - case 0x38: out = P ^ (S & (D | P)); break; \ - case 0x39: out = S ^ (P | ~D); break; \ - case 0x3a: out = S ^ (P | (D ^ S)); break; \ - case 0x3b: out = ~(S & (P | ~D)); break; \ - case 0x3c: out = P ^ S; break; \ - case 0x3d: out = S ^ (P | ~(D | S)); break; \ - case 0x3e: out = S ^ (P | (D & ~S)); break; \ - case 0x3f: out = ~(P & S); break; \ - case 0x40: out = P & (S & ~D); break; \ - case 0x41: out = ~(D | (P ^ S)); break; \ - case 0x42: out = (S ^ D) & (P ^ D); break; \ - case 0x43: out = ~(S ^ (P & ~(D & S))); break; \ - case 0x44: out = S & ~D; break; \ - case 0x45: out = ~(D | (P & ~S)); break; \ - case 0x46: out = D ^ (S | (P & D)); break; \ - case 0x47: out = ~(P ^ (S & (D ^ P))); break; \ - case 0x48: out = S & (D ^ P); break; \ - case 0x49: out = ~(P ^ (D ^ (S | (P & D)))); break; \ - case 0x4a: out = D ^ (P & (S | D)); break; \ - case 0x4b: out = P ^ (D | ~S); break; \ - case 0x4c: out = S & ~(D & P); break; \ - case 0x4d: out = ~(S ^ ((S ^ P) | (D ^ S))); break; \ - case 0x4e: out = P ^ (D | (S ^ P)); break; \ - case 0x4f: out = ~(P & (D | ~S)); break; \ - case 0x50: out = P & ~D; break; \ - case 0x51: out = ~(D | (S & ~P)); break; \ - case 0x52: out = D ^ (P | (S & D)); break; \ - case 0x53: out = ~(S ^ (P & (D ^ S))); break; \ - case 0x54: out = ~(D | ~(P | S)); break; \ - case 0x55: out = ~D; break; \ - case 0x56: out = D ^ (P | S); break; \ - case 0x57: out = ~(D & (P | S)); break; \ - case 0x58: out = P ^ (D & (S | P)); break; \ - case 0x59: out = D ^ (P | ~S); break; \ - case 0x5a: out = D ^ P; break; \ - case 0x5b: out = D ^ (P | ~(S | D)); break; \ - case 0x5c: out = D ^ (P | (S ^ D)); break; \ - case 0x5d: out = ~(D & (P | ~S)); break; \ - case 0x5e: out = D ^ (P | (S & ~D)); break; \ - case 0x5f: out = ~(D & P); break; \ - case 0x60: out = P & (D ^ S); break; \ - case 0x61: out = ~(D ^ (S ^ (P | (D & S)))); break; \ - case 0x62: out = D ^ (S & (P | D)); break; \ - case 0x63: out = S ^ (D | ~P); break; \ - case 0x64: out = S ^ (D & (P | S)); break; \ - case 0x65: out = D ^ (S | ~P); break; \ - case 0x66: out = D ^ S; break; \ - case 0x67: out = S ^ (D | ~(P | S)); break; \ - case 0x68: out = ~(D ^ (S ^ (P | ~(D | S)))); break; \ - case 0x69: out = ~(P ^ (D ^ S)); break; \ - case 0x6a: out = D ^ (P & S); break; \ - case 0x6b: out = ~(P ^ (S ^ (D & (P | S)))); break; \ - case 0x6c: out = S ^ (D & P); break; \ - case 0x6d: out = ~(P ^ (D ^ (S & (P | D)))); break; \ - case 0x6e: out = S ^ (D & (P | ~S)); break; \ - case 0x6f: out = ~(P & ~(D ^ S)); break; \ - case 0x70: out = P & ~(D & S); break; \ - case 0x71: out = ~(S ^ ((S ^ D) & (P ^ D))); break; \ - case 0x72: out = S ^ (D | (P ^ S)); break; \ - case 0x73: out = ~(S & (D | ~P)); break; \ - case 0x74: out = D ^ (S | (P ^ D)); break; \ - case 0x75: out = ~(D & (S | ~P)); break; \ - case 0x76: out = S ^ (D | (P & ~S)); break; \ - case 0x77: out = ~(D & S); break; \ - case 0x78: out = P ^ (D & S); break; \ - case 0x79: out = ~(D ^ (S ^ (P & (D | S)))); break; \ - case 0x7a: out = D ^ (P & (S | ~D)); break; \ - case 0x7b: out = ~(S & ~(D ^ P)); break; \ - case 0x7c: out = S ^ (P & (D | ~S)); break; \ - case 0x7d: out = ~(D & ~(P ^ S)); break; \ - case 0x7e: out = (S ^ P) | (D ^ S); break; \ - case 0x7f: out = ~(D & (P & S)); break; \ - case 0x80: out = D & (P & S); break; \ - case 0x81: out = ~((S ^ P) | (D ^ S)); break; \ - case 0x82: out = D & ~(P ^ S); break; \ - case 0x83: out = ~(S ^ (P & (D | ~S))); break; \ - case 0x84: out = S & ~(D ^ P); break; \ - case 0x85: out = ~(P ^ (D & (S | ~P))); break; \ - case 0x86: out = D ^ (S ^ (P & (D | S))); break; \ - case 0x87: out = ~(P ^ (D & S)); break; \ - case 0x88: out = D & S; break; \ - case 0x89: out = ~(S ^ (D | (P & ~S))); break; \ - case 0x8a: out = D & (S | ~P); break; \ - case 0x8b: out = ~(D ^ (S | (P ^ D))); break; \ - case 0x8c: out = S & (D | ~P); break; \ - case 0x8d: out = ~(S ^ (D | (P ^ S))); break; \ - case 0x8e: out = S ^ ((S ^ D) & (P ^ D)); break; \ - case 0x8f: out = ~(P & ~(D & S)); break; \ - case 0x90: out = P & ~(D ^ S); break; \ - case 0x91: out = ~(S ^ (D & (P | ~S))); break; \ - case 0x92: out = D ^ (P ^ (S & (D | P))); break; \ - case 0x93: out = ~(S ^ (P & D)); break; \ - case 0x94: out = P ^ (S ^ (D & (P | S))); break; \ - case 0x95: out = ~(D ^ (P & S)); break; \ - case 0x96: out = D ^ (P ^ S); break; \ - case 0x97: out = P ^ (S ^ (D | ~(P | S))); break; \ - case 0x98: out = ~(S ^ (D | ~(P | S))); break; \ - case 0x99: out = ~(D ^ S); break; \ - case 0x9a: out = D ^ (P & ~S); break; \ - case 0x9b: out = ~(S ^ (D & (P | S))); break; \ - case 0x9c: out = S ^ (P & ~D); break; \ - case 0x9d: out = ~(D ^ (S & (P | D))); break; \ - case 0x9e: out = D ^ (S ^ (P | (D & S))); break; \ - case 0x9f: out = ~(P & (D ^ S)); break; \ - case 0xa0: out = D & P; break; \ - case 0xa1: out = ~(P ^ (D | (S & ~P))); break; \ - case 0xa2: out = D & (P | ~S); break; \ - case 0xa3: out = ~(D ^ (P | (S ^ D))); break; \ - case 0xa4: out = ~(P ^ (D | ~(S | P))); break; \ - case 0xa5: out = ~(P ^ D); break; \ - case 0xa6: out = D ^ (S & ~P); break; \ - case 0xa7: out = ~(P ^ (D & (S | P))); break; \ - case 0xa8: out = D & (P | S); break; \ - case 0xa9: out = ~(D ^ (P | S)); break; \ - case 0xaa: out = D; break; \ - case 0xab: out = D | ~(P | S); break; \ - case 0xac: out = S ^ (P & (D ^ S)); break; \ - case 0xad: out = ~(D ^ (P | (S & D))); break; \ - case 0xae: out = D | (S & ~P); break; \ - case 0xaf: out = D | ~P; break; \ - case 0xb0: out = P & (D | ~S); break; \ - case 0xb1: out = ~(P ^ (D | (S ^ P))); break; \ - case 0xb2: out = S ^ ((S ^ P) | (D ^ S)); break; \ - case 0xb3: out = ~(S & ~(D & P)); break; \ - case 0xb4: out = P ^ (S & ~D); break; \ - case 0xb5: out = ~(D ^ (P & (S | D))); break; \ - case 0xb6: out = D ^ (P ^ (S | (D & P))); break; \ - case 0xb7: out = ~(S & (D ^ P)); break; \ - case 0xb8: out = P ^ (S & (D ^ P)); break; \ - case 0xb9: out = ~(D ^ (S | (P & D))); break; \ - case 0xba: out = D | (P & ~S); break; \ - case 0xbb: out = D | ~S; break; \ - case 0xbc: out = S ^ (P & ~(D & S)); break; \ - case 0xbd: out = ~((S ^ D) & (P ^ D)); break; \ - case 0xbe: out = D | (P ^ S); break; \ - case 0xbf: out = D | ~(P & S); break; \ - case 0xc0: out = P & S; break; \ - case 0xc1: out = ~(S ^ (P | (D & ~S))); break; \ - case 0xc2: out = ~(S ^ (P | ~(D | S))); break; \ - case 0xc3: out = ~(P ^ S); break; \ - case 0xc4: out = S & (P | ~D); break; \ - case 0xc5: out = ~(S ^ (P | (D ^ S))); break; \ - case 0xc6: out = S ^ (D & ~P); break; \ - case 0xc7: out = ~(P ^ (S & (D | P))); break; \ - case 0xc8: out = S & (D | P); break; \ - case 0xc9: out = ~(S ^ (P | D)); break; \ - case 0xca: out = D ^ (P & (S ^ D)); break; \ - case 0xcb: out = ~(S ^ (P | (D & S))); break; \ - case 0xcc: out = S; break; \ - case 0xcd: out = S | ~(D | P); break; \ - case 0xce: out = S | (D & ~P); break; \ - case 0xcf: out = S | ~P; break; \ - case 0xd0: out = P & (S | ~D); break; \ - case 0xd1: out = ~(P ^ (S | (D ^ P))); break; \ - case 0xd2: out = P ^ (D & ~S); break; \ - case 0xd3: out = ~(S ^ (P & (D | S))); break; \ - case 0xd4: out = S ^ ((S ^ P) & (P ^ D)); break; \ - case 0xd5: out = ~(D & ~(P & S)); break; \ - case 0xd6: out = P ^ (S ^ (D | (P & S))); break; \ - case 0xd7: out = ~(D & (P ^ S)); break; \ - case 0xd8: out = P ^ (D & (S ^ P)); break; \ - case 0xd9: out = ~(S ^ (D | (P & S))); break; \ - case 0xda: out = D ^ (P & ~(S & D)); break; \ - case 0xdb: out = ~((S ^ P) & (D ^ S)); break; \ - case 0xdc: out = S | (P & ~D); break; \ - case 0xdd: out = S | ~D; break; \ - case 0xde: out = S | (D ^ P); break; \ - case 0xdf: out = S | ~(D & P); break; \ - case 0xe0: out = P & (D | S); break; \ - case 0xe1: out = ~(P ^ (D | S)); break; \ - case 0xe2: out = D ^ (S & (P ^ D)); break; \ - case 0xe3: out = ~(P ^ (S | (D & P))); break; \ - case 0xe4: out = S ^ (D & (P ^ S)); break; \ - case 0xe5: out = ~(P ^ (D | (S & P))); break; \ - case 0xe6: out = S ^ (D & ~(P & S)); break; \ - case 0xe7: out = ~((S ^ P) & (P ^ D)); break; \ - case 0xe8: out = S ^ ((S ^ P) & (D ^ S)); break; \ - case 0xe9: out = ~(D ^ (S ^ (P & ~(D & S)))); break; \ - case 0xea: out = D | (P & S); break; \ - case 0xeb: out = D | ~(P ^ S); break; \ - case 0xec: out = S | (D & P); break; \ - case 0xed: out = S | ~(D ^ P); break; \ - case 0xee: out = D | S; break; \ - case 0xef: out = S | (D | ~P); break; \ - case 0xf0: out = P; break; \ - case 0xf1: out = P | ~(D | S); break; \ - case 0xf2: out = P | (D & ~S); break; \ - case 0xf3: out = P | ~S; break; \ - case 0xf4: out = P | (S & ~D); break; \ - case 0xf5: out = P | ~D; break; \ - case 0xf6: out = P | (D ^ S); break; \ - case 0xf7: out = P | ~(D & S); break; \ - case 0xf8: out = P | (D & S); break; \ - case 0xf9: out = P | ~(D ^ S); break; \ - case 0xfa: out = D | P; break; \ - case 0xfb: out = D | (P | ~S); break; \ - case 0xfc: out = P | S; break; \ - case 0xfd: out = P | (S | ~D); break; \ - case 0xfe: out = D | (P | S); break; \ - case 0xff: out = ~0; break; \ - } \ - } +#define ROPMIX(R, D, P, S, out) \ + { \ + switch (R) { \ + case 0x00: \ + out = 0; \ + break; \ + case 0x01: \ + out = ~(D | (P | S)); \ + break; \ + case 0x02: \ + out = D & ~(P | S); \ + break; \ + case 0x03: \ + out = ~(P | S); \ + break; \ + case 0x04: \ + out = S & ~(D | P); \ + break; \ + case 0x05: \ + out = ~(D | P); \ + break; \ + case 0x06: \ + out = ~(P | ~(D ^ S)); \ + break; \ + case 0x07: \ + out = ~(P | (D & S)); \ + break; \ + case 0x08: \ + out = S & (D & ~P); \ + break; \ + case 0x09: \ + out = ~(P | (D ^ S)); \ + break; \ + case 0x0a: \ + out = D & ~P; \ + break; \ + case 0x0b: \ + out = ~(P | (S & ~D)); \ + break; \ + case 0x0c: \ + out = S & ~P; \ + break; \ + case 0x0d: \ + out = ~(P | (D & ~S)); \ + break; \ + case 0x0e: \ + out = ~(P | ~(D | S)); \ + break; \ + case 0x0f: \ + out = ~P; \ + break; \ + case 0x10: \ + out = P & ~(D | S); \ + break; \ + case 0x11: \ + out = ~(D | S); \ + break; \ + case 0x12: \ + out = ~(S | ~(D ^ P)); \ + break; \ + case 0x13: \ + out = ~(S | (D & P)); \ + break; \ + case 0x14: \ + out = ~(D | ~(P ^ S)); \ + break; \ + case 0x15: \ + out = ~(D | (P & S)); \ + break; \ + case 0x16: \ + out = P ^ (S ^ (D & ~(P & S))); \ + break; \ + case 0x17: \ + out = ~(S ^ ((S ^ P) & (D ^ S))); \ + break; \ + case 0x18: \ + out = (S ^ P) & (P ^ D); \ + break; \ + case 0x19: \ + out = ~(S ^ (D & ~(P & S))); \ + break; \ + case 0x1a: \ + out = P ^ (D | (S & P)); \ + break; \ + case 0x1b: \ + out = ~(S ^ (D & (P ^ S))); \ + break; \ + case 0x1c: \ + out = P ^ (S | (D & P)); \ + break; \ + case 0x1d: \ + out = ~(D ^ (S & (P ^ D))); \ + break; \ + case 0x1e: \ + out = P ^ (D | S); \ + break; \ + case 0x1f: \ + out = ~(P & (D | S)); \ + break; \ + case 0x20: \ + out = D & (P & ~S); \ + break; \ + case 0x21: \ + out = ~(S | (D ^ P)); \ + break; \ + case 0x22: \ + out = D & ~S; \ + break; \ + case 0x23: \ + out = ~(S | (P & ~D)); \ + break; \ + case 0x24: \ + out = (S ^ P) & (D ^ S); \ + break; \ + case 0x25: \ + out = ~(P ^ (D & ~(S & P))); \ + break; \ + case 0x26: \ + out = S ^ (D | (P & S)); \ + break; \ + case 0x27: \ + out = S ^ (D | ~(P ^ S)); \ + break; \ + case 0x28: \ + out = D & (P ^ S); \ + break; \ + case 0x29: \ + out = ~(P ^ (S ^ (D | (P & S)))); \ + break; \ + case 0x2a: \ + out = D & ~(P & S); \ + break; \ + case 0x2b: \ + out = ~(S ^ ((S ^ P) & (P ^ D))); \ + break; \ + case 0x2c: \ + out = S ^ (P & (D | S)); \ + break; \ + case 0x2d: \ + out = P ^ (S | ~D); \ + break; \ + case 0x2e: \ + out = P ^ (S | (D ^ P)); \ + break; \ + case 0x2f: \ + out = ~(P & (S | ~D)); \ + break; \ + case 0x30: \ + out = P & ~S; \ + break; \ + case 0x31: \ + out = ~(S | (D & ~P)); \ + break; \ + case 0x32: \ + out = S ^ (D | (P | S)); \ + break; \ + case 0x33: \ + out = ~S; \ + break; \ + case 0x34: \ + out = S ^ (P | (D & S)); \ + break; \ + case 0x35: \ + out = S ^ (P | ~(D ^ S)); \ + break; \ + case 0x36: \ + out = S ^ (D | P); \ + break; \ + case 0x37: \ + out = ~(S & (D | P)); \ + break; \ + case 0x38: \ + out = P ^ (S & (D | P)); \ + break; \ + case 0x39: \ + out = S ^ (P | ~D); \ + break; \ + case 0x3a: \ + out = S ^ (P | (D ^ S)); \ + break; \ + case 0x3b: \ + out = ~(S & (P | ~D)); \ + break; \ + case 0x3c: \ + out = P ^ S; \ + break; \ + case 0x3d: \ + out = S ^ (P | ~(D | S)); \ + break; \ + case 0x3e: \ + out = S ^ (P | (D & ~S)); \ + break; \ + case 0x3f: \ + out = ~(P & S); \ + break; \ + case 0x40: \ + out = P & (S & ~D); \ + break; \ + case 0x41: \ + out = ~(D | (P ^ S)); \ + break; \ + case 0x42: \ + out = (S ^ D) & (P ^ D); \ + break; \ + case 0x43: \ + out = ~(S ^ (P & ~(D & S))); \ + break; \ + case 0x44: \ + out = S & ~D; \ + break; \ + case 0x45: \ + out = ~(D | (P & ~S)); \ + break; \ + case 0x46: \ + out = D ^ (S | (P & D)); \ + break; \ + case 0x47: \ + out = ~(P ^ (S & (D ^ P))); \ + break; \ + case 0x48: \ + out = S & (D ^ P); \ + break; \ + case 0x49: \ + out = ~(P ^ (D ^ (S | (P & D)))); \ + break; \ + case 0x4a: \ + out = D ^ (P & (S | D)); \ + break; \ + case 0x4b: \ + out = P ^ (D | ~S); \ + break; \ + case 0x4c: \ + out = S & ~(D & P); \ + break; \ + case 0x4d: \ + out = ~(S ^ ((S ^ P) | (D ^ S))); \ + break; \ + case 0x4e: \ + out = P ^ (D | (S ^ P)); \ + break; \ + case 0x4f: \ + out = ~(P & (D | ~S)); \ + break; \ + case 0x50: \ + out = P & ~D; \ + break; \ + case 0x51: \ + out = ~(D | (S & ~P)); \ + break; \ + case 0x52: \ + out = D ^ (P | (S & D)); \ + break; \ + case 0x53: \ + out = ~(S ^ (P & (D ^ S))); \ + break; \ + case 0x54: \ + out = ~(D | ~(P | S)); \ + break; \ + case 0x55: \ + out = ~D; \ + break; \ + case 0x56: \ + out = D ^ (P | S); \ + break; \ + case 0x57: \ + out = ~(D & (P | S)); \ + break; \ + case 0x58: \ + out = P ^ (D & (S | P)); \ + break; \ + case 0x59: \ + out = D ^ (P | ~S); \ + break; \ + case 0x5a: \ + out = D ^ P; \ + break; \ + case 0x5b: \ + out = D ^ (P | ~(S | D)); \ + break; \ + case 0x5c: \ + out = D ^ (P | (S ^ D)); \ + break; \ + case 0x5d: \ + out = ~(D & (P | ~S)); \ + break; \ + case 0x5e: \ + out = D ^ (P | (S & ~D)); \ + break; \ + case 0x5f: \ + out = ~(D & P); \ + break; \ + case 0x60: \ + out = P & (D ^ S); \ + break; \ + case 0x61: \ + out = ~(D ^ (S ^ (P | (D & S)))); \ + break; \ + case 0x62: \ + out = D ^ (S & (P | D)); \ + break; \ + case 0x63: \ + out = S ^ (D | ~P); \ + break; \ + case 0x64: \ + out = S ^ (D & (P | S)); \ + break; \ + case 0x65: \ + out = D ^ (S | ~P); \ + break; \ + case 0x66: \ + out = D ^ S; \ + break; \ + case 0x67: \ + out = S ^ (D | ~(P | S)); \ + break; \ + case 0x68: \ + out = ~(D ^ (S ^ (P | ~(D | S)))); \ + break; \ + case 0x69: \ + out = ~(P ^ (D ^ S)); \ + break; \ + case 0x6a: \ + out = D ^ (P & S); \ + break; \ + case 0x6b: \ + out = ~(P ^ (S ^ (D & (P | S)))); \ + break; \ + case 0x6c: \ + out = S ^ (D & P); \ + break; \ + case 0x6d: \ + out = ~(P ^ (D ^ (S & (P | D)))); \ + break; \ + case 0x6e: \ + out = S ^ (D & (P | ~S)); \ + break; \ + case 0x6f: \ + out = ~(P & ~(D ^ S)); \ + break; \ + case 0x70: \ + out = P & ~(D & S); \ + break; \ + case 0x71: \ + out = ~(S ^ ((S ^ D) & (P ^ D))); \ + break; \ + case 0x72: \ + out = S ^ (D | (P ^ S)); \ + break; \ + case 0x73: \ + out = ~(S & (D | ~P)); \ + break; \ + case 0x74: \ + out = D ^ (S | (P ^ D)); \ + break; \ + case 0x75: \ + out = ~(D & (S | ~P)); \ + break; \ + case 0x76: \ + out = S ^ (D | (P & ~S)); \ + break; \ + case 0x77: \ + out = ~(D & S); \ + break; \ + case 0x78: \ + out = P ^ (D & S); \ + break; \ + case 0x79: \ + out = ~(D ^ (S ^ (P & (D | S)))); \ + break; \ + case 0x7a: \ + out = D ^ (P & (S | ~D)); \ + break; \ + case 0x7b: \ + out = ~(S & ~(D ^ P)); \ + break; \ + case 0x7c: \ + out = S ^ (P & (D | ~S)); \ + break; \ + case 0x7d: \ + out = ~(D & ~(P ^ S)); \ + break; \ + case 0x7e: \ + out = (S ^ P) | (D ^ S); \ + break; \ + case 0x7f: \ + out = ~(D & (P & S)); \ + break; \ + case 0x80: \ + out = D & (P & S); \ + break; \ + case 0x81: \ + out = ~((S ^ P) | (D ^ S)); \ + break; \ + case 0x82: \ + out = D & ~(P ^ S); \ + break; \ + case 0x83: \ + out = ~(S ^ (P & (D | ~S))); \ + break; \ + case 0x84: \ + out = S & ~(D ^ P); \ + break; \ + case 0x85: \ + out = ~(P ^ (D & (S | ~P))); \ + break; \ + case 0x86: \ + out = D ^ (S ^ (P & (D | S))); \ + break; \ + case 0x87: \ + out = ~(P ^ (D & S)); \ + break; \ + case 0x88: \ + out = D & S; \ + break; \ + case 0x89: \ + out = ~(S ^ (D | (P & ~S))); \ + break; \ + case 0x8a: \ + out = D & (S | ~P); \ + break; \ + case 0x8b: \ + out = ~(D ^ (S | (P ^ D))); \ + break; \ + case 0x8c: \ + out = S & (D | ~P); \ + break; \ + case 0x8d: \ + out = ~(S ^ (D | (P ^ S))); \ + break; \ + case 0x8e: \ + out = S ^ ((S ^ D) & (P ^ D)); \ + break; \ + case 0x8f: \ + out = ~(P & ~(D & S)); \ + break; \ + case 0x90: \ + out = P & ~(D ^ S); \ + break; \ + case 0x91: \ + out = ~(S ^ (D & (P | ~S))); \ + break; \ + case 0x92: \ + out = D ^ (P ^ (S & (D | P))); \ + break; \ + case 0x93: \ + out = ~(S ^ (P & D)); \ + break; \ + case 0x94: \ + out = P ^ (S ^ (D & (P | S))); \ + break; \ + case 0x95: \ + out = ~(D ^ (P & S)); \ + break; \ + case 0x96: \ + out = D ^ (P ^ S); \ + break; \ + case 0x97: \ + out = P ^ (S ^ (D | ~(P | S))); \ + break; \ + case 0x98: \ + out = ~(S ^ (D | ~(P | S))); \ + break; \ + case 0x99: \ + out = ~(D ^ S); \ + break; \ + case 0x9a: \ + out = D ^ (P & ~S); \ + break; \ + case 0x9b: \ + out = ~(S ^ (D & (P | S))); \ + break; \ + case 0x9c: \ + out = S ^ (P & ~D); \ + break; \ + case 0x9d: \ + out = ~(D ^ (S & (P | D))); \ + break; \ + case 0x9e: \ + out = D ^ (S ^ (P | (D & S))); \ + break; \ + case 0x9f: \ + out = ~(P & (D ^ S)); \ + break; \ + case 0xa0: \ + out = D & P; \ + break; \ + case 0xa1: \ + out = ~(P ^ (D | (S & ~P))); \ + break; \ + case 0xa2: \ + out = D & (P | ~S); \ + break; \ + case 0xa3: \ + out = ~(D ^ (P | (S ^ D))); \ + break; \ + case 0xa4: \ + out = ~(P ^ (D | ~(S | P))); \ + break; \ + case 0xa5: \ + out = ~(P ^ D); \ + break; \ + case 0xa6: \ + out = D ^ (S & ~P); \ + break; \ + case 0xa7: \ + out = ~(P ^ (D & (S | P))); \ + break; \ + case 0xa8: \ + out = D & (P | S); \ + break; \ + case 0xa9: \ + out = ~(D ^ (P | S)); \ + break; \ + case 0xaa: \ + out = D; \ + break; \ + case 0xab: \ + out = D | ~(P | S); \ + break; \ + case 0xac: \ + out = S ^ (P & (D ^ S)); \ + break; \ + case 0xad: \ + out = ~(D ^ (P | (S & D))); \ + break; \ + case 0xae: \ + out = D | (S & ~P); \ + break; \ + case 0xaf: \ + out = D | ~P; \ + break; \ + case 0xb0: \ + out = P & (D | ~S); \ + break; \ + case 0xb1: \ + out = ~(P ^ (D | (S ^ P))); \ + break; \ + case 0xb2: \ + out = S ^ ((S ^ P) | (D ^ S)); \ + break; \ + case 0xb3: \ + out = ~(S & ~(D & P)); \ + break; \ + case 0xb4: \ + out = P ^ (S & ~D); \ + break; \ + case 0xb5: \ + out = ~(D ^ (P & (S | D))); \ + break; \ + case 0xb6: \ + out = D ^ (P ^ (S | (D & P))); \ + break; \ + case 0xb7: \ + out = ~(S & (D ^ P)); \ + break; \ + case 0xb8: \ + out = P ^ (S & (D ^ P)); \ + break; \ + case 0xb9: \ + out = ~(D ^ (S | (P & D))); \ + break; \ + case 0xba: \ + out = D | (P & ~S); \ + break; \ + case 0xbb: \ + out = D | ~S; \ + break; \ + case 0xbc: \ + out = S ^ (P & ~(D & S)); \ + break; \ + case 0xbd: \ + out = ~((S ^ D) & (P ^ D)); \ + break; \ + case 0xbe: \ + out = D | (P ^ S); \ + break; \ + case 0xbf: \ + out = D | ~(P & S); \ + break; \ + case 0xc0: \ + out = P & S; \ + break; \ + case 0xc1: \ + out = ~(S ^ (P | (D & ~S))); \ + break; \ + case 0xc2: \ + out = ~(S ^ (P | ~(D | S))); \ + break; \ + case 0xc3: \ + out = ~(P ^ S); \ + break; \ + case 0xc4: \ + out = S & (P | ~D); \ + break; \ + case 0xc5: \ + out = ~(S ^ (P | (D ^ S))); \ + break; \ + case 0xc6: \ + out = S ^ (D & ~P); \ + break; \ + case 0xc7: \ + out = ~(P ^ (S & (D | P))); \ + break; \ + case 0xc8: \ + out = S & (D | P); \ + break; \ + case 0xc9: \ + out = ~(S ^ (P | D)); \ + break; \ + case 0xca: \ + out = D ^ (P & (S ^ D)); \ + break; \ + case 0xcb: \ + out = ~(S ^ (P | (D & S))); \ + break; \ + case 0xcc: \ + out = S; \ + break; \ + case 0xcd: \ + out = S | ~(D | P); \ + break; \ + case 0xce: \ + out = S | (D & ~P); \ + break; \ + case 0xcf: \ + out = S | ~P; \ + break; \ + case 0xd0: \ + out = P & (S | ~D); \ + break; \ + case 0xd1: \ + out = ~(P ^ (S | (D ^ P))); \ + break; \ + case 0xd2: \ + out = P ^ (D & ~S); \ + break; \ + case 0xd3: \ + out = ~(S ^ (P & (D | S))); \ + break; \ + case 0xd4: \ + out = S ^ ((S ^ P) & (P ^ D)); \ + break; \ + case 0xd5: \ + out = ~(D & ~(P & S)); \ + break; \ + case 0xd6: \ + out = P ^ (S ^ (D | (P & S))); \ + break; \ + case 0xd7: \ + out = ~(D & (P ^ S)); \ + break; \ + case 0xd8: \ + out = P ^ (D & (S ^ P)); \ + break; \ + case 0xd9: \ + out = ~(S ^ (D | (P & S))); \ + break; \ + case 0xda: \ + out = D ^ (P & ~(S & D)); \ + break; \ + case 0xdb: \ + out = ~((S ^ P) & (D ^ S)); \ + break; \ + case 0xdc: \ + out = S | (P & ~D); \ + break; \ + case 0xdd: \ + out = S | ~D; \ + break; \ + case 0xde: \ + out = S | (D ^ P); \ + break; \ + case 0xdf: \ + out = S | ~(D & P); \ + break; \ + case 0xe0: \ + out = P & (D | S); \ + break; \ + case 0xe1: \ + out = ~(P ^ (D | S)); \ + break; \ + case 0xe2: \ + out = D ^ (S & (P ^ D)); \ + break; \ + case 0xe3: \ + out = ~(P ^ (S | (D & P))); \ + break; \ + case 0xe4: \ + out = S ^ (D & (P ^ S)); \ + break; \ + case 0xe5: \ + out = ~(P ^ (D | (S & P))); \ + break; \ + case 0xe6: \ + out = S ^ (D & ~(P & S)); \ + break; \ + case 0xe7: \ + out = ~((S ^ P) & (P ^ D)); \ + break; \ + case 0xe8: \ + out = S ^ ((S ^ P) & (D ^ S)); \ + break; \ + case 0xe9: \ + out = ~(D ^ (S ^ (P & ~(D & S)))); \ + break; \ + case 0xea: \ + out = D | (P & S); \ + break; \ + case 0xeb: \ + out = D | ~(P ^ S); \ + break; \ + case 0xec: \ + out = S | (D & P); \ + break; \ + case 0xed: \ + out = S | ~(D ^ P); \ + break; \ + case 0xee: \ + out = D | S; \ + break; \ + case 0xef: \ + out = S | (D | ~P); \ + break; \ + case 0xf0: \ + out = P; \ + break; \ + case 0xf1: \ + out = P | ~(D | S); \ + break; \ + case 0xf2: \ + out = P | (D & ~S); \ + break; \ + case 0xf3: \ + out = P | ~S; \ + break; \ + case 0xf4: \ + out = P | (S & ~D); \ + break; \ + case 0xf5: \ + out = P | ~D; \ + break; \ + case 0xf6: \ + out = P | (D ^ S); \ + break; \ + case 0xf7: \ + out = P | ~(D & S); \ + break; \ + case 0xf8: \ + out = P | (D & S); \ + break; \ + case 0xf9: \ + out = P | ~(D ^ S); \ + break; \ + case 0xfa: \ + out = D | P; \ + break; \ + case 0xfb: \ + out = D | (P | ~S); \ + break; \ + case 0xfc: \ + out = P | S; \ + break; \ + case 0xfd: \ + out = P | (S | ~D); \ + break; \ + case 0xfe: \ + out = D | (P | S); \ + break; \ + case 0xff: \ + out = ~0; \ + break; \ + } \ + } static void et4000w32_blit(int count, int cpu_input, uint32_t src_dat, uint32_t mix_dat, et4000w32p_t *et4000) @@ -1472,104 +2027,104 @@ et4000w32_blit(int count, int cpu_input, uint32_t src_dat, uint32_t mix_dat, et4 svga_t *svga = &et4000->svga; uint8_t pattern, source, dest; uint8_t rop; - uint8_t out; - int mixmap; + uint8_t out; + int mixmap; - while (count-- && et4000->acl.y_count >= 0) { - pattern = svga->vram[(et4000->acl.pattern_addr + et4000->acl.pattern_x) & et4000->vram_mask]; + while (count-- && et4000->acl.y_count >= 0) { + pattern = svga->vram[(et4000->acl.pattern_addr + et4000->acl.pattern_x) & et4000->vram_mask]; - if (cpu_input == 1) { - source = src_dat & 0xff; - src_dat >>= 8; - } else /*The source data is from the display memory if the Control Routing register is not set to 1*/ - source = svga->vram[(et4000->acl.source_addr + et4000->acl.source_x) & et4000->vram_mask]; + if (cpu_input == 1) { + source = src_dat & 0xff; + src_dat >>= 8; + } else /*The source data is from the display memory if the Control Routing register is not set to 1*/ + source = svga->vram[(et4000->acl.source_addr + et4000->acl.source_x) & et4000->vram_mask]; - dest = svga->vram[et4000->acl.dest_addr & et4000->vram_mask]; - mixmap = mix_dat & 1; + dest = svga->vram[et4000->acl.dest_addr & et4000->vram_mask]; + mixmap = mix_dat & 1; - /*Now determine the Raster Operation*/ - rop = mixmap ? et4000->acl.internal.rop_fg : et4000->acl.internal.rop_bg; - mix_dat >>= 1; - mix_dat |= 0x80000000; + /*Now determine the Raster Operation*/ + rop = mixmap ? et4000->acl.internal.rop_fg : et4000->acl.internal.rop_bg; + mix_dat >>= 1; + mix_dat |= 0x80000000; - ROPMIX(rop, dest, pattern, source, out); + ROPMIX(rop, dest, pattern, source, out); - /*Write the data*/ - svga->vram[et4000->acl.dest_addr & et4000->vram_mask] = out; - svga->changedvram[(et4000->acl.dest_addr & et4000->vram_mask) >> 12] = changeframecount; + /*Write the data*/ + svga->vram[et4000->acl.dest_addr & et4000->vram_mask] = out; + svga->changedvram[(et4000->acl.dest_addr & et4000->vram_mask) >> 12] = changeframecount; - if (et4000->acl.internal.xy_dir & 1) { - et4000->acl.dest_addr--; - et4000->acl.pattern_x--; - et4000->acl.source_x--; - if (et4000->acl.pattern_x < 0) - et4000->acl.pattern_x += (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1); - if (et4000->acl.source_x < 0) - et4000->acl.source_x += (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1); - } else { - et4000->acl.dest_addr++; - et4000->acl.pattern_x++; - et4000->acl.source_x++; - if (et4000->acl.pattern_x >= (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1)) - et4000->acl.pattern_x -= (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1); - if (et4000->acl.source_x >= (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1)) - et4000->acl.source_x -= (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1); - } + if (et4000->acl.internal.xy_dir & 1) { + et4000->acl.dest_addr--; + et4000->acl.pattern_x--; + et4000->acl.source_x--; + if (et4000->acl.pattern_x < 0) + et4000->acl.pattern_x += (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1); + if (et4000->acl.source_x < 0) + et4000->acl.source_x += (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1); + } else { + et4000->acl.dest_addr++; + et4000->acl.pattern_x++; + et4000->acl.source_x++; + if (et4000->acl.pattern_x >= (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1)) + et4000->acl.pattern_x -= (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] + 1); + if (et4000->acl.source_x >= (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1)) + et4000->acl.source_x -= (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] + 1); + } - et4000->acl.x_count--; - if (et4000->acl.x_count == 0xffff) { - et4000->acl.x_count = et4000->acl.internal.count_x; + et4000->acl.x_count--; + if (et4000->acl.x_count == 0xffff) { + et4000->acl.x_count = et4000->acl.internal.count_x; - if (et4000->acl.internal.xy_dir & 2) { - et4000->acl.pattern_addr -= (et4000->acl.internal.pattern_off + 1); - et4000->acl.source_addr -= (et4000->acl.internal.source_off + 1); - et4000->acl.dest_addr -= (et4000->acl.internal.dest_off + 1); - et4000->acl.pattern_y--; - if ((et4000->acl.pattern_y < 0) && !(et4000->acl.internal.pattern_wrap & 0x40)) { - et4000->acl.pattern_y = et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7] - 1; - et4000->acl.pattern_addr = et4000->acl.pattern_back + (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] * (et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7] - 1)); - } - et4000->acl.source_y--; - if ((et4000->acl.source_y < 0) && !(et4000->acl.internal.source_wrap & 0x40)) { - et4000->acl.source_y = et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7] - 1; - et4000->acl.source_addr = et4000->acl.source_back + (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] * (et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7] - 1)); - } - et4000->acl.dest_back = et4000->acl.dest_addr = et4000->acl.dest_back - (et4000->acl.internal.dest_off + 1); - } else { - et4000->acl.pattern_addr += (et4000->acl.internal.pattern_off + 1); - et4000->acl.source_addr += (et4000->acl.internal.source_off + 1); - et4000->acl.dest_addr += (et4000->acl.internal.dest_off + 1); - et4000->acl.pattern_y++; - if (et4000->acl.pattern_y == et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7]) { - et4000->acl.pattern_y = 0; - et4000->acl.pattern_addr = et4000->acl.pattern_back; - } - et4000->acl.source_y++; - if (et4000->acl.source_y == et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7]) { - et4000->acl.source_y = 0; - et4000->acl.source_addr = et4000->acl.source_back; - } - et4000->acl.dest_back = et4000->acl.dest_addr = et4000->acl.dest_back + (et4000->acl.internal.dest_off + 1); - } + if (et4000->acl.internal.xy_dir & 2) { + et4000->acl.pattern_addr -= (et4000->acl.internal.pattern_off + 1); + et4000->acl.source_addr -= (et4000->acl.internal.source_off + 1); + et4000->acl.dest_addr -= (et4000->acl.internal.dest_off + 1); + et4000->acl.pattern_y--; + if ((et4000->acl.pattern_y < 0) && !(et4000->acl.internal.pattern_wrap & 0x40)) { + et4000->acl.pattern_y = et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7] - 1; + et4000->acl.pattern_addr = et4000->acl.pattern_back + (et4000w32_wrap_x[et4000->acl.internal.pattern_wrap & 7] * (et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7] - 1)); + } + et4000->acl.source_y--; + if ((et4000->acl.source_y < 0) && !(et4000->acl.internal.source_wrap & 0x40)) { + et4000->acl.source_y = et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7] - 1; + et4000->acl.source_addr = et4000->acl.source_back + (et4000w32_wrap_x[et4000->acl.internal.source_wrap & 7] * (et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7] - 1)); + } + et4000->acl.dest_back = et4000->acl.dest_addr = et4000->acl.dest_back - (et4000->acl.internal.dest_off + 1); + } else { + et4000->acl.pattern_addr += (et4000->acl.internal.pattern_off + 1); + et4000->acl.source_addr += (et4000->acl.internal.source_off + 1); + et4000->acl.dest_addr += (et4000->acl.internal.dest_off + 1); + et4000->acl.pattern_y++; + if (et4000->acl.pattern_y == et4000w32_wrap_y[(et4000->acl.internal.pattern_wrap >> 4) & 7]) { + et4000->acl.pattern_y = 0; + et4000->acl.pattern_addr = et4000->acl.pattern_back; + } + et4000->acl.source_y++; + if (et4000->acl.source_y == et4000w32_wrap_y[(et4000->acl.internal.source_wrap >> 4) & 7]) { + et4000->acl.source_y = 0; + et4000->acl.source_addr = et4000->acl.source_back; + } + et4000->acl.dest_back = et4000->acl.dest_addr = et4000->acl.dest_back + (et4000->acl.internal.dest_off + 1); + } - et4000->acl.pattern_x = et4000->acl.pattern_x_back; - et4000->acl.source_x = et4000->acl.source_x_back; + et4000->acl.pattern_x = et4000->acl.pattern_x_back; + et4000->acl.source_x = et4000->acl.source_x_back; - et4000->acl.y_count--; - if (et4000->acl.y_count == 0xffff) { - et4000->acl.status &= ~ACL_XYST; - if (!(et4000->acl.internal.ctrl_routing & 7) || (et4000->acl.internal.ctrl_routing & 4)) { - et4000w32_log("W32i: end blit, xcount = %i\n", et4000->acl.x_count); - et4000->acl.status &= ~ACL_SSO; - } - et4000->acl.cpu_input_num = 0; - return; - } + et4000->acl.y_count--; + if (et4000->acl.y_count == 0xffff) { + et4000->acl.status &= ~ACL_XYST; + if (!(et4000->acl.internal.ctrl_routing & 7) || (et4000->acl.internal.ctrl_routing & 4)) { + et4000w32_log("W32i: end blit, xcount = %i\n", et4000->acl.x_count); + et4000->acl.status &= ~ACL_SSO; + } + et4000->acl.cpu_input_num = 0; + return; + } - if (cpu_input) - return; - } - } + if (cpu_input) + return; + } + } } static void @@ -1578,251 +2133,267 @@ et4000w32p_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et4000w32 svga_t *svga = &et4000->svga; uint8_t pattern, source, dest, out; uint8_t rop; - int mixdat; + int mixdat; if (!(et4000->acl.status & ACL_XYST)) { - et4000w32_log("XY Block not started\n"); - return; - } + et4000w32_log("XY Block not started\n"); + return; + } - if (et4000->acl.internal.xy_dir & 0x80) { /* Line draw */ - et4000w32_log("Line draw\n"); - while (count--) { - et4000w32_log("%i,%i : ", et4000->acl.internal.pos_x, et4000->acl.internal.pos_y); - pattern = svga->vram[(et4000->acl.pattern_addr + et4000->acl.pattern_x) & et4000->vram_mask]; - source = svga->vram[(et4000->acl.source_addr + et4000->acl.source_x) & et4000->vram_mask]; - et4000w32_log("%06X %06X ", (et4000->acl.pattern_addr + et4000->acl.pattern_x) & et4000->vram_mask, (et4000->acl.source_addr + et4000->acl.source_x) & et4000->vram_mask); - if (cpu_input == 2) { - source = sdat & 0xff; - sdat >>= 8; - } - dest = svga->vram[et4000->acl.dest_addr & et4000->vram_mask]; - out = 0; - et4000w32_log("%06X ", et4000->acl.dest_addr); - if ((et4000->acl.internal.ctrl_routing & 0xa) == 8) { - mixdat = svga->vram[(et4000->acl.mix_addr >> 3) & et4000->vram_mask] & (1 << (et4000->acl.mix_addr & 7)); - et4000w32_log("%06X %02X ", et4000->acl.mix_addr, svga->vram[(et4000->acl.mix_addr >> 3) & et4000->vram_mask]); - } else { - mixdat = mix & 1; - mix >>= 1; - mix |= 0x80000000; - } - et4000->acl.mix_addr++; - rop = mixdat ? et4000->acl.internal.rop_fg : et4000->acl.internal.rop_bg; + if (et4000->acl.internal.xy_dir & 0x80) { /* Line draw */ + et4000w32_log("Line draw\n"); + while (count--) { + et4000w32_log("%i,%i : ", et4000->acl.internal.pos_x, et4000->acl.internal.pos_y); + pattern = svga->vram[(et4000->acl.pattern_addr + et4000->acl.pattern_x) & et4000->vram_mask]; + source = svga->vram[(et4000->acl.source_addr + et4000->acl.source_x) & et4000->vram_mask]; + et4000w32_log("%06X %06X ", (et4000->acl.pattern_addr + et4000->acl.pattern_x) & et4000->vram_mask, (et4000->acl.source_addr + et4000->acl.source_x) & et4000->vram_mask); + if (cpu_input == 2) { + source = sdat & 0xff; + sdat >>= 8; + } + dest = svga->vram[et4000->acl.dest_addr & et4000->vram_mask]; + out = 0; + et4000w32_log("%06X ", et4000->acl.dest_addr); + if ((et4000->acl.internal.ctrl_routing & 0xa) == 8) { + mixdat = svga->vram[(et4000->acl.mix_addr >> 3) & et4000->vram_mask] & (1 << (et4000->acl.mix_addr & 7)); + et4000w32_log("%06X %02X ", et4000->acl.mix_addr, svga->vram[(et4000->acl.mix_addr >> 3) & et4000->vram_mask]); + } else { + mixdat = mix & 1; + mix >>= 1; + mix |= 0x80000000; + } + et4000->acl.mix_addr++; + rop = mixdat ? et4000->acl.internal.rop_fg : et4000->acl.internal.rop_bg; - ROPMIX(rop, dest, pattern, source, out); + ROPMIX(rop, dest, pattern, source, out); - et4000w32_log("%06X = %02X\n", et4000->acl.dest_addr & et4000->vram_mask, out); - if (!(et4000->acl.internal.ctrl_routing & 0x40)) { - svga->vram[et4000->acl.dest_addr & et4000->vram_mask] = out; - svga->changedvram[(et4000->acl.dest_addr & et4000->vram_mask) >> 12] = changeframecount; - } else { - et4000->acl.cpu_dat |= ((uint64_t)out << (et4000->acl.cpu_dat_pos * 8)); - et4000->acl.cpu_dat_pos++; - } + et4000w32_log("%06X = %02X\n", et4000->acl.dest_addr & et4000->vram_mask, out); + if (!(et4000->acl.internal.ctrl_routing & 0x40)) { + svga->vram[et4000->acl.dest_addr & et4000->vram_mask] = out; + svga->changedvram[(et4000->acl.dest_addr & et4000->vram_mask) >> 12] = changeframecount; + } else { + et4000->acl.cpu_dat |= ((uint64_t) out << (et4000->acl.cpu_dat_pos * 8)); + et4000->acl.cpu_dat_pos++; + } - et4000->acl.pix_pos++; - et4000->acl.internal.pos_x++; - if (et4000->acl.pix_pos <= ((et4000->acl.internal.pixel_depth >> 4) & 3)) { - if (et4000->acl.internal.xy_dir & 1) et4000w32_decx(1, et4000); - else et4000w32_incx(1, et4000); - } else { - if (et4000->acl.internal.xy_dir & 1) - et4000w32_incx((et4000->acl.internal.pixel_depth >> 4) & 3, et4000); - else - et4000w32_decx((et4000->acl.internal.pixel_depth >> 4) & 3, et4000); - et4000->acl.pix_pos = 0; + et4000->acl.pix_pos++; + et4000->acl.internal.pos_x++; + if (et4000->acl.pix_pos <= ((et4000->acl.internal.pixel_depth >> 4) & 3)) { + if (et4000->acl.internal.xy_dir & 1) + et4000w32_decx(1, et4000); + else + et4000w32_incx(1, et4000); + } else { + if (et4000->acl.internal.xy_dir & 1) + et4000w32_incx((et4000->acl.internal.pixel_depth >> 4) & 3, et4000); + else + et4000w32_decx((et4000->acl.internal.pixel_depth >> 4) & 3, et4000); + et4000->acl.pix_pos = 0; - /*Next pixel*/ - switch (et4000->acl.internal.xy_dir & 7) { - case 0: case 1: /* Y+ */ - et4000w32_incy(et4000); - et4000->acl.internal.pos_y++; - et4000->acl.internal.pos_x -= ((et4000->acl.internal.pixel_depth >> 4) & 3) + 1; - break; - case 2: case 3: /* Y- */ - et4000w32_decy(et4000); - et4000->acl.internal.pos_y++; - et4000->acl.internal.pos_x -= ((et4000->acl.internal.pixel_depth >> 4) & 3) + 1; - break; - case 4: case 6: /* X+ */ - et4000w32_incx(((et4000->acl.internal.pixel_depth >> 4) & 3) + 1, et4000); - break; - case 5: case 7: /* X- */ - et4000w32_decx(((et4000->acl.internal.pixel_depth >> 4) & 3) + 1, et4000); - break; - } - et4000->acl.internal.error += et4000->acl.internal.dmin; - if (et4000->acl.internal.error > et4000->acl.internal.dmaj) { - et4000->acl.internal.error -= et4000->acl.internal.dmaj; - switch (et4000->acl.internal.xy_dir & 7) { - case 0: case 2: /* X+ */ - et4000w32_incx(((et4000->acl.internal.pixel_depth >> 4) & 3) + 1, et4000); - et4000->acl.internal.pos_x++; - break; - case 1: case 3: /* X- */ - et4000w32_decx(((et4000->acl.internal.pixel_depth >> 4) & 3) + 1, et4000); - et4000->acl.internal.pos_x++; - break; - case 4: case 5: /* Y+ */ - et4000w32_incy(et4000); - et4000->acl.internal.pos_y++; - break; - case 6: case 7: /* Y- */ - et4000w32_decy(et4000); - et4000->acl.internal.pos_y++; - break; - } - } - if ((et4000->acl.internal.pos_x > et4000->acl.internal.count_x) || - (et4000->acl.internal.pos_y > et4000->acl.internal.count_y)) { - et4000w32_log("ACL status linedraw 0\n"); - et4000->acl.status &= ~(ACL_XYST | ACL_SSO); - return; - } - } - } + /*Next pixel*/ + switch (et4000->acl.internal.xy_dir & 7) { + case 0: + case 1: /* Y+ */ + et4000w32_incy(et4000); + et4000->acl.internal.pos_y++; + et4000->acl.internal.pos_x -= ((et4000->acl.internal.pixel_depth >> 4) & 3) + 1; + break; + case 2: + case 3: /* Y- */ + et4000w32_decy(et4000); + et4000->acl.internal.pos_y++; + et4000->acl.internal.pos_x -= ((et4000->acl.internal.pixel_depth >> 4) & 3) + 1; + break; + case 4: + case 6: /* X+ */ + et4000w32_incx(((et4000->acl.internal.pixel_depth >> 4) & 3) + 1, et4000); + break; + case 5: + case 7: /* X- */ + et4000w32_decx(((et4000->acl.internal.pixel_depth >> 4) & 3) + 1, et4000); + break; + } + et4000->acl.internal.error += et4000->acl.internal.dmin; + if (et4000->acl.internal.error > et4000->acl.internal.dmaj) { + et4000->acl.internal.error -= et4000->acl.internal.dmaj; + switch (et4000->acl.internal.xy_dir & 7) { + case 0: + case 2: /* X+ */ + et4000w32_incx(((et4000->acl.internal.pixel_depth >> 4) & 3) + 1, et4000); + et4000->acl.internal.pos_x++; + break; + case 1: + case 3: /* X- */ + et4000w32_decx(((et4000->acl.internal.pixel_depth >> 4) & 3) + 1, et4000); + et4000->acl.internal.pos_x++; + break; + case 4: + case 5: /* Y+ */ + et4000w32_incy(et4000); + et4000->acl.internal.pos_y++; + break; + case 6: + case 7: /* Y- */ + et4000w32_decy(et4000); + et4000->acl.internal.pos_y++; + break; + } + } + if ((et4000->acl.internal.pos_x > et4000->acl.internal.count_x) || (et4000->acl.internal.pos_y > et4000->acl.internal.count_y)) { + et4000w32_log("ACL status linedraw 0\n"); + et4000->acl.status &= ~(ACL_XYST | ACL_SSO); + return; + } + } + } } else { - et4000w32_log("BitBLT: count = %i\n", count); - while (count-- && et4000->acl.y_count >= 0) { - pattern = svga->vram[(et4000->acl.pattern_addr + et4000->acl.pattern_x) & et4000->vram_mask]; + et4000w32_log("BitBLT: count = %i\n", count); + while (count-- && et4000->acl.y_count >= 0) { + pattern = svga->vram[(et4000->acl.pattern_addr + et4000->acl.pattern_x) & et4000->vram_mask]; - if (cpu_input == 2) { - source = sdat & 0xff; - sdat >>= 8; - } else - source = svga->vram[(et4000->acl.source_addr + et4000->acl.source_x) & et4000->vram_mask]; + if (cpu_input == 2) { + source = sdat & 0xff; + sdat >>= 8; + } else + source = svga->vram[(et4000->acl.source_addr + et4000->acl.source_x) & et4000->vram_mask]; - dest = svga->vram[et4000->acl.dest_addr & et4000->vram_mask]; - out = 0; + dest = svga->vram[et4000->acl.dest_addr & et4000->vram_mask]; + out = 0; - if ((et4000->acl.internal.ctrl_routing & 0xa) == 8) { - mixdat = svga->vram[(et4000->acl.mix_addr >> 3) & et4000->vram_mask] & (1 << (et4000->acl.mix_addr & 7)); - } else { - mixdat = mix & 1; - mix >>= 1; - mix |= 0x80000000; - } + if ((et4000->acl.internal.ctrl_routing & 0xa) == 8) { + mixdat = svga->vram[(et4000->acl.mix_addr >> 3) & et4000->vram_mask] & (1 << (et4000->acl.mix_addr & 7)); + } else { + mixdat = mix & 1; + mix >>= 1; + mix |= 0x80000000; + } - rop = mixdat ? et4000->acl.internal.rop_fg : et4000->acl.internal.rop_bg; + rop = mixdat ? et4000->acl.internal.rop_fg : et4000->acl.internal.rop_bg; - ROPMIX(rop, dest, pattern, source, out); + ROPMIX(rop, dest, pattern, source, out); - if (!(et4000->acl.internal.ctrl_routing & 0x40)) { - svga->vram[et4000->acl.dest_addr & et4000->vram_mask] = out; - svga->changedvram[(et4000->acl.dest_addr & et4000->vram_mask) >> 12] = changeframecount; - } else { - et4000->acl.cpu_dat |= ((uint64_t)out << (et4000->acl.cpu_dat_pos * 8)); - et4000->acl.cpu_dat_pos++; - } + if (!(et4000->acl.internal.ctrl_routing & 0x40)) { + svga->vram[et4000->acl.dest_addr & et4000->vram_mask] = out; + svga->changedvram[(et4000->acl.dest_addr & et4000->vram_mask) >> 12] = changeframecount; + } else { + et4000->acl.cpu_dat |= ((uint64_t) out << (et4000->acl.cpu_dat_pos * 8)); + et4000->acl.cpu_dat_pos++; + } - if (et4000->acl.internal.xy_dir & 1) - et4000w32_decx(1, et4000); - else - et4000w32_incx(1, et4000); + if (et4000->acl.internal.xy_dir & 1) + et4000w32_decx(1, et4000); + else + et4000w32_incx(1, et4000); - et4000->acl.x_count--; - if (et4000->acl.x_count == 0xffff) { - if (et4000->acl.internal.xy_dir & 2) { - et4000w32_decy(et4000); - et4000->acl.mix_back = et4000->acl.mix_addr = et4000->acl.mix_back - (et4000->acl.internal.mix_off + 1); - et4000->acl.dest_back = et4000->acl.dest_addr = et4000->acl.dest_back - (et4000->acl.internal.dest_off + 1); - } else { - et4000w32_incy(et4000); - et4000->acl.mix_back = et4000->acl.mix_addr = et4000->acl.mix_back + et4000->acl.internal.mix_off + 1; - et4000->acl.dest_back = et4000->acl.dest_addr = et4000->acl.dest_back + et4000->acl.internal.dest_off + 1; - } + et4000->acl.x_count--; + if (et4000->acl.x_count == 0xffff) { + if (et4000->acl.internal.xy_dir & 2) { + et4000w32_decy(et4000); + et4000->acl.mix_back = et4000->acl.mix_addr = et4000->acl.mix_back - (et4000->acl.internal.mix_off + 1); + et4000->acl.dest_back = et4000->acl.dest_addr = et4000->acl.dest_back - (et4000->acl.internal.dest_off + 1); + } else { + et4000w32_incy(et4000); + et4000->acl.mix_back = et4000->acl.mix_addr = et4000->acl.mix_back + et4000->acl.internal.mix_off + 1; + et4000->acl.dest_back = et4000->acl.dest_addr = et4000->acl.dest_back + et4000->acl.internal.dest_off + 1; + } - et4000->acl.pattern_x = et4000->acl.pattern_x_back; - et4000->acl.source_x = et4000->acl.source_x_back; + et4000->acl.pattern_x = et4000->acl.pattern_x_back; + et4000->acl.source_x = et4000->acl.source_x_back; - et4000->acl.y_count--; - et4000->acl.x_count = et4000->acl.internal.count_x; - if (et4000->acl.y_count == 0xffff) { - et4000w32_log("BitBLT end\n"); - et4000->acl.status &= ~(ACL_XYST | ACL_SSO); - return; - } + et4000->acl.y_count--; + et4000->acl.x_count = et4000->acl.internal.count_x; + if (et4000->acl.y_count == 0xffff) { + et4000w32_log("BitBLT end\n"); + et4000->acl.status &= ~(ACL_XYST | ACL_SSO); + return; + } - if (cpu_input) - return; + if (cpu_input) + return; - if (et4000->acl.internal.ctrl_routing & 0x40) { - if (et4000->acl.cpu_dat_pos & 3) - et4000->acl.cpu_dat_pos += 4 - (et4000->acl.cpu_dat_pos & 3); - return; - } - } - } + if (et4000->acl.internal.ctrl_routing & 0x40) { + if (et4000->acl.cpu_dat_pos & 3) + et4000->acl.cpu_dat_pos += 4 - (et4000->acl.cpu_dat_pos & 3); + return; + } + } + } } } - void et4000w32p_hwcursor_draw(svga_t *svga, int displine) { - et4000w32p_t *et4000 = (et4000w32p_t *)svga->p; - int x, offset, xx, xx2; - int shift = (et4000->adjust_cursor + 1); - int width = (svga->hwcursor_latch.cur_xsize - svga->hwcursor_latch.xoff); - int pitch = (svga->hwcursor_latch.cur_xsize == 128) ? 32 : 16; - int x_acc = 4; - int minus_width = 0; - uint8_t dat; + et4000w32p_t *et4000 = (et4000w32p_t *) svga->p; + int x, offset, xx, xx2; + int shift = (et4000->adjust_cursor + 1); + int width = (svga->hwcursor_latch.cur_xsize - svga->hwcursor_latch.xoff); + int pitch = (svga->hwcursor_latch.cur_xsize == 128) ? 32 : 16; + int x_acc = 4; + int minus_width = 0; + uint8_t dat; offset = svga->hwcursor_latch.xoff; - if (et4000->type == ET4000W32) { - switch (svga->bpp) { - case 8: - minus_width = 0; - x_acc = 2; - break; - case 15: case 16: - minus_width = 64; - x_acc = 2; - break; - } - } - - for (x = 0; x < (width - minus_width); x += x_acc) { - dat = svga->vram[svga->hwcursor_latch.addr + (offset >> 2)]; - - xx = svga->hwcursor_latch.x + svga->x_add + x; - - if (!(xx % shift)) { - xx2 = xx / shift; - if (!(dat & 2)) buffer32->line[displine][xx2] = (dat & 1) ? 0xFFFFFF : 0; - else if ((dat & 3) == 3) buffer32->line[displine][xx2] ^= 0xFFFFFF; - } - dat >>= 2; - xx++; - if (!(xx % shift)) { - xx2 = xx / shift; - if (!(dat & 2)) buffer32->line[displine][xx2] = (dat & 1) ? 0xFFFFFF : 0; - else if ((dat & 3) == 3) buffer32->line[displine][xx2] ^= 0xFFFFFF; - } - dat >>= 2; - xx++; - if (!(xx % shift)) { - xx2 = xx / shift; - if (!(dat & 2)) buffer32->line[displine][xx2] = (dat & 1) ? 0xFFFFFF : 0; - else if ((dat & 3) == 3) buffer32->line[displine][xx2] ^= 0xFFFFFF; - } - dat >>= 2; - xx++; - if (!(xx % shift)) { - xx2 = xx / shift; - if (!(dat & 2)) buffer32->line[displine][xx2] = (dat & 1) ? 0xFFFFFF : 0; - else if ((dat & 3) == 3) buffer32->line[displine][xx2] ^= 0xFFFFFF; - } - dat >>= 2; - - offset += 4; + if (et4000->type == ET4000W32) { + switch (svga->bpp) { + case 8: + minus_width = 0; + x_acc = 2; + break; + case 15: + case 16: + minus_width = 64; + x_acc = 2; + break; + } } - svga->hwcursor_latch.addr += pitch; -} + for (x = 0; x < (width - minus_width); x += x_acc) { + dat = svga->vram[svga->hwcursor_latch.addr + (offset >> 2)]; + xx = svga->hwcursor_latch.x + svga->x_add + x; + + if (!(xx % shift)) { + xx2 = xx / shift; + if (!(dat & 2)) + buffer32->line[displine][xx2] = (dat & 1) ? 0xFFFFFF : 0; + else if ((dat & 3) == 3) + buffer32->line[displine][xx2] ^= 0xFFFFFF; + } + dat >>= 2; + xx++; + if (!(xx % shift)) { + xx2 = xx / shift; + if (!(dat & 2)) + buffer32->line[displine][xx2] = (dat & 1) ? 0xFFFFFF : 0; + else if ((dat & 3) == 3) + buffer32->line[displine][xx2] ^= 0xFFFFFF; + } + dat >>= 2; + xx++; + if (!(xx % shift)) { + xx2 = xx / shift; + if (!(dat & 2)) + buffer32->line[displine][xx2] = (dat & 1) ? 0xFFFFFF : 0; + else if ((dat & 3) == 3) + buffer32->line[displine][xx2] ^= 0xFFFFFF; + } + dat >>= 2; + xx++; + if (!(xx % shift)) { + xx2 = xx / shift; + if (!(dat & 2)) + buffer32->line[displine][xx2] = (dat & 1) ? 0xFFFFFF : 0; + else if ((dat & 3) == 3) + buffer32->line[displine][xx2] ^= 0xFFFFFF; + } + dat >>= 2; + + offset += 4; + } + + svga->hwcursor_latch.addr += pitch; +} static void et4000w32p_io_remove(et4000w32p_t *et4000) @@ -1839,7 +2410,6 @@ et4000w32p_io_remove(et4000w32p_t *et4000) io_removehandler(0x217a, 0x0002, et4000w32p_in, NULL, NULL, et4000w32p_out, NULL, NULL, et4000); } - static void et4000w32p_io_set(et4000w32p_t *et4000) { @@ -1857,234 +2427,251 @@ et4000w32p_io_set(et4000w32p_t *et4000) io_sethandler(0x217a, 0x0002, et4000w32p_in, NULL, NULL, et4000w32p_out, NULL, NULL, et4000); } - uint8_t et4000w32p_pci_read(int func, int addr, void *p) { - et4000w32p_t *et4000 = (et4000w32p_t *)p; + et4000w32p_t *et4000 = (et4000w32p_t *) p; addr &= 0xff; switch (addr) { - case 0x00: return 0x0c; /* Tseng Labs */ - case 0x01: return 0x10; + case 0x00: + return 0x0c; /* Tseng Labs */ + case 0x01: + return 0x10; - case 0x02: return (et4000->rev); - case 0x03: return 0x32; + case 0x02: + return (et4000->rev); + case 0x03: + return 0x32; - case PCI_REG_COMMAND: - return et4000->pci_regs[PCI_REG_COMMAND] | 0x80; /* Respond to IO and memory accesses */ + case PCI_REG_COMMAND: + return et4000->pci_regs[PCI_REG_COMMAND] | 0x80; /* Respond to IO and memory accesses */ - case 0x07: return 1 << 1; /* Medium DEVSEL timing */ + case 0x07: + return 1 << 1; /* Medium DEVSEL timing */ - case 0x08: return (et4000->rev); /* Revision ID */ - case 0x09: return 0; /* Programming interface */ + case 0x08: + return (et4000->rev); /* Revision ID */ + case 0x09: + return 0; /* Programming interface */ - case 0x0a: return 0x00; /* Supports VGA interface */ - case 0x0b: return 0x03; /* This has to be done in order to make this card work with the two 486 PCI machines. */ + case 0x0a: + return 0x00; /* Supports VGA interface */ + case 0x0b: + return 0x03; /* This has to be done in order to make this card work with the two 486 PCI machines. */ - case 0x10: return 0x00; /* Linear frame buffer address */ - case 0x11: return 0x00; - case 0x12: return 0x00; - case 0x13: return (et4000->linearbase >> 24); + case 0x10: + return 0x00; /* Linear frame buffer address */ + case 0x11: + return 0x00; + case 0x12: + return 0x00; + case 0x13: + return (et4000->linearbase >> 24); - case 0x30: return et4000->pci_regs[0x30] & 0x01; /* BIOS ROM address */ - case 0x31: return 0x00; - case 0x32: return 0x00; - case 0x33: return et4000->pci_regs[0x33] & 0xf0; + case 0x30: + return et4000->pci_regs[0x30] & 0x01; /* BIOS ROM address */ + case 0x31: + return 0x00; + case 0x32: + return 0x00; + case 0x33: + return et4000->pci_regs[0x33] & 0xf0; } return 0; } - void et4000w32p_pci_write(int func, int addr, uint8_t val, void *p) { - et4000w32p_t *et4000 = (et4000w32p_t *)p; - svga_t *svga = &et4000->svga; + et4000w32p_t *et4000 = (et4000w32p_t *) p; + svga_t *svga = &et4000->svga; addr &= 0xff; switch (addr) { - case PCI_REG_COMMAND: - et4000->pci_regs[PCI_REG_COMMAND] = (val & 0x23) | 0x80; - if (val & PCI_COMMAND_IO) - et4000w32p_io_set(et4000); - else - et4000w32p_io_remove(et4000); - et4000w32p_recalcmapping(et4000); - break; + case PCI_REG_COMMAND: + et4000->pci_regs[PCI_REG_COMMAND] = (val & 0x23) | 0x80; + if (val & PCI_COMMAND_IO) + et4000w32p_io_set(et4000); + else + et4000w32p_io_remove(et4000); + et4000w32p_recalcmapping(et4000); + break; - case 0x13: - et4000->linearbase &= 0x00c00000; - et4000->linearbase |= (et4000->pci_regs[0x13] << 24); - svga->crtc[0x30] &= 3; - svga->crtc[0x30] |= ((et4000->linearbase & 0x3f000000) >> 22); - et4000w32p_recalcmapping(et4000); - break; + case 0x13: + et4000->linearbase &= 0x00c00000; + et4000->linearbase |= (et4000->pci_regs[0x13] << 24); + svga->crtc[0x30] &= 3; + svga->crtc[0x30] |= ((et4000->linearbase & 0x3f000000) >> 22); + et4000w32p_recalcmapping(et4000); + break; - case 0x30: case 0x31: case 0x32: case 0x33: - et4000->pci_regs[addr] = val; - et4000->pci_regs[0x30] = 1; - et4000->pci_regs[0x31] = 0; - et4000->pci_regs[0x32] = 0; - et4000->pci_regs[0x33] &= 0xf0; - if (et4000->pci_regs[0x30] & 0x01) { - uint32_t biosaddr = (et4000->pci_regs[0x33] << 24); - if (!biosaddr) - biosaddr = 0xc0000; - et4000w32_log("ET4000 bios_rom enabled at %08x\n", biosaddr); - mem_mapping_set_addr(&et4000->bios_rom.mapping, biosaddr, 0x8000); - } else { - et4000w32_log("ET4000 bios_rom disabled\n"); - mem_mapping_disable(&et4000->bios_rom.mapping); - } - return; + case 0x30: + case 0x31: + case 0x32: + case 0x33: + et4000->pci_regs[addr] = val; + et4000->pci_regs[0x30] = 1; + et4000->pci_regs[0x31] = 0; + et4000->pci_regs[0x32] = 0; + et4000->pci_regs[0x33] &= 0xf0; + if (et4000->pci_regs[0x30] & 0x01) { + uint32_t biosaddr = (et4000->pci_regs[0x33] << 24); + if (!biosaddr) + biosaddr = 0xc0000; + et4000w32_log("ET4000 bios_rom enabled at %08x\n", biosaddr); + mem_mapping_set_addr(&et4000->bios_rom.mapping, biosaddr, 0x8000); + } else { + et4000w32_log("ET4000 bios_rom disabled\n"); + mem_mapping_disable(&et4000->bios_rom.mapping); + } + return; } } - void * et4000w32p_init(const device_t *info) { - int vram_size; + int vram_size; et4000w32p_t *et4000 = malloc(sizeof(et4000w32p_t)); memset(et4000, 0, sizeof(et4000w32p_t)); et4000->pci = (info->flags & DEVICE_PCI) ? 0x80 : 0x00; et4000->vlb = (info->flags & DEVICE_VLB) ? 0x40 : 0x00; - /*The ET4000/W32i ISA BIOS seems to not support 2MB of VRAM*/ - if ((info->local == ET4000W32) || ((info->local == ET4000W32I) && !(et4000->vlb))) - vram_size = 1; - else - vram_size = device_get_config_int("memory"); + /*The ET4000/W32i ISA BIOS seems to not support 2MB of VRAM*/ + if ((info->local == ET4000W32) || ((info->local == ET4000W32I) && !(et4000->vlb))) + vram_size = 1; + else + vram_size = device_get_config_int("memory"); - /*The interleaved VRAM was introduced by the ET4000/W32i*/ + /*The interleaved VRAM was introduced by the ET4000/W32i*/ et4000->interleaved = ((vram_size == 2) && (info->local != ET4000W32)) ? 1 : 0; if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000w32_pci); + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000w32_pci); else if (info->flags & DEVICE_VLB) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000w32_vlb); + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000w32_vlb); else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000w32_isa); + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_et4000w32_isa); svga_init(info, &et4000->svga, et4000, vram_size << 20, - et4000w32p_recalctimings, - et4000w32p_in, et4000w32p_out, - et4000w32p_hwcursor_draw, - NULL); + et4000w32p_recalctimings, + et4000w32p_in, et4000w32p_out, + et4000w32p_hwcursor_draw, + NULL); - et4000->vram_mask = (vram_size << 20) - 1; - et4000->svga.decode_mask = (vram_size << 20) - 1; + et4000->vram_mask = (vram_size << 20) - 1; + et4000->svga.decode_mask = (vram_size << 20) - 1; et4000->type = info->local; - switch(et4000->type) { - case ET4000W32: - /* ET4000/W32 */ - et4000->rev = 0; + switch (et4000->type) { + case ET4000W32: + /* ET4000/W32 */ + et4000->rev = 0; - rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32, 0xc0000, 0x8000, 0x7fff, 0, - MEM_MAPPING_EXTERNAL); + rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32, 0xc0000, 0x8000, 0x7fff, 0, + MEM_MAPPING_EXTERNAL); - et4000->svga.ramdac = device_add(&tseng_ics5301_ramdac_device); - et4000->svga.clock_gen = et4000->svga.ramdac; - et4000->svga.getclock = sdac_getclock; - break; + et4000->svga.ramdac = device_add(&tseng_ics5301_ramdac_device); + et4000->svga.clock_gen = et4000->svga.ramdac; + et4000->svga.getclock = sdac_getclock; + break; - case ET4000W32I: - /* ET4000/W32i rev B */ - et4000->rev = 3; + case ET4000W32I: + /* ET4000/W32i rev B */ + et4000->rev = 3; - if (et4000->vlb) { - rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32I_VLB, 0xc0000, 0x8000, 0x7fff, 0, - MEM_MAPPING_EXTERNAL); - } else { - rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32I_ISA, 0xc0000, 0x8000, 0x7fff, 0, - MEM_MAPPING_EXTERNAL); - } + if (et4000->vlb) { + rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32I_VLB, 0xc0000, 0x8000, 0x7fff, 0, + MEM_MAPPING_EXTERNAL); + } else { + rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32I_ISA, 0xc0000, 0x8000, 0x7fff, 0, + MEM_MAPPING_EXTERNAL); + } - et4000->svga.ramdac = device_add(&tseng_ics5301_ramdac_device); - et4000->svga.clock_gen = et4000->svga.ramdac; - et4000->svga.getclock = sdac_getclock; - break; + et4000->svga.ramdac = device_add(&tseng_ics5301_ramdac_device); + et4000->svga.clock_gen = et4000->svga.ramdac; + et4000->svga.getclock = sdac_getclock; + break; - case ET4000W32P_VIDEOMAGIC_REVB: - /* ET4000/W32p rev B */ - et4000->rev = 5; + case ET4000W32P_VIDEOMAGIC_REVB: + /* ET4000/W32p rev B */ + et4000->rev = 5; - rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P_VIDEOMAGIC_REVB_VLB, 0xc0000, 0x8000, 0x7fff, 0, - MEM_MAPPING_EXTERNAL); + rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P_VIDEOMAGIC_REVB_VLB, 0xc0000, 0x8000, 0x7fff, 0, + MEM_MAPPING_EXTERNAL); - et4000->svga.ramdac = device_add(&stg_ramdac_device); - et4000->svga.clock_gen = et4000->svga.ramdac; - et4000->svga.getclock = stg_getclock; - et4000->svga.adv_flags |= FLAG_NOSKEW; - break; + et4000->svga.ramdac = device_add(&stg_ramdac_device); + et4000->svga.clock_gen = et4000->svga.ramdac; + et4000->svga.getclock = stg_getclock; + et4000->svga.adv_flags |= FLAG_NOSKEW; + break; - case ET4000W32P_REVC: - /* ET4000/W32p rev C */ - et4000->rev = 7; + case ET4000W32P_REVC: + /* ET4000/W32p rev C */ + et4000->rev = 7; - rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P_REVC, 0xc0000, 0x8000, 0x7fff, 0, - MEM_MAPPING_EXTERNAL); + rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P_REVC, 0xc0000, 0x8000, 0x7fff, 0, + MEM_MAPPING_EXTERNAL); - et4000->svga.ramdac = device_add(&tseng_ics5341_ramdac_device); - et4000->svga.clock_gen = et4000->svga.ramdac; - et4000->svga.getclock = sdac_getclock; - break; + et4000->svga.ramdac = device_add(&tseng_ics5341_ramdac_device); + et4000->svga.clock_gen = et4000->svga.ramdac; + et4000->svga.getclock = sdac_getclock; + break; - case ET4000W32P: - /* ET4000/W32p rev D */ - et4000->rev = 6; + case ET4000W32P: + /* ET4000/W32p rev D */ + et4000->rev = 6; - rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P, 0xc0000, 0x8000, 0x7fff, 0, - MEM_MAPPING_EXTERNAL); + rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P, 0xc0000, 0x8000, 0x7fff, 0, + MEM_MAPPING_EXTERNAL); - et4000->svga.ramdac = device_add(&stg_ramdac_device); - et4000->svga.clock_gen = et4000->svga.ramdac; - et4000->svga.getclock = stg_getclock; - et4000->svga.adv_flags |= FLAG_NOSKEW; - break; + et4000->svga.ramdac = device_add(&stg_ramdac_device); + et4000->svga.clock_gen = et4000->svga.ramdac; + et4000->svga.getclock = stg_getclock; + et4000->svga.adv_flags |= FLAG_NOSKEW; + break; - case ET4000W32P_CARDEX: - /* ET4000/W32p rev D */ - et4000->rev = 6; + case ET4000W32P_CARDEX: + /* ET4000/W32p rev D */ + et4000->rev = 6; - rom_init(&et4000->bios_rom, BIOS_ROM_PATH_CARDEX, 0xc0000, 0x8000, 0x7fff, 0, - MEM_MAPPING_EXTERNAL); + rom_init(&et4000->bios_rom, BIOS_ROM_PATH_CARDEX, 0xc0000, 0x8000, 0x7fff, 0, + MEM_MAPPING_EXTERNAL); - et4000->svga.ramdac = device_add(&stg_ramdac_device); - et4000->svga.clock_gen = et4000->svga.ramdac; - et4000->svga.getclock = stg_getclock; - et4000->svga.adv_flags |= FLAG_NOSKEW; - break; + et4000->svga.ramdac = device_add(&stg_ramdac_device); + et4000->svga.clock_gen = et4000->svga.ramdac; + et4000->svga.getclock = stg_getclock; + et4000->svga.adv_flags |= FLAG_NOSKEW; + break; - case ET4000W32P_DIAMOND: - /* ET4000/W32p rev D */ - et4000->rev = 6; + case ET4000W32P_DIAMOND: + /* ET4000/W32p rev D */ + et4000->rev = 6; - rom_init(&et4000->bios_rom, BIOS_ROM_PATH_DIAMOND, 0xc0000, 0x8000, 0x7fff, 0, - MEM_MAPPING_EXTERNAL); + rom_init(&et4000->bios_rom, BIOS_ROM_PATH_DIAMOND, 0xc0000, 0x8000, 0x7fff, 0, + MEM_MAPPING_EXTERNAL); - et4000->svga.ramdac = device_add(&stg_ramdac_device); - et4000->svga.clock_gen = device_add(&icd2061_device); - et4000->svga.getclock = icd2061_getclock; - break; + et4000->svga.ramdac = device_add(&stg_ramdac_device); + et4000->svga.clock_gen = device_add(&icd2061_device); + et4000->svga.getclock = icd2061_getclock; + break; } if (info->flags & DEVICE_PCI) - mem_mapping_disable(&et4000->bios_rom.mapping); + mem_mapping_disable(&et4000->bios_rom.mapping); mem_mapping_add(&et4000->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, NULL, MEM_MAPPING_EXTERNAL, &et4000->svga); - mem_mapping_add(&et4000->mmu_mapping, 0, 0, et4000w32p_mmu_read, NULL, NULL, et4000w32p_mmu_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, et4000); + mem_mapping_add(&et4000->mmu_mapping, 0, 0, et4000w32p_mmu_read, NULL, NULL, et4000w32p_mmu_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, et4000); et4000w32p_io_set(et4000); if (info->flags & DEVICE_PCI) - pci_add_card(PCI_ADD_VIDEO, et4000w32p_pci_read, et4000w32p_pci_write, et4000); + pci_add_card(PCI_ADD_VIDEO, et4000w32p_pci_read, et4000w32p_pci_write, et4000); /* Hardwired bits: 00000000 1xx0x0xx */ /* R/W bits: xx xxxx */ @@ -2101,26 +2688,23 @@ et4000w32p_init(const device_t *info) et4000->pci_regs[0x32] = 0x00; et4000->pci_regs[0x33] = 0xf0; - et4000->svga.packed_chain4 = 1; + et4000->svga.packed_chain4 = 1; return et4000; } - int et4000w32_available(void) { return rom_present(BIOS_ROM_PATH_W32); } - int et4000w32i_isa_available(void) { return rom_present(BIOS_ROM_PATH_W32I_ISA); } - int et4000w32i_vlb_available(void) { @@ -2133,65 +2717,58 @@ et4000w32p_videomagic_revb_vlb_available(void) return rom_present(BIOS_ROM_PATH_W32P_VIDEOMAGIC_REVB_VLB); } - int et4000w32p_revc_available(void) { return rom_present(BIOS_ROM_PATH_W32P_REVC); } - int et4000w32p_noncardex_available(void) { return rom_present(BIOS_ROM_PATH_W32P); } - int et4000w32p_available(void) { return rom_present(BIOS_ROM_PATH_DIAMOND); } - int et4000w32p_cardex_available(void) { return rom_present(BIOS_ROM_PATH_CARDEX); } - void et4000w32p_close(void *p) { - et4000w32p_t *et4000 = (et4000w32p_t *)p; + et4000w32p_t *et4000 = (et4000w32p_t *) p; svga_close(&et4000->svga); free(et4000); } - void et4000w32p_speed_changed(void *p) { - et4000w32p_t *et4000 = (et4000w32p_t *)p; + et4000w32p_t *et4000 = (et4000w32p_t *) p; svga_recalctimings(&et4000->svga); } - void et4000w32p_force_redraw(void *p) { - et4000w32p_t *et4000 = (et4000w32p_t *)p; + et4000w32p_t *et4000 = (et4000w32p_t *) p; et4000->svga.fullchange = changeframecount; } static const device_config_t et4000w32p_config[] = { -// clang-format off + // clang-format off { .name = "memory", .description = "Memory size", @@ -2218,183 +2795,197 @@ static const device_config_t et4000w32p_config[] = { }; const device_t et4000w32_device = { - .name = "Tseng Labs ET4000/w32 ISA", + .name = "Tseng Labs ET4000/w32 ISA", .internal_name = "et4000w32", - .flags = DEVICE_ISA | DEVICE_AT, ET4000W32, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = ET4000W32, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, { .available = et4000w32_available }, .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = NULL + .force_redraw = et4000w32p_force_redraw, + .config = NULL }; const device_t et4000w32_onboard_device = { - .name = "Tseng Labs ET4000/w32 (ISA) (On-Board)", + .name = "Tseng Labs ET4000/w32 (ISA) (On-Board)", .internal_name = "et4000w32_onboard", - .flags = DEVICE_ISA | DEVICE_AT, ET4000W32, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = ET4000W32, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, { .available = et4000w32_available }, .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = NULL + .force_redraw = et4000w32p_force_redraw, + .config = NULL }; const device_t et4000w32i_isa_device = { - .name = "Tseng Labs ET4000/w32i Rev. B ISA", + .name = "Tseng Labs ET4000/w32i Rev. B ISA", .internal_name = "et4000w32i", - .flags = DEVICE_ISA | DEVICE_AT, ET4000W32I, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = ET4000W32I, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, { .available = et4000w32i_isa_available }, .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = NULL + .force_redraw = et4000w32p_force_redraw, + .config = NULL }; const device_t et4000w32i_vlb_device = { - .name = "Tseng Labs ET4000/w32i Rev. B VLB", + .name = "Tseng Labs ET4000/w32i Rev. B VLB", .internal_name = "et4000w32i_vlb", - .flags = DEVICE_VLB, ET4000W32I, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, + .flags = DEVICE_VLB, + .local = ET4000W32I, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, { .available = et4000w32i_vlb_available }, .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = et4000w32p_config + .force_redraw = et4000w32p_force_redraw, + .config = et4000w32p_config }; const device_t et4000w32p_videomagic_revb_vlb_device = { - .name = "Tseng Labs ET4000/w32p Rev. B VLB (VideoMagic)", + .name = "Tseng Labs ET4000/w32p Rev. B VLB (VideoMagic)", .internal_name = "et4000w32p_videomagic_revb_vlb", - .flags = DEVICE_VLB, ET4000W32P_VIDEOMAGIC_REVB, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, + .flags = DEVICE_VLB, + .local = ET4000W32P_VIDEOMAGIC_REVB, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, { .available = et4000w32p_videomagic_revb_vlb_available }, .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = et4000w32p_config + .force_redraw = et4000w32p_force_redraw, + .config = et4000w32p_config }; const device_t et4000w32p_videomagic_revb_pci_device = { - .name = "Tseng Labs ET4000/w32p Rev. B PCI (VideoMagic)", + .name = "Tseng Labs ET4000/w32p Rev. B PCI (VideoMagic)", .internal_name = "et4000w32p_videomagic_revb_pci", - .flags = DEVICE_PCI, ET4000W32P_VIDEOMAGIC_REVB, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = ET4000W32P_VIDEOMAGIC_REVB, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, { .available = et4000w32p_videomagic_revb_vlb_available }, .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = et4000w32p_config + .force_redraw = et4000w32p_force_redraw, + .config = et4000w32p_config }; const device_t et4000w32p_revc_vlb_device = { - .name = "Tseng Labs ET4000/w32p Rev. C VLB (Cardex)", + .name = "Tseng Labs ET4000/w32p Rev. C VLB (Cardex)", .internal_name = "et4000w32p_revc_vlb", - .flags = DEVICE_VLB, ET4000W32P_REVC, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, + .flags = DEVICE_VLB, + .local = ET4000W32P_REVC, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, { .available = et4000w32p_revc_available }, .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = et4000w32p_config + .force_redraw = et4000w32p_force_redraw, + .config = et4000w32p_config }; const device_t et4000w32p_revc_pci_device = { - .name = "Tseng Labs ET4000/w32p Rev. C PCI (Cardex)", + .name = "Tseng Labs ET4000/w32p Rev. C PCI (Cardex)", .internal_name = "et4000w32p_revc_pci", - .flags = DEVICE_PCI, ET4000W32P_REVC, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = ET4000W32P_REVC, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, { .available = et4000w32p_revc_available }, .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = et4000w32p_config + .force_redraw = et4000w32p_force_redraw, + .config = et4000w32p_config }; const device_t et4000w32p_noncardex_vlb_device = { - .name = "Tseng Labs ET4000/w32p Rev. D VLB", + .name = "Tseng Labs ET4000/w32p Rev. D VLB", .internal_name = "et4000w32p_nc_vlb", - .flags = DEVICE_VLB, ET4000W32P, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, + .flags = DEVICE_VLB, + .local = ET4000W32P, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, { .available = et4000w32p_noncardex_available }, .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = et4000w32p_config + .force_redraw = et4000w32p_force_redraw, + .config = et4000w32p_config }; const device_t et4000w32p_noncardex_pci_device = { - .name = "Tseng Labs ET4000/w32p Rev. D PCI", + .name = "Tseng Labs ET4000/w32p Rev. D PCI", .internal_name = "et4000w32p_nc_pci", - .flags = DEVICE_PCI, ET4000W32P, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = ET4000W32P, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, { .available = et4000w32p_noncardex_available }, .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = et4000w32p_config + .force_redraw = et4000w32p_force_redraw, + .config = et4000w32p_config }; const device_t et4000w32p_cardex_vlb_device = { - .name = "Tseng Labs ET4000/w32p Rev. D VLB (Cardex)", + .name = "Tseng Labs ET4000/w32p Rev. D VLB (Cardex)", .internal_name = "et4000w32p_vlb", - .flags = DEVICE_VLB, ET4000W32P_CARDEX, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, + .flags = DEVICE_VLB, + .local = ET4000W32P_CARDEX, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, { .available = et4000w32p_cardex_available }, .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = et4000w32p_config + .force_redraw = et4000w32p_force_redraw, + .config = et4000w32p_config }; const device_t et4000w32p_cardex_pci_device = { - .name = "Tseng Labs ET4000/w32p Rev. D PCI (Cardex)", + .name = "Tseng Labs ET4000/w32p Rev. D PCI (Cardex)", .internal_name = "et4000w32p_pci", - .flags = DEVICE_PCI, ET4000W32P_CARDEX, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = ET4000W32P_CARDEX, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, { .available = et4000w32p_cardex_available }, .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = et4000w32p_config + .force_redraw = et4000w32p_force_redraw, + .config = et4000w32p_config }; const device_t et4000w32p_vlb_device = { - .name = "Tseng Labs ET4000/w32p Rev. D VLB (Diamond Stealth32)", + .name = "Tseng Labs ET4000/w32p Rev. D VLB (Diamond Stealth32)", .internal_name = "stealth32_vlb", - .flags = DEVICE_VLB, ET4000W32P_DIAMOND, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, + .flags = DEVICE_VLB, + .local = ET4000W32P_DIAMOND, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, { .available = et4000w32p_available }, .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = et4000w32p_config + .force_redraw = et4000w32p_force_redraw, + .config = et4000w32p_config }; const device_t et4000w32p_pci_device = { - .name = "Tseng Labs ET4000/w32p Rev. D PCI (Diamond Stealth32)", + .name = "Tseng Labs ET4000/w32p Rev. D PCI (Diamond Stealth32)", .internal_name = "stealth32_pci", - .flags = DEVICE_PCI, ET4000W32P_DIAMOND, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = ET4000W32P_DIAMOND, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, { .available = et4000w32p_available }, .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = et4000w32p_config + .force_redraw = et4000w32p_force_redraw, + .config = et4000w32p_config }; diff --git a/src/video/vid_f82c425.c b/src/video/vid_f82c425.c index 1e36ea5aa..0d1b9f1d7 100644 --- a/src/video/vid_f82c425.c +++ b/src/video/vid_f82c425.c @@ -71,101 +71,103 @@ static uint32_t smartmap[256][2]; static uint32_t colormap[4]; -static video_timings_t timing_f82c425 = {VIDEO_ISA, 8,16,32, 8,16,32}; +static video_timings_t timing_f82c425 = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; static uint8_t st_video_options; -static uint8_t st_enabled = 1; -static int8_t st_display_internal = -1; +static uint8_t st_enabled = 1; +static int8_t st_display_internal = -1; -void f82c425_video_options_set(uint8_t options) +void +f82c425_video_options_set(uint8_t options) { - st_video_options = options; + st_video_options = options; } -void f82c425_video_enable(uint8_t enabled) +void +f82c425_video_enable(uint8_t enabled) { - st_enabled = enabled; + st_enabled = enabled; } -void f82c425_display_set(uint8_t internal) +void +f82c425_display_set(uint8_t internal) { - st_display_internal = (int8_t)internal; + st_display_internal = (int8_t) internal; } -uint8_t f82c425_display_get() +uint8_t +f82c425_display_get() { - return (uint8_t)st_display_internal; + return (uint8_t) st_display_internal; } +typedef struct f82c425_t { + mem_mapping_t mapping; + cga_t cga; + uint8_t crtcreg; -typedef struct f82c425_t -{ - mem_mapping_t mapping; - cga_t cga; - uint8_t crtcreg; + uint64_t dispontime, dispofftime; - uint64_t dispontime, dispofftime; + int linepos, displine; + int dispon; + uint8_t video_options; - int linepos, displine; - int dispon; - uint8_t video_options; + uint8_t *vram; - uint8_t *vram; - - /* Registers specific to 82C425. */ - uint8_t ac_limit; - uint8_t threshold; - uint8_t shift; - uint8_t hsync; - uint8_t vsync_blink; - uint8_t timing; - uint8_t function; + /* Registers specific to 82C425. */ + uint8_t ac_limit; + uint8_t threshold; + uint8_t shift; + uint8_t hsync; + uint8_t vsync_blink; + uint8_t timing; + uint8_t function; } f82c425_t; - /* Convert IRGB representation to RGBI, * useful in SMARTMAP calculations. */ -static inline uint8_t f82c425_rgbi(uint8_t irgb) +static inline uint8_t +f82c425_rgbi(uint8_t irgb) { - return ((irgb & 0x7) << 1) | (irgb >> 3); + return ((irgb & 0x7) << 1) | (irgb >> 3); } /* Convert IRGB SMARTMAP output to a RGB representation of one of 4/8 grey * shades we'd see on an actual V86P display: with some bias toward lighter * shades and a backlight with yellow/green-ish tint. */ -static inline uint32_t f82c425_makecol(uint8_t rgbi, int gs4, int inv) +static inline uint32_t +f82c425_makecol(uint8_t rgbi, int gs4, int inv) { - uint8_t c; + uint8_t c; - gs4 = 1 + !!gs4; - if (!inv) - { - rgbi = 15 - rgbi; - } - c = 0x10 * gs4 * ((rgbi >> gs4) + 2); + gs4 = 1 + !!gs4; + if (!inv) { + rgbi = 15 - rgbi; + } + c = 0x10 * gs4 * ((rgbi >> gs4) + 2); #ifdef NO_BLUE - return makecol(c, c + 0x08, c - 0x20); + return makecol(c, c + 0x08, c - 0x20); #else - return makecol(c, c + 0x08, 0x70); + return makecol(c, c + 0x08, 0x70); #endif } /* Saturating/non-saturating addition for SMARTMAP(see below). */ -static inline int f82c425_smartmap_add(int a, int b, int sat) +static inline int +f82c425_smartmap_add(int a, int b, int sat) { - int c = a + b; + int c = a + b; - /* (SATURATING OR NON SATURATING) */ - if (sat) - { - if (c < 0) - c = 0; - else if (c > 15) - c = 15; - } + /* (SATURATING OR NON SATURATING) */ + if (sat) { + if (c < 0) + c = 0; + else if (c > 15) + c = 15; + } - return c & 0xf; + return c & 0xf; } /* Calculate and cache mapping of CGA text color attribute to a @@ -174,503 +176,454 @@ static inline int f82c425_smartmap_add(int a, int b, int sat) * This is a straightforward implementation of the algorithm as described * in U.S. Patent 4,977,398 [2]. The comments in capitals refer to portions * of a figure on page 4. */ -static void f82c425_smartmap(f82c425_t *f82c425) +static void +f82c425_smartmap(f82c425_t *f82c425) { - int i; + int i; - for (i = 0; i < 256; i++) { - uint8_t bg = f82c425_rgbi(i >> 4); - uint8_t fg = f82c425_rgbi(i & 0xf); + for (i = 0; i < 256; i++) { + uint8_t bg = f82c425_rgbi(i >> 4); + uint8_t fg = f82c425_rgbi(i & 0xf); - /* FIG._4. */ - if (abs(bg - fg) <= (f82c425->threshold & 0x0f)) - { - /* FOREGROUND=BACKGROUND */ - if (bg == fg) - { - /* SPECIAL CASE */ - if (f82c425->shift == 0xff) - { - /* CHECK MOST SIGNIFICANT BIT */ - if (fg & 0x8) - { - /* FULL WHITE */ - fg = bg = 15; - } - else - { - /* FULL BLACK */ - fg = bg = 0; - } - } - } - else - { - uint8_t sat = f82c425->threshold & 0x10; + /* FIG._4. */ + if (abs(bg - fg) <= (f82c425->threshold & 0x0f)) { + /* FOREGROUND=BACKGROUND */ + if (bg == fg) { + /* SPECIAL CASE */ + if (f82c425->shift == 0xff) { + /* CHECK MOST SIGNIFICANT BIT */ + if (fg & 0x8) { + /* FULL WHITE */ + fg = bg = 15; + } else { + /* FULL BLACK */ + fg = bg = 0; + } + } + } else { + uint8_t sat = f82c425->threshold & 0x10; - /* DETERMINE WHICH IS LIGHT */ - if (fg > bg) - { - fg = f82c425_smartmap_add(fg, f82c425->shift & 0x0f, sat); - bg = f82c425_smartmap_add(bg, -(f82c425->shift >> 4), sat); - } - else - { - fg = f82c425_smartmap_add(fg, -(f82c425->shift & 0x0f), sat); - bg = f82c425_smartmap_add(bg, f82c425->shift >> 4, sat); - } - } - } + /* DETERMINE WHICH IS LIGHT */ + if (fg > bg) { + fg = f82c425_smartmap_add(fg, f82c425->shift & 0x0f, sat); + bg = f82c425_smartmap_add(bg, -(f82c425->shift >> 4), sat); + } else { + fg = f82c425_smartmap_add(fg, -(f82c425->shift & 0x0f), sat); + bg = f82c425_smartmap_add(bg, f82c425->shift >> 4, sat); + } + } + } - smartmap[i][0] = f82c425_makecol(bg, f82c425->threshold & 0x20, f82c425->function & 0x80); - smartmap[i][1] = f82c425_makecol(fg, f82c425->threshold & 0x20, f82c425->function & 0x80); - } + smartmap[i][0] = f82c425_makecol(bg, f82c425->threshold & 0x20, f82c425->function & 0x80); + smartmap[i][1] = f82c425_makecol(fg, f82c425->threshold & 0x20, f82c425->function & 0x80); + } } /* Calculate mapping of 320x200 graphical mode colors. */ -static void f82c425_colormap(f82c425_t *f82c425) +static void +f82c425_colormap(f82c425_t *f82c425) { - int i; + int i; - for (i = 0; i < 4; i++) - colormap[i] = f82c425_makecol(5 * i, 0, f82c425->function & 0x80); + for (i = 0; i < 4; i++) + colormap[i] = f82c425_makecol(5 * i, 0, f82c425->function & 0x80); } -static void f82c425_out(uint16_t addr, uint8_t val, void *p) +static void +f82c425_out(uint16_t addr, uint8_t val, void *p) { - f82c425_t *f82c425 = (f82c425_t *)p; + f82c425_t *f82c425 = (f82c425_t *) p; - if (addr == 0x3d4) - f82c425->crtcreg = val; + if (addr == 0x3d4) + f82c425->crtcreg = val; - if (((f82c425->function & 0x01) == 0) && ((f82c425->crtcreg != 0xdf) || (addr != 0x3d5))) - return; + if (((f82c425->function & 0x01) == 0) && ((f82c425->crtcreg != 0xdf) || (addr != 0x3d5))) + return; - if (addr != 0x3d5 || f82c425->crtcreg <= 31) - { - cga_out(addr, val, &f82c425->cga); - return; - } + if (addr != 0x3d5 || f82c425->crtcreg <= 31) { + cga_out(addr, val, &f82c425->cga); + return; + } - switch (f82c425->crtcreg) - { - case 0xd9: - f82c425->ac_limit = val; - break; - case 0xda: - f82c425->threshold = val; - f82c425_smartmap(f82c425); - break; - case 0xdb: - f82c425->shift = val; - f82c425_smartmap(f82c425); - break; - case 0xdc: - f82c425->hsync = val; - break; - case 0xdd: - f82c425->vsync_blink = val; - break; - case 0xde: - f82c425->timing = val; - break; - case 0xdf: - f82c425->function = val; - f82c425_smartmap(f82c425); - f82c425_colormap(f82c425); - break; - } + switch (f82c425->crtcreg) { + case 0xd9: + f82c425->ac_limit = val; + break; + case 0xda: + f82c425->threshold = val; + f82c425_smartmap(f82c425); + break; + case 0xdb: + f82c425->shift = val; + f82c425_smartmap(f82c425); + break; + case 0xdc: + f82c425->hsync = val; + break; + case 0xdd: + f82c425->vsync_blink = val; + break; + case 0xde: + f82c425->timing = val; + break; + case 0xdf: + f82c425->function = val; + f82c425_smartmap(f82c425); + f82c425_colormap(f82c425); + break; + } } -static uint8_t f82c425_in(uint16_t addr, void *p) +static uint8_t +f82c425_in(uint16_t addr, void *p) { - f82c425_t *f82c425 = (f82c425_t *)p; + f82c425_t *f82c425 = (f82c425_t *) p; - if ((f82c425->function & 0x01) == 0) - return 0xff; + if ((f82c425->function & 0x01) == 0) + return 0xff; - if (addr == 0x3d4) - return f82c425->crtcreg; + if (addr == 0x3d4) + return f82c425->crtcreg; - if (addr != 0x3d5 || f82c425->crtcreg <= 31) - return cga_in(addr, &f82c425->cga); + if (addr != 0x3d5 || f82c425->crtcreg <= 31) + return cga_in(addr, &f82c425->cga); - switch (f82c425->crtcreg) - { - case 0xd9: - return f82c425->ac_limit; - case 0xda: - return f82c425->threshold; - case 0xdb: - return f82c425->shift; - case 0xdc: - return f82c425->hsync; - case 0xdd: - return f82c425->vsync_blink; - case 0xde: - return f82c425->timing; - case 0xdf: - return f82c425->function; - } + switch (f82c425->crtcreg) { + case 0xd9: + return f82c425->ac_limit; + case 0xda: + return f82c425->threshold; + case 0xdb: + return f82c425->shift; + case 0xdc: + return f82c425->hsync; + case 0xdd: + return f82c425->vsync_blink; + case 0xde: + return f82c425->timing; + case 0xdf: + return f82c425->function; + } - return 0xff; + return 0xff; } -static void f82c425_write(uint32_t addr, uint8_t val, void *p) +static void +f82c425_write(uint32_t addr, uint8_t val, void *p) { - f82c425_t *f82c425 = (f82c425_t *)p; + f82c425_t *f82c425 = (f82c425_t *) p; - f82c425->vram[addr & 0x3fff] = val; - cycles -= 4; + f82c425->vram[addr & 0x3fff] = val; + cycles -= 4; } -static uint8_t f82c425_read(uint32_t addr, void *p) +static uint8_t +f82c425_read(uint32_t addr, void *p) { - f82c425_t *f82c425 = (f82c425_t *)p; - cycles -= 4; + f82c425_t *f82c425 = (f82c425_t *) p; + cycles -= 4; - return f82c425->vram[addr & 0x3fff]; + return f82c425->vram[addr & 0x3fff]; } -static void f82c425_recalctimings(f82c425_t *f82c425) +static void +f82c425_recalctimings(f82c425_t *f82c425) { - double disptime; - double _dispontime, _dispofftime; + double disptime; + double _dispontime, _dispofftime; - if (f82c425->function & 0x08) - { - cga_recalctimings(&f82c425->cga); - return; - } + if (f82c425->function & 0x08) { + cga_recalctimings(&f82c425->cga); + return; + } - disptime = 651; - _dispontime = 640; - _dispofftime = disptime - _dispontime; - f82c425->dispontime = (uint64_t)(_dispontime * xt_cpu_multi); - f82c425->dispofftime = (uint64_t)(_dispofftime * xt_cpu_multi); + disptime = 651; + _dispontime = 640; + _dispofftime = disptime - _dispontime; + f82c425->dispontime = (uint64_t) (_dispontime * xt_cpu_multi); + f82c425->dispofftime = (uint64_t) (_dispofftime * xt_cpu_multi); } /* Draw a row of text. */ -static void f82c425_text_row(f82c425_t *f82c425) +static void +f82c425_text_row(f82c425_t *f82c425) { - uint32_t colors[2]; - int x, c; - uint8_t chr, attr; - int drawcursor; - int cursorline; - int blink; - uint16_t addr; - uint8_t sc; - uint16_t ma = (f82c425->cga.crtc[0x0d] | (f82c425->cga.crtc[0x0c] << 8)) & 0x3fff; - uint16_t ca = (f82c425->cga.crtc[0x0f] | (f82c425->cga.crtc[0x0e] << 8)) & 0x3fff; - uint8_t sl = f82c425->cga.crtc[9] + 1; - int columns = f82c425->cga.crtc[1]; + uint32_t colors[2]; + int x, c; + uint8_t chr, attr; + int drawcursor; + int cursorline; + int blink; + uint16_t addr; + uint8_t sc; + uint16_t ma = (f82c425->cga.crtc[0x0d] | (f82c425->cga.crtc[0x0c] << 8)) & 0x3fff; + uint16_t ca = (f82c425->cga.crtc[0x0f] | (f82c425->cga.crtc[0x0e] << 8)) & 0x3fff; + uint8_t sl = f82c425->cga.crtc[9] + 1; + int columns = f82c425->cga.crtc[1]; - sc = (f82c425->displine) & 7; - addr = ((ma & ~1) + (f82c425->displine >> 3) * columns) * 2; - ma += (f82c425->displine >> 3) * columns; + sc = (f82c425->displine) & 7; + addr = ((ma & ~1) + (f82c425->displine >> 3) * columns) * 2; + ma += (f82c425->displine >> 3) * columns; - if ((f82c425->cga.crtc[0x0a] & 0x60) == 0x20) - { - cursorline = 0; - } - else - { - cursorline = ((f82c425->cga.crtc[0x0a] & 0x0F) <= sc) && - ((f82c425->cga.crtc[0x0b] & 0x0F) >= sc); - } + if ((f82c425->cga.crtc[0x0a] & 0x60) == 0x20) { + cursorline = 0; + } else { + cursorline = ((f82c425->cga.crtc[0x0a] & 0x0F) <= sc) && ((f82c425->cga.crtc[0x0b] & 0x0F) >= sc); + } - for (x = 0; x < columns; x++) - { - chr = f82c425->vram[(addr + 2 * x) & 0x3FFF]; - attr = f82c425->vram[(addr + 2 * x + 1) & 0x3FFF]; - drawcursor = ((ma == ca) && cursorline && - (f82c425->cga.cgamode & 0x8) && (f82c425->cga.cgablink & 0x10)); + for (x = 0; x < columns; x++) { + chr = f82c425->vram[(addr + 2 * x) & 0x3FFF]; + attr = f82c425->vram[(addr + 2 * x + 1) & 0x3FFF]; + drawcursor = ((ma == ca) && cursorline && (f82c425->cga.cgamode & 0x8) && (f82c425->cga.cgablink & 0x10)); - blink = ((f82c425->cga.cgablink & 0x10) && (f82c425->cga.cgamode & 0x20) && - (attr & 0x80) && !drawcursor); + blink = ((f82c425->cga.cgablink & 0x10) && (f82c425->cga.cgamode & 0x20) && (attr & 0x80) && !drawcursor); - if (drawcursor) - { - colors[0] = smartmap[~attr & 0xff][0]; - colors[1] = smartmap[~attr & 0xff][1]; - } - else - { - colors[0] = smartmap[attr][0]; - colors[1] = smartmap[attr][1]; - } + if (drawcursor) { + colors[0] = smartmap[~attr & 0xff][0]; + colors[1] = smartmap[~attr & 0xff][1]; + } else { + colors[0] = smartmap[attr][0]; + colors[1] = smartmap[attr][1]; + } - if (blink) - colors[1] = colors[0]; + if (blink) + colors[1] = colors[0]; - if (f82c425->cga.cgamode & 0x01) - { - /* High resolution (80 cols) */ - for (c = 0; c < sl; c++) - { - ((uint32_t *)buffer32->line[f82c425->displine])[(x << 3) + c] = - colors[(fontdat[chr][sc] & (1 <<(c ^ 7))) ? 1 : 0]; - } - } - else - { - /* Low resolution (40 columns, stretch pixels horizontally) */ - for (c = 0; c < sl; c++) - { - ((uint32_t *)buffer32->line[f82c425->displine])[(x << 4) + c*2] = - ((uint32_t *)buffer32->line[f82c425->displine])[(x << 4) + c*2+1] = - colors[(fontdat[chr][sc] & (1 <<(c ^ 7))) ? 1 : 0]; - } - } + if (f82c425->cga.cgamode & 0x01) { + /* High resolution (80 cols) */ + for (c = 0; c < sl; c++) { + ((uint32_t *) buffer32->line[f82c425->displine])[(x << 3) + c] = colors[(fontdat[chr][sc] & (1 << (c ^ 7))) ? 1 : 0]; + } + } else { + /* Low resolution (40 columns, stretch pixels horizontally) */ + for (c = 0; c < sl; c++) { + ((uint32_t *) buffer32->line[f82c425->displine])[(x << 4) + c * 2] = ((uint32_t *) buffer32->line[f82c425->displine])[(x << 4) + c * 2 + 1] = colors[(fontdat[chr][sc] & (1 << (c ^ 7))) ? 1 : 0]; + } + } - ++ma; - } + ++ma; + } } /* Draw a line in CGA 640x200 mode */ -static void f82c425_cgaline6(f82c425_t *f82c425) +static void +f82c425_cgaline6(f82c425_t *f82c425) { - int x, c; - uint8_t dat; - uint16_t addr; + int x, c; + uint8_t dat; + uint16_t addr; - uint16_t ma = (f82c425->cga.crtc[0x0d] | (f82c425->cga.crtc[0x0c] << 8)) & 0x3fff; + uint16_t ma = (f82c425->cga.crtc[0x0d] | (f82c425->cga.crtc[0x0c] << 8)) & 0x3fff; - addr = ((f82c425->displine) & 1) * 0x2000 + - (f82c425->displine >> 1) * 80 + - ((ma & ~1) << 1); + addr = ((f82c425->displine) & 1) * 0x2000 + (f82c425->displine >> 1) * 80 + ((ma & ~1) << 1); - for (x = 0; x < 80; x++) - { - dat = f82c425->vram[addr & 0x3FFF]; - addr++; + for (x = 0; x < 80; x++) { + dat = f82c425->vram[addr & 0x3FFF]; + addr++; - for (c = 0; c < 8; c++) - { - ((uint32_t *)buffer32->line[f82c425->displine])[x*8+c] = - colormap[dat & 0x80 ? 3 : 0]; + for (c = 0; c < 8; c++) { + ((uint32_t *) buffer32->line[f82c425->displine])[x * 8 + c] = colormap[dat & 0x80 ? 3 : 0]; - dat = dat << 1; - } - } + dat = dat << 1; + } + } } /* Draw a line in CGA 320x200 mode. */ -static void f82c425_cgaline4(f82c425_t *f82c425) +static void +f82c425_cgaline4(f82c425_t *f82c425) { - int x, c; - uint8_t dat, pattern; - uint16_t addr; + int x, c; + uint8_t dat, pattern; + uint16_t addr; - uint16_t ma = (f82c425->cga.crtc[0x0d] | (f82c425->cga.crtc[0x0c] << 8)) & 0x3fff; - addr = ((f82c425->displine) & 1) * 0x2000 + - (f82c425->displine >> 1) * 80 + - ((ma & ~1) << 1); + uint16_t ma = (f82c425->cga.crtc[0x0d] | (f82c425->cga.crtc[0x0c] << 8)) & 0x3fff; + addr = ((f82c425->displine) & 1) * 0x2000 + (f82c425->displine >> 1) * 80 + ((ma & ~1) << 1); - for (x = 0; x < 80; x++) - { - dat = f82c425->vram[addr & 0x3FFF]; - addr++; + for (x = 0; x < 80; x++) { + dat = f82c425->vram[addr & 0x3FFF]; + addr++; - for (c = 0; c < 4; c++) - { - pattern = (dat & 0xC0) >> 6; - if (!(f82c425->cga.cgamode & 0x08)) pattern = 0; + for (c = 0; c < 4; c++) { + pattern = (dat & 0xC0) >> 6; + if (!(f82c425->cga.cgamode & 0x08)) + pattern = 0; - ((uint32_t *)buffer32->line[f82c425->displine])[x*8+2*c] = - ((uint32_t *)buffer32->line[f82c425->displine])[x*8+2*c+1] = - colormap[pattern & 3]; + ((uint32_t *) buffer32->line[f82c425->displine])[x * 8 + 2 * c] = ((uint32_t *) buffer32->line[f82c425->displine])[x * 8 + 2 * c + 1] = colormap[pattern & 3]; - dat = dat << 2; - } - } + dat = dat << 2; + } + } } -static void f82c425_poll(void *p) +static void +f82c425_poll(void *p) { - f82c425_t *f82c425 = (f82c425_t *)p; + f82c425_t *f82c425 = (f82c425_t *) p; - if (f82c425->video_options != st_video_options || - !!(f82c425->function & 1) != st_enabled) - { - f82c425->video_options = st_video_options; - f82c425->function &= ~1; - f82c425->function |= st_enabled ? 1 : 0; + if (f82c425->video_options != st_video_options || !!(f82c425->function & 1) != st_enabled) { + f82c425->video_options = st_video_options; + f82c425->function &= ~1; + f82c425->function |= st_enabled ? 1 : 0; - if (f82c425->function & 0x01) - mem_mapping_enable(&f82c425->mapping); - else - mem_mapping_disable(&f82c425->mapping); - } - /* Switch between internal LCD and external CRT display. */ - if (st_display_internal != -1 && st_display_internal != !!(f82c425->function & 0x08)) - { - if (st_display_internal) - { - f82c425->function &= ~0x08; - f82c425->timing &= ~0x20; - } - else - { - f82c425->function |= 0x08; - f82c425->timing |= 0x20; - } - f82c425_recalctimings(f82c425); - } + if (f82c425->function & 0x01) + mem_mapping_enable(&f82c425->mapping); + else + mem_mapping_disable(&f82c425->mapping); + } + /* Switch between internal LCD and external CRT display. */ + if (st_display_internal != -1 && st_display_internal != !!(f82c425->function & 0x08)) { + if (st_display_internal) { + f82c425->function &= ~0x08; + f82c425->timing &= ~0x20; + } else { + f82c425->function |= 0x08; + f82c425->timing |= 0x20; + } + f82c425_recalctimings(f82c425); + } - if (f82c425->function & 0x08) - { - cga_poll(&f82c425->cga); - return; - } + if (f82c425->function & 0x08) { + cga_poll(&f82c425->cga); + return; + } - if (!f82c425->linepos) - { - timer_advance_u64(&f82c425->cga.timer, f82c425->dispofftime); - f82c425->cga.cgastat |= 1; - f82c425->linepos = 1; - if (f82c425->dispon) - { - if (f82c425->displine == 0) - { - video_wait_for_buffer(); - } + if (!f82c425->linepos) { + timer_advance_u64(&f82c425->cga.timer, f82c425->dispofftime); + f82c425->cga.cgastat |= 1; + f82c425->linepos = 1; + if (f82c425->dispon) { + if (f82c425->displine == 0) { + video_wait_for_buffer(); + } - switch (f82c425->cga.cgamode & 0x13) - { - case 0x12: - f82c425_cgaline6(f82c425); - break; - case 0x02: - f82c425_cgaline4(f82c425); - break; - case 0x00: - case 0x01: - f82c425_text_row(f82c425); - break; - } - } - f82c425->displine++; + switch (f82c425->cga.cgamode & 0x13) { + case 0x12: + f82c425_cgaline6(f82c425); + break; + case 0x02: + f82c425_cgaline4(f82c425); + break; + case 0x00: + case 0x01: + f82c425_text_row(f82c425); + break; + } + } + f82c425->displine++; - /* Hardcode a fixed refresh rate and VSYNC timing */ - if (f82c425->displine >= 216) - { - /* End of VSYNC */ - f82c425->displine = 0; - f82c425->cga.cgastat &= ~8; - f82c425->dispon = 1; - } - else - if (f82c425->displine == (f82c425->cga.crtc[9] + 1) * f82c425->cga.crtc[6]) - { - /* Start of VSYNC */ - f82c425->cga.cgastat |= 8; - f82c425->dispon = 0; - } - } - else - { - if (f82c425->dispon) - f82c425->cga.cgastat &= ~1; - timer_advance_u64(&f82c425->cga.timer, f82c425->dispontime); - f82c425->linepos = 0; + /* Hardcode a fixed refresh rate and VSYNC timing */ + if (f82c425->displine >= 216) { + /* End of VSYNC */ + f82c425->displine = 0; + f82c425->cga.cgastat &= ~8; + f82c425->dispon = 1; + } else if (f82c425->displine == (f82c425->cga.crtc[9] + 1) * f82c425->cga.crtc[6]) { + /* Start of VSYNC */ + f82c425->cga.cgastat |= 8; + f82c425->dispon = 0; + } + } else { + if (f82c425->dispon) + f82c425->cga.cgastat &= ~1; + timer_advance_u64(&f82c425->cga.timer, f82c425->dispontime); + f82c425->linepos = 0; - if (f82c425->displine == 200) - { - /* Hardcode 640x200 window size */ - if ((F82C425_XSIZE != xsize) || (F82C425_YSIZE != ysize) || video_force_resize_get()) - { - xsize = F82C425_XSIZE; - ysize = F82C425_YSIZE; - set_screen_size(xsize, ysize); + if (f82c425->displine == 200) { + /* Hardcode 640x200 window size */ + if ((F82C425_XSIZE != xsize) || (F82C425_YSIZE != ysize) || video_force_resize_get()) { + xsize = F82C425_XSIZE; + ysize = F82C425_YSIZE; + set_screen_size(xsize, ysize); - if (video_force_resize_get()) - video_force_resize_set(0); - } - video_blit_memtoscreen(0, 0, xsize, ysize); - frames++; + if (video_force_resize_get()) + video_force_resize_set(0); + } + video_blit_memtoscreen(0, 0, xsize, ysize); + frames++; - /* Fixed 640x200 resolution */ - video_res_x = F82C425_XSIZE; - video_res_y = F82C425_YSIZE; + /* Fixed 640x200 resolution */ + video_res_x = F82C425_XSIZE; + video_res_y = F82C425_YSIZE; - switch (f82c425->cga.cgamode & 0x12) - { - case 0x12: - video_bpp = 1; - break; - case 0x02: - video_bpp = 2; - break; - default: - video_bpp = 0; - } + switch (f82c425->cga.cgamode & 0x12) { + case 0x12: + video_bpp = 1; + break; + case 0x02: + video_bpp = 2; + break; + default: + video_bpp = 0; + } - f82c425->cga.cgablink++; - } - } + f82c425->cga.cgablink++; + } + } } -static void *f82c425_init(const device_t *info) +static void * +f82c425_init(const device_t *info) { - f82c425_t *f82c425 = malloc(sizeof(f82c425_t)); - memset(f82c425, 0, sizeof(f82c425_t)); - cga_init(&f82c425->cga); - video_inform(VIDEO_FLAG_TYPE_CGA, &timing_f82c425); + f82c425_t *f82c425 = malloc(sizeof(f82c425_t)); + memset(f82c425, 0, sizeof(f82c425_t)); + cga_init(&f82c425->cga); + video_inform(VIDEO_FLAG_TYPE_CGA, &timing_f82c425); - /* Initialize registers that don't default to zero. */ - f82c425->hsync = 0x40; - f82c425->vsync_blink = 0x72; + /* Initialize registers that don't default to zero. */ + f82c425->hsync = 0x40; + f82c425->vsync_blink = 0x72; - /* 16k video RAM */ - f82c425->vram = malloc(0x4000); + /* 16k video RAM */ + f82c425->vram = malloc(0x4000); - timer_set_callback(&f82c425->cga.timer, f82c425_poll); - timer_set_p(&f82c425->cga.timer, f82c425); + timer_set_callback(&f82c425->cga.timer, f82c425_poll); + timer_set_p(&f82c425->cga.timer, f82c425); - /* Occupy memory between 0xB8000 and 0xBFFFF */ - mem_mapping_add(&f82c425->mapping, 0xb8000, 0x8000, f82c425_read, NULL, NULL, f82c425_write, NULL, NULL, NULL, 0, f82c425); - /* Respond to CGA I/O ports */ - io_sethandler(0x03d0, 0x000c, f82c425_in, NULL, NULL, f82c425_out, NULL, NULL, f82c425); + /* Occupy memory between 0xB8000 and 0xBFFFF */ + mem_mapping_add(&f82c425->mapping, 0xb8000, 0x8000, f82c425_read, NULL, NULL, f82c425_write, NULL, NULL, NULL, 0, f82c425); + /* Respond to CGA I/O ports */ + io_sethandler(0x03d0, 0x000c, f82c425_in, NULL, NULL, f82c425_out, NULL, NULL, f82c425); - /* Initialize color maps for text & graphic modes */ - f82c425_smartmap(f82c425); - f82c425_colormap(f82c425); + /* Initialize color maps for text & graphic modes */ + f82c425_smartmap(f82c425); + f82c425_colormap(f82c425); - /* Start off in 80x25 text mode */ - f82c425->cga.cgastat = 0xF4; - f82c425->cga.vram = f82c425->vram; - f82c425->video_options = 0x01; + /* Start off in 80x25 text mode */ + f82c425->cga.cgastat = 0xF4; + f82c425->cga.vram = f82c425->vram; + f82c425->video_options = 0x01; - return f82c425; + return f82c425; } -static void f82c425_close(void *p) +static void +f82c425_close(void *p) { - f82c425_t *f82c425 = (f82c425_t *)p; + f82c425_t *f82c425 = (f82c425_t *) p; - free(f82c425->vram); - free(f82c425); + free(f82c425->vram); + free(f82c425); } -static void f82c425_speed_changed(void *p) +static void +f82c425_speed_changed(void *p) { - f82c425_t *f82c425 = (f82c425_t *)p; + f82c425_t *f82c425 = (f82c425_t *) p; - f82c425_recalctimings(f82c425); + f82c425_recalctimings(f82c425); } const device_t f82c425_video_device = { - .name = "82C425 CGA LCD/CRT Controller", + .name = "82C425 CGA LCD/CRT Controller", .internal_name = "f82c425_video", - .flags = 0, - .local = 0, - .init = f82c425_init, - .close = f82c425_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = f82c425_init, + .close = f82c425_close, + .reset = NULL, { .available = NULL }, .speed_changed = f82c425_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_genius.c b/src/video/vid_genius.c index c275eeb35..643aaa643 100644 --- a/src/video/vid_genius.c +++ b/src/video/vid_genius.c @@ -32,18 +32,14 @@ #include <86box/plat.h> #include <86box/video.h> +#define BIOS_ROM_PATH "roms/video/genius/8x12.bin" -#define BIOS_ROM_PATH "roms/video/genius/8x12.bin" - - -#define GENIUS_XSIZE 728 -#define GENIUS_YSIZE 1008 - +#define GENIUS_XSIZE 728 +#define GENIUS_YSIZE 1008 extern uint8_t fontdat8x12[256][16]; -static video_timings_t timing_genius = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; - +static video_timings_t timing_genius = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; /* I'm at something of a disadvantage writing this emulation: I don't have an * MDSI Genius card, nor do I have the BIOS extension (VHRBIOS.SYS) that came @@ -95,48 +91,45 @@ static video_timings_t timing_genius = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; * in an 8x12 cell if necessary. */ +typedef struct genius_t { + mem_mapping_t mapping; + uint8_t mda_crtc[32]; /* The 'CRTC' as the host PC sees it */ + int mda_crtcreg; /* Current CRTC register */ + uint8_t cga_crtc[32]; /* The 'CRTC' as the host PC sees it */ + int cga_crtcreg; /* Current CRTC register */ + uint8_t genius_control; /* Native control register + * I think bit 0 enables the full + * framebuffer. + */ + uint8_t genius_charh; /* Native character height register: + * 00h => chars are 15 pixels high + * 81h => chars are 14 pixels high + * 83h => chars are 12 pixels high + * 90h => chars are 30 pixels high [15 x 2] + * 93h => chars are 24 pixels high [12 x 2] + */ + uint8_t genius_mode; /* Current mode (see list at top of file) */ + uint8_t cga_ctrl; /* Emulated CGA control register */ + uint8_t mda_ctrl; /* Emulated MDA control register */ + uint8_t cga_colour; /* Emulated CGA colour register (ignored) */ -typedef struct genius_t -{ - mem_mapping_t mapping; + uint8_t mda_stat; /* MDA status (IN 0x3BA) */ + uint8_t cga_stat; /* CGA status (IN 0x3DA) */ - uint8_t mda_crtc[32]; /* The 'CRTC' as the host PC sees it */ - int mda_crtcreg; /* Current CRTC register */ - uint8_t cga_crtc[32]; /* The 'CRTC' as the host PC sees it */ - int cga_crtcreg; /* Current CRTC register */ - uint8_t genius_control; /* Native control register - * I think bit 0 enables the full - * framebuffer. - */ - uint8_t genius_charh; /* Native character height register: - * 00h => chars are 15 pixels high - * 81h => chars are 14 pixels high - * 83h => chars are 12 pixels high - * 90h => chars are 30 pixels high [15 x 2] - * 93h => chars are 24 pixels high [12 x 2] - */ - uint8_t genius_mode; /* Current mode (see list at top of file) */ - uint8_t cga_ctrl; /* Emulated CGA control register */ - uint8_t mda_ctrl; /* Emulated MDA control register */ - uint8_t cga_colour; /* Emulated CGA colour register (ignored) */ + int font; /* Current font, 0 or 1 */ + int enabled; /* Display enabled, 0 or 1 */ + int detach; /* Detach cursor, 0 or 1 */ - uint8_t mda_stat; /* MDA status (IN 0x3BA) */ - uint8_t cga_stat; /* CGA status (IN 0x3DA) */ + uint64_t dispontime, dispofftime; + pc_timer_t timer; - int font; /* Current font, 0 or 1 */ - int enabled; /* Display enabled, 0 or 1 */ - int detach; /* Detach cursor, 0 or 1 */ + int linepos, displine; + int vc; + int dispon, blink; + int vsynctime; - uint64_t dispontime, dispofftime; - pc_timer_t timer; - - int linepos, displine; - int vc; - int dispon, blink; - int vsynctime; - - uint8_t *vram; + uint8_t *vram; } genius_t; static uint8_t genius_pal[4]; @@ -144,247 +137,261 @@ static uint8_t genius_pal[4]; /* Mapping of attributes to colours, in MDA emulation mode */ static uint8_t mdaattr[256][2][2]; -void genius_recalctimings(genius_t *genius); -void genius_write(uint32_t addr, uint8_t val, void *p); +void genius_recalctimings(genius_t *genius); +void genius_write(uint32_t addr, uint8_t val, void *p); uint8_t genius_read(uint32_t addr, void *p); - void genius_out(uint16_t addr, uint8_t val, void *p) { - genius_t *genius = (genius_t *)p; + genius_t *genius = (genius_t *) p; switch (addr) { - case 0x3b0: /* Command / control register */ - genius->genius_control = val; - if (val & 1) - mem_mapping_set_addr(&genius->mapping, 0xa0000, 0x28000); - else - mem_mapping_set_addr(&genius->mapping, 0xb0000, 0x10000); - break; + case 0x3b0: /* Command / control register */ + genius->genius_control = val; + if (val & 1) + mem_mapping_set_addr(&genius->mapping, 0xa0000, 0x28000); + else + mem_mapping_set_addr(&genius->mapping, 0xb0000, 0x10000); + break; - case 0x3b1: - genius->genius_charh = val; - break; + case 0x3b1: + genius->genius_charh = val; + break; - /* Emulated CRTC, register select */ - case 0x3b2: case 0x3b4: case 0x3b6: - genius->mda_crtcreg = val & 31; - break; + /* Emulated CRTC, register select */ + case 0x3b2: + case 0x3b4: + case 0x3b6: + genius->mda_crtcreg = val & 31; + break; - /* Emulated CRTC, value */ - case 0x3b3: case 0x3b5: case 0x3b7: - genius->mda_crtc[genius->mda_crtcreg] = val; - genius_recalctimings(genius); - return; + /* Emulated CRTC, value */ + case 0x3b3: + case 0x3b5: + case 0x3b7: + genius->mda_crtc[genius->mda_crtcreg] = val; + genius_recalctimings(genius); + return; - /* Emulated MDA control register */ - case 0x3b8: - genius->mda_ctrl = val; - return; + /* Emulated MDA control register */ + case 0x3b8: + genius->mda_ctrl = val; + return; - /* Emulated CRTC, register select */ - case 0x3d0: case 0x3d2: case 0x3d4: case 0x3d6: - genius->cga_crtcreg = val & 31; - break; + /* Emulated CRTC, register select */ + case 0x3d0: + case 0x3d2: + case 0x3d4: + case 0x3d6: + genius->cga_crtcreg = val & 31; + break; - /* Emulated CRTC, value */ - case 0x3d1: case 0x3d3: case 0x3d5: case 0x3d7: - genius->cga_crtc[genius->cga_crtcreg] = val; - genius_recalctimings(genius); - return; + /* Emulated CRTC, value */ + case 0x3d1: + case 0x3d3: + case 0x3d5: + case 0x3d7: + genius->cga_crtc[genius->cga_crtcreg] = val; + genius_recalctimings(genius); + return; - /* Emulated CGA control register */ - case 0x3d8: - genius->cga_ctrl = val; - return; - /* Emulated CGA colour register */ - case 0x3d9: - genius->cga_colour = val; - return; + /* Emulated CGA control register */ + case 0x3d8: + genius->cga_ctrl = val; + return; + /* Emulated CGA colour register */ + case 0x3d9: + genius->cga_colour = val; + return; } } - uint8_t genius_in(uint16_t addr, void *p) { - genius_t *genius = (genius_t *)p; - uint8_t ret = 0xff; + genius_t *genius = (genius_t *) p; + uint8_t ret = 0xff; switch (addr) { - case 0x3b0: case 0x3b2: case 0x3b4: case 0x3b6: - ret = genius->mda_crtcreg; - break; - case 0x3b1: case 0x3b3: case 0x3b5: case 0x3b7: - ret = genius->mda_crtc[genius->mda_crtcreg]; - break; - case 0x3b8: - ret = genius->mda_ctrl; - break; - case 0x3ba: - ret = genius->mda_stat; - break; - case 0x3d0: case 0x3d2: case 0x3d4: case 0x3d6: - ret = genius->cga_crtcreg; - break; - case 0x3d1: case 0x3d3: case 0x3d5: case 0x3d7: - ret = genius->cga_crtc[genius->cga_crtcreg]; - break; - case 0x3d8: - ret = genius->cga_ctrl; - break; - case 0x3d9: - ret = genius->cga_colour; - break; - case 0x3da: - ret = genius->cga_stat; - break; + case 0x3b0: + case 0x3b2: + case 0x3b4: + case 0x3b6: + ret = genius->mda_crtcreg; + break; + case 0x3b1: + case 0x3b3: + case 0x3b5: + case 0x3b7: + ret = genius->mda_crtc[genius->mda_crtcreg]; + break; + case 0x3b8: + ret = genius->mda_ctrl; + break; + case 0x3ba: + ret = genius->mda_stat; + break; + case 0x3d0: + case 0x3d2: + case 0x3d4: + case 0x3d6: + ret = genius->cga_crtcreg; + break; + case 0x3d1: + case 0x3d3: + case 0x3d5: + case 0x3d7: + ret = genius->cga_crtc[genius->cga_crtcreg]; + break; + case 0x3d8: + ret = genius->cga_ctrl; + break; + case 0x3d9: + ret = genius->cga_colour; + break; + case 0x3da: + ret = genius->cga_stat; + break; } return ret; } - static void genius_waitstates(void) { - int ws_array[16] = {3, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8}; + int ws_array[16] = { 3, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8 }; int ws; ws = ws_array[cycles & 0xf]; cycles -= ws; } - void genius_write(uint32_t addr, uint8_t val, void *p) { - genius_t *genius = (genius_t *)p; + genius_t *genius = (genius_t *) p; genius_waitstates(); if (genius->genius_control & 1) { - if ((addr >= 0xa0000) && (addr < 0xb0000)) - addr = (addr - 0xa0000) & 0xffff; - else if ((addr >= 0xb0000) && (addr < 0xb8000)) - addr = ((addr - 0xb0000) & 0x7fff) + 0x10000; - else - addr = ((addr - 0xb8000) & 0xffff) + 0x18000; + if ((addr >= 0xa0000) && (addr < 0xb0000)) + addr = (addr - 0xa0000) & 0xffff; + else if ((addr >= 0xb0000) && (addr < 0xb8000)) + addr = ((addr - 0xb0000) & 0x7fff) + 0x10000; + else + addr = ((addr - 0xb8000) & 0xffff) + 0x18000; } else { - /* If hi-res memory is disabled, only visible in the B000 segment */ - if (addr >= 0xb8000) - addr = (addr & 0x3FFF) + 0x18000; - else - addr = (addr & 0x7FFF) + 0x10000; + /* If hi-res memory is disabled, only visible in the B000 segment */ + if (addr >= 0xb8000) + addr = (addr & 0x3FFF) + 0x18000; + else + addr = (addr & 0x7FFF) + 0x10000; } genius->vram[addr] = val; } - uint8_t genius_read(uint32_t addr, void *p) { - genius_t *genius = (genius_t *)p; - uint8_t ret; + genius_t *genius = (genius_t *) p; + uint8_t ret; genius_waitstates(); if (genius->genius_control & 1) { - if ((addr >= 0xa0000) && (addr < 0xb0000)) - addr = (addr - 0xa0000) & 0xffff; - else if ((addr >= 0xb0000) && (addr < 0xb8000)) - addr = ((addr - 0xb0000) & 0x7fff) + 0x10000; - else - addr = ((addr - 0xb8000) & 0xffff) + 0x18000; + if ((addr >= 0xa0000) && (addr < 0xb0000)) + addr = (addr - 0xa0000) & 0xffff; + else if ((addr >= 0xb0000) && (addr < 0xb8000)) + addr = ((addr - 0xb0000) & 0x7fff) + 0x10000; + else + addr = ((addr - 0xb8000) & 0xffff) + 0x18000; } else { - /* If hi-res memory is disabled, only visible in the B000 segment */ - if (addr >= 0xb8000) - addr = (addr & 0x3FFF) + 0x18000; - else - addr = (addr & 0x7FFF) + 0x10000; + /* If hi-res memory is disabled, only visible in the B000 segment */ + if (addr >= 0xb8000) + addr = (addr & 0x3FFF) + 0x18000; + else + addr = (addr & 0x7FFF) + 0x10000; } ret = genius->vram[addr]; return ret; } - void genius_recalctimings(genius_t *genius) { double disptime; double _dispontime, _dispofftime; - disptime = 0x31; - _dispontime = 0x28; + disptime = 0x31; + _dispontime = 0x28; _dispofftime = disptime - _dispontime; - _dispontime *= MDACONST; + _dispontime *= MDACONST; _dispofftime *= MDACONST; - genius->dispontime = (uint64_t)(_dispontime); - genius->dispofftime = (uint64_t)(_dispofftime); + genius->dispontime = (uint64_t) (_dispontime); + genius->dispofftime = (uint64_t) (_dispofftime); } - static int genius_lines(genius_t *genius) { int ret = 350; switch (genius->genius_charh & 0x13) { - case 0x00: - ret = 990; /* 80x66 */ - break; - case 0x01: - ret = 980; /* 80x70 */ - break; - case 0x02: - ret = 988; /* Guess: 80x76 */ - break; - case 0x03: - ret = 984; /* 80x82 */ - break; - case 0x10: - ret = 375; /* Logic says 80x33 but it appears to be 80x25 */ - break; - case 0x11: - ret = 490; /* Guess: 80x35, fits the logic as well, half of 80x70 */ - break; - case 0x12: - ret = 494; /* Guess: 80x38 */ - break; - case 0x13: - ret = 492; /* 80x41 */ - break; + case 0x00: + ret = 990; /* 80x66 */ + break; + case 0x01: + ret = 980; /* 80x70 */ + break; + case 0x02: + ret = 988; /* Guess: 80x76 */ + break; + case 0x03: + ret = 984; /* 80x82 */ + break; + case 0x10: + ret = 375; /* Logic says 80x33 but it appears to be 80x25 */ + break; + case 0x11: + ret = 490; /* Guess: 80x35, fits the logic as well, half of 80x70 */ + break; + case 0x12: + ret = 494; /* Guess: 80x38 */ + break; + case 0x13: + ret = 492; /* 80x41 */ + break; } return ret; } - /* Draw a single line of the screen in either text mode */ static void genius_textline(genius_t *genius, uint8_t background, int mda, int cols80) { - int w = 80; /* 80 characters across */ - int cw = 9; /* Each character is 9 pixels wide */ - uint8_t chr, attr, sc, ctrl; - uint8_t *crtc, bitmap[2]; - int x, blink, c, row, charh; - int drawcursor, cursorline; - uint16_t addr; - uint16_t ma = (genius->mda_crtc[13] | (genius->mda_crtc[12] << 8)) & 0x3fff; - uint16_t ca = (genius->mda_crtc[15] | (genius->mda_crtc[14] << 8)) & 0x3fff; + int w = 80; /* 80 characters across */ + int cw = 9; /* Each character is 9 pixels wide */ + uint8_t chr, attr, sc, ctrl; + uint8_t *crtc, bitmap[2]; + int x, blink, c, row, charh; + int drawcursor, cursorline; + uint16_t addr; + uint16_t ma = (genius->mda_crtc[13] | (genius->mda_crtc[12] << 8)) & 0x3fff; + uint16_t ca = (genius->mda_crtc[15] | (genius->mda_crtc[14] << 8)) & 0x3fff; unsigned char *framebuf = genius->vram + 0x10000; - uint32_t col, dl = genius->displine; + uint32_t col, dl = genius->displine; /* Character height is 12-15 */ if (mda) { - if (genius->displine >= genius_lines(genius)) - return; + if (genius->displine >= genius_lines(genius)) + return; - crtc = genius->mda_crtc; - ctrl = genius->mda_ctrl; - charh = 15 - (genius->genius_charh & 3); + crtc = genius->mda_crtc; + ctrl = genius->mda_ctrl; + charh = 15 - (genius->genius_charh & 3); #if 0 if (genius->genius_charh & 0x10) { @@ -395,24 +402,24 @@ genius_textline(genius_t *genius, uint8_t background, int mda, int cols80) sc = (dl % charh); } #else - row = (dl / charh); - sc = (dl % charh); + row = (dl / charh); + sc = (dl % charh); #endif } else { - if ((genius->displine < 512) || (genius->displine >= 912)) - return; + if ((genius->displine < 512) || (genius->displine >= 912)) + return; - crtc = genius->cga_crtc; - ctrl = genius->cga_ctrl; - framebuf += 0x08000; + crtc = genius->cga_crtc; + ctrl = genius->cga_ctrl; + framebuf += 0x08000; - dl -= 512; - w = crtc[1]; - cw = 8; - charh = crtc[9] + 1; + dl -= 512; + w = crtc[1]; + cw = 8; + charh = crtc[9] + 1; - row = ((dl >> 1) / charh); - sc = ((dl >> 1) % charh); + row = ((dl >> 1) / charh); + sc = ((dl >> 1) % charh); } ma = (crtc[13] | (crtc[12] << 8)) & 0x3fff; @@ -421,14 +428,14 @@ genius_textline(genius_t *genius, uint8_t background, int mda, int cols80) addr = ((ma & ~1) + row * w) * 2; if (!mda) - dl += 512; + dl += 512; ma += (row * w); if ((crtc[10] & 0x60) == 0x20) - cursorline = 0; + cursorline = 0; else - cursorline = ((crtc[10] & 0x1F) <= sc) && ((crtc[11] & 0x1F) >= sc); + cursorline = ((crtc[10] & 0x1F) <= sc) && ((crtc[11] & 0x1F) >= sc); for (x = 0; x < w; x++) { #if 0 @@ -437,275 +444,275 @@ genius_textline(genius_t *genius, uint8_t background, int mda, int cols80) if ((genius->genius_charh & 0x10) && ((addr + 2 * x + 1) > 0x0FFF)) attr = 0x00; #endif - chr = framebuf[(addr + 2 * x) & 0x3FFF]; - attr = framebuf[(addr + 2 * x + 1) & 0x3FFF]; + chr = framebuf[(addr + 2 * x) & 0x3FFF]; + attr = framebuf[(addr + 2 * x + 1) & 0x3FFF]; - drawcursor = ((ma == ca) && cursorline && genius->enabled && (ctrl & 8)); + drawcursor = ((ma == ca) && cursorline && genius->enabled && (ctrl & 8)); - switch (crtc[10] & 0x60) { - case 0x00: drawcursor = drawcursor && (genius->blink & 16); break; - case 0x60: drawcursor = drawcursor && (genius->blink & 32); break; - } + switch (crtc[10] & 0x60) { + case 0x00: + drawcursor = drawcursor && (genius->blink & 16); + break; + case 0x60: + drawcursor = drawcursor && (genius->blink & 32); + break; + } - blink = ((genius->blink & 16) && (ctrl & 0x20) && (attr & 0x80) && !drawcursor); + blink = ((genius->blink & 16) && (ctrl & 0x20) && (attr & 0x80) && !drawcursor); - if (ctrl & 0x20) attr &= 0x7F; + if (ctrl & 0x20) + attr &= 0x7F; - /* MDA underline */ - if (mda && (sc == charh) && ((attr & 7) == 1)) { - col = mdaattr[attr][blink][1]; + /* MDA underline */ + if (mda && (sc == charh) && ((attr & 7) == 1)) { + col = mdaattr[attr][blink][1]; - if (genius->genius_control & 0x20) - col ^= 15; + if (genius->genius_control & 0x20) + col ^= 15; - for (c = 0; c < cw; c++) { - if (col != background) { - if (cols80) - buffer32->line[dl][(x * cw) + c] = col; - else { - buffer32->line[dl][((x * cw) << 1) + (c << 1)] = - buffer32->line[dl][((x * cw) << 1) + (c << 1) + 1] = col; - } - } - } - } else { /* Draw 8 pixels of character */ - if (mda) - bitmap[0] = fontdat8x12[chr][sc]; - else - bitmap[0] = fontdat[chr][sc]; + for (c = 0; c < cw; c++) { + if (col != background) { + if (cols80) + buffer32->line[dl][(x * cw) + c] = col; + else { + buffer32->line[dl][((x * cw) << 1) + (c << 1)] = buffer32->line[dl][((x * cw) << 1) + (c << 1) + 1] = col; + } + } + } + } else { /* Draw 8 pixels of character */ + if (mda) + bitmap[0] = fontdat8x12[chr][sc]; + else + bitmap[0] = fontdat[chr][sc]; - for (c = 0; c < 8; c++) { - col = mdaattr[attr][blink][(bitmap[0] & (1 << (c ^ 7))) ? 1 : 0]; - if (!(genius->enabled) || !(ctrl & 8)) - col = mdaattr[0][0][0]; + for (c = 0; c < 8; c++) { + col = mdaattr[attr][blink][(bitmap[0] & (1 << (c ^ 7))) ? 1 : 0]; + if (!(genius->enabled) || !(ctrl & 8)) + col = mdaattr[0][0][0]; - if (genius->genius_control & 0x20) - col ^= 15; + if (genius->genius_control & 0x20) + col ^= 15; - if (col != background) { - if (cols80) - buffer32->line[dl][(x * cw) + c] = col; - else { - buffer32->line[dl][((x * cw) << 1) + (c << 1)] = - buffer32->line[dl][((x * cw) << 1) + (c << 1) + 1] = col; - } - } - } + if (col != background) { + if (cols80) + buffer32->line[dl][(x * cw) + c] = col; + else { + buffer32->line[dl][((x * cw) << 1) + (c << 1)] = buffer32->line[dl][((x * cw) << 1) + (c << 1) + 1] = col; + } + } + } - if (cw == 9) { - /* The ninth pixel column... */ - if ((chr & ~0x1f) == 0xc0) { - /* Echo column 8 for the graphics chars */ - if (cols80) { - col = buffer32->line[dl][(x * cw) + 7]; - if (col != background) - buffer32->line[dl][(x * cw) + 8] = col; - } else { - col = buffer32->line[dl][((x * cw) << 1) + 14]; - if (col != background) { - buffer32->line[dl][((x * cw) << 1) + 16] = - buffer32->line[dl][((x * cw) << 1) + 17] = col; - } - } - } else { /* Otherwise fill with background */ - col = mdaattr[attr][blink][0]; - if (genius->genius_control & 0x20) - col ^= 15; - if (col != background) { - if (cols80) - buffer32->line[dl][(x * cw) + 8] = col; - else { - buffer32->line[dl][((x * cw) << 1) + 16] = - buffer32->line[dl][((x * cw) << 1) + 17] = col; - } - } - } - } + if (cw == 9) { + /* The ninth pixel column... */ + if ((chr & ~0x1f) == 0xc0) { + /* Echo column 8 for the graphics chars */ + if (cols80) { + col = buffer32->line[dl][(x * cw) + 7]; + if (col != background) + buffer32->line[dl][(x * cw) + 8] = col; + } else { + col = buffer32->line[dl][((x * cw) << 1) + 14]; + if (col != background) { + buffer32->line[dl][((x * cw) << 1) + 16] = buffer32->line[dl][((x * cw) << 1) + 17] = col; + } + } + } else { /* Otherwise fill with background */ + col = mdaattr[attr][blink][0]; + if (genius->genius_control & 0x20) + col ^= 15; + if (col != background) { + if (cols80) + buffer32->line[dl][(x * cw) + 8] = col; + else { + buffer32->line[dl][((x * cw) << 1) + 16] = buffer32->line[dl][((x * cw) << 1) + 17] = col; + } + } + } + } - if (drawcursor) { - for (c = 0; c < cw; c++) { - if (cols80) - buffer32->line[dl][(x * cw) + c] ^= mdaattr[attr][0][1]; - else { - buffer32->line[dl][((x * cw) << 1) + (c << 1)] ^= mdaattr[attr][0][1]; - buffer32->line[dl][((x * cw) << 1) + (c << 1) + 1] ^= mdaattr[attr][0][1]; - } - } - } - ++ma; - } + if (drawcursor) { + for (c = 0; c < cw; c++) { + if (cols80) + buffer32->line[dl][(x * cw) + c] ^= mdaattr[attr][0][1]; + else { + buffer32->line[dl][((x * cw) << 1) + (c << 1)] ^= mdaattr[attr][0][1]; + buffer32->line[dl][((x * cw) << 1) + (c << 1) + 1] ^= mdaattr[attr][0][1]; + } + } + } + ++ma; + } } } - /* Draw a line in the CGA 640x200 mode */ void genius_cgaline(genius_t *genius) { - int x, c; + int x, c; uint32_t dat, addr; - uint8_t ink_f, ink_b; + uint8_t ink_f, ink_b; ink_f = (genius->genius_control & 0x20) ? genius_pal[0] : genius_pal[3]; ink_b = (genius->genius_control & 0x20) ? genius_pal[3] : genius_pal[0]; /* We draw the CGA at row 512 */ if ((genius->displine < 512) || (genius->displine >= 912)) - return; + return; addr = 0x18000 + 80 * ((genius->displine - 512) >> 2); if ((genius->displine - 512) & 2) - addr += 0x2000; + addr += 0x2000; for (x = 0; x < 80; x++) { - dat = genius->vram[addr]; - addr++; + dat = genius->vram[addr]; + addr++; - for (c = 0; c < 8; c++) { - if (dat & 0x80) - buffer32->line[genius->displine][(x << 3) + c] = ink_f; - else - buffer32->line[genius->displine][(x << 3) + c] = ink_b; + for (c = 0; c < 8; c++) { + if (dat & 0x80) + buffer32->line[genius->displine][(x << 3) + c] = ink_f; + else + buffer32->line[genius->displine][(x << 3) + c] = ink_b; - dat = dat << 1; - } + dat = dat << 1; + } } } - /* Draw a line in the native high-resolution mode */ void genius_hiresline(genius_t *genius) { - int x, c; + int x, c; uint32_t dat, addr; - uint8_t ink_f, ink_b; + uint8_t ink_f, ink_b; ink_f = (genius->genius_control & 0x20) ? genius_pal[0] : genius_pal[3]; ink_b = (genius->genius_control & 0x20) ? genius_pal[3] : genius_pal[0]; /* The first 512 lines live at A0000 */ if (genius->displine < 512) - addr = 128 * genius->displine; - else /* The second 496 live at B8000 */ - addr = 0x18000 + (128 * (genius->displine - 512)); + addr = 128 * genius->displine; + else /* The second 496 live at B8000 */ + addr = 0x18000 + (128 * (genius->displine - 512)); for (x = 0; x < 91; x++) { - dat = genius->vram[addr + x]; + dat = genius->vram[addr + x]; - for (c = 0; c < 8; c++) { - if (dat & 0x80) - buffer32->line[genius->displine][(x << 3) + c] = ink_f; - else - buffer32->line[genius->displine][(x << 3) + c] = ink_b; + for (c = 0; c < 8; c++) { + if (dat & 0x80) + buffer32->line[genius->displine][(x << 3) + c] = ink_f; + else + buffer32->line[genius->displine][(x << 3) + c] = ink_b; - dat = dat << 1; - } + dat = dat << 1; + } } } - void genius_poll(void *p) { - genius_t *genius = (genius_t *)p; - int x; - uint8_t background; + genius_t *genius = (genius_t *) p; + int x; + uint8_t background; if (!genius->linepos) { - timer_advance_u64(&genius->timer, genius->dispofftime); - genius->cga_stat |= 1; - genius->mda_stat |= 1; - genius->linepos = 1; + timer_advance_u64(&genius->timer, genius->dispofftime); + genius->cga_stat |= 1; + genius->mda_stat |= 1; + genius->linepos = 1; - if (genius->dispon) { - if (genius->genius_control & 0x20) - background = genius_pal[3]; - else - background = genius_pal[0]; + if (genius->dispon) { + if (genius->genius_control & 0x20) + background = genius_pal[3]; + else + background = genius_pal[0]; - if (genius->displine == 0) - video_wait_for_buffer(); + if (genius->displine == 0) + video_wait_for_buffer(); - /* Start off with a blank line */ - for (x = 0; x < GENIUS_XSIZE; x++) - buffer32->line[genius->displine][x] = background; + /* Start off with a blank line */ + for (x = 0; x < GENIUS_XSIZE; x++) + buffer32->line[genius->displine][x] = background; - /* If graphics display enabled, draw graphics on top - * of the blanked line */ - if (genius->cga_ctrl & 8) { - if (((genius->genius_control & 0x11) == 0x00) || (genius->genius_control & 0x08)) - genius_cgaline(genius); - else if ((genius->genius_control & 0x11) == 0x01) - genius_hiresline(genius); - else { - if (genius->cga_ctrl & 2) - genius_cgaline(genius); - else { - if (genius->cga_ctrl & 1) - genius_textline(genius, background, 0, 1); - else - genius_textline(genius, background, 0, 0); - } - } - } + /* If graphics display enabled, draw graphics on top + * of the blanked line */ + if (genius->cga_ctrl & 8) { + if (((genius->genius_control & 0x11) == 0x00) || (genius->genius_control & 0x08)) + genius_cgaline(genius); + else if ((genius->genius_control & 0x11) == 0x01) + genius_hiresline(genius); + else { + if (genius->cga_ctrl & 2) + genius_cgaline(genius); + else { + if (genius->cga_ctrl & 1) + genius_textline(genius, background, 0, 1); + else + genius_textline(genius, background, 0, 0); + } + } + } - /* If MDA display is enabled, draw MDA text on top - * of the lot */ - if (genius->mda_ctrl & 8) - genius_textline(genius, background, 1, 1); - } - genius->displine++; - /* Hardcode a fixed refresh rate and VSYNC timing */ - if (genius->displine == 1008) { /* Start of VSYNC */ - genius->cga_stat |= 8; - genius->mda_stat |= 8; - genius->dispon = 0; - } - if (genius->displine == 1040) { /* End of VSYNC */ - genius->displine = 0; - genius->cga_stat &= ~8; - genius->mda_stat &= ~8; - genius->dispon = 1; - } + /* If MDA display is enabled, draw MDA text on top + * of the lot */ + if (genius->mda_ctrl & 8) + genius_textline(genius, background, 1, 1); + } + genius->displine++; + /* Hardcode a fixed refresh rate and VSYNC timing */ + if (genius->displine == 1008) { /* Start of VSYNC */ + genius->cga_stat |= 8; + genius->mda_stat |= 8; + genius->dispon = 0; + } + if (genius->displine == 1040) { /* End of VSYNC */ + genius->displine = 0; + genius->cga_stat &= ~8; + genius->mda_stat &= ~8; + genius->dispon = 1; + } } else { - if (genius->dispon) { - genius->cga_stat &= ~1; - genius->mda_stat &= ~1; - } - timer_advance_u64(&genius->timer, genius->dispontime); - genius->linepos = 0; + if (genius->dispon) { + genius->cga_stat &= ~1; + genius->mda_stat &= ~1; + } + timer_advance_u64(&genius->timer, genius->dispontime); + genius->linepos = 0; - if (genius->displine == 1008) { -/* Hardcode GENIUS_XSIZE * GENIUS_YSIZE window size */ - if (GENIUS_XSIZE != xsize || GENIUS_YSIZE != ysize) { - xsize = GENIUS_XSIZE; - ysize = GENIUS_YSIZE; - if (xsize < 64) xsize = 656; - if (ysize < 32) ysize = 200; - set_screen_size(xsize, ysize); + if (genius->displine == 1008) { + /* Hardcode GENIUS_XSIZE * GENIUS_YSIZE window size */ + if (GENIUS_XSIZE != xsize || GENIUS_YSIZE != ysize) { + xsize = GENIUS_XSIZE; + ysize = GENIUS_YSIZE; + if (xsize < 64) + xsize = 656; + if (ysize < 32) + ysize = 200; + set_screen_size(xsize, ysize); - if (video_force_resize_get()) - video_force_resize_set(0); - } + if (video_force_resize_get()) + video_force_resize_set(0); + } - video_blit_memtoscreen_8(0, 0, xsize, ysize); + video_blit_memtoscreen_8(0, 0, xsize, ysize); - frames++; - /* Fixed 728x1008 resolution */ - video_res_x = GENIUS_XSIZE; - video_res_y = GENIUS_YSIZE; - video_bpp = 1; - genius->blink++; - } + frames++; + /* Fixed 728x1008 resolution */ + video_res_x = GENIUS_XSIZE; + video_res_y = GENIUS_YSIZE; + video_bpp = 1; + genius->blink++; + } } } - void -*genius_init(const device_t *info) + * + genius_init(const device_t *info) { - int c; + int c; genius_t *genius = malloc(sizeof(genius_t)); memset(genius, 0, sizeof(genius_t)); @@ -721,83 +728,82 @@ void /* Occupy memory between 0xB0000 and 0xBFFFF (moves to 0xA0000 in * high-resolution modes) */ - mem_mapping_add(&genius->mapping, 0xb0000, 0x10000, genius_read, NULL, NULL, genius_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, genius); + mem_mapping_add(&genius->mapping, 0xb0000, 0x10000, genius_read, NULL, NULL, genius_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, genius); /* Respond to both MDA and CGA I/O ports */ io_sethandler(0x03b0, 0x000C, genius_in, NULL, NULL, genius_out, NULL, NULL, genius); io_sethandler(0x03d0, 0x0010, genius_in, NULL, NULL, genius_out, NULL, NULL, genius); - genius_pal[0] = 0 + 16; /* 0 */ - genius_pal[1] = 8 + 16; /* 8 */ - genius_pal[2] = 7 + 16; /* 7 */ - genius_pal[3] = 15 + 16; /* F */ + genius_pal[0] = 0 + 16; /* 0 */ + genius_pal[1] = 8 + 16; /* 8 */ + genius_pal[2] = 7 + 16; /* 7 */ + genius_pal[3] = 15 + 16; /* F */ /* MDA attributes */ /* I don't know if the Genius's MDA emulation actually does * emulate bright / non-bright. For the time being pretend it does. */ for (c = 0; c < 256; c++) { - mdaattr[c][0][0] = mdaattr[c][1][0] = mdaattr[c][1][1] = genius_pal[0]; - if (c & 8) mdaattr[c][0][1] = genius_pal[3]; - else mdaattr[c][0][1] = genius_pal[2]; + mdaattr[c][0][0] = mdaattr[c][1][0] = mdaattr[c][1][1] = genius_pal[0]; + if (c & 8) + mdaattr[c][0][1] = genius_pal[3]; + else + mdaattr[c][0][1] = genius_pal[2]; } mdaattr[0x70][0][1] = genius_pal[0]; mdaattr[0x70][0][0] = mdaattr[0x70][1][0] = mdaattr[0x70][1][1] = genius_pal[3]; - mdaattr[0xF0][0][1] = genius_pal[0]; + mdaattr[0xF0][0][1] = genius_pal[0]; mdaattr[0xF0][0][0] = mdaattr[0xF0][1][0] = mdaattr[0xF0][1][1] = genius_pal[3]; - mdaattr[0x78][0][1] = genius_pal[2]; + mdaattr[0x78][0][1] = genius_pal[2]; mdaattr[0x78][0][0] = mdaattr[0x78][1][0] = mdaattr[0x78][1][1] = genius_pal[3]; - mdaattr[0xF8][0][1] = genius_pal[2]; + mdaattr[0xF8][0][1] = genius_pal[2]; mdaattr[0xF8][0][0] = mdaattr[0xF8][1][0] = mdaattr[0xF8][1][1] = genius_pal[3]; mdaattr[0x00][0][1] = mdaattr[0x00][1][1] = genius_pal[0]; mdaattr[0x08][0][1] = mdaattr[0x08][1][1] = genius_pal[0]; mdaattr[0x80][0][1] = mdaattr[0x80][1][1] = genius_pal[0]; mdaattr[0x88][0][1] = mdaattr[0x88][1][1] = genius_pal[0]; -/* Start off in 80x25 text mode */ - genius->cga_stat = 0xF4; - genius->genius_mode = 2; - genius->enabled = 1; + /* Start off in 80x25 text mode */ + genius->cga_stat = 0xF4; + genius->genius_mode = 2; + genius->enabled = 1; genius->genius_charh = 0x90; /* Native character height register */ genius->genius_control |= 0x10; return genius; } - void genius_close(void *p) { - genius_t *genius = (genius_t *)p; + genius_t *genius = (genius_t *) p; free(genius->vram); free(genius); } - static int genius_available() { return rom_present(BIOS_ROM_PATH); } - void genius_speed_changed(void *p) { - genius_t *genius = (genius_t *)p; + genius_t *genius = (genius_t *) p; genius_recalctimings(genius); } const device_t genius_device = { - .name = "Genius VHR", + .name = "Genius VHR", .internal_name = "genius", - .flags = DEVICE_ISA, - .local = 0, - .init = genius_init, - .close = genius_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = genius_init, + .close = genius_close, + .reset = NULL, { .available = genius_available }, .speed_changed = genius_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_hercules.c b/src/video/vid_hercules.c index 8e1ab4f8b..c5d91e96d 100644 --- a/src/video/vid_hercules.c +++ b/src/video/vid_hercules.c @@ -33,9 +33,7 @@ #include <86box/video.h> #include <86box/vid_hercules.h> - -static video_timings_t timing_hercules = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; - +static video_timings_t timing_hercules = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; static void recalc_timings(hercules_t *dev) @@ -43,196 +41,190 @@ recalc_timings(hercules_t *dev) double disptime; double _dispontime, _dispofftime; - disptime = dev->crtc[0] + 1; + disptime = dev->crtc[0] + 1; _dispontime = dev->crtc[1]; _dispofftime = disptime - _dispontime; - _dispontime *= HERCCONST; + _dispontime *= HERCCONST; _dispofftime *= HERCCONST; - dev->dispontime = (uint64_t)(_dispontime); - dev->dispofftime = (uint64_t)(_dispofftime); + dev->dispontime = (uint64_t) (_dispontime); + dev->dispofftime = (uint64_t) (_dispofftime); } - -static uint8_t crtcmask[32] = -{ - 0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f, 0xf3, 0x1f, 0x7f, 0x1f, 0x3f, 0xff, 0x3f, 0xff, - 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +static uint8_t crtcmask[32] = { + 0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f, 0xf3, 0x1f, 0x7f, 0x1f, 0x3f, 0xff, 0x3f, 0xff, + 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; static void hercules_out(uint16_t addr, uint8_t val, void *priv) { - hercules_t *dev = (hercules_t *)priv; - uint8_t old; + hercules_t *dev = (hercules_t *) priv; + uint8_t old; VIDEO_MONITOR_PROLOGUE() switch (addr) { - case 0x03b0: - case 0x03b2: - case 0x03b4: - case 0x03b6: - dev->crtcreg = val & 31; - break; + case 0x03b0: + case 0x03b2: + case 0x03b4: + case 0x03b6: + dev->crtcreg = val & 31; + break; - case 0x03b1: - case 0x03b3: - case 0x03b5: - case 0x03b7: - old = dev->crtc[dev->crtcreg]; - dev->crtc[dev->crtcreg] = val & crtcmask[dev->crtcreg]; + case 0x03b1: + case 0x03b3: + case 0x03b5: + case 0x03b7: + old = dev->crtc[dev->crtcreg]; + dev->crtc[dev->crtcreg] = val & crtcmask[dev->crtcreg]; - /* - * Fix for Generic Turbo XT BIOS, which - * sets up cursor registers wrong. - */ - if (dev->crtc[10] == 6 && dev->crtc[11] == 7) { - dev->crtc[10] = 0xb; - dev->crtc[11] = 0xc; - } + /* + * Fix for Generic Turbo XT BIOS, which + * sets up cursor registers wrong. + */ + if (dev->crtc[10] == 6 && dev->crtc[11] == 7) { + dev->crtc[10] = 0xb; + dev->crtc[11] = 0xc; + } - if (old != val) { - if ((dev->crtcreg < 0xe) || (dev->crtcreg > 0x10)) { - dev->fullchange = changeframecount; - recalc_timings(dev); - } - } - break; + if (old != val) { + if ((dev->crtcreg < 0xe) || (dev->crtcreg > 0x10)) { + dev->fullchange = changeframecount; + recalc_timings(dev); + } + } + break; - case 0x03b8: - old = dev->ctrl; + case 0x03b8: + old = dev->ctrl; - /* Prevent setting of bits if they are disabled in CTRL2. */ - if ((old & 0x02) && !(val & 0x02)) - dev->ctrl &= 0xfd; - else if ((val & 0x02) && (dev->ctrl2 & 0x01)) - dev->ctrl |= 0x02; + /* Prevent setting of bits if they are disabled in CTRL2. */ + if ((old & 0x02) && !(val & 0x02)) + dev->ctrl &= 0xfd; + else if ((val & 0x02) && (dev->ctrl2 & 0x01)) + dev->ctrl |= 0x02; - if ((old & 0x80) && !(val & 0x80)) - dev->ctrl &= 0x7f; - else if ((val & 0x80) && (dev->ctrl2 & 0x02)) - dev->ctrl |= 0x80; + if ((old & 0x80) && !(val & 0x80)) + dev->ctrl &= 0x7f; + else if ((val & 0x80) && (dev->ctrl2 & 0x02)) + dev->ctrl |= 0x80; - dev->ctrl = (dev->ctrl & 0x82) | (val & 0x7d); + dev->ctrl = (dev->ctrl & 0x82) | (val & 0x7d); - if (old ^ val) - recalc_timings(dev); - break; + if (old ^ val) + recalc_timings(dev); + break; - case 0x03b9: - case 0x03bb: - dev->lp_ff = !(addr & 0x0002); - break; + case 0x03b9: + case 0x03bb: + dev->lp_ff = !(addr & 0x0002); + break; - case 0x03bf: - old = dev->ctrl2; - dev->ctrl2 = val; - /* According to the Programmer's guide to the Hercules graphics cars - by David B. Doty from 1988, the CTRL2 modes (bits 1,0) are as follow: - - 00: DIAG: Text mode only, only page 0 accessible; - - 01: HALF: Graphics mode allowed, only page 0 accessible; - - 11: FULL: Graphics mode allowed, both pages accessible. */ - if (val & 0x01) - mem_mapping_set_exec(&dev->mapping, dev->vram); - else - mem_mapping_set_exec(&dev->mapping, NULL); - if (val & 0x02) - mem_mapping_set_addr(&dev->mapping, 0xb0000, 0x10000); - else - mem_mapping_set_addr(&dev->mapping, 0xb0000, 0x08000); - if (old ^ val) - recalc_timings(dev); - break; + case 0x03bf: + old = dev->ctrl2; + dev->ctrl2 = val; + /* According to the Programmer's guide to the Hercules graphics cars + by David B. Doty from 1988, the CTRL2 modes (bits 1,0) are as follow: + - 00: DIAG: Text mode only, only page 0 accessible; + - 01: HALF: Graphics mode allowed, only page 0 accessible; + - 11: FULL: Graphics mode allowed, both pages accessible. */ + if (val & 0x01) + mem_mapping_set_exec(&dev->mapping, dev->vram); + else + mem_mapping_set_exec(&dev->mapping, NULL); + if (val & 0x02) + mem_mapping_set_addr(&dev->mapping, 0xb0000, 0x10000); + else + mem_mapping_set_addr(&dev->mapping, 0xb0000, 0x08000); + if (old ^ val) + recalc_timings(dev); + break; - default: - break; + default: + break; } VIDEO_MONITOR_EPILOGUE() } - static uint8_t hercules_in(uint16_t addr, void *priv) { - hercules_t *dev = (hercules_t *)priv; - uint8_t ret = 0xff; + hercules_t *dev = (hercules_t *) priv; + uint8_t ret = 0xff; switch (addr) { - case 0x03b0: - case 0x03b2: - case 0x03b4: - case 0x03b6: - ret = dev->crtcreg; - break; + case 0x03b0: + case 0x03b2: + case 0x03b4: + case 0x03b6: + ret = dev->crtcreg; + break; - case 0x03b1: - case 0x03b3: - case 0x03b5: - case 0x03b7: - if (dev->crtcreg == 0x0c) - ret = (dev->ma >> 8) & 0x3f; - else if (dev->crtcreg == 0x0d) - ret = dev->ma & 0xff; - else - ret = dev->crtc[dev->crtcreg]; - break; + case 0x03b1: + case 0x03b3: + case 0x03b5: + case 0x03b7: + if (dev->crtcreg == 0x0c) + ret = (dev->ma >> 8) & 0x3f; + else if (dev->crtcreg == 0x0d) + ret = dev->ma & 0xff; + else + ret = dev->crtc[dev->crtcreg]; + break; - case 0x03ba: - ret = 0x70; /* Hercules ident */ - ret |= (dev->lp_ff ? 2 : 0); - ret |= (dev->stat & 0x01); - if (dev->stat & 0x08) - ret |= 0x80; - if ((ret & 0x81) == 0x80) - ret |= 0x08; - break; + case 0x03ba: + ret = 0x70; /* Hercules ident */ + ret |= (dev->lp_ff ? 2 : 0); + ret |= (dev->stat & 0x01); + if (dev->stat & 0x08) + ret |= 0x80; + if ((ret & 0x81) == 0x80) + ret |= 0x08; + break; - default: - break; + default: + break; } - return(ret); + return (ret); } - static void hercules_waitstates(void *p) { - int ws_array[16] = {3, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8}; + int ws_array[16] = { 3, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8 }; int ws; ws = ws_array[cycles & 0xf]; cycles -= ws; } - static void hercules_write(uint32_t addr, uint8_t val, void *priv) { - hercules_t *dev = (hercules_t *)priv; + hercules_t *dev = (hercules_t *) priv; if (dev->ctrl2 & 0x01) - addr &= 0xffff; + addr &= 0xffff; else - addr &= 0x0fff; + addr &= 0x0fff; dev->vram[addr] = val; hercules_waitstates(dev); } - static uint8_t hercules_read(uint32_t addr, void *priv) { - hercules_t *dev = (hercules_t *)priv; - uint8_t ret = 0xff; + hercules_t *dev = (hercules_t *) priv; + uint8_t ret = 0xff; if (dev->ctrl2 & 0x01) - addr &= 0xffff; + addr &= 0xffff; else - addr &= 0x0fff; + addr &= 0x0fff; hercules_waitstates(dev); @@ -241,333 +233,325 @@ hercules_read(uint32_t addr, void *priv) return ret; } - static void hercules_render_overscan_left(hercules_t *dev) { - int i; + int i; uint32_t width; if (dev->ctrl & 0x02) - width = (((uint32_t) dev->crtc[1]) << 4); + width = (((uint32_t) dev->crtc[1]) << 4); else - width = (((uint32_t) dev->crtc[1]) * 9); + width = (((uint32_t) dev->crtc[1]) * 9); if ((dev->displine + 14) < 0) - return; + return; if (width == 0) - return; + return; for (i = 0; i < 8; i++) - buffer32->line[dev->displine + 14][i] = 0x00000000; + buffer32->line[dev->displine + 14][i] = 0x00000000; } - static void hercules_render_overscan_right(hercules_t *dev) { - int i; + int i; uint32_t width; if (dev->ctrl & 0x02) - width = (((uint32_t) dev->crtc[1]) << 4); + width = (((uint32_t) dev->crtc[1]) << 4); else - width = (((uint32_t) dev->crtc[1]) * 9); + width = (((uint32_t) dev->crtc[1]) * 9); if ((dev->displine + 14) < 0) - return; + return; if (width == 0) - return; + return; for (i = 0; i < 8; i++) - buffer32->line[dev->displine + 14][8 + width + i] = 0x00000000; + buffer32->line[dev->displine + 14][8 + width + i] = 0x00000000; } - static void hercules_poll(void *priv) { - hercules_t *dev = (hercules_t *)priv; - uint8_t chr, attr; - uint16_t ca, dat; - uint16_t pa; - int oldsc, blink; - int x, xx, y, yy, c, oldvc; - int drawcursor; - uint32_t *p; + hercules_t *dev = (hercules_t *) priv; + uint8_t chr, attr; + uint16_t ca, dat; + uint16_t pa; + int oldsc, blink; + int x, xx, y, yy, c, oldvc; + int drawcursor; + uint32_t *p; VIDEO_MONITOR_PROLOGUE() ca = (dev->crtc[15] | (dev->crtc[14] << 8)) & 0x3fff; - if (! dev->linepos) { - timer_advance_u64(&dev->timer, dev->dispofftime); - dev->stat |= 1; - dev->linepos = 1; - oldsc = dev->sc; + if (!dev->linepos) { + timer_advance_u64(&dev->timer, dev->dispofftime); + dev->stat |= 1; + dev->linepos = 1; + oldsc = dev->sc; - if ((dev->crtc[8] & 3) == 3) - dev->sc = (dev->sc << 1) & 7; + if ((dev->crtc[8] & 3) == 3) + dev->sc = (dev->sc << 1) & 7; - if (dev->dispon) { - if (dev->displine < dev->firstline) { - dev->firstline = dev->displine; - video_wait_for_buffer(); - } - dev->lastline = dev->displine; + if (dev->dispon) { + if (dev->displine < dev->firstline) { + dev->firstline = dev->displine; + video_wait_for_buffer(); + } + dev->lastline = dev->displine; - hercules_render_overscan_left(dev); + hercules_render_overscan_left(dev); - if (dev->ctrl & 0x02) { - ca = (dev->sc & 3) * 0x2000; - if (dev->ctrl & 0x80) - ca += 0x8000; + if (dev->ctrl & 0x02) { + ca = (dev->sc & 3) * 0x2000; + if (dev->ctrl & 0x80) + ca += 0x8000; - for (x = 0; x < dev->crtc[1]; x++) { - if (dev->ctrl & 8) - dat = (dev->vram[((dev->ma << 1) & 0x1fff) + ca] << 8) | dev->vram[((dev->ma << 1) & 0x1fff) + ca + 1]; - else - dat = 0; - dev->ma++; - for (c = 0; c < 16; c++) - buffer32->line[dev->displine + 14][(x << 4) + c + 8] = (dat & (32768 >> c)) ? 7 : 0; - for (c = 0; c < 16; c += 8) - video_blend((x << 4) + c + 8, dev->displine + 14); - } - } else { - for (x = 0; x < dev->crtc[1]; x++) { - if (dev->ctrl & 8) { - /* Undocumented behavior: page 1 in text mode means characters are read - from page 1 and attributes from page 0. */ - chr = dev->charbuffer[x << 1]; - attr = dev->charbuffer[(x << 1) + 1]; - } else - chr = attr = 0; - drawcursor = ((dev->ma == ca) && dev->con && dev->cursoron); - blink = ((dev->blink & 16) && (dev->ctrl & 0x20) && (attr & 0x80) && !drawcursor); + for (x = 0; x < dev->crtc[1]; x++) { + if (dev->ctrl & 8) + dat = (dev->vram[((dev->ma << 1) & 0x1fff) + ca] << 8) | dev->vram[((dev->ma << 1) & 0x1fff) + ca + 1]; + else + dat = 0; + dev->ma++; + for (c = 0; c < 16; c++) + buffer32->line[dev->displine + 14][(x << 4) + c + 8] = (dat & (32768 >> c)) ? 7 : 0; + for (c = 0; c < 16; c += 8) + video_blend((x << 4) + c + 8, dev->displine + 14); + } + } else { + for (x = 0; x < dev->crtc[1]; x++) { + if (dev->ctrl & 8) { + /* Undocumented behavior: page 1 in text mode means characters are read + from page 1 and attributes from page 0. */ + chr = dev->charbuffer[x << 1]; + attr = dev->charbuffer[(x << 1) + 1]; + } else + chr = attr = 0; + drawcursor = ((dev->ma == ca) && dev->con && dev->cursoron); + blink = ((dev->blink & 16) && (dev->ctrl & 0x20) && (attr & 0x80) && !drawcursor); - if (dev->sc == 12 && ((attr & 7) == 1)) { - for (c = 0; c < 9; c++) - buffer32->line[dev->displine + 14][(x * 9) + c + 8] = dev->cols[attr][blink][1]; - } else { - for (c = 0; c < 8; c++) - buffer32->line[dev->displine + 14][(x * 9) + c + 8] = dev->cols[attr][blink][(fontdatm[chr][dev->sc] & (1 << (c ^ 7))) ? 1 : 0]; + if (dev->sc == 12 && ((attr & 7) == 1)) { + for (c = 0; c < 9; c++) + buffer32->line[dev->displine + 14][(x * 9) + c + 8] = dev->cols[attr][blink][1]; + } else { + for (c = 0; c < 8; c++) + buffer32->line[dev->displine + 14][(x * 9) + c + 8] = dev->cols[attr][blink][(fontdatm[chr][dev->sc] & (1 << (c ^ 7))) ? 1 : 0]; - if ((chr & ~0x1f) == 0xc0) - buffer32->line[dev->displine + 14][(x * 9) + 8 + 8] = dev->cols[attr][blink][fontdatm[chr][dev->sc] & 1]; - else - buffer32->line[dev->displine + 14][(x * 9) + 8 + 8] = dev->cols[attr][blink][0]; - } - if (dev->ctrl2 & 0x01) - dev->ma = (dev->ma + 1) & 0x3fff; - else - dev->ma = (dev->ma + 1) & 0x7ff; + if ((chr & ~0x1f) == 0xc0) + buffer32->line[dev->displine + 14][(x * 9) + 8 + 8] = dev->cols[attr][blink][fontdatm[chr][dev->sc] & 1]; + else + buffer32->line[dev->displine + 14][(x * 9) + 8 + 8] = dev->cols[attr][blink][0]; + } + if (dev->ctrl2 & 0x01) + dev->ma = (dev->ma + 1) & 0x3fff; + else + dev->ma = (dev->ma + 1) & 0x7ff; - if (drawcursor) { - for (c = 0; c < 9; c++) - buffer32->line[dev->displine + 14][(x * 9) + c + 8] ^= dev->cols[attr][0][1]; - } - } - } + if (drawcursor) { + for (c = 0; c < 9; c++) + buffer32->line[dev->displine + 14][(x * 9) + c + 8] ^= dev->cols[attr][0][1]; + } + } + } - hercules_render_overscan_right(dev); - } - dev->sc = oldsc; + hercules_render_overscan_right(dev); + } + dev->sc = oldsc; - if (dev->vc == dev->crtc[7] && !dev->sc) - dev->stat |= 8; - dev->displine++; - if (dev->displine >= 500) - dev->displine = 0; + if (dev->vc == dev->crtc[7] && !dev->sc) + dev->stat |= 8; + dev->displine++; + if (dev->displine >= 500) + dev->displine = 0; } else { - timer_advance_u64(&dev->timer, dev->dispontime); + timer_advance_u64(&dev->timer, dev->dispontime); - if (dev->dispon) - dev->stat &= ~1; + if (dev->dispon) + dev->stat &= ~1; - dev->linepos = 0; - if (dev->vsynctime) { - dev->vsynctime--; - if (! dev->vsynctime) - dev->stat &= ~8; - } + dev->linepos = 0; + if (dev->vsynctime) { + dev->vsynctime--; + if (!dev->vsynctime) + dev->stat &= ~8; + } - if (dev->sc == (dev->crtc[11] & 31) || - ((dev->crtc[8] & 3)==3 && dev->sc == ((dev->crtc[11] & 31) >> 1))) { - dev->con = 0; - dev->coff = 1; - } + if (dev->sc == (dev->crtc[11] & 31) || ((dev->crtc[8] & 3) == 3 && dev->sc == ((dev->crtc[11] & 31) >> 1))) { + dev->con = 0; + dev->coff = 1; + } - if (dev->vadj) { - dev->sc++; - dev->sc &= 31; - dev->ma = dev->maback; - dev->vadj--; - if (! dev->vadj) { - dev->dispon = 1; - dev->ma = dev->maback = (dev->crtc[13] | (dev->crtc[12] << 8)) & 0x3fff; - dev->sc = 0; - } - } else if (((dev->crtc[8] & 3) != 3 && dev->sc == dev->crtc[9]) || ((dev->crtc[8] & 3) == 3 && dev->sc == (dev->crtc[9] >> 1))) { - dev->maback = dev->ma; - dev->sc = 0; - oldvc = dev->vc; - dev->vc++; - dev->vc &= 127; + if (dev->vadj) { + dev->sc++; + dev->sc &= 31; + dev->ma = dev->maback; + dev->vadj--; + if (!dev->vadj) { + dev->dispon = 1; + dev->ma = dev->maback = (dev->crtc[13] | (dev->crtc[12] << 8)) & 0x3fff; + dev->sc = 0; + } + } else if (((dev->crtc[8] & 3) != 3 && dev->sc == dev->crtc[9]) || ((dev->crtc[8] & 3) == 3 && dev->sc == (dev->crtc[9] >> 1))) { + dev->maback = dev->ma; + dev->sc = 0; + oldvc = dev->vc; + dev->vc++; + dev->vc &= 127; - if (dev->vc == dev->crtc[6]) - dev->dispon = 0; + if (dev->vc == dev->crtc[6]) + dev->dispon = 0; - if (oldvc == dev->crtc[4]) { - dev->vc = 0; - dev->vadj = dev->crtc[5]; - if (! dev->vadj) { - dev->dispon = 1; - dev->ma = dev->maback = (dev->crtc[13] | (dev->crtc[12] << 8)) & 0x3fff; - } - switch (dev->crtc[10] & 0x60) { - case 0x20: - dev->cursoron = 0; - break; - case 0x60: - dev->cursoron = dev->blink & 0x10; - break; - default: - dev->cursoron = dev->blink & 0x08; - break; - } - } + if (oldvc == dev->crtc[4]) { + dev->vc = 0; + dev->vadj = dev->crtc[5]; + if (!dev->vadj) { + dev->dispon = 1; + dev->ma = dev->maback = (dev->crtc[13] | (dev->crtc[12] << 8)) & 0x3fff; + } + switch (dev->crtc[10] & 0x60) { + case 0x20: + dev->cursoron = 0; + break; + case 0x60: + dev->cursoron = dev->blink & 0x10; + break; + default: + dev->cursoron = dev->blink & 0x08; + break; + } + } - if (dev->vc == dev->crtc[7]) { - dev->dispon = 0; - dev->displine = 0; - if ((dev->crtc[8] & 3) == 3) - dev->vsynctime = ((int32_t)dev->crtc[4] * ((dev->crtc[9] >> 1) + 1)) + dev->crtc[5] - dev->crtc[7] + 1; - else - dev->vsynctime = ((int32_t)dev->crtc[4] * (dev->crtc[9] + 1)) + dev->crtc[5] - dev->crtc[7] + 1; - if (dev->crtc[7]) { - if (dev->ctrl & 0x02) - x = dev->crtc[1] << 4; - else - x = dev->crtc[1] * 9; + if (dev->vc == dev->crtc[7]) { + dev->dispon = 0; + dev->displine = 0; + if ((dev->crtc[8] & 3) == 3) + dev->vsynctime = ((int32_t) dev->crtc[4] * ((dev->crtc[9] >> 1) + 1)) + dev->crtc[5] - dev->crtc[7] + 1; + else + dev->vsynctime = ((int32_t) dev->crtc[4] * (dev->crtc[9] + 1)) + dev->crtc[5] - dev->crtc[7] + 1; + if (dev->crtc[7]) { + if (dev->ctrl & 0x02) + x = dev->crtc[1] << 4; + else + x = dev->crtc[1] * 9; - dev->lastline++; - y = (dev->lastline - dev->firstline); + dev->lastline++; + y = (dev->lastline - dev->firstline); - if ((dev->ctrl & 8) && x && y && ((x != xsize) || (y != ysize) || video_force_resize_get())) { - xsize = x; - ysize = y; - if (xsize < 64) xsize = enable_overscan ? 640 : 656; - if (ysize < 32) ysize = 200; + if ((dev->ctrl & 8) && x && y && ((x != xsize) || (y != ysize) || video_force_resize_get())) { + xsize = x; + ysize = y; + if (xsize < 64) + xsize = enable_overscan ? 640 : 656; + if (ysize < 32) + ysize = 200; - set_screen_size(xsize + (enable_overscan ? 16 : 0), ysize + (enable_overscan ? 28 : 0)); + set_screen_size(xsize + (enable_overscan ? 16 : 0), ysize + (enable_overscan ? 28 : 0)); - if (video_force_resize_get()) - video_force_resize_set(0); - } + if (video_force_resize_get()) + video_force_resize_set(0); + } - if ((x >= 160) && ((y + 1) >= 120)) { - /* Draw (overscan_size) lines of overscan on top and bottom. */ - for (yy = 0; yy < 14; yy++) { - p = &(buffer32->line[(dev->firstline + yy) & 0x7ff][0]); + if ((x >= 160) && ((y + 1) >= 120)) { + /* Draw (overscan_size) lines of overscan on top and bottom. */ + for (yy = 0; yy < 14; yy++) { + p = &(buffer32->line[(dev->firstline + yy) & 0x7ff][0]); - for (xx = 0; xx < (x + 16); xx++) - p[xx] = 0x00000000; - } + for (xx = 0; xx < (x + 16); xx++) + p[xx] = 0x00000000; + } - for (yy = 0; yy < 14; yy++) { - p = &(buffer32->line[(dev->firstline + 14 + y + yy) & 0x7ff][0]); + for (yy = 0; yy < 14; yy++) { + p = &(buffer32->line[(dev->firstline + 14 + y + yy) & 0x7ff][0]); - for (xx = 0; xx < (x + 16); xx++) - p[xx] = 0x00000000; - } - } + for (xx = 0; xx < (x + 16); xx++) + p[xx] = 0x00000000; + } + } - if (enable_overscan) - video_blit_memtoscreen_8(0, dev->firstline, xsize + 16, ysize + 28); - else - video_blit_memtoscreen_8(8, dev->firstline + 14, xsize, ysize); - frames++; - // if ((dev->ctrl & 2) && (dev->ctrl2 & 1)) { - if (dev->ctrl & 0x02) { - video_res_x = dev->crtc[1] * 16; - video_res_y = dev->crtc[6] * 4; - video_bpp = 1; - } else { - video_res_x = dev->crtc[1]; - video_res_y = dev->crtc[6]; - video_bpp = 0; - } - } - dev->firstline = 1000; - dev->lastline = 0; - dev->blink++; - } - } else { - dev->sc++; - dev->sc &= 31; - dev->ma = dev->maback; - } + if (enable_overscan) + video_blit_memtoscreen_8(0, dev->firstline, xsize + 16, ysize + 28); + else + video_blit_memtoscreen_8(8, dev->firstline + 14, xsize, ysize); + frames++; + // if ((dev->ctrl & 2) && (dev->ctrl2 & 1)) { + if (dev->ctrl & 0x02) { + video_res_x = dev->crtc[1] * 16; + video_res_y = dev->crtc[6] * 4; + video_bpp = 1; + } else { + video_res_x = dev->crtc[1]; + video_res_y = dev->crtc[6]; + video_bpp = 0; + } + } + dev->firstline = 1000; + dev->lastline = 0; + dev->blink++; + } + } else { + dev->sc++; + dev->sc &= 31; + dev->ma = dev->maback; + } - if ((dev->sc == (dev->crtc[10] & 31) || - ((dev->crtc[8] & 3)==3 && dev->sc == ((dev->crtc[10] & 31) >> 1)))) - dev->con = 1; - if (dev->dispon && !(dev->ctrl & 0x02)) { - for (x = 0; x < (dev->crtc[1] << 1); x++) { - pa = (dev->ctrl & 0x80) ? ((x & 1) ? 0x0000 : 0x8000) : 0x0000; - dev->charbuffer[x] = dev->vram[(((dev->ma << 1) + x) & 0x3fff) + pa]; - } - } + if ((dev->sc == (dev->crtc[10] & 31) || ((dev->crtc[8] & 3) == 3 && dev->sc == ((dev->crtc[10] & 31) >> 1)))) + dev->con = 1; + if (dev->dispon && !(dev->ctrl & 0x02)) { + for (x = 0; x < (dev->crtc[1] << 1); x++) { + pa = (dev->ctrl & 0x80) ? ((x & 1) ? 0x0000 : 0x8000) : 0x0000; + dev->charbuffer[x] = dev->vram[(((dev->ma << 1) + x) & 0x3fff) + pa]; + } + } } VIDEO_MONITOR_EPILOGUE() } - static void * hercules_init(const device_t *info) { hercules_t *dev; - int c; + int c; - dev = (hercules_t *)malloc(sizeof(hercules_t)); + dev = (hercules_t *) malloc(sizeof(hercules_t)); memset(dev, 0x00, sizeof(hercules_t)); dev->monitor_index = monitor_index_global; overscan_x = 16; overscan_y = 28; - dev->vram = (uint8_t *)malloc(0x10000); + dev->vram = (uint8_t *) malloc(0x10000); timer_add(&dev->timer, hercules_poll, dev, 1); mem_mapping_add(&dev->mapping, 0xb0000, 0x08000, - hercules_read,NULL,NULL, hercules_write,NULL,NULL, - NULL /*dev->vram*/, MEM_MAPPING_EXTERNAL, dev); + hercules_read, NULL, NULL, hercules_write, NULL, NULL, + NULL /*dev->vram*/, MEM_MAPPING_EXTERNAL, dev); io_sethandler(0x03b0, 16, - hercules_in,NULL,NULL, hercules_out,NULL,NULL, dev); + hercules_in, NULL, NULL, hercules_out, NULL, NULL, dev); for (c = 0; c < 256; c++) { - dev->cols[c][0][0] = dev->cols[c][1][0] = dev->cols[c][1][1] = 16; + dev->cols[c][0][0] = dev->cols[c][1][0] = dev->cols[c][1][1] = 16; - if (c & 0x08) - dev->cols[c][0][1] = 15 + 16; - else - dev->cols[c][0][1] = 7 + 16; + if (c & 0x08) + dev->cols[c][0][1] = 15 + 16; + else + dev->cols[c][0][1] = 7 + 16; } dev->cols[0x70][0][1] = 16; - dev->cols[0x70][0][0] = dev->cols[0x70][1][0] = - dev->cols[0x70][1][1] = 16 + 15; - dev->cols[0xF0][0][1] = 16; - dev->cols[0xF0][0][0] = dev->cols[0xF0][1][0] = - dev->cols[0xF0][1][1] = 16 + 15; - dev->cols[0x78][0][1] = 16 + 7; - dev->cols[0x78][0][0] = dev->cols[0x78][1][0] = - dev->cols[0x78][1][1] = 16 + 15; - dev->cols[0xF8][0][1] = 16 + 7; - dev->cols[0xF8][0][0] = dev->cols[0xF8][1][0] = - dev->cols[0xF8][1][1] = 16 + 15; + dev->cols[0x70][0][0] = dev->cols[0x70][1][0] = dev->cols[0x70][1][1] = 16 + 15; + dev->cols[0xF0][0][1] = 16; + dev->cols[0xF0][0][0] = dev->cols[0xF0][1][0] = dev->cols[0xF0][1][1] = 16 + 15; + dev->cols[0x78][0][1] = 16 + 7; + dev->cols[0x78][0][0] = dev->cols[0x78][1][0] = dev->cols[0x78][1][1] = 16 + 15; + dev->cols[0xF8][0][1] = 16 + 7; + dev->cols[0xF8][0][0] = dev->cols[0xF8][1][0] = dev->cols[0xF8][1][1] = 16 + 15; dev->cols[0x00][0][1] = dev->cols[0x00][1][1] = 16; dev->cols[0x08][0][1] = dev->cols[0x08][1][1] = 16; dev->cols[0x80][0][1] = dev->cols[0x80][1][1] = 16; @@ -577,7 +561,7 @@ hercules_init(const device_t *info) cga_palette = device_get_config_int("rgb_type") << 1; if (cga_palette > 6) - cga_palette = 0; + cga_palette = 0; cgapal_rebuild(); herc_blend = device_get_config_int("blend"); @@ -587,35 +571,33 @@ hercules_init(const device_t *info) /* Force the LPT3 port to be enabled. */ lpt3_init(0x3BC); - return(dev); + return (dev); } - static void hercules_close(void *priv) { - hercules_t *dev = (hercules_t *)priv; + hercules_t *dev = (hercules_t *) priv; if (!dev) - return; + return; if (dev->vram) - free(dev->vram); + free(dev->vram); free(dev); } - static void speed_changed(void *priv) { - hercules_t *dev = (hercules_t *)priv; + hercules_t *dev = (hercules_t *) priv; recalc_timings(dev); } static const device_config_t hercules_config[] = { -// clang-format off + // clang-format off { .name = "rgb_type", .description = "Display type", @@ -656,15 +638,15 @@ static const device_config_t hercules_config[] = { }; const device_t hercules_device = { - .name = "Hercules", + .name = "Hercules", .internal_name = "hercules", - .flags = DEVICE_ISA, - .local = 0, - .init = hercules_init, - .close = hercules_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = hercules_init, + .close = hercules_close, + .reset = NULL, { .available = NULL }, .speed_changed = speed_changed, - .force_redraw = NULL, - .config = hercules_config + .force_redraw = NULL, + .config = hercules_config }; diff --git a/src/video/vid_herculesplus.c b/src/video/vid_herculesplus.c index b4a514422..e54c715b9 100644 --- a/src/video/vid_herculesplus.c +++ b/src/video/vid_herculesplus.c @@ -31,27 +31,26 @@ #include <86box/device.h> #include <86box/video.h> - /* extended CRTC registers */ -#define HERCULESPLUS_CRTC_XMODE 20 /* xMode register */ -#define HERCULESPLUS_CRTC_UNDER 21 /* Underline */ -#define HERCULESPLUS_CRTC_OVER 22 /* Overstrike */ +#define HERCULESPLUS_CRTC_XMODE 20 /* xMode register */ +#define HERCULESPLUS_CRTC_UNDER 21 /* Underline */ +#define HERCULESPLUS_CRTC_OVER 22 /* Overstrike */ /* character width */ -#define HERCULESPLUS_CW ((dev->crtc[HERCULESPLUS_CRTC_XMODE] & HERCULESPLUS_XMODE_90COL) ? 8 : 9) +#define HERCULESPLUS_CW ((dev->crtc[HERCULESPLUS_CRTC_XMODE] & HERCULESPLUS_XMODE_90COL) ? 8 : 9) /* mode control register */ -#define HERCULESPLUS_CTRL_GRAPH 0x02 -#define HERCULESPLUS_CTRL_ENABLE 0x08 -#define HERCULESPLUS_CTRL_BLINK 0x20 -#define HERCULESPLUS_CTRL_PAGE1 0x80 +#define HERCULESPLUS_CTRL_GRAPH 0x02 +#define HERCULESPLUS_CTRL_ENABLE 0x08 +#define HERCULESPLUS_CTRL_BLINK 0x20 +#define HERCULESPLUS_CTRL_PAGE1 0x80 /* CRTC status register */ -#define HERCULESPLUS_STATUS_HSYNC 0x01 /* horizontal sync */ +#define HERCULESPLUS_STATUS_HSYNC 0x01 /* horizontal sync */ #define HERCULESPLUS_STATUS_LIGHT 0x02 #define HERCULESPLUS_STATUS_VIDEO 0x08 -#define HERCULESPLUS_STATUS_ID 0x10 /* Card identification */ -#define HERCULESPLUS_STATUS_VSYNC 0x80 /* -vertical sync */ +#define HERCULESPLUS_STATUS_ID 0x10 /* Card identification */ +#define HERCULESPLUS_STATUS_VSYNC 0x80 /* -vertical sync */ /* configuration switch register */ #define HERCULESPLUS_CTRL2_GRAPH 0x01 @@ -61,39 +60,44 @@ #define HERCULESPLUS_XMODE_RAMFONT 0x01 #define HERCULESPLUS_XMODE_90COL 0x02 - typedef struct { - mem_mapping_t mapping; + mem_mapping_t mapping; - uint8_t crtc[32]; - int crtcreg; + uint8_t crtc[32]; + int crtcreg; - uint8_t ctrl, ctrl2, stat; + uint8_t ctrl, ctrl2, stat; - uint64_t dispontime, dispofftime; - pc_timer_t timer; + uint64_t dispontime, dispofftime; + pc_timer_t timer; - int firstline, lastline; + int firstline, lastline; - int linepos, displine; - int vc, sc; - uint16_t ma, maback; - int con, coff, cursoron; - int dispon, blink; - int vsynctime; - int vadj; - int monitor_index, prev_monitor_index; + int linepos, displine; + int vc, sc; + uint16_t ma, maback; + int con, coff, cursoron; + int dispon, blink; + int vsynctime; + int vadj; + int monitor_index, prev_monitor_index; - int cols[256][2][2]; + int cols[256][2][2]; - uint8_t *vram; + uint8_t *vram; } herculesplus_t; -#define VIDEO_MONITOR_PROLOGUE() { dev->prev_monitor_index = monitor_index_global; monitor_index_global = dev->monitor_index; } -#define VIDEO_MONITOR_EPILOGUE() { monitor_index_global = dev->prev_monitor_index; } - -static video_timings_t timing_herculesplus = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; +#define VIDEO_MONITOR_PROLOGUE() \ + { \ + dev->prev_monitor_index = monitor_index_global; \ + monitor_index_global = dev->monitor_index; \ + } +#define VIDEO_MONITOR_EPILOGUE() \ + { \ + monitor_index_global = dev->prev_monitor_index; \ + } +static video_timings_t timing_herculesplus = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; static void recalc_timings(herculesplus_t *dev) @@ -101,558 +105,550 @@ recalc_timings(herculesplus_t *dev) double disptime; double _dispontime, _dispofftime; - disptime = dev->crtc[0] + 1; + disptime = dev->crtc[0] + 1; _dispontime = dev->crtc[1]; _dispofftime = disptime - _dispontime; - _dispontime *= HERCCONST; + _dispontime *= HERCCONST; _dispofftime *= HERCCONST; - dev->dispontime = (uint64_t)(_dispontime); - dev->dispofftime = (uint64_t)(_dispofftime); + dev->dispontime = (uint64_t) (_dispontime); + dev->dispofftime = (uint64_t) (_dispofftime); } - static void herculesplus_out(uint16_t port, uint8_t val, void *priv) { - herculesplus_t *dev = (herculesplus_t *)priv; - uint8_t old; + herculesplus_t *dev = (herculesplus_t *) priv; + uint8_t old; switch (port) { - case 0x3b0: - case 0x3b2: - case 0x3b4: - case 0x3b6: - dev->crtcreg = val & 31; - return; + case 0x3b0: + case 0x3b2: + case 0x3b4: + case 0x3b6: + dev->crtcreg = val & 31; + return; - case 0x3b1: - case 0x3b3: - case 0x3b5: - case 0x3b7: - if (dev->crtcreg > 22) return; - old = dev->crtc[dev->crtcreg]; - dev->crtc[dev->crtcreg] = val; - if (dev->crtc[10] == 6 && dev->crtc[11] == 7) { - /*Fix for Generic Turbo XT BIOS, - *which sets up cursor registers wrong*/ - dev->crtc[10] = 0xb; - dev->crtc[11] = 0xc; - } - if (old ^ val) - recalc_timings(dev); - return; + case 0x3b1: + case 0x3b3: + case 0x3b5: + case 0x3b7: + if (dev->crtcreg > 22) + return; + old = dev->crtc[dev->crtcreg]; + dev->crtc[dev->crtcreg] = val; + if (dev->crtc[10] == 6 && dev->crtc[11] == 7) { + /*Fix for Generic Turbo XT BIOS, + *which sets up cursor registers wrong*/ + dev->crtc[10] = 0xb; + dev->crtc[11] = 0xc; + } + if (old ^ val) + recalc_timings(dev); + return; - case 0x3b8: - old = dev->ctrl; - dev->ctrl = val; - if (old ^ val) - recalc_timings(dev); - return; + case 0x3b8: + old = dev->ctrl; + dev->ctrl = val; + if (old ^ val) + recalc_timings(dev); + return; - case 0x3bf: - dev->ctrl2 = val; - if (val & 2) - mem_mapping_set_addr(&dev->mapping, 0xb0000, 0x10000); - else - mem_mapping_set_addr(&dev->mapping, 0xb0000, 0x08000); - return; - } + case 0x3bf: + dev->ctrl2 = val; + if (val & 2) + mem_mapping_set_addr(&dev->mapping, 0xb0000, 0x10000); + else + mem_mapping_set_addr(&dev->mapping, 0xb0000, 0x08000); + return; + } } - static uint8_t herculesplus_in(uint16_t port, void *priv) { - herculesplus_t *dev = (herculesplus_t *)priv; - uint8_t ret = 0xff; + herculesplus_t *dev = (herculesplus_t *) priv; + uint8_t ret = 0xff; switch (port) { - case 0x3b0: - case 0x3b2: - case 0x3b4: - case 0x3b6: - ret = dev->crtcreg; - break; + case 0x3b0: + case 0x3b2: + case 0x3b4: + case 0x3b6: + ret = dev->crtcreg; + break; - case 0x3b1: - case 0x3b3: - case 0x3b5: - case 0x3b7: - if (dev->crtcreg <= 22) - ret = dev->crtc[dev->crtcreg]; - break; + case 0x3b1: + case 0x3b3: + case 0x3b5: + case 0x3b7: + if (dev->crtcreg <= 22) + ret = dev->crtc[dev->crtcreg]; + break; - case 0x3ba: - /* 0x10: Hercules Plus card identity */ - ret = (dev->stat & 0xf) | ((dev->stat & 8) << 4) | 0x10; - break; + case 0x3ba: + /* 0x10: Hercules Plus card identity */ + ret = (dev->stat & 0xf) | ((dev->stat & 8) << 4) | 0x10; + break; } return ret; } - static void herculesplus_write(uint32_t addr, uint8_t val, void *priv) { - herculesplus_t *dev = (herculesplus_t *)priv; + herculesplus_t *dev = (herculesplus_t *) priv; dev->vram[addr & 0xffff] = val; } - static uint8_t herculesplus_read(uint32_t addr, void *priv) { - herculesplus_t *dev = (herculesplus_t *)priv; + herculesplus_t *dev = (herculesplus_t *) priv; return dev->vram[addr & 0xffff]; } - static void draw_char_rom(herculesplus_t *dev, int x, uint8_t chr, uint8_t attr) { - unsigned ull, val, ifg, ibg; + unsigned ull, val, ifg, ibg; const uint8_t *fnt; - int i, elg, blk; - int cw = HERCULESPLUS_CW; + int i, elg, blk; + int cw = HERCULESPLUS_CW; blk = 0; if (dev->ctrl & HERCULESPLUS_CTRL_BLINK) { - if (attr & 0x80) - blk = (dev->blink & 16); - attr &= 0x7f; + if (attr & 0x80) + blk = (dev->blink & 16); + attr &= 0x7f; } /* MDA-compatible attributes */ ibg = 0; ifg = 7; - if ((attr & 0x77) == 0x70) { /* Invert */ - ifg = 0; - ibg = 7; + if ((attr & 0x77) == 0x70) { /* Invert */ + ifg = 0; + ibg = 7; } if (attr & 8) - ifg |= 8; /* High intensity FG */ + ifg |= 8; /* High intensity FG */ if (attr & 0x80) - ibg |= 8; /* High intensity BG */ - if ((attr & 0x77) == 0) /* Blank */ - ifg = ibg; + ibg |= 8; /* High intensity BG */ + if ((attr & 0x77) == 0) /* Blank */ + ifg = ibg; ull = ((attr & 0x07) == 1) ? 13 : 0xffff; if (dev->crtc[HERCULESPLUS_CRTC_XMODE] & HERCULESPLUS_XMODE_90COL) - elg = 0; - else - elg = ((chr >= 0xc0) && (chr <= 0xdf)); + elg = 0; + else + elg = ((chr >= 0xc0) && (chr <= 0xdf)); fnt = &(fontdatm[chr][dev->sc]); if (blk) { - val = 0x000; /* Blinking, draw all background */ - } else if (dev->sc == ull) { - val = 0x1ff; /* Underscore, draw all foreground */ + val = 0x000; /* Blinking, draw all background */ + } else if (dev->sc == ull) { + val = 0x1ff; /* Underscore, draw all foreground */ } else { - val = fnt[0] << 1; + val = fnt[0] << 1; - if (elg) - val |= (val >> 1) & 1; + if (elg) + val |= (val >> 1) & 1; } for (i = 0; i < cw; i++) { - buffer32->line[dev->displine][x * cw + i] = (val & 0x100) ? ifg : ibg; - val = val << 1; + buffer32->line[dev->displine][x * cw + i] = (val & 0x100) ? ifg : ibg; + val = val << 1; } } - static void draw_char_ram4(herculesplus_t *dev, int x, uint8_t chr, uint8_t attr) { - unsigned ull, val, ibg, cfg; + unsigned ull, val, ibg, cfg; const uint8_t *fnt; - int i, elg, blk; - int cw = HERCULESPLUS_CW; - int blink = dev->ctrl & HERCULESPLUS_CTRL_BLINK; + int i, elg, blk; + int cw = HERCULESPLUS_CW; + int blink = dev->ctrl & HERCULESPLUS_CTRL_BLINK; blk = 0; if (blink) { - if (attr & 0x80) - blk = (dev->blink & 16); - attr &= 0x7f; + if (attr & 0x80) + blk = (dev->blink & 16); + attr &= 0x7f; } /* MDA-compatible attributes */ ibg = 0; - if ((attr & 0x77) == 0x70) { /* Invert */ - ibg = 7; + if ((attr & 0x77) == 0x70) { /* Invert */ + ibg = 7; } if (attr & 8) - if (attr & 0x80) - ibg |= 8; /* High intensity BG */ - if ((attr & 0x77) == 0) /* Blank */ - ull = ((attr & 0x07) == 1) ? 13 : 0xffff; + if (attr & 0x80) + ibg |= 8; /* High intensity BG */ + if ((attr & 0x77) == 0) /* Blank */ + ull = ((attr & 0x07) == 1) ? 13 : 0xffff; if (dev->crtc[HERCULESPLUS_CRTC_XMODE] & HERCULESPLUS_XMODE_90COL) - elg = 0; + elg = 0; else - elg = ((chr >= 0xc0) && (chr <= 0xdf)); + elg = ((chr >= 0xc0) && (chr <= 0xdf)); fnt = dev->vram + 0x4000 + 16 * chr + dev->sc; if (blk) { - /* Blinking, draw all background */ - val = 0x000; + /* Blinking, draw all background */ + val = 0x000; } else if (dev->sc == ull) { - /* Underscore, draw all foreground */ - val = 0x1ff; + /* Underscore, draw all foreground */ + val = 0x1ff; } else { - val = fnt[0x00000] << 1; + val = fnt[0x00000] << 1; - if (elg) - val |= (val >> 1) & 1; + if (elg) + val |= (val >> 1) & 1; } for (i = 0; i < cw; i++) { - /* Generate pixel colour */ - cfg = 0; + /* Generate pixel colour */ + cfg = 0; - /* cfg = colour of foreground pixels */ - if ((attr & 0x77) == 0) - cfg = ibg; /* 'blank' attribute */ + /* cfg = colour of foreground pixels */ + if ((attr & 0x77) == 0) + cfg = ibg; /* 'blank' attribute */ - buffer32->line[dev->displine][x * cw + i] = dev->cols[attr][blink][cfg]; - val = val << 1; + buffer32->line[dev->displine][x * cw + i] = dev->cols[attr][blink][cfg]; + val = val << 1; } } - static void draw_char_ram48(herculesplus_t *dev, int x, uint8_t chr, uint8_t attr) { - int i, elg, blk, ul, ol, bld; - unsigned ull, oll, ulc = 0, olc = 0; - unsigned val, ibg, cfg; + int i, elg, blk, ul, ol, bld; + unsigned ull, oll, ulc = 0, olc = 0; + unsigned val, ibg, cfg; const unsigned char *fnt; - int cw = HERCULESPLUS_CW; - int blink = dev->ctrl & HERCULESPLUS_CTRL_BLINK; - int font = (attr & 0x0F); + int cw = HERCULESPLUS_CW; + int blink = dev->ctrl & HERCULESPLUS_CTRL_BLINK; + int font = (attr & 0x0F); - if (font >= 12) font &= 7; + if (font >= 12) + font &= 7; blk = 0; if (blink) { - if (attr & 0x40) - blk = (dev->blink & 16); - attr &= 0x7f; + if (attr & 0x40) + blk = (dev->blink & 16); + attr &= 0x7f; } /* MDA-compatible attributes */ if (blink) { - ibg = (attr & 0x80) ? 8 : 0; - bld = 0; - ol = (attr & 0x20) ? 1 : 0; - ul = (attr & 0x10) ? 1 : 0; + ibg = (attr & 0x80) ? 8 : 0; + bld = 0; + ol = (attr & 0x20) ? 1 : 0; + ul = (attr & 0x10) ? 1 : 0; } else { - bld = (attr & 0x80) ? 1 : 0; - ibg = (attr & 0x40) ? 0x0F : 0; - ol = (attr & 0x20) ? 1 : 0; - ul = (attr & 0x10) ? 1 : 0; + bld = (attr & 0x80) ? 1 : 0; + ibg = (attr & 0x40) ? 0x0F : 0; + ol = (attr & 0x20) ? 1 : 0; + ul = (attr & 0x10) ? 1 : 0; } if (ul) { - ull = dev->crtc[HERCULESPLUS_CRTC_UNDER] & 0x0F; - ulc = (dev->crtc[HERCULESPLUS_CRTC_UNDER] >> 4) & 0x0F; - if (ulc == 0) ulc = 7; + ull = dev->crtc[HERCULESPLUS_CRTC_UNDER] & 0x0F; + ulc = (dev->crtc[HERCULESPLUS_CRTC_UNDER] >> 4) & 0x0F; + if (ulc == 0) + ulc = 7; } else { - ull = 0xFFFF; + ull = 0xFFFF; } if (ol) { - oll = dev->crtc[HERCULESPLUS_CRTC_OVER] & 0x0F; - olc = (dev->crtc[HERCULESPLUS_CRTC_OVER] >> 4) & 0x0F; - if (olc == 0) olc = 7; + oll = dev->crtc[HERCULESPLUS_CRTC_OVER] & 0x0F; + olc = (dev->crtc[HERCULESPLUS_CRTC_OVER] >> 4) & 0x0F; + if (olc == 0) + olc = 7; } else { - oll = 0xFFFF; + oll = 0xFFFF; } if (dev->crtc[HERCULESPLUS_CRTC_XMODE] & HERCULESPLUS_XMODE_90COL) - elg = 0; + elg = 0; else - elg = ((chr >= 0xc0) && (chr <= 0xdf)); + elg = ((chr >= 0xc0) && (chr <= 0xdf)); fnt = dev->vram + 0x4000 + 16 * chr + 4096 * font + dev->sc; if (blk) { /* Blinking, draw all background */ - val = 0x000; + val = 0x000; } else if (dev->sc == ull) { - /* Underscore, draw all foreground */ - val = 0x1ff; + /* Underscore, draw all foreground */ + val = 0x1ff; } else { - val = fnt[0x00000] << 1; + val = fnt[0x00000] << 1; - if (elg) - val |= (val >> 1) & 1; - if (bld) - val |= (val >> 1); + if (elg) + val |= (val >> 1) & 1; + if (bld) + val |= (val >> 1); } for (i = 0; i < cw; i++) { - /* Generate pixel colour */ - cfg = val & 0x100; - if (dev->sc == oll) - cfg = olc ^ ibg; /* Strikethrough */ - else if (dev->sc == ull) - cfg = ulc ^ ibg; /* Underline */ - else - cfg |= ibg; + /* Generate pixel colour */ + cfg = val & 0x100; + if (dev->sc == oll) + cfg = olc ^ ibg; /* Strikethrough */ + else if (dev->sc == ull) + cfg = ulc ^ ibg; /* Underline */ + else + cfg |= ibg; - buffer32->line[dev->displine][(x * cw) + i] = dev->cols[attr][blink][cfg]; - val = val << 1; + buffer32->line[dev->displine][(x * cw) + i] = dev->cols[attr][blink][cfg]; + val = val << 1; } } - static void text_line(herculesplus_t *dev, uint16_t ca) { - int drawcursor; - int x, c; - uint8_t chr, attr; + int drawcursor; + int x, c; + uint8_t chr, attr; uint32_t col; for (x = 0; x < dev->crtc[1]; x++) { - if (dev->ctrl & 8) { - chr = dev->vram[(dev->ma << 1) & 0xfff]; - attr = dev->vram[((dev->ma << 1) + 1) & 0xfff]; - } else - chr = attr = 0; + if (dev->ctrl & 8) { + chr = dev->vram[(dev->ma << 1) & 0xfff]; + attr = dev->vram[((dev->ma << 1) + 1) & 0xfff]; + } else + chr = attr = 0; - drawcursor = ((dev->ma == ca) && dev->con && dev->cursoron); + drawcursor = ((dev->ma == ca) && dev->con && dev->cursoron); - switch (dev->crtc[HERCULESPLUS_CRTC_XMODE] & 5) { - case 0: - case 4: /* ROM font */ - draw_char_rom(dev, x, chr, attr); - break; + switch (dev->crtc[HERCULESPLUS_CRTC_XMODE] & 5) { + case 0: + case 4: /* ROM font */ + draw_char_rom(dev, x, chr, attr); + break; - case 1: /* 4k RAMfont */ - draw_char_ram4(dev, x, chr, attr); - break; + case 1: /* 4k RAMfont */ + draw_char_ram4(dev, x, chr, attr); + break; - case 5: /* 48k RAMfont */ - draw_char_ram48(dev, x, chr, attr); - break; - } - ++dev->ma; + case 5: /* 48k RAMfont */ + draw_char_ram48(dev, x, chr, attr); + break; + } + ++dev->ma; - if (drawcursor) { - int cw = HERCULESPLUS_CW; + if (drawcursor) { + int cw = HERCULESPLUS_CW; - col = dev->cols[attr][0][1]; - for (c = 0; c < cw; c++) - buffer32->line[dev->displine][x * cw + c] = col; - } + col = dev->cols[attr][0][1]; + for (c = 0; c < cw; c++) + buffer32->line[dev->displine][x * cw + c] = col; + } } } - static void graphics_line(herculesplus_t *dev) { uint16_t ca; - int x, c, plane = 0; + int x, c, plane = 0; uint16_t val; /* Graphics mode. */ ca = (dev->sc & 3) * 0x2000; if ((dev->ctrl & HERCULESPLUS_CTRL_PAGE1) && (dev->ctrl2 & HERCULESPLUS_CTRL2_PAGE1)) - ca += 0x8000; + ca += 0x8000; for (x = 0; x < dev->crtc[1]; x++) { - if (dev->ctrl & 8) - val = (dev->vram[((dev->ma << 1) & 0x1fff) + ca + 0x10000 * plane] << 8) - | dev->vram[((dev->ma << 1) & 0x1fff) + ca + 0x10000 * plane + 1]; - else - val = 0; + if (dev->ctrl & 8) + val = (dev->vram[((dev->ma << 1) & 0x1fff) + ca + 0x10000 * plane] << 8) + | dev->vram[((dev->ma << 1) & 0x1fff) + ca + 0x10000 * plane + 1]; + else + val = 0; - dev->ma++; - for (c = 0; c < 16; c++) { - buffer32->line[dev->displine][(x << 4) + c] = (val & 0x8000) ? 7 : 0; + dev->ma++; + for (c = 0; c < 16; c++) { + buffer32->line[dev->displine][(x << 4) + c] = (val & 0x8000) ? 7 : 0; - val <<= 1; - } + val <<= 1; + } - for (c = 0; c < 16; c += 8) - video_blend((x << 4) + c, dev->displine); + for (c = 0; c < 16; c += 8) + video_blend((x << 4) + c, dev->displine); } } - static void herculesplus_poll(void *priv) { - herculesplus_t *dev = (herculesplus_t *)priv; - uint16_t ca = (dev->crtc[15] | (dev->crtc[14] << 8)) & 0x3fff; - int x, oldvc, oldsc; + herculesplus_t *dev = (herculesplus_t *) priv; + uint16_t ca = (dev->crtc[15] | (dev->crtc[14] << 8)) & 0x3fff; + int x, oldvc, oldsc; VIDEO_MONITOR_PROLOGUE(); - if (! dev->linepos) { - timer_advance_u64(&dev->timer, dev->dispofftime); - dev->stat |= 1; - dev->linepos = 1; - oldsc = dev->sc; - if ((dev->crtc[8] & 3) == 3) - dev->sc = (dev->sc << 1) & 7; - if (dev->dispon) { - if (dev->displine < dev->firstline) { - dev->firstline = dev->displine; - video_wait_for_buffer(); - } - dev->lastline = dev->displine; - if ((dev->ctrl & HERCULESPLUS_CTRL_GRAPH) && (dev->ctrl2 & HERCULESPLUS_CTRL2_GRAPH)) - graphics_line(dev); - else - text_line(dev, ca); - } - dev->sc = oldsc; - if (dev->vc == dev->crtc[7] && !dev->sc) - dev->stat |= 8; - dev->displine++; - if (dev->displine >= 500) - dev->displine = 0; + if (!dev->linepos) { + timer_advance_u64(&dev->timer, dev->dispofftime); + dev->stat |= 1; + dev->linepos = 1; + oldsc = dev->sc; + if ((dev->crtc[8] & 3) == 3) + dev->sc = (dev->sc << 1) & 7; + if (dev->dispon) { + if (dev->displine < dev->firstline) { + dev->firstline = dev->displine; + video_wait_for_buffer(); + } + dev->lastline = dev->displine; + if ((dev->ctrl & HERCULESPLUS_CTRL_GRAPH) && (dev->ctrl2 & HERCULESPLUS_CTRL2_GRAPH)) + graphics_line(dev); + else + text_line(dev, ca); + } + dev->sc = oldsc; + if (dev->vc == dev->crtc[7] && !dev->sc) + dev->stat |= 8; + dev->displine++; + if (dev->displine >= 500) + dev->displine = 0; } else { - timer_advance_u64(&dev->timer, dev->dispontime); - if (dev->dispon) - dev->stat &= ~1; - dev->linepos = 0; - if (dev->vsynctime) { - dev->vsynctime--; - if (! dev->vsynctime) - dev->stat &= ~8; - } + timer_advance_u64(&dev->timer, dev->dispontime); + if (dev->dispon) + dev->stat &= ~1; + dev->linepos = 0; + if (dev->vsynctime) { + dev->vsynctime--; + if (!dev->vsynctime) + dev->stat &= ~8; + } - if (dev->sc == (dev->crtc[11] & 31) || ((dev->crtc[8] & 3) == 3 && dev->sc == ((dev->crtc[11] & 31) >> 1))) { - dev->con = 0; - dev->coff = 1; - } - if (dev->vadj) { - dev->sc++; - dev->sc &= 31; - dev->ma = dev->maback; - dev->vadj--; - if (! dev->vadj) { - dev->dispon = 1; - dev->ma = dev->maback = (dev->crtc[13] | (dev->crtc[12] << 8)) & 0x3fff; - dev->sc = 0; - } - } else if (dev->sc == dev->crtc[9] || ((dev->crtc[8] & 3) == 3 && dev->sc == (dev->crtc[9] >> 1))) { - dev->maback = dev->ma; - dev->sc = 0; - oldvc = dev->vc; - dev->vc++; - dev->vc &= 127; - if (dev->vc == dev->crtc[6]) - dev->dispon = 0; - if (oldvc == dev->crtc[4]) { - dev->vc = 0; - dev->vadj = dev->crtc[5]; - if (!dev->vadj) dev->dispon=1; - if (!dev->vadj) dev->ma = dev->maback = (dev->crtc[13] | (dev->crtc[12] << 8)) & 0x3fff; - if ((dev->crtc[10] & 0x60) == 0x20) - dev->cursoron = 0; - else - dev->cursoron = dev->blink & 16; - } - if (dev->vc == dev->crtc[7]) { - dev->dispon = 0; - dev->displine = 0; - dev->vsynctime = 16; - if (dev->crtc[7]) { - if ((dev->ctrl & HERCULESPLUS_CTRL_GRAPH) && (dev->ctrl2 & HERCULESPLUS_CTRL2_GRAPH)) - x = dev->crtc[1] << 4; - else - x = dev->crtc[1] * 9; - dev->lastline++; - if ((dev->ctrl & 8) && - ((x != xsize) || ((dev->lastline - dev->firstline) != ysize) || video_force_resize_get())) { - xsize = x; - ysize = dev->lastline - dev->firstline; - if (xsize < 64) xsize = 656; - if (ysize < 32) ysize = 200; - set_screen_size(xsize, ysize); + if (dev->sc == (dev->crtc[11] & 31) || ((dev->crtc[8] & 3) == 3 && dev->sc == ((dev->crtc[11] & 31) >> 1))) { + dev->con = 0; + dev->coff = 1; + } + if (dev->vadj) { + dev->sc++; + dev->sc &= 31; + dev->ma = dev->maback; + dev->vadj--; + if (!dev->vadj) { + dev->dispon = 1; + dev->ma = dev->maback = (dev->crtc[13] | (dev->crtc[12] << 8)) & 0x3fff; + dev->sc = 0; + } + } else if (dev->sc == dev->crtc[9] || ((dev->crtc[8] & 3) == 3 && dev->sc == (dev->crtc[9] >> 1))) { + dev->maback = dev->ma; + dev->sc = 0; + oldvc = dev->vc; + dev->vc++; + dev->vc &= 127; + if (dev->vc == dev->crtc[6]) + dev->dispon = 0; + if (oldvc == dev->crtc[4]) { + dev->vc = 0; + dev->vadj = dev->crtc[5]; + if (!dev->vadj) + dev->dispon = 1; + if (!dev->vadj) + dev->ma = dev->maback = (dev->crtc[13] | (dev->crtc[12] << 8)) & 0x3fff; + if ((dev->crtc[10] & 0x60) == 0x20) + dev->cursoron = 0; + else + dev->cursoron = dev->blink & 16; + } + if (dev->vc == dev->crtc[7]) { + dev->dispon = 0; + dev->displine = 0; + dev->vsynctime = 16; + if (dev->crtc[7]) { + if ((dev->ctrl & HERCULESPLUS_CTRL_GRAPH) && (dev->ctrl2 & HERCULESPLUS_CTRL2_GRAPH)) + x = dev->crtc[1] << 4; + else + x = dev->crtc[1] * 9; + dev->lastline++; + if ((dev->ctrl & 8) && ((x != xsize) || ((dev->lastline - dev->firstline) != ysize) || video_force_resize_get())) { + xsize = x; + ysize = dev->lastline - dev->firstline; + if (xsize < 64) + xsize = 656; + if (ysize < 32) + ysize = 200; + set_screen_size(xsize, ysize); - if (video_force_resize_get()) - video_force_resize_set(0); - } - video_blit_memtoscreen_8(0, dev->firstline, xsize, dev->lastline - dev->firstline); - frames++; - if ((dev->ctrl & HERCULESPLUS_CTRL_GRAPH) && (dev->ctrl2 & HERCULESPLUS_CTRL2_GRAPH)) { - video_res_x = dev->crtc[1] * 16; - video_res_y = dev->crtc[6] * 4; - video_bpp = 1; - } else { - video_res_x = dev->crtc[1]; - video_res_y = dev->crtc[6]; - video_bpp = 0; - } - } - dev->firstline = 1000; - dev->lastline = 0; - dev->blink++; - } - } else { - dev->sc++; - dev->sc &= 31; - dev->ma = dev->maback; - } + if (video_force_resize_get()) + video_force_resize_set(0); + } + video_blit_memtoscreen_8(0, dev->firstline, xsize, dev->lastline - dev->firstline); + frames++; + if ((dev->ctrl & HERCULESPLUS_CTRL_GRAPH) && (dev->ctrl2 & HERCULESPLUS_CTRL2_GRAPH)) { + video_res_x = dev->crtc[1] * 16; + video_res_y = dev->crtc[6] * 4; + video_bpp = 1; + } else { + video_res_x = dev->crtc[1]; + video_res_y = dev->crtc[6]; + video_bpp = 0; + } + } + dev->firstline = 1000; + dev->lastline = 0; + dev->blink++; + } + } else { + dev->sc++; + dev->sc &= 31; + dev->ma = dev->maback; + } - if ((dev->sc == (dev->crtc[10] & 31) || ((dev->crtc[8] & 3) == 3 && dev->sc == ((dev->crtc[10] & 31) >> 1)))) - dev->con = 1; + if ((dev->sc == (dev->crtc[10] & 31) || ((dev->crtc[8] & 3) == 3 && dev->sc == ((dev->crtc[10] & 31) >> 1)))) + dev->con = 1; } VIDEO_MONITOR_EPILOGUE(); } - static void * herculesplus_init(const device_t *info) { herculesplus_t *dev; - int c; + int c; - dev = (herculesplus_t *)malloc(sizeof(herculesplus_t)); + dev = (herculesplus_t *) malloc(sizeof(herculesplus_t)); memset(dev, 0, sizeof(herculesplus_t)); - dev->vram = (uint8_t *)malloc(0x10000); /* 64k VRAM */ + dev->vram = (uint8_t *) malloc(0x10000); /* 64k VRAM */ dev->monitor_index = monitor_index_global; timer_add(&dev->timer, herculesplus_poll, dev, 1); mem_mapping_add(&dev->mapping, 0xb0000, 0x08000, - herculesplus_read,NULL,NULL, - herculesplus_write,NULL,NULL, - dev->vram, MEM_MAPPING_EXTERNAL, dev); + herculesplus_read, NULL, NULL, + herculesplus_write, NULL, NULL, + dev->vram, MEM_MAPPING_EXTERNAL, dev); io_sethandler(0x03b0, 16, - herculesplus_in,NULL, NULL, herculesplus_out,NULL,NULL, dev); + herculesplus_in, NULL, NULL, herculesplus_out, NULL, NULL, dev); for (c = 0; c < 256; c++) { - dev->cols[c][0][0] = dev->cols[c][1][0] = dev->cols[c][1][1] = 16; - if (c & 8) - dev->cols[c][0][1] = 15 + 16; - else - dev->cols[c][0][1] = 7 + 16; + dev->cols[c][0][0] = dev->cols[c][1][0] = dev->cols[c][1][1] = 16; + if (c & 8) + dev->cols[c][0][1] = 15 + 16; + else + dev->cols[c][0][1] = 7 + 16; } dev->cols[0x70][0][1] = 16; - dev->cols[0x70][0][0] = dev->cols[0x70][1][0] = - dev->cols[0x70][1][1] = 16 + 15; - dev->cols[0xF0][0][1] = 16; - dev->cols[0xF0][0][0] = dev->cols[0xF0][1][0] = - dev->cols[0xF0][1][1] = 16 + 15; - dev->cols[0x78][0][1] = 16 + 7; - dev->cols[0x78][0][0] = dev->cols[0x78][1][0] = - dev->cols[0x78][1][1] = 16 + 15; - dev->cols[0xF8][0][1] = 16 + 7; - dev->cols[0xF8][0][0] = dev->cols[0xF8][1][0] = - dev->cols[0xF8][1][1] = 16 + 15; + dev->cols[0x70][0][0] = dev->cols[0x70][1][0] = dev->cols[0x70][1][1] = 16 + 15; + dev->cols[0xF0][0][1] = 16; + dev->cols[0xF0][0][0] = dev->cols[0xF0][1][0] = dev->cols[0xF0][1][1] = 16 + 15; + dev->cols[0x78][0][1] = 16 + 7; + dev->cols[0x78][0][0] = dev->cols[0x78][1][0] = dev->cols[0x78][1][1] = 16 + 15; + dev->cols[0xF8][0][1] = 16 + 7; + dev->cols[0xF8][0][0] = dev->cols[0xF8][1][0] = dev->cols[0xF8][1][1] = 16 + 15; dev->cols[0x00][0][1] = dev->cols[0x00][1][1] = 16; dev->cols[0x08][0][1] = dev->cols[0x08][1][1] = 16; dev->cols[0x80][0][1] = dev->cols[0x80][1][1] = 16; @@ -662,7 +658,7 @@ herculesplus_init(const device_t *info) cga_palette = device_get_config_int("rgb_type") << 1; if (cga_palette > 6) - cga_palette = 0; + cga_palette = 0; cgapal_rebuild(); video_inform(VIDEO_FLAG_TYPE_MDA, &timing_herculesplus); @@ -673,32 +669,30 @@ herculesplus_init(const device_t *info) return dev; } - static void herculesplus_close(void *priv) { - herculesplus_t *dev = (herculesplus_t *)priv; + herculesplus_t *dev = (herculesplus_t *) priv; if (!dev) - return; + return; if (dev->vram) - free(dev->vram); + free(dev->vram); free(dev); } - static void speed_changed(void *priv) { - herculesplus_t *dev = (herculesplus_t *)priv; + herculesplus_t *dev = (herculesplus_t *) priv; recalc_timings(dev); } static const device_config_t herculesplus_config[] = { -// clang-format off + // clang-format off { .name = "rgb_type", .description = "Display type", @@ -739,15 +733,15 @@ static const device_config_t herculesplus_config[] = { }; const device_t herculesplus_device = { - .name = "Hercules Plus", + .name = "Hercules Plus", .internal_name = "hercules_plus", - .flags = DEVICE_ISA, - .local = 0, - .init = herculesplus_init, - .close = herculesplus_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = herculesplus_init, + .close = herculesplus_close, + .reset = NULL, { .available = NULL }, .speed_changed = speed_changed, - .force_redraw = NULL, - .config = herculesplus_config + .force_redraw = NULL, + .config = herculesplus_config }; diff --git a/src/video/vid_ht216.c b/src/video/vid_ht216.c index 8ef6fc9e0..cf5e8f5f4 100644 --- a/src/video/vid_ht216.c +++ b/src/video/vid_ht216.c @@ -34,525 +34,525 @@ #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> +typedef struct ht216_t { + svga_t svga; -typedef struct ht216_t -{ - svga_t svga; + mem_mapping_t linear_mapping; - mem_mapping_t linear_mapping; + rom_t bios_rom; - rom_t bios_rom; + uint32_t vram_mask, linear_base; + uint8_t adjust_cursor, monitor_type; - uint32_t vram_mask, linear_base; - uint8_t adjust_cursor, monitor_type; + int ext_reg_enable; + int isabus; + int mca; - int ext_reg_enable; - int isabus; - int mca; + uint8_t read_bank_reg[2], write_bank_reg[2]; + uint16_t id, misc; + uint32_t read_banks[2], write_banks[2]; - uint8_t read_bank_reg[2], write_bank_reg[2]; - uint16_t id, misc; - uint32_t read_banks[2], write_banks[2]; + uint8_t bg_latch[8]; + uint8_t fg_latch[4]; + uint8_t bg_plane_sel, fg_plane_sel; - uint8_t bg_latch[8]; - uint8_t fg_latch[4]; - uint8_t bg_plane_sel, fg_plane_sel; + uint8_t ht_regs[256]; + uint8_t extensions, reg_3cb; - uint8_t ht_regs[256]; - uint8_t extensions, reg_3cb; - - uint8_t pos_regs[8]; + uint8_t pos_regs[8]; } ht216_t; - #define HT_MISC_PAGE_SEL (1 << 5) /*Shifts CPU VRAM read address by 3 bits, for use with fat pixel color expansion*/ -#define HT_REG_C8_MOVSB (1 << 0) -#define HT_REG_C8_E256 (1 << 4) -#define HT_REG_C8_XLAM (1 << 6) +#define HT_REG_C8_MOVSB (1 << 0) +#define HT_REG_C8_E256 (1 << 4) +#define HT_REG_C8_XLAM (1 << 6) #define HT_REG_CD_P8PCEXP (1 << 0) #define HT_REG_CD_FP8PCEXP (1 << 1) #define HT_REG_CD_BMSKSL (3 << 2) #define HT_REG_CD_RMWMDE (1 << 5) /*Use GDC data rotate as offset when reading VRAM data into latches*/ -#define HT_REG_CD_ASTODE (1 << 6) -#define HT_REG_CD_EXALU (1 << 7) +#define HT_REG_CD_ASTODE (1 << 6) +#define HT_REG_CD_EXALU (1 << 7) -#define HT_REG_E0_SBAE (1 << 7) +#define HT_REG_E0_SBAE (1 << 7) -#define HT_REG_F9_XPSEL (1 << 0) +#define HT_REG_F9_XPSEL (1 << 0) /*Enables A[14:15] of VRAM address in chain-4 modes*/ #define HT_REG_FC_ECOLRE (1 << 2) -#define HT_REG_FE_FBRC (1 << 1) -#define HT_REG_FE_FBMC (3 << 2) -#define HT_REG_FE_FBRSL (3 << 4) - +#define HT_REG_FE_FBRC (1 << 1) +#define HT_REG_FE_FBMC (3 << 2) +#define HT_REG_FE_FBRSL (3 << 4) void ht216_remap(ht216_t *ht216); -void ht216_out(uint16_t addr, uint8_t val, void *p); +void ht216_out(uint16_t addr, uint8_t val, void *p); uint8_t ht216_in(uint16_t addr, void *p); +#define BIOS_G2_GC205_PATH "roms/video/video7/BIOS.BIN" +#define BIOS_VIDEO7_VGA_1024I_PATH "roms/video/video7/Video Seven VGA 1024i - BIOS - v2.19 - 435-0062-05 - U17 - 27C256.BIN" +#define BIOS_RADIUS_SVGA_MULTIVIEW_PATH "roms/video/video7/U18.BIN" +#define BIOS_HT216_32_PATH "roms/video/video7/HT21632.BIN" -#define BIOS_G2_GC205_PATH "roms/video/video7/BIOS.BIN" -#define BIOS_VIDEO7_VGA_1024I_PATH "roms/video/video7/Video Seven VGA 1024i - BIOS - v2.19 - 435-0062-05 - U17 - 27C256.BIN" -#define BIOS_RADIUS_SVGA_MULTIVIEW_PATH "roms/video/video7/U18.BIN" -#define BIOS_HT216_32_PATH "roms/video/video7/HT21632.BIN" - -static video_timings_t timing_v7vga_isa = {VIDEO_ISA, 3, 3, 6, 5, 5, 10}; -static video_timings_t timing_v7vga_mca = {VIDEO_MCA, 4, 5, 10, 5, 5, 10}; -static video_timings_t timing_v7vga_vlb = {VIDEO_BUS, 5, 5, 9, 20, 20, 30}; - +static video_timings_t timing_v7vga_isa = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 5, .read_w = 5, .read_l = 10 }; +static video_timings_t timing_v7vga_mca = { .type = VIDEO_MCA, .write_b = 4, .write_w = 5, .write_l = 10, .read_b = 5, .read_w = 5, .read_l = 10 }; +static video_timings_t timing_v7vga_vlb = { .type = VIDEO_BUS, .write_b = 5, .write_w = 5, .write_l = 9, .read_b = 20, .read_w = 20, .read_l = 30 }; #ifdef ENABLE_HT216_LOG int ht216_do_log = ENABLE_HT216_LOG; - static void ht216_log(const char *fmt, ...) { va_list ap; if (ht216_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define ht216_log(fmt, ...) +# define ht216_log(fmt, ...) #endif /*Remap address for chain-4/doubleword style layout*/ static __inline uint32_t dword_remap(svga_t *svga, uint32_t in_addr) { - if (svga->packed_chain4) - return in_addr; - return ((in_addr & 0xfffc) << 2) | ((in_addr & 0x30000) >> 14) | (in_addr & ~0x3ffff); + if (svga->packed_chain4) + return in_addr; + return ((in_addr & 0xfffc) << 2) | ((in_addr & 0x30000) >> 14) | (in_addr & ~0x3ffff); } static void ht216_recalc_bank_regs(ht216_t *ht216, int mode) { - svga_t *svga = &ht216->svga; + svga_t *svga = &ht216->svga; - if (mode) { - ht216->read_bank_reg[0] = ht216->ht_regs[0xe8]; - ht216->write_bank_reg[0] = ht216->ht_regs[0xe8]; - ht216->read_bank_reg[1] = ht216->ht_regs[0xe9]; - ht216->write_bank_reg[1] = ht216->ht_regs[0xe9]; + if (mode) { + ht216->read_bank_reg[0] = ht216->ht_regs[0xe8]; + ht216->write_bank_reg[0] = ht216->ht_regs[0xe8]; + ht216->read_bank_reg[1] = ht216->ht_regs[0xe9]; + ht216->write_bank_reg[1] = ht216->ht_regs[0xe9]; } else { - ht216->read_bank_reg[0] = ((ht216->ht_regs[0xf6] & 0xc) << 4); - ht216->read_bank_reg[1] = ((ht216->ht_regs[0xf6] & 0xc) << 4); - ht216->write_bank_reg[0] = ((ht216->ht_regs[0xf6] & 0x3) << 6); - ht216->write_bank_reg[1] = ((ht216->ht_regs[0xf6] & 0x3) << 6); + ht216->read_bank_reg[0] = ((ht216->ht_regs[0xf6] & 0xc) << 4); + ht216->read_bank_reg[1] = ((ht216->ht_regs[0xf6] & 0xc) << 4); + ht216->write_bank_reg[0] = ((ht216->ht_regs[0xf6] & 0x3) << 6); + ht216->write_bank_reg[1] = ((ht216->ht_regs[0xf6] & 0x3) << 6); - if (svga->packed_chain4 || (ht216->ht_regs[0xfc] & HT_REG_FC_ECOLRE)) { - ht216->read_bank_reg[0] |= (ht216->misc & 0x20); - ht216->read_bank_reg[1] |= (ht216->misc & 0x20); - ht216->write_bank_reg[0] |= (ht216->misc & 0x20); - ht216->write_bank_reg[1] |= (ht216->misc & 0x20); - } + if (svga->packed_chain4 || (ht216->ht_regs[0xfc] & HT_REG_FC_ECOLRE)) { + ht216->read_bank_reg[0] |= (ht216->misc & 0x20); + ht216->read_bank_reg[1] |= (ht216->misc & 0x20); + ht216->write_bank_reg[0] |= (ht216->misc & 0x20); + ht216->write_bank_reg[1] |= (ht216->misc & 0x20); + } - if (svga->packed_chain4 || ((ht216->ht_regs[0xfc] & 0x06) == 0x04)) { - ht216->read_bank_reg[0] |= ((ht216->ht_regs[0xf9] & 1) << 4); - ht216->read_bank_reg[1] |= ((ht216->ht_regs[0xf9] & 1) << 4); - ht216->write_bank_reg[0] |= ((ht216->ht_regs[0xf9] & 1) << 4); - ht216->write_bank_reg[1] |= ((ht216->ht_regs[0xf9] & 1) << 4); - } + if (svga->packed_chain4 || ((ht216->ht_regs[0xfc] & 0x06) == 0x04)) { + ht216->read_bank_reg[0] |= ((ht216->ht_regs[0xf9] & 1) << 4); + ht216->read_bank_reg[1] |= ((ht216->ht_regs[0xf9] & 1) << 4); + ht216->write_bank_reg[0] |= ((ht216->ht_regs[0xf9] & 1) << 4); + ht216->write_bank_reg[1] |= ((ht216->ht_regs[0xf9] & 1) << 4); + } } } - void ht216_out(uint16_t addr, uint8_t val, void *p) { - ht216_t *ht216 = (ht216_t *)p; - svga_t *svga = &ht216->svga; - uint8_t old; + ht216_t *ht216 = (ht216_t *) p; + svga_t *svga = &ht216->svga; + uint8_t old; ht216_log("ht216 %i out %04X %02X %04X:%04X\n", svga->miscout & 1, addr, val, CS, cpu_state.pc); if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; + addr ^= 0x60; switch (addr) { - case 0x3c2: - /*Bit 17 of the display memory address, only active on odd/even modes, has no effect on graphics modes.*/ - ht216->misc = val; - svga->miscout = val; - ht216_log("HT216 misc val = %02x, mode = 0, chain4 = %x\n", val, svga->chain4); - ht216_recalc_bank_regs(ht216, 0); - ht216_remap(ht216); - svga_recalctimings(svga); - break; + case 0x3c2: + /*Bit 17 of the display memory address, only active on odd/even modes, has no effect on graphics modes.*/ + ht216->misc = val; + svga->miscout = val; + ht216_log("HT216 misc val = %02x, mode = 0, chain4 = %x\n", val, svga->chain4); + ht216_recalc_bank_regs(ht216, 0); + ht216_remap(ht216); + svga_recalctimings(svga); + break; - case 0x3c4: - svga->seqaddr = val; - break; + case 0x3c4: + svga->seqaddr = val; + break; - case 0x3c5: - if (svga->seqaddr == 4) { - svga->chain2_write = !(val & 4); - svga->chain4 = val & 8; - ht216_remap(ht216); - } else if (svga->seqaddr == 6) { - if (val == 0xea) - ht216->ext_reg_enable = 1; - else if (val == 0xae) - ht216->ext_reg_enable = 0; + case 0x3c5: + if (svga->seqaddr == 4) { + svga->chain2_write = !(val & 4); + svga->chain4 = val & 8; + ht216_remap(ht216); + } else if (svga->seqaddr == 6) { + if (val == 0xea) + ht216->ext_reg_enable = 1; + else if (val == 0xae) + ht216->ext_reg_enable = 0; #ifdef ENABLE_HT216_LOG - /* Functionality to output to the console a dump of all registers for debugging purposes. */ - } else if (svga->seqaddr == 0x7f) { - ht216_log(" 8 | 0 1 2 3 4 5 6 7 8 9 A B C D E F\n"); - ht216_log("----+-------------------------------------------------\n"); - ht216_log(" 8 | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", - ht216->ht_regs[0x80], ht216->ht_regs[0x81], ht216->ht_regs[0x82], ht216->ht_regs[0x83], - ht216->ht_regs[0x84], ht216->ht_regs[0x85], ht216->ht_regs[0x86], ht216->ht_regs[0x87], - ht216->ht_regs[0x88], ht216->ht_regs[0x89], ht216->ht_regs[0x8a], ht216->ht_regs[0x8b], - ht216->ht_regs[0x8c], ht216->ht_regs[0x8d], ht216->ht_regs[0x8e], ht216->ht_regs[0x8f]); - ht216_log(" 9 | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", - ht216->ht_regs[0x90], ht216->ht_regs[0x91], ht216->ht_regs[0x92], ht216->ht_regs[0x93], - ht216->ht_regs[0x94], ht216->ht_regs[0x95], ht216->ht_regs[0x96], ht216->ht_regs[0x97], - ht216->ht_regs[0x98], ht216->ht_regs[0x99], ht216->ht_regs[0x9a], ht216->ht_regs[0x9b], - ht216->ht_regs[0x9c], ht216->ht_regs[0x9d], ht216->ht_regs[0x9e], ht216->ht_regs[0x9f]); - ht216_log(" A | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", - ht216->ht_regs[0xa0], ht216->ht_regs[0xa1], ht216->ht_regs[0xa2], ht216->ht_regs[0xa3], - ht216->ht_regs[0xa4], ht216->ht_regs[0xa5], ht216->ht_regs[0xa6], ht216->ht_regs[0xa7], - ht216->ht_regs[0xa8], ht216->ht_regs[0xa9], ht216->ht_regs[0xaa], ht216->ht_regs[0xab], - ht216->ht_regs[0xac], ht216->ht_regs[0xad], ht216->ht_regs[0xae], ht216->ht_regs[0xaf]); - ht216_log(" B | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", - ht216->ht_regs[0xb0], ht216->ht_regs[0xb1], ht216->ht_regs[0xb2], ht216->ht_regs[0xb3], - ht216->ht_regs[0xb4], ht216->ht_regs[0xb5], ht216->ht_regs[0xb6], ht216->ht_regs[0xb7], - ht216->ht_regs[0xb8], ht216->ht_regs[0xb9], ht216->ht_regs[0xba], ht216->ht_regs[0xbb], - ht216->ht_regs[0xbc], ht216->ht_regs[0xbd], ht216->ht_regs[0xbe], ht216->ht_regs[0xbf]); - ht216_log(" C | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", - ht216->ht_regs[0xc0], ht216->ht_regs[0xc1], ht216->ht_regs[0xc2], ht216->ht_regs[0xc3], - ht216->ht_regs[0xc4], ht216->ht_regs[0xc5], ht216->ht_regs[0xc6], ht216->ht_regs[0xc7], - ht216->ht_regs[0xc8], ht216->ht_regs[0xc9], ht216->ht_regs[0xca], ht216->ht_regs[0xcb], - ht216->ht_regs[0xcc], ht216->ht_regs[0xcd], ht216->ht_regs[0xce], ht216->ht_regs[0xcf]); - ht216_log(" D | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", - ht216->ht_regs[0xd0], ht216->ht_regs[0xd1], ht216->ht_regs[0xd2], ht216->ht_regs[0xd3], - ht216->ht_regs[0xd4], ht216->ht_regs[0xd5], ht216->ht_regs[0xd6], ht216->ht_regs[0xd7], - ht216->ht_regs[0xd8], ht216->ht_regs[0xd9], ht216->ht_regs[0xda], ht216->ht_regs[0xdb], - ht216->ht_regs[0xdc], ht216->ht_regs[0xdd], ht216->ht_regs[0xde], ht216->ht_regs[0xdf]); - ht216_log(" E | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", - ht216->ht_regs[0xe0], ht216->ht_regs[0xe1], ht216->ht_regs[0xe2], ht216->ht_regs[0xe3], - ht216->ht_regs[0xe4], ht216->ht_regs[0xe5], ht216->ht_regs[0xe6], ht216->ht_regs[0xe7], - ht216->ht_regs[0xe8], ht216->ht_regs[0xe9], ht216->ht_regs[0xea], ht216->ht_regs[0xeb], - ht216->ht_regs[0xec], ht216->ht_regs[0xed], ht216->ht_regs[0xee], ht216->ht_regs[0xef]); - ht216_log(" F | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", - ht216->ht_regs[0xf0], ht216->ht_regs[0xf1], ht216->ht_regs[0xf2], ht216->ht_regs[0xf3], - ht216->ht_regs[0xf4], ht216->ht_regs[0xf5], ht216->ht_regs[0xf6], ht216->ht_regs[0xf7], - ht216->ht_regs[0xf8], ht216->ht_regs[0xf9], ht216->ht_regs[0xfa], ht216->ht_regs[0xfb], - ht216->ht_regs[0xfc], ht216->ht_regs[0xfd], ht216->ht_regs[0xfe], ht216->ht_regs[0xff]); - return; + /* Functionality to output to the console a dump of all registers for debugging purposes. */ + } else if (svga->seqaddr == 0x7f) { + ht216_log(" 8 | 0 1 2 3 4 5 6 7 8 9 A B C D E F\n"); + ht216_log("----+-------------------------------------------------\n"); + ht216_log(" 8 | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", + ht216->ht_regs[0x80], ht216->ht_regs[0x81], ht216->ht_regs[0x82], ht216->ht_regs[0x83], + ht216->ht_regs[0x84], ht216->ht_regs[0x85], ht216->ht_regs[0x86], ht216->ht_regs[0x87], + ht216->ht_regs[0x88], ht216->ht_regs[0x89], ht216->ht_regs[0x8a], ht216->ht_regs[0x8b], + ht216->ht_regs[0x8c], ht216->ht_regs[0x8d], ht216->ht_regs[0x8e], ht216->ht_regs[0x8f]); + ht216_log(" 9 | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", + ht216->ht_regs[0x90], ht216->ht_regs[0x91], ht216->ht_regs[0x92], ht216->ht_regs[0x93], + ht216->ht_regs[0x94], ht216->ht_regs[0x95], ht216->ht_regs[0x96], ht216->ht_regs[0x97], + ht216->ht_regs[0x98], ht216->ht_regs[0x99], ht216->ht_regs[0x9a], ht216->ht_regs[0x9b], + ht216->ht_regs[0x9c], ht216->ht_regs[0x9d], ht216->ht_regs[0x9e], ht216->ht_regs[0x9f]); + ht216_log(" A | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", + ht216->ht_regs[0xa0], ht216->ht_regs[0xa1], ht216->ht_regs[0xa2], ht216->ht_regs[0xa3], + ht216->ht_regs[0xa4], ht216->ht_regs[0xa5], ht216->ht_regs[0xa6], ht216->ht_regs[0xa7], + ht216->ht_regs[0xa8], ht216->ht_regs[0xa9], ht216->ht_regs[0xaa], ht216->ht_regs[0xab], + ht216->ht_regs[0xac], ht216->ht_regs[0xad], ht216->ht_regs[0xae], ht216->ht_regs[0xaf]); + ht216_log(" B | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", + ht216->ht_regs[0xb0], ht216->ht_regs[0xb1], ht216->ht_regs[0xb2], ht216->ht_regs[0xb3], + ht216->ht_regs[0xb4], ht216->ht_regs[0xb5], ht216->ht_regs[0xb6], ht216->ht_regs[0xb7], + ht216->ht_regs[0xb8], ht216->ht_regs[0xb9], ht216->ht_regs[0xba], ht216->ht_regs[0xbb], + ht216->ht_regs[0xbc], ht216->ht_regs[0xbd], ht216->ht_regs[0xbe], ht216->ht_regs[0xbf]); + ht216_log(" C | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", + ht216->ht_regs[0xc0], ht216->ht_regs[0xc1], ht216->ht_regs[0xc2], ht216->ht_regs[0xc3], + ht216->ht_regs[0xc4], ht216->ht_regs[0xc5], ht216->ht_regs[0xc6], ht216->ht_regs[0xc7], + ht216->ht_regs[0xc8], ht216->ht_regs[0xc9], ht216->ht_regs[0xca], ht216->ht_regs[0xcb], + ht216->ht_regs[0xcc], ht216->ht_regs[0xcd], ht216->ht_regs[0xce], ht216->ht_regs[0xcf]); + ht216_log(" D | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", + ht216->ht_regs[0xd0], ht216->ht_regs[0xd1], ht216->ht_regs[0xd2], ht216->ht_regs[0xd3], + ht216->ht_regs[0xd4], ht216->ht_regs[0xd5], ht216->ht_regs[0xd6], ht216->ht_regs[0xd7], + ht216->ht_regs[0xd8], ht216->ht_regs[0xd9], ht216->ht_regs[0xda], ht216->ht_regs[0xdb], + ht216->ht_regs[0xdc], ht216->ht_regs[0xdd], ht216->ht_regs[0xde], ht216->ht_regs[0xdf]); + ht216_log(" E | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", + ht216->ht_regs[0xe0], ht216->ht_regs[0xe1], ht216->ht_regs[0xe2], ht216->ht_regs[0xe3], + ht216->ht_regs[0xe4], ht216->ht_regs[0xe5], ht216->ht_regs[0xe6], ht216->ht_regs[0xe7], + ht216->ht_regs[0xe8], ht216->ht_regs[0xe9], ht216->ht_regs[0xea], ht216->ht_regs[0xeb], + ht216->ht_regs[0xec], ht216->ht_regs[0xed], ht216->ht_regs[0xee], ht216->ht_regs[0xef]); + ht216_log(" F | %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", + ht216->ht_regs[0xf0], ht216->ht_regs[0xf1], ht216->ht_regs[0xf2], ht216->ht_regs[0xf3], + ht216->ht_regs[0xf4], ht216->ht_regs[0xf5], ht216->ht_regs[0xf6], ht216->ht_regs[0xf7], + ht216->ht_regs[0xf8], ht216->ht_regs[0xf9], ht216->ht_regs[0xfa], ht216->ht_regs[0xfb], + ht216->ht_regs[0xfc], ht216->ht_regs[0xfd], ht216->ht_regs[0xfe], ht216->ht_regs[0xff]); + return; #endif - } else if (svga->seqaddr >= 0x80 && ht216->ext_reg_enable) { - old = ht216->ht_regs[svga->seqaddr & 0xff]; - ht216->ht_regs[svga->seqaddr & 0xff] = val; + } else if (svga->seqaddr >= 0x80 && ht216->ext_reg_enable) { + old = ht216->ht_regs[svga->seqaddr & 0xff]; + ht216->ht_regs[svga->seqaddr & 0xff] = val; - switch (svga->seqaddr & 0xff) { - case 0x83: - svga->attraddr = val & 0x1f; - svga->attrff = !!(val & 0x80); - break; + switch (svga->seqaddr & 0xff) { + case 0x83: + svga->attraddr = val & 0x1f; + svga->attrff = !!(val & 0x80); + break; - case 0x94: - case 0xff: - svga->hwcursor.addr = ((ht216->ht_regs[0x94] << 6) | 0xc000 | ((ht216->ht_regs[0xff] & 0x60) << 11)) << 2; - svga->hwcursor.addr &= svga->vram_mask; - if (svga->crtc[0x17] == 0xeb) /*Looks like that 1024x768 mono mode expects 512K of video memory*/ - svga->hwcursor.addr += 0x40000; - break; - case 0x9c: case 0x9d: - svga->hwcursor.x = ht216->ht_regs[0x9d] | ((ht216->ht_regs[0x9c] & 7) << 8); - break; - case 0x9e: case 0x9f: - svga->hwcursor.y = ht216->ht_regs[0x9f] | ((ht216->ht_regs[0x9e] & 3) << 8); - break; + case 0x94: + case 0xff: + svga->hwcursor.addr = ((ht216->ht_regs[0x94] << 6) | 0xc000 | ((ht216->ht_regs[0xff] & 0x60) << 11)) << 2; + svga->hwcursor.addr &= svga->vram_mask; + if (svga->crtc[0x17] == 0xeb) /*Looks like that 1024x768 mono mode expects 512K of video memory*/ + svga->hwcursor.addr += 0x40000; + break; + case 0x9c: + case 0x9d: + svga->hwcursor.x = ht216->ht_regs[0x9d] | ((ht216->ht_regs[0x9c] & 7) << 8); + break; + case 0x9e: + case 0x9f: + svga->hwcursor.y = ht216->ht_regs[0x9f] | ((ht216->ht_regs[0x9e] & 3) << 8); + break; - case 0xa0: - svga->latch.b[0] = val; - break; - case 0xa1: - svga->latch.b[1] = val; - break; - case 0xa2: - svga->latch.b[2] = val; - break; - case 0xa3: - svga->latch.b[3] = val; - break; + case 0xa0: + svga->latch.b[0] = val; + break; + case 0xa1: + svga->latch.b[1] = val; + break; + case 0xa2: + svga->latch.b[2] = val; + break; + case 0xa3: + svga->latch.b[3] = val; + break; - case 0xa4: - case 0xf8: - svga->fullchange = changeframecount; - svga_recalctimings(svga); - break; + case 0xa4: + case 0xf8: + svga->fullchange = changeframecount; + svga_recalctimings(svga); + break; - case 0xa5: - svga->hwcursor.ena = !!(val & 0x80); - break; + case 0xa5: + svga->hwcursor.ena = !!(val & 0x80); + break; - case 0xc0: - break; + case 0xc0: + break; - case 0xc1: - break; + case 0xc1: + break; - case 0xc8: - if ((old ^ val) & HT_REG_C8_E256) { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - ht216_remap(ht216); - break; + case 0xc8: + if ((old ^ val) & HT_REG_C8_E256) { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + ht216_remap(ht216); + break; - case 0xc9: case 0xcf: - ht216_remap(ht216); - break; + case 0xc9: + case 0xcf: + ht216_remap(ht216); + break; - case 0xe0: - svga->adv_flags &= ~FLAG_RAMDAC_SHIFT; - if (val & 0x04) - svga->adv_flags |= FLAG_RAMDAC_SHIFT; - /* FALLTHROUGH */ - /*Bank registers*/ - case 0xe8: case 0xe9: - ht216_log("HT216 reg 0x%02x write = %02x, mode = 1, chain4 = %x\n", svga->seqaddr & 0xff, val, svga->chain4); - ht216_recalc_bank_regs(ht216, 1); - ht216_remap(ht216); - break; + case 0xe0: + svga->adv_flags &= ~FLAG_RAMDAC_SHIFT; + if (val & 0x04) + svga->adv_flags |= FLAG_RAMDAC_SHIFT; + /* FALLTHROUGH */ + /*Bank registers*/ + case 0xe8: + case 0xe9: + ht216_log("HT216 reg 0x%02x write = %02x, mode = 1, chain4 = %x\n", svga->seqaddr & 0xff, val, svga->chain4); + ht216_recalc_bank_regs(ht216, 1); + ht216_remap(ht216); + break; - case 0xec: - ht216->fg_latch[0] = val; - break; - case 0xed: - ht216->fg_latch[1] = val; - break; - case 0xee: - ht216->fg_latch[2] = val; - break; - case 0xef: - ht216->fg_latch[3] = val; - break; + case 0xec: + ht216->fg_latch[0] = val; + break; + case 0xed: + ht216->fg_latch[1] = val; + break; + case 0xee: + ht216->fg_latch[2] = val; + break; + case 0xef: + ht216->fg_latch[3] = val; + break; - case 0xf0: - ht216->fg_latch[ht216->fg_plane_sel] = val; - ht216->fg_plane_sel = (ht216->fg_plane_sel + 1) & 3; - break; + case 0xf0: + ht216->fg_latch[ht216->fg_plane_sel] = val; + ht216->fg_plane_sel = (ht216->fg_plane_sel + 1) & 3; + break; - case 0xf1: - ht216->bg_plane_sel = val & 3; - ht216->fg_plane_sel = (val & 0x30) >> 4; - break; + case 0xf1: + ht216->bg_plane_sel = val & 3; + ht216->fg_plane_sel = (val & 0x30) >> 4; + break; - case 0xf2: - svga->latch.b[ht216->bg_plane_sel] = val; - ht216->bg_plane_sel = (ht216->bg_plane_sel + 1) & 3; - break; + case 0xf2: + svga->latch.b[ht216->bg_plane_sel] = val; + ht216->bg_plane_sel = (ht216->bg_plane_sel + 1) & 3; + break; - case 0xf6: - /*Bits 18 and 19 of the display memory address*/ - ht216_log("HT216 reg 0xf6 write = %02x, mode = 0, chain4 = %x, vram mask = %08x, cr17 = %02x\n", val, svga->chain4, svga->vram_display_mask, svga->crtc[0x17]); - ht216_recalc_bank_regs(ht216, 0); - ht216_remap(ht216); - svga->fullchange = changeframecount; - svga_recalctimings(svga); - break; + case 0xf6: + /*Bits 18 and 19 of the display memory address*/ + ht216_log("HT216 reg 0xf6 write = %02x, mode = 0, chain4 = %x, vram mask = %08x, cr17 = %02x\n", val, svga->chain4, svga->vram_display_mask, svga->crtc[0x17]); + ht216_recalc_bank_regs(ht216, 0); + ht216_remap(ht216); + svga->fullchange = changeframecount; + svga_recalctimings(svga); + break; - case 0xf9: - /*Bit 16 of the display memory address, only active when in chain4 mode and 256 color mode.*/ - ht216_log("HT216 reg 0xf9 write = %02x, mode = 0, chain4 = %x\n", val & HT_REG_F9_XPSEL, svga->chain4); - ht216_recalc_bank_regs(ht216, 0); - ht216_remap(ht216); - break; + case 0xf9: + /*Bit 16 of the display memory address, only active when in chain4 mode and 256 color mode.*/ + ht216_log("HT216 reg 0xf9 write = %02x, mode = 0, chain4 = %x\n", val & HT_REG_F9_XPSEL, svga->chain4); + ht216_recalc_bank_regs(ht216, 0); + ht216_remap(ht216); + break; - case 0xfc: - ht216_log("HT216 reg 0xfc write = %02x, mode = 0, chain4 = %x, bit 7 = %02x, packedchain = %02x\n", val, svga->chain4, val & 0x80, val & 0x20); - svga->packed_chain4 = !!(val & 0x20); - ht216_recalc_bank_regs(ht216, 0); - ht216_remap(ht216); - svga->fullchange = changeframecount; - svga_recalctimings(svga); - break; - } - return; - } - break; + case 0xfc: + ht216_log("HT216 reg 0xfc write = %02x, mode = 0, chain4 = %x, bit 7 = %02x, packedchain = %02x\n", val, svga->chain4, val & 0x80, val & 0x20); + svga->packed_chain4 = !!(val & 0x20); + ht216_recalc_bank_regs(ht216, 0); + ht216_remap(ht216); + svga->fullchange = changeframecount; + svga_recalctimings(svga); + break; + } + return; + } + break; - case 0x3c6: case 0x3c7: case 0x3c8: case 0x3c9: - if (ht216->id == 0x7152) - sc1148x_ramdac_out(addr, 0, val, svga->ramdac, svga); - else - svga_out(addr, val, svga); - return; + case 0x3c6: + case 0x3c7: + case 0x3c8: + case 0x3c9: + if (ht216->id == 0x7152) + sc1148x_ramdac_out(addr, 0, val, svga->ramdac, svga); + else + svga_out(addr, val, svga); + return; - case 0x3cb: - if (ht216->id == 0x7152) { - ht216->reg_3cb = val; - svga_set_ramdac_type(svga, (val & 0x20) ? RAMDAC_6BIT : RAMDAC_8BIT); - } - break; + case 0x3cb: + if (ht216->id == 0x7152) { + ht216->reg_3cb = val; + svga_set_ramdac_type(svga, (val & 0x20) ? RAMDAC_6BIT : RAMDAC_8BIT); + } + break; - case 0x3cf: - if (svga->gdcaddr == 5) { - svga->chain2_read = val & 0x10; - ht216_remap(ht216); - } else if (svga->gdcaddr == 6) { - if (val & 8) - svga->banked_mask = 0x7fff; - else - svga->banked_mask = 0xffff; - } + case 0x3cf: + if (svga->gdcaddr == 5) { + svga->chain2_read = val & 0x10; + ht216_remap(ht216); + } else if (svga->gdcaddr == 6) { + if (val & 8) + svga->banked_mask = 0x7fff; + else + svga->banked_mask = 0xffff; + } - if (svga->gdcaddr <= 8) { - svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) && - !svga->gdcreg[1]) && svga->chain4 && svga->packed_chain4; - } - break; + if (svga->gdcaddr <= 8) { + svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) && !svga->gdcreg[1]) && svga->chain4 && svga->packed_chain4; + } + break; - case 0x3D4: - svga->crtcreg = val & 0x3f; - return; - case 0x3D5: - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); + case 0x3D4: + svga->crtcreg = val & 0x3f; + return; + case 0x3D5: + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); - old = svga->crtc[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; - if (old != val) { - if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { - if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - } - } - break; + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + } + } + break; - case 0x46e8: - if ((ht216->id == 0x7152) && ht216->isabus) - io_removehandler(0x0105, 0x0001, ht216_in, NULL, NULL, ht216_out, NULL, NULL, ht216); - io_removehandler(0x03c0, 0x0020, ht216_in, NULL, NULL, ht216_out, NULL, NULL, ht216); - mem_mapping_disable(&svga->mapping); - mem_mapping_disable(&ht216->linear_mapping); - if (val & 8) { - if ((ht216->id == 0x7152) && ht216->isabus) - io_sethandler(0x0105, 0x0001, ht216_in, NULL, NULL, ht216_out, NULL, NULL, ht216); - io_sethandler(0x03c0, 0x0020, ht216_in, NULL, NULL, ht216_out, NULL, NULL, ht216); - mem_mapping_enable(&svga->mapping); - ht216_remap(ht216); - } - break; + case 0x46e8: + if ((ht216->id == 0x7152) && ht216->isabus) + io_removehandler(0x0105, 0x0001, ht216_in, NULL, NULL, ht216_out, NULL, NULL, ht216); + io_removehandler(0x03c0, 0x0020, ht216_in, NULL, NULL, ht216_out, NULL, NULL, ht216); + mem_mapping_disable(&svga->mapping); + mem_mapping_disable(&ht216->linear_mapping); + if (val & 8) { + if ((ht216->id == 0x7152) && ht216->isabus) + io_sethandler(0x0105, 0x0001, ht216_in, NULL, NULL, ht216_out, NULL, NULL, ht216); + io_sethandler(0x03c0, 0x0020, ht216_in, NULL, NULL, ht216_out, NULL, NULL, ht216); + mem_mapping_enable(&svga->mapping); + ht216_remap(ht216); + } + break; } svga_out(addr, val, svga); } - uint8_t ht216_in(uint16_t addr, void *p) { - ht216_t *ht216 = (ht216_t *)p; - svga_t *svga = &ht216->svga; - uint8_t ret = 0xff; + ht216_t *ht216 = (ht216_t *) p; + svga_t *svga = &ht216->svga; + uint8_t ret = 0xff; if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; + addr ^= 0x60; if ((ht216->id == 0x7152) && ht216->isabus) { - if (addr == 0x105) - return ht216->extensions; + if (addr == 0x105) + return ht216->extensions; } switch (addr) { - case 0x3c4: - return svga->seqaddr; + case 0x3c4: + return svga->seqaddr; - case 0x3c5: - if (svga->seqaddr == 6) - return ht216->ext_reg_enable; - else if (svga->seqaddr >= 0x80) { - if (ht216->ext_reg_enable) { - ret = ht216->ht_regs[svga->seqaddr & 0xff]; + case 0x3c5: + if (svga->seqaddr == 6) + return ht216->ext_reg_enable; + else if (svga->seqaddr >= 0x80) { + if (ht216->ext_reg_enable) { + ret = ht216->ht_regs[svga->seqaddr & 0xff]; - switch (svga->seqaddr & 0xff) { - case 0x83: - if (svga->attrff) - ret = svga->attraddr | 0x80; - else - ret = svga->attraddr; - break; + switch (svga->seqaddr & 0xff) { + case 0x83: + if (svga->attrff) + ret = svga->attraddr | 0x80; + else + ret = svga->attraddr; + break; - case 0x8e: - ret = ht216->id & 0xff; - break; - case 0x8f: - ret = (ht216->id >> 8) & 0xff; - break; + case 0x8e: + ret = ht216->id & 0xff; + break; + case 0x8f: + ret = (ht216->id >> 8) & 0xff; + break; - case 0xa0: - ret = svga->latch.b[0]; - break; - case 0xa1: - ret = svga->latch.b[1]; - break; - case 0xa2: - ret = svga->latch.b[2]; - break; - case 0xa3: - ret = svga->latch.b[3]; - break; + case 0xa0: + ret = svga->latch.b[0]; + break; + case 0xa1: + ret = svga->latch.b[1]; + break; + case 0xa2: + ret = svga->latch.b[2]; + break; + case 0xa3: + ret = svga->latch.b[3]; + break; - case 0xf0: - ret = ht216->fg_latch[ht216->fg_plane_sel]; - ht216->fg_plane_sel = 0; - break; + case 0xf0: + ret = ht216->fg_latch[ht216->fg_plane_sel]; + ht216->fg_plane_sel = 0; + break; - case 0xf2: - ret = svga->latch.b[ht216->bg_plane_sel]; - ht216->bg_plane_sel = 0; - break; - } + case 0xf2: + ret = svga->latch.b[ht216->bg_plane_sel]; + ht216->bg_plane_sel = 0; + break; + } - return ret; - } else - return 0xff; - } - break; + return ret; + } else + return 0xff; + } + break; - case 0x3c6: case 0x3c7: case 0x3c8: case 0x3c9: - if (ht216->id == 0x7152) - return sc1148x_ramdac_in(addr, 0, svga->ramdac, svga); - return svga_in(addr, svga); + case 0x3c6: + case 0x3c7: + case 0x3c8: + case 0x3c9: + if (ht216->id == 0x7152) + return sc1148x_ramdac_in(addr, 0, svga->ramdac, svga); + return svga_in(addr, svga); - case 0x3cb: - if (ht216->id == 0x7152) - return ht216->reg_3cb; - break; + case 0x3cb: + if (ht216->id == 0x7152) + return ht216->reg_3cb; + break; - case 0x3cc: - return svga->miscout; + case 0x3cc: + return svga->miscout; - case 0x3D4: - return svga->crtcreg; - case 0x3D5: - if (svga->crtcreg == 0x1f) - return svga->crtc[0xc] ^ 0xea; - return svga->crtc[svga->crtcreg]; + case 0x3D4: + return svga->crtcreg; + case 0x3D5: + if (svga->crtcreg == 0x1f) + return svga->crtc[0xc] ^ 0xea; + return svga->crtc[svga->crtcreg]; } return svga_in(addr, svga); @@ -565,204 +565,226 @@ ht216_remap(ht216_t *ht216) mem_mapping_disable(&ht216->linear_mapping); if (ht216->ht_regs[0xc8] & HT_REG_C8_XLAM) { - /*Linear mapping enabled*/ - ht216_log("Linear mapping enabled\n"); - ht216->linear_base = ((ht216->ht_regs[0xc9] & 0xf) << 20) | (ht216->ht_regs[0xcf] << 24); - mem_mapping_disable(&svga->mapping); - mem_mapping_set_addr(&ht216->linear_mapping, ht216->linear_base, 0x100000); + /*Linear mapping enabled*/ + ht216_log("Linear mapping enabled\n"); + ht216->linear_base = ((ht216->ht_regs[0xc9] & 0xf) << 20) | (ht216->ht_regs[0xcf] << 24); + mem_mapping_disable(&svga->mapping); + mem_mapping_set_addr(&ht216->linear_mapping, ht216->linear_base, 0x100000); } - ht216->read_banks[0] = ht216->read_bank_reg[0] << 12; + ht216->read_banks[0] = ht216->read_bank_reg[0] << 12; ht216->write_banks[0] = ht216->write_bank_reg[0] << 12; /* Split bank: two banks used */ if (ht216->ht_regs[0xe0] & HT_REG_E0_SBAE) { - ht216->read_banks[1] = ht216->read_bank_reg[1] << 12; - ht216->write_banks[1] = ht216->write_bank_reg[1] << 12; + ht216->read_banks[1] = ht216->read_bank_reg[1] << 12; + ht216->write_banks[1] = ht216->write_bank_reg[1] << 12; } if (!svga->chain4) { - ht216->read_banks[0] = ((ht216->read_banks[0] & 0xc0000) >> 2) | (ht216->read_banks[0] & 0xffff); - ht216->read_banks[1] = ((ht216->read_banks[1] & 0xc0000) >> 2) | (ht216->read_banks[1] & 0xffff); - ht216->write_banks[0] = ((ht216->write_banks[0] & 0xc0000) >> 2) | (ht216->write_banks[0] & 0xffff); - ht216->write_banks[1] = ((ht216->write_banks[1] & 0xc0000) >> 2) | (ht216->write_banks[1] & 0xffff); + ht216->read_banks[0] = ((ht216->read_banks[0] & 0xc0000) >> 2) | (ht216->read_banks[0] & 0xffff); + ht216->read_banks[1] = ((ht216->read_banks[1] & 0xc0000) >> 2) | (ht216->read_banks[1] & 0xffff); + ht216->write_banks[0] = ((ht216->write_banks[0] & 0xc0000) >> 2) | (ht216->write_banks[0] & 0xffff); + ht216->write_banks[1] = ((ht216->write_banks[1] & 0xc0000) >> 2) | (ht216->write_banks[1] & 0xffff); } if (!(ht216->ht_regs[0xe0] & HT_REG_E0_SBAE)) { - ht216->read_banks[1] = ht216->read_banks[0] + 0x8000; - ht216->write_banks[1] = ht216->write_banks[0] + 0x8000; + ht216->read_banks[1] = ht216->read_banks[0] + 0x8000; + ht216->write_banks[1] = ht216->write_banks[0] + 0x8000; } #ifdef ENABLE_HT216_LOG ht216_log("Registers: %02X, %02X, %02X, %02X, %02X\n", ht216->misc, ht216->ht_regs[0xe8], ht216->ht_regs[0xe9], - ht216->ht_regs[0xf6], ht216->ht_regs[0xf9]); + ht216->ht_regs[0xf6], ht216->ht_regs[0xf9]); ht216_log("Banks: %08X, %08X, %08X, %08X\n", ht216->read_banks[0], ht216->read_banks[1], - ht216->write_banks[0], ht216->write_banks[1]); + ht216->write_banks[0], ht216->write_banks[1]); #endif } - void ht216_recalctimings(svga_t *svga) { - ht216_t *ht216 = (ht216_t *)svga->p; - int high_res_256 = 0; + ht216_t *ht216 = (ht216_t *) svga->p; + int high_res_256 = 0; - switch ((((((svga->miscout >> 2) & 3) || ((ht216->ht_regs[0xa4] >> 2) & 3)) | - ((ht216->ht_regs[0xa4] >> 2) & 4)) || ((ht216->ht_regs[0xf8] >> 5) & 0x0f)) | - ((ht216->ht_regs[0xf8] << 1) & 8)) { - case 0: - case 1: - break; - case 4: - svga->clock = (cpuclock * (double)(1ull << 32)) / 50350000.0; - break; - case 5: - svga->clock = (cpuclock * (double)(1ull << 32)) / 65000000.0; - break; - case 7: - svga->clock = (cpuclock * (double)(1ull << 32)) / 40000000.0; - break; - default: - svga->clock = (cpuclock * (double)(1ull << 32)) / 36000000.0; - break; - } + switch ((((((svga->miscout >> 2) & 3) || ((ht216->ht_regs[0xa4] >> 2) & 3)) | ((ht216->ht_regs[0xa4] >> 2) & 4)) || ((ht216->ht_regs[0xf8] >> 5) & 0x0f)) | ((ht216->ht_regs[0xf8] << 1) & 8)) { + case 0: + case 1: + break; + case 4: + svga->clock = (cpuclock * (double) (1ull << 32)) / 50350000.0; + break; + case 5: + svga->clock = (cpuclock * (double) (1ull << 32)) / 65000000.0; + break; + case 7: + svga->clock = (cpuclock * (double) (1ull << 32)) / 40000000.0; + break; + default: + svga->clock = (cpuclock * (double) (1ull << 32)) / 36000000.0; + break; + } svga->ma_latch |= ((ht216->ht_regs[0xf6] & 0x30) << 12); svga->interlace = ht216->ht_regs[0xe0] & 1; if (svga->interlace) - high_res_256 = (svga->htotal * 8) > (svga->vtotal * 4); + high_res_256 = (svga->htotal * 8) > (svga->vtotal * 4); else - high_res_256 = (svga->htotal * 8) > (svga->vtotal * 2); + high_res_256 = (svga->htotal * 8) > (svga->vtotal * 2); ht216->adjust_cursor = 0; if (!svga->scrblank && svga->attr_palette_enable) { - if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /*Text mode*/ - if (svga->seqregs[1] & 8) /*40 column*/ { - svga->render = svga_render_text_40; - } else { - svga->render = svga_render_text_80; - } - } else { - if (svga->crtc[0x17] == 0xeb) { - svga->rowoffset <<= 1; - svga->render = svga_render_2bpp_headland_highres; - } + if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /*Text mode*/ + if (svga->seqregs[1] & 8) /*40 column*/ { + svga->render = svga_render_text_40; + } else { + svga->render = svga_render_text_80; + } + } else { + if (svga->crtc[0x17] == 0xeb) { + svga->rowoffset <<= 1; + svga->render = svga_render_2bpp_headland_highres; + } - if (svga->bpp == 8) { - ht216_log("regC8 = %02x, gdcreg5 bit 6 = %02x, no lowres = %02x, regf8 bit 7 = %02x, regfc = %02x\n", ht216->ht_regs[0xc8] & HT_REG_C8_E256, svga->gdcreg[5] & 0x40, !svga->lowres, ht216->ht_regs[0xf6] & 0x80, ht216->ht_regs[0xfc] & HT_REG_FC_ECOLRE); - if (((ht216->ht_regs[0xc8] & HT_REG_C8_E256) || (svga->gdcreg[5] & 0x40)) && (!svga->lowres || (ht216->ht_regs[0xf6] & 0x80))) { - if (high_res_256) { - svga->hdisp >>= 1; - ht216->adjust_cursor = 1; - } - svga->render = svga_render_8bpp_highres; - } else if (svga->lowres) { - if (high_res_256) { - svga->hdisp >>= 1; - ht216->adjust_cursor = 1; - svga->render = svga_render_8bpp_highres; - } else { - ht216_log("8bpp low, packed = %02x, chain4 = %02x\n", svga->packed_chain4, svga->chain4); - svga->render = svga_render_8bpp_lowres; - } - } else if (ht216->ht_regs[0xfc] & HT_REG_FC_ECOLRE) { - if (ht216->id == 0x7152) { - svga->hdisp = svga->crtc[1] - ((svga->crtc[5] & 0x60) >> 5); - if (!(svga->crtc[1] & 1)) - svga->hdisp--; - svga->hdisp++; - svga->hdisp *= (svga->seqregs[1] & 8) ? 16 : 8; - svga->rowoffset <<= 1; - if ((svga->crtc[0x17] & 0x60) == 0x20) /*Would result in a garbled screen with trailing cursor glitches*/ - svga->crtc[0x17] |= 0x40; - } - svga->render = svga_render_8bpp_highres; - } - } else if (svga->bpp == 15) { - svga->rowoffset <<= 1; - svga->hdisp >>= 1; - if ((svga->crtc[0x17] & 0x60) == 0x20) /*Would result in a garbled screen with trailing cursor glitches*/ - svga->crtc[0x17] |= 0x40; - svga->render = svga_render_15bpp_highres; - } - } - } + if (svga->bpp == 8) { + ht216_log("regC8 = %02x, gdcreg5 bit 6 = %02x, no lowres = %02x, regf8 bit 7 = %02x, regfc = %02x\n", ht216->ht_regs[0xc8] & HT_REG_C8_E256, svga->gdcreg[5] & 0x40, !svga->lowres, ht216->ht_regs[0xf6] & 0x80, ht216->ht_regs[0xfc] & HT_REG_FC_ECOLRE); + if (((ht216->ht_regs[0xc8] & HT_REG_C8_E256) || (svga->gdcreg[5] & 0x40)) && (!svga->lowres || (ht216->ht_regs[0xf6] & 0x80))) { + if (high_res_256) { + svga->hdisp >>= 1; + ht216->adjust_cursor = 1; + } + svga->render = svga_render_8bpp_highres; + } else if (svga->lowres) { + if (high_res_256) { + svga->hdisp >>= 1; + ht216->adjust_cursor = 1; + svga->render = svga_render_8bpp_highres; + } else { + ht216_log("8bpp low, packed = %02x, chain4 = %02x\n", svga->packed_chain4, svga->chain4); + svga->render = svga_render_8bpp_lowres; + } + } else if (ht216->ht_regs[0xfc] & HT_REG_FC_ECOLRE) { + if (ht216->id == 0x7152) { + svga->hdisp = svga->crtc[1] - ((svga->crtc[5] & 0x60) >> 5); + if (!(svga->crtc[1] & 1)) + svga->hdisp--; + svga->hdisp++; + svga->hdisp *= (svga->seqregs[1] & 8) ? 16 : 8; + svga->rowoffset <<= 1; + if ((svga->crtc[0x17] & 0x60) == 0x20) /*Would result in a garbled screen with trailing cursor glitches*/ + svga->crtc[0x17] |= 0x40; + } + svga->render = svga_render_8bpp_highres; + } + } else if (svga->bpp == 15) { + svga->rowoffset <<= 1; + svga->hdisp >>= 1; + if ((svga->crtc[0x17] & 0x60) == 0x20) /*Would result in a garbled screen with trailing cursor glitches*/ + svga->crtc[0x17] |= 0x40; + svga->render = svga_render_15bpp_highres; + } + } + } - svga->ma_latch |= ((ht216->ht_regs[0xf6] & 0x30) << 14); + svga->ma_latch |= ((ht216->ht_regs[0xf6] & 0x30) << 14); if (svga->crtc[0x17] == 0xeb) /*Looks like 1024x768 mono mode expects 512K of video memory*/ - svga->vram_display_mask = 0x7ffff; + svga->vram_display_mask = 0x7ffff; else - svga->vram_display_mask = (ht216->ht_regs[0xf6] & 0x40) ? ht216->vram_mask : 0x3ffff; + svga->vram_display_mask = (ht216->ht_regs[0xf6] & 0x40) ? ht216->vram_mask : 0x3ffff; } - static void ht216_hwcursor_draw(svga_t *svga, int displine) { - ht216_t *ht216 = (ht216_t *)svga->p; - int x, shift = (ht216->adjust_cursor ? 2 : 1); + ht216_t *ht216 = (ht216_t *) svga->p; + int x, shift = (ht216->adjust_cursor ? 2 : 1); uint32_t dat[2]; - int offset = svga->hwcursor_latch.x + svga->hwcursor_latch.xoff; - int width = (ht216->adjust_cursor ? 16 : 32); + int offset = svga->hwcursor_latch.x + svga->hwcursor_latch.xoff; + int width = (ht216->adjust_cursor ? 16 : 32); if (ht216->adjust_cursor) - offset >>= 1; + offset >>= 1; if (svga->interlace && svga->hwcursor_oddeven) - svga->hwcursor_latch.addr += 4; + svga->hwcursor_latch.addr += 4; - dat[0] = (svga->vram[svga->hwcursor_latch.addr] << 24) | - (svga->vram[svga->hwcursor_latch.addr+1] << 16) | - (svga->vram[svga->hwcursor_latch.addr+2] << 8) | - svga->vram[svga->hwcursor_latch.addr+3]; - dat[1] = (svga->vram[svga->hwcursor_latch.addr+128] << 24) | - (svga->vram[svga->hwcursor_latch.addr+128+1] << 16) | - (svga->vram[svga->hwcursor_latch.addr+128+2] << 8) | - svga->vram[svga->hwcursor_latch.addr+128+3]; + dat[0] = (svga->vram[svga->hwcursor_latch.addr] << 24) | (svga->vram[svga->hwcursor_latch.addr + 1] << 16) | (svga->vram[svga->hwcursor_latch.addr + 2] << 8) | svga->vram[svga->hwcursor_latch.addr + 3]; + dat[1] = (svga->vram[svga->hwcursor_latch.addr + 128] << 24) | (svga->vram[svga->hwcursor_latch.addr + 128 + 1] << 16) | (svga->vram[svga->hwcursor_latch.addr + 128 + 2] << 8) | svga->vram[svga->hwcursor_latch.addr + 128 + 3]; for (x = 0; x < width; x++) { - if (!(dat[0] & 0x80000000)) - ((uint32_t *)buffer32->line[displine])[svga->x_add + offset + x] = 0; - if (dat[1] & 0x80000000) - ((uint32_t *)buffer32->line[displine])[svga->x_add + offset + x] ^= 0xffffff; + if (!(dat[0] & 0x80000000)) + ((uint32_t *) buffer32->line[displine])[svga->x_add + offset + x] = 0; + if (dat[1] & 0x80000000) + ((uint32_t *) buffer32->line[displine])[svga->x_add + offset + x] ^= 0xffffff; - dat[0] <<= shift; - dat[1] <<= shift; + dat[0] <<= shift; + dat[1] <<= shift; } svga->hwcursor_latch.addr += 4; if (svga->interlace && !svga->hwcursor_oddeven) - svga->hwcursor_latch.addr += 4; + svga->hwcursor_latch.addr += 4; } - static __inline uint8_t extalu(int op, uint8_t input_a, uint8_t input_b) { uint8_t val; switch (op) { - case 0x0: val = 0; break; - case 0x1: val = ~(input_a | input_b); break; - case 0x2: val = input_a & ~input_b; break; - case 0x3: val = ~input_b; break; - case 0x4: val = ~input_a & input_b; break; - case 0x5: val = ~input_a; break; - case 0x6: val = input_a ^ input_b; break; - case 0x7: val = ~(input_a & input_b); break; - case 0x8: val = input_a & input_b; break; - case 0x9: val = ~(input_a ^ input_b); break; - case 0xa: val = input_a; break; - case 0xb: val = input_a | ~input_b; break; - case 0xc: val = input_b; break; - case 0xd: val = ~input_a | input_b; break; - case 0xe: val = input_a | input_b; break; - case 0xf: default: val = 0xff; break; + case 0x0: + val = 0; + break; + case 0x1: + val = ~(input_a | input_b); + break; + case 0x2: + val = input_a & ~input_b; + break; + case 0x3: + val = ~input_b; + break; + case 0x4: + val = ~input_a & input_b; + break; + case 0x5: + val = ~input_a; + break; + case 0x6: + val = input_a ^ input_b; + break; + case 0x7: + val = ~(input_a & input_b); + break; + case 0x8: + val = input_a & input_b; + break; + case 0x9: + val = ~(input_a ^ input_b); + break; + case 0xa: + val = input_a; + break; + case 0xb: + val = input_a | ~input_b; + break; + case 0xc: + val = input_b; + break; + case 0xd: + val = ~input_a | input_b; + break; + case 0xe: + val = input_a | input_b; + break; + case 0xf: + default: + val = 0xff; + break; } return val; @@ -771,180 +793,179 @@ extalu(int op, uint8_t input_a, uint8_t input_b) static void ht216_dm_write(ht216_t *ht216, uint32_t addr, uint8_t cpu_dat, uint8_t cpu_dat_unexpanded) { - svga_t *svga = &ht216->svga; - int writemask2 = svga->writemask, reset_wm = 0; + svga_t *svga = &ht216->svga; + int writemask2 = svga->writemask, reset_wm = 0; latch_t vall; uint8_t i, wm = svga->writemask; - uint8_t count = 4, fg_data[8] = {0, 0, 0, 0, 0, 0, 0, 0}; + uint8_t count = 4, fg_data[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) - writemask2 = svga->seqregs[2]; + writemask2 = svga->seqregs[2]; if (!(svga->gdcreg[6] & 1)) - svga->fullchange = 2; + svga->fullchange = 2; - if (svga->chain4) { - writemask2 = 1 << (addr & 3); - addr = dword_remap(svga, addr) & ~3; - } else if (svga->chain2_write && (svga->crtc[0x17] != 0xeb)) { - writemask2 &= ~0xa; - if (addr & 1) - writemask2 <<= 1; - addr &= ~1; - addr <<= 2; + if (svga->chain4) { + writemask2 = 1 << (addr & 3); + addr = dword_remap(svga, addr) & ~3; + } else if (svga->chain2_write && (svga->crtc[0x17] != 0xeb)) { + writemask2 &= ~0xa; + if (addr & 1) + writemask2 <<= 1; + addr &= ~1; + addr <<= 2; } else - addr <<= 2; + addr <<= 2; if (addr >= svga->vram_max) - return; + return; svga->changedvram[addr >> 12] = changeframecount; if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) - count = 8; + count = 8; switch (ht216->ht_regs[0xfe] & HT_REG_FE_FBMC) { - case 0x00: - for (i = 0; i < count; i++) - fg_data[i] = cpu_dat; - break; - case 0x04: - if (ht216->ht_regs[0xfe] & HT_REG_FE_FBRC) { - for (i = 0; i < count; i++) { - if (ht216->ht_regs[0xfa] & (1 << i)) - fg_data[i] = cpu_dat_unexpanded; - else if (ht216->ht_regs[0xfb] & (1 << i)) - fg_data[i] = 0xff - cpu_dat_unexpanded; - } - } else { - for (i = 0; i < count; i++) { - if (ht216->ht_regs[0xfa] & (1 << i)) - fg_data[i] = ht216->ht_regs[0xf5]; - else if (ht216->ht_regs[0xfb] & (1 << i)) - fg_data[i] = 0xff - ht216->ht_regs[0xf5]; - } - } - break; - case 0x08: - case 0x0c: - for (i = 0; i < count; i++) - fg_data[i] = ht216->fg_latch[i]; - break; + case 0x00: + for (i = 0; i < count; i++) + fg_data[i] = cpu_dat; + break; + case 0x04: + if (ht216->ht_regs[0xfe] & HT_REG_FE_FBRC) { + for (i = 0; i < count; i++) { + if (ht216->ht_regs[0xfa] & (1 << i)) + fg_data[i] = cpu_dat_unexpanded; + else if (ht216->ht_regs[0xfb] & (1 << i)) + fg_data[i] = 0xff - cpu_dat_unexpanded; + } + } else { + for (i = 0; i < count; i++) { + if (ht216->ht_regs[0xfa] & (1 << i)) + fg_data[i] = ht216->ht_regs[0xf5]; + else if (ht216->ht_regs[0xfb] & (1 << i)) + fg_data[i] = 0xff - ht216->ht_regs[0xf5]; + } + } + break; + case 0x08: + case 0x0c: + for (i = 0; i < count; i++) + fg_data[i] = ht216->fg_latch[i]; + break; } switch (svga->writemode) { - case 0: - if ((svga->gdcreg[8] == 0xff) && !(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) { - for (i = 0; i < count; i++) { - if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) { - if (writemask2 & (0x80 >> i)) - svga->vram[addr | i] = fg_data[i]; - } else { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = fg_data[i]; - } - } - return; - } else { - for (i = 0; i < count; i++) { - if (svga->gdcreg[1] & (1 << i)) - vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff; - else - vall.b[i] = fg_data[i]; - } - } - break; - case 1: - for (i = 0; i < count; i++) { - if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) { - if (writemask2 & (0x80 >> i)) - svga->vram[addr | i] = svga->latch.b[i]; - } else { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = svga->latch.b[i]; - } - } - return; - case 2: - for (i = 0; i < count; i++) - vall.b[i] = !!(cpu_dat & (1 << i)) * 0xff; + case 0: + if ((svga->gdcreg[8] == 0xff) && !(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) { + for (i = 0; i < count; i++) { + if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) { + if (writemask2 & (0x80 >> i)) + svga->vram[addr | i] = fg_data[i]; + } else { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = fg_data[i]; + } + } + return; + } else { + for (i = 0; i < count; i++) { + if (svga->gdcreg[1] & (1 << i)) + vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff; + else + vall.b[i] = fg_data[i]; + } + } + break; + case 1: + for (i = 0; i < count; i++) { + if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) { + if (writemask2 & (0x80 >> i)) + svga->vram[addr | i] = svga->latch.b[i]; + } else { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = svga->latch.b[i]; + } + } + return; + case 2: + for (i = 0; i < count; i++) + vall.b[i] = !!(cpu_dat & (1 << i)) * 0xff; - if (!(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) { - for (i = 0; i < count; i++) { - if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) { - if (writemask2 & (0x80 >> i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); - } else { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); - } - } - return; - } - break; - case 3: - wm = svga->gdcreg[8]; - svga->gdcreg[8] &= cpu_dat; + if (!(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) { + for (i = 0; i < count; i++) { + if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) { + if (writemask2 & (0x80 >> i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); + } else { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); + } + } + return; + } + break; + case 3: + wm = svga->gdcreg[8]; + svga->gdcreg[8] &= cpu_dat; - for (i = 0; i < count; i++) - vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff; + for (i = 0; i < count; i++) + vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff; - reset_wm = 1; - break; + reset_wm = 1; + break; } switch (svga->gdcreg[3] & 0x18) { - case 0x00: /* Set */ - for (i = 0; i < count; i++) { - if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) { - if (writemask2 & (0x80 >> i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); - } else { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); - } - } - break; - case 0x08: /* AND */ - for (i = 0; i < count; i++) { - if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) { - if (writemask2 & (0x80 >> i)) - svga->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i]; - } else { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i]; - } - } - break; - case 0x10: /* OR */ - for (i = 0; i < count; i++) { - if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) { - if (writemask2 & (0x80 >> i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i]; - } else { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i]; - } - } - break; - case 0x18: /* XOR */ - for (i = 0; i < count; i++) { - if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) { - if (writemask2 & (0x80 >> i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i]; - } else { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i]; - } - } - break; + case 0x00: /* Set */ + for (i = 0; i < count; i++) { + if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) { + if (writemask2 & (0x80 >> i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); + } else { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); + } + } + break; + case 0x08: /* AND */ + for (i = 0; i < count; i++) { + if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) { + if (writemask2 & (0x80 >> i)) + svga->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i]; + } else { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i]; + } + } + break; + case 0x10: /* OR */ + for (i = 0; i < count; i++) { + if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) { + if (writemask2 & (0x80 >> i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i]; + } else { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i]; + } + } + break; + case 0x18: /* XOR */ + for (i = 0; i < count; i++) { + if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) { + if (writemask2 & (0x80 >> i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i]; + } else { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i]; + } + } + break; } if (reset_wm) - svga->gdcreg[8] = wm; + svga->gdcreg[8] = wm; } - static void ht216_dm_extalu_write(ht216_t *ht216, uint32_t addr, uint8_t cpu_dat, uint8_t bit_mask, uint8_t cpu_dat_unexpanded, uint8_t rop_select) { @@ -960,122 +981,121 @@ ht216_dm_extalu_write(ht216_t *ht216, uint32_t addr, uint8_t cpu_dat, uint8_t bi 00 = CPU byte 01 = Bit mask (3CF:8) 1x = (3C4:F5)*/ - svga_t *svga = &ht216->svga; - uint8_t input_a = 0, input_b = 0; - uint8_t fg, bg; - uint8_t output; - uint32_t remapped_addr = dword_remap(svga, addr); + svga_t *svga = &ht216->svga; + uint8_t input_a = 0, input_b = 0; + uint8_t fg, bg; + uint8_t output; + uint32_t remapped_addr = dword_remap(svga, addr); if (ht216->ht_regs[0xcd] & HT_REG_CD_RMWMDE) /*RMW*/ - input_b = svga->vram[remapped_addr]; + input_b = svga->vram[remapped_addr]; else - input_b = ht216->bg_latch[addr & 7]; + input_b = ht216->bg_latch[addr & 7]; switch (ht216->ht_regs[0xfe] & HT_REG_FE_FBMC) { - case 0x00: - input_a = cpu_dat; - break; - case 0x04: - if (ht216->ht_regs[0xfe] & HT_REG_FE_FBRC) - input_a = (cpu_dat_unexpanded & (1 << ((addr & 7) ^ 7))) ? ht216->ht_regs[0xfa] : ht216->ht_regs[0xfb]; - else - input_a = (ht216->ht_regs[0xf5] & (1 << ((addr & 7) ^ 7))) ? ht216->ht_regs[0xfa] : ht216->ht_regs[0xfb]; - break; - case 0x08: - input_a = ht216->fg_latch[addr & 3]; - break; - case 0x0c: - input_a = ht216->bg_latch[addr & 7]; - break; + case 0x00: + input_a = cpu_dat; + break; + case 0x04: + if (ht216->ht_regs[0xfe] & HT_REG_FE_FBRC) + input_a = (cpu_dat_unexpanded & (1 << ((addr & 7) ^ 7))) ? ht216->ht_regs[0xfa] : ht216->ht_regs[0xfb]; + else + input_a = (ht216->ht_regs[0xf5] & (1 << ((addr & 7) ^ 7))) ? ht216->ht_regs[0xfa] : ht216->ht_regs[0xfb]; + break; + case 0x08: + input_a = ht216->fg_latch[addr & 3]; + break; + case 0x0c: + input_a = ht216->bg_latch[addr & 7]; + break; } - fg = extalu(ht216->ht_regs[0xce] >> 4, input_a, input_b); - bg = extalu(ht216->ht_regs[0xce] & 0xf, input_a, input_b); - output = (fg & rop_select) | (bg & ~rop_select); - svga->vram[addr] = (svga->vram[remapped_addr] & ~bit_mask) | (output & bit_mask); + fg = extalu(ht216->ht_regs[0xce] >> 4, input_a, input_b); + bg = extalu(ht216->ht_regs[0xce] & 0xf, input_a, input_b); + output = (fg & rop_select) | (bg & ~rop_select); + svga->vram[addr] = (svga->vram[remapped_addr] & ~bit_mask) | (output & bit_mask); svga->changedvram[remapped_addr >> 12] = changeframecount; } static void ht216_dm_masked_write(ht216_t *ht216, uint32_t addr, uint8_t val, uint8_t bit_mask) { - svga_t *svga = &ht216->svga; - int writemask2 = svga->writemask; - uint8_t count = 4, i; - uint8_t full_mask = 0x0f; + svga_t *svga = &ht216->svga; + int writemask2 = svga->writemask; + uint8_t count = 4, i; + uint8_t full_mask = 0x0f; if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) - writemask2 = svga->seqregs[2]; + writemask2 = svga->seqregs[2]; if (!(svga->gdcreg[6] & 1)) - svga->fullchange = 2; + svga->fullchange = 2; - if (svga->chain4) { - writemask2 = 1 << (addr & 3); - addr = dword_remap(svga, addr) & ~3; - } else if (svga->chain2_write) { - writemask2 &= ~0xa; - if (addr & 1) - writemask2 <<= 1; - addr &= ~1; - addr <<= 2; + if (svga->chain4) { + writemask2 = 1 << (addr & 3); + addr = dword_remap(svga, addr) & ~3; + } else if (svga->chain2_write) { + writemask2 &= ~0xa; + if (addr & 1) + writemask2 <<= 1; + addr &= ~1; + addr <<= 2; } else - addr <<= 2; + addr <<= 2; if (addr >= svga->vram_max) - return; + return; addr &= svga->decode_mask; if (addr >= svga->vram_max) - return; + return; addr &= svga->vram_mask; svga->changedvram[addr >> 12] = changeframecount; if (ht216->ht_regs[0xcd] & HT_REG_CD_P8PCEXP) { - count = 8; - full_mask = 0xff; + count = 8; + full_mask = 0xff; } if (bit_mask == 0xff) { - for (i = 0; i < count; i++) { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = val; - } + for (i = 0; i < count; i++) { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = val; + } } else { - if (writemask2 == full_mask) { - for (i = 0; i < count; i++) - svga->vram[addr | i] = (svga->latch.b[i] & bit_mask) | (svga->vram[addr | i] & ~bit_mask); - } else { - for (i = 0; i < count; i++) { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = (val & bit_mask) | (svga->vram[addr | i] & ~bit_mask); - } - } + if (writemask2 == full_mask) { + for (i = 0; i < count; i++) + svga->vram[addr | i] = (svga->latch.b[i] & bit_mask) | (svga->vram[addr | i] & ~bit_mask); + } else { + for (i = 0; i < count; i++) { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = (val & bit_mask) | (svga->vram[addr | i] & ~bit_mask); + } + } } } - static void ht216_write_common(ht216_t *ht216, uint32_t addr, uint8_t val) { /*Input B = CD.5 Input A = FE[3:2] - 00 = Set/Reset output mode - output = CPU-side ALU input - 01 = Solid fg/bg mode (3C4:FA/FB) - Bit mask = 3CF.F5 or CPU byte - 10 = Dithered fg (3CF:EC-EF) - 11 = RMW (dest data) (set if CD.5 = 1) + 00 = Set/Reset output mode + output = CPU-side ALU input + 01 = Solid fg/bg mode (3C4:FA/FB) + Bit mask = 3CF.F5 or CPU byte + 10 = Dithered fg (3CF:EC-EF) + 11 = RMW (dest data) (set if CD.5 = 1) F/B ROP select = FE[5:4] - 00 = CPU byte - 01 = Bit mask (3CF:8) - 1x = (3C4:F5) + 00 = CPU byte + 01 = Bit mask (3CF:8) + 1x = (3C4:F5) */ svga_t *svga = &ht216->svga; - int i; + int i; uint8_t bit_mask = 0, rop_select = 0; cycles -= video_timing_write_b; @@ -1085,199 +1105,194 @@ ht216_write_common(ht216_t *ht216, uint32_t addr, uint8_t val) val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7)))); if (ht216->ht_regs[0xcd] & HT_REG_CD_EXALU) { - /*Extended ALU*/ - switch (ht216->ht_regs[0xfe] & HT_REG_FE_FBRSL) { - case 0x00: - rop_select = val; - break; - case 0x10: - rop_select = svga->gdcreg[8]; - break; - case 0x20: case 0x30: - rop_select = ht216->ht_regs[0xf5]; - break; - } - switch (ht216->ht_regs[0xcd] & HT_REG_CD_BMSKSL) { - case 0x00: - bit_mask = svga->gdcreg[8]; - break; - case 0x04: - bit_mask = val; - break; - case 0x08: case 0x0c: - bit_mask = ht216->ht_regs[0xf5]; - break; - } + /*Extended ALU*/ + switch (ht216->ht_regs[0xfe] & HT_REG_FE_FBRSL) { + case 0x00: + rop_select = val; + break; + case 0x10: + rop_select = svga->gdcreg[8]; + break; + case 0x20: + case 0x30: + rop_select = ht216->ht_regs[0xf5]; + break; + } + switch (ht216->ht_regs[0xcd] & HT_REG_CD_BMSKSL) { + case 0x00: + bit_mask = svga->gdcreg[8]; + break; + case 0x04: + bit_mask = val; + break; + case 0x08: + case 0x0c: + bit_mask = ht216->ht_regs[0xf5]; + break; + } - if (ht216->ht_regs[0xcd] & HT_REG_CD_FP8PCEXP) { /*1->8 bit expansion*/ - addr = (addr << 3) & 0xfffff; - for (i = 0; i < 8; i++) - ht216_dm_extalu_write(ht216, addr + i, (val & (0x80 >> i)) ? 0xff : 0, (bit_mask & (0x80 >> i)) ? 0xff : 0, val, (rop_select & (0x80 >> i)) ? 0xff : 0); - } else { - ht216_dm_extalu_write(ht216, addr, val, bit_mask, val, rop_select); - } + if (ht216->ht_regs[0xcd] & HT_REG_CD_FP8PCEXP) { /*1->8 bit expansion*/ + addr = (addr << 3) & 0xfffff; + for (i = 0; i < 8; i++) + ht216_dm_extalu_write(ht216, addr + i, (val & (0x80 >> i)) ? 0xff : 0, (bit_mask & (0x80 >> i)) ? 0xff : 0, val, (rop_select & (0x80 >> i)) ? 0xff : 0); + } else { + ht216_dm_extalu_write(ht216, addr, val, bit_mask, val, rop_select); + } } else if (ht216->ht_regs[0xf3]) { - if (ht216->ht_regs[0xf3] & 2) { - ht216_dm_masked_write(ht216, addr, val, val); - } else - ht216_dm_masked_write(ht216, addr, val, ht216->ht_regs[0xf4]); + if (ht216->ht_regs[0xf3] & 2) { + ht216_dm_masked_write(ht216, addr, val, val); + } else + ht216_dm_masked_write(ht216, addr, val, ht216->ht_regs[0xf4]); } else { - if (ht216->ht_regs[0xcd] & HT_REG_CD_FP8PCEXP) { /*1->8 bit expansion*/ - addr = (addr << 3) & 0xfffff; - for (i = 0; i < 8; i++) - ht216_dm_write(ht216, addr + i, (val & (0x80 >> i)) ? 0xff : 0, val); - } else { - ht216_dm_write(ht216, addr, val, val); - } + if (ht216->ht_regs[0xcd] & HT_REG_CD_FP8PCEXP) { /*1->8 bit expansion*/ + addr = (addr << 3) & 0xfffff; + for (i = 0; i < 8; i++) + ht216_dm_write(ht216, addr + i, (val & (0x80 >> i)) ? 0xff : 0, val); + } else { + ht216_dm_write(ht216, addr, val, val); + } } } - static void ht216_write(uint32_t addr, uint8_t val, void *p) { - ht216_t *ht216 = (ht216_t *)p; - svga_t *svga = &ht216->svga; + ht216_t *ht216 = (ht216_t *) p; + svga_t *svga = &ht216->svga; uint32_t prev_addr = addr; addr &= svga->banked_mask; addr = (addr & 0x7fff) + ht216->write_banks[(addr >> 15) & 1]; if (svga->crtc[0x17] == 0xeb && !(svga->gdcreg[6] & 0xc) && prev_addr >= 0xb0000) - addr += 0x10000; + addr += 0x10000; else if (svga->chain4 && ((ht216->ht_regs[0xfc] & 0x06) == 0x06)) - addr = (addr & 0xfffeffff) | (prev_addr & 0x10000); + addr = (addr & 0xfffeffff) | (prev_addr & 0x10000); if (!ht216->ht_regs[0xcd] && !ht216->ht_regs[0xfe] && !ht216->ht_regs[0xf3] && svga->crtc[0x17] != 0xeb) { - svga_write_linear(addr, val, svga); + svga_write_linear(addr, val, svga); } else - ht216_write_common(ht216, addr, val); + ht216_write_common(ht216, addr, val); } - static void ht216_writew(uint32_t addr, uint16_t val, void *p) { - ht216_t *ht216 = (ht216_t *)p; - svga_t *svga = &ht216->svga; + ht216_t *ht216 = (ht216_t *) p; + svga_t *svga = &ht216->svga; uint32_t prev_addr = addr; addr &= svga->banked_mask; addr = (addr & 0x7fff) + ht216->write_banks[(addr >> 15) & 1]; if (svga->crtc[0x17] == 0xeb && !(svga->gdcreg[6] & 0xc) && prev_addr >= 0xb0000) - addr += 0x10000; + addr += 0x10000; else if (svga->chain4 && ((ht216->ht_regs[0xfc] & 0x06) == 0x06)) - addr = (addr & 0xfffeffff) | (prev_addr & 0x10000); + addr = (addr & 0xfffeffff) | (prev_addr & 0x10000); if (!ht216->ht_regs[0xcd] && !ht216->ht_regs[0xfe] && !ht216->ht_regs[0xf3] && svga->crtc[0x17] != 0xeb) - svga_writew_linear(addr, val, svga); + svga_writew_linear(addr, val, svga); else { - ht216_write_common(ht216, addr, val); - ht216_write_common(ht216, addr+1, val >> 8); + ht216_write_common(ht216, addr, val); + ht216_write_common(ht216, addr + 1, val >> 8); } } - static void ht216_writel(uint32_t addr, uint32_t val, void *p) { - ht216_t *ht216 = (ht216_t *)p; - svga_t *svga = &ht216->svga; + ht216_t *ht216 = (ht216_t *) p; + svga_t *svga = &ht216->svga; uint32_t prev_addr = addr; addr &= svga->banked_mask; addr = (addr & 0x7fff) + ht216->write_banks[(addr >> 15) & 1]; if (svga->crtc[0x17] == 0xeb && !(svga->gdcreg[6] & 0xc) && prev_addr >= 0xb0000) - addr += 0x10000; + addr += 0x10000; else if (svga->chain4 && ((ht216->ht_regs[0xfc] & 0x06) == 0x06)) - addr = (addr & 0xfffeffff) | (prev_addr & 0x10000); + addr = (addr & 0xfffeffff) | (prev_addr & 0x10000); if (!ht216->ht_regs[0xcd] && !ht216->ht_regs[0xfe] && !ht216->ht_regs[0xf3] && svga->crtc[0x17] != 0xeb) - svga_writel_linear(addr, val, svga); + svga_writel_linear(addr, val, svga); else { - ht216_write_common(ht216, addr, val); - ht216_write_common(ht216, addr+1, val >> 8); - ht216_write_common(ht216, addr+2, val >> 16); - ht216_write_common(ht216, addr+3, val >> 24); + ht216_write_common(ht216, addr, val); + ht216_write_common(ht216, addr + 1, val >> 8); + ht216_write_common(ht216, addr + 2, val >> 16); + ht216_write_common(ht216, addr + 3, val >> 24); } } - static void ht216_write_linear(uint32_t addr, uint8_t val, void *p) { - ht216_t *ht216 = (ht216_t *)p; - svga_t *svga = &ht216->svga; + ht216_t *ht216 = (ht216_t *) p; + svga_t *svga = &ht216->svga; addr -= ht216->linear_base; - if (!svga->chain4) /*Bits 16 and 17 of linear address are unused in planar modes*/ - addr = (addr & 0xffff) | ((addr & 0xc0000) >> 2); + if (!svga->chain4) /*Bits 16 and 17 of linear address are unused in planar modes*/ + addr = (addr & 0xffff) | ((addr & 0xc0000) >> 2); addr += ht216->write_banks[0]; if (!ht216->ht_regs[0xcd] && !ht216->ht_regs[0xfe]) - svga_write_linear(addr, val, svga); + svga_write_linear(addr, val, svga); else - ht216_write_common(ht216, addr, val); + ht216_write_common(ht216, addr, val); } - static void ht216_writew_linear(uint32_t addr, uint16_t val, void *p) { - ht216_t *ht216 = (ht216_t *)p; - svga_t *svga = &ht216->svga; + ht216_t *ht216 = (ht216_t *) p; + svga_t *svga = &ht216->svga; addr -= ht216->linear_base; - if (!svga->chain4) /*Bits 16 and 17 of linear address are unused in planar modes*/ - addr = (addr & 0xffff) | ((addr & 0xc0000) >> 2); + if (!svga->chain4) /*Bits 16 and 17 of linear address are unused in planar modes*/ + addr = (addr & 0xffff) | ((addr & 0xc0000) >> 2); addr += ht216->write_banks[0]; if (!ht216->ht_regs[0xcd] && !ht216->ht_regs[0xfe]) - svga_writew_linear(addr, val, svga); + svga_writew_linear(addr, val, svga); else { - ht216_write_common(ht216, addr, val); - ht216_write_common(ht216, addr+1, val >> 8); + ht216_write_common(ht216, addr, val); + ht216_write_common(ht216, addr + 1, val >> 8); } } - static void ht216_writel_linear(uint32_t addr, uint32_t val, void *p) { - ht216_t *ht216 = (ht216_t *)p; - svga_t *svga = &ht216->svga; + ht216_t *ht216 = (ht216_t *) p; + svga_t *svga = &ht216->svga; addr -= ht216->linear_base; - if (!svga->chain4) /*Bits 16 and 17 of linear address are unused in planar modes*/ - addr = (addr & 0xffff) | ((addr & 0xc0000) >> 2); + if (!svga->chain4) /*Bits 16 and 17 of linear address are unused in planar modes*/ + addr = (addr & 0xffff) | ((addr & 0xc0000) >> 2); addr += ht216->write_banks[0]; if (!ht216->ht_regs[0xcd] && !ht216->ht_regs[0xfe]) - svga_writel_linear(addr, val, svga); + svga_writel_linear(addr, val, svga); else { - ht216_write_common(ht216, addr, val); - ht216_write_common(ht216, addr+1, val >> 8); - ht216_write_common(ht216, addr+2, val >> 16); - ht216_write_common(ht216, addr+3, val >> 24); + ht216_write_common(ht216, addr, val); + ht216_write_common(ht216, addr + 1, val >> 8); + ht216_write_common(ht216, addr + 2, val >> 16); + ht216_write_common(ht216, addr + 3, val >> 24); } } - static uint8_t ht216_read_common(ht216_t *ht216, uint32_t addr) { - svga_t *svga = &ht216->svga; + svga_t *svga = &ht216->svga; uint32_t latch_addr = 0; - int offset, readplane = svga->readplane; + int offset, readplane = svga->readplane; uint8_t or, i; uint8_t count = 2; uint8_t plane, pixel; uint8_t temp, ret; if (ht216->ht_regs[0xc8] & HT_REG_C8_MOVSB) - addr <<= 3; + addr <<= 3; addr &= svga->vram_mask; @@ -1286,95 +1301,93 @@ ht216_read_common(ht216_t *ht216, uint32_t addr) count = (1 << count); if (svga->chain4 && svga->packed_chain4) { - addr &= svga->decode_mask; - if (addr >= svga->vram_max) - return 0xff; - latch_addr = (addr & svga->vram_mask) & ~7; - if (ht216->ht_regs[0xcd] & HT_REG_CD_ASTODE) - latch_addr += (svga->gdcreg[3] & 7); - for (i = 0; i < 8; i++) - ht216->bg_latch[i] = svga->vram[dword_remap(svga, latch_addr + i)]; - return svga->vram[dword_remap(svga, addr) & svga->vram_mask]; + addr &= svga->decode_mask; + if (addr >= svga->vram_max) + return 0xff; + latch_addr = (addr & svga->vram_mask) & ~7; + if (ht216->ht_regs[0xcd] & HT_REG_CD_ASTODE) + latch_addr += (svga->gdcreg[3] & 7); + for (i = 0; i < 8; i++) + ht216->bg_latch[i] = svga->vram[dword_remap(svga, latch_addr + i)]; + return svga->vram[dword_remap(svga, addr) & svga->vram_mask]; } else if (svga->chain4) { - readplane = addr & 3; - addr = ((addr & 0xfffc) << 2) | ((addr & 0x30000) >> 14) | (addr & ~0x3ffff); - } else if (svga->chain2_read && (svga->crtc[0x17] != 0xeb)) { - readplane = (readplane & 2) | (addr & 1); - addr &= ~1; - addr <<= 2; + readplane = addr & 3; + addr = ((addr & 0xfffc) << 2) | ((addr & 0x30000) >> 14) | (addr & ~0x3ffff); + } else if (svga->chain2_read && (svga->crtc[0x17] != 0xeb)) { + readplane = (readplane & 2) | (addr & 1); + addr &= ~1; + addr <<= 2; } else - addr <<= 2; + addr <<= 2; addr &= svga->decode_mask; if (addr >= svga->vram_max) - return 0xff; + return 0xff; addr &= svga->vram_mask; latch_addr = addr & ~7; if (ht216->ht_regs[0xcd] & HT_REG_CD_ASTODE) { - offset = addr & 7; - for (i = 0; i < 8; i++) - ht216->bg_latch[i] = svga->vram[latch_addr | ((offset + i) & 7)]; + offset = addr & 7; + for (i = 0; i < 8; i++) + ht216->bg_latch[i] = svga->vram[latch_addr | ((offset + i) & 7)]; } else { - for (i = 0; i < 8; i++) - ht216->bg_latch[i] = svga->vram[latch_addr | i]; + for (i = 0; i < 8; i++) + ht216->bg_latch[i] = svga->vram[latch_addr | i]; } or = addr & 4; for (i = 0; i < 4; i++) - svga->latch.b[i] = ht216->bg_latch[i | or]; + svga->latch.b[i] = ht216->bg_latch[i | or ]; if (svga->readmode) { - temp = 0xff; + temp = 0xff; - for (pixel = 0; pixel < 8; pixel++) { - for (plane = 0; plane < (1 << count); plane++) { - if (svga->colournocare & (1 << plane)) { - /* If we care about a plane, and the pixel has a mismatch on it, clear its bit. */ - if (((svga->latch.b[plane] >> pixel) & 1) != ((svga->colourcompare >> plane) & 1)) - temp &= ~(1 << pixel); - } - } - } + for (pixel = 0; pixel < 8; pixel++) { + for (plane = 0; plane < (1 << count); plane++) { + if (svga->colournocare & (1 << plane)) { + /* If we care about a plane, and the pixel has a mismatch on it, clear its bit. */ + if (((svga->latch.b[plane] >> pixel) & 1) != ((svga->colourcompare >> plane) & 1)) + temp &= ~(1 << pixel); + } + } + } - ret = temp; + ret = temp; } else - ret = svga->vram[addr | readplane]; + ret = svga->vram[addr | readplane]; return ret; } - static uint8_t ht216_read(uint32_t addr, void *p) { - ht216_t *ht216 = (ht216_t *)p; - svga_t *svga = &ht216->svga; + ht216_t *ht216 = (ht216_t *) p; + svga_t *svga = &ht216->svga; uint32_t prev_addr = addr; addr &= svga->banked_mask; addr = (addr & 0x7fff) + ht216->read_banks[(addr >> 15) & 1]; if (svga->crtc[0x17] == 0xeb && !(svga->gdcreg[6] & 0xc) && prev_addr >= 0xb0000) - addr += 0x10000; + addr += 0x10000; else if (svga->chain4 && ((ht216->ht_regs[0xfc] & 0x06) == 0x06)) - addr = (addr & 0xfffeffff) | (prev_addr & 0x10000); + addr = (addr & 0xfffeffff) | (prev_addr & 0x10000); return ht216_read_common(ht216, addr); } - static uint8_t ht216_read_linear(uint32_t addr, void *p) { - ht216_t *ht216 = (ht216_t *)p; - svga_t *svga = &ht216->svga; + ht216_t *ht216 = (ht216_t *) p; + svga_t *svga = &ht216->svga; addr -= ht216->linear_base; - if (!svga->chain4) /*Bits 16 and 17 of linear address are unused in planar modes*/ - addr = (addr & 0xffff) | ((addr & 0xc0000) >> 2); + if (!svga->chain4) /*Bits 16 and 17 of linear address are unused in planar modes*/ + addr = (addr & 0xffff) | ((addr & 0xc0000) >> 2); addr += ht216->read_banks[0]; return ht216_read_common(ht216, addr); @@ -1383,20 +1396,21 @@ ht216_read_linear(uint32_t addr, void *p) static uint8_t radius_mca_read(int port, void *priv) { - ht216_t *ht216 = (ht216_t *)priv; - ht216_log("Port %03x MCA read = %02x\n", port, ht216->pos_regs[port & 7]); + ht216_t *ht216 = (ht216_t *) priv; + ht216_log("Port %03x MCA read = %02x\n", port, ht216->pos_regs[port & 7]); return (ht216->pos_regs[port & 7]); } static void radius_mca_write(int port, uint8_t val, void *priv) { - ht216_t *ht216 = (ht216_t *)priv; + ht216_t *ht216 = (ht216_t *) priv; /* MCA does not write registers below 0x0100. */ - if (port < 0x0102) return; + if (port < 0x0102) + return; - ht216_log("Port %03x MCA write = %02x, setup mode = %02x\n", port, val, ht216->ht_regs[0xfc] & 0x80); + ht216_log("Port %03x MCA write = %02x, setup mode = %02x\n", port, val, ht216->ht_regs[0xfc] & 0x80); /* Save the MCA register value. */ ht216->pos_regs[port & 7] = val; @@ -1405,112 +1419,113 @@ radius_mca_write(int port, uint8_t val, void *priv) static uint8_t radius_mca_feedb(void *priv) { - return 1; + return 1; } void -*ht216_init(const device_t *info, uint32_t mem_size, int has_rom) + * + ht216_init(const device_t *info, uint32_t mem_size, int has_rom) { ht216_t *ht216 = malloc(sizeof(ht216_t)); - svga_t *svga; + svga_t *svga; memset(ht216, 0, sizeof(ht216_t)); svga = &ht216->svga; if (info->flags & DEVICE_VLB) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_v7vga_vlb); + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_v7vga_vlb); else if (info->flags & DEVICE_MCA) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_v7vga_mca); + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_v7vga_mca); else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_v7vga_isa); + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_v7vga_isa); svga_init(info, svga, ht216, mem_size, - ht216_recalctimings, - ht216_in, ht216_out, - ht216_hwcursor_draw, - NULL); + ht216_recalctimings, + ht216_in, ht216_out, + ht216_hwcursor_draw, + NULL); switch (has_rom) { - case 1: - rom_init(&ht216->bios_rom, BIOS_G2_GC205_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - break; - case 2: - rom_init(&ht216->bios_rom, BIOS_VIDEO7_VGA_1024I_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - break; - case 3: - ht216->monitor_type = device_get_config_int("monitor_type"); - rom_init(&ht216->bios_rom, BIOS_HT216_32_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - /* Patch the BIOS for monitor type. */ - if (ht216->monitor_type & 0x10) { - /* Color */ - ht216->bios_rom.rom[0x0526] = 0x0c; - ht216->bios_rom.rom[0x0528] = 0xeb; - ht216->bios_rom.rom[0x7fff] += 0x26; - } else { - /* Mono */ - ht216->bios_rom.rom[0x0526] = 0x24; - ht216->bios_rom.rom[0x0527] = 0xef; - ht216->bios_rom.rom[0x0528] = ht216->bios_rom.rom[0x0529] = 0x90; - ht216->bios_rom.rom[0x7fff] += 0xfe; - } - /* Patch bios for interlaced/non-interlaced. */ - if (ht216->monitor_type & 0x08) { - /* Non-Interlaced */ - ht216->bios_rom.rom[0x170b] = 0x0c; - ht216->bios_rom.rom[0x170d] = ht216->bios_rom.rom[0x170e] = 0x90; - ht216->bios_rom.rom[0x7fff] += 0xf4; - } else { - /* Interlaced */ - ht216->bios_rom.rom[0x170b] = 0x24; - ht216->bios_rom.rom[0x170c] = 0xf7; - ht216->bios_rom.rom[0x170d] = 0xeb; - ht216->bios_rom.rom[0x7fff] += 0x1e; - } - break; - case 4: - if ((info->local == 0x7152) && (info->flags & DEVICE_ISA)) - ht216->extensions = device_get_config_int("extensions"); - else if ((info->local == 0x7152) && (info->flags & DEVICE_MCA)) { - ht216->pos_regs[0] = 0xb7; - ht216->pos_regs[1] = 0x80; - mca_add(radius_mca_read, radius_mca_write, radius_mca_feedb, NULL, ht216); - } - rom_init(&ht216->bios_rom, BIOS_RADIUS_SVGA_MULTIVIEW_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - break; + case 1: + rom_init(&ht216->bios_rom, BIOS_G2_GC205_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + break; + case 2: + rom_init(&ht216->bios_rom, BIOS_VIDEO7_VGA_1024I_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + break; + case 3: + ht216->monitor_type = device_get_config_int("monitor_type"); + rom_init(&ht216->bios_rom, BIOS_HT216_32_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + /* Patch the BIOS for monitor type. */ + if (ht216->monitor_type & 0x10) { + /* Color */ + ht216->bios_rom.rom[0x0526] = 0x0c; + ht216->bios_rom.rom[0x0528] = 0xeb; + ht216->bios_rom.rom[0x7fff] += 0x26; + } else { + /* Mono */ + ht216->bios_rom.rom[0x0526] = 0x24; + ht216->bios_rom.rom[0x0527] = 0xef; + ht216->bios_rom.rom[0x0528] = ht216->bios_rom.rom[0x0529] = 0x90; + ht216->bios_rom.rom[0x7fff] += 0xfe; + } + /* Patch bios for interlaced/non-interlaced. */ + if (ht216->monitor_type & 0x08) { + /* Non-Interlaced */ + ht216->bios_rom.rom[0x170b] = 0x0c; + ht216->bios_rom.rom[0x170d] = ht216->bios_rom.rom[0x170e] = 0x90; + ht216->bios_rom.rom[0x7fff] += 0xf4; + } else { + /* Interlaced */ + ht216->bios_rom.rom[0x170b] = 0x24; + ht216->bios_rom.rom[0x170c] = 0xf7; + ht216->bios_rom.rom[0x170d] = 0xeb; + ht216->bios_rom.rom[0x7fff] += 0x1e; + } + break; + case 4: + if ((info->local == 0x7152) && (info->flags & DEVICE_ISA)) + ht216->extensions = device_get_config_int("extensions"); + else if ((info->local == 0x7152) && (info->flags & DEVICE_MCA)) { + ht216->pos_regs[0] = 0xb7; + ht216->pos_regs[1] = 0x80; + mca_add(radius_mca_read, radius_mca_write, radius_mca_feedb, NULL, ht216); + } + rom_init(&ht216->bios_rom, BIOS_RADIUS_SVGA_MULTIVIEW_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + break; } svga->hwcursor.cur_ysize = 32; - ht216->vram_mask = mem_size - 1; - svga->decode_mask = mem_size - 1; + ht216->vram_mask = mem_size - 1; + svga->decode_mask = mem_size - 1; if (has_rom == 4) - svga->ramdac = device_add(&sc11484_nors2_ramdac_device); + svga->ramdac = device_add(&sc11484_nors2_ramdac_device); if ((info->flags & DEVICE_VLB) || (info->flags & DEVICE_MCA)) { - mem_mapping_set_handler(&svga->mapping, ht216_read, NULL, NULL, ht216_write, ht216_writew, ht216_writel); - mem_mapping_add(&ht216->linear_mapping, 0, 0, ht216_read_linear, NULL, NULL, ht216_write_linear, ht216_writew_linear, ht216_writel_linear, NULL, MEM_MAPPING_EXTERNAL, svga); + mem_mapping_set_handler(&svga->mapping, ht216_read, NULL, NULL, ht216_write, ht216_writew, ht216_writel); + mem_mapping_add(&ht216->linear_mapping, 0, 0, ht216_read_linear, NULL, NULL, ht216_write_linear, ht216_writew_linear, ht216_writel_linear, NULL, MEM_MAPPING_EXTERNAL, svga); } else { - mem_mapping_set_handler(&svga->mapping, ht216_read, NULL, NULL, ht216_write, ht216_writew, NULL); - mem_mapping_add(&ht216->linear_mapping, 0, 0, ht216_read_linear, NULL, NULL, ht216_write_linear, ht216_writew_linear, NULL, NULL, MEM_MAPPING_EXTERNAL, svga); + mem_mapping_set_handler(&svga->mapping, ht216_read, NULL, NULL, ht216_write, ht216_writew, NULL); + mem_mapping_add(&ht216->linear_mapping, 0, 0, ht216_read_linear, NULL, NULL, ht216_write_linear, ht216_writew_linear, NULL, NULL, MEM_MAPPING_EXTERNAL, svga); } mem_mapping_set_p(&svga->mapping, ht216); mem_mapping_disable(&ht216->linear_mapping); - ht216->id = info->local; + ht216->id = info->local; ht216->isabus = (info->flags & DEVICE_ISA); - ht216->mca = (info->flags & DEVICE_MCA); + ht216->mca = (info->flags & DEVICE_MCA); io_sethandler(0x03c0, 0x0020, ht216_in, NULL, NULL, ht216_out, NULL, NULL, ht216); io_sethandler(0x46e8, 0x0001, ht216_in, NULL, NULL, ht216_out, NULL, NULL, ht216); - svga->bpp = 8; + svga->bpp = 8; svga->miscout = 1; if (ht216->id == 0x7861) - ht216->ht_regs[0xb4] = 0x08; /*32-bit DRAM bus*/ + ht216->ht_regs[0xb4] = 0x08; /*32-bit DRAM bus*/ if (ht216->id == 0x7152) - ht216->reg_3cb = 0x20; + ht216->reg_3cb = 0x20; /* Initialize the cursor pointer towards the end of its segment, needed for ht256sf.drv to work correctly when Windows 3.1 is started after boot. */ @@ -1521,7 +1536,6 @@ void return ht216; } - static void * g2_gc205_init(const device_t *info) { @@ -1530,7 +1544,6 @@ g2_gc205_init(const device_t *info) return ht216; } - static void * v7_vga_1024i_init(const device_t *info) { @@ -1539,7 +1552,6 @@ v7_vga_1024i_init(const device_t *info) return ht216; } - static void * ht216_pb410a_init(const device_t *info) { @@ -1548,7 +1560,6 @@ ht216_pb410a_init(const device_t *info) return ht216; } - static void * ht216_standalone_init(const device_t *info) { @@ -1565,21 +1576,18 @@ radius_svga_multiview_init(const device_t *info) return ht216; } - static int g2_gc205_available(void) { return rom_present(BIOS_G2_GC205_PATH); } - static int v7_vga_1024i_available(void) { return rom_present(BIOS_VIDEO7_VGA_1024I_PATH); } - static int ht216_standalone_available(void) { @@ -1592,58 +1600,44 @@ radius_svga_multiview_available(void) return rom_present(BIOS_RADIUS_SVGA_MULTIVIEW_PATH); } - void ht216_close(void *p) { - ht216_t *ht216 = (ht216_t *)p; + ht216_t *ht216 = (ht216_t *) p; svga_close(&ht216->svga); free(ht216); } - void ht216_speed_changed(void *p) { - ht216_t *ht216 = (ht216_t *)p; + ht216_t *ht216 = (ht216_t *) p; svga_recalctimings(&ht216->svga); } - void ht216_force_redraw(void *p) { - ht216_t *ht216 = (ht216_t *)p; + ht216_t *ht216 = (ht216_t *) p; ht216->svga.fullchange = changeframecount; } static const device_config_t v7_vga_1024i_config[] = { - { - .name = "memory", - .description = "Memory size", - .type = CONFIG_SELECTION, - .default_int = 512, - .selection = { - { - .description = "256 kB", - .value = 256 - }, - { - .description = "512 kB", - .value = 512 - }, - { - .description = "" - } - } - }, - { - .type = CONFIG_END - } + {.name = "memory", + .description = "Memory size", + .type = CONFIG_SELECTION, + .default_int = 512, + .selection = { + { .description = "256 kB", + .value = 256 }, + { .description = "512 kB", + .value = 512 }, + { .description = "" } } }, + { .type = CONFIG_END} }; // clang-format off @@ -1707,85 +1701,85 @@ static const device_config_t radius_svga_multiview_config[] = { // clang-format on const device_t g2_gc205_device = { - .name = "G2 GC205", + .name = "G2 GC205", .internal_name = "g2_gc205", - .flags = DEVICE_ISA, - .local = 0x7070, - .init = g2_gc205_init, - .close = ht216_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0x7070, + .init = g2_gc205_init, + .close = ht216_close, + .reset = NULL, { .available = g2_gc205_available }, .speed_changed = ht216_speed_changed, - .force_redraw = ht216_force_redraw, - .config = NULL + .force_redraw = ht216_force_redraw, + .config = NULL }; const device_t v7_vga_1024i_device = { - .name = "Video 7 VGA 1024i (HT208)", + .name = "Video 7 VGA 1024i (HT208)", .internal_name = "v7_vga_1024i", - .flags = DEVICE_ISA, - .local = 0x7140, - .init = v7_vga_1024i_init, - .close = ht216_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0x7140, + .init = v7_vga_1024i_init, + .close = ht216_close, + .reset = NULL, { .available = v7_vga_1024i_available }, .speed_changed = ht216_speed_changed, - .force_redraw = ht216_force_redraw, - .config = v7_vga_1024i_config + .force_redraw = ht216_force_redraw, + .config = v7_vga_1024i_config }; const device_t ht216_32_pb410a_device = { - .name = "Headland HT216-32 (Packard Bell PB410A)", + .name = "Headland HT216-32 (Packard Bell PB410A)", .internal_name = "ht216_32_pb410a", - .flags = DEVICE_VLB, - .local = 0x7861, /*HT216-32*/ - .init = ht216_pb410a_init, - .close = ht216_close, - .reset = NULL, + .flags = DEVICE_VLB, + .local = 0x7861, /*HT216-32*/ + .init = ht216_pb410a_init, + .close = ht216_close, + .reset = NULL, { .available = NULL }, .speed_changed = ht216_speed_changed, - .force_redraw = ht216_force_redraw, - .config = NULL + .force_redraw = ht216_force_redraw, + .config = NULL }; const device_t ht216_32_standalone_device = { - .name = "Headland HT216-32", + .name = "Headland HT216-32", .internal_name = "ht216_32", - .flags = DEVICE_VLB, - .local = 0x7861, /*HT216-32*/ - .init = ht216_standalone_init, - .close = ht216_close, - .reset = NULL, + .flags = DEVICE_VLB, + .local = 0x7861, /*HT216-32*/ + .init = ht216_standalone_init, + .close = ht216_close, + .reset = NULL, { .available = ht216_standalone_available }, .speed_changed = ht216_speed_changed, - .force_redraw = ht216_force_redraw, - .config = ht216_32_standalone_config + .force_redraw = ht216_force_redraw, + .config = ht216_32_standalone_config }; const device_t radius_svga_multiview_isa_device = { - .name = "Radius SVGA Multiview ISA (HT209)", + .name = "Radius SVGA Multiview ISA (HT209)", .internal_name = "radius_isa", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 0x7152, /*HT209*/ - .init = radius_svga_multiview_init, - .close = ht216_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 0x7152, /*HT209*/ + .init = radius_svga_multiview_init, + .close = ht216_close, + .reset = NULL, { .available = radius_svga_multiview_available }, .speed_changed = ht216_speed_changed, - .force_redraw = ht216_force_redraw, - .config = radius_svga_multiview_config + .force_redraw = ht216_force_redraw, + .config = radius_svga_multiview_config }; const device_t radius_svga_multiview_mca_device = { - .name = "Radius SVGA Multiview MCA (HT209)", + .name = "Radius SVGA Multiview MCA (HT209)", .internal_name = "radius_mc", - .flags = DEVICE_MCA, - .local = 0x7152, /*HT209*/ - .init = radius_svga_multiview_init, - .close = ht216_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = 0x7152, /*HT209*/ + .init = radius_svga_multiview_init, + .close = ht216_close, + .reset = NULL, { .available = radius_svga_multiview_available }, .speed_changed = ht216_speed_changed, - .force_redraw = ht216_force_redraw, - .config = NULL + .force_redraw = ht216_force_redraw, + .config = NULL }; diff --git a/src/video/vid_ibm_rgb528_ramdac.c b/src/video/vid_ibm_rgb528_ramdac.c index f119e722e..2f050e7c7 100644 --- a/src/video/vid_ibm_rgb528_ramdac.c +++ b/src/video/vid_ibm_rgb528_ramdac.c @@ -26,504 +26,497 @@ #include <86box/video.h> #include <86box/vid_svga.h> - typedef union { - uint8_t pixel; - struct { - uint8_t b :2, g :3, r :2; - }; + uint8_t pixel; + struct { + uint8_t b : 2, g : 3, r : 2; + }; } ibm_rgb528_pixel8_t; typedef union { - uint16_t pixel; - struct { - uint16_t b_ :5, g_ :6, r_ :5; - }; - struct { - uint16_t b :5, g :5, r :5, c :1; - }; + uint16_t pixel; + struct { + uint16_t b_ : 5, g_ : 6, r_ : 5; + }; + struct { + uint16_t b : 5, g : 5, r : 5, c : 1; + }; } ibm_rgb528_pixel16_t; typedef union { - uint32_t pixel; - struct { - uint8_t b, g, r, a; - }; + uint32_t pixel; + struct { + uint8_t b, g, r, a; + }; } ibm_rgb528_pixel32_t; typedef struct { - PALETTE extpal; - uint32_t extpallook[256]; - uint8_t indexed_data[2048]; - uint8_t cursor32_data[256]; - uint8_t cursor64_data[1024]; - uint8_t palettes[3][256]; - ibm_rgb528_pixel32_t extra_pal[4]; - int16_t hwc_y, hwc_x; - uint16_t index, smlc_part; - uint8_t cmd_r0; - uint8_t cmd_r1; - uint8_t cmd_r2; - uint8_t cmd_r3; - uint8_t cmd_r4; - uint8_t status, indx_cntl; - uint8_t cursor_array, - cursor_hotspot_x, cursor_hotspot_y; + PALETTE extpal; + uint32_t extpallook[256]; + uint8_t indexed_data[2048]; + uint8_t cursor32_data[256]; + uint8_t cursor64_data[1024]; + uint8_t palettes[3][256]; + ibm_rgb528_pixel32_t extra_pal[4]; + int16_t hwc_y, hwc_x; + uint16_t index, smlc_part; + uint8_t cmd_r0; + uint8_t cmd_r1; + uint8_t cmd_r2; + uint8_t cmd_r3; + uint8_t cmd_r4; + uint8_t status, indx_cntl; + uint8_t cursor_array, + cursor_hotspot_x, cursor_hotspot_y; } ibm_rgb528_ramdac_t; - void ibm_rgb528_render_4bpp(svga_t *svga) { - int x; - uint32_t *p; + int x; + uint32_t *p; ibm_rgb528_pixel32_t dat_out; - uint8_t dat; - uint32_t dat32 = 0x00000000; - uint64_t dat64 = 0x0000000000000000ULL; - uint64_t dat642 = 0x0000000000000000ULL; - ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) svga->ramdac; - uint8_t b8_dcol = (ramdac->indexed_data[0x0c] & 0xc0) >> 6; - uint8_t partition = (ramdac->indexed_data[0x07] & 0x0f) << 4; - uint8_t swap_word = ramdac->indexed_data[0x72] & 0x10; - uint8_t swap_nib = ramdac->indexed_data[0x72] & 0x21; - uint8_t vram_size = ramdac->indexed_data[0x70] & 0x03; + uint8_t dat; + uint32_t dat32 = 0x00000000; + uint64_t dat64 = 0x0000000000000000ULL; + uint64_t dat642 = 0x0000000000000000ULL; + ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) svga->ramdac; + uint8_t b8_dcol = (ramdac->indexed_data[0x0c] & 0xc0) >> 6; + uint8_t partition = (ramdac->indexed_data[0x07] & 0x0f) << 4; + uint8_t swap_word = ramdac->indexed_data[0x72] & 0x10; + uint8_t swap_nib = ramdac->indexed_data[0x72] & 0x21; + uint8_t vram_size = ramdac->indexed_data[0x70] & 0x03; if ((svga->displine + svga->y_add) < 0) - return; + return; - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->changedvram[(svga->ma >> 12) + 2] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->changedvram[(svga->ma >> 12) + 2] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (vram_size == 3) { - if (!(x & 31)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]); - if (swap_word) { - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL); - } - } - if (swap_nib) - dat = (((x & 16) ? dat642 : dat64) >> ((x & 15) << 2)) & 0xf; - else - dat = (((x & 16) ? dat642 : dat64) >> (((x & 15) << 2) ^ 4)) & 0xf; - } else if (vram_size == 1) { - if (!(x & 15)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - if (swap_word) - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - } - if (swap_nib) - dat = (dat64 >> ((x & 15) << 2)) & 0xf; - else - dat = (dat64 >> (((x & 15) << 2) ^ 4)) & 0xf; - } else { - if (!(x & 7)) - dat32 = *(uint32_t *)(&svga->vram[svga->ma]); - if (swap_nib) - dat = (dat32 >> ((x & 7) << 2)) & 0xf; - else - dat = (dat32 >> (((x & 7) << 2) ^ 4)) & 0xf; - } - if (b8_dcol == 0x00) { - dat_out.a = 0x00; - dat_out.r = ramdac->palettes[0][partition | dat]; - dat_out.g = ramdac->palettes[1][partition | dat]; - dat_out.b = ramdac->palettes[2][partition | dat]; - } else - dat_out.pixel = video_8togs[dat]; - if (svga->lowres) { - p[x << 1] = p[(x << 1) + 1] = dat_out.pixel & 0xffffff; - } else - p[x] = dat_out.pixel & 0xffffff; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + if (vram_size == 3) { + if (!(x & 31)) { + dat64 = *(uint64_t *) (&svga->vram[svga->ma]); + dat642 = *(uint64_t *) (&svga->vram[svga->ma + 8]); + if (swap_word) { + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL); + } + } + if (swap_nib) + dat = (((x & 16) ? dat642 : dat64) >> ((x & 15) << 2)) & 0xf; + else + dat = (((x & 16) ? dat642 : dat64) >> (((x & 15) << 2) ^ 4)) & 0xf; + } else if (vram_size == 1) { + if (!(x & 15)) { + dat64 = *(uint64_t *) (&svga->vram[svga->ma]); + if (swap_word) + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + } + if (swap_nib) + dat = (dat64 >> ((x & 15) << 2)) & 0xf; + else + dat = (dat64 >> (((x & 15) << 2) ^ 4)) & 0xf; + } else { + if (!(x & 7)) + dat32 = *(uint32_t *) (&svga->vram[svga->ma]); + if (swap_nib) + dat = (dat32 >> ((x & 7) << 2)) & 0xf; + else + dat = (dat32 >> (((x & 7) << 2) ^ 4)) & 0xf; + } + if (b8_dcol == 0x00) { + dat_out.a = 0x00; + dat_out.r = ramdac->palettes[0][partition | dat]; + dat_out.g = ramdac->palettes[1][partition | dat]; + dat_out.b = ramdac->palettes[2][partition | dat]; + } else + dat_out.pixel = video_8togs[dat]; + if (svga->lowres) { + p[x << 1] = p[(x << 1) + 1] = dat_out.pixel & 0xffffff; + } else + p[x] = dat_out.pixel & 0xffffff; - if ((vram_size == 3) && ((x & 31) == 31)) - svga->ma = (svga->ma + 16) & svga->vram_display_mask; - if ((vram_size == 1) && ((x & 15) == 15)) - svga->ma = (svga->ma + 8) & svga->vram_display_mask; - else if ((!vram_size) && ((x & 7) == 7)) - svga->ma = (svga->ma + 4) & svga->vram_display_mask; - } + if ((vram_size == 3) && ((x & 31) == 31)) + svga->ma = (svga->ma + 16) & svga->vram_display_mask; + if ((vram_size == 1) && ((x & 15) == 15)) + svga->ma = (svga->ma + 8) & svga->vram_display_mask; + else if ((!vram_size) && ((x & 7) == 7)) + svga->ma = (svga->ma + 4) & svga->vram_display_mask; + } } } - void ibm_rgb528_render_8bpp(svga_t *svga) { - int x; - uint32_t *p; + int x; + uint32_t *p; ibm_rgb528_pixel32_t dat_out; - uint8_t dat; - uint32_t dat32 = 0x00000000; - uint64_t dat64 = 0x0000000000000000ULL; - uint64_t dat642 = 0x0000000000000000ULL; - ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) svga->ramdac; - uint8_t b8_dcol = (ramdac->indexed_data[0x0c] & 0xc0) >> 6; - uint8_t swap_word = ramdac->indexed_data[0x72] & 0x10; - uint8_t vram_size = ramdac->indexed_data[0x70] & 0x03; + uint8_t dat; + uint32_t dat32 = 0x00000000; + uint64_t dat64 = 0x0000000000000000ULL; + uint64_t dat642 = 0x0000000000000000ULL; + ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) svga->ramdac; + uint8_t b8_dcol = (ramdac->indexed_data[0x0c] & 0xc0) >> 6; + uint8_t swap_word = ramdac->indexed_data[0x72] & 0x10; + uint8_t vram_size = ramdac->indexed_data[0x70] & 0x03; if ((svga->displine + svga->y_add) < 0) - return; + return; - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->changedvram[(svga->ma >> 12) + 2] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->changedvram[(svga->ma >> 12) + 2] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (vram_size == 3) { - if (!(x & 15)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]); - if (swap_word) { - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL); - } - } - dat = (((x & 8) ? dat642 : dat64) >> ((x & 7) << 3)) & 0xff; - } else if (vram_size == 1) { - if (!(x & 7)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - if (swap_word) - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - } - dat = (dat64 >> ((x & 7) << 3)) & 0xff; - } else { - if (!(x & 3)) - dat32 = *(uint32_t *)(&svga->vram[svga->ma]); - dat = (dat32 >> ((x & 3) << 3)) & 0xff; - } - if (b8_dcol == 0x00) { - dat_out.a = 0x00; - dat_out.r = ramdac->palettes[0][dat]; - dat_out.g = ramdac->palettes[1][dat]; - dat_out.b = ramdac->palettes[2][dat]; - } else - dat_out.pixel = video_8togs[dat]; - if (svga->lowres) { - p[x << 1] = p[(x << 1) + 1] = dat_out.pixel & 0xffffff; - } else - p[x] = dat_out.pixel & 0xffffff; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + if (vram_size == 3) { + if (!(x & 15)) { + dat64 = *(uint64_t *) (&svga->vram[svga->ma]); + dat642 = *(uint64_t *) (&svga->vram[svga->ma + 8]); + if (swap_word) { + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL); + } + } + dat = (((x & 8) ? dat642 : dat64) >> ((x & 7) << 3)) & 0xff; + } else if (vram_size == 1) { + if (!(x & 7)) { + dat64 = *(uint64_t *) (&svga->vram[svga->ma]); + if (swap_word) + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + } + dat = (dat64 >> ((x & 7) << 3)) & 0xff; + } else { + if (!(x & 3)) + dat32 = *(uint32_t *) (&svga->vram[svga->ma]); + dat = (dat32 >> ((x & 3) << 3)) & 0xff; + } + if (b8_dcol == 0x00) { + dat_out.a = 0x00; + dat_out.r = ramdac->palettes[0][dat]; + dat_out.g = ramdac->palettes[1][dat]; + dat_out.b = ramdac->palettes[2][dat]; + } else + dat_out.pixel = video_8togs[dat]; + if (svga->lowres) { + p[x << 1] = p[(x << 1) + 1] = dat_out.pixel & 0xffffff; + } else + p[x] = dat_out.pixel & 0xffffff; - if ((vram_size == 3) && ((x & 15) == 15)) - svga->ma = (svga->ma + 16) & svga->vram_display_mask; - else if ((vram_size == 1) && ((x & 7) == 7)) - svga->ma = (svga->ma + 8) & svga->vram_display_mask; - else if ((!vram_size) && ((x & 3) == 3)) - svga->ma = (svga->ma + 4) & svga->vram_display_mask; - } + if ((vram_size == 3) && ((x & 15) == 15)) + svga->ma = (svga->ma + 16) & svga->vram_display_mask; + else if ((vram_size == 1) && ((x & 7) == 7)) + svga->ma = (svga->ma + 8) & svga->vram_display_mask; + else if ((!vram_size) && ((x & 3) == 3)) + svga->ma = (svga->ma + 4) & svga->vram_display_mask; + } } } - void ibm_rgb528_render_15_16bpp(svga_t *svga) { - int x; - uint32_t *p; + int x; + uint32_t *p; ibm_rgb528_pixel16_t *dat_ex; - ibm_rgb528_pixel32_t dat_out; - uint16_t dat; - uint32_t dat32 = 0x00000000; - uint64_t dat64 = 0x0000000000000000ULL; - uint64_t dat642 = 0x0000000000000000ULL; - ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) svga->ramdac; - uint8_t b16_dcol = (ramdac->indexed_data[0x0c] & 0xc0) >> 6; - uint8_t by16_pol = ramdac->indexed_data[0x0c] & 0x20; - uint8_t b555_565 = ramdac->indexed_data[0x0c] & 0x02; - uint8_t bspr_cnt = ramdac->indexed_data[0x0c] & 0x01; - uint8_t partition = (ramdac->indexed_data[0x07] & 0x0e) << 4; - uint8_t b6bit_lin = ramdac->indexed_data[0x07] & 0x80; - uint8_t swaprb = ramdac->indexed_data[0x72] & 0x80; - uint8_t swap_word = ramdac->indexed_data[0x72] & 0x10; - uint8_t vram_size = ramdac->indexed_data[0x70] & 0x01, temp; + ibm_rgb528_pixel32_t dat_out; + uint16_t dat; + uint32_t dat32 = 0x00000000; + uint64_t dat64 = 0x0000000000000000ULL; + uint64_t dat642 = 0x0000000000000000ULL; + ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) svga->ramdac; + uint8_t b16_dcol = (ramdac->indexed_data[0x0c] & 0xc0) >> 6; + uint8_t by16_pol = ramdac->indexed_data[0x0c] & 0x20; + uint8_t b555_565 = ramdac->indexed_data[0x0c] & 0x02; + uint8_t bspr_cnt = ramdac->indexed_data[0x0c] & 0x01; + uint8_t partition = (ramdac->indexed_data[0x07] & 0x0e) << 4; + uint8_t b6bit_lin = ramdac->indexed_data[0x07] & 0x80; + uint8_t swaprb = ramdac->indexed_data[0x72] & 0x80; + uint8_t swap_word = ramdac->indexed_data[0x72] & 0x10; + uint8_t vram_size = ramdac->indexed_data[0x70] & 0x01, temp; if ((svga->displine + svga->y_add) < 0) - return; + return; if (b555_565 && (b16_dcol != 0x01)) - partition &= 0xc0; + partition &= 0xc0; - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->changedvram[(svga->ma >> 12) + 2] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->changedvram[(svga->ma >> 12) + 2] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (vram_size == 2) { - if (!(x & 7)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]); - if (swap_word) { - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - dat642 = (dat64 << 32ULL) | (dat642 >> 32ULL); - } - } - dat = (((x & 4) ? dat642 : dat64) >> ((x & 3) << 4)) & 0xffff; - } else if (vram_size == 1) { - if (!(x & 3)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - if (swap_word) - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - } - dat = (dat64 >> ((x & 3) << 4)) & 0xffff; - } else { - if (!(x & 1)) - dat32 = *(uint32_t *)(&svga->vram[svga->ma]); - dat = (dat32 >> ((x & 1) << 4)) & 0xffff; - } - dat_ex = (ibm_rgb528_pixel16_t *) &dat; - if (b555_565 && (b16_dcol != 0x01)) { - if (swaprb) { - temp = dat_ex->r_; - dat_ex->r_ = dat_ex->b_; - dat_ex->b_ = temp; - } - if (b16_dcol == 0x00) { - dat_out.a = 0x00; - if (bspr_cnt) { - dat_out.r = ramdac->palettes[0][partition | dat_ex->r_]; - dat_out.g = ramdac->palettes[1][partition | dat_ex->g_]; - dat_out.b = ramdac->palettes[2][partition | dat_ex->b_]; - } else { - dat_out.r = ramdac->palettes[0][dat_ex->r_ << 3]; - dat_out.g = ramdac->palettes[1][dat_ex->g_ << 2]; - dat_out.b = ramdac->palettes[2][dat_ex->b_ << 3]; - } - if ((svga->ramdac_type != RAMDAC_8BIT) && !b6bit_lin) { - dat_out.r |= ((dat_out.r & 0xc0) >> 6); - dat_out.g |= ((dat_out.g & 0xc0) >> 6); - dat_out.b |= ((dat_out.b & 0xc0) >> 6); - } - } else - dat_out.pixel = video_16to32[dat_ex->pixel]; - } else { - if (swaprb) { - temp = dat_ex->r; - dat_ex->r = dat_ex->b; - dat_ex->b = temp; - } - if (by16_pol) - dat ^= 0x8000; - if ((b16_dcol == 0x00) || ((b16_dcol == 0x01) && !(dat & 0x8000))) { - dat_out.a = 0x00; - if (bspr_cnt) { - dat_out.r = ramdac->palettes[0][partition | dat_ex->r]; - dat_out.g = ramdac->palettes[1][partition | dat_ex->g]; - dat_out.b = ramdac->palettes[2][partition | dat_ex->b]; - } else { - dat_out.r = ramdac->palettes[0][dat_ex->r << 3]; - dat_out.g = ramdac->palettes[1][dat_ex->g << 3]; - dat_out.b = ramdac->palettes[2][dat_ex->b << 3]; - } - if ((svga->ramdac_type != RAMDAC_8BIT) && !b6bit_lin) { - dat_out.r |= ((dat_out.r & 0xc0) >> 6); - dat_out.g |= ((dat_out.g & 0xc0) >> 6); - dat_out.b |= ((dat_out.b & 0xc0) >> 6); - } - } else - dat_out.pixel = video_15to32[dat_ex->pixel & 0x7fff]; - } - if (svga->lowres) { - p[x << 1] = p[(x << 1) + 1] = dat_out.pixel & 0xffffff; - } else - p[x] = dat_out.pixel & 0xffffff; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + if (vram_size == 2) { + if (!(x & 7)) { + dat64 = *(uint64_t *) (&svga->vram[svga->ma]); + dat642 = *(uint64_t *) (&svga->vram[svga->ma + 8]); + if (swap_word) { + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + dat642 = (dat64 << 32ULL) | (dat642 >> 32ULL); + } + } + dat = (((x & 4) ? dat642 : dat64) >> ((x & 3) << 4)) & 0xffff; + } else if (vram_size == 1) { + if (!(x & 3)) { + dat64 = *(uint64_t *) (&svga->vram[svga->ma]); + if (swap_word) + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + } + dat = (dat64 >> ((x & 3) << 4)) & 0xffff; + } else { + if (!(x & 1)) + dat32 = *(uint32_t *) (&svga->vram[svga->ma]); + dat = (dat32 >> ((x & 1) << 4)) & 0xffff; + } + dat_ex = (ibm_rgb528_pixel16_t *) &dat; + if (b555_565 && (b16_dcol != 0x01)) { + if (swaprb) { + temp = dat_ex->r_; + dat_ex->r_ = dat_ex->b_; + dat_ex->b_ = temp; + } + if (b16_dcol == 0x00) { + dat_out.a = 0x00; + if (bspr_cnt) { + dat_out.r = ramdac->palettes[0][partition | dat_ex->r_]; + dat_out.g = ramdac->palettes[1][partition | dat_ex->g_]; + dat_out.b = ramdac->palettes[2][partition | dat_ex->b_]; + } else { + dat_out.r = ramdac->palettes[0][dat_ex->r_ << 3]; + dat_out.g = ramdac->palettes[1][dat_ex->g_ << 2]; + dat_out.b = ramdac->palettes[2][dat_ex->b_ << 3]; + } + if ((svga->ramdac_type != RAMDAC_8BIT) && !b6bit_lin) { + dat_out.r |= ((dat_out.r & 0xc0) >> 6); + dat_out.g |= ((dat_out.g & 0xc0) >> 6); + dat_out.b |= ((dat_out.b & 0xc0) >> 6); + } + } else + dat_out.pixel = video_16to32[dat_ex->pixel]; + } else { + if (swaprb) { + temp = dat_ex->r; + dat_ex->r = dat_ex->b; + dat_ex->b = temp; + } + if (by16_pol) + dat ^= 0x8000; + if ((b16_dcol == 0x00) || ((b16_dcol == 0x01) && !(dat & 0x8000))) { + dat_out.a = 0x00; + if (bspr_cnt) { + dat_out.r = ramdac->palettes[0][partition | dat_ex->r]; + dat_out.g = ramdac->palettes[1][partition | dat_ex->g]; + dat_out.b = ramdac->palettes[2][partition | dat_ex->b]; + } else { + dat_out.r = ramdac->palettes[0][dat_ex->r << 3]; + dat_out.g = ramdac->palettes[1][dat_ex->g << 3]; + dat_out.b = ramdac->palettes[2][dat_ex->b << 3]; + } + if ((svga->ramdac_type != RAMDAC_8BIT) && !b6bit_lin) { + dat_out.r |= ((dat_out.r & 0xc0) >> 6); + dat_out.g |= ((dat_out.g & 0xc0) >> 6); + dat_out.b |= ((dat_out.b & 0xc0) >> 6); + } + } else + dat_out.pixel = video_15to32[dat_ex->pixel & 0x7fff]; + } + if (svga->lowres) { + p[x << 1] = p[(x << 1) + 1] = dat_out.pixel & 0xffffff; + } else + p[x] = dat_out.pixel & 0xffffff; - if ((vram_size == 3) && ((x & 7) == 7)) - svga->ma = (svga->ma + 16) & svga->vram_display_mask; - else if ((vram_size == 1) && ((x & 3) == 3)) - svga->ma = (svga->ma + 8) & svga->vram_display_mask; - else if (!vram_size && ((x & 1) == 1)) - svga->ma = (svga->ma + 4) & svga->vram_display_mask; - } + if ((vram_size == 3) && ((x & 7) == 7)) + svga->ma = (svga->ma + 16) & svga->vram_display_mask; + else if ((vram_size == 1) && ((x & 3) == 3)) + svga->ma = (svga->ma + 8) & svga->vram_display_mask; + else if (!vram_size && ((x & 1) == 1)) + svga->ma = (svga->ma + 4) & svga->vram_display_mask; + } } } - void ibm_rgb528_render_24bpp(svga_t *svga) { - int x; - uint32_t *p; + int x; + uint32_t *p; ibm_rgb528_pixel32_t *dat_ex; - uint32_t dat; - uint64_t dat64[6]; - uint8_t *dat8 = (uint8_t *) dat64; - ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) svga->ramdac; - uint8_t b24_dcol = ramdac->indexed_data[0x0d] & 0x01; - uint8_t swaprb = ramdac->indexed_data[0x72] & 0x80; - uint8_t swap_word = ramdac->indexed_data[0x72] & 0x10; - uint8_t vram_size = ramdac->indexed_data[0x70] & 0x01; - uint8_t b6bit_lin = ramdac->indexed_data[0x07] & 0x80, temp; + uint32_t dat; + uint64_t dat64[6]; + uint8_t *dat8 = (uint8_t *) dat64; + ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) svga->ramdac; + uint8_t b24_dcol = ramdac->indexed_data[0x0d] & 0x01; + uint8_t swaprb = ramdac->indexed_data[0x72] & 0x80; + uint8_t swap_word = ramdac->indexed_data[0x72] & 0x10; + uint8_t vram_size = ramdac->indexed_data[0x70] & 0x01; + uint8_t b6bit_lin = ramdac->indexed_data[0x07] & 0x80, temp; if ((svga->displine + svga->y_add) < 0) - return; + return; - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->changedvram[(svga->ma >> 12) + 2] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->changedvram[(svga->ma >> 12) + 2] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - dat_ex = (ibm_rgb528_pixel32_t *) &dat; - if (vram_size == 3) { - if ((x & 15) == 0) { - dat64[0] = *(uint64_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - dat64[1] = *(uint64_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); - dat64[2] = *(uint64_t *)(&svga->vram[(svga->ma + 16) & svga->vram_display_mask]); - dat64[3] = *(uint64_t *)(&svga->vram[(svga->ma + 24) & svga->vram_display_mask]); - dat64[4] = *(uint64_t *)(&svga->vram[(svga->ma + 32) & svga->vram_display_mask]); - dat64[5] = *(uint64_t *)(&svga->vram[(svga->ma + 40) & svga->vram_display_mask]); - if (swap_word) { - dat64[0] = (dat64[0] << 32ULL) | (dat64[0] >> 32ULL); - dat64[1] = (dat64[1] << 32ULL) | (dat64[1] >> 32ULL); - dat64[2] = (dat64[2] << 32ULL) | (dat64[2] >> 32ULL); - dat64[3] = (dat64[3] << 32ULL) | (dat64[3] >> 32ULL); - dat64[4] = (dat64[4] << 32ULL) | (dat64[4] >> 32ULL); - dat64[5] = (dat64[5] << 32ULL) | (dat64[5] >> 32ULL); - } - } - dat_ex = (ibm_rgb528_pixel32_t *) &(dat8[((x & 15) * 3)]); - } else if (vram_size == 1) { - if ((x & 7) == 0) { - dat64[0] = *(uint64_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - dat64[1] = *(uint64_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); - dat64[2] = *(uint64_t *)(&svga->vram[(svga->ma + 16) & svga->vram_display_mask]); - if (swap_word) { - dat64[0] = (dat64[0] << 32ULL) | (dat64[0] >> 32ULL); - dat64[1] = (dat64[1] << 32ULL) | (dat64[1] >> 32ULL); - dat64[2] = (dat64[2] << 32ULL) | (dat64[2] >> 32ULL); - } - } - dat_ex = (ibm_rgb528_pixel32_t *) &(dat8[((x & 7) * 3)]); - } else - dat = 0x00000000; - if (swaprb) { - temp = dat_ex->r; - dat_ex->r = dat_ex->b; - dat_ex->b = temp; - } - if (b24_dcol == 0x00) { - dat_ex->a = 0x00; - dat_ex->r = ramdac->palettes[0][dat_ex->r]; - dat_ex->g = ramdac->palettes[1][dat_ex->g]; - dat_ex->g = ramdac->palettes[2][dat_ex->b]; - if ((svga->ramdac_type != RAMDAC_8BIT) && !b6bit_lin) { - dat_ex->r |= ((dat_ex->r & 0xc0) >> 6); - dat_ex->g |= ((dat_ex->g & 0xc0) >> 6); - dat_ex->b |= ((dat_ex->b & 0xc0) >> 6); - } - } - if (svga->lowres) { - p[x << 1] = p[(x << 1) + 1] = dat_ex->pixel & 0xffffff; - } else - p[x] = dat_ex->pixel & 0xffffff; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + dat_ex = (ibm_rgb528_pixel32_t *) &dat; + if (vram_size == 3) { + if ((x & 15) == 0) { + dat64[0] = *(uint64_t *) (&svga->vram[svga->ma & svga->vram_display_mask]); + dat64[1] = *(uint64_t *) (&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); + dat64[2] = *(uint64_t *) (&svga->vram[(svga->ma + 16) & svga->vram_display_mask]); + dat64[3] = *(uint64_t *) (&svga->vram[(svga->ma + 24) & svga->vram_display_mask]); + dat64[4] = *(uint64_t *) (&svga->vram[(svga->ma + 32) & svga->vram_display_mask]); + dat64[5] = *(uint64_t *) (&svga->vram[(svga->ma + 40) & svga->vram_display_mask]); + if (swap_word) { + dat64[0] = (dat64[0] << 32ULL) | (dat64[0] >> 32ULL); + dat64[1] = (dat64[1] << 32ULL) | (dat64[1] >> 32ULL); + dat64[2] = (dat64[2] << 32ULL) | (dat64[2] >> 32ULL); + dat64[3] = (dat64[3] << 32ULL) | (dat64[3] >> 32ULL); + dat64[4] = (dat64[4] << 32ULL) | (dat64[4] >> 32ULL); + dat64[5] = (dat64[5] << 32ULL) | (dat64[5] >> 32ULL); + } + } + dat_ex = (ibm_rgb528_pixel32_t *) &(dat8[((x & 15) * 3)]); + } else if (vram_size == 1) { + if ((x & 7) == 0) { + dat64[0] = *(uint64_t *) (&svga->vram[svga->ma & svga->vram_display_mask]); + dat64[1] = *(uint64_t *) (&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); + dat64[2] = *(uint64_t *) (&svga->vram[(svga->ma + 16) & svga->vram_display_mask]); + if (swap_word) { + dat64[0] = (dat64[0] << 32ULL) | (dat64[0] >> 32ULL); + dat64[1] = (dat64[1] << 32ULL) | (dat64[1] >> 32ULL); + dat64[2] = (dat64[2] << 32ULL) | (dat64[2] >> 32ULL); + } + } + dat_ex = (ibm_rgb528_pixel32_t *) &(dat8[((x & 7) * 3)]); + } else + dat = 0x00000000; + if (swaprb) { + temp = dat_ex->r; + dat_ex->r = dat_ex->b; + dat_ex->b = temp; + } + if (b24_dcol == 0x00) { + dat_ex->a = 0x00; + dat_ex->r = ramdac->palettes[0][dat_ex->r]; + dat_ex->g = ramdac->palettes[1][dat_ex->g]; + dat_ex->g = ramdac->palettes[2][dat_ex->b]; + if ((svga->ramdac_type != RAMDAC_8BIT) && !b6bit_lin) { + dat_ex->r |= ((dat_ex->r & 0xc0) >> 6); + dat_ex->g |= ((dat_ex->g & 0xc0) >> 6); + dat_ex->b |= ((dat_ex->b & 0xc0) >> 6); + } + } + if (svga->lowres) { + p[x << 1] = p[(x << 1) + 1] = dat_ex->pixel & 0xffffff; + } else + p[x] = dat_ex->pixel & 0xffffff; - if ((vram_size == 3) && ((x & 15) == 15)) - svga->ma = (svga->ma + 48) & svga->vram_display_mask; - else if ((vram_size == 1) && ((x & 7) == 7)) - svga->ma = (svga->ma + 24) & svga->vram_display_mask; - } + if ((vram_size == 3) && ((x & 15) == 15)) + svga->ma = (svga->ma + 48) & svga->vram_display_mask; + else if ((vram_size == 1) && ((x & 7) == 7)) + svga->ma = (svga->ma + 24) & svga->vram_display_mask; + } } } - void ibm_rgb528_render_32bpp(svga_t *svga) { - int x; - uint32_t *p; + int x; + uint32_t *p; ibm_rgb528_pixel32_t *dat_ex; - uint32_t dat = 0x00000000; - uint64_t dat64 = 0x0000000000000000ULL; - uint64_t dat642 = 0x0000000000000000ULL; - ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) svga->ramdac; - uint8_t b32_dcol = ramdac->indexed_data[0x0e] & 0x03; - uint8_t by32_pol = ramdac->indexed_data[0x0e] & 0x04; - uint8_t swaprb = ramdac->indexed_data[0x72] & 0x80; - uint8_t swap_word = ramdac->indexed_data[0x72] & 0x10; - uint8_t vram_size = ramdac->indexed_data[0x70] & 0x01; - uint8_t b6bit_lin = ramdac->indexed_data[0x07] & 0x80, temp; + uint32_t dat = 0x00000000; + uint64_t dat64 = 0x0000000000000000ULL; + uint64_t dat642 = 0x0000000000000000ULL; + ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) svga->ramdac; + uint8_t b32_dcol = ramdac->indexed_data[0x0e] & 0x03; + uint8_t by32_pol = ramdac->indexed_data[0x0e] & 0x04; + uint8_t swaprb = ramdac->indexed_data[0x72] & 0x80; + uint8_t swap_word = ramdac->indexed_data[0x72] & 0x10; + uint8_t vram_size = ramdac->indexed_data[0x70] & 0x01; + uint8_t b6bit_lin = ramdac->indexed_data[0x07] & 0x80, temp; if ((svga->displine + svga->y_add) < 0) - return; + return; - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->changedvram[(svga->ma >> 12) + 2] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->changedvram[(svga->ma >> 12) + 2] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - if (vram_size == 3) { - if (!(x & 3)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]); - if (swap_word) { - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL); - } - } - dat = (((x & 2) ? dat642 : dat64) >> ((x & 1ULL) << 5ULL)) & 0xffffffff; - } else if (vram_size == 1) { - if (!(x & 1)) { - dat64 = *(uint64_t *)(&svga->vram[svga->ma]); - if (swap_word) - dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); - } - dat = (dat64 >> ((x & 1ULL) << 5ULL)) & 0xffffffff; - } else - dat = *(uint32_t *)(&svga->vram[svga->ma]); - dat_ex = (ibm_rgb528_pixel32_t *) &dat; - if (swaprb) { - temp = dat_ex->r; - dat_ex->r = dat_ex->b; - dat_ex->b = temp; - } - if ((b32_dcol < 0x03) && (by32_pol)) - dat ^= 0x01000000; - if ((b32_dcol == 0x00) || ((b32_dcol == 0x01) && !(dat & 0x01000000))) { - dat_ex->a = 0x00; - dat_ex->r = ramdac->palettes[0][dat_ex->r]; - dat_ex->g = ramdac->palettes[1][dat_ex->g]; - dat_ex->g = ramdac->palettes[2][dat_ex->b]; - if ((svga->ramdac_type != RAMDAC_8BIT) && !b6bit_lin) { - dat_ex->r |= ((dat_ex->r & 0xc0) >> 6); - dat_ex->g |= ((dat_ex->g & 0xc0) >> 6); - dat_ex->b |= ((dat_ex->b & 0xc0) >> 6); - } - } - if (svga->lowres) { - p[x << 1] = p[(x << 1) + 1] = dat_ex->pixel & 0xffffff; - } else - p[x] = dat_ex->pixel & 0xffffff; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + if (vram_size == 3) { + if (!(x & 3)) { + dat64 = *(uint64_t *) (&svga->vram[svga->ma]); + dat642 = *(uint64_t *) (&svga->vram[svga->ma + 8]); + if (swap_word) { + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL); + } + } + dat = (((x & 2) ? dat642 : dat64) >> ((x & 1ULL) << 5ULL)) & 0xffffffff; + } else if (vram_size == 1) { + if (!(x & 1)) { + dat64 = *(uint64_t *) (&svga->vram[svga->ma]); + if (swap_word) + dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL); + } + dat = (dat64 >> ((x & 1ULL) << 5ULL)) & 0xffffffff; + } else + dat = *(uint32_t *) (&svga->vram[svga->ma]); + dat_ex = (ibm_rgb528_pixel32_t *) &dat; + if (swaprb) { + temp = dat_ex->r; + dat_ex->r = dat_ex->b; + dat_ex->b = temp; + } + if ((b32_dcol < 0x03) && (by32_pol)) + dat ^= 0x01000000; + if ((b32_dcol == 0x00) || ((b32_dcol == 0x01) && !(dat & 0x01000000))) { + dat_ex->a = 0x00; + dat_ex->r = ramdac->palettes[0][dat_ex->r]; + dat_ex->g = ramdac->palettes[1][dat_ex->g]; + dat_ex->g = ramdac->palettes[2][dat_ex->b]; + if ((svga->ramdac_type != RAMDAC_8BIT) && !b6bit_lin) { + dat_ex->r |= ((dat_ex->r & 0xc0) >> 6); + dat_ex->g |= ((dat_ex->g & 0xc0) >> 6); + dat_ex->b |= ((dat_ex->b & 0xc0) >> 6); + } + } + if (svga->lowres) { + p[x << 1] = p[(x << 1) + 1] = dat_ex->pixel & 0xffffff; + } else + p[x] = dat_ex->pixel & 0xffffff; - if ((vram_size == 3) && ((x & 3) == 3)) - svga->ma = (svga->ma + 16) & svga->vram_display_mask; - else if ((vram_size == 1) && ((x & 1) == 1)) - svga->ma = (svga->ma + 8) & svga->vram_display_mask; - else if (!vram_size) - svga->ma = (svga->ma + 4) & svga->vram_display_mask; - } + if ((vram_size == 3) && ((x & 3) == 3)) + svga->ma = (svga->ma + 16) & svga->vram_display_mask; + else if ((vram_size == 1) && ((x & 1) == 1)) + svga->ma = (svga->ma + 8) & svga->vram_display_mask; + else if (!vram_size) + svga->ma = (svga->ma + 4) & svga->vram_display_mask; + } } } - static void ibm_rgb528_set_bpp(ibm_rgb528_ramdac_t *ramdac, svga_t *svga) { @@ -531,264 +524,269 @@ ibm_rgb528_set_bpp(ibm_rgb528_ramdac_t *ramdac, svga_t *svga) uint8_t b555_565 = ramdac->indexed_data[0x0c] & 0x02; if (ramdac->indexed_data[0x071] & 0x01) - switch (ramdac->indexed_data[0x00a] & 0x07) { - case 0x02: - svga->bpp = 4; - break; - case 0x03: - default: - svga->bpp = 8; - break; - case 0x04: - if (b555_565 && (b16_dcol != 0x01)) - svga->bpp = 16; - else - svga->bpp = 15; - break; - case 0x05: - svga->bpp = 24; - break; - case 0x06: - svga->bpp = 32; - break; - } else - svga->bpp = 8; + switch (ramdac->indexed_data[0x00a] & 0x07) { + case 0x02: + svga->bpp = 4; + break; + case 0x03: + default: + svga->bpp = 8; + break; + case 0x04: + if (b555_565 && (b16_dcol != 0x01)) + svga->bpp = 16; + else + svga->bpp = 15; + break; + case 0x05: + svga->bpp = 24; + break; + case 0x06: + svga->bpp = 32; + break; + } + else + svga->bpp = 8; svga_recalctimings(svga); } - void ibm_rgb528_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga) { ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) p; - uint16_t index; - uint8_t rs = (addr & 0x03); - uint16_t da_mask = 0x03ff; - uint8_t updt_cntl = (ramdac->indexed_data[0x30] & 0x08); + uint16_t index; + uint8_t rs = (addr & 0x03); + uint16_t da_mask = 0x03ff; + uint8_t updt_cntl = (ramdac->indexed_data[0x30] & 0x08); rs |= (!!rs2 << 2); switch (rs) { - case 0x00: /* Palette Write Index Register (RS value = 0000) */ - case 0x03: - svga->dac_pos = 0; - svga->dac_status = addr & 0x03; - svga->dac_addr = val; - if (svga->dac_status) - svga->dac_addr = (svga->dac_addr + 1) & da_mask; - break; - case 0x01: /* Palette Data Register (RS value = 0001) */ - index = svga->dac_addr & 255; - if (svga->ramdac_type == RAMDAC_8BIT) - ramdac->palettes[svga->dac_pos][index] = val; - else - ramdac->palettes[svga->dac_pos][index] = (val & 0x3f) << 2; - svga_out(addr, val, svga); - break; - case 0x02: /* Pixel Read Mask Register (RS value = 0010) */ - svga_out(addr, val, svga); - break; - case 0x04: - ramdac->index = (ramdac->index & 0x0700) | val; - if ((ramdac->index >= 0x0100) && (ramdac->index <= 0x04ff)) - ramdac->cursor_array = 1; - break; - case 0x05: - ramdac->index = (ramdac->index & 0x00ff) | ((val & 0x07) << 0x08); - if ((ramdac->index >= 0x0100) && (ramdac->index <= 0x04ff)) - ramdac->cursor_array = 1; - break; - case 0x06: - if ((ramdac->index < 0x0100) || (ramdac->index > 0x04ff) || ramdac->cursor_array) - ramdac->indexed_data[ramdac->index] = val; - switch (ramdac->index) { - case 0x00a: case 0x00c: - ibm_rgb528_set_bpp(ramdac, svga); - break; - case 0x030: - switch (val & 0xc0) { - case 0x00: - ramdac->smlc_part = 0x0100; - break; - case 0x40: - ramdac->smlc_part = 0x0200; - break; - case 0x80: - ramdac->smlc_part = 0x0300; - break; - case 0xc0: - ramdac->smlc_part = 0x0400; - break; - } - svga->dac_hwcursor.addr = ramdac->smlc_part; - svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = (val & 0x04) ? 64 : 32; - svga->dac_hwcursor.ena = ((val & 0x03) != 0x00); - break; - case 0x031: - if (!updt_cntl) - break; - ramdac->hwc_x = (ramdac->hwc_x & 0xff00) | val; - svga->dac_hwcursor.x = ((int) ramdac->hwc_x) - ramdac->cursor_hotspot_x; - break; - case 0x032: - /* Sign-extend the sign bit (7) to the remaining bits (6-4). */ - val &= 0x8f; - if (val & 0x80) - val |= 0x70; - ramdac->indexed_data[ramdac->index] = val; - if (!updt_cntl) - break; - ramdac->hwc_x = (ramdac->hwc_x & 0x00ff) | (val << 8); - svga->dac_hwcursor.x = ((int) ramdac->hwc_x) - ramdac->cursor_hotspot_x; - break; - case 0x033: - if (!updt_cntl) - break; - ramdac->hwc_y = (ramdac->hwc_y & 0xff00) | val; - svga->dac_hwcursor.y = ((int) ramdac->hwc_y) - ramdac->cursor_hotspot_y; - break; - case 0x034: - /* Sign-extend the sign bit (7) to the remaining bits (6-4). */ - val &= 0x8f; - if (val & 0x80) - val |= 0x70; - ramdac->indexed_data[ramdac->index] = val; - if (updt_cntl) { - ramdac->hwc_y = (ramdac->hwc_y & 0x00ff) | (val << 8); - svga->dac_hwcursor.y = ((int) ramdac->hwc_y) - ramdac->cursor_hotspot_y; - } else { - ramdac->hwc_x = ramdac->indexed_data[0x031]; - ramdac->hwc_x |= (ramdac->indexed_data[0x032] << 8); - ramdac->hwc_y = ramdac->indexed_data[0x033]; - ramdac->hwc_y |= (val << 8); - svga->dac_hwcursor.x = ((int) ramdac->hwc_x) - ramdac->cursor_hotspot_x; - svga->dac_hwcursor.y = ((int) ramdac->hwc_y) - ramdac->cursor_hotspot_y; - } - break; - case 0x035: - if (svga->dac_hwcursor.cur_xsize == 64) - ramdac->cursor_hotspot_x = (val & 0x3f); - else - ramdac->cursor_hotspot_x = (val & 0x1f); - svga->dac_hwcursor.x = ((int) ramdac->hwc_x) - ramdac->cursor_hotspot_x; - break; - case 0x036: - if (svga->dac_hwcursor.cur_xsize == 64) - ramdac->cursor_hotspot_y = (val & 0x3f); - else - ramdac->cursor_hotspot_y = (val & 0x1f); - svga->dac_hwcursor.y = ((int) ramdac->hwc_y) - ramdac->cursor_hotspot_y; - break; - case 0x040: case 0x043: case 0x046: - ramdac->extra_pal[(ramdac->index - 0x40) / 3].r = val; - break; - case 0x041: case 0x044: case 0x047: - ramdac->extra_pal[(ramdac->index - 0x41) / 3].g = val; - break; - case 0x042: case 0x045: case 0x048: - ramdac->extra_pal[(ramdac->index - 0x42) / 3].b = val; - break; - case 0x060: - ramdac->extra_pal[3].r = val; - break; - case 0x061: - ramdac->extra_pal[3].g = val; - break; - case 0x062: - ramdac->extra_pal[3].b = val; - break; - case 0x071: - svga->ramdac_type = (val & 0x04) ? RAMDAC_8BIT : RAMDAC_6BIT; - ibm_rgb528_set_bpp(ramdac, svga); - break; - default: - break; - } - if (ramdac->indx_cntl) { - if (ramdac->index == 0x00ff) - ramdac->cursor_array = 0; - ramdac->index = (ramdac->index + 1) & 0x07ff; - } - break; - case 0x07: - ramdac->indx_cntl = val & 0x01; - break; + case 0x00: /* Palette Write Index Register (RS value = 0000) */ + case 0x03: + svga->dac_pos = 0; + svga->dac_status = addr & 0x03; + svga->dac_addr = val; + if (svga->dac_status) + svga->dac_addr = (svga->dac_addr + 1) & da_mask; + break; + case 0x01: /* Palette Data Register (RS value = 0001) */ + index = svga->dac_addr & 255; + if (svga->ramdac_type == RAMDAC_8BIT) + ramdac->palettes[svga->dac_pos][index] = val; + else + ramdac->palettes[svga->dac_pos][index] = (val & 0x3f) << 2; + svga_out(addr, val, svga); + break; + case 0x02: /* Pixel Read Mask Register (RS value = 0010) */ + svga_out(addr, val, svga); + break; + case 0x04: + ramdac->index = (ramdac->index & 0x0700) | val; + if ((ramdac->index >= 0x0100) && (ramdac->index <= 0x04ff)) + ramdac->cursor_array = 1; + break; + case 0x05: + ramdac->index = (ramdac->index & 0x00ff) | ((val & 0x07) << 0x08); + if ((ramdac->index >= 0x0100) && (ramdac->index <= 0x04ff)) + ramdac->cursor_array = 1; + break; + case 0x06: + if ((ramdac->index < 0x0100) || (ramdac->index > 0x04ff) || ramdac->cursor_array) + ramdac->indexed_data[ramdac->index] = val; + switch (ramdac->index) { + case 0x00a: + case 0x00c: + ibm_rgb528_set_bpp(ramdac, svga); + break; + case 0x030: + switch (val & 0xc0) { + case 0x00: + ramdac->smlc_part = 0x0100; + break; + case 0x40: + ramdac->smlc_part = 0x0200; + break; + case 0x80: + ramdac->smlc_part = 0x0300; + break; + case 0xc0: + ramdac->smlc_part = 0x0400; + break; + } + svga->dac_hwcursor.addr = ramdac->smlc_part; + svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = (val & 0x04) ? 64 : 32; + svga->dac_hwcursor.ena = ((val & 0x03) != 0x00); + break; + case 0x031: + if (!updt_cntl) + break; + ramdac->hwc_x = (ramdac->hwc_x & 0xff00) | val; + svga->dac_hwcursor.x = ((int) ramdac->hwc_x) - ramdac->cursor_hotspot_x; + break; + case 0x032: + /* Sign-extend the sign bit (7) to the remaining bits (6-4). */ + val &= 0x8f; + if (val & 0x80) + val |= 0x70; + ramdac->indexed_data[ramdac->index] = val; + if (!updt_cntl) + break; + ramdac->hwc_x = (ramdac->hwc_x & 0x00ff) | (val << 8); + svga->dac_hwcursor.x = ((int) ramdac->hwc_x) - ramdac->cursor_hotspot_x; + break; + case 0x033: + if (!updt_cntl) + break; + ramdac->hwc_y = (ramdac->hwc_y & 0xff00) | val; + svga->dac_hwcursor.y = ((int) ramdac->hwc_y) - ramdac->cursor_hotspot_y; + break; + case 0x034: + /* Sign-extend the sign bit (7) to the remaining bits (6-4). */ + val &= 0x8f; + if (val & 0x80) + val |= 0x70; + ramdac->indexed_data[ramdac->index] = val; + if (updt_cntl) { + ramdac->hwc_y = (ramdac->hwc_y & 0x00ff) | (val << 8); + svga->dac_hwcursor.y = ((int) ramdac->hwc_y) - ramdac->cursor_hotspot_y; + } else { + ramdac->hwc_x = ramdac->indexed_data[0x031]; + ramdac->hwc_x |= (ramdac->indexed_data[0x032] << 8); + ramdac->hwc_y = ramdac->indexed_data[0x033]; + ramdac->hwc_y |= (val << 8); + svga->dac_hwcursor.x = ((int) ramdac->hwc_x) - ramdac->cursor_hotspot_x; + svga->dac_hwcursor.y = ((int) ramdac->hwc_y) - ramdac->cursor_hotspot_y; + } + break; + case 0x035: + if (svga->dac_hwcursor.cur_xsize == 64) + ramdac->cursor_hotspot_x = (val & 0x3f); + else + ramdac->cursor_hotspot_x = (val & 0x1f); + svga->dac_hwcursor.x = ((int) ramdac->hwc_x) - ramdac->cursor_hotspot_x; + break; + case 0x036: + if (svga->dac_hwcursor.cur_xsize == 64) + ramdac->cursor_hotspot_y = (val & 0x3f); + else + ramdac->cursor_hotspot_y = (val & 0x1f); + svga->dac_hwcursor.y = ((int) ramdac->hwc_y) - ramdac->cursor_hotspot_y; + break; + case 0x040: + case 0x043: + case 0x046: + ramdac->extra_pal[(ramdac->index - 0x40) / 3].r = val; + break; + case 0x041: + case 0x044: + case 0x047: + ramdac->extra_pal[(ramdac->index - 0x41) / 3].g = val; + break; + case 0x042: + case 0x045: + case 0x048: + ramdac->extra_pal[(ramdac->index - 0x42) / 3].b = val; + break; + case 0x060: + ramdac->extra_pal[3].r = val; + break; + case 0x061: + ramdac->extra_pal[3].g = val; + break; + case 0x062: + ramdac->extra_pal[3].b = val; + break; + case 0x071: + svga->ramdac_type = (val & 0x04) ? RAMDAC_8BIT : RAMDAC_6BIT; + ibm_rgb528_set_bpp(ramdac, svga); + break; + default: + break; + } + if (ramdac->indx_cntl) { + if (ramdac->index == 0x00ff) + ramdac->cursor_array = 0; + ramdac->index = (ramdac->index + 1) & 0x07ff; + } + break; + case 0x07: + ramdac->indx_cntl = val & 0x01; + break; } return; } - uint8_t ibm_rgb528_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga) { - ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) p; - uint8_t temp = 0xff; - uint8_t rs = (addr & 0x03); - uint8_t loc_read = (ramdac->indexed_data[0x30] & 0x10); + ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) p; + uint8_t temp = 0xff; + uint8_t rs = (addr & 0x03); + uint8_t loc_read = (ramdac->indexed_data[0x30] & 0x10); rs |= (!!rs2 << 2); switch (rs) { - case 0x00: /* Palette Write Index Register (RS value = 0000) */ - case 0x01: /* Palette Data Register (RS value = 0001) */ - case 0x02: /* Pixel Read Mask Register (RS value = 0010) */ - temp = svga_in(addr, svga); - break; - case 0x03: /* Palette Read Index Register (RS value = 0011) */ - temp = svga->dac_addr & 0xff; - if (ramdac->indexed_data[0x070] & 0x20) - temp = (temp & 0xfc) | svga->dac_status; - break; - case 0x04: - temp = ramdac->index & 0xff; - break; - case 0x05: - temp = ramdac->index >> 8; - break; - case 0x06: - temp = ramdac->indexed_data[ramdac->index]; - switch (ramdac->index) { - case 0x0000: /* Revision */ - temp = 0xe0; - break; - case 0x0001: /* ID */ - temp = 0x02; - break; - case 0x0031: - if (loc_read) - temp = ramdac->hwc_x & 0xff; - break; - case 0x0032: - if (loc_read) - temp = ramdac->hwc_x >> 8; - break; - case 0x0033: - if (loc_read) - temp = ramdac->hwc_y & 0xff; - break; - case 0x0034: - if (loc_read) - temp = ramdac->hwc_y >> 8; - break; - default: - temp = ramdac->indexed_data[ramdac->index]; - break; - } - if (ramdac->indx_cntl) { - if (ramdac->index == 0x00ff) - ramdac->cursor_array = 0; - ramdac->index = (ramdac->index + 1) & 0x07ff; - } - break; - case 0x07: - temp = ramdac->indx_cntl; - break; + case 0x00: /* Palette Write Index Register (RS value = 0000) */ + case 0x01: /* Palette Data Register (RS value = 0001) */ + case 0x02: /* Pixel Read Mask Register (RS value = 0010) */ + temp = svga_in(addr, svga); + break; + case 0x03: /* Palette Read Index Register (RS value = 0011) */ + temp = svga->dac_addr & 0xff; + if (ramdac->indexed_data[0x070] & 0x20) + temp = (temp & 0xfc) | svga->dac_status; + break; + case 0x04: + temp = ramdac->index & 0xff; + break; + case 0x05: + temp = ramdac->index >> 8; + break; + case 0x06: + temp = ramdac->indexed_data[ramdac->index]; + switch (ramdac->index) { + case 0x0000: /* Revision */ + temp = 0xe0; + break; + case 0x0001: /* ID */ + temp = 0x02; + break; + case 0x0031: + if (loc_read) + temp = ramdac->hwc_x & 0xff; + break; + case 0x0032: + if (loc_read) + temp = ramdac->hwc_x >> 8; + break; + case 0x0033: + if (loc_read) + temp = ramdac->hwc_y & 0xff; + break; + case 0x0034: + if (loc_read) + temp = ramdac->hwc_y >> 8; + break; + default: + temp = ramdac->indexed_data[ramdac->index]; + break; + } + if (ramdac->indx_cntl) { + if (ramdac->index == 0x00ff) + ramdac->cursor_array = 0; + ramdac->index = (ramdac->index + 1) & 0x07ff; + } + break; + case 0x07: + temp = ramdac->indx_cntl; + break; } return temp; } - void ibm_rgb528_recalctimings(void *p, svga_t *svga) { @@ -797,122 +795,121 @@ ibm_rgb528_recalctimings(void *p, svga_t *svga) svga->interlace = ramdac->indexed_data[0x071] & 0x20; if (svga->scrblank || !svga->attr_palette_enable) { - if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { - if (((svga->gdcreg[5] & 0x60) == 0x40) || ((svga->gdcreg[5] & 0x60) == 0x60)) { - if (ramdac->indexed_data[0x071] & 0x01) { - switch (svga->bpp) { - case 4: - svga->render = ibm_rgb528_render_4bpp; - break; - case 8: - svga->render = ibm_rgb528_render_8bpp; - break; - case 15: case 16: - svga->render = ibm_rgb528_render_15_16bpp; - break; - case 24: - svga->render = ibm_rgb528_render_24bpp; - break; - case 32: - svga->render = ibm_rgb528_render_32bpp; - break; - } - } - } - } + if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { + if (((svga->gdcreg[5] & 0x60) == 0x40) || ((svga->gdcreg[5] & 0x60) == 0x60)) { + if (ramdac->indexed_data[0x071] & 0x01) { + switch (svga->bpp) { + case 4: + svga->render = ibm_rgb528_render_4bpp; + break; + case 8: + svga->render = ibm_rgb528_render_8bpp; + break; + case 15: + case 16: + svga->render = ibm_rgb528_render_15_16bpp; + break; + case 24: + svga->render = ibm_rgb528_render_24bpp; + break; + case 32: + svga->render = ibm_rgb528_render_32bpp; + break; + } + } + } + } } } - void ibm_rgb528_hwcursor_draw(svga_t *svga, int displine) { - uint8_t dat, four_pixels = 0x00; - int x, pitch, x_pos, y_pos, offset = svga->dac_hwcursor_latch.x - svga->dac_hwcursor_latch.xoff; - uint32_t *p; - ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) svga->ramdac; - uint8_t pix_ordr = ramdac->indexed_data[0x30] & 0x20; - uint8_t cursor_mode = ramdac->indexed_data[0x30] & 0x03; + uint8_t dat, four_pixels = 0x00; + int x, pitch, x_pos, y_pos, offset = svga->dac_hwcursor_latch.x - svga->dac_hwcursor_latch.xoff; + uint32_t *p; + ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) svga->ramdac; + uint8_t pix_ordr = ramdac->indexed_data[0x30] & 0x20; + uint8_t cursor_mode = ramdac->indexed_data[0x30] & 0x03; /* The planes come in one part, and each plane is 2bpp, so a 32x32 cursor has 8 bytes per line, and a 64x64 cursor has 16 bytes per line. */ - pitch = (svga->dac_hwcursor_latch.cur_xsize >> 2); /* Bytes per line. */ + pitch = (svga->dac_hwcursor_latch.cur_xsize >> 2); /* Bytes per line. */ if ((ramdac->indexed_data[0x071] & 0x20) && svga->dac_hwcursor_oddeven) - svga->dac_hwcursor_latch.addr += pitch; + svga->dac_hwcursor_latch.addr += pitch; y_pos = displine; x_pos = offset + svga->x_add; - p = buffer32->line[y_pos]; + p = buffer32->line[y_pos]; for (x = 0; x < svga->dac_hwcursor_latch.cur_xsize; x++) { - if (!(x & 3)) - four_pixels = ramdac->indexed_data[svga->dac_hwcursor_latch.addr]; + if (!(x & 3)) + four_pixels = ramdac->indexed_data[svga->dac_hwcursor_latch.addr]; - if (pix_ordr) - dat = (four_pixels >> (((3 - x) & 3) << 1)) & 0x03; - else - dat = (four_pixels >> ((x & 3) << 1)) & 0x03; + if (pix_ordr) + dat = (four_pixels >> (((3 - x) & 3) << 1)) & 0x03; + else + dat = (four_pixels >> ((x & 3) << 1)) & 0x03; - x_pos = offset + svga->x_add + x; + x_pos = offset + svga->x_add + x; - switch (cursor_mode) { - case 0x01: - switch (dat) { - case 0x01: - /* Cursor Color 1 */ - p[x_pos] = ramdac->extra_pal[0].pixel; - break; - case 0x02: - /* Cursor Color 2 */ - p[x_pos] = ramdac->extra_pal[1].pixel; - break; - case 0x03: - /* Cursor Color 3 */ - p[x_pos] = ramdac->extra_pal[2].pixel; - break; - } - break; - case 0x02: - switch (dat) { - case 0x00: - /* Cursor Color 1 */ - p[x_pos] = ramdac->extra_pal[0].pixel; - break; - case 0x01: - /* Cursor Color 2 */ - p[x_pos] = ramdac->extra_pal[1].pixel; - break; - case 0x03: - /* Complement */ - p[x_pos] ^= 0xffffff; - break; - } - break; - case 0x03: - switch (dat) { - case 0x02: - /* Cursor Color 1 */ - p[x_pos] = ramdac->extra_pal[0].pixel; - break; - case 0x03: - /* Cursor Color 2 */ - p[x_pos] = ramdac->extra_pal[1].pixel; - break; - } - break; - } + switch (cursor_mode) { + case 0x01: + switch (dat) { + case 0x01: + /* Cursor Color 1 */ + p[x_pos] = ramdac->extra_pal[0].pixel; + break; + case 0x02: + /* Cursor Color 2 */ + p[x_pos] = ramdac->extra_pal[1].pixel; + break; + case 0x03: + /* Cursor Color 3 */ + p[x_pos] = ramdac->extra_pal[2].pixel; + break; + } + break; + case 0x02: + switch (dat) { + case 0x00: + /* Cursor Color 1 */ + p[x_pos] = ramdac->extra_pal[0].pixel; + break; + case 0x01: + /* Cursor Color 2 */ + p[x_pos] = ramdac->extra_pal[1].pixel; + break; + case 0x03: + /* Complement */ + p[x_pos] ^= 0xffffff; + break; + } + break; + case 0x03: + switch (dat) { + case 0x02: + /* Cursor Color 1 */ + p[x_pos] = ramdac->extra_pal[0].pixel; + break; + case 0x03: + /* Cursor Color 2 */ + p[x_pos] = ramdac->extra_pal[1].pixel; + break; + } + break; + } - if ((x & 3) == 3) - svga->dac_hwcursor_latch.addr++; + if ((x & 3) == 3) + svga->dac_hwcursor_latch.addr++; } if ((ramdac->indexed_data[0x071] & 0x20) && !svga->dac_hwcursor_oddeven) - svga->dac_hwcursor_latch.addr += pitch; + svga->dac_hwcursor_latch.addr += pitch; } - void * ibm_rgb528_ramdac_init(const device_t *info) { @@ -928,26 +925,25 @@ ibm_rgb528_ramdac_init(const device_t *info) return ramdac; } - static void ibm_rgb528_ramdac_close(void *priv) { ibm_rgb528_ramdac_t *ramdac = (ibm_rgb528_ramdac_t *) priv; if (ramdac) - free(ramdac); + free(ramdac); } const device_t ibm_rgb528_ramdac_device = { - .name = "IBM RGB528 RAMDAC", + .name = "IBM RGB528 RAMDAC", .internal_name = "ibm_rgb528_ramdac", - .flags = 0, - .local = 0, - .init = ibm_rgb528_ramdac_init, - .close = ibm_rgb528_ramdac_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = ibm_rgb528_ramdac_init, + .close = ibm_rgb528_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_icd2061.c b/src/video/vid_icd2061.c index cb7ffecbe..3eca22fc1 100644 --- a/src/video/vid_icd2061.c +++ b/src/video/vid_icd2061.c @@ -28,37 +28,32 @@ #include <86box/86box.h> #include <86box/device.h> - -typedef struct icd2061_t -{ +typedef struct icd2061_t { float freq[3]; int count, bit_count, - unlocked, state; + unlocked, state; uint32_t data, ctrl; } icd2061_t; - #ifdef ENABLE_ICD2061_LOG int icd2061_do_log = ENABLE_ICD2061_LOG; - static void icd2061_log(const char *fmt, ...) { va_list ap; if (icd2061_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define icd2061_log(fmt, ...) +# define icd2061_log(fmt, ...) #endif - void icd2061_write(void *p, int val) { @@ -67,81 +62,79 @@ icd2061_write(void *p, int val) int nd, oc, nc; int a, qa, q, pa, p_, m, ps; - nd = (val & 2) >> 1; /* Old data. */ - oc = icd2061->state & 1; /* Old clock. */ - nc = val & 1; /* New clock. */ + nd = (val & 2) >> 1; /* Old data. */ + oc = icd2061->state & 1; /* Old clock. */ + nc = val & 1; /* New clock. */ icd2061->state = val; - if (nc && !oc) { /* Low-to-high transition of CLK. */ - if (!icd2061->unlocked) { - if (nd) { /* DATA high. */ - icd2061->count++; - icd2061_log("Low-to-high transition of CLK with DATA high, %i total\n", icd2061->count); - } else { /* DATA low. */ - if (icd2061->count >= 5) { - icd2061->unlocked = 1; - icd2061->bit_count = icd2061->data = 0; + if (nc && !oc) { /* Low-to-high transition of CLK. */ + if (!icd2061->unlocked) { + if (nd) { /* DATA high. */ + icd2061->count++; + icd2061_log("Low-to-high transition of CLK with DATA high, %i total\n", icd2061->count); + } else { /* DATA low. */ + if (icd2061->count >= 5) { + icd2061->unlocked = 1; + icd2061->bit_count = icd2061->data = 0; #ifdef ENABLE_ICD2061_LOG - icd2061_log("ICD2061 unlocked\n"); + icd2061_log("ICD2061 unlocked\n"); #endif - } else { - icd2061->count = 0; + } else { + icd2061->count = 0; #ifdef ENABLE_ICD2061_LOG - icd2061_log("ICD2061 locked\n"); + icd2061_log("ICD2061 locked\n"); #endif - } - } - } else if (nc) { - icd2061->data |= (nd << icd2061->bit_count); - icd2061->bit_count++; + } + } + } else if (nc) { + icd2061->data |= (nd << icd2061->bit_count); + icd2061->bit_count++; - if (icd2061->bit_count == 26) { - icd2061_log("26 bits received, data = %08X\n", icd2061->data); + if (icd2061->bit_count == 26) { + icd2061_log("26 bits received, data = %08X\n", icd2061->data); - a = ((icd2061->data >> 22) & 0x07); /* A */ - icd2061_log("A = %01X\n", a); + a = ((icd2061->data >> 22) & 0x07); /* A */ + icd2061_log("A = %01X\n", a); - if (a < 3) { - pa = ((icd2061->data >> 11) & 0x7f); /* P' (ICD2061) / N' (ICS9161) */ - m = ((icd2061->data >> 8) & 0x07); /* M (ICD2061) / R (ICS9161) */ - qa = ((icd2061->data >> 1) & 0x7f); /* Q' (ICD2061) / M' (ICS9161) */ + if (a < 3) { + pa = ((icd2061->data >> 11) & 0x7f); /* P' (ICD2061) / N' (ICS9161) */ + m = ((icd2061->data >> 8) & 0x07); /* M (ICD2061) / R (ICS9161) */ + qa = ((icd2061->data >> 1) & 0x7f); /* Q' (ICD2061) / M' (ICS9161) */ - p_ = pa + 3; /* P (ICD2061) / N (ICS9161) */ - m = 1 << m; - q = qa + 2; /* Q (ICD2061) / M (ICS9161) */ - ps = (icd2061->ctrl & (1 << a)) ? 4 : 2; /* Prescale */ + p_ = pa + 3; /* P (ICD2061) / N (ICS9161) */ + m = 1 << m; + q = qa + 2; /* Q (ICD2061) / M (ICS9161) */ + ps = (icd2061->ctrl & (1 << a)) ? 4 : 2; /* Prescale */ - icd2061->freq[a] = ((float)(p_ * ps) / (float)(q * m)) * 14318184.0f; + icd2061->freq[a] = ((float) (p_ * ps) / (float) (q * m)) * 14318184.0f; - icd2061_log("P = %02X, M = %01X, Q = %02X, freq[%i] = %f\n", p_, m, q, a, icd2061->freq[a]); - } else if (a == 6) { - icd2061->ctrl = ((icd2061->data >> 13) & 0xff); - icd2061_log("ctrl = %02X\n", icd2061->ctrl); - } - icd2061->count = icd2061->bit_count = icd2061->data = 0; - icd2061->unlocked = 0; + icd2061_log("P = %02X, M = %01X, Q = %02X, freq[%i] = %f\n", p_, m, q, a, icd2061->freq[a]); + } else if (a == 6) { + icd2061->ctrl = ((icd2061->data >> 13) & 0xff); + icd2061_log("ctrl = %02X\n", icd2061->ctrl); + } + icd2061->count = icd2061->bit_count = icd2061->data = 0; + icd2061->unlocked = 0; #ifdef ENABLE_ICD2061_LOG - icd2061_log("ICD2061 locked\n"); + icd2061_log("ICD2061 locked\n"); #endif - } - } + } + } } } - float icd2061_getclock(int clock, void *p) { icd2061_t *icd2061 = (icd2061_t *) p; if (clock > 2) - clock = 2; + clock = 2; return icd2061->freq[clock]; } - static void * icd2061_init(const device_t *info) { @@ -155,40 +148,39 @@ icd2061_init(const device_t *info) return icd2061; } - static void icd2061_close(void *priv) { icd2061_t *icd2061 = (icd2061_t *) priv; if (icd2061) - free(icd2061); + free(icd2061); } const device_t icd2061_device = { - .name = "ICD2061 Clock Generator", + .name = "ICD2061 Clock Generator", .internal_name = "icd2061", - .flags = 0, - .local = 0, - .init = icd2061_init, - .close = icd2061_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = icd2061_init, + .close = icd2061_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ics9161_device = { - .name = "ICS9161 Clock Generator", + .name = "ICS9161 Clock Generator", .internal_name = "ics9161", - .flags = 0, - .local = 0, - .init = icd2061_init, - .close = icd2061_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = icd2061_init, + .close = icd2061_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_ics2494.c b/src/video/vid_ics2494.c index f06726e02..9ab686ae9 100644 --- a/src/video/vid_ics2494.c +++ b/src/video/vid_ics2494.c @@ -24,45 +24,39 @@ #include <86box/86box.h> #include <86box/device.h> - -typedef struct ics2494_t -{ +typedef struct ics2494_t { float freq[16]; } ics2494_t; - #ifdef ENABLE_ics2494_LOG int ics2494_do_log = ENABLE_ics2494_LOG; - static void ics2494_log(const char *fmt, ...) { va_list ap; if (ics2494_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define ics2494_log(fmt, ...) +# define ics2494_log(fmt, ...) #endif - float ics2494_getclock(int clock, void *p) { ics2494_t *ics2494 = (ics2494_t *) p; if (clock > 16) - clock = 16; + clock = 16; return ics2494->freq[clock]; } - static void * ics2494_init(const device_t *info) { @@ -70,50 +64,49 @@ ics2494_init(const device_t *info) memset(ics2494, 0, sizeof(ics2494_t)); switch (info->local) { - case 305: - /* ICS2494A(N)-205 for S3 86C924 */ - ics2494->freq[0x0] = 25175000.0; - ics2494->freq[0x1] = 28322000.0; - ics2494->freq[0x2] = 40000000.0; - ics2494->freq[0x3] = 0.0; - ics2494->freq[0x4] = 50000000.0; - ics2494->freq[0x5] = 77000000.0; - ics2494->freq[0x6] = 36000000.0; - ics2494->freq[0x7] = 44889000.0; - ics2494->freq[0x8] = 130000000.0; - ics2494->freq[0x9] = 120000000.0; - ics2494->freq[0xa] = 80000000.0; - ics2494->freq[0xb] = 31500000.0; - ics2494->freq[0xc] = 110000000.0; - ics2494->freq[0xd] = 65000000.0; - ics2494->freq[0xe] = 75000000.0; - ics2494->freq[0xf] = 94500000.0; - break; + case 305: + /* ICS2494A(N)-205 for S3 86C924 */ + ics2494->freq[0x0] = 25175000.0; + ics2494->freq[0x1] = 28322000.0; + ics2494->freq[0x2] = 40000000.0; + ics2494->freq[0x3] = 0.0; + ics2494->freq[0x4] = 50000000.0; + ics2494->freq[0x5] = 77000000.0; + ics2494->freq[0x6] = 36000000.0; + ics2494->freq[0x7] = 44889000.0; + ics2494->freq[0x8] = 130000000.0; + ics2494->freq[0x9] = 120000000.0; + ics2494->freq[0xa] = 80000000.0; + ics2494->freq[0xb] = 31500000.0; + ics2494->freq[0xc] = 110000000.0; + ics2494->freq[0xd] = 65000000.0; + ics2494->freq[0xe] = 75000000.0; + ics2494->freq[0xf] = 94500000.0; + break; } return ics2494; } - static void ics2494_close(void *priv) { ics2494_t *ics2494 = (ics2494_t *) priv; if (ics2494) - free(ics2494); + free(ics2494); } const device_t ics2494an_305_device = { - .name = "ICS2494AN-305 Clock Generator", + .name = "ICS2494AN-305 Clock Generator", .internal_name = "ics2494an_305", - .flags = 0, - .local = 305, - .init = ics2494_init, - .close = ics2494_close, - .reset = NULL, + .flags = 0, + .local = 305, + .init = ics2494_init, + .close = ics2494_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_ics2595.c b/src/video/vid_ics2595.c index e36c4048e..77c46b6c3 100644 --- a/src/video/vid_ics2595.c +++ b/src/video/vid_ics2595.c @@ -24,9 +24,7 @@ #include <86box/86box.h> #include <86box/device.h> - -typedef struct ics2595_t -{ +typedef struct ics2595_t { int oldfs3, oldfs2; int dat; int pos, state; @@ -35,57 +33,52 @@ typedef struct ics2595_t double output_clock; } ics2595_t; - -enum -{ - ICS2595_IDLE = 0, - ICS2595_WRITE, - ICS2595_READ +enum { + ICS2595_IDLE = 0, + ICS2595_WRITE, + ICS2595_READ }; - -static int ics2595_div[4] = {8, 4, 2, 1}; - +static int ics2595_div[4] = { 8, 4, 2, 1 }; void ics2595_write(void *p, int strobe, int dat) { ics2595_t *ics2595 = (ics2595_t *) p; - int d, n; - int l; + int d, n; + int l; if (strobe) { - if ((dat & 8) && !ics2595->oldfs3) { /*Data clock*/ - switch (ics2595->state) { - case ICS2595_IDLE: - ics2595->state = (dat & 4) ? ICS2595_WRITE : ICS2595_IDLE; - ics2595->pos = 0; - break; - case ICS2595_WRITE: - ics2595->dat = (ics2595->dat >> 1); - if (dat & 4) - ics2595->dat |= (1 << 19); - ics2595->pos++; - if (ics2595->pos == 20) { - l = (ics2595->dat >> 2) & 0xf; - n = ((ics2595->dat >> 7) & 255) + 257; - d = ics2595_div[(ics2595->dat >> 16) & 3]; + if ((dat & 8) && !ics2595->oldfs3) { /*Data clock*/ + switch (ics2595->state) { + case ICS2595_IDLE: + ics2595->state = (dat & 4) ? ICS2595_WRITE : ICS2595_IDLE; + ics2595->pos = 0; + break; + case ICS2595_WRITE: + ics2595->dat = (ics2595->dat >> 1); + if (dat & 4) + ics2595->dat |= (1 << 19); + ics2595->pos++; + if (ics2595->pos == 20) { + l = (ics2595->dat >> 2) & 0xf; + n = ((ics2595->dat >> 7) & 255) + 257; + d = ics2595_div[(ics2595->dat >> 16) & 3]; - ics2595->clocks[l] = (14318181.8 * ((double)n / 46.0)) / (double)d; - ics2595->state = ICS2595_IDLE; - } - break; - } - } + ics2595->clocks[l] = (14318181.8 * ((double) n / 46.0)) / (double) d; + ics2595->state = ICS2595_IDLE; + } + break; + } + } - ics2595->oldfs2 = dat & 4; - ics2595->oldfs3 = dat & 8; + ics2595->oldfs2 = dat & 4; + ics2595->oldfs3 = dat & 8; } ics2595->output_clock = ics2595->clocks[dat]; } - static void * ics2595_init(const device_t *info) { @@ -95,17 +88,15 @@ ics2595_init(const device_t *info) return ics2595; } - static void ics2595_close(void *priv) { ics2595_t *ics2595 = (ics2595_t *) priv; if (ics2595) - free(ics2595); + free(ics2595); } - double ics2595_getclock(void *p) { @@ -114,7 +105,6 @@ ics2595_getclock(void *p) return ics2595->output_clock; } - void ics2595_setclock(void *p, double clock) { @@ -124,15 +114,15 @@ ics2595_setclock(void *p, double clock) } const device_t ics2595_device = { - .name = "ICS2595 clock chip", + .name = "ICS2595 clock chip", .internal_name = "ics2595", - .flags = 0, - .local = 0, - .init = ics2595_init, - .close = ics2595_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = ics2595_init, + .close = ics2595_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_im1024.c b/src/video/vid_im1024.c index 932faecb7..15aab0cb8 100644 --- a/src/video/vid_im1024.c +++ b/src/video/vid_im1024.c @@ -66,68 +66,63 @@ #include <86box/video.h> #include <86box/vid_pgc.h> - -#define BIOS_ROM_PATH "roms/video/im1024/im1024font.bin" - +#define BIOS_ROM_PATH "roms/video/im1024/im1024font.bin" typedef struct { - pgc_t pgc; + pgc_t pgc; - uint8_t fontx[256]; - uint8_t fonty[256]; - uint8_t font[256][128]; + uint8_t fontx[256]; + uint8_t fonty[256]; + uint8_t font[256][128]; - uint8_t *fifo; - unsigned fifo_len, - fifo_wrptr, - fifo_rdptr; + uint8_t *fifo; + unsigned fifo_len, + fifo_wrptr, + fifo_rdptr; } im1024_t; - -static video_timings_t timing_im1024 = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; - +static video_timings_t timing_im1024 = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; #ifdef ENABLE_IM1024_LOG int im1024_do_log = ENABLE_IM1024_LOG; - static void im1024_log(const char *fmt, ...) { va_list ap; if (im1024_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define im1024_log(fmt, ...) +# define im1024_log(fmt, ...) #endif - static void fifo_write(im1024_t *dev, uint8_t val) { im1024_log("IM1024: fifo_write: %02x [rd=%04x wr=%04x]\n", - val, dev->fifo_rdptr, dev->fifo_wrptr); + val, dev->fifo_rdptr, dev->fifo_wrptr); if (((dev->fifo_wrptr + 1) % dev->fifo_len) == dev->fifo_rdptr) { - /* FIFO is full. Double its size. */ - uint8_t *buf; + /* FIFO is full. Double its size. */ + uint8_t *buf; - im1024_log("IM1024: fifo_resize: %i to %i\n", - dev->fifo_len, 2 * dev->fifo_len); + im1024_log("IM1024: fifo_resize: %i to %i\n", + dev->fifo_len, 2 * dev->fifo_len); - buf = realloc(dev->fifo, 2 * dev->fifo_len); - if (buf == NULL) return; + buf = realloc(dev->fifo, 2 * dev->fifo_len); + if (buf == NULL) + return; - /* Move the [0..wrptr] range to the newly-allocated area [len..len+wrptr] */ - memmove(buf + dev->fifo_len, buf, dev->fifo_wrptr); - dev->fifo = buf; - dev->fifo_wrptr += dev->fifo_len; - dev->fifo_len *= 2; + /* Move the [0..wrptr] range to the newly-allocated area [len..len+wrptr] */ + memmove(buf + dev->fifo_len, buf, dev->fifo_wrptr); + dev->fifo = buf; + dev->fifo_wrptr += dev->fifo_len; + dev->fifo_len *= 2; } /* Append to the queue. */ @@ -135,28 +130,26 @@ fifo_write(im1024_t *dev, uint8_t val) /* Wrap if end of buffer reached. */ if (dev->fifo_wrptr >= dev->fifo_len) - dev->fifo_wrptr = 0; + dev->fifo_wrptr = 0; } - static int fifo_read(im1024_t *dev) { uint8_t ret; if (dev->fifo_wrptr == dev->fifo_rdptr) - return -1; /* FIFO empty */ + return -1; /* FIFO empty */ ret = dev->fifo[dev->fifo_rdptr++]; if (dev->fifo_rdptr >= dev->fifo_len) - dev->fifo_rdptr = 0; + dev->fifo_rdptr = 0; im1024_log("IM1024: fifo_read: %02x\n", ret); - return(ret); + return (ret); } - /* * Where a normal PGC would just read from the ring buffer at 0xC6300, * the IM-1024 can read from either this or from its internal FIFO. @@ -166,96 +159,92 @@ fifo_read(im1024_t *dev) static int input_byte(pgc_t *pgc, uint8_t *result) { - im1024_t *dev = (im1024_t *)pgc; + im1024_t *dev = (im1024_t *) pgc; /* If input buffer empty, wait for it to fill. */ - while (!pgc->stopped && (dev->fifo_wrptr == dev->fifo_rdptr) && - (pgc->mapram[0x300] == pgc->mapram[0x301])) { - pgc->waiting_input_fifo = 1; - pgc_sleep(pgc); + while (!pgc->stopped && (dev->fifo_wrptr == dev->fifo_rdptr) && (pgc->mapram[0x300] == pgc->mapram[0x301])) { + pgc->waiting_input_fifo = 1; + pgc_sleep(pgc); } if (pgc->stopped) - return(0); + return (0); if (pgc->mapram[0x3ff]) { - /* Reset triggered. */ - pgc_reset(pgc); - return(0); + /* Reset triggered. */ + pgc_reset(pgc); + return (0); } if (dev->fifo_wrptr == dev->fifo_rdptr) { - *result = pgc->mapram[pgc->mapram[0x301]]; - pgc->mapram[0x301]++; + *result = pgc->mapram[pgc->mapram[0x301]]; + pgc->mapram[0x301]++; } else - *result = fifo_read(dev); + *result = fifo_read(dev); - return(1); + return (1); } - /* Macros to disable clipping and save clip state. */ -#define PUSHCLIP { \ - uint16_t vp_x1, vp_x2, vp_y1, vp_y2; \ - vp_x1 = pgc->vp_x1; \ - vp_y1 = pgc->vp_y1; \ - vp_x2 = pgc->vp_x2; \ - vp_y2 = pgc->vp_y2; \ - pgc->vp_x1 = 0; \ - pgc->vp_y1 = 0; \ - pgc->vp_x2 = pgc->maxw - 1; \ - pgc->vp_y2 = pgc->maxh - 1; \ +#define PUSHCLIP \ + { \ + uint16_t vp_x1, vp_x2, vp_y1, vp_y2; \ + vp_x1 = pgc->vp_x1; \ + vp_y1 = pgc->vp_y1; \ + vp_x2 = pgc->vp_x2; \ + vp_y2 = pgc->vp_y2; \ + pgc->vp_x1 = 0; \ + pgc->vp_y1 = 0; \ + pgc->vp_x2 = pgc->maxw - 1; \ + pgc->vp_y2 = pgc->maxh - 1; /* And to restore clip state */ -#define POPCLIP \ - pgc->vp_x1 = vp_x1; \ - pgc->vp_y1 = vp_y1; \ - pgc->vp_x2 = vp_x2; \ - pgc->vp_y2 = vp_y2; \ - } - +#define POPCLIP \ + pgc->vp_x1 = vp_x1; \ + pgc->vp_y1 = vp_y1; \ + pgc->vp_x2 = vp_x2; \ + pgc->vp_y2 = vp_y2; \ + } /* Override memory read to return FIFO space. */ static uint8_t im1024_read(uint32_t addr, void *priv) { - im1024_t *dev = (im1024_t *)priv; + im1024_t *dev = (im1024_t *) priv; if (addr == 0xc6331 && dev->pgc.mapram[0x330] == 1) { - /* Hardcode that there are 128 bytes free. */ - return(0x80); + /* Hardcode that there are 128 bytes free. */ + return (0x80); } - return(pgc_read(addr, &dev->pgc)); + return (pgc_read(addr, &dev->pgc)); } - /* Override memory write to handle writes to the FIFO. */ static void im1024_write(uint32_t addr, uint8_t val, void *priv) { - im1024_t *dev = (im1024_t *)priv; + im1024_t *dev = (im1024_t *) priv; /* * If we are in 'fast' input mode, send all * writes to the internal FIFO. */ if (addr >= 0xc6000 && addr < 0xc6100 && dev->pgc.mapram[0x330] == 1) { - fifo_write(dev, val); + fifo_write(dev, val); - im1024_log("IM1024: write(%02x)\n", val); + im1024_log("IM1024: write(%02x)\n", val); - if (dev->pgc.waiting_input_fifo) { - dev->pgc.waiting_input_fifo = 0; - pgc_wake(&dev->pgc); - } - return; + if (dev->pgc.waiting_input_fifo) { + dev->pgc.waiting_input_fifo = 0; + pgc_wake(&dev->pgc); + } + return; } pgc_write(addr, val, &dev->pgc); } - /* * I don't know what the IMGSIZ command does, only that the * Windows driver issues it. So just parse and ignore it. @@ -269,15 +258,18 @@ hndl_imgsiz(pgc_t *pgc) int16_t w, h; uint8_t a, b; - if (! pgc_param_word(pgc, &w)) return; - if (! pgc_param_word(pgc, &h)) return; - if (! pgc_param_byte(pgc, &a)) return; - if (! pgc_param_byte(pgc, &b)) return; + if (!pgc_param_word(pgc, &w)) + return; + if (!pgc_param_word(pgc, &h)) + return; + if (!pgc_param_byte(pgc, &a)) + return; + if (!pgc_param_byte(pgc, &b)) + return; im1024_log("IM1024: IMGSIZ %i,%i,%i,%i\n", w, h, a, b); } - /* * I don't know what the IPREC command does, only that the * Windows driver issues it. So just parse and ignore it. @@ -290,12 +282,12 @@ hndl_iprec(pgc_t *pgc) #endif uint8_t param; - if (! pgc_param_byte(pgc, ¶m)) return; + if (!pgc_param_byte(pgc, ¶m)) + return; im1024_log("IM1024: IPREC %i\n", param); } - /* * Set drawing mode. * @@ -309,16 +301,16 @@ hndl_linfun(pgc_t *pgc) { uint8_t param; - if (! pgc_param_byte(pgc, ¶m)) return; + if (!pgc_param_byte(pgc, ¶m)) + return; if (param < 4) { - pgc->draw_mode = param; - im1024_log("IM1024: LINFUN(%i)\n", param); + pgc->draw_mode = param; + im1024_log("IM1024: LINFUN(%i)\n", param); } else - pgc_error(pgc, PGC_ERROR_RANGE); + pgc_error(pgc, PGC_ERROR_RANGE); } - /* * I think PAN controls which part of the 1024x1024 framebuffer * is displayed in the 1024x800 visible screen. @@ -328,8 +320,10 @@ hndl_pan(pgc_t *pgc) { int16_t x, y; - if (! pgc_param_word(pgc, &x)) return; - if (! pgc_param_word(pgc, &y)) return; + if (!pgc_param_word(pgc, &x)) + return; + if (!pgc_param_word(pgc, &y)) + return; im1024_log("IM1024: PAN %i,%i\n", x, y); @@ -337,32 +331,33 @@ hndl_pan(pgc_t *pgc) pgc->pan_y = y; } - /* PLINE draws a non-filled polyline at a fixed position. */ static void hndl_pline(pgc_t *pgc) { - int16_t x[257], y[257]; + int16_t x[257], y[257]; uint16_t linemask = pgc->line_pattern; - uint8_t count; + uint8_t count; unsigned n; - if (! pgc_param_byte(pgc, &count)) return; + if (!pgc_param_byte(pgc, &count)) + return; im1024_log("IM1024: PLINE (%i) ", count); for (n = 0; n < count; n++) { - if (! pgc_param_word(pgc, &x[n])) return; - if (! pgc_param_word(pgc, &y[n])) return; - im1024_log(" (%i,%i)\n", x[n], y[n]); + if (!pgc_param_word(pgc, &x[n])) + return; + if (!pgc_param_word(pgc, &y[n])) + return; + im1024_log(" (%i,%i)\n", x[n], y[n]); } for (n = 1; n < count; n++) { - linemask = pgc_draw_line(pgc, x[n - 1] << 16, y[n - 1] << 16, - x[n] << 16, y[n] << 16, linemask); + linemask = pgc_draw_line(pgc, x[n - 1] << 16, y[n - 1] << 16, + x[n] << 16, y[n] << 16, linemask); } } - /* * Blit a single row of pixels from one location to another. * @@ -377,31 +372,31 @@ blkmov_row(pgc_t *pgc, int16_t x0, int16_t x1, int16_t x2, int16_t sy, int16_t t int16_t x; for (x = x0; x <= x1; x++) { - src[x - x0] = pgc_read_pixel(pgc, x, sy); - dst[x - x0] = pgc_read_pixel(pgc, x - x0 + x2, ty); + src[x - x0] = pgc_read_pixel(pgc, x, sy); + dst[x - x0] = pgc_read_pixel(pgc, x - x0 + x2, ty); } - for (x = x0; x <= x1; x++) switch (pgc->draw_mode) { - default: - case 0: - pgc_write_pixel(pgc, (x - x0 + x2), ty, src[x - x0]); - break; + for (x = x0; x <= x1; x++) + switch (pgc->draw_mode) { + default: + case 0: + pgc_write_pixel(pgc, (x - x0 + x2), ty, src[x - x0]); + break; - case 1: - pgc_write_pixel(pgc, (x - x0 + x2), ty, dst[x - x0] ^ 0xff); - break; + case 1: + pgc_write_pixel(pgc, (x - x0 + x2), ty, dst[x - x0] ^ 0xff); + break; - case 2: - pgc_write_pixel(pgc, (x - x0 + x2), ty, src[x - x0] ^ dst[x - x0]); - break; + case 2: + pgc_write_pixel(pgc, (x - x0 + x2), ty, src[x - x0] ^ dst[x - x0]); + break; - case 3: - pgc_write_pixel(pgc, (x - x0 + x2), ty, src[x - x0] & dst[x - x0]); - break; - } + case 3: + pgc_write_pixel(pgc, (x - x0 + x2), ty, src[x - x0] & dst[x - x0]); + break; + } } - /* * BLKMOV blits a rectangular area from one location to another. * @@ -415,14 +410,20 @@ hndl_blkmov(pgc_t *pgc) int16_t x2, y2; int16_t y; - if (! pgc_param_word(pgc, &x0)) return; - if (! pgc_param_word(pgc, &y0)) return; - if (! pgc_param_word(pgc, &x1)) return; - if (! pgc_param_word(pgc, &y1)) return; - if (! pgc_param_word(pgc, &x2)) return; - if (! pgc_param_word(pgc, &y2)) return; + if (!pgc_param_word(pgc, &x0)) + return; + if (!pgc_param_word(pgc, &y0)) + return; + if (!pgc_param_word(pgc, &x1)) + return; + if (!pgc_param_word(pgc, &y1)) + return; + if (!pgc_param_word(pgc, &x2)) + return; + if (!pgc_param_word(pgc, &y2)) + return; - im1024_log("IM1024: BLKMOV %i,%i,%i,%i,%i,%i\n", x0,y0,x1,y1,x2,y2); + im1024_log("IM1024: BLKMOV %i,%i,%i,%i,%i,%i\n", x0, y0, x1, y1, x2, y2); /* Disable clipping. */ PUSHCLIP @@ -432,37 +433,37 @@ hndl_blkmov(pgc_t *pgc) * depending whether areas might overlap. */ if (y2 <= y0) { - for (y = y0; y <= y1; y++) - blkmov_row(pgc, x0, x1, x2, y, y - y0 + y2); + for (y = y0; y <= y1; y++) + blkmov_row(pgc, x0, x1, x2, y, y - y0 + y2); } else { - for (y = y1; y >= y0; y--) - blkmov_row(pgc, x0, x1, x2, y, y - y0 + y2); + for (y = y1; y >= y0; y--) + blkmov_row(pgc, x0, x1, x2, y, y - y0 + y2); } /* Restore clipping. */ POPCLIP } - /* * Override the PGC ELIPSE command to parse its * parameters as words rather than coordinates. - */ + */ static void hndl_ellipse(pgc_t *pgc) { int16_t x, y; - if (! pgc_param_word(pgc, &x)) return; - if (! pgc_param_word(pgc, &y)) return; + if (!pgc_param_word(pgc, &x)) + return; + if (!pgc_param_word(pgc, &y)) + return; im1024_log("IM1024: ELLIPSE %i,%i @ %i,%i\n", - x, y, pgc->x >> 16, pgc->y >> 16); + x, y, pgc->x >> 16, pgc->y >> 16); pgc_draw_ellipse(pgc, x << 16, y << 16); } - /* * Override the PGC MOVE command to parse its * parameters as words rather than coordinates. @@ -472,8 +473,10 @@ hndl_move(pgc_t *pgc) { int16_t x, y; - if (! pgc_param_word(pgc, &x)) return; - if (! pgc_param_word(pgc, &y)) return; + if (!pgc_param_word(pgc, &x)) + return; + if (!pgc_param_word(pgc, &y)) + return; im1024_log("IM1024: MOVE %i,%i\n", x, y); @@ -481,7 +484,6 @@ hndl_move(pgc_t *pgc) pgc->y = y << 16; } - /* * Override the PGC DRAW command to parse its * parameters as words rather than coordinates. @@ -491,8 +493,10 @@ hndl_draw(pgc_t *pgc) { int16_t x, y; - if (! pgc_param_word(pgc, &x)) return; - if (! pgc_param_word(pgc, &y)) return; + if (!pgc_param_word(pgc, &x)) + return; + if (!pgc_param_word(pgc, &y)) + return; im1024_log("IM1024: DRAW %i,%i to %i,%i\n", pgc->x >> 16, pgc->y >> 16, x, y); @@ -502,7 +506,6 @@ hndl_draw(pgc_t *pgc) pgc->y = y << 16; } - /* * Override the PGC POLY command to parse its * parameters as words rather than coordinates. @@ -511,113 +514,110 @@ static void hndl_poly(pgc_t *pgc) { int32_t *x, *y, *nx, *ny; - int16_t xw, yw, mask; + int16_t xw, yw, mask; unsigned realcount = 0; unsigned n, as = 256; - int parsing = 1; - uint8_t count; + int parsing = 1; + uint8_t count; - x = (int32_t *)malloc(as * sizeof(int32_t)); - y = (int32_t *)malloc(as * sizeof(int32_t)); + x = (int32_t *) malloc(as * sizeof(int32_t)); + y = (int32_t *) malloc(as * sizeof(int32_t)); if (!x || !y) { #ifdef ENABLE_IM1024_LOG - im1024_log("IM1024: POLY: out of memory\n"); + im1024_log("IM1024: POLY: out of memory\n"); #endif - if (x) - free(x); - if (y) - free(y); - return; + if (x) + free(x); + if (y) + free(y); + return; } while (parsing) { - if (! pgc_param_byte(pgc, &count)) { - if (x) - free(x); - if (y) - free(y); - return; - } + if (!pgc_param_byte(pgc, &count)) { + if (x) + free(x); + if (y) + free(y); + return; + } - if (count + realcount >= as) { - nx = (int32_t *)realloc(x, 2 * as * sizeof(int32_t)); - ny = (int32_t *)realloc(y, 2 * as * sizeof(int32_t)); - if (!x || !y) { + if (count + realcount >= as) { + nx = (int32_t *) realloc(x, 2 * as * sizeof(int32_t)); + ny = (int32_t *) realloc(y, 2 * as * sizeof(int32_t)); + if (!x || !y) { #ifdef ENABLE_IM1024_LOG - im1024_log("IM1024: poly: realloc failed\n"); + im1024_log("IM1024: poly: realloc failed\n"); #endif - break; - } - x = nx; - y = ny; - as *= 2; - } + break; + } + x = nx; + y = ny; + as *= 2; + } - for (n = 0; n < count; n++) { - if (! pgc_param_word(pgc, &xw)) { - if (x) - free(x); - if (y) - free(y); - return; - } - if (! pgc_param_word(pgc, &yw)) { - if (x) - free(x); - if (y) - free(y); - return; - } + for (n = 0; n < count; n++) { + if (!pgc_param_word(pgc, &xw)) { + if (x) + free(x); + if (y) + free(y); + return; + } + if (!pgc_param_word(pgc, &yw)) { + if (x) + free(x); + if (y) + free(y); + return; + } - /* Skip degenerate line segments. */ - if (realcount > 0 && - (xw << 16) == x[realcount - 1] && - (yw << 16) == y[realcount - 1]) continue; + /* Skip degenerate line segments. */ + if (realcount > 0 && (xw << 16) == x[realcount - 1] && (yw << 16) == y[realcount - 1]) + continue; - x[realcount] = xw << 16; - y[realcount] = yw << 16; - realcount++; - } + x[realcount] = xw << 16; + y[realcount] = yw << 16; + realcount++; + } - /* - * If we are in a command list, peek ahead to see if the next - * command is also POLY. If so, that's a continuation of this - * polygon! - */ - parsing = 0; - if (pgc->clcur && (pgc->clcur->rdptr+1) < pgc->clcur->wrptr && - pgc->clcur->list[pgc->clcur->rdptr] == 0x30) { + /* + * If we are in a command list, peek ahead to see if the next + * command is also POLY. If so, that's a continuation of this + * polygon! + */ + parsing = 0; + if (pgc->clcur && (pgc->clcur->rdptr + 1) < pgc->clcur->wrptr && pgc->clcur->list[pgc->clcur->rdptr] == 0x30) { #ifdef ENABLE_IM1024_LOG - im1024_log("IM1024: POLY continues!\n"); + im1024_log("IM1024: POLY continues!\n"); #endif - parsing = 1; + parsing = 1; - /* Swallow the POLY. */ - pgc->clcur->rdptr++; - } + /* Swallow the POLY. */ + pgc->clcur->rdptr++; + } }; im1024_log("IM1024: POLY (%i) fill_mode=%i\n", realcount, pgc->fill_mode); #ifdef ENABLE_IM1024_LOG for (n = 0; n < realcount; n++) { - im1024_log(" (%i,%i)\n", x[n] >> 16, y[n] >> 16); + im1024_log(" (%i,%i)\n", x[n] >> 16, y[n] >> 16); } #endif if (pgc->fill_mode) - pgc_fill_polygon(pgc, realcount, x, y); + pgc_fill_polygon(pgc, realcount, x, y); /* Now draw borders. */ mask = pgc->line_pattern; for (n = 1; n < realcount; n++) - mask = pgc_draw_line(pgc, x[n - 1], y[n - 1], x[n], y[n], mask); + mask = pgc_draw_line(pgc, x[n - 1], y[n - 1], x[n], y[n], mask); pgc_draw_line(pgc, x[realcount - 1], y[realcount - 1], x[0], y[0], mask); free(y); free(x); } - static int parse_poly(pgc_t *pgc, pgc_cl_t *cl, int c) { @@ -627,12 +627,13 @@ parse_poly(pgc_t *pgc, pgc_cl_t *cl, int c) im1024_log("IM1024: parse_poly\n"); #endif - if (! pgc_param_byte(pgc, &count)) return 0; + if (!pgc_param_byte(pgc, &count)) + return 0; im1024_log("IM1024: parse_poly: count=%02x\n", count); - if (! pgc_cl_append(cl, count)) { - pgc_error(pgc, PGC_ERROR_OVERFLOW); - return 0; + if (!pgc_cl_append(cl, count)) { + pgc_error(pgc, PGC_ERROR_OVERFLOW); + return 0; } im1024_log("IM1024: parse_poly: parse %i words\n", 2 * count); @@ -640,7 +641,6 @@ parse_poly(pgc_t *pgc, pgc_cl_t *cl, int c) return pgc_parse_words(pgc, cl, count * 2); } - /* * Override the PGC RECT command to parse its * parameters as words rather than coordinates. @@ -653,31 +653,40 @@ hndl_rect(pgc_t *pgc) x0 = pgc->x >> 16; y0 = pgc->y >> 16; - if (! pgc_param_word(pgc, &x1)) return; - if (! pgc_param_word(pgc, &y1)) return; + if (!pgc_param_word(pgc, &x1)) + return; + if (!pgc_param_word(pgc, &y1)) + return; /* Convert to raster coords. */ pgc_sto_raster(pgc, &x0, &y0); pgc_sto_raster(pgc, &x1, &y1); - if (x0 > x1) { p = x0; x0 = x1; x1 = p; } - if (y0 > y1) { q = y0; y0 = y1; y1 = q; } + if (x0 > x1) { + p = x0; + x0 = x1; + x1 = p; + } + if (y0 > y1) { + q = y0; + y0 = y1; + y1 = q; + } im1024_log("IM1024: RECT (%i,%i) -> (%i,%i)\n", x0, y0, x1, y1); if (pgc->fill_mode) { - for (p = y0; p <= y1; p++) - pgc_fill_line_r(pgc, x0, x1, p); + for (p = y0; p <= y1; p++) + pgc_fill_line_r(pgc, x0, x1, p); } else { - /* Outline: 4 lines. */ - p = pgc->line_pattern; - p = pgc_draw_line_r(pgc, x0, y0, x1, y0, p); - p = pgc_draw_line_r(pgc, x1, y0, x1, y1, p); - p = pgc_draw_line_r(pgc, x1, y1, x0, y1, p); - p = pgc_draw_line_r(pgc, x0, y1, x0, y0, p); + /* Outline: 4 lines. */ + p = pgc->line_pattern; + p = pgc_draw_line_r(pgc, x0, y0, x1, y0, p); + p = pgc_draw_line_r(pgc, x1, y0, x1, y1, p); + p = pgc_draw_line_r(pgc, x1, y1, x0, y1, p); + p = pgc_draw_line_r(pgc, x0, y1, x0, y0, p); } } - /* * FIXME: * Define a font character. @@ -688,57 +697,62 @@ hndl_rect(pgc_t *pgc) static void hndl_tdefin(pgc_t *pgc) { - im1024_t *dev = (im1024_t *)pgc; - uint8_t ch, bt; - uint8_t rows, cols; - unsigned len, n; + im1024_t *dev = (im1024_t *) pgc; + uint8_t ch, bt; + uint8_t rows, cols; + unsigned len, n; - if (! pgc_param_byte(pgc, &ch)) return; - if (! pgc_param_byte(pgc, &cols)) return; - if (! pgc_param_byte(pgc, &rows)) return; + if (!pgc_param_byte(pgc, &ch)) + return; + if (!pgc_param_byte(pgc, &cols)) + return; + if (!pgc_param_byte(pgc, &rows)) + return; im1024_log("IM1024: TDEFIN (%i,%i,%i) 0x%02x 0x%02x\n", - ch, rows, cols, pgc->mapram[0x300], pgc->mapram[0x301]); + ch, rows, cols, pgc->mapram[0x300], pgc->mapram[0x301]); len = ((cols + 7) / 8) * rows; for (n = 0; n < len; n++) { - if (! pgc_param_byte(pgc, &bt)) return; + if (!pgc_param_byte(pgc, &bt)) + return; - if (n < sizeof(dev->font[ch])) - dev->font[ch][n] = bt; + if (n < sizeof(dev->font[ch])) + dev->font[ch][n] = bt; } dev->fontx[ch] = cols; dev->fonty[ch] = rows; } - static void hndl_tsize(pgc_t *pgc) { int16_t size; - if (!pgc_param_word(pgc, &size)) return; + if (!pgc_param_word(pgc, &size)) + return; im1024_log("IM1024: TSIZE(%i)\n", size); pgc->tsize = size << 16; } - static void hndl_twrite(pgc_t *pgc) { - uint8_t buf[256]; - im1024_t *dev = (im1024_t *)pgc; - uint8_t count, mask, *row; - int x, y, wb, n; - int16_t x0 = pgc->x >> 16; - int16_t y0 = pgc->y >> 16; + uint8_t buf[256]; + im1024_t *dev = (im1024_t *) pgc; + uint8_t count, mask, *row; + int x, y, wb, n; + int16_t x0 = pgc->x >> 16; + int16_t y0 = pgc->y >> 16; - if (! pgc_param_byte(pgc, &count)) return; + if (!pgc_param_byte(pgc, &count)) + return; for (n = 0; n < count; n++) - if (! pgc_param_byte(pgc, &buf[n])) return; + if (!pgc_param_byte(pgc, &buf[n])) + return; buf[count] = 0; pgc_sto_raster(pgc, &x0, &y0); @@ -746,43 +760,44 @@ hndl_twrite(pgc_t *pgc) im1024_log("IM1024: TWRITE (%i) x0=%i y0=%i\n", count, x0, y0); for (n = 0; n < count; n++) { - wb = (dev->fontx[buf[n]] + 7) / 8; - im1024_log("IM1024: ch=0x%02x w=%i h=%i wb=%i\n", - buf[n], dev->fontx[buf[n]], dev->fonty[buf[n]], wb); + wb = (dev->fontx[buf[n]] + 7) / 8; + im1024_log("IM1024: ch=0x%02x w=%i h=%i wb=%i\n", + buf[n], dev->fontx[buf[n]], dev->fonty[buf[n]], wb); - for (y = 0; y < dev->fonty[buf[n]]; y++) { - mask = 0x80; - row = &dev->font[buf[n]][y * wb]; - for (x = 0; x < dev->fontx[buf[n]]; x++) { - if (row[0] & mask) - pgc_plot(pgc, x + x0, y0 - y); - mask = mask >> 1; - if (mask == 0) { - mask = 0x80; - row++; - } - } - } + for (y = 0; y < dev->fonty[buf[n]]; y++) { + mask = 0x80; + row = &dev->font[buf[n]][y * wb]; + for (x = 0; x < dev->fontx[buf[n]]; x++) { + if (row[0] & mask) + pgc_plot(pgc, x + x0, y0 - y); + mask = mask >> 1; + if (mask == 0) { + mask = 0x80; + row++; + } + } + } - x0 += dev->fontx[buf[n]]; + x0 += dev->fontx[buf[n]]; } } - static void hndl_txt88(pgc_t *pgc) { - uint8_t buf[256]; - uint8_t count, mask, *row; - int16_t x0 = pgc->x >> 16; - int16_t y0 = pgc->y >> 16; + uint8_t buf[256]; + uint8_t count, mask, *row; + int16_t x0 = pgc->x >> 16; + int16_t y0 = pgc->y >> 16; unsigned n; - int x, y; + int x, y; - if (! pgc_param_byte(pgc, &count)) return; + if (!pgc_param_byte(pgc, &count)) + return; for (n = 0; n < count; n++) - if (! pgc_param_byte(pgc, &buf[n])) return; + if (!pgc_param_byte(pgc, &buf[n])) + return; buf[count] = 0; pgc_sto_raster(pgc, &x0, &y0); @@ -790,26 +805,26 @@ hndl_txt88(pgc_t *pgc) im1024_log("IM204: TXT88 (%i) x0=%i y0=%i\n", count, x0, y0); for (n = 0; n < count; n++) { - im1024_log("ch=0x%02x w=12 h=18\n", buf[n]); + im1024_log("ch=0x%02x w=12 h=18\n", buf[n]); - for (y = 0; y < 18; y++) { - mask = 0x80; - row = &fontdat12x18[buf[n]][y * 2]; - for (x = 0; x < 12; x++) { - if (row[0] & mask) pgc_plot(pgc, x + x0, y0 - y); - mask = mask >> 1; - if (mask == 0) { - mask = 0x80; - row++; - } - } - } + for (y = 0; y < 18; y++) { + mask = 0x80; + row = &fontdat12x18[buf[n]][y * 2]; + for (x = 0; x < 12; x++) { + if (row[0] & mask) + pgc_plot(pgc, x + x0, y0 - y); + mask = mask >> 1; + if (mask == 0) { + mask = 0x80; + row++; + } + } + } - x0 += 12; + x0 += 12; } } - static void hndl_imagew(pgc_t *pgc) { @@ -817,9 +832,12 @@ hndl_imagew(pgc_t *pgc) int16_t row1, col1, col2; uint8_t v1, v2; - if (! pgc_param_word(pgc, &row1)) return; - if (! pgc_param_word(pgc, &col1)) return; - if (! pgc_param_word(pgc, &col2)) return; + if (!pgc_param_word(pgc, &row1)) + return; + if (!pgc_param_word(pgc, &col1)) + return; + if (!pgc_param_word(pgc, &col2)) + return; /* Already using raster coordinates, no need to convert. */ im1024_log("IM1024: IMAGEW (row=%i,col1=%i,col2=%i)\n", row1, col1, col2); @@ -837,39 +855,42 @@ hndl_imagew(pgc_t *pgc) /* In ASCII mode, what is written is a stream of bytes. */ if (pgc->ascii_mode) { - while (col1 <= col2) { - if (! pgc_param_byte(pgc, &v1)) - return; + while (col1 <= col2) { + if (!pgc_param_byte(pgc, &v1)) + return; - pgc_write_pixel(pgc, col1, row1, v1); - col1++; - } + pgc_write_pixel(pgc, col1, row1, v1); + col1++; + } } else { - /* In hex mode, it's RLE compressed. */ - while (col1 <= col2) { - if (! pgc_param_byte(pgc, &v1)) return; + /* In hex mode, it's RLE compressed. */ + while (col1 <= col2) { + if (!pgc_param_byte(pgc, &v1)) + return; - if (v1 & 0x80) { - /* Literal run. */ - v1 -= 0x7f; - while (col1 <= col2 && v1 != 0) { - if (! pgc_param_byte(pgc, &v2)) return; - pgc_write_pixel(pgc, col1, row1, v2); - col1++; - v1--; - } - } else { - /* Repeated run. */ - if (! pgc_param_byte(pgc, &v2)) return; + if (v1 & 0x80) { + /* Literal run. */ + v1 -= 0x7f; + while (col1 <= col2 && v1 != 0) { + if (!pgc_param_byte(pgc, &v2)) + return; + pgc_write_pixel(pgc, col1, row1, v2); + col1++; + v1--; + } + } else { + /* Repeated run. */ + if (!pgc_param_byte(pgc, &v2)) + return; - v1++; - while (col1 <= col2 && v1 != 0) { - pgc_write_pixel(pgc, col1, row1, v2); - col1++; - v1--; - } - } - } + v1++; + while (col1 <= col2 && v1 != 0) { + pgc_write_pixel(pgc, col1, row1, v2); + col1++; + v1--; + } + } + } } /* Restore clipping. */ @@ -879,7 +900,6 @@ hndl_imagew(pgc_t *pgc) pgc->vp_y2 = vp_y2; } - /* * I have called this command DOT - I don't know its proper name. * @@ -889,17 +909,16 @@ static void hndl_dot(pgc_t *pgc) { int16_t x = pgc->x >> 16, - y = pgc->y >> 16; + y = pgc->y >> 16; pgc_sto_raster(pgc, &x, &y); im1024_log("IM1024: DOT @ %i,%i ink=%i mode=%i\n", - x, y, pgc->color, pgc->draw_mode); + x, y, pgc->color, pgc->draw_mode); pgc_plot(pgc, x, y); } - /* * This command (which I have called IMAGEX, since I don't know its real * name) is a screen-to-memory blit. It reads a rectangle of bytes, rather @@ -910,25 +929,28 @@ static void hndl_imagex(pgc_t *pgc) { int16_t x0, x1, y0, y1; - int16_t p,q; + int16_t p, q; - if (! pgc_param_word(pgc, &x0)) return; - if (! pgc_param_word(pgc, &y0)) return; - if (! pgc_param_word(pgc, &x1)) return; - if (! pgc_param_word(pgc, &y1)) return; + if (!pgc_param_word(pgc, &x0)) + return; + if (!pgc_param_word(pgc, &y0)) + return; + if (!pgc_param_word(pgc, &x1)) + return; + if (!pgc_param_word(pgc, &y1)) + return; /* Already using raster coordinates, no need to convert. */ - im1024_log("IM1024: IMAGEX (%i,%i,%i,%i)\n", x0,y0,x1,y1); + im1024_log("IM1024: IMAGEX (%i,%i,%i,%i)\n", x0, y0, x1, y1); for (p = y0; p <= y1; p++) { - for (q = x0; q <= x1; q++) { - if (! pgc_result_byte(pgc, pgc_read_pixel(pgc, q, p))) - return; - } + for (q = x0; q <= x1; q++) { + if (!pgc_result_byte(pgc, pgc_read_pixel(pgc, q, p))) + return; + } } } - /* * Commands implemented by the IM-1024. * @@ -938,108 +960,103 @@ hndl_imagex(pgc_t *pgc) * does not use them. */ static const pgc_cmd_t im1024_commands[] = { - { "BLKMOV", 0xdf, hndl_blkmov, pgc_parse_words, 6 }, - { "DRAW", 0x28, hndl_draw, pgc_parse_words, 2 }, - { "D", 0x28, hndl_draw, pgc_parse_words, 2 }, - { "DOT", 0x08, hndl_dot, NULL, 0 }, - { "ELIPSE", 0x39, hndl_ellipse, pgc_parse_words, 2 }, - { "EL", 0x39, hndl_ellipse, pgc_parse_words, 2 }, - { "IMAGEW", 0xd9, hndl_imagew, NULL, 0 }, - { "IMAGEX", 0xda, hndl_imagex, NULL, 0 }, - { "IMGSIZ", 0x4e, hndl_imgsiz, NULL, 0 }, - { "IPREC", 0xe4, hndl_iprec, NULL, 0 }, - { "IW", 0xd9, hndl_imagew, NULL, 0 }, - { "L8", 0xe6, pgc_hndl_lut8, NULL, 0 }, - { "LF", 0xeb, hndl_linfun, pgc_parse_bytes, 1 }, - { "LINFUN", 0xeb, hndl_linfun, pgc_parse_bytes, 1 }, - { "LUT8", 0xe6, pgc_hndl_lut8, NULL, 0 }, - { "LUT8RD", 0x53, pgc_hndl_lut8rd,NULL, 0 }, - { "L8RD", 0x53, pgc_hndl_lut8rd,NULL, 0 }, - { "TDEFIN", 0x84, hndl_tdefin, NULL, 0 }, - { "TD", 0x84, hndl_tdefin, NULL, 0 }, - { "TSIZE", 0x81, hndl_tsize, NULL, 0 }, - { "TS", 0x81, hndl_tsize, NULL, 0 }, - { "TWRITE", 0x8b, hndl_twrite, NULL, 0 }, - { "TXT88", 0x88, hndl_txt88, NULL, 0 }, - { "PAN", 0xb7, hndl_pan, NULL, 0 }, - { "POLY", 0x30, hndl_poly, parse_poly, 0 }, - { "P", 0x30, hndl_poly, parse_poly, 0 }, - { "PLINE", 0x36, hndl_pline, NULL, 0 }, - { "PL", 0x37, hndl_pline, NULL, 0 }, - { "MOVE", 0x10, hndl_move, pgc_parse_words, 2 }, - { "M", 0x10, hndl_move, pgc_parse_words, 2 }, - { "RECT", 0x34, hndl_rect, NULL, 0 }, - { "R", 0x34, hndl_rect, NULL, 0 }, - { "******", 0x00, NULL, NULL, 0 } + {"BLKMOV", 0xdf, hndl_blkmov, pgc_parse_words, 6}, + { "DRAW", 0x28, hndl_draw, pgc_parse_words, 2}, + { "D", 0x28, hndl_draw, pgc_parse_words, 2}, + { "DOT", 0x08, hndl_dot, NULL, 0}, + { "ELIPSE", 0x39, hndl_ellipse, pgc_parse_words, 2}, + { "EL", 0x39, hndl_ellipse, pgc_parse_words, 2}, + { "IMAGEW", 0xd9, hndl_imagew, NULL, 0}, + { "IMAGEX", 0xda, hndl_imagex, NULL, 0}, + { "IMGSIZ", 0x4e, hndl_imgsiz, NULL, 0}, + { "IPREC", 0xe4, hndl_iprec, NULL, 0}, + { "IW", 0xd9, hndl_imagew, NULL, 0}, + { "L8", 0xe6, pgc_hndl_lut8, NULL, 0}, + { "LF", 0xeb, hndl_linfun, pgc_parse_bytes, 1}, + { "LINFUN", 0xeb, hndl_linfun, pgc_parse_bytes, 1}, + { "LUT8", 0xe6, pgc_hndl_lut8, NULL, 0}, + { "LUT8RD", 0x53, pgc_hndl_lut8rd, NULL, 0}, + { "L8RD", 0x53, pgc_hndl_lut8rd, NULL, 0}, + { "TDEFIN", 0x84, hndl_tdefin, NULL, 0}, + { "TD", 0x84, hndl_tdefin, NULL, 0}, + { "TSIZE", 0x81, hndl_tsize, NULL, 0}, + { "TS", 0x81, hndl_tsize, NULL, 0}, + { "TWRITE", 0x8b, hndl_twrite, NULL, 0}, + { "TXT88", 0x88, hndl_txt88, NULL, 0}, + { "PAN", 0xb7, hndl_pan, NULL, 0}, + { "POLY", 0x30, hndl_poly, parse_poly, 0}, + { "P", 0x30, hndl_poly, parse_poly, 0}, + { "PLINE", 0x36, hndl_pline, NULL, 0}, + { "PL", 0x37, hndl_pline, NULL, 0}, + { "MOVE", 0x10, hndl_move, pgc_parse_words, 2}, + { "M", 0x10, hndl_move, pgc_parse_words, 2}, + { "RECT", 0x34, hndl_rect, NULL, 0}, + { "R", 0x34, hndl_rect, NULL, 0}, + { "******", 0x00, NULL, NULL, 0} }; - static void * im1024_init(const device_t *info) { im1024_t *dev; - dev = (im1024_t *)malloc(sizeof(im1024_t)); + dev = (im1024_t *) malloc(sizeof(im1024_t)); memset(dev, 0x00, sizeof(im1024_t)); loadfont(BIOS_ROM_PATH, 9); - dev->fifo_len = 4096; - dev->fifo = (uint8_t *)malloc(dev->fifo_len); + dev->fifo_len = 4096; + dev->fifo = (uint8_t *) malloc(dev->fifo_len); dev->fifo_wrptr = 0; dev->fifo_rdptr = 0; /* Create a 1024x1024 framebuffer with 1024x800 visible. */ - pgc_init(&dev->pgc, 1024, 1024, 1024, 800, input_byte, 65000000.0); + pgc_init(&dev->pgc, 1024, 1024, 1024, 800, input_byte, 65000000.0); dev->pgc.commands = im1024_commands; mem_mapping_set_handler(&dev->pgc.mapping, - im1024_read,NULL,NULL, im1024_write,NULL,NULL); + im1024_read, NULL, NULL, im1024_write, NULL, NULL); video_inform(VIDEO_FLAG_TYPE_CGA, &timing_im1024); - return(dev); + return (dev); } - static void im1024_close(void *priv) { - im1024_t *dev = (im1024_t *)priv; + im1024_t *dev = (im1024_t *) priv; pgc_close_common(&dev->pgc); free(dev); } - static int im1024_available() { return rom_present(BIOS_ROM_PATH); } - static void im1024_speed_changed(void *priv) { - im1024_t *dev = (im1024_t *)priv; + im1024_t *dev = (im1024_t *) priv; pgc_speed_changed(&dev->pgc); } - const device_t im1024_device = { - .name = "ImageManager 1024", + .name = "ImageManager 1024", .internal_name = "im1024", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 0, - .init = im1024_init, - .close = im1024_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 0, + .init = im1024_init, + .close = im1024_close, + .reset = NULL, { .available = im1024_available }, .speed_changed = im1024_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_incolor.c b/src/video/vid_incolor.c index d44321863..6bf98ab86 100644 --- a/src/video/vid_incolor.c +++ b/src/video/vid_incolor.c @@ -31,10 +31,9 @@ #include <86box/device.h> #include <86box/video.h> - /* extended CRTC registers */ #define INCOLOR_CRTC_XMODE 20 /* xMode register */ -#define INCOLOR_CRTC_UNDER 21 /* Underline */ +#define INCOLOR_CRTC_UNDER 21 /* Underline */ #define INCOLOR_CRTC_OVER 22 /* Overstrike */ #define INCOLOR_CRTC_EXCEPT 23 /* Exception */ #define INCOLOR_CRTC_MASK 24 /* Plane display mask & write mask */ @@ -44,20 +43,20 @@ #define INCOLOR_CRTC_PALETTE 28 /* Palette */ /* character width */ -#define INCOLOR_CW ((dev->crtc[INCOLOR_CRTC_XMODE] & INCOLOR_XMODE_90COL) ? 8 : 9) +#define INCOLOR_CW ((dev->crtc[INCOLOR_CRTC_XMODE] & INCOLOR_XMODE_90COL) ? 8 : 9) /* mode control register */ -#define INCOLOR_CTRL_GRAPH 0x02 -#define INCOLOR_CTRL_ENABLE 0x08 -#define INCOLOR_CTRL_BLINK 0x20 -#define INCOLOR_CTRL_PAGE1 0x80 +#define INCOLOR_CTRL_GRAPH 0x02 +#define INCOLOR_CTRL_ENABLE 0x08 +#define INCOLOR_CTRL_BLINK 0x20 +#define INCOLOR_CTRL_PAGE1 0x80 /* CRTC status register */ -#define INCOLOR_STATUS_HSYNC 0x01 /* horizontal sync */ +#define INCOLOR_STATUS_HSYNC 0x01 /* horizontal sync */ #define INCOLOR_STATUS_LIGHT 0x02 #define INCOLOR_STATUS_VIDEO 0x08 -#define INCOLOR_STATUS_ID 0x50 /* Card identification */ -#define INCOLOR_STATUS_VSYNC 0x80 /* -vertical sync */ +#define INCOLOR_STATUS_ID 0x50 /* Card identification */ +#define INCOLOR_STATUS_VSYNC 0x80 /* -vertical sync */ /* configuration switch register */ #define INCOLOR_CTRL2_GRAPH 0x01 @@ -67,17 +66,14 @@ #define INCOLOR_XMODE_RAMFONT 0x01 #define INCOLOR_XMODE_90COL 0x02 - /* Read/write control */ #define INCOLOR_RWCTRL_WRMODE 0x30 #define INCOLOR_RWCTRL_POLARITY 0x40 /* exception register */ -#define INCOLOR_EXCEPT_CURSOR 0x0F /* Cursor colour */ -#define INCOLOR_EXCEPT_PALETTE 0x10 /* Enable palette register */ -#define INCOLOR_EXCEPT_ALTATTR 0x20 /* Use alternate attributes */ - - +#define INCOLOR_EXCEPT_CURSOR 0x0F /* Cursor colour */ +#define INCOLOR_EXCEPT_PALETTE 0x10 /* Enable palette register */ +#define INCOLOR_EXCEPT_ALTATTR 0x20 /* Use alternate attributes */ /* Default palette */ static const uint8_t defpal[16] = { @@ -87,106 +83,104 @@ static const uint8_t defpal[16] = { /* Mapping of inks to RGB */ static const uint8_t init_rgb[64][3] = { - /* rgbRGB */ - { 0x00, 0x00, 0x00 }, /* 000000 */ - { 0x00, 0x00, 0xaa }, /* 000001 */ - { 0x00, 0xaa, 0x00 }, /* 000010 */ - { 0x00, 0xaa, 0xaa }, /* 000011 */ - { 0xaa, 0x00, 0x00 }, /* 000100 */ - { 0xaa, 0x00, 0xaa }, /* 000101 */ - { 0xaa, 0xaa, 0x00 }, /* 000110 */ - { 0xaa, 0xaa, 0xaa }, /* 000111 */ - { 0x00, 0x00, 0x55 }, /* 001000 */ - { 0x00, 0x00, 0xff }, /* 001001 */ - { 0x00, 0xaa, 0x55 }, /* 001010 */ - { 0x00, 0xaa, 0xff }, /* 001011 */ - { 0xaa, 0x00, 0x55 }, /* 001100 */ - { 0xaa, 0x00, 0xff }, /* 001101 */ - { 0xaa, 0xaa, 0x55 }, /* 001110 */ - { 0xaa, 0xaa, 0xff }, /* 001111 */ - { 0x00, 0x55, 0x00 }, /* 010000 */ - { 0x00, 0x55, 0xaa }, /* 010001 */ - { 0x00, 0xff, 0x00 }, /* 010010 */ - { 0x00, 0xff, 0xaa }, /* 010011 */ - { 0xaa, 0x55, 0x00 }, /* 010100 */ - { 0xaa, 0x55, 0xaa }, /* 010101 */ - { 0xaa, 0xff, 0x00 }, /* 010110 */ - { 0xaa, 0xff, 0xaa }, /* 010111 */ - { 0x00, 0x55, 0x55 }, /* 011000 */ - { 0x00, 0x55, 0xff }, /* 011001 */ - { 0x00, 0xff, 0x55 }, /* 011010 */ - { 0x00, 0xff, 0xff }, /* 011011 */ - { 0xaa, 0x55, 0x55 }, /* 011100 */ - { 0xaa, 0x55, 0xff }, /* 011101 */ - { 0xaa, 0xff, 0x55 }, /* 011110 */ - { 0xaa, 0xff, 0xff }, /* 011111 */ - { 0x55, 0x00, 0x00 }, /* 100000 */ - { 0x55, 0x00, 0xaa }, /* 100001 */ - { 0x55, 0xaa, 0x00 }, /* 100010 */ - { 0x55, 0xaa, 0xaa }, /* 100011 */ - { 0xff, 0x00, 0x00 }, /* 100100 */ - { 0xff, 0x00, 0xaa }, /* 100101 */ - { 0xff, 0xaa, 0x00 }, /* 100110 */ - { 0xff, 0xaa, 0xaa }, /* 100111 */ - { 0x55, 0x00, 0x55 }, /* 101000 */ - { 0x55, 0x00, 0xff }, /* 101001 */ - { 0x55, 0xaa, 0x55 }, /* 101010 */ - { 0x55, 0xaa, 0xff }, /* 101011 */ - { 0xff, 0x00, 0x55 }, /* 101100 */ - { 0xff, 0x00, 0xff }, /* 101101 */ - { 0xff, 0xaa, 0x55 }, /* 101110 */ - { 0xff, 0xaa, 0xff }, /* 101111 */ - { 0x55, 0x55, 0x00 }, /* 110000 */ - { 0x55, 0x55, 0xaa }, /* 110001 */ - { 0x55, 0xff, 0x00 }, /* 110010 */ - { 0x55, 0xff, 0xaa }, /* 110011 */ - { 0xff, 0x55, 0x00 }, /* 110100 */ - { 0xff, 0x55, 0xaa }, /* 110101 */ - { 0xff, 0xff, 0x00 }, /* 110110 */ - { 0xff, 0xff, 0xaa }, /* 110111 */ - { 0x55, 0x55, 0x55 }, /* 111000 */ - { 0x55, 0x55, 0xff }, /* 111001 */ - { 0x55, 0xff, 0x55 }, /* 111010 */ - { 0x55, 0xff, 0xff }, /* 111011 */ - { 0xff, 0x55, 0x55 }, /* 111100 */ - { 0xff, 0x55, 0xff }, /* 111101 */ - { 0xff, 0xff, 0x55 }, /* 111110 */ - { 0xff, 0xff, 0xff }, /* 111111 */ + /* rgbRGB */ + {0x00, 0x00, 0x00}, /* 000000 */ + { 0x00, 0x00, 0xaa}, /* 000001 */ + { 0x00, 0xaa, 0x00}, /* 000010 */ + { 0x00, 0xaa, 0xaa}, /* 000011 */ + { 0xaa, 0x00, 0x00}, /* 000100 */ + { 0xaa, 0x00, 0xaa}, /* 000101 */ + { 0xaa, 0xaa, 0x00}, /* 000110 */ + { 0xaa, 0xaa, 0xaa}, /* 000111 */ + { 0x00, 0x00, 0x55}, /* 001000 */ + { 0x00, 0x00, 0xff}, /* 001001 */ + { 0x00, 0xaa, 0x55}, /* 001010 */ + { 0x00, 0xaa, 0xff}, /* 001011 */ + { 0xaa, 0x00, 0x55}, /* 001100 */ + { 0xaa, 0x00, 0xff}, /* 001101 */ + { 0xaa, 0xaa, 0x55}, /* 001110 */ + { 0xaa, 0xaa, 0xff}, /* 001111 */ + { 0x00, 0x55, 0x00}, /* 010000 */ + { 0x00, 0x55, 0xaa}, /* 010001 */ + { 0x00, 0xff, 0x00}, /* 010010 */ + { 0x00, 0xff, 0xaa}, /* 010011 */ + { 0xaa, 0x55, 0x00}, /* 010100 */ + { 0xaa, 0x55, 0xaa}, /* 010101 */ + { 0xaa, 0xff, 0x00}, /* 010110 */ + { 0xaa, 0xff, 0xaa}, /* 010111 */ + { 0x00, 0x55, 0x55}, /* 011000 */ + { 0x00, 0x55, 0xff}, /* 011001 */ + { 0x00, 0xff, 0x55}, /* 011010 */ + { 0x00, 0xff, 0xff}, /* 011011 */ + { 0xaa, 0x55, 0x55}, /* 011100 */ + { 0xaa, 0x55, 0xff}, /* 011101 */ + { 0xaa, 0xff, 0x55}, /* 011110 */ + { 0xaa, 0xff, 0xff}, /* 011111 */ + { 0x55, 0x00, 0x00}, /* 100000 */ + { 0x55, 0x00, 0xaa}, /* 100001 */ + { 0x55, 0xaa, 0x00}, /* 100010 */ + { 0x55, 0xaa, 0xaa}, /* 100011 */ + { 0xff, 0x00, 0x00}, /* 100100 */ + { 0xff, 0x00, 0xaa}, /* 100101 */ + { 0xff, 0xaa, 0x00}, /* 100110 */ + { 0xff, 0xaa, 0xaa}, /* 100111 */ + { 0x55, 0x00, 0x55}, /* 101000 */ + { 0x55, 0x00, 0xff}, /* 101001 */ + { 0x55, 0xaa, 0x55}, /* 101010 */ + { 0x55, 0xaa, 0xff}, /* 101011 */ + { 0xff, 0x00, 0x55}, /* 101100 */ + { 0xff, 0x00, 0xff}, /* 101101 */ + { 0xff, 0xaa, 0x55}, /* 101110 */ + { 0xff, 0xaa, 0xff}, /* 101111 */ + { 0x55, 0x55, 0x00}, /* 110000 */ + { 0x55, 0x55, 0xaa}, /* 110001 */ + { 0x55, 0xff, 0x00}, /* 110010 */ + { 0x55, 0xff, 0xaa}, /* 110011 */ + { 0xff, 0x55, 0x00}, /* 110100 */ + { 0xff, 0x55, 0xaa}, /* 110101 */ + { 0xff, 0xff, 0x00}, /* 110110 */ + { 0xff, 0xff, 0xaa}, /* 110111 */ + { 0x55, 0x55, 0x55}, /* 111000 */ + { 0x55, 0x55, 0xff}, /* 111001 */ + { 0x55, 0xff, 0x55}, /* 111010 */ + { 0x55, 0xff, 0xff}, /* 111011 */ + { 0xff, 0x55, 0x55}, /* 111100 */ + { 0xff, 0x55, 0xff}, /* 111101 */ + { 0xff, 0xff, 0x55}, /* 111110 */ + { 0xff, 0xff, 0xff}, /* 111111 */ }; - typedef struct { - mem_mapping_t mapping; + mem_mapping_t mapping; - uint8_t crtc[32]; - int crtcreg; + uint8_t crtc[32]; + int crtcreg; - uint8_t ctrl, ctrl2, stat; + uint8_t ctrl, ctrl2, stat; - uint64_t dispontime, dispofftime; - pc_timer_t timer; + uint64_t dispontime, dispofftime; + pc_timer_t timer; - int firstline, lastline; + int firstline, lastline; - int linepos, displine; - int vc, sc; - uint16_t ma, maback; - int con, coff, cursoron; - int dispon, blink; - int vsynctime; - int vadj; + int linepos, displine; + int vc, sc; + uint16_t ma, maback; + int con, coff, cursoron; + int dispon, blink; + int vsynctime; + int vadj; - uint8_t palette[16]; /* EGA-style 16 -> 64 palette registers */ - uint8_t palette_idx; /* Palette write index */ - uint8_t latch[4]; /* Memory read/write latches */ + uint8_t palette[16]; /* EGA-style 16 -> 64 palette registers */ + uint8_t palette_idx; /* Palette write index */ + uint8_t latch[4]; /* Memory read/write latches */ - uint32_t rgb[64]; + uint32_t rgb[64]; - uint8_t *vram; + uint8_t *vram; } incolor_t; -static video_timings_t timing_incolor = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; - +static video_timings_t timing_incolor = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; static void recalc_timings(incolor_t *dev) @@ -194,126 +188,128 @@ recalc_timings(incolor_t *dev) double disptime; double _dispontime, _dispofftime; - disptime = dev->crtc[0] + 1; + disptime = dev->crtc[0] + 1; _dispontime = dev->crtc[1]; _dispofftime = disptime - _dispontime; - _dispontime *= HERCCONST; + _dispontime *= HERCCONST; _dispofftime *= HERCCONST; - dev->dispontime = (uint64_t)(_dispontime); - dev->dispofftime = (uint64_t)(_dispofftime); + dev->dispontime = (uint64_t) (_dispontime); + dev->dispofftime = (uint64_t) (_dispofftime); } - static void incolor_out(uint16_t port, uint8_t val, void *priv) { - incolor_t *dev = (incolor_t *)priv; - uint8_t old; + incolor_t *dev = (incolor_t *) priv; + uint8_t old; switch (port) { - case 0x3b0: - case 0x3b2: - case 0x3b4: - case 0x3b6: - dev->crtcreg = val & 31; - return; + case 0x3b0: + case 0x3b2: + case 0x3b4: + case 0x3b6: + dev->crtcreg = val & 31; + return; - case 0x3b1: case 0x3b3: case 0x3b5: case 0x3b7: - if (dev->crtcreg > 28) return; - /* Palette load register */ - if (dev->crtcreg == INCOLOR_CRTC_PALETTE) { - dev->palette[dev->palette_idx % 16] = val; - ++dev->palette_idx; - } - old = dev->crtc[dev->crtcreg]; - dev->crtc[dev->crtcreg] = val; + case 0x3b1: + case 0x3b3: + case 0x3b5: + case 0x3b7: + if (dev->crtcreg > 28) + return; + /* Palette load register */ + if (dev->crtcreg == INCOLOR_CRTC_PALETTE) { + dev->palette[dev->palette_idx % 16] = val; + ++dev->palette_idx; + } + old = dev->crtc[dev->crtcreg]; + dev->crtc[dev->crtcreg] = val; - if (dev->crtc[10] == 6 && dev->crtc[11] == 7) { - /*Fix for Generic Turbo XT BIOS, - * which sets up cursor registers wrong*/ - dev->crtc[10] = 0xb; - dev->crtc[11] = 0xc; - } - if (old ^ val) - recalc_timings(dev); - return; + if (dev->crtc[10] == 6 && dev->crtc[11] == 7) { + /*Fix for Generic Turbo XT BIOS, + * which sets up cursor registers wrong*/ + dev->crtc[10] = 0xb; + dev->crtc[11] = 0xc; + } + if (old ^ val) + recalc_timings(dev); + return; - case 0x3b8: - old = dev->ctrl; - dev->ctrl = val; - if (old ^ val) - recalc_timings(dev); - return; + case 0x3b8: + old = dev->ctrl; + dev->ctrl = val; + if (old ^ val) + recalc_timings(dev); + return; - case 0x3bf: - dev->ctrl2 = val; - if (val & 2) - mem_mapping_set_addr(&dev->mapping, 0xb0000, 0x10000); - else - mem_mapping_set_addr(&dev->mapping, 0xb0000, 0x08000); - return; + case 0x3bf: + dev->ctrl2 = val; + if (val & 2) + mem_mapping_set_addr(&dev->mapping, 0xb0000, 0x10000); + else + mem_mapping_set_addr(&dev->mapping, 0xb0000, 0x08000); + return; } } - static uint8_t incolor_in(uint16_t port, void *priv) { - incolor_t *dev = (incolor_t *)priv; - uint8_t ret = 0xff; + incolor_t *dev = (incolor_t *) priv; + uint8_t ret = 0xff; switch (port) { - case 0x3b0: - case 0x3b2: - case 0x3b4: - case 0x3b6: - ret = dev->crtcreg; - break; + case 0x3b0: + case 0x3b2: + case 0x3b4: + case 0x3b6: + ret = dev->crtcreg; + break; - case 0x3b1: - case 0x3b3: - case 0x3b5: - case 0x3b7: - if (dev->crtcreg > 28) break; + case 0x3b1: + case 0x3b3: + case 0x3b5: + case 0x3b7: + if (dev->crtcreg > 28) + break; - dev->palette_idx = 0; /* Read resets the palette index */ - ret = dev->crtc[dev->crtcreg]; - break; + dev->palette_idx = 0; /* Read resets the palette index */ + ret = dev->crtc[dev->crtcreg]; + break; - case 0x3ba: - /* 0x50: InColor card identity */ - ret = (dev->stat & 0xf) | ((dev->stat & 8) << 4) | 0x50; - break; + case 0x3ba: + /* 0x50: InColor card identity */ + ret = (dev->stat & 0xf) | ((dev->stat & 8) << 4) | 0x50; + break; - default: - break; + default: + break; } return ret; } - static void incolor_write(uint32_t addr, uint8_t val, void *priv) { - incolor_t *dev = (incolor_t *)priv; + incolor_t *dev = (incolor_t *) priv; unsigned char wmask = dev->crtc[INCOLOR_CRTC_MASK]; unsigned char wmode = dev->crtc[INCOLOR_CRTC_RWCTRL] & INCOLOR_RWCTRL_WRMODE; - unsigned char fg = dev->crtc[INCOLOR_CRTC_RWCOL] & 0x0F; - unsigned char bg = (dev->crtc[INCOLOR_CRTC_RWCOL] >> 4)&0x0F; - unsigned char w = 0; - unsigned char vmask; /* Mask of bit within byte */ - unsigned char pmask; /* Mask of plane within colour value */ + unsigned char fg = dev->crtc[INCOLOR_CRTC_RWCOL] & 0x0F; + unsigned char bg = (dev->crtc[INCOLOR_CRTC_RWCOL] >> 4) & 0x0F; + unsigned char w = 0; + unsigned char vmask; /* Mask of bit within byte */ + unsigned char pmask; /* Mask of plane within colour value */ unsigned char latch; - int plane; + int plane; addr &= 0xffff; /* In text mode, writes to the bottom 16k always touch all 4 planes */ if (!(dev->ctrl & INCOLOR_CTRL_GRAPH) && addr < 0x4000) { - dev->vram[addr] = val; - return; + dev->vram[addr] = val; + return; } /* There are four write modes: @@ -324,51 +320,60 @@ incolor_write(uint32_t addr, uint8_t val, void *priv) */ pmask = 1; for (plane = 0; plane < 4; pmask <<= 1, wmask >>= 1, addr += 0x10000, plane++) { - if (wmask & 0x10) /* Ignore writes to selected plane */ - { - continue; - } - latch = dev->latch[plane]; - for (vmask = 0x80; vmask != 0; vmask >>= 1) { - switch (wmode) { - case 0x00: - if (val & vmask) w = (fg & pmask); - else w = (bg & pmask); - break; + if (wmask & 0x10) /* Ignore writes to selected plane */ + { + continue; + } + latch = dev->latch[plane]; + for (vmask = 0x80; vmask != 0; vmask >>= 1) { + switch (wmode) { + case 0x00: + if (val & vmask) + w = (fg & pmask); + else + w = (bg & pmask); + break; - case 0x10: - if (val & vmask) w = (fg & pmask); - else w = (latch & vmask); - break; + case 0x10: + if (val & vmask) + w = (fg & pmask); + else + w = (latch & vmask); + break; - case 0x20: - if (val & vmask) w = (latch & vmask); - else w = (bg & pmask); - break; + case 0x20: + if (val & vmask) + w = (latch & vmask); + else + w = (bg & pmask); + break; - case 0x30: - if (val & vmask) w = (latch & vmask); - else w = ((~latch) & vmask); - break; - } + case 0x30: + if (val & vmask) + w = (latch & vmask); + else + w = ((~latch) & vmask); + break; + } - /* w is nonzero to write a 1, zero to write a 0 */ - if (w) dev->vram[addr] |= vmask; - else dev->vram[addr] &= ~vmask; - } + /* w is nonzero to write a 1, zero to write a 0 */ + if (w) + dev->vram[addr] |= vmask; + else + dev->vram[addr] &= ~vmask; + } } } - static uint8_t incolor_read(uint32_t addr, void *priv) { - incolor_t *dev = (incolor_t *)priv; - unsigned plane; - unsigned char lp = dev->crtc[INCOLOR_CRTC_PROTECT]; + incolor_t *dev = (incolor_t *) priv; + unsigned plane; + unsigned char lp = dev->crtc[INCOLOR_CRTC_PROTECT]; unsigned char value = 0; - unsigned char dc; /* "don't care" register */ - unsigned char bg; /* background colour */ + unsigned char dc; /* "don't care" register */ + unsigned char bg; /* background colour */ unsigned char fg; unsigned char mask, pmask; @@ -376,687 +381,613 @@ incolor_read(uint32_t addr, void *priv) /* Read the four planes into latches */ for (plane = 0; plane < 4; plane++, addr += 0x10000) { - dev->latch[plane] &= lp; - dev->latch[plane] |= (dev->vram[addr] & ~lp); + dev->latch[plane] &= lp; + dev->latch[plane] |= (dev->vram[addr] & ~lp); } addr &= 0xffff; /* In text mode, reads from the bottom 16k assume all planes have * the same contents */ if (!(dev->ctrl & INCOLOR_CTRL_GRAPH) && addr < 0x4000) { - return dev->latch[0]; + return dev->latch[0]; } /* For each pixel, work out if its colour matches the background */ for (mask = 0x80; mask != 0; mask >>= 1) { - fg = 0; - dc = dev->crtc[INCOLOR_CRTC_RWCTRL] & 0x0F; - bg = (dev->crtc[INCOLOR_CRTC_RWCOL] >> 4) & 0x0F; - for (plane = 0, pmask = 1; plane < 4; plane++, pmask <<= 1) { - if (dc & pmask) { - fg |= (bg & pmask); - } else if (dev->latch[plane] & mask) { - fg |= pmask; - } - } - if (bg == fg) value |= mask; + fg = 0; + dc = dev->crtc[INCOLOR_CRTC_RWCTRL] & 0x0F; + bg = (dev->crtc[INCOLOR_CRTC_RWCOL] >> 4) & 0x0F; + for (plane = 0, pmask = 1; plane < 4; plane++, pmask <<= 1) { + if (dc & pmask) { + fg |= (bg & pmask); + } else if (dev->latch[plane] & mask) { + fg |= pmask; + } + } + if (bg == fg) + value |= mask; } if (dev->crtc[INCOLOR_CRTC_RWCTRL] & INCOLOR_RWCTRL_POLARITY) - value = ~value; + value = ~value; return value; } - static void draw_char_rom(incolor_t *dev, int x, uint8_t chr, uint8_t attr) { - int i; - int elg, blk; - unsigned ull; - unsigned val; - unsigned ifg, ibg; - const unsigned char *fnt; - uint32_t fg, bg; - int cw = INCOLOR_CW; + int i; + int elg, blk; + unsigned ull; + unsigned val; + unsigned ifg, ibg; + const unsigned char *fnt; + uint32_t fg, bg; + int cw = INCOLOR_CW; - blk = 0; - if (dev->ctrl & INCOLOR_CTRL_BLINK) - { - if (attr & 0x80) - { - blk = (dev->blink & 16); - } - attr &= 0x7f; - } + blk = 0; + if (dev->ctrl & INCOLOR_CTRL_BLINK) { + if (attr & 0x80) { + blk = (dev->blink & 16); + } + attr &= 0x7f; + } - if (dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_ALTATTR) - { - /* MDA-compatible attributes */ - ibg = 0; - ifg = 7; - if ((attr & 0x77) == 0x70) /* Invert */ - { - ifg = 0; - ibg = 7; - } - if (attr & 8) - { - ifg |= 8; /* High intensity FG */ - } - if (attr & 0x80) - { - ibg |= 8; /* High intensity BG */ - } - if ((attr & 0x77) == 0) /* Blank */ - { - ifg = ibg; - } - ull = ((attr & 0x07) == 1) ? 13 : 0xffff; - } - else - { - /* CGA-compatible attributes */ - ull = 0xffff; - ifg = attr & 0x0F; - ibg = (attr >> 4) & 0x0F; - } - if (dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_PALETTE) - { - fg = dev->rgb[dev->palette[ifg]]; - bg = dev->rgb[dev->palette[ibg]]; - } - else - { - fg = dev->rgb[defpal[ifg]]; - bg = dev->rgb[defpal[ibg]]; - } + if (dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_ALTATTR) { + /* MDA-compatible attributes */ + ibg = 0; + ifg = 7; + if ((attr & 0x77) == 0x70) /* Invert */ + { + ifg = 0; + ibg = 7; + } + if (attr & 8) { + ifg |= 8; /* High intensity FG */ + } + if (attr & 0x80) { + ibg |= 8; /* High intensity BG */ + } + if ((attr & 0x77) == 0) /* Blank */ + { + ifg = ibg; + } + ull = ((attr & 0x07) == 1) ? 13 : 0xffff; + } else { + /* CGA-compatible attributes */ + ull = 0xffff; + ifg = attr & 0x0F; + ibg = (attr >> 4) & 0x0F; + } + if (dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_PALETTE) { + fg = dev->rgb[dev->palette[ifg]]; + bg = dev->rgb[dev->palette[ibg]]; + } else { + fg = dev->rgb[defpal[ifg]]; + bg = dev->rgb[defpal[ibg]]; + } - /* ELG set to stretch 8px character to 9px */ - if (dev->crtc[INCOLOR_CRTC_XMODE] & INCOLOR_XMODE_90COL) - { - elg = 0; - } - else - { - elg = ((chr >= 0xc0) && (chr <= 0xdf)); - } + /* ELG set to stretch 8px character to 9px */ + if (dev->crtc[INCOLOR_CRTC_XMODE] & INCOLOR_XMODE_90COL) { + elg = 0; + } else { + elg = ((chr >= 0xc0) && (chr <= 0xdf)); + } - fnt = &(fontdatm[chr][dev->sc]); + fnt = &(fontdatm[chr][dev->sc]); - if (blk) - { - val = 0x000; /* Blinking, draw all background */ - } - else if (dev->sc == ull) - { - val = 0x1ff; /* Underscore, draw all foreground */ - } - else - { - val = fnt[0] << 1; + if (blk) { + val = 0x000; /* Blinking, draw all background */ + } else if (dev->sc == ull) { + val = 0x1ff; /* Underscore, draw all foreground */ + } else { + val = fnt[0] << 1; - if (elg) - { - val |= (val >> 1) & 1; - } - } - for (i = 0; i < cw; i++) - { - buffer32->line[dev->displine][x * cw + i] = (val & 0x100) ? fg : bg; - val = val << 1; - } + if (elg) { + val |= (val >> 1) & 1; + } + } + for (i = 0; i < cw; i++) { + buffer32->line[dev->displine][x * cw + i] = (val & 0x100) ? fg : bg; + val = val << 1; + } } - static void draw_char_ram4(incolor_t *dev, int x, uint8_t chr, uint8_t attr) { - int i; - int elg, blk; - unsigned ull; - unsigned val[4]; - unsigned ifg, ibg, cfg, pmask, plane; - const unsigned char *fnt; - uint32_t fg; - int cw = INCOLOR_CW; - int blink = dev->ctrl & INCOLOR_CTRL_BLINK; - int altattr = dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_ALTATTR; - int palette = dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_PALETTE; + int i; + int elg, blk; + unsigned ull; + unsigned val[4]; + unsigned ifg, ibg, cfg, pmask, plane; + const unsigned char *fnt; + uint32_t fg; + int cw = INCOLOR_CW; + int blink = dev->ctrl & INCOLOR_CTRL_BLINK; + int altattr = dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_ALTATTR; + int palette = dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_PALETTE; - blk = 0; - if (blink) - { - if (attr & 0x80) - { - blk = (dev->blink & 16); - } - attr &= 0x7f; - } + blk = 0; + if (blink) { + if (attr & 0x80) { + blk = (dev->blink & 16); + } + attr &= 0x7f; + } - if (altattr) - { - /* MDA-compatible attributes */ - ibg = 0; - ifg = 7; - if ((attr & 0x77) == 0x70) /* Invert */ - { - ifg = 0; - ibg = 7; - } - if (attr & 8) - { - ifg |= 8; /* High intensity FG */ - } - if (attr & 0x80) - { - ibg |= 8; /* High intensity BG */ - } - if ((attr & 0x77) == 0) /* Blank */ - { - ifg = ibg; - } - ull = ((attr & 0x07) == 1) ? 13 : 0xffff; - } - else - { - /* CGA-compatible attributes */ - ull = 0xffff; - ifg = attr & 0x0F; - ibg = (attr >> 4) & 0x0F; - } - if (dev->crtc[INCOLOR_CRTC_XMODE] & INCOLOR_XMODE_90COL) - { - elg = 0; - } - else - { - elg = ((chr >= 0xc0) && (chr <= 0xdf)); - } - fnt = dev->vram + 0x4000 + 16 * chr + dev->sc; + if (altattr) { + /* MDA-compatible attributes */ + ibg = 0; + ifg = 7; + if ((attr & 0x77) == 0x70) /* Invert */ + { + ifg = 0; + ibg = 7; + } + if (attr & 8) { + ifg |= 8; /* High intensity FG */ + } + if (attr & 0x80) { + ibg |= 8; /* High intensity BG */ + } + if ((attr & 0x77) == 0) /* Blank */ + { + ifg = ibg; + } + ull = ((attr & 0x07) == 1) ? 13 : 0xffff; + } else { + /* CGA-compatible attributes */ + ull = 0xffff; + ifg = attr & 0x0F; + ibg = (attr >> 4) & 0x0F; + } + if (dev->crtc[INCOLOR_CRTC_XMODE] & INCOLOR_XMODE_90COL) { + elg = 0; + } else { + elg = ((chr >= 0xc0) && (chr <= 0xdf)); + } + fnt = dev->vram + 0x4000 + 16 * chr + dev->sc; - if (blk) - { - /* Blinking, draw all background */ - val[0] = val[1] = val[2] = val[3] = 0x000; - } - else if (dev->sc == ull) - { - /* Underscore, draw all foreground */ - val[0] = val[1] = val[2] = val[3] = 0x1ff; - } - else - { - val[0] = fnt[0x00000] << 1; - val[1] = fnt[0x10000] << 1; - val[2] = fnt[0x20000] << 1; - val[3] = fnt[0x30000] << 1; + if (blk) { + /* Blinking, draw all background */ + val[0] = val[1] = val[2] = val[3] = 0x000; + } else if (dev->sc == ull) { + /* Underscore, draw all foreground */ + val[0] = val[1] = val[2] = val[3] = 0x1ff; + } else { + val[0] = fnt[0x00000] << 1; + val[1] = fnt[0x10000] << 1; + val[2] = fnt[0x20000] << 1; + val[3] = fnt[0x30000] << 1; - if (elg) - { - val[0] |= (val[0] >> 1) & 1; - val[1] |= (val[1] >> 1) & 1; - val[2] |= (val[2] >> 1) & 1; - val[3] |= (val[3] >> 1) & 1; - } - } - for (i = 0; i < cw; i++) - { - /* Generate pixel colour */ - cfg = 0; - pmask = 1; - for (plane = 0; plane < 4; plane++, pmask = pmask << 1) - { - if (val[plane] & 0x100) cfg |= (ifg & pmask); - else cfg |= (ibg & pmask); - } - /* cfg = colour of foreground pixels */ - if (altattr && (attr & 0x77) == 0) cfg = ibg; /* 'blank' attribute */ - if (palette) - { - fg = dev->rgb[dev->palette[cfg]]; - } - else - { - fg = dev->rgb[defpal[cfg]]; - } + if (elg) { + val[0] |= (val[0] >> 1) & 1; + val[1] |= (val[1] >> 1) & 1; + val[2] |= (val[2] >> 1) & 1; + val[3] |= (val[3] >> 1) & 1; + } + } + for (i = 0; i < cw; i++) { + /* Generate pixel colour */ + cfg = 0; + pmask = 1; + for (plane = 0; plane < 4; plane++, pmask = pmask << 1) { + if (val[plane] & 0x100) + cfg |= (ifg & pmask); + else + cfg |= (ibg & pmask); + } + /* cfg = colour of foreground pixels */ + if (altattr && (attr & 0x77) == 0) + cfg = ibg; /* 'blank' attribute */ + if (palette) { + fg = dev->rgb[dev->palette[cfg]]; + } else { + fg = dev->rgb[defpal[cfg]]; + } - buffer32->line[dev->displine][x * cw + i] = fg; - val[0] = val[0] << 1; - val[1] = val[1] << 1; - val[2] = val[2] << 1; - val[3] = val[3] << 1; - } + buffer32->line[dev->displine][x * cw + i] = fg; + val[0] = val[0] << 1; + val[1] = val[1] << 1; + val[2] = val[2] << 1; + val[3] = val[3] << 1; + } } - static void draw_char_ram48(incolor_t *dev, int x, uint8_t chr, uint8_t attr) { - int i; - int elg, blk, ul, ol, bld; - unsigned ull, oll, ulc = 0, olc = 0; - unsigned val[4]; - unsigned ifg = 0, ibg, cfg, pmask, plane; - const unsigned char *fnt; - uint32_t fg; - int cw = INCOLOR_CW; - int blink = dev->ctrl & INCOLOR_CTRL_BLINK; - int altattr = dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_ALTATTR; - int palette = dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_PALETTE; - int font = (attr & 0x0F); + int i; + int elg, blk, ul, ol, bld; + unsigned ull, oll, ulc = 0, olc = 0; + unsigned val[4]; + unsigned ifg = 0, ibg, cfg, pmask, plane; + const unsigned char *fnt; + uint32_t fg; + int cw = INCOLOR_CW; + int blink = dev->ctrl & INCOLOR_CTRL_BLINK; + int altattr = dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_ALTATTR; + int palette = dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_PALETTE; + int font = (attr & 0x0F); - if (font >= 12) font &= 7; + if (font >= 12) + font &= 7; - blk = 0; - if (blink && altattr) - { - if (attr & 0x40) - { - blk = (dev->blink & 16); - } - attr &= 0x7f; - } - if (altattr) - { - /* MDA-compatible attributes */ - if (blink) - { - ibg = (attr & 0x80) ? 8 : 0; - bld = 0; - ol = (attr & 0x20) ? 1 : 0; - ul = (attr & 0x10) ? 1 : 0; - } - else - { - bld = (attr & 0x80) ? 1 : 0; - ibg = (attr & 0x40) ? 0x0F : 0; - ol = (attr & 0x20) ? 1 : 0; - ul = (attr & 0x10) ? 1 : 0; - } - } - else - { - /* CGA-compatible attributes */ - ibg = 0; - ifg = (attr >> 4) & 0x0F; - ol = 0; - ul = 0; - bld = 0; - } - if (ul) - { - ull = dev->crtc[INCOLOR_CRTC_UNDER] & 0x0F; - ulc = (dev->crtc[INCOLOR_CRTC_UNDER] >> 4) & 0x0F; - if (ulc == 0) ulc = 7; - } - else - { - ull = 0xFFFF; - } - if (ol) - { - oll = dev->crtc[INCOLOR_CRTC_OVER] & 0x0F; - olc = (dev->crtc[INCOLOR_CRTC_OVER] >> 4) & 0x0F; - if (olc == 0) olc = 7; - } - else - { - oll = 0xFFFF; - } + blk = 0; + if (blink && altattr) { + if (attr & 0x40) { + blk = (dev->blink & 16); + } + attr &= 0x7f; + } + if (altattr) { + /* MDA-compatible attributes */ + if (blink) { + ibg = (attr & 0x80) ? 8 : 0; + bld = 0; + ol = (attr & 0x20) ? 1 : 0; + ul = (attr & 0x10) ? 1 : 0; + } else { + bld = (attr & 0x80) ? 1 : 0; + ibg = (attr & 0x40) ? 0x0F : 0; + ol = (attr & 0x20) ? 1 : 0; + ul = (attr & 0x10) ? 1 : 0; + } + } else { + /* CGA-compatible attributes */ + ibg = 0; + ifg = (attr >> 4) & 0x0F; + ol = 0; + ul = 0; + bld = 0; + } + if (ul) { + ull = dev->crtc[INCOLOR_CRTC_UNDER] & 0x0F; + ulc = (dev->crtc[INCOLOR_CRTC_UNDER] >> 4) & 0x0F; + if (ulc == 0) + ulc = 7; + } else { + ull = 0xFFFF; + } + if (ol) { + oll = dev->crtc[INCOLOR_CRTC_OVER] & 0x0F; + olc = (dev->crtc[INCOLOR_CRTC_OVER] >> 4) & 0x0F; + if (olc == 0) + olc = 7; + } else { + oll = 0xFFFF; + } - if (dev->crtc[INCOLOR_CRTC_XMODE] & INCOLOR_XMODE_90COL) - { - elg = 0; - } - else - { - elg = ((chr >= 0xc0) && (chr <= 0xdf)); - } - fnt = dev->vram + 0x4000 + 16 * chr + 4096 * font + dev->sc; + if (dev->crtc[INCOLOR_CRTC_XMODE] & INCOLOR_XMODE_90COL) { + elg = 0; + } else { + elg = ((chr >= 0xc0) && (chr <= 0xdf)); + } + fnt = dev->vram + 0x4000 + 16 * chr + 4096 * font + dev->sc; - if (blk) - { - /* Blinking, draw all background */ - val[0] = val[1] = val[2] = val[3] = 0x000; - } - else if (dev->sc == ull) - { - /* Underscore, draw all foreground */ - val[0] = val[1] = val[2] = val[3] = 0x1ff; - } - else - { - val[0] = fnt[0x00000] << 1; - val[1] = fnt[0x10000] << 1; - val[2] = fnt[0x20000] << 1; - val[3] = fnt[0x30000] << 1; + if (blk) { + /* Blinking, draw all background */ + val[0] = val[1] = val[2] = val[3] = 0x000; + } else if (dev->sc == ull) { + /* Underscore, draw all foreground */ + val[0] = val[1] = val[2] = val[3] = 0x1ff; + } else { + val[0] = fnt[0x00000] << 1; + val[1] = fnt[0x10000] << 1; + val[2] = fnt[0x20000] << 1; + val[3] = fnt[0x30000] << 1; - if (elg) - { - val[0] |= (val[0] >> 1) & 1; - val[1] |= (val[1] >> 1) & 1; - val[2] |= (val[2] >> 1) & 1; - val[3] |= (val[3] >> 1) & 1; - } - if (bld) - { - val[0] |= (val[0] >> 1); - val[1] |= (val[1] >> 1); - val[2] |= (val[2] >> 1); - val[3] |= (val[3] >> 1); - } - } - for (i = 0; i < cw; i++) - { - /* Generate pixel colour */ - cfg = 0; - pmask = 1; - if (dev->sc == oll) - { - cfg = olc ^ ibg; /* Strikethrough */ - } - else if (dev->sc == ull) - { - cfg = ulc ^ ibg; /* Underline */ - } - else - { - for (plane = 0; plane < 4; plane++, pmask = pmask << 1) - { - if (val[plane] & 0x100) - { - if (altattr) cfg |= ((~ibg) & pmask); - else cfg |= ((~ifg) & pmask); - } - else if (altattr) cfg |= (ibg & pmask); - } - } - if (palette) - { - fg = dev->rgb[dev->palette[cfg]]; - } - else - { - fg = dev->rgb[defpal[cfg]]; - } + if (elg) { + val[0] |= (val[0] >> 1) & 1; + val[1] |= (val[1] >> 1) & 1; + val[2] |= (val[2] >> 1) & 1; + val[3] |= (val[3] >> 1) & 1; + } + if (bld) { + val[0] |= (val[0] >> 1); + val[1] |= (val[1] >> 1); + val[2] |= (val[2] >> 1); + val[3] |= (val[3] >> 1); + } + } + for (i = 0; i < cw; i++) { + /* Generate pixel colour */ + cfg = 0; + pmask = 1; + if (dev->sc == oll) { + cfg = olc ^ ibg; /* Strikethrough */ + } else if (dev->sc == ull) { + cfg = ulc ^ ibg; /* Underline */ + } else { + for (plane = 0; plane < 4; plane++, pmask = pmask << 1) { + if (val[plane] & 0x100) { + if (altattr) + cfg |= ((~ibg) & pmask); + else + cfg |= ((~ifg) & pmask); + } else if (altattr) + cfg |= (ibg & pmask); + } + } + if (palette) { + fg = dev->rgb[dev->palette[cfg]]; + } else { + fg = dev->rgb[defpal[cfg]]; + } - buffer32->line[dev->displine][x * cw + i] = fg; - val[0] = val[0] << 1; - val[1] = val[1] << 1; - val[2] = val[2] << 1; - val[3] = val[3] << 1; - } + buffer32->line[dev->displine][x * cw + i] = fg; + val[0] = val[0] << 1; + val[1] = val[1] << 1; + val[2] = val[2] << 1; + val[3] = val[3] << 1; + } } - static void text_line(incolor_t *dev, uint16_t ca) { - int drawcursor; - int x, c; - uint8_t chr, attr; + int drawcursor; + int x, c; + uint8_t chr, attr; uint32_t col; for (x = 0; x < dev->crtc[1]; x++) { - if (dev->ctrl & 8) { - chr = dev->vram[(dev->ma << 1) & 0xfff]; - attr = dev->vram[((dev->ma << 1) + 1) & 0xfff]; - } else - chr = attr = 0; + if (dev->ctrl & 8) { + chr = dev->vram[(dev->ma << 1) & 0xfff]; + attr = dev->vram[((dev->ma << 1) + 1) & 0xfff]; + } else + chr = attr = 0; - drawcursor = ((dev->ma == ca) && dev->con && dev->cursoron); + drawcursor = ((dev->ma == ca) && dev->con && dev->cursoron); - switch (dev->crtc[INCOLOR_CRTC_XMODE] & 5) { - case 0: - case 4: /* ROM font */ - draw_char_rom(dev, x, chr, attr); - break; + switch (dev->crtc[INCOLOR_CRTC_XMODE] & 5) { + case 0: + case 4: /* ROM font */ + draw_char_rom(dev, x, chr, attr); + break; - case 1: /* 4k RAMfont */ - draw_char_ram4(dev, x, chr, attr); - break; + case 1: /* 4k RAMfont */ + draw_char_ram4(dev, x, chr, attr); + break; - case 5: /* 48k RAMfont */ - draw_char_ram48(dev, x, chr, attr); - break; - } - ++dev->ma; + case 5: /* 48k RAMfont */ + draw_char_ram48(dev, x, chr, attr); + break; + } + ++dev->ma; - if (drawcursor) { - int cw = INCOLOR_CW; - uint8_t ink = dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_CURSOR; - if (ink == 0) ink = (attr & 0x08) | 7; + if (drawcursor) { + int cw = INCOLOR_CW; + uint8_t ink = dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_CURSOR; + if (ink == 0) + ink = (attr & 0x08) | 7; - /* In MDA-compatible mode, cursor brightness comes from - * background */ - if (dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_ALTATTR) - { - ink = (attr & 0x08) | (ink & 7); - } - if (dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_PALETTE) - { - col = dev->rgb[dev->palette[ink]]; - } - else - { - col = dev->rgb[defpal[ink]]; - } - for (c = 0; c < cw; c++) - { - buffer32->line[dev->displine][x * cw + c] = col; - } - } + /* In MDA-compatible mode, cursor brightness comes from + * background */ + if (dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_ALTATTR) { + ink = (attr & 0x08) | (ink & 7); + } + if (dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_PALETTE) { + col = dev->rgb[dev->palette[ink]]; + } else { + col = dev->rgb[defpal[ink]]; + } + for (c = 0; c < cw; c++) { + buffer32->line[dev->displine][x * cw + c] = col; + } + } } } - static void graphics_line(incolor_t *dev) { - uint8_t mask; + uint8_t mask; uint16_t ca; - int x, c, plane, col; - uint8_t ink; + int x, c, plane, col; + uint8_t ink; uint16_t val[4]; /* Graphics mode. */ ca = (dev->sc & 3) * 0x2000; if ((dev->ctrl & INCOLOR_CTRL_PAGE1) && (dev->ctrl2 & INCOLOR_CTRL2_PAGE1)) - ca += 0x8000; + ca += 0x8000; for (x = 0; x < dev->crtc[1]; x++) { - mask = dev->crtc[INCOLOR_CRTC_MASK]; /* Planes to display */ - for (plane = 0; plane < 4; plane++, mask = mask >> 1) - { - if (dev->ctrl & 8) { - if (mask & 1) - val[plane] = (dev->vram[((dev->ma << 1) & 0x1fff) + ca + 0x10000 * plane] << 8) | - dev->vram[((dev->ma << 1) & 0x1fff) + ca + 0x10000 * plane + 1]; - else val[plane] = 0; - } else - val[plane] = 0; - } - dev->ma++; + mask = dev->crtc[INCOLOR_CRTC_MASK]; /* Planes to display */ + for (plane = 0; plane < 4; plane++, mask = mask >> 1) { + if (dev->ctrl & 8) { + if (mask & 1) + val[plane] = (dev->vram[((dev->ma << 1) & 0x1fff) + ca + 0x10000 * plane] << 8) | dev->vram[((dev->ma << 1) & 0x1fff) + ca + 0x10000 * plane + 1]; + else + val[plane] = 0; + } else + val[plane] = 0; + } + dev->ma++; - for (c = 0; c < 16; c++) - { - ink = 0; - for (plane = 0; plane < 4; plane++) - { - ink = ink >> 1; - if (val[plane] & 0x8000) ink |= 8; - val[plane] = val[plane] << 1; - } - /* Is palette in use? */ - if (dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_PALETTE) - col = dev->palette[ink]; - else col = defpal[ink]; + for (c = 0; c < 16; c++) { + ink = 0; + for (plane = 0; plane < 4; plane++) { + ink = ink >> 1; + if (val[plane] & 0x8000) + ink |= 8; + val[plane] = val[plane] << 1; + } + /* Is palette in use? */ + if (dev->crtc[INCOLOR_CRTC_EXCEPT] & INCOLOR_EXCEPT_PALETTE) + col = dev->palette[ink]; + else + col = defpal[ink]; - buffer32->line[dev->displine][(x << 4) + c] = dev->rgb[col]; - } + buffer32->line[dev->displine][(x << 4) + c] = dev->rgb[col]; + } } } - static void incolor_poll(void *priv) { - incolor_t *dev = (incolor_t *)priv; - uint16_t ca = (dev->crtc[15] | (dev->crtc[14] << 8)) & 0x3fff; - int x; - int oldvc; - int oldsc; + incolor_t *dev = (incolor_t *) priv; + uint16_t ca = (dev->crtc[15] | (dev->crtc[14] << 8)) & 0x3fff; + int x; + int oldvc; + int oldsc; - if (! dev->linepos) { - timer_advance_u64(&dev->timer, dev->dispofftime); - dev->stat |= 1; - dev->linepos = 1; - oldsc = dev->sc; - if ((dev->crtc[8] & 3) == 3) - dev->sc = (dev->sc << 1) & 7; + if (!dev->linepos) { + timer_advance_u64(&dev->timer, dev->dispofftime); + dev->stat |= 1; + dev->linepos = 1; + oldsc = dev->sc; + if ((dev->crtc[8] & 3) == 3) + dev->sc = (dev->sc << 1) & 7; - if (dev->dispon) { - if (dev->displine < dev->firstline) { - dev->firstline = dev->displine; - video_wait_for_buffer(); - } - dev->lastline = dev->displine; - if ((dev->ctrl & INCOLOR_CTRL_GRAPH) && (dev->ctrl2 & INCOLOR_CTRL2_GRAPH)) - graphics_line(dev); - else - text_line(dev, ca); - } - dev->sc = oldsc; - if (dev->vc == dev->crtc[7] && !dev->sc) - dev->stat |= 8; - dev->displine++; - if (dev->displine >= 500) - dev->displine = 0; + if (dev->dispon) { + if (dev->displine < dev->firstline) { + dev->firstline = dev->displine; + video_wait_for_buffer(); + } + dev->lastline = dev->displine; + if ((dev->ctrl & INCOLOR_CTRL_GRAPH) && (dev->ctrl2 & INCOLOR_CTRL2_GRAPH)) + graphics_line(dev); + else + text_line(dev, ca); + } + dev->sc = oldsc; + if (dev->vc == dev->crtc[7] && !dev->sc) + dev->stat |= 8; + dev->displine++; + if (dev->displine >= 500) + dev->displine = 0; } else { - timer_advance_u64(&dev->timer, dev->dispontime); - if (dev->dispon) - dev->stat &= ~1; - dev->linepos = 0; - if (dev->vsynctime) { - dev->vsynctime--; - if (! dev->vsynctime) - dev->stat &= ~8; - } + timer_advance_u64(&dev->timer, dev->dispontime); + if (dev->dispon) + dev->stat &= ~1; + dev->linepos = 0; + if (dev->vsynctime) { + dev->vsynctime--; + if (!dev->vsynctime) + dev->stat &= ~8; + } - if (dev->sc == (dev->crtc[11] & 31) || ((dev->crtc[8] & 3) == 3 && dev->sc == ((dev->crtc[11] & 31) >> 1))) { - dev->con = 0; - dev->coff = 1; - } + if (dev->sc == (dev->crtc[11] & 31) || ((dev->crtc[8] & 3) == 3 && dev->sc == ((dev->crtc[11] & 31) >> 1))) { + dev->con = 0; + dev->coff = 1; + } - if (dev->vadj) { - dev->sc++; - dev->sc &= 31; - dev->ma = dev->maback; - dev->vadj--; - if (! dev->vadj) { - dev->dispon = 1; - dev->ma = dev->maback = (dev->crtc[13] | (dev->crtc[12] << 8)) & 0x3fff; - dev->sc = 0; - } - } else if (dev->sc == dev->crtc[9] || ((dev->crtc[8] & 3) == 3 && dev->sc == (dev->crtc[9] >> 1))) { - dev->maback = dev->ma; - dev->sc = 0; - oldvc = dev->vc; - dev->vc++; - dev->vc &= 127; - if (dev->vc == dev->crtc[6]) - dev->dispon = 0; - if (oldvc == dev->crtc[4]) { - dev->vc = 0; - dev->vadj = dev->crtc[5]; - if (!dev->vadj) dev->dispon=1; - if (!dev->vadj) dev->ma = dev->maback = (dev->crtc[13] | (dev->crtc[12] << 8)) & 0x3fff; - if ((dev->crtc[10] & 0x60) == 0x20) dev->cursoron = 0; - else dev->cursoron = dev->blink & 16; - } + if (dev->vadj) { + dev->sc++; + dev->sc &= 31; + dev->ma = dev->maback; + dev->vadj--; + if (!dev->vadj) { + dev->dispon = 1; + dev->ma = dev->maback = (dev->crtc[13] | (dev->crtc[12] << 8)) & 0x3fff; + dev->sc = 0; + } + } else if (dev->sc == dev->crtc[9] || ((dev->crtc[8] & 3) == 3 && dev->sc == (dev->crtc[9] >> 1))) { + dev->maback = dev->ma; + dev->sc = 0; + oldvc = dev->vc; + dev->vc++; + dev->vc &= 127; + if (dev->vc == dev->crtc[6]) + dev->dispon = 0; + if (oldvc == dev->crtc[4]) { + dev->vc = 0; + dev->vadj = dev->crtc[5]; + if (!dev->vadj) + dev->dispon = 1; + if (!dev->vadj) + dev->ma = dev->maback = (dev->crtc[13] | (dev->crtc[12] << 8)) & 0x3fff; + if ((dev->crtc[10] & 0x60) == 0x20) + dev->cursoron = 0; + else + dev->cursoron = dev->blink & 16; + } - if (dev->vc == dev->crtc[7]) { - dev->dispon = 0; - dev->displine = 0; - dev->vsynctime = 16; - if (dev->crtc[7]) { - if ((dev->ctrl & INCOLOR_CTRL_GRAPH) && (dev->ctrl2 & INCOLOR_CTRL2_GRAPH)) - x = dev->crtc[1] << 4; - else - x = dev->crtc[1] * 9; - dev->lastline++; - if ((dev->ctrl & 8) && - ((x != xsize) || ((dev->lastline - dev->firstline) != ysize) || video_force_resize_get())) { - xsize = x; - ysize = dev->lastline - dev->firstline; - if (xsize < 64) xsize = 656; - if (ysize < 32) ysize = 200; - set_screen_size(xsize, ysize); + if (dev->vc == dev->crtc[7]) { + dev->dispon = 0; + dev->displine = 0; + dev->vsynctime = 16; + if (dev->crtc[7]) { + if ((dev->ctrl & INCOLOR_CTRL_GRAPH) && (dev->ctrl2 & INCOLOR_CTRL2_GRAPH)) + x = dev->crtc[1] << 4; + else + x = dev->crtc[1] * 9; + dev->lastline++; + if ((dev->ctrl & 8) && ((x != xsize) || ((dev->lastline - dev->firstline) != ysize) || video_force_resize_get())) { + xsize = x; + ysize = dev->lastline - dev->firstline; + if (xsize < 64) + xsize = 656; + if (ysize < 32) + ysize = 200; + set_screen_size(xsize, ysize); - if (video_force_resize_get()) - video_force_resize_set(0); - } - video_blit_memtoscreen(0, dev->firstline, xsize, dev->lastline - dev->firstline); - frames++; - if ((dev->ctrl & INCOLOR_CTRL_GRAPH) && (dev->ctrl2 & INCOLOR_CTRL2_GRAPH)) { - video_res_x = dev->crtc[1] * 16; - video_res_y = dev->crtc[6] * 4; - video_bpp = 1; - } else { - video_res_x = dev->crtc[1]; - video_res_y = dev->crtc[6]; - video_bpp = 0; - } - } - dev->firstline = 1000; - dev->lastline = 0; - dev->blink++; - } - } else { - dev->sc++; - dev->sc &= 31; - dev->ma = dev->maback; - } + if (video_force_resize_get()) + video_force_resize_set(0); + } + video_blit_memtoscreen(0, dev->firstline, xsize, dev->lastline - dev->firstline); + frames++; + if ((dev->ctrl & INCOLOR_CTRL_GRAPH) && (dev->ctrl2 & INCOLOR_CTRL2_GRAPH)) { + video_res_x = dev->crtc[1] * 16; + video_res_y = dev->crtc[6] * 4; + video_bpp = 1; + } else { + video_res_x = dev->crtc[1]; + video_res_y = dev->crtc[6]; + video_bpp = 0; + } + } + dev->firstline = 1000; + dev->lastline = 0; + dev->blink++; + } + } else { + dev->sc++; + dev->sc &= 31; + dev->ma = dev->maback; + } - if ((dev->sc == (dev->crtc[10] & 31) || ((dev->crtc[8] & 3) == 3 && dev->sc == ((dev->crtc[10] & 31) >> 1)))) - dev->con = 1; + if ((dev->sc == (dev->crtc[10] & 31) || ((dev->crtc[8] & 3) == 3 && dev->sc == ((dev->crtc[10] & 31) >> 1)))) + dev->con = 1; } } - static void * incolor_init(const device_t *info) { incolor_t *dev; - int c; + int c; - dev = (incolor_t *)malloc(sizeof(incolor_t)); + dev = (incolor_t *) malloc(sizeof(incolor_t)); memset(dev, 0x00, sizeof(incolor_t)); - dev->vram = (uint8_t *)malloc(0x40000); /* 4 planes of 64k */ + dev->vram = (uint8_t *) malloc(0x40000); /* 4 planes of 64k */ - timer_add(&dev->timer, incolor_poll, dev, 1); + timer_add(&dev->timer, incolor_poll, dev, 1); mem_mapping_add(&dev->mapping, 0xb0000, 0x08000, - incolor_read,NULL,NULL, incolor_write,NULL,NULL, - NULL, MEM_MAPPING_EXTERNAL, dev); + incolor_read, NULL, NULL, incolor_write, NULL, NULL, + NULL, MEM_MAPPING_EXTERNAL, dev); io_sethandler(0x03b0, 16, - incolor_in,NULL,NULL, incolor_out,NULL,NULL, dev); + incolor_in, NULL, NULL, incolor_out, NULL, NULL, dev); for (c = 0; c < 64; c++) { - dev->rgb[c] = makecol32(init_rgb[c][0], init_rgb[c][1], init_rgb[c][2]); + dev->rgb[c] = makecol32(init_rgb[c][0], init_rgb[c][1], init_rgb[c][2]); } /* Initialise CRTC regs to safe values */ - dev->crtc[INCOLOR_CRTC_MASK ] = 0x0F; /* All planes displayed */ + dev->crtc[INCOLOR_CRTC_MASK] = 0x0F; /* All planes displayed */ dev->crtc[INCOLOR_CRTC_RWCTRL] = INCOLOR_RWCTRL_POLARITY; - dev->crtc[INCOLOR_CRTC_RWCOL ] = 0x0F; /* White on black */ + dev->crtc[INCOLOR_CRTC_RWCOL] = 0x0F; /* White on black */ dev->crtc[INCOLOR_CRTC_EXCEPT] = INCOLOR_EXCEPT_ALTATTR; for (c = 0; c < 16; c++) - dev->palette[c] = defpal[c]; + dev->palette[c] = defpal[c]; dev->palette_idx = 0; video_inform(VIDEO_FLAG_TYPE_MDA, &timing_incolor); @@ -1067,40 +998,38 @@ incolor_init(const device_t *info) return dev; } - static void incolor_close(void *priv) { - incolor_t *dev = (incolor_t *)priv; + incolor_t *dev = (incolor_t *) priv; if (!dev) - return; + return; if (dev->vram) - free(dev->vram); + free(dev->vram); free(dev); } - static void speed_changed(void *priv) { - incolor_t *dev = (incolor_t *)priv; + incolor_t *dev = (incolor_t *) priv; recalc_timings(dev); } const device_t incolor_device = { - .name = "Hercules InColor", + .name = "Hercules InColor", .internal_name = "incolor", - .flags = DEVICE_ISA, - .local = 0, - .init = incolor_init, - .close = incolor_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = incolor_init, + .close = incolor_close, + .reset = NULL, { .available = NULL }, .speed_changed = speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_mda.c b/src/video/vid_mda.c index 0a4ed3c47..d02670d6a 100644 --- a/src/video/vid_mda.c +++ b/src/video/vid_mda.c @@ -34,305 +34,310 @@ static int mdacols[256][2][2]; -static video_timings_t timing_mda = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; +static video_timings_t timing_mda = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; void mda_recalctimings(mda_t *mda); -void mda_out(uint16_t addr, uint8_t val, void *p) +void +mda_out(uint16_t addr, uint8_t val, void *p) { - mda_t *mda = (mda_t *)p; - switch (addr) - { - case 0x3b0: case 0x3b2: case 0x3b4: case 0x3b6: - mda->crtcreg = val & 31; - return; - case 0x3b1: case 0x3b3: case 0x3b5: case 0x3b7: - mda->crtc[mda->crtcreg] = val; - if (mda->crtc[10] == 6 && mda->crtc[11] == 7) /*Fix for Generic Turbo XT BIOS, which sets up cursor registers wrong*/ - { - mda->crtc[10] = 0xb; - mda->crtc[11] = 0xc; + mda_t *mda = (mda_t *) p; + switch (addr) { + case 0x3b0: + case 0x3b2: + case 0x3b4: + case 0x3b6: + mda->crtcreg = val & 31; + return; + case 0x3b1: + case 0x3b3: + case 0x3b5: + case 0x3b7: + mda->crtc[mda->crtcreg] = val; + if (mda->crtc[10] == 6 && mda->crtc[11] == 7) /*Fix for Generic Turbo XT BIOS, which sets up cursor registers wrong*/ + { + mda->crtc[10] = 0xb; + mda->crtc[11] = 0xc; + } + mda_recalctimings(mda); + return; + case 0x3b8: + mda->ctrl = val; + return; + } +} + +uint8_t +mda_in(uint16_t addr, void *p) +{ + mda_t *mda = (mda_t *) p; + switch (addr) { + case 0x3b0: + case 0x3b2: + case 0x3b4: + case 0x3b6: + return mda->crtcreg; + case 0x3b1: + case 0x3b3: + case 0x3b5: + case 0x3b7: + return mda->crtc[mda->crtcreg]; + case 0x3ba: + return mda->stat | 0xF0; + } + return 0xff; +} + +void +mda_write(uint32_t addr, uint8_t val, void *p) +{ + mda_t *mda = (mda_t *) p; + mda->vram[addr & 0xfff] = val; +} + +uint8_t +mda_read(uint32_t addr, void *p) +{ + mda_t *mda = (mda_t *) p; + return mda->vram[addr & 0xfff]; +} + +void +mda_recalctimings(mda_t *mda) +{ + double _dispontime, _dispofftime, disptime; + disptime = mda->crtc[0] + 1; + _dispontime = mda->crtc[1]; + _dispofftime = disptime - _dispontime; + _dispontime *= MDACONST; + _dispofftime *= MDACONST; + mda->dispontime = (uint64_t) (_dispontime); + mda->dispofftime = (uint64_t) (_dispofftime); +} + +void +mda_poll(void *p) +{ + mda_t *mda = (mda_t *) p; + uint16_t ca = (mda->crtc[15] | (mda->crtc[14] << 8)) & 0x3fff; + int drawcursor; + int x, c; + int oldvc; + uint8_t chr, attr; + int oldsc; + int blink; + + VIDEO_MONITOR_PROLOGUE() + if (!mda->linepos) { + timer_advance_u64(&mda->timer, mda->dispofftime); + mda->stat |= 1; + mda->linepos = 1; + oldsc = mda->sc; + if ((mda->crtc[8] & 3) == 3) + mda->sc = (mda->sc << 1) & 7; + if (mda->dispon) { + if (mda->displine < mda->firstline) { + mda->firstline = mda->displine; + video_wait_for_buffer(); + } + mda->lastline = mda->displine; + for (x = 0; x < mda->crtc[1]; x++) { + chr = mda->vram[(mda->ma << 1) & 0xfff]; + attr = mda->vram[((mda->ma << 1) + 1) & 0xfff]; + drawcursor = ((mda->ma == ca) && mda->con && mda->cursoron); + blink = ((mda->blink & 16) && (mda->ctrl & 0x20) && (attr & 0x80) && !drawcursor); + if (mda->sc == 12 && ((attr & 7) == 1)) { + for (c = 0; c < 9; c++) + buffer32->line[mda->displine][(x * 9) + c] = mdacols[attr][blink][1]; + } else { + for (c = 0; c < 8; c++) + buffer32->line[mda->displine][(x * 9) + c] = mdacols[attr][blink][(fontdatm[chr][mda->sc] & (1 << (c ^ 7))) ? 1 : 0]; + if ((chr & ~0x1f) == 0xc0) + buffer32->line[mda->displine][(x * 9) + 8] = mdacols[attr][blink][fontdatm[chr][mda->sc] & 1]; + else + buffer32->line[mda->displine][(x * 9) + 8] = mdacols[attr][blink][0]; } - mda_recalctimings(mda); - return; - case 0x3b8: - mda->ctrl = val; - return; + mda->ma++; + if (drawcursor) { + for (c = 0; c < 9; c++) + buffer32->line[mda->displine][(x * 9) + c] ^= mdacols[attr][0][1]; + } + } } -} - -uint8_t mda_in(uint16_t addr, void *p) -{ - mda_t *mda = (mda_t *)p; - switch (addr) - { - case 0x3b0: case 0x3b2: case 0x3b4: case 0x3b6: - return mda->crtcreg; - case 0x3b1: case 0x3b3: case 0x3b5: case 0x3b7: - return mda->crtc[mda->crtcreg]; - case 0x3ba: - return mda->stat | 0xF0; + mda->sc = oldsc; + if (mda->vc == mda->crtc[7] && !mda->sc) { + mda->stat |= 8; } - return 0xff; -} - -void mda_write(uint32_t addr, uint8_t val, void *p) -{ - mda_t *mda = (mda_t *)p; - mda->vram[addr & 0xfff] = val; -} - -uint8_t mda_read(uint32_t addr, void *p) -{ - mda_t *mda = (mda_t *)p; - return mda->vram[addr & 0xfff]; -} - -void mda_recalctimings(mda_t *mda) -{ - double _dispontime, _dispofftime, disptime; - disptime = mda->crtc[0] + 1; - _dispontime = mda->crtc[1]; - _dispofftime = disptime - _dispontime; - _dispontime *= MDACONST; - _dispofftime *= MDACONST; - mda->dispontime = (uint64_t)(_dispontime); - mda->dispofftime = (uint64_t)(_dispofftime); -} - -void mda_poll(void *p) -{ - mda_t *mda = (mda_t *)p; - uint16_t ca = (mda->crtc[15] | (mda->crtc[14] << 8)) & 0x3fff; - int drawcursor; - int x, c; - int oldvc; - uint8_t chr, attr; - int oldsc; - int blink; - - VIDEO_MONITOR_PROLOGUE() - if (!mda->linepos) - { - timer_advance_u64(&mda->timer, mda->dispofftime); - mda->stat |= 1; - mda->linepos = 1; - oldsc = mda->sc; - if ((mda->crtc[8] & 3) == 3) - mda->sc = (mda->sc << 1) & 7; - if (mda->dispon) - { - if (mda->displine < mda->firstline) - { - mda->firstline = mda->displine; - video_wait_for_buffer(); - } - mda->lastline = mda->displine; - for (x = 0; x < mda->crtc[1]; x++) - { - chr = mda->vram[(mda->ma << 1) & 0xfff]; - attr = mda->vram[((mda->ma << 1) + 1) & 0xfff]; - drawcursor = ((mda->ma == ca) && mda->con && mda->cursoron); - blink = ((mda->blink & 16) && (mda->ctrl & 0x20) && (attr & 0x80) && !drawcursor); - if (mda->sc == 12 && ((attr & 7) == 1)) - { - for (c = 0; c < 9; c++) - buffer32->line[mda->displine][(x * 9) + c] = mdacols[attr][blink][1]; - } - else - { - for (c = 0; c < 8; c++) - buffer32->line[mda->displine][(x * 9) + c] = mdacols[attr][blink][(fontdatm[chr][mda->sc] & (1 << (c ^ 7))) ? 1 : 0]; - if ((chr & ~0x1f) == 0xc0) buffer32->line[mda->displine][(x * 9) + 8] = mdacols[attr][blink][fontdatm[chr][mda->sc] & 1]; - else buffer32->line[mda->displine][(x * 9) + 8] = mdacols[attr][blink][0]; - } - mda->ma++; - if (drawcursor) - { - for (c = 0; c < 9; c++) - buffer32->line[mda->displine][(x * 9) + c] ^= mdacols[attr][0][1]; - } - } - } - mda->sc = oldsc; - if (mda->vc == mda->crtc[7] && !mda->sc) - { - mda->stat |= 8; - } - mda->displine++; - if (mda->displine >= 500) - mda->displine=0; + mda->displine++; + if (mda->displine >= 500) + mda->displine = 0; + } else { + timer_advance_u64(&mda->timer, mda->dispontime); + if (mda->dispon) + mda->stat &= ~1; + mda->linepos = 0; + if (mda->vsynctime) { + mda->vsynctime--; + if (!mda->vsynctime) { + mda->stat &= ~8; + } } - else - { - timer_advance_u64(&mda->timer, mda->dispontime); - if (mda->dispon) mda->stat&=~1; - mda->linepos=0; - if (mda->vsynctime) - { - mda->vsynctime--; - if (!mda->vsynctime) - { - mda->stat&=~8; - } - } - if (mda->sc == (mda->crtc[11] & 31) || ((mda->crtc[8] & 3) == 3 && mda->sc == ((mda->crtc[11] & 31) >> 1))) - { - mda->con = 0; - mda->coff = 1; - } - if (mda->vadj) - { - mda->sc++; - mda->sc &= 31; - mda->ma = mda->maback; - mda->vadj--; - if (!mda->vadj) - { - mda->dispon = 1; - mda->ma = mda->maback = (mda->crtc[13] | (mda->crtc[12] << 8)) & 0x3fff; - mda->sc = 0; - } - } - else if (mda->sc == mda->crtc[9] || ((mda->crtc[8] & 3) == 3 && mda->sc == (mda->crtc[9] >> 1))) - { - mda->maback = mda->ma; - mda->sc = 0; - oldvc = mda->vc; - mda->vc++; - mda->vc &= 127; - if (mda->vc == mda->crtc[6]) - mda->dispon=0; - if (oldvc == mda->crtc[4]) - { - mda->vc = 0; - mda->vadj = mda->crtc[5]; - if (!mda->vadj) mda->dispon = 1; - if (!mda->vadj) mda->ma = mda->maback = (mda->crtc[13] | (mda->crtc[12] << 8)) & 0x3fff; - if ((mda->crtc[10] & 0x60) == 0x20) mda->cursoron = 0; - else mda->cursoron = mda->blink & 16; - } - if (mda->vc == mda->crtc[7]) - { - mda->dispon = 0; - mda->displine = 0; - mda->vsynctime = 16; - if (mda->crtc[7]) - { - x = mda->crtc[1] * 9; - mda->lastline++; - if ((x != xsize) || ((mda->lastline - mda->firstline) != ysize) || video_force_resize_get()) - { - xsize = x; - ysize = mda->lastline - mda->firstline; - if (xsize < 64) xsize = 656; - if (ysize < 32) ysize = 200; - set_screen_size(xsize, ysize); - - if (video_force_resize_get()) - video_force_resize_set(0); - } - video_blit_memtoscreen_8(0, mda->firstline, xsize, ysize); - frames++; - video_res_x = mda->crtc[1]; - video_res_y = mda->crtc[6]; - video_bpp = 0; - } - mda->firstline = 1000; - mda->lastline = 0; - mda->blink++; - } - } + if (mda->sc == (mda->crtc[11] & 31) || ((mda->crtc[8] & 3) == 3 && mda->sc == ((mda->crtc[11] & 31) >> 1))) { + mda->con = 0; + mda->coff = 1; + } + if (mda->vadj) { + mda->sc++; + mda->sc &= 31; + mda->ma = mda->maback; + mda->vadj--; + if (!mda->vadj) { + mda->dispon = 1; + mda->ma = mda->maback = (mda->crtc[13] | (mda->crtc[12] << 8)) & 0x3fff; + mda->sc = 0; + } + } else if (mda->sc == mda->crtc[9] || ((mda->crtc[8] & 3) == 3 && mda->sc == (mda->crtc[9] >> 1))) { + mda->maback = mda->ma; + mda->sc = 0; + oldvc = mda->vc; + mda->vc++; + mda->vc &= 127; + if (mda->vc == mda->crtc[6]) + mda->dispon = 0; + if (oldvc == mda->crtc[4]) { + mda->vc = 0; + mda->vadj = mda->crtc[5]; + if (!mda->vadj) + mda->dispon = 1; + if (!mda->vadj) + mda->ma = mda->maback = (mda->crtc[13] | (mda->crtc[12] << 8)) & 0x3fff; + if ((mda->crtc[10] & 0x60) == 0x20) + mda->cursoron = 0; else - { - mda->sc++; - mda->sc &= 31; - mda->ma = mda->maback; - } - if ((mda->sc == (mda->crtc[10] & 31) || ((mda->crtc[8] & 3) == 3 && mda->sc == ((mda->crtc[10] & 31) >> 1)))) - { - mda->con = 1; + mda->cursoron = mda->blink & 16; + } + if (mda->vc == mda->crtc[7]) { + mda->dispon = 0; + mda->displine = 0; + mda->vsynctime = 16; + if (mda->crtc[7]) { + x = mda->crtc[1] * 9; + mda->lastline++; + if ((x != xsize) || ((mda->lastline - mda->firstline) != ysize) || video_force_resize_get()) { + xsize = x; + ysize = mda->lastline - mda->firstline; + if (xsize < 64) + xsize = 656; + if (ysize < 32) + ysize = 200; + set_screen_size(xsize, ysize); + + if (video_force_resize_get()) + video_force_resize_set(0); + } + video_blit_memtoscreen_8(0, mda->firstline, xsize, ysize); + frames++; + video_res_x = mda->crtc[1]; + video_res_y = mda->crtc[6]; + video_bpp = 0; } + mda->firstline = 1000; + mda->lastline = 0; + mda->blink++; + } + } else { + mda->sc++; + mda->sc &= 31; + mda->ma = mda->maback; } - VIDEO_MONITOR_EPILOGUE(); -} - -void mda_init(mda_t *mda) -{ - int c; - - for (c = 0; c < 256; c++) - { - mdacols[c][0][0] = mdacols[c][1][0] = mdacols[c][1][1] = 16; - if (c & 8) mdacols[c][0][1] = 15 + 16; - else mdacols[c][0][1] = 7 + 16; + if ((mda->sc == (mda->crtc[10] & 31) || ((mda->crtc[8] & 3) == 3 && mda->sc == ((mda->crtc[10] & 31) >> 1)))) { + mda->con = 1; } - mdacols[0x70][0][1] = 16; - mdacols[0x70][0][0] = mdacols[0x70][1][0] = mdacols[0x70][1][1] = 16 + 15; - mdacols[0xF0][0][1] = 16; - mdacols[0xF0][0][0] = mdacols[0xF0][1][0] = mdacols[0xF0][1][1] = 16 + 15; - mdacols[0x78][0][1] = 16 + 7; - mdacols[0x78][0][0] = mdacols[0x78][1][0] = mdacols[0x78][1][1] = 16 + 15; - mdacols[0xF8][0][1] = 16 + 7; - mdacols[0xF8][0][0] = mdacols[0xF8][1][0] = mdacols[0xF8][1][1] = 16 + 15; - mdacols[0x00][0][1] = mdacols[0x00][1][1] = 16; - mdacols[0x08][0][1] = mdacols[0x08][1][1] = 16; - mdacols[0x80][0][1] = mdacols[0x80][1][1] = 16; - mdacols[0x88][0][1] = mdacols[0x88][1][1] = 16; - - overscan_x = overscan_y = 0; - mda->monitor_index = monitor_index_global; - - cga_palette = device_get_config_int("rgb_type") << 1; - if (cga_palette > 6) - { - cga_palette = 0; - } - cgapal_rebuild(); - - timer_add(&mda->timer, mda_poll, mda, 1); + } + VIDEO_MONITOR_EPILOGUE(); } -void *mda_standalone_init(const device_t *info) +void +mda_init(mda_t *mda) { - mda_t *mda = malloc(sizeof(mda_t)); - memset(mda, 0, sizeof(mda_t)); - video_inform(VIDEO_FLAG_TYPE_MDA, &timing_mda); + int c; - mda->vram = malloc(0x1000); + for (c = 0; c < 256; c++) { + mdacols[c][0][0] = mdacols[c][1][0] = mdacols[c][1][1] = 16; + if (c & 8) + mdacols[c][0][1] = 15 + 16; + else + mdacols[c][0][1] = 7 + 16; + } + mdacols[0x70][0][1] = 16; + mdacols[0x70][0][0] = mdacols[0x70][1][0] = mdacols[0x70][1][1] = 16 + 15; + mdacols[0xF0][0][1] = 16; + mdacols[0xF0][0][0] = mdacols[0xF0][1][0] = mdacols[0xF0][1][1] = 16 + 15; + mdacols[0x78][0][1] = 16 + 7; + mdacols[0x78][0][0] = mdacols[0x78][1][0] = mdacols[0x78][1][1] = 16 + 15; + mdacols[0xF8][0][1] = 16 + 7; + mdacols[0xF8][0][0] = mdacols[0xF8][1][0] = mdacols[0xF8][1][1] = 16 + 15; + mdacols[0x00][0][1] = mdacols[0x00][1][1] = 16; + mdacols[0x08][0][1] = mdacols[0x08][1][1] = 16; + mdacols[0x80][0][1] = mdacols[0x80][1][1] = 16; + mdacols[0x88][0][1] = mdacols[0x88][1][1] = 16; - mem_mapping_add(&mda->mapping, 0xb0000, 0x08000, mda_read, NULL, NULL, mda_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, mda); - io_sethandler(0x03b0, 0x0010, mda_in, NULL, NULL, mda_out, NULL, NULL, mda); + overscan_x = overscan_y = 0; + mda->monitor_index = monitor_index_global; - mda_init(mda); + cga_palette = device_get_config_int("rgb_type") << 1; + if (cga_palette > 6) { + cga_palette = 0; + } + cgapal_rebuild(); - lpt3_init(0x3BC); - - return mda; + timer_add(&mda->timer, mda_poll, mda, 1); } -void mda_setcol(int chr, int blink, int fg, uint8_t cga_ink) +void * +mda_standalone_init(const device_t *info) { - mdacols[chr][blink][fg] = 16 + cga_ink; + mda_t *mda = malloc(sizeof(mda_t)); + memset(mda, 0, sizeof(mda_t)); + video_inform(VIDEO_FLAG_TYPE_MDA, &timing_mda); + + mda->vram = malloc(0x1000); + + mem_mapping_add(&mda->mapping, 0xb0000, 0x08000, mda_read, NULL, NULL, mda_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, mda); + io_sethandler(0x03b0, 0x0010, mda_in, NULL, NULL, mda_out, NULL, NULL, mda); + + mda_init(mda); + + lpt3_init(0x3BC); + + return mda; } -void mda_close(void *p) +void +mda_setcol(int chr, int blink, int fg, uint8_t cga_ink) { - mda_t *mda = (mda_t *)p; - - free(mda->vram); - free(mda); + mdacols[chr][blink][fg] = 16 + cga_ink; } -void mda_speed_changed(void *p) +void +mda_close(void *p) { - mda_t *mda = (mda_t *)p; + mda_t *mda = (mda_t *) p; - mda_recalctimings(mda); + free(mda->vram); + free(mda); +} + +void +mda_speed_changed(void *p) +{ + mda_t *mda = (mda_t *) p; + + mda_recalctimings(mda); } static const device_config_t mda_config[] = { -// clang-format off + // clang-format off { .name = "rgb_type", .description = "Display type", @@ -367,15 +372,15 @@ static const device_config_t mda_config[] = { }; const device_t mda_device = { - .name = "MDA", + .name = "MDA", .internal_name = "mda", - .flags = DEVICE_ISA, - .local = 0, - .init = mda_standalone_init, - .close = mda_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = mda_standalone_init, + .close = mda_close, + .reset = NULL, { .available = NULL }, .speed_changed = mda_speed_changed, - .force_redraw = NULL, - .config = mda_config + .force_redraw = NULL, + .config = mda_config }; diff --git a/src/video/vid_mga.c b/src/video/vid_mga.c index 87ed16ba5..134b778b2 100644 --- a/src/video/vid_mga.c +++ b/src/video/vid_mga.c @@ -34,27 +34,26 @@ #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> +#define ROM_MILLENNIUM "roms/video/matrox/matrox2064wr2.BIN" +#define ROM_MYSTIQUE "roms/video/matrox/MYSTIQUE.VBI" +#define ROM_MYSTIQUE_220 "roms/video/matrox/Myst220_66-99mhz.vbi" -#define ROM_MILLENNIUM "roms/video/matrox/matrox2064wr2.BIN" -#define ROM_MYSTIQUE "roms/video/matrox/MYSTIQUE.VBI" -#define ROM_MYSTIQUE_220 "roms/video/matrox/Myst220_66-99mhz.vbi" +#define FIFO_SIZE 65536 +#define FIFO_MASK (FIFO_SIZE - 1) +#define FIFO_ENTRY_SIZE (1 << 31) +#define FIFO_THRESHOLD 0xe000 -#define FIFO_SIZE 65536 -#define FIFO_MASK (FIFO_SIZE - 1) -#define FIFO_ENTRY_SIZE (1 << 31) -#define FIFO_THRESHOLD 0xe000 +#define WAKE_DELAY (100 * TIMER_USEC) /* 100us */ -#define WAKE_DELAY (100 * TIMER_USEC) /* 100us */ +#define FIFO_ENTRIES (mystique->fifo_write_idx - mystique->fifo_read_idx) +#define FIFO_FULL ((mystique->fifo_write_idx - mystique->fifo_read_idx) >= (FIFO_SIZE - 1)) +#define FIFO_EMPTY (mystique->fifo_read_idx == mystique->fifo_write_idx) -#define FIFO_ENTRIES (mystique->fifo_write_idx - mystique->fifo_read_idx) -#define FIFO_FULL ((mystique->fifo_write_idx - mystique->fifo_read_idx) >= (FIFO_SIZE-1)) -#define FIFO_EMPTY (mystique->fifo_read_idx == mystique->fifo_write_idx) - -#define FIFO_TYPE 0xff000000 -#define FIFO_ADDR 0x00ffffff +#define FIFO_TYPE 0xff000000 +#define FIFO_ADDR 0x00ffffff #define DMA_POLL_TIME_US 100 /*100us*/ -#define DMA_MAX_WORDS 256 /*256 quad words per 100us poll*/ +#define DMA_MAX_WORDS 256 /*256 quad words per 100us poll*/ /*These registers are also mirrored into 0x1dxx, with the mirrored versions starting the blitter*/ @@ -139,119 +138,119 @@ #define REG_CACHEFLUSH 0x1fff /*Mystique only*/ -#define REG_TMR0 0x2c00 -#define REG_TMR1 0x2c04 -#define REG_TMR2 0x2c08 -#define REG_TMR3 0x2c0c -#define REG_TMR4 0x2c10 -#define REG_TMR5 0x2c14 -#define REG_TMR6 0x2c18 -#define REG_TMR7 0x2c1c -#define REG_TMR8 0x2c20 -#define REG_TEXORG 0x2c24 -#define REG_TEXWIDTH 0x2c28 -#define REG_TEXHEIGHT 0x2c2c -#define REG_TEXCTL 0x2c30 -#define REG_TEXTRANS 0x2c34 -#define REG_SECADDRESS 0x2c40 -#define REG_SECEND 0x2c44 -#define REG_SOFTRAP 0x2c48 +#define REG_TMR0 0x2c00 +#define REG_TMR1 0x2c04 +#define REG_TMR2 0x2c08 +#define REG_TMR3 0x2c0c +#define REG_TMR4 0x2c10 +#define REG_TMR5 0x2c14 +#define REG_TMR6 0x2c18 +#define REG_TMR7 0x2c1c +#define REG_TMR8 0x2c20 +#define REG_TEXORG 0x2c24 +#define REG_TEXWIDTH 0x2c28 +#define REG_TEXHEIGHT 0x2c2c +#define REG_TEXCTL 0x2c30 +#define REG_TEXTRANS 0x2c34 +#define REG_SECADDRESS 0x2c40 +#define REG_SECEND 0x2c44 +#define REG_SOFTRAP 0x2c48 /*Mystique only*/ -#define REG_PALWTADD 0x3c00 -#define REG_PALDATA 0x3c01 -#define REG_PIXRDMSK 0x3c02 -#define REG_PALRDADD 0x3c03 -#define REG_X_DATAREG 0x3c0a -#define REG_CURPOSX 0x3c0c -#define REG_CURPOSY 0x3c0e +#define REG_PALWTADD 0x3c00 +#define REG_PALDATA 0x3c01 +#define REG_PIXRDMSK 0x3c02 +#define REG_PALRDADD 0x3c03 +#define REG_X_DATAREG 0x3c0a +#define REG_CURPOSX 0x3c0c +#define REG_CURPOSY 0x3c0e -#define REG_STATUS_VSYNCSTS (1 << 3) +#define REG_STATUS_VSYNCSTS (1 << 3) -#define CRTCX_R0_STARTADD_MASK (0xf << 0) -#define CRTCX_R0_OFFSET_MASK (3 << 4) +#define CRTCX_R0_STARTADD_MASK (0xf << 0) +#define CRTCX_R0_OFFSET_MASK (3 << 4) -#define CRTCX_R1_HTOTAL8 (1 << 0) +#define CRTCX_R1_HTOTAL8 (1 << 0) -#define CRTCX_R2_VTOTAL10 (1 << 0) -#define CRTCX_R2_VTOTAL11 (1 << 1) -#define CRTCX_R2_VDISPEND10 (1 << 2) -#define CRTCX_R2_VBLKSTR10 (1 << 3) -#define CRTCX_R2_VBLKSTR11 (1 << 4) -#define CRTCX_R2_VSYNCSTR10 (1 << 5) -#define CRTCX_R2_VSYNCSTR11 (1 << 6) -#define CRTCX_R2_LINECOMP10 (1 << 7) +#define CRTCX_R2_VTOTAL10 (1 << 0) +#define CRTCX_R2_VTOTAL11 (1 << 1) +#define CRTCX_R2_VDISPEND10 (1 << 2) +#define CRTCX_R2_VBLKSTR10 (1 << 3) +#define CRTCX_R2_VBLKSTR11 (1 << 4) +#define CRTCX_R2_VSYNCSTR10 (1 << 5) +#define CRTCX_R2_VSYNCSTR11 (1 << 6) +#define CRTCX_R2_LINECOMP10 (1 << 7) -#define CRTCX_R3_MGAMODE (1 << 7) +#define CRTCX_R3_MGAMODE (1 << 7) -#define XREG_XCURADDL 0x04 -#define XREG_XCURADDH 0x05 -#define XREG_XCURCTRL 0x06 +#define XREG_XCURADDL 0x04 +#define XREG_XCURADDH 0x05 +#define XREG_XCURCTRL 0x06 -#define XREG_XCURCOL0R 0x08 -#define XREG_XCURCOL0G 0x09 -#define XREG_XCURCOL0B 0x0a +#define XREG_XCURCOL0R 0x08 +#define XREG_XCURCOL0G 0x09 +#define XREG_XCURCOL0B 0x0a -#define XREG_XCURCOL1R 0x0c -#define XREG_XCURCOL1G 0x0d -#define XREG_XCURCOL1B 0x0e +#define XREG_XCURCOL1R 0x0c +#define XREG_XCURCOL1G 0x0d +#define XREG_XCURCOL1B 0x0e -#define XREG_XCURCOL2R 0x10 -#define XREG_XCURCOL2G 0x11 -#define XREG_XCURCOL2B 0x12 +#define XREG_XCURCOL2R 0x10 +#define XREG_XCURCOL2G 0x11 +#define XREG_XCURCOL2B 0x12 -#define XREG_XVREFCTRL 0x18 -#define XREG_XMULCTRL 0x19 -#define XREG_XPIXCLKCTRL 0x1a -#define XREG_XGENCTRL 0x1d -#define XREG_XMISCCTRL 0x1e +#define XREG_XVREFCTRL 0x18 +#define XREG_XMULCTRL 0x19 +#define XREG_XPIXCLKCTRL 0x1a +#define XREG_XGENCTRL 0x1d +#define XREG_XMISCCTRL 0x1e -#define XREG_XGENIOCTRL 0x2a -#define XREG_XGENIODATA 0x2b +#define XREG_XGENIOCTRL 0x2a +#define XREG_XGENIODATA 0x2b -#define XREG_XSYSPLLM 0x2c -#define XREG_XSYSPLLN 0x2d -#define XREG_XSYSPLLP 0x2e -#define XREG_XSYSPLLSTAT 0x2f +#define XREG_XSYSPLLM 0x2c +#define XREG_XSYSPLLN 0x2d +#define XREG_XSYSPLLP 0x2e +#define XREG_XSYSPLLSTAT 0x2f -#define XREG_XZOOMCTRL 0x38 +#define XREG_XZOOMCTRL 0x38 -#define XREG_XSENSETEST 0x3a +#define XREG_XSENSETEST 0x3a -#define XREG_XCRCREML 0x3c -#define XREG_XCRCREMH 0x3d -#define XREG_XCRCBITSEL 0x3e +#define XREG_XCRCREML 0x3c +#define XREG_XCRCREMH 0x3d +#define XREG_XCRCBITSEL 0x3e -#define XREG_XCOLKEYMSKL 0x40 -#define XREG_XCOLKEYMSKH 0x41 -#define XREG_XCOLKEYL 0x42 -#define XREG_XCOLKEYH 0x43 +#define XREG_XCOLKEYMSKL 0x40 +#define XREG_XCOLKEYMSKH 0x41 +#define XREG_XCOLKEYL 0x42 +#define XREG_XCOLKEYH 0x43 -#define XREG_XPIXPLLCM 0x4c -#define XREG_XPIXPLLCN 0x4d -#define XREG_XPIXPLLCP 0x4e -#define XREG_XPIXPLLSTAT 0x4f +#define XREG_XPIXPLLCM 0x4c +#define XREG_XPIXPLLCN 0x4d +#define XREG_XPIXPLLCP 0x4e +#define XREG_XPIXPLLSTAT 0x4f -#define XMISCCTRL_VGA8DAC (1 << 3) +#define XMISCCTRL_VGA8DAC (1 << 3) -#define XMULCTRL_DEPTH_MASK (7 << 0) -#define XMULCTRL_DEPTH_8 (0 << 0) -#define XMULCTRL_DEPTH_15 (1 << 0) -#define XMULCTRL_DEPTH_16 (2 << 0) -#define XMULCTRL_DEPTH_24 (3 << 0) -#define XMULCTRL_DEPTH_32_OVERLAYED (4 << 0) -#define XMULCTRL_DEPTH_2G8V16 (5 << 0) -#define XMULCTRL_DEPTH_G16V16 (6 << 0) -#define XMULCTRL_DEPTH_32 (7 << 0) +#define XMULCTRL_DEPTH_MASK (7 << 0) +#define XMULCTRL_DEPTH_8 (0 << 0) +#define XMULCTRL_DEPTH_15 (1 << 0) +#define XMULCTRL_DEPTH_16 (2 << 0) +#define XMULCTRL_DEPTH_24 (3 << 0) +#define XMULCTRL_DEPTH_32_OVERLAYED (4 << 0) +#define XMULCTRL_DEPTH_2G8V16 (5 << 0) +#define XMULCTRL_DEPTH_G16V16 (6 << 0) +#define XMULCTRL_DEPTH_32 (7 << 0) -#define XSYSPLLSTAT_SYSLOCK (1 << 6) +#define XSYSPLLSTAT_SYSLOCK (1 << 6) -#define XPIXPLLSTAT_SYSLOCK (1 << 6) +#define XPIXPLLSTAT_SYSLOCK (1 << 6) -#define XCURCTRL_CURMODE_MASK (3 << 0) -#define XCURCTRL_CURMODE_3COL (1 << 0) -#define XCURCTRL_CURMODE_XGA (2 << 0) -#define XCURCTRL_CURMODE_XWIN (3 << 0) +#define XCURCTRL_CURMODE_MASK (3 << 0) +#define XCURCTRL_CURMODE_3COL (1 << 0) +#define XCURCTRL_CURMODE_XGA (2 << 0) +#define XCURCTRL_CURMODE_XWIN (3 << 0) #define DWGCTRL_OPCODE_MASK (0xf << 0) #define DWGCTRL_OPCODE_LINE_OPEN (0x0 << 0) @@ -267,183 +266,178 @@ #define DWGCTRL_OPCODE_FBITBLT (0xc << 0) #define DWGCTRL_OPCODE_ILOAD_SCALE (0xd << 0) #define DWGCTRL_OPCODE_ILOAD_HIGHV (0xe << 0) -#define DWGCTRL_OPCODE_ILOAD_FILTER (0xf << 0) /* Not implemented. */ -#define DWGCTRL_ATYPE_MASK (7 << 4) -#define DWGCTRL_ATYPE_RPL (0 << 4) -#define DWGCTRL_ATYPE_RSTR (1 << 4) -#define DWGCTRL_ATYPE_ZI (3 << 4) -#define DWGCTRL_ATYPE_BLK (4 << 4) -#define DWGCTRL_ATYPE_I (7 << 4) -#define DWGCTRL_LINEAR (1 << 7) -#define DWGCTRL_ZMODE_MASK (7 << 8) -#define DWGCTRL_ZMODE_NOZCMP (0 << 8) -#define DWGCTRL_ZMODE_ZE (2 << 8) -#define DWGCTRL_ZMODE_ZNE (3 << 8) -#define DWGCTRL_ZMODE_ZLT (4 << 8) -#define DWGCTRL_ZMODE_ZLTE (5 << 8) -#define DWGCTRL_ZMODE_ZGT (6 << 8) -#define DWGCTRL_ZMODE_ZGTE (7 << 8) -#define DWGCTRL_SOLID (1 << 11) -#define DWGCTRL_ARZERO (1 << 12) -#define DWGCTRL_SGNZERO (1 << 13) -#define DWGCTRL_SHTZERO (1 << 14) -#define DWGCTRL_BOP_MASK (0xf << 16) -#define DWGCTRL_TRANS_SHIFT (20) -#define DWGCTRL_TRANS_MASK (0xf << DWGCTRL_TRANS_SHIFT) -#define DWGCTRL_BLTMOD_MASK (0xf << 25) -#define DWGCTRL_BLTMOD_BMONOLEF (0x0 << 25) -#define DWGCTRL_BLTMOD_BFCOL (0x2 << 25) -#define DWGCTRL_BLTMOD_BU32BGR (0x3 << 25) -#define DWGCTRL_BLTMOD_BMONOWF (0x4 << 25) -#define DWGCTRL_BLTMOD_BU32RGB (0x7 << 25) -#define DWGCTRL_BLTMOD_BUYUV (0xe << 25) -#define DWGCTRL_BLTMOD_BU24RGB (0xf << 25) -#define DWGCTRL_PATTERN (1 << 29) -#define DWGCTRL_TRANSC (1 << 30) -#define BOP(x) ((x) << 16) +#define DWGCTRL_OPCODE_ILOAD_FILTER (0xf << 0) /* Not implemented. */ +#define DWGCTRL_ATYPE_MASK (7 << 4) +#define DWGCTRL_ATYPE_RPL (0 << 4) +#define DWGCTRL_ATYPE_RSTR (1 << 4) +#define DWGCTRL_ATYPE_ZI (3 << 4) +#define DWGCTRL_ATYPE_BLK (4 << 4) +#define DWGCTRL_ATYPE_I (7 << 4) +#define DWGCTRL_LINEAR (1 << 7) +#define DWGCTRL_ZMODE_MASK (7 << 8) +#define DWGCTRL_ZMODE_NOZCMP (0 << 8) +#define DWGCTRL_ZMODE_ZE (2 << 8) +#define DWGCTRL_ZMODE_ZNE (3 << 8) +#define DWGCTRL_ZMODE_ZLT (4 << 8) +#define DWGCTRL_ZMODE_ZLTE (5 << 8) +#define DWGCTRL_ZMODE_ZGT (6 << 8) +#define DWGCTRL_ZMODE_ZGTE (7 << 8) +#define DWGCTRL_SOLID (1 << 11) +#define DWGCTRL_ARZERO (1 << 12) +#define DWGCTRL_SGNZERO (1 << 13) +#define DWGCTRL_SHTZERO (1 << 14) +#define DWGCTRL_BOP_MASK (0xf << 16) +#define DWGCTRL_TRANS_SHIFT (20) +#define DWGCTRL_TRANS_MASK (0xf << DWGCTRL_TRANS_SHIFT) +#define DWGCTRL_BLTMOD_MASK (0xf << 25) +#define DWGCTRL_BLTMOD_BMONOLEF (0x0 << 25) +#define DWGCTRL_BLTMOD_BFCOL (0x2 << 25) +#define DWGCTRL_BLTMOD_BU32BGR (0x3 << 25) +#define DWGCTRL_BLTMOD_BMONOWF (0x4 << 25) +#define DWGCTRL_BLTMOD_BU32RGB (0x7 << 25) +#define DWGCTRL_BLTMOD_BUYUV (0xe << 25) +#define DWGCTRL_BLTMOD_BU24RGB (0xf << 25) +#define DWGCTRL_PATTERN (1 << 29) +#define DWGCTRL_TRANSC (1 << 30) +#define BOP(x) ((x) << 16) -#define MACCESS_PWIDTH_MASK (3 << 0) -#define MACCESS_PWIDTH_8 (0 << 0) -#define MACCESS_PWIDTH_16 (1 << 0) -#define MACCESS_PWIDTH_32 (2 << 0) -#define MACCESS_PWIDTH_24 (3 << 0) -#define MACCESS_TLUTLOAD (1 << 29) -#define MACCESS_NODITHER (1 << 30) -#define MACCESS_DIT555 (1 << 31) +#define MACCESS_PWIDTH_MASK (3 << 0) +#define MACCESS_PWIDTH_8 (0 << 0) +#define MACCESS_PWIDTH_16 (1 << 0) +#define MACCESS_PWIDTH_32 (2 << 0) +#define MACCESS_PWIDTH_24 (3 << 0) +#define MACCESS_TLUTLOAD (1 << 29) +#define MACCESS_NODITHER (1 << 30) +#define MACCESS_DIT555 (1 << 31) -#define PITCH_MASK 0x7e0 -#define PITCH_YLIN (1 << 15) +#define PITCH_MASK 0x7e0 +#define PITCH_YLIN (1 << 15) -#define SGN_SDYDXL (1 << 0) -#define SGN_SCANLEFT (1 << 0) -#define SGN_SDXL (1 << 1) -#define SGN_SDY (1 << 2) -#define SGN_SDXR (1 << 5) +#define SGN_SDYDXL (1 << 0) +#define SGN_SCANLEFT (1 << 0) +#define SGN_SDXL (1 << 1) +#define SGN_SDY (1 << 2) +#define SGN_SDXR (1 << 5) -#define DMA_ADDR_MASK 0xfffffffc -#define DMA_MODE_MASK 3 +#define DMA_ADDR_MASK 0xfffffffc +#define DMA_MODE_MASK 3 -#define DMA_MODE_REG 0 -#define DMA_MODE_BLIT 1 -#define DMA_MODE_VECTOR 2 +#define DMA_MODE_REG 0 +#define DMA_MODE_BLIT 1 +#define DMA_MODE_VECTOR 2 -#define STATUS_SOFTRAPEN (1 << 0) -#define STATUS_VSYNCPEN (1 << 4) -#define STATUS_VLINEPEN (1 << 5) -#define STATUS_DWGENGSTS (1 << 16) -#define STATUS_ENDPRDMASTS (1 << 17) +#define STATUS_SOFTRAPEN (1 << 0) +#define STATUS_VSYNCPEN (1 << 4) +#define STATUS_VLINEPEN (1 << 5) +#define STATUS_DWGENGSTS (1 << 16) +#define STATUS_ENDPRDMASTS (1 << 17) -#define ICLEAR_SOFTRAPICLR (1 << 0) -#define ICLEAR_VLINEICLR (1 << 5) +#define ICLEAR_SOFTRAPICLR (1 << 0) +#define ICLEAR_VLINEICLR (1 << 5) -#define IEN_SOFTRAPEN (1 << 0) +#define IEN_SOFTRAPEN (1 << 0) -#define TEXCTL_TEXFORMAT_MASK (7 << 0) -#define TEXCTL_TEXFORMAT_TW4 (0 << 0) -#define TEXCTL_TEXFORMAT_TW8 (1 << 0) -#define TEXCTL_TEXFORMAT_TW15 (2 << 0) -#define TEXCTL_TEXFORMAT_TW16 (3 << 0) -#define TEXCTL_TEXFORMAT_TW12 (4 << 0) -#define TEXCTL_PALSEL_MASK (0xf << 4) -#define TEXCTL_TPITCH_SHIFT (16) -#define TEXCTL_TPITCH_MASK (7 << TEXCTL_TPITCH_SHIFT) -#define TEXCTL_NPCEN (1 << 21) -#define TEXCTL_DECALCKEY (1 << 24) -#define TEXCTL_TAKEY (1 << 25) -#define TEXCTL_TAMASK (1 << 26) -#define TEXCTL_CLAMPV (1 << 27) -#define TEXCTL_CLAMPU (1 << 28) -#define TEXCTL_TMODULATE (1 << 29) -#define TEXCTL_STRANS (1 << 30) -#define TEXCTL_ITRANS (1 << 31) +#define TEXCTL_TEXFORMAT_MASK (7 << 0) +#define TEXCTL_TEXFORMAT_TW4 (0 << 0) +#define TEXCTL_TEXFORMAT_TW8 (1 << 0) +#define TEXCTL_TEXFORMAT_TW15 (2 << 0) +#define TEXCTL_TEXFORMAT_TW16 (3 << 0) +#define TEXCTL_TEXFORMAT_TW12 (4 << 0) +#define TEXCTL_PALSEL_MASK (0xf << 4) +#define TEXCTL_TPITCH_SHIFT (16) +#define TEXCTL_TPITCH_MASK (7 << TEXCTL_TPITCH_SHIFT) +#define TEXCTL_NPCEN (1 << 21) +#define TEXCTL_DECALCKEY (1 << 24) +#define TEXCTL_TAKEY (1 << 25) +#define TEXCTL_TAMASK (1 << 26) +#define TEXCTL_CLAMPV (1 << 27) +#define TEXCTL_CLAMPU (1 << 28) +#define TEXCTL_TMODULATE (1 << 29) +#define TEXCTL_STRANS (1 << 30) +#define TEXCTL_ITRANS (1 << 31) -#define TEXHEIGHT_TH_MASK (0x3f << 0) -#define TEXHEIGHT_THMASK_SHIFT (18) -#define TEXHEIGHT_THMASK_MASK (0x7ff << TEXHEIGHT_THMASK_SHIFT) +#define TEXHEIGHT_TH_MASK (0x3f << 0) +#define TEXHEIGHT_THMASK_SHIFT (18) +#define TEXHEIGHT_THMASK_MASK (0x7ff << TEXHEIGHT_THMASK_SHIFT) -#define TEXWIDTH_TW_MASK (0x3f << 0) -#define TEXWIDTH_TWMASK_SHIFT (18) -#define TEXWIDTH_TWMASK_MASK (0x7ff << TEXWIDTH_TWMASK_SHIFT) +#define TEXWIDTH_TW_MASK (0x3f << 0) +#define TEXWIDTH_TWMASK_SHIFT (18) +#define TEXWIDTH_TWMASK_MASK (0x7ff << TEXWIDTH_TWMASK_SHIFT) -#define TEXTRANS_TCKEY_MASK (0xffff) -#define TEXTRANS_TKMASK_SHIFT (16) -#define TEXTRANS_TKMASK_MASK (0xffff << TEXTRANS_TKMASK_SHIFT) +#define TEXTRANS_TCKEY_MASK (0xffff) +#define TEXTRANS_TKMASK_SHIFT (16) +#define TEXTRANS_TKMASK_MASK (0xffff << TEXTRANS_TKMASK_SHIFT) -#define DITHER_565 0 -#define DITHER_NONE_565 1 -#define DITHER_555 2 -#define DITHER_NONE_555 3 +#define DITHER_565 0 +#define DITHER_NONE_565 1 +#define DITHER_555 2 +#define DITHER_NONE_555 3 /*PCI configuration registers*/ #define OPTION_INTERLEAVE (1 << 12) -enum -{ - MGA_2064W, /*Millennium*/ - MGA_1064SG, /*Mystique*/ - MGA_1164SG, /*Mystique 220*/ +enum { + MGA_2064W, /*Millennium*/ + MGA_1064SG, /*Mystique*/ + MGA_1164SG, /*Mystique 220*/ }; -enum -{ +enum { FIFO_INVALID = (0x00 << 24), FIFO_WRITE_CTRL_BYTE = (0x01 << 24), FIFO_WRITE_CTRL_LONG = (0x02 << 24), FIFO_WRITE_ILOAD_LONG = (0x03 << 24) }; -enum -{ - DMA_STATE_IDLE = 0, - DMA_STATE_PRI, - DMA_STATE_SEC +enum { + DMA_STATE_IDLE = 0, + DMA_STATE_PRI, + DMA_STATE_SEC }; - typedef struct { uint32_t addr_type; uint32_t val; } fifo_entry_t; -typedef struct mystique_t -{ +typedef struct mystique_t { svga_t svga; rom_t bios_rom; - int type; + int type; mem_mapping_t lfb_mapping, ctrl_mapping, - iload_mapping; + iload_mapping; uint8_t int_line, xcurctrl, - xsyspllm, xsysplln, xsyspllp, - xgenioctrl, xgeniodata, - xmulctrl, xgenctrl, - xmiscctrl, xpixclkctrl, - xvrefctrl, ien, dmamod, - dmadatasiz, dirdatasiz, - xcolkeymskl, xcolkeymskh, - xcolkeyl, xcolkeyh, - xcrcbitsel; + xsyspllm, xsysplln, xsyspllp, + xgenioctrl, xgeniodata, + xmulctrl, xgenctrl, + xmiscctrl, xpixclkctrl, + xvrefctrl, ien, dmamod, + dmadatasiz, dirdatasiz, + xcolkeymskl, xcolkeymskh, + xcolkeyl, xcolkeyh, + xcrcbitsel; uint8_t pci_regs[256], crtcext_regs[6], - xreg_regs[256], dmamap[16]; + xreg_regs[256], dmamap[16]; int card, vram_size, crtcext_idx, xreg_idx, - xzoomctrl, - pixel_count, trap_count; + xzoomctrl, + pixel_count, trap_count; volatile int busy, blitter_submit_refcount, - blitter_submit_dma_refcount, blitter_complete_refcount, - endprdmasts_pending, softrap_pending, - fifo_read_idx, fifo_write_idx; + blitter_submit_dma_refcount, blitter_complete_refcount, + endprdmasts_pending, softrap_pending, + fifo_read_idx, fifo_write_idx; uint32_t vram_mask, vram_mask_w, vram_mask_l, - lfb_base, ctrl_base, iload_base, - ma_latch_old, maccess, mctlwtst, maccess_running, - status, softrap_pending_val; + lfb_base, ctrl_base, iload_base, + ma_latch_old, maccess, mctlwtst, maccess_running, + status, softrap_pending_val; uint64_t blitter_time, status_time; @@ -457,65 +451,65 @@ typedef struct mystique_t struct { - int m, n, p, s; + int m, n, p, s; } xpixpll[3]; struct { - uint8_t funcnt, stylelen, - dmamod; + uint8_t funcnt, stylelen, + dmamod; - int16_t fxleft, fxright, - xdst; + int16_t fxleft, fxright, + xdst; - uint16_t cxleft, cxright, - length; + uint16_t cxleft, cxright, + length; - int xoff, yoff, selline, ydst, - length_cur, iload_rem_count, idump_end_of_line, words, - ta_key, ta_mask, lastpix_r, lastpix_g, - lastpix_b, highv_line, beta, dither; + int xoff, yoff, selline, ydst, + length_cur, iload_rem_count, idump_end_of_line, words, + ta_key, ta_mask, lastpix_r, lastpix_g, + lastpix_b, highv_line, beta, dither; - int pattern[8][8]; + int pattern[8][8]; - uint32_t dwgctrl, dwgctrl_running, bcol, fcol, - pitch, plnwt, ybot, ydstorg, - ytop, texorg, texwidth, texheight, - texctl, textrans, zorg, ydst_lin, - src_addr, z_base, iload_rem_data, highv_data; + uint32_t dwgctrl, dwgctrl_running, bcol, fcol, + pitch, plnwt, ybot, ydstorg, + ytop, texorg, texwidth, texheight, + texctl, textrans, zorg, ydst_lin, + src_addr, z_base, iload_rem_data, highv_data; - uint32_t src[4], ar[7], - dr[16], tmr[9]; + uint32_t src[4], ar[7], + dr[16], tmr[9]; - struct - { - int sdydxl, scanleft, sdxl, sdy, - sdxr; - } sgn; + struct + { + int sdydxl, scanleft, sdxl, sdy, + sdxr; + } sgn; } dwgreg; struct { - uint8_t r, g, b; + uint8_t r, g, b; } lut[256]; struct { - uint16_t pos_x, pos_y, - addr; - uint32_t col[3]; + uint16_t pos_x, pos_y, + addr; + uint32_t col[3]; } cursor; struct { - int pri_pos, sec_pos, iload_pos, - pri_state, sec_state, iload_state, state; + int pri_pos, sec_pos, iload_pos, + pri_state, sec_state, iload_state, state; - uint32_t primaddress, primend, secaddress, secend, - pri_header, sec_header, - iload_header; + uint32_t primaddress, primend, secaddress, secend, + pri_header, sec_header, + iload_header; - mutex_t *lock; + mutex_t *lock; } dma; uint8_t thread_run; @@ -523,292 +517,291 @@ typedef struct mystique_t void *i2c, *i2c_ddc, *ddc; } mystique_t; - -static const uint8_t trans_masks[16][16] = -{ +static const uint8_t trans_masks[16][16] = { + // clang-format off { - 1, 1, 1, 1, - 1, 1, 1, 1, - 1, 1, 1, 1, - 1, 1, 1, 1 + 1, 1, 1, 1, + 1, 1, 1, 1, + 1, 1, 1, 1, + 1, 1, 1, 1 }, { - 1, 0, 1, 0, - 0, 1, 0, 1, - 1, 0, 1, 0, - 0, 1, 0, 1 + 1, 0, 1, 0, + 0, 1, 0, 1, + 1, 0, 1, 0, + 0, 1, 0, 1 }, { - 0, 1, 0, 1, - 1, 0, 1, 0, - 0, 1, 0, 1, - 1, 0, 1, 0 + 0, 1, 0, 1, + 1, 0, 1, 0, + 0, 1, 0, 1, + 1, 0, 1, 0 }, { - 1, 0, 1, 0, - 0, 0, 0, 0, - 1, 0, 1, 0, - 0, 0, 0, 0 + 1, 0, 1, 0, + 0, 0, 0, 0, + 1, 0, 1, 0, + 0, 0, 0, 0 }, { - 0, 1, 0, 1, - 0, 0, 0, 0, - 0, 1, 0, 1, - 0, 0, 0, 0 + 0, 1, 0, 1, + 0, 0, 0, 0, + 0, 1, 0, 1, + 0, 0, 0, 0 }, { - 0, 0, 0, 0, - 1, 0, 1, 0, - 0, 0, 0, 0, - 1, 0, 1, 0 + 0, 0, 0, 0, + 1, 0, 1, 0, + 0, 0, 0, 0, + 1, 0, 1, 0 }, { - 0, 0, 0, 0, - 0, 1, 0, 1, - 0, 0, 0, 0, - 0, 1, 0, 1 + 0, 0, 0, 0, + 0, 1, 0, 1, + 0, 0, 0, 0, + 0, 1, 0, 1 }, { - 1, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 1, 0, - 0, 0, 0, 0 + 1, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 1, 0, + 0, 0, 0, 0 }, { - 0, 0, 0, 0, - 0, 1, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 1 + 0, 0, 0, 0, + 0, 1, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 1 }, { - 0, 0, 0, 1, - 0, 0, 0, 0, - 0, 1, 0, 0, - 0, 0, 0, 0 + 0, 0, 0, 1, + 0, 0, 0, 0, + 0, 1, 0, 0, + 0, 0, 0, 0 }, { - 0, 0, 0, 0, - 0, 0, 1, 0, - 0, 0, 0, 0, - 1, 0, 0, 0 + 0, 0, 0, 0, + 0, 0, 1, 0, + 0, 0, 0, 0, + 1, 0, 0, 0 }, { - 0, 0, 0, 0, - 1, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 1, 0 + 0, 0, 0, 0, + 1, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 1, 0 }, { - 0, 1, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 1, - 0, 0, 0, 0 + 0, 1, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 1, + 0, 0, 0, 0 }, { - 0, 0, 0, 0, - 0, 0, 0, 1, - 0, 0, 0, 0, - 0, 1, 0, 0 + 0, 0, 0, 0, + 0, 0, 0, 1, + 0, 0, 0, 0, + 0, 1, 0, 0 }, { - 0, 0, 1, 0, - 0, 0, 0, 0, - 1, 0, 0, 0, - 0, 0, 0, 0 + 0, 0, 1, 0, + 0, 0, 0, 0, + 1, 0, 0, 0, + 0, 0, 0, 0 }, { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0 + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0 } + // clang-format on }; +static int8_t dither5[256][2][2]; +static int8_t dither6[256][2][2]; -static int8_t dither5[256][2][2]; -static int8_t dither6[256][2][2]; +static video_timings_t timing_matrox_millennium = { .type = VIDEO_PCI, .write_b = 2, .write_w = 2, .write_l = 1, .read_b = 10, .read_w = 10, .read_l = 10 }; +static video_timings_t timing_matrox_mystique = { .type = VIDEO_PCI, .write_b = 4, .write_w = 4, .write_l = 4, .read_b = 10, .read_w = 10, .read_l = 10 }; -static video_timings_t timing_matrox_millennium = {VIDEO_PCI, 2, 2, 1, 10, 10, 10}; -static video_timings_t timing_matrox_mystique = {VIDEO_PCI, 4, 4, 4, 10, 10, 10}; +static void mystique_start_blit(mystique_t *mystique); +static void mystique_update_irqs(mystique_t *mystique); -static void mystique_start_blit(mystique_t *mystique); -static void mystique_update_irqs(mystique_t *mystique); +static void wake_fifo_thread(mystique_t *mystique); +static void wait_fifo_idle(mystique_t *mystique); +static void mystique_queue(mystique_t *mystique, uint32_t addr, uint32_t val, uint32_t type); -static void wake_fifo_thread(mystique_t *mystique); -static void wait_fifo_idle(mystique_t *mystique); -static void mystique_queue(mystique_t *mystique, uint32_t addr, uint32_t val, uint32_t type); - -static uint8_t mystique_readb_linear(uint32_t addr, void *p); +static uint8_t mystique_readb_linear(uint32_t addr, void *p); static uint16_t mystique_readw_linear(uint32_t addr, void *p); static uint32_t mystique_readl_linear(uint32_t addr, void *p); -static void mystique_writeb_linear(uint32_t addr, uint8_t val, void *p); -static void mystique_writew_linear(uint32_t addr, uint16_t val, void *p); -static void mystique_writel_linear(uint32_t addr, uint32_t val, void *p); +static void mystique_writeb_linear(uint32_t addr, uint8_t val, void *p); +static void mystique_writew_linear(uint32_t addr, uint16_t val, void *p); +static void mystique_writel_linear(uint32_t addr, uint32_t val, void *p); -static void mystique_recalc_mapping(mystique_t *mystique); -static int mystique_line_compare(svga_t *svga); +static void mystique_recalc_mapping(mystique_t *mystique); +static int mystique_line_compare(svga_t *svga); -static uint8_t mystique_iload_read_b(uint32_t addr, void *p); -static uint32_t mystique_iload_read_l(uint32_t addr, void *p); -static void mystique_iload_write_b(uint32_t addr, uint8_t val, void *p); -static void mystique_iload_write_l(uint32_t addr, uint32_t val, void *p); - -static uint32_t blit_idump_read(mystique_t *mystique); -static void blit_iload_write(mystique_t *mystique, uint32_t data, int size); +static uint8_t mystique_iload_read_b(uint32_t addr, void *p); +static uint32_t mystique_iload_read_l(uint32_t addr, void *p); +static void mystique_iload_write_b(uint32_t addr, uint8_t val, void *p); +static void mystique_iload_write_l(uint32_t addr, uint32_t val, void *p); +static uint32_t blit_idump_read(mystique_t *mystique); +static void blit_iload_write(mystique_t *mystique, uint32_t data, int size); void mystique_out(uint16_t addr, uint8_t val, void *p) { - mystique_t *mystique = (mystique_t *)p; - svga_t *svga = &mystique->svga; - uint8_t old; + mystique_t *mystique = (mystique_t *) p; + svga_t *svga = &mystique->svga; + uint8_t old; - if ((((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && addr < 0x3de) && !(svga->miscout & 1)) - addr ^= 0x60; + if ((((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && addr < 0x3de) && !(svga->miscout & 1)) + addr ^= 0x60; switch (addr) { - case 0x3c8: - mystique->xreg_idx = val; - case 0x3c6: case 0x3c7: case 0x3c9: - if (mystique->type == MGA_2064W) - { - tvp3026_ramdac_out(addr, 0, 0, val, svga->ramdac, svga); - return; - } - break; + case 0x3c8: + mystique->xreg_idx = val; + case 0x3c6: + case 0x3c7: + case 0x3c9: + if (mystique->type == MGA_2064W) { + tvp3026_ramdac_out(addr, 0, 0, val, svga->ramdac, svga); + return; + } + break; - case 0x3cf: - if ((svga->gdcaddr & 15) == 6 && svga->gdcreg[6] != val) { - svga->gdcreg[svga->gdcaddr & 15] = val; - mystique_recalc_mapping(mystique); - return; - } - break; + case 0x3cf: + if ((svga->gdcaddr & 15) == 6 && svga->gdcreg[6] != val) { + svga->gdcreg[svga->gdcaddr & 15] = val; + mystique_recalc_mapping(mystique); + return; + } + break; - case 0x3D4: - svga->crtcreg = val & 0x3f; - return; - case 0x3D5: - if (((svga->crtcreg & 0x3f) < 7) && (svga->crtc[0x11] & 0x80)) - return; - if (((svga->crtcreg & 0x3f) == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - old = svga->crtc[svga->crtcreg & 0x3f]; - svga->crtc[svga->crtcreg & 0x3f] = val; - if (old != val) { - if ((svga->crtcreg & 0x3f) < 0xE || (svga->crtcreg & 0x3f) > 0x10) { - if (((svga->crtcreg & 0x3f) == 0xc) || ((svga->crtcreg & 0x3f) == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - } - if (svga->crtcreg == 0x11) { - if (!(val & 0x10)) - mystique->status &= ~STATUS_VSYNCPEN; - mystique_update_irqs(mystique); - } - } - break; + case 0x3D4: + svga->crtcreg = val & 0x3f; + return; + case 0x3D5: + if (((svga->crtcreg & 0x3f) < 7) && (svga->crtc[0x11] & 0x80)) + return; + if (((svga->crtcreg & 0x3f) == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + old = svga->crtc[svga->crtcreg & 0x3f]; + svga->crtc[svga->crtcreg & 0x3f] = val; + if (old != val) { + if ((svga->crtcreg & 0x3f) < 0xE || (svga->crtcreg & 0x3f) > 0x10) { + if (((svga->crtcreg & 0x3f) == 0xc) || ((svga->crtcreg & 0x3f) == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + } + if (svga->crtcreg == 0x11) { + if (!(val & 0x10)) + mystique->status &= ~STATUS_VSYNCPEN; + mystique_update_irqs(mystique); + } + } + break; - case 0x3de: - mystique->crtcext_idx = val; - break; - case 0x3df: - if (mystique->crtcext_idx < 6) - mystique->crtcext_regs[mystique->crtcext_idx] = val; - if (mystique->crtcext_idx == 1) - svga->dpms = !!(val & 0x30); - if (mystique->crtcext_idx < 4) { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - if (mystique->crtcext_idx == 3) { - if (val & CRTCX_R3_MGAMODE) - svga->fb_only = 1; - else - svga->fb_only = 0; - svga_recalctimings(svga); - } - if (mystique->crtcext_idx == 4) { - if (svga->gdcreg[6] & 0xc) { - /*64k banks*/ - svga->read_bank = (val & 0x7f) << 16; - svga->write_bank = (val & 0x7f) << 16; - } else { - /*128k banks*/ - svga->read_bank = (val & 0x7e) << 16; - svga->write_bank = (val & 0x7e) << 16; - } - } - break; + case 0x3de: + mystique->crtcext_idx = val; + break; + case 0x3df: + if (mystique->crtcext_idx < 6) + mystique->crtcext_regs[mystique->crtcext_idx] = val; + if (mystique->crtcext_idx == 1) + svga->dpms = !!(val & 0x30); + if (mystique->crtcext_idx < 4) { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + if (mystique->crtcext_idx == 3) { + if (val & CRTCX_R3_MGAMODE) + svga->fb_only = 1; + else + svga->fb_only = 0; + svga_recalctimings(svga); + } + if (mystique->crtcext_idx == 4) { + if (svga->gdcreg[6] & 0xc) { + /*64k banks*/ + svga->read_bank = (val & 0x7f) << 16; + svga->write_bank = (val & 0x7f) << 16; + } else { + /*128k banks*/ + svga->read_bank = (val & 0x7e) << 16; + svga->write_bank = (val & 0x7e) << 16; + } + } + break; } svga_out(addr, val, svga); } - uint8_t mystique_in(uint16_t addr, void *p) { - mystique_t *mystique = (mystique_t *)p; - svga_t *svga = &mystique->svga; - uint8_t temp = 0xff; + mystique_t *mystique = (mystique_t *) p; + svga_t *svga = &mystique->svga; + uint8_t temp = 0xff; - if ((((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && addr < 0x3de) && !(svga->miscout & 1)) - addr ^= 0x60; + if ((((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && addr < 0x3de) && !(svga->miscout & 1)) + addr ^= 0x60; switch (addr) { - case 0x3c1: - if (svga->attraddr >= 0x15) - temp = 0; - else - temp = svga->attrregs[svga->attraddr]; - break; + case 0x3c1: + if (svga->attraddr >= 0x15) + temp = 0; + else + temp = svga->attrregs[svga->attraddr]; + break; - case 0x3c6: case 0x3c7: case 0x3c8: case 0x3c9: - if (mystique->type == MGA_2064W) - temp = tvp3026_ramdac_in(addr, 0, 0, svga->ramdac, svga); - else - temp = svga_in(addr, svga); - break; + case 0x3c6: + case 0x3c7: + case 0x3c8: + case 0x3c9: + if (mystique->type == MGA_2064W) + temp = tvp3026_ramdac_in(addr, 0, 0, svga->ramdac, svga); + else + temp = svga_in(addr, svga); + break; - case 0x3D4: - temp = svga->crtcreg; - break; - case 0x3D5: - if ((svga->crtcreg >= 0x19 && svga->crtcreg <= 0x21) || - svga->crtcreg == 0x23 || svga->crtcreg == 0x25 || svga->crtcreg >= 0x27) - temp = 0; - else - temp = svga->crtc[svga->crtcreg & 0x3f]; - break; + case 0x3D4: + temp = svga->crtcreg; + break; + case 0x3D5: + if ((svga->crtcreg >= 0x19 && svga->crtcreg <= 0x21) || svga->crtcreg == 0x23 || svga->crtcreg == 0x25 || svga->crtcreg >= 0x27) + temp = 0; + else + temp = svga->crtc[svga->crtcreg & 0x3f]; + break; - case 0x3de: - temp = mystique->crtcext_idx; - break; + case 0x3de: + temp = mystique->crtcext_idx; + break; - case 0x3df: - if (mystique->crtcext_idx < 6) - temp = mystique->crtcext_regs[mystique->crtcext_idx]; - break; + case 0x3df: + if (mystique->crtcext_idx < 6) + temp = mystique->crtcext_regs[mystique->crtcext_idx]; + break; - default: - temp = svga_in(addr, svga); - break; + default: + temp = svga_in(addr, svga); + break; } return temp; } - static int mystique_line_compare(svga_t *svga) { - mystique_t *mystique = (mystique_t *)svga->p; + mystique_t *mystique = (mystique_t *) svga->p; mystique->status |= STATUS_VLINEPEN; mystique_update_irqs(mystique); @@ -819,241 +812,254 @@ mystique_line_compare(svga_t *svga) static void mystique_vsync_callback(svga_t *svga) { - mystique_t *mystique = (mystique_t *)svga->p; + mystique_t *mystique = (mystique_t *) svga->p; if (svga->crtc[0x11] & 0x10) { - mystique->status |= STATUS_VSYNCPEN; - mystique_update_irqs(mystique); + mystique->status |= STATUS_VSYNCPEN; + mystique_update_irqs(mystique); } } static float mystique_getclock(int clock, void *p) { - mystique_t *mystique = (mystique_t *)p; + mystique_t *mystique = (mystique_t *) p; - if (clock == 0) return 25175000.0; - if (clock == 1) return 28322000.0; + if (clock == 0) + return 25175000.0; + if (clock == 1) + return 28322000.0; - int m = mystique->xpixpll[2].m; - int n = mystique->xpixpll[2].n; - int pl = mystique->xpixpll[2].p; + int m = mystique->xpixpll[2].m; + int n = mystique->xpixpll[2].n; + int pl = mystique->xpixpll[2].p; - float fvco = 14318181.0 * (n + 1) / (m + 1); - float fo = fvco / (pl + 1); + float fvco = 14318181.0 * (n + 1) / (m + 1); + float fo = fvco / (pl + 1); - return fo; + return fo; } void mystique_recalctimings(svga_t *svga) { - mystique_t *mystique = (mystique_t *)svga->p; - int clk_sel = (svga->miscout >> 2) & 3; + mystique_t *mystique = (mystique_t *) svga->p; + int clk_sel = (svga->miscout >> 2) & 3; - svga->clock = (cpuclock * (float)(1ull << 32)) / svga->getclock(clk_sel & 2, svga->clock_gen); + svga->clock = (cpuclock * (float) (1ull << 32)) / svga->getclock(clk_sel & 2, svga->clock_gen); if (mystique->crtcext_regs[1] & CRTCX_R1_HTOTAL8) - svga->htotal += 0x100; + svga->htotal += 0x100; if (mystique->crtcext_regs[2] & CRTCX_R2_VTOTAL10) - svga->vtotal += 0x400; + svga->vtotal += 0x400; if (mystique->crtcext_regs[2] & CRTCX_R2_VTOTAL11) - svga->vtotal += 0x800; + svga->vtotal += 0x800; if (mystique->crtcext_regs[2] & CRTCX_R2_VDISPEND10) - svga->dispend += 0x400; + svga->dispend += 0x400; if (mystique->crtcext_regs[2] & CRTCX_R2_VBLKSTR10) - svga->vblankstart += 0x400; + svga->vblankstart += 0x400; if (mystique->crtcext_regs[2] & CRTCX_R2_VBLKSTR11) - svga->vblankstart += 0x800; + svga->vblankstart += 0x800; if (mystique->crtcext_regs[2] & CRTCX_R2_VSYNCSTR10) - svga->vsyncstart += 0x400; + svga->vsyncstart += 0x400; if (mystique->crtcext_regs[2] & CRTCX_R2_VSYNCSTR11) - svga->vsyncstart += 0x800; + svga->vsyncstart += 0x800; if (mystique->crtcext_regs[2] & CRTCX_R2_LINECOMP10) - svga->split += 0x400; + svga->split += 0x400; if (mystique->type == MGA_2064W) - tvp3026_recalctimings(svga->ramdac, svga); - else - svga->interlace = !!(mystique->crtcext_regs[0] & 0x80); + tvp3026_recalctimings(svga->ramdac, svga); + else + svga->interlace = !!(mystique->crtcext_regs[0] & 0x80); if (mystique->crtcext_regs[3] & CRTCX_R3_MGAMODE) { - svga->packed_chain4 = 1; - svga->lowres = 0; - svga->char_width = 8; - svga->hdisp = (svga->crtc[1] + 1) * 8; - svga->hdisp_time = svga->hdisp; - svga->rowoffset = svga->crtc[0x13] | ((mystique->crtcext_regs[0] & CRTCX_R0_OFFSET_MASK) << 4); - svga->ma_latch = ((mystique->crtcext_regs[0] & CRTCX_R0_STARTADD_MASK) << 16) | - (svga->crtc[0xc] << 8) | svga->crtc[0xd]; - if (mystique->pci_regs[0x41] & (OPTION_INTERLEAVE >> 8)) - { - svga->rowoffset <<= 1; - svga->ma_latch <<= 1; - } - if (mystique->type >= MGA_1064SG) { - /*Mystique, unlike most SVGA cards, allows display start to take - effect mid-screen*/ - if (svga->ma_latch != mystique->ma_latch_old) { - if (svga->interlace && svga->oddeven) - svga->ma = svga->maback = (svga->maback - (mystique->ma_latch_old << 2)) + (svga->ma_latch << 2) + (svga->rowoffset << 1); - else - svga->ma = svga->maback = (svga->maback - (mystique->ma_latch_old << 2)) + (svga->ma_latch << 2); - mystique->ma_latch_old = svga->ma_latch; - } + svga->packed_chain4 = 1; + svga->lowres = 0; + svga->char_width = 8; + svga->hdisp = (svga->crtc[1] + 1) * 8; + svga->hdisp_time = svga->hdisp; + svga->rowoffset = svga->crtc[0x13] | ((mystique->crtcext_regs[0] & CRTCX_R0_OFFSET_MASK) << 4); + svga->ma_latch = ((mystique->crtcext_regs[0] & CRTCX_R0_STARTADD_MASK) << 16) | (svga->crtc[0xc] << 8) | svga->crtc[0xd]; + if (mystique->pci_regs[0x41] & (OPTION_INTERLEAVE >> 8)) { + svga->rowoffset <<= 1; + svga->ma_latch <<= 1; + } + if (mystique->type >= MGA_1064SG) { + /*Mystique, unlike most SVGA cards, allows display start to take + effect mid-screen*/ + if (svga->ma_latch != mystique->ma_latch_old) { + if (svga->interlace && svga->oddeven) + svga->ma = svga->maback = (svga->maback - (mystique->ma_latch_old << 2)) + (svga->ma_latch << 2) + (svga->rowoffset << 1); + else + svga->ma = svga->maback = (svga->maback - (mystique->ma_latch_old << 2)) + (svga->ma_latch << 2); + mystique->ma_latch_old = svga->ma_latch; + } - switch (mystique->xmulctrl & XMULCTRL_DEPTH_MASK) { - case XMULCTRL_DEPTH_8: - case XMULCTRL_DEPTH_2G8V16: - svga->render = svga_render_8bpp_highres; - svga->bpp = 8; - break; - case XMULCTRL_DEPTH_15: - case XMULCTRL_DEPTH_G16V16: - svga->render = svga_render_15bpp_highres; - svga->bpp = 15; - break; - case XMULCTRL_DEPTH_16: - svga->render = svga_render_16bpp_highres; - svga->bpp = 16; - break; - case XMULCTRL_DEPTH_24: - svga->render = svga_render_24bpp_highres; - svga->bpp = 24; - break; - case XMULCTRL_DEPTH_32: - case XMULCTRL_DEPTH_32_OVERLAYED: - svga->render = svga_render_32bpp_highres; - svga->bpp = 32; - break; - } - } else { - switch (svga->bpp) - { - case 8: - svga->render = svga_render_8bpp_highres; - break; - case 15: - svga->render = svga_render_15bpp_highres; - break; - case 16: - svga->render = svga_render_16bpp_highres; - break; - case 24: - svga->render = svga_render_24bpp_highres; - break; - case 32: - svga->render = svga_render_32bpp_highres; - break; - } - } - svga->line_compare = mystique_line_compare; + switch (mystique->xmulctrl & XMULCTRL_DEPTH_MASK) { + case XMULCTRL_DEPTH_8: + case XMULCTRL_DEPTH_2G8V16: + svga->render = svga_render_8bpp_highres; + svga->bpp = 8; + break; + case XMULCTRL_DEPTH_15: + case XMULCTRL_DEPTH_G16V16: + svga->render = svga_render_15bpp_highres; + svga->bpp = 15; + break; + case XMULCTRL_DEPTH_16: + svga->render = svga_render_16bpp_highres; + svga->bpp = 16; + break; + case XMULCTRL_DEPTH_24: + svga->render = svga_render_24bpp_highres; + svga->bpp = 24; + break; + case XMULCTRL_DEPTH_32: + case XMULCTRL_DEPTH_32_OVERLAYED: + svga->render = svga_render_32bpp_highres; + svga->bpp = 32; + break; + } + } else { + switch (svga->bpp) { + case 8: + svga->render = svga_render_8bpp_highres; + break; + case 15: + svga->render = svga_render_15bpp_highres; + break; + case 16: + svga->render = svga_render_16bpp_highres; + break; + case 24: + svga->render = svga_render_24bpp_highres; + break; + case 32: + svga->render = svga_render_32bpp_highres; + break; + } + } + svga->line_compare = mystique_line_compare; } else { - svga->packed_chain4 = 0; - svga->line_compare = NULL; - if (mystique->type >= MGA_1064SG) - svga->bpp = 8; + svga->packed_chain4 = 0; + svga->line_compare = NULL; + if (mystique->type >= MGA_1064SG) + svga->bpp = 8; } } - -static -void mystique_recalc_mapping(mystique_t *mystique) +static void +mystique_recalc_mapping(mystique_t *mystique) { svga_t *svga = &mystique->svga; io_removehandler(0x03c0, 0x0020, mystique_in, NULL, NULL, mystique_out, NULL, NULL, mystique); if ((mystique->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) && (mystique->pci_regs[0x41] & 1)) - io_sethandler(0x03c0, 0x0020, mystique_in, NULL, NULL, mystique_out, NULL, NULL, mystique); + io_sethandler(0x03c0, 0x0020, mystique_in, NULL, NULL, mystique_out, NULL, NULL, mystique); if (!(mystique->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) { - mem_mapping_disable(&svga->mapping); - mem_mapping_disable(&mystique->ctrl_mapping); - mem_mapping_disable(&mystique->lfb_mapping); - mem_mapping_disable(&mystique->iload_mapping); - return; + mem_mapping_disable(&svga->mapping); + mem_mapping_disable(&mystique->ctrl_mapping); + mem_mapping_disable(&mystique->lfb_mapping); + mem_mapping_disable(&mystique->iload_mapping); + return; } if (mystique->ctrl_base) - mem_mapping_set_addr(&mystique->ctrl_mapping, mystique->ctrl_base, 0x4000); + mem_mapping_set_addr(&mystique->ctrl_mapping, mystique->ctrl_base, 0x4000); else - mem_mapping_disable(&mystique->ctrl_mapping); + mem_mapping_disable(&mystique->ctrl_mapping); if (mystique->lfb_base) - mem_mapping_set_addr(&mystique->lfb_mapping, mystique->lfb_base, 0x800000); + mem_mapping_set_addr(&mystique->lfb_mapping, mystique->lfb_base, 0x800000); else - mem_mapping_disable(&mystique->lfb_mapping); + mem_mapping_disable(&mystique->lfb_mapping); if (mystique->iload_base) - mem_mapping_set_addr(&mystique->iload_mapping, mystique->iload_base, 0x800000); + mem_mapping_set_addr(&mystique->iload_mapping, mystique->iload_base, 0x800000); else - mem_mapping_disable(&mystique->iload_mapping); + mem_mapping_disable(&mystique->iload_mapping); if (mystique->pci_regs[0x41] & 1) { - switch (svga->gdcreg[6] & 0x0C) { - case 0x0: /*128k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); - svga->banked_mask = 0x1ffff; - break; - case 0x4: /*64k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); - svga->banked_mask = 0xffff; - break; - case 0x8: /*32k at B0000*/ - mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); - svga->banked_mask = 0x7fff; - break; - case 0xC: /*32k at B8000*/ - mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); - svga->banked_mask = 0x7fff; - break; - } - if (svga->gdcreg[6] & 0xc) { - /*64k banks*/ - svga->read_bank = (mystique->crtcext_regs[4] & 0x7f) << 16; - svga->write_bank = (mystique->crtcext_regs[4] & 0x7f) << 16; - } else { - /*128k banks*/ - svga->read_bank = (mystique->crtcext_regs[4] & 0x7e) << 16; - svga->write_bank = (mystique->crtcext_regs[4] & 0x7e) << 16; - } + switch (svga->gdcreg[6] & 0x0C) { + case 0x0: /*128k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + svga->banked_mask = 0x1ffff; + break; + case 0x4: /*64k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + svga->banked_mask = 0xffff; + break; + case 0x8: /*32k at B0000*/ + mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); + svga->banked_mask = 0x7fff; + break; + case 0xC: /*32k at B8000*/ + mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); + svga->banked_mask = 0x7fff; + break; + } + if (svga->gdcreg[6] & 0xc) { + /*64k banks*/ + svga->read_bank = (mystique->crtcext_regs[4] & 0x7f) << 16; + svga->write_bank = (mystique->crtcext_regs[4] & 0x7f) << 16; + } else { + /*128k banks*/ + svga->read_bank = (mystique->crtcext_regs[4] & 0x7e) << 16; + svga->write_bank = (mystique->crtcext_regs[4] & 0x7e) << 16; + } } else - mem_mapping_disable(&svga->mapping); + mem_mapping_disable(&svga->mapping); } - static void mystique_update_irqs(mystique_t *mystique) { svga_t *svga = &mystique->svga; - int irq = 0; + int irq = 0; if ((mystique->status & mystique->ien) & STATUS_SOFTRAPEN) - irq = 1; + irq = 1; if ((mystique->status & STATUS_VSYNCPEN) && (svga->crtc[0x11] & 0x30) == 0x10) - irq = 1; + irq = 1; if (irq) - pci_set_irq(mystique->card, PCI_INTA); + pci_set_irq(mystique->card, PCI_INTA); else - pci_clear_irq(mystique->card, PCI_INTA); + pci_clear_irq(mystique->card, PCI_INTA); } +#define READ8(addr, var) \ + switch ((addr) &3) { \ + case 0: \ + ret = (var) &0xff; \ + break; \ + case 1: \ + ret = ((var) >> 8) & 0xff; \ + break; \ + case 2: \ + ret = ((var) >> 16) & 0xff; \ + break; \ + case 3: \ + ret = ((var) >> 24) & 0xff; \ + break; \ + } -#define READ8(addr, var) switch ((addr) & 3) { \ - case 0: ret = (var) & 0xff; break; \ - case 1: ret = ((var) >> 8) & 0xff; break; \ - case 2: ret = ((var) >> 16) & 0xff; break; \ - case 3: ret = ((var) >> 24) & 0xff; break; \ - } - -#define WRITE8(addr, var, val) switch ((addr) & 3) { \ - case 0: var = (var & 0xffffff00) | (val); break; \ - case 1: var = (var & 0xffff00ff) | ((val) << 8); break; \ - case 2: var = (var & 0xff00ffff) | ((val) << 16); break; \ - case 3: var = (var & 0x00ffffff) | ((val) << 24); break; \ - } - +#define WRITE8(addr, var, val) \ + switch ((addr) &3) { \ + case 0: \ + var = (var & 0xffffff00) | (val); \ + break; \ + case 1: \ + var = (var & 0xffff00ff) | ((val) << 8); \ + break; \ + case 2: \ + var = (var & 0xff00ffff) | ((val) << 16); \ + break; \ + case 3: \ + var = (var & 0x00ffffff) | ((val) << 24); \ + break; \ + } static uint8_t mystique_read_xreg(mystique_t *mystique, int reg) @@ -1061,1340 +1067,1527 @@ mystique_read_xreg(mystique_t *mystique, int reg) uint8_t ret = 0xff; switch (reg) { - case XREG_XCURADDL: - ret = mystique->cursor.addr & 0xff; - break; - case XREG_XCURADDH: - ret = mystique->cursor.addr >> 8; - break; - case XREG_XCURCTRL: - ret = mystique->xcurctrl; - break; + case XREG_XCURADDL: + ret = mystique->cursor.addr & 0xff; + break; + case XREG_XCURADDH: + ret = mystique->cursor.addr >> 8; + break; + case XREG_XCURCTRL: + ret = mystique->xcurctrl; + break; - case XREG_XCURCOL0R: case XREG_XCURCOL0G: case XREG_XCURCOL0B: - READ8(reg, mystique->cursor.col[0]); - break; - case XREG_XCURCOL1R: case XREG_XCURCOL1G: case XREG_XCURCOL1B: - READ8(reg, mystique->cursor.col[1]); - break; - case XREG_XCURCOL2R: case XREG_XCURCOL2G: case XREG_XCURCOL2B: - READ8(reg, mystique->cursor.col[2]); - break; + case XREG_XCURCOL0R: + case XREG_XCURCOL0G: + case XREG_XCURCOL0B: + READ8(reg, mystique->cursor.col[0]); + break; + case XREG_XCURCOL1R: + case XREG_XCURCOL1G: + case XREG_XCURCOL1B: + READ8(reg, mystique->cursor.col[1]); + break; + case XREG_XCURCOL2R: + case XREG_XCURCOL2G: + case XREG_XCURCOL2B: + READ8(reg, mystique->cursor.col[2]); + break; - case XREG_XMULCTRL: - ret = mystique->xmulctrl; - break; + case XREG_XMULCTRL: + ret = mystique->xmulctrl; + break; - case XREG_XMISCCTRL: - ret = mystique->xmiscctrl; - break; + case XREG_XMISCCTRL: + ret = mystique->xmiscctrl; + break; - case XREG_XGENCTRL: - ret = mystique->xgenctrl; - break; + case XREG_XGENCTRL: + ret = mystique->xgenctrl; + break; - case XREG_XVREFCTRL: - ret = mystique->xvrefctrl; - break; + case XREG_XVREFCTRL: + ret = mystique->xvrefctrl; + break; - case XREG_XGENIOCTRL: - ret = mystique->xgenioctrl; - break; - case XREG_XGENIODATA: - ret = mystique->xgeniodata & 0xf0; - if (i2c_gpio_get_scl(mystique->i2c_ddc)) - ret |= 0x08; - if (i2c_gpio_get_scl(mystique->i2c)) - ret |= 0x04; - if (i2c_gpio_get_sda(mystique->i2c_ddc)) - ret |= 0x02; - if (i2c_gpio_get_sda(mystique->i2c)) - ret |= 0x01; - break; + case XREG_XGENIOCTRL: + ret = mystique->xgenioctrl; + break; + case XREG_XGENIODATA: + ret = mystique->xgeniodata & 0xf0; + if (i2c_gpio_get_scl(mystique->i2c_ddc)) + ret |= 0x08; + if (i2c_gpio_get_scl(mystique->i2c)) + ret |= 0x04; + if (i2c_gpio_get_sda(mystique->i2c_ddc)) + ret |= 0x02; + if (i2c_gpio_get_sda(mystique->i2c)) + ret |= 0x01; + break; - case XREG_XSYSPLLM: - ret = mystique->xsyspllm; - break; - case XREG_XSYSPLLN: - ret = mystique->xsysplln; - break; - case XREG_XSYSPLLP: - ret = mystique->xsyspllp; - break; + case XREG_XSYSPLLM: + ret = mystique->xsyspllm; + break; + case XREG_XSYSPLLN: + ret = mystique->xsysplln; + break; + case XREG_XSYSPLLP: + ret = mystique->xsyspllp; + break; - case XREG_XZOOMCTRL: - ret = mystique->xzoomctrl; - break; + case XREG_XZOOMCTRL: + ret = mystique->xzoomctrl; + break; - case XREG_XSENSETEST: - ret = 0; - if (mystique->svga.vgapal[0].b < 0x80) - ret |= 1; - if (mystique->svga.vgapal[0].g < 0x80) - ret |= 2; - if (mystique->svga.vgapal[0].r < 0x80) - ret |= 4; - break; + case XREG_XSENSETEST: + ret = 0; + if (mystique->svga.vgapal[0].b < 0x80) + ret |= 1; + if (mystique->svga.vgapal[0].g < 0x80) + ret |= 2; + if (mystique->svga.vgapal[0].r < 0x80) + ret |= 4; + break; - case XREG_XCRCREML: /*CRC not implemented*/ - ret = 0; - break; - case XREG_XCRCREMH: - ret = 0; - break; - case XREG_XCRCBITSEL: - ret = mystique->xcrcbitsel; - break; + case XREG_XCRCREML: /*CRC not implemented*/ + ret = 0; + break; + case XREG_XCRCREMH: + ret = 0; + break; + case XREG_XCRCBITSEL: + ret = mystique->xcrcbitsel; + break; - case XREG_XCOLKEYMSKL: - ret = mystique->xcolkeymskl; - break; - case XREG_XCOLKEYMSKH: - ret = mystique->xcolkeymskh; - break; - case XREG_XCOLKEYL: - ret = mystique->xcolkeyl; - break; - case XREG_XCOLKEYH: - ret = mystique->xcolkeyh; - break; + case XREG_XCOLKEYMSKL: + ret = mystique->xcolkeymskl; + break; + case XREG_XCOLKEYMSKH: + ret = mystique->xcolkeymskh; + break; + case XREG_XCOLKEYL: + ret = mystique->xcolkeyl; + break; + case XREG_XCOLKEYH: + ret = mystique->xcolkeyh; + break; - case XREG_XPIXCLKCTRL: - ret = mystique->xpixclkctrl; - break; + case XREG_XPIXCLKCTRL: + ret = mystique->xpixclkctrl; + break; - case XREG_XSYSPLLSTAT: - ret = XSYSPLLSTAT_SYSLOCK; - break; + case XREG_XSYSPLLSTAT: + ret = XSYSPLLSTAT_SYSLOCK; + break; - case XREG_XPIXPLLSTAT: - ret = XPIXPLLSTAT_SYSLOCK; - break; + case XREG_XPIXPLLSTAT: + ret = XPIXPLLSTAT_SYSLOCK; + break; - case XREG_XPIXPLLCM: - ret = mystique->xpixpll[2].m; - break; - case XREG_XPIXPLLCN: - ret = mystique->xpixpll[2].n; - break; - case XREG_XPIXPLLCP: - ret = mystique->xpixpll[2].p | (mystique->xpixpll[2].s << 3); - break; + case XREG_XPIXPLLCM: + ret = mystique->xpixpll[2].m; + break; + case XREG_XPIXPLLCN: + ret = mystique->xpixpll[2].n; + break; + case XREG_XPIXPLLCP: + ret = mystique->xpixpll[2].p | (mystique->xpixpll[2].s << 3); + break; - case 0x00: case 0x20: case 0x3f: - ret = 0xff; - break; + case 0x00: + case 0x20: + case 0x3f: + ret = 0xff; + break; - default: - if (reg >= 0x50) - ret = 0xff; - break; + default: + if (reg >= 0x50) + ret = 0xff; + break; } return ret; } - static void mystique_write_xreg(mystique_t *mystique, int reg, uint8_t val) { svga_t *svga = &mystique->svga; switch (reg) { - case XREG_XCURADDL: - mystique->cursor.addr = (mystique->cursor.addr & 0x1f00) | val; - svga->hwcursor.addr = mystique->cursor.addr << 10; - break; - case XREG_XCURADDH: - mystique->cursor.addr = (mystique->cursor.addr & 0x00ff) | ((val & 0x1f) << 8); - svga->hwcursor.addr = mystique->cursor.addr << 10; - break; + case XREG_XCURADDL: + mystique->cursor.addr = (mystique->cursor.addr & 0x1f00) | val; + svga->hwcursor.addr = mystique->cursor.addr << 10; + break; + case XREG_XCURADDH: + mystique->cursor.addr = (mystique->cursor.addr & 0x00ff) | ((val & 0x1f) << 8); + svga->hwcursor.addr = mystique->cursor.addr << 10; + break; - case XREG_XCURCTRL: - mystique->xcurctrl = val; - svga->hwcursor.ena = (val & 3) ? 1 : 0; - break; + case XREG_XCURCTRL: + mystique->xcurctrl = val; + svga->hwcursor.ena = (val & 3) ? 1 : 0; + break; - case XREG_XCURCOL0R: case XREG_XCURCOL0G: case XREG_XCURCOL0B: - WRITE8(reg, mystique->cursor.col[0], val); - break; - case XREG_XCURCOL1R: case XREG_XCURCOL1G: case XREG_XCURCOL1B: - WRITE8(reg, mystique->cursor.col[1], val); - break; - case XREG_XCURCOL2R: case XREG_XCURCOL2G: case XREG_XCURCOL2B: - WRITE8(reg, mystique->cursor.col[2], val); - break; + case XREG_XCURCOL0R: + case XREG_XCURCOL0G: + case XREG_XCURCOL0B: + WRITE8(reg, mystique->cursor.col[0], val); + break; + case XREG_XCURCOL1R: + case XREG_XCURCOL1G: + case XREG_XCURCOL1B: + WRITE8(reg, mystique->cursor.col[1], val); + break; + case XREG_XCURCOL2R: + case XREG_XCURCOL2G: + case XREG_XCURCOL2B: + WRITE8(reg, mystique->cursor.col[2], val); + break; - case XREG_XMULCTRL: - mystique->xmulctrl = val; - break; + case XREG_XMULCTRL: + mystique->xmulctrl = val; + break; - case XREG_XMISCCTRL: - mystique->xmiscctrl = val; - svga_set_ramdac_type(svga, (val & XMISCCTRL_VGA8DAC) ? RAMDAC_8BIT : RAMDAC_6BIT); - break; + case XREG_XMISCCTRL: + mystique->xmiscctrl = val; + svga_set_ramdac_type(svga, (val & XMISCCTRL_VGA8DAC) ? RAMDAC_8BIT : RAMDAC_6BIT); + break; - case XREG_XGENCTRL: - mystique->xgenctrl = val; - break; + case XREG_XGENCTRL: + mystique->xgenctrl = val; + break; - case XREG_XVREFCTRL: - mystique->xvrefctrl = val; - break; + case XREG_XVREFCTRL: + mystique->xvrefctrl = val; + break; - case XREG_XGENIOCTRL: - mystique->xgenioctrl = val; - i2c_gpio_set(mystique->i2c_ddc, !(mystique->xgenioctrl & 0x08) || (mystique->xgeniodata & 0x08), !(mystique->xgenioctrl & 0x02) || (mystique->xgeniodata & 0x02)); - i2c_gpio_set(mystique->i2c, !(mystique->xgenioctrl & 0x04) || (mystique->xgeniodata & 0x04), !(mystique->xgenioctrl & 0x01) || (mystique->xgeniodata & 0x01)); - break; - case XREG_XGENIODATA: - mystique->xgeniodata = val; - break; + case XREG_XGENIOCTRL: + mystique->xgenioctrl = val; + i2c_gpio_set(mystique->i2c_ddc, !(mystique->xgenioctrl & 0x08) || (mystique->xgeniodata & 0x08), !(mystique->xgenioctrl & 0x02) || (mystique->xgeniodata & 0x02)); + i2c_gpio_set(mystique->i2c, !(mystique->xgenioctrl & 0x04) || (mystique->xgeniodata & 0x04), !(mystique->xgenioctrl & 0x01) || (mystique->xgeniodata & 0x01)); + break; + case XREG_XGENIODATA: + mystique->xgeniodata = val; + break; - case XREG_XSYSPLLM: - mystique->xsyspllm = val; - break; - case XREG_XSYSPLLN: - mystique->xsysplln = val; - break; - case XREG_XSYSPLLP: - mystique->xsyspllp = val; - break; + case XREG_XSYSPLLM: + mystique->xsyspllm = val; + break; + case XREG_XSYSPLLN: + mystique->xsysplln = val; + break; + case XREG_XSYSPLLP: + mystique->xsyspllp = val; + break; - case XREG_XZOOMCTRL: - mystique->xzoomctrl = val & 3; - break; + case XREG_XZOOMCTRL: + mystique->xzoomctrl = val & 3; + break; - case XREG_XSENSETEST: - break; + case XREG_XSENSETEST: + break; - case XREG_XCRCREML: /*CRC not implemented*/ - break; - case XREG_XCRCREMH: - break; - case XREG_XCRCBITSEL: - mystique->xcrcbitsel = val & 0x1f; - break; + case XREG_XCRCREML: /*CRC not implemented*/ + break; + case XREG_XCRCREMH: + break; + case XREG_XCRCBITSEL: + mystique->xcrcbitsel = val & 0x1f; + break; - case XREG_XCOLKEYMSKL: - mystique->xcolkeymskl = val; - break; - case XREG_XCOLKEYMSKH: - mystique->xcolkeymskh = val; - break; - case XREG_XCOLKEYL: - mystique->xcolkeyl = val; - break; - case XREG_XCOLKEYH: - mystique->xcolkeyh = val; - break; + case XREG_XCOLKEYMSKL: + mystique->xcolkeymskl = val; + break; + case XREG_XCOLKEYMSKH: + mystique->xcolkeymskh = val; + break; + case XREG_XCOLKEYL: + mystique->xcolkeyl = val; + break; + case XREG_XCOLKEYH: + mystique->xcolkeyh = val; + break; - case XREG_XSYSPLLSTAT: - break; + case XREG_XSYSPLLSTAT: + break; - case XREG_XPIXPLLSTAT: - break; + case XREG_XPIXPLLSTAT: + break; - case XREG_XPIXCLKCTRL: - mystique->xpixclkctrl = val; - break; + case XREG_XPIXCLKCTRL: + mystique->xpixclkctrl = val; + break; - case XREG_XPIXPLLCM: - mystique->xpixpll[2].m = val; - break; - case XREG_XPIXPLLCN: - mystique->xpixpll[2].n = val; - break; - case XREG_XPIXPLLCP: - mystique->xpixpll[2].p = val & 7; - mystique->xpixpll[2].s = (val >> 3) & 3; - break; + case XREG_XPIXPLLCM: + mystique->xpixpll[2].m = val; + break; + case XREG_XPIXPLLCN: + mystique->xpixpll[2].n = val; + break; + case XREG_XPIXPLLCP: + mystique->xpixpll[2].p = val & 7; + mystique->xpixpll[2].s = (val >> 3) & 3; + break; - case 0x00: case 0x01: case 0x02: case 0x03: - case 0x07: case 0x0b: case 0x0f: - case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: - case 0x1b: case 0x1c: case 0x20: case 0x39: case 0x3b: case 0x3f: - case 0x47: case 0x4b: - break; + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x07: + case 0x0b: + case 0x0f: + case 0x13: + case 0x14: + case 0x15: + case 0x16: + case 0x17: + case 0x1b: + case 0x1c: + case 0x20: + case 0x39: + case 0x3b: + case 0x3f: + case 0x47: + case 0x4b: + break; - default: - break; + default: + break; } } - static uint8_t mystique_ctrl_read_b(uint32_t addr, void *p) { - mystique_t *mystique = (mystique_t *)p; - svga_t *svga = &mystique->svga; - uint8_t ret = 0xff; - int fifocount; - uint16_t addr_0x0f = 0; - uint16_t addr_0x03 = 0; - int rs2 = 0, rs3 = 0; + mystique_t *mystique = (mystique_t *) p; + svga_t *svga = &mystique->svga; + uint8_t ret = 0xff; + int fifocount; + uint16_t addr_0x0f = 0; + uint16_t addr_0x03 = 0; + int rs2 = 0, rs3 = 0; - if ((mystique->type == MGA_2064W) && (addr & 0x3e00) == 0x3c00) - { - /*RAMDAC*/ - addr_0x0f = addr & 0x0f; + if ((mystique->type == MGA_2064W) && (addr & 0x3e00) == 0x3c00) { + /*RAMDAC*/ + addr_0x0f = addr & 0x0f; - if ((addr_0x0f & 3) == 0) - addr_0x03 = 0x3c8; - else if ((addr_0x0f & 3) == 1) - addr_0x03 = 0x3c9; - else if ((addr_0x0f & 3) == 2) - addr_0x03 = 0x3c6; - else if ((addr_0x0f & 3) == 3) - addr_0x03 = 0x3c7; + if ((addr_0x0f & 3) == 0) + addr_0x03 = 0x3c8; + else if ((addr_0x0f & 3) == 1) + addr_0x03 = 0x3c9; + else if ((addr_0x0f & 3) == 2) + addr_0x03 = 0x3c6; + else if ((addr_0x0f & 3) == 3) + addr_0x03 = 0x3c7; - if ((addr_0x0f >= 0x04) && (addr_0x0f <= 0x07)) { - rs2 = 1; - rs3 = 0; - } else if ((addr_0x0f >= 0x08) && (addr_0x0f <= 0x0b)) { - rs2 = 0; - rs3 = 1; - } else if ((addr_0x0f >= 0x0c) && (addr_0x0f <= 0x0f)) { - rs2 = 1; - rs3 = 1; - } + if ((addr_0x0f >= 0x04) && (addr_0x0f <= 0x07)) { + rs2 = 1; + rs3 = 0; + } else if ((addr_0x0f >= 0x08) && (addr_0x0f <= 0x0b)) { + rs2 = 0; + rs3 = 1; + } else if ((addr_0x0f >= 0x0c) && (addr_0x0f <= 0x0f)) { + rs2 = 1; + rs3 = 1; + } - ret = tvp3026_ramdac_in(addr_0x03, rs2, rs3, svga->ramdac, svga); - } else switch (addr & 0x3fff) { - case REG_FIFOSTATUS: - fifocount = FIFO_SIZE - FIFO_ENTRIES; - if (fifocount > 64) - fifocount = 64; - ret = fifocount; - break; - case REG_FIFOSTATUS+1: - if (FIFO_EMPTY) - ret |= 2; - else if (FIFO_ENTRIES >= 64) - ret |= 1; - break; - case REG_FIFOSTATUS+2: case REG_FIFOSTATUS+3: - ret = 0; - break; - - case REG_STATUS: - ret = mystique->status & 0xff; - if (svga->cgastat & 8) - ret |= REG_STATUS_VSYNCSTS; - break; - case REG_STATUS+1: - ret = (mystique->status >> 8) & 0xff; - break; - case REG_STATUS+2: - ret = (mystique->status >> 16) & 0xff; - if (mystique->busy || - ((mystique->blitter_submit_refcount + mystique->blitter_submit_dma_refcount) != mystique->blitter_complete_refcount) || - !FIFO_EMPTY) - ret |= (STATUS_DWGENGSTS >> 16); - break; - case REG_STATUS+3: - ret = (mystique->status >> 24) & 0xff; - break; - - case REG_IEN: - ret = mystique->ien & 0x64; - break; - case REG_IEN+1: case REG_IEN+2: case REG_IEN+3: - ret = 0; - break; - - case REG_OPMODE: - ret = mystique->dmamod << 2; - break; - case REG_OPMODE+1: - ret = mystique->dmadatasiz; - break; - case REG_OPMODE+2: - ret = mystique->dirdatasiz; - break; - case REG_OPMODE+3: - ret = 0; - break; - - case REG_PRIMADDRESS: case REG_PRIMADDRESS+1: case REG_PRIMADDRESS+2: case REG_PRIMADDRESS+3: - READ8(addr, mystique->dma.primaddress); - break; - case REG_PRIMEND: case REG_PRIMEND+1: case REG_PRIMEND+2: case REG_PRIMEND+3: - READ8(addr, mystique->dma.primend); - break; - - case REG_SECADDRESS: case REG_SECADDRESS+1: case REG_SECADDRESS+2: case REG_SECADDRESS+3: - READ8(addr, mystique->dma.secaddress); - break; - - case REG_VCOUNT: case REG_VCOUNT+1: case REG_VCOUNT+2: case REG_VCOUNT+3: - READ8(addr, svga->vc); - break; - - case REG_ATTR_IDX: - ret = svga_in(0x3c0, svga); - break; - case REG_ATTR_DATA: - ret = svga_in(0x3c1, svga); - break; - - case REG_INSTS0: - ret = svga_in(0x3c2, svga); - break; - - case REG_SEQ_IDX: - ret = svga_in(0x3c4, svga); - break; - case REG_SEQ_DATA: - ret = svga_in(0x3c5, svga); - break; - - case REG_MISCREAD: - ret = svga_in(0x3cc, svga); - break; - - case REG_GCTL_IDX: - ret = mystique_in(0x3ce, mystique); - break; - case REG_GCTL_DATA: - ret = mystique_in(0x3cf, mystique); - break; - - case REG_CRTC_IDX: - ret = mystique_in(0x3d4, mystique); - break; - case REG_CRTC_DATA: - ret = mystique_in(0x3d5, mystique); - break; - - case REG_INSTS1: - ret = mystique_in(0x3da, mystique); - break; - - case REG_CRTCEXT_IDX: - ret = mystique_in(0x3de, mystique); - break; - case REG_CRTCEXT_DATA: - ret = mystique_in(0x3df, mystique); - break; - - case REG_PALWTADD: - ret = svga_in(0x3c8, svga); - break; - case REG_PALDATA: - ret = svga_in(0x3c9, svga); - break; - case REG_PIXRDMSK: - ret = svga_in(0x3c6, svga); - break; - case REG_PALRDADD: - ret = svga_in(0x3c7, svga); - break; - - case REG_X_DATAREG: - ret = mystique_read_xreg(mystique, mystique->xreg_idx); - break; - - case 0x1c40: case 0x1c41: case 0x1c42: case 0x1c43: - case 0x1d44: case 0x1d45: case 0x1d46: case 0x1d47: - case 0x1e50: case 0x1e51: case 0x1e52: case 0x1e53: - case REG_ICLEAR: case REG_ICLEAR+1: case REG_ICLEAR+2: case REG_ICLEAR+3: - case 0x2c30: case 0x2c31: case 0x2c32: case 0x2c33: - case 0x3e08: - break; - - case 0x3c08: case 0x3c09: case 0x3c0b: + ret = tvp3026_ramdac_in(addr_0x03, rs2, rs3, svga->ramdac, svga); + } else + switch (addr & 0x3fff) { + case REG_FIFOSTATUS: + fifocount = FIFO_SIZE - FIFO_ENTRIES; + if (fifocount > 64) + fifocount = 64; + ret = fifocount; + break; + case REG_FIFOSTATUS + 1: + if (FIFO_EMPTY) + ret |= 2; + else if (FIFO_ENTRIES >= 64) + ret |= 1; + break; + case REG_FIFOSTATUS + 2: + case REG_FIFOSTATUS + 3: + ret = 0; break; + case REG_STATUS: + ret = mystique->status & 0xff; + if (svga->cgastat & 8) + ret |= REG_STATUS_VSYNCSTS; + break; + case REG_STATUS + 1: + ret = (mystique->status >> 8) & 0xff; + break; + case REG_STATUS + 2: + ret = (mystique->status >> 16) & 0xff; + if (mystique->busy || ((mystique->blitter_submit_refcount + mystique->blitter_submit_dma_refcount) != mystique->blitter_complete_refcount) || !FIFO_EMPTY) + ret |= (STATUS_DWGENGSTS >> 16); + break; + case REG_STATUS + 3: + ret = (mystique->status >> 24) & 0xff; + break; - default: - if ((addr & 0x3fff) >= 0x2c00 && (addr & 0x3fff) < 0x2c40) - break; - if ((addr & 0x3fff) >= 0x3e00) - break; - break; - } + case REG_IEN: + ret = mystique->ien & 0x64; + break; + case REG_IEN + 1: + case REG_IEN + 2: + case REG_IEN + 3: + ret = 0; + break; + + case REG_OPMODE: + ret = mystique->dmamod << 2; + break; + case REG_OPMODE + 1: + ret = mystique->dmadatasiz; + break; + case REG_OPMODE + 2: + ret = mystique->dirdatasiz; + break; + case REG_OPMODE + 3: + ret = 0; + break; + + case REG_PRIMADDRESS: + case REG_PRIMADDRESS + 1: + case REG_PRIMADDRESS + 2: + case REG_PRIMADDRESS + 3: + READ8(addr, mystique->dma.primaddress); + break; + case REG_PRIMEND: + case REG_PRIMEND + 1: + case REG_PRIMEND + 2: + case REG_PRIMEND + 3: + READ8(addr, mystique->dma.primend); + break; + + case REG_SECADDRESS: + case REG_SECADDRESS + 1: + case REG_SECADDRESS + 2: + case REG_SECADDRESS + 3: + READ8(addr, mystique->dma.secaddress); + break; + + case REG_VCOUNT: + case REG_VCOUNT + 1: + case REG_VCOUNT + 2: + case REG_VCOUNT + 3: + READ8(addr, svga->vc); + break; + + case REG_ATTR_IDX: + ret = svga_in(0x3c0, svga); + break; + case REG_ATTR_DATA: + ret = svga_in(0x3c1, svga); + break; + + case REG_INSTS0: + ret = svga_in(0x3c2, svga); + break; + + case REG_SEQ_IDX: + ret = svga_in(0x3c4, svga); + break; + case REG_SEQ_DATA: + ret = svga_in(0x3c5, svga); + break; + + case REG_MISCREAD: + ret = svga_in(0x3cc, svga); + break; + + case REG_GCTL_IDX: + ret = mystique_in(0x3ce, mystique); + break; + case REG_GCTL_DATA: + ret = mystique_in(0x3cf, mystique); + break; + + case REG_CRTC_IDX: + ret = mystique_in(0x3d4, mystique); + break; + case REG_CRTC_DATA: + ret = mystique_in(0x3d5, mystique); + break; + + case REG_INSTS1: + ret = mystique_in(0x3da, mystique); + break; + + case REG_CRTCEXT_IDX: + ret = mystique_in(0x3de, mystique); + break; + case REG_CRTCEXT_DATA: + ret = mystique_in(0x3df, mystique); + break; + + case REG_PALWTADD: + ret = svga_in(0x3c8, svga); + break; + case REG_PALDATA: + ret = svga_in(0x3c9, svga); + break; + case REG_PIXRDMSK: + ret = svga_in(0x3c6, svga); + break; + case REG_PALRDADD: + ret = svga_in(0x3c7, svga); + break; + + case REG_X_DATAREG: + ret = mystique_read_xreg(mystique, mystique->xreg_idx); + break; + + case 0x1c40: + case 0x1c41: + case 0x1c42: + case 0x1c43: + case 0x1d44: + case 0x1d45: + case 0x1d46: + case 0x1d47: + case 0x1e50: + case 0x1e51: + case 0x1e52: + case 0x1e53: + case REG_ICLEAR: + case REG_ICLEAR + 1: + case REG_ICLEAR + 2: + case REG_ICLEAR + 3: + case 0x2c30: + case 0x2c31: + case 0x2c32: + case 0x2c33: + case 0x3e08: + break; + + case 0x3c08: + case 0x3c09: + case 0x3c0b: + break; + + default: + if ((addr & 0x3fff) >= 0x2c00 && (addr & 0x3fff) < 0x2c40) + break; + if ((addr & 0x3fff) >= 0x3e00) + break; + break; + } return ret; } - static void mystique_accel_ctrl_write_b(uint32_t addr, uint8_t val, void *p) { - mystique_t *mystique = (mystique_t *)p; - int start_blit = 0; - int x; + mystique_t *mystique = (mystique_t *) p; + int start_blit = 0; + int x; if ((addr & 0x300) == 0x100) { - addr &= ~0x100; - start_blit = 1; + addr &= ~0x100; + start_blit = 1; } switch (addr & 0x3fff) { - case REG_MACCESS: case REG_MACCESS+1: case REG_MACCESS+2: case REG_MACCESS+3: - WRITE8(addr, mystique->maccess, val); - mystique->dwgreg.dither = mystique->maccess >> 30; - break; + case REG_MACCESS: + case REG_MACCESS + 1: + case REG_MACCESS + 2: + case REG_MACCESS + 3: + WRITE8(addr, mystique->maccess, val); + mystique->dwgreg.dither = mystique->maccess >> 30; + break; - case REG_MCTLWTST: case REG_MCTLWTST+1: case REG_MCTLWTST+2: case REG_MCTLWTST+3: - WRITE8(addr, mystique->mctlwtst, val); - break; + case REG_MCTLWTST: + case REG_MCTLWTST + 1: + case REG_MCTLWTST + 2: + case REG_MCTLWTST + 3: + WRITE8(addr, mystique->mctlwtst, val); + break; - case REG_PAT0: case REG_PAT0+1: case REG_PAT0+2: case REG_PAT0+3: - case REG_PAT1: case REG_PAT1+1: case REG_PAT1+2: case REG_PAT1+3: - for (x = 0; x < 8; x++) - mystique->dwgreg.pattern[addr & 7][x] = val & (1 << (7-x)); - break; + case REG_PAT0: + case REG_PAT0 + 1: + case REG_PAT0 + 2: + case REG_PAT0 + 3: + case REG_PAT1: + case REG_PAT1 + 1: + case REG_PAT1 + 2: + case REG_PAT1 + 3: + for (x = 0; x < 8; x++) + mystique->dwgreg.pattern[addr & 7][x] = val & (1 << (7 - x)); + break; - case REG_XYSTRT: case REG_XYSTRT+1: - WRITE8(addr&1, mystique->dwgreg.ar[5], val); - if (mystique->dwgreg.ar[5] & 0x8000) - mystique->dwgreg.ar[5] |= 0xffff8000; - else - mystique->dwgreg.ar[5] &= ~0xffff8000; - WRITE8(addr&1, mystique->dwgreg.xdst, val); - break; - case REG_XYSTRT+2: case REG_XYSTRT+3: - WRITE8(addr & 1, mystique->dwgreg.ar[6], val); - if (mystique->dwgreg.ar[6] & 0x8000) - mystique->dwgreg.ar[6] |= 0xffff8000; - else - mystique->dwgreg.ar[6] &= ~0xffff8000; - WRITE8(addr & 1, mystique->dwgreg.ydst, val); - mystique->dwgreg.ydst_lin = ((int32_t)(int16_t)mystique->dwgreg.ydst * (mystique->dwgreg.pitch & PITCH_MASK)) + mystique->dwgreg.ydstorg; - break; + case REG_XYSTRT: + case REG_XYSTRT + 1: + WRITE8(addr & 1, mystique->dwgreg.ar[5], val); + if (mystique->dwgreg.ar[5] & 0x8000) + mystique->dwgreg.ar[5] |= 0xffff8000; + else + mystique->dwgreg.ar[5] &= ~0xffff8000; + WRITE8(addr & 1, mystique->dwgreg.xdst, val); + break; + case REG_XYSTRT + 2: + case REG_XYSTRT + 3: + WRITE8(addr & 1, mystique->dwgreg.ar[6], val); + if (mystique->dwgreg.ar[6] & 0x8000) + mystique->dwgreg.ar[6] |= 0xffff8000; + else + mystique->dwgreg.ar[6] &= ~0xffff8000; + WRITE8(addr & 1, mystique->dwgreg.ydst, val); + mystique->dwgreg.ydst_lin = ((int32_t) (int16_t) mystique->dwgreg.ydst * (mystique->dwgreg.pitch & PITCH_MASK)) + mystique->dwgreg.ydstorg; + break; - case REG_XYEND: case REG_XYEND+1: - WRITE8(addr&1, mystique->dwgreg.ar[0], val); - if (mystique->dwgreg.ar[0] & 0x8000) - mystique->dwgreg.ar[0] |= 0xffff8000; - else - mystique->dwgreg.ar[0] &= ~0xffff8000; - break; - case REG_XYEND+2: case REG_XYEND+3: - WRITE8(addr & 1, mystique->dwgreg.ar[2], val); - if (mystique->dwgreg.ar[2] & 0x8000) - mystique->dwgreg.ar[2] |= 0xffff8000; - else - mystique->dwgreg.ar[2] &= ~0xffff8000; - break; + case REG_XYEND: + case REG_XYEND + 1: + WRITE8(addr & 1, mystique->dwgreg.ar[0], val); + if (mystique->dwgreg.ar[0] & 0x8000) + mystique->dwgreg.ar[0] |= 0xffff8000; + else + mystique->dwgreg.ar[0] &= ~0xffff8000; + break; + case REG_XYEND + 2: + case REG_XYEND + 3: + WRITE8(addr & 1, mystique->dwgreg.ar[2], val); + if (mystique->dwgreg.ar[2] & 0x8000) + mystique->dwgreg.ar[2] |= 0xffff8000; + else + mystique->dwgreg.ar[2] &= ~0xffff8000; + break; - case REG_SGN: - mystique->dwgreg.sgn.sdydxl = val & SGN_SDYDXL; - mystique->dwgreg.sgn.scanleft = val & SGN_SCANLEFT; - mystique->dwgreg.sgn.sdxl = val & SGN_SDXL; - mystique->dwgreg.sgn.sdy = val & SGN_SDY; - mystique->dwgreg.sgn.sdxr = val & SGN_SDXR; - break; - case REG_SGN+1: case REG_SGN+2: case REG_SGN+3: - break; + case REG_SGN: + mystique->dwgreg.sgn.sdydxl = val & SGN_SDYDXL; + mystique->dwgreg.sgn.scanleft = val & SGN_SCANLEFT; + mystique->dwgreg.sgn.sdxl = val & SGN_SDXL; + mystique->dwgreg.sgn.sdy = val & SGN_SDY; + mystique->dwgreg.sgn.sdxr = val & SGN_SDXR; + break; + case REG_SGN + 1: + case REG_SGN + 2: + case REG_SGN + 3: + break; - case REG_LEN: case REG_LEN+1: - WRITE8(addr, mystique->dwgreg.length, val); - break; - case REG_LEN+2: - break; - case REG_LEN+3: - mystique->dwgreg.beta = val >> 4; - if (!mystique->dwgreg.beta) - mystique->dwgreg.beta = 16; - break; + case REG_LEN: + case REG_LEN + 1: + WRITE8(addr, mystique->dwgreg.length, val); + break; + case REG_LEN + 2: + break; + case REG_LEN + 3: + mystique->dwgreg.beta = val >> 4; + if (!mystique->dwgreg.beta) + mystique->dwgreg.beta = 16; + break; - case REG_CXBNDRY: case REG_CXBNDRY+1: - WRITE8(addr, mystique->dwgreg.cxleft, val); - break; - case REG_CXBNDRY+2: case REG_CXBNDRY+3: - WRITE8(addr & 1, mystique->dwgreg.cxright, val); - break; - case REG_FXBNDRY: case REG_FXBNDRY+1: - WRITE8(addr, mystique->dwgreg.fxleft, val); - break; - case REG_FXBNDRY+2: case REG_FXBNDRY+3: - WRITE8(addr & 1, mystique->dwgreg.fxright, val); - break; + case REG_CXBNDRY: + case REG_CXBNDRY + 1: + WRITE8(addr, mystique->dwgreg.cxleft, val); + break; + case REG_CXBNDRY + 2: + case REG_CXBNDRY + 3: + WRITE8(addr & 1, mystique->dwgreg.cxright, val); + break; + case REG_FXBNDRY: + case REG_FXBNDRY + 1: + WRITE8(addr, mystique->dwgreg.fxleft, val); + break; + case REG_FXBNDRY + 2: + case REG_FXBNDRY + 3: + WRITE8(addr & 1, mystique->dwgreg.fxright, val); + break; - case REG_YDSTLEN: case REG_YDSTLEN+1: - WRITE8(addr, mystique->dwgreg.length, val); - /* pclog("Write YDSTLEN+%i %i\n", addr&1, mystique->dwgreg.length); */ - break; - case REG_YDSTLEN+2: - mystique->dwgreg.ydst = (mystique->dwgreg.ydst & ~0xff) | val; - if (mystique->dwgreg.pitch & PITCH_YLIN) - mystique->dwgreg.ydst_lin = (mystique->dwgreg.ydst << 5) + mystique->dwgreg.ydstorg; - else { - mystique->dwgreg.ydst_lin = ((int32_t)(int16_t)mystique->dwgreg.ydst * (mystique->dwgreg.pitch & PITCH_MASK)) + mystique->dwgreg.ydstorg; - mystique->dwgreg.selline = val & 7; - } - break; - case REG_YDSTLEN+3: - mystique->dwgreg.ydst = (mystique->dwgreg.ydst & 0xff) | (((int32_t)(int8_t)val) << 8); - if (mystique->dwgreg.pitch & PITCH_YLIN) - mystique->dwgreg.ydst_lin = (mystique->dwgreg.ydst << 5) + mystique->dwgreg.ydstorg; - else - mystique->dwgreg.ydst_lin = ((int32_t)(int16_t)mystique->dwgreg.ydst * (mystique->dwgreg.pitch & PITCH_MASK)) + mystique->dwgreg.ydstorg; - break; + case REG_YDSTLEN: + case REG_YDSTLEN + 1: + WRITE8(addr, mystique->dwgreg.length, val); + /* pclog("Write YDSTLEN+%i %i\n", addr&1, mystique->dwgreg.length); */ + break; + case REG_YDSTLEN + 2: + mystique->dwgreg.ydst = (mystique->dwgreg.ydst & ~0xff) | val; + if (mystique->dwgreg.pitch & PITCH_YLIN) + mystique->dwgreg.ydst_lin = (mystique->dwgreg.ydst << 5) + mystique->dwgreg.ydstorg; + else { + mystique->dwgreg.ydst_lin = ((int32_t) (int16_t) mystique->dwgreg.ydst * (mystique->dwgreg.pitch & PITCH_MASK)) + mystique->dwgreg.ydstorg; + mystique->dwgreg.selline = val & 7; + } + break; + case REG_YDSTLEN + 3: + mystique->dwgreg.ydst = (mystique->dwgreg.ydst & 0xff) | (((int32_t) (int8_t) val) << 8); + if (mystique->dwgreg.pitch & PITCH_YLIN) + mystique->dwgreg.ydst_lin = (mystique->dwgreg.ydst << 5) + mystique->dwgreg.ydstorg; + else + mystique->dwgreg.ydst_lin = ((int32_t) (int16_t) mystique->dwgreg.ydst * (mystique->dwgreg.pitch & PITCH_MASK)) + mystique->dwgreg.ydstorg; + break; - case REG_XDST: case REG_XDST+1: - WRITE8(addr & 1, mystique->dwgreg.xdst, val); - break; - case REG_XDST+2: case REG_XDST+3: - break; + case REG_XDST: + case REG_XDST + 1: + WRITE8(addr & 1, mystique->dwgreg.xdst, val); + break; + case REG_XDST + 2: + case REG_XDST + 3: + break; - case REG_YDSTORG: case REG_YDSTORG+1: case REG_YDSTORG+2: case REG_YDSTORG+3: - WRITE8(addr, mystique->dwgreg.ydstorg, val); - mystique->dwgreg.z_base = mystique->dwgreg.ydstorg*2 + mystique->dwgreg.zorg; - break; - case REG_YTOP: case REG_YTOP+1: case REG_YTOP+2: case REG_YTOP+3: - WRITE8(addr, mystique->dwgreg.ytop, val); - break; - case REG_YBOT: case REG_YBOT+1: case REG_YBOT+2: case REG_YBOT+3: - WRITE8(addr, mystique->dwgreg.ybot, val); - break; + case REG_YDSTORG: + case REG_YDSTORG + 1: + case REG_YDSTORG + 2: + case REG_YDSTORG + 3: + WRITE8(addr, mystique->dwgreg.ydstorg, val); + mystique->dwgreg.z_base = mystique->dwgreg.ydstorg * 2 + mystique->dwgreg.zorg; + break; + case REG_YTOP: + case REG_YTOP + 1: + case REG_YTOP + 2: + case REG_YTOP + 3: + WRITE8(addr, mystique->dwgreg.ytop, val); + break; + case REG_YBOT: + case REG_YBOT + 1: + case REG_YBOT + 2: + case REG_YBOT + 3: + WRITE8(addr, mystique->dwgreg.ybot, val); + break; - case REG_CXLEFT: case REG_CXLEFT+1: - WRITE8(addr, mystique->dwgreg.cxleft, val); - break; - case REG_CXLEFT+2: case REG_CXLEFT+3: - break; - case REG_CXRIGHT: case REG_CXRIGHT+1: - WRITE8(addr, mystique->dwgreg.cxright, val); - break; - case REG_CXRIGHT+2: case REG_CXRIGHT+3: - break; + case REG_CXLEFT: + case REG_CXLEFT + 1: + WRITE8(addr, mystique->dwgreg.cxleft, val); + break; + case REG_CXLEFT + 2: + case REG_CXLEFT + 3: + break; + case REG_CXRIGHT: + case REG_CXRIGHT + 1: + WRITE8(addr, mystique->dwgreg.cxright, val); + break; + case REG_CXRIGHT + 2: + case REG_CXRIGHT + 3: + break; - case REG_FXLEFT: case REG_FXLEFT+1: - WRITE8(addr, mystique->dwgreg.fxleft, val); - break; - case REG_FXLEFT+2: case REG_FXLEFT+3: - break; - case REG_FXRIGHT: case REG_FXRIGHT+1: - WRITE8(addr, mystique->dwgreg.fxright, val); - break; - case REG_FXRIGHT+2: case REG_FXRIGHT+3: - break; + case REG_FXLEFT: + case REG_FXLEFT + 1: + WRITE8(addr, mystique->dwgreg.fxleft, val); + break; + case REG_FXLEFT + 2: + case REG_FXLEFT + 3: + break; + case REG_FXRIGHT: + case REG_FXRIGHT + 1: + WRITE8(addr, mystique->dwgreg.fxright, val); + break; + case REG_FXRIGHT + 2: + case REG_FXRIGHT + 3: + break; - case REG_SECADDRESS: case REG_SECADDRESS+1: case REG_SECADDRESS+2: case REG_SECADDRESS+3: - WRITE8(addr, mystique->dma.secaddress, val); - mystique->dma.sec_state = 0; - break; + case REG_SECADDRESS: + case REG_SECADDRESS + 1: + case REG_SECADDRESS + 2: + case REG_SECADDRESS + 3: + WRITE8(addr, mystique->dma.secaddress, val); + mystique->dma.sec_state = 0; + break; - case REG_TMR0: case REG_TMR0+1: case REG_TMR0+2: case REG_TMR0+3: - WRITE8(addr, mystique->dwgreg.tmr[0], val); - break; - case REG_TMR1: case REG_TMR1+1: case REG_TMR1+2: case REG_TMR1+3: - WRITE8(addr, mystique->dwgreg.tmr[1], val); - break; - case REG_TMR2: case REG_TMR2+1: case REG_TMR2+2: case REG_TMR2+3: - WRITE8(addr, mystique->dwgreg.tmr[2], val); - break; - case REG_TMR3: case REG_TMR3+1: case REG_TMR3+2: case REG_TMR3+3: - WRITE8(addr, mystique->dwgreg.tmr[3], val); - break; - case REG_TMR4: case REG_TMR4+1: case REG_TMR4+2: case REG_TMR4+3: - WRITE8(addr, mystique->dwgreg.tmr[4], val); - break; - case REG_TMR5: case REG_TMR5+1: case REG_TMR5+2: case REG_TMR5+3: - WRITE8(addr, mystique->dwgreg.tmr[5], val); - break; - case REG_TMR6: case REG_TMR6+1: case REG_TMR6+2: case REG_TMR6+3: - WRITE8(addr, mystique->dwgreg.tmr[6], val); - break; - case REG_TMR7: case REG_TMR7+1: case REG_TMR7+2: case REG_TMR7+3: - WRITE8(addr, mystique->dwgreg.tmr[7], val); - break; - case REG_TMR8: case REG_TMR8+1: case REG_TMR8+2: case REG_TMR8+3: - WRITE8(addr, mystique->dwgreg.tmr[8], val); - break; + case REG_TMR0: + case REG_TMR0 + 1: + case REG_TMR0 + 2: + case REG_TMR0 + 3: + WRITE8(addr, mystique->dwgreg.tmr[0], val); + break; + case REG_TMR1: + case REG_TMR1 + 1: + case REG_TMR1 + 2: + case REG_TMR1 + 3: + WRITE8(addr, mystique->dwgreg.tmr[1], val); + break; + case REG_TMR2: + case REG_TMR2 + 1: + case REG_TMR2 + 2: + case REG_TMR2 + 3: + WRITE8(addr, mystique->dwgreg.tmr[2], val); + break; + case REG_TMR3: + case REG_TMR3 + 1: + case REG_TMR3 + 2: + case REG_TMR3 + 3: + WRITE8(addr, mystique->dwgreg.tmr[3], val); + break; + case REG_TMR4: + case REG_TMR4 + 1: + case REG_TMR4 + 2: + case REG_TMR4 + 3: + WRITE8(addr, mystique->dwgreg.tmr[4], val); + break; + case REG_TMR5: + case REG_TMR5 + 1: + case REG_TMR5 + 2: + case REG_TMR5 + 3: + WRITE8(addr, mystique->dwgreg.tmr[5], val); + break; + case REG_TMR6: + case REG_TMR6 + 1: + case REG_TMR6 + 2: + case REG_TMR6 + 3: + WRITE8(addr, mystique->dwgreg.tmr[6], val); + break; + case REG_TMR7: + case REG_TMR7 + 1: + case REG_TMR7 + 2: + case REG_TMR7 + 3: + WRITE8(addr, mystique->dwgreg.tmr[7], val); + break; + case REG_TMR8: + case REG_TMR8 + 1: + case REG_TMR8 + 2: + case REG_TMR8 + 3: + WRITE8(addr, mystique->dwgreg.tmr[8], val); + break; - case REG_TEXORG: case REG_TEXORG+1: case REG_TEXORG+2: case REG_TEXORG+3: - WRITE8(addr, mystique->dwgreg.texorg, val); - break; - case REG_TEXWIDTH: case REG_TEXWIDTH+1: case REG_TEXWIDTH+2: case REG_TEXWIDTH+3: - WRITE8(addr, mystique->dwgreg.texwidth, val); - break; - case REG_TEXHEIGHT: case REG_TEXHEIGHT+1: case REG_TEXHEIGHT+2: case REG_TEXHEIGHT+3: - WRITE8(addr, mystique->dwgreg.texheight, val); - break; - case REG_TEXCTL: case REG_TEXCTL+1: case REG_TEXCTL+2: case REG_TEXCTL+3: - WRITE8(addr, mystique->dwgreg.texctl, val); - mystique->dwgreg.ta_key = (mystique->dwgreg.texctl & TEXCTL_TAKEY) ? 1 : 0; - mystique->dwgreg.ta_mask = (mystique->dwgreg.texctl & TEXCTL_TAMASK) ? 1 : 0; - break; - case REG_TEXTRANS: case REG_TEXTRANS+1: case REG_TEXTRANS+2: case REG_TEXTRANS+3: - WRITE8(addr, mystique->dwgreg.textrans, val); - break; + case REG_TEXORG: + case REG_TEXORG + 1: + case REG_TEXORG + 2: + case REG_TEXORG + 3: + WRITE8(addr, mystique->dwgreg.texorg, val); + break; + case REG_TEXWIDTH: + case REG_TEXWIDTH + 1: + case REG_TEXWIDTH + 2: + case REG_TEXWIDTH + 3: + WRITE8(addr, mystique->dwgreg.texwidth, val); + break; + case REG_TEXHEIGHT: + case REG_TEXHEIGHT + 1: + case REG_TEXHEIGHT + 2: + case REG_TEXHEIGHT + 3: + WRITE8(addr, mystique->dwgreg.texheight, val); + break; + case REG_TEXCTL: + case REG_TEXCTL + 1: + case REG_TEXCTL + 2: + case REG_TEXCTL + 3: + WRITE8(addr, mystique->dwgreg.texctl, val); + mystique->dwgreg.ta_key = (mystique->dwgreg.texctl & TEXCTL_TAKEY) ? 1 : 0; + mystique->dwgreg.ta_mask = (mystique->dwgreg.texctl & TEXCTL_TAMASK) ? 1 : 0; + break; + case REG_TEXTRANS: + case REG_TEXTRANS + 1: + case REG_TEXTRANS + 2: + case REG_TEXTRANS + 3: + WRITE8(addr, mystique->dwgreg.textrans, val); + break; - case 0x1c18: case 0x1c19: case 0x1c1a: case 0x1c1b: - case 0x1c28: case 0x1c29: case 0x1c2a: case 0x1c2b: - case 0x1c2c: case 0x1c2d: case 0x1c2e: case 0x1c2f: - case 0x1cc4: case 0x1cc5: case 0x1cc6: case 0x1cc7: - case 0x1cd4: case 0x1cd5: case 0x1cd6: case 0x1cd7: - case 0x1ce4: case 0x1ce5: case 0x1ce6: case 0x1ce7: - case 0x1cf4: case 0x1cf5: case 0x1cf6: case 0x1cf7: - break; + case 0x1c18: + case 0x1c19: + case 0x1c1a: + case 0x1c1b: + case 0x1c28: + case 0x1c29: + case 0x1c2a: + case 0x1c2b: + case 0x1c2c: + case 0x1c2d: + case 0x1c2e: + case 0x1c2f: + case 0x1cc4: + case 0x1cc5: + case 0x1cc6: + case 0x1cc7: + case 0x1cd4: + case 0x1cd5: + case 0x1cd6: + case 0x1cd7: + case 0x1ce4: + case 0x1ce5: + case 0x1ce6: + case 0x1ce7: + case 0x1cf4: + case 0x1cf5: + case 0x1cf6: + case 0x1cf7: + break; - case REG_OPMODE: - mystique->dwgreg.dmamod = (val >> 2) & 3; - mystique->dma.iload_state = 0; - break; + case REG_OPMODE: + mystique->dwgreg.dmamod = (val >> 2) & 3; + mystique->dma.iload_state = 0; + break; - default: - if ((addr & 0x3fff) >= 0x2c4c && (addr & 0x3fff) <= 0x2cff) - break; - break; + default: + if ((addr & 0x3fff) >= 0x2c4c && (addr & 0x3fff) <= 0x2cff) + break; + break; } if (start_blit) - mystique_start_blit(mystique); + mystique_start_blit(mystique); } - static void mystique_ctrl_write_b(uint32_t addr, uint8_t val, void *p) { - mystique_t *mystique = (mystique_t *)p; - svga_t *svga = &mystique->svga; - uint16_t addr_0x0f = 0; - uint16_t addr_0x03 = 0; - int rs2 = 0, rs3 = 0; + mystique_t *mystique = (mystique_t *) p; + svga_t *svga = &mystique->svga; + uint16_t addr_0x0f = 0; + uint16_t addr_0x03 = 0; + int rs2 = 0, rs3 = 0; - if ((mystique->type == MGA_2064W) && (addr & 0x3e00) == 0x3c00) - { - /*RAMDAC*/ - addr_0x0f = addr & 0x0f; + if ((mystique->type == MGA_2064W) && (addr & 0x3e00) == 0x3c00) { + /*RAMDAC*/ + addr_0x0f = addr & 0x0f; - if ((addr & 3) == 0) - addr_0x03 = 0x3c8; - else if ((addr & 3) == 1) - addr_0x03 = 0x3c9; - else if ((addr & 3) == 2) - addr_0x03 = 0x3c6; - else if ((addr & 3) == 3) - addr_0x03 = 0x3c7; + if ((addr & 3) == 0) + addr_0x03 = 0x3c8; + else if ((addr & 3) == 1) + addr_0x03 = 0x3c9; + else if ((addr & 3) == 2) + addr_0x03 = 0x3c6; + else if ((addr & 3) == 3) + addr_0x03 = 0x3c7; - if ((addr_0x0f >= 0x04) && (addr_0x0f <= 0x07)) { - rs2 = 1; - rs3 = 0; - } else if ((addr_0x0f >= 0x08) && (addr_0x0f <= 0x0b)) { - rs2 = 0; - rs3 = 1; - } else if ((addr_0x0f >= 0x0c) && (addr_0x0f <= 0x0f)) { - rs2 = 1; - rs3 = 1; - } + if ((addr_0x0f >= 0x04) && (addr_0x0f <= 0x07)) { + rs2 = 1; + rs3 = 0; + } else if ((addr_0x0f >= 0x08) && (addr_0x0f <= 0x0b)) { + rs2 = 0; + rs3 = 1; + } else if ((addr_0x0f >= 0x0c) && (addr_0x0f <= 0x0f)) { + rs2 = 1; + rs3 = 1; + } - tvp3026_ramdac_out(addr_0x03, rs2, rs3, val, svga->ramdac, svga); - return; - } + tvp3026_ramdac_out(addr_0x03, rs2, rs3, val, svga->ramdac, svga); + return; + } if ((addr & 0x3fff) < 0x1c00) { - mystique_iload_write_b(addr, val, p); - return; + mystique_iload_write_b(addr, val, p); + return; } if ((addr & 0x3e00) == 0x1c00 || (addr & 0x3e00) == 0x2c00) { - if ((addr & 0x300) == 0x100) - mystique->blitter_submit_refcount++; - mystique_queue(mystique, addr & 0x3fff, val, FIFO_WRITE_CTRL_BYTE); - return; + if ((addr & 0x300) == 0x100) + mystique->blitter_submit_refcount++; + mystique_queue(mystique, addr & 0x3fff, val, FIFO_WRITE_CTRL_BYTE); + return; } switch (addr & 0x3fff) { - case REG_ICLEAR: - if (val & ICLEAR_SOFTRAPICLR) { - mystique->status &= ~STATUS_SOFTRAPEN; - mystique_update_irqs(mystique); - } - if (val & ICLEAR_VLINEICLR) { - mystique->status &= ~STATUS_VLINEPEN; - mystique_update_irqs(mystique); - } - break; - case REG_ICLEAR+1: case REG_ICLEAR+2: case REG_ICLEAR+3: - break; - - case REG_IEN: - mystique->ien = val & 0x65; - break; - case REG_IEN+1: case REG_IEN+2: case REG_IEN+3: - break; - - case REG_OPMODE: - thread_wait_mutex(mystique->dma.lock); - mystique->dma.state = DMA_STATE_IDLE; /* Interrupt DMA. */ - thread_release_mutex(mystique->dma.lock); - mystique->dmamod = (val >> 2) & 3; - mystique_queue(mystique, addr & 0x3fff, val, FIFO_WRITE_CTRL_BYTE); - break; - case REG_OPMODE+1: - mystique->dmadatasiz = val & 3; - break; - case REG_OPMODE+2: - mystique->dirdatasiz = val & 3; - break; - case REG_OPMODE+3: - break; - - case REG_PRIMADDRESS: case REG_PRIMADDRESS+1: case REG_PRIMADDRESS+2: case REG_PRIMADDRESS+3: - thread_wait_mutex(mystique->dma.lock); - WRITE8(addr, mystique->dma.primaddress, val); - mystique->dma.pri_state = 0; - thread_release_mutex(mystique->dma.lock); - break; - - case REG_DMAMAP: case REG_DMAMAP+0x1: case REG_DMAMAP+0x2: case REG_DMAMAP+0x3: - case REG_DMAMAP+0x4: case REG_DMAMAP+0x5: case REG_DMAMAP+0x6: case REG_DMAMAP+0x7: - case REG_DMAMAP+0x8: case REG_DMAMAP+0x9: case REG_DMAMAP+0xa: case REG_DMAMAP+0xb: - case REG_DMAMAP+0xc: case REG_DMAMAP+0xd: case REG_DMAMAP+0xe: case REG_DMAMAP+0xf: - mystique->dmamap[addr & 0xf] = val; - break; - - case REG_RST: case REG_RST+1: case REG_RST+2: case REG_RST+3: - wait_fifo_idle(mystique); - mystique->busy = 0; - mystique->blitter_submit_refcount = 0; - mystique->blitter_submit_dma_refcount = 0; - mystique->blitter_complete_refcount = 0; - mystique->dwgreg.iload_rem_count = 0; - mystique->status = STATUS_ENDPRDMASTS; - break; - - case REG_ATTR_IDX: - svga_out(0x3c0, val, svga); - break; - case REG_ATTR_DATA: - svga_out(0x3c1, val, svga); - break; - - case REG_MISC: - svga_out(0x3c2, val, svga); - break; - - case REG_SEQ_IDX: - svga_out(0x3c4, val, svga); - break; - case REG_SEQ_DATA: - svga_out(0x3c5, val, svga); - break; - - case REG_GCTL_IDX: - mystique_out(0x3ce, val, mystique); - break; - case REG_GCTL_DATA: - mystique_out(0x3cf, val, mystique); - break; - - case REG_CRTC_IDX: - mystique_out(0x3d4, val, mystique); - break; - case REG_CRTC_DATA: - mystique_out(0x3d5, val, mystique); - break; - - case REG_CRTCEXT_IDX: - mystique_out(0x3de, val, mystique); - break; - case REG_CRTCEXT_DATA: - mystique_out(0x3df, val, mystique); - break; - - case REG_CACHEFLUSH: - break; - - case REG_PALWTADD: - svga_out(0x3c8, val, svga); - mystique->xreg_idx = val; - break; - case REG_PALDATA: - svga_out(0x3c9, val, svga); - break; - case REG_PIXRDMSK: - svga_out(0x3c6, val, svga); - break; - case REG_PALRDADD: - svga_out(0x3c7, val, svga); - break; - - case REG_X_DATAREG: - mystique_write_xreg(mystique, mystique->xreg_idx, val); - break; - - case REG_CURPOSX: case REG_CURPOSX+1: - WRITE8(addr, mystique->cursor.pos_x, val); - svga->hwcursor.x = mystique->cursor.pos_x - 64; - break; - case REG_CURPOSY: case REG_CURPOSY+1: - WRITE8(addr & 1, mystique->cursor.pos_y, val); - svga->hwcursor.y = mystique->cursor.pos_y - 64; - break; - - case 0x1e50: case 0x1e51: case 0x1e52: case 0x1e53: - case 0x3c0b: case 0x3e02: case 0x3e08: - break; - - default: - if ((addr & 0x3fff) >= 0x2c4c && (addr & 0x3fff) <= 0x2cff) - break; - if ((addr & 0x3fff) >= 0x3e00) + case REG_ICLEAR: + if (val & ICLEAR_SOFTRAPICLR) { + mystique->status &= ~STATUS_SOFTRAPEN; + mystique_update_irqs(mystique); + } + if (val & ICLEAR_VLINEICLR) { + mystique->status &= ~STATUS_VLINEPEN; + mystique_update_irqs(mystique); + } + break; + case REG_ICLEAR + 1: + case REG_ICLEAR + 2: + case REG_ICLEAR + 3: + break; + + case REG_IEN: + mystique->ien = val & 0x65; + break; + case REG_IEN + 1: + case REG_IEN + 2: + case REG_IEN + 3: + break; + + case REG_OPMODE: + thread_wait_mutex(mystique->dma.lock); + mystique->dma.state = DMA_STATE_IDLE; /* Interrupt DMA. */ + thread_release_mutex(mystique->dma.lock); + mystique->dmamod = (val >> 2) & 3; + mystique_queue(mystique, addr & 0x3fff, val, FIFO_WRITE_CTRL_BYTE); + break; + case REG_OPMODE + 1: + mystique->dmadatasiz = val & 3; + break; + case REG_OPMODE + 2: + mystique->dirdatasiz = val & 3; + break; + case REG_OPMODE + 3: + break; + + case REG_PRIMADDRESS: + case REG_PRIMADDRESS + 1: + case REG_PRIMADDRESS + 2: + case REG_PRIMADDRESS + 3: + thread_wait_mutex(mystique->dma.lock); + WRITE8(addr, mystique->dma.primaddress, val); + mystique->dma.pri_state = 0; + thread_release_mutex(mystique->dma.lock); + break; + + case REG_DMAMAP: + case REG_DMAMAP + 0x1: + case REG_DMAMAP + 0x2: + case REG_DMAMAP + 0x3: + case REG_DMAMAP + 0x4: + case REG_DMAMAP + 0x5: + case REG_DMAMAP + 0x6: + case REG_DMAMAP + 0x7: + case REG_DMAMAP + 0x8: + case REG_DMAMAP + 0x9: + case REG_DMAMAP + 0xa: + case REG_DMAMAP + 0xb: + case REG_DMAMAP + 0xc: + case REG_DMAMAP + 0xd: + case REG_DMAMAP + 0xe: + case REG_DMAMAP + 0xf: + mystique->dmamap[addr & 0xf] = val; + break; + + case REG_RST: + case REG_RST + 1: + case REG_RST + 2: + case REG_RST + 3: + wait_fifo_idle(mystique); + mystique->busy = 0; + mystique->blitter_submit_refcount = 0; + mystique->blitter_submit_dma_refcount = 0; + mystique->blitter_complete_refcount = 0; + mystique->dwgreg.iload_rem_count = 0; + mystique->status = STATUS_ENDPRDMASTS; + break; + + case REG_ATTR_IDX: + svga_out(0x3c0, val, svga); + break; + case REG_ATTR_DATA: + svga_out(0x3c1, val, svga); + break; + + case REG_MISC: + svga_out(0x3c2, val, svga); + break; + + case REG_SEQ_IDX: + svga_out(0x3c4, val, svga); + break; + case REG_SEQ_DATA: + svga_out(0x3c5, val, svga); + break; + + case REG_GCTL_IDX: + mystique_out(0x3ce, val, mystique); + break; + case REG_GCTL_DATA: + mystique_out(0x3cf, val, mystique); + break; + + case REG_CRTC_IDX: + mystique_out(0x3d4, val, mystique); + break; + case REG_CRTC_DATA: + mystique_out(0x3d5, val, mystique); + break; + + case REG_CRTCEXT_IDX: + mystique_out(0x3de, val, mystique); + break; + case REG_CRTCEXT_DATA: + mystique_out(0x3df, val, mystique); + break; + + case REG_CACHEFLUSH: + break; + + case REG_PALWTADD: + svga_out(0x3c8, val, svga); + mystique->xreg_idx = val; + break; + case REG_PALDATA: + svga_out(0x3c9, val, svga); + break; + case REG_PIXRDMSK: + svga_out(0x3c6, val, svga); + break; + case REG_PALRDADD: + svga_out(0x3c7, val, svga); + break; + + case REG_X_DATAREG: + mystique_write_xreg(mystique, mystique->xreg_idx, val); + break; + + case REG_CURPOSX: + case REG_CURPOSX + 1: + WRITE8(addr, mystique->cursor.pos_x, val); + svga->hwcursor.x = mystique->cursor.pos_x - 64; + break; + case REG_CURPOSY: + case REG_CURPOSY + 1: + WRITE8(addr & 1, mystique->cursor.pos_y, val); + svga->hwcursor.y = mystique->cursor.pos_y - 64; + break; + + case 0x1e50: + case 0x1e51: + case 0x1e52: + case 0x1e53: + case 0x3c0b: + case 0x3e02: + case 0x3e08: + break; + + default: + if ((addr & 0x3fff) >= 0x2c4c && (addr & 0x3fff) <= 0x2cff) + break; + if ((addr & 0x3fff) >= 0x3e00) + break; break; - break; } } - static uint32_t mystique_ctrl_read_l(uint32_t addr, void *p) { uint32_t ret; if ((addr & 0x3fff) < 0x1c00) - return mystique_iload_read_l(addr, p); + return mystique_iload_read_l(addr, p); ret = mystique_ctrl_read_b(addr, p); - ret |= mystique_ctrl_read_b(addr+1, p) << 8; - ret |= mystique_ctrl_read_b(addr+2, p) << 16; - ret |= mystique_ctrl_read_b(addr+3, p) << 24; + ret |= mystique_ctrl_read_b(addr + 1, p) << 8; + ret |= mystique_ctrl_read_b(addr + 2, p) << 16; + ret |= mystique_ctrl_read_b(addr + 3, p) << 24; return ret; } - static void mystique_accel_ctrl_write_l(uint32_t addr, uint32_t val, void *p) { - mystique_t *mystique = (mystique_t *)p; - int start_blit = 0; + mystique_t *mystique = (mystique_t *) p; + int start_blit = 0; if ((addr & 0x300) == 0x100) { - addr &= ~0x100; - start_blit = 1; + addr &= ~0x100; + start_blit = 1; } switch (addr & 0x3ffc) { - case REG_DWGCTL: - mystique->dwgreg.dwgctrl = val; + case REG_DWGCTL: + mystique->dwgreg.dwgctrl = val; - if (val & DWGCTRL_SOLID) { - int x, y; + if (val & DWGCTRL_SOLID) { + int x, y; - for (y = 0; y < 8; y++) { - for (x = 0; x < 8; x++) - mystique->dwgreg.pattern[y][x] = 1; - } - mystique->dwgreg.src[0] = 0xffffffff; - mystique->dwgreg.src[1] = 0xffffffff; - mystique->dwgreg.src[2] = 0xffffffff; - mystique->dwgreg.src[3] = 0xffffffff; - } - if (val & DWGCTRL_ARZERO) { - mystique->dwgreg.ar[0] = 0; - mystique->dwgreg.ar[1] = 0; - mystique->dwgreg.ar[2] = 0; - mystique->dwgreg.ar[4] = 0; - mystique->dwgreg.ar[5] = 0; - mystique->dwgreg.ar[6] = 0; - } - if (val & DWGCTRL_SGNZERO) { - mystique->dwgreg.sgn.sdydxl = 0; - mystique->dwgreg.sgn.scanleft = 0; - mystique->dwgreg.sgn.sdxl = 0; - mystique->dwgreg.sgn.sdy = 0; - mystique->dwgreg.sgn.sdxr = 0; - } - if (val & DWGCTRL_SHTZERO) { - mystique->dwgreg.funcnt = 0; - mystique->dwgreg.stylelen = 0; - mystique->dwgreg.xoff = 0; - mystique->dwgreg.yoff = 0; - } - break; + for (y = 0; y < 8; y++) { + for (x = 0; x < 8; x++) + mystique->dwgreg.pattern[y][x] = 1; + } + mystique->dwgreg.src[0] = 0xffffffff; + mystique->dwgreg.src[1] = 0xffffffff; + mystique->dwgreg.src[2] = 0xffffffff; + mystique->dwgreg.src[3] = 0xffffffff; + } + if (val & DWGCTRL_ARZERO) { + mystique->dwgreg.ar[0] = 0; + mystique->dwgreg.ar[1] = 0; + mystique->dwgreg.ar[2] = 0; + mystique->dwgreg.ar[4] = 0; + mystique->dwgreg.ar[5] = 0; + mystique->dwgreg.ar[6] = 0; + } + if (val & DWGCTRL_SGNZERO) { + mystique->dwgreg.sgn.sdydxl = 0; + mystique->dwgreg.sgn.scanleft = 0; + mystique->dwgreg.sgn.sdxl = 0; + mystique->dwgreg.sgn.sdy = 0; + mystique->dwgreg.sgn.sdxr = 0; + } + if (val & DWGCTRL_SHTZERO) { + mystique->dwgreg.funcnt = 0; + mystique->dwgreg.stylelen = 0; + mystique->dwgreg.xoff = 0; + mystique->dwgreg.yoff = 0; + } + break; - case REG_ZORG: - mystique->dwgreg.zorg = val; - mystique->dwgreg.z_base = mystique->dwgreg.ydstorg*2 + mystique->dwgreg.zorg; - break; + case REG_ZORG: + mystique->dwgreg.zorg = val; + mystique->dwgreg.z_base = mystique->dwgreg.ydstorg * 2 + mystique->dwgreg.zorg; + break; - case REG_PLNWT: - mystique->dwgreg.plnwt = val; - break; + case REG_PLNWT: + mystique->dwgreg.plnwt = val; + break; - case REG_SHIFT: - mystique->dwgreg.funcnt = val & 0xff; - mystique->dwgreg.xoff = val & 7; - mystique->dwgreg.yoff = (val >> 4) & 7; - mystique->dwgreg.stylelen = (val >> 16) & 0xff; - break; + case REG_SHIFT: + mystique->dwgreg.funcnt = val & 0xff; + mystique->dwgreg.xoff = val & 7; + mystique->dwgreg.yoff = (val >> 4) & 7; + mystique->dwgreg.stylelen = (val >> 16) & 0xff; + break; - case REG_PITCH: - mystique->dwgreg.pitch = val & 0xffff; - if (mystique->dwgreg.pitch & PITCH_YLIN) - mystique->dwgreg.ydst_lin = (mystique->dwgreg.ydst << 5) + mystique->dwgreg.ydstorg; - else - mystique->dwgreg.ydst_lin = ((int32_t)(int16_t)mystique->dwgreg.ydst * (mystique->dwgreg.pitch & PITCH_MASK)) + mystique->dwgreg.ydstorg; - break; + case REG_PITCH: + mystique->dwgreg.pitch = val & 0xffff; + if (mystique->dwgreg.pitch & PITCH_YLIN) + mystique->dwgreg.ydst_lin = (mystique->dwgreg.ydst << 5) + mystique->dwgreg.ydstorg; + else + mystique->dwgreg.ydst_lin = ((int32_t) (int16_t) mystique->dwgreg.ydst * (mystique->dwgreg.pitch & PITCH_MASK)) + mystique->dwgreg.ydstorg; + break; - case REG_YDST: - mystique->dwgreg.ydst = val & 0x3fffff; - if (mystique->dwgreg.pitch & PITCH_YLIN) { - mystique->dwgreg.ydst_lin = (mystique->dwgreg.ydst << 5) + mystique->dwgreg.ydstorg; - mystique->dwgreg.selline = val >> 29; - } else { - mystique->dwgreg.ydst_lin = ((int32_t)(int16_t)mystique->dwgreg.ydst * (mystique->dwgreg.pitch & PITCH_MASK)) + mystique->dwgreg.ydstorg; - mystique->dwgreg.selline = val & 7; - } - break; - case REG_BCOL: - mystique->dwgreg.bcol = val; - break; - case REG_FCOL: - mystique->dwgreg.fcol = val; - break; + case REG_YDST: + mystique->dwgreg.ydst = val & 0x3fffff; + if (mystique->dwgreg.pitch & PITCH_YLIN) { + mystique->dwgreg.ydst_lin = (mystique->dwgreg.ydst << 5) + mystique->dwgreg.ydstorg; + mystique->dwgreg.selline = val >> 29; + } else { + mystique->dwgreg.ydst_lin = ((int32_t) (int16_t) mystique->dwgreg.ydst * (mystique->dwgreg.pitch & PITCH_MASK)) + mystique->dwgreg.ydstorg; + mystique->dwgreg.selline = val & 7; + } + break; + case REG_BCOL: + mystique->dwgreg.bcol = val; + break; + case REG_FCOL: + mystique->dwgreg.fcol = val; + break; - case REG_SRC0: - mystique->dwgreg.src[0] = val; - if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD) - blit_iload_write(mystique, mystique->dwgreg.src[0], 32); - break; - case REG_SRC1: - mystique->dwgreg.src[1] = val; - if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD) - blit_iload_write(mystique, mystique->dwgreg.src[1], 32); - break; - case REG_SRC2: - mystique->dwgreg.src[2] = val; - if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD) - blit_iload_write(mystique, mystique->dwgreg.src[2], 32); - break; - case REG_SRC3: - mystique->dwgreg.src[3] = val; - if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD) - blit_iload_write(mystique, mystique->dwgreg.src[3], 32); - break; + case REG_SRC0: + mystique->dwgreg.src[0] = val; + if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD) + blit_iload_write(mystique, mystique->dwgreg.src[0], 32); + break; + case REG_SRC1: + mystique->dwgreg.src[1] = val; + if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD) + blit_iload_write(mystique, mystique->dwgreg.src[1], 32); + break; + case REG_SRC2: + mystique->dwgreg.src[2] = val; + if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD) + blit_iload_write(mystique, mystique->dwgreg.src[2], 32); + break; + case REG_SRC3: + mystique->dwgreg.src[3] = val; + if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD) + blit_iload_write(mystique, mystique->dwgreg.src[3], 32); + break; - case REG_DMAPAD: - if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD) - blit_iload_write(mystique, val, 32); - break; + case REG_DMAPAD: + if (mystique->busy && (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) == DWGCTRL_OPCODE_ILOAD) + blit_iload_write(mystique, val, 32); + break; - case REG_AR0: - mystique->dwgreg.ar[0] = val; - break; - case REG_AR1: - mystique->dwgreg.ar[1] = val; - break; - case REG_AR2: - mystique->dwgreg.ar[2] = val; - break; - case REG_AR3: - mystique->dwgreg.ar[3] = val; - break; - case REG_AR4: - mystique->dwgreg.ar[4] = val; - break; - case REG_AR5: - mystique->dwgreg.ar[5] = val; - break; - case REG_AR6: - mystique->dwgreg.ar[6] = val; - break; + case REG_AR0: + mystique->dwgreg.ar[0] = val; + break; + case REG_AR1: + mystique->dwgreg.ar[1] = val; + break; + case REG_AR2: + mystique->dwgreg.ar[2] = val; + break; + case REG_AR3: + mystique->dwgreg.ar[3] = val; + break; + case REG_AR4: + mystique->dwgreg.ar[4] = val; + break; + case REG_AR5: + mystique->dwgreg.ar[5] = val; + break; + case REG_AR6: + mystique->dwgreg.ar[6] = val; + break; - case REG_DR0: - mystique->dwgreg.dr[0] = val; - break; - case REG_DR2: - mystique->dwgreg.dr[2] = val; - break; - case REG_DR3: - mystique->dwgreg.dr[3] = val; - break; - case REG_DR4: - mystique->dwgreg.dr[4] = val; - break; - case REG_DR6: - mystique->dwgreg.dr[6] = val; - break; - case REG_DR7: - mystique->dwgreg.dr[7] = val; - break; - case REG_DR8: - mystique->dwgreg.dr[8] = val; - break; - case REG_DR10: - mystique->dwgreg.dr[10] = val; - break; - case REG_DR11: - mystique->dwgreg.dr[11] = val; - break; - case REG_DR12: - mystique->dwgreg.dr[12] = val; - break; - case REG_DR14: - mystique->dwgreg.dr[14] = val; - break; - case REG_DR15: - mystique->dwgreg.dr[15] = val; - break; + case REG_DR0: + mystique->dwgreg.dr[0] = val; + break; + case REG_DR2: + mystique->dwgreg.dr[2] = val; + break; + case REG_DR3: + mystique->dwgreg.dr[3] = val; + break; + case REG_DR4: + mystique->dwgreg.dr[4] = val; + break; + case REG_DR6: + mystique->dwgreg.dr[6] = val; + break; + case REG_DR7: + mystique->dwgreg.dr[7] = val; + break; + case REG_DR8: + mystique->dwgreg.dr[8] = val; + break; + case REG_DR10: + mystique->dwgreg.dr[10] = val; + break; + case REG_DR11: + mystique->dwgreg.dr[11] = val; + break; + case REG_DR12: + mystique->dwgreg.dr[12] = val; + break; + case REG_DR14: + mystique->dwgreg.dr[14] = val; + break; + case REG_DR15: + mystique->dwgreg.dr[15] = val; + break; - case REG_SECEND: - mystique->dma.secend = val; - if (mystique->dma.state != DMA_STATE_SEC && (mystique->dma.secaddress & DMA_ADDR_MASK) != (mystique->dma.secend & DMA_ADDR_MASK)) - mystique->dma.state = DMA_STATE_SEC; - break; + case REG_SECEND: + mystique->dma.secend = val; + if (mystique->dma.state != DMA_STATE_SEC && (mystique->dma.secaddress & DMA_ADDR_MASK) != (mystique->dma.secend & DMA_ADDR_MASK)) + mystique->dma.state = DMA_STATE_SEC; + break; - case REG_SOFTRAP: - mystique->dma.state = DMA_STATE_IDLE; - mystique->endprdmasts_pending = 1; - mystique->softrap_pending_val = val; - mystique->softrap_pending = 1; - break; + case REG_SOFTRAP: + mystique->dma.state = DMA_STATE_IDLE; + mystique->endprdmasts_pending = 1; + mystique->softrap_pending_val = val; + mystique->softrap_pending = 1; + break; - default: - mystique_accel_ctrl_write_b(addr, val & 0xff, p); - mystique_accel_ctrl_write_b(addr+1, (val >> 8) & 0xff, p); - mystique_accel_ctrl_write_b(addr+2, (val >> 16) & 0xff, p); - mystique_accel_ctrl_write_b(addr+3, (val >> 24) & 0xff, p); - break; + default: + mystique_accel_ctrl_write_b(addr, val & 0xff, p); + mystique_accel_ctrl_write_b(addr + 1, (val >> 8) & 0xff, p); + mystique_accel_ctrl_write_b(addr + 2, (val >> 16) & 0xff, p); + mystique_accel_ctrl_write_b(addr + 3, (val >> 24) & 0xff, p); + break; } if (start_blit) - mystique_start_blit(mystique); + mystique_start_blit(mystique); } - static void mystique_ctrl_write_l(uint32_t addr, uint32_t val, void *p) { - mystique_t *mystique = (mystique_t *)p; - uint32_t reg_addr; + mystique_t *mystique = (mystique_t *) p; + uint32_t reg_addr; if ((addr & 0x3fff) < 0x1c00) { - mystique_iload_write_l(addr, val, p); - return; + mystique_iload_write_l(addr, val, p); + return; } if ((addr & 0x3e00) == 0x1c00 || (addr & 0x3e00) == 0x2c00) { - if ((addr & 0x300) == 0x100) - mystique->blitter_submit_refcount++; - mystique_queue(mystique, addr & 0x3fff, val, FIFO_WRITE_CTRL_LONG); - return; + if ((addr & 0x300) == 0x100) + mystique->blitter_submit_refcount++; + mystique_queue(mystique, addr & 0x3fff, val, FIFO_WRITE_CTRL_LONG); + return; } switch (addr & 0x3ffc) { - case REG_PRIMEND: - thread_wait_mutex(mystique->dma.lock); - mystique->dma.primend = val; - if (mystique->dma.state == DMA_STATE_IDLE && (mystique->dma.primaddress & DMA_ADDR_MASK) != (mystique->dma.primend & DMA_ADDR_MASK)) { - mystique->endprdmasts_pending = 0; - mystique->status &= ~STATUS_ENDPRDMASTS; + case REG_PRIMEND: + thread_wait_mutex(mystique->dma.lock); + mystique->dma.primend = val; + if (mystique->dma.state == DMA_STATE_IDLE && (mystique->dma.primaddress & DMA_ADDR_MASK) != (mystique->dma.primend & DMA_ADDR_MASK)) { + mystique->endprdmasts_pending = 0; + mystique->status &= ~STATUS_ENDPRDMASTS; - mystique->dma.state = DMA_STATE_PRI; - mystique->dma.pri_state = 0; - wake_fifo_thread(mystique); - } - thread_release_mutex(mystique->dma.lock); - break; + mystique->dma.state = DMA_STATE_PRI; + mystique->dma.pri_state = 0; + wake_fifo_thread(mystique); + } + thread_release_mutex(mystique->dma.lock); + break; - case REG_DWG_INDIR_WT: case REG_DWG_INDIR_WT+0x04: case REG_DWG_INDIR_WT+0x08: case REG_DWG_INDIR_WT+0x0c: - case REG_DWG_INDIR_WT+0x10: case REG_DWG_INDIR_WT+0x14: case REG_DWG_INDIR_WT+0x18: case REG_DWG_INDIR_WT+0x1c: - case REG_DWG_INDIR_WT+0x20: case REG_DWG_INDIR_WT+0x24: case REG_DWG_INDIR_WT+0x28: case REG_DWG_INDIR_WT+0x2c: - case REG_DWG_INDIR_WT+0x30: case REG_DWG_INDIR_WT+0x34: case REG_DWG_INDIR_WT+0x38: case REG_DWG_INDIR_WT+0x3c: - reg_addr = (mystique->dmamap[(addr >> 2) & 0xf] & 0x7f) << 2; - if (mystique->dmamap[(addr >> 2) & 0xf] & 0x80) - reg_addr += 0x2c00; - else - reg_addr += 0x1c00; + case REG_DWG_INDIR_WT: + case REG_DWG_INDIR_WT + 0x04: + case REG_DWG_INDIR_WT + 0x08: + case REG_DWG_INDIR_WT + 0x0c: + case REG_DWG_INDIR_WT + 0x10: + case REG_DWG_INDIR_WT + 0x14: + case REG_DWG_INDIR_WT + 0x18: + case REG_DWG_INDIR_WT + 0x1c: + case REG_DWG_INDIR_WT + 0x20: + case REG_DWG_INDIR_WT + 0x24: + case REG_DWG_INDIR_WT + 0x28: + case REG_DWG_INDIR_WT + 0x2c: + case REG_DWG_INDIR_WT + 0x30: + case REG_DWG_INDIR_WT + 0x34: + case REG_DWG_INDIR_WT + 0x38: + case REG_DWG_INDIR_WT + 0x3c: + reg_addr = (mystique->dmamap[(addr >> 2) & 0xf] & 0x7f) << 2; + if (mystique->dmamap[(addr >> 2) & 0xf] & 0x80) + reg_addr += 0x2c00; + else + reg_addr += 0x1c00; - if ((reg_addr & 0x300) == 0x100) - mystique->blitter_submit_refcount++; + if ((reg_addr & 0x300) == 0x100) + mystique->blitter_submit_refcount++; - mystique_queue(mystique, reg_addr, val, FIFO_WRITE_CTRL_LONG); - break; + mystique_queue(mystique, reg_addr, val, FIFO_WRITE_CTRL_LONG); + break; - default: - mystique_ctrl_write_b(addr, val & 0xff, p); - mystique_ctrl_write_b(addr+1, (val >> 8) & 0xff, p); - mystique_ctrl_write_b(addr+2, (val >> 16) & 0xff, p); - mystique_ctrl_write_b(addr+3, (val >> 24) & 0xff, p); - break; + default: + mystique_ctrl_write_b(addr, val & 0xff, p); + mystique_ctrl_write_b(addr + 1, (val >> 8) & 0xff, p); + mystique_ctrl_write_b(addr + 2, (val >> 16) & 0xff, p); + mystique_ctrl_write_b(addr + 3, (val >> 24) & 0xff, p); + break; } } - static uint8_t mystique_iload_read_b(uint32_t addr, void *p) { - mystique_t *mystique = (mystique_t *)p; + mystique_t *mystique = (mystique_t *) p; wait_fifo_idle(mystique); if (!mystique->busy) - return 0xff; + return 0xff; return blit_idump_read(mystique); } - static uint32_t mystique_iload_read_l(uint32_t addr, void *p) { - mystique_t *mystique = (mystique_t *)p; + mystique_t *mystique = (mystique_t *) p; wait_fifo_idle(mystique); if (!mystique->busy) - return 0xffffffff; + return 0xffffffff; mystique->dwgreg.words++; return blit_idump_read(mystique); } - static void mystique_iload_write_b(uint32_t addr, uint8_t val, void *p) { - } - static void mystique_iload_write_l(uint32_t addr, uint32_t val, void *p) { - mystique_t *mystique = (mystique_t *)p; + mystique_t *mystique = (mystique_t *) p; mystique_queue(mystique, 0, val, FIFO_WRITE_ILOAD_LONG); } - static void mystique_accel_iload_write_l(uint32_t addr, uint32_t val, void *p) { - mystique_t *mystique = (mystique_t *)p; + mystique_t *mystique = (mystique_t *) p; switch (mystique->dwgreg.dmamod) { - case DMA_MODE_REG: - if (mystique->dma.iload_state == 0) { - mystique->dma.iload_header = val; - mystique->dma.iload_state = 1; - } else { - uint32_t reg_addr = (mystique->dma.iload_header & 0x7f) << 2; - if (mystique->dma.iload_header & 0x80) - reg_addr += 0x2c00; - else - reg_addr += 0x1c00; + case DMA_MODE_REG: + if (mystique->dma.iload_state == 0) { + mystique->dma.iload_header = val; + mystique->dma.iload_state = 1; + } else { + uint32_t reg_addr = (mystique->dma.iload_header & 0x7f) << 2; + if (mystique->dma.iload_header & 0x80) + reg_addr += 0x2c00; + else + reg_addr += 0x1c00; - if ((reg_addr & 0x300) == 0x100) - mystique->blitter_submit_dma_refcount++; - mystique_accel_ctrl_write_l(reg_addr, val, mystique); + if ((reg_addr & 0x300) == 0x100) + mystique->blitter_submit_dma_refcount++; + mystique_accel_ctrl_write_l(reg_addr, val, mystique); - mystique->dma.iload_header >>= 8; - mystique->dma.iload_state = (mystique->dma.iload_state == 4) ? 0 : (mystique->dma.iload_state+1); - } - break; + mystique->dma.iload_header >>= 8; + mystique->dma.iload_state = (mystique->dma.iload_state == 4) ? 0 : (mystique->dma.iload_state + 1); + } + break; - case DMA_MODE_BLIT: - if (mystique->busy) - blit_iload_write(mystique, val, 32); - break; + case DMA_MODE_BLIT: + if (mystique->busy) + blit_iload_write(mystique, val, 32); + break; - /* default: - pclog("ILOAD write DMAMOD %i\n", mystique->dwgreg.dmamod); */ + /* default: + pclog("ILOAD write DMAMOD %i\n", mystique->dwgreg.dmamod); */ } } - static uint8_t mystique_readb_linear(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; - cycles -= video_timing_read_b; + cycles -= video_timing_read_b; - addr &= svga->decode_mask; - if (addr >= svga->vram_max) - return 0xff; + addr &= svga->decode_mask; + if (addr >= svga->vram_max) + return 0xff; - return svga->vram[addr & svga->vram_mask]; + return svga->vram[addr & svga->vram_mask]; } - static uint16_t mystique_readw_linear(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; - cycles -= video_timing_read_w; + cycles -= video_timing_read_w; - addr &= svga->decode_mask; - if (addr >= svga->vram_max) - return 0xffff; + addr &= svga->decode_mask; + if (addr >= svga->vram_max) + return 0xffff; - return *(uint16_t *)&svga->vram[addr & svga->vram_mask]; + return *(uint16_t *) &svga->vram[addr & svga->vram_mask]; } - static uint32_t mystique_readl_linear(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; - cycles -= video_timing_read_l; + cycles -= video_timing_read_l; - addr &= svga->decode_mask; - if (addr >= svga->vram_max) - return 0xffffffff; + addr &= svga->decode_mask; + if (addr >= svga->vram_max) + return 0xffffffff; - return *(uint32_t *)&svga->vram[addr & svga->vram_mask]; + return *(uint32_t *) &svga->vram[addr & svga->vram_mask]; } - static void mystique_writeb_linear(uint32_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; - cycles -= video_timing_write_b; + cycles -= video_timing_write_b; - addr &= svga->decode_mask; - if (addr >= svga->vram_max) - return; - addr &= svga->vram_mask; - svga->changedvram[addr >> 12] = changeframecount; - svga->vram[addr] = val; + addr &= svga->decode_mask; + if (addr >= svga->vram_max) + return; + addr &= svga->vram_mask; + svga->changedvram[addr >> 12] = changeframecount; + svga->vram[addr] = val; } - static void mystique_writew_linear(uint32_t addr, uint16_t val, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; - cycles -= video_timing_write_w; + cycles -= video_timing_write_w; - addr &= svga->decode_mask; - if (addr >= svga->vram_max) - return; - addr &= svga->vram_mask; - svga->changedvram[addr >> 12] = changeframecount; - *(uint16_t *)&svga->vram[addr] = val; + addr &= svga->decode_mask; + if (addr >= svga->vram_max) + return; + addr &= svga->vram_mask; + svga->changedvram[addr >> 12] = changeframecount; + *(uint16_t *) &svga->vram[addr] = val; } - static void mystique_writel_linear(uint32_t addr, uint32_t val, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; - cycles -= video_timing_write_l; + cycles -= video_timing_write_l; - addr &= svga->decode_mask; - if (addr >= svga->vram_max) - return; - addr &= svga->vram_mask; - svga->changedvram[addr >> 12] = changeframecount; - *(uint32_t *)&svga->vram[addr] = val; + addr &= svga->decode_mask; + if (addr >= svga->vram_max) + return; + addr &= svga->vram_mask; + svga->changedvram[addr >> 12] = changeframecount; + *(uint32_t *) &svga->vram[addr] = val; } - static void run_dma(mystique_t *mystique) { @@ -2403,483 +2596,491 @@ run_dma(mystique_t *mystique) thread_wait_mutex(mystique->dma.lock); if (mystique->dma.state == DMA_STATE_IDLE) { - thread_release_mutex(mystique->dma.lock); - return; + thread_release_mutex(mystique->dma.lock); + return; } while (words_transferred < DMA_MAX_WORDS && mystique->dma.state != DMA_STATE_IDLE) { - switch (mystique->dma.state) { - case DMA_STATE_PRI: - switch (mystique->dma.primaddress & DMA_MODE_MASK) { - case DMA_MODE_REG: - if (mystique->dma.pri_state == 0) { - dma_bm_read(mystique->dma.primaddress & DMA_ADDR_MASK, (uint8_t *) &mystique->dma.pri_header, 4, 4); - mystique->dma.primaddress += 4; - } + switch (mystique->dma.state) { + case DMA_STATE_PRI: + switch (mystique->dma.primaddress & DMA_MODE_MASK) { + case DMA_MODE_REG: + if (mystique->dma.pri_state == 0) { + dma_bm_read(mystique->dma.primaddress & DMA_ADDR_MASK, (uint8_t *) &mystique->dma.pri_header, 4, 4); + mystique->dma.primaddress += 4; + } - if ((mystique->dma.pri_header & 0xff) != 0x15) { - uint32_t val, reg_addr; + if ((mystique->dma.pri_header & 0xff) != 0x15) { + uint32_t val, reg_addr; - dma_bm_read(mystique->dma.primaddress & DMA_ADDR_MASK, (uint8_t *) &val, 4, 4); - mystique->dma.primaddress += 4; + dma_bm_read(mystique->dma.primaddress & DMA_ADDR_MASK, (uint8_t *) &val, 4, 4); + mystique->dma.primaddress += 4; - reg_addr = (mystique->dma.pri_header & 0x7f) << 2; - if (mystique->dma.pri_header & 0x80) - reg_addr += 0x2c00; - else - reg_addr += 0x1c00; + reg_addr = (mystique->dma.pri_header & 0x7f) << 2; + if (mystique->dma.pri_header & 0x80) + reg_addr += 0x2c00; + else + reg_addr += 0x1c00; - if ((reg_addr & 0x300) == 0x100) - mystique->blitter_submit_dma_refcount++; + if ((reg_addr & 0x300) == 0x100) + mystique->blitter_submit_dma_refcount++; - mystique_accel_ctrl_write_l(reg_addr, val, mystique); - } + mystique_accel_ctrl_write_l(reg_addr, val, mystique); + } - mystique->dma.pri_header >>= 8; - mystique->dma.pri_state = (mystique->dma.pri_state + 1) & 3; + mystique->dma.pri_header >>= 8; + mystique->dma.pri_state = (mystique->dma.pri_state + 1) & 3; - words_transferred++; - if (mystique->dma.state == DMA_STATE_SEC) - mystique->dma.pri_state = 0; - else if ((mystique->dma.primaddress & DMA_ADDR_MASK) == (mystique->dma.primend & DMA_ADDR_MASK)) { - mystique->endprdmasts_pending = 1; - mystique->dma.state = DMA_STATE_IDLE; - } - break; + words_transferred++; + if (mystique->dma.state == DMA_STATE_SEC) + mystique->dma.pri_state = 0; + else if ((mystique->dma.primaddress & DMA_ADDR_MASK) == (mystique->dma.primend & DMA_ADDR_MASK)) { + mystique->endprdmasts_pending = 1; + mystique->dma.state = DMA_STATE_IDLE; + } + break; - default: - fatal("DMA_STATE_PRI: mode %i\n", mystique->dma.primaddress & DMA_MODE_MASK); - } - break; + default: + fatal("DMA_STATE_PRI: mode %i\n", mystique->dma.primaddress & DMA_MODE_MASK); + } + break; - case DMA_STATE_SEC: - switch (mystique->dma.secaddress & DMA_MODE_MASK) { - case DMA_MODE_REG: - if (mystique->dma.sec_state == 0) { - dma_bm_read(mystique->dma.secaddress & DMA_ADDR_MASK, (uint8_t *) &mystique->dma.sec_header, 4, 4); - mystique->dma.secaddress += 4; - } + case DMA_STATE_SEC: + switch (mystique->dma.secaddress & DMA_MODE_MASK) { + case DMA_MODE_REG: + if (mystique->dma.sec_state == 0) { + dma_bm_read(mystique->dma.secaddress & DMA_ADDR_MASK, (uint8_t *) &mystique->dma.sec_header, 4, 4); + mystique->dma.secaddress += 4; + } - uint32_t val, reg_addr; + uint32_t val, reg_addr; - dma_bm_read(mystique->dma.secaddress & DMA_ADDR_MASK, (uint8_t *) &val, 4, 4); - mystique->dma.secaddress += 4; + dma_bm_read(mystique->dma.secaddress & DMA_ADDR_MASK, (uint8_t *) &val, 4, 4); + mystique->dma.secaddress += 4; - reg_addr = (mystique->dma.sec_header & 0x7f) << 2; - if (mystique->dma.sec_header & 0x80) - reg_addr += 0x2c00; - else - reg_addr += 0x1c00; + reg_addr = (mystique->dma.sec_header & 0x7f) << 2; + if (mystique->dma.sec_header & 0x80) + reg_addr += 0x2c00; + else + reg_addr += 0x1c00; - if ((reg_addr & 0x300) == 0x100) - mystique->blitter_submit_dma_refcount++; + if ((reg_addr & 0x300) == 0x100) + mystique->blitter_submit_dma_refcount++; - mystique_accel_ctrl_write_l(reg_addr, val, mystique); + mystique_accel_ctrl_write_l(reg_addr, val, mystique); - mystique->dma.sec_header >>= 8; - mystique->dma.sec_state = (mystique->dma.sec_state + 1) & 3; + mystique->dma.sec_header >>= 8; + mystique->dma.sec_state = (mystique->dma.sec_state + 1) & 3; - words_transferred++; - if ((mystique->dma.secaddress & DMA_ADDR_MASK) == (mystique->dma.secend & DMA_ADDR_MASK)) { - if ((mystique->dma.primaddress & DMA_ADDR_MASK) == (mystique->dma.primend & DMA_ADDR_MASK)) { - mystique->endprdmasts_pending = 1; - mystique->dma.state = DMA_STATE_IDLE; - } else - mystique->dma.state = DMA_STATE_PRI; - } - break; + words_transferred++; + if ((mystique->dma.secaddress & DMA_ADDR_MASK) == (mystique->dma.secend & DMA_ADDR_MASK)) { + if ((mystique->dma.primaddress & DMA_ADDR_MASK) == (mystique->dma.primend & DMA_ADDR_MASK)) { + mystique->endprdmasts_pending = 1; + mystique->dma.state = DMA_STATE_IDLE; + } else + mystique->dma.state = DMA_STATE_PRI; + } + break; - case DMA_MODE_BLIT: { - uint32_t val; + case DMA_MODE_BLIT: + { + uint32_t val; - dma_bm_read(mystique->dma.secaddress & DMA_ADDR_MASK, (uint8_t *) &val, 4, 4); - mystique->dma.secaddress += 4; + dma_bm_read(mystique->dma.secaddress & DMA_ADDR_MASK, (uint8_t *) &val, 4, 4); + mystique->dma.secaddress += 4; - if (mystique->busy) - blit_iload_write(mystique, val, 32); + if (mystique->busy) + blit_iload_write(mystique, val, 32); - words_transferred++; - if ((mystique->dma.secaddress & DMA_ADDR_MASK) == (mystique->dma.secend & DMA_ADDR_MASK)) { - if ((mystique->dma.primaddress & DMA_ADDR_MASK) == (mystique->dma.primend & DMA_ADDR_MASK)) { - mystique->endprdmasts_pending = 1; - mystique->dma.state = DMA_STATE_IDLE; - } else - mystique->dma.state = DMA_STATE_PRI; - } - } break; + words_transferred++; + if ((mystique->dma.secaddress & DMA_ADDR_MASK) == (mystique->dma.secend & DMA_ADDR_MASK)) { + if ((mystique->dma.primaddress & DMA_ADDR_MASK) == (mystique->dma.primend & DMA_ADDR_MASK)) { + mystique->endprdmasts_pending = 1; + mystique->dma.state = DMA_STATE_IDLE; + } else + mystique->dma.state = DMA_STATE_PRI; + } + } + break; - default: - fatal("DMA_STATE_SEC: mode %i\n", mystique->dma.secaddress & DMA_MODE_MASK); - } - break; - } + default: + fatal("DMA_STATE_SEC: mode %i\n", mystique->dma.secaddress & DMA_MODE_MASK); + } + break; + } } thread_release_mutex(mystique->dma.lock); } - static void fifo_thread(void *p) { - mystique_t *mystique = (mystique_t *)p; + mystique_t *mystique = (mystique_t *) p; while (mystique->thread_run) { - thread_set_event(mystique->fifo_not_full_event); - thread_wait_event(mystique->wake_fifo_thread, -1); - thread_reset_event(mystique->wake_fifo_thread); + thread_set_event(mystique->fifo_not_full_event); + thread_wait_event(mystique->wake_fifo_thread, -1); + thread_reset_event(mystique->wake_fifo_thread); - while (!FIFO_EMPTY || mystique->dma.state != DMA_STATE_IDLE) { - int words_transferred = 0; + while (!FIFO_EMPTY || mystique->dma.state != DMA_STATE_IDLE) { + int words_transferred = 0; - while (!FIFO_EMPTY && words_transferred < 100) { - fifo_entry_t *fifo = &mystique->fifo[mystique->fifo_read_idx & FIFO_MASK]; + while (!FIFO_EMPTY && words_transferred < 100) { + fifo_entry_t *fifo = &mystique->fifo[mystique->fifo_read_idx & FIFO_MASK]; - switch (fifo->addr_type & FIFO_TYPE) { - case FIFO_WRITE_CTRL_BYTE: - mystique_accel_ctrl_write_b(fifo->addr_type & FIFO_ADDR, fifo->val, mystique); - break; - case FIFO_WRITE_CTRL_LONG: - mystique_accel_ctrl_write_l(fifo->addr_type & FIFO_ADDR, fifo->val, mystique); - break; - case FIFO_WRITE_ILOAD_LONG: - mystique_accel_iload_write_l(fifo->addr_type & FIFO_ADDR, fifo->val, mystique); - break; - } + switch (fifo->addr_type & FIFO_TYPE) { + case FIFO_WRITE_CTRL_BYTE: + mystique_accel_ctrl_write_b(fifo->addr_type & FIFO_ADDR, fifo->val, mystique); + break; + case FIFO_WRITE_CTRL_LONG: + mystique_accel_ctrl_write_l(fifo->addr_type & FIFO_ADDR, fifo->val, mystique); + break; + case FIFO_WRITE_ILOAD_LONG: + mystique_accel_iload_write_l(fifo->addr_type & FIFO_ADDR, fifo->val, mystique); + break; + } - fifo->addr_type = FIFO_INVALID; - mystique->fifo_read_idx++; + fifo->addr_type = FIFO_INVALID; + mystique->fifo_read_idx++; - if (FIFO_ENTRIES > FIFO_THRESHOLD) - thread_set_event(mystique->fifo_not_full_event); + if (FIFO_ENTRIES > FIFO_THRESHOLD) + thread_set_event(mystique->fifo_not_full_event); - words_transferred++; - } + words_transferred++; + } - /*Only run DMA once the FIFO is empty. Required by - Screamer 2 / Rally which will incorrectly clip an ILOAD - if DMA runs ahead*/ - if (!words_transferred) - run_dma(mystique); - } + /*Only run DMA once the FIFO is empty. Required by + Screamer 2 / Rally which will incorrectly clip an ILOAD + if DMA runs ahead*/ + if (!words_transferred) + run_dma(mystique); + } } } - static void wake_fifo_thread(mystique_t *mystique) { if (!timer_is_enabled(&mystique->wake_timer)) { - /* Don't wake FIFO thread immediately - if we do that it will probably - process one word and go back to sleep, requiring it to be woken on - almost every write. Instead, wait a short while so that the CPU - emulation writes more data so we have more batched-up work. */ - timer_set_delay_u64(&mystique->wake_timer, WAKE_DELAY); + /* Don't wake FIFO thread immediately - if we do that it will probably + process one word and go back to sleep, requiring it to be woken on + almost every write. Instead, wait a short while so that the CPU + emulation writes more data so we have more batched-up work. */ + timer_set_delay_u64(&mystique->wake_timer, WAKE_DELAY); } } - static void wake_fifo_thread_now(mystique_t *mystique) { thread_set_event(mystique->wake_fifo_thread); } - static void mystique_wake_timer(void *p) { - mystique_t *mystique = (mystique_t *)p; + mystique_t *mystique = (mystique_t *) p; thread_set_event(mystique->wake_fifo_thread); /*Wake up FIFO thread if moving from idle*/ } - static void wait_fifo_idle(mystique_t *mystique) { while (!FIFO_EMPTY) { - wake_fifo_thread_now(mystique); - thread_wait_event(mystique->fifo_not_full_event, 1); + wake_fifo_thread_now(mystique); + thread_wait_event(mystique->fifo_not_full_event, 1); } } - /*IRQ code (PCI & PIC) is not currently thread safe. SOFTRAP IRQ requests must therefore be submitted from the main emulation thread, in this case via a timer callback. End-of-DMA status is also deferred here to prevent races between SOFTRAP IRQs and code reading the status register. Croc will get into an IRQ loop and triple fault if the ENDPRDMASTS flag is seen before the IRQ is taken*/ -static void mystique_softrap_pending_timer(void *p) +static void +mystique_softrap_pending_timer(void *p) { - mystique_t *mystique = (mystique_t *)p; + mystique_t *mystique = (mystique_t *) p; timer_advance_u64(&mystique->softrap_pending_timer, TIMER_USEC * 100); if (mystique->endprdmasts_pending) { - mystique->endprdmasts_pending = 0; - mystique->status |= STATUS_ENDPRDMASTS; + mystique->endprdmasts_pending = 0; + mystique->status |= STATUS_ENDPRDMASTS; } if (mystique->softrap_pending) { - mystique->softrap_pending = 0; + mystique->softrap_pending = 0; - mystique->dma.secaddress = mystique->softrap_pending_val; - mystique->status |= STATUS_SOFTRAPEN; - mystique_update_irqs(mystique); + mystique->dma.secaddress = mystique->softrap_pending_val; + mystique->status |= STATUS_SOFTRAPEN; + mystique_update_irqs(mystique); } } - -static -void mystique_queue(mystique_t *mystique, uint32_t addr, uint32_t val, uint32_t type) +static void +mystique_queue(mystique_t *mystique, uint32_t addr, uint32_t val, uint32_t type) { fifo_entry_t *fifo = &mystique->fifo[mystique->fifo_write_idx & FIFO_MASK]; if (FIFO_FULL) { - thread_reset_event(mystique->fifo_not_full_event); - if (FIFO_FULL) - thread_wait_event(mystique->fifo_not_full_event, -1); /* Wait for room in ringbuffer */ + thread_reset_event(mystique->fifo_not_full_event); + if (FIFO_FULL) + thread_wait_event(mystique->fifo_not_full_event, -1); /* Wait for room in ringbuffer */ } - fifo->val = val; + fifo->val = val; fifo->addr_type = (addr & FIFO_ADDR) | type; mystique->fifo_write_idx++; if (FIFO_ENTRIES > FIFO_THRESHOLD || FIFO_ENTRIES < 8) - wake_fifo_thread(mystique); + wake_fifo_thread(mystique); } - static uint32_t bitop(uint32_t src, uint32_t dst, uint32_t dwgctrl) { switch (dwgctrl & DWGCTRL_BOP_MASK) { - case BOP(0x0): return 0; - case BOP(0x1): return ~(dst | src); - case BOP(0x2): return dst & ~src; - case BOP(0x3): return ~src; - case BOP(0x4): return ~dst & src; - case BOP(0x5): return ~dst; - case BOP(0x6): return dst ^ src; - case BOP(0x7): return ~(dst & src); - case BOP(0x8): return dst & src; - case BOP(0x9): return ~(dst ^ src); - case BOP(0xa): return dst; - case BOP(0xb): return dst | ~src; - case BOP(0xc): return src; - case BOP(0xd): return ~dst | src; - case BOP(0xe): return dst | src; - case BOP(0xf): return ~0; + case BOP(0x0): + return 0; + case BOP(0x1): + return ~(dst | src); + case BOP(0x2): + return dst & ~src; + case BOP(0x3): + return ~src; + case BOP(0x4): + return ~dst & src; + case BOP(0x5): + return ~dst; + case BOP(0x6): + return dst ^ src; + case BOP(0x7): + return ~(dst & src); + case BOP(0x8): + return dst & src; + case BOP(0x9): + return ~(dst ^ src); + case BOP(0xa): + return dst; + case BOP(0xb): + return dst | ~src; + case BOP(0xc): + return src; + case BOP(0xd): + return ~dst | src; + case BOP(0xe): + return dst | src; + case BOP(0xf): + return ~0; } return 0; } - static uint16_t dither(mystique_t *mystique, int r, int g, int b, int x, int y) { switch (mystique->dwgreg.dither) { - case DITHER_NONE_555: - return (b >> 3) | ((g >> 3) << 5) | ((r >> 3) << 10); + case DITHER_NONE_555: + return (b >> 3) | ((g >> 3) << 5) | ((r >> 3) << 10); - case DITHER_NONE_565: - return (b >> 3) | ((g >> 2) << 5) | ((r >> 3) << 11); + case DITHER_NONE_565: + return (b >> 3) | ((g >> 2) << 5) | ((r >> 3) << 11); - case DITHER_555: - return dither5[b][y][x] | (dither5[g][y][x] << 5) | (dither5[r][y][x] << 10); + case DITHER_555: + return dither5[b][y][x] | (dither5[g][y][x] << 5) | (dither5[r][y][x] << 10); - case DITHER_565: - default: - return dither5[b][y][x] | (dither6[g][y][x] << 5) | (dither5[r][y][x] << 11); + case DITHER_565: + default: + return dither5[b][y][x] | (dither6[g][y][x] << 5) | (dither5[r][y][x] << 11); } } - static uint32_t blit_idump_idump(mystique_t *mystique) { - svga_t *svga = &mystique->svga; + svga_t *svga = &mystique->svga; uint64_t val64 = 0; - uint32_t val = 0; - int count = 0; + uint32_t val = 0; + int count = 0; switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) { - case DWGCTRL_ATYPE_RPL: - switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { - case DWGCTRL_BLTMOD_BU32RGB: - case DWGCTRL_BLTMOD_BFCOL: - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_8: - while (count < 32) { - val |= (svga->vram[mystique->dwgreg.src_addr & mystique->vram_mask] << count); + case DWGCTRL_ATYPE_RPL: + switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { + case DWGCTRL_BLTMOD_BU32RGB: + case DWGCTRL_BLTMOD_BFCOL: + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_8: + while (count < 32) { + val |= (svga->vram[mystique->dwgreg.src_addr & mystique->vram_mask] << count); - if (mystique->dwgreg.src_addr == mystique->dwgreg.ar[0]) { - mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; - mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; - mystique->dwgreg.src_addr = mystique->dwgreg.ar[3]; - } else - mystique->dwgreg.src_addr++; + if (mystique->dwgreg.src_addr == mystique->dwgreg.ar[0]) { + mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; + mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; + mystique->dwgreg.src_addr = mystique->dwgreg.ar[3]; + } else + mystique->dwgreg.src_addr++; - if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.length_cur--; - if (!mystique->dwgreg.length_cur) { - mystique->busy = 0; - mystique->blitter_complete_refcount++; - break; - } - break; - } else - mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; + if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.length_cur--; + if (!mystique->dwgreg.length_cur) { + mystique->busy = 0; + mystique->blitter_complete_refcount++; + break; + } + break; + } else + mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; - count += 8; - } - break; + count += 8; + } + break; - case MACCESS_PWIDTH_16: - while (count < 32) { - val |= (((uint16_t *)svga->vram)[mystique->dwgreg.src_addr & mystique->vram_mask_w] << count); + case MACCESS_PWIDTH_16: + while (count < 32) { + val |= (((uint16_t *) svga->vram)[mystique->dwgreg.src_addr & mystique->vram_mask_w] << count); - if (mystique->dwgreg.src_addr == mystique->dwgreg.ar[0]) { - mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; - mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; - mystique->dwgreg.src_addr = mystique->dwgreg.ar[3]; - } else - mystique->dwgreg.src_addr++; + if (mystique->dwgreg.src_addr == mystique->dwgreg.ar[0]) { + mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; + mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; + mystique->dwgreg.src_addr = mystique->dwgreg.ar[3]; + } else + mystique->dwgreg.src_addr++; - if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.length_cur--; - if (!mystique->dwgreg.length_cur) { - mystique->busy = 0; - mystique->blitter_complete_refcount++; - break; - } - break; - } else - mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; + if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.length_cur--; + if (!mystique->dwgreg.length_cur) { + mystique->busy = 0; + mystique->blitter_complete_refcount++; + break; + } + break; + } else + mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; - count += 16; - } - break; + count += 16; + } + break; - case MACCESS_PWIDTH_24: - if (mystique->dwgreg.idump_end_of_line) { - mystique->dwgreg.idump_end_of_line = 0; - val = mystique->dwgreg.iload_rem_data; - mystique->dwgreg.iload_rem_count = 0; - mystique->dwgreg.iload_rem_data = 0; - if (!mystique->dwgreg.length_cur) { - mystique->busy = 0; - mystique->blitter_complete_refcount++; - } - break; - } + case MACCESS_PWIDTH_24: + if (mystique->dwgreg.idump_end_of_line) { + mystique->dwgreg.idump_end_of_line = 0; + val = mystique->dwgreg.iload_rem_data; + mystique->dwgreg.iload_rem_count = 0; + mystique->dwgreg.iload_rem_data = 0; + if (!mystique->dwgreg.length_cur) { + mystique->busy = 0; + mystique->blitter_complete_refcount++; + } + break; + } - count += mystique->dwgreg.iload_rem_count; - val64 = mystique->dwgreg.iload_rem_data; + count += mystique->dwgreg.iload_rem_count; + val64 = mystique->dwgreg.iload_rem_data; - while ((count < 32) && !mystique->dwgreg.idump_end_of_line) { - val64 |= (uint64_t)((*(uint32_t *)&svga->vram[(mystique->dwgreg.src_addr * 3) & mystique->vram_mask]) & 0xffffff) << count; + while ((count < 32) && !mystique->dwgreg.idump_end_of_line) { + val64 |= (uint64_t) ((*(uint32_t *) &svga->vram[(mystique->dwgreg.src_addr * 3) & mystique->vram_mask]) & 0xffffff) << count; - if (mystique->dwgreg.src_addr == mystique->dwgreg.ar[0]) { - mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; - mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; - mystique->dwgreg.src_addr = mystique->dwgreg.ar[3]; - } else - mystique->dwgreg.src_addr++; + if (mystique->dwgreg.src_addr == mystique->dwgreg.ar[0]) { + mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; + mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; + mystique->dwgreg.src_addr = mystique->dwgreg.ar[3]; + } else + mystique->dwgreg.src_addr++; - if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.length_cur--; - if (!mystique->dwgreg.length_cur) { - if (count > 8) - mystique->dwgreg.idump_end_of_line = 1; - else { - count = 32; - mystique->busy = 0; - mystique->blitter_complete_refcount++; - } - break; - } - if (!(mystique->dwgreg.dwgctrl_running & DWGCTRL_LINEAR)) { - if (count > 8) - mystique->dwgreg.idump_end_of_line = 1; - else { - count = 32; - break; - } - } - } else - mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; + if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.length_cur--; + if (!mystique->dwgreg.length_cur) { + if (count > 8) + mystique->dwgreg.idump_end_of_line = 1; + else { + count = 32; + mystique->busy = 0; + mystique->blitter_complete_refcount++; + } + break; + } + if (!(mystique->dwgreg.dwgctrl_running & DWGCTRL_LINEAR)) { + if (count > 8) + mystique->dwgreg.idump_end_of_line = 1; + else { + count = 32; + break; + } + } + } else + mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; - count += 24; - } - if (count > 32) - mystique->dwgreg.iload_rem_count = count - 32; - else - mystique->dwgreg.iload_rem_count = 0; - mystique->dwgreg.iload_rem_data = (uint32_t)(val64 >> 32); - val = val64 & 0xffffffff; - break; + count += 24; + } + if (count > 32) + mystique->dwgreg.iload_rem_count = count - 32; + else + mystique->dwgreg.iload_rem_count = 0; + mystique->dwgreg.iload_rem_data = (uint32_t) (val64 >> 32); + val = val64 & 0xffffffff; + break; - case MACCESS_PWIDTH_32: - val = (((uint32_t *)svga->vram)[mystique->dwgreg.src_addr & mystique->vram_mask_l] << count); + case MACCESS_PWIDTH_32: + val = (((uint32_t *) svga->vram)[mystique->dwgreg.src_addr & mystique->vram_mask_l] << count); - if (mystique->dwgreg.src_addr == mystique->dwgreg.ar[0]) { - mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; - mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; - mystique->dwgreg.src_addr = mystique->dwgreg.ar[3]; - } else - mystique->dwgreg.src_addr++; + if (mystique->dwgreg.src_addr == mystique->dwgreg.ar[0]) { + mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; + mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; + mystique->dwgreg.src_addr = mystique->dwgreg.ar[3]; + } else + mystique->dwgreg.src_addr++; - if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.length_cur--; - if (!mystique->dwgreg.length_cur) { - mystique->busy = 0; - mystique->blitter_complete_refcount++; - break; - } - break; - } else - mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; - break; + if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.length_cur--; + if (!mystique->dwgreg.length_cur) { + mystique->busy = 0; + mystique->blitter_complete_refcount++; + break; + } + break; + } else + mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; + break; - default: - fatal("IDUMP DWGCTRL_BLTMOD_BU32RGB %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->maccess_running); - } - break; + default: + fatal("IDUMP DWGCTRL_BLTMOD_BU32RGB %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->maccess_running); + } + break; - default: - fatal("IDUMP DWGCTRL_ATYPE_RPL %08x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK, mystique->dwgreg.dwgctrl_running); - break; - } - break; + default: + fatal("IDUMP DWGCTRL_ATYPE_RPL %08x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK, mystique->dwgreg.dwgctrl_running); + break; + } + break; - default: - fatal("Unknown IDUMP atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); + default: + fatal("Unknown IDUMP atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); } return val; } - static uint32_t blit_idump_read(mystique_t *mystique) { uint32_t ret = 0xffffffff; switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) { - case DWGCTRL_OPCODE_IDUMP: - ret = blit_idump_idump(mystique); - break; + case DWGCTRL_OPCODE_IDUMP: + ret = blit_idump_idump(mystique); + break; - default: - /* pclog("blit_idump_read: bad opcode %08x\n", mystique->dwgreg.dwgctrl_running); */ - break; + default: + /* pclog("blit_idump_read: bad opcode %08x\n", mystique->dwgreg.dwgctrl_running); */ + break; } return ret; @@ -2888,1978 +3089,1910 @@ blit_idump_read(mystique_t *mystique) static void blit_fbitblt(mystique_t *mystique) { - svga_t *svga = &mystique->svga; - uint32_t src_addr; - int y; - int x_dir = mystique->dwgreg.sgn.scanleft ? -1 : 1; - int16_t x_start = mystique->dwgreg.sgn.scanleft ? mystique->dwgreg.fxright : mystique->dwgreg.fxleft; - int16_t x_end = mystique->dwgreg.sgn.scanleft ? mystique->dwgreg.fxleft : mystique->dwgreg.fxright; + svga_t *svga = &mystique->svga; + uint32_t src_addr; + int y; + int x_dir = mystique->dwgreg.sgn.scanleft ? -1 : 1; + int16_t x_start = mystique->dwgreg.sgn.scanleft ? mystique->dwgreg.fxright : mystique->dwgreg.fxleft; + int16_t x_end = mystique->dwgreg.sgn.scanleft ? mystique->dwgreg.fxleft : mystique->dwgreg.fxright; - src_addr = mystique->dwgreg.ar[3]; + src_addr = mystique->dwgreg.ar[3]; - for (y = 0; y < mystique->dwgreg.length; y++) - { - int16_t x = x_start; - while (1) - { - if (x >= mystique->dwgreg.cxleft && x <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) - { - uint32_t src, old_dst; + for (y = 0; y < mystique->dwgreg.length; y++) { + int16_t x = x_start; + while (1) { + if (x >= mystique->dwgreg.cxleft && x <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { + uint32_t src, old_dst; - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) - { - case MACCESS_PWIDTH_8: - src = svga->vram[src_addr & mystique->vram_mask]; + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_8: + src = svga->vram[src_addr & mystique->vram_mask]; - svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask] = src; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask) >> 12] = changeframecount; - break; + svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask] = src; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_16: - src = ((uint16_t *)svga->vram)[src_addr & mystique->vram_mask_w]; + case MACCESS_PWIDTH_16: + src = ((uint16_t *) svga->vram)[src_addr & mystique->vram_mask_w]; - ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w] = src; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w) >> 11] = changeframecount; - break; + ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w] = src; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w) >> 11] = changeframecount; + break; - case MACCESS_PWIDTH_24: - src = *(uint32_t *)&svga->vram[(src_addr * 3) & mystique->vram_mask]; - old_dst = *(uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask]; + case MACCESS_PWIDTH_24: + src = *(uint32_t *) &svga->vram[(src_addr * 3) & mystique->vram_mask]; + old_dst = *(uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask]; - *(uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask] = (src & 0xffffff) | (old_dst & 0xff000000); - svga->changedvram[(((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask) >> 12] = changeframecount; - break; + *(uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask] = (src & 0xffffff) | (old_dst & 0xff000000); + svga->changedvram[(((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_32: - src = ((uint32_t *)svga->vram)[src_addr & mystique->vram_mask_l]; + case MACCESS_PWIDTH_32: + src = ((uint32_t *) svga->vram)[src_addr & mystique->vram_mask_l]; - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l] = src; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l) >> 10] = changeframecount; - break; + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l] = src; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l) >> 10] = changeframecount; + break; - default: - fatal("BITBLT RPL BFCOL PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); - } - } - - if (src_addr == mystique->dwgreg.ar[0]) - { - mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; - mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; - src_addr = mystique->dwgreg.ar[3]; - break; - } - else - src_addr += x_dir; - - if (x != x_end) - x += x_dir; - else - break; + default: + fatal("BITBLT RPL BFCOL PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); } + } - if (mystique->dwgreg.sgn.sdy) - mystique->dwgreg.ydst_lin -= (mystique->dwgreg.pitch & PITCH_MASK); - else - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + if (src_addr == mystique->dwgreg.ar[0]) { + mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; + mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; + src_addr = mystique->dwgreg.ar[3]; + break; + } else + src_addr += x_dir; + + if (x != x_end) + x += x_dir; + else + break; } - mystique->blitter_complete_refcount++; + if (mystique->dwgreg.sgn.sdy) + mystique->dwgreg.ydst_lin -= (mystique->dwgreg.pitch & PITCH_MASK); + else + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + } + + mystique->blitter_complete_refcount++; } static void blit_iload_iload(mystique_t *mystique, uint32_t data, int size) { - svga_t *svga = &mystique->svga; - uint32_t src, dst; - uint32_t dst2; - uint64_t data64; - int min_size = 8; - uint32_t bltckey = mystique->dwgreg.fcol, bltcmsk = mystique->dwgreg.bcol; - const int transc = mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANSC; - const int trans_sel = (mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANS_MASK) >> DWGCTRL_TRANS_SHIFT; - uint8_t const * const trans = &trans_masks[trans_sel][(mystique->dwgreg.selline & 3) * 4]; - uint32_t data_mask = 1; + svga_t *svga = &mystique->svga; + uint32_t src, dst; + uint32_t dst2; + uint64_t data64; + int min_size = 8; + uint32_t bltckey = mystique->dwgreg.fcol, bltcmsk = mystique->dwgreg.bcol; + const int transc = mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANSC; + const int trans_sel = (mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANS_MASK) >> DWGCTRL_TRANS_SHIFT; + uint8_t const *const trans = &trans_masks[trans_sel][(mystique->dwgreg.selline & 3) * 4]; + uint32_t data_mask = 1; switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_8: - bltckey &= 0xff; - bltcmsk &= 0xff; - break; - case MACCESS_PWIDTH_16: - bltckey &= 0xffff; - bltcmsk &= 0xffff; - break; + case MACCESS_PWIDTH_8: + bltckey &= 0xff; + bltcmsk &= 0xff; + break; + case MACCESS_PWIDTH_16: + bltckey &= 0xffff; + bltcmsk &= 0xffff; + break; } mystique->dwgreg.words++; switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) { - case DWGCTRL_ATYPE_RPL: - if (mystique->maccess_running & MACCESS_TLUTLOAD) { - while ((mystique->dwgreg.length_cur > 0) && (size >= 16)) { - uint16_t src = data & 0xffff; + case DWGCTRL_ATYPE_RPL: + if (mystique->maccess_running & MACCESS_TLUTLOAD) { + while ((mystique->dwgreg.length_cur > 0) && (size >= 16)) { + uint16_t src = data & 0xffff; - mystique->lut[mystique->dwgreg.ydst & 0xff].r = (src >> 11) << 3; - mystique->lut[mystique->dwgreg.ydst & 0xff].g = ((src >> 5) & 0x3f) << 2; - mystique->lut[mystique->dwgreg.ydst & 0xff].b = (src & 0x1f) << 3; - mystique->dwgreg.ydst++; - mystique->dwgreg.length_cur--; - data >>= 16; - size -= 16; - } + mystique->lut[mystique->dwgreg.ydst & 0xff].r = (src >> 11) << 3; + mystique->lut[mystique->dwgreg.ydst & 0xff].g = ((src >> 5) & 0x3f) << 2; + mystique->lut[mystique->dwgreg.ydst & 0xff].b = (src & 0x1f) << 3; + mystique->dwgreg.ydst++; + mystique->dwgreg.length_cur--; + data >>= 16; + size -= 16; + } - if (!mystique->dwgreg.length_cur) { - mystique->busy = 0; - mystique->blitter_complete_refcount++; - } - break; - } - case DWGCTRL_ATYPE_RSTR: - case DWGCTRL_ATYPE_BLK: - switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { - case DWGCTRL_BLTMOD_BFCOL: - size += mystique->dwgreg.iload_rem_count; - data64 = mystique->dwgreg.iload_rem_data | ((uint64_t)data << mystique->dwgreg.iload_rem_count); + if (!mystique->dwgreg.length_cur) { + mystique->busy = 0; + mystique->blitter_complete_refcount++; + } + break; + } + case DWGCTRL_ATYPE_RSTR: + case DWGCTRL_ATYPE_BLK: + switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { + case DWGCTRL_BLTMOD_BFCOL: + size += mystique->dwgreg.iload_rem_count; + data64 = mystique->dwgreg.iload_rem_data | ((uint64_t) data << mystique->dwgreg.iload_rem_count); - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_8: - min_size = 8; - break; - case MACCESS_PWIDTH_16: - min_size = 16; - break; - case MACCESS_PWIDTH_24: - min_size = 24; - break; - case MACCESS_PWIDTH_32: - min_size = 32; - break; - } + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_8: + min_size = 8; + break; + case MACCESS_PWIDTH_16: + min_size = 16; + break; + case MACCESS_PWIDTH_24: + min_size = 24; + break; + case MACCESS_PWIDTH_32: + min_size = 32; + break; + } - while (size >= min_size) { - int draw = (!transc || (data & bltcmsk) != bltckey) && trans[mystique->dwgreg.xdst & 3]; + while (size >= min_size) { + int draw = (!transc || (data & bltcmsk) != bltckey) && trans[mystique->dwgreg.xdst & 3]; - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_8: - if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && draw) { - dst = svga->vram[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask]; + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_8: + if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && draw) { + dst = svga->vram[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask]; - dst = bitop(data & 0xff, dst, mystique->dwgreg.dwgctrl_running); - svga->vram[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask) >> 12] = changeframecount; - } + dst = bitop(data & 0xff, dst, mystique->dwgreg.dwgctrl_running); + svga->vram[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask) >> 12] = changeframecount; + } - data >>= 8; - size -= 8; - break; + data >>= 8; + size -= 8; + break; - case MACCESS_PWIDTH_16: - if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && draw) { - dst = ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w]; + case MACCESS_PWIDTH_16: + if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && draw) { + dst = ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w]; - dst = bitop(data & 0xffff, dst, mystique->dwgreg.dwgctrl_running); - ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w) >> 11] = changeframecount; - } + dst = bitop(data & 0xffff, dst, mystique->dwgreg.dwgctrl_running); + ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w) >> 11] = changeframecount; + } - data >>= 16; - size -= 16; - break; + data >>= 16; + size -= 16; + break; - case MACCESS_PWIDTH_24: - if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { - uint32_t old_dst = *((uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) * 3) & mystique->vram_mask]); + case MACCESS_PWIDTH_24: + if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { + uint32_t old_dst = *((uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) * 3) & mystique->vram_mask]); - dst = bitop(data64, old_dst, mystique->dwgreg.dwgctrl_running); - *((uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) * 3) & mystique->vram_mask]) = (dst & 0xffffff) | (old_dst & 0xff000000); - svga->changedvram[(((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) * 3) & mystique->vram_mask) >> 12] = changeframecount; - } + dst = bitop(data64, old_dst, mystique->dwgreg.dwgctrl_running); + *((uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) * 3) & mystique->vram_mask]) = (dst & 0xffffff) | (old_dst & 0xff000000); + svga->changedvram[(((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) * 3) & mystique->vram_mask) >> 12] = changeframecount; + } - data64 >>= 24; - size -= 24; - break; + data64 >>= 24; + size -= 24; + break; - case MACCESS_PWIDTH_32: - if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && draw) { - dst = ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l]; + case MACCESS_PWIDTH_32: + if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && draw) { + dst = ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l]; - dst = bitop(data, dst, mystique->dwgreg.dwgctrl_running); - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l) >> 10] = changeframecount; - } + dst = bitop(data, dst, mystique->dwgreg.dwgctrl_running); + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l) >> 10] = changeframecount; + } - size = 0; - break; + size = 0; + break; - default: - fatal("ILOAD RSTR/RPL BFCOL pwidth %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); - } + default: + fatal("ILOAD RSTR/RPL BFCOL pwidth %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); + } - if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); - mystique->dwgreg.selline = (mystique->dwgreg.selline + 1) & 7; - mystique->dwgreg.length_cur--; - if (!mystique->dwgreg.length_cur) { - mystique->busy = 0; - mystique->blitter_complete_refcount++; - break; - } - data64 = 0; - size = 0; - break; - } else - mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; - } - mystique->dwgreg.iload_rem_count = size; - mystique->dwgreg.iload_rem_data = data64; - break; + if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + mystique->dwgreg.selline = (mystique->dwgreg.selline + 1) & 7; + mystique->dwgreg.length_cur--; + if (!mystique->dwgreg.length_cur) { + mystique->busy = 0; + mystique->blitter_complete_refcount++; + break; + } + data64 = 0; + size = 0; + break; + } else + mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; + } + mystique->dwgreg.iload_rem_count = size; + mystique->dwgreg.iload_rem_data = data64; + break; - case DWGCTRL_BLTMOD_BMONOWF: - data = (data >> 24) | ((data & 0x00ff0000) >> 8) | ((data & 0x0000ff00) << 8) | (data << 24); - data_mask = (1 << 31); - case DWGCTRL_BLTMOD_BMONOLEF: - while (size) { - if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && - ((data & data_mask) || !(mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANSC)) && - trans[mystique->dwgreg.xdst & 3]) { - uint32_t old_dst; + case DWGCTRL_BLTMOD_BMONOWF: + data = (data >> 24) | ((data & 0x00ff0000) >> 8) | ((data & 0x0000ff00) << 8) | (data << 24); + data_mask = (1 << 31); + case DWGCTRL_BLTMOD_BMONOLEF: + while (size) { + if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && ((data & data_mask) || !(mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANSC)) && trans[mystique->dwgreg.xdst & 3]) { + uint32_t old_dst; - src = (data & data_mask) ? mystique->dwgreg.fcol : mystique->dwgreg.bcol; - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_8: - dst = svga->vram[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask]; + src = (data & data_mask) ? mystique->dwgreg.fcol : mystique->dwgreg.bcol; + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_8: + dst = svga->vram[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask]; - dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); + dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); - svga->vram[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask) >> 12] = changeframecount; - break; + svga->vram[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_16: - dst = ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w]; + case MACCESS_PWIDTH_16: + dst = ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w]; - dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); + dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); - ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w) >> 11] = changeframecount; - break; + ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w) >> 11] = changeframecount; + break; - case MACCESS_PWIDTH_24: - old_dst = *(uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) * 3) & mystique->vram_mask]; + case MACCESS_PWIDTH_24: + old_dst = *(uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) * 3) & mystique->vram_mask]; - dst = bitop(src, old_dst, mystique->dwgreg.dwgctrl_running); + dst = bitop(src, old_dst, mystique->dwgreg.dwgctrl_running); - *(uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) * 3) & mystique->vram_mask] = (dst & 0xffffff) | (old_dst & 0xff000000); - svga->changedvram[(((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) * 3) & mystique->vram_mask) >> 12] = changeframecount; - break; + *(uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) * 3) & mystique->vram_mask] = (dst & 0xffffff) | (old_dst & 0xff000000); + svga->changedvram[(((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) * 3) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_32: - dst = ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l]; + case MACCESS_PWIDTH_32: + dst = ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l]; - dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); + dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l) >> 10] = changeframecount; - break; + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l) >> 10] = changeframecount; + break; - default: - fatal("ILOAD RSTR/RPL BMONOWF pwidth %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); - } - } + default: + fatal("ILOAD RSTR/RPL BMONOWF pwidth %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); + } + } - if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); - mystique->dwgreg.length_cur--; - if (!mystique->dwgreg.length_cur) { - mystique->busy = 0; - mystique->blitter_complete_refcount++; - break; - } - if (!(mystique->dwgreg.dwgctrl_running & DWGCTRL_LINEAR)) - break; - } else - mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; - if (data_mask == 1) - data >>= 1; - else - data <<= 1; - size--; - } - break; + if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + mystique->dwgreg.length_cur--; + if (!mystique->dwgreg.length_cur) { + mystique->busy = 0; + mystique->blitter_complete_refcount++; + break; + } + if (!(mystique->dwgreg.dwgctrl_running & DWGCTRL_LINEAR)) + break; + } else + mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; + if (data_mask == 1) + data >>= 1; + else + data <<= 1; + size--; + } + break; - case DWGCTRL_BLTMOD_BU24RGB: - size += mystique->dwgreg.iload_rem_count; - data64 = mystique->dwgreg.iload_rem_data | ((uint64_t)data << mystique->dwgreg.iload_rem_count); + case DWGCTRL_BLTMOD_BU24RGB: + size += mystique->dwgreg.iload_rem_count; + data64 = mystique->dwgreg.iload_rem_data | ((uint64_t) data << mystique->dwgreg.iload_rem_count); - while (size >= 24) { - if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_32: - dst = ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l]; + while (size >= 24) { + if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_32: + dst = ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l]; - dst = bitop(data64 & 0xffffff, dst, mystique->dwgreg.dwgctrl_running); + dst = bitop(data64 & 0xffffff, dst, mystique->dwgreg.dwgctrl_running); - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l) >> 10] = changeframecount; - break; + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l) >> 10] = changeframecount; + break; - default: - fatal("ILOAD RSTR/RPL BU24RGB pwidth %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); - } - } + default: + fatal("ILOAD RSTR/RPL BU24RGB pwidth %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); + } + } - data64 >>= 24; - size -= 24; - if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); - mystique->dwgreg.length_cur--; - if (!mystique->dwgreg.length_cur) { - mystique->busy = 0; - mystique->blitter_complete_refcount++; - break; - } - data64 = 0; - size = 0; - break; - } else - mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; - } + data64 >>= 24; + size -= 24; + if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + mystique->dwgreg.length_cur--; + if (!mystique->dwgreg.length_cur) { + mystique->busy = 0; + mystique->blitter_complete_refcount++; + break; + } + data64 = 0; + size = 0; + break; + } else + mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; + } - mystique->dwgreg.iload_rem_count = size; - mystique->dwgreg.iload_rem_data = data64; - break; + mystique->dwgreg.iload_rem_count = size; + mystique->dwgreg.iload_rem_data = data64; + break; - case DWGCTRL_BLTMOD_BU32RGB: - size += mystique->dwgreg.iload_rem_count; - data64 = mystique->dwgreg.iload_rem_data | ((uint64_t)data << mystique->dwgreg.iload_rem_count); - while (size >= 32) - { - int draw = (!transc || (data & bltcmsk) != bltckey) && trans[mystique->dwgreg.xdst & 3]; + case DWGCTRL_BLTMOD_BU32RGB: + size += mystique->dwgreg.iload_rem_count; + data64 = mystique->dwgreg.iload_rem_data | ((uint64_t) data << mystique->dwgreg.iload_rem_count); + while (size >= 32) { + int draw = (!transc || (data & bltcmsk) != bltckey) && trans[mystique->dwgreg.xdst & 3]; - if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && draw) - { - dst = ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l]; + if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && draw) { + dst = ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l]; - dst = bitop(data, dst, mystique->dwgreg.dwgctrl_running); - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l) >> 10] = changeframecount; - } + dst = bitop(data, dst, mystique->dwgreg.dwgctrl_running); + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l) >> 10] = changeframecount; + } - size = 0; + size = 0; - if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) - { - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); - mystique->dwgreg.selline = (mystique->dwgreg.selline + 1) & 7; - mystique->dwgreg.length_cur--; - if (!mystique->dwgreg.length_cur) - { - mystique->busy = 0; - mystique->blitter_complete_refcount++; - break; - } - data64 = 0; - size = 0; - break; - } - else - mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; - } - mystique->dwgreg.iload_rem_count = size; - mystique->dwgreg.iload_rem_data = data64; - break; + if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + mystique->dwgreg.selline = (mystique->dwgreg.selline + 1) & 7; + mystique->dwgreg.length_cur--; + if (!mystique->dwgreg.length_cur) { + mystique->busy = 0; + mystique->blitter_complete_refcount++; + break; + } + data64 = 0; + size = 0; + break; + } else + mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; + } + mystique->dwgreg.iload_rem_count = size; + mystique->dwgreg.iload_rem_data = data64; + break; - case DWGCTRL_BLTMOD_BU32BGR: - size += mystique->dwgreg.iload_rem_count; - while (size >= 32) { - if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_32: - dst = ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l]; - dst2 = ((dst >> 16) & 0xff) | (dst & 0xff00) | ((dst & 0xff) << 16); /* BGR to RGB */ + case DWGCTRL_BLTMOD_BU32BGR: + size += mystique->dwgreg.iload_rem_count; + while (size >= 32) { + if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_32: + dst = ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l]; + dst2 = ((dst >> 16) & 0xff) | (dst & 0xff00) | ((dst & 0xff) << 16); /* BGR to RGB */ - dst = bitop(data, dst2, mystique->dwgreg.dwgctrl_running); + dst = bitop(data, dst2, mystique->dwgreg.dwgctrl_running); - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l) >> 10] = changeframecount; - break; + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l) >> 10] = changeframecount; + break; - default: - fatal("ILOAD RSTR/RPL BU32RGB pwidth %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); - } - } + default: + fatal("ILOAD RSTR/RPL BU32RGB pwidth %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); + } + } - size = 0; - if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); - mystique->dwgreg.length_cur--; - if (!mystique->dwgreg.length_cur) { - mystique->busy = 0; - mystique->blitter_complete_refcount++; - break; - } - break; - } else - mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; - } + size = 0; + if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + mystique->dwgreg.length_cur--; + if (!mystique->dwgreg.length_cur) { + mystique->busy = 0; + mystique->blitter_complete_refcount++; + break; + } + break; + } else + mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; + } - mystique->dwgreg.iload_rem_count = size; - break; + mystique->dwgreg.iload_rem_count = size; + break; - default: - fatal("ILOAD DWGCTRL_ATYPE_RPL\n"); - break; - } - break; + default: + fatal("ILOAD DWGCTRL_ATYPE_RPL\n"); + break; + } + break; - default: - fatal("Unknown ILOAD iload atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); + default: + fatal("Unknown ILOAD iload atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); } } - -#define CLAMP(x) do { \ - if ((x) & ~0xff) \ - x = ((x) < 0) ? 0 : 0xff; \ - } while (0) - +#define CLAMP(x) \ + do { \ + if ((x) & ~0xff) \ + x = ((x) < 0) ? 0 : 0xff; \ + } while (0) static void blit_iload_iload_scale(mystique_t *mystique, uint32_t data, int size) { - svga_t *svga = &mystique->svga; + svga_t *svga = &mystique->svga; uint64_t data64 = 0; - int y0, y1; - int u, v; - int dR, dG, dB; - int r0, g0, b0; - int r1, g1, b1; + int y0, y1; + int u, v; + int dR, dG, dB; + int r0, g0, b0; + int r1, g1, b1; switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { - case DWGCTRL_BLTMOD_BUYUV: - y0 = (298 * ((int)(data & 0xff) - 16)) >> 8; - u = ((data >> 8) & 0xff) - 0x80; - y1 = (298 * ((int)((data >> 16) & 0xff) - 16)) >> 8; - v = ((data >> 24) & 0xff) - 0x80; + case DWGCTRL_BLTMOD_BUYUV: + y0 = (298 * ((int) (data & 0xff) - 16)) >> 8; + u = ((data >> 8) & 0xff) - 0x80; + y1 = (298 * ((int) ((data >> 16) & 0xff) - 16)) >> 8; + v = ((data >> 24) & 0xff) - 0x80; - dR = (309*v) >> 8; - dG = (100*u + 208*v) >> 8; - dB = (516*u) >> 8; + dR = (309 * v) >> 8; + dG = (100 * u + 208 * v) >> 8; + dB = (516 * u) >> 8; - r0 = y0 + dR; - CLAMP(r0); - g0 = y0 - dG; - CLAMP(g0); - b0 = y0 + dB; - CLAMP(b0); - r1 = y1 + dR; - CLAMP(r1); - g1 = y1 - dG; - CLAMP(g1); - b1 = y1 + dB; - CLAMP(b1); + r0 = y0 + dR; + CLAMP(r0); + g0 = y0 - dG; + CLAMP(g0); + b0 = y0 + dB; + CLAMP(b0); + r1 = y1 + dR; + CLAMP(r1); + g1 = y1 - dG; + CLAMP(g1); + b1 = y1 + dB; + CLAMP(b1); - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_16: - data = (b0 >> 3) | ((g0 >> 2) << 5) | ((r0 >> 3) << 11); - data |= (((b1 >> 3) | ((g1 >> 2) << 5) | ((r1 >> 3) << 11)) << 16); - size = 32; - break; - case MACCESS_PWIDTH_32: - data64 = b0 | (g0 << 8) | (r0 << 16); - data64 |= ((uint64_t)b0 << 32) | ((uint64_t)g0 << 40) | ((uint64_t)r0 << 48); - size = 64; - break; + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_16: + data = (b0 >> 3) | ((g0 >> 2) << 5) | ((r0 >> 3) << 11); + data |= (((b1 >> 3) | ((g1 >> 2) << 5) | ((r1 >> 3) << 11)) << 16); + size = 32; + break; + case MACCESS_PWIDTH_32: + data64 = b0 | (g0 << 8) | (r0 << 16); + data64 |= ((uint64_t) b0 << 32) | ((uint64_t) g0 << 40) | ((uint64_t) r0 << 48); + size = 64; + break; - default: - fatal("blit_iload_iload_scale BUYUV pwidth %i\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); - } - break; + default: + fatal("blit_iload_iload_scale BUYUV pwidth %i\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); + } + break; - default: - fatal("blit_iload_iload_scale bltmod %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK); - break; + default: + fatal("blit_iload_iload_scale bltmod %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK); + break; } switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_16: - while (size >= 16) { - if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { - uint16_t dst = ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w]; - dst = bitop(data & 0xffff, dst, mystique->dwgreg.dwgctrl_running); - ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w) >> 11] = changeframecount; - } + case MACCESS_PWIDTH_16: + while (size >= 16) { + if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { + uint16_t dst = ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w]; + dst = bitop(data & 0xffff, dst, mystique->dwgreg.dwgctrl_running); + ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w) >> 11] = changeframecount; + } - mystique->dwgreg.ar[6] += mystique->dwgreg.ar[2]; - if ((int32_t)mystique->dwgreg.ar[6] >= 0) { - mystique->dwgreg.ar[6] -= (mystique->dwgreg.fxright - mystique->dwgreg.fxleft); - data >>= 16; - size -= 16; - } + mystique->dwgreg.ar[6] += mystique->dwgreg.ar[2]; + if ((int32_t) mystique->dwgreg.ar[6] >= 0) { + mystique->dwgreg.ar[6] -= (mystique->dwgreg.fxright - mystique->dwgreg.fxleft); + data >>= 16; + size -= 16; + } - mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; - if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) - { - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); - mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; - mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; - mystique->dwgreg.ar[6] = mystique->dwgreg.ar[2] - (mystique->dwgreg.fxright - mystique->dwgreg.fxleft); - mystique->dwgreg.length_cur--; - if (!mystique->dwgreg.length_cur) { - mystique->busy = 0; - mystique->blitter_complete_refcount++; - break; - } - break; - } - } - break; + mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; + if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; + mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; + mystique->dwgreg.ar[6] = mystique->dwgreg.ar[2] - (mystique->dwgreg.fxright - mystique->dwgreg.fxleft); + mystique->dwgreg.length_cur--; + if (!mystique->dwgreg.length_cur) { + mystique->busy = 0; + mystique->blitter_complete_refcount++; + break; + } + break; + } + } + break; - case MACCESS_PWIDTH_32: - while (size >= 32) { - if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { - uint32_t dst = ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l]; - dst = bitop(data64, dst, mystique->dwgreg.dwgctrl_running); - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l) >> 10] = changeframecount; - } + case MACCESS_PWIDTH_32: + while (size >= 32) { + if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { + uint32_t dst = ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l]; + dst = bitop(data64, dst, mystique->dwgreg.dwgctrl_running); + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l) >> 10] = changeframecount; + } - mystique->dwgreg.ar[6] += mystique->dwgreg.ar[2]; - if ((int32_t)mystique->dwgreg.ar[6] >= 0) { - mystique->dwgreg.ar[6] -= (mystique->dwgreg.fxright - mystique->dwgreg.fxleft); - data64 >>= 32; - size -= 32; - } + mystique->dwgreg.ar[6] += mystique->dwgreg.ar[2]; + if ((int32_t) mystique->dwgreg.ar[6] >= 0) { + mystique->dwgreg.ar[6] -= (mystique->dwgreg.fxright - mystique->dwgreg.fxleft); + data64 >>= 32; + size -= 32; + } - mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; - if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) - { - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); - mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; - mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; - mystique->dwgreg.ar[6] = mystique->dwgreg.ar[2] - (mystique->dwgreg.fxright - mystique->dwgreg.fxleft); - mystique->dwgreg.length_cur--; - if (!mystique->dwgreg.length_cur) { - mystique->busy = 0; - mystique->blitter_complete_refcount++; - break; - } - break; - } - } - break; + mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; + if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; + mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; + mystique->dwgreg.ar[6] = mystique->dwgreg.ar[2] - (mystique->dwgreg.fxright - mystique->dwgreg.fxleft); + mystique->dwgreg.length_cur--; + if (!mystique->dwgreg.length_cur) { + mystique->busy = 0; + mystique->blitter_complete_refcount++; + break; + } + break; + } + } + break; - default: - fatal("ILOAD_SCALE pwidth %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); + default: + fatal("ILOAD_SCALE pwidth %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); } } - static void blit_iload_iload_high(mystique_t *mystique, uint32_t data, int size) { - svga_t *svga = &mystique->svga; + svga_t *svga = &mystique->svga; uint32_t out_data; - int y0, y1, u, v; - int dR, dG, dB; - int r = 0, g = 0, b = 0; - int next_r = 0, next_g = 0, next_b = 0; + int y0, y1, u, v; + int dR, dG, dB; + int r = 0, g = 0, b = 0; + int next_r = 0, next_g = 0, next_b = 0; switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { - case DWGCTRL_BLTMOD_BUYUV: - y0 = (298 * ((int)(data & 0xff) - 16)) >> 8; - u = ((data >> 8) & 0xff) - 0x80; - y1 = (298 * ((int)((data >> 16) & 0xff) - 16)) >> 8; - v = ((data >> 24) & 0xff) - 0x80; + case DWGCTRL_BLTMOD_BUYUV: + y0 = (298 * ((int) (data & 0xff) - 16)) >> 8; + u = ((data >> 8) & 0xff) - 0x80; + y1 = (298 * ((int) ((data >> 16) & 0xff) - 16)) >> 8; + v = ((data >> 24) & 0xff) - 0x80; - dR = (309*v) >> 8; - dG = (100*u + 208*v) >> 8; - dB = (516*u) >> 8; + dR = (309 * v) >> 8; + dG = (100 * u + 208 * v) >> 8; + dB = (516 * u) >> 8; - r = y0 + dR; - CLAMP(r); - g = y0 - dG; - CLAMP(g); - b = y0 + dB; - CLAMP(b); + r = y0 + dR; + CLAMP(r); + g = y0 - dG; + CLAMP(g); + b = y0 + dB; + CLAMP(b); - next_r = y1 + dR; - CLAMP(next_r); - next_g = y1 - dG; - CLAMP(next_g); - next_b = y1 + dB; - CLAMP(next_b); + next_r = y1 + dR; + CLAMP(next_r); + next_g = y1 - dG; + CLAMP(next_g); + next_b = y1 + dB; + CLAMP(next_b); - size = 32; - break; + size = 32; + break; - case DWGCTRL_BLTMOD_BU32BGR: - r = ((data >> 16) & 0xff); - CLAMP(r); - g = ((data >> 8) & 0xff); - CLAMP(g); - b = (data & 0xff); - CLAMP(b); + case DWGCTRL_BLTMOD_BU32BGR: + r = ((data >> 16) & 0xff); + CLAMP(r); + g = ((data >> 8) & 0xff); + CLAMP(g); + b = (data & 0xff); + CLAMP(b); - next_r = r; - next_g = g; - next_b = b; + next_r = r; + next_g = g; + next_b = b; - size = 32; - break; + size = 32; + break; - default: - fatal("blit_iload_iload_high bltmod %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK); - break; + default: + fatal("blit_iload_iload_high bltmod %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK); + break; } while (size >= 16) { - if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { - uint32_t dst; - int f1 = (mystique->dwgreg.ar[6] >> 12) & 0xf; - int f0 = 0x10 - f1; - int out_r = ((mystique->dwgreg.lastpix_r * f0) + (r * f1)) >> 4; - int out_g = ((mystique->dwgreg.lastpix_g * f0) + (g * f1)) >> 4; - int out_b = ((mystique->dwgreg.lastpix_b * f0) + (b * f1)) >> 4; + if (mystique->dwgreg.xdst >= mystique->dwgreg.cxleft && mystique->dwgreg.xdst <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { + uint32_t dst; + int f1 = (mystique->dwgreg.ar[6] >> 12) & 0xf; + int f0 = 0x10 - f1; + int out_r = ((mystique->dwgreg.lastpix_r * f0) + (r * f1)) >> 4; + int out_g = ((mystique->dwgreg.lastpix_g * f0) + (g * f1)) >> 4; + int out_b = ((mystique->dwgreg.lastpix_b * f0) + (b * f1)) >> 4; - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_16: - out_data = (out_b >> 3) | ((out_g >> 2) << 5) | ((out_r >> 3) << 11); - dst = ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w]; - dst = bitop(out_data, dst, mystique->dwgreg.dwgctrl_running); - ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w) >> 11] = changeframecount; - break; - case MACCESS_PWIDTH_32: - out_data = out_b | (out_g << 8) | (out_r << 16); - dst = ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l]; - dst = bitop(out_data, dst, mystique->dwgreg.dwgctrl_running); - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l) >> 10] = changeframecount; - break; + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_16: + out_data = (out_b >> 3) | ((out_g >> 2) << 5) | ((out_r >> 3) << 11); + dst = ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w]; + dst = bitop(out_data, dst, mystique->dwgreg.dwgctrl_running); + ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_w) >> 11] = changeframecount; + break; + case MACCESS_PWIDTH_32: + out_data = out_b | (out_g << 8) | (out_r << 16); + dst = ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l]; + dst = bitop(out_data, dst, mystique->dwgreg.dwgctrl_running); + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + mystique->dwgreg.xdst) & mystique->vram_mask_l) >> 10] = changeframecount; + break; - default: - fatal("ILOAD_SCALE_HIGH RSTR/RPL BUYUV pwidth %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); - } - } + default: + fatal("ILOAD_SCALE_HIGH RSTR/RPL BUYUV pwidth %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); + } + } - mystique->dwgreg.ar[6] += mystique->dwgreg.ar[2]; - if ((int32_t)mystique->dwgreg.ar[6] >= 0) { - mystique->dwgreg.ar[6] -= 65536; - size -= 16; + mystique->dwgreg.ar[6] += mystique->dwgreg.ar[2]; + if ((int32_t) mystique->dwgreg.ar[6] >= 0) { + mystique->dwgreg.ar[6] -= 65536; + size -= 16; - mystique->dwgreg.lastpix_r = r; - mystique->dwgreg.lastpix_g = g; - mystique->dwgreg.lastpix_b = b; - r = next_r; - g = next_g; - b = next_b; - } + mystique->dwgreg.lastpix_r = r; + mystique->dwgreg.lastpix_g = g; + mystique->dwgreg.lastpix_b = b; + r = next_r; + g = next_g; + b = next_b; + } - if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); - mystique->dwgreg.ar[6] = mystique->dwgreg.ar[2] - (mystique->dwgreg.fxright - mystique->dwgreg.fxleft); - mystique->dwgreg.lastpix_r = 0; - mystique->dwgreg.lastpix_g = 0; - mystique->dwgreg.lastpix_b = 0; + if (mystique->dwgreg.xdst == mystique->dwgreg.fxright) { + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + mystique->dwgreg.ar[6] = mystique->dwgreg.ar[2] - (mystique->dwgreg.fxright - mystique->dwgreg.fxleft); + mystique->dwgreg.lastpix_r = 0; + mystique->dwgreg.lastpix_g = 0; + mystique->dwgreg.lastpix_b = 0; - mystique->dwgreg.length_cur--; - if (!mystique->dwgreg.length_cur) { - mystique->busy = 0; - mystique->blitter_complete_refcount++; - break; - } - break; - } else - mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; + mystique->dwgreg.length_cur--; + if (!mystique->dwgreg.length_cur) { + mystique->busy = 0; + mystique->blitter_complete_refcount++; + break; + } + break; + } else + mystique->dwgreg.xdst = (mystique->dwgreg.xdst + 1) & 0xffff; } } - static void blit_iload_iload_highv(mystique_t *mystique, uint32_t data, int size) { uint8_t *src0, *src1; switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { - case DWGCTRL_BLTMOD_BUYUV: - if (!mystique->dwgreg.highv_line) { - mystique->dwgreg.highv_data = data; - mystique->dwgreg.highv_line = 1; - return; - } - mystique->dwgreg.highv_line = 0; + case DWGCTRL_BLTMOD_BUYUV: + if (!mystique->dwgreg.highv_line) { + mystique->dwgreg.highv_data = data; + mystique->dwgreg.highv_line = 1; + return; + } + mystique->dwgreg.highv_line = 0; - src0 = (uint8_t *)&mystique->dwgreg.highv_data; - src1 = (uint8_t *)&data; + src0 = (uint8_t *) &mystique->dwgreg.highv_data; + src1 = (uint8_t *) &data; - src1[0] = ((src0[0] * mystique->dwgreg.beta) + (src1[0] * (16 - mystique->dwgreg.beta))) >> 4; - src1[1] = ((src0[1] * mystique->dwgreg.beta) + (src1[1] * (16 - mystique->dwgreg.beta))) >> 4; - src1[2] = ((src0[2] * mystique->dwgreg.beta) + (src1[2] * (16 - mystique->dwgreg.beta))) >> 4; - src1[3] = ((src0[3] * mystique->dwgreg.beta) + (src1[3] * (16 - mystique->dwgreg.beta))) >> 4; - blit_iload_iload_high(mystique, data, 32); - break; + src1[0] = ((src0[0] * mystique->dwgreg.beta) + (src1[0] * (16 - mystique->dwgreg.beta))) >> 4; + src1[1] = ((src0[1] * mystique->dwgreg.beta) + (src1[1] * (16 - mystique->dwgreg.beta))) >> 4; + src1[2] = ((src0[2] * mystique->dwgreg.beta) + (src1[2] * (16 - mystique->dwgreg.beta))) >> 4; + src1[3] = ((src0[3] * mystique->dwgreg.beta) + (src1[3] * (16 - mystique->dwgreg.beta))) >> 4; + blit_iload_iload_high(mystique, data, 32); + break; - default: - fatal("blit_iload_iload_highv bltmod %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK); - break; + default: + fatal("blit_iload_iload_highv bltmod %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK); + break; } } - static void blit_iload_write(mystique_t *mystique, uint32_t data, int size) { switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) { - case DWGCTRL_OPCODE_ILOAD: - blit_iload_iload(mystique, data, size); - break; + case DWGCTRL_OPCODE_ILOAD: + blit_iload_iload(mystique, data, size); + break; - case DWGCTRL_OPCODE_ILOAD_SCALE: - blit_iload_iload_scale(mystique, data, size); - break; + case DWGCTRL_OPCODE_ILOAD_SCALE: + blit_iload_iload_scale(mystique, data, size); + break; - case DWGCTRL_OPCODE_ILOAD_HIGH: - blit_iload_iload_high(mystique, data, size); - break; + case DWGCTRL_OPCODE_ILOAD_HIGH: + blit_iload_iload_high(mystique, data, size); + break; - case DWGCTRL_OPCODE_ILOAD_HIGHV: - blit_iload_iload_highv(mystique, data, size); - break; + case DWGCTRL_OPCODE_ILOAD_HIGHV: + blit_iload_iload_highv(mystique, data, size); + break; - default: - fatal("blit_iload_write: bad opcode %08x\n", mystique->dwgreg.dwgctrl_running); + default: + fatal("blit_iload_write: bad opcode %08x\n", mystique->dwgreg.dwgctrl_running); } } - static int -z_check(uint16_t z, uint16_t old_z, uint32_t z_mode)//mystique->dwgreg.dwgctrl & DWGCTRL_ZMODE_MASK) +z_check(uint16_t z, uint16_t old_z, uint32_t z_mode) // mystique->dwgreg.dwgctrl & DWGCTRL_ZMODE_MASK) { switch (z_mode) { - case DWGCTRL_ZMODE_ZE: - return (z == old_z); - case DWGCTRL_ZMODE_ZNE: - return (z != old_z); - case DWGCTRL_ZMODE_ZLT: - return (z < old_z); - case DWGCTRL_ZMODE_ZLTE: - return (z <= old_z); - case DWGCTRL_ZMODE_ZGT: - return (z > old_z); - case DWGCTRL_ZMODE_ZGTE: - return (z >= old_z); + case DWGCTRL_ZMODE_ZE: + return (z == old_z); + case DWGCTRL_ZMODE_ZNE: + return (z != old_z); + case DWGCTRL_ZMODE_ZLT: + return (z < old_z); + case DWGCTRL_ZMODE_ZLTE: + return (z <= old_z); + case DWGCTRL_ZMODE_ZGT: + return (z > old_z); + case DWGCTRL_ZMODE_ZGTE: + return (z >= old_z); - case DWGCTRL_ZMODE_NOZCMP: - default: - return 1; + case DWGCTRL_ZMODE_NOZCMP: + default: + return 1; } } - static void blit_line(mystique_t *mystique, int closed) { - svga_t *svga = &mystique->svga; + svga_t *svga = &mystique->svga; uint32_t src, dst, old_dst; - int x; - int z_write; + int x; + int z_write; switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) { - case DWGCTRL_ATYPE_RSTR: - case DWGCTRL_ATYPE_RPL: - x = mystique->dwgreg.xdst; - while (mystique->dwgreg.length > 0) { - if (x >= mystique->dwgreg.cxleft && x <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_8: - src = mystique->dwgreg.fcol; - dst = svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask]; + case DWGCTRL_ATYPE_RSTR: + case DWGCTRL_ATYPE_RPL: + x = mystique->dwgreg.xdst; + while (mystique->dwgreg.length > 0) { + if (x >= mystique->dwgreg.cxleft && x <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_8: + src = mystique->dwgreg.fcol; + dst = svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask]; - dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); - svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask) >> 12] = changeframecount; - break; + dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); + svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_16: - src = mystique->dwgreg.fcol; - dst = ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w]; + case MACCESS_PWIDTH_16: + src = mystique->dwgreg.fcol; + dst = ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w]; - dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); - ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w) >> 11] = changeframecount; - break; + dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); + ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w) >> 11] = changeframecount; + break; - case MACCESS_PWIDTH_24: - src = mystique->dwgreg.fcol; - old_dst = *(uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask]; + case MACCESS_PWIDTH_24: + src = mystique->dwgreg.fcol; + old_dst = *(uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask]; - dst = bitop(src, old_dst, mystique->dwgreg.dwgctrl_running); - *(uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask] = (dst & 0xffffff) | (old_dst & 0xff000000); - svga->changedvram[(((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask) >> 12] = changeframecount; - break; + dst = bitop(src, old_dst, mystique->dwgreg.dwgctrl_running); + *(uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask] = (dst & 0xffffff) | (old_dst & 0xff000000); + svga->changedvram[(((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_32: - src = mystique->dwgreg.fcol; - dst = ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l]; + case MACCESS_PWIDTH_32: + src = mystique->dwgreg.fcol; + dst = ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l]; - dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l) >> 10] = changeframecount; - break; + dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l) >> 10] = changeframecount; + break; - default: - fatal("LINE RSTR/RPL PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); - } - } + default: + fatal("LINE RSTR/RPL PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); + } + } - if (mystique->dwgreg.sgn.sdydxl) - x += (mystique->dwgreg.sgn.sdxl ? -1 : 1); - else - mystique->dwgreg.ydst_lin += (mystique->dwgreg.sgn.sdy ? -(mystique->dwgreg.pitch & PITCH_MASK) : (mystique->dwgreg.pitch & PITCH_MASK)); + if (mystique->dwgreg.sgn.sdydxl) + x += (mystique->dwgreg.sgn.sdxl ? -1 : 1); + else + mystique->dwgreg.ydst_lin += (mystique->dwgreg.sgn.sdy ? -(mystique->dwgreg.pitch & PITCH_MASK) : (mystique->dwgreg.pitch & PITCH_MASK)); - if ((int32_t)mystique->dwgreg.ar[1] >= 0) { - mystique->dwgreg.ar[1] += mystique->dwgreg.ar[2]; - if (mystique->dwgreg.sgn.sdydxl) - mystique->dwgreg.ydst_lin += (mystique->dwgreg.sgn.sdy ? -(mystique->dwgreg.pitch & PITCH_MASK) : (mystique->dwgreg.pitch & PITCH_MASK)); - else - x += (mystique->dwgreg.sgn.sdxl ? -1 : 1); - } else - mystique->dwgreg.ar[1] += mystique->dwgreg.ar[0]; + if ((int32_t) mystique->dwgreg.ar[1] >= 0) { + mystique->dwgreg.ar[1] += mystique->dwgreg.ar[2]; + if (mystique->dwgreg.sgn.sdydxl) + mystique->dwgreg.ydst_lin += (mystique->dwgreg.sgn.sdy ? -(mystique->dwgreg.pitch & PITCH_MASK) : (mystique->dwgreg.pitch & PITCH_MASK)); + else + x += (mystique->dwgreg.sgn.sdxl ? -1 : 1); + } else + mystique->dwgreg.ar[1] += mystique->dwgreg.ar[0]; - mystique->dwgreg.length--; - } - break; + mystique->dwgreg.length--; + } + break; - case DWGCTRL_ATYPE_I: - case DWGCTRL_ATYPE_ZI: - z_write = ((mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) == DWGCTRL_ATYPE_ZI); - x = mystique->dwgreg.xdst; - while (mystique->dwgreg.length > 0) { - if (x >= mystique->dwgreg.cxleft && x <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { - uint16_t z = ((int32_t)mystique->dwgreg.dr[0] < 0) ? 0 : (mystique->dwgreg.dr[0] >> 15); - uint16_t *z_p = (uint16_t *)&svga->vram[(mystique->dwgreg.ydst_lin*2 + mystique->dwgreg.zorg) & mystique->vram_mask]; - uint16_t old_z = z_p[x]; + case DWGCTRL_ATYPE_I: + case DWGCTRL_ATYPE_ZI: + z_write = ((mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) == DWGCTRL_ATYPE_ZI); + x = mystique->dwgreg.xdst; + while (mystique->dwgreg.length > 0) { + if (x >= mystique->dwgreg.cxleft && x <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { + uint16_t z = ((int32_t) mystique->dwgreg.dr[0] < 0) ? 0 : (mystique->dwgreg.dr[0] >> 15); + uint16_t *z_p = (uint16_t *) &svga->vram[(mystique->dwgreg.ydst_lin * 2 + mystique->dwgreg.zorg) & mystique->vram_mask]; + uint16_t old_z = z_p[x]; - if (z_check(z, old_z, mystique->dwgreg.dwgctrl_running & DWGCTRL_ZMODE_MASK)) { - int r = 0, g = 0, b = 0; + if (z_check(z, old_z, mystique->dwgreg.dwgctrl_running & DWGCTRL_ZMODE_MASK)) { + int r = 0, g = 0, b = 0; - if (z_write) - z_p[x] = z; + if (z_write) + z_p[x] = z; - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_16: - if (!(mystique->dwgreg.dr[4] & (1 << 23))) - r = (mystique->dwgreg.dr[4] >> 18) & 0x1f; - if (!(mystique->dwgreg.dr[8] & (1 << 23))) - g = (mystique->dwgreg.dr[8] >> 17) & 0x3f; - if (!(mystique->dwgreg.dr[12] & (1 << 23))) - b = (mystique->dwgreg.dr[12] >> 18) & 0x1f; - dst = (r << 11) | (g << 5) | b; + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_16: + if (!(mystique->dwgreg.dr[4] & (1 << 23))) + r = (mystique->dwgreg.dr[4] >> 18) & 0x1f; + if (!(mystique->dwgreg.dr[8] & (1 << 23))) + g = (mystique->dwgreg.dr[8] >> 17) & 0x3f; + if (!(mystique->dwgreg.dr[12] & (1 << 23))) + b = (mystique->dwgreg.dr[12] >> 18) & 0x1f; + dst = (r << 11) | (g << 5) | b; - ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w) >> 11] = changeframecount; - break; + ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w) >> 11] = changeframecount; + break; - default: - fatal("LINE I/ZI PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); - } - } - } + default: + fatal("LINE I/ZI PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); + } + } + } - if (mystique->dwgreg.sgn.sdydxl) - x += (mystique->dwgreg.sgn.sdxl ? -1 : 1); - else - mystique->dwgreg.ydst_lin += (mystique->dwgreg.sgn.sdy ? -(mystique->dwgreg.pitch & PITCH_MASK) : (mystique->dwgreg.pitch & PITCH_MASK)); + if (mystique->dwgreg.sgn.sdydxl) + x += (mystique->dwgreg.sgn.sdxl ? -1 : 1); + else + mystique->dwgreg.ydst_lin += (mystique->dwgreg.sgn.sdy ? -(mystique->dwgreg.pitch & PITCH_MASK) : (mystique->dwgreg.pitch & PITCH_MASK)); - mystique->dwgreg.dr[0] += mystique->dwgreg.dr[2]; - mystique->dwgreg.dr[4] += mystique->dwgreg.dr[6]; - mystique->dwgreg.dr[8] += mystique->dwgreg.dr[10]; - mystique->dwgreg.dr[12] += mystique->dwgreg.dr[14]; + mystique->dwgreg.dr[0] += mystique->dwgreg.dr[2]; + mystique->dwgreg.dr[4] += mystique->dwgreg.dr[6]; + mystique->dwgreg.dr[8] += mystique->dwgreg.dr[10]; + mystique->dwgreg.dr[12] += mystique->dwgreg.dr[14]; - if ((int32_t)mystique->dwgreg.ar[1] >= 0) { - mystique->dwgreg.ar[1] += mystique->dwgreg.ar[2]; + if ((int32_t) mystique->dwgreg.ar[1] >= 0) { + mystique->dwgreg.ar[1] += mystique->dwgreg.ar[2]; - if (mystique->dwgreg.sgn.sdydxl) - mystique->dwgreg.ydst_lin += (mystique->dwgreg.sgn.sdy ? -(mystique->dwgreg.pitch & PITCH_MASK) : (mystique->dwgreg.pitch & PITCH_MASK)); - else - x += (mystique->dwgreg.sgn.sdxl ? -1 : 1); + if (mystique->dwgreg.sgn.sdydxl) + mystique->dwgreg.ydst_lin += (mystique->dwgreg.sgn.sdy ? -(mystique->dwgreg.pitch & PITCH_MASK) : (mystique->dwgreg.pitch & PITCH_MASK)); + else + x += (mystique->dwgreg.sgn.sdxl ? -1 : 1); - mystique->dwgreg.dr[0] += mystique->dwgreg.dr[3]; - mystique->dwgreg.dr[4] += mystique->dwgreg.dr[7]; - mystique->dwgreg.dr[8] += mystique->dwgreg.dr[11]; - mystique->dwgreg.dr[12] += mystique->dwgreg.dr[15]; - } else - mystique->dwgreg.ar[1] += mystique->dwgreg.ar[0]; + mystique->dwgreg.dr[0] += mystique->dwgreg.dr[3]; + mystique->dwgreg.dr[4] += mystique->dwgreg.dr[7]; + mystique->dwgreg.dr[8] += mystique->dwgreg.dr[11]; + mystique->dwgreg.dr[12] += mystique->dwgreg.dr[15]; + } else + mystique->dwgreg.ar[1] += mystique->dwgreg.ar[0]; - mystique->dwgreg.length--; - } - break; + mystique->dwgreg.length--; + } + break; - default: - /* pclog("Unknown atype %03x %08x LINE\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); */ - break; + default: + /* pclog("Unknown atype %03x %08x LINE\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); */ + break; } mystique->blitter_complete_refcount++; } - static void blit_autoline(mystique_t *mystique, int closed) { - int start_x = (int32_t)mystique->dwgreg.ar[5]; - int start_y = (int32_t)mystique->dwgreg.ar[6]; - int end_x = (int32_t)mystique->dwgreg.ar[0]; - int end_y = (int32_t)mystique->dwgreg.ar[2]; - int dx = end_x - start_x; - int dy = end_y - start_y; + int start_x = (int32_t) mystique->dwgreg.ar[5]; + int start_y = (int32_t) mystique->dwgreg.ar[6]; + int end_x = (int32_t) mystique->dwgreg.ar[0]; + int end_y = (int32_t) mystique->dwgreg.ar[2]; + int dx = end_x - start_x; + int dy = end_y - start_y; if (ABS(dx) > ABS(dy)) { - mystique->dwgreg.sgn.sdydxl = 1; - mystique->dwgreg.ar[0] = 2*ABS(dy); - mystique->dwgreg.ar[1] = 2*ABS(dy) - ABS(dx) - ((start_y > end_y) ? 1 : 0); - mystique->dwgreg.ar[2] = 2*ABS(dy) - 2*ABS(dx); - mystique->dwgreg.length = ABS(end_x - start_x); + mystique->dwgreg.sgn.sdydxl = 1; + mystique->dwgreg.ar[0] = 2 * ABS(dy); + mystique->dwgreg.ar[1] = 2 * ABS(dy) - ABS(dx) - ((start_y > end_y) ? 1 : 0); + mystique->dwgreg.ar[2] = 2 * ABS(dy) - 2 * ABS(dx); + mystique->dwgreg.length = ABS(end_x - start_x); } else { - mystique->dwgreg.sgn.sdydxl = 0; - mystique->dwgreg.ar[0] = 2*ABS(dx); - mystique->dwgreg.ar[1] = 2*ABS(dx) - ABS(dy) - ((start_y > end_y) ? 1 : 0); - mystique->dwgreg.ar[2] = 2*ABS(dx) - 2*ABS(dy); - mystique->dwgreg.length = ABS(end_y - start_y); + mystique->dwgreg.sgn.sdydxl = 0; + mystique->dwgreg.ar[0] = 2 * ABS(dx); + mystique->dwgreg.ar[1] = 2 * ABS(dx) - ABS(dy) - ((start_y > end_y) ? 1 : 0); + mystique->dwgreg.ar[2] = 2 * ABS(dx) - 2 * ABS(dy); + mystique->dwgreg.length = ABS(end_y - start_y); } mystique->dwgreg.sgn.sdxl = (start_x > end_x) ? 1 : 0; - mystique->dwgreg.sgn.sdy = (start_y > end_y) ? 1 : 0; + mystique->dwgreg.sgn.sdy = (start_y > end_y) ? 1 : 0; blit_line(mystique, closed); - mystique->dwgreg.ar[5] = end_x; - mystique->dwgreg.xdst = end_x; - mystique->dwgreg.ar[6] = end_y; - mystique->dwgreg.ydst = end_y; - mystique->dwgreg.ydst_lin = ((int32_t)(int16_t)mystique->dwgreg.ydst * (mystique->dwgreg.pitch & PITCH_MASK)) + mystique->dwgreg.ydstorg; + mystique->dwgreg.ar[5] = end_x; + mystique->dwgreg.xdst = end_x; + mystique->dwgreg.ar[6] = end_y; + mystique->dwgreg.ydst = end_y; + mystique->dwgreg.ydst_lin = ((int32_t) (int16_t) mystique->dwgreg.ydst * (mystique->dwgreg.pitch & PITCH_MASK)) + mystique->dwgreg.ydstorg; } - static void blit_trap(mystique_t *mystique) { - svga_t *svga = &mystique->svga; - uint32_t z_back, r_back, g_back, b_back; - int z_write; - int y; + svga_t *svga = &mystique->svga; + uint32_t z_back, r_back, g_back, b_back; + int z_write; + int y; const int trans_sel = (mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANS_MASK) >> DWGCTRL_TRANS_SHIFT; mystique->trap_count++; switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) { - case DWGCTRL_ATYPE_BLK: - case DWGCTRL_ATYPE_RPL: - for (y = 0; y < mystique->dwgreg.length; y++) { - uint8_t const * const trans = &trans_masks[trans_sel][(mystique->dwgreg.selline & 3) * 4]; - int16_t x_l = mystique->dwgreg.fxleft & 0xffff; - int16_t x_r = mystique->dwgreg.fxright & 0xffff; - int yoff = (mystique->dwgreg.yoff + mystique->dwgreg.ydst) & 7; + case DWGCTRL_ATYPE_BLK: + case DWGCTRL_ATYPE_RPL: + for (y = 0; y < mystique->dwgreg.length; y++) { + uint8_t const *const trans = &trans_masks[trans_sel][(mystique->dwgreg.selline & 3) * 4]; + int16_t x_l = mystique->dwgreg.fxleft & 0xffff; + int16_t x_r = mystique->dwgreg.fxright & 0xffff; + int yoff = (mystique->dwgreg.yoff + mystique->dwgreg.ydst) & 7; - while (x_l != x_r) { - if (x_l >= mystique->dwgreg.cxleft && x_l <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && - trans[x_l & 3]) { - int xoff = (mystique->dwgreg.xoff + x_l) & 7; - int pattern = mystique->dwgreg.pattern[yoff][xoff]; - uint32_t dst; + while (x_l != x_r) { + if (x_l >= mystique->dwgreg.cxleft && x_l <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && trans[x_l & 3]) { + int xoff = (mystique->dwgreg.xoff + x_l) & 7; + int pattern = mystique->dwgreg.pattern[yoff][xoff]; + uint32_t dst; - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_8: - svga->vram[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask] = - (pattern ? mystique->dwgreg.fcol : mystique->dwgreg.bcol) & 0xff; - svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask) >> 12] = changeframecount; - break; + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_8: + svga->vram[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask] = (pattern ? mystique->dwgreg.fcol : mystique->dwgreg.bcol) & 0xff; + svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_16: - ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w] = - (pattern ? mystique->dwgreg.fcol : mystique->dwgreg.bcol) & 0xffff; - svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w) >> 11] = changeframecount; - break; + case MACCESS_PWIDTH_16: + ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w] = (pattern ? mystique->dwgreg.fcol : mystique->dwgreg.bcol) & 0xffff; + svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w) >> 11] = changeframecount; + break; - case MACCESS_PWIDTH_24: - dst = *(uint32_t *)(&svga->vram[((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask]) & 0xff000000; - *(uint32_t *)(&svga->vram[((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask]) = - ((pattern ? mystique->dwgreg.fcol : mystique->dwgreg.bcol) & 0xffffff) | dst; - svga->changedvram[(((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask) >> 12] = changeframecount; - break; + case MACCESS_PWIDTH_24: + dst = *(uint32_t *) (&svga->vram[((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask]) & 0xff000000; + *(uint32_t *) (&svga->vram[((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask]) = ((pattern ? mystique->dwgreg.fcol : mystique->dwgreg.bcol) & 0xffffff) | dst; + svga->changedvram[(((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_32: - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l] = - pattern ? mystique->dwgreg.fcol : mystique->dwgreg.bcol; - svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l) >> 10] = changeframecount; - break; + case MACCESS_PWIDTH_32: + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l] = pattern ? mystique->dwgreg.fcol : mystique->dwgreg.bcol; + svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l) >> 10] = changeframecount; + break; - default: - fatal("TRAP BLK/RPL PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); - } - } - x_l++; - mystique->pixel_count++; - } + default: + fatal("TRAP BLK/RPL PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); + } + } + x_l++; + mystique->pixel_count++; + } - if ((int32_t)mystique->dwgreg.ar[1] < 0) { - while ((int32_t)mystique->dwgreg.ar[1] < 0 && mystique->dwgreg.ar[0]) { - mystique->dwgreg.ar[1] += mystique->dwgreg.ar[0]; - mystique->dwgreg.fxleft += (mystique->dwgreg.sgn.sdxl ? -1 : 1); - } - } else - mystique->dwgreg.ar[1] += mystique->dwgreg.ar[2]; + if ((int32_t) mystique->dwgreg.ar[1] < 0) { + while ((int32_t) mystique->dwgreg.ar[1] < 0 && mystique->dwgreg.ar[0]) { + mystique->dwgreg.ar[1] += mystique->dwgreg.ar[0]; + mystique->dwgreg.fxleft += (mystique->dwgreg.sgn.sdxl ? -1 : 1); + } + } else + mystique->dwgreg.ar[1] += mystique->dwgreg.ar[2]; - if ((int32_t)mystique->dwgreg.ar[4] < 0) { - while ((int32_t)mystique->dwgreg.ar[4] < 0 && mystique->dwgreg.ar[6]) { - mystique->dwgreg.ar[4] += mystique->dwgreg.ar[6]; - mystique->dwgreg.fxright += (mystique->dwgreg.sgn.sdxr ? -1 : 1); - } - } else - mystique->dwgreg.ar[4] += mystique->dwgreg.ar[5]; + if ((int32_t) mystique->dwgreg.ar[4] < 0) { + while ((int32_t) mystique->dwgreg.ar[4] < 0 && mystique->dwgreg.ar[6]) { + mystique->dwgreg.ar[4] += mystique->dwgreg.ar[6]; + mystique->dwgreg.fxright += (mystique->dwgreg.sgn.sdxr ? -1 : 1); + } + } else + mystique->dwgreg.ar[4] += mystique->dwgreg.ar[5]; - mystique->dwgreg.ydst++; - mystique->dwgreg.ydst &= 0x7fffff; - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + mystique->dwgreg.ydst++; + mystique->dwgreg.ydst &= 0x7fffff; + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); - mystique->dwgreg.selline = (mystique->dwgreg.selline + 1) & 7; - } - break; + mystique->dwgreg.selline = (mystique->dwgreg.selline + 1) & 7; + } + break; - case DWGCTRL_ATYPE_RSTR: - for (y = 0; y < mystique->dwgreg.length; y++) { - uint8_t const * const trans = &trans_masks[trans_sel][(mystique->dwgreg.selline & 3) * 4]; - int16_t x_l = mystique->dwgreg.fxleft & 0xffff; - int16_t x_r = mystique->dwgreg.fxright & 0xffff; - int yoff = (mystique->dwgreg.yoff + mystique->dwgreg.ydst) & 7; + case DWGCTRL_ATYPE_RSTR: + for (y = 0; y < mystique->dwgreg.length; y++) { + uint8_t const *const trans = &trans_masks[trans_sel][(mystique->dwgreg.selline & 3) * 4]; + int16_t x_l = mystique->dwgreg.fxleft & 0xffff; + int16_t x_r = mystique->dwgreg.fxright & 0xffff; + int yoff = (mystique->dwgreg.yoff + mystique->dwgreg.ydst) & 7; - while (x_l != x_r) { - if (x_l >= mystique->dwgreg.cxleft && x_l <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && - trans[x_l & 3]) { - int xoff = (mystique->dwgreg.xoff + x_l) & 7; - int pattern = mystique->dwgreg.pattern[yoff][xoff]; - uint32_t src = pattern ? mystique->dwgreg.fcol : mystique->dwgreg.bcol; - uint32_t dst, old_dst; + while (x_l != x_r) { + if (x_l >= mystique->dwgreg.cxleft && x_l <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && trans[x_l & 3]) { + int xoff = (mystique->dwgreg.xoff + x_l) & 7; + int pattern = mystique->dwgreg.pattern[yoff][xoff]; + uint32_t src = pattern ? mystique->dwgreg.fcol : mystique->dwgreg.bcol; + uint32_t dst, old_dst; - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_8: - dst = svga->vram[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask]; + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_8: + dst = svga->vram[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask]; - dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); - svga->vram[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask) >> 12] = changeframecount; - break; + dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); + svga->vram[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_16: - dst = ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w]; + case MACCESS_PWIDTH_16: + dst = ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w]; - dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); - ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w) >> 11] = changeframecount; - break; + dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); + ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w) >> 11] = changeframecount; + break; - case MACCESS_PWIDTH_24: - old_dst = *(uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask]; + case MACCESS_PWIDTH_24: + old_dst = *(uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask]; - dst = bitop(src, old_dst, mystique->dwgreg.dwgctrl_running); - *(uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask] = (dst & 0xffffff) | (old_dst & 0xff000000); - svga->changedvram[(((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask) >> 12] = changeframecount; - break; + dst = bitop(src, old_dst, mystique->dwgreg.dwgctrl_running); + *(uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask] = (dst & 0xffffff) | (old_dst & 0xff000000); + svga->changedvram[(((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_32: - dst = ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l]; + case MACCESS_PWIDTH_32: + dst = ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l]; - dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l) >> 10] = changeframecount; - break; + dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l) >> 10] = changeframecount; + break; - default: - fatal("TRAP RSTR PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); - } - } - x_l++; - mystique->pixel_count++; - } + default: + fatal("TRAP RSTR PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); + } + } + x_l++; + mystique->pixel_count++; + } - if ((int32_t)mystique->dwgreg.ar[1] < 0) { - while ((int32_t)mystique->dwgreg.ar[1] < 0 && mystique->dwgreg.ar[0]) { - mystique->dwgreg.ar[1] += mystique->dwgreg.ar[0]; - mystique->dwgreg.fxleft += (mystique->dwgreg.sgn.sdxl ? -1 : 1); - } - } else - mystique->dwgreg.ar[1] += mystique->dwgreg.ar[2]; + if ((int32_t) mystique->dwgreg.ar[1] < 0) { + while ((int32_t) mystique->dwgreg.ar[1] < 0 && mystique->dwgreg.ar[0]) { + mystique->dwgreg.ar[1] += mystique->dwgreg.ar[0]; + mystique->dwgreg.fxleft += (mystique->dwgreg.sgn.sdxl ? -1 : 1); + } + } else + mystique->dwgreg.ar[1] += mystique->dwgreg.ar[2]; - if ((int32_t)mystique->dwgreg.ar[4] < 0) { - while ((int32_t)mystique->dwgreg.ar[4] < 0 && mystique->dwgreg.ar[6]) { - mystique->dwgreg.ar[4] += mystique->dwgreg.ar[6]; - mystique->dwgreg.fxright += (mystique->dwgreg.sgn.sdxr ? -1 : 1); - } - } else - mystique->dwgreg.ar[4] += mystique->dwgreg.ar[5]; + if ((int32_t) mystique->dwgreg.ar[4] < 0) { + while ((int32_t) mystique->dwgreg.ar[4] < 0 && mystique->dwgreg.ar[6]) { + mystique->dwgreg.ar[4] += mystique->dwgreg.ar[6]; + mystique->dwgreg.fxright += (mystique->dwgreg.sgn.sdxr ? -1 : 1); + } + } else + mystique->dwgreg.ar[4] += mystique->dwgreg.ar[5]; - mystique->dwgreg.ydst++; - mystique->dwgreg.ydst &= 0x7fffff; - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + mystique->dwgreg.ydst++; + mystique->dwgreg.ydst &= 0x7fffff; + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); - mystique->dwgreg.selline = (mystique->dwgreg.selline + 1) & 7; - } - break; + mystique->dwgreg.selline = (mystique->dwgreg.selline + 1) & 7; + } + break; - case DWGCTRL_ATYPE_I: - case DWGCTRL_ATYPE_ZI: - z_write = ((mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) == DWGCTRL_ATYPE_ZI); + case DWGCTRL_ATYPE_I: + case DWGCTRL_ATYPE_ZI: + z_write = ((mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) == DWGCTRL_ATYPE_ZI); - for (y = 0; y < mystique->dwgreg.length; y++) { - uint8_t const * const trans = &trans_masks[trans_sel][(mystique->dwgreg.selline & 3) * 4]; - uint16_t *z_p = (uint16_t *)&svga->vram[(mystique->dwgreg.ydst_lin*2 + mystique->dwgreg.zorg) & mystique->vram_mask]; - int16_t x_l = mystique->dwgreg.fxleft & 0xffff; - int16_t x_r = mystique->dwgreg.fxright & 0xffff; - int16_t old_x_l = x_l; - int dx; + for (y = 0; y < mystique->dwgreg.length; y++) { + uint8_t const *const trans = &trans_masks[trans_sel][(mystique->dwgreg.selline & 3) * 4]; + uint16_t *z_p = (uint16_t *) &svga->vram[(mystique->dwgreg.ydst_lin * 2 + mystique->dwgreg.zorg) & mystique->vram_mask]; + int16_t x_l = mystique->dwgreg.fxleft & 0xffff; + int16_t x_r = mystique->dwgreg.fxright & 0xffff; + int16_t old_x_l = x_l; + int dx; - z_back = mystique->dwgreg.dr[0]; - r_back = mystique->dwgreg.dr[4]; - g_back = mystique->dwgreg.dr[8]; - b_back = mystique->dwgreg.dr[12]; + z_back = mystique->dwgreg.dr[0]; + r_back = mystique->dwgreg.dr[4]; + g_back = mystique->dwgreg.dr[8]; + b_back = mystique->dwgreg.dr[12]; - while (x_l != x_r) { - if (x_l >= mystique->dwgreg.cxleft && x_l <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && - trans[x_l & 3]) { - uint16_t z = ((int32_t)mystique->dwgreg.dr[0] < 0) ? 0 : (mystique->dwgreg.dr[0] >> 15); - uint16_t old_z = z_p[x_l]; + while (x_l != x_r) { + if (x_l >= mystique->dwgreg.cxleft && x_l <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && trans[x_l & 3]) { + uint16_t z = ((int32_t) mystique->dwgreg.dr[0] < 0) ? 0 : (mystique->dwgreg.dr[0] >> 15); + uint16_t old_z = z_p[x_l]; - if (z_check(z, old_z, mystique->dwgreg.dwgctrl_running & DWGCTRL_ZMODE_MASK)) { - uint32_t dst = 0, old_dst; - int r = 0, g = 0, b = 0; + if (z_check(z, old_z, mystique->dwgreg.dwgctrl_running & DWGCTRL_ZMODE_MASK)) { + uint32_t dst = 0, old_dst; + int r = 0, g = 0, b = 0; - if (!(mystique->dwgreg.dr[4] & (1 << 23))) - r = (mystique->dwgreg.dr[4] >> 15) & 0xff; - if (!(mystique->dwgreg.dr[8] & (1 << 23))) - g = (mystique->dwgreg.dr[8] >> 15) & 0xff; - if (!(mystique->dwgreg.dr[12] & (1 << 23))) - b = (mystique->dwgreg.dr[12] >> 15) & 0xff; + if (!(mystique->dwgreg.dr[4] & (1 << 23))) + r = (mystique->dwgreg.dr[4] >> 15) & 0xff; + if (!(mystique->dwgreg.dr[8] & (1 << 23))) + g = (mystique->dwgreg.dr[8] >> 15) & 0xff; + if (!(mystique->dwgreg.dr[12] & (1 << 23))) + b = (mystique->dwgreg.dr[12] >> 15) & 0xff; - if (z_write) - z_p[x_l] = z; + if (z_write) + z_p[x_l] = z; - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_8: - svga->vram[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask) >> 12] = changeframecount; - break; + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_8: + svga->vram[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_16: - dst = dither(mystique, r, g, b, x_l & 1, mystique->dwgreg.selline & 1); - ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w) >> 11] = changeframecount; - break; + case MACCESS_PWIDTH_16: + dst = dither(mystique, r, g, b, x_l & 1, mystique->dwgreg.selline & 1); + ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w) >> 11] = changeframecount; + break; - case MACCESS_PWIDTH_24: - old_dst = *(uint32_t *)(&svga->vram[((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask]) & 0xff000000; - *(uint32_t *)(&svga->vram[((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask]) = old_dst | dst; - svga->changedvram[(((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask) >> 12] = changeframecount; - break; + case MACCESS_PWIDTH_24: + old_dst = *(uint32_t *) (&svga->vram[((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask]) & 0xff000000; + *(uint32_t *) (&svga->vram[((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask]) = old_dst | dst; + svga->changedvram[(((mystique->dwgreg.ydst_lin + x_l) * 3) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_32: - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l] = b | (g << 8) | (r << 16); - svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l) >> 10] = changeframecount; - break; + case MACCESS_PWIDTH_32: + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l] = b | (g << 8) | (r << 16); + svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l) >> 10] = changeframecount; + break; - default: - fatal("TRAP BLK/RPL PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); - } - } - } + default: + fatal("TRAP BLK/RPL PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); + } + } + } - mystique->dwgreg.dr[0] += mystique->dwgreg.dr[2]; - mystique->dwgreg.dr[4] += mystique->dwgreg.dr[6]; - mystique->dwgreg.dr[8] += mystique->dwgreg.dr[10]; - mystique->dwgreg.dr[12] += mystique->dwgreg.dr[14]; + mystique->dwgreg.dr[0] += mystique->dwgreg.dr[2]; + mystique->dwgreg.dr[4] += mystique->dwgreg.dr[6]; + mystique->dwgreg.dr[8] += mystique->dwgreg.dr[10]; + mystique->dwgreg.dr[12] += mystique->dwgreg.dr[14]; - x_l++; - mystique->pixel_count++; - } + x_l++; + mystique->pixel_count++; + } - mystique->dwgreg.dr[0] = z_back + mystique->dwgreg.dr[3]; - mystique->dwgreg.dr[4] = r_back + mystique->dwgreg.dr[7]; - mystique->dwgreg.dr[8] = g_back + mystique->dwgreg.dr[11]; - mystique->dwgreg.dr[12] = b_back + mystique->dwgreg.dr[15]; + mystique->dwgreg.dr[0] = z_back + mystique->dwgreg.dr[3]; + mystique->dwgreg.dr[4] = r_back + mystique->dwgreg.dr[7]; + mystique->dwgreg.dr[8] = g_back + mystique->dwgreg.dr[11]; + mystique->dwgreg.dr[12] = b_back + mystique->dwgreg.dr[15]; - while ((int32_t)mystique->dwgreg.ar[1] < 0 && mystique->dwgreg.ar[0]) { - mystique->dwgreg.ar[1] += mystique->dwgreg.ar[0]; - mystique->dwgreg.fxleft += (mystique->dwgreg.sgn.sdxl ? -1 : 1); - } - mystique->dwgreg.ar[1] += mystique->dwgreg.ar[2]; + while ((int32_t) mystique->dwgreg.ar[1] < 0 && mystique->dwgreg.ar[0]) { + mystique->dwgreg.ar[1] += mystique->dwgreg.ar[0]; + mystique->dwgreg.fxleft += (mystique->dwgreg.sgn.sdxl ? -1 : 1); + } + mystique->dwgreg.ar[1] += mystique->dwgreg.ar[2]; - while ((int32_t)mystique->dwgreg.ar[4] < 0 && mystique->dwgreg.ar[6]) { - mystique->dwgreg.ar[4] += mystique->dwgreg.ar[6]; - mystique->dwgreg.fxright += (mystique->dwgreg.sgn.sdxr ? -1 : 1); - } - mystique->dwgreg.ar[4] += mystique->dwgreg.ar[5]; + while ((int32_t) mystique->dwgreg.ar[4] < 0 && mystique->dwgreg.ar[6]) { + mystique->dwgreg.ar[4] += mystique->dwgreg.ar[6]; + mystique->dwgreg.fxright += (mystique->dwgreg.sgn.sdxr ? -1 : 1); + } + mystique->dwgreg.ar[4] += mystique->dwgreg.ar[5]; - dx = (int16_t)((mystique->dwgreg.fxleft - old_x_l) & 0xffff); - mystique->dwgreg.dr[0] += dx*mystique->dwgreg.dr[2]; - mystique->dwgreg.dr[4] += dx*mystique->dwgreg.dr[6]; - mystique->dwgreg.dr[8] += dx*mystique->dwgreg.dr[10]; - mystique->dwgreg.dr[12] += dx*mystique->dwgreg.dr[14]; + dx = (int16_t) ((mystique->dwgreg.fxleft - old_x_l) & 0xffff); + mystique->dwgreg.dr[0] += dx * mystique->dwgreg.dr[2]; + mystique->dwgreg.dr[4] += dx * mystique->dwgreg.dr[6]; + mystique->dwgreg.dr[8] += dx * mystique->dwgreg.dr[10]; + mystique->dwgreg.dr[12] += dx * mystique->dwgreg.dr[14]; - mystique->dwgreg.ydst++; - mystique->dwgreg.ydst &= 0x7fffff; - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + mystique->dwgreg.ydst++; + mystique->dwgreg.ydst &= 0x7fffff; + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); - mystique->dwgreg.selline = (mystique->dwgreg.selline + 1) & 7; - } - break; + mystique->dwgreg.selline = (mystique->dwgreg.selline + 1) & 7; + } + break; - default: - fatal("Unknown atype %03x %08x TRAP\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); + default: + fatal("Unknown atype %03x %08x TRAP\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); } mystique->blitter_complete_refcount++; } - -static int texture_read(mystique_t *mystique, int *tex_r, int *tex_g, int *tex_b, int *atransp) +static int +texture_read(mystique_t *mystique, int *tex_r, int *tex_g, int *tex_b, int *atransp) { svga_t *svga = &mystique->svga; - const int tex_shift = 3 + ((mystique->dwgreg.texctl & TEXCTL_TPITCH_MASK) >> TEXCTL_TPITCH_SHIFT); - const unsigned int palsel = mystique->dwgreg.texctl & TEXCTL_PALSEL_MASK; - const uint16_t tckey = mystique->dwgreg.textrans & TEXTRANS_TCKEY_MASK; - const uint16_t tkmask = (mystique->dwgreg.textrans & TEXTRANS_TKMASK_MASK) >> TEXTRANS_TKMASK_SHIFT; - const unsigned int w_mask = (mystique->dwgreg.texwidth & TEXWIDTH_TWMASK_MASK) >> TEXWIDTH_TWMASK_SHIFT; - const unsigned int h_mask = (mystique->dwgreg.texheight & TEXHEIGHT_THMASK_MASK) >> TEXHEIGHT_THMASK_SHIFT; - uint16_t src = 0; - int s, t; + const int tex_shift = 3 + ((mystique->dwgreg.texctl & TEXCTL_TPITCH_MASK) >> TEXCTL_TPITCH_SHIFT); + const unsigned int palsel = mystique->dwgreg.texctl & TEXCTL_PALSEL_MASK; + const uint16_t tckey = mystique->dwgreg.textrans & TEXTRANS_TCKEY_MASK; + const uint16_t tkmask = (mystique->dwgreg.textrans & TEXTRANS_TKMASK_MASK) >> TEXTRANS_TKMASK_SHIFT; + const unsigned int w_mask = (mystique->dwgreg.texwidth & TEXWIDTH_TWMASK_MASK) >> TEXWIDTH_TWMASK_SHIFT; + const unsigned int h_mask = (mystique->dwgreg.texheight & TEXHEIGHT_THMASK_MASK) >> TEXHEIGHT_THMASK_SHIFT; + uint16_t src = 0; + int s, t; if (mystique->dwgreg.texctl & TEXCTL_NPCEN) { - const int s_shift = 20 - (mystique->dwgreg.texwidth & TEXWIDTH_TW_MASK); - const int t_shift = 20 - (mystique->dwgreg.texheight & TEXHEIGHT_TH_MASK); + const int s_shift = 20 - (mystique->dwgreg.texwidth & TEXWIDTH_TW_MASK); + const int t_shift = 20 - (mystique->dwgreg.texheight & TEXHEIGHT_TH_MASK); - s = (int32_t)mystique->dwgreg.tmr[6] >> s_shift; - t = (int32_t)mystique->dwgreg.tmr[7] >> t_shift; + s = (int32_t) mystique->dwgreg.tmr[6] >> s_shift; + t = (int32_t) mystique->dwgreg.tmr[7] >> t_shift; } else { - const int s_shift = (20 + 16) - (mystique->dwgreg.texwidth & TEXWIDTH_TW_MASK); - const int t_shift = (20 + 16) - (mystique->dwgreg.texheight & TEXHEIGHT_TH_MASK); - int64_t q = mystique->dwgreg.tmr[8] ? ((0x100000000ll / (int64_t)(int32_t)mystique->dwgreg.tmr[8]) /*>> 16*/) : 0; + const int s_shift = (20 + 16) - (mystique->dwgreg.texwidth & TEXWIDTH_TW_MASK); + const int t_shift = (20 + 16) - (mystique->dwgreg.texheight & TEXHEIGHT_TH_MASK); + int64_t q = mystique->dwgreg.tmr[8] ? ((0x100000000ll / (int64_t) (int32_t) mystique->dwgreg.tmr[8]) /*>> 16*/) : 0; - s = (((int64_t)(int32_t)mystique->dwgreg.tmr[6] * q) /*<< 8*/) >> s_shift;/*((16+20)-12);*/ - t = (((int64_t)(int32_t)mystique->dwgreg.tmr[7] * q) /*<< 8*/) >> t_shift;/*((16+20)-9);*/ + s = (((int64_t) (int32_t) mystique->dwgreg.tmr[6] * q) /*<< 8*/) >> s_shift; /*((16+20)-12);*/ + t = (((int64_t) (int32_t) mystique->dwgreg.tmr[7] * q) /*<< 8*/) >> t_shift; /*((16+20)-9);*/ } if (mystique->dwgreg.texctl & TEXCTL_CLAMPU) { - if (s < 0) - s = 0; - else if (s > w_mask) - s = w_mask; + if (s < 0) + s = 0; + else if (s > w_mask) + s = w_mask; } else - s &= w_mask; + s &= w_mask; if (mystique->dwgreg.texctl & TEXCTL_CLAMPV) { - if (t < 0) - t = 0; - else if (t > h_mask) - t = h_mask; + if (t < 0) + t = 0; + else if (t > h_mask) + t = h_mask; } else - t &= h_mask; + t &= h_mask; switch (mystique->dwgreg.texctl & TEXCTL_TEXFORMAT_MASK) { - case TEXCTL_TEXFORMAT_TW4: - src = svga->vram[(mystique->dwgreg.texorg + (((t << tex_shift) + s) >> 1)) & mystique->vram_mask]; - if (s & 1) - src >>= 4; - else - src &= 0xf; - *tex_r = mystique->lut[src | palsel].r; - *tex_g = mystique->lut[src | palsel].g; - *tex_b = mystique->lut[src | palsel].b; - *atransp = 0; - break; - case TEXCTL_TEXFORMAT_TW8: - src = svga->vram[(mystique->dwgreg.texorg + (t << tex_shift) + s) & mystique->vram_mask]; - *tex_r = mystique->lut[src].r; - *tex_g = mystique->lut[src].g; - *tex_b = mystique->lut[src].b; - *atransp = 0; - break; - case TEXCTL_TEXFORMAT_TW15: - src = ((uint16_t *)svga->vram)[((mystique->dwgreg.texorg >> 1) + (t << tex_shift) + s) & mystique->vram_mask_w]; - *tex_r = ((src >> 10) & 0x1f) << 3; - *tex_g = ((src >> 5) & 0x1f) << 3; - *tex_b = (src & 0x1f) << 3; - if (((src >> 15) & mystique->dwgreg.ta_mask) == mystique->dwgreg.ta_key) - *atransp = 1; - else - *atransp = 0; - break; - case TEXCTL_TEXFORMAT_TW16: - src = ((uint16_t *)svga->vram)[((mystique->dwgreg.texorg >> 1) + (t << tex_shift) + s) & mystique->vram_mask_w]; - *tex_r = (src >> 11) << 3; - *tex_g = ((src >> 5) & 0x3f) << 2; - *tex_b = (src & 0x1f) << 3; - *atransp = 0; - break; - default: - fatal("Unknown texture format %i\n", mystique->dwgreg.texctl & TEXCTL_TEXFORMAT_MASK); - break; + case TEXCTL_TEXFORMAT_TW4: + src = svga->vram[(mystique->dwgreg.texorg + (((t << tex_shift) + s) >> 1)) & mystique->vram_mask]; + if (s & 1) + src >>= 4; + else + src &= 0xf; + *tex_r = mystique->lut[src | palsel].r; + *tex_g = mystique->lut[src | palsel].g; + *tex_b = mystique->lut[src | palsel].b; + *atransp = 0; + break; + case TEXCTL_TEXFORMAT_TW8: + src = svga->vram[(mystique->dwgreg.texorg + (t << tex_shift) + s) & mystique->vram_mask]; + *tex_r = mystique->lut[src].r; + *tex_g = mystique->lut[src].g; + *tex_b = mystique->lut[src].b; + *atransp = 0; + break; + case TEXCTL_TEXFORMAT_TW15: + src = ((uint16_t *) svga->vram)[((mystique->dwgreg.texorg >> 1) + (t << tex_shift) + s) & mystique->vram_mask_w]; + *tex_r = ((src >> 10) & 0x1f) << 3; + *tex_g = ((src >> 5) & 0x1f) << 3; + *tex_b = (src & 0x1f) << 3; + if (((src >> 15) & mystique->dwgreg.ta_mask) == mystique->dwgreg.ta_key) + *atransp = 1; + else + *atransp = 0; + break; + case TEXCTL_TEXFORMAT_TW16: + src = ((uint16_t *) svga->vram)[((mystique->dwgreg.texorg >> 1) + (t << tex_shift) + s) & mystique->vram_mask_w]; + *tex_r = (src >> 11) << 3; + *tex_g = ((src >> 5) & 0x3f) << 2; + *tex_b = (src & 0x1f) << 3; + *atransp = 0; + break; + default: + fatal("Unknown texture format %i\n", mystique->dwgreg.texctl & TEXCTL_TEXFORMAT_MASK); + break; } return ((src & tkmask) == tckey); } - static void blit_texture_trap(mystique_t *mystique) { - svga_t *svga = &mystique->svga; - int y; - int z_write; + svga_t *svga = &mystique->svga; + int y; + int z_write; const int trans_sel = (mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANS_MASK) >> DWGCTRL_TRANS_SHIFT; - const int dest32 = ((mystique->maccess_running & MACCESS_PWIDTH_MASK) == MACCESS_PWIDTH_32); + const int dest32 = ((mystique->maccess_running & MACCESS_PWIDTH_MASK) == MACCESS_PWIDTH_32); mystique->trap_count++; switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) { - case DWGCTRL_ATYPE_I: - case DWGCTRL_ATYPE_ZI: - z_write = ((mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) == DWGCTRL_ATYPE_ZI); + case DWGCTRL_ATYPE_I: + case DWGCTRL_ATYPE_ZI: + z_write = ((mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) == DWGCTRL_ATYPE_ZI); - for (y = 0; y < mystique->dwgreg.length; y++) { - uint8_t const * const trans = &trans_masks[trans_sel][(mystique->dwgreg.selline & 3) * 4]; - uint16_t *z_p = (uint16_t *)&svga->vram[(mystique->dwgreg.ydst_lin*2 + mystique->dwgreg.zorg) & mystique->vram_mask]; - int16_t x_l = mystique->dwgreg.fxleft & 0xffff; - int16_t x_r = mystique->dwgreg.fxright & 0xffff; - int16_t old_x_l = x_l; - int dx; + for (y = 0; y < mystique->dwgreg.length; y++) { + uint8_t const *const trans = &trans_masks[trans_sel][(mystique->dwgreg.selline & 3) * 4]; + uint16_t *z_p = (uint16_t *) &svga->vram[(mystique->dwgreg.ydst_lin * 2 + mystique->dwgreg.zorg) & mystique->vram_mask]; + int16_t x_l = mystique->dwgreg.fxleft & 0xffff; + int16_t x_r = mystique->dwgreg.fxright & 0xffff; + int16_t old_x_l = x_l; + int dx; - uint32_t z_back = mystique->dwgreg.dr[0]; - uint32_t r_back = mystique->dwgreg.dr[4]; - uint32_t g_back = mystique->dwgreg.dr[8]; - uint32_t b_back = mystique->dwgreg.dr[12]; - uint32_t s_back = mystique->dwgreg.tmr[6]; - uint32_t t_back = mystique->dwgreg.tmr[7]; - uint32_t q_back = mystique->dwgreg.tmr[8]; + uint32_t z_back = mystique->dwgreg.dr[0]; + uint32_t r_back = mystique->dwgreg.dr[4]; + uint32_t g_back = mystique->dwgreg.dr[8]; + uint32_t b_back = mystique->dwgreg.dr[12]; + uint32_t s_back = mystique->dwgreg.tmr[6]; + uint32_t t_back = mystique->dwgreg.tmr[7]; + uint32_t q_back = mystique->dwgreg.tmr[8]; - while (x_l != x_r) { - if (x_l >= mystique->dwgreg.cxleft && x_l <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && - trans[x_l & 3]) { - uint16_t z = ((int32_t)mystique->dwgreg.dr[0] < 0) ? 0 : (mystique->dwgreg.dr[0] >> 15); - uint16_t old_z = z_p[x_l]; + while (x_l != x_r) { + if (x_l >= mystique->dwgreg.cxleft && x_l <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && trans[x_l & 3]) { + uint16_t z = ((int32_t) mystique->dwgreg.dr[0] < 0) ? 0 : (mystique->dwgreg.dr[0] >> 15); + uint16_t old_z = z_p[x_l]; - if (z_check(z, old_z, mystique->dwgreg.dwgctrl_running & DWGCTRL_ZMODE_MASK)) { - int tex_r = 0, tex_g = 0, tex_b = 0; - int ctransp, atransp = 0; - int i_r = 0, i_g = 0, i_b = 0; + if (z_check(z, old_z, mystique->dwgreg.dwgctrl_running & DWGCTRL_ZMODE_MASK)) { + int tex_r = 0, tex_g = 0, tex_b = 0; + int ctransp, atransp = 0; + int i_r = 0, i_g = 0, i_b = 0; - if (!(mystique->dwgreg.dr[4] & (1 << 23))) - i_r = (mystique->dwgreg.dr[4] >> 15) & 0xff; - if (!(mystique->dwgreg.dr[8] & (1 << 23))) - i_g = (mystique->dwgreg.dr[8] >> 15) & 0xff; - if (!(mystique->dwgreg.dr[12] & (1 << 23))) - i_b = (mystique->dwgreg.dr[12] >> 15) & 0xff; + if (!(mystique->dwgreg.dr[4] & (1 << 23))) + i_r = (mystique->dwgreg.dr[4] >> 15) & 0xff; + if (!(mystique->dwgreg.dr[8] & (1 << 23))) + i_g = (mystique->dwgreg.dr[8] >> 15) & 0xff; + if (!(mystique->dwgreg.dr[12] & (1 << 23))) + i_b = (mystique->dwgreg.dr[12] >> 15) & 0xff; - ctransp = texture_read(mystique, &tex_r, &tex_g, &tex_b, &atransp); + ctransp = texture_read(mystique, &tex_r, &tex_g, &tex_b, &atransp); - switch (mystique->dwgreg.texctl & (TEXCTL_TMODULATE | TEXCTL_STRANS | TEXCTL_ITRANS | TEXCTL_DECALCKEY)) { - case 0: - if (ctransp) - goto skip_pixel; - if (atransp) { - tex_r = i_r; - tex_g = i_g; - tex_b = i_b; - } - break; + switch (mystique->dwgreg.texctl & (TEXCTL_TMODULATE | TEXCTL_STRANS | TEXCTL_ITRANS | TEXCTL_DECALCKEY)) { + case 0: + if (ctransp) + goto skip_pixel; + if (atransp) { + tex_r = i_r; + tex_g = i_g; + tex_b = i_b; + } + break; - case TEXCTL_DECALCKEY: - if (ctransp) { - tex_r = i_r; - tex_g = i_g; - tex_b = i_b; - } - break; + case TEXCTL_DECALCKEY: + if (ctransp) { + tex_r = i_r; + tex_g = i_g; + tex_b = i_b; + } + break; - case (TEXCTL_STRANS | TEXCTL_DECALCKEY): - if (ctransp) - goto skip_pixel; - break; + case (TEXCTL_STRANS | TEXCTL_DECALCKEY): + if (ctransp) + goto skip_pixel; + break; - case TEXCTL_TMODULATE: - if (ctransp) - goto skip_pixel; - if (mystique->dwgreg.texctl & TEXCTL_TMODULATE) { - tex_r = (tex_r * i_r) >> 8; - tex_g = (tex_g * i_g) >> 8; - tex_b = (tex_b * i_b) >> 8; - } - break; + case TEXCTL_TMODULATE: + if (ctransp) + goto skip_pixel; + if (mystique->dwgreg.texctl & TEXCTL_TMODULATE) { + tex_r = (tex_r * i_r) >> 8; + tex_g = (tex_g * i_g) >> 8; + tex_b = (tex_b * i_b) >> 8; + } + break; - case (TEXCTL_TMODULATE | TEXCTL_STRANS): - if (ctransp || atransp) - goto skip_pixel; - if (mystique->dwgreg.texctl & TEXCTL_TMODULATE) { - tex_r = (tex_r * i_r) >> 8; - tex_g = (tex_g * i_g) >> 8; - tex_b = (tex_b * i_b) >> 8; - } - break; + case (TEXCTL_TMODULATE | TEXCTL_STRANS): + if (ctransp || atransp) + goto skip_pixel; + if (mystique->dwgreg.texctl & TEXCTL_TMODULATE) { + tex_r = (tex_r * i_r) >> 8; + tex_g = (tex_g * i_g) >> 8; + tex_b = (tex_b * i_b) >> 8; + } + break; - default: - fatal("Bad TEXCTL %08x %08x\n", mystique->dwgreg.texctl, mystique->dwgreg.texctl & (TEXCTL_TMODULATE | TEXCTL_STRANS | TEXCTL_ITRANS | TEXCTL_DECALCKEY)); - } + default: + fatal("Bad TEXCTL %08x %08x\n", mystique->dwgreg.texctl, mystique->dwgreg.texctl & (TEXCTL_TMODULATE | TEXCTL_STRANS | TEXCTL_ITRANS | TEXCTL_DECALCKEY)); + } - if (dest32) { - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l] = tex_b | (tex_g << 8) | (tex_r << 16); - svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l) >> 10] = changeframecount; - } else { - ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w] = dither(mystique, tex_r, tex_g, tex_b, x_l & 1, mystique->dwgreg.selline & 1); - svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w) >> 11] = changeframecount; - } - if (z_write) - z_p[x_l] = z; - } - } + if (dest32) { + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l] = tex_b | (tex_g << 8) | (tex_r << 16); + svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_l) >> 10] = changeframecount; + } else { + ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w] = dither(mystique, tex_r, tex_g, tex_b, x_l & 1, mystique->dwgreg.selline & 1); + svga->changedvram[((mystique->dwgreg.ydst_lin + x_l) & mystique->vram_mask_w) >> 11] = changeframecount; + } + if (z_write) + z_p[x_l] = z; + } + } skip_pixel: - x_l++; - mystique->pixel_count++; + x_l++; + mystique->pixel_count++; - mystique->dwgreg.dr[0] += mystique->dwgreg.dr[2]; - mystique->dwgreg.dr[4] += mystique->dwgreg.dr[6]; - mystique->dwgreg.dr[8] += mystique->dwgreg.dr[10]; - mystique->dwgreg.dr[12] += mystique->dwgreg.dr[14]; - mystique->dwgreg.tmr[6] += mystique->dwgreg.tmr[0]; - mystique->dwgreg.tmr[7] += mystique->dwgreg.tmr[2]; - mystique->dwgreg.tmr[8] += mystique->dwgreg.tmr[4]; - } + mystique->dwgreg.dr[0] += mystique->dwgreg.dr[2]; + mystique->dwgreg.dr[4] += mystique->dwgreg.dr[6]; + mystique->dwgreg.dr[8] += mystique->dwgreg.dr[10]; + mystique->dwgreg.dr[12] += mystique->dwgreg.dr[14]; + mystique->dwgreg.tmr[6] += mystique->dwgreg.tmr[0]; + mystique->dwgreg.tmr[7] += mystique->dwgreg.tmr[2]; + mystique->dwgreg.tmr[8] += mystique->dwgreg.tmr[4]; + } - mystique->dwgreg.dr[0] = z_back + mystique->dwgreg.dr[3]; - mystique->dwgreg.dr[4] = r_back + mystique->dwgreg.dr[7]; - mystique->dwgreg.dr[8] = g_back + mystique->dwgreg.dr[11]; - mystique->dwgreg.dr[12] = b_back + mystique->dwgreg.dr[15]; - mystique->dwgreg.tmr[6] = s_back + mystique->dwgreg.tmr[1]; - mystique->dwgreg.tmr[7] = t_back + mystique->dwgreg.tmr[3]; - mystique->dwgreg.tmr[8] = q_back + mystique->dwgreg.tmr[5]; + mystique->dwgreg.dr[0] = z_back + mystique->dwgreg.dr[3]; + mystique->dwgreg.dr[4] = r_back + mystique->dwgreg.dr[7]; + mystique->dwgreg.dr[8] = g_back + mystique->dwgreg.dr[11]; + mystique->dwgreg.dr[12] = b_back + mystique->dwgreg.dr[15]; + mystique->dwgreg.tmr[6] = s_back + mystique->dwgreg.tmr[1]; + mystique->dwgreg.tmr[7] = t_back + mystique->dwgreg.tmr[3]; + mystique->dwgreg.tmr[8] = q_back + mystique->dwgreg.tmr[5]; - while ((int32_t)mystique->dwgreg.ar[1] < 0 && mystique->dwgreg.ar[0]) { - mystique->dwgreg.ar[1] += mystique->dwgreg.ar[0]; - mystique->dwgreg.fxleft += (mystique->dwgreg.sgn.sdxl ? -1 : 1); - } - mystique->dwgreg.ar[1] += mystique->dwgreg.ar[2]; + while ((int32_t) mystique->dwgreg.ar[1] < 0 && mystique->dwgreg.ar[0]) { + mystique->dwgreg.ar[1] += mystique->dwgreg.ar[0]; + mystique->dwgreg.fxleft += (mystique->dwgreg.sgn.sdxl ? -1 : 1); + } + mystique->dwgreg.ar[1] += mystique->dwgreg.ar[2]; - while ((int32_t)mystique->dwgreg.ar[4] < 0 && mystique->dwgreg.ar[6]) { - mystique->dwgreg.ar[4] += mystique->dwgreg.ar[6]; - mystique->dwgreg.fxright += (mystique->dwgreg.sgn.sdxr ? -1 : 1); - } - mystique->dwgreg.ar[4] += mystique->dwgreg.ar[5]; + while ((int32_t) mystique->dwgreg.ar[4] < 0 && mystique->dwgreg.ar[6]) { + mystique->dwgreg.ar[4] += mystique->dwgreg.ar[6]; + mystique->dwgreg.fxright += (mystique->dwgreg.sgn.sdxr ? -1 : 1); + } + mystique->dwgreg.ar[4] += mystique->dwgreg.ar[5]; - dx = (int16_t)((mystique->dwgreg.fxleft - old_x_l) & 0xffff); - mystique->dwgreg.dr[0] += dx*mystique->dwgreg.dr[2]; - mystique->dwgreg.dr[4] += dx*mystique->dwgreg.dr[6]; - mystique->dwgreg.dr[8] += dx*mystique->dwgreg.dr[10]; - mystique->dwgreg.dr[12] += dx*mystique->dwgreg.dr[14]; - mystique->dwgreg.tmr[6] += dx*mystique->dwgreg.tmr[0]; - mystique->dwgreg.tmr[7] += dx*mystique->dwgreg.tmr[2]; - mystique->dwgreg.tmr[8] += dx*mystique->dwgreg.tmr[4]; + dx = (int16_t) ((mystique->dwgreg.fxleft - old_x_l) & 0xffff); + mystique->dwgreg.dr[0] += dx * mystique->dwgreg.dr[2]; + mystique->dwgreg.dr[4] += dx * mystique->dwgreg.dr[6]; + mystique->dwgreg.dr[8] += dx * mystique->dwgreg.dr[10]; + mystique->dwgreg.dr[12] += dx * mystique->dwgreg.dr[14]; + mystique->dwgreg.tmr[6] += dx * mystique->dwgreg.tmr[0]; + mystique->dwgreg.tmr[7] += dx * mystique->dwgreg.tmr[2]; + mystique->dwgreg.tmr[8] += dx * mystique->dwgreg.tmr[4]; - mystique->dwgreg.ydst++; - mystique->dwgreg.ydst &= 0x7fffff; - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + mystique->dwgreg.ydst++; + mystique->dwgreg.ydst &= 0x7fffff; + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); - mystique->dwgreg.selline = (mystique->dwgreg.selline + 1) & 7; - } - break; + mystique->dwgreg.selline = (mystique->dwgreg.selline + 1) & 7; + } + break; - default: - fatal("Unknown atype %03x %08x TEXTURE_TRAP\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); + default: + fatal("Unknown atype %03x %08x TEXTURE_TRAP\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); } mystique->blitter_complete_refcount++; } - static void blit_bitblt(mystique_t *mystique) { - svga_t *svga = &mystique->svga; - uint32_t src_addr; - int y; - int x_dir = mystique->dwgreg.sgn.scanleft ? -1 : 1; - int16_t x_start = mystique->dwgreg.sgn.scanleft ? mystique->dwgreg.fxright : mystique->dwgreg.fxleft; - int16_t x_end = mystique->dwgreg.sgn.scanleft ? mystique->dwgreg.fxleft : mystique->dwgreg.fxright; + svga_t *svga = &mystique->svga; + uint32_t src_addr; + int y; + int x_dir = mystique->dwgreg.sgn.scanleft ? -1 : 1; + int16_t x_start = mystique->dwgreg.sgn.scanleft ? mystique->dwgreg.fxright : mystique->dwgreg.fxleft; + int16_t x_end = mystique->dwgreg.sgn.scanleft ? mystique->dwgreg.fxleft : mystique->dwgreg.fxright; const int trans_sel = (mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANS_MASK) >> DWGCTRL_TRANS_SHIFT; switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) { - case DWGCTRL_ATYPE_BLK: - switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { - case DWGCTRL_BLTMOD_BMONOLEF: - src_addr = mystique->dwgreg.ar[3]; + case DWGCTRL_ATYPE_BLK: + switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { + case DWGCTRL_BLTMOD_BMONOLEF: + src_addr = mystique->dwgreg.ar[3]; - for (y = 0; y < mystique->dwgreg.length; y++) { - int16_t x = x_start; + for (y = 0; y < mystique->dwgreg.length; y++) { + int16_t x = x_start; - while (1) { - if (x >= mystique->dwgreg.cxleft && x <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { - uint32_t byte_addr = (src_addr >> 3) & mystique->vram_mask; - int bit_offset = src_addr & 7; - uint32_t old_dst; + while (1) { + if (x >= mystique->dwgreg.cxleft && x <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot) { + uint32_t byte_addr = (src_addr >> 3) & mystique->vram_mask; + int bit_offset = src_addr & 7; + uint32_t old_dst; - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_8: - if (mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANSC) { - if (svga->vram[byte_addr] & (1 << bit_offset)) - svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask] = mystique->dwgreg.fcol; - } else - svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask] = - (svga->vram[byte_addr] & (1 << bit_offset)) ? mystique->dwgreg.fcol : mystique->dwgreg.bcol; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask) >> 12] = changeframecount; - break; + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_8: + if (mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANSC) { + if (svga->vram[byte_addr] & (1 << bit_offset)) + svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask] = mystique->dwgreg.fcol; + } else + svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask] = (svga->vram[byte_addr] & (1 << bit_offset)) ? mystique->dwgreg.fcol : mystique->dwgreg.bcol; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_16: - if (mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANSC) { - if (svga->vram[byte_addr] & (1 << bit_offset)) - ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w] = mystique->dwgreg.fcol; - } else - ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w] = - (svga->vram[byte_addr] & (1 << bit_offset)) ? mystique->dwgreg.fcol : mystique->dwgreg.bcol; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w) >> 11] = changeframecount; - break; + case MACCESS_PWIDTH_16: + if (mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANSC) { + if (svga->vram[byte_addr] & (1 << bit_offset)) + ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w] = mystique->dwgreg.fcol; + } else + ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w] = (svga->vram[byte_addr] & (1 << bit_offset)) ? mystique->dwgreg.fcol : mystique->dwgreg.bcol; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w) >> 11] = changeframecount; + break; - case MACCESS_PWIDTH_24: - old_dst = *(uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask]; - if (mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANSC) { - if (svga->vram[byte_addr] & (1 << bit_offset)) - *(uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask] = - (old_dst & 0xff000000) | (mystique->dwgreg.fcol & 0xffffff); - } else - *(uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask] = - (old_dst & 0xff000000) | (((svga->vram[byte_addr] & (1 << bit_offset)) ? mystique->dwgreg.fcol : mystique->dwgreg.bcol) & 0xffffff); - svga->changedvram[(((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask) >> 12] = changeframecount; - break; + case MACCESS_PWIDTH_24: + old_dst = *(uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask]; + if (mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANSC) { + if (svga->vram[byte_addr] & (1 << bit_offset)) + *(uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask] = (old_dst & 0xff000000) | (mystique->dwgreg.fcol & 0xffffff); + } else + *(uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask] = (old_dst & 0xff000000) | (((svga->vram[byte_addr] & (1 << bit_offset)) ? mystique->dwgreg.fcol : mystique->dwgreg.bcol) & 0xffffff); + svga->changedvram[(((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_32: - if (mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANSC) { - if (svga->vram[byte_addr] & (1 << bit_offset)) - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l] = mystique->dwgreg.fcol; - } else - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l] = - (svga->vram[byte_addr] & (1 << bit_offset)) ? mystique->dwgreg.fcol : mystique->dwgreg.bcol; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l) >> 11] = changeframecount; - break; + case MACCESS_PWIDTH_32: + if (mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANSC) { + if (svga->vram[byte_addr] & (1 << bit_offset)) + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l] = mystique->dwgreg.fcol; + } else + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l] = (svga->vram[byte_addr] & (1 << bit_offset)) ? mystique->dwgreg.fcol : mystique->dwgreg.bcol; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l) >> 11] = changeframecount; + break; - default: - fatal("BITBLT DWGCTRL_ATYPE_BLK unknown MACCESS %i\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); - } - } + default: + fatal("BITBLT DWGCTRL_ATYPE_BLK unknown MACCESS %i\n", mystique->maccess_running & MACCESS_PWIDTH_MASK); + } + } - if (src_addr == mystique->dwgreg.ar[0]) { - mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; - mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; - src_addr = mystique->dwgreg.ar[3]; - } else - src_addr += x_dir; + if (src_addr == mystique->dwgreg.ar[0]) { + mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; + mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; + src_addr = mystique->dwgreg.ar[3]; + } else + src_addr += x_dir; - if (x != x_end) - x += x_dir; - else - break; - } + if (x != x_end) + x += x_dir; + else + break; + } - if (mystique->dwgreg.sgn.sdy) - mystique->dwgreg.ydst_lin -= (mystique->dwgreg.pitch & PITCH_MASK); - else - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); - } - break; + if (mystique->dwgreg.sgn.sdy) + mystique->dwgreg.ydst_lin -= (mystique->dwgreg.pitch & PITCH_MASK); + else + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + } + break; - default: - fatal("BITBLT BLK %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK); - break; - } - break; + default: + fatal("BITBLT BLK %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK); + break; + } + break; - case DWGCTRL_ATYPE_RPL: - if (mystique->maccess_running & MACCESS_TLUTLOAD) { - src_addr = mystique->dwgreg.ar[3]; + case DWGCTRL_ATYPE_RPL: + if (mystique->maccess_running & MACCESS_TLUTLOAD) { + src_addr = mystique->dwgreg.ar[3]; - y = mystique->dwgreg.ydst; + y = mystique->dwgreg.ydst; - while (mystique->dwgreg.length) { - uint16_t src = ((uint16_t *)svga->vram)[src_addr & mystique->vram_mask_w]; + while (mystique->dwgreg.length) { + uint16_t src = ((uint16_t *) svga->vram)[src_addr & mystique->vram_mask_w]; - mystique->lut[y & 0xff].r = (src >> 11) << 3; - mystique->lut[y & 0xff].g = ((src >> 5) & 0x3f) << 2; - mystique->lut[y & 0xff].b = (src & 0x1f) << 3; - src_addr++; - y++; - mystique->dwgreg.length--; - } - break; - } - case DWGCTRL_ATYPE_RSTR: - switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { - case DWGCTRL_BLTMOD_BMONOLEF: - if (mystique->dwgreg.dwgctrl_running & DWGCTRL_PATTERN) - fatal("BITBLT RPL/RSTR BMONOLEF with pattern\n"); + mystique->lut[y & 0xff].r = (src >> 11) << 3; + mystique->lut[y & 0xff].g = ((src >> 5) & 0x3f) << 2; + mystique->lut[y & 0xff].b = (src & 0x1f) << 3; + src_addr++; + y++; + mystique->dwgreg.length--; + } + break; + } + case DWGCTRL_ATYPE_RSTR: + switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { + case DWGCTRL_BLTMOD_BMONOLEF: + if (mystique->dwgreg.dwgctrl_running & DWGCTRL_PATTERN) + fatal("BITBLT RPL/RSTR BMONOLEF with pattern\n"); - src_addr = mystique->dwgreg.ar[3]; + src_addr = mystique->dwgreg.ar[3]; - for (y = 0; y < mystique->dwgreg.length; y++) { - uint8_t const * const trans = &trans_masks[trans_sel][(mystique->dwgreg.selline & 3) * 4]; - int16_t x = x_start; + for (y = 0; y < mystique->dwgreg.length; y++) { + uint8_t const *const trans = &trans_masks[trans_sel][(mystique->dwgreg.selline & 3) * 4]; + int16_t x = x_start; - while (1) { - uint32_t byte_addr = (src_addr >> 3) & mystique->vram_mask; - int bit_offset = src_addr & 7; + while (1) { + uint32_t byte_addr = (src_addr >> 3) & mystique->vram_mask; + int bit_offset = src_addr & 7; - if (x >= mystique->dwgreg.cxleft && x <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && - ((svga->vram[byte_addr] & (1 << bit_offset)) || !(mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANSC)) && - trans[x & 3]) { - uint32_t src = (svga->vram[byte_addr] & (1 << bit_offset)) ? mystique->dwgreg.fcol : mystique->dwgreg.bcol; - uint32_t dst, old_dst; + if (x >= mystique->dwgreg.cxleft && x <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && ((svga->vram[byte_addr] & (1 << bit_offset)) || !(mystique->dwgreg.dwgctrl_running & DWGCTRL_TRANSC)) && trans[x & 3]) { + uint32_t src = (svga->vram[byte_addr] & (1 << bit_offset)) ? mystique->dwgreg.fcol : mystique->dwgreg.bcol; + uint32_t dst, old_dst; - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_8: - dst = svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask]; + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_8: + dst = svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask]; - dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); + dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); - svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask) >> 12] = changeframecount; - break; + svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_16: - dst = ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w]; + case MACCESS_PWIDTH_16: + dst = ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w]; - dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); + dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); - ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w) >> 11] = changeframecount; - break; + ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w) >> 11] = changeframecount; + break; - case MACCESS_PWIDTH_24: - old_dst = *(uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask]; + case MACCESS_PWIDTH_24: + old_dst = *(uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask]; - dst = bitop(src, old_dst, mystique->dwgreg.dwgctrl_running);// & DWGCTRL_BOP_MASK + dst = bitop(src, old_dst, mystique->dwgreg.dwgctrl_running); // & DWGCTRL_BOP_MASK - *(uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask] = (dst & 0xffffff) | (old_dst & 0xff000000); - svga->changedvram[(((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask) >> 12] = changeframecount; - break; + *(uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask] = (dst & 0xffffff) | (old_dst & 0xff000000); + svga->changedvram[(((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_32: - dst = ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l]; + case MACCESS_PWIDTH_32: + dst = ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l]; - dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); + dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l) >> 10] = changeframecount; - break; + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l) >> 10] = changeframecount; + break; - default: - fatal("BITBLT RPL BMONOLEF PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); - } - } + default: + fatal("BITBLT RPL BMONOLEF PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); + } + } - if (src_addr == mystique->dwgreg.ar[0]) { - mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; - mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; - src_addr = mystique->dwgreg.ar[3]; - } else - src_addr += x_dir; + if (src_addr == mystique->dwgreg.ar[0]) { + mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; + mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; + src_addr = mystique->dwgreg.ar[3]; + } else + src_addr += x_dir; - if (x != x_end) - x += x_dir; - else - break; - } + if (x != x_end) + x += x_dir; + else + break; + } - if (mystique->dwgreg.sgn.sdy) - mystique->dwgreg.ydst_lin -= (mystique->dwgreg.pitch & PITCH_MASK); - else - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); - } - break; + if (mystique->dwgreg.sgn.sdy) + mystique->dwgreg.ydst_lin -= (mystique->dwgreg.pitch & PITCH_MASK); + else + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + } + break; - case DWGCTRL_BLTMOD_BFCOL: - case DWGCTRL_BLTMOD_BU32RGB: - src_addr = mystique->dwgreg.ar[3]; + case DWGCTRL_BLTMOD_BFCOL: + case DWGCTRL_BLTMOD_BU32RGB: + src_addr = mystique->dwgreg.ar[3]; - for (y = 0; y < mystique->dwgreg.length; y++) { - uint8_t const * const trans = &trans_masks[trans_sel][(mystique->dwgreg.selline & 3) * 4]; - uint32_t old_src_addr = src_addr; - int16_t x = x_start; + for (y = 0; y < mystique->dwgreg.length; y++) { + uint8_t const *const trans = &trans_masks[trans_sel][(mystique->dwgreg.selline & 3) * 4]; + uint32_t old_src_addr = src_addr; + int16_t x = x_start; - while (1) { - if (x >= mystique->dwgreg.cxleft && x <= mystique->dwgreg.cxright && - mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && - trans[x & 3]) { - uint32_t src, dst, old_dst; + while (1) { + if (x >= mystique->dwgreg.cxleft && x <= mystique->dwgreg.cxright && mystique->dwgreg.ydst_lin >= mystique->dwgreg.ytop && mystique->dwgreg.ydst_lin <= mystique->dwgreg.ybot && trans[x & 3]) { + uint32_t src, dst, old_dst; - switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { - case MACCESS_PWIDTH_8: - src = svga->vram[src_addr & mystique->vram_mask]; - dst = svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask]; + switch (mystique->maccess_running & MACCESS_PWIDTH_MASK) { + case MACCESS_PWIDTH_8: + src = svga->vram[src_addr & mystique->vram_mask]; + dst = svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask]; - dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); + dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); - svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask) >> 12] = changeframecount; - break; + svga->vram[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_16: - src = ((uint16_t *)svga->vram)[src_addr & mystique->vram_mask_w]; - dst = ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w]; + case MACCESS_PWIDTH_16: + src = ((uint16_t *) svga->vram)[src_addr & mystique->vram_mask_w]; + dst = ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w]; - dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); + dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); - ((uint16_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w) >> 11] = changeframecount; - break; + ((uint16_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_w) >> 11] = changeframecount; + break; - case MACCESS_PWIDTH_24: - src = *(uint32_t *)&svga->vram[(src_addr * 3) & mystique->vram_mask]; - old_dst = *(uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask]; + case MACCESS_PWIDTH_24: + src = *(uint32_t *) &svga->vram[(src_addr * 3) & mystique->vram_mask]; + old_dst = *(uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask]; - dst = bitop(src, old_dst, mystique->dwgreg.dwgctrl_running); + dst = bitop(src, old_dst, mystique->dwgreg.dwgctrl_running); - *(uint32_t *)&svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask] = (dst & 0xffffff) | (old_dst & 0xff000000); - svga->changedvram[(((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask) >> 12] = changeframecount; - break; + *(uint32_t *) &svga->vram[((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask] = (dst & 0xffffff) | (old_dst & 0xff000000); + svga->changedvram[(((mystique->dwgreg.ydst_lin + x) * 3) & mystique->vram_mask) >> 12] = changeframecount; + break; - case MACCESS_PWIDTH_32: - src = ((uint32_t *)svga->vram)[src_addr & mystique->vram_mask_l]; - dst = ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l]; + case MACCESS_PWIDTH_32: + src = ((uint32_t *) svga->vram)[src_addr & mystique->vram_mask_l]; + dst = ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l]; - dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); + dst = bitop(src, dst, mystique->dwgreg.dwgctrl_running); - ((uint32_t *)svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l] = dst; - svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l) >> 10] = changeframecount; - break; + ((uint32_t *) svga->vram)[(mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l] = dst; + svga->changedvram[((mystique->dwgreg.ydst_lin + x) & mystique->vram_mask_l) >> 10] = changeframecount; + break; - default: - fatal("BITBLT RPL BFCOL PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); - } - } + default: + fatal("BITBLT RPL BFCOL PWIDTH %x %08x\n", mystique->maccess_running & MACCESS_PWIDTH_MASK, mystique->dwgreg.dwgctrl_running); + } + } - if (mystique->dwgreg.dwgctrl_running & DWGCTRL_PATTERN) - src_addr = ((src_addr + x_dir) & 7) | (src_addr & ~7); - else if (src_addr == mystique->dwgreg.ar[0]) { - mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; - mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; - src_addr = mystique->dwgreg.ar[3]; - } else - src_addr += x_dir; + if (mystique->dwgreg.dwgctrl_running & DWGCTRL_PATTERN) + src_addr = ((src_addr + x_dir) & 7) | (src_addr & ~7); + else if (src_addr == mystique->dwgreg.ar[0]) { + mystique->dwgreg.ar[0] += mystique->dwgreg.ar[5]; + mystique->dwgreg.ar[3] += mystique->dwgreg.ar[5]; + src_addr = mystique->dwgreg.ar[3]; + } else + src_addr += x_dir; - if (x != x_end) - x += x_dir; - else - break; - } + if (x != x_end) + x += x_dir; + else + break; + } - if (mystique->dwgreg.dwgctrl_running & DWGCTRL_PATTERN) { - src_addr = old_src_addr; - if (mystique->dwgreg.sgn.sdy) - src_addr = ((src_addr - 32) & 0xe0) | (src_addr & ~0xe0); - else - src_addr = ((src_addr + 32) & 0xe0) | (src_addr & ~0xe0); - } + if (mystique->dwgreg.dwgctrl_running & DWGCTRL_PATTERN) { + src_addr = old_src_addr; + if (mystique->dwgreg.sgn.sdy) + src_addr = ((src_addr - 32) & 0xe0) | (src_addr & ~0xe0); + else + src_addr = ((src_addr + 32) & 0xe0) | (src_addr & ~0xe0); + } - if (mystique->dwgreg.sgn.sdy) - mystique->dwgreg.ydst_lin -= (mystique->dwgreg.pitch & PITCH_MASK); - else - mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); - } - break; + if (mystique->dwgreg.sgn.sdy) + mystique->dwgreg.ydst_lin -= (mystique->dwgreg.pitch & PITCH_MASK); + else + mystique->dwgreg.ydst_lin += (mystique->dwgreg.pitch & PITCH_MASK); + } + break; - default: - fatal("BITBLT DWGCTRL_ATYPE_RPL unknown BLTMOD %08x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK, mystique->dwgreg.dwgctrl_running); - } - break; + default: + fatal("BITBLT DWGCTRL_ATYPE_RPL unknown BLTMOD %08x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK, mystique->dwgreg.dwgctrl_running); + } + break; - default: - /* pclog("Unknown BITBLT atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); */ - break; + default: + /* pclog("Unknown BITBLT atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); */ + break; } mystique->blitter_complete_refcount++; } - static void blit_iload(mystique_t *mystique) { switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) { - case DWGCTRL_ATYPE_RPL: - case DWGCTRL_ATYPE_RSTR: - case DWGCTRL_ATYPE_BLK: - /* pclog("ILOAD BLTMOD DWGCTRL = %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK); */ - switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { - case DWGCTRL_BLTMOD_BFCOL: - case DWGCTRL_BLTMOD_BMONOLEF: - case DWGCTRL_BLTMOD_BMONOWF: - case DWGCTRL_BLTMOD_BU24RGB: - case DWGCTRL_BLTMOD_BU32RGB: - mystique->dwgreg.length_cur = mystique->dwgreg.length; - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.iload_rem_data = 0; - mystique->dwgreg.iload_rem_count = 0; - mystique->busy = 1; - /* pclog("ILOAD busy\n"); */ - mystique->dwgreg.words = 0; - break; + case DWGCTRL_ATYPE_RPL: + case DWGCTRL_ATYPE_RSTR: + case DWGCTRL_ATYPE_BLK: + /* pclog("ILOAD BLTMOD DWGCTRL = %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK); */ + switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { + case DWGCTRL_BLTMOD_BFCOL: + case DWGCTRL_BLTMOD_BMONOLEF: + case DWGCTRL_BLTMOD_BMONOWF: + case DWGCTRL_BLTMOD_BU24RGB: + case DWGCTRL_BLTMOD_BU32RGB: + mystique->dwgreg.length_cur = mystique->dwgreg.length; + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.iload_rem_data = 0; + mystique->dwgreg.iload_rem_count = 0; + mystique->busy = 1; + /* pclog("ILOAD busy\n"); */ + mystique->dwgreg.words = 0; + break; - default: - fatal("ILOAD DWGCTRL_ATYPE_RPL %08x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK, mystique->dwgreg.dwgctrl_running); - break; - } - break; + default: + fatal("ILOAD DWGCTRL_ATYPE_RPL %08x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK, mystique->dwgreg.dwgctrl_running); + break; + } + break; - default: - fatal("Unknown ILOAD atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); + default: + fatal("Unknown ILOAD atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); } } - static void blit_idump(mystique_t *mystique) { switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) { - case DWGCTRL_ATYPE_RPL: - mystique->dwgreg.length_cur = mystique->dwgreg.length; - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.src_addr = mystique->dwgreg.ar[3]; - mystique->dwgreg.words = 0; - mystique->dwgreg.iload_rem_count = 0; - mystique->dwgreg.iload_rem_data = 0; - mystique->dwgreg.idump_end_of_line = 0; - mystique->busy = 1; - /* pclog("IDUMP ATYPE RPL busy\n"); */ - break; + case DWGCTRL_ATYPE_RPL: + mystique->dwgreg.length_cur = mystique->dwgreg.length; + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.src_addr = mystique->dwgreg.ar[3]; + mystique->dwgreg.words = 0; + mystique->dwgreg.iload_rem_count = 0; + mystique->dwgreg.iload_rem_data = 0; + mystique->dwgreg.idump_end_of_line = 0; + mystique->busy = 1; + /* pclog("IDUMP ATYPE RPL busy\n"); */ + break; - default: - fatal("Unknown IDUMP atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); + default: + fatal("Unknown IDUMP atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); } } - static void blit_iload_scale(mystique_t *mystique) { switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) { - case DWGCTRL_ATYPE_RPL: - switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { - case DWGCTRL_BLTMOD_BUYUV: - mystique->dwgreg.length_cur = mystique->dwgreg.length; - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.iload_rem_data = 0; - mystique->dwgreg.iload_rem_count = 0; - mystique->busy = 1; - mystique->dwgreg.words = 0; - /* pclog("ILOAD SCALE ATYPE RPL BLTMOD BUYUV busy\n"); */ - break; + case DWGCTRL_ATYPE_RPL: + switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { + case DWGCTRL_BLTMOD_BUYUV: + mystique->dwgreg.length_cur = mystique->dwgreg.length; + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.iload_rem_data = 0; + mystique->dwgreg.iload_rem_count = 0; + mystique->busy = 1; + mystique->dwgreg.words = 0; + /* pclog("ILOAD SCALE ATYPE RPL BLTMOD BUYUV busy\n"); */ + break; - default: - fatal("ILOAD_SCALE DWGCTRL_ATYPE_RPL %08x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK, mystique->dwgreg.dwgctrl_running); - break; - } - break; + default: + fatal("ILOAD_SCALE DWGCTRL_ATYPE_RPL %08x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK, mystique->dwgreg.dwgctrl_running); + break; + } + break; - default: - fatal("Unknown ILOAD_SCALE atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); + default: + fatal("Unknown ILOAD_SCALE atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); } } - static void blit_iload_high(mystique_t *mystique) { switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) { - case DWGCTRL_ATYPE_RPL: - switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { - case DWGCTRL_BLTMOD_BUYUV: - case DWGCTRL_BLTMOD_BU32BGR: - mystique->dwgreg.length_cur = mystique->dwgreg.length; - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.iload_rem_data = 0; - mystique->dwgreg.iload_rem_count = 0; - mystique->busy = 1; - mystique->dwgreg.words = 0; - /* pclog("ILOAD HIGH ATYPE RPL BLTMOD BUYUV busy\n"); */ - break; + case DWGCTRL_ATYPE_RPL: + switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { + case DWGCTRL_BLTMOD_BUYUV: + case DWGCTRL_BLTMOD_BU32BGR: + mystique->dwgreg.length_cur = mystique->dwgreg.length; + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.iload_rem_data = 0; + mystique->dwgreg.iload_rem_count = 0; + mystique->busy = 1; + mystique->dwgreg.words = 0; + /* pclog("ILOAD HIGH ATYPE RPL BLTMOD BUYUV busy\n"); */ + break; - default: - fatal("ILOAD_HIGH DWGCTRL_ATYPE_RPL %08x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK, mystique->dwgreg.dwgctrl_running); - break; - } - break; + default: + fatal("ILOAD_HIGH DWGCTRL_ATYPE_RPL %08x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK, mystique->dwgreg.dwgctrl_running); + break; + } + break; - default: - fatal("Unknown ILOAD_HIGH atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); + default: + fatal("Unknown ILOAD_HIGH atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); } } - -static -void blit_iload_highv(mystique_t *mystique) +static void +blit_iload_highv(mystique_t *mystique) { switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK) { - case DWGCTRL_ATYPE_RPL: - switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { - case DWGCTRL_BLTMOD_BUYUV: - mystique->dwgreg.length_cur = mystique->dwgreg.length; - mystique->dwgreg.xdst = mystique->dwgreg.fxleft; - mystique->dwgreg.iload_rem_data = 0; - mystique->dwgreg.iload_rem_count = 0; - mystique->busy = 1; - mystique->dwgreg.words = 0; - mystique->dwgreg.highv_line = 0; - mystique->dwgreg.lastpix_r = 0; - mystique->dwgreg.lastpix_g = 0; - mystique->dwgreg.lastpix_b = 0; - /* pclog("ILOAD HIGHV ATYPE RPL BLTMOD BUYUV busy\n"); */ - break; + case DWGCTRL_ATYPE_RPL: + switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK) { + case DWGCTRL_BLTMOD_BUYUV: + mystique->dwgreg.length_cur = mystique->dwgreg.length; + mystique->dwgreg.xdst = mystique->dwgreg.fxleft; + mystique->dwgreg.iload_rem_data = 0; + mystique->dwgreg.iload_rem_count = 0; + mystique->busy = 1; + mystique->dwgreg.words = 0; + mystique->dwgreg.highv_line = 0; + mystique->dwgreg.lastpix_r = 0; + mystique->dwgreg.lastpix_g = 0; + mystique->dwgreg.lastpix_b = 0; + /* pclog("ILOAD HIGHV ATYPE RPL BLTMOD BUYUV busy\n"); */ + break; - default: - fatal("ILOAD_HIGHV DWGCTRL_ATYPE_RPL %08x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK, mystique->dwgreg.dwgctrl_running); - break; - } - break; + default: + fatal("ILOAD_HIGHV DWGCTRL_ATYPE_RPL %08x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_BLTMOD_MASK, mystique->dwgreg.dwgctrl_running); + break; + } + break; - default: - fatal("Unknown ILOAD_HIGHV atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); + default: + fatal("Unknown ILOAD_HIGHV atype %03x %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_ATYPE_MASK, mystique->dwgreg.dwgctrl_running); } } - static void mystique_start_blit(mystique_t *mystique) { @@ -4867,177 +5000,253 @@ mystique_start_blit(mystique_t *mystique) uint64_t end_time; mystique->dwgreg.dwgctrl_running = mystique->dwgreg.dwgctrl; - mystique->maccess_running = mystique->maccess; + mystique->maccess_running = mystique->maccess; switch (mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK) { - case DWGCTRL_OPCODE_LINE_OPEN: - blit_line(mystique, 0); - break; + case DWGCTRL_OPCODE_LINE_OPEN: + blit_line(mystique, 0); + break; - case DWGCTRL_OPCODE_AUTOLINE_OPEN: - blit_autoline(mystique, 0); - break; + case DWGCTRL_OPCODE_AUTOLINE_OPEN: + blit_autoline(mystique, 0); + break; - case DWGCTRL_OPCODE_LINE_CLOSE: - blit_line(mystique, 1); - break; + case DWGCTRL_OPCODE_LINE_CLOSE: + blit_line(mystique, 1); + break; - case DWGCTRL_OPCODE_AUTOLINE_CLOSE: - blit_autoline(mystique, 1); - break; + case DWGCTRL_OPCODE_AUTOLINE_CLOSE: + blit_autoline(mystique, 1); + break; - case DWGCTRL_OPCODE_TRAP: - blit_trap(mystique); - break; + case DWGCTRL_OPCODE_TRAP: + blit_trap(mystique); + break; - case DWGCTRL_OPCODE_TEXTURE_TRAP: - blit_texture_trap(mystique); - break; + case DWGCTRL_OPCODE_TEXTURE_TRAP: + blit_texture_trap(mystique); + break; - case DWGCTRL_OPCODE_ILOAD_HIGH: - blit_iload_high(mystique); - break; + case DWGCTRL_OPCODE_ILOAD_HIGH: + blit_iload_high(mystique); + break; - case DWGCTRL_OPCODE_BITBLT: - blit_bitblt(mystique); - break; + case DWGCTRL_OPCODE_BITBLT: + blit_bitblt(mystique); + break; - case DWGCTRL_OPCODE_FBITBLT: - blit_fbitblt(mystique); - break; + case DWGCTRL_OPCODE_FBITBLT: + blit_fbitblt(mystique); + break; - case DWGCTRL_OPCODE_ILOAD: - blit_iload(mystique); - break; + case DWGCTRL_OPCODE_ILOAD: + blit_iload(mystique); + break; - case DWGCTRL_OPCODE_IDUMP: - blit_idump(mystique); - break; + case DWGCTRL_OPCODE_IDUMP: + blit_idump(mystique); + break; - case DWGCTRL_OPCODE_ILOAD_SCALE: - blit_iload_scale(mystique); - break; + case DWGCTRL_OPCODE_ILOAD_SCALE: + blit_iload_scale(mystique); + break; - case DWGCTRL_OPCODE_ILOAD_HIGHV: - blit_iload_highv(mystique); - break; + case DWGCTRL_OPCODE_ILOAD_HIGHV: + blit_iload_highv(mystique); + break; - case DWGCTRL_OPCODE_ILOAD_FILTER: - /* TODO: Actually implement this. */ - break; + case DWGCTRL_OPCODE_ILOAD_FILTER: + /* TODO: Actually implement this. */ + break; - default: - fatal("mystique_start_blit: unknown blit %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK); - break; + default: + fatal("mystique_start_blit: unknown blit %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK); + break; } end_time = plat_timer_read(); mystique->blitter_time += end_time - start_time; } - static void mystique_hwcursor_draw(svga_t *svga, int displine) { - mystique_t *mystique = (mystique_t *)svga->p; - int x; - uint64_t dat[2]; - int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff; + mystique_t *mystique = (mystique_t *) svga->p; + int x; + uint64_t dat[2]; + int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff; if (svga->interlace && svga->hwcursor_oddeven) - svga->hwcursor_latch.addr += 16; + svga->hwcursor_latch.addr += 16; - dat[0] = *(uint64_t *)(&svga->vram[svga->hwcursor_latch.addr]); - dat[1] = *(uint64_t *)(&svga->vram[svga->hwcursor_latch.addr + 8]); + dat[0] = *(uint64_t *) (&svga->vram[svga->hwcursor_latch.addr]); + dat[1] = *(uint64_t *) (&svga->vram[svga->hwcursor_latch.addr + 8]); svga->hwcursor_latch.addr += 16; switch (mystique->xcurctrl & XCURCTRL_CURMODE_MASK) { - case XCURCTRL_CURMODE_XGA: - for (x = 0; x < 64; x ++) { - if (!(dat[1] & (1ull << 63))) - buffer32->line[displine][offset + svga->x_add] = (dat[0] & (1ull << 63)) ? mystique->cursor.col[1] : mystique->cursor.col[0]; - else if (dat[0] & (1ull << 63)) - buffer32->line[displine][offset + svga->x_add] ^= 0xffffff; + case XCURCTRL_CURMODE_XGA: + for (x = 0; x < 64; x++) { + if (!(dat[1] & (1ull << 63))) + buffer32->line[displine][offset + svga->x_add] = (dat[0] & (1ull << 63)) ? mystique->cursor.col[1] : mystique->cursor.col[0]; + else if (dat[0] & (1ull << 63)) + buffer32->line[displine][offset + svga->x_add] ^= 0xffffff; - offset++; - dat[0] <<= 1; - dat[1] <<= 1; - } - break; + offset++; + dat[0] <<= 1; + dat[1] <<= 1; + } + break; } if (svga->interlace && !svga->hwcursor_oddeven) - svga->hwcursor_latch.addr += 16; + svga->hwcursor_latch.addr += 16; } - -static -uint8_t mystique_pci_read(int func, int addr, void *p) +static uint8_t +mystique_pci_read(int func, int addr, void *p) { - mystique_t *mystique = (mystique_t *)p; - uint8_t ret = 0x00; + mystique_t *mystique = (mystique_t *) p; + uint8_t ret = 0x00; if ((addr >= 0x30) && (addr <= 0x33) && !(mystique->pci_regs[0x43] & 0x40)) - ret = 0x00; - else switch (addr) { - case 0x00: ret = 0x2b; break; /*Matrox*/ - case 0x01: ret = 0x10; break; + ret = 0x00; + else + switch (addr) { + case 0x00: + ret = 0x2b; + break; /*Matrox*/ + case 0x01: + ret = 0x10; + break; - case 0x02: ret = (mystique->type == MGA_2064W) ? 0x19 : 0x1a; break; /*MGA*/ - case 0x03: ret = 0x05; break; + case 0x02: + ret = (mystique->type == MGA_2064W) ? 0x19 : 0x1a; + break; /*MGA*/ + case 0x03: + ret = 0x05; + break; - case PCI_REG_COMMAND: - ret = mystique->pci_regs[PCI_REG_COMMAND] | 0x80; break; /*Respond to IO and memory accesses*/ - case 0x05: - ret = 0x00; break; + case PCI_REG_COMMAND: + ret = mystique->pci_regs[PCI_REG_COMMAND] | 0x80; + break; /*Respond to IO and memory accesses*/ + case 0x05: + ret = 0x00; + break; - case 0x06: ret = 0x80; break; - case 0x07: ret = mystique->pci_regs[0x07]; break; /*Fast DEVSEL timing*/ + case 0x06: + ret = 0x80; + break; + case 0x07: + ret = mystique->pci_regs[0x07]; + break; /*Fast DEVSEL timing*/ - case 0x08: ret = 0; break; /*Revision ID*/ - case 0x09: ret = 0; break; /*Programming interface*/ + case 0x08: + ret = 0; + break; /*Revision ID*/ + case 0x09: + ret = 0; + break; /*Programming interface*/ - case 0x0a: ret = 0x00; break; /*Supports VGA interface*/ - case 0x0b: ret = 0x03; break; + case 0x0a: + ret = 0x00; + break; /*Supports VGA interface*/ + case 0x0b: + ret = 0x03; + break; - case 0x10: ret = 0x00; break; /*Control aperture*/ - case 0x11: ret = (mystique->ctrl_base >> 8) & 0xc0; break; - case 0x12: ret = mystique->ctrl_base >> 16; break; - case 0x13: ret = mystique->ctrl_base >> 24; break; + case 0x10: + ret = 0x00; + break; /*Control aperture*/ + case 0x11: + ret = (mystique->ctrl_base >> 8) & 0xc0; + break; + case 0x12: + ret = mystique->ctrl_base >> 16; + break; + case 0x13: + ret = mystique->ctrl_base >> 24; + break; - case 0x14: ret = 0x00; break; /*Linear frame buffer*/ - case 0x16: ret = (mystique->lfb_base >> 16) & 0x80; break; - case 0x17: ret = mystique->lfb_base >> 24; break; + case 0x14: + ret = 0x00; + break; /*Linear frame buffer*/ + case 0x16: + ret = (mystique->lfb_base >> 16) & 0x80; + break; + case 0x17: + ret = mystique->lfb_base >> 24; + break; - case 0x18: ret = 0x00; break; /*Pseudo-DMA (ILOAD)*/ - case 0x1a: ret = (mystique->iload_base >> 16) & 0x80; break; - case 0x1b: ret = mystique->iload_base >> 24; break; + case 0x18: + ret = 0x00; + break; /*Pseudo-DMA (ILOAD)*/ + case 0x1a: + ret = (mystique->iload_base >> 16) & 0x80; + break; + case 0x1b: + ret = mystique->iload_base >> 24; + break; - case 0x2c: ret = mystique->pci_regs[0x2c]; break; - case 0x2d: ret = mystique->pci_regs[0x2d]; break; - case 0x2e: ret = mystique->pci_regs[0x2e]; break; - case 0x2f: ret = mystique->pci_regs[0x2f]; break; + case 0x2c: + ret = mystique->pci_regs[0x2c]; + break; + case 0x2d: + ret = mystique->pci_regs[0x2d]; + break; + case 0x2e: + ret = mystique->pci_regs[0x2e]; + break; + case 0x2f: + ret = mystique->pci_regs[0x2f]; + break; - case 0x30: ret = mystique->pci_regs[0x30] & 0x01; break; /*BIOS ROM address*/ - case 0x31: ret = 0x00; break; - case 0x32: ret = mystique->pci_regs[0x32]; break; - case 0x33: ret = mystique->pci_regs[0x33]; break; + case 0x30: + ret = mystique->pci_regs[0x30] & 0x01; + break; /*BIOS ROM address*/ + case 0x31: + ret = 0x00; + break; + case 0x32: + ret = mystique->pci_regs[0x32]; + break; + case 0x33: + ret = mystique->pci_regs[0x33]; + break; - case 0x3c: ret = mystique->int_line; break; - case 0x3d: ret = PCI_INTA; break; + case 0x3c: + ret = mystique->int_line; + break; + case 0x3d: + ret = PCI_INTA; + break; - case 0x40: ret = mystique->pci_regs[0x40]; break; - case 0x41: ret = mystique->pci_regs[0x41]; break; - case 0x42: ret = mystique->pci_regs[0x42]; break; - case 0x43: ret = mystique->pci_regs[0x43]; break; + case 0x40: + ret = mystique->pci_regs[0x40]; + break; + case 0x41: + ret = mystique->pci_regs[0x41]; + break; + case 0x42: + ret = mystique->pci_regs[0x42]; + break; + case 0x43: + ret = mystique->pci_regs[0x43]; + break; - case 0x44: ret = mystique->pci_regs[0x44]; break; - case 0x45: ret = mystique->pci_regs[0x45]; break; + case 0x44: + ret = mystique->pci_regs[0x44]; + break; + case 0x45: + ret = mystique->pci_regs[0x45]; + break; - case 0x48: case 0x49: case 0x4a: case 0x4b: - addr = (mystique->pci_regs[0x44] & 0xfc) | ((mystique->pci_regs[0x45] & 0x3f) << 8) | - (addr & 3); - ret = mystique_ctrl_read_b(addr, mystique); break; - } + case 0x48: + case 0x49: + case 0x4a: + case 0x4b: + addr = (mystique->pci_regs[0x44] & 0xfc) | ((mystique->pci_regs[0x45] & 0x3f) << 8) | (addr & 3); + ret = mystique_ctrl_read_b(addr, mystique); + break; + } return ret; } @@ -5045,183 +5254,188 @@ uint8_t mystique_pci_read(int func, int addr, void *p) static void mystique_pci_write(int func, int addr, uint8_t val, void *p) { - mystique_t *mystique = (mystique_t *)p; + mystique_t *mystique = (mystique_t *) p; switch (addr) { - case PCI_REG_COMMAND: - mystique->pci_regs[PCI_REG_COMMAND] = (val & 0x27) | 0x80; - mystique_recalc_mapping(mystique); - break; + case PCI_REG_COMMAND: + mystique->pci_regs[PCI_REG_COMMAND] = (val & 0x27) | 0x80; + mystique_recalc_mapping(mystique); + break; - case 0x07: - mystique->pci_regs[0x07] &= ~(val & 0x38); - break; + case 0x07: + mystique->pci_regs[0x07] &= ~(val & 0x38); + break; - case 0x0d: - mystique->pci_regs[0x0d] = val; - break; + case 0x0d: + mystique->pci_regs[0x0d] = val; + break; - case 0x11: - mystique->ctrl_base = (mystique->ctrl_base & 0xffff0000) | ((val & 0xc0) << 8); - mystique_recalc_mapping(mystique); - break; - case 0x12: - mystique->ctrl_base = (mystique->ctrl_base & 0xff00c000) | (val << 16); - mystique_recalc_mapping(mystique); - break; - case 0x13: - mystique->ctrl_base = (mystique->ctrl_base & 0x00ffc000) | (val << 24); - mystique_recalc_mapping(mystique); - break; + case 0x11: + mystique->ctrl_base = (mystique->ctrl_base & 0xffff0000) | ((val & 0xc0) << 8); + mystique_recalc_mapping(mystique); + break; + case 0x12: + mystique->ctrl_base = (mystique->ctrl_base & 0xff00c000) | (val << 16); + mystique_recalc_mapping(mystique); + break; + case 0x13: + mystique->ctrl_base = (mystique->ctrl_base & 0x00ffc000) | (val << 24); + mystique_recalc_mapping(mystique); + break; - case 0x16: - mystique->lfb_base = (mystique->lfb_base & 0xff000000) | ((val & 0x80) << 16); - mystique_recalc_mapping(mystique); - break; - case 0x17: - mystique->lfb_base = (mystique->lfb_base & 0x00800000) | (val << 24); - mystique_recalc_mapping(mystique); - break; + case 0x16: + mystique->lfb_base = (mystique->lfb_base & 0xff000000) | ((val & 0x80) << 16); + mystique_recalc_mapping(mystique); + break; + case 0x17: + mystique->lfb_base = (mystique->lfb_base & 0x00800000) | (val << 24); + mystique_recalc_mapping(mystique); + break; - case 0x1a: - mystique->iload_base = (mystique->iload_base & 0xff000000) | ((val & 0x80) << 16); - mystique_recalc_mapping(mystique); - break; - case 0x1b: - mystique->iload_base = (mystique->iload_base & 0x00800000) | (val << 24); - mystique_recalc_mapping(mystique); - break; + case 0x1a: + mystique->iload_base = (mystique->iload_base & 0xff000000) | ((val & 0x80) << 16); + mystique_recalc_mapping(mystique); + break; + case 0x1b: + mystique->iload_base = (mystique->iload_base & 0x00800000) | (val << 24); + mystique_recalc_mapping(mystique); + break; - case 0x30: case 0x32: case 0x33: - if (!(mystique->pci_regs[0x43] & 0x40)) - return; - mystique->pci_regs[addr] = val; - if (mystique->pci_regs[0x30] & 0x01) { - uint32_t addr = (mystique->pci_regs[0x32] << 16) | (mystique->pci_regs[0x33] << 24); - mem_mapping_set_addr(&mystique->bios_rom.mapping, addr, 0x8000); + case 0x30: + case 0x32: + case 0x33: + if (!(mystique->pci_regs[0x43] & 0x40)) + return; + mystique->pci_regs[addr] = val; + if (mystique->pci_regs[0x30] & 0x01) { + uint32_t addr = (mystique->pci_regs[0x32] << 16) | (mystique->pci_regs[0x33] << 24); + mem_mapping_set_addr(&mystique->bios_rom.mapping, addr, 0x8000); + } else + mem_mapping_disable(&mystique->bios_rom.mapping); + return; + + case 0x3c: + mystique->int_line = val; + return; + + case 0x40: + mystique->pci_regs[addr] = val & 0x3f; + break; + case 0x41: + mystique->pci_regs[addr] = val; + break; + case 0x42: + mystique->pci_regs[addr] = val & 0x1f; + break; + case 0x43: + mystique->pci_regs[addr] = val; + if (addr == 0x43) { + if (val & 0x40) { + if (mystique->pci_regs[0x30] & 0x01) { + uint32_t addr = (mystique->pci_regs[0x32] << 16) | (mystique->pci_regs[0x33] << 24); + mem_mapping_set_addr(&mystique->bios_rom.mapping, addr, 0x8000); + } else + mem_mapping_disable(&mystique->bios_rom.mapping); } else - mem_mapping_disable(&mystique->bios_rom.mapping); - return; + mem_mapping_set_addr(&mystique->bios_rom.mapping, 0x000c0000, 0x8000); + } + break; - case 0x3c: - mystique->int_line = val; - return; + case 0x4c: + case 0x4d: + case 0x4e: + case 0x4f: + mystique->pci_regs[addr - 0x20] = val; + break; - case 0x40: - mystique->pci_regs[addr] = val & 0x3f; - break; - case 0x41: - mystique->pci_regs[addr] = val; - break; - case 0x42: - mystique->pci_regs[addr] = val & 0x1f; - break; - case 0x43: - mystique->pci_regs[addr] = val; - if (addr == 0x43) { - if (val & 0x40) { - if (mystique->pci_regs[0x30] & 0x01) { - uint32_t addr = (mystique->pci_regs[0x32] << 16) | (mystique->pci_regs[0x33] << 24); - mem_mapping_set_addr(&mystique->bios_rom.mapping, addr, 0x8000); - } else - mem_mapping_disable(&mystique->bios_rom.mapping); - } else - mem_mapping_set_addr(&mystique->bios_rom.mapping, 0x000c0000, 0x8000); - } - break; + case 0x44: + mystique->pci_regs[addr] = val & 0xfc; + break; + case 0x45: + mystique->pci_regs[addr] = val & 0x3f; + break; - case 0x4c: case 0x4d: case 0x4e: case 0x4f: - mystique->pci_regs[addr - 0x20] = val; - break; - - case 0x44: - mystique->pci_regs[addr] = val & 0xfc; - break; - case 0x45: - mystique->pci_regs[addr] = val & 0x3f; - break; - - case 0x48: case 0x49: case 0x4a: case 0x4b: - addr = (mystique->pci_regs[0x44] & 0xfc) | ((mystique->pci_regs[0x45] & 0x3f) << 8) | - (addr & 3); - /* pclog("mystique_ctrl_write_b(%04X, %02X)\n", addr, val); */ - mystique_ctrl_write_b(addr, val, mystique); - break; + case 0x48: + case 0x49: + case 0x4a: + case 0x4b: + addr = (mystique->pci_regs[0x44] & 0xfc) | ((mystique->pci_regs[0x45] & 0x3f) << 8) | (addr & 3); + /* pclog("mystique_ctrl_write_b(%04X, %02X)\n", addr, val); */ + mystique_ctrl_write_b(addr, val, mystique); + break; } } - - static void * mystique_init(const device_t *info) { - int c; + int c; mystique_t *mystique = malloc(sizeof(mystique_t)); - char *romfn; + char *romfn; memset(mystique, 0, sizeof(mystique_t)); - mystique->type = info->local; + mystique->type = info->local; - if (mystique->type == MGA_2064W) - romfn = ROM_MILLENNIUM; - else if (mystique->type == MGA_1064SG) - romfn = ROM_MYSTIQUE; - else - romfn = ROM_MYSTIQUE_220; + if (mystique->type == MGA_2064W) + romfn = ROM_MILLENNIUM; + else if (mystique->type == MGA_1064SG) + romfn = ROM_MYSTIQUE; + else + romfn = ROM_MYSTIQUE_220; rom_init(&mystique->bios_rom, romfn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); mem_mapping_disable(&mystique->bios_rom.mapping); - mystique->vram_size = device_get_config_int("memory"); - mystique->vram_mask = (mystique->vram_size << 20) - 1; + mystique->vram_size = device_get_config_int("memory"); + mystique->vram_mask = (mystique->vram_size << 20) - 1; mystique->vram_mask_w = mystique->vram_mask >> 1; mystique->vram_mask_l = mystique->vram_mask >> 2; video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_matrox_mystique); if (mystique->type == MGA_2064W) { - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_matrox_millennium); - svga_init(info, &mystique->svga, mystique, mystique->vram_size << 20, - mystique_recalctimings, - mystique_in, mystique_out, - NULL, - NULL); - mystique->svga.dac_hwcursor_draw = tvp3026_hwcursor_draw; - mystique->svga.ramdac = device_add(&tvp3026_ramdac_device); - mystique->svga.clock_gen = mystique->svga.ramdac; - mystique->svga.getclock = tvp3026_getclock; - } else { - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_matrox_mystique); - svga_init(info, &mystique->svga, mystique, mystique->vram_size << 20, - mystique_recalctimings, - mystique_in, mystique_out, - mystique_hwcursor_draw, - NULL); - mystique->svga.clock_gen = mystique; - mystique->svga.getclock = mystique_getclock; - } + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_matrox_millennium); + svga_init(info, &mystique->svga, mystique, mystique->vram_size << 20, + mystique_recalctimings, + mystique_in, mystique_out, + NULL, + NULL); + mystique->svga.dac_hwcursor_draw = tvp3026_hwcursor_draw; + mystique->svga.ramdac = device_add(&tvp3026_ramdac_device); + mystique->svga.clock_gen = mystique->svga.ramdac; + mystique->svga.getclock = tvp3026_getclock; + } else { + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_matrox_mystique); + svga_init(info, &mystique->svga, mystique, mystique->vram_size << 20, + mystique_recalctimings, + mystique_in, mystique_out, + mystique_hwcursor_draw, + NULL); + mystique->svga.clock_gen = mystique; + mystique->svga.getclock = mystique_getclock; + } io_sethandler(0x03c0, 0x0020, mystique_in, NULL, NULL, mystique_out, NULL, NULL, mystique); mem_mapping_add(&mystique->ctrl_mapping, 0, 0, - mystique_ctrl_read_b, NULL, mystique_ctrl_read_l, - mystique_ctrl_write_b, NULL, mystique_ctrl_write_l, - NULL, 0, mystique); + mystique_ctrl_read_b, NULL, mystique_ctrl_read_l, + mystique_ctrl_write_b, NULL, mystique_ctrl_write_l, + NULL, 0, mystique); mem_mapping_disable(&mystique->ctrl_mapping); mem_mapping_add(&mystique->lfb_mapping, 0, 0, - mystique_readb_linear, mystique_readw_linear, mystique_readl_linear, - mystique_writeb_linear, mystique_writew_linear, mystique_writel_linear, - NULL, 0, mystique); + mystique_readb_linear, mystique_readw_linear, mystique_readl_linear, + mystique_writeb_linear, mystique_writew_linear, mystique_writel_linear, + NULL, 0, mystique); mem_mapping_disable(&mystique->lfb_mapping); mem_mapping_add(&mystique->iload_mapping, 0, 0, - mystique_iload_read_b, NULL, mystique_iload_read_l, - mystique_iload_write_b, NULL, mystique_iload_write_l, - NULL, 0, mystique); + mystique_iload_read_b, NULL, mystique_iload_read_l, + mystique_iload_write_b, NULL, mystique_iload_write_l, + NULL, 0, mystique); mem_mapping_disable(&mystique->iload_mapping); - mystique->card = pci_add_card(PCI_ADD_VIDEO, mystique_pci_read, mystique_pci_write, mystique); + mystique->card = pci_add_card(PCI_ADD_VIDEO, mystique_pci_read, mystique_pci_write, mystique); mystique->pci_regs[0x06] = 0x80; mystique->pci_regs[0x07] = 0 << 1; mystique->pci_regs[0x2c] = mystique->bios_rom.rom[0x7ff8]; @@ -5229,61 +5443,60 @@ mystique_init(const device_t *info) mystique->pci_regs[0x2e] = mystique->bios_rom.rom[0x7ffa]; mystique->pci_regs[0x2f] = mystique->bios_rom.rom[0x7ffb]; - mystique->svga.miscout = 1; - mystique->pci_regs[0x41] = 0x01; /* vgaboot = 1 */ - mystique->pci_regs[0x43] = 0x40; /* biosen = 1 */ + mystique->svga.miscout = 1; + mystique->pci_regs[0x41] = 0x01; /* vgaboot = 1 */ + mystique->pci_regs[0x43] = 0x40; /* biosen = 1 */ for (c = 0; c < 256; c++) { - dither5[c][0][0] = c >> 3; - dither5[c][1][1] = (c + 2) >> 3; - dither5[c][1][0] = (c + 4) >> 3; - dither5[c][0][1] = (c + 6) >> 3; + dither5[c][0][0] = c >> 3; + dither5[c][1][1] = (c + 2) >> 3; + dither5[c][1][0] = (c + 4) >> 3; + dither5[c][0][1] = (c + 6) >> 3; - if (dither5[c][1][1] > 31) - dither5[c][1][1] = 31; - if (dither5[c][1][0] > 31) - dither5[c][1][0] = 31; - if (dither5[c][0][1] > 31) - dither5[c][0][1] = 31; + if (dither5[c][1][1] > 31) + dither5[c][1][1] = 31; + if (dither5[c][1][0] > 31) + dither5[c][1][0] = 31; + if (dither5[c][0][1] > 31) + dither5[c][0][1] = 31; - dither6[c][0][0] = c >> 2; - dither6[c][1][1] = (c + 1) >> 2; - dither6[c][1][0] = (c + 2) >> 2; - dither6[c][0][1] = (c + 3) >> 2; + dither6[c][0][0] = c >> 2; + dither6[c][1][1] = (c + 1) >> 2; + dither6[c][1][0] = (c + 2) >> 2; + dither6[c][0][1] = (c + 3) >> 2; - if (dither6[c][1][1] > 63) - dither6[c][1][1] = 63; - if (dither6[c][1][0] > 63) - dither6[c][1][0] = 63; - if (dither6[c][0][1] > 63) - dither6[c][0][1] = 63; + if (dither6[c][1][1] > 63) + dither6[c][1][1] = 63; + if (dither6[c][1][0] > 63) + dither6[c][1][0] = 63; + if (dither6[c][0][1] > 63) + dither6[c][0][1] = 63; } - mystique->wake_fifo_thread = thread_create_event(); + mystique->wake_fifo_thread = thread_create_event(); mystique->fifo_not_full_event = thread_create_event(); - mystique->thread_run = 1; - mystique->fifo_thread = thread_create(fifo_thread, mystique); - mystique->dma.lock = thread_create_mutex(); + mystique->thread_run = 1; + mystique->fifo_thread = thread_create(fifo_thread, mystique); + mystique->dma.lock = thread_create_mutex(); - timer_add(&mystique->wake_timer, mystique_wake_timer, (void *)mystique, 0); - timer_add(&mystique->softrap_pending_timer, mystique_softrap_pending_timer, (void *)mystique, 1); + timer_add(&mystique->wake_timer, mystique_wake_timer, (void *) mystique, 0); + timer_add(&mystique->softrap_pending_timer, mystique_softrap_pending_timer, (void *) mystique, 1); mystique->status = STATUS_ENDPRDMASTS; mystique->svga.vsync_callback = mystique_vsync_callback; - mystique->i2c = i2c_gpio_init("i2c_mga"); + mystique->i2c = i2c_gpio_init("i2c_mga"); mystique->i2c_ddc = i2c_gpio_init("ddc_mga"); - mystique->ddc = ddc_init(i2c_gpio_get_bus(mystique->i2c_ddc)); + mystique->ddc = ddc_init(i2c_gpio_get_bus(mystique->i2c_ddc)); return mystique; } - static void mystique_close(void *p) { - mystique_t *mystique = (mystique_t *)p; + mystique_t *mystique = (mystique_t *) p; mystique->thread_run = 0; thread_set_event(mystique->wake_fifo_thread); @@ -5319,26 +5532,24 @@ mystique_220_available(void) return rom_present(ROM_MYSTIQUE_220); } - static void mystique_speed_changed(void *p) { - mystique_t *mystique = (mystique_t *)p; + mystique_t *mystique = (mystique_t *) p; svga_recalctimings(&mystique->svga); } - static void mystique_force_redraw(void *p) { - mystique_t *mystique = (mystique_t *)p; + mystique_t *mystique = (mystique_t *) p; mystique->svga.fullchange = changeframecount; } static const device_config_t mystique_config[] = { -// clang-format off + // clang-format off { .name = "memory", .description = "Memory size", @@ -5369,49 +5580,44 @@ static const device_config_t mystique_config[] = { // clang-format on }; -const device_t millennium_device = -{ - .name = "Matrox Millennium", +const device_t millennium_device = { + .name = "Matrox Millennium", .internal_name = "millennium", - .flags = DEVICE_PCI, - .local = MGA_2064W, - .init = mystique_init, - .close = mystique_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = MGA_2064W, + .init = mystique_init, + .close = mystique_close, + .reset = NULL, { .available = millennium_available }, .speed_changed = mystique_speed_changed, - .force_redraw = mystique_force_redraw, - .config = mystique_config + .force_redraw = mystique_force_redraw, + .config = mystique_config }; - -const device_t mystique_device = -{ - .name = "Matrox Mystique", +const device_t mystique_device = { + .name = "Matrox Mystique", .internal_name = "mystique", - .flags = DEVICE_PCI, - .local = MGA_1064SG, - .init = mystique_init, - .close = mystique_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = MGA_1064SG, + .init = mystique_init, + .close = mystique_close, + .reset = NULL, { .available = mystique_available }, .speed_changed = mystique_speed_changed, - .force_redraw = mystique_force_redraw, - .config = mystique_config + .force_redraw = mystique_force_redraw, + .config = mystique_config }; - -const device_t mystique_220_device = -{ - .name = "Matrox Mystique 220", +const device_t mystique_220_device = { + .name = "Matrox Mystique 220", .internal_name = "mystique_220", - .flags = DEVICE_PCI, - .local = MGA_1164SG, - .init = mystique_init, - .close = mystique_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = MGA_1164SG, + .init = mystique_init, + .close = mystique_close, + .reset = NULL, { .available = mystique_220_available }, .speed_changed = mystique_speed_changed, - .force_redraw = mystique_force_redraw, - .config = mystique_config + .force_redraw = mystique_force_redraw, + .config = mystique_config }; diff --git a/src/video/vid_nga.c b/src/video/vid_nga.c index befe01671..7710c3655 100644 --- a/src/video/vid_nga.c +++ b/src/video/vid_nga.c @@ -39,509 +39,500 @@ #include <86box/vid_nga.h> #include <86box/vid_cga_comp.h> - - -#define CGA_RGB 0 +#define CGA_RGB 0 #define CGA_COMPOSITE 1 #define COMPOSITE_OLD 0 #define COMPOSITE_NEW 1 - - -static video_timings_t timing_nga = {VIDEO_ISA, 8,16,32, 8,16,32}; +static video_timings_t timing_nga = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; void nga_recalctimings(nga_t *nga) { double _dispontime, _dispofftime, disptime; - if ((nga->cga.cgamode & 1) ) { - disptime = nga->cga.crtc[0] + 1; - _dispontime = nga->cga.crtc[1]; + if ((nga->cga.cgamode & 1)) { + disptime = nga->cga.crtc[0] + 1; + _dispontime = nga->cga.crtc[1]; } else { - disptime = (nga->cga.crtc[0] + 1) << 1; - _dispontime = nga->cga.crtc[1] << 1; + disptime = (nga->cga.crtc[0] + 1) << 1; + _dispontime = nga->cga.crtc[1] << 1; } _dispofftime = disptime - _dispontime; - _dispontime *= CGACONST / 2; + _dispontime *= CGACONST / 2; _dispofftime *= CGACONST / 2; - nga->cga.dispontime = (uint64_t)(_dispontime); - nga->cga.dispofftime = (uint64_t)(_dispofftime); + nga->cga.dispontime = (uint64_t) (_dispontime); + nga->cga.dispofftime = (uint64_t) (_dispofftime); } void nga_out(uint16_t addr, uint8_t val, void *priv) { - nga_t *nga = (nga_t *)priv; - - cga_out(addr, val, &nga->cga); + nga_t *nga = (nga_t *) priv; + cga_out(addr, val, &nga->cga); } uint8_t nga_in(uint16_t addr, void *priv) { - nga_t *nga = (nga_t *)priv; + nga_t *nga = (nga_t *) priv; - return cga_in(addr, &nga->cga); + return cga_in(addr, &nga->cga); } - void nga_waitstates(void *p) { - int ws_array[16] = {3, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8}; + int ws_array[16] = { 3, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8 }; int ws; ws = ws_array[cycles & 0xf]; sub_cycles(ws); } - void nga_write(uint32_t addr, uint8_t val, void *priv) { - nga_t *nga = (nga_t *)priv; - int offset; - /* a8000-affff */ - if(!(addr & 0x10000)) - nga->vram_64k[addr & 0x7FFF]=val; - /* b8000-bffff */ - else - nga->cga.vram[addr & 0x7FFF]=val; + nga_t *nga = (nga_t *) priv; + int offset; + /* a8000-affff */ + if (!(addr & 0x10000)) + nga->vram_64k[addr & 0x7FFF] = val; + /* b8000-bffff */ + else + nga->cga.vram[addr & 0x7FFF] = val; - if (nga->cga.snow_enabled) { - /* recreate snow effect */ - offset = ((timer_get_remaining_u64(&nga->cga.timer) / CGACONST) * 4) & 0xfc; - nga->cga.charbuffer[offset] = nga->cga.vram[addr & 0x7fff]; - nga->cga.charbuffer[offset | 1] = nga->cga.vram[addr & 0x7fff]; - } - nga_waitstates(&nga->cga); + if (nga->cga.snow_enabled) { + /* recreate snow effect */ + offset = ((timer_get_remaining_u64(&nga->cga.timer) / CGACONST) * 4) & 0xfc; + nga->cga.charbuffer[offset] = nga->cga.vram[addr & 0x7fff]; + nga->cga.charbuffer[offset | 1] = nga->cga.vram[addr & 0x7fff]; + } + nga_waitstates(&nga->cga); } uint8_t nga_read(uint32_t addr, void *priv) { - nga_t *nga = (nga_t *)priv; - int offset; - uint8_t ret; - /* a8000-affff */ - if(!(addr & 0x10000)) - ret = nga->vram_64k[addr & 0x7FFF]; - else - ret = nga->cga.vram[addr & 0x7FFF]; + nga_t *nga = (nga_t *) priv; + int offset; + uint8_t ret; + /* a8000-affff */ + if (!(addr & 0x10000)) + ret = nga->vram_64k[addr & 0x7FFF]; + else + ret = nga->cga.vram[addr & 0x7FFF]; - nga_waitstates(&nga->cga); + nga_waitstates(&nga->cga); - if (nga->cga.snow_enabled) { - /* recreate snow effect */ - offset = ((timer_get_remaining_u64(&nga->cga.timer) / CGACONST) * 4) & 0xfc; - nga->cga.charbuffer[offset] = nga->cga.vram[addr & 0x7fff]; - nga->cga.charbuffer[offset | 1] = nga->cga.vram[addr & 0x7fff]; - } + if (nga->cga.snow_enabled) { + /* recreate snow effect */ + offset = ((timer_get_remaining_u64(&nga->cga.timer) / CGACONST) * 4) & 0xfc; + nga->cga.charbuffer[offset] = nga->cga.vram[addr & 0x7fff]; + nga->cga.charbuffer[offset | 1] = nga->cga.vram[addr & 0x7fff]; + } - return(ret); + return (ret); } void nga_poll(void *priv) { - nga_t *nga = (nga_t *)priv; - /* set cursor position in memory */ + nga_t *nga = (nga_t *) priv; + /* set cursor position in memory */ uint16_t ca = (nga->cga.crtc[15] | (nga->cga.crtc[14] << 8)) & 0x3fff; - int drawcursor; - int x, c, xs_temp, ys_temp; - int oldvc; - uint8_t chr, attr; + int drawcursor; + int x, c, xs_temp, ys_temp; + int oldvc; + uint8_t chr, attr; uint16_t dat, dat2; - int cols[4]; - int col; - int oldsc; + int cols[4]; + int col; + int oldsc; - /* graphic mode and not high-res modes */ - if ((nga->cga.cgamode & 2) && !(nga->cga.cgamode & 0x40)) { - /* standard cga mode */ - cga_poll(&nga->cga); - return; - } else { - /* high-res or text mode */ - if (!nga->cga.linepos) { - timer_advance_u64(&nga->cga.timer, nga->cga.dispofftime); - nga->cga.cgastat |= 1; - nga->cga.linepos = 1; - oldsc = nga->cga.sc; - /* if interlaced */ - if ((nga->cga.crtc[8] & 3) == 3) - nga->cga.sc = ((nga->cga.sc << 1) + nga->cga.oddeven) & 7; - if (nga->cga.cgadispon) { - if (nga->cga.displine < nga->cga.firstline) { - nga->cga.firstline = nga->cga.displine; - video_wait_for_buffer(); - } - nga->cga.lastline = nga->cga.displine; - /* 80-col */ - if ((nga->cga.cgamode & 1) && !(nga->cga.cgamode & 2)) { - /* for each text column */ - for (x = 0; x < nga->cga.crtc[1]; x++) { - /* video output enabled */ - if (nga->cga.cgamode & 8) { - /* character */ - chr = nga->cga.charbuffer[x << 1]; - /* text attributes */ - attr = nga->cga.charbuffer[(x << 1) + 1]; - } else - chr = attr = 0; - /* check if cursor has to be drawn */ - drawcursor = ((nga->cga.ma == ca) && nga->cga.con && nga->cga.cursoron); - /* set foreground */ - cols[1] = (attr & 15) + 16; - /* blink active */ - if (nga->cga.cgamode & 0x20) { - cols[0] = ((attr >> 4) & 7) + 16; - /* attribute 7 active and not cursor */ - if ((nga->cga.cgablink & 8) && (attr & 0x80) && !nga->cga.drawcursor) { - /* set blinking */ - cols[1] = cols[0]; - } - } else { - /* Set intensity bit */ - cols[0] = (attr >> 4) + 16; - } - if (drawcursor) { - for (c = 0; c < 8; c++) - buffer32->line[nga->cga.displine][(x << 3) + c + 8] = cols[(fontdatm[chr][((nga->cga.sc & 7) << 1) | nga->lineff] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; - } else { - for (c = 0; c < 8; c++) - buffer32->line[nga->cga.displine][(x << 3) + c + 8] = cols[(fontdatm[chr][((nga->cga.sc & 7) << 1) | nga->lineff] & (1 << (c ^ 7))) ? 1 : 0]; - } + /* graphic mode and not high-res modes */ + if ((nga->cga.cgamode & 2) && !(nga->cga.cgamode & 0x40)) { + /* standard cga mode */ + cga_poll(&nga->cga); + return; + } else { + /* high-res or text mode */ + if (!nga->cga.linepos) { + timer_advance_u64(&nga->cga.timer, nga->cga.dispofftime); + nga->cga.cgastat |= 1; + nga->cga.linepos = 1; + oldsc = nga->cga.sc; + /* if interlaced */ + if ((nga->cga.crtc[8] & 3) == 3) + nga->cga.sc = ((nga->cga.sc << 1) + nga->cga.oddeven) & 7; + if (nga->cga.cgadispon) { + if (nga->cga.displine < nga->cga.firstline) { + nga->cga.firstline = nga->cga.displine; + video_wait_for_buffer(); + } + nga->cga.lastline = nga->cga.displine; + /* 80-col */ + if ((nga->cga.cgamode & 1) && !(nga->cga.cgamode & 2)) { + /* for each text column */ + for (x = 0; x < nga->cga.crtc[1]; x++) { + /* video output enabled */ + if (nga->cga.cgamode & 8) { + /* character */ + chr = nga->cga.charbuffer[x << 1]; + /* text attributes */ + attr = nga->cga.charbuffer[(x << 1) + 1]; + } else + chr = attr = 0; + /* check if cursor has to be drawn */ + drawcursor = ((nga->cga.ma == ca) && nga->cga.con && nga->cga.cursoron); + /* set foreground */ + cols[1] = (attr & 15) + 16; + /* blink active */ + if (nga->cga.cgamode & 0x20) { + cols[0] = ((attr >> 4) & 7) + 16; + /* attribute 7 active and not cursor */ + if ((nga->cga.cgablink & 8) && (attr & 0x80) && !nga->cga.drawcursor) { + /* set blinking */ + cols[1] = cols[0]; + } + } else { + /* Set intensity bit */ + cols[0] = (attr >> 4) + 16; + } + if (drawcursor) { + for (c = 0; c < 8; c++) + buffer32->line[nga->cga.displine][(x << 3) + c + 8] = cols[(fontdatm[chr][((nga->cga.sc & 7) << 1) | nga->lineff] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; + } else { + for (c = 0; c < 8; c++) + buffer32->line[nga->cga.displine][(x << 3) + c + 8] = cols[(fontdatm[chr][((nga->cga.sc & 7) << 1) | nga->lineff] & (1 << (c ^ 7))) ? 1 : 0]; + } - nga->cga.ma++; - } - } - /* 40-col */ - else if (!(nga->cga.cgamode & 2)) { - /* for each text column */ - for (x = 0; x < nga->cga.crtc[1]; x++) { - if (nga->cga.cgamode & 8) { - chr = nga->cga.vram[((nga->cga.ma << 1) & 0x3fff) + nga->base]; - attr = nga->cga.vram[(((nga->cga.ma << 1) + 1) & 0x3fff) + nga->base]; - } else { - chr = attr = 0; - } - drawcursor = ((nga->cga.ma == ca) && nga->cga.con && nga->cga.cursoron); - /* set foreground */ - cols[1] = (attr & 15) + 16; - /* blink active */ - if (nga->cga.cgamode & 0x20) { - cols[0] = ((attr >> 4) & 7) + 16; - if ((nga->cga.cgablink & 8) && (attr & 0x80) && !nga->cga.drawcursor) { - /* set blinking */ - cols[1] = cols[0]; - } - } else { - /* Set intensity bit */ - cols[0] = (attr >> 4) + 16; - } + nga->cga.ma++; + } + } + /* 40-col */ + else if (!(nga->cga.cgamode & 2)) { + /* for each text column */ + for (x = 0; x < nga->cga.crtc[1]; x++) { + if (nga->cga.cgamode & 8) { + chr = nga->cga.vram[((nga->cga.ma << 1) & 0x3fff) + nga->base]; + attr = nga->cga.vram[(((nga->cga.ma << 1) + 1) & 0x3fff) + nga->base]; + } else { + chr = attr = 0; + } + drawcursor = ((nga->cga.ma == ca) && nga->cga.con && nga->cga.cursoron); + /* set foreground */ + cols[1] = (attr & 15) + 16; + /* blink active */ + if (nga->cga.cgamode & 0x20) { + cols[0] = ((attr >> 4) & 7) + 16; + if ((nga->cga.cgablink & 8) && (attr & 0x80) && !nga->cga.drawcursor) { + /* set blinking */ + cols[1] = cols[0]; + } + } else { + /* Set intensity bit */ + cols[0] = (attr >> 4) + 16; + } - if (drawcursor) { - for (c = 0; c < 8; c++) - buffer32->line[nga->cga.displine][(x << 4) + (c << 1) + 8] = - buffer32->line[nga->cga.displine][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdatm[chr][((nga->cga.sc & 7) << 1) | nga->lineff] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; - } else { - for (c = 0; c < 8; c++) - buffer32->line[nga->cga.displine][(x << 4) + (c << 1) + 8] = - buffer32->line[nga->cga.displine][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdatm[chr][((nga->cga.sc & 7) << 1) | nga->lineff] & (1 << (c ^ 7))) ? 1 : 0]; - } + if (drawcursor) { + for (c = 0; c < 8; c++) + buffer32->line[nga->cga.displine][(x << 4) + (c << 1) + 8] = buffer32->line[nga->cga.displine][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdatm[chr][((nga->cga.sc & 7) << 1) | nga->lineff] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; + } else { + for (c = 0; c < 8; c++) + buffer32->line[nga->cga.displine][(x << 4) + (c << 1) + 8] = buffer32->line[nga->cga.displine][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdatm[chr][((nga->cga.sc & 7) << 1) | nga->lineff] & (1 << (c ^ 7))) ? 1 : 0]; + } - nga->cga.ma++; + nga->cga.ma++; + } + } else { + /* high res modes */ + if (nga->cga.cgamode & 0x40) { + /* 640x400x2 mode */ + if (nga->cga.cgamode & 0x4 || nga->cga.cgamode & 0x10) { + /* + * Scanlines are read in the following order: + * 0b8000-0b9f3f even scans (0,4,...) + * 0ba000-0bbf3f odd scans (2,6,...) + * 0bc000-0bdf3f even scans (1,5,...) + * 0be000-0bff3f odd scans (3,7,...) + */ + dat2 = ((nga->cga.sc & 1) * 0x2000) | (nga->lineff * 0x4000); + cols[0] = 0; + cols[1] = 15 + 16; + /* 640x400x4 mode */ + } else { + cols[0] = (nga->cga.cgacol & 15) | 16; + col = (nga->cga.cgacol & 16) ? 24 : 16; + if (nga->cga.cgamode & 4) { + cols[1] = col | 3; /* Cyan */ + cols[2] = col | 4; /* Red */ + cols[3] = col | 7; /* White */ + } else if (nga->cga.cgacol & 32) { + cols[1] = col | 3; /* Cyan */ + cols[2] = col | 5; /* Magenta */ + cols[3] = col | 7; /* White */ + } else { + cols[1] = col | 2; /* Green */ + cols[2] = col | 4; /* Red */ + cols[3] = col | 6; /* Yellow */ + } + /* + * Scanlines are read in the following order: + * 0b8000-0bbf3f even scans (0,4,...) + * 0bc000-0bff3f odd scans (1,5,...) + * 0a8000-0abf3f even scans (2,6,...) + * 0ac000-0aff3f odd scans (3,7,...) + */ + dat2 = (nga->cga.sc & 1) * 0x4000; + } + } else { + dat2 = (nga->cga.sc & 1) * 0x2000; + cols[0] = 0; + cols[1] = (nga->cga.cgacol & 15) + 16; + } - } - } else { - /* high res modes */ - if (nga->cga.cgamode & 0x40) { - /* 640x400x2 mode */ - if (nga->cga.cgamode & 0x4 || nga->cga.cgamode & 0x10) { - /* - * Scanlines are read in the following order: - * 0b8000-0b9f3f even scans (0,4,...) - * 0ba000-0bbf3f odd scans (2,6,...) - * 0bc000-0bdf3f even scans (1,5,...) - * 0be000-0bff3f odd scans (3,7,...) - */ - dat2 = ((nga->cga.sc & 1) * 0x2000) | (nga->lineff * 0x4000); - cols[0] = 0; cols[1] = 15 + 16; - /* 640x400x4 mode */ - } else { - cols[0] = (nga->cga.cgacol & 15) | 16; - col = (nga->cga.cgacol & 16) ? 24 : 16; - if (nga->cga.cgamode & 4) { - cols[1] = col | 3; /* Cyan */ - cols[2] = col | 4; /* Red */ - cols[3] = col | 7; /* White */ - } else if (nga->cga.cgacol & 32) { - cols[1] = col | 3; /* Cyan */ - cols[2] = col | 5; /* Magenta */ - cols[3] = col | 7; /* White */ - } else { - cols[1] = col | 2; /* Green */ - cols[2] = col | 4; /* Red */ - cols[3] = col | 6; /* Yellow */ - } - /* - * Scanlines are read in the following order: - * 0b8000-0bbf3f even scans (0,4,...) - * 0bc000-0bff3f odd scans (1,5,...) - * 0a8000-0abf3f even scans (2,6,...) - * 0ac000-0aff3f odd scans (3,7,...) - */ - dat2 = (nga->cga.sc & 1) * 0x4000; - } - } - else { - dat2 = (nga->cga.sc & 1) * 0x2000; - cols[0] = 0; cols[1] = (nga->cga.cgacol & 15) + 16; - } + /* for each text column */ + for (x = 0; x < nga->cga.crtc[1]; x++) { + /* video out */ + if (nga->cga.cgamode & 8) { + /* 640x400x2 */ + if (nga->cga.cgamode & 0x4 || nga->cga.cgamode & 0x10) { + /* read two bytes at a time */ + dat = (nga->cga.vram[((nga->cga.ma << 1) & 0x1fff) + dat2] << 8) | nga->cga.vram[((nga->cga.ma << 1) & 0x1fff) + dat2 + 1]; + /* each pixel is represented by one bit, so draw 16 pixels at a time */ + /* crtc[1] is 40 column, so 40x16=640 pixels */ + for (c = 0; c < 16; c++) { + buffer32->line[nga->cga.displine][(x << 4) + c + 8] = cols[dat >> 15]; + dat <<= 1; + } + /* 640x400x4 */ + } else { + /* lines 2,3,6,7,etc. */ + if (nga->cga.sc & 2) + /* read two bytes at a time */ + dat = (nga->vram_64k[((nga->cga.ma << 1) & 0x7fff) + dat2] << 8) | nga->vram_64k[((nga->cga.ma << 1) & 0x7fff) + dat2 + 1]; + /* lines 0,1,4,5,etc. */ + else + /* read two bytes at a time */ + dat = (nga->cga.vram[((nga->cga.ma << 1) & 0x7fff) + dat2] << 8) | nga->cga.vram[((nga->cga.ma << 1) & 0x7fff) + dat2 + 1]; + /* each pixel is represented by two bits, so draw 8 pixels at a time */ + /* crtc[1] is 80 column, so 80x8=640 pixels */ + for (c = 0; c < 8; c++) { + buffer32->line[nga->cga.displine][(x << 3) + c + 8] = cols[dat >> 14]; + dat <<= 2; + } + } + } else { + dat = 0; + } + nga->cga.ma++; + } + } + } else { - /* for each text column */ - for (x = 0; x < nga->cga.crtc[1]; x++) { - /* video out */ - if (nga->cga.cgamode & 8) { - /* 640x400x2 */ - if (nga->cga.cgamode & 0x4 || nga->cga.cgamode & 0x10) { - /* read two bytes at a time */ - dat = (nga->cga.vram[((nga->cga.ma << 1) & 0x1fff) + dat2] << 8) | nga->cga.vram[((nga->cga.ma << 1) & 0x1fff) + dat2 + 1]; - /* each pixel is represented by one bit, so draw 16 pixels at a time */ - /* crtc[1] is 40 column, so 40x16=640 pixels */ - for (c = 0; c < 16; c++) { - buffer32->line[nga->cga.displine][(x << 4) + c + 8] = cols[dat >> 15]; - dat <<= 1; - } - /* 640x400x4 */ - } else { - /* lines 2,3,6,7,etc. */ - if (nga->cga.sc & 2) - /* read two bytes at a time */ - dat = (nga->vram_64k[((nga->cga.ma << 1) & 0x7fff) + dat2] << 8) | nga->vram_64k[((nga->cga.ma << 1) & 0x7fff) + dat2 + 1]; - /* lines 0,1,4,5,etc. */ - else - /* read two bytes at a time */ - dat = (nga->cga.vram[((nga->cga.ma << 1) & 0x7fff) + dat2] << 8) | nga->cga.vram[((nga->cga.ma << 1) & 0x7fff) + dat2 + 1]; - /* each pixel is represented by two bits, so draw 8 pixels at a time */ - /* crtc[1] is 80 column, so 80x8=640 pixels */ - for (c = 0; c < 8; c++) { - buffer32->line[nga->cga.displine][(x << 3) + c + 8] = cols[dat >> 14]; - dat <<= 2; - } - } - } else { - dat = 0; - } - nga->cga.ma++; - } - } - } else { + /* nga specific */ + cols[0] = ((nga->cga.cgamode & 0x12) == 0x12) ? 0 : (nga->cga.cgacol & 15) + 16; + /* 80-col */ + if ((nga->cga.cgamode & 1)) { + hline(buffer32, 0, (nga->cga.displine << 1), ((nga->cga.crtc[1] << 3) + 16) << 2, cols[0]); + hline(buffer32, 0, (nga->cga.displine << 1) + 1, ((nga->cga.crtc[1] << 3) + 16) << 2, cols[0]); + } else { + hline(buffer32, 0, (nga->cga.displine << 1), ((nga->cga.crtc[1] << 4) + 16) << 2, cols[0]); + hline(buffer32, 0, (nga->cga.displine << 1) + 1, ((nga->cga.crtc[1] << 4) + 16) << 2, cols[0]); + } + } - /* nga specific */ - cols[0] = ((nga->cga.cgamode & 0x12) == 0x12) ? 0 : (nga->cga.cgacol & 15) + 16; - /* 80-col */ - if ((nga->cga.cgamode & 1) ) { - hline(buffer32, 0, (nga->cga.displine << 1), ((nga->cga.crtc[1] << 3) + 16) << 2, cols[0]); - hline(buffer32, 0, (nga->cga.displine << 1) + 1, ((nga->cga.crtc[1] << 3) + 16) << 2, cols[0]); - } else { - hline(buffer32, 0, (nga->cga.displine << 1), ((nga->cga.crtc[1] << 4) + 16) << 2, cols[0]); - hline(buffer32, 0, (nga->cga.displine << 1) + 1, ((nga->cga.crtc[1] << 4) + 16) << 2, cols[0]); - } + nga->cga.sc = oldsc; + /* vertical sync */ + if (nga->cga.vc == nga->cga.crtc[7] && !nga->cga.sc) + nga->cga.cgastat |= 8; + nga->cga.displine++; + if (nga->cga.displine >= 720) + nga->cga.displine = 0; + } else { + timer_advance_u64(&nga->cga.timer, nga->cga.dispontime); + if (nga->cga.cgadispon) + nga->cga.cgastat &= ~1; + nga->cga.linepos = 0; + /* nga specific */ + nga->lineff ^= 1; - } + /* text mode or 640x400x2 */ + if (nga->lineff && !((nga->cga.cgamode & 1) && (nga->cga.cgamode & 0x40))) { + nga->cga.ma = nga->cga.maback; + /* 640x400x4 */ + } else { + if (nga->cga.vsynctime) { + nga->cga.vsynctime--; + if (!nga->cga.vsynctime) + nga->cga.cgastat &= ~8; + } + /* cursor stop scanline */ + if (nga->cga.sc == (nga->cga.crtc[11] & 31) || ((nga->cga.crtc[8] & 3) == 3 && nga->cga.sc == ((nga->cga.crtc[11] & 31) >> 1))) { + nga->cga.con = 0; + nga->cga.coff = 1; + } + /* interlaced and max scanline per char reached */ + if ((nga->cga.crtc[8] & 3) == 3 && nga->cga.sc == (nga->cga.crtc[9] >> 1)) + nga->cga.maback = nga->cga.ma; - nga->cga.sc = oldsc; - /* vertical sync */ - if (nga->cga.vc == nga->cga.crtc[7] && !nga->cga.sc) - nga->cga.cgastat |= 8; - nga->cga.displine++; - if (nga->cga.displine >= 720) - nga->cga.displine = 0; - } else { - timer_advance_u64(&nga->cga.timer, nga->cga.dispontime); - if (nga->cga.cgadispon) nga->cga.cgastat &= ~1; - nga->cga.linepos = 0; - /* nga specific */ - nga->lineff ^= 1; + if (nga->cga.vadj) { + nga->cga.sc++; + nga->cga.sc &= 31; + nga->cga.ma = nga->cga.maback; + nga->cga.vadj--; + if (!nga->cga.vadj) { + nga->cga.cgadispon = 1; + /* change start of displayed page (crtc 12-13) */ + nga->cga.ma = nga->cga.maback = (nga->cga.crtc[13] | (nga->cga.crtc[12] << 8)) & 0x7fff; + nga->cga.sc = 0; + } + /* nga specific */ + /* end of character line reached */ + } else if (nga->cga.sc == nga->cga.crtc[9] || ((nga->cga.crtc[8] & 3) == 3 && nga->cga.sc == (nga->cga.crtc[9] >> 1))) { + nga->cga.maback = nga->cga.ma; + nga->cga.sc = 0; + oldvc = nga->cga.vc; + nga->cga.vc++; + nga->cga.vc &= 127; - /* text mode or 640x400x2 */ - if (nga->lineff && !((nga->cga.cgamode & 1) && (nga->cga.cgamode & 0x40))) { - nga->cga.ma = nga->cga.maback; - /* 640x400x4 */ - } else { - if (nga->cga.vsynctime) { - nga->cga.vsynctime--; - if (!nga->cga.vsynctime) - nga->cga.cgastat &= ~8; - } - /* cursor stop scanline */ - if (nga->cga.sc == (nga->cga.crtc[11] & 31) || ((nga->cga.crtc[8] & 3) == 3 && nga->cga.sc == ((nga->cga.crtc[11] & 31) >> 1))) { - nga->cga.con = 0; - nga->cga.coff = 1; - } - /* interlaced and max scanline per char reached */ - if ((nga->cga.crtc[8] & 3) == 3 && nga->cga.sc == (nga->cga.crtc[9] >> 1)) - nga->cga.maback = nga->cga.ma; + /* lines of character displayed */ + if (nga->cga.vc == nga->cga.crtc[6]) + nga->cga.cgadispon = 0; - if (nga->cga.vadj) { - nga->cga.sc++; - nga->cga.sc &= 31; - nga->cga.ma = nga->cga.maback; - nga->cga.vadj--; - if (!nga->cga.vadj) { - nga->cga.cgadispon = 1; - /* change start of displayed page (crtc 12-13) */ - nga->cga.ma = nga->cga.maback = (nga->cga.crtc[13] | (nga->cga.crtc[12] << 8)) & 0x7fff; - nga->cga.sc = 0; - } - /* nga specific */ - /* end of character line reached */ - } else if (nga->cga.sc == nga->cga.crtc[9] || ((nga->cga.crtc[8] & 3) == 3 && nga->cga.sc == (nga->cga.crtc[9] >> 1))) { - nga->cga.maback = nga->cga.ma; - nga->cga.sc = 0; - oldvc = nga->cga.vc; - nga->cga.vc++; - nga->cga.vc &= 127; + /* total vertical lines */ + if (oldvc == nga->cga.crtc[4]) { + nga->cga.vc = 0; + /* adjust vertical lines */ + nga->cga.vadj = nga->cga.crtc[5]; + if (!nga->cga.vadj) { + nga->cga.cgadispon = 1; + /* change start of displayed page (crtc 12-13) */ + nga->cga.ma = nga->cga.maback = (nga->cga.crtc[13] | (nga->cga.crtc[12] << 8)) & 0x7fff; + } + /* cursor start */ + switch (nga->cga.crtc[10] & 0x60) { + case 0x20: + nga->cga.cursoron = 0; + break; + case 0x60: + nga->cga.cursoron = nga->cga.cgablink & 0x10; + break; + default: + nga->cga.cursoron = nga->cga.cgablink & 0x08; + break; + } + } + /* vertical line position */ + if (nga->cga.vc == nga->cga.crtc[7]) { + nga->cga.cgadispon = 0; + nga->cga.displine = 0; + /* nga specific */ + nga->cga.vsynctime = 16; + /* vsync pos */ + if (nga->cga.crtc[7]) { + if ((nga->cga.cgamode & 1)) + /* set screen width */ + x = (nga->cga.crtc[1] << 3) + 16; + else + x = (nga->cga.crtc[1] << 4) + 16; + nga->cga.lastline++; - /* lines of character displayed */ - if (nga->cga.vc == nga->cga.crtc[6]) - nga->cga.cgadispon=0; + xs_temp = x; + ys_temp = (nga->cga.lastline - nga->cga.firstline); - /* total vertical lines */ - if (oldvc == nga->cga.crtc[4]) { - nga->cga.vc = 0; - /* adjust vertical lines */ - nga->cga.vadj = nga->cga.crtc[5]; - if (!nga->cga.vadj) { - nga->cga.cgadispon = 1; - /* change start of displayed page (crtc 12-13) */ - nga->cga.ma = nga->cga.maback = (nga->cga.crtc[13] | (nga->cga.crtc[12] << 8)) & 0x7fff; - } - /* cursor start */ - switch (nga->cga.crtc[10] & 0x60) { - case 0x20: - nga->cga.cursoron = 0; - break; - case 0x60: - nga->cga.cursoron = nga->cga.cgablink & 0x10; - break; - default: - nga->cga.cursoron = nga->cga.cgablink & 0x08; - break; - } - } - /* vertical line position */ - if (nga->cga.vc == nga->cga.crtc[7]) { - nga->cga.cgadispon = 0; - nga->cga.displine = 0; - /* nga specific */ - nga->cga.vsynctime = 16; - /* vsync pos */ - if (nga->cga.crtc[7]) { - if ((nga->cga.cgamode & 1)) - /* set screen width */ - x = (nga->cga.crtc[1] << 3) + 16; - else - x = (nga->cga.crtc[1] << 4) + 16; - nga->cga.lastline++; + if ((xs_temp > 0) && (ys_temp > 0)) { + if (xsize < 64) + xs_temp = 656; + /* nga specific */ + if (ysize < 32) + ys_temp = 400; + if (!enable_overscan) + xs_temp -= 16; - xs_temp = x; - ys_temp = (nga->cga.lastline - nga->cga.firstline); + if ((nga->cga.cgamode & 8) && ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get())) { + xsize = xs_temp; + ysize = ys_temp; + set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); - if ((xs_temp > 0) && (ys_temp > 0)) { - if (xsize < 64) xs_temp = 656; - /* nga specific */ - if (ysize < 32) ys_temp = 400; - if (!enable_overscan) - xs_temp -= 16; + if (video_force_resize_get()) + video_force_resize_set(0); + } + /* nga specific */ + if (enable_overscan) { + if (nga->cga.composite) + video_blit_memtoscreen(0, (nga->cga.firstline - 8), + xsize, (nga->cga.lastline - nga->cga.firstline) + 16); + else + video_blit_memtoscreen_8(0, (nga->cga.firstline - 8), + xsize, (nga->cga.lastline - nga->cga.firstline) + 16); + } else { + if (nga->cga.composite) + video_blit_memtoscreen(8, nga->cga.firstline, + xsize, (nga->cga.lastline - nga->cga.firstline)); + else + video_blit_memtoscreen_8(8, nga->cga.firstline, + xsize, (nga->cga.lastline - nga->cga.firstline)); + } + } + frames++; + video_res_x = xsize; + video_res_y = ysize; + /* 80-col */ + if ((nga->cga.cgamode & 1) && !(nga->cga.cgamode & 0x40)) { + video_res_x /= 8; + video_res_y /= (nga->cga.crtc[9] + 1) * 2; + video_bpp = 0; + /* 40-col */ + } else if (!(nga->cga.cgamode & 2)) { + video_res_x /= 16; + video_res_y /= (nga->cga.crtc[9] + 1) * 2; + video_bpp = 0; + } else if (nga->cga.cgamode & 0x40) { + video_res_x /= 8; + video_res_y /= 2; + video_bpp = 1; + } + } + nga->cga.firstline = 1000; + nga->cga.lastline = 0; + nga->cga.cgablink++; + nga->cga.oddeven ^= 1; + } + } else { + nga->cga.sc++; + nga->cga.sc &= 31; + nga->cga.ma = nga->cga.maback; + } - if ((nga->cga.cgamode & 8) && ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get())) { - xsize = xs_temp; - ysize = ys_temp; - set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); + if (nga->cga.cgadispon) + nga->cga.cgastat &= ~1; - if (video_force_resize_get()) - video_force_resize_set(0); - } - /* nga specific */ - if (enable_overscan) { - if (nga->cga.composite) - video_blit_memtoscreen(0, (nga->cga.firstline - 8), - xsize, (nga->cga.lastline - nga->cga.firstline) + 16); - else - video_blit_memtoscreen_8(0, (nga->cga.firstline - 8), - xsize, (nga->cga.lastline - nga->cga.firstline) + 16); - } else { - if (nga->cga.composite) - video_blit_memtoscreen(8, nga->cga.firstline, - xsize, (nga->cga.lastline - nga->cga.firstline)); - else - video_blit_memtoscreen_8(8, nga->cga.firstline, - xsize, (nga->cga.lastline - nga->cga.firstline)); - } - } - frames++; - - video_res_x = xsize; - video_res_y = ysize; - /* 80-col */ - if ((nga->cga.cgamode & 1) && !(nga->cga.cgamode & 0x40)) { - video_res_x /= 8; - video_res_y /= (nga->cga.crtc[9] + 1) * 2; - video_bpp = 0; - /* 40-col */ - } else if (!(nga->cga.cgamode & 2)) { - video_res_x /= 16; - video_res_y /= (nga->cga.crtc[9] + 1) * 2; - video_bpp = 0; - } - else if (nga->cga.cgamode & 0x40) { - video_res_x /= 8; - video_res_y /= 2; - video_bpp = 1; - } - } - nga->cga.firstline = 1000; - nga->cga.lastline = 0; - nga->cga.cgablink++; - nga->cga.oddeven ^= 1; - } - } else { - nga->cga.sc++; - nga->cga.sc &= 31; - nga->cga.ma = nga->cga.maback; - } - - if (nga->cga.cgadispon) - nga->cga.cgastat &= ~1; - - /* enable cursor if its scanline was reached */ - if ((nga->cga.sc == (nga->cga.crtc[10] & 31) || ((nga->cga.crtc[8] & 3) == 3 && nga->cga.sc == ((nga->cga.crtc[10] & 31) >> 1)))) - nga->cga.con = 1; - } - /* 80-columns */ - if (nga->cga.cgadispon && (nga->cga.cgamode & 1) ) { - /* for each character per line */ - for (x = 0; x < (nga->cga.crtc[1] << 1); x++) - nga->cga.charbuffer[x] = nga->cga.vram[(((nga->cga.ma << 1) + x) & 0x3fff) + nga->base]; - } - } - } + /* enable cursor if its scanline was reached */ + if ((nga->cga.sc == (nga->cga.crtc[10] & 31) || ((nga->cga.crtc[8] & 3) == 3 && nga->cga.sc == ((nga->cga.crtc[10] & 31) >> 1)))) + nga->cga.con = 1; + } + /* 80-columns */ + if (nga->cga.cgadispon && (nga->cga.cgamode & 1)) { + /* for each character per line */ + for (x = 0; x < (nga->cga.crtc[1] << 1); x++) + nga->cga.charbuffer[x] = nga->cga.vram[(((nga->cga.ma << 1) + x) & 0x3fff) + nga->base]; + } + } + } } void nga_close(void *priv) { - nga_t *nga = (nga_t *)priv; - free(nga->vram_64k); + nga_t *nga = (nga_t *) priv; + free(nga->vram_64k); free(nga->cga.vram); free(nga); } @@ -549,7 +540,7 @@ nga_close(void *priv) void nga_speed_changed(void *priv) { - nga_t *nga = (nga_t *)priv; + nga_t *nga = (nga_t *) priv; nga_recalctimings(nga); } @@ -557,49 +548,49 @@ nga_speed_changed(void *priv) void * nga_init(const device_t *info) { - int mem; - uint8_t charset; - nga_t *nga = (nga_t *)malloc(sizeof(nga_t)); + int mem; + uint8_t charset; + nga_t *nga = (nga_t *) malloc(sizeof(nga_t)); memset(nga, 0x00, sizeof(nga_t)); video_inform(VIDEO_FLAG_TYPE_CGA, &timing_nga); charset = device_get_config_int("charset"); - loadfont_ex("roms/video/nga/ncr_nga_35122.bin", 1, 4096 * charset); + loadfont_ex("roms/video/nga/ncr_nga_35122.bin", 1, 4096 * charset); - nga->cga.composite = 0; + nga->cga.composite = 0; nga->cga.snow_enabled = device_get_config_int("snow_enabled"); - nga->cga.vram = malloc(0x8000); - nga->vram_64k = malloc(0x8000); + nga->cga.vram = malloc(0x8000); + nga->vram_64k = malloc(0x8000); - timer_add(&nga->cga.timer, nga_poll, nga, 1); + timer_add(&nga->cga.timer, nga_poll, nga, 1); mem_mapping_add(&nga->cga.mapping, 0xb8000, 0x8000, - nga_read, NULL, NULL, - nga_write, NULL, NULL, NULL, 0, nga); + nga_read, NULL, NULL, + nga_write, NULL, NULL, NULL, 0, nga); - mem = device_get_config_int("memory"); + mem = device_get_config_int("memory"); - if (mem > 32) { - /* make optional 32KB addessable */ - mem_mapping_add(&nga->mapping_64k, 0xa8000, 0x8000, - nga_read, NULL, NULL, - nga_write, NULL, NULL, NULL, 0, nga); - } + if (mem > 32) { + /* make optional 32KB addessable */ + mem_mapping_add(&nga->mapping_64k, 0xa8000, 0x8000, + nga_read, NULL, NULL, + nga_write, NULL, NULL, NULL, 0, nga); + } - io_sethandler(0x03d0, 16, nga_in, NULL, NULL, nga_out, NULL, NULL, nga); + io_sethandler(0x03d0, 16, nga_in, NULL, NULL, nga_out, NULL, NULL, nga); overscan_x = overscan_y = 16; - nga->cga.rgb_type = device_get_config_int("rgb_type"); - cga_palette = (nga->cga.rgb_type << 1); + nga->cga.rgb_type = device_get_config_int("rgb_type"); + cga_palette = (nga->cga.rgb_type << 1); cgapal_rebuild(); return nga; } const device_config_t nga_config[] = { -// clang-format off + // clang-format off { .name = "rgb_type", .description = "RGB type", @@ -690,15 +681,15 @@ const device_config_t nga_config[] = { }; const device_t nga_device = { - .name = "NCR NGA", + .name = "NCR NGA", .internal_name = "nga", - .flags = DEVICE_ISA, - .local = 0, - .init = nga_init, - .close = nga_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = nga_init, + .close = nga_close, + .reset = NULL, { .available = NULL }, .speed_changed = nga_speed_changed, - .force_redraw = NULL, - .config = nga_config + .force_redraw = NULL, + .config = nga_config }; diff --git a/src/video/vid_oak_oti.c b/src/video/vid_oak_oti.c index cea26a71f..742bbafb0 100644 --- a/src/video/vid_oak_oti.c +++ b/src/video/vid_oak_oti.c @@ -30,19 +30,18 @@ #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> -#define BIOS_037C_PATH "roms/video/oti/bios.bin" -#define BIOS_067_AMA932J_PATH "roms/machines/ama932j/OTI067.BIN" -#define BIOS_067_M300_08_PATH "roms/machines/m30008/EVC_BIOS.ROM" -#define BIOS_067_M300_15_PATH "roms/machines/m30015/EVC_BIOS.ROM" -#define BIOS_077_PATH "roms/video/oti/oti077.vbi" - +#define BIOS_037C_PATH "roms/video/oti/bios.bin" +#define BIOS_067_AMA932J_PATH "roms/machines/ama932j/OTI067.BIN" +#define BIOS_067_M300_08_PATH "roms/machines/m30008/EVC_BIOS.ROM" +#define BIOS_067_M300_15_PATH "roms/machines/m30015/EVC_BIOS.ROM" +#define BIOS_077_PATH "roms/video/oti/oti077.vbi" enum { OTI_037C, OTI_067 = 2, OTI_067_AMA932J, OTI_067_M300 = 4, - OTI_077 = 5 + OTI_077 = 5 }; typedef struct { @@ -50,7 +49,7 @@ typedef struct { rom_t bios_rom; - int index; + int index; uint8_t regs[32]; uint8_t chip_id; @@ -62,396 +61,400 @@ typedef struct { uint32_t vram_mask; } oti_t; -static video_timings_t timing_oti = {VIDEO_ISA, 6, 8,16, 6, 8,16}; - +static video_timings_t timing_oti = { .type = VIDEO_ISA, .write_b = 6, .write_w = 8, .write_l = 16, .read_b = 6, .read_w = 8, .read_l = 16 }; static void oti_out(uint16_t addr, uint8_t val, void *p) { - oti_t *oti = (oti_t *)p; + oti_t *oti = (oti_t *) p; svga_t *svga = &oti->svga; uint8_t old; uint8_t idx, enable; if (!oti->chip_id && !(oti->enable_register & 1) && (addr != 0x3C3)) - return; + return; - if ((((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && addr < 0x3de) && - !(svga->miscout & 1)) addr ^= 0x60; + if ((((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && addr < 0x3de) && !(svga->miscout & 1)) + addr ^= 0x60; switch (addr) { - case 0x3C3: - if (!oti->chip_id) { - oti->enable_register = val & 1; - return; - } else - break; - break; + case 0x3C3: + if (!oti->chip_id) { + oti->enable_register = val & 1; + return; + } else + break; + break; - case 0x3c6: case 0x3c7: case 0x3c8: case 0x3c9: - if (oti->chip_id == OTI_077) - sc1148x_ramdac_out(addr, 0, val, svga->ramdac, svga); - else - svga_out(addr, val, svga); - return; + case 0x3c6: + case 0x3c7: + case 0x3c8: + case 0x3c9: + if (oti->chip_id == OTI_077) + sc1148x_ramdac_out(addr, 0, val, svga->ramdac, svga); + else + svga_out(addr, val, svga); + return; - case 0x3D4: - if (oti->chip_id) - svga->crtcreg = val & 0x3f; - else - svga->crtcreg = val; /* FIXME: The BIOS wants to set the test bit? */ - return; + case 0x3D4: + if (oti->chip_id) + svga->crtcreg = val & 0x3f; + else + svga->crtcreg = val; /* FIXME: The BIOS wants to set the test bit? */ + return; - case 0x3D5: - if (oti->chip_id && (svga->crtcreg & 0x20)) - return; - idx = svga->crtcreg; - if (!oti->chip_id) - idx &= 0x1f; - if ((idx < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((idx == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - old = svga->crtc[idx]; - svga->crtc[idx] = val; - if (old != val) { - if ((idx < 0x0e) || (idx > 0x10)) { - if (idx == 0x0c || idx == 0x0d) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - } - } - break; + case 0x3D5: + if (oti->chip_id && (svga->crtcreg & 0x20)) + return; + idx = svga->crtcreg; + if (!oti->chip_id) + idx &= 0x1f; + if ((idx < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((idx == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + old = svga->crtc[idx]; + svga->crtc[idx] = val; + if (old != val) { + if ((idx < 0x0e) || (idx > 0x10)) { + if (idx == 0x0c || idx == 0x0d) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + } + } + break; - case 0x3DE: - if (oti->chip_id) - oti->index = val & 0x1f; - else - oti->index = val; - return; + case 0x3DE: + if (oti->chip_id) + oti->index = val & 0x1f; + else + oti->index = val; + return; - case 0x3DF: - idx = oti->index; - if (!oti->chip_id) - idx &= 0x1f; - oti->regs[idx] = val; - switch (idx) { - case 0xD: - if (oti->chip_id == OTI_067) { - svga->vram_display_mask = (val & 0x0c) ? oti->vram_mask : 0x3ffff; - if (!(val & 0x80)) - svga->vram_display_mask = 0x3ffff; + case 0x3DF: + idx = oti->index; + if (!oti->chip_id) + idx &= 0x1f; + oti->regs[idx] = val; + switch (idx) { + case 0xD: + if (oti->chip_id == OTI_067) { + svga->vram_display_mask = (val & 0x0c) ? oti->vram_mask : 0x3ffff; + if (!(val & 0x80)) + svga->vram_display_mask = 0x3ffff; - if ((val & 0x80) && oti->vram_size == 256) - mem_mapping_disable(&svga->mapping); - else - mem_mapping_enable(&svga->mapping); - } else if (oti->chip_id == OTI_077) { - svga->vram_display_mask = (val & 0x0c) ? oti->vram_mask : 0x3ffff; + if ((val & 0x80) && oti->vram_size == 256) + mem_mapping_disable(&svga->mapping); + else + mem_mapping_enable(&svga->mapping); + } else if (oti->chip_id == OTI_077) { + svga->vram_display_mask = (val & 0x0c) ? oti->vram_mask : 0x3ffff; - switch ((val & 0xc0) >> 6) { - case 0x00: /* 256 kB of memory */ - default: - enable = (oti->vram_size >= 256); - if (val & 0x0c) - svga->vram_display_mask = MIN(oti->vram_mask, 0x3ffff); - break; - case 0x01: /* 1 MB of memory */ - case 0x03: - enable = (oti->vram_size >= 1024); - if (val & 0x0c) - svga->vram_display_mask = MIN(oti->vram_mask, 0xfffff); - break; - case 0x02: /* 512 kB of memory */ - enable = (oti->vram_size >= 512); - if (val & 0x0c) - svga->vram_display_mask = MIN(oti->vram_mask, 0x7ffff); - break; - } + switch ((val & 0xc0) >> 6) { + case 0x00: /* 256 kB of memory */ + default: + enable = (oti->vram_size >= 256); + if (val & 0x0c) + svga->vram_display_mask = MIN(oti->vram_mask, 0x3ffff); + break; + case 0x01: /* 1 MB of memory */ + case 0x03: + enable = (oti->vram_size >= 1024); + if (val & 0x0c) + svga->vram_display_mask = MIN(oti->vram_mask, 0xfffff); + break; + case 0x02: /* 512 kB of memory */ + enable = (oti->vram_size >= 512); + if (val & 0x0c) + svga->vram_display_mask = MIN(oti->vram_mask, 0x7ffff); + break; + } - if (enable) - mem_mapping_enable(&svga->mapping); - else - mem_mapping_disable(&svga->mapping); - } else { - if (val & 0x80) - mem_mapping_disable(&svga->mapping); - else - mem_mapping_enable(&svga->mapping); - } - break; + if (enable) + mem_mapping_enable(&svga->mapping); + else + mem_mapping_disable(&svga->mapping); + } else { + if (val & 0x80) + mem_mapping_disable(&svga->mapping); + else + mem_mapping_enable(&svga->mapping); + } + break; - case 0x11: - svga->read_bank = (val & 0xf) * 65536; - svga->write_bank = (val >> 4) * 65536; - break; - } - return; + case 0x11: + svga->read_bank = (val & 0xf) * 65536; + svga->write_bank = (val >> 4) * 65536; + break; + } + return; } svga_out(addr, val, svga); } - static uint8_t oti_in(uint16_t addr, void *p) { - oti_t *oti = (oti_t *)p; + oti_t *oti = (oti_t *) p; svga_t *svga = &oti->svga; uint8_t idx, temp; if (!oti->chip_id && !(oti->enable_register & 1) && (addr != 0x3C3)) - return 0xff; + return 0xff; - if ((((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && addr < 0x3de) && - !(svga->miscout & 1)) addr ^= 0x60; + if ((((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && addr < 0x3de) && !(svga->miscout & 1)) + addr ^= 0x60; switch (addr) { - case 0x3C2: - if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x50) - temp = 0; - else - temp = 0x10; - break; + case 0x3C2: + if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x50) + temp = 0; + else + temp = 0x10; + break; - case 0x3C3: - if (oti->chip_id) - temp = svga_in(addr, svga); - else - temp = oti->enable_register; - break; + case 0x3C3: + if (oti->chip_id) + temp = svga_in(addr, svga); + else + temp = oti->enable_register; + break; - case 0x3c6: case 0x3c7: case 0x3c8: case 0x3c9: - if (oti->chip_id == OTI_077) - return sc1148x_ramdac_in(addr, 0, svga->ramdac, svga); - return svga_in(addr, svga); + case 0x3c6: + case 0x3c7: + case 0x3c8: + case 0x3c9: + if (oti->chip_id == OTI_077) + return sc1148x_ramdac_in(addr, 0, svga->ramdac, svga); + return svga_in(addr, svga); - case 0x3CF: - return svga->gdcreg[svga->gdcaddr & 0xf]; + case 0x3CF: + return svga->gdcreg[svga->gdcaddr & 0xf]; - case 0x3D4: - temp = svga->crtcreg; - break; + case 0x3D4: + temp = svga->crtcreg; + break; - case 0x3D5: - if (oti->chip_id) { - if (svga->crtcreg & 0x20) - temp = 0xff; - else - temp = svga->crtc[svga->crtcreg]; - } else - temp = svga->crtc[svga->crtcreg & 0x1f]; - break; + case 0x3D5: + if (oti->chip_id) { + if (svga->crtcreg & 0x20) + temp = 0xff; + else + temp = svga->crtc[svga->crtcreg]; + } else + temp = svga->crtc[svga->crtcreg & 0x1f]; + break; - case 0x3DA: - if (oti->chip_id) { - temp = svga_in(addr, svga); - break; - } + case 0x3DA: + if (oti->chip_id) { + temp = svga_in(addr, svga); + break; + } - svga->attrff = 0; - /*The OTI-037C BIOS waits for bits 0 and 3 in 0x3da to go low, then reads 0x3da again - and expects the diagnostic bits to equal the current border colour. As I understand - it, the 0x3da active enable status does not include the border time, so this may be - an area where OTI-037C is not entirely VGA compatible.*/ - svga->cgastat &= ~0x30; - /* copy color diagnostic info from the overscan color register */ - switch (svga->attrregs[0x12] & 0x30) - { - case 0x00: /* P0 and P2 */ - if (svga->attrregs[0x11] & 0x01) - svga->cgastat |= 0x10; - if (svga->attrregs[0x11] & 0x04) - svga->cgastat |= 0x20; - break; - case 0x10: /* P4 and P5 */ - if (svga->attrregs[0x11] & 0x10) - svga->cgastat |= 0x10; - if (svga->attrregs[0x11] & 0x20) - svga->cgastat |= 0x20; - break; - case 0x20: /* P1 and P3 */ - if (svga->attrregs[0x11] & 0x02) - svga->cgastat |= 0x10; - if (svga->attrregs[0x11] & 0x08) - svga->cgastat |= 0x20; - break; - case 0x30: /* P6 and P7 */ - if (svga->attrregs[0x11] & 0x40) - svga->cgastat |= 0x10; - if (svga->attrregs[0x11] & 0x80) - svga->cgastat |= 0x20; - break; - } - temp = svga->cgastat; - break; + svga->attrff = 0; + /*The OTI-037C BIOS waits for bits 0 and 3 in 0x3da to go low, then reads 0x3da again + and expects the diagnostic bits to equal the current border colour. As I understand + it, the 0x3da active enable status does not include the border time, so this may be + an area where OTI-037C is not entirely VGA compatible.*/ + svga->cgastat &= ~0x30; + /* copy color diagnostic info from the overscan color register */ + switch (svga->attrregs[0x12] & 0x30) { + case 0x00: /* P0 and P2 */ + if (svga->attrregs[0x11] & 0x01) + svga->cgastat |= 0x10; + if (svga->attrregs[0x11] & 0x04) + svga->cgastat |= 0x20; + break; + case 0x10: /* P4 and P5 */ + if (svga->attrregs[0x11] & 0x10) + svga->cgastat |= 0x10; + if (svga->attrregs[0x11] & 0x20) + svga->cgastat |= 0x20; + break; + case 0x20: /* P1 and P3 */ + if (svga->attrregs[0x11] & 0x02) + svga->cgastat |= 0x10; + if (svga->attrregs[0x11] & 0x08) + svga->cgastat |= 0x20; + break; + case 0x30: /* P6 and P7 */ + if (svga->attrregs[0x11] & 0x40) + svga->cgastat |= 0x10; + if (svga->attrregs[0x11] & 0x80) + svga->cgastat |= 0x20; + break; + } + temp = svga->cgastat; + break; - case 0x3DE: - temp = oti->index; - if (oti->chip_id) - temp |= (oti->chip_id << 5); - break; + case 0x3DE: + temp = oti->index; + if (oti->chip_id) + temp |= (oti->chip_id << 5); + break; - case 0x3DF: - idx = oti->index; - if (!oti->chip_id) - idx &= 0x1f; - if (idx == 0x10) - temp = oti->dipswitch_val; - else - temp = oti->regs[idx]; - break; + case 0x3DF: + idx = oti->index; + if (!oti->chip_id) + idx &= 0x1f; + if (idx == 0x10) + temp = oti->dipswitch_val; + else + temp = oti->regs[idx]; + break; - default: - temp = svga_in(addr, svga); - break; + default: + temp = svga_in(addr, svga); + break; } - return(temp); + return (temp); } - static void oti_pos_out(uint16_t addr, uint8_t val, void *p) { - oti_t *oti = (oti_t *)p; + oti_t *oti = (oti_t *) p; if ((val ^ oti->pos) & 8) { - if (val & 8) - io_sethandler(0x03c0, 32, oti_in, NULL, NULL, - oti_out, NULL, NULL, oti); - else - io_removehandler(0x03c0, 32, oti_in, NULL, NULL, - oti_out, NULL, NULL, oti); + if (val & 8) + io_sethandler(0x03c0, 32, oti_in, NULL, NULL, + oti_out, NULL, NULL, oti); + else + io_removehandler(0x03c0, 32, oti_in, NULL, NULL, + oti_out, NULL, NULL, oti); } oti->pos = val; } - static uint8_t oti_pos_in(uint16_t addr, void *p) { - oti_t *oti = (oti_t *)p; + oti_t *oti = (oti_t *) p; - return(oti->pos); + return (oti->pos); } - static float oti_getclock(int clock) { float ret = 0.0; switch (clock) { - case 0: - default: - ret = 25175000.0; - break; - case 1: - ret = 28322000.0; - break; - case 4: - ret = 14318000.0; - break; - case 5: - ret = 16257000.0; - break; - case 7: - ret = 35500000.0; - break; + case 0: + default: + ret = 25175000.0; + break; + case 1: + ret = 28322000.0; + break; + case 4: + ret = 14318000.0; + break; + case 5: + ret = 16257000.0; + break; + case 7: + ret = 35500000.0; + break; } return ret; } - static void oti_recalctimings(svga_t *svga) { - oti_t *oti = (oti_t *)svga->p; - int clk_sel = ((svga->miscout >> 2) & 3) | ((oti->regs[0x0d] & 0x20) >> 3); + oti_t *oti = (oti_t *) svga->p; + int clk_sel = ((svga->miscout >> 2) & 3) | ((oti->regs[0x0d] & 0x20) >> 3); - svga->clock = (cpuclock * (double)(1ull << 32)) / oti_getclock(clk_sel); + svga->clock = (cpuclock * (double) (1ull << 32)) / oti_getclock(clk_sel); if (oti->chip_id > 0) { - if (oti->regs[0x14] & 0x08) svga->ma_latch |= 0x10000; - if (oti->regs[0x16] & 0x08) svga->ma_latch |= 0x20000; + if (oti->regs[0x14] & 0x08) + svga->ma_latch |= 0x10000; + if (oti->regs[0x16] & 0x08) + svga->ma_latch |= 0x20000; - if (oti->regs[0x14] & 0x01) svga->vtotal += 0x400; - if (oti->regs[0x14] & 0x02) svga->dispend += 0x400; - if (oti->regs[0x14] & 0x04) svga->vsyncstart += 0x400; + if (oti->regs[0x14] & 0x01) + svga->vtotal += 0x400; + if (oti->regs[0x14] & 0x02) + svga->dispend += 0x400; + if (oti->regs[0x14] & 0x04) + svga->vsyncstart += 0x400; - svga->interlace = oti->regs[0x14] & 0x80; + svga->interlace = oti->regs[0x14] & 0x80; } - if ((oti->regs[0x0d] & 0x0c) && !(oti->regs[0x0d] & 0x10)) svga->rowoffset <<= 1; + if ((oti->regs[0x0d] & 0x0c) && !(oti->regs[0x0d] & 0x10)) + svga->rowoffset <<= 1; if (svga->bpp == 16) { - svga->render = svga_render_16bpp_highres; - svga->hdisp >>= 1; + svga->render = svga_render_16bpp_highres; + svga->hdisp >>= 1; } else if (svga->bpp == 15) { - svga->render = svga_render_15bpp_highres; - svga->hdisp >>= 1; + svga->render = svga_render_15bpp_highres; + svga->hdisp >>= 1; } } - static void * oti_init(const device_t *info) { - oti_t *oti = malloc(sizeof(oti_t)); - char *romfn = NULL; + oti_t *oti = malloc(sizeof(oti_t)); + char *romfn = NULL; memset(oti, 0x00, sizeof(oti_t)); oti->chip_id = info->local; oti->dipswitch_val = 0x18; - switch(oti->chip_id) { - case OTI_037C: - romfn = BIOS_037C_PATH; - oti->vram_size = 256; - oti->regs[0] = 0x08; /* FIXME: The BIOS wants to read this at index 0? This index is undocumented. */ - /* io_sethandler(0x03c0, 32, - oti_in, NULL, NULL, oti_out, NULL, NULL, oti); */ - break; + switch (oti->chip_id) { + case OTI_037C: + romfn = BIOS_037C_PATH; + oti->vram_size = 256; + oti->regs[0] = 0x08; /* FIXME: The BIOS wants to read this at index 0? This index is undocumented. */ + /* io_sethandler(0x03c0, 32, + oti_in, NULL, NULL, oti_out, NULL, NULL, oti); */ + break; - case OTI_067_AMA932J: - romfn = BIOS_067_AMA932J_PATH; - oti->chip_id = 2; - oti->vram_size = device_get_config_int("memory"); - oti->dipswitch_val |= 0x20; - oti->pos = 0x08; /* Tell the BIOS the I/O ports are already enabled to avoid a double I/O handler mess. */ - io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti); - break; + case OTI_067_AMA932J: + romfn = BIOS_067_AMA932J_PATH; + oti->chip_id = 2; + oti->vram_size = device_get_config_int("memory"); + oti->dipswitch_val |= 0x20; + oti->pos = 0x08; /* Tell the BIOS the I/O ports are already enabled to avoid a double I/O handler mess. */ + io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti); + break; - case OTI_067_M300: - if (rom_present(BIOS_067_M300_15_PATH)) - romfn = BIOS_067_M300_15_PATH; - else - romfn = BIOS_067_M300_08_PATH; - oti->vram_size = device_get_config_int("memory"); - oti->pos = 0x08; /* Tell the BIOS the I/O ports are already enabled to avoid a double I/O handler mess. */ - io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti); - break; + case OTI_067_M300: + if (rom_present(BIOS_067_M300_15_PATH)) + romfn = BIOS_067_M300_15_PATH; + else + romfn = BIOS_067_M300_08_PATH; + oti->vram_size = device_get_config_int("memory"); + oti->pos = 0x08; /* Tell the BIOS the I/O ports are already enabled to avoid a double I/O handler mess. */ + io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti); + break; - case OTI_067: - case OTI_077: - romfn = BIOS_077_PATH; - oti->vram_size = device_get_config_int("memory"); - oti->pos = 0x08; /* Tell the BIOS the I/O ports are already enabled to avoid a double I/O handler mess. */ - io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti); - break; + case OTI_067: + case OTI_077: + romfn = BIOS_077_PATH; + oti->vram_size = device_get_config_int("memory"); + oti->pos = 0x08; /* Tell the BIOS the I/O ports are already enabled to avoid a double I/O handler mess. */ + io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti); + break; } if (romfn != NULL) { - rom_init(&oti->bios_rom, romfn, - 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + rom_init(&oti->bios_rom, romfn, + 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); } oti->vram_mask = (oti->vram_size << 10) - 1; @@ -459,78 +462,71 @@ oti_init(const device_t *info) video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_oti); svga_init(info, &oti->svga, oti, oti->vram_size << 10, - oti_recalctimings, oti_in, oti_out, NULL, NULL); + oti_recalctimings, oti_in, oti_out, NULL, NULL); - if (oti->chip_id == OTI_077) - oti->svga.ramdac = device_add(&sc11487_ramdac_device); /*Actually a 82c487, probably a clone.*/ + if (oti->chip_id == OTI_077) + oti->svga.ramdac = device_add(&sc11487_ramdac_device); /*Actually a 82c487, probably a clone.*/ io_sethandler(0x03c0, 32, - oti_in, NULL, NULL, oti_out, NULL, NULL, oti); + oti_in, NULL, NULL, oti_out, NULL, NULL, oti); - oti->svga.miscout = 1; - oti->svga.packed_chain4 = 1; + oti->svga.miscout = 1; + oti->svga.packed_chain4 = 1; - return(oti); + return (oti); } - static void oti_close(void *p) { - oti_t *oti = (oti_t *)p; + oti_t *oti = (oti_t *) p; svga_close(&oti->svga); free(oti); } - static void oti_speed_changed(void *p) { - oti_t *oti = (oti_t *)p; + oti_t *oti = (oti_t *) p; svga_recalctimings(&oti->svga); } - static void oti_force_redraw(void *p) { - oti_t *oti = (oti_t *)p; + oti_t *oti = (oti_t *) p; oti->svga.fullchange = changeframecount; } - static int oti037c_available(void) { - return(rom_present(BIOS_037C_PATH)); + return (rom_present(BIOS_037C_PATH)); } - static int oti067_ama932j_available(void) { - return(rom_present(BIOS_067_AMA932J_PATH)); + return (rom_present(BIOS_067_AMA932J_PATH)); } - static int oti067_077_available(void) { - return(rom_present(BIOS_077_PATH)); + return (rom_present(BIOS_077_PATH)); } - static int oti067_m300_available(void) { if (rom_present(BIOS_067_M300_15_PATH)) - return(rom_present(BIOS_067_M300_15_PATH)); + return (rom_present(BIOS_067_M300_15_PATH)); else - return(rom_present(BIOS_067_M300_08_PATH)); + return (rom_present(BIOS_067_M300_08_PATH)); } // clang-format off @@ -615,71 +611,71 @@ static const device_config_t oti077_config[] = { // clang-format on const device_t oti037c_device = { - .name = "Oak OTI-037C", + .name = "Oak OTI-037C", .internal_name = "oti037c", - .flags = DEVICE_ISA, - .local = 0, - .init = oti_init, - .close = oti_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = oti_init, + .close = oti_close, + .reset = NULL, { .available = oti037c_available }, .speed_changed = oti_speed_changed, - .force_redraw = oti_force_redraw, - .config = NULL + .force_redraw = oti_force_redraw, + .config = NULL }; const device_t oti067_device = { - .name = "Oak OTI-067", + .name = "Oak OTI-067", .internal_name = "oti067", - .flags = DEVICE_ISA, - .local = 2, - .init = oti_init, - .close = oti_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 2, + .init = oti_init, + .close = oti_close, + .reset = NULL, { .available = oti067_077_available }, .speed_changed = oti_speed_changed, - .force_redraw = oti_force_redraw, - .config = oti067_config + .force_redraw = oti_force_redraw, + .config = oti067_config }; const device_t oti067_m300_device = { - .name = "Oak OTI-067 (Olivetti M300-08/15)", + .name = "Oak OTI-067 (Olivetti M300-08/15)", .internal_name = "oti067_m300", - .flags = DEVICE_ISA, - .local = 4, - .init = oti_init, - .close = oti_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 4, + .init = oti_init, + .close = oti_close, + .reset = NULL, { .available = oti067_m300_available }, .speed_changed = oti_speed_changed, - .force_redraw = oti_force_redraw, - .config = oti067_config + .force_redraw = oti_force_redraw, + .config = oti067_config }; const device_t oti067_ama932j_device = { - .name = "Oak OTI-067 (AMA-932J)", + .name = "Oak OTI-067 (AMA-932J)", .internal_name = "oti067_ama932j", - .flags = DEVICE_ISA, - .local = 3, - .init = oti_init, - .close = oti_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 3, + .init = oti_init, + .close = oti_close, + .reset = NULL, { .available = oti067_ama932j_available }, .speed_changed = oti_speed_changed, - .force_redraw = oti_force_redraw, - .config = oti067_ama932j_config + .force_redraw = oti_force_redraw, + .config = oti067_ama932j_config }; const device_t oti077_device = { - .name = "Oak OTI-077", + .name = "Oak OTI-077", .internal_name = "oti077", - .flags = DEVICE_ISA, - .local = 5, - .init = oti_init, - .close = oti_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 5, + .init = oti_init, + .close = oti_close, + .reset = NULL, { .available = oti067_077_available }, .speed_changed = oti_speed_changed, - .force_redraw = oti_force_redraw, - .config = oti077_config + .force_redraw = oti_force_redraw, + .config = oti077_config }; diff --git a/src/video/vid_ogc.c b/src/video/vid_ogc.c index 0487d691d..20fe30cac 100644 --- a/src/video/vid_ogc.c +++ b/src/video/vid_ogc.c @@ -40,25 +40,21 @@ #include <86box/vid_ogc.h> #include <86box/vid_cga_comp.h> - - /* * Current bugs: * - Olivetti diagnostics fail with errors: 6845 crtc write / read error out 0000 in 00ff * - Dark blue (almost black) picture in composite mode */ -#define CGA_RGB 0 +#define CGA_RGB 0 #define CGA_COMPOSITE 1 #define COMPOSITE_OLD 0 #define COMPOSITE_NEW 1 +static video_timings_t timing_ogc = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; - -static video_timings_t timing_ogc = {VIDEO_ISA, 8,16,32, 8,16,32}; - -static uint8_t mdaattr[256][2][2]; +static uint8_t mdaattr[256][2][2]; void ogc_recalctimings(ogc_t *ogc) @@ -66,106 +62,104 @@ ogc_recalctimings(ogc_t *ogc) double _dispontime, _dispofftime, disptime; if (ogc->cga.cgamode & 1) { - disptime = ogc->cga.crtc[0] + 1; - _dispontime = ogc->cga.crtc[1]; + disptime = ogc->cga.crtc[0] + 1; + _dispontime = ogc->cga.crtc[1]; } else { - disptime = (ogc->cga.crtc[0] + 1) << 1; - _dispontime = ogc->cga.crtc[1] << 1; + disptime = (ogc->cga.crtc[0] + 1) << 1; + _dispontime = ogc->cga.crtc[1] << 1; } _dispofftime = disptime - _dispontime; - _dispontime *= CGACONST / 2; + _dispontime *= CGACONST / 2; _dispofftime *= CGACONST / 2; - ogc->cga.dispontime = (uint64_t)(_dispontime); - ogc->cga.dispofftime = (uint64_t)(_dispofftime); + ogc->cga.dispontime = (uint64_t) (_dispontime); + ogc->cga.dispofftime = (uint64_t) (_dispofftime); } void ogc_out(uint16_t addr, uint8_t val, void *priv) { - ogc_t *ogc = (ogc_t *)priv; + ogc_t *ogc = (ogc_t *) priv; - // if (addr >= 0x3c0 && addr <= 0x3cf){ - // addr = addr + 16; - // } + // if (addr >= 0x3c0 && addr <= 0x3cf){ + // addr = addr + 16; + // } switch (addr) { - case 0x3d4: - case 0x3d5: - case 0x3d8: - case 0x3d9: - cga_out(addr, val, &ogc->cga); - break; + case 0x3d4: + case 0x3d5: + case 0x3d8: + case 0x3d9: + cga_out(addr, val, &ogc->cga); + break; - case 0x3de: - /* set control register */ - ogc->ctrl_3de = val; - /* select 1st or 2nd 16k vram block to be used */ - ogc->base = (val & 0x08) ? 0x4000 : 0; - break; - } + case 0x3de: + /* set control register */ + ogc->ctrl_3de = val; + /* select 1st or 2nd 16k vram block to be used */ + ogc->base = (val & 0x08) ? 0x4000 : 0; + break; + } } uint8_t ogc_in(uint16_t addr, void *priv) { - ogc_t *ogc = (ogc_t *)priv; + ogc_t *ogc = (ogc_t *) priv; - // if (addr >= 0x3c0 && addr <= 0x3cf){ - // addr = addr + 16; - // } + // if (addr >= 0x3c0 && addr <= 0x3cf){ + // addr = addr + 16; + // } uint8_t ret = 0xff; switch (addr) { - case 0x3d4: - case 0x3d5: - case 0x3da: - /* - * bits 6-7: 3 = no DEB expansion board installed - * bits 4-5: 2 color, 3 mono - * bit 3: high during 1st half of vertical retrace in character mode (CCA standard) - * bit 2: lightpen switch (CGA standard) - * bit 1: lightpen strobe (CGA standard) - * bit 0: high during retrace (CGA standard) - */ - ret = cga_in(addr, &ogc->cga); - if (addr == 0x3da){ - ret = ret | 0xe0; - if (ogc->mono_display) - ret = ret | 0x10; - break; - } - } + case 0x3d4: + case 0x3d5: + case 0x3da: + /* + * bits 6-7: 3 = no DEB expansion board installed + * bits 4-5: 2 color, 3 mono + * bit 3: high during 1st half of vertical retrace in character mode (CCA standard) + * bit 2: lightpen switch (CGA standard) + * bit 1: lightpen strobe (CGA standard) + * bit 0: high during retrace (CGA standard) + */ + ret = cga_in(addr, &ogc->cga); + if (addr == 0x3da) { + ret = ret | 0xe0; + if (ogc->mono_display) + ret = ret | 0x10; + break; + } + } - return(ret); + return (ret); } - void ogc_waitstates(void *p) { - int ws_array[16] = {3, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8}; + int ws_array[16] = { 3, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8 }; int ws; ws = ws_array[cycles & 0xf]; sub_cycles(ws); } - void ogc_write(uint32_t addr, uint8_t val, void *priv) { - ogc_t *ogc = (ogc_t *)priv; - int offset; + ogc_t *ogc = (ogc_t *) priv; + int offset; - ogc->cga.vram[addr & 0x7FFF]=val; - if (ogc->cga.snow_enabled) { - /* recreate snow effect */ - offset = ((timer_get_remaining_u64(&ogc->cga.timer) / CGACONST) * 4) & 0xfc; - ogc->cga.charbuffer[offset] = ogc->cga.vram[addr & 0x7fff]; - ogc->cga.charbuffer[offset | 1] = ogc->cga.vram[addr & 0x7fff]; - } + ogc->cga.vram[addr & 0x7FFF] = val; + if (ogc->cga.snow_enabled) { + /* recreate snow effect */ + offset = ((timer_get_remaining_u64(&ogc->cga.timer) / CGACONST) * 4) & 0xfc; + ogc->cga.charbuffer[offset] = ogc->cga.vram[addr & 0x7fff]; + ogc->cga.charbuffer[offset | 1] = ogc->cga.vram[addr & 0x7fff]; + } ogc_waitstates(&ogc->cga); } @@ -173,385 +167,381 @@ uint8_t ogc_read(uint32_t addr, void *priv) { - ogc_t *ogc = (ogc_t *)priv; - int offset; + ogc_t *ogc = (ogc_t *) priv; + int offset; - ogc_waitstates(&ogc->cga); + ogc_waitstates(&ogc->cga); - if (ogc->cga.snow_enabled) { - /* recreate snow effect */ - offset = ((timer_get_remaining_u64(&ogc->cga.timer) / CGACONST) * 4) & 0xfc; - ogc->cga.charbuffer[offset] = ogc->cga.vram[addr & 0x7fff]; - ogc->cga.charbuffer[offset | 1] = ogc->cga.vram[addr & 0x7fff]; - } + if (ogc->cga.snow_enabled) { + /* recreate snow effect */ + offset = ((timer_get_remaining_u64(&ogc->cga.timer) / CGACONST) * 4) & 0xfc; + ogc->cga.charbuffer[offset] = ogc->cga.vram[addr & 0x7fff]; + ogc->cga.charbuffer[offset | 1] = ogc->cga.vram[addr & 0x7fff]; + } - return(ogc->cga.vram[addr & 0x7FFF]); + return (ogc->cga.vram[addr & 0x7FFF]); } void ogc_poll(void *priv) { - ogc_t *ogc = (ogc_t *)priv; - uint16_t ca = (ogc->cga.crtc[15] | (ogc->cga.crtc[14] << 8)) & 0x3fff; - int drawcursor; - int x, c, xs_temp, ys_temp; - int oldvc; - uint8_t chr, attr; + ogc_t *ogc = (ogc_t *) priv; + uint16_t ca = (ogc->cga.crtc[15] | (ogc->cga.crtc[14] << 8)) & 0x3fff; + int drawcursor; + int x, c, xs_temp, ys_temp; + int oldvc; + uint8_t chr, attr; uint16_t dat, dat2; - int cols[4]; - int oldsc; - int blink = 0; - int underline = 0; - uint8_t border; + int cols[4]; + int oldsc; + int blink = 0; + int underline = 0; + uint8_t border; - //composito colore appare blu scuro + // composito colore appare blu scuro - /* graphic mode and not mode 40h */ - if (!(ogc->ctrl_3de & 0x1 || !(ogc->cga.cgamode & 2))) { - /* standard cga mode */ - cga_poll(&ogc->cga); - return; - } else { - /* mode 40h or text mode */ - if (!ogc->cga.linepos) { - timer_advance_u64(&ogc->cga.timer, ogc->cga.dispofftime); - ogc->cga.cgastat |= 1; - ogc->cga.linepos = 1; - oldsc = ogc->cga.sc; - if ((ogc->cga.crtc[8] & 3) == 3) - ogc->cga.sc = ((ogc->cga.sc << 1) + ogc->cga.oddeven) & 7; - if (ogc->cga.cgadispon) { - if (ogc->cga.displine < ogc->cga.firstline) { - ogc->cga.firstline = ogc->cga.displine; - video_wait_for_buffer(); - } - ogc->cga.lastline = ogc->cga.displine; - /* 80-col */ - if (ogc->cga.cgamode & 1) { - /* for each text column */ - for (x = 0; x < ogc->cga.crtc[1]; x++) { - /* video output enabled */ - if (ogc->cga.cgamode & 8) { - /* character */ - chr = ogc->cga.charbuffer[x << 1]; - /* text attributes */ - attr = ogc->cga.charbuffer[(x << 1) + 1]; - } else - chr = attr = 0; - /* check if cursor has to be drawn */ - drawcursor = ((ogc->cga.ma == ca) && ogc->cga.con && ogc->cga.cursoron); - /* check if character underline mode should be set */ - underline = ((ogc->ctrl_3de & 0x40) && (attr & 0x1) && !(attr & 0x6)); - if (underline) { - /* set forecolor to white */ - attr = attr | 0x7; - } - blink = 0; - /* set foreground */ - cols[1] = (attr & 15) + 16; - /* blink active */ - if (ogc->cga.cgamode & 0x20) { - cols[0] = ((attr >> 4) & 7) + 16; - /* attribute 7 active and not cursor */ - if ((ogc->cga.cgablink & 8) && (attr & 0x80) && !ogc->cga.drawcursor) { - /* set blinking */ - cols[1] = cols[0]; - blink = 1; - } - } else { - /* Set intensity bit */ - cols[0] = (attr >> 4) + 16; - blink = (attr & 0x80) * 8 + 7 + 16; - } - /* character underline active and 7th row of pixels in character height being drawn */ - if (underline && (ogc->cga.sc == 7)) { - /* for each pixel in character width */ - for (c = 0; c < 8; c++) - buffer32->line[ogc->cga.displine][(x << 3) + c + 8] = mdaattr[attr][blink][1]; - } else if (drawcursor) { - for (c = 0; c < 8; c++) - buffer32->line[ogc->cga.displine][(x << 3) + c + 8] = cols[(fontdatm[chr][((ogc->cga.sc & 7) << 1) | ogc->lineff] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; - } else { - for (c = 0; c < 8; c++) - buffer32->line[ogc->cga.displine][(x << 3) + c + 8] = cols[(fontdatm[chr][((ogc->cga.sc & 7) << 1) | ogc->lineff] & (1 << (c ^ 7))) ? 1 : 0]; - } + /* graphic mode and not mode 40h */ + if (!(ogc->ctrl_3de & 0x1 || !(ogc->cga.cgamode & 2))) { + /* standard cga mode */ + cga_poll(&ogc->cga); + return; + } else { + /* mode 40h or text mode */ + if (!ogc->cga.linepos) { + timer_advance_u64(&ogc->cga.timer, ogc->cga.dispofftime); + ogc->cga.cgastat |= 1; + ogc->cga.linepos = 1; + oldsc = ogc->cga.sc; + if ((ogc->cga.crtc[8] & 3) == 3) + ogc->cga.sc = ((ogc->cga.sc << 1) + ogc->cga.oddeven) & 7; + if (ogc->cga.cgadispon) { + if (ogc->cga.displine < ogc->cga.firstline) { + ogc->cga.firstline = ogc->cga.displine; + video_wait_for_buffer(); + } + ogc->cga.lastline = ogc->cga.displine; + /* 80-col */ + if (ogc->cga.cgamode & 1) { + /* for each text column */ + for (x = 0; x < ogc->cga.crtc[1]; x++) { + /* video output enabled */ + if (ogc->cga.cgamode & 8) { + /* character */ + chr = ogc->cga.charbuffer[x << 1]; + /* text attributes */ + attr = ogc->cga.charbuffer[(x << 1) + 1]; + } else + chr = attr = 0; + /* check if cursor has to be drawn */ + drawcursor = ((ogc->cga.ma == ca) && ogc->cga.con && ogc->cga.cursoron); + /* check if character underline mode should be set */ + underline = ((ogc->ctrl_3de & 0x40) && (attr & 0x1) && !(attr & 0x6)); + if (underline) { + /* set forecolor to white */ + attr = attr | 0x7; + } + blink = 0; + /* set foreground */ + cols[1] = (attr & 15) + 16; + /* blink active */ + if (ogc->cga.cgamode & 0x20) { + cols[0] = ((attr >> 4) & 7) + 16; + /* attribute 7 active and not cursor */ + if ((ogc->cga.cgablink & 8) && (attr & 0x80) && !ogc->cga.drawcursor) { + /* set blinking */ + cols[1] = cols[0]; + blink = 1; + } + } else { + /* Set intensity bit */ + cols[0] = (attr >> 4) + 16; + blink = (attr & 0x80) * 8 + 7 + 16; + } + /* character underline active and 7th row of pixels in character height being drawn */ + if (underline && (ogc->cga.sc == 7)) { + /* for each pixel in character width */ + for (c = 0; c < 8; c++) + buffer32->line[ogc->cga.displine][(x << 3) + c + 8] = mdaattr[attr][blink][1]; + } else if (drawcursor) { + for (c = 0; c < 8; c++) + buffer32->line[ogc->cga.displine][(x << 3) + c + 8] = cols[(fontdatm[chr][((ogc->cga.sc & 7) << 1) | ogc->lineff] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; + } else { + for (c = 0; c < 8; c++) + buffer32->line[ogc->cga.displine][(x << 3) + c + 8] = cols[(fontdatm[chr][((ogc->cga.sc & 7) << 1) | ogc->lineff] & (1 << (c ^ 7))) ? 1 : 0]; + } - ogc->cga.ma++; - } - } - /* 40-col */ - else if (!(ogc->cga.cgamode & 2)) { - for (x = 0; x < ogc->cga.crtc[1]; x++) { - if (ogc->cga.cgamode & 8) { - chr = ogc->cga.vram[((ogc->cga.ma << 1) & 0x3fff) + ogc->base]; - attr = ogc->cga.vram[(((ogc->cga.ma << 1) + 1) & 0x3fff) + ogc->base]; - } else { - chr = attr = 0; - } - drawcursor = ((ogc->cga.ma == ca) && ogc->cga.con && ogc->cga.cursoron); - /* check if character underline mode should be set */ - underline = ((ogc->ctrl_3de & 0x40) && (attr & 0x1) && !(attr & 0x6)); - if (underline) { - /* set forecolor to white */ - attr = attr | 0x7; - } - blink = 0; - /* set foreground */ - cols[1] = (attr & 15) + 16; - /* blink active */ - if (ogc->cga.cgamode & 0x20) { - cols[0] = ((attr >> 4) & 7) + 16; - if ((ogc->cga.cgablink & 8) && (attr & 0x80) && !ogc->cga.drawcursor) { - /* set blinking */ - cols[1] = cols[0]; - blink = 1; - } - } else { - /* Set intensity bit */ - cols[0] = (attr >> 4) + 16; - blink = (attr & 0x80) * 8 + 7 + 16; - } + ogc->cga.ma++; + } + } + /* 40-col */ + else if (!(ogc->cga.cgamode & 2)) { + for (x = 0; x < ogc->cga.crtc[1]; x++) { + if (ogc->cga.cgamode & 8) { + chr = ogc->cga.vram[((ogc->cga.ma << 1) & 0x3fff) + ogc->base]; + attr = ogc->cga.vram[(((ogc->cga.ma << 1) + 1) & 0x3fff) + ogc->base]; + } else { + chr = attr = 0; + } + drawcursor = ((ogc->cga.ma == ca) && ogc->cga.con && ogc->cga.cursoron); + /* check if character underline mode should be set */ + underline = ((ogc->ctrl_3de & 0x40) && (attr & 0x1) && !(attr & 0x6)); + if (underline) { + /* set forecolor to white */ + attr = attr | 0x7; + } + blink = 0; + /* set foreground */ + cols[1] = (attr & 15) + 16; + /* blink active */ + if (ogc->cga.cgamode & 0x20) { + cols[0] = ((attr >> 4) & 7) + 16; + if ((ogc->cga.cgablink & 8) && (attr & 0x80) && !ogc->cga.drawcursor) { + /* set blinking */ + cols[1] = cols[0]; + blink = 1; + } + } else { + /* Set intensity bit */ + cols[0] = (attr >> 4) + 16; + blink = (attr & 0x80) * 8 + 7 + 16; + } + /* character underline active and 7th row of pixels in character height being drawn */ + if (underline && (ogc->cga.sc == 7)) { + /* for each pixel in character width */ + for (c = 0; c < 8; c++) + buffer32->line[ogc->cga.displine][(x << 4) + (c << 1) + 8] = buffer32->line[ogc->cga.displine][(x << 4) + (c << 1) + 1 + 8] = mdaattr[attr][blink][1]; + } else if (drawcursor) { + for (c = 0; c < 8; c++) + buffer32->line[ogc->cga.displine][(x << 4) + (c << 1) + 8] = buffer32->line[ogc->cga.displine][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdatm[chr][((ogc->cga.sc & 7) << 1) | ogc->lineff] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; + } else { + for (c = 0; c < 8; c++) + buffer32->line[ogc->cga.displine][(x << 4) + (c << 1) + 8] = buffer32->line[ogc->cga.displine][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdatm[chr][((ogc->cga.sc & 7) << 1) | ogc->lineff] & (1 << (c ^ 7))) ? 1 : 0]; + } - /* character underline active and 7th row of pixels in character height being drawn */ - if (underline && (ogc->cga.sc == 7)) { - /* for each pixel in character width */ - for (c = 0; c < 8; c++) - buffer32->line[ogc->cga.displine][(x << 4) + (c << 1) + 8] = - buffer32->line[ogc->cga.displine][(x << 4) + (c << 1) + 1 + 8] = mdaattr[attr][blink][1]; - } else if (drawcursor) { - for (c = 0; c < 8; c++) - buffer32->line[ogc->cga.displine][(x << 4) + (c << 1) + 8] = - buffer32->line[ogc->cga.displine][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdatm[chr][((ogc->cga.sc & 7) << 1) | ogc->lineff] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; - } else { - for (c = 0; c < 8; c++) - buffer32->line[ogc->cga.displine][(x << 4) + (c << 1) + 8] = - buffer32->line[ogc->cga.displine][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdatm[chr][((ogc->cga.sc & 7) << 1) | ogc->lineff] & (1 << (c ^ 7))) ? 1 : 0]; - } + ogc->cga.ma++; + } + } else { + /* 640x400 mode */ + if (ogc->ctrl_3de & 1) { + dat2 = ((ogc->cga.sc & 1) * 0x4000) | (ogc->lineff * 0x2000); + cols[0] = 0; + cols[1] = 15 + 16; + } else { + dat2 = (ogc->cga.sc & 1) * 0x2000; + cols[0] = 0; + cols[1] = (ogc->cga.cgacol & 15) + 16; + } - ogc->cga.ma++; + for (x = 0; x < ogc->cga.crtc[1]; x++) { + /* video out */ + if (ogc->cga.cgamode & 8) { + dat = (ogc->cga.vram[((ogc->cga.ma << 1) & 0x1fff) + dat2] << 8) | ogc->cga.vram[((ogc->cga.ma << 1) & 0x1fff) + dat2 + 1]; + } else { + dat = 0; + } + ogc->cga.ma++; - } - } else { - /* 640x400 mode */ - if (ogc->ctrl_3de & 1 ) { - dat2 = ((ogc->cga.sc & 1) * 0x4000) | (ogc->lineff * 0x2000); - cols[0] = 0; cols[1] = 15 + 16; - } - else { - dat2 = (ogc->cga.sc & 1) * 0x2000; - cols[0] = 0; cols[1] = (ogc->cga.cgacol & 15) + 16; - } + for (c = 0; c < 16; c++) { + buffer32->line[ogc->cga.displine][(x << 4) + c + 8] = cols[dat >> 15]; + dat <<= 1; + } + } + } + } else { - for (x = 0; x < ogc->cga.crtc[1]; x++) { - /* video out */ - if (ogc->cga.cgamode & 8) { - dat = (ogc->cga.vram[((ogc->cga.ma << 1) & 0x1fff) + dat2] << 8) | ogc->cga.vram[((ogc->cga.ma << 1) & 0x1fff) + dat2 + 1]; - } else { - dat = 0; - } - ogc->cga.ma++; + /* ogc specific */ + cols[0] = ((ogc->cga.cgamode & 0x12) == 0x12) ? 0 : (ogc->cga.cgacol & 15) + 16; + if (ogc->cga.cgamode & 1) { + hline(buffer32, 0, (ogc->cga.displine << 1), ((ogc->cga.crtc[1] << 3) + 16) << 2, cols[0]); + hline(buffer32, 0, (ogc->cga.displine << 1) + 1, ((ogc->cga.crtc[1] << 3) + 16) << 2, cols[0]); + } else { + hline(buffer32, 0, (ogc->cga.displine << 1), ((ogc->cga.crtc[1] << 4) + 16) << 2, cols[0]); + hline(buffer32, 0, (ogc->cga.displine << 1) + 1, ((ogc->cga.crtc[1] << 4) + 16) << 2, cols[0]); + } + } - for (c = 0; c < 16; c++) { - buffer32->line[ogc->cga.displine][(x << 4) + c + 8] = cols[dat >> 15]; - dat <<= 1; - } - } - } - } else { + /* 80 columns */ + if (ogc->cga.cgamode & 1) + x = (ogc->cga.crtc[1] << 3) + 16; + else + x = (ogc->cga.crtc[1] << 4) + 16; - /* ogc specific */ - cols[0] = ((ogc->cga.cgamode & 0x12) == 0x12) ? 0 : (ogc->cga.cgacol & 15) + 16; - if (ogc->cga.cgamode & 1) { - hline(buffer32, 0, (ogc->cga.displine << 1), ((ogc->cga.crtc[1] << 3) + 16) << 2, cols[0]); - hline(buffer32, 0, (ogc->cga.displine << 1) + 1, ((ogc->cga.crtc[1] << 3) + 16) << 2, cols[0]); - } else { - hline(buffer32, 0, (ogc->cga.displine << 1), ((ogc->cga.crtc[1] << 4) + 16) << 2, cols[0]); - hline(buffer32, 0, (ogc->cga.displine << 1) + 1, ((ogc->cga.crtc[1] << 4) + 16) << 2, cols[0]); - } + if (ogc->cga.composite) { + if (ogc->cga.cgamode & 0x10) + border = 0x00; + else + border = ogc->cga.cgacol & 0x0f; - } + Composite_Process(ogc->cga.cgamode, border, x >> 2, buffer32->line[(ogc->cga.displine << 1)]); + Composite_Process(ogc->cga.cgamode, border, x >> 2, buffer32->line[(ogc->cga.displine << 1) + 1]); + } - /* 80 columns */ - if (ogc->cga.cgamode & 1) - x = (ogc->cga.crtc[1] << 3) + 16; - else - x = (ogc->cga.crtc[1] << 4) + 16; + ogc->cga.sc = oldsc; + if (ogc->cga.vc == ogc->cga.crtc[7] && !ogc->cga.sc) + ogc->cga.cgastat |= 8; + ogc->cga.displine++; + if (ogc->cga.displine >= 720) + ogc->cga.displine = 0; + } else { + timer_advance_u64(&ogc->cga.timer, ogc->cga.dispontime); + if (ogc->cga.cgadispon) + ogc->cga.cgastat &= ~1; + ogc->cga.linepos = 0; + /* ogc specific */ + ogc->lineff ^= 1; + if (ogc->lineff) { + ogc->cga.ma = ogc->cga.maback; + } else { + if (ogc->cga.vsynctime) { + ogc->cga.vsynctime--; + if (!ogc->cga.vsynctime) + ogc->cga.cgastat &= ~8; + } + if (ogc->cga.sc == (ogc->cga.crtc[11] & 31) || ((ogc->cga.crtc[8] & 3) == 3 && ogc->cga.sc == ((ogc->cga.crtc[11] & 31) >> 1))) { + ogc->cga.con = 0; + ogc->cga.coff = 1; + } + if ((ogc->cga.crtc[8] & 3) == 3 && ogc->cga.sc == (ogc->cga.crtc[9] >> 1)) + ogc->cga.maback = ogc->cga.ma; + if (ogc->cga.vadj) { + ogc->cga.sc++; + ogc->cga.sc &= 31; + ogc->cga.ma = ogc->cga.maback; + ogc->cga.vadj--; + if (!ogc->cga.vadj) { + ogc->cga.cgadispon = 1; + ogc->cga.ma = ogc->cga.maback = (ogc->cga.crtc[13] | (ogc->cga.crtc[12] << 8)) & 0x3fff; + ogc->cga.sc = 0; + } + // potrebbe dare problemi con composito + } else if (ogc->cga.sc == ogc->cga.crtc[9] || ((ogc->cga.crtc[8] & 3) == 3 && ogc->cga.sc == (ogc->cga.crtc[9] >> 1))) { + ogc->cga.maback = ogc->cga.ma; + ogc->cga.sc = 0; + oldvc = ogc->cga.vc; + ogc->cga.vc++; + ogc->cga.vc &= 127; - if (ogc->cga.composite) { - if (ogc->cga.cgamode & 0x10) - border = 0x00; - else - border = ogc->cga.cgacol & 0x0f; + if (ogc->cga.vc == ogc->cga.crtc[6]) + ogc->cga.cgadispon = 0; - Composite_Process(ogc->cga.cgamode, border, x >> 2, buffer32->line[(ogc->cga.displine << 1)]); - Composite_Process(ogc->cga.cgamode, border, x >> 2, buffer32->line[(ogc->cga.displine << 1) + 1]); - } + if (oldvc == ogc->cga.crtc[4]) { + ogc->cga.vc = 0; + ogc->cga.vadj = ogc->cga.crtc[5]; + if (!ogc->cga.vadj) { + ogc->cga.cgadispon = 1; + ogc->cga.ma = ogc->cga.maback = (ogc->cga.crtc[13] | (ogc->cga.crtc[12] << 8)) & 0x3fff; + } + switch (ogc->cga.crtc[10] & 0x60) { + case 0x20: + ogc->cga.cursoron = 0; + break; + case 0x60: + ogc->cga.cursoron = ogc->cga.cgablink & 0x10; + break; + default: + ogc->cga.cursoron = ogc->cga.cgablink & 0x08; + break; + } + } + if (ogc->cga.vc == ogc->cga.crtc[7]) { + ogc->cga.cgadispon = 0; + ogc->cga.displine = 0; + /* ogc specific */ + ogc->cga.vsynctime = (ogc->cga.crtc[3] >> 4) + 1; + if (ogc->cga.crtc[7]) { + if (ogc->cga.cgamode & 1) + x = (ogc->cga.crtc[1] << 3) + 16; + else + x = (ogc->cga.crtc[1] << 4) + 16; + ogc->cga.lastline++; + xs_temp = x; + ys_temp = (ogc->cga.lastline - ogc->cga.firstline); - ogc->cga.sc = oldsc; - if (ogc->cga.vc == ogc->cga.crtc[7] && !ogc->cga.sc) - ogc->cga.cgastat |= 8; - ogc->cga.displine++; - if (ogc->cga.displine >= 720) - ogc->cga.displine = 0; - } else { - timer_advance_u64(&ogc->cga.timer, ogc->cga.dispontime); - if (ogc->cga.cgadispon) ogc->cga.cgastat &= ~1; - ogc->cga.linepos = 0; - /* ogc specific */ - ogc->lineff ^= 1; - if (ogc->lineff) { - ogc->cga.ma = ogc->cga.maback; - } else { - if (ogc->cga.vsynctime) { - ogc->cga.vsynctime--; - if (!ogc->cga.vsynctime) - ogc->cga.cgastat &= ~8; - } - if (ogc->cga.sc == (ogc->cga.crtc[11] & 31) || ((ogc->cga.crtc[8] & 3) == 3 && ogc->cga.sc == ((ogc->cga.crtc[11] & 31) >> 1))) { - ogc->cga.con = 0; - ogc->cga.coff = 1; - } - if ((ogc->cga.crtc[8] & 3) == 3 && ogc->cga.sc == (ogc->cga.crtc[9] >> 1)) - ogc->cga.maback = ogc->cga.ma; - if (ogc->cga.vadj) { - ogc->cga.sc++; - ogc->cga.sc &= 31; - ogc->cga.ma = ogc->cga.maback; - ogc->cga.vadj--; - if (!ogc->cga.vadj) { - ogc->cga.cgadispon = 1; - ogc->cga.ma = ogc->cga.maback = (ogc->cga.crtc[13] | (ogc->cga.crtc[12] << 8)) & 0x3fff; - ogc->cga.sc = 0; - } - // potrebbe dare problemi con composito - } else if (ogc->cga.sc == ogc->cga.crtc[9] || ((ogc->cga.crtc[8] & 3) == 3 && ogc->cga.sc == (ogc->cga.crtc[9] >> 1))) { - ogc->cga.maback = ogc->cga.ma; - ogc->cga.sc = 0; - oldvc = ogc->cga.vc; - ogc->cga.vc++; - ogc->cga.vc &= 127; + if ((xs_temp > 0) && (ys_temp > 0)) { + if (xsize < 64) + xs_temp = 656; + /* ogc specific */ + if (ysize < 32) + ys_temp = 200; + if (!enable_overscan) + xs_temp -= 16; - if (ogc->cga.vc == ogc->cga.crtc[6]) - ogc->cga.cgadispon=0; + if ((ogc->cga.cgamode & 8) && ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get())) { + xsize = xs_temp; + ysize = ys_temp; + set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); - if (oldvc == ogc->cga.crtc[4]) { - ogc->cga.vc = 0; - ogc->cga.vadj = ogc->cga.crtc[5]; - if (!ogc->cga.vadj) { - ogc->cga.cgadispon = 1; - ogc->cga.ma = ogc->cga.maback = (ogc->cga.crtc[13] | (ogc->cga.crtc[12] << 8)) & 0x3fff; - } - switch (ogc->cga.crtc[10] & 0x60) { - case 0x20: - ogc->cga.cursoron = 0; - break; - case 0x60: - ogc->cga.cursoron = ogc->cga.cgablink & 0x10; - break; - default: - ogc->cga.cursoron = ogc->cga.cgablink & 0x08; - break; - } - } - if (ogc->cga.vc == ogc->cga.crtc[7]) { - ogc->cga.cgadispon = 0; - ogc->cga.displine = 0; - /* ogc specific */ - ogc->cga.vsynctime = (ogc->cga.crtc[3] >> 4) + 1; - if (ogc->cga.crtc[7]) { - if (ogc->cga.cgamode & 1) - x = (ogc->cga.crtc[1] << 3) + 16; - else - x = (ogc->cga.crtc[1] << 4) + 16; - ogc->cga.lastline++; + if (video_force_resize_get()) + video_force_resize_set(0); + } + /* ogc specific */ + if (enable_overscan) { + if (ogc->cga.composite) + video_blit_memtoscreen(0, (ogc->cga.firstline - 8), + xsize, (ogc->cga.lastline - ogc->cga.firstline) + 16); + else + video_blit_memtoscreen_8(0, (ogc->cga.firstline - 8), + xsize, (ogc->cga.lastline - ogc->cga.firstline) + 16); + } else { + if (ogc->cga.composite) + video_blit_memtoscreen(8, ogc->cga.firstline, + xsize, (ogc->cga.lastline - ogc->cga.firstline)); + else + video_blit_memtoscreen_8(8, ogc->cga.firstline, + xsize, (ogc->cga.lastline - ogc->cga.firstline)); + } + } + frames++; - xs_temp = x; - ys_temp = (ogc->cga.lastline - ogc->cga.firstline); + video_res_x = xsize; + video_res_y = ysize; + /* 80-col */ + if (ogc->cga.cgamode & 1) { + video_res_x /= 8; + video_res_y /= (ogc->cga.crtc[9] + 1) * 2; + video_bpp = 0; + /* 40-col */ + } else if (!(ogc->cga.cgamode & 2)) { + video_res_x /= 16; + video_res_y /= (ogc->cga.crtc[9] + 1) * 2; + video_bpp = 0; + } else if (!(ogc->ctrl_3de & 1)) { + video_res_y /= 2; + video_bpp = 1; + } + } + ogc->cga.firstline = 1000; + ogc->cga.lastline = 0; + ogc->cga.cgablink++; + ogc->cga.oddeven ^= 1; + } + } else { + ogc->cga.sc++; + ogc->cga.sc &= 31; + ogc->cga.ma = ogc->cga.maback; + } - if ((xs_temp > 0) && (ys_temp > 0)) { - if (xsize < 64) xs_temp = 656; - /* ogc specific */ - if (ysize < 32) ys_temp = 200; - if (!enable_overscan) - xs_temp -= 16; + if (ogc->cga.cgadispon) + ogc->cga.cgastat &= ~1; - - if ((ogc->cga.cgamode & 8) && ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get())) { - xsize = xs_temp; - ysize = ys_temp; - set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); - - if (video_force_resize_get()) - video_force_resize_set(0); - } - /* ogc specific */ - if (enable_overscan) { - if (ogc->cga.composite) - video_blit_memtoscreen(0, (ogc->cga.firstline - 8), - xsize, (ogc->cga.lastline - ogc->cga.firstline) + 16); - else - video_blit_memtoscreen_8(0, (ogc->cga.firstline - 8), - xsize, (ogc->cga.lastline - ogc->cga.firstline) + 16); - } else { - if (ogc->cga.composite) - video_blit_memtoscreen(8, ogc->cga.firstline, - xsize, (ogc->cga.lastline - ogc->cga.firstline)); - else - video_blit_memtoscreen_8(8, ogc->cga.firstline, - xsize, (ogc->cga.lastline - ogc->cga.firstline)); - } - } - frames++; - - video_res_x = xsize; - video_res_y = ysize; - /* 80-col */ - if (ogc->cga.cgamode & 1) { - video_res_x /= 8; - video_res_y /= (ogc->cga.crtc[9] + 1) * 2; - video_bpp = 0; - /* 40-col */ - } else if (!(ogc->cga.cgamode & 2)) { - video_res_x /= 16; - video_res_y /= (ogc->cga.crtc[9] + 1) * 2; - video_bpp = 0; - } else if (!(ogc->ctrl_3de & 1)) { - video_res_y /= 2; - video_bpp = 1; - } - } - ogc->cga.firstline = 1000; - ogc->cga.lastline = 0; - ogc->cga.cgablink++; - ogc->cga.oddeven ^= 1; - } - } else { - ogc->cga.sc++; - ogc->cga.sc &= 31; - ogc->cga.ma = ogc->cga.maback; - } - - if (ogc->cga.cgadispon) - ogc->cga.cgastat &= ~1; - - if ((ogc->cga.sc == (ogc->cga.crtc[10] & 31) || ((ogc->cga.crtc[8] & 3) == 3 && ogc->cga.sc == ((ogc->cga.crtc[10] & 31) >> 1)))) - ogc->cga.con = 1; - } - /* 80-columns */ - if (ogc->cga.cgadispon && (ogc->cga.cgamode & 1)) { - for (x = 0; x < (ogc->cga.crtc[1] << 1); x++) - ogc->cga.charbuffer[x] = ogc->cga.vram[(((ogc->cga.ma << 1) + x) & 0x3fff) + ogc->base]; - } - } - } + if ((ogc->cga.sc == (ogc->cga.crtc[10] & 31) || ((ogc->cga.crtc[8] & 3) == 3 && ogc->cga.sc == ((ogc->cga.crtc[10] & 31) >> 1)))) + ogc->cga.con = 1; + } + /* 80-columns */ + if (ogc->cga.cgadispon && (ogc->cga.cgamode & 1)) { + for (x = 0; x < (ogc->cga.crtc[1] << 1); x++) + ogc->cga.charbuffer[x] = ogc->cga.vram[(((ogc->cga.ma << 1) + x) & 0x3fff) + ogc->base]; + } + } + } } void ogc_close(void *priv) { - ogc_t *ogc = (ogc_t *)priv; + ogc_t *ogc = (ogc_t *) priv; free(ogc->cga.vram); free(ogc); @@ -560,33 +550,36 @@ ogc_close(void *priv) void ogc_speed_changed(void *priv) { - ogc_t *ogc = (ogc_t *)priv; + ogc_t *ogc = (ogc_t *) priv; ogc_recalctimings(ogc); } void -ogc_mdaattr_rebuild(){ - int c; +ogc_mdaattr_rebuild() +{ + int c; - for (c = 0; c < 256; c++) { - mdaattr[c][0][0] = mdaattr[c][1][0] = mdaattr[c][1][1] = 16; - if (c & 8) mdaattr[c][0][1] = 15 + 16; - else mdaattr[c][0][1] = 7 + 16; - } + for (c = 0; c < 256; c++) { + mdaattr[c][0][0] = mdaattr[c][1][0] = mdaattr[c][1][1] = 16; + if (c & 8) + mdaattr[c][0][1] = 15 + 16; + else + mdaattr[c][0][1] = 7 + 16; + } - mdaattr[0x70][0][1] = 16; - mdaattr[0x70][0][0] = mdaattr[0x70][1][0] = mdaattr[0x70][1][1] = 16 + 15; - mdaattr[0xF0][0][1] = 16; - mdaattr[0xF0][0][0] = mdaattr[0xF0][1][0] = mdaattr[0xF0][1][1] = 16 + 15; - mdaattr[0x78][0][1] = 16 + 7; - mdaattr[0x78][0][0] = mdaattr[0x78][1][0] = mdaattr[0x78][1][1] = 16 + 15; - mdaattr[0xF8][0][1] = 16 + 7; - mdaattr[0xF8][0][0] = mdaattr[0xF8][1][0] = mdaattr[0xF8][1][1] = 16 + 15; - mdaattr[0x00][0][1] = mdaattr[0x00][1][1] = 16; - mdaattr[0x08][0][1] = mdaattr[0x08][1][1] = 16; - mdaattr[0x80][0][1] = mdaattr[0x80][1][1] = 16; - mdaattr[0x88][0][1] = mdaattr[0x88][1][1] = 16; + mdaattr[0x70][0][1] = 16; + mdaattr[0x70][0][0] = mdaattr[0x70][1][0] = mdaattr[0x70][1][1] = 16 + 15; + mdaattr[0xF0][0][1] = 16; + mdaattr[0xF0][0][0] = mdaattr[0xF0][1][0] = mdaattr[0xF0][1][1] = 16 + 15; + mdaattr[0x78][0][1] = 16 + 7; + mdaattr[0x78][0][0] = mdaattr[0x78][1][0] = mdaattr[0x78][1][1] = 16 + 15; + mdaattr[0xF8][0][1] = 16 + 7; + mdaattr[0xF8][0][0] = mdaattr[0xF8][1][0] = mdaattr[0xF8][1][1] = 16 + 15; + mdaattr[0x00][0][1] = mdaattr[0x00][1][1] = 16; + mdaattr[0x08][0][1] = mdaattr[0x08][1][1] = 16; + mdaattr[0x80][0][1] = mdaattr[0x80][1][1] = 16; + mdaattr[0x88][0][1] = mdaattr[0x88][1][1] = 16; } /* @@ -598,45 +591,45 @@ void * ogc_init(const device_t *info) { // int display_type; - ogc_t *ogc = (ogc_t *)malloc(sizeof(ogc_t)); + ogc_t *ogc = (ogc_t *) malloc(sizeof(ogc_t)); memset(ogc, 0x00, sizeof(ogc_t)); video_inform(VIDEO_FLAG_TYPE_CGA, &timing_ogc); loadfont("roms/video/ogc/ogc graphics board go380 258 pqbq.bin", 1); - /* composite is not working yet */ - // display_type = device_get_config_int("display_type"); - ogc->cga.composite = 0; // (display_type != CGA_RGB); - ogc->cga.revision = device_get_config_int("composite_type"); + /* composite is not working yet */ + // display_type = device_get_config_int("display_type"); + ogc->cga.composite = 0; // (display_type != CGA_RGB); + ogc->cga.revision = device_get_config_int("composite_type"); ogc->cga.snow_enabled = device_get_config_int("snow_enabled"); - ogc->cga.vram = malloc(0x8000); + ogc->cga.vram = malloc(0x8000); - cga_comp_init(ogc->cga.revision); + cga_comp_init(ogc->cga.revision); timer_add(&ogc->cga.timer, ogc_poll, ogc, 1); mem_mapping_add(&ogc->cga.mapping, 0xb8000, 0x08000, - ogc_read, NULL, NULL, - ogc_write, NULL, NULL, NULL, 0, ogc); + ogc_read, NULL, NULL, + ogc_write, NULL, NULL, NULL, 0, ogc); io_sethandler(0x03d0, 16, ogc_in, NULL, NULL, ogc_out, NULL, NULL, ogc); overscan_x = overscan_y = 16; - ogc->cga.rgb_type = device_get_config_int("rgb_type"); - cga_palette = (ogc->cga.rgb_type << 1); + ogc->cga.rgb_type = device_get_config_int("rgb_type"); + cga_palette = (ogc->cga.rgb_type << 1); cgapal_rebuild(); - ogc_mdaattr_rebuild(); + ogc_mdaattr_rebuild(); - /* color display */ - if (device_get_config_int("rgb_type")==0 || device_get_config_int("rgb_type") == 4) - ogc->mono_display = 0; - else - ogc->mono_display = 1; + /* color display */ + if (device_get_config_int("rgb_type") == 0 || device_get_config_int("rgb_type") == 4) + ogc->mono_display = 0; + else + ogc->mono_display = 1; return ogc; } const device_config_t ogc_m24_config[] = { -// clang-format off + // clang-format off { /* Olivetti / ATT compatible displays */ .name = "rgb_type", @@ -678,29 +671,29 @@ const device_config_t ogc_m24_config[] = { }; const device_t ogc_m24_device = { - .name = "Olivetti M21/M24/M28 (GO317/318/380/709) video card", + .name = "Olivetti M21/M24/M28 (GO317/318/380/709) video card", .internal_name = "ogc_m24", - .flags = DEVICE_ISA, - .local = 0, - .init = ogc_init, - .close = ogc_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = ogc_init, + .close = ogc_close, + .reset = NULL, { .available = NULL }, .speed_changed = ogc_speed_changed, - .force_redraw = NULL, - .config = ogc_m24_config + .force_redraw = NULL, + .config = ogc_m24_config }; -const device_t ogc_device = { - .name = "Olivetti OGC (GO708)", +const device_t ogc_device = { + .name = "Olivetti OGC (GO708)", .internal_name = "ogc", - .flags = DEVICE_ISA, - .local = 0, - .init = ogc_init, - .close = ogc_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = ogc_init, + .close = ogc_close, + .reset = NULL, { .available = NULL }, .speed_changed = ogc_speed_changed, - .force_redraw = NULL, - .config = cga_config + .force_redraw = NULL, + .config = cga_config }; diff --git a/src/video/vid_paradise.c b/src/video/vid_paradise.c index 3ca44746c..134947c06 100644 --- a/src/video/vid_paradise.c +++ b/src/video/vid_paradise.c @@ -33,730 +33,752 @@ #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> +typedef struct paradise_t { + svga_t svga; -typedef struct paradise_t -{ - svga_t svga; + rom_t bios_rom; - rom_t bios_rom; + uint8_t bank_mask; - uint8_t bank_mask; + enum { + PVGA1A = 0, + WD90C11, + WD90C30 + } type; - enum - { - PVGA1A = 0, - WD90C11, - WD90C30 - } type; + uint32_t vram_mask; - uint32_t vram_mask; + uint32_t read_bank[4], write_bank[4]; - uint32_t read_bank[4], write_bank[4]; + int interlace; + int check, check2; - int interlace; - int check, check2; + struct { + uint8_t reg_block_ptr; + uint8_t reg_idx; + uint8_t disable_autoinc; - struct { - uint8_t reg_block_ptr; - uint8_t reg_idx; - uint8_t disable_autoinc; + uint16_t int_status; + uint16_t blt_ctrl1, blt_ctrl2; + uint16_t srclow, srchigh; + uint16_t dstlow, dsthigh; - uint16_t int_status; - uint16_t blt_ctrl1, blt_ctrl2; - uint16_t srclow, srchigh; - uint16_t dstlow, dsthigh; + uint32_t srcaddr, dstaddr; - uint32_t srcaddr, dstaddr; - - int invalid_block; - } accel; + int invalid_block; + } accel; } paradise_t; -static video_timings_t timing_paradise_pvga1a = {VIDEO_ISA, 6, 8, 16, 6, 8, 16}; -static video_timings_t timing_paradise_wd90c = {VIDEO_ISA, 3, 3, 6, 5, 5, 10}; +static video_timings_t timing_paradise_pvga1a = { .type = VIDEO_ISA, .write_b = 6, .write_w = 8, .write_l = 16, .read_b = 6, .read_w = 8, .read_l = 16 }; +static video_timings_t timing_paradise_wd90c = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 5, .read_w = 5, .read_l = 10 }; void paradise_remap(paradise_t *paradise); -uint8_t paradise_in(uint16_t addr, void *p) +uint8_t +paradise_in(uint16_t addr, void *p) { - paradise_t *paradise = (paradise_t *)p; - svga_t *svga = ¶dise->svga; + paradise_t *paradise = (paradise_t *) p; + svga_t *svga = ¶dise->svga; - if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x3c5: - if (svga->seqaddr > 7) - { - if (paradise->type < WD90C11 || svga->seqregs[6] != 0x48) - return 0xff; - if (svga->seqaddr > 0x12) - return 0xff; - return svga->seqregs[svga->seqaddr & 0x1f]; - } - break; + switch (addr) { + case 0x3c5: + if (svga->seqaddr > 7) { + if (paradise->type < WD90C11 || svga->seqregs[6] != 0x48) + return 0xff; + if (svga->seqaddr > 0x12) + return 0xff; + return svga->seqregs[svga->seqaddr & 0x1f]; + } + break; - case 0x3c6: case 0x3c7: case 0x3c8: case 0x3c9: - if (paradise->type == WD90C30) - return sc1148x_ramdac_in(addr, 0, svga->ramdac, svga); - return svga_in(addr, svga); + case 0x3c6: + case 0x3c7: + case 0x3c8: + case 0x3c9: + if (paradise->type == WD90C30) + return sc1148x_ramdac_in(addr, 0, svga->ramdac, svga); + return svga_in(addr, svga); - case 0x3cf: - if (svga->gdcaddr >= 9 && svga->gdcaddr <= 0x0e) { - if (svga->gdcreg[0x0f] & 0x10) - return 0xff; - } - switch (svga->gdcaddr) { - case 0x0b: - if (paradise->type == WD90C30) { - if (paradise->vram_mask == ((512 << 10) - 1)) { - svga->gdcreg[0x0b] |= 0xc0; - svga->gdcreg[0x0b] &= ~0x40; - } - } - return svga->gdcreg[0x0b]; - - case 0x0f: - return (svga->gdcreg[0x0f] & 0x17) | 0x80; - } - break; - - case 0x3D4: - return svga->crtcreg; - case 0x3D5: - if ((paradise->type == PVGA1A) && (svga->crtcreg & 0x20)) - return 0xff; - if (svga->crtcreg > 0x29 && svga->crtcreg < 0x30 && (svga->crtc[0x29] & 0x88) != 0x80) - return 0xff; - return svga->crtc[svga->crtcreg]; - } - return svga_in(addr, svga); -} - -void paradise_out(uint16_t addr, uint8_t val, void *p) -{ - paradise_t *paradise = (paradise_t *)p; - svga_t *svga = ¶dise->svga; - uint8_t old; - - if (paradise->vram_mask <= ((512 << 10) - 1)) - paradise->bank_mask = 0x7f; - else - paradise->bank_mask = 0xff; - - if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; - - switch (addr) - { - case 0x3c5: - if (svga->seqaddr > 7) { - if (paradise->type < WD90C11 || svga->seqregs[6] != 0x48) - return; - svga->seqregs[svga->seqaddr & 0x1f] = val; - if (svga->seqaddr == 0x11) { - paradise_remap(paradise); - } - return; - } - break; - - case 0x3c6: case 0x3c7: case 0x3c8: case 0x3c9: - if (paradise->type == WD90C30) - sc1148x_ramdac_out(addr, 0, val, svga->ramdac, svga); - else - svga_out(addr, val, svga); - return; - - case 0x3cf: - if (svga->gdcaddr >= 9 && svga->gdcaddr <= 0x0e) { - if ((svga->gdcreg[0x0f] & 7) != 5) - return; - } - - switch (svga->gdcaddr) { - case 6: - if ((svga->gdcreg[6] & 0x0c) != (val & 0x0c)) { - switch (val & 0x0c) { - case 0x00: /*128k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); - svga->banked_mask = 0xffff; - break; - case 0x04: /*64k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); - svga->banked_mask = 0xffff; - break; - case 0x08: /*32k at B0000*/ - mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); - svga->banked_mask = 0x7fff; - break; - case 0x0c: /*32k at B8000*/ - mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); - svga->banked_mask = 0x7fff; - break; - } - } - svga->gdcreg[6] = val; - paradise_remap(paradise); - return; - - case 9: - case 0x0a: - svga->gdcreg[svga->gdcaddr] = val & paradise->bank_mask; - paradise_remap(paradise); - return; - case 0x0b: - svga->gdcreg[0x0b] = val; - paradise_remap(paradise); - return; - } - break; - - case 0x3D4: - svga->crtcreg = val & 0x3f; - return; - case 0x3D5: - if ((paradise->type == PVGA1A) && (svga->crtcreg & 0x20)) - return; - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - if (svga->crtcreg > 0x29 && (svga->crtc[0x29] & 7) != 5) - return; - if (svga->crtcreg >= 0x31 && svga->crtcreg <= 0x37) - return; - old = svga->crtc[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; - - if (old != val) - { - if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) - { - if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } + case 0x3cf: + if (svga->gdcaddr >= 9 && svga->gdcaddr <= 0x0e) { + if (svga->gdcreg[0x0f] & 0x10) + return 0xff; + } + switch (svga->gdcaddr) { + case 0x0b: + if (paradise->type == WD90C30) { + if (paradise->vram_mask == ((512 << 10) - 1)) { + svga->gdcreg[0x0b] |= 0xc0; + svga->gdcreg[0x0b] &= ~0x40; } - } - break; + } + return svga->gdcreg[0x0b]; - case 0x46e8: - io_removehandler(0x03c0, 0x0020, paradise_in, NULL, NULL, paradise_out, NULL, NULL, paradise); - mem_mapping_disable(¶dise->svga.mapping); - if (val & 8) - { - io_sethandler(0x03c0, 0x0020, paradise_in, NULL, NULL, paradise_out, NULL, NULL, paradise); - mem_mapping_enable(¶dise->svga.mapping); + case 0x0f: + return (svga->gdcreg[0x0f] & 0x17) | 0x80; + } + break; + + case 0x3D4: + return svga->crtcreg; + case 0x3D5: + if ((paradise->type == PVGA1A) && (svga->crtcreg & 0x20)) + return 0xff; + if (svga->crtcreg > 0x29 && svga->crtcreg < 0x30 && (svga->crtc[0x29] & 0x88) != 0x80) + return 0xff; + return svga->crtc[svga->crtcreg]; + } + return svga_in(addr, svga); +} + +void +paradise_out(uint16_t addr, uint8_t val, void *p) +{ + paradise_t *paradise = (paradise_t *) p; + svga_t *svga = ¶dise->svga; + uint8_t old; + + if (paradise->vram_mask <= ((512 << 10) - 1)) + paradise->bank_mask = 0x7f; + else + paradise->bank_mask = 0xff; + + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; + + switch (addr) { + case 0x3c5: + if (svga->seqaddr > 7) { + if (paradise->type < WD90C11 || svga->seqregs[6] != 0x48) + return; + svga->seqregs[svga->seqaddr & 0x1f] = val; + if (svga->seqaddr == 0x11) { + paradise_remap(paradise); } - break; + return; + } + break; + + case 0x3c6: + case 0x3c7: + case 0x3c8: + case 0x3c9: + if (paradise->type == WD90C30) + sc1148x_ramdac_out(addr, 0, val, svga->ramdac, svga); + else + svga_out(addr, val, svga); + return; + + case 0x3cf: + if (svga->gdcaddr >= 9 && svga->gdcaddr <= 0x0e) { + if ((svga->gdcreg[0x0f] & 7) != 5) + return; + } + + switch (svga->gdcaddr) { + case 6: + if ((svga->gdcreg[6] & 0x0c) != (val & 0x0c)) { + switch (val & 0x0c) { + case 0x00: /*128k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); + svga->banked_mask = 0xffff; + break; + case 0x04: /*64k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + svga->banked_mask = 0xffff; + break; + case 0x08: /*32k at B0000*/ + mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); + svga->banked_mask = 0x7fff; + break; + case 0x0c: /*32k at B8000*/ + mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); + svga->banked_mask = 0x7fff; + break; + } + } + svga->gdcreg[6] = val; + paradise_remap(paradise); + return; + + case 9: + case 0x0a: + svga->gdcreg[svga->gdcaddr] = val & paradise->bank_mask; + paradise_remap(paradise); + return; + case 0x0b: + svga->gdcreg[0x0b] = val; + paradise_remap(paradise); + return; + } + break; + + case 0x3D4: + svga->crtcreg = val & 0x3f; + return; + case 0x3D5: + if ((paradise->type == PVGA1A) && (svga->crtcreg & 0x20)) + return; + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + if (svga->crtcreg > 0x29 && (svga->crtc[0x29] & 7) != 5) + return; + if (svga->crtcreg >= 0x31 && svga->crtcreg <= 0x37) + return; + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; + + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + } + } + break; + + case 0x46e8: + io_removehandler(0x03c0, 0x0020, paradise_in, NULL, NULL, paradise_out, NULL, NULL, paradise); + mem_mapping_disable(¶dise->svga.mapping); + if (val & 8) { + io_sethandler(0x03c0, 0x0020, paradise_in, NULL, NULL, paradise_out, NULL, NULL, paradise); + mem_mapping_enable(¶dise->svga.mapping); + } + break; + } + + svga_out(addr, val, svga); +} + +void +paradise_remap(paradise_t *paradise) +{ + svga_t *svga = ¶dise->svga; + paradise->check = 0; + + if (svga->seqregs[0x11] & 0x80) { + paradise->read_bank[0] = paradise->read_bank[2] = svga->gdcreg[9] << 12; + paradise->read_bank[1] = paradise->read_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); + paradise->write_bank[0] = paradise->write_bank[2] = svga->gdcreg[0x0a] << 12; + paradise->write_bank[1] = paradise->write_bank[3] = (svga->gdcreg[0x0a] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); + } else if (svga->gdcreg[0x0b] & 0x08) { + if (svga->gdcreg[6] & 0x0c) { + paradise->read_bank[0] = paradise->read_bank[2] = svga->gdcreg[0x0a] << 12; + paradise->write_bank[0] = paradise->write_bank[2] = svga->gdcreg[0x0a] << 12; + paradise->read_bank[1] = paradise->read_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); + paradise->write_bank[1] = paradise->write_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); + } else { + paradise->read_bank[0] = paradise->write_bank[0] = svga->gdcreg[0x0a] << 12; + paradise->read_bank[1] = paradise->write_bank[1] = (svga->gdcreg[0xa] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); + paradise->read_bank[2] = paradise->write_bank[2] = svga->gdcreg[9] << 12; + paradise->read_bank[3] = paradise->write_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); } + } else { + paradise->read_bank[0] = paradise->read_bank[2] = svga->gdcreg[9] << 12; + paradise->read_bank[1] = paradise->read_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); + paradise->write_bank[0] = paradise->write_bank[2] = svga->gdcreg[9] << 12; + paradise->write_bank[1] = paradise->write_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); + } - svga_out(addr, val, svga); + if ((((svga->gdcreg[0x0b] & 0xc0) == 0xc0) && !svga->chain4 && (svga->crtc[0x14] & 0x40) && ((svga->gdcreg[6] >> 2) & 3) == 1)) + paradise->check = 1; + + if (paradise->bank_mask == 0x7f) { + paradise->read_bank[1] &= 0x7ffff; + paradise->write_bank[1] &= 0x7ffff; + } } -void paradise_remap(paradise_t *paradise) +void +paradise_recalctimings(svga_t *svga) { - svga_t *svga = ¶dise->svga; - paradise->check = 0; + paradise_t *paradise = (paradise_t *) svga->p; - if (svga->seqregs[0x11] & 0x80) { - paradise->read_bank[0] = paradise->read_bank[2] = svga->gdcreg[9] << 12; - paradise->read_bank[1] = paradise->read_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); - paradise->write_bank[0] = paradise->write_bank[2] = svga->gdcreg[0x0a] << 12; - paradise->write_bank[1] = paradise->write_bank[3] = (svga->gdcreg[0x0a] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); - } else if (svga->gdcreg[0x0b] & 0x08) { - if (svga->gdcreg[6] & 0x0c) { - paradise->read_bank[0] = paradise->read_bank[2] = svga->gdcreg[0x0a] << 12; - paradise->write_bank[0] = paradise->write_bank[2] = svga->gdcreg[0x0a] << 12; - paradise->read_bank[1] = paradise->read_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); - paradise->write_bank[1] = paradise->write_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); - } else { - paradise->read_bank[0] = paradise->write_bank[0] = svga->gdcreg[0x0a] << 12; - paradise->read_bank[1] = paradise->write_bank[1] = (svga->gdcreg[0xa] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); - paradise->read_bank[2] = paradise->write_bank[2] = svga->gdcreg[9] << 12; - paradise->read_bank[3] = paradise->write_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); - } - } else { - paradise->read_bank[0] = paradise->read_bank[2] = svga->gdcreg[9] << 12; - paradise->read_bank[1] = paradise->read_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); - paradise->write_bank[0] = paradise->write_bank[2] = svga->gdcreg[9] << 12; - paradise->write_bank[1] = paradise->write_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000); - } + svga->lowres = !(svga->gdcreg[0x0e] & 0x01); - if ((((svga->gdcreg[0x0b] & 0xc0) == 0xc0) && !svga->chain4 && (svga->crtc[0x14] & 0x40) && ((svga->gdcreg[6] >> 2) & 3) == 1)) - paradise->check = 1; + if (paradise->type == WD90C30) { + if (svga->crtc[0x3e] & 0x01) + svga->vtotal |= 0x400; + if (svga->crtc[0x3e] & 0x02) + svga->dispend |= 0x400; + if (svga->crtc[0x3e] & 0x04) + svga->vsyncstart |= 0x400; + if (svga->crtc[0x3e] & 0x08) + svga->vblankstart |= 0x400; + if (svga->crtc[0x3e] & 0x10) + svga->split |= 0x400; - if (paradise->bank_mask == 0x7f) { - paradise->read_bank[1] &= 0x7ffff; - paradise->write_bank[1] &= 0x7ffff; - } + svga->interlace = !!(svga->crtc[0x2d] & 0x20); + + if (!svga->interlace && svga->lowres && (svga->hdisp >= 1024) && ((svga->gdcreg[5] & 0x60) == 0) && (svga->miscout >= 0x27) && (svga->miscout <= 0x2f) && ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1))) { /*Horrible tweak to re-enable the interlace after returning to + a windowed DOS box in Win3.x*/ + svga->interlace = 1; + } + } + + if (paradise->type < WD90C30) { + if (svga->bpp >= 8 && !svga->lowres) { + svga->render = svga_render_8bpp_highres; + } + } else { + if (svga->bpp >= 8 && !svga->lowres) { + if (svga->bpp == 16) { + svga->render = svga_render_16bpp_highres; + svga->hdisp >>= 1; + } else if (svga->bpp == 15) { + svga->render = svga_render_15bpp_highres; + svga->hdisp >>= 1; + } else { + svga->render = svga_render_8bpp_highres; + } + } + } } -void paradise_recalctimings(svga_t *svga) +static void +paradise_write(uint32_t addr, uint8_t val, void *p) { - paradise_t *paradise = (paradise_t *) svga->p; + paradise_t *paradise = (paradise_t *) p; + svga_t *svga = ¶dise->svga; + uint32_t prev_addr, prev_addr2; - svga->lowres = !(svga->gdcreg[0x0e] & 0x01); + addr = (addr & 0x7fff) + paradise->write_bank[(addr >> 15) & 3]; - if (paradise->type == WD90C30) { - if (svga->crtc[0x3e] & 0x01) svga->vtotal |= 0x400; - if (svga->crtc[0x3e] & 0x02) svga->dispend |= 0x400; - if (svga->crtc[0x3e] & 0x04) svga->vsyncstart |= 0x400; - if (svga->crtc[0x3e] & 0x08) svga->vblankstart |= 0x400; - if (svga->crtc[0x3e] & 0x10) svga->split |= 0x400; + /*Could be done in a better way but it works.*/ + if (!svga->lowres) { + if (paradise->check) { + prev_addr = addr & 3; + prev_addr2 = addr & 0xfffc; + if ((addr & 3) == 3) { + if ((addr & 0x30000) == 0x20000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x10000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x00000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } else if ((addr & 3) == 2) { + if ((addr & 0x30000) == 0x30000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x10000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x00000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } else if ((addr & 3) == 1) { + if ((addr & 0x30000) == 0x30000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x20000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x00000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } else if ((addr & 3) == 0) { + if ((addr & 0x30000) == 0x30000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x20000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x10000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } + } + } - svga->interlace = !!(svga->crtc[0x2d] & 0x20); + svga_write_linear(addr, val, svga); +} +static void +paradise_writew(uint32_t addr, uint16_t val, void *p) +{ + paradise_t *paradise = (paradise_t *) p; + svga_t *svga = ¶dise->svga; + uint32_t prev_addr, prev_addr2; - if (!svga->interlace && svga->lowres && (svga->hdisp >= 1024) && - ((svga->gdcreg[5] & 0x60) == 0) && (svga->miscout >= 0x27) && - (svga->miscout <= 0x2f) && ((svga->gdcreg[6] & 1) || - (svga->attrregs[0x10] & 1))) { /*Horrible tweak to re-enable the interlace after returning to - a windowed DOS box in Win3.x*/ - svga->interlace = 1; - } - } + addr = (addr & 0x7fff) + paradise->write_bank[(addr >> 15) & 3]; - if (paradise->type < WD90C30) { - if (svga->bpp >= 8 && !svga->lowres) { - svga->render = svga_render_8bpp_highres; - } - } else { - if (svga->bpp >= 8 && !svga->lowres) { - if (svga->bpp == 16) { - svga->render = svga_render_16bpp_highres; - svga->hdisp >>= 1; - } else if (svga->bpp == 15) { - svga->render = svga_render_15bpp_highres; - svga->hdisp >>= 1; - } else { - svga->render = svga_render_8bpp_highres; - } - } - } + /*Could be done in a better way but it works.*/ + if (!svga->lowres) { + if (paradise->check) { + prev_addr = addr & 3; + prev_addr2 = addr & 0xfffc; + if ((addr & 3) == 3) { + if ((addr & 0x30000) == 0x20000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x10000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x00000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } else if ((addr & 3) == 2) { + if ((addr & 0x30000) == 0x30000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x10000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x00000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } else if ((addr & 3) == 1) { + if ((addr & 0x30000) == 0x30000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x20000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x00000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } else if ((addr & 3) == 0) { + if ((addr & 0x30000) == 0x30000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x20000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x10000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } + } + } + + svga_writew_linear(addr, val, svga); } -static void paradise_write(uint32_t addr, uint8_t val, void *p) +static uint8_t +paradise_read(uint32_t addr, void *p) { - paradise_t *paradise = (paradise_t *)p; - svga_t *svga = ¶dise->svga; - uint32_t prev_addr, prev_addr2; + paradise_t *paradise = (paradise_t *) p; + svga_t *svga = ¶dise->svga; + uint32_t prev_addr, prev_addr2; - addr = (addr & 0x7fff) + paradise->write_bank[(addr >> 15) & 3]; + addr = (addr & 0x7fff) + paradise->read_bank[(addr >> 15) & 3]; - /*Could be done in a better way but it works.*/ - if (!svga->lowres) { - if (paradise->check) { - prev_addr = addr & 3; - prev_addr2 = addr & 0xfffc; - if ((addr & 3) == 3) { - if ((addr & 0x30000) == 0x20000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x10000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x00000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } else if ((addr & 3) == 2) { - if ((addr & 0x30000) == 0x30000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x10000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x00000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } else if ((addr & 3) == 1) { - if ((addr & 0x30000) == 0x30000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x20000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x00000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } else if ((addr & 3) == 0) { - if ((addr & 0x30000) == 0x30000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x20000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x10000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } - } - } + /*Could be done in a better way but it works.*/ + if (!svga->lowres) { + if (paradise->check) { + prev_addr = addr & 3; + prev_addr2 = addr & 0xfffc; + if ((addr & 3) == 3) { + if ((addr & 0x30000) == 0x20000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x10000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x00000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } else if ((addr & 3) == 2) { + if ((addr & 0x30000) == 0x30000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x10000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x00000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } else if ((addr & 3) == 1) { + if ((addr & 0x30000) == 0x30000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x20000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x00000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } else if ((addr & 3) == 0) { + if ((addr & 0x30000) == 0x30000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x20000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x10000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } + } + } - svga_write_linear(addr, val, svga); + return svga_read_linear(addr, svga); } -static void paradise_writew(uint32_t addr, uint16_t val, void *p) +static uint16_t +paradise_readw(uint32_t addr, void *p) { - paradise_t *paradise = (paradise_t *)p; - svga_t *svga = ¶dise->svga; - uint32_t prev_addr, prev_addr2; + paradise_t *paradise = (paradise_t *) p; + svga_t *svga = ¶dise->svga; + uint32_t prev_addr, prev_addr2; - addr = (addr & 0x7fff) + paradise->write_bank[(addr >> 15) & 3]; + addr = (addr & 0x7fff) + paradise->read_bank[(addr >> 15) & 3]; - /*Could be done in a better way but it works.*/ - if (!svga->lowres) { - if (paradise->check) { - prev_addr = addr & 3; - prev_addr2 = addr & 0xfffc; - if ((addr & 3) == 3) { - if ((addr & 0x30000) == 0x20000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x10000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x00000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } else if ((addr & 3) == 2) { - if ((addr & 0x30000) == 0x30000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x10000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x00000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } else if ((addr & 3) == 1) { - if ((addr & 0x30000) == 0x30000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x20000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x00000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } else if ((addr & 3) == 0) { - if ((addr & 0x30000) == 0x30000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x20000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x10000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } - } - } + /*Could be done in a better way but it works.*/ + if (!svga->lowres) { + if (paradise->check) { + prev_addr = addr & 3; + prev_addr2 = addr & 0xfffc; + if ((addr & 3) == 3) { + if ((addr & 0x30000) == 0x20000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x10000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x00000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } else if ((addr & 3) == 2) { + if ((addr & 0x30000) == 0x30000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x10000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x00000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } else if ((addr & 3) == 1) { + if ((addr & 0x30000) == 0x30000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x20000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x00000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } else if ((addr & 3) == 0) { + if ((addr & 0x30000) == 0x30000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x20000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + else if ((addr & 0x30000) == 0x10000) + addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; + } + } + } - svga_writew_linear(addr, val, svga); + return svga_readw_linear(addr, svga); } -static uint8_t paradise_read(uint32_t addr, void *p) +void * +paradise_init(const device_t *info, uint32_t memsize) { - paradise_t *paradise = (paradise_t *)p; - svga_t *svga = ¶dise->svga; - uint32_t prev_addr, prev_addr2; + paradise_t *paradise = malloc(sizeof(paradise_t)); + svga_t *svga = ¶dise->svga; + memset(paradise, 0, sizeof(paradise_t)); - addr = (addr & 0x7fff) + paradise->read_bank[(addr >> 15) & 3]; + if (info->local == PVGA1A) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_paradise_pvga1a); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_paradise_wd90c); - /*Could be done in a better way but it works.*/ - if (!svga->lowres) { - if (paradise->check) { - prev_addr = addr & 3; - prev_addr2 = addr & 0xfffc; - if ((addr & 3) == 3) { - if ((addr & 0x30000) == 0x20000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x10000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x00000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } else if ((addr & 3) == 2) { - if ((addr & 0x30000) == 0x30000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x10000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x00000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } else if ((addr & 3) == 1) { - if ((addr & 0x30000) == 0x30000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x20000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x00000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } else if ((addr & 3) == 0) { - if ((addr & 0x30000) == 0x30000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x20000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x10000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } - } - } + switch (info->local) { + case PVGA1A: + svga_init(info, svga, paradise, memsize, /*256kb*/ + paradise_recalctimings, + paradise_in, paradise_out, + NULL, + NULL); + paradise->vram_mask = memsize - 1; + svga->decode_mask = memsize - 1; + break; + case WD90C11: + svga_init(info, svga, paradise, 1 << 19, /*512kb*/ + paradise_recalctimings, + paradise_in, paradise_out, + NULL, + NULL); + paradise->vram_mask = (1 << 19) - 1; + svga->decode_mask = (1 << 19) - 1; + break; + case WD90C30: + svga_init(info, svga, paradise, memsize, + paradise_recalctimings, + paradise_in, paradise_out, + NULL, + NULL); + paradise->vram_mask = memsize - 1; + svga->decode_mask = memsize - 1; + svga->ramdac = device_add(&sc11487_ramdac_device); /*Actually a Winbond W82c487-80, probably a clone.*/ + break; + } - return svga_read_linear(addr, svga); -} -static uint16_t paradise_readw(uint32_t addr, void *p) -{ - paradise_t *paradise = (paradise_t *)p; - svga_t *svga = ¶dise->svga; - uint32_t prev_addr, prev_addr2; + mem_mapping_set_handler(&svga->mapping, paradise_read, paradise_readw, NULL, paradise_write, paradise_writew, NULL); + mem_mapping_set_p(&svga->mapping, paradise); - addr = (addr & 0x7fff) + paradise->read_bank[(addr >> 15) & 3]; + io_sethandler(0x03c0, 0x0020, paradise_in, NULL, NULL, paradise_out, NULL, NULL, paradise); - /*Could be done in a better way but it works.*/ - if (!svga->lowres) { - if (paradise->check) { - prev_addr = addr & 3; - prev_addr2 = addr & 0xfffc; - if ((addr & 3) == 3) { - if ((addr & 0x30000) == 0x20000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x10000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x00000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } else if ((addr & 3) == 2) { - if ((addr & 0x30000) == 0x30000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x10000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x00000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } else if ((addr & 3) == 1) { - if ((addr & 0x30000) == 0x30000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x20000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x00000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } else if ((addr & 3) == 0) { - if ((addr & 0x30000) == 0x30000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x20000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - else if ((addr & 0x30000) == 0x10000) - addr = (addr >> 16) | (prev_addr << 16) | prev_addr2; - } - } - } + /* Common to all three types. */ + svga->crtc[0x31] = 'W'; + svga->crtc[0x32] = 'D'; + svga->crtc[0x33] = '9'; + svga->crtc[0x34] = '0'; + svga->crtc[0x35] = 'C'; - return svga_readw_linear(addr, svga); + switch (info->local) { + case WD90C11: + svga->crtc[0x36] = '1'; + svga->crtc[0x37] = '1'; + io_sethandler(0x46e8, 0x0001, paradise_in, NULL, NULL, paradise_out, NULL, NULL, paradise); + break; + case WD90C30: + svga->crtc[0x36] = '3'; + svga->crtc[0x37] = '0'; + break; + } + + svga->bpp = 8; + svga->miscout = 1; + + paradise->type = info->local; + + return paradise; } -void *paradise_init(const device_t *info, uint32_t memsize) +static void * +paradise_pvga1a_ncr3302_init(const device_t *info) { - paradise_t *paradise = malloc(sizeof(paradise_t)); - svga_t *svga = ¶dise->svga; - memset(paradise, 0, sizeof(paradise_t)); + paradise_t *paradise = paradise_init(info, 1 << 18); - if (info->local == PVGA1A) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_paradise_pvga1a); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_paradise_wd90c); + if (paradise) + rom_init(¶dise->bios_rom, "roms/machines/3302/c000-wd_1987-1989-740011-003058-019c.bin", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - switch(info->local) { - case PVGA1A: - svga_init(info, svga, paradise, memsize, /*256kb*/ - paradise_recalctimings, - paradise_in, paradise_out, - NULL, - NULL); - paradise->vram_mask = memsize - 1; - svga->decode_mask = memsize - 1; - break; - case WD90C11: - svga_init(info, svga, paradise, 1 << 19, /*512kb*/ - paradise_recalctimings, - paradise_in, paradise_out, - NULL, - NULL); - paradise->vram_mask = (1 << 19) - 1; - svga->decode_mask = (1 << 19) - 1; - break; - case WD90C30: - svga_init(info, svga, paradise, memsize, - paradise_recalctimings, - paradise_in, paradise_out, - NULL, - NULL); - paradise->vram_mask = memsize - 1; - svga->decode_mask = memsize - 1; - svga->ramdac = device_add(&sc11487_ramdac_device); /*Actually a Winbond W82c487-80, probably a clone.*/ - break; - } - - mem_mapping_set_handler(&svga->mapping, paradise_read, paradise_readw, NULL, paradise_write, paradise_writew, NULL); - mem_mapping_set_p(&svga->mapping, paradise); - - io_sethandler(0x03c0, 0x0020, paradise_in, NULL, NULL, paradise_out, NULL, NULL, paradise); - - /* Common to all three types. */ - svga->crtc[0x31] = 'W'; - svga->crtc[0x32] = 'D'; - svga->crtc[0x33] = '9'; - svga->crtc[0x34] = '0'; - svga->crtc[0x35] = 'C'; - - switch(info->local) { - case WD90C11: - svga->crtc[0x36] = '1'; - svga->crtc[0x37] = '1'; - io_sethandler(0x46e8, 0x0001, paradise_in, NULL, NULL, paradise_out, NULL, NULL, paradise); - break; - case WD90C30: - svga->crtc[0x36] = '3'; - svga->crtc[0x37] = '0'; - break; - } - - svga->bpp = 8; - svga->miscout = 1; - - paradise->type = info->local; - - return paradise; + return paradise; } -static void *paradise_pvga1a_ncr3302_init(const device_t *info) +static void * +paradise_pvga1a_pc2086_init(const device_t *info) { - paradise_t *paradise = paradise_init(info, 1 << 18); + paradise_t *paradise = paradise_init(info, 1 << 18); - if (paradise) - rom_init(¶dise->bios_rom, "roms/machines/3302/c000-wd_1987-1989-740011-003058-019c.bin", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + if (paradise) + rom_init(¶dise->bios_rom, "roms/machines/pc2086/40186.ic171", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - return paradise; + return paradise; } -static void *paradise_pvga1a_pc2086_init(const device_t *info) +static void * +paradise_pvga1a_pc3086_init(const device_t *info) { - paradise_t *paradise = paradise_init(info, 1 << 18); + paradise_t *paradise = paradise_init(info, 1 << 18); - if (paradise) - rom_init(¶dise->bios_rom, "roms/machines/pc2086/40186.ic171", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + if (paradise) + rom_init(¶dise->bios_rom, "roms/machines/pc3086/c000.bin", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - return paradise; + return paradise; } -static void *paradise_pvga1a_pc3086_init(const device_t *info) +static void * +paradise_pvga1a_standalone_init(const device_t *info) { - paradise_t *paradise = paradise_init(info, 1 << 18); + paradise_t *paradise; + uint32_t memory = 512; - if (paradise) - rom_init(¶dise->bios_rom, "roms/machines/pc3086/c000.bin", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + memory = device_get_config_int("memory"); + memory <<= 10; - return paradise; + paradise = paradise_init(info, memory); + + if (paradise) + rom_init(¶dise->bios_rom, "roms/video/pvga1a/BIOS.BIN", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + + return paradise; } -static void *paradise_pvga1a_standalone_init(const device_t *info) +static int +paradise_pvga1a_standalone_available(void) { - paradise_t *paradise; - uint32_t memory = 512; - - memory = device_get_config_int("memory"); - memory <<= 10; - - paradise = paradise_init(info, memory); - - if (paradise) - rom_init(¶dise->bios_rom, "roms/video/pvga1a/BIOS.BIN", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - - return paradise; + return rom_present("roms/video/pvga1a/BIOS.BIN"); } -static int paradise_pvga1a_standalone_available(void) +static void * +paradise_wd90c11_megapc_init(const device_t *info) { - return rom_present("roms/video/pvga1a/BIOS.BIN"); + paradise_t *paradise = paradise_init(info, 0); + + if (paradise) + rom_init_interleaved(¶dise->bios_rom, + "roms/machines/megapc/41651-bios lo.u18", + "roms/machines/megapc/211253-bios hi.u19", + 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + + return paradise; } -static void *paradise_wd90c11_megapc_init(const device_t *info) +static void * +paradise_wd90c11_standalone_init(const device_t *info) { - paradise_t *paradise = paradise_init(info, 0); + paradise_t *paradise = paradise_init(info, 0); - if (paradise) - rom_init_interleaved(¶dise->bios_rom, - "roms/machines/megapc/41651-bios lo.u18", - "roms/machines/megapc/211253-bios hi.u19", - 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + if (paradise) + rom_init(¶dise->bios_rom, "roms/video/wd90c11/WD90C11.VBI", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - return paradise; + return paradise; } -static void *paradise_wd90c11_standalone_init(const device_t *info) +static int +paradise_wd90c11_standalone_available(void) { - paradise_t *paradise = paradise_init(info, 0); - - if (paradise) - rom_init(¶dise->bios_rom, "roms/video/wd90c11/WD90C11.VBI", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - - return paradise; + return rom_present("roms/video/wd90c11/WD90C11.VBI"); } -static int paradise_wd90c11_standalone_available(void) +static void * +paradise_wd90c30_standalone_init(const device_t *info) { - return rom_present("roms/video/wd90c11/WD90C11.VBI"); + paradise_t *paradise; + uint32_t memory = 512; + + memory = device_get_config_int("memory"); + memory <<= 10; + + paradise = paradise_init(info, memory); + + if (paradise) + rom_init(¶dise->bios_rom, "roms/video/wd90c30/90C30-LR.VBI", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + + return paradise; } -static void *paradise_wd90c30_standalone_init(const device_t *info) +static int +paradise_wd90c30_standalone_available(void) { - paradise_t *paradise; - uint32_t memory = 512; - - memory = device_get_config_int("memory"); - memory <<= 10; - - paradise = paradise_init(info, memory); - - if (paradise) - rom_init(¶dise->bios_rom, "roms/video/wd90c30/90C30-LR.VBI", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - - return paradise; + return rom_present("roms/video/wd90c30/90C30-LR.VBI"); } -static int paradise_wd90c30_standalone_available(void) +void +paradise_close(void *p) { - return rom_present("roms/video/wd90c30/90C30-LR.VBI"); + paradise_t *paradise = (paradise_t *) p; + + svga_close(¶dise->svga); + + free(paradise); } -void paradise_close(void *p) +void +paradise_speed_changed(void *p) { - paradise_t *paradise = (paradise_t *)p; + paradise_t *paradise = (paradise_t *) p; - svga_close(¶dise->svga); - - free(paradise); + svga_recalctimings(¶dise->svga); } -void paradise_speed_changed(void *p) +void +paradise_force_redraw(void *p) { - paradise_t *paradise = (paradise_t *)p; + paradise_t *paradise = (paradise_t *) p; - svga_recalctimings(¶dise->svga); -} - -void paradise_force_redraw(void *p) -{ - paradise_t *paradise = (paradise_t *)p; - - paradise->svga.fullchange = changeframecount; + paradise->svga.fullchange = changeframecount; } const device_t paradise_pvga1a_pc2086_device = { - .name = "Paradise PVGA1A (Amstrad PC2086)", + .name = "Paradise PVGA1A (Amstrad PC2086)", .internal_name = "pvga1a_pc2086", - .flags = 0, - .local = PVGA1A, - .init = paradise_pvga1a_pc2086_init, - .close = paradise_close, - .reset = NULL, + .flags = 0, + .local = PVGA1A, + .init = paradise_pvga1a_pc2086_init, + .close = paradise_close, + .reset = NULL, { .available = NULL }, .speed_changed = paradise_speed_changed, - .force_redraw = paradise_force_redraw, - .config = NULL + .force_redraw = paradise_force_redraw, + .config = NULL }; const device_t paradise_pvga1a_pc3086_device = { - .name = "Paradise PVGA1A (Amstrad PC3086)", + .name = "Paradise PVGA1A (Amstrad PC3086)", .internal_name = "pvga1a_pc3086", - .flags = 0, - .local = PVGA1A, - .init = paradise_pvga1a_pc3086_init, - .close = paradise_close, - .reset = NULL, + .flags = 0, + .local = PVGA1A, + .init = paradise_pvga1a_pc3086_init, + .close = paradise_close, + .reset = NULL, { .available = NULL }, .speed_changed = paradise_speed_changed, - .force_redraw = paradise_force_redraw, - .config = NULL + .force_redraw = paradise_force_redraw, + .config = NULL }; static const device_config_t paradise_pvga1a_config[] = { + // clang-format off { .name = "memory", .description = "Memory size", @@ -779,66 +801,67 @@ static const device_config_t paradise_pvga1a_config[] = { { .type = CONFIG_END } + // clang-format on }; const device_t paradise_pvga1a_ncr3302_device = { - .name = "Paradise PVGA1A (NCR 3302)", + .name = "Paradise PVGA1A (NCR 3302)", .internal_name = "pvga1a_ncr3302", - .flags = 0, - .local = PVGA1A, - .init = paradise_pvga1a_ncr3302_init, - .close = paradise_close, - .reset = NULL, + .flags = 0, + .local = PVGA1A, + .init = paradise_pvga1a_ncr3302_init, + .close = paradise_close, + .reset = NULL, { .available = NULL }, .speed_changed = paradise_speed_changed, - .force_redraw = paradise_force_redraw, - .config = paradise_pvga1a_config + .force_redraw = paradise_force_redraw, + .config = paradise_pvga1a_config }; const device_t paradise_pvga1a_device = { - .name = "Paradise PVGA1A", + .name = "Paradise PVGA1A", .internal_name = "pvga1a", - .flags = DEVICE_ISA, - .local = PVGA1A, - .init = paradise_pvga1a_standalone_init, - .close = paradise_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PVGA1A, + .init = paradise_pvga1a_standalone_init, + .close = paradise_close, + .reset = NULL, { .available = paradise_pvga1a_standalone_available }, .speed_changed = paradise_speed_changed, - .force_redraw = paradise_force_redraw, - .config = paradise_pvga1a_config + .force_redraw = paradise_force_redraw, + .config = paradise_pvga1a_config }; const device_t paradise_wd90c11_megapc_device = { - .name = "Paradise WD90C11 (Amstrad MegaPC)", + .name = "Paradise WD90C11 (Amstrad MegaPC)", .internal_name = "wd90c11_megapc", - .flags = 0, - .local = WD90C11, - .init = paradise_wd90c11_megapc_init, - .close = paradise_close, - .reset = NULL, + .flags = 0, + .local = WD90C11, + .init = paradise_wd90c11_megapc_init, + .close = paradise_close, + .reset = NULL, { .available = NULL }, .speed_changed = paradise_speed_changed, - .force_redraw = paradise_force_redraw, - .config = NULL + .force_redraw = paradise_force_redraw, + .config = NULL }; const device_t paradise_wd90c11_device = { - .name = "Paradise WD90C11-LR", + .name = "Paradise WD90C11-LR", .internal_name = "wd90c11", - .flags = DEVICE_ISA, - .local = WD90C11, - .init = paradise_wd90c11_standalone_init, - .close = paradise_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = WD90C11, + .init = paradise_wd90c11_standalone_init, + .close = paradise_close, + .reset = NULL, { .available = paradise_wd90c11_standalone_available }, .speed_changed = paradise_speed_changed, - .force_redraw = paradise_force_redraw, - .config = NULL + .force_redraw = paradise_force_redraw, + .config = NULL }; static const device_config_t paradise_wd90c30_config[] = { -// clang-format off + // clang-format off { .name = "memory", .description = "Memory size", @@ -865,15 +888,15 @@ static const device_config_t paradise_wd90c30_config[] = { }; const device_t paradise_wd90c30_device = { - .name = "Paradise WD90C30-LR", + .name = "Paradise WD90C30-LR", .internal_name = "wd90c30", - .flags = DEVICE_ISA, - .local = WD90C30, - .init = paradise_wd90c30_standalone_init, - .close = paradise_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = WD90C30, + .init = paradise_wd90c30_standalone_init, + .close = paradise_close, + .reset = NULL, { .available = paradise_wd90c30_standalone_available }, .speed_changed = paradise_speed_changed, - .force_redraw = paradise_force_redraw, - .config = paradise_wd90c30_config + .force_redraw = paradise_force_redraw, + .config = paradise_wd90c30_config }; diff --git a/src/video/vid_pgc.c b/src/video/vid_pgc.c index d810536b3..dddbaee45 100644 --- a/src/video/vid_pgc.c +++ b/src/video/vid_pgc.c @@ -92,15 +92,13 @@ #include <86box/vid_cga.h> #include <86box/vid_pgc.h> +#define PGC_CGA_WIDTH 640 +#define PGC_CGA_HEIGHT 400 -#define PGC_CGA_WIDTH 640 -#define PGC_CGA_HEIGHT 400 - -#define HWORD(u) ((u) >> 16) -#define LWORD(u) ((u) & 0xffff) - -#define WAKE_DELAY (TIMER_USEC * 500) +#define HWORD(u) ((u) >> 16) +#define LWORD(u) ((u) &0xffff) +#define WAKE_DELAY (TIMER_USEC * 500) static const char *pgc_err_msgs[] = { "Range \r", @@ -117,43 +115,37 @@ static const char *pgc_err_msgs[] = { "Unknown \r" }; - /* Initial palettes */ static const uint32_t init_palette[6][256] = { #include <86box/vid_pgc_palette.h> }; - -static video_timings_t timing_pgc = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; - +static video_timings_t timing_pgc = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; #ifdef ENABLE_PGC_LOG int pgc_do_log = ENABLE_PGC_LOG; - static void pgc_log(const char *fmt, ...) { va_list ap; if (pgc_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define pgc_log(fmt, ...) +# define pgc_log(fmt, ...) #endif - static inline int is_whitespace(char ch) { return (ch != 0 && strchr(" \r\n\t,;()+-", ch) != NULL); } - /* * Write a byte to the output buffer. * @@ -164,56 +156,55 @@ static int output_byte(pgc_t *dev, uint8_t val) { /* If output buffer full, wait for it to empty. */ - while (!dev->stopped && dev->mapram[0x302] == (uint8_t)(dev->mapram[0x303] - 1)) { - pgc_log("PGC: output buffer state: %02x %02x Sleeping\n", - dev->mapram[0x302], dev->mapram[0x303]); - dev->waiting_output_fifo = 1; - pgc_sleep(dev); + while (!dev->stopped && dev->mapram[0x302] == (uint8_t) (dev->mapram[0x303] - 1)) { + pgc_log("PGC: output buffer state: %02x %02x Sleeping\n", + dev->mapram[0x302], dev->mapram[0x303]); + dev->waiting_output_fifo = 1; + pgc_sleep(dev); } if (dev->mapram[0x3ff]) { - /* Reset triggered. */ - pgc_reset(dev); - return 0; + /* Reset triggered. */ + pgc_reset(dev); + return 0; } dev->mapram[0x100 + dev->mapram[0x302]] = val; dev->mapram[0x302]++; pgc_log("PGC: output %02x: new state: %02x %02x\n", val, - dev->mapram[0x302], dev->mapram[0x303]); + dev->mapram[0x302], dev->mapram[0x303]); return 1; } - /* Helper to write an entire string to the output buffer. */ static int output_string(pgc_t *dev, const char *s) { while (*s) { - if (! output_byte(dev, *s)) return 0; - s++; + if (!output_byte(dev, *s)) + return 0; + s++; } return 1; } - /* As output_byte, for the error buffer. */ static int error_byte(pgc_t *dev, uint8_t val) { /* If error buffer full, wait for it to empty. */ while (!dev->stopped && dev->mapram[0x304] == dev->mapram[0x305] - 1) { - dev->waiting_error_fifo = 1; - pgc_sleep(dev); + dev->waiting_error_fifo = 1; + pgc_sleep(dev); } if (dev->mapram[0x3ff]) { - /* Reset triggered. */ - pgc_reset(dev); - return 0; + /* Reset triggered. */ + pgc_reset(dev); + return 0; } dev->mapram[0x200 + dev->mapram[0x304]] = val; @@ -222,20 +213,19 @@ error_byte(pgc_t *dev, uint8_t val) return 1; } - /* As output_string, for the error buffer. */ static int error_string(pgc_t *dev, const char *s) { while (*s) { - if (! error_byte(dev, *s)) return 0; - s++; + if (!error_byte(dev, *s)) + return 0; + s++; } return 1; } - /* * Read next byte from the input buffer. * @@ -247,17 +237,17 @@ input_byte(pgc_t *dev, uint8_t *result) { /* If input buffer empty, wait for it to fill. */ while (!dev->stopped && (dev->mapram[0x300] == dev->mapram[0x301])) { - dev->waiting_input_fifo = 1; - pgc_sleep(dev); + dev->waiting_input_fifo = 1; + pgc_sleep(dev); } if (dev->stopped) - return 0; + return 0; if (dev->mapram[0x3ff]) { - /* Reset triggered. */ - pgc_reset(dev); - return 0; + /* Reset triggered. */ + pgc_reset(dev); + return 0; } *result = dev->mapram[dev->mapram[0x301]]; @@ -266,7 +256,6 @@ input_byte(pgc_t *dev, uint8_t *result) return 1; } - /* * Read a byte and interpret as ASCII. * @@ -278,17 +267,17 @@ input_char(pgc_t *dev, char *result) uint8_t ch; while (1) { - if (! dev->inputbyte(dev, &ch)) return 0; + if (!dev->inputbyte(dev, &ch)) + return 0; - ch &= 0x7f; - if (ch == '\r' || ch == '\n' || ch == '\t' || ch >= ' ') { - *result = toupper(ch); - return 1; - } + ch &= 0x7f; + if (ch == '\r' || ch == '\n' || ch == '\t' || ch >= ' ') { + *result = toupper(ch); + return 1; + } } } - /* * Read in the next command. * @@ -298,53 +287,54 @@ static int read_command(pgc_t *dev) { if (dev->stopped) - return 0; + return 0; if (dev->clcur) - return pgc_clist_byte(dev, &dev->hex_command); + return pgc_clist_byte(dev, &dev->hex_command); if (dev->ascii_mode) { - char ch; - int count = 0; + char ch; + int count = 0; - while (count < 7) { - if (dev->stopped) return 0; + while (count < 7) { + if (dev->stopped) + return 0; - if (! input_char(dev, &ch)) return 0; + if (!input_char(dev, &ch)) + return 0; - if (is_whitespace(ch)) { - /* Pad to 6 characters */ - while (count < 6) - dev->asc_command[count++] = ' '; - dev->asc_command[6] = 0; + if (is_whitespace(ch)) { + /* Pad to 6 characters */ + while (count < 6) + dev->asc_command[count++] = ' '; + dev->asc_command[6] = 0; - return 1; - } - dev->asc_command[count++] = toupper(ch); - } + return 1; + } + dev->asc_command[count++] = toupper(ch); + } - return 1; + return 1; } return dev->inputbyte(dev, &dev->hex_command); } - /* Read in the next command and parse it. */ static int parse_command(pgc_t *dev, const pgc_cmd_t **pcmd) { const pgc_cmd_t *cmd; - char match[7]; + char match[7]; - *pcmd = NULL; + *pcmd = NULL; dev->hex_command = 0; memset(dev->asc_command, ' ', 6); dev->asc_command[6] = 0; - if (! read_command(dev)) { - /* PGC has been reset. */ - return 0; + if (!read_command(dev)) { + /* PGC has been reset. */ + return 0; } /* @@ -354,32 +344,31 @@ parse_command(pgc_t *dev, const pgc_cmd_t **pcmd) * or the core list (terminated with '@') */ for (cmd = dev->commands; cmd->ascii[0] != '@'; cmd++) { - /* End of subclass command list, chain to core. */ - if (cmd->ascii[0] == '*') - cmd = dev->master; + /* End of subclass command list, chain to core. */ + if (cmd->ascii[0] == '*') + cmd = dev->master; - /* If in ASCII mode match on the ASCII command. */ - if (dev->ascii_mode && !dev->clcur) { - sprintf(match, "%-6.6s", cmd->ascii); - if (! strncmp(match, dev->asc_command, 6)) { - *pcmd = cmd; - dev->hex_command = cmd->hex; - break; - } - } else { - /* Otherwise match on the hex command. */ - if (cmd->hex == dev->hex_command) { - sprintf(dev->asc_command, "%-6.6s", cmd->ascii); - *pcmd = cmd; - break; - } - } + /* If in ASCII mode match on the ASCII command. */ + if (dev->ascii_mode && !dev->clcur) { + sprintf(match, "%-6.6s", cmd->ascii); + if (!strncmp(match, dev->asc_command, 6)) { + *pcmd = cmd; + dev->hex_command = cmd->hex; + break; + } + } else { + /* Otherwise match on the hex command. */ + if (cmd->hex == dev->hex_command) { + sprintf(dev->asc_command, "%-6.6s", cmd->ascii); + *pcmd = cmd; + break; + } + } } return 1; } - /* * Beginning of a command list. * @@ -390,48 +379,47 @@ static void hndl_clbeg(pgc_t *dev) { const pgc_cmd_t *cmd; - uint8_t param = 0; - pgc_cl_t cl; + uint8_t param = 0; + pgc_cl_t cl; - if (! pgc_param_byte(dev, ¶m)) return; + if (!pgc_param_byte(dev, ¶m)) + return; pgc_log("PGC: CLBEG(%i)\n", param); memset(&cl, 0x00, sizeof(pgc_cl_t)); while (1) { - if (! parse_command(dev, &cmd)) { - /* PGC has been reset. */ - return; - } - if (!cmd) { - pgc_error(dev, PGC_ERROR_OPCODE); - return; - } else if (dev->hex_command == 0x71) { - /* CLEND */ - dev->clist[param] = cl; - return; - } else { - if (! pgc_cl_append(&cl, dev->hex_command)) { - pgc_error(dev, PGC_ERROR_OVERFLOW); - return; - } + if (!parse_command(dev, &cmd)) { + /* PGC has been reset. */ + return; + } + if (!cmd) { + pgc_error(dev, PGC_ERROR_OPCODE); + return; + } else if (dev->hex_command == 0x71) { + /* CLEND */ + dev->clist[param] = cl; + return; + } else { + if (!pgc_cl_append(&cl, dev->hex_command)) { + pgc_error(dev, PGC_ERROR_OVERFLOW); + return; + } - if (cmd->parser) { - if (! (*cmd->parser)(dev, &cl, cmd->p)) - return; - } - } + if (cmd->parser) { + if (!(*cmd->parser)(dev, &cl, cmd->p)) + return; + } + } } } - static void hndl_clend(pgc_t *dev) { /* Should not happen outside a CLBEG. */ } - /* * Execute a command list. * @@ -442,90 +430,91 @@ static void hndl_clrun(pgc_t *dev) { pgc_cl_t *clprev = dev->clcur; - uint8_t param = 0; + uint8_t param = 0; - if (! pgc_param_byte(dev, ¶m)) return; + if (!pgc_param_byte(dev, ¶m)) + return; - dev->clcur = &dev->clist[param]; - dev->clcur->rdptr = 0; + dev->clcur = &dev->clist[param]; + dev->clcur->rdptr = 0; dev->clcur->repeat = 1; - dev->clcur->chain = clprev; + dev->clcur->chain = clprev; } - /* Execute a command list multiple times. */ static void hndl_cloop(pgc_t *dev) { pgc_cl_t *clprev = dev->clcur; - uint8_t param = 0; - int16_t repeat = 0; + uint8_t param = 0; + int16_t repeat = 0; - if (! pgc_param_byte(dev, ¶m)) return; - if (! pgc_param_word(dev, &repeat)) return; + if (!pgc_param_byte(dev, ¶m)) + return; + if (!pgc_param_word(dev, &repeat)) + return; - dev->clcur = &dev->clist[param]; - dev->clcur->rdptr = 0; + dev->clcur = &dev->clist[param]; + dev->clcur->rdptr = 0; dev->clcur->repeat = repeat; - dev->clcur->chain = clprev; + dev->clcur->chain = clprev; } - /* Read back a command list. */ static void hndl_clread(pgc_t *dev) { - uint8_t param = 0; + uint8_t param = 0; uint32_t n; - if (! pgc_param_byte(dev, ¶m)) return; + if (!pgc_param_byte(dev, ¶m)) + return; for (n = 0; n < dev->clist[param].wrptr; n++) { - if (! pgc_result_byte(dev, dev->clist[param].list[n])) - return; + if (!pgc_result_byte(dev, dev->clist[param].list[n])) + return; } } - /* Delete a command list. */ static void hndl_cldel(pgc_t *dev) { uint8_t param = 0; - if (! pgc_param_byte(dev, ¶m)) return; + if (!pgc_param_byte(dev, ¶m)) + return; memset(&dev->clist[param], 0, sizeof(pgc_cl_t)); } - /* Clear the screen to a specified color. */ static void hndl_clears(pgc_t *dev) { - uint8_t param = 0; + uint8_t param = 0; uint32_t y; - if (! pgc_param_byte(dev, ¶m)) return; + if (!pgc_param_byte(dev, ¶m)) + return; for (y = 0; y < dev->screenh; y++) - memset(dev->vram + y * dev->maxw, param, dev->screenw); + memset(dev->vram + y * dev->maxw, param, dev->screenw); } - /* Select drawing color. */ static void hndl_color(pgc_t *dev) { uint8_t param = 0; - if (! pgc_param_byte(dev, ¶m)) return; + if (!pgc_param_byte(dev, ¶m)) + return; pgc_log("PGC: COLOR(%i)\n", param); dev->color = param; } - /* * Set drawing mode. * @@ -537,107 +526,113 @@ hndl_linfun(pgc_t *dev) { uint8_t param = 0; - if (! pgc_param_byte(dev, ¶m)) return; + if (!pgc_param_byte(dev, ¶m)) + return; pgc_log("PGC: LINFUN(%i)\n", param); if (param < 2) - dev->draw_mode = param; + dev->draw_mode = param; else - pgc_error(dev, PGC_ERROR_RANGE); + pgc_error(dev, PGC_ERROR_RANGE); } - /* Set the line drawing pattern. */ static void hndl_linpat(pgc_t *dev) { uint16_t param = 0; - if (! pgc_param_word(dev, (int16_t *)¶m)) return; + if (!pgc_param_word(dev, (int16_t *) ¶m)) + return; pgc_log("PGC: LINPAT(0x%04x)\n", param); dev->line_pattern = param; } - /* Set the polygon fill mode (0=hollow, 1=filled, 2=fast fill). */ static void hndl_prmfil(pgc_t *dev) { uint8_t param = 0; - if (! pgc_param_byte(dev, ¶m)) return; + if (!pgc_param_byte(dev, ¶m)) + return; pgc_log("PGC: PRMFIL(%i)\n", param); if (param < 3) - dev->fill_mode = param; + dev->fill_mode = param; else - pgc_error(dev, PGC_ERROR_RANGE); + pgc_error(dev, PGC_ERROR_RANGE); } - /* Set the 2D drawing position. */ static void hndl_move(pgc_t *dev) { int32_t x = 0, y = 0; - if (! pgc_param_coord(dev, &x)) return; - if (! pgc_param_coord(dev, &y)) return; + if (!pgc_param_coord(dev, &x)) + return; + if (!pgc_param_coord(dev, &y)) + return; pgc_log("PCG: MOVE %x.%04x,%x.%04x\n", - HWORD(x), LWORD(x), HWORD(y), LWORD(y)); + HWORD(x), LWORD(x), HWORD(y), LWORD(y)); dev->x = x; dev->y = y; } - /* Set the 3D drawing position. */ static void hndl_move3(pgc_t *dev) { int32_t x = 0, y = 0, z = 0; - if (! pgc_param_coord(dev, &x)) return; - if (! pgc_param_coord(dev, &y)) return; - if (! pgc_param_coord(dev, &z)) return; + if (!pgc_param_coord(dev, &x)) + return; + if (!pgc_param_coord(dev, &y)) + return; + if (!pgc_param_coord(dev, &z)) + return; dev->x = x; dev->y = y; dev->z = z; } - /* Relative move (2D). */ static void hndl_mover(pgc_t *dev) { int32_t x = 0, y = 0; - if (! pgc_param_coord(dev, &x)) return; - if (! pgc_param_coord(dev, &y)) return; + if (!pgc_param_coord(dev, &x)) + return; + if (!pgc_param_coord(dev, &y)) + return; dev->x += x; dev->y += y; } - /* Relative move (3D). */ static void hndl_mover3(pgc_t *dev) { int32_t x = 0, y = 0, z = 0; - if (! pgc_param_coord(dev, &x)) return; - if (! pgc_param_coord(dev, &y)) return; - if (! pgc_param_coord(dev, &z)) return; + if (!pgc_param_coord(dev, &x)) + return; + if (!pgc_param_coord(dev, &y)) + return; + if (!pgc_param_coord(dev, &z)) + return; dev->x += x; dev->y += y; dev->z += z; } - /* Given raster coordinates, find the matching address in PGC video RAM. */ uint8_t * pgc_vram_addr(pgc_t *dev, int16_t x, int16_t y) @@ -645,19 +640,18 @@ pgc_vram_addr(pgc_t *dev, int16_t x, int16_t y) int offset; /* We work from the bottom left-hand corner. */ - if (y < 0 || (uint32_t)y >= dev->maxh || - x < 0 || (uint32_t)x >= dev->maxw) return NULL; + if (y < 0 || (uint32_t) y >= dev->maxh || x < 0 || (uint32_t) x >= dev->maxw) + return NULL; offset = (dev->maxh - 1 - y) * (dev->maxw) + x; pgc_log("PGC: vram_addr(x=%i,y=%i) = %i\n", x, y, offset); - if (offset < 0 || (uint32_t)offset >= (dev->maxw * dev->maxh)) - return NULL; + if (offset < 0 || (uint32_t) offset >= (dev->maxw * dev->maxh)) + return NULL; return &dev->vram[offset]; } - /* * Write a screen pixel. * X and Y are raster coordinates, ink is the value to write. @@ -668,21 +662,19 @@ pgc_write_pixel(pgc_t *dev, uint16_t x, uint16_t y, uint8_t ink) uint8_t *vram; /* Suppress out-of-range writes; clip to viewport. */ - if (x < dev->vp_x1 || x > dev->vp_x2 || x >= dev->maxw || - y < dev->vp_y1 || y > dev->vp_y2 || y >= dev->maxh) { - pgc_log("PGC: write_pixel clipped: (%i,%i) " - "vp_x1=%i vp_y1=%i vp_x2=%i vp_y2=%i " - "ink=0x%02x\n", - x, y, dev->vp_x1, dev->vp_y1, dev->vp_x2, dev->vp_y2, ink); - return; + if (x < dev->vp_x1 || x > dev->vp_x2 || x >= dev->maxw || y < dev->vp_y1 || y > dev->vp_y2 || y >= dev->maxh) { + pgc_log("PGC: write_pixel clipped: (%i,%i) " + "vp_x1=%i vp_y1=%i vp_x2=%i vp_y2=%i " + "ink=0x%02x\n", + x, y, dev->vp_x1, dev->vp_y1, dev->vp_x2, dev->vp_y2, ink); + return; } vram = pgc_vram_addr(dev, x, y); if (vram) - *vram = ink; + *vram = ink; } - /* Read a screen pixel (x and y are raster coordinates). */ uint8_t pgc_read_pixel(pgc_t *dev, uint16_t x, uint16_t y) @@ -691,16 +683,15 @@ pgc_read_pixel(pgc_t *dev, uint16_t x, uint16_t y) /* Suppress out-of-range reads. */ if (x >= dev->maxw || y >= dev->maxh) - return 0; + return 0; vram = pgc_vram_addr(dev, x, y); if (vram) - return *vram; + return *vram; return 0; } - /* * Plot a point in the current color and draw mode. Raster coordinates. * @@ -713,42 +704,42 @@ pgc_plot(pgc_t *dev, uint16_t x, uint16_t y) uint8_t *vram; /* Only allow plotting within the current viewport. */ - if (x < dev->vp_x1 || x > dev->vp_x2 || x >= dev->maxw || - y < dev->vp_y1 || y > dev->vp_y2 || y >= dev->maxh) { - pgc_log("PGC: plot clipped: (%i,%i) %i <= x <= %i; %i <= y <= %i; " - "mode=%i ink=0x%02x\n", x, y, - dev->vp_x1, dev->vp_x2, dev->vp_y1, dev->vp_y2, - dev->draw_mode, dev->color); - return; + if (x < dev->vp_x1 || x > dev->vp_x2 || x >= dev->maxw || y < dev->vp_y1 || y > dev->vp_y2 || y >= dev->maxh) { + pgc_log("PGC: plot clipped: (%i,%i) %i <= x <= %i; %i <= y <= %i; " + "mode=%i ink=0x%02x\n", + x, y, + dev->vp_x1, dev->vp_x2, dev->vp_y1, dev->vp_y2, + dev->draw_mode, dev->color); + return; } vram = pgc_vram_addr(dev, x, y); - if (! vram) return; + if (!vram) + return; /* TODO: Does not implement the PGC plane mask (set by MASK). */ switch (dev->draw_mode) { - default: - case 0: /* WRITE */ - *vram = dev->color; - break; + default: + case 0: /* WRITE */ + *vram = dev->color; + break; - case 1: /* INVERT */ - *vram ^= 0xff; - break; + case 1: /* INVERT */ + *vram ^= 0xff; + break; - case 2: /* XOR color */ - //FIXME: see notes - *vram ^= dev->color; - break; + case 2: /* XOR color */ + // FIXME: see notes + *vram ^= dev->color; + break; - case 3: /* AND color */ - //FIXME: see notes - *vram &= dev->color; - break; + case 3: /* AND color */ + // FIXME: see notes + *vram &= dev->color; + break; } } - /* * Draw a line (using raster coordinates). * @@ -763,42 +754,42 @@ pgc_draw_line_r(pgc_t *dev, int32_t x0, int32_t y0, int32_t x1, int32_t y1, uint { int32_t dx, dy, sx, sy, err, e2; - dx = abs(x1 - x0); - dy = abs(y1 - y0); - sx = (x0 < x1) ? 1 : -1; - sy = (y0 < y1) ? 1 : -1; + dx = abs(x1 - x0); + dy = abs(y1 - y0); + sx = (x0 < x1) ? 1 : -1; + sy = (y0 < y1) ? 1 : -1; err = (dx > dy ? dx : -dy) / 2; for (;;) { - if (linemask & 0x8000) { - pgc_plot(dev, x0, y0); - linemask = (linemask << 1) | 1; - } else - linemask = (linemask << 1); + if (linemask & 0x8000) { + pgc_plot(dev, x0, y0); + linemask = (linemask << 1) | 1; + } else + linemask = (linemask << 1); - if (x0 == x1 && y0 == y1) break; + if (x0 == x1 && y0 == y1) + break; - e2 = err; - if (e2 > -dx) { - err -= dy; - x0 += sx; - } - if (e2 < dy) { - err += dx; - y0 += sy; - } + e2 = err; + if (e2 > -dx) { + err -= dy; + x0 += sx; + } + if (e2 < dy) { + err += dx; + y0 += sy; + } } return linemask; } - /* Draw a line (using PGC fixed-point coordinates). */ uint16_t pgc_draw_line(pgc_t *dev, int32_t x0, int32_t y0, int32_t x1, int32_t y1, uint16_t linemask) { pgc_log("pgc_draw_line: (%i,%i) to (%i,%i)\n", - x0 >> 16, y0 >> 16, x1 >> 16, y1 >> 16); + x0 >> 16, y0 >> 16, x1 >> 16, y1 >> 16); /* Convert from PGC fixed-point to device coordinates */ x0 >>= 16; @@ -812,7 +803,6 @@ pgc_draw_line(pgc_t *dev, int32_t x0, int32_t y0, int32_t x1, int32_t y1, uint16 return pgc_draw_line_r(dev, x0, y0, x1, y1, linemask); } - /* * Draw a horizontal line in the current fill pattern * (using raster coordinates). @@ -824,104 +814,106 @@ pgc_fill_line_r(pgc_t *dev, int32_t x0, int32_t x1, int32_t y0) int32_t x; if (x0 > x1) { - x = x1; - x1 = x0; - x0 = x; + x = x1; + x1 = x0; + x0 = x; } for (x = x0; x <= x1; x++) { - if (dev->fill_pattern[y0 & 0x0F] & mask) - pgc_plot(dev, x, y0); - mask = mask >> 1; - if (mask == 0) mask = 0x8000; + if (dev->fill_pattern[y0 & 0x0F] & mask) + pgc_plot(dev, x, y0); + mask = mask >> 1; + if (mask == 0) + mask = 0x8000; } } - /* For sorting polygon nodes. */ static int compare_double(const void *a, const void *b) { - const double *da = (const double *)a; - const double *db = (const double *)b; + const double *da = (const double *) a; + const double *db = (const double *) b; - if (*da < *db) return 1; - if (*da > *db) return -1; + if (*da < *db) + return 1; + if (*da > *db) + return -1; return 0; } - /* Draw a filled polygon (using PGC fixed-point coordinates). */ void pgc_fill_polygon(pgc_t *dev, unsigned corners, int32_t *x, int32_t *y) { - double *nodex; - double *dx; - double *dy; + double *nodex; + double *dx; + double *dy; unsigned n, nodes, i, j; - double ymin, ymax, ypos; + double ymin, ymax, ypos; pgc_log("PGC: fill_polygon(%i corners)\n", corners); if (!x || !y || (corners < 2)) - return; /* Degenerate polygon */ + return; /* Degenerate polygon */ - nodex = (double *)malloc(corners * sizeof(double)); - dx = (double *)malloc(corners * sizeof(double)); - dy = (double *)malloc(corners * sizeof(double)); + nodex = (double *) malloc(corners * sizeof(double)); + dx = (double *) malloc(corners * sizeof(double)); + dy = (double *) malloc(corners * sizeof(double)); if (!nodex || !dx || !dy) { - if (nodex) { - free(nodex); - nodex = NULL; - } - if (dx) { - free(dx); - dx = NULL; - } - if (dy) { - free(dy); - dy = NULL; - } - return; + if (nodex) { + free(nodex); + nodex = NULL; + } + if (dx) { + free(dx); + dx = NULL; + } + if (dy) { + free(dy); + dy = NULL; + } + return; } ymin = ymax = y[0] / 65536.0; for (n = 0; n < corners; n++) { - /* Convert from PGC fixed-point to native floating-point. */ - dx[n] = x[n] / 65536.0; - dy[n] = y[n] / 65536.0; + /* Convert from PGC fixed-point to native floating-point. */ + dx[n] = x[n] / 65536.0; + dy[n] = y[n] / 65536.0; - if (dy[n] < ymin) ymin = dy[n]; - if (dy[n] > ymax) ymax = dy[n]; + if (dy[n] < ymin) + ymin = dy[n]; + if (dy[n] > ymax) + ymax = dy[n]; } /* Polygon fill. Based on */ /* For each row, work out where the polygon lines intersect with * that row. */ for (ypos = ymin; ypos <= ymax; ypos++) { - nodes = 0; - j = corners - 1; - for (i = 0; i < corners; i++) { - if ((dy[i] < ypos && dy[j] >= ypos) || - (dy[j] < ypos && dy[i] >= ypos)) /* Line crosses */ { - nodex[nodes++] = dx[i] + (ypos-dy[i])/(dy[j]-dy[i]) * (dx[j] - dx[i]); - } - j = i; - } + nodes = 0; + j = corners - 1; + for (i = 0; i < corners; i++) { + if ((dy[i] < ypos && dy[j] >= ypos) || (dy[j] < ypos && dy[i] >= ypos)) /* Line crosses */ { + nodex[nodes++] = dx[i] + (ypos - dy[i]) / (dy[j] - dy[i]) * (dx[j] - dx[i]); + } + j = i; + } - /* Sort the intersections. */ - if (nodes) - qsort(nodex, nodes, sizeof(double), compare_double); + /* Sort the intersections. */ + if (nodes) + qsort(nodex, nodes, sizeof(double), compare_double); - /* And fill between them. */ - for (i = 0; i < nodes; i += 2) { - int16_t x1 = (int16_t)nodex[i], x2 = (int16_t)nodex[i + 1], - y1 = (int16_t)ypos, y2 = (int16_t)ypos; - pgc_sto_raster(dev, &x1, &y1); - pgc_sto_raster(dev, &x2, &y2); - pgc_fill_line_r(dev, x1, x2, y1); - } + /* And fill between them. */ + for (i = 0; i < nodes; i += 2) { + int16_t x1 = (int16_t) nodex[i], x2 = (int16_t) nodex[i + 1], + y1 = (int16_t) ypos, y2 = (int16_t) ypos; + pgc_sto_raster(dev, &x1, &y1); + pgc_sto_raster(dev, &x2, &y2); + pgc_fill_line_r(dev, x1, x2, y1); + } } free(nodex); @@ -929,86 +921,85 @@ pgc_fill_polygon(pgc_t *dev, unsigned corners, int32_t *x, int32_t *y) free(dy); } - /* Draw a filled ellipse (using PGC fixed-point coordinates). */ void pgc_draw_ellipse(pgc_t *dev, int32_t x, int32_t y) { /* Convert from PGC fixed-point to native floating-point. */ - double h = y / 65536.0; - double w = x / 65536.0; - double y0 = dev->y / 65536.0; - double x0 = dev->x / 65536.0; - double ypos, xpos; - double x1; - double xlast = 0.0; + double h = y / 65536.0; + double w = x / 65536.0; + double y0 = dev->y / 65536.0; + double x0 = dev->x / 65536.0; + double ypos, xpos; + double x1; + double xlast = 0.0; int16_t linemask = dev->line_pattern; pgc_log("PGC: ellipse(color=%i drawmode=%i fill=%i)\n", - dev->color, dev->draw_mode, dev->fill_mode); + dev->color, dev->draw_mode, dev->fill_mode); pgc_dto_raster(dev, &x0, &y0); for (ypos = 0; ypos <= h; ypos++) { - if (ypos == 0) { - if (dev->fill_mode) - pgc_fill_line_r(dev, (uint16_t)(x0 - w), - (uint16_t)(x0 + w), (uint16_t)y0); - if (linemask & 0x8000) { - pgc_plot(dev, (uint16_t)(x0 + w), (uint16_t)y0); - pgc_plot(dev, (uint16_t)(x0 - w), (uint16_t)y0); - linemask = (linemask << 1) | 1; - } else - linemask = linemask << 1; + if (ypos == 0) { + if (dev->fill_mode) + pgc_fill_line_r(dev, (uint16_t) (x0 - w), + (uint16_t) (x0 + w), (uint16_t) y0); + if (linemask & 0x8000) { + pgc_plot(dev, (uint16_t) (x0 + w), (uint16_t) y0); + pgc_plot(dev, (uint16_t) (x0 - w), (uint16_t) y0); + linemask = (linemask << 1) | 1; + } else + linemask = linemask << 1; - xlast = w; - } else { - x1 = sqrt((h * h) - (ypos * ypos)) * w / h; + xlast = w; + } else { + x1 = sqrt((h * h) - (ypos * ypos)) * w / h; - if (dev->fill_mode) { - pgc_fill_line_r(dev, (uint16_t)(x0 - x1), - (uint16_t)(x0 + x1), - (uint16_t)(y0 + ypos)); - pgc_fill_line_r(dev, (uint16_t)(x0 - x1), - (uint16_t)(x0 + x1), - (uint16_t)(y0 - ypos)); - } + if (dev->fill_mode) { + pgc_fill_line_r(dev, (uint16_t) (x0 - x1), + (uint16_t) (x0 + x1), + (uint16_t) (y0 + ypos)); + pgc_fill_line_r(dev, (uint16_t) (x0 - x1), + (uint16_t) (x0 + x1), + (uint16_t) (y0 - ypos)); + } - /* Draw border. */ - for (xpos = xlast; xpos >= x1; xpos--) { - if (linemask & 0x8000) { - pgc_plot(dev, (uint16_t)(x0 + xpos), - (uint16_t)(y0 + ypos)); - pgc_plot(dev, (uint16_t)(x0 - xpos), - (uint16_t)(y0 + ypos)); - pgc_plot(dev, (uint16_t)(x0 + xpos), - (uint16_t)(y0 - ypos)); - pgc_plot(dev, (uint16_t)(x0 - xpos), - (uint16_t)(y0 - ypos)); - linemask = (linemask << 1) | 1; - } else - linemask = linemask << 1; - } + /* Draw border. */ + for (xpos = xlast; xpos >= x1; xpos--) { + if (linemask & 0x8000) { + pgc_plot(dev, (uint16_t) (x0 + xpos), + (uint16_t) (y0 + ypos)); + pgc_plot(dev, (uint16_t) (x0 - xpos), + (uint16_t) (y0 + ypos)); + pgc_plot(dev, (uint16_t) (x0 + xpos), + (uint16_t) (y0 - ypos)); + pgc_plot(dev, (uint16_t) (x0 - xpos), + (uint16_t) (y0 - ypos)); + linemask = (linemask << 1) | 1; + } else + linemask = linemask << 1; + } - xlast = x1; - } + xlast = x1; + } } } - /* Handle the ELIPSE (sic) command. */ static void hndl_ellipse(pgc_t *dev) { int32_t x = 0, y = 0; - if (! pgc_param_coord(dev, &x)) return; - if (! pgc_param_coord(dev, &y)) return; + if (!pgc_param_coord(dev, &x)) + return; + if (!pgc_param_coord(dev, &y)) + return; pgc_draw_ellipse(dev, x, y); } - /* Handle the POLY command. */ static void hndl_poly(pgc_t *dev) @@ -1018,16 +1009,18 @@ hndl_poly(pgc_t *dev) int32_t y[256]; int32_t n; - if (! pgc_param_byte(dev, &count)) return; + if (!pgc_param_byte(dev, &count)) + return; pgc_log("PGC: POLY (%i)\n", count); for (n = 0; n < count; n++) { - if (! pgc_param_coord(dev, &x[n])) return; - if (! pgc_param_coord(dev, &y[n])) return; + if (!pgc_param_coord(dev, &x[n])) + return; + if (!pgc_param_coord(dev, &y[n])) + return; } } - /* Parse but don't execute a POLY command (for adding to a command list) */ static int parse_poly(pgc_t *dev, pgc_cl_t *cl, int c) @@ -1037,36 +1030,36 @@ parse_poly(pgc_t *dev, pgc_cl_t *cl, int c) #ifdef ENABLE_PGC_LOG pgc_log("PCG: parse_poly\n"); #endif - if (! pgc_param_byte(dev, &count)) return 0; + if (!pgc_param_byte(dev, &count)) + return 0; pgc_log("PCG: parse_poly: count=%02x\n", count); - if (! pgc_cl_append(cl, count)) { - pgc_error(dev, PGC_ERROR_OVERFLOW); - return 0; + if (!pgc_cl_append(cl, count)) { + pgc_error(dev, PGC_ERROR_OVERFLOW); + return 0; } pgc_log("PCG: parse_poly: parse %i coords\n", 2 * count); return pgc_parse_coords(dev, cl, 2 * count); } - /* Handle the DISPLAY command. */ static void hndl_display(pgc_t *dev) { uint8_t param; - if (! pgc_param_byte(dev, ¶m)) return; + if (!pgc_param_byte(dev, ¶m)) + return; pgc_log("PGC: DISPLAY(%i)\n", param); if (param > 1) - pgc_error(dev, PGC_ERROR_RANGE); + pgc_error(dev, PGC_ERROR_RANGE); else - pgc_setdisplay(dev, param); + pgc_setdisplay(dev, param); } - /* Handle the IMAGEW command (memory to screen blit). */ static void hndl_imagew(pgc_t *dev) @@ -1074,68 +1067,72 @@ hndl_imagew(pgc_t *dev) int16_t row, col1, col2; uint8_t v1, v2; - if (! pgc_param_word(dev, &row)) return; - if (! pgc_param_word(dev, &col1)) return; - if (! pgc_param_word(dev, &col2)) return; + if (!pgc_param_word(dev, &row)) + return; + if (!pgc_param_word(dev, &col1)) + return; + if (!pgc_param_word(dev, &col2)) + return; - if ((uint32_t)row >= dev->screenh || - (uint32_t)col1 >= dev->maxw || (uint32_t)col2 >= dev->maxw) { - pgc_error(dev, PGC_ERROR_RANGE); - return; + if ((uint32_t) row >= dev->screenh || (uint32_t) col1 >= dev->maxw || (uint32_t) col2 >= dev->maxw) { + pgc_error(dev, PGC_ERROR_RANGE); + return; } /* In ASCII mode, what is written is a stream of bytes. */ if (dev->ascii_mode) { - while (col1 <= col2) { - if (! pgc_param_byte(dev, &v1)) return; - pgc_write_pixel(dev, col1, row, v1); - col1++; - } + while (col1 <= col2) { + if (!pgc_param_byte(dev, &v1)) + return; + pgc_write_pixel(dev, col1, row, v1); + col1++; + } - return; + return; } /* In hex mode, it's RLE compressed. */ while (col1 <= col2) { - if (! pgc_param_byte(dev, &v1)) return; + if (!pgc_param_byte(dev, &v1)) + return; - if (v1 & 0x80) { - /* Literal run. */ - v1 -= 0x7f; - while (col1 <= col2 && v1 != 0) { - if (! pgc_param_byte(dev, &v2)) return; - pgc_write_pixel(dev, col1, row, v2); - col1++; - v1--; - } - } else { - /* Repeated run. */ - if (! pgc_param_byte(dev, &v2)) return; + if (v1 & 0x80) { + /* Literal run. */ + v1 -= 0x7f; + while (col1 <= col2 && v1 != 0) { + if (!pgc_param_byte(dev, &v2)) + return; + pgc_write_pixel(dev, col1, row, v2); + col1++; + v1--; + } + } else { + /* Repeated run. */ + if (!pgc_param_byte(dev, &v2)) + return; - v1++; - while (col1 <= col2 && v1 != 0) { - pgc_write_pixel(dev, col1, row, v2); - col1++; - v1--; - } - } + v1++; + while (col1 <= col2 && v1 != 0) { + pgc_write_pixel(dev, col1, row, v2); + col1++; + v1--; + } + } } } - /* Select one of the built-in palettes. */ static void init_lut(pgc_t *dev, int param) { if (param >= 0 && param < 6) - memcpy(dev->palette, init_palette[param], sizeof(dev->palette)); + memcpy(dev->palette, init_palette[param], sizeof(dev->palette)); else if (param == 0xff) - memcpy(dev->palette, dev->userpal, sizeof(dev->palette)); + memcpy(dev->palette, dev->userpal, sizeof(dev->palette)); else - pgc_error(dev, PGC_ERROR_RANGE); + pgc_error(dev, PGC_ERROR_RANGE); } - /* Save the current palette. */ static void hndl_lutsav(pgc_t *dev) @@ -1143,57 +1140,56 @@ hndl_lutsav(pgc_t *dev) memcpy(dev->userpal, dev->palette, sizeof(dev->palette)); } - /* Handle LUTINT (select palette). */ static void hndl_lutint(pgc_t *dev) { uint8_t param; - if (! pgc_param_byte(dev, ¶m)) return; + if (!pgc_param_byte(dev, ¶m)) + return; init_lut(dev, param); } - /* Handle LUTRD (read palette register). */ static void hndl_lutrd(pgc_t *dev) { - uint8_t param; + uint8_t param; uint32_t col; - if (! pgc_param_byte(dev, ¶m)) return; + if (!pgc_param_byte(dev, ¶m)) + return; col = dev->palette[param]; pgc_result_byte(dev, (col >> 20) & 0x0f); pgc_result_byte(dev, (col >> 12) & 0x0f); - pgc_result_byte(dev, (col >> 4) & 0x0f); + pgc_result_byte(dev, (col >> 4) & 0x0f); } - /* Handle LUT (write palette register). */ static void hndl_lut(pgc_t *dev) { uint8_t param[4]; - int n; + int n; for (n = 0; n < 4; n++) { - if (! pgc_param_byte(dev, ¶m[n])) return; - if (n > 0 && param[n] > 15) { - pgc_error(dev, PGC_ERROR_RANGE); - param[n] &= 0x0f; - } + if (!pgc_param_byte(dev, ¶m[n])) + return; + if (n > 0 && param[n] > 15) { + pgc_error(dev, PGC_ERROR_RANGE); + param[n] &= 0x0f; + } } dev->palette[param[0]] = makecol((param[1] * 0x11), - (param[2] * 0x11), - (param[3] * 0x11)); + (param[2] * 0x11), + (param[3] * 0x11)); } - /* * LUT8RD and LUT8 are extensions implemented by several PGC clones, * so here are functions that implement them even though they aren't @@ -1202,49 +1198,49 @@ hndl_lut(pgc_t *dev) void pgc_hndl_lut8rd(pgc_t *dev) { - uint8_t param; + uint8_t param; uint32_t col; - if (! pgc_param_byte(dev, ¶m)) return; + if (!pgc_param_byte(dev, ¶m)) + return; col = dev->palette[param]; pgc_result_byte(dev, (col >> 16) & 0xff); - pgc_result_byte(dev, (col >> 8) & 0xff); + pgc_result_byte(dev, (col >> 8) & 0xff); pgc_result_byte(dev, col & 0xff); } - void pgc_hndl_lut8(pgc_t *dev) { uint8_t param[4]; - int n; + int n; for (n = 0; n < 4; n++) - if (! pgc_param_byte(dev, ¶m[n])) return; + if (!pgc_param_byte(dev, ¶m[n])) + return; dev->palette[param[0]] = makecol((param[1]), (param[2]), (param[3])); } - /* Handle AREAPT (set 16x16 fill pattern). */ static void hndl_areapt(pgc_t *dev) { int16_t pat[16]; - int n; + int n; for (n = 0; n < 16; n++) - if (! pgc_param_word(dev, &pat[n])) return; + if (!pgc_param_word(dev, &pat[n])) + return; pgc_log("PGC: AREAPT(%04x %04x %04x %04x...)\n", - pat[0] & 0xffff, pat[1] & 0xffff, pat[2] & 0xffff, pat[3] & 0xffff); + pat[0] & 0xffff, pat[1] & 0xffff, pat[2] & 0xffff, pat[3] & 0xffff); memcpy(dev->fill_pattern, pat, sizeof(dev->fill_pattern)); } - /* Handle CA (select ASCII mode). */ static void hndl_ca(pgc_t *dev) @@ -1252,7 +1248,6 @@ hndl_ca(pgc_t *dev) dev->ascii_mode = 1; } - /* Handle CX (select hex mode). */ static void hndl_cx(pgc_t *dev) @@ -1260,7 +1255,6 @@ hndl_cx(pgc_t *dev) dev->ascii_mode = 0; } - /* * CA and CX remain valid in hex mode; they are handled * as command 0x43 ('C') with a one-byte parameter. @@ -1270,16 +1264,16 @@ hndl_c(pgc_t *dev) { uint8_t param; - if (! dev->inputbyte(dev, ¶m)) return; + if (!dev->inputbyte(dev, ¶m)) + return; if (param == 'A') - dev->ascii_mode = 1; + dev->ascii_mode = 1; if (param == 'X') - dev->ascii_mode = 0; + dev->ascii_mode = 0; } - /* RESETF resets the PGC. */ static void hndl_resetf(pgc_t *dev) @@ -1287,37 +1281,37 @@ hndl_resetf(pgc_t *dev) pgc_reset(dev); } - /* TJUST sets text justify settings. */ static void hndl_tjust(pgc_t *dev) { uint8_t param[2]; - if (! dev->inputbyte(dev, ¶m[0])) return; - if (! dev->inputbyte(dev, ¶m[1])) return; + if (!dev->inputbyte(dev, ¶m[0])) + return; + if (!dev->inputbyte(dev, ¶m[1])) + return; if (param[0] >= 1 && param[0] <= 3 && param[1] >= 1 && param[1] <= 3) { - dev->tjust_h = param[0]; - dev->tjust_v = param[1]; + dev->tjust_h = param[0]; + dev->tjust_v = param[1]; } else - pgc_error(dev, PGC_ERROR_RANGE); + pgc_error(dev, PGC_ERROR_RANGE); } - /* TSIZE controls text horizontal spacing. */ static void hndl_tsize(pgc_t *pgc) { int32_t param = 0; - if (! pgc_param_coord(pgc, ¶m)) return; + if (!pgc_param_coord(pgc, ¶m)) + return; pgc_log("PGC: TSIZE %i\n", param); pgc->tsize = param; } - /* * VWPORT sets up the viewport (roughly, the clip rectangle) in * raster coordinates, measured from the bottom left of the screen. @@ -1327,38 +1321,44 @@ hndl_vwport(pgc_t *dev) { int16_t x1, x2, y1, y2; - if (! pgc_param_word(dev, &x1)) return; - if (! pgc_param_word(dev, &x2)) return; - if (! pgc_param_word(dev, &y1)) return; - if (! pgc_param_word(dev, &y2)) return; + if (!pgc_param_word(dev, &x1)) + return; + if (!pgc_param_word(dev, &x2)) + return; + if (!pgc_param_word(dev, &y1)) + return; + if (!pgc_param_word(dev, &y2)) + return; - pgc_log("PGC: VWPORT %i,%i,%i,%i\n", x1,x2,y1,y2); + pgc_log("PGC: VWPORT %i,%i,%i,%i\n", x1, x2, y1, y2); dev->vp_x1 = x1; dev->vp_x2 = x2; dev->vp_y1 = y1; dev->vp_y2 = y2; } - /* WINDOW defines the coordinate system in use. */ static void hndl_window(pgc_t *dev) { int16_t x1, x2, y1, y2; - if (! pgc_param_word(dev, &x1)) return; - if (! pgc_param_word(dev, &x2)) return; - if (! pgc_param_word(dev, &y1)) return; - if (! pgc_param_word(dev, &y2)) return; + if (!pgc_param_word(dev, &x1)) + return; + if (!pgc_param_word(dev, &x2)) + return; + if (!pgc_param_word(dev, &y1)) + return; + if (!pgc_param_word(dev, &y2)) + return; - pgc_log("PGC: WINDOW %i,%i,%i,%i\n", x1,x2,y1,y2); + pgc_log("PGC: WINDOW %i,%i,%i,%i\n", x1, x2, y1, y2); dev->win_x1 = x1; dev->win_x2 = x2; dev->win_y1 = y1; dev->win_y2 = y2; } - /* * The list of commands implemented by this mini-PGC. * @@ -1383,74 +1383,73 @@ hndl_window(pgc_t *dev) * */ static const pgc_cmd_t pgc_commands[] = { - { "AREAPT", 0xe7, hndl_areapt, pgc_parse_words, 16 }, - { "AP", 0xe7, hndl_areapt, pgc_parse_words, 16 }, - { "~~~~~~", 0x43, hndl_c, NULL, 0 }, - { "CA", 0xd2, hndl_ca, NULL, 0 }, - { "CLBEG", 0x70, hndl_clbeg, NULL, 0 }, - { "CB", 0x70, hndl_clbeg, NULL, 0 }, - { "CLDEL", 0x74, hndl_cldel, pgc_parse_bytes, 1 }, - { "CD", 0x74, hndl_cldel, pgc_parse_bytes, 1 }, - { "CLEND", 0x71, hndl_clend, NULL, 0 }, - { "CLRUN", 0x72, hndl_clrun, pgc_parse_bytes, 1 }, - { "CR", 0x72, hndl_clrun, pgc_parse_bytes, 1 }, - { "CLRD", 0x75, hndl_clread, pgc_parse_bytes, 1 }, - { "CRD", 0x75, hndl_clread, pgc_parse_bytes, 1 }, - { "CLOOP", 0x73, hndl_cloop, NULL, 0 }, - { "CL", 0x73, hndl_cloop, NULL, 0 }, - { "CLEARS", 0x0f, hndl_clears, pgc_parse_bytes, 1 }, - { "CLS", 0x0f, hndl_clears, pgc_parse_bytes, 1 }, - { "COLOR", 0x06, hndl_color, pgc_parse_bytes, 1 }, - { "C", 0x06, hndl_color, pgc_parse_bytes, 1 }, - { "CX", 0xd1, hndl_cx, NULL, 0 }, - { "DISPLA", 0xd0, hndl_display, pgc_parse_bytes, 1 }, - { "DI", 0xd0, hndl_display, pgc_parse_bytes, 1 }, - { "ELIPSE", 0x39, hndl_ellipse, pgc_parse_coords, 2 }, - { "EL", 0x39, hndl_ellipse, pgc_parse_coords, 2 }, - { "IMAGEW", 0xd9, hndl_imagew, NULL, 0 }, - { "IW", 0xd9, hndl_imagew, NULL, 0 }, - { "LINFUN", 0xeb, hndl_linfun, pgc_parse_bytes, 1 }, - { "LF", 0xeb, hndl_linfun, pgc_parse_bytes, 1 }, - { "LINPAT", 0xea, hndl_linpat, pgc_parse_words, 1 }, - { "LP", 0xea, hndl_linpat, pgc_parse_words, 1 }, - { "LUTINT", 0xec, hndl_lutint, pgc_parse_bytes, 1 }, - { "LI", 0xec, hndl_lutint, pgc_parse_bytes, 1 }, - { "LUTRD", 0x50, hndl_lutrd, pgc_parse_bytes, 1 }, - { "LUTSAV", 0xed, hndl_lutsav, NULL, 0 }, - { "LUT", 0xee, hndl_lut, pgc_parse_bytes, 4 }, - { "MOVE", 0x10, hndl_move, pgc_parse_coords, 2 }, - { "M", 0x10, hndl_move, pgc_parse_coords, 2 }, - { "MOVE3", 0x12, hndl_move3, pgc_parse_coords, 3 }, - { "M3", 0x12, hndl_move3, pgc_parse_coords, 3 }, - { "MOVER", 0x11, hndl_mover, pgc_parse_coords, 2 }, - { "MR", 0x11, hndl_mover, pgc_parse_coords, 2 }, - { "MOVER3", 0x13, hndl_mover3, pgc_parse_coords, 3 }, - { "MR3", 0x13, hndl_mover3, pgc_parse_coords, 3 }, - { "PRMFIL", 0xe9, hndl_prmfil, pgc_parse_bytes, 1 }, - { "PF", 0xe9, hndl_prmfil, pgc_parse_bytes, 1 }, - { "POLY", 0x30, hndl_poly, parse_poly, 0 }, - { "P", 0x30, hndl_poly, parse_poly, 0 }, - { "RESETF", 0x04, hndl_resetf, NULL, 0 }, - { "RF", 0x04, hndl_resetf, NULL, 0 }, - { "TJUST", 0x85, hndl_tjust, pgc_parse_bytes, 2 }, - { "TJ", 0x85, hndl_tjust, pgc_parse_bytes, 2 }, - { "TSIZE", 0x81, hndl_tsize, pgc_parse_coords, 1 }, - { "TS", 0x81, hndl_tsize, pgc_parse_coords, 1 }, - { "VWPORT", 0xb2, hndl_vwport, pgc_parse_words, 4 }, - { "VWP", 0xb2, hndl_vwport, pgc_parse_words, 4 }, - { "WINDOW", 0xb3, hndl_window, pgc_parse_words, 4 }, - { "WI", 0xb3, hndl_window, pgc_parse_words, 4 }, + {"AREAPT", 0xe7, hndl_areapt, pgc_parse_words, 16}, + { "AP", 0xe7, hndl_areapt, pgc_parse_words, 16}, + { "~~~~~~", 0x43, hndl_c, NULL, 0 }, + { "CA", 0xd2, hndl_ca, NULL, 0 }, + { "CLBEG", 0x70, hndl_clbeg, NULL, 0 }, + { "CB", 0x70, hndl_clbeg, NULL, 0 }, + { "CLDEL", 0x74, hndl_cldel, pgc_parse_bytes, 1 }, + { "CD", 0x74, hndl_cldel, pgc_parse_bytes, 1 }, + { "CLEND", 0x71, hndl_clend, NULL, 0 }, + { "CLRUN", 0x72, hndl_clrun, pgc_parse_bytes, 1 }, + { "CR", 0x72, hndl_clrun, pgc_parse_bytes, 1 }, + { "CLRD", 0x75, hndl_clread, pgc_parse_bytes, 1 }, + { "CRD", 0x75, hndl_clread, pgc_parse_bytes, 1 }, + { "CLOOP", 0x73, hndl_cloop, NULL, 0 }, + { "CL", 0x73, hndl_cloop, NULL, 0 }, + { "CLEARS", 0x0f, hndl_clears, pgc_parse_bytes, 1 }, + { "CLS", 0x0f, hndl_clears, pgc_parse_bytes, 1 }, + { "COLOR", 0x06, hndl_color, pgc_parse_bytes, 1 }, + { "C", 0x06, hndl_color, pgc_parse_bytes, 1 }, + { "CX", 0xd1, hndl_cx, NULL, 0 }, + { "DISPLA", 0xd0, hndl_display, pgc_parse_bytes, 1 }, + { "DI", 0xd0, hndl_display, pgc_parse_bytes, 1 }, + { "ELIPSE", 0x39, hndl_ellipse, pgc_parse_coords, 2 }, + { "EL", 0x39, hndl_ellipse, pgc_parse_coords, 2 }, + { "IMAGEW", 0xd9, hndl_imagew, NULL, 0 }, + { "IW", 0xd9, hndl_imagew, NULL, 0 }, + { "LINFUN", 0xeb, hndl_linfun, pgc_parse_bytes, 1 }, + { "LF", 0xeb, hndl_linfun, pgc_parse_bytes, 1 }, + { "LINPAT", 0xea, hndl_linpat, pgc_parse_words, 1 }, + { "LP", 0xea, hndl_linpat, pgc_parse_words, 1 }, + { "LUTINT", 0xec, hndl_lutint, pgc_parse_bytes, 1 }, + { "LI", 0xec, hndl_lutint, pgc_parse_bytes, 1 }, + { "LUTRD", 0x50, hndl_lutrd, pgc_parse_bytes, 1 }, + { "LUTSAV", 0xed, hndl_lutsav, NULL, 0 }, + { "LUT", 0xee, hndl_lut, pgc_parse_bytes, 4 }, + { "MOVE", 0x10, hndl_move, pgc_parse_coords, 2 }, + { "M", 0x10, hndl_move, pgc_parse_coords, 2 }, + { "MOVE3", 0x12, hndl_move3, pgc_parse_coords, 3 }, + { "M3", 0x12, hndl_move3, pgc_parse_coords, 3 }, + { "MOVER", 0x11, hndl_mover, pgc_parse_coords, 2 }, + { "MR", 0x11, hndl_mover, pgc_parse_coords, 2 }, + { "MOVER3", 0x13, hndl_mover3, pgc_parse_coords, 3 }, + { "MR3", 0x13, hndl_mover3, pgc_parse_coords, 3 }, + { "PRMFIL", 0xe9, hndl_prmfil, pgc_parse_bytes, 1 }, + { "PF", 0xe9, hndl_prmfil, pgc_parse_bytes, 1 }, + { "POLY", 0x30, hndl_poly, parse_poly, 0 }, + { "P", 0x30, hndl_poly, parse_poly, 0 }, + { "RESETF", 0x04, hndl_resetf, NULL, 0 }, + { "RF", 0x04, hndl_resetf, NULL, 0 }, + { "TJUST", 0x85, hndl_tjust, pgc_parse_bytes, 2 }, + { "TJ", 0x85, hndl_tjust, pgc_parse_bytes, 2 }, + { "TSIZE", 0x81, hndl_tsize, pgc_parse_coords, 1 }, + { "TS", 0x81, hndl_tsize, pgc_parse_coords, 1 }, + { "VWPORT", 0xb2, hndl_vwport, pgc_parse_words, 4 }, + { "VWP", 0xb2, hndl_vwport, pgc_parse_words, 4 }, + { "WINDOW", 0xb3, hndl_window, pgc_parse_words, 4 }, + { "WI", 0xb3, hndl_window, pgc_parse_words, 4 }, - { "@@@@@@", 0x00, NULL, NULL, 0 } + { "@@@@@@", 0x00, NULL, NULL, 0 } }; - /* When the wake timer expires, that's when the drawing thread is actually * woken */ static void wake_timer(void *priv) { - pgc_t *dev = (pgc_t *)priv; + pgc_t *dev = (pgc_t *) priv; #ifdef ENABLE_PGC_LOG pgc_log("PGC: woke up\n"); @@ -1459,7 +1458,6 @@ wake_timer(void *priv) thread_set_event(dev->pgc_wake_thread); } - /* * The PGC drawing thread main loop. * @@ -1468,7 +1466,7 @@ wake_timer(void *priv) static void pgc_thread(void *priv) { - pgc_t *dev = (pgc_t *)priv; + pgc_t *dev = (pgc_t *) priv; const pgc_cmd_t *cmd; #ifdef ENABLE_PGC_LOG @@ -1476,28 +1474,28 @@ pgc_thread(void *priv) #endif for (;;) { - if (! parse_command(dev, &cmd)) { - /* Are we shutting down? */ - if (dev->stopped) { + if (!parse_command(dev, &cmd)) { + /* Are we shutting down? */ + if (dev->stopped) { #ifdef ENABLE_PGC_LOG - pgc_log("PGC: Thread stopping...\n"); + pgc_log("PGC: Thread stopping...\n"); #endif - dev->stopped = 0; - break; - } + dev->stopped = 0; + break; + } - /* Nope, just a reset. */ - continue; - } + /* Nope, just a reset. */ + continue; + } - pgc_log("PGC: Command: [%02x] '%s' found = %i\n", - dev->hex_command, dev->asc_command, (cmd != NULL)); + pgc_log("PGC: Command: [%02x] '%s' found = %i\n", + dev->hex_command, dev->asc_command, (cmd != NULL)); - if (cmd) { - dev->result_count = 0; - (*cmd->handler)(dev); - } else - pgc_error(dev, PGC_ERROR_OPCODE); + if (cmd) { + dev->result_count = 0; + (*cmd->handler)(dev); + } else + pgc_error(dev, PGC_ERROR_OPCODE); } #ifdef ENABLE_PGC_LOG @@ -1505,7 +1503,6 @@ pgc_thread(void *priv) #endif } - /* Parameter passed is not a number: abort. */ static int err_digit(pgc_t *dev) @@ -1513,27 +1510,28 @@ err_digit(pgc_t *dev) uint8_t asc; do { - /* Swallow everything until the next separator */ - if (! dev->inputbyte(dev, &asc)) return 0; - } while (! is_whitespace(asc)); + /* Swallow everything until the next separator */ + if (!dev->inputbyte(dev, &asc)) + return 0; + } while (!is_whitespace(asc)); pgc_error(dev, PGC_ERROR_DIGIT); return 0; } - /* Output a byte, either as hex or ASCII depending on the mode. */ int pgc_result_byte(pgc_t *dev, uint8_t val) { char buf[20]; - if (! dev->ascii_mode) - return output_byte(dev, val); + if (!dev->ascii_mode) + return output_byte(dev, val); if (dev->result_count) { - if (! output_byte(dev, ',')) return 0; + if (!output_byte(dev, ',')) + return 0; } sprintf(buf, "%i", val); dev->result_count++; @@ -1541,20 +1539,21 @@ pgc_result_byte(pgc_t *dev, uint8_t val) return output_string(dev, buf); } - /* Output a word, either as hex or ASCII depending on the mode. */ int pgc_result_word(pgc_t *dev, int16_t val) { char buf[20]; - if (! dev->ascii_mode) { - if (! output_byte(dev, val & 0xFF)) return 0; - return output_byte(dev, val >> 8); + if (!dev->ascii_mode) { + if (!output_byte(dev, val & 0xFF)) + return 0; + return output_byte(dev, val >> 8); } if (dev->result_count) { - if (! output_byte(dev, ',')) return 0; + if (!output_byte(dev, ',')) + return 0; } sprintf(buf, "%i", val); dev->result_count++; @@ -1562,26 +1561,24 @@ pgc_result_word(pgc_t *dev, int16_t val) return output_string(dev, buf); } - /* Report an error, either in ASCII or in hex. */ int pgc_error(pgc_t *dev, int err) { if (dev->mapram[0x307]) { - /* Errors enabled? */ - if (dev->ascii_mode) { - if (err >= PGC_ERROR_RANGE && err <= PGC_ERROR_MISSING) - return error_string(dev, pgc_err_msgs[err]); - return error_string(dev, "Unknown error\r"); - } else { - return error_byte(dev, err); - } + /* Errors enabled? */ + if (dev->ascii_mode) { + if (err >= PGC_ERROR_RANGE && err <= PGC_ERROR_MISSING) + return error_string(dev, pgc_err_msgs[err]); + return error_string(dev, "Unknown error\r"); + } else { + return error_byte(dev, err); + } } return 1; } - /* Initialize RAM and registers to default values. */ void pgc_reset(pgc_t *dev) @@ -1592,20 +1589,20 @@ pgc_reset(pgc_t *dev) /* The 'CGA disable' jumper is not currently implemented. */ dev->mapram[0x30b] = dev->cga_enabled = 1; - dev->mapram[0x30c] = dev->cga_enabled; - dev->mapram[0x30d] = dev->cga_enabled; + dev->mapram[0x30c] = dev->cga_enabled; + dev->mapram[0x30d] = dev->cga_enabled; - dev->mapram[0x3f8] = 0x03; /* minor version */ - dev->mapram[0x3f9] = 0x01; /* minor version */ - dev->mapram[0x3fb] = 0xa5; /* } */ - dev->mapram[0x3fc] = 0x5a; /* PGC self-test passed */ - dev->mapram[0x3fd] = 0x55; /* } */ - dev->mapram[0x3fe] = 0x5a; /* } */ + dev->mapram[0x3f8] = 0x03; /* minor version */ + dev->mapram[0x3f9] = 0x01; /* minor version */ + dev->mapram[0x3fb] = 0xa5; /* } */ + dev->mapram[0x3fc] = 0x5a; /* PGC self-test passed */ + dev->mapram[0x3fd] = 0x55; /* } */ + dev->mapram[0x3fe] = 0x5a; /* } */ - dev->ascii_mode = 1; /* start off in ASCII mode */ + dev->ascii_mode = 1; /* start off in ASCII mode */ dev->line_pattern = 0xffff; memset(dev->fill_pattern, 0xff, sizeof(dev->fill_pattern)); - dev->color = 0xff; + dev->color = 0xff; dev->tjust_h = 1; dev->tjust_v = 1; @@ -1621,10 +1618,10 @@ pgc_reset(pgc_t *dev) /* Empty command lists. */ for (n = 0; n < 256; n++) { - dev->clist[n].wrptr = 0; - dev->clist[n].rdptr = 0; - dev->clist[n].repeat = 0; - dev->clist[n].chain = 0; + dev->clist[n].wrptr = 0; + dev->clist[n].rdptr = 0; + dev->clist[n].repeat = 0; + dev->clist[n].chain = 0; } dev->clcur = NULL; @@ -1637,33 +1634,31 @@ pgc_reset(pgc_t *dev) hndl_lutsav(dev); } - /* Switch between CGA mode (DISPLAY 1) and native mode (DISPLAY 0). */ void pgc_setdisplay(pgc_t *dev, int cga) { pgc_log("PGC: setdisplay(%i): cga_selected=%i cga_enabled=%i\n", - cga, dev->cga_selected, dev->cga_enabled); + cga, dev->cga_selected, dev->cga_enabled); if (dev->cga_selected != (dev->cga_enabled && cga)) { - dev->cga_selected = (dev->cga_enabled && cga); - dev->displine = 0; + dev->cga_selected = (dev->cga_enabled && cga); + dev->displine = 0; - if (dev->cga_selected) { - mem_mapping_enable(&dev->cga_mapping); - dev->screenw = PGC_CGA_WIDTH; - dev->screenh = PGC_CGA_HEIGHT; - } else { - mem_mapping_disable(&dev->cga_mapping); - dev->screenw = dev->visw; - dev->screenh = dev->vish; - } + if (dev->cga_selected) { + mem_mapping_enable(&dev->cga_mapping); + dev->screenw = PGC_CGA_WIDTH; + dev->screenh = PGC_CGA_HEIGHT; + } else { + mem_mapping_disable(&dev->cga_mapping); + dev->screenw = dev->visw; + dev->screenh = dev->vish; + } - pgc_recalctimings(dev); + pgc_recalctimings(dev); } } - /* * When idle, the PGC drawing thread sleeps. pgc_wake() awakens it - but * not immediately. Like the Voodoo, it has a short delay so that writes @@ -1673,70 +1668,66 @@ void pgc_wake(pgc_t *dev) { if (!timer_is_enabled(&dev->wake_timer)) - timer_set_delay_u64(&dev->wake_timer, WAKE_DELAY); + timer_set_delay_u64(&dev->wake_timer, WAKE_DELAY); } - /* Wait for more input data, or for output to drain. */ void pgc_sleep(pgc_t *dev) { pgc_log("PGC: sleeping on %i %i %i %i 0x%02x 0x%02x\n", - dev->stopped, - dev->waiting_input_fifo, dev->waiting_output_fifo, - dev->waiting_error_fifo, dev->mapram[0x300], dev->mapram[0x301]); + dev->stopped, + dev->waiting_input_fifo, dev->waiting_output_fifo, + dev->waiting_error_fifo, dev->mapram[0x300], dev->mapram[0x301]); /* Avoid entering waiting state. */ if (dev->stopped) { - dev->waiting_input_fifo = 0; - dev->waiting_output_fifo = 0; - return; + dev->waiting_input_fifo = 0; + dev->waiting_output_fifo = 0; + return; } /* Race condition: If host wrote to the PGC during the that * won't be noticed */ - if (dev->waiting_input_fifo && - dev->mapram[0x300] != dev->mapram[0x301]) { - dev->waiting_input_fifo = 0; - return; + if (dev->waiting_input_fifo && dev->mapram[0x300] != dev->mapram[0x301]) { + dev->waiting_input_fifo = 0; + return; } /* Same if they read. */ - if (dev->waiting_output_fifo && - dev->mapram[0x302] != (uint8_t)(dev->mapram[0x303] - 1)) { - dev->waiting_output_fifo = 0; - return; + if (dev->waiting_output_fifo && dev->mapram[0x302] != (uint8_t) (dev->mapram[0x303] - 1)) { + dev->waiting_output_fifo = 0; + return; } thread_wait_event(dev->pgc_wake_thread, -1); thread_reset_event(dev->pgc_wake_thread); } - /* Pull the next byte from the current command list. */ int pgc_clist_byte(pgc_t *dev, uint8_t *val) { - if (dev->clcur == NULL) return 0; + if (dev->clcur == NULL) + return 0; if (dev->clcur->rdptr < dev->clcur->wrptr) - *val = dev->clcur->list[dev->clcur->rdptr++]; + *val = dev->clcur->list[dev->clcur->rdptr++]; else - *val = 0; + *val = 0; /* If we've reached the end, reset to the beginning and * (if repeating) run the repeat */ if (dev->clcur->rdptr >= dev->clcur->wrptr) { - dev->clcur->rdptr = 0; - dev->clcur->repeat--; - if (dev->clcur->repeat == 0) - dev->clcur = dev->clcur->chain; + dev->clcur->rdptr = 0; + dev->clcur->repeat--; + if (dev->clcur->repeat == 0) + dev->clcur = dev->clcur->chain; } return 1; } - /* * Read in a byte, either as hex (1 byte) or ASCII (decimal). * Returns 0 if PGC reset detected while the value is being read. @@ -1747,24 +1738,24 @@ pgc_param_byte(pgc_t *dev, uint8_t *val) int32_t c; if (dev->clcur) - return pgc_clist_byte(dev, val); + return pgc_clist_byte(dev, val); - if (! dev->ascii_mode) - return dev->inputbyte(dev, val); + if (!dev->ascii_mode) + return dev->inputbyte(dev, val); - if (! pgc_param_coord(dev, &c)) return 0; + if (!pgc_param_coord(dev, &c)) + return 0; - c = (c >> 16); /* drop fractional part */ + c = (c >> 16); /* drop fractional part */ if (c > 255) { - pgc_error(dev, PGC_ERROR_RANGE); - return 0; + pgc_error(dev, PGC_ERROR_RANGE); + return 0; } - *val = (uint8_t)c; + *val = (uint8_t) c; return 1; } - /* * Read in a word, either as hex (2 bytes) or ASCII (decimal). * Returns 0 if PGC reset detected while the value is being read. @@ -1776,41 +1767,44 @@ pgc_param_word(pgc_t *dev, int16_t *val) int32_t c; if (dev->clcur) { - if (! pgc_clist_byte(dev, &lo)) return 0; - if (! pgc_clist_byte(dev, &hi)) return 0; - *val = (((int16_t)hi) << 8) | lo; + if (!pgc_clist_byte(dev, &lo)) + return 0; + if (!pgc_clist_byte(dev, &hi)) + return 0; + *val = (((int16_t) hi) << 8) | lo; - return 1; + return 1; } - if (! dev->ascii_mode) { - if (! dev->inputbyte(dev, &lo)) return 0; - if (! dev->inputbyte(dev, &hi)) return 0; - *val = (((int16_t)hi) << 8) | lo; + if (!dev->ascii_mode) { + if (!dev->inputbyte(dev, &lo)) + return 0; + if (!dev->inputbyte(dev, &hi)) + return 0; + *val = (((int16_t) hi) << 8) | lo; - return 1; + return 1; } - if (! pgc_param_coord(dev, &c)) return 0; + if (!pgc_param_coord(dev, &c)) + return 0; c = (c >> 16); if (c > 0x7fff || c < -0x7fff) { - pgc_error(dev, PGC_ERROR_RANGE); - return 0; + pgc_error(dev, PGC_ERROR_RANGE); + return 0; } - *val = (int16_t)c; + *val = (int16_t) c; return 1; } - typedef enum { PS_MAIN, PS_FRACTION, PS_EXPONENT } parse_state_t; - /* * Read in a PGC coordinate. * @@ -1821,136 +1815,143 @@ typedef enum { int pgc_param_coord(pgc_t *dev, int32_t *value) { - uint8_t asc; - int sign = 1; - int esign = 1; - int n; - uint16_t dp = 1; - uint16_t integer = 0; - uint16_t frac = 0; - uint16_t exponent = 0; - uint32_t res; + uint8_t asc; + int sign = 1; + int esign = 1; + int n; + uint16_t dp = 1; + uint16_t integer = 0; + uint16_t frac = 0; + uint16_t exponent = 0; + uint32_t res; parse_state_t state = PS_MAIN; - uint8_t encoded[4]; + uint8_t encoded[4]; /* If there is a command list running, pull the bytes out of that * command list */ if (dev->clcur) { - for (n = 0; n < 4; n++) - if (! pgc_clist_byte(dev, &encoded[n])) return 0; - integer = (((int16_t)encoded[1]) << 8) | encoded[0]; - frac = (((int16_t)encoded[3]) << 8) | encoded[2]; + for (n = 0; n < 4; n++) + if (!pgc_clist_byte(dev, &encoded[n])) + return 0; + integer = (((int16_t) encoded[1]) << 8) | encoded[0]; + frac = (((int16_t) encoded[3]) << 8) | encoded[2]; - *value = (((int32_t)integer) << 16) | frac; - return 1; + *value = (((int32_t) integer) << 16) | frac; + return 1; } /* If in hex mode, read in the encoded integer and fraction parts * from the hex stream */ - if (! dev->ascii_mode) { - for (n = 0; n < 4; n++) - if (! dev->inputbyte(dev, &encoded[n])) return 0; - integer = (((int16_t)encoded[1]) << 8) | encoded[0]; - frac = (((int16_t)encoded[3]) << 8) | encoded[2]; + if (!dev->ascii_mode) { + for (n = 0; n < 4; n++) + if (!dev->inputbyte(dev, &encoded[n])) + return 0; + integer = (((int16_t) encoded[1]) << 8) | encoded[0]; + frac = (((int16_t) encoded[3]) << 8) | encoded[2]; - *value = (((int32_t)integer) << 16) | frac; - return 1; + *value = (((int32_t) integer) << 16) | frac; + return 1; } /* Parsing an ASCII value; skip separators. */ do { - if (! dev->inputbyte(dev, &asc)) return 0; - if (asc == '-') sign = -1; - } while (is_whitespace(asc)); + if (!dev->inputbyte(dev, &asc)) + return 0; + if (asc == '-') + sign = -1; + } while (is_whitespace(asc)); /* There had better be a digit next. */ - if (! isdigit(asc)) { - pgc_error(dev, PGC_ERROR_MISSING); - return 0; + if (!isdigit(asc)) { + pgc_error(dev, PGC_ERROR_MISSING); + return 0; } do { - switch (asc) { - /* Decimal point is acceptable in 'main' state - * (start of fraction) not otherwise */ - case '.': - if (state == PS_MAIN) { - if (! dev->inputbyte(dev, &asc)) return 0; - state = PS_FRACTION; - continue; - } else { - pgc_error(dev, PGC_ERROR_MISSING); - return err_digit(dev); - } - break; + switch (asc) { + /* Decimal point is acceptable in 'main' state + * (start of fraction) not otherwise */ + case '.': + if (state == PS_MAIN) { + if (!dev->inputbyte(dev, &asc)) + return 0; + state = PS_FRACTION; + continue; + } else { + pgc_error(dev, PGC_ERROR_MISSING); + return err_digit(dev); + } + break; - /* Scientific notation. */ - case 'd': - case 'D': - case 'e': - case 'E': - esign = 1; - if (! dev->inputbyte(dev, &asc)) return 0; - if (asc == '-') { - sign = -1; - if (! dev->inputbyte(dev, &asc)) return 0; - } - state = PS_EXPONENT; - continue; + /* Scientific notation. */ + case 'd': + case 'D': + case 'e': + case 'E': + esign = 1; + if (!dev->inputbyte(dev, &asc)) + return 0; + if (asc == '-') { + sign = -1; + if (!dev->inputbyte(dev, &asc)) + return 0; + } + state = PS_EXPONENT; + continue; - /* Should be a number or a separator. */ - default: - if (is_whitespace(asc)) break; - if (! isdigit(asc)) { - pgc_error(dev, PGC_ERROR_MISSING); - return err_digit(dev); - } - asc -= '0'; /* asc is digit */ + /* Should be a number or a separator. */ + default: + if (is_whitespace(asc)) + break; + if (!isdigit(asc)) { + pgc_error(dev, PGC_ERROR_MISSING); + return err_digit(dev); + } + asc -= '0'; /* asc is digit */ - switch (state) { - case PS_MAIN: - integer = (integer * 10)+asc; - if (integer & 0x8000) { - /* Overflow */ - pgc_error(dev, PGC_ERROR_RANGE); - integer = 0x7fff; - } - break; + switch (state) { + case PS_MAIN: + integer = (integer * 10) + asc; + if (integer & 0x8000) { + /* Overflow */ + pgc_error(dev, PGC_ERROR_RANGE); + integer = 0x7fff; + } + break; - case PS_FRACTION: - frac = (frac * 10) + asc; - dp *= 10; - break; + case PS_FRACTION: + frac = (frac * 10) + asc; + dp *= 10; + break; - case PS_EXPONENT: - exponent = (exponent * 10)+asc; - break; - } + case PS_EXPONENT: + exponent = (exponent * 10) + asc; + break; + } + } - } - - if (! dev->inputbyte(dev, &asc)) return 0; - } while (! is_whitespace(asc)); + if (!dev->inputbyte(dev, &asc)) + return 0; + } while (!is_whitespace(asc)); res = (frac << 16) / dp; pgc_log("PGC: integer=%u frac=%u exponent=%u dp=%i res=0x%08lx\n", - integer, frac, exponent, dp, res); + integer, frac, exponent, dp, res); res = (res & 0xffff) | (integer << 16); if (exponent) { - for (n = 0; n < exponent; n++) { - if (esign > 0) - res *= 10; - else - res /= 10; - } + for (n = 0; n < exponent; n++) { + if (esign > 0) + res *= 10; + else + res /= 10; + } } - *value = sign*res; + *value = sign * res; return 1; } - /* * Add a byte to a command list. * @@ -1962,26 +1963,26 @@ pgc_cl_append(pgc_cl_t *list, uint8_t v) uint8_t *buf; if (list->listmax == 0 || list->list == NULL) { - list->list = (uint8_t *)malloc(4096); - if (!list->list) { + list->list = (uint8_t *) malloc(4096); + if (!list->list) { #ifdef ENABLE_PGC_LOG - pgc_log("PGC: out of memory initializing command list\n"); + pgc_log("PGC: out of memory initializing command list\n"); #endif - return 0; - } - list->listmax = 4096; + return 0; + } + list->listmax = 4096; } while (list->wrptr >= list->listmax) { - buf = (uint8_t *)realloc(list->list, 2 * list->listmax); - if (!buf) { + buf = (uint8_t *) realloc(list->list, 2 * list->listmax); + if (!buf) { #ifdef ENABLE_PGC_LOG - pgc_log("PGC: out of memory growing command list\n"); + pgc_log("PGC: out of memory growing command list\n"); #endif - return 0; - } - list->list = buf; - list->listmax *= 2; + return 0; + } + list->list = buf; + list->listmax *= 2; } list->list[list->wrptr++] = v; @@ -1989,30 +1990,29 @@ pgc_cl_append(pgc_cl_t *list, uint8_t v) return 1; } - /* Parse but don't execute a command with a fixed number of byte parameters. */ int pgc_parse_bytes(pgc_t *dev, pgc_cl_t *cl, int count) { - uint8_t *param = (uint8_t *)malloc(count); - int n; + uint8_t *param = (uint8_t *) malloc(count); + int n; - if (! param) { - pgc_error(dev, PGC_ERROR_OVERFLOW); - return 0; + if (!param) { + pgc_error(dev, PGC_ERROR_OVERFLOW); + return 0; } for (n = 0; n < count; n++) { - if (! pgc_param_byte(dev, ¶m[n])) { - free(param); - return 0; - } + if (!pgc_param_byte(dev, ¶m[n])) { + free(param); + return 0; + } - if (! pgc_cl_append(cl, param[n])) { - pgc_error(dev, PGC_ERROR_OVERFLOW); - free(param); - return 0; - } + if (!pgc_cl_append(cl, param[n])) { + pgc_error(dev, PGC_ERROR_OVERFLOW); + free(param); + return 0; + } } free(param); @@ -2020,31 +2020,29 @@ pgc_parse_bytes(pgc_t *dev, pgc_cl_t *cl, int count) return 1; } - /* Parse but don't execute a command with a fixed number of word parameters. */ int pgc_parse_words(pgc_t *dev, pgc_cl_t *cl, int count) { - int16_t *param = (int16_t *)malloc(count * sizeof(int16_t)); - int n; + int16_t *param = (int16_t *) malloc(count * sizeof(int16_t)); + int n; - if (! param) { - pgc_error(dev, PGC_ERROR_OVERFLOW); - return 0; + if (!param) { + pgc_error(dev, PGC_ERROR_OVERFLOW); + return 0; } for (n = 0; n < count; n++) { - if (! pgc_param_word(dev, ¶m[n])) { - free(param); - return 0; - } + if (!pgc_param_word(dev, ¶m[n])) { + free(param); + return 0; + } - if (!pgc_cl_append(cl, param[n] & 0xff) || - !pgc_cl_append(cl, param[n] >> 8)) { - pgc_error(dev, PGC_ERROR_OVERFLOW); - free(param); - return 0; - } + if (!pgc_cl_append(cl, param[n] & 0xff) || !pgc_cl_append(cl, param[n] >> 8)) { + pgc_error(dev, PGC_ERROR_OVERFLOW); + free(param); + return 0; + } } free(param); @@ -2052,24 +2050,23 @@ pgc_parse_words(pgc_t *dev, pgc_cl_t *cl, int count) return 1; } - /* Parse but don't execute a command with a fixed number of coord parameters */ int pgc_parse_coords(pgc_t *dev, pgc_cl_t *cl, int count) { - int32_t *param = (int32_t *)malloc(count * sizeof(int32_t)); - int n; + int32_t *param = (int32_t *) malloc(count * sizeof(int32_t)); + int n; - if (! param) { - pgc_error(dev, PGC_ERROR_OVERFLOW); - return 0; + if (!param) { + pgc_error(dev, PGC_ERROR_OVERFLOW); + return 0; } for (n = 0; n < count; n++) { - if (! pgc_param_coord(dev, ¶m[n])) { - free(param); - return 0; - } + if (!pgc_param_coord(dev, ¶m[n])) { + free(param); + return 0; + } } /* Here is how the real PGC serializes coords: @@ -2078,17 +2075,15 @@ pgc_parse_coords(pgc_t *dev, pgc_cl_t *cl, int count) * 100.3 -> 64 00 CD 4C ie 0064.4CCD */ for (n = 0; n < count; n++) { - /* Serialize integer part. */ - if (!pgc_cl_append(cl, (param[n] >> 16) & 0xff) || - !pgc_cl_append(cl, (param[n] >> 24) & 0xff) || + /* Serialize integer part. */ + if (!pgc_cl_append(cl, (param[n] >> 16) & 0xff) || !pgc_cl_append(cl, (param[n] >> 24) & 0xff) || - /* Serialize fraction part. */ - !pgc_cl_append(cl, (param[n] ) & 0xff) || - !pgc_cl_append(cl, (param[n] >> 8) & 0xff)) { - pgc_error(dev, PGC_ERROR_OVERFLOW); - free(param); - return 0; - } + /* Serialize fraction part. */ + !pgc_cl_append(cl, (param[n]) & 0xff) || !pgc_cl_append(cl, (param[n] >> 8) & 0xff)) { + pgc_error(dev, PGC_ERROR_OVERFLOW); + free(param); + return 0; + } } free(param); @@ -2096,7 +2091,6 @@ pgc_parse_coords(pgc_t *dev, pgc_cl_t *cl, int count) return 1; } - /* Convert coordinates based on the current window / viewport to raster * coordinates. */ void @@ -2112,7 +2106,6 @@ pgc_dto_raster(pgc_t *dev, double *x, double *y) pgc_log("PGC: coords to raster: (%f, %f) -> (%f, %f)\n", x0, y0, *x, *y); } - /* Overloads that take ints. */ void pgc_sto_raster(pgc_t *dev, int16_t *x, int16_t *y) @@ -2120,106 +2113,102 @@ pgc_sto_raster(pgc_t *dev, int16_t *x, int16_t *y) double xd = *x, yd = *y; pgc_dto_raster(dev, &xd, &yd); - *x = (int16_t)xd; - *y = (int16_t)yd; + *x = (int16_t) xd; + *y = (int16_t) yd; } - void pgc_ito_raster(pgc_t *dev, int32_t *x, int32_t *y) { double xd = *x, yd = *y; pgc_dto_raster(dev, &xd, &yd); - *x = (int32_t)xd; - *y = (int32_t)yd; + *x = (int32_t) xd; + *y = (int32_t) yd; } - void pgc_recalctimings(pgc_t *dev) { double disptime, _dispontime, _dispofftime; - double pixel_clock = (cpuclock * (double)(1ull << 32)) / (dev->cga_selected ? 25175000.0 : dev->native_pixel_clock); + double pixel_clock = (cpuclock * (double) (1ull << 32)) / (dev->cga_selected ? 25175000.0 : dev->native_pixel_clock); /* Use a fixed 640x400 display. */ - disptime = dev->screenw + 11; - _dispontime = dev->screenw * pixel_clock; - _dispofftime = (disptime - dev->screenw) * pixel_clock; - dev->dispontime = (uint64_t)(_dispontime); - dev->dispofftime = (uint64_t)(_dispofftime); + disptime = dev->screenw + 11; + _dispontime = dev->screenw * pixel_clock; + _dispofftime = (disptime - dev->screenw) * pixel_clock; + dev->dispontime = (uint64_t) (_dispontime); + dev->dispofftime = (uint64_t) (_dispofftime); } - /* Write to CGA registers are copied into the transfer memory buffer. */ void pgc_out(uint16_t addr, uint8_t val, void *priv) { - pgc_t *dev = (pgc_t *)priv; + pgc_t *dev = (pgc_t *) priv; pgc_log("PGC: out(%04x, %02x)\n", addr, val); - switch(addr) { - case 0x03d0: /* CRTC Index register */ - case 0x03d2: - case 0x03d4: - case 0x03d6: - dev->mapram[0x03d0] = val; - break; + switch (addr) { + case 0x03d0: /* CRTC Index register */ + case 0x03d2: + case 0x03d4: + case 0x03d6: + dev->mapram[0x03d0] = val; + break; - case 0x03d1: /* CRTC Data register */ - case 0x03d3: - case 0x03d5: - case 0x03d7: - if (dev->mapram[0x03d0] < 18) - dev->mapram[0x03e0 + dev->mapram[0x03d0]] = val; - break; + case 0x03d1: /* CRTC Data register */ + case 0x03d3: + case 0x03d5: + case 0x03d7: + if (dev->mapram[0x03d0] < 18) + dev->mapram[0x03e0 + dev->mapram[0x03d0]] = val; + break; - case 0x03d8: /* CRTC Mode Control register */ - dev->mapram[0x03d8] = val; - break; + case 0x03d8: /* CRTC Mode Control register */ + dev->mapram[0x03d8] = val; + break; - case 0x03d9: /* CRTC Color Select register */ - dev->mapram[0x03d9] = val; - break; + case 0x03d9: /* CRTC Color Select register */ + dev->mapram[0x03d9] = val; + break; } } - /* Read back the CGA registers. */ uint8_t pgc_in(uint16_t addr, void *priv) { - pgc_t *dev = (pgc_t *)priv; + pgc_t *dev = (pgc_t *) priv; uint8_t ret = 0xff; - switch(addr) { - case 0x03d0: /* CRTC Index register */ - case 0x03d2: - case 0x03d4: - case 0x03d6: - ret = dev->mapram[0x03d0]; - break; + switch (addr) { + case 0x03d0: /* CRTC Index register */ + case 0x03d2: + case 0x03d4: + case 0x03d6: + ret = dev->mapram[0x03d0]; + break; - case 0x03d1: /* CRTC Data register */ - case 0x03d3: - case 0x03d5: - case 0x03d7: - if (dev->mapram[0x03d0] < 18) - ret = dev->mapram[0x03e0 + dev->mapram[0x03d0]]; - break; + case 0x03d1: /* CRTC Data register */ + case 0x03d3: + case 0x03d5: + case 0x03d7: + if (dev->mapram[0x03d0] < 18) + ret = dev->mapram[0x03e0 + dev->mapram[0x03d0]]; + break; - case 0x03d8: /* CRTC Mode Control register */ - ret = dev->mapram[0x03d8]; - break; + case 0x03d8: /* CRTC Mode Control register */ + ret = dev->mapram[0x03d8]; + break; - case 0x03d9: /* CRTC Color Select register */ - ret = dev->mapram[0x03d9]; - break; + case 0x03d9: /* CRTC Color Select register */ + ret = dev->mapram[0x03d9]; + break; - case 0x03da: /* CRTC Status register */ - ret = dev->mapram[0x03da]; - break; + case 0x03da: /* CRTC Status register */ + ret = dev->mapram[0x03da]; + break; } pgc_log("PGC: in(%04x) = %02x\n", addr, ret); @@ -2227,13 +2216,12 @@ pgc_in(uint16_t addr, void *priv) return ret; } - /* Memory write to the transfer buffer. */ /* TODO: Check the CGA mapping repeat stuff. */ void pgc_write(uint32_t addr, uint8_t val, void *priv) { - pgc_t *dev = (pgc_t *)priv; + pgc_t *dev = (pgc_t *) priv; /* * It seems variable whether the PGC maps 1K or 2K at 0xc6000. @@ -2241,154 +2229,146 @@ pgc_write(uint32_t addr, uint8_t val, void *priv) * Map 2K here in case a clone requires it. */ if (addr >= 0xc6000 && addr < 0xc6800) { - addr &= 0x7ff; + addr &= 0x7ff; - /* If one of the FIFOs has been updated, this may cause - * the drawing thread to be woken */ + /* If one of the FIFOs has been updated, this may cause + * the drawing thread to be woken */ - if (dev->mapram[addr] != val) { - dev->mapram[addr] = val; + if (dev->mapram[addr] != val) { + dev->mapram[addr] = val; - switch (addr) { - case 0x300: /* input write pointer */ - if (dev->waiting_input_fifo && - dev->mapram[0x300] != dev->mapram[0x301]) { - dev->waiting_input_fifo = 0; - pgc_wake(dev); - } - break; + switch (addr) { + case 0x300: /* input write pointer */ + if (dev->waiting_input_fifo && dev->mapram[0x300] != dev->mapram[0x301]) { + dev->waiting_input_fifo = 0; + pgc_wake(dev); + } + break; - case 0x303: /* output read pointer */ - if (dev->waiting_output_fifo && - dev->mapram[0x302] != (uint8_t)(dev->mapram[0x303] - 1)) { - dev->waiting_output_fifo = 0; - pgc_wake(dev); - } - break; + case 0x303: /* output read pointer */ + if (dev->waiting_output_fifo && dev->mapram[0x302] != (uint8_t) (dev->mapram[0x303] - 1)) { + dev->waiting_output_fifo = 0; + pgc_wake(dev); + } + break; - case 0x305: /* error read pointer */ - if (dev->waiting_error_fifo && - dev->mapram[0x304] != (uint8_t)(dev->mapram[0x305] - 1)) { - dev->waiting_error_fifo = 0; - pgc_wake(dev); - } - break; + case 0x305: /* error read pointer */ + if (dev->waiting_error_fifo && dev->mapram[0x304] != (uint8_t) (dev->mapram[0x305] - 1)) { + dev->waiting_error_fifo = 0; + pgc_wake(dev); + } + break; - case 0x306: /* cold start flag */ - /* XXX This should be in IM-1024 specific code */ - dev->mapram[0x306] = 0; - break; + case 0x306: /* cold start flag */ + /* XXX This should be in IM-1024 specific code */ + dev->mapram[0x306] = 0; + break; - case 0x30c: /* display type */ - pgc_setdisplay(priv, dev->mapram[0x30c]); - dev->mapram[0x30d] = dev->mapram[0x30c]; - break; + case 0x30c: /* display type */ + pgc_setdisplay(priv, dev->mapram[0x30c]); + dev->mapram[0x30d] = dev->mapram[0x30c]; + break; - case 0x3ff: /* reboot the PGC */ - pgc_wake(dev); - break; - } - } + case 0x3ff: /* reboot the PGC */ + pgc_wake(dev); + break; + } + } } if (addr >= 0xb8000 && addr < 0xc0000 && dev->cga_selected) { - addr &= 0x3fff; - dev->cga_vram[addr] = val; + addr &= 0x3fff; + dev->cga_vram[addr] = val; } } - /* TODO: Check the CGA mapping repeat stuff. */ uint8_t pgc_read(uint32_t addr, void *priv) { - pgc_t *dev = (pgc_t *)priv; + pgc_t *dev = (pgc_t *) priv; uint8_t ret = 0xff; if (addr >= 0xc6000 && addr < 0xc6800) { - addr &= 0x7ff; - ret = dev->mapram[addr]; + addr &= 0x7ff; + ret = dev->mapram[addr]; } else if (addr >= 0xb8000 && addr < 0xc0000 && dev->cga_selected) { - addr &= 0x3fff; - ret = dev->cga_vram[addr]; + addr &= 0x3fff; + ret = dev->cga_vram[addr]; } return ret; } - /* Draw the display in CGA (640x400) text mode. */ void pgc_cga_text(pgc_t *dev, int w) { - int x, c; - uint8_t chr, attr; - int drawcursor = 0; + int x, c; + uint8_t chr, attr; + int drawcursor = 0; uint32_t cols[2]; - int pitch = (dev->mapram[0x3e9] + 1) * 2; - uint16_t sc = (dev->displine & 0x0f) % pitch; - uint16_t ma = (dev->mapram[0x3ed] | (dev->mapram[0x3ec] << 8)) & 0x3fff; - uint16_t ca = (dev->mapram[0x3ef] | (dev->mapram[0x3ee] << 8)) & 0x3fff; + int pitch = (dev->mapram[0x3e9] + 1) * 2; + uint16_t sc = (dev->displine & 0x0f) % pitch; + uint16_t ma = (dev->mapram[0x3ed] | (dev->mapram[0x3ec] << 8)) & 0x3fff; + uint16_t ca = (dev->mapram[0x3ef] | (dev->mapram[0x3ee] << 8)) & 0x3fff; uint8_t *addr; uint32_t val; - int cw = (w == 80) ? 8 : 16; + int cw = (w == 80) ? 8 : 16; addr = &dev->cga_vram[((ma + ((dev->displine / pitch) * w)) * 2) & 0x3ffe]; ma += (dev->displine / pitch) * w; for (x = 0; x < w; x++) { - chr = *addr++; - attr = *addr++; + chr = *addr++; + attr = *addr++; - /* Cursor enabled? */ - if (ma == ca && (dev->cgablink & 8) && - (dev->mapram[0x3ea] & 0x60) != 0x20) { - drawcursor = ((dev->mapram[0x3ea] & 0x1f) <= (sc >> 1)) && - ((dev->mapram[0x3eb] & 0x1f) >= (sc >> 1)); - } else - drawcursor = 0; + /* Cursor enabled? */ + if (ma == ca && (dev->cgablink & 8) && (dev->mapram[0x3ea] & 0x60) != 0x20) { + drawcursor = ((dev->mapram[0x3ea] & 0x1f) <= (sc >> 1)) && ((dev->mapram[0x3eb] & 0x1f) >= (sc >> 1)); + } else + drawcursor = 0; - if (dev->mapram[0x3d8] & 0x20) { - cols[1] = (attr & 15) + 16; - cols[0] = ((attr >> 4) & 7) + 16; - if ((dev->cgablink & 8) && (attr & 0x80) && !drawcursor) - cols[1] = cols[0]; - } else { - cols[1] = (attr & 15) + 16; - cols[0] = (attr >> 4) + 16; - } - - for (c = 0; c < cw; c++) { - if (drawcursor) - val = cols[(fontdatm[chr + dev->fontbase][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ 0x0f; - else - val = cols[(fontdatm[chr + dev->fontbase][sc] & (1 << (c ^ 7))) ? 1 : 0]; - if (cw == 8) /* 80x25 CGA text screen. */ - buffer32->line[dev->displine][(x * cw) + c] = val; - else { /* 40x25 CGA text screen. */ - buffer32->line[dev->displine][(x * cw) + (c * 2)] = val; - buffer32->line[dev->displine][(x * cw) + (c * 2) + 1] = val; + if (dev->mapram[0x3d8] & 0x20) { + cols[1] = (attr & 15) + 16; + cols[0] = ((attr >> 4) & 7) + 16; + if ((dev->cgablink & 8) && (attr & 0x80) && !drawcursor) + cols[1] = cols[0]; + } else { + cols[1] = (attr & 15) + 16; + cols[0] = (attr >> 4) + 16; } - } - ma++; + for (c = 0; c < cw; c++) { + if (drawcursor) + val = cols[(fontdatm[chr + dev->fontbase][sc] & (1 << (c ^ 7))) ? 1 : 0] ^ 0x0f; + else + val = cols[(fontdatm[chr + dev->fontbase][sc] & (1 << (c ^ 7))) ? 1 : 0]; + if (cw == 8) /* 80x25 CGA text screen. */ + buffer32->line[dev->displine][(x * cw) + c] = val; + else { /* 40x25 CGA text screen. */ + buffer32->line[dev->displine][(x * cw) + (c * 2)] = val; + buffer32->line[dev->displine][(x * cw) + (c * 2) + 1] = val; + } + } + + ma++; } } - /* Draw the display in CGA (320x200) graphics mode. */ void pgc_cga_gfx40(pgc_t *dev) { - int x, c; + int x, c; uint32_t cols[4]; - int col; + int col; uint16_t ma = (dev->mapram[0x3ed] | (dev->mapram[0x3ec] << 8)) & 0x3fff; uint8_t *addr; uint16_t dat; cols[0] = (dev->mapram[0x3d9] & 15) + 16; - col = ((dev->mapram[0x3d9] & 16) ? 8 : 0) + 16; + col = ((dev->mapram[0x3d9] & 16) ? 8 : 0) + 16; /* From John Elliott's site: On a real CGA, if bit 2 of port 03D8h and bit 5 of port 03D9h are both set, @@ -2396,37 +2376,35 @@ pgc_cga_gfx40(pgc_t *dev) magenta/cyan/white. You still get red/cyan/white if bit 5 of port 03D9h is not set. This is a firmware issue rather than hardware. */ if (dev->mapram[0x3d9] & 32) { - cols[1] = col | 3; - cols[2] = col | 5; - cols[3] = col | 7; + cols[1] = col | 3; + cols[2] = col | 5; + cols[3] = col | 7; } else if (dev->mapram[0x3d8] & 4) { - cols[1] = col | 3; - cols[2] = col | 4; - cols[3] = col | 7; + cols[1] = col | 3; + cols[2] = col | 4; + cols[3] = col | 7; } else { - cols[1] = col | 2; - cols[2] = col | 4; - cols[3] = col | 6; + cols[1] = col | 2; + cols[2] = col | 4; + cols[3] = col | 6; } for (x = 0; x < 40; x++) { - addr = &dev->cga_vram[(ma + 2 * x + 80 * (dev->displine >> 2) + 0x2000 * ((dev->displine >> 1) & 1)) & 0x3fff]; - dat = (addr[0] << 8) | addr[1]; - dev->ma++; - for (c = 0; c < 8; c++) { - buffer32->line[dev->displine][(x << 4) + (c << 1)] = - buffer32->line[dev->displine][(x << 4) + (c << 1) + 1] = cols[dat >> 14]; - dat <<= 2; - } + addr = &dev->cga_vram[(ma + 2 * x + 80 * (dev->displine >> 2) + 0x2000 * ((dev->displine >> 1) & 1)) & 0x3fff]; + dat = (addr[0] << 8) | addr[1]; + dev->ma++; + for (c = 0; c < 8; c++) { + buffer32->line[dev->displine][(x << 4) + (c << 1)] = buffer32->line[dev->displine][(x << 4) + (c << 1) + 1] = cols[dat >> 14]; + dat <<= 2; + } } } - /* Draw the display in CGA (640x200) graphics mode. */ void pgc_cga_gfx80(pgc_t *dev) { - int x, c; + int x, c; uint32_t cols[2]; uint16_t ma = (dev->mapram[0x3ed] | (dev->mapram[0x3ec] << 8)) & 0x3fff; uint8_t *addr; @@ -2436,179 +2414,175 @@ pgc_cga_gfx80(pgc_t *dev) cols[1] = (dev->mapram[0x3d9] & 15) + 16; for (x = 0; x < 40; x++) { - addr = &dev->cga_vram[(ma + 2 * x + 80 * (dev->displine >> 2) + 0x2000 * ((dev->displine >> 1) & 1)) & 0x3fff]; - dat = (addr[0] << 8) | addr[1]; - dev->ma++; - for (c = 0; c < 16; c++) { - buffer32->line[dev->displine][(x << 4) + c] = cols[dat >> 15]; - dat <<= 1; - } + addr = &dev->cga_vram[(ma + 2 * x + 80 * (dev->displine >> 2) + 0x2000 * ((dev->displine >> 1) & 1)) & 0x3fff]; + dat = (addr[0] << 8) | addr[1]; + dev->ma++; + for (c = 0; c < 16; c++) { + buffer32->line[dev->displine][(x << 4) + c] = cols[dat >> 15]; + dat <<= 1; + } } } - /* Draw the screen in CGA mode. */ void pgc_cga_poll(pgc_t *dev) { uint32_t cols[2]; - if (! dev->linepos) { - timer_advance_u64(&dev->timer, dev->dispofftime); - dev->mapram[0x03da] |= 1; - dev->linepos = 1; + if (!dev->linepos) { + timer_advance_u64(&dev->timer, dev->dispofftime); + dev->mapram[0x03da] |= 1; + dev->linepos = 1; - if (dev->cgadispon) { - if (dev->displine == 0) - video_wait_for_buffer(); + if (dev->cgadispon) { + if (dev->displine == 0) + video_wait_for_buffer(); - if ((dev->mapram[0x03d8] & 0x12) == 0x12) - pgc_cga_gfx80(dev); - else if (dev->mapram[0x03d8] & 0x02) - pgc_cga_gfx40(dev); - else if (dev->mapram[0x03d8] & 0x01) - pgc_cga_text(dev, 80); - else - pgc_cga_text(dev, 40); - } else { - cols[0] = ((dev->mapram[0x03d8] & 0x12) == 0x12) ? 0 : ((dev->mapram[0x03d9] & 15) + 16); - hline(buffer32, 0, dev->displine, PGC_CGA_WIDTH, cols[0]); - } + if ((dev->mapram[0x03d8] & 0x12) == 0x12) + pgc_cga_gfx80(dev); + else if (dev->mapram[0x03d8] & 0x02) + pgc_cga_gfx40(dev); + else if (dev->mapram[0x03d8] & 0x01) + pgc_cga_text(dev, 80); + else + pgc_cga_text(dev, 40); + } else { + cols[0] = ((dev->mapram[0x03d8] & 0x12) == 0x12) ? 0 : ((dev->mapram[0x03d9] & 15) + 16); + hline(buffer32, 0, dev->displine, PGC_CGA_WIDTH, cols[0]); + } - if (++dev->displine == PGC_CGA_HEIGHT) { - dev->mapram[0x3da] |= 8; - dev->cgadispon = 0; - } - if (dev->displine == PGC_CGA_HEIGHT + 32) { - dev->mapram[0x3da] &= ~8; - dev->cgadispon = 1; - dev->displine = 0; - } + if (++dev->displine == PGC_CGA_HEIGHT) { + dev->mapram[0x3da] |= 8; + dev->cgadispon = 0; + } + if (dev->displine == PGC_CGA_HEIGHT + 32) { + dev->mapram[0x3da] &= ~8; + dev->cgadispon = 1; + dev->displine = 0; + } } else { - if (dev->cgadispon) - dev->mapram[0x3da] &= ~1; - timer_advance_u64(&dev->timer, dev->dispontime); - dev->linepos = 0; + if (dev->cgadispon) + dev->mapram[0x3da] &= ~1; + timer_advance_u64(&dev->timer, dev->dispontime); + dev->linepos = 0; - if (dev->displine == PGC_CGA_HEIGHT) { - if (PGC_CGA_WIDTH != xsize || PGC_CGA_HEIGHT != ysize) { - xsize = PGC_CGA_WIDTH; - ysize = PGC_CGA_HEIGHT; - set_screen_size(xsize, ysize); + if (dev->displine == PGC_CGA_HEIGHT) { + if (PGC_CGA_WIDTH != xsize || PGC_CGA_HEIGHT != ysize) { + xsize = PGC_CGA_WIDTH; + ysize = PGC_CGA_HEIGHT; + set_screen_size(xsize, ysize); - if (video_force_resize_get()) - video_force_resize_set(0); - } - video_blit_memtoscreen_8(0, 0, xsize, ysize); - frames++; + if (video_force_resize_get()) + video_force_resize_set(0); + } + video_blit_memtoscreen_8(0, 0, xsize, ysize); + frames++; - /* We have a fixed 640x400 screen for CGA modes. */ - video_res_x = PGC_CGA_WIDTH; - video_res_y = PGC_CGA_HEIGHT; - switch (dev->mapram[0x3d8] & 0x12) { - case 0x12: - video_bpp = 1; - break; + /* We have a fixed 640x400 screen for CGA modes. */ + video_res_x = PGC_CGA_WIDTH; + video_res_y = PGC_CGA_HEIGHT; + switch (dev->mapram[0x3d8] & 0x12) { + case 0x12: + video_bpp = 1; + break; - case 0x02: - video_bpp = 2; - break; + case 0x02: + video_bpp = 2; + break; - default: - video_bpp = 0; - break; - } - dev->cgablink++; - } + default: + video_bpp = 0; + break; + } + dev->cgablink++; + } } } - /* Draw the screen in CGA or native mode. */ void pgc_poll(void *priv) { - pgc_t *dev = (pgc_t *)priv; + pgc_t *dev = (pgc_t *) priv; uint32_t x, y; if (dev->cga_selected) { - pgc_cga_poll(dev); - return; + pgc_cga_poll(dev); + return; } /* Not CGA, so must be native mode. */ - if (! dev->linepos) { - timer_advance_u64(&dev->timer, dev->dispofftime); - dev->mapram[0x3da] |= 1; - dev->linepos = 1; - if (dev->cgadispon && (uint32_t)dev->displine < dev->maxh) { - if (dev->displine == 0) - video_wait_for_buffer(); + if (!dev->linepos) { + timer_advance_u64(&dev->timer, dev->dispofftime); + dev->mapram[0x3da] |= 1; + dev->linepos = 1; + if (dev->cgadispon && (uint32_t) dev->displine < dev->maxh) { + if (dev->displine == 0) + video_wait_for_buffer(); - /* Don't know why pan needs to be multiplied by -2, but - * the IM1024 driver uses PAN -112 for an offset of - * 224. */ - y = dev->displine - 2 * dev->pan_y; - for (x = 0; x < dev->screenw; x++) { - if (x + dev->pan_x < dev->maxw) - buffer32->line[dev->displine][x] = dev->palette[dev->vram[y * dev->maxw + x]]; - else - buffer32->line[dev->displine][x] = dev->palette[0]; - } - } else { - hline(buffer32, 0, dev->displine, dev->screenw, dev->palette[0]); - } + /* Don't know why pan needs to be multiplied by -2, but + * the IM1024 driver uses PAN -112 for an offset of + * 224. */ + y = dev->displine - 2 * dev->pan_y; + for (x = 0; x < dev->screenw; x++) { + if (x + dev->pan_x < dev->maxw) + buffer32->line[dev->displine][x] = dev->palette[dev->vram[y * dev->maxw + x]]; + else + buffer32->line[dev->displine][x] = dev->palette[0]; + } + } else { + hline(buffer32, 0, dev->displine, dev->screenw, dev->palette[0]); + } - if (++dev->displine == dev->screenh) { - dev->mapram[0x3da] |= 8; - dev->cgadispon = 0; - } + if (++dev->displine == dev->screenh) { + dev->mapram[0x3da] |= 8; + dev->cgadispon = 0; + } - if (dev->displine == dev->screenh + 32) { - dev->mapram[0x3da] &= ~8; - dev->cgadispon = 1; - dev->displine = 0; - } + if (dev->displine == dev->screenh + 32) { + dev->mapram[0x3da] &= ~8; + dev->cgadispon = 1; + dev->displine = 0; + } } else { - if (dev->cgadispon) - dev->mapram[0x3da] &= ~1; - timer_advance_u64(&dev->timer, dev->dispontime); - dev->linepos = 0; + if (dev->cgadispon) + dev->mapram[0x3da] &= ~1; + timer_advance_u64(&dev->timer, dev->dispontime); + dev->linepos = 0; - if (dev->displine == dev->screenh) { - if (dev->screenw != xsize || dev->screenh != ysize) { - xsize = dev->screenw; - ysize = dev->screenh; - set_screen_size(xsize, ysize); + if (dev->displine == dev->screenh) { + if (dev->screenw != xsize || dev->screenh != ysize) { + xsize = dev->screenw; + ysize = dev->screenh; + set_screen_size(xsize, ysize); - if (video_force_resize_get()) - video_force_resize_set(0); - } - video_blit_memtoscreen(0, 0, xsize, ysize); - frames++; + if (video_force_resize_get()) + video_force_resize_set(0); + } + video_blit_memtoscreen(0, 0, xsize, ysize); + frames++; - video_res_x = dev->screenw; - video_res_y = dev->screenh; - video_bpp = 8; - dev->cgablink++; - } + video_res_x = dev->screenw; + video_res_y = dev->screenh; + video_bpp = 8; + dev->cgablink++; + } } } - void pgc_speed_changed(void *priv) { - pgc_t *dev = (pgc_t *)priv; + pgc_t *dev = (pgc_t *) priv; pgc_recalctimings(dev); } - void pgc_close_common(void *priv) { - pgc_t *dev = (pgc_t *)priv; + pgc_t *dev = (pgc_t *) priv; /* * Close down the worker thread by setting a @@ -2618,11 +2592,11 @@ pgc_close_common(void *priv) #ifdef ENABLE_PGC_LOG pgc_log("PGC: telling thread to stop...\n"); #endif - dev->stopped = 1; + dev->stopped = 1; dev->mapram[0x3ff] = 1; if (dev->waiting_input_fifo || dev->waiting_output_fifo) { - /* Do an immediate wake-up. */ - wake_timer(priv); + /* Do an immediate wake-up. */ + wake_timer(priv); } /* Wait for thread to stop. */ @@ -2636,23 +2610,21 @@ pgc_close_common(void *priv) #endif if (dev->cga_vram) - free(dev->cga_vram); + free(dev->cga_vram); if (dev->vram) - free(dev->vram); + free(dev->vram); } - void pgc_close(void *priv) { - pgc_t *dev = (pgc_t *)priv; + pgc_t *dev = (pgc_t *) priv; pgc_close_common(priv); free(dev); } - /* * Initialization code common to the PGC and its subclasses. * @@ -2662,7 +2634,7 @@ pgc_close(void *priv) */ void pgc_init(pgc_t *dev, int maxw, int maxh, int visw, int vish, - int (*inpbyte)(pgc_t *, uint8_t *), double npc) + int (*inpbyte)(pgc_t *, uint8_t *), double npc) { int i; @@ -2670,58 +2642,57 @@ pgc_init(pgc_t *dev, int maxw, int maxh, int visw, int vish, because of the emulator's granularity - the original mapping will conflict with hard disk controller BIOS'es. */ mem_mapping_add(&dev->mapping, 0xc4000, 16384, - pgc_read,NULL,NULL, pgc_write,NULL,NULL, - NULL, MEM_MAPPING_EXTERNAL, dev); + pgc_read, NULL, NULL, pgc_write, NULL, NULL, + NULL, MEM_MAPPING_EXTERNAL, dev); mem_mapping_add(&dev->cga_mapping, 0xb8000, 32768, - pgc_read,NULL,NULL, pgc_write,NULL,NULL, - NULL, MEM_MAPPING_EXTERNAL, dev); + pgc_read, NULL, NULL, pgc_write, NULL, NULL, + NULL, MEM_MAPPING_EXTERNAL, dev); io_sethandler(0x03d0, 16, - pgc_in,NULL,NULL, pgc_out,NULL,NULL, dev); + pgc_in, NULL, NULL, pgc_out, NULL, NULL, dev); dev->maxw = maxw; dev->maxh = maxh; dev->visw = visw; dev->vish = vish; - dev->vram = (uint8_t *)malloc(maxw * maxh); + dev->vram = (uint8_t *) malloc(maxw * maxh); memset(dev->vram, 0x00, maxw * maxh); - dev->cga_vram = (uint8_t *)malloc(16384); + dev->cga_vram = (uint8_t *) malloc(16384); memset(dev->cga_vram, 0x00, 16384); /* Create and initialize command lists. */ - dev->clist = (pgc_cl_t *)malloc(256 * sizeof(pgc_cl_t)); + dev->clist = (pgc_cl_t *) malloc(256 * sizeof(pgc_cl_t)); memset(dev->clist, 0x00, 256 * sizeof(pgc_cl_t)); for (i = 0; i < 256; i++) { - dev->clist[i].list = NULL; - dev->clist[i].listmax = 0; - dev->clist[i].wrptr = 0; - dev->clist[i].rdptr = 0; - dev->clist[i].repeat = 0; - dev->clist[i].chain = NULL; + dev->clist[i].list = NULL; + dev->clist[i].listmax = 0; + dev->clist[i].wrptr = 0; + dev->clist[i].rdptr = 0; + dev->clist[i].repeat = 0; + dev->clist[i].chain = NULL; } - dev->clcur = NULL; + dev->clcur = NULL; dev->native_pixel_clock = npc; pgc_reset(dev); dev->inputbyte = inpbyte; dev->master = dev->commands = pgc_commands; - dev->pgc_wake_thread = thread_create_event(); - dev->pgc_thread = thread_create(pgc_thread, dev); + dev->pgc_wake_thread = thread_create_event(); + dev->pgc_thread = thread_create(pgc_thread, dev); timer_add(&dev->timer, pgc_poll, dev, 1); timer_add(&dev->wake_timer, wake_timer, dev, 0); } - static void * pgc_standalone_init(const device_t *info) { pgc_t *dev; - dev = (pgc_t *)malloc(sizeof(pgc_t)); + dev = (pgc_t *) malloc(sizeof(pgc_t)); memset(dev, 0x00, sizeof(pgc_t)); dev->type = info->local; @@ -2730,20 +2701,19 @@ pgc_standalone_init(const device_t *info) video_inform(VIDEO_FLAG_TYPE_CGA, &timing_pgc); - return(dev); + return (dev); } - const device_t pgc_device = { - .name = "PGC", + .name = "PGC", .internal_name = "pgc", - .flags = DEVICE_ISA, - .local = 0, - .init = pgc_standalone_init, - .close = pgc_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = pgc_standalone_init, + .close = pgc_close, + .reset = NULL, { .available = NULL }, .speed_changed = pgc_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_rtg310x.c b/src/video/vid_rtg310x.c index 2eb82626b..66d87bb2e 100644 --- a/src/video/vid_rtg310x.c +++ b/src/video/vid_rtg310x.c @@ -29,86 +29,84 @@ #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> - -#define BIOS_ROM_PATH "roms/video/rtg/realtekrtg3106.BIN" +#define BIOS_ROM_PATH "roms/video/rtg/realtekrtg3106.BIN" typedef struct { - const char *name; - int type; + const char *name; + int type; - svga_t svga; + svga_t svga; - rom_t bios_rom; + rom_t bios_rom; - uint8_t bank3d6, - bank3d7; + uint8_t bank3d6, + bank3d7; - uint32_t vram_size, - vram_mask; + uint32_t vram_size, + vram_mask; } rtg_t; +static video_timings_t timing_rtg_isa = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 5, .read_w = 5, .read_l = 10 }; -static video_timings_t timing_rtg_isa = {VIDEO_ISA, 3, 3, 6, 5, 5, 10}; - -static void rtg_recalcbanking(rtg_t *dev) +static void +rtg_recalcbanking(rtg_t *dev) { - svga_t *svga = &dev->svga; + svga_t *svga = &dev->svga; - svga->write_bank = (dev->bank3d7 & 0x0f) * 65536; + svga->write_bank = (dev->bank3d7 & 0x0f) * 65536; - if (svga->gdcreg[0x0f] & 4) - svga->read_bank = (dev->bank3d6 & 0x0f) * 65536; - else - svga->read_bank = svga->write_bank; + if (svga->gdcreg[0x0f] & 4) + svga->read_bank = (dev->bank3d6 & 0x0f) * 65536; + else + svga->read_bank = svga->write_bank; } - static uint8_t rtg_in(uint16_t addr, void *priv) { - rtg_t *dev = (rtg_t *)priv; + rtg_t *dev = (rtg_t *) priv; svga_t *svga = &dev->svga; - uint8_t ret = 0; + uint8_t ret = 0; - if (((addr & 0xfff0) == 0x3d0 || - (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60; + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; switch (addr) { - case 0x3ce: - return svga->gdcaddr; + case 0x3ce: + return svga->gdcaddr; - case 0x3cf: - if (svga->gdcaddr == 0x0c) - return svga->gdcreg[0x0c] | 4; - else if ((svga->gdcaddr > 8) && (svga->gdcaddr != 0x0c)) - return svga->gdcreg[svga->gdcaddr]; - break; + case 0x3cf: + if (svga->gdcaddr == 0x0c) + return svga->gdcreg[0x0c] | 4; + else if ((svga->gdcaddr > 8) && (svga->gdcaddr != 0x0c)) + return svga->gdcreg[svga->gdcaddr]; + break; - case 0x3d4: - return svga->crtcreg; + case 0x3d4: + return svga->crtcreg; - case 0x3d5: - if (!(svga->crtc[0x1e] & 0x80) && (svga->crtcreg > 0x18)) - return 0xff; - if (svga->crtcreg == 0x1a) - return dev->type << 6; - if (svga->crtcreg == 0x1e) { - if (dev->vram_size == 1024) - ret = 2; - else if (dev->vram_size == 512) - ret = 1; - else - ret = 0; - return svga->crtc[0x1e] | ret; - } - return svga->crtc[svga->crtcreg]; + case 0x3d5: + if (!(svga->crtc[0x1e] & 0x80) && (svga->crtcreg > 0x18)) + return 0xff; + if (svga->crtcreg == 0x1a) + return dev->type << 6; + if (svga->crtcreg == 0x1e) { + if (dev->vram_size == 1024) + ret = 2; + else if (dev->vram_size == 512) + ret = 1; + else + ret = 0; + return svga->crtc[0x1e] | ret; + } + return svga->crtc[svga->crtcreg]; - case 0x3d6: - return dev->bank3d6; + case 0x3d6: + return dev->bank3d6; - case 0x3d7: - return dev->bank3d7; - } + case 0x3d7: + return dev->bank3d7; + } return svga_in(addr, svga); } @@ -116,81 +114,80 @@ rtg_in(uint16_t addr, void *priv) static void rtg_out(uint16_t addr, uint8_t val, void *priv) { - rtg_t *dev = (rtg_t *)priv; + rtg_t *dev = (rtg_t *) priv; svga_t *svga = &dev->svga; uint8_t old; - if (((addr & 0xfff0) == 0x3d0 || - (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60; + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; switch (addr) { - case 0x3ce: - svga->gdcaddr = val; - return; + case 0x3ce: + svga->gdcaddr = val; + return; - case 0x3cf: - if (svga->gdcaddr > 8) { - svga->gdcreg[svga->gdcaddr] = val; + case 0x3cf: + if (svga->gdcaddr > 8) { + svga->gdcreg[svga->gdcaddr] = val; - switch (svga->gdcaddr) { - case 0x0b: - case 0x0c: - svga->fullchange = changeframecount; - svga_recalctimings(svga); - break; + switch (svga->gdcaddr) { + case 0x0b: + case 0x0c: + svga->fullchange = changeframecount; + svga_recalctimings(svga); + break; - case 0x0f: - rtg_recalcbanking(dev); - return; - } - } - break; + case 0x0f: + rtg_recalcbanking(dev); + return; + } + } + break; - case 0x3d4: - svga->crtcreg = val & 0x3f; - return; + case 0x3d4: + svga->crtcreg = val & 0x3f; + return; - case 0x3d5: - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - old = svga->crtc[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; + case 0x3d5: + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; - if (svga->crtc[0x1e] & 0x80) { - switch (svga->crtcreg) { - case 0x19: - svga->vram_display_mask = (val & 0x20) ? dev->vram_mask : 0x3ffff; - svga->fullchange = changeframecount; - svga_recalctimings(svga); - break; - } - } + if (svga->crtc[0x1e] & 0x80) { + switch (svga->crtcreg) { + case 0x19: + svga->vram_display_mask = (val & 0x20) ? dev->vram_mask : 0x3ffff; + svga->fullchange = changeframecount; + svga_recalctimings(svga); + break; + } + } - if (old != val) { - if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) - { - if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - } - } - break; + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + } + } + break; - case 0x3d6: - dev->bank3d6 = val; - rtg_recalcbanking(dev); - return; + case 0x3d6: + dev->bank3d6 = val; + rtg_recalcbanking(dev); + return; - case 0x3d7: - dev->bank3d7 = val; - rtg_recalcbanking(dev); - return; + case 0x3d7: + dev->bank3d7 = val; + rtg_recalcbanking(dev); + return; } svga_out(addr, val, svga); @@ -199,159 +196,156 @@ rtg_out(uint16_t addr, uint8_t val, void *priv) static void rtg_recalctimings(svga_t *svga) { - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - svga->ma_latch |= ((svga->crtc[0x19] & 0x10) << 16) | ((svga->crtc[0x19] & 0x40) << 17); + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + svga->ma_latch |= ((svga->crtc[0x19] & 0x10) << 16) | ((svga->crtc[0x19] & 0x40) << 17); - svga->interlace = (svga->crtc[0x19] & 1); + svga->interlace = (svga->crtc[0x19] & 1); - svga->lowres = svga->attrregs[0x10] & 0x40; + svga->lowres = svga->attrregs[0x10] & 0x40; - /*Clock table not available, currently a guesswork*/ - switch (((svga->miscout >> 2) & 3) | ((svga->gdcreg[0x0c] & 0x20) >> 3)) { - case 0: - case 1: - break; - case 2: - svga->clock = (cpuclock * (double)(1ull << 32)) / 36000000.0; - break; - case 3: - svga->clock = (cpuclock * (double)(1ull << 32)) / 65100000.0; - break; - case 4: - svga->clock = (cpuclock * (double)(1ull << 32)) / 44900000.0; - break; - case 5: - svga->clock = (cpuclock * (double)(1ull << 32)) / 50000000.0; - break; - case 6: - svga->clock = (cpuclock * (double)(1ull << 32)) / 80000000.0; - break; - case 7: - svga->clock = (cpuclock * (double)(1ull << 32)) / 75000000.0; - break; - } + /*Clock table not available, currently a guesswork*/ + switch (((svga->miscout >> 2) & 3) | ((svga->gdcreg[0x0c] & 0x20) >> 3)) { + case 0: + case 1: + break; + case 2: + svga->clock = (cpuclock * (double) (1ull << 32)) / 36000000.0; + break; + case 3: + svga->clock = (cpuclock * (double) (1ull << 32)) / 65100000.0; + break; + case 4: + svga->clock = (cpuclock * (double) (1ull << 32)) / 44900000.0; + break; + case 5: + svga->clock = (cpuclock * (double) (1ull << 32)) / 50000000.0; + break; + case 6: + svga->clock = (cpuclock * (double) (1ull << 32)) / 80000000.0; + break; + case 7: + svga->clock = (cpuclock * (double) (1ull << 32)) / 75000000.0; + break; + } - switch (svga->gdcreg[0x0c] & 3) { - case 1: - svga->clock /= 1.5; - break; - case 2: - svga->clock /= 2; - break; - case 3: - svga->clock /= 4; - break; - } + switch (svga->gdcreg[0x0c] & 3) { + case 1: + svga->clock /= 1.5; + break; + case 2: + svga->clock /= 2; + break; + case 3: + svga->clock /= 4; + break; + } - if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { - switch (svga->gdcreg[5] & 0x60) { - case 0x00: - if (svga->seqregs[1] & 8) /*Low res (320)*/ - svga->render = svga_render_4bpp_lowres; - else { - svga->hdisp = svga->crtc[1] - ((svga->crtc[5] & 0x60) >> 5); - svga->hdisp++; - svga->hdisp *= 8; + if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { + switch (svga->gdcreg[5] & 0x60) { + case 0x00: + if (svga->seqregs[1] & 8) /*Low res (320)*/ + svga->render = svga_render_4bpp_lowres; + else { + svga->hdisp = svga->crtc[1] - ((svga->crtc[5] & 0x60) >> 5); + svga->hdisp++; + svga->hdisp *= 8; - if (svga->hdisp == 1280) - svga->rowoffset >>= 1; + if (svga->hdisp == 1280) + svga->rowoffset >>= 1; - svga->render = svga_render_4bpp_highres; - } - break; - case 0x20: /*4 colours*/ - if (svga->seqregs[1] & 8) /*Low res (320)*/ - svga->render = svga_render_2bpp_lowres; - else - svga->render = svga_render_2bpp_highres; - break; - case 0x40: case 0x60: - svga->hdisp = svga->crtc[1] - ((svga->crtc[5] & 0x60) >> 5); - svga->hdisp++; - svga->hdisp *= (svga->seqregs[1] & 8) ? 16 : 8; - if (svga->crtc[0x19] & 2) { - if (svga->hdisp == 1280) { - svga->hdisp >>= 1; - } else - svga->rowoffset <<= 1; + svga->render = svga_render_4bpp_highres; + } + break; + case 0x20: /*4 colours*/ + if (svga->seqregs[1] & 8) /*Low res (320)*/ + svga->render = svga_render_2bpp_lowres; + else + svga->render = svga_render_2bpp_highres; + break; + case 0x40: + case 0x60: + svga->hdisp = svga->crtc[1] - ((svga->crtc[5] & 0x60) >> 5); + svga->hdisp++; + svga->hdisp *= (svga->seqregs[1] & 8) ? 16 : 8; + if (svga->crtc[0x19] & 2) { + if (svga->hdisp == 1280) { + svga->hdisp >>= 1; + } else + svga->rowoffset <<= 1; - svga->render = svga_render_8bpp_highres; - } else { - if (svga->lowres) - svga->render = svga_render_8bpp_lowres; - else - svga->render = svga_render_8bpp_highres; - } - break; - } - } + svga->render = svga_render_8bpp_highres; + } else { + if (svga->lowres) + svga->render = svga_render_8bpp_lowres; + else + svga->render = svga_render_8bpp_highres; + } + break; + } + } } static void * rtg_init(const device_t *info) { const char *fn; - rtg_t *dev; + rtg_t *dev; - dev = (rtg_t *)malloc(sizeof(rtg_t)); + dev = (rtg_t *) malloc(sizeof(rtg_t)); memset(dev, 0x00, sizeof(rtg_t)); dev->name = info->name; dev->type = info->local; - fn = BIOS_ROM_PATH; + fn = BIOS_ROM_PATH; - switch(dev->type) { - case 2: /* ISA RTG3106 */ - dev->vram_size = device_get_config_int("memory") << 10; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_rtg_isa); - svga_init(info, &dev->svga, dev, dev->vram_size, - rtg_recalctimings, rtg_in, rtg_out, - NULL, NULL); - io_sethandler(0x03c0, 32, - rtg_in,NULL,NULL, rtg_out,NULL,NULL, dev); - break; + switch (dev->type) { + case 2: /* ISA RTG3106 */ + dev->vram_size = device_get_config_int("memory") << 10; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_rtg_isa); + svga_init(info, &dev->svga, dev, dev->vram_size, + rtg_recalctimings, rtg_in, rtg_out, + NULL, NULL); + io_sethandler(0x03c0, 32, + rtg_in, NULL, NULL, rtg_out, NULL, NULL, dev); + break; } - dev->svga.bpp = 8; - dev->svga.miscout = 1; + dev->svga.bpp = 8; + dev->svga.miscout = 1; dev->vram_mask = dev->vram_size - 1; rom_init(&dev->bios_rom, (char *) fn, - 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - return(dev); + return (dev); } - static void rtg_close(void *priv) { - rtg_t *dev = (rtg_t *)priv; + rtg_t *dev = (rtg_t *) priv; svga_close(&dev->svga); free(dev); } - static void rtg_speed_changed(void *priv) { - rtg_t *dev = (rtg_t *)priv; + rtg_t *dev = (rtg_t *) priv; svga_recalctimings(&dev->svga); } - static void rtg_force_redraw(void *priv) { - rtg_t *dev = (rtg_t *)priv; + rtg_t *dev = (rtg_t *) priv; dev->svga.fullchange = changeframecount; } - static int rtg_available(void) { @@ -359,7 +353,7 @@ rtg_available(void) } static const device_config_t rtg_config[] = { -// clang-format off + // clang-format off { .name = "memory", .description = "Memory size", @@ -390,15 +384,15 @@ static const device_config_t rtg_config[] = { }; const device_t realtek_rtg3106_device = { - .name = "Realtek RTG3106 (ISA)", + .name = "Realtek RTG3106 (ISA)", .internal_name = "rtg3106", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 2, - .init = rtg_init, - .close = rtg_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 2, + .init = rtg_init, + .close = rtg_close, + .reset = NULL, { .available = rtg_available }, .speed_changed = rtg_speed_changed, - .force_redraw = rtg_force_redraw, - .config = rtg_config + .force_redraw = rtg_force_redraw, + .config = rtg_config }; diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index b6a1af232..9b7e8679c 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -38,342 +38,335 @@ #include <86box/vid_svga_render.h> #include "cpu.h" -#define ROM_ORCHID_86C911 "roms/video/s3/BIOS.BIN" -#define ROM_DIAMOND_STEALTH_VRAM "roms/video/s3/Diamond Stealth VRAM BIOS v2.31 U14.BIN" -#define ROM_AMI_86C924 "roms/video/s3/S3924AMI.BIN" -#define ROM_METHEUS_86C928 "roms/video/s3/928.VBI" -#define ROM_SPEA_MERCURY_LITE_PCI "roms/video/s3/SPEAVGA.VBI" -#define ROM_SPEA_MIRAGE_86C801 "roms/video/s3/V7MIRAGE.VBI" -#define ROM_SPEA_MIRAGE_86C805 "roms/video/s3/86c805pspeavlbus.BIN" -#define ROM_MIROCRYSTAL8S_805 "roms/video/s3/S3_805VL_ATT20C491_miroCRYSTAL_8s_ver1.4.BIN" -#define ROM_MIROCRYSTAL10SD_805 "roms/video/s3/MIROcrystal10SD_VLB.VBI" -#define ROM_MIROCRYSTAL20SV_964_VLB "roms/video/s3/S3_964VL_BT485_27C256_miroCRYSTAL_20sv_ver1.2.bin" -#define ROM_MIROCRYSTAL20SV_964_PCI "roms/video/s3/mirocrystal.VBI" -#define ROM_MIROCRYSTAL20SD_864_VLB "roms/video/s3/Miro20SD.BIN" -#define ROM_PHOENIX_86C80X "roms/video/s3/805.VBI" -#define ROM_PARADISE_BAHAMAS64 "roms/video/s3/bahamas64.bin" -#define ROM_PHOENIX_VISION864 "roms/video/s3/86c864p.bin" -#define ROM_DIAMOND_STEALTH64_964 "roms/video/s3/964_107h.rom" -#define ROM_PHOENIX_TRIO32 "roms/video/s3/86c732p.bin" -#define ROM_SPEA_MIRAGE_P64 "roms/video/s3/S3_764VL_SPEAMirageP64VL_ver5_03.BIN" -#define ROM_NUMBER9_9FX "roms/video/s3/s3_764.bin" -#define ROM_PHOENIX_TRIO64 "roms/video/s3/86c764x1.bin" -#define ROM_DIAMOND_STEALTH64_764 "roms/video/s3/stealt64.bin" -#define ROM_TRIO64V2_DX_VBE20 "roms/video/s3/86c775_2.bin" -#define ROM_PHOENIX_TRIO64VPLUS "roms/video/s3/64V1506.ROM" -#define ROM_DIAMOND_STEALTH_SE "roms/video/s3/DiamondStealthSE.VBI" -#define ROM_ELSAWIN2KPROX_964 "roms/video/s3/elsaw20004m.BIN" -#define ROM_ELSAWIN2KPROX "roms/video/s3/elsaw20008m.BIN" -#define ROM_NUMBER9_9FX_531 "roms/video/s3/numbernine.BIN" -#define ROM_PHOENIX_VISION868 "roms/video/s3/1-DSV3868.BIN" -#define ROM_MIROVIDEO40SV_ERGO_968_PCI "roms/video/s3/S3_968PCI_TVP3026_miroVideo40SV_PCI_1.04.BIN" -#define ROM_SPEA_MERCURY_P64V "roms/video/s3/S3_968PCI_TVP3026_SPEAMecuryP64V_ver1.01.BIN" -#define ROM_NUMBER9_9FX_771 "roms/video/s3/no9motionfx771.BIN" -#define ROM_PHOENIX_VISION968 "roms/video/s3/1-DSV3968P.BIN" +#define ROM_ORCHID_86C911 "roms/video/s3/BIOS.BIN" +#define ROM_DIAMOND_STEALTH_VRAM "roms/video/s3/Diamond Stealth VRAM BIOS v2.31 U14.BIN" +#define ROM_AMI_86C924 "roms/video/s3/S3924AMI.BIN" +#define ROM_METHEUS_86C928 "roms/video/s3/928.VBI" +#define ROM_SPEA_MERCURY_LITE_PCI "roms/video/s3/SPEAVGA.VBI" +#define ROM_SPEA_MIRAGE_86C801 "roms/video/s3/V7MIRAGE.VBI" +#define ROM_SPEA_MIRAGE_86C805 "roms/video/s3/86c805pspeavlbus.BIN" +#define ROM_MIROCRYSTAL8S_805 "roms/video/s3/S3_805VL_ATT20C491_miroCRYSTAL_8s_ver1.4.BIN" +#define ROM_MIROCRYSTAL10SD_805 "roms/video/s3/MIROcrystal10SD_VLB.VBI" +#define ROM_MIROCRYSTAL20SV_964_VLB "roms/video/s3/S3_964VL_BT485_27C256_miroCRYSTAL_20sv_ver1.2.bin" +#define ROM_MIROCRYSTAL20SV_964_PCI "roms/video/s3/mirocrystal.VBI" +#define ROM_MIROCRYSTAL20SD_864_VLB "roms/video/s3/Miro20SD.BIN" +#define ROM_PHOENIX_86C80X "roms/video/s3/805.VBI" +#define ROM_PARADISE_BAHAMAS64 "roms/video/s3/bahamas64.bin" +#define ROM_PHOENIX_VISION864 "roms/video/s3/86c864p.bin" +#define ROM_DIAMOND_STEALTH64_964 "roms/video/s3/964_107h.rom" +#define ROM_PHOENIX_TRIO32 "roms/video/s3/86c732p.bin" +#define ROM_SPEA_MIRAGE_P64 "roms/video/s3/S3_764VL_SPEAMirageP64VL_ver5_03.BIN" +#define ROM_NUMBER9_9FX "roms/video/s3/s3_764.bin" +#define ROM_PHOENIX_TRIO64 "roms/video/s3/86c764x1.bin" +#define ROM_DIAMOND_STEALTH64_764 "roms/video/s3/stealt64.bin" +#define ROM_TRIO64V2_DX_VBE20 "roms/video/s3/86c775_2.bin" +#define ROM_PHOENIX_TRIO64VPLUS "roms/video/s3/64V1506.ROM" +#define ROM_DIAMOND_STEALTH_SE "roms/video/s3/DiamondStealthSE.VBI" +#define ROM_ELSAWIN2KPROX_964 "roms/video/s3/elsaw20004m.BIN" +#define ROM_ELSAWIN2KPROX "roms/video/s3/elsaw20008m.BIN" +#define ROM_NUMBER9_9FX_531 "roms/video/s3/numbernine.BIN" +#define ROM_PHOENIX_VISION868 "roms/video/s3/1-DSV3868.BIN" +#define ROM_MIROVIDEO40SV_ERGO_968_PCI "roms/video/s3/S3_968PCI_TVP3026_miroVideo40SV_PCI_1.04.BIN" +#define ROM_SPEA_MERCURY_P64V "roms/video/s3/S3_968PCI_TVP3026_SPEAMecuryP64V_ver1.01.BIN" +#define ROM_NUMBER9_9FX_771 "roms/video/s3/no9motionfx771.BIN" +#define ROM_PHOENIX_VISION968 "roms/video/s3/1-DSV3968P.BIN" -enum -{ - S3_NUMBER9_9FX, - S3_PARADISE_BAHAMAS64, - S3_DIAMOND_STEALTH64_964, - S3_PHOENIX_TRIO32, - S3_PHOENIX_TRIO64, - S3_PHOENIX_TRIO64_ONBOARD, - S3_PHOENIX_VISION864, - S3_DIAMOND_STEALTH64_764, - S3_SPEA_MIRAGE_86C801, - S3_SPEA_MIRAGE_86C805, - S3_PHOENIX_86C801, - S3_PHOENIX_86C805, - S3_ORCHID_86C911, - S3_METHEUS_86C928, - S3_AMI_86C924, - S3_TRIO64V2_DX, - S3_TRIO64V2_DX_ONBOARD, - S3_PHOENIX_TRIO64VPLUS, - S3_PHOENIX_TRIO64VPLUS_ONBOARD, - S3_DIAMOND_STEALTH_SE, - S3_DIAMOND_STEALTH_VRAM, - S3_ELSAWIN2KPROX_964, - S3_ELSAWIN2KPROX, - S3_PHOENIX_VISION868, - S3_MIROVIDEO40SV_ERGO_968, - S3_MIROCRYSTAL10SD_805, - S3_SPEA_MIRAGE_P64, - S3_SPEA_MERCURY_P64V, - S3_MIROCRYSTAL20SV_964, - S3_MIROCRYSTAL20SD_864, - S3_PHOENIX_VISION968, - S3_MIROCRYSTAL8S_805, - S3_NUMBER9_9FX_531, - S3_NUMBER9_9FX_771, - S3_SPEA_MERCURY_LITE_PCI, - S3_86C805_ONBOARD +enum { + S3_NUMBER9_9FX, + S3_PARADISE_BAHAMAS64, + S3_DIAMOND_STEALTH64_964, + S3_PHOENIX_TRIO32, + S3_PHOENIX_TRIO64, + S3_PHOENIX_TRIO64_ONBOARD, + S3_PHOENIX_VISION864, + S3_DIAMOND_STEALTH64_764, + S3_SPEA_MIRAGE_86C801, + S3_SPEA_MIRAGE_86C805, + S3_PHOENIX_86C801, + S3_PHOENIX_86C805, + S3_ORCHID_86C911, + S3_METHEUS_86C928, + S3_AMI_86C924, + S3_TRIO64V2_DX, + S3_TRIO64V2_DX_ONBOARD, + S3_PHOENIX_TRIO64VPLUS, + S3_PHOENIX_TRIO64VPLUS_ONBOARD, + S3_DIAMOND_STEALTH_SE, + S3_DIAMOND_STEALTH_VRAM, + S3_ELSAWIN2KPROX_964, + S3_ELSAWIN2KPROX, + S3_PHOENIX_VISION868, + S3_MIROVIDEO40SV_ERGO_968, + S3_MIROCRYSTAL10SD_805, + S3_SPEA_MIRAGE_P64, + S3_SPEA_MERCURY_P64V, + S3_MIROCRYSTAL20SV_964, + S3_MIROCRYSTAL20SD_864, + S3_PHOENIX_VISION968, + S3_MIROCRYSTAL8S_805, + S3_NUMBER9_9FX_531, + S3_NUMBER9_9FX_771, + S3_SPEA_MERCURY_LITE_PCI, + S3_86C805_ONBOARD }; - -enum -{ - S3_86C911 = 0x00, - S3_86C924 = 0x02, - S3_86C928 = 0x04, - S3_86C928PCI = 0x06, - S3_86C801 = 0x07, - S3_86C805 = 0x08, - S3_VISION964 = 0x18, - S3_VISION968 = 0x20, - S3_VISION864 = 0x28, - S3_VISION868 = 0x30, - S3_TRIO32 = 0x38, - S3_TRIO64 = 0x40, - S3_TRIO64V = 0x48, - S3_TRIO64V2 = 0x50 +enum { + S3_86C911 = 0x00, + S3_86C924 = 0x02, + S3_86C928 = 0x04, + S3_86C928PCI = 0x06, + S3_86C801 = 0x07, + S3_86C805 = 0x08, + S3_VISION964 = 0x18, + S3_VISION968 = 0x20, + S3_VISION864 = 0x28, + S3_VISION868 = 0x30, + S3_TRIO32 = 0x38, + S3_TRIO64 = 0x40, + S3_TRIO64V = 0x48, + S3_TRIO64V2 = 0x50 }; +static video_timings_t timing_s3_86c911 = { .type = VIDEO_ISA, .write_b = 4, .write_w = 4, .write_l = 5, .read_b = 20, .read_w = 20, .read_l = 35 }; +static video_timings_t timing_s3_86c801 = { .type = VIDEO_ISA, .write_b = 4, .write_w = 4, .write_l = 5, .read_b = 20, .read_w = 20, .read_l = 35 }; +static video_timings_t timing_s3_86c805 = { .type = VIDEO_BUS, .write_b = 4, .write_w = 4, .write_l = 5, .read_b = 20, .read_w = 20, .read_l = 35 }; +static video_timings_t timing_s3_86c928pci = { .type = VIDEO_PCI, .write_b = 2, .write_w = 2, .write_l = 4, .read_b = 26, .read_w = 26, .read_l = 42 }; +static video_timings_t timing_s3_stealth64_vlb = { .type = VIDEO_BUS, .write_b = 2, .write_w = 2, .write_l = 4, .read_b = 26, .read_w = 26, .read_l = 42 }; +static video_timings_t timing_s3_stealth64_pci = { .type = VIDEO_PCI, .write_b = 2, .write_w = 2, .write_l = 4, .read_b = 26, .read_w = 26, .read_l = 42 }; +static video_timings_t timing_s3_vision864_vlb = { .type = VIDEO_BUS, .write_b = 4, .write_w = 4, .write_l = 5, .read_b = 20, .read_w = 20, .read_l = 35 }; +static video_timings_t timing_s3_vision864_pci = { .type = VIDEO_PCI, .write_b = 4, .write_w = 4, .write_l = 5, .read_b = 20, .read_w = 20, .read_l = 35 }; +static video_timings_t timing_s3_vision868_vlb = { .type = VIDEO_BUS, .write_b = 4, .write_w = 4, .write_l = 5, .read_b = 20, .read_w = 20, .read_l = 35 }; +static video_timings_t timing_s3_vision868_pci = { .type = VIDEO_PCI, .write_b = 4, .write_w = 4, .write_l = 5, .read_b = 20, .read_w = 20, .read_l = 35 }; +static video_timings_t timing_s3_vision964_vlb = { .type = VIDEO_BUS, .write_b = 2, .write_w = 2, .write_l = 4, .read_b = 20, .read_w = 20, .read_l = 35 }; +static video_timings_t timing_s3_vision964_pci = { .type = VIDEO_PCI, .write_b = 2, .write_w = 2, .write_l = 4, .read_b = 20, .read_w = 20, .read_l = 35 }; +static video_timings_t timing_s3_vision968_vlb = { .type = VIDEO_BUS, .write_b = 2, .write_w = 2, .write_l = 4, .read_b = 20, .read_w = 20, .read_l = 35 }; +static video_timings_t timing_s3_vision968_pci = { .type = VIDEO_PCI, .write_b = 2, .write_w = 2, .write_l = 4, .read_b = 20, .read_w = 20, .read_l = 35 }; +static video_timings_t timing_s3_trio32_vlb = { .type = VIDEO_BUS, .write_b = 4, .write_w = 3, .write_l = 5, .read_b = 26, .read_w = 26, .read_l = 42 }; +static video_timings_t timing_s3_trio32_pci = { .type = VIDEO_PCI, .write_b = 4, .write_w = 3, .write_l = 5, .read_b = 26, .read_w = 26, .read_l = 42 }; +static video_timings_t timing_s3_trio64_vlb = { .type = VIDEO_BUS, .write_b = 3, .write_w = 2, .write_l = 4, .read_b = 25, .read_w = 25, .read_l = 40 }; +static video_timings_t timing_s3_trio64_pci = { .type = VIDEO_PCI, .write_b = 3, .write_w = 2, .write_l = 4, .read_b = 25, .read_w = 25, .read_l = 40 }; -static video_timings_t timing_s3_86c911 = {VIDEO_ISA, 4, 4, 5, 20, 20, 35}; -static video_timings_t timing_s3_86c801 = {VIDEO_ISA, 4, 4, 5, 20, 20, 35}; -static video_timings_t timing_s3_86c805 = {VIDEO_BUS, 4, 4, 5, 20, 20, 35}; -static video_timings_t timing_s3_86c928pci = {VIDEO_PCI, 2, 2, 4, 26, 26, 42}; -static video_timings_t timing_s3_stealth64_vlb = {VIDEO_BUS, 2, 2, 4, 26, 26, 42}; -static video_timings_t timing_s3_stealth64_pci = {VIDEO_PCI, 2, 2, 4, 26, 26, 42}; -static video_timings_t timing_s3_vision864_vlb = {VIDEO_BUS, 4, 4, 5, 20, 20, 35}; -static video_timings_t timing_s3_vision864_pci = {VIDEO_PCI, 4, 4, 5, 20, 20, 35}; -static video_timings_t timing_s3_vision868_vlb = {VIDEO_BUS, 4, 4, 5, 20, 20, 35}; -static video_timings_t timing_s3_vision868_pci = {VIDEO_PCI, 4, 4, 5, 20, 20, 35}; -static video_timings_t timing_s3_vision964_vlb = {VIDEO_BUS, 2, 2, 4, 20, 20, 35}; -static video_timings_t timing_s3_vision964_pci = {VIDEO_PCI, 2, 2, 4, 20, 20, 35}; -static video_timings_t timing_s3_vision968_vlb = {VIDEO_BUS, 2, 2, 4, 20, 20, 35}; -static video_timings_t timing_s3_vision968_pci = {VIDEO_PCI, 2, 2, 4, 20, 20, 35}; -static video_timings_t timing_s3_trio32_vlb = {VIDEO_BUS, 4, 3, 5, 26, 26, 42}; -static video_timings_t timing_s3_trio32_pci = {VIDEO_PCI, 4, 3, 5, 26, 26, 42}; -static video_timings_t timing_s3_trio64_vlb = {VIDEO_BUS, 3, 2, 4, 25, 25, 40}; -static video_timings_t timing_s3_trio64_pci = {VIDEO_PCI, 3, 2, 4, 25, 25, 40}; - -enum -{ - VRAM_4MB = 0, - VRAM_8MB = 3, - VRAM_2MB = 4, - VRAM_1MB = 6, - VRAM_512KB = 7 +enum { + VRAM_4MB = 0, + VRAM_8MB = 3, + VRAM_2MB = 4, + VRAM_1MB = 6, + VRAM_512KB = 7 }; -#define FIFO_SIZE 65536 -#define FIFO_MASK (FIFO_SIZE - 1) +#define FIFO_SIZE 65536 +#define FIFO_MASK (FIFO_SIZE - 1) #define FIFO_ENTRY_SIZE (1 << 31) -#define FIFO_ENTRIES (s3->fifo_write_idx - s3->fifo_read_idx) -#define FIFO_FULL ((s3->fifo_write_idx - s3->fifo_read_idx) >= (FIFO_SIZE - 4)) -#define FIFO_EMPTY (s3->fifo_read_idx == s3->fifo_write_idx) +#define FIFO_ENTRIES (s3->fifo_write_idx - s3->fifo_read_idx) +#define FIFO_FULL ((s3->fifo_write_idx - s3->fifo_read_idx) >= (FIFO_SIZE - 4)) +#define FIFO_EMPTY (s3->fifo_read_idx == s3->fifo_write_idx) -#define FIFO_TYPE 0xff000000 -#define FIFO_ADDR 0x00ffffff +#define FIFO_TYPE 0xff000000 +#define FIFO_ADDR 0x00ffffff -enum -{ - FIFO_INVALID = (0x00 << 24), - FIFO_WRITE_BYTE = (0x01 << 24), - FIFO_WRITE_WORD = (0x02 << 24), - FIFO_WRITE_DWORD = (0x03 << 24), - FIFO_OUT_BYTE = (0x04 << 24), - FIFO_OUT_WORD = (0x05 << 24), - FIFO_OUT_DWORD = (0x06 << 24) +enum { + FIFO_INVALID = (0x00 << 24), + FIFO_WRITE_BYTE = (0x01 << 24), + FIFO_WRITE_WORD = (0x02 << 24), + FIFO_WRITE_DWORD = (0x03 << 24), + FIFO_OUT_BYTE = (0x04 << 24), + FIFO_OUT_WORD = (0x05 << 24), + FIFO_OUT_DWORD = (0x06 << 24) }; typedef struct { - uint32_t addr_type; - uint32_t val; + uint32_t addr_type; + uint32_t val; } fifo_entry_t; -typedef struct s3_t -{ - mem_mapping_t linear_mapping; - mem_mapping_t mmio_mapping; - mem_mapping_t new_mmio_mapping; +typedef struct s3_t { + mem_mapping_t linear_mapping; + mem_mapping_t mmio_mapping; + mem_mapping_t new_mmio_mapping; - uint8_t has_bios; - rom_t bios_rom; + uint8_t has_bios; + rom_t bios_rom; - svga_t svga; + svga_t svga; - uint8_t bank; - uint8_t ma_ext; - int width, bpp; + uint8_t bank; + uint8_t ma_ext; + int width, bpp; - int chip; - int pci, vlb; - int atbus; + int chip; + int pci, vlb; + int atbus; - uint8_t id, id_ext, id_ext_pci; + uint8_t id, id_ext, id_ext_pci; - uint8_t int_line; + uint8_t int_line; - int packed_mmio; + int packed_mmio; - uint32_t linear_base, linear_size; + uint32_t linear_base, linear_size; - uint8_t pci_regs[256]; - int card; + uint8_t pci_regs[256]; + int card; - uint32_t vram_mask; - uint8_t data_available; + uint32_t vram_mask; + uint8_t data_available; - int card_type; + int card_type; - struct - { - uint16_t subsys_cntl; - uint16_t setup_md; - uint8_t advfunc_cntl; - uint16_t cur_y, cur_y2, cur_y_bitres; - uint16_t cur_x, cur_x2, cur_x_bitres; - uint16_t x2, ropmix; - uint16_t pat_x, pat_y; - int16_t desty_axstp, desty_axstp2; - int16_t destx_distp; - int16_t err_term, err_term2; - int16_t maj_axis_pcnt, maj_axis_pcnt2; - uint16_t cmd, cmd2; - uint16_t short_stroke; - uint32_t pat_bg_color, pat_fg_color; - uint32_t bkgd_color; - uint32_t frgd_color; - uint32_t wrt_mask; - uint32_t rd_mask; - uint32_t color_cmp; - uint8_t bkgd_mix; - uint8_t frgd_mix; - uint16_t multifunc_cntl; - uint16_t multifunc[16]; - uint8_t pix_trans[4]; - int ssv_state; + struct + { + uint16_t subsys_cntl; + uint16_t setup_md; + uint8_t advfunc_cntl; + uint16_t cur_y, cur_y2, cur_y_bitres; + uint16_t cur_x, cur_x2, cur_x_bitres; + uint16_t x2, ropmix; + uint16_t pat_x, pat_y; + int16_t desty_axstp, desty_axstp2; + int16_t destx_distp; + int16_t err_term, err_term2; + int16_t maj_axis_pcnt, maj_axis_pcnt2; + uint16_t cmd, cmd2; + uint16_t short_stroke; + uint32_t pat_bg_color, pat_fg_color; + uint32_t bkgd_color; + uint32_t frgd_color; + uint32_t wrt_mask; + uint32_t rd_mask; + uint32_t color_cmp; + uint8_t bkgd_mix; + uint8_t frgd_mix; + uint16_t multifunc_cntl; + uint16_t multifunc[16]; + uint8_t pix_trans[4]; + int ssv_state; - int cx, cy; - int px, py; - int sx, sy; - int dx, dy; - uint32_t src, dest, pattern; + int cx, cy; + int px, py; + int sx, sy; + int dx, dy; + uint32_t src, dest, pattern; - int poly_cx, poly_cx2; - int poly_cy, poly_cy2; - int poly_line_cx; - int point_1_updated, point_2_updated; - int poly_dx1, poly_dx2; - int poly_x; + int poly_cx, poly_cx2; + int poly_cy, poly_cy2; + int poly_line_cx; + int point_1_updated, point_2_updated; + int poly_dx1, poly_dx2; + int poly_x; - uint32_t dat_buf; - int dat_count; - int b2e8_pix, temp_cnt; - uint8_t cur_x_bit12, cur_y_bit12; - int ssv_len; - uint8_t ssv_dir; - uint8_t ssv_draw; + uint32_t dat_buf; + int dat_count; + int b2e8_pix, temp_cnt; + uint8_t cur_x_bit12, cur_y_bit12; + int ssv_len; + uint8_t ssv_dir; + uint8_t ssv_draw; - /*For non-threaded FIFO*/ - int setup_fifo_slot; - int draw_fifo_slot; - int setup_fifo, setup_fifo2; - int draw_fifo, draw_fifo2; - } accel; + /*For non-threaded FIFO*/ + int setup_fifo_slot; + int draw_fifo_slot; + int setup_fifo, setup_fifo2; + int draw_fifo, draw_fifo2; + } accel; - struct { - uint32_t nop; - uint32_t cntl; - uint32_t stretch_filt_const; - uint32_t src_dst_step; - uint32_t crop; - uint32_t src_base, dest_base; - uint32_t src, dest; - uint32_t srcbase, dstbase; - int32_t dda_init_accumulator; - int32_t k1, k2; - int dm_index; - int dither_matrix_idx; - int src_step, dst_step; - int sx, sx_backup, sy; - double cx, dx; - double cy, dy; - int sx_scale_int, sx_scale_int_backup; - double sx_scale; - double sx_scale_dec; - double sx_scale_inc; - double sx_scale_backup; - double sx_scale_len; - int dither, host_data, scale_down; - int input; - int len, start; - int odf, idf, yuv; - volatile int busy; - } videoengine; + struct { + uint32_t nop; + uint32_t cntl; + uint32_t stretch_filt_const; + uint32_t src_dst_step; + uint32_t crop; + uint32_t src_base, dest_base; + uint32_t src, dest; + uint32_t srcbase, dstbase; + int32_t dda_init_accumulator; + int32_t k1, k2; + int dm_index; + int dither_matrix_idx; + int src_step, dst_step; + int sx, sx_backup, sy; + double cx, dx; + double cy, dy; + int sx_scale_int, sx_scale_int_backup; + double sx_scale; + double sx_scale_dec; + double sx_scale_inc; + double sx_scale_backup; + double sx_scale_len; + int dither, host_data, scale_down; + int input; + int len, start; + int odf, idf, yuv; + volatile int busy; + } videoengine; - struct - { - uint32_t pri_ctrl; - uint32_t chroma_ctrl; - uint32_t sec_ctrl; - uint32_t chroma_upper_bound; - uint32_t sec_filter; - uint32_t blend_ctrl; - uint32_t pri_fb0, pri_fb1; - uint32_t pri_stride; - uint32_t buffer_ctrl; - uint32_t sec_fb0, sec_fb1; - uint32_t sec_stride; - uint32_t overlay_ctrl; - int32_t k1_vert_scale; - int32_t k2_vert_scale; - int32_t dda_vert_accumulator; - int32_t k1_horiz_scale; - int32_t k2_horiz_scale; - int32_t dda_horiz_accumulator; - uint32_t fifo_ctrl; - uint32_t pri_start; - uint32_t pri_size; - uint32_t sec_start; - uint32_t sec_size; + struct + { + uint32_t pri_ctrl; + uint32_t chroma_ctrl; + uint32_t sec_ctrl; + uint32_t chroma_upper_bound; + uint32_t sec_filter; + uint32_t blend_ctrl; + uint32_t pri_fb0, pri_fb1; + uint32_t pri_stride; + uint32_t buffer_ctrl; + uint32_t sec_fb0, sec_fb1; + uint32_t sec_stride; + uint32_t overlay_ctrl; + int32_t k1_vert_scale; + int32_t k2_vert_scale; + int32_t dda_vert_accumulator; + int32_t k1_horiz_scale; + int32_t k2_horiz_scale; + int32_t dda_horiz_accumulator; + uint32_t fifo_ctrl; + uint32_t pri_start; + uint32_t pri_size; + uint32_t sec_start; + uint32_t sec_size; - int sdif; + int sdif; - int pri_x, pri_y, pri_w, pri_h; - int sec_x, sec_y, sec_w, sec_h; - } streams; + int pri_x, pri_y, pri_w, pri_h; + int sec_x, sec_y, sec_w, sec_h; + } streams; - fifo_entry_t fifo[FIFO_SIZE]; - volatile int fifo_read_idx, fifo_write_idx; + fifo_entry_t fifo[FIFO_SIZE]; + volatile int fifo_read_idx, fifo_write_idx; - uint8_t fifo_thread_run; + uint8_t fifo_thread_run; - thread_t *fifo_thread; - event_t *wake_fifo_thread; - event_t *fifo_not_full_event; + thread_t *fifo_thread; + event_t *wake_fifo_thread; + event_t *fifo_not_full_event; - int blitter_busy; - uint64_t blitter_time; - uint64_t status_time; + int blitter_busy; + uint64_t blitter_time; + uint64_t status_time; - uint8_t subsys_cntl, subsys_stat; + uint8_t subsys_cntl, subsys_stat; - uint32_t hwc_fg_col, hwc_bg_col; - int hwc_col_stack_pos; + uint32_t hwc_fg_col, hwc_bg_col; + int hwc_col_stack_pos; - int translate; - int enable_8514; - int color_16bit; - volatile int busy, force_busy; + int translate; + int enable_8514; + int color_16bit; + volatile int busy, force_busy; - uint8_t thread_run, serialport; - void *i2c, *ddc; + uint8_t thread_run, serialport; + void *i2c, *ddc; - int vram; + int vram; } s3_t; -#define INT_VSY (1 << 0) -#define INT_GE_BSY (1 << 1) -#define INT_FIFO_OVR (1 << 2) -#define INT_FIFO_EMP (1 << 3) -#define INT_MASK 0xf +#define INT_VSY (1 << 0) +#define INT_GE_BSY (1 << 1) +#define INT_FIFO_OVR (1 << 2) +#define INT_FIFO_EMP (1 << 3) +#define INT_MASK 0xf #define SERIAL_PORT_SCW (1 << 0) #define SERIAL_PORT_SDW (1 << 1) @@ -382,156 +375,157 @@ typedef struct s3_t static void s3_updatemapping(s3_t *s3); -static void s3_accel_write(uint32_t addr, uint8_t val, void *p); -static void s3_accel_write_w(uint32_t addr, uint16_t val, void *p); -static void s3_accel_write_l(uint32_t addr, uint32_t val, void *p); -static uint8_t s3_accel_read(uint32_t addr, void *p); +static void s3_accel_write(uint32_t addr, uint8_t val, void *p); +static void s3_accel_write_w(uint32_t addr, uint16_t val, void *p); +static void s3_accel_write_l(uint32_t addr, uint32_t val, void *p); +static uint8_t s3_accel_read(uint32_t addr, void *p); static uint16_t s3_accel_read_w(uint32_t addr, void *p); static uint32_t s3_accel_read_l(uint32_t addr, void *p); -static void s3_out(uint16_t addr, uint8_t val, void *p); +static void s3_out(uint16_t addr, uint8_t val, void *p); static uint8_t s3_in(uint16_t addr, void *p); -static void s3_accel_out(uint16_t port, uint8_t val, void *p); -static void s3_accel_out_w(uint16_t port, uint16_t val, void *p); -static void s3_accel_out_l(uint16_t port, uint32_t val, void *p); -static uint8_t s3_accel_in(uint16_t port, void *p); +static void s3_accel_out(uint16_t port, uint8_t val, void *p); +static void s3_accel_out_w(uint16_t port, uint16_t val, void *p); +static void s3_accel_out_l(uint16_t port, uint32_t val, void *p); +static uint8_t s3_accel_in(uint16_t port, void *p); static uint16_t s3_accel_in_w(uint16_t port, void *p); static uint32_t s3_accel_in_l(uint16_t port, void *p); -static uint8_t s3_pci_read(int func, int addr, void *p); -static void s3_pci_write(int func, int addr, uint8_t val, void *p); +static uint8_t s3_pci_read(int func, int addr, void *p); +static void s3_pci_write(int func, int addr, uint8_t val, void *p); /*Remap address for chain-4/doubleword style layout. These will stay for convenience.*/ static __inline uint32_t dword_remap(svga_t *svga, uint32_t in_addr) { - if (svga->packed_chain4 || svga->force_old_addr) - return in_addr; + if (svga->packed_chain4 || svga->force_old_addr) + return in_addr; - return ((in_addr << 2) & 0x3fff0) | - ((in_addr >> 14) & 0xc) | - (in_addr & ~0x3fffc); + return ((in_addr << 2) & 0x3fff0) | ((in_addr >> 14) & 0xc) | (in_addr & ~0x3fffc); } static __inline uint32_t dword_remap_w(svga_t *svga, uint32_t in_addr) { - if (svga->packed_chain4 || svga->force_old_addr) - return in_addr; + if (svga->packed_chain4 || svga->force_old_addr) + return in_addr; - return ((in_addr << 2) & 0x1fff8) | - ((in_addr >> 14) & 0x6) | - (in_addr & ~0x1fffe); + return ((in_addr << 2) & 0x1fff8) | ((in_addr >> 14) & 0x6) | (in_addr & ~0x1fffe); } static __inline uint32_t dword_remap_l(svga_t *svga, uint32_t in_addr) { - if (svga->packed_chain4 || svga->force_old_addr) - return in_addr; + if (svga->packed_chain4 || svga->force_old_addr) + return in_addr; - return ((in_addr << 2) & 0xfffc) | - ((in_addr >> 14) & 0x3) | - (in_addr & ~0xffff); + return ((in_addr << 2) & 0xfffc) | ((in_addr >> 14) & 0x3) | (in_addr & ~0xffff); } static __inline void wake_fifo_thread(s3_t *s3) { - thread_set_event(s3->wake_fifo_thread); /*Wake up FIFO thread if moving from idle*/ + thread_set_event(s3->wake_fifo_thread); /*Wake up FIFO thread if moving from idle*/ } static void s3_wait_fifo_idle(s3_t *s3) { - while (!FIFO_EMPTY) { - wake_fifo_thread(s3); - thread_wait_event(s3->fifo_not_full_event, 1); - } + while (!FIFO_EMPTY) { + wake_fifo_thread(s3); + thread_wait_event(s3->fifo_not_full_event, 1); + } } static void s3_queue(s3_t *s3, uint32_t addr, uint32_t val, uint32_t type) { - fifo_entry_t *fifo = &s3->fifo[s3->fifo_write_idx & FIFO_MASK]; + fifo_entry_t *fifo = &s3->fifo[s3->fifo_write_idx & FIFO_MASK]; - if (FIFO_FULL) { - thread_reset_event(s3->fifo_not_full_event); - if (FIFO_FULL) { - thread_wait_event(s3->fifo_not_full_event, -1); /*Wait for room in ringbuffer*/ - } - } + if (FIFO_FULL) { + thread_reset_event(s3->fifo_not_full_event); + if (FIFO_FULL) { + thread_wait_event(s3->fifo_not_full_event, -1); /*Wait for room in ringbuffer*/ + } + } - fifo->val = val; - fifo->addr_type = (addr & FIFO_ADDR) | type; + fifo->val = val; + fifo->addr_type = (addr & FIFO_ADDR) | type; - s3->fifo_write_idx++; + s3->fifo_write_idx++; - if (FIFO_ENTRIES > 0xe000 || FIFO_ENTRIES < 8) - wake_fifo_thread(s3); + if (FIFO_ENTRIES > 0xe000 || FIFO_ENTRIES < 8) + wake_fifo_thread(s3); } static void s3_update_irqs(s3_t *s3) { - if (!s3->pci) - return; + if (!s3->pci) + return; - if (s3->subsys_cntl & s3->subsys_stat & INT_MASK) { - pci_set_irq(s3->card, PCI_INTA); - } else { - pci_clear_irq(s3->card, PCI_INTA); - } + if (s3->subsys_cntl & s3->subsys_stat & INT_MASK) { + pci_set_irq(s3->card, PCI_INTA); + } else { + pci_clear_irq(s3->card, PCI_INTA); + } } -void s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_t *s3); -void s3_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_t *s3, uint8_t ssv); +void s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_t *s3); +void s3_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_t *s3, uint8_t ssv); static void s3_visionx68_video_engine_op(uint32_t cpu_dat, s3_t *s3); -#define WRITE8(addr, var, val) switch ((addr) & 3) \ - { \ - case 0: var = (var & 0xffffff00) | (val); break; \ - case 1: var = (var & 0xffff00ff) | ((val) << 8); break; \ - case 2: var = (var & 0xff00ffff) | ((val) << 16); break; \ - case 3: var = (var & 0x00ffffff) | ((val) << 24); break; \ - } - +#define WRITE8(addr, var, val) \ + switch ((addr) &3) { \ + case 0: \ + var = (var & 0xffffff00) | (val); \ + break; \ + case 1: \ + var = (var & 0xffff00ff) | ((val) << 8); \ + break; \ + case 2: \ + var = (var & 0xff00ffff) | ((val) << 16); \ + break; \ + case 3: \ + var = (var & 0x00ffffff) | ((val) << 24); \ + break; \ + } #define READ_PIXTRANS_BYTE_IO(n) \ - s3->accel.pix_trans[n] = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + n)) & s3->vram_mask]; \ + s3->accel.pix_trans[n] = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + n)) & s3->vram_mask]; #define READ_PIXTRANS_BYTE_MM \ - temp = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx)) & s3->vram_mask]; \ + temp = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx)) & s3->vram_mask]; -#define READ_PIXTRANS_WORD \ - if (s3->bpp == 0 && !s3->color_16bit) { \ - temp = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx)) & s3->vram_mask]; \ - temp |= (svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + 1)) & s3->vram_mask] << 8); \ - } else { \ - temp = vram_w[dword_remap_w(svga, (s3->accel.dest + s3->accel.cx)) & (s3->vram_mask >> 1)]; \ - } +#define READ_PIXTRANS_WORD \ + if (s3->bpp == 0 && !s3->color_16bit) { \ + temp = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx)) & s3->vram_mask]; \ + temp |= (svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + 1)) & s3->vram_mask] << 8); \ + } else { \ + temp = vram_w[dword_remap_w(svga, (s3->accel.dest + s3->accel.cx)) & (s3->vram_mask >> 1)]; \ + } -#define READ_PIXTRANS_LONG \ - if (s3->bpp == 0 && !s3->color_16bit) { \ - temp = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx)) & s3->vram_mask]; \ - temp |= (svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + 1)) & s3->vram_mask] << 8); \ - temp |= (svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + 2)) & s3->vram_mask] << 16); \ - temp |= (svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + 3)) & s3->vram_mask] << 24); \ - } else { \ - temp = vram_w[dword_remap_w(svga, (s3->accel.dest + s3->accel.cx)) & (s3->vram_mask >> 1)]; \ - temp |= (vram_w[dword_remap_w(svga, (s3->accel.dest + s3->accel.cx + 2)) & (s3->vram_mask >> 1)] << 16); \ - } +#define READ_PIXTRANS_LONG \ + if (s3->bpp == 0 && !s3->color_16bit) { \ + temp = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx)) & s3->vram_mask]; \ + temp |= (svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + 1)) & s3->vram_mask] << 8); \ + temp |= (svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + 2)) & s3->vram_mask] << 16); \ + temp |= (svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + 3)) & s3->vram_mask] << 24); \ + } else { \ + temp = vram_w[dword_remap_w(svga, (s3->accel.dest + s3->accel.cx)) & (s3->vram_mask >> 1)]; \ + temp |= (vram_w[dword_remap_w(svga, (s3->accel.dest + s3->accel.cx + 2)) & (s3->vram_mask >> 1)] << 16); \ + } static int s3_cpu_src(s3_t *s3) { if (!(s3->accel.cmd & 0x100)) - return 0; + return 0; if (s3->chip >= S3_VISION964) - return 1; + return 1; if (s3->accel.cmd & 1) - return 1; + return 1; return 0; } @@ -540,13 +534,13 @@ static int s3_cpu_dest(s3_t *s3) { if (!(s3->accel.cmd & 0x100)) - return 0; + return 0; if (s3->chip >= S3_VISION964) - return 0; + return 0; if (s3->accel.cmd & 1) - return 0; + return 0; return 1; } @@ -554,13 +548,10 @@ s3_cpu_dest(s3_t *s3) static int s3_enable_fifo(s3_t *s3) { - svga_t *svga = &s3->svga; + svga_t *svga = &s3->svga; - if ((s3->chip == S3_TRIO32) || (s3->chip == S3_TRIO64) || - (s3->chip == S3_TRIO64V) || (s3->chip == S3_TRIO64V2) || - (s3->chip == S3_VISION864) || (s3->chip == S3_VISION964) || - (s3->chip == S3_VISION968) || (s3->chip == S3_VISION868)) - return 1; /* FIFO always enabled on these chips. */ + if ((s3->chip == S3_TRIO32) || (s3->chip == S3_TRIO64) || (s3->chip == S3_TRIO64V) || (s3->chip == S3_TRIO64V2) || (s3->chip == S3_VISION864) || (s3->chip == S3_VISION964) || (s3->chip == S3_VISION968) || (s3->chip == S3_VISION868)) + return 1; /* FIFO always enabled on these chips. */ return !!((svga->crtc[0x40] & 0x08) || (s3->accel.advfunc_cntl & 0x40)); } @@ -568,140 +559,140 @@ s3_enable_fifo(s3_t *s3) static void s3_accel_out_pixtrans_w(s3_t *s3, uint16_t val) { - svga_t *svga = &s3->svga; + svga_t *svga = &s3->svga; - if (s3->accel.cmd & 0x100) { - switch (s3->accel.cmd & 0x600) { - case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - val = (val >> 8) | (val << 8); - s3_accel_start(8, 1, val | (val << 16), 0, s3); - } else - s3_accel_start(1, 1, 0xffffffff, val | (val << 16), s3); - } else { - if (s3->color_16bit) - s3_accel_start(2, 1, 0xffffffff, val | (val << 16), s3); - else - s3_accel_start(1, 1, 0xffffffff, val | (val << 16), s3); - } - break; - case 0x200: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - val = (val >> 8) | (val << 8); - s3_accel_start(16, 1, val | (val << 16), 0, s3); - } else - s3_accel_start(2, 1, 0xffffffff, val | (val << 16), s3); - } else { - s3_accel_start(2, 1, 0xffffffff, val | (val << 16), s3); - } - break; - case 0x400: - if (svga->crtc[0x53] & 0x08) { - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - val = (val >> 8) | (val << 8); - s3_accel_start(32, 1, val | (val << 16), 0, s3); - } else - s3_accel_start(4, 1, 0xffffffff, val | (val << 16), s3); - } else - s3_accel_start(4, 1, 0xffffffff, val | (val << 16), s3); - } else { - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - val = (val >> 8) | (val << 8); - s3_accel_start(16, 1, val | (val << 16), 0, s3); - } else - s3_accel_start(4, 1, 0xffffffff, val | (val << 16), s3); - } else - s3_accel_start(4, 1, 0xffffffff, val | (val << 16), s3); - } - break; - case 0x600: - if (s3->chip == S3_TRIO32 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868 || s3->chip >= S3_TRIO64V) { - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - val = (val >> 8) | (val << 8); - s3_accel_start(8, 1, (val >> 8) & 0xff, 0, s3); - s3_accel_start(8, 1, val & 0xff, 0, s3); - } - } - } - break; - } - } + if (s3->accel.cmd & 0x100) { + switch (s3->accel.cmd & 0x600) { + case 0x000: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + val = (val >> 8) | (val << 8); + s3_accel_start(8, 1, val | (val << 16), 0, s3); + } else + s3_accel_start(1, 1, 0xffffffff, val | (val << 16), s3); + } else { + if (s3->color_16bit) + s3_accel_start(2, 1, 0xffffffff, val | (val << 16), s3); + else + s3_accel_start(1, 1, 0xffffffff, val | (val << 16), s3); + } + break; + case 0x200: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + val = (val >> 8) | (val << 8); + s3_accel_start(16, 1, val | (val << 16), 0, s3); + } else + s3_accel_start(2, 1, 0xffffffff, val | (val << 16), s3); + } else { + s3_accel_start(2, 1, 0xffffffff, val | (val << 16), s3); + } + break; + case 0x400: + if (svga->crtc[0x53] & 0x08) { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + val = (val >> 8) | (val << 8); + s3_accel_start(32, 1, val | (val << 16), 0, s3); + } else + s3_accel_start(4, 1, 0xffffffff, val | (val << 16), s3); + } else + s3_accel_start(4, 1, 0xffffffff, val | (val << 16), s3); + } else { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + val = (val >> 8) | (val << 8); + s3_accel_start(16, 1, val | (val << 16), 0, s3); + } else + s3_accel_start(4, 1, 0xffffffff, val | (val << 16), s3); + } else + s3_accel_start(4, 1, 0xffffffff, val | (val << 16), s3); + } + break; + case 0x600: + if (s3->chip == S3_TRIO32 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868 || s3->chip >= S3_TRIO64V) { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + val = (val >> 8) | (val << 8); + s3_accel_start(8, 1, (val >> 8) & 0xff, 0, s3); + s3_accel_start(8, 1, val & 0xff, 0, s3); + } + } + } + break; + } + } } static void s3_accel_out_pixtrans_l(s3_t *s3, uint32_t val) { - if (s3->accel.cmd & 0x100) { - switch (s3->accel.cmd & 0x600) { - case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - val = ((val & 0xff00ff00) >> 8) | ((val & 0x00ff00ff) << 8); - s3_accel_start(8, 1, val, 0, s3); - s3_accel_start(8, 1, val >> 16, 0, s3); - } else { - s3_accel_start(1, 1, 0xffffffff, val, s3); - s3_accel_start(1, 1, 0xffffffff, val >> 16, s3); - } - } else { - s3_accel_start(1, 1, 0xffffffff, val, s3); - s3_accel_start(1, 1, 0xffffffff, val >> 16, s3); - } - break; - case 0x200: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - val = ((val & 0xff00ff00) >> 8) | ((val & 0x00ff00ff) << 8); - s3_accel_start(16, 1, val, 0, s3); - s3_accel_start(16, 1, val >> 16, 0, s3); - } else { - s3_accel_start(2, 1, 0xffffffff, val, s3); - s3_accel_start(2, 1, 0xffffffff, val >> 16, s3); - } - } else { - s3_accel_start(2, 1, 0xffffffff, val, s3); - s3_accel_start(2, 1, 0xffffffff, val >> 16, s3); - } - break; - case 0x400: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - val = ((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24); - s3_accel_start(32, 1, val, 0, s3); - } else - s3_accel_start(4, 1, 0xffffffff, val, s3); - } else - s3_accel_start(4, 1, 0xffffffff, val, s3); - break; - case 0x600: - if (s3->chip == S3_TRIO32 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868 || s3->chip >= S3_TRIO64V) { - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - val = ((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24); - s3_accel_start(8, 1, (val >> 24) & 0xff, 0, s3); - s3_accel_start(8, 1, (val >> 16) & 0xff, 0, s3); - s3_accel_start(8, 1, (val >> 8) & 0xff, 0, s3); - s3_accel_start(8, 1, val & 0xff, 0, s3); - } - } - } - break; - } - } + if (s3->accel.cmd & 0x100) { + switch (s3->accel.cmd & 0x600) { + case 0x000: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + val = ((val & 0xff00ff00) >> 8) | ((val & 0x00ff00ff) << 8); + s3_accel_start(8, 1, val, 0, s3); + s3_accel_start(8, 1, val >> 16, 0, s3); + } else { + s3_accel_start(1, 1, 0xffffffff, val, s3); + s3_accel_start(1, 1, 0xffffffff, val >> 16, s3); + } + } else { + s3_accel_start(1, 1, 0xffffffff, val, s3); + s3_accel_start(1, 1, 0xffffffff, val >> 16, s3); + } + break; + case 0x200: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + val = ((val & 0xff00ff00) >> 8) | ((val & 0x00ff00ff) << 8); + s3_accel_start(16, 1, val, 0, s3); + s3_accel_start(16, 1, val >> 16, 0, s3); + } else { + s3_accel_start(2, 1, 0xffffffff, val, s3); + s3_accel_start(2, 1, 0xffffffff, val >> 16, s3); + } + } else { + s3_accel_start(2, 1, 0xffffffff, val, s3); + s3_accel_start(2, 1, 0xffffffff, val >> 16, s3); + } + break; + case 0x400: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + val = ((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24); + s3_accel_start(32, 1, val, 0, s3); + } else + s3_accel_start(4, 1, 0xffffffff, val, s3); + } else + s3_accel_start(4, 1, 0xffffffff, val, s3); + break; + case 0x600: + if (s3->chip == S3_TRIO32 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868 || s3->chip >= S3_TRIO64V) { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + val = ((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24); + s3_accel_start(8, 1, (val >> 24) & 0xff, 0, s3); + s3_accel_start(8, 1, (val >> 16) & 0xff, 0, s3); + s3_accel_start(8, 1, (val >> 8) & 0xff, 0, s3); + s3_accel_start(8, 1, val & 0xff, 0, s3); + } + } + } + break; + } + } } static void @@ -710,670 +701,745 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) svga_t *svga = &s3->svga; switch (port) { - case 0x8148: case 0x82e8: - s3->accel.cur_y_bitres = (s3->accel.cur_y_bitres & 0xff00) | val; - s3->accel.cur_y = (s3->accel.cur_y & 0xf00) | val; - s3->accel.poly_cy = s3->accel.cur_y; - break; - case 0x8149: case 0x82e9: - s3->accel.cur_y_bitres = (s3->accel.cur_y_bitres & 0xff) | (val << 8); - s3->accel.cur_y = (s3->accel.cur_y & 0xff) | ((val & 0x0f) << 8); - s3->accel.cur_y_bit12 = val & 0x10; - s3->accel.poly_cy = s3->accel.cur_y; - break; - case 0x814a: case 0x82ea: - s3->accel.cur_y2 = (s3->accel.cur_y2 & 0xf00) | val; - s3->accel.poly_cy2 = s3->accel.cur_y2; - break; - case 0x814b: case 0x82eb: - s3->accel.cur_y2 = (s3->accel.cur_y2 & 0xff) | ((val & 0x0f) << 8); - s3->accel.poly_cy2 = s3->accel.cur_y2; - break; + case 0x8148: + case 0x82e8: + s3->accel.cur_y_bitres = (s3->accel.cur_y_bitres & 0xff00) | val; + s3->accel.cur_y = (s3->accel.cur_y & 0xf00) | val; + s3->accel.poly_cy = s3->accel.cur_y; + break; + case 0x8149: + case 0x82e9: + s3->accel.cur_y_bitres = (s3->accel.cur_y_bitres & 0xff) | (val << 8); + s3->accel.cur_y = (s3->accel.cur_y & 0xff) | ((val & 0x0f) << 8); + s3->accel.cur_y_bit12 = val & 0x10; + s3->accel.poly_cy = s3->accel.cur_y; + break; + case 0x814a: + case 0x82ea: + s3->accel.cur_y2 = (s3->accel.cur_y2 & 0xf00) | val; + s3->accel.poly_cy2 = s3->accel.cur_y2; + break; + case 0x814b: + case 0x82eb: + s3->accel.cur_y2 = (s3->accel.cur_y2 & 0xff) | ((val & 0x0f) << 8); + s3->accel.poly_cy2 = s3->accel.cur_y2; + break; - case 0x8548: case 0x86e8: - s3->accel.cur_x_bitres = (s3->accel.cur_x_bitres & 0xff00) | val; - s3->accel.cur_x = (s3->accel.cur_x & 0xf00) | val; - s3->accel.poly_cx = s3->accel.cur_x << 20; - s3->accel.poly_x = s3->accel.poly_cx >> 20; - break; - case 0x8549: case 0x86e9: - s3->accel.cur_x_bitres = (s3->accel.cur_x_bitres & 0xff) | (val << 8); - s3->accel.cur_x = (s3->accel.cur_x & 0xff) | ((val & 0x0f) << 8); - s3->accel.cur_x_bit12 = val & 0x10; - s3->accel.poly_cx = s3->accel.poly_x = s3->accel.cur_x << 20; - s3->accel.poly_x = s3->accel.poly_cx >> 20; - break; - case 0x854a: case 0x86ea: - s3->accel.cur_x2 = (s3->accel.cur_x2 & 0xf00) | val; - s3->accel.poly_cx2 = s3->accel.cur_x2 << 20; - break; - case 0x854b: case 0x86eb: - s3->accel.cur_x2 = (s3->accel.cur_x2 & 0xff) | ((val & 0x0f) << 8); - s3->accel.poly_cx2 = s3->accel.cur_x2 << 20; - break; + case 0x8548: + case 0x86e8: + s3->accel.cur_x_bitres = (s3->accel.cur_x_bitres & 0xff00) | val; + s3->accel.cur_x = (s3->accel.cur_x & 0xf00) | val; + s3->accel.poly_cx = s3->accel.cur_x << 20; + s3->accel.poly_x = s3->accel.poly_cx >> 20; + break; + case 0x8549: + case 0x86e9: + s3->accel.cur_x_bitres = (s3->accel.cur_x_bitres & 0xff) | (val << 8); + s3->accel.cur_x = (s3->accel.cur_x & 0xff) | ((val & 0x0f) << 8); + s3->accel.cur_x_bit12 = val & 0x10; + s3->accel.poly_cx = s3->accel.poly_x = s3->accel.cur_x << 20; + s3->accel.poly_x = s3->accel.poly_cx >> 20; + break; + case 0x854a: + case 0x86ea: + s3->accel.cur_x2 = (s3->accel.cur_x2 & 0xf00) | val; + s3->accel.poly_cx2 = s3->accel.cur_x2 << 20; + break; + case 0x854b: + case 0x86eb: + s3->accel.cur_x2 = (s3->accel.cur_x2 & 0xff) | ((val & 0x0f) << 8); + s3->accel.poly_cx2 = s3->accel.cur_x2 << 20; + break; - case 0xcae8: - case 0x8948: case 0x8ae8: - s3->accel.desty_axstp = (s3->accel.desty_axstp & 0x3f00) | val; - s3->accel.point_1_updated = 1; - break; - case 0xcae9: - case 0x8949: case 0x8ae9: - s3->accel.desty_axstp = (s3->accel.desty_axstp & 0xff) | ((val & 0x3f) << 8); - if (val & 0x20) - s3->accel.desty_axstp |= ~0x3fff; - s3->accel.point_1_updated = 1; - break; - case 0x894a: case 0x8aea: - s3->accel.desty_axstp2 = (s3->accel.desty_axstp2 & 0x3f00) | val; - s3->accel.point_2_updated = 1; - break; - case 0x849b: case 0x8aeb: - s3->accel.desty_axstp2 = (s3->accel.desty_axstp2 & 0xff) | ((val & 0x3f) << 8); - if (val & 0x20) - s3->accel.desty_axstp2 |= ~0x3fff; - s3->accel.point_2_updated = 1; - break; + case 0xcae8: + case 0x8948: + case 0x8ae8: + s3->accel.desty_axstp = (s3->accel.desty_axstp & 0x3f00) | val; + s3->accel.point_1_updated = 1; + break; + case 0xcae9: + case 0x8949: + case 0x8ae9: + s3->accel.desty_axstp = (s3->accel.desty_axstp & 0xff) | ((val & 0x3f) << 8); + if (val & 0x20) + s3->accel.desty_axstp |= ~0x3fff; + s3->accel.point_1_updated = 1; + break; + case 0x894a: + case 0x8aea: + s3->accel.desty_axstp2 = (s3->accel.desty_axstp2 & 0x3f00) | val; + s3->accel.point_2_updated = 1; + break; + case 0x849b: + case 0x8aeb: + s3->accel.desty_axstp2 = (s3->accel.desty_axstp2 & 0xff) | ((val & 0x3f) << 8); + if (val & 0x20) + s3->accel.desty_axstp2 |= ~0x3fff; + s3->accel.point_2_updated = 1; + break; - case 0x8d48: case 0x8ee8: - s3->accel.destx_distp = (s3->accel.destx_distp & 0x3f00) | val; - s3->accel.point_1_updated = 1; - break; - case 0x8d49: case 0x8ee9: - s3->accel.destx_distp = (s3->accel.destx_distp & 0xff) | ((val & 0x3f) << 8); - if (val & 0x20) - s3->accel.destx_distp |= ~0x3fff; - s3->accel.point_1_updated = 1; - break; - case 0x8d4a: case 0x8eea: - s3->accel.x2 = (s3->accel.x2 & 0xf00) | val; - s3->accel.point_2_updated = 1; - break; - case 0x8d4b: case 0x8eeb: - s3->accel.x2 = (s3->accel.x2 & 0xff) | ((val & 0x0f) << 8); - s3->accel.point_2_updated = 1; - break; + case 0x8d48: + case 0x8ee8: + s3->accel.destx_distp = (s3->accel.destx_distp & 0x3f00) | val; + s3->accel.point_1_updated = 1; + break; + case 0x8d49: + case 0x8ee9: + s3->accel.destx_distp = (s3->accel.destx_distp & 0xff) | ((val & 0x3f) << 8); + if (val & 0x20) + s3->accel.destx_distp |= ~0x3fff; + s3->accel.point_1_updated = 1; + break; + case 0x8d4a: + case 0x8eea: + s3->accel.x2 = (s3->accel.x2 & 0xf00) | val; + s3->accel.point_2_updated = 1; + break; + case 0x8d4b: + case 0x8eeb: + s3->accel.x2 = (s3->accel.x2 & 0xff) | ((val & 0x0f) << 8); + s3->accel.point_2_updated = 1; + break; - case 0x9148: case 0x92e8: - s3->accel.err_term = (s3->accel.err_term & 0x3f00) | val; - break; - case 0x9149: case 0x92e9: - s3->accel.err_term = (s3->accel.err_term & 0xff) | ((val & 0x3f) << 8); - if (val & 0x20) - s3->accel.err_term |= ~0x3fff; - break; - case 0x914a: case 0x92ea: - s3->accel.err_term2 = (s3->accel.err_term2 & 0x3f00) | val; - break; - case 0x914b: case 0x92eb: - s3->accel.err_term2 = (s3->accel.err_term2 & 0xff) | ((val & 0x3f) << 8); - if (val & 0x20) - s3->accel.err_term2 |= ~0x3fff; - break; + case 0x9148: + case 0x92e8: + s3->accel.err_term = (s3->accel.err_term & 0x3f00) | val; + break; + case 0x9149: + case 0x92e9: + s3->accel.err_term = (s3->accel.err_term & 0xff) | ((val & 0x3f) << 8); + if (val & 0x20) + s3->accel.err_term |= ~0x3fff; + break; + case 0x914a: + case 0x92ea: + s3->accel.err_term2 = (s3->accel.err_term2 & 0x3f00) | val; + break; + case 0x914b: + case 0x92eb: + s3->accel.err_term2 = (s3->accel.err_term2 & 0xff) | ((val & 0x3f) << 8); + if (val & 0x20) + s3->accel.err_term2 |= ~0x3fff; + break; - case 0x9548: case 0x96e8: - s3->accel.maj_axis_pcnt = (s3->accel.maj_axis_pcnt & 0xf00) | val; - break; - case 0x9459: case 0x96e9: - s3->accel.maj_axis_pcnt = (s3->accel.maj_axis_pcnt & 0xff) | ((val & 0x0f) << 8); - if (val & 0x08) - s3->accel.maj_axis_pcnt |= ~0x0fff; - break; - case 0x954a: case 0x96ea: - s3->accel.maj_axis_pcnt2 = (s3->accel.maj_axis_pcnt2 & 0xf00) | val; - break; - case 0x954b: case 0x96eb: - s3->accel.maj_axis_pcnt2 = (s3->accel.maj_axis_pcnt2 & 0xff) | ((val & 0x0f) << 8); - if (val & 0x08) - s3->accel.maj_axis_pcnt2 |= ~0x0fff; - break; + case 0x9548: + case 0x96e8: + s3->accel.maj_axis_pcnt = (s3->accel.maj_axis_pcnt & 0xf00) | val; + break; + case 0x9459: + case 0x96e9: + s3->accel.maj_axis_pcnt = (s3->accel.maj_axis_pcnt & 0xff) | ((val & 0x0f) << 8); + if (val & 0x08) + s3->accel.maj_axis_pcnt |= ~0x0fff; + break; + case 0x954a: + case 0x96ea: + s3->accel.maj_axis_pcnt2 = (s3->accel.maj_axis_pcnt2 & 0xf00) | val; + break; + case 0x954b: + case 0x96eb: + s3->accel.maj_axis_pcnt2 = (s3->accel.maj_axis_pcnt2 & 0xff) | ((val & 0x0f) << 8); + if (val & 0x08) + s3->accel.maj_axis_pcnt2 |= ~0x0fff; + break; - case 0x9948: case 0x9ae8: - s3->accel.cmd = (s3->accel.cmd & 0xff00) | val; - s3->data_available = 0; - s3->accel.b2e8_pix = 0; - break; - case 0x9949: case 0x9ae9: - s3->accel.cmd = (s3->accel.cmd & 0xff) | (val << 8); - s3->accel.ssv_state = 0; - s3_accel_start(-1, 0, 0xffffffff, 0, s3); - s3->accel.multifunc[0xe] &= ~0x10; /*hack*/ - break; + case 0x9948: + case 0x9ae8: + s3->accel.cmd = (s3->accel.cmd & 0xff00) | val; + s3->data_available = 0; + s3->accel.b2e8_pix = 0; + break; + case 0x9949: + case 0x9ae9: + s3->accel.cmd = (s3->accel.cmd & 0xff) | (val << 8); + s3->accel.ssv_state = 0; + s3_accel_start(-1, 0, 0xffffffff, 0, s3); + s3->accel.multifunc[0xe] &= ~0x10; /*hack*/ + break; - case 0x994a: case 0x9aea: - s3->accel.cmd2 = (s3->accel.cmd2 & 0xff00) | val; - break; - case 0x994b: case 0x9aeb: - s3->accel.cmd2 = (s3->accel.cmd2 & 0xff) | (val << 8); - break; + case 0x994a: + case 0x9aea: + s3->accel.cmd2 = (s3->accel.cmd2 & 0xff00) | val; + break; + case 0x994b: + case 0x9aeb: + s3->accel.cmd2 = (s3->accel.cmd2 & 0xff) | (val << 8); + break; - case 0x9d48: case 0x9ee8: - s3->accel.short_stroke = (s3->accel.short_stroke & 0xff00) | val; - break; - case 0x9d49: case 0x9ee9: - s3->accel.short_stroke = (s3->accel.short_stroke & 0xff) | (val << 8); - s3->accel.ssv_state = 1; + case 0x9d48: + case 0x9ee8: + s3->accel.short_stroke = (s3->accel.short_stroke & 0xff00) | val; + break; + case 0x9d49: + case 0x9ee9: + s3->accel.short_stroke = (s3->accel.short_stroke & 0xff) | (val << 8); + s3->accel.ssv_state = 1; - s3->accel.cx = s3->accel.cur_x; - if (s3->accel.cur_x_bit12) s3->accel.cx |= ~0xfff; - s3->accel.cy = s3->accel.cur_y; - if (s3->accel.cur_y_bit12) s3->accel.cy |= ~0xfff; + s3->accel.cx = s3->accel.cur_x; + if (s3->accel.cur_x_bit12) + s3->accel.cx |= ~0xfff; + s3->accel.cy = s3->accel.cur_y; + if (s3->accel.cur_y_bit12) + s3->accel.cy |= ~0xfff; - if (s3->accel.cmd & 0x1000) { - s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke & 0xff); - s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke >> 8); - } else { - s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke >> 8); - s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke & 0xff); - } - break; + if (s3->accel.cmd & 0x1000) { + s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke & 0xff); + s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke >> 8); + } else { + s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke >> 8); + s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke & 0xff); + } + break; - case 0xa148: case 0xa2e8: - if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0x00ff0000) | (val << 16); - else - s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0x000000ff) | val; - break; - case 0xa149: case 0xa2e9: - if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0xff000000) | (val << 24); - else - s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0x0000ff00) | (val << 8); - if (!(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.multifunc[0xe] ^= 0x10; - break; - case 0xa14a: case 0xa2ea: - if (s3->accel.multifunc[0xe] & 0x200) - s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0x00ff0000) | (val << 16); - else if (s3->bpp == 3) { - if (s3->accel.multifunc[0xe] & 0x10) - s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0x00ff0000) | (val << 16); - else - s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0x000000ff) | val; - } - break; - case 0xa14b: case 0xa2eb: - if (s3->accel.multifunc[0xe] & 0x200) - s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0xff000000) | (val << 24); - else if (s3->bpp == 3) { - if (s3->accel.multifunc[0xe] & 0x10) - s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0xff000000) | (val << 24); - else - s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0x0000ff00) | (val << 8); - s3->accel.multifunc[0xe] ^= 0x10; - } - break; + case 0xa148: + case 0xa2e8: + if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0x00ff0000) | (val << 16); + else + s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0x000000ff) | val; + break; + case 0xa149: + case 0xa2e9: + if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0xff000000) | (val << 24); + else + s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0x0000ff00) | (val << 8); + if (!(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.multifunc[0xe] ^= 0x10; + break; + case 0xa14a: + case 0xa2ea: + if (s3->accel.multifunc[0xe] & 0x200) + s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0x00ff0000) | (val << 16); + else if (s3->bpp == 3) { + if (s3->accel.multifunc[0xe] & 0x10) + s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0x00ff0000) | (val << 16); + else + s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0x000000ff) | val; + } + break; + case 0xa14b: + case 0xa2eb: + if (s3->accel.multifunc[0xe] & 0x200) + s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0xff000000) | (val << 24); + else if (s3->bpp == 3) { + if (s3->accel.multifunc[0xe] & 0x10) + s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0xff000000) | (val << 24); + else + s3->accel.bkgd_color = (s3->accel.bkgd_color & ~0x0000ff00) | (val << 8); + s3->accel.multifunc[0xe] ^= 0x10; + } + break; - case 0xa548: case 0xa6e8: - if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.frgd_color = (s3->accel.frgd_color & ~0x00ff0000) | (val << 16); - else - s3->accel.frgd_color = (s3->accel.frgd_color & ~0x000000ff) | val; - break; - case 0xa549: case 0xa6e9: - if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.frgd_color = (s3->accel.frgd_color & ~0xff000000) | (val << 24); - else - s3->accel.frgd_color = (s3->accel.frgd_color & ~0x0000ff00) | (val << 8); - if (!(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.multifunc[0xe] ^= 0x10; - break; - case 0xa54a: case 0xa6ea: - if (s3->accel.multifunc[0xe] & 0x200) - s3->accel.frgd_color = (s3->accel.frgd_color & ~0x00ff0000) | (val << 16); - else if (s3->bpp == 3) { - if (s3->accel.multifunc[0xe] & 0x10) - s3->accel.frgd_color = (s3->accel.frgd_color & ~0x00ff0000) | (val << 16); - else - s3->accel.frgd_color = (s3->accel.frgd_color & ~0x000000ff) | val; - } - break; - case 0xa54b: case 0xa6eb: - if (s3->accel.multifunc[0xe] & 0x200) - s3->accel.frgd_color = (s3->accel.frgd_color & ~0xff000000) | (val << 24); - else if (s3->bpp == 3) { - if (s3->accel.multifunc[0xe] & 0x10) - s3->accel.frgd_color = (s3->accel.frgd_color & ~0xff000000) | (val << 24); - else - s3->accel.frgd_color = (s3->accel.frgd_color & ~0x0000ff00) | (val << 8); - s3->accel.multifunc[0xe] ^= 0x10; - } - break; + case 0xa548: + case 0xa6e8: + if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.frgd_color = (s3->accel.frgd_color & ~0x00ff0000) | (val << 16); + else + s3->accel.frgd_color = (s3->accel.frgd_color & ~0x000000ff) | val; + break; + case 0xa549: + case 0xa6e9: + if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.frgd_color = (s3->accel.frgd_color & ~0xff000000) | (val << 24); + else + s3->accel.frgd_color = (s3->accel.frgd_color & ~0x0000ff00) | (val << 8); + if (!(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.multifunc[0xe] ^= 0x10; + break; + case 0xa54a: + case 0xa6ea: + if (s3->accel.multifunc[0xe] & 0x200) + s3->accel.frgd_color = (s3->accel.frgd_color & ~0x00ff0000) | (val << 16); + else if (s3->bpp == 3) { + if (s3->accel.multifunc[0xe] & 0x10) + s3->accel.frgd_color = (s3->accel.frgd_color & ~0x00ff0000) | (val << 16); + else + s3->accel.frgd_color = (s3->accel.frgd_color & ~0x000000ff) | val; + } + break; + case 0xa54b: + case 0xa6eb: + if (s3->accel.multifunc[0xe] & 0x200) + s3->accel.frgd_color = (s3->accel.frgd_color & ~0xff000000) | (val << 24); + else if (s3->bpp == 3) { + if (s3->accel.multifunc[0xe] & 0x10) + s3->accel.frgd_color = (s3->accel.frgd_color & ~0xff000000) | (val << 24); + else + s3->accel.frgd_color = (s3->accel.frgd_color & ~0x0000ff00) | (val << 8); + s3->accel.multifunc[0xe] ^= 0x10; + } + break; - case 0xa948: case 0xaae8: - if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0x00ff0000) | (val << 16); - else - s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0x000000ff) | val; - break; - case 0xa949: case 0xaae9: - if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0xff000000) | (val << 24); - else - s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0x0000ff00) | (val << 8); - if (!(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.multifunc[0xe] ^= 0x10; - break; - case 0xa94a: case 0xaaea: - if (s3->accel.multifunc[0xe] & 0x200) - s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0x00ff0000) | (val << 16); - else if (s3->bpp == 3) { - if (s3->accel.multifunc[0xe] & 0x10) - s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0x00ff0000) | (val << 16); - else - s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0x000000ff) | val; - } - break; - case 0xa94b: case 0xaaeb: - if (s3->accel.multifunc[0xe] & 0x200) - s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0xff000000) | (val << 24); - else if (s3->bpp == 3) { - if (s3->accel.multifunc[0xe] & 0x10) - s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0xff000000) | (val << 24); - else - s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0x0000ff00) | (val << 8); - s3->accel.multifunc[0xe] ^= 0x10; - } - break; + case 0xa948: + case 0xaae8: + if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0x00ff0000) | (val << 16); + else + s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0x000000ff) | val; + break; + case 0xa949: + case 0xaae9: + if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0xff000000) | (val << 24); + else + s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0x0000ff00) | (val << 8); + if (!(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.multifunc[0xe] ^= 0x10; + break; + case 0xa94a: + case 0xaaea: + if (s3->accel.multifunc[0xe] & 0x200) + s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0x00ff0000) | (val << 16); + else if (s3->bpp == 3) { + if (s3->accel.multifunc[0xe] & 0x10) + s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0x00ff0000) | (val << 16); + else + s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0x000000ff) | val; + } + break; + case 0xa94b: + case 0xaaeb: + if (s3->accel.multifunc[0xe] & 0x200) + s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0xff000000) | (val << 24); + else if (s3->bpp == 3) { + if (s3->accel.multifunc[0xe] & 0x10) + s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0xff000000) | (val << 24); + else + s3->accel.wrt_mask = (s3->accel.wrt_mask & ~0x0000ff00) | (val << 8); + s3->accel.multifunc[0xe] ^= 0x10; + } + break; - case 0xad48: case 0xaee8: - if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.rd_mask = (s3->accel.rd_mask & ~0x00ff0000) | (val << 16); - else - s3->accel.rd_mask = (s3->accel.rd_mask & ~0x000000ff) | val; - break; - case 0xad49: case 0xaee9: - if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.rd_mask = (s3->accel.rd_mask & ~0xff000000) | (val << 24); - else - s3->accel.rd_mask = (s3->accel.rd_mask & ~0x0000ff00) | (val << 8); - if (!(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.multifunc[0xe] ^= 0x10; - break; - case 0xad4a: case 0xaeea: - if (s3->accel.multifunc[0xe] & 0x200) - s3->accel.rd_mask = (s3->accel.rd_mask & ~0x00ff0000) | (val << 16); - else if (s3->bpp == 3) { - if (s3->accel.multifunc[0xe] & 0x10) - s3->accel.rd_mask = (s3->accel.rd_mask & ~0x00ff0000) | (val << 16); - else - s3->accel.rd_mask = (s3->accel.rd_mask & ~0x000000ff) | val; - } - break; - case 0xad4b: case 0xaeeb: - if (s3->accel.multifunc[0xe] & 0x200) - s3->accel.rd_mask = (s3->accel.rd_mask & ~0xff000000) | (val << 24); - else if (s3->bpp == 3) { - if (s3->accel.multifunc[0xe] & 0x10) - s3->accel.rd_mask = (s3->accel.rd_mask & ~0xff000000) | (val << 24); - else - s3->accel.rd_mask = (s3->accel.rd_mask & ~0x0000ff00) | (val << 8); - s3->accel.multifunc[0xe] ^= 0x10; - } - break; + case 0xad48: + case 0xaee8: + if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.rd_mask = (s3->accel.rd_mask & ~0x00ff0000) | (val << 16); + else + s3->accel.rd_mask = (s3->accel.rd_mask & ~0x000000ff) | val; + break; + case 0xad49: + case 0xaee9: + if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.rd_mask = (s3->accel.rd_mask & ~0xff000000) | (val << 24); + else + s3->accel.rd_mask = (s3->accel.rd_mask & ~0x0000ff00) | (val << 8); + if (!(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.multifunc[0xe] ^= 0x10; + break; + case 0xad4a: + case 0xaeea: + if (s3->accel.multifunc[0xe] & 0x200) + s3->accel.rd_mask = (s3->accel.rd_mask & ~0x00ff0000) | (val << 16); + else if (s3->bpp == 3) { + if (s3->accel.multifunc[0xe] & 0x10) + s3->accel.rd_mask = (s3->accel.rd_mask & ~0x00ff0000) | (val << 16); + else + s3->accel.rd_mask = (s3->accel.rd_mask & ~0x000000ff) | val; + } + break; + case 0xad4b: + case 0xaeeb: + if (s3->accel.multifunc[0xe] & 0x200) + s3->accel.rd_mask = (s3->accel.rd_mask & ~0xff000000) | (val << 24); + else if (s3->bpp == 3) { + if (s3->accel.multifunc[0xe] & 0x10) + s3->accel.rd_mask = (s3->accel.rd_mask & ~0xff000000) | (val << 24); + else + s3->accel.rd_mask = (s3->accel.rd_mask & ~0x0000ff00) | (val << 8); + s3->accel.multifunc[0xe] ^= 0x10; + } + break; - case 0xb148: case 0xb2e8: - if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.color_cmp = (s3->accel.color_cmp & ~0x00ff0000) | (val << 16); - else - s3->accel.color_cmp = (s3->accel.color_cmp & ~0x000000ff) | val; - break; - case 0xb149: case 0xb2e9: - if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.color_cmp = (s3->accel.color_cmp & ~0xff000000) | (val << 24); - else - s3->accel.color_cmp = (s3->accel.color_cmp & ~0x0000ff00) | (val << 8); - if (!(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.multifunc[0xe] ^= 0x10; - break; - case 0xb14a: case 0xb2ea: - if (s3->accel.multifunc[0xe] & 0x200) - s3->accel.color_cmp = (s3->accel.color_cmp & ~0x00ff0000) | (val << 16); - else if (s3->bpp == 3) { - if (s3->accel.multifunc[0xe] & 0x10) - s3->accel.color_cmp = (s3->accel.color_cmp & ~0x00ff0000) | (val << 16); - else - s3->accel.color_cmp = (s3->accel.color_cmp & ~0x000000ff) | val; - } - break; - case 0xb14b: case 0xb2eb: - if (s3->accel.multifunc[0xe] & 0x200) - s3->accel.color_cmp = (s3->accel.color_cmp & ~0xff000000) | (val << 24); - else if (s3->bpp == 3) { - if (s3->accel.multifunc[0xe] & 0x10) - s3->accel.color_cmp = (s3->accel.color_cmp & ~0xff000000) | (val << 24); - else - s3->accel.color_cmp = (s3->accel.color_cmp & ~0x0000ff00) | (val << 8); - s3->accel.multifunc[0xe] ^= 0x10; - } - break; + case 0xb148: + case 0xb2e8: + if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.color_cmp = (s3->accel.color_cmp & ~0x00ff0000) | (val << 16); + else + s3->accel.color_cmp = (s3->accel.color_cmp & ~0x000000ff) | val; + break; + case 0xb149: + case 0xb2e9: + if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.color_cmp = (s3->accel.color_cmp & ~0xff000000) | (val << 24); + else + s3->accel.color_cmp = (s3->accel.color_cmp & ~0x0000ff00) | (val << 8); + if (!(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.multifunc[0xe] ^= 0x10; + break; + case 0xb14a: + case 0xb2ea: + if (s3->accel.multifunc[0xe] & 0x200) + s3->accel.color_cmp = (s3->accel.color_cmp & ~0x00ff0000) | (val << 16); + else if (s3->bpp == 3) { + if (s3->accel.multifunc[0xe] & 0x10) + s3->accel.color_cmp = (s3->accel.color_cmp & ~0x00ff0000) | (val << 16); + else + s3->accel.color_cmp = (s3->accel.color_cmp & ~0x000000ff) | val; + } + break; + case 0xb14b: + case 0xb2eb: + if (s3->accel.multifunc[0xe] & 0x200) + s3->accel.color_cmp = (s3->accel.color_cmp & ~0xff000000) | (val << 24); + else if (s3->bpp == 3) { + if (s3->accel.multifunc[0xe] & 0x10) + s3->accel.color_cmp = (s3->accel.color_cmp & ~0xff000000) | (val << 24); + else + s3->accel.color_cmp = (s3->accel.color_cmp & ~0x0000ff00) | (val << 8); + s3->accel.multifunc[0xe] ^= 0x10; + } + break; - case 0xb548: case 0xb6e8: - s3->accel.bkgd_mix = val; - break; + case 0xb548: + case 0xb6e8: + s3->accel.bkgd_mix = val; + break; - case 0xb948: case 0xbae8: - s3->accel.frgd_mix = val; - break; + case 0xb948: + case 0xbae8: + s3->accel.frgd_mix = val; + break; - case 0xbd48: case 0xbee8: - s3->accel.multifunc_cntl = (s3->accel.multifunc_cntl & 0xff00) | val; - break; - case 0xbd49: case 0xbee9: - s3->accel.multifunc_cntl = (s3->accel.multifunc_cntl & 0xff) | (val << 8); - s3->accel.multifunc[s3->accel.multifunc_cntl >> 12] = s3->accel.multifunc_cntl & 0xfff; - break; + case 0xbd48: + case 0xbee8: + s3->accel.multifunc_cntl = (s3->accel.multifunc_cntl & 0xff00) | val; + break; + case 0xbd49: + case 0xbee9: + s3->accel.multifunc_cntl = (s3->accel.multifunc_cntl & 0xff) | (val << 8); + s3->accel.multifunc[s3->accel.multifunc_cntl >> 12] = s3->accel.multifunc_cntl & 0xfff; + break; - case 0xd148: case 0xd2e8: - s3->accel.ropmix = (s3->accel.ropmix & 0xff00) | val; - break; - case 0xd149: case 0xd2e9: - s3->accel.ropmix = (s3->accel.ropmix & 0x00ff) | (val << 8); - break; - case 0xe548: case 0xe6e8: - if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x00ff0000) | (val << 16); - else - s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x000000ff) | val; - break; - case 0xe549: case 0xe6e9: - if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0xff000000) | (val << 24); - else - s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x0000ff00) | (val << 8); - if (!(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.multifunc[0xe] ^= 0x10; - break; - case 0xe54a: case 0xe6ea: - if (s3->accel.multifunc[0xe] & 0x200) - s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x00ff0000) | (val << 16); - else if (s3->bpp == 3) { - if (s3->accel.multifunc[0xe] & 0x10) - s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x00ff0000) | (val << 16); - else - s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x000000ff) | val; - } - break; - case 0xe54b: case 0xe6eb: - if (s3->accel.multifunc[0xe] & 0x200) - s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0xff000000) | (val << 24); - else if (s3->bpp == 3) { - if (s3->accel.multifunc[0xe] & 0x10) - s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0xff000000) | (val << 24); - else - s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x0000ff00) | (val << 8); - s3->accel.multifunc[0xe] ^= 0x10; - } - break; - case 0xe948: case 0xeae8: - s3->accel.pat_y = (s3->accel.pat_y & 0xf00) | val; - break; - case 0xe949: case 0xeae9: - s3->accel.pat_y = (s3->accel.pat_y & 0xff) | ((val & 0x1f) << 8); - break; - case 0xe94a: case 0xeaea: - s3->accel.pat_x = (s3->accel.pat_x & 0xf00) | val; - break; - case 0xe94b: case 0xeaeb: - s3->accel.pat_x = (s3->accel.pat_x & 0xff) | ((val & 0x1f) << 8); - break; - case 0xed48: case 0xeee8: - if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x00ff0000) | (val << 16); - else - s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x000000ff) | val; - break; - case 0xed49: case 0xeee9: - if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0xff000000) | (val << 24); - else - s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x0000ff00) | (val << 8); - if (!(s3->accel.multifunc[0xe] & 0x200)) - s3->accel.multifunc[0xe] ^= 0x10; - break; - case 0xed4a: case 0xeeea: - if (s3->accel.multifunc[0xe] & 0x200) - s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x00ff0000) | (val << 16); - else if (s3->bpp == 3) { - if (s3->accel.multifunc[0xe] & 0x10) - s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x00ff0000) | (val << 16); - else - s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x000000ff) | val; - } - break; - case 0xed4b: case 0xeeeb: - if (s3->accel.multifunc[0xe] & 0x200) - s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0xff000000) | (val << 24); - else if (s3->bpp == 3) { - if (s3->accel.multifunc[0xe] & 0x10) - s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0xff000000) | (val << 24); - else - s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x0000ff00) | (val << 8); - s3->accel.multifunc[0xe] ^= 0x10; - } - break; + case 0xd148: + case 0xd2e8: + s3->accel.ropmix = (s3->accel.ropmix & 0xff00) | val; + break; + case 0xd149: + case 0xd2e9: + s3->accel.ropmix = (s3->accel.ropmix & 0x00ff) | (val << 8); + break; + case 0xe548: + case 0xe6e8: + if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x00ff0000) | (val << 16); + else + s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x000000ff) | val; + break; + case 0xe549: + case 0xe6e9: + if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0xff000000) | (val << 24); + else + s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x0000ff00) | (val << 8); + if (!(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.multifunc[0xe] ^= 0x10; + break; + case 0xe54a: + case 0xe6ea: + if (s3->accel.multifunc[0xe] & 0x200) + s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x00ff0000) | (val << 16); + else if (s3->bpp == 3) { + if (s3->accel.multifunc[0xe] & 0x10) + s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x00ff0000) | (val << 16); + else + s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x000000ff) | val; + } + break; + case 0xe54b: + case 0xe6eb: + if (s3->accel.multifunc[0xe] & 0x200) + s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0xff000000) | (val << 24); + else if (s3->bpp == 3) { + if (s3->accel.multifunc[0xe] & 0x10) + s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0xff000000) | (val << 24); + else + s3->accel.pat_bg_color = (s3->accel.pat_bg_color & ~0x0000ff00) | (val << 8); + s3->accel.multifunc[0xe] ^= 0x10; + } + break; + case 0xe948: + case 0xeae8: + s3->accel.pat_y = (s3->accel.pat_y & 0xf00) | val; + break; + case 0xe949: + case 0xeae9: + s3->accel.pat_y = (s3->accel.pat_y & 0xff) | ((val & 0x1f) << 8); + break; + case 0xe94a: + case 0xeaea: + s3->accel.pat_x = (s3->accel.pat_x & 0xf00) | val; + break; + case 0xe94b: + case 0xeaeb: + s3->accel.pat_x = (s3->accel.pat_x & 0xff) | ((val & 0x1f) << 8); + break; + case 0xed48: + case 0xeee8: + if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x00ff0000) | (val << 16); + else + s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x000000ff) | val; + break; + case 0xed49: + case 0xeee9: + if (s3->bpp == 3 && s3->accel.multifunc[0xe] & 0x10 && !(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0xff000000) | (val << 24); + else + s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x0000ff00) | (val << 8); + if (!(s3->accel.multifunc[0xe] & 0x200)) + s3->accel.multifunc[0xe] ^= 0x10; + break; + case 0xed4a: + case 0xeeea: + if (s3->accel.multifunc[0xe] & 0x200) + s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x00ff0000) | (val << 16); + else if (s3->bpp == 3) { + if (s3->accel.multifunc[0xe] & 0x10) + s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x00ff0000) | (val << 16); + else + s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x000000ff) | val; + } + break; + case 0xed4b: + case 0xeeeb: + if (s3->accel.multifunc[0xe] & 0x200) + s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0xff000000) | (val << 24); + else if (s3->bpp == 3) { + if (s3->accel.multifunc[0xe] & 0x10) + s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0xff000000) | (val << 24); + else + s3->accel.pat_fg_color = (s3->accel.pat_fg_color & ~0x0000ff00) | (val << 8); + s3->accel.multifunc[0xe] ^= 0x10; + } + break; - case 0xe148: case 0xe2e8: - s3->accel.b2e8_pix = 0; - if (s3_cpu_dest(s3)) - break; - s3->accel.pix_trans[0] = val; - if (s3->accel.cmd & 0x100) { - switch (s3->accel.cmd & 0x600) { - case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(8, 1, s3->accel.pix_trans[0], 0, s3); - else - s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3); - } else { - if (s3->color_16bit) - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0], s3); - else - s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3); - } - break; - case 0x200: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(16, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[0] << 8), 0, s3); - else - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[0] << 8), s3); - } else { - if (s3->chip != S3_86C928PCI && s3->chip != S3_86C928) { - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[0] << 8), s3); - } - } - break; - } - } - break; - case 0xe149: case 0xe2e9: - s3->accel.b2e8_pix = 0; - if (s3_cpu_dest(s3)) - break; - s3->accel.pix_trans[1] = val; - if (s3->accel.cmd & 0x100) { - switch (s3->accel.cmd & 0x600) { - case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(8, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), 0, s3); - else - s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); - } else { - s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); - } - break; - case 0x200: - /*Windows 95's built-in driver expects this to be loaded regardless of the byte swap bit (0xE2E9) in the 86c928 ISA/VLB*/ - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - s3_accel_start(16, 1, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), 0, s3); - else - s3_accel_start(16, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), 0, s3); - } else { - if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI) { - s3_accel_out_pixtrans_w(s3, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8)); - } else { - if (s3->accel.cmd & 0x1000) - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), s3); - else - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); - } - } - } else { - if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI) { - s3_accel_out_pixtrans_w(s3, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8)); - } else { - if (s3->accel.cmd & 0x1000) - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), s3); - else - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); - } - } - break; - case 0x400: - if (svga->crtc[0x53] & 0x08) { - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(32, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), 0, s3); - else - s3_accel_start(4, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); - } else - s3_accel_start(4, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); - } - break; - case 0x600: - if (s3->chip == S3_TRIO32 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868 || s3->chip >= S3_TRIO64V) { - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - s3_accel_start(8, 1, s3->accel.pix_trans[1], 0, s3); - s3_accel_start(8, 1, s3->accel.pix_trans[0], 0, s3); - } - } - } - break; - } - } - break; - case 0xe14a: case 0xe2ea: - if (s3_cpu_dest(s3)) - break; - s3->accel.pix_trans[2] = val; - break; - case 0xe14b: case 0xe2eb: - if (s3_cpu_dest(s3)) - break; - s3->accel.pix_trans[3] = val; - if (s3->accel.cmd & 0x100) { - switch (s3->accel.cmd & 0x600) { - case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(8, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), 0, s3); - else - s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); - } else - s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); - break; - case 0x200: - /*Windows 95's built-in driver expects the upper 16 bits to be loaded instead of the whole 32-bit one, regardless of the byte swap bit (0xE2EB) in the 86c928 ISA/VLB card*/ - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - s3_accel_start(16, 1, s3->accel.pix_trans[3] | (s3->accel.pix_trans[2] << 8) | (s3->accel.pix_trans[1] << 16) | (s3->accel.pix_trans[0] << 24), 0, s3); - else - s3_accel_start(16, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), 0, s3); - } else { - if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI) { - s3_accel_out_pixtrans_w(s3, s3->accel.pix_trans[2] | (s3->accel.pix_trans[3] << 8)); - } else { - if (s3->accel.cmd & 0x1000) - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[3] | (s3->accel.pix_trans[2] << 8) | (s3->accel.pix_trans[1] << 16) | (s3->accel.pix_trans[0] << 24), s3); - else - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); - } - } - } else { - if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI) { - s3_accel_out_pixtrans_w(s3, s3->accel.pix_trans[2] | (s3->accel.pix_trans[3] << 8)); - } else { - if (s3->accel.cmd & 0x1000) - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[3] | (s3->accel.pix_trans[2] << 8) | (s3->accel.pix_trans[1] << 16) | (s3->accel.pix_trans[0] << 24), s3); - else - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); - } - } - break; - case 0x400: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(32, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), 0, s3); - else - s3_accel_start(4, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); - } else - s3_accel_start(4, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); - break; - case 0x600: - if (s3->chip == S3_TRIO32 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868 || s3->chip >= S3_TRIO64V) { - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - s3_accel_start(8, 1, s3->accel.pix_trans[3], 0, s3); - s3_accel_start(8, 1, s3->accel.pix_trans[2], 0, s3); - s3_accel_start(8, 1, s3->accel.pix_trans[1], 0, s3); - s3_accel_start(8, 1, s3->accel.pix_trans[0], 0, s3); - } - } - } - break; - } - } - break; - } + case 0xe148: + case 0xe2e8: + s3->accel.b2e8_pix = 0; + if (s3_cpu_dest(s3)) + break; + s3->accel.pix_trans[0] = val; + if (s3->accel.cmd & 0x100) { + switch (s3->accel.cmd & 0x600) { + case 0x000: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(8, 1, s3->accel.pix_trans[0], 0, s3); + else + s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3); + } else { + if (s3->color_16bit) + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0], s3); + else + s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3); + } + break; + case 0x200: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(16, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[0] << 8), 0, s3); + else + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[0] << 8), s3); + } else { + if (s3->chip != S3_86C928PCI && s3->chip != S3_86C928) { + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[0] << 8), s3); + } + } + break; + } + } + break; + case 0xe149: + case 0xe2e9: + s3->accel.b2e8_pix = 0; + if (s3_cpu_dest(s3)) + break; + s3->accel.pix_trans[1] = val; + if (s3->accel.cmd & 0x100) { + switch (s3->accel.cmd & 0x600) { + case 0x000: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(8, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), 0, s3); + else + s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); + } else { + s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); + } + break; + case 0x200: + /*Windows 95's built-in driver expects this to be loaded regardless of the byte swap bit (0xE2E9) in the 86c928 ISA/VLB*/ + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + s3_accel_start(16, 1, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), 0, s3); + else + s3_accel_start(16, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), 0, s3); + } else { + if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI) { + s3_accel_out_pixtrans_w(s3, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8)); + } else { + if (s3->accel.cmd & 0x1000) + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), s3); + else + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); + } + } + } else { + if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI) { + s3_accel_out_pixtrans_w(s3, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8)); + } else { + if (s3->accel.cmd & 0x1000) + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), s3); + else + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); + } + } + break; + case 0x400: + if (svga->crtc[0x53] & 0x08) { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(32, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), 0, s3); + else + s3_accel_start(4, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); + } else + s3_accel_start(4, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); + } + break; + case 0x600: + if (s3->chip == S3_TRIO32 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868 || s3->chip >= S3_TRIO64V) { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + s3_accel_start(8, 1, s3->accel.pix_trans[1], 0, s3); + s3_accel_start(8, 1, s3->accel.pix_trans[0], 0, s3); + } + } + } + break; + } + } + break; + case 0xe14a: + case 0xe2ea: + if (s3_cpu_dest(s3)) + break; + s3->accel.pix_trans[2] = val; + break; + case 0xe14b: + case 0xe2eb: + if (s3_cpu_dest(s3)) + break; + s3->accel.pix_trans[3] = val; + if (s3->accel.cmd & 0x100) { + switch (s3->accel.cmd & 0x600) { + case 0x000: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(8, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), 0, s3); + else + s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); + } else + s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); + break; + case 0x200: + /*Windows 95's built-in driver expects the upper 16 bits to be loaded instead of the whole 32-bit one, regardless of the byte swap bit (0xE2EB) in the 86c928 ISA/VLB card*/ + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + s3_accel_start(16, 1, s3->accel.pix_trans[3] | (s3->accel.pix_trans[2] << 8) | (s3->accel.pix_trans[1] << 16) | (s3->accel.pix_trans[0] << 24), 0, s3); + else + s3_accel_start(16, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), 0, s3); + } else { + if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI) { + s3_accel_out_pixtrans_w(s3, s3->accel.pix_trans[2] | (s3->accel.pix_trans[3] << 8)); + } else { + if (s3->accel.cmd & 0x1000) + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[3] | (s3->accel.pix_trans[2] << 8) | (s3->accel.pix_trans[1] << 16) | (s3->accel.pix_trans[0] << 24), s3); + else + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); + } + } + } else { + if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI) { + s3_accel_out_pixtrans_w(s3, s3->accel.pix_trans[2] | (s3->accel.pix_trans[3] << 8)); + } else { + if (s3->accel.cmd & 0x1000) + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[3] | (s3->accel.pix_trans[2] << 8) | (s3->accel.pix_trans[1] << 16) | (s3->accel.pix_trans[0] << 24), s3); + else + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); + } + } + break; + case 0x400: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(32, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), 0, s3); + else + s3_accel_start(4, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); + } else + s3_accel_start(4, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); + break; + case 0x600: + if (s3->chip == S3_TRIO32 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868 || s3->chip >= S3_TRIO64V) { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + s3_accel_start(8, 1, s3->accel.pix_trans[3], 0, s3); + s3_accel_start(8, 1, s3->accel.pix_trans[2], 0, s3); + s3_accel_start(8, 1, s3->accel.pix_trans[1], 0, s3); + s3_accel_start(8, 1, s3->accel.pix_trans[0], 0, s3); + } + } + } + break; + } + } + break; + } } static void s3_accel_out_fifo_w(s3_t *s3, uint16_t port, uint16_t val) { - if (port != 0x9ee8 && port != 0x9d48) { - if (port == 0xb2e8 || port == 0xb148) { - s3->accel.b2e8_pix = 1; - } else { - s3->accel.b2e8_pix = 0; - } - s3_accel_out_pixtrans_w(s3, val); - } else { - s3->accel.short_stroke = val; - s3->accel.ssv_state = 1; + if (port != 0x9ee8 && port != 0x9d48) { + if (port == 0xb2e8 || port == 0xb148) { + s3->accel.b2e8_pix = 1; + } else { + s3->accel.b2e8_pix = 0; + } + s3_accel_out_pixtrans_w(s3, val); + } else { + s3->accel.short_stroke = val; + s3->accel.ssv_state = 1; - s3->accel.cx = s3->accel.cur_x; - if (s3->accel.cur_x_bit12) s3->accel.cx |= ~0xfff; - s3->accel.cy = s3->accel.cur_y; - if (s3->accel.cur_y_bit12) s3->accel.cy |= ~0xfff; + s3->accel.cx = s3->accel.cur_x; + if (s3->accel.cur_x_bit12) + s3->accel.cx |= ~0xfff; + s3->accel.cy = s3->accel.cur_y; + if (s3->accel.cur_y_bit12) + s3->accel.cy |= ~0xfff; - if (s3->accel.cmd & 0x1000) { - s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke & 0xff); - s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke >> 8); - } else { - s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke >> 8); - s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke & 0xff); - } - } + if (s3->accel.cmd & 0x1000) { + s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke & 0xff); + s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke >> 8); + } else { + s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke >> 8); + s3_short_stroke_start(-1, 0, 0xffffffff, 0, s3, s3->accel.short_stroke & 0xff); + } + } } - static void s3_accel_out_fifo_l(s3_t *s3, uint16_t port, uint32_t val) { - if (port == 0xb2e8 || port == 0xb148) { - s3->accel.b2e8_pix = 1; - } else { - s3->accel.b2e8_pix = 0; - } + if (port == 0xb2e8 || port == 0xb148) { + s3->accel.b2e8_pix = 1; + } else { + s3->accel.b2e8_pix = 0; + } - s3_accel_out_pixtrans_l(s3, val); + s3_accel_out_pixtrans_l(s3, val); } static void @@ -1382,2860 +1448,3065 @@ s3_accel_write_fifo(s3_t *s3, uint32_t addr, uint8_t val) svga_t *svga = &s3->svga; if (s3->packed_mmio) { - int addr_lo = addr & 1; - if (svga->crtc[0x53] & 0x08) { - if ((addr >= 0x08000) && (addr <= 0x0803f)) - s3_pci_write(0, addr & 0xff, val, s3); - } + int addr_lo = addr & 1; + if (svga->crtc[0x53] & 0x08) { + if ((addr >= 0x08000) && (addr <= 0x0803f)) + s3_pci_write(0, addr & 0xff, val, s3); + } - switch (addr & 0x1fffe) { - case 0x8100: addr = 0x82e8; break; /*ALT_CURXY*/ - case 0x8102: addr = 0x86e8; break; + switch (addr & 0x1fffe) { + case 0x8100: + addr = 0x82e8; + break; /*ALT_CURXY*/ + case 0x8102: + addr = 0x86e8; + break; - case 0x8104: addr = 0x82ea; break; /*ALT_CURXY2*/ - case 0x8106: addr = 0x86ea; break; + case 0x8104: + addr = 0x82ea; + break; /*ALT_CURXY2*/ + case 0x8106: + addr = 0x86ea; + break; - case 0x8108: addr = 0x8ae8; break; /*ALT_STEP*/ - case 0x810a: addr = 0x8ee8; break; + case 0x8108: + addr = 0x8ae8; + break; /*ALT_STEP*/ + case 0x810a: + addr = 0x8ee8; + break; - case 0x810c: addr = 0x8aea; break; /*ALT_STEP2*/ - case 0x810e: addr = 0x8eea; break; + case 0x810c: + addr = 0x8aea; + break; /*ALT_STEP2*/ + case 0x810e: + addr = 0x8eea; + break; - case 0x8110: addr = 0x92e8; break; /*ALT_ERR*/ - case 0x8112: addr = 0x92ee; break; + case 0x8110: + addr = 0x92e8; + break; /*ALT_ERR*/ + case 0x8112: + addr = 0x92ee; + break; - case 0x8118: addr = 0x9ae8; break; /*ALT_CMD*/ - case 0x811a: addr = 0x9aea; break; + case 0x8118: + addr = 0x9ae8; + break; /*ALT_CMD*/ + case 0x811a: + addr = 0x9aea; + break; - case 0x811c: addr = 0x9ee8; break; + case 0x811c: + addr = 0x9ee8; + break; - case 0x8120: case 0x8122: /*BKGD_COLOR*/ - WRITE8(addr, s3->accel.bkgd_color, val); - return; + case 0x8120: + case 0x8122: /*BKGD_COLOR*/ + WRITE8(addr, s3->accel.bkgd_color, val); + return; - case 0x8124: case 0x8126: /*FRGD_COLOR*/ - WRITE8(addr, s3->accel.frgd_color, val); - return; + case 0x8124: + case 0x8126: /*FRGD_COLOR*/ + WRITE8(addr, s3->accel.frgd_color, val); + return; - case 0x8128: case 0x812a: /*WRT_MASK*/ - WRITE8(addr, s3->accel.wrt_mask, val); - return; + case 0x8128: + case 0x812a: /*WRT_MASK*/ + WRITE8(addr, s3->accel.wrt_mask, val); + return; - case 0x812c: case 0x812e: /*RD_MASK*/ - WRITE8(addr, s3->accel.rd_mask, val); - return; + case 0x812c: + case 0x812e: /*RD_MASK*/ + WRITE8(addr, s3->accel.rd_mask, val); + return; - case 0x8130: case 0x8132: /*COLOR_CMP*/ - WRITE8(addr, s3->accel.color_cmp, val); - return; + case 0x8130: + case 0x8132: /*COLOR_CMP*/ + WRITE8(addr, s3->accel.color_cmp, val); + return; - case 0x8134: addr = 0xb6e8; break; /*ALT_MIX*/ - case 0x8136: addr = 0xbae8; break; + case 0x8134: + addr = 0xb6e8; + break; /*ALT_MIX*/ + case 0x8136: + addr = 0xbae8; + break; - case 0x8138: /*SCISSORS_T*/ - WRITE8(addr & 1, s3->accel.multifunc[1], val); - return; - case 0x813a: /*SCISSORS_L*/ - WRITE8(addr & 1, s3->accel.multifunc[2], val); - return; - case 0x813c: /*SCISSORS_B*/ - WRITE8(addr & 1, s3->accel.multifunc[3], val); - return; - case 0x813e: /*SCISSORS_R*/ - WRITE8(addr & 1, s3->accel.multifunc[4], val); - return; + case 0x8138: /*SCISSORS_T*/ + WRITE8(addr & 1, s3->accel.multifunc[1], val); + return; + case 0x813a: /*SCISSORS_L*/ + WRITE8(addr & 1, s3->accel.multifunc[2], val); + return; + case 0x813c: /*SCISSORS_B*/ + WRITE8(addr & 1, s3->accel.multifunc[3], val); + return; + case 0x813e: /*SCISSORS_R*/ + WRITE8(addr & 1, s3->accel.multifunc[4], val); + return; - case 0x8140: /*PIX_CNTL*/ - WRITE8(addr & 1, s3->accel.multifunc[0xa], val); - return; - case 0x8142: /*MULT_MISC2*/ - WRITE8(addr & 1, s3->accel.multifunc[0xd], val); - return; - case 0x8144: /*MULT_MISC*/ - WRITE8(addr & 1, s3->accel.multifunc[0xe], val); - return; - case 0x8146: /*READ_SEL*/ - WRITE8(addr & 1, s3->accel.multifunc[0xf], val); - return; + case 0x8140: /*PIX_CNTL*/ + WRITE8(addr & 1, s3->accel.multifunc[0xa], val); + return; + case 0x8142: /*MULT_MISC2*/ + WRITE8(addr & 1, s3->accel.multifunc[0xd], val); + return; + case 0x8144: /*MULT_MISC*/ + WRITE8(addr & 1, s3->accel.multifunc[0xe], val); + return; + case 0x8146: /*READ_SEL*/ + WRITE8(addr & 1, s3->accel.multifunc[0xf], val); + return; - case 0x8148: /*ALT_PCNT*/ - WRITE8(addr & 1, s3->accel.multifunc[0], val); - return; - case 0x814a: addr = 0x96e8; break; - case 0x814c: addr = 0x96ea; break; + case 0x8148: /*ALT_PCNT*/ + WRITE8(addr & 1, s3->accel.multifunc[0], val); + return; + case 0x814a: + addr = 0x96e8; + break; + case 0x814c: + addr = 0x96ea; + break; - case 0x8150: addr = 0xd2e8; break; + case 0x8150: + addr = 0xd2e8; + break; - case 0x8154: addr = 0x8ee8; break; - case 0x8156: addr = 0x96e8; break; + case 0x8154: + addr = 0x8ee8; + break; + case 0x8156: + addr = 0x96e8; + break; - case 0x8164: case 0x8166: - WRITE8(addr, s3->accel.pat_bg_color, val); - return; + case 0x8164: + case 0x8166: + WRITE8(addr, s3->accel.pat_bg_color, val); + return; - case 0x8168: addr = 0xeae8; break; - case 0x816a: addr = 0xeaea; break; + case 0x8168: + addr = 0xeae8; + break; + case 0x816a: + addr = 0xeaea; + break; - case 0x816c: case 0x816e: - WRITE8(addr, s3->accel.pat_fg_color, val); - return; - } - addr |= addr_lo; + case 0x816c: + case 0x816e: + WRITE8(addr, s3->accel.pat_fg_color, val); + return; + } + addr |= addr_lo; } if (svga->crtc[0x53] & 0x08) { - if ((addr & 0x1ffff) < 0x8000) { - if (s3->accel.cmd & 0x100) { - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(8, 1, val | (val << 8) | (val << 16) | (val << 24), 0, s3); - else - s3_accel_start(1, 1, 0xffffffff, val | (val << 8) | (val << 16) | (val << 24), s3); - } else - s3_accel_start(1, 1, 0xffffffff, val | (val << 8) | (val << 16) | (val << 24), s3); - } - } else { - switch (addr & 0x1ffff) { - case 0x83b0: case 0x83b1: case 0x83b2: case 0x83b3: - case 0x83b4: case 0x83b5: case 0x83b6: case 0x83b7: - case 0x83b8: case 0x83b9: case 0x83ba: case 0x83bb: - case 0x83bc: case 0x83bd: case 0x83be: case 0x83bf: - case 0x83c0: case 0x83c1: case 0x83c2: case 0x83c3: - case 0x83c4: case 0x83c5: case 0x83c6: case 0x83c7: - case 0x83c8: case 0x83c9: case 0x83ca: case 0x83cb: - case 0x83cc: case 0x83cd: case 0x83ce: case 0x83cf: - case 0x83d0: case 0x83d1: case 0x83d2: case 0x83d3: - case 0x83d4: case 0x83d5: case 0x83d6: case 0x83d7: - case 0x83d8: case 0x83d9: case 0x83da: case 0x83db: - case 0x83dc: case 0x83dd: case 0x83de: case 0x83df: - s3_out(addr & 0x3ff, val, s3); - break; - case 0x8504: - s3->subsys_stat &= ~val; - s3_update_irqs(s3); - break; - case 0x8505: - s3->subsys_cntl = val; - s3_update_irqs(s3); - break; - case 0x850c: - s3->accel.advfunc_cntl = val; - s3_updatemapping(s3); - break; - case 0xff20: - s3->serialport = val; - i2c_gpio_set(s3->i2c, !!(val & SERIAL_PORT_SCW), !!(val & SERIAL_PORT_SDW)); - break; - default: - s3_accel_out_fifo(s3, addr & 0xffff, val); - break; - } - } + if ((addr & 0x1ffff) < 0x8000) { + if (s3->accel.cmd & 0x100) { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(8, 1, val | (val << 8) | (val << 16) | (val << 24), 0, s3); + else + s3_accel_start(1, 1, 0xffffffff, val | (val << 8) | (val << 16) | (val << 24), s3); + } else + s3_accel_start(1, 1, 0xffffffff, val | (val << 8) | (val << 16) | (val << 24), s3); + } + } else { + switch (addr & 0x1ffff) { + case 0x83b0: + case 0x83b1: + case 0x83b2: + case 0x83b3: + case 0x83b4: + case 0x83b5: + case 0x83b6: + case 0x83b7: + case 0x83b8: + case 0x83b9: + case 0x83ba: + case 0x83bb: + case 0x83bc: + case 0x83bd: + case 0x83be: + case 0x83bf: + case 0x83c0: + case 0x83c1: + case 0x83c2: + case 0x83c3: + case 0x83c4: + case 0x83c5: + case 0x83c6: + case 0x83c7: + case 0x83c8: + case 0x83c9: + case 0x83ca: + case 0x83cb: + case 0x83cc: + case 0x83cd: + case 0x83ce: + case 0x83cf: + case 0x83d0: + case 0x83d1: + case 0x83d2: + case 0x83d3: + case 0x83d4: + case 0x83d5: + case 0x83d6: + case 0x83d7: + case 0x83d8: + case 0x83d9: + case 0x83da: + case 0x83db: + case 0x83dc: + case 0x83dd: + case 0x83de: + case 0x83df: + s3_out(addr & 0x3ff, val, s3); + break; + case 0x8504: + s3->subsys_stat &= ~val; + s3_update_irqs(s3); + break; + case 0x8505: + s3->subsys_cntl = val; + s3_update_irqs(s3); + break; + case 0x850c: + s3->accel.advfunc_cntl = val; + s3_updatemapping(s3); + break; + case 0xff20: + s3->serialport = val; + i2c_gpio_set(s3->i2c, !!(val & SERIAL_PORT_SCW), !!(val & SERIAL_PORT_SDW)); + break; + default: + s3_accel_out_fifo(s3, addr & 0xffff, val); + break; + } + } } else { - if (addr & 0x8000) { - s3_accel_out_fifo(s3, addr & 0xffff, val); - } else { - if (s3->accel.cmd & 0x100) { - if ((s3->accel.cmd & 0x600) == 0x200) { - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(16, 1, val | (val << 8) | (val << 16) | (val << 24), 0, s3); - else - s3_accel_start(2, 1, 0xffffffff, val | (val << 8) | (val << 16) | (val << 24), s3); - } else - s3_accel_start(2, 1, 0xffffffff, val | (val << 8) | (val << 16) | (val << 24), s3); - } else { - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(8, 1, val | (val << 8) | (val << 16) | (val << 24), 0, s3); - else - s3_accel_start(1, 1, 0xffffffff, val | (val << 8) | (val << 16) | (val << 24), s3); - } else - s3_accel_start(1, 1, 0xffffffff, val | (val << 8) | (val << 16) | (val << 24), s3); - } - } - } + if (addr & 0x8000) { + s3_accel_out_fifo(s3, addr & 0xffff, val); + } else { + if (s3->accel.cmd & 0x100) { + if ((s3->accel.cmd & 0x600) == 0x200) { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(16, 1, val | (val << 8) | (val << 16) | (val << 24), 0, s3); + else + s3_accel_start(2, 1, 0xffffffff, val | (val << 8) | (val << 16) | (val << 24), s3); + } else + s3_accel_start(2, 1, 0xffffffff, val | (val << 8) | (val << 16) | (val << 24), s3); + } else { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(8, 1, val | (val << 8) | (val << 16) | (val << 24), 0, s3); + else + s3_accel_start(1, 1, 0xffffffff, val | (val << 8) | (val << 16) | (val << 24), s3); + } else + s3_accel_start(1, 1, 0xffffffff, val | (val << 8) | (val << 16) | (val << 24), s3); + } + } + } } } static void s3_accel_write_fifo_w(s3_t *s3, uint32_t addr, uint16_t val) { - svga_t *svga = &s3->svga; + svga_t *svga = &s3->svga; - if (svga->crtc[0x53] & 0x08) { - if ((addr & 0x1fffe) < 0x8000) { - s3_accel_out_pixtrans_w(s3, val); - } else { - switch (addr & 0x1fffe) { - case 0x83d4: - default: - s3_accel_write_fifo(s3, addr, val); - s3_accel_write_fifo(s3, addr + 1, val >> 8); - break; - case 0xff20: - s3_accel_write_fifo(s3, addr, val); - break; - case 0x811c: - s3_accel_out_fifo_w(s3, 0x9ee8, val); - break; - } - } - } else { - if (addr & 0x8000) { - if (addr == 0x811c) - s3_accel_out_fifo_w(s3, 0x9ee8, val); - else { - if (addr == 0xe2e8 || addr == 0xe2ea) { - if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI) - s3_accel_out_pixtrans_w(s3, val); - else { - s3_accel_write_fifo(s3, addr, val); - s3_accel_write_fifo(s3, addr + 1, val >> 8); - } - } else { - s3_accel_write_fifo(s3, addr, val); - s3_accel_write_fifo(s3, addr + 1, val >> 8); - } - } - } else { - s3_accel_out_pixtrans_w(s3, val); - } - } + if (svga->crtc[0x53] & 0x08) { + if ((addr & 0x1fffe) < 0x8000) { + s3_accel_out_pixtrans_w(s3, val); + } else { + switch (addr & 0x1fffe) { + case 0x83d4: + default: + s3_accel_write_fifo(s3, addr, val); + s3_accel_write_fifo(s3, addr + 1, val >> 8); + break; + case 0xff20: + s3_accel_write_fifo(s3, addr, val); + break; + case 0x811c: + s3_accel_out_fifo_w(s3, 0x9ee8, val); + break; + } + } + } else { + if (addr & 0x8000) { + if (addr == 0x811c) + s3_accel_out_fifo_w(s3, 0x9ee8, val); + else { + if (addr == 0xe2e8 || addr == 0xe2ea) { + if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI) + s3_accel_out_pixtrans_w(s3, val); + else { + s3_accel_write_fifo(s3, addr, val); + s3_accel_write_fifo(s3, addr + 1, val >> 8); + } + } else { + s3_accel_write_fifo(s3, addr, val); + s3_accel_write_fifo(s3, addr + 1, val >> 8); + } + } + } else { + s3_accel_out_pixtrans_w(s3, val); + } + } } - static void s3_accel_write_fifo_l(s3_t *s3, uint32_t addr, uint32_t val) { svga_t *svga = &s3->svga; if (svga->crtc[0x53] & 0x08) { - if ((addr & 0x1fffc) < 0x8000 || ((addr & 0x1fffc) >= 0x10000 && (addr & 0x1fffc) < 0x18000)) { - if ((addr & 0x1fffc) >= 0x10000 && (addr & 0x1fffc) < 0x18000) { - s3_visionx68_video_engine_op(val, s3); - } else if ((addr & 0x1fffc) < 0x8000) { - s3_accel_out_pixtrans_l(s3, val); - } - } else { - switch (addr & 0x1fffc) { - case 0x8180: - s3->streams.pri_ctrl = val; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x8184: - s3->streams.chroma_ctrl = val; - break; - case 0x8190: - s3->streams.sec_ctrl = val; - s3->streams.dda_horiz_accumulator = val & 0xfff; - if (val & (1 << 11)) - s3->streams.dda_horiz_accumulator |= 0xfffff800; - s3->streams.sdif = (val >> 24) & 7; - break; - case 0x8194: - s3->streams.chroma_upper_bound = val; - break; - case 0x8198: - s3->streams.sec_filter = val; - s3->streams.k1_horiz_scale = val & 0x7ff; - if (val & (1 << 10)) - s3->streams.k1_horiz_scale |= 0xfffff800; - s3->streams.k2_horiz_scale = (val >> 16) & 0x7ff; - if ((val >> 16) & (1 << 10)) - s3->streams.k2_horiz_scale |= 0xfffff800; - break; - case 0x81a0: - s3->streams.blend_ctrl = val; - break; - case 0x81c0: - s3->streams.pri_fb0 = val & 0x3fffff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81c4: - s3->streams.pri_fb1 = val & 0x3fffff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81c8: - s3->streams.pri_stride = val & 0xfff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81cc: - s3->streams.buffer_ctrl = val; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81d0: - s3->streams.sec_fb0 = val; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81d4: - s3->streams.sec_fb1 = val; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81d8: - s3->streams.sec_stride = val; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81dc: - s3->streams.overlay_ctrl = val; - break; - case 0x81e0: - s3->streams.k1_vert_scale = val & 0x7ff; - if (val & (1 << 10)) - s3->streams.k1_vert_scale |= 0xfffff800; - break; - case 0x81e4: - s3->streams.k2_vert_scale = val & 0x7ff; - if (val & (1 << 10)) - s3->streams.k2_vert_scale |= 0xfffff800; - break; - case 0x81e8: - s3->streams.dda_vert_accumulator = val & 0xfff; - if (val & (1 << 11)) - s3->streams.dda_vert_accumulator |= 0xfffff800; - break; - case 0x81ec: - s3->streams.fifo_ctrl = val; - break; - case 0x81f0: - s3->streams.pri_start = val; - s3->streams.pri_x = (val >> 16) & 0x7ff; - s3->streams.pri_y = val & 0x7ff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81f4: - s3->streams.pri_size = val; - s3->streams.pri_w = (val >> 16) & 0x7ff; - s3->streams.pri_h = val & 0x7ff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81f8: - s3->streams.sec_start = val; - s3->streams.sec_x = (val >> 16) & 0x7ff; - s3->streams.sec_y = val & 0x7ff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81fc: - s3->streams.sec_size = val; - s3->streams.sec_w = (val >> 16) & 0x7ff; - s3->streams.sec_h = val & 0x7ff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; + if ((addr & 0x1fffc) < 0x8000 || ((addr & 0x1fffc) >= 0x10000 && (addr & 0x1fffc) < 0x18000)) { + if ((addr & 0x1fffc) >= 0x10000 && (addr & 0x1fffc) < 0x18000) { + s3_visionx68_video_engine_op(val, s3); + } else if ((addr & 0x1fffc) < 0x8000) { + s3_accel_out_pixtrans_l(s3, val); + } + } else { + switch (addr & 0x1fffc) { + case 0x8180: + s3->streams.pri_ctrl = val; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x8184: + s3->streams.chroma_ctrl = val; + break; + case 0x8190: + s3->streams.sec_ctrl = val; + s3->streams.dda_horiz_accumulator = val & 0xfff; + if (val & (1 << 11)) + s3->streams.dda_horiz_accumulator |= 0xfffff800; + s3->streams.sdif = (val >> 24) & 7; + break; + case 0x8194: + s3->streams.chroma_upper_bound = val; + break; + case 0x8198: + s3->streams.sec_filter = val; + s3->streams.k1_horiz_scale = val & 0x7ff; + if (val & (1 << 10)) + s3->streams.k1_horiz_scale |= 0xfffff800; + s3->streams.k2_horiz_scale = (val >> 16) & 0x7ff; + if ((val >> 16) & (1 << 10)) + s3->streams.k2_horiz_scale |= 0xfffff800; + break; + case 0x81a0: + s3->streams.blend_ctrl = val; + break; + case 0x81c0: + s3->streams.pri_fb0 = val & 0x3fffff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81c4: + s3->streams.pri_fb1 = val & 0x3fffff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81c8: + s3->streams.pri_stride = val & 0xfff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81cc: + s3->streams.buffer_ctrl = val; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81d0: + s3->streams.sec_fb0 = val; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81d4: + s3->streams.sec_fb1 = val; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81d8: + s3->streams.sec_stride = val; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81dc: + s3->streams.overlay_ctrl = val; + break; + case 0x81e0: + s3->streams.k1_vert_scale = val & 0x7ff; + if (val & (1 << 10)) + s3->streams.k1_vert_scale |= 0xfffff800; + break; + case 0x81e4: + s3->streams.k2_vert_scale = val & 0x7ff; + if (val & (1 << 10)) + s3->streams.k2_vert_scale |= 0xfffff800; + break; + case 0x81e8: + s3->streams.dda_vert_accumulator = val & 0xfff; + if (val & (1 << 11)) + s3->streams.dda_vert_accumulator |= 0xfffff800; + break; + case 0x81ec: + s3->streams.fifo_ctrl = val; + break; + case 0x81f0: + s3->streams.pri_start = val; + s3->streams.pri_x = (val >> 16) & 0x7ff; + s3->streams.pri_y = val & 0x7ff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81f4: + s3->streams.pri_size = val; + s3->streams.pri_w = (val >> 16) & 0x7ff; + s3->streams.pri_h = val & 0x7ff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81f8: + s3->streams.sec_start = val; + s3->streams.sec_x = (val >> 16) & 0x7ff; + s3->streams.sec_y = val & 0x7ff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81fc: + s3->streams.sec_size = val; + s3->streams.sec_w = (val >> 16) & 0x7ff; + s3->streams.sec_h = val & 0x7ff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; - case 0x8504: - s3->subsys_stat &= ~(val & 0xff); - s3->subsys_cntl = (val >> 8); - s3_update_irqs(s3); - break; + case 0x8504: + s3->subsys_stat &= ~(val & 0xff); + s3->subsys_cntl = (val >> 8); + s3_update_irqs(s3); + break; - case 0x850c: - s3->accel.advfunc_cntl = val & 0xff; - s3_updatemapping(s3); - break; + case 0x850c: + s3->accel.advfunc_cntl = val & 0xff; + s3_updatemapping(s3); + break; - case 0xff20: - s3_accel_write_fifo(s3, addr, val); - break; + case 0xff20: + s3_accel_write_fifo(s3, addr, val); + break; - case 0x18080: - s3->videoengine.nop = 1; - break; + case 0x18080: + s3->videoengine.nop = 1; + break; - case 0x18088: - s3->videoengine.cntl = val; - s3->videoengine.dda_init_accumulator = val & 0xfff; - s3->videoengine.odf = (val >> 16) & 7; - s3->videoengine.yuv = !!(val & (1 << 19)); - s3->videoengine.idf = (val >> 20) & 7; - s3->videoengine.dither = !!(val & (1 << 29)); - s3->videoengine.dm_index = (val >> 23) & 7; - break; + case 0x18088: + s3->videoengine.cntl = val; + s3->videoengine.dda_init_accumulator = val & 0xfff; + s3->videoengine.odf = (val >> 16) & 7; + s3->videoengine.yuv = !!(val & (1 << 19)); + s3->videoengine.idf = (val >> 20) & 7; + s3->videoengine.dither = !!(val & (1 << 29)); + s3->videoengine.dm_index = (val >> 23) & 7; + break; - case 0x1808c: - s3->videoengine.stretch_filt_const = val; - s3->videoengine.k2 = val & 0x7ff; - s3->videoengine.k1 = (val >> 16) & 0x7ff; - s3->videoengine.host_data = !!(val & (1 << 30)); - s3->videoengine.scale_down = !!(val & (1 << 31)); - break; + case 0x1808c: + s3->videoengine.stretch_filt_const = val; + s3->videoengine.k2 = val & 0x7ff; + s3->videoengine.k1 = (val >> 16) & 0x7ff; + s3->videoengine.host_data = !!(val & (1 << 30)); + s3->videoengine.scale_down = !!(val & (1 << 31)); + break; - case 0x18090: - s3->videoengine.src_dst_step = val; - s3->videoengine.dst_step = val & 0x1fff; - s3->videoengine.src_step = (val >> 16) & 0x1fff; - break; + case 0x18090: + s3->videoengine.src_dst_step = val; + s3->videoengine.dst_step = val & 0x1fff; + s3->videoengine.src_step = (val >> 16) & 0x1fff; + break; - case 0x18094: - s3->videoengine.crop = val; - s3->videoengine.len = val & 0xfff; - s3->videoengine.start = (val >> 16) & 0xfff; - s3->videoengine.input = 1; - break; + case 0x18094: + s3->videoengine.crop = val; + s3->videoengine.len = val & 0xfff; + s3->videoengine.start = (val >> 16) & 0xfff; + s3->videoengine.input = 1; + break; - case 0x18098: - s3->videoengine.src_base = val & 0xffffff; - break; + case 0x18098: + s3->videoengine.src_base = val & 0xffffff; + break; - case 0x1809c: - s3->videoengine.dest_base = val & 0xffffff; - break; + case 0x1809c: + s3->videoengine.dest_base = val & 0xffffff; + break; - default: - s3_accel_write_fifo(s3, addr, val); - s3_accel_write_fifo(s3, addr + 1, val >> 8); - s3_accel_write_fifo(s3, addr + 2, val >> 16); - s3_accel_write_fifo(s3, addr + 3, val >> 24); - break; - } - } + default: + s3_accel_write_fifo(s3, addr, val); + s3_accel_write_fifo(s3, addr + 1, val >> 8); + s3_accel_write_fifo(s3, addr + 2, val >> 16); + s3_accel_write_fifo(s3, addr + 3, val >> 24); + break; + } + } } else { - if (addr & 0x8000) { - if (addr == 0xe2e8) { - if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI) - s3_accel_out_pixtrans_l(s3, val); - else { - s3_accel_write_fifo(s3, addr, val); - s3_accel_write_fifo(s3, addr + 1, val >> 8); - s3_accel_write_fifo(s3, addr + 2, val >> 16); - s3_accel_write_fifo(s3, addr + 3, val >> 24); - } - } else { - s3_accel_write_fifo(s3, addr, val); - s3_accel_write_fifo(s3, addr + 1, val >> 8); - s3_accel_write_fifo(s3, addr + 2, val >> 16); - s3_accel_write_fifo(s3, addr + 3, val >> 24); - } - } else { - s3_accel_out_pixtrans_l(s3, val); - } + if (addr & 0x8000) { + if (addr == 0xe2e8) { + if (s3->chip == S3_86C928 || s3->chip == S3_86C928PCI) + s3_accel_out_pixtrans_l(s3, val); + else { + s3_accel_write_fifo(s3, addr, val); + s3_accel_write_fifo(s3, addr + 1, val >> 8); + s3_accel_write_fifo(s3, addr + 2, val >> 16); + s3_accel_write_fifo(s3, addr + 3, val >> 24); + } + } else { + s3_accel_write_fifo(s3, addr, val); + s3_accel_write_fifo(s3, addr + 1, val >> 8); + s3_accel_write_fifo(s3, addr + 2, val >> 16); + s3_accel_write_fifo(s3, addr + 3, val >> 24); + } + } else { + s3_accel_out_pixtrans_l(s3, val); + } } } - static void s3_vblank_start(svga_t *svga) { - s3_t *s3 = (s3_t *)svga->p; + s3_t *s3 = (s3_t *) svga->p; - s3->subsys_stat |= INT_VSY; - s3_update_irqs(s3); + s3->subsys_stat |= INT_VSY; + s3_update_irqs(s3); } - static uint32_t s3_hwcursor_convert_addr(svga_t *svga) { if ((svga->bpp == 8) && ((svga->gdcreg[5] & 0x60) >= 0x20) && (svga->crtc[0x45] & 0x10)) { - if ((svga->gdcreg[5] & 0x60) >= 0x40) - return ((svga->hwcursor_latch.addr & 0xfffff1ff) | ((svga->hwcursor_latch.addr & 0x200) << 2)) | 0x600; - else if ((svga->gdcreg[5] & 0x60) == 0x20) - return ((svga->hwcursor_latch.addr & 0xfffff0ff) | ((svga->hwcursor_latch.addr & 0x300) << 2)) | 0x300; - else - return svga->hwcursor_latch.addr; + if ((svga->gdcreg[5] & 0x60) >= 0x40) + return ((svga->hwcursor_latch.addr & 0xfffff1ff) | ((svga->hwcursor_latch.addr & 0x200) << 2)) | 0x600; + else if ((svga->gdcreg[5] & 0x60) == 0x20) + return ((svga->hwcursor_latch.addr & 0xfffff0ff) | ((svga->hwcursor_latch.addr & 0x300) << 2)) | 0x300; + else + return svga->hwcursor_latch.addr; } else - return svga->hwcursor_latch.addr; + return svga->hwcursor_latch.addr; } - - static void s3_hwcursor_draw(svga_t *svga, int displine) { - s3_t *s3 = (s3_t *)svga->p; - int x, shift = 1; - int width = 16; - uint16_t dat[2]; - int xx; - int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff; - uint32_t fg, bg; - uint32_t real_addr; - uint32_t remapped_addr; + s3_t *s3 = (s3_t *) svga->p; + int x, shift = 1; + int width = 16; + uint16_t dat[2]; + int xx; + int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff; + uint32_t fg, bg; + uint32_t real_addr; + uint32_t remapped_addr; - switch (svga->bpp) - { - case 15: - fg = video_15to32[s3->hwc_fg_col & 0xffff]; - bg = video_15to32[s3->hwc_bg_col & 0xffff]; - if (s3->chip >= S3_86C928 && s3->chip <= S3_86C805) { - if (s3->card_type != S3_MIROCRYSTAL10SD_805 && s3->card_type != S3_MIROCRYSTAL8S_805) { - if (!(svga->crtc[0x45] & 0x04)) { - shift = 2; - width = 8; - } - } - } - break; - - case 16: - fg = video_16to32[s3->hwc_fg_col & 0xffff]; - bg = video_16to32[s3->hwc_bg_col & 0xffff]; - if (s3->chip >= S3_86C928 && s3->chip <= S3_86C805) { - if (s3->card_type != S3_MIROCRYSTAL10SD_805 && s3->card_type != S3_MIROCRYSTAL8S_805) { - if (!(svga->crtc[0x45] & 0x04)) { - shift = 2; - width = 8; - } - } else if (s3->card_type == S3_MIROCRYSTAL10SD_805) { - if (!(svga->crtc[0x45] & 0x04)) { - offset <<= 1; - } - } - } - break; - - case 24: - fg = s3->hwc_fg_col; - bg = s3->hwc_bg_col; - break; - - case 32: - fg = s3->hwc_fg_col; - bg = s3->hwc_bg_col; - break; - - default: - if (s3->chip >= S3_TRIO32) - { - fg = svga->pallook[s3->hwc_fg_col & 0xff]; - bg = svga->pallook[s3->hwc_bg_col & 0xff]; - } - else - { - fg = svga->pallook[svga->crtc[0xe]]; - bg = svga->pallook[svga->crtc[0xf]]; - } - break; - } - - if (svga->interlace && svga->hwcursor_oddeven) - svga->hwcursor_latch.addr += 16; - - real_addr = s3_hwcursor_convert_addr(svga); - - for (x = 0; x < 64; x += 16) - { - remapped_addr = dword_remap(svga, real_addr); - - dat[0] = (svga->vram[remapped_addr & s3->vram_mask] << 8) | svga->vram[(remapped_addr + 1) & s3->vram_mask]; - dat[1] = (svga->vram[(remapped_addr + 2) & s3->vram_mask] << 8) | svga->vram[(remapped_addr + 3) & s3->vram_mask]; - - if (svga->crtc[0x55] & 0x10) { - /*X11*/ - for (xx = 0; xx < 16; xx++) { - if (offset >= 0) { - if (dat[0] & 0x8000) - buffer32->line[displine][offset + svga->x_add] = (dat[1] & 0x8000) ? fg : bg; - } - - offset++; - dat[0] <<= shift; - dat[1] <<= shift; - } - } else { - /*Windows*/ - for (xx = 0; xx < width; xx++) { - if (offset >= 0) { - if (!(dat[0] & 0x8000)) - buffer32->line[displine][offset + svga->x_add] = (dat[1] & 0x8000) ? fg : bg; - else if (dat[1] & 0x8000) - buffer32->line[displine][offset + svga->x_add] ^= 0xffffff; - } - - offset++; - dat[0] <<= shift; - dat[1] <<= shift; - } + switch (svga->bpp) { + case 15: + fg = video_15to32[s3->hwc_fg_col & 0xffff]; + bg = video_15to32[s3->hwc_bg_col & 0xffff]; + if (s3->chip >= S3_86C928 && s3->chip <= S3_86C805) { + if (s3->card_type != S3_MIROCRYSTAL10SD_805 && s3->card_type != S3_MIROCRYSTAL8S_805) { + if (!(svga->crtc[0x45] & 0x04)) { + shift = 2; + width = 8; + } } - svga->hwcursor_latch.addr += 4; - real_addr = s3_hwcursor_convert_addr(svga); - } - if (svga->interlace && !svga->hwcursor_oddeven) - svga->hwcursor_latch.addr += 16; + } + break; + + case 16: + fg = video_16to32[s3->hwc_fg_col & 0xffff]; + bg = video_16to32[s3->hwc_bg_col & 0xffff]; + if (s3->chip >= S3_86C928 && s3->chip <= S3_86C805) { + if (s3->card_type != S3_MIROCRYSTAL10SD_805 && s3->card_type != S3_MIROCRYSTAL8S_805) { + if (!(svga->crtc[0x45] & 0x04)) { + shift = 2; + width = 8; + } + } else if (s3->card_type == S3_MIROCRYSTAL10SD_805) { + if (!(svga->crtc[0x45] & 0x04)) { + offset <<= 1; + } + } + } + break; + + case 24: + fg = s3->hwc_fg_col; + bg = s3->hwc_bg_col; + break; + + case 32: + fg = s3->hwc_fg_col; + bg = s3->hwc_bg_col; + break; + + default: + if (s3->chip >= S3_TRIO32) { + fg = svga->pallook[s3->hwc_fg_col & 0xff]; + bg = svga->pallook[s3->hwc_bg_col & 0xff]; + } else { + fg = svga->pallook[svga->crtc[0xe]]; + bg = svga->pallook[svga->crtc[0xf]]; + } + break; + } + + if (svga->interlace && svga->hwcursor_oddeven) + svga->hwcursor_latch.addr += 16; + + real_addr = s3_hwcursor_convert_addr(svga); + + for (x = 0; x < 64; x += 16) { + remapped_addr = dword_remap(svga, real_addr); + + dat[0] = (svga->vram[remapped_addr & s3->vram_mask] << 8) | svga->vram[(remapped_addr + 1) & s3->vram_mask]; + dat[1] = (svga->vram[(remapped_addr + 2) & s3->vram_mask] << 8) | svga->vram[(remapped_addr + 3) & s3->vram_mask]; + + if (svga->crtc[0x55] & 0x10) { + /*X11*/ + for (xx = 0; xx < 16; xx++) { + if (offset >= 0) { + if (dat[0] & 0x8000) + buffer32->line[displine][offset + svga->x_add] = (dat[1] & 0x8000) ? fg : bg; + } + + offset++; + dat[0] <<= shift; + dat[1] <<= shift; + } + } else { + /*Windows*/ + for (xx = 0; xx < width; xx++) { + if (offset >= 0) { + if (!(dat[0] & 0x8000)) + buffer32->line[displine][offset + svga->x_add] = (dat[1] & 0x8000) ? fg : bg; + else if (dat[1] & 0x8000) + buffer32->line[displine][offset + svga->x_add] ^= 0xffffff; + } + + offset++; + dat[0] <<= shift; + dat[1] <<= shift; + } + } + svga->hwcursor_latch.addr += 4; + real_addr = s3_hwcursor_convert_addr(svga); + } + if (svga->interlace && !svga->hwcursor_oddeven) + svga->hwcursor_latch.addr += 16; } -#define CLAMP(x) do \ - { \ - if ((x) & ~0xff) \ - x = ((x) < 0) ? 0 : 0xff; \ - } \ - while (0) +#define CLAMP(x) \ + do { \ + if ((x) & ~0xff) \ + x = ((x) < 0) ? 0 : 0xff; \ + } while (0) -#define DECODE_YCbCr() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 2; c++) \ - { \ - uint8_t y1, y2; \ - int8_t Cr, Cb; \ - int dR, dG, dB; \ - \ - y1 = src[0]; \ - Cr = src[1] - 0x80; \ - y2 = src[2]; \ - Cb = src[3] - 0x80; \ - src += 4; \ - \ - dR = (359*Cr) >> 8; \ - dG = (88*Cb + 183*Cr) >> 8; \ - dB = (453*Cb) >> 8; \ - \ - r[x_write] = y1 + dR; \ - CLAMP(r[x_write]); \ - g[x_write] = y1 - dG; \ - CLAMP(g[x_write]); \ - b[x_write] = y1 + dB; \ - CLAMP(b[x_write]); \ - \ - r[x_write+1] = y2 + dR; \ - CLAMP(r[x_write+1]); \ - g[x_write+1] = y2 - dG; \ - CLAMP(g[x_write+1]); \ - b[x_write+1] = y2 + dB; \ - CLAMP(b[x_write+1]); \ - \ - x_write = (x_write + 2) & 7; \ - } \ - } while (0) +#define DECODE_YCbCr() \ + do { \ + int c; \ + \ + for (c = 0; c < 2; c++) { \ + uint8_t y1, y2; \ + int8_t Cr, Cb; \ + int dR, dG, dB; \ + \ + y1 = src[0]; \ + Cr = src[1] - 0x80; \ + y2 = src[2]; \ + Cb = src[3] - 0x80; \ + src += 4; \ + \ + dR = (359 * Cr) >> 8; \ + dG = (88 * Cb + 183 * Cr) >> 8; \ + dB = (453 * Cb) >> 8; \ + \ + r[x_write] = y1 + dR; \ + CLAMP(r[x_write]); \ + g[x_write] = y1 - dG; \ + CLAMP(g[x_write]); \ + b[x_write] = y1 + dB; \ + CLAMP(b[x_write]); \ + \ + r[x_write + 1] = y2 + dR; \ + CLAMP(r[x_write + 1]); \ + g[x_write + 1] = y2 - dG; \ + CLAMP(g[x_write + 1]); \ + b[x_write + 1] = y2 + dB; \ + CLAMP(b[x_write + 1]); \ + \ + x_write = (x_write + 2) & 7; \ + } \ + } while (0) /*Both YUV formats are untested*/ -#define DECODE_YUV211() \ - do \ - { \ - uint8_t y1, y2, y3, y4; \ - int8_t U, V; \ - int dR, dG, dB; \ - \ - U = src[0] - 0x80; \ - y1 = (298 * (src[1] - 16)) >> 8; \ - y2 = (298 * (src[2] - 16)) >> 8; \ - V = src[3] - 0x80; \ - y3 = (298 * (src[4] - 16)) >> 8; \ - y4 = (298 * (src[5] - 16)) >> 8; \ - src += 6; \ - \ - dR = (309*V) >> 8; \ - dG = (100*U + 208*V) >> 8; \ - dB = (516*U) >> 8; \ - \ - r[x_write] = y1 + dR; \ - CLAMP(r[x_write]); \ - g[x_write] = y1 - dG; \ - CLAMP(g[x_write]); \ - b[x_write] = y1 + dB; \ - CLAMP(b[x_write]); \ - \ - r[x_write+1] = y2 + dR; \ - CLAMP(r[x_write+1]); \ - g[x_write+1] = y2 - dG; \ - CLAMP(g[x_write+1]); \ - b[x_write+1] = y2 + dB; \ - CLAMP(b[x_write+1]); \ - \ - r[x_write+2] = y3 + dR; \ - CLAMP(r[x_write+2]); \ - g[x_write+2] = y3 - dG; \ - CLAMP(g[x_write+2]); \ - b[x_write+2] = y3 + dB; \ - CLAMP(b[x_write+2]); \ - \ - r[x_write+3] = y4 + dR; \ - CLAMP(r[x_write+3]); \ - g[x_write+3] = y4 - dG; \ - CLAMP(g[x_write+3]); \ - b[x_write+3] = y4 + dB; \ - CLAMP(b[x_write+3]); \ - \ - x_write = (x_write + 4) & 7; \ - } while (0) +#define DECODE_YUV211() \ + do { \ + uint8_t y1, y2, y3, y4; \ + int8_t U, V; \ + int dR, dG, dB; \ + \ + U = src[0] - 0x80; \ + y1 = (298 * (src[1] - 16)) >> 8; \ + y2 = (298 * (src[2] - 16)) >> 8; \ + V = src[3] - 0x80; \ + y3 = (298 * (src[4] - 16)) >> 8; \ + y4 = (298 * (src[5] - 16)) >> 8; \ + src += 6; \ + \ + dR = (309 * V) >> 8; \ + dG = (100 * U + 208 * V) >> 8; \ + dB = (516 * U) >> 8; \ + \ + r[x_write] = y1 + dR; \ + CLAMP(r[x_write]); \ + g[x_write] = y1 - dG; \ + CLAMP(g[x_write]); \ + b[x_write] = y1 + dB; \ + CLAMP(b[x_write]); \ + \ + r[x_write + 1] = y2 + dR; \ + CLAMP(r[x_write + 1]); \ + g[x_write + 1] = y2 - dG; \ + CLAMP(g[x_write + 1]); \ + b[x_write + 1] = y2 + dB; \ + CLAMP(b[x_write + 1]); \ + \ + r[x_write + 2] = y3 + dR; \ + CLAMP(r[x_write + 2]); \ + g[x_write + 2] = y3 - dG; \ + CLAMP(g[x_write + 2]); \ + b[x_write + 2] = y3 + dB; \ + CLAMP(b[x_write + 2]); \ + \ + r[x_write + 3] = y4 + dR; \ + CLAMP(r[x_write + 3]); \ + g[x_write + 3] = y4 - dG; \ + CLAMP(g[x_write + 3]); \ + b[x_write + 3] = y4 + dB; \ + CLAMP(b[x_write + 3]); \ + \ + x_write = (x_write + 4) & 7; \ + } while (0) -#define DECODE_YUV422() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 2; c++) \ - { \ - uint8_t y1, y2; \ - int8_t U, V; \ - int dR, dG, dB; \ - \ - U = src[0] - 0x80; \ - y1 = (298 * (src[1] - 16)) >> 8; \ - V = src[2] - 0x80; \ - y2 = (298 * (src[3] - 16)) >> 8; \ - src += 4; \ - \ - dR = (309*V) >> 8; \ - dG = (100*U + 208*V) >> 8; \ - dB = (516*U) >> 8; \ - \ - r[x_write] = y1 + dR; \ - CLAMP(r[x_write]); \ - g[x_write] = y1 - dG; \ - CLAMP(g[x_write]); \ - b[x_write] = y1 + dB; \ - CLAMP(b[x_write]); \ - \ - r[x_write+1] = y2 + dR; \ - CLAMP(r[x_write+1]); \ - g[x_write+1] = y2 - dG; \ - CLAMP(g[x_write+1]); \ - b[x_write+1] = y2 + dB; \ - CLAMP(b[x_write+1]); \ - \ - x_write = (x_write + 2) & 7; \ - } \ - } while (0) +#define DECODE_YUV422() \ + do { \ + int c; \ + \ + for (c = 0; c < 2; c++) { \ + uint8_t y1, y2; \ + int8_t U, V; \ + int dR, dG, dB; \ + \ + U = src[0] - 0x80; \ + y1 = (298 * (src[1] - 16)) >> 8; \ + V = src[2] - 0x80; \ + y2 = (298 * (src[3] - 16)) >> 8; \ + src += 4; \ + \ + dR = (309 * V) >> 8; \ + dG = (100 * U + 208 * V) >> 8; \ + dB = (516 * U) >> 8; \ + \ + r[x_write] = y1 + dR; \ + CLAMP(r[x_write]); \ + g[x_write] = y1 - dG; \ + CLAMP(g[x_write]); \ + b[x_write] = y1 + dB; \ + CLAMP(b[x_write]); \ + \ + r[x_write + 1] = y2 + dR; \ + CLAMP(r[x_write + 1]); \ + g[x_write + 1] = y2 - dG; \ + CLAMP(g[x_write + 1]); \ + b[x_write + 1] = y2 + dB; \ + CLAMP(b[x_write + 1]); \ + \ + x_write = (x_write + 2) & 7; \ + } \ + } while (0) -#define DECODE_RGB555() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 4; c++) \ - { \ - uint16_t dat; \ - \ - dat = *(uint16_t *)src; \ - src += 2; \ - \ - r[x_write + c] = ((dat & 0x001f) << 3) | ((dat & 0x001f) >> 2); \ - g[x_write + c] = ((dat & 0x03e0) >> 2) | ((dat & 0x03e0) >> 7); \ - b[x_write + c] = ((dat & 0x7c00) >> 7) | ((dat & 0x7c00) >> 12); \ - } \ - x_write = (x_write + 4) & 7; \ - } while (0) +#define DECODE_RGB555() \ + do { \ + int c; \ + \ + for (c = 0; c < 4; c++) { \ + uint16_t dat; \ + \ + dat = *(uint16_t *) src; \ + src += 2; \ + \ + r[x_write + c] = ((dat & 0x001f) << 3) | ((dat & 0x001f) >> 2); \ + g[x_write + c] = ((dat & 0x03e0) >> 2) | ((dat & 0x03e0) >> 7); \ + b[x_write + c] = ((dat & 0x7c00) >> 7) | ((dat & 0x7c00) >> 12); \ + } \ + x_write = (x_write + 4) & 7; \ + } while (0) -#define DECODE_RGB565() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 4; c++) \ - { \ - uint16_t dat; \ - \ - dat = *(uint16_t *)src; \ - src += 2; \ - \ - r[x_write + c] = ((dat & 0x001f) << 3) | ((dat & 0x001f) >> 2); \ - g[x_write + c] = ((dat & 0x07e0) >> 3) | ((dat & 0x07e0) >> 9); \ - b[x_write + c] = ((dat & 0xf800) >> 8) | ((dat & 0xf800) >> 13); \ - } \ - x_write = (x_write + 4) & 7; \ - } while (0) +#define DECODE_RGB565() \ + do { \ + int c; \ + \ + for (c = 0; c < 4; c++) { \ + uint16_t dat; \ + \ + dat = *(uint16_t *) src; \ + src += 2; \ + \ + r[x_write + c] = ((dat & 0x001f) << 3) | ((dat & 0x001f) >> 2); \ + g[x_write + c] = ((dat & 0x07e0) >> 3) | ((dat & 0x07e0) >> 9); \ + b[x_write + c] = ((dat & 0xf800) >> 8) | ((dat & 0xf800) >> 13); \ + } \ + x_write = (x_write + 4) & 7; \ + } while (0) -#define DECODE_RGB888() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 4; c++) \ - { \ - r[x_write + c] = src[0]; \ - g[x_write + c] = src[1]; \ - b[x_write + c] = src[2]; \ - src += 3; \ - } \ - x_write = (x_write + 4) & 7; \ - } while (0) +#define DECODE_RGB888() \ + do { \ + int c; \ + \ + for (c = 0; c < 4; c++) { \ + r[x_write + c] = src[0]; \ + g[x_write + c] = src[1]; \ + b[x_write + c] = src[2]; \ + src += 3; \ + } \ + x_write = (x_write + 4) & 7; \ + } while (0) -#define DECODE_XRGB8888() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 4; c++) \ - { \ - r[x_write + c] = src[0]; \ - g[x_write + c] = src[1]; \ - b[x_write + c] = src[2]; \ - src += 4; \ - } \ - x_write = (x_write + 4) & 7; \ - } while (0) +#define DECODE_XRGB8888() \ + do { \ + int c; \ + \ + for (c = 0; c < 4; c++) { \ + r[x_write + c] = src[0]; \ + g[x_write + c] = src[1]; \ + b[x_write + c] = src[2]; \ + src += 4; \ + } \ + x_write = (x_write + 4) & 7; \ + } while (0) -#define OVERLAY_SAMPLE() \ - do \ - { \ - switch (s3->streams.sdif) \ - { \ - case 1: \ - DECODE_YCbCr(); \ - break; \ - case 2: \ - DECODE_YUV422(); \ - break; \ - case 3: \ - DECODE_RGB555(); \ - break; \ - case 4: \ - DECODE_YUV211(); \ - break; \ - case 5: \ - DECODE_RGB565(); \ - break; \ - case 6: \ - DECODE_RGB888(); \ - break; \ - case 7: \ - default: \ - DECODE_XRGB8888(); \ - break; \ - } \ - } while (0) +#define OVERLAY_SAMPLE() \ + do { \ + switch (s3->streams.sdif) { \ + case 1: \ + DECODE_YCbCr(); \ + break; \ + case 2: \ + DECODE_YUV422(); \ + break; \ + case 3: \ + DECODE_RGB555(); \ + break; \ + case 4: \ + DECODE_YUV211(); \ + break; \ + case 5: \ + DECODE_RGB565(); \ + break; \ + case 6: \ + DECODE_RGB888(); \ + break; \ + case 7: \ + default: \ + DECODE_XRGB8888(); \ + break; \ + } \ + } while (0) - -static void s3_trio64v_overlay_draw(svga_t *svga, int displine) +static void +s3_trio64v_overlay_draw(svga_t *svga, int displine) { - s3_t *s3 = (s3_t *)svga->p; - int offset = (s3->streams.sec_x - s3->streams.pri_x) + 1; - int h_acc = s3->streams.dda_horiz_accumulator; - int r[8], g[8], b[8]; - int x_size, x_read = 4, x_write = 4; - int x; - uint32_t *p; - uint8_t *src = &svga->vram[svga->overlay_latch.addr]; + s3_t *s3 = (s3_t *) svga->p; + int offset = (s3->streams.sec_x - s3->streams.pri_x) + 1; + int h_acc = s3->streams.dda_horiz_accumulator; + int r[8], g[8], b[8]; + int x_size, x_read = 4, x_write = 4; + int x; + uint32_t *p; + uint8_t *src = &svga->vram[svga->overlay_latch.addr]; - p = &(buffer32->line[displine][offset + svga->x_add]); + p = &(buffer32->line[displine][offset + svga->x_add]); - if ((offset + s3->streams.sec_w) > s3->streams.pri_w) - x_size = (s3->streams.pri_w - s3->streams.sec_x) + 1; - else - x_size = s3->streams.sec_w + 1; + if ((offset + s3->streams.sec_w) > s3->streams.pri_w) + x_size = (s3->streams.pri_w - s3->streams.sec_x) + 1; + else + x_size = s3->streams.sec_w + 1; - OVERLAY_SAMPLE(); + OVERLAY_SAMPLE(); - for (x = 0; x < x_size; x++) - { - *p++ = r[x_read] | (g[x_read] << 8) | (b[x_read] << 16); + for (x = 0; x < x_size; x++) { + *p++ = r[x_read] | (g[x_read] << 8) | (b[x_read] << 16); - h_acc += s3->streams.k1_horiz_scale; - if (h_acc >= 0) - { - if ((x_read ^ (x_read + 1)) & ~3) - OVERLAY_SAMPLE(); - x_read = (x_read + 1) & 7; + h_acc += s3->streams.k1_horiz_scale; + if (h_acc >= 0) { + if ((x_read ^ (x_read + 1)) & ~3) + OVERLAY_SAMPLE(); + x_read = (x_read + 1) & 7; - h_acc += (s3->streams.k2_horiz_scale - s3->streams.k1_horiz_scale); - } + h_acc += (s3->streams.k2_horiz_scale - s3->streams.k1_horiz_scale); } + } - svga->overlay_latch.v_acc += s3->streams.k1_vert_scale; - if (svga->overlay_latch.v_acc >= 0) - { - svga->overlay_latch.v_acc += (s3->streams.k2_vert_scale - s3->streams.k1_vert_scale); - svga->overlay_latch.addr += s3->streams.sec_stride; - } + svga->overlay_latch.v_acc += s3->streams.k1_vert_scale; + if (svga->overlay_latch.v_acc >= 0) { + svga->overlay_latch.v_acc += (s3->streams.k2_vert_scale - s3->streams.k1_vert_scale); + svga->overlay_latch.addr += s3->streams.sec_stride; + } } static void s3_io_remove_alt(s3_t *s3) { - if (!s3->translate) - return; + if (!s3->translate) + return; - io_removehandler(0x4148, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x4548, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x4948, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x8148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x8548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x8948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x8d48, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x9148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x9548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x9948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x9d48, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, NULL, s3); - io_removehandler(0xa148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xa548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xa948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xad48, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - if (s3->chip >= S3_86C928) - io_removehandler(0xb148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - else - io_removehandler(0xb148, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); - io_removehandler(0xb548, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xb948, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xbd48, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xd148, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xe148, 0x0004, s3_accel_in, s3_accel_in_w, s3_accel_in_l, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); - io_removehandler(0xe548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xe948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xed48, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x4148, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x4548, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x4948, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x8148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x8548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x8948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x8d48, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x9148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x9548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x9948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x9d48, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, NULL, s3); + io_removehandler(0xa148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xa548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xa948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xad48, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + if (s3->chip >= S3_86C928) + io_removehandler(0xb148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + else + io_removehandler(0xb148, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); + io_removehandler(0xb548, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xb948, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xbd48, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xd148, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xe148, 0x0004, s3_accel_in, s3_accel_in_w, s3_accel_in_l, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); + io_removehandler(0xe548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xe948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xed48, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); } static void s3_io_remove(s3_t *s3) { - io_removehandler(0x03c0, 0x0020, s3_in, NULL, NULL, s3_out, NULL, NULL, s3); + io_removehandler(0x03c0, 0x0020, s3_in, NULL, NULL, s3_out, NULL, NULL, s3); - io_removehandler(0x42e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x46e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x4ae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x82e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x86e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x8ae8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x8ee8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x92e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x96e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x9ae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0x9ee8, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, NULL, s3); - io_removehandler(0xa2e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xa6e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xaae8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xaee8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - if (s3->chip >= S3_86C928) - io_removehandler(0xb2e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - else - io_removehandler(0xb2e8, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); - io_removehandler(0xb6e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xbae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xbee8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xcae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xd2e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xe2e8, 0x0004, s3_accel_in, s3_accel_in_w, s3_accel_in_l, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); - io_removehandler(0xe6e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xeae8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xeee8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_removehandler(0xfee8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x42e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x46e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x4ae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x82e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x86e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x8ae8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x8ee8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x92e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x96e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x9ae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0x9ee8, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, NULL, s3); + io_removehandler(0xa2e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xa6e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xaae8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xaee8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + if (s3->chip >= S3_86C928) + io_removehandler(0xb2e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + else + io_removehandler(0xb2e8, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); + io_removehandler(0xb6e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xbae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xbee8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xcae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xd2e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xe2e8, 0x0004, s3_accel_in, s3_accel_in_w, s3_accel_in_l, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); + io_removehandler(0xe6e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xeae8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xeee8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_removehandler(0xfee8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - s3_io_remove_alt(s3); + s3_io_remove_alt(s3); } static void s3_io_set_alt(s3_t *s3) { - svga_t *svga = &s3->svga; + svga_t *svga = &s3->svga; - if (!s3->translate) - return; + if (!s3->translate) + return; - if ((s3->chip == S3_VISION968 || s3->chip == S3_VISION868) && (svga->seqregs[9] & 0x80)) { - return; - } + if ((s3->chip == S3_VISION968 || s3->chip == S3_VISION868) && (svga->seqregs[9] & 0x80)) { + return; + } - io_sethandler(0x4148, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x4548, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x4948, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - if (s3->chip == S3_TRIO64 || s3->chip >= S3_TRIO64V || s3->chip == S3_VISION968 || s3->chip == S3_VISION868) - { - io_sethandler(0x8148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x8548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x8948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x8d48, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x9148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x9548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - } - else - { - io_sethandler(0x8148, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x8548, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x8948, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x8d48, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x9148, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x9548, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - } - if (s3->chip == S3_VISION968 || s3->chip == S3_VISION868) - io_sethandler(0x9948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - else - io_sethandler(0x9948, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x9d48, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, NULL, s3); - io_sethandler(0xa148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xa548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xa948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xad48, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - if (s3->chip >= S3_86C928) - io_sethandler(0xb148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - else - io_sethandler(0xb148, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); - io_sethandler(0xb548, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xb948, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xbd48, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xe148, 0x0004, s3_accel_in, s3_accel_in_w, s3_accel_in_l, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); - if (s3->chip == S3_VISION968 || s3->chip == S3_VISION868) { - io_sethandler(0xd148, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xe548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xe948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xed48, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - } + io_sethandler(0x4148, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x4548, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x4948, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + if (s3->chip == S3_TRIO64 || s3->chip >= S3_TRIO64V || s3->chip == S3_VISION968 || s3->chip == S3_VISION868) { + io_sethandler(0x8148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x8548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x8948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x8d48, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x9148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x9548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + } else { + io_sethandler(0x8148, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x8548, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x8948, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x8d48, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x9148, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x9548, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + } + if (s3->chip == S3_VISION968 || s3->chip == S3_VISION868) + io_sethandler(0x9948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + else + io_sethandler(0x9948, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x9d48, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, NULL, s3); + io_sethandler(0xa148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xa548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xa948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xad48, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + if (s3->chip >= S3_86C928) + io_sethandler(0xb148, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + else + io_sethandler(0xb148, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); + io_sethandler(0xb548, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xb948, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xbd48, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xe148, 0x0004, s3_accel_in, s3_accel_in_w, s3_accel_in_l, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); + if (s3->chip == S3_VISION968 || s3->chip == S3_VISION868) { + io_sethandler(0xd148, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xe548, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xe948, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xed48, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + } } static void s3_io_set(s3_t *s3) { - svga_t *svga = &s3->svga; + svga_t *svga = &s3->svga; - s3_io_remove(s3); + s3_io_remove(s3); - io_sethandler(0x03c0, 0x0020, s3_in, NULL, NULL, s3_out, NULL, NULL, s3); + io_sethandler(0x03c0, 0x0020, s3_in, NULL, NULL, s3_out, NULL, NULL, s3); - if ((s3->chip == S3_VISION968 || s3->chip == S3_VISION868) && (svga->seqregs[9] & 0x80)) { - return; - } + if ((s3->chip == S3_VISION968 || s3->chip == S3_VISION868) && (svga->seqregs[9] & 0x80)) { + return; + } - io_sethandler(0x42e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x46e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x4ae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - if (s3->chip == S3_TRIO64 || s3->chip >= S3_TRIO64V || s3->chip == S3_VISION968 || s3->chip == S3_VISION868) - { - io_sethandler(0x82e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x86e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x8ae8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x8ee8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x92e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x96e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - } - else - { - io_sethandler(0x82e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x86e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x8ae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x8ee8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x92e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x96e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - } - if (s3->chip == S3_VISION968 || s3->chip == S3_VISION868) - io_sethandler(0x9ae8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - else - io_sethandler(0x9ae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0x9ee8, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, NULL, s3); - io_sethandler(0xa2e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xa6e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xaae8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xaee8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - if (s3->chip >= S3_86C928) - io_sethandler(0xb2e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - else - io_sethandler(0xb2e8, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); - io_sethandler(0xb6e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xbae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xbee8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xcae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xe2e8, 0x0004, s3_accel_in, s3_accel_in_w, s3_accel_in_l, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); - if (s3->chip == S3_VISION968 || s3->chip == S3_VISION868) { - io_sethandler(0xd2e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xe6e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xeae8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - io_sethandler(0xeee8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - } - io_sethandler(0xfee8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x42e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x46e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x4ae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + if (s3->chip == S3_TRIO64 || s3->chip >= S3_TRIO64V || s3->chip == S3_VISION968 || s3->chip == S3_VISION868) { + io_sethandler(0x82e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x86e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x8ae8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x8ee8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x92e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x96e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + } else { + io_sethandler(0x82e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x86e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x8ae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x8ee8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x92e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x96e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + } + if (s3->chip == S3_VISION968 || s3->chip == S3_VISION868) + io_sethandler(0x9ae8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + else + io_sethandler(0x9ae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0x9ee8, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, NULL, s3); + io_sethandler(0xa2e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xa6e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xaae8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xaee8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + if (s3->chip >= S3_86C928) + io_sethandler(0xb2e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + else + io_sethandler(0xb2e8, 0x0002, s3_accel_in, s3_accel_in_w, NULL, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); + io_sethandler(0xb6e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xbae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xbee8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xcae8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xe2e8, 0x0004, s3_accel_in, s3_accel_in_w, s3_accel_in_l, s3_accel_out, s3_accel_out_w, s3_accel_out_l, s3); + if (s3->chip == S3_VISION968 || s3->chip == S3_VISION868) { + io_sethandler(0xd2e8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xe6e8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xeae8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + io_sethandler(0xeee8, 0x0004, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); + } + io_sethandler(0xfee8, 0x0002, s3_accel_in, NULL, NULL, s3_accel_out, NULL, NULL, s3); - s3_io_set_alt(s3); + s3_io_set_alt(s3); } static void s3_out(uint16_t addr, uint8_t val, void *p) { - s3_t *s3 = (s3_t *)p; - svga_t *svga = &s3->svga; - uint8_t old, mask; - int rs2, rs3; + s3_t *s3 = (s3_t *) p; + svga_t *svga = &s3->svga; + uint8_t old, mask; + int rs2, rs3; - if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x3c2: - if ((s3->chip == S3_VISION964) || (s3->chip == S3_VISION968) || (s3->chip == S3_86C928)) { - if ((s3->card_type != S3_SPEA_MERCURY_P64V) && (s3->card_type != S3_MIROVIDEO40SV_ERGO_968)) { - if (((val >> 2) & 3) != 3) - icd2061_write(svga->clock_gen, (val >> 2) & 3); - } - } - break; - - case 0x3c5: - if (svga->seqaddr >= 0x10 && svga->seqaddr < 0x20) - { - svga->seqregs[svga->seqaddr] = val; - switch (svga->seqaddr) - { - case 0x12: case 0x13: - svga_recalctimings(svga); - return; - } - } - if (svga->seqaddr == 4) /*Chain-4 - update banking*/ - { - if (val & 0x08) - svga->write_bank = svga->read_bank = s3->bank << 16; - else - svga->write_bank = svga->read_bank = s3->bank << 14; - } else if (svga->seqaddr == 9) { - svga->seqregs[svga->seqaddr] = val & 0x80; - s3_io_set(s3); - return; - } else if (svga->seqaddr == 0xa) { - svga->seqregs[svga->seqaddr] = val & 0x80; - return; - } else if (s3->chip >= S3_VISION964) { - if (svga->seqaddr == 0x08) { - svga->seqregs[svga->seqaddr] = val & 0x0f; - return; - } else if ((svga->seqaddr == 0x0d) && (svga->seqregs[0x08] == 0x06)) { - svga->seqregs[svga->seqaddr] = val; - svga->dpms = ((s3->chip >= S3_VISION964) && (svga->seqregs[0x0d] & 0x50)) || (svga->crtc[0x56] & ((s3->chip >= S3_TRIO32) ? 0x06 : 0x20)); - svga_recalctimings(svga); - return; - } - } - break; - - case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9: - if ((svga->crtc[0x55] & 0x03) == 0x00) - rs2 = !!(svga->crtc[0x43] & 0x02); - else - rs2 = (svga->crtc[0x55] & 0x01); - if (s3->chip >= S3_TRIO32) - svga_out(addr, val, svga); - else if ((s3->chip == S3_VISION964 && s3->card_type != S3_ELSAWIN2KPROX_964) || (s3->chip == S3_86C928)) { - if (!(svga->crtc[0x45] & 0x20) || (s3->chip == S3_86C928)) - rs3 = !!(svga->crtc[0x55] & 0x02); - else - rs3 = 0; - bt48x_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga); - } else if ((s3->chip == S3_VISION964 && s3->card_type == S3_ELSAWIN2KPROX_964) || (s3->chip == S3_VISION968 && (s3->card_type == S3_ELSAWIN2KPROX || - s3->card_type == S3_PHOENIX_VISION968 || s3->card_type == S3_NUMBER9_9FX_771))) - ibm_rgb528_ramdac_out(addr, rs2, val, svga->ramdac, svga); - else if ((s3->chip == S3_VISION968 && (s3->card_type == S3_SPEA_MERCURY_P64V || s3->card_type == S3_MIROVIDEO40SV_ERGO_968))) { - rs3 = !!(svga->crtc[0x55] & 0x02); - tvp3026_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga); - } else if (((s3->chip == S3_86C801) || (s3->chip == S3_86C805)) && (s3->card_type != S3_MIROCRYSTAL10SD_805 && s3->card_type != S3_MIROCRYSTAL8S_805)) - att49x_ramdac_out(addr, rs2, val, svga->ramdac, svga); - else if (s3->chip <= S3_86C924) { - sc1148x_ramdac_out(addr, rs2, val, svga->ramdac, svga); - } else if (s3->card_type == S3_NUMBER9_9FX_531) - att498_ramdac_out(addr, rs2, val, svga->ramdac, svga); - else if ((s3->chip == S3_86C928PCI) && (s3->card_type == S3_SPEA_MERCURY_LITE_PCI)) - sc1502x_ramdac_out(addr, val, svga->ramdac, svga); - else - sdac_ramdac_out(addr, rs2, val, svga->ramdac, svga); - return; - - case 0x3D4: - svga->crtcreg = (s3->chip == S3_TRIO64V2) ? val : (val & 0x7f); - return; - case 0x3D5: - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - if ((svga->crtcreg >= 0x20) && (svga->crtcreg < 0x40) && - (svga->crtcreg != 0x36) && (svga->crtcreg != 0x38) && - (svga->crtcreg != 0x39) && ((svga->crtc[0x38] & 0xcc) != 0x48)) - return; - if ((svga->crtcreg >= 0x40) && ((svga->crtc[0x39] & 0xe0) != 0xa0)) - return; - if ((svga->crtcreg == 0x36) && (svga->crtc[0x39] != 0xa5)) - return; - if ((s3->chip == S3_TRIO64V2) && (svga->crtcreg >= 0x80)) - return; - if ((s3->chip <= S3_86C924) && (svga->crtcreg >= 0x50)) - return; - old = svga->crtc[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; - - switch (svga->crtcreg) - { - case 0x31: - s3->ma_ext = (s3->ma_ext & 0x1c) | ((val & 0x30) >> 4); - svga->force_dword_mode = !!(val & 0x08); - break; - case 0x32: - if ((svga->crtc[0x31] & 0x30) && (svga->crtc[0x51] & 0x01) && (val & 0x40)) - svga->vram_display_mask = 0x3ffff; - else - svga->vram_display_mask = s3->vram_mask; - break; - - case 0x40: - s3->enable_8514 = (val & 0x01); - break; - - case 0x50: - mask = 0xc0; - if (s3->chip != S3_86C801) - mask |= 0x01; - switch (svga->crtc[0x50] & mask) - { - case 0x00: s3->width = (svga->crtc[0x31] & 2) ? 2048 : 1024; break; - case 0x01: s3->width = 1152; break; - case 0x40: s3->width = 640; break; - case 0x80: s3->width = ((s3->chip > S3_86C805) && (s3->accel.advfunc_cntl & 4)) ? 1600 : 800; break; - case 0x81: s3->width = 1600; break; - case 0xc0: s3->width = 1280; break; - } - s3->bpp = (svga->crtc[0x50] >> 4) & 3; - break; - - case 0x5c: - if ((val & 0xa0) == 0x80) - i2c_gpio_set(s3->i2c, !!(val & 0x40), !!(val & 0x10)); - if (s3->card_type == S3_PHOENIX_VISION868 || s3->card_type == S3_PHOENIX_VISION968) { - if ((val & 0x20) && (!(svga->crtc[0x55] & 0x01) && !(svga->crtc[0x43] & 2))) - svga->dac_addr |= 0x20; - } else if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968) { - if ((val & 0x80) && (!(svga->crtc[0x55] & 0x01) && !(svga->crtc[0x43] & 2))) - svga->dac_addr |= 0x02; - } - break; - - case 0x69: - if (s3->chip >= S3_VISION964) - s3->ma_ext = val & 0x1f; - break; - - case 0x35: - s3->bank = (s3->bank & 0x70) | (val & 0xf); - if (svga->chain4) - svga->write_bank = svga->read_bank = s3->bank << 16; - else - svga->write_bank = svga->read_bank = s3->bank << 14; - break; - - case 0x51: - if (s3->chip == S3_86C801 || s3->chip == S3_86C805) { - s3->bank = (s3->bank & 0x6f) | ((val & 0x4) << 2); - s3->ma_ext = (s3->ma_ext & ~0x4) | ((val & 1) << 2); - } else { - s3->bank = (s3->bank & 0x4f) | ((val & 0xc) << 2); - s3->ma_ext = (s3->ma_ext & ~0xc) | ((val & 3) << 2); - } - if (svga->chain4) - svga->write_bank = svga->read_bank = s3->bank << 16; - else - svga->write_bank = svga->read_bank = s3->bank << 14; - break; - - case 0x6a: - if (s3->chip >= S3_VISION964) { - s3->bank = val; - if (svga->chain4) - svga->write_bank = svga->read_bank = s3->bank << 16; - else - svga->write_bank = svga->read_bank = s3->bank << 14; - } - break; - - case 0x45: - if (s3->chip == S3_VISION964 || s3->chip == S3_VISION968) - break; - svga->hwcursor.ena = val & 1; - break; - case 0x46: case 0x47: case 0x48: case 0x49: - case 0x4c: case 0x4d: case 0x4e: case 0x4f: - if (s3->chip == S3_VISION964 || s3->chip == S3_VISION968) - break; - svga->hwcursor.x = ((svga->crtc[0x46] << 8) | svga->crtc[0x47]) & 0x7ff; - if (svga->bpp == 32) svga->hwcursor.x >>= 1; - svga->hwcursor.y = ((svga->crtc[0x48] << 8) | svga->crtc[0x49]) & 0x7ff; - svga->hwcursor.xoff = svga->crtc[0x4e] & 0x3f; - svga->hwcursor.yoff = svga->crtc[0x4f] & 0x3f; - svga->hwcursor.addr = ((((svga->crtc[0x4c] << 8) | svga->crtc[0x4d]) & 0xfff) * 1024) + (svga->hwcursor.yoff * 16); - if ((s3->chip >= S3_TRIO32) && svga->bpp == 32) - svga->hwcursor.x <<= 1; - else if ((s3->chip >= S3_86C928 && s3->chip <= S3_86C805) && (svga->bpp == 15 || svga->bpp == 16)) { - if ((s3->card_type == S3_MIROCRYSTAL10SD_805) && !(svga->crtc[0x45] & 0x04) && svga->bpp == 16) - svga->hwcursor.x >>= 2; - else - svga->hwcursor.x >>= 1; - } else if ((s3->chip >= S3_86C928 && s3->chip <= S3_86C805) && (svga->bpp == 24)) - svga->hwcursor.x /= 3; - break; - - case 0x4a: - switch (s3->hwc_col_stack_pos) - { - case 0: - s3->hwc_fg_col = (s3->hwc_fg_col & 0xffff00) | val; - break; - case 1: - s3->hwc_fg_col = (s3->hwc_fg_col & 0xff00ff) | (val << 8); - break; - case 2: - s3->hwc_fg_col = (s3->hwc_fg_col & 0x00ffff) | (val << 16); - break; - } - s3->hwc_col_stack_pos = (s3->hwc_col_stack_pos + 1) & 3; - break; - case 0x4b: - switch (s3->hwc_col_stack_pos) - { - case 0: - s3->hwc_bg_col = (s3->hwc_bg_col & 0xffff00) | val; - break; - case 1: - s3->hwc_bg_col = (s3->hwc_bg_col & 0xff00ff) | (val << 8); - break; - case 2: - s3->hwc_bg_col = (s3->hwc_bg_col & 0x00ffff) | (val << 16); - break; - } - s3->hwc_col_stack_pos = (s3->hwc_col_stack_pos + 1) & 3; - break; - - case 0x53: - case 0x58: case 0x59: case 0x5a: - s3_updatemapping(s3); - break; - - case 0x55: - if (s3->chip == S3_86C928) { - if ((val & 0x08) || ((val & 0x20) == 0x20)) { - svga->hwcursor_draw = NULL; - svga->dac_hwcursor_draw = bt48x_hwcursor_draw; - } else { - svga->hwcursor_draw = s3_hwcursor_draw; - svga->dac_hwcursor_draw = NULL; - } - } - break; - - case 0x42: - if ((s3->chip == S3_VISION964) || (s3->chip == S3_VISION968) || (s3->chip == S3_86C928)) { - if (((svga->miscout >> 2) & 3) == 3) - icd2061_write(svga->clock_gen, svga->crtc[0x42] & 0x0f); - } - break; - - case 0x43: - if (s3->chip < S3_VISION964) { - s3_io_remove_alt(s3); - s3->translate = !!(val & 0x10); - s3_io_set_alt(s3); - } - break; - - case 0x56: - svga->dpms = ((s3->chip >= S3_VISION964) && (svga->seqregs[0x0d] & 0x50)) || (svga->crtc[0x56] & ((s3->chip >= S3_TRIO32) ? 0x06 : 0x20)); - old = ~val; /* force recalc */ - break; - - case 0x67: - if (s3->chip >= S3_TRIO32) { - switch (val >> 4) - { - case 3: svga->bpp = 15; break; - case 5: svga->bpp = 16; break; - case 7: svga->bpp = 24; break; - case 13: svga->bpp = 32; break; - default: svga->bpp = 8; break; - } - } - break; - } - if (old != val) - { - if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) - { - if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - if ((((svga->crtc[0x67] & 0xc) != 0xc) && (s3->chip >= S3_TRIO64V)) || (s3->chip < S3_TRIO64V)) - svga->ma_latch |= (s3->ma_ext << 16); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - } + switch (addr) { + case 0x3c2: + if ((s3->chip == S3_VISION964) || (s3->chip == S3_VISION968) || (s3->chip == S3_86C928)) { + if ((s3->card_type != S3_SPEA_MERCURY_P64V) && (s3->card_type != S3_MIROVIDEO40SV_ERGO_968)) { + if (((val >> 2) & 3) != 3) + icd2061_write(svga->clock_gen, (val >> 2) & 3); } - break; - } - svga_out(addr, val, svga); + } + break; + + case 0x3c5: + if (svga->seqaddr >= 0x10 && svga->seqaddr < 0x20) { + svga->seqregs[svga->seqaddr] = val; + switch (svga->seqaddr) { + case 0x12: + case 0x13: + svga_recalctimings(svga); + return; + } + } + if (svga->seqaddr == 4) /*Chain-4 - update banking*/ + { + if (val & 0x08) + svga->write_bank = svga->read_bank = s3->bank << 16; + else + svga->write_bank = svga->read_bank = s3->bank << 14; + } else if (svga->seqaddr == 9) { + svga->seqregs[svga->seqaddr] = val & 0x80; + s3_io_set(s3); + return; + } else if (svga->seqaddr == 0xa) { + svga->seqregs[svga->seqaddr] = val & 0x80; + return; + } else if (s3->chip >= S3_VISION964) { + if (svga->seqaddr == 0x08) { + svga->seqregs[svga->seqaddr] = val & 0x0f; + return; + } else if ((svga->seqaddr == 0x0d) && (svga->seqregs[0x08] == 0x06)) { + svga->seqregs[svga->seqaddr] = val; + svga->dpms = ((s3->chip >= S3_VISION964) && (svga->seqregs[0x0d] & 0x50)) || (svga->crtc[0x56] & ((s3->chip >= S3_TRIO32) ? 0x06 : 0x20)); + svga_recalctimings(svga); + return; + } + } + break; + + case 0x3C6: + case 0x3C7: + case 0x3C8: + case 0x3C9: + if ((svga->crtc[0x55] & 0x03) == 0x00) + rs2 = !!(svga->crtc[0x43] & 0x02); + else + rs2 = (svga->crtc[0x55] & 0x01); + if (s3->chip >= S3_TRIO32) + svga_out(addr, val, svga); + else if ((s3->chip == S3_VISION964 && s3->card_type != S3_ELSAWIN2KPROX_964) || (s3->chip == S3_86C928)) { + if (!(svga->crtc[0x45] & 0x20) || (s3->chip == S3_86C928)) + rs3 = !!(svga->crtc[0x55] & 0x02); + else + rs3 = 0; + bt48x_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga); + } else if ((s3->chip == S3_VISION964 && s3->card_type == S3_ELSAWIN2KPROX_964) || (s3->chip == S3_VISION968 && (s3->card_type == S3_ELSAWIN2KPROX || s3->card_type == S3_PHOENIX_VISION968 || s3->card_type == S3_NUMBER9_9FX_771))) + ibm_rgb528_ramdac_out(addr, rs2, val, svga->ramdac, svga); + else if ((s3->chip == S3_VISION968 && (s3->card_type == S3_SPEA_MERCURY_P64V || s3->card_type == S3_MIROVIDEO40SV_ERGO_968))) { + rs3 = !!(svga->crtc[0x55] & 0x02); + tvp3026_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga); + } else if (((s3->chip == S3_86C801) || (s3->chip == S3_86C805)) && (s3->card_type != S3_MIROCRYSTAL10SD_805 && s3->card_type != S3_MIROCRYSTAL8S_805)) + att49x_ramdac_out(addr, rs2, val, svga->ramdac, svga); + else if (s3->chip <= S3_86C924) { + sc1148x_ramdac_out(addr, rs2, val, svga->ramdac, svga); + } else if (s3->card_type == S3_NUMBER9_9FX_531) + att498_ramdac_out(addr, rs2, val, svga->ramdac, svga); + else if ((s3->chip == S3_86C928PCI) && (s3->card_type == S3_SPEA_MERCURY_LITE_PCI)) + sc1502x_ramdac_out(addr, val, svga->ramdac, svga); + else + sdac_ramdac_out(addr, rs2, val, svga->ramdac, svga); + return; + + case 0x3D4: + svga->crtcreg = (s3->chip == S3_TRIO64V2) ? val : (val & 0x7f); + return; + case 0x3D5: + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + if ((svga->crtcreg >= 0x20) && (svga->crtcreg < 0x40) && (svga->crtcreg != 0x36) && (svga->crtcreg != 0x38) && (svga->crtcreg != 0x39) && ((svga->crtc[0x38] & 0xcc) != 0x48)) + return; + if ((svga->crtcreg >= 0x40) && ((svga->crtc[0x39] & 0xe0) != 0xa0)) + return; + if ((svga->crtcreg == 0x36) && (svga->crtc[0x39] != 0xa5)) + return; + if ((s3->chip == S3_TRIO64V2) && (svga->crtcreg >= 0x80)) + return; + if ((s3->chip <= S3_86C924) && (svga->crtcreg >= 0x50)) + return; + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; + + switch (svga->crtcreg) { + case 0x31: + s3->ma_ext = (s3->ma_ext & 0x1c) | ((val & 0x30) >> 4); + svga->force_dword_mode = !!(val & 0x08); + break; + case 0x32: + if ((svga->crtc[0x31] & 0x30) && (svga->crtc[0x51] & 0x01) && (val & 0x40)) + svga->vram_display_mask = 0x3ffff; + else + svga->vram_display_mask = s3->vram_mask; + break; + + case 0x40: + s3->enable_8514 = (val & 0x01); + break; + + case 0x50: + mask = 0xc0; + if (s3->chip != S3_86C801) + mask |= 0x01; + switch (svga->crtc[0x50] & mask) { + case 0x00: + s3->width = (svga->crtc[0x31] & 2) ? 2048 : 1024; + break; + case 0x01: + s3->width = 1152; + break; + case 0x40: + s3->width = 640; + break; + case 0x80: + s3->width = ((s3->chip > S3_86C805) && (s3->accel.advfunc_cntl & 4)) ? 1600 : 800; + break; + case 0x81: + s3->width = 1600; + break; + case 0xc0: + s3->width = 1280; + break; + } + s3->bpp = (svga->crtc[0x50] >> 4) & 3; + break; + + case 0x5c: + if ((val & 0xa0) == 0x80) + i2c_gpio_set(s3->i2c, !!(val & 0x40), !!(val & 0x10)); + if (s3->card_type == S3_PHOENIX_VISION868 || s3->card_type == S3_PHOENIX_VISION968) { + if ((val & 0x20) && (!(svga->crtc[0x55] & 0x01) && !(svga->crtc[0x43] & 2))) + svga->dac_addr |= 0x20; + } else if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968) { + if ((val & 0x80) && (!(svga->crtc[0x55] & 0x01) && !(svga->crtc[0x43] & 2))) + svga->dac_addr |= 0x02; + } + break; + + case 0x69: + if (s3->chip >= S3_VISION964) + s3->ma_ext = val & 0x1f; + break; + + case 0x35: + s3->bank = (s3->bank & 0x70) | (val & 0xf); + if (svga->chain4) + svga->write_bank = svga->read_bank = s3->bank << 16; + else + svga->write_bank = svga->read_bank = s3->bank << 14; + break; + + case 0x51: + if (s3->chip == S3_86C801 || s3->chip == S3_86C805) { + s3->bank = (s3->bank & 0x6f) | ((val & 0x4) << 2); + s3->ma_ext = (s3->ma_ext & ~0x4) | ((val & 1) << 2); + } else { + s3->bank = (s3->bank & 0x4f) | ((val & 0xc) << 2); + s3->ma_ext = (s3->ma_ext & ~0xc) | ((val & 3) << 2); + } + if (svga->chain4) + svga->write_bank = svga->read_bank = s3->bank << 16; + else + svga->write_bank = svga->read_bank = s3->bank << 14; + break; + + case 0x6a: + if (s3->chip >= S3_VISION964) { + s3->bank = val; + if (svga->chain4) + svga->write_bank = svga->read_bank = s3->bank << 16; + else + svga->write_bank = svga->read_bank = s3->bank << 14; + } + break; + + case 0x45: + if (s3->chip == S3_VISION964 || s3->chip == S3_VISION968) + break; + svga->hwcursor.ena = val & 1; + break; + case 0x46: + case 0x47: + case 0x48: + case 0x49: + case 0x4c: + case 0x4d: + case 0x4e: + case 0x4f: + if (s3->chip == S3_VISION964 || s3->chip == S3_VISION968) + break; + svga->hwcursor.x = ((svga->crtc[0x46] << 8) | svga->crtc[0x47]) & 0x7ff; + if (svga->bpp == 32) + svga->hwcursor.x >>= 1; + svga->hwcursor.y = ((svga->crtc[0x48] << 8) | svga->crtc[0x49]) & 0x7ff; + svga->hwcursor.xoff = svga->crtc[0x4e] & 0x3f; + svga->hwcursor.yoff = svga->crtc[0x4f] & 0x3f; + svga->hwcursor.addr = ((((svga->crtc[0x4c] << 8) | svga->crtc[0x4d]) & 0xfff) * 1024) + (svga->hwcursor.yoff * 16); + if ((s3->chip >= S3_TRIO32) && svga->bpp == 32) + svga->hwcursor.x <<= 1; + else if ((s3->chip >= S3_86C928 && s3->chip <= S3_86C805) && (svga->bpp == 15 || svga->bpp == 16)) { + if ((s3->card_type == S3_MIROCRYSTAL10SD_805) && !(svga->crtc[0x45] & 0x04) && svga->bpp == 16) + svga->hwcursor.x >>= 2; + else + svga->hwcursor.x >>= 1; + } else if ((s3->chip >= S3_86C928 && s3->chip <= S3_86C805) && (svga->bpp == 24)) + svga->hwcursor.x /= 3; + break; + + case 0x4a: + switch (s3->hwc_col_stack_pos) { + case 0: + s3->hwc_fg_col = (s3->hwc_fg_col & 0xffff00) | val; + break; + case 1: + s3->hwc_fg_col = (s3->hwc_fg_col & 0xff00ff) | (val << 8); + break; + case 2: + s3->hwc_fg_col = (s3->hwc_fg_col & 0x00ffff) | (val << 16); + break; + } + s3->hwc_col_stack_pos = (s3->hwc_col_stack_pos + 1) & 3; + break; + case 0x4b: + switch (s3->hwc_col_stack_pos) { + case 0: + s3->hwc_bg_col = (s3->hwc_bg_col & 0xffff00) | val; + break; + case 1: + s3->hwc_bg_col = (s3->hwc_bg_col & 0xff00ff) | (val << 8); + break; + case 2: + s3->hwc_bg_col = (s3->hwc_bg_col & 0x00ffff) | (val << 16); + break; + } + s3->hwc_col_stack_pos = (s3->hwc_col_stack_pos + 1) & 3; + break; + + case 0x53: + case 0x58: + case 0x59: + case 0x5a: + s3_updatemapping(s3); + break; + + case 0x55: + if (s3->chip == S3_86C928) { + if ((val & 0x08) || ((val & 0x20) == 0x20)) { + svga->hwcursor_draw = NULL; + svga->dac_hwcursor_draw = bt48x_hwcursor_draw; + } else { + svga->hwcursor_draw = s3_hwcursor_draw; + svga->dac_hwcursor_draw = NULL; + } + } + break; + + case 0x42: + if ((s3->chip == S3_VISION964) || (s3->chip == S3_VISION968) || (s3->chip == S3_86C928)) { + if (((svga->miscout >> 2) & 3) == 3) + icd2061_write(svga->clock_gen, svga->crtc[0x42] & 0x0f); + } + break; + + case 0x43: + if (s3->chip < S3_VISION964) { + s3_io_remove_alt(s3); + s3->translate = !!(val & 0x10); + s3_io_set_alt(s3); + } + break; + + case 0x56: + svga->dpms = ((s3->chip >= S3_VISION964) && (svga->seqregs[0x0d] & 0x50)) || (svga->crtc[0x56] & ((s3->chip >= S3_TRIO32) ? 0x06 : 0x20)); + old = ~val; /* force recalc */ + break; + + case 0x67: + if (s3->chip >= S3_TRIO32) { + switch (val >> 4) { + case 3: + svga->bpp = 15; + break; + case 5: + svga->bpp = 16; + break; + case 7: + svga->bpp = 24; + break; + case 13: + svga->bpp = 32; + break; + default: + svga->bpp = 8; + break; + } + } + break; + } + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + if ((((svga->crtc[0x67] & 0xc) != 0xc) && (s3->chip >= S3_TRIO64V)) || (s3->chip < S3_TRIO64V)) + svga->ma_latch |= (s3->ma_ext << 16); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + } + } + break; + } + svga_out(addr, val, svga); } static uint8_t s3_in(uint16_t addr, void *p) { - s3_t *s3 = (s3_t *)p; - svga_t *svga = &s3->svga; - int rs2, rs3; - uint8_t temp; + s3_t *s3 = (s3_t *) p; + svga_t *svga = &s3->svga; + int rs2, rs3; + uint8_t temp; - if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x3c1: - if (svga->attraddr > 0x14) - return 0xff; - break; + switch (addr) { + case 0x3c1: + if (svga->attraddr > 0x14) + return 0xff; + break; - case 0x3c2: - if (s3->chip <= S3_86C924) - return svga_in(addr, svga) | 0x10; - break; + case 0x3c2: + if (s3->chip <= S3_86C924) + return svga_in(addr, svga) | 0x10; + break; - case 0x3c5: - if (svga->seqaddr >= 0x10 && svga->seqaddr < 0x20) { - temp = svga->seqregs[svga->seqaddr]; - /* This is needed for the Intel Advanced/ATX's built-in S3 Trio64V+ BIOS to not - get stuck in an infinite loop. */ - if ((s3->card_type == S3_PHOENIX_TRIO64VPLUS_ONBOARD) && (svga->seqaddr == 0x17)) - svga->seqregs[svga->seqaddr] ^= 0x01; - return temp; - } - break; - - case 0x3c6: case 0x3c7: case 0x3c8: case 0x3c9: - rs2 = (svga->crtc[0x55] & 0x01) || !!(svga->crtc[0x43] & 2); - if (s3->chip >= S3_TRIO32) - return svga_in(addr, svga); - else if ((s3->chip == S3_VISION964 && s3->card_type != S3_ELSAWIN2KPROX_964) || (s3->chip == S3_86C928)) { - rs3 = !!(svga->crtc[0x55] & 0x02); - return bt48x_ramdac_in(addr, rs2, rs3, svga->ramdac, svga); - } else if ((s3->chip == S3_VISION964 && s3->card_type == S3_ELSAWIN2KPROX_964) || (s3->chip == S3_VISION968 && (s3->card_type == S3_ELSAWIN2KPROX || - s3->card_type == S3_PHOENIX_VISION968 || s3->card_type == S3_NUMBER9_9FX_771))) - return ibm_rgb528_ramdac_in(addr, rs2, svga->ramdac, svga); - else if ((s3->chip == S3_VISION968 && (s3->card_type == S3_SPEA_MERCURY_P64V || s3->card_type == S3_MIROVIDEO40SV_ERGO_968))) { - rs3 = !!(svga->crtc[0x55] & 0x02); - return tvp3026_ramdac_in(addr, rs2, rs3, svga->ramdac, svga); - } else if (((s3->chip == S3_86C801) || (s3->chip == S3_86C805)) && (s3->card_type != S3_MIROCRYSTAL10SD_805 && s3->card_type != S3_MIROCRYSTAL8S_805)) - return att49x_ramdac_in(addr, rs2, svga->ramdac, svga); - else if (s3->chip <= S3_86C924) - return sc1148x_ramdac_in(addr, rs2, svga->ramdac, svga); - else if (s3->card_type == S3_NUMBER9_9FX_531) - return att498_ramdac_in(addr, rs2, svga->ramdac, svga); - else if ((s3->chip == S3_86C928PCI) && (s3->card_type == S3_SPEA_MERCURY_LITE_PCI)) - return sc1502x_ramdac_in(addr, svga->ramdac, svga); - else - return sdac_ramdac_in(addr, rs2, svga->ramdac, svga); - break; - - case 0x3d4: - return svga->crtcreg; - case 0x3d5: - switch (svga->crtcreg) - { - case 0x2d: return (s3->chip == S3_TRIO64V2) ? 0x89 : 0x88; /*Extended chip ID*/ - case 0x2e: return s3->id_ext; /*New chip ID*/ - case 0x2f: return (s3->chip == S3_TRIO64V) ? 0x40 : 0; /*Revision level*/ - case 0x30: return s3->id; /*Chip ID*/ - case 0x31: return (svga->crtc[0x31] & 0xcf) | ((s3->ma_ext & 3) << 4); - case 0x35: return (svga->crtc[0x35] & 0xf0) | (s3->bank & 0xf); - case 0x45: s3->hwc_col_stack_pos = 0; break; - case 0x51: return (svga->crtc[0x51] & 0xf0) | ((s3->bank >> 2) & 0xc) | ((s3->ma_ext >> 2) & 3); - case 0x5c: /* General Output Port Register */ - temp = svga->crtc[svga->crtcreg] & 0xa0; - if (((svga->miscout >> 2) & 3) == 3) - temp |= svga->crtc[0x42] & 0x0f; - else - temp |= ((svga->miscout >> 2) & 3); - if ((temp & 0xa0) == 0xa0) { - if ((svga->crtc[0x5c] & 0x40) && i2c_gpio_get_scl(s3->i2c)) - temp |= 0x40; - if ((svga->crtc[0x5c] & 0x10) && i2c_gpio_get_sda(s3->i2c)) - temp |= 0x10; - } - return temp; - case 0x69: return s3->ma_ext; - case 0x6a: return s3->bank; - /* Phoenix S3 video BIOS'es seem to expect CRTC registers 6B and 6C - to be mirrors of 59 and 5A. */ - case 0x6b: - if (s3->chip != S3_TRIO64V2) { - if (svga->crtc[0x53] & 0x08) { - return (s3->chip == S3_TRIO64V) ? (svga->crtc[0x59] & 0xfc) : (svga->crtc[0x59] & 0xfe); - } else { - return svga->crtc[0x59]; - } - } else - return svga->crtc[0x6b]; - break; - case 0x6c: - if (s3->chip != S3_TRIO64V2) { - if (svga->crtc[0x53] & 0x08) { - return 0x00; - } else - return (svga->crtc[0x5a] & 0x80); - } else - return svga->crtc[0x6c]; - break; - } - return svga->crtc[svga->crtcreg]; - } - return svga_in(addr, svga); -} - -static void s3_recalctimings(svga_t *svga) -{ - s3_t *s3 = (s3_t *)svga->p; - int clk_sel = (svga->miscout >> 2) & 3; - - if (!svga->scrblank && svga->attr_palette_enable) { - if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { - if (svga->crtc[0x3a] & 0x10) { /*256+ color register*/ - svga->gdcreg[5] |= 0x40; - } - } - } - - svga->ma_latch |= (s3->ma_ext << 16); - if (s3->chip >= S3_86C928) { - svga->hdisp = svga->hdisp_old; - - if (svga->crtc[0x5d] & 0x01) svga->htotal |= 0x100; - if (svga->crtc[0x5d] & 0x02) { - svga->hdisp_time |= 0x100; - svga->hdisp |= 0x100 * ((svga->seqregs[1] & 8) ? 16 : 8); - } - if (svga->crtc[0x5e] & 0x01) svga->vtotal |= 0x400; - if (svga->crtc[0x5e] & 0x02) svga->dispend |= 0x400; - if (svga->crtc[0x5e] & 0x04) svga->vblankstart |= 0x400; - if (svga->crtc[0x5e] & 0x10) svga->vsyncstart |= 0x400; - if (svga->crtc[0x5e] & 0x40) svga->split |= 0x400; - if (s3->accel.advfunc_cntl & 0x01) - svga->split = 0x7fff; - if (svga->crtc[0x51] & 0x30) svga->rowoffset |= (svga->crtc[0x51] & 0x30) << 4; - else if (svga->crtc[0x43] & 0x04) svga->rowoffset |= 0x100; - } - if (!svga->rowoffset) svga->rowoffset = 256; - - if ((s3->chip == S3_VISION964) || (s3->chip == S3_86C928)) { - if (s3->card_type == S3_ELSAWIN2KPROX_964) - ibm_rgb528_recalctimings(svga->ramdac, svga); - else - bt48x_recalctimings(svga->ramdac, svga); - } else if (s3->chip == S3_VISION968) { - if (s3->card_type == S3_SPEA_MERCURY_P64V || s3->card_type == S3_MIROVIDEO40SV_ERGO_968) - tvp3026_recalctimings(svga->ramdac, svga); - else - ibm_rgb528_recalctimings(svga->ramdac, svga); - } else - svga->interlace = !!(svga->crtc[0x42] & 0x20); - - if ((((svga->miscout >> 2) & 3) == 3) && s3->chip < S3_TRIO32) - clk_sel = svga->crtc[0x42] & 0x0f; - - svga->clock = (cpuclock * (double)(1ull << 32)) / svga->getclock(clk_sel, svga->clock_gen); - - switch (svga->crtc[0x67] >> 4) { - case 3: case 5: case 7: - svga->clock /= 2; - break; - } - - svga->lowres = !((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)); - - if (s3->card_type == S3_MIROCRYSTAL10SD_805 || s3->card_type == S3_MIROCRYSTAL20SD_864 || - s3->card_type == S3_MIROCRYSTAL20SV_964 || s3->card_type == S3_SPEA_MIRAGE_86C801 || - s3->card_type == S3_SPEA_MIRAGE_86C805 || s3->card_type == S3_MIROCRYSTAL8S_805 || - s3->card_type == S3_NUMBER9_9FX_531 || s3->card_type == S3_SPEA_MERCURY_LITE_PCI) { - if (!(svga->crtc[0x5e] & 0x04)) - svga->vblankstart = svga->dispend; - if (svga->bpp != 32) { - if (svga->crtc[0x31] & 2) /*This is needed if the pixel width gets set with delays*/ - s3->width = 2048; - else { - if (s3->card_type == S3_MIROCRYSTAL10SD_805) { - if (svga->hdisp == 1280 && s3->width == 1024) { - s3->width = 1280; - } - } - } - } else { - if (s3->card_type == S3_NUMBER9_9FX_531) { - if (svga->hdisp == 1600 && s3->width == 1600) - s3->width = 800; - } - } - } else if (s3->chip == S3_86C928) { - if (svga->bpp == 15) { - if (s3->width == 800) - s3->width = 1024; - } - } - - if ((svga->crtc[0x43] & 0x08) && (s3->color_16bit == 0) && (s3->chip <= S3_86C805)) { - s3->color_16bit = 1; - s3->width = 1024; - } else if (!(svga->crtc[0x43] & 0x08) && (s3->color_16bit == 1) && (s3->chip <= S3_86C805)) { - s3->color_16bit = 0; - if (s3->chip <= S3_86C924) { - if (s3->accel.advfunc_cntl & 4) - s3->width = 1024; - else - s3->width = 640; - } - } - - if ((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)) { - switch (svga->bpp) { - case 8: - svga->render = svga_render_8bpp_highres; - if (s3->chip != S3_VISION868) { - if (s3->chip == S3_86C928) { - if (s3->width == 2048 || s3->width == 1280 || s3->width == 1600) - svga->hdisp <<= 1; - } else if ((s3->chip != S3_86C801) && (s3->chip != S3_86C805) && (s3->chip != S3_TRIO32) && - (s3->chip != S3_TRIO64) && (s3->chip != S3_VISION964) && (s3->chip != S3_VISION968)) { - if (s3->width == 1280 || s3->width == 1600) - svga->hdisp <<= 1; - } else if ((s3->card_type == S3_ELSAWIN2KPROX_964) || (s3->card_type == S3_ELSAWIN2KPROX)) { - if (s3->width == 1280 || s3->width == 1600) - svga->hdisp <<= 1; - } else if (s3->card_type == S3_SPEA_MERCURY_P64V) { - if (s3->width == 1280 || s3->width == 1600) - svga->hdisp <<= 1; - } else if (s3->card_type == S3_NUMBER9_9FX_771) - svga->hdisp <<= 1; - - if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968 || s3->card_type == S3_MIROCRYSTAL20SD_864 || - s3->card_type == S3_PHOENIX_VISION968 || s3->card_type == S3_SPEA_MERCURY_P64V) { - if (svga->hdisp != 1408) - svga->hdisp = s3->width; - if (s3->card_type == S3_MIROCRYSTAL20SD_864) { - if (s3->width == 2048 || s3->width == 1600 || s3->width == 800) { - switch (svga->dispend) { - case 400: - case 480: - svga->hdisp = 640; - break; - - case 576: - svga->hdisp = 768; - break; - - case 600: - if (s3->width == 1600) - s3->width = 800; - svga->hdisp = 800; - break; - - case 768: - svga->hdisp = 1024; - break; - - case 864: - svga->hdisp = 1152; - break; - - case 1024: - if (svga->vtotal == 1066) - svga->hdisp = 1280; - break; - } - } - } - } - if (s3->card_type == S3_MIROCRYSTAL10SD_805 || s3->card_type == S3_MIROCRYSTAL8S_805) { - if (svga->rowoffset == 256 && (((svga->crtc[0x51] & 0x30) == 0x00 && !(svga->crtc[0x43] & 0x04)))) - svga->rowoffset >>= 1; - } - } - break; - case 15: - svga->render = svga_render_15bpp_highres; - if ((s3->chip != S3_VISION964) && (s3->card_type != S3_SPEA_MIRAGE_86C801) && - (s3->card_type != S3_SPEA_MIRAGE_86C805)) { - if (s3->chip == S3_86C928) - svga->hdisp <<= 1; - else if (s3->chip != S3_VISION968) - svga->hdisp >>= 1; - } - if ((s3->chip != S3_VISION868) && (s3->chip != S3_TRIO32) && - (s3->chip != S3_TRIO64) && (s3->chip != S3_VISION964)) { - if (s3->width == 1280 || s3->width == 1600) - svga->hdisp <<= 1; - else if (s3->card_type == S3_NUMBER9_9FX_771) - svga->hdisp <<= 1; - } - if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968 || s3->card_type == S3_PHOENIX_VISION968 || - s3->card_type == S3_SPEA_MERCURY_P64V) { - if (svga->hdisp == (1408*2)) - svga->hdisp >>= 1; - else - svga->hdisp = s3->width; - } - - if (s3->card_type == S3_SPEA_MIRAGE_86C801 || s3->card_type == S3_SPEA_MIRAGE_86C805 || - s3->card_type == S3_SPEA_MERCURY_LITE_PCI) - svga->hdisp = s3->width; - break; - case 16: - svga->render = svga_render_16bpp_highres; - if ((s3->card_type == S3_ELSAWIN2KPROX_964) || (s3->card_type == S3_ELSAWIN2KPROX)) { - if (s3->width == 1280 || s3->width == 1600) - svga->hdisp <<= 1; - } - if ((s3->chip != S3_VISION964) && (s3->card_type != S3_SPEA_MIRAGE_86C801) && - (s3->card_type != S3_SPEA_MIRAGE_86C805)) { - if (s3->chip == S3_86C928) - svga->hdisp <<= 1; - else if (s3->chip != S3_VISION968) - svga->hdisp >>= 1; - } else if ((s3->card_type == S3_SPEA_MIRAGE_86C801) || (s3->card_type == S3_SPEA_MIRAGE_86C805)) - svga->hdisp >>= 1; - if ((s3->chip != S3_VISION868) && (s3->chip != S3_TRIO32) && - (s3->chip != S3_TRIO64) && (s3->chip != S3_VISION964)) { - if (s3->width == 1280 || s3->width == 1600) - svga->hdisp <<= 1; - else if (s3->card_type == S3_NUMBER9_9FX_771) - svga->hdisp <<= 1; - } - if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968 || s3->card_type == S3_PHOENIX_VISION968 || - s3->card_type == S3_SPEA_MERCURY_P64V) { - if (svga->hdisp == (1408*2)) - svga->hdisp >>= 1; - else - svga->hdisp = s3->width; - } - - if (s3->card_type == S3_SPEA_MIRAGE_86C801 || s3->card_type == S3_SPEA_MIRAGE_86C805 || - s3->card_type == S3_SPEA_MERCURY_LITE_PCI) - svga->hdisp = s3->width; - break; - case 24: - svga->render = svga_render_24bpp_highres; - if (s3->chip != S3_VISION968) { - if (s3->chip != S3_86C928 && s3->chip != S3_86C801 && s3->chip != S3_86C805) - svga->hdisp /= 3; - else - svga->hdisp = (svga->hdisp * 2) / 3; - - if (s3->card_type == S3_SPEA_MERCURY_LITE_PCI) { - if (s3->width == 2048) - switch (svga->dispend) { - case 480: - svga->hdisp = 640; - break; - } - } - } else { - if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968 || s3->card_type == S3_PHOENIX_VISION968 || - s3->card_type == S3_SPEA_MERCURY_P64V) - svga->hdisp = s3->width; - } - break; - case 32: - svga->render = svga_render_32bpp_highres; - if ((s3->chip < S3_TRIO32) && (s3->chip != S3_VISION964) && - (s3->chip != S3_VISION968) && (s3->chip != S3_86C928)) { - if (s3->chip == S3_VISION868) - svga->hdisp >>= 1; - else - svga->hdisp >>= 2; - } - if (s3->width == 1280 || s3->width == 1600 || (s3->card_type == S3_SPEA_MERCURY_P64V || - s3->card_type == S3_NUMBER9_9FX_771)) - svga->hdisp <<= 1; - if (s3->card_type == S3_NUMBER9_9FX_771) { - if (svga->hdisp == 832) - svga->hdisp -= 32; + case 0x3c5: + if (svga->seqaddr >= 0x10 && svga->seqaddr < 0x20) { + temp = svga->seqregs[svga->seqaddr]; + /* This is needed for the Intel Advanced/ATX's built-in S3 Trio64V+ BIOS to not + get stuck in an infinite loop. */ + if ((s3->card_type == S3_PHOENIX_TRIO64VPLUS_ONBOARD) && (svga->seqaddr == 0x17)) + svga->seqregs[svga->seqaddr] ^= 0x01; + return temp; } - if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968 || s3->card_type == S3_MIROCRYSTAL20SV_964 || - s3->card_type == S3_MIROCRYSTAL20SD_864 || s3->card_type == S3_PHOENIX_VISION968 || - s3->card_type == S3_SPEA_MERCURY_P64V) { - svga->hdisp = s3->width; - if (s3->card_type == S3_MIROCRYSTAL20SD_864 || s3->card_type == S3_MIROCRYSTAL20SV_964) { - if (s3->width == 800 || s3->width == 1024 || s3->width == 1600) { - switch (svga->dispend) { - case 400: - case 480: - svga->hdisp = 640; - break; + break; - case 576: - if (s3->width == 1600) - s3->width = 800; - svga->hdisp = 768; - break; + case 0x3c6: + case 0x3c7: + case 0x3c8: + case 0x3c9: + rs2 = (svga->crtc[0x55] & 0x01) || !!(svga->crtc[0x43] & 2); + if (s3->chip >= S3_TRIO32) + return svga_in(addr, svga); + else if ((s3->chip == S3_VISION964 && s3->card_type != S3_ELSAWIN2KPROX_964) || (s3->chip == S3_86C928)) { + rs3 = !!(svga->crtc[0x55] & 0x02); + return bt48x_ramdac_in(addr, rs2, rs3, svga->ramdac, svga); + } else if ((s3->chip == S3_VISION964 && s3->card_type == S3_ELSAWIN2KPROX_964) || (s3->chip == S3_VISION968 && (s3->card_type == S3_ELSAWIN2KPROX || s3->card_type == S3_PHOENIX_VISION968 || s3->card_type == S3_NUMBER9_9FX_771))) + return ibm_rgb528_ramdac_in(addr, rs2, svga->ramdac, svga); + else if ((s3->chip == S3_VISION968 && (s3->card_type == S3_SPEA_MERCURY_P64V || s3->card_type == S3_MIROVIDEO40SV_ERGO_968))) { + rs3 = !!(svga->crtc[0x55] & 0x02); + return tvp3026_ramdac_in(addr, rs2, rs3, svga->ramdac, svga); + } else if (((s3->chip == S3_86C801) || (s3->chip == S3_86C805)) && (s3->card_type != S3_MIROCRYSTAL10SD_805 && s3->card_type != S3_MIROCRYSTAL8S_805)) + return att49x_ramdac_in(addr, rs2, svga->ramdac, svga); + else if (s3->chip <= S3_86C924) + return sc1148x_ramdac_in(addr, rs2, svga->ramdac, svga); + else if (s3->card_type == S3_NUMBER9_9FX_531) + return att498_ramdac_in(addr, rs2, svga->ramdac, svga); + else if ((s3->chip == S3_86C928PCI) && (s3->card_type == S3_SPEA_MERCURY_LITE_PCI)) + return sc1502x_ramdac_in(addr, svga->ramdac, svga); + else + return sdac_ramdac_in(addr, rs2, svga->ramdac, svga); + break; - case 600: - if (s3->width == 1600) - s3->width = 800; - svga->hdisp = 800; - break; - } - } - } - } - break; - } - } else { - if (!svga->scrblank && svga->attr_palette_enable) { - if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { - if ((svga->crtc[0x31] & 0x08) && ((svga->gdcreg[5] & 0x60) == 0x00)) { - if (svga->bpp == 8) { - svga->render = svga_render_8bpp_highres; /*Enhanced 4bpp mode, just like the 8bpp mode per spec.*/ - if (svga->hdisp <= 1024) - s3->width = 1024; - } - } - } else { - if (s3->chip <= S3_86C924) - s3->width = 1024; - } - } - } + case 0x3d4: + return svga->crtcreg; + case 0x3d5: + switch (svga->crtcreg) { + case 0x2d: + return (s3->chip == S3_TRIO64V2) ? 0x89 : 0x88; /*Extended chip ID*/ + case 0x2e: + return s3->id_ext; /*New chip ID*/ + case 0x2f: + return (s3->chip == S3_TRIO64V) ? 0x40 : 0; /*Revision level*/ + case 0x30: + return s3->id; /*Chip ID*/ + case 0x31: + return (svga->crtc[0x31] & 0xcf) | ((s3->ma_ext & 3) << 4); + case 0x35: + return (svga->crtc[0x35] & 0xf0) | (s3->bank & 0xf); + case 0x45: + s3->hwc_col_stack_pos = 0; + break; + case 0x51: + return (svga->crtc[0x51] & 0xf0) | ((s3->bank >> 2) & 0xc) | ((s3->ma_ext >> 2) & 3); + case 0x5c: /* General Output Port Register */ + temp = svga->crtc[svga->crtcreg] & 0xa0; + if (((svga->miscout >> 2) & 3) == 3) + temp |= svga->crtc[0x42] & 0x0f; + else + temp |= ((svga->miscout >> 2) & 3); + if ((temp & 0xa0) == 0xa0) { + if ((svga->crtc[0x5c] & 0x40) && i2c_gpio_get_scl(s3->i2c)) + temp |= 0x40; + if ((svga->crtc[0x5c] & 0x10) && i2c_gpio_get_sda(s3->i2c)) + temp |= 0x10; + } + return temp; + case 0x69: + return s3->ma_ext; + case 0x6a: + return s3->bank; + /* Phoenix S3 video BIOS'es seem to expect CRTC registers 6B and 6C + to be mirrors of 59 and 5A. */ + case 0x6b: + if (s3->chip != S3_TRIO64V2) { + if (svga->crtc[0x53] & 0x08) { + return (s3->chip == S3_TRIO64V) ? (svga->crtc[0x59] & 0xfc) : (svga->crtc[0x59] & 0xfe); + } else { + return svga->crtc[0x59]; + } + } else + return svga->crtc[0x6b]; + break; + case 0x6c: + if (s3->chip != S3_TRIO64V2) { + if (svga->crtc[0x53] & 0x08) { + return 0x00; + } else + return (svga->crtc[0x5a] & 0x80); + } else + return svga->crtc[0x6c]; + break; + } + return svga->crtc[svga->crtcreg]; + } + return svga_in(addr, svga); } -static void s3_trio64v_recalctimings(svga_t *svga) +static void +s3_recalctimings(svga_t *svga) { - s3_t *s3 = (s3_t *)svga->p; - int clk_sel = (svga->miscout >> 2) & 3; + s3_t *s3 = (s3_t *) svga->p; + int clk_sel = (svga->miscout >> 2) & 3; - if (!svga->scrblank && svga->attr_palette_enable) { - if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { - if (svga->crtc[0x3a] & 0x10) /*256+ color register*/ - svga->gdcreg[5] |= 0x40; - } - } - svga->hdisp = svga->hdisp_old; - if (svga->crtc[0x5d] & 0x01) svga->htotal |= 0x100; - if (svga->crtc[0x5d] & 0x02) { - svga->hdisp_time |= 0x100; - svga->hdisp |= 0x100 * ((svga->seqregs[1] & 8) ? 16 : 8); - } - if (svga->crtc[0x5e] & 0x01) svga->vtotal |= 0x400; - if (svga->crtc[0x5e] & 0x02) svga->dispend |= 0x400; - if (svga->crtc[0x5e] & 0x04) svga->vblankstart |= 0x400; - if (svga->crtc[0x5e] & 0x10) svga->vsyncstart |= 0x400; - if (svga->crtc[0x5e] & 0x40) svga->split |= 0x400; - svga->interlace = svga->crtc[0x42] & 0x20; - - svga->clock = (cpuclock * (double)(1ull << 32)) / svga->getclock(clk_sel, svga->clock_gen); - - if ((svga->crtc[0x67] & 0xc) != 0xc) /*VGA mode*/ - { - svga->ma_latch |= (s3->ma_ext << 16); - if (svga->crtc[0x51] & 0x30) svga->rowoffset |= (svga->crtc[0x51] & 0x30) << 4; - else if (svga->crtc[0x43] & 0x04) svga->rowoffset |= 0x100; - if (!svga->rowoffset) svga->rowoffset = 256; - - svga->lowres = !((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)); - - if ((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)) { - switch (svga->bpp) { - case 8: - svga->render = svga_render_8bpp_highres; - break; - case 15: - svga->render = svga_render_15bpp_highres; - svga->hdisp >>= 1; - break; - case 16: - svga->render = svga_render_16bpp_highres; - svga->hdisp >>= 1; - break; - case 24: - svga->render = svga_render_24bpp_highres; - svga->hdisp /= 3; - break; - case 32: - svga->render = svga_render_32bpp_highres; - break; - } - } - } - else /*Streams mode*/ - { - if (s3->streams.buffer_ctrl & 1) - svga->ma_latch = s3->streams.pri_fb1 >> 2; - else - svga->ma_latch = s3->streams.pri_fb0 >> 2; - - svga->hdisp = s3->streams.pri_w + 1; - if (s3->streams.pri_h < svga->dispend) - svga->dispend = s3->streams.pri_h; - - svga->overlay.x = s3->streams.sec_x - s3->streams.pri_x; - svga->overlay.y = s3->streams.sec_y - s3->streams.pri_y; - svga->overlay.cur_ysize = s3->streams.sec_h; - - if (s3->streams.buffer_ctrl & 2) - svga->overlay.addr = s3->streams.sec_fb1; - else - svga->overlay.addr = s3->streams.sec_fb0; - - svga->overlay.ena = (svga->overlay.x >= 0); - svga->overlay.v_acc = s3->streams.dda_vert_accumulator; - svga->rowoffset = s3->streams.pri_stride >> 3; - - switch ((s3->streams.pri_ctrl >> 24) & 0x7) - { - case 0: /*RGB-8 (CLUT)*/ - svga->render = svga_render_8bpp_highres; - break; - case 3: /*KRGB-16 (1.5.5.5)*/ - svga->htotal >>= 1; - svga->render = svga_render_15bpp_highres; - break; - case 5: /*RGB-16 (5.6.5)*/ - svga->htotal >>= 1; - svga->render = svga_render_16bpp_highres; - break; - case 6: /*RGB-24 (8.8.8)*/ - svga->render = svga_render_24bpp_highres; - break; - case 7: /*XRGB-32 (X.8.8.8)*/ - svga->render = svga_render_32bpp_highres; - break; - } + if (!svga->scrblank && svga->attr_palette_enable) { + if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { + if (svga->crtc[0x3a] & 0x10) { /*256+ color register*/ + svga->gdcreg[5] |= 0x40; + } } + } + + svga->ma_latch |= (s3->ma_ext << 16); + if (s3->chip >= S3_86C928) { + svga->hdisp = svga->hdisp_old; + + if (svga->crtc[0x5d] & 0x01) + svga->htotal |= 0x100; + if (svga->crtc[0x5d] & 0x02) { + svga->hdisp_time |= 0x100; + svga->hdisp |= 0x100 * ((svga->seqregs[1] & 8) ? 16 : 8); + } + if (svga->crtc[0x5e] & 0x01) + svga->vtotal |= 0x400; + if (svga->crtc[0x5e] & 0x02) + svga->dispend |= 0x400; + if (svga->crtc[0x5e] & 0x04) + svga->vblankstart |= 0x400; + if (svga->crtc[0x5e] & 0x10) + svga->vsyncstart |= 0x400; + if (svga->crtc[0x5e] & 0x40) + svga->split |= 0x400; + if (s3->accel.advfunc_cntl & 0x01) + svga->split = 0x7fff; + if (svga->crtc[0x51] & 0x30) + svga->rowoffset |= (svga->crtc[0x51] & 0x30) << 4; + else if (svga->crtc[0x43] & 0x04) + svga->rowoffset |= 0x100; + } + if (!svga->rowoffset) + svga->rowoffset = 256; + + if ((s3->chip == S3_VISION964) || (s3->chip == S3_86C928)) { + if (s3->card_type == S3_ELSAWIN2KPROX_964) + ibm_rgb528_recalctimings(svga->ramdac, svga); + else + bt48x_recalctimings(svga->ramdac, svga); + } else if (s3->chip == S3_VISION968) { + if (s3->card_type == S3_SPEA_MERCURY_P64V || s3->card_type == S3_MIROVIDEO40SV_ERGO_968) + tvp3026_recalctimings(svga->ramdac, svga); + else + ibm_rgb528_recalctimings(svga->ramdac, svga); + } else + svga->interlace = !!(svga->crtc[0x42] & 0x20); + + if ((((svga->miscout >> 2) & 3) == 3) && s3->chip < S3_TRIO32) + clk_sel = svga->crtc[0x42] & 0x0f; + + svga->clock = (cpuclock * (double) (1ull << 32)) / svga->getclock(clk_sel, svga->clock_gen); + + switch (svga->crtc[0x67] >> 4) { + case 3: + case 5: + case 7: + svga->clock /= 2; + break; + } + + svga->lowres = !((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)); + + if (s3->card_type == S3_MIROCRYSTAL10SD_805 || s3->card_type == S3_MIROCRYSTAL20SD_864 || s3->card_type == S3_MIROCRYSTAL20SV_964 || s3->card_type == S3_SPEA_MIRAGE_86C801 || s3->card_type == S3_SPEA_MIRAGE_86C805 || s3->card_type == S3_MIROCRYSTAL8S_805 || s3->card_type == S3_NUMBER9_9FX_531 || s3->card_type == S3_SPEA_MERCURY_LITE_PCI) { + if (!(svga->crtc[0x5e] & 0x04)) + svga->vblankstart = svga->dispend; + if (svga->bpp != 32) { + if (svga->crtc[0x31] & 2) /*This is needed if the pixel width gets set with delays*/ + s3->width = 2048; + else { + if (s3->card_type == S3_MIROCRYSTAL10SD_805) { + if (svga->hdisp == 1280 && s3->width == 1024) { + s3->width = 1280; + } + } + } + } else { + if (s3->card_type == S3_NUMBER9_9FX_531) { + if (svga->hdisp == 1600 && s3->width == 1600) + s3->width = 800; + } + } + } else if (s3->chip == S3_86C928) { + if (svga->bpp == 15) { + if (s3->width == 800) + s3->width = 1024; + } + } + + if ((svga->crtc[0x43] & 0x08) && (s3->color_16bit == 0) && (s3->chip <= S3_86C805)) { + s3->color_16bit = 1; + s3->width = 1024; + } else if (!(svga->crtc[0x43] & 0x08) && (s3->color_16bit == 1) && (s3->chip <= S3_86C805)) { + s3->color_16bit = 0; + if (s3->chip <= S3_86C924) { + if (s3->accel.advfunc_cntl & 4) + s3->width = 1024; + else + s3->width = 640; + } + } + + if ((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)) { + switch (svga->bpp) { + case 8: + svga->render = svga_render_8bpp_highres; + if (s3->chip != S3_VISION868) { + if (s3->chip == S3_86C928) { + if (s3->width == 2048 || s3->width == 1280 || s3->width == 1600) + svga->hdisp <<= 1; + } else if ((s3->chip != S3_86C801) && (s3->chip != S3_86C805) && (s3->chip != S3_TRIO32) && (s3->chip != S3_TRIO64) && (s3->chip != S3_VISION964) && (s3->chip != S3_VISION968)) { + if (s3->width == 1280 || s3->width == 1600) + svga->hdisp <<= 1; + } else if ((s3->card_type == S3_ELSAWIN2KPROX_964) || (s3->card_type == S3_ELSAWIN2KPROX)) { + if (s3->width == 1280 || s3->width == 1600) + svga->hdisp <<= 1; + } else if (s3->card_type == S3_SPEA_MERCURY_P64V) { + if (s3->width == 1280 || s3->width == 1600) + svga->hdisp <<= 1; + } else if (s3->card_type == S3_NUMBER9_9FX_771) + svga->hdisp <<= 1; + + if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968 || s3->card_type == S3_MIROCRYSTAL20SD_864 || s3->card_type == S3_PHOENIX_VISION968 || s3->card_type == S3_SPEA_MERCURY_P64V) { + if (svga->hdisp != 1408) + svga->hdisp = s3->width; + if (s3->card_type == S3_MIROCRYSTAL20SD_864) { + if (s3->width == 2048 || s3->width == 1600 || s3->width == 800) { + switch (svga->dispend) { + case 400: + case 480: + svga->hdisp = 640; + break; + + case 576: + svga->hdisp = 768; + break; + + case 600: + if (s3->width == 1600) + s3->width = 800; + svga->hdisp = 800; + break; + + case 768: + svga->hdisp = 1024; + break; + + case 864: + svga->hdisp = 1152; + break; + + case 1024: + if (svga->vtotal == 1066) + svga->hdisp = 1280; + break; + } + } + } + } + if (s3->card_type == S3_MIROCRYSTAL10SD_805 || s3->card_type == S3_MIROCRYSTAL8S_805) { + if (svga->rowoffset == 256 && (((svga->crtc[0x51] & 0x30) == 0x00 && !(svga->crtc[0x43] & 0x04)))) + svga->rowoffset >>= 1; + } + } + break; + case 15: + svga->render = svga_render_15bpp_highres; + if ((s3->chip != S3_VISION964) && (s3->card_type != S3_SPEA_MIRAGE_86C801) && (s3->card_type != S3_SPEA_MIRAGE_86C805)) { + if (s3->chip == S3_86C928) + svga->hdisp <<= 1; + else if (s3->chip != S3_VISION968) + svga->hdisp >>= 1; + } + if ((s3->chip != S3_VISION868) && (s3->chip != S3_TRIO32) && (s3->chip != S3_TRIO64) && (s3->chip != S3_VISION964)) { + if (s3->width == 1280 || s3->width == 1600) + svga->hdisp <<= 1; + else if (s3->card_type == S3_NUMBER9_9FX_771) + svga->hdisp <<= 1; + } + if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968 || s3->card_type == S3_PHOENIX_VISION968 || s3->card_type == S3_SPEA_MERCURY_P64V) { + if (svga->hdisp == (1408 * 2)) + svga->hdisp >>= 1; + else + svga->hdisp = s3->width; + } + + if (s3->card_type == S3_SPEA_MIRAGE_86C801 || s3->card_type == S3_SPEA_MIRAGE_86C805 || s3->card_type == S3_SPEA_MERCURY_LITE_PCI) + svga->hdisp = s3->width; + break; + case 16: + svga->render = svga_render_16bpp_highres; + if ((s3->card_type == S3_ELSAWIN2KPROX_964) || (s3->card_type == S3_ELSAWIN2KPROX)) { + if (s3->width == 1280 || s3->width == 1600) + svga->hdisp <<= 1; + } + if ((s3->chip != S3_VISION964) && (s3->card_type != S3_SPEA_MIRAGE_86C801) && (s3->card_type != S3_SPEA_MIRAGE_86C805)) { + if (s3->chip == S3_86C928) + svga->hdisp <<= 1; + else if (s3->chip != S3_VISION968) + svga->hdisp >>= 1; + } else if ((s3->card_type == S3_SPEA_MIRAGE_86C801) || (s3->card_type == S3_SPEA_MIRAGE_86C805)) + svga->hdisp >>= 1; + if ((s3->chip != S3_VISION868) && (s3->chip != S3_TRIO32) && (s3->chip != S3_TRIO64) && (s3->chip != S3_VISION964)) { + if (s3->width == 1280 || s3->width == 1600) + svga->hdisp <<= 1; + else if (s3->card_type == S3_NUMBER9_9FX_771) + svga->hdisp <<= 1; + } + if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968 || s3->card_type == S3_PHOENIX_VISION968 || s3->card_type == S3_SPEA_MERCURY_P64V) { + if (svga->hdisp == (1408 * 2)) + svga->hdisp >>= 1; + else + svga->hdisp = s3->width; + } + + if (s3->card_type == S3_SPEA_MIRAGE_86C801 || s3->card_type == S3_SPEA_MIRAGE_86C805 || s3->card_type == S3_SPEA_MERCURY_LITE_PCI) + svga->hdisp = s3->width; + break; + case 24: + svga->render = svga_render_24bpp_highres; + if (s3->chip != S3_VISION968) { + if (s3->chip != S3_86C928 && s3->chip != S3_86C801 && s3->chip != S3_86C805) + svga->hdisp /= 3; + else + svga->hdisp = (svga->hdisp * 2) / 3; + + if (s3->card_type == S3_SPEA_MERCURY_LITE_PCI) { + if (s3->width == 2048) + switch (svga->dispend) { + case 480: + svga->hdisp = 640; + break; + } + } + } else { + if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968 || s3->card_type == S3_PHOENIX_VISION968 || s3->card_type == S3_SPEA_MERCURY_P64V) + svga->hdisp = s3->width; + } + break; + case 32: + svga->render = svga_render_32bpp_highres; + if ((s3->chip < S3_TRIO32) && (s3->chip != S3_VISION964) && (s3->chip != S3_VISION968) && (s3->chip != S3_86C928)) { + if (s3->chip == S3_VISION868) + svga->hdisp >>= 1; + else + svga->hdisp >>= 2; + } + if (s3->width == 1280 || s3->width == 1600 || (s3->card_type == S3_SPEA_MERCURY_P64V || s3->card_type == S3_NUMBER9_9FX_771)) + svga->hdisp <<= 1; + if (s3->card_type == S3_NUMBER9_9FX_771) { + if (svga->hdisp == 832) + svga->hdisp -= 32; + } + if (s3->card_type == S3_MIROVIDEO40SV_ERGO_968 || s3->card_type == S3_MIROCRYSTAL20SV_964 || s3->card_type == S3_MIROCRYSTAL20SD_864 || s3->card_type == S3_PHOENIX_VISION968 || s3->card_type == S3_SPEA_MERCURY_P64V) { + svga->hdisp = s3->width; + if (s3->card_type == S3_MIROCRYSTAL20SD_864 || s3->card_type == S3_MIROCRYSTAL20SV_964) { + if (s3->width == 800 || s3->width == 1024 || s3->width == 1600) { + switch (svga->dispend) { + case 400: + case 480: + svga->hdisp = 640; + break; + + case 576: + if (s3->width == 1600) + s3->width = 800; + svga->hdisp = 768; + break; + + case 600: + if (s3->width == 1600) + s3->width = 800; + svga->hdisp = 800; + break; + } + } + } + } + break; + } + } else { + if (!svga->scrblank && svga->attr_palette_enable) { + if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { + if ((svga->crtc[0x31] & 0x08) && ((svga->gdcreg[5] & 0x60) == 0x00)) { + if (svga->bpp == 8) { + svga->render = svga_render_8bpp_highres; /*Enhanced 4bpp mode, just like the 8bpp mode per spec.*/ + if (svga->hdisp <= 1024) + s3->width = 1024; + } + } + } else { + if (s3->chip <= S3_86C924) + s3->width = 1024; + } + } + } +} + +static void +s3_trio64v_recalctimings(svga_t *svga) +{ + s3_t *s3 = (s3_t *) svga->p; + int clk_sel = (svga->miscout >> 2) & 3; + + if (!svga->scrblank && svga->attr_palette_enable) { + if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { + if (svga->crtc[0x3a] & 0x10) /*256+ color register*/ + svga->gdcreg[5] |= 0x40; + } + } + svga->hdisp = svga->hdisp_old; + if (svga->crtc[0x5d] & 0x01) + svga->htotal |= 0x100; + if (svga->crtc[0x5d] & 0x02) { + svga->hdisp_time |= 0x100; + svga->hdisp |= 0x100 * ((svga->seqregs[1] & 8) ? 16 : 8); + } + if (svga->crtc[0x5e] & 0x01) + svga->vtotal |= 0x400; + if (svga->crtc[0x5e] & 0x02) + svga->dispend |= 0x400; + if (svga->crtc[0x5e] & 0x04) + svga->vblankstart |= 0x400; + if (svga->crtc[0x5e] & 0x10) + svga->vsyncstart |= 0x400; + if (svga->crtc[0x5e] & 0x40) + svga->split |= 0x400; + svga->interlace = svga->crtc[0x42] & 0x20; + + svga->clock = (cpuclock * (double) (1ull << 32)) / svga->getclock(clk_sel, svga->clock_gen); + + if ((svga->crtc[0x67] & 0xc) != 0xc) /*VGA mode*/ + { + svga->ma_latch |= (s3->ma_ext << 16); + if (svga->crtc[0x51] & 0x30) + svga->rowoffset |= (svga->crtc[0x51] & 0x30) << 4; + else if (svga->crtc[0x43] & 0x04) + svga->rowoffset |= 0x100; + if (!svga->rowoffset) + svga->rowoffset = 256; + + svga->lowres = !((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)); + + if ((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)) { + switch (svga->bpp) { + case 8: + svga->render = svga_render_8bpp_highres; + break; + case 15: + svga->render = svga_render_15bpp_highres; + svga->hdisp >>= 1; + break; + case 16: + svga->render = svga_render_16bpp_highres; + svga->hdisp >>= 1; + break; + case 24: + svga->render = svga_render_24bpp_highres; + svga->hdisp /= 3; + break; + case 32: + svga->render = svga_render_32bpp_highres; + break; + } + } + } else /*Streams mode*/ + { + if (s3->streams.buffer_ctrl & 1) + svga->ma_latch = s3->streams.pri_fb1 >> 2; + else + svga->ma_latch = s3->streams.pri_fb0 >> 2; + + svga->hdisp = s3->streams.pri_w + 1; + if (s3->streams.pri_h < svga->dispend) + svga->dispend = s3->streams.pri_h; + + svga->overlay.x = s3->streams.sec_x - s3->streams.pri_x; + svga->overlay.y = s3->streams.sec_y - s3->streams.pri_y; + svga->overlay.cur_ysize = s3->streams.sec_h; + + if (s3->streams.buffer_ctrl & 2) + svga->overlay.addr = s3->streams.sec_fb1; + else + svga->overlay.addr = s3->streams.sec_fb0; + + svga->overlay.ena = (svga->overlay.x >= 0); + svga->overlay.v_acc = s3->streams.dda_vert_accumulator; + svga->rowoffset = s3->streams.pri_stride >> 3; + + switch ((s3->streams.pri_ctrl >> 24) & 0x7) { + case 0: /*RGB-8 (CLUT)*/ + svga->render = svga_render_8bpp_highres; + break; + case 3: /*KRGB-16 (1.5.5.5)*/ + svga->htotal >>= 1; + svga->render = svga_render_15bpp_highres; + break; + case 5: /*RGB-16 (5.6.5)*/ + svga->htotal >>= 1; + svga->render = svga_render_16bpp_highres; + break; + case 6: /*RGB-24 (8.8.8)*/ + svga->render = svga_render_24bpp_highres; + break; + case 7: /*XRGB-32 (X.8.8.8)*/ + svga->render = svga_render_32bpp_highres; + break; + } + } } static void s3_updatemapping(s3_t *s3) { - svga_t *svga = &s3->svga; + svga_t *svga = &s3->svga; - if (s3->pci && !(s3->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) - { - mem_mapping_disable(&svga->mapping); - mem_mapping_disable(&s3->linear_mapping); - mem_mapping_disable(&s3->mmio_mapping); - mem_mapping_disable(&s3->new_mmio_mapping); - return; - } + if (s3->pci && !(s3->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) { + mem_mapping_disable(&svga->mapping); + mem_mapping_disable(&s3->linear_mapping); + mem_mapping_disable(&s3->mmio_mapping); + mem_mapping_disable(&s3->new_mmio_mapping); + return; + } - /*Banked framebuffer*/ - if (svga->crtc[0x31] & 0x08) /*Enhanced mode mappings*/ - { - /* Enhanced mode forces 64kb at 0xa0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); - svga->banked_mask = 0xffff; - } - else switch (svga->gdcreg[6] & 0xc) /*VGA mapping*/ - { - case 0x0: /*128k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); - svga->banked_mask = 0xffff; - break; - case 0x4: /*64k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); - svga->banked_mask = 0xffff; - break; - case 0x8: /*32k at B0000*/ - mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); - svga->banked_mask = 0x7fff; - break; - case 0xC: /*32k at B8000*/ - mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); - svga->banked_mask = 0x7fff; - break; - } + /*Banked framebuffer*/ + if (svga->crtc[0x31] & 0x08) /*Enhanced mode mappings*/ + { + /* Enhanced mode forces 64kb at 0xa0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + svga->banked_mask = 0xffff; + } else + switch (svga->gdcreg[6] & 0xc) /*VGA mapping*/ + { + case 0x0: /*128k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); + svga->banked_mask = 0xffff; + break; + case 0x4: /*64k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + svga->banked_mask = 0xffff; + break; + case 0x8: /*32k at B0000*/ + mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); + svga->banked_mask = 0x7fff; + break; + case 0xC: /*32k at B8000*/ + mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); + svga->banked_mask = 0x7fff; + break; + } - if (s3->chip >= S3_86C928) { - s3->linear_base = (svga->crtc[0x5a] << 16) | (svga->crtc[0x59] << 24); + if (s3->chip >= S3_86C928) { + s3->linear_base = (svga->crtc[0x5a] << 16) | (svga->crtc[0x59] << 24); - if (s3->chip >= S3_86C928 && s3->chip <= S3_86C805) { - if (s3->vlb) - s3->linear_base &= 0x03ffffff; - else - s3->linear_base &= 0x00ffffff; - } + if (s3->chip >= S3_86C928 && s3->chip <= S3_86C805) { + if (s3->vlb) + s3->linear_base &= 0x03ffffff; + else + s3->linear_base &= 0x00ffffff; + } - if ((svga->crtc[0x58] & 0x10) || (s3->accel.advfunc_cntl & 0x10)) - { - /*Linear framebuffer*/ - mem_mapping_disable(&svga->mapping); + if ((svga->crtc[0x58] & 0x10) || (s3->accel.advfunc_cntl & 0x10)) { + /*Linear framebuffer*/ + mem_mapping_disable(&svga->mapping); - switch (svga->crtc[0x58] & 3) - { - case 0: /*64k*/ - s3->linear_size = 0x10000; - break; - case 1: /*1mb*/ - s3->linear_size = 0x100000; - break; - case 2: /*2mb*/ - s3->linear_size = 0x200000; - break; - case 3: /*8mb*/ - switch (s3->chip) { /* Not on video cards that don't support 4MB*/ - case S3_TRIO64: - case S3_TRIO64V: - case S3_TRIO64V2: - case S3_86C928: - case S3_86C928PCI: - s3->linear_size = 0x400000; - break; - default: - s3->linear_size = 0x800000; - break; - } - break; - } - s3->linear_base &= ~(s3->linear_size - 1); - if (s3->linear_base == 0xa0000) { - mem_mapping_disable(&s3->linear_mapping); - if (!(svga->crtc[0x53] & 0x10)) { - mem_mapping_set_addr(&svga->mapping, s3->linear_base, 0x10000); - svga->banked_mask = 0xffff; - } - } else { - if (s3->chip >= S3_TRIO64V) { - s3->linear_base &= 0xfc000000; - } else if (s3->chip == S3_VISION968 || s3->chip == S3_VISION868) { - s3->linear_base &= 0xfe000000; - } + switch (svga->crtc[0x58] & 3) { + case 0: /*64k*/ + s3->linear_size = 0x10000; + break; + case 1: /*1mb*/ + s3->linear_size = 0x100000; + break; + case 2: /*2mb*/ + s3->linear_size = 0x200000; + break; + case 3: /*8mb*/ + switch (s3->chip) { /* Not on video cards that don't support 4MB*/ + case S3_TRIO64: + case S3_TRIO64V: + case S3_TRIO64V2: + case S3_86C928: + case S3_86C928PCI: + s3->linear_size = 0x400000; + break; + default: + s3->linear_size = 0x800000; + break; + } + break; + } + s3->linear_base &= ~(s3->linear_size - 1); + if (s3->linear_base == 0xa0000) { + mem_mapping_disable(&s3->linear_mapping); + if (!(svga->crtc[0x53] & 0x10)) { + mem_mapping_set_addr(&svga->mapping, s3->linear_base, 0x10000); + svga->banked_mask = 0xffff; + } + } else { + if (s3->chip >= S3_TRIO64V) { + s3->linear_base &= 0xfc000000; + } else if (s3->chip == S3_VISION968 || s3->chip == S3_VISION868) { + s3->linear_base &= 0xfe000000; + } - mem_mapping_set_addr(&s3->linear_mapping, s3->linear_base, s3->linear_size); - } - svga->fb_only = 1; - } else { - svga->fb_only = 0; - mem_mapping_disable(&s3->linear_mapping); - } + mem_mapping_set_addr(&s3->linear_mapping, s3->linear_base, s3->linear_size); + } + svga->fb_only = 1; + } else { + svga->fb_only = 0; + mem_mapping_disable(&s3->linear_mapping); + } - /* Memory mapped I/O. */ - if ((svga->crtc[0x53] & 0x10) || (s3->accel.advfunc_cntl & 0x20)) { - mem_mapping_disable(&svga->mapping); - if (s3->chip >= S3_TRIO64V) { - if (svga->crtc[0x53] & 0x20) - mem_mapping_set_addr(&s3->mmio_mapping, 0xb8000, 0x8000); - else - mem_mapping_set_addr(&s3->mmio_mapping, 0xa0000, 0x10000); - } else { - mem_mapping_enable(&s3->mmio_mapping); - } - } else { - mem_mapping_disable(&s3->mmio_mapping); - } + /* Memory mapped I/O. */ + if ((svga->crtc[0x53] & 0x10) || (s3->accel.advfunc_cntl & 0x20)) { + mem_mapping_disable(&svga->mapping); + if (s3->chip >= S3_TRIO64V) { + if (svga->crtc[0x53] & 0x20) + mem_mapping_set_addr(&s3->mmio_mapping, 0xb8000, 0x8000); + else + mem_mapping_set_addr(&s3->mmio_mapping, 0xa0000, 0x10000); + } else { + mem_mapping_enable(&s3->mmio_mapping); + } + } else { + mem_mapping_disable(&s3->mmio_mapping); + } - /* New MMIO. */ - if (svga->crtc[0x53] & 0x08) - mem_mapping_set_addr(&s3->new_mmio_mapping, s3->linear_base + 0x1000000, 0x20000); - else - mem_mapping_disable(&s3->new_mmio_mapping); - } + /* New MMIO. */ + if (svga->crtc[0x53] & 0x08) + mem_mapping_set_addr(&s3->new_mmio_mapping, s3->linear_base + 0x1000000, 0x20000); + else + mem_mapping_disable(&s3->new_mmio_mapping); + } } static float s3_trio64_getclock(int clock, void *p) { - s3_t *s3 = (s3_t *)p; - svga_t *svga = &s3->svga; - float t; - int m, n1, n2; - if (clock == 0) return 25175000.0; - if (clock == 1) return 28322000.0; - m = svga->seqregs[0x13] + 2; - n1 = (svga->seqregs[0x12] & 0x1f) + 2; - n2 = ((svga->seqregs[0x12] >> 5) & 0x07); - t = (14318184.0 * ((float)m / (float)n1)) / (float)(1 << n2); - return t; + s3_t *s3 = (s3_t *) p; + svga_t *svga = &s3->svga; + float t; + int m, n1, n2; + if (clock == 0) + return 25175000.0; + if (clock == 1) + return 28322000.0; + m = svga->seqregs[0x13] + 2; + n1 = (svga->seqregs[0x12] & 0x1f) + 2; + n2 = ((svga->seqregs[0x12] >> 5) & 0x07); + t = (14318184.0 * ((float) m / (float) n1)) / (float) (1 << n2); + return t; } static void s3_accel_out(uint16_t port, uint8_t val, void *p) { - s3_t *s3 = (s3_t *)p; - svga_t *svga = &s3->svga; + s3_t *s3 = (s3_t *) p; + svga_t *svga = &s3->svga; - if (port >= 0x8000) { - if (!s3->enable_8514) - return; + if (port >= 0x8000) { + if (!s3->enable_8514) + return; - if (s3_enable_fifo(s3)) - s3_queue(s3, port, val, FIFO_OUT_BYTE); - else - s3_accel_out_fifo(s3, port, val); - } else { - switch (port) - { - case 0x4148: case 0x42e8: - s3->subsys_stat &= ~val; - s3_update_irqs(s3); - break; - case 0x4149: case 0x42e9: - s3->subsys_cntl = val; - s3_update_irqs(s3); - break; - case 0x4548: case 0x46e8: - s3->accel.setup_md = val; - break; - case 0x4948: case 0x4ae8: - s3->accel.advfunc_cntl = val; - if ((s3->chip > S3_86C805) && ((svga->crtc[0x50] & 0xc1) == 0x80)) { - s3->width = (val & 4) ? 1600 : 800; - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } else if (s3->chip <= S3_86C805) { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - if (s3->chip > S3_86C924) - s3_updatemapping(s3); - break; - } - } + if (s3_enable_fifo(s3)) + s3_queue(s3, port, val, FIFO_OUT_BYTE); + else + s3_accel_out_fifo(s3, port, val); + } else { + switch (port) { + case 0x4148: + case 0x42e8: + s3->subsys_stat &= ~val; + s3_update_irqs(s3); + break; + case 0x4149: + case 0x42e9: + s3->subsys_cntl = val; + s3_update_irqs(s3); + break; + case 0x4548: + case 0x46e8: + s3->accel.setup_md = val; + break; + case 0x4948: + case 0x4ae8: + s3->accel.advfunc_cntl = val; + if ((s3->chip > S3_86C805) && ((svga->crtc[0x50] & 0xc1) == 0x80)) { + s3->width = (val & 4) ? 1600 : 800; + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } else if (s3->chip <= S3_86C805) { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + if (s3->chip > S3_86C924) + s3_updatemapping(s3); + break; + } + } } static void s3_accel_out_w(uint16_t port, uint16_t val, void *p) { - s3_t *s3 = (s3_t *)p; + s3_t *s3 = (s3_t *) p; - if (!s3->enable_8514) - return; + if (!s3->enable_8514) + return; - if (s3_enable_fifo(s3)) - s3_queue(s3, port, val, FIFO_OUT_WORD); - else - s3_accel_out_fifo_w(s3, port, val); + if (s3_enable_fifo(s3)) + s3_queue(s3, port, val, FIFO_OUT_WORD); + else + s3_accel_out_fifo_w(s3, port, val); } static void s3_accel_out_l(uint16_t port, uint32_t val, void *p) { - s3_t *s3 = (s3_t *)p; + s3_t *s3 = (s3_t *) p; - if (!s3->enable_8514) - return; + if (!s3->enable_8514) + return; - if (s3_enable_fifo(s3)) - s3_queue(s3, port, val, FIFO_OUT_DWORD); - else - s3_accel_out_fifo_l(s3, port, val); + if (s3_enable_fifo(s3)) + s3_queue(s3, port, val, FIFO_OUT_DWORD); + else + s3_accel_out_fifo_l(s3, port, val); } static uint8_t s3_accel_in(uint16_t port, void *p) { - s3_t *s3 = (s3_t *)p; - svga_t *svga = &s3->svga; - int temp; + s3_t *s3 = (s3_t *) p; + svga_t *svga = &s3->svga; + int temp; - if (!s3->enable_8514) - return 0xff; + if (!s3->enable_8514) + return 0xff; - switch (port) { - case 0x4148: case 0x42e8: - return s3->subsys_stat; - case 0x4149: case 0x42e9: - return s3->subsys_cntl; + switch (port) { + case 0x4148: + case 0x42e8: + return s3->subsys_stat; + case 0x4149: + case 0x42e9: + return s3->subsys_cntl; - case 0x8148: case 0x82e8: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.cur_y & 0xff; - case 0x8149: case 0x82e9: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.cur_y >> 8; + case 0x8148: + case 0x82e8: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.cur_y & 0xff; + case 0x8149: + case 0x82e9: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.cur_y >> 8; - case 0x8548: case 0x86e8: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.cur_x & 0xff; - case 0x8549: case 0x86e9: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.cur_x >> 8; + case 0x8548: + case 0x86e8: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.cur_x & 0xff; + case 0x8549: + case 0x86e9: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.cur_x >> 8; - case 0x8948: case 0x8ae8: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.desty_axstp & 0xff; - } - break; - case 0x8949: case 0x8ae9: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.desty_axstp >> 8; - } - break; + case 0x8948: + case 0x8ae8: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.desty_axstp & 0xff; + } + break; + case 0x8949: + case 0x8ae9: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.desty_axstp >> 8; + } + break; - case 0x8d48: case 0x8ee8: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.destx_distp & 0xff; - } - break; - case 0x8d49: case 0x8ee9: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.destx_distp >> 8; - } - break; + case 0x8d48: + case 0x8ee8: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.destx_distp & 0xff; + } + break; + case 0x8d49: + case 0x8ee9: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.destx_distp >> 8; + } + break; - case 0x9148: case 0x92e8: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.err_term & 0xff; - case 0x9149: case 0x92e9: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.err_term >> 8; + case 0x9148: + case 0x92e8: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.err_term & 0xff; + case 0x9149: + case 0x92e9: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.err_term >> 8; - case 0x9548: case 0x96e8: - if (s3->chip >= S3_86C928) { - return s3->accel.maj_axis_pcnt & 0xff; - } - break; - case 0x9549: case 0x96e9: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.maj_axis_pcnt >> 8; - } - break; + case 0x9548: + case 0x96e8: + if (s3->chip >= S3_86C928) { + return s3->accel.maj_axis_pcnt & 0xff; + } + break; + case 0x9549: + case 0x96e9: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.maj_axis_pcnt >> 8; + } + break; - case 0x8118: - case 0x9948: case 0x9ae8: - temp = 0; /* FIFO empty */ - if (s3_enable_fifo(s3)) { - if (!s3->blitter_busy) - wake_fifo_thread(s3); - if (FIFO_FULL) - temp = 0xff; - } - return temp; - case 0x8119: - case 0x9949: case 0x9ae9: - temp = 0; - if (s3_enable_fifo(s3)) { - if (!s3->blitter_busy) - wake_fifo_thread(s3); - - if (!FIFO_EMPTY || s3->force_busy) - temp |= 0x02; /*Hardware busy*/ - else - temp |= 0x04; /*FIFO empty*/ - s3->force_busy = 0; - - if (s3->chip >= S3_VISION964) { + case 0x8118: + case 0x9948: + case 0x9ae8: + temp = 0; /* FIFO empty */ + if (s3_enable_fifo(s3)) { + if (!s3->blitter_busy) + wake_fifo_thread(s3); if (FIFO_FULL) - temp |= 0xf8; /*FIFO full*/ - } + temp = 0xff; + } + return temp; + case 0x8119: + case 0x9949: + case 0x9ae9: + temp = 0; + if (s3_enable_fifo(s3)) { + if (!s3->blitter_busy) + wake_fifo_thread(s3); - if (s3->data_available) { - temp |= 0x01; /*Read Data available*/ - s3->data_available = 0; - } - } else { - if (s3->force_busy) { - temp |= 0x02; /*Hardware busy*/ - } - s3->force_busy = 0; - if (s3->data_available) { - temp |= 0x01; /*Read Data available*/ - s3->data_available = 0; - } - } - return temp; + if (!FIFO_EMPTY || s3->force_busy) + temp |= 0x02; /*Hardware busy*/ + else + temp |= 0x04; /*FIFO empty*/ + s3->force_busy = 0; - case 0x9d48: case 0x9ee8: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.short_stroke & 0xff; - } - break; - case 0x9d49: case 0x9ee9: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.short_stroke >> 8; - } - break; + if (s3->chip >= S3_VISION964) { + if (FIFO_FULL) + temp |= 0xf8; /*FIFO full*/ + } - case 0xa148: case 0xa2e8: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.bkgd_color & 0xff; - } - break; - case 0xa149: case 0xa2e9: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.bkgd_color >> 8; - } - break; - case 0xa14a: case 0xa2ea: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.bkgd_color >> 16; - case 0xa14b: case 0xa2eb: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.bkgd_color >> 24; + if (s3->data_available) { + temp |= 0x01; /*Read Data available*/ + s3->data_available = 0; + } + } else { + if (s3->force_busy) { + temp |= 0x02; /*Hardware busy*/ + } + s3->force_busy = 0; + if (s3->data_available) { + temp |= 0x01; /*Read Data available*/ + s3->data_available = 0; + } + } + return temp; - case 0xa548: case 0xa6e8: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.frgd_color & 0xff; - } - break; - case 0xa549: case 0xa6e9: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.frgd_color >> 8; - } - break; - case 0xa54a: case 0xa6ea: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.frgd_color >> 16; - case 0xa54b: case 0xa6eb: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.frgd_color >> 24; + case 0x9d48: + case 0x9ee8: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.short_stroke & 0xff; + } + break; + case 0x9d49: + case 0x9ee9: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.short_stroke >> 8; + } + break; - case 0xa948: case 0xaae8: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.wrt_mask & 0xff; - } - break; - case 0xa949: case 0xaae9: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.wrt_mask >> 8; - } - break; - case 0xa94a: case 0xaaea: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.wrt_mask >> 16; - case 0xa94b: case 0xaaeb: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.wrt_mask >> 24; + case 0xa148: + case 0xa2e8: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.bkgd_color & 0xff; + } + break; + case 0xa149: + case 0xa2e9: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.bkgd_color >> 8; + } + break; + case 0xa14a: + case 0xa2ea: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.bkgd_color >> 16; + case 0xa14b: + case 0xa2eb: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.bkgd_color >> 24; - case 0xad48: case 0xaee8: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.rd_mask & 0xff; - } - break; - case 0xad49: case 0xaee9: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.rd_mask >> 8; - case 0xad4a: case 0xaeea: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.rd_mask >> 16; - case 0xad4b: case 0xaeeb: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.rd_mask >> 24; + case 0xa548: + case 0xa6e8: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.frgd_color & 0xff; + } + break; + case 0xa549: + case 0xa6e9: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.frgd_color >> 8; + } + break; + case 0xa54a: + case 0xa6ea: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.frgd_color >> 16; + case 0xa54b: + case 0xa6eb: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.frgd_color >> 24; - case 0xb148: case 0xb2e8: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.color_cmp & 0xff; - } - break; - case 0xb149: case 0xb2e9: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.color_cmp >> 8; - } - break; - case 0xb14a: case 0xb2ea: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.color_cmp >> 16; - case 0xb14b: case 0xb2eb: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.color_cmp >> 24; + case 0xa948: + case 0xaae8: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.wrt_mask & 0xff; + } + break; + case 0xa949: + case 0xaae9: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.wrt_mask >> 8; + } + break; + case 0xa94a: + case 0xaaea: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.wrt_mask >> 16; + case 0xa94b: + case 0xaaeb: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.wrt_mask >> 24; - case 0xb548: case 0xb6e8: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.bkgd_mix; - } - break; + case 0xad48: + case 0xaee8: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.rd_mask & 0xff; + } + break; + case 0xad49: + case 0xaee9: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.rd_mask >> 8; + case 0xad4a: + case 0xaeea: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.rd_mask >> 16; + case 0xad4b: + case 0xaeeb: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.rd_mask >> 24; - case 0xb948: case 0xbae8: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.frgd_mix; - } - break; + case 0xb148: + case 0xb2e8: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.color_cmp & 0xff; + } + break; + case 0xb149: + case 0xb2e9: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.color_cmp >> 8; + } + break; + case 0xb14a: + case 0xb2ea: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.color_cmp >> 16; + case 0xb14b: + case 0xb2eb: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.color_cmp >> 24; - case 0xbd48: case 0xbee8: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - temp = s3->accel.multifunc[0xf] & 0xf; - switch (temp) - { - case 0x0: return s3->accel.multifunc[0x0] & 0xff; - case 0x1: return s3->accel.multifunc[0x1] & 0xff; - case 0x2: return s3->accel.multifunc[0x2] & 0xff; - case 0x3: return s3->accel.multifunc[0x3] & 0xff; - case 0x4: return s3->accel.multifunc[0x4] & 0xff; - case 0x5: return s3->accel.multifunc[0xa] & 0xff; - case 0x6: return s3->accel.multifunc[0xe] & 0xff; - case 0x7: return s3->accel.cmd & 0xff; - case 0x8: return s3->accel.subsys_cntl & 0xff; - case 0x9: return s3->accel.setup_md & 0xff; - case 0xa: return s3->accel.multifunc[0xd] & 0xff; - } - return 0xff; - } - break; - case 0xbd49: case 0xbee9: - if (s3->chip >= S3_86C928) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - temp = s3->accel.multifunc[0xf] & 0xf; - s3->accel.multifunc[0xf]++; - switch (temp) - { - case 0x0: return s3->accel.multifunc[0x0] >> 8; - case 0x1: return s3->accel.multifunc[0x1] >> 8; - case 0x2: return s3->accel.multifunc[0x2] >> 8; - case 0x3: return s3->accel.multifunc[0x3] >> 8; - case 0x4: return s3->accel.multifunc[0x4] >> 8; - case 0x5: return s3->accel.multifunc[0xa] >> 8; - case 0x6: return s3->accel.multifunc[0xe] >> 8; - case 0x7: return s3->accel.cmd >> 8; - case 0x8: return (s3->accel.subsys_cntl >> 8) & ~0xe000; - case 0x9: return (s3->accel.setup_md >> 8) & ~0xf000; - case 0xa: return s3->accel.multifunc[0xd] >> 8; - } - return 0xff; - } - break; + case 0xb548: + case 0xb6e8: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.bkgd_mix; + } + break; - case 0xd148: case 0xd2e8: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.ropmix & 0xff; + case 0xb948: + case 0xbae8: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.frgd_mix; + } + break; - case 0xd149: case 0xd2e9: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.ropmix >> 8; + case 0xbd48: + case 0xbee8: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + temp = s3->accel.multifunc[0xf] & 0xf; + switch (temp) { + case 0x0: + return s3->accel.multifunc[0x0] & 0xff; + case 0x1: + return s3->accel.multifunc[0x1] & 0xff; + case 0x2: + return s3->accel.multifunc[0x2] & 0xff; + case 0x3: + return s3->accel.multifunc[0x3] & 0xff; + case 0x4: + return s3->accel.multifunc[0x4] & 0xff; + case 0x5: + return s3->accel.multifunc[0xa] & 0xff; + case 0x6: + return s3->accel.multifunc[0xe] & 0xff; + case 0x7: + return s3->accel.cmd & 0xff; + case 0x8: + return s3->accel.subsys_cntl & 0xff; + case 0x9: + return s3->accel.setup_md & 0xff; + case 0xa: + return s3->accel.multifunc[0xd] & 0xff; + } + return 0xff; + } + break; + case 0xbd49: + case 0xbee9: + if (s3->chip >= S3_86C928) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + temp = s3->accel.multifunc[0xf] & 0xf; + s3->accel.multifunc[0xf]++; + switch (temp) { + case 0x0: + return s3->accel.multifunc[0x0] >> 8; + case 0x1: + return s3->accel.multifunc[0x1] >> 8; + case 0x2: + return s3->accel.multifunc[0x2] >> 8; + case 0x3: + return s3->accel.multifunc[0x3] >> 8; + case 0x4: + return s3->accel.multifunc[0x4] >> 8; + case 0x5: + return s3->accel.multifunc[0xa] >> 8; + case 0x6: + return s3->accel.multifunc[0xe] >> 8; + case 0x7: + return s3->accel.cmd >> 8; + case 0x8: + return (s3->accel.subsys_cntl >> 8) & ~0xe000; + case 0x9: + return (s3->accel.setup_md >> 8) & ~0xf000; + case 0xa: + return s3->accel.multifunc[0xd] >> 8; + } + return 0xff; + } + break; - case 0xe548: case 0xe6e8: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.pat_bg_color & 0xff; + case 0xd148: + case 0xd2e8: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.ropmix & 0xff; - case 0xe549: case 0xe6e9: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.pat_bg_color >> 8; + case 0xd149: + case 0xd2e9: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.ropmix >> 8; - case 0xe54a: case 0xe6ea: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.pat_bg_color >> 16; + case 0xe548: + case 0xe6e8: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.pat_bg_color & 0xff; - case 0xe54b: case 0xe6eb: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.pat_bg_color >> 24; + case 0xe549: + case 0xe6e9: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.pat_bg_color >> 8; - case 0xe948: case 0xeae8: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.pat_y & 0xff; + case 0xe54a: + case 0xe6ea: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.pat_bg_color >> 16; - case 0xe949: case 0xeae9: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.pat_y >> 8; + case 0xe54b: + case 0xe6eb: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.pat_bg_color >> 24; - case 0xe94a: case 0xeaea: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.pat_x & 0xff; + case 0xe948: + case 0xeae8: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.pat_y & 0xff; - case 0xe94b: case 0xeaeb: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.pat_x >> 8; + case 0xe949: + case 0xeae9: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.pat_y >> 8; - case 0xed48: case 0xeee8: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.pat_fg_color & 0xff; + case 0xe94a: + case 0xeaea: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.pat_x & 0xff; - case 0xed49: case 0xeee9: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.pat_fg_color >> 8; + case 0xe94b: + case 0xeaeb: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.pat_x >> 8; - case 0xed4a: case 0xeeea: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.pat_fg_color >> 16; + case 0xed48: + case 0xeee8: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.pat_fg_color & 0xff; - case 0xed4b: case 0xeeeb: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.pat_fg_color >> 24; + case 0xed49: + case 0xeee9: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.pat_fg_color >> 8; - case 0xe148: case 0xe2e8: - if (!s3_cpu_dest(s3)) - break; - READ_PIXTRANS_BYTE_IO(0) - if (s3->accel.cmd & 0x100) { - switch (s3->accel.cmd & 0x600) { - case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(8, 1, s3->accel.pix_trans[0], 0, s3); - else - s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3); - } else - s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3); - break; - case 0x200: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(16, 1, s3->accel.pix_trans[0], 0, s3); - else - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0], s3); - } else { - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0], s3); - } - break; - } - } - return s3->accel.pix_trans[0]; + case 0xed4a: + case 0xeeea: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.pat_fg_color >> 16; - case 0xe149: case 0xe2e9: - if (!s3_cpu_dest(s3)) - break; - READ_PIXTRANS_BYTE_IO(1); - if (s3->accel.cmd & 0x100) { - switch (s3->accel.cmd & 0x600) { - case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(8, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), 0, s3); - else - s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); - } else - s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); - break; - case 0x200: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - s3_accel_start(16, 1, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), 0, s3); - else - s3_accel_start(16, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), 0, s3); - } else { - if (s3->accel.cmd & 0x1000) - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), s3); - else - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); - } - } else { - if (s3->accel.cmd & 0x1000) - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), s3); - else - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); - } - break; - } - } - return s3->accel.pix_trans[1]; + case 0xed4b: + case 0xeeeb: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.pat_fg_color >> 24; - case 0xe14a: case 0xe2ea: - if (!s3_cpu_dest(s3)) - break; - READ_PIXTRANS_BYTE_IO(2); - return s3->accel.pix_trans[2]; + case 0xe148: + case 0xe2e8: + if (!s3_cpu_dest(s3)) + break; + READ_PIXTRANS_BYTE_IO(0) + if (s3->accel.cmd & 0x100) { + switch (s3->accel.cmd & 0x600) { + case 0x000: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(8, 1, s3->accel.pix_trans[0], 0, s3); + else + s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3); + } else + s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3); + break; + case 0x200: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(16, 1, s3->accel.pix_trans[0], 0, s3); + else + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0], s3); + } else { + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0], s3); + } + break; + } + } + return s3->accel.pix_trans[0]; - case 0xe14b: case 0xe2eb: - if (!s3_cpu_dest(s3)) - break; - READ_PIXTRANS_BYTE_IO(3) - if (s3->accel.cmd & 0x100) { - switch (s3->accel.cmd & 0x600) { - case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(8, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), 0, s3); - else - s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); - } else - s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); - break; - case 0x200: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(16, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), 0, s3); - else - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); - } else - s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); - break; - } - } - return s3->accel.pix_trans[3]; + case 0xe149: + case 0xe2e9: + if (!s3_cpu_dest(s3)) + break; + READ_PIXTRANS_BYTE_IO(1); + if (s3->accel.cmd & 0x100) { + switch (s3->accel.cmd & 0x600) { + case 0x000: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(8, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), 0, s3); + else + s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); + } else + s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); + break; + case 0x200: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + s3_accel_start(16, 1, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), 0, s3); + else + s3_accel_start(16, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), 0, s3); + } else { + if (s3->accel.cmd & 0x1000) + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), s3); + else + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); + } + } else { + if (s3->accel.cmd & 0x1000) + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), s3); + else + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); + } + break; + } + } + return s3->accel.pix_trans[1]; - case 0xff20: case 0xff21: - temp = s3->serialport & ~(SERIAL_PORT_SCR | SERIAL_PORT_SDR); - if ((s3->serialport & SERIAL_PORT_SCW) && i2c_gpio_get_scl(s3->i2c)) - temp |= SERIAL_PORT_SCR; - if ((s3->serialport & SERIAL_PORT_SDW) && i2c_gpio_get_sda(s3->i2c)) - temp |= SERIAL_PORT_SDR; - return temp; - } + case 0xe14a: + case 0xe2ea: + if (!s3_cpu_dest(s3)) + break; + READ_PIXTRANS_BYTE_IO(2); + return s3->accel.pix_trans[2]; - return 0xff; + case 0xe14b: + case 0xe2eb: + if (!s3_cpu_dest(s3)) + break; + READ_PIXTRANS_BYTE_IO(3) + if (s3->accel.cmd & 0x100) { + switch (s3->accel.cmd & 0x600) { + case 0x000: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(8, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), 0, s3); + else + s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); + } else + s3_accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); + break; + case 0x200: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(16, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), 0, s3); + else + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); + } else + s3_accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8) | (s3->accel.pix_trans[2] << 16) | (s3->accel.pix_trans[3] << 24), s3); + break; + } + } + return s3->accel.pix_trans[3]; + + case 0xff20: + case 0xff21: + temp = s3->serialport & ~(SERIAL_PORT_SCR | SERIAL_PORT_SDR); + if ((s3->serialport & SERIAL_PORT_SCW) && i2c_gpio_get_scl(s3->i2c)) + temp |= SERIAL_PORT_SCR; + if ((s3->serialport & SERIAL_PORT_SDW) && i2c_gpio_get_sda(s3->i2c)) + temp |= SERIAL_PORT_SDR; + return temp; + } + + return 0xff; } static uint16_t s3_accel_in_w(uint16_t port, void *p) { - s3_t *s3 = (s3_t *)p; - svga_t *svga = &s3->svga; - uint16_t temp = 0x0000; - uint16_t *vram_w = (uint16_t *)svga->vram; + s3_t *s3 = (s3_t *) p; + svga_t *svga = &s3->svga; + uint16_t temp = 0x0000; + uint16_t *vram_w = (uint16_t *) svga->vram; - if (!s3->enable_8514) - return 0xffff; + if (!s3->enable_8514) + return 0xffff; - if (port != 0x9ee8 && port != 0x9d48) { - if (s3_cpu_dest(s3)) { - READ_PIXTRANS_WORD + if (port != 0x9ee8 && port != 0x9d48) { + if (s3_cpu_dest(s3)) { + READ_PIXTRANS_WORD - switch (s3->accel.cmd & 0x600) { - case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - temp = (temp >> 8) | (temp << 8); - s3_accel_start(8, 1, temp | (temp << 16), 0, s3); - } else { - s3_accel_start(1, 1, 0xffffffff, temp | (temp << 16), s3); - } - } else { - if (s3->color_16bit) { - s3_accel_start(2, 1, 0xffffffff, temp | (temp << 16), s3); - } else { - s3_accel_start(1, 1, 0xffffffff, temp | (temp << 16), s3); - } - } - break; - case 0x200: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - temp = (temp >> 8) | (temp << 8); - s3_accel_start(16, 1, temp | (temp << 16), 0, s3); - } else - s3_accel_start(2, 1, 0xffffffff, temp | (temp << 16), s3); - } else { - s3_accel_start(2, 1, 0xffffffff, temp | (temp << 16), s3); - } - break; - } - } - } else { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - temp = s3->accel.short_stroke; - } + switch (s3->accel.cmd & 0x600) { + case 0x000: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + temp = (temp >> 8) | (temp << 8); + s3_accel_start(8, 1, temp | (temp << 16), 0, s3); + } else { + s3_accel_start(1, 1, 0xffffffff, temp | (temp << 16), s3); + } + } else { + if (s3->color_16bit) { + s3_accel_start(2, 1, 0xffffffff, temp | (temp << 16), s3); + } else { + s3_accel_start(1, 1, 0xffffffff, temp | (temp << 16), s3); + } + } + break; + case 0x200: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + temp = (temp >> 8) | (temp << 8); + s3_accel_start(16, 1, temp | (temp << 16), 0, s3); + } else + s3_accel_start(2, 1, 0xffffffff, temp | (temp << 16), s3); + } else { + s3_accel_start(2, 1, 0xffffffff, temp | (temp << 16), s3); + } + break; + } + } + } else { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + temp = s3->accel.short_stroke; + } - return temp; + return temp; } static uint32_t s3_accel_in_l(uint16_t port, void *p) { - s3_t *s3 = (s3_t *)p; - svga_t *svga = &s3->svga; - uint32_t temp = 0x00000000; - uint16_t *vram_w = (uint16_t *)svga->vram; + s3_t *s3 = (s3_t *) p; + svga_t *svga = &s3->svga; + uint32_t temp = 0x00000000; + uint16_t *vram_w = (uint16_t *) svga->vram; - if (!s3->enable_8514) - return 0xffffffff; + if (!s3->enable_8514) + return 0xffffffff; - if (s3_cpu_dest(s3)) { - READ_PIXTRANS_LONG + if (s3_cpu_dest(s3)) { + READ_PIXTRANS_LONG - switch (s3->accel.cmd & 0x600) { - case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - temp = ((temp & 0xff00ff00) >> 8) | ((temp & 0x00ff00ff) << 8); - s3_accel_start(8, 1, temp, 0, s3); - s3_accel_start(8, 1, temp >> 16, 0, s3); - } else { - s3_accel_start(1, 1, 0xffffffff, temp, s3); - s3_accel_start(1, 1, 0xffffffff, temp >> 16, s3); - } - } else { - s3_accel_start(1, 1, 0xffffffff, temp, s3); - s3_accel_start(1, 1, 0xffffffff, temp >> 16, s3); - } - break; - case 0x200: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - temp = ((temp & 0xff00ff00) >> 8) | ((temp & 0x00ff00ff) << 8); - s3_accel_start(16, 1, temp, 0, s3); - s3_accel_start(16, 1, temp >> 16, 0, s3); - } else { - s3_accel_start(2, 1, 0xffffffff, temp, s3); - s3_accel_start(2, 1, 0xffffffff, temp >> 16, s3); - } - } else { - s3_accel_start(2, 1, 0xffffffff, temp, s3); - s3_accel_start(2, 1, 0xffffffff, temp >> 16, s3); - } - break; - } - } + switch (s3->accel.cmd & 0x600) { + case 0x000: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + temp = ((temp & 0xff00ff00) >> 8) | ((temp & 0x00ff00ff) << 8); + s3_accel_start(8, 1, temp, 0, s3); + s3_accel_start(8, 1, temp >> 16, 0, s3); + } else { + s3_accel_start(1, 1, 0xffffffff, temp, s3); + s3_accel_start(1, 1, 0xffffffff, temp >> 16, s3); + } + } else { + s3_accel_start(1, 1, 0xffffffff, temp, s3); + s3_accel_start(1, 1, 0xffffffff, temp >> 16, s3); + } + break; + case 0x200: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + temp = ((temp & 0xff00ff00) >> 8) | ((temp & 0x00ff00ff) << 8); + s3_accel_start(16, 1, temp, 0, s3); + s3_accel_start(16, 1, temp >> 16, 0, s3); + } else { + s3_accel_start(2, 1, 0xffffffff, temp, s3); + s3_accel_start(2, 1, 0xffffffff, temp >> 16, s3); + } + } else { + s3_accel_start(2, 1, 0xffffffff, temp, s3); + s3_accel_start(2, 1, 0xffffffff, temp >> 16, s3); + } + break; + } + } - return temp; + return temp; } - static void s3_accel_write(uint32_t addr, uint8_t val, void *p) { - s3_t *s3 = (s3_t *)p; + s3_t *s3 = (s3_t *) p; svga_t *svga = &s3->svga; - if (!s3->enable_8514) - return; + if (!s3->enable_8514) + return; - if (s3_enable_fifo(s3)) { - if (svga->crtc[0x53] & 0x08) - s3_queue(s3, addr & 0x1ffff, val, FIFO_WRITE_BYTE); - else - s3_queue(s3, addr & 0xffff, val, FIFO_WRITE_BYTE); - } else - s3_accel_write_fifo(s3, addr & 0xffff, val); + if (s3_enable_fifo(s3)) { + if (svga->crtc[0x53] & 0x08) + s3_queue(s3, addr & 0x1ffff, val, FIFO_WRITE_BYTE); + else + s3_queue(s3, addr & 0xffff, val, FIFO_WRITE_BYTE); + } else + s3_accel_write_fifo(s3, addr & 0xffff, val); } static void s3_accel_write_w(uint32_t addr, uint16_t val, void *p) { - s3_t *s3 = (s3_t *)p; + s3_t *s3 = (s3_t *) p; svga_t *svga = &s3->svga; - if (!s3->enable_8514) - return; + if (!s3->enable_8514) + return; - if (s3_enable_fifo(s3)) { - if (svga->crtc[0x53] & 0x08) - s3_queue(s3, addr & 0x1ffff, val, FIFO_WRITE_WORD); - else - s3_queue(s3, addr & 0xffff, val, FIFO_WRITE_WORD); - } else - s3_accel_write_fifo_w(s3, addr & 0xffff, val); + if (s3_enable_fifo(s3)) { + if (svga->crtc[0x53] & 0x08) + s3_queue(s3, addr & 0x1ffff, val, FIFO_WRITE_WORD); + else + s3_queue(s3, addr & 0xffff, val, FIFO_WRITE_WORD); + } else + s3_accel_write_fifo_w(s3, addr & 0xffff, val); } static void s3_accel_write_l(uint32_t addr, uint32_t val, void *p) { - s3_t *s3 = (s3_t *)p; + s3_t *s3 = (s3_t *) p; svga_t *svga = &s3->svga; - if (!s3->enable_8514) - return; + if (!s3->enable_8514) + return; - if (s3_enable_fifo(s3)) { - if (svga->crtc[0x53] & 0x08) - s3_queue(s3, addr & 0x1ffff, val, FIFO_WRITE_DWORD); - else - s3_queue(s3, addr & 0xffff, val, FIFO_WRITE_DWORD); - } else - s3_accel_write_fifo_l(s3, addr & 0xffff, val); + if (s3_enable_fifo(s3)) { + if (svga->crtc[0x53] & 0x08) + s3_queue(s3, addr & 0x1ffff, val, FIFO_WRITE_DWORD); + else + s3_queue(s3, addr & 0xffff, val, FIFO_WRITE_DWORD); + } else + s3_accel_write_fifo_l(s3, addr & 0xffff, val); } static uint8_t s3_accel_read(uint32_t addr, void *p) { - s3_t *s3 = (s3_t *)p; + s3_t *s3 = (s3_t *) p; svga_t *svga = &s3->svga; uint8_t temp = 0x00; - if (!s3->enable_8514) - return 0xff; + if (!s3->enable_8514) + return 0xff; if (svga->crtc[0x53] & 0x08) { - if ((addr >= 0x08000) && (addr <= 0x0803f)) - return s3_pci_read(0, addr & 0xff, s3); - switch (addr & 0x1ffff) { - case 0x83b0: case 0x83b1: case 0x83b2: case 0x83b3: - case 0x83b4: case 0x83b5: case 0x83b6: case 0x83b7: - case 0x83b8: case 0x83b9: case 0x83ba: case 0x83bb: - case 0x83bc: case 0x83bd: case 0x83be: case 0x83bf: - case 0x83c0: case 0x83c1: case 0x83c2: case 0x83c3: - case 0x83c4: case 0x83c5: case 0x83c6: case 0x83c7: - case 0x83c8: case 0x83c9: case 0x83ca: case 0x83cb: - case 0x83cc: case 0x83cd: case 0x83ce: case 0x83cf: - case 0x83d0: case 0x83d1: case 0x83d2: case 0x83d3: - case 0x83d4: case 0x83d5: case 0x83d6: case 0x83d7: - case 0x83d8: case 0x83d9: case 0x83da: case 0x83db: - case 0x83dc: case 0x83dd: case 0x83de: case 0x83df: - return s3_in(addr & 0x3ff, s3); - case 0x8504: - return s3->subsys_stat; - case 0x8505: - return s3->subsys_cntl; - default: - return s3_accel_in(addr & 0xffff, p); - } - return 0xff; + if ((addr >= 0x08000) && (addr <= 0x0803f)) + return s3_pci_read(0, addr & 0xff, s3); + switch (addr & 0x1ffff) { + case 0x83b0: + case 0x83b1: + case 0x83b2: + case 0x83b3: + case 0x83b4: + case 0x83b5: + case 0x83b6: + case 0x83b7: + case 0x83b8: + case 0x83b9: + case 0x83ba: + case 0x83bb: + case 0x83bc: + case 0x83bd: + case 0x83be: + case 0x83bf: + case 0x83c0: + case 0x83c1: + case 0x83c2: + case 0x83c3: + case 0x83c4: + case 0x83c5: + case 0x83c6: + case 0x83c7: + case 0x83c8: + case 0x83c9: + case 0x83ca: + case 0x83cb: + case 0x83cc: + case 0x83cd: + case 0x83ce: + case 0x83cf: + case 0x83d0: + case 0x83d1: + case 0x83d2: + case 0x83d3: + case 0x83d4: + case 0x83d5: + case 0x83d6: + case 0x83d7: + case 0x83d8: + case 0x83d9: + case 0x83da: + case 0x83db: + case 0x83dc: + case 0x83dd: + case 0x83de: + case 0x83df: + return s3_in(addr & 0x3ff, s3); + case 0x8504: + return s3->subsys_stat; + case 0x8505: + return s3->subsys_cntl; + default: + return s3_accel_in(addr & 0xffff, p); + } + return 0xff; } else { - if (addr & 0x8000) { - temp = s3_accel_in(addr & 0xffff, p); - } else if (s3_cpu_dest(s3)) { - READ_PIXTRANS_BYTE_MM + if (addr & 0x8000) { + temp = s3_accel_in(addr & 0xffff, p); + } else if (s3_cpu_dest(s3)) { + READ_PIXTRANS_BYTE_MM - switch (s3->accel.cmd & 0x600) { - case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(8, 1, temp | (temp << 8) | (temp << 16) | (temp << 24), 0, s3); - else - s3_accel_start(1, 1, 0xffffffff, temp | (temp << 8) | (temp << 16) | (temp << 24), s3); - } else - s3_accel_start(1, 1, 0xffffffff, temp | (temp << 8) | (temp << 16) | (temp << 24), s3); - break; - case 0x200: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(16, 1, temp | (temp << 8) | (temp << 16) | (temp << 24), 0, s3); - else - s3_accel_start(2, 1, 0xffffffff, temp | (temp << 8) | (temp << 16) | (temp << 24), s3); - } else - s3_accel_start(2, 1, 0xffffffff, temp | (temp << 8) | (temp << 16) | (temp << 24), s3); - break; - } - } + switch (s3->accel.cmd & 0x600) { + case 0x000: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(8, 1, temp | (temp << 8) | (temp << 16) | (temp << 24), 0, s3); + else + s3_accel_start(1, 1, 0xffffffff, temp | (temp << 8) | (temp << 16) | (temp << 24), s3); + } else + s3_accel_start(1, 1, 0xffffffff, temp | (temp << 8) | (temp << 16) | (temp << 24), s3); + break; + case 0x200: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(16, 1, temp | (temp << 8) | (temp << 16) | (temp << 24), 0, s3); + else + s3_accel_start(2, 1, 0xffffffff, temp | (temp << 8) | (temp << 16) | (temp << 24), s3); + } else + s3_accel_start(2, 1, 0xffffffff, temp | (temp << 8) | (temp << 16) | (temp << 24), s3); + break; + } + } } return temp; @@ -4244,242 +4515,240 @@ s3_accel_read(uint32_t addr, void *p) static uint16_t s3_accel_read_w(uint32_t addr, void *p) { - s3_t *s3 = (s3_t *)p; - svga_t *svga = &s3->svga; - uint16_t temp = 0x0000; - uint16_t *vram_w = (uint16_t *)svga->vram; + s3_t *s3 = (s3_t *) p; + svga_t *svga = &s3->svga; + uint16_t temp = 0x0000; + uint16_t *vram_w = (uint16_t *) svga->vram; - if (!s3->enable_8514) - return 0xffff; + if (!s3->enable_8514) + return 0xffff; if (svga->crtc[0x53] & 0x08) { - switch (addr & 0x1fffe) { - case 0x811c: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - return s3->accel.short_stroke; + switch (addr & 0x1fffe) { + case 0x811c: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + return s3->accel.short_stroke; - default: - return s3_accel_read(addr, p) | - s3_accel_read(addr + 1, p) << 8; - } - return 0xffff; + default: + return s3_accel_read(addr, p) | s3_accel_read(addr + 1, p) << 8; + } + return 0xffff; } else { - if (addr & 0x8000) { - if (addr == 0x811c) { - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - temp = s3->accel.short_stroke; - } else { - temp = s3_accel_read((addr & 0xfffe), p); - temp |= s3_accel_read((addr & 0xfffe) + 1, p) << 8; - } - } else if (s3_cpu_dest(s3)) { - READ_PIXTRANS_WORD + if (addr & 0x8000) { + if (addr == 0x811c) { + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + temp = s3->accel.short_stroke; + } else { + temp = s3_accel_read((addr & 0xfffe), p); + temp |= s3_accel_read((addr & 0xfffe) + 1, p) << 8; + } + } else if (s3_cpu_dest(s3)) { + READ_PIXTRANS_WORD - switch (s3->accel.cmd & 0x600) { - case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(8, 1, temp | (temp << 16), 0, s3); - else - s3_accel_start(1, 1, 0xffffffff, temp | (temp << 16), s3); - } else - s3_accel_start(1, 1, 0xffffffff, temp | (temp << 16), s3); - break; - case 0x200: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) - s3_accel_start(16, 1, temp | (temp << 16), 0, s3); - else - s3_accel_start(2, 1, 0xffffffff, temp | (temp << 16), s3); - } else - s3_accel_start(2, 1, 0xffffffff, temp | (temp << 16), s3); - break; - } - } + switch (s3->accel.cmd & 0x600) { + case 0x000: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(8, 1, temp | (temp << 16), 0, s3); + else + s3_accel_start(1, 1, 0xffffffff, temp | (temp << 16), s3); + } else + s3_accel_start(1, 1, 0xffffffff, temp | (temp << 16), s3); + break; + case 0x200: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) + s3_accel_start(16, 1, temp | (temp << 16), 0, s3); + else + s3_accel_start(2, 1, 0xffffffff, temp | (temp << 16), s3); + } else + s3_accel_start(2, 1, 0xffffffff, temp | (temp << 16), s3); + break; + } + } } return temp; } - static uint32_t s3_accel_read_l(uint32_t addr, void *p) { - s3_t *s3 = (s3_t *)p; - svga_t *svga = &s3->svga; - uint32_t temp = 0x00000000; - uint16_t *vram_w = (uint16_t *)svga->vram; + s3_t *s3 = (s3_t *) p; + svga_t *svga = &s3->svga; + uint32_t temp = 0x00000000; + uint16_t *vram_w = (uint16_t *) svga->vram; - if (!s3->enable_8514) - return 0xffffffff; + if (!s3->enable_8514) + return 0xffffffff; if (svga->crtc[0x53] & 0x08) { - switch (addr & 0x1fffc) { - case 0x8180: - temp = s3->streams.pri_ctrl; - break; - case 0x8184: - temp = s3->streams.chroma_ctrl; - break; - case 0x8190: - temp = s3->streams.sec_ctrl; - break; - case 0x8194: - temp = s3->streams.chroma_upper_bound; - break; - case 0x8198: - temp = s3->streams.sec_filter; - break; - case 0x81a0: - temp = s3->streams.blend_ctrl; - break; - case 0x81c0: - temp = s3->streams.pri_fb0; - break; - case 0x81c4: - temp = s3->streams.pri_fb1; - break; - case 0x81c8: - temp = s3->streams.pri_stride; - break; - case 0x81cc: - temp = s3->streams.buffer_ctrl; - break; - case 0x81d0: - temp = s3->streams.sec_fb0; - break; - case 0x81d4: - temp = s3->streams.sec_fb1; - break; - case 0x81d8: - temp = s3->streams.sec_stride; - break; - case 0x81dc: - temp = s3->streams.overlay_ctrl; - break; - case 0x81e0: - temp = s3->streams.k1_vert_scale; - break; - case 0x81e4: - temp = s3->streams.k2_vert_scale; - break; - case 0x81e8: - temp = s3->streams.dda_vert_accumulator; - break; - case 0x81ec: - temp = s3->streams.fifo_ctrl; - break; - case 0x81f0: - temp = s3->streams.pri_start; - break; - case 0x81f4: - temp = s3->streams.pri_size; - break; - case 0x81f8: - temp = s3->streams.sec_start; - break; - case 0x81fc: - temp = s3->streams.sec_size; - break; + switch (addr & 0x1fffc) { + case 0x8180: + temp = s3->streams.pri_ctrl; + break; + case 0x8184: + temp = s3->streams.chroma_ctrl; + break; + case 0x8190: + temp = s3->streams.sec_ctrl; + break; + case 0x8194: + temp = s3->streams.chroma_upper_bound; + break; + case 0x8198: + temp = s3->streams.sec_filter; + break; + case 0x81a0: + temp = s3->streams.blend_ctrl; + break; + case 0x81c0: + temp = s3->streams.pri_fb0; + break; + case 0x81c4: + temp = s3->streams.pri_fb1; + break; + case 0x81c8: + temp = s3->streams.pri_stride; + break; + case 0x81cc: + temp = s3->streams.buffer_ctrl; + break; + case 0x81d0: + temp = s3->streams.sec_fb0; + break; + case 0x81d4: + temp = s3->streams.sec_fb1; + break; + case 0x81d8: + temp = s3->streams.sec_stride; + break; + case 0x81dc: + temp = s3->streams.overlay_ctrl; + break; + case 0x81e0: + temp = s3->streams.k1_vert_scale; + break; + case 0x81e4: + temp = s3->streams.k2_vert_scale; + break; + case 0x81e8: + temp = s3->streams.dda_vert_accumulator; + break; + case 0x81ec: + temp = s3->streams.fifo_ctrl; + break; + case 0x81f0: + temp = s3->streams.pri_start; + break; + case 0x81f4: + temp = s3->streams.pri_size; + break; + case 0x81f8: + temp = s3->streams.sec_start; + break; + case 0x81fc: + temp = s3->streams.sec_size; + break; - case 0x18080: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - temp = 0; - break; - case 0x18088: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - temp = s3->videoengine.cntl; - if (s3->bpp == 1) { /*The actual bpp is decided by the guest when idf is the same as odf*/ - if (s3->videoengine.idf == 0 && s3->videoengine.odf == 0) { - if (svga->bpp == 15) - temp |= 0x600000; - else - temp |= 0x700000; - } - } else if (s3->bpp > 1) { - if (s3->videoengine.idf == 0 && s3->videoengine.odf == 0) - temp |= 0x300000; - } - break; - case 0x1808c: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - temp = s3->videoengine.stretch_filt_const; - break; - case 0x18090: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - temp = s3->videoengine.src_dst_step; - break; - case 0x18094: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - temp = s3->videoengine.crop; - break; - case 0x18098: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - temp = s3->videoengine.src_base; - break; - case 0x1809c: - if (s3_enable_fifo(s3)) - s3_wait_fifo_idle(s3); - temp = s3->videoengine.dest_base; - if (s3->videoengine.busy) { - temp |= (1 << 31); - } else { - temp &= ~(1 << 31); - } - break; + case 0x18080: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + temp = 0; + break; + case 0x18088: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + temp = s3->videoengine.cntl; + if (s3->bpp == 1) { /*The actual bpp is decided by the guest when idf is the same as odf*/ + if (s3->videoengine.idf == 0 && s3->videoengine.odf == 0) { + if (svga->bpp == 15) + temp |= 0x600000; + else + temp |= 0x700000; + } + } else if (s3->bpp > 1) { + if (s3->videoengine.idf == 0 && s3->videoengine.odf == 0) + temp |= 0x300000; + } + break; + case 0x1808c: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + temp = s3->videoengine.stretch_filt_const; + break; + case 0x18090: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + temp = s3->videoengine.src_dst_step; + break; + case 0x18094: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + temp = s3->videoengine.crop; + break; + case 0x18098: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + temp = s3->videoengine.src_base; + break; + case 0x1809c: + if (s3_enable_fifo(s3)) + s3_wait_fifo_idle(s3); + temp = s3->videoengine.dest_base; + if (s3->videoengine.busy) { + temp |= (1 << 31); + } else { + temp &= ~(1 << 31); + } + break; - default: - temp = s3_accel_read_w(addr, p) | (s3_accel_read_w(addr + 2, p) << 16); - break; - } + default: + temp = s3_accel_read_w(addr, p) | (s3_accel_read_w(addr + 2, p) << 16); + break; + } } else { - if (addr & 0x8000) { - temp = s3_accel_read((addr & 0xfffc), p); - temp |= s3_accel_read((addr & 0xfffc) + 1, p) << 8; - temp |= s3_accel_read((addr & 0xfffc) + 2, p) << 16; - temp |= s3_accel_read((addr & 0xfffc) + 3, p) << 24; - } else if (s3_cpu_dest(s3)) { - READ_PIXTRANS_LONG + if (addr & 0x8000) { + temp = s3_accel_read((addr & 0xfffc), p); + temp |= s3_accel_read((addr & 0xfffc) + 1, p) << 8; + temp |= s3_accel_read((addr & 0xfffc) + 2, p) << 16; + temp |= s3_accel_read((addr & 0xfffc) + 3, p) << 24; + } else if (s3_cpu_dest(s3)) { + READ_PIXTRANS_LONG - switch (s3->accel.cmd & 0x600) { - case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - s3_accel_start(8, 1, temp, 0, s3); - s3_accel_start(8, 1, temp >> 16, 0, s3); - } else { - s3_accel_start(1, 1, 0xffffffff, temp, s3); - s3_accel_start(1, 1, 0xffffffff, temp >> 16, s3); - } - } else { - s3_accel_start(1, 1, 0xffffffff, temp, s3); - s3_accel_start(1, 1, 0xffffffff, temp >> 16, s3); - } - break; - case 0x200: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - s3_accel_start(16, 1, temp, 0, s3); - s3_accel_start(16, 1, temp >> 16, 0, s3); - } else { - s3_accel_start(2, 1, 0xffffffff, temp, s3); - s3_accel_start(2, 1, 0xffffffff, temp >> 16, s3); - } - } else { - s3_accel_start(2, 1, 0xffffffff, temp, s3); - s3_accel_start(2, 1, 0xffffffff, temp >> 16, s3); - } - break; - } - } + switch (s3->accel.cmd & 0x600) { + case 0x000: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + s3_accel_start(8, 1, temp, 0, s3); + s3_accel_start(8, 1, temp >> 16, 0, s3); + } else { + s3_accel_start(1, 1, 0xffffffff, temp, s3); + s3_accel_start(1, 1, 0xffffffff, temp >> 16, s3); + } + } else { + s3_accel_start(1, 1, 0xffffffff, temp, s3); + s3_accel_start(1, 1, 0xffffffff, temp >> 16, s3); + } + break; + case 0x200: + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + s3_accel_start(16, 1, temp, 0, s3); + s3_accel_start(16, 1, temp >> 16, 0, s3); + } else { + s3_accel_start(2, 1, 0xffffffff, temp, s3); + s3_accel_start(2, 1, 0xffffffff, temp >> 16, s3); + } + } else { + s3_accel_start(2, 1, 0xffffffff, temp, s3); + s3_accel_start(2, 1, 0xffffffff, temp >> 16, s3); + } + break; + } + } } return temp; @@ -4488,372 +4757,908 @@ s3_accel_read_l(uint32_t addr, void *p) static void polygon_setup(s3_t *s3) { - if (s3->accel.point_1_updated) - { - int start_x = s3->accel.poly_cx; - int start_y = s3->accel.poly_cy; - int end_x = s3->accel.destx_distp << 20; - int end_y = s3->accel.desty_axstp; + if (s3->accel.point_1_updated) { + int start_x = s3->accel.poly_cx; + int start_y = s3->accel.poly_cy; + int end_x = s3->accel.destx_distp << 20; + int end_y = s3->accel.desty_axstp; - if (end_y - start_y) - s3->accel.poly_dx1 = (end_x - start_x) / (end_y - start_y); - else - s3->accel.poly_dx1 = 0; + if (end_y - start_y) + s3->accel.poly_dx1 = (end_x - start_x) / (end_y - start_y); + else + s3->accel.poly_dx1 = 0; - s3->accel.point_1_updated = 0; + s3->accel.point_1_updated = 0; - if (end_y == s3->accel.poly_cy) - { - s3->accel.poly_cx = end_x; - s3->accel.poly_x = end_x >> 20; - } - } - if (s3->accel.point_2_updated) - { - int start_x = s3->accel.poly_cx2; - int start_y = s3->accel.poly_cy2; - int end_x = s3->accel.x2 << 20; - int end_y = s3->accel.desty_axstp2; + if (end_y == s3->accel.poly_cy) { + s3->accel.poly_cx = end_x; + s3->accel.poly_x = end_x >> 20; + } + } + if (s3->accel.point_2_updated) { + int start_x = s3->accel.poly_cx2; + int start_y = s3->accel.poly_cy2; + int end_x = s3->accel.x2 << 20; + int end_y = s3->accel.desty_axstp2; - if (end_y - start_y) - s3->accel.poly_dx2 = (end_x - start_x) / (end_y - start_y); - else - s3->accel.poly_dx2 = 0; + if (end_y - start_y) + s3->accel.poly_dx2 = (end_x - start_x) / (end_y - start_y); + else + s3->accel.poly_dx2 = 0; - s3->accel.point_2_updated = 0; + s3->accel.point_2_updated = 0; - if (end_y == s3->accel.poly_cy) - s3->accel.poly_cx2 = end_x; - } + if (end_y == s3->accel.poly_cy) + s3->accel.poly_cx2 = end_x; + } } -#define READ(addr, dat) if (s3->bpp == 0 && !s3->color_16bit) dat = svga->vram[dword_remap(svga, addr) & s3->vram_mask]; \ - else if (s3->bpp == 1 || s3->color_16bit) dat = vram_w[dword_remap_w(svga, addr) & (s3->vram_mask >> 1)]; \ - else if (s3->bpp == 2) dat = svga->vram[dword_remap(svga, addr) & s3->vram_mask]; \ - else dat = vram_l[dword_remap_l(svga, addr) & (s3->vram_mask >> 2)]; +#define READ(addr, dat) \ + if (s3->bpp == 0 && !s3->color_16bit) \ + dat = svga->vram[dword_remap(svga, addr) & s3->vram_mask]; \ + else if (s3->bpp == 1 || s3->color_16bit) \ + dat = vram_w[dword_remap_w(svga, addr) & (s3->vram_mask >> 1)]; \ + else if (s3->bpp == 2) \ + dat = svga->vram[dword_remap(svga, addr) & s3->vram_mask]; \ + else \ + dat = vram_l[dword_remap_l(svga, addr) & (s3->vram_mask >> 2)]; -#define MIX_READ { \ - switch ((mix_dat & mix_mask) ? (s3->accel.frgd_mix & 0xf) : (s3->accel.bkgd_mix & 0xf)) \ - { \ - case 0x0: dest_dat = ~dest_dat; break; \ - case 0x1: dest_dat = 0; break; \ - case 0x2: dest_dat = ~0; break; \ - case 0x3: dest_dat = dest_dat; break; \ - case 0x4: dest_dat = ~src_dat; break; \ - case 0x5: dest_dat = src_dat ^ dest_dat; break; \ - case 0x6: dest_dat = ~(src_dat ^ dest_dat); break; \ - case 0x7: dest_dat = src_dat; break; \ - case 0x8: dest_dat = ~(src_dat & dest_dat); break; \ - case 0x9: dest_dat = ~src_dat | dest_dat; break; \ - case 0xa: dest_dat = src_dat | ~dest_dat; break; \ - case 0xb: dest_dat = src_dat | dest_dat; break; \ - case 0xc: dest_dat = src_dat & dest_dat; break; \ - case 0xd: dest_dat = src_dat & ~dest_dat; break; \ - case 0xe: dest_dat = ~src_dat & dest_dat; break; \ - case 0xf: dest_dat = ~(src_dat | dest_dat); break; \ - } \ - } +#define MIX_READ \ + { \ + switch ((mix_dat & mix_mask) ? (s3->accel.frgd_mix & 0xf) : (s3->accel.bkgd_mix & 0xf)) { \ + case 0x0: \ + dest_dat = ~dest_dat; \ + break; \ + case 0x1: \ + dest_dat = 0; \ + break; \ + case 0x2: \ + dest_dat = ~0; \ + break; \ + case 0x3: \ + dest_dat = dest_dat; \ + break; \ + case 0x4: \ + dest_dat = ~src_dat; \ + break; \ + case 0x5: \ + dest_dat = src_dat ^ dest_dat; \ + break; \ + case 0x6: \ + dest_dat = ~(src_dat ^ dest_dat); \ + break; \ + case 0x7: \ + dest_dat = src_dat; \ + break; \ + case 0x8: \ + dest_dat = ~(src_dat & dest_dat); \ + break; \ + case 0x9: \ + dest_dat = ~src_dat | dest_dat; \ + break; \ + case 0xa: \ + dest_dat = src_dat | ~dest_dat; \ + break; \ + case 0xb: \ + dest_dat = src_dat | dest_dat; \ + break; \ + case 0xc: \ + dest_dat = src_dat & dest_dat; \ + break; \ + case 0xd: \ + dest_dat = src_dat & ~dest_dat; \ + break; \ + case 0xe: \ + dest_dat = ~src_dat & dest_dat; \ + break; \ + case 0xf: \ + dest_dat = ~(src_dat | dest_dat); \ + break; \ + } \ + } +#define MIX \ + { \ + old_dest_dat = dest_dat; \ + MIX_READ \ + dest_dat = (dest_dat & s3->accel.wrt_mask) | (old_dest_dat & ~s3->accel.wrt_mask); \ + } -#define MIX { \ - old_dest_dat = dest_dat; \ - MIX_READ \ - dest_dat = (dest_dat & s3->accel.wrt_mask) | (old_dest_dat & ~s3->accel.wrt_mask); \ - } +#define ROPMIX_READ(D, P, S) \ + { \ + switch (rop) { \ + case 0x00: \ + out = 0; \ + break; \ + case 0x01: \ + out = ~(D | (P | S)); \ + break; \ + case 0x02: \ + out = D & ~(P | S); \ + break; \ + case 0x03: \ + out = ~(P | S); \ + break; \ + case 0x04: \ + out = S & ~(D | P); \ + break; \ + case 0x05: \ + out = ~(D | P); \ + break; \ + case 0x06: \ + out = ~(P | ~(D ^ S)); \ + break; \ + case 0x07: \ + out = ~(P | (D & S)); \ + break; \ + case 0x08: \ + out = S & (D & ~P); \ + break; \ + case 0x09: \ + out = ~(P | (D ^ S)); \ + break; \ + case 0x0a: \ + out = D & ~P; \ + break; \ + case 0x0b: \ + out = ~(P | (S & ~D)); \ + break; \ + case 0x0c: \ + out = S & ~P; \ + break; \ + case 0x0d: \ + out = ~(P | (D & ~S)); \ + break; \ + case 0x0e: \ + out = ~(P | ~(D | S)); \ + break; \ + case 0x0f: \ + out = ~P; \ + break; \ + case 0x10: \ + out = P & ~(D | S); \ + break; \ + case 0x11: \ + out = ~(D | S); \ + break; \ + case 0x12: \ + out = ~(S | ~(D ^ P)); \ + break; \ + case 0x13: \ + out = ~(S | (D & P)); \ + break; \ + case 0x14: \ + out = ~(D | ~(P ^ S)); \ + break; \ + case 0x15: \ + out = ~(D | (P & S)); \ + break; \ + case 0x16: \ + out = P ^ (S ^ (D & ~(P & S))); \ + break; \ + case 0x17: \ + out = ~(S ^ ((S ^ P) & (D ^ S))); \ + break; \ + case 0x18: \ + out = (S ^ P) & (P ^ D); \ + break; \ + case 0x19: \ + out = ~(S ^ (D & ~(P & S))); \ + break; \ + case 0x1a: \ + out = P ^ (D | (S & P)); \ + break; \ + case 0x1b: \ + out = ~(S ^ (D & (P ^ S))); \ + break; \ + case 0x1c: \ + out = P ^ (S | (D & P)); \ + break; \ + case 0x1d: \ + out = ~(D ^ (S & (P ^ D))); \ + break; \ + case 0x1e: \ + out = P ^ (D | S); \ + break; \ + case 0x1f: \ + out = ~(P & (D | S)); \ + break; \ + case 0x20: \ + out = D & (P & ~S); \ + break; \ + case 0x21: \ + out = ~(S | (D ^ P)); \ + break; \ + case 0x22: \ + out = D & ~S; \ + break; \ + case 0x23: \ + out = ~(S | (P & ~D)); \ + break; \ + case 0x24: \ + out = (S ^ P) & (D ^ S); \ + break; \ + case 0x25: \ + out = ~(P ^ (D & ~(S & P))); \ + break; \ + case 0x26: \ + out = S ^ (D | (P & S)); \ + break; \ + case 0x27: \ + out = S ^ (D | ~(P ^ S)); \ + break; \ + case 0x28: \ + out = D & (P ^ S); \ + break; \ + case 0x29: \ + out = ~(P ^ (S ^ (D | (P & S)))); \ + break; \ + case 0x2a: \ + out = D & ~(P & S); \ + break; \ + case 0x2b: \ + out = ~(S ^ ((S ^ P) & (P ^ D))); \ + break; \ + case 0x2c: \ + out = S ^ (P & (D | S)); \ + break; \ + case 0x2d: \ + out = P ^ (S | ~D); \ + break; \ + case 0x2e: \ + out = P ^ (S | (D ^ P)); \ + break; \ + case 0x2f: \ + out = ~(P & (S | ~D)); \ + break; \ + case 0x30: \ + out = P & ~S; \ + break; \ + case 0x31: \ + out = ~(S | (D & ~P)); \ + break; \ + case 0x32: \ + out = S ^ (D | (P | S)); \ + break; \ + case 0x33: \ + out = ~S; \ + break; \ + case 0x34: \ + out = S ^ (P | (D & S)); \ + break; \ + case 0x35: \ + out = S ^ (P | ~(D ^ S)); \ + break; \ + case 0x36: \ + out = S ^ (D | P); \ + break; \ + case 0x37: \ + out = ~(S & (D | P)); \ + break; \ + case 0x38: \ + out = P ^ (S & (D | P)); \ + break; \ + case 0x39: \ + out = S ^ (P | ~D); \ + break; \ + case 0x3a: \ + out = S ^ (P | (D ^ S)); \ + break; \ + case 0x3b: \ + out = ~(S & (P | ~D)); \ + break; \ + case 0x3c: \ + out = P ^ S; \ + break; \ + case 0x3d: \ + out = S ^ (P | ~(D | S)); \ + break; \ + case 0x3e: \ + out = S ^ (P | (D & ~S)); \ + break; \ + case 0x3f: \ + out = ~(P & S); \ + break; \ + case 0x40: \ + out = P & (S & ~D); \ + break; \ + case 0x41: \ + out = ~(D | (P ^ S)); \ + break; \ + case 0x42: \ + out = (S ^ D) & (P ^ D); \ + break; \ + case 0x43: \ + out = ~(S ^ (P & ~(D & S))); \ + break; \ + case 0x44: \ + out = S & ~D; \ + break; \ + case 0x45: \ + out = ~(D | (P & ~S)); \ + break; \ + case 0x46: \ + out = D ^ (S | (P & D)); \ + break; \ + case 0x47: \ + out = ~(P ^ (S & (D ^ P))); \ + break; \ + case 0x48: \ + out = S & (D ^ P); \ + break; \ + case 0x49: \ + out = ~(P ^ (D ^ (S | (P & D)))); \ + break; \ + case 0x4a: \ + out = D ^ (P & (S | D)); \ + break; \ + case 0x4b: \ + out = P ^ (D | ~S); \ + break; \ + case 0x4c: \ + out = S & ~(D & P); \ + break; \ + case 0x4d: \ + out = ~(S ^ ((S ^ P) | (D ^ S))); \ + break; \ + case 0x4e: \ + out = P ^ (D | (S ^ P)); \ + break; \ + case 0x4f: \ + out = ~(P & (D | ~S)); \ + break; \ + case 0x50: \ + out = P & ~D; \ + break; \ + case 0x51: \ + out = ~(D | (S & ~P)); \ + break; \ + case 0x52: \ + out = D ^ (P | (S & D)); \ + break; \ + case 0x53: \ + out = ~(S ^ (P & (D ^ S))); \ + break; \ + case 0x54: \ + out = ~(D | ~(P | S)); \ + break; \ + case 0x55: \ + out = ~D; \ + break; \ + case 0x56: \ + out = D ^ (P | S); \ + break; \ + case 0x57: \ + out = ~(D & (P | S)); \ + break; \ + case 0x58: \ + out = P ^ (D & (S | P)); \ + break; \ + case 0x59: \ + out = D ^ (P | ~S); \ + break; \ + case 0x5a: \ + out = D ^ P; \ + break; \ + case 0x5b: \ + out = D ^ (P | ~(S | D)); \ + break; \ + case 0x5c: \ + out = D ^ (P | (S ^ D)); \ + break; \ + case 0x5d: \ + out = ~(D & (P | ~S)); \ + break; \ + case 0x5e: \ + out = D ^ (P | (S & ~D)); \ + break; \ + case 0x5f: \ + out = ~(D & P); \ + break; \ + case 0x60: \ + out = P & (D ^ S); \ + break; \ + case 0x61: \ + out = ~(D ^ (S ^ (P | (D & S)))); \ + break; \ + case 0x62: \ + out = D ^ (S & (P | D)); \ + break; \ + case 0x63: \ + out = S ^ (D | ~P); \ + break; \ + case 0x64: \ + out = S ^ (D & (P | S)); \ + break; \ + case 0x65: \ + out = D ^ (S | ~P); \ + break; \ + case 0x66: \ + out = D ^ S; \ + break; \ + case 0x67: \ + out = S ^ (D | ~(P | S)); \ + break; \ + case 0x68: \ + out = ~(D ^ (S ^ (P | ~(D | S)))); \ + break; \ + case 0x69: \ + out = ~(P ^ (D ^ S)); \ + break; \ + case 0x6a: \ + out = D ^ (P & S); \ + break; \ + case 0x6b: \ + out = ~(P ^ (S ^ (D & (P | S)))); \ + break; \ + case 0x6c: \ + out = S ^ (D & P); \ + break; \ + case 0x6d: \ + out = ~(P ^ (D ^ (S & (P | D)))); \ + break; \ + case 0x6e: \ + out = S ^ (D & (P | ~S)); \ + break; \ + case 0x6f: \ + out = ~(P & ~(D ^ S)); \ + break; \ + case 0x70: \ + out = P & ~(D & S); \ + break; \ + case 0x71: \ + out = ~(S ^ ((S ^ D) & (P ^ D))); \ + break; \ + case 0x72: \ + out = S ^ (D | (P ^ S)); \ + break; \ + case 0x73: \ + out = ~(S & (D | ~P)); \ + break; \ + case 0x74: \ + out = D ^ (S | (P ^ D)); \ + break; \ + case 0x75: \ + out = ~(D & (S | ~P)); \ + break; \ + case 0x76: \ + out = S ^ (D | (P & ~S)); \ + break; \ + case 0x77: \ + out = ~(D & S); \ + break; \ + case 0x78: \ + out = P ^ (D & S); \ + break; \ + case 0x79: \ + out = ~(D ^ (S ^ (P & (D | S)))); \ + break; \ + case 0x7a: \ + out = D ^ (P & (S | ~D)); \ + break; \ + case 0x7b: \ + out = ~(S & ~(D ^ P)); \ + break; \ + case 0x7c: \ + out = S ^ (P & (D | ~S)); \ + break; \ + case 0x7d: \ + out = ~(D & ~(P ^ S)); \ + break; \ + case 0x7e: \ + out = (S ^ P) | (D ^ S); \ + break; \ + case 0x7f: \ + out = ~(D & (P & S)); \ + break; \ + case 0x80: \ + out = D & (P & S); \ + break; \ + case 0x81: \ + out = ~((S ^ P) | (D ^ S)); \ + break; \ + case 0x82: \ + out = D & ~(P ^ S); \ + break; \ + case 0x83: \ + out = ~(S ^ (P & (D | ~S))); \ + break; \ + case 0x84: \ + out = S & ~(D ^ P); \ + break; \ + case 0x85: \ + out = ~(P ^ (D & (S | ~P))); \ + break; \ + case 0x86: \ + out = D ^ (S ^ (P & (D | S))); \ + break; \ + case 0x87: \ + out = ~(P ^ (D & S)); \ + break; \ + case 0x88: \ + out = D & S; \ + break; \ + case 0x89: \ + out = ~(S ^ (D | (P & ~S))); \ + break; \ + case 0x8a: \ + out = D & (S | ~P); \ + break; \ + case 0x8b: \ + out = ~(D ^ (S | (P ^ D))); \ + break; \ + case 0x8c: \ + out = S & (D | ~P); \ + break; \ + case 0x8d: \ + out = ~(S ^ (D | (P ^ S))); \ + break; \ + case 0x8e: \ + out = S ^ ((S ^ D) & (P ^ D)); \ + break; \ + case 0x8f: \ + out = ~(P & ~(D & S)); \ + break; \ + case 0x90: \ + out = P & ~(D ^ S); \ + break; \ + case 0x91: \ + out = ~(S ^ (D & (P | ~S))); \ + break; \ + case 0x92: \ + out = D ^ (P ^ (S & (D | P))); \ + break; \ + case 0x93: \ + out = ~(S ^ (P & D)); \ + break; \ + case 0x94: \ + out = P ^ (S ^ (D & (P | S))); \ + break; \ + case 0x95: \ + out = ~(D ^ (P & S)); \ + break; \ + case 0x96: \ + out = D ^ (P ^ S); \ + break; \ + case 0x97: \ + out = P ^ (S ^ (D | ~(P | S))); \ + break; \ + case 0x98: \ + out = ~(S ^ (D | ~(P | S))); \ + break; \ + case 0x99: \ + out = ~(D ^ S); \ + break; \ + case 0x9a: \ + out = D ^ (P & ~S); \ + break; \ + case 0x9b: \ + out = ~(S ^ (D & (P | S))); \ + break; \ + case 0x9c: \ + out = S ^ (P & ~D); \ + break; \ + case 0x9d: \ + out = ~(D ^ (S & (P | D))); \ + break; \ + case 0x9e: \ + out = D ^ (S ^ (P | (D & S))); \ + break; \ + case 0x9f: \ + out = ~(P & (D ^ S)); \ + break; \ + case 0xa0: \ + out = D & P; \ + break; \ + case 0xa1: \ + out = ~(P ^ (D | (S & ~P))); \ + break; \ + case 0xa2: \ + out = D & (P | ~S); \ + break; \ + case 0xa3: \ + out = ~(D ^ (P | (S ^ D))); \ + break; \ + case 0xa4: \ + out = ~(P ^ (D | ~(S | P))); \ + break; \ + case 0xa5: \ + out = ~(P ^ D); \ + break; \ + case 0xa6: \ + out = D ^ (S & ~P); \ + break; \ + case 0xa7: \ + out = ~(P ^ (D & (S | P))); \ + break; \ + case 0xa8: \ + out = D & (P | S); \ + break; \ + case 0xa9: \ + out = ~(D ^ (P | S)); \ + break; \ + case 0xaa: \ + out = D; \ + break; \ + case 0xab: \ + out = D | ~(P | S); \ + break; \ + case 0xac: \ + out = S ^ (P & (D ^ S)); \ + break; \ + case 0xad: \ + out = ~(D ^ (P | (S & D))); \ + break; \ + case 0xae: \ + out = D | (S & ~P); \ + break; \ + case 0xaf: \ + out = D | ~P; \ + break; \ + case 0xb0: \ + out = P & (D | ~S); \ + break; \ + case 0xb1: \ + out = ~(P ^ (D | (S ^ P))); \ + break; \ + case 0xb2: \ + out = S ^ ((S ^ P) | (D ^ S)); \ + break; \ + case 0xb3: \ + out = ~(S & ~(D & P)); \ + break; \ + case 0xb4: \ + out = P ^ (S & ~D); \ + break; \ + case 0xb5: \ + out = ~(D ^ (P & (S | D))); \ + break; \ + case 0xb6: \ + out = D ^ (P ^ (S | (D & P))); \ + break; \ + case 0xb7: \ + out = ~(S & (D ^ P)); \ + break; \ + case 0xb8: \ + out = P ^ (S & (D ^ P)); \ + break; \ + case 0xb9: \ + out = ~(D ^ (S | (P & D))); \ + break; \ + case 0xba: \ + out = D | (P & ~S); \ + break; \ + case 0xbb: \ + out = D | ~S; \ + break; \ + case 0xbc: \ + out = S ^ (P & ~(D & S)); \ + break; \ + case 0xbd: \ + out = ~((S ^ D) & (P ^ D)); \ + break; \ + case 0xbe: \ + out = D | (P ^ S); \ + break; \ + case 0xbf: \ + out = D | ~(P & S); \ + break; \ + case 0xc0: \ + out = P & S; \ + break; \ + case 0xc1: \ + out = ~(S ^ (P | (D & ~S))); \ + break; \ + case 0xc2: \ + out = ~(S ^ (P | ~(D | S))); \ + break; \ + case 0xc3: \ + out = ~(P ^ S); \ + break; \ + case 0xc4: \ + out = S & (P | ~D); \ + break; \ + case 0xc5: \ + out = ~(S ^ (P | (D ^ S))); \ + break; \ + case 0xc6: \ + out = S ^ (D & ~P); \ + break; \ + case 0xc7: \ + out = ~(P ^ (S & (D | P))); \ + break; \ + case 0xc8: \ + out = S & (D | P); \ + break; \ + case 0xc9: \ + out = ~(S ^ (P | D)); \ + break; \ + case 0xca: \ + out = D ^ (P & (S ^ D)); \ + break; \ + case 0xcb: \ + out = ~(S ^ (P | (D & S))); \ + break; \ + case 0xcc: \ + out = S; \ + break; \ + case 0xcd: \ + out = S | ~(D | P); \ + break; \ + case 0xce: \ + out = S | (D & ~P); \ + break; \ + case 0xcf: \ + out = S | ~P; \ + break; \ + case 0xd0: \ + out = P & (S | ~D); \ + break; \ + case 0xd1: \ + out = ~(P ^ (S | (D ^ P))); \ + break; \ + case 0xd2: \ + out = P ^ (D & ~S); \ + break; \ + case 0xd3: \ + out = ~(S ^ (P & (D | S))); \ + break; \ + case 0xd4: \ + out = S ^ ((S ^ P) & (P ^ D)); \ + break; \ + case 0xd5: \ + out = ~(D & ~(P & S)); \ + break; \ + case 0xd6: \ + out = P ^ (S ^ (D | (P & S))); \ + break; \ + case 0xd7: \ + out = ~(D & (P ^ S)); \ + break; \ + case 0xd8: \ + out = P ^ (D & (S ^ P)); \ + break; \ + case 0xd9: \ + out = ~(S ^ (D | (P & S))); \ + break; \ + case 0xda: \ + out = D ^ (P & ~(S & D)); \ + break; \ + case 0xdb: \ + out = ~((S ^ P) & (D ^ S)); \ + break; \ + case 0xdc: \ + out = S | (P & ~D); \ + break; \ + case 0xdd: \ + out = S | ~D; \ + break; \ + case 0xde: \ + out = S | (D ^ P); \ + break; \ + case 0xdf: \ + out = S | ~(D & P); \ + break; \ + case 0xe0: \ + out = P & (D | S); \ + break; \ + case 0xe1: \ + out = ~(P ^ (D | S)); \ + break; \ + case 0xe2: \ + out = D ^ (S & (P ^ D)); \ + break; \ + case 0xe3: \ + out = ~(P ^ (S | (D & P))); \ + break; \ + case 0xe4: \ + out = S ^ (D & (P ^ S)); \ + break; \ + case 0xe5: \ + out = ~(P ^ (D | (S & P))); \ + break; \ + case 0xe6: \ + out = S ^ (D & ~(P & S)); \ + break; \ + case 0xe7: \ + out = ~((S ^ P) & (P ^ D)); \ + break; \ + case 0xe8: \ + out = S ^ ((S ^ P) & (D ^ S)); \ + break; \ + case 0xe9: \ + out = ~(D ^ (S ^ (P & ~(D & S)))); \ + break; \ + case 0xea: \ + out = D | (P & S); \ + break; \ + case 0xeb: \ + out = D | ~(P ^ S); \ + break; \ + case 0xec: \ + out = S | (D & P); \ + break; \ + case 0xed: \ + out = S | ~(D ^ P); \ + break; \ + case 0xee: \ + out = D | S; \ + break; \ + case 0xef: \ + out = S | (D | ~P); \ + break; \ + case 0xf0: \ + out = P; \ + break; \ + case 0xf1: \ + out = P | ~(D | S); \ + break; \ + case 0xf2: \ + out = P | (D & ~S); \ + break; \ + case 0xf3: \ + out = P | ~S; \ + break; \ + case 0xf4: \ + out = P | (S & ~D); \ + break; \ + case 0xf5: \ + out = P | ~D; \ + break; \ + case 0xf6: \ + out = P | (D ^ S); \ + break; \ + case 0xf7: \ + out = P | ~(D & S); \ + break; \ + case 0xf8: \ + out = P | (D & S); \ + break; \ + case 0xf9: \ + out = P | ~(D ^ S); \ + break; \ + case 0xfa: \ + out = D | P; \ + break; \ + case 0xfb: \ + out = D | (P | ~S); \ + break; \ + case 0xfc: \ + out = P | S; \ + break; \ + case 0xfd: \ + out = P | (S | ~D); \ + break; \ + case 0xfe: \ + out = D | (P | S); \ + break; \ + case 0xff: \ + out = ~0; \ + break; \ + } \ + } +#define ROPMIX \ + { \ + old_dest_dat = dest_dat; \ + ROPMIX_READ(dest_dat, pat_dat, src_dat); \ + out = (out & s3->accel.wrt_mask) | (old_dest_dat & ~s3->accel.wrt_mask); \ + } - -#define ROPMIX_READ(D, P, S) \ - { \ - switch (rop) { \ - case 0x00: out = 0; break; \ - case 0x01: out = ~(D | (P | S)); break; \ - case 0x02: out = D & ~(P | S); break; \ - case 0x03: out = ~(P | S); break; \ - case 0x04: out = S & ~(D | P); break; \ - case 0x05: out = ~(D | P); break; \ - case 0x06: out = ~(P | ~(D ^ S)); break; \ - case 0x07: out = ~(P | (D & S)); break; \ - case 0x08: out = S & (D & ~P); break; \ - case 0x09: out = ~(P | (D ^ S)); break; \ - case 0x0a: out = D & ~P; break; \ - case 0x0b: out = ~(P | (S & ~D)); break; \ - case 0x0c: out = S & ~P; break; \ - case 0x0d: out = ~(P | (D & ~S)); break; \ - case 0x0e: out = ~(P | ~(D | S)); break; \ - case 0x0f: out = ~P; break; \ - case 0x10: out = P & ~(D | S); break; \ - case 0x11: out = ~(D | S); break; \ - case 0x12: out = ~(S | ~(D ^ P)); break; \ - case 0x13: out = ~(S | (D & P)); break; \ - case 0x14: out = ~(D | ~(P ^ S)); break; \ - case 0x15: out = ~(D | (P & S)); break; \ - case 0x16: out = P ^ (S ^ (D & ~(P & S))); break; \ - case 0x17: out = ~(S ^ ((S ^ P) & (D ^ S))); break; \ - case 0x18: out = (S ^ P) & (P ^ D); break; \ - case 0x19: out = ~(S ^ (D & ~(P & S))); break; \ - case 0x1a: out = P ^ (D | (S & P)); break; \ - case 0x1b: out = ~(S ^ (D & (P ^ S))); break; \ - case 0x1c: out = P ^ (S | (D & P)); break; \ - case 0x1d: out = ~(D ^ (S & (P ^ D))); break; \ - case 0x1e: out = P ^ (D | S); break; \ - case 0x1f: out = ~(P & (D | S)); break; \ - case 0x20: out = D & (P & ~S); break; \ - case 0x21: out = ~(S | (D ^ P)); break; \ - case 0x22: out = D & ~S; break; \ - case 0x23: out = ~(S | (P & ~D)); break; \ - case 0x24: out = (S ^ P) & (D ^ S); break; \ - case 0x25: out = ~(P ^ (D & ~(S & P))); break; \ - case 0x26: out = S ^ (D | (P & S)); break; \ - case 0x27: out = S ^ (D | ~(P ^ S)); break; \ - case 0x28: out = D & (P ^ S); break; \ - case 0x29: out = ~(P ^ (S ^ (D | (P & S)))); break; \ - case 0x2a: out = D & ~(P & S); break; \ - case 0x2b: out = ~(S ^ ((S ^ P) & (P ^ D))); break; \ - case 0x2c: out = S ^ (P & (D | S)); break; \ - case 0x2d: out = P ^ (S | ~D); break; \ - case 0x2e: out = P ^ (S | (D ^ P)); break; \ - case 0x2f: out = ~(P & (S | ~D)); break; \ - case 0x30: out = P & ~S; break; \ - case 0x31: out = ~(S | (D & ~P)); break; \ - case 0x32: out = S ^ (D | (P | S)); break; \ - case 0x33: out = ~S; break; \ - case 0x34: out = S ^ (P | (D & S)); break; \ - case 0x35: out = S ^ (P | ~(D ^ S)); break; \ - case 0x36: out = S ^ (D | P); break; \ - case 0x37: out = ~(S & (D | P)); break; \ - case 0x38: out = P ^ (S & (D | P)); break; \ - case 0x39: out = S ^ (P | ~D); break; \ - case 0x3a: out = S ^ (P | (D ^ S)); break; \ - case 0x3b: out = ~(S & (P | ~D)); break; \ - case 0x3c: out = P ^ S; break; \ - case 0x3d: out = S ^ (P | ~(D | S)); break; \ - case 0x3e: out = S ^ (P | (D & ~S)); break; \ - case 0x3f: out = ~(P & S); break; \ - case 0x40: out = P & (S & ~D); break; \ - case 0x41: out = ~(D | (P ^ S)); break; \ - case 0x42: out = (S ^ D) & (P ^ D); break; \ - case 0x43: out = ~(S ^ (P & ~(D & S))); break; \ - case 0x44: out = S & ~D; break; \ - case 0x45: out = ~(D | (P & ~S)); break; \ - case 0x46: out = D ^ (S | (P & D)); break; \ - case 0x47: out = ~(P ^ (S & (D ^ P))); break; \ - case 0x48: out = S & (D ^ P); break; \ - case 0x49: out = ~(P ^ (D ^ (S | (P & D)))); break; \ - case 0x4a: out = D ^ (P & (S | D)); break; \ - case 0x4b: out = P ^ (D | ~S); break; \ - case 0x4c: out = S & ~(D & P); break; \ - case 0x4d: out = ~(S ^ ((S ^ P) | (D ^ S))); break; \ - case 0x4e: out = P ^ (D | (S ^ P)); break; \ - case 0x4f: out = ~(P & (D | ~S)); break; \ - case 0x50: out = P & ~D; break; \ - case 0x51: out = ~(D | (S & ~P)); break; \ - case 0x52: out = D ^ (P | (S & D)); break; \ - case 0x53: out = ~(S ^ (P & (D ^ S))); break; \ - case 0x54: out = ~(D | ~(P | S)); break; \ - case 0x55: out = ~D; break; \ - case 0x56: out = D ^ (P | S); break; \ - case 0x57: out = ~(D & (P | S)); break; \ - case 0x58: out = P ^ (D & (S | P)); break; \ - case 0x59: out = D ^ (P | ~S); break; \ - case 0x5a: out = D ^ P; break; \ - case 0x5b: out = D ^ (P | ~(S | D)); break; \ - case 0x5c: out = D ^ (P | (S ^ D)); break; \ - case 0x5d: out = ~(D & (P | ~S)); break; \ - case 0x5e: out = D ^ (P | (S & ~D)); break; \ - case 0x5f: out = ~(D & P); break; \ - case 0x60: out = P & (D ^ S); break; \ - case 0x61: out = ~(D ^ (S ^ (P | (D & S)))); break; \ - case 0x62: out = D ^ (S & (P | D)); break; \ - case 0x63: out = S ^ (D | ~P); break; \ - case 0x64: out = S ^ (D & (P | S)); break; \ - case 0x65: out = D ^ (S | ~P); break; \ - case 0x66: out = D ^ S; break; \ - case 0x67: out = S ^ (D | ~(P | S)); break; \ - case 0x68: out = ~(D ^ (S ^ (P | ~(D | S)))); break; \ - case 0x69: out = ~(P ^ (D ^ S)); break; \ - case 0x6a: out = D ^ (P & S); break; \ - case 0x6b: out = ~(P ^ (S ^ (D & (P | S)))); break; \ - case 0x6c: out = S ^ (D & P); break; \ - case 0x6d: out = ~(P ^ (D ^ (S & (P | D)))); break; \ - case 0x6e: out = S ^ (D & (P | ~S)); break; \ - case 0x6f: out = ~(P & ~(D ^ S)); break; \ - case 0x70: out = P & ~(D & S); break; \ - case 0x71: out = ~(S ^ ((S ^ D) & (P ^ D))); break; \ - case 0x72: out = S ^ (D | (P ^ S)); break; \ - case 0x73: out = ~(S & (D | ~P)); break; \ - case 0x74: out = D ^ (S | (P ^ D)); break; \ - case 0x75: out = ~(D & (S | ~P)); break; \ - case 0x76: out = S ^ (D | (P & ~S)); break; \ - case 0x77: out = ~(D & S); break; \ - case 0x78: out = P ^ (D & S); break; \ - case 0x79: out = ~(D ^ (S ^ (P & (D | S)))); break; \ - case 0x7a: out = D ^ (P & (S | ~D)); break; \ - case 0x7b: out = ~(S & ~(D ^ P)); break; \ - case 0x7c: out = S ^ (P & (D | ~S)); break; \ - case 0x7d: out = ~(D & ~(P ^ S)); break; \ - case 0x7e: out = (S ^ P) | (D ^ S); break; \ - case 0x7f: out = ~(D & (P & S)); break; \ - case 0x80: out = D & (P & S); break; \ - case 0x81: out = ~((S ^ P) | (D ^ S)); break; \ - case 0x82: out = D & ~(P ^ S); break; \ - case 0x83: out = ~(S ^ (P & (D | ~S))); break; \ - case 0x84: out = S & ~(D ^ P); break; \ - case 0x85: out = ~(P ^ (D & (S | ~P))); break; \ - case 0x86: out = D ^ (S ^ (P & (D | S))); break; \ - case 0x87: out = ~(P ^ (D & S)); break; \ - case 0x88: out = D & S; break; \ - case 0x89: out = ~(S ^ (D | (P & ~S))); break; \ - case 0x8a: out = D & (S | ~P); break; \ - case 0x8b: out = ~(D ^ (S | (P ^ D))); break; \ - case 0x8c: out = S & (D | ~P); break; \ - case 0x8d: out = ~(S ^ (D | (P ^ S))); break; \ - case 0x8e: out = S ^ ((S ^ D) & (P ^ D)); break; \ - case 0x8f: out = ~(P & ~(D & S)); break; \ - case 0x90: out = P & ~(D ^ S); break; \ - case 0x91: out = ~(S ^ (D & (P | ~S))); break; \ - case 0x92: out = D ^ (P ^ (S & (D | P))); break; \ - case 0x93: out = ~(S ^ (P & D)); break; \ - case 0x94: out = P ^ (S ^ (D & (P | S))); break; \ - case 0x95: out = ~(D ^ (P & S)); break; \ - case 0x96: out = D ^ (P ^ S); break; \ - case 0x97: out = P ^ (S ^ (D | ~(P | S))); break; \ - case 0x98: out = ~(S ^ (D | ~(P | S))); break; \ - case 0x99: out = ~(D ^ S); break; \ - case 0x9a: out = D ^ (P & ~S); break; \ - case 0x9b: out = ~(S ^ (D & (P | S))); break; \ - case 0x9c: out = S ^ (P & ~D); break; \ - case 0x9d: out = ~(D ^ (S & (P | D))); break; \ - case 0x9e: out = D ^ (S ^ (P | (D & S))); break; \ - case 0x9f: out = ~(P & (D ^ S)); break; \ - case 0xa0: out = D & P; break; \ - case 0xa1: out = ~(P ^ (D | (S & ~P))); break; \ - case 0xa2: out = D & (P | ~S); break; \ - case 0xa3: out = ~(D ^ (P | (S ^ D))); break; \ - case 0xa4: out = ~(P ^ (D | ~(S | P))); break; \ - case 0xa5: out = ~(P ^ D); break; \ - case 0xa6: out = D ^ (S & ~P); break; \ - case 0xa7: out = ~(P ^ (D & (S | P))); break; \ - case 0xa8: out = D & (P | S); break; \ - case 0xa9: out = ~(D ^ (P | S)); break; \ - case 0xaa: out = D; break; \ - case 0xab: out = D | ~(P | S); break; \ - case 0xac: out = S ^ (P & (D ^ S)); break; \ - case 0xad: out = ~(D ^ (P | (S & D))); break; \ - case 0xae: out = D | (S & ~P); break; \ - case 0xaf: out = D | ~P; break; \ - case 0xb0: out = P & (D | ~S); break; \ - case 0xb1: out = ~(P ^ (D | (S ^ P))); break; \ - case 0xb2: out = S ^ ((S ^ P) | (D ^ S)); break; \ - case 0xb3: out = ~(S & ~(D & P)); break; \ - case 0xb4: out = P ^ (S & ~D); break; \ - case 0xb5: out = ~(D ^ (P & (S | D))); break; \ - case 0xb6: out = D ^ (P ^ (S | (D & P))); break; \ - case 0xb7: out = ~(S & (D ^ P)); break; \ - case 0xb8: out = P ^ (S & (D ^ P)); break; \ - case 0xb9: out = ~(D ^ (S | (P & D))); break; \ - case 0xba: out = D | (P & ~S); break; \ - case 0xbb: out = D | ~S; break; \ - case 0xbc: out = S ^ (P & ~(D & S)); break; \ - case 0xbd: out = ~((S ^ D) & (P ^ D)); break; \ - case 0xbe: out = D | (P ^ S); break; \ - case 0xbf: out = D | ~(P & S); break; \ - case 0xc0: out = P & S; break; \ - case 0xc1: out = ~(S ^ (P | (D & ~S))); break; \ - case 0xc2: out = ~(S ^ (P | ~(D | S))); break; \ - case 0xc3: out = ~(P ^ S); break; \ - case 0xc4: out = S & (P | ~D); break; \ - case 0xc5: out = ~(S ^ (P | (D ^ S))); break; \ - case 0xc6: out = S ^ (D & ~P); break; \ - case 0xc7: out = ~(P ^ (S & (D | P))); break; \ - case 0xc8: out = S & (D | P); break; \ - case 0xc9: out = ~(S ^ (P | D)); break; \ - case 0xca: out = D ^ (P & (S ^ D)); break; \ - case 0xcb: out = ~(S ^ (P | (D & S))); break; \ - case 0xcc: out = S; break; \ - case 0xcd: out = S | ~(D | P); break; \ - case 0xce: out = S | (D & ~P); break; \ - case 0xcf: out = S | ~P; break; \ - case 0xd0: out = P & (S | ~D); break; \ - case 0xd1: out = ~(P ^ (S | (D ^ P))); break; \ - case 0xd2: out = P ^ (D & ~S); break; \ - case 0xd3: out = ~(S ^ (P & (D | S))); break; \ - case 0xd4: out = S ^ ((S ^ P) & (P ^ D)); break; \ - case 0xd5: out = ~(D & ~(P & S)); break; \ - case 0xd6: out = P ^ (S ^ (D | (P & S))); break; \ - case 0xd7: out = ~(D & (P ^ S)); break; \ - case 0xd8: out = P ^ (D & (S ^ P)); break; \ - case 0xd9: out = ~(S ^ (D | (P & S))); break; \ - case 0xda: out = D ^ (P & ~(S & D)); break; \ - case 0xdb: out = ~((S ^ P) & (D ^ S)); break; \ - case 0xdc: out = S | (P & ~D); break; \ - case 0xdd: out = S | ~D; break; \ - case 0xde: out = S | (D ^ P); break; \ - case 0xdf: out = S | ~(D & P); break; \ - case 0xe0: out = P & (D | S); break; \ - case 0xe1: out = ~(P ^ (D | S)); break; \ - case 0xe2: out = D ^ (S & (P ^ D)); break; \ - case 0xe3: out = ~(P ^ (S | (D & P))); break; \ - case 0xe4: out = S ^ (D & (P ^ S)); break; \ - case 0xe5: out = ~(P ^ (D | (S & P))); break; \ - case 0xe6: out = S ^ (D & ~(P & S)); break; \ - case 0xe7: out = ~((S ^ P) & (P ^ D)); break; \ - case 0xe8: out = S ^ ((S ^ P) & (D ^ S)); break; \ - case 0xe9: out = ~(D ^ (S ^ (P & ~(D & S)))); break; \ - case 0xea: out = D | (P & S); break; \ - case 0xeb: out = D | ~(P ^ S); break; \ - case 0xec: out = S | (D & P); break; \ - case 0xed: out = S | ~(D ^ P); break; \ - case 0xee: out = D | S; break; \ - case 0xef: out = S | (D | ~P); break; \ - case 0xf0: out = P; break; \ - case 0xf1: out = P | ~(D | S); break; \ - case 0xf2: out = P | (D & ~S); break; \ - case 0xf3: out = P | ~S; break; \ - case 0xf4: out = P | (S & ~D); break; \ - case 0xf5: out = P | ~D; break; \ - case 0xf6: out = P | (D ^ S); break; \ - case 0xf7: out = P | ~(D & S); break; \ - case 0xf8: out = P | (D & S); break; \ - case 0xf9: out = P | ~(D ^ S); break; \ - case 0xfa: out = D | P; break; \ - case 0xfb: out = D | (P | ~S); break; \ - case 0xfc: out = P | S; break; \ - case 0xfd: out = P | (S | ~D); break; \ - case 0xfe: out = D | (P | S); break; \ - case 0xff: out = ~0; break; \ - } \ - } - - -#define ROPMIX { \ - old_dest_dat = dest_dat; \ - ROPMIX_READ(dest_dat, pat_dat, src_dat); \ - out = (out & s3->accel.wrt_mask) | (old_dest_dat & ~s3->accel.wrt_mask); \ - } - - -#define WRITE(addr, dat) if (s3->bpp == 0 && !s3->color_16bit) \ - { \ - svga->vram[dword_remap(svga, addr) & s3->vram_mask] = dat; \ - svga->changedvram[(dword_remap(svga, addr) & s3->vram_mask) >> 12] = changeframecount; \ - } \ - else if (s3->bpp == 1 || s3->color_16bit) \ - { \ - vram_w[dword_remap_w(svga, addr) & (s3->vram_mask >> 1)] = dat; \ - svga->changedvram[(dword_remap_w(svga, addr) & (s3->vram_mask >> 1)) >> 11] = changeframecount; \ - } \ - else if (s3->bpp == 2) \ - { \ - svga->vram[dword_remap(svga, addr) & s3->vram_mask] = dat; \ - svga->changedvram[(dword_remap(svga, addr) & s3->vram_mask) >> 12] = changeframecount; \ - } \ - else \ - { \ - vram_l[dword_remap_l(svga, addr) & (s3->vram_mask >> 2)] = dat; \ - svga->changedvram[(dword_remap_l(svga, addr) & (s3->vram_mask >> 2)) >> 10] = changeframecount; \ - } - +#define WRITE(addr, dat) \ + if (s3->bpp == 0 && !s3->color_16bit) { \ + svga->vram[dword_remap(svga, addr) & s3->vram_mask] = dat; \ + svga->changedvram[(dword_remap(svga, addr) & s3->vram_mask) >> 12] = changeframecount; \ + } else if (s3->bpp == 1 || s3->color_16bit) { \ + vram_w[dword_remap_w(svga, addr) & (s3->vram_mask >> 1)] = dat; \ + svga->changedvram[(dword_remap_w(svga, addr) & (s3->vram_mask >> 1)) >> 11] = changeframecount; \ + } else if (s3->bpp == 2) { \ + svga->vram[dword_remap(svga, addr) & s3->vram_mask] = dat; \ + svga->changedvram[(dword_remap(svga, addr) & s3->vram_mask) >> 12] = changeframecount; \ + } else { \ + vram_l[dword_remap_l(svga, addr) & (s3->vram_mask >> 2)] = dat; \ + svga->changedvram[(dword_remap_l(svga, addr) & (s3->vram_mask >> 2)) >> 10] = changeframecount; \ + } static __inline void convert_to_rgb32(int idf, int is_yuv, uint32_t val, uint8_t *r, uint8_t *g, uint8_t *b, uint8_t *r2, uint8_t *g2, uint8_t *b2) @@ -4863,73 +5668,73 @@ convert_to_rgb32(int idf, int is_yuv, uint32_t val, uint8_t *r, uint8_t *g, uint static double dU = 0.0, dV = 0.0; switch (idf) { - case 0: /* 8 bpp, RGB 3-3-2 */ - dr = (double) ((val >> 5) & 0x07); - dg = (double) ((val >> 2) & 0x07); - db = (double) (val & 0x03); - dr = (dr / 7.0) * 255.0; - dg = (dg / 7.0) * 255.0; - db = (db / 3.0) * 255.0; - break; - case 3: /* 32bpp, RGB 8-8-8 */ - dr = (double) ((val >> 16) & 0xff); - dg = (double) ((val >> 8) & 0xff); - db = (double) (val & 0xff); - break; - case 4: /* YCbCr */ - if (is_yuv) { - dU = ((double) (val & 0xff)) - 128.0; - dY1 = (double) ((val >> 8) & 0xff); - dY1 = (298.0 * (dY1 - 16.0)) / 256.0; - dV = ((double) ((val >> 16) & 0xff)) - 128.0; - dY2 = (double) ((val >> 24) & 0xff); - dY2 = (298.0 * (dY2 - 16.0)) / 256.0; + case 0: /* 8 bpp, RGB 3-3-2 */ + dr = (double) ((val >> 5) & 0x07); + dg = (double) ((val >> 2) & 0x07); + db = (double) (val & 0x03); + dr = (dr / 7.0) * 255.0; + dg = (dg / 7.0) * 255.0; + db = (db / 3.0) * 255.0; + break; + case 3: /* 32bpp, RGB 8-8-8 */ + dr = (double) ((val >> 16) & 0xff); + dg = (double) ((val >> 8) & 0xff); + db = (double) (val & 0xff); + break; + case 4: /* YCbCr */ + if (is_yuv) { + dU = ((double) (val & 0xff)) - 128.0; + dY1 = (double) ((val >> 8) & 0xff); + dY1 = (298.0 * (dY1 - 16.0)) / 256.0; + dV = ((double) ((val >> 16) & 0xff)) - 128.0; + dY2 = (double) ((val >> 24) & 0xff); + dY2 = (298.0 * (dY2 - 16.0)) / 256.0; - dr = (309.0 * dV) / 256.0; - dg = ((100.0 * dU) + (208.0 * dV)) / 256.0; - db = (516.0 * dU) / 256.0; - } else { - dY1 = (double) (val & 0xff); - dCr = ((double) ((val >> 8) & 0xff)) - 128.0; - dY2 = (double) ((val >> 16) & 0xff); - dCb = ((double) ((val >> 24) & 0xff)) - 128.0; + dr = (309.0 * dV) / 256.0; + dg = ((100.0 * dU) + (208.0 * dV)) / 256.0; + db = (516.0 * dU) / 256.0; + } else { + dY1 = (double) (val & 0xff); + dCr = ((double) ((val >> 8) & 0xff)) - 128.0; + dY2 = (double) ((val >> 16) & 0xff); + dCb = ((double) ((val >> 24) & 0xff)) - 128.0; - dr = (359.0 * dCr) / 256.0; - dg = ((88.0 * dCb) + (183.0 * dCr)) / 2560.0; - db = (453.0 * dCr) / 256.0; - } + dr = (359.0 * dCr) / 256.0; + dg = ((88.0 * dCb) + (183.0 * dCr)) / 2560.0; + db = (453.0 * dCr) / 256.0; + } - *r = (uint8_t) round(dY1 + dr); - CLAMP(*r); - *g = (uint8_t) round(dY1 - dg); - CLAMP(*g); - *b = (uint8_t) round(dY1 + db); - CLAMP(*b); + *r = (uint8_t) round(dY1 + dr); + CLAMP(*r); + *g = (uint8_t) round(dY1 - dg); + CLAMP(*g); + *b = (uint8_t) round(dY1 + db); + CLAMP(*b); - *r2 = (uint8_t) round(dY2 + dr); - CLAMP(*r2); - *g2 = (uint8_t) round(dY2 - dg); - CLAMP(*g2); - *b2 = (uint8_t) round(dY2 + db); - CLAMP(*b2); - return; - case 5: /* 16bpp, raw */ - case 7: /* 16bpp, RGB 5-6-5 */ - dr = (double) ((val >> 11) & 0x1f); - dg = (double) ((val >> 5) & 0x03f); - db = (double) (val & 0x1f); - dr = (dr / 31.0) * 255.0; - dg = (dg / 63.0) * 255.0; - db = (db / 31.0) * 255.0; - break; - case 6: /* 15bpp, RGB 5-5-5 */ - dr = (double) ((val >> 10) & 0x1f); - dg = (double) ((val >> 5) & 0x01f); - db = (double) (val & 0x1f); - dr = (dr / 31.0) * 255.0; - dg = (dg / 31.0) * 255.0; - db = (db / 31.0) * 255.0; - break; + *r2 = (uint8_t) round(dY2 + dr); + CLAMP(*r2); + *g2 = (uint8_t) round(dY2 - dg); + CLAMP(*g2); + *b2 = (uint8_t) round(dY2 + db); + CLAMP(*b2); + return; + case 5: /* 16bpp, raw */ + case 7: /* 16bpp, RGB 5-6-5 */ + dr = (double) ((val >> 11) & 0x1f); + dg = (double) ((val >> 5) & 0x03f); + db = (double) (val & 0x1f); + dr = (dr / 31.0) * 255.0; + dg = (dg / 63.0) * 255.0; + db = (db / 31.0) * 255.0; + break; + case 6: /* 15bpp, RGB 5-5-5 */ + dr = (double) ((val >> 10) & 0x1f); + dg = (double) ((val >> 5) & 0x01f); + db = (double) (val & 0x1f); + dr = (dr / 31.0) * 255.0; + dg = (dg / 31.0) * 255.0; + db = (db / 31.0) * 255.0; + break; } *r = (uint8_t) round(dr); @@ -4937,7 +5742,6 @@ convert_to_rgb32(int idf, int is_yuv, uint32_t val, uint8_t *r, uint8_t *g, uint *b = (uint8_t) round(db); } - static __inline void convert_from_rgb32(int idf, int odf, int is_yuv, uint32_t *val, uint8_t r, uint8_t g, uint8_t b, uint8_t r2, uint8_t g2, uint8_t b2) { @@ -4951,70 +5755,70 @@ convert_from_rgb32(int idf, int odf, int is_yuv, uint32_t *val, uint8_t r, uint8 db = (double) b; switch (odf) { - case 0: /* 8 bpp, RGB 3-3-2 */ - switch (idf) { - case 3: - *val = (((uint32_t) round(dr)) << 16) + (((uint32_t) round(dg)) << 8) + ((uint32_t) round(db)); - break; - case 5: - case 7: - dr = (dr / 255.0) * 31.0; - dg = (dg / 255.0) * 63.0; - db = (db / 255.0) * 31.0; - *val = (((uint32_t) round(dr)) << 11) + (((uint32_t) round(dg)) << 5) + ((uint32_t) round(db)); - break; - case 6: - dr = (dr / 255.0) * 31.0; - dg = (dg / 255.0) * 31.0; - db = (db / 255.0) * 31.0; - *val = (((uint32_t) round(dr)) << 10) + (((uint32_t) round(dg)) << 5) + ((uint32_t) round(db)); - break; - case 0: - default: - dr = (dr / 255.0) * 7.0; - dg = (dg / 255.0) * 7.0; - db = (db / 255.0) * 3.0; - *val = (((uint32_t) round(dr)) << 5) + (((uint32_t) round(dg)) << 2) + ((uint32_t) round(db)); - break; - } - break; - case 3: /* 32bpp, RGB 8-8-8 */ - *val = (((uint32_t) round(dr)) << 16) + (((uint32_t) round(dg)) << 8) + ((uint32_t) round(db)); - break; - case 4: /* YCbCr */ - dr2 = (double) r2; - dg2 = (double) g2; - db2 = (double) b2; + case 0: /* 8 bpp, RGB 3-3-2 */ + switch (idf) { + case 3: + *val = (((uint32_t) round(dr)) << 16) + (((uint32_t) round(dg)) << 8) + ((uint32_t) round(db)); + break; + case 5: + case 7: + dr = (dr / 255.0) * 31.0; + dg = (dg / 255.0) * 63.0; + db = (db / 255.0) * 31.0; + *val = (((uint32_t) round(dr)) << 11) + (((uint32_t) round(dg)) << 5) + ((uint32_t) round(db)); + break; + case 6: + dr = (dr / 255.0) * 31.0; + dg = (dg / 255.0) * 31.0; + db = (db / 255.0) * 31.0; + *val = (((uint32_t) round(dr)) << 10) + (((uint32_t) round(dg)) << 5) + ((uint32_t) round(db)); + break; + case 0: + default: + dr = (dr / 255.0) * 7.0; + dg = (dg / 255.0) * 7.0; + db = (db / 255.0) * 3.0; + *val = (((uint32_t) round(dr)) << 5) + (((uint32_t) round(dg)) << 2) + ((uint32_t) round(db)); + break; + } + break; + case 3: /* 32bpp, RGB 8-8-8 */ + *val = (((uint32_t) round(dr)) << 16) + (((uint32_t) round(dg)) << 8) + ((uint32_t) round(db)); + break; + case 4: /* YCbCr */ + dr2 = (double) r2; + dg2 = (double) g2; + db2 = (double) b2; - if (is_yuv) { - dU = ((113046.0 * dg2) - (71552.0 * dr2) - (69488.0 * db2)) / 28509.0; - dV = ((3328.0 * dr2) + (800.0 * db2) - (4128.0 * dg2)) / 663.0; - dY1 = dr - ((309 * dV) / 256.0); - dY2 = dr2 - ((309 * dV) / 256.0); + if (is_yuv) { + dU = ((113046.0 * dg2) - (71552.0 * dr2) - (69488.0 * db2)) / 28509.0; + dV = ((3328.0 * dr2) + (800.0 * db2) - (4128.0 * dg2)) / 663.0; + dY1 = dr - ((309 * dV) / 256.0); + dY2 = dr2 - ((309 * dV) / 256.0); - *val = ((uint32_t) round(dU)) + (((uint32_t) round(dY1)) << 8) + (((uint32_t) round(dV)) << 16) + (((uint32_t) round(dY2)) << 24); - } else { - dCr = ((128.0 * db2) - (128.0 * dr2)) / 47.0; - dCb = ((128.0 * dr2) - (128.0 * dg2) - (271.0 * dCr)) / 44.0; - dY1 = dr - ((359.0 * dCr) / 256.0); - dY2 = dr2 - ((359.0 * dCr) / 256.0); + *val = ((uint32_t) round(dU)) + (((uint32_t) round(dY1)) << 8) + (((uint32_t) round(dV)) << 16) + (((uint32_t) round(dY2)) << 24); + } else { + dCr = ((128.0 * db2) - (128.0 * dr2)) / 47.0; + dCb = ((128.0 * dr2) - (128.0 * dg2) - (271.0 * dCr)) / 44.0; + dY1 = dr - ((359.0 * dCr) / 256.0); + dY2 = dr2 - ((359.0 * dCr) / 256.0); - *val = ((uint32_t) round(dY1)) + (((uint32_t) round(dCr)) << 8) + (((uint32_t) round(dY2)) << 16) + (((uint32_t) round(dCb)) << 24); - } - return; - case 5: /* 16bpp, raw */ - case 7: /* 16bpp, RGB 5-6-5 */ - dr = (dr / 255.0) * 31.0; - dg = (dg / 255.0) * 63.0; - db = (db / 255.0) * 31.0; - *val = (((uint32_t) round(dr)) << 11) + (((uint32_t) round(dg)) << 5) + ((uint32_t) round(db)); - break; - case 6: /* 15bpp, RGB 5-5-5 */ - dr = (dr / 255.0) * 31.0; - dg = (dg / 255.0) * 31.0; - db = (db / 255.0) * 31.0; - *val = (((uint32_t) round(dr)) << 10) + (((uint32_t) round(dg)) << 5) + ((uint32_t) round(db)); - break; + *val = ((uint32_t) round(dY1)) + (((uint32_t) round(dCr)) << 8) + (((uint32_t) round(dY2)) << 16) + (((uint32_t) round(dCb)) << 24); + } + return; + case 5: /* 16bpp, raw */ + case 7: /* 16bpp, RGB 5-6-5 */ + dr = (dr / 255.0) * 31.0; + dg = (dg / 255.0) * 63.0; + db = (db / 255.0) * 31.0; + *val = (((uint32_t) round(dr)) << 11) + (((uint32_t) round(dg)) << 5) + ((uint32_t) round(db)); + break; + case 6: /* 15bpp, RGB 5-5-5 */ + dr = (dr / 255.0) * 31.0; + dg = (dg / 255.0) * 31.0; + db = (db / 255.0) * 31.0; + *val = (((uint32_t) round(dr)) << 10) + (((uint32_t) round(dg)) << 5) + ((uint32_t) round(db)); + break; } } @@ -5022,1643 +5826,1744 @@ convert_from_rgb32(int idf, int odf, int is_yuv, uint32_t *val, uint8_t r, uint8 static void s3_visionx68_video_engine_op(uint32_t cpu_dat, s3_t *s3) { - svga_t *svga = &s3->svga; - int idf, odf, host; - int is_yuv; - uint32_t src, dest = 0x00000000; - uint8_t r = 0x00, g = 0x00, b = 0x00, r2 = 0x00, g2 = 0x00, b2 = 0x00; - uint16_t *vram_w = (uint16_t *)svga->vram; - uint32_t *vram_l = (uint32_t *)svga->vram; - uint32_t k2 = 0, dda = 0, diff = 0; - int count = -1; + svga_t *svga = &s3->svga; + int idf, odf, host; + int is_yuv; + uint32_t src, dest = 0x00000000; + uint8_t r = 0x00, g = 0x00, b = 0x00, r2 = 0x00, g2 = 0x00, b2 = 0x00; + uint16_t *vram_w = (uint16_t *) svga->vram; + uint32_t *vram_l = (uint32_t *) svga->vram; + uint32_t k2 = 0, dda = 0, diff = 0; + int count = -1; - idf = s3->videoengine.idf; - odf = s3->videoengine.odf; - is_yuv = s3->videoengine.yuv; - host = s3->videoengine.host_data; + idf = s3->videoengine.idf; + odf = s3->videoengine.odf; + is_yuv = s3->videoengine.yuv; + host = s3->videoengine.host_data; - k2 = s3->videoengine.k2 - 0x700; - dda = s3->videoengine.dda_init_accumulator - 0xf00; - diff = 0xff - k2; + k2 = s3->videoengine.k2 - 0x700; + dda = s3->videoengine.dda_init_accumulator - 0xf00; + diff = 0xff - k2; - s3->videoengine.busy = 1; + s3->videoengine.busy = 1; - if (host) { - if (idf == 0 && odf == 0) { - if (s3->bpp == 0) - count = 4; - else if (s3->bpp == 1) - count = 2; - else - count = 1; - } else { - if (idf == 0) - count = 4; - else if (idf == 3) - count = 1; - else - count = 2; - } - } + if (host) { + if (idf == 0 && odf == 0) { + if (s3->bpp == 0) + count = 4; + else if (s3->bpp == 1) + count = 2; + else + count = 1; + } else { + if (idf == 0) + count = 4; + else if (idf == 3) + count = 1; + else + count = 2; + } + } - if (s3->videoengine.input == 1) { - if (s3->videoengine.scale_down) { - if (s3->bpp > 1) { - s3->videoengine.sx = k2 - dda + diff; - s3->videoengine.sx_backup = s3->videoengine.len - s3->videoengine.start; - } else { - s3->videoengine.sx = k2 - dda + diff - 1; - s3->videoengine.sx_backup = s3->videoengine.len - s3->videoengine.start - 1; - } - s3->videoengine.sx_scale_inc = (double)((s3->videoengine.sx_backup >> 1)); - s3->videoengine.sx_scale_inc = s3->videoengine.sx_scale_inc / (double)((s3->videoengine.sx >> 1)); - } else { - s3->videoengine.sx_scale = (double)(s3->videoengine.k1 - 2); - s3->videoengine.sx_scale_dec = (s3->videoengine.sx_scale / (double)(s3->videoengine.len - s3->videoengine.start - 2)); + if (s3->videoengine.input == 1) { + if (s3->videoengine.scale_down) { + if (s3->bpp > 1) { + s3->videoengine.sx = k2 - dda + diff; + s3->videoengine.sx_backup = s3->videoengine.len - s3->videoengine.start; + } else { + s3->videoengine.sx = k2 - dda + diff - 1; + s3->videoengine.sx_backup = s3->videoengine.len - s3->videoengine.start - 1; + } + s3->videoengine.sx_scale_inc = (double) ((s3->videoengine.sx_backup >> 1)); + s3->videoengine.sx_scale_inc = s3->videoengine.sx_scale_inc / (double) ((s3->videoengine.sx >> 1)); + } else { + s3->videoengine.sx_scale = (double) (s3->videoengine.k1 - 2); + s3->videoengine.sx_scale_dec = (s3->videoengine.sx_scale / (double) (s3->videoengine.len - s3->videoengine.start - 2)); - if (s3->videoengine.sx_scale_dec >= 0.5) { - s3->videoengine.sx_scale++; - } - } + if (s3->videoengine.sx_scale_dec >= 0.5) { + s3->videoengine.sx_scale++; + } + } - if (s3->bpp == 0) { - s3->videoengine.dest = s3->videoengine.dest_base + s3->width; - s3->videoengine.src = s3->videoengine.src_base + s3->width; - } else if (s3->bpp == 1) { - s3->videoengine.dest = (s3->videoengine.dest_base >> 1) + s3->width; - s3->videoengine.src = (s3->videoengine.src_base >> 1) + s3->width; - } else { - s3->videoengine.dest = (s3->videoengine.dest_base >> 2) + s3->width; - s3->videoengine.src = (s3->videoengine.src_base >> 2) + s3->width; - } - s3->videoengine.input = 2; - s3->videoengine.cx = 0.0; - s3->videoengine.dx = 0.0; - } + if (s3->bpp == 0) { + s3->videoengine.dest = s3->videoengine.dest_base + s3->width; + s3->videoengine.src = s3->videoengine.src_base + s3->width; + } else if (s3->bpp == 1) { + s3->videoengine.dest = (s3->videoengine.dest_base >> 1) + s3->width; + s3->videoengine.src = (s3->videoengine.src_base >> 1) + s3->width; + } else { + s3->videoengine.dest = (s3->videoengine.dest_base >> 2) + s3->width; + s3->videoengine.src = (s3->videoengine.src_base >> 2) + s3->width; + } + s3->videoengine.input = 2; + s3->videoengine.cx = 0.0; + s3->videoengine.dx = 0.0; + } - while (count) { - if (host) { /*Source data is CPU*/ - src = cpu_dat; - } else { /*Source data is display memory*/ - READ(s3->videoengine.src + lround(s3->videoengine.cx), src); - } + while (count) { + if (host) { /*Source data is CPU*/ + src = cpu_dat; + } else { /*Source data is display memory*/ + READ(s3->videoengine.src + lround(s3->videoengine.cx), src); + } - convert_to_rgb32(idf, is_yuv, src, &r, &g, &b, &r2, &g2, &b2); + convert_to_rgb32(idf, is_yuv, src, &r, &g, &b, &r2, &g2, &b2); - convert_from_rgb32(idf, odf, is_yuv, &dest, r, g, b, r2, g2, b2); + convert_from_rgb32(idf, odf, is_yuv, &dest, r, g, b, r2, g2, b2); - WRITE(s3->videoengine.dest + lround(s3->videoengine.dx), dest); + WRITE(s3->videoengine.dest + lround(s3->videoengine.dx), dest); - if (s3->videoengine.scale_down) { /*Data shrink*/ - s3->videoengine.dx += s3->videoengine.sx_scale_inc; - if (!host) - s3->videoengine.cx += s3->videoengine.sx_scale_inc; + if (s3->videoengine.scale_down) { /*Data shrink*/ + s3->videoengine.dx += s3->videoengine.sx_scale_inc; + if (!host) + s3->videoengine.cx += s3->videoengine.sx_scale_inc; - s3->videoengine.sx--; + s3->videoengine.sx--; - if (host) { - if (s3->bpp == 0) { - cpu_dat >>= 8; - } else { - cpu_dat >>= 16; - } - count--; - } + if (host) { + if (s3->bpp == 0) { + cpu_dat >>= 8; + } else { + cpu_dat >>= 16; + } + count--; + } - if (s3->videoengine.sx < 0) { - if (s3->bpp > 1) { - s3->videoengine.sx = k2 - dda + diff; - s3->videoengine.sx_backup = s3->videoengine.len - s3->videoengine.start; - } else { - s3->videoengine.sx = k2 - dda + diff - 1; - s3->videoengine.sx_backup = s3->videoengine.len - s3->videoengine.start - 1; - } - s3->videoengine.sx_scale_inc = (double)((s3->videoengine.sx_backup >> 1)); - s3->videoengine.sx_scale_inc = s3->videoengine.sx_scale_inc / (double)((s3->videoengine.sx >> 1)); + if (s3->videoengine.sx < 0) { + if (s3->bpp > 1) { + s3->videoengine.sx = k2 - dda + diff; + s3->videoengine.sx_backup = s3->videoengine.len - s3->videoengine.start; + } else { + s3->videoengine.sx = k2 - dda + diff - 1; + s3->videoengine.sx_backup = s3->videoengine.len - s3->videoengine.start - 1; + } + s3->videoengine.sx_scale_inc = (double) ((s3->videoengine.sx_backup >> 1)); + s3->videoengine.sx_scale_inc = s3->videoengine.sx_scale_inc / (double) ((s3->videoengine.sx >> 1)); - s3->videoengine.cx = 0.0; - s3->videoengine.dx = 0.0; + s3->videoengine.cx = 0.0; + s3->videoengine.dx = 0.0; - if (s3->bpp == 0) { - s3->videoengine.dest = s3->videoengine.dest_base + s3->width; - s3->videoengine.src = s3->videoengine.src_base + s3->width; - } else if (s3->bpp == 1) { - s3->videoengine.dest = (s3->videoengine.dest_base >> 1) + s3->width; - s3->videoengine.src = (s3->videoengine.src_base >> 1) + s3->width; - } else { - s3->videoengine.dest = (s3->videoengine.dest_base >> 2) + s3->width; - s3->videoengine.src = (s3->videoengine.src_base >> 2) + s3->width; - } + if (s3->bpp == 0) { + s3->videoengine.dest = s3->videoengine.dest_base + s3->width; + s3->videoengine.src = s3->videoengine.src_base + s3->width; + } else if (s3->bpp == 1) { + s3->videoengine.dest = (s3->videoengine.dest_base >> 1) + s3->width; + s3->videoengine.src = (s3->videoengine.src_base >> 1) + s3->width; + } else { + s3->videoengine.dest = (s3->videoengine.dest_base >> 2) + s3->width; + s3->videoengine.src = (s3->videoengine.src_base >> 2) + s3->width; + } - if (s3->videoengine.input >= 1) { - s3->videoengine.busy = 0; - return; - } - } - } else { /*Data stretch*/ - s3->videoengine.dx++; + if (s3->videoengine.input >= 1) { + s3->videoengine.busy = 0; + return; + } + } + } else { /*Data stretch*/ + s3->videoengine.dx++; - s3->videoengine.sx_scale -= s3->videoengine.sx_scale_dec; - s3->videoengine.sx_scale_backup = (s3->videoengine.sx_scale - s3->videoengine.sx_scale_dec); + s3->videoengine.sx_scale -= s3->videoengine.sx_scale_dec; + s3->videoengine.sx_scale_backup = (s3->videoengine.sx_scale - s3->videoengine.sx_scale_dec); - s3->videoengine.sx = lround(s3->videoengine.sx_scale); - s3->videoengine.sx_scale_int = lround(s3->videoengine.sx_scale_backup); + s3->videoengine.sx = lround(s3->videoengine.sx_scale); + s3->videoengine.sx_scale_int = lround(s3->videoengine.sx_scale_backup); - if (s3->videoengine.sx > s3->videoengine.sx_scale_int) { - if (host) { - if (s3->bpp == 0) - cpu_dat >>= 8; - else - cpu_dat >>= 16; - count--; - } else { - s3->videoengine.cx++; - } - } + if (s3->videoengine.sx > s3->videoengine.sx_scale_int) { + if (host) { + if (s3->bpp == 0) + cpu_dat >>= 8; + else + cpu_dat >>= 16; + count--; + } else { + s3->videoengine.cx++; + } + } - if (s3->videoengine.sx < 0) { - s3->videoengine.sx_scale = (double)(s3->videoengine.k1 - 2); - s3->videoengine.sx_scale_dec = (s3->videoengine.sx_scale / (double)(s3->videoengine.len - s3->videoengine.start - 2)); + if (s3->videoengine.sx < 0) { + s3->videoengine.sx_scale = (double) (s3->videoengine.k1 - 2); + s3->videoengine.sx_scale_dec = (s3->videoengine.sx_scale / (double) (s3->videoengine.len - s3->videoengine.start - 2)); - if (s3->videoengine.sx_scale_dec >= 0.5) { - s3->videoengine.sx_scale++; - } + if (s3->videoengine.sx_scale_dec >= 0.5) { + s3->videoengine.sx_scale++; + } - s3->videoengine.cx = 0.0; - s3->videoengine.dx = 0.0; + s3->videoengine.cx = 0.0; + s3->videoengine.dx = 0.0; - if (s3->bpp == 0) { - s3->videoengine.dest = s3->videoengine.dest_base + s3->width; - s3->videoengine.src = s3->videoengine.src_base + s3->width; - } else if (s3->bpp == 1) { - s3->videoengine.dest = (s3->videoengine.dest_base >> 1) + s3->width; - s3->videoengine.src = (s3->videoengine.src_base >> 1) + s3->width; - } else { - s3->videoengine.dest = (s3->videoengine.dest_base >> 2) + s3->width; - s3->videoengine.src = (s3->videoengine.src_base >> 2) + s3->width; - } + if (s3->bpp == 0) { + s3->videoengine.dest = s3->videoengine.dest_base + s3->width; + s3->videoengine.src = s3->videoengine.src_base + s3->width; + } else if (s3->bpp == 1) { + s3->videoengine.dest = (s3->videoengine.dest_base >> 1) + s3->width; + s3->videoengine.src = (s3->videoengine.src_base >> 1) + s3->width; + } else { + s3->videoengine.dest = (s3->videoengine.dest_base >> 2) + s3->width; + s3->videoengine.src = (s3->videoengine.src_base >> 2) + s3->width; + } - if (s3->videoengine.input >= 1) { - s3->videoengine.busy = 0; - return; - } - } - } - } + if (s3->videoengine.input >= 1) { + s3->videoengine.busy = 0; + return; + } + } + } + } } void s3_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_t *s3, uint8_t ssv) { - if (!cpu_input) { - s3->accel.ssv_len = ssv & 0x0f; - s3->accel.ssv_dir = ssv & 0xe0; - s3->accel.ssv_draw = ssv & 0x10; + if (!cpu_input) { + s3->accel.ssv_len = ssv & 0x0f; + s3->accel.ssv_dir = ssv & 0xe0; + s3->accel.ssv_draw = ssv & 0x10; - if (s3_cpu_src(s3)) { - return; /*Wait for data from CPU*/ - } - } + if (s3_cpu_src(s3)) { + return; /*Wait for data from CPU*/ + } + } - s3_accel_start(count, cpu_input, mix_dat, cpu_dat, s3); + s3_accel_start(count, cpu_input, mix_dat, cpu_dat, s3); } void s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_t *s3) { - svga_t *svga = &s3->svga; - uint32_t src_dat = 0, dest_dat, old_dest_dat; - uint32_t out, pat_dat = 0; - int frgd_mix, bkgd_mix; - int clip_t = s3->accel.multifunc[1] & 0xfff; - int clip_l = s3->accel.multifunc[2] & 0xfff; - int clip_b = s3->accel.multifunc[3] & 0xfff; - int clip_r = s3->accel.multifunc[4] & 0xfff; - int vram_mask = (s3->accel.multifunc[0xa] & 0xc0) == 0xc0; - uint32_t mix_mask = 0; - uint16_t *vram_w = (uint16_t *)svga->vram; - uint32_t *vram_l = (uint32_t *)svga->vram; - uint32_t compare = s3->accel.color_cmp; - uint8_t rop = s3->accel.ropmix & 0xff; - int compare_mode = (s3->accel.multifunc[0xe] >> 7) & 3; - uint32_t rd_mask = s3->accel.rd_mask; - int cmd = s3->accel.cmd >> 13; - uint32_t srcbase, dstbase; - - if ((s3->chip >= S3_TRIO64 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868) && (s3->accel.cmd & (1 << 11))) { - cmd |= 8; - } - - // SRC-BASE/DST-BASE - if ((s3->accel.multifunc[0xd] >> 4) & 7) { - srcbase = 0x100000 * ((s3->accel.multifunc[0xd] >> 4) & 3); - } else { - srcbase = 0x100000 * ((s3->accel.multifunc[0xe] >> 2) & 3); - } - if ((s3->accel.multifunc[0xd] >> 0) & 7) { - dstbase = 0x100000 * ((s3->accel.multifunc[0xd] >> 0) & 3); - } else { - dstbase = 0x100000 * ((s3->accel.multifunc[0xe] >> 0) & 3); - } - if (s3->bpp == 1) { - srcbase >>= 1; - dstbase >>= 1; - } else if (s3->bpp == 3) { - srcbase >>= 2; - dstbase >>= 2; - } - - if ((s3->accel.cmd & 0x100) && ((s3_cpu_src(s3) || (s3_cpu_dest(s3)))) && (!cpu_input || (s3_enable_fifo(s3) == 0))) { - s3->force_busy = 1; - } - - if (!cpu_input) - s3->accel.dat_count = 0; - - if (cpu_input && (((s3->accel.multifunc[0xa] & 0xc0) != 0x80) || (!(s3->accel.cmd & 2)))) { - if ((s3->bpp == 3) && count == 2) { - if (s3->accel.dat_count) { - cpu_dat = ((cpu_dat & 0xffff) << 16) | s3->accel.dat_buf; - count = 4; - s3->accel.dat_count = 0; - } else { - s3->accel.dat_buf = cpu_dat & 0xffff; - s3->accel.dat_count = 1; - } - } - if (s3->bpp == 1 || s3->color_16bit) - count >>= 1; - if (s3->bpp == 3) - count >>= 2; - } - - if (s3->bpp == 0 && !s3->color_16bit) - rd_mask &= 0xff; - else if (s3->bpp == 1 || s3->color_16bit) - rd_mask &= 0xffff; - - if (s3->bpp == 0 && !s3->color_16bit) compare &= 0xff; - if (s3->bpp == 1 || s3->color_16bit) compare &= 0xffff; - - switch (s3->accel.cmd & 0x600) - { - case 0x000: mix_mask = 0x80; break; - case 0x200: mix_mask = 0x8000; break; - case 0x400: mix_mask = 0x80000000; break; - case 0x600: mix_mask = (s3->chip == S3_TRIO32 || s3->chip >= S3_TRIO64V || s3->chip == S3_VISION968 || s3->chip == S3_VISION868) ? 0x80 : 0x80000000; break; - } - - /*Bit 4 of the Command register is the draw yes bit, which enables writing to memory/reading from memory when enabled. - When this bit is disabled, no writing to memory/reading from memory is allowed. (This bit is almost meaningless on - the NOP command)*/ - switch (cmd) - { - case 0: /*NOP (Short Stroke Vectors)*/ - if (s3->accel.ssv_state == 0) - break; - - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - - if (s3->accel.cmd & 8) /*Radial*/ - { - while (count-- && s3->accel.ssv_len >= 0) - { - if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && - (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) - { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) - { - case 0: src_dat = s3->accel.bkgd_color; break; - case 1: src_dat = s3->accel.frgd_color; break; - case 2: src_dat = cpu_dat; break; - case 3: src_dat = 0; break; - } - - if ((compare_mode == 2 && src_dat != compare) || - (compare_mode == 3 && src_dat == compare) || - compare_mode < 2) - { - READ((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); - - MIX - - if (s3->accel.ssv_draw) { - WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); - } - } - } - - mix_dat <<= 1; - mix_dat |= 1; - if (s3->bpp == 0) cpu_dat >>= 8; - else cpu_dat >>= 16; - if (!s3->accel.ssv_len) - break; - - switch (s3->accel.ssv_dir & 0xe0) - { - case 0x00: s3->accel.cx++; break; - case 0x20: s3->accel.cx++; s3->accel.cy--; break; - case 0x40: s3->accel.cy--; break; - case 0x60: s3->accel.cx--; s3->accel.cy--; break; - case 0x80: s3->accel.cx--; break; - case 0xa0: s3->accel.cx--; s3->accel.cy++; break; - case 0xc0: s3->accel.cy++; break; - case 0xe0: s3->accel.cx++; s3->accel.cy++; break; - } - - s3->accel.ssv_len--; - } - - s3->accel.cur_x = s3->accel.cx; - s3->accel.cur_y = s3->accel.cy; - } - break; - - case 1: /*Draw line*/ - if (!cpu_input) { - s3->accel.cx = s3->accel.cur_x; - if (s3->accel.cur_x_bit12) s3->accel.cx |= ~0xfff; - s3->accel.cy = s3->accel.cur_y; - if (s3->accel.cur_y_bit12) s3->accel.cy |= ~0xfff; - - s3->accel.sy = s3->accel.maj_axis_pcnt; - - if (s3_cpu_src(s3)) { - return; /*Wait for data from CPU*/ - } - } - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - - if (s3->accel.cmd & 8) /*Radial*/ - { - while (count-- && s3->accel.sy >= 0) - { - if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && - (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) - { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) - { - case 0: src_dat = s3->accel.bkgd_color; break; - case 1: src_dat = s3->accel.frgd_color; break; - case 2: src_dat = cpu_dat; break; - case 3: src_dat = 0; break; - } - - if ((compare_mode == 2 && src_dat != compare) || - (compare_mode == 3 && src_dat == compare) || - compare_mode < 2) - { - READ((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); - - MIX - - WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); - } - } - - mix_dat <<= 1; - mix_dat |= 1; - if (s3->bpp == 0 && !s3->color_16bit) - cpu_dat >>= 8; - else { - cpu_dat >>= 16; - } - - if (!s3->accel.sy) { - break; - } - - switch (s3->accel.cmd & 0xe0) - { - case 0x00: s3->accel.cx++; break; - case 0x20: s3->accel.cx++; s3->accel.cy--; break; - case 0x40: s3->accel.cy--; break; - case 0x60: s3->accel.cx--; s3->accel.cy--; break; - case 0x80: s3->accel.cx--; break; - case 0xa0: s3->accel.cx--; s3->accel.cy++; break; - case 0xc0: s3->accel.cy++; break; - case 0xe0: s3->accel.cx++; s3->accel.cy++; break; - } - s3->accel.sy--; - } - s3->accel.cur_x = s3->accel.cx; - s3->accel.cur_y = s3->accel.cy; - } - else /*Bresenham*/ - { - if (s3->accel.b2e8_pix && s3_cpu_src(s3) && count == 16) { /*Stupid undocumented 0xB2E8 on 911/924*/ - count = s3->accel.maj_axis_pcnt + 1; - s3->accel.temp_cnt = 16; - } - - while (count-- && s3->accel.sy >= 0) - { - if (s3->accel.b2e8_pix && s3_cpu_src(s3) && s3->accel.temp_cnt == 0) { - mix_dat >>= 16; - s3->accel.temp_cnt = 16; - } - - if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && - (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) - { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) - { - case 0: src_dat = s3->accel.bkgd_color; break; - case 1: src_dat = s3->accel.frgd_color; break; - case 2: src_dat = cpu_dat; break; - case 3: src_dat = 0; break; - } - - if ((compare_mode == 2 && src_dat != compare) || - (compare_mode == 3 && src_dat == compare) || - compare_mode < 2) - { - READ((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); - - MIX - - WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); - } - } - - if (s3->accel.b2e8_pix && s3_cpu_src(s3)) { - if (s3->accel.temp_cnt > 0) { - s3->accel.temp_cnt--; - mix_dat <<= 1; - mix_dat |= 1; - } - } else { - mix_dat <<= 1; - mix_dat |= 1; - } - if (s3->bpp == 0 && !s3->color_16bit) - cpu_dat >>= 8; - else { - cpu_dat >>= 16; - } - - if (!s3->accel.sy) { - break; - } - - if (s3->accel.err_term >= s3->accel.maj_axis_pcnt) { - s3->accel.err_term += s3->accel.destx_distp; - /*Step minor axis*/ - switch (s3->accel.cmd & 0xe0) - { - case 0x00: s3->accel.cy--; break; - case 0x20: s3->accel.cy--; break; - case 0x40: s3->accel.cx--; break; - case 0x60: s3->accel.cx++; break; - case 0x80: s3->accel.cy++; break; - case 0xa0: s3->accel.cy++; break; - case 0xc0: s3->accel.cx--; break; - case 0xe0: s3->accel.cx++; break; - } - } else { - s3->accel.err_term += s3->accel.desty_axstp; - } - - /*Step major axis*/ - switch (s3->accel.cmd & 0xe0) - { - case 0x00: s3->accel.cx--; break; - case 0x20: s3->accel.cx++; break; - case 0x40: s3->accel.cy--; break; - case 0x60: s3->accel.cy--; break; - case 0x80: s3->accel.cx--; break; - case 0xa0: s3->accel.cx++; break; - case 0xc0: s3->accel.cy++; break; - case 0xe0: s3->accel.cy++; break; - } - s3->accel.sy--; - } - s3->accel.cur_x = s3->accel.cx; - s3->accel.cur_y = s3->accel.cy; - } - break; - - case 2: /*Rectangle fill*/ - if (!cpu_input) /*!cpu_input is trigger to start operation*/ - { - s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; - s3->accel.sy = s3->accel.multifunc[0] & 0xfff; - s3->accel.cx = s3->accel.cur_x; - s3->accel.cy = s3->accel.cur_y; - - if (s3->accel.cur_x_bit12) { - if (s3->accel.cx <= 0x7ff) { - s3->accel.cx = s3->accel.cur_x_bitres & 0xfff; - } else { - s3->accel.cx |= ~0xfff; - } - } - if (s3->accel.cur_y_bit12) { - if (s3->accel.cy <= 0x7ff) { - s3->accel.cy = s3->accel.cur_y_bitres & 0xfff; - } else { - s3->accel.cy |= ~0xfff; - } - } - - s3->accel.dest = dstbase + s3->accel.cy * s3->width; - - if (s3_cpu_src(s3)) { - s3->data_available = 0; - return; /*Wait for data from CPU*/ - } else if (s3_cpu_dest(s3)) { - s3->data_available = 1; - return; - } - } - - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - - if (s3->accel.b2e8_pix && s3_cpu_src(s3) && count == 16) { /*Stupid undocumented 0xB2E8 on 911/924*/ - count = s3->accel.maj_axis_pcnt + 1; - s3->accel.temp_cnt = 16; - } - - while (count-- && s3->accel.sy >= 0) - { - if (s3->accel.b2e8_pix && s3_cpu_src(s3) && s3->accel.temp_cnt == 0) { - mix_dat >>= 16; - s3->accel.temp_cnt = 16; - } - - if (((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && - (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b)) - { - if (s3_cpu_dest(s3) && ((s3->accel.multifunc[0xa] & 0xc0) == 0x00)) { - mix_dat = mix_mask; /* Mix data = forced to foreground register. */ - } else if (s3_cpu_dest(s3) && vram_mask) { - /* Mix data = current video memory value. */ - READ(s3->accel.dest + s3->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } - - if (s3_cpu_dest(s3)) { - READ(s3->accel.dest + s3->accel.cx, src_dat); - if (vram_mask) - src_dat = ((src_dat & rd_mask) == rd_mask); - } else switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) - { - case 0: src_dat = s3->accel.bkgd_color; break; - case 1: src_dat = s3->accel.frgd_color; break; - case 2: src_dat = cpu_dat; break; - case 3: src_dat = 0; break; - } - - if (((compare_mode == 2 && src_dat != compare) || - (compare_mode == 3 && src_dat == compare) || - compare_mode < 2)) - { - READ(s3->accel.dest + s3->accel.cx, dest_dat); - - MIX - - if (s3->accel.cmd & 0x10) { - WRITE(s3->accel.dest + s3->accel.cx, dest_dat); - } - } - } - - if (s3->accel.b2e8_pix && s3_cpu_src(s3)) { - if (s3->accel.temp_cnt > 0) { - s3->accel.temp_cnt--; - mix_dat <<= 1; - mix_dat |= 1; - } - } else { - mix_dat <<= 1; - mix_dat |= 1; - } - - if (s3->bpp == 0 && !s3->color_16bit) - cpu_dat >>= 8; - else { - cpu_dat >>= 16; - } - - if (s3->accel.cmd & 0x20) - s3->accel.cx++; - else - s3->accel.cx--; - - s3->accel.sx--; - if (s3->accel.sx < 0) - { - if (s3->accel.cmd & 0x20) - s3->accel.cx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; - else - s3->accel.cx += (s3->accel.maj_axis_pcnt & 0xfff) + 1; - s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; - - if (s3->accel.cmd & 0x80) - s3->accel.cy++; - else - s3->accel.cy--; - - s3->accel.dest = dstbase + s3->accel.cy * s3->width; - s3->accel.sy--; - - if (cpu_input) { - if (s3->accel.b2e8_pix) { - s3->accel.cur_x = s3->accel.cx; - s3->accel.cur_y = s3->accel.cy; - } - return; - } - if (s3->accel.sy < 0) { - s3->accel.cur_x = s3->accel.cx; - s3->accel.cur_y = s3->accel.cy; - return; - } - } - } - break; - - - case 3: /*Polygon Fill Solid (Vision868/968 and Trio64 only)*/ - { - int end_y1, end_y2; - - if (s3->chip != S3_TRIO64 && s3->chip != S3_VISION968 && s3->chip != S3_VISION868) - break; - - polygon_setup(s3); - - if ((s3->accel.cmd & 0x100) && !cpu_input) return; /*Wait for data from CPU*/ - - end_y1 = s3->accel.desty_axstp; - end_y2 = s3->accel.desty_axstp2; - - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - - while ((s3->accel.poly_cy < end_y1) && (s3->accel.poly_cy2 < end_y2)) - { - int y = s3->accel.poly_cy; - int x_count = ABS((s3->accel.poly_cx2 >> 20) - s3->accel.poly_x) + 1; - - s3->accel.dest = dstbase + y * s3->width; - - while (x_count-- && count--) - { - if ((s3->accel.poly_x & 0xfff) >= clip_l && (s3->accel.poly_x & 0xfff) <= clip_r && - (s3->accel.poly_cy & 0xfff) >= clip_t && (s3->accel.poly_cy & 0xfff) <= clip_b) - { - switch (frgd_mix) - { - case 0: src_dat = s3->accel.bkgd_color; break; - case 1: src_dat = s3->accel.frgd_color; break; - case 2: src_dat = cpu_dat; break; - case 3: src_dat = 0; /*Not supported?*/ break; - } - - if (((compare_mode == 2 && src_dat != compare) || - (compare_mode == 3 && src_dat == compare) || - compare_mode < 2)) - { - READ(s3->accel.dest + s3->accel.poly_x, dest_dat); - - MIX - - if (s3->accel.cmd & 0x10) { - WRITE(s3->accel.dest + s3->accel.poly_x, dest_dat); - } - } - } - if (s3->bpp == 0) cpu_dat >>= 8; - else cpu_dat >>= 16; - - if (s3->accel.poly_x < (s3->accel.poly_cx2 >> 20)) - s3->accel.poly_x++; - else - s3->accel.poly_x--; - } - - s3->accel.poly_cx += s3->accel.poly_dx1; - s3->accel.poly_cx2 += s3->accel.poly_dx2; - s3->accel.poly_x = s3->accel.poly_cx >> 20; - - s3->accel.poly_cy++; - s3->accel.poly_cy2++; - - if (!count) - break; - } - - s3->accel.cur_x = s3->accel.poly_cx & 0xfff; - s3->accel.cur_y = s3->accel.poly_cy & 0xfff; - s3->accel.cur_x2 = s3->accel.poly_cx2 & 0xfff; - s3->accel.cur_y2 = s3->accel.poly_cy & 0xfff; - } - break; - - - case 6: /*BitBlt*/ - if (!cpu_input) /*!cpu_input is trigger to start operation*/ - { - s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; - s3->accel.sy = s3->accel.multifunc[0] & 0xfff; - - s3->accel.dx = s3->accel.destx_distp & 0xfff; - if (s3->accel.destx_distp & 0x1000) s3->accel.dx |= ~0xfff; - s3->accel.dy = s3->accel.desty_axstp & 0xfff; - if (s3->accel.desty_axstp & 0x1000) s3->accel.dy |= ~0xfff; - - s3->accel.cx = s3->accel.cur_x; - s3->accel.cy = s3->accel.cur_y; - - if (s3->accel.destx_distp >= 0xfffff000) { /* avoid overflow */ - s3->accel.dx = s3->accel.destx_distp & 0xfff; - if (s3->accel.cur_x_bit12) { - if (s3->accel.cx <= 0x7ff) { - s3->accel.cx = s3->accel.cur_x_bitres & 0xfff; - } else { - s3->accel.cx |= ~0xfff; - } - } - if (s3->accel.cur_y_bitres > 0xfff) - s3->accel.cy = s3->accel.cur_y_bitres; - } else { - if (s3->accel.cur_x_bit12) { - if (s3->accel.cx <= 0x7ff) { /* overlap x */ - s3->accel.cx = s3->accel.cur_x_bitres & 0xfff; - } else { /* x end is negative */ - s3->accel.cx |= ~0xfff; - } - } - if (s3->accel.cur_y_bit12) { - if (s3->accel.cy <= 0x7ff) { /* overlap y */ - s3->accel.cy = s3->accel.cur_y_bitres & 0xfff; - } else { /* y end is negative */ - s3->accel.cy |= ~0xfff; - } - } - } - - s3->accel.src = srcbase + s3->accel.cy * s3->width; - s3->accel.dest = dstbase + s3->accel.dy * s3->width; - } - - if ((s3->accel.cmd & 0x100) && !cpu_input) { - return; /*Wait for data from CPU*/ - } - - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - - if (!cpu_input && frgd_mix == 3 && !vram_mask && !compare_mode && - (s3->accel.cmd & 0xa0) == 0xa0 && (s3->accel.frgd_mix & 0xf) == 7 && - (s3->accel.bkgd_mix & 0xf) == 7) - { - while (1) - { - if (((s3->accel.dx & 0xfff) >= clip_l && (s3->accel.dx & 0xfff) <= clip_r && - (s3->accel.dy & 0xfff) >= clip_t && (s3->accel.dy & 0xfff) <= clip_b)) - { - READ(s3->accel.src + s3->accel.cx, src_dat); - READ(s3->accel.dest + s3->accel.dx, dest_dat); - - dest_dat = (src_dat & s3->accel.wrt_mask) | (dest_dat & ~s3->accel.wrt_mask); - - if (s3->accel.cmd & 0x10) { - WRITE(s3->accel.dest + s3->accel.dx, dest_dat); - } - } - - s3->accel.cx++; - s3->accel.dx++; - s3->accel.sx--; - if (s3->accel.sx < 0) - { - s3->accel.cx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; - s3->accel.dx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; - s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; - - s3->accel.cy++; - s3->accel.dy++; - - s3->accel.src = srcbase + s3->accel.cy * s3->width; - s3->accel.dest = dstbase + s3->accel.dy * s3->width; - - s3->accel.sy--; - - if (s3->accel.sy < 0) { - return; - } - } - } - } - else - { - while (count-- && s3->accel.sy >= 0) - { - /*This is almost required by OS/2's software cursor or we will risk writing/reading garbage around it.*/ - if ((s3->accel.dx) >= clip_l && (s3->accel.dx) <= clip_r && - ((s3->accel.dy) >= clip_t && (s3->accel.dy) <= clip_b)) - { - if (vram_mask && (s3->accel.cmd & 0x10)) - { - READ(s3->accel.src + s3->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) - { - case 0: src_dat = s3->accel.bkgd_color; break; - case 1: src_dat = s3->accel.frgd_color; break; - case 2: src_dat = cpu_dat; break; - case 3: READ(s3->accel.src + s3->accel.cx, src_dat); - if (vram_mask && (s3->accel.cmd & 0x10)) - src_dat = ((src_dat & rd_mask) == rd_mask); - break; - } - - if ((((compare_mode == 2 && src_dat != compare) || - (compare_mode == 3 && src_dat == compare) || - compare_mode < 2))) - { - READ(s3->accel.dest + s3->accel.dx, dest_dat); - - MIX - - if ((!(s3->accel.cmd & 0x10) && vram_mask) || (s3->accel.cmd & 0x10)) { - WRITE(s3->accel.dest + s3->accel.dx, dest_dat); - } - } - } - - mix_dat <<= 1; - mix_dat |= 1; - - if (s3->bpp == 0 && !s3->color_16bit) - cpu_dat >>= 8; - else { - cpu_dat >>= 16; - } - - if (s3->accel.cmd & 0x20) - { - s3->accel.cx++; - s3->accel.dx++; - } - else - { - s3->accel.cx--; - s3->accel.dx--; - } - s3->accel.sx--; - if (s3->accel.sx < 0) - { - if (s3->accel.cmd & 0x20) - { - s3->accel.cx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; - s3->accel.dx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; - } - else - { - s3->accel.cx += (s3->accel.maj_axis_pcnt & 0xfff) + 1; - s3->accel.dx += (s3->accel.maj_axis_pcnt & 0xfff) + 1; - } - - s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; - - if (s3->accel.cmd & 0x80) - { - s3->accel.cy++; - s3->accel.dy++; - } - else - { - s3->accel.cy--; - s3->accel.dy--; - } - - s3->accel.src = srcbase + s3->accel.cy * s3->width; - s3->accel.dest = dstbase + s3->accel.dy * s3->width; - - s3->accel.sy--; - - if (cpu_input) { - return; - } - - if (s3->accel.sy < 0) { - return; - } - } - } - } - break; - - case 7: /*Pattern fill - BitBlt but with source limited to 8x8*/ - if (!cpu_input) /*!cpu_input is trigger to start operation*/ - { - s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; - s3->accel.sy = s3->accel.multifunc[0] & 0xfff; - - s3->accel.dx = s3->accel.destx_distp & 0xfff; - if (s3->accel.destx_distp & 0x1000) s3->accel.dx |= ~0xfff; - s3->accel.dy = s3->accel.desty_axstp & 0xfff; - if (s3->accel.desty_axstp & 0x1000) s3->accel.dy |= ~0xfff; - - s3->accel.cx = s3->accel.cur_x & 0xfff; - if (s3->accel.cur_x_bit12) s3->accel.cx |= ~0xfff; - s3->accel.cy = s3->accel.cur_y & 0xfff; - if (s3->accel.cur_y_bit12) s3->accel.cy |= ~0xfff; - - /*Align source with destination*/ - s3->accel.pattern = (s3->accel.cy * s3->width) + s3->accel.cx; - s3->accel.dest = dstbase + s3->accel.dy * s3->width; - - s3->accel.cx = s3->accel.dx & 7; - s3->accel.cy = s3->accel.dy & 7; - - s3->accel.src = srcbase + s3->accel.pattern + (s3->accel.cy * s3->width); - } - - if ((s3->accel.cmd & 0x100) && !cpu_input) { - return; /*Wait for data from CPU*/ - } - - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - - while (count-- && s3->accel.sy >= 0) - { - if ((s3->accel.dx & 0xfff) >= clip_l && (s3->accel.dx & 0xfff) <= clip_r && - (s3->accel.dy & 0xfff) >= clip_t && (s3->accel.dy & 0xfff) <= clip_b) - { - if (vram_mask) - { - READ(s3->accel.src + s3->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) - { - case 0: src_dat = s3->accel.bkgd_color; break; - case 1: src_dat = s3->accel.frgd_color; break; - case 2: src_dat = cpu_dat; break; - case 3: READ(s3->accel.src + s3->accel.cx, src_dat); - if (vram_mask) - src_dat = ((src_dat & rd_mask) == rd_mask); - break; - } - - if (((compare_mode == 2 && src_dat != compare) || - (compare_mode == 3 && src_dat == compare) || - compare_mode < 2)) - { - READ(s3->accel.dest + s3->accel.dx, dest_dat); - - MIX - - if (s3->accel.cmd & 0x10) { - WRITE(s3->accel.dest + s3->accel.dx, dest_dat); - } - } - } - - mix_dat <<= 1; - mix_dat |= 1; - if (s3->bpp == 0) cpu_dat >>= 8; - else cpu_dat >>= 16; - - if (s3->accel.cmd & 0x20) - { - s3->accel.cx = ((s3->accel.cx + 1) & 7) | (s3->accel.cx & ~7); - s3->accel.dx++; - } - else - { - s3->accel.cx = ((s3->accel.cx - 1) & 7) | (s3->accel.cx & ~7); - s3->accel.dx--; - } - s3->accel.sx--; - if (s3->accel.sx < 0) - { - if (s3->accel.cmd & 0x20) - { - s3->accel.cx = ((s3->accel.cx - ((s3->accel.maj_axis_pcnt & 0xfff) + 1)) & 7) | (s3->accel.cx & ~7); - s3->accel.dx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; - } - else - { - s3->accel.cx = ((s3->accel.cx + ((s3->accel.maj_axis_pcnt & 0xfff) + 1)) & 7) | (s3->accel.cx & ~7); - s3->accel.dx += (s3->accel.maj_axis_pcnt & 0xfff) + 1; - } - s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; - - if (s3->accel.cmd & 0x80) - { - s3->accel.cy = ((s3->accel.cy + 1) & 7) | (s3->accel.cy & ~7); - s3->accel.dy++; - } - else - { - s3->accel.cy = ((s3->accel.cy - 1) & 7) | (s3->accel.cy & ~7); - s3->accel.dy--; - } - - s3->accel.src = srcbase + s3->accel.pattern + (s3->accel.cy * s3->width); - s3->accel.dest = dstbase + s3->accel.dy * s3->width; - - s3->accel.sy--; - - if (cpu_input) { - return; - } - if (s3->accel.sy < 0) { - return; - } - } - } - break; - - case 9: /*Polyline/2-Point Line (Vision868/968 and Trio64 only)*/ - { - int error; - - if (s3->chip != S3_TRIO64 && s3->chip != S3_VISION968 && s3->chip != S3_VISION868) - break; - - if (!cpu_input) { - s3->accel.dx = ABS(s3->accel.destx_distp - s3->accel.cur_x); - if (s3->accel.destx_distp & 0x1000) - s3->accel.dx |= ~0xfff; - s3->accel.dy = ABS(s3->accel.desty_axstp - s3->accel.cur_y); - if (s3->accel.desty_axstp & 0x1000) - s3->accel.dy |= ~0xfff; - - s3->accel.cx = s3->accel.cur_x; - if (s3->accel.cur_x_bit12) - s3->accel.cx |= ~0xfff; - s3->accel.cy = s3->accel.cur_y; - if (s3->accel.cur_y_bit12) - s3->accel.cy |= ~0xfff; - } - - if ((s3->accel.cmd & 0x100) && !cpu_input) return; /*Wait for data from CPU*/ - - if (s3->accel.dx > s3->accel.dy) { - error = s3->accel.dx / 2; - while (s3->accel.cx != s3->accel.destx_distp && count--) { - if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && - (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) - { - src_dat = s3->accel.frgd_color; - - if (((compare_mode == 2 && src_dat != compare) || - (compare_mode == 3 && src_dat == compare) || - compare_mode < 2) && (s3->accel.cmd & 0x10)) - { - READ((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); - - MIX - - if (s3->accel.cmd & 0x10) { - WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); - } - } - } - - error -= s3->accel.dy; - if (error < 0) { - error += s3->accel.dx; - if (s3->accel.desty_axstp > s3->accel.cur_y) - s3->accel.cy++; - else - s3->accel.cy--; - } - - if (s3->accel.destx_distp > s3->accel.cur_x) - s3->accel.cx++; - else - s3->accel.cx--; - } - } else { - error = s3->accel.dy / 2; - while (s3->accel.cy != s3->accel.desty_axstp && count--) { - if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && - (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) - { - src_dat = s3->accel.frgd_color; - - if (((compare_mode == 2 && src_dat != compare) || - (compare_mode == 3 && src_dat == compare) || - compare_mode < 2)) - { - READ((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); - - MIX - - if (s3->accel.cmd & 0x10) { - WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); - } - } - } - - error -= s3->accel.dx; - if (error < 0) { - error += s3->accel.dy; - if (s3->accel.destx_distp > s3->accel.cur_x) - s3->accel.cx++; - else - s3->accel.cx--; - } - if (s3->accel.desty_axstp > s3->accel.cur_y) - s3->accel.cy++; - else - s3->accel.cy--; - - } - } - s3->accel.cur_x = s3->accel.cx; - s3->accel.cur_y = s3->accel.cy; - } - break; - - - case 11: /*Polygon Fill Pattern (Vision868/968 and Trio64 only)*/ - { - int end_y1, end_y2; - - if (s3->chip != S3_TRIO64 && s3->chip != S3_VISION968 && s3->chip != S3_VISION868) - break; - - polygon_setup(s3); - - if ((s3->accel.cmd & 0x100) && !cpu_input) return; /*Wait for data from CPU*/ - - end_y1 = s3->accel.desty_axstp; - end_y2 = s3->accel.desty_axstp2; - - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - - while ((s3->accel.poly_cy < end_y1) && (s3->accel.poly_cy2 < end_y2)) - { - int y = s3->accel.poly_cy; - int x_count = ABS((s3->accel.poly_cx2 >> 20) - s3->accel.poly_x) + 1; - - s3->accel.src = srcbase + s3->accel.pattern + ((y & 7) * s3->width); - s3->accel.dest = dstbase + y * s3->width; - - while (x_count-- && count--) - { - int pat_x = s3->accel.poly_x & 7; - - if ((s3->accel.poly_x & 0xfff) >= clip_l && (s3->accel.poly_x & 0xfff) <= clip_r && - (s3->accel.poly_cy & 0xfff) >= clip_t && (s3->accel.poly_cy & 0xfff) <= clip_b) - { - if (vram_mask) { - READ(s3->accel.src + pat_x, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) - { - case 0: src_dat = s3->accel.bkgd_color; break; - case 1: src_dat = s3->accel.frgd_color; break; - case 2: src_dat = cpu_dat; break; - case 3: READ(s3->accel.src + pat_x, src_dat); - if (vram_mask) - src_dat = ((src_dat & rd_mask) == rd_mask); - break; - } - - if (((compare_mode == 2 && src_dat != compare) || - (compare_mode == 3 && src_dat == compare) || - compare_mode < 2)) - { - READ(s3->accel.dest + s3->accel.poly_x, dest_dat); - - MIX - - if (s3->accel.cmd & 0x10) { - WRITE(s3->accel.dest + s3->accel.poly_x, dest_dat); - } - } - } - if (s3->bpp == 0) cpu_dat >>= 8; - else cpu_dat >>= 16; - - mix_dat <<= 1; - mix_dat |= 1; - - if (s3->accel.poly_x < (s3->accel.poly_cx2 >> 20)) - s3->accel.poly_x++; - else - s3->accel.poly_x--; - } - - s3->accel.poly_cx += s3->accel.poly_dx1; - s3->accel.poly_cx2 += s3->accel.poly_dx2; - s3->accel.poly_x = s3->accel.poly_cx >> 20; - - s3->accel.poly_cy++; - s3->accel.poly_cy2++; - - if (!count) - break; - } - - s3->accel.cur_x = s3->accel.poly_cx & 0xfff; - s3->accel.cur_y = s3->accel.poly_cy & 0xfff; - s3->accel.cur_x2 = s3->accel.poly_cx2 & 0xfff; - s3->accel.cur_y2 = s3->accel.poly_cy & 0xfff; - } - break; - - case 14: /*ROPBlt (Vision868/968 only)*/ - if (s3->chip != S3_VISION968 && s3->chip != S3_VISION868) - break; - - if (!cpu_input) /*!cpu_input is trigger to start operation*/ - { - s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; - s3->accel.sy = s3->accel.multifunc[0] & 0xfff; - - s3->accel.dx = s3->accel.destx_distp & 0xfff; - if (s3->accel.destx_distp & 0x1000) s3->accel.dx |= ~0xfff; - s3->accel.dy = s3->accel.desty_axstp & 0xfff; - if (s3->accel.desty_axstp & 0x1000) s3->accel.dy |= ~0xfff; - - s3->accel.cx = s3->accel.cur_x & 0xfff; - if (s3->accel.cur_x_bit12) s3->accel.cx |= ~0xfff; - s3->accel.cy = s3->accel.cur_y & 0xfff; - if (s3->accel.cur_y_bit12) s3->accel.cy |= ~0xfff; - - s3->accel.px = s3->accel.pat_x & 0xfff; - if (s3->accel.pat_x & 0x1000) s3->accel.px |= ~0xfff; - s3->accel.py = s3->accel.pat_y & 0xfff; - if (s3->accel.pat_y & 0x1000) s3->accel.py |= ~0xfff; - - s3->accel.dest = dstbase + (s3->accel.dy * s3->width); - s3->accel.src = srcbase + (s3->accel.cy * s3->width); - s3->accel.pattern = (s3->accel.py * s3->width); - } - - if ((s3->accel.cmd & 0x100) && !cpu_input) return; /*Wait for data from CPU*/ - - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - - while (count-- && s3->accel.sy >= 0) - { - if ((s3->accel.dx & 0xfff) >= clip_l && (s3->accel.dx & 0xfff) <= clip_r && - (s3->accel.dy & 0xfff) >= clip_t && (s3->accel.dy & 0xfff) <= clip_b) - { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) - { - case 0: src_dat = s3->accel.bkgd_color; break; - case 1: src_dat = s3->accel.frgd_color; break; - case 2: src_dat = cpu_dat; break; - case 3: READ(s3->accel.src + s3->accel.cx, src_dat); break; - } - - if (s3->accel.ropmix & 0x100) { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) - { - case 0: pat_dat = s3->accel.pat_bg_color; break; - case 1: pat_dat = s3->accel.pat_fg_color; break; - case 2: pat_dat = cpu_dat; break; - case 3: READ(s3->accel.pattern + s3->accel.px, pat_dat); break; - } - } else { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) - { - case 0: pat_dat = s3->accel.bkgd_color; break; - case 1: pat_dat = s3->accel.frgd_color; break; - case 2: pat_dat = cpu_dat; break; - case 3: READ(s3->accel.pattern + s3->accel.px, pat_dat); break; - } - } - - if (((compare_mode == 2 && src_dat != compare) || - (compare_mode == 3 && src_dat == compare) || - compare_mode < 2)) - { - READ(s3->accel.dest + s3->accel.dx, dest_dat); - - ROPMIX - - if (s3->accel.cmd & 0x10) { - WRITE(s3->accel.dest + s3->accel.dx, out); - } - } - } - - mix_dat <<= 1; - mix_dat |= 1; - if (s3->bpp == 0) cpu_dat >>= 8; - else cpu_dat >>= 16; - - if (s3->accel.cmd & 0x20) - { - s3->accel.cx++; - s3->accel.dx++; - s3->accel.px++; - } - else - { - s3->accel.cx--; - s3->accel.dx--; - s3->accel.px--; - } - s3->accel.sx--; - if (s3->accel.sx < 0) - { - if (s3->accel.cmd & 0x20) - { - s3->accel.cx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; - s3->accel.dx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; - s3->accel.px -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; - } - else - { - s3->accel.cx += (s3->accel.maj_axis_pcnt & 0xfff) + 1; - s3->accel.dx += (s3->accel.maj_axis_pcnt & 0xfff) + 1; - s3->accel.px += (s3->accel.maj_axis_pcnt & 0xfff) + 1; - } - s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; - - if (s3->accel.cmd & 0x80) - { - s3->accel.cy++; - s3->accel.dy++; - s3->accel.py++; - } - else - { - s3->accel.cy--; - s3->accel.dy--; - s3->accel.py--; - } - - s3->accel.src = srcbase + (s3->accel.cy * s3->width); - s3->accel.dest = dstbase + (s3->accel.dy * s3->width); - s3->accel.pattern = (s3->accel.py * s3->width); - - s3->accel.sy--; - - if (cpu_input/* && (s3->accel.multifunc[0xa] & 0xc0) == 0x80*/) return; - if (s3->accel.sy < 0) { - return; - } - } - } - break; - } + svga_t *svga = &s3->svga; + uint32_t src_dat = 0, dest_dat, old_dest_dat; + uint32_t out, pat_dat = 0; + int frgd_mix, bkgd_mix; + int clip_t = s3->accel.multifunc[1] & 0xfff; + int clip_l = s3->accel.multifunc[2] & 0xfff; + int clip_b = s3->accel.multifunc[3] & 0xfff; + int clip_r = s3->accel.multifunc[4] & 0xfff; + int vram_mask = (s3->accel.multifunc[0xa] & 0xc0) == 0xc0; + uint32_t mix_mask = 0; + uint16_t *vram_w = (uint16_t *) svga->vram; + uint32_t *vram_l = (uint32_t *) svga->vram; + uint32_t compare = s3->accel.color_cmp; + uint8_t rop = s3->accel.ropmix & 0xff; + int compare_mode = (s3->accel.multifunc[0xe] >> 7) & 3; + uint32_t rd_mask = s3->accel.rd_mask; + int cmd = s3->accel.cmd >> 13; + uint32_t srcbase, dstbase; + + if ((s3->chip >= S3_TRIO64 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868) && (s3->accel.cmd & (1 << 11))) { + cmd |= 8; + } + + // SRC-BASE/DST-BASE + if ((s3->accel.multifunc[0xd] >> 4) & 7) { + srcbase = 0x100000 * ((s3->accel.multifunc[0xd] >> 4) & 3); + } else { + srcbase = 0x100000 * ((s3->accel.multifunc[0xe] >> 2) & 3); + } + if ((s3->accel.multifunc[0xd] >> 0) & 7) { + dstbase = 0x100000 * ((s3->accel.multifunc[0xd] >> 0) & 3); + } else { + dstbase = 0x100000 * ((s3->accel.multifunc[0xe] >> 0) & 3); + } + if (s3->bpp == 1) { + srcbase >>= 1; + dstbase >>= 1; + } else if (s3->bpp == 3) { + srcbase >>= 2; + dstbase >>= 2; + } + + if ((s3->accel.cmd & 0x100) && ((s3_cpu_src(s3) || (s3_cpu_dest(s3)))) && (!cpu_input || (s3_enable_fifo(s3) == 0))) { + s3->force_busy = 1; + } + + if (!cpu_input) + s3->accel.dat_count = 0; + + if (cpu_input && (((s3->accel.multifunc[0xa] & 0xc0) != 0x80) || (!(s3->accel.cmd & 2)))) { + if ((s3->bpp == 3) && count == 2) { + if (s3->accel.dat_count) { + cpu_dat = ((cpu_dat & 0xffff) << 16) | s3->accel.dat_buf; + count = 4; + s3->accel.dat_count = 0; + } else { + s3->accel.dat_buf = cpu_dat & 0xffff; + s3->accel.dat_count = 1; + } + } + if (s3->bpp == 1 || s3->color_16bit) + count >>= 1; + if (s3->bpp == 3) + count >>= 2; + } + + if (s3->bpp == 0 && !s3->color_16bit) + rd_mask &= 0xff; + else if (s3->bpp == 1 || s3->color_16bit) + rd_mask &= 0xffff; + + if (s3->bpp == 0 && !s3->color_16bit) + compare &= 0xff; + if (s3->bpp == 1 || s3->color_16bit) + compare &= 0xffff; + + switch (s3->accel.cmd & 0x600) { + case 0x000: + mix_mask = 0x80; + break; + case 0x200: + mix_mask = 0x8000; + break; + case 0x400: + mix_mask = 0x80000000; + break; + case 0x600: + mix_mask = (s3->chip == S3_TRIO32 || s3->chip >= S3_TRIO64V || s3->chip == S3_VISION968 || s3->chip == S3_VISION868) ? 0x80 : 0x80000000; + break; + } + + /*Bit 4 of the Command register is the draw yes bit, which enables writing to memory/reading from memory when enabled. + When this bit is disabled, no writing to memory/reading from memory is allowed. (This bit is almost meaningless on + the NOP command)*/ + switch (cmd) { + case 0: /*NOP (Short Stroke Vectors)*/ + if (s3->accel.ssv_state == 0) + break; + + frgd_mix = (s3->accel.frgd_mix >> 5) & 3; + bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; + + if (s3->accel.cmd & 8) /*Radial*/ + { + while (count-- && s3->accel.ssv_len >= 0) { + if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = s3->accel.bkgd_color; + break; + case 1: + src_dat = s3->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + src_dat = 0; + break; + } + + if ((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2) { + READ((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); + + MIX + + if (s3->accel.ssv_draw) + { + WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); + } + } + } + + mix_dat <<= 1; + mix_dat |= 1; + if (s3->bpp == 0) + cpu_dat >>= 8; + else + cpu_dat >>= 16; + if (!s3->accel.ssv_len) + break; + + switch (s3->accel.ssv_dir & 0xe0) { + case 0x00: + s3->accel.cx++; + break; + case 0x20: + s3->accel.cx++; + s3->accel.cy--; + break; + case 0x40: + s3->accel.cy--; + break; + case 0x60: + s3->accel.cx--; + s3->accel.cy--; + break; + case 0x80: + s3->accel.cx--; + break; + case 0xa0: + s3->accel.cx--; + s3->accel.cy++; + break; + case 0xc0: + s3->accel.cy++; + break; + case 0xe0: + s3->accel.cx++; + s3->accel.cy++; + break; + } + + s3->accel.ssv_len--; + } + + s3->accel.cur_x = s3->accel.cx; + s3->accel.cur_y = s3->accel.cy; + } + break; + + case 1: /*Draw line*/ + if (!cpu_input) { + s3->accel.cx = s3->accel.cur_x; + if (s3->accel.cur_x_bit12) + s3->accel.cx |= ~0xfff; + s3->accel.cy = s3->accel.cur_y; + if (s3->accel.cur_y_bit12) + s3->accel.cy |= ~0xfff; + + s3->accel.sy = s3->accel.maj_axis_pcnt; + + if (s3_cpu_src(s3)) { + return; /*Wait for data from CPU*/ + } + } + frgd_mix = (s3->accel.frgd_mix >> 5) & 3; + bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; + + if (s3->accel.cmd & 8) /*Radial*/ + { + while (count-- && s3->accel.sy >= 0) { + if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = s3->accel.bkgd_color; + break; + case 1: + src_dat = s3->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + src_dat = 0; + break; + } + + if ((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2) { + READ((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); + + MIX + + WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); + } + } + + mix_dat <<= 1; + mix_dat |= 1; + if (s3->bpp == 0 && !s3->color_16bit) + cpu_dat >>= 8; + else { + cpu_dat >>= 16; + } + + if (!s3->accel.sy) { + break; + } + + switch (s3->accel.cmd & 0xe0) { + case 0x00: + s3->accel.cx++; + break; + case 0x20: + s3->accel.cx++; + s3->accel.cy--; + break; + case 0x40: + s3->accel.cy--; + break; + case 0x60: + s3->accel.cx--; + s3->accel.cy--; + break; + case 0x80: + s3->accel.cx--; + break; + case 0xa0: + s3->accel.cx--; + s3->accel.cy++; + break; + case 0xc0: + s3->accel.cy++; + break; + case 0xe0: + s3->accel.cx++; + s3->accel.cy++; + break; + } + s3->accel.sy--; + } + s3->accel.cur_x = s3->accel.cx; + s3->accel.cur_y = s3->accel.cy; + } else /*Bresenham*/ + { + if (s3->accel.b2e8_pix && s3_cpu_src(s3) && count == 16) { /*Stupid undocumented 0xB2E8 on 911/924*/ + count = s3->accel.maj_axis_pcnt + 1; + s3->accel.temp_cnt = 16; + } + + while (count-- && s3->accel.sy >= 0) { + if (s3->accel.b2e8_pix && s3_cpu_src(s3) && s3->accel.temp_cnt == 0) { + mix_dat >>= 16; + s3->accel.temp_cnt = 16; + } + + if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = s3->accel.bkgd_color; + break; + case 1: + src_dat = s3->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + src_dat = 0; + break; + } + + if ((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2) { + READ((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); + + MIX + + WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); + } + } + + if (s3->accel.b2e8_pix && s3_cpu_src(s3)) { + if (s3->accel.temp_cnt > 0) { + s3->accel.temp_cnt--; + mix_dat <<= 1; + mix_dat |= 1; + } + } else { + mix_dat <<= 1; + mix_dat |= 1; + } + if (s3->bpp == 0 && !s3->color_16bit) + cpu_dat >>= 8; + else { + cpu_dat >>= 16; + } + + if (!s3->accel.sy) { + break; + } + + if (s3->accel.err_term >= s3->accel.maj_axis_pcnt) { + s3->accel.err_term += s3->accel.destx_distp; + /*Step minor axis*/ + switch (s3->accel.cmd & 0xe0) { + case 0x00: + s3->accel.cy--; + break; + case 0x20: + s3->accel.cy--; + break; + case 0x40: + s3->accel.cx--; + break; + case 0x60: + s3->accel.cx++; + break; + case 0x80: + s3->accel.cy++; + break; + case 0xa0: + s3->accel.cy++; + break; + case 0xc0: + s3->accel.cx--; + break; + case 0xe0: + s3->accel.cx++; + break; + } + } else { + s3->accel.err_term += s3->accel.desty_axstp; + } + + /*Step major axis*/ + switch (s3->accel.cmd & 0xe0) { + case 0x00: + s3->accel.cx--; + break; + case 0x20: + s3->accel.cx++; + break; + case 0x40: + s3->accel.cy--; + break; + case 0x60: + s3->accel.cy--; + break; + case 0x80: + s3->accel.cx--; + break; + case 0xa0: + s3->accel.cx++; + break; + case 0xc0: + s3->accel.cy++; + break; + case 0xe0: + s3->accel.cy++; + break; + } + s3->accel.sy--; + } + s3->accel.cur_x = s3->accel.cx; + s3->accel.cur_y = s3->accel.cy; + } + break; + + case 2: /*Rectangle fill*/ + if (!cpu_input) /*!cpu_input is trigger to start operation*/ + { + s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; + s3->accel.sy = s3->accel.multifunc[0] & 0xfff; + s3->accel.cx = s3->accel.cur_x; + s3->accel.cy = s3->accel.cur_y; + + if (s3->accel.cur_x_bit12) { + if (s3->accel.cx <= 0x7ff) { + s3->accel.cx = s3->accel.cur_x_bitres & 0xfff; + } else { + s3->accel.cx |= ~0xfff; + } + } + if (s3->accel.cur_y_bit12) { + if (s3->accel.cy <= 0x7ff) { + s3->accel.cy = s3->accel.cur_y_bitres & 0xfff; + } else { + s3->accel.cy |= ~0xfff; + } + } + + s3->accel.dest = dstbase + s3->accel.cy * s3->width; + + if (s3_cpu_src(s3)) { + s3->data_available = 0; + return; /*Wait for data from CPU*/ + } else if (s3_cpu_dest(s3)) { + s3->data_available = 1; + return; + } + } + + frgd_mix = (s3->accel.frgd_mix >> 5) & 3; + bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; + + if (s3->accel.b2e8_pix && s3_cpu_src(s3) && count == 16) { /*Stupid undocumented 0xB2E8 on 911/924*/ + count = s3->accel.maj_axis_pcnt + 1; + s3->accel.temp_cnt = 16; + } + + while (count-- && s3->accel.sy >= 0) { + if (s3->accel.b2e8_pix && s3_cpu_src(s3) && s3->accel.temp_cnt == 0) { + mix_dat >>= 16; + s3->accel.temp_cnt = 16; + } + + if (((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b)) { + if (s3_cpu_dest(s3) && ((s3->accel.multifunc[0xa] & 0xc0) == 0x00)) { + mix_dat = mix_mask; /* Mix data = forced to foreground register. */ + } else if (s3_cpu_dest(s3) && vram_mask) { + /* Mix data = current video memory value. */ + READ(s3->accel.dest + s3->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + mix_dat = mix_dat ? mix_mask : 0; + } + + if (s3_cpu_dest(s3)) { + READ(s3->accel.dest + s3->accel.cx, src_dat); + if (vram_mask) + src_dat = ((src_dat & rd_mask) == rd_mask); + } else + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = s3->accel.bkgd_color; + break; + case 1: + src_dat = s3->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + src_dat = 0; + break; + } + + if (((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2)) { + READ(s3->accel.dest + s3->accel.cx, dest_dat); + + MIX + + if (s3->accel.cmd & 0x10) + { + WRITE(s3->accel.dest + s3->accel.cx, dest_dat); + } + } + } + + if (s3->accel.b2e8_pix && s3_cpu_src(s3)) { + if (s3->accel.temp_cnt > 0) { + s3->accel.temp_cnt--; + mix_dat <<= 1; + mix_dat |= 1; + } + } else { + mix_dat <<= 1; + mix_dat |= 1; + } + + if (s3->bpp == 0 && !s3->color_16bit) + cpu_dat >>= 8; + else { + cpu_dat >>= 16; + } + + if (s3->accel.cmd & 0x20) + s3->accel.cx++; + else + s3->accel.cx--; + + s3->accel.sx--; + if (s3->accel.sx < 0) { + if (s3->accel.cmd & 0x20) + s3->accel.cx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; + else + s3->accel.cx += (s3->accel.maj_axis_pcnt & 0xfff) + 1; + s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; + + if (s3->accel.cmd & 0x80) + s3->accel.cy++; + else + s3->accel.cy--; + + s3->accel.dest = dstbase + s3->accel.cy * s3->width; + s3->accel.sy--; + + if (cpu_input) { + if (s3->accel.b2e8_pix) { + s3->accel.cur_x = s3->accel.cx; + s3->accel.cur_y = s3->accel.cy; + } + return; + } + if (s3->accel.sy < 0) { + s3->accel.cur_x = s3->accel.cx; + s3->accel.cur_y = s3->accel.cy; + return; + } + } + } + break; + + case 3: /*Polygon Fill Solid (Vision868/968 and Trio64 only)*/ + { + int end_y1, end_y2; + + if (s3->chip != S3_TRIO64 && s3->chip != S3_VISION968 && s3->chip != S3_VISION868) + break; + + polygon_setup(s3); + + if ((s3->accel.cmd & 0x100) && !cpu_input) + return; /*Wait for data from CPU*/ + + end_y1 = s3->accel.desty_axstp; + end_y2 = s3->accel.desty_axstp2; + + frgd_mix = (s3->accel.frgd_mix >> 5) & 3; + + while ((s3->accel.poly_cy < end_y1) && (s3->accel.poly_cy2 < end_y2)) { + int y = s3->accel.poly_cy; + int x_count = ABS((s3->accel.poly_cx2 >> 20) - s3->accel.poly_x) + 1; + + s3->accel.dest = dstbase + y * s3->width; + + while (x_count-- && count--) { + if ((s3->accel.poly_x & 0xfff) >= clip_l && (s3->accel.poly_x & 0xfff) <= clip_r && (s3->accel.poly_cy & 0xfff) >= clip_t && (s3->accel.poly_cy & 0xfff) <= clip_b) { + switch (frgd_mix) { + case 0: + src_dat = s3->accel.bkgd_color; + break; + case 1: + src_dat = s3->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + src_dat = 0; /*Not supported?*/ + break; + } + + if (((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2)) { + READ(s3->accel.dest + s3->accel.poly_x, dest_dat); + + MIX + + if (s3->accel.cmd & 0x10) + { + WRITE(s3->accel.dest + s3->accel.poly_x, dest_dat); + } + } + } + if (s3->bpp == 0) + cpu_dat >>= 8; + else + cpu_dat >>= 16; + + if (s3->accel.poly_x < (s3->accel.poly_cx2 >> 20)) + s3->accel.poly_x++; + else + s3->accel.poly_x--; + } + + s3->accel.poly_cx += s3->accel.poly_dx1; + s3->accel.poly_cx2 += s3->accel.poly_dx2; + s3->accel.poly_x = s3->accel.poly_cx >> 20; + + s3->accel.poly_cy++; + s3->accel.poly_cy2++; + + if (!count) + break; + } + + s3->accel.cur_x = s3->accel.poly_cx & 0xfff; + s3->accel.cur_y = s3->accel.poly_cy & 0xfff; + s3->accel.cur_x2 = s3->accel.poly_cx2 & 0xfff; + s3->accel.cur_y2 = s3->accel.poly_cy & 0xfff; + } + break; + + case 6: /*BitBlt*/ + if (!cpu_input) /*!cpu_input is trigger to start operation*/ + { + s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; + s3->accel.sy = s3->accel.multifunc[0] & 0xfff; + + s3->accel.dx = s3->accel.destx_distp & 0xfff; + if (s3->accel.destx_distp & 0x1000) + s3->accel.dx |= ~0xfff; + s3->accel.dy = s3->accel.desty_axstp & 0xfff; + if (s3->accel.desty_axstp & 0x1000) + s3->accel.dy |= ~0xfff; + + s3->accel.cx = s3->accel.cur_x; + s3->accel.cy = s3->accel.cur_y; + + if (s3->accel.destx_distp >= 0xfffff000) { /* avoid overflow */ + s3->accel.dx = s3->accel.destx_distp & 0xfff; + if (s3->accel.cur_x_bit12) { + if (s3->accel.cx <= 0x7ff) { + s3->accel.cx = s3->accel.cur_x_bitres & 0xfff; + } else { + s3->accel.cx |= ~0xfff; + } + } + if (s3->accel.cur_y_bitres > 0xfff) + s3->accel.cy = s3->accel.cur_y_bitres; + } else { + if (s3->accel.cur_x_bit12) { + if (s3->accel.cx <= 0x7ff) { /* overlap x */ + s3->accel.cx = s3->accel.cur_x_bitres & 0xfff; + } else { /* x end is negative */ + s3->accel.cx |= ~0xfff; + } + } + if (s3->accel.cur_y_bit12) { + if (s3->accel.cy <= 0x7ff) { /* overlap y */ + s3->accel.cy = s3->accel.cur_y_bitres & 0xfff; + } else { /* y end is negative */ + s3->accel.cy |= ~0xfff; + } + } + } + + s3->accel.src = srcbase + s3->accel.cy * s3->width; + s3->accel.dest = dstbase + s3->accel.dy * s3->width; + } + + if ((s3->accel.cmd & 0x100) && !cpu_input) { + return; /*Wait for data from CPU*/ + } + + frgd_mix = (s3->accel.frgd_mix >> 5) & 3; + bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; + + if (!cpu_input && frgd_mix == 3 && !vram_mask && !compare_mode && (s3->accel.cmd & 0xa0) == 0xa0 && (s3->accel.frgd_mix & 0xf) == 7 && (s3->accel.bkgd_mix & 0xf) == 7) { + while (1) { + if (((s3->accel.dx & 0xfff) >= clip_l && (s3->accel.dx & 0xfff) <= clip_r && (s3->accel.dy & 0xfff) >= clip_t && (s3->accel.dy & 0xfff) <= clip_b)) { + READ(s3->accel.src + s3->accel.cx, src_dat); + READ(s3->accel.dest + s3->accel.dx, dest_dat); + + dest_dat = (src_dat & s3->accel.wrt_mask) | (dest_dat & ~s3->accel.wrt_mask); + + if (s3->accel.cmd & 0x10) { + WRITE(s3->accel.dest + s3->accel.dx, dest_dat); + } + } + + s3->accel.cx++; + s3->accel.dx++; + s3->accel.sx--; + if (s3->accel.sx < 0) { + s3->accel.cx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; + s3->accel.dx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; + s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; + + s3->accel.cy++; + s3->accel.dy++; + + s3->accel.src = srcbase + s3->accel.cy * s3->width; + s3->accel.dest = dstbase + s3->accel.dy * s3->width; + + s3->accel.sy--; + + if (s3->accel.sy < 0) { + return; + } + } + } + } else { + while (count-- && s3->accel.sy >= 0) { + /*This is almost required by OS/2's software cursor or we will risk writing/reading garbage around it.*/ + if ((s3->accel.dx) >= clip_l && (s3->accel.dx) <= clip_r && ((s3->accel.dy) >= clip_t && (s3->accel.dy) <= clip_b)) { + if (vram_mask && (s3->accel.cmd & 0x10)) { + READ(s3->accel.src + s3->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + mix_dat = mix_dat ? mix_mask : 0; + } + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = s3->accel.bkgd_color; + break; + case 1: + src_dat = s3->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + READ(s3->accel.src + s3->accel.cx, src_dat); + if (vram_mask && (s3->accel.cmd & 0x10)) + src_dat = ((src_dat & rd_mask) == rd_mask); + break; + } + + if ((((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2))) { + READ(s3->accel.dest + s3->accel.dx, dest_dat); + + MIX + + if ((!(s3->accel.cmd & 0x10) && vram_mask) || (s3->accel.cmd & 0x10)) + { + WRITE(s3->accel.dest + s3->accel.dx, dest_dat); + } + } + } + + mix_dat <<= 1; + mix_dat |= 1; + + if (s3->bpp == 0 && !s3->color_16bit) + cpu_dat >>= 8; + else { + cpu_dat >>= 16; + } + + if (s3->accel.cmd & 0x20) { + s3->accel.cx++; + s3->accel.dx++; + } else { + s3->accel.cx--; + s3->accel.dx--; + } + s3->accel.sx--; + if (s3->accel.sx < 0) { + if (s3->accel.cmd & 0x20) { + s3->accel.cx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; + s3->accel.dx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; + } else { + s3->accel.cx += (s3->accel.maj_axis_pcnt & 0xfff) + 1; + s3->accel.dx += (s3->accel.maj_axis_pcnt & 0xfff) + 1; + } + + s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; + + if (s3->accel.cmd & 0x80) { + s3->accel.cy++; + s3->accel.dy++; + } else { + s3->accel.cy--; + s3->accel.dy--; + } + + s3->accel.src = srcbase + s3->accel.cy * s3->width; + s3->accel.dest = dstbase + s3->accel.dy * s3->width; + + s3->accel.sy--; + + if (cpu_input) { + return; + } + + if (s3->accel.sy < 0) { + return; + } + } + } + } + break; + + case 7: /*Pattern fill - BitBlt but with source limited to 8x8*/ + if (!cpu_input) /*!cpu_input is trigger to start operation*/ + { + s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; + s3->accel.sy = s3->accel.multifunc[0] & 0xfff; + + s3->accel.dx = s3->accel.destx_distp & 0xfff; + if (s3->accel.destx_distp & 0x1000) + s3->accel.dx |= ~0xfff; + s3->accel.dy = s3->accel.desty_axstp & 0xfff; + if (s3->accel.desty_axstp & 0x1000) + s3->accel.dy |= ~0xfff; + + s3->accel.cx = s3->accel.cur_x & 0xfff; + if (s3->accel.cur_x_bit12) + s3->accel.cx |= ~0xfff; + s3->accel.cy = s3->accel.cur_y & 0xfff; + if (s3->accel.cur_y_bit12) + s3->accel.cy |= ~0xfff; + + /*Align source with destination*/ + s3->accel.pattern = (s3->accel.cy * s3->width) + s3->accel.cx; + s3->accel.dest = dstbase + s3->accel.dy * s3->width; + + s3->accel.cx = s3->accel.dx & 7; + s3->accel.cy = s3->accel.dy & 7; + + s3->accel.src = srcbase + s3->accel.pattern + (s3->accel.cy * s3->width); + } + + if ((s3->accel.cmd & 0x100) && !cpu_input) { + return; /*Wait for data from CPU*/ + } + + frgd_mix = (s3->accel.frgd_mix >> 5) & 3; + bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; + + while (count-- && s3->accel.sy >= 0) { + if ((s3->accel.dx & 0xfff) >= clip_l && (s3->accel.dx & 0xfff) <= clip_r && (s3->accel.dy & 0xfff) >= clip_t && (s3->accel.dy & 0xfff) <= clip_b) { + if (vram_mask) { + READ(s3->accel.src + s3->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + mix_dat = mix_dat ? mix_mask : 0; + } + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = s3->accel.bkgd_color; + break; + case 1: + src_dat = s3->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + READ(s3->accel.src + s3->accel.cx, src_dat); + if (vram_mask) + src_dat = ((src_dat & rd_mask) == rd_mask); + break; + } + + if (((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2)) { + READ(s3->accel.dest + s3->accel.dx, dest_dat); + + MIX + + if (s3->accel.cmd & 0x10) + { + WRITE(s3->accel.dest + s3->accel.dx, dest_dat); + } + } + } + + mix_dat <<= 1; + mix_dat |= 1; + if (s3->bpp == 0) + cpu_dat >>= 8; + else + cpu_dat >>= 16; + + if (s3->accel.cmd & 0x20) { + s3->accel.cx = ((s3->accel.cx + 1) & 7) | (s3->accel.cx & ~7); + s3->accel.dx++; + } else { + s3->accel.cx = ((s3->accel.cx - 1) & 7) | (s3->accel.cx & ~7); + s3->accel.dx--; + } + s3->accel.sx--; + if (s3->accel.sx < 0) { + if (s3->accel.cmd & 0x20) { + s3->accel.cx = ((s3->accel.cx - ((s3->accel.maj_axis_pcnt & 0xfff) + 1)) & 7) | (s3->accel.cx & ~7); + s3->accel.dx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; + } else { + s3->accel.cx = ((s3->accel.cx + ((s3->accel.maj_axis_pcnt & 0xfff) + 1)) & 7) | (s3->accel.cx & ~7); + s3->accel.dx += (s3->accel.maj_axis_pcnt & 0xfff) + 1; + } + s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; + + if (s3->accel.cmd & 0x80) { + s3->accel.cy = ((s3->accel.cy + 1) & 7) | (s3->accel.cy & ~7); + s3->accel.dy++; + } else { + s3->accel.cy = ((s3->accel.cy - 1) & 7) | (s3->accel.cy & ~7); + s3->accel.dy--; + } + + s3->accel.src = srcbase + s3->accel.pattern + (s3->accel.cy * s3->width); + s3->accel.dest = dstbase + s3->accel.dy * s3->width; + + s3->accel.sy--; + + if (cpu_input) { + return; + } + if (s3->accel.sy < 0) { + return; + } + } + } + break; + + case 9: /*Polyline/2-Point Line (Vision868/968 and Trio64 only)*/ + { + int error; + + if (s3->chip != S3_TRIO64 && s3->chip != S3_VISION968 && s3->chip != S3_VISION868) + break; + + if (!cpu_input) { + s3->accel.dx = ABS(s3->accel.destx_distp - s3->accel.cur_x); + if (s3->accel.destx_distp & 0x1000) + s3->accel.dx |= ~0xfff; + s3->accel.dy = ABS(s3->accel.desty_axstp - s3->accel.cur_y); + if (s3->accel.desty_axstp & 0x1000) + s3->accel.dy |= ~0xfff; + + s3->accel.cx = s3->accel.cur_x; + if (s3->accel.cur_x_bit12) + s3->accel.cx |= ~0xfff; + s3->accel.cy = s3->accel.cur_y; + if (s3->accel.cur_y_bit12) + s3->accel.cy |= ~0xfff; + } + + if ((s3->accel.cmd & 0x100) && !cpu_input) + return; /*Wait for data from CPU*/ + + if (s3->accel.dx > s3->accel.dy) { + error = s3->accel.dx / 2; + while (s3->accel.cx != s3->accel.destx_distp && count--) { + if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) { + src_dat = s3->accel.frgd_color; + + if (((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2) && (s3->accel.cmd & 0x10)) { + READ((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); + + MIX + + if (s3->accel.cmd & 0x10) + { + WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); + } + } + } + + error -= s3->accel.dy; + if (error < 0) { + error += s3->accel.dx; + if (s3->accel.desty_axstp > s3->accel.cur_y) + s3->accel.cy++; + else + s3->accel.cy--; + } + + if (s3->accel.destx_distp > s3->accel.cur_x) + s3->accel.cx++; + else + s3->accel.cx--; + } + } else { + error = s3->accel.dy / 2; + while (s3->accel.cy != s3->accel.desty_axstp && count--) { + if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) { + src_dat = s3->accel.frgd_color; + + if (((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2)) { + READ((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); + + MIX + + if (s3->accel.cmd & 0x10) + { + WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); + } + } + } + + error -= s3->accel.dx; + if (error < 0) { + error += s3->accel.dy; + if (s3->accel.destx_distp > s3->accel.cur_x) + s3->accel.cx++; + else + s3->accel.cx--; + } + if (s3->accel.desty_axstp > s3->accel.cur_y) + s3->accel.cy++; + else + s3->accel.cy--; + } + } + s3->accel.cur_x = s3->accel.cx; + s3->accel.cur_y = s3->accel.cy; + } + break; + + case 11: /*Polygon Fill Pattern (Vision868/968 and Trio64 only)*/ + { + int end_y1, end_y2; + + if (s3->chip != S3_TRIO64 && s3->chip != S3_VISION968 && s3->chip != S3_VISION868) + break; + + polygon_setup(s3); + + if ((s3->accel.cmd & 0x100) && !cpu_input) + return; /*Wait for data from CPU*/ + + end_y1 = s3->accel.desty_axstp; + end_y2 = s3->accel.desty_axstp2; + + frgd_mix = (s3->accel.frgd_mix >> 5) & 3; + bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; + + while ((s3->accel.poly_cy < end_y1) && (s3->accel.poly_cy2 < end_y2)) { + int y = s3->accel.poly_cy; + int x_count = ABS((s3->accel.poly_cx2 >> 20) - s3->accel.poly_x) + 1; + + s3->accel.src = srcbase + s3->accel.pattern + ((y & 7) * s3->width); + s3->accel.dest = dstbase + y * s3->width; + + while (x_count-- && count--) { + int pat_x = s3->accel.poly_x & 7; + + if ((s3->accel.poly_x & 0xfff) >= clip_l && (s3->accel.poly_x & 0xfff) <= clip_r && (s3->accel.poly_cy & 0xfff) >= clip_t && (s3->accel.poly_cy & 0xfff) <= clip_b) { + if (vram_mask) { + READ(s3->accel.src + pat_x, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + mix_dat = mix_dat ? mix_mask : 0; + } + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = s3->accel.bkgd_color; + break; + case 1: + src_dat = s3->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + READ(s3->accel.src + pat_x, src_dat); + if (vram_mask) + src_dat = ((src_dat & rd_mask) == rd_mask); + break; + } + + if (((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2)) { + READ(s3->accel.dest + s3->accel.poly_x, dest_dat); + + MIX + + if (s3->accel.cmd & 0x10) + { + WRITE(s3->accel.dest + s3->accel.poly_x, dest_dat); + } + } + } + if (s3->bpp == 0) + cpu_dat >>= 8; + else + cpu_dat >>= 16; + + mix_dat <<= 1; + mix_dat |= 1; + + if (s3->accel.poly_x < (s3->accel.poly_cx2 >> 20)) + s3->accel.poly_x++; + else + s3->accel.poly_x--; + } + + s3->accel.poly_cx += s3->accel.poly_dx1; + s3->accel.poly_cx2 += s3->accel.poly_dx2; + s3->accel.poly_x = s3->accel.poly_cx >> 20; + + s3->accel.poly_cy++; + s3->accel.poly_cy2++; + + if (!count) + break; + } + + s3->accel.cur_x = s3->accel.poly_cx & 0xfff; + s3->accel.cur_y = s3->accel.poly_cy & 0xfff; + s3->accel.cur_x2 = s3->accel.poly_cx2 & 0xfff; + s3->accel.cur_y2 = s3->accel.poly_cy & 0xfff; + } + break; + + case 14: /*ROPBlt (Vision868/968 only)*/ + if (s3->chip != S3_VISION968 && s3->chip != S3_VISION868) + break; + + if (!cpu_input) /*!cpu_input is trigger to start operation*/ + { + s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; + s3->accel.sy = s3->accel.multifunc[0] & 0xfff; + + s3->accel.dx = s3->accel.destx_distp & 0xfff; + if (s3->accel.destx_distp & 0x1000) + s3->accel.dx |= ~0xfff; + s3->accel.dy = s3->accel.desty_axstp & 0xfff; + if (s3->accel.desty_axstp & 0x1000) + s3->accel.dy |= ~0xfff; + + s3->accel.cx = s3->accel.cur_x & 0xfff; + if (s3->accel.cur_x_bit12) + s3->accel.cx |= ~0xfff; + s3->accel.cy = s3->accel.cur_y & 0xfff; + if (s3->accel.cur_y_bit12) + s3->accel.cy |= ~0xfff; + + s3->accel.px = s3->accel.pat_x & 0xfff; + if (s3->accel.pat_x & 0x1000) + s3->accel.px |= ~0xfff; + s3->accel.py = s3->accel.pat_y & 0xfff; + if (s3->accel.pat_y & 0x1000) + s3->accel.py |= ~0xfff; + + s3->accel.dest = dstbase + (s3->accel.dy * s3->width); + s3->accel.src = srcbase + (s3->accel.cy * s3->width); + s3->accel.pattern = (s3->accel.py * s3->width); + } + + if ((s3->accel.cmd & 0x100) && !cpu_input) + return; /*Wait for data from CPU*/ + + frgd_mix = (s3->accel.frgd_mix >> 5) & 3; + bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; + + while (count-- && s3->accel.sy >= 0) { + if ((s3->accel.dx & 0xfff) >= clip_l && (s3->accel.dx & 0xfff) <= clip_r && (s3->accel.dy & 0xfff) >= clip_t && (s3->accel.dy & 0xfff) <= clip_b) { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = s3->accel.bkgd_color; + break; + case 1: + src_dat = s3->accel.frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + READ(s3->accel.src + s3->accel.cx, src_dat); + break; + } + + if (s3->accel.ropmix & 0x100) { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + pat_dat = s3->accel.pat_bg_color; + break; + case 1: + pat_dat = s3->accel.pat_fg_color; + break; + case 2: + pat_dat = cpu_dat; + break; + case 3: + READ(s3->accel.pattern + s3->accel.px, pat_dat); + break; + } + } else { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + pat_dat = s3->accel.bkgd_color; + break; + case 1: + pat_dat = s3->accel.frgd_color; + break; + case 2: + pat_dat = cpu_dat; + break; + case 3: + READ(s3->accel.pattern + s3->accel.px, pat_dat); + break; + } + } + + if (((compare_mode == 2 && src_dat != compare) || (compare_mode == 3 && src_dat == compare) || compare_mode < 2)) { + READ(s3->accel.dest + s3->accel.dx, dest_dat); + + ROPMIX + + if (s3->accel.cmd & 0x10) { + WRITE(s3->accel.dest + s3->accel.dx, out); + } + } + } + + mix_dat <<= 1; + mix_dat |= 1; + if (s3->bpp == 0) + cpu_dat >>= 8; + else + cpu_dat >>= 16; + + if (s3->accel.cmd & 0x20) { + s3->accel.cx++; + s3->accel.dx++; + s3->accel.px++; + } else { + s3->accel.cx--; + s3->accel.dx--; + s3->accel.px--; + } + s3->accel.sx--; + if (s3->accel.sx < 0) { + if (s3->accel.cmd & 0x20) { + s3->accel.cx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; + s3->accel.dx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; + s3->accel.px -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; + } else { + s3->accel.cx += (s3->accel.maj_axis_pcnt & 0xfff) + 1; + s3->accel.dx += (s3->accel.maj_axis_pcnt & 0xfff) + 1; + s3->accel.px += (s3->accel.maj_axis_pcnt & 0xfff) + 1; + } + s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; + + if (s3->accel.cmd & 0x80) { + s3->accel.cy++; + s3->accel.dy++; + s3->accel.py++; + } else { + s3->accel.cy--; + s3->accel.dy--; + s3->accel.py--; + } + + s3->accel.src = srcbase + (s3->accel.cy * s3->width); + s3->accel.dest = dstbase + (s3->accel.dy * s3->width); + s3->accel.pattern = (s3->accel.py * s3->width); + + s3->accel.sy--; + + if (cpu_input /* && (s3->accel.multifunc[0xa] & 0xc0) == 0x80*/) + return; + if (s3->accel.sy < 0) { + return; + } + } + } + break; + } } static uint8_t s3_pci_read(int func, int addr, void *p) { - s3_t *s3 = (s3_t *)p; - svga_t *svga = &s3->svga; + s3_t *s3 = (s3_t *) p; + svga_t *svga = &s3->svga; - switch (addr) - { - case 0x00: return 0x33; /*'S3'*/ - case 0x01: return 0x53; + switch (addr) { + case 0x00: + return 0x33; /*'S3'*/ + case 0x01: + return 0x53; - case 0x02: return s3->id_ext_pci; - case 0x03: return (s3->chip == S3_TRIO64V2) ? 0x89 : 0x88; + case 0x02: + return s3->id_ext_pci; + case 0x03: + return (s3->chip == S3_TRIO64V2) ? 0x89 : 0x88; - case PCI_REG_COMMAND: - if (s3->chip == S3_VISION968 || s3->chip == S3_VISION868) - return s3->pci_regs[PCI_REG_COMMAND] | 0x80; /*Respond to IO and memory accesses*/ - else - return s3->pci_regs[PCI_REG_COMMAND]; /*Respond to IO and memory accesses*/ - break; + case PCI_REG_COMMAND: + if (s3->chip == S3_VISION968 || s3->chip == S3_VISION868) + return s3->pci_regs[PCI_REG_COMMAND] | 0x80; /*Respond to IO and memory accesses*/ + else + return s3->pci_regs[PCI_REG_COMMAND]; /*Respond to IO and memory accesses*/ + break; - case 0x07: return (s3->chip == S3_TRIO64V2) ? (s3->pci_regs[0x07] & 0x36) : (1 << 1); /*Medium DEVSEL timing*/ + case 0x07: + return (s3->chip == S3_TRIO64V2) ? (s3->pci_regs[0x07] & 0x36) : (1 << 1); /*Medium DEVSEL timing*/ - case 0x08: return (s3->chip == S3_TRIO64V) ? 0x40 : 0; /*Revision ID*/ - case 0x09: return 0; /*Programming interface*/ + case 0x08: + return (s3->chip == S3_TRIO64V) ? 0x40 : 0; /*Revision ID*/ + case 0x09: + return 0; /*Programming interface*/ - case 0x0a: - if (s3->chip >= S3_TRIO32 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868) - return 0x00; /*Supports VGA interface*/ - else - return 0x01; - break; - case 0x0b: - if (s3->chip >= S3_TRIO32 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868) - return 0x03; - else - return 0x00; - break; + case 0x0a: + if (s3->chip >= S3_TRIO32 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868) + return 0x00; /*Supports VGA interface*/ + else + return 0x01; + break; + case 0x0b: + if (s3->chip >= S3_TRIO32 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868) + return 0x03; + else + return 0x00; + break; - case 0x0d: return (s3->chip == S3_TRIO64V2) ? (s3->pci_regs[0x0d] & 0xf8) : 0x00; break; + case 0x0d: + return (s3->chip == S3_TRIO64V2) ? (s3->pci_regs[0x0d] & 0xf8) : 0x00; + break; - case 0x10: return 0x00; /*Linear frame buffer address*/ - case 0x11: return 0x00; - case 0x12: - if (svga->crtc[0x53] & 0x08) - return 0x00; - else - return (svga->crtc[0x5a] & 0x80); - break; + case 0x10: + return 0x00; /*Linear frame buffer address*/ + case 0x11: + return 0x00; + case 0x12: + if (svga->crtc[0x53] & 0x08) + return 0x00; + else + return (svga->crtc[0x5a] & 0x80); + break; - case 0x13: - if (svga->crtc[0x53] & 0x08) { - return (s3->chip >= S3_TRIO64V) ? (svga->crtc[0x59] & 0xfc) : (svga->crtc[0x59] & 0xfe); - } else { - return svga->crtc[0x59]; - } - break; + case 0x13: + if (svga->crtc[0x53] & 0x08) { + return (s3->chip >= S3_TRIO64V) ? (svga->crtc[0x59] & 0xfc) : (svga->crtc[0x59] & 0xfe); + } else { + return svga->crtc[0x59]; + } + break; - case 0x30: return s3->has_bios ? (s3->pci_regs[0x30] & 0x01) : 0x00; /*BIOS ROM address*/ - case 0x31: return 0x00; - case 0x32: return s3->has_bios ? s3->pci_regs[0x32] : 0x00; - case 0x33: return s3->has_bios ? s3->pci_regs[0x33] : 0x00; + case 0x30: + return s3->has_bios ? (s3->pci_regs[0x30] & 0x01) : 0x00; /*BIOS ROM address*/ + case 0x31: + return 0x00; + case 0x32: + return s3->has_bios ? s3->pci_regs[0x32] : 0x00; + case 0x33: + return s3->has_bios ? s3->pci_regs[0x33] : 0x00; - case 0x3c: return s3->int_line; - case 0x3d: return PCI_INTA; + case 0x3c: + return s3->int_line; + case 0x3d: + return PCI_INTA; - case 0x3e: return (s3->chip == S3_TRIO64V2) ? 0x04 : 0x00; break; - case 0x3f: return (s3->chip == S3_TRIO64V2) ? 0xff : 0x00; break; - } - return 0; + case 0x3e: + return (s3->chip == S3_TRIO64V2) ? 0x04 : 0x00; + break; + case 0x3f: + return (s3->chip == S3_TRIO64V2) ? 0xff : 0x00; + break; + } + return 0; } static void s3_pci_write(int func, int addr, uint8_t val, void *p) { - s3_t *s3 = (s3_t *)p; - svga_t *svga = &s3->svga; + s3_t *s3 = (s3_t *) p; + svga_t *svga = &s3->svga; - switch (addr) - { - case 0x00: case 0x01: case 0x02: case 0x03: - case 0x08: case 0x09: case 0x0a: case 0x0b: - case 0x3d: case 0x3e: case 0x3f: - if (s3->chip == S3_TRIO64V2) - return; - break; + switch (addr) { + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + case 0x3d: + case 0x3e: + case 0x3f: + if (s3->chip == S3_TRIO64V2) + return; + break; - case PCI_REG_COMMAND: - if (val & PCI_COMMAND_IO) - s3_io_set(s3); - else - s3_io_remove(s3); - s3->pci_regs[PCI_REG_COMMAND] = (val & 0x23); - s3_updatemapping(s3); - break; + case PCI_REG_COMMAND: + if (val & PCI_COMMAND_IO) + s3_io_set(s3); + else + s3_io_remove(s3); + s3->pci_regs[PCI_REG_COMMAND] = (val & 0x23); + s3_updatemapping(s3); + break; - case 0x07: - if (s3->chip == S3_TRIO64V2) { - s3->pci_regs[0x07] = val & 0x3e; - return; - } - break; + case 0x07: + if (s3->chip == S3_TRIO64V2) { + s3->pci_regs[0x07] = val & 0x3e; + return; + } + break; - case 0x0d: - if (s3->chip == S3_TRIO64V2) { - s3->pci_regs[0x0d] = val & 0xf8; - return; - } - break; + case 0x0d: + if (s3->chip == S3_TRIO64V2) { + s3->pci_regs[0x0d] = val & 0xf8; + return; + } + break; - case 0x12: - if (!(svga->crtc[0x53] & 0x08)) { - svga->crtc[0x5a] = (svga->crtc[0x5a] & 0x7f) | (val & 0x80); - s3_updatemapping(s3); - } - break; + case 0x12: + if (!(svga->crtc[0x53] & 0x08)) { + svga->crtc[0x5a] = (svga->crtc[0x5a] & 0x7f) | (val & 0x80); + s3_updatemapping(s3); + } + break; - case 0x13: - if (svga->crtc[0x53] & 0x08) { - svga->crtc[0x59] = (s3->chip >= S3_TRIO64V) ? (val & 0xfc) : (val & 0xfe); - } else { - svga->crtc[0x59] = val; - } - s3_updatemapping(s3); - break; + case 0x13: + if (svga->crtc[0x53] & 0x08) { + svga->crtc[0x59] = (s3->chip >= S3_TRIO64V) ? (val & 0xfc) : (val & 0xfe); + } else { + svga->crtc[0x59] = val; + } + s3_updatemapping(s3); + break; - case 0x30: case 0x32: case 0x33: - if (!s3->has_bios) - return; - s3->pci_regs[addr] = val; - if (s3->pci_regs[0x30] & 0x01) - { - uint32_t biosaddr = (s3->pci_regs[0x32] << 16) | (s3->pci_regs[0x33] << 24); - mem_mapping_set_addr(&s3->bios_rom.mapping, biosaddr, 0x8000); - } - else - { - mem_mapping_disable(&s3->bios_rom.mapping); - } - return; + case 0x30: + case 0x32: + case 0x33: + if (!s3->has_bios) + return; + s3->pci_regs[addr] = val; + if (s3->pci_regs[0x30] & 0x01) { + uint32_t biosaddr = (s3->pci_regs[0x32] << 16) | (s3->pci_regs[0x33] << 24); + mem_mapping_set_addr(&s3->bios_rom.mapping, biosaddr, 0x8000); + } else { + mem_mapping_disable(&s3->bios_rom.mapping); + } + return; - case 0x3c: - s3->int_line = val; - return; - } + case 0x3c: + s3->int_line = val; + return; + } } static void fifo_thread(void *param) { - s3_t *s3 = (s3_t *)param; - uint64_t start_time, end_time; + s3_t *s3 = (s3_t *) param; + uint64_t start_time, end_time; - while (s3->fifo_thread_run) { - thread_set_event(s3->fifo_not_full_event); - thread_wait_event(s3->wake_fifo_thread, -1); - thread_reset_event(s3->wake_fifo_thread); - s3->blitter_busy = 1; - while (!FIFO_EMPTY) { - start_time = plat_timer_read(); - fifo_entry_t *fifo = &s3->fifo[s3->fifo_read_idx & FIFO_MASK]; + while (s3->fifo_thread_run) { + thread_set_event(s3->fifo_not_full_event); + thread_wait_event(s3->wake_fifo_thread, -1); + thread_reset_event(s3->wake_fifo_thread); + s3->blitter_busy = 1; + while (!FIFO_EMPTY) { + start_time = plat_timer_read(); + fifo_entry_t *fifo = &s3->fifo[s3->fifo_read_idx & FIFO_MASK]; - switch (fifo->addr_type & FIFO_TYPE) { - case FIFO_WRITE_BYTE: - s3_accel_write_fifo(s3, fifo->addr_type & FIFO_ADDR, fifo->val); - break; - case FIFO_WRITE_WORD: - s3_accel_write_fifo_w(s3, fifo->addr_type & FIFO_ADDR, fifo->val); - break; - case FIFO_WRITE_DWORD: - s3_accel_write_fifo_l(s3, fifo->addr_type & FIFO_ADDR, fifo->val); - break; - case FIFO_OUT_BYTE: - s3_accel_out_fifo(s3, fifo->addr_type & FIFO_ADDR, fifo->val); - break; - case FIFO_OUT_WORD: - s3_accel_out_fifo_w(s3, fifo->addr_type & FIFO_ADDR, fifo->val); - break; - case FIFO_OUT_DWORD: - s3_accel_out_fifo_l(s3, fifo->addr_type & FIFO_ADDR, fifo->val); - break; - } + switch (fifo->addr_type & FIFO_TYPE) { + case FIFO_WRITE_BYTE: + s3_accel_write_fifo(s3, fifo->addr_type & FIFO_ADDR, fifo->val); + break; + case FIFO_WRITE_WORD: + s3_accel_write_fifo_w(s3, fifo->addr_type & FIFO_ADDR, fifo->val); + break; + case FIFO_WRITE_DWORD: + s3_accel_write_fifo_l(s3, fifo->addr_type & FIFO_ADDR, fifo->val); + break; + case FIFO_OUT_BYTE: + s3_accel_out_fifo(s3, fifo->addr_type & FIFO_ADDR, fifo->val); + break; + case FIFO_OUT_WORD: + s3_accel_out_fifo_w(s3, fifo->addr_type & FIFO_ADDR, fifo->val); + break; + case FIFO_OUT_DWORD: + s3_accel_out_fifo_l(s3, fifo->addr_type & FIFO_ADDR, fifo->val); + break; + } - s3->fifo_read_idx++; - fifo->addr_type = FIFO_INVALID; + s3->fifo_read_idx++; + fifo->addr_type = FIFO_INVALID; - if (FIFO_ENTRIES > 0xe000) - thread_set_event(s3->fifo_not_full_event); + if (FIFO_ENTRIES > 0xe000) + thread_set_event(s3->fifo_not_full_event); - end_time = plat_timer_read(); - s3->blitter_time += (end_time - start_time); - } - s3->blitter_busy = 0; - s3->subsys_stat |= INT_FIFO_EMP; - s3_update_irqs(s3); - } + end_time = plat_timer_read(); + s3->blitter_time += (end_time - start_time); + } + s3->blitter_busy = 0; + s3->subsys_stat |= INT_FIFO_EMP; + s3_update_irqs(s3); + } } -static int vram_sizes[] = -{ - 7, /*512 kB*/ - 6, /*1 MB*/ - 4, /*2 MB*/ - 0, - 0, /*4 MB*/ - 0, - 0, /*6 MB*/ - 0, - 3 /*8 MB*/ +static int vram_sizes[] = { + 7, /*512 kB*/ + 6, /*1 MB*/ + 4, /*2 MB*/ + 0, + 0, /*4 MB*/ + 0, + 0, /*6 MB*/ + 0, + 3 /*8 MB*/ }; -static void s3_reset(void *priv) +static void +s3_reset(void *priv) { - s3_t *s3 = (s3_t *) priv; + s3_t *s3 = (s3_t *) priv; svga_t *svga = &s3->svga; memset(svga->crtc, 0x00, sizeof(svga->crtc)); - svga->crtc[0] = 63; - svga->crtc[6] = 255; - svga->dispontime = 1000ull << 32; + svga->crtc[0] = 63; + svga->crtc[6] = 255; + svga->dispontime = 1000ull << 32; svga->dispofftime = 1000ull << 32; - svga->bpp = 8; + svga->bpp = 8; - if (s3->pci) - svga->crtc[0x36] = 2 | (3 << 2) | (1 << 4); - else if (s3->vlb) - svga->crtc[0x36] = 1 | (3 << 2) | (1 << 4); - else - svga->crtc[0x36] = 3 | (1 << 4); + if (s3->pci) + svga->crtc[0x36] = 2 | (3 << 2) | (1 << 4); + else if (s3->vlb) + svga->crtc[0x36] = 1 | (3 << 2) | (1 << 4); + else + svga->crtc[0x36] = 3 | (1 << 4); - if (s3->chip >= S3_86C928) - svga->crtc[0x36] |= (vram_sizes[s3->vram] << 5); - else - svga->crtc[0x36] |= ((s3->vram == 1) ? 0x00 : 0x20) | 0x80; + if (s3->chip >= S3_86C928) + svga->crtc[0x36] |= (vram_sizes[s3->vram] << 5); + else + svga->crtc[0x36] |= ((s3->vram == 1) ? 0x00 : 0x20) | 0x80; - svga->crtc[0x37] = 1 | (7 << 5); + svga->crtc[0x37] = 1 | (7 << 5); - if (s3->chip >= S3_86C928) - svga->crtc[0x37] |= 0x04; + if (s3->chip >= S3_86C928) + svga->crtc[0x37] |= 0x04; s3_io_set(s3); @@ -6670,1786 +7575,1757 @@ static void s3_reset(void *priv) s3->pci_regs[0x32] = 0x0c; s3->pci_regs[0x33] = 0x00; - switch(s3->card_type) { - case S3_MIROCRYSTAL8S_805: - case S3_MIROCRYSTAL10SD_805: - svga->crtc[0x5a] = 0x0a; - svga->getclock = sdac_getclock; - break; + switch (s3->card_type) { + case S3_MIROCRYSTAL8S_805: + case S3_MIROCRYSTAL10SD_805: + svga->crtc[0x5a] = 0x0a; + svga->getclock = sdac_getclock; + break; - case S3_SPEA_MIRAGE_86C801: - case S3_SPEA_MIRAGE_86C805: - svga->crtc[0x5a] = 0x0a; - break; + case S3_SPEA_MIRAGE_86C801: + case S3_SPEA_MIRAGE_86C805: + svga->crtc[0x5a] = 0x0a; + break; - case S3_PHOENIX_86C801: - case S3_PHOENIX_86C805: - svga->crtc[0x5a] = 0x0a; - break; + case S3_PHOENIX_86C801: + case S3_PHOENIX_86C805: + svga->crtc[0x5a] = 0x0a; + break; - case S3_METHEUS_86C928: - case S3_SPEA_MERCURY_LITE_PCI: - svga->crtc[0x5a] = 0x0a; - break; + case S3_METHEUS_86C928: + case S3_SPEA_MERCURY_LITE_PCI: + svga->crtc[0x5a] = 0x0a; + break; - case S3_PARADISE_BAHAMAS64: - case S3_PHOENIX_VISION864: - case S3_MIROCRYSTAL20SD_864: - svga->crtc[0x5a] = 0x0a; - break; + case S3_PARADISE_BAHAMAS64: + case S3_PHOENIX_VISION864: + case S3_MIROCRYSTAL20SD_864: + svga->crtc[0x5a] = 0x0a; + break; - case S3_DIAMOND_STEALTH64_964: - case S3_ELSAWIN2KPROX_964: - case S3_MIROCRYSTAL20SV_964: - svga->crtc[0x5a] = 0x0a; - break; + case S3_DIAMOND_STEALTH64_964: + case S3_ELSAWIN2KPROX_964: + case S3_MIROCRYSTAL20SV_964: + svga->crtc[0x5a] = 0x0a; + break; - case S3_ELSAWIN2KPROX: - case S3_SPEA_MERCURY_P64V: - case S3_MIROVIDEO40SV_ERGO_968: - case S3_NUMBER9_9FX_771: - case S3_PHOENIX_VISION968: - if (s3->pci) { - svga->crtc[0x53] = 0x18; - svga->crtc[0x58] = 0x10; - svga->crtc[0x59] = 0x70; - svga->crtc[0x5a] = 0x00; - svga->crtc[0x6c] = 1; - } else { - svga->crtc[0x53] = 0x00; - svga->crtc[0x59] = 0x00; - svga->crtc[0x5a] = 0x0a; - } - break; + case S3_ELSAWIN2KPROX: + case S3_SPEA_MERCURY_P64V: + case S3_MIROVIDEO40SV_ERGO_968: + case S3_NUMBER9_9FX_771: + case S3_PHOENIX_VISION968: + if (s3->pci) { + svga->crtc[0x53] = 0x18; + svga->crtc[0x58] = 0x10; + svga->crtc[0x59] = 0x70; + svga->crtc[0x5a] = 0x00; + svga->crtc[0x6c] = 1; + } else { + svga->crtc[0x53] = 0x00; + svga->crtc[0x59] = 0x00; + svga->crtc[0x5a] = 0x0a; + } + break; - case S3_NUMBER9_9FX_531: - case S3_PHOENIX_VISION868: - if (s3->pci) { - svga->crtc[0x53] = 0x18; - svga->crtc[0x58] = 0x10; - svga->crtc[0x59] = 0x70; - svga->crtc[0x5a] = 0x00; - svga->crtc[0x6c] = 1; - } else { - svga->crtc[0x53] = 0x00; - svga->crtc[0x59] = 0x00; - svga->crtc[0x5a] = 0x0a; - } - break; + case S3_NUMBER9_9FX_531: + case S3_PHOENIX_VISION868: + if (s3->pci) { + svga->crtc[0x53] = 0x18; + svga->crtc[0x58] = 0x10; + svga->crtc[0x59] = 0x70; + svga->crtc[0x5a] = 0x00; + svga->crtc[0x6c] = 1; + } else { + svga->crtc[0x53] = 0x00; + svga->crtc[0x59] = 0x00; + svga->crtc[0x5a] = 0x0a; + } + break; - case S3_PHOENIX_TRIO64: - case S3_PHOENIX_TRIO64_ONBOARD: - case S3_PHOENIX_TRIO64VPLUS: - case S3_PHOENIX_TRIO64VPLUS_ONBOARD: - case S3_DIAMOND_STEALTH64_764: - case S3_SPEA_MIRAGE_P64: - case S3_NUMBER9_9FX: - if (s3->card_type == S3_PHOENIX_TRIO64VPLUS || s3->card_type == S3_PHOENIX_TRIO64VPLUS_ONBOARD) - svga->crtc[0x53] = 0x08; - break; + case S3_PHOENIX_TRIO64: + case S3_PHOENIX_TRIO64_ONBOARD: + case S3_PHOENIX_TRIO64VPLUS: + case S3_PHOENIX_TRIO64VPLUS_ONBOARD: + case S3_DIAMOND_STEALTH64_764: + case S3_SPEA_MIRAGE_P64: + case S3_NUMBER9_9FX: + if (s3->card_type == S3_PHOENIX_TRIO64VPLUS || s3->card_type == S3_PHOENIX_TRIO64VPLUS_ONBOARD) + svga->crtc[0x53] = 0x08; + break; - case S3_TRIO64V2_DX: - svga->crtc[0x53] = 0x08; - svga->crtc[0x59] = 0x70; - svga->crtc[0x5a] = 0x00; - svga->crtc[0x6c] = 1; - s3->pci_regs[0x05] = 0; - s3->pci_regs[0x06] = 0; - s3->pci_regs[0x07] = 2; - s3->pci_regs[0x3d] = 1; - s3->pci_regs[0x3e] = 4; - s3->pci_regs[0x3f] = 0xff; - break; - } + case S3_TRIO64V2_DX: + svga->crtc[0x53] = 0x08; + svga->crtc[0x59] = 0x70; + svga->crtc[0x5a] = 0x00; + svga->crtc[0x6c] = 1; + s3->pci_regs[0x05] = 0; + s3->pci_regs[0x06] = 0; + s3->pci_regs[0x07] = 2; + s3->pci_regs[0x3d] = 1; + s3->pci_regs[0x3e] = 4; + s3->pci_regs[0x3f] = 0xff; + break; + } - if (s3->has_bios) { - if (s3->pci) - mem_mapping_disable(&s3->bios_rom.mapping); - } + if (s3->has_bios) { + if (s3->pci) + mem_mapping_disable(&s3->bios_rom.mapping); + } - s3_updatemapping(s3); + s3_updatemapping(s3); - mem_mapping_disable(&s3->mmio_mapping); - mem_mapping_disable(&s3->new_mmio_mapping); + mem_mapping_disable(&s3->mmio_mapping); + mem_mapping_disable(&s3->new_mmio_mapping); } - -static void *s3_init(const device_t *info) +static void * +s3_init(const device_t *info) { - const char *bios_fn; - int chip, stepping; - s3_t *s3 = malloc(sizeof(s3_t)); - svga_t *svga = &s3->svga; - int vram; - uint32_t vram_size; + const char *bios_fn; + int chip, stepping; + s3_t *s3 = malloc(sizeof(s3_t)); + svga_t *svga = &s3->svga; + int vram; + uint32_t vram_size; - switch(info->local) { - case S3_ORCHID_86C911: - bios_fn = ROM_ORCHID_86C911; - chip = S3_86C911; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c911); - break; - case S3_DIAMOND_STEALTH_VRAM: - bios_fn = ROM_DIAMOND_STEALTH_VRAM; - chip = S3_86C911; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c911); - break; - case S3_AMI_86C924: - bios_fn = ROM_AMI_86C924; - chip = S3_86C924; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c911); - break; - case S3_SPEA_MIRAGE_86C801: - bios_fn = ROM_SPEA_MIRAGE_86C801; - chip = S3_86C801; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c801); - break; - case S3_86C805_ONBOARD: - bios_fn = NULL; - chip = S3_86C805; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c805); - break; - case S3_SPEA_MIRAGE_86C805: - bios_fn = ROM_SPEA_MIRAGE_86C805; - chip = S3_86C805; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c805); - break; - case S3_MIROCRYSTAL8S_805: - bios_fn = ROM_MIROCRYSTAL8S_805; - chip = S3_86C805; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c805); - break; - case S3_MIROCRYSTAL10SD_805: - bios_fn = ROM_MIROCRYSTAL10SD_805; - chip = S3_86C805; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c805); - break; - case S3_PHOENIX_86C801: - bios_fn = ROM_PHOENIX_86C80X; - chip = S3_86C801; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c801); - break; - case S3_PHOENIX_86C805: - bios_fn = ROM_PHOENIX_86C80X; - chip = S3_86C805; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c805); - break; - case S3_METHEUS_86C928: - bios_fn = ROM_METHEUS_86C928; - chip = S3_86C928; - if (info->flags & DEVICE_VLB) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c805); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c801); - break; - case S3_SPEA_MERCURY_LITE_PCI: - bios_fn = ROM_SPEA_MERCURY_LITE_PCI; - chip = S3_86C928PCI; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c928pci); - break; - case S3_MIROCRYSTAL20SD_864: - bios_fn = ROM_MIROCRYSTAL20SD_864_VLB; - chip = S3_VISION864; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864_vlb); - break; - case S3_PARADISE_BAHAMAS64: - bios_fn = ROM_PARADISE_BAHAMAS64; - chip = S3_VISION864; - if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864_vlb); - break; - case S3_PHOENIX_VISION864: - bios_fn = ROM_PHOENIX_VISION864; - chip = S3_VISION864; - if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864_vlb); - break; - case S3_NUMBER9_9FX_531: - bios_fn = ROM_NUMBER9_9FX_531; - chip = S3_VISION868; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision868_pci); - break; - case S3_PHOENIX_VISION868: - bios_fn = ROM_PHOENIX_VISION868; - chip = S3_VISION868; - if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision868_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision868_vlb); - break; - case S3_DIAMOND_STEALTH64_964: - bios_fn = ROM_DIAMOND_STEALTH64_964; - chip = S3_VISION964; - if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision964_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision964_vlb); - break; - case S3_MIROCRYSTAL20SV_964: - chip = S3_VISION964; - if (info->flags & DEVICE_PCI) { - bios_fn = ROM_MIROCRYSTAL20SV_964_PCI; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision964_pci); - } else { - bios_fn = ROM_MIROCRYSTAL20SV_964_VLB; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision964_vlb); - } - break; - case S3_MIROVIDEO40SV_ERGO_968: - bios_fn = ROM_MIROVIDEO40SV_ERGO_968_PCI; - chip = S3_VISION968; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision968_pci); - break; - case S3_NUMBER9_9FX_771: - bios_fn = ROM_NUMBER9_9FX_771; - chip = S3_VISION968; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision968_pci); - break; - case S3_PHOENIX_VISION968: - bios_fn = ROM_PHOENIX_VISION968; - chip = S3_VISION968; - if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision968_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision968_vlb); - break; - case S3_ELSAWIN2KPROX_964: - bios_fn = ROM_ELSAWIN2KPROX_964; - chip = S3_VISION964; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision964_pci); - break; - case S3_ELSAWIN2KPROX: - bios_fn = ROM_ELSAWIN2KPROX; - chip = S3_VISION968; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision968_pci); - break; - case S3_SPEA_MERCURY_P64V: - bios_fn = ROM_SPEA_MERCURY_P64V; - chip = S3_VISION968; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision968_pci); - break; - case S3_PHOENIX_TRIO32: - bios_fn = ROM_PHOENIX_TRIO32; - chip = S3_TRIO32; - if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio32_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio32_vlb); - break; - case S3_DIAMOND_STEALTH_SE: - bios_fn = ROM_DIAMOND_STEALTH_SE; - chip = S3_TRIO32; - if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio32_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio32_vlb); - break; - case S3_PHOENIX_TRIO64: - bios_fn = ROM_PHOENIX_TRIO64; - chip = S3_TRIO64; - if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_vlb); - break; - case S3_SPEA_MIRAGE_P64: - bios_fn = ROM_SPEA_MIRAGE_P64; - chip = S3_TRIO64; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_vlb); - break; - case S3_PHOENIX_TRIO64_ONBOARD: - bios_fn = NULL; - chip = S3_TRIO64; - if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_vlb); - break; - case S3_PHOENIX_TRIO64VPLUS: - bios_fn = ROM_PHOENIX_TRIO64VPLUS; - chip = S3_TRIO64V; - if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_vlb); - break; - case S3_PHOENIX_TRIO64VPLUS_ONBOARD: - bios_fn = NULL; - chip = S3_TRIO64V; - if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_vlb); - break; - case S3_DIAMOND_STEALTH64_764: - bios_fn = ROM_DIAMOND_STEALTH64_764; - chip = S3_TRIO64; - if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_stealth64_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_stealth64_vlb); - break; - case S3_NUMBER9_9FX: - bios_fn = ROM_NUMBER9_9FX; - chip = S3_TRIO64; - if (info->flags & DEVICE_PCI) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_vlb); - break; - case S3_TRIO64V2_DX: - bios_fn = ROM_TRIO64V2_DX_VBE20; - chip = S3_TRIO64V2; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci); - break; - case S3_TRIO64V2_DX_ONBOARD: - bios_fn = NULL; - chip = S3_TRIO64V2; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci); - break; - default: - free(s3); - return NULL; - } + switch (info->local) { + case S3_ORCHID_86C911: + bios_fn = ROM_ORCHID_86C911; + chip = S3_86C911; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c911); + break; + case S3_DIAMOND_STEALTH_VRAM: + bios_fn = ROM_DIAMOND_STEALTH_VRAM; + chip = S3_86C911; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c911); + break; + case S3_AMI_86C924: + bios_fn = ROM_AMI_86C924; + chip = S3_86C924; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c911); + break; + case S3_SPEA_MIRAGE_86C801: + bios_fn = ROM_SPEA_MIRAGE_86C801; + chip = S3_86C801; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c801); + break; + case S3_86C805_ONBOARD: + bios_fn = NULL; + chip = S3_86C805; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c805); + break; + case S3_SPEA_MIRAGE_86C805: + bios_fn = ROM_SPEA_MIRAGE_86C805; + chip = S3_86C805; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c805); + break; + case S3_MIROCRYSTAL8S_805: + bios_fn = ROM_MIROCRYSTAL8S_805; + chip = S3_86C805; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c805); + break; + case S3_MIROCRYSTAL10SD_805: + bios_fn = ROM_MIROCRYSTAL10SD_805; + chip = S3_86C805; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c805); + break; + case S3_PHOENIX_86C801: + bios_fn = ROM_PHOENIX_86C80X; + chip = S3_86C801; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c801); + break; + case S3_PHOENIX_86C805: + bios_fn = ROM_PHOENIX_86C80X; + chip = S3_86C805; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c805); + break; + case S3_METHEUS_86C928: + bios_fn = ROM_METHEUS_86C928; + chip = S3_86C928; + if (info->flags & DEVICE_VLB) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c805); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c801); + break; + case S3_SPEA_MERCURY_LITE_PCI: + bios_fn = ROM_SPEA_MERCURY_LITE_PCI; + chip = S3_86C928PCI; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_86c928pci); + break; + case S3_MIROCRYSTAL20SD_864: + bios_fn = ROM_MIROCRYSTAL20SD_864_VLB; + chip = S3_VISION864; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864_vlb); + break; + case S3_PARADISE_BAHAMAS64: + bios_fn = ROM_PARADISE_BAHAMAS64; + chip = S3_VISION864; + if (info->flags & DEVICE_PCI) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864_vlb); + break; + case S3_PHOENIX_VISION864: + bios_fn = ROM_PHOENIX_VISION864; + chip = S3_VISION864; + if (info->flags & DEVICE_PCI) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision864_vlb); + break; + case S3_NUMBER9_9FX_531: + bios_fn = ROM_NUMBER9_9FX_531; + chip = S3_VISION868; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision868_pci); + break; + case S3_PHOENIX_VISION868: + bios_fn = ROM_PHOENIX_VISION868; + chip = S3_VISION868; + if (info->flags & DEVICE_PCI) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision868_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision868_vlb); + break; + case S3_DIAMOND_STEALTH64_964: + bios_fn = ROM_DIAMOND_STEALTH64_964; + chip = S3_VISION964; + if (info->flags & DEVICE_PCI) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision964_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision964_vlb); + break; + case S3_MIROCRYSTAL20SV_964: + chip = S3_VISION964; + if (info->flags & DEVICE_PCI) { + bios_fn = ROM_MIROCRYSTAL20SV_964_PCI; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision964_pci); + } else { + bios_fn = ROM_MIROCRYSTAL20SV_964_VLB; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision964_vlb); + } + break; + case S3_MIROVIDEO40SV_ERGO_968: + bios_fn = ROM_MIROVIDEO40SV_ERGO_968_PCI; + chip = S3_VISION968; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision968_pci); + break; + case S3_NUMBER9_9FX_771: + bios_fn = ROM_NUMBER9_9FX_771; + chip = S3_VISION968; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision968_pci); + break; + case S3_PHOENIX_VISION968: + bios_fn = ROM_PHOENIX_VISION968; + chip = S3_VISION968; + if (info->flags & DEVICE_PCI) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision968_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision968_vlb); + break; + case S3_ELSAWIN2KPROX_964: + bios_fn = ROM_ELSAWIN2KPROX_964; + chip = S3_VISION964; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision964_pci); + break; + case S3_ELSAWIN2KPROX: + bios_fn = ROM_ELSAWIN2KPROX; + chip = S3_VISION968; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision968_pci); + break; + case S3_SPEA_MERCURY_P64V: + bios_fn = ROM_SPEA_MERCURY_P64V; + chip = S3_VISION968; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_vision968_pci); + break; + case S3_PHOENIX_TRIO32: + bios_fn = ROM_PHOENIX_TRIO32; + chip = S3_TRIO32; + if (info->flags & DEVICE_PCI) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio32_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio32_vlb); + break; + case S3_DIAMOND_STEALTH_SE: + bios_fn = ROM_DIAMOND_STEALTH_SE; + chip = S3_TRIO32; + if (info->flags & DEVICE_PCI) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio32_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio32_vlb); + break; + case S3_PHOENIX_TRIO64: + bios_fn = ROM_PHOENIX_TRIO64; + chip = S3_TRIO64; + if (info->flags & DEVICE_PCI) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_vlb); + break; + case S3_SPEA_MIRAGE_P64: + bios_fn = ROM_SPEA_MIRAGE_P64; + chip = S3_TRIO64; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_vlb); + break; + case S3_PHOENIX_TRIO64_ONBOARD: + bios_fn = NULL; + chip = S3_TRIO64; + if (info->flags & DEVICE_PCI) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_vlb); + break; + case S3_PHOENIX_TRIO64VPLUS: + bios_fn = ROM_PHOENIX_TRIO64VPLUS; + chip = S3_TRIO64V; + if (info->flags & DEVICE_PCI) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_vlb); + break; + case S3_PHOENIX_TRIO64VPLUS_ONBOARD: + bios_fn = NULL; + chip = S3_TRIO64V; + if (info->flags & DEVICE_PCI) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_vlb); + break; + case S3_DIAMOND_STEALTH64_764: + bios_fn = ROM_DIAMOND_STEALTH64_764; + chip = S3_TRIO64; + if (info->flags & DEVICE_PCI) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_stealth64_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_stealth64_vlb); + break; + case S3_NUMBER9_9FX: + bios_fn = ROM_NUMBER9_9FX; + chip = S3_TRIO64; + if (info->flags & DEVICE_PCI) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_vlb); + break; + case S3_TRIO64V2_DX: + bios_fn = ROM_TRIO64V2_DX_VBE20; + chip = S3_TRIO64V2; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci); + break; + case S3_TRIO64V2_DX_ONBOARD: + bios_fn = NULL; + chip = S3_TRIO64V2; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_s3_trio64_pci); + break; + default: + free(s3); + return NULL; + } - memset(s3, 0, sizeof(s3_t)); + memset(s3, 0, sizeof(s3_t)); - vram = device_get_config_int("memory"); + vram = device_get_config_int("memory"); - if (vram) - vram_size = vram << 20; - else - vram_size = 512 << 10; - s3->vram_mask = vram_size - 1; - s3->vram = vram; + if (vram) + vram_size = vram << 20; + else + vram_size = 512 << 10; + s3->vram_mask = vram_size - 1; + s3->vram = vram; - s3->has_bios = (bios_fn != NULL); - if (s3->has_bios) { - rom_init(&s3->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - if (info->flags & DEVICE_PCI) - mem_mapping_disable(&s3->bios_rom.mapping); - } + s3->has_bios = (bios_fn != NULL); + if (s3->has_bios) { + rom_init(&s3->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + if (info->flags & DEVICE_PCI) + mem_mapping_disable(&s3->bios_rom.mapping); + } - s3->pci = !!(info->flags & DEVICE_PCI); - s3->vlb = !!(info->flags & DEVICE_VLB); + s3->pci = !!(info->flags & DEVICE_PCI); + s3->vlb = !!(info->flags & DEVICE_VLB); - mem_mapping_add(&s3->linear_mapping, 0, 0, - svga_read_linear, svga_readw_linear, svga_readl_linear, - svga_write_linear, svga_writew_linear, svga_writel_linear, - NULL, MEM_MAPPING_EXTERNAL, &s3->svga); - /*It's hardcoded to 0xa0000 before the Trio64V+ and expects so*/ - if (chip >= S3_TRIO64V) - mem_mapping_add(&s3->mmio_mapping, 0, 0, - s3_accel_read, s3_accel_read_w, s3_accel_read_l, - s3_accel_write, s3_accel_write_w, s3_accel_write_l, - NULL, MEM_MAPPING_EXTERNAL, s3); - else - mem_mapping_add(&s3->mmio_mapping, 0xa0000, 0x10000, - s3_accel_read, s3_accel_read_w, s3_accel_read_l, - s3_accel_write, s3_accel_write_w, s3_accel_write_l, - NULL, MEM_MAPPING_EXTERNAL, s3); - mem_mapping_add(&s3->new_mmio_mapping, 0, 0, - s3_accel_read, s3_accel_read_w, s3_accel_read_l, - s3_accel_write, s3_accel_write_w, s3_accel_write_l, - NULL, MEM_MAPPING_EXTERNAL, s3); - mem_mapping_disable(&s3->mmio_mapping); - mem_mapping_disable(&s3->new_mmio_mapping); + mem_mapping_add(&s3->linear_mapping, 0, 0, + svga_read_linear, svga_readw_linear, svga_readl_linear, + svga_write_linear, svga_writew_linear, svga_writel_linear, + NULL, MEM_MAPPING_EXTERNAL, &s3->svga); + /*It's hardcoded to 0xa0000 before the Trio64V+ and expects so*/ + if (chip >= S3_TRIO64V) + mem_mapping_add(&s3->mmio_mapping, 0, 0, + s3_accel_read, s3_accel_read_w, s3_accel_read_l, + s3_accel_write, s3_accel_write_w, s3_accel_write_l, + NULL, MEM_MAPPING_EXTERNAL, s3); + else + mem_mapping_add(&s3->mmio_mapping, 0xa0000, 0x10000, + s3_accel_read, s3_accel_read_w, s3_accel_read_l, + s3_accel_write, s3_accel_write_w, s3_accel_write_l, + NULL, MEM_MAPPING_EXTERNAL, s3); + mem_mapping_add(&s3->new_mmio_mapping, 0, 0, + s3_accel_read, s3_accel_read_w, s3_accel_read_l, + s3_accel_write, s3_accel_write_w, s3_accel_write_l, + NULL, MEM_MAPPING_EXTERNAL, s3); + mem_mapping_disable(&s3->mmio_mapping); + mem_mapping_disable(&s3->new_mmio_mapping); - if (chip == S3_VISION964 || chip == S3_VISION968) - svga_init(info, &s3->svga, s3, vram_size, - s3_recalctimings, - s3_in, s3_out, - NULL, - NULL); - else { - if (chip >= S3_TRIO64V) { - svga_init(info, svga, s3, vram_size, - s3_trio64v_recalctimings, - s3_in, s3_out, - s3_hwcursor_draw, - s3_trio64v_overlay_draw); - } else { - svga_init(info, svga, s3, vram_size, - s3_recalctimings, - s3_in, s3_out, - s3_hwcursor_draw, - NULL); - } - } + if (chip == S3_VISION964 || chip == S3_VISION968) + svga_init(info, &s3->svga, s3, vram_size, + s3_recalctimings, + s3_in, s3_out, + NULL, + NULL); + else { + if (chip >= S3_TRIO64V) { + svga_init(info, svga, s3, vram_size, + s3_trio64v_recalctimings, + s3_in, s3_out, + s3_hwcursor_draw, + s3_trio64v_overlay_draw); + } else { + svga_init(info, svga, s3, vram_size, + s3_recalctimings, + s3_in, s3_out, + s3_hwcursor_draw, + NULL); + } + } svga->hwcursor.cur_ysize = 64; - if (chip == S3_VISION964 && info->local != S3_ELSAWIN2KPROX_964) - svga->dac_hwcursor_draw = bt48x_hwcursor_draw; - else if ((chip == S3_VISION964 && info->local == S3_ELSAWIN2KPROX_964) || (chip == S3_VISION968 && (info->local == S3_ELSAWIN2KPROX || - info->local == S3_PHOENIX_VISION968 || info->local == S3_NUMBER9_9FX_771))) - svga->dac_hwcursor_draw = ibm_rgb528_hwcursor_draw; - else if (chip == S3_VISION968 && (info->local == S3_SPEA_MERCURY_P64V || info->local == S3_MIROVIDEO40SV_ERGO_968)) - svga->dac_hwcursor_draw = tvp3026_hwcursor_draw; + if (chip == S3_VISION964 && info->local != S3_ELSAWIN2KPROX_964) + svga->dac_hwcursor_draw = bt48x_hwcursor_draw; + else if ((chip == S3_VISION964 && info->local == S3_ELSAWIN2KPROX_964) || (chip == S3_VISION968 && (info->local == S3_ELSAWIN2KPROX || info->local == S3_PHOENIX_VISION968 || info->local == S3_NUMBER9_9FX_771))) + svga->dac_hwcursor_draw = ibm_rgb528_hwcursor_draw; + else if (chip == S3_VISION968 && (info->local == S3_SPEA_MERCURY_P64V || info->local == S3_MIROVIDEO40SV_ERGO_968)) + svga->dac_hwcursor_draw = tvp3026_hwcursor_draw; - if (chip >= S3_VISION964) { - switch (vram) { - case 0: /* 512 kB */ - svga->vram_mask = (1 << 19) - 1; - svga->vram_max = 2 << 20; - break; - case 1: /* 1 MB */ - /* VRAM in first MB, mirrored in 2nd MB, 3rd and 4th MBs are open bus. + if (chip >= S3_VISION964) { + switch (vram) { + case 0: /* 512 kB */ + svga->vram_mask = (1 << 19) - 1; + svga->vram_max = 2 << 20; + break; + case 1: /* 1 MB */ + /* VRAM in first MB, mirrored in 2nd MB, 3rd and 4th MBs are open bus. - This works with the #9 9FX BIOS, and matches how my real Trio64 behaves, - but does not work with the Phoenix EDO BIOS. Possibly an FPM/EDO difference? */ - svga->vram_mask = (1 << 20) - 1; - svga->vram_max = 2 << 20; - break; - case 2: - default: /*2 MB */ - /* VRAM in first 2 MB, 3rd and 4th MBs are open bus. */ - svga->vram_mask = (2 << 20) - 1; - svga->vram_max = 2 << 20; - break; - case 4: /*4MB*/ - svga->vram_mask = (4 << 20) - 1; - svga->vram_max = 4 << 20; - break; - case 8: /*8MB*/ - svga->vram_mask = (8 << 20) - 1; - svga->vram_max = 8 << 20; - break; - } - } + This works with the #9 9FX BIOS, and matches how my real Trio64 behaves, + but does not work with the Phoenix EDO BIOS. Possibly an FPM/EDO difference? */ + svga->vram_mask = (1 << 20) - 1; + svga->vram_max = 2 << 20; + break; + case 2: + default: /*2 MB */ + /* VRAM in first 2 MB, 3rd and 4th MBs are open bus. */ + svga->vram_mask = (2 << 20) - 1; + svga->vram_max = 2 << 20; + break; + case 4: /*4MB*/ + svga->vram_mask = (4 << 20) - 1; + svga->vram_max = 4 << 20; + break; + case 8: /*8MB*/ + svga->vram_mask = (8 << 20) - 1; + svga->vram_max = 8 << 20; + break; + } + } - if (s3->pci) - svga->crtc[0x36] = 2 | (3 << 2) | (1 << 4); - else if (s3->vlb) - svga->crtc[0x36] = 1 | (3 << 2) | (1 << 4); - else - svga->crtc[0x36] = 3 | (1 << 4); + if (s3->pci) + svga->crtc[0x36] = 2 | (3 << 2) | (1 << 4); + else if (s3->vlb) + svga->crtc[0x36] = 1 | (3 << 2) | (1 << 4); + else + svga->crtc[0x36] = 3 | (1 << 4); - if (chip >= S3_86C928) - svga->crtc[0x36] |= (vram_sizes[vram] << 5); - else { - svga->crtc[0x36] |= ((vram == 1) ? 0x00 : 0x20) | 0x98; - svga->crtc[0x41] = (vram == 1) ? 0x10 : 0x00; - } + if (chip >= S3_86C928) + svga->crtc[0x36] |= (vram_sizes[vram] << 5); + else { + svga->crtc[0x36] |= ((vram == 1) ? 0x00 : 0x20) | 0x98; + svga->crtc[0x41] = (vram == 1) ? 0x10 : 0x00; + } - svga->crtc[0x37] = 1 | (7 << 5); + svga->crtc[0x37] = 1 | (7 << 5); - if (chip >= S3_86C928) - svga->crtc[0x37] |= 0x04; + if (chip >= S3_86C928) + svga->crtc[0x37] |= 0x04; - svga->vblank_start = s3_vblank_start; + svga->vblank_start = s3_vblank_start; - s3_io_set(s3); + s3_io_set(s3); - s3->pci_regs[PCI_REG_COMMAND] = 7; + s3->pci_regs[PCI_REG_COMMAND] = 7; - s3->pci_regs[0x30] = 0x00; - s3->pci_regs[0x32] = 0x0c; - s3->pci_regs[0x33] = 0x00; + s3->pci_regs[0x30] = 0x00; + s3->pci_regs[0x32] = 0x0c; + s3->pci_regs[0x33] = 0x00; - s3->chip = chip; + s3->chip = chip; - s3->int_line = 0; + s3->int_line = 0; - s3->card_type = info->local; + s3->card_type = info->local; - svga->force_old_addr = 1; + svga->force_old_addr = 1; - switch(s3->card_type) { - case S3_ORCHID_86C911: - case S3_DIAMOND_STEALTH_VRAM: - svga->decode_mask = (1 << 20) - 1; - stepping = 0x81; /*86C911*/ - s3->id = stepping; - s3->id_ext = stepping; - s3->id_ext_pci = 0; - s3->packed_mmio = 0; - s3->width = 1024; + switch (s3->card_type) { + case S3_ORCHID_86C911: + case S3_DIAMOND_STEALTH_VRAM: + svga->decode_mask = (1 << 20) - 1; + stepping = 0x81; /*86C911*/ + s3->id = stepping; + s3->id_ext = stepping; + s3->id_ext_pci = 0; + s3->packed_mmio = 0; + s3->width = 1024; - svga->ramdac = device_add(&sc11483_ramdac_device); - svga->clock_gen = device_add(&av9194_device); - svga->getclock = av9194_getclock; - break; + svga->ramdac = device_add(&sc11483_ramdac_device); + svga->clock_gen = device_add(&av9194_device); + svga->getclock = av9194_getclock; + break; - case S3_AMI_86C924: - svga->decode_mask = (1 << 20) - 1; - stepping = 0x82; /*86C911A/86C924*/ - s3->id = stepping; - s3->id_ext = stepping; - s3->id_ext_pci = 0; - s3->packed_mmio = 0; - s3->width = 1024; + case S3_AMI_86C924: + svga->decode_mask = (1 << 20) - 1; + stepping = 0x82; /*86C911A/86C924*/ + s3->id = stepping; + s3->id_ext = stepping; + s3->id_ext_pci = 0; + s3->packed_mmio = 0; + s3->width = 1024; - svga->ramdac = device_add(&sc11487_ramdac_device); - svga->clock_gen = device_add(&ics2494an_305_device); - svga->getclock = ics2494_getclock; - break; + svga->ramdac = device_add(&sc11487_ramdac_device); + svga->clock_gen = device_add(&ics2494an_305_device); + svga->getclock = ics2494_getclock; + break; - case S3_MIROCRYSTAL8S_805: - case S3_MIROCRYSTAL10SD_805: - svga->decode_mask = (2 << 20) - 1; - stepping = 0xa0; /*86C801/86C805*/ - s3->id = stepping; - s3->id_ext = stepping; - s3->id_ext_pci = 0; - s3->packed_mmio = 0; - svga->crtc[0x5a] = 0x0a; + case S3_MIROCRYSTAL8S_805: + case S3_MIROCRYSTAL10SD_805: + svga->decode_mask = (2 << 20) - 1; + stepping = 0xa0; /*86C801/86C805*/ + s3->id = stepping; + s3->id_ext = stepping; + s3->id_ext_pci = 0; + s3->packed_mmio = 0; + svga->crtc[0x5a] = 0x0a; - svga->ramdac = device_add(&gendac_ramdac_device); - svga->clock_gen = svga->ramdac; - svga->getclock = sdac_getclock; - break; + svga->ramdac = device_add(&gendac_ramdac_device); + svga->clock_gen = svga->ramdac; + svga->getclock = sdac_getclock; + break; - case S3_SPEA_MIRAGE_86C801: - case S3_SPEA_MIRAGE_86C805: - svga->decode_mask = (2 << 20) - 1; - stepping = 0xa0; /*86C801/86C805*/ - s3->id = stepping; - s3->id_ext = stepping; - s3->id_ext_pci = 0; - s3->packed_mmio = 0; - svga->crtc[0x5a] = 0x0a; + case S3_SPEA_MIRAGE_86C801: + case S3_SPEA_MIRAGE_86C805: + svga->decode_mask = (2 << 20) - 1; + stepping = 0xa0; /*86C801/86C805*/ + s3->id = stepping; + s3->id_ext = stepping; + s3->id_ext_pci = 0; + s3->packed_mmio = 0; + svga->crtc[0x5a] = 0x0a; - svga->ramdac = device_add(&att490_ramdac_device); - svga->clock_gen = device_add(&av9194_device); - svga->getclock = av9194_getclock; - break; + svga->ramdac = device_add(&att490_ramdac_device); + svga->clock_gen = device_add(&av9194_device); + svga->getclock = av9194_getclock; + break; - case S3_86C805_ONBOARD: - svga->decode_mask = (2 << 20) - 1; - stepping = 0xa0; /*86C801/86C805*/ - s3->id = stepping; - s3->id_ext = stepping; - s3->id_ext_pci = 0; - s3->packed_mmio = 0; - svga->crtc[0x5a] = 0x0a; + case S3_86C805_ONBOARD: + svga->decode_mask = (2 << 20) - 1; + stepping = 0xa0; /*86C801/86C805*/ + s3->id = stepping; + s3->id_ext = stepping; + s3->id_ext_pci = 0; + s3->packed_mmio = 0; + svga->crtc[0x5a] = 0x0a; - svga->ramdac = device_add(&att490_ramdac_device); - svga->clock_gen = device_add(&av9194_device); - svga->getclock = av9194_getclock; - break; + svga->ramdac = device_add(&att490_ramdac_device); + svga->clock_gen = device_add(&av9194_device); + svga->getclock = av9194_getclock; + break; - case S3_PHOENIX_86C801: - case S3_PHOENIX_86C805: - svga->decode_mask = (2 << 20) - 1; - stepping = 0xa0; /*86C801/86C805*/ - s3->id = stepping; - s3->id_ext = stepping; - s3->id_ext_pci = 0; - s3->packed_mmio = 0; - svga->crtc[0x5a] = 0x0a; + case S3_PHOENIX_86C801: + case S3_PHOENIX_86C805: + svga->decode_mask = (2 << 20) - 1; + stepping = 0xa0; /*86C801/86C805*/ + s3->id = stepping; + s3->id_ext = stepping; + s3->id_ext_pci = 0; + s3->packed_mmio = 0; + svga->crtc[0x5a] = 0x0a; - svga->ramdac = device_add(&att492_ramdac_device); - svga->clock_gen = device_add(&av9194_device); - svga->getclock = av9194_getclock; - break; + svga->ramdac = device_add(&att492_ramdac_device); + svga->clock_gen = device_add(&av9194_device); + svga->getclock = av9194_getclock; + break; - case S3_METHEUS_86C928: - svga->decode_mask = (4 << 20) - 1; - stepping = 0x91; /*86C928*/ - s3->id = stepping; - s3->id_ext = stepping; - s3->id_ext_pci = 0; - s3->packed_mmio = 0; - svga->crtc[0x5a] = 0x0a; - svga->ramdac = device_add(&bt485_ramdac_device); - svga->clock_gen = device_add(&icd2061_device); - svga->getclock = icd2061_getclock; - break; + case S3_METHEUS_86C928: + svga->decode_mask = (4 << 20) - 1; + stepping = 0x91; /*86C928*/ + s3->id = stepping; + s3->id_ext = stepping; + s3->id_ext_pci = 0; + s3->packed_mmio = 0; + svga->crtc[0x5a] = 0x0a; + svga->ramdac = device_add(&bt485_ramdac_device); + svga->clock_gen = device_add(&icd2061_device); + svga->getclock = icd2061_getclock; + break; - case S3_SPEA_MERCURY_LITE_PCI: - svga->decode_mask = (4 << 20) - 1; - stepping = 0xb0; /*86C928PCI*/ - s3->id = stepping; - s3->id_ext = stepping; - s3->id_ext_pci = stepping; - s3->packed_mmio = 0; - svga->crtc[0x5a] = 0x0a; - svga->ramdac = device_add(&sc1502x_ramdac_device); - svga->clock_gen = device_add(&av9194_device); - svga->getclock = av9194_getclock; - break; + case S3_SPEA_MERCURY_LITE_PCI: + svga->decode_mask = (4 << 20) - 1; + stepping = 0xb0; /*86C928PCI*/ + s3->id = stepping; + s3->id_ext = stepping; + s3->id_ext_pci = stepping; + s3->packed_mmio = 0; + svga->crtc[0x5a] = 0x0a; + svga->ramdac = device_add(&sc1502x_ramdac_device); + svga->clock_gen = device_add(&av9194_device); + svga->getclock = av9194_getclock; + break; - case S3_PARADISE_BAHAMAS64: - case S3_PHOENIX_VISION864: - case S3_MIROCRYSTAL20SD_864: /*BIOS 3.xx has a SDAC ramdac.*/ - svga->decode_mask = (8 << 20) - 1; - if (info->local == S3_PARADISE_BAHAMAS64 || info->local == S3_MIROCRYSTAL20SD_864) - stepping = 0xc0; /*Vision864*/ - else - stepping = 0xc1; /*Vision864P*/ - s3->id = stepping; - s3->id_ext = s3->id_ext_pci = stepping; - s3->packed_mmio = 0; - svga->crtc[0x5a] = 0x0a; - svga->ramdac = device_add(&sdac_ramdac_device); - svga->clock_gen = svga->ramdac; - svga->getclock = sdac_getclock; - break; + case S3_PARADISE_BAHAMAS64: + case S3_PHOENIX_VISION864: + case S3_MIROCRYSTAL20SD_864: /*BIOS 3.xx has a SDAC ramdac.*/ + svga->decode_mask = (8 << 20) - 1; + if (info->local == S3_PARADISE_BAHAMAS64 || info->local == S3_MIROCRYSTAL20SD_864) + stepping = 0xc0; /*Vision864*/ + else + stepping = 0xc1; /*Vision864P*/ + s3->id = stepping; + s3->id_ext = s3->id_ext_pci = stepping; + s3->packed_mmio = 0; + svga->crtc[0x5a] = 0x0a; + svga->ramdac = device_add(&sdac_ramdac_device); + svga->clock_gen = svga->ramdac; + svga->getclock = sdac_getclock; + break; - case S3_DIAMOND_STEALTH64_964: - case S3_ELSAWIN2KPROX_964: - case S3_MIROCRYSTAL20SV_964: - svga->decode_mask = (8 << 20) - 1; - stepping = 0xd0; /*Vision964*/ - s3->id = stepping; - s3->id_ext = s3->id_ext_pci = stepping; - s3->packed_mmio = 1; - svga->crtc[0x5a] = 0x0a; + case S3_DIAMOND_STEALTH64_964: + case S3_ELSAWIN2KPROX_964: + case S3_MIROCRYSTAL20SV_964: + svga->decode_mask = (8 << 20) - 1; + stepping = 0xd0; /*Vision964*/ + s3->id = stepping; + s3->id_ext = s3->id_ext_pci = stepping; + s3->packed_mmio = 1; + svga->crtc[0x5a] = 0x0a; - if (info->local == S3_ELSAWIN2KPROX_964) - svga->ramdac = device_add(&ibm_rgb528_ramdac_device); - else - svga->ramdac = device_add(&bt485_ramdac_device); + if (info->local == S3_ELSAWIN2KPROX_964) + svga->ramdac = device_add(&ibm_rgb528_ramdac_device); + else + svga->ramdac = device_add(&bt485_ramdac_device); - svga->clock_gen = device_add(&icd2061_device); - svga->getclock = icd2061_getclock; - break; + svga->clock_gen = device_add(&icd2061_device); + svga->getclock = icd2061_getclock; + break; - case S3_ELSAWIN2KPROX: - case S3_SPEA_MERCURY_P64V: - case S3_MIROVIDEO40SV_ERGO_968: - case S3_NUMBER9_9FX_771: - case S3_PHOENIX_VISION968: - svga->decode_mask = (8 << 20) - 1; - s3->id = 0xe1; /*Vision968*/ - s3->id_ext = s3->id_ext_pci = 0xf0; - s3->packed_mmio = 1; - if (s3->pci) { - svga->crtc[0x53] = 0x18; - svga->crtc[0x58] = 0x10; - svga->crtc[0x59] = 0x70; - svga->crtc[0x5a] = 0x00; - svga->crtc[0x6c] = 1; - } else { - svga->crtc[0x53] = 0x00; - svga->crtc[0x59] = 0x00; - svga->crtc[0x5a] = 0x0a; - } + case S3_ELSAWIN2KPROX: + case S3_SPEA_MERCURY_P64V: + case S3_MIROVIDEO40SV_ERGO_968: + case S3_NUMBER9_9FX_771: + case S3_PHOENIX_VISION968: + svga->decode_mask = (8 << 20) - 1; + s3->id = 0xe1; /*Vision968*/ + s3->id_ext = s3->id_ext_pci = 0xf0; + s3->packed_mmio = 1; + if (s3->pci) { + svga->crtc[0x53] = 0x18; + svga->crtc[0x58] = 0x10; + svga->crtc[0x59] = 0x70; + svga->crtc[0x5a] = 0x00; + svga->crtc[0x6c] = 1; + } else { + svga->crtc[0x53] = 0x00; + svga->crtc[0x59] = 0x00; + svga->crtc[0x5a] = 0x0a; + } - if (info->local == S3_ELSAWIN2KPROX || info->local == S3_PHOENIX_VISION968 || - info->local == S3_NUMBER9_9FX_771) { - svga->ramdac = device_add(&ibm_rgb528_ramdac_device); - svga->clock_gen = device_add(&icd2061_device); - svga->getclock = icd2061_getclock; - } else { - svga->ramdac = device_add(&tvp3026_ramdac_device); - svga->clock_gen = svga->ramdac; - svga->getclock = tvp3026_getclock; - } - break; + if (info->local == S3_ELSAWIN2KPROX || info->local == S3_PHOENIX_VISION968 || info->local == S3_NUMBER9_9FX_771) { + svga->ramdac = device_add(&ibm_rgb528_ramdac_device); + svga->clock_gen = device_add(&icd2061_device); + svga->getclock = icd2061_getclock; + } else { + svga->ramdac = device_add(&tvp3026_ramdac_device); + svga->clock_gen = svga->ramdac; + svga->getclock = tvp3026_getclock; + } + break; - case S3_NUMBER9_9FX_531: - case S3_PHOENIX_VISION868: - svga->decode_mask = (8 << 20) - 1; - s3->id = 0xe1; /*Vision868*/ - s3->id_ext = 0x90; - s3->id_ext_pci = 0x80; - s3->packed_mmio = 1; - if (s3->pci) { - svga->crtc[0x53] = 0x18; - svga->crtc[0x58] = 0x10; - svga->crtc[0x59] = 0x70; - svga->crtc[0x5a] = 0x00; - svga->crtc[0x6c] = 1; - } else { - svga->crtc[0x53] = 0x00; - svga->crtc[0x59] = 0x00; - svga->crtc[0x5a] = 0x0a; - } + case S3_NUMBER9_9FX_531: + case S3_PHOENIX_VISION868: + svga->decode_mask = (8 << 20) - 1; + s3->id = 0xe1; /*Vision868*/ + s3->id_ext = 0x90; + s3->id_ext_pci = 0x80; + s3->packed_mmio = 1; + if (s3->pci) { + svga->crtc[0x53] = 0x18; + svga->crtc[0x58] = 0x10; + svga->crtc[0x59] = 0x70; + svga->crtc[0x5a] = 0x00; + svga->crtc[0x6c] = 1; + } else { + svga->crtc[0x53] = 0x00; + svga->crtc[0x59] = 0x00; + svga->crtc[0x5a] = 0x0a; + } - if (info->local == S3_NUMBER9_9FX_531) { - svga->ramdac = device_add(&att498_ramdac_device); - svga->clock_gen = device_add(&icd2061_device); - svga->getclock = icd2061_getclock; - } else { - svga->ramdac = device_add(&sdac_ramdac_device); - svga->clock_gen = svga->ramdac; - svga->getclock = sdac_getclock; - } - break; + if (info->local == S3_NUMBER9_9FX_531) { + svga->ramdac = device_add(&att498_ramdac_device); + svga->clock_gen = device_add(&icd2061_device); + svga->getclock = icd2061_getclock; + } else { + svga->ramdac = device_add(&sdac_ramdac_device); + svga->clock_gen = svga->ramdac; + svga->getclock = sdac_getclock; + } + break; - case S3_PHOENIX_TRIO32: - case S3_DIAMOND_STEALTH_SE: - svga->decode_mask = (4 << 20) - 1; - s3->id = 0xe1; /*Trio32*/ - s3->id_ext = 0x10; - s3->id_ext_pci = 0x11; - s3->packed_mmio = 1; + case S3_PHOENIX_TRIO32: + case S3_DIAMOND_STEALTH_SE: + svga->decode_mask = (4 << 20) - 1; + s3->id = 0xe1; /*Trio32*/ + s3->id_ext = 0x10; + s3->id_ext_pci = 0x11; + s3->packed_mmio = 1; - svga->clock_gen = s3; - svga->getclock = s3_trio64_getclock; - break; + svga->clock_gen = s3; + svga->getclock = s3_trio64_getclock; + break; - case S3_PHOENIX_TRIO64: - case S3_PHOENIX_TRIO64_ONBOARD: - case S3_PHOENIX_TRIO64VPLUS: - case S3_PHOENIX_TRIO64VPLUS_ONBOARD: - case S3_DIAMOND_STEALTH64_764: - case S3_SPEA_MIRAGE_P64: - if (device_get_config_int("memory") == 1) - svga->vram_max = 1 << 20; /* Phoenix BIOS does not expect VRAM to be mirrored. */ - /* Fall over. */ + case S3_PHOENIX_TRIO64: + case S3_PHOENIX_TRIO64_ONBOARD: + case S3_PHOENIX_TRIO64VPLUS: + case S3_PHOENIX_TRIO64VPLUS_ONBOARD: + case S3_DIAMOND_STEALTH64_764: + case S3_SPEA_MIRAGE_P64: + if (device_get_config_int("memory") == 1) + svga->vram_max = 1 << 20; /* Phoenix BIOS does not expect VRAM to be mirrored. */ + /* Fall over. */ - case S3_NUMBER9_9FX: - svga->decode_mask = (4 << 20) - 1; - s3->id = 0xe1; /*Trio64*/ - s3->id_ext = s3->id_ext_pci = 0x11; - s3->packed_mmio = 1; + case S3_NUMBER9_9FX: + svga->decode_mask = (4 << 20) - 1; + s3->id = 0xe1; /*Trio64*/ + s3->id_ext = s3->id_ext_pci = 0x11; + s3->packed_mmio = 1; - if (info->local == S3_PHOENIX_TRIO64VPLUS || info->local == S3_PHOENIX_TRIO64VPLUS_ONBOARD) { - svga->crtc[0x53] = 0x08; - } + if (info->local == S3_PHOENIX_TRIO64VPLUS || info->local == S3_PHOENIX_TRIO64VPLUS_ONBOARD) { + svga->crtc[0x53] = 0x08; + } - svga->clock_gen = s3; - svga->getclock = s3_trio64_getclock; - break; + svga->clock_gen = s3; + svga->getclock = s3_trio64_getclock; + break; - case S3_TRIO64V2_DX: - case S3_TRIO64V2_DX_ONBOARD: - svga->decode_mask = (4 << 20) - 1; - s3->id = 0xe1; /*Trio64V2*/ - s3->id_ext = s3->id_ext_pci = 0x01; - s3->packed_mmio = 1; - svga->crtc[0x53] = 0x08; - svga->crtc[0x59] = 0x70; - svga->crtc[0x5a] = 0x00; - svga->crtc[0x6c] = 1; - s3->pci_regs[0x05] = 0; - s3->pci_regs[0x06] = 0; - s3->pci_regs[0x07] = 2; - s3->pci_regs[0x3d] = 1; - s3->pci_regs[0x3e] = 4; - s3->pci_regs[0x3f] = 0xff; + case S3_TRIO64V2_DX: + case S3_TRIO64V2_DX_ONBOARD: + svga->decode_mask = (4 << 20) - 1; + s3->id = 0xe1; /*Trio64V2*/ + s3->id_ext = s3->id_ext_pci = 0x01; + s3->packed_mmio = 1; + svga->crtc[0x53] = 0x08; + svga->crtc[0x59] = 0x70; + svga->crtc[0x5a] = 0x00; + svga->crtc[0x6c] = 1; + s3->pci_regs[0x05] = 0; + s3->pci_regs[0x06] = 0; + s3->pci_regs[0x07] = 2; + s3->pci_regs[0x3d] = 1; + s3->pci_regs[0x3e] = 4; + s3->pci_regs[0x3f] = 0xff; - svga->clock_gen = s3; - svga->getclock = s3_trio64_getclock; - break; + svga->clock_gen = s3; + svga->getclock = s3_trio64_getclock; + break; - default: - return NULL; - } + default: + return NULL; + } - if (s3->pci) - s3->card = pci_add_card(PCI_ADD_VIDEO, s3_pci_read, s3_pci_write, s3); + if (s3->pci) + s3->card = pci_add_card(PCI_ADD_VIDEO, s3_pci_read, s3_pci_write, s3); - s3->i2c = i2c_gpio_init("ddc_s3"); - s3->ddc = ddc_init(i2c_gpio_get_bus(s3->i2c)); + s3->i2c = i2c_gpio_init("ddc_s3"); + s3->ddc = ddc_init(i2c_gpio_get_bus(s3->i2c)); - s3->wake_fifo_thread = thread_create_event(); - s3->fifo_not_full_event = thread_create_event(); - s3->fifo_thread_run = 1; - s3->fifo_thread = thread_create(fifo_thread, s3); + s3->wake_fifo_thread = thread_create_event(); + s3->fifo_not_full_event = thread_create_event(); + s3->fifo_thread_run = 1; + s3->fifo_thread = thread_create(fifo_thread, s3); - return s3; + return s3; } -static int s3_orchid_86c911_available(void) +static int +s3_orchid_86c911_available(void) { - return rom_present(ROM_ORCHID_86C911); + return rom_present(ROM_ORCHID_86C911); } -static int s3_diamond_stealth_vram_available(void) +static int +s3_diamond_stealth_vram_available(void) { - return rom_present(ROM_DIAMOND_STEALTH_VRAM); + return rom_present(ROM_DIAMOND_STEALTH_VRAM); } -static int s3_ami_86c924_available(void) +static int +s3_ami_86c924_available(void) { - return rom_present(ROM_AMI_86C924); + return rom_present(ROM_AMI_86C924); } -static int s3_spea_mirage_86c801_available(void) +static int +s3_spea_mirage_86c801_available(void) { - return rom_present(ROM_SPEA_MIRAGE_86C801); + return rom_present(ROM_SPEA_MIRAGE_86C801); } -static int s3_spea_mirage_86c805_available(void) +static int +s3_spea_mirage_86c805_available(void) { - return rom_present(ROM_SPEA_MIRAGE_86C805); + return rom_present(ROM_SPEA_MIRAGE_86C805); } -static int s3_phoenix_86c80x_available(void) +static int +s3_phoenix_86c80x_available(void) { - return rom_present(ROM_PHOENIX_86C80X); + return rom_present(ROM_PHOENIX_86C80X); } -static int s3_mirocrystal_8s_805_available(void) +static int +s3_mirocrystal_8s_805_available(void) { - return rom_present(ROM_MIROCRYSTAL8S_805); + return rom_present(ROM_MIROCRYSTAL8S_805); } -static int s3_mirocrystal_10sd_805_available(void) +static int +s3_mirocrystal_10sd_805_available(void) { - return rom_present(ROM_MIROCRYSTAL10SD_805); + return rom_present(ROM_MIROCRYSTAL10SD_805); } -static int s3_metheus_86c928_available(void) +static int +s3_metheus_86c928_available(void) { - return rom_present(ROM_METHEUS_86C928); + return rom_present(ROM_METHEUS_86C928); } -static int s3_spea_mercury_lite_pci_available(void) +static int +s3_spea_mercury_lite_pci_available(void) { - return rom_present(ROM_SPEA_MERCURY_LITE_PCI); + return rom_present(ROM_SPEA_MERCURY_LITE_PCI); } -static int s3_bahamas64_available(void) +static int +s3_bahamas64_available(void) { - return rom_present(ROM_PARADISE_BAHAMAS64); + return rom_present(ROM_PARADISE_BAHAMAS64); } -static int s3_phoenix_vision864_available(void) +static int +s3_phoenix_vision864_available(void) { - return rom_present(ROM_PHOENIX_VISION864); + return rom_present(ROM_PHOENIX_VISION864); } -static int s3_9fx_531_available(void) +static int +s3_9fx_531_available(void) { - return rom_present(ROM_NUMBER9_9FX_531); + return rom_present(ROM_NUMBER9_9FX_531); } -static int s3_phoenix_vision868_available(void) +static int +s3_phoenix_vision868_available(void) { - return rom_present(ROM_PHOENIX_VISION868); + return rom_present(ROM_PHOENIX_VISION868); } -static int s3_mirocrystal_20sv_964_vlb_available(void) +static int +s3_mirocrystal_20sv_964_vlb_available(void) { - return rom_present(ROM_MIROCRYSTAL20SV_964_VLB); + return rom_present(ROM_MIROCRYSTAL20SV_964_VLB); } -static int s3_mirocrystal_20sv_964_pci_available(void) +static int +s3_mirocrystal_20sv_964_pci_available(void) { - return rom_present(ROM_MIROCRYSTAL20SV_964_PCI); + return rom_present(ROM_MIROCRYSTAL20SV_964_PCI); } -static int s3_diamond_stealth64_964_available(void) +static int +s3_diamond_stealth64_964_available(void) { - return rom_present(ROM_DIAMOND_STEALTH64_964); + return rom_present(ROM_DIAMOND_STEALTH64_964); } -static int s3_mirovideo_40sv_ergo_968_pci_available(void) +static int +s3_mirovideo_40sv_ergo_968_pci_available(void) { - return rom_present(ROM_MIROVIDEO40SV_ERGO_968_PCI); + return rom_present(ROM_MIROVIDEO40SV_ERGO_968_PCI); } -static int s3_9fx_771_available(void) +static int +s3_9fx_771_available(void) { - return rom_present(ROM_NUMBER9_9FX_771); + return rom_present(ROM_NUMBER9_9FX_771); } -static int s3_phoenix_vision968_available(void) +static int +s3_phoenix_vision968_available(void) { - return rom_present(ROM_PHOENIX_VISION968); + return rom_present(ROM_PHOENIX_VISION968); } -static int s3_mirocrystal_20sd_864_vlb_available(void) +static int +s3_mirocrystal_20sd_864_vlb_available(void) { - return rom_present(ROM_MIROCRYSTAL20SD_864_VLB); + return rom_present(ROM_MIROCRYSTAL20SD_864_VLB); } -static int s3_spea_mercury_p64v_pci_available(void) +static int +s3_spea_mercury_p64v_pci_available(void) { - return rom_present(ROM_SPEA_MERCURY_P64V); + return rom_present(ROM_SPEA_MERCURY_P64V); } -static int s3_elsa_winner2000_pro_x_964_available(void) +static int +s3_elsa_winner2000_pro_x_964_available(void) { - return rom_present(ROM_ELSAWIN2KPROX_964); + return rom_present(ROM_ELSAWIN2KPROX_964); } -static int s3_elsa_winner2000_pro_x_available(void) +static int +s3_elsa_winner2000_pro_x_available(void) { - return rom_present(ROM_ELSAWIN2KPROX); + return rom_present(ROM_ELSAWIN2KPROX); } -static int s3_phoenix_trio32_available(void) +static int +s3_phoenix_trio32_available(void) { - return rom_present(ROM_PHOENIX_TRIO32); + return rom_present(ROM_PHOENIX_TRIO32); } -static int s3_diamond_stealth_se_available(void) +static int +s3_diamond_stealth_se_available(void) { - return rom_present(ROM_DIAMOND_STEALTH_SE); + return rom_present(ROM_DIAMOND_STEALTH_SE); } -static int s3_9fx_available(void) +static int +s3_9fx_available(void) { - return rom_present(ROM_NUMBER9_9FX); + return rom_present(ROM_NUMBER9_9FX); } -static int s3_spea_mirage_p64_vlb_available(void) +static int +s3_spea_mirage_p64_vlb_available(void) { - return rom_present(ROM_SPEA_MIRAGE_P64); + return rom_present(ROM_SPEA_MIRAGE_P64); } -static int s3_phoenix_trio64_available(void) +static int +s3_phoenix_trio64_available(void) { - return rom_present(ROM_PHOENIX_TRIO64); + return rom_present(ROM_PHOENIX_TRIO64); } -static int s3_phoenix_trio64vplus_available(void) +static int +s3_phoenix_trio64vplus_available(void) { - return rom_present(ROM_PHOENIX_TRIO64VPLUS); + return rom_present(ROM_PHOENIX_TRIO64VPLUS); } -static int s3_diamond_stealth64_764_available(void) +static int +s3_diamond_stealth64_764_available(void) { - return rom_present(ROM_DIAMOND_STEALTH64_764); + return rom_present(ROM_DIAMOND_STEALTH64_764); } -static int s3_trio64v2_dx_available(void) +static int +s3_trio64v2_dx_available(void) { - return rom_present(ROM_TRIO64V2_DX_VBE20); + return rom_present(ROM_TRIO64V2_DX_VBE20); } -static void s3_close(void *p) +static void +s3_close(void *p) { - s3_t *s3 = (s3_t *)p; + s3_t *s3 = (s3_t *) p; - s3->fifo_thread_run = 0; - thread_set_event(s3->wake_fifo_thread); - thread_wait(s3->fifo_thread); - thread_destroy_event(s3->fifo_not_full_event); - thread_destroy_event(s3->wake_fifo_thread); + s3->fifo_thread_run = 0; + thread_set_event(s3->wake_fifo_thread); + thread_wait(s3->fifo_thread); + thread_destroy_event(s3->fifo_not_full_event); + thread_destroy_event(s3->wake_fifo_thread); - svga_close(&s3->svga); + svga_close(&s3->svga); - ddc_close(s3->ddc); - i2c_gpio_close(s3->i2c); + ddc_close(s3->ddc); + i2c_gpio_close(s3->i2c); - free(s3); + free(s3); } -static void s3_speed_changed(void *p) +static void +s3_speed_changed(void *p) { - s3_t *s3 = (s3_t *)p; + s3_t *s3 = (s3_t *) p; - svga_recalctimings(&s3->svga); + svga_recalctimings(&s3->svga); } -static void s3_force_redraw(void *p) +static void +s3_force_redraw(void *p) { - s3_t *s3 = (s3_t *)p; + s3_t *s3 = (s3_t *) p; - s3->svga.fullchange = changeframecount; + s3->svga.fullchange = changeframecount; } static const device_config_t s3_orchid_86c911_config[] = { - { - .name = "memory", - .description = "Memory size", - .type = CONFIG_SELECTION, - .default_int = 1, - .selection = { - { - .description = "512 KB", - .value = 0 - }, - { - .description = "1 MB", - .value = 1 - }, - { - .description = "" - } - } - }, - { - .type = CONFIG_END - } + {.name = "memory", + .description = "Memory size", + .type = CONFIG_SELECTION, + .default_int = 1, + .selection = { + { .description = "512 KB", + .value = 0 }, + { .description = "1 MB", + .value = 1 }, + { .description = "" } } }, + { .type = CONFIG_END} }; static const device_config_t s3_9fx_config[] = { - { - .name = "memory", - .description = "Memory size", - .type = CONFIG_SELECTION, - .default_int = 2, - .selection = { - { - .description = "1 MB", - .value = 1 - }, - { - .description = "2 MB", - .value = 2 - }, + {.name = "memory", + .description = "Memory size", + .type = CONFIG_SELECTION, + .default_int = 2, + .selection = { + { .description = "1 MB", + .value = 1 }, + { .description = "2 MB", + .value = 2 }, /*Trio64 also supports 4 MB, however the Number Nine BIOS does not*/ { - .description = "" - } - } - }, - { - .type = CONFIG_END - } + .description = "" } } }, + { .type = CONFIG_END} }; static const device_config_t s3_phoenix_trio32_config[] = { - { - .name = "memory", - .description = "Memory size", - .type = CONFIG_SELECTION, - .default_int = 2, - .selection = { - { - .description = "512 KB", - .value = 0 - }, - { - .description = "1 MB", - .value = 1 - }, - { - .description = "2 MB", - .value = 2 - }, - { - .description = "" - } - } - }, - { - .type = CONFIG_END - } + {.name = "memory", + .description = "Memory size", + .type = CONFIG_SELECTION, + .default_int = 2, + .selection = { + { .description = "512 KB", + .value = 0 }, + { .description = "1 MB", + .value = 1 }, + { .description = "2 MB", + .value = 2 }, + { .description = "" } } }, + { .type = CONFIG_END} }; static const device_config_t s3_standard_config[] = { - { - .name = "memory", - .description = "Memory size", - .type = CONFIG_SELECTION, - .default_int = 4, - .selection = { - { - .description = "1 MB", - .value = 1 - }, - { - .description = "2 MB", - .value = 2 - }, - { - .description = "4 MB", - .value = 4 - }, - { - .description = "" - } - } - }, - { - .type = CONFIG_END - } + {.name = "memory", + .description = "Memory size", + .type = CONFIG_SELECTION, + .default_int = 4, + .selection = { + { .description = "1 MB", + .value = 1 }, + { .description = "2 MB", + .value = 2 }, + { .description = "4 MB", + .value = 4 }, + { .description = "" } } }, + { .type = CONFIG_END} }; static const device_config_t s3_968_config[] = { - { - .name = "memory", - .description = "Memory size", - .type = CONFIG_SELECTION, - .default_int = 4, - .selection = { - { - .description = "1 MB", - .value = 1 - }, - { - .description = "2 MB", - .value = 2 - }, - { - .description = "4 MB", - .value = 4 - }, - { - .description = "8 MB", - .value = 8 - }, - { - .description = "" - } - } - }, - { - .type = CONFIG_END - } + {.name = "memory", + .description = "Memory size", + .type = CONFIG_SELECTION, + .default_int = 4, + .selection = { + { .description = "1 MB", + .value = 1 }, + { .description = "2 MB", + .value = 2 }, + { .description = "4 MB", + .value = 4 }, + { .description = "8 MB", + .value = 8 }, + { .description = "" } } }, + { .type = CONFIG_END} }; const device_t s3_orchid_86c911_isa_device = { - .name = "S3 86c911 ISA (Orchid Fahrenheit 1280)", + .name = "S3 86c911 ISA (Orchid Fahrenheit 1280)", .internal_name = "orchid_s3_911", - .flags = DEVICE_AT | DEVICE_ISA, - .local = S3_ORCHID_86C911, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = S3_ORCHID_86C911, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_orchid_86c911_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_orchid_86c911_config + .force_redraw = s3_force_redraw, + .config = s3_orchid_86c911_config }; const device_t s3_diamond_stealth_vram_isa_device = { - .name = "S3 86c911 ISA (Diamond Stealth VRAM)", + .name = "S3 86c911 ISA (Diamond Stealth VRAM)", .internal_name = "stealthvram_isa", - .flags = DEVICE_AT | DEVICE_ISA, - .local = S3_DIAMOND_STEALTH_VRAM, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = S3_DIAMOND_STEALTH_VRAM, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_diamond_stealth_vram_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_orchid_86c911_config + .force_redraw = s3_force_redraw, + .config = s3_orchid_86c911_config }; const device_t s3_ami_86c924_isa_device = { - .name = "S3 86c924 ISA (AMI)", + .name = "S3 86c924 ISA (AMI)", .internal_name = "ami_s3_924", - .flags = DEVICE_AT | DEVICE_ISA, - .local = S3_AMI_86C924, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = S3_AMI_86C924, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_ami_86c924_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_orchid_86c911_config + .force_redraw = s3_force_redraw, + .config = s3_orchid_86c911_config }; const device_t s3_spea_mirage_86c801_isa_device = { - .name = "S3 86c801 ISA (SPEA Mirage ISA)", + .name = "S3 86c801 ISA (SPEA Mirage ISA)", .internal_name = "px_s3_v7_801_isa", - .flags = DEVICE_AT | DEVICE_ISA, - .local = S3_SPEA_MIRAGE_86C801, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = S3_SPEA_MIRAGE_86C801, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_spea_mirage_86c801_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_86c805_onboard_vlb_device = { - .name = "S3 86c805 VLB On-Board", + .name = "S3 86c805 VLB On-Board", .internal_name = "px_s3_805_onboard_vlb", - .flags = DEVICE_VLB, - .local = S3_86C805_ONBOARD, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_86C805_ONBOARD, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = NULL }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_spea_mirage_86c805_vlb_device = { - .name = "S3 86c805 VLB (SPEA Mirage VL)", + .name = "S3 86c805 VLB (SPEA Mirage VL)", .internal_name = "px_s3_v7_805_vlb", - .flags = DEVICE_VLB, - .local = S3_SPEA_MIRAGE_86C805, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_SPEA_MIRAGE_86C805, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_spea_mirage_86c805_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_mirocrystal_8s_805_vlb_device = { - .name = "S3 86c805 VLB (MiroCRYSTAL 8S)", + .name = "S3 86c805 VLB (MiroCRYSTAL 8S)", .internal_name = "mirocrystal8s_vlb", - .flags = DEVICE_VLB, - .local = S3_MIROCRYSTAL8S_805, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_MIROCRYSTAL8S_805, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_mirocrystal_8s_805_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_mirocrystal_10sd_805_vlb_device = { - .name = "S3 86c805 VLB (MiroCRYSTAL 10SD)", + .name = "S3 86c805 VLB (MiroCRYSTAL 10SD)", .internal_name = "mirocrystal10sd_vlb", - .flags = DEVICE_VLB, - .local = S3_MIROCRYSTAL10SD_805, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_MIROCRYSTAL10SD_805, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_mirocrystal_10sd_805_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_phoenix_86c801_isa_device = { - .name = "S3 86c801 ISA (Phoenix)", + .name = "S3 86c801 ISA (Phoenix)", .internal_name = "px_86c801_isa", - .flags = DEVICE_AT | DEVICE_ISA, - .local = S3_PHOENIX_86C801, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = S3_PHOENIX_86C801, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_phoenix_86c80x_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_phoenix_86c805_vlb_device = { - .name = "S3 86c805 VLB (Phoenix)", + .name = "S3 86c805 VLB (Phoenix)", .internal_name = "px_86c805_vlb", - .flags = DEVICE_VLB, - .local = S3_PHOENIX_86C805, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_PHOENIX_86C805, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_phoenix_86c80x_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_metheus_86c928_isa_device = { - .name = "S3 86c928 ISA (Metheus Premier 928)", + .name = "S3 86c928 ISA (Metheus Premier 928)", .internal_name = "metheus928_isa", - .flags = DEVICE_AT | DEVICE_ISA, - .local = S3_METHEUS_86C928, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_AT | DEVICE_ISA, + .local = S3_METHEUS_86C928, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_metheus_86c928_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_metheus_86c928_vlb_device = { - .name = "S3 86c928 VLB (Metheus Premier 928)", + .name = "S3 86c928 VLB (Metheus Premier 928)", .internal_name = "metheus928_vlb", - .flags = DEVICE_VLB, - .local = S3_METHEUS_86C928, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_METHEUS_86C928, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_metheus_86c928_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_spea_mercury_lite_86c928_pci_device = { - .name = "S3 86c928 PCI (SPEA Mercury Lite)", + .name = "S3 86c928 PCI (SPEA Mercury Lite)", .internal_name = "spea_mercurylite_pci", - .flags = DEVICE_PCI, - .local = S3_SPEA_MERCURY_LITE_PCI, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_SPEA_MERCURY_LITE_PCI, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_spea_mercury_lite_pci_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_mirocrystal_20sd_864_vlb_device = { - .name = "S3 Vision864 VLB (MiroCRYSTAL 20SD)", + .name = "S3 Vision864 VLB (MiroCRYSTAL 20SD)", .internal_name = "mirocrystal20sd_vlb", - .flags = DEVICE_VLB, - .local = S3_MIROCRYSTAL20SD_864, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_MIROCRYSTAL20SD_864, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_mirocrystal_20sd_864_vlb_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_bahamas64_vlb_device = { - .name = "S3 Vision864 VLB (Paradise Bahamas 64)", + .name = "S3 Vision864 VLB (Paradise Bahamas 64)", .internal_name = "bahamas64_vlb", - .flags = DEVICE_VLB, - .local = S3_PARADISE_BAHAMAS64, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_PARADISE_BAHAMAS64, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_bahamas64_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_bahamas64_pci_device = { - .name = "S3 Vision864 PCI (Paradise Bahamas 64)", + .name = "S3 Vision864 PCI (Paradise Bahamas 64)", .internal_name = "bahamas64_pci", - .flags = DEVICE_PCI, - .local = S3_PARADISE_BAHAMAS64, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_PARADISE_BAHAMAS64, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_bahamas64_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_mirocrystal_20sv_964_vlb_device = { - .name = "S3 Vision964 VLB (MiroCRYSTAL 20SV)", + .name = "S3 Vision964 VLB (MiroCRYSTAL 20SV)", .internal_name = "mirocrystal20sv_vlb", - .flags = DEVICE_VLB, - .local = S3_MIROCRYSTAL20SV_964, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_MIROCRYSTAL20SV_964, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_mirocrystal_20sv_964_vlb_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_mirocrystal_20sv_964_pci_device = { - .name = "S3 Vision964 PCI (MiroCRYSTAL 20SV)", + .name = "S3 Vision964 PCI (MiroCRYSTAL 20SV)", .internal_name = "mirocrystal20sv_pci", - .flags = DEVICE_PCI, - .local = S3_MIROCRYSTAL20SV_964, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_MIROCRYSTAL20SV_964, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_mirocrystal_20sv_964_pci_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_diamond_stealth64_964_vlb_device = { - .name = "S3 Vision964 VLB (Diamond Stealth64 VRAM)", + .name = "S3 Vision964 VLB (Diamond Stealth64 VRAM)", .internal_name = "stealth64v_vlb", - .flags = DEVICE_VLB, - .local = S3_DIAMOND_STEALTH64_964, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_DIAMOND_STEALTH64_964, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_diamond_stealth64_964_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_diamond_stealth64_964_pci_device = { - .name = "S3 Vision964 PCI (Diamond Stealth64 VRAM)", + .name = "S3 Vision964 PCI (Diamond Stealth64 VRAM)", .internal_name = "stealth64v_pci", - .flags = DEVICE_PCI, - .local = S3_DIAMOND_STEALTH64_964, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_DIAMOND_STEALTH64_964, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_diamond_stealth64_964_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_9fx_771_pci_device = { - .name = "S3 Vision968 PCI (Number 9 9FX 771)", + .name = "S3 Vision968 PCI (Number 9 9FX 771)", .internal_name = "n9_9fx_771_pci", - .flags = DEVICE_PCI, - .local = S3_NUMBER9_9FX_771, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_NUMBER9_9FX_771, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_9fx_771_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_phoenix_vision968_pci_device = { - .name = "S3 Vision968 PCI (Phoenix)", + .name = "S3 Vision968 PCI (Phoenix)", .internal_name = "px_vision968_pci", - .flags = DEVICE_PCI, - .local = S3_PHOENIX_VISION968, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_PHOENIX_VISION968, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_phoenix_vision968_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_phoenix_vision968_vlb_device = { - .name = "S3 Vision968 VLB (Phoenix)", + .name = "S3 Vision968 VLB (Phoenix)", .internal_name = "px_vision968_vlb", - .flags = DEVICE_VLB, - .local = S3_PHOENIX_VISION968, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_PHOENIX_VISION968, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_phoenix_vision968_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_mirovideo_40sv_ergo_968_pci_device = { - .name = "S3 Vision968 PCI (MiroVIDEO 40SV Ergo)", + .name = "S3 Vision968 PCI (MiroVIDEO 40SV Ergo)", .internal_name = "mirovideo40sv_pci", - .flags = DEVICE_PCI, - .local = S3_MIROVIDEO40SV_ERGO_968, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_MIROVIDEO40SV_ERGO_968, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_mirovideo_40sv_ergo_968_pci_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_spea_mercury_p64v_pci_device = { - .name = "S3 Vision968 PCI (SPEA Mercury P64V)", + .name = "S3 Vision968 PCI (SPEA Mercury P64V)", .internal_name = "spea_mercury64p_pci", - .flags = DEVICE_PCI, - .local = S3_SPEA_MERCURY_P64V, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_SPEA_MERCURY_P64V, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_spea_mercury_p64v_pci_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_9fx_vlb_device = { - .name = "S3 Trio64 VLB (Number 9 9FX 330)", + .name = "S3 Trio64 VLB (Number 9 9FX 330)", .internal_name = "n9_9fx_vlb", - .flags = DEVICE_VLB, - .local = S3_NUMBER9_9FX, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_NUMBER9_9FX, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_9fx_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_9fx_pci_device = { - .name = "S3 Trio64 PCI (Number 9 9FX 330)", + .name = "S3 Trio64 PCI (Number 9 9FX 330)", .internal_name = "n9_9fx_pci", - .flags = DEVICE_PCI, - .local = S3_NUMBER9_9FX, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_NUMBER9_9FX, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_9fx_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_phoenix_trio32_vlb_device = { - .name = "S3 Trio32 VLB (Phoenix)", + .name = "S3 Trio32 VLB (Phoenix)", .internal_name = "px_trio32_vlb", - .flags = DEVICE_VLB, - .local = S3_PHOENIX_TRIO32, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_PHOENIX_TRIO32, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_phoenix_trio32_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_phoenix_trio32_config + .force_redraw = s3_force_redraw, + .config = s3_phoenix_trio32_config }; const device_t s3_phoenix_trio32_pci_device = { - .name = "S3 Trio32 PCI (Phoenix)", + .name = "S3 Trio32 PCI (Phoenix)", .internal_name = "px_trio32_pci", - .flags = DEVICE_PCI, - .local = S3_PHOENIX_TRIO32, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_PHOENIX_TRIO32, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_phoenix_trio32_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_phoenix_trio32_config + .force_redraw = s3_force_redraw, + .config = s3_phoenix_trio32_config }; const device_t s3_diamond_stealth_se_vlb_device = { - .name = "S3 Trio32 VLB (Diamond Stealth SE)", + .name = "S3 Trio32 VLB (Diamond Stealth SE)", .internal_name = "stealthse_vlb", - .flags = DEVICE_VLB, - .local = S3_DIAMOND_STEALTH_SE, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_DIAMOND_STEALTH_SE, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_diamond_stealth_se_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_phoenix_trio32_config + .force_redraw = s3_force_redraw, + .config = s3_phoenix_trio32_config }; const device_t s3_diamond_stealth_se_pci_device = { - .name = "S3 Trio32 PCI (Diamond Stealth SE)", + .name = "S3 Trio32 PCI (Diamond Stealth SE)", .internal_name = "stealthse_pci", - .flags = DEVICE_PCI, - .local = S3_DIAMOND_STEALTH_SE, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_DIAMOND_STEALTH_SE, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_diamond_stealth_se_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_phoenix_trio32_config + .force_redraw = s3_force_redraw, + .config = s3_phoenix_trio32_config }; const device_t s3_phoenix_trio64_vlb_device = { - .name = "S3 Trio64 VLB (Phoenix)", + .name = "S3 Trio64 VLB (Phoenix)", .internal_name = "px_trio64_vlb", - .flags = DEVICE_VLB, - .local = S3_PHOENIX_TRIO64, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_PHOENIX_TRIO64, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_phoenix_trio64_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_phoenix_trio64_onboard_pci_device = { - .name = "S3 Trio64 PCI On-Board (Phoenix)", + .name = "S3 Trio64 PCI On-Board (Phoenix)", .internal_name = "px_trio64_onboard_pci", - .flags = DEVICE_PCI, - .local = S3_PHOENIX_TRIO64_ONBOARD, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_PHOENIX_TRIO64_ONBOARD, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = NULL }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_phoenix_trio64_pci_device = { - .name = "S3 Trio64 PCI (Phoenix)", + .name = "S3 Trio64 PCI (Phoenix)", .internal_name = "px_trio64_pci", - .flags = DEVICE_PCI, - .local = S3_PHOENIX_TRIO64, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_PHOENIX_TRIO64, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_phoenix_trio64_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_phoenix_trio64vplus_onboard_pci_device = { - .name = "S3 Trio64V+ PCI On-Board (Phoenix)", + .name = "S3 Trio64V+ PCI On-Board (Phoenix)", .internal_name = "px_trio64vplus_onboard_pci", - .flags = DEVICE_PCI, - .local = S3_PHOENIX_TRIO64VPLUS_ONBOARD, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_PHOENIX_TRIO64VPLUS_ONBOARD, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = NULL }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_phoenix_trio64vplus_pci_device = { - .name = "S3 Trio64V+ PCI (Phoenix)", + .name = "S3 Trio64V+ PCI (Phoenix)", .internal_name = "px_trio64vplus_pci", - .flags = DEVICE_PCI, - .local = S3_PHOENIX_TRIO64VPLUS, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_PHOENIX_TRIO64VPLUS, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_phoenix_trio64vplus_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_phoenix_vision864_vlb_device = { - .name = "S3 Vision864 VLB (Phoenix)", + .name = "S3 Vision864 VLB (Phoenix)", .internal_name = "px_vision864_vlb", - .flags = DEVICE_VLB, - .local = S3_PHOENIX_VISION864, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_PHOENIX_VISION864, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_phoenix_vision864_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_phoenix_vision864_pci_device = { - .name = "S3 Vision864 PCI (Phoenix)", + .name = "S3 Vision864 PCI (Phoenix)", .internal_name = "px_vision864_pci", - .flags = DEVICE_PCI, - .local = S3_PHOENIX_VISION864, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_PHOENIX_VISION864, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_phoenix_vision864_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_9fx_531_pci_device = { - .name = "S3 Vision868 PCI (Number 9 9FX 531)", + .name = "S3 Vision868 PCI (Number 9 9FX 531)", .internal_name = "n9_9fx_531_pci", - .flags = DEVICE_PCI, - .local = S3_NUMBER9_9FX_531, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_NUMBER9_9FX_531, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_9fx_531_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_phoenix_vision868_vlb_device = { - .name = "S3 Vision868 VLB (Phoenix)", + .name = "S3 Vision868 VLB (Phoenix)", .internal_name = "px_vision868_vlb", - .flags = DEVICE_VLB, - .local = S3_PHOENIX_VISION868, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_PHOENIX_VISION868, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_phoenix_vision868_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_phoenix_vision868_pci_device = { - .name = "S3 Vision868 PCI (Phoenix)", + .name = "S3 Vision868 PCI (Phoenix)", .internal_name = "px_vision868_pci", - .flags = DEVICE_PCI, - .local = S3_PHOENIX_VISION868, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_PHOENIX_VISION868, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_phoenix_vision868_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_diamond_stealth64_vlb_device = { - .name = "S3 Trio64 VLB (Diamond Stealth64 DRAM)", + .name = "S3 Trio64 VLB (Diamond Stealth64 DRAM)", .internal_name = "stealth64d_vlb", - .flags = DEVICE_VLB, - .local = S3_DIAMOND_STEALTH64_764, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_DIAMOND_STEALTH64_764, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_diamond_stealth64_764_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_diamond_stealth64_pci_device = { - .name = "S3 Trio64 PCI (Diamond Stealth64 DRAM)", + .name = "S3 Trio64 PCI (Diamond Stealth64 DRAM)", .internal_name = "stealth64d_pci", - .flags = DEVICE_PCI, - .local = S3_DIAMOND_STEALTH64_764, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_DIAMOND_STEALTH64_764, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_diamond_stealth64_764_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_spea_mirage_p64_vlb_device = { - .name = "S3 Trio64 VLB (SPEA Mirage P64)", + .name = "S3 Trio64 VLB (SPEA Mirage P64)", .internal_name = "spea_miragep64_vlb", - .flags = DEVICE_VLB, - .local = S3_SPEA_MIRAGE_P64, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_VLB, + .local = S3_SPEA_MIRAGE_P64, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_spea_mirage_p64_vlb_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_9fx_config + .force_redraw = s3_force_redraw, + .config = s3_9fx_config }; const device_t s3_elsa_winner2000_pro_x_964_pci_device = { - .name = "S3 Vision964 PCI (ELSA Winner 2000 Pro/X)", + .name = "S3 Vision964 PCI (ELSA Winner 2000 Pro/X)", .internal_name = "elsawin2kprox_964_pci", - .flags = DEVICE_PCI, - .local = S3_ELSAWIN2KPROX_964, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_ELSAWIN2KPROX_964, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_elsa_winner2000_pro_x_964_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_968_config + .force_redraw = s3_force_redraw, + .config = s3_968_config }; const device_t s3_elsa_winner2000_pro_x_pci_device = { - .name = "S3 Vision968 PCI (ELSA Winner 2000 Pro/X)", + .name = "S3 Vision968 PCI (ELSA Winner 2000 Pro/X)", .internal_name = "elsawin2kprox_pci", - .flags = DEVICE_PCI, - .local = S3_ELSAWIN2KPROX, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_ELSAWIN2KPROX, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_elsa_winner2000_pro_x_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_968_config + .force_redraw = s3_force_redraw, + .config = s3_968_config }; const device_t s3_trio64v2_dx_pci_device = { - .name = "S3 Trio64V2/DX PCI", + .name = "S3 Trio64V2/DX PCI", .internal_name = "trio64v2dx_pci", - .flags = DEVICE_PCI, - .local = S3_TRIO64V2_DX, - .init = s3_init, - .close = s3_close, - .reset = s3_reset, + .flags = DEVICE_PCI, + .local = S3_TRIO64V2_DX, + .init = s3_init, + .close = s3_close, + .reset = s3_reset, { .available = s3_trio64v2_dx_available }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; const device_t s3_trio64v2_dx_onboard_pci_device = { - .name = "S3 Trio64V2/DX On-Board PCI", + .name = "S3 Trio64V2/DX On-Board PCI", .internal_name = "trio64v2dx_onboard_pci", - .flags = DEVICE_PCI, - .local = S3_TRIO64V2_DX_ONBOARD, - .init = s3_init, - .close = s3_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = S3_TRIO64V2_DX_ONBOARD, + .init = s3_init, + .close = s3_close, + .reset = NULL, { .available = NULL }, .speed_changed = s3_speed_changed, - .force_redraw = s3_force_redraw, - .config = s3_standard_config + .force_redraw = s3_force_redraw, + .config = s3_standard_config }; diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c index 475269f93..d8a440f30 100644 --- a/src/video/vid_s3_virge.c +++ b/src/video/vid_s3_virge.c @@ -39,273 +39,266 @@ #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> - -static int dither[4][4] = -{ - {0, 4, 1, 5}, - {6, 2, 7, 3}, - {1, 5, 0, 4}, - {7, 3, 6, 2}, +static int dither[4][4] = { + {0, 4, 1, 5}, + { 6, 2, 7, 3}, + { 1, 5, 0, 4}, + { 7, 3, 6, 2}, }; -#define RB_SIZE 256 -#define RB_MASK (RB_SIZE - 1) +#define RB_SIZE 256 +#define RB_MASK (RB_SIZE - 1) -#define RB_ENTRIES (virge->s3d_write_idx - virge->s3d_read_idx) -#define RB_FULL (RB_ENTRIES == RB_SIZE) -#define RB_EMPTY (!RB_ENTRIES) +#define RB_ENTRIES (virge->s3d_write_idx - virge->s3d_read_idx) +#define RB_FULL (RB_ENTRIES == RB_SIZE) +#define RB_EMPTY (!RB_ENTRIES) -#define FIFO_SIZE 65536 -#define FIFO_MASK (FIFO_SIZE - 1) -#define FIFO_ENTRY_SIZE (1 << 31) +#define FIFO_SIZE 65536 +#define FIFO_MASK (FIFO_SIZE - 1) +#define FIFO_ENTRY_SIZE (1 << 31) -#define FIFO_ENTRIES (virge->fifo_write_idx - virge->fifo_read_idx) -#define FIFO_FULL ((virge->fifo_write_idx - virge->fifo_read_idx) >= (FIFO_SIZE - 4)) -#define FIFO_EMPTY (virge->fifo_read_idx == virge->fifo_write_idx) +#define FIFO_ENTRIES (virge->fifo_write_idx - virge->fifo_read_idx) +#define FIFO_FULL ((virge->fifo_write_idx - virge->fifo_read_idx) >= (FIFO_SIZE - 4)) +#define FIFO_EMPTY (virge->fifo_read_idx == virge->fifo_write_idx) -#define FIFO_TYPE 0xff000000 -#define FIFO_ADDR 0x00ffffff +#define FIFO_TYPE 0xff000000 +#define FIFO_ADDR 0x00ffffff -#define ROM_VIRGE_325 "roms/video/s3virge/86c325.bin" -#define ROM_DIAMOND_STEALTH3D_2000 "roms/video/s3virge/s3virge.bin" -#define ROM_DIAMOND_STEALTH3D_3000 "roms/video/s3virge/diamondstealth3000.vbi" -#define ROM_STB_VELOCITY_3D "roms/video/s3virge/stb_velocity3d_110.BIN" -#define ROM_VIRGE_DX "roms/video/s3virge/86c375_1.bin" -#define ROM_DIAMOND_STEALTH3D_2000PRO "roms/video/s3virge/virgedxdiamond.vbi" -#define ROM_VIRGE_GX "roms/video/s3virge/86c375_4.bin" -#define ROM_VIRGE_GX2 "roms/video/s3virge/flagpoint.VBI" -#define ROM_DIAMOND_STEALTH3D_4000 "roms/video/s3virge/86c357.bin" -#define ROM_TRIO3D2X "roms/video/s3virge/TRIO3D2X_8mbsdr.VBI" +#define ROM_VIRGE_325 "roms/video/s3virge/86c325.bin" +#define ROM_DIAMOND_STEALTH3D_2000 "roms/video/s3virge/s3virge.bin" +#define ROM_DIAMOND_STEALTH3D_3000 "roms/video/s3virge/diamondstealth3000.vbi" +#define ROM_STB_VELOCITY_3D "roms/video/s3virge/stb_velocity3d_110.BIN" +#define ROM_VIRGE_DX "roms/video/s3virge/86c375_1.bin" +#define ROM_DIAMOND_STEALTH3D_2000PRO "roms/video/s3virge/virgedxdiamond.vbi" +#define ROM_VIRGE_GX "roms/video/s3virge/86c375_4.bin" +#define ROM_VIRGE_GX2 "roms/video/s3virge/flagpoint.VBI" +#define ROM_DIAMOND_STEALTH3D_4000 "roms/video/s3virge/86c357.bin" +#define ROM_TRIO3D2X "roms/video/s3virge/TRIO3D2X_8mbsdr.VBI" -enum -{ - S3_VIRGE_325, - S3_DIAMOND_STEALTH3D_2000, - S3_DIAMOND_STEALTH3D_3000, - S3_STB_VELOCITY_3D, - S3_VIRGE_DX, - S3_DIAMOND_STEALTH3D_2000PRO, - S3_VIRGE_GX, - S3_VIRGE_GX2, - S3_DIAMOND_STEALTH3D_4000, - S3_TRIO_3D2X +enum { + S3_VIRGE_325, + S3_DIAMOND_STEALTH3D_2000, + S3_DIAMOND_STEALTH3D_3000, + S3_STB_VELOCITY_3D, + S3_VIRGE_DX, + S3_DIAMOND_STEALTH3D_2000PRO, + S3_VIRGE_GX, + S3_VIRGE_GX2, + S3_DIAMOND_STEALTH3D_4000, + S3_TRIO_3D2X }; -enum -{ - S3_VIRGE, - S3_VIRGEVX, - S3_VIRGEDX, - S3_VIRGEGX2, - S3_TRIO3D2X +enum { + S3_VIRGE, + S3_VIRGEVX, + S3_VIRGEDX, + S3_VIRGEGX2, + S3_TRIO3D2X }; -enum -{ - FIFO_INVALID = (0x00 << 24), - FIFO_WRITE_BYTE = (0x01 << 24), - FIFO_WRITE_WORD = (0x02 << 24), - FIFO_WRITE_DWORD = (0x03 << 24) +enum { + FIFO_INVALID = (0x00 << 24), + FIFO_WRITE_BYTE = (0x01 << 24), + FIFO_WRITE_WORD = (0x02 << 24), + FIFO_WRITE_DWORD = (0x03 << 24) }; typedef struct { - uint32_t addr_type; - uint32_t val; + uint32_t addr_type; + uint32_t val; } fifo_entry_t; -typedef struct s3d_t -{ - uint32_t cmd_set; - int clip_l, clip_r, clip_t, clip_b; +typedef struct s3d_t { + uint32_t cmd_set; + int clip_l, clip_r, clip_t, clip_b; - uint32_t dest_base; - uint32_t dest_str; + uint32_t dest_base; + uint32_t dest_str; - uint32_t z_base; - uint32_t z_str; + uint32_t z_base; + uint32_t z_str; - uint32_t tex_base; - uint32_t tex_bdr_clr; - uint32_t tbv, tbu; - int32_t TdVdX, TdUdX; - int32_t TdVdY, TdUdY; - uint32_t tus, tvs; + uint32_t tex_base; + uint32_t tex_bdr_clr; + uint32_t tbv, tbu; + int32_t TdVdX, TdUdX; + int32_t TdVdY, TdUdY; + uint32_t tus, tvs; - int32_t TdZdX, TdZdY; - uint32_t tzs; + int32_t TdZdX, TdZdY; + uint32_t tzs; - int32_t TdWdX, TdWdY; - uint32_t tws; + int32_t TdWdX, TdWdY; + uint32_t tws; - int32_t TdDdX, TdDdY; - uint32_t tds; + int32_t TdDdX, TdDdY; + uint32_t tds; - int16_t TdGdX, TdBdX, TdRdX, TdAdX; - int16_t TdGdY, TdBdY, TdRdY, TdAdY; - uint32_t tgs, tbs, trs, tas; + int16_t TdGdX, TdBdX, TdRdX, TdAdX; + int16_t TdGdY, TdBdY, TdRdY, TdAdY; + uint32_t tgs, tbs, trs, tas; - uint32_t TdXdY12; - uint32_t txend12; - uint32_t TdXdY01; - uint32_t txend01; - uint32_t TdXdY02; - uint32_t txs; - uint32_t tys; - int ty01, ty12, tlr; + uint32_t TdXdY12; + uint32_t txend12; + uint32_t TdXdY01; + uint32_t txend01; + uint32_t TdXdY02; + uint32_t txs; + uint32_t tys; + int ty01, ty12, tlr; - uint8_t fog_r, fog_g, fog_b; + uint8_t fog_r, fog_g, fog_b; } s3d_t; -typedef struct virge_t -{ - mem_mapping_t linear_mapping; - mem_mapping_t mmio_mapping; - mem_mapping_t new_mmio_mapping; +typedef struct virge_t { + mem_mapping_t linear_mapping; + mem_mapping_t mmio_mapping; + mem_mapping_t new_mmio_mapping; - rom_t bios_rom; + rom_t bios_rom; - svga_t svga; + svga_t svga; - uint8_t bank; - uint8_t ma_ext; - uint8_t reg6b, lfb_bios; + uint8_t bank; + uint8_t ma_ext; + uint8_t reg6b, lfb_bios; - uint8_t virge_id, virge_id_high, virge_id_low, virge_rev; + uint8_t virge_id, virge_id_high, virge_id_low, virge_rev; - uint8_t int_line; + uint8_t int_line; - uint32_t linear_base, linear_size; + uint32_t linear_base, linear_size; - uint8_t pci_regs[256]; - int card; + uint8_t pci_regs[256]; + int card; - int pci; - int chip; - int is_agp; + int pci; + int chip; + int is_agp; - int bilinear_enabled; - int dithering_enabled; - uint32_t memory_size; - uint32_t vram_mask; + int bilinear_enabled; + int dithering_enabled; + uint32_t memory_size; + uint32_t vram_mask; - thread_t *render_thread; - event_t *wake_render_thread; - event_t *wake_main_thread; - event_t *not_full_event; + thread_t *render_thread; + event_t *wake_render_thread; + event_t *wake_main_thread; + event_t *not_full_event; - uint32_t hwc_fg_col, hwc_bg_col; - int hwc_col_stack_pos; + uint32_t hwc_fg_col, hwc_bg_col; + int hwc_col_stack_pos; - struct - { - uint32_t src_base; - uint32_t dest_base; - int clip_l, clip_r, clip_t, clip_b; - int dest_str, src_str; - uint32_t mono_pat_0; - uint32_t mono_pat_1; - uint32_t pat_bg_clr; - uint32_t pat_fg_clr; - uint32_t src_bg_clr; - uint32_t src_fg_clr; - uint32_t cmd_set; - int r_width, r_height; - int rsrc_x, rsrc_y; - int rdest_x, rdest_y; + struct + { + uint32_t src_base; + uint32_t dest_base; + int clip_l, clip_r, clip_t, clip_b; + int dest_str, src_str; + uint32_t mono_pat_0; + uint32_t mono_pat_1; + uint32_t pat_bg_clr; + uint32_t pat_fg_clr; + uint32_t src_bg_clr; + uint32_t src_fg_clr; + uint32_t cmd_set; + int r_width, r_height; + int rsrc_x, rsrc_y; + int rdest_x, rdest_y; - int lxend0, lxend1; - int32_t ldx; - uint32_t lxstart, lystart; - int lycnt; - int line_dir; + int lxend0, lxend1; + int32_t ldx; + uint32_t lxstart, lystart; + int lycnt; + int line_dir; - int src_x, src_y; - int dest_x, dest_y; - int w, h; - uint8_t rop; + int src_x, src_y; + int dest_x, dest_y; + int w, h; + uint8_t rop; - int data_left_count; - uint32_t data_left; + int data_left_count; + uint32_t data_left; - uint32_t pattern_8[8*8]; - uint32_t pattern_16[8*8]; - uint32_t pattern_24[8*8]; - uint32_t pattern_32[8*8]; + uint32_t pattern_8[8 * 8]; + uint32_t pattern_16[8 * 8]; + uint32_t pattern_24[8 * 8]; + uint32_t pattern_32[8 * 8]; - uint32_t prdx; - uint32_t prxstart; - uint32_t pldx; - uint32_t plxstart; - uint32_t pystart; - uint32_t pycnt; - uint32_t dest_l, dest_r; - } s3d; + uint32_t prdx; + uint32_t prxstart; + uint32_t pldx; + uint32_t plxstart; + uint32_t pystart; + uint32_t pycnt; + uint32_t dest_l, dest_r; + } s3d; - s3d_t s3d_tri; + s3d_t s3d_tri; - s3d_t s3d_buffer[RB_SIZE]; - int s3d_read_idx, s3d_write_idx; - int s3d_busy; - int render_idx; + s3d_t s3d_buffer[RB_SIZE]; + int s3d_read_idx, s3d_write_idx; + int s3d_busy; + int render_idx; - struct - { - uint32_t pri_ctrl; - uint32_t chroma_ctrl; - uint32_t sec_ctrl; - uint32_t chroma_upper_bound; - uint32_t sec_filter; - uint32_t blend_ctrl; - uint32_t pri_fb0, pri_fb1; - uint32_t pri_stride; - uint32_t buffer_ctrl; - uint32_t sec_fb0, sec_fb1; - uint32_t sec_stride; - uint32_t overlay_ctrl; - int32_t k1_vert_scale; - int32_t k2_vert_scale; - int32_t dda_vert_accumulator; - int32_t k1_horiz_scale; - int32_t k2_horiz_scale; - int32_t dda_horiz_accumulator; - uint32_t fifo_ctrl; - uint32_t pri_start; - uint32_t pri_size; - uint32_t sec_start; - uint32_t sec_size; + struct + { + uint32_t pri_ctrl; + uint32_t chroma_ctrl; + uint32_t sec_ctrl; + uint32_t chroma_upper_bound; + uint32_t sec_filter; + uint32_t blend_ctrl; + uint32_t pri_fb0, pri_fb1; + uint32_t pri_stride; + uint32_t buffer_ctrl; + uint32_t sec_fb0, sec_fb1; + uint32_t sec_stride; + uint32_t overlay_ctrl; + int32_t k1_vert_scale; + int32_t k2_vert_scale; + int32_t dda_vert_accumulator; + int32_t k1_horiz_scale; + int32_t k2_horiz_scale; + int32_t dda_horiz_accumulator; + uint32_t fifo_ctrl; + uint32_t pri_start; + uint32_t pri_size; + uint32_t sec_start; + uint32_t sec_size; - int sdif; + int sdif; - int pri_x, pri_y, pri_w, pri_h; - int sec_x, sec_y, sec_w, sec_h; - } streams; + int pri_x, pri_y, pri_w, pri_h; + int sec_x, sec_y, sec_w, sec_h; + } streams; - uint8_t cmd_dma; - uint32_t cmd_dma_base; - uint32_t dma_ptr; - uint64_t blitter_time; - volatile int fifo_slot; + uint8_t cmd_dma; + uint32_t cmd_dma_base; + uint32_t dma_ptr; + uint64_t blitter_time; + volatile int fifo_slot; - pc_timer_t tri_timer; + pc_timer_t tri_timer; - int virge_busy, local; + int virge_busy, local; - uint8_t subsys_stat, subsys_cntl, advfunc_cntl; + uint8_t subsys_stat, subsys_cntl, advfunc_cntl; - uint8_t render_thread_run; + uint8_t render_thread_run; - uint8_t serialport; + uint8_t serialport; - void *i2c, *ddc; + void *i2c, *ddc; - int waiting; + int waiting; } virge_t; -static video_timings_t timing_diamond_stealth3d_2000_pci = {VIDEO_PCI, 2, 2, 3, 28, 28, 45}; -static video_timings_t timing_diamond_stealth3d_3000_pci = {VIDEO_PCI, 2, 2, 4, 26, 26, 42}; -static video_timings_t timing_virge_dx_pci = {VIDEO_PCI, 2, 2, 3, 28, 28, 45}; -static video_timings_t timing_virge_agp = {VIDEO_AGP, 2, 2, 3, 28, 28, 45}; +static video_timings_t timing_diamond_stealth3d_2000_pci = { .type = VIDEO_PCI, .write_b = 2, .write_w = 2, .write_l = 3, .read_b = 28, .read_w = 28, .read_l = 45 }; +static video_timings_t timing_diamond_stealth3d_3000_pci = { .type = VIDEO_PCI, .write_b = 2, .write_w = 2, .write_l = 4, .read_b = 26, .read_w = 26, .read_l = 42 }; +static video_timings_t timing_virge_dx_pci = { .type = VIDEO_PCI, .write_b = 2, .write_w = 2, .write_l = 3, .read_b = 28, .read_w = 28, .read_l = 45 }; +static video_timings_t timing_virge_agp = { .type = VIDEO_AGP, .write_b = 2, .write_w = 2, .write_l = 3, .read_b = 28, .read_w = 28, .read_l = 45 }; static void s3_virge_triangle(virge_t *virge, s3d_t *s3d_tri); @@ -321,34 +314,33 @@ static void s3_virge_mmio_write(uint32_t addr, uint8_t val, void *p); static void s3_virge_mmio_write_w(uint32_t addr, uint16_t val, void *p); static void s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *p); -enum -{ - CMD_SET_AE = 1, - CMD_SET_HC = (1 << 1), +enum { + CMD_SET_AE = 1, + CMD_SET_HC = (1 << 1), - CMD_SET_FORMAT_MASK = (7 << 2), - CMD_SET_FORMAT_8 = (0 << 2), - CMD_SET_FORMAT_16 = (1 << 2), - CMD_SET_FORMAT_24 = (2 << 2), + CMD_SET_FORMAT_MASK = (7 << 2), + CMD_SET_FORMAT_8 = (0 << 2), + CMD_SET_FORMAT_16 = (1 << 2), + CMD_SET_FORMAT_24 = (2 << 2), - CMD_SET_MS = (1 << 6), - CMD_SET_IDS = (1 << 7), - CMD_SET_MP = (1 << 8), - CMD_SET_TP = (1 << 9), + CMD_SET_MS = (1 << 6), + CMD_SET_IDS = (1 << 7), + CMD_SET_MP = (1 << 8), + CMD_SET_TP = (1 << 9), - CMD_SET_ITA_MASK = (3 << 10), - CMD_SET_ITA_BYTE = (0 << 10), - CMD_SET_ITA_WORD = (1 << 10), - CMD_SET_ITA_DWORD = (2 << 10), + CMD_SET_ITA_MASK = (3 << 10), + CMD_SET_ITA_BYTE = (0 << 10), + CMD_SET_ITA_WORD = (1 << 10), + CMD_SET_ITA_DWORD = (2 << 10), - CMD_SET_ZUP = (1 << 23), + CMD_SET_ZUP = (1 << 23), - CMD_SET_ZB_MODE = (3 << 24), + CMD_SET_ZB_MODE = (3 << 24), - CMD_SET_XP = (1 << 25), - CMD_SET_YP = (1 << 26), + CMD_SET_XP = (1 << 25), + CMD_SET_YP = (1 << 26), - CMD_SET_COMMAND_MASK = (15 << 27) + CMD_SET_COMMAND_MASK = (15 << 27) }; #define CMD_SET_FE (1 << 17) @@ -356,52 +348,48 @@ enum #define CMD_SET_ABC_ENABLE (1 << 19) #define CMD_SET_TWE (1 << 26) -enum -{ - CMD_SET_COMMAND_BITBLT = (0 << 27), - CMD_SET_COMMAND_RECTFILL = (2 << 27), - CMD_SET_COMMAND_LINE = (3 << 27), - CMD_SET_COMMAND_POLY = (5 << 27), - CMD_SET_COMMAND_NOP = (15 << 27) +enum { + CMD_SET_COMMAND_BITBLT = (0 << 27), + CMD_SET_COMMAND_RECTFILL = (2 << 27), + CMD_SET_COMMAND_LINE = (3 << 27), + CMD_SET_COMMAND_POLY = (5 << 27), + CMD_SET_COMMAND_NOP = (15 << 27) }; -#define INT_VSY (1 << 0) -#define INT_S3D_DONE (1 << 1) -#define INT_FIFO_OVF (1 << 2) -#define INT_FIFO_EMP (1 << 3) -#define INT_3DF_EMP (1 << 6) -#define INT_MASK 0xff +#define INT_VSY (1 << 0) +#define INT_S3D_DONE (1 << 1) +#define INT_FIFO_OVF (1 << 2) +#define INT_FIFO_EMP (1 << 3) +#define INT_3DF_EMP (1 << 6) +#define INT_MASK 0xff #define SERIAL_PORT_SCW (1 << 0) #define SERIAL_PORT_SDW (1 << 1) #define SERIAL_PORT_SCR (1 << 2) #define SERIAL_PORT_SDR (1 << 3) - #ifdef ENABLE_S3_VIRGE_LOG int s3_virge_do_log = ENABLE_S3_VIRGE_LOG; - static void s3_virge_log(const char *fmt, ...) { va_list ap; if (s3_virge_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define s3_virge_log(fmt, ...) +# define s3_virge_log(fmt, ...) #endif - static void s3_virge_tri_timer(void *p) { - virge_t *virge = (virge_t *)p; + virge_t *virge = (virge_t *) p; thread_set_event(virge->wake_render_thread); /*Wake up FIFO thread if moving from idle*/ } @@ -409,1893 +397,2052 @@ s3_virge_tri_timer(void *p) static void queue_triangle(virge_t *virge) { - if (RB_FULL) - { - thread_reset_event(virge->not_full_event); - thread_reset_event(virge->wake_main_thread); - if (RB_FULL) { - thread_wait_event(virge->not_full_event, -1); /*Wait for room in ringbuffer*/ - thread_wait_event(virge->wake_main_thread, -1); - } - } - virge->s3d_buffer[virge->s3d_write_idx & RB_MASK] = virge->s3d_tri; - virge->s3d_write_idx++; + if (RB_FULL) { + thread_reset_event(virge->not_full_event); + thread_reset_event(virge->wake_main_thread); + if (RB_FULL) { + thread_wait_event(virge->not_full_event, -1); /*Wait for room in ringbuffer*/ + thread_wait_event(virge->wake_main_thread, -1); + } + } + virge->s3d_buffer[virge->s3d_write_idx & RB_MASK] = virge->s3d_tri; + virge->s3d_write_idx++; - if (!virge->s3d_busy) { - if (!(timer_is_enabled(&virge->tri_timer))) - timer_set_delay_u64(&virge->tri_timer, 100 * TIMER_USEC); - } + if (!virge->s3d_busy) { + if (!(timer_is_enabled(&virge->tri_timer))) + timer_set_delay_u64(&virge->tri_timer, 100 * TIMER_USEC); + } } static void s3_virge_update_irqs(virge_t *virge) { - if ((virge->svga.crtc[0x32] & 0x10) && (virge->subsys_stat & (virge->subsys_cntl & INT_MASK))) - pci_set_irq(virge->card, PCI_INTA); - else - pci_clear_irq(virge->card, PCI_INTA); + if ((virge->svga.crtc[0x32] & 0x10) && (virge->subsys_stat & (virge->subsys_cntl & INT_MASK))) + pci_set_irq(virge->card, PCI_INTA); + else + pci_clear_irq(virge->card, PCI_INTA); } - static void render_thread(void *param) { - virge_t *virge = (virge_t *)param; + virge_t *virge = (virge_t *) param; - while (virge->render_thread_run) { - thread_wait_event(virge->wake_render_thread, -1); - thread_reset_event(virge->wake_render_thread); - virge->s3d_busy = 1; - while (!RB_EMPTY) { - s3_virge_triangle(virge, &virge->s3d_buffer[virge->s3d_read_idx & RB_MASK]); - virge->s3d_read_idx++; - if (RB_ENTRIES == RB_MASK) { - thread_set_event(virge->not_full_event); - thread_set_event(virge->wake_main_thread); - } - } - virge->s3d_busy = 0; - virge->subsys_stat |= INT_S3D_DONE; - s3_virge_update_irqs(virge); - } -} - - -static void s3_virge_out(uint16_t addr, uint8_t val, void *p) -{ - virge_t *virge = (virge_t *)p; - svga_t *svga = &virge->svga; - uint8_t old; - uint32_t cursoraddr; - - if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; - - switch (addr) - { - case 0x3c5: - if (svga->seqaddr >= 0x10) - { - svga->seqregs[svga->seqaddr & 0x1f]=val; - svga_recalctimings(svga); - return; - } - if (svga->seqaddr == 4) /*Chain-4 - update banking*/ - { - if (val & 8) - svga->write_bank = svga->read_bank = virge->bank << 16; - else - svga->write_bank = svga->read_bank = virge->bank << 14; - } else if (svga->seqaddr == 0x08) { - svga->seqregs[svga->seqaddr] = val & 0x0f; - return; - } else if ((svga->seqaddr == 0x0d) && (svga->seqregs[0x08] == 0x06)) { - svga->seqregs[svga->seqaddr] = val; - svga->dpms = (svga->seqregs[0x0d] & 0x50) || (svga->crtc[0x56] & 0x06); - svga_recalctimings(svga); - return; - } - break; - - case 0x3d4: - svga->crtcreg = val; - return; - case 0x3d5: - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - if ((svga->crtcreg >= 0x20) && (svga->crtcreg < 0x40) && - (svga->crtcreg != 0x36) && (svga->crtcreg != 0x38) && - (svga->crtcreg != 0x39) && ((svga->crtc[0x38] & 0xcc) != 0x48)) - return; - if ((svga->crtcreg >= 0x40) && ((svga->crtc[0x39] & 0xe0) != 0xa0)) - return; - if ((svga->crtcreg == 0x36) && (svga->crtc[0x39] != 0xa5)) - return; - if (svga->crtcreg >= 0x80) - return; - old = svga->crtc[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; - - if (svga->crtcreg > 0x18) - s3_virge_log("OUTB VGA reg = %02x, val = %02x\n", svga->crtcreg, val); - - switch (svga->crtcreg) - { - case 0x31: - virge->ma_ext = (virge->ma_ext & 0x1c) | ((val & 0x30) >> 4); - break; - case 0x32: - s3_virge_update_irqs(virge); - break; - - case 0x69: - virge->ma_ext = val & 0x1f; - break; - - case 0x35: - virge->bank = (virge->bank & 0x70) | (val & 0xf); - if (svga->chain4) - svga->write_bank = svga->read_bank = virge->bank << 16; - else - svga->write_bank = svga->read_bank = virge->bank << 14; - break; - case 0x51: - virge->bank = (virge->bank & 0x4f) | ((val & 0xc) << 2); - if (svga->chain4) - svga->write_bank = svga->read_bank = virge->bank << 16; - else - svga->write_bank = svga->read_bank = virge->bank << 14; - virge->ma_ext = (virge->ma_ext & ~0xc) | ((val & 3) << 2); - break; - case 0x6a: - virge->bank = val; - if (svga->chain4) - svga->write_bank = svga->read_bank = virge->bank << 16; - else - svga->write_bank = svga->read_bank = virge->bank << 14; - break; - - case 0x3a: - if (val & 0x10) - svga->gdcreg[5] |= 0x40; /*Horrible cheat*/ - break; - - case 0x45: - svga->hwcursor.ena = val & 1; - break; - case 0x46: case 0x47: case 0x48: case 0x49: - case 0x4c: case 0x4d: case 0x4e: case 0x4f: - svga->hwcursor.x = ((svga->crtc[0x46] << 8) | svga->crtc[0x47]) & 0x7ff; - svga->hwcursor.y = ((svga->crtc[0x48] << 8) | svga->crtc[0x49]) & 0x7ff; - svga->hwcursor.xoff = svga->crtc[0x4e] & 0x3f; - svga->hwcursor.yoff = svga->crtc[0x4f] & 0x3f; - cursoraddr = (virge->memory_size == 8) ? 0x1fff : 0x0fff; - svga->hwcursor.addr = ((((svga->crtc[0x4c] << 8) | svga->crtc[0x4d]) & cursoraddr) * 1024) + (svga->hwcursor.yoff * 16); - break; - - case 0x4a: - switch (virge->hwc_col_stack_pos) - { - case 0: - virge->hwc_fg_col = (virge->hwc_fg_col & 0xffff00) | val; - break; - case 1: - virge->hwc_fg_col = (virge->hwc_fg_col & 0xff00ff) | (val << 8); - break; - case 2: - virge->hwc_fg_col = (virge->hwc_fg_col & 0x00ffff) | (val << 16); - break; - } - virge->hwc_col_stack_pos = (virge->hwc_col_stack_pos + 1) & 3; - break; - case 0x4b: - switch (virge->hwc_col_stack_pos) - { - case 0: - virge->hwc_bg_col = (virge->hwc_bg_col & 0xffff00) | val; - break; - case 1: - virge->hwc_bg_col = (virge->hwc_bg_col & 0xff00ff) | (val << 8); - break; - case 2: - virge->hwc_bg_col = (virge->hwc_bg_col & 0x00ffff) | (val << 16); - break; - } - virge->hwc_col_stack_pos = (virge->hwc_col_stack_pos + 1) & 3; - break; - - case 0x53: - case 0x58: case 0x59: case 0x5a: - s3_virge_updatemapping(virge); - break; - - case 0x56: - svga->dpms = (svga->seqregs[0x0d] & 0x50) || (svga->crtc[0x56] & 0x06); - old = ~val; /* force recalc */ - break; - - case 0x5c: - if ((val & 0xa0) == 0x80) - i2c_gpio_set(virge->i2c, !!(val & 0x40), !!(val & 0x10)); - break; - - case 0x67: - switch (val >> 4) - { - case 2: case 3: svga->bpp = 15; break; - case 4: case 5: svga->bpp = 16; break; - case 7: svga->bpp = 24; break; - case 13: svga->bpp = (virge->chip == S3_VIRGEVX) ? 24 : 32; break; - default: svga->bpp = 8; break; - } - break; - - case 0xaa: - i2c_gpio_set(virge->i2c, !!(val & SERIAL_PORT_SCW), !!(val & SERIAL_PORT_SDW)); - break; - } - if (old != val) - { - if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) - { - if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - if ((svga->crtc[0x67] & 0xc) != 0xc) - svga->ma_latch |= (virge->ma_ext << 16); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - } - } - break; + while (virge->render_thread_run) { + thread_wait_event(virge->wake_render_thread, -1); + thread_reset_event(virge->wake_render_thread); + virge->s3d_busy = 1; + while (!RB_EMPTY) { + s3_virge_triangle(virge, &virge->s3d_buffer[virge->s3d_read_idx & RB_MASK]); + virge->s3d_read_idx++; + if (RB_ENTRIES == RB_MASK) { + thread_set_event(virge->not_full_event); + thread_set_event(virge->wake_main_thread); + } } - svga_out(addr, val, svga); + virge->s3d_busy = 0; + virge->subsys_stat |= INT_S3D_DONE; + s3_virge_update_irqs(virge); + } } -static uint8_t s3_virge_in(uint16_t addr, void *p) +static void +s3_virge_out(uint16_t addr, uint8_t val, void *p) { - virge_t *virge = (virge_t *)p; - svga_t *svga = &virge->svga; - uint8_t ret; + virge_t *virge = (virge_t *) p; + svga_t *svga = &virge->svga; + uint8_t old; + uint32_t cursoraddr; - if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x3c1: - if (svga->attraddr > 0x14) - ret = 0xff; + switch (addr) { + case 0x3c5: + if (svga->seqaddr >= 0x10) { + svga->seqregs[svga->seqaddr & 0x1f] = val; + svga_recalctimings(svga); + return; + } + if (svga->seqaddr == 4) /*Chain-4 - update banking*/ + { + if (val & 8) + svga->write_bank = svga->read_bank = virge->bank << 16; else - ret = svga_in(addr, svga); - break; + svga->write_bank = svga->read_bank = virge->bank << 14; + } else if (svga->seqaddr == 0x08) { + svga->seqregs[svga->seqaddr] = val & 0x0f; + return; + } else if ((svga->seqaddr == 0x0d) && (svga->seqregs[0x08] == 0x06)) { + svga->seqregs[svga->seqaddr] = val; + svga->dpms = (svga->seqregs[0x0d] & 0x50) || (svga->crtc[0x56] & 0x06); + svga_recalctimings(svga); + return; + } + break; - case 0x3c5: - if (svga->seqaddr >= 8) - ret = svga->seqregs[svga->seqaddr & 0x1f]; - else if (svga->seqaddr <= 4) - ret = svga_in(addr, svga); - else - ret = 0xff; - break; + case 0x3d4: + svga->crtcreg = val; + return; + case 0x3d5: + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + if ((svga->crtcreg >= 0x20) && (svga->crtcreg < 0x40) && (svga->crtcreg != 0x36) && (svga->crtcreg != 0x38) && (svga->crtcreg != 0x39) && ((svga->crtc[0x38] & 0xcc) != 0x48)) + return; + if ((svga->crtcreg >= 0x40) && ((svga->crtc[0x39] & 0xe0) != 0xa0)) + return; + if ((svga->crtcreg == 0x36) && (svga->crtc[0x39] != 0xa5)) + return; + if (svga->crtcreg >= 0x80) + return; + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; - case 0x3D4: - ret = svga->crtcreg; - break; - case 0x3D5: - switch (svga->crtcreg) - { - case 0x2d: ret = virge->virge_id_high; break; /*Extended chip ID*/ - case 0x2e: ret = virge->virge_id_low; break; /*New chip ID*/ - case 0x2f: ret = virge->virge_rev; break; - case 0x30: ret = virge->virge_id; break; /*Chip ID*/ - case 0x31: ret = (svga->crtc[0x31] & 0xcf) | ((virge->ma_ext & 3) << 4); break; - case 0x33: ret = (svga->crtc[0x33] | 0x04); break; - case 0x35: ret = (svga->crtc[0x35] & 0xf0) | (virge->bank & 0xf); break; - case 0x45: virge->hwc_col_stack_pos = 0; ret = svga->crtc[0x45]; break; - case 0x51: ret = (svga->crtc[0x51] & 0xf0) | ((virge->bank >> 2) & 0xc) | ((virge->ma_ext >> 2) & 3); break; - case 0x5c: /* General Output Port Register */ - ret = svga->crtc[svga->crtcreg] & 0xa0; - if (((svga->miscout >> 2) & 3) == 3) - ret |= svga->crtc[0x42] & 0x0f; - else - ret |= ((svga->miscout >> 2) & 3); - if ((ret & 0xa0) == 0xa0) { - if ((svga->crtc[0x5c] & 0x40) && i2c_gpio_get_scl(virge->i2c)) - ret |= 0x40; - if ((svga->crtc[0x5c] & 0x10) && i2c_gpio_get_sda(virge->i2c)) - ret |= 0x10; - } - break; - case 0x69: ret = virge->ma_ext; break; - case 0x6a: ret = virge->bank; break; + if (svga->crtcreg > 0x18) + s3_virge_log("OUTB VGA reg = %02x, val = %02x\n", svga->crtcreg, val); - case 0xaa: /* DDC */ - if (virge->chip >= S3_VIRGEGX2) { - ret = svga->crtc[0xaa] & ~(SERIAL_PORT_SCR | SERIAL_PORT_SDR); - if ((svga->crtc[0xaa] & SERIAL_PORT_SCW) && i2c_gpio_get_scl(virge->i2c)) - ret |= SERIAL_PORT_SCR; - if ((svga->crtc[0xaa] & SERIAL_PORT_SDW) && i2c_gpio_get_sda(virge->i2c)) - ret |= SERIAL_PORT_SDR; - break; - } else - ret = svga->crtc[0xaa]; - break; + switch (svga->crtcreg) { + case 0x31: + virge->ma_ext = (virge->ma_ext & 0x1c) | ((val & 0x30) >> 4); + break; + case 0x32: + s3_virge_update_irqs(virge); + break; - default: - ret = svga->crtc[svga->crtcreg]; - break; + case 0x69: + virge->ma_ext = val & 0x1f; + break; + + case 0x35: + virge->bank = (virge->bank & 0x70) | (val & 0xf); + if (svga->chain4) + svga->write_bank = svga->read_bank = virge->bank << 16; + else + svga->write_bank = svga->read_bank = virge->bank << 14; + break; + case 0x51: + virge->bank = (virge->bank & 0x4f) | ((val & 0xc) << 2); + if (svga->chain4) + svga->write_bank = svga->read_bank = virge->bank << 16; + else + svga->write_bank = svga->read_bank = virge->bank << 14; + virge->ma_ext = (virge->ma_ext & ~0xc) | ((val & 3) << 2); + break; + case 0x6a: + virge->bank = val; + if (svga->chain4) + svga->write_bank = svga->read_bank = virge->bank << 16; + else + svga->write_bank = svga->read_bank = virge->bank << 14; + break; + + case 0x3a: + if (val & 0x10) + svga->gdcreg[5] |= 0x40; /*Horrible cheat*/ + break; + + case 0x45: + svga->hwcursor.ena = val & 1; + break; + case 0x46: + case 0x47: + case 0x48: + case 0x49: + case 0x4c: + case 0x4d: + case 0x4e: + case 0x4f: + svga->hwcursor.x = ((svga->crtc[0x46] << 8) | svga->crtc[0x47]) & 0x7ff; + svga->hwcursor.y = ((svga->crtc[0x48] << 8) | svga->crtc[0x49]) & 0x7ff; + svga->hwcursor.xoff = svga->crtc[0x4e] & 0x3f; + svga->hwcursor.yoff = svga->crtc[0x4f] & 0x3f; + cursoraddr = (virge->memory_size == 8) ? 0x1fff : 0x0fff; + svga->hwcursor.addr = ((((svga->crtc[0x4c] << 8) | svga->crtc[0x4d]) & cursoraddr) * 1024) + (svga->hwcursor.yoff * 16); + break; + + case 0x4a: + switch (virge->hwc_col_stack_pos) { + case 0: + virge->hwc_fg_col = (virge->hwc_fg_col & 0xffff00) | val; + break; + case 1: + virge->hwc_fg_col = (virge->hwc_fg_col & 0xff00ff) | (val << 8); + break; + case 2: + virge->hwc_fg_col = (virge->hwc_fg_col & 0x00ffff) | (val << 16); + break; + } + virge->hwc_col_stack_pos = (virge->hwc_col_stack_pos + 1) & 3; + break; + case 0x4b: + switch (virge->hwc_col_stack_pos) { + case 0: + virge->hwc_bg_col = (virge->hwc_bg_col & 0xffff00) | val; + break; + case 1: + virge->hwc_bg_col = (virge->hwc_bg_col & 0xff00ff) | (val << 8); + break; + case 2: + virge->hwc_bg_col = (virge->hwc_bg_col & 0x00ffff) | (val << 16); + break; + } + virge->hwc_col_stack_pos = (virge->hwc_col_stack_pos + 1) & 3; + break; + + case 0x53: + case 0x58: + case 0x59: + case 0x5a: + s3_virge_updatemapping(virge); + break; + + case 0x56: + svga->dpms = (svga->seqregs[0x0d] & 0x50) || (svga->crtc[0x56] & 0x06); + old = ~val; /* force recalc */ + break; + + case 0x5c: + if ((val & 0xa0) == 0x80) + i2c_gpio_set(virge->i2c, !!(val & 0x40), !!(val & 0x10)); + break; + + case 0x67: + switch (val >> 4) { + case 2: + case 3: + svga->bpp = 15; + break; + case 4: + case 5: + svga->bpp = 16; + break; + case 7: + svga->bpp = 24; + break; + case 13: + svga->bpp = (virge->chip == S3_VIRGEVX) ? 24 : 32; + break; + default: + svga->bpp = 8; + break; + } + break; + + case 0xaa: + i2c_gpio_set(virge->i2c, !!(val & SERIAL_PORT_SCW), !!(val & SERIAL_PORT_SDW)); + break; + } + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + if ((svga->crtc[0x67] & 0xc) != 0xc) + svga->ma_latch |= (virge->ma_ext << 16); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } } - break; + } + break; + } + svga_out(addr, val, svga); +} + +static uint8_t +s3_virge_in(uint16_t addr, void *p) +{ + virge_t *virge = (virge_t *) p; + svga_t *svga = &virge->svga; + uint8_t ret; + + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; + + switch (addr) { + case 0x3c1: + if (svga->attraddr > 0x14) + ret = 0xff; + else + ret = svga_in(addr, svga); + break; + + case 0x3c5: + if (svga->seqaddr >= 8) + ret = svga->seqregs[svga->seqaddr & 0x1f]; + else if (svga->seqaddr <= 4) + ret = svga_in(addr, svga); + else + ret = 0xff; + break; + + case 0x3D4: + ret = svga->crtcreg; + break; + case 0x3D5: + switch (svga->crtcreg) { + case 0x2d: + ret = virge->virge_id_high; + break; /*Extended chip ID*/ + case 0x2e: + ret = virge->virge_id_low; + break; /*New chip ID*/ + case 0x2f: + ret = virge->virge_rev; + break; + case 0x30: + ret = virge->virge_id; + break; /*Chip ID*/ + case 0x31: + ret = (svga->crtc[0x31] & 0xcf) | ((virge->ma_ext & 3) << 4); + break; + case 0x33: + ret = (svga->crtc[0x33] | 0x04); + break; + case 0x35: + ret = (svga->crtc[0x35] & 0xf0) | (virge->bank & 0xf); + break; + case 0x45: + virge->hwc_col_stack_pos = 0; + ret = svga->crtc[0x45]; + break; + case 0x51: + ret = (svga->crtc[0x51] & 0xf0) | ((virge->bank >> 2) & 0xc) | ((virge->ma_ext >> 2) & 3); + break; + case 0x5c: /* General Output Port Register */ + ret = svga->crtc[svga->crtcreg] & 0xa0; + if (((svga->miscout >> 2) & 3) == 3) + ret |= svga->crtc[0x42] & 0x0f; + else + ret |= ((svga->miscout >> 2) & 3); + if ((ret & 0xa0) == 0xa0) { + if ((svga->crtc[0x5c] & 0x40) && i2c_gpio_get_scl(virge->i2c)) + ret |= 0x40; + if ((svga->crtc[0x5c] & 0x10) && i2c_gpio_get_sda(virge->i2c)) + ret |= 0x10; + } + break; + case 0x69: + ret = virge->ma_ext; + break; + case 0x6a: + ret = virge->bank; + break; + + case 0xaa: /* DDC */ + if (virge->chip >= S3_VIRGEGX2) { + ret = svga->crtc[0xaa] & ~(SERIAL_PORT_SCR | SERIAL_PORT_SDR); + if ((svga->crtc[0xaa] & SERIAL_PORT_SCW) && i2c_gpio_get_scl(virge->i2c)) + ret |= SERIAL_PORT_SCR; + if ((svga->crtc[0xaa] & SERIAL_PORT_SDW) && i2c_gpio_get_sda(virge->i2c)) + ret |= SERIAL_PORT_SDR; + break; + } else + ret = svga->crtc[0xaa]; + break; default: - ret = svga_in(addr, svga); + ret = svga->crtc[svga->crtcreg]; + break; + } + break; + + default: + ret = svga_in(addr, svga); + break; + } + return ret; +} + +static void +s3_virge_recalctimings(svga_t *svga) +{ + virge_t *virge = (virge_t *) svga->p; + + svga->hdisp = svga->hdisp_old; + + if (svga->crtc[0x5d] & 0x01) + svga->htotal += 0x100; + if (svga->crtc[0x5d] & 0x02) { + svga->hdisp_time += 0x100; + svga->hdisp += 0x100 * ((svga->seqregs[1] & 8) ? 16 : 8); + } + if (svga->crtc[0x5e] & 0x01) + svga->vtotal += 0x400; + if (svga->crtc[0x5e] & 0x02) + svga->dispend += 0x400; + if (svga->crtc[0x5e] & 0x04) + svga->vblankstart += 0x400; + if (svga->crtc[0x5e] & 0x10) + svga->vsyncstart += 0x400; + if (svga->crtc[0x5e] & 0x40) + svga->split += 0x400; + svga->interlace = svga->crtc[0x42] & 0x20; + + if (((svga->miscout >> 2) & 3) == 3) { + int n = svga->seqregs[0x12] & 0x1f; + int r = (svga->seqregs[0x12] >> 5); + + if (virge->chip == S3_VIRGEVX || virge->chip == S3_VIRGEDX) + r &= 7; + else if (virge->chip >= S3_VIRGEGX2) + r &= 10; + else + r &= 3; + + int m = svga->seqregs[0x13] & 0x7f; + double freq = (((double) m + 2) / (((double) n + 2) * (double) (1 << r))) * 14318184.0; + + svga->clock = (cpuclock * (float) (1ull << 32)) / freq; + } + + if ((svga->crtc[0x67] & 0xc) != 0xc) /*VGA mode*/ + { + svga->ma_latch |= (virge->ma_ext << 16); + if (svga->crtc[0x51] & 0x30) + svga->rowoffset += (svga->crtc[0x51] & 0x30) << 4; + else if (svga->crtc[0x43] & 0x04) + svga->rowoffset += 0x100; + if (!svga->rowoffset) + svga->rowoffset = 256; + + svga->lowres = !((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)); + if ((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)) { + switch (svga->bpp) { + case 8: + svga->render = svga_render_8bpp_highres; + break; + case 15: + svga->render = svga_render_15bpp_highres; + if (virge->chip != S3_VIRGEVX && virge->chip < S3_VIRGEGX2) { + svga->htotal >>= 1; + svga->hdisp >>= 1; + } + break; + case 16: + svga->render = svga_render_16bpp_highres; + if (virge->chip != S3_VIRGEVX && virge->chip < S3_VIRGEGX2) { + svga->htotal >>= 1; + svga->hdisp >>= 1; + } + break; + case 24: + svga->render = svga_render_24bpp_highres; + if (virge->chip != S3_VIRGEVX && virge->chip < S3_VIRGEGX2) + svga->rowoffset = (svga->rowoffset * 3) / 4; /*Hack*/ + break; + case 32: + svga->render = svga_render_32bpp_highres; + break; + } + } + svga->vram_display_mask = (!(svga->crtc[0x31] & 0x08) && (svga->crtc[0x32] & 0x40)) ? 0x3ffff : virge->vram_mask; + s3_virge_log("VGA mode\n"); + } else /*Streams mode*/ + { + if (virge->streams.buffer_ctrl & 1) + svga->ma_latch = virge->streams.pri_fb1 >> 2; + else + svga->ma_latch = virge->streams.pri_fb0 >> 2; + + svga->hdisp = virge->streams.pri_w + 1; + if (virge->streams.pri_h < svga->dispend) + svga->dispend = virge->streams.pri_h; + + svga->overlay.x = virge->streams.sec_x - virge->streams.pri_x; + svga->overlay.y = virge->streams.sec_y - virge->streams.pri_y; + svga->overlay.cur_ysize = virge->streams.sec_h; + + if (virge->streams.buffer_ctrl & 2) + svga->overlay.addr = virge->streams.sec_fb1; + else + svga->overlay.addr = virge->streams.sec_fb0; + + svga->overlay.ena = (svga->overlay.x >= 0); + svga->overlay.v_acc = virge->streams.dda_vert_accumulator; + svga->rowoffset = virge->streams.pri_stride >> 3; + + switch ((virge->streams.pri_ctrl >> 24) & 0x7) { + case 0: /*RGB-8 (CLUT)*/ + svga->render = svga_render_8bpp_highres; + break; + case 3: /*KRGB-16 (1.5.5.5)*/ + svga->htotal >>= 1; + svga->render = svga_render_15bpp_highres; + break; + case 5: /*RGB-16 (5.6.5)*/ + svga->htotal >>= 1; + svga->render = svga_render_16bpp_highres; + break; + case 6: /*RGB-24 (8.8.8)*/ + svga->render = svga_render_24bpp_highres; + break; + case 7: /*XRGB-32 (X.8.8.8)*/ + svga->render = svga_render_32bpp_highres; break; } - return ret; + svga->vram_display_mask = virge->vram_mask; + } } -static void s3_virge_recalctimings(svga_t *svga) +static void +s3_virge_updatemapping(virge_t *virge) { - virge_t *virge = (virge_t *)svga->p; + svga_t *svga = &virge->svga; - svga->hdisp = svga->hdisp_old; + if (!(virge->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) { + mem_mapping_disable(&svga->mapping); + mem_mapping_disable(&virge->linear_mapping); + mem_mapping_disable(&virge->mmio_mapping); + mem_mapping_disable(&virge->new_mmio_mapping); + return; + } - if (svga->crtc[0x5d] & 0x01) svga->htotal += 0x100; - if (svga->crtc[0x5d] & 0x02) { - svga->hdisp_time += 0x100; - svga->hdisp += 0x100 * ((svga->seqregs[1] & 8) ? 16 : 8); - } - if (svga->crtc[0x5e] & 0x01) svga->vtotal += 0x400; - if (svga->crtc[0x5e] & 0x02) svga->dispend += 0x400; - if (svga->crtc[0x5e] & 0x04) svga->vblankstart += 0x400; - if (svga->crtc[0x5e] & 0x10) svga->vsyncstart += 0x400; - if (svga->crtc[0x5e] & 0x40) svga->split += 0x400; - svga->interlace = svga->crtc[0x42] & 0x20; + s3_virge_log("Update mapping - bank %02X ", svga->gdcreg[6] & 0xc); + /*Banked framebuffer*/ + switch (svga->gdcreg[6] & 0xc) { /*VGA mapping*/ + case 0x0: /*128k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); + svga->banked_mask = 0xffff; + break; + case 0x4: /*64k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + svga->banked_mask = 0xffff; + break; + case 0x8: /*32k at B0000*/ + mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); + svga->banked_mask = 0x7fff; + break; + case 0xC: /*32k at B8000*/ + mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); + svga->banked_mask = 0x7fff; + break; + } - if (((svga->miscout >> 2) & 3) == 3) { - int n = svga->seqregs[0x12] & 0x1f; - int r = (svga->seqregs[0x12] >> 5); + virge->linear_base = (svga->crtc[0x5a] << 16) | (svga->crtc[0x59] << 24); - if (virge->chip == S3_VIRGEVX || virge->chip == S3_VIRGEDX) - r &= 7; - else if (virge->chip >= S3_VIRGEGX2) - r &= 10; - else - r &= 3; - - int m = svga->seqregs[0x13] & 0x7f; - double freq = (((double)m + 2) / (((double)n + 2) * (double)(1 << r))) * 14318184.0; - - svga->clock = (cpuclock * (float)(1ull << 32)) / freq; - } - - - if ((svga->crtc[0x67] & 0xc) != 0xc) /*VGA mode*/ - { - svga->ma_latch |= (virge->ma_ext << 16); - if (svga->crtc[0x51] & 0x30) svga->rowoffset += (svga->crtc[0x51] & 0x30) << 4; - else if (svga->crtc[0x43] & 0x04) svga->rowoffset += 0x100; - if (!svga->rowoffset) svga->rowoffset = 256; - - svga->lowres = !((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)); - if ((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)) { - switch (svga->bpp) { - case 8: - svga->render = svga_render_8bpp_highres; - break; - case 15: - svga->render = svga_render_15bpp_highres; - if (virge->chip != S3_VIRGEVX && virge->chip < S3_VIRGEGX2) - { - svga->htotal >>= 1; - svga->hdisp >>= 1; - } - break; - case 16: - svga->render = svga_render_16bpp_highres; - if (virge->chip != S3_VIRGEVX && virge->chip < S3_VIRGEGX2) - { - svga->htotal >>= 1; - svga->hdisp >>= 1; - } - break; - case 24: - svga->render = svga_render_24bpp_highres; - if (virge->chip != S3_VIRGEVX && virge->chip < S3_VIRGEGX2) - svga->rowoffset = (svga->rowoffset * 3) / 4; /*Hack*/ - break; - case 32: - svga->render = svga_render_32bpp_highres; - break; - } - } - svga->vram_display_mask = (!(svga->crtc[0x31] & 0x08) && (svga->crtc[0x32] & 0x40)) ? 0x3ffff : virge->vram_mask; - s3_virge_log("VGA mode\n"); - } - else /*Streams mode*/ - { - if (virge->streams.buffer_ctrl & 1) - svga->ma_latch = virge->streams.pri_fb1 >> 2; + s3_virge_log("Linear framebuffer %02X, linear base = %08x, display mask = %08x\n", svga->crtc[0x58] & 0x17, virge->linear_base, svga->vram_display_mask); + if ((svga->crtc[0x58] & 0x10) || (virge->advfunc_cntl & 0x10)) { /*Linear framebuffer*/ + switch (svga->crtc[0x58] & 7) { + case 0: /*64k*/ + virge->linear_size = 0x10000; + break; + case 1: /*1mb*/ + virge->linear_size = 0x100000; + break; + case 2: /*2mb*/ + virge->linear_size = 0x200000; + break; + case 3: /*4mb on other than ViRGE/VX, 8mb on ViRGE/VX*/ + if (virge->chip == S3_VIRGEVX || virge->chip == S3_TRIO3D2X) + virge->linear_size = 0x800000; else - svga->ma_latch = virge->streams.pri_fb0 >> 2; - - svga->hdisp = virge->streams.pri_w + 1; - if (virge->streams.pri_h < svga->dispend) - svga->dispend = virge->streams.pri_h; - - svga->overlay.x = virge->streams.sec_x - virge->streams.pri_x; - svga->overlay.y = virge->streams.sec_y - virge->streams.pri_y; - svga->overlay.cur_ysize = virge->streams.sec_h; - - if (virge->streams.buffer_ctrl & 2) - svga->overlay.addr = virge->streams.sec_fb1; - else - svga->overlay.addr = virge->streams.sec_fb0; - - svga->overlay.ena = (svga->overlay.x >= 0); - svga->overlay.v_acc = virge->streams.dda_vert_accumulator; - svga->rowoffset = virge->streams.pri_stride >> 3; - - switch ((virge->streams.pri_ctrl >> 24) & 0x7) - { - case 0: /*RGB-8 (CLUT)*/ - svga->render = svga_render_8bpp_highres; - break; - case 3: /*KRGB-16 (1.5.5.5)*/ - svga->htotal >>= 1; - svga->render = svga_render_15bpp_highres; - break; - case 5: /*RGB-16 (5.6.5)*/ - svga->htotal >>= 1; - svga->render = svga_render_16bpp_highres; - break; - case 6: /*RGB-24 (8.8.8)*/ - svga->render = svga_render_24bpp_highres; - break; - case 7: /*XRGB-32 (X.8.8.8)*/ - svga->render = svga_render_32bpp_highres; - break; - } - svga->vram_display_mask = virge->vram_mask; + virge->linear_size = 0x400000; + break; + case 7: + virge->linear_size = 0x800000; + break; } -} - -static void s3_virge_updatemapping(virge_t *virge) -{ - svga_t *svga = &virge->svga; - - if (!(virge->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) - { - mem_mapping_disable(&svga->mapping); - mem_mapping_disable(&virge->linear_mapping); - mem_mapping_disable(&virge->mmio_mapping); - mem_mapping_disable(&virge->new_mmio_mapping); - return; - } - - s3_virge_log("Update mapping - bank %02X ", svga->gdcreg[6] & 0xc); - /*Banked framebuffer*/ - switch (svga->gdcreg[6] & 0xc) { /*VGA mapping*/ - case 0x0: /*128k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); - svga->banked_mask = 0xffff; - break; - case 0x4: /*64k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); - svga->banked_mask = 0xffff; - break; - case 0x8: /*32k at B0000*/ - mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); - svga->banked_mask = 0x7fff; - break; - case 0xC: /*32k at B8000*/ - mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); - svga->banked_mask = 0x7fff; - break; - } - - virge->linear_base = (svga->crtc[0x5a] << 16) | (svga->crtc[0x59] << 24); - - s3_virge_log("Linear framebuffer %02X, linear base = %08x, display mask = %08x\n", svga->crtc[0x58] & 0x17, virge->linear_base, svga->vram_display_mask); - if ((svga->crtc[0x58] & 0x10) || (virge->advfunc_cntl & 0x10)) { /*Linear framebuffer*/ - switch (svga->crtc[0x58] & 7) { - case 0: /*64k*/ - virge->linear_size = 0x10000; - break; - case 1: /*1mb*/ - virge->linear_size = 0x100000; - break; - case 2: /*2mb*/ - virge->linear_size = 0x200000; - break; - case 3: /*4mb on other than ViRGE/VX, 8mb on ViRGE/VX*/ - if (virge->chip == S3_VIRGEVX || virge->chip == S3_TRIO3D2X) - virge->linear_size = 0x800000; - else - virge->linear_size = 0x400000; - break; - case 7: - virge->linear_size = 0x800000; - break; - } - virge->linear_base &= ~(virge->linear_size - 1); - s3_virge_log("Linear framebuffer at %08X size %08X, mask = %08x, CRTC58 sel = %02x\n", virge->linear_base, virge->linear_size, virge->vram_mask, svga->crtc[0x58] & 7); - if (virge->linear_base == 0xa0000) { - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); - mem_mapping_disable(&virge->linear_mapping); - } else { - if (virge->chip == S3_VIRGEVX || virge->chip == S3_TRIO3D2X) { - virge->linear_base &= 0xfe000000; - } else { - virge->linear_base &= 0xfc000000; - } - - mem_mapping_set_addr(&virge->linear_mapping, virge->linear_base, virge->linear_size); - } - svga->fb_only = 1; + virge->linear_base &= ~(virge->linear_size - 1); + s3_virge_log("Linear framebuffer at %08X size %08X, mask = %08x, CRTC58 sel = %02x\n", virge->linear_base, virge->linear_size, virge->vram_mask, svga->crtc[0x58] & 7); + if (virge->linear_base == 0xa0000) { + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + mem_mapping_disable(&virge->linear_mapping); } else { - mem_mapping_disable(&virge->linear_mapping); - svga->fb_only = 0; + if (virge->chip == S3_VIRGEVX || virge->chip == S3_TRIO3D2X) { + virge->linear_base &= 0xfe000000; + } else { + virge->linear_base &= 0xfc000000; + } + + mem_mapping_set_addr(&virge->linear_mapping, virge->linear_base, virge->linear_size); } + svga->fb_only = 1; + } else { + mem_mapping_disable(&virge->linear_mapping); + svga->fb_only = 0; + } - s3_virge_log("Memory mapped IO %02X\n", svga->crtc[0x53] & 0x38); + s3_virge_log("Memory mapped IO %02X\n", svga->crtc[0x53] & 0x38); - /* Memory mapped I/O. */ - /* Old MMIO. */ - if ((svga->crtc[0x53] & 0x10) || (virge->advfunc_cntl & 0x20)) { - if (svga->crtc[0x53] & 0x20) - mem_mapping_set_addr(&virge->mmio_mapping, 0xb8000, 0x8000); - else - mem_mapping_set_addr(&virge->mmio_mapping, 0xa0000, 0x10000); - } else - mem_mapping_disable(&virge->mmio_mapping); + /* Memory mapped I/O. */ + /* Old MMIO. */ + if ((svga->crtc[0x53] & 0x10) || (virge->advfunc_cntl & 0x20)) { + if (svga->crtc[0x53] & 0x20) + mem_mapping_set_addr(&virge->mmio_mapping, 0xb8000, 0x8000); + else + mem_mapping_set_addr(&virge->mmio_mapping, 0xa0000, 0x10000); + } else + mem_mapping_disable(&virge->mmio_mapping); - /* New MMIO. */ - if (svga->crtc[0x53] & 0x08) - mem_mapping_set_addr(&virge->new_mmio_mapping, virge->linear_base + 0x1000000, 0x10000); - else - mem_mapping_disable(&virge->new_mmio_mapping); + /* New MMIO. */ + if (svga->crtc[0x53] & 0x08) + mem_mapping_set_addr(&virge->new_mmio_mapping, virge->linear_base + 0x1000000, 0x10000); + else + mem_mapping_disable(&virge->new_mmio_mapping); } static void s3_virge_vblank_start(svga_t *svga) { - virge_t *virge = (virge_t *)svga->p; + virge_t *virge = (virge_t *) svga->p; - virge->subsys_stat |= INT_VSY; - s3_virge_update_irqs(virge); + virge->subsys_stat |= INT_VSY; + s3_virge_update_irqs(virge); } - static void s3_virge_mmio_fifo_write(uint32_t addr, uint8_t val, virge_t *virge) { - if ((addr & 0xffff) < 0x8000) { - s3_virge_bitblt(virge, 8, val); - } else { - switch (addr & 0xffff) { - case 0x859c: - virge->cmd_dma = val; - break; - } - } + if ((addr & 0xffff) < 0x8000) { + s3_virge_bitblt(virge, 8, val); + } else { + switch (addr & 0xffff) { + case 0x859c: + virge->cmd_dma = val; + break; + } + } } static void s3_virge_mmio_fifo_write_w(uint32_t addr, uint16_t val, virge_t *virge) { - if ((addr & 0xfffe) < 0x8000) { - if (virge->s3d.cmd_set & CMD_SET_MS) - s3_virge_bitblt(virge, 16, ((val >> 8) | (val << 8)) << 16); - else - s3_virge_bitblt(virge, 16, val); - } else { - if ((addr & 0xfffe) == 0x859c) - virge->cmd_dma = val; - } + if ((addr & 0xfffe) < 0x8000) { + if (virge->s3d.cmd_set & CMD_SET_MS) + s3_virge_bitblt(virge, 16, ((val >> 8) | (val << 8)) << 16); + else + s3_virge_bitblt(virge, 16, val); + } else { + if ((addr & 0xfffe) == 0x859c) + virge->cmd_dma = val; + } } static void s3_virge_mmio_fifo_write_l(uint32_t addr, uint32_t val, virge_t *virge) { - if ((addr & 0xfffc) < 0x8000) { - if (virge->s3d.cmd_set & CMD_SET_MS) - s3_virge_bitblt(virge, 32, ((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24)); - else - s3_virge_bitblt(virge, 32, val); + if ((addr & 0xfffc) < 0x8000) { + if (virge->s3d.cmd_set & CMD_SET_MS) + s3_virge_bitblt(virge, 32, ((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24)); + else + s3_virge_bitblt(virge, 32, val); } else { - virge->fifo_slot++; - switch (addr & 0xfffc) { - case 0x8590: - virge->cmd_dma_base = val; - break; + virge->fifo_slot++; + switch (addr & 0xfffc) { + case 0x8590: + virge->cmd_dma_base = val; + break; - case 0x8594: - virge->dma_ptr = val; - break; + case 0x8594: + virge->dma_ptr = val; + break; - case 0x8598: - break; + case 0x8598: + break; - case 0x859c: - virge->cmd_dma = val; - break; + case 0x859c: + virge->cmd_dma = val; + break; - case 0xa000: case 0xa004: case 0xa008: case 0xa00c: - case 0xa010: case 0xa014: case 0xa018: case 0xa01c: - case 0xa020: case 0xa024: case 0xa028: case 0xa02c: - case 0xa030: case 0xa034: case 0xa038: case 0xa03c: - case 0xa040: case 0xa044: case 0xa048: case 0xa04c: - case 0xa050: case 0xa054: case 0xa058: case 0xa05c: - case 0xa060: case 0xa064: case 0xa068: case 0xa06c: - case 0xa070: case 0xa074: case 0xa078: case 0xa07c: - case 0xa080: case 0xa084: case 0xa088: case 0xa08c: - case 0xa090: case 0xa094: case 0xa098: case 0xa09c: - case 0xa0a0: case 0xa0a4: case 0xa0a8: case 0xa0ac: - case 0xa0b0: case 0xa0b4: case 0xa0b8: case 0xa0bc: - case 0xa0c0: case 0xa0c4: case 0xa0c8: case 0xa0cc: - case 0xa0d0: case 0xa0d4: case 0xa0d8: case 0xa0dc: - case 0xa0e0: case 0xa0e4: case 0xa0e8: case 0xa0ec: - case 0xa0f0: case 0xa0f4: case 0xa0f8: case 0xa0fc: - case 0xa100: case 0xa104: case 0xa108: case 0xa10c: - case 0xa110: case 0xa114: case 0xa118: case 0xa11c: - case 0xa120: case 0xa124: case 0xa128: case 0xa12c: - case 0xa130: case 0xa134: case 0xa138: case 0xa13c: - case 0xa140: case 0xa144: case 0xa148: case 0xa14c: - case 0xa150: case 0xa154: case 0xa158: case 0xa15c: - case 0xa160: case 0xa164: case 0xa168: case 0xa16c: - case 0xa170: case 0xa174: case 0xa178: case 0xa17c: - case 0xa180: case 0xa184: case 0xa188: case 0xa18c: - case 0xa190: case 0xa194: case 0xa198: case 0xa19c: - case 0xa1a0: case 0xa1a4: case 0xa1a8: case 0xa1ac: - case 0xa1b0: case 0xa1b4: case 0xa1b8: case 0xa1bc: - case 0xa1c0: case 0xa1c4: case 0xa1c8: case 0xa1cc: - case 0xa1d0: case 0xa1d4: case 0xa1d8: case 0xa1dc: - case 0xa1e0: case 0xa1e4: case 0xa1e8: case 0xa1ec: - case 0xa1f0: case 0xa1f4: case 0xa1f8: case 0xa1fc: - { - int x = addr & 4; - int y = (addr >> 3) & 7; - int color, xx; - int byte; - virge->s3d.pattern_8[y*8 + x] = val & 0xff; - virge->s3d.pattern_8[y*8 + x + 1] = val >> 8; - virge->s3d.pattern_8[y*8 + x + 2] = val >> 16; - virge->s3d.pattern_8[y*8 + x + 3] = val >> 24; + case 0xa000: + case 0xa004: + case 0xa008: + case 0xa00c: + case 0xa010: + case 0xa014: + case 0xa018: + case 0xa01c: + case 0xa020: + case 0xa024: + case 0xa028: + case 0xa02c: + case 0xa030: + case 0xa034: + case 0xa038: + case 0xa03c: + case 0xa040: + case 0xa044: + case 0xa048: + case 0xa04c: + case 0xa050: + case 0xa054: + case 0xa058: + case 0xa05c: + case 0xa060: + case 0xa064: + case 0xa068: + case 0xa06c: + case 0xa070: + case 0xa074: + case 0xa078: + case 0xa07c: + case 0xa080: + case 0xa084: + case 0xa088: + case 0xa08c: + case 0xa090: + case 0xa094: + case 0xa098: + case 0xa09c: + case 0xa0a0: + case 0xa0a4: + case 0xa0a8: + case 0xa0ac: + case 0xa0b0: + case 0xa0b4: + case 0xa0b8: + case 0xa0bc: + case 0xa0c0: + case 0xa0c4: + case 0xa0c8: + case 0xa0cc: + case 0xa0d0: + case 0xa0d4: + case 0xa0d8: + case 0xa0dc: + case 0xa0e0: + case 0xa0e4: + case 0xa0e8: + case 0xa0ec: + case 0xa0f0: + case 0xa0f4: + case 0xa0f8: + case 0xa0fc: + case 0xa100: + case 0xa104: + case 0xa108: + case 0xa10c: + case 0xa110: + case 0xa114: + case 0xa118: + case 0xa11c: + case 0xa120: + case 0xa124: + case 0xa128: + case 0xa12c: + case 0xa130: + case 0xa134: + case 0xa138: + case 0xa13c: + case 0xa140: + case 0xa144: + case 0xa148: + case 0xa14c: + case 0xa150: + case 0xa154: + case 0xa158: + case 0xa15c: + case 0xa160: + case 0xa164: + case 0xa168: + case 0xa16c: + case 0xa170: + case 0xa174: + case 0xa178: + case 0xa17c: + case 0xa180: + case 0xa184: + case 0xa188: + case 0xa18c: + case 0xa190: + case 0xa194: + case 0xa198: + case 0xa19c: + case 0xa1a0: + case 0xa1a4: + case 0xa1a8: + case 0xa1ac: + case 0xa1b0: + case 0xa1b4: + case 0xa1b8: + case 0xa1bc: + case 0xa1c0: + case 0xa1c4: + case 0xa1c8: + case 0xa1cc: + case 0xa1d0: + case 0xa1d4: + case 0xa1d8: + case 0xa1dc: + case 0xa1e0: + case 0xa1e4: + case 0xa1e8: + case 0xa1ec: + case 0xa1f0: + case 0xa1f4: + case 0xa1f8: + case 0xa1fc: + { + int x = addr & 4; + int y = (addr >> 3) & 7; + int color, xx; + int byte; + virge->s3d.pattern_8[y * 8 + x] = val & 0xff; + virge->s3d.pattern_8[y * 8 + x + 1] = val >> 8; + virge->s3d.pattern_8[y * 8 + x + 2] = val >> 16; + virge->s3d.pattern_8[y * 8 + x + 3] = val >> 24; - x = (addr >> 1) & 6; - y = (addr >> 4) & 7; - virge->s3d.pattern_16[y*8 + x] = val & 0xffff; - virge->s3d.pattern_16[y*8 + x + 1] = val >> 16; + x = (addr >> 1) & 6; + y = (addr >> 4) & 7; + virge->s3d.pattern_16[y * 8 + x] = val & 0xffff; + virge->s3d.pattern_16[y * 8 + x + 1] = val >> 16; - addr &= 0x00ff; - for (xx = 0; xx < 4; xx++) { - x = ((addr + xx) / 3) % 8; - y = ((addr + xx) / 24) % 8; - color = ((addr + xx) % 3) << 3; - byte = (xx << 3); - virge->s3d.pattern_24[y*8 + x] &= ~(0xff << color); - virge->s3d.pattern_24[y*8 + x] |= ((val >> byte) & 0xff) << color; - } + addr &= 0x00ff; + for (xx = 0; xx < 4; xx++) { + x = ((addr + xx) / 3) % 8; + y = ((addr + xx) / 24) % 8; + color = ((addr + xx) % 3) << 3; + byte = (xx << 3); + virge->s3d.pattern_24[y * 8 + x] &= ~(0xff << color); + virge->s3d.pattern_24[y * 8 + x] |= ((val >> byte) & 0xff) << color; + } - x = (addr >> 2) & 7; - y = (addr >> 5) & 7; - virge->s3d.pattern_32[y*8 + x] = val & 0xffffff; - } - break; + x = (addr >> 2) & 7; + y = (addr >> 5) & 7; + virge->s3d.pattern_32[y * 8 + x] = val & 0xffffff; + } + break; - case 0xa4d4: case 0xa8d4: - virge->s3d.src_base = (virge->memory_size == 8) ? (val & 0x7ffff8) : (val & 0x3ffff8); - s3_virge_log("PortWrite = %04x, SRC Base = %08x, memsize = %i\n", addr & 0xfffc, val, virge->memory_size); - break; - case 0xa4d8: case 0xa8d8: - virge->s3d.dest_base = (virge->memory_size == 8) ? (val & 0x7ffff8) : (val & 0x3ffff8); - s3_virge_log("PortWrite = %04x, DST Base = %08x, memsize = %i\n", addr & 0xfffc, val, virge->memory_size); - break; - case 0xa4dc: case 0xa8dc: - virge->s3d.clip_l = (val >> 16) & 0x7ff; - virge->s3d.clip_r = val & 0x7ff; - break; - case 0xa4e0: case 0xa8e0: - virge->s3d.clip_t = (val >> 16) & 0x7ff; - virge->s3d.clip_b = val & 0x7ff; - break; - case 0xa4e4: case 0xa8e4: - virge->s3d.dest_str = (val >> 16) & 0xff8; - virge->s3d.src_str = val & 0xff8; - break; - case 0xa4e8: case 0xace8: - virge->s3d.mono_pat_0 = val; - break; - case 0xa4ec: case 0xacec: - virge->s3d.mono_pat_1 = val; - break; - case 0xa4f0: case 0xacf0: - virge->s3d.pat_bg_clr = val; - break; - case 0xa4f4: case 0xa8f4: case 0xacf4: - virge->s3d.pat_fg_clr = val; - break; - case 0xa4f8: - virge->s3d.src_bg_clr = val; - break; - case 0xa4fc: - virge->s3d.src_fg_clr = val; - break; - case 0xa500: case 0xa900: - virge->s3d.cmd_set = val; - if (!(val & CMD_SET_AE)) { - s3_virge_bitblt(virge, -1, 0); - } - break; - case 0xa504: - virge->s3d.r_width = (val >> 16) & 0x7ff; - virge->s3d.r_height = val & 0x7ff; - break; - case 0xa508: - virge->s3d.rsrc_x = (val >> 16) & 0x7ff; - virge->s3d.rsrc_y = val & 0x7ff; - break; - case 0xa50c: - virge->s3d.rdest_x = (val >> 16) & 0x7ff; - virge->s3d.rdest_y = val & 0x7ff; - if (virge->s3d.cmd_set & CMD_SET_AE) { - s3_virge_bitblt(virge, -1, 0); - } - break; - case 0xa96c: - virge->s3d.lxend0 = (val >> 16) & 0x7ff; - virge->s3d.lxend1 = val & 0x7ff; - break; - case 0xa970: - virge->s3d.ldx = (int32_t)val; - break; - case 0xa974: - virge->s3d.lxstart = val; - break; - case 0xa978: - virge->s3d.lystart = val & 0x7ff; - break; - case 0xa97c: - virge->s3d.lycnt = val & 0x7ff; - virge->s3d.line_dir = val >> 31; - if (virge->s3d.cmd_set & CMD_SET_AE) - s3_virge_bitblt(virge, -1, 0); - break; + case 0xa4d4: + case 0xa8d4: + virge->s3d.src_base = (virge->memory_size == 8) ? (val & 0x7ffff8) : (val & 0x3ffff8); + s3_virge_log("PortWrite = %04x, SRC Base = %08x, memsize = %i\n", addr & 0xfffc, val, virge->memory_size); + break; + case 0xa4d8: + case 0xa8d8: + virge->s3d.dest_base = (virge->memory_size == 8) ? (val & 0x7ffff8) : (val & 0x3ffff8); + s3_virge_log("PortWrite = %04x, DST Base = %08x, memsize = %i\n", addr & 0xfffc, val, virge->memory_size); + break; + case 0xa4dc: + case 0xa8dc: + virge->s3d.clip_l = (val >> 16) & 0x7ff; + virge->s3d.clip_r = val & 0x7ff; + break; + case 0xa4e0: + case 0xa8e0: + virge->s3d.clip_t = (val >> 16) & 0x7ff; + virge->s3d.clip_b = val & 0x7ff; + break; + case 0xa4e4: + case 0xa8e4: + virge->s3d.dest_str = (val >> 16) & 0xff8; + virge->s3d.src_str = val & 0xff8; + break; + case 0xa4e8: + case 0xace8: + virge->s3d.mono_pat_0 = val; + break; + case 0xa4ec: + case 0xacec: + virge->s3d.mono_pat_1 = val; + break; + case 0xa4f0: + case 0xacf0: + virge->s3d.pat_bg_clr = val; + break; + case 0xa4f4: + case 0xa8f4: + case 0xacf4: + virge->s3d.pat_fg_clr = val; + break; + case 0xa4f8: + virge->s3d.src_bg_clr = val; + break; + case 0xa4fc: + virge->s3d.src_fg_clr = val; + break; + case 0xa500: + case 0xa900: + virge->s3d.cmd_set = val; + if (!(val & CMD_SET_AE)) { + s3_virge_bitblt(virge, -1, 0); + } + break; + case 0xa504: + virge->s3d.r_width = (val >> 16) & 0x7ff; + virge->s3d.r_height = val & 0x7ff; + break; + case 0xa508: + virge->s3d.rsrc_x = (val >> 16) & 0x7ff; + virge->s3d.rsrc_y = val & 0x7ff; + break; + case 0xa50c: + virge->s3d.rdest_x = (val >> 16) & 0x7ff; + virge->s3d.rdest_y = val & 0x7ff; + if (virge->s3d.cmd_set & CMD_SET_AE) { + s3_virge_bitblt(virge, -1, 0); + } + break; + case 0xa96c: + virge->s3d.lxend0 = (val >> 16) & 0x7ff; + virge->s3d.lxend1 = val & 0x7ff; + break; + case 0xa970: + virge->s3d.ldx = (int32_t) val; + break; + case 0xa974: + virge->s3d.lxstart = val; + break; + case 0xa978: + virge->s3d.lystart = val & 0x7ff; + break; + case 0xa97c: + virge->s3d.lycnt = val & 0x7ff; + virge->s3d.line_dir = val >> 31; + if (virge->s3d.cmd_set & CMD_SET_AE) + s3_virge_bitblt(virge, -1, 0); + break; - case 0xad00: - virge->s3d.cmd_set = val; - if (!(val & CMD_SET_AE)) - s3_virge_bitblt(virge, -1, 0); - break; - case 0xad68: - virge->s3d.prdx = val; - break; - case 0xad6c: - virge->s3d.prxstart = val; - break; - case 0xad70: - virge->s3d.pldx = val; - break; - case 0xad74: - virge->s3d.plxstart = val; - break; - case 0xad78: - virge->s3d.pystart = val & 0x7ff; - break; - case 0xad7c: - virge->s3d.pycnt = val & 0x300007ff; - if (virge->s3d.cmd_set & CMD_SET_AE) - s3_virge_bitblt(virge, -1, 0); - break; + case 0xad00: + virge->s3d.cmd_set = val; + if (!(val & CMD_SET_AE)) + s3_virge_bitblt(virge, -1, 0); + break; + case 0xad68: + virge->s3d.prdx = val; + break; + case 0xad6c: + virge->s3d.prxstart = val; + break; + case 0xad70: + virge->s3d.pldx = val; + break; + case 0xad74: + virge->s3d.plxstart = val; + break; + case 0xad78: + virge->s3d.pystart = val & 0x7ff; + break; + case 0xad7c: + virge->s3d.pycnt = val & 0x300007ff; + if (virge->s3d.cmd_set & CMD_SET_AE) + s3_virge_bitblt(virge, -1, 0); + break; - case 0xb0f4: case 0xb4f4: - virge->s3d_tri.fog_b = val & 0xff; - virge->s3d_tri.fog_g = (val >> 8) & 0xff; - virge->s3d_tri.fog_r = (val >> 16) & 0xff; - break; - case 0xb4d4: - virge->s3d_tri.z_base = (virge->memory_size == 8) ? (val & 0x7ffff8) : (val & 0x3ffff8); - break; - case 0xb4d8: - virge->s3d_tri.dest_base = (virge->memory_size == 8) ? (val & 0x7ffff8) : (val & 0x3ffff8); - break; - case 0xb4dc: - virge->s3d_tri.clip_l = (val >> 16) & 0x7ff; - virge->s3d_tri.clip_r = val & 0x7ff; - break; - case 0xb4e0: - virge->s3d_tri.clip_t = (val >> 16) & 0x7ff; - virge->s3d_tri.clip_b = val & 0x7ff; - break; - case 0xb4e4: - virge->s3d_tri.dest_str = (val >> 16) & 0xff8; - virge->s3d.src_str = val & 0xff8; - break; - case 0xb4e8: - virge->s3d_tri.z_str = val & 0xff8; - break; - case 0xb4ec: - virge->s3d_tri.tex_base = (virge->memory_size == 8) ? (val & 0x7ffff8) : (val & 0x3ffff8); - break; - case 0xb4f0: - virge->s3d_tri.tex_bdr_clr = val & 0xffffff; - break; - case 0xb500: - virge->s3d_tri.cmd_set = val; - if (!(val & CMD_SET_AE)) - queue_triangle(virge); - break; - case 0xb504: - virge->s3d_tri.tbv = val & 0xfffff; - break; - case 0xb508: - virge->s3d_tri.tbu = val & 0xfffff; - break; - case 0xb50c: - virge->s3d_tri.TdWdX = val; - break; - case 0xb510: - virge->s3d_tri.TdWdY = val; - break; - case 0xb514: - virge->s3d_tri.tws = val; - break; - case 0xb518: - virge->s3d_tri.TdDdX = val; - break; - case 0xb51c: - virge->s3d_tri.TdVdX = val; - break; - case 0xb520: - virge->s3d_tri.TdUdX = val; - break; - case 0xb524: - virge->s3d_tri.TdDdY = val; - break; - case 0xb528: - virge->s3d_tri.TdVdY = val; - break; - case 0xb52c: - virge->s3d_tri.TdUdY = val; - break; - case 0xb530: - virge->s3d_tri.tds = val; - break; - case 0xb534: - virge->s3d_tri.tvs = val; - break; - case 0xb538: - virge->s3d_tri.tus = val; - break; - case 0xb53c: - virge->s3d_tri.TdGdX = val >> 16; - virge->s3d_tri.TdBdX = val & 0xffff; - break; - case 0xb540: - virge->s3d_tri.TdAdX = val >> 16; - virge->s3d_tri.TdRdX = val & 0xffff; - break; - case 0xb544: - virge->s3d_tri.TdGdY = val >> 16; - virge->s3d_tri.TdBdY = val & 0xffff; - break; - case 0xb548: - virge->s3d_tri.TdAdY = val >> 16; - virge->s3d_tri.TdRdY = val & 0xffff; - break; - case 0xb54c: - virge->s3d_tri.tgs = (val >> 16) & 0xffff; - virge->s3d_tri.tbs = val & 0xffff; - break; - case 0xb550: - virge->s3d_tri.tas = (val >> 16) & 0xffff; - virge->s3d_tri.trs = val & 0xffff; - break; + case 0xb0f4: + case 0xb4f4: + virge->s3d_tri.fog_b = val & 0xff; + virge->s3d_tri.fog_g = (val >> 8) & 0xff; + virge->s3d_tri.fog_r = (val >> 16) & 0xff; + break; + case 0xb4d4: + virge->s3d_tri.z_base = (virge->memory_size == 8) ? (val & 0x7ffff8) : (val & 0x3ffff8); + break; + case 0xb4d8: + virge->s3d_tri.dest_base = (virge->memory_size == 8) ? (val & 0x7ffff8) : (val & 0x3ffff8); + break; + case 0xb4dc: + virge->s3d_tri.clip_l = (val >> 16) & 0x7ff; + virge->s3d_tri.clip_r = val & 0x7ff; + break; + case 0xb4e0: + virge->s3d_tri.clip_t = (val >> 16) & 0x7ff; + virge->s3d_tri.clip_b = val & 0x7ff; + break; + case 0xb4e4: + virge->s3d_tri.dest_str = (val >> 16) & 0xff8; + virge->s3d.src_str = val & 0xff8; + break; + case 0xb4e8: + virge->s3d_tri.z_str = val & 0xff8; + break; + case 0xb4ec: + virge->s3d_tri.tex_base = (virge->memory_size == 8) ? (val & 0x7ffff8) : (val & 0x3ffff8); + break; + case 0xb4f0: + virge->s3d_tri.tex_bdr_clr = val & 0xffffff; + break; + case 0xb500: + virge->s3d_tri.cmd_set = val; + if (!(val & CMD_SET_AE)) + queue_triangle(virge); + break; + case 0xb504: + virge->s3d_tri.tbv = val & 0xfffff; + break; + case 0xb508: + virge->s3d_tri.tbu = val & 0xfffff; + break; + case 0xb50c: + virge->s3d_tri.TdWdX = val; + break; + case 0xb510: + virge->s3d_tri.TdWdY = val; + break; + case 0xb514: + virge->s3d_tri.tws = val; + break; + case 0xb518: + virge->s3d_tri.TdDdX = val; + break; + case 0xb51c: + virge->s3d_tri.TdVdX = val; + break; + case 0xb520: + virge->s3d_tri.TdUdX = val; + break; + case 0xb524: + virge->s3d_tri.TdDdY = val; + break; + case 0xb528: + virge->s3d_tri.TdVdY = val; + break; + case 0xb52c: + virge->s3d_tri.TdUdY = val; + break; + case 0xb530: + virge->s3d_tri.tds = val; + break; + case 0xb534: + virge->s3d_tri.tvs = val; + break; + case 0xb538: + virge->s3d_tri.tus = val; + break; + case 0xb53c: + virge->s3d_tri.TdGdX = val >> 16; + virge->s3d_tri.TdBdX = val & 0xffff; + break; + case 0xb540: + virge->s3d_tri.TdAdX = val >> 16; + virge->s3d_tri.TdRdX = val & 0xffff; + break; + case 0xb544: + virge->s3d_tri.TdGdY = val >> 16; + virge->s3d_tri.TdBdY = val & 0xffff; + break; + case 0xb548: + virge->s3d_tri.TdAdY = val >> 16; + virge->s3d_tri.TdRdY = val & 0xffff; + break; + case 0xb54c: + virge->s3d_tri.tgs = (val >> 16) & 0xffff; + virge->s3d_tri.tbs = val & 0xffff; + break; + case 0xb550: + virge->s3d_tri.tas = (val >> 16) & 0xffff; + virge->s3d_tri.trs = val & 0xffff; + break; - case 0xb554: - virge->s3d_tri.TdZdX = val; - break; - case 0xb558: - virge->s3d_tri.TdZdY = val; - break; - case 0xb55c: - virge->s3d_tri.tzs = val; - break; - case 0xb560: - virge->s3d_tri.TdXdY12 = val; - break; - case 0xb564: - virge->s3d_tri.txend12 = val; - break; - case 0xb568: - virge->s3d_tri.TdXdY01 = val; - break; - case 0xb56c: - virge->s3d_tri.txend01 = val; - break; - case 0xb570: - virge->s3d_tri.TdXdY02 = val; - break; - case 0xb574: - virge->s3d_tri.txs = val; - break; - case 0xb578: - virge->s3d_tri.tys = val; - break; - case 0xb57c: - virge->s3d_tri.ty01 = (val >> 16) & 0x7ff; - virge->s3d_tri.ty12 = val & 0x7ff; - virge->s3d_tri.tlr = val >> 31; - if (virge->s3d_tri.cmd_set & CMD_SET_AE) { - queue_triangle(virge); - } - break; - } - } + case 0xb554: + virge->s3d_tri.TdZdX = val; + break; + case 0xb558: + virge->s3d_tri.TdZdY = val; + break; + case 0xb55c: + virge->s3d_tri.tzs = val; + break; + case 0xb560: + virge->s3d_tri.TdXdY12 = val; + break; + case 0xb564: + virge->s3d_tri.txend12 = val; + break; + case 0xb568: + virge->s3d_tri.TdXdY01 = val; + break; + case 0xb56c: + virge->s3d_tri.txend01 = val; + break; + case 0xb570: + virge->s3d_tri.TdXdY02 = val; + break; + case 0xb574: + virge->s3d_tri.txs = val; + break; + case 0xb578: + virge->s3d_tri.tys = val; + break; + case 0xb57c: + virge->s3d_tri.ty01 = (val >> 16) & 0x7ff; + virge->s3d_tri.ty12 = val & 0x7ff; + virge->s3d_tri.tlr = val >> 31; + if (virge->s3d_tri.cmd_set & CMD_SET_AE) { + queue_triangle(virge); + } + break; + } + } } static uint8_t s3_virge_mmio_read(uint32_t addr, void *p) { - virge_t *virge = (virge_t *)p; - uint8_t ret = 0xff; + virge_t *virge = (virge_t *) p; + uint8_t ret = 0xff; - s3_virge_log("[%04X:%08X]: MMIO ReadB addr = %04x\n", CS, cpu_state.pc, addr & 0xffff); + s3_virge_log("[%04X:%08X]: MMIO ReadB addr = %04x\n", CS, cpu_state.pc, addr & 0xffff); - switch (addr & 0xffff) - { - case 0x8505: - ret = 0; - if (virge->s3d_busy || virge->fifo_slot) { - ret = 0x10; - } else { - ret = 0x30; - } - if (virge->fifo_slot) - virge->fifo_slot--; - return ret; + switch (addr & 0xffff) { + case 0x8505: + ret = 0; + if (virge->s3d_busy || virge->fifo_slot) { + ret = 0x10; + } else { + ret = 0x30; + } + if (virge->fifo_slot) + virge->fifo_slot--; + return ret; - case 0x83b0: case 0x83b1: case 0x83b2: case 0x83b3: - case 0x83b4: case 0x83b5: case 0x83b6: case 0x83b7: - case 0x83b8: case 0x83b9: case 0x83ba: case 0x83bb: - case 0x83bc: case 0x83bd: case 0x83be: case 0x83bf: - case 0x83c0: case 0x83c1: case 0x83c2: case 0x83c3: - case 0x83c4: case 0x83c5: case 0x83c6: case 0x83c7: - case 0x83c8: case 0x83c9: case 0x83ca: case 0x83cb: - case 0x83cc: case 0x83cd: case 0x83ce: case 0x83cf: - case 0x83d0: case 0x83d1: case 0x83d2: case 0x83d3: - case 0x83d4: case 0x83d5: case 0x83d6: case 0x83d7: - case 0x83d8: case 0x83d9: case 0x83da: case 0x83db: - case 0x83dc: case 0x83dd: case 0x83de: case 0x83df: - return s3_virge_in(addr & 0x3ff, virge); + case 0x83b0: + case 0x83b1: + case 0x83b2: + case 0x83b3: + case 0x83b4: + case 0x83b5: + case 0x83b6: + case 0x83b7: + case 0x83b8: + case 0x83b9: + case 0x83ba: + case 0x83bb: + case 0x83bc: + case 0x83bd: + case 0x83be: + case 0x83bf: + case 0x83c0: + case 0x83c1: + case 0x83c2: + case 0x83c3: + case 0x83c4: + case 0x83c5: + case 0x83c6: + case 0x83c7: + case 0x83c8: + case 0x83c9: + case 0x83ca: + case 0x83cb: + case 0x83cc: + case 0x83cd: + case 0x83ce: + case 0x83cf: + case 0x83d0: + case 0x83d1: + case 0x83d2: + case 0x83d3: + case 0x83d4: + case 0x83d5: + case 0x83d6: + case 0x83d7: + case 0x83d8: + case 0x83d9: + case 0x83da: + case 0x83db: + case 0x83dc: + case 0x83dd: + case 0x83de: + case 0x83df: + return s3_virge_in(addr & 0x3ff, virge); - case 0x859c: - return virge->cmd_dma; + case 0x859c: + return virge->cmd_dma; - case 0xff20: case 0xff21: - ret = virge->serialport & ~(SERIAL_PORT_SCR | SERIAL_PORT_SDR); - if ((virge->serialport & SERIAL_PORT_SCW) && i2c_gpio_get_scl(virge->i2c)) - ret |= SERIAL_PORT_SCR; - if ((virge->serialport & SERIAL_PORT_SDW) && i2c_gpio_get_sda(virge->i2c)) - ret |= SERIAL_PORT_SDR; - return ret; - } - return 0xff; + case 0xff20: + case 0xff21: + ret = virge->serialport & ~(SERIAL_PORT_SCR | SERIAL_PORT_SDR); + if ((virge->serialport & SERIAL_PORT_SCW) && i2c_gpio_get_scl(virge->i2c)) + ret |= SERIAL_PORT_SCR; + if ((virge->serialport & SERIAL_PORT_SDW) && i2c_gpio_get_sda(virge->i2c)) + ret |= SERIAL_PORT_SDR; + return ret; + } + return 0xff; } static uint16_t s3_virge_mmio_read_w(uint32_t addr, void *p) { - virge_t *virge = (virge_t *)p; - uint16_t ret = 0xffff; + virge_t *virge = (virge_t *) p; + uint16_t ret = 0xffff; - s3_virge_log("[%04X:%08X]: MMIO ReadW addr = %04x\n", CS, cpu_state.pc, addr & 0xfffe); + s3_virge_log("[%04X:%08X]: MMIO ReadW addr = %04x\n", CS, cpu_state.pc, addr & 0xfffe); - switch (addr & 0xfffe) { - case 0x8504: - if (!virge->fifo_slot) - virge->subsys_stat |= INT_FIFO_EMP; - ret |= virge->subsys_stat; - if (virge->fifo_slot) - virge->fifo_slot--; - ret |= 0x30; /*A bit of a workaround at the moment.*/ - s3_virge_update_irqs(virge); - return ret; + switch (addr & 0xfffe) { + case 0x8504: + if (!virge->fifo_slot) + virge->subsys_stat |= INT_FIFO_EMP; + ret |= virge->subsys_stat; + if (virge->fifo_slot) + virge->fifo_slot--; + ret |= 0x30; /*A bit of a workaround at the moment.*/ + s3_virge_update_irqs(virge); + return ret; - case 0x859c: - return virge->cmd_dma; + case 0x859c: + return virge->cmd_dma; - default: - return s3_virge_mmio_read(addr, virge) | - (s3_virge_mmio_read(addr + 1, virge) << 8); - } + default: + return s3_virge_mmio_read(addr, virge) | (s3_virge_mmio_read(addr + 1, virge) << 8); + } - return 0xffff; + return 0xffff; } static uint32_t s3_virge_mmio_read_l(uint32_t addr, void *p) { - virge_t *virge = (virge_t *)p; - uint32_t ret = 0xffffffff; + virge_t *virge = (virge_t *) p; + uint32_t ret = 0xffffffff; - s3_virge_log("[%04X:%08X]: MMIO ReadL addr = %04x\n", CS, cpu_state.pc, addr & 0xfffc); + s3_virge_log("[%04X:%08X]: MMIO ReadL addr = %04x\n", CS, cpu_state.pc, addr & 0xfffc); - switch (addr & 0xfffc) { - case 0x8180: - ret = virge->streams.pri_ctrl; - break; - case 0x8184: - ret = virge->streams.chroma_ctrl; - break; - case 0x8190: - ret = virge->streams.sec_ctrl; - break; - case 0x8194: - ret = virge->streams.chroma_upper_bound; - break; - case 0x8198: - ret = virge->streams.sec_filter; - break; - case 0x81a0: - ret = virge->streams.blend_ctrl; - break; - case 0x81c0: - ret = virge->streams.pri_fb0; - break; - case 0x81c4: - ret = virge->streams.pri_fb1; - break; - case 0x81c8: - ret = virge->streams.pri_stride; - break; - case 0x81cc: - ret = virge->streams.buffer_ctrl; - break; - case 0x81d0: - ret = virge->streams.sec_fb0; - break; - case 0x81d4: - ret = virge->streams.sec_fb1; - break; - case 0x81d8: - ret = virge->streams.sec_stride; - break; - case 0x81dc: - ret = virge->streams.overlay_ctrl; - break; - case 0x81e0: - ret = virge->streams.k1_vert_scale; - break; - case 0x81e4: - ret = virge->streams.k2_vert_scale; - break; - case 0x81e8: - ret = virge->streams.dda_vert_accumulator; - break; - case 0x81ec: - ret = virge->streams.fifo_ctrl; - break; - case 0x81f0: - ret = virge->streams.pri_start; - break; - case 0x81f4: - ret = virge->streams.pri_size; - break; - case 0x81f8: - ret = virge->streams.sec_start; - break; - case 0x81fc: - ret = virge->streams.sec_size; - break; + switch (addr & 0xfffc) { + case 0x8180: + ret = virge->streams.pri_ctrl; + break; + case 0x8184: + ret = virge->streams.chroma_ctrl; + break; + case 0x8190: + ret = virge->streams.sec_ctrl; + break; + case 0x8194: + ret = virge->streams.chroma_upper_bound; + break; + case 0x8198: + ret = virge->streams.sec_filter; + break; + case 0x81a0: + ret = virge->streams.blend_ctrl; + break; + case 0x81c0: + ret = virge->streams.pri_fb0; + break; + case 0x81c4: + ret = virge->streams.pri_fb1; + break; + case 0x81c8: + ret = virge->streams.pri_stride; + break; + case 0x81cc: + ret = virge->streams.buffer_ctrl; + break; + case 0x81d0: + ret = virge->streams.sec_fb0; + break; + case 0x81d4: + ret = virge->streams.sec_fb1; + break; + case 0x81d8: + ret = virge->streams.sec_stride; + break; + case 0x81dc: + ret = virge->streams.overlay_ctrl; + break; + case 0x81e0: + ret = virge->streams.k1_vert_scale; + break; + case 0x81e4: + ret = virge->streams.k2_vert_scale; + break; + case 0x81e8: + ret = virge->streams.dda_vert_accumulator; + break; + case 0x81ec: + ret = virge->streams.fifo_ctrl; + break; + case 0x81f0: + ret = virge->streams.pri_start; + break; + case 0x81f4: + ret = virge->streams.pri_size; + break; + case 0x81f8: + ret = virge->streams.sec_start; + break; + case 0x81fc: + ret = virge->streams.sec_size; + break; - case 0x8504: - if (virge->s3d_busy || virge->fifo_slot) { - ret = (0x10 << 8); - } else { - ret = (0x10 << 8) | (1 << 13); - if (!virge->s3d_busy) - virge->subsys_stat |= INT_3DF_EMP; - if (!virge->fifo_slot) - virge->subsys_stat |= INT_FIFO_EMP; - } - ret |= virge->subsys_stat; - if (virge->fifo_slot) - virge->fifo_slot--; - s3_virge_update_irqs(virge); - break; + case 0x8504: + if (virge->s3d_busy || virge->fifo_slot) { + ret = (0x10 << 8); + } else { + ret = (0x10 << 8) | (1 << 13); + if (!virge->s3d_busy) + virge->subsys_stat |= INT_3DF_EMP; + if (!virge->fifo_slot) + virge->subsys_stat |= INT_FIFO_EMP; + } + ret |= virge->subsys_stat; + if (virge->fifo_slot) + virge->fifo_slot--; + s3_virge_update_irqs(virge); + break; - case 0x8590: - ret = virge->cmd_dma_base; - break; - case 0x8594: - break; - case 0x8598: - ret = virge->dma_ptr; - break; - case 0x859c: - ret = virge->cmd_dma; - break; + case 0x8590: + ret = virge->cmd_dma_base; + break; + case 0x8594: + break; + case 0x8598: + ret = virge->dma_ptr; + break; + case 0x859c: + ret = virge->cmd_dma; + break; - case 0xa4d4: - ret = virge->s3d.src_base; - break; - case 0xa4d8: - ret = virge->s3d.dest_base; - break; - case 0xa4dc: - ret = (virge->s3d.clip_l << 16) | virge->s3d.clip_r; - break; - case 0xa4e0: - ret = (virge->s3d.clip_t << 16) | virge->s3d.clip_b; - break; - case 0xa4e4: - ret = (virge->s3d.dest_str << 16) | virge->s3d.src_str; - break; - case 0xa4e8: case 0xace8: - ret = virge->s3d.mono_pat_0; - break; - case 0xa4ec: case 0xacec: - ret = virge->s3d.mono_pat_1; - break; - case 0xa4f0: - ret = virge->s3d.pat_bg_clr; - break; - case 0xa4f4: - ret = virge->s3d.pat_fg_clr; - break; - case 0xa4f8: - ret = virge->s3d.src_bg_clr; - break; - case 0xa4fc: - ret = virge->s3d.src_fg_clr; - break; - case 0xa500: - ret = virge->s3d.cmd_set; - break; - case 0xa504: - ret = (virge->s3d.r_width << 16) | virge->s3d.r_height; - break; - case 0xa508: - ret = (virge->s3d.rsrc_x << 16) | virge->s3d.rsrc_y; - break; - case 0xa50c: - ret = (virge->s3d.rdest_x << 16) | virge->s3d.rdest_y; - break; + case 0xa4d4: + ret = virge->s3d.src_base; + break; + case 0xa4d8: + ret = virge->s3d.dest_base; + break; + case 0xa4dc: + ret = (virge->s3d.clip_l << 16) | virge->s3d.clip_r; + break; + case 0xa4e0: + ret = (virge->s3d.clip_t << 16) | virge->s3d.clip_b; + break; + case 0xa4e4: + ret = (virge->s3d.dest_str << 16) | virge->s3d.src_str; + break; + case 0xa4e8: + case 0xace8: + ret = virge->s3d.mono_pat_0; + break; + case 0xa4ec: + case 0xacec: + ret = virge->s3d.mono_pat_1; + break; + case 0xa4f0: + ret = virge->s3d.pat_bg_clr; + break; + case 0xa4f4: + ret = virge->s3d.pat_fg_clr; + break; + case 0xa4f8: + ret = virge->s3d.src_bg_clr; + break; + case 0xa4fc: + ret = virge->s3d.src_fg_clr; + break; + case 0xa500: + ret = virge->s3d.cmd_set; + break; + case 0xa504: + ret = (virge->s3d.r_width << 16) | virge->s3d.r_height; + break; + case 0xa508: + ret = (virge->s3d.rsrc_x << 16) | virge->s3d.rsrc_y; + break; + case 0xa50c: + ret = (virge->s3d.rdest_x << 16) | virge->s3d.rdest_y; + break; - default: - ret = s3_virge_mmio_read(addr, virge) | - (s3_virge_mmio_read(addr + 1, virge) << 8) | - (s3_virge_mmio_read(addr + 2, virge) << 16) | - (s3_virge_mmio_read(addr + 3, virge) << 24); - break; - } + default: + ret = s3_virge_mmio_read(addr, virge) | (s3_virge_mmio_read(addr + 1, virge) << 8) | (s3_virge_mmio_read(addr + 2, virge) << 16) | (s3_virge_mmio_read(addr + 3, virge) << 24); + break; + } - s3_virge_log("MMIO ReadL addr = %04x, val = %08x\n", addr & 0xfffc, ret); - return ret; + s3_virge_log("MMIO ReadL addr = %04x, val = %08x\n", addr & 0xfffc, ret); + return ret; } static void s3_virge_mmio_write(uint32_t addr, uint8_t val, void *p) { - virge_t *virge = (virge_t *)p; - s3_virge_log("MMIO WriteB addr = %04x, val = %02x\n", addr & 0xffff, val); - if (((addr & 0xffff) >= 0x8590) || ((addr & 0xffff) < 0x8000)) { - if ((addr & 0xffff) == 0xff20) { - virge->serialport = val; - i2c_gpio_set(virge->i2c, !!(val & SERIAL_PORT_SCW), !!(val & SERIAL_PORT_SDW)); - } else - s3_virge_mmio_fifo_write(addr, val, virge); - } else { - switch (addr & 0xffff) { - case 0x83b0: case 0x83b1: case 0x83b2: case 0x83b3: - case 0x83b4: case 0x83b5: case 0x83b6: case 0x83b7: - case 0x83b8: case 0x83b9: case 0x83ba: case 0x83bb: - case 0x83bc: case 0x83bd: case 0x83be: case 0x83bf: - case 0x83c0: case 0x83c1: case 0x83c2: case 0x83c3: - case 0x83c4: case 0x83c5: case 0x83c6: case 0x83c7: - case 0x83c8: case 0x83c9: case 0x83ca: case 0x83cb: - case 0x83cc: case 0x83cd: case 0x83ce: case 0x83cf: - case 0x83d0: case 0x83d1: case 0x83d2: case 0x83d3: - case 0x83d4: case 0x83d5: case 0x83d6: case 0x83d7: - case 0x83d8: case 0x83d9: case 0x83da: case 0x83db: - case 0x83dc: case 0x83dd: case 0x83de: case 0x83df: - s3_virge_out(addr & 0x3ff, val, virge); - break; - } - } + virge_t *virge = (virge_t *) p; + s3_virge_log("MMIO WriteB addr = %04x, val = %02x\n", addr & 0xffff, val); + if (((addr & 0xffff) >= 0x8590) || ((addr & 0xffff) < 0x8000)) { + if ((addr & 0xffff) == 0xff20) { + virge->serialport = val; + i2c_gpio_set(virge->i2c, !!(val & SERIAL_PORT_SCW), !!(val & SERIAL_PORT_SDW)); + } else + s3_virge_mmio_fifo_write(addr, val, virge); + } else { + switch (addr & 0xffff) { + case 0x83b0: + case 0x83b1: + case 0x83b2: + case 0x83b3: + case 0x83b4: + case 0x83b5: + case 0x83b6: + case 0x83b7: + case 0x83b8: + case 0x83b9: + case 0x83ba: + case 0x83bb: + case 0x83bc: + case 0x83bd: + case 0x83be: + case 0x83bf: + case 0x83c0: + case 0x83c1: + case 0x83c2: + case 0x83c3: + case 0x83c4: + case 0x83c5: + case 0x83c6: + case 0x83c7: + case 0x83c8: + case 0x83c9: + case 0x83ca: + case 0x83cb: + case 0x83cc: + case 0x83cd: + case 0x83ce: + case 0x83cf: + case 0x83d0: + case 0x83d1: + case 0x83d2: + case 0x83d3: + case 0x83d4: + case 0x83d5: + case 0x83d6: + case 0x83d7: + case 0x83d8: + case 0x83d9: + case 0x83da: + case 0x83db: + case 0x83dc: + case 0x83dd: + case 0x83de: + case 0x83df: + s3_virge_out(addr & 0x3ff, val, virge); + break; + } + } } static void s3_virge_mmio_write_w(uint32_t addr, uint16_t val, void *p) { - virge_t *virge = (virge_t *)p; - s3_virge_log("[%04X:%08X]: MMIO WriteW addr = %04x, val = %04x\n", CS, cpu_state.pc, addr & 0xfffe, val); - if (((addr & 0xfffe) >= 0x8590) || ((addr & 0xfffe) < 0x8000)) - if ((addr & 0xfffe) == 0xff20) - s3_virge_mmio_write(addr, val, virge); - else - s3_virge_mmio_fifo_write_w(addr, val, virge); - else { - if ((addr & 0xfffe) == 0x83d4) { - s3_virge_mmio_write(addr, val, virge); - s3_virge_mmio_write(addr + 1, val >> 8, virge); - } - } + virge_t *virge = (virge_t *) p; + s3_virge_log("[%04X:%08X]: MMIO WriteW addr = %04x, val = %04x\n", CS, cpu_state.pc, addr & 0xfffe, val); + if (((addr & 0xfffe) >= 0x8590) || ((addr & 0xfffe) < 0x8000)) + if ((addr & 0xfffe) == 0xff20) + s3_virge_mmio_write(addr, val, virge); + else + s3_virge_mmio_fifo_write_w(addr, val, virge); + else { + if ((addr & 0xfffe) == 0x83d4) { + s3_virge_mmio_write(addr, val, virge); + s3_virge_mmio_write(addr + 1, val >> 8, virge); + } + } } static void s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *p) { - virge_t *virge = (virge_t *)p; - svga_t *svga = &virge->svga; + virge_t *virge = (virge_t *) p; + svga_t *svga = &virge->svga; - s3_virge_log("[%04X:%08X]: MMIO WriteL addr = %04x, val = %04x\n", CS, cpu_state.pc, addr & 0xfffc, val); - if (((addr & 0xfffc) >= 0x8590) || ((addr & 0xfffc) < 0x8000)) - if ((addr & 0xfffc) == 0xff20) - s3_virge_mmio_write(addr, val, virge); - else { - s3_virge_mmio_fifo_write_l(addr, val, virge); - } - else { - switch (addr & 0xfffc) { - case 0x8180: - virge->streams.pri_ctrl = val; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x8184: - virge->streams.chroma_ctrl = val; - break; - case 0x8190: - virge->streams.sec_ctrl = val; - virge->streams.dda_horiz_accumulator = val & 0xfff; - if (val & (1 << 11)) - virge->streams.dda_horiz_accumulator |= 0xfffff800; - virge->streams.sdif = (val >> 24) & 7; - break; - case 0x8194: - virge->streams.chroma_upper_bound = val; - break; - case 0x8198: - virge->streams.sec_filter = val; - virge->streams.k1_horiz_scale = val & 0x7ff; - if (val & (1 << 10)) - virge->streams.k1_horiz_scale |= 0xfffff800; - virge->streams.k2_horiz_scale = (val >> 16) & 0x7ff; - if ((val >> 16) & (1 << 10)) - virge->streams.k2_horiz_scale |= 0xfffff800; - break; - case 0x81a0: - virge->streams.blend_ctrl = val; - break; - case 0x81c0: - virge->streams.pri_fb0 = val & 0x7fffff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81c4: - virge->streams.pri_fb1 = val & 0x7fffff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81c8: - virge->streams.pri_stride = val & 0xfff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81cc: - virge->streams.buffer_ctrl = val; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81d0: - virge->streams.sec_fb0 = val; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81d4: - virge->streams.sec_fb1 = val; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81d8: - virge->streams.sec_stride = val; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81dc: - virge->streams.overlay_ctrl = val; - break; - case 0x81e0: - virge->streams.k1_vert_scale = val & 0x7ff; - if (val & (1 << 10)) - virge->streams.k1_vert_scale |= 0xfffff800; - break; - case 0x81e4: - virge->streams.k2_vert_scale = val & 0x7ff; - if (val & (1 << 10)) - virge->streams.k2_vert_scale |= 0xfffff800; - break; - case 0x81e8: - virge->streams.dda_vert_accumulator = val & 0xfff; - if (val & (1 << 11)) - virge->streams.dda_vert_accumulator |= 0xfffff800; - break; - case 0x81ec: - virge->streams.fifo_ctrl = val; - break; - case 0x81f0: - virge->streams.pri_start = val; - virge->streams.pri_x = (val >> 16) & 0x7ff; - virge->streams.pri_y = val & 0x7ff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81f4: - virge->streams.pri_size = val; - virge->streams.pri_w = (val >> 16) & 0x7ff; - virge->streams.pri_h = val & 0x7ff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81f8: - virge->streams.sec_start = val; - virge->streams.sec_x = (val >> 16) & 0x7ff; - virge->streams.sec_y = val & 0x7ff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; - case 0x81fc: - virge->streams.sec_size = val; - virge->streams.sec_w = (val >> 16) & 0x7ff; - virge->streams.sec_h = val & 0x7ff; - svga_recalctimings(svga); - svga->fullchange = changeframecount; - break; + s3_virge_log("[%04X:%08X]: MMIO WriteL addr = %04x, val = %04x\n", CS, cpu_state.pc, addr & 0xfffc, val); + if (((addr & 0xfffc) >= 0x8590) || ((addr & 0xfffc) < 0x8000)) + if ((addr & 0xfffc) == 0xff20) + s3_virge_mmio_write(addr, val, virge); + else { + s3_virge_mmio_fifo_write_l(addr, val, virge); + } + else { + switch (addr & 0xfffc) { + case 0x8180: + virge->streams.pri_ctrl = val; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x8184: + virge->streams.chroma_ctrl = val; + break; + case 0x8190: + virge->streams.sec_ctrl = val; + virge->streams.dda_horiz_accumulator = val & 0xfff; + if (val & (1 << 11)) + virge->streams.dda_horiz_accumulator |= 0xfffff800; + virge->streams.sdif = (val >> 24) & 7; + break; + case 0x8194: + virge->streams.chroma_upper_bound = val; + break; + case 0x8198: + virge->streams.sec_filter = val; + virge->streams.k1_horiz_scale = val & 0x7ff; + if (val & (1 << 10)) + virge->streams.k1_horiz_scale |= 0xfffff800; + virge->streams.k2_horiz_scale = (val >> 16) & 0x7ff; + if ((val >> 16) & (1 << 10)) + virge->streams.k2_horiz_scale |= 0xfffff800; + break; + case 0x81a0: + virge->streams.blend_ctrl = val; + break; + case 0x81c0: + virge->streams.pri_fb0 = val & 0x7fffff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81c4: + virge->streams.pri_fb1 = val & 0x7fffff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81c8: + virge->streams.pri_stride = val & 0xfff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81cc: + virge->streams.buffer_ctrl = val; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81d0: + virge->streams.sec_fb0 = val; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81d4: + virge->streams.sec_fb1 = val; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81d8: + virge->streams.sec_stride = val; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81dc: + virge->streams.overlay_ctrl = val; + break; + case 0x81e0: + virge->streams.k1_vert_scale = val & 0x7ff; + if (val & (1 << 10)) + virge->streams.k1_vert_scale |= 0xfffff800; + break; + case 0x81e4: + virge->streams.k2_vert_scale = val & 0x7ff; + if (val & (1 << 10)) + virge->streams.k2_vert_scale |= 0xfffff800; + break; + case 0x81e8: + virge->streams.dda_vert_accumulator = val & 0xfff; + if (val & (1 << 11)) + virge->streams.dda_vert_accumulator |= 0xfffff800; + break; + case 0x81ec: + virge->streams.fifo_ctrl = val; + break; + case 0x81f0: + virge->streams.pri_start = val; + virge->streams.pri_x = (val >> 16) & 0x7ff; + virge->streams.pri_y = val & 0x7ff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81f4: + virge->streams.pri_size = val; + virge->streams.pri_w = (val >> 16) & 0x7ff; + virge->streams.pri_h = val & 0x7ff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81f8: + virge->streams.sec_start = val; + virge->streams.sec_x = (val >> 16) & 0x7ff; + virge->streams.sec_y = val & 0x7ff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; + case 0x81fc: + virge->streams.sec_size = val; + virge->streams.sec_w = (val >> 16) & 0x7ff; + virge->streams.sec_h = val & 0x7ff; + svga_recalctimings(svga); + svga->fullchange = changeframecount; + break; - case 0x8504: - virge->subsys_stat &= ~(val & 0xff); - virge->subsys_cntl = (val >> 8); - s3_virge_update_irqs(virge); - break; + case 0x8504: + virge->subsys_stat &= ~(val & 0xff); + virge->subsys_cntl = (val >> 8); + s3_virge_update_irqs(virge); + break; - case 0x850c: - virge->advfunc_cntl = val & 0xff; - s3_virge_updatemapping(virge); - break; - } - } + case 0x850c: + virge->advfunc_cntl = val & 0xff; + s3_virge_updatemapping(virge); + break; + } + } } -#define READ(addr, val) \ - { \ - switch (bpp) \ - { \ - case 0: /*8 bpp*/ \ - val = vram[addr & virge->vram_mask]; \ - break; \ - case 1: /*16 bpp*/ \ - val = *(uint16_t *)&vram[addr & virge->vram_mask]; \ - break; \ - case 2: /*24 bpp*/ \ - val = (*(uint32_t *)&vram[addr & virge->vram_mask]) & 0xffffff; \ - break; \ - } \ - } +#define READ(addr, val) \ + { \ + switch (bpp) { \ + case 0: /*8 bpp*/ \ + val = vram[addr & virge->vram_mask]; \ + break; \ + case 1: /*16 bpp*/ \ + val = *(uint16_t *) &vram[addr & virge->vram_mask]; \ + break; \ + case 2: /*24 bpp*/ \ + val = (*(uint32_t *) &vram[addr & virge->vram_mask]) & 0xffffff; \ + break; \ + } \ + } -#define CLIP(x, y) \ - { \ - if ((virge->s3d.cmd_set & CMD_SET_HC) && \ - (x < virge->s3d.clip_l || \ - x > virge->s3d.clip_r || \ - y < virge->s3d.clip_t || \ - y > virge->s3d.clip_b)) \ - update = 0; \ - } +#define CLIP(x, y) \ + { \ + if ((virge->s3d.cmd_set & CMD_SET_HC) && (x < virge->s3d.clip_l || x > virge->s3d.clip_r || y < virge->s3d.clip_t || y > virge->s3d.clip_b)) \ + update = 0; \ + } -#define CLIP_3D(x, y) \ - { \ - if ((s3d_tri->cmd_set & CMD_SET_HC) && \ - (x < s3d_tri->clip_l || \ - x > s3d_tri->clip_r || \ - y < s3d_tri->clip_t || \ - y > s3d_tri->clip_b)) \ - update = 0; \ - } +#define CLIP_3D(x, y) \ + { \ + if ((s3d_tri->cmd_set & CMD_SET_HC) && (x < s3d_tri->clip_l || x > s3d_tri->clip_r || y < s3d_tri->clip_t || y > s3d_tri->clip_b)) \ + update = 0; \ + } +#define MIX() \ + { \ + int c; \ + for (c = 0; c < 24; c++) { \ + int d = (dest & (1 << c)) ? 1 : 0; \ + if (source & (1 << c)) \ + d |= 2; \ + if (pattern & (1 << c)) \ + d |= 4; \ + if (virge->s3d.rop & (1 << d)) \ + out |= (1 << c); \ + } \ + } -#define MIX() \ - { \ - int c; \ - for (c = 0; c < 24; c++) \ - { \ - int d = (dest & (1 << c)) ? 1 : 0; \ - if (source & (1 << c)) d |= 2; \ - if (pattern & (1 << c)) d |= 4; \ - if (virge->s3d.rop & (1 << d)) out |= (1 << c); \ - } \ - } +#define WRITE(addr, val) \ + { \ + switch (bpp) { \ + case 0: /*8 bpp*/ \ + vram[addr & virge->vram_mask] = val; \ + svga->changedvram[(addr & virge->vram_mask) >> 12] = changeframecount; \ + break; \ + case 1: /*16 bpp*/ \ + *(uint16_t *) &vram[addr & virge->vram_mask] = val; \ + svga->changedvram[(addr & virge->vram_mask) >> 12] = changeframecount; \ + break; \ + case 2: /*24 bpp*/ \ + *(uint32_t *) &vram[addr & virge->vram_mask] = (val & 0xffffff) | (vram[(addr + 3) & virge->vram_mask] << 24); \ + svga->changedvram[(addr & virge->vram_mask) >> 12] = changeframecount; \ + break; \ + } \ + } -#define WRITE(addr, val) \ - { \ - switch (bpp) \ - { \ - case 0: /*8 bpp*/ \ - vram[addr & virge->vram_mask] = val; \ - svga->changedvram[(addr & virge->vram_mask) >> 12] = changeframecount; \ - break; \ - case 1: /*16 bpp*/ \ - *(uint16_t *)&vram[addr & virge->vram_mask] = val; \ - svga->changedvram[(addr & virge->vram_mask) >> 12] = changeframecount; \ - break; \ - case 2: /*24 bpp*/ \ - *(uint32_t *)&vram[addr & virge->vram_mask] = (val & 0xffffff) | \ - (vram[(addr + 3) & virge->vram_mask] << 24); \ - svga->changedvram[(addr & virge->vram_mask) >> 12] = changeframecount; \ - break; \ - } \ - } - -static void s3_virge_bitblt(virge_t *virge, int count, uint32_t cpu_dat) +static void +s3_virge_bitblt(virge_t *virge, int count, uint32_t cpu_dat) { - svga_t *svga = &virge->svga; - uint8_t *vram = virge->svga.vram; - uint32_t mono_pattern[64]; - int count_mask; - int x_inc = (virge->s3d.cmd_set & CMD_SET_XP) ? 1 : -1; - int y_inc = (virge->s3d.cmd_set & CMD_SET_YP) ? 1 : -1; - int bpp; - int x_mul; - int cpu_dat_shift; - uint32_t *pattern_data; - uint32_t src_fg_clr, src_bg_clr; - uint32_t src_addr; - uint32_t dest_addr; - uint32_t source = 0, dest = 0, pattern; - uint32_t out = 0; - int update; + svga_t *svga = &virge->svga; + uint8_t *vram = virge->svga.vram; + uint32_t mono_pattern[64]; + int count_mask; + int x_inc = (virge->s3d.cmd_set & CMD_SET_XP) ? 1 : -1; + int y_inc = (virge->s3d.cmd_set & CMD_SET_YP) ? 1 : -1; + int bpp; + int x_mul; + int cpu_dat_shift; + uint32_t *pattern_data; + uint32_t src_fg_clr, src_bg_clr; + uint32_t src_addr; + uint32_t dest_addr; + uint32_t source = 0, dest = 0, pattern; + uint32_t out = 0; + int update; - switch (virge->s3d.cmd_set & CMD_SET_FORMAT_MASK) - { - case CMD_SET_FORMAT_8: - bpp = 0; - x_mul = 1; - cpu_dat_shift = 8; - pattern_data = virge->s3d.pattern_8; - src_fg_clr = virge->s3d.src_fg_clr & 0xff; - src_bg_clr = virge->s3d.src_bg_clr & 0xff; - break; - case CMD_SET_FORMAT_16: - bpp = 1; - x_mul = 2; - cpu_dat_shift = 16; - pattern_data = virge->s3d.pattern_16; - src_fg_clr = virge->s3d.src_fg_clr & 0xffff; - src_bg_clr = virge->s3d.src_bg_clr & 0xffff; - break; - case CMD_SET_FORMAT_24: - default: - bpp = 2; - x_mul = 3; - cpu_dat_shift = 24; - pattern_data = virge->s3d.pattern_24; - src_fg_clr = virge->s3d.src_fg_clr; - src_bg_clr = virge->s3d.src_bg_clr; - break; + switch (virge->s3d.cmd_set & CMD_SET_FORMAT_MASK) { + case CMD_SET_FORMAT_8: + bpp = 0; + x_mul = 1; + cpu_dat_shift = 8; + pattern_data = virge->s3d.pattern_8; + src_fg_clr = virge->s3d.src_fg_clr & 0xff; + src_bg_clr = virge->s3d.src_bg_clr & 0xff; + break; + case CMD_SET_FORMAT_16: + bpp = 1; + x_mul = 2; + cpu_dat_shift = 16; + pattern_data = virge->s3d.pattern_16; + src_fg_clr = virge->s3d.src_fg_clr & 0xffff; + src_bg_clr = virge->s3d.src_bg_clr & 0xffff; + break; + case CMD_SET_FORMAT_24: + default: + bpp = 2; + x_mul = 3; + cpu_dat_shift = 24; + pattern_data = virge->s3d.pattern_24; + src_fg_clr = virge->s3d.src_fg_clr; + src_bg_clr = virge->s3d.src_bg_clr; + break; + } + if (virge->s3d.cmd_set & CMD_SET_MP) + pattern_data = mono_pattern; + + switch (virge->s3d.cmd_set & CMD_SET_ITA_MASK) { + case CMD_SET_ITA_BYTE: + count_mask = ~0x7; + break; + case CMD_SET_ITA_WORD: + count_mask = ~0xf; + break; + case CMD_SET_ITA_DWORD: + default: + count_mask = ~0x1f; + break; + } + if (virge->s3d.cmd_set & CMD_SET_MP) { + int x, y; + for (y = 0; y < 4; y++) { + for (x = 0; x < 8; x++) { + if (virge->s3d.mono_pat_0 & (1 << (x + y * 8))) + mono_pattern[y * 8 + (7 - x)] = virge->s3d.pat_fg_clr; + else + mono_pattern[y * 8 + (7 - x)] = virge->s3d.pat_bg_clr; + if (virge->s3d.mono_pat_1 & (1 << (x + y * 8))) + mono_pattern[(y + 4) * 8 + (7 - x)] = virge->s3d.pat_fg_clr; + else + mono_pattern[(y + 4) * 8 + (7 - x)] = virge->s3d.pat_bg_clr; + } } - if (virge->s3d.cmd_set & CMD_SET_MP) - pattern_data = mono_pattern; + } + switch (virge->s3d.cmd_set & CMD_SET_COMMAND_MASK) { + case CMD_SET_COMMAND_BITBLT: + if (count == -1) { + virge->s3d.src_x = virge->s3d.rsrc_x; + virge->s3d.src_y = virge->s3d.rsrc_y; + virge->s3d.dest_x = virge->s3d.rdest_x; + virge->s3d.dest_y = virge->s3d.rdest_y; + virge->s3d.w = virge->s3d.r_width; + virge->s3d.h = virge->s3d.r_height; + virge->s3d.rop = (virge->s3d.cmd_set >> 17) & 0xff; + virge->s3d.data_left_count = 0; - switch (virge->s3d.cmd_set & CMD_SET_ITA_MASK) - { - case CMD_SET_ITA_BYTE: - count_mask = ~0x7; - break; - case CMD_SET_ITA_WORD: - count_mask = ~0xf; - break; - case CMD_SET_ITA_DWORD: - default: - count_mask = ~0x1f; - break; - } - if (virge->s3d.cmd_set & CMD_SET_MP) - { - int x, y; - for (y = 0; y < 4; y++) - { - for (x = 0; x < 8; x++) - { - if (virge->s3d.mono_pat_0 & (1 << (x + y*8))) - mono_pattern[y*8 + (7 - x)] = virge->s3d.pat_fg_clr; - else - mono_pattern[y*8 + (7 - x)] = virge->s3d.pat_bg_clr; - if (virge->s3d.mono_pat_1 & (1 << (x + y*8))) - mono_pattern[(y+4)*8 + (7 - x)] = virge->s3d.pat_fg_clr; - else - mono_pattern[(y+4)*8 + (7 - x)] = virge->s3d.pat_bg_clr; + s3_virge_log("BitBlt start src_x=%i,src_y=%i,dest_x=%i,dest_y=%i,w=%i,h=%i,rop=%02X,src_base=%x,dest_base=%x\n", + virge->s3d.src_x, + virge->s3d.src_y, + virge->s3d.dest_x, + virge->s3d.dest_y, + virge->s3d.w, + virge->s3d.h, + virge->s3d.rop, + virge->s3d.src_base, + virge->s3d.dest_base); + + if (virge->s3d.cmd_set & CMD_SET_IDS) + return; + } + if (!virge->s3d.h) + return; + while (count) { + src_addr = virge->s3d.src_base + (virge->s3d.src_x * x_mul) + (virge->s3d.src_y * virge->s3d.src_str); + dest_addr = virge->s3d.dest_base + (virge->s3d.dest_x * x_mul) + (virge->s3d.dest_y * virge->s3d.dest_str); + out = 0; + update = 1; + + switch (virge->s3d.cmd_set & (CMD_SET_MS | CMD_SET_IDS)) { + case 0: + case CMD_SET_MS: + READ(src_addr, source); + if ((virge->s3d.cmd_set & CMD_SET_TP) && source == src_fg_clr) + update = 0; + break; + case CMD_SET_IDS: + if (virge->s3d.data_left_count) { + /*Handle shifting for 24-bit data*/ + source = virge->s3d.data_left; + source |= ((cpu_dat << virge->s3d.data_left_count) & ~0xff000000); + cpu_dat >>= (cpu_dat_shift - virge->s3d.data_left_count); + count -= (cpu_dat_shift - virge->s3d.data_left_count); + virge->s3d.data_left_count = 0; + if (count < cpu_dat_shift) { + virge->s3d.data_left = cpu_dat; + virge->s3d.data_left_count = count; + count = 0; + } + } else { + source = cpu_dat; + cpu_dat >>= cpu_dat_shift; + count -= cpu_dat_shift; + if (count < cpu_dat_shift) { + virge->s3d.data_left = cpu_dat; + virge->s3d.data_left_count = count; + count = 0; + } } - } - } - switch (virge->s3d.cmd_set & CMD_SET_COMMAND_MASK) - { - case CMD_SET_COMMAND_BITBLT: - if (count == -1) - { - virge->s3d.src_x = virge->s3d.rsrc_x; - virge->s3d.src_y = virge->s3d.rsrc_y; - virge->s3d.dest_x = virge->s3d.rdest_x; - virge->s3d.dest_y = virge->s3d.rdest_y; - virge->s3d.w = virge->s3d.r_width; - virge->s3d.h = virge->s3d.r_height; - virge->s3d.rop = (virge->s3d.cmd_set >> 17) & 0xff; - virge->s3d.data_left_count = 0; - - s3_virge_log("BitBlt start src_x=%i,src_y=%i,dest_x=%i,dest_y=%i,w=%i,h=%i,rop=%02X,src_base=%x,dest_base=%x\n", - virge->s3d.src_x, - virge->s3d.src_y, - virge->s3d.dest_x, - virge->s3d.dest_y, - virge->s3d.w, - virge->s3d.h, - virge->s3d.rop, - virge->s3d.src_base, - virge->s3d.dest_base); - - if (virge->s3d.cmd_set & CMD_SET_IDS) - return; - } - if (!virge->s3d.h) - return; - while (count) - { - src_addr = virge->s3d.src_base + (virge->s3d.src_x * x_mul) + (virge->s3d.src_y * virge->s3d.src_str); - dest_addr = virge->s3d.dest_base + (virge->s3d.dest_x * x_mul) + (virge->s3d.dest_y * virge->s3d.dest_str); - out = 0; - update = 1; - - switch (virge->s3d.cmd_set & (CMD_SET_MS | CMD_SET_IDS)) - { - case 0: - case CMD_SET_MS: - READ(src_addr, source); - if ((virge->s3d.cmd_set & CMD_SET_TP) && source == src_fg_clr) - update = 0; - break; - case CMD_SET_IDS: - if (virge->s3d.data_left_count) - { - /*Handle shifting for 24-bit data*/ - source = virge->s3d.data_left; - source |= ((cpu_dat << virge->s3d.data_left_count) & ~0xff000000); - cpu_dat >>= (cpu_dat_shift - virge->s3d.data_left_count); - count -= (cpu_dat_shift - virge->s3d.data_left_count); - virge->s3d.data_left_count = 0; - if (count < cpu_dat_shift) - { - virge->s3d.data_left = cpu_dat; - virge->s3d.data_left_count = count; - count = 0; - } - } - else - { - source = cpu_dat; - cpu_dat >>= cpu_dat_shift; - count -= cpu_dat_shift; - if (count < cpu_dat_shift) - { - virge->s3d.data_left = cpu_dat; - virge->s3d.data_left_count = count; - count = 0; - } - } - if ((virge->s3d.cmd_set & CMD_SET_TP) && source == src_fg_clr) - update = 0; - break; - case CMD_SET_IDS | CMD_SET_MS: - source = (cpu_dat & (1 << 31)) ? src_fg_clr : src_bg_clr; - if ((virge->s3d.cmd_set & CMD_SET_TP) && !(cpu_dat & (1 << 31))) - update = 0; - cpu_dat <<= 1; - count--; - break; - } - - CLIP(virge->s3d.dest_x, virge->s3d.dest_y); - - if (update) - { - READ(dest_addr, dest); - pattern = pattern_data[(virge->s3d.dest_y & 7)*8 + (virge->s3d.dest_x & 7)]; - MIX(); - - WRITE(dest_addr, out); - } - - virge->s3d.src_x += x_inc; - virge->s3d.src_x &= 0x7ff; - virge->s3d.dest_x += x_inc; - virge->s3d.dest_x &= 0x7ff; - if (!virge->s3d.w) - { - virge->s3d.src_x = virge->s3d.rsrc_x; - virge->s3d.dest_x = virge->s3d.rdest_x; - virge->s3d.w = virge->s3d.r_width; - - virge->s3d.src_y += y_inc; - virge->s3d.dest_y += y_inc; - virge->s3d.h--; - - switch (virge->s3d.cmd_set & (CMD_SET_MS | CMD_SET_IDS)) - { - case CMD_SET_IDS: - cpu_dat >>= (count - (count & count_mask)); - count &= count_mask; - virge->s3d.data_left_count = 0; - break; - - case CMD_SET_IDS | CMD_SET_MS: - cpu_dat <<= (count - (count & count_mask)); - count &= count_mask; - break; - } - if (!virge->s3d.h) - { - return; - } - } - else - virge->s3d.w--; - } - break; - - case CMD_SET_COMMAND_RECTFILL: - /*No source, pattern = pat_fg_clr*/ - if (count == -1) - { - virge->s3d.src_x = virge->s3d.rsrc_x; - virge->s3d.src_y = virge->s3d.rsrc_y; - virge->s3d.dest_x = virge->s3d.rdest_x; - virge->s3d.dest_y = virge->s3d.rdest_y; - virge->s3d.w = virge->s3d.r_width; - virge->s3d.h = virge->s3d.r_height; - virge->s3d.rop = (virge->s3d.cmd_set >> 17) & 0xff; - - s3_virge_log("RctFll start %i,%i %i,%i %02X %08x\n", virge->s3d.dest_x, - virge->s3d.dest_y, - virge->s3d.w, - virge->s3d.h, - virge->s3d.rop, virge->s3d.dest_base); - } - - while (count && virge->s3d.h) - { - source = virge->s3d.pat_fg_clr; - dest_addr = virge->s3d.dest_base + (virge->s3d.dest_x * x_mul) + (virge->s3d.dest_y * virge->s3d.dest_str); - pattern = virge->s3d.pat_fg_clr; - out = 0; - update = 1; - - CLIP(virge->s3d.dest_x, virge->s3d.dest_y); - - if (update) - { - READ(dest_addr, dest); - - MIX(); - - WRITE(dest_addr, out); - } - - virge->s3d.src_x += x_inc; - virge->s3d.src_x &= 0x7ff; - virge->s3d.dest_x += x_inc; - virge->s3d.dest_x &= 0x7ff; - if (!virge->s3d.w) - { - virge->s3d.src_x = virge->s3d.rsrc_x; - virge->s3d.dest_x = virge->s3d.rdest_x; - virge->s3d.w = virge->s3d.r_width; - - virge->s3d.src_y += y_inc; - virge->s3d.dest_y += y_inc; - virge->s3d.h--; - if (!virge->s3d.h) - { - return; - } - } - else - virge->s3d.w--; + if ((virge->s3d.cmd_set & CMD_SET_TP) && source == src_fg_clr) + update = 0; + break; + case CMD_SET_IDS | CMD_SET_MS: + source = (cpu_dat & (1 << 31)) ? src_fg_clr : src_bg_clr; + if ((virge->s3d.cmd_set & CMD_SET_TP) && !(cpu_dat & (1 << 31))) + update = 0; + cpu_dat <<= 1; count--; + break; } - break; - case CMD_SET_COMMAND_LINE: - if (count == -1) - { - virge->s3d.dest_x = virge->s3d.lxstart; - virge->s3d.dest_y = virge->s3d.lystart; - virge->s3d.h = virge->s3d.lycnt; - virge->s3d.rop = (virge->s3d.cmd_set >> 17) & 0xff; + CLIP(virge->s3d.dest_x, virge->s3d.dest_y); + + if (update) { + READ(dest_addr, dest); + pattern = pattern_data[(virge->s3d.dest_y & 7) * 8 + (virge->s3d.dest_x & 7)]; + MIX(); + + WRITE(dest_addr, out); } - while (virge->s3d.h) - { - int x; - int new_x; - int first_pixel = 1; - x = virge->s3d.dest_x >> 20; + virge->s3d.src_x += x_inc; + virge->s3d.src_x &= 0x7ff; + virge->s3d.dest_x += x_inc; + virge->s3d.dest_x &= 0x7ff; + if (!virge->s3d.w) { + virge->s3d.src_x = virge->s3d.rsrc_x; + virge->s3d.dest_x = virge->s3d.rdest_x; + virge->s3d.w = virge->s3d.r_width; - if (virge->s3d.h == virge->s3d.lycnt && - ((virge->s3d.line_dir && x > virge->s3d.lxend0) || - (!virge->s3d.line_dir && x < virge->s3d.lxend0))) - x = virge->s3d.lxend0; + virge->s3d.src_y += y_inc; + virge->s3d.dest_y += y_inc; + virge->s3d.h--; - if (virge->s3d.h == 1) - new_x = virge->s3d.lxend1 + (virge->s3d.line_dir ? 1 : -1); - else - new_x = (virge->s3d.dest_x + virge->s3d.ldx) >> 20; + switch (virge->s3d.cmd_set & (CMD_SET_MS | CMD_SET_IDS)) { + case CMD_SET_IDS: + cpu_dat >>= (count - (count & count_mask)); + count &= count_mask; + virge->s3d.data_left_count = 0; + break; + case CMD_SET_IDS | CMD_SET_MS: + cpu_dat <<= (count - (count & count_mask)); + count &= count_mask; + break; + } + if (!virge->s3d.h) { + return; + } + } else + virge->s3d.w--; + } + break; - if ((virge->s3d.line_dir && x > new_x) || - (!virge->s3d.line_dir && x < new_x)) - goto skip_line; + case CMD_SET_COMMAND_RECTFILL: + /*No source, pattern = pat_fg_clr*/ + if (count == -1) { + virge->s3d.src_x = virge->s3d.rsrc_x; + virge->s3d.src_y = virge->s3d.rsrc_y; + virge->s3d.dest_x = virge->s3d.rdest_x; + virge->s3d.dest_y = virge->s3d.rdest_y; + virge->s3d.w = virge->s3d.r_width; + virge->s3d.h = virge->s3d.r_height; + virge->s3d.rop = (virge->s3d.cmd_set >> 17) & 0xff; - do - { - uint32_t dest_addr = virge->s3d.dest_base + (x * x_mul) + (virge->s3d.dest_y * virge->s3d.dest_str); - uint32_t source = 0, dest = 0, pattern; - uint32_t out = 0; - int update = 1; + s3_virge_log("RctFll start %i,%i %i,%i %02X %08x\n", virge->s3d.dest_x, + virge->s3d.dest_y, + virge->s3d.w, + virge->s3d.h, + virge->s3d.rop, virge->s3d.dest_base); + } - if ((virge->s3d.h == virge->s3d.lycnt || !first_pixel) && - ((virge->s3d.line_dir && x < virge->s3d.lxend0) || - (!virge->s3d.line_dir && x > virge->s3d.lxend0))) - update = 0; + while (count && virge->s3d.h) { + source = virge->s3d.pat_fg_clr; + dest_addr = virge->s3d.dest_base + (virge->s3d.dest_x * x_mul) + (virge->s3d.dest_y * virge->s3d.dest_str); + pattern = virge->s3d.pat_fg_clr; + out = 0; + update = 1; - if ((virge->s3d.h == 1 || !first_pixel) && - ((virge->s3d.line_dir && x > virge->s3d.lxend1) || - (!virge->s3d.line_dir && x < virge->s3d.lxend1))) - update = 0; + CLIP(virge->s3d.dest_x, virge->s3d.dest_y); - CLIP(x, virge->s3d.dest_y); + if (update) { + READ(dest_addr, dest); - if (update) - { - READ(dest_addr, dest); - pattern = virge->s3d.pat_fg_clr; + MIX(); - MIX(); + WRITE(dest_addr, out); + } - WRITE(dest_addr, out); - } + virge->s3d.src_x += x_inc; + virge->s3d.src_x &= 0x7ff; + virge->s3d.dest_x += x_inc; + virge->s3d.dest_x &= 0x7ff; + if (!virge->s3d.w) { + virge->s3d.src_x = virge->s3d.rsrc_x; + virge->s3d.dest_x = virge->s3d.rdest_x; + virge->s3d.w = virge->s3d.r_width; - if (x < new_x) - x++; - else if (x > new_x) - x--; - first_pixel = 0; - } while (x != new_x); + virge->s3d.src_y += y_inc; + virge->s3d.dest_y += y_inc; + virge->s3d.h--; + if (!virge->s3d.h) { + return; + } + } else + virge->s3d.w--; + count--; + } + break; + + case CMD_SET_COMMAND_LINE: + if (count == -1) { + virge->s3d.dest_x = virge->s3d.lxstart; + virge->s3d.dest_y = virge->s3d.lystart; + virge->s3d.h = virge->s3d.lycnt; + virge->s3d.rop = (virge->s3d.cmd_set >> 17) & 0xff; + } + while (virge->s3d.h) { + int x; + int new_x; + int first_pixel = 1; + + x = virge->s3d.dest_x >> 20; + + if (virge->s3d.h == virge->s3d.lycnt && ((virge->s3d.line_dir && x > virge->s3d.lxend0) || (!virge->s3d.line_dir && x < virge->s3d.lxend0))) + x = virge->s3d.lxend0; + + if (virge->s3d.h == 1) + new_x = virge->s3d.lxend1 + (virge->s3d.line_dir ? 1 : -1); + else + new_x = (virge->s3d.dest_x + virge->s3d.ldx) >> 20; + + if ((virge->s3d.line_dir && x > new_x) || (!virge->s3d.line_dir && x < new_x)) + goto skip_line; + + do { + uint32_t dest_addr = virge->s3d.dest_base + (x * x_mul) + (virge->s3d.dest_y * virge->s3d.dest_str); + uint32_t source = 0, dest = 0, pattern; + uint32_t out = 0; + int update = 1; + + if ((virge->s3d.h == virge->s3d.lycnt || !first_pixel) && ((virge->s3d.line_dir && x < virge->s3d.lxend0) || (!virge->s3d.line_dir && x > virge->s3d.lxend0))) + update = 0; + + if ((virge->s3d.h == 1 || !first_pixel) && ((virge->s3d.line_dir && x > virge->s3d.lxend1) || (!virge->s3d.line_dir && x < virge->s3d.lxend1))) + update = 0; + + CLIP(x, virge->s3d.dest_y); + + if (update) { + READ(dest_addr, dest); + pattern = virge->s3d.pat_fg_clr; + + MIX(); + + WRITE(dest_addr, out); + } + + if (x < new_x) + x++; + else if (x > new_x) + x--; + first_pixel = 0; + } while (x != new_x); skip_line: - virge->s3d.dest_x += virge->s3d.ldx; - virge->s3d.dest_y--; - virge->s3d.h--; - } - break; + virge->s3d.dest_x += virge->s3d.ldx; + virge->s3d.dest_y--; + virge->s3d.h--; + } + break; - case CMD_SET_COMMAND_POLY: - /*No source*/ - if (virge->s3d.pycnt & (1 << 28)) - virge->s3d.dest_r = virge->s3d.prxstart; - if (virge->s3d.pycnt & (1 << 29)) - virge->s3d.dest_l = virge->s3d.plxstart; - virge->s3d.h = virge->s3d.pycnt & 0x7ff; - virge->s3d.rop = (virge->s3d.cmd_set >> 17) & 0xff; - while (virge->s3d.h) - { - int x = virge->s3d.dest_l >> 20; - int xend = virge->s3d.dest_r >> 20; - int y = virge->s3d.pystart & 0x7ff; - int xdir = (x < xend) ? 1 : -1; - do - { - uint32_t dest_addr = virge->s3d.dest_base + (x * x_mul) + (y * virge->s3d.dest_str); - uint32_t source = 0, dest = 0, pattern; - uint32_t out = 0; - int update = 1; + case CMD_SET_COMMAND_POLY: + /*No source*/ + if (virge->s3d.pycnt & (1 << 28)) + virge->s3d.dest_r = virge->s3d.prxstart; + if (virge->s3d.pycnt & (1 << 29)) + virge->s3d.dest_l = virge->s3d.plxstart; + virge->s3d.h = virge->s3d.pycnt & 0x7ff; + virge->s3d.rop = (virge->s3d.cmd_set >> 17) & 0xff; + while (virge->s3d.h) { + int x = virge->s3d.dest_l >> 20; + int xend = virge->s3d.dest_r >> 20; + int y = virge->s3d.pystart & 0x7ff; + int xdir = (x < xend) ? 1 : -1; + do { + uint32_t dest_addr = virge->s3d.dest_base + (x * x_mul) + (y * virge->s3d.dest_str); + uint32_t source = 0, dest = 0, pattern; + uint32_t out = 0; + int update = 1; - CLIP(x, y); + CLIP(x, y); - if (update) - { - READ(dest_addr, dest); - pattern = pattern_data[(y & 7)*8 + (x & 7)]; - MIX(); + if (update) { + READ(dest_addr, dest); + pattern = pattern_data[(y & 7) * 8 + (x & 7)]; + MIX(); - WRITE(dest_addr, out); - } + WRITE(dest_addr, out); + } - x = (x + xdir) & 0x7ff; - } - while (x != (xend + xdir)); + x = (x + xdir) & 0x7ff; + } while (x != (xend + xdir)); - virge->s3d.dest_l += virge->s3d.pldx; - virge->s3d.dest_r += virge->s3d.prdx; - virge->s3d.h--; - virge->s3d.pystart = (virge->s3d.pystart - 1) & 0x7ff; - } - break; + virge->s3d.dest_l += virge->s3d.pldx; + virge->s3d.dest_r += virge->s3d.prdx; + virge->s3d.h--; + virge->s3d.pystart = (virge->s3d.pystart - 1) & 0x7ff; + } + break; - case CMD_SET_COMMAND_NOP: - break; - } + case CMD_SET_COMMAND_NOP: + break; + } } -#define RGB15_TO_24(val, r, g, b) b = ((val & 0x001f) << 3) | ((val & 0x001f) >> 2); \ - g = ((val & 0x03e0) >> 2) | ((val & 0x03e0) >> 7); \ - r = ((val & 0x7c00) >> 7) | ((val & 0x7c00) >> 12); +#define RGB15_TO_24(val, r, g, b) \ + b = ((val & 0x001f) << 3) | ((val & 0x001f) >> 2); \ + g = ((val & 0x03e0) >> 2) | ((val & 0x03e0) >> 7); \ + r = ((val & 0x7c00) >> 7) | ((val & 0x7c00) >> 12); -#define RGB24_TO_24(val, r, g, b) b = val & 0xff; \ - g = (val & 0xff00) >> 8; \ - r = (val & 0xff0000) >> 16 +#define RGB24_TO_24(val, r, g, b) \ + b = val & 0xff; \ + g = (val & 0xff00) >> 8; \ + r = (val & 0xff0000) >> 16 -#define RGB15(r, g, b, dest) \ - if (virge->dithering_enabled) \ - { \ - int add = dither[_y & 3][_x & 3]; \ - int _r = (r > 248) ? 248 : r+add; \ - int _g = (g > 248) ? 248 : g+add; \ - int _b = (b > 248) ? 248 : b+add; \ - dest = ((_b >> 3) & 0x1f) | (((_g >> 3) & 0x1f) << 5) | (((_r >> 3) & 0x1f) << 10); \ - } \ - else \ - dest = ((b >> 3) & 0x1f) | (((g >> 3) & 0x1f) << 5) | (((r >> 3) & 0x1f) << 10) +#define RGB15(r, g, b, dest) \ + if (virge->dithering_enabled) { \ + int add = dither[_y & 3][_x & 3]; \ + int _r = (r > 248) ? 248 : r + add; \ + int _g = (g > 248) ? 248 : g + add; \ + int _b = (b > 248) ? 248 : b + add; \ + dest = ((_b >> 3) & 0x1f) | (((_g >> 3) & 0x1f) << 5) | (((_r >> 3) & 0x1f) << 10); \ + } else \ + dest = ((b >> 3) & 0x1f) | (((g >> 3) & 0x1f) << 5) | (((r >> 3) & 0x1f) << 10) #define RGB24(r, g, b) ((b) | ((g) << 8) | ((r) << 16)) -typedef struct rgba_t -{ - int r, g, b, a; +typedef struct rgba_t { + int r, g, b, a; } rgba_t; -typedef struct s3d_state_t -{ - int32_t r, g, b, a, u, v, d, w; +typedef struct s3d_state_t { + int32_t r, g, b, a, u, v, d, w; - int32_t base_r, base_g, base_b, base_a, base_u, base_v, base_d, base_w; + int32_t base_r, base_g, base_b, base_a, base_u, base_v, base_d, base_w; - uint32_t base_z; + uint32_t base_z; - uint32_t tbu, tbv; + uint32_t tbu, tbv; - uint32_t cmd_set; - int max_d; + uint32_t cmd_set; + int max_d; - uint16_t *texture[10]; + uint16_t *texture[10]; - uint32_t tex_bdr_clr; + uint32_t tex_bdr_clr; - int32_t x1, x2; - int y; + int32_t x1, x2; + int y; - rgba_t dest_rgba; + rgba_t dest_rgba; } s3d_state_t; -typedef struct s3d_texture_state_t -{ - int level; - int texture_shift; +typedef struct s3d_texture_state_t { + int level; + int texture_shift; - int32_t u, v; + int32_t u, v; } s3d_texture_state_t; static void (*tex_read)(s3d_state_t *state, s3d_texture_state_t *texture_state, rgba_t *out); @@ -2307,1915 +2454,2003 @@ static void (*dest_pixel)(s3d_state_t *state); static int _x, _y; -static void tex_ARGB1555(s3d_state_t *state, s3d_texture_state_t *texture_state, rgba_t *out) +static void +tex_ARGB1555(s3d_state_t *state, s3d_texture_state_t *texture_state, rgba_t *out) { - int offset = ((texture_state->u & 0x7fc0000) >> texture_state->texture_shift) + - (((texture_state->v & 0x7fc0000) >> texture_state->texture_shift) << texture_state->level); - uint16_t val = state->texture[texture_state->level][offset]; + int offset = ((texture_state->u & 0x7fc0000) >> texture_state->texture_shift) + (((texture_state->v & 0x7fc0000) >> texture_state->texture_shift) << texture_state->level); + uint16_t val = state->texture[texture_state->level][offset]; - out->r = ((val & 0x7c00) >> 7) | ((val & 0x7000) >> 12); - out->g = ((val & 0x03e0) >> 2) | ((val & 0x0380) >> 7); - out->b = ((val & 0x001f) << 3) | ((val & 0x001c) >> 2); - out->a = (val & 0x8000) ? 0xff : 0; + out->r = ((val & 0x7c00) >> 7) | ((val & 0x7000) >> 12); + out->g = ((val & 0x03e0) >> 2) | ((val & 0x0380) >> 7); + out->b = ((val & 0x001f) << 3) | ((val & 0x001c) >> 2); + out->a = (val & 0x8000) ? 0xff : 0; } -static void tex_ARGB1555_nowrap(s3d_state_t *state, s3d_texture_state_t *texture_state, rgba_t *out) +static void +tex_ARGB1555_nowrap(s3d_state_t *state, s3d_texture_state_t *texture_state, rgba_t *out) { - int offset = ((texture_state->u & 0x7fc0000) >> texture_state->texture_shift) + - (((texture_state->v & 0x7fc0000) >> texture_state->texture_shift) << texture_state->level); - uint16_t val = state->texture[texture_state->level][offset]; + int offset = ((texture_state->u & 0x7fc0000) >> texture_state->texture_shift) + (((texture_state->v & 0x7fc0000) >> texture_state->texture_shift) << texture_state->level); + uint16_t val = state->texture[texture_state->level][offset]; - if (((texture_state->u | texture_state->v) & 0xf8000000) == 0xf8000000) - val = state->tex_bdr_clr; + if (((texture_state->u | texture_state->v) & 0xf8000000) == 0xf8000000) + val = state->tex_bdr_clr; - out->r = ((val & 0x7c00) >> 7) | ((val & 0x7000) >> 12); - out->g = ((val & 0x03e0) >> 2) | ((val & 0x0380) >> 7); - out->b = ((val & 0x001f) << 3) | ((val & 0x001c) >> 2); - out->a = (val & 0x8000) ? 0xff : 0; + out->r = ((val & 0x7c00) >> 7) | ((val & 0x7000) >> 12); + out->g = ((val & 0x03e0) >> 2) | ((val & 0x0380) >> 7); + out->b = ((val & 0x001f) << 3) | ((val & 0x001c) >> 2); + out->a = (val & 0x8000) ? 0xff : 0; } -static void tex_ARGB4444(s3d_state_t *state, s3d_texture_state_t *texture_state, rgba_t *out) +static void +tex_ARGB4444(s3d_state_t *state, s3d_texture_state_t *texture_state, rgba_t *out) { - int offset = ((texture_state->u & 0x7fc0000) >> texture_state->texture_shift) + - (((texture_state->v & 0x7fc0000) >> texture_state->texture_shift) << texture_state->level); - uint16_t val = state->texture[texture_state->level][offset]; + int offset = ((texture_state->u & 0x7fc0000) >> texture_state->texture_shift) + (((texture_state->v & 0x7fc0000) >> texture_state->texture_shift) << texture_state->level); + uint16_t val = state->texture[texture_state->level][offset]; - out->r = ((val & 0x0f00) >> 4) | ((val & 0x0f00) >> 8); - out->g = (val & 0x00f0) | ((val & 0x00f0) >> 4); - out->b = ((val & 0x000f) << 4) | (val & 0x000f); - out->a = ((val & 0xf000) >> 8) | ((val & 0xf000) >> 12); + out->r = ((val & 0x0f00) >> 4) | ((val & 0x0f00) >> 8); + out->g = (val & 0x00f0) | ((val & 0x00f0) >> 4); + out->b = ((val & 0x000f) << 4) | (val & 0x000f); + out->a = ((val & 0xf000) >> 8) | ((val & 0xf000) >> 12); } -static void tex_ARGB4444_nowrap(s3d_state_t *state, s3d_texture_state_t *texture_state, rgba_t *out) +static void +tex_ARGB4444_nowrap(s3d_state_t *state, s3d_texture_state_t *texture_state, rgba_t *out) { - int offset = ((texture_state->u & 0x7fc0000) >> texture_state->texture_shift) + - (((texture_state->v & 0x7fc0000) >> texture_state->texture_shift) << texture_state->level); - uint16_t val = state->texture[texture_state->level][offset]; + int offset = ((texture_state->u & 0x7fc0000) >> texture_state->texture_shift) + (((texture_state->v & 0x7fc0000) >> texture_state->texture_shift) << texture_state->level); + uint16_t val = state->texture[texture_state->level][offset]; - if (((texture_state->u | texture_state->v) & 0xf8000000) == 0xf8000000) - val = state->tex_bdr_clr; + if (((texture_state->u | texture_state->v) & 0xf8000000) == 0xf8000000) + val = state->tex_bdr_clr; - out->r = ((val & 0x0f00) >> 4) | ((val & 0x0f00) >> 8); - out->g = (val & 0x00f0) | ((val & 0x00f0) >> 4); - out->b = ((val & 0x000f) << 4) | (val & 0x000f); - out->a = ((val & 0xf000) >> 8) | ((val & 0xf000) >> 12); + out->r = ((val & 0x0f00) >> 4) | ((val & 0x0f00) >> 8); + out->g = (val & 0x00f0) | ((val & 0x00f0) >> 4); + out->b = ((val & 0x000f) << 4) | (val & 0x000f); + out->a = ((val & 0xf000) >> 8) | ((val & 0xf000) >> 12); } -static void tex_ARGB8888(s3d_state_t *state, s3d_texture_state_t *texture_state, rgba_t *out) +static void +tex_ARGB8888(s3d_state_t *state, s3d_texture_state_t *texture_state, rgba_t *out) { - int offset = ((texture_state->u & 0x7fc0000) >> texture_state->texture_shift) + - (((texture_state->v & 0x7fc0000) >> texture_state->texture_shift) << texture_state->level); - uint32_t val = ((uint32_t *)state->texture[texture_state->level])[offset]; + int offset = ((texture_state->u & 0x7fc0000) >> texture_state->texture_shift) + (((texture_state->v & 0x7fc0000) >> texture_state->texture_shift) << texture_state->level); + uint32_t val = ((uint32_t *) state->texture[texture_state->level])[offset]; - out->r = (val >> 16) & 0xff; - out->g = (val >> 8) & 0xff; - out->b = val & 0xff; - out->a = (val >> 24) & 0xff; + out->r = (val >> 16) & 0xff; + out->g = (val >> 8) & 0xff; + out->b = val & 0xff; + out->a = (val >> 24) & 0xff; } -static void tex_ARGB8888_nowrap(s3d_state_t *state, s3d_texture_state_t *texture_state, rgba_t *out) +static void +tex_ARGB8888_nowrap(s3d_state_t *state, s3d_texture_state_t *texture_state, rgba_t *out) { - int offset = ((texture_state->u & 0x7fc0000) >> texture_state->texture_shift) + - (((texture_state->v & 0x7fc0000) >> texture_state->texture_shift) << texture_state->level); - uint32_t val = ((uint32_t *)state->texture[texture_state->level])[offset]; + int offset = ((texture_state->u & 0x7fc0000) >> texture_state->texture_shift) + (((texture_state->v & 0x7fc0000) >> texture_state->texture_shift) << texture_state->level); + uint32_t val = ((uint32_t *) state->texture[texture_state->level])[offset]; - if (((texture_state->u | texture_state->v) & 0xf8000000) == 0xf8000000) - val = state->tex_bdr_clr; + if (((texture_state->u | texture_state->v) & 0xf8000000) == 0xf8000000) + val = state->tex_bdr_clr; - out->r = (val >> 16) & 0xff; - out->g = (val >> 8) & 0xff; - out->b = val & 0xff; - out->a = (val >> 24) & 0xff; + out->r = (val >> 16) & 0xff; + out->g = (val >> 8) & 0xff; + out->b = val & 0xff; + out->a = (val >> 24) & 0xff; } -static void tex_sample_normal(s3d_state_t *state) +static void +tex_sample_normal(s3d_state_t *state) { - s3d_texture_state_t texture_state; + s3d_texture_state_t texture_state; - texture_state.level = state->max_d; - texture_state.texture_shift = 18 + (9 - texture_state.level); - texture_state.u = state->u + state->tbu; - texture_state.v = state->v + state->tbv; + texture_state.level = state->max_d; + texture_state.texture_shift = 18 + (9 - texture_state.level); + texture_state.u = state->u + state->tbu; + texture_state.v = state->v + state->tbv; - tex_read(state, &texture_state, &state->dest_rgba); + tex_read(state, &texture_state, &state->dest_rgba); } -static void tex_sample_normal_filter(s3d_state_t *state) +static void +tex_sample_normal_filter(s3d_state_t *state) { - s3d_texture_state_t texture_state; - int tex_offset; - rgba_t tex_samples[4]; - int du, dv; - int d[4]; + s3d_texture_state_t texture_state; + int tex_offset; + rgba_t tex_samples[4]; + int du, dv; + int d[4]; - texture_state.level = state->max_d; - texture_state.texture_shift = 18 + (9 - texture_state.level); - tex_offset = 1 << texture_state.texture_shift; + texture_state.level = state->max_d; + texture_state.texture_shift = 18 + (9 - texture_state.level); + tex_offset = 1 << texture_state.texture_shift; - texture_state.u = state->u + state->tbu; - texture_state.v = state->v + state->tbv; - tex_read(state, &texture_state, &tex_samples[0]); - du = (texture_state.u >> (texture_state.texture_shift - 8)) & 0xff; - dv = (texture_state.v >> (texture_state.texture_shift - 8)) & 0xff; + texture_state.u = state->u + state->tbu; + texture_state.v = state->v + state->tbv; + tex_read(state, &texture_state, &tex_samples[0]); + du = (texture_state.u >> (texture_state.texture_shift - 8)) & 0xff; + dv = (texture_state.v >> (texture_state.texture_shift - 8)) & 0xff; - texture_state.u = state->u + state->tbu + tex_offset; - texture_state.v = state->v + state->tbv; - tex_read(state, &texture_state, &tex_samples[1]); + texture_state.u = state->u + state->tbu + tex_offset; + texture_state.v = state->v + state->tbv; + tex_read(state, &texture_state, &tex_samples[1]); - texture_state.u = state->u + state->tbu; - texture_state.v = state->v + state->tbv + tex_offset; - tex_read(state, &texture_state, &tex_samples[2]); + texture_state.u = state->u + state->tbu; + texture_state.v = state->v + state->tbv + tex_offset; + tex_read(state, &texture_state, &tex_samples[2]); - texture_state.u = state->u + state->tbu + tex_offset; - texture_state.v = state->v + state->tbv + tex_offset; - tex_read(state, &texture_state, &tex_samples[3]); + texture_state.u = state->u + state->tbu + tex_offset; + texture_state.v = state->v + state->tbv + tex_offset; + tex_read(state, &texture_state, &tex_samples[3]); - d[0] = (256 - du) * (256 - dv); - d[1] = du * (256 - dv); - d[2] = (256 - du) * dv; - d[3] = du * dv; + d[0] = (256 - du) * (256 - dv); + d[1] = du * (256 - dv); + d[2] = (256 - du) * dv; + d[3] = du * dv; - state->dest_rgba.r = (tex_samples[0].r * d[0] + tex_samples[1].r * d[1] + tex_samples[2].r * d[2] + tex_samples[3].r * d[3]) >> 16; - state->dest_rgba.g = (tex_samples[0].g * d[0] + tex_samples[1].g * d[1] + tex_samples[2].g * d[2] + tex_samples[3].g * d[3]) >> 16; - state->dest_rgba.b = (tex_samples[0].b * d[0] + tex_samples[1].b * d[1] + tex_samples[2].b * d[2] + tex_samples[3].b * d[3]) >> 16; - state->dest_rgba.a = (tex_samples[0].a * d[0] + tex_samples[1].a * d[1] + tex_samples[2].a * d[2] + tex_samples[3].a * d[3]) >> 16; + state->dest_rgba.r = (tex_samples[0].r * d[0] + tex_samples[1].r * d[1] + tex_samples[2].r * d[2] + tex_samples[3].r * d[3]) >> 16; + state->dest_rgba.g = (tex_samples[0].g * d[0] + tex_samples[1].g * d[1] + tex_samples[2].g * d[2] + tex_samples[3].g * d[3]) >> 16; + state->dest_rgba.b = (tex_samples[0].b * d[0] + tex_samples[1].b * d[1] + tex_samples[2].b * d[2] + tex_samples[3].b * d[3]) >> 16; + state->dest_rgba.a = (tex_samples[0].a * d[0] + tex_samples[1].a * d[1] + tex_samples[2].a * d[2] + tex_samples[3].a * d[3]) >> 16; } -static void tex_sample_mipmap(s3d_state_t *state) +static void +tex_sample_mipmap(s3d_state_t *state) { - s3d_texture_state_t texture_state; + s3d_texture_state_t texture_state; - texture_state.level = (state->d < 0) ? state->max_d : state->max_d - ((state->d >> 27) & 0xf); - if (texture_state.level < 0) - texture_state.level = 0; - texture_state.texture_shift = 18 + (9 - texture_state.level); - texture_state.u = state->u + state->tbu; - texture_state.v = state->v + state->tbv; + texture_state.level = (state->d < 0) ? state->max_d : state->max_d - ((state->d >> 27) & 0xf); + if (texture_state.level < 0) + texture_state.level = 0; + texture_state.texture_shift = 18 + (9 - texture_state.level); + texture_state.u = state->u + state->tbu; + texture_state.v = state->v + state->tbv; - tex_read(state, &texture_state, &state->dest_rgba); + tex_read(state, &texture_state, &state->dest_rgba); } -static void tex_sample_mipmap_filter(s3d_state_t *state) +static void +tex_sample_mipmap_filter(s3d_state_t *state) { - s3d_texture_state_t texture_state; - int tex_offset; - rgba_t tex_samples[4]; - int du, dv; - int d[4]; + s3d_texture_state_t texture_state; + int tex_offset; + rgba_t tex_samples[4]; + int du, dv; + int d[4]; - texture_state.level = (state->d < 0) ? state->max_d : state->max_d - ((state->d >> 27) & 0xf); - if (texture_state.level < 0) - texture_state.level = 0; - texture_state.texture_shift = 18 + (9 - texture_state.level); - tex_offset = 1 << texture_state.texture_shift; + texture_state.level = (state->d < 0) ? state->max_d : state->max_d - ((state->d >> 27) & 0xf); + if (texture_state.level < 0) + texture_state.level = 0; + texture_state.texture_shift = 18 + (9 - texture_state.level); + tex_offset = 1 << texture_state.texture_shift; - texture_state.u = state->u + state->tbu; - texture_state.v = state->v + state->tbv; - tex_read(state, &texture_state, &tex_samples[0]); - du = (texture_state.u >> (texture_state.texture_shift - 8)) & 0xff; - dv = (texture_state.v >> (texture_state.texture_shift - 8)) & 0xff; + texture_state.u = state->u + state->tbu; + texture_state.v = state->v + state->tbv; + tex_read(state, &texture_state, &tex_samples[0]); + du = (texture_state.u >> (texture_state.texture_shift - 8)) & 0xff; + dv = (texture_state.v >> (texture_state.texture_shift - 8)) & 0xff; - texture_state.u = state->u + state->tbu + tex_offset; - texture_state.v = state->v + state->tbv; - tex_read(state, &texture_state, &tex_samples[1]); + texture_state.u = state->u + state->tbu + tex_offset; + texture_state.v = state->v + state->tbv; + tex_read(state, &texture_state, &tex_samples[1]); - texture_state.u = state->u + state->tbu; - texture_state.v = state->v + state->tbv + tex_offset; - tex_read(state, &texture_state, &tex_samples[2]); + texture_state.u = state->u + state->tbu; + texture_state.v = state->v + state->tbv + tex_offset; + tex_read(state, &texture_state, &tex_samples[2]); - texture_state.u = state->u + state->tbu + tex_offset; - texture_state.v = state->v + state->tbv + tex_offset; - tex_read(state, &texture_state, &tex_samples[3]); + texture_state.u = state->u + state->tbu + tex_offset; + texture_state.v = state->v + state->tbv + tex_offset; + tex_read(state, &texture_state, &tex_samples[3]); - d[0] = (256 - du) * (256 - dv); - d[1] = du * (256 - dv); - d[2] = (256 - du) * dv; - d[3] = du * dv; + d[0] = (256 - du) * (256 - dv); + d[1] = du * (256 - dv); + d[2] = (256 - du) * dv; + d[3] = du * dv; - state->dest_rgba.r = (tex_samples[0].r * d[0] + tex_samples[1].r * d[1] + tex_samples[2].r * d[2] + tex_samples[3].r * d[3]) >> 16; - state->dest_rgba.g = (tex_samples[0].g * d[0] + tex_samples[1].g * d[1] + tex_samples[2].g * d[2] + tex_samples[3].g * d[3]) >> 16; - state->dest_rgba.b = (tex_samples[0].b * d[0] + tex_samples[1].b * d[1] + tex_samples[2].b * d[2] + tex_samples[3].b * d[3]) >> 16; - state->dest_rgba.a = (tex_samples[0].a * d[0] + tex_samples[1].a * d[1] + tex_samples[2].a * d[2] + tex_samples[3].a * d[3]) >> 16; + state->dest_rgba.r = (tex_samples[0].r * d[0] + tex_samples[1].r * d[1] + tex_samples[2].r * d[2] + tex_samples[3].r * d[3]) >> 16; + state->dest_rgba.g = (tex_samples[0].g * d[0] + tex_samples[1].g * d[1] + tex_samples[2].g * d[2] + tex_samples[3].g * d[3]) >> 16; + state->dest_rgba.b = (tex_samples[0].b * d[0] + tex_samples[1].b * d[1] + tex_samples[2].b * d[2] + tex_samples[3].b * d[3]) >> 16; + state->dest_rgba.a = (tex_samples[0].a * d[0] + tex_samples[1].a * d[1] + tex_samples[2].a * d[2] + tex_samples[3].a * d[3]) >> 16; } -static void tex_sample_persp_normal(s3d_state_t *state) +static void +tex_sample_persp_normal(s3d_state_t *state) { - s3d_texture_state_t texture_state; - int32_t w = 0; + s3d_texture_state_t texture_state; + int32_t w = 0; - if (state->w) - w = (int32_t)(((1ULL << 27) << 19) / (int64_t)state->w); + if (state->w) + w = (int32_t) (((1ULL << 27) << 19) / (int64_t) state->w); - texture_state.level = state->max_d; - texture_state.texture_shift = 18 + (9 - texture_state.level); - texture_state.u = (int32_t)(((int64_t)state->u * (int64_t)w) >> (12 + state->max_d)) + state->tbu; - texture_state.v = (int32_t)(((int64_t)state->v * (int64_t)w) >> (12 + state->max_d)) + state->tbv; + texture_state.level = state->max_d; + texture_state.texture_shift = 18 + (9 - texture_state.level); + texture_state.u = (int32_t) (((int64_t) state->u * (int64_t) w) >> (12 + state->max_d)) + state->tbu; + texture_state.v = (int32_t) (((int64_t) state->v * (int64_t) w) >> (12 + state->max_d)) + state->tbv; - tex_read(state, &texture_state, &state->dest_rgba); + tex_read(state, &texture_state, &state->dest_rgba); } -static void tex_sample_persp_normal_filter(s3d_state_t *state) +static void +tex_sample_persp_normal_filter(s3d_state_t *state) { - s3d_texture_state_t texture_state; - int32_t w = 0, u, v; - int tex_offset; - rgba_t tex_samples[4]; - int du, dv; - int d[4]; + s3d_texture_state_t texture_state; + int32_t w = 0, u, v; + int tex_offset; + rgba_t tex_samples[4]; + int du, dv; + int d[4]; - if (state->w) - w = (int32_t)(((1ULL << 27) << 19) / (int64_t)state->w); + if (state->w) + w = (int32_t) (((1ULL << 27) << 19) / (int64_t) state->w); - u = (int32_t)(((int64_t)state->u * (int64_t)w) >> (12 + state->max_d)) + state->tbu; - v = (int32_t)(((int64_t)state->v * (int64_t)w) >> (12 + state->max_d)) + state->tbv; + u = (int32_t) (((int64_t) state->u * (int64_t) w) >> (12 + state->max_d)) + state->tbu; + v = (int32_t) (((int64_t) state->v * (int64_t) w) >> (12 + state->max_d)) + state->tbv; - texture_state.level = state->max_d; - texture_state.texture_shift = 18 + (9 - texture_state.level); - tex_offset = 1 << texture_state.texture_shift; + texture_state.level = state->max_d; + texture_state.texture_shift = 18 + (9 - texture_state.level); + tex_offset = 1 << texture_state.texture_shift; - texture_state.u = u; - texture_state.v = v; - tex_read(state, &texture_state, &tex_samples[0]); - du = (u >> (texture_state.texture_shift - 8)) & 0xff; - dv = (v >> (texture_state.texture_shift - 8)) & 0xff; + texture_state.u = u; + texture_state.v = v; + tex_read(state, &texture_state, &tex_samples[0]); + du = (u >> (texture_state.texture_shift - 8)) & 0xff; + dv = (v >> (texture_state.texture_shift - 8)) & 0xff; - texture_state.u = u + tex_offset; - texture_state.v = v; - tex_read(state, &texture_state, &tex_samples[1]); + texture_state.u = u + tex_offset; + texture_state.v = v; + tex_read(state, &texture_state, &tex_samples[1]); - texture_state.u = u; - texture_state.v = v + tex_offset; - tex_read(state, &texture_state, &tex_samples[2]); + texture_state.u = u; + texture_state.v = v + tex_offset; + tex_read(state, &texture_state, &tex_samples[2]); - texture_state.u = u + tex_offset; - texture_state.v = v + tex_offset; - tex_read(state, &texture_state, &tex_samples[3]); + texture_state.u = u + tex_offset; + texture_state.v = v + tex_offset; + tex_read(state, &texture_state, &tex_samples[3]); - d[0] = (256 - du) * (256 - dv); - d[1] = du * (256 - dv); - d[2] = (256 - du) * dv; - d[3] = du * dv; + d[0] = (256 - du) * (256 - dv); + d[1] = du * (256 - dv); + d[2] = (256 - du) * dv; + d[3] = du * dv; - state->dest_rgba.r = (tex_samples[0].r * d[0] + tex_samples[1].r * d[1] + tex_samples[2].r * d[2] + tex_samples[3].r * d[3]) >> 16; - state->dest_rgba.g = (tex_samples[0].g * d[0] + tex_samples[1].g * d[1] + tex_samples[2].g * d[2] + tex_samples[3].g * d[3]) >> 16; - state->dest_rgba.b = (tex_samples[0].b * d[0] + tex_samples[1].b * d[1] + tex_samples[2].b * d[2] + tex_samples[3].b * d[3]) >> 16; - state->dest_rgba.a = (tex_samples[0].a * d[0] + tex_samples[1].a * d[1] + tex_samples[2].a * d[2] + tex_samples[3].a * d[3]) >> 16; + state->dest_rgba.r = (tex_samples[0].r * d[0] + tex_samples[1].r * d[1] + tex_samples[2].r * d[2] + tex_samples[3].r * d[3]) >> 16; + state->dest_rgba.g = (tex_samples[0].g * d[0] + tex_samples[1].g * d[1] + tex_samples[2].g * d[2] + tex_samples[3].g * d[3]) >> 16; + state->dest_rgba.b = (tex_samples[0].b * d[0] + tex_samples[1].b * d[1] + tex_samples[2].b * d[2] + tex_samples[3].b * d[3]) >> 16; + state->dest_rgba.a = (tex_samples[0].a * d[0] + tex_samples[1].a * d[1] + tex_samples[2].a * d[2] + tex_samples[3].a * d[3]) >> 16; } -static void tex_sample_persp_normal_375(s3d_state_t *state) +static void +tex_sample_persp_normal_375(s3d_state_t *state) { - s3d_texture_state_t texture_state; - int32_t w = 0; + s3d_texture_state_t texture_state; + int32_t w = 0; - if (state->w) - w = (int32_t)(((1ULL << 27) << 19) / (int64_t)state->w); + if (state->w) + w = (int32_t) (((1ULL << 27) << 19) / (int64_t) state->w); - texture_state.level = state->max_d; - texture_state.texture_shift = 18 + (9 - texture_state.level); - texture_state.u = (int32_t)(((int64_t)state->u * (int64_t)w) >> (8 + state->max_d)) + state->tbu; - texture_state.v = (int32_t)(((int64_t)state->v * (int64_t)w) >> (8 + state->max_d)) + state->tbv; + texture_state.level = state->max_d; + texture_state.texture_shift = 18 + (9 - texture_state.level); + texture_state.u = (int32_t) (((int64_t) state->u * (int64_t) w) >> (8 + state->max_d)) + state->tbu; + texture_state.v = (int32_t) (((int64_t) state->v * (int64_t) w) >> (8 + state->max_d)) + state->tbv; - tex_read(state, &texture_state, &state->dest_rgba); + tex_read(state, &texture_state, &state->dest_rgba); } -static void tex_sample_persp_normal_filter_375(s3d_state_t *state) +static void +tex_sample_persp_normal_filter_375(s3d_state_t *state) { - s3d_texture_state_t texture_state; - int32_t w = 0, u, v; - int tex_offset; - rgba_t tex_samples[4]; - int du, dv; - int d[4]; + s3d_texture_state_t texture_state; + int32_t w = 0, u, v; + int tex_offset; + rgba_t tex_samples[4]; + int du, dv; + int d[4]; - if (state->w) - w = (int32_t)(((1ULL << 27) << 19) / (int64_t)state->w); + if (state->w) + w = (int32_t) (((1ULL << 27) << 19) / (int64_t) state->w); - u = (int32_t)(((int64_t)state->u * (int64_t)w) >> (8 + state->max_d)) + state->tbu; - v = (int32_t)(((int64_t)state->v * (int64_t)w) >> (8 + state->max_d)) + state->tbv; + u = (int32_t) (((int64_t) state->u * (int64_t) w) >> (8 + state->max_d)) + state->tbu; + v = (int32_t) (((int64_t) state->v * (int64_t) w) >> (8 + state->max_d)) + state->tbv; - texture_state.level = state->max_d; - texture_state.texture_shift = 18 + (9 - texture_state.level); - tex_offset = 1 << texture_state.texture_shift; + texture_state.level = state->max_d; + texture_state.texture_shift = 18 + (9 - texture_state.level); + tex_offset = 1 << texture_state.texture_shift; - texture_state.u = u; - texture_state.v = v; - tex_read(state, &texture_state, &tex_samples[0]); - du = (u >> (texture_state.texture_shift - 8)) & 0xff; - dv = (v >> (texture_state.texture_shift - 8)) & 0xff; + texture_state.u = u; + texture_state.v = v; + tex_read(state, &texture_state, &tex_samples[0]); + du = (u >> (texture_state.texture_shift - 8)) & 0xff; + dv = (v >> (texture_state.texture_shift - 8)) & 0xff; - texture_state.u = u + tex_offset; - texture_state.v = v; - tex_read(state, &texture_state, &tex_samples[1]); + texture_state.u = u + tex_offset; + texture_state.v = v; + tex_read(state, &texture_state, &tex_samples[1]); - texture_state.u = u; - texture_state.v = v + tex_offset; - tex_read(state, &texture_state, &tex_samples[2]); + texture_state.u = u; + texture_state.v = v + tex_offset; + tex_read(state, &texture_state, &tex_samples[2]); - texture_state.u = u + tex_offset; - texture_state.v = v + tex_offset; - tex_read(state, &texture_state, &tex_samples[3]); + texture_state.u = u + tex_offset; + texture_state.v = v + tex_offset; + tex_read(state, &texture_state, &tex_samples[3]); - d[0] = (256 - du) * (256 - dv); - d[1] = du * (256 - dv); - d[2] = (256 - du) * dv; - d[3] = du * dv; + d[0] = (256 - du) * (256 - dv); + d[1] = du * (256 - dv); + d[2] = (256 - du) * dv; + d[3] = du * dv; - state->dest_rgba.r = (tex_samples[0].r * d[0] + tex_samples[1].r * d[1] + tex_samples[2].r * d[2] + tex_samples[3].r * d[3]) >> 16; - state->dest_rgba.g = (tex_samples[0].g * d[0] + tex_samples[1].g * d[1] + tex_samples[2].g * d[2] + tex_samples[3].g * d[3]) >> 16; - state->dest_rgba.b = (tex_samples[0].b * d[0] + tex_samples[1].b * d[1] + tex_samples[2].b * d[2] + tex_samples[3].b * d[3]) >> 16; - state->dest_rgba.a = (tex_samples[0].a * d[0] + tex_samples[1].a * d[1] + tex_samples[2].a * d[2] + tex_samples[3].a * d[3]) >> 16; + state->dest_rgba.r = (tex_samples[0].r * d[0] + tex_samples[1].r * d[1] + tex_samples[2].r * d[2] + tex_samples[3].r * d[3]) >> 16; + state->dest_rgba.g = (tex_samples[0].g * d[0] + tex_samples[1].g * d[1] + tex_samples[2].g * d[2] + tex_samples[3].g * d[3]) >> 16; + state->dest_rgba.b = (tex_samples[0].b * d[0] + tex_samples[1].b * d[1] + tex_samples[2].b * d[2] + tex_samples[3].b * d[3]) >> 16; + state->dest_rgba.a = (tex_samples[0].a * d[0] + tex_samples[1].a * d[1] + tex_samples[2].a * d[2] + tex_samples[3].a * d[3]) >> 16; } - -static void tex_sample_persp_mipmap(s3d_state_t *state) +static void +tex_sample_persp_mipmap(s3d_state_t *state) { - s3d_texture_state_t texture_state; - int32_t w = 0; + s3d_texture_state_t texture_state; + int32_t w = 0; - if (state->w) - w = (int32_t)(((1ULL << 27) << 19) / (int64_t)state->w); + if (state->w) + w = (int32_t) (((1ULL << 27) << 19) / (int64_t) state->w); - texture_state.level = (state->d < 0) ? state->max_d : state->max_d - ((state->d >> 27) & 0xf); - if (texture_state.level < 0) - texture_state.level = 0; - texture_state.texture_shift = 18 + (9 - texture_state.level); - texture_state.u = (int32_t)(((int64_t)state->u * (int64_t)w) >> (12 + state->max_d)) + state->tbu; - texture_state.v = (int32_t)(((int64_t)state->v * (int64_t)w) >> (12 + state->max_d)) + state->tbv; + texture_state.level = (state->d < 0) ? state->max_d : state->max_d - ((state->d >> 27) & 0xf); + if (texture_state.level < 0) + texture_state.level = 0; + texture_state.texture_shift = 18 + (9 - texture_state.level); + texture_state.u = (int32_t) (((int64_t) state->u * (int64_t) w) >> (12 + state->max_d)) + state->tbu; + texture_state.v = (int32_t) (((int64_t) state->v * (int64_t) w) >> (12 + state->max_d)) + state->tbv; - tex_read(state, &texture_state, &state->dest_rgba); + tex_read(state, &texture_state, &state->dest_rgba); } -static void tex_sample_persp_mipmap_filter(s3d_state_t *state) +static void +tex_sample_persp_mipmap_filter(s3d_state_t *state) { - s3d_texture_state_t texture_state; - int32_t w = 0, u, v; - int tex_offset; - rgba_t tex_samples[4]; - int du, dv; - int d[4]; + s3d_texture_state_t texture_state; + int32_t w = 0, u, v; + int tex_offset; + rgba_t tex_samples[4]; + int du, dv; + int d[4]; - if (state->w) - w = (int32_t)(((1ULL << 27) << 19) / (int64_t)state->w); + if (state->w) + w = (int32_t) (((1ULL << 27) << 19) / (int64_t) state->w); - u = (int32_t)(((int64_t)state->u * (int64_t)w) >> (12 + state->max_d)) + state->tbu; - v = (int32_t)(((int64_t)state->v * (int64_t)w) >> (12 + state->max_d)) + state->tbv; + u = (int32_t) (((int64_t) state->u * (int64_t) w) >> (12 + state->max_d)) + state->tbu; + v = (int32_t) (((int64_t) state->v * (int64_t) w) >> (12 + state->max_d)) + state->tbv; - texture_state.level = (state->d < 0) ? state->max_d : state->max_d - ((state->d >> 27) & 0xf); - if (texture_state.level < 0) - texture_state.level = 0; - texture_state.texture_shift = 18 + (9 - texture_state.level); - tex_offset = 1 << texture_state.texture_shift; + texture_state.level = (state->d < 0) ? state->max_d : state->max_d - ((state->d >> 27) & 0xf); + if (texture_state.level < 0) + texture_state.level = 0; + texture_state.texture_shift = 18 + (9 - texture_state.level); + tex_offset = 1 << texture_state.texture_shift; - texture_state.u = u; - texture_state.v = v; - tex_read(state, &texture_state, &tex_samples[0]); - du = (u >> (texture_state.texture_shift - 8)) & 0xff; - dv = (v >> (texture_state.texture_shift - 8)) & 0xff; + texture_state.u = u; + texture_state.v = v; + tex_read(state, &texture_state, &tex_samples[0]); + du = (u >> (texture_state.texture_shift - 8)) & 0xff; + dv = (v >> (texture_state.texture_shift - 8)) & 0xff; - texture_state.u = u + tex_offset; - texture_state.v = v; - tex_read(state, &texture_state, &tex_samples[1]); + texture_state.u = u + tex_offset; + texture_state.v = v; + tex_read(state, &texture_state, &tex_samples[1]); - texture_state.u = u; - texture_state.v = v + tex_offset; - tex_read(state, &texture_state, &tex_samples[2]); + texture_state.u = u; + texture_state.v = v + tex_offset; + tex_read(state, &texture_state, &tex_samples[2]); - texture_state.u = u + tex_offset; - texture_state.v = v + tex_offset; - tex_read(state, &texture_state, &tex_samples[3]); + texture_state.u = u + tex_offset; + texture_state.v = v + tex_offset; + tex_read(state, &texture_state, &tex_samples[3]); - d[0] = (256 - du) * (256 - dv); - d[1] = du * (256 - dv); - d[2] = (256 - du) * dv; - d[3] = du * dv; + d[0] = (256 - du) * (256 - dv); + d[1] = du * (256 - dv); + d[2] = (256 - du) * dv; + d[3] = du * dv; - state->dest_rgba.r = (tex_samples[0].r * d[0] + tex_samples[1].r * d[1] + tex_samples[2].r * d[2] + tex_samples[3].r * d[3]) >> 16; - state->dest_rgba.g = (tex_samples[0].g * d[0] + tex_samples[1].g * d[1] + tex_samples[2].g * d[2] + tex_samples[3].g * d[3]) >> 16; - state->dest_rgba.b = (tex_samples[0].b * d[0] + tex_samples[1].b * d[1] + tex_samples[2].b * d[2] + tex_samples[3].b * d[3]) >> 16; - state->dest_rgba.a = (tex_samples[0].a * d[0] + tex_samples[1].a * d[1] + tex_samples[2].a * d[2] + tex_samples[3].a * d[3]) >> 16; + state->dest_rgba.r = (tex_samples[0].r * d[0] + tex_samples[1].r * d[1] + tex_samples[2].r * d[2] + tex_samples[3].r * d[3]) >> 16; + state->dest_rgba.g = (tex_samples[0].g * d[0] + tex_samples[1].g * d[1] + tex_samples[2].g * d[2] + tex_samples[3].g * d[3]) >> 16; + state->dest_rgba.b = (tex_samples[0].b * d[0] + tex_samples[1].b * d[1] + tex_samples[2].b * d[2] + tex_samples[3].b * d[3]) >> 16; + state->dest_rgba.a = (tex_samples[0].a * d[0] + tex_samples[1].a * d[1] + tex_samples[2].a * d[2] + tex_samples[3].a * d[3]) >> 16; } -static void tex_sample_persp_mipmap_375(s3d_state_t *state) +static void +tex_sample_persp_mipmap_375(s3d_state_t *state) { - s3d_texture_state_t texture_state; - int32_t w = 0; + s3d_texture_state_t texture_state; + int32_t w = 0; - if (state->w) - w = (int32_t)(((1ULL << 27) << 19) / (int64_t)state->w); + if (state->w) + w = (int32_t) (((1ULL << 27) << 19) / (int64_t) state->w); - texture_state.level = (state->d < 0) ? state->max_d : state->max_d - ((state->d >> 27) & 0xf); - if (texture_state.level < 0) - texture_state.level = 0; - texture_state.texture_shift = 18 + (9 - texture_state.level); - texture_state.u = (int32_t)(((int64_t)state->u * (int64_t)w) >> (8 + state->max_d)) + state->tbu; - texture_state.v = (int32_t)(((int64_t)state->v * (int64_t)w) >> (8 + state->max_d)) + state->tbv; + texture_state.level = (state->d < 0) ? state->max_d : state->max_d - ((state->d >> 27) & 0xf); + if (texture_state.level < 0) + texture_state.level = 0; + texture_state.texture_shift = 18 + (9 - texture_state.level); + texture_state.u = (int32_t) (((int64_t) state->u * (int64_t) w) >> (8 + state->max_d)) + state->tbu; + texture_state.v = (int32_t) (((int64_t) state->v * (int64_t) w) >> (8 + state->max_d)) + state->tbv; - tex_read(state, &texture_state, &state->dest_rgba); + tex_read(state, &texture_state, &state->dest_rgba); } -static void tex_sample_persp_mipmap_filter_375(s3d_state_t *state) +static void +tex_sample_persp_mipmap_filter_375(s3d_state_t *state) { - s3d_texture_state_t texture_state; - int32_t w = 0, u, v; - int tex_offset; - rgba_t tex_samples[4]; - int du, dv; - int d[4]; + s3d_texture_state_t texture_state; + int32_t w = 0, u, v; + int tex_offset; + rgba_t tex_samples[4]; + int du, dv; + int d[4]; - if (state->w) - w = (int32_t)(((1ULL << 27) << 19) / (int64_t)state->w); + if (state->w) + w = (int32_t) (((1ULL << 27) << 19) / (int64_t) state->w); - u = (int32_t)(((int64_t)state->u * (int64_t)w) >> (8 + state->max_d)) + state->tbu; - v = (int32_t)(((int64_t)state->v * (int64_t)w) >> (8 + state->max_d)) + state->tbv; + u = (int32_t) (((int64_t) state->u * (int64_t) w) >> (8 + state->max_d)) + state->tbu; + v = (int32_t) (((int64_t) state->v * (int64_t) w) >> (8 + state->max_d)) + state->tbv; - texture_state.level = (state->d < 0) ? state->max_d : state->max_d - ((state->d >> 27) & 0xf); - if (texture_state.level < 0) - texture_state.level = 0; - texture_state.texture_shift = 18 + (9 - texture_state.level); - tex_offset = 1 << texture_state.texture_shift; + texture_state.level = (state->d < 0) ? state->max_d : state->max_d - ((state->d >> 27) & 0xf); + if (texture_state.level < 0) + texture_state.level = 0; + texture_state.texture_shift = 18 + (9 - texture_state.level); + tex_offset = 1 << texture_state.texture_shift; - texture_state.u = u; - texture_state.v = v; - tex_read(state, &texture_state, &tex_samples[0]); - du = (u >> (texture_state.texture_shift - 8)) & 0xff; - dv = (v >> (texture_state.texture_shift - 8)) & 0xff; + texture_state.u = u; + texture_state.v = v; + tex_read(state, &texture_state, &tex_samples[0]); + du = (u >> (texture_state.texture_shift - 8)) & 0xff; + dv = (v >> (texture_state.texture_shift - 8)) & 0xff; - texture_state.u = u + tex_offset; - texture_state.v = v; - tex_read(state, &texture_state, &tex_samples[1]); + texture_state.u = u + tex_offset; + texture_state.v = v; + tex_read(state, &texture_state, &tex_samples[1]); - texture_state.u = u; - texture_state.v = v + tex_offset; - tex_read(state, &texture_state, &tex_samples[2]); + texture_state.u = u; + texture_state.v = v + tex_offset; + tex_read(state, &texture_state, &tex_samples[2]); - texture_state.u = u + tex_offset; - texture_state.v = v + tex_offset; - tex_read(state, &texture_state, &tex_samples[3]); + texture_state.u = u + tex_offset; + texture_state.v = v + tex_offset; + tex_read(state, &texture_state, &tex_samples[3]); - d[0] = (256 - du) * (256 - dv); - d[1] = du * (256 - dv); - d[2] = (256 - du) * dv; - d[3] = du * dv; + d[0] = (256 - du) * (256 - dv); + d[1] = du * (256 - dv); + d[2] = (256 - du) * dv; + d[3] = du * dv; - state->dest_rgba.r = (tex_samples[0].r * d[0] + tex_samples[1].r * d[1] + tex_samples[2].r * d[2] + tex_samples[3].r * d[3]) >> 16; - state->dest_rgba.g = (tex_samples[0].g * d[0] + tex_samples[1].g * d[1] + tex_samples[2].g * d[2] + tex_samples[3].g * d[3]) >> 16; - state->dest_rgba.b = (tex_samples[0].b * d[0] + tex_samples[1].b * d[1] + tex_samples[2].b * d[2] + tex_samples[3].b * d[3]) >> 16; - state->dest_rgba.a = (tex_samples[0].a * d[0] + tex_samples[1].a * d[1] + tex_samples[2].a * d[2] + tex_samples[3].a * d[3]) >> 16; + state->dest_rgba.r = (tex_samples[0].r * d[0] + tex_samples[1].r * d[1] + tex_samples[2].r * d[2] + tex_samples[3].r * d[3]) >> 16; + state->dest_rgba.g = (tex_samples[0].g * d[0] + tex_samples[1].g * d[1] + tex_samples[2].g * d[2] + tex_samples[3].g * d[3]) >> 16; + state->dest_rgba.b = (tex_samples[0].b * d[0] + tex_samples[1].b * d[1] + tex_samples[2].b * d[2] + tex_samples[3].b * d[3]) >> 16; + state->dest_rgba.a = (tex_samples[0].a * d[0] + tex_samples[1].a * d[1] + tex_samples[2].a * d[2] + tex_samples[3].a * d[3]) >> 16; } +#define CLAMP(x) \ + do { \ + if ((x) & ~0xff) \ + x = ((x) < 0) ? 0 : 0xff; \ + } while (0) -#define CLAMP(x) do \ - { \ - if ((x) & ~0xff) \ - x = ((x) < 0) ? 0 : 0xff; \ - } \ - while (0) +#define CLAMP_RGBA(r, g, b, a) \ + if ((r) & ~0xff) \ + r = ((r) < 0) ? 0 : 0xff; \ + if ((g) & ~0xff) \ + g = ((g) < 0) ? 0 : 0xff; \ + if ((b) & ~0xff) \ + b = ((b) < 0) ? 0 : 0xff; \ + if ((a) & ~0xff) \ + a = ((a) < 0) ? 0 : 0xff; -#define CLAMP_RGBA(r, g, b, a) \ - if ((r) & ~0xff) \ - r = ((r) < 0) ? 0 : 0xff; \ - if ((g) & ~0xff) \ - g = ((g) < 0) ? 0 : 0xff; \ - if ((b) & ~0xff) \ - b = ((b) < 0) ? 0 : 0xff; \ - if ((a) & ~0xff) \ - a = ((a) < 0) ? 0 : 0xff; +#define CLAMP_RGB(r, g, b) \ + do { \ + if ((r) < 0) \ + r = 0; \ + if ((r) > 0xff) \ + r = 0xff; \ + if ((g) < 0) \ + g = 0; \ + if ((g) > 0xff) \ + g = 0xff; \ + if ((b) < 0) \ + b = 0; \ + if ((b) > 0xff) \ + b = 0xff; \ + } while (0) -#define CLAMP_RGB(r, g, b) do \ - { \ - if ((r) < 0) \ - r = 0; \ - if ((r) > 0xff) \ - r = 0xff; \ - if ((g) < 0) \ - g = 0; \ - if ((g) > 0xff) \ - g = 0xff; \ - if ((b) < 0) \ - b = 0; \ - if ((b) > 0xff) \ - b = 0xff; \ - } \ - while (0) - -static void dest_pixel_gouraud_shaded_triangle(s3d_state_t *state) +static void +dest_pixel_gouraud_shaded_triangle(s3d_state_t *state) { - state->dest_rgba.r = state->r >> 7; - CLAMP(state->dest_rgba.r); + state->dest_rgba.r = state->r >> 7; + CLAMP(state->dest_rgba.r); - state->dest_rgba.g = state->g >> 7; - CLAMP(state->dest_rgba.g); + state->dest_rgba.g = state->g >> 7; + CLAMP(state->dest_rgba.g); - state->dest_rgba.b = state->b >> 7; - CLAMP(state->dest_rgba.b); + state->dest_rgba.b = state->b >> 7; + CLAMP(state->dest_rgba.b); + state->dest_rgba.a = state->a >> 7; + CLAMP(state->dest_rgba.a); +} + +static void +dest_pixel_unlit_texture_triangle(s3d_state_t *state) +{ + tex_sample(state); + + if (state->cmd_set & CMD_SET_ABC_SRC) state->dest_rgba.a = state->a >> 7; - CLAMP(state->dest_rgba.a); } -static void dest_pixel_unlit_texture_triangle(s3d_state_t *state) +static void +dest_pixel_lit_texture_decal(s3d_state_t *state) { - tex_sample(state); + tex_sample(state); - if (state->cmd_set & CMD_SET_ABC_SRC) - state->dest_rgba.a = state->a >> 7; + if (state->cmd_set & CMD_SET_ABC_SRC) + state->dest_rgba.a = state->a >> 7; } -static void dest_pixel_lit_texture_decal(s3d_state_t *state) +static void +dest_pixel_lit_texture_reflection(s3d_state_t *state) { - tex_sample(state); + tex_sample(state); - if (state->cmd_set & CMD_SET_ABC_SRC) - state->dest_rgba.a = state->a >> 7; + state->dest_rgba.r += (state->r >> 7); + state->dest_rgba.g += (state->g >> 7); + state->dest_rgba.b += (state->b >> 7); + if (state->cmd_set & CMD_SET_ABC_SRC) + state->dest_rgba.a += (state->a >> 7); + + CLAMP_RGBA(state->dest_rgba.r, state->dest_rgba.g, state->dest_rgba.b, state->dest_rgba.a); } -static void dest_pixel_lit_texture_reflection(s3d_state_t *state) +static void +dest_pixel_lit_texture_modulate(s3d_state_t *state) { - tex_sample(state); + int r = state->r >> 7, g = state->g >> 7, b = state->b >> 7, a = state->a >> 7; - state->dest_rgba.r += (state->r >> 7); - state->dest_rgba.g += (state->g >> 7); - state->dest_rgba.b += (state->b >> 7); - if (state->cmd_set & CMD_SET_ABC_SRC) - state->dest_rgba.a += (state->a >> 7); + tex_sample(state); - CLAMP_RGBA(state->dest_rgba.r, state->dest_rgba.g, state->dest_rgba.b, state->dest_rgba.a); + CLAMP_RGBA(r, g, b, a); + + state->dest_rgba.r = ((state->dest_rgba.r) * r) >> 8; + state->dest_rgba.g = ((state->dest_rgba.g) * g) >> 8; + state->dest_rgba.b = ((state->dest_rgba.b) * b) >> 8; + + if (state->cmd_set & CMD_SET_ABC_SRC) + state->dest_rgba.a = a; } -static void dest_pixel_lit_texture_modulate(s3d_state_t *state) +static void +tri(virge_t *virge, s3d_t *s3d_tri, s3d_state_t *state, int yc, int32_t dx1, int32_t dx2) { - int r = state->r >> 7, g = state->g >> 7, b = state->b >> 7, a = state->a >> 7; + svga_t *svga = &virge->svga; + uint8_t *vram = (uint8_t *) svga->vram; - tex_sample(state); + int x_dir = s3d_tri->tlr ? 1 : -1; - CLAMP_RGBA(r, g, b, a); + int use_z = !(s3d_tri->cmd_set & CMD_SET_ZB_MODE); - state->dest_rgba.r = ((state->dest_rgba.r) * r) >> 8; - state->dest_rgba.g = ((state->dest_rgba.g) * g) >> 8; - state->dest_rgba.b = ((state->dest_rgba.b) * b) >> 8; + int y_count = yc; - if (state->cmd_set & CMD_SET_ABC_SRC) - state->dest_rgba.a = a; -} + int bpp = (s3d_tri->cmd_set >> 2) & 7; -static void tri(virge_t *virge, s3d_t *s3d_tri, s3d_state_t *state, int yc, int32_t dx1, int32_t dx2) -{ - svga_t *svga = &virge->svga; - uint8_t *vram = (uint8_t *)svga->vram; + uint32_t dest_offset = 0, z_offset = 0; - int x_dir = s3d_tri->tlr ? 1 : -1; + uint32_t src_col; + int src_r = 0, src_g = 0, src_b = 0; - int use_z = !(s3d_tri->cmd_set & CMD_SET_ZB_MODE); + int x; + int xe; + uint32_t z; - int y_count = yc; + uint32_t dest_addr; + uint32_t z_addr; + int dx; + int x_offset; + int xz_offset; - int bpp = (s3d_tri->cmd_set >> 2) & 7; + int update; + uint16_t src_z = 0; - uint32_t dest_offset = 0, z_offset = 0; + if (s3d_tri->cmd_set & CMD_SET_HC) { + if (state->y < s3d_tri->clip_t) + return; + if (state->y > s3d_tri->clip_b) { + int diff_y = state->y - s3d_tri->clip_b; - uint32_t src_col; - int src_r = 0, src_g = 0, src_b = 0; + if (diff_y > y_count) + diff_y = y_count; - int x; - int xe; - uint32_t z; + state->base_u += (s3d_tri->TdUdY * diff_y); + state->base_v += (s3d_tri->TdVdY * diff_y); + state->base_z += (s3d_tri->TdZdY * diff_y); + state->base_r += (s3d_tri->TdRdY * diff_y); + state->base_g += (s3d_tri->TdGdY * diff_y); + state->base_b += (s3d_tri->TdBdY * diff_y); + state->base_a += (s3d_tri->TdAdY * diff_y); + state->base_d += (s3d_tri->TdDdY * diff_y); + state->base_w += (s3d_tri->TdWdY * diff_y); + state->x1 += (dx1 * diff_y); + state->x2 += (dx2 * diff_y); + state->y -= diff_y; + dest_offset -= s3d_tri->dest_str * diff_y; + z_offset -= s3d_tri->z_str; + y_count -= diff_y; + } + if ((state->y - y_count) < s3d_tri->clip_t) + y_count = (state->y - s3d_tri->clip_t) + 1; + } - uint32_t dest_addr; - uint32_t z_addr; - int dx; - int x_offset; - int xz_offset; + dest_offset = s3d_tri->dest_base + (state->y * s3d_tri->dest_str); + z_offset = s3d_tri->z_base + (state->y * s3d_tri->z_str); - int update; - uint16_t src_z = 0; - - if (s3d_tri->cmd_set & CMD_SET_HC) - { - if (state->y < s3d_tri->clip_t) - return; - if (state->y > s3d_tri->clip_b) - { - int diff_y = state->y - s3d_tri->clip_b; - - if (diff_y > y_count) - diff_y = y_count; - - state->base_u += (s3d_tri->TdUdY * diff_y); - state->base_v += (s3d_tri->TdVdY * diff_y); - state->base_z += (s3d_tri->TdZdY * diff_y); - state->base_r += (s3d_tri->TdRdY * diff_y); - state->base_g += (s3d_tri->TdGdY * diff_y); - state->base_b += (s3d_tri->TdBdY * diff_y); - state->base_a += (s3d_tri->TdAdY * diff_y); - state->base_d += (s3d_tri->TdDdY * diff_y); - state->base_w += (s3d_tri->TdWdY * diff_y); - state->x1 += (dx1 * diff_y); - state->x2 += (dx2 * diff_y); - state->y -= diff_y; - dest_offset -= s3d_tri->dest_str * diff_y; - z_offset -= s3d_tri->z_str; - y_count -= diff_y; - } - if ((state->y - y_count) < s3d_tri->clip_t) - y_count = (state->y - s3d_tri->clip_t) + 1; + while (y_count > 0) { + x = (state->x1 + ((1 << 20) - 1)) >> 20; + xe = (state->x2 + ((1 << 20) - 1)) >> 20; + z = (state->base_z > 0) ? (state->base_z << 1) : 0; + if (x_dir < 0) { + x--; + xe--; } - dest_offset = s3d_tri->dest_base + (state->y * s3d_tri->dest_str); - z_offset = s3d_tri->z_base + (state->y * s3d_tri->z_str); + if (((x != xe) && ((x_dir > 0) && (x < xe))) || ((x_dir < 0) && (x > xe))) { + dx = (x_dir > 0) ? ((31 - ((state->x1 - 1) >> 15)) & 0x1f) : (((state->x1 - 1) >> 15) & 0x1f); + x_offset = x_dir * (bpp + 1); + xz_offset = x_dir << 1; + if (x_dir > 0) + dx += 1; + state->r = state->base_r + ((s3d_tri->TdRdX * dx) >> 5); + state->g = state->base_g + ((s3d_tri->TdGdX * dx) >> 5); + state->b = state->base_b + ((s3d_tri->TdBdX * dx) >> 5); + state->a = state->base_a + ((s3d_tri->TdAdX * dx) >> 5); + state->u = state->base_u + ((s3d_tri->TdUdX * dx) >> 5); + state->v = state->base_v + ((s3d_tri->TdVdX * dx) >> 5); + state->w = state->base_w + ((s3d_tri->TdWdX * dx) >> 5); + state->d = state->base_d + ((s3d_tri->TdDdX * dx) >> 5); + z += ((s3d_tri->TdZdX * dx) >> 5); - while (y_count > 0) - { - x = (state->x1 + ((1 << 20) - 1)) >> 20; - xe = (state->x2 + ((1 << 20) - 1)) >> 20; - z = (state->base_z > 0) ? (state->base_z << 1) : 0; - if (x_dir < 0) - { - x--; - xe--; + if (s3d_tri->cmd_set & CMD_SET_HC) { + if (x_dir > 0) { + if (x > s3d_tri->clip_r) + goto tri_skip_line; + if (xe < s3d_tri->clip_l) + goto tri_skip_line; + if (xe > s3d_tri->clip_r) + xe = s3d_tri->clip_r + 1; + if (x < s3d_tri->clip_l) { + int diff_x = s3d_tri->clip_l - x; + + z += (s3d_tri->TdZdX * diff_x); + state->u += (s3d_tri->TdUdX * diff_x); + state->v += (s3d_tri->TdVdX * diff_x); + state->r += (s3d_tri->TdRdX * diff_x); + state->g += (s3d_tri->TdGdX * diff_x); + state->b += (s3d_tri->TdBdX * diff_x); + state->a += (s3d_tri->TdAdX * diff_x); + state->d += (s3d_tri->TdDdX * diff_x); + state->w += (s3d_tri->TdWdX * diff_x); + + x = s3d_tri->clip_l; + } + } else { + if (x < s3d_tri->clip_l) + goto tri_skip_line; + if (xe > s3d_tri->clip_r) + goto tri_skip_line; + if (xe < s3d_tri->clip_l) + xe = s3d_tri->clip_l - 1; + if (x > s3d_tri->clip_r) { + int diff_x = x - s3d_tri->clip_r; + + z += (s3d_tri->TdZdX * diff_x); + state->u += (s3d_tri->TdUdX * diff_x); + state->v += (s3d_tri->TdVdX * diff_x); + state->r += (s3d_tri->TdRdX * diff_x); + state->g += (s3d_tri->TdGdX * diff_x); + state->b += (s3d_tri->TdBdX * diff_x); + state->a += (s3d_tri->TdAdX * diff_x); + state->d += (s3d_tri->TdDdX * diff_x); + state->w += (s3d_tri->TdWdX * diff_x); + + x = s3d_tri->clip_r; + } + } + } + + svga->changedvram[(dest_offset & virge->vram_mask) >> 12] = changeframecount; + + dest_addr = dest_offset + (x * (bpp + 1)); + z_addr = z_offset + (x << 1); + + x &= 0xfff; + xe &= 0xfff; + + while (x != xe) { + update = 1; + _x = x; + _y = state->y; + + if (use_z) { + src_z = *(uint16_t *) &vram[z_addr & virge->vram_mask]; + switch ((s3d_tri->cmd_set >> 20) & 7) { + case 0: + update = 0; + break; + case 1: + if ((z >> 16) > src_z) { + src_z = (z >> 16); + } else + update = 0; + break; + case 2: + if ((z >> 16) == src_z) { + src_z = (z >> 16); + } else + update = 0; + break; + case 3: + if ((z >> 16) >= src_z) { + src_z = (z >> 16); + } else + update = 0; + break; + case 4: + if ((z >> 16) < src_z) { + src_z = (z >> 16); + } else + update = 0; + break; + case 5: + if ((z >> 16) != src_z) { + src_z = (z >> 16); + } else + update = 0; + break; + case 6: + if ((z >> 16) <= src_z) { + src_z = (z >> 16); + } else + update = 0; + break; + case 7: + src_z = (z >> 16); + break; + } } - if (((x != xe) && ((x_dir > 0) && (x < xe))) || ((x_dir < 0) && (x > xe))) - { - dx = (x_dir > 0) ? ((31 - ((state->x1-1) >> 15)) & 0x1f) : (((state->x1-1) >> 15) & 0x1f); - x_offset = x_dir * (bpp + 1); - xz_offset = x_dir << 1; - if (x_dir > 0) - dx += 1; - state->r = state->base_r + ((s3d_tri->TdRdX * dx) >> 5); - state->g = state->base_g + ((s3d_tri->TdGdX * dx) >> 5); - state->b = state->base_b + ((s3d_tri->TdBdX * dx) >> 5); - state->a = state->base_a + ((s3d_tri->TdAdX * dx) >> 5); - state->u = state->base_u + ((s3d_tri->TdUdX * dx) >> 5); - state->v = state->base_v + ((s3d_tri->TdVdX * dx) >> 5); - state->w = state->base_w + ((s3d_tri->TdWdX * dx) >> 5); - state->d = state->base_d + ((s3d_tri->TdDdX * dx) >> 5); - z += ((s3d_tri->TdZdX * dx) >> 5); + if (update) { + uint32_t dest_col; - if (s3d_tri->cmd_set & CMD_SET_HC) - { - if (x_dir > 0) - { - if (x > s3d_tri->clip_r) - goto tri_skip_line; - if (xe < s3d_tri->clip_l) - goto tri_skip_line; - if (xe > s3d_tri->clip_r) - xe = s3d_tri->clip_r + 1; - if (x < s3d_tri->clip_l) - { - int diff_x = s3d_tri->clip_l - x; + dest_pixel(state); - z += (s3d_tri->TdZdX * diff_x); - state->u += (s3d_tri->TdUdX * diff_x); - state->v += (s3d_tri->TdVdX * diff_x); - state->r += (s3d_tri->TdRdX * diff_x); - state->g += (s3d_tri->TdGdX * diff_x); - state->b += (s3d_tri->TdBdX * diff_x); - state->a += (s3d_tri->TdAdX * diff_x); - state->d += (s3d_tri->TdDdX * diff_x); - state->w += (s3d_tri->TdWdX * diff_x); + if (s3d_tri->cmd_set & CMD_SET_FE) { + int a = state->a >> 7; + state->dest_rgba.r = ((state->dest_rgba.r * a) + (s3d_tri->fog_r * (255 - a))) / 255; + state->dest_rgba.g = ((state->dest_rgba.g * a) + (s3d_tri->fog_g * (255 - a))) / 255; + state->dest_rgba.b = ((state->dest_rgba.b * a) + (s3d_tri->fog_b * (255 - a))) / 255; + } - x = s3d_tri->clip_l; - } - } - else - { - if (x < s3d_tri->clip_l) - goto tri_skip_line; - if (xe > s3d_tri->clip_r) - goto tri_skip_line; - if (xe < s3d_tri->clip_l) - xe = s3d_tri->clip_l - 1; - if (x > s3d_tri->clip_r) - { - int diff_x = x - s3d_tri->clip_r; - - z += (s3d_tri->TdZdX * diff_x); - state->u += (s3d_tri->TdUdX * diff_x); - state->v += (s3d_tri->TdVdX * diff_x); - state->r += (s3d_tri->TdRdX * diff_x); - state->g += (s3d_tri->TdGdX * diff_x); - state->b += (s3d_tri->TdBdX * diff_x); - state->a += (s3d_tri->TdAdX * diff_x); - state->d += (s3d_tri->TdDdX * diff_x); - state->w += (s3d_tri->TdWdX * diff_x); - - x = s3d_tri->clip_r; - } - } + if (s3d_tri->cmd_set & CMD_SET_ABC_ENABLE) { + switch (bpp) { + case 0: /*8 bpp*/ + /*Not implemented yet*/ + break; + case 1: /*16 bpp*/ + src_col = *(uint16_t *) &vram[dest_addr & virge->vram_mask]; + RGB15_TO_24(src_col, src_r, src_g, src_b); + break; + case 2: /*24 bpp*/ + src_col = (*(uint32_t *) &vram[dest_addr & virge->vram_mask]) & 0xffffff; + RGB24_TO_24(src_col, src_r, src_g, src_b); + break; } - svga->changedvram[(dest_offset & virge->vram_mask) >> 12] = changeframecount; + state->dest_rgba.r = ((state->dest_rgba.r * state->dest_rgba.a) + (src_r * (255 - state->dest_rgba.a))) / 255; + state->dest_rgba.g = ((state->dest_rgba.g * state->dest_rgba.a) + (src_g * (255 - state->dest_rgba.a))) / 255; + state->dest_rgba.b = ((state->dest_rgba.b * state->dest_rgba.a) + (src_b * (255 - state->dest_rgba.a))) / 255; + } - dest_addr = dest_offset + (x * (bpp + 1)); - z_addr = z_offset + (x << 1); - - x &= 0xfff; - xe &= 0xfff; - - while (x != xe) { - update = 1; - _x = x; _y = state->y; - - if (use_z) - { - src_z = *(uint16_t *)&vram[z_addr & virge->vram_mask]; - switch ((s3d_tri->cmd_set >> 20) & 7) { - case 0: - update = 0; - break; - case 1: - if ((z >> 16) > src_z) { - src_z = (z >> 16); - } else - update = 0; - break; - case 2: - if ((z >> 16) == src_z) { - src_z = (z >> 16); - } else - update = 0; - break; - case 3: - if ((z >> 16) >= src_z) { - src_z = (z >> 16); - } else - update = 0; - break; - case 4: - if ((z >> 16) < src_z) { - src_z = (z >> 16); - } else - update = 0; - break; - case 5: - if ((z >> 16) != src_z) { - src_z = (z >> 16); - } else - update = 0; - break; - case 6: - if ((z >> 16) <= src_z) { - src_z = (z >> 16); - } else - update = 0; - break; - case 7: - src_z = (z >> 16); - break; - } - } - - if (update) - { - uint32_t dest_col; - - dest_pixel(state); - - if (s3d_tri->cmd_set & CMD_SET_FE) - { - int a = state->a >> 7; - state->dest_rgba.r = ((state->dest_rgba.r * a) + (s3d_tri->fog_r * (255 - a))) / 255; - state->dest_rgba.g = ((state->dest_rgba.g * a) + (s3d_tri->fog_g * (255 - a))) / 255; - state->dest_rgba.b = ((state->dest_rgba.b * a) + (s3d_tri->fog_b * (255 - a))) / 255; - } - - if (s3d_tri->cmd_set & CMD_SET_ABC_ENABLE) - { - switch (bpp) - { - case 0: /*8 bpp*/ - /*Not implemented yet*/ - break; - case 1: /*16 bpp*/ - src_col = *(uint16_t *)&vram[dest_addr & virge->vram_mask]; - RGB15_TO_24(src_col, src_r, src_g, src_b); - break; - case 2: /*24 bpp*/ - src_col = (*(uint32_t *)&vram[dest_addr & virge->vram_mask]) & 0xffffff; - RGB24_TO_24(src_col, src_r, src_g, src_b); - break; - } - - state->dest_rgba.r = ((state->dest_rgba.r * state->dest_rgba.a) + (src_r * (255 - state->dest_rgba.a))) / 255; - state->dest_rgba.g = ((state->dest_rgba.g * state->dest_rgba.a) + (src_g * (255 - state->dest_rgba.a))) / 255; - state->dest_rgba.b = ((state->dest_rgba.b * state->dest_rgba.a) + (src_b * (255 - state->dest_rgba.a))) / 255; - } - - switch (bpp) - { - case 0: /*8 bpp*/ - /*Not implemented yet*/ - break; - case 1: /*16 bpp*/ - RGB15(state->dest_rgba.r, state->dest_rgba.g, state->dest_rgba.b, dest_col); - *(uint16_t *)&vram[dest_addr & virge->vram_mask] = dest_col; - svga->changedvram[(dest_addr & virge->vram_mask) >> 12] = changeframecount; - break; - case 2: /*24 bpp*/ - dest_col = RGB24(state->dest_rgba.r, state->dest_rgba.g, state->dest_rgba.b); - *(uint8_t *)&vram[dest_addr & virge->vram_mask] = dest_col & 0xff; - *(uint8_t *)&vram[(dest_addr + 1) & virge->vram_mask] = (dest_col >> 8) & 0xff; - *(uint8_t *)&vram[(dest_addr + 2) & virge->vram_mask] = (dest_col >> 16) & 0xff; - svga->changedvram[(dest_addr & virge->vram_mask) >> 12] = changeframecount; - break; - } - } - - if (use_z && (s3d_tri->cmd_set & CMD_SET_ZUP)) { - *(uint16_t *)&vram[z_addr & virge->vram_mask] = src_z; - svga->changedvram[(z_addr & virge->vram_mask) >> 12] = changeframecount; - } - - z += s3d_tri->TdZdX; - state->u += s3d_tri->TdUdX; - state->v += s3d_tri->TdVdX; - state->r += s3d_tri->TdRdX; - state->g += s3d_tri->TdGdX; - state->b += s3d_tri->TdBdX; - state->a += s3d_tri->TdAdX; - state->d += s3d_tri->TdDdX; - state->w += s3d_tri->TdWdX; - dest_addr += x_offset; - z_addr += xz_offset; - - x = (x + x_dir) & 0xfff; - } + switch (bpp) { + case 0: /*8 bpp*/ + /*Not implemented yet*/ + break; + case 1: /*16 bpp*/ + RGB15(state->dest_rgba.r, state->dest_rgba.g, state->dest_rgba.b, dest_col); + *(uint16_t *) &vram[dest_addr & virge->vram_mask] = dest_col; + svga->changedvram[(dest_addr & virge->vram_mask) >> 12] = changeframecount; + break; + case 2: /*24 bpp*/ + dest_col = RGB24(state->dest_rgba.r, state->dest_rgba.g, state->dest_rgba.b); + *(uint8_t *) &vram[dest_addr & virge->vram_mask] = dest_col & 0xff; + *(uint8_t *) &vram[(dest_addr + 1) & virge->vram_mask] = (dest_col >> 8) & 0xff; + *(uint8_t *) &vram[(dest_addr + 2) & virge->vram_mask] = (dest_col >> 16) & 0xff; + svga->changedvram[(dest_addr & virge->vram_mask) >> 12] = changeframecount; + break; + } } - y_count--; + if (use_z && (s3d_tri->cmd_set & CMD_SET_ZUP)) { + *(uint16_t *) &vram[z_addr & virge->vram_mask] = src_z; + svga->changedvram[(z_addr & virge->vram_mask) >> 12] = changeframecount; + } + + z += s3d_tri->TdZdX; + state->u += s3d_tri->TdUdX; + state->v += s3d_tri->TdVdX; + state->r += s3d_tri->TdRdX; + state->g += s3d_tri->TdGdX; + state->b += s3d_tri->TdBdX; + state->a += s3d_tri->TdAdX; + state->d += s3d_tri->TdDdX; + state->w += s3d_tri->TdWdX; + dest_addr += x_offset; + z_addr += xz_offset; + + x = (x + x_dir) & 0xfff; + } + } + + y_count--; tri_skip_line: - state->x1 += dx1; - state->x2 += dx2; - state->base_u += s3d_tri->TdUdY; - state->base_v += s3d_tri->TdVdY; - state->base_z += s3d_tri->TdZdY; - state->base_r += s3d_tri->TdRdY; - state->base_g += s3d_tri->TdGdY; - state->base_b += s3d_tri->TdBdY; - state->base_a += s3d_tri->TdAdY; - state->base_d += s3d_tri->TdDdY; - state->base_w += s3d_tri->TdWdY; - state->y--; - dest_offset -= s3d_tri->dest_str; - z_offset -= s3d_tri->z_str; - } + state->x1 += dx1; + state->x2 += dx2; + state->base_u += s3d_tri->TdUdY; + state->base_v += s3d_tri->TdVdY; + state->base_z += s3d_tri->TdZdY; + state->base_r += s3d_tri->TdRdY; + state->base_g += s3d_tri->TdGdY; + state->base_b += s3d_tri->TdBdY; + state->base_a += s3d_tri->TdAdY; + state->base_d += s3d_tri->TdDdY; + state->base_w += s3d_tri->TdWdY; + state->y--; + dest_offset -= s3d_tri->dest_str; + z_offset -= s3d_tri->z_str; + } } -static int tex_size[8] = -{ - 4*2, - 2*2, - 2*2, - 1*2, - 2/1, - 2/1, - 1*2, - 1*2 +static int tex_size[8] = { + 4 * 2, + 2 * 2, + 2 * 2, + 1 * 2, + 2 / 1, + 2 / 1, + 1 * 2, + 1 * 2 }; -static void s3_virge_triangle(virge_t *virge, s3d_t *s3d_tri) +static void +s3_virge_triangle(virge_t *virge, s3d_t *s3d_tri) { - s3d_state_t state; + s3d_state_t state; - uint32_t tex_base; - int c; + uint32_t tex_base; + int c; - uint64_t start_time = plat_timer_read(); - uint64_t end_time; + uint64_t start_time = plat_timer_read(); + uint64_t end_time; - state.tbu = s3d_tri->tbu << 11; - state.tbv = s3d_tri->tbv << 11; + state.tbu = s3d_tri->tbu << 11; + state.tbv = s3d_tri->tbv << 11; - state.max_d = (s3d_tri->cmd_set >> 8) & 15; + state.max_d = (s3d_tri->cmd_set >> 8) & 15; - state.tex_bdr_clr = s3d_tri->tex_bdr_clr; + state.tex_bdr_clr = s3d_tri->tex_bdr_clr; - state.cmd_set = s3d_tri->cmd_set; + state.cmd_set = s3d_tri->cmd_set; - state.base_u = s3d_tri->tus; - state.base_v = s3d_tri->tvs; - state.base_z = s3d_tri->tzs; - state.base_r = (int32_t)s3d_tri->trs; - state.base_g = (int32_t)s3d_tri->tgs; - state.base_b = (int32_t)s3d_tri->tbs; - state.base_a = (int32_t)s3d_tri->tas; - state.base_d = s3d_tri->tds; - state.base_w = s3d_tri->tws; + state.base_u = s3d_tri->tus; + state.base_v = s3d_tri->tvs; + state.base_z = s3d_tri->tzs; + state.base_r = (int32_t) s3d_tri->trs; + state.base_g = (int32_t) s3d_tri->tgs; + state.base_b = (int32_t) s3d_tri->tbs; + state.base_a = (int32_t) s3d_tri->tas; + state.base_d = s3d_tri->tds; + state.base_w = s3d_tri->tws; - tex_base = s3d_tri->tex_base; - for (c = 9; c >= 0; c--) - { - state.texture[c] = (uint16_t *)&virge->svga.vram[tex_base]; - if (c <= state.max_d) - tex_base += ((1 << (c*2)) * tex_size[(s3d_tri->cmd_set >> 5) & 7]) / 2; - } + tex_base = s3d_tri->tex_base; + for (c = 9; c >= 0; c--) { + state.texture[c] = (uint16_t *) &virge->svga.vram[tex_base]; + if (c <= state.max_d) + tex_base += ((1 << (c * 2)) * tex_size[(s3d_tri->cmd_set >> 5) & 7]) / 2; + } - switch ((s3d_tri->cmd_set >> 27) & 0xf) - { + switch ((s3d_tri->cmd_set >> 27) & 0xf) { + case 0: + dest_pixel = dest_pixel_gouraud_shaded_triangle; + break; + case 1: + case 5: + switch ((s3d_tri->cmd_set >> 15) & 0x3) { case 0: - dest_pixel = dest_pixel_gouraud_shaded_triangle; - break; + dest_pixel = dest_pixel_lit_texture_reflection; + break; case 1: - case 5: - switch ((s3d_tri->cmd_set >> 15) & 0x3) - { - case 0: - dest_pixel = dest_pixel_lit_texture_reflection; - break; - case 1: - dest_pixel = dest_pixel_lit_texture_modulate; - break; - case 2: - dest_pixel = dest_pixel_lit_texture_decal; - break; - default: - s3_virge_log("bad triangle type %x\n", (s3d_tri->cmd_set >> 27) & 0xf); - return; - } - break; + dest_pixel = dest_pixel_lit_texture_modulate; + break; case 2: - case 6: - dest_pixel = dest_pixel_unlit_texture_triangle; - break; + dest_pixel = dest_pixel_lit_texture_decal; + break; default: - s3_virge_log("bad triangle type %x\n", (s3d_tri->cmd_set >> 27) & 0xf); - return; - } + s3_virge_log("bad triangle type %x\n", (s3d_tri->cmd_set >> 27) & 0xf); + return; + } + break; + case 2: + case 6: + dest_pixel = dest_pixel_unlit_texture_triangle; + break; + default: + s3_virge_log("bad triangle type %x\n", (s3d_tri->cmd_set >> 27) & 0xf); + return; + } - switch (((s3d_tri->cmd_set >> 12) & 7) | ((s3d_tri->cmd_set & (1 << 29)) ? 8 : 0)) - { - case 0: case 1: - tex_sample = tex_sample_mipmap; - break; - case 2: case 3: - tex_sample = virge->bilinear_enabled ? tex_sample_mipmap_filter : tex_sample_mipmap; - break; - case 4: case 5: - tex_sample = tex_sample_normal; - break; - case 6: case 7: - tex_sample = virge->bilinear_enabled ? tex_sample_normal_filter : tex_sample_normal; - break; - case (0 | 8): case (1 | 8): - if (virge->chip == S3_VIRGEDX || virge->chip >= S3_VIRGEGX2) - tex_sample = tex_sample_persp_mipmap_375; - else - tex_sample = tex_sample_persp_mipmap; - break; - case (2 | 8): case (3 | 8): - if (virge->chip == S3_VIRGEDX || virge->chip >= S3_VIRGEGX2) - tex_sample = virge->bilinear_enabled ? tex_sample_persp_mipmap_filter_375 : tex_sample_persp_mipmap_375; - else - tex_sample = virge->bilinear_enabled ? tex_sample_persp_mipmap_filter : tex_sample_persp_mipmap; - break; - case (4 | 8): case (5 | 8): - if (virge->chip == S3_VIRGEDX || virge->chip >= S3_VIRGEGX2) - tex_sample = tex_sample_persp_normal_375; - else - tex_sample = tex_sample_persp_normal; - break; - case (6 | 8): case (7 | 8): - if (virge->chip == S3_VIRGEDX || virge->chip >= S3_VIRGEGX2) - tex_sample = virge->bilinear_enabled ? tex_sample_persp_normal_filter_375 : tex_sample_persp_normal_375; - else - tex_sample = virge->bilinear_enabled ? tex_sample_persp_normal_filter : tex_sample_persp_normal; - break; - } + switch (((s3d_tri->cmd_set >> 12) & 7) | ((s3d_tri->cmd_set & (1 << 29)) ? 8 : 0)) { + case 0: + case 1: + tex_sample = tex_sample_mipmap; + break; + case 2: + case 3: + tex_sample = virge->bilinear_enabled ? tex_sample_mipmap_filter : tex_sample_mipmap; + break; + case 4: + case 5: + tex_sample = tex_sample_normal; + break; + case 6: + case 7: + tex_sample = virge->bilinear_enabled ? tex_sample_normal_filter : tex_sample_normal; + break; + case (0 | 8): + case (1 | 8): + if (virge->chip == S3_VIRGEDX || virge->chip >= S3_VIRGEGX2) + tex_sample = tex_sample_persp_mipmap_375; + else + tex_sample = tex_sample_persp_mipmap; + break; + case (2 | 8): + case (3 | 8): + if (virge->chip == S3_VIRGEDX || virge->chip >= S3_VIRGEGX2) + tex_sample = virge->bilinear_enabled ? tex_sample_persp_mipmap_filter_375 : tex_sample_persp_mipmap_375; + else + tex_sample = virge->bilinear_enabled ? tex_sample_persp_mipmap_filter : tex_sample_persp_mipmap; + break; + case (4 | 8): + case (5 | 8): + if (virge->chip == S3_VIRGEDX || virge->chip >= S3_VIRGEGX2) + tex_sample = tex_sample_persp_normal_375; + else + tex_sample = tex_sample_persp_normal; + break; + case (6 | 8): + case (7 | 8): + if (virge->chip == S3_VIRGEDX || virge->chip >= S3_VIRGEGX2) + tex_sample = virge->bilinear_enabled ? tex_sample_persp_normal_filter_375 : tex_sample_persp_normal_375; + else + tex_sample = virge->bilinear_enabled ? tex_sample_persp_normal_filter : tex_sample_persp_normal; + break; + } - switch ((s3d_tri->cmd_set >> 5) & 7) - { - case 0: - tex_read = (s3d_tri->cmd_set & CMD_SET_TWE) ? tex_ARGB8888 : tex_ARGB8888_nowrap; - break; - case 1: - tex_read = (s3d_tri->cmd_set & CMD_SET_TWE) ? tex_ARGB4444 : tex_ARGB4444_nowrap; - break; - case 2: - tex_read = (s3d_tri->cmd_set & CMD_SET_TWE) ? tex_ARGB1555 : tex_ARGB1555_nowrap; - break; - default: - s3_virge_log("bad texture type %i\n", (s3d_tri->cmd_set >> 5) & 7); - tex_read = (s3d_tri->cmd_set & CMD_SET_TWE) ? tex_ARGB1555 : tex_ARGB1555_nowrap; - break; - } + switch ((s3d_tri->cmd_set >> 5) & 7) { + case 0: + tex_read = (s3d_tri->cmd_set & CMD_SET_TWE) ? tex_ARGB8888 : tex_ARGB8888_nowrap; + break; + case 1: + tex_read = (s3d_tri->cmd_set & CMD_SET_TWE) ? tex_ARGB4444 : tex_ARGB4444_nowrap; + break; + case 2: + tex_read = (s3d_tri->cmd_set & CMD_SET_TWE) ? tex_ARGB1555 : tex_ARGB1555_nowrap; + break; + default: + s3_virge_log("bad texture type %i\n", (s3d_tri->cmd_set >> 5) & 7); + tex_read = (s3d_tri->cmd_set & CMD_SET_TWE) ? tex_ARGB1555 : tex_ARGB1555_nowrap; + break; + } - state.y = s3d_tri->tys; - state.x1 = s3d_tri->txs; - state.x2 = s3d_tri->txend01; - tri(virge, s3d_tri, &state, s3d_tri->ty01, s3d_tri->TdXdY02, s3d_tri->TdXdY01); - state.x2 = s3d_tri->txend12; - tri(virge, s3d_tri, &state, s3d_tri->ty12, s3d_tri->TdXdY02, s3d_tri->TdXdY12); + state.y = s3d_tri->tys; + state.x1 = s3d_tri->txs; + state.x2 = s3d_tri->txend01; + tri(virge, s3d_tri, &state, s3d_tri->ty01, s3d_tri->TdXdY02, s3d_tri->TdXdY01); + state.x2 = s3d_tri->txend12; + tri(virge, s3d_tri, &state, s3d_tri->ty12, s3d_tri->TdXdY02, s3d_tri->TdXdY12); - end_time = plat_timer_read(); + end_time = plat_timer_read(); - virge->blitter_time += end_time - start_time; + virge->blitter_time += end_time - start_time; } -static void s3_virge_hwcursor_draw(svga_t *svga, int displine) +static void +s3_virge_hwcursor_draw(svga_t *svga, int displine) { - virge_t *virge = (virge_t *)svga->p; - int x; - uint16_t dat[2]; - int xx; - int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff; - uint32_t fg, bg; - uint32_t vram_mask = virge->vram_mask; + virge_t *virge = (virge_t *) svga->p; + int x; + uint16_t dat[2]; + int xx; + int offset = svga->hwcursor_latch.x - svga->hwcursor_latch.xoff; + uint32_t fg, bg; + uint32_t vram_mask = virge->vram_mask; - if (svga->interlace && svga->hwcursor_oddeven) - svga->hwcursor_latch.addr += 16; + if (svga->interlace && svga->hwcursor_oddeven) + svga->hwcursor_latch.addr += 16; - switch (svga->bpp) - { - case 15: - fg = video_15to32[virge->hwc_fg_col & 0xffff]; - bg = video_15to32[virge->hwc_bg_col & 0xffff]; - break; + switch (svga->bpp) { + case 15: + fg = video_15to32[virge->hwc_fg_col & 0xffff]; + bg = video_15to32[virge->hwc_bg_col & 0xffff]; + break; - case 16: - fg = video_16to32[virge->hwc_fg_col & 0xffff]; - bg = video_16to32[virge->hwc_bg_col & 0xffff]; - break; + case 16: + fg = video_16to32[virge->hwc_fg_col & 0xffff]; + bg = video_16to32[virge->hwc_bg_col & 0xffff]; + break; - case 24: case 32: - fg = virge->hwc_fg_col; - bg = virge->hwc_bg_col; - break; + case 24: + case 32: + fg = virge->hwc_fg_col; + bg = virge->hwc_bg_col; + break; - default: - fg = svga->pallook[virge->hwc_fg_col & 0xff]; - bg = svga->pallook[virge->hwc_bg_col & 0xff]; - break; - } + default: + fg = svga->pallook[virge->hwc_fg_col & 0xff]; + bg = svga->pallook[virge->hwc_bg_col & 0xff]; + break; + } - for (x = 0; x < 64; x += 16) - { - dat[0] = (svga->vram[svga->hwcursor_latch.addr & vram_mask] << 8) | svga->vram[(svga->hwcursor_latch.addr + 1) & vram_mask]; - dat[1] = (svga->vram[(svga->hwcursor_latch.addr + 2) & vram_mask] << 8) | svga->vram[(svga->hwcursor_latch.addr + 3) & vram_mask]; - if (svga->crtc[0x55] & 0x10) - { - /*X11*/ - for (xx = 0; xx < 16; xx++) - { - if (offset >= 0) - { - if (dat[0] & 0x8000) - buffer32->line[displine][offset + svga->x_add] = (dat[1] & 0x8000) ? fg : bg; - } - - offset++; - dat[0] <<= 1; - dat[1] <<= 1; - } + for (x = 0; x < 64; x += 16) { + dat[0] = (svga->vram[svga->hwcursor_latch.addr & vram_mask] << 8) | svga->vram[(svga->hwcursor_latch.addr + 1) & vram_mask]; + dat[1] = (svga->vram[(svga->hwcursor_latch.addr + 2) & vram_mask] << 8) | svga->vram[(svga->hwcursor_latch.addr + 3) & vram_mask]; + if (svga->crtc[0x55] & 0x10) { + /*X11*/ + for (xx = 0; xx < 16; xx++) { + if (offset >= 0) { + if (dat[0] & 0x8000) + buffer32->line[displine][offset + svga->x_add] = (dat[1] & 0x8000) ? fg : bg; } - else - { - /*Windows*/ - for (xx = 0; xx < 16; xx++) - { - if (offset >= 0) - { - if (!(dat[0] & 0x8000)) - buffer32->line[displine][offset + svga->x_add] = (dat[1] & 0x8000) ? fg : bg; - else if (dat[1] & 0x8000) - buffer32->line[displine][offset + svga->x_add] ^= 0xffffff; - } - offset++; - dat[0] <<= 1; - dat[1] <<= 1; - } + offset++; + dat[0] <<= 1; + dat[1] <<= 1; + } + } else { + /*Windows*/ + for (xx = 0; xx < 16; xx++) { + if (offset >= 0) { + if (!(dat[0] & 0x8000)) + buffer32->line[displine][offset + svga->x_add] = (dat[1] & 0x8000) ? fg : bg; + else if (dat[1] & 0x8000) + buffer32->line[displine][offset + svga->x_add] ^= 0xffffff; } - svga->hwcursor_latch.addr += 4; + + offset++; + dat[0] <<= 1; + dat[1] <<= 1; + } } - if (svga->interlace && !svga->hwcursor_oddeven) - svga->hwcursor_latch.addr += 16; + svga->hwcursor_latch.addr += 4; + } + if (svga->interlace && !svga->hwcursor_oddeven) + svga->hwcursor_latch.addr += 16; } -#define DECODE_YCbCr() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 2; c++) \ - { \ - uint8_t y1, y2; \ - int8_t Cr, Cb; \ - int dR, dG, dB; \ - \ - y1 = src[0]; \ - Cr = src[1] - 0x80; \ - y2 = src[2]; \ - Cb = src[3] - 0x80; \ - src += 4; \ - \ - dR = (359*Cr) >> 8; \ - dG = (88*Cb + 183*Cr) >> 8; \ - dB = (453*Cb) >> 8; \ - \ - r[x_write] = y1 + dR; \ - CLAMP(r[x_write]); \ - g[x_write] = y1 - dG; \ - CLAMP(g[x_write]); \ - b[x_write] = y1 + dB; \ - CLAMP(b[x_write]); \ - \ - r[x_write+1] = y2 + dR; \ - CLAMP(r[x_write+1]); \ - g[x_write+1] = y2 - dG; \ - CLAMP(g[x_write+1]); \ - b[x_write+1] = y2 + dB; \ - CLAMP(b[x_write+1]); \ - \ - x_write = (x_write + 2) & 7; \ - } \ - } while (0) +#define DECODE_YCbCr() \ + do { \ + int c; \ + \ + for (c = 0; c < 2; c++) { \ + uint8_t y1, y2; \ + int8_t Cr, Cb; \ + int dR, dG, dB; \ + \ + y1 = src[0]; \ + Cr = src[1] - 0x80; \ + y2 = src[2]; \ + Cb = src[3] - 0x80; \ + src += 4; \ + \ + dR = (359 * Cr) >> 8; \ + dG = (88 * Cb + 183 * Cr) >> 8; \ + dB = (453 * Cb) >> 8; \ + \ + r[x_write] = y1 + dR; \ + CLAMP(r[x_write]); \ + g[x_write] = y1 - dG; \ + CLAMP(g[x_write]); \ + b[x_write] = y1 + dB; \ + CLAMP(b[x_write]); \ + \ + r[x_write + 1] = y2 + dR; \ + CLAMP(r[x_write + 1]); \ + g[x_write + 1] = y2 - dG; \ + CLAMP(g[x_write + 1]); \ + b[x_write + 1] = y2 + dB; \ + CLAMP(b[x_write + 1]); \ + \ + x_write = (x_write + 2) & 7; \ + } \ + } while (0) /*Both YUV formats are untested*/ -#define DECODE_YUV211() \ - do \ - { \ - uint8_t y1, y2, y3, y4; \ - int8_t U, V; \ - int dR, dG, dB; \ - \ - U = src[0] - 0x80; \ - y1 = (298 * (src[1] - 16)) >> 8; \ - y2 = (298 * (src[2] - 16)) >> 8; \ - V = src[3] - 0x80; \ - y3 = (298 * (src[4] - 16)) >> 8; \ - y4 = (298 * (src[5] - 16)) >> 8; \ - src += 6; \ - \ - dR = (309*V) >> 8; \ - dG = (100*U + 208*V) >> 8; \ - dB = (516*U) >> 8; \ - \ - r[x_write] = y1 + dR; \ - CLAMP(r[x_write]); \ - g[x_write] = y1 - dG; \ - CLAMP(g[x_write]); \ - b[x_write] = y1 + dB; \ - CLAMP(b[x_write]); \ - \ - r[x_write+1] = y2 + dR; \ - CLAMP(r[x_write+1]); \ - g[x_write+1] = y2 - dG; \ - CLAMP(g[x_write+1]); \ - b[x_write+1] = y2 + dB; \ - CLAMP(b[x_write+1]); \ - \ - r[x_write+2] = y3 + dR; \ - CLAMP(r[x_write+2]); \ - g[x_write+2] = y3 - dG; \ - CLAMP(g[x_write+2]); \ - b[x_write+2] = y3 + dB; \ - CLAMP(b[x_write+2]); \ - \ - r[x_write+3] = y4 + dR; \ - CLAMP(r[x_write+3]); \ - g[x_write+3] = y4 - dG; \ - CLAMP(g[x_write+3]); \ - b[x_write+3] = y4 + dB; \ - CLAMP(b[x_write+3]); \ - \ - x_write = (x_write + 4) & 7; \ - } while (0) +#define DECODE_YUV211() \ + do { \ + uint8_t y1, y2, y3, y4; \ + int8_t U, V; \ + int dR, dG, dB; \ + \ + U = src[0] - 0x80; \ + y1 = (298 * (src[1] - 16)) >> 8; \ + y2 = (298 * (src[2] - 16)) >> 8; \ + V = src[3] - 0x80; \ + y3 = (298 * (src[4] - 16)) >> 8; \ + y4 = (298 * (src[5] - 16)) >> 8; \ + src += 6; \ + \ + dR = (309 * V) >> 8; \ + dG = (100 * U + 208 * V) >> 8; \ + dB = (516 * U) >> 8; \ + \ + r[x_write] = y1 + dR; \ + CLAMP(r[x_write]); \ + g[x_write] = y1 - dG; \ + CLAMP(g[x_write]); \ + b[x_write] = y1 + dB; \ + CLAMP(b[x_write]); \ + \ + r[x_write + 1] = y2 + dR; \ + CLAMP(r[x_write + 1]); \ + g[x_write + 1] = y2 - dG; \ + CLAMP(g[x_write + 1]); \ + b[x_write + 1] = y2 + dB; \ + CLAMP(b[x_write + 1]); \ + \ + r[x_write + 2] = y3 + dR; \ + CLAMP(r[x_write + 2]); \ + g[x_write + 2] = y3 - dG; \ + CLAMP(g[x_write + 2]); \ + b[x_write + 2] = y3 + dB; \ + CLAMP(b[x_write + 2]); \ + \ + r[x_write + 3] = y4 + dR; \ + CLAMP(r[x_write + 3]); \ + g[x_write + 3] = y4 - dG; \ + CLAMP(g[x_write + 3]); \ + b[x_write + 3] = y4 + dB; \ + CLAMP(b[x_write + 3]); \ + \ + x_write = (x_write + 4) & 7; \ + } while (0) -#define DECODE_YUV422() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 2; c++) \ - { \ - uint8_t y1, y2; \ - int8_t U, V; \ - int dR, dG, dB; \ - \ - U = src[0] - 0x80; \ - y1 = (298 * (src[1] - 16)) >> 8; \ - V = src[2] - 0x80; \ - y2 = (298 * (src[3] - 16)) >> 8; \ - src += 4; \ - \ - dR = (309*V) >> 8; \ - dG = (100*U + 208*V) >> 8; \ - dB = (516*U) >> 8; \ - \ - r[x_write] = y1 + dR; \ - CLAMP(r[x_write]); \ - g[x_write] = y1 - dG; \ - CLAMP(g[x_write]); \ - b[x_write] = y1 + dB; \ - CLAMP(b[x_write]); \ - \ - r[x_write+1] = y2 + dR; \ - CLAMP(r[x_write+1]); \ - g[x_write+1] = y2 - dG; \ - CLAMP(g[x_write+1]); \ - b[x_write+1] = y2 + dB; \ - CLAMP(b[x_write+1]); \ - \ - x_write = (x_write + 2) & 7; \ - } \ - } while (0) +#define DECODE_YUV422() \ + do { \ + int c; \ + \ + for (c = 0; c < 2; c++) { \ + uint8_t y1, y2; \ + int8_t U, V; \ + int dR, dG, dB; \ + \ + U = src[0] - 0x80; \ + y1 = (298 * (src[1] - 16)) >> 8; \ + V = src[2] - 0x80; \ + y2 = (298 * (src[3] - 16)) >> 8; \ + src += 4; \ + \ + dR = (309 * V) >> 8; \ + dG = (100 * U + 208 * V) >> 8; \ + dB = (516 * U) >> 8; \ + \ + r[x_write] = y1 + dR; \ + CLAMP(r[x_write]); \ + g[x_write] = y1 - dG; \ + CLAMP(g[x_write]); \ + b[x_write] = y1 + dB; \ + CLAMP(b[x_write]); \ + \ + r[x_write + 1] = y2 + dR; \ + CLAMP(r[x_write + 1]); \ + g[x_write + 1] = y2 - dG; \ + CLAMP(g[x_write + 1]); \ + b[x_write + 1] = y2 + dB; \ + CLAMP(b[x_write + 1]); \ + \ + x_write = (x_write + 2) & 7; \ + } \ + } while (0) -#define DECODE_RGB555() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 4; c++) \ - { \ - uint16_t dat; \ - \ - dat = *(uint16_t *)src; \ - src += 2; \ - \ - r[x_write + c] = ((dat & 0x001f) << 3) | ((dat & 0x001f) >> 2); \ - g[x_write + c] = ((dat & 0x03e0) >> 2) | ((dat & 0x03e0) >> 7); \ - b[x_write + c] = ((dat & 0x7c00) >> 7) | ((dat & 0x7c00) >> 12); \ - } \ - x_write = (x_write + 4) & 7; \ - } while (0) +#define DECODE_RGB555() \ + do { \ + int c; \ + \ + for (c = 0; c < 4; c++) { \ + uint16_t dat; \ + \ + dat = *(uint16_t *) src; \ + src += 2; \ + \ + r[x_write + c] = ((dat & 0x001f) << 3) | ((dat & 0x001f) >> 2); \ + g[x_write + c] = ((dat & 0x03e0) >> 2) | ((dat & 0x03e0) >> 7); \ + b[x_write + c] = ((dat & 0x7c00) >> 7) | ((dat & 0x7c00) >> 12); \ + } \ + x_write = (x_write + 4) & 7; \ + } while (0) -#define DECODE_RGB565() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 4; c++) \ - { \ - uint16_t dat; \ - \ - dat = *(uint16_t *)src; \ - src += 2; \ - \ - r[x_write + c] = ((dat & 0x001f) << 3) | ((dat & 0x001f) >> 2); \ - g[x_write + c] = ((dat & 0x07e0) >> 3) | ((dat & 0x07e0) >> 9); \ - b[x_write + c] = ((dat & 0xf800) >> 8) | ((dat & 0xf800) >> 13); \ - } \ - x_write = (x_write + 4) & 7; \ - } while (0) +#define DECODE_RGB565() \ + do { \ + int c; \ + \ + for (c = 0; c < 4; c++) { \ + uint16_t dat; \ + \ + dat = *(uint16_t *) src; \ + src += 2; \ + \ + r[x_write + c] = ((dat & 0x001f) << 3) | ((dat & 0x001f) >> 2); \ + g[x_write + c] = ((dat & 0x07e0) >> 3) | ((dat & 0x07e0) >> 9); \ + b[x_write + c] = ((dat & 0xf800) >> 8) | ((dat & 0xf800) >> 13); \ + } \ + x_write = (x_write + 4) & 7; \ + } while (0) -#define DECODE_RGB888() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 4; c++) \ - { \ - r[x_write + c] = src[0]; \ - g[x_write + c] = src[1]; \ - b[x_write + c] = src[2]; \ - src += 3; \ - } \ - x_write = (x_write + 4) & 7; \ - } while (0) +#define DECODE_RGB888() \ + do { \ + int c; \ + \ + for (c = 0; c < 4; c++) { \ + r[x_write + c] = src[0]; \ + g[x_write + c] = src[1]; \ + b[x_write + c] = src[2]; \ + src += 3; \ + } \ + x_write = (x_write + 4) & 7; \ + } while (0) -#define DECODE_XRGB8888() \ - do \ - { \ - int c; \ - \ - for (c = 0; c < 4; c++) \ - { \ - r[x_write + c] = src[0]; \ - g[x_write + c] = src[1]; \ - b[x_write + c] = src[2]; \ - src += 4; \ - } \ - x_write = (x_write + 4) & 7; \ - } while (0) +#define DECODE_XRGB8888() \ + do { \ + int c; \ + \ + for (c = 0; c < 4; c++) { \ + r[x_write + c] = src[0]; \ + g[x_write + c] = src[1]; \ + b[x_write + c] = src[2]; \ + src += 4; \ + } \ + x_write = (x_write + 4) & 7; \ + } while (0) -#define OVERLAY_SAMPLE() \ - do \ - { \ - switch (virge->streams.sdif) \ - { \ - case 1: \ - DECODE_YCbCr(); \ - break; \ - case 2: \ - DECODE_YUV422(); \ - break; \ - case 3: \ - DECODE_RGB555(); \ - break; \ - case 4: \ - DECODE_YUV211(); \ - break; \ - case 5: \ - DECODE_RGB565(); \ - break; \ - case 6: \ - DECODE_RGB888(); \ - break; \ - case 7: \ - default: \ - DECODE_XRGB8888(); \ - break; \ - } \ - } while (0) +#define OVERLAY_SAMPLE() \ + do { \ + switch (virge->streams.sdif) { \ + case 1: \ + DECODE_YCbCr(); \ + break; \ + case 2: \ + DECODE_YUV422(); \ + break; \ + case 3: \ + DECODE_RGB555(); \ + break; \ + case 4: \ + DECODE_YUV211(); \ + break; \ + case 5: \ + DECODE_RGB565(); \ + break; \ + case 6: \ + DECODE_RGB888(); \ + break; \ + case 7: \ + default: \ + DECODE_XRGB8888(); \ + break; \ + } \ + } while (0) -static void s3_virge_overlay_draw(svga_t *svga, int displine) +static void +s3_virge_overlay_draw(svga_t *svga, int displine) { - virge_t *virge = (virge_t *)svga->p; - int offset = (virge->streams.sec_x - virge->streams.pri_x) + 1; - int h_acc = virge->streams.dda_horiz_accumulator; - int r[8], g[8], b[8]; - int x_size, x_read = 4, x_write = 4; - int x; - uint32_t *p; - uint8_t *src = &svga->vram[svga->overlay_latch.addr]; + virge_t *virge = (virge_t *) svga->p; + int offset = (virge->streams.sec_x - virge->streams.pri_x) + 1; + int h_acc = virge->streams.dda_horiz_accumulator; + int r[8], g[8], b[8]; + int x_size, x_read = 4, x_write = 4; + int x; + uint32_t *p; + uint8_t *src = &svga->vram[svga->overlay_latch.addr]; - p = &(buffer32->line[displine][offset + svga->x_add]); + p = &(buffer32->line[displine][offset + svga->x_add]); - if ((offset + virge->streams.sec_w) > virge->streams.pri_w) - x_size = (virge->streams.pri_w - virge->streams.sec_x) + 1; - else - x_size = virge->streams.sec_w + 1; + if ((offset + virge->streams.sec_w) > virge->streams.pri_w) + x_size = (virge->streams.pri_w - virge->streams.sec_x) + 1; + else + x_size = virge->streams.sec_w + 1; - OVERLAY_SAMPLE(); + OVERLAY_SAMPLE(); - for (x = 0; x < x_size; x++) - { - *p++ = r[x_read] | (g[x_read] << 8) | (b[x_read] << 16); + for (x = 0; x < x_size; x++) { + *p++ = r[x_read] | (g[x_read] << 8) | (b[x_read] << 16); - h_acc += virge->streams.k1_horiz_scale; - if (h_acc >= 0) - { - if ((x_read ^ (x_read + 1)) & ~3) - OVERLAY_SAMPLE(); - x_read = (x_read + 1) & 7; + h_acc += virge->streams.k1_horiz_scale; + if (h_acc >= 0) { + if ((x_read ^ (x_read + 1)) & ~3) + OVERLAY_SAMPLE(); + x_read = (x_read + 1) & 7; - h_acc += (virge->streams.k2_horiz_scale - virge->streams.k1_horiz_scale); - } + h_acc += (virge->streams.k2_horiz_scale - virge->streams.k1_horiz_scale); } + } - svga->overlay_latch.v_acc += virge->streams.k1_vert_scale; - if (svga->overlay_latch.v_acc >= 0) - { - svga->overlay_latch.v_acc += (virge->streams.k2_vert_scale - virge->streams.k1_vert_scale); - svga->overlay_latch.addr += virge->streams.sec_stride; - } + svga->overlay_latch.v_acc += virge->streams.k1_vert_scale; + if (svga->overlay_latch.v_acc >= 0) { + svga->overlay_latch.v_acc += (virge->streams.k2_vert_scale - virge->streams.k1_vert_scale); + svga->overlay_latch.addr += virge->streams.sec_stride; + } } -static uint8_t s3_virge_pci_read(int func, int addr, void *p) +static uint8_t +s3_virge_pci_read(int func, int addr, void *p) { - virge_t *virge = (virge_t *)p; - svga_t *svga = &virge->svga; - uint8_t ret = 0; + virge_t *virge = (virge_t *) p; + svga_t *svga = &virge->svga; + uint8_t ret = 0; - switch (addr) { - case 0x00: ret = 0x33; break; /*'S3'*/ - case 0x01: ret = 0x53; break; + switch (addr) { + case 0x00: + ret = 0x33; + break; /*'S3'*/ + case 0x01: + ret = 0x53; + break; - case 0x02: ret = virge->virge_id_low; break; - case 0x03: ret = virge->virge_id_high; break; + case 0x02: + ret = virge->virge_id_low; + break; + case 0x03: + ret = virge->virge_id_high; + break; - case PCI_REG_COMMAND: ret = virge->pci_regs[PCI_REG_COMMAND] & 0x27; break; + case PCI_REG_COMMAND: + ret = virge->pci_regs[PCI_REG_COMMAND] & 0x27; + break; - case 0x07: ret = virge->pci_regs[0x07] & 0x36; break; + case 0x07: + ret = virge->pci_regs[0x07] & 0x36; + break; - case 0x08: ret = virge->virge_rev; break; /*Revision ID*/ - case 0x09: ret = 0; break; /*Programming interface*/ + case 0x08: + ret = virge->virge_rev; + break; /*Revision ID*/ + case 0x09: + ret = 0; + break; /*Programming interface*/ - case 0x0a: ret = 0x00; break; /*Supports VGA interface*/ - case 0x0b: ret = 0x03; break; + case 0x0a: + ret = 0x00; + break; /*Supports VGA interface*/ + case 0x0b: + ret = 0x03; + break; - case 0x0d: ret = virge->pci_regs[0x0d] & 0xf8; break; + case 0x0d: + ret = virge->pci_regs[0x0d] & 0xf8; + break; - case 0x10: ret = 0x00; break;/*Linear frame buffer address*/ - case 0x11: ret = 0x00; break; - case 0x12: ret = 0x00; break; - case 0x13: ret = (virge->chip == S3_VIRGEVX || virge->chip == S3_TRIO3D2X) ? (svga->crtc[0x59] & 0xfe) : (svga->crtc[0x59] & 0xfc); break; + case 0x10: + ret = 0x00; + break; /*Linear frame buffer address*/ + case 0x11: + ret = 0x00; + break; + case 0x12: + ret = 0x00; + break; + case 0x13: + ret = (virge->chip == S3_VIRGEVX || virge->chip == S3_TRIO3D2X) ? (svga->crtc[0x59] & 0xfe) : (svga->crtc[0x59] & 0xfc); + break; - case 0x2c: ret = 0x33; break; /* Subsystem vendor ID */ - case 0x2d: ret = 0x53; break; - case 0x2e: ret = virge->virge_id_low; break; - case 0x2f: ret = virge->virge_id_high; break; + case 0x2c: + ret = 0x33; + break; /* Subsystem vendor ID */ + case 0x2d: + ret = 0x53; + break; + case 0x2e: + ret = virge->virge_id_low; + break; + case 0x2f: + ret = virge->virge_id_high; + break; - case 0x30: ret = virge->pci_regs[0x30] & 0x01; break; /*BIOS ROM address*/ - case 0x31: ret = 0x00; break; - case 0x32: ret = virge->pci_regs[0x32]; break; - case 0x33: ret = virge->pci_regs[0x33]; break; + case 0x30: + ret = virge->pci_regs[0x30] & 0x01; + break; /*BIOS ROM address*/ + case 0x31: + ret = 0x00; + break; + case 0x32: + ret = virge->pci_regs[0x32]; + break; + case 0x33: + ret = virge->pci_regs[0x33]; + break; - case 0x34: ret = (virge->chip >= S3_VIRGEGX2) ? 0xdc : 0x00; break; + case 0x34: + ret = (virge->chip >= S3_VIRGEGX2) ? 0xdc : 0x00; + break; - case 0x3c: ret = virge->pci_regs[0x3c]; break; + case 0x3c: + ret = virge->pci_regs[0x3c]; + break; - case 0x3d: ret = PCI_INTA; break; /*INTA*/ + case 0x3d: + ret = PCI_INTA; + break; /*INTA*/ - case 0x3e: ret = 0x04; break; - case 0x3f: ret = 0xff; break; + case 0x3e: + ret = 0x04; + break; + case 0x3f: + ret = 0xff; + break; - case 0x80: ret = 0x02; break; /* AGP capability */ - case 0x81: ret = 0x00; break; - case 0x82: ret = 0x10; break; /* assumed AGP 1.0 */ + case 0x80: + ret = 0x02; + break; /* AGP capability */ + case 0x81: + ret = 0x00; + break; + case 0x82: + ret = 0x10; + break; /* assumed AGP 1.0 */ - case 0x84: ret = (virge->chip >= S3_TRIO3D2X) ? 0x03 : 0x01; break; - case 0x87: ret = 0x1f; break; + case 0x84: + ret = (virge->chip >= S3_TRIO3D2X) ? 0x03 : 0x01; + break; + case 0x87: + ret = 0x1f; + break; - case 0x88: ret = virge->pci_regs[0x88]; break; - case 0x89: ret = virge->pci_regs[0x89]; break; - case 0x8a: ret = virge->pci_regs[0x8a]; break; - case 0x8b: ret = virge->pci_regs[0x8b]; break; + case 0x88: + ret = virge->pci_regs[0x88]; + break; + case 0x89: + ret = virge->pci_regs[0x89]; + break; + case 0x8a: + ret = virge->pci_regs[0x8a]; + break; + case 0x8b: + ret = virge->pci_regs[0x8b]; + break; - case 0xdc: ret = 0x01; break; /* PCI Power Management capability */ - case 0xdd: ret = virge->is_agp ? 0x80 : 0x00; break; - case 0xde: ret = 0x21; break; + case 0xdc: + ret = 0x01; + break; /* PCI Power Management capability */ + case 0xdd: + ret = virge->is_agp ? 0x80 : 0x00; + break; + case 0xde: + ret = 0x21; + break; - case 0xe0: ret = virge->pci_regs[0xe0]; break; - case 0xe1: ret = virge->pci_regs[0xe1]; break; - case 0xe2: ret = virge->pci_regs[0xe2]; break; - case 0xe3: ret = virge->pci_regs[0xe3]; break; - } - return ret; + case 0xe0: + ret = virge->pci_regs[0xe0]; + break; + case 0xe1: + ret = virge->pci_regs[0xe1]; + break; + case 0xe2: + ret = virge->pci_regs[0xe2]; + break; + case 0xe3: + ret = virge->pci_regs[0xe3]; + break; + } + return ret; } -static void s3_virge_pci_write(int func, int addr, uint8_t val, void *p) +static void +s3_virge_pci_write(int func, int addr, uint8_t val, void *p) { - virge_t *virge = (virge_t *)p; - svga_t *svga = &virge->svga; - switch (addr) - { - case 0x00: case 0x01: case 0x02: case 0x03: - case 0x08: case 0x09: case 0x0a: case 0x0b: - case 0x3d: case 0x3e: case 0x3f: - return; + virge_t *virge = (virge_t *) p; + svga_t *svga = &virge->svga; + switch (addr) { + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + case 0x3d: + case 0x3e: + case 0x3f: + return; - case PCI_REG_COMMAND: - if (val & PCI_COMMAND_IO) - { - io_removehandler(0x03c0, 0x0020, s3_virge_in, NULL, NULL, s3_virge_out, NULL, NULL, virge); - io_sethandler(0x03c0, 0x0020, s3_virge_in, NULL, NULL, s3_virge_out, NULL, NULL, virge); - } + case PCI_REG_COMMAND: + if (val & PCI_COMMAND_IO) { + io_removehandler(0x03c0, 0x0020, s3_virge_in, NULL, NULL, s3_virge_out, NULL, NULL, virge); + io_sethandler(0x03c0, 0x0020, s3_virge_in, NULL, NULL, s3_virge_out, NULL, NULL, virge); + } else + io_removehandler(0x03c0, 0x0020, s3_virge_in, NULL, NULL, s3_virge_out, NULL, NULL, virge); + virge->pci_regs[PCI_REG_COMMAND] = val & 0x27; + s3_virge_updatemapping(virge); + return; + case 0x07: + virge->pci_regs[0x07] = val & 0x3e; + return; + case 0x0d: + virge->pci_regs[0x0d] = val & 0xf8; + return; + + case 0x13: + svga->crtc[0x59] = (virge->chip == S3_VIRGEVX || virge->chip == S3_TRIO3D2X) ? (val & 0xfe) : (val & 0xfc); + s3_virge_updatemapping(virge); + return; + + case 0x30: + case 0x32: + case 0x33: + virge->pci_regs[addr] = val; + if (virge->pci_regs[0x30] & 0x01) { + uint32_t biosaddr = (virge->pci_regs[0x32] << 16) | (virge->pci_regs[0x33] << 24); + if (virge->chip == S3_VIRGEGX2) + mem_mapping_set_addr(&virge->bios_rom.mapping, biosaddr, 0x10000); else - io_removehandler(0x03c0, 0x0020, s3_virge_in, NULL, NULL, s3_virge_out, NULL, NULL, virge); - virge->pci_regs[PCI_REG_COMMAND] = val & 0x27; - s3_virge_updatemapping(virge); - return; - case 0x07: - virge->pci_regs[0x07] = val & 0x3e; - return; - case 0x0d: - virge->pci_regs[0x0d] = val & 0xf8; - return; + mem_mapping_set_addr(&virge->bios_rom.mapping, biosaddr, 0x8000); + } else { + mem_mapping_disable(&virge->bios_rom.mapping); + } + return; + case 0x3c: + virge->pci_regs[0x3c] = val; + return; - case 0x13: - svga->crtc[0x59] = (virge->chip == S3_VIRGEVX || virge->chip == S3_TRIO3D2X) ? (val & 0xfe) : (val & 0xfc); - s3_virge_updatemapping(virge); - return; + case 0x88: + virge->pci_regs[0x88] = val & 0x27; + return; - case 0x30: case 0x32: case 0x33: - virge->pci_regs[addr] = val; - if (virge->pci_regs[0x30] & 0x01) - { - uint32_t biosaddr = (virge->pci_regs[0x32] << 16) | (virge->pci_regs[0x33] << 24); - if (virge->chip == S3_VIRGEGX2) - mem_mapping_set_addr(&virge->bios_rom.mapping, biosaddr, 0x10000); - else - mem_mapping_set_addr(&virge->bios_rom.mapping, biosaddr, 0x8000); - } - else - { - mem_mapping_disable(&virge->bios_rom.mapping); - } - return; - case 0x3c: - virge->pci_regs[0x3c] = val; - return; + case 0x89: + virge->pci_regs[0x89] = val & 0x03; + return; - case 0x88: - virge->pci_regs[0x88] = val & 0x27; - return; + case 0x8b: + case 0xe1: + case 0xe3: + virge->pci_regs[addr] = val; + return; - case 0x89: - virge->pci_regs[0x89] = val & 0x03; - return; + case 0xe0: + virge->pci_regs[0xe0] = val & 0x03; + return; - case 0x8b: case 0xe1: case 0xe3: - virge->pci_regs[addr] = val; - return; - - case 0xe0: - virge->pci_regs[0xe0] = val & 0x03; - return; - - case 0xe2: - virge->pci_regs[0xe2] = val & 0xc0; - return; - } + case 0xe2: + virge->pci_regs[0xe2] = val & 0xc0; + return; + } } -static void s3_virge_reset(void *priv) +static void +s3_virge_reset(void *priv) { - virge_t *virge = (virge_t *) priv; - svga_t *svga = &virge->svga; + virge_t *virge = (virge_t *) priv; + svga_t *svga = &virge->svga; memset(svga->crtc, 0x00, sizeof(svga->crtc)); - svga->crtc[0] = 63; - svga->crtc[6] = 255; - svga->dispontime = 1000ull << 32; + svga->crtc[0] = 63; + svga->crtc[6] = 255; + svga->dispontime = 1000ull << 32; svga->dispofftime = 1000ull << 32; - svga->bpp = 8; + svga->bpp = 8; io_removehandler(0x03c0, 0x0020, s3_virge_in, NULL, NULL, s3_virge_out, NULL, NULL, virge); io_sethandler(0x03c0, 0x0020, s3_virge_in, NULL, NULL, s3_virge_out, NULL, NULL, virge); memset(virge->pci_regs, 0x00, 256); - virge->pci_regs[PCI_REG_COMMAND] = 3; - virge->pci_regs[0x05] = 0; - virge->pci_regs[0x06] = 0; - virge->pci_regs[0x07] = 2; - virge->pci_regs[0x32] = 0x0c; - virge->pci_regs[0x3d] = 1; - virge->pci_regs[0x3e] = 4; - virge->pci_regs[0x3f] = 0xff; + virge->pci_regs[PCI_REG_COMMAND] = 3; + virge->pci_regs[0x05] = 0; + virge->pci_regs[0x06] = 0; + virge->pci_regs[0x07] = 2; + virge->pci_regs[0x32] = 0x0c; + virge->pci_regs[0x3d] = 1; + virge->pci_regs[0x3e] = 4; + virge->pci_regs[0x3f] = 0xff; - switch(virge->local) { - case S3_VIRGE_325: - case S3_DIAMOND_STEALTH3D_2000: - virge->svga.crtc[0x59] = 0x70; - break; - case S3_DIAMOND_STEALTH3D_3000: - case S3_STB_VELOCITY_3D: - virge->svga.crtc[0x59] = 0x70; - break; - case S3_VIRGE_GX2: - case S3_DIAMOND_STEALTH3D_4000: - virge->svga.crtc[0x6c] = 1; - virge->svga.crtc[0x59] = 0x70; - break; + switch (virge->local) { + case S3_VIRGE_325: + case S3_DIAMOND_STEALTH3D_2000: + virge->svga.crtc[0x59] = 0x70; + break; + case S3_DIAMOND_STEALTH3D_3000: + case S3_STB_VELOCITY_3D: + virge->svga.crtc[0x59] = 0x70; + break; + case S3_VIRGE_GX2: + case S3_DIAMOND_STEALTH3D_4000: + virge->svga.crtc[0x6c] = 1; + virge->svga.crtc[0x59] = 0x70; + break; - case S3_TRIO_3D2X: - virge->svga.crtc[0x6c] = 1; - virge->svga.crtc[0x59] = 0x70; - break; + case S3_TRIO_3D2X: + virge->svga.crtc[0x6c] = 1; + virge->svga.crtc[0x59] = 0x70; + break; - default: - virge->svga.crtc[0x6c] = 1; - virge->svga.crtc[0x59] = 0x70; - break; - } + default: + virge->svga.crtc[0x6c] = 1; + virge->svga.crtc[0x59] = 0x70; + break; + } - if (virge->chip == S3_VIRGEGX2) - virge->svga.crtc[0x36] = 2 | (2 << 2) | (1 << 4) | (1 << 5); - else { - switch (virge->memory_size) { - case 2: - if (virge->chip == S3_VIRGEVX) { - virge->svga.crtc[0x36] = (0 << 5); - } else - virge->svga.crtc[0x36] = 2 | (0 << 2) | (1 << 4) | (4 << 5); - break; - case 8: - if (virge->chip == S3_TRIO3D2X) - virge->svga.crtc[0x36] = 2 | (2 << 2) | (1 << 4) | (0 << 5); - else - virge->svga.crtc[0x36] = (3 << 5); - break; - case 4: - if (virge->chip == S3_VIRGEVX) - virge->svga.crtc[0x36] = (1 << 5); - else if (virge->chip == S3_TRIO3D2X) - virge->svga.crtc[0x36] = 2 | (2 << 2) | (1 << 4) | (2 << 5); - else - virge->svga.crtc[0x36] = 2 | (0 << 2) | (1 << 4) | (0 << 5); - break; - } - if (virge->local == S3_VIRGE_GX) - virge->svga.crtc[0x36] |= (1 << 2); - } + if (virge->chip == S3_VIRGEGX2) + virge->svga.crtc[0x36] = 2 | (2 << 2) | (1 << 4) | (1 << 5); + else { + switch (virge->memory_size) { + case 2: + if (virge->chip == S3_VIRGEVX) { + virge->svga.crtc[0x36] = (0 << 5); + } else + virge->svga.crtc[0x36] = 2 | (0 << 2) | (1 << 4) | (4 << 5); + break; + case 8: + if (virge->chip == S3_TRIO3D2X) + virge->svga.crtc[0x36] = 2 | (2 << 2) | (1 << 4) | (0 << 5); + else + virge->svga.crtc[0x36] = (3 << 5); + break; + case 4: + if (virge->chip == S3_VIRGEVX) + virge->svga.crtc[0x36] = (1 << 5); + else if (virge->chip == S3_TRIO3D2X) + virge->svga.crtc[0x36] = 2 | (2 << 2) | (1 << 4) | (2 << 5); + else + virge->svga.crtc[0x36] = 2 | (0 << 2) | (1 << 4) | (0 << 5); + break; + } + if (virge->local == S3_VIRGE_GX) + virge->svga.crtc[0x36] |= (1 << 2); + } - virge->svga.crtc[0x37] = 1 | (7 << 5); - virge->svga.crtc[0x53] = 8; + virge->svga.crtc[0x37] = 1 | (7 << 5); + virge->svga.crtc[0x53] = 8; mem_mapping_disable(&virge->bios_rom.mapping); s3_virge_updatemapping(virge); - mem_mapping_disable(&virge->mmio_mapping); - mem_mapping_disable(&virge->new_mmio_mapping); + mem_mapping_disable(&virge->mmio_mapping); + mem_mapping_disable(&virge->new_mmio_mapping); } -static void *s3_virge_init(const device_t *info) +static void * +s3_virge_init(const device_t *info) { - const char *bios_fn; - virge_t *virge = malloc(sizeof(virge_t)); + const char *bios_fn; + virge_t *virge = malloc(sizeof(virge_t)); - memset(virge, 0, sizeof(virge_t)); + memset(virge, 0, sizeof(virge_t)); - virge->bilinear_enabled = device_get_config_int("bilinear"); - virge->dithering_enabled = device_get_config_int("dithering"); - if (info->local >= S3_VIRGE_GX2) - virge->memory_size = 4; - else - virge->memory_size = device_get_config_int("memory"); + virge->bilinear_enabled = device_get_config_int("bilinear"); + virge->dithering_enabled = device_get_config_int("dithering"); + if (info->local >= S3_VIRGE_GX2) + virge->memory_size = 4; + else + virge->memory_size = device_get_config_int("memory"); + switch (info->local) { + case S3_VIRGE_325: + bios_fn = ROM_VIRGE_325; + break; + case S3_DIAMOND_STEALTH3D_2000: + bios_fn = ROM_DIAMOND_STEALTH3D_2000; + break; + case S3_DIAMOND_STEALTH3D_3000: + bios_fn = ROM_DIAMOND_STEALTH3D_3000; + break; + case S3_STB_VELOCITY_3D: + bios_fn = ROM_STB_VELOCITY_3D; + break; + case S3_VIRGE_DX: + bios_fn = ROM_VIRGE_DX; + break; + case S3_DIAMOND_STEALTH3D_2000PRO: + bios_fn = ROM_DIAMOND_STEALTH3D_2000PRO; + break; + case S3_VIRGE_GX: + bios_fn = ROM_VIRGE_GX; + break; + case S3_VIRGE_GX2: + bios_fn = ROM_VIRGE_GX2; + break; + case S3_DIAMOND_STEALTH3D_4000: + bios_fn = ROM_DIAMOND_STEALTH3D_4000; + break; + case S3_TRIO_3D2X: + bios_fn = ROM_TRIO3D2X; + break; + default: + free(virge); + return NULL; + } - switch(info->local) { - case S3_VIRGE_325: - bios_fn = ROM_VIRGE_325; - break; - case S3_DIAMOND_STEALTH3D_2000: - bios_fn = ROM_DIAMOND_STEALTH3D_2000; - break; - case S3_DIAMOND_STEALTH3D_3000: - bios_fn = ROM_DIAMOND_STEALTH3D_3000; - break; - case S3_STB_VELOCITY_3D: - bios_fn = ROM_STB_VELOCITY_3D; - break; - case S3_VIRGE_DX: - bios_fn = ROM_VIRGE_DX; - break; - case S3_DIAMOND_STEALTH3D_2000PRO: - bios_fn = ROM_DIAMOND_STEALTH3D_2000PRO; - break; - case S3_VIRGE_GX: - bios_fn = ROM_VIRGE_GX; - break; - case S3_VIRGE_GX2: - bios_fn = ROM_VIRGE_GX2; - break; - case S3_DIAMOND_STEALTH3D_4000: - bios_fn = ROM_DIAMOND_STEALTH3D_4000; - break; - case S3_TRIO_3D2X: - bios_fn = ROM_TRIO3D2X; - break; - default: - free(virge); - return NULL; - } - - svga_init(info, &virge->svga, virge, virge->memory_size << 20, - s3_virge_recalctimings, - s3_virge_in, s3_virge_out, - s3_virge_hwcursor_draw, - s3_virge_overlay_draw); + svga_init(info, &virge->svga, virge, virge->memory_size << 20, + s3_virge_recalctimings, + s3_virge_in, s3_virge_out, + s3_virge_hwcursor_draw, + s3_virge_overlay_draw); virge->svga.hwcursor.cur_ysize = 64; - if (info->local == S3_VIRGE_GX2) - rom_init(&virge->bios_rom, (char *) bios_fn, 0xc0000, 0x10000, 0xffff, 0, MEM_MAPPING_EXTERNAL); - else - rom_init(&virge->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + if (info->local == S3_VIRGE_GX2) + rom_init(&virge->bios_rom, (char *) bios_fn, 0xc0000, 0x10000, 0xffff, 0, MEM_MAPPING_EXTERNAL); + else + rom_init(&virge->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - mem_mapping_disable(&virge->bios_rom.mapping); + mem_mapping_disable(&virge->bios_rom.mapping); - mem_mapping_add(&virge->linear_mapping, 0, 0, svga_read_linear, - svga_readw_linear, - svga_readl_linear, - svga_write_linear, - svga_writew_linear, - svga_writel_linear, - NULL, - MEM_MAPPING_EXTERNAL, - &virge->svga); - mem_mapping_add(&virge->mmio_mapping, 0, 0, s3_virge_mmio_read, - s3_virge_mmio_read_w, - s3_virge_mmio_read_l, - s3_virge_mmio_write, - s3_virge_mmio_write_w, - s3_virge_mmio_write_l, - NULL, - MEM_MAPPING_EXTERNAL, - virge); - mem_mapping_add(&virge->new_mmio_mapping, 0, 0, s3_virge_mmio_read, - s3_virge_mmio_read_w, - s3_virge_mmio_read_l, - s3_virge_mmio_write, - s3_virge_mmio_write_w, - s3_virge_mmio_write_l, - NULL, - MEM_MAPPING_EXTERNAL, - virge); + mem_mapping_add(&virge->linear_mapping, 0, 0, svga_read_linear, + svga_readw_linear, + svga_readl_linear, + svga_write_linear, + svga_writew_linear, + svga_writel_linear, + NULL, + MEM_MAPPING_EXTERNAL, + &virge->svga); + mem_mapping_add(&virge->mmio_mapping, 0, 0, s3_virge_mmio_read, + s3_virge_mmio_read_w, + s3_virge_mmio_read_l, + s3_virge_mmio_write, + s3_virge_mmio_write_w, + s3_virge_mmio_write_l, + NULL, + MEM_MAPPING_EXTERNAL, + virge); + mem_mapping_add(&virge->new_mmio_mapping, 0, 0, s3_virge_mmio_read, + s3_virge_mmio_read_w, + s3_virge_mmio_read_l, + s3_virge_mmio_write, + s3_virge_mmio_write_w, + s3_virge_mmio_write_l, + NULL, + MEM_MAPPING_EXTERNAL, + virge); - io_sethandler(0x03c0, 0x0020, s3_virge_in, NULL, NULL, s3_virge_out, NULL, NULL, virge); + io_sethandler(0x03c0, 0x0020, s3_virge_in, NULL, NULL, s3_virge_out, NULL, NULL, virge); - virge->pci_regs[PCI_REG_COMMAND] = 3; - virge->pci_regs[0x05] = 0; - virge->pci_regs[0x06] = 0; - virge->pci_regs[0x07] = 2; - virge->pci_regs[0x32] = 0x0c; - virge->pci_regs[0x3d] = 1; - virge->pci_regs[0x3e] = 4; - virge->pci_regs[0x3f] = 0xff; + virge->pci_regs[PCI_REG_COMMAND] = 3; + virge->pci_regs[0x05] = 0; + virge->pci_regs[0x06] = 0; + virge->pci_regs[0x07] = 2; + virge->pci_regs[0x32] = 0x0c; + virge->pci_regs[0x3d] = 1; + virge->pci_regs[0x3e] = 4; + virge->pci_regs[0x3f] = 0xff; - virge->virge_rev = 0; - virge->virge_id = 0xe1; - virge->is_agp = !!(info->flags & DEVICE_AGP); + virge->virge_rev = 0; + virge->virge_id = 0xe1; + virge->is_agp = !!(info->flags & DEVICE_AGP); - switch(info->local) { - case S3_VIRGE_325: - case S3_DIAMOND_STEALTH3D_2000: - virge->svga.decode_mask = (4 << 20) - 1; - virge->virge_id_high = 0x56; - virge->virge_id_low = 0x31; - virge->svga.crtc[0x59] = 0x70; - virge->chip = S3_VIRGE; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_diamond_stealth3d_2000_pci); - break; - case S3_DIAMOND_STEALTH3D_3000: - case S3_STB_VELOCITY_3D: - virge->svga.decode_mask = (8 << 20) - 1; - virge->virge_id_high = 0x88; - virge->virge_id_low = 0x3d; - virge->svga.crtc[0x59] = 0x70; - virge->chip = S3_VIRGEVX; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_diamond_stealth3d_3000_pci); - break; - case S3_VIRGE_GX2: - case S3_DIAMOND_STEALTH3D_4000: - virge->svga.decode_mask = (4 << 20) - 1; - virge->virge_id_high = 0x8a; - virge->virge_id_low = 0x10; - virge->svga.crtc[0x6c] = 1; - virge->svga.crtc[0x59] = 0x70; - virge->svga.vblank_start = s3_virge_vblank_start; - virge->chip = S3_VIRGEGX2; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, virge->is_agp ? &timing_virge_agp : &timing_virge_dx_pci); - break; + switch (info->local) { + case S3_VIRGE_325: + case S3_DIAMOND_STEALTH3D_2000: + virge->svga.decode_mask = (4 << 20) - 1; + virge->virge_id_high = 0x56; + virge->virge_id_low = 0x31; + virge->svga.crtc[0x59] = 0x70; + virge->chip = S3_VIRGE; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_diamond_stealth3d_2000_pci); + break; + case S3_DIAMOND_STEALTH3D_3000: + case S3_STB_VELOCITY_3D: + virge->svga.decode_mask = (8 << 20) - 1; + virge->virge_id_high = 0x88; + virge->virge_id_low = 0x3d; + virge->svga.crtc[0x59] = 0x70; + virge->chip = S3_VIRGEVX; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_diamond_stealth3d_3000_pci); + break; + case S3_VIRGE_GX2: + case S3_DIAMOND_STEALTH3D_4000: + virge->svga.decode_mask = (4 << 20) - 1; + virge->virge_id_high = 0x8a; + virge->virge_id_low = 0x10; + virge->svga.crtc[0x6c] = 1; + virge->svga.crtc[0x59] = 0x70; + virge->svga.vblank_start = s3_virge_vblank_start; + virge->chip = S3_VIRGEGX2; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, virge->is_agp ? &timing_virge_agp : &timing_virge_dx_pci); + break; - case S3_TRIO_3D2X: - virge->svga.decode_mask = (8 << 20) - 1; - virge->virge_id_high = 0x8a; - virge->virge_id_low = 0x13; - virge->virge_rev = 0x01; - virge->svga.crtc[0x6c] = 1; - virge->svga.crtc[0x59] = 0x70; - virge->svga.vblank_start = s3_virge_vblank_start; - virge->chip = S3_TRIO3D2X; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, virge->is_agp ? &timing_virge_agp : &timing_virge_dx_pci); - break; + case S3_TRIO_3D2X: + virge->svga.decode_mask = (8 << 20) - 1; + virge->virge_id_high = 0x8a; + virge->virge_id_low = 0x13; + virge->virge_rev = 0x01; + virge->svga.crtc[0x6c] = 1; + virge->svga.crtc[0x59] = 0x70; + virge->svga.vblank_start = s3_virge_vblank_start; + virge->chip = S3_TRIO3D2X; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, virge->is_agp ? &timing_virge_agp : &timing_virge_dx_pci); + break; - case S3_VIRGE_GX: - virge->virge_rev = 0x01; - /*FALLTHROUGH*/ - default: - virge->svga.decode_mask = (4 << 20) - 1; - virge->virge_id_high = 0x8a; - virge->virge_id_low = 0x01; - virge->svga.crtc[0x6c] = 1; - virge->svga.crtc[0x59] = 0x70; - virge->svga.vblank_start = s3_virge_vblank_start; - virge->chip = S3_VIRGEDX; - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_virge_dx_pci); - break; - } + case S3_VIRGE_GX: + virge->virge_rev = 0x01; + /*FALLTHROUGH*/ + default: + virge->svga.decode_mask = (4 << 20) - 1; + virge->virge_id_high = 0x8a; + virge->virge_id_low = 0x01; + virge->svga.crtc[0x6c] = 1; + virge->svga.crtc[0x59] = 0x70; + virge->svga.vblank_start = s3_virge_vblank_start; + virge->chip = S3_VIRGEDX; + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_virge_dx_pci); + break; + } - if (virge->chip == S3_VIRGEGX2) { - virge->vram_mask = (4 << 20) - 1; - virge->svga.vram_mask = (4 << 20) - 1; - virge->svga.vram_max = 4 << 20; - virge->svga.crtc[0x36] = 2 | (2 << 2) | (1 << 4) | (1 << 5); - } else { - switch (virge->memory_size) { - case 2: - virge->vram_mask = (2 << 20) - 1; - virge->svga.vram_mask = (2 << 20) - 1; - virge->svga.vram_max = 2 << 20; - if (virge->chip == S3_VIRGEVX) { - virge->svga.crtc[0x36] = (0 << 5); - } else - virge->svga.crtc[0x36] = 2 | (0 << 2) | (1 << 4) | (4 << 5); - break; - case 8: - virge->vram_mask = (8 << 20) - 1; - virge->svga.vram_mask = (8 << 20) - 1; - virge->svga.vram_max = 8 << 20; - if (virge->chip == S3_TRIO3D2X) - virge->svga.crtc[0x36] = 2 | (2 << 2) | (1 << 4) | (0 << 5); - else - virge->svga.crtc[0x36] = (3 << 5); - break; - case 4: - virge->vram_mask = (4 << 20) - 1; - virge->svga.vram_mask = (4 << 20) - 1; - virge->svga.vram_max = 4 << 20; - if (virge->chip == S3_VIRGEVX) - virge->svga.crtc[0x36] = (1 << 5); - else if (virge->chip == S3_TRIO3D2X) - virge->svga.crtc[0x36] = 2 | (2 << 2) | (1 << 4) | (2 << 5); - else - virge->svga.crtc[0x36] = 2 | (0 << 2) | (1 << 4) | (0 << 5); - break; - } - if (info->local == S3_VIRGE_GX) - virge->svga.crtc[0x36] |= (1 << 2); - } + if (virge->chip == S3_VIRGEGX2) { + virge->vram_mask = (4 << 20) - 1; + virge->svga.vram_mask = (4 << 20) - 1; + virge->svga.vram_max = 4 << 20; + virge->svga.crtc[0x36] = 2 | (2 << 2) | (1 << 4) | (1 << 5); + } else { + switch (virge->memory_size) { + case 2: + virge->vram_mask = (2 << 20) - 1; + virge->svga.vram_mask = (2 << 20) - 1; + virge->svga.vram_max = 2 << 20; + if (virge->chip == S3_VIRGEVX) { + virge->svga.crtc[0x36] = (0 << 5); + } else + virge->svga.crtc[0x36] = 2 | (0 << 2) | (1 << 4) | (4 << 5); + break; + case 8: + virge->vram_mask = (8 << 20) - 1; + virge->svga.vram_mask = (8 << 20) - 1; + virge->svga.vram_max = 8 << 20; + if (virge->chip == S3_TRIO3D2X) + virge->svga.crtc[0x36] = 2 | (2 << 2) | (1 << 4) | (0 << 5); + else + virge->svga.crtc[0x36] = (3 << 5); + break; + case 4: + virge->vram_mask = (4 << 20) - 1; + virge->svga.vram_mask = (4 << 20) - 1; + virge->svga.vram_max = 4 << 20; + if (virge->chip == S3_VIRGEVX) + virge->svga.crtc[0x36] = (1 << 5); + else if (virge->chip == S3_TRIO3D2X) + virge->svga.crtc[0x36] = 2 | (2 << 2) | (1 << 4) | (2 << 5); + else + virge->svga.crtc[0x36] = 2 | (0 << 2) | (1 << 4) | (0 << 5); + break; + } + if (info->local == S3_VIRGE_GX) + virge->svga.crtc[0x36] |= (1 << 2); + } - virge->svga.crtc[0x37] = 1 | (7 << 5); - virge->svga.crtc[0x53] = 8; + virge->svga.crtc[0x37] = 1 | (7 << 5); + virge->svga.crtc[0x53] = 8; - virge->card = pci_add_card(virge->is_agp ? PCI_ADD_AGP : PCI_ADD_VIDEO, s3_virge_pci_read, s3_virge_pci_write, virge); + virge->card = pci_add_card(virge->is_agp ? PCI_ADD_AGP : PCI_ADD_VIDEO, s3_virge_pci_read, s3_virge_pci_write, virge); - virge->i2c = i2c_gpio_init("ddc_s3_virge"); - virge->ddc = ddc_init(i2c_gpio_get_bus(virge->i2c)); + virge->i2c = i2c_gpio_init("ddc_s3_virge"); + virge->ddc = ddc_init(i2c_gpio_get_bus(virge->i2c)); - virge->svga.force_old_addr = 1; + virge->svga.force_old_addr = 1; - virge->wake_render_thread = thread_create_event(); - virge->wake_main_thread = thread_create_event(); - virge->not_full_event = thread_create_event(); - virge->render_thread_run = 1; - virge->render_thread = thread_create(render_thread, virge); + virge->wake_render_thread = thread_create_event(); + virge->wake_main_thread = thread_create_event(); + virge->not_full_event = thread_create_event(); + virge->render_thread_run = 1; + virge->render_thread = thread_create(render_thread, virge); - timer_add(&virge->tri_timer, s3_virge_tri_timer, virge, 0); + timer_add(&virge->tri_timer, s3_virge_tri_timer, virge, 0); - virge->local = info->local; + virge->local = info->local; - return virge; + return virge; } -static void s3_virge_close(void *p) +static void +s3_virge_close(void *p) { - virge_t *virge = (virge_t *)p; + virge_t *virge = (virge_t *) p; - virge->render_thread_run = 0; - thread_set_event(virge->wake_render_thread); - thread_wait(virge->render_thread); - thread_destroy_event(virge->not_full_event); - thread_destroy_event(virge->wake_main_thread); - thread_destroy_event(virge->wake_render_thread); + virge->render_thread_run = 0; + thread_set_event(virge->wake_render_thread); + thread_wait(virge->render_thread); + thread_destroy_event(virge->not_full_event); + thread_destroy_event(virge->wake_main_thread); + thread_destroy_event(virge->wake_render_thread); - svga_close(&virge->svga); + svga_close(&virge->svga); - ddc_close(virge->ddc); - i2c_gpio_close(virge->i2c); + ddc_close(virge->ddc); + i2c_gpio_close(virge->i2c); - free(virge); + free(virge); } -static int s3_virge_325_diamond_available(void) +static int +s3_virge_325_diamond_available(void) { - return rom_present(ROM_DIAMOND_STEALTH3D_2000); + return rom_present(ROM_DIAMOND_STEALTH3D_2000); } -static int s3_virge_325_available(void) +static int +s3_virge_325_available(void) { - return rom_present(ROM_VIRGE_325); + return rom_present(ROM_VIRGE_325); } -static int s3_virge_988_diamond_available(void) +static int +s3_virge_988_diamond_available(void) { - return rom_present(ROM_DIAMOND_STEALTH3D_3000); + return rom_present(ROM_DIAMOND_STEALTH3D_3000); } -static int s3_virge_988_stb_available(void) +static int +s3_virge_988_stb_available(void) { - return rom_present(ROM_STB_VELOCITY_3D); + return rom_present(ROM_STB_VELOCITY_3D); } -static int s3_virge_375_available(void) +static int +s3_virge_375_available(void) { - return rom_present(ROM_VIRGE_DX); + return rom_present(ROM_VIRGE_DX); } -static int s3_virge_375_diamond_available(void) +static int +s3_virge_375_diamond_available(void) { - return rom_present(ROM_DIAMOND_STEALTH3D_2000PRO); + return rom_present(ROM_DIAMOND_STEALTH3D_2000PRO); } -static int s3_virge_385_available(void) +static int +s3_virge_385_available(void) { - return rom_present(ROM_VIRGE_GX); + return rom_present(ROM_VIRGE_GX); } -static int s3_virge_357_available(void) +static int +s3_virge_357_available(void) { - return rom_present(ROM_VIRGE_GX2); + return rom_present(ROM_VIRGE_GX2); } -static int s3_virge_357_diamond_available(void) +static int +s3_virge_357_diamond_available(void) { - return rom_present(ROM_DIAMOND_STEALTH3D_4000); + return rom_present(ROM_DIAMOND_STEALTH3D_4000); } -static int s3_trio3d2x_available(void) +static int +s3_trio3d2x_available(void) { - return rom_present(ROM_TRIO3D2X); + return rom_present(ROM_TRIO3D2X); } -static void s3_virge_speed_changed(void *p) +static void +s3_virge_speed_changed(void *p) { - virge_t *virge = (virge_t *)p; + virge_t *virge = (virge_t *) p; - svga_recalctimings(&virge->svga); + svga_recalctimings(&virge->svga); } -static void s3_virge_force_redraw(void *p) +static void +s3_virge_force_redraw(void *p) { - virge_t *virge = (virge_t *)p; + virge_t *virge = (virge_t *) p; - virge->svga.fullchange = changeframecount; + virge->svga.fullchange = changeframecount; } static const device_config_t s3_virge_config[] = { + // clang-format off { .name = "memory", .description = "Memory size", @@ -4250,9 +4485,11 @@ static const device_config_t s3_virge_config[] = { { .type = CONFIG_END } + // clang-format on }; static const device_config_t s3_virge_stb_config[] = { + // clang-format off { .name = "memory", .description = "Memory size", @@ -4291,9 +4528,11 @@ static const device_config_t s3_virge_stb_config[] = { { .type = CONFIG_END } + // clang-format on }; static const device_config_t s3_virge_357_config[] = { + // clang-format off { .name = "bilinear", .description = "Bilinear filtering", @@ -4309,9 +4548,11 @@ static const device_config_t s3_virge_357_config[] = { { .type = CONFIG_END } + // clang-format on }; static const device_config_t s3_trio3d2x_config[] = { + // clang-format off { .name = "memory", .description = "Memory size", @@ -4346,186 +4587,187 @@ static const device_config_t s3_trio3d2x_config[] = { { .type = CONFIG_END } +// clang-format on }; const device_t s3_virge_325_pci_device = { - .name = "S3 ViRGE (325) PCI", + .name = "S3 ViRGE (325) PCI", .internal_name = "virge325_pci", - .flags = DEVICE_PCI, - .local = S3_VIRGE_325, - .init = s3_virge_init, - .close = s3_virge_close, - .reset = s3_virge_reset, + .flags = DEVICE_PCI, + .local = S3_VIRGE_325, + .init = s3_virge_init, + .close = s3_virge_close, + .reset = s3_virge_reset, { .available = s3_virge_325_available }, .speed_changed = s3_virge_speed_changed, - .force_redraw = s3_virge_force_redraw, - .config = s3_virge_config + .force_redraw = s3_virge_force_redraw, + .config = s3_virge_config }; const device_t s3_diamond_stealth_2000_pci_device = { - .name = "S3 ViRGE (Diamond Stealth 3D 2000) PCI", + .name = "S3 ViRGE (Diamond Stealth 3D 2000) PCI", .internal_name = "stealth3d_2000_pci", - .flags = DEVICE_PCI, - .local = S3_DIAMOND_STEALTH3D_2000, - .init = s3_virge_init, - .close = s3_virge_close, - .reset = s3_virge_reset, + .flags = DEVICE_PCI, + .local = S3_DIAMOND_STEALTH3D_2000, + .init = s3_virge_init, + .close = s3_virge_close, + .reset = s3_virge_reset, { .available = s3_virge_325_diamond_available }, .speed_changed = s3_virge_speed_changed, - .force_redraw = s3_virge_force_redraw, - .config = s3_virge_config + .force_redraw = s3_virge_force_redraw, + .config = s3_virge_config }; const device_t s3_diamond_stealth_3000_pci_device = { - .name = "S3 ViRGE/VX (Diamond Stealth 3D 3000) PCI", + .name = "S3 ViRGE/VX (Diamond Stealth 3D 3000) PCI", .internal_name = "stealth3d_3000_pci", - .flags = DEVICE_PCI, - .local = S3_DIAMOND_STEALTH3D_3000, - .init = s3_virge_init, - .close = s3_virge_close, - .reset = s3_virge_reset, + .flags = DEVICE_PCI, + .local = S3_DIAMOND_STEALTH3D_3000, + .init = s3_virge_init, + .close = s3_virge_close, + .reset = s3_virge_reset, { .available = s3_virge_988_diamond_available }, .speed_changed = s3_virge_speed_changed, - .force_redraw = s3_virge_force_redraw, - .config = s3_virge_stb_config + .force_redraw = s3_virge_force_redraw, + .config = s3_virge_stb_config }; const device_t s3_stb_velocity_3d_pci_device = { - .name = "S3 ViRGE/VX (STB Velocity 3D) PCI", + .name = "S3 ViRGE/VX (STB Velocity 3D) PCI", .internal_name = "stb_velocity3d_pci", - .flags = DEVICE_PCI, - .local = S3_STB_VELOCITY_3D, - .init = s3_virge_init, - .close = s3_virge_close, - .reset = s3_virge_reset, + .flags = DEVICE_PCI, + .local = S3_STB_VELOCITY_3D, + .init = s3_virge_init, + .close = s3_virge_close, + .reset = s3_virge_reset, { .available = s3_virge_988_stb_available }, .speed_changed = s3_virge_speed_changed, - .force_redraw = s3_virge_force_redraw, - .config = s3_virge_stb_config + .force_redraw = s3_virge_force_redraw, + .config = s3_virge_stb_config }; const device_t s3_virge_375_pci_device = { - .name = "S3 ViRGE/DX (375) PCI", + .name = "S3 ViRGE/DX (375) PCI", .internal_name = "virge375_pci", - .flags = DEVICE_PCI, - .local = S3_VIRGE_DX, - .init = s3_virge_init, - .close = s3_virge_close, - .reset = s3_virge_reset, + .flags = DEVICE_PCI, + .local = S3_VIRGE_DX, + .init = s3_virge_init, + .close = s3_virge_close, + .reset = s3_virge_reset, { .available = s3_virge_375_available }, .speed_changed = s3_virge_speed_changed, - .force_redraw = s3_virge_force_redraw, - .config = s3_virge_config + .force_redraw = s3_virge_force_redraw, + .config = s3_virge_config }; const device_t s3_diamond_stealth_2000pro_pci_device = { - .name = "S3 ViRGE/DX (Diamond Stealth 3D 2000 Pro) PCI", + .name = "S3 ViRGE/DX (Diamond Stealth 3D 2000 Pro) PCI", .internal_name = "stealth3d_2000pro_pci", - .flags = DEVICE_PCI, - .local = S3_DIAMOND_STEALTH3D_2000PRO, - .init = s3_virge_init, - .close = s3_virge_close, - .reset = s3_virge_reset, + .flags = DEVICE_PCI, + .local = S3_DIAMOND_STEALTH3D_2000PRO, + .init = s3_virge_init, + .close = s3_virge_close, + .reset = s3_virge_reset, { .available = s3_virge_375_diamond_available }, .speed_changed = s3_virge_speed_changed, - .force_redraw = s3_virge_force_redraw, - .config = s3_virge_config + .force_redraw = s3_virge_force_redraw, + .config = s3_virge_config }; const device_t s3_virge_385_pci_device = { - .name = "S3 ViRGE/GX (385) PCI", + .name = "S3 ViRGE/GX (385) PCI", .internal_name = "virge385_pci", - .flags = DEVICE_PCI, - .local = S3_VIRGE_GX, - .init = s3_virge_init, - .close = s3_virge_close, - .reset = s3_virge_reset, + .flags = DEVICE_PCI, + .local = S3_VIRGE_GX, + .init = s3_virge_init, + .close = s3_virge_close, + .reset = s3_virge_reset, { .available = s3_virge_385_available }, .speed_changed = s3_virge_speed_changed, - .force_redraw = s3_virge_force_redraw, - .config = s3_virge_config + .force_redraw = s3_virge_force_redraw, + .config = s3_virge_config }; const device_t s3_virge_357_pci_device = { - .name = "S3 ViRGE/GX2 (357) PCI", + .name = "S3 ViRGE/GX2 (357) PCI", .internal_name = "virge357_pci", - .flags = DEVICE_PCI, - .local = S3_VIRGE_GX2, - .init = s3_virge_init, - .close = s3_virge_close, - .reset = s3_virge_reset, + .flags = DEVICE_PCI, + .local = S3_VIRGE_GX2, + .init = s3_virge_init, + .close = s3_virge_close, + .reset = s3_virge_reset, { .available = s3_virge_357_available }, .speed_changed = s3_virge_speed_changed, - .force_redraw = s3_virge_force_redraw, - .config = s3_virge_357_config + .force_redraw = s3_virge_force_redraw, + .config = s3_virge_357_config }; const device_t s3_virge_357_agp_device = { - .name = "S3 ViRGE/GX2 (357) AGP", + .name = "S3 ViRGE/GX2 (357) AGP", .internal_name = "virge357_agp", - .flags = DEVICE_AGP, - .local = S3_VIRGE_GX2, - .init = s3_virge_init, - .close = s3_virge_close, - .reset = s3_virge_reset, + .flags = DEVICE_AGP, + .local = S3_VIRGE_GX2, + .init = s3_virge_init, + .close = s3_virge_close, + .reset = s3_virge_reset, { .available = s3_virge_357_available }, .speed_changed = s3_virge_speed_changed, - .force_redraw = s3_virge_force_redraw, - .config = s3_virge_357_config + .force_redraw = s3_virge_force_redraw, + .config = s3_virge_357_config }; const device_t s3_diamond_stealth_4000_pci_device = { - .name = "S3 ViRGE/GX2 (Diamond Stealth 3D 4000) PCI", + .name = "S3 ViRGE/GX2 (Diamond Stealth 3D 4000) PCI", .internal_name = "stealth3d_4000_pci", - .flags = DEVICE_PCI, - .local = S3_DIAMOND_STEALTH3D_4000, - .init = s3_virge_init, - .close = s3_virge_close, - .reset = s3_virge_reset, + .flags = DEVICE_PCI, + .local = S3_DIAMOND_STEALTH3D_4000, + .init = s3_virge_init, + .close = s3_virge_close, + .reset = s3_virge_reset, { .available = s3_virge_357_diamond_available }, .speed_changed = s3_virge_speed_changed, - .force_redraw = s3_virge_force_redraw, - .config = s3_virge_357_config + .force_redraw = s3_virge_force_redraw, + .config = s3_virge_357_config }; const device_t s3_diamond_stealth_4000_agp_device = { - .name = "S3 ViRGE/GX2 (Diamond Stealth 3D 4000) AGP", + .name = "S3 ViRGE/GX2 (Diamond Stealth 3D 4000) AGP", .internal_name = "stealth3d_4000_agp", - .flags = DEVICE_AGP, - .local = S3_DIAMOND_STEALTH3D_4000, - .init = s3_virge_init, - .close = s3_virge_close, - .reset = s3_virge_reset, + .flags = DEVICE_AGP, + .local = S3_DIAMOND_STEALTH3D_4000, + .init = s3_virge_init, + .close = s3_virge_close, + .reset = s3_virge_reset, { .available = s3_virge_357_diamond_available }, .speed_changed = s3_virge_speed_changed, - .force_redraw = s3_virge_force_redraw, - .config = s3_virge_357_config + .force_redraw = s3_virge_force_redraw, + .config = s3_virge_357_config }; const device_t s3_trio3d2x_pci_device = { - .name = "S3 Trio3D/2X (362) PCI", + .name = "S3 Trio3D/2X (362) PCI", .internal_name = "trio3d2x", - .flags = DEVICE_PCI, - .local = S3_TRIO_3D2X, - .init = s3_virge_init, - .close = s3_virge_close, - .reset = s3_virge_reset, + .flags = DEVICE_PCI, + .local = S3_TRIO_3D2X, + .init = s3_virge_init, + .close = s3_virge_close, + .reset = s3_virge_reset, { .available = s3_trio3d2x_available }, .speed_changed = s3_virge_speed_changed, - .force_redraw = s3_virge_force_redraw, - .config = s3_trio3d2x_config + .force_redraw = s3_virge_force_redraw, + .config = s3_trio3d2x_config }; const device_t s3_trio3d2x_agp_device = { - .name = "S3 Trio3D/2X (362) AGP", + .name = "S3 Trio3D/2X (362) AGP", .internal_name = "trio3d2x_agp", - .flags = DEVICE_AGP, - .local = S3_TRIO_3D2X, - .init = s3_virge_init, - .close = s3_virge_close, - .reset = s3_virge_reset, + .flags = DEVICE_AGP, + .local = S3_TRIO_3D2X, + .init = s3_virge_init, + .close = s3_virge_close, + .reset = s3_virge_reset, { .available = s3_trio3d2x_available }, .speed_changed = s3_virge_speed_changed, - .force_redraw = s3_virge_force_redraw, - .config = s3_trio3d2x_config + .force_redraw = s3_virge_force_redraw, + .config = s3_trio3d2x_config }; diff --git a/src/video/vid_sc1148x_ramdac.c b/src/video/vid_sc1148x_ramdac.c index 202147d14..936ff308d 100644 --- a/src/video/vid_sc1148x_ramdac.c +++ b/src/video/vid_sc1148x_ramdac.c @@ -28,104 +28,103 @@ #include <86box/video.h> #include <86box/vid_svga.h> - typedef struct { - int type; - int state; - int rs2; + int type; + int state; + int rs2; uint8_t ctrl; } sc1148x_ramdac_t; - void sc1148x_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga) { sc1148x_ramdac_t *ramdac = (sc1148x_ramdac_t *) p; - uint8_t rs = (addr & 0x03) | ((!!rs2) << 2); - int oldbpp = 0; + uint8_t rs = (addr & 0x03) | ((!!rs2) << 2); + int oldbpp = 0; switch (rs) { - case 2: case 6: - switch (ramdac->state) { - case 4: - ramdac->state = 0; - if (val == 0xff) - break; - ramdac->ctrl = val; - ramdac->ctrl = (ramdac->ctrl & ~1) | ((((val >> 2) ^ val) & (val & 0x20)) >> 5); - oldbpp = svga->bpp; - switch (ramdac->type) { - case 0: /* Sierra Mark 2 (11483)*/ - case 2: /* Sierra Mark 2 (11484)*/ - case 3: /* Sierra Mark 1 (11486)*/ - if (val & 0xa0) { - svga->bpp = 15; - } else if (val == 0x00) - svga->bpp = 8; - break; - case 1: /* Sierra Mark 3 (11487)*/ - if (val & 0xa0) { - if (val & 0x40) - svga->bpp = 16; - else - svga->bpp = 15; - } else if (val == 0x00) - svga->bpp = 8; - break; - } - if (oldbpp != svga->bpp) - svga_recalctimings(svga); - return; - default: - svga_out(addr, val, svga); - break; - } - break; + case 2: + case 6: + switch (ramdac->state) { + case 4: + ramdac->state = 0; + if (val == 0xff) + break; + ramdac->ctrl = val; + ramdac->ctrl = (ramdac->ctrl & ~1) | ((((val >> 2) ^ val) & (val & 0x20)) >> 5); + oldbpp = svga->bpp; + switch (ramdac->type) { + case 0: /* Sierra Mark 2 (11483)*/ + case 2: /* Sierra Mark 2 (11484)*/ + case 3: /* Sierra Mark 1 (11486)*/ + if (val & 0xa0) { + svga->bpp = 15; + } else if (val == 0x00) + svga->bpp = 8; + break; + case 1: /* Sierra Mark 3 (11487)*/ + if (val & 0xa0) { + if (val & 0x40) + svga->bpp = 16; + else + svga->bpp = 15; + } else if (val == 0x00) + svga->bpp = 8; + break; + } + if (oldbpp != svga->bpp) + svga_recalctimings(svga); + return; + default: + svga_out(addr, val, svga); + break; + } + break; - default: - ramdac->state = 0; - svga_out(addr, val, svga); - break; + default: + ramdac->state = 0; + svga_out(addr, val, svga); + break; } } - uint8_t sc1148x_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga) { sc1148x_ramdac_t *ramdac = (sc1148x_ramdac_t *) p; - uint8_t ret = 0xff, rs = (addr & 0x03) | ((!!rs2) << 2); + uint8_t ret = 0xff, rs = (addr & 0x03) | ((!!rs2) << 2); switch (rs) { - case 2: case 6: - switch (ramdac->state) { - case 1: - case 2: case 3: - ret = 0x00; - ramdac->state++; - break; - case 4: - ret = ramdac->ctrl; - ret = (ret & ~0x18) | (svga->dac_mask & 0x18); - break; - default: - ret = svga_in(addr, svga); - ramdac->state++; - break; - } - break; + case 2: + case 6: + switch (ramdac->state) { + case 1: + case 2: + case 3: + ret = 0x00; + ramdac->state++; + break; + case 4: + ret = ramdac->ctrl; + ret = (ret & ~0x18) | (svga->dac_mask & 0x18); + break; + default: + ret = svga_in(addr, svga); + ramdac->state++; + break; + } + break; - default: - ret = svga_in(addr, svga); - ramdac->state = 0; - break; + default: + ret = svga_in(addr, svga); + ramdac->state = 0; + break; } return ret; } - static void * sc1148x_ramdac_init(const device_t *info) { @@ -137,68 +136,67 @@ sc1148x_ramdac_init(const device_t *info) return ramdac; } - static void sc1148x_ramdac_close(void *priv) { sc1148x_ramdac_t *ramdac = (sc1148x_ramdac_t *) priv; if (ramdac) - free(ramdac); + free(ramdac); } const device_t sc11483_ramdac_device = { - .name = "Sierra SC11483 RAMDAC", + .name = "Sierra SC11483 RAMDAC", .internal_name = "sc11483_ramdac", - .flags = 0, - .local = 0, - .init = sc1148x_ramdac_init, - .close = sc1148x_ramdac_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = sc1148x_ramdac_init, + .close = sc1148x_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t sc11487_ramdac_device = { - .name = "Sierra SC11487 RAMDAC", + .name = "Sierra SC11487 RAMDAC", .internal_name = "sc11487_ramdac", - .flags = 0, - .local = 1, - .init = sc1148x_ramdac_init, - .close = sc1148x_ramdac_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = sc1148x_ramdac_init, + .close = sc1148x_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t sc11484_nors2_ramdac_device = { - .name = "Sierra SC11484 RAMDAC (no RS2 signal)", + .name = "Sierra SC11484 RAMDAC (no RS2 signal)", .internal_name = "sc11484_nors2_ramdac", - .flags = 0, - .local = 2, - .init = sc1148x_ramdac_init, - .close = sc1148x_ramdac_close, - .reset = NULL, + .flags = 0, + .local = 2, + .init = sc1148x_ramdac_init, + .close = sc1148x_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t sc11486_ramdac_device = { - .name = "Sierra SC11486 RAMDAC", + .name = "Sierra SC11486 RAMDAC", .internal_name = "sc11486_ramdac", - .flags = 0, - .local = 3, - .init = sc1148x_ramdac_init, - .close = sc1148x_ramdac_close, - .reset = NULL, + .flags = 0, + .local = 3, + .init = sc1148x_ramdac_init, + .close = sc1148x_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_sc1502x_ramdac.c b/src/video/vid_sc1502x_ramdac.c index 10b4594e4..202091449 100644 --- a/src/video/vid_sc1502x_ramdac.c +++ b/src/video/vid_sc1502x_ramdac.c @@ -30,110 +30,106 @@ #include <86box/video.h> #include <86box/vid_svga.h> - typedef struct { - int state; + int state; uint8_t ctrl; } sc1502x_ramdac_t; - void sc1502x_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga) { sc1502x_ramdac_t *ramdac = (sc1502x_ramdac_t *) p; - int oldbpp = 0; + int oldbpp = 0; switch (addr) { - case 0x3C6: - if (ramdac->state == 4) { - ramdac->state = 0; - if (val == 0xFF) - break; - ramdac->ctrl = val; - oldbpp = svga->bpp; - switch ((val & 1) | ((val & 0xc0) >> 5)) { - case 0: - svga->bpp = 8; - break; - case 2: - case 3: - switch (val & 0x20) { - case 0x00: - svga->bpp = 32; - break; - case 0x20: - svga->bpp = 24; - break; - } - break; - case 4: - case 5: - svga->bpp = 15; - break; - case 6: - svga->bpp = 16; - break; - case 7: - if (val & 4) { - switch (val & 0x20) { - case 0x00: - svga->bpp = 32; - break; - case 0x20: - svga->bpp = 24; - break; - } - break; - } else { - svga->bpp = 16; - break; - } - break; - } - if (oldbpp != svga->bpp) - svga_recalctimings(svga); - return; - } - ramdac->state = 0; - break; - case 0x3C7: - case 0x3C8: - case 0x3C9: - ramdac->state = 0; - break; + case 0x3C6: + if (ramdac->state == 4) { + ramdac->state = 0; + if (val == 0xFF) + break; + ramdac->ctrl = val; + oldbpp = svga->bpp; + switch ((val & 1) | ((val & 0xc0) >> 5)) { + case 0: + svga->bpp = 8; + break; + case 2: + case 3: + switch (val & 0x20) { + case 0x00: + svga->bpp = 32; + break; + case 0x20: + svga->bpp = 24; + break; + } + break; + case 4: + case 5: + svga->bpp = 15; + break; + case 6: + svga->bpp = 16; + break; + case 7: + if (val & 4) { + switch (val & 0x20) { + case 0x00: + svga->bpp = 32; + break; + case 0x20: + svga->bpp = 24; + break; + } + break; + } else { + svga->bpp = 16; + break; + } + break; + } + if (oldbpp != svga->bpp) + svga_recalctimings(svga); + return; + } + ramdac->state = 0; + break; + case 0x3C7: + case 0x3C8: + case 0x3C9: + ramdac->state = 0; + break; } svga_out(addr, val, svga); } - uint8_t sc1502x_ramdac_in(uint16_t addr, void *p, svga_t *svga) { sc1502x_ramdac_t *ramdac = (sc1502x_ramdac_t *) p; - uint8_t temp = svga_in(addr, svga); + uint8_t temp = svga_in(addr, svga); switch (addr) { - case 0x3C6: - if (ramdac->state == 4) { - ramdac->state = 0; - temp = ramdac->ctrl; - break; - } - ramdac->state++; - break; - case 0x3C7: - case 0x3C8: - case 0x3C9: - ramdac->state = 0; - break; + case 0x3C6: + if (ramdac->state == 4) { + ramdac->state = 0; + temp = ramdac->ctrl; + break; + } + ramdac->state++; + break; + case 0x3C7: + case 0x3C8: + case 0x3C9: + ramdac->state = 0; + break; } return temp; } - static void * sc1502x_ramdac_init(const device_t *info) { @@ -143,26 +139,25 @@ sc1502x_ramdac_init(const device_t *info) return ramdac; } - static void sc1502x_ramdac_close(void *priv) { sc1502x_ramdac_t *ramdac = (sc1502x_ramdac_t *) priv; if (ramdac) - free(ramdac); + free(ramdac); } const device_t sc1502x_ramdac_device = { - .name = "Sierra SC1502x RAMDAC", + .name = "Sierra SC1502x RAMDAC", .internal_name = "sc1502x_ramdac", - .flags = 0, - .local = 0, - .init = sc1502x_ramdac_init, - .close = sc1502x_ramdac_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = sc1502x_ramdac_init, + .close = sc1502x_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_sdac_ramdac.c b/src/video/vid_sdac_ramdac.c index f127572ac..58d6b164c 100644 --- a/src/video/vid_sdac_ramdac.c +++ b/src/video/vid_sdac_ramdac.c @@ -28,9 +28,7 @@ #include <86box/video.h> #include <86box/vid_svga.h> - -enum -{ +enum { ICS_5300 = 0, ICS_5301, ICS_5340, @@ -38,247 +36,238 @@ enum ICS_5342 }; +#define ICS_S3_MASK 7 +#define ICS_S3 8 -#define ICS_S3_MASK 7 -#define ICS_S3 8 +#define S3_86C708 (ICS_5300 | ICS_S3) +#define S3_86C716 (ICS_5342 | ICS_S3) -#define S3_86C708 (ICS_5300 | ICS_S3) -#define S3_86C716 (ICS_5342 | ICS_S3) - - -typedef struct sdac_ramdac_t -{ +typedef struct sdac_ramdac_t { uint16_t regs[256]; - int magic_count, - windex, rindex, - reg_ff, rs2; + int magic_count, + windex, rindex, + reg_ff, rs2; uint8_t type, command; } sdac_ramdac_t; - static void sdac_control_write(sdac_ramdac_t *ramdac, svga_t *svga, uint8_t val) { ramdac->command = val; switch (ramdac->type & ICS_S3_MASK) { - case ICS_5300: - case ICS_5301: - switch (val >> 5) { - case 0x00: - default: - svga->bpp = 8; - break; - case 0x01: - case 0x04: - case 0x05: - svga->bpp = 15; - break; - case 0x03: - case 0x06: - svga->bpp = 16; - break; - case 0x02: - case 0x07: - svga->bpp = 24; - break; - } - break; - case ICS_5340: - case ICS_5341: - case ICS_5342: - switch (val >> 4) { - case 0x00: - case 0x01: /* This is actually 8bpp with two pixels read at a time. */ - default: - svga->bpp = 8; - break; - case 0x02: - case 0x03: - case 0x08: - case 0x0a: - svga->bpp = 15; - break; - case 0x05: - case 0x06: - case 0x0c: - svga->bpp = 16; - break; - case 0x04: - case 0x09: - case 0x0e: - svga->bpp = 24; - break; - case 0x07: - svga->bpp = 32; - break; - } - break; + case ICS_5300: + case ICS_5301: + switch (val >> 5) { + case 0x00: + default: + svga->bpp = 8; + break; + case 0x01: + case 0x04: + case 0x05: + svga->bpp = 15; + break; + case 0x03: + case 0x06: + svga->bpp = 16; + break; + case 0x02: + case 0x07: + svga->bpp = 24; + break; + } + break; + case ICS_5340: + case ICS_5341: + case ICS_5342: + switch (val >> 4) { + case 0x00: + case 0x01: /* This is actually 8bpp with two pixels read at a time. */ + default: + svga->bpp = 8; + break; + case 0x02: + case 0x03: + case 0x08: + case 0x0a: + svga->bpp = 15; + break; + case 0x05: + case 0x06: + case 0x0c: + svga->bpp = 16; + break; + case 0x04: + case 0x09: + case 0x0e: + svga->bpp = 24; + break; + case 0x07: + svga->bpp = 32; + break; + } + break; } svga_recalctimings(svga); } - static void sdac_reg_write(sdac_ramdac_t *ramdac, int reg, uint8_t val) { if ((reg >= 2 && reg <= 7) || (reg == 0xa) || (reg == 0xe)) { - if (!ramdac->reg_ff) - ramdac->regs[reg] = (ramdac->regs[reg] & 0xff00) | val; - else - ramdac->regs[reg] = (ramdac->regs[reg] & 0x00ff) | (val << 8); + if (!ramdac->reg_ff) + ramdac->regs[reg] = (ramdac->regs[reg] & 0xff00) | val; + else + ramdac->regs[reg] = (ramdac->regs[reg] & 0x00ff) | (val << 8); } ramdac->reg_ff = !ramdac->reg_ff; if (!ramdac->reg_ff) - ramdac->windex++; + ramdac->windex++; } - static uint8_t sdac_reg_read(sdac_ramdac_t *ramdac, int reg) { uint8_t temp; if (!ramdac->reg_ff) - temp = ramdac->regs[reg] & 0xff; + temp = ramdac->regs[reg] & 0xff; else - temp = ramdac->regs[reg] >> 8; + temp = ramdac->regs[reg] >> 8; ramdac->reg_ff = !ramdac->reg_ff; if (!ramdac->reg_ff) - ramdac->rindex++; + ramdac->rindex++; return temp; } - void sdac_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *p, svga_t *svga) { sdac_ramdac_t *ramdac = (sdac_ramdac_t *) p; - uint8_t rs = (addr & 0x03); + uint8_t rs = (addr & 0x03); rs |= ((!!rs2) << 2); if (rs != 0x02) - ramdac->magic_count = 0; + ramdac->magic_count = 0; switch (rs) { - case 0x02: - switch (ramdac->magic_count) { - case 4: - sdac_control_write(ramdac, svga, val); - ramdac->magic_count = 0; - break; - default: - svga_out(addr, val, svga); - break; - } - break; - case 0x00: - case 0x01: - case 0x03: - svga_out(addr, val, svga); - break; - case 0x04: - ramdac->windex = val; - ramdac->reg_ff = 0; - break; - case 0x05: - sdac_reg_write(ramdac, ramdac->windex & 0xff, val); - break; - case 0x06: - sdac_control_write(ramdac, svga, val); - break; - case 0x07: - ramdac->rindex = val; - ramdac->reg_ff = 0; - break; + case 0x02: + switch (ramdac->magic_count) { + case 4: + sdac_control_write(ramdac, svga, val); + ramdac->magic_count = 0; + break; + default: + svga_out(addr, val, svga); + break; + } + break; + case 0x00: + case 0x01: + case 0x03: + svga_out(addr, val, svga); + break; + case 0x04: + ramdac->windex = val; + ramdac->reg_ff = 0; + break; + case 0x05: + sdac_reg_write(ramdac, ramdac->windex & 0xff, val); + break; + case 0x06: + sdac_control_write(ramdac, svga, val); + break; + case 0x07: + ramdac->rindex = val; + ramdac->reg_ff = 0; + break; } } - uint8_t sdac_ramdac_in(uint16_t addr, int rs2, void *p, svga_t *svga) { sdac_ramdac_t *ramdac = (sdac_ramdac_t *) p; - uint8_t temp = 0xff; - uint8_t rs = (addr & 0x03); + uint8_t temp = 0xff; + uint8_t rs = (addr & 0x03); rs |= ((!!rs2) << 2); if (rs != 0x02) - ramdac->magic_count = 0; + ramdac->magic_count = 0; switch (rs) { - case 0x02: - switch (ramdac->magic_count) { - case 1: case 2: - temp = 0x00; - ramdac->magic_count++; - break; - case 3: - temp = (ramdac->type & ICS_S3) ? 0x70 : 0x00; - ramdac->magic_count++; - break; - case 4: - temp = ramdac->command; - ramdac->magic_count = 0; - break; - default: - temp = svga_in(addr, svga); - ramdac->magic_count++; - break; - } - break; - case 0x00: - case 0x01: - case 0x03: - temp = svga_in(addr, svga); - break; - case 0x04: - temp = ramdac->windex; - break; - case 0x05: - temp = sdac_reg_read(ramdac, ramdac->rindex & 0xff); - break; - case 0x06: - temp = ramdac->command; - break; - case 0x07: - temp = ramdac->rindex; - break; + case 0x02: + switch (ramdac->magic_count) { + case 1: + case 2: + temp = 0x00; + ramdac->magic_count++; + break; + case 3: + temp = (ramdac->type & ICS_S3) ? 0x70 : 0x00; + ramdac->magic_count++; + break; + case 4: + temp = ramdac->command; + ramdac->magic_count = 0; + break; + default: + temp = svga_in(addr, svga); + ramdac->magic_count++; + break; + } + break; + case 0x00: + case 0x01: + case 0x03: + temp = svga_in(addr, svga); + break; + case 0x04: + temp = ramdac->windex; + break; + case 0x05: + temp = sdac_reg_read(ramdac, ramdac->rindex & 0xff); + break; + case 0x06: + temp = ramdac->command; + break; + case 0x07: + temp = ramdac->rindex; + break; } return temp; } - float sdac_getclock(int clock, void *p) { - sdac_ramdac_t *ramdac = (sdac_ramdac_t *)p; - float t; - int m, n1, n2; + sdac_ramdac_t *ramdac = (sdac_ramdac_t *) p; + float t; + int m, n1, n2; if (ramdac->regs[0xe] & (1 << 5)) - clock = ramdac->regs[0xe] & 7; + clock = ramdac->regs[0xe] & 7; clock &= 7; if (clock == 0) - return 25175000.0; + return 25175000.0; if (clock == 1) - return 28322000.0; + return 28322000.0; - m = (ramdac->regs[clock] & 0x7f) + 2; - n1 = ((ramdac->regs[clock] >> 8) & 0x1f) + 2; + m = (ramdac->regs[clock] & 0x7f) + 2; + n1 = ((ramdac->regs[clock] >> 8) & 0x1f) + 2; n2 = ((ramdac->regs[clock] >> 13) & 0x07); n2 = (1 << n2); - t = (14318184.0f * (float)m) / (float)(n1 * n2); + t = (14318184.0f * (float) m) / (float) (n1 * n2); return t; } - void * sdac_ramdac_init(const device_t *info) { @@ -293,68 +282,67 @@ sdac_ramdac_init(const device_t *info) return ramdac; } - static void sdac_ramdac_close(void *priv) { sdac_ramdac_t *ramdac = (sdac_ramdac_t *) priv; if (ramdac) - free(ramdac); + free(ramdac); } const device_t gendac_ramdac_device = { - .name = "S3 GENDAC 86c708 RAMDAC", + .name = "S3 GENDAC 86c708 RAMDAC", .internal_name = "gendac_ramdac", - .flags = 0, - .local = S3_86C708, - .init = sdac_ramdac_init, - .close = sdac_ramdac_close, - .reset = NULL, + .flags = 0, + .local = S3_86C708, + .init = sdac_ramdac_init, + .close = sdac_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t tseng_ics5301_ramdac_device = { - .name = "Tseng ICS5301 GENDAC RAMDAC", + .name = "Tseng ICS5301 GENDAC RAMDAC", .internal_name = "tseng_ics5301_ramdac", - .flags = 0, - .local = ICS_5301, - .init = sdac_ramdac_init, - .close = sdac_ramdac_close, - .reset = NULL, + .flags = 0, + .local = ICS_5301, + .init = sdac_ramdac_init, + .close = sdac_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t tseng_ics5341_ramdac_device = { - .name = "Tseng ICS5341 GENDAC RAMDAC", + .name = "Tseng ICS5341 GENDAC RAMDAC", .internal_name = "tseng_ics5341_ramdac", - .flags = 0, - .local = ICS_5341, - .init = sdac_ramdac_init, - .close = sdac_ramdac_close, - .reset = NULL, + .flags = 0, + .local = ICS_5341, + .init = sdac_ramdac_init, + .close = sdac_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t sdac_ramdac_device = { - .name = "S3 SDAC 86c716 RAMDAC", + .name = "S3 SDAC 86c716 RAMDAC", .internal_name = "sdac_ramdac", - .flags = 0, - .local = S3_86C716, - .init = sdac_ramdac_init, - .close = sdac_ramdac_close, - .reset = NULL, + .flags = 0, + .local = S3_86C716, + .init = sdac_ramdac_init, + .close = sdac_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_sigma.c b/src/video/vid_sigma.c index 73a9363e8..bf6524439 100644 --- a/src/video/vid_sigma.c +++ b/src/video/vid_sigma.c @@ -30,9 +30,8 @@ #include <86box/device.h> #include <86box/video.h> - -#define ROM_SIGMA_FONT "roms/video/sigma/sigma400_font.rom" -#define ROM_SIGMA_BIOS "roms/video/sigma/sigma400_bios.rom" +#define ROM_SIGMA_FONT "roms/video/sigma/sigma400_font.rom" +#define ROM_SIGMA_BIOS "roms/video/sigma/sigma400_bios.rom" /* The Sigma Designs Color 400 is a video card from 1985, presumably intended * as an EGA competitor. @@ -74,20 +73,20 @@ * Graphics 640x400: 0x7F * * I have assumed this is a bitmap with the following meaning: */ -#define MODE_80COLS 0x01 /* For text modes, 80 columns across */ -#define MODE_GRAPHICS 0x02 /* Graphics mode */ -#define MODE_NOBLINK 0x04 /* Disable blink? */ -#define MODE_ENABLE 0x08 /* Enable display */ -#define MODE_HRGFX 0x10 /* For graphics modes, 640 pixels across */ -#define MODE_640x400 0x40 /* 400-line graphics mode */ -#define MODE_FONT16 0x80 /* Use 16-pixel high font */ +#define MODE_80COLS 0x01 /* For text modes, 80 columns across */ +#define MODE_GRAPHICS 0x02 /* Graphics mode */ +#define MODE_NOBLINK 0x04 /* Disable blink? */ +#define MODE_ENABLE 0x08 /* Enable display */ +#define MODE_HRGFX 0x10 /* For graphics modes, 640 pixels across */ +#define MODE_640x400 0x40 /* 400-line graphics mode */ +#define MODE_FONT16 0x80 /* Use 16-pixel high font */ /* * 0x2D9: Control register, with the following bits: */ -#define CTL_CURSOR 0x80 /* Low bit of cursor position */ -#define CTL_NMI 0x20 /* Writes to 0x3D0-0x3DF trigger NMI */ -#define CTL_CLEAR_LPEN 0x08 /* Strobe 0 to clear lightpen latch */ -#define CTL_SET_LPEN 0x04 /* Strobe 0 to set lightpen latch */ -#define CTL_PALETTE 0x01 /* 0x2DE writes to palette (1) or plane (0) */ +#define CTL_CURSOR 0x80 /* Low bit of cursor position */ +#define CTL_NMI 0x20 /* Writes to 0x3D0-0x3DF trigger NMI */ +#define CTL_CLEAR_LPEN 0x08 /* Strobe 0 to clear lightpen latch */ +#define CTL_SET_LPEN 0x04 /* Strobe 0 to set lightpen latch */ +#define CTL_PALETTE 0x01 /* 0x2DE writes to palette (1) or plane (0) */ /* * The card BIOS seems to support two variants of the hardware: One where * bits 2 and 3 are normally 1 and are set to 0 to set/clear the latch, and @@ -96,12 +95,12 @@ * * 0x2DA: Status register. */ -#define STATUS_CURSOR 0x80 /* Last value written to bit 7 of 0x2D9 */ -#define STATUS_NMI 0x20 /* Last value written to bit 5 of 0x2D9 */ -#define STATUS_RETR_V 0x10 /* Vertical retrace */ -#define STATUS_LPEN_T 0x04 /* Lightpen switch is off */ -#define STATUS_LPEN_A 0x02 /* Edge from lightpen has set trigger */ -#define STATUS_RETR_H 0x01 /* Horizontal retrace */ +#define STATUS_CURSOR 0x80 /* Last value written to bit 7 of 0x2D9 */ +#define STATUS_NMI 0x20 /* Last value written to bit 5 of 0x2D9 */ +#define STATUS_RETR_V 0x10 /* Vertical retrace */ +#define STATUS_LPEN_T 0x04 /* Lightpen switch is off */ +#define STATUS_LPEN_A 0x02 /* Edge from lightpen has set trigger */ +#define STATUS_RETR_H 0x01 /* Horizontal retrace */ /* * 0x2DB: On read: Byte written to the card that triggered NMI * 0x2DB: On write: Resets the 'card raised NMI' flag. @@ -126,36 +125,34 @@ * plane 0-3 */ - -typedef struct sigma_t -{ +typedef struct sigma_t { mem_mapping_t mapping, bios_ram; - rom_t bios_rom; + rom_t bios_rom; - uint8_t crtc[32]; /* CRTC: Real values */ + uint8_t crtc[32]; /* CRTC: Real values */ - uint8_t lastport; /* Last I/O port written */ - uint8_t lastwrite; /* Value written to that port */ - uint8_t sigma_ctl; /* Controls register: - * Bit 7 is low bit of cursor position - * Bit 5 set if writes to CGA ports trigger NMI - * Bit 3 clears lightpen latch - * Bit 2 sets lightpen latch - * Bit 1 controls meaning of port 2DE - */ - uint8_t enable_nmi; /* Enable the NMI mechanism for CGA emulation?*/ - uint8_t rom_paged; /* Is ROM paged in at 0xC1800? */ + uint8_t lastport; /* Last I/O port written */ + uint8_t lastwrite; /* Value written to that port */ + uint8_t sigma_ctl; /* Controls register: + * Bit 7 is low bit of cursor position + * Bit 5 set if writes to CGA ports trigger NMI + * Bit 3 clears lightpen latch + * Bit 2 sets lightpen latch + * Bit 1 controls meaning of port 2DE + */ + uint8_t enable_nmi; /* Enable the NMI mechanism for CGA emulation?*/ + uint8_t rom_paged; /* Is ROM paged in at 0xC1800? */ - uint8_t crtc_value; /* Value to return from a CRTC register read */ + uint8_t crtc_value; /* Value to return from a CRTC register read */ - uint8_t sigmastat, /* Status register [0x2DA] */ - fake_stat; /* see sigma_in() for comment */ + uint8_t sigmastat, /* Status register [0x2DA] */ + fake_stat; /* see sigma_in() for comment */ - uint8_t sigmamode; /* Mode control register [0x2D8] */ + uint8_t sigmamode; /* Mode control register [0x2D8] */ uint16_t ma, maback; - int crtcreg; /* CRTC: Real selected register */ + int crtcreg; /* CRTC: Real selected register */ int linepos, displine; int sc, vc; @@ -173,7 +170,7 @@ typedef struct sigma_t pc_timer_t timer; uint8_t *vram; - uint8_t bram[2048]; + uint8_t bram[2048]; uint8_t palette[16]; @@ -185,210 +182,202 @@ typedef struct sigma_t #define COMPOSITE_OLD 0 #define COMPOSITE_NEW 1 -static uint8_t crtcmask[32] = -{ - 0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f, 0xf3, 0x1f, 0x7f, 0x1f, 0x3f, 0xff, 0x3f, 0xff, - 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +static uint8_t crtcmask[32] = { + 0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f, 0xf3, 0x1f, 0x7f, 0x1f, 0x3f, 0xff, 0x3f, 0xff, + 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; -static video_timings_t timing_sigma = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; +static video_timings_t timing_sigma = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; - -static void sigma_recalctimings(sigma_t *cga); +static void sigma_recalctimings(sigma_t *cga); static void sigma_out(uint16_t addr, uint8_t val, void *p) { - sigma_t *sigma = (sigma_t *)p; - uint8_t old; + sigma_t *sigma = (sigma_t *) p; + uint8_t old; if (addr >= 0x3D0 && addr < 0x3E0) { - sigma->lastport = addr & 0x0F; - sigma->lastwrite = val; - /* If set to NMI on video I/O... */ - if (sigma->enable_nmi && (sigma->sigma_ctl & CTL_NMI)) { - sigma->lastport |= 0x80; /* Card raised NMI */ - nmi_raise(); - } - /* For CRTC emulation, the card BIOS sets the value to be - * read from port 0x3D1 like this */ - if (addr == 0x3D1) - sigma->crtc_value = val; - } else switch (addr) { - case 0x2D0: - case 0x2D2: - case 0x2D4: - case 0x2D6: - sigma->crtcreg = val & 31; - return; - case 0x2D1: - case 0x2D3: - case 0x2D5: - case 0x2D7: - old = sigma->crtc[sigma->crtcreg]; - sigma->crtc[sigma->crtcreg] = val & crtcmask[sigma->crtcreg]; - if (old != val) { - if (sigma->crtcreg < 0xe || sigma->crtcreg > 0x10) { - sigma->fullchange = changeframecount; - sigma_recalctimings(sigma); - } - } - return; + sigma->lastport = addr & 0x0F; + sigma->lastwrite = val; + /* If set to NMI on video I/O... */ + if (sigma->enable_nmi && (sigma->sigma_ctl & CTL_NMI)) { + sigma->lastport |= 0x80; /* Card raised NMI */ + nmi_raise(); + } + /* For CRTC emulation, the card BIOS sets the value to be + * read from port 0x3D1 like this */ + if (addr == 0x3D1) + sigma->crtc_value = val; + } else + switch (addr) { + case 0x2D0: + case 0x2D2: + case 0x2D4: + case 0x2D6: + sigma->crtcreg = val & 31; + return; + case 0x2D1: + case 0x2D3: + case 0x2D5: + case 0x2D7: + old = sigma->crtc[sigma->crtcreg]; + sigma->crtc[sigma->crtcreg] = val & crtcmask[sigma->crtcreg]; + if (old != val) { + if (sigma->crtcreg < 0xe || sigma->crtcreg > 0x10) { + sigma->fullchange = changeframecount; + sigma_recalctimings(sigma); + } + } + return; - case 0x2D8: - sigma->sigmamode = val; - return; - case 0x2D9: - sigma->sigma_ctl = val; - return; - case 0x2DB: - sigma->lastport &= 0x7F; - return; - case 0x2DC: /* Reset NMI */ - nmi = 0; - sigma->lastport &= 0x7F; - return; - case 0x2DD: /* Page in RAM at 0xC1800 */ - if (sigma->rom_paged != 0) - mmu_invalidate(0xC0000); - sigma->rom_paged = 0x00; - return; + case 0x2D8: + sigma->sigmamode = val; + return; + case 0x2D9: + sigma->sigma_ctl = val; + return; + case 0x2DB: + sigma->lastport &= 0x7F; + return; + case 0x2DC: /* Reset NMI */ + nmi = 0; + sigma->lastport &= 0x7F; + return; + case 0x2DD: /* Page in RAM at 0xC1800 */ + if (sigma->rom_paged != 0) + mmu_invalidate(0xC0000); + sigma->rom_paged = 0x00; + return; - case 0x2DE: - if (sigma->sigma_ctl & CTL_PALETTE) - sigma->palette[val >> 4] = (val & 0x0F) ^ 0x0F; - else - sigma->plane = val & 3; - return; - } + case 0x2DE: + if (sigma->sigma_ctl & CTL_PALETTE) + sigma->palette[val >> 4] = (val & 0x0F) ^ 0x0F; + else + sigma->plane = val & 3; + return; + } } - static uint8_t sigma_in(uint16_t addr, void *p) { - uint8_t result = 0xFF; - sigma_t *sigma = (sigma_t *)p; + uint8_t result = 0xFF; + sigma_t *sigma = (sigma_t *) p; switch (addr) { - case 0x2D0: - case 0x2D2: - case 0x2D4: - case 0x2D6: - result = sigma->crtcreg; - break; - case 0x2D1: - case 0x2D3: - case 0x2D5: - case 0x2D7: - result = sigma->crtc[sigma->crtcreg & 0x1F]; - break; - case 0x2DA: - result = (sigma->sigma_ctl & 0xE0) | - (sigma->sigmastat & 0x1F); - break; - case 0x2DB: - result = sigma->lastwrite; /* Value that triggered NMI */ - break; - case 0x2DC: - result = sigma->lastport; /* Port that triggered NMI */ - break; - case 0x2DD: /* Page in ROM at 0xC1800 */ - result = (sigma->rom_paged ? 0x80 : 0); - if (sigma->rom_paged != 0x80) - mmu_invalidate(0xC0000); - sigma->rom_paged = 0x80; - break; - case 0x3D1: - case 0x3D3: - case 0x3D5: - case 0x3D7: - result = sigma->crtc_value; - break; - /* For CGA compatibility we have to return something palatable on this port. - On a real card this functionality can be turned on or off with SW1/6 */ - case 0x3DA: - if (sigma->sigmamode & MODE_ENABLE) { - result = sigma->sigmastat & 0x07; - if (sigma->sigmastat & STATUS_RETR_V) - result |= 0x08; - } else { - /* - * The card is not running yet, and someone - * (probably the system BIOS) is trying to - * read our status in CGA mode. - * - * One of the systems that do this, is the - * DTK XT (PIM-10TB-Z board) with ERSO 2.42 - * BIOS. If this test fails (i.e. it doesnt - * see valid HS and VS bits alternate) it - * will generate lots of annoying beeps.. - * - * So, the trick here is to just send it - * some alternating bits, making it think - * the CGA circuitry is operational. - */ - sigma->fake_stat ^= (0x08 | 0x01); - result = sigma->fake_stat; - } - break; + case 0x2D0: + case 0x2D2: + case 0x2D4: + case 0x2D6: + result = sigma->crtcreg; + break; + case 0x2D1: + case 0x2D3: + case 0x2D5: + case 0x2D7: + result = sigma->crtc[sigma->crtcreg & 0x1F]; + break; + case 0x2DA: + result = (sigma->sigma_ctl & 0xE0) | (sigma->sigmastat & 0x1F); + break; + case 0x2DB: + result = sigma->lastwrite; /* Value that triggered NMI */ + break; + case 0x2DC: + result = sigma->lastport; /* Port that triggered NMI */ + break; + case 0x2DD: /* Page in ROM at 0xC1800 */ + result = (sigma->rom_paged ? 0x80 : 0); + if (sigma->rom_paged != 0x80) + mmu_invalidate(0xC0000); + sigma->rom_paged = 0x80; + break; + case 0x3D1: + case 0x3D3: + case 0x3D5: + case 0x3D7: + result = sigma->crtc_value; + break; + /* For CGA compatibility we have to return something palatable on this port. + On a real card this functionality can be turned on or off with SW1/6 */ + case 0x3DA: + if (sigma->sigmamode & MODE_ENABLE) { + result = sigma->sigmastat & 0x07; + if (sigma->sigmastat & STATUS_RETR_V) + result |= 0x08; + } else { + /* + * The card is not running yet, and someone + * (probably the system BIOS) is trying to + * read our status in CGA mode. + * + * One of the systems that do this, is the + * DTK XT (PIM-10TB-Z board) with ERSO 2.42 + * BIOS. If this test fails (i.e. it doesnt + * see valid HS and VS bits alternate) it + * will generate lots of annoying beeps.. + * + * So, the trick here is to just send it + * some alternating bits, making it think + * the CGA circuitry is operational. + */ + sigma->fake_stat ^= (0x08 | 0x01); + result = sigma->fake_stat; + } + break; } return result; } - static void sigma_write(uint32_t addr, uint8_t val, void *p) { - sigma_t *sigma = (sigma_t *)p; + sigma_t *sigma = (sigma_t *) p; sigma->vram[sigma->plane * 0x8000 + (addr & 0x7fff)] = val; cycles -= 4; } - static uint8_t sigma_read(uint32_t addr, void *p) { - sigma_t *sigma = (sigma_t *)p; + sigma_t *sigma = (sigma_t *) p; cycles -= 4; return sigma->vram[sigma->plane * 0x8000 + (addr & 0x7fff)]; } - static void sigma_bwrite(uint32_t addr, uint8_t val, void *p) { - sigma_t *sigma = (sigma_t *)p; + sigma_t *sigma = (sigma_t *) p; addr &= 0x3FFF; if ((addr < 0x1800) || sigma->rom_paged || (addr >= 0x2000)) - ; + ; else - sigma->bram[addr & 0x7FF] = val; + sigma->bram[addr & 0x7FF] = val; } - static uint8_t sigma_bread(uint32_t addr, void *p) { - sigma_t *sigma = (sigma_t *)p; - uint8_t result; + sigma_t *sigma = (sigma_t *) p; + uint8_t result; addr &= 0x3FFF; if (addr >= 0x2000) - return 0xFF; + return 0xFF; if (addr < 0x1800 || sigma->rom_paged) - result = sigma->bios_rom.rom[addr & 0x1FFF]; + result = sigma->bios_rom.rom[addr & 0x1FFF]; else - result = sigma->bram[addr & 0x7FF]; + result = sigma->bram[addr & 0x7FF]; return result; } - static void sigma_recalctimings(sigma_t *sigma) { @@ -396,154 +385,146 @@ sigma_recalctimings(sigma_t *sigma) double _dispontime, _dispofftime; if (sigma->sigmamode & MODE_80COLS) { - disptime = (sigma->crtc[0] + 1) << 1; - _dispontime = (sigma->crtc[1]) << 1; + disptime = (sigma->crtc[0] + 1) << 1; + _dispontime = (sigma->crtc[1]) << 1; } else { - disptime = (sigma->crtc[0] + 1) << 2; - _dispontime = sigma->crtc[1] << 2; + disptime = (sigma->crtc[0] + 1) << 2; + _dispontime = sigma->crtc[1] << 2; } _dispofftime = disptime - _dispontime; _dispontime *= CGACONST; _dispofftime *= CGACONST; - sigma->dispontime = (uint64_t)(_dispontime); - sigma->dispofftime = (uint64_t)(_dispofftime); + sigma->dispontime = (uint64_t) (_dispontime); + sigma->dispofftime = (uint64_t) (_dispofftime); } - /* Render a line in 80-column text mode */ -static void sigma_text80(sigma_t *sigma) +static void +sigma_text80(sigma_t *sigma) { - int x, c; - uint8_t chr, attr; + int x, c; + uint8_t chr, attr; uint16_t ca = (sigma->crtc[15] | (sigma->crtc[14] << 8)); uint16_t ma = ((sigma->ma & 0x3FFF) << 1); - int drawcursor; + int drawcursor; uint32_t cols[4]; uint8_t *vram = sigma->vram + (ma << 1); ca = ca << 1; if (sigma->sigma_ctl & CTL_CURSOR) - ++ca; + ++ca; ca &= 0x3fff; /* The Sigma 400 seems to use screen widths stated in words (40 for 80-column, 20 for 40-column) */ for (x = 0; x < (sigma->crtc[1] << 1); x++) { - chr = vram[x << 1]; - attr = vram[(x << 1) + 1]; - drawcursor = ((ma == ca) && sigma->con && sigma->cursoron); + chr = vram[x << 1]; + attr = vram[(x << 1) + 1]; + drawcursor = ((ma == ca) && sigma->con && sigma->cursoron); - if (!(sigma->sigmamode & MODE_NOBLINK)) { - cols[1] = (attr & 15) | 16; - cols[0] = ((attr >> 4) & 7) | 16; - if ((sigma->cgablink & 8) && (attr & 0x80) && !sigma->drawcursor) - cols[1] = cols[0]; - } else { /* No blink */ - cols[1] = (attr & 15) | 16; - cols[0] = (attr >> 4) | 16; - } + if (!(sigma->sigmamode & MODE_NOBLINK)) { + cols[1] = (attr & 15) | 16; + cols[0] = ((attr >> 4) & 7) | 16; + if ((sigma->cgablink & 8) && (attr & 0x80) && !sigma->drawcursor) + cols[1] = cols[0]; + } else { /* No blink */ + cols[1] = (attr & 15) | 16; + cols[0] = (attr >> 4) | 16; + } - if (drawcursor) { - for (c = 0; c < 8; c++) { - if (sigma->sigmamode & MODE_FONT16) - buffer32->line[sigma->displine][(x << 3) + c + 8] = cols[(fontdatm[chr][sigma->sc & 15] & (1 << (c ^ 7))) ? 1 : 0] ^ 0xf; - else - buffer32->line[sigma->displine][(x << 3) + c + 8] = cols[(fontdat[chr][sigma->sc & 7] & (1 << (c ^ 7))) ? 1 : 0] ^ 0xf; - } - } else { - for (c = 0; c < 8; c++) { - if (sigma->sigmamode & MODE_FONT16) - buffer32->line[sigma->displine][(x << 3) + c + 8] = cols[(fontdatm[chr][sigma->sc & 15] & (1 << (c ^ 7))) ? 1 : 0]; - else - buffer32->line[sigma->displine][(x << 3) + c + 8] = cols[(fontdat[chr][sigma->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; - } - } - ++ma; + if (drawcursor) { + for (c = 0; c < 8; c++) { + if (sigma->sigmamode & MODE_FONT16) + buffer32->line[sigma->displine][(x << 3) + c + 8] = cols[(fontdatm[chr][sigma->sc & 15] & (1 << (c ^ 7))) ? 1 : 0] ^ 0xf; + else + buffer32->line[sigma->displine][(x << 3) + c + 8] = cols[(fontdat[chr][sigma->sc & 7] & (1 << (c ^ 7))) ? 1 : 0] ^ 0xf; + } + } else { + for (c = 0; c < 8; c++) { + if (sigma->sigmamode & MODE_FONT16) + buffer32->line[sigma->displine][(x << 3) + c + 8] = cols[(fontdatm[chr][sigma->sc & 15] & (1 << (c ^ 7))) ? 1 : 0]; + else + buffer32->line[sigma->displine][(x << 3) + c + 8] = cols[(fontdat[chr][sigma->sc & 7] & (1 << (c ^ 7))) ? 1 : 0]; + } + } + ++ma; } sigma->ma += sigma->crtc[1]; } - /* Render a line in 40-column text mode */ static void sigma_text40(sigma_t *sigma) { - int x, c; - uint8_t chr, attr; + int x, c; + uint8_t chr, attr; uint16_t ca = (sigma->crtc[15] | (sigma->crtc[14] << 8)); uint16_t ma = ((sigma->ma & 0x3FFF) << 1); - int drawcursor; + int drawcursor; uint32_t cols[4]; uint8_t *vram = sigma->vram + ((ma << 1) & 0x3FFF); ca = ca << 1; if (sigma->sigma_ctl & CTL_CURSOR) - ++ca; + ++ca; ca &= 0x3fff; /* The Sigma 400 seems to use screen widths stated in words (40 for 80-column, 20 for 40-column) */ for (x = 0; x < (sigma->crtc[1] << 1); x++) { - chr = vram[x << 1]; - attr = vram[(x << 1) + 1]; - drawcursor = ((ma == ca) && sigma->con && sigma->cursoron); + chr = vram[x << 1]; + attr = vram[(x << 1) + 1]; + drawcursor = ((ma == ca) && sigma->con && sigma->cursoron); - if (!(sigma->sigmamode & MODE_NOBLINK)) { - cols[1] = (attr & 15) | 16; - cols[0] = ((attr >> 4) & 7) | 16; - if ((sigma->cgablink & 8) && (attr & 0x80) && !sigma->drawcursor) - cols[1] = cols[0]; - } else { /* No blink */ - cols[1] = (attr & 15) | 16; - cols[0] = (attr >> 4) | 16; - } + if (!(sigma->sigmamode & MODE_NOBLINK)) { + cols[1] = (attr & 15) | 16; + cols[0] = ((attr >> 4) & 7) | 16; + if ((sigma->cgablink & 8) && (attr & 0x80) && !sigma->drawcursor) + cols[1] = cols[0]; + } else { /* No blink */ + cols[1] = (attr & 15) | 16; + cols[0] = (attr >> 4) | 16; + } - if (drawcursor) { - for (c = 0; c < 8; c++) { - buffer32->line[sigma->displine][(x << 4) + 2*c + 8] = - buffer32->line[sigma->displine][(x << 4) + 2*c + 9] = cols[(fontdatm[chr][sigma->sc & 15] & (1 << (c ^ 7))) ? 1 : 0] ^ 0xf; - } - } else { - for (c = 0; c < 8; c++) { - buffer32->line[sigma->displine][(x << 4) + 2*c + 8] = - buffer32->line[sigma->displine][(x << 4) + 2*c + 9] = cols[(fontdatm[chr][sigma->sc & 15] & (1 << (c ^ 7))) ? 1 : 0]; - } - } - ma++; + if (drawcursor) { + for (c = 0; c < 8; c++) { + buffer32->line[sigma->displine][(x << 4) + 2 * c + 8] = buffer32->line[sigma->displine][(x << 4) + 2 * c + 9] = cols[(fontdatm[chr][sigma->sc & 15] & (1 << (c ^ 7))) ? 1 : 0] ^ 0xf; + } + } else { + for (c = 0; c < 8; c++) { + buffer32->line[sigma->displine][(x << 4) + 2 * c + 8] = buffer32->line[sigma->displine][(x << 4) + 2 * c + 9] = cols[(fontdatm[chr][sigma->sc & 15] & (1 << (c ^ 7))) ? 1 : 0]; + } + } + ma++; } sigma->ma += sigma->crtc[1]; } - /* Draw a line in the 640x400 graphics mode */ static void sigma_gfx400(sigma_t *sigma) { - int x; - unsigned char *vram = &sigma->vram[((sigma->ma << 1) & 0x1FFF) + - (sigma->sc & 3) * 0x2000]; - uint8_t plane[4]; - uint8_t mask, col, c; + int x; + unsigned char *vram = &sigma->vram[((sigma->ma << 1) & 0x1FFF) + (sigma->sc & 3) * 0x2000]; + uint8_t plane[4]; + uint8_t mask, col, c; for (x = 0; x < (sigma->crtc[1] << 1); x++) { - plane[0] = vram[x]; - plane[1] = vram[0x8000 + x]; - plane[2] = vram[0x10000 + x]; - plane[3] = vram[0x18000 + x]; + plane[0] = vram[x]; + plane[1] = vram[0x8000 + x]; + plane[2] = vram[0x10000 + x]; + plane[3] = vram[0x18000 + x]; - for (c = 0, mask = 0x80; c < 8; c++, mask >>= 1) { - col = ((plane[3] & mask) ? 8 : 0) | - ((plane[2] & mask) ? 4 : 0) | - ((plane[1] & mask) ? 2 : 0) | - ((plane[0] & mask) ? 1 : 0); - col |= 16; - buffer32->line[sigma->displine][(x << 3) + c + 8] = col; - } - if (x & 1) - ++sigma->ma; + for (c = 0, mask = 0x80; c < 8; c++, mask >>= 1) { + col = ((plane[3] & mask) ? 8 : 0) | ((plane[2] & mask) ? 4 : 0) | ((plane[1] & mask) ? 2 : 0) | ((plane[0] & mask) ? 1 : 0); + col |= 16; + buffer32->line[sigma->displine][(x << 3) + c + 8] = col; + } + if (x & 1) + ++sigma->ma; } } @@ -555,257 +536,245 @@ sigma_gfx400(sigma_t *sigma) static void sigma_gfx200(sigma_t *sigma) { - int x; - unsigned char *vram = &sigma->vram[((sigma->ma << 1) & 0x1FFF) + - (sigma->sc & 2) * 0x1000]; - uint8_t plane[4]; - uint8_t mask, col, c; + int x; + unsigned char *vram = &sigma->vram[((sigma->ma << 1) & 0x1FFF) + (sigma->sc & 2) * 0x1000]; + uint8_t plane[4]; + uint8_t mask, col, c; for (x = 0; x < (sigma->crtc[1] << 1); x++) { - plane[0] = vram[x]; - plane[1] = vram[0x8000 + x]; - plane[2] = vram[0x10000 + x]; - plane[3] = vram[0x18000 + x]; + plane[0] = vram[x]; + plane[1] = vram[0x8000 + x]; + plane[2] = vram[0x10000 + x]; + plane[3] = vram[0x18000 + x]; - for (c = 0, mask = 0x80; c < 8; c++, mask >>= 1) { - col = ((plane[3] & mask) ? 8 : 0) | - ((plane[2] & mask) ? 4 : 0) | - ((plane[1] & mask) ? 2 : 0) | - ((plane[0] & mask) ? 1 : 0); - col |= 16; - buffer32->line[sigma->displine][(x << 3) + c + 8] = col; - } + for (c = 0, mask = 0x80; c < 8; c++, mask >>= 1) { + col = ((plane[3] & mask) ? 8 : 0) | ((plane[2] & mask) ? 4 : 0) | ((plane[1] & mask) ? 2 : 0) | ((plane[0] & mask) ? 1 : 0); + col |= 16; + buffer32->line[sigma->displine][(x << 3) + c + 8] = col; + } - if (x & 1) - ++sigma->ma; + if (x & 1) + ++sigma->ma; } } - /* Draw a line in the 320x200 graphics mode */ static void sigma_gfx4col(sigma_t *sigma) { - int x; - unsigned char *vram = &sigma->vram[((sigma->ma << 1) & 0x1FFF) + - (sigma->sc & 2) * 0x1000]; - uint8_t plane[4]; - uint8_t mask, col, c; + int x; + unsigned char *vram = &sigma->vram[((sigma->ma << 1) & 0x1FFF) + (sigma->sc & 2) * 0x1000]; + uint8_t plane[4]; + uint8_t mask, col, c; for (x = 0; x < (sigma->crtc[1] << 1); x++) { - plane[0] = vram[x]; - plane[1] = vram[0x8000 + x]; - plane[2] = vram[0x10000 + x]; - plane[3] = vram[0x18000 + x]; + plane[0] = vram[x]; + plane[1] = vram[0x8000 + x]; + plane[2] = vram[0x10000 + x]; + plane[3] = vram[0x18000 + x]; - mask = 0x80; - for (c = 0; c < 4; c++) { - col = ((plane[3] & mask) ? 2 : 0) | - ((plane[2] & mask) ? 1 : 0); - mask = mask >> 1; - col |= ((plane[3] & mask) ? 8 : 0) | - ((plane[2] & mask) ? 4 : 0); - col |= 16; - mask = mask >> 1; + mask = 0x80; + for (c = 0; c < 4; c++) { + col = ((plane[3] & mask) ? 2 : 0) | ((plane[2] & mask) ? 1 : 0); + mask = mask >> 1; + col |= ((plane[3] & mask) ? 8 : 0) | ((plane[2] & mask) ? 4 : 0); + col |= 16; + mask = mask >> 1; - buffer32->line[sigma->displine][(x << 3) + (c << 1) + 8] = - buffer32->line[sigma->displine][(x << 3) + (c << 1) + 9] = col; - } + buffer32->line[sigma->displine][(x << 3) + (c << 1) + 8] = buffer32->line[sigma->displine][(x << 3) + (c << 1) + 9] = col; + } - if (x & 1) - ++sigma->ma; + if (x & 1) + ++sigma->ma; } } - static void sigma_poll(void *p) { - sigma_t *sigma = (sigma_t *)p; - int x, c; - int oldvc; + sigma_t *sigma = (sigma_t *) p; + int x, c; + int oldvc; uint32_t cols[4]; - int oldsc; + int oldsc; if (!sigma->linepos) { - timer_advance_u64(&sigma->timer, sigma->dispofftime); - sigma->sigmastat |= STATUS_RETR_H; - sigma->linepos = 1; - oldsc = sigma->sc; - if ((sigma->crtc[8] & 3) == 3) - sigma->sc = ((sigma->sc << 1) + sigma->oddeven) & 7; - if (sigma->cgadispon) { - if (sigma->displine < sigma->firstline) { - sigma->firstline = sigma->displine; - video_wait_for_buffer(); - } - sigma->lastline = sigma->displine; + timer_advance_u64(&sigma->timer, sigma->dispofftime); + sigma->sigmastat |= STATUS_RETR_H; + sigma->linepos = 1; + oldsc = sigma->sc; + if ((sigma->crtc[8] & 3) == 3) + sigma->sc = ((sigma->sc << 1) + sigma->oddeven) & 7; + if (sigma->cgadispon) { + if (sigma->displine < sigma->firstline) { + sigma->firstline = sigma->displine; + video_wait_for_buffer(); + } + sigma->lastline = sigma->displine; - cols[0] = 16; - /* Left overscan */ - for (c = 0; c < 8; c++) { - buffer32->line[sigma->displine][c] = cols[0]; - if (sigma->sigmamode & MODE_80COLS) - buffer32->line[sigma->displine][c + (sigma->crtc[1] << 4) + 8] = cols[0]; - else - buffer32->line[sigma->displine][c + (sigma->crtc[1] << 5) + 8] = cols[0]; - } - if (sigma->sigmamode & MODE_GRAPHICS) { - if (sigma->sigmamode & MODE_640x400) - sigma_gfx400(sigma); - else if (sigma->sigmamode & MODE_HRGFX) - sigma_gfx200(sigma); - else - sigma_gfx4col(sigma); - } else { /* Text modes */ - if (sigma->sigmamode & MODE_80COLS) - sigma_text80(sigma); - else - sigma_text40(sigma); - } - } else { - cols[0] = 16; - if (sigma->sigmamode & MODE_80COLS) - hline(buffer32, 0, sigma->displine, (sigma->crtc[1] << 4) + 16, cols[0]); - else - hline(buffer32, 0, sigma->displine, (sigma->crtc[1] << 5) + 16, cols[0]); - } + cols[0] = 16; + /* Left overscan */ + for (c = 0; c < 8; c++) { + buffer32->line[sigma->displine][c] = cols[0]; + if (sigma->sigmamode & MODE_80COLS) + buffer32->line[sigma->displine][c + (sigma->crtc[1] << 4) + 8] = cols[0]; + else + buffer32->line[sigma->displine][c + (sigma->crtc[1] << 5) + 8] = cols[0]; + } + if (sigma->sigmamode & MODE_GRAPHICS) { + if (sigma->sigmamode & MODE_640x400) + sigma_gfx400(sigma); + else if (sigma->sigmamode & MODE_HRGFX) + sigma_gfx200(sigma); + else + sigma_gfx4col(sigma); + } else { /* Text modes */ + if (sigma->sigmamode & MODE_80COLS) + sigma_text80(sigma); + else + sigma_text40(sigma); + } + } else { + cols[0] = 16; + if (sigma->sigmamode & MODE_80COLS) + hline(buffer32, 0, sigma->displine, (sigma->crtc[1] << 4) + 16, cols[0]); + else + hline(buffer32, 0, sigma->displine, (sigma->crtc[1] << 5) + 16, cols[0]); + } - if (sigma->sigmamode & MODE_80COLS) - x = (sigma->crtc[1] << 4) + 16; - else - x = (sigma->crtc[1] << 5) + 16; + if (sigma->sigmamode & MODE_80COLS) + x = (sigma->crtc[1] << 4) + 16; + else + x = (sigma->crtc[1] << 5) + 16; - for (c = 0; c < x; c++) - buffer32->line[sigma->displine][c] = sigma->palette[buffer32->line[sigma->displine][c] & 0xf] | 16; + for (c = 0; c < x; c++) + buffer32->line[sigma->displine][c] = sigma->palette[buffer32->line[sigma->displine][c] & 0xf] | 16; - sigma->sc = oldsc; - if (sigma->vc == sigma->crtc[7] && !sigma->sc) - sigma->sigmastat |= STATUS_RETR_V; - sigma->displine++; - if (sigma->displine >= 560) - sigma->displine = 0; + sigma->sc = oldsc; + if (sigma->vc == sigma->crtc[7] && !sigma->sc) + sigma->sigmastat |= STATUS_RETR_V; + sigma->displine++; + if (sigma->displine >= 560) + sigma->displine = 0; } else { - timer_advance_u64(&sigma->timer, sigma->dispontime); - sigma->linepos = 0; - if (sigma->vsynctime) { - sigma->vsynctime--; - if (!sigma->vsynctime) - sigma->sigmastat &= ~STATUS_RETR_V; - } - if (sigma->sc == (sigma->crtc[11] & 31) || - ((sigma->crtc[8] & 3) == 3 && sigma->sc == ((sigma->crtc[11] & 31) >> 1))) { - sigma->con = 0; - sigma->coff = 1; - } - if ((sigma->crtc[8] & 3) == 3 && sigma->sc == (sigma->crtc[9] >> 1)) - sigma->maback = sigma->ma; - if (sigma->vadj) { - sigma->sc++; - sigma->sc &= 31; - sigma->ma = sigma->maback; - sigma->vadj--; - if (!sigma->vadj) { - sigma->cgadispon = 1; - sigma->ma = sigma->maback = (sigma->crtc[13] | (sigma->crtc[12] << 8)) & 0x3fff; - sigma->sc = 0; - } - } else if (sigma->sc == sigma->crtc[9]) { - sigma->maback = sigma->ma; - sigma->sc = 0; - oldvc = sigma->vc; - sigma->vc++; - sigma->vc &= 127; + timer_advance_u64(&sigma->timer, sigma->dispontime); + sigma->linepos = 0; + if (sigma->vsynctime) { + sigma->vsynctime--; + if (!sigma->vsynctime) + sigma->sigmastat &= ~STATUS_RETR_V; + } + if (sigma->sc == (sigma->crtc[11] & 31) || ((sigma->crtc[8] & 3) == 3 && sigma->sc == ((sigma->crtc[11] & 31) >> 1))) { + sigma->con = 0; + sigma->coff = 1; + } + if ((sigma->crtc[8] & 3) == 3 && sigma->sc == (sigma->crtc[9] >> 1)) + sigma->maback = sigma->ma; + if (sigma->vadj) { + sigma->sc++; + sigma->sc &= 31; + sigma->ma = sigma->maback; + sigma->vadj--; + if (!sigma->vadj) { + sigma->cgadispon = 1; + sigma->ma = sigma->maback = (sigma->crtc[13] | (sigma->crtc[12] << 8)) & 0x3fff; + sigma->sc = 0; + } + } else if (sigma->sc == sigma->crtc[9]) { + sigma->maback = sigma->ma; + sigma->sc = 0; + oldvc = sigma->vc; + sigma->vc++; + sigma->vc &= 127; - if (sigma->vc == sigma->crtc[6]) - sigma->cgadispon = 0; + if (sigma->vc == sigma->crtc[6]) + sigma->cgadispon = 0; - if (oldvc == sigma->crtc[4]) { - sigma->vc = 0; - sigma->vadj = sigma->crtc[5]; - if (!sigma->vadj) sigma->cgadispon = 1; - if (!sigma->vadj) - sigma->ma = sigma->maback = (sigma->crtc[13] | (sigma->crtc[12] << 8)) & 0x3fff; - if ((sigma->crtc[10] & 0x60) == 0x20) - sigma->cursoron = 0; - else - sigma->cursoron = sigma->cgablink & 8; - } + if (oldvc == sigma->crtc[4]) { + sigma->vc = 0; + sigma->vadj = sigma->crtc[5]; + if (!sigma->vadj) + sigma->cgadispon = 1; + if (!sigma->vadj) + sigma->ma = sigma->maback = (sigma->crtc[13] | (sigma->crtc[12] << 8)) & 0x3fff; + if ((sigma->crtc[10] & 0x60) == 0x20) + sigma->cursoron = 0; + else + sigma->cursoron = sigma->cgablink & 8; + } - if (sigma->vc == sigma->crtc[7]) { - sigma->cgadispon = 0; - sigma->displine = 0; - sigma->vsynctime = 16; - if (sigma->crtc[7]) { - if (sigma->sigmamode & MODE_80COLS) - x = (sigma->crtc[1] << 4) + 16; - else - x = (sigma->crtc[1] << 5) + 16; - sigma->lastline++; - if ((x != xsize) || ((sigma->lastline - sigma->firstline) != ysize) || - video_force_resize_get()) { - xsize = x; - ysize = sigma->lastline - sigma->firstline; - if (xsize < 64) - xsize = 656; - if (ysize < 32) - ysize = 200; - if (ysize <= 250) - set_screen_size(xsize, (ysize << 1) + 16); - else - set_screen_size(xsize, ysize + 8); + if (sigma->vc == sigma->crtc[7]) { + sigma->cgadispon = 0; + sigma->displine = 0; + sigma->vsynctime = 16; + if (sigma->crtc[7]) { + if (sigma->sigmamode & MODE_80COLS) + x = (sigma->crtc[1] << 4) + 16; + else + x = (sigma->crtc[1] << 5) + 16; + sigma->lastline++; + if ((x != xsize) || ((sigma->lastline - sigma->firstline) != ysize) || video_force_resize_get()) { + xsize = x; + ysize = sigma->lastline - sigma->firstline; + if (xsize < 64) + xsize = 656; + if (ysize < 32) + ysize = 200; + if (ysize <= 250) + set_screen_size(xsize, (ysize << 1) + 16); + else + set_screen_size(xsize, ysize + 8); - if (video_force_resize_get()) - video_force_resize_set(0); - } + if (video_force_resize_get()) + video_force_resize_set(0); + } - video_blit_memtoscreen_8(0, sigma->firstline - 4, xsize, (sigma->lastline - sigma->firstline) + 8); - frames++; + video_blit_memtoscreen_8(0, sigma->firstline - 4, xsize, (sigma->lastline - sigma->firstline) + 8); + frames++; - video_res_x = xsize - 16; - video_res_y = ysize; - if (sigma->sigmamode & MODE_GRAPHICS) { - if (sigma->sigmamode & (MODE_HRGFX | MODE_640x400)) - video_bpp = 1; - else { - video_res_x /= 2; - video_bpp = 2; - } - } else if (sigma->sigmamode & MODE_80COLS) { - /* 80-column text */ - video_res_x /= 8; - video_res_y /= sigma->crtc[9] + 1; - video_bpp = 0; - } else { - /* 40-column text */ - video_res_x /= 16; - video_res_y /= sigma->crtc[9] + 1; - video_bpp = 0; - } - } - sigma->firstline = 1000; - sigma->lastline = 0; - sigma->cgablink++; - sigma->oddeven ^= 1; - } - } else { - sigma->sc++; - sigma->sc &= 31; - sigma->ma = sigma->maback; - } - if (sigma->cgadispon) - sigma->sigmastat &= ~STATUS_RETR_H; - if ((sigma->sc == (sigma->crtc[10] & 31) || - ((sigma->crtc[8] & 3) == 3 && sigma->sc == ((sigma->crtc[10] & 31) >> 1)))) - sigma->con = 1; + video_res_x = xsize - 16; + video_res_y = ysize; + if (sigma->sigmamode & MODE_GRAPHICS) { + if (sigma->sigmamode & (MODE_HRGFX | MODE_640x400)) + video_bpp = 1; + else { + video_res_x /= 2; + video_bpp = 2; + } + } else if (sigma->sigmamode & MODE_80COLS) { + /* 80-column text */ + video_res_x /= 8; + video_res_y /= sigma->crtc[9] + 1; + video_bpp = 0; + } else { + /* 40-column text */ + video_res_x /= 16; + video_res_y /= sigma->crtc[9] + 1; + video_bpp = 0; + } + } + sigma->firstline = 1000; + sigma->lastline = 0; + sigma->cgablink++; + sigma->oddeven ^= 1; + } + } else { + sigma->sc++; + sigma->sc &= 31; + sigma->ma = sigma->maback; + } + if (sigma->cgadispon) + sigma->sigmastat &= ~STATUS_RETR_H; + if ((sigma->sc == (sigma->crtc[10] & 31) || ((sigma->crtc[8] & 3) == 3 && sigma->sc == ((sigma->crtc[10] & 31) >> 1)))) + sigma->con = 1; } } - static void -*sigma_init(const device_t *info) + * + sigma_init(const device_t *info) { - int bios_addr; + int bios_addr; sigma_t *sigma = malloc(sizeof(sigma_t)); memset(sigma, 0, sizeof(sigma_t)); @@ -817,7 +786,7 @@ static void loadfont(ROM_SIGMA_FONT, 7); rom_init(&sigma->bios_rom, ROM_SIGMA_BIOS, bios_addr, 0x2000, - 0x1FFF, 0, MEM_MAPPING_EXTERNAL); + 0x1FFF, 0, MEM_MAPPING_EXTERNAL); /* The BIOS ROM is overlaid by RAM, so remove its default mapping and access it through sigma_bread() / sigma_bwrite() below */ mem_mapping_disable(&sigma->bios_rom.mapping); @@ -827,62 +796,59 @@ static void timer_add(&sigma->timer, sigma_poll, sigma, 1); mem_mapping_add(&sigma->mapping, 0xb8000, 0x08000, - sigma_read, NULL, NULL, - sigma_write, NULL, NULL, - NULL, MEM_MAPPING_EXTERNAL, sigma); + sigma_read, NULL, NULL, + sigma_write, NULL, NULL, + NULL, MEM_MAPPING_EXTERNAL, sigma); mem_mapping_add(&sigma->bios_ram, bios_addr, 0x2000, - sigma_bread, NULL, NULL, - sigma_bwrite, NULL, NULL, - sigma->bios_rom.rom, MEM_MAPPING_EXTERNAL, sigma); + sigma_bread, NULL, NULL, + sigma_bwrite, NULL, NULL, + sigma->bios_rom.rom, MEM_MAPPING_EXTERNAL, sigma); io_sethandler(0x03d0, 0x0010, - sigma_in, NULL, NULL, - sigma_out, NULL, NULL, sigma); + sigma_in, NULL, NULL, + sigma_out, NULL, NULL, sigma); io_sethandler(0x02d0, 0x0010, - sigma_in, NULL, NULL, - sigma_out, NULL, NULL, sigma); + sigma_in, NULL, NULL, + sigma_out, NULL, NULL, sigma); /* Start with ROM paged in, BIOS RAM paged out */ sigma->rom_paged = 0x80; cga_palette = device_get_config_int("rgb_type") << 1; if (cga_palette > 6) - cga_palette = 0; + cga_palette = 0; cgapal_rebuild(); if (sigma->enable_nmi) - sigma->sigmastat = STATUS_LPEN_T; + sigma->sigmastat = STATUS_LPEN_T; return sigma; } - static int sigma_available(void) { - return((rom_present(ROM_SIGMA_FONT) && rom_present(ROM_SIGMA_BIOS))); + return ((rom_present(ROM_SIGMA_FONT) && rom_present(ROM_SIGMA_BIOS))); } - static void sigma_close(void *p) { - sigma_t *sigma = (sigma_t *)p; + sigma_t *sigma = (sigma_t *) p; free(sigma->vram); free(sigma); } - void sigma_speed_changed(void *p) { - sigma_t *sigma = (sigma_t *)p; + sigma_t *sigma = (sigma_t *) p; sigma_recalctimings(sigma); } device_config_t sigma_config[] = { -// clang-format off + // clang-format off { .name = "rgb_type", .description = "RGB type", @@ -982,15 +948,15 @@ device_config_t sigma_config[] = { }; const device_t sigma_device = { - .name = "Sigma Color 400", + .name = "Sigma Color 400", .internal_name = "sigma400", - .flags = DEVICE_ISA, - .local = 0, - .init = sigma_init, - .close = sigma_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = sigma_init, + .close = sigma_close, + .reset = NULL, { .available = sigma_available }, .speed_changed = sigma_speed_changed, - .force_redraw = NULL, - .config = sigma_config + .force_redraw = NULL, + .config = sigma_config }; diff --git a/src/video/vid_stg_ramdac.c b/src/video/vid_stg_ramdac.c index 49216dba2..161cf1177 100644 --- a/src/video/vid_stg_ramdac.c +++ b/src/video/vid_stg_ramdac.c @@ -28,205 +28,199 @@ #include <86box/video.h> #include <86box/vid_svga.h> - -typedef struct stg_ramdac_t -{ - int magic_count, index; +typedef struct stg_ramdac_t { + int magic_count, index; uint8_t regs[256]; uint8_t command; } stg_ramdac_t; - - -static int stg_state_read[2][8] = {{1,2,3,4,0,0,0,0}, {1,2,3,4,5,6,7,7}}; -static int stg_state_write[8] = {0,0,0,0,0,6,7,7}; - +static int stg_state_read[2][8] = { + {1, 2, 3, 4, 0, 0, 0, 0}, + { 1, 2, 3, 4, 5, 6, 7, 7} +}; +static int stg_state_write[8] = { 0, 0, 0, 0, 0, 6, 7, 7 }; void stg_ramdac_set_bpp(svga_t *svga, stg_ramdac_t *ramdac) { if (ramdac->command & 0x8) { switch (ramdac->regs[3]) { - case 0: - case 5: - case 7: - default: - svga->bpp = 8; - break; - case 1: - case 2: - case 8: - svga->bpp = 15; - break; - case 3: - case 6: - svga->bpp = 16; - break; - case 4: - case 9: - svga->bpp = 24; - break; - } + case 0: + case 5: + case 7: + default: + svga->bpp = 8; + break; + case 1: + case 2: + case 8: + svga->bpp = 15; + break; + case 3: + case 6: + svga->bpp = 16; + break; + case 4: + case 9: + svga->bpp = 24; + break; + } } else { - switch (ramdac->command >> 5) { - case 0: - default: - svga->bpp = 8; - break; - case 5: - svga->bpp = 15; - break; - case 6: - svga->bpp = 16; - break; - case 7: - svga->bpp = 24; - break; - } + switch (ramdac->command >> 5) { + case 0: + default: + svga->bpp = 8; + break; + case 5: + svga->bpp = 15; + break; + case 6: + svga->bpp = 16; + break; + case 7: + svga->bpp = 24; + break; + } } svga_recalctimings(svga); } - void stg_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga) { stg_ramdac_t *ramdac = (stg_ramdac_t *) p; - int didwrite, old; + int didwrite, old; switch (addr) { - case 0x3c6: - switch (ramdac->magic_count) { - /* 0 = PEL mask register */ - case 0: - case 1: - case 2: - case 3: - break; - case 4: /* REG06 */ - old = ramdac->command; - ramdac->command = val; - if ((old ^ val) & 8) - stg_ramdac_set_bpp(svga, ramdac); - else { - if ((old ^ val) & 0xE0) - stg_ramdac_set_bpp(svga, ramdac); - } - break; - case 5: - ramdac->index = (ramdac->index & 0xff00) | val; - break; - case 6: - ramdac->index = (ramdac->index & 0xff) | (val << 8); - break; - case 7: - if (ramdac->index < 0x100) - ramdac->regs[ramdac->index] = val; - if ((ramdac->index == 3) && (ramdac->command & 8)) - stg_ramdac_set_bpp(svga, ramdac); - ramdac->index++; - break; - } - didwrite = (ramdac->magic_count >= 4); - ramdac->magic_count = stg_state_write[ramdac->magic_count & 7]; - if (didwrite) - return; - break; - case 0x3c7: - case 0x3c8: - case 0x3c9: - ramdac->magic_count=0; - break; + case 0x3c6: + switch (ramdac->magic_count) { + /* 0 = PEL mask register */ + case 0: + case 1: + case 2: + case 3: + break; + case 4: /* REG06 */ + old = ramdac->command; + ramdac->command = val; + if ((old ^ val) & 8) + stg_ramdac_set_bpp(svga, ramdac); + else { + if ((old ^ val) & 0xE0) + stg_ramdac_set_bpp(svga, ramdac); + } + break; + case 5: + ramdac->index = (ramdac->index & 0xff00) | val; + break; + case 6: + ramdac->index = (ramdac->index & 0xff) | (val << 8); + break; + case 7: + if (ramdac->index < 0x100) + ramdac->regs[ramdac->index] = val; + if ((ramdac->index == 3) && (ramdac->command & 8)) + stg_ramdac_set_bpp(svga, ramdac); + ramdac->index++; + break; + } + didwrite = (ramdac->magic_count >= 4); + ramdac->magic_count = stg_state_write[ramdac->magic_count & 7]; + if (didwrite) + return; + break; + case 0x3c7: + case 0x3c8: + case 0x3c9: + ramdac->magic_count = 0; + break; } svga_out(addr, val, svga); } - uint8_t stg_ramdac_in(uint16_t addr, void *p, svga_t *svga) { stg_ramdac_t *ramdac = (stg_ramdac_t *) p; - uint8_t temp = 0xff; + uint8_t temp = 0xff; switch (addr) { - case 0x3c6: - switch (ramdac->magic_count) { - case 0: - case 1: - case 2: - case 3: - temp = 0xff; - break; - case 4: - temp = ramdac->command; - break; - case 5: - temp = ramdac->index & 0xff; - break; - case 6: - temp = ramdac->index >> 8; - break; - case 7: - switch (ramdac->index) { - case 0: - temp = 0x44; - break; - case 1: - temp = 0x03; - break; - case 7: - temp = 0x88; - break; - default: - if (ramdac->index < 0x100) - temp = ramdac->regs[ramdac->index]; - else - temp = 0xff; - break; - } - ramdac->index++; - break; - } - ramdac->magic_count = stg_state_read[(ramdac->command & 0x10) ? 1 : 0][ramdac->magic_count & 7]; - return temp; - case 0x3c7: - case 0x3c8: - case 0x3c9: - ramdac->magic_count=0; - break; + case 0x3c6: + switch (ramdac->magic_count) { + case 0: + case 1: + case 2: + case 3: + temp = 0xff; + break; + case 4: + temp = ramdac->command; + break; + case 5: + temp = ramdac->index & 0xff; + break; + case 6: + temp = ramdac->index >> 8; + break; + case 7: + switch (ramdac->index) { + case 0: + temp = 0x44; + break; + case 1: + temp = 0x03; + break; + case 7: + temp = 0x88; + break; + default: + if (ramdac->index < 0x100) + temp = ramdac->regs[ramdac->index]; + else + temp = 0xff; + break; + } + ramdac->index++; + break; + } + ramdac->magic_count = stg_state_read[(ramdac->command & 0x10) ? 1 : 0][ramdac->magic_count & 7]; + return temp; + case 0x3c7: + case 0x3c8: + case 0x3c9: + ramdac->magic_count = 0; + break; } return svga_in(addr, svga); } - float stg_getclock(int clock, void *p) { - stg_ramdac_t *ramdac = (stg_ramdac_t *)p; - float t; - int m, n, n2; - uint16_t *c; + stg_ramdac_t *ramdac = (stg_ramdac_t *) p; + float t; + int m, n, n2; + uint16_t *c; if (clock == 0) - return 25175000.0; + return 25175000.0; if (clock == 1) - return 28322000.0; + return 28322000.0; - clock ^= 1; /*Clocks 2 and 3 seem to be reversed*/ - c = (uint16_t *) &ramdac->regs[0x20 + (clock << 1)]; - m = (*c & 0xff) + 2; /* B+2 */ - n = ((*c >> 8) & 0x1f) + 2; /* N1+2 */ - n2 = ((*c >> 13) & 0x07); /* D */ + clock ^= 1; /*Clocks 2 and 3 seem to be reversed*/ + c = (uint16_t *) &ramdac->regs[0x20 + (clock << 1)]; + m = (*c & 0xff) + 2; /* B+2 */ + n = ((*c >> 8) & 0x1f) + 2; /* N1+2 */ + n2 = ((*c >> 13) & 0x07); /* D */ n2 = (1 << n2); - t = (14318184.0f * (float)m) / (float)(n * n2); + t = (14318184.0f * (float) m) / (float) (n * n2); return t; } - static void * stg_ramdac_init(const device_t *info) { @@ -236,26 +230,25 @@ stg_ramdac_init(const device_t *info) return ramdac; } - static void stg_ramdac_close(void *priv) { stg_ramdac_t *ramdac = (stg_ramdac_t *) priv; if (ramdac) - free(ramdac); + free(ramdac); } const device_t stg_ramdac_device = { - .name = "SGS-Thompson STG170x RAMDAC", + .name = "SGS-Thompson STG170x RAMDAC", .internal_name = "stg_ramdac", - .flags = 0, - .local = 0, - .init = stg_ramdac_init, - .close = stg_ramdac_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = stg_ramdac_init, + .close = stg_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index 9ab96c169..d6d9a9564 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -44,406 +44,397 @@ void svga_doblit(int wx, int wy, svga_t *svga); svga_t *svga_8514; -extern int cyc_total; -extern uint8_t edatlookup[4][4]; +extern int cyc_total; +extern uint8_t edatlookup[4][4]; uint8_t svga_rotate[8][256]; /*Primary SVGA device. As multiple video cards are not yet supported this is the only SVGA device.*/ static svga_t *svga_pri; -int vga_on, ibm8514_on; +int vga_on, ibm8514_on; svga_t -*svga_get_pri() + * + svga_get_pri() { return svga_pri; } - void svga_set_override(svga_t *svga, int val) { if (svga->override && !val) - svga->fullchange = changeframecount; + svga->fullchange = changeframecount; svga->override = val; if (!val) { - /* Override turned off, restore overscan X and Y per the CRTC. */ - if (enable_overscan) { - overscan_y = (svga->rowcount + 1) << 1; + /* Override turned off, restore overscan X and Y per the CRTC. */ + if (enable_overscan) { + overscan_y = (svga->rowcount + 1) << 1; - if (overscan_y < 16) - overscan_y = 16; - } + if (overscan_y < 16) + overscan_y = 16; + } - overscan_x = (svga->seqregs[1] & 1) ? 16 : 18; + overscan_x = (svga->seqregs[1] & 1) ? 16 : 18; - if (svga->seqregs[1] & 8) - overscan_x <<= 1; + if (svga->seqregs[1] & 8) + overscan_x <<= 1; } else - overscan_x = overscan_y = 16; - /* Override turned off, fix overcan X and Y to 16. */ + overscan_x = overscan_y = 16; + /* Override turned off, fix overcan X and Y to 16. */ } - void svga_out(uint16_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; - int c; + svga_t *svga = (svga_t *) p; + int c; uint8_t o, index; switch (addr) { - case 0x3c0: - case 0x3c1: - if (!svga->attrff) { - svga->attraddr = val & 31; - if ((val & 0x20) != svga->attr_palette_enable) { - svga->fullchange = 3; - svga->attr_palette_enable = val & 0x20; - svga_recalctimings(svga); - } - } else { - if ((svga->attraddr == 0x13) && (svga->attrregs[0x13] != val)) - svga->fullchange = changeframecount; - o = svga->attrregs[svga->attraddr & 31]; - svga->attrregs[svga->attraddr & 31] = val; - if (svga->attraddr < 16) - svga->fullchange = changeframecount; - if (svga->attraddr == 0x10 || svga->attraddr == 0x14 || svga->attraddr < 0x10) { - for (c = 0; c < 16; c++) { - if (svga->attrregs[0x10] & 0x80) { - svga->egapal[c] = (svga->attrregs[c] & 0xf) | - ((svga->attrregs[0x14] & 0xf) << 4); - } else { - svga->egapal[c] = (svga->attrregs[c] & 0x3f) | - ((svga->attrregs[0x14] & 0xc) << 4); - } - } - svga->fullchange = changeframecount; - } - /* Recalculate timings on change of attribute register 0x11 - (overscan border color) too. */ - if (svga->attraddr == 0x10) { - if (o != val) - svga_recalctimings(svga); - } else if (svga->attraddr == 0x11) { - svga->overscan_color = svga->pallook[svga->attrregs[0x11]]; - if (o != val) - svga_recalctimings(svga); - } else if (svga->attraddr == 0x12) { - if ((val & 0xf) != svga->plane_mask) - svga->fullchange = changeframecount; - svga->plane_mask = val & 0xf; - } - } - svga->attrff ^= 1; - break; - case 0x3c2: - svga->miscout = val; - svga->vidclock = val & 4; - io_removehandler(0x03a0, 0x0020, svga->video_in, NULL, NULL, svga->video_out, NULL, NULL, svga->p); - if (!(val & 1)) - io_sethandler(0x03a0, 0x0020, svga->video_in, NULL, NULL, svga->video_out, NULL, NULL, svga->p); - svga_recalctimings(svga); - break; - case 0x3c4: - svga->seqaddr = val; - break; - case 0x3c5: - if (svga->seqaddr > 0xf) - return; - o = svga->seqregs[svga->seqaddr & 0xf]; - svga->seqregs[svga->seqaddr & 0xf] = val; - if (o != val && (svga->seqaddr & 0xf) == 1) - svga_recalctimings(svga); - switch (svga->seqaddr & 0xf) { - case 1: - if (svga->scrblank && !(val & 0x20)) - svga->fullchange = 3; - svga->scrblank = (svga->scrblank & ~0x20) | (val & 0x20); - svga_recalctimings(svga); - break; - case 2: - svga->writemask = val & 0xf; - break; - case 3: - svga->charsetb = (((val >> 2) & 3) * 0x10000) + 2; - svga->charseta = ((val & 3) * 0x10000) + 2; - if (val & 0x10) - svga->charseta += 0x8000; - if (val & 0x20) - svga->charsetb += 0x8000; - break; - case 4: - svga->chain2_write = !(val & 4); - svga->chain4 = val & 8; - svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) && - !svga->gdcreg[1]) && ((svga->chain4 && (svga->packed_chain4 || svga->force_old_addr)) || svga->fb_only) && !(svga->adv_flags & FLAG_ADDR_BY8); - break; - } - break; - case 0x3c6: - svga->dac_mask = val; - break; - case 0x3c7: - case 0x3c8: - svga->dac_pos = 0; - svga->dac_status = addr & 0x03; - svga->dac_addr = (val + (addr & 0x01)) & 255; - break; - case 0x3c9: - if (svga->adv_flags & FLAG_RAMDAC_SHIFT) - val <<= 2; - svga->fullchange = changeframecount; - switch (svga->dac_pos) { - case 0: - svga->dac_r = val; - svga->dac_pos++; - break; - case 1: - svga->dac_g = val; - svga->dac_pos++; - break; - case 2: - index = svga->dac_addr & 255; - svga->vgapal[index].r = svga->dac_r; - svga->vgapal[index].g = svga->dac_g; - svga->vgapal[index].b = val; - if (svga->ramdac_type == RAMDAC_8BIT) - svga->pallook[index] = makecol32(svga->vgapal[index].r, svga->vgapal[index].g, svga->vgapal[index].b); - else - svga->pallook[index] = makecol32(video_6to8[svga->vgapal[index].r & 0x3f], video_6to8[svga->vgapal[index].g & 0x3f], video_6to8[svga->vgapal[index].b & 0x3f]); - svga->dac_pos = 0; - svga->dac_addr = (svga->dac_addr + 1) & 255; - break; - } - break; - case 0x3ce: - svga->gdcaddr = val; - break; - case 0x3cf: - o = svga->gdcreg[svga->gdcaddr & 15]; - switch (svga->gdcaddr & 15) { - case 2: - svga->colourcompare = val; - break; - case 4: - svga->readplane = val & 3; - break; - case 5: - svga->writemode = val & 3; - svga->readmode = val & 8; - svga->chain2_read = val & 0x10; - break; - case 6: - if ((svga->gdcreg[6] & 0xc) != (val & 0xc)) { - switch (val&0xC) { - case 0x0: /*128k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); - svga->banked_mask = 0xffff; - break; - case 0x4: /*64k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); - svga->banked_mask = 0xffff; - break; - case 0x8: /*32k at B0000*/ - mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); - svga->banked_mask = 0x7fff; - break; - case 0xC: /*32k at B8000*/ - mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); - svga->banked_mask = 0x7fff; - break; - } - } - break; - case 7: - svga->colournocare = val; - break; - } - svga->gdcreg[svga->gdcaddr & 15] = val; - svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) && - !svga->gdcreg[1]) && ((svga->chain4 && (svga->packed_chain4 || svga->force_old_addr)) || svga->fb_only); - if (((svga->gdcaddr & 15) == 5 && (val ^ o) & 0x70) || - ((svga->gdcaddr & 15) == 6 && (val ^ o) & 1)) - svga_recalctimings(svga); - break; + case 0x3c0: + case 0x3c1: + if (!svga->attrff) { + svga->attraddr = val & 31; + if ((val & 0x20) != svga->attr_palette_enable) { + svga->fullchange = 3; + svga->attr_palette_enable = val & 0x20; + svga_recalctimings(svga); + } + } else { + if ((svga->attraddr == 0x13) && (svga->attrregs[0x13] != val)) + svga->fullchange = changeframecount; + o = svga->attrregs[svga->attraddr & 31]; + svga->attrregs[svga->attraddr & 31] = val; + if (svga->attraddr < 16) + svga->fullchange = changeframecount; + if (svga->attraddr == 0x10 || svga->attraddr == 0x14 || svga->attraddr < 0x10) { + for (c = 0; c < 16; c++) { + if (svga->attrregs[0x10] & 0x80) { + svga->egapal[c] = (svga->attrregs[c] & 0xf) | ((svga->attrregs[0x14] & 0xf) << 4); + } else { + svga->egapal[c] = (svga->attrregs[c] & 0x3f) | ((svga->attrregs[0x14] & 0xc) << 4); + } + } + svga->fullchange = changeframecount; + } + /* Recalculate timings on change of attribute register 0x11 + (overscan border color) too. */ + if (svga->attraddr == 0x10) { + if (o != val) + svga_recalctimings(svga); + } else if (svga->attraddr == 0x11) { + svga->overscan_color = svga->pallook[svga->attrregs[0x11]]; + if (o != val) + svga_recalctimings(svga); + } else if (svga->attraddr == 0x12) { + if ((val & 0xf) != svga->plane_mask) + svga->fullchange = changeframecount; + svga->plane_mask = val & 0xf; + } + } + svga->attrff ^= 1; + break; + case 0x3c2: + svga->miscout = val; + svga->vidclock = val & 4; + io_removehandler(0x03a0, 0x0020, svga->video_in, NULL, NULL, svga->video_out, NULL, NULL, svga->p); + if (!(val & 1)) + io_sethandler(0x03a0, 0x0020, svga->video_in, NULL, NULL, svga->video_out, NULL, NULL, svga->p); + svga_recalctimings(svga); + break; + case 0x3c4: + svga->seqaddr = val; + break; + case 0x3c5: + if (svga->seqaddr > 0xf) + return; + o = svga->seqregs[svga->seqaddr & 0xf]; + svga->seqregs[svga->seqaddr & 0xf] = val; + if (o != val && (svga->seqaddr & 0xf) == 1) + svga_recalctimings(svga); + switch (svga->seqaddr & 0xf) { + case 1: + if (svga->scrblank && !(val & 0x20)) + svga->fullchange = 3; + svga->scrblank = (svga->scrblank & ~0x20) | (val & 0x20); + svga_recalctimings(svga); + break; + case 2: + svga->writemask = val & 0xf; + break; + case 3: + svga->charsetb = (((val >> 2) & 3) * 0x10000) + 2; + svga->charseta = ((val & 3) * 0x10000) + 2; + if (val & 0x10) + svga->charseta += 0x8000; + if (val & 0x20) + svga->charsetb += 0x8000; + break; + case 4: + svga->chain2_write = !(val & 4); + svga->chain4 = val & 8; + svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) && !svga->gdcreg[1]) && ((svga->chain4 && (svga->packed_chain4 || svga->force_old_addr)) || svga->fb_only) && !(svga->adv_flags & FLAG_ADDR_BY8); + break; + } + break; + case 0x3c6: + svga->dac_mask = val; + break; + case 0x3c7: + case 0x3c8: + svga->dac_pos = 0; + svga->dac_status = addr & 0x03; + svga->dac_addr = (val + (addr & 0x01)) & 255; + break; + case 0x3c9: + if (svga->adv_flags & FLAG_RAMDAC_SHIFT) + val <<= 2; + svga->fullchange = changeframecount; + switch (svga->dac_pos) { + case 0: + svga->dac_r = val; + svga->dac_pos++; + break; + case 1: + svga->dac_g = val; + svga->dac_pos++; + break; + case 2: + index = svga->dac_addr & 255; + svga->vgapal[index].r = svga->dac_r; + svga->vgapal[index].g = svga->dac_g; + svga->vgapal[index].b = val; + if (svga->ramdac_type == RAMDAC_8BIT) + svga->pallook[index] = makecol32(svga->vgapal[index].r, svga->vgapal[index].g, svga->vgapal[index].b); + else + svga->pallook[index] = makecol32(video_6to8[svga->vgapal[index].r & 0x3f], video_6to8[svga->vgapal[index].g & 0x3f], video_6to8[svga->vgapal[index].b & 0x3f]); + svga->dac_pos = 0; + svga->dac_addr = (svga->dac_addr + 1) & 255; + break; + } + break; + case 0x3ce: + svga->gdcaddr = val; + break; + case 0x3cf: + o = svga->gdcreg[svga->gdcaddr & 15]; + switch (svga->gdcaddr & 15) { + case 2: + svga->colourcompare = val; + break; + case 4: + svga->readplane = val & 3; + break; + case 5: + svga->writemode = val & 3; + svga->readmode = val & 8; + svga->chain2_read = val & 0x10; + break; + case 6: + if ((svga->gdcreg[6] & 0xc) != (val & 0xc)) { + switch (val & 0xC) { + case 0x0: /*128k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); + svga->banked_mask = 0xffff; + break; + case 0x4: /*64k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + svga->banked_mask = 0xffff; + break; + case 0x8: /*32k at B0000*/ + mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); + svga->banked_mask = 0x7fff; + break; + case 0xC: /*32k at B8000*/ + mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); + svga->banked_mask = 0x7fff; + break; + } + } + break; + case 7: + svga->colournocare = val; + break; + } + svga->gdcreg[svga->gdcaddr & 15] = val; + svga->fast = (svga->gdcreg[8] == 0xff && !(svga->gdcreg[3] & 0x18) && !svga->gdcreg[1]) && ((svga->chain4 && (svga->packed_chain4 || svga->force_old_addr)) || svga->fb_only); + if (((svga->gdcaddr & 15) == 5 && (val ^ o) & 0x70) || ((svga->gdcaddr & 15) == 6 && (val ^ o) & 1)) + svga_recalctimings(svga); + break; } } - uint8_t svga_in(uint16_t addr, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; uint8_t index, ret = 0xff; switch (addr) { - case 0x3c0: - ret = svga->attraddr | svga->attr_palette_enable; - break; - case 0x3c1: - ret = svga->attrregs[svga->attraddr]; - break; - case 0x3c2: - if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x4e) - ret = 0; - else - ret = 0x10; - break; - case 0x3c4: - ret = svga->seqaddr; - break; - case 0x3c5: - ret = svga->seqregs[svga->seqaddr & 0x0f]; - break; - case 0x3c6: - ret = svga->dac_mask; - break; - case 0x3c7: - ret = svga->dac_status; - break; - case 0x3c8: - ret = svga->dac_addr; - break; - case 0x3c9: - index = (svga->dac_addr - 1) & 255; - switch (svga->dac_pos) { - case 0: - svga->dac_pos++; - if (svga->ramdac_type == RAMDAC_8BIT) - ret = svga->vgapal[index].r; - else - ret = svga->vgapal[index].r & 0x3f; - break; - case 1: - svga->dac_pos++; - if (svga->ramdac_type == RAMDAC_8BIT) - ret = svga->vgapal[index].g; - else - ret = svga->vgapal[index].g & 0x3f; - break; - case 2: - svga->dac_pos=0; - svga->dac_addr = (svga->dac_addr + 1) & 255; - if (svga->ramdac_type == RAMDAC_8BIT) - ret = svga->vgapal[index].b; - else - ret = svga->vgapal[index].b & 0x3f; - break; - } - if (svga->adv_flags & FLAG_RAMDAC_SHIFT) - ret >>= 2; - break; - case 0x3cc: - ret = svga->miscout; - break; - case 0x3ce: - ret = svga->gdcaddr; - break; - case 0x3cf: - /* The spec says GDC addresses 0xF8 to 0xFB return the latch. */ - switch(svga->gdcaddr) { - case 0xf8: - ret = svga->latch.b[0]; - break; - case 0xf9: - ret = svga->latch.b[1]; - break; - case 0xfa: - ret = svga->latch.b[2]; - break; - case 0xfb: - ret = svga->latch.b[3]; - break; - default: - ret = svga->gdcreg[svga->gdcaddr & 0xf]; - break; - } - break; - case 0x3da: - svga->attrff = 0; + case 0x3c0: + ret = svga->attraddr | svga->attr_palette_enable; + break; + case 0x3c1: + ret = svga->attrregs[svga->attraddr]; + break; + case 0x3c2: + if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x4e) + ret = 0; + else + ret = 0x10; + break; + case 0x3c4: + ret = svga->seqaddr; + break; + case 0x3c5: + ret = svga->seqregs[svga->seqaddr & 0x0f]; + break; + case 0x3c6: + ret = svga->dac_mask; + break; + case 0x3c7: + ret = svga->dac_status; + break; + case 0x3c8: + ret = svga->dac_addr; + break; + case 0x3c9: + index = (svga->dac_addr - 1) & 255; + switch (svga->dac_pos) { + case 0: + svga->dac_pos++; + if (svga->ramdac_type == RAMDAC_8BIT) + ret = svga->vgapal[index].r; + else + ret = svga->vgapal[index].r & 0x3f; + break; + case 1: + svga->dac_pos++; + if (svga->ramdac_type == RAMDAC_8BIT) + ret = svga->vgapal[index].g; + else + ret = svga->vgapal[index].g & 0x3f; + break; + case 2: + svga->dac_pos = 0; + svga->dac_addr = (svga->dac_addr + 1) & 255; + if (svga->ramdac_type == RAMDAC_8BIT) + ret = svga->vgapal[index].b; + else + ret = svga->vgapal[index].b & 0x3f; + break; + } + if (svga->adv_flags & FLAG_RAMDAC_SHIFT) + ret >>= 2; + break; + case 0x3cc: + ret = svga->miscout; + break; + case 0x3ce: + ret = svga->gdcaddr; + break; + case 0x3cf: + /* The spec says GDC addresses 0xF8 to 0xFB return the latch. */ + switch (svga->gdcaddr) { + case 0xf8: + ret = svga->latch.b[0]; + break; + case 0xf9: + ret = svga->latch.b[1]; + break; + case 0xfa: + ret = svga->latch.b[2]; + break; + case 0xfb: + ret = svga->latch.b[3]; + break; + default: + ret = svga->gdcreg[svga->gdcaddr & 0xf]; + break; + } + break; + case 0x3da: + svga->attrff = 0; - if (svga->cgastat & 0x01) - svga->cgastat &= ~0x30; - else - svga->cgastat ^= 0x30; - ret = svga->cgastat; - break; + if (svga->cgastat & 0x01) + svga->cgastat &= ~0x30; + else + svga->cgastat ^= 0x30; + ret = svga->cgastat; + break; } - return(ret); + return (ret); } - void svga_set_ramdac_type(svga_t *svga, int type) { int c; if (svga->ramdac_type != type) { - svga->ramdac_type = type; + svga->ramdac_type = type; - for (c = 0; c < 256; c++) { - if (svga->ramdac_type == RAMDAC_8BIT) - svga->pallook[c] = makecol32(svga->vgapal[c].r, svga->vgapal[c].g, svga->vgapal[c].b); - else - svga->pallook[c] = makecol32((svga->vgapal[c].r & 0x3f) * 4, - (svga->vgapal[c].g & 0x3f) * 4, - (svga->vgapal[c].b & 0x3f) * 4); - } + for (c = 0; c < 256; c++) { + if (svga->ramdac_type == RAMDAC_8BIT) + svga->pallook[c] = makecol32(svga->vgapal[c].r, svga->vgapal[c].g, svga->vgapal[c].b); + else + svga->pallook[c] = makecol32((svga->vgapal[c].r & 0x3f) * 4, + (svga->vgapal[c].g & 0x3f) * 4, + (svga->vgapal[c].b & 0x3f) * 4); + } } } - void svga_recalctimings(svga_t *svga) { double crtcconst, _dispontime, _dispofftime, disptime; - svga->vtotal = svga->crtc[6]; - svga->dispend = svga->crtc[0x12]; - svga->vsyncstart = svga->crtc[0x10]; - svga->split = svga->crtc[0x18]; + svga->vtotal = svga->crtc[6]; + svga->dispend = svga->crtc[0x12]; + svga->vsyncstart = svga->crtc[0x10]; + svga->split = svga->crtc[0x18]; svga->vblankstart = svga->crtc[0x15]; if (svga->crtc[7] & 1) - svga->vtotal |= 0x100; + svga->vtotal |= 0x100; if (svga->crtc[7] & 32) - svga->vtotal |= 0x200; + svga->vtotal |= 0x200; svga->vtotal += 2; if (svga->crtc[7] & 2) - svga->dispend |= 0x100; + svga->dispend |= 0x100; if (svga->crtc[7] & 64) - svga->dispend |= 0x200; + svga->dispend |= 0x200; svga->dispend++; if (svga->crtc[7] & 4) - svga->vsyncstart |= 0x100; + svga->vsyncstart |= 0x100; if (svga->crtc[7] & 128) - svga->vsyncstart |= 0x200; + svga->vsyncstart |= 0x200; svga->vsyncstart++; if (svga->crtc[7] & 0x10) - svga->split|=0x100; + svga->split |= 0x100; if (svga->crtc[9] & 0x40) - svga->split|=0x200; + svga->split |= 0x200; svga->split++; if (svga->crtc[7] & 0x08) - svga->vblankstart |= 0x100; + svga->vblankstart |= 0x100; if (svga->crtc[9] & 0x20) - svga->vblankstart |= 0x200; + svga->vblankstart |= 0x200; svga->vblankstart++; svga->hdisp = svga->crtc[1] - ((svga->crtc[5] & 0x60) >> 5); svga->hdisp++; svga->htotal = svga->crtc[0]; - svga->htotal += 6; /*+6 is required for Tyrian*/ + svga->htotal += 6; /*+6 is required for Tyrian*/ svga->rowoffset = svga->crtc[0x13]; @@ -454,104 +445,105 @@ svga_recalctimings(svga_t *svga) svga->interlace = 0; svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - svga->ca_adj = 0; + svga->ca_adj = 0; svga->rowcount = svga->crtc[9] & 31; svga->hdisp_time = svga->hdisp; - svga->render = svga_render_blank; + svga->render = svga_render_blank; if (!svga->scrblank && (svga->crtc[0x17] & 0x80) && svga->attr_palette_enable) { - if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /*Text mode*/ - if (svga->seqregs[1] & 8) /*40 column*/ { - svga->render = svga_render_text_40; - svga->hdisp *= (svga->seqregs[1] & 1) ? 16 : 18; - /* Character clock is off by 1 now in 40-line modes, on all cards. */ - svga->ma_latch--; - svga->hdisp += (svga->seqregs[1] & 1) ? 16 : 18; - } else { - svga->render = svga_render_text_80; - svga->hdisp *= (svga->seqregs[1] & 1) ? 8 : 9; - } - svga->hdisp_old = svga->hdisp; - } else { - svga->hdisp *= (svga->seqregs[1] & 8) ? 16 : 8; - svga->hdisp_old = svga->hdisp; + if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /*Text mode*/ + if (svga->seqregs[1] & 8) /*40 column*/ { + svga->render = svga_render_text_40; + svga->hdisp *= (svga->seqregs[1] & 1) ? 16 : 18; + /* Character clock is off by 1 now in 40-line modes, on all cards. */ + svga->ma_latch--; + svga->hdisp += (svga->seqregs[1] & 1) ? 16 : 18; + } else { + svga->render = svga_render_text_80; + svga->hdisp *= (svga->seqregs[1] & 1) ? 8 : 9; + } + svga->hdisp_old = svga->hdisp; + } else { + svga->hdisp *= (svga->seqregs[1] & 8) ? 16 : 8; + svga->hdisp_old = svga->hdisp; - switch (svga->gdcreg[5] & 0x60) { - case 0x00: - if (svga->seqregs[1] & 8) /*Low res (320)*/ - svga->render = svga_render_4bpp_lowres; - else - svga->render = svga_render_4bpp_highres; - break; - case 0x20: /*4 colours*/ - if (svga->seqregs[1] & 8) /*Low res (320)*/ - svga->render = svga_render_2bpp_lowres; - else - svga->render = svga_render_2bpp_highres; - break; - case 0x40: case 0x60: /*256+ colours*/ - switch (svga->bpp) { - case 8: - svga->map8 = svga->pallook; - if (svga->lowres) - svga->render = svga_render_8bpp_lowres; - else - svga->render = svga_render_8bpp_highres; - break; - case 15: - if (svga->lowres) - svga->render = svga_render_15bpp_lowres; - else - svga->render = svga_render_15bpp_highres; - break; - case 16: - if (svga->lowres) - svga->render = svga_render_16bpp_lowres; - else - svga->render = svga_render_16bpp_highres; - break; - case 17: - if (svga->lowres) - svga->render = svga_render_15bpp_mix_lowres; - else - svga->render = svga_render_15bpp_mix_highres; - break; - case 24: - if (svga->lowres) - svga->render = svga_render_24bpp_lowres; - else - svga->render = svga_render_24bpp_highres; - break; - case 32: - if (svga->lowres) - svga->render = svga_render_32bpp_lowres; - else - svga->render = svga_render_32bpp_highres; - break; - } - break; - } - } + switch (svga->gdcreg[5] & 0x60) { + case 0x00: + if (svga->seqregs[1] & 8) /*Low res (320)*/ + svga->render = svga_render_4bpp_lowres; + else + svga->render = svga_render_4bpp_highres; + break; + case 0x20: /*4 colours*/ + if (svga->seqregs[1] & 8) /*Low res (320)*/ + svga->render = svga_render_2bpp_lowres; + else + svga->render = svga_render_2bpp_highres; + break; + case 0x40: + case 0x60: /*256+ colours*/ + switch (svga->bpp) { + case 8: + svga->map8 = svga->pallook; + if (svga->lowres) + svga->render = svga_render_8bpp_lowres; + else + svga->render = svga_render_8bpp_highres; + break; + case 15: + if (svga->lowres) + svga->render = svga_render_15bpp_lowres; + else + svga->render = svga_render_15bpp_highres; + break; + case 16: + if (svga->lowres) + svga->render = svga_render_16bpp_lowres; + else + svga->render = svga_render_16bpp_highres; + break; + case 17: + if (svga->lowres) + svga->render = svga_render_15bpp_mix_lowres; + else + svga->render = svga_render_15bpp_mix_highres; + break; + case 24: + if (svga->lowres) + svga->render = svga_render_24bpp_lowres; + else + svga->render = svga_render_24bpp_highres; + break; + case 32: + if (svga->lowres) + svga->render = svga_render_32bpp_lowres; + else + svga->render = svga_render_32bpp_highres; + break; + } + break; + } + } } - svga->linedbl = svga->crtc[9] & 0x80; - svga->char_width = (svga->seqregs[1] & 1) ? 8 : 9; + svga->linedbl = svga->crtc[9] & 0x80; + svga->char_width = (svga->seqregs[1] & 1) ? 8 : 9; if (enable_overscan) { - overscan_y = (svga->rowcount + 1) << 1; + overscan_y = (svga->rowcount + 1) << 1; - if (overscan_y < 16) - overscan_y = 16; + if (overscan_y < 16) + overscan_y = 16; } if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { - overscan_x = (svga->seqregs[1] & 1) ? 16 : 18; + overscan_x = (svga->seqregs[1] & 1) ? 16 : 18; - if (svga->seqregs[1] & 8) - overscan_x <<= 1; + if (svga->seqregs[1] & 8) + overscan_x <<= 1; } else - overscan_x = 16; + overscan_x = 16; if (vga_on) { if (svga->recalctimings_ex) { @@ -568,96 +560,94 @@ svga_recalctimings(svga_t *svga) svga->x_add = (overscan_x >> 1); if (svga->vblankstart < svga->dispend) - svga->dispend = svga->vblankstart; + svga->dispend = svga->vblankstart; crtcconst = svga->clock * svga->char_width; - disptime = svga->htotal; + disptime = svga->htotal; _dispontime = svga->hdisp_time; if (svga->seqregs[1] & 8) { - disptime *= 2; - _dispontime *= 2; + disptime *= 2; + _dispontime *= 2; } _dispofftime = disptime - _dispontime; _dispontime *= crtcconst; _dispofftime *= crtcconst; - svga->dispontime = (uint64_t)(_dispontime); - svga->dispofftime = (uint64_t)(_dispofftime); + svga->dispontime = (uint64_t) (_dispontime); + svga->dispofftime = (uint64_t) (_dispofftime); if (svga->dispontime < TIMER_USEC) - svga->dispontime = TIMER_USEC; + svga->dispontime = TIMER_USEC; if (svga->dispofftime < TIMER_USEC) - svga->dispofftime = TIMER_USEC; + svga->dispofftime = TIMER_USEC; - if (!svga->force_old_addr) - svga_recalc_remap_func(svga); + if (!svga->force_old_addr) + svga_recalc_remap_func(svga); /* Inform the user interface of any DPMS mode changes. */ if (svga->dpms) { - if (!svga->dpms_ui) { - svga->dpms_ui = 1; - ui_sb_set_text_w(plat_get_string(IDS_2142)); - } + if (!svga->dpms_ui) { + svga->dpms_ui = 1; + ui_sb_set_text_w(plat_get_string(IDS_2142)); + } } else if (svga->dpms_ui) { - svga->dpms_ui = 0; - ui_sb_set_text_w(NULL); + svga->dpms_ui = 0; + ui_sb_set_text_w(NULL); } } - static void svga_do_render(svga_t *svga) { /* Always render a blank screen and nothing else while in DPMS mode. */ if (svga->dpms) { - svga_render_blank(svga); - return; + svga_render_blank(svga); + return; } if (!svga->override) { - svga->render(svga); + svga->render(svga); - svga->x_add = (overscan_x >> 1); - svga_render_overscan_left(svga); - svga_render_overscan_right(svga); - svga->x_add = (overscan_x >> 1) - svga->scrollcache; + svga->x_add = (overscan_x >> 1); + svga_render_overscan_left(svga); + svga_render_overscan_right(svga); + svga->x_add = (overscan_x >> 1) - svga->scrollcache; } if (svga->overlay_on) { - if (!svga->override && svga->overlay_draw) - svga->overlay_draw(svga, svga->displine + svga->y_add); - svga->overlay_on--; - if (svga->overlay_on && svga->interlace) - svga->overlay_on--; + if (!svga->override && svga->overlay_draw) + svga->overlay_draw(svga, svga->displine + svga->y_add); + svga->overlay_on--; + if (svga->overlay_on && svga->interlace) + svga->overlay_on--; } if (svga->dac_hwcursor_on) { - if (!svga->override && svga->dac_hwcursor_draw) - svga->dac_hwcursor_draw(svga, svga->displine + svga->y_add); - svga->dac_hwcursor_on--; - if (svga->dac_hwcursor_on && svga->interlace) - svga->dac_hwcursor_on--; + if (!svga->override && svga->dac_hwcursor_draw) + svga->dac_hwcursor_draw(svga, svga->displine + svga->y_add); + svga->dac_hwcursor_on--; + if (svga->dac_hwcursor_on && svga->interlace) + svga->dac_hwcursor_on--; } if (svga->hwcursor_on) { - if (!svga->override && svga->hwcursor_draw) - svga->hwcursor_draw(svga, svga->displine + svga->y_add); - svga->hwcursor_on--; - if (svga->hwcursor_on && svga->interlace) - svga->hwcursor_on--; + if (!svga->override && svga->hwcursor_draw) + svga->hwcursor_draw(svga, svga->displine + svga->y_add); + svga->hwcursor_on--; + if (svga->hwcursor_on && svga->interlace) + svga->hwcursor_on--; } } - void svga_poll(void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; uint32_t x, blink_delay; - int wx, wy; - int ret, old_ma; + int wx, wy; + int ret, old_ma; if (!vga_on && ibm8514_enabled && ibm8514_on) { ibm8514_poll(&svga->dev8514, svga); @@ -668,328 +658,323 @@ svga_poll(void *p) } if (!svga->linepos) { - if (svga->displine == svga->hwcursor_latch.y && svga->hwcursor_latch.ena) { - svga->hwcursor_on = svga->hwcursor.cur_ysize - svga->hwcursor_latch.yoff; - svga->hwcursor_oddeven = 0; - } + if (svga->displine == svga->hwcursor_latch.y && svga->hwcursor_latch.ena) { + svga->hwcursor_on = svga->hwcursor.cur_ysize - svga->hwcursor_latch.yoff; + svga->hwcursor_oddeven = 0; + } - if (svga->displine == (svga->hwcursor_latch.y + 1) && svga->hwcursor_latch.ena && - svga->interlace) { - svga->hwcursor_on = svga->hwcursor.cur_ysize - (svga->hwcursor_latch.yoff + 1); - svga->hwcursor_oddeven = 1; - } + if (svga->displine == (svga->hwcursor_latch.y + 1) && svga->hwcursor_latch.ena && svga->interlace) { + svga->hwcursor_on = svga->hwcursor.cur_ysize - (svga->hwcursor_latch.yoff + 1); + svga->hwcursor_oddeven = 1; + } - if (svga->displine == svga->dac_hwcursor_latch.y && svga->dac_hwcursor_latch.ena) { - svga->dac_hwcursor_on = svga->dac_hwcursor.cur_ysize - svga->dac_hwcursor_latch.yoff; - svga->dac_hwcursor_oddeven = 0; - } + if (svga->displine == svga->dac_hwcursor_latch.y && svga->dac_hwcursor_latch.ena) { + svga->dac_hwcursor_on = svga->dac_hwcursor.cur_ysize - svga->dac_hwcursor_latch.yoff; + svga->dac_hwcursor_oddeven = 0; + } - if (svga->displine == (svga->dac_hwcursor_latch.y + 1) && svga->dac_hwcursor_latch.ena && - svga->interlace) { - svga->dac_hwcursor_on = svga->dac_hwcursor.cur_ysize - (svga->dac_hwcursor_latch.yoff + 1); - svga->dac_hwcursor_oddeven = 1; - } + if (svga->displine == (svga->dac_hwcursor_latch.y + 1) && svga->dac_hwcursor_latch.ena && svga->interlace) { + svga->dac_hwcursor_on = svga->dac_hwcursor.cur_ysize - (svga->dac_hwcursor_latch.yoff + 1); + svga->dac_hwcursor_oddeven = 1; + } - if (svga->displine == svga->overlay_latch.y && svga->overlay_latch.ena) { - svga->overlay_on = svga->overlay_latch.cur_ysize - svga->overlay_latch.yoff; - svga->overlay_oddeven = 0; - } + if (svga->displine == svga->overlay_latch.y && svga->overlay_latch.ena) { + svga->overlay_on = svga->overlay_latch.cur_ysize - svga->overlay_latch.yoff; + svga->overlay_oddeven = 0; + } - if (svga->displine == svga->overlay_latch.y+1 && svga->overlay_latch.ena && svga->interlace) { - svga->overlay_on = svga->overlay_latch.cur_ysize - svga->overlay_latch.yoff; - svga->overlay_oddeven = 1; - } + if (svga->displine == svga->overlay_latch.y + 1 && svga->overlay_latch.ena && svga->interlace) { + svga->overlay_on = svga->overlay_latch.cur_ysize - svga->overlay_latch.yoff; + svga->overlay_oddeven = 1; + } - timer_advance_u64(&svga->timer, svga->dispofftime); - svga->cgastat |= 1; - svga->linepos = 1; + timer_advance_u64(&svga->timer, svga->dispofftime); + svga->cgastat |= 1; + svga->linepos = 1; - if (svga->dispon) { - svga->hdisp_on = 1; + if (svga->dispon) { + svga->hdisp_on = 1; - svga->ma &= svga->vram_display_mask; - if (svga->firstline == 2000) { - svga->firstline = svga->displine; - video_wait_for_buffer(); - } + svga->ma &= svga->vram_display_mask; + if (svga->firstline == 2000) { + svga->firstline = svga->displine; + video_wait_for_buffer(); + } - if (svga->hwcursor_on || svga->dac_hwcursor_on || svga->overlay_on) { - svga->changedvram[svga->ma >> 12] = svga->changedvram[(svga->ma >> 12) + 1] = - svga->interlace ? 3 : 2; - } + if (svga->hwcursor_on || svga->dac_hwcursor_on || svga->overlay_on) { + svga->changedvram[svga->ma >> 12] = svga->changedvram[(svga->ma >> 12) + 1] = svga->interlace ? 3 : 2; + } - if (svga->vertical_linedbl) { - old_ma = svga->ma; + if (svga->vertical_linedbl) { + old_ma = svga->ma; - svga->displine <<= 1; - svga->y_add <<= 1; + svga->displine <<= 1; + svga->y_add <<= 1; - svga_do_render(svga); + svga_do_render(svga); - svga->displine++; + svga->displine++; - svga->ma = old_ma; + svga->ma = old_ma; - svga_do_render(svga); + svga_do_render(svga); - svga->y_add >>= 1; - svga->displine >>= 1; - } else - svga_do_render(svga); + svga->y_add >>= 1; + svga->displine >>= 1; + } else + svga_do_render(svga); - if (svga->lastline < svga->displine) - svga->lastline = svga->displine; - } + if (svga->lastline < svga->displine) + svga->lastline = svga->displine; + } - svga->displine++; - if (svga->interlace) - svga->displine++; - if ((svga->cgastat & 8) && ((svga->displine & 15) == (svga->crtc[0x11] & 15)) && svga->vslines) - svga->cgastat &= ~8; - svga->vslines++; - if (svga->displine > 1500) - svga->displine = 0; + svga->displine++; + if (svga->interlace) + svga->displine++; + if ((svga->cgastat & 8) && ((svga->displine & 15) == (svga->crtc[0x11] & 15)) && svga->vslines) + svga->cgastat &= ~8; + svga->vslines++; + if (svga->displine > 1500) + svga->displine = 0; } else { - timer_advance_u64(&svga->timer, svga->dispontime); + timer_advance_u64(&svga->timer, svga->dispontime); - if (svga->dispon) - svga->cgastat &= ~1; - svga->hdisp_on = 0; + if (svga->dispon) + svga->cgastat &= ~1; + svga->hdisp_on = 0; - svga->linepos = 0; - if ((svga->sc == (svga->crtc[11] & 31)) || (svga->sc == svga->rowcount)) - svga->con = 0; - if (svga->dispon) { - if (svga->linedbl && !svga->linecountff) { - svga->linecountff = 1; - svga->ma = svga->maback; - } else if (svga->sc == svga->rowcount) { - svga->linecountff = 0; - svga->sc = 0; + svga->linepos = 0; + if ((svga->sc == (svga->crtc[11] & 31)) || (svga->sc == svga->rowcount)) + svga->con = 0; + if (svga->dispon) { + if (svga->linedbl && !svga->linecountff) { + svga->linecountff = 1; + svga->ma = svga->maback; + } else if (svga->sc == svga->rowcount) { + svga->linecountff = 0; + svga->sc = 0; - svga->maback += (svga->rowoffset << 3); - if (svga->interlace) - svga->maback += (svga->rowoffset << 3); - svga->maback &= svga->vram_display_mask; - svga->ma = svga->maback; - } else { - svga->linecountff = 0; - svga->sc++; - svga->sc &= 31; - svga->ma = svga->maback; - } - } + svga->maback += (svga->rowoffset << 3); + if (svga->interlace) + svga->maback += (svga->rowoffset << 3); + svga->maback &= svga->vram_display_mask; + svga->ma = svga->maback; + } else { + svga->linecountff = 0; + svga->sc++; + svga->sc &= 31; + svga->ma = svga->maback; + } + } - svga->hsync_divisor = !svga->hsync_divisor; + svga->hsync_divisor = !svga->hsync_divisor; - if (svga->hsync_divisor && (svga->crtc[0x17] & 4)) - return; + if (svga->hsync_divisor && (svga->crtc[0x17] & 4)) + return; - svga->vc++; - svga->vc &= 2047; + svga->vc++; + svga->vc &= 2047; - if (svga->vc == svga->split) { - ret = 1; + if (svga->vc == svga->split) { + ret = 1; - if (svga->line_compare) - ret = svga->line_compare(svga); + if (svga->line_compare) + ret = svga->line_compare(svga); - if (ret) { - if (svga->interlace && svga->oddeven) - svga->ma = svga->maback = (svga->rowoffset << 1) + ((svga->crtc[5] & 0x60) >> 5); - else - svga->ma = svga->maback = ((svga->crtc[5] & 0x60) >> 5); - svga->ma = (svga->ma << 2); - svga->maback = (svga->maback << 2); + if (ret) { + if (svga->interlace && svga->oddeven) + svga->ma = svga->maback = (svga->rowoffset << 1) + ((svga->crtc[5] & 0x60) >> 5); + else + svga->ma = svga->maback = ((svga->crtc[5] & 0x60) >> 5); + svga->ma = (svga->ma << 2); + svga->maback = (svga->maback << 2); - svga->sc = 0; - if (svga->attrregs[0x10] & 0x20) { - svga->scrollcache = 0; - svga->x_add = (overscan_x >> 1); - } - } - } - if (svga->vc == svga->dispend) { - if (svga->vblank_start) - svga->vblank_start(svga); - svga->dispon = 0; - blink_delay = (svga->crtc[11] & 0x60) >> 5; - if (svga->crtc[10] & 0x20) - svga->cursoron = 0; - else if (blink_delay == 2) - svga->cursoron = ((svga->blink % 96) >= 48); - else - svga->cursoron = svga->blink & (16 + (16 * blink_delay)); + svga->sc = 0; + if (svga->attrregs[0x10] & 0x20) { + svga->scrollcache = 0; + svga->x_add = (overscan_x >> 1); + } + } + } + if (svga->vc == svga->dispend) { + if (svga->vblank_start) + svga->vblank_start(svga); + svga->dispon = 0; + blink_delay = (svga->crtc[11] & 0x60) >> 5; + if (svga->crtc[10] & 0x20) + svga->cursoron = 0; + else if (blink_delay == 2) + svga->cursoron = ((svga->blink % 96) >= 48); + else + svga->cursoron = svga->blink & (16 + (16 * blink_delay)); - if (!(svga->gdcreg[6] & 1) && !(svga->blink & 15)) - svga->fullchange = 2; - svga->blink = (svga->blink + 1) & 0x7f; + if (!(svga->gdcreg[6] & 1) && !(svga->blink & 15)) + svga->fullchange = 2; + svga->blink = (svga->blink + 1) & 0x7f; - for (x = 0; x < ((svga->vram_mask + 1) >> 12); x++) { - if (svga->changedvram[x]) - svga->changedvram[x]--; - } - if (svga->fullchange) - svga->fullchange--; - } - if (svga->vc == svga->vsyncstart) { - svga->dispon = 0; - svga->cgastat |= 8; - x = svga->hdisp; + for (x = 0; x < ((svga->vram_mask + 1) >> 12); x++) { + if (svga->changedvram[x]) + svga->changedvram[x]--; + } + if (svga->fullchange) + svga->fullchange--; + } + if (svga->vc == svga->vsyncstart) { + svga->dispon = 0; + svga->cgastat |= 8; + x = svga->hdisp; - if (svga->interlace && !svga->oddeven) - svga->lastline++; - if (svga->interlace && svga->oddeven) - svga->firstline--; + if (svga->interlace && !svga->oddeven) + svga->lastline++; + if (svga->interlace && svga->oddeven) + svga->firstline--; - wx = x; + wx = x; - if (!svga->override) { - if (svga->vertical_linedbl) { - wy = (svga->lastline - svga->firstline) << 1; - svga_doblit(wx, wy, svga); - } else { - wy = svga->lastline - svga->firstline; - svga_doblit(wx, wy, svga); - } - } + if (!svga->override) { + if (svga->vertical_linedbl) { + wy = (svga->lastline - svga->firstline) << 1; + svga_doblit(wx, wy, svga); + } else { + wy = svga->lastline - svga->firstline; + svga_doblit(wx, wy, svga); + } + } - svga->firstline = 2000; - svga->lastline = 0; + svga->firstline = 2000; + svga->lastline = 0; - svga->firstline_draw = 2000; - svga->lastline_draw = 0; + svga->firstline_draw = 2000; + svga->lastline_draw = 0; - svga->oddeven ^= 1; + svga->oddeven ^= 1; - changeframecount = svga->interlace ? 3 : 2; - svga->vslines = 0; + changeframecount = svga->interlace ? 3 : 2; + svga->vslines = 0; - if (svga->interlace && svga->oddeven) - svga->ma = svga->maback = svga->ma_latch + (svga->rowoffset << 1) + ((svga->crtc[5] & 0x60) >> 5); - else - svga->ma = svga->maback = svga->ma_latch + ((svga->crtc[5] & 0x60) >> 5); - svga->ca = ((svga->crtc[0xe] << 8) | svga->crtc[0xf]) + ((svga->crtc[0xb] & 0x60) >> 5) + svga->ca_adj; + if (svga->interlace && svga->oddeven) + svga->ma = svga->maback = svga->ma_latch + (svga->rowoffset << 1) + ((svga->crtc[5] & 0x60) >> 5); + else + svga->ma = svga->maback = svga->ma_latch + ((svga->crtc[5] & 0x60) >> 5); + svga->ca = ((svga->crtc[0xe] << 8) | svga->crtc[0xf]) + ((svga->crtc[0xb] & 0x60) >> 5) + svga->ca_adj; - svga->ma = (svga->ma << 2); - svga->maback = (svga->maback << 2); - svga->ca = (svga->ca << 2); + svga->ma = (svga->ma << 2); + svga->maback = (svga->maback << 2); + svga->ca = (svga->ca << 2); - if (svga->vsync_callback) - svga->vsync_callback(svga); - } - if (svga->vc == svga->vtotal) { - svga->vc = 0; - svga->sc = 0; - svga->dispon = 1; - svga->displine = (svga->interlace && svga->oddeven) ? 1 : 0; + if (svga->vsync_callback) + svga->vsync_callback(svga); + } + if (svga->vc == svga->vtotal) { + svga->vc = 0; + svga->sc = 0; + svga->dispon = 1; + svga->displine = (svga->interlace && svga->oddeven) ? 1 : 0; - svga->scrollcache = (svga->attrregs[0x13] & 0x0f); - if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /*Text mode*/ - if (svga->seqregs[1] & 1) - svga->scrollcache &= 0x07; - else { - svga->scrollcache++; - if (svga->scrollcache > 8) - svga->scrollcache = 0; - } - } else if ((svga->render == svga_render_2bpp_lowres) || (svga->render == svga_render_2bpp_highres) || - (svga->render == svga_render_4bpp_lowres) || (svga->render == svga_render_4bpp_highres)) - svga->scrollcache &= 0x07; - else - svga->scrollcache = (svga->scrollcache & 0x06) >> 1; + svga->scrollcache = (svga->attrregs[0x13] & 0x0f); + if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /*Text mode*/ + if (svga->seqregs[1] & 1) + svga->scrollcache &= 0x07; + else { + svga->scrollcache++; + if (svga->scrollcache > 8) + svga->scrollcache = 0; + } + } else if ((svga->render == svga_render_2bpp_lowres) || (svga->render == svga_render_2bpp_highres) || (svga->render == svga_render_4bpp_lowres) || (svga->render == svga_render_4bpp_highres)) + svga->scrollcache &= 0x07; + else + svga->scrollcache = (svga->scrollcache & 0x06) >> 1; - if ((svga->seqregs[1] & 8) || (svga->render == svga_render_8bpp_lowres)) - svga->scrollcache <<= 1; + if ((svga->seqregs[1] & 8) || (svga->render == svga_render_8bpp_lowres)) + svga->scrollcache <<= 1; - svga->x_add = (overscan_x >> 1) - svga->scrollcache; + svga->x_add = (overscan_x >> 1) - svga->scrollcache; - svga->linecountff = 0; + svga->linecountff = 0; - svga->hwcursor_on = 0; - svga->hwcursor_latch = svga->hwcursor; + svga->hwcursor_on = 0; + svga->hwcursor_latch = svga->hwcursor; - svga->dac_hwcursor_on = 0; - svga->dac_hwcursor_latch = svga->dac_hwcursor; + svga->dac_hwcursor_on = 0; + svga->dac_hwcursor_latch = svga->dac_hwcursor; - svga->overlay_on = 0; - svga->overlay_latch = svga->overlay; - } - if (svga->sc == (svga->crtc[10] & 31)) - svga->con = 1; + svga->overlay_on = 0; + svga->overlay_latch = svga->overlay; + } + if (svga->sc == (svga->crtc[10] & 31)) + svga->con = 1; } } - int svga_init(const device_t *info, svga_t *svga, void *p, int memsize, - void (*recalctimings_ex)(struct svga_t *svga), - uint8_t (*video_in) (uint16_t addr, void *p), - void (*video_out)(uint16_t addr, uint8_t val, void *p), - void (*hwcursor_draw)(struct svga_t *svga, int displine), - void (*overlay_draw)(struct svga_t *svga, int displine)) + void (*recalctimings_ex)(struct svga_t *svga), + uint8_t (*video_in)(uint16_t addr, void *p), + void (*video_out)(uint16_t addr, uint8_t val, void *p), + void (*hwcursor_draw)(struct svga_t *svga, int displine), + void (*overlay_draw)(struct svga_t *svga, int displine)) { int c, d, e; svga->p = p; for (c = 0; c < 256; c++) { - e = c; - for (d = 0; d < 8; d++) { - svga_rotate[d][c] = e; - e = (e >> 1) | ((e & 1) ? 0x80 : 0); - } + e = c; + for (d = 0; d < 8; d++) { + svga_rotate[d][c] = e; + e = (e >> 1) | ((e & 1) ? 0x80 : 0); + } } svga->readmode = 0; svga->attrregs[0x11] = 0; svga->overscan_color = 0x000000; - overscan_x = 16; - overscan_y = 32; + overscan_x = 16; + overscan_y = 32; svga->x_add = 8; svga->y_add = 16; - svga->crtc[0] = 63; - svga->crtc[6] = 255; - svga->dispontime = 1000ull << 32; - svga->dispofftime = 1000ull << 32; - svga->bpp = 8; - svga->vram = calloc(memsize, 1); - svga->vram_max = memsize; + svga->crtc[0] = 63; + svga->crtc[6] = 255; + svga->dispontime = 1000ull << 32; + svga->dispofftime = 1000ull << 32; + svga->bpp = 8; + svga->vram = calloc(memsize, 1); + svga->vram_max = memsize; svga->vram_display_mask = svga->vram_mask = memsize - 1; - svga->decode_mask = 0x7fffff; - svga->changedvram = calloc(memsize >> 12, 1); - svga->recalctimings_ex = recalctimings_ex; - svga->video_in = video_in; - svga->video_out = video_out; - svga->hwcursor_draw = hwcursor_draw; - svga->overlay_draw = overlay_draw; + svga->decode_mask = 0x7fffff; + svga->changedvram = calloc(memsize >> 12, 1); + svga->recalctimings_ex = recalctimings_ex; + svga->video_in = video_in; + svga->video_out = video_out; + svga->hwcursor_draw = hwcursor_draw; + svga->overlay_draw = overlay_draw; svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = 32; svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = 32; - svga->translate_address = NULL; + svga->translate_address = NULL; svga->ksc5601_english_font_type = 0; vga_on = 1; if ((info->flags & DEVICE_PCI) || (info->flags & DEVICE_VLB) || (info->flags & DEVICE_MCA)) { - mem_mapping_add(&svga->mapping, 0xa0000, 0x20000, - svga_read, svga_readw, svga_readl, - svga_write, svga_writew, svga_writel, - NULL, MEM_MAPPING_EXTERNAL, svga); + mem_mapping_add(&svga->mapping, 0xa0000, 0x20000, + svga_read, svga_readw, svga_readl, + svga_write, svga_writew, svga_writel, + NULL, MEM_MAPPING_EXTERNAL, svga); } else if ((info->flags & DEVICE_ISA) && (info->flags & DEVICE_AT)) { - mem_mapping_add(&svga->mapping, 0xa0000, 0x20000, - svga_read, svga_readw, NULL, - svga_write, svga_writew, NULL, - NULL, MEM_MAPPING_EXTERNAL, svga); + mem_mapping_add(&svga->mapping, 0xa0000, 0x20000, + svga_read, svga_readw, NULL, + svga_write, svga_writew, NULL, + NULL, MEM_MAPPING_EXTERNAL, svga); } else { - mem_mapping_add(&svga->mapping, 0xa0000, 0x20000, - svga_read, NULL, NULL, - svga_write, NULL, NULL, - NULL, MEM_MAPPING_EXTERNAL, svga); + mem_mapping_add(&svga->mapping, 0xa0000, 0x20000, + svga_read, NULL, NULL, + svga_write, NULL, NULL, + NULL, MEM_MAPPING_EXTERNAL, svga); } timer_add(&svga->timer, svga_poll, svga, 1); @@ -1003,7 +988,6 @@ svga_init(const device_t *info, svga_t *svga, void *p, int memsize, return 0; } - void svga_close(svga_t *svga) { @@ -1011,12 +995,11 @@ svga_close(svga_t *svga) free(svga->vram); if (svga->dpms_ui) - ui_sb_set_text_w(NULL); + ui_sb_set_text_w(NULL); svga_pri = NULL; } - static uint32_t svga_decode_addr(svga_t *svga, uint32_t addr, int write) { @@ -1025,111 +1008,110 @@ svga_decode_addr(svga_t *svga, uint32_t addr, int write) addr &= 0x1ffff; switch (memory_map_mode) { - case 0: - break; - case 1: - if (addr >= 0x10000) - return 0xffffffff; - break; - case 2: - addr -= 0x10000; - if (addr >= 0x8000) - return 0xffffffff; - break; - default: - case 3: - addr -= 0x18000; - if (addr >= 0x8000) - return 0xffffffff; - break; + case 0: + break; + case 1: + if (addr >= 0x10000) + return 0xffffffff; + break; + case 2: + addr -= 0x10000; + if (addr >= 0x8000) + return 0xffffffff; + break; + default: + case 3: + addr -= 0x18000; + if (addr >= 0x8000) + return 0xffffffff; + break; } if (memory_map_mode <= 1) { - if (svga->adv_flags & FLAG_EXTRA_BANKS) - addr = (addr & 0x17fff) + svga->extra_banks[(addr >> 15) & 1]; - else { - if (write) - addr += svga->write_bank; - else - addr += svga->read_bank; - } + if (svga->adv_flags & FLAG_EXTRA_BANKS) + addr = (addr & 0x17fff) + svga->extra_banks[(addr >> 15) & 1]; + else { + if (write) + addr += svga->write_bank; + else + addr += svga->read_bank; + } } return addr; } - static __inline void svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; - int writemask2 = svga->writemask, reset_wm = 0; + int writemask2 = svga->writemask, reset_wm = 0; latch_t vall; uint8_t wm = svga->writemask; uint8_t count, i; if (svga->adv_flags & FLAG_ADDR_BY8) - writemask2 = svga->seqregs[2]; + writemask2 = svga->seqregs[2]; cycles -= video_timing_write_b; if (!linear) { - if (xga_enabled) { - if (((svga->xga.op_mode & 7) >= 4) && (svga->xga.aperture_cntl == 1)) { - if (val == 0xa5) { /*Memory size test of XGA*/ - svga->xga.test = val; - svga->xga.a5_test = 1; - return; - } else if (val == 0x5a) { - svga->xga.test = val; - return; - } else if (val == 0x12 || val == 0x34) { - addr += svga->xga.write_bank; - svga->xga.vram[addr & svga->xga.vram_mask] = val; - svga->xga.linear_endian_reverse = 1; - return; - } - } else - svga->xga.on = 0; - } - addr = svga_decode_addr(svga, addr, 1); + if (xga_enabled) { + if (((svga->xga.op_mode & 7) >= 4) && (svga->xga.aperture_cntl == 1)) { + if (val == 0xa5) { /*Memory size test of XGA*/ + svga->xga.test = val; + svga->xga.a5_test = 1; + return; + } else if (val == 0x5a) { + svga->xga.test = val; + return; + } else if (val == 0x12 || val == 0x34) { + addr += svga->xga.write_bank; + svga->xga.vram[addr & svga->xga.vram_mask] = val; + svga->xga.linear_endian_reverse = 1; + return; + } + } else + svga->xga.on = 0; + } + addr = svga_decode_addr(svga, addr, 1); - if (addr == 0xffffffff) - return; + if (addr == 0xffffffff) + return; } if (!(svga->gdcreg[6] & 1)) - svga->fullchange = 2; + svga->fullchange = 2; - if ((svga->adv_flags & FLAG_ADDR_BY16) && (svga->writemode == 4 || svga->writemode == 5)) - addr <<= 4; + if ((svga->adv_flags & FLAG_ADDR_BY16) && (svga->writemode == 4 || svga->writemode == 5)) + addr <<= 4; else if ((svga->adv_flags & FLAG_ADDR_BY8) && (svga->writemode < 4)) - addr <<= 3; + addr <<= 3; else if (((svga->chain4 && (svga->packed_chain4 || svga->force_old_addr)) || svga->fb_only) && (svga->writemode < 4)) { - writemask2 = 1 << (addr & 3); - addr &= ~3; - } else if (svga->chain4 && (svga->writemode < 4)) { - writemask2 = 1 << (addr & 3); - if (!linear) - addr &= ~3; - addr = ((addr & 0xfffc) << 2) | ((addr & 0x30000) >> 14) | (addr & ~0x3ffff); + writemask2 = 1 << (addr & 3); + addr &= ~3; + } else if (svga->chain4 && (svga->writemode < 4)) { + writemask2 = 1 << (addr & 3); + if (!linear) + addr &= ~3; + addr = ((addr & 0xfffc) << 2) | ((addr & 0x30000) >> 14) | (addr & ~0x3ffff); } else if (svga->chain2_write) { - writemask2 &= ~0xa; - if (addr & 1) - writemask2 <<= 1; - addr &= ~1; - addr <<= 2; + writemask2 &= ~0xa; + if (addr & 1) + writemask2 <<= 1; + addr &= ~1; + addr <<= 2; } else - addr <<= 2; + addr <<= 2; addr &= svga->decode_mask; if (svga->translate_address) - addr = svga->translate_address(addr, p); + addr = svga->translate_address(addr, p); if (addr >= svga->vram_max) - return; + return; addr &= svga->vram_mask; @@ -1137,611 +1119,590 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p) count = 4; if (svga->adv_flags & FLAG_LATCH8) - count = 8; + count = 8; /* Undocumented Cirrus Logic behavior: The datasheet says that, with EXT_WRITE and FLAG_ADDR_BY8, the write mask only changes meaning in write modes 4 and 5, as well as write mode 1. In reality, however, all other write modes are also affected, as proven by the Windows 3.1 CL-GD 5422/4 drivers in 8bpp modes. */ switch (svga->writemode) { - case 0: - val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7)))); - if ((svga->gdcreg[8] == 0xff) && !(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) { - for (i = 0; i < count; i++) { - if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) { - if (writemask2 & (0x80 >> i)) - svga->vram[addr | i] = val; - } else { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = val; - } - } - return; - } else { - for (i = 0; i < count; i++) { - if (svga->gdcreg[1] & (1 << i)) - vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff; - else - vall.b[i] = val; - } - } - break; - case 1: - for (i = 0; i < count; i++) { - if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) { - if (writemask2 & (0x80 >> i)) - svga->vram[addr | i] = svga->latch.b[i]; - } else { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = svga->latch.b[i]; - } - } - return; - case 2: - for (i = 0; i < count; i++) - vall.b[i] = !!(val & (1 << i)) * 0xff; + case 0: + val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7)))); + if ((svga->gdcreg[8] == 0xff) && !(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) { + for (i = 0; i < count; i++) { + if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) { + if (writemask2 & (0x80 >> i)) + svga->vram[addr | i] = val; + } else { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = val; + } + } + return; + } else { + for (i = 0; i < count; i++) { + if (svga->gdcreg[1] & (1 << i)) + vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff; + else + vall.b[i] = val; + } + } + break; + case 1: + for (i = 0; i < count; i++) { + if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) { + if (writemask2 & (0x80 >> i)) + svga->vram[addr | i] = svga->latch.b[i]; + } else { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = svga->latch.b[i]; + } + } + return; + case 2: + for (i = 0; i < count; i++) + vall.b[i] = !!(val & (1 << i)) * 0xff; - if (!(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) { - for (i = 0; i < count; i++) { - if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) { - if (writemask2 & (0x80 >> i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); - } else { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); - } - } - return; - } - break; - case 3: - val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7)))); - wm = svga->gdcreg[8]; - svga->gdcreg[8] &= val; + if (!(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) { + for (i = 0; i < count; i++) { + if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) { + if (writemask2 & (0x80 >> i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); + } else { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); + } + } + return; + } + break; + case 3: + val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7)))); + wm = svga->gdcreg[8]; + svga->gdcreg[8] &= val; - for (i = 0; i < count; i++) - vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff; + for (i = 0; i < count; i++) + vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff; - reset_wm = 1; - break; - default: - if (svga->ven_write) - svga->ven_write(svga, val, addr); - return; + reset_wm = 1; + break; + default: + if (svga->ven_write) + svga->ven_write(svga, val, addr); + return; } switch (svga->gdcreg[3] & 0x18) { - case 0x00: /* Set */ - for (i = 0; i < count; i++) { - if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) { - if (writemask2 & (0x80 >> i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); - } else { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); - } - } - break; - case 0x08: /* AND */ - for (i = 0; i < count; i++) { - if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) { - if (writemask2 & (0x80 >> i)) - svga->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i]; - } else { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i]; - } - } - break; - case 0x10: /* OR */ - for (i = 0; i < count; i++) { - if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) { - if (writemask2 & (0x80 >> i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i]; - } else { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i]; - } - } - break; - case 0x18: /* XOR */ - for (i = 0; i < count; i++) { - if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) { - if (writemask2 & (0x80 >> i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i]; - } else { - if (writemask2 & (1 << i)) - svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i]; - } - } - break; + case 0x00: /* Set */ + for (i = 0; i < count; i++) { + if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) { + if (writemask2 & (0x80 >> i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); + } else { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]); + } + } + break; + case 0x08: /* AND */ + for (i = 0; i < count; i++) { + if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) { + if (writemask2 & (0x80 >> i)) + svga->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i]; + } else { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i]; + } + } + break; + case 0x10: /* OR */ + for (i = 0; i < count; i++) { + if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) { + if (writemask2 & (0x80 >> i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i]; + } else { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i]; + } + } + break; + case 0x18: /* XOR */ + for (i = 0; i < count; i++) { + if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) { + if (writemask2 & (0x80 >> i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i]; + } else { + if (writemask2 & (1 << i)) + svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i]; + } + } + break; } if (reset_wm) - svga->gdcreg[8] = wm; + svga->gdcreg[8] = wm; } - static __inline uint8_t svga_read_common(uint32_t addr, uint8_t linear, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; uint32_t latch_addr = 0; - int readplane = svga->readplane; - uint8_t count, i; - uint8_t plane, pixel; - uint8_t temp, ret; + int readplane = svga->readplane; + uint8_t count, i; + uint8_t plane, pixel; + uint8_t temp, ret; if (svga->adv_flags & FLAG_ADDR_BY8) - readplane = svga->gdcreg[4] & 7; + readplane = svga->gdcreg[4] & 7; cycles -= video_timing_read_b; if (!linear) { - if (xga_enabled) { - if (((svga->xga.op_mode & 7) >= 4) && (svga->xga.aperture_cntl == 1)) { - if (svga->xga.test == 0xa5) { /*Memory size test of XGA*/ - svga->xga.on = 1; - return svga->xga.test; - } else if (svga->xga.test == 0x5a) { - svga->xga.on = 1; - return svga->xga.test; - } else if (addr == 0xa0000 || addr == 0xa0010) { - addr += svga->xga.read_bank; - return svga->xga.vram[addr & svga->xga.vram_mask]; - } - } else - svga->xga.on = 0; - } - addr = svga_decode_addr(svga, addr, 0); + if (xga_enabled) { + if (((svga->xga.op_mode & 7) >= 4) && (svga->xga.aperture_cntl == 1)) { + if (svga->xga.test == 0xa5) { /*Memory size test of XGA*/ + svga->xga.on = 1; + return svga->xga.test; + } else if (svga->xga.test == 0x5a) { + svga->xga.on = 1; + return svga->xga.test; + } else if (addr == 0xa0000 || addr == 0xa0010) { + addr += svga->xga.read_bank; + return svga->xga.vram[addr & svga->xga.vram_mask]; + } + } else + svga->xga.on = 0; + } + addr = svga_decode_addr(svga, addr, 0); - if (addr == 0xffffffff) - return 0xff; + if (addr == 0xffffffff) + return 0xff; } count = 2; if (svga->adv_flags & FLAG_LATCH8) - count = 3; + count = 3; latch_addr = (addr << count) & svga->decode_mask; - count = (1 << count); + count = (1 << count); - if (svga->adv_flags & FLAG_ADDR_BY16) - addr <<= 4; + if (svga->adv_flags & FLAG_ADDR_BY16) + addr <<= 4; else if (svga->adv_flags & FLAG_ADDR_BY8) - addr <<= 3; + addr <<= 3; else if ((svga->chain4 && (svga->packed_chain4 || svga->force_old_addr)) || svga->fb_only) { - addr &= svga->decode_mask; - if (svga->translate_address) - addr = svga->translate_address(addr, p); - if (addr >= svga->vram_max) - return 0xff; - latch_addr = (addr & svga->vram_mask) & ~3; - for (i = 0; i < count; i++) - svga->latch.b[i] = svga->vram[latch_addr | i]; - return svga->vram[addr & svga->vram_mask]; - } else if (svga->chain4 && !svga->force_old_addr) { - readplane = addr & 3; - addr = ((addr & 0xfffc) << 2) | ((addr & 0x30000) >> 14) | (addr & ~0x3ffff); + addr &= svga->decode_mask; + if (svga->translate_address) + addr = svga->translate_address(addr, p); + if (addr >= svga->vram_max) + return 0xff; + latch_addr = (addr & svga->vram_mask) & ~3; + for (i = 0; i < count; i++) + svga->latch.b[i] = svga->vram[latch_addr | i]; + return svga->vram[addr & svga->vram_mask]; + } else if (svga->chain4 && !svga->force_old_addr) { + readplane = addr & 3; + addr = ((addr & 0xfffc) << 2) | ((addr & 0x30000) >> 14) | (addr & ~0x3ffff); } else if (svga->chain2_read) { - readplane = (readplane & 2) | (addr & 1); - addr &= ~1; - addr <<= 2; + readplane = (readplane & 2) | (addr & 1); + addr &= ~1; + addr <<= 2; } else - addr <<= 2; + addr <<= 2; addr &= svga->decode_mask; if (svga->translate_address) { - latch_addr = svga->translate_address(latch_addr, p); - addr = svga->translate_address(addr, p); + latch_addr = svga->translate_address(latch_addr, p); + addr = svga->translate_address(addr, p); } /* standard VGA latched access */ if (latch_addr >= svga->vram_max) { - for (i = 0; i < count; i++) - svga->latch.b[i] = 0xff; + for (i = 0; i < count; i++) + svga->latch.b[i] = 0xff; } else { - latch_addr &= svga->vram_mask; + latch_addr &= svga->vram_mask; - for (i = 0; i < count; i++) - svga->latch.b[i] = svga->vram[latch_addr | i]; + for (i = 0; i < count; i++) + svga->latch.b[i] = svga->vram[latch_addr | i]; } if (addr >= svga->vram_max) - return 0xff; + return 0xff; addr &= svga->vram_mask; if (svga->readmode) { - temp = 0xff; + temp = 0xff; - for (pixel = 0; pixel < 8; pixel++) { - for (plane = 0; plane < count; plane++) { - if (svga->colournocare & (1 << plane)) { - /* If we care about a plane, and the pixel has a mismatch on it, clear its bit. */ - if (((svga->latch.b[plane] >> pixel) & 1) != ((svga->colourcompare >> plane) & 1)) - temp &= ~(1 << pixel); - } - } - } + for (pixel = 0; pixel < 8; pixel++) { + for (plane = 0; plane < count; plane++) { + if (svga->colournocare & (1 << plane)) { + /* If we care about a plane, and the pixel has a mismatch on it, clear its bit. */ + if (((svga->latch.b[plane] >> pixel) & 1) != ((svga->colourcompare >> plane) & 1)) + temp &= ~(1 << pixel); + } + } + } - ret = temp; + ret = temp; } else - ret = svga->vram[addr | readplane]; + ret = svga->vram[addr | readplane]; return ret; } - void svga_write(uint32_t addr, uint8_t val, void *p) { svga_write_common(addr, val, 0, p); } - void svga_write_linear(uint32_t addr, uint8_t val, void *p) { svga_write_common(addr, val, 1, p); } - uint8_t svga_read(uint32_t addr, void *p) { return svga_read_common(addr, 0, p); } - uint8_t svga_read_linear(uint32_t addr, void *p) { return svga_read_common(addr, 1, p); } - void svga_doblit(int wx, int wy, svga_t *svga) { - int y_add, x_add, y_start, x_start, bottom; + int y_add, x_add, y_start, x_start, bottom; uint32_t *p; - int i, j; - int xs_temp, ys_temp; + int i, j; + int xs_temp, ys_temp; - y_add = (enable_overscan) ? overscan_y : 0; - x_add = (enable_overscan) ? overscan_x : 0; + y_add = (enable_overscan) ? overscan_y : 0; + x_add = (enable_overscan) ? overscan_x : 0; y_start = (enable_overscan) ? 0 : (overscan_y >> 1); x_start = (enable_overscan) ? 0 : (overscan_x >> 1); - bottom = (overscan_y >> 1) + (svga->crtc[8] & 0x1f); + bottom = (overscan_y >> 1) + (svga->crtc[8] & 0x1f); if (svga->vertical_linedbl) { - y_add <<= 1; - y_start <<= 1; - bottom <<= 1; + y_add <<= 1; + y_start <<= 1; + bottom <<= 1; } if ((wx <= 0) || (wy <= 0)) - return; + return; if (svga->vertical_linedbl) - svga->y_add <<= 1; + svga->y_add <<= 1; xs_temp = wx; ys_temp = wy + 1; if (svga->vertical_linedbl) - ys_temp++; + ys_temp++; if (xs_temp < 64) - xs_temp = 640; + xs_temp = 640; if (ys_temp < 32) - ys_temp = 200; + ys_temp = 200; if ((svga->crtc[0x17] & 0x80) && ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get())) { - /* Screen res has changed.. fix up, and let them know. */ - xsize = xs_temp; - ysize = ys_temp; + /* Screen res has changed.. fix up, and let them know. */ + xsize = xs_temp; + ysize = ys_temp; - if ((xsize > 1984) || (ysize > 2016)) { - /* 2048x2048 is the biggest safe render texture, to account for overscan, - we suppress overscan starting from x 1984 and y 2016. */ - x_add = 0; - y_add = 0; - suppress_overscan = 1; - } else - suppress_overscan = 0; + if ((xsize > 1984) || (ysize > 2016)) { + /* 2048x2048 is the biggest safe render texture, to account for overscan, + we suppress overscan starting from x 1984 and y 2016. */ + x_add = 0; + y_add = 0; + suppress_overscan = 1; + } else + suppress_overscan = 0; - /* Block resolution changes while in DPMS mode to avoid getting a bogus - screen width (320). We're already rendering a blank screen anyway. */ - if (!svga->dpms) - set_screen_size(xsize + x_add, ysize + y_add); + /* Block resolution changes while in DPMS mode to avoid getting a bogus + screen width (320). We're already rendering a blank screen anyway. */ + if (!svga->dpms) + set_screen_size(xsize + x_add, ysize + y_add); - if (video_force_resize_get()) - video_force_resize_set(0); + if (video_force_resize_get()) + video_force_resize_set(0); } if ((wx >= 160) && ((wy + 1) >= 120)) { - /* Draw (overscan_size - scroll size) lines of overscan on top and bottom. */ - for (i = 0; i < svga->y_add; i++) { - p = &buffer32->line[i & 0x7ff][0]; + /* Draw (overscan_size - scroll size) lines of overscan on top and bottom. */ + for (i = 0; i < svga->y_add; i++) { + p = &buffer32->line[i & 0x7ff][0]; - for (j = 0; j < (xsize + x_add); j++) - p[j] = svga->overscan_color; - } + for (j = 0; j < (xsize + x_add); j++) + p[j] = svga->overscan_color; + } - for (i = 0; i < bottom; i++) { - p = &buffer32->line[(ysize + svga->y_add + i) & 0x7ff][0]; + for (i = 0; i < bottom; i++) { + p = &buffer32->line[(ysize + svga->y_add + i) & 0x7ff][0]; - for (j = 0; j < (xsize + x_add); j++) - p[j] = svga->overscan_color; - } + for (j = 0; j < (xsize + x_add); j++) + p[j] = svga->overscan_color; + } } video_blit_memtoscreen(x_start, y_start, xsize + x_add, ysize + y_add); if (svga->vertical_linedbl) - svga->vertical_linedbl >>= 1; + svga->vertical_linedbl >>= 1; } - void svga_writeb_linear(uint32_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; if (!svga->fast) { - svga_write_linear(addr, val, p); - return; + svga_write_linear(addr, val, p); + return; } addr &= svga->decode_mask; if (addr >= svga->vram_max) - return; + return; addr &= svga->vram_mask; - svga->changedvram[addr >> 12] = changeframecount; - *(uint8_t *)&svga->vram[addr] = val; + svga->changedvram[addr >> 12] = changeframecount; + *(uint8_t *) &svga->vram[addr] = val; } - void svga_writew_common(uint32_t addr, uint16_t val, uint8_t linear, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; if (!svga->fast) { - svga_write_common(addr, val, linear, p); - svga_write_common(addr + 1, val >> 8, linear, p); - return; + svga_write_common(addr, val, linear, p); + svga_write_common(addr + 1, val >> 8, linear, p); + return; } cycles -= video_timing_write_w; if (!linear) { - addr = svga_decode_addr(svga, addr, 1); + addr = svga_decode_addr(svga, addr, 1); - if (addr == 0xffffffff) - return; + if (addr == 0xffffffff) + return; } addr &= svga->decode_mask; - if(svga->translate_address) { - uint32_t addr2 = svga->translate_address(addr, p); - if (addr2 < svga->vram_max) { - svga->vram[addr2 & svga->vram_mask] = val & 0xff; - svga->changedvram[addr2 >> 12] = changeframecount; - } - addr2 = svga->translate_address(addr+1, p); - if (addr2 < svga->vram_max) { - svga->vram[addr2 & svga->vram_mask] = (val >> 8) & 0xff; - svga->changedvram[addr2 >> 12] = changeframecount; - } - return; + if (svga->translate_address) { + uint32_t addr2 = svga->translate_address(addr, p); + if (addr2 < svga->vram_max) { + svga->vram[addr2 & svga->vram_mask] = val & 0xff; + svga->changedvram[addr2 >> 12] = changeframecount; + } + addr2 = svga->translate_address(addr + 1, p); + if (addr2 < svga->vram_max) { + svga->vram[addr2 & svga->vram_mask] = (val >> 8) & 0xff; + svga->changedvram[addr2 >> 12] = changeframecount; + } + return; } if (addr >= svga->vram_max) - return; + return; addr &= svga->vram_mask; - svga->changedvram[addr >> 12] = changeframecount; - *(uint16_t *)&svga->vram[addr] = val; + svga->changedvram[addr >> 12] = changeframecount; + *(uint16_t *) &svga->vram[addr] = val; } - void svga_writew(uint32_t addr, uint16_t val, void *p) { svga_writew_common(addr, val, 0, p); } - void svga_writew_linear(uint32_t addr, uint16_t val, void *p) { svga_writew_common(addr, val, 1, p); } - void svga_writel_common(uint32_t addr, uint32_t val, uint8_t linear, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; if (!svga->fast) { - svga_write_common(addr, val, linear, p); - svga_write_common(addr + 1, val >> 8, linear, p); - svga_write_common(addr + 2, val >> 16, linear, p); - svga_write_common(addr + 3, val >> 24, linear, p); - return; + svga_write_common(addr, val, linear, p); + svga_write_common(addr + 1, val >> 8, linear, p); + svga_write_common(addr + 2, val >> 16, linear, p); + svga_write_common(addr + 3, val >> 24, linear, p); + return; } cycles -= video_timing_write_l; if (!linear) { - addr = svga_decode_addr(svga, addr, 1); + addr = svga_decode_addr(svga, addr, 1); - if (addr == 0xffffffff) - return; + if (addr == 0xffffffff) + return; } addr &= svga->decode_mask; if (svga->translate_address) { - uint32_t addr2 = svga->translate_address(addr, p); - if (addr2 < svga->vram_max) { - svga->vram[addr2 & svga->vram_mask] = val & 0xff; - svga->changedvram[addr2 >> 12] = changeframecount; - } - addr2 = svga->translate_address(addr+1, p); - if (addr2 < svga->vram_max) { - svga->vram[addr2 & svga->vram_mask] = (val >> 8) & 0xff; - svga->changedvram[addr2 >> 12] = changeframecount; - } - addr2 = svga->translate_address(addr+2, p); - if (addr2 < svga->vram_max) { - svga->vram[addr2 & svga->vram_mask] = (val >> 16) & 0xff; - svga->changedvram[addr2 >> 12] = changeframecount; - } - addr2 = svga->translate_address(addr+3, p); - if (addr2 < svga->vram_max) { - svga->vram[addr2 & svga->vram_mask] = (val >> 24) & 0xff; - svga->changedvram[addr2 >> 12] = changeframecount; - } - return; + uint32_t addr2 = svga->translate_address(addr, p); + if (addr2 < svga->vram_max) { + svga->vram[addr2 & svga->vram_mask] = val & 0xff; + svga->changedvram[addr2 >> 12] = changeframecount; + } + addr2 = svga->translate_address(addr + 1, p); + if (addr2 < svga->vram_max) { + svga->vram[addr2 & svga->vram_mask] = (val >> 8) & 0xff; + svga->changedvram[addr2 >> 12] = changeframecount; + } + addr2 = svga->translate_address(addr + 2, p); + if (addr2 < svga->vram_max) { + svga->vram[addr2 & svga->vram_mask] = (val >> 16) & 0xff; + svga->changedvram[addr2 >> 12] = changeframecount; + } + addr2 = svga->translate_address(addr + 3, p); + if (addr2 < svga->vram_max) { + svga->vram[addr2 & svga->vram_mask] = (val >> 24) & 0xff; + svga->changedvram[addr2 >> 12] = changeframecount; + } + return; } if (addr >= svga->vram_max) - return; + return; addr &= svga->vram_mask; - svga->changedvram[addr >> 12] = changeframecount; - *(uint32_t *)&svga->vram[addr] = val; + svga->changedvram[addr >> 12] = changeframecount; + *(uint32_t *) &svga->vram[addr] = val; } - void svga_writel(uint32_t addr, uint32_t val, void *p) { svga_writel_common(addr, val, 0, p); } - void svga_writel_linear(uint32_t addr, uint32_t val, void *p) { svga_writel_common(addr, val, 1, p); } - uint8_t svga_readb_linear(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; if (!svga->fast) - return svga_read_linear(addr, p); + return svga_read_linear(addr, p); addr &= svga->decode_mask; if (addr >= svga->vram_max) - return 0xff; + return 0xff; - return *(uint8_t *)&svga->vram[addr & svga->vram_mask]; + return *(uint8_t *) &svga->vram[addr & svga->vram_mask]; } - uint16_t svga_readw_common(uint32_t addr, uint8_t linear, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; if (!svga->fast) - return svga_read_common(addr, linear, p) | (svga_read_common(addr + 1, linear, p) << 8); + return svga_read_common(addr, linear, p) | (svga_read_common(addr + 1, linear, p) << 8); cycles -= video_timing_read_w; if (!linear) { - addr = svga_decode_addr(svga, addr, 0); + addr = svga_decode_addr(svga, addr, 0); - if (addr == 0xffffffff) - return 0xffff; + if (addr == 0xffffffff) + return 0xffff; } addr &= svga->decode_mask; if (svga->translate_address) { - uint8_t val1 = 0xff, val2 = 0xff; - uint32_t addr2 = svga->translate_address(addr, p); - if (addr2 < svga->vram_max) - val1 = svga->vram[addr2 & svga->vram_mask]; - addr2 = svga->translate_address(addr+1, p); - if (addr2 < svga->vram_max) - val2 = svga->vram[addr2 & svga->vram_mask]; - return (val2 << 8) | val1; + uint8_t val1 = 0xff, val2 = 0xff; + uint32_t addr2 = svga->translate_address(addr, p); + if (addr2 < svga->vram_max) + val1 = svga->vram[addr2 & svga->vram_mask]; + addr2 = svga->translate_address(addr + 1, p); + if (addr2 < svga->vram_max) + val2 = svga->vram[addr2 & svga->vram_mask]; + return (val2 << 8) | val1; } if (addr >= svga->vram_max) - return 0xffff; + return 0xffff; - return *(uint16_t *)&svga->vram[addr & svga->vram_mask]; + return *(uint16_t *) &svga->vram[addr & svga->vram_mask]; } - uint16_t svga_readw(uint32_t addr, void *p) { return svga_readw_common(addr, 0, p); } - uint16_t svga_readw_linear(uint32_t addr, void *p) { return svga_readw_common(addr, 1, p); } - uint32_t svga_readl_common(uint32_t addr, uint8_t linear, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; if (!svga->fast) { - return svga_read_common(addr, linear, p) | (svga_read_common(addr + 1, linear, p) << 8) | - (svga_read_common(addr + 2, linear, p) << 16) | (svga_read_common(addr + 3, linear, p) << 24); + return svga_read_common(addr, linear, p) | (svga_read_common(addr + 1, linear, p) << 8) | (svga_read_common(addr + 2, linear, p) << 16) | (svga_read_common(addr + 3, linear, p) << 24); } cycles -= video_timing_read_l; if (!linear) { - addr = svga_decode_addr(svga, addr, 0); + addr = svga_decode_addr(svga, addr, 0); - if (addr == 0xffffffff) - return 0xffffffff; + if (addr == 0xffffffff) + return 0xffffffff; } addr &= svga->decode_mask; if (svga->translate_address) { - uint8_t val1 = 0xff, val2 = 0xff, val3 = 0xff, val4 = 0xff; - uint32_t addr2 = svga->translate_address(addr, p); - if (addr2 < svga->vram_max) - val1 = svga->vram[addr2 & svga->vram_mask]; - addr2 = svga->translate_address(addr+1, p); - if (addr2 < svga->vram_max) - val2 = svga->vram[addr2 & svga->vram_mask]; - addr2 = svga->translate_address(addr+2, p); - if (addr2 < svga->vram_max) - val3 = svga->vram[addr2 & svga->vram_mask]; - addr2 = svga->translate_address(addr+3, p); - if (addr2 < svga->vram_max) - val4 = svga->vram[addr2 & svga->vram_mask]; - return (val4 << 24) | (val3 << 16) | (val2 << 8) | val1; + uint8_t val1 = 0xff, val2 = 0xff, val3 = 0xff, val4 = 0xff; + uint32_t addr2 = svga->translate_address(addr, p); + if (addr2 < svga->vram_max) + val1 = svga->vram[addr2 & svga->vram_mask]; + addr2 = svga->translate_address(addr + 1, p); + if (addr2 < svga->vram_max) + val2 = svga->vram[addr2 & svga->vram_mask]; + addr2 = svga->translate_address(addr + 2, p); + if (addr2 < svga->vram_max) + val3 = svga->vram[addr2 & svga->vram_mask]; + addr2 = svga->translate_address(addr + 3, p); + if (addr2 < svga->vram_max) + val4 = svga->vram[addr2 & svga->vram_mask]; + return (val4 << 24) | (val3 << 16) | (val2 << 8) | val1; } if (addr >= svga->vram_max) - return 0xffffffff; + return 0xffffffff; - return *(uint32_t *)&svga->vram[addr & svga->vram_mask]; + return *(uint32_t *) &svga->vram[addr & svga->vram_mask]; } - uint32_t svga_readl(uint32_t addr, void *p) { return svga_readl_common(addr, 0, p); } - uint32_t svga_readl_linear(uint32_t addr, void *p) { diff --git a/src/video/vid_svga_render.c b/src/video/vid_svga_render.c index 3a8c4b10a..30d2c93b0 100644 --- a/src/video/vid_svga_render.c +++ b/src/video/vid_svga_render.c @@ -33,10 +33,10 @@ void svga_render_null(svga_t *svga) { if ((svga->displine + svga->y_add) < 0) - return; + return; if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; + svga->firstline_draw = svga->displine; svga->lastline_draw = svga->displine; } @@ -67,12 +67,11 @@ svga_render_blank(svga_t *svga) break; } - uint32_t *line_ptr = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - uint32_t line_width = (svga->hdisp + svga->scrollcache) * char_width * sizeof(uint32_t); + uint32_t *line_ptr = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + uint32_t line_width = (svga->hdisp + svga->scrollcache) * char_width * sizeof(uint32_t); memset(line_ptr, 0, line_width); } - void svga_render_overscan_left(svga_t *svga) { @@ -89,7 +88,6 @@ svga_render_overscan_left(svga_t *svga) *line_ptr++ = svga->overscan_color; } - void svga_render_overscan_right(svga_t *svga) { @@ -102,153 +100,155 @@ svga_render_overscan_right(svga_t *svga) return; uint32_t *line_ptr = &buffer32->line[svga->displine + svga->y_add][svga->x_add + svga->hdisp]; - right = (overscan_x >> 1); + right = (overscan_x >> 1); for (i = 0; i < right; i++) *line_ptr++ = svga->overscan_color; } - void svga_render_text_40(svga_t *svga) { uint32_t *p; - int x, xx; - int drawcursor, xinc; - uint8_t chr, attr, dat; - uint32_t charaddr; - int fg, bg; - uint32_t addr = 0; + int x, xx; + int drawcursor, xinc; + uint8_t chr, attr, dat; + uint32_t charaddr; + int fg, bg; + uint32_t addr = 0; if ((svga->displine + svga->y_add) < 0) - return; + return; if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; + svga->firstline_draw = svga->displine; svga->lastline_draw = svga->displine; if (svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - xinc = (svga->seqregs[1] & 1) ? 16 : 18; + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + xinc = (svga->seqregs[1] & 1) ? 16 : 18; - for (x = 0; x < (svga->hdisp + svga->scrollcache); x += xinc) { - if (!svga->force_old_addr) - addr = svga->remap_func(svga, svga->ma) & svga->vram_display_mask; + for (x = 0; x < (svga->hdisp + svga->scrollcache); x += xinc) { + if (!svga->force_old_addr) + addr = svga->remap_func(svga, svga->ma) & svga->vram_display_mask; - drawcursor = ((svga->ma == svga->ca) && svga->con && svga->cursoron); + drawcursor = ((svga->ma == svga->ca) && svga->con && svga->cursoron); - if (svga->force_old_addr) { - chr = svga->vram[(svga->ma << 1) & svga->vram_display_mask]; - attr = svga->vram[((svga->ma << 1) + 1) & svga->vram_display_mask]; - } else { - chr = svga->vram[addr]; - attr = svga->vram[addr+1]; - } + if (svga->force_old_addr) { + chr = svga->vram[(svga->ma << 1) & svga->vram_display_mask]; + attr = svga->vram[((svga->ma << 1) + 1) & svga->vram_display_mask]; + } else { + chr = svga->vram[addr]; + attr = svga->vram[addr + 1]; + } - if (attr & 8) charaddr = svga->charsetb + (chr * 128); - else charaddr = svga->charseta + (chr * 128); + if (attr & 8) + charaddr = svga->charsetb + (chr * 128); + else + charaddr = svga->charseta + (chr * 128); - if (drawcursor) { - bg = svga->pallook[svga->egapal[attr & 15]]; - fg = svga->pallook[svga->egapal[attr >> 4]]; - } else { - fg = svga->pallook[svga->egapal[attr & 15]]; - bg = svga->pallook[svga->egapal[attr >> 4]]; + if (drawcursor) { + bg = svga->pallook[svga->egapal[attr & 15]]; + fg = svga->pallook[svga->egapal[attr >> 4]]; + } else { + fg = svga->pallook[svga->egapal[attr & 15]]; + bg = svga->pallook[svga->egapal[attr >> 4]]; - if (attr & 0x80 && svga->attrregs[0x10] & 8) { - bg = svga->pallook[svga->egapal[(attr >> 4) & 7]]; - if (svga->blink & 16) - fg = bg; - } - } + if (attr & 0x80 && svga->attrregs[0x10] & 8) { + bg = svga->pallook[svga->egapal[(attr >> 4) & 7]]; + if (svga->blink & 16) + fg = bg; + } + } - dat = svga->vram[charaddr + (svga->sc << 2)]; - if (svga->seqregs[1] & 1) { - for (xx = 0; xx < 16; xx += 2) - p[xx] = p[xx + 1] = (dat & (0x80 >> (xx >> 1))) ? fg : bg; - } else { - for (xx = 0; xx < 16; xx += 2) - p[xx] = p[xx + 1] = (dat & (0x80 >> (xx >> 1))) ? fg : bg; - if ((chr & ~0x1f) != 0xc0 || !(svga->attrregs[0x10] & 4)) - p[16] = p[17] = bg; - else - p[16] = p[17] = (dat & 1) ? fg : bg; - } - svga->ma += 4; - p += xinc; - } - svga->ma &= svga->vram_display_mask; + dat = svga->vram[charaddr + (svga->sc << 2)]; + if (svga->seqregs[1] & 1) { + for (xx = 0; xx < 16; xx += 2) + p[xx] = p[xx + 1] = (dat & (0x80 >> (xx >> 1))) ? fg : bg; + } else { + for (xx = 0; xx < 16; xx += 2) + p[xx] = p[xx + 1] = (dat & (0x80 >> (xx >> 1))) ? fg : bg; + if ((chr & ~0x1f) != 0xc0 || !(svga->attrregs[0x10] & 4)) + p[16] = p[17] = bg; + else + p[16] = p[17] = (dat & 1) ? fg : bg; + } + svga->ma += 4; + p += xinc; + } + svga->ma &= svga->vram_display_mask; } } - void svga_render_text_80(svga_t *svga) { uint32_t *p; - int x, xx; - int drawcursor, xinc; - uint8_t chr, attr, dat; - uint32_t charaddr; - int fg, bg; - uint32_t addr = 0; + int x, xx; + int drawcursor, xinc; + uint8_t chr, attr, dat; + uint32_t charaddr; + int fg, bg; + uint32_t addr = 0; if ((svga->displine + svga->y_add) < 0) - return; + return; if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; + svga->firstline_draw = svga->displine; svga->lastline_draw = svga->displine; if (svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - xinc = (svga->seqregs[1] & 1) ? 8 : 9; + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + xinc = (svga->seqregs[1] & 1) ? 8 : 9; - for (x = 0; x < (svga->hdisp + svga->scrollcache); x += xinc) { - if (!svga->force_old_addr) - addr = svga->remap_func(svga, svga->ma) & svga->vram_display_mask; + for (x = 0; x < (svga->hdisp + svga->scrollcache); x += xinc) { + if (!svga->force_old_addr) + addr = svga->remap_func(svga, svga->ma) & svga->vram_display_mask; - drawcursor = ((svga->ma == svga->ca) && svga->con && svga->cursoron); + drawcursor = ((svga->ma == svga->ca) && svga->con && svga->cursoron); - if (svga->force_old_addr) { - chr = svga->vram[(svga->ma << 1) & svga->vram_display_mask]; - attr = svga->vram[((svga->ma << 1) + 1) & svga->vram_display_mask]; - } else { - chr = svga->vram[addr]; - attr = svga->vram[addr+1]; - } + if (svga->force_old_addr) { + chr = svga->vram[(svga->ma << 1) & svga->vram_display_mask]; + attr = svga->vram[((svga->ma << 1) + 1) & svga->vram_display_mask]; + } else { + chr = svga->vram[addr]; + attr = svga->vram[addr + 1]; + } - if (attr & 8) charaddr = svga->charsetb + (chr * 128); - else charaddr = svga->charseta + (chr * 128); + if (attr & 8) + charaddr = svga->charsetb + (chr * 128); + else + charaddr = svga->charseta + (chr * 128); - if (drawcursor) { - bg = svga->pallook[svga->egapal[attr & 15]]; - fg = svga->pallook[svga->egapal[attr >> 4]]; - } else { - fg = svga->pallook[svga->egapal[attr & 15]]; - bg = svga->pallook[svga->egapal[attr >> 4]]; - if (attr & 0x80 && svga->attrregs[0x10] & 8) { - bg = svga->pallook[svga->egapal[(attr >> 4) & 7]]; - if (svga->blink & 16) - fg = bg; - } - } + if (drawcursor) { + bg = svga->pallook[svga->egapal[attr & 15]]; + fg = svga->pallook[svga->egapal[attr >> 4]]; + } else { + fg = svga->pallook[svga->egapal[attr & 15]]; + bg = svga->pallook[svga->egapal[attr >> 4]]; + if (attr & 0x80 && svga->attrregs[0x10] & 8) { + bg = svga->pallook[svga->egapal[(attr >> 4) & 7]]; + if (svga->blink & 16) + fg = bg; + } + } - dat = svga->vram[charaddr + (svga->sc << 2)]; - if (svga->seqregs[1] & 1) { - for (xx = 0; xx < 8; xx++) - p[xx] = (dat & (0x80 >> xx)) ? fg : bg; - } else { - for (xx = 0; xx < 8; xx++) - p[xx] = (dat & (0x80 >> xx)) ? fg : bg; - if ((chr & ~0x1F) != 0xC0 || !(svga->attrregs[0x10] & 4)) - p[8] = bg; - else - p[8] = (dat & 1) ? fg : bg; - } - svga->ma += 4; - p += xinc; - } - svga->ma &= svga->vram_display_mask; + dat = svga->vram[charaddr + (svga->sc << 2)]; + if (svga->seqregs[1] & 1) { + for (xx = 0; xx < 8; xx++) + p[xx] = (dat & (0x80 >> xx)) ? fg : bg; + } else { + for (xx = 0; xx < 8; xx++) + p[xx] = (dat & (0x80 >> xx)) ? fg : bg; + if ((chr & ~0x1F) != 0xC0 || !(svga->attrregs[0x10] & 4)) + p[8] = bg; + else + p[8] = (dat & 1) ? fg : bg; + } + svga->ma += 4; + p += xinc; + } + svga->ma &= svga->vram_display_mask; } } @@ -257,1607 +257,1590 @@ void svga_render_text_80_ksc5601(svga_t *svga) { uint32_t *p; - int x, xx; - int drawcursor, xinc; - uint8_t chr, attr, dat, nextchr; - uint32_t charaddr; - int fg, bg; + int x, xx; + int drawcursor, xinc; + uint8_t chr, attr, dat, nextchr; + uint32_t charaddr; + int fg, bg; if ((svga->displine + svga->y_add) < 0) - return; + return; if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; + svga->firstline_draw = svga->displine; svga->lastline_draw = svga->displine; if (svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - xinc = (svga->seqregs[1] & 1) ? 8 : 9; + xinc = (svga->seqregs[1] & 1) ? 8 : 9; - for (x = 0; x < (svga->hdisp + svga->scrollcache); x += xinc) { - uint32_t addr = svga->remap_func(svga, svga->ma) & svga->vram_display_mask; - drawcursor = ((svga->ma == svga->ca) && svga->con && svga->cursoron); - chr = svga->vram[addr]; - nextchr = svga->vram[addr + 8]; - attr = svga->vram[addr + 1]; + for (x = 0; x < (svga->hdisp + svga->scrollcache); x += xinc) { + uint32_t addr = svga->remap_func(svga, svga->ma) & svga->vram_display_mask; + drawcursor = ((svga->ma == svga->ca) && svga->con && svga->cursoron); + chr = svga->vram[addr]; + nextchr = svga->vram[addr + 8]; + attr = svga->vram[addr + 1]; - if (drawcursor) { - bg = svga->pallook[svga->egapal[attr & 15]]; - fg = svga->pallook[svga->egapal[attr >> 4]]; - } else { - fg = svga->pallook[svga->egapal[attr & 15]]; - bg = svga->pallook[svga->egapal[attr >> 4]]; - if (attr & 0x80 && svga->attrregs[0x10] & 8) { - bg = svga->pallook[svga->egapal[(attr >> 4) & 7]]; - if (svga->blink & 16) - fg = bg; - } - } + if (drawcursor) { + bg = svga->pallook[svga->egapal[attr & 15]]; + fg = svga->pallook[svga->egapal[attr >> 4]]; + } else { + fg = svga->pallook[svga->egapal[attr & 15]]; + bg = svga->pallook[svga->egapal[attr >> 4]]; + if (attr & 0x80 && svga->attrregs[0x10] & 8) { + bg = svga->pallook[svga->egapal[(attr >> 4) & 7]]; + if (svga->blink & 16) + fg = bg; + } + } - if ((x + xinc) < svga->hdisp && (chr & (nextchr | svga->ksc5601_sbyte_mask) & 0x80)) { - if ((chr == svga->ksc5601_udc_area_msb[0] || chr == svga->ksc5601_udc_area_msb[1]) && (nextchr > 0xa0 && nextchr < 0xff)) - dat = fontdatksc5601_user[(chr == svga->ksc5601_udc_area_msb[1] ? 96 : 0) + (nextchr & 0x7F) - 0x20].chr[svga->sc]; - else if (nextchr & 0x80) { - if (svga->ksc5601_swap_mode == 1 && (nextchr > 0xa0 && nextchr < 0xff)) { - if(chr >= 0x80 && chr < 0x99) chr += 0x30; - else if(chr >= 0xB0 && chr < 0xC9) chr -= 0x30; - } - dat = fontdatksc5601[((chr & 0x7F) << 7) | (nextchr & 0x7F)].chr[svga->sc]; - } else - dat = 0xff; - } else { - if (attr & 8) charaddr = svga->charsetb + (chr * 128); - else charaddr = svga->charseta + (chr * 128); + if ((x + xinc) < svga->hdisp && (chr & (nextchr | svga->ksc5601_sbyte_mask) & 0x80)) { + if ((chr == svga->ksc5601_udc_area_msb[0] || chr == svga->ksc5601_udc_area_msb[1]) && (nextchr > 0xa0 && nextchr < 0xff)) + dat = fontdatksc5601_user[(chr == svga->ksc5601_udc_area_msb[1] ? 96 : 0) + (nextchr & 0x7F) - 0x20].chr[svga->sc]; + else if (nextchr & 0x80) { + if (svga->ksc5601_swap_mode == 1 && (nextchr > 0xa0 && nextchr < 0xff)) { + if (chr >= 0x80 && chr < 0x99) + chr += 0x30; + else if (chr >= 0xB0 && chr < 0xC9) + chr -= 0x30; + } + dat = fontdatksc5601[((chr & 0x7F) << 7) | (nextchr & 0x7F)].chr[svga->sc]; + } else + dat = 0xff; + } else { + if (attr & 8) + charaddr = svga->charsetb + (chr * 128); + else + charaddr = svga->charseta + (chr * 128); - if ((svga->ksc5601_english_font_type >> 8) == 1) - dat = fontdatksc5601[((svga->ksc5601_english_font_type & 0x7F) << 7) | (chr >> 1)].chr[((chr & 1) << 4) | svga->sc]; - else - dat = svga->vram[charaddr + (svga->sc << 2)]; - } + if ((svga->ksc5601_english_font_type >> 8) == 1) + dat = fontdatksc5601[((svga->ksc5601_english_font_type & 0x7F) << 7) | (chr >> 1)].chr[((chr & 1) << 4) | svga->sc]; + else + dat = svga->vram[charaddr + (svga->sc << 2)]; + } - if (svga->seqregs[1] & 1) { - for (xx = 0; xx < 8; xx++) - p[xx] = (dat & (0x80 >> xx)) ? fg : bg; - } else { - for (xx = 0; xx < 8; xx++) - p[xx] = (dat & (0x80 >> xx)) ? fg : bg; - if (((chr & ~0x1f) != 0xc0) || !(svga->attrregs[0x10] & 4)) - p[8] = bg; - else - p[8] = (dat & 1) ? fg : bg; - } - svga->ma += 4; - p += xinc; + if (svga->seqregs[1] & 1) { + for (xx = 0; xx < 8; xx++) + p[xx] = (dat & (0x80 >> xx)) ? fg : bg; + } else { + for (xx = 0; xx < 8; xx++) + p[xx] = (dat & (0x80 >> xx)) ? fg : bg; + if (((chr & ~0x1f) != 0xc0) || !(svga->attrregs[0x10] & 4)) + p[8] = bg; + else + p[8] = (dat & 1) ? fg : bg; + } + svga->ma += 4; + p += xinc; - if ((x + xinc) < svga->hdisp && (chr & (nextchr | svga->ksc5601_sbyte_mask) & 0x80)) { - attr = svga->vram[((svga->ma << 1) + 1) & svga->vram_display_mask]; + if ((x + xinc) < svga->hdisp && (chr & (nextchr | svga->ksc5601_sbyte_mask) & 0x80)) { + attr = svga->vram[((svga->ma << 1) + 1) & svga->vram_display_mask]; - if (drawcursor) { - bg = svga->pallook[svga->egapal[attr & 15]]; - fg = svga->pallook[svga->egapal[attr >> 4]]; - } else { - fg = svga->pallook[svga->egapal[attr & 15]]; - bg = svga->pallook[svga->egapal[attr >> 4]]; - if (attr & 0x80 && svga->attrregs[0x10] & 8) { - bg = svga->pallook[svga->egapal[(attr >> 4) & 7]]; - if (svga->blink & 16) - fg = bg; - } - } + if (drawcursor) { + bg = svga->pallook[svga->egapal[attr & 15]]; + fg = svga->pallook[svga->egapal[attr >> 4]]; + } else { + fg = svga->pallook[svga->egapal[attr & 15]]; + bg = svga->pallook[svga->egapal[attr >> 4]]; + if (attr & 0x80 && svga->attrregs[0x10] & 8) { + bg = svga->pallook[svga->egapal[(attr >> 4) & 7]]; + if (svga->blink & 16) + fg = bg; + } + } - if ((chr == svga->ksc5601_udc_area_msb[0] || chr == svga->ksc5601_udc_area_msb[1]) && (nextchr > 0xa0 && nextchr < 0xff)) - dat = fontdatksc5601_user[(chr == svga->ksc5601_udc_area_msb[1] ? 96 : 0) + (nextchr & 0x7F) - 0x20].chr[svga->sc + 16]; - else if(nextchr & 0x80) - dat = fontdatksc5601[((chr & 0x7f) << 7) | (nextchr & 0x7F)].chr[svga->sc + 16]; - else - dat = 0xff; + if ((chr == svga->ksc5601_udc_area_msb[0] || chr == svga->ksc5601_udc_area_msb[1]) && (nextchr > 0xa0 && nextchr < 0xff)) + dat = fontdatksc5601_user[(chr == svga->ksc5601_udc_area_msb[1] ? 96 : 0) + (nextchr & 0x7F) - 0x20].chr[svga->sc + 16]; + else if (nextchr & 0x80) + dat = fontdatksc5601[((chr & 0x7f) << 7) | (nextchr & 0x7F)].chr[svga->sc + 16]; + else + dat = 0xff; - if (svga->seqregs[1] & 1) { - for (xx = 0; xx < 8; xx++) - p[xx] = (dat & (0x80 >> xx)) ? fg : bg; - } else { - for (xx = 0; xx < 8; xx++) - p[xx] = (dat & (0x80 >> xx)) ? fg : bg; - if (((chr & ~0x1f) != 0xc0) || !(svga->attrregs[0x10] & 4)) - p[8] = bg; - else - p[8] = (dat & 1) ? fg : bg; - } + if (svga->seqregs[1] & 1) { + for (xx = 0; xx < 8; xx++) + p[xx] = (dat & (0x80 >> xx)) ? fg : bg; + } else { + for (xx = 0; xx < 8; xx++) + p[xx] = (dat & (0x80 >> xx)) ? fg : bg; + if (((chr & ~0x1f) != 0xc0) || !(svga->attrregs[0x10] & 4)) + p[8] = bg; + else + p[8] = (dat & 1) ? fg : bg; + } - svga->ma += 4; - p += xinc; - x += xinc; - } - } - svga->ma &= svga->vram_display_mask; + svga->ma += 4; + p += xinc; + x += xinc; + } + } + svga->ma &= svga->vram_display_mask; } } - void svga_render_2bpp_lowres(svga_t *svga) { - int changed_offset; - int x; - uint8_t dat[2]; + int changed_offset; + int x; + uint8_t dat[2]; uint32_t addr, *p; - uint32_t changed_addr; + uint32_t changed_addr; if ((svga->displine + svga->y_add) < 0) - return; + return; if (svga->force_old_addr) { - changed_offset = ((svga->ma << 1) + (svga->sc & ~svga->crtc[0x17] & 3) * 0x8000) >> 12; + changed_offset = ((svga->ma << 1) + (svga->sc & ~svga->crtc[0x17] & 3) * 0x8000) >> 12; - if (svga->changedvram[changed_offset] || svga->changedvram[changed_offset + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_offset] || svga->changedvram[changed_offset + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 16) { - addr = svga->ma; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 16) { + addr = svga->ma; - if (!(svga->crtc[0x17] & 0x40)) { - addr = (addr << 1) & svga->vram_mask; - addr &= ~7; + if (!(svga->crtc[0x17] & 0x40)) { + addr = (addr << 1) & svga->vram_mask; + addr &= ~7; - if ((svga->crtc[0x17] & 0x20) && (svga->ma & 0x20000)) - addr |= 4; + if ((svga->crtc[0x17] & 0x20) && (svga->ma & 0x20000)) + addr |= 4; - if (!(svga->crtc[0x17] & 0x20) && (svga->ma & 0x8000)) - addr |= 4; - } + if (!(svga->crtc[0x17] & 0x20) && (svga->ma & 0x8000)) + addr |= 4; + } - if (!(svga->crtc[0x17] & 0x01)) - addr = (addr & ~0x8000) | ((svga->sc & 1) ? 0x8000 : 0); + if (!(svga->crtc[0x17] & 0x01)) + addr = (addr & ~0x8000) | ((svga->sc & 1) ? 0x8000 : 0); - if (!(svga->crtc[0x17] & 0x02)) - addr = (addr & ~0x10000) | ((svga->sc & 2) ? 0x10000 : 0); + if (!(svga->crtc[0x17] & 0x02)) + addr = (addr & ~0x10000) | ((svga->sc & 2) ? 0x10000 : 0); - dat[0] = svga->vram[addr]; - dat[1] = svga->vram[addr | 0x1]; - if (svga->seqregs[1] & 4) - svga->ma += 2; - else - svga->ma += 4; - svga->ma &= svga->vram_mask; - p[0] = p[1] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; - p[2] = p[3] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; - p[4] = p[5] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; - p[6] = p[7] = svga->pallook[svga->egapal[dat[0] & 3]]; - p[8] = p[9] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; - p[10] = p[11] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; - p[12] = p[13] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; - p[14] = p[15] = svga->pallook[svga->egapal[dat[1] & 3]]; - p += 16; - } - } + dat[0] = svga->vram[addr]; + dat[1] = svga->vram[addr | 0x1]; + if (svga->seqregs[1] & 4) + svga->ma += 2; + else + svga->ma += 4; + svga->ma &= svga->vram_mask; + p[0] = p[1] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; + p[2] = p[3] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; + p[4] = p[5] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; + p[6] = p[7] = svga->pallook[svga->egapal[dat[0] & 3]]; + p[8] = p[9] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; + p[10] = p[11] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; + p[12] = p[13] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; + p[14] = p[15] = svga->pallook[svga->egapal[dat[1] & 3]]; + p += 16; + } + } } else { - changed_addr = svga->remap_func(svga, svga->ma); + changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 16) { - addr = svga->remap_func(svga, svga->ma); + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 16) { + addr = svga->remap_func(svga, svga->ma); - dat[0] = svga->vram[addr]; - dat[1] = svga->vram[addr | 0x1]; - if (svga->seqregs[1] & 4) - svga->ma += 2; - else - svga->ma += 4; + dat[0] = svga->vram[addr]; + dat[1] = svga->vram[addr | 0x1]; + if (svga->seqregs[1] & 4) + svga->ma += 2; + else + svga->ma += 4; - svga->ma &= svga->vram_mask; + svga->ma &= svga->vram_mask; - p[0] = p[1] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; - p[2] = p[3] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; - p[4] = p[5] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; - p[6] = p[7] = svga->pallook[svga->egapal[dat[0] & 3]]; - p[8] = p[9] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; - p[10] = p[11] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; - p[12] = p[13] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; - p[14] = p[15] = svga->pallook[svga->egapal[dat[1] & 3]]; + p[0] = p[1] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; + p[2] = p[3] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; + p[4] = p[5] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; + p[6] = p[7] = svga->pallook[svga->egapal[dat[0] & 3]]; + p[8] = p[9] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; + p[10] = p[11] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; + p[12] = p[13] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; + p[14] = p[15] = svga->pallook[svga->egapal[dat[1] & 3]]; - p += 16; - } - } + p += 16; + } + } } } - void svga_render_2bpp_highres(svga_t *svga) { - int changed_offset; - int x; - uint8_t dat[2]; + int changed_offset; + int x; + uint8_t dat[2]; uint32_t addr, *p; - uint32_t changed_addr; + uint32_t changed_addr; if ((svga->displine + svga->y_add) < 0) - return; + return; if (svga->force_old_addr) { - changed_offset = ((svga->ma << 1) + (svga->sc & ~svga->crtc[0x17] & 3) * 0x8000) >> 12; + changed_offset = ((svga->ma << 1) + (svga->sc & ~svga->crtc[0x17] & 3) * 0x8000) >> 12; - if (svga->changedvram[changed_offset] || svga->changedvram[changed_offset + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_offset] || svga->changedvram[changed_offset + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - addr = svga->ma; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + addr = svga->ma; - if (!(svga->crtc[0x17] & 0x40)) { - addr = (addr << 1) & svga->vram_mask; - addr &= ~7; + if (!(svga->crtc[0x17] & 0x40)) { + addr = (addr << 1) & svga->vram_mask; + addr &= ~7; - if ((svga->crtc[0x17] & 0x20) && (svga->ma & 0x20000)) - addr |= 4; + if ((svga->crtc[0x17] & 0x20) && (svga->ma & 0x20000)) + addr |= 4; - if (!(svga->crtc[0x17] & 0x20) && (svga->ma & 0x8000)) - addr |= 4; - } + if (!(svga->crtc[0x17] & 0x20) && (svga->ma & 0x8000)) + addr |= 4; + } - if (!(svga->crtc[0x17] & 0x01)) - addr = (addr & ~0x8000) | ((svga->sc & 1) ? 0x8000 : 0); + if (!(svga->crtc[0x17] & 0x01)) + addr = (addr & ~0x8000) | ((svga->sc & 1) ? 0x8000 : 0); - if (!(svga->crtc[0x17] & 0x02)) - addr = (addr & ~0x10000) | ((svga->sc & 2) ? 0x10000 : 0); + if (!(svga->crtc[0x17] & 0x02)) + addr = (addr & ~0x10000) | ((svga->sc & 2) ? 0x10000 : 0); - dat[0] = svga->vram[addr]; - dat[1] = svga->vram[addr | 0x1]; - if (svga->seqregs[1] & 4) - svga->ma += 2; - else - svga->ma += 4; - svga->ma &= svga->vram_mask; - p[0] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; - p[1] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; - p[2] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; - p[3] = svga->pallook[svga->egapal[dat[0] & 3]]; - p[4] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; - p[5] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; - p[6] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; - p[7] = svga->pallook[svga->egapal[dat[1] & 3]]; - p += 8; - } - } + dat[0] = svga->vram[addr]; + dat[1] = svga->vram[addr | 0x1]; + if (svga->seqregs[1] & 4) + svga->ma += 2; + else + svga->ma += 4; + svga->ma &= svga->vram_mask; + p[0] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; + p[1] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; + p[2] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; + p[3] = svga->pallook[svga->egapal[dat[0] & 3]]; + p[4] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; + p[5] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; + p[6] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; + p[7] = svga->pallook[svga->egapal[dat[1] & 3]]; + p += 8; + } + } } else { - changed_addr = svga->remap_func(svga, svga->ma); + changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - addr = svga->remap_func(svga, svga->ma); + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + addr = svga->remap_func(svga, svga->ma); - dat[0] = svga->vram[addr]; - dat[1] = svga->vram[addr | 0x1]; - if (svga->seqregs[1] & 4) - svga->ma += 2; - else - svga->ma += 4; + dat[0] = svga->vram[addr]; + dat[1] = svga->vram[addr | 0x1]; + if (svga->seqregs[1] & 4) + svga->ma += 2; + else + svga->ma += 4; - svga->ma &= svga->vram_mask; + svga->ma &= svga->vram_mask; - p[0] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; - p[1] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; - p[2] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; - p[3] = svga->pallook[svga->egapal[dat[0] & 3]]; - p[4] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; - p[5] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; - p[6] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; - p[7] = svga->pallook[svga->egapal[dat[1] & 3]]; + p[0] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; + p[1] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; + p[2] = svga->pallook[svga->egapal[(dat[0] >> 2) & 3]]; + p[3] = svga->pallook[svga->egapal[dat[0] & 3]]; + p[4] = svga->pallook[svga->egapal[(dat[1] >> 6) & 3]]; + p[5] = svga->pallook[svga->egapal[(dat[1] >> 4) & 3]]; + p[6] = svga->pallook[svga->egapal[(dat[1] >> 2) & 3]]; + p[7] = svga->pallook[svga->egapal[dat[1] & 3]]; - p += 8; - } - } + p += 8; + } + } } } - void svga_render_2bpp_headland_highres(svga_t *svga) { - int x; - int oddeven; + int x; + int oddeven; uint32_t addr, *p; - uint8_t edat[4]; - uint8_t dat; - uint32_t changed_addr; + uint8_t edat[4]; + uint8_t dat; + uint32_t changed_addr; if ((svga->displine + svga->y_add) < 0) - return; + return; changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - addr = svga->remap_func(svga, svga->ma); - oddeven = 0; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + addr = svga->remap_func(svga, svga->ma); + oddeven = 0; - if (svga->seqregs[1] & 4) { - oddeven = (addr & 4) ? 1 : 0; - edat[0] = svga->vram[addr | oddeven]; - edat[2] = svga->vram[addr | oddeven | 0x2]; - edat[1] = edat[3] = 0; - } else { - *(uint32_t *)(&edat[0]) = *(uint32_t *)(&svga->vram[addr]); - } - svga->ma += 4; - svga->ma &= svga->vram_mask; + if (svga->seqregs[1] & 4) { + oddeven = (addr & 4) ? 1 : 0; + edat[0] = svga->vram[addr | oddeven]; + edat[2] = svga->vram[addr | oddeven | 0x2]; + edat[1] = edat[3] = 0; + } else { + *(uint32_t *) (&edat[0]) = *(uint32_t *) (&svga->vram[addr]); + } + svga->ma += 4; + svga->ma &= svga->vram_mask; - dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); - p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); - p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); - p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); - p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); + p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); + p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); + p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); + p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - p += 8; - } + p += 8; + } } } void svga_render_4bpp_lowres(svga_t *svga) { - int x, oddeven; + int x, oddeven; uint32_t addr, *p; - uint8_t edat[4]; - uint8_t dat; - uint32_t changed_addr; + uint8_t edat[4]; + uint8_t dat; + uint32_t changed_addr; if ((svga->displine + svga->y_add) < 0) - return; + return; - if (svga->force_old_addr) { - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->force_old_addr) { + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 16) { - addr = svga->ma; - oddeven = 0; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 16) { + addr = svga->ma; + oddeven = 0; - if (!(svga->crtc[0x17] & 0x40)) { - addr = (addr << 1) & svga->vram_mask; + if (!(svga->crtc[0x17] & 0x40)) { + addr = (addr << 1) & svga->vram_mask; - if (svga->seqregs[1] & 4) - oddeven = (addr & 4) ? 1 : 0; + if (svga->seqregs[1] & 4) + oddeven = (addr & 4) ? 1 : 0; - addr &= ~7; + addr &= ~7; - if ((svga->crtc[0x17] & 0x20) && (svga->ma & 0x20000)) - addr |= 4; - if (!(svga->crtc[0x17] & 0x20) && (svga->ma & 0x8000)) - addr |= 4; - } + if ((svga->crtc[0x17] & 0x20) && (svga->ma & 0x20000)) + addr |= 4; + if (!(svga->crtc[0x17] & 0x20) && (svga->ma & 0x8000)) + addr |= 4; + } - if (!(svga->crtc[0x17] & 0x01)) - addr = (addr & ~0x8000) | ((svga->sc & 1) ? 0x8000 : 0); - if (!(svga->crtc[0x17] & 0x02)) - addr = (addr & ~0x10000) | ((svga->sc & 2) ? 0x10000 : 0); + if (!(svga->crtc[0x17] & 0x01)) + addr = (addr & ~0x8000) | ((svga->sc & 1) ? 0x8000 : 0); + if (!(svga->crtc[0x17] & 0x02)) + addr = (addr & ~0x10000) | ((svga->sc & 2) ? 0x10000 : 0); - if (svga->seqregs[1] & 4) { - edat[0] = svga->vram[addr | oddeven]; - edat[2] = svga->vram[addr | oddeven | 0x2]; - edat[1] = edat[3] = 0; - svga->ma += 2; - } else { - *(uint32_t *)(&edat[0]) = *(uint32_t *)(&svga->vram[addr]); - svga->ma += 4; - } - svga->ma &= svga->vram_mask; + if (svga->seqregs[1] & 4) { + edat[0] = svga->vram[addr | oddeven]; + edat[2] = svga->vram[addr | oddeven | 0x2]; + edat[1] = edat[3] = 0; + svga->ma += 2; + } else { + *(uint32_t *) (&edat[0]) = *(uint32_t *) (&svga->vram[addr]); + svga->ma += 4; + } + svga->ma &= svga->vram_mask; - dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); - p[0] = p[1] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[2] = p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); - p[4] = p[5] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[6] = p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); - p[8] = p[9] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[10] = p[11] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); - p[12] = p[13] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[14] = p[15] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); + p[0] = p[1] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[2] = p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); + p[4] = p[5] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[6] = p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); + p[8] = p[9] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[10] = p[11] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); + p[12] = p[13] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[14] = p[15] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - p += 16; - } - } - } else { - changed_addr = svga->remap_func(svga, svga->ma); + p += 16; + } + } + } else { + changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 16) { - addr = svga->remap_func(svga, svga->ma); - oddeven = 0; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 16) { + addr = svga->remap_func(svga, svga->ma); + oddeven = 0; - if (svga->seqregs[1] & 4) { - oddeven = (addr & 4) ? 1 : 0; - edat[0] = svga->vram[addr | oddeven]; - edat[2] = svga->vram[addr | oddeven | 0x2]; - edat[1] = edat[3] = 0; - svga->ma += 2; - } else { - *(uint32_t *)(&edat[0]) = *(uint32_t *)(&svga->vram[addr]); - svga->ma += 4; - } - svga->ma &= svga->vram_mask; + if (svga->seqregs[1] & 4) { + oddeven = (addr & 4) ? 1 : 0; + edat[0] = svga->vram[addr | oddeven]; + edat[2] = svga->vram[addr | oddeven | 0x2]; + edat[1] = edat[3] = 0; + svga->ma += 2; + } else { + *(uint32_t *) (&edat[0]) = *(uint32_t *) (&svga->vram[addr]); + svga->ma += 4; + } + svga->ma &= svga->vram_mask; - dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); - p[0] = p[1] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[2] = p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); - p[4] = p[5] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[6] = p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); - p[8] = p[9] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[10] = p[11] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); - p[12] = p[13] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[14] = p[15] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); + p[0] = p[1] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[2] = p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); + p[4] = p[5] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[6] = p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); + p[8] = p[9] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[10] = p[11] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); + p[12] = p[13] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[14] = p[15] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - p += 16; - } - } - } + p += 16; + } + } + } } - void svga_render_4bpp_highres(svga_t *svga) { - int changed_offset; - int x, oddeven; + int changed_offset; + int x, oddeven; uint32_t addr, *p; - uint8_t edat[4]; - uint8_t dat; - uint32_t changed_addr; + uint8_t edat[4]; + uint8_t dat; + uint32_t changed_addr; if ((svga->displine + svga->y_add) < 0) - return; + return; - if (svga->force_old_addr) { - changed_offset = (svga->ma + (svga->sc & ~svga->crtc[0x17] & 3) * 0x8000) >> 12; + if (svga->force_old_addr) { + changed_offset = (svga->ma + (svga->sc & ~svga->crtc[0x17] & 3) * 0x8000) >> 12; - if (svga->changedvram[changed_offset] || svga->changedvram[changed_offset + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_offset] || svga->changedvram[changed_offset + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - addr = svga->ma; - oddeven = 0; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + addr = svga->ma; + oddeven = 0; - if (!(svga->crtc[0x17] & 0x40)) { - addr = (addr << 1) & svga->vram_mask; + if (!(svga->crtc[0x17] & 0x40)) { + addr = (addr << 1) & svga->vram_mask; - if (svga->seqregs[1] & 4) - oddeven = (addr & 4) ? 1 : 0; + if (svga->seqregs[1] & 4) + oddeven = (addr & 4) ? 1 : 0; - addr &= ~7; + addr &= ~7; - if ((svga->crtc[0x17] & 0x20) && (svga->ma & 0x20000)) - addr |= 4; - if (!(svga->crtc[0x17] & 0x20) && (svga->ma & 0x8000)) - addr |= 4; - } + if ((svga->crtc[0x17] & 0x20) && (svga->ma & 0x20000)) + addr |= 4; + if (!(svga->crtc[0x17] & 0x20) && (svga->ma & 0x8000)) + addr |= 4; + } - if (!(svga->crtc[0x17] & 0x01)) - addr = (addr & ~0x8000) | ((svga->sc & 1) ? 0x8000 : 0); - if (!(svga->crtc[0x17] & 0x02)) - addr = (addr & ~0x10000) | ((svga->sc & 2) ? 0x10000 : 0); + if (!(svga->crtc[0x17] & 0x01)) + addr = (addr & ~0x8000) | ((svga->sc & 1) ? 0x8000 : 0); + if (!(svga->crtc[0x17] & 0x02)) + addr = (addr & ~0x10000) | ((svga->sc & 2) ? 0x10000 : 0); - if (svga->seqregs[1] & 4) { - edat[0] = svga->vram[addr | oddeven]; - edat[2] = svga->vram[addr | oddeven | 0x2]; - edat[1] = edat[3] = 0; - svga->ma += 2; - } else { - *(uint32_t *)(&edat[0]) = *(uint32_t *)(&svga->vram[addr]); - svga->ma += 4; - } - svga->ma &= svga->vram_mask; + if (svga->seqregs[1] & 4) { + edat[0] = svga->vram[addr | oddeven]; + edat[2] = svga->vram[addr | oddeven | 0x2]; + edat[1] = edat[3] = 0; + svga->ma += 2; + } else { + *(uint32_t *) (&edat[0]) = *(uint32_t *) (&svga->vram[addr]); + svga->ma += 4; + } + svga->ma &= svga->vram_mask; - dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); - p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); - p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); - p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); - p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); + p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); + p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); + p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); + p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - p += 8; - } - } - } else { - changed_addr = svga->remap_func(svga, svga->ma); + p += 8; + } + } + } else { + changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - addr = svga->remap_func(svga, svga->ma); - oddeven = 0; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + addr = svga->remap_func(svga, svga->ma); + oddeven = 0; - if (svga->seqregs[1] & 4) { - oddeven = (addr & 4) ? 1 : 0; - edat[0] = svga->vram[addr | oddeven]; - edat[2] = svga->vram[addr | oddeven | 0x2]; - edat[1] = edat[3] = 0; - svga->ma += 2; - } else { - *(uint32_t *)(&edat[0]) = *(uint32_t *)(&svga->vram[addr]); - svga->ma += 4; - } - svga->ma &= svga->vram_mask; + if (svga->seqregs[1] & 4) { + oddeven = (addr & 4) ? 1 : 0; + edat[0] = svga->vram[addr | oddeven]; + edat[2] = svga->vram[addr | oddeven | 0x2]; + edat[1] = edat[3] = 0; + svga->ma += 2; + } else { + *(uint32_t *) (&edat[0]) = *(uint32_t *) (&svga->vram[addr]); + svga->ma += 4; + } + svga->ma &= svga->vram_mask; - dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); - p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); - p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); - p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); - p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; - p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); + p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2); + p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2); + p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; + dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2); + p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; + p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]]; - p += 8; - } - } - } + p += 8; + } + } + } } - void svga_render_8bpp_lowres(svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; - uint32_t changed_addr; - uint32_t addr; + uint32_t dat; + uint32_t changed_addr; + uint32_t addr; if ((svga->displine + svga->y_add) < 0) - return; + return; - if (svga->force_old_addr) { - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->force_old_addr) { + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - dat = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + dat = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]); - p[0] = p[1] = svga->map8[dat & 0xff]; - p[2] = p[3] = svga->map8[(dat >> 8) & 0xff]; - p[4] = p[5] = svga->map8[(dat >> 16) & 0xff]; - p[6] = p[7] = svga->map8[(dat >> 24) & 0xff]; + p[0] = p[1] = svga->map8[dat & 0xff]; + p[2] = p[3] = svga->map8[(dat >> 8) & 0xff]; + p[4] = p[5] = svga->map8[(dat >> 16) & 0xff]; + p[6] = p[7] = svga->map8[(dat >> 24) & 0xff]; - svga->ma += 4; - p += 8; - } - svga->ma &= svga->vram_display_mask; - } - } else { - changed_addr = svga->remap_func(svga, svga->ma); + svga->ma += 4; + p += 8; + } + svga->ma &= svga->vram_display_mask; + } + } else { + changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - if (!svga->remap_required) { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - dat = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - p[0] = p[1] = svga->map8[dat & 0xff]; - p[2] = p[3] = svga->map8[(dat >> 8) & 0xff]; - p[4] = p[5] = svga->map8[(dat >> 16) & 0xff]; - p[6] = p[7] = svga->map8[(dat >> 24) & 0xff]; + if (!svga->remap_required) { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + dat = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]); + p[0] = p[1] = svga->map8[dat & 0xff]; + p[2] = p[3] = svga->map8[(dat >> 8) & 0xff]; + p[4] = p[5] = svga->map8[(dat >> 16) & 0xff]; + p[6] = p[7] = svga->map8[(dat >> 24) & 0xff]; - svga->ma += 4; - p += 8; - } - } else { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - p[0] = p[1] = svga->map8[dat & 0xff]; - p[2] = p[3] = svga->map8[(dat >> 8) & 0xff]; - p[4] = p[5] = svga->map8[(dat >> 16) & 0xff]; - p[6] = p[7] = svga->map8[(dat >> 24) & 0xff]; + svga->ma += 4; + p += 8; + } + } else { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); + p[0] = p[1] = svga->map8[dat & 0xff]; + p[2] = p[3] = svga->map8[(dat >> 8) & 0xff]; + p[4] = p[5] = svga->map8[(dat >> 16) & 0xff]; + p[6] = p[7] = svga->map8[(dat >> 24) & 0xff]; - svga->ma += 4; - p += 8; - } - } - svga->ma &= svga->vram_display_mask; - } - } + svga->ma += 4; + p += 8; + } + } + svga->ma &= svga->vram_display_mask; + } + } } - void svga_render_8bpp_highres(svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; - uint32_t changed_addr; - uint32_t addr; + uint32_t dat; + uint32_t changed_addr; + uint32_t addr; if ((svga->displine + svga->y_add) < 0) - return; + return; - if (svga->force_old_addr) { - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->force_old_addr) { + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp/* + svga->scrollcache*/); x += 8) { - dat = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - p[0] = svga->map8[dat & 0xff]; - p[1] = svga->map8[(dat >> 8) & 0xff]; - p[2] = svga->map8[(dat >> 16) & 0xff]; - p[3] = svga->map8[(dat >> 24) & 0xff]; + for (x = 0; x <= (svga->hdisp /* + svga->scrollcache*/); x += 8) { + dat = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]); + p[0] = svga->map8[dat & 0xff]; + p[1] = svga->map8[(dat >> 8) & 0xff]; + p[2] = svga->map8[(dat >> 16) & 0xff]; + p[3] = svga->map8[(dat >> 24) & 0xff]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); - p[4] = svga->map8[dat & 0xff]; - p[5] = svga->map8[(dat >> 8) & 0xff]; - p[6] = svga->map8[(dat >> 16) & 0xff]; - p[7] = svga->map8[(dat >> 24) & 0xff]; + dat = *(uint32_t *) (&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); + p[4] = svga->map8[dat & 0xff]; + p[5] = svga->map8[(dat >> 8) & 0xff]; + p[6] = svga->map8[(dat >> 16) & 0xff]; + p[7] = svga->map8[(dat >> 24) & 0xff]; - svga->ma += 8; - p += 8; - } - svga->ma &= svga->vram_display_mask; - } - } else { - changed_addr = svga->remap_func(svga, svga->ma); + svga->ma += 8; + p += 8; + } + svga->ma &= svga->vram_display_mask; + } + } else { + changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - if (!svga->remap_required) { - for (x = 0; x <= (svga->hdisp/* + svga->scrollcache*/); x += 8) { - dat = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - p[0] = svga->map8[dat & 0xff]; - p[1] = svga->map8[(dat >> 8) & 0xff]; - p[2] = svga->map8[(dat >> 16) & 0xff]; - p[3] = svga->map8[(dat >> 24) & 0xff]; + if (!svga->remap_required) { + for (x = 0; x <= (svga->hdisp /* + svga->scrollcache*/); x += 8) { + dat = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]); + p[0] = svga->map8[dat & 0xff]; + p[1] = svga->map8[(dat >> 8) & 0xff]; + p[2] = svga->map8[(dat >> 16) & 0xff]; + p[3] = svga->map8[(dat >> 24) & 0xff]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); - p[4] = svga->map8[dat & 0xff]; - p[5] = svga->map8[(dat >> 8) & 0xff]; - p[6] = svga->map8[(dat >> 16) & 0xff]; - p[7] = svga->map8[(dat >> 24) & 0xff]; + dat = *(uint32_t *) (&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); + p[4] = svga->map8[dat & 0xff]; + p[5] = svga->map8[(dat >> 8) & 0xff]; + p[6] = svga->map8[(dat >> 16) & 0xff]; + p[7] = svga->map8[(dat >> 24) & 0xff]; - svga->ma += 8; - p += 8; - } - } else { - for (x = 0; x <= (svga->hdisp/* + svga->scrollcache*/); x += 4) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - p[0] = svga->map8[dat & 0xff]; - p[1] = svga->map8[(dat >> 8) & 0xff]; - p[2] = svga->map8[(dat >> 16) & 0xff]; - p[3] = svga->map8[(dat >> 24) & 0xff]; + svga->ma += 8; + p += 8; + } + } else { + for (x = 0; x <= (svga->hdisp /* + svga->scrollcache*/); x += 4) { + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); + p[0] = svga->map8[dat & 0xff]; + p[1] = svga->map8[(dat >> 8) & 0xff]; + p[2] = svga->map8[(dat >> 16) & 0xff]; + p[3] = svga->map8[(dat >> 24) & 0xff]; - svga->ma += 4; - p += 4; - } - } - svga->ma &= svga->vram_display_mask; - } - } + svga->ma += 4; + p += 4; + } + } + svga->ma &= svga->vram_display_mask; + } + } } void svga_render_8bpp_tseng_lowres(svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; + uint32_t dat; if ((svga->displine + svga->y_add) < 0) - return; + return; if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - dat = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[0] = p[1] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[2] = p[3] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[4] = p[5] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[6] = p[7] = svga->map8[dat & 0xff]; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + dat = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]); + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[0] = p[1] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[2] = p[3] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[4] = p[5] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[6] = p[7] = svga->map8[dat & 0xff]; - svga->ma += 4; - p += 8; - } - svga->ma &= svga->vram_display_mask; + svga->ma += 4; + p += 8; + } + svga->ma &= svga->vram_display_mask; } } - void svga_render_8bpp_tseng_highres(svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; + uint32_t dat; if ((svga->displine + svga->y_add) < 0) - return; + return; if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp/* + svga->scrollcache*/); x += 8) { - dat = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[0] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[1] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[2] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[3] = svga->map8[dat & 0xff]; + for (x = 0; x <= (svga->hdisp /* + svga->scrollcache*/); x += 8) { + dat = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]); + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[0] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[1] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[2] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[3] = svga->map8[dat & 0xff]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[4] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[5] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[6] = svga->map8[dat & 0xff]; - dat >>= 8; - if (svga->attrregs[0x10] & 0x80) - dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); - p[7] = svga->map8[dat & 0xff]; + dat = *(uint32_t *) (&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[4] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[5] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[6] = svga->map8[dat & 0xff]; + dat >>= 8; + if (svga->attrregs[0x10] & 0x80) + dat = (dat & ~0xf0) | ((svga->attrregs[0x14] & 0x0f) << 4); + p[7] = svga->map8[dat & 0xff]; - svga->ma += 8; - p += 8; - } - svga->ma &= svga->vram_display_mask; + svga->ma += 8; + p += 8; + } + svga->ma &= svga->vram_display_mask; } } - void svga_render_15bpp_lowres(svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; - uint32_t changed_addr, addr; + uint32_t dat; + uint32_t changed_addr, addr; if ((svga->displine + svga->y_add) < 0) - return; + return; if (svga->force_old_addr) { - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - p[(x << 1)] = p[(x << 1) + 1] = video_15to32[dat & 0xffff]; - p[(x << 1) + 2] = p[(x << 1) + 3] = video_15to32[dat >> 16]; + p[(x << 1)] = p[(x << 1) + 1] = video_15to32[dat & 0xffff]; + p[(x << 1) + 2] = p[(x << 1) + 3] = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - p[(x << 1) + 4] = p[(x << 1) + 5] = video_15to32[dat & 0xffff]; - p[(x << 1) + 6] = p[(x << 1) + 7] = video_15to32[dat >> 16]; - } - svga->ma += x << 1; - svga->ma &= svga->vram_display_mask; - } + p[(x << 1) + 4] = p[(x << 1) + 5] = video_15to32[dat & 0xffff]; + p[(x << 1) + 6] = p[(x << 1) + 7] = video_15to32[dat >> 16]; + } + svga->ma += x << 1; + svga->ma &= svga->vram_display_mask; + } } else { - changed_addr = svga->remap_func(svga, svga->ma); + changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - if (!svga->remap_required) { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + if (!svga->remap_required) { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; - } - svga->ma += x << 1; - } else { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 2) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; + } + svga->ma += x << 1; + } else { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 2) { + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; - svga->ma += 4; - } - } - svga->ma &= svga->vram_display_mask; - } + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; + svga->ma += 4; + } + } + svga->ma &= svga->vram_display_mask; + } } } - void svga_render_15bpp_highres(svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; - uint32_t changed_addr, addr; + uint32_t dat; + uint32_t changed_addr, addr; if ((svga->displine + svga->y_add) < 0) - return; + return; if (svga->force_old_addr) { - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - p[x] = video_15to32[dat & 0xffff]; - p[x + 1] = video_15to32[dat >> 16]; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + p[x] = video_15to32[dat & 0xffff]; + p[x + 1] = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - p[x + 2] = video_15to32[dat & 0xffff]; - p[x + 3] = video_15to32[dat >> 16]; + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + p[x + 2] = video_15to32[dat & 0xffff]; + p[x + 3] = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); - p[x + 4] = video_15to32[dat & 0xffff]; - p[x + 5] = video_15to32[dat >> 16]; + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); + p[x + 4] = video_15to32[dat & 0xffff]; + p[x + 5] = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); - p[x + 6] = video_15to32[dat & 0xffff]; - p[x + 7] = video_15to32[dat >> 16]; - } - svga->ma += x << 1; - svga->ma &= svga->vram_display_mask; - } + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); + p[x + 6] = video_15to32[dat & 0xffff]; + p[x + 7] = video_15to32[dat >> 16]; + } + svga->ma += x << 1; + svga->ma &= svga->vram_display_mask; + } } else { - changed_addr = svga->remap_func(svga, svga->ma); + changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - if (!svga->remap_required) { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; + if (!svga->remap_required) { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; - } - svga->ma += x << 1; - } else { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 2) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; + } + svga->ma += x << 1; + } else { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 2) { + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); - *p++ = video_15to32[dat & 0xffff]; - *p++ = video_15to32[dat >> 16]; - svga->ma += 4; - } - } - svga->ma &= svga->vram_display_mask; - } + *p++ = video_15to32[dat & 0xffff]; + *p++ = video_15to32[dat >> 16]; + svga->ma += 4; + } + } + svga->ma &= svga->vram_display_mask; + } } } - void svga_render_15bpp_mix_lowres(svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; + uint32_t dat; if ((svga->displine + svga->y_add) < 0) - return; + return; if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - p[(x << 1)] = p[(x << 1) + 1] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + p[(x << 1)] = p[(x << 1) + 1] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat >>= 16; - p[(x << 1) + 2] = p[(x << 1) + 3] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat >>= 16; + p[(x << 1) + 2] = p[(x << 1) + 3] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - p[(x << 1) + 4] = p[(x << 1) + 5] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + p[(x << 1) + 4] = p[(x << 1) + 5] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat >>= 16; - p[(x << 1) + 6] = p[(x << 1) + 7] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - } - svga->ma += x << 1; - svga->ma &= svga->vram_display_mask; + dat >>= 16; + p[(x << 1) + 6] = p[(x << 1) + 7] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + } + svga->ma += x << 1; + svga->ma &= svga->vram_display_mask; } } - void svga_render_15bpp_mix_highres(svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; + uint32_t dat; if ((svga->displine + svga->y_add) < 0) - return; + return; if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - p[x] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat >>= 16; - p[x + 1] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + p[x] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat >>= 16; + p[x + 1] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - p[x + 2] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat >>= 16; - p[x + 3] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + p[x + 2] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat >>= 16; + p[x + 3] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); - p[x + 4] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat >>= 16; - p[x + 5] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); + p[x + 4] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat >>= 16; + p[x + 5] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); - p[x + 6] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - dat >>= 16; - p[x + 7] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; - } - svga->ma += x << 1; - svga->ma &= svga->vram_display_mask; + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); + p[x + 6] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + dat >>= 16; + p[x + 7] = (dat & 0x00008000) ? svga->pallook[dat & 0xff] : video_15to32[dat & 0xffff]; + } + svga->ma += x << 1; + svga->ma &= svga->vram_display_mask; } } - void svga_render_16bpp_lowres(svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; - uint32_t changed_addr, addr; + uint32_t dat; + uint32_t changed_addr, addr; if ((svga->displine + svga->y_add) < 0) - return; + return; - if (svga->force_old_addr) { - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->force_old_addr) { + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - p[(x << 1)] = p[(x << 1) + 1] = video_16to32[dat & 0xffff]; - p[(x << 1) + 2] = p[(x << 1) + 3] = video_16to32[dat >> 16]; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + p[(x << 1)] = p[(x << 1) + 1] = video_16to32[dat & 0xffff]; + p[(x << 1) + 2] = p[(x << 1) + 3] = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - p[(x << 1) + 4] = p[(x << 1) + 5] = video_16to32[dat & 0xffff]; - p[(x << 1) + 6] = p[(x << 1) + 7] = video_16to32[dat >> 16]; - } - svga->ma += x << 1; - svga->ma &= svga->vram_display_mask; - } - } else { - changed_addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + p[(x << 1) + 4] = p[(x << 1) + 5] = video_16to32[dat & 0xffff]; + p[(x << 1) + 6] = p[(x << 1) + 7] = video_16to32[dat >> 16]; + } + svga->ma += x << 1; + svga->ma &= svga->vram_display_mask; + } + } else { + changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - if (!svga->remap_required) { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + if (!svga->remap_required) { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - *p++ = video_16to32[dat & 0xffff]; - *p++ = video_16to32[dat >> 16]; + *p++ = video_16to32[dat & 0xffff]; + *p++ = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - *p++ = video_16to32[dat & 0xffff]; - *p++ = video_16to32[dat >> 16]; - } - svga->ma += x << 1; - } else { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 2) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + *p++ = video_16to32[dat & 0xffff]; + *p++ = video_16to32[dat >> 16]; + } + svga->ma += x << 1; + } else { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 2) { + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); - *p++ = video_16to32[dat & 0xffff]; - *p++ = video_16to32[dat >> 16]; - } - svga->ma += 4; - } - svga->ma &= svga->vram_display_mask; - } - } + *p++ = video_16to32[dat & 0xffff]; + *p++ = video_16to32[dat >> 16]; + } + svga->ma += 4; + } + svga->ma &= svga->vram_display_mask; + } + } } - void svga_render_16bpp_highres(svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; - uint32_t changed_addr, addr; + uint32_t dat; + uint32_t changed_addr, addr; if ((svga->displine + svga->y_add) < 0) - return; + return; - if (svga->force_old_addr) { - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->force_old_addr) { + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - uint32_t dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - p[x] = video_16to32[dat & 0xffff]; - p[x + 1] = video_16to32[dat >> 16]; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + uint32_t dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + p[x] = video_16to32[dat & 0xffff]; + p[x + 1] = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - p[x + 2] = video_16to32[dat & 0xffff]; - p[x + 3] = video_16to32[dat >> 16]; + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + p[x + 2] = video_16to32[dat & 0xffff]; + p[x + 3] = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); - p[x + 4] = video_16to32[dat & 0xffff]; - p[x + 5] = video_16to32[dat >> 16]; + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); + p[x + 4] = video_16to32[dat & 0xffff]; + p[x + 5] = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); - p[x + 6] = video_16to32[dat & 0xffff]; - p[x + 7] = video_16to32[dat >> 16]; - } - svga->ma += x << 1; - svga->ma &= svga->vram_display_mask; + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); + p[x + 6] = video_16to32[dat & 0xffff]; + p[x + 7] = video_16to32[dat >> 16]; + } + svga->ma += x << 1; + svga->ma &= svga->vram_display_mask; + } + } else { + changed_addr = svga->remap_func(svga, svga->ma); + + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; + + if (!svga->remap_required) { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); + *p++ = video_16to32[dat & 0xffff]; + *p++ = video_16to32[dat >> 16]; + + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); + *p++ = video_16to32[dat & 0xffff]; + *p++ = video_16to32[dat >> 16]; + + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); + *p++ = video_16to32[dat & 0xffff]; + *p++ = video_16to32[dat >> 16]; + + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); + *p++ = video_16to32[dat & 0xffff]; + *p++ = video_16to32[dat >> 16]; + } + svga->ma += x << 1; + } else { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 2) { + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); + + *p++ = video_16to32[dat & 0xffff]; + *p++ = video_16to32[dat >> 16]; + + svga->ma += 4; + } + } + svga->ma &= svga->vram_display_mask; + } } - } else { - changed_addr = svga->remap_func(svga, svga->ma); - - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; - - if (!svga->remap_required) { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1)) & svga->vram_display_mask]); - *p++ = video_16to32[dat & 0xffff]; - *p++ = video_16to32[dat >> 16]; - - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 4) & svga->vram_display_mask]); - *p++ = video_16to32[dat & 0xffff]; - *p++ = video_16to32[dat >> 16]; - - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 8) & svga->vram_display_mask]); - *p++ = video_16to32[dat & 0xffff]; - *p++ = video_16to32[dat >> 16]; - - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 1) + 12) & svga->vram_display_mask]); - *p++ = video_16to32[dat & 0xffff]; - *p++ = video_16to32[dat >> 16]; - } - svga->ma += x << 1; - } else { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 2) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - - *p++ = video_16to32[dat & 0xffff]; - *p++ = video_16to32[dat >> 16]; - - svga->ma += 4; - } - } - svga->ma &= svga->vram_display_mask; - } - } } - void svga_render_24bpp_lowres(svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t changed_addr, addr; - uint32_t dat0, dat1, dat2; - uint32_t fg; + uint32_t changed_addr, addr; + uint32_t dat0, dat1, dat2; + uint32_t fg; if ((svga->displine + svga->y_add) < 0) - return; + return; - if (svga->force_old_addr) { - if ((svga->displine + svga->y_add) < 0) - return; + if (svga->force_old_addr) { + if ((svga->displine + svga->y_add) < 0) + return; - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - fg = svga->vram[svga->ma] | (svga->vram[svga->ma + 1] << 8) | (svga->vram[svga->ma + 2] << 16); - svga->ma += 3; - svga->ma &= svga->vram_display_mask; - buffer32->line[svga->displine + svga->y_add][(x << 1) + svga->x_add] = - buffer32->line[svga->displine + svga->y_add][(x << 1) + 1 + svga->x_add] = fg; - } - } - } else { - changed_addr = svga->remap_func(svga, svga->ma); + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + fg = svga->vram[svga->ma] | (svga->vram[svga->ma + 1] << 8) | (svga->vram[svga->ma + 2] << 16); + svga->ma += 3; + svga->ma &= svga->vram_display_mask; + buffer32->line[svga->displine + svga->y_add][(x << 1) + svga->x_add] = buffer32->line[svga->displine + svga->y_add][(x << 1) + 1 + svga->x_add] = fg; + } + } + } else { + changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - if (!svga->remap_required) { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - dat0 = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - dat1 = *(uint32_t *)(&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); - dat2 = *(uint32_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); + if (!svga->remap_required) { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + dat0 = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]); + dat1 = *(uint32_t *) (&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); + dat2 = *(uint32_t *) (&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); - p[0] = p[1] = dat0 & 0xffffff; - p[2] = p[3] = (dat0 >> 24) | ((dat1 & 0xffff) << 8); - p[4] = p[5] = (dat1 >> 16) | ((dat2 & 0xff) << 16); - p[6] = p[7] = dat2 >> 8; + p[0] = p[1] = dat0 & 0xffffff; + p[2] = p[3] = (dat0 >> 24) | ((dat1 & 0xffff) << 8); + p[4] = p[5] = (dat1 >> 16) | ((dat2 & 0xff) << 16); + p[6] = p[7] = dat2 >> 8; - svga->ma += 12; - } - } else { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - addr = svga->remap_func(svga, svga->ma); - dat0 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - addr = svga->remap_func(svga, svga->ma + 4); - dat1 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - addr = svga->remap_func(svga, svga->ma + 8); - dat2 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + svga->ma += 12; + } + } else { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { + addr = svga->remap_func(svga, svga->ma); + dat0 = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); + addr = svga->remap_func(svga, svga->ma + 4); + dat1 = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); + addr = svga->remap_func(svga, svga->ma + 8); + dat2 = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); - p[0] = p[1] = dat0 & 0xffffff; - p[2] = p[3] = (dat0 >> 24) | ((dat1 & 0xffff) << 8); - p[4] = p[5] = (dat1 >> 16) | ((dat2 & 0xff) << 16); - p[6] = p[7] = dat2 >> 8; + p[0] = p[1] = dat0 & 0xffffff; + p[2] = p[3] = (dat0 >> 24) | ((dat1 & 0xffff) << 8); + p[4] = p[5] = (dat1 >> 16) | ((dat2 & 0xff) << 16); + p[6] = p[7] = dat2 >> 8; - svga->ma += 12; - } - } - svga->ma &= svga->vram_display_mask; - } - } + svga->ma += 12; + } + } + svga->ma &= svga->vram_display_mask; + } + } } - void svga_render_24bpp_highres(svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t changed_addr, addr; - uint32_t dat0, dat1, dat2; - uint32_t dat; + uint32_t changed_addr, addr; + uint32_t dat0, dat1, dat2; + uint32_t dat; if ((svga->displine + svga->y_add) < 0) - return; + return; - if (svga->force_old_addr) { - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->force_old_addr) { + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - dat = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - p[x] = dat & 0xffffff; + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { + dat = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]); + p[x] = dat & 0xffffff; - dat = *(uint32_t *)(&svga->vram[(svga->ma + 3) & svga->vram_display_mask]); - p[x + 1] = dat & 0xffffff; + dat = *(uint32_t *) (&svga->vram[(svga->ma + 3) & svga->vram_display_mask]); + p[x + 1] = dat & 0xffffff; - dat = *(uint32_t *)(&svga->vram[(svga->ma + 6) & svga->vram_display_mask]); - p[x + 2] = dat & 0xffffff; + dat = *(uint32_t *) (&svga->vram[(svga->ma + 6) & svga->vram_display_mask]); + p[x + 2] = dat & 0xffffff; - dat = *(uint32_t *)(&svga->vram[(svga->ma + 9) & svga->vram_display_mask]); - p[x + 3] = dat & 0xffffff; + dat = *(uint32_t *) (&svga->vram[(svga->ma + 9) & svga->vram_display_mask]); + p[x + 3] = dat & 0xffffff; - svga->ma += 12; - } - svga->ma &= svga->vram_display_mask; - } - } else { - changed_addr = svga->remap_func(svga, svga->ma); + svga->ma += 12; + } + svga->ma &= svga->vram_display_mask; + } + } else { + changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - if (!svga->remap_required) { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - dat0 = *(uint32_t *)(&svga->vram[svga->ma & svga->vram_display_mask]); - dat1 = *(uint32_t *)(&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); - dat2 = *(uint32_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); + if (!svga->remap_required) { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { + dat0 = *(uint32_t *) (&svga->vram[svga->ma & svga->vram_display_mask]); + dat1 = *(uint32_t *) (&svga->vram[(svga->ma + 4) & svga->vram_display_mask]); + dat2 = *(uint32_t *) (&svga->vram[(svga->ma + 8) & svga->vram_display_mask]); - *p++ = dat0 & 0xffffff; - *p++ = (dat0 >> 24) | ((dat1 & 0xffff) << 8); - *p++ = (dat1 >> 16) | ((dat2 & 0xff) << 16); - *p++ = dat2 >> 8; + *p++ = dat0 & 0xffffff; + *p++ = (dat0 >> 24) | ((dat1 & 0xffff) << 8); + *p++ = (dat1 >> 16) | ((dat2 & 0xff) << 16); + *p++ = dat2 >> 8; - svga->ma += 12; - } - } else { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { - addr = svga->remap_func(svga, svga->ma); - dat0 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - addr = svga->remap_func(svga, svga->ma + 4); - dat1 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - addr = svga->remap_func(svga, svga->ma + 8); - dat2 = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); + svga->ma += 12; + } + } else { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 4) { + addr = svga->remap_func(svga, svga->ma); + dat0 = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); + addr = svga->remap_func(svga, svga->ma + 4); + dat1 = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); + addr = svga->remap_func(svga, svga->ma + 8); + dat2 = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); - *p++ = dat0 & 0xffffff; - *p++ = (dat0 >> 24) | ((dat1 & 0xffff) << 8); - *p++ = (dat1 >> 16) | ((dat2 & 0xff) << 16); - *p++ = dat2 >> 8; + *p++ = dat0 & 0xffffff; + *p++ = (dat0 >> 24) | ((dat1 & 0xffff) << 8); + *p++ = (dat1 >> 16) | ((dat2 & 0xff) << 16); + *p++ = dat2 >> 8; - svga->ma += 12; - } - } - svga->ma &= svga->vram_display_mask; - } - } + svga->ma += 12; + } + } + svga->ma &= svga->vram_display_mask; + } + } } - void svga_render_32bpp_lowres(svga_t *svga) { - int x; - uint32_t *p; - uint32_t dat; - uint32_t changed_addr, addr; + int x; + uint32_t *p; + uint32_t dat; + uint32_t changed_addr, addr; if ((svga->displine + svga->y_add) < 0) - return; + return; - if (svga->force_old_addr) { - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->force_old_addr) { + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->fullchange) { + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - dat = svga->vram[svga->ma] | (svga->vram[svga->ma + 1] << 8) | (svga->vram[svga->ma + 2] << 16); - svga->ma += 4; - svga->ma &= svga->vram_display_mask; - buffer32->line[svga->displine + svga->y_add][(x << 1) + svga->x_add] = - buffer32->line[svga->displine + svga->y_add][(x << 1) + 1 + svga->x_add] = dat; - } - } - } else { - changed_addr = svga->remap_func(svga, svga->ma); + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + dat = svga->vram[svga->ma] | (svga->vram[svga->ma + 1] << 8) | (svga->vram[svga->ma + 2] << 16); + svga->ma += 4; + svga->ma &= svga->vram_display_mask; + buffer32->line[svga->displine + svga->y_add][(x << 1) + svga->x_add] = buffer32->line[svga->displine + svga->y_add][(x << 1) + 1 + svga->x_add] = dat; + } + } + } else { + changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - if (!svga->remap_required) { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); - *p++ = dat & 0xffffff; - *p++ = dat & 0xffffff; - } - svga->ma += (x * 4); - } else { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - *p++ = dat & 0xffffff; - *p++ = dat & 0xffffff; - svga->ma += 4; - } - svga->ma &= svga->vram_display_mask; - } - } - } + if (!svga->remap_required) { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); + *p++ = dat & 0xffffff; + *p++ = dat & 0xffffff; + } + svga->ma += (x * 4); + } else { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); + *p++ = dat & 0xffffff; + *p++ = dat & 0xffffff; + svga->ma += 4; + } + svga->ma &= svga->vram_display_mask; + } + } + } } - void svga_render_32bpp_highres(svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; - uint32_t changed_addr, addr; + uint32_t dat; + uint32_t changed_addr, addr; if ((svga->displine + svga->y_add) < 0) - return; + return; - if (svga->force_old_addr) { - if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->changedvram[(svga->ma >> 12) + 2] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->force_old_addr) { + if (svga->changedvram[svga->ma >> 12] || svga->changedvram[(svga->ma >> 12) + 1] || svga->changedvram[(svga->ma >> 12) + 2] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); - p[x] = dat & 0xffffff; - } - svga->ma += 4; - svga->ma &= svga->vram_display_mask; - } - } else { - changed_addr = svga->remap_func(svga, svga->ma); + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); + p[x] = dat & 0xffffff; + } + svga->ma += 4; + svga->ma &= svga->vram_display_mask; + } + } else { + changed_addr = svga->remap_func(svga, svga->ma); - if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - if (!svga->remap_required) { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); - *p++ = dat & 0xffffff; - } - svga->ma += (x * 4); - } else { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - *p++ = dat & 0xffffff; + if (!svga->remap_required) { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); + *p++ = dat & 0xffffff; + } + svga->ma += (x * 4); + } else { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); + *p++ = dat & 0xffffff; - svga->ma += 4; - } - } - svga->ma &= svga->vram_display_mask; - } - } + svga->ma += 4; + } + } + svga->ma &= svga->vram_display_mask; + } + } } - void svga_render_ABGR8888_highres(svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; - uint32_t changed_addr, addr; + uint32_t dat; + uint32_t changed_addr, addr; if ((svga->displine + svga->y_add) < 0) - return; + return; - changed_addr = svga->remap_func(svga, svga->ma); + changed_addr = svga->remap_func(svga, svga->ma); if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - if (!svga->remap_required) { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); - *p++ = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16); - } - svga->ma += x*4; - } else { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - *p++ = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16); + if (!svga->remap_required) { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); + *p++ = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16); + } + svga->ma += x * 4; + } else { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); + *p++ = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16); - svga->ma += 4; - } - } - svga->ma &= svga->vram_display_mask; + svga->ma += 4; + } + } + svga->ma &= svga->vram_display_mask; } } - void svga_render_RGBA8888_highres(svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; - uint32_t changed_addr, addr; + uint32_t dat; + uint32_t changed_addr, addr; if ((svga->displine + svga->y_add) < 0) - return; + return; - changed_addr = svga->remap_func(svga, svga->ma); + changed_addr = svga->remap_func(svga, svga->ma); if (svga->changedvram[changed_addr >> 12] || svga->changedvram[(changed_addr >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; + p = &buffer32->line[svga->displine + svga->y_add][svga->x_add]; - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; - if (!svga->remap_required) { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - dat = *(uint32_t *)(&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); - *p++ = dat >> 8; - } - svga->ma += (x * 4); - } else { - for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { - addr = svga->remap_func(svga, svga->ma); - dat = *(uint32_t *)(&svga->vram[addr & svga->vram_display_mask]); - *p++ = dat >> 8; + if (!svga->remap_required) { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + dat = *(uint32_t *) (&svga->vram[(svga->ma + (x << 2)) & svga->vram_display_mask]); + *p++ = dat >> 8; + } + svga->ma += (x * 4); + } else { + for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) { + addr = svga->remap_func(svga, svga->ma); + dat = *(uint32_t *) (&svga->vram[addr & svga->vram_display_mask]); + *p++ = dat >> 8; - svga->ma += 4; - } - } - svga->ma &= svga->vram_display_mask; + svga->ma += 4; + } + } + svga->ma &= svga->vram_display_mask; } } diff --git a/src/video/vid_table.c b/src/video/vid_table.c index 5f53f4d8a..8a44ac075 100644 --- a/src/video/vid_table.c +++ b/src/video/vid_table.c @@ -37,47 +37,45 @@ #include <86box/vid_colorplus.h> #include <86box/vid_mda.h> - typedef struct { - const device_t *device; - int flags; + const device_t *device; + int flags; } VIDEO_CARD; - -static video_timings_t timing_default = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; +static video_timings_t timing_default = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; static int was_reset = 0; static const device_t vid_none_device = { - .name = "None", + .name = "None", .internal_name = "none", - .flags = 0, - .local = 0, - .init = NULL, - .close = NULL, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = NULL, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; static const device_t vid_internal_device = { - .name = "Internal", + .name = "Internal", .internal_name = "internal", - .flags = 0, - .local = 0, - .init = NULL, - .close = NULL, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = NULL, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; +// clang-format off static const VIDEO_CARD video_cards[] = { -// clang-format off { &vid_none_device }, { &vid_internal_device }, { &atiega_device }, @@ -252,30 +250,27 @@ video_cards[] = { { &voodoo_3_2000_agp_device }, { &voodoo_3_3000_agp_device }, { NULL } -// clang-format off }; - +// clang-format on #ifdef ENABLE_VID_TABLE_LOG int vid_table_do_log = ENABLE_VID_TABLE_LOG; - static void vid_table_log(const char *fmt, ...) { va_list ap; if (vid_table_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define vid_table_log(fmt, ...) +# define vid_table_log(fmt, ...) #endif - void video_reset_close(void) { @@ -287,14 +282,13 @@ video_reset_close(void) was_reset = 0; } - static void video_prepare(void) { /* Reset (deallocate) the video font arrays. */ if (fontdatksc5601) { - free(fontdatksc5601); - fontdatksc5601 = NULL; + free(fontdatksc5601); + fontdatksc5601 = NULL; } /* Reset the blend. */ @@ -302,7 +296,8 @@ video_prepare(void) for (int i = 0; i < MONITORS_NUM; i++) { /* Reset the CGA palette. */ - if (monitors[i].mon_cga_palette) *monitors[i].mon_cga_palette = 0; + if (monitors[i].mon_cga_palette) + *monitors[i].mon_cga_palette = 0; cgapal_rebuild_monitor(i); /* Do an inform on the default values, so that that there's some sane values initialized @@ -311,38 +306,34 @@ video_prepare(void) } } - void video_pre_reset(int card) { - if ((card == VID_NONE) || \ - (card == VID_INTERNAL) || machine_has_flags(machine, MACHINE_VIDEO_ONLY)) - video_prepare(); + if ((card == VID_NONE) || (card == VID_INTERNAL) || machine_has_flags(machine, MACHINE_VIDEO_ONLY)) + video_prepare(); } - void video_reset(int card) { /* This is needed to avoid duplicate resets. */ if ((video_get_type() != VIDEO_FLAG_TYPE_NONE) && was_reset) - return; + return; vid_table_log("VIDEO: reset (gfxcard=%d, internal=%d)\n", - card, machine_has_flags(machine, MACHINE_VIDEO) ? 1 : 0); + card, machine_has_flags(machine, MACHINE_VIDEO) ? 1 : 0); monitor_index_global = 0; loadfont("roms/video/mda/mda.rom", 0); /* Do not initialize internal cards here. */ - if (!(card == VID_NONE) && \ - !(card == VID_INTERNAL) && !machine_has_flags(machine, MACHINE_VIDEO_ONLY)) { - vid_table_log("VIDEO: initializing '%s'\n", video_cards[card].name); + if (!(card == VID_NONE) && !(card == VID_INTERNAL) && !machine_has_flags(machine, MACHINE_VIDEO_ONLY)) { + vid_table_log("VIDEO: initializing '%s'\n", video_cards[card].name); - video_prepare(); + video_prepare(); - /* Initialize the video card. */ - device_add(video_cards[card].device); + /* Initialize the video card. */ + device_add(video_cards[card].device); } if (!(card == VID_NONE) @@ -358,19 +349,18 @@ video_reset(int card) /* Enable the Voodoo if configured. */ if (voodoo_enabled) - device_add(&voodoo_device); + device_add(&voodoo_device); was_reset = 1; } - int video_card_available(int card) { if (video_cards[card].device) - return(device_available(video_cards[card].device)); + return (device_available(video_cards[card].device)); - return(1); + return (1); } int @@ -382,55 +372,50 @@ video_card_get_flags(int card) const device_t * video_card_getdevice(int card) { - return(video_cards[card].device); + return (video_cards[card].device); } - int video_card_has_config(int card) { - if (video_cards[card].device == NULL) return(0); + if (video_cards[card].device == NULL) + return (0); - return(device_has_config(video_cards[card].device) ? 1 : 0); + return (device_has_config(video_cards[card].device) ? 1 : 0); } - char * video_get_internal_name(int card) { return device_get_internal_name(video_cards[card].device); } - int video_get_video_from_internal_name(char *s) { int c = 0; while (video_cards[c].device != NULL) { - if (!strcmp((char *) video_cards[c].device->internal_name, s)) - return(c); - c++; + if (!strcmp((char *) video_cards[c].device->internal_name, s)) + return (c); + c++; } - return(0); + return (0); } - int video_is_mda(void) { return (video_get_type() == VIDEO_FLAG_TYPE_MDA); } - int video_is_cga(void) { return (video_get_type() == VIDEO_FLAG_TYPE_CGA); } - int video_is_ega_vga(void) { diff --git a/src/video/vid_tgui9440.c b/src/video/vid_tgui9440.c index bac0242e1..af7ffb3de 100644 --- a/src/video/vid_tgui9440.c +++ b/src/video/vid_tgui9440.c @@ -75,115 +75,113 @@ #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> -#define ROM_TGUI_9400CXI "roms/video/tgui9440/9400CXI.VBI" -#define ROM_TGUI_9440 "roms/video/tgui9440/BIOS.BIN" -#define ROM_TGUI_96xx "roms/video/tgui9660/Union.VBI" +#define ROM_TGUI_9400CXI "roms/video/tgui9440/9400CXI.VBI" +#define ROM_TGUI_9440 "roms/video/tgui9440/BIOS.BIN" +#define ROM_TGUI_96xx "roms/video/tgui9660/Union.VBI" #define EXT_CTRL_16BIT 0x01 #define EXT_CTRL_MONO_EXPANSION 0x02 #define EXT_CTRL_MONO_TRANSPARENT 0x04 #define EXT_CTRL_LATCH_COPY 0x08 -enum -{ - TGUI_9400CXI = 0, - TGUI_9440, - TGUI_9660, - TGUI_9680 +enum { + TGUI_9400CXI = 0, + TGUI_9440, + TGUI_9660, + TGUI_9680 }; -#define ONBOARD 0x0100 +#define ONBOARD 0x0100 -typedef struct tgui_t -{ - mem_mapping_t linear_mapping; - mem_mapping_t accel_mapping; - mem_mapping_t mmio_mapping; +typedef struct tgui_t { + mem_mapping_t linear_mapping; + mem_mapping_t accel_mapping; + mem_mapping_t mmio_mapping; - rom_t bios_rom; + rom_t bios_rom; - svga_t svga; - int pci; + svga_t svga; + int pci; - int type, card; + int type, card; - uint8_t int_line; - uint8_t pci_regs[256]; + uint8_t int_line; + uint8_t pci_regs[256]; - struct - { - int16_t src_x, src_y; - int16_t src_x_clip, src_y_clip; - int16_t dst_x, dst_y; - int16_t dst_y_clip, dst_x_clip; - int16_t size_x, size_y; - uint16_t sv_size_y; - uint16_t patloc; - uint32_t fg_col, bg_col; - uint32_t style, ckey; - uint8_t rop; - uint32_t flags; - uint8_t pattern[0x80]; - int command; - int offset; - uint16_t ger22; + struct + { + int16_t src_x, src_y; + int16_t src_x_clip, src_y_clip; + int16_t dst_x, dst_y; + int16_t dst_y_clip, dst_x_clip; + int16_t size_x, size_y; + uint16_t sv_size_y; + uint16_t patloc; + uint32_t fg_col, bg_col; + uint32_t style, ckey; + uint8_t rop; + uint32_t flags; + uint8_t pattern[0x80]; + int command; + int offset; + uint16_t ger22; - int16_t err, top, left, bottom, right; - int x, y, dx, dy; - uint32_t src, dst, src_old, dst_old; - int pat_x, pat_y; - int use_src; + int16_t err, top, left, bottom, right; + int x, y, dx, dy; + uint32_t src, dst, src_old, dst_old; + int pat_x, pat_y; + int use_src; - int pitch, bpp; - uint32_t fill_pattern[8*8]; - uint32_t mono_pattern[8*8]; - uint32_t pattern_8[8*8]; - uint32_t pattern_16[8*8]; - uint32_t pattern_32[8*8]; - } accel; + int pitch, bpp; + uint32_t fill_pattern[8 * 8]; + uint32_t mono_pattern[8 * 8]; + uint32_t pattern_8[8 * 8]; + uint32_t pattern_16[8 * 8]; + uint32_t pattern_32[8 * 8]; + } accel; - uint8_t ext_gdc_regs[16]; /*TGUI9400CXi only*/ - uint8_t copy_latch[16]; + uint8_t ext_gdc_regs[16]; /*TGUI9400CXi only*/ + uint8_t copy_latch[16]; - uint8_t tgui_3d8, tgui_3d9; - int oldmode; - uint8_t oldctrl1, newctrl1; - uint8_t oldctrl2, newctrl2; - uint8_t oldgr0e, newgr0e; + uint8_t tgui_3d8, tgui_3d9; + int oldmode; + uint8_t oldctrl1, newctrl1; + uint8_t oldctrl2, newctrl2; + uint8_t oldgr0e, newgr0e; - uint32_t linear_base, linear_size, ge_base, - mmio_base; - uint32_t hwc_fg_col, hwc_bg_col; + uint32_t linear_base, linear_size, ge_base, + mmio_base; + uint32_t hwc_fg_col, hwc_bg_col; - int ramdac_state; - uint8_t ramdac_ctrl; + int ramdac_state; + uint8_t ramdac_ctrl; - int clock_m, clock_n, clock_k; + int clock_m, clock_n, clock_k; - uint32_t vram_size, vram_mask; + uint32_t vram_size, vram_mask; - volatile int write_blitter; - void *i2c, *ddc; + volatile int write_blitter; + void *i2c, *ddc; - int has_bios; + int has_bios; } tgui_t; -video_timings_t timing_tgui_vlb = {VIDEO_BUS, 4, 8, 16, 4, 8, 16}; -video_timings_t timing_tgui_pci = {VIDEO_PCI, 4, 8, 16, 4, 8, 16}; +video_timings_t timing_tgui_vlb = { .type = VIDEO_BUS, .write_b = 4, .write_w = 8, .write_l = 16, .read_b = 4, .read_w = 8, .read_l = 16 }; +video_timings_t timing_tgui_pci = { .type = VIDEO_PCI, .write_b = 4, .write_w = 8, .write_l = 16, .read_b = 4, .read_w = 8, .read_l = 16 }; -static void tgui_out(uint16_t addr, uint8_t val, void *p); +static void tgui_out(uint16_t addr, uint8_t val, void *p); static uint8_t tgui_in(uint16_t addr, void *p); static void tgui_recalcmapping(tgui_t *tgui); -static void tgui_accel_out(uint16_t addr, uint8_t val, void *p); -static void tgui_accel_out_w(uint16_t addr, uint16_t val, void *p); -static void tgui_accel_out_l(uint16_t addr, uint32_t val, void *p); -static uint8_t tgui_accel_in(uint16_t addr, void *p); +static void tgui_accel_out(uint16_t addr, uint8_t val, void *p); +static void tgui_accel_out_w(uint16_t addr, uint16_t val, void *p); +static void tgui_accel_out_l(uint16_t addr, uint32_t val, void *p); +static uint8_t tgui_accel_in(uint16_t addr, void *p); static uint16_t tgui_accel_in_w(uint16_t addr, void *p); static uint32_t tgui_accel_in_l(uint16_t addr, void *p); -static uint8_t tgui_accel_read(uint32_t addr, void *priv); +static uint8_t tgui_accel_read(uint32_t addr, void *priv); static uint16_t tgui_accel_read_w(uint32_t addr, void *priv); static uint32_t tgui_accel_read_l(uint32_t addr, void *priv); @@ -196,2985 +194,3372 @@ static void tgui_accel_write_fb_w(uint32_t addr, uint16_t val, void *priv); static void tgui_accel_write_fb_l(uint32_t addr, uint32_t val, void *priv); static uint8_t tgui_ext_linear_read(uint32_t addr, void *p); -static void tgui_ext_linear_write(uint32_t addr, uint8_t val, void *p); -static void tgui_ext_linear_writew(uint32_t addr, uint16_t val, void *p); -static void tgui_ext_linear_writel(uint32_t addr, uint32_t val, void *p); +static void tgui_ext_linear_write(uint32_t addr, uint8_t val, void *p); +static void tgui_ext_linear_writew(uint32_t addr, uint16_t val, void *p); +static void tgui_ext_linear_writel(uint32_t addr, uint32_t val, void *p); static uint8_t tgui_ext_read(uint32_t addr, void *p); -static void tgui_ext_write(uint32_t addr, uint8_t val, void *p); -static void tgui_ext_writew(uint32_t addr, uint16_t val, void *p); -static void tgui_ext_writel(uint32_t addr, uint32_t val, void *p); - +static void tgui_ext_write(uint32_t addr, uint8_t val, void *p); +static void tgui_ext_writew(uint32_t addr, uint16_t val, void *p); +static void tgui_ext_writel(uint32_t addr, uint32_t val, void *p); /*Remap address for chain-4/doubleword style layout*/ static __inline uint32_t dword_remap(svga_t *svga, uint32_t in_addr) { - if (svga->packed_chain4) - return in_addr; + if (svga->packed_chain4) + return in_addr; - return ((in_addr << 2) & 0x3fff0) | - ((in_addr >> 14) & 0xc) | - (in_addr & ~0x3fffc); + return ((in_addr << 2) & 0x3fff0) | ((in_addr >> 14) & 0xc) | (in_addr & ~0x3fffc); } static void tgui_update_irqs(tgui_t *tgui) { - if (!tgui->pci) - return; + if (!tgui->pci) + return; - if (!(tgui->oldctrl1 & 0x40)) { - pci_set_irq(tgui->card, PCI_INTA); - } else { - pci_clear_irq(tgui->card, PCI_INTA); - } + if (!(tgui->oldctrl1 & 0x40)) { + pci_set_irq(tgui->card, PCI_INTA); + } else { + pci_clear_irq(tgui->card, PCI_INTA); + } } static void tgui_remove_io(tgui_t *tgui) { - io_removehandler(0x03c0, 0x0020, tgui_in, NULL, NULL, tgui_out, NULL, NULL, tgui); - if (tgui->type >= TGUI_9440) { - io_removehandler(0x43c6, 0x0004, tgui_in, NULL, NULL, tgui_out, NULL, NULL, tgui); - io_removehandler(0x83c6, 0x0003, tgui_in, NULL, NULL, tgui_out, NULL, NULL, tgui); - io_removehandler(0x2120, 0x0001, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x2122, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x2124, 0x0001, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x2127, 0x0001, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x2128, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x212c, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x2130, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x2134, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x2138, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x213a, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x213c, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x213e, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x2140, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x2142, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x2144, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x2148, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x2168, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x2178, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x217c, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_removehandler(0x2180, 0x0080, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - } + io_removehandler(0x03c0, 0x0020, tgui_in, NULL, NULL, tgui_out, NULL, NULL, tgui); + if (tgui->type >= TGUI_9440) { + io_removehandler(0x43c6, 0x0004, tgui_in, NULL, NULL, tgui_out, NULL, NULL, tgui); + io_removehandler(0x83c6, 0x0003, tgui_in, NULL, NULL, tgui_out, NULL, NULL, tgui); + io_removehandler(0x2120, 0x0001, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x2122, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x2124, 0x0001, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x2127, 0x0001, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x2128, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x212c, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x2130, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x2134, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x2138, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x213a, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x213c, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x213e, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x2140, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x2142, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x2144, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x2148, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x2168, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x2178, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x217c, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_removehandler(0x2180, 0x0080, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + } } static void tgui_set_io(tgui_t *tgui) { - tgui_remove_io(tgui); + tgui_remove_io(tgui); - io_sethandler(0x03c0, 0x0020, tgui_in, NULL, NULL, tgui_out, NULL, NULL, tgui); - if (tgui->type >= TGUI_9440) { - io_sethandler(0x43c6, 0x0004, tgui_in, NULL, NULL, tgui_out, NULL, NULL, tgui); - io_sethandler(0x83c6, 0x0003, tgui_in, NULL, NULL, tgui_out, NULL, NULL, tgui); - io_sethandler(0x2120, 0x0001, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x2122, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x2124, 0x0001, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x2127, 0x0001, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x2128, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x212c, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x2130, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x2134, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x2138, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x213a, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x213c, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x213e, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x2140, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x2142, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x2144, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x2148, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x2168, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x2178, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x217c, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - io_sethandler(0x2180, 0x0080, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); - } + io_sethandler(0x03c0, 0x0020, tgui_in, NULL, NULL, tgui_out, NULL, NULL, tgui); + if (tgui->type >= TGUI_9440) { + io_sethandler(0x43c6, 0x0004, tgui_in, NULL, NULL, tgui_out, NULL, NULL, tgui); + io_sethandler(0x83c6, 0x0003, tgui_in, NULL, NULL, tgui_out, NULL, NULL, tgui); + io_sethandler(0x2120, 0x0001, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x2122, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x2124, 0x0001, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x2127, 0x0001, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x2128, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x212c, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x2130, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x2134, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x2138, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x213a, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x213c, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x213e, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x2140, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x2142, 0x0002, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x2144, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x2148, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x2168, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x2178, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x217c, 0x0004, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + io_sethandler(0x2180, 0x0080, tgui_accel_in, tgui_accel_in_w, tgui_accel_in_l, tgui_accel_out, tgui_accel_out_w, tgui_accel_out_l, tgui); + } } static void tgui_out(uint16_t addr, uint8_t val, void *p) { - tgui_t *tgui = (tgui_t *)p; - svga_t *svga = &tgui->svga; - uint8_t old; + tgui_t *tgui = (tgui_t *) p; + svga_t *svga = &tgui->svga; + uint8_t old; - if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1)) addr ^= 0x60; + if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x3C5: - switch (svga->seqaddr) - { - case 0xB: - tgui->oldmode = 1; + switch (addr) { + case 0x3C5: + switch (svga->seqaddr) { + case 0xB: + tgui->oldmode = 1; + break; + case 0xC: + if (svga->seqregs[0x0e] & 0x80) + svga->seqregs[0x0c] = val; + break; + case 0xd: + if (tgui->oldmode) + tgui->oldctrl2 = val; + else + tgui->newctrl2 = val; + break; + case 0xE: + if (tgui->oldmode) { + tgui->oldctrl1 = val; + tgui_update_irqs(tgui); + svga->write_bank = (tgui->oldctrl1) * 65536; + } else { + svga->seqregs[0xe] = val ^ 2; + svga->write_bank = (svga->seqregs[0xe]) * 65536; + } + if (!(svga->gdcreg[0xf] & 1)) + svga->read_bank = svga->write_bank; + return; + } + break; + + case 0x3C6: + if (tgui->type == TGUI_9400CXI) { + tkd8001_ramdac_out(addr, val, svga->ramdac, svga); + return; + } + if (tgui->ramdac_state == 4) { + tgui->ramdac_state = 0; + tgui->ramdac_ctrl = val; + switch ((tgui->ramdac_ctrl >> 4) & 0x0f) { + case 1: + svga->bpp = 15; break; - case 0xC: - if (svga->seqregs[0x0e] & 0x80) - svga->seqregs[0x0c] = val; + case 3: + svga->bpp = 16; break; - case 0xd: + case 0x0d: + svga->bpp = (tgui->type >= TGUI_9660) ? 32 : 24; + break; + default: + svga->bpp = 8; + break; + } + svga_recalctimings(svga); + return; + } + break; + + case 0x3C7: + case 0x3C8: + case 0x3C9: + if (tgui->type == TGUI_9400CXI) { + tkd8001_ramdac_out(addr, val, svga->ramdac, svga); + return; + } + tgui->ramdac_state = 0; + break; + + case 0x3CF: + if (svga->gdcaddr == 0x23) { + svga->dpms = !!(val & 0x03); + svga_recalctimings(svga); + } + if (tgui->type == TGUI_9400CXI && svga->gdcaddr >= 16 && svga->gdcaddr < 32) { + old = tgui->ext_gdc_regs[svga->gdcaddr & 15]; + tgui->ext_gdc_regs[svga->gdcaddr & 15] = val; + if (svga->gdcaddr == 16) + tgui_recalcmapping(tgui); + return; + } + switch (svga->gdcaddr) { + case 0x6: + if (svga->gdcreg[6] != val) { + svga->gdcreg[6] = val; + tgui_recalcmapping(tgui); + } + return; + + case 0x0e: + svga->gdcreg[0xe] = val ^ 2; + if ((svga->gdcreg[0xf] & 1) == 1) + svga->read_bank = (svga->gdcreg[0xe]) * 65536; + break; + case 0x0f: + if (val & 1) + svga->read_bank = (svga->gdcreg[0xe]) * 65536; + else { if (tgui->oldmode) - tgui->oldctrl2 = val; + svga->read_bank = (tgui->oldctrl1) * 65536; else - tgui->newctrl2 = val; - break; - case 0xE: - if (tgui->oldmode) { - tgui->oldctrl1 = val; - tgui_update_irqs(tgui); - svga->write_bank = (tgui->oldctrl1) * 65536; - } else { - svga->seqregs[0xe] = val ^ 2; - svga->write_bank = (svga->seqregs[0xe]) * 65536; - } - if (!(svga->gdcreg[0xf] & 1)) - svga->read_bank = svga->write_bank; - return; - } - break; + svga->read_bank = (svga->seqregs[0xe]) * 65536; + } - case 0x3C6: - if (tgui->type == TGUI_9400CXI) - { - tkd8001_ramdac_out(addr, val, svga->ramdac, svga); - return; - } - if (tgui->ramdac_state == 4) - { - tgui->ramdac_state = 0; - tgui->ramdac_ctrl = val; - switch ((tgui->ramdac_ctrl >> 4) & 0x0f) - { - case 1: - svga->bpp = 15; - break; - case 3: - svga->bpp = 16; - break; - case 0x0d: - svga->bpp = (tgui->type >= TGUI_9660) ? 32 : 24; - break; - default: - svga->bpp = 8; - break; - } - svga_recalctimings(svga); - return; - } - break; + if (tgui->oldmode) + svga->write_bank = (tgui->oldctrl1) * 65536; + else + svga->write_bank = (svga->seqregs[0xe]) * 65536; + break; - case 0x3C7: case 0x3C8: case 0x3C9: - if (tgui->type == TGUI_9400CXI) - { - tkd8001_ramdac_out(addr, val, svga->ramdac, svga); - return; - } - tgui->ramdac_state = 0; - break; + case 0x5a: + case 0x5b: + case 0x5c: + case 0x5d: + case 0x5e: + case 0x5f: + svga->gdcreg[svga->gdcaddr] = val; + break; + } + break; + case 0x3D4: + svga->crtcreg = val; + return; + case 0x3D5: + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; - case 0x3CF: - if (svga->gdcaddr == 0x23) - { - svga->dpms = !!(val & 0x03); + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; svga_recalctimings(svga); + } } - if (tgui->type == TGUI_9400CXI && svga->gdcaddr >= 16 && svga->gdcaddr < 32) - { - old = tgui->ext_gdc_regs[svga->gdcaddr & 15]; - tgui->ext_gdc_regs[svga->gdcaddr & 15] = val; - if (svga->gdcaddr == 16) - tgui_recalcmapping(tgui); - return; - } - switch (svga->gdcaddr) - { - case 0x6: - if (svga->gdcreg[6] != val) - { - svga->gdcreg[6] = val; - tgui_recalcmapping(tgui); - } - return; + } + switch (svga->crtcreg) { + case 0x1e: + svga->vram_display_mask = (val & 0x80) ? tgui->vram_mask : 0x3ffff; + break; - case 0x0e: - svga->gdcreg[0xe] = val ^ 2; - if ((svga->gdcreg[0xf] & 1) == 1) - svga->read_bank = (svga->gdcreg[0xe]) * 65536; - break; - case 0x0f: - if (val & 1) - svga->read_bank = (svga->gdcreg[0xe]) * 65536; - else { - if (tgui->oldmode) - svga->read_bank = (tgui->oldctrl1) * 65536; - else - svga->read_bank = (svga->seqregs[0xe]) * 65536; - } - - if (tgui->oldmode) - svga->write_bank = (tgui->oldctrl1) * 65536; - else - svga->write_bank = (svga->seqregs[0xe]) * 65536; - break; - - case 0x5a: - case 0x5b: - case 0x5c: - case 0x5d: - case 0x5e: - case 0x5f: - svga->gdcreg[svga->gdcaddr] = val; - break; - } - break; - case 0x3D4: - svga->crtcreg = val; - return; - case 0x3D5: - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - old = svga->crtc[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; - - if (old != val) - { - if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) - { - if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } + case 0x21: + if (old != val) { + if (!tgui->pci) { + tgui->linear_base = ((val & 0xf) | ((val >> 2) & 0x30)) << 20; + tgui->linear_size = (val & 0x10) ? 0x200000 : 0x100000; + svga->decode_mask = (val & 0x10) ? 0x1fffff : 0xfffff; } - } - switch (svga->crtcreg) { - case 0x1e: - svga->vram_display_mask = (val & 0x80) ? tgui->vram_mask : 0x3ffff; - break; + tgui_recalcmapping(tgui); + } + break; - case 0x21: - if (old != val) { - if (!tgui->pci) { - tgui->linear_base = ((val & 0xf) | ((val >> 2) & 0x30)) << 20; - tgui->linear_size = (val & 0x10) ? 0x200000 : 0x100000; - svga->decode_mask = (val & 0x10) ? 0x1fffff : 0xfffff; - } - tgui_recalcmapping(tgui); - } - break; + case 0x34: + case 0x35: + if (tgui->type >= TGUI_9440) { + tgui->ge_base = ((svga->crtc[0x35] << 0x18) | (svga->crtc[0x34] << 0x10)); + tgui_recalcmapping(tgui); + } + break; - case 0x34: - case 0x35: - if (tgui->type >= TGUI_9440) { - tgui->ge_base = ((svga->crtc[0x35] << 0x18) | (svga->crtc[0x34] << 0x10)); - tgui_recalcmapping(tgui); - } - break; + case 0x36: + case 0x39: + tgui_recalcmapping(tgui); + break; - case 0x36: - case 0x39: - tgui_recalcmapping(tgui); - break; + case 0x37: + if (tgui->type >= TGUI_9440) + i2c_gpio_set(tgui->i2c, (val & 0x02) || !(val & 0x04), (val & 0x01) || !(val & 0x08)); + break; - case 0x37: - if (tgui->type >= TGUI_9440) - i2c_gpio_set(tgui->i2c, (val & 0x02) || !(val & 0x04), (val & 0x01) || !(val & 0x08)); - break; - - case 0x40: case 0x41: case 0x42: case 0x43: - case 0x44: case 0x45: case 0x46: case 0x47: - if (tgui->type >= TGUI_9440) { - svga->hwcursor.x = (svga->crtc[0x40] | (svga->crtc[0x41] << 8)) & 0x7ff; - svga->hwcursor.y = (svga->crtc[0x42] | (svga->crtc[0x43] << 8)) & 0x7ff; - if (tgui->type >= TGUI_9660 && (tgui->accel.ger22 & 0xff) == 8) { - svga->hwcursor.x <<= 1; - } - svga->hwcursor.xoff = svga->crtc[0x46] & 0x3f; - svga->hwcursor.yoff = svga->crtc[0x47] & 0x3f; - svga->hwcursor.addr = (svga->crtc[0x44] << 10) | ((svga->crtc[0x45] & 0x0f) << 18) | (svga->hwcursor.yoff * 8); + case 0x40: + case 0x41: + case 0x42: + case 0x43: + case 0x44: + case 0x45: + case 0x46: + case 0x47: + if (tgui->type >= TGUI_9440) { + svga->hwcursor.x = (svga->crtc[0x40] | (svga->crtc[0x41] << 8)) & 0x7ff; + svga->hwcursor.y = (svga->crtc[0x42] | (svga->crtc[0x43] << 8)) & 0x7ff; + if (tgui->type >= TGUI_9660 && (tgui->accel.ger22 & 0xff) == 8) { + svga->hwcursor.x <<= 1; } - break; + svga->hwcursor.xoff = svga->crtc[0x46] & 0x3f; + svga->hwcursor.yoff = svga->crtc[0x47] & 0x3f; + svga->hwcursor.addr = (svga->crtc[0x44] << 10) | ((svga->crtc[0x45] & 0x0f) << 18) | (svga->hwcursor.yoff * 8); + } + break; - case 0x50: - if (tgui->type >= TGUI_9440) { - svga->hwcursor.ena = !!(val & 0x80); - svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((val & 1) ? 64 : 32); - } - break; - } - return; + case 0x50: + if (tgui->type >= TGUI_9440) { + svga->hwcursor.ena = !!(val & 0x80); + svga->hwcursor.cur_xsize = svga->hwcursor.cur_ysize = ((val & 1) ? 64 : 32); + } + break; + } + return; - case 0x3D8: - tgui->tgui_3d8 = val; - if (svga->gdcreg[0xf] & 4) { - svga->write_bank = (val & 0x3f) * 65536; - if (!(svga->gdcreg[0xf] & 1)) { - svga->read_bank = (val & 0x3f) * 65536; - } + case 0x3D8: + tgui->tgui_3d8 = val; + if (svga->gdcreg[0xf] & 4) { + svga->write_bank = (val & 0x3f) * 65536; + if (!(svga->gdcreg[0xf] & 1)) { + svga->read_bank = (val & 0x3f) * 65536; } - return; - case 0x3D9: - tgui->tgui_3d9 = val; - if ((svga->gdcreg[0xf] & 5) == 5) - svga->read_bank = (val & 0x3f) * 65536; - return; + } + return; + case 0x3D9: + tgui->tgui_3d9 = val; + if ((svga->gdcreg[0xf] & 5) == 5) + svga->read_bank = (val & 0x3f) * 65536; + return; - case 0x43c8: - tgui->clock_n = val & 0x7f; - tgui->clock_m = (tgui->clock_m & ~1) | (val >> 7); - break; - case 0x43c9: - tgui->clock_m = (tgui->clock_m & ~0x1e) | ((val << 1) & 0x1e); - tgui->clock_k = (val & 0x10) >> 4; - break; - } - svga_out(addr, val, svga); + case 0x43c8: + tgui->clock_n = val & 0x7f; + tgui->clock_m = (tgui->clock_m & ~1) | (val >> 7); + break; + case 0x43c9: + tgui->clock_m = (tgui->clock_m & ~0x1e) | ((val << 1) & 0x1e); + tgui->clock_k = (val & 0x10) >> 4; + break; + } + svga_out(addr, val, svga); } static uint8_t tgui_in(uint16_t addr, void *p) { - tgui_t *tgui = (tgui_t *)p; - svga_t *svga = &tgui->svga; - uint8_t temp; + tgui_t *tgui = (tgui_t *) p; + svga_t *svga = &tgui->svga; + uint8_t temp; - if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1)) addr ^= 0x60; + if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x3C5: - if (svga->seqaddr == 9) { - if (tgui->type == TGUI_9680) - return 0x01; /*TGUI9680XGi*/ - } - if (svga->seqaddr == 0x0b) - { - tgui->oldmode = 0; - switch (tgui->type) - { - case TGUI_9400CXI: - return 0x93; /*TGUI9400CXi*/ - case TGUI_9440: - return 0xe3; /*TGUI9440AGi*/ - case TGUI_9660: - case TGUI_9680: - return 0xd3; /*TGUI9660XGi*/ - } + switch (addr) { + case 0x3C5: + if (svga->seqaddr == 9) { + if (tgui->type == TGUI_9680) + return 0x01; /*TGUI9680XGi*/ + } + if (svga->seqaddr == 0x0b) { + tgui->oldmode = 0; + switch (tgui->type) { + case TGUI_9400CXI: + return 0x93; /*TGUI9400CXi*/ + case TGUI_9440: + return 0xe3; /*TGUI9440AGi*/ + case TGUI_9660: + case TGUI_9680: + return 0xd3; /*TGUI9660XGi*/ } - if (svga->seqaddr == 0x0d) - { - if (tgui->oldmode) - return tgui->oldctrl2; - return tgui->newctrl2; - } - if (svga->seqaddr == 0x0c) - { - if (svga->seqregs[0x0e] & 0x80) - return svga->seqregs[0x0c]; - } - if (svga->seqaddr == 0x0e) - { - if (tgui->oldmode) - return tgui->oldctrl1 | 0x88; - return svga->seqregs[0x0e]; - } - break; + } + if (svga->seqaddr == 0x0d) { + if (tgui->oldmode) + return tgui->oldctrl2; + return tgui->newctrl2; + } + if (svga->seqaddr == 0x0c) { + if (svga->seqregs[0x0e] & 0x80) + return svga->seqregs[0x0c]; + } + if (svga->seqaddr == 0x0e) { + if (tgui->oldmode) + return tgui->oldctrl1 | 0x88; + return svga->seqregs[0x0e]; + } + break; - case 0x3C6: - if (tgui->type == TGUI_9400CXI) - return tkd8001_ramdac_in(addr, svga->ramdac, svga); - if (tgui->ramdac_state == 4) - return tgui->ramdac_ctrl; - tgui->ramdac_state++; - break; + case 0x3C6: + if (tgui->type == TGUI_9400CXI) + return tkd8001_ramdac_in(addr, svga->ramdac, svga); + if (tgui->ramdac_state == 4) + return tgui->ramdac_ctrl; + tgui->ramdac_state++; + break; - case 0x3C7: case 0x3C8: case 0x3C9: - if (tgui->type == TGUI_9400CXI) - return tkd8001_ramdac_in(addr, svga->ramdac, svga); - tgui->ramdac_state = 0; - break; + case 0x3C7: + case 0x3C8: + case 0x3C9: + if (tgui->type == TGUI_9400CXI) + return tkd8001_ramdac_in(addr, svga->ramdac, svga); + tgui->ramdac_state = 0; + break; - case 0x3CF: - if (tgui->type == TGUI_9400CXI && svga->gdcaddr >= 16 && svga->gdcaddr < 32) - return tgui->ext_gdc_regs[svga->gdcaddr & 15]; - if (svga->gdcaddr >= 0x5a && svga->gdcaddr <= 0x5f) - return svga->gdcreg[svga->gdcaddr]; - break; - case 0x3D4: - return svga->crtcreg; - case 0x3D5: - temp = svga->crtc[svga->crtcreg]; - if ((svga->crtcreg == 0x37) && (tgui->type >= TGUI_9440)) { - if (!(temp & 0x04)) { - temp &= ~0x02; - if (i2c_gpio_get_scl(tgui->i2c)) - temp |= 0x02; - } - if (!(temp & 0x08)) { - temp &= ~0x01; - if (i2c_gpio_get_sda(tgui->i2c)) - temp |= 0x01; - } + case 0x3CF: + if (tgui->type == TGUI_9400CXI && svga->gdcaddr >= 16 && svga->gdcaddr < 32) + return tgui->ext_gdc_regs[svga->gdcaddr & 15]; + if (svga->gdcaddr >= 0x5a && svga->gdcaddr <= 0x5f) + return svga->gdcreg[svga->gdcaddr]; + break; + case 0x3D4: + return svga->crtcreg; + case 0x3D5: + temp = svga->crtc[svga->crtcreg]; + if ((svga->crtcreg == 0x37) && (tgui->type >= TGUI_9440)) { + if (!(temp & 0x04)) { + temp &= ~0x02; + if (i2c_gpio_get_scl(tgui->i2c)) + temp |= 0x02; } - return temp; - case 0x3d8: - return tgui->tgui_3d8; - case 0x3d9: - return tgui->tgui_3d9; - } - return svga_in(addr, svga); + if (!(temp & 0x08)) { + temp &= ~0x01; + if (i2c_gpio_get_sda(tgui->i2c)) + temp |= 0x01; + } + } + return temp; + case 0x3d8: + return tgui->tgui_3d8; + case 0x3d9: + return tgui->tgui_3d9; + } + return svga_in(addr, svga); } -void tgui_recalctimings(svga_t *svga) +void +tgui_recalctimings(svga_t *svga) { - tgui_t *tgui = (tgui_t *)svga->p; + tgui_t *tgui = (tgui_t *) svga->p; - if (!svga->rowoffset) - svga->rowoffset = 0x100; + if (!svga->rowoffset) + svga->rowoffset = 0x100; - if (svga->crtc[0x29] & 0x10) - svga->rowoffset |= 0x100; + if (svga->crtc[0x29] & 0x10) + svga->rowoffset |= 0x100; - if (tgui->type >= TGUI_9440 && svga->bpp >= 24) { - if ((tgui->accel.bpp == 0) && (tgui->accel.ger22 & 0xff) != 14 && (svga->bpp == 24)) - svga->hdisp = (svga->crtc[1] + 1) * 8; - if (tgui->accel.bpp == 3 && (tgui->accel.ger22 & 0xff) == 14 && (svga->bpp == 32) && (tgui->type == TGUI_9440)) - svga->rowoffset <<= 1; - } + if (tgui->type >= TGUI_9440 && svga->bpp >= 24) { + if ((tgui->accel.bpp == 0) && (tgui->accel.ger22 & 0xff) != 14 && (svga->bpp == 24)) + svga->hdisp = (svga->crtc[1] + 1) * 8; + if (tgui->accel.bpp == 3 && (tgui->accel.ger22 & 0xff) == 14 && (svga->bpp == 32) && (tgui->type == TGUI_9440)) + svga->rowoffset <<= 1; + } + if ((svga->crtc[0x1e] & 0xA0) == 0xA0) + svga->ma_latch |= 0x10000; + if ((svga->crtc[0x27] & 0x01) == 0x01) + svga->ma_latch |= 0x20000; + if ((svga->crtc[0x27] & 0x02) == 0x02) + svga->ma_latch |= 0x40000; + if ((svga->crtc[0x27] & 0x04) == 0x04) + svga->ma_latch |= 0x80000; + if (svga->crtc[0x27] & 0x08) + svga->split |= 0x400; + if (svga->crtc[0x27] & 0x10) + svga->dispend |= 0x400; + if (svga->crtc[0x27] & 0x20) + svga->vsyncstart |= 0x400; + if (svga->crtc[0x27] & 0x40) + svga->vblankstart |= 0x400; + if (svga->crtc[0x27] & 0x80) + svga->vtotal |= 0x400; - if ((svga->crtc[0x1e] & 0xA0) == 0xA0) - svga->ma_latch |= 0x10000; - if ((svga->crtc[0x27] & 0x01) == 0x01) - svga->ma_latch |= 0x20000; - if ((svga->crtc[0x27] & 0x02) == 0x02) - svga->ma_latch |= 0x40000; - if ((svga->crtc[0x27] & 0x04) == 0x04) - svga->ma_latch |= 0x80000; + if (tgui->oldctrl2 & 0x10) { + svga->rowoffset <<= 1; + svga->lowres = 0; + } - if (svga->crtc[0x27] & 0x08) - svga->split |= 0x400; - if (svga->crtc[0x27] & 0x10) - svga->dispend |= 0x400; - if (svga->crtc[0x27] & 0x20) - svga->vsyncstart |= 0x400; - if (svga->crtc[0x27] & 0x40) - svga->vblankstart |= 0x400; - if (svga->crtc[0x27] & 0x80) - svga->vtotal |= 0x400; + if ((tgui->oldctrl2 & 0x10) || (svga->crtc[0x2a] & 0x40)) + svga->ma_latch <<= 1; - if (tgui->oldctrl2 & 0x10) { - svga->rowoffset <<= 1; - svga->lowres = 0; - } + svga->lowres = !(svga->crtc[0x2a] & 0x40); - if ((tgui->oldctrl2 & 0x10) || (svga->crtc[0x2a] & 0x40)) - svga->ma_latch <<= 1; + svga->interlace = !!(svga->crtc[0x1e] & 4); + if (svga->interlace && tgui->type < TGUI_9440) + svga->rowoffset >>= 1; - svga->lowres = !(svga->crtc[0x2a] & 0x40); + if (tgui->type >= TGUI_9440) { + if (svga->miscout & 8) + svga->clock = (cpuclock * (double) (1ull << 32)) / (((tgui->clock_n + 8) * 14318180.0) / ((tgui->clock_m + 2) * (1 << tgui->clock_k))); - svga->interlace = !!(svga->crtc[0x1e] & 4); - if (svga->interlace && tgui->type < TGUI_9440) - svga->rowoffset >>= 1; - - if (tgui->type >= TGUI_9440) - { - if (svga->miscout & 8) - svga->clock = (cpuclock * (double)(1ull << 32)) / (((tgui->clock_n + 8) * 14318180.0) / ((tgui->clock_m + 2) * (1 << tgui->clock_k))); - - if (svga->gdcreg[0xf] & 0x08) - svga->clock *= 2; - else if (svga->gdcreg[0xf] & 0x40) - svga->clock *= 3; + if (svga->gdcreg[0xf] & 0x08) + svga->clock *= 2; + else if (svga->gdcreg[0xf] & 0x40) + svga->clock *= 3; + } else { + switch (((svga->miscout >> 2) & 3) | ((tgui->newctrl2 << 2) & 4) | ((tgui->newctrl2 >> 3) & 8)) { + case 0x02: + svga->clock = (cpuclock * (double) (1ull << 32)) / 44900000.0; + break; + case 0x03: + svga->clock = (cpuclock * (double) (1ull << 32)) / 36000000.0; + break; + case 0x04: + svga->clock = (cpuclock * (double) (1ull << 32)) / 57272000.0; + break; + case 0x05: + svga->clock = (cpuclock * (double) (1ull << 32)) / 65000000.0; + break; + case 0x06: + svga->clock = (cpuclock * (double) (1ull << 32)) / 50350000.0; + break; + case 0x07: + svga->clock = (cpuclock * (double) (1ull << 32)) / 40000000.0; + break; + case 0x08: + svga->clock = (cpuclock * (double) (1ull << 32)) / 88000000.0; + break; + case 0x09: + svga->clock = (cpuclock * (double) (1ull << 32)) / 98000000.0; + break; + case 0x0a: + svga->clock = (cpuclock * (double) (1ull << 32)) / 118800000.0; + break; + case 0x0b: + svga->clock = (cpuclock * (double) (1ull << 32)) / 108000000.0; + break; + case 0x0c: + svga->clock = (cpuclock * (double) (1ull << 32)) / 72000000.0; + break; + case 0x0d: + svga->clock = (cpuclock * (double) (1ull << 32)) / 77000000.0; + break; + case 0x0e: + svga->clock = (cpuclock * (double) (1ull << 32)) / 80000000.0; + break; + case 0x0f: + svga->clock = (cpuclock * (double) (1ull << 32)) / 75000000.0; + break; } - else - { - switch (((svga->miscout >> 2) & 3) | ((tgui->newctrl2 << 2) & 4) | ((tgui->newctrl2 >> 3) & 8)) - { - case 0x02: svga->clock = (cpuclock * (double)(1ull << 32)) / 44900000.0; break; - case 0x03: svga->clock = (cpuclock * (double)(1ull << 32)) / 36000000.0; break; - case 0x04: svga->clock = (cpuclock * (double)(1ull << 32)) / 57272000.0; break; - case 0x05: svga->clock = (cpuclock * (double)(1ull << 32)) / 65000000.0; break; - case 0x06: svga->clock = (cpuclock * (double)(1ull << 32)) / 50350000.0; break; - case 0x07: svga->clock = (cpuclock * (double)(1ull << 32)) / 40000000.0; break; - case 0x08: svga->clock = (cpuclock * (double)(1ull << 32)) / 88000000.0; break; - case 0x09: svga->clock = (cpuclock * (double)(1ull << 32)) / 98000000.0; break; - case 0x0a: svga->clock = (cpuclock * (double)(1ull << 32)) /118800000.0; break; - case 0x0b: svga->clock = (cpuclock * (double)(1ull << 32)) /108000000.0; break; - case 0x0c: svga->clock = (cpuclock * (double)(1ull << 32)) / 72000000.0; break; - case 0x0d: svga->clock = (cpuclock * (double)(1ull << 32)) / 77000000.0; break; - case 0x0e: svga->clock = (cpuclock * (double)(1ull << 32)) / 80000000.0; break; - case 0x0f: svga->clock = (cpuclock * (double)(1ull << 32)) / 75000000.0; break; - } - if (svga->gdcreg[0xf] & 0x08) - { - svga->htotal <<= 1; - svga->hdisp <<= 1; - svga->hdisp_time <<= 1; - } + if (svga->gdcreg[0xf] & 0x08) { + svga->htotal <<= 1; + svga->hdisp <<= 1; + svga->hdisp_time <<= 1; } + } - if ((tgui->oldctrl2 & 0x10) || (svga->crtc[0x2a] & 0x40)) - { - switch (svga->bpp) - { - case 8: - svga->render = svga_render_8bpp_highres; - if (tgui->type >= TGUI_9660) { - if (svga->dispend == 512) - svga->hdisp = 1280; - else if (svga->dispend == 600 && svga->hdisp == 800 && svga->vtotal == 651) - svga->hdisp = 1600; - } - break; - case 15: - svga->render = svga_render_15bpp_highres; - if (tgui->type < TGUI_9440) - svga->hdisp >>= 1; - break; - case 16: - svga->render = svga_render_16bpp_highres; - if (tgui->type < TGUI_9440) - svga->hdisp >>= 1; - break; - case 24: - svga->render = svga_render_24bpp_highres; - if (tgui->type < TGUI_9440) - svga->hdisp = (svga->hdisp << 1) / 3; - break; - case 32: - svga->render = svga_render_32bpp_highres; - if (tgui->type >= TGUI_9660) { - if (svga->hdisp == 1024) { - svga->rowoffset <<= 1; - } - } - break; + if ((tgui->oldctrl2 & 0x10) || (svga->crtc[0x2a] & 0x40)) { + switch (svga->bpp) { + case 8: + svga->render = svga_render_8bpp_highres; + if (tgui->type >= TGUI_9660) { + if (svga->dispend == 512) + svga->hdisp = 1280; + else if (svga->dispend == 600 && svga->hdisp == 800 && svga->vtotal == 651) + svga->hdisp = 1600; } + break; + case 15: + svga->render = svga_render_15bpp_highres; + if (tgui->type < TGUI_9440) + svga->hdisp >>= 1; + break; + case 16: + svga->render = svga_render_16bpp_highres; + if (tgui->type < TGUI_9440) + svga->hdisp >>= 1; + break; + case 24: + svga->render = svga_render_24bpp_highres; + if (tgui->type < TGUI_9440) + svga->hdisp = (svga->hdisp << 1) / 3; + break; + case 32: + svga->render = svga_render_32bpp_highres; + if (tgui->type >= TGUI_9660) { + if (svga->hdisp == 1024) { + svga->rowoffset <<= 1; + } + } + break; } + } } static void tgui_recalcmapping(tgui_t *tgui) { - svga_t *svga = &tgui->svga; + svga_t *svga = &tgui->svga; - if (tgui->type == TGUI_9400CXI) - { - if (tgui->ext_gdc_regs[0] & EXT_CTRL_LATCH_COPY) - { - mem_mapping_set_handler(&tgui->linear_mapping, - tgui_ext_linear_read, NULL, NULL, - tgui_ext_linear_write, tgui_ext_linear_writew, tgui_ext_linear_writel); - mem_mapping_set_handler(&svga->mapping, - tgui_ext_read, NULL, NULL, - tgui_ext_write, tgui_ext_writew, tgui_ext_writel); - } - else if (tgui->ext_gdc_regs[0] & EXT_CTRL_MONO_EXPANSION) - { - mem_mapping_set_handler(&tgui->linear_mapping, - svga_read_linear, svga_readw_linear, svga_readl_linear, - tgui_ext_linear_write, tgui_ext_linear_writew, tgui_ext_linear_writel); - mem_mapping_set_handler(&svga->mapping, - svga_read, svga_readw, svga_readl, - tgui_ext_write, tgui_ext_writew, tgui_ext_writel); - } - else - { - mem_mapping_set_handler(&tgui->linear_mapping, - svga_read_linear, svga_readw_linear, svga_readl_linear, - svga_write_linear, svga_writew_linear, svga_writel_linear); - mem_mapping_set_handler(&svga->mapping, - svga_read, svga_readw, svga_readl, - svga_write, svga_writew, svga_writel); - } + if (tgui->type == TGUI_9400CXI) { + if (tgui->ext_gdc_regs[0] & EXT_CTRL_LATCH_COPY) { + mem_mapping_set_handler(&tgui->linear_mapping, + tgui_ext_linear_read, NULL, NULL, + tgui_ext_linear_write, tgui_ext_linear_writew, tgui_ext_linear_writel); + mem_mapping_set_handler(&svga->mapping, + tgui_ext_read, NULL, NULL, + tgui_ext_write, tgui_ext_writew, tgui_ext_writel); + } else if (tgui->ext_gdc_regs[0] & EXT_CTRL_MONO_EXPANSION) { + mem_mapping_set_handler(&tgui->linear_mapping, + svga_read_linear, svga_readw_linear, svga_readl_linear, + tgui_ext_linear_write, tgui_ext_linear_writew, tgui_ext_linear_writel); + mem_mapping_set_handler(&svga->mapping, + svga_read, svga_readw, svga_readl, + tgui_ext_write, tgui_ext_writew, tgui_ext_writel); + } else { + mem_mapping_set_handler(&tgui->linear_mapping, + svga_read_linear, svga_readw_linear, svga_readl_linear, + svga_write_linear, svga_writew_linear, svga_writel_linear); + mem_mapping_set_handler(&svga->mapping, + svga_read, svga_readw, svga_readl, + svga_write, svga_writew, svga_writel); } - - if (tgui->pci && !(tgui->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) - { - mem_mapping_disable(&svga->mapping); - mem_mapping_disable(&tgui->linear_mapping); - mem_mapping_disable(&tgui->accel_mapping); - mem_mapping_disable(&tgui->mmio_mapping); - return; - } - - if (svga->crtc[0x21] & 0x20) - { - mem_mapping_disable(&svga->mapping); - mem_mapping_set_addr(&tgui->linear_mapping, tgui->linear_base, tgui->linear_size); - if (tgui->type >= TGUI_9440) - { - if ((svga->crtc[0x36] & 0x03) == 0x01) - mem_mapping_set_addr(&tgui->accel_mapping, 0xb4000, 0x4000); - else if ((svga->crtc[0x36] & 0x03) == 0x02) - mem_mapping_set_addr(&tgui->accel_mapping, 0xbc000, 0x4000); - else if ((svga->crtc[0x36] & 0x03) == 0x03) - mem_mapping_set_addr(&tgui->accel_mapping, tgui->ge_base, 0x4000); - mem_mapping_disable(&svga->mapping); - } - else - { - switch (svga->gdcreg[6] & 0xC) - { - case 0x0: /*128k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); - svga->banked_mask = 0xffff; - break; - case 0x4: /*64k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); - svga->banked_mask = 0xffff; - break; - case 0x8: /*32k at B0000*/ - mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); - svga->banked_mask = 0x7fff; - break; - case 0xC: /*32k at B8000*/ - mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); - svga->banked_mask = 0x7fff; - break; - } - } - } - else - { - mem_mapping_disable(&tgui->linear_mapping); - mem_mapping_disable(&tgui->accel_mapping); - switch (svga->gdcreg[6] & 0xC) - { - case 0x0: /*128k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); - svga->banked_mask = 0xffff; - break; - case 0x4: /*64k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); - if ((svga->crtc[0x36] & 0x03) == 0x01) - mem_mapping_set_addr(&tgui->accel_mapping, 0xb4000, 0x4000); - else if ((svga->crtc[0x36] & 0x03) == 0x02) - mem_mapping_set_addr(&tgui->accel_mapping, 0xbc000, 0x4000); - else if ((svga->crtc[0x36] & 0x03) == 0x03) - mem_mapping_set_addr(&tgui->accel_mapping, tgui->ge_base, 0x4000); - svga->banked_mask = 0xffff; - break; - case 0x8: /*32k at B0000*/ - mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); - svga->banked_mask = 0x7fff; - break; - case 0xC: /*32k at B8000*/ - mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); - svga->banked_mask = 0x7fff; - break; - } } - if (tgui->type >= TGUI_9440) { - if ((tgui->mmio_base != 0x00000000) && (svga->crtc[0x39] & 1)) - mem_mapping_set_addr(&tgui->mmio_mapping, tgui->mmio_base, 0x10000); - else - mem_mapping_disable(&tgui->mmio_mapping); - } + if (tgui->pci && !(tgui->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) { + mem_mapping_disable(&svga->mapping); + mem_mapping_disable(&tgui->linear_mapping); + mem_mapping_disable(&tgui->accel_mapping); + mem_mapping_disable(&tgui->mmio_mapping); + return; + } + + if (svga->crtc[0x21] & 0x20) { + mem_mapping_disable(&svga->mapping); + mem_mapping_set_addr(&tgui->linear_mapping, tgui->linear_base, tgui->linear_size); + if (tgui->type >= TGUI_9440) { + if ((svga->crtc[0x36] & 0x03) == 0x01) + mem_mapping_set_addr(&tgui->accel_mapping, 0xb4000, 0x4000); + else if ((svga->crtc[0x36] & 0x03) == 0x02) + mem_mapping_set_addr(&tgui->accel_mapping, 0xbc000, 0x4000); + else if ((svga->crtc[0x36] & 0x03) == 0x03) + mem_mapping_set_addr(&tgui->accel_mapping, tgui->ge_base, 0x4000); + mem_mapping_disable(&svga->mapping); + } else { + switch (svga->gdcreg[6] & 0xC) { + case 0x0: /*128k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); + svga->banked_mask = 0xffff; + break; + case 0x4: /*64k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + svga->banked_mask = 0xffff; + break; + case 0x8: /*32k at B0000*/ + mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); + svga->banked_mask = 0x7fff; + break; + case 0xC: /*32k at B8000*/ + mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); + svga->banked_mask = 0x7fff; + break; + } + } + } else { + mem_mapping_disable(&tgui->linear_mapping); + mem_mapping_disable(&tgui->accel_mapping); + switch (svga->gdcreg[6] & 0xC) { + case 0x0: /*128k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); + svga->banked_mask = 0xffff; + break; + case 0x4: /*64k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + if ((svga->crtc[0x36] & 0x03) == 0x01) + mem_mapping_set_addr(&tgui->accel_mapping, 0xb4000, 0x4000); + else if ((svga->crtc[0x36] & 0x03) == 0x02) + mem_mapping_set_addr(&tgui->accel_mapping, 0xbc000, 0x4000); + else if ((svga->crtc[0x36] & 0x03) == 0x03) + mem_mapping_set_addr(&tgui->accel_mapping, tgui->ge_base, 0x4000); + svga->banked_mask = 0xffff; + break; + case 0x8: /*32k at B0000*/ + mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); + svga->banked_mask = 0x7fff; + break; + case 0xC: /*32k at B8000*/ + mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); + svga->banked_mask = 0x7fff; + break; + } + } + + if (tgui->type >= TGUI_9440) { + if ((tgui->mmio_base != 0x00000000) && (svga->crtc[0x39] & 1)) + mem_mapping_set_addr(&tgui->mmio_mapping, tgui->mmio_base, 0x10000); + else + mem_mapping_disable(&tgui->mmio_mapping); + } } static void tgui_hwcursor_draw(svga_t *svga, int displine) { - uint32_t dat[2]; - int xx; - int offset = svga->hwcursor_latch.x + svga->hwcursor_latch.xoff; - int pitch = (svga->hwcursor_latch.cur_xsize == 64) ? 16 : 8; + uint32_t dat[2]; + int xx; + int offset = svga->hwcursor_latch.x + svga->hwcursor_latch.xoff; + int pitch = (svga->hwcursor_latch.cur_xsize == 64) ? 16 : 8; - if (svga->interlace && svga->hwcursor_oddeven) - svga->hwcursor_latch.addr += pitch; + if (svga->interlace && svga->hwcursor_oddeven) + svga->hwcursor_latch.addr += pitch; - dat[0] = (svga->vram[svga->hwcursor_latch.addr] << 24) | (svga->vram[svga->hwcursor_latch.addr + 1] << 16) | (svga->vram[svga->hwcursor_latch.addr + 2] << 8) | svga->vram[svga->hwcursor_latch.addr + 3]; - dat[1] = (svga->vram[svga->hwcursor_latch.addr + 4] << 24) | (svga->vram[svga->hwcursor_latch.addr + 5] << 16) | (svga->vram[svga->hwcursor_latch.addr + 6] << 8) | svga->vram[svga->hwcursor_latch.addr + 7]; - for (xx = 0; xx < 32; xx++) { - if (svga->crtc[0x50] & 0x40) { - if (offset >= svga->hwcursor_latch.x) - { - if (dat[0] & 0x80000000) - ((uint32_t *)buffer32->line[displine])[svga->x_add + offset] = (dat[1] & 0x80000000) ? 0xffffff : 0; - } - } else { - if (offset >= svga->hwcursor_latch.x) - { - if (!(dat[0] & 0x80000000)) - ((uint32_t *)buffer32->line[displine])[svga->x_add + offset] = (dat[1] & 0x80000000) ? 0xffffff : 0; - else if (dat[1] & 0x80000000) - ((uint32_t *)buffer32->line[displine])[svga->x_add + offset] ^= 0xffffff; - } - } - offset++; - dat[0] <<= 1; - dat[1] <<= 1; - } - svga->hwcursor_latch.addr += pitch; - - if (svga->interlace && !svga->hwcursor_oddeven) - svga->hwcursor_latch.addr += pitch; -} - -uint8_t tgui_pci_read(int func, int addr, void *p) -{ - tgui_t *tgui = (tgui_t *)p; - - switch (addr) - { - case 0x00: return 0x23; /*Trident*/ - case 0x01: return 0x10; - - case 0x02: return (tgui->type == TGUI_9440) ? 0x40 : 0x60; /*TGUI9440AGi or TGUI9660XGi*/ - case 0x03: return (tgui->type == TGUI_9440) ? 0x94 : 0x96; - - case PCI_REG_COMMAND: return tgui->pci_regs[PCI_REG_COMMAND]; /*Respond to IO and memory accesses*/ - - case 0x07: return 1 << 1; /*Medium DEVSEL timing*/ - - case 0x08: return 0; /*Revision ID*/ - case 0x09: return 0; /*Programming interface*/ - - case 0x0a: return 0x01; /*Supports VGA interface, XGA compatible*/ - case 0x0b: return 0x03; - - case 0x10: return 0x00; /*Linear frame buffer address*/ - case 0x11: return 0x00; - case 0x12: return tgui->linear_base >> 16; - case 0x13: return tgui->linear_base >> 24; - - case 0x14: return 0x00; /*MMIO address*/ - case 0x15: return 0x00; - case 0x16: return tgui->mmio_base >> 16; - case 0x17: return tgui->mmio_base >> 24; - - case 0x30: return tgui->has_bios ? (tgui->pci_regs[0x30] & 0x01) : 0x00; /*BIOS ROM address*/ - case 0x31: return 0x00; - case 0x32: return tgui->has_bios ? tgui->pci_regs[0x32] : 0x00; - case 0x33: return tgui->has_bios ? tgui->pci_regs[0x33] : 0x00; - - case 0x3c: return tgui->int_line; - case 0x3d: return PCI_INTA; + dat[0] = (svga->vram[svga->hwcursor_latch.addr] << 24) | (svga->vram[svga->hwcursor_latch.addr + 1] << 16) | (svga->vram[svga->hwcursor_latch.addr + 2] << 8) | svga->vram[svga->hwcursor_latch.addr + 3]; + dat[1] = (svga->vram[svga->hwcursor_latch.addr + 4] << 24) | (svga->vram[svga->hwcursor_latch.addr + 5] << 16) | (svga->vram[svga->hwcursor_latch.addr + 6] << 8) | svga->vram[svga->hwcursor_latch.addr + 7]; + for (xx = 0; xx < 32; xx++) { + if (svga->crtc[0x50] & 0x40) { + if (offset >= svga->hwcursor_latch.x) { + if (dat[0] & 0x80000000) + ((uint32_t *) buffer32->line[displine])[svga->x_add + offset] = (dat[1] & 0x80000000) ? 0xffffff : 0; + } + } else { + if (offset >= svga->hwcursor_latch.x) { + if (!(dat[0] & 0x80000000)) + ((uint32_t *) buffer32->line[displine])[svga->x_add + offset] = (dat[1] & 0x80000000) ? 0xffffff : 0; + else if (dat[1] & 0x80000000) + ((uint32_t *) buffer32->line[displine])[svga->x_add + offset] ^= 0xffffff; + } } - return 0; + offset++; + dat[0] <<= 1; + dat[1] <<= 1; + } + svga->hwcursor_latch.addr += pitch; + + if (svga->interlace && !svga->hwcursor_oddeven) + svga->hwcursor_latch.addr += pitch; } -void tgui_pci_write(int func, int addr, uint8_t val, void *p) +uint8_t +tgui_pci_read(int func, int addr, void *p) { - tgui_t *tgui = (tgui_t *)p; - svga_t *svga = &tgui->svga; + tgui_t *tgui = (tgui_t *) p; - switch (addr) - { - case PCI_REG_COMMAND: - tgui->pci_regs[PCI_REG_COMMAND] = (val & 0x23); - if (val & PCI_COMMAND_IO) { - tgui_set_io(tgui); - } else - tgui_remove_io(tgui); - tgui_recalcmapping(tgui); - break; + switch (addr) { + case 0x00: + return 0x23; /*Trident*/ + case 0x01: + return 0x10; - case 0x12: - if (tgui->type >= TGUI_9660) - tgui->linear_base = (tgui->linear_base & 0xff000000) | ((val & 0xc0) << 16); - else - tgui->linear_base = (tgui->linear_base & 0xff000000) | ((val & 0xe0) << 16); - tgui->linear_size = tgui->vram_size; - svga->decode_mask = tgui->vram_mask; - tgui_recalcmapping(tgui); - break; - case 0x13: - if (tgui->type >= TGUI_9660) - tgui->linear_base = (tgui->linear_base & 0xc00000) | (val << 24); - else - tgui->linear_base = (tgui->linear_base & 0xe00000) | (val << 24); - tgui->linear_size = tgui->vram_size; - svga->decode_mask = tgui->vram_mask; - tgui_recalcmapping(tgui); - break; + case 0x02: + return (tgui->type == TGUI_9440) ? 0x40 : 0x60; /*TGUI9440AGi or TGUI9660XGi*/ + case 0x03: + return (tgui->type == TGUI_9440) ? 0x94 : 0x96; - case 0x16: - if (tgui->type >= TGUI_9660) - tgui->mmio_base = (tgui->mmio_base & 0xff000000) | ((val & 0xc0) << 16); - else - tgui->mmio_base = (tgui->mmio_base & 0xff000000) | ((val & 0xe0) << 16); - tgui_recalcmapping(tgui); - break; - case 0x17: - if (tgui->type >= TGUI_9660) - tgui->mmio_base = (tgui->mmio_base & 0x00c00000) | (val << 24); - else - tgui->mmio_base = (tgui->mmio_base & 0x00e00000) | (val << 24); - tgui_recalcmapping(tgui); - break; + case PCI_REG_COMMAND: + return tgui->pci_regs[PCI_REG_COMMAND]; /*Respond to IO and memory accesses*/ - case 0x30: case 0x32: case 0x33: - if (tgui->has_bios) { - tgui->pci_regs[addr] = val; - if (tgui->pci_regs[0x30] & 0x01) - { - uint32_t biosaddr = (tgui->pci_regs[0x32] << 16) | (tgui->pci_regs[0x33] << 24); - mem_mapping_set_addr(&tgui->bios_rom.mapping, biosaddr, 0x8000); - } - else - { - mem_mapping_disable(&tgui->bios_rom.mapping); - } - } - return; + case 0x07: + return 1 << 1; /*Medium DEVSEL timing*/ - case 0x3c: - tgui->int_line = val; - return; - } + case 0x08: + return 0; /*Revision ID*/ + case 0x09: + return 0; /*Programming interface*/ + + case 0x0a: + return 0x01; /*Supports VGA interface, XGA compatible*/ + case 0x0b: + return 0x03; + + case 0x10: + return 0x00; /*Linear frame buffer address*/ + case 0x11: + return 0x00; + case 0x12: + return tgui->linear_base >> 16; + case 0x13: + return tgui->linear_base >> 24; + + case 0x14: + return 0x00; /*MMIO address*/ + case 0x15: + return 0x00; + case 0x16: + return tgui->mmio_base >> 16; + case 0x17: + return tgui->mmio_base >> 24; + + case 0x30: + return tgui->has_bios ? (tgui->pci_regs[0x30] & 0x01) : 0x00; /*BIOS ROM address*/ + case 0x31: + return 0x00; + case 0x32: + return tgui->has_bios ? tgui->pci_regs[0x32] : 0x00; + case 0x33: + return tgui->has_bios ? tgui->pci_regs[0x33] : 0x00; + + case 0x3c: + return tgui->int_line; + case 0x3d: + return PCI_INTA; + } + return 0; } -static uint8_t tgui_ext_linear_read(uint32_t addr, void *p) +void +tgui_pci_write(int func, int addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; - tgui_t *tgui = (tgui_t *)svga->p; - int c; + tgui_t *tgui = (tgui_t *) p; + svga_t *svga = &tgui->svga; - cycles -= video_timing_read_b; + switch (addr) { + case PCI_REG_COMMAND: + tgui->pci_regs[PCI_REG_COMMAND] = (val & 0x23); + if (val & PCI_COMMAND_IO) { + tgui_set_io(tgui); + } else + tgui_remove_io(tgui); + tgui_recalcmapping(tgui); + break; - addr &= svga->decode_mask; - if (addr >= svga->vram_max) - return 0xff; + case 0x12: + if (tgui->type >= TGUI_9660) + tgui->linear_base = (tgui->linear_base & 0xff000000) | ((val & 0xc0) << 16); + else + tgui->linear_base = (tgui->linear_base & 0xff000000) | ((val & 0xe0) << 16); + tgui->linear_size = tgui->vram_size; + svga->decode_mask = tgui->vram_mask; + tgui_recalcmapping(tgui); + break; + case 0x13: + if (tgui->type >= TGUI_9660) + tgui->linear_base = (tgui->linear_base & 0xc00000) | (val << 24); + else + tgui->linear_base = (tgui->linear_base & 0xe00000) | (val << 24); + tgui->linear_size = tgui->vram_size; + svga->decode_mask = tgui->vram_mask; + tgui_recalcmapping(tgui); + break; - addr &= ~0xf; - addr = dword_remap(svga, addr); + case 0x16: + if (tgui->type >= TGUI_9660) + tgui->mmio_base = (tgui->mmio_base & 0xff000000) | ((val & 0xc0) << 16); + else + tgui->mmio_base = (tgui->mmio_base & 0xff000000) | ((val & 0xe0) << 16); + tgui_recalcmapping(tgui); + break; + case 0x17: + if (tgui->type >= TGUI_9660) + tgui->mmio_base = (tgui->mmio_base & 0x00c00000) | (val << 24); + else + tgui->mmio_base = (tgui->mmio_base & 0x00e00000) | (val << 24); + tgui_recalcmapping(tgui); + break; - for (c = 0; c < 16; c++) { - tgui->copy_latch[c] = svga->vram[addr+c]; - addr += ((c & 3) == 3) ? 13 : 1; - } - - return svga->vram[addr & svga->vram_mask]; -} - -static uint8_t tgui_ext_read(uint32_t addr, void *p) -{ - svga_t *svga = (svga_t *)p; - - addr = (addr & svga->banked_mask) + svga->read_bank; - - return tgui_ext_linear_read(addr, svga); -} - -static void tgui_ext_linear_write(uint32_t addr, uint8_t val, void *p) -{ - svga_t *svga = (svga_t *)p; - tgui_t *tgui = (tgui_t *)svga->p; - int c; - uint8_t fg[2] = {tgui->ext_gdc_regs[4], tgui->ext_gdc_regs[5]}; - uint8_t bg[2] = {tgui->ext_gdc_regs[1], tgui->ext_gdc_regs[2]}; - uint8_t mask = tgui->ext_gdc_regs[7]; - - cycles -= video_timing_write_b; - - addr &= svga->decode_mask; - if (addr >= svga->vram_max) - return; - addr &= svga->vram_mask; - addr &= (tgui->ext_gdc_regs[0] & 8) ? ~0xf : ~0x7; - - addr = dword_remap(svga, addr); - svga->changedvram[addr >> 12] = changeframecount; - - switch (tgui->ext_gdc_regs[0] & 0xf) - { - /*8-bit mono->colour expansion, unmasked*/ - case 2: - for (c = 7; c >= 0; c--) - { - if (mask & (1 << c)) - *(uint8_t *)&svga->vram[addr] = (val & (1 << c)) ? fg[0] : bg[0]; - addr += (c == 4) ? 13 : 1; + case 0x30: + case 0x32: + case 0x33: + if (tgui->has_bios) { + tgui->pci_regs[addr] = val; + if (tgui->pci_regs[0x30] & 0x01) { + uint32_t biosaddr = (tgui->pci_regs[0x32] << 16) | (tgui->pci_regs[0x33] << 24); + mem_mapping_set_addr(&tgui->bios_rom.mapping, biosaddr, 0x8000); + } else { + mem_mapping_disable(&tgui->bios_rom.mapping); } - break; + } + return; - /*16-bit mono->colour expansion, unmasked*/ - case 3: - for (c = 7; c >= 0; c--) - { - if (mask & (1 << c)) - *(uint8_t *)&svga->vram[addr] = (val & (1 << c)) ? fg[(c & 1) ^ 1] : bg[(c & 1) ^ 1]; - addr += (c == 4) ? 13 : 1; - } - break; - - /*8-bit mono->colour expansion, masked*/ - case 6: - for (c = 7; c >= 0; c--) - { - if ((val & mask) & (1 << c)) - *(uint8_t *)&svga->vram[addr] = fg[0]; - addr += (c == 4) ? 13 : 1; - } - break; - - /*16-bit mono->colour expansion, masked*/ - case 7: - for (c = 7; c >= 0; c--) - { - if ((val & mask) & (1 << c)) - *(uint8_t *)&svga->vram[addr] = fg[(c & 1) ^ 1]; - addr += (c == 4) ? 13 : 1; - } - break; - - case 0x8: case 0x9: case 0xa: case 0xb: - case 0xc: case 0xd: case 0xe: case 0xf: - for (c = 0; c < 16; c++) { - *(uint8_t *)&svga->vram[addr] = tgui->copy_latch[c]; - addr += ((c & 3) == 3) ? 13 : 1; - } - break; - } + case 0x3c: + tgui->int_line = val; + return; + } } -static void tgui_ext_linear_writew(uint32_t addr, uint16_t val, void *p) +static uint8_t +tgui_ext_linear_read(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - tgui_t *tgui = (tgui_t *)svga->p; - int c; - uint8_t fg[2] = {tgui->ext_gdc_regs[4], tgui->ext_gdc_regs[5]}; - uint8_t bg[2] = {tgui->ext_gdc_regs[1], tgui->ext_gdc_regs[2]}; - uint16_t mask = (tgui->ext_gdc_regs[7] << 8) | tgui->ext_gdc_regs[8]; + svga_t *svga = (svga_t *) p; + tgui_t *tgui = (tgui_t *) svga->p; + int c; - cycles -= video_timing_write_w; + cycles -= video_timing_read_b; - addr &= svga->decode_mask; - if (addr >= svga->vram_max) - return; - addr &= svga->vram_mask; - addr &= ~0xf; + addr &= svga->decode_mask; + if (addr >= svga->vram_max) + return 0xff; - addr = dword_remap(svga, addr); - svga->changedvram[addr >> 12] = changeframecount; + addr &= ~0xf; + addr = dword_remap(svga, addr); - val = (val >> 8) | (val << 8); + for (c = 0; c < 16; c++) { + tgui->copy_latch[c] = svga->vram[addr + c]; + addr += ((c & 3) == 3) ? 13 : 1; + } - switch (tgui->ext_gdc_regs[0] & 0xf) - { - /*8-bit mono->colour expansion, unmasked*/ - case 2: - for (c = 15; c >= 0; c--) - { - if (mask & (1 << c)) - *(uint8_t *)&svga->vram[addr] = (val & (1 << c)) ? fg[0] : bg[0]; - addr += (c & 3) ? 1 : 13; - } - break; - - /*16-bit mono->colour expansion, unmasked*/ - case 3: - for (c = 15; c >= 0; c--) - { - if (mask & (1 << c)) - *(uint8_t *)&svga->vram[addr] = (val & (1 << c)) ? fg[(c & 1) ^ 1] : bg[(c & 1) ^ 1]; - addr += (c & 3) ? 1 : 13; - } - break; - - /*8-bit mono->colour expansion, masked*/ - case 6: - for (c = 15; c >= 0; c--) - { - if ((val & mask) & (1 << c)) - *(uint8_t *)&svga->vram[addr] = fg[0]; - addr += (c & 3) ? 1 : 13; - } - break; - - /*16-bit mono->colour expansion, masked*/ - case 7: - for (c = 15; c >= 0; c--) - { - if ((val & mask) & (1 << c)) - *(uint8_t *)&svga->vram[addr] = fg[(c & 1) ^ 1]; - addr += (c & 3) ? 1 : 13; - } - break; - - case 0x8: case 0x9: case 0xa: case 0xb: - case 0xc: case 0xd: case 0xe: case 0xf: - for (c = 0; c < 16; c++) { - *(uint8_t *)&svga->vram[addr+c] = tgui->copy_latch[c]; - addr += ((c & 3) == 3) ? 13 : 1; - } - break; - } + return svga->vram[addr & svga->vram_mask]; } -static void tgui_ext_linear_writel(uint32_t addr, uint32_t val, void *p) +static uint8_t +tgui_ext_read(uint32_t addr, void *p) { - tgui_ext_linear_writew(addr, val, p); + svga_t *svga = (svga_t *) p; + + addr = (addr & svga->banked_mask) + svga->read_bank; + + return tgui_ext_linear_read(addr, svga); } - -static void tgui_ext_write(uint32_t addr, uint8_t val, void *p) +static void +tgui_ext_linear_write(uint32_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; + tgui_t *tgui = (tgui_t *) svga->p; + int c; + uint8_t fg[2] = { tgui->ext_gdc_regs[4], tgui->ext_gdc_regs[5] }; + uint8_t bg[2] = { tgui->ext_gdc_regs[1], tgui->ext_gdc_regs[2] }; + uint8_t mask = tgui->ext_gdc_regs[7]; - addr = (addr & svga->banked_mask) + svga->read_bank; + cycles -= video_timing_write_b; - tgui_ext_linear_write(addr, val, svga); -} -static void tgui_ext_writew(uint32_t addr, uint16_t val, void *p) -{ - svga_t *svga = (svga_t *)p; + addr &= svga->decode_mask; + if (addr >= svga->vram_max) + return; + addr &= svga->vram_mask; + addr &= (tgui->ext_gdc_regs[0] & 8) ? ~0xf : ~0x7; - addr = (addr & svga->banked_mask) + svga->read_bank; + addr = dword_remap(svga, addr); + svga->changedvram[addr >> 12] = changeframecount; - tgui_ext_linear_writew(addr, val, svga); -} -static void tgui_ext_writel(uint32_t addr, uint32_t val, void *p) -{ - svga_t *svga = (svga_t *)p; + switch (tgui->ext_gdc_regs[0] & 0xf) { + /*8-bit mono->colour expansion, unmasked*/ + case 2: + for (c = 7; c >= 0; c--) { + if (mask & (1 << c)) + *(uint8_t *) &svga->vram[addr] = (val & (1 << c)) ? fg[0] : bg[0]; + addr += (c == 4) ? 13 : 1; + } + break; - addr = (addr & svga->banked_mask) + svga->read_bank; + /*16-bit mono->colour expansion, unmasked*/ + case 3: + for (c = 7; c >= 0; c--) { + if (mask & (1 << c)) + *(uint8_t *) &svga->vram[addr] = (val & (1 << c)) ? fg[(c & 1) ^ 1] : bg[(c & 1) ^ 1]; + addr += (c == 4) ? 13 : 1; + } + break; - tgui_ext_linear_writel(addr, val, svga); + /*8-bit mono->colour expansion, masked*/ + case 6: + for (c = 7; c >= 0; c--) { + if ((val & mask) & (1 << c)) + *(uint8_t *) &svga->vram[addr] = fg[0]; + addr += (c == 4) ? 13 : 1; + } + break; + + /*16-bit mono->colour expansion, masked*/ + case 7: + for (c = 7; c >= 0; c--) { + if ((val & mask) & (1 << c)) + *(uint8_t *) &svga->vram[addr] = fg[(c & 1) ^ 1]; + addr += (c == 4) ? 13 : 1; + } + break; + + case 0x8: + case 0x9: + case 0xa: + case 0xb: + case 0xc: + case 0xd: + case 0xe: + case 0xf: + for (c = 0; c < 16; c++) { + *(uint8_t *) &svga->vram[addr] = tgui->copy_latch[c]; + addr += ((c & 3) == 3) ? 13 : 1; + } + break; + } } - -enum +static void +tgui_ext_linear_writew(uint32_t addr, uint16_t val, void *p) { - TGUI_BITBLT = 1, - TGUI_SCANLINE = 3, - TGUI_BRESENHAMLINE = 4, - TGUI_SHORTVECTOR = 5, - TGUI_FASTLINE = 6 + svga_t *svga = (svga_t *) p; + tgui_t *tgui = (tgui_t *) svga->p; + int c; + uint8_t fg[2] = { tgui->ext_gdc_regs[4], tgui->ext_gdc_regs[5] }; + uint8_t bg[2] = { tgui->ext_gdc_regs[1], tgui->ext_gdc_regs[2] }; + uint16_t mask = (tgui->ext_gdc_regs[7] << 8) | tgui->ext_gdc_regs[8]; + + cycles -= video_timing_write_w; + + addr &= svga->decode_mask; + if (addr >= svga->vram_max) + return; + addr &= svga->vram_mask; + addr &= ~0xf; + + addr = dword_remap(svga, addr); + svga->changedvram[addr >> 12] = changeframecount; + + val = (val >> 8) | (val << 8); + + switch (tgui->ext_gdc_regs[0] & 0xf) { + /*8-bit mono->colour expansion, unmasked*/ + case 2: + for (c = 15; c >= 0; c--) { + if (mask & (1 << c)) + *(uint8_t *) &svga->vram[addr] = (val & (1 << c)) ? fg[0] : bg[0]; + addr += (c & 3) ? 1 : 13; + } + break; + + /*16-bit mono->colour expansion, unmasked*/ + case 3: + for (c = 15; c >= 0; c--) { + if (mask & (1 << c)) + *(uint8_t *) &svga->vram[addr] = (val & (1 << c)) ? fg[(c & 1) ^ 1] : bg[(c & 1) ^ 1]; + addr += (c & 3) ? 1 : 13; + } + break; + + /*8-bit mono->colour expansion, masked*/ + case 6: + for (c = 15; c >= 0; c--) { + if ((val & mask) & (1 << c)) + *(uint8_t *) &svga->vram[addr] = fg[0]; + addr += (c & 3) ? 1 : 13; + } + break; + + /*16-bit mono->colour expansion, masked*/ + case 7: + for (c = 15; c >= 0; c--) { + if ((val & mask) & (1 << c)) + *(uint8_t *) &svga->vram[addr] = fg[(c & 1) ^ 1]; + addr += (c & 3) ? 1 : 13; + } + break; + + case 0x8: + case 0x9: + case 0xa: + case 0xb: + case 0xc: + case 0xd: + case 0xe: + case 0xf: + for (c = 0; c < 16; c++) { + *(uint8_t *) &svga->vram[addr + c] = tgui->copy_latch[c]; + addr += ((c & 3) == 3) ? 13 : 1; + } + break; + } +} + +static void +tgui_ext_linear_writel(uint32_t addr, uint32_t val, void *p) +{ + tgui_ext_linear_writew(addr, val, p); +} + +static void +tgui_ext_write(uint32_t addr, uint8_t val, void *p) +{ + svga_t *svga = (svga_t *) p; + + addr = (addr & svga->banked_mask) + svga->read_bank; + + tgui_ext_linear_write(addr, val, svga); +} +static void +tgui_ext_writew(uint32_t addr, uint16_t val, void *p) +{ + svga_t *svga = (svga_t *) p; + + addr = (addr & svga->banked_mask) + svga->read_bank; + + tgui_ext_linear_writew(addr, val, svga); +} +static void +tgui_ext_writel(uint32_t addr, uint32_t val, void *p) +{ + svga_t *svga = (svga_t *) p; + + addr = (addr & svga->banked_mask) + svga->read_bank; + + tgui_ext_linear_writel(addr, val, svga); +} + +enum { + TGUI_BITBLT = 1, + TGUI_SCANLINE = 3, + TGUI_BRESENHAMLINE = 4, + TGUI_SHORTVECTOR = 5, + TGUI_FASTLINE = 6 }; -enum -{ - TGUI_SRCCPU = 0, - TGUI_SRCPAT = 0x02, /*Source is from pattern*/ - TGUI_SRCDISP = 0x04, /*Source is from display*/ - TGUI_PATMONO = 0x20, /*Pattern is monochrome and needs expansion*/ - TGUI_SRCMONO = 0x40, /*Source is monochrome from CPU and needs expansion*/ - TGUI_TRANSENA = 0x1000, /*Transparent (no draw when source == bg col)*/ - TGUI_TRANSREV = 0x2000, /*Reverse fg/bg for transparent*/ - TGUI_SOLIDFILL = 0x4000, /*Pattern set to foreground color*/ - TGUI_STENCIL = 0x8000 /*Stencil*/ +enum { + TGUI_SRCCPU = 0, + TGUI_SRCPAT = 0x02, /*Source is from pattern*/ + TGUI_SRCDISP = 0x04, /*Source is from display*/ + TGUI_PATMONO = 0x20, /*Pattern is monochrome and needs expansion*/ + TGUI_SRCMONO = 0x40, /*Source is monochrome from CPU and needs expansion*/ + TGUI_TRANSENA = 0x1000, /*Transparent (no draw when source == bg col)*/ + TGUI_TRANSREV = 0x2000, /*Reverse fg/bg for transparent*/ + TGUI_SOLIDFILL = 0x4000, /*Pattern set to foreground color*/ + TGUI_STENCIL = 0x8000 /*Stencil*/ }; -#define READ(addr, dat) if (tgui->accel.bpp == 0) dat = svga->vram[(addr) & tgui->vram_mask]; \ - else if (tgui->accel.bpp == 1) dat = vram_w[(addr) & (tgui->vram_mask >> 1)]; \ - else dat = vram_l[(addr) & (tgui->vram_mask >> 2)]; \ +#define READ(addr, dat) \ + if (tgui->accel.bpp == 0) \ + dat = svga->vram[(addr) &tgui->vram_mask]; \ + else if (tgui->accel.bpp == 1) \ + dat = vram_w[(addr) & (tgui->vram_mask >> 1)]; \ + else \ + dat = vram_l[(addr) & (tgui->vram_mask >> 2)]; -#define MIX() do \ - { \ - out = 0; \ - for (c=0;c<32;c++) \ - { \ - d=(dst_dat & (1<accel.rop & (1<accel.rop & (1 << d)) \ + out |= (1 << c); \ + } \ + } while (0) -#define WRITE(addr, dat) if (tgui->accel.bpp == 0) \ - { \ - svga->vram[(addr) & tgui->vram_mask] = dat; \ - svga->changedvram[((addr) & (tgui->vram_mask)) >> 12] = changeframecount; \ - } \ - else if (tgui->accel.bpp == 1) \ - { \ - vram_w[(addr) & (tgui->vram_mask >> 1)] = dat; \ - svga->changedvram[((addr) & (tgui->vram_mask >> 1)) >> 11] = changeframecount; \ - } \ - else \ - { \ - vram_l[(addr) & (tgui->vram_mask >> 2)] = dat; \ - svga->changedvram[((addr) & (tgui->vram_mask >> 2)) >> 10] = changeframecount; \ - } +#define WRITE(addr, dat) \ + if (tgui->accel.bpp == 0) { \ + svga->vram[(addr) &tgui->vram_mask] = dat; \ + svga->changedvram[((addr) & (tgui->vram_mask)) >> 12] = changeframecount; \ + } else if (tgui->accel.bpp == 1) { \ + vram_w[(addr) & (tgui->vram_mask >> 1)] = dat; \ + svga->changedvram[((addr) & (tgui->vram_mask >> 1)) >> 11] = changeframecount; \ + } else { \ + vram_l[(addr) & (tgui->vram_mask >> 2)] = dat; \ + svga->changedvram[((addr) & (tgui->vram_mask >> 2)) >> 10] = changeframecount; \ + } static void tgui_accel_command(int count, uint32_t cpu_dat, tgui_t *tgui) { - svga_t *svga = &tgui->svga; - uint32_t *pattern_data; - int x, y; - int c, d; - uint32_t out; - uint32_t src_dat = 0, dst_dat, pat_dat; - int xdir = (tgui->accel.flags & 0x200) ? -1 : 1; - int ydir = (tgui->accel.flags & 0x100) ? -1 : 1; - uint32_t trans_col = (tgui->accel.flags & TGUI_TRANSREV) ? tgui->accel.fg_col : tgui->accel.bg_col; - uint16_t *vram_w = (uint16_t *)svga->vram; - uint32_t *vram_l = (uint32_t *)svga->vram; - - if (tgui->accel.bpp == 0) { - trans_col &= 0xff; - } else if (tgui->accel.bpp == 1) { - trans_col &= 0xffff; - } - - if (count != -1 && !tgui->accel.x && (tgui->accel.flags & TGUI_SRCMONO)) - { - count -= (tgui->accel.flags >> 24) & 7; - cpu_dat <<= (tgui->accel.flags >> 24) & 7; - } - - if (count == -1) - tgui->accel.x = tgui->accel.y = 0; - - if (tgui->accel.flags & TGUI_SOLIDFILL) { - for (y = 0; y < 8; y++) - { - for (x = 0; x < 8; x++) - { - tgui->accel.fill_pattern[(y*8) + (7 - x)] = tgui->accel.fg_col; - } - } - pattern_data = tgui->accel.fill_pattern; - } else if (tgui->accel.flags & TGUI_PATMONO) { - for (y = 0; y < 8; y++) - { - for (x = 0; x < 8; x++) - { - tgui->accel.mono_pattern[(y*8) + (7 - x)] = (tgui->accel.pattern[y] & (1 << x)) ? tgui->accel.fg_col : tgui->accel.bg_col; - } - } - pattern_data = tgui->accel.mono_pattern; - } else { - if (tgui->accel.bpp == 0) { - for (y = 0; y < 8; y++) - { - for (x = 0; x < 8; x++) - { - tgui->accel.pattern_8[(y*8) + (7 - x)] = tgui->accel.pattern[x + y*8]; - } - } - pattern_data = tgui->accel.pattern_8; - } else if (tgui->accel.bpp == 1) { - for (y = 0; y < 8; y++) - { - for (x = 0; x < 8; x++) - { - tgui->accel.pattern_16[(y*8) + (7 - x)] = tgui->accel.pattern[x*2 + y*16] | (tgui->accel.pattern[x*2 + y*16 + 1] << 8); - } - } - pattern_data = tgui->accel.pattern_16; - } else { - for (y = 0; y < 4; y++) - { - for (x = 0; x < 8; x++) - { - tgui->accel.pattern_32[(y*8) + (7 - x)] = tgui->accel.pattern[x*4 + y*32] | (tgui->accel.pattern[x*4 + y*32 + 1] << 8) | (tgui->accel.pattern[x*4 + y*32 + 2] << 16) | (tgui->accel.pattern[x*4 + y*32 + 3] << 24); - tgui->accel.pattern_32[((y+4)*8) + (7 - x)] = tgui->accel.pattern[x*4 + y*32] | (tgui->accel.pattern[x*4 + y*32 + 1] << 8) | (tgui->accel.pattern[x*4 + y*32 + 2] << 16) | (tgui->accel.pattern[x*4 + y*32 + 3] << 24); - } - } - pattern_data = tgui->accel.pattern_32; - } - } - - /*Other than mode stuff, this bit is undocumented*/ - switch (tgui->accel.ger22 & 0xff) { - case 0: - switch (tgui->accel.ger22 >> 8) { - case 0x41: - tgui->accel.pitch = 640; - break; - } - break; - - case 4: - switch (tgui->accel.ger22 >> 8) { - case 0: - tgui->accel.pitch = 1024; - break; - case 0x40: - tgui->accel.pitch = 640; - break; - case 0x50: - tgui->accel.pitch = 832; - break; - } - break; - case 8: - switch (tgui->accel.ger22 >> 8) { - case 0: - tgui->accel.pitch = 2048; - break; - case 0x60: - tgui->accel.pitch = 1280; - break; - } - break; - case 9: - switch (tgui->accel.ger22 >> 8) { - case 0: - tgui->accel.pitch = svga->hdisp; - if (tgui->type == TGUI_9440) - tgui->accel.pitch = 1024; - break; - case 0x40: - tgui->accel.pitch = 640; - break; - case 0x50: - tgui->accel.pitch = 832; - break; - } - break; - case 13: - switch (tgui->accel.ger22 >> 8) { - case 0x60: - tgui->accel.pitch = 2048; - if (tgui->type >= TGUI_9660) { - if (svga->hdisp == 1280) - tgui->accel.pitch = svga->hdisp; - } - break; - } - break; - case 14: - switch (tgui->accel.ger22 >> 8) { - case 0: - tgui->accel.pitch = 1024; - break; - case 0x40: - tgui->accel.pitch = 640; - break; - case 0x50: - tgui->accel.pitch = 832; - break; - } - break; - } - - switch (tgui->accel.command) - { - case TGUI_BITBLT: - if (count == -1) { - tgui->accel.src_old = tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch); - tgui->accel.src = tgui->accel.src_old; - - tgui->accel.dst_old = tgui->accel.dst_x + (tgui->accel.dst_y * tgui->accel.pitch); - tgui->accel.dst = tgui->accel.dst_old; - - tgui->accel.pat_x = tgui->accel.dst_x; - tgui->accel.pat_y = tgui->accel.dst_y; - - tgui->accel.dx = tgui->accel.dst_x & 0xfff; - tgui->accel.dy = tgui->accel.dst_y & 0xfff; - - tgui->accel.left = tgui->accel.src_x_clip & 0xfff; - tgui->accel.right = tgui->accel.dst_x_clip & 0xfff; - tgui->accel.top = tgui->accel.src_y_clip & 0xfff; - tgui->accel.bottom = tgui->accel.dst_y_clip & 0xfff; - - if (tgui->accel.bpp == 1) { - tgui->accel.left >>= 1; - tgui->accel.right >>= 1; - } else if (tgui->accel.bpp == 3) { - tgui->accel.left >>= 2; - tgui->accel.right >>= 2; - } - } - - switch (tgui->accel.flags & (TGUI_SRCMONO|TGUI_SRCDISP)) - { - case TGUI_SRCCPU: - if (count == -1) { - if (svga->crtc[0x21] & 0x20) - tgui->write_blitter = 1; - if (tgui->accel.use_src) - return; - } else - count >>= 3; - - while (count) { - if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && tgui->accel.dx >= tgui->accel.left && tgui->accel.dx <= tgui->accel.right && - tgui->accel.dy >= tgui->accel.top && tgui->accel.dy <= tgui->accel.bottom)) { - if (tgui->accel.bpp == 0) { - src_dat = cpu_dat >> 24; - cpu_dat <<= 8; - } else if (tgui->accel.bpp == 1) { - src_dat = (cpu_dat >> 24) | ((cpu_dat >> 8) & 0xff00); - cpu_dat <<= 16; - count--; - } else { - src_dat = (cpu_dat >> 24) | ((cpu_dat >> 8) & 0x0000ff00) | ((cpu_dat << 8) & 0x00ff0000); - cpu_dat <<= 16; - count -= 3; - } - - READ(tgui->accel.dst, dst_dat); - - pat_dat = pattern_data[((tgui->accel.pat_y & 7)*8) + (tgui->accel.pat_x & 7)]; - - if (tgui->accel.bpp == 0) - pat_dat &= 0xff; - else if (tgui->accel.bpp == 1) - pat_dat &= 0xffff; - - if ((((tgui->accel.flags & (TGUI_PATMONO|TGUI_TRANSENA)) == (TGUI_TRANSENA|TGUI_PATMONO)) && (pat_dat != trans_col)) || !(tgui->accel.flags & TGUI_PATMONO) || - ((tgui->accel.flags & (TGUI_PATMONO|TGUI_TRANSENA)) == TGUI_PATMONO) || (tgui->accel.ger22 & 0x200)) { - MIX(); - - WRITE(tgui->accel.dst, out); - } - } - - tgui->accel.src += xdir; - tgui->accel.dst += xdir; - tgui->accel.pat_x += xdir; - if (tgui->type >= TGUI_9660) - tgui->accel.dx += xdir; - - tgui->accel.x++; - if (tgui->accel.x > tgui->accel.size_x) { - tgui->accel.x = 0; - - tgui->accel.pat_x = tgui->accel.dst_x; - tgui->accel.pat_y += ydir; - - if (tgui->type >= TGUI_9660) { - tgui->accel.dx = tgui->accel.dst_x & 0xfff; - tgui->accel.dy += ydir; - } - - tgui->accel.src_old += (ydir * tgui->accel.pitch); - tgui->accel.dst_old += (ydir * tgui->accel.pitch); - - tgui->accel.src = tgui->accel.src_old; - tgui->accel.dst = tgui->accel.dst_old; - - tgui->accel.y++; - - if (tgui->accel.y > tgui->accel.size_y) { - if (svga->crtc[0x21] & 0x20) - tgui->write_blitter = 0; - return; - } - if (tgui->accel.use_src) - return; - } - count--; - } - break; - - case TGUI_SRCMONO | TGUI_SRCCPU: - if (count == -1) { - if (svga->crtc[0x21] & 0x20) - tgui->write_blitter = 1; - if (tgui->accel.use_src) - return; - } - - while (count--) { - if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && tgui->accel.dx >= tgui->accel.left && tgui->accel.dx <= tgui->accel.right && - tgui->accel.dy >= tgui->accel.top && tgui->accel.dy <= tgui->accel.bottom)) { - src_dat = ((cpu_dat >> 31) ? tgui->accel.fg_col : tgui->accel.bg_col); - if (tgui->accel.bpp == 0) - src_dat &= 0xff; - else if (tgui->accel.bpp == 1) - src_dat &= 0xffff; - - READ(tgui->accel.dst, dst_dat); - - pat_dat = pattern_data[((tgui->accel.pat_y & 7)*8) + (tgui->accel.pat_x & 7)]; - - if (tgui->accel.bpp == 0) - pat_dat &= 0xff; - else if (tgui->accel.bpp == 1) - pat_dat &= 0xffff; - - if (!(tgui->accel.flags & TGUI_TRANSENA) || (src_dat != trans_col)) { - MIX(); - - WRITE(tgui->accel.dst, out); - } - } - - cpu_dat <<= 1; - tgui->accel.src += xdir; - tgui->accel.dst += xdir; - tgui->accel.pat_x += xdir; - if (tgui->type >= TGUI_9660) - tgui->accel.dx += xdir; - - tgui->accel.x++; - if (tgui->accel.x > tgui->accel.size_x) { - tgui->accel.x = 0; - - tgui->accel.pat_x = tgui->accel.dst_x; - tgui->accel.pat_y += ydir; - - if (tgui->type >= TGUI_9660) { - tgui->accel.dx = tgui->accel.dst_x & 0xfff; - tgui->accel.dy += ydir; - } - - tgui->accel.src = tgui->accel.src_old = tgui->accel.src_old + (ydir * tgui->accel.pitch); - tgui->accel.dst = tgui->accel.dst_old = tgui->accel.dst_old + (ydir * tgui->accel.pitch); - - tgui->accel.y++; - - if (tgui->accel.y > tgui->accel.size_y) { - if (svga->crtc[0x21] & 0x20) - tgui->write_blitter = 0; - return; - } - if (tgui->accel.use_src) - return; - } - } - break; - - default: - while (count--) { - READ(tgui->accel.src, src_dat); - READ(tgui->accel.dst, dst_dat); - - pat_dat = pattern_data[((tgui->accel.pat_y & 7)*8) + (tgui->accel.pat_x & 7)]; - - if (tgui->accel.bpp == 0) - pat_dat &= 0xff; - else if (tgui->accel.bpp == 1) - pat_dat &= 0xffff; - - if (!(tgui->accel.flags & TGUI_TRANSENA) || (src_dat != trans_col)) { - MIX(); - - WRITE(tgui->accel.dst, out); - } - - tgui->accel.src += xdir; - tgui->accel.dst += xdir; - tgui->accel.pat_x += xdir; - - tgui->accel.x++; - if (tgui->accel.x > tgui->accel.size_x) - { - tgui->accel.x = 0; - tgui->accel.y++; - - tgui->accel.pat_x = tgui->accel.dst_x; - tgui->accel.pat_y += ydir; - - tgui->accel.src = tgui->accel.src_old = tgui->accel.src_old + (ydir * tgui->accel.pitch); - tgui->accel.dst = tgui->accel.dst_old = tgui->accel.dst_old + (ydir * tgui->accel.pitch); - - if (tgui->accel.y > tgui->accel.size_y) - return; - } - } - break; - } - break; - - case TGUI_SCANLINE: - { - if (count == -1) { - tgui->accel.src_old = tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch); - tgui->accel.src = tgui->accel.src_old; - - tgui->accel.dst_old = tgui->accel.dst_x + (tgui->accel.dst_y * tgui->accel.pitch); - tgui->accel.dst = tgui->accel.dst_old; - - tgui->accel.pat_x = tgui->accel.dst_x; - tgui->accel.pat_y = tgui->accel.dst_y; - } - - while (count--) { - READ(tgui->accel.src, src_dat); - READ(tgui->accel.dst, dst_dat); - - pat_dat = pattern_data[((tgui->accel.pat_y & 7)*8) + (tgui->accel.pat_x & 7)]; - - if (tgui->accel.bpp == 0) - pat_dat &= 0xff; - else if (tgui->accel.bpp == 1) - pat_dat &= 0xffff; - - if (!(tgui->accel.flags & TGUI_TRANSENA) || (src_dat != trans_col)) { - MIX(); - - WRITE(tgui->accel.dst, out); - } - - tgui->accel.src += xdir; - tgui->accel.dst += xdir; - tgui->accel.pat_x += xdir; - - tgui->accel.x++; - if (tgui->accel.x > tgui->accel.size_x) - { - tgui->accel.x = 0; - - tgui->accel.pat_x = tgui->accel.dst_x; - tgui->accel.src = tgui->accel.src_old = tgui->accel.src_old + (ydir * tgui->accel.pitch); - tgui->accel.dst = tgui->accel.dst_old = tgui->accel.dst_old + (ydir * tgui->accel.pitch); - tgui->accel.pat_y += ydir; - return; - } - } - } - break; - - case TGUI_BRESENHAMLINE: - { - int steep = 1; - int16_t dminor, dmajor, destxtmp, tmpswap; - int16_t cx, cy, dx, dy, err; - -#define SWAP(a,b) tmpswap = a; a = b; b = tmpswap; - - dminor = tgui->accel.src_y; - if (tgui->accel.src_y & 0x1000) - dminor |= ~0xfff; - dminor >>= 1; - - destxtmp = tgui->accel.src_x; - if (tgui->accel.src_x & 0x1000) - destxtmp |= ~0xfff; - - dmajor = -(destxtmp - (dminor << 1)) >> 1; - - cx = dmajor; - cy = dminor; - - dx = tgui->accel.dst_x & 0xfff; - dy = tgui->accel.dst_y & 0xfff; - - tgui->accel.left = tgui->accel.src_x_clip & 0xfff; - tgui->accel.right = tgui->accel.dst_x_clip & 0xfff; - tgui->accel.top = tgui->accel.src_y_clip & 0xfff; - tgui->accel.bottom = tgui->accel.dst_y_clip & 0xfff; - - if (tgui->accel.bpp == 1) { - tgui->accel.left >>= 1; - tgui->accel.right >>= 1; - } else if (tgui->accel.bpp == 3) { - tgui->accel.left >>= 2; - tgui->accel.right >>= 2; - } - - err = tgui->accel.size_x + tgui->accel.src_y; - if ((tgui->accel.size_x + tgui->accel.src_y) & 0x1000) - err |= ~0xfff; - - if (tgui->accel.flags & 0x400) { - steep = 0; - SWAP(dx, dy); - SWAP(xdir, ydir); - } - - while (count--) { - READ(tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch), src_dat); - - /*Note by TC1995: I suppose the x/y clipping max is always more than 0 in the TGUI 96xx, but the TGUI 9440 lacks clipping*/ - if (steep) { - if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && dx >= tgui->accel.left && dx <= tgui->accel.right && - dy >= tgui->accel.top && dy <= tgui->accel.bottom)) { - READ(dx + (dy * tgui->accel.pitch), dst_dat); - - pat_dat = tgui->accel.fg_col; - - if (tgui->accel.bpp == 0) - pat_dat &= 0xff; - else if (tgui->accel.bpp == 1) - pat_dat &= 0xffff; - - MIX(); - - WRITE(dx + (dy * tgui->accel.pitch), out); - } - } else { - if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && dy >= tgui->accel.left && dy <= tgui->accel.right && - dx >= tgui->accel.top && dx <= tgui->accel.bottom)) { - READ(dy + (dx * tgui->accel.pitch), dst_dat); - - pat_dat = tgui->accel.fg_col; - - if (tgui->accel.bpp == 0) - pat_dat &= 0xff; - else if (tgui->accel.bpp == 1) - pat_dat &= 0xffff; - - MIX(); - - WRITE(dy + (dx * tgui->accel.pitch), out); - } - } - - if (tgui->accel.y == tgui->accel.size_y) - break; - - while (err > 0) { - dy += ydir; - err -= (cx << 1); - } - dx += xdir; - err += (cy << 1); - - tgui->accel.y++; - } - } - break; - - case TGUI_SHORTVECTOR: - { - int16_t dx, dy; - - dx = tgui->accel.dst_x & 0xfff; - dy = tgui->accel.dst_y & 0xfff; - - tgui->accel.left = tgui->accel.src_x_clip & 0xfff; - tgui->accel.right = tgui->accel.dst_x_clip & 0xfff; - tgui->accel.top = tgui->accel.src_y_clip & 0xfff; - tgui->accel.bottom = tgui->accel.dst_y_clip & 0xfff; - - if (tgui->accel.bpp == 1) { - tgui->accel.left >>= 1; - tgui->accel.right >>= 1; - } else if (tgui->accel.bpp == 3) { - tgui->accel.left >>= 2; - tgui->accel.right >>= 2; - } - - while (count--) { - READ(tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch), src_dat); - - /*Note by TC1995: I suppose the x/y clipping max is always more than 0 in the TGUI 96xx, but the TGUI 9440 lacks clipping*/ - if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && dx >= tgui->accel.left && dx <= tgui->accel.right && - dy >= tgui->accel.top && dy <= tgui->accel.bottom)) { - READ(dx + (dy * tgui->accel.pitch), dst_dat); - - pat_dat = tgui->accel.fg_col; - - if (tgui->accel.bpp == 0) - pat_dat &= 0xff; - else if (tgui->accel.bpp == 1) - pat_dat &= 0xffff; - - MIX(); - - WRITE(dx + (dy * tgui->accel.pitch), out); - } - - if (tgui->accel.y == (tgui->accel.sv_size_y & 0xfff)) - break; - - switch ((tgui->accel.sv_size_y >> 8) & 0xe0) { - case 0x00: - dx++; - break; - case 0x20: - dx++; - dy--; - break; - case 0x40: - dy--; - break; - case 0x60: - dx--; - dy--; - break; - case 0x80: - dx--; - break; - case 0xa0: - dx--; - dy++; - break; - case 0xc0: - dy++; - break; - case 0xe0: - dx++; - dy++; - break; - } - - tgui->accel.y++; - } - } - break; - - case TGUI_FASTLINE: - { - if (tgui->type < TGUI_9660) - break; - - int16_t dx, dy; - - dx = tgui->accel.dst_x & 0xfff; - dy = tgui->accel.dst_y & 0xfff; - - tgui->accel.left = tgui->accel.src_x_clip & 0xfff; - tgui->accel.right = tgui->accel.dst_x_clip & 0xfff; - tgui->accel.top = tgui->accel.src_y_clip & 0xfff; - tgui->accel.bottom = tgui->accel.dst_y_clip & 0xfff; - - if (tgui->accel.bpp == 1) { - tgui->accel.left >>= 1; - tgui->accel.right >>= 1; - } else if (tgui->accel.bpp == 3) { - tgui->accel.left >>= 2; - tgui->accel.right >>= 2; - } - - while (count--) { - READ(tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch), src_dat); - - /*Note by TC1995: I suppose the x/y clipping max is always more than 0 in the TGUI 96xx, but the TGUI 9440 lacks clipping*/ - if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && dx >= tgui->accel.left && dx <= tgui->accel.right && - dy >= tgui->accel.top && dy <= tgui->accel.bottom)) { - READ(dx + (dy * tgui->accel.pitch), dst_dat); - - pat_dat = tgui->accel.fg_col; - - if (tgui->accel.bpp == 0) - pat_dat &= 0xff; - else if (tgui->accel.bpp == 1) - pat_dat &= 0xffff; - - MIX(); - - WRITE(dx + (dy * tgui->accel.pitch), out); - } - - if (tgui->accel.y == (tgui->accel.size_y & 0xfff)) - break; - - switch ((tgui->accel.size_y >> 8) & 0xe0) { - case 0x00: - dx++; - break; - case 0x20: - dx++; - dy--; - break; - case 0x40: - dy--; - break; - case 0x60: - dx--; - dy--; - break; - case 0x80: - dx--; - break; - case 0xa0: - dx--; - dy++; - break; - case 0xc0: - dy++; - break; - case 0xe0: - dx++; - dy++; - break; - } - - tgui->accel.y++; - } - } - break; - } + svga_t *svga = &tgui->svga; + uint32_t *pattern_data; + int x, y; + int c, d; + uint32_t out; + uint32_t src_dat = 0, dst_dat, pat_dat; + int xdir = (tgui->accel.flags & 0x200) ? -1 : 1; + int ydir = (tgui->accel.flags & 0x100) ? -1 : 1; + uint32_t trans_col = (tgui->accel.flags & TGUI_TRANSREV) ? tgui->accel.fg_col : tgui->accel.bg_col; + uint16_t *vram_w = (uint16_t *) svga->vram; + uint32_t *vram_l = (uint32_t *) svga->vram; + + if (tgui->accel.bpp == 0) { + trans_col &= 0xff; + } else if (tgui->accel.bpp == 1) { + trans_col &= 0xffff; + } + + if (count != -1 && !tgui->accel.x && (tgui->accel.flags & TGUI_SRCMONO)) { + count -= (tgui->accel.flags >> 24) & 7; + cpu_dat <<= (tgui->accel.flags >> 24) & 7; + } + + if (count == -1) + tgui->accel.x = tgui->accel.y = 0; + + if (tgui->accel.flags & TGUI_SOLIDFILL) { + for (y = 0; y < 8; y++) { + for (x = 0; x < 8; x++) { + tgui->accel.fill_pattern[(y * 8) + (7 - x)] = tgui->accel.fg_col; + } + } + pattern_data = tgui->accel.fill_pattern; + } else if (tgui->accel.flags & TGUI_PATMONO) { + for (y = 0; y < 8; y++) { + for (x = 0; x < 8; x++) { + tgui->accel.mono_pattern[(y * 8) + (7 - x)] = (tgui->accel.pattern[y] & (1 << x)) ? tgui->accel.fg_col : tgui->accel.bg_col; + } + } + pattern_data = tgui->accel.mono_pattern; + } else { + if (tgui->accel.bpp == 0) { + for (y = 0; y < 8; y++) { + for (x = 0; x < 8; x++) { + tgui->accel.pattern_8[(y * 8) + (7 - x)] = tgui->accel.pattern[x + y * 8]; + } + } + pattern_data = tgui->accel.pattern_8; + } else if (tgui->accel.bpp == 1) { + for (y = 0; y < 8; y++) { + for (x = 0; x < 8; x++) { + tgui->accel.pattern_16[(y * 8) + (7 - x)] = tgui->accel.pattern[x * 2 + y * 16] | (tgui->accel.pattern[x * 2 + y * 16 + 1] << 8); + } + } + pattern_data = tgui->accel.pattern_16; + } else { + for (y = 0; y < 4; y++) { + for (x = 0; x < 8; x++) { + tgui->accel.pattern_32[(y * 8) + (7 - x)] = tgui->accel.pattern[x * 4 + y * 32] | (tgui->accel.pattern[x * 4 + y * 32 + 1] << 8) | (tgui->accel.pattern[x * 4 + y * 32 + 2] << 16) | (tgui->accel.pattern[x * 4 + y * 32 + 3] << 24); + tgui->accel.pattern_32[((y + 4) * 8) + (7 - x)] = tgui->accel.pattern[x * 4 + y * 32] | (tgui->accel.pattern[x * 4 + y * 32 + 1] << 8) | (tgui->accel.pattern[x * 4 + y * 32 + 2] << 16) | (tgui->accel.pattern[x * 4 + y * 32 + 3] << 24); + } + } + pattern_data = tgui->accel.pattern_32; + } + } + + /*Other than mode stuff, this bit is undocumented*/ + switch (tgui->accel.ger22 & 0xff) { + case 0: + switch (tgui->accel.ger22 >> 8) { + case 0x41: + tgui->accel.pitch = 640; + break; + } + break; + + case 4: + switch (tgui->accel.ger22 >> 8) { + case 0: + tgui->accel.pitch = 1024; + break; + case 0x40: + tgui->accel.pitch = 640; + break; + case 0x50: + tgui->accel.pitch = 832; + break; + } + break; + case 8: + switch (tgui->accel.ger22 >> 8) { + case 0: + tgui->accel.pitch = 2048; + break; + case 0x60: + tgui->accel.pitch = 1280; + break; + } + break; + case 9: + switch (tgui->accel.ger22 >> 8) { + case 0: + tgui->accel.pitch = svga->hdisp; + if (tgui->type == TGUI_9440) + tgui->accel.pitch = 1024; + break; + case 0x40: + tgui->accel.pitch = 640; + break; + case 0x50: + tgui->accel.pitch = 832; + break; + } + break; + case 13: + switch (tgui->accel.ger22 >> 8) { + case 0x60: + tgui->accel.pitch = 2048; + if (tgui->type >= TGUI_9660) { + if (svga->hdisp == 1280) + tgui->accel.pitch = svga->hdisp; + } + break; + } + break; + case 14: + switch (tgui->accel.ger22 >> 8) { + case 0: + tgui->accel.pitch = 1024; + break; + case 0x40: + tgui->accel.pitch = 640; + break; + case 0x50: + tgui->accel.pitch = 832; + break; + } + break; + } + + switch (tgui->accel.command) { + case TGUI_BITBLT: + if (count == -1) { + tgui->accel.src_old = tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch); + tgui->accel.src = tgui->accel.src_old; + + tgui->accel.dst_old = tgui->accel.dst_x + (tgui->accel.dst_y * tgui->accel.pitch); + tgui->accel.dst = tgui->accel.dst_old; + + tgui->accel.pat_x = tgui->accel.dst_x; + tgui->accel.pat_y = tgui->accel.dst_y; + + tgui->accel.dx = tgui->accel.dst_x & 0xfff; + tgui->accel.dy = tgui->accel.dst_y & 0xfff; + + tgui->accel.left = tgui->accel.src_x_clip & 0xfff; + tgui->accel.right = tgui->accel.dst_x_clip & 0xfff; + tgui->accel.top = tgui->accel.src_y_clip & 0xfff; + tgui->accel.bottom = tgui->accel.dst_y_clip & 0xfff; + + if (tgui->accel.bpp == 1) { + tgui->accel.left >>= 1; + tgui->accel.right >>= 1; + } else if (tgui->accel.bpp == 3) { + tgui->accel.left >>= 2; + tgui->accel.right >>= 2; + } + } + + switch (tgui->accel.flags & (TGUI_SRCMONO | TGUI_SRCDISP)) { + case TGUI_SRCCPU: + if (count == -1) { + if (svga->crtc[0x21] & 0x20) + tgui->write_blitter = 1; + if (tgui->accel.use_src) + return; + } else + count >>= 3; + + while (count) { + if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && tgui->accel.dx >= tgui->accel.left && tgui->accel.dx <= tgui->accel.right && tgui->accel.dy >= tgui->accel.top && tgui->accel.dy <= tgui->accel.bottom)) { + if (tgui->accel.bpp == 0) { + src_dat = cpu_dat >> 24; + cpu_dat <<= 8; + } else if (tgui->accel.bpp == 1) { + src_dat = (cpu_dat >> 24) | ((cpu_dat >> 8) & 0xff00); + cpu_dat <<= 16; + count--; + } else { + src_dat = (cpu_dat >> 24) | ((cpu_dat >> 8) & 0x0000ff00) | ((cpu_dat << 8) & 0x00ff0000); + cpu_dat <<= 16; + count -= 3; + } + + READ(tgui->accel.dst, dst_dat); + + pat_dat = pattern_data[((tgui->accel.pat_y & 7) * 8) + (tgui->accel.pat_x & 7)]; + + if (tgui->accel.bpp == 0) + pat_dat &= 0xff; + else if (tgui->accel.bpp == 1) + pat_dat &= 0xffff; + + if ((((tgui->accel.flags & (TGUI_PATMONO | TGUI_TRANSENA)) == (TGUI_TRANSENA | TGUI_PATMONO)) && (pat_dat != trans_col)) || !(tgui->accel.flags & TGUI_PATMONO) || ((tgui->accel.flags & (TGUI_PATMONO | TGUI_TRANSENA)) == TGUI_PATMONO) || (tgui->accel.ger22 & 0x200)) { + MIX(); + + WRITE(tgui->accel.dst, out); + } + } + + tgui->accel.src += xdir; + tgui->accel.dst += xdir; + tgui->accel.pat_x += xdir; + if (tgui->type >= TGUI_9660) + tgui->accel.dx += xdir; + + tgui->accel.x++; + if (tgui->accel.x > tgui->accel.size_x) { + tgui->accel.x = 0; + + tgui->accel.pat_x = tgui->accel.dst_x; + tgui->accel.pat_y += ydir; + + if (tgui->type >= TGUI_9660) { + tgui->accel.dx = tgui->accel.dst_x & 0xfff; + tgui->accel.dy += ydir; + } + + tgui->accel.src_old += (ydir * tgui->accel.pitch); + tgui->accel.dst_old += (ydir * tgui->accel.pitch); + + tgui->accel.src = tgui->accel.src_old; + tgui->accel.dst = tgui->accel.dst_old; + + tgui->accel.y++; + + if (tgui->accel.y > tgui->accel.size_y) { + if (svga->crtc[0x21] & 0x20) + tgui->write_blitter = 0; + return; + } + if (tgui->accel.use_src) + return; + } + count--; + } + break; + + case TGUI_SRCMONO | TGUI_SRCCPU: + if (count == -1) { + if (svga->crtc[0x21] & 0x20) + tgui->write_blitter = 1; + if (tgui->accel.use_src) + return; + } + + while (count--) { + if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && tgui->accel.dx >= tgui->accel.left && tgui->accel.dx <= tgui->accel.right && tgui->accel.dy >= tgui->accel.top && tgui->accel.dy <= tgui->accel.bottom)) { + src_dat = ((cpu_dat >> 31) ? tgui->accel.fg_col : tgui->accel.bg_col); + if (tgui->accel.bpp == 0) + src_dat &= 0xff; + else if (tgui->accel.bpp == 1) + src_dat &= 0xffff; + + READ(tgui->accel.dst, dst_dat); + + pat_dat = pattern_data[((tgui->accel.pat_y & 7) * 8) + (tgui->accel.pat_x & 7)]; + + if (tgui->accel.bpp == 0) + pat_dat &= 0xff; + else if (tgui->accel.bpp == 1) + pat_dat &= 0xffff; + + if (!(tgui->accel.flags & TGUI_TRANSENA) || (src_dat != trans_col)) { + MIX(); + + WRITE(tgui->accel.dst, out); + } + } + + cpu_dat <<= 1; + tgui->accel.src += xdir; + tgui->accel.dst += xdir; + tgui->accel.pat_x += xdir; + if (tgui->type >= TGUI_9660) + tgui->accel.dx += xdir; + + tgui->accel.x++; + if (tgui->accel.x > tgui->accel.size_x) { + tgui->accel.x = 0; + + tgui->accel.pat_x = tgui->accel.dst_x; + tgui->accel.pat_y += ydir; + + if (tgui->type >= TGUI_9660) { + tgui->accel.dx = tgui->accel.dst_x & 0xfff; + tgui->accel.dy += ydir; + } + + tgui->accel.src = tgui->accel.src_old = tgui->accel.src_old + (ydir * tgui->accel.pitch); + tgui->accel.dst = tgui->accel.dst_old = tgui->accel.dst_old + (ydir * tgui->accel.pitch); + + tgui->accel.y++; + + if (tgui->accel.y > tgui->accel.size_y) { + if (svga->crtc[0x21] & 0x20) + tgui->write_blitter = 0; + return; + } + if (tgui->accel.use_src) + return; + } + } + break; + + default: + while (count--) { + READ(tgui->accel.src, src_dat); + READ(tgui->accel.dst, dst_dat); + + pat_dat = pattern_data[((tgui->accel.pat_y & 7) * 8) + (tgui->accel.pat_x & 7)]; + + if (tgui->accel.bpp == 0) + pat_dat &= 0xff; + else if (tgui->accel.bpp == 1) + pat_dat &= 0xffff; + + if (!(tgui->accel.flags & TGUI_TRANSENA) || (src_dat != trans_col)) { + MIX(); + + WRITE(tgui->accel.dst, out); + } + + tgui->accel.src += xdir; + tgui->accel.dst += xdir; + tgui->accel.pat_x += xdir; + + tgui->accel.x++; + if (tgui->accel.x > tgui->accel.size_x) { + tgui->accel.x = 0; + tgui->accel.y++; + + tgui->accel.pat_x = tgui->accel.dst_x; + tgui->accel.pat_y += ydir; + + tgui->accel.src = tgui->accel.src_old = tgui->accel.src_old + (ydir * tgui->accel.pitch); + tgui->accel.dst = tgui->accel.dst_old = tgui->accel.dst_old + (ydir * tgui->accel.pitch); + + if (tgui->accel.y > tgui->accel.size_y) + return; + } + } + break; + } + break; + + case TGUI_SCANLINE: + { + if (count == -1) { + tgui->accel.src_old = tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch); + tgui->accel.src = tgui->accel.src_old; + + tgui->accel.dst_old = tgui->accel.dst_x + (tgui->accel.dst_y * tgui->accel.pitch); + tgui->accel.dst = tgui->accel.dst_old; + + tgui->accel.pat_x = tgui->accel.dst_x; + tgui->accel.pat_y = tgui->accel.dst_y; + } + + while (count--) { + READ(tgui->accel.src, src_dat); + READ(tgui->accel.dst, dst_dat); + + pat_dat = pattern_data[((tgui->accel.pat_y & 7) * 8) + (tgui->accel.pat_x & 7)]; + + if (tgui->accel.bpp == 0) + pat_dat &= 0xff; + else if (tgui->accel.bpp == 1) + pat_dat &= 0xffff; + + if (!(tgui->accel.flags & TGUI_TRANSENA) || (src_dat != trans_col)) { + MIX(); + + WRITE(tgui->accel.dst, out); + } + + tgui->accel.src += xdir; + tgui->accel.dst += xdir; + tgui->accel.pat_x += xdir; + + tgui->accel.x++; + if (tgui->accel.x > tgui->accel.size_x) { + tgui->accel.x = 0; + + tgui->accel.pat_x = tgui->accel.dst_x; + tgui->accel.src = tgui->accel.src_old = tgui->accel.src_old + (ydir * tgui->accel.pitch); + tgui->accel.dst = tgui->accel.dst_old = tgui->accel.dst_old + (ydir * tgui->accel.pitch); + tgui->accel.pat_y += ydir; + return; + } + } + } + break; + + case TGUI_BRESENHAMLINE: + { + int steep = 1; + int16_t dminor, dmajor, destxtmp, tmpswap; + int16_t cx, cy, dx, dy, err; + +#define SWAP(a, b) \ + tmpswap = a; \ + a = b; \ + b = tmpswap; + + dminor = tgui->accel.src_y; + if (tgui->accel.src_y & 0x1000) + dminor |= ~0xfff; + dminor >>= 1; + + destxtmp = tgui->accel.src_x; + if (tgui->accel.src_x & 0x1000) + destxtmp |= ~0xfff; + + dmajor = -(destxtmp - (dminor << 1)) >> 1; + + cx = dmajor; + cy = dminor; + + dx = tgui->accel.dst_x & 0xfff; + dy = tgui->accel.dst_y & 0xfff; + + tgui->accel.left = tgui->accel.src_x_clip & 0xfff; + tgui->accel.right = tgui->accel.dst_x_clip & 0xfff; + tgui->accel.top = tgui->accel.src_y_clip & 0xfff; + tgui->accel.bottom = tgui->accel.dst_y_clip & 0xfff; + + if (tgui->accel.bpp == 1) { + tgui->accel.left >>= 1; + tgui->accel.right >>= 1; + } else if (tgui->accel.bpp == 3) { + tgui->accel.left >>= 2; + tgui->accel.right >>= 2; + } + + err = tgui->accel.size_x + tgui->accel.src_y; + if ((tgui->accel.size_x + tgui->accel.src_y) & 0x1000) + err |= ~0xfff; + + if (tgui->accel.flags & 0x400) { + steep = 0; + SWAP(dx, dy); + SWAP(xdir, ydir); + } + + while (count--) { + READ(tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch), src_dat); + + /*Note by TC1995: I suppose the x/y clipping max is always more than 0 in the TGUI 96xx, but the TGUI 9440 lacks clipping*/ + if (steep) { + if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && dx >= tgui->accel.left && dx <= tgui->accel.right && dy >= tgui->accel.top && dy <= tgui->accel.bottom)) { + READ(dx + (dy * tgui->accel.pitch), dst_dat); + + pat_dat = tgui->accel.fg_col; + + if (tgui->accel.bpp == 0) + pat_dat &= 0xff; + else if (tgui->accel.bpp == 1) + pat_dat &= 0xffff; + + MIX(); + + WRITE(dx + (dy * tgui->accel.pitch), out); + } + } else { + if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && dy >= tgui->accel.left && dy <= tgui->accel.right && dx >= tgui->accel.top && dx <= tgui->accel.bottom)) { + READ(dy + (dx * tgui->accel.pitch), dst_dat); + + pat_dat = tgui->accel.fg_col; + + if (tgui->accel.bpp == 0) + pat_dat &= 0xff; + else if (tgui->accel.bpp == 1) + pat_dat &= 0xffff; + + MIX(); + + WRITE(dy + (dx * tgui->accel.pitch), out); + } + } + + if (tgui->accel.y == tgui->accel.size_y) + break; + + while (err > 0) { + dy += ydir; + err -= (cx << 1); + } + dx += xdir; + err += (cy << 1); + + tgui->accel.y++; + } + } + break; + + case TGUI_SHORTVECTOR: + { + int16_t dx, dy; + + dx = tgui->accel.dst_x & 0xfff; + dy = tgui->accel.dst_y & 0xfff; + + tgui->accel.left = tgui->accel.src_x_clip & 0xfff; + tgui->accel.right = tgui->accel.dst_x_clip & 0xfff; + tgui->accel.top = tgui->accel.src_y_clip & 0xfff; + tgui->accel.bottom = tgui->accel.dst_y_clip & 0xfff; + + if (tgui->accel.bpp == 1) { + tgui->accel.left >>= 1; + tgui->accel.right >>= 1; + } else if (tgui->accel.bpp == 3) { + tgui->accel.left >>= 2; + tgui->accel.right >>= 2; + } + + while (count--) { + READ(tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch), src_dat); + + /*Note by TC1995: I suppose the x/y clipping max is always more than 0 in the TGUI 96xx, but the TGUI 9440 lacks clipping*/ + if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && dx >= tgui->accel.left && dx <= tgui->accel.right && dy >= tgui->accel.top && dy <= tgui->accel.bottom)) { + READ(dx + (dy * tgui->accel.pitch), dst_dat); + + pat_dat = tgui->accel.fg_col; + + if (tgui->accel.bpp == 0) + pat_dat &= 0xff; + else if (tgui->accel.bpp == 1) + pat_dat &= 0xffff; + + MIX(); + + WRITE(dx + (dy * tgui->accel.pitch), out); + } + + if (tgui->accel.y == (tgui->accel.sv_size_y & 0xfff)) + break; + + switch ((tgui->accel.sv_size_y >> 8) & 0xe0) { + case 0x00: + dx++; + break; + case 0x20: + dx++; + dy--; + break; + case 0x40: + dy--; + break; + case 0x60: + dx--; + dy--; + break; + case 0x80: + dx--; + break; + case 0xa0: + dx--; + dy++; + break; + case 0xc0: + dy++; + break; + case 0xe0: + dx++; + dy++; + break; + } + + tgui->accel.y++; + } + } + break; + + case TGUI_FASTLINE: + { + if (tgui->type < TGUI_9660) + break; + + int16_t dx, dy; + + dx = tgui->accel.dst_x & 0xfff; + dy = tgui->accel.dst_y & 0xfff; + + tgui->accel.left = tgui->accel.src_x_clip & 0xfff; + tgui->accel.right = tgui->accel.dst_x_clip & 0xfff; + tgui->accel.top = tgui->accel.src_y_clip & 0xfff; + tgui->accel.bottom = tgui->accel.dst_y_clip & 0xfff; + + if (tgui->accel.bpp == 1) { + tgui->accel.left >>= 1; + tgui->accel.right >>= 1; + } else if (tgui->accel.bpp == 3) { + tgui->accel.left >>= 2; + tgui->accel.right >>= 2; + } + + while (count--) { + READ(tgui->accel.src_x + (tgui->accel.src_y * tgui->accel.pitch), src_dat); + + /*Note by TC1995: I suppose the x/y clipping max is always more than 0 in the TGUI 96xx, but the TGUI 9440 lacks clipping*/ + if ((tgui->type == TGUI_9440) || ((tgui->type >= TGUI_9660) && dx >= tgui->accel.left && dx <= tgui->accel.right && dy >= tgui->accel.top && dy <= tgui->accel.bottom)) { + READ(dx + (dy * tgui->accel.pitch), dst_dat); + + pat_dat = tgui->accel.fg_col; + + if (tgui->accel.bpp == 0) + pat_dat &= 0xff; + else if (tgui->accel.bpp == 1) + pat_dat &= 0xffff; + + MIX(); + + WRITE(dx + (dy * tgui->accel.pitch), out); + } + + if (tgui->accel.y == (tgui->accel.size_y & 0xfff)) + break; + + switch ((tgui->accel.size_y >> 8) & 0xe0) { + case 0x00: + dx++; + break; + case 0x20: + dx++; + dy--; + break; + case 0x40: + dy--; + break; + case 0x60: + dx--; + dy--; + break; + case 0x80: + dx--; + break; + case 0xa0: + dx--; + dy++; + break; + case 0xc0: + dy++; + break; + case 0xe0: + dx++; + dy++; + break; + } + + tgui->accel.y++; + } + } + break; + } } static void tgui_accel_out(uint16_t addr, uint8_t val, void *p) { - tgui_t *tgui = (tgui_t *)p; + tgui_t *tgui = (tgui_t *) p; - switch (addr) - { - case 0x2122: - tgui->accel.ger22 = (tgui->accel.ger22 & 0xff00) | val; - switch (val & 0xff) { - case 4: - case 8: - tgui->accel.bpp = 0; - break; + switch (addr) { + case 0x2122: + tgui->accel.ger22 = (tgui->accel.ger22 & 0xff00) | val; + switch (val & 0xff) { + case 4: + case 8: + tgui->accel.bpp = 0; + break; - case 9: - tgui->accel.bpp = 1; - break; + case 9: + tgui->accel.bpp = 1; + break; - case 13: - case 14: - switch (tgui->svga.bpp) { - case 15: - case 16: - tgui->accel.bpp = 1; - break; + case 13: + case 14: + switch (tgui->svga.bpp) { + case 15: + case 16: + tgui->accel.bpp = 1; + break; - case 24: - tgui->accel.bpp = 0; - break; + case 24: + tgui->accel.bpp = 0; + break; - case 32: - tgui->accel.bpp = 3; - break; - } - break; - } - break; + case 32: + tgui->accel.bpp = 3; + break; + } + break; + } + break; - case 0x2123: - tgui->accel.ger22 = (tgui->accel.ger22 & 0xff) | (val << 8); - break; + case 0x2123: + tgui->accel.ger22 = (tgui->accel.ger22 & 0xff) | (val << 8); + break; - case 0x2124: /*Command*/ - tgui->accel.command = val; - tgui_accel_command(-1, 0, tgui); - break; + case 0x2124: /*Command*/ + tgui->accel.command = val; + tgui_accel_command(-1, 0, tgui); + break; - case 0x2127: /*ROP*/ - tgui->accel.rop = val; - tgui->accel.use_src = (val & 0x33) ^ ((val >> 2) & 0x33); - break; + case 0x2127: /*ROP*/ + tgui->accel.rop = val; + tgui->accel.use_src = (val & 0x33) ^ ((val >> 2) & 0x33); + break; - case 0x2128: /*Flags*/ - tgui->accel.flags = (tgui->accel.flags & 0xffffff00) | val; - break; - case 0x2129: /*Flags*/ - tgui->accel.flags = (tgui->accel.flags & 0xffff00ff) | (val << 8); - break; - case 0x212a: /*Flags*/ - tgui->accel.flags = (tgui->accel.flags & 0xff00ffff) | (val << 16); - break; - case 0x212b: /*Flags*/ - tgui->accel.flags = (tgui->accel.flags & 0x0000ffff) | (val << 24); - break; + case 0x2128: /*Flags*/ + tgui->accel.flags = (tgui->accel.flags & 0xffffff00) | val; + break; + case 0x2129: /*Flags*/ + tgui->accel.flags = (tgui->accel.flags & 0xffff00ff) | (val << 8); + break; + case 0x212a: /*Flags*/ + tgui->accel.flags = (tgui->accel.flags & 0xff00ffff) | (val << 16); + break; + case 0x212b: /*Flags*/ + tgui->accel.flags = (tgui->accel.flags & 0x0000ffff) | (val << 24); + break; - case 0x212c: /*Foreground colour*/ - case 0x2178: - tgui->accel.fg_col = (tgui->accel.fg_col & 0xffffff00) | val; - break; - case 0x212d: /*Foreground colour*/ - case 0x2179: - tgui->accel.fg_col = (tgui->accel.fg_col & 0xffff00ff) | (val << 8); - break; - case 0x212e: /*Foreground colour*/ - case 0x217a: - tgui->accel.fg_col = (tgui->accel.fg_col & 0xff00ffff) | (val << 16); - break; - case 0x212f: /*Foreground colour*/ - case 0x217b: - tgui->accel.fg_col = (tgui->accel.fg_col & 0x00ffffff) | (val << 24); - break; + case 0x212c: /*Foreground colour*/ + case 0x2178: + tgui->accel.fg_col = (tgui->accel.fg_col & 0xffffff00) | val; + break; + case 0x212d: /*Foreground colour*/ + case 0x2179: + tgui->accel.fg_col = (tgui->accel.fg_col & 0xffff00ff) | (val << 8); + break; + case 0x212e: /*Foreground colour*/ + case 0x217a: + tgui->accel.fg_col = (tgui->accel.fg_col & 0xff00ffff) | (val << 16); + break; + case 0x212f: /*Foreground colour*/ + case 0x217b: + tgui->accel.fg_col = (tgui->accel.fg_col & 0x00ffffff) | (val << 24); + break; - case 0x2130: /*Background colour*/ - case 0x217c: - tgui->accel.bg_col = (tgui->accel.bg_col & 0xffffff00) | val; - break; - case 0x2131: /*Background colour*/ - case 0x217d: - tgui->accel.bg_col = (tgui->accel.bg_col & 0xffff00ff) | (val << 8); - break; - case 0x2132: /*Background colour*/ - case 0x217e: - tgui->accel.bg_col = (tgui->accel.bg_col & 0xff00ffff) | (val << 16); - break; - case 0x2133: /*Background colour*/ - case 0x217f: - tgui->accel.bg_col = (tgui->accel.bg_col & 0x00ffffff) | (val << 24); - break; + case 0x2130: /*Background colour*/ + case 0x217c: + tgui->accel.bg_col = (tgui->accel.bg_col & 0xffffff00) | val; + break; + case 0x2131: /*Background colour*/ + case 0x217d: + tgui->accel.bg_col = (tgui->accel.bg_col & 0xffff00ff) | (val << 8); + break; + case 0x2132: /*Background colour*/ + case 0x217e: + tgui->accel.bg_col = (tgui->accel.bg_col & 0xff00ffff) | (val << 16); + break; + case 0x2133: /*Background colour*/ + case 0x217f: + tgui->accel.bg_col = (tgui->accel.bg_col & 0x00ffffff) | (val << 24); + break; - case 0x2134: /*Pattern location*/ - tgui->accel.patloc = (tgui->accel.patloc & 0xff00) | val; - break; - case 0x2135: /*Pattern location*/ - tgui->accel.patloc = (tgui->accel.patloc & 0xff) | (val << 8); - break; + case 0x2134: /*Pattern location*/ + tgui->accel.patloc = (tgui->accel.patloc & 0xff00) | val; + break; + case 0x2135: /*Pattern location*/ + tgui->accel.patloc = (tgui->accel.patloc & 0xff) | (val << 8); + break; - case 0x2138: /*Dest X*/ - tgui->accel.dst_x = (tgui->accel.dst_x & 0xff00) | val; - break; - case 0x2139: /*Dest X*/ - tgui->accel.dst_x = (tgui->accel.dst_x & 0xff) | (val << 8); - break; - case 0x213a: /*Dest Y*/ - tgui->accel.dst_y = (tgui->accel.dst_y & 0xff00) | val; - break; - case 0x213b: /*Dest Y*/ - tgui->accel.dst_y = (tgui->accel.dst_y & 0xff) | (val << 8); - break; + case 0x2138: /*Dest X*/ + tgui->accel.dst_x = (tgui->accel.dst_x & 0xff00) | val; + break; + case 0x2139: /*Dest X*/ + tgui->accel.dst_x = (tgui->accel.dst_x & 0xff) | (val << 8); + break; + case 0x213a: /*Dest Y*/ + tgui->accel.dst_y = (tgui->accel.dst_y & 0xff00) | val; + break; + case 0x213b: /*Dest Y*/ + tgui->accel.dst_y = (tgui->accel.dst_y & 0xff) | (val << 8); + break; - case 0x213c: /*Src X*/ - tgui->accel.src_x = (tgui->accel.src_x & 0xff00) | val; - break; - case 0x213d: /*Src X*/ - tgui->accel.src_x = (tgui->accel.src_x & 0xff) | (val << 8); - break; - case 0x213e: /*Src Y*/ - tgui->accel.src_y = (tgui->accel.src_y & 0xff00) | val; - break; - case 0x213f: /*Src Y*/ - tgui->accel.src_y = (tgui->accel.src_y & 0xff) | (val << 8); - break; + case 0x213c: /*Src X*/ + tgui->accel.src_x = (tgui->accel.src_x & 0xff00) | val; + break; + case 0x213d: /*Src X*/ + tgui->accel.src_x = (tgui->accel.src_x & 0xff) | (val << 8); + break; + case 0x213e: /*Src Y*/ + tgui->accel.src_y = (tgui->accel.src_y & 0xff00) | val; + break; + case 0x213f: /*Src Y*/ + tgui->accel.src_y = (tgui->accel.src_y & 0xff) | (val << 8); + break; - case 0x2140: /*Size X*/ - tgui->accel.size_x = (tgui->accel.size_x & 0xff00) | val; - break; - case 0x2141: /*Size X*/ - tgui->accel.size_x = (tgui->accel.size_x & 0xff) | (val << 8); - break; - case 0x2142: /*Size Y*/ - tgui->accel.size_y = (tgui->accel.size_y & 0xff00) | val; - tgui->accel.sv_size_y = (tgui->accel.sv_size_y & 0xff00) | val; - break; - case 0x2143: /*Size Y*/ - tgui->accel.size_y = (tgui->accel.size_y & 0xff) | (val << 8); - tgui->accel.sv_size_y = (tgui->accel.sv_size_y & 0xff) | (val << 8); - break; + case 0x2140: /*Size X*/ + tgui->accel.size_x = (tgui->accel.size_x & 0xff00) | val; + break; + case 0x2141: /*Size X*/ + tgui->accel.size_x = (tgui->accel.size_x & 0xff) | (val << 8); + break; + case 0x2142: /*Size Y*/ + tgui->accel.size_y = (tgui->accel.size_y & 0xff00) | val; + tgui->accel.sv_size_y = (tgui->accel.sv_size_y & 0xff00) | val; + break; + case 0x2143: /*Size Y*/ + tgui->accel.size_y = (tgui->accel.size_y & 0xff) | (val << 8); + tgui->accel.sv_size_y = (tgui->accel.sv_size_y & 0xff) | (val << 8); + break; - case 0x2144: /*Style*/ - tgui->accel.style = (tgui->accel.style & 0xffffff00) | val; - break; - case 0x2145: /*Style*/ - tgui->accel.style = (tgui->accel.style & 0xffff00ff) | (val << 8); - break; - case 0x2146: /*Style*/ - tgui->accel.style = (tgui->accel.style & 0xff00ffff) | (val << 16); - break; - case 0x2147: /*Style*/ - tgui->accel.style = (tgui->accel.style & 0x00ffffff) | (val << 24); - break; + case 0x2144: /*Style*/ + tgui->accel.style = (tgui->accel.style & 0xffffff00) | val; + break; + case 0x2145: /*Style*/ + tgui->accel.style = (tgui->accel.style & 0xffff00ff) | (val << 8); + break; + case 0x2146: /*Style*/ + tgui->accel.style = (tgui->accel.style & 0xff00ffff) | (val << 16); + break; + case 0x2147: /*Style*/ + tgui->accel.style = (tgui->accel.style & 0x00ffffff) | (val << 24); + break; - case 0x2148: /*Clip Src X*/ - tgui->accel.src_x_clip = (tgui->accel.src_x_clip & 0xff00) | val; - break; - case 0x2149: /*Clip Src X*/ - tgui->accel.src_x_clip = (tgui->accel.src_x_clip & 0xff) | (val << 8); - break; - case 0x214a: /*Clip Src Y*/ - tgui->accel.src_y_clip = (tgui->accel.src_y_clip & 0xff00) | val; - break; - case 0x214b: /*Clip Src Y*/ - tgui->accel.src_y_clip = (tgui->accel.src_y_clip & 0xff) | (val << 8); - break; + case 0x2148: /*Clip Src X*/ + tgui->accel.src_x_clip = (tgui->accel.src_x_clip & 0xff00) | val; + break; + case 0x2149: /*Clip Src X*/ + tgui->accel.src_x_clip = (tgui->accel.src_x_clip & 0xff) | (val << 8); + break; + case 0x214a: /*Clip Src Y*/ + tgui->accel.src_y_clip = (tgui->accel.src_y_clip & 0xff00) | val; + break; + case 0x214b: /*Clip Src Y*/ + tgui->accel.src_y_clip = (tgui->accel.src_y_clip & 0xff) | (val << 8); + break; - case 0x214c: /*Clip Dest X*/ - tgui->accel.dst_x_clip = (tgui->accel.dst_x_clip & 0xff00) | val; - break; - case 0x214d: /*Clip Dest X*/ - tgui->accel.dst_x_clip = (tgui->accel.dst_x_clip & 0xff) | (val << 8); - break; - case 0x214e: /*Clip Dest Y*/ - tgui->accel.dst_y_clip = (tgui->accel.dst_y_clip & 0xff00) | val; - break; - case 0x214f: /*Clip Dest Y*/ - tgui->accel.dst_y_clip = (tgui->accel.dst_y_clip & 0xff) | (val << 8); - break; + case 0x214c: /*Clip Dest X*/ + tgui->accel.dst_x_clip = (tgui->accel.dst_x_clip & 0xff00) | val; + break; + case 0x214d: /*Clip Dest X*/ + tgui->accel.dst_x_clip = (tgui->accel.dst_x_clip & 0xff) | (val << 8); + break; + case 0x214e: /*Clip Dest Y*/ + tgui->accel.dst_y_clip = (tgui->accel.dst_y_clip & 0xff00) | val; + break; + case 0x214f: /*Clip Dest Y*/ + tgui->accel.dst_y_clip = (tgui->accel.dst_y_clip & 0xff) | (val << 8); + break; - case 0x2168: /*CKey*/ - tgui->accel.ckey = (tgui->accel.ckey & 0xffffff00) | val; - break; - case 0x2169: /*CKey*/ - tgui->accel.ckey = (tgui->accel.ckey & 0xffff00ff) | (val << 8); - break; - case 0x216a: /*CKey*/ - tgui->accel.ckey = (tgui->accel.ckey & 0xff00ffff) | (val << 16); - break; - case 0x216b: /*CKey*/ - tgui->accel.ckey = (tgui->accel.ckey & 0x00ffffff) | (val << 24); - break; + case 0x2168: /*CKey*/ + tgui->accel.ckey = (tgui->accel.ckey & 0xffffff00) | val; + break; + case 0x2169: /*CKey*/ + tgui->accel.ckey = (tgui->accel.ckey & 0xffff00ff) | (val << 8); + break; + case 0x216a: /*CKey*/ + tgui->accel.ckey = (tgui->accel.ckey & 0xff00ffff) | (val << 16); + break; + case 0x216b: /*CKey*/ + tgui->accel.ckey = (tgui->accel.ckey & 0x00ffffff) | (val << 24); + break; - case 0x2180: case 0x2181: case 0x2182: case 0x2183: - case 0x2184: case 0x2185: case 0x2186: case 0x2187: - case 0x2188: case 0x2189: case 0x218a: case 0x218b: - case 0x218c: case 0x218d: case 0x218e: case 0x218f: - case 0x2190: case 0x2191: case 0x2192: case 0x2193: - case 0x2194: case 0x2195: case 0x2196: case 0x2197: - case 0x2198: case 0x2199: case 0x219a: case 0x219b: - case 0x219c: case 0x219d: case 0x219e: case 0x219f: - case 0x21a0: case 0x21a1: case 0x21a2: case 0x21a3: - case 0x21a4: case 0x21a5: case 0x21a6: case 0x21a7: - case 0x21a8: case 0x21a9: case 0x21aa: case 0x21ab: - case 0x21ac: case 0x21ad: case 0x21ae: case 0x21af: - case 0x21b0: case 0x21b1: case 0x21b2: case 0x21b3: - case 0x21b4: case 0x21b5: case 0x21b6: case 0x21b7: - case 0x21b8: case 0x21b9: case 0x21ba: case 0x21bb: - case 0x21bc: case 0x21bd: case 0x21be: case 0x21bf: - case 0x21c0: case 0x21c1: case 0x21c2: case 0x21c3: - case 0x21c4: case 0x21c5: case 0x21c6: case 0x21c7: - case 0x21c8: case 0x21c9: case 0x21ca: case 0x21cb: - case 0x21cc: case 0x21cd: case 0x21ce: case 0x21cf: - case 0x21d0: case 0x21d1: case 0x21d2: case 0x21d3: - case 0x21d4: case 0x21d5: case 0x21d6: case 0x21d7: - case 0x21d8: case 0x21d9: case 0x21da: case 0x21db: - case 0x21dc: case 0x21dd: case 0x21de: case 0x21df: - case 0x21e0: case 0x21e1: case 0x21e2: case 0x21e3: - case 0x21e4: case 0x21e5: case 0x21e6: case 0x21e7: - case 0x21e8: case 0x21e9: case 0x21ea: case 0x21eb: - case 0x21ec: case 0x21ed: case 0x21ee: case 0x21ef: - case 0x21f0: case 0x21f1: case 0x21f2: case 0x21f3: - case 0x21f4: case 0x21f5: case 0x21f6: case 0x21f7: - case 0x21f8: case 0x21f9: case 0x21fa: case 0x21fb: - case 0x21fc: case 0x21fd: case 0x21fe: case 0x21ff: - tgui->accel.pattern[addr & 0x7f] = val; - break; - } + case 0x2180: + case 0x2181: + case 0x2182: + case 0x2183: + case 0x2184: + case 0x2185: + case 0x2186: + case 0x2187: + case 0x2188: + case 0x2189: + case 0x218a: + case 0x218b: + case 0x218c: + case 0x218d: + case 0x218e: + case 0x218f: + case 0x2190: + case 0x2191: + case 0x2192: + case 0x2193: + case 0x2194: + case 0x2195: + case 0x2196: + case 0x2197: + case 0x2198: + case 0x2199: + case 0x219a: + case 0x219b: + case 0x219c: + case 0x219d: + case 0x219e: + case 0x219f: + case 0x21a0: + case 0x21a1: + case 0x21a2: + case 0x21a3: + case 0x21a4: + case 0x21a5: + case 0x21a6: + case 0x21a7: + case 0x21a8: + case 0x21a9: + case 0x21aa: + case 0x21ab: + case 0x21ac: + case 0x21ad: + case 0x21ae: + case 0x21af: + case 0x21b0: + case 0x21b1: + case 0x21b2: + case 0x21b3: + case 0x21b4: + case 0x21b5: + case 0x21b6: + case 0x21b7: + case 0x21b8: + case 0x21b9: + case 0x21ba: + case 0x21bb: + case 0x21bc: + case 0x21bd: + case 0x21be: + case 0x21bf: + case 0x21c0: + case 0x21c1: + case 0x21c2: + case 0x21c3: + case 0x21c4: + case 0x21c5: + case 0x21c6: + case 0x21c7: + case 0x21c8: + case 0x21c9: + case 0x21ca: + case 0x21cb: + case 0x21cc: + case 0x21cd: + case 0x21ce: + case 0x21cf: + case 0x21d0: + case 0x21d1: + case 0x21d2: + case 0x21d3: + case 0x21d4: + case 0x21d5: + case 0x21d6: + case 0x21d7: + case 0x21d8: + case 0x21d9: + case 0x21da: + case 0x21db: + case 0x21dc: + case 0x21dd: + case 0x21de: + case 0x21df: + case 0x21e0: + case 0x21e1: + case 0x21e2: + case 0x21e3: + case 0x21e4: + case 0x21e5: + case 0x21e6: + case 0x21e7: + case 0x21e8: + case 0x21e9: + case 0x21ea: + case 0x21eb: + case 0x21ec: + case 0x21ed: + case 0x21ee: + case 0x21ef: + case 0x21f0: + case 0x21f1: + case 0x21f2: + case 0x21f3: + case 0x21f4: + case 0x21f5: + case 0x21f6: + case 0x21f7: + case 0x21f8: + case 0x21f9: + case 0x21fa: + case 0x21fb: + case 0x21fc: + case 0x21fd: + case 0x21fe: + case 0x21ff: + tgui->accel.pattern[addr & 0x7f] = val; + break; + } } static void tgui_accel_out_w(uint16_t addr, uint16_t val, void *p) { - tgui_t *tgui = (tgui_t *)p; - tgui_accel_out(addr, val, tgui); - tgui_accel_out(addr + 1, val >> 8, tgui); + tgui_t *tgui = (tgui_t *) p; + tgui_accel_out(addr, val, tgui); + tgui_accel_out(addr + 1, val >> 8, tgui); } static void tgui_accel_out_l(uint16_t addr, uint32_t val, void *p) { - tgui_t *tgui = (tgui_t *)p; + tgui_t *tgui = (tgui_t *) p; - switch (addr) { - case 0x2124: /*Long version of Command and ROP together*/ - tgui->accel.command = val & 0xff; - tgui->accel.rop = val >> 24; - tgui->accel.use_src = (tgui->accel.rop & 0x33) ^ ((tgui->accel.rop >> 2) & 0x33); - tgui_accel_command(-1, 0, tgui); - break; + switch (addr) { + case 0x2124: /*Long version of Command and ROP together*/ + tgui->accel.command = val & 0xff; + tgui->accel.rop = val >> 24; + tgui->accel.use_src = (tgui->accel.rop & 0x33) ^ ((tgui->accel.rop >> 2) & 0x33); + tgui_accel_command(-1, 0, tgui); + break; - default: - tgui_accel_out(addr, val, tgui); - tgui_accel_out(addr + 1, val >> 8, tgui); - tgui_accel_out(addr + 2, val >> 16, tgui); - tgui_accel_out(addr + 3, val >> 24, tgui); - break; - } + default: + tgui_accel_out(addr, val, tgui); + tgui_accel_out(addr + 1, val >> 8, tgui); + tgui_accel_out(addr + 2, val >> 16, tgui); + tgui_accel_out(addr + 3, val >> 24, tgui); + break; + } } static uint8_t tgui_accel_in(uint16_t addr, void *p) { - tgui_t *tgui = (tgui_t *)p; + tgui_t *tgui = (tgui_t *) p; - switch (addr) - { - case 0x2120: /*Status*/ - return 0; + switch (addr) { + case 0x2120: /*Status*/ + return 0; - case 0x2122: - return tgui->accel.ger22 & 0xff; + case 0x2122: + return tgui->accel.ger22 & 0xff; - case 0x2123: - return tgui->accel.ger22 >> 8; + case 0x2123: + return tgui->accel.ger22 >> 8; - case 0x2127: /*ROP*/ - return tgui->accel.rop; + case 0x2127: /*ROP*/ + return tgui->accel.rop; - case 0x2128: /*Flags*/ - return tgui->accel.flags & 0xff; - case 0x2129: /*Flags*/ - return tgui->accel.flags >> 8; - case 0x212a: /*Flags*/ - return tgui->accel.flags >> 16; - case 0x212b: - return tgui->accel.flags >> 24; + case 0x2128: /*Flags*/ + return tgui->accel.flags & 0xff; + case 0x2129: /*Flags*/ + return tgui->accel.flags >> 8; + case 0x212a: /*Flags*/ + return tgui->accel.flags >> 16; + case 0x212b: + return tgui->accel.flags >> 24; - case 0x212c: /*Foreground colour*/ - case 0x2178: - return tgui->accel.fg_col & 0xff; - case 0x212d: /*Foreground colour*/ - case 0x2179: - return tgui->accel.fg_col >> 8; - case 0x212e: /*Foreground colour*/ - case 0x217a: - return tgui->accel.fg_col >> 16; - case 0x212f: /*Foreground colour*/ - case 0x217b: - return tgui->accel.fg_col >> 24; + case 0x212c: /*Foreground colour*/ + case 0x2178: + return tgui->accel.fg_col & 0xff; + case 0x212d: /*Foreground colour*/ + case 0x2179: + return tgui->accel.fg_col >> 8; + case 0x212e: /*Foreground colour*/ + case 0x217a: + return tgui->accel.fg_col >> 16; + case 0x212f: /*Foreground colour*/ + case 0x217b: + return tgui->accel.fg_col >> 24; - case 0x2130: /*Background colour*/ - case 0x217c: - return tgui->accel.bg_col & 0xff; - case 0x2131: /*Background colour*/ - case 0x217d: - return tgui->accel.bg_col >> 8; - case 0x2132: /*Background colour*/ - case 0x217e: - return tgui->accel.bg_col >> 16; - case 0x2133: /*Background colour*/ - case 0x217f: - return tgui->accel.bg_col >> 24; + case 0x2130: /*Background colour*/ + case 0x217c: + return tgui->accel.bg_col & 0xff; + case 0x2131: /*Background colour*/ + case 0x217d: + return tgui->accel.bg_col >> 8; + case 0x2132: /*Background colour*/ + case 0x217e: + return tgui->accel.bg_col >> 16; + case 0x2133: /*Background colour*/ + case 0x217f: + return tgui->accel.bg_col >> 24; - case 0x2134: /*Pattern location*/ - return tgui->accel.patloc & 0xff; - case 0x2135: /*Pattern location*/ - return tgui->accel.patloc >> 8; + case 0x2134: /*Pattern location*/ + return tgui->accel.patloc & 0xff; + case 0x2135: /*Pattern location*/ + return tgui->accel.patloc >> 8; - case 0x2138: /*Dest X*/ - return tgui->accel.dst_x & 0xff; - case 0x2139: /*Dest X*/ - return tgui->accel.dst_x >> 8; - case 0x213a: /*Dest Y*/ - return tgui->accel.dst_y & 0xff; - case 0x213b: /*Dest Y*/ - return tgui->accel.dst_y >> 8; + case 0x2138: /*Dest X*/ + return tgui->accel.dst_x & 0xff; + case 0x2139: /*Dest X*/ + return tgui->accel.dst_x >> 8; + case 0x213a: /*Dest Y*/ + return tgui->accel.dst_y & 0xff; + case 0x213b: /*Dest Y*/ + return tgui->accel.dst_y >> 8; - case 0x213c: /*Src X*/ - return tgui->accel.src_x & 0xff; - case 0x213d: /*Src X*/ - return tgui->accel.src_x >> 8; - case 0x213e: /*Src Y*/ - return tgui->accel.src_y & 0xff; - case 0x213f: /*Src Y*/ - return tgui->accel.src_y >> 8; + case 0x213c: /*Src X*/ + return tgui->accel.src_x & 0xff; + case 0x213d: /*Src X*/ + return tgui->accel.src_x >> 8; + case 0x213e: /*Src Y*/ + return tgui->accel.src_y & 0xff; + case 0x213f: /*Src Y*/ + return tgui->accel.src_y >> 8; - case 0x2140: /*Size X*/ - return tgui->accel.size_x & 0xff; - case 0x2141: /*Size X*/ - return tgui->accel.size_x >> 8; - case 0x2142: /*Size Y*/ - return tgui->accel.size_y & 0xff; - case 0x2143: /*Size Y*/ - return tgui->accel.size_y >> 8; + case 0x2140: /*Size X*/ + return tgui->accel.size_x & 0xff; + case 0x2141: /*Size X*/ + return tgui->accel.size_x >> 8; + case 0x2142: /*Size Y*/ + return tgui->accel.size_y & 0xff; + case 0x2143: /*Size Y*/ + return tgui->accel.size_y >> 8; - case 0x2144: /*Style*/ - return tgui->accel.style & 0xff; - case 0x2145: /*Style*/ - return tgui->accel.style >> 8; - case 0x2146: /*Style*/ - return tgui->accel.style >> 16; - case 0x2147: /*Style*/ - return tgui->accel.style >> 24; + case 0x2144: /*Style*/ + return tgui->accel.style & 0xff; + case 0x2145: /*Style*/ + return tgui->accel.style >> 8; + case 0x2146: /*Style*/ + return tgui->accel.style >> 16; + case 0x2147: /*Style*/ + return tgui->accel.style >> 24; - case 0x2148: /*Clip Src X*/ - return tgui->accel.src_x_clip & 0xff; - case 0x2149: /*Clip Src X*/ - return tgui->accel.src_x_clip >> 8; - case 0x214a: /*Clip Src Y*/ - return tgui->accel.src_y_clip & 0xff; - case 0x214b: /*Clip Src Y*/ - return tgui->accel.src_y_clip >> 8; + case 0x2148: /*Clip Src X*/ + return tgui->accel.src_x_clip & 0xff; + case 0x2149: /*Clip Src X*/ + return tgui->accel.src_x_clip >> 8; + case 0x214a: /*Clip Src Y*/ + return tgui->accel.src_y_clip & 0xff; + case 0x214b: /*Clip Src Y*/ + return tgui->accel.src_y_clip >> 8; - case 0x214c: /*Clip Dest X*/ - return tgui->accel.dst_x_clip & 0xff; - case 0x214d: /*Clip Dest X*/ - return tgui->accel.dst_x_clip >> 8; - case 0x214e: /*Clip Dest Y*/ - return tgui->accel.dst_y_clip & 0xff; - case 0x214f: /*Clip Dest Y*/ - return tgui->accel.dst_y_clip >> 8; + case 0x214c: /*Clip Dest X*/ + return tgui->accel.dst_x_clip & 0xff; + case 0x214d: /*Clip Dest X*/ + return tgui->accel.dst_x_clip >> 8; + case 0x214e: /*Clip Dest Y*/ + return tgui->accel.dst_y_clip & 0xff; + case 0x214f: /*Clip Dest Y*/ + return tgui->accel.dst_y_clip >> 8; - case 0x2168: /*CKey*/ - return tgui->accel.ckey & 0xff; - case 0x2169: /*CKey*/ - return tgui->accel.ckey >> 8; - case 0x216a: /*CKey*/ - return tgui->accel.ckey >> 16; - case 0x216b: /*CKey*/ - return tgui->accel.ckey >> 24; + case 0x2168: /*CKey*/ + return tgui->accel.ckey & 0xff; + case 0x2169: /*CKey*/ + return tgui->accel.ckey >> 8; + case 0x216a: /*CKey*/ + return tgui->accel.ckey >> 16; + case 0x216b: /*CKey*/ + return tgui->accel.ckey >> 24; - case 0x2180: case 0x2181: case 0x2182: case 0x2183: - case 0x2184: case 0x2185: case 0x2186: case 0x2187: - case 0x2188: case 0x2189: case 0x218a: case 0x218b: - case 0x218c: case 0x218d: case 0x218e: case 0x218f: - case 0x2190: case 0x2191: case 0x2192: case 0x2193: - case 0x2194: case 0x2195: case 0x2196: case 0x2197: - case 0x2198: case 0x2199: case 0x219a: case 0x219b: - case 0x219c: case 0x219d: case 0x219e: case 0x219f: - case 0x21a0: case 0x21a1: case 0x21a2: case 0x21a3: - case 0x21a4: case 0x21a5: case 0x21a6: case 0x21a7: - case 0x21a8: case 0x21a9: case 0x21aa: case 0x21ab: - case 0x21ac: case 0x21ad: case 0x21ae: case 0x21af: - case 0x21b0: case 0x21b1: case 0x21b2: case 0x21b3: - case 0x21b4: case 0x21b5: case 0x21b6: case 0x21b7: - case 0x21b8: case 0x21b9: case 0x21ba: case 0x21bb: - case 0x21bc: case 0x21bd: case 0x21be: case 0x21bf: - case 0x21c0: case 0x21c1: case 0x21c2: case 0x21c3: - case 0x21c4: case 0x21c5: case 0x21c6: case 0x21c7: - case 0x21c8: case 0x21c9: case 0x21ca: case 0x21cb: - case 0x21cc: case 0x21cd: case 0x21ce: case 0x21cf: - case 0x21d0: case 0x21d1: case 0x21d2: case 0x21d3: - case 0x21d4: case 0x21d5: case 0x21d6: case 0x21d7: - case 0x21d8: case 0x21d9: case 0x21da: case 0x21db: - case 0x21dc: case 0x21dd: case 0x21de: case 0x21df: - case 0x21e0: case 0x21e1: case 0x21e2: case 0x21e3: - case 0x21e4: case 0x21e5: case 0x21e6: case 0x21e7: - case 0x21e8: case 0x21e9: case 0x21ea: case 0x21eb: - case 0x21ec: case 0x21ed: case 0x21ee: case 0x21ef: - case 0x21f0: case 0x21f1: case 0x21f2: case 0x21f3: - case 0x21f4: case 0x21f5: case 0x21f6: case 0x21f7: - case 0x21f8: case 0x21f9: case 0x21fa: case 0x21fb: - case 0x21fc: case 0x21fd: case 0x21fe: case 0x21ff: - return tgui->accel.pattern[addr & 0x7f]; - } - return 0; + case 0x2180: + case 0x2181: + case 0x2182: + case 0x2183: + case 0x2184: + case 0x2185: + case 0x2186: + case 0x2187: + case 0x2188: + case 0x2189: + case 0x218a: + case 0x218b: + case 0x218c: + case 0x218d: + case 0x218e: + case 0x218f: + case 0x2190: + case 0x2191: + case 0x2192: + case 0x2193: + case 0x2194: + case 0x2195: + case 0x2196: + case 0x2197: + case 0x2198: + case 0x2199: + case 0x219a: + case 0x219b: + case 0x219c: + case 0x219d: + case 0x219e: + case 0x219f: + case 0x21a0: + case 0x21a1: + case 0x21a2: + case 0x21a3: + case 0x21a4: + case 0x21a5: + case 0x21a6: + case 0x21a7: + case 0x21a8: + case 0x21a9: + case 0x21aa: + case 0x21ab: + case 0x21ac: + case 0x21ad: + case 0x21ae: + case 0x21af: + case 0x21b0: + case 0x21b1: + case 0x21b2: + case 0x21b3: + case 0x21b4: + case 0x21b5: + case 0x21b6: + case 0x21b7: + case 0x21b8: + case 0x21b9: + case 0x21ba: + case 0x21bb: + case 0x21bc: + case 0x21bd: + case 0x21be: + case 0x21bf: + case 0x21c0: + case 0x21c1: + case 0x21c2: + case 0x21c3: + case 0x21c4: + case 0x21c5: + case 0x21c6: + case 0x21c7: + case 0x21c8: + case 0x21c9: + case 0x21ca: + case 0x21cb: + case 0x21cc: + case 0x21cd: + case 0x21ce: + case 0x21cf: + case 0x21d0: + case 0x21d1: + case 0x21d2: + case 0x21d3: + case 0x21d4: + case 0x21d5: + case 0x21d6: + case 0x21d7: + case 0x21d8: + case 0x21d9: + case 0x21da: + case 0x21db: + case 0x21dc: + case 0x21dd: + case 0x21de: + case 0x21df: + case 0x21e0: + case 0x21e1: + case 0x21e2: + case 0x21e3: + case 0x21e4: + case 0x21e5: + case 0x21e6: + case 0x21e7: + case 0x21e8: + case 0x21e9: + case 0x21ea: + case 0x21eb: + case 0x21ec: + case 0x21ed: + case 0x21ee: + case 0x21ef: + case 0x21f0: + case 0x21f1: + case 0x21f2: + case 0x21f3: + case 0x21f4: + case 0x21f5: + case 0x21f6: + case 0x21f7: + case 0x21f8: + case 0x21f9: + case 0x21fa: + case 0x21fb: + case 0x21fc: + case 0x21fd: + case 0x21fe: + case 0x21ff: + return tgui->accel.pattern[addr & 0x7f]; + } + return 0; } static uint16_t tgui_accel_in_w(uint16_t addr, void *p) { - tgui_t *tgui = (tgui_t *)p; - return tgui_accel_in(addr, tgui) | (tgui_accel_in(addr + 1, tgui) << 8); + tgui_t *tgui = (tgui_t *) p; + return tgui_accel_in(addr, tgui) | (tgui_accel_in(addr + 1, tgui) << 8); } static uint32_t tgui_accel_in_l(uint16_t addr, void *p) { - tgui_t *tgui = (tgui_t *)p; - return tgui_accel_in_w(addr, tgui) | (tgui_accel_in_w(addr + 2, tgui) << 16); + tgui_t *tgui = (tgui_t *) p; + return tgui_accel_in_w(addr, tgui) | (tgui_accel_in_w(addr + 2, tgui) << 16); } - static void tgui_accel_write(uint32_t addr, uint8_t val, void *p) { - tgui_t *tgui = (tgui_t *)p; - svga_t *svga = &tgui->svga; + tgui_t *tgui = (tgui_t *) p; + svga_t *svga = &tgui->svga; - if ((svga->crtc[0x36] & 0x03) == 0x02) { - if ((addr & ~0xff) != 0xbff00) - return; - } else if ((svga->crtc[0x36] & 0x03) == 0x01) { - if ((addr & ~0xff) != 0xb7f00) - return; - } + if ((svga->crtc[0x36] & 0x03) == 0x02) { + if ((addr & ~0xff) != 0xbff00) + return; + } else if ((svga->crtc[0x36] & 0x03) == 0x01) { + if ((addr & ~0xff) != 0xb7f00) + return; + } - switch (addr & 0xff) - { - case 0x22: - tgui->accel.ger22 = (tgui->accel.ger22 & 0xff00) | val; - switch (val & 0xff) { - case 4: - case 8: - tgui->accel.bpp = 0; - break; + switch (addr & 0xff) { + case 0x22: + tgui->accel.ger22 = (tgui->accel.ger22 & 0xff00) | val; + switch (val & 0xff) { + case 4: + case 8: + tgui->accel.bpp = 0; + break; - case 9: - tgui->accel.bpp = 1; - break; + case 9: + tgui->accel.bpp = 1; + break; - case 13: - case 14: - switch (tgui->svga.bpp) { - case 15: - case 16: - tgui->accel.bpp = 1; - break; + case 13: + case 14: + switch (tgui->svga.bpp) { + case 15: + case 16: + tgui->accel.bpp = 1; + break; - case 24: - tgui->accel.bpp = 0; - break; + case 24: + tgui->accel.bpp = 0; + break; - case 32: - tgui->accel.bpp = 3; - break; - } - break; - } - break; + case 32: + tgui->accel.bpp = 3; + break; + } + break; + } + break; - case 0x23: - tgui->accel.ger22 = (tgui->accel.ger22 & 0xff) | (val << 8); - break; + case 0x23: + tgui->accel.ger22 = (tgui->accel.ger22 & 0xff) | (val << 8); + break; - case 0x24: /*Command*/ - tgui->accel.command = val; - tgui_accel_command(-1, 0, tgui); - break; + case 0x24: /*Command*/ + tgui->accel.command = val; + tgui_accel_command(-1, 0, tgui); + break; - case 0x27: /*ROP*/ - tgui->accel.rop = val; - tgui->accel.use_src = (val & 0x33) ^ ((val >> 2) & 0x33); - break; + case 0x27: /*ROP*/ + tgui->accel.rop = val; + tgui->accel.use_src = (val & 0x33) ^ ((val >> 2) & 0x33); + break; - case 0x28: /*Flags*/ - tgui->accel.flags = (tgui->accel.flags & 0xffffff00) | val; - break; - case 0x29: /*Flags*/ - tgui->accel.flags = (tgui->accel.flags & 0xffff00ff) | (val << 8); - break; - case 0x2a: /*Flags*/ - tgui->accel.flags = (tgui->accel.flags & 0xff00ffff) | (val << 16); - break; - case 0x2b: /*Flags*/ - tgui->accel.flags = (tgui->accel.flags & 0x0000ffff) | (val << 24); - break; + case 0x28: /*Flags*/ + tgui->accel.flags = (tgui->accel.flags & 0xffffff00) | val; + break; + case 0x29: /*Flags*/ + tgui->accel.flags = (tgui->accel.flags & 0xffff00ff) | (val << 8); + break; + case 0x2a: /*Flags*/ + tgui->accel.flags = (tgui->accel.flags & 0xff00ffff) | (val << 16); + break; + case 0x2b: /*Flags*/ + tgui->accel.flags = (tgui->accel.flags & 0x0000ffff) | (val << 24); + break; - case 0x2c: /*Foreground colour*/ - case 0x78: - tgui->accel.fg_col = (tgui->accel.fg_col & 0xffffff00) | val; - break; - case 0x2d: /*Foreground colour*/ - case 0x79: - tgui->accel.fg_col = (tgui->accel.fg_col & 0xffff00ff) | (val << 8); - break; - case 0x2e: /*Foreground colour*/ - case 0x7a: - tgui->accel.fg_col = (tgui->accel.fg_col & 0xff00ffff) | (val << 16); - break; - case 0x2f: /*Foreground colour*/ - case 0x7b: - tgui->accel.fg_col = (tgui->accel.fg_col & 0x00ffffff) | (val << 24); - break; + case 0x2c: /*Foreground colour*/ + case 0x78: + tgui->accel.fg_col = (tgui->accel.fg_col & 0xffffff00) | val; + break; + case 0x2d: /*Foreground colour*/ + case 0x79: + tgui->accel.fg_col = (tgui->accel.fg_col & 0xffff00ff) | (val << 8); + break; + case 0x2e: /*Foreground colour*/ + case 0x7a: + tgui->accel.fg_col = (tgui->accel.fg_col & 0xff00ffff) | (val << 16); + break; + case 0x2f: /*Foreground colour*/ + case 0x7b: + tgui->accel.fg_col = (tgui->accel.fg_col & 0x00ffffff) | (val << 24); + break; - case 0x30: /*Background colour*/ - case 0x7c: - tgui->accel.bg_col = (tgui->accel.bg_col & 0xffffff00) | val; - break; - case 0x31: /*Background colour*/ - case 0x7d: - tgui->accel.bg_col = (tgui->accel.bg_col & 0xffff00ff) | (val << 8); - break; - case 0x32: /*Background colour*/ - case 0x7e: - tgui->accel.bg_col = (tgui->accel.bg_col & 0xff00ffff) | (val << 16); - break; - case 0x33: /*Background colour*/ - case 0x7f: - tgui->accel.bg_col = (tgui->accel.bg_col & 0x00ffffff) | (val << 24); - break; + case 0x30: /*Background colour*/ + case 0x7c: + tgui->accel.bg_col = (tgui->accel.bg_col & 0xffffff00) | val; + break; + case 0x31: /*Background colour*/ + case 0x7d: + tgui->accel.bg_col = (tgui->accel.bg_col & 0xffff00ff) | (val << 8); + break; + case 0x32: /*Background colour*/ + case 0x7e: + tgui->accel.bg_col = (tgui->accel.bg_col & 0xff00ffff) | (val << 16); + break; + case 0x33: /*Background colour*/ + case 0x7f: + tgui->accel.bg_col = (tgui->accel.bg_col & 0x00ffffff) | (val << 24); + break; - case 0x34: /*Pattern location*/ - tgui->accel.patloc = (tgui->accel.patloc & 0xff00) | val; - break; - case 0x35: /*Pattern location*/ - tgui->accel.patloc = (tgui->accel.patloc & 0xff) | (val << 8); - break; + case 0x34: /*Pattern location*/ + tgui->accel.patloc = (tgui->accel.patloc & 0xff00) | val; + break; + case 0x35: /*Pattern location*/ + tgui->accel.patloc = (tgui->accel.patloc & 0xff) | (val << 8); + break; - case 0x38: /*Dest X*/ - tgui->accel.dst_x = (tgui->accel.dst_x & 0xff00) | val; - break; - case 0x39: /*Dest X*/ - tgui->accel.dst_x = (tgui->accel.dst_x & 0xff) | (val << 8); - break; - case 0x3a: /*Dest Y*/ - tgui->accel.dst_y = (tgui->accel.dst_y & 0xff00) | val; - break; - case 0x3b: /*Dest Y*/ - tgui->accel.dst_y = (tgui->accel.dst_y & 0xff) | (val << 8); - break; + case 0x38: /*Dest X*/ + tgui->accel.dst_x = (tgui->accel.dst_x & 0xff00) | val; + break; + case 0x39: /*Dest X*/ + tgui->accel.dst_x = (tgui->accel.dst_x & 0xff) | (val << 8); + break; + case 0x3a: /*Dest Y*/ + tgui->accel.dst_y = (tgui->accel.dst_y & 0xff00) | val; + break; + case 0x3b: /*Dest Y*/ + tgui->accel.dst_y = (tgui->accel.dst_y & 0xff) | (val << 8); + break; - case 0x3c: /*Src X*/ - tgui->accel.src_x = (tgui->accel.src_x & 0xff00) | val; - break; - case 0x3d: /*Src X*/ - tgui->accel.src_x = (tgui->accel.src_x & 0xff) | (val << 8); - break; - case 0x3e: /*Src Y*/ - tgui->accel.src_y = (tgui->accel.src_y & 0xff00) | val; - break; - case 0x3f: /*Src Y*/ - tgui->accel.src_y = (tgui->accel.src_y & 0xff) | (val << 8); - break; + case 0x3c: /*Src X*/ + tgui->accel.src_x = (tgui->accel.src_x & 0xff00) | val; + break; + case 0x3d: /*Src X*/ + tgui->accel.src_x = (tgui->accel.src_x & 0xff) | (val << 8); + break; + case 0x3e: /*Src Y*/ + tgui->accel.src_y = (tgui->accel.src_y & 0xff00) | val; + break; + case 0x3f: /*Src Y*/ + tgui->accel.src_y = (tgui->accel.src_y & 0xff) | (val << 8); + break; - case 0x40: /*Size X*/ - tgui->accel.size_x = (tgui->accel.size_x & 0xff00) | val; - break; - case 0x41: /*Size X*/ - tgui->accel.size_x = (tgui->accel.size_x & 0xff) | (val << 8); - break; - case 0x42: /*Size Y*/ - tgui->accel.size_y = (tgui->accel.size_y & 0xff00) | val; - tgui->accel.sv_size_y = (tgui->accel.sv_size_y & 0xff00) | val; - break; - case 0x43: /*Size Y*/ - tgui->accel.size_y = (tgui->accel.size_y & 0xff) | (val << 8); - tgui->accel.sv_size_y = (tgui->accel.sv_size_y & 0xff) | (val << 8); - break; + case 0x40: /*Size X*/ + tgui->accel.size_x = (tgui->accel.size_x & 0xff00) | val; + break; + case 0x41: /*Size X*/ + tgui->accel.size_x = (tgui->accel.size_x & 0xff) | (val << 8); + break; + case 0x42: /*Size Y*/ + tgui->accel.size_y = (tgui->accel.size_y & 0xff00) | val; + tgui->accel.sv_size_y = (tgui->accel.sv_size_y & 0xff00) | val; + break; + case 0x43: /*Size Y*/ + tgui->accel.size_y = (tgui->accel.size_y & 0xff) | (val << 8); + tgui->accel.sv_size_y = (tgui->accel.sv_size_y & 0xff) | (val << 8); + break; - case 0x44: /*Style*/ - tgui->accel.style = (tgui->accel.style & 0xffffff00) | val; - break; - case 0x45: /*Style*/ - tgui->accel.style = (tgui->accel.style & 0xffff00ff) | (val << 8); - break; - case 0x46: /*Style*/ - tgui->accel.style = (tgui->accel.style & 0xff00ffff) | (val << 16); - break; - case 0x47: /*Style*/ - tgui->accel.style = (tgui->accel.style & 0x00ffffff) | (val << 24); - break; + case 0x44: /*Style*/ + tgui->accel.style = (tgui->accel.style & 0xffffff00) | val; + break; + case 0x45: /*Style*/ + tgui->accel.style = (tgui->accel.style & 0xffff00ff) | (val << 8); + break; + case 0x46: /*Style*/ + tgui->accel.style = (tgui->accel.style & 0xff00ffff) | (val << 16); + break; + case 0x47: /*Style*/ + tgui->accel.style = (tgui->accel.style & 0x00ffffff) | (val << 24); + break; - case 0x48: /*Clip Src X*/ - tgui->accel.src_x_clip = (tgui->accel.src_x_clip & 0xff00) | val; - break; - case 0x49: /*Clip Src X*/ - tgui->accel.src_x_clip = (tgui->accel.src_x_clip & 0xff) | (val << 8); - break; - case 0x4a: /*Clip Src Y*/ - tgui->accel.src_y_clip = (tgui->accel.src_y_clip & 0xff00) | val; - break; - case 0x4b: /*Clip Src Y*/ - tgui->accel.src_y_clip = (tgui->accel.src_y_clip & 0xff) | (val << 8); - break; + case 0x48: /*Clip Src X*/ + tgui->accel.src_x_clip = (tgui->accel.src_x_clip & 0xff00) | val; + break; + case 0x49: /*Clip Src X*/ + tgui->accel.src_x_clip = (tgui->accel.src_x_clip & 0xff) | (val << 8); + break; + case 0x4a: /*Clip Src Y*/ + tgui->accel.src_y_clip = (tgui->accel.src_y_clip & 0xff00) | val; + break; + case 0x4b: /*Clip Src Y*/ + tgui->accel.src_y_clip = (tgui->accel.src_y_clip & 0xff) | (val << 8); + break; - case 0x4c: /*Clip Dest X*/ - tgui->accel.dst_x_clip = (tgui->accel.dst_x_clip & 0xff00) | val; - break; - case 0x4d: /*Clip Dest X*/ - tgui->accel.dst_x_clip = (tgui->accel.dst_x_clip & 0xff) | (val << 8); - break; - case 0x4e: /*Clip Dest Y*/ - tgui->accel.dst_y_clip = (tgui->accel.dst_y_clip & 0xff00) | val; - break; - case 0x4f: /*Clip Dest Y*/ - tgui->accel.dst_y_clip = (tgui->accel.dst_y_clip & 0xff) | (val << 8); - break; + case 0x4c: /*Clip Dest X*/ + tgui->accel.dst_x_clip = (tgui->accel.dst_x_clip & 0xff00) | val; + break; + case 0x4d: /*Clip Dest X*/ + tgui->accel.dst_x_clip = (tgui->accel.dst_x_clip & 0xff) | (val << 8); + break; + case 0x4e: /*Clip Dest Y*/ + tgui->accel.dst_y_clip = (tgui->accel.dst_y_clip & 0xff00) | val; + break; + case 0x4f: /*Clip Dest Y*/ + tgui->accel.dst_y_clip = (tgui->accel.dst_y_clip & 0xff) | (val << 8); + break; - case 0x68: /*CKey*/ - tgui->accel.ckey = (tgui->accel.ckey & 0xffffff00) | val; - break; - case 0x69: /*CKey*/ - tgui->accel.ckey = (tgui->accel.ckey & 0xffff00ff) | (val << 8); - break; - case 0x6a: /*CKey*/ - tgui->accel.ckey = (tgui->accel.ckey & 0xff00ffff) | (val << 16); - break; - case 0x6b: /*CKey*/ - tgui->accel.ckey = (tgui->accel.ckey & 0x00ffffff) | (val << 24); - break; + case 0x68: /*CKey*/ + tgui->accel.ckey = (tgui->accel.ckey & 0xffffff00) | val; + break; + case 0x69: /*CKey*/ + tgui->accel.ckey = (tgui->accel.ckey & 0xffff00ff) | (val << 8); + break; + case 0x6a: /*CKey*/ + tgui->accel.ckey = (tgui->accel.ckey & 0xff00ffff) | (val << 16); + break; + case 0x6b: /*CKey*/ + tgui->accel.ckey = (tgui->accel.ckey & 0x00ffffff) | (val << 24); + break; - case 0x80: case 0x81: case 0x82: case 0x83: - case 0x84: case 0x85: case 0x86: case 0x87: - case 0x88: case 0x89: case 0x8a: case 0x8b: - case 0x8c: case 0x8d: case 0x8e: case 0x8f: - case 0x90: case 0x91: case 0x92: case 0x93: - case 0x94: case 0x95: case 0x96: case 0x97: - case 0x98: case 0x99: case 0x9a: case 0x9b: - case 0x9c: case 0x9d: case 0x9e: case 0x9f: - case 0xa0: case 0xa1: case 0xa2: case 0xa3: - case 0xa4: case 0xa5: case 0xa6: case 0xa7: - case 0xa8: case 0xa9: case 0xaa: case 0xab: - case 0xac: case 0xad: case 0xae: case 0xaf: - case 0xb0: case 0xb1: case 0xb2: case 0xb3: - case 0xb4: case 0xb5: case 0xb6: case 0xb7: - case 0xb8: case 0xb9: case 0xba: case 0xbb: - case 0xbc: case 0xbd: case 0xbe: case 0xbf: - case 0xc0: case 0xc1: case 0xc2: case 0xc3: - case 0xc4: case 0xc5: case 0xc6: case 0xc7: - case 0xc8: case 0xc9: case 0xca: case 0xcb: - case 0xcc: case 0xcd: case 0xce: case 0xcf: - case 0xd0: case 0xd1: case 0xd2: case 0xd3: - case 0xd4: case 0xd5: case 0xd6: case 0xd7: - case 0xd8: case 0xd9: case 0xda: case 0xdb: - case 0xdc: case 0xdd: case 0xde: case 0xdf: - case 0xe0: case 0xe1: case 0xe2: case 0xe3: - case 0xe4: case 0xe5: case 0xe6: case 0xe7: - case 0xe8: case 0xe9: case 0xea: case 0xeb: - case 0xec: case 0xed: case 0xee: case 0xef: - case 0xf0: case 0xf1: case 0xf2: case 0xf3: - case 0xf4: case 0xf5: case 0xf6: case 0xf7: - case 0xf8: case 0xf9: case 0xfa: case 0xfb: - case 0xfc: case 0xfd: case 0xfe: case 0xff: - tgui->accel.pattern[addr & 0x7f] = val; - break; - } + case 0x80: + case 0x81: + case 0x82: + case 0x83: + case 0x84: + case 0x85: + case 0x86: + case 0x87: + case 0x88: + case 0x89: + case 0x8a: + case 0x8b: + case 0x8c: + case 0x8d: + case 0x8e: + case 0x8f: + case 0x90: + case 0x91: + case 0x92: + case 0x93: + case 0x94: + case 0x95: + case 0x96: + case 0x97: + case 0x98: + case 0x99: + case 0x9a: + case 0x9b: + case 0x9c: + case 0x9d: + case 0x9e: + case 0x9f: + case 0xa0: + case 0xa1: + case 0xa2: + case 0xa3: + case 0xa4: + case 0xa5: + case 0xa6: + case 0xa7: + case 0xa8: + case 0xa9: + case 0xaa: + case 0xab: + case 0xac: + case 0xad: + case 0xae: + case 0xaf: + case 0xb0: + case 0xb1: + case 0xb2: + case 0xb3: + case 0xb4: + case 0xb5: + case 0xb6: + case 0xb7: + case 0xb8: + case 0xb9: + case 0xba: + case 0xbb: + case 0xbc: + case 0xbd: + case 0xbe: + case 0xbf: + case 0xc0: + case 0xc1: + case 0xc2: + case 0xc3: + case 0xc4: + case 0xc5: + case 0xc6: + case 0xc7: + case 0xc8: + case 0xc9: + case 0xca: + case 0xcb: + case 0xcc: + case 0xcd: + case 0xce: + case 0xcf: + case 0xd0: + case 0xd1: + case 0xd2: + case 0xd3: + case 0xd4: + case 0xd5: + case 0xd6: + case 0xd7: + case 0xd8: + case 0xd9: + case 0xda: + case 0xdb: + case 0xdc: + case 0xdd: + case 0xde: + case 0xdf: + case 0xe0: + case 0xe1: + case 0xe2: + case 0xe3: + case 0xe4: + case 0xe5: + case 0xe6: + case 0xe7: + case 0xe8: + case 0xe9: + case 0xea: + case 0xeb: + case 0xec: + case 0xed: + case 0xee: + case 0xef: + case 0xf0: + case 0xf1: + case 0xf2: + case 0xf3: + case 0xf4: + case 0xf5: + case 0xf6: + case 0xf7: + case 0xf8: + case 0xf9: + case 0xfa: + case 0xfb: + case 0xfc: + case 0xfd: + case 0xfe: + case 0xff: + tgui->accel.pattern[addr & 0x7f] = val; + break; + } } static void tgui_accel_write_w(uint32_t addr, uint16_t val, void *p) { - tgui_t *tgui = (tgui_t *)p; + tgui_t *tgui = (tgui_t *) p; - tgui_accel_write(addr, val, tgui); - tgui_accel_write(addr + 1, val >> 8, tgui); + tgui_accel_write(addr, val, tgui); + tgui_accel_write(addr + 1, val >> 8, tgui); } static void tgui_accel_write_l(uint32_t addr, uint32_t val, void *p) { - tgui_t *tgui = (tgui_t *)p; - svga_t *svga = &tgui->svga; + tgui_t *tgui = (tgui_t *) p; + svga_t *svga = &tgui->svga; - switch (addr & 0xff) { - case 0x24: /*Long version of Command and ROP together*/ - if ((svga->crtc[0x36] & 0x03) == 0x02) { - if ((addr & ~0xff) != 0xbff00) - return; - } else if ((svga->crtc[0x36] & 0x03) == 0x01) { - if ((addr & ~0xff) != 0xb7f00) - return; - } - tgui->accel.command = val & 0xff; - tgui->accel.rop = val >> 24; - tgui->accel.use_src = ((val >> 24) & 0x33) ^ (((val >> 24) >> 2) & 0x33); - tgui_accel_command(-1, 0, tgui); - break; + switch (addr & 0xff) { + case 0x24: /*Long version of Command and ROP together*/ + if ((svga->crtc[0x36] & 0x03) == 0x02) { + if ((addr & ~0xff) != 0xbff00) + return; + } else if ((svga->crtc[0x36] & 0x03) == 0x01) { + if ((addr & ~0xff) != 0xb7f00) + return; + } + tgui->accel.command = val & 0xff; + tgui->accel.rop = val >> 24; + tgui->accel.use_src = ((val >> 24) & 0x33) ^ (((val >> 24) >> 2) & 0x33); + tgui_accel_command(-1, 0, tgui); + break; - default: - tgui_accel_write_w(addr, val, tgui); - tgui_accel_write_w(addr + 2, val >> 16, tgui); - break; - } + default: + tgui_accel_write_w(addr, val, tgui); + tgui_accel_write_w(addr + 2, val >> 16, tgui); + break; + } } static uint8_t tgui_accel_read(uint32_t addr, void *p) { - tgui_t *tgui = (tgui_t *)p; - svga_t *svga = &tgui->svga; + tgui_t *tgui = (tgui_t *) p; + svga_t *svga = &tgui->svga; - if ((svga->crtc[0x36] & 0x03) == 0x02) { - if ((addr & ~0xff) != 0xbff00) - return 0xff; - } else if ((svga->crtc[0x36] & 0x03) == 0x01) { - if ((addr & ~0xff) != 0xb7f00) - return 0xff; - } + if ((svga->crtc[0x36] & 0x03) == 0x02) { + if ((addr & ~0xff) != 0xbff00) + return 0xff; + } else if ((svga->crtc[0x36] & 0x03) == 0x01) { + if ((addr & ~0xff) != 0xb7f00) + return 0xff; + } - switch (addr & 0xff) - { - case 0x20: /*Status*/ - return 0; + switch (addr & 0xff) { + case 0x20: /*Status*/ + return 0; - case 0x22: - return tgui->accel.ger22 & 0xff; + case 0x22: + return tgui->accel.ger22 & 0xff; - case 0x23: - return tgui->accel.ger22 >> 8; + case 0x23: + return tgui->accel.ger22 >> 8; - case 0x27: /*ROP*/ - return tgui->accel.rop; + case 0x27: /*ROP*/ + return tgui->accel.rop; - case 0x28: /*Flags*/ - return tgui->accel.flags & 0xff; - case 0x29: /*Flags*/ - return tgui->accel.flags >> 8; - case 0x2a: /*Flags*/ - return tgui->accel.flags >> 16; - case 0x2b: - return tgui->accel.flags >> 24; + case 0x28: /*Flags*/ + return tgui->accel.flags & 0xff; + case 0x29: /*Flags*/ + return tgui->accel.flags >> 8; + case 0x2a: /*Flags*/ + return tgui->accel.flags >> 16; + case 0x2b: + return tgui->accel.flags >> 24; - case 0x2c: /*Foreground colour*/ - case 0x78: - return tgui->accel.fg_col & 0xff; - case 0x2d: /*Foreground colour*/ - case 0x79: - return tgui->accel.fg_col >> 8; - case 0x2e: /*Foreground colour*/ - case 0x7a: - return tgui->accel.fg_col >> 16; - case 0x2f: /*Foreground colour*/ - case 0x7b: - return tgui->accel.fg_col >> 24; + case 0x2c: /*Foreground colour*/ + case 0x78: + return tgui->accel.fg_col & 0xff; + case 0x2d: /*Foreground colour*/ + case 0x79: + return tgui->accel.fg_col >> 8; + case 0x2e: /*Foreground colour*/ + case 0x7a: + return tgui->accel.fg_col >> 16; + case 0x2f: /*Foreground colour*/ + case 0x7b: + return tgui->accel.fg_col >> 24; - case 0x30: /*Background colour*/ - case 0x7c: - return tgui->accel.bg_col & 0xff; - case 0x31: /*Background colour*/ - case 0x7d: - return tgui->accel.bg_col >> 8; - case 0x32: /*Background colour*/ - case 0x7e: - return tgui->accel.bg_col >> 16; - case 0x33: /*Background colour*/ - case 0x7f: - return tgui->accel.bg_col >> 24; + case 0x30: /*Background colour*/ + case 0x7c: + return tgui->accel.bg_col & 0xff; + case 0x31: /*Background colour*/ + case 0x7d: + return tgui->accel.bg_col >> 8; + case 0x32: /*Background colour*/ + case 0x7e: + return tgui->accel.bg_col >> 16; + case 0x33: /*Background colour*/ + case 0x7f: + return tgui->accel.bg_col >> 24; - case 0x34: /*Pattern location*/ - return tgui->accel.patloc & 0xff; - case 0x35: /*Pattern location*/ - return tgui->accel.patloc >> 8; + case 0x34: /*Pattern location*/ + return tgui->accel.patloc & 0xff; + case 0x35: /*Pattern location*/ + return tgui->accel.patloc >> 8; - case 0x38: /*Dest X*/ - return tgui->accel.dst_x & 0xff; - case 0x39: /*Dest X*/ - return tgui->accel.dst_x >> 8; - case 0x3a: /*Dest Y*/ - return tgui->accel.dst_y & 0xff; - case 0x3b: /*Dest Y*/ - return tgui->accel.dst_y >> 8; + case 0x38: /*Dest X*/ + return tgui->accel.dst_x & 0xff; + case 0x39: /*Dest X*/ + return tgui->accel.dst_x >> 8; + case 0x3a: /*Dest Y*/ + return tgui->accel.dst_y & 0xff; + case 0x3b: /*Dest Y*/ + return tgui->accel.dst_y >> 8; - case 0x3c: /*Src X*/ - return tgui->accel.src_x & 0xff; - case 0x3d: /*Src X*/ - return tgui->accel.src_x >> 8; - case 0x3e: /*Src Y*/ - return tgui->accel.src_y & 0xff; - case 0x3f: /*Src Y*/ - return tgui->accel.src_y >> 8; + case 0x3c: /*Src X*/ + return tgui->accel.src_x & 0xff; + case 0x3d: /*Src X*/ + return tgui->accel.src_x >> 8; + case 0x3e: /*Src Y*/ + return tgui->accel.src_y & 0xff; + case 0x3f: /*Src Y*/ + return tgui->accel.src_y >> 8; - case 0x40: /*Size X*/ - return tgui->accel.size_x & 0xff; - case 0x41: /*Size X*/ - return tgui->accel.size_x >> 8; - case 0x42: /*Size Y*/ - return tgui->accel.size_y & 0xff; - case 0x43: /*Size Y*/ - return tgui->accel.size_y >> 8; + case 0x40: /*Size X*/ + return tgui->accel.size_x & 0xff; + case 0x41: /*Size X*/ + return tgui->accel.size_x >> 8; + case 0x42: /*Size Y*/ + return tgui->accel.size_y & 0xff; + case 0x43: /*Size Y*/ + return tgui->accel.size_y >> 8; - case 0x44: /*Style*/ - return tgui->accel.style & 0xff; - case 0x45: /*Style*/ - return tgui->accel.style >> 8; - case 0x46: /*Style*/ - return tgui->accel.style >> 16; - case 0x47: /*Style*/ - return tgui->accel.style >> 24; + case 0x44: /*Style*/ + return tgui->accel.style & 0xff; + case 0x45: /*Style*/ + return tgui->accel.style >> 8; + case 0x46: /*Style*/ + return tgui->accel.style >> 16; + case 0x47: /*Style*/ + return tgui->accel.style >> 24; - case 0x48: /*Clip Src X*/ - return tgui->accel.src_x_clip & 0xff; - case 0x49: /*Clip Src X*/ - return tgui->accel.src_x_clip >> 8; - case 0x4a: /*Clip Src Y*/ - return tgui->accel.src_y_clip & 0xff; - case 0x4b: /*Clip Src Y*/ - return tgui->accel.src_y_clip >> 8; + case 0x48: /*Clip Src X*/ + return tgui->accel.src_x_clip & 0xff; + case 0x49: /*Clip Src X*/ + return tgui->accel.src_x_clip >> 8; + case 0x4a: /*Clip Src Y*/ + return tgui->accel.src_y_clip & 0xff; + case 0x4b: /*Clip Src Y*/ + return tgui->accel.src_y_clip >> 8; - case 0x4c: /*Clip Dest X*/ - return tgui->accel.dst_x_clip & 0xff; - case 0x4d: /*Clip Dest X*/ - return tgui->accel.dst_x_clip >> 8; - case 0x4e: /*Clip Dest Y*/ - return tgui->accel.dst_y_clip & 0xff; - case 0x4f: /*Clip Dest Y*/ - return tgui->accel.dst_y_clip >> 8; + case 0x4c: /*Clip Dest X*/ + return tgui->accel.dst_x_clip & 0xff; + case 0x4d: /*Clip Dest X*/ + return tgui->accel.dst_x_clip >> 8; + case 0x4e: /*Clip Dest Y*/ + return tgui->accel.dst_y_clip & 0xff; + case 0x4f: /*Clip Dest Y*/ + return tgui->accel.dst_y_clip >> 8; - case 0x68: /*CKey*/ - return tgui->accel.ckey & 0xff; - case 0x69: /*CKey*/ - return tgui->accel.ckey >> 8; - case 0x6a: /*CKey*/ - return tgui->accel.ckey >> 16; - case 0x6b: /*CKey*/ - return tgui->accel.ckey >> 24; + case 0x68: /*CKey*/ + return tgui->accel.ckey & 0xff; + case 0x69: /*CKey*/ + return tgui->accel.ckey >> 8; + case 0x6a: /*CKey*/ + return tgui->accel.ckey >> 16; + case 0x6b: /*CKey*/ + return tgui->accel.ckey >> 24; - case 0x80: case 0x81: case 0x82: case 0x83: - case 0x84: case 0x85: case 0x86: case 0x87: - case 0x88: case 0x89: case 0x8a: case 0x8b: - case 0x8c: case 0x8d: case 0x8e: case 0x8f: - case 0x90: case 0x91: case 0x92: case 0x93: - case 0x94: case 0x95: case 0x96: case 0x97: - case 0x98: case 0x99: case 0x9a: case 0x9b: - case 0x9c: case 0x9d: case 0x9e: case 0x9f: - case 0xa0: case 0xa1: case 0xa2: case 0xa3: - case 0xa4: case 0xa5: case 0xa6: case 0xa7: - case 0xa8: case 0xa9: case 0xaa: case 0xab: - case 0xac: case 0xad: case 0xae: case 0xaf: - case 0xb0: case 0xb1: case 0xb2: case 0xb3: - case 0xb4: case 0xb5: case 0xb6: case 0xb7: - case 0xb8: case 0xb9: case 0xba: case 0xbb: - case 0xbc: case 0xbd: case 0xbe: case 0xbf: - case 0xc0: case 0xc1: case 0xc2: case 0xc3: - case 0xc4: case 0xc5: case 0xc6: case 0xc7: - case 0xc8: case 0xc9: case 0xca: case 0xcb: - case 0xcc: case 0xcd: case 0xce: case 0xcf: - case 0xd0: case 0xd1: case 0xd2: case 0xd3: - case 0xd4: case 0xd5: case 0xd6: case 0xd7: - case 0xd8: case 0xd9: case 0xda: case 0xdb: - case 0xdc: case 0xdd: case 0xde: case 0xdf: - case 0xe0: case 0xe1: case 0xe2: case 0xe3: - case 0xe4: case 0xe5: case 0xe6: case 0xe7: - case 0xe8: case 0xe9: case 0xea: case 0xeb: - case 0xec: case 0xed: case 0xee: case 0xef: - case 0xf0: case 0xf1: case 0xf2: case 0xf3: - case 0xf4: case 0xf5: case 0xf6: case 0xf7: - case 0xf8: case 0xf9: case 0xfa: case 0xfb: - case 0xfc: case 0xfd: case 0xfe: case 0xff: - return tgui->accel.pattern[addr & 0x7f]; - } - return 0xff; + case 0x80: + case 0x81: + case 0x82: + case 0x83: + case 0x84: + case 0x85: + case 0x86: + case 0x87: + case 0x88: + case 0x89: + case 0x8a: + case 0x8b: + case 0x8c: + case 0x8d: + case 0x8e: + case 0x8f: + case 0x90: + case 0x91: + case 0x92: + case 0x93: + case 0x94: + case 0x95: + case 0x96: + case 0x97: + case 0x98: + case 0x99: + case 0x9a: + case 0x9b: + case 0x9c: + case 0x9d: + case 0x9e: + case 0x9f: + case 0xa0: + case 0xa1: + case 0xa2: + case 0xa3: + case 0xa4: + case 0xa5: + case 0xa6: + case 0xa7: + case 0xa8: + case 0xa9: + case 0xaa: + case 0xab: + case 0xac: + case 0xad: + case 0xae: + case 0xaf: + case 0xb0: + case 0xb1: + case 0xb2: + case 0xb3: + case 0xb4: + case 0xb5: + case 0xb6: + case 0xb7: + case 0xb8: + case 0xb9: + case 0xba: + case 0xbb: + case 0xbc: + case 0xbd: + case 0xbe: + case 0xbf: + case 0xc0: + case 0xc1: + case 0xc2: + case 0xc3: + case 0xc4: + case 0xc5: + case 0xc6: + case 0xc7: + case 0xc8: + case 0xc9: + case 0xca: + case 0xcb: + case 0xcc: + case 0xcd: + case 0xce: + case 0xcf: + case 0xd0: + case 0xd1: + case 0xd2: + case 0xd3: + case 0xd4: + case 0xd5: + case 0xd6: + case 0xd7: + case 0xd8: + case 0xd9: + case 0xda: + case 0xdb: + case 0xdc: + case 0xdd: + case 0xde: + case 0xdf: + case 0xe0: + case 0xe1: + case 0xe2: + case 0xe3: + case 0xe4: + case 0xe5: + case 0xe6: + case 0xe7: + case 0xe8: + case 0xe9: + case 0xea: + case 0xeb: + case 0xec: + case 0xed: + case 0xee: + case 0xef: + case 0xf0: + case 0xf1: + case 0xf2: + case 0xf3: + case 0xf4: + case 0xf5: + case 0xf6: + case 0xf7: + case 0xf8: + case 0xf9: + case 0xfa: + case 0xfb: + case 0xfc: + case 0xfd: + case 0xfe: + case 0xff: + return tgui->accel.pattern[addr & 0x7f]; + } + return 0xff; } static uint16_t tgui_accel_read_w(uint32_t addr, void *p) { - tgui_t *tgui = (tgui_t *)p; - return tgui_accel_read(addr, tgui) | (tgui_accel_read(addr + 1, tgui) << 8); + tgui_t *tgui = (tgui_t *) p; + return tgui_accel_read(addr, tgui) | (tgui_accel_read(addr + 1, tgui) << 8); } static uint32_t tgui_accel_read_l(uint32_t addr, void *p) { - tgui_t *tgui = (tgui_t *)p; - return tgui_accel_read_w(addr, tgui) | (tgui_accel_read_w(addr + 2, tgui) << 16); + tgui_t *tgui = (tgui_t *) p; + return tgui_accel_read_w(addr, tgui) | (tgui_accel_read_w(addr + 2, tgui) << 16); } static void tgui_accel_write_fb_b(uint32_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; - tgui_t *tgui = (tgui_t *)svga->p; + svga_t *svga = (svga_t *) p; + tgui_t *tgui = (tgui_t *) svga->p; - if (tgui->write_blitter) { - tgui_accel_command(8, val << 24, tgui); - } else - svga_write_linear(addr, val, svga); + if (tgui->write_blitter) { + tgui_accel_command(8, val << 24, tgui); + } else + svga_write_linear(addr, val, svga); } static void tgui_accel_write_fb_w(uint32_t addr, uint16_t val, void *p) { - svga_t *svga = (svga_t *)p; - tgui_t *tgui = (tgui_t *)svga->p; + svga_t *svga = (svga_t *) p; + tgui_t *tgui = (tgui_t *) svga->p; - if (tgui->write_blitter) - tgui_accel_command(16, (((val & 0xff00) >> 8) | ((val & 0x00ff) << 8)) << 16, tgui); - else - svga_writew_linear(addr, val, svga); + if (tgui->write_blitter) + tgui_accel_command(16, (((val & 0xff00) >> 8) | ((val & 0x00ff) << 8)) << 16, tgui); + else + svga_writew_linear(addr, val, svga); } static void tgui_accel_write_fb_l(uint32_t addr, uint32_t val, void *p) { - svga_t *svga = (svga_t *)p; - tgui_t *tgui = (tgui_t *)svga->p; + svga_t *svga = (svga_t *) p; + tgui_t *tgui = (tgui_t *) svga->p; - if (tgui->write_blitter) - tgui_accel_command(32, ((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24), tgui); - else - svga_writel_linear(addr, val, svga); + if (tgui->write_blitter) + tgui_accel_command(32, ((val & 0xff000000) >> 24) | ((val & 0x00ff0000) >> 8) | ((val & 0x0000ff00) << 8) | ((val & 0x000000ff) << 24), tgui); + else + svga_writel_linear(addr, val, svga); } static void tgui_mmio_write(uint32_t addr, uint8_t val, void *p) { - tgui_t *tgui = (tgui_t *)p; - svga_t *svga = &tgui->svga; + tgui_t *tgui = (tgui_t *) p; + svga_t *svga = &tgui->svga; - addr &= 0x0000ffff; + addr &= 0x0000ffff; if (((svga->crtc[0x36] & 0x03) == 0x00) && (addr >= 0x2100 && addr <= 0x21ff)) - tgui_accel_out(addr, val, p); - else if (((svga->crtc[0x36] & 0x03) > 0x00) && (addr <= 0xff)) - tgui_accel_write(addr, val, p); - else - tgui_out(addr, val, p); + tgui_accel_out(addr, val, p); + else if (((svga->crtc[0x36] & 0x03) > 0x00) && (addr <= 0xff)) + tgui_accel_write(addr, val, p); + else + tgui_out(addr, val, p); } - static void tgui_mmio_write_w(uint32_t addr, uint16_t val, void *p) { - tgui_t *tgui = (tgui_t *)p; - svga_t *svga = &tgui->svga; + tgui_t *tgui = (tgui_t *) p; + svga_t *svga = &tgui->svga; - addr &= 0x0000ffff; + addr &= 0x0000ffff; if (((svga->crtc[0x36] & 0x03) == 0x00) && (addr >= 0x2100 && addr <= 0x21ff)) - tgui_accel_out_w(addr, val, p); - else if (((svga->crtc[0x36] & 0x03) > 0x00) && (addr <= 0xff)) - tgui_accel_write_w(addr, val, p); - else { - tgui_out(addr, val & 0xff, p); - tgui_out(addr + 1, val >> 8, p); - } + tgui_accel_out_w(addr, val, p); + else if (((svga->crtc[0x36] & 0x03) > 0x00) && (addr <= 0xff)) + tgui_accel_write_w(addr, val, p); + else { + tgui_out(addr, val & 0xff, p); + tgui_out(addr + 1, val >> 8, p); + } } - static void tgui_mmio_write_l(uint32_t addr, uint32_t val, void *p) { - tgui_t *tgui = (tgui_t *)p; - svga_t *svga = &tgui->svga; + tgui_t *tgui = (tgui_t *) p; + svga_t *svga = &tgui->svga; - addr &= 0x0000ffff; + addr &= 0x0000ffff; if (((svga->crtc[0x36] & 0x03) == 0x00) && (addr >= 0x2100 && addr <= 0x21ff)) - tgui_accel_out_l(addr, val, p); - else if (((svga->crtc[0x36] & 0x03) > 0x00) && (addr <= 0xff)) - tgui_accel_write_l(addr, val, p); - else { - tgui_out(addr, val & 0xff, p); - tgui_out(addr + 1, val >> 8, p); - tgui_out(addr + 2, val >> 16, p); - tgui_out(addr + 3, val >> 24, p); - } + tgui_accel_out_l(addr, val, p); + else if (((svga->crtc[0x36] & 0x03) > 0x00) && (addr <= 0xff)) + tgui_accel_write_l(addr, val, p); + else { + tgui_out(addr, val & 0xff, p); + tgui_out(addr + 1, val >> 8, p); + tgui_out(addr + 2, val >> 16, p); + tgui_out(addr + 3, val >> 24, p); + } } - static uint8_t tgui_mmio_read(uint32_t addr, void *p) { - tgui_t *tgui = (tgui_t *)p; - svga_t *svga = &tgui->svga; + tgui_t *tgui = (tgui_t *) p; + svga_t *svga = &tgui->svga; uint8_t ret = 0xff; - addr &= 0x0000ffff; + addr &= 0x0000ffff; if (((svga->crtc[0x36] & 0x03) == 0x00) && (addr >= 0x2100 && addr <= 0x21ff)) - ret = tgui_accel_in(addr, p); - else if (((svga->crtc[0x36] & 0x03) > 0x00) && (addr <= 0xff)) - ret = tgui_accel_read(addr, p); - else - ret = tgui_in(addr, p); + ret = tgui_accel_in(addr, p); + else if (((svga->crtc[0x36] & 0x03) > 0x00) && (addr <= 0xff)) + ret = tgui_accel_read(addr, p); + else + ret = tgui_in(addr, p); return ret; } - static uint16_t tgui_mmio_read_w(uint32_t addr, void *p) { - tgui_t *tgui = (tgui_t *)p; - svga_t *svga = &tgui->svga; - uint16_t ret = 0xffff; + tgui_t *tgui = (tgui_t *) p; + svga_t *svga = &tgui->svga; + uint16_t ret = 0xffff; - addr &= 0x0000ffff; + addr &= 0x0000ffff; if (((svga->crtc[0x36] & 0x03) == 0x00) && (addr >= 0x2100 && addr <= 0x21ff)) - ret = tgui_accel_in_w(addr, p); - else if (((svga->crtc[0x36] & 0x03) > 0x00) && (addr <= 0xff)) - ret = tgui_accel_read_w(addr, p); - else - ret = tgui_in(addr, p) | (tgui_in(addr + 1, p) << 8); + ret = tgui_accel_in_w(addr, p); + else if (((svga->crtc[0x36] & 0x03) > 0x00) && (addr <= 0xff)) + ret = tgui_accel_read_w(addr, p); + else + ret = tgui_in(addr, p) | (tgui_in(addr + 1, p) << 8); return ret; } - static uint32_t tgui_mmio_read_l(uint32_t addr, void *p) { - tgui_t *tgui = (tgui_t *)p; - svga_t *svga = &tgui->svga; - uint32_t ret = 0xffffffff; + tgui_t *tgui = (tgui_t *) p; + svga_t *svga = &tgui->svga; + uint32_t ret = 0xffffffff; - addr &= 0x0000ffff; + addr &= 0x0000ffff; if (((svga->crtc[0x36] & 0x03) == 0x00) && (addr >= 0x2100 && addr <= 0x21ff)) - ret = tgui_accel_in_l(addr, p); - else if (((svga->crtc[0x36] & 0x03) > 0x00) && (addr <= 0xff)) - ret = tgui_accel_read_l(addr, p); - else - ret = tgui_in(addr, p) | (tgui_in(addr + 1, p) << 8) | (tgui_in(addr + 2, p) << 16) | (tgui_in(addr + 3, p) << 24); + ret = tgui_accel_in_l(addr, p); + else if (((svga->crtc[0x36] & 0x03) > 0x00) && (addr <= 0xff)) + ret = tgui_accel_read_l(addr, p); + else + ret = tgui_in(addr, p) | (tgui_in(addr + 1, p) << 8) | (tgui_in(addr + 2, p) << 16) | (tgui_in(addr + 3, p) << 24); return ret; } -static void *tgui_init(const device_t *info) +static void * +tgui_init(const device_t *info) { - const char *bios_fn; + const char *bios_fn; - tgui_t *tgui = malloc(sizeof(tgui_t)); - svga_t *svga = &tgui->svga; - memset(tgui, 0, sizeof(tgui_t)); + tgui_t *tgui = malloc(sizeof(tgui_t)); + svga_t *svga = &tgui->svga; + memset(tgui, 0, sizeof(tgui_t)); - tgui->vram_size = device_get_config_int("memory") << 20; - tgui->vram_mask = tgui->vram_size - 1; + tgui->vram_size = device_get_config_int("memory") << 20; + tgui->vram_mask = tgui->vram_size - 1; - tgui->type = info->local & 0xff; + tgui->type = info->local & 0xff; - tgui->pci = !!(info->flags & DEVICE_PCI); + tgui->pci = !!(info->flags & DEVICE_PCI); - switch(tgui->type) { - case TGUI_9400CXI: - bios_fn = ROM_TGUI_9400CXI; - break; - case TGUI_9440: - bios_fn = (info->local & ONBOARD) ? NULL : ROM_TGUI_9440; - break; - case TGUI_9660: - case TGUI_9680: - bios_fn = ROM_TGUI_96xx; - break; - default: - free(tgui); - return NULL; - } + switch (tgui->type) { + case TGUI_9400CXI: + bios_fn = ROM_TGUI_9400CXI; + break; + case TGUI_9440: + bios_fn = (info->local & ONBOARD) ? NULL : ROM_TGUI_9440; + break; + case TGUI_9660: + case TGUI_9680: + bios_fn = ROM_TGUI_96xx; + break; + default: + free(tgui); + return NULL; + } - tgui->has_bios = (bios_fn != NULL); + tgui->has_bios = (bios_fn != NULL); - if (tgui->has_bios) { - rom_init(&tgui->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - if (tgui->pci) - mem_mapping_disable(&tgui->bios_rom.mapping); - } + if (tgui->has_bios) { + rom_init(&tgui->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + if (tgui->pci) + mem_mapping_disable(&tgui->bios_rom.mapping); + } - if (tgui->pci) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tgui_pci); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tgui_vlb); + if (tgui->pci) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tgui_pci); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tgui_vlb); - svga_init(info, svga, tgui, tgui->vram_size, - tgui_recalctimings, - tgui_in, tgui_out, - tgui_hwcursor_draw, - NULL); + svga_init(info, svga, tgui, tgui->vram_size, + tgui_recalctimings, + tgui_in, tgui_out, + tgui_hwcursor_draw, + NULL); - if (tgui->type == TGUI_9400CXI) - svga->ramdac = device_add(&tkd8001_ramdac_device); + if (tgui->type == TGUI_9400CXI) + svga->ramdac = device_add(&tkd8001_ramdac_device); - mem_mapping_add(&tgui->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, tgui_accel_write_fb_b, tgui_accel_write_fb_w, tgui_accel_write_fb_l, NULL, MEM_MAPPING_EXTERNAL, svga); - mem_mapping_add(&tgui->accel_mapping, 0, 0, tgui_accel_read, tgui_accel_read_w, tgui_accel_read_l, tgui_accel_write, tgui_accel_write_w, tgui_accel_write_l, NULL, MEM_MAPPING_EXTERNAL, tgui); - if (tgui->type >= TGUI_9440) - mem_mapping_add(&tgui->mmio_mapping, 0, 0, tgui_mmio_read, tgui_mmio_read_w, tgui_mmio_read_l, tgui_mmio_write, tgui_mmio_write_w, tgui_mmio_write_l, NULL, MEM_MAPPING_EXTERNAL, tgui); - mem_mapping_disable(&tgui->accel_mapping); - mem_mapping_disable(&tgui->mmio_mapping); + mem_mapping_add(&tgui->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, tgui_accel_write_fb_b, tgui_accel_write_fb_w, tgui_accel_write_fb_l, NULL, MEM_MAPPING_EXTERNAL, svga); + mem_mapping_add(&tgui->accel_mapping, 0, 0, tgui_accel_read, tgui_accel_read_w, tgui_accel_read_l, tgui_accel_write, tgui_accel_write_w, tgui_accel_write_l, NULL, MEM_MAPPING_EXTERNAL, tgui); + if (tgui->type >= TGUI_9440) + mem_mapping_add(&tgui->mmio_mapping, 0, 0, tgui_mmio_read, tgui_mmio_read_w, tgui_mmio_read_l, tgui_mmio_write, tgui_mmio_write_w, tgui_mmio_write_l, NULL, MEM_MAPPING_EXTERNAL, tgui); + mem_mapping_disable(&tgui->accel_mapping); + mem_mapping_disable(&tgui->mmio_mapping); - tgui_set_io(tgui); + tgui_set_io(tgui); - if (tgui->pci && (tgui->type >= TGUI_9440)) { - if (tgui->has_bios) - tgui->card = pci_add_card(PCI_ADD_VIDEO, tgui_pci_read, tgui_pci_write, tgui); - else - tgui->card = pci_add_card(PCI_ADD_VIDEO | PCI_ADD_STRICT, tgui_pci_read, tgui_pci_write, tgui); - } + if (tgui->pci && (tgui->type >= TGUI_9440)) { + if (tgui->has_bios) + tgui->card = pci_add_card(PCI_ADD_VIDEO, tgui_pci_read, tgui_pci_write, tgui); + else + tgui->card = pci_add_card(PCI_ADD_VIDEO | PCI_ADD_STRICT, tgui_pci_read, tgui_pci_write, tgui); + } - tgui->pci_regs[PCI_REG_COMMAND] = 7; + tgui->pci_regs[PCI_REG_COMMAND] = 7; - if (tgui->has_bios) { - tgui->pci_regs[0x30] = 0x00; - tgui->pci_regs[0x32] = 0x0c; - tgui->pci_regs[0x33] = 0x00; - } + if (tgui->has_bios) { + tgui->pci_regs[0x30] = 0x00; + tgui->pci_regs[0x32] = 0x0c; + tgui->pci_regs[0x33] = 0x00; + } - if (tgui->type >= TGUI_9440) { - svga->packed_chain4 = 1; + if (tgui->type >= TGUI_9440) { + svga->packed_chain4 = 1; - tgui->i2c = i2c_gpio_init("ddc_tgui"); - tgui->ddc = ddc_init(i2c_gpio_get_bus(tgui->i2c)); - } + tgui->i2c = i2c_gpio_init("ddc_tgui"); + tgui->ddc = ddc_init(i2c_gpio_get_bus(tgui->i2c)); + } - return tgui; + return tgui; } -static int tgui9400cxi_available(void) +static int +tgui9400cxi_available(void) { - return rom_present(ROM_TGUI_9400CXI); + return rom_present(ROM_TGUI_9400CXI); } -static int tgui9440_available(void) +static int +tgui9440_available(void) { - return rom_present(ROM_TGUI_9440); + return rom_present(ROM_TGUI_9440); } -static int tgui96xx_available(void) +static int +tgui96xx_available(void) { - return rom_present(ROM_TGUI_96xx); + return rom_present(ROM_TGUI_96xx); } -void tgui_close(void *p) +void +tgui_close(void *p) { - tgui_t *tgui = (tgui_t *)p; + tgui_t *tgui = (tgui_t *) p; svga_close(&tgui->svga); - if (tgui->type >= TGUI_9440) { + if (tgui->type >= TGUI_9440) { ddc_close(tgui->ddc); i2c_gpio_close(tgui->i2c); - }; + }; free(tgui); } -void tgui_speed_changed(void *p) +void +tgui_speed_changed(void *p) { - tgui_t *tgui = (tgui_t *)p; + tgui_t *tgui = (tgui_t *) p; - svga_recalctimings(&tgui->svga); + svga_recalctimings(&tgui->svga); } -void tgui_force_redraw(void *p) +void +tgui_force_redraw(void *p) { - tgui_t *tgui = (tgui_t *)p; + tgui_t *tgui = (tgui_t *) p; - tgui->svga.fullchange = changeframecount; + tgui->svga.fullchange = changeframecount; } // clang-format off @@ -3234,85 +3619,85 @@ static const device_config_t tgui96xx_config[] = { // clang-format on const device_t tgui9400cxi_device = { - .name = "Trident TGUI 9400CXi", + .name = "Trident TGUI 9400CXi", .internal_name = "tgui9400cxi_vlb", - .flags = DEVICE_VLB, - .local = TGUI_9400CXI, - .init = tgui_init, - .close = tgui_close, - .reset = NULL, + .flags = DEVICE_VLB, + .local = TGUI_9400CXI, + .init = tgui_init, + .close = tgui_close, + .reset = NULL, { .available = tgui9400cxi_available }, .speed_changed = tgui_speed_changed, - .force_redraw = tgui_force_redraw, - .config = tgui9440_config + .force_redraw = tgui_force_redraw, + .config = tgui9440_config }; const device_t tgui9440_vlb_device = { - .name = "Trident TGUI 9440AGi VLB", + .name = "Trident TGUI 9440AGi VLB", .internal_name = "tgui9440_vlb", - .flags = DEVICE_VLB, - .local = TGUI_9440, - .init = tgui_init, - .close = tgui_close, - .reset = NULL, + .flags = DEVICE_VLB, + .local = TGUI_9440, + .init = tgui_init, + .close = tgui_close, + .reset = NULL, { .available = tgui9440_available }, .speed_changed = tgui_speed_changed, - .force_redraw = tgui_force_redraw, - .config = tgui9440_config + .force_redraw = tgui_force_redraw, + .config = tgui9440_config }; const device_t tgui9440_pci_device = { - .name = "Trident TGUI 9440AGi PCI", + .name = "Trident TGUI 9440AGi PCI", .internal_name = "tgui9440_pci", - .flags = DEVICE_PCI, - .local = TGUI_9440, - .init = tgui_init, - .close = tgui_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = TGUI_9440, + .init = tgui_init, + .close = tgui_close, + .reset = NULL, { .available = tgui9440_available }, .speed_changed = tgui_speed_changed, - .force_redraw = tgui_force_redraw, - .config = tgui9440_config + .force_redraw = tgui_force_redraw, + .config = tgui9440_config }; const device_t tgui9440_onboard_pci_device = { - .name = "Trident TGUI 9440AGi On-Board PCI", + .name = "Trident TGUI 9440AGi On-Board PCI", .internal_name = "tgui9440_onboard_pci", - .flags = DEVICE_PCI, - .local = TGUI_9440 | ONBOARD, - .init = tgui_init, - .close = tgui_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = TGUI_9440 | ONBOARD, + .init = tgui_init, + .close = tgui_close, + .reset = NULL, { .available = NULL }, .speed_changed = tgui_speed_changed, - .force_redraw = tgui_force_redraw, - .config = tgui9440_config + .force_redraw = tgui_force_redraw, + .config = tgui9440_config }; const device_t tgui9660_pci_device = { - .name = "Trident TGUI 9660XGi PCI", + .name = "Trident TGUI 9660XGi PCI", .internal_name = "tgui9660_pci", - .flags = DEVICE_PCI, - .local = TGUI_9660, - .init = tgui_init, - .close = tgui_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = TGUI_9660, + .init = tgui_init, + .close = tgui_close, + .reset = NULL, { .available = tgui96xx_available }, .speed_changed = tgui_speed_changed, - .force_redraw = tgui_force_redraw, - .config = tgui96xx_config + .force_redraw = tgui_force_redraw, + .config = tgui96xx_config }; const device_t tgui9680_pci_device = { - .name = "Trident TGUI 9680XGi PCI", + .name = "Trident TGUI 9680XGi PCI", .internal_name = "tgui9680_pci", - .flags = DEVICE_PCI, - .local = TGUI_9680, - .init = tgui_init, - .close = tgui_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = TGUI_9680, + .init = tgui_init, + .close = tgui_close, + .reset = NULL, { .available = tgui96xx_available }, .speed_changed = tgui_speed_changed, - .force_redraw = tgui_force_redraw, - .config = tgui96xx_config + .force_redraw = tgui_force_redraw, + .config = tgui96xx_config }; diff --git a/src/video/vid_ti_cf62011.c b/src/video/vid_ti_cf62011.c index 36db5b89d..417f85861 100644 --- a/src/video/vid_ti_cf62011.c +++ b/src/video/vid_ti_cf62011.c @@ -66,30 +66,28 @@ #include <86box/video.h> #include <86box/vid_svga.h> - typedef struct { - svga_t svga; + svga_t svga; - rom_t bios_rom; + rom_t bios_rom; - int enabled; + int enabled; - uint32_t vram_size; + uint32_t vram_size; - uint8_t banking; - uint8_t reg_2100; - uint8_t reg_210a; + uint8_t banking; + uint8_t reg_2100; + uint8_t reg_210a; } tivga_t; -static video_timings_t timing_ti_cf62011 = {VIDEO_ISA, 6, 8,16, 6, 8,16}; - +static video_timings_t timing_ti_cf62011 = { .type = VIDEO_ISA, .write_b = 6, .write_w = 8, .write_l = 16, .read_b = 6, .read_w = 8, .read_l = 16 }; static void vid_out(uint16_t addr, uint8_t val, void *priv) { - tivga_t *ti = (tivga_t *)priv; - svga_t *svga = &ti->svga; - uint8_t old; + tivga_t *ti = (tivga_t *) priv; + svga_t *svga = &ti->svga; + uint8_t old; #if 0 if (((addr & 0xfff0) == 0x03d0 || (addr & 0xfff0) == 0x03b0) && @@ -97,60 +95,59 @@ vid_out(uint16_t addr, uint8_t val, void *priv) #endif switch (addr) { - case 0x0102: - ti->enabled = (val & 0x01); - return; + case 0x0102: + ti->enabled = (val & 0x01); + return; - case 0x03d4: - svga->crtcreg = val & 0x3f; - return; + case 0x03d4: + svga->crtcreg = val & 0x3f; + return; - case 0x03d5: - if (svga->crtcreg & 0x20) - return; - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - old = svga->crtc[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; - if (old != val) { - if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - } - break; + case 0x03d5: + if (svga->crtcreg & 0x20) + return; + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + } + break; - case 0x2100: - ti->reg_2100 = val; - if ((val & 7) < 4) - svga->read_bank = svga->write_bank = 0; - else - svga->read_bank = svga->write_bank = (ti->banking & 0x7) * 0x10000; - break; + case 0x2100: + ti->reg_2100 = val; + if ((val & 7) < 4) + svga->read_bank = svga->write_bank = 0; + else + svga->read_bank = svga->write_bank = (ti->banking & 0x7) * 0x10000; + break; - case 0x2108: - if ((ti->reg_2100 & 7) >= 4) - svga->read_bank = svga->write_bank = (val & 0x7) * 0x10000; - ti->banking = val; - break; + case 0x2108: + if ((ti->reg_2100 & 7) >= 4) + svga->read_bank = svga->write_bank = (val & 0x7) * 0x10000; + ti->banking = val; + break; - case 0x210a: - ti->reg_210a = val; - break; + case 0x210a: + ti->reg_210a = val; + break; } svga_out(addr, val, svga); } - static uint8_t vid_in(uint16_t addr, void *priv) { - tivga_t *ti = (tivga_t *)priv; - svga_t *svga = &ti->svga; - uint8_t ret; + tivga_t *ti = (tivga_t *) priv; + svga_t *svga = &ti->svga; + uint8_t ret; #if 0 if (((addr & 0xfff0) == 0x03d0 || (addr & 0xfff0) == 0x03b0) && @@ -158,120 +155,116 @@ vid_in(uint16_t addr, void *priv) #endif switch (addr) { - case 0x0100: - ret = 0xfe; - break; + case 0x0100: + ret = 0xfe; + break; - case 0x0101: - ret = 0xe8; - break; + case 0x0101: + ret = 0xe8; + break; - case 0x0102: - ret = ti->enabled; - break; + case 0x0102: + ret = ti->enabled; + break; - case 0x03d4: - ret = svga->crtcreg; - break; + case 0x03d4: + ret = svga->crtcreg; + break; - case 0x03d5: - if (svga->crtcreg & 0x20) - ret = 0xff; - else - ret = svga->crtc[svga->crtcreg]; - break; + case 0x03d5: + if (svga->crtcreg & 0x20) + ret = 0xff; + else + ret = svga->crtc[svga->crtcreg]; + break; - case 0x2100: - ret = ti->reg_2100; - break; + case 0x2100: + ret = ti->reg_2100; + break; - case 0x2108: - ret = ti->banking; - break; + case 0x2108: + ret = ti->banking; + break; - case 0x210a: - ret = ti->reg_210a; - break; + case 0x210a: + ret = ti->reg_210a; + break; - default: - ret = svga_in(addr, svga); - break; + default: + ret = svga_in(addr, svga); + break; } - return(ret); + return (ret); } - static void vid_speed_changed(void *priv) { - tivga_t *ti = (tivga_t *)priv; + tivga_t *ti = (tivga_t *) priv; svga_recalctimings(&ti->svga); } - static void vid_force_redraw(void *priv) { - tivga_t *ti = (tivga_t *)priv; + tivga_t *ti = (tivga_t *) priv; ti->svga.fullchange = changeframecount; } - static void vid_close(void *priv) { - tivga_t *ti = (tivga_t *)priv; + tivga_t *ti = (tivga_t *) priv; svga_close(&ti->svga); free(ti); } - static void * vid_init(const device_t *info) { tivga_t *ti; /* Allocate control block and initialize. */ - ti = (tivga_t *)malloc(sizeof(tivga_t)); + ti = (tivga_t *) malloc(sizeof(tivga_t)); memset(ti, 0x00, sizeof(tivga_t)); /* Set amount of VRAM in KB. */ if (info->local == 0) - ti->vram_size = device_get_config_int("vram_size"); + ti->vram_size = device_get_config_int("vram_size"); else - ti->vram_size = info->local; + ti->vram_size = info->local; video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_ti_cf62011); svga_init(info, &ti->svga, ti, - ti->vram_size<<10, - NULL, vid_in, vid_out, NULL, NULL); + ti->vram_size << 10, + NULL, vid_in, vid_out, NULL, NULL); io_sethandler(0x0100, 2, vid_in, NULL, NULL, NULL, NULL, NULL, ti); io_sethandler(0x03c0, 32, vid_in, NULL, NULL, vid_out, NULL, NULL, ti); io_sethandler(0x2100, 16, vid_in, NULL, NULL, vid_out, NULL, NULL, ti); - ti->svga.bpp = 8; + ti->svga.bpp = 8; ti->svga.miscout = 1; - return(ti); + return (ti); } const device_t ibm_ps1_2121_device = { - .name = "IBM PS/1 Model 2121 SVGA", + .name = "IBM PS/1 Model 2121 SVGA", .internal_name = "ibm_ps1_2121", - .flags = DEVICE_ISA, - .local = 512, - .init = vid_init, - .close = vid_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 512, + .init = vid_init, + .close = vid_close, + .reset = NULL, { .available = NULL }, .speed_changed = vid_speed_changed, - .force_redraw = vid_force_redraw, - .config = NULL + .force_redraw = vid_force_redraw, + .config = NULL }; diff --git a/src/video/vid_tkd8001_ramdac.c b/src/video/vid_tkd8001_ramdac.c index e2b7ed498..225c91c4b 100644 --- a/src/video/vid_tkd8001_ramdac.c +++ b/src/video/vid_tkd8001_ramdac.c @@ -28,76 +28,71 @@ #include <86box/video.h> #include <86box/vid_svga.h> - -typedef struct tkd8001_ramdac_t -{ - int state; +typedef struct tkd8001_ramdac_t { + int state; uint8_t ctrl; } tkd8001_ramdac_t; - void tkd8001_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga) { tkd8001_ramdac_t *ramdac = (tkd8001_ramdac_t *) p; switch (addr) { - case 0x3C6: - if (ramdac->state == 4) { - ramdac->state = 0; - ramdac->ctrl = val; - switch (val >> 5) { - case 0: - case 1: - case 2: - case 3: - svga->bpp = 8; - break; - case 5: - svga->bpp = 15; - break; - case 6: - svga->bpp = 24; - break; - case 7: - svga->bpp = 16; - break; - } - return; - } - break; - case 0x3C7: - case 0x3C8: - case 0x3C9: - ramdac->state = 0; - break; + case 0x3C6: + if (ramdac->state == 4) { + ramdac->state = 0; + ramdac->ctrl = val; + switch (val >> 5) { + case 0: + case 1: + case 2: + case 3: + svga->bpp = 8; + break; + case 5: + svga->bpp = 15; + break; + case 6: + svga->bpp = 24; + break; + case 7: + svga->bpp = 16; + break; + } + return; + } + break; + case 0x3C7: + case 0x3C8: + case 0x3C9: + ramdac->state = 0; + break; } svga_out(addr, val, svga); } - uint8_t tkd8001_ramdac_in(uint16_t addr, void *p, svga_t *svga) { tkd8001_ramdac_t *ramdac = (tkd8001_ramdac_t *) p; switch (addr) { - case 0x3C6: - if (ramdac->state == 4) - return ramdac->ctrl; - ramdac->state++; - break; - case 0x3C7: - case 0x3C8: - case 0x3C9: - ramdac->state = 0; - break; + case 0x3C6: + if (ramdac->state == 4) + return ramdac->ctrl; + ramdac->state++; + break; + case 0x3C7: + case 0x3C8: + case 0x3C9: + ramdac->state = 0; + break; } return svga_in(addr, svga); } - static void * tkd8001_ramdac_init(const device_t *info) { @@ -107,26 +102,25 @@ tkd8001_ramdac_init(const device_t *info) return ramdac; } - static void tkd8001_ramdac_close(void *priv) { tkd8001_ramdac_t *ramdac = (tkd8001_ramdac_t *) priv; if (ramdac) - free(ramdac); + free(ramdac); } const device_t tkd8001_ramdac_device = { - .name = "Trident TKD8001 RAMDAC", + .name = "Trident TKD8001 RAMDAC", .internal_name = "tkd8001_ramdac", - .flags = 0, - .local = 0, - .init = tkd8001_ramdac_init, - .close = tkd8001_ramdac_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = tkd8001_ramdac_init, + .close = tkd8001_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_tvga.c b/src/video/vid_tvga.c index 8d488552e..0af37ac94 100644 --- a/src/video/vid_tvga.c +++ b/src/video/vid_tvga.c @@ -31,420 +31,453 @@ #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> -#define TVGA8900B_ID 0x03 -#define TVGA9000B_ID 0x23 -#define TVGA8900CLD_ID 0x33 +#define TVGA8900B_ID 0x03 +#define TVGA9000B_ID 0x23 +#define TVGA8900CLD_ID 0x33 -#define ROM_TVGA_8900B "roms/video/tvga/tvga8900b.vbi" -#define ROM_TVGA_8900CLD "roms/video/tvga/trident.bin" -#define ROM_TVGA_9000B "roms/video/tvga/tvga9000b.bin" +#define ROM_TVGA_8900B "roms/video/tvga/tvga8900b.vbi" +#define ROM_TVGA_8900CLD "roms/video/tvga/trident.bin" +#define ROM_TVGA_9000B "roms/video/tvga/tvga9000b.bin" -typedef struct tvga_t -{ - mem_mapping_t linear_mapping; - mem_mapping_t accel_mapping; +typedef struct tvga_t { + mem_mapping_t linear_mapping; + mem_mapping_t accel_mapping; - svga_t svga; + svga_t svga; - rom_t bios_rom; - uint8_t card_id; + rom_t bios_rom; + uint8_t card_id; - uint8_t tvga_3d8, tvga_3d9; - int oldmode; - uint8_t oldctrl1; - uint8_t oldctrl2, newctrl2; + uint8_t tvga_3d8, tvga_3d9; + int oldmode; + uint8_t oldctrl1; + uint8_t oldctrl2, newctrl2; - int vram_size; - uint32_t vram_mask; + int vram_size; + uint32_t vram_mask; } tvga_t; -video_timings_t timing_tvga8900 = {VIDEO_ISA, 3, 3, 6, 8, 8, 12}; -video_timings_t timing_tvga9000 = {VIDEO_ISA, 7, 7, 12, 7, 7, 12}; +video_timings_t timing_tvga8900 = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 8, .read_w = 8, .read_l = 12 }; +video_timings_t timing_tvga9000 = { .type = VIDEO_ISA, .write_b = 7, .write_w = 7, .write_l = 12, .read_b = 7, .read_w = 7, .read_l = 12 }; -static uint8_t crtc_mask[0x40] = -{ - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0x7f, 0xff, 0x3f, 0x7f, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xef, - 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, - 0x7f, 0x00, 0x00, 0x2f, 0x00, 0x00, 0x00, 0x03, - 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +static uint8_t crtc_mask[0x40] = { + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0x7f, 0xff, 0x3f, 0x7f, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xef, + 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, + 0x7f, 0x00, 0x00, 0x2f, 0x00, 0x00, 0x00, 0x03, + 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; static void tvga_recalcbanking(tvga_t *tvga); -void tvga_out(uint16_t addr, uint8_t val, void *p) +void +tvga_out(uint16_t addr, uint8_t val, void *p) { - tvga_t *tvga = (tvga_t *)p; - svga_t *svga = &tvga->svga; + tvga_t *tvga = (tvga_t *) p; + svga_t *svga = &tvga->svga; - uint8_t old; + uint8_t old; - if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1)) addr ^= 0x60; + if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x3C5: - switch (svga->seqaddr & 0xf) - { - case 0xB: - tvga->oldmode=1; - break; - case 0xC: - if (svga->seqregs[0xe] & 0x80) - svga->seqregs[0xc] = val; - break; - case 0xd: - if (tvga->oldmode) - tvga->oldctrl2 = val; - else - { - tvga->newctrl2 = val; - svga_recalctimings(svga); - } - break; - case 0xE: - if (tvga->oldmode) - tvga->oldctrl1 = val; - else - { - svga->seqregs[0xe] = val ^ 2; - tvga->tvga_3d8 = svga->seqregs[0xe] & 0xf; - tvga_recalcbanking(tvga); - } - return; - } - break; - - case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9: - if (tvga->card_id != TVGA9000B_ID) { - tkd8001_ramdac_out(addr, val, svga->ramdac, svga); - return; - } - break; - - case 0x3CF: - switch (svga->gdcaddr & 15) - { - case 0x6: - old = svga->gdcreg[6]; - svga_out(addr, val, svga); - if ((old & 0xc) != 0 && (val & 0xc) == 0) - { - /*override mask - TVGA supports linear 128k at A0000*/ - svga->banked_mask = 0x1ffff; - } - return; - case 0xE: - svga->gdcreg[0xe] = val ^ 2; - tvga->tvga_3d9 = svga->gdcreg[0xe] & 0xf; - tvga_recalcbanking(tvga); - break; - case 0xF: - svga->gdcreg[0xf] = val; - tvga_recalcbanking(tvga); - break; - } - break; - case 0x3D4: - svga->crtcreg = val & 0x3f; - return; - case 0x3D5: - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - old = svga->crtc[svga->crtcreg]; - val &= crtc_mask[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; - if (old != val) { - if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) - { - if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - } - } - switch (svga->crtcreg) { - case 0x1e: - svga->vram_display_mask = (val & 0x80) ? tvga->vram_mask : 0x3ffff; - break; - } - return; - case 0x3D8: - if (svga->gdcreg[0xf] & 4) { - tvga->tvga_3d8 = val; - tvga_recalcbanking(tvga); - } - return; - case 0x3D9: - if (svga->gdcreg[0xf] & 4) { - tvga->tvga_3d9 = val; - tvga_recalcbanking(tvga); - } - return; - case 0x3DB: - if (tvga->card_id != TVGA9000B_ID) { - /*3db appears to be a 4 bit clock select register on 8900D*/ - svga->miscout = (svga->miscout & ~0x0c) | ((val & 3) << 2); - tvga->newctrl2 = (tvga->newctrl2 & ~0x01) | ((val & 4) >> 2); - tvga->oldctrl1 = (tvga->oldctrl1 & ~0x10) | ((val & 8) << 1); + switch (addr) { + case 0x3C5: + switch (svga->seqaddr & 0xf) { + case 0xB: + tvga->oldmode = 1; + break; + case 0xC: + if (svga->seqregs[0xe] & 0x80) + svga->seqregs[0xc] = val; + break; + case 0xd: + if (tvga->oldmode) + tvga->oldctrl2 = val; + else { + tvga->newctrl2 = val; svga_recalctimings(svga); + } + break; + case 0xE: + if (tvga->oldmode) + tvga->oldctrl1 = val; + else { + svga->seqregs[0xe] = val ^ 2; + tvga->tvga_3d8 = svga->seqregs[0xe] & 0xf; + tvga_recalcbanking(tvga); + } + return; + } + break; + + case 0x3C6: + case 0x3C7: + case 0x3C8: + case 0x3C9: + if (tvga->card_id != TVGA9000B_ID) { + tkd8001_ramdac_out(addr, val, svga->ramdac, svga); + return; + } + break; + + case 0x3CF: + switch (svga->gdcaddr & 15) { + case 0x6: + old = svga->gdcreg[6]; + svga_out(addr, val, svga); + if ((old & 0xc) != 0 && (val & 0xc) == 0) { + /*override mask - TVGA supports linear 128k at A0000*/ + svga->banked_mask = 0x1ffff; + } + return; + case 0xE: + svga->gdcreg[0xe] = val ^ 2; + tvga->tvga_3d9 = svga->gdcreg[0xe] & 0xf; + tvga_recalcbanking(tvga); + break; + case 0xF: + svga->gdcreg[0xf] = val; + tvga_recalcbanking(tvga); + break; + } + break; + case 0x3D4: + svga->crtcreg = val & 0x3f; + return; + case 0x3D5: + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + old = svga->crtc[svga->crtcreg]; + val &= crtc_mask[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } } - break; - } - svga_out(addr, val, svga); + } + switch (svga->crtcreg) { + case 0x1e: + svga->vram_display_mask = (val & 0x80) ? tvga->vram_mask : 0x3ffff; + break; + } + return; + case 0x3D8: + if (svga->gdcreg[0xf] & 4) { + tvga->tvga_3d8 = val; + tvga_recalcbanking(tvga); + } + return; + case 0x3D9: + if (svga->gdcreg[0xf] & 4) { + tvga->tvga_3d9 = val; + tvga_recalcbanking(tvga); + } + return; + case 0x3DB: + if (tvga->card_id != TVGA9000B_ID) { + /*3db appears to be a 4 bit clock select register on 8900D*/ + svga->miscout = (svga->miscout & ~0x0c) | ((val & 3) << 2); + tvga->newctrl2 = (tvga->newctrl2 & ~0x01) | ((val & 4) >> 2); + tvga->oldctrl1 = (tvga->oldctrl1 & ~0x10) | ((val & 8) << 1); + svga_recalctimings(svga); + } + break; + } + svga_out(addr, val, svga); } -uint8_t tvga_in(uint16_t addr, void *p) +uint8_t +tvga_in(uint16_t addr, void *p) { - tvga_t *tvga = (tvga_t *)p; - svga_t *svga = &tvga->svga; + tvga_t *tvga = (tvga_t *) p; + svga_t *svga = &tvga->svga; - if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1)) addr ^= 0x60; + if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x3C5: - if ((svga->seqaddr & 0xf) == 0xb) - { - tvga->oldmode = 0; - return tvga->card_id; /*Must be at least a TVGA8900*/ - } - if ((svga->seqaddr & 0xf) == 0xd) - { - if (tvga->oldmode) return tvga->oldctrl2; - return tvga->newctrl2; - } - if ((svga->seqaddr & 0xf) == 0xe) - { - if (tvga->oldmode) - return tvga->oldctrl1; - } - break; - case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9: - if (tvga->card_id != TVGA9000B_ID) { - return tkd8001_ramdac_in(addr, svga->ramdac, svga); - } - break; - case 0x3D4: - return svga->crtcreg; - case 0x3D5: - if (svga->crtcreg > 0x18 && svga->crtcreg < 0x1e) - return 0xff; - return svga->crtc[svga->crtcreg]; - case 0x3d8: - return tvga->tvga_3d8; - case 0x3d9: - return tvga->tvga_3d9; - } - return svga_in(addr, svga); + switch (addr) { + case 0x3C5: + if ((svga->seqaddr & 0xf) == 0xb) { + tvga->oldmode = 0; + return tvga->card_id; /*Must be at least a TVGA8900*/ + } + if ((svga->seqaddr & 0xf) == 0xd) { + if (tvga->oldmode) + return tvga->oldctrl2; + return tvga->newctrl2; + } + if ((svga->seqaddr & 0xf) == 0xe) { + if (tvga->oldmode) + return tvga->oldctrl1; + } + break; + case 0x3C6: + case 0x3C7: + case 0x3C8: + case 0x3C9: + if (tvga->card_id != TVGA9000B_ID) { + return tkd8001_ramdac_in(addr, svga->ramdac, svga); + } + break; + case 0x3D4: + return svga->crtcreg; + case 0x3D5: + if (svga->crtcreg > 0x18 && svga->crtcreg < 0x1e) + return 0xff; + return svga->crtc[svga->crtcreg]; + case 0x3d8: + return tvga->tvga_3d8; + case 0x3d9: + return tvga->tvga_3d9; + } + return svga_in(addr, svga); } -static void tvga_recalcbanking(tvga_t *tvga) +static void +tvga_recalcbanking(tvga_t *tvga) { - svga_t *svga = &tvga->svga; + svga_t *svga = &tvga->svga; - svga->write_bank = (tvga->tvga_3d8 & 0x1f) * 65536; + svga->write_bank = (tvga->tvga_3d8 & 0x1f) * 65536; - if (svga->gdcreg[0xf] & 1) - svga->read_bank = (tvga->tvga_3d9 & 0x1f) * 65536; - else - svga->read_bank = svga->write_bank; + if (svga->gdcreg[0xf] & 1) + svga->read_bank = (tvga->tvga_3d9 & 0x1f) * 65536; + else + svga->read_bank = svga->write_bank; } -void tvga_recalctimings(svga_t *svga) +void +tvga_recalctimings(svga_t *svga) { - tvga_t *tvga = (tvga_t *)svga->p; - int clksel; - int high_res_256 = 0; + tvga_t *tvga = (tvga_t *) svga->p; + int clksel; + int high_res_256 = 0; - if (!svga->rowoffset) svga->rowoffset = 0x100; /*This is the only sensible way I can see this being handled, - given that TVGA8900D has no overflow bits. - Some sort of overflow is required for 320x200x24 and 1024x768x16*/ - if (svga->crtc[0x29] & 0x10) - svga->rowoffset += 0x100; + if (!svga->rowoffset) + svga->rowoffset = 0x100; /*This is the only sensible way I can see this being handled, + given that TVGA8900D has no overflow bits. + Some sort of overflow is required for 320x200x24 and 1024x768x16*/ + if (svga->crtc[0x29] & 0x10) + svga->rowoffset += 0x100; - if (svga->bpp == 24) - svga->hdisp = (svga->crtc[1] + 1) * 8; + if (svga->bpp == 24) + svga->hdisp = (svga->crtc[1] + 1) * 8; - if ((svga->crtc[0x1e] & 0xA0) == 0xA0) svga->ma_latch |= 0x10000; - if ((svga->crtc[0x27] & 0x01) == 0x01) svga->ma_latch |= 0x20000; - if ((svga->crtc[0x27] & 0x02) == 0x02) svga->ma_latch |= 0x40000; + if ((svga->crtc[0x1e] & 0xA0) == 0xA0) + svga->ma_latch |= 0x10000; + if ((svga->crtc[0x27] & 0x01) == 0x01) + svga->ma_latch |= 0x20000; + if ((svga->crtc[0x27] & 0x02) == 0x02) + svga->ma_latch |= 0x40000; - if (tvga->oldctrl2 & 0x10) - { - svga->rowoffset <<= 1; - svga->ma_latch <<= 1; - } + if (tvga->oldctrl2 & 0x10) { + svga->rowoffset <<= 1; + svga->ma_latch <<= 1; + } - if (svga->gdcreg[0xf] & 0x08) - { - svga->htotal *= 2; - svga->hdisp *= 2; - svga->hdisp_time *= 2; - } + if (svga->gdcreg[0xf] & 0x08) { + svga->htotal *= 2; + svga->hdisp *= 2; + svga->hdisp_time *= 2; + } - svga->interlace = (svga->crtc[0x1e] & 4); + svga->interlace = (svga->crtc[0x1e] & 4); + if (svga->interlace) + svga->rowoffset >>= 1; + + if (tvga->card_id == TVGA8900CLD_ID) + clksel = ((svga->miscout >> 2) & 3) | ((tvga->newctrl2 & 0x01) << 2) | ((tvga->oldctrl1 & 0x10) >> 1); + else + clksel = ((svga->miscout >> 2) & 3) | ((tvga->newctrl2 & 0x01) << 2) | ((tvga->newctrl2 & 0x40) >> 3); + + switch (clksel) { + case 0x2: + svga->clock = (cpuclock * (double) (1ull << 32)) / 44900000.0; + break; + case 0x3: + svga->clock = (cpuclock * (double) (1ull << 32)) / 36000000.0; + break; + case 0x4: + svga->clock = (cpuclock * (double) (1ull << 32)) / 57272000.0; + break; + case 0x5: + svga->clock = (cpuclock * (double) (1ull << 32)) / 65000000.0; + break; + case 0x6: + svga->clock = (cpuclock * (double) (1ull << 32)) / 50350000.0; + break; + case 0x7: + svga->clock = (cpuclock * (double) (1ull << 32)) / 40000000.0; + break; + case 0x8: + svga->clock = (cpuclock * (double) (1ull << 32)) / 88000000.0; + break; + case 0x9: + svga->clock = (cpuclock * (double) (1ull << 32)) / 98000000.0; + break; + case 0xa: + svga->clock = (cpuclock * (double) (1ull << 32)) / 118800000.0; + break; + case 0xb: + svga->clock = (cpuclock * (double) (1ull << 32)) / 108000000.0; + break; + case 0xc: + svga->clock = (cpuclock * (double) (1ull << 32)) / 72000000.0; + break; + case 0xd: + svga->clock = (cpuclock * (double) (1ull << 32)) / 77000000.0; + break; + case 0xe: + svga->clock = (cpuclock * (double) (1ull << 32)) / 80000000.0; + break; + case 0xf: + svga->clock = (cpuclock * (double) (1ull << 32)) / 75000000.0; + break; + } + + if (tvga->card_id != TVGA8900CLD_ID) { + /*TVGA9000 doesn't seem to have support for a 'high res' 256 colour mode + (without the VGA pixel doubling). Instead it implements these modes by + doubling the horizontal pixel count and pixel clock. Hence we use a + basic heuristic to detect this*/ if (svga->interlace) - svga->rowoffset >>= 1; + high_res_256 = (svga->htotal * 8) > (svga->vtotal * 4); + else + high_res_256 = (svga->htotal * 8) > (svga->vtotal * 2); + } - if (tvga->card_id == TVGA8900CLD_ID) - clksel = ((svga->miscout >> 2) & 3) | ((tvga->newctrl2 & 0x01) << 2) | ((tvga->oldctrl1 & 0x10) >> 1); - else - clksel = ((svga->miscout >> 2) & 3) | ((tvga->newctrl2 & 0x01) << 2) | ((tvga->newctrl2 & 0x40) >> 3); - - switch (clksel) { - case 0x2: svga->clock = (cpuclock * (double)(1ull << 32)) / 44900000.0; break; - case 0x3: svga->clock = (cpuclock * (double)(1ull << 32)) / 36000000.0; break; - case 0x4: svga->clock = (cpuclock * (double)(1ull << 32)) / 57272000.0; break; - case 0x5: svga->clock = (cpuclock * (double)(1ull << 32)) / 65000000.0; break; - case 0x6: svga->clock = (cpuclock * (double)(1ull << 32)) / 50350000.0; break; - case 0x7: svga->clock = (cpuclock * (double)(1ull << 32)) / 40000000.0; break; - case 0x8: svga->clock = (cpuclock * (double)(1ull << 32)) / 88000000.0; break; - case 0x9: svga->clock = (cpuclock * (double)(1ull << 32)) / 98000000.0; break; - case 0xa: svga->clock = (cpuclock * (double)(1ull << 32)) / 118800000.0; break; - case 0xb: svga->clock = (cpuclock * (double)(1ull << 32)) / 108000000.0; break; - case 0xc: svga->clock = (cpuclock * (double)(1ull << 32)) / 72000000.0; break; - case 0xd: svga->clock = (cpuclock * (double)(1ull << 32)) / 77000000.0; break; - case 0xe: svga->clock = (cpuclock * (double)(1ull << 32)) / 80000000.0; break; - case 0xf: svga->clock = (cpuclock * (double)(1ull << 32)) / 75000000.0; break; - } - - if (tvga->card_id != TVGA8900CLD_ID) { - /*TVGA9000 doesn't seem to have support for a 'high res' 256 colour mode - (without the VGA pixel doubling). Instead it implements these modes by - doubling the horizontal pixel count and pixel clock. Hence we use a - basic heuristic to detect this*/ - if (svga->interlace) - high_res_256 = (svga->htotal * 8) > (svga->vtotal * 4); - else - high_res_256 = (svga->htotal * 8) > (svga->vtotal * 2); - } - - if ((tvga->oldctrl2 & 0x10) || high_res_256) - { - if (high_res_256) - svga->hdisp /= 2; - switch (svga->bpp) - { - case 8: - svga->render = svga_render_8bpp_highres; - break; - case 15: - svga->render = svga_render_15bpp_highres; - svga->hdisp /= 2; - break; - case 16: - svga->render = svga_render_16bpp_highres; - svga->hdisp /= 2; - break; - case 24: - svga->render = svga_render_24bpp_highres; - svga->hdisp /= 3; - break; - } - svga->lowres = 0; + if ((tvga->oldctrl2 & 0x10) || high_res_256) { + if (high_res_256) + svga->hdisp /= 2; + switch (svga->bpp) { + case 8: + svga->render = svga_render_8bpp_highres; + break; + case 15: + svga->render = svga_render_15bpp_highres; + svga->hdisp /= 2; + break; + case 16: + svga->render = svga_render_16bpp_highres; + svga->hdisp /= 2; + break; + case 24: + svga->render = svga_render_24bpp_highres; + svga->hdisp /= 3; + break; } + svga->lowres = 0; + } } - -static void *tvga_init(const device_t *info) +static void * +tvga_init(const device_t *info) { - const char *bios_fn; - tvga_t *tvga = malloc(sizeof(tvga_t)); - memset(tvga, 0, sizeof(tvga_t)); + const char *bios_fn; + tvga_t *tvga = malloc(sizeof(tvga_t)); + memset(tvga, 0, sizeof(tvga_t)); - if (info->local == TVGA9000B_ID) { - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tvga9000); - tvga->vram_size = 512 << 10; - } else { - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tvga8900); - tvga->vram_size = device_get_config_int("memory") << 10; - } + if (info->local == TVGA9000B_ID) { + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tvga9000); + tvga->vram_size = 512 << 10; + } else { + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tvga8900); + tvga->vram_size = device_get_config_int("memory") << 10; + } - tvga->vram_mask = tvga->vram_size - 1; + tvga->vram_mask = tvga->vram_size - 1; - tvga->card_id = info->local; + tvga->card_id = info->local; - switch (info->local) - { - case TVGA8900B_ID: - bios_fn = ROM_TVGA_8900B; - break; - case TVGA8900CLD_ID: - bios_fn = ROM_TVGA_8900CLD; - break; - case TVGA9000B_ID: - bios_fn = ROM_TVGA_9000B; - break; - default: - free(tvga); - return NULL; - } + switch (info->local) { + case TVGA8900B_ID: + bios_fn = ROM_TVGA_8900B; + break; + case TVGA8900CLD_ID: + bios_fn = ROM_TVGA_8900CLD; + break; + case TVGA9000B_ID: + bios_fn = ROM_TVGA_9000B; + break; + default: + free(tvga); + return NULL; + } - rom_init(&tvga->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + rom_init(&tvga->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - svga_init(info, &tvga->svga, tvga, tvga->vram_size, - tvga_recalctimings, - tvga_in, tvga_out, - NULL, - NULL); + svga_init(info, &tvga->svga, tvga, tvga->vram_size, + tvga_recalctimings, + tvga_in, tvga_out, + NULL, + NULL); - if (info->local != TVGA9000B_ID) - tvga->svga.ramdac = device_add(&tkd8001_ramdac_device); + if (info->local != TVGA9000B_ID) + tvga->svga.ramdac = device_add(&tkd8001_ramdac_device); - io_sethandler(0x03c0, 0x0020, tvga_in, NULL, NULL, tvga_out, NULL, NULL, tvga); + io_sethandler(0x03c0, 0x0020, tvga_in, NULL, NULL, tvga_out, NULL, NULL, tvga); - return tvga; + return tvga; } -static int tvga8900b_available(void) +static int +tvga8900b_available(void) { - return rom_present(ROM_TVGA_8900B); + return rom_present(ROM_TVGA_8900B); } -static int tvga8900d_available(void) +static int +tvga8900d_available(void) { - return rom_present(ROM_TVGA_8900CLD); + return rom_present(ROM_TVGA_8900CLD); } -static int tvga9000b_available(void) +static int +tvga9000b_available(void) { - return rom_present(ROM_TVGA_9000B); + return rom_present(ROM_TVGA_9000B); } -void tvga_close(void *p) +void +tvga_close(void *p) { - tvga_t *tvga = (tvga_t *)p; + tvga_t *tvga = (tvga_t *) p; - svga_close(&tvga->svga); + svga_close(&tvga->svga); - free(tvga); + free(tvga); } -void tvga_speed_changed(void *p) +void +tvga_speed_changed(void *p) { - tvga_t *tvga = (tvga_t *)p; + tvga_t *tvga = (tvga_t *) p; - svga_recalctimings(&tvga->svga); + svga_recalctimings(&tvga->svga); } -void tvga_force_redraw(void *p) +void +tvga_force_redraw(void *p) { - tvga_t *tvga = (tvga_t *)p; + tvga_t *tvga = (tvga_t *) p; - tvga->svga.fullchange = changeframecount; + tvga->svga.fullchange = changeframecount; } static const device_config_t tvga_config[] = { -// clang-format off + // clang-format off { .name = "memory", .description = "Memory size", diff --git a/src/video/vid_tvp3026_ramdac.c b/src/video/vid_tvp3026_ramdac.c index 580e96990..cde953b01 100644 --- a/src/video/vid_tvp3026_ramdac.c +++ b/src/video/vid_tvp3026_ramdac.c @@ -28,410 +28,406 @@ #include <86box/video.h> #include <86box/vid_svga.h> - typedef struct { - PALETTE extpal; - uint32_t extpallook[256]; - uint8_t cursor64_data[1024]; - int hwc_y, hwc_x; - uint8_t ind_idx; - uint8_t dcc, dc_init; - uint8_t ccr; - uint8_t true_color; - uint8_t latch_cntl; - uint8_t mcr; - uint8_t ppr; - uint8_t general_cntl; - uint8_t mclk; - uint8_t misc; - uint8_t type; - uint8_t mode; - uint8_t pll_addr; - uint8_t clock_sel; - struct - { - uint8_t m, n, p; - } pix, mem, loop; + PALETTE extpal; + uint32_t extpallook[256]; + uint8_t cursor64_data[1024]; + int hwc_y, hwc_x; + uint8_t ind_idx; + uint8_t dcc, dc_init; + uint8_t ccr; + uint8_t true_color; + uint8_t latch_cntl; + uint8_t mcr; + uint8_t ppr; + uint8_t general_cntl; + uint8_t mclk; + uint8_t misc; + uint8_t type; + uint8_t mode; + uint8_t pll_addr; + uint8_t clock_sel; + struct + { + uint8_t m, n, p; + } pix, mem, loop; } tvp3026_ramdac_t; static void tvp3026_set_bpp(tvp3026_ramdac_t *ramdac, svga_t *svga) { - if ((ramdac->true_color & 0x80) == 0x80) { - if (ramdac->mcr & 0x08) - svga->bpp = 8; - else - svga->bpp = 4; - } else { - switch (ramdac->true_color & 0x0f) { - case 0x01: - case 0x03: - case 0x05: - svga->bpp = 16; - break; - case 0x04: - svga->bpp = 15; - break; - case 0x06: - case 0x07: - if (ramdac->true_color & 0x10) - svga->bpp = 24; - else - svga->bpp = 32; - break; - case 0x0e: - case 0x0f: - svga->bpp = 24; - break; - } - } + if ((ramdac->true_color & 0x80) == 0x80) { + if (ramdac->mcr & 0x08) + svga->bpp = 8; + else + svga->bpp = 4; + } else { + switch (ramdac->true_color & 0x0f) { + case 0x01: + case 0x03: + case 0x05: + svga->bpp = 16; + break; + case 0x04: + svga->bpp = 15; + break; + case 0x06: + case 0x07: + if (ramdac->true_color & 0x10) + svga->bpp = 24; + else + svga->bpp = 32; + break; + case 0x0e: + case 0x0f: + svga->bpp = 24; + break; + } + } svga_recalctimings(svga); } - void tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t *svga) { tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) p; - uint32_t o32; - uint8_t *cd; - uint16_t index; - uint8_t rs = (addr & 0x03); - uint16_t da_mask = 0x03ff; + uint32_t o32; + uint8_t *cd; + uint16_t index; + uint8_t rs = (addr & 0x03); + uint16_t da_mask = 0x03ff; rs |= (!!rs2 << 2); rs |= (!!rs3 << 3); switch (rs) { - case 0x00: /* Palette Write Index Register (RS value = 0000) */ - ramdac->ind_idx = val; - case 0x04: /* Ext Palette Write Index Register (RS value = 0100) */ - case 0x03: - case 0x07: /* Ext Palette Read Index Register (RS value = 0111) */ - svga->dac_pos = 0; - svga->dac_status = addr & 0x03; - svga->dac_addr = val; - if (svga->dac_status) - svga->dac_addr = (svga->dac_addr + 1) & da_mask; - break; - case 0x01: /* Palette Data Register (RS value = 0001) */ - case 0x02: /* Pixel Read Mask Register (RS value = 0010) */ - svga_out(addr, val, svga); - break; - case 0x05: /* Ext Palette Data Register (RS value = 0101) */ - svga->dac_status = 0; - svga->fullchange = changeframecount; - switch (svga->dac_pos) { - case 0: - svga->dac_r = val; - svga->dac_pos++; - break; - case 1: - svga->dac_g = val; - svga->dac_pos++; - break; - case 2: - index = svga->dac_addr & 3; - ramdac->extpal[index].r = svga->dac_r; - ramdac->extpal[index].g = svga->dac_g; - ramdac->extpal[index].b = val; - if (svga->ramdac_type == RAMDAC_8BIT) - ramdac->extpallook[index] = makecol32(ramdac->extpal[index].r, ramdac->extpal[index].g, ramdac->extpal[index].b); - else - ramdac->extpallook[index] = makecol32(video_6to8[ramdac->extpal[index].r & 0x3f], video_6to8[ramdac->extpal[index].g & 0x3f], video_6to8[ramdac->extpal[index].b & 0x3f]); + case 0x00: /* Palette Write Index Register (RS value = 0000) */ + ramdac->ind_idx = val; + case 0x04: /* Ext Palette Write Index Register (RS value = 0100) */ + case 0x03: + case 0x07: /* Ext Palette Read Index Register (RS value = 0111) */ + svga->dac_pos = 0; + svga->dac_status = addr & 0x03; + svga->dac_addr = val; + if (svga->dac_status) + svga->dac_addr = (svga->dac_addr + 1) & da_mask; + break; + case 0x01: /* Palette Data Register (RS value = 0001) */ + case 0x02: /* Pixel Read Mask Register (RS value = 0010) */ + svga_out(addr, val, svga); + break; + case 0x05: /* Ext Palette Data Register (RS value = 0101) */ + svga->dac_status = 0; + svga->fullchange = changeframecount; + switch (svga->dac_pos) { + case 0: + svga->dac_r = val; + svga->dac_pos++; + break; + case 1: + svga->dac_g = val; + svga->dac_pos++; + break; + case 2: + index = svga->dac_addr & 3; + ramdac->extpal[index].r = svga->dac_r; + ramdac->extpal[index].g = svga->dac_g; + ramdac->extpal[index].b = val; + if (svga->ramdac_type == RAMDAC_8BIT) + ramdac->extpallook[index] = makecol32(ramdac->extpal[index].r, ramdac->extpal[index].g, ramdac->extpal[index].b); + else + ramdac->extpallook[index] = makecol32(video_6to8[ramdac->extpal[index].r & 0x3f], video_6to8[ramdac->extpal[index].g & 0x3f], video_6to8[ramdac->extpal[index].b & 0x3f]); - if (svga->ext_overscan && !index) { - o32 = svga->overscan_color; - svga->overscan_color = ramdac->extpallook[0]; - if (o32 != svga->overscan_color) - svga_recalctimings(svga); - } - svga->dac_addr = (svga->dac_addr + 1) & 0xff; - svga->dac_pos = 0; - break; - } - break; - case 0x09: /* Direct Cursor Control (RS value = 1001) */ - ramdac->dcc = val; - if (ramdac->ccr & 0x80) { - svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = 64; - svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; - svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; - svga->dac_hwcursor.ena = !!(val & 0x03); - ramdac->mode = val & 0x03; - } - break; - case 0x0a: /* Indexed Data (RS value = 1010) */ - switch (ramdac->ind_idx) { - case 0x06: /* Indirect Cursor Control */ - ramdac->ccr = val; + if (svga->ext_overscan && !index) { + o32 = svga->overscan_color; + svga->overscan_color = ramdac->extpallook[0]; + if (o32 != svga->overscan_color) + svga_recalctimings(svga); + } + svga->dac_addr = (svga->dac_addr + 1) & 0xff; + svga->dac_pos = 0; + break; + } + break; + case 0x09: /* Direct Cursor Control (RS value = 1001) */ + ramdac->dcc = val; + if (ramdac->ccr & 0x80) { svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = 64; - svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; - svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; - svga->dac_hwcursor.ena = !!(val & 0x03); - ramdac->mode = val & 0x03; - break; - case 0x0f: /* Latch Control */ - ramdac->latch_cntl = val; - break; - case 0x18: /* True Color Control */ - ramdac->true_color = val; - tvp3026_set_bpp(ramdac, svga); - break; - case 0x19: /* Multiplex Control */ - ramdac->mcr = val; - tvp3026_set_bpp(ramdac, svga); - break; - case 0x1a: /* Clock Selection */ - ramdac->clock_sel = val; - break; - case 0x1c: /* Palette-Page Register */ - ramdac->ppr = val; - break; - case 0x1d: /* General Control Register */ - ramdac->general_cntl = val; - break; - case 0x1e: /* Miscellaneous Control */ - ramdac->misc = val; - svga->ramdac_type = (val & 0x08) ? RAMDAC_8BIT : RAMDAC_6BIT; - break; - case 0x2c: /* PLL Address */ - ramdac->pll_addr = val; - break; - case 0x2d: /* Pixel clock PLL data */ - switch (ramdac->pll_addr & 3) { - case 0: - ramdac->pix.n = val; - break; - case 1: - ramdac->pix.m = val; - break; - case 2: - ramdac->pix.p = val; - break; - } - ramdac->pll_addr = ((ramdac->pll_addr + 1) & 3) | (ramdac->pll_addr & 0xfc); - break; - case 0x2e: /* Memory Clock PLL Data */ - switch ((ramdac->pll_addr >> 2) & 3) { - case 0: - ramdac->mem.n = val; - break; - case 1: - ramdac->mem.m = val; - break; - case 2: - ramdac->mem.p = val; - break; - } - ramdac->pll_addr = ((ramdac->pll_addr + 4) & 0x0c) | (ramdac->pll_addr & 0xf3); - break; - case 0x2f: /* Loop Clock PLL Data */ - switch ((ramdac->pll_addr >> 4) & 3) { - case 0: - ramdac->loop.n = val; - break; - case 1: - ramdac->loop.m = val; - break; - case 2: - ramdac->loop.p = val; - break; - } - ramdac->pll_addr = ((ramdac->pll_addr + 0x10) & 0x30) | (ramdac->pll_addr & 0xcf); - break; - case 0x39: /* MCLK/Loop Clock Control */ - ramdac->mclk = val; - break; - - } - break; - case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */ - index = svga->dac_addr & da_mask; - cd = (uint8_t *) ramdac->cursor64_data; - cd[index] = val; - svga->dac_addr = (svga->dac_addr + 1) & da_mask; - break; - case 0x0c: /* Cursor X Low Register (RS value = 1100) */ - ramdac->hwc_x = (ramdac->hwc_x & 0x0f00) | val; - svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; - break; - case 0x0d: /* Cursor X High Register (RS value = 1101) */ - ramdac->hwc_x = (ramdac->hwc_x & 0x00ff) | ((val & 0x0f) << 8); - svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; - break; - case 0x0e: /* Cursor Y Low Register (RS value = 1110) */ - ramdac->hwc_y = (ramdac->hwc_y & 0x0f00) | val; - svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; - break; - case 0x0f: /* Cursor Y High Register (RS value = 1111) */ - ramdac->hwc_y = (ramdac->hwc_y & 0x00ff) | ((val & 0x0f) << 8); - svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; - break; + svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; + svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; + svga->dac_hwcursor.ena = !!(val & 0x03); + ramdac->mode = val & 0x03; + } + break; + case 0x0a: /* Indexed Data (RS value = 1010) */ + switch (ramdac->ind_idx) { + case 0x06: /* Indirect Cursor Control */ + ramdac->ccr = val; + svga->dac_hwcursor.cur_xsize = svga->dac_hwcursor.cur_ysize = 64; + svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; + svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; + svga->dac_hwcursor.ena = !!(val & 0x03); + ramdac->mode = val & 0x03; + break; + case 0x0f: /* Latch Control */ + ramdac->latch_cntl = val; + break; + case 0x18: /* True Color Control */ + ramdac->true_color = val; + tvp3026_set_bpp(ramdac, svga); + break; + case 0x19: /* Multiplex Control */ + ramdac->mcr = val; + tvp3026_set_bpp(ramdac, svga); + break; + case 0x1a: /* Clock Selection */ + ramdac->clock_sel = val; + break; + case 0x1c: /* Palette-Page Register */ + ramdac->ppr = val; + break; + case 0x1d: /* General Control Register */ + ramdac->general_cntl = val; + break; + case 0x1e: /* Miscellaneous Control */ + ramdac->misc = val; + svga->ramdac_type = (val & 0x08) ? RAMDAC_8BIT : RAMDAC_6BIT; + break; + case 0x2c: /* PLL Address */ + ramdac->pll_addr = val; + break; + case 0x2d: /* Pixel clock PLL data */ + switch (ramdac->pll_addr & 3) { + case 0: + ramdac->pix.n = val; + break; + case 1: + ramdac->pix.m = val; + break; + case 2: + ramdac->pix.p = val; + break; + } + ramdac->pll_addr = ((ramdac->pll_addr + 1) & 3) | (ramdac->pll_addr & 0xfc); + break; + case 0x2e: /* Memory Clock PLL Data */ + switch ((ramdac->pll_addr >> 2) & 3) { + case 0: + ramdac->mem.n = val; + break; + case 1: + ramdac->mem.m = val; + break; + case 2: + ramdac->mem.p = val; + break; + } + ramdac->pll_addr = ((ramdac->pll_addr + 4) & 0x0c) | (ramdac->pll_addr & 0xf3); + break; + case 0x2f: /* Loop Clock PLL Data */ + switch ((ramdac->pll_addr >> 4) & 3) { + case 0: + ramdac->loop.n = val; + break; + case 1: + ramdac->loop.m = val; + break; + case 2: + ramdac->loop.p = val; + break; + } + ramdac->pll_addr = ((ramdac->pll_addr + 0x10) & 0x30) | (ramdac->pll_addr & 0xcf); + break; + case 0x39: /* MCLK/Loop Clock Control */ + ramdac->mclk = val; + break; + } + break; + case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */ + index = svga->dac_addr & da_mask; + cd = (uint8_t *) ramdac->cursor64_data; + cd[index] = val; + svga->dac_addr = (svga->dac_addr + 1) & da_mask; + break; + case 0x0c: /* Cursor X Low Register (RS value = 1100) */ + ramdac->hwc_x = (ramdac->hwc_x & 0x0f00) | val; + svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; + break; + case 0x0d: /* Cursor X High Register (RS value = 1101) */ + ramdac->hwc_x = (ramdac->hwc_x & 0x00ff) | ((val & 0x0f) << 8); + svga->dac_hwcursor.x = ramdac->hwc_x - svga->dac_hwcursor.cur_xsize; + break; + case 0x0e: /* Cursor Y Low Register (RS value = 1110) */ + ramdac->hwc_y = (ramdac->hwc_y & 0x0f00) | val; + svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; + break; + case 0x0f: /* Cursor Y High Register (RS value = 1111) */ + ramdac->hwc_y = (ramdac->hwc_y & 0x00ff) | ((val & 0x0f) << 8); + svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; + break; } return; } - uint8_t tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga) { tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) p; - uint8_t temp = 0xff; - uint8_t *cd; - uint16_t index; - uint8_t rs = (addr & 0x03); - uint16_t da_mask = 0x03ff; + uint8_t temp = 0xff; + uint8_t *cd; + uint16_t index; + uint8_t rs = (addr & 0x03); + uint16_t da_mask = 0x03ff; rs |= (!!rs2 << 2); rs |= (!!rs3 << 3); switch (rs) { - case 0x00: /* Palette Write Index Register (RS value = 0000) */ - case 0x01: /* Palette Data Register (RS value = 0001) */ - case 0x02: /* Pixel Read Mask Register (RS value = 0010) */ - case 0x04: /* Ext Palette Write Index Register (RS value = 0100) */ - temp = svga_in(addr, svga); - break; - case 0x03: /* Palette Read Index Register (RS value = 0011) */ - case 0x07: /* Ext Palette Read Index Register (RS value = 0111) */ - temp = svga->dac_addr & 0xff; - break; - case 0x05: /* Ext Palette Data Register (RS value = 0101) */ - index = (svga->dac_addr - 1) & 3; - svga->dac_status = 3; - switch (svga->dac_pos) { - case 0: - svga->dac_pos++; - if (svga->ramdac_type == RAMDAC_8BIT) - temp = ramdac->extpal[index].r; - else - temp = ramdac->extpal[index].r & 0x3f; - break; - case 1: - svga->dac_pos++; - if (svga->ramdac_type == RAMDAC_8BIT) - temp = ramdac->extpal[index].g; - else - temp = ramdac->extpal[index].g & 0x3f; - break; - case 2: - svga->dac_pos=0; - svga->dac_addr = svga->dac_addr + 1; - if (svga->ramdac_type == RAMDAC_8BIT) - temp = ramdac->extpal[index].b; - else - temp = ramdac->extpal[index].b & 0x3f; - break; - } - break; - case 0x09: /* Direct Cursor Control (RS value = 1001) */ - temp = ramdac->dcc; - break; - case 0x0a: /* Indexed Data (RS value = 1010) */ - switch (ramdac->ind_idx) { - case 0x01: /* Silicon Revision */ - temp = 0x00; - break; - case 0x06: /* Indirect Cursor Control */ - temp = ramdac->ccr; - break; - case 0x0f: /* Latch Control */ - temp = ramdac->latch_cntl; - break; - case 0x18: /* True Color Control */ - temp = ramdac->true_color; - break; - case 0x19: /* Multiplex Control */ - temp = ramdac->mcr; - break; - case 0x1a: /* Clock Selection */ - temp = ramdac->clock_sel; - break; - case 0x1c: /* Palette-Page Register */ - temp = ramdac->ppr; - break; - case 0x1d: /* General Control Register */ - temp = ramdac->general_cntl; - break; - case 0x1e: /* Miscellaneous Control */ - temp = ramdac->misc; - break; - case 0x2c: /* PLL Address */ - temp = ramdac->pll_addr; - break; - case 0x2d: /* Pixel clock PLL data */ - switch (ramdac->pll_addr & 3) { - case 0: - temp = ramdac->pix.n; - break; - case 1: - temp = ramdac->pix.m; - break; - case 2: - temp = ramdac->pix.p; - break; - case 3: - temp = 0x40; /*PLL locked to frequency*/ - break; - } - break; - case 0x2e: /* Memory Clock PLL Data */ - switch ((ramdac->pll_addr >> 2) & 3) { - case 0: - temp = ramdac->mem.n; - break; - case 1: - temp = ramdac->mem.m; - break; - case 2: - temp = ramdac->mem.p; - break; - case 3: - temp = 0x40; /*PLL locked to frequency*/ - break; - } - break; - case 0x2f: /* Loop Clock PLL Data */ - switch ((ramdac->pll_addr >> 4) & 3) { - case 0: - temp = ramdac->loop.n; - break; - case 1: - temp = ramdac->loop.m; - break; - case 2: - temp = ramdac->loop.p; - break; - } - break; - case 0x39: /* MCLK/Loop Clock Control */ - temp = ramdac->mclk; - break; - case 0x3f: /* ID */ - temp = 0x26; - break; - } - break; - case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */ - index = (svga->dac_addr - 1) & da_mask; - cd = (uint8_t *) ramdac->cursor64_data; - temp = cd[index]; + case 0x00: /* Palette Write Index Register (RS value = 0000) */ + case 0x01: /* Palette Data Register (RS value = 0001) */ + case 0x02: /* Pixel Read Mask Register (RS value = 0010) */ + case 0x04: /* Ext Palette Write Index Register (RS value = 0100) */ + temp = svga_in(addr, svga); + break; + case 0x03: /* Palette Read Index Register (RS value = 0011) */ + case 0x07: /* Ext Palette Read Index Register (RS value = 0111) */ + temp = svga->dac_addr & 0xff; + break; + case 0x05: /* Ext Palette Data Register (RS value = 0101) */ + index = (svga->dac_addr - 1) & 3; + svga->dac_status = 3; + switch (svga->dac_pos) { + case 0: + svga->dac_pos++; + if (svga->ramdac_type == RAMDAC_8BIT) + temp = ramdac->extpal[index].r; + else + temp = ramdac->extpal[index].r & 0x3f; + break; + case 1: + svga->dac_pos++; + if (svga->ramdac_type == RAMDAC_8BIT) + temp = ramdac->extpal[index].g; + else + temp = ramdac->extpal[index].g & 0x3f; + break; + case 2: + svga->dac_pos = 0; + svga->dac_addr = svga->dac_addr + 1; + if (svga->ramdac_type == RAMDAC_8BIT) + temp = ramdac->extpal[index].b; + else + temp = ramdac->extpal[index].b & 0x3f; + break; + } + break; + case 0x09: /* Direct Cursor Control (RS value = 1001) */ + temp = ramdac->dcc; + break; + case 0x0a: /* Indexed Data (RS value = 1010) */ + switch (ramdac->ind_idx) { + case 0x01: /* Silicon Revision */ + temp = 0x00; + break; + case 0x06: /* Indirect Cursor Control */ + temp = ramdac->ccr; + break; + case 0x0f: /* Latch Control */ + temp = ramdac->latch_cntl; + break; + case 0x18: /* True Color Control */ + temp = ramdac->true_color; + break; + case 0x19: /* Multiplex Control */ + temp = ramdac->mcr; + break; + case 0x1a: /* Clock Selection */ + temp = ramdac->clock_sel; + break; + case 0x1c: /* Palette-Page Register */ + temp = ramdac->ppr; + break; + case 0x1d: /* General Control Register */ + temp = ramdac->general_cntl; + break; + case 0x1e: /* Miscellaneous Control */ + temp = ramdac->misc; + break; + case 0x2c: /* PLL Address */ + temp = ramdac->pll_addr; + break; + case 0x2d: /* Pixel clock PLL data */ + switch (ramdac->pll_addr & 3) { + case 0: + temp = ramdac->pix.n; + break; + case 1: + temp = ramdac->pix.m; + break; + case 2: + temp = ramdac->pix.p; + break; + case 3: + temp = 0x40; /*PLL locked to frequency*/ + break; + } + break; + case 0x2e: /* Memory Clock PLL Data */ + switch ((ramdac->pll_addr >> 2) & 3) { + case 0: + temp = ramdac->mem.n; + break; + case 1: + temp = ramdac->mem.m; + break; + case 2: + temp = ramdac->mem.p; + break; + case 3: + temp = 0x40; /*PLL locked to frequency*/ + break; + } + break; + case 0x2f: /* Loop Clock PLL Data */ + switch ((ramdac->pll_addr >> 4) & 3) { + case 0: + temp = ramdac->loop.n; + break; + case 1: + temp = ramdac->loop.m; + break; + case 2: + temp = ramdac->loop.p; + break; + } + break; + case 0x39: /* MCLK/Loop Clock Control */ + temp = ramdac->mclk; + break; + case 0x3f: /* ID */ + temp = 0x26; + break; + } + break; + case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */ + index = (svga->dac_addr - 1) & da_mask; + cd = (uint8_t *) ramdac->cursor64_data; + temp = cd[index]; - svga->dac_addr = (svga->dac_addr + 1) & da_mask; - break; - case 0x0c: /* Cursor X Low Register (RS value = 1100) */ - temp = ramdac->hwc_x & 0xff; - break; - case 0x0d: /* Cursor X High Register (RS value = 1101) */ - temp = (ramdac->hwc_x >> 8) & 0xff; - break; - case 0x0e: /* Cursor Y Low Register (RS value = 1110) */ - temp = ramdac->hwc_y & 0xff; - break; - case 0x0f: /* Cursor Y High Register (RS value = 1111) */ - temp = (ramdac->hwc_y >> 8) & 0xff; - break; + svga->dac_addr = (svga->dac_addr + 1) & da_mask; + break; + case 0x0c: /* Cursor X Low Register (RS value = 1100) */ + temp = ramdac->hwc_x & 0xff; + break; + case 0x0d: /* Cursor X High Register (RS value = 1101) */ + temp = (ramdac->hwc_x >> 8) & 0xff; + break; + case 0x0e: /* Cursor Y Low Register (RS value = 1110) */ + temp = ramdac->hwc_y & 0xff; + break; + case 0x0f: /* Cursor Y High Register (RS value = 1111) */ + temp = (ramdac->hwc_y >> 8) & 0xff; + break; } return temp; @@ -445,16 +441,15 @@ tvp3026_recalctimings(void *p, svga_t *svga) svga->interlace = (ramdac->ccr & 0x40); } - void tvp3026_hwcursor_draw(svga_t *svga, int displine) { - int x, xx, comb, b0, b1; - uint16_t dat[2]; - int offset = svga->dac_hwcursor_latch.x + svga->dac_hwcursor_latch.xoff; - int pitch, bppl, mode, x_pos, y_pos; - uint32_t clr1, clr2, clr3, *p; - uint8_t *cd; + int x, xx, comb, b0, b1; + uint16_t dat[2]; + int offset = svga->dac_hwcursor_latch.x + svga->dac_hwcursor_latch.xoff; + int pitch, bppl, mode, x_pos, y_pos; + uint32_t clr1, clr2, clr3, *p; + uint8_t *cd; tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) svga->ramdac; clr1 = ramdac->extpallook[1]; @@ -464,101 +459,98 @@ tvp3026_hwcursor_draw(svga_t *svga, int displine) /* The planes come in two parts, and each plane is 1bpp, so a 32x32 cursor has 4 bytes per line, and a 64x64 cursor has 8 bytes per line. */ - pitch = (svga->dac_hwcursor_latch.cur_xsize >> 3); /* Bytes per line. */ + pitch = (svga->dac_hwcursor_latch.cur_xsize >> 3); /* Bytes per line. */ /* A 32x32 cursor has 128 bytes per line, and a 64x64 cursor has 512 bytes per line. */ - bppl = (pitch * svga->dac_hwcursor_latch.cur_ysize); /* Bytes per plane. */ + bppl = (pitch * svga->dac_hwcursor_latch.cur_ysize); /* Bytes per plane. */ mode = ramdac->mode; if (svga->interlace && svga->dac_hwcursor_oddeven) - svga->dac_hwcursor_latch.addr += pitch; + svga->dac_hwcursor_latch.addr += pitch; - cd = (uint8_t *) ramdac->cursor64_data; + cd = (uint8_t *) ramdac->cursor64_data; for (x = 0; x < svga->dac_hwcursor_latch.cur_xsize; x += 16) { - dat[0] = (cd[svga->dac_hwcursor_latch.addr] << 8) | - cd[svga->dac_hwcursor_latch.addr + 1]; - dat[1] = (cd[svga->dac_hwcursor_latch.addr + bppl] << 8) | - cd[svga->dac_hwcursor_latch.addr + bppl + 1]; + dat[0] = (cd[svga->dac_hwcursor_latch.addr] << 8) | cd[svga->dac_hwcursor_latch.addr + 1]; + dat[1] = (cd[svga->dac_hwcursor_latch.addr + bppl] << 8) | cd[svga->dac_hwcursor_latch.addr + bppl + 1]; - for (xx = 0; xx < 16; xx++) { - b0 = (dat[0] >> (15 - xx)) & 1; - b1 = (dat[1] >> (15 - xx)) & 1; - comb = (b0 | (b1 << 1)); + for (xx = 0; xx < 16; xx++) { + b0 = (dat[0] >> (15 - xx)) & 1; + b1 = (dat[1] >> (15 - xx)) & 1; + comb = (b0 | (b1 << 1)); - y_pos = displine; - x_pos = offset + svga->x_add; - p = buffer32->line[y_pos]; + y_pos = displine; + x_pos = offset + svga->x_add; + p = buffer32->line[y_pos]; - if (offset >= svga->dac_hwcursor_latch.x) { - switch (mode) { - case 1: /* Three Color */ - switch (comb) { - case 1: - p[x_pos] = clr1; - break; - case 2: - p[x_pos] = clr2; - break; - case 3: - p[x_pos] = clr3; - break; - } - break; - case 2: /* XGA */ - switch (comb) { - case 0: - p[x_pos] = clr1; - break; - case 1: - p[x_pos] = clr2; - break; - case 3: - p[x_pos] ^= 0xffffff; - break; - } - break; - case 3: /* X-Windows */ - switch (comb) { - case 2: - p[x_pos] = clr1; - break; - case 3: - p[x_pos] = clr2; - break; - } - break; - } - } - offset++; - } - svga->dac_hwcursor_latch.addr += 2; + if (offset >= svga->dac_hwcursor_latch.x) { + switch (mode) { + case 1: /* Three Color */ + switch (comb) { + case 1: + p[x_pos] = clr1; + break; + case 2: + p[x_pos] = clr2; + break; + case 3: + p[x_pos] = clr3; + break; + } + break; + case 2: /* XGA */ + switch (comb) { + case 0: + p[x_pos] = clr1; + break; + case 1: + p[x_pos] = clr2; + break; + case 3: + p[x_pos] ^= 0xffffff; + break; + } + break; + case 3: /* X-Windows */ + switch (comb) { + case 2: + p[x_pos] = clr1; + break; + case 3: + p[x_pos] = clr2; + break; + } + break; + } + } + offset++; + } + svga->dac_hwcursor_latch.addr += 2; } if (svga->interlace && !svga->dac_hwcursor_oddeven) - svga->dac_hwcursor_latch.addr += pitch; + svga->dac_hwcursor_latch.addr += pitch; } - float tvp3026_getclock(int clock, void *p) { - tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) p; - int n, m, pl; - float f_vco, f_pll; + tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) p; + int n, m, pl; + float f_vco, f_pll; if (clock == 0) - return 25175000.0; + return 25175000.0; if (clock == 1) - return 28322000.0; + return 28322000.0; -/*Fvco = 8 x Fref x (65 - M) / (65 - N)*/ -/*Fpll = Fvco / 2^P*/ - n = ramdac->pix.n & 0x3f; - m = ramdac->pix.m & 0x3f; - pl = ramdac->pix.p & 0x03; - f_vco = 8.0 * 14318184 * (float)(65 - m) / (float)(65 - n); - f_pll = f_vco / (float)(1 << pl); + /*Fvco = 8 x Fref x (65 - M) / (65 - N)*/ + /*Fpll = Fvco / 2^P*/ + n = ramdac->pix.n & 0x3f; + m = ramdac->pix.m & 0x3f; + pl = ramdac->pix.p & 0x03; + f_vco = 8.0 * 14318184 * (float) (65 - m) / (float) (65 - n); + f_pll = f_vco / (float) (1 << pl); return f_pll; } @@ -571,35 +563,34 @@ tvp3026_ramdac_init(const device_t *info) ramdac->type = info->local; - ramdac->latch_cntl = 0x06; - ramdac->true_color = 0x80; - ramdac->mcr = 0x98; - ramdac->clock_sel = 0x07; - ramdac->mclk = 0x18; + ramdac->latch_cntl = 0x06; + ramdac->true_color = 0x80; + ramdac->mcr = 0x98; + ramdac->clock_sel = 0x07; + ramdac->mclk = 0x18; return ramdac; } - static void tvp3026_ramdac_close(void *priv) { tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) priv; if (ramdac) - free(ramdac); + free(ramdac); } const device_t tvp3026_ramdac_device = { - .name = "TI TVP3026 RAMDAC", + .name = "TI TVP3026 RAMDAC", .internal_name = "tvp3026_ramdac", - .flags = 0, - .local = 0, - .init = tvp3026_ramdac_init, - .close = tvp3026_ramdac_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = tvp3026_ramdac_init, + .close = tvp3026_ramdac_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_vga.c b/src/video/vid_vga.c index 6dd81416f..e581f237c 100644 --- a/src/video/vid_vga.c +++ b/src/video/vid_vga.c @@ -31,194 +31,195 @@ #include <86box/vid_svga.h> #include <86box/vid_vga.h> +static video_timings_t timing_ps1_svga_isa = { .type = VIDEO_ISA, .write_b = 6, .write_w = 8, .write_l = 16, .read_b = 6, .read_w = 8, .read_l = 16 }; +static video_timings_t timing_ps1_svga_mca = { .type = VIDEO_MCA, .write_b = 6, .write_w = 8, .write_l = 16, .read_b = 6, .read_w = 8, .read_l = 16 }; -static video_timings_t timing_ps1_svga_isa = {VIDEO_ISA, 6, 8, 16, 6, 8, 16}; -static video_timings_t timing_ps1_svga_mca = {VIDEO_MCA, 6, 8, 16, 6, 8, 16}; - -void vga_out(uint16_t addr, uint8_t val, void *p) +void +vga_out(uint16_t addr, uint8_t val, void *p) { - vga_t *vga = (vga_t *)p; - svga_t *svga = &vga->svga; - uint8_t old; + vga_t *vga = (vga_t *) p; + svga_t *svga = &vga->svga; + uint8_t old; - if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x3D4: - svga->crtcreg = val & 0x3f; + switch (addr) { + case 0x3D4: + svga->crtcreg = val & 0x3f; + return; + case 0x3D5: + if (svga->crtcreg & 0x20) return; - case 0x3D5: - if (svga->crtcreg & 0x20) - return; - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - old = svga->crtc[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; - if (old != val) - { - if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) - { - if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - } + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) + return; + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; + if (old != val) { + if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } } - break; - } - svga_out(addr, val, svga); + } + break; + } + svga_out(addr, val, svga); } -uint8_t vga_in(uint16_t addr, void *p) +uint8_t +vga_in(uint16_t addr, void *p) { - vga_t *vga = (vga_t *)p; - svga_t *svga = &vga->svga; - uint8_t temp; + vga_t *vga = (vga_t *) p; + svga_t *svga = &vga->svga; + uint8_t temp; - if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x3D4: - temp = svga->crtcreg; - break; - case 0x3D5: - if (svga->crtcreg & 0x20) - temp = 0xff; - else - temp = svga->crtc[svga->crtcreg]; - break; - default: - temp = svga_in(addr, svga); - break; - } - return temp; + switch (addr) { + case 0x3D4: + temp = svga->crtcreg; + break; + case 0x3D5: + if (svga->crtcreg & 0x20) + temp = 0xff; + else + temp = svga->crtc[svga->crtcreg]; + break; + default: + temp = svga_in(addr, svga); + break; + } + return temp; } - -static void *vga_init(const device_t *info) +static void * +vga_init(const device_t *info) { - vga_t *vga = malloc(sizeof(vga_t)); - memset(vga, 0, sizeof(vga_t)); + vga_t *vga = malloc(sizeof(vga_t)); + memset(vga, 0, sizeof(vga_t)); - rom_init(&vga->bios_rom, "roms/video/vga/ibm_vga.bin", 0xc0000, 0x8000, 0x7fff, 0x2000, MEM_MAPPING_EXTERNAL); + rom_init(&vga->bios_rom, "roms/video/vga/ibm_vga.bin", 0xc0000, 0x8000, 0x7fff, 0x2000, MEM_MAPPING_EXTERNAL); - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_vga); + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_vga); - svga_init(info, &vga->svga, vga, 1 << 18, /*256kb*/ - NULL, - vga_in, vga_out, - NULL, - NULL); + svga_init(info, &vga->svga, vga, 1 << 18, /*256kb*/ + NULL, + vga_in, vga_out, + NULL, + NULL); - io_sethandler(0x03c0, 0x0020, vga_in, NULL, NULL, vga_out, NULL, NULL, vga); + io_sethandler(0x03c0, 0x0020, vga_in, NULL, NULL, vga_out, NULL, NULL, vga); - vga->svga.bpp = 8; - vga->svga.miscout = 1; + vga->svga.bpp = 8; + vga->svga.miscout = 1; - return vga; + return vga; } - /*PS/1 uses a standard VGA controller, but with no option ROM*/ -void *ps1vga_init(const device_t *info) +void * +ps1vga_init(const device_t *info) { - vga_t *vga = malloc(sizeof(vga_t)); - memset(vga, 0, sizeof(vga_t)); + vga_t *vga = malloc(sizeof(vga_t)); + memset(vga, 0, sizeof(vga_t)); - if (info->flags & DEVICE_MCA) - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_ps1_svga_mca); - else - video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_ps1_svga_isa); + if (info->flags & DEVICE_MCA) + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_ps1_svga_mca); + else + video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_ps1_svga_isa); - svga_init(info, &vga->svga, vga, 1 << 18, /*256kb*/ - NULL, - vga_in, vga_out, - NULL, - NULL); + svga_init(info, &vga->svga, vga, 1 << 18, /*256kb*/ + NULL, + vga_in, vga_out, + NULL, + NULL); - io_sethandler(0x03c0, 0x0020, vga_in, NULL, NULL, vga_out, NULL, NULL, vga); + io_sethandler(0x03c0, 0x0020, vga_in, NULL, NULL, vga_out, NULL, NULL, vga); - vga->svga.bpp = 8; - vga->svga.miscout = 1; + vga->svga.bpp = 8; + vga->svga.miscout = 1; - return vga; + return vga; } -static int vga_available(void) +static int +vga_available(void) { - return rom_present("roms/video/vga/ibm_vga.bin"); + return rom_present("roms/video/vga/ibm_vga.bin"); } -void vga_close(void *p) +void +vga_close(void *p) { - vga_t *vga = (vga_t *)p; + vga_t *vga = (vga_t *) p; - svga_close(&vga->svga); + svga_close(&vga->svga); - free(vga); + free(vga); } -void vga_speed_changed(void *p) +void +vga_speed_changed(void *p) { - vga_t *vga = (vga_t *)p; + vga_t *vga = (vga_t *) p; - svga_recalctimings(&vga->svga); + svga_recalctimings(&vga->svga); } -void vga_force_redraw(void *p) +void +vga_force_redraw(void *p) { - vga_t *vga = (vga_t *)p; + vga_t *vga = (vga_t *) p; - vga->svga.fullchange = changeframecount; + vga->svga.fullchange = changeframecount; } const device_t vga_device = { - .name = "VGA", + .name = "VGA", .internal_name = "vga", - .flags = DEVICE_ISA, - .local = 0, - .init = vga_init, - .close = vga_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = vga_init, + .close = vga_close, + .reset = NULL, { .available = vga_available }, .speed_changed = vga_speed_changed, - .force_redraw = vga_force_redraw, - .config = NULL + .force_redraw = vga_force_redraw, + .config = NULL }; const device_t ps1vga_device = { - .name = "PS/1 VGA", + .name = "PS/1 VGA", .internal_name = "ps1vga", - .flags = DEVICE_ISA, - .local = 0, - .init = ps1vga_init, - .close = vga_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = ps1vga_init, + .close = vga_close, + .reset = NULL, { .available = vga_available }, .speed_changed = vga_speed_changed, - .force_redraw = vga_force_redraw, - .config = NULL + .force_redraw = vga_force_redraw, + .config = NULL }; const device_t ps1vga_mca_device = { - .name = "PS/1 VGA", + .name = "PS/1 VGA", .internal_name = "ps1vga_mca", - .flags = DEVICE_MCA, - .local = 0, - .init = ps1vga_init, - .close = vga_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = 0, + .init = ps1vga_init, + .close = vga_close, + .reset = NULL, { .available = vga_available }, .speed_changed = vga_speed_changed, - .force_redraw = vga_force_redraw, - .config = NULL + .force_redraw = vga_force_redraw, + .config = NULL }; diff --git a/src/video/vid_voodoo.c b/src/video/vid_voodoo.c index df3d59076..2838d5f93 100644 --- a/src/video/vid_voodoo.c +++ b/src/video/vid_voodoo.c @@ -53,1255 +53,1222 @@ int tris = 0; #ifdef ENABLE_VOODOO_LOG int voodoo_do_log = ENABLE_VOODOO_LOG; - static void voodoo_log(const char *fmt, ...) { va_list ap; if (voodoo_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define voodoo_log(fmt, ...) +# define voodoo_log(fmt, ...) #endif - -void voodoo_recalc(voodoo_t *voodoo) +void +voodoo_recalc(voodoo_t *voodoo) { - uint32_t buffer_offset = ((voodoo->fbiInit2 >> 11) & 511) * 4096; + uint32_t buffer_offset = ((voodoo->fbiInit2 >> 11) & 511) * 4096; - if (voodoo->type >= VOODOO_BANSHEE) - return; + if (voodoo->type >= VOODOO_BANSHEE) + return; - voodoo->params.front_offset = voodoo->disp_buffer*buffer_offset; - voodoo->back_offset = voodoo->draw_buffer*buffer_offset; + voodoo->params.front_offset = voodoo->disp_buffer * buffer_offset; + voodoo->back_offset = voodoo->draw_buffer * buffer_offset; - voodoo->buffer_cutoff = TRIPLE_BUFFER ? (buffer_offset * 4) : (buffer_offset * 3); - if (TRIPLE_BUFFER) - voodoo->params.aux_offset = buffer_offset * 3; - else - voodoo->params.aux_offset = buffer_offset * 2; + voodoo->buffer_cutoff = TRIPLE_BUFFER ? (buffer_offset * 4) : (buffer_offset * 3); + if (TRIPLE_BUFFER) + voodoo->params.aux_offset = buffer_offset * 3; + else + voodoo->params.aux_offset = buffer_offset * 2; - switch (voodoo->lfbMode & LFB_WRITE_MASK) - { - case LFB_WRITE_FRONT: - voodoo->fb_write_offset = voodoo->params.front_offset; - voodoo->fb_write_buffer = voodoo->disp_buffer; - break; - case LFB_WRITE_BACK: - voodoo->fb_write_offset = voodoo->back_offset; - voodoo->fb_write_buffer = voodoo->draw_buffer; - break; + switch (voodoo->lfbMode & LFB_WRITE_MASK) { + case LFB_WRITE_FRONT: + voodoo->fb_write_offset = voodoo->params.front_offset; + voodoo->fb_write_buffer = voodoo->disp_buffer; + break; + case LFB_WRITE_BACK: + voodoo->fb_write_offset = voodoo->back_offset; + voodoo->fb_write_buffer = voodoo->draw_buffer; + break; - default: - /*BreakNeck sets invalid LFB write buffer select*/ - voodoo->fb_write_offset = voodoo->params.front_offset; - break; - } + default: + /*BreakNeck sets invalid LFB write buffer select*/ + voodoo->fb_write_offset = voodoo->params.front_offset; + break; + } - switch (voodoo->lfbMode & LFB_READ_MASK) - { - case LFB_READ_FRONT: - voodoo->fb_read_offset = voodoo->params.front_offset; - break; - case LFB_READ_BACK: - voodoo->fb_read_offset = voodoo->back_offset; - break; - case LFB_READ_AUX: - voodoo->fb_read_offset = voodoo->params.aux_offset; - break; + switch (voodoo->lfbMode & LFB_READ_MASK) { + case LFB_READ_FRONT: + voodoo->fb_read_offset = voodoo->params.front_offset; + break; + case LFB_READ_BACK: + voodoo->fb_read_offset = voodoo->back_offset; + break; + case LFB_READ_AUX: + voodoo->fb_read_offset = voodoo->params.aux_offset; + break; - default: - fatal("voodoo_recalc : unknown lfb source\n"); - } + default: + fatal("voodoo_recalc : unknown lfb source\n"); + } - switch (voodoo->params.fbzMode & FBZ_DRAW_MASK) - { - case FBZ_DRAW_FRONT: - voodoo->params.draw_offset = voodoo->params.front_offset; - voodoo->fb_draw_buffer = voodoo->disp_buffer; - break; - case FBZ_DRAW_BACK: - voodoo->params.draw_offset = voodoo->back_offset; - voodoo->fb_draw_buffer = voodoo->draw_buffer; - break; + switch (voodoo->params.fbzMode & FBZ_DRAW_MASK) { + case FBZ_DRAW_FRONT: + voodoo->params.draw_offset = voodoo->params.front_offset; + voodoo->fb_draw_buffer = voodoo->disp_buffer; + break; + case FBZ_DRAW_BACK: + voodoo->params.draw_offset = voodoo->back_offset; + voodoo->fb_draw_buffer = voodoo->draw_buffer; + break; - default: - fatal("voodoo_recalc : unknown draw buffer\n"); - } + default: + fatal("voodoo_recalc : unknown draw buffer\n"); + } - voodoo->block_width = ((voodoo->fbiInit1 >> 4) & 15) * 2; - if (voodoo->fbiInit6 & (1 << 30)) - voodoo->block_width += 1; - if (voodoo->fbiInit1 & (1 << 24)) - voodoo->block_width += 32; - voodoo->row_width = voodoo->block_width * 32 * 2; - voodoo->params.row_width = voodoo->row_width; - voodoo->aux_row_width = voodoo->row_width; - voodoo->params.aux_row_width = voodoo->aux_row_width; + voodoo->block_width = ((voodoo->fbiInit1 >> 4) & 15) * 2; + if (voodoo->fbiInit6 & (1 << 30)) + voodoo->block_width += 1; + if (voodoo->fbiInit1 & (1 << 24)) + voodoo->block_width += 32; + voodoo->row_width = voodoo->block_width * 32 * 2; + voodoo->params.row_width = voodoo->row_width; + voodoo->aux_row_width = voodoo->row_width; + voodoo->params.aux_row_width = voodoo->aux_row_width; } - -static uint16_t voodoo_readw(uint32_t addr, void *p) +static uint16_t +voodoo_readw(uint32_t addr, void *p) { - voodoo_t *voodoo = (voodoo_t *)p; + voodoo_t *voodoo = (voodoo_t *) p; - addr &= 0xffffff; + addr &= 0xffffff; - cycles -= voodoo->read_time; + cycles -= voodoo->read_time; - if ((addr & 0xc00000) == 0x400000) /*Framebuffer*/ - { - if (SLI_ENABLED) - { - voodoo_set_t *set = voodoo->set; - int y = (addr >> 11) & 0x3ff; + if ((addr & 0xc00000) == 0x400000) /*Framebuffer*/ + { + if (SLI_ENABLED) { + voodoo_set_t *set = voodoo->set; + int y = (addr >> 11) & 0x3ff; - if (y & 1) - voodoo = set->voodoos[1]; - else - voodoo = set->voodoos[0]; - } - - voodoo->flush = 1; - while (!FIFO_EMPTY) - { - voodoo_wake_fifo_thread_now(voodoo); - thread_wait_event(voodoo->fifo_not_full_event, 1); - } - voodoo_wait_for_render_thread_idle(voodoo); - voodoo->flush = 0; - - return voodoo_fb_readw(addr, voodoo); + if (y & 1) + voodoo = set->voodoos[1]; + else + voodoo = set->voodoos[0]; } - return 0xffff; + voodoo->flush = 1; + while (!FIFO_EMPTY) { + voodoo_wake_fifo_thread_now(voodoo); + thread_wait_event(voodoo->fifo_not_full_event, 1); + } + voodoo_wait_for_render_thread_idle(voodoo); + voodoo->flush = 0; + + return voodoo_fb_readw(addr, voodoo); + } + + return 0xffff; } - -static uint32_t voodoo_readl(uint32_t addr, void *p) +static uint32_t +voodoo_readl(uint32_t addr, void *p) { - voodoo_t *voodoo = (voodoo_t *)p; - uint32_t temp = 0xffffffff; - int fifo_size; - voodoo->rd_count++; - addr &= 0xffffff; + voodoo_t *voodoo = (voodoo_t *) p; + uint32_t temp = 0xffffffff; + int fifo_size; + voodoo->rd_count++; + addr &= 0xffffff; - cycles -= voodoo->read_time; + cycles -= voodoo->read_time; - if (addr & 0x800000) /*Texture*/ - { + if (addr & 0x800000) /*Texture*/ + { + } else if (addr & 0x400000) /*Framebuffer*/ + { + if (SLI_ENABLED) { + voodoo_set_t *set = voodoo->set; + int y = (addr >> 11) & 0x3ff; + + if (y & 1) + voodoo = set->voodoos[1]; + else + voodoo = set->voodoos[0]; } - else if (addr & 0x400000) /*Framebuffer*/ - { - if (SLI_ENABLED) - { - voodoo_set_t *set = voodoo->set; - int y = (addr >> 11) & 0x3ff; - if (y & 1) - voodoo = set->voodoos[1]; - else - voodoo = set->voodoos[0]; - } - - voodoo->flush = 1; - while (!FIFO_EMPTY) - { - voodoo_wake_fifo_thread_now(voodoo); - thread_wait_event(voodoo->fifo_not_full_event, 1); - } - voodoo_wait_for_render_thread_idle(voodoo); - voodoo->flush = 0; - - temp = voodoo_fb_readl(addr, voodoo); + voodoo->flush = 1; + while (!FIFO_EMPTY) { + voodoo_wake_fifo_thread_now(voodoo); + thread_wait_event(voodoo->fifo_not_full_event, 1); } - else switch (addr & 0x3fc) - { - case SST_status: + voodoo_wait_for_render_thread_idle(voodoo); + voodoo->flush = 0; + + temp = voodoo_fb_readl(addr, voodoo); + } else + switch (addr & 0x3fc) { + case SST_status: { - int fifo_entries = FIFO_ENTRIES; - int swap_count = voodoo->swap_count; - int written = voodoo->cmd_written + voodoo->cmd_written_fifo; - int busy = (written - voodoo->cmd_read) || (voodoo->cmdfifo_depth_rd != voodoo->cmdfifo_depth_wr); + int fifo_entries = FIFO_ENTRIES; + int swap_count = voodoo->swap_count; + int written = voodoo->cmd_written + voodoo->cmd_written_fifo; + int busy = (written - voodoo->cmd_read) || (voodoo->cmdfifo_depth_rd != voodoo->cmdfifo_depth_wr); - if (SLI_ENABLED && voodoo->type != VOODOO_2) - { - voodoo_t *voodoo_other = (voodoo == voodoo->set->voodoos[0]) ? voodoo->set->voodoos[1] : voodoo->set->voodoos[0]; - int other_written = voodoo_other->cmd_written + voodoo_other->cmd_written_fifo; + if (SLI_ENABLED && voodoo->type != VOODOO_2) { + voodoo_t *voodoo_other = (voodoo == voodoo->set->voodoos[0]) ? voodoo->set->voodoos[1] : voodoo->set->voodoos[0]; + int other_written = voodoo_other->cmd_written + voodoo_other->cmd_written_fifo; - if (voodoo_other->swap_count > swap_count) - swap_count = voodoo_other->swap_count; - if ((voodoo_other->fifo_write_idx - voodoo_other->fifo_read_idx) > fifo_entries) - fifo_entries = voodoo_other->fifo_write_idx - voodoo_other->fifo_read_idx; - if ((other_written - voodoo_other->cmd_read) || - (voodoo_other->cmdfifo_depth_rd != voodoo_other->cmdfifo_depth_wr)) - busy = 1; - if (!voodoo_other->voodoo_busy) - voodoo_wake_fifo_thread(voodoo_other); - } + if (voodoo_other->swap_count > swap_count) + swap_count = voodoo_other->swap_count; + if ((voodoo_other->fifo_write_idx - voodoo_other->fifo_read_idx) > fifo_entries) + fifo_entries = voodoo_other->fifo_write_idx - voodoo_other->fifo_read_idx; + if ((other_written - voodoo_other->cmd_read) || (voodoo_other->cmdfifo_depth_rd != voodoo_other->cmdfifo_depth_wr)) + busy = 1; + if (!voodoo_other->voodoo_busy) + voodoo_wake_fifo_thread(voodoo_other); + } - fifo_size = 0xffff - fifo_entries; - temp = fifo_size << 12; - if (fifo_size < 0x40) - temp |= fifo_size; - else - temp |= 0x3f; - if (swap_count < 7) - temp |= (swap_count << 28); - else - temp |= (7 << 28); - if (!voodoo->v_retrace) - temp |= 0x40; + fifo_size = 0xffff - fifo_entries; + temp = fifo_size << 12; + if (fifo_size < 0x40) + temp |= fifo_size; + else + temp |= 0x3f; + if (swap_count < 7) + temp |= (swap_count << 28); + else + temp |= (7 << 28); + if (!voodoo->v_retrace) + temp |= 0x40; - if (busy) - temp |= 0x380; /*Busy*/ + if (busy) + temp |= 0x380; /*Busy*/ - if (!voodoo->voodoo_busy) - voodoo_wake_fifo_thread(voodoo); + if (!voodoo->voodoo_busy) + voodoo_wake_fifo_thread(voodoo); } break; - case SST_fbzColorPath: + case SST_fbzColorPath: voodoo_flush(voodoo); temp = voodoo->params.fbzColorPath; break; - case SST_fogMode: + case SST_fogMode: voodoo_flush(voodoo); temp = voodoo->params.fogMode; break; - case SST_alphaMode: + case SST_alphaMode: voodoo_flush(voodoo); temp = voodoo->params.alphaMode; break; - case SST_fbzMode: + case SST_fbzMode: voodoo_flush(voodoo); temp = voodoo->params.fbzMode; break; - case SST_lfbMode: + case SST_lfbMode: voodoo_flush(voodoo); temp = voodoo->lfbMode; break; - case SST_clipLeftRight: + case SST_clipLeftRight: voodoo_flush(voodoo); temp = voodoo->params.clipRight | (voodoo->params.clipLeft << 16); break; - case SST_clipLowYHighY: + case SST_clipLowYHighY: voodoo_flush(voodoo); temp = voodoo->params.clipHighY | (voodoo->params.clipLowY << 16); break; - case SST_stipple: + case SST_stipple: voodoo_flush(voodoo); temp = voodoo->params.stipple; break; - case SST_color0: + case SST_color0: voodoo_flush(voodoo); temp = voodoo->params.color0; break; - case SST_color1: + case SST_color1: voodoo_flush(voodoo); temp = voodoo->params.color1; break; - case SST_fbiPixelsIn: + case SST_fbiPixelsIn: temp = voodoo->fbiPixelsIn & 0xffffff; break; - case SST_fbiChromaFail: + case SST_fbiChromaFail: temp = voodoo->fbiChromaFail & 0xffffff; break; - case SST_fbiZFuncFail: + case SST_fbiZFuncFail: temp = voodoo->fbiZFuncFail & 0xffffff; break; - case SST_fbiAFuncFail: + case SST_fbiAFuncFail: temp = voodoo->fbiAFuncFail & 0xffffff; break; - case SST_fbiPixelsOut: + case SST_fbiPixelsOut: temp = voodoo->fbiPixelsOut & 0xffffff; break; - case SST_fbiInit4: + case SST_fbiInit4: temp = voodoo->fbiInit4; break; - case SST_fbiInit0: + case SST_fbiInit0: temp = voodoo->fbiInit0; break; - case SST_fbiInit1: + case SST_fbiInit1: temp = voodoo->fbiInit1; break; - case SST_fbiInit2: + case SST_fbiInit2: if (voodoo->initEnable & 0x04) - temp = voodoo->dac_readdata; + temp = voodoo->dac_readdata; else - temp = voodoo->fbiInit2; + temp = voodoo->fbiInit2; break; - case SST_fbiInit3: + case SST_fbiInit3: temp = voodoo->fbiInit3 | (1 << 10) | (2 << 8); break; - case SST_vRetrace: + case SST_vRetrace: temp = voodoo->line & 0x1fff; break; - case SST_hvRetrace: + case SST_hvRetrace: { - uint32_t line_time = (uint32_t)(voodoo->line_time >> 32); - uint32_t diff = (timer_get_ts_int(&voodoo->timer) > (tsc & 0xffffffff)) ? (timer_get_ts_int(&voodoo->timer) - (tsc & 0xffffffff)) : 0; - uint32_t pre_div = diff * voodoo->h_total; - uint32_t post_div = pre_div / line_time; - uint32_t h_pos = (voodoo->h_total - 1) - post_div; + uint32_t line_time = (uint32_t) (voodoo->line_time >> 32); + uint32_t diff = (timer_get_ts_int(&voodoo->timer) > (tsc & 0xffffffff)) ? (timer_get_ts_int(&voodoo->timer) - (tsc & 0xffffffff)) : 0; + uint32_t pre_div = diff * voodoo->h_total; + uint32_t post_div = pre_div / line_time; + uint32_t h_pos = (voodoo->h_total - 1) - post_div; - if (h_pos >= voodoo->h_total) - h_pos = 0; + if (h_pos >= voodoo->h_total) + h_pos = 0; - temp = voodoo->line & 0x1fff; - temp |= (h_pos << 16); + temp = voodoo->line & 0x1fff; + temp |= (h_pos << 16); } break; - case SST_fbiInit5: + case SST_fbiInit5: temp = voodoo->fbiInit5 & ~0x1ff; break; - case SST_fbiInit6: + case SST_fbiInit6: temp = voodoo->fbiInit6; break; - case SST_fbiInit7: + case SST_fbiInit7: temp = voodoo->fbiInit7 & ~0xff; break; - case SST_cmdFifoBaseAddr: + case SST_cmdFifoBaseAddr: temp = voodoo->cmdfifo_base >> 12; temp |= (voodoo->cmdfifo_end >> 12) << 16; break; - case SST_cmdFifoRdPtr: + case SST_cmdFifoRdPtr: temp = voodoo->cmdfifo_rp; break; - case SST_cmdFifoAMin: + case SST_cmdFifoAMin: temp = voodoo->cmdfifo_amin; break; - case SST_cmdFifoAMax: + case SST_cmdFifoAMax: temp = voodoo->cmdfifo_amax; break; - case SST_cmdFifoDepth: + case SST_cmdFifoDepth: temp = voodoo->cmdfifo_depth_wr - voodoo->cmdfifo_depth_rd; break; - default: + default: voodoo_log("voodoo_readl : bad addr %08X\n", addr); temp = 0xffffffff; } - return temp; + return temp; } -static void voodoo_writew(uint32_t addr, uint16_t val, void *p) +static void +voodoo_writew(uint32_t addr, uint16_t val, void *p) { - voodoo_t *voodoo = (voodoo_t *)p; - voodoo->wr_count++; - addr &= 0xffffff; + voodoo_t *voodoo = (voodoo_t *) p; + voodoo->wr_count++; + addr &= 0xffffff; + cycles -= voodoo->write_time; + + if ((addr & 0xc00000) == 0x400000) /*Framebuffer*/ + voodoo_queue_command(voodoo, addr | FIFO_WRITEW_FB, val); +} + +static void +voodoo_writel(uint32_t addr, uint32_t val, void *p) +{ + voodoo_t *voodoo = (voodoo_t *) p; + + voodoo->wr_count++; + + addr &= 0xffffff; + + if (addr == voodoo->last_write_addr + 4) + cycles -= voodoo->burst_time; + else cycles -= voodoo->write_time; + voodoo->last_write_addr = addr; - if ((addr & 0xc00000) == 0x400000) /*Framebuffer*/ - voodoo_queue_command(voodoo, addr | FIFO_WRITEW_FB, val); -} - -static void voodoo_writel(uint32_t addr, uint32_t val, void *p) -{ - voodoo_t *voodoo = (voodoo_t *)p; - - voodoo->wr_count++; - - addr &= 0xffffff; - - if (addr == voodoo->last_write_addr+4) - cycles -= voodoo->burst_time; - else - cycles -= voodoo->write_time; - voodoo->last_write_addr = addr; - - if (addr & 0x800000) /*Texture*/ - { - voodoo->tex_count++; - voodoo_queue_command(voodoo, addr | FIFO_WRITEL_TEX, val); - } - else if (addr & 0x400000) /*Framebuffer*/ - { - voodoo_queue_command(voodoo, addr | FIFO_WRITEL_FB, val); - } - else if ((addr & 0x200000) && (voodoo->fbiInit7 & FBIINIT7_CMDFIFO_ENABLE)) - { -// voodoo_log("Write CMDFIFO %08x(%08x) %08x %08x\n", addr, voodoo->cmdfifo_base + (addr & 0x3fffc), val, (voodoo->cmdfifo_base + (addr & 0x3fffc)) & voodoo->fb_mask); - *(uint32_t *)&voodoo->fb_mem[(voodoo->cmdfifo_base + (addr & 0x3fffc)) & voodoo->fb_mask] = val; - voodoo->cmdfifo_depth_wr++; - if ((voodoo->cmdfifo_depth_wr - voodoo->cmdfifo_depth_rd) < 20) - voodoo_wake_fifo_thread(voodoo); - } - else switch (addr & 0x3fc) - { - case SST_intrCtrl: + if (addr & 0x800000) /*Texture*/ + { + voodoo->tex_count++; + voodoo_queue_command(voodoo, addr | FIFO_WRITEL_TEX, val); + } else if (addr & 0x400000) /*Framebuffer*/ + { + voodoo_queue_command(voodoo, addr | FIFO_WRITEL_FB, val); + } else if ((addr & 0x200000) && (voodoo->fbiInit7 & FBIINIT7_CMDFIFO_ENABLE)) { + // voodoo_log("Write CMDFIFO %08x(%08x) %08x %08x\n", addr, voodoo->cmdfifo_base + (addr & 0x3fffc), val, (voodoo->cmdfifo_base + (addr & 0x3fffc)) & voodoo->fb_mask); + *(uint32_t *) &voodoo->fb_mem[(voodoo->cmdfifo_base + (addr & 0x3fffc)) & voodoo->fb_mask] = val; + voodoo->cmdfifo_depth_wr++; + if ((voodoo->cmdfifo_depth_wr - voodoo->cmdfifo_depth_rd) < 20) + voodoo_wake_fifo_thread(voodoo); + } else + switch (addr & 0x3fc) { + case SST_intrCtrl: fatal("intrCtrl write %08x\n", val); break; - case SST_userIntrCMD: + case SST_userIntrCMD: fatal("userIntrCMD write %08x\n", val); break; - case SST_swapbufferCMD: + case SST_swapbufferCMD: voodoo->cmd_written++; thread_wait_mutex(voodoo->swap_mutex); voodoo->swap_count++; thread_release_mutex(voodoo->swap_mutex); if (voodoo->fbiInit7 & FBIINIT7_CMDFIFO_ENABLE) - return; + return; voodoo_queue_command(voodoo, addr | FIFO_WRITEL_REG, val); if (!voodoo->voodoo_busy) - voodoo_wake_fifo_threads(voodoo->set, voodoo); + voodoo_wake_fifo_threads(voodoo->set, voodoo); break; - case SST_triangleCMD: + case SST_triangleCMD: if (voodoo->fbiInit7 & FBIINIT7_CMDFIFO_ENABLE) - return; + return; voodoo->cmd_written++; voodoo_queue_command(voodoo, addr | FIFO_WRITEL_REG, val); if (!voodoo->voodoo_busy) - voodoo_wake_fifo_threads(voodoo->set, voodoo); + voodoo_wake_fifo_threads(voodoo->set, voodoo); break; - case SST_ftriangleCMD: + case SST_ftriangleCMD: if (voodoo->fbiInit7 & FBIINIT7_CMDFIFO_ENABLE) - return; + return; voodoo->cmd_written++; voodoo_queue_command(voodoo, addr | FIFO_WRITEL_REG, val); if (!voodoo->voodoo_busy) - voodoo_wake_fifo_threads(voodoo->set, voodoo); + voodoo_wake_fifo_threads(voodoo->set, voodoo); break; - case SST_fastfillCMD: + case SST_fastfillCMD: if (voodoo->fbiInit7 & FBIINIT7_CMDFIFO_ENABLE) - return; + return; voodoo->cmd_written++; voodoo_queue_command(voodoo, addr | FIFO_WRITEL_REG, val); if (!voodoo->voodoo_busy) - voodoo_wake_fifo_threads(voodoo->set, voodoo); + voodoo_wake_fifo_threads(voodoo->set, voodoo); break; - case SST_nopCMD: + case SST_nopCMD: if (voodoo->fbiInit7 & FBIINIT7_CMDFIFO_ENABLE) - return; + return; voodoo->cmd_written++; voodoo_queue_command(voodoo, addr | FIFO_WRITEL_REG, val); if (!voodoo->voodoo_busy) - voodoo_wake_fifo_threads(voodoo->set, voodoo); + voodoo_wake_fifo_threads(voodoo->set, voodoo); break; - case SST_fbiInit4: - if (voodoo->initEnable & 0x01) - { - voodoo->fbiInit4 = val; - voodoo->read_time = pci_nonburst_time + pci_burst_time * ((voodoo->fbiInit4 & 1) ? 2 : 1); -// voodoo_log("fbiInit4 write %08x - read_time=%i\n", val, voodoo->read_time); + case SST_fbiInit4: + if (voodoo->initEnable & 0x01) { + voodoo->fbiInit4 = val; + voodoo->read_time = pci_nonburst_time + pci_burst_time * ((voodoo->fbiInit4 & 1) ? 2 : 1); + // voodoo_log("fbiInit4 write %08x - read_time=%i\n", val, voodoo->read_time); } break; - case SST_backPorch: + case SST_backPorch: voodoo->backPorch = val; break; - case SST_videoDimensions: + case SST_videoDimensions: voodoo->videoDimensions = val; - voodoo->h_disp = (val & 0xfff) + 1; - voodoo->v_disp = (val >> 16) & 0xfff; + voodoo->h_disp = (val & 0xfff) + 1; + voodoo->v_disp = (val >> 16) & 0xfff; break; - case SST_fbiInit0: - if (voodoo->initEnable & 0x01) - { - voodoo->fbiInit0 = val; - thread_wait_mutex(voodoo->force_blit_mutex); - voodoo->can_blit = (voodoo->fbiInit0 & FBIINIT0_VGA_PASS) ? 1 : 0; - if (!voodoo->can_blit) - voodoo->force_blit_count = 0; - thread_release_mutex(voodoo->force_blit_mutex); + case SST_fbiInit0: + if (voodoo->initEnable & 0x01) { + voodoo->fbiInit0 = val; + thread_wait_mutex(voodoo->force_blit_mutex); + voodoo->can_blit = (voodoo->fbiInit0 & FBIINIT0_VGA_PASS) ? 1 : 0; + if (!voodoo->can_blit) + voodoo->force_blit_count = 0; + thread_release_mutex(voodoo->force_blit_mutex); - if (voodoo->set->nr_cards == 2) - svga_set_override(voodoo->svga, (voodoo->set->voodoos[0]->fbiInit0 | voodoo->set->voodoos[1]->fbiInit0) & 1); - else - svga_set_override(voodoo->svga, val & 1); - if (val & FBIINIT0_GRAPHICS_RESET) - { - /*Reset display/draw buffer selection. This may not actually - happen here on a real Voodoo*/ - voodoo->disp_buffer = 0; - voodoo->draw_buffer = 1; - voodoo_recalc(voodoo); - voodoo->front_offset = voodoo->params.front_offset; - } - } - break; - case SST_fbiInit1: - if (voodoo->initEnable & 0x01) - { - if ((voodoo->fbiInit1 & FBIINIT1_VIDEO_RESET) && !(val & FBIINIT1_VIDEO_RESET)) - { - voodoo->line = 0; - thread_wait_mutex(voodoo->swap_mutex); - voodoo->swap_count = 0; - thread_release_mutex(voodoo->swap_mutex); - voodoo->retrace_count = 0; - } - voodoo->fbiInit1 = (val & ~5) | (voodoo->fbiInit1 & 5); - voodoo->write_time = pci_nonburst_time + pci_burst_time * ((voodoo->fbiInit1 & 2) ? 1 : 0); - voodoo->burst_time = pci_burst_time * ((voodoo->fbiInit1 & 2) ? 2 : 1); -// voodoo_log("fbiInit1 write %08x - write_time=%i burst_time=%i\n", val, voodoo->write_time, voodoo->burst_time); - } - break; - case SST_fbiInit2: - if (voodoo->initEnable & 0x01) - { - voodoo->fbiInit2 = val; + if (voodoo->set->nr_cards == 2) + svga_set_override(voodoo->svga, (voodoo->set->voodoos[0]->fbiInit0 | voodoo->set->voodoos[1]->fbiInit0) & 1); + else + svga_set_override(voodoo->svga, val & 1); + if (val & FBIINIT0_GRAPHICS_RESET) { + /*Reset display/draw buffer selection. This may not actually + happen here on a real Voodoo*/ + voodoo->disp_buffer = 0; + voodoo->draw_buffer = 1; voodoo_recalc(voodoo); + voodoo->front_offset = voodoo->params.front_offset; + } } break; - case SST_fbiInit3: + case SST_fbiInit1: + if (voodoo->initEnable & 0x01) { + if ((voodoo->fbiInit1 & FBIINIT1_VIDEO_RESET) && !(val & FBIINIT1_VIDEO_RESET)) { + voodoo->line = 0; + thread_wait_mutex(voodoo->swap_mutex); + voodoo->swap_count = 0; + thread_release_mutex(voodoo->swap_mutex); + voodoo->retrace_count = 0; + } + voodoo->fbiInit1 = (val & ~5) | (voodoo->fbiInit1 & 5); + voodoo->write_time = pci_nonburst_time + pci_burst_time * ((voodoo->fbiInit1 & 2) ? 1 : 0); + voodoo->burst_time = pci_burst_time * ((voodoo->fbiInit1 & 2) ? 2 : 1); + // voodoo_log("fbiInit1 write %08x - write_time=%i burst_time=%i\n", val, voodoo->write_time, voodoo->burst_time); + } + break; + case SST_fbiInit2: + if (voodoo->initEnable & 0x01) { + voodoo->fbiInit2 = val; + voodoo_recalc(voodoo); + } + break; + case SST_fbiInit3: if (voodoo->initEnable & 0x01) - voodoo->fbiInit3 = val; + voodoo->fbiInit3 = val; break; - case SST_hSync: - voodoo->hSync = val; + case SST_hSync: + voodoo->hSync = val; voodoo->h_total = (val & 0xffff) + (val >> 16); voodoo_pixelclock_update(voodoo); break; - case SST_vSync: - voodoo->vSync = val; + case SST_vSync: + voodoo->vSync = val; voodoo->v_total = (val & 0xffff) + (val >> 16); break; - case SST_clutData: + case SST_clutData: voodoo->clutData[(val >> 24) & 0x3f].b = val & 0xff; voodoo->clutData[(val >> 24) & 0x3f].g = (val >> 8) & 0xff; voodoo->clutData[(val >> 24) & 0x3f].r = (val >> 16) & 0xff; - if (val & 0x20000000) - { - voodoo->clutData[(val >> 24) & 0x3f].b = 255; - voodoo->clutData[(val >> 24) & 0x3f].g = 255; - voodoo->clutData[(val >> 24) & 0x3f].r = 255; + if (val & 0x20000000) { + voodoo->clutData[(val >> 24) & 0x3f].b = 255; + voodoo->clutData[(val >> 24) & 0x3f].g = 255; + voodoo->clutData[(val >> 24) & 0x3f].r = 255; } voodoo->clutData_dirty = 1; break; - case SST_dacData: - voodoo->dac_reg = (val >> 8) & 7; + case SST_dacData: + voodoo->dac_reg = (val >> 8) & 7; voodoo->dac_readdata = 0xff; - if (val & 0x800) - { -// voodoo_log(" dacData read %i %02X\n", voodoo->dac_reg, voodoo->dac_data[7]); - if (voodoo->dac_reg == 5) - { - switch (voodoo->dac_data[7]) - { - case 0x01: voodoo->dac_readdata = 0x55; break; - case 0x07: voodoo->dac_readdata = 0x71; break; - case 0x0b: voodoo->dac_readdata = 0x79; break; - } + if (val & 0x800) { + // voodoo_log(" dacData read %i %02X\n", voodoo->dac_reg, voodoo->dac_data[7]); + if (voodoo->dac_reg == 5) { + switch (voodoo->dac_data[7]) { + case 0x01: + voodoo->dac_readdata = 0x55; + break; + case 0x07: + voodoo->dac_readdata = 0x71; + break; + case 0x0b: + voodoo->dac_readdata = 0x79; + break; } + } else + voodoo->dac_readdata = voodoo->dac_data[voodoo->dac_readdata & 7]; + } else { + if (voodoo->dac_reg == 5) { + if (!voodoo->dac_reg_ff) + voodoo->dac_pll_regs[voodoo->dac_data[4] & 0xf] = (voodoo->dac_pll_regs[voodoo->dac_data[4] & 0xf] & 0xff00) | val; else - voodoo->dac_readdata = voodoo->dac_data[voodoo->dac_readdata & 7]; - } - else - { - if (voodoo->dac_reg == 5) - { - if (!voodoo->dac_reg_ff) - voodoo->dac_pll_regs[voodoo->dac_data[4] & 0xf] = (voodoo->dac_pll_regs[voodoo->dac_data[4] & 0xf] & 0xff00) | val; - else - voodoo->dac_pll_regs[voodoo->dac_data[4] & 0xf] = (voodoo->dac_pll_regs[voodoo->dac_data[4] & 0xf] & 0xff) | (val << 8); -// voodoo_log("Write PLL reg %x %04x\n", voodoo->dac_data[4] & 0xf, voodoo->dac_pll_regs[voodoo->dac_data[4] & 0xf]); - voodoo->dac_reg_ff = !voodoo->dac_reg_ff; - if (!voodoo->dac_reg_ff) - voodoo->dac_data[4]++; + voodoo->dac_pll_regs[voodoo->dac_data[4] & 0xf] = (voodoo->dac_pll_regs[voodoo->dac_data[4] & 0xf] & 0xff) | (val << 8); + // voodoo_log("Write PLL reg %x %04x\n", voodoo->dac_data[4] & 0xf, voodoo->dac_pll_regs[voodoo->dac_data[4] & 0xf]); + voodoo->dac_reg_ff = !voodoo->dac_reg_ff; + if (!voodoo->dac_reg_ff) + voodoo->dac_data[4]++; - } - else - { - voodoo->dac_data[voodoo->dac_reg] = val & 0xff; - voodoo->dac_reg_ff = 0; - } - voodoo_pixelclock_update(voodoo); + } else { + voodoo->dac_data[voodoo->dac_reg] = val & 0xff; + voodoo->dac_reg_ff = 0; + } + voodoo_pixelclock_update(voodoo); } break; - case SST_scrFilter: - if (voodoo->initEnable & 0x01) - { - voodoo->scrfilterEnabled = 1; - voodoo->scrfilterThreshold = val; /* update the threshold values and generate a new lookup table if necessary */ + case SST_scrFilter: + if (voodoo->initEnable & 0x01) { + voodoo->scrfilterEnabled = 1; + voodoo->scrfilterThreshold = val; /* update the threshold values and generate a new lookup table if necessary */ - if (val < 1) - voodoo->scrfilterEnabled = 0; - voodoo_threshold_check(voodoo); - voodoo_log("Voodoo Filter: %06x\n", val); - } - break; - - case SST_fbiInit5: - if (voodoo->initEnable & 0x01) - voodoo->fbiInit5 = (val & ~0x41e6) | (voodoo->fbiInit5 & 0x41e6); - break; - case SST_fbiInit6: - if (voodoo->initEnable & 0x01) - voodoo->fbiInit6 = val; - break; - case SST_fbiInit7: - if (voodoo->initEnable & 0x01) - { - voodoo->fbiInit7 = val; - voodoo->cmdfifo_enabled = val & 0x100; + if (val < 1) + voodoo->scrfilterEnabled = 0; + voodoo_threshold_check(voodoo); + voodoo_log("Voodoo Filter: %06x\n", val); } break; - case SST_cmdFifoBaseAddr: + case SST_fbiInit5: + if (voodoo->initEnable & 0x01) + voodoo->fbiInit5 = (val & ~0x41e6) | (voodoo->fbiInit5 & 0x41e6); + break; + case SST_fbiInit6: + if (voodoo->initEnable & 0x01) + voodoo->fbiInit6 = val; + break; + case SST_fbiInit7: + if (voodoo->initEnable & 0x01) { + voodoo->fbiInit7 = val; + voodoo->cmdfifo_enabled = val & 0x100; + } + break; + + case SST_cmdFifoBaseAddr: voodoo->cmdfifo_base = (val & 0x3ff) << 12; - voodoo->cmdfifo_end = ((val >> 16) & 0x3ff) << 12; -// voodoo_log("CMDFIFO base=%08x end=%08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end); + voodoo->cmdfifo_end = ((val >> 16) & 0x3ff) << 12; + // voodoo_log("CMDFIFO base=%08x end=%08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end); break; - case SST_cmdFifoRdPtr: + case SST_cmdFifoRdPtr: voodoo->cmdfifo_rp = val; break; - case SST_cmdFifoAMin: + case SST_cmdFifoAMin: voodoo->cmdfifo_amin = val; break; - case SST_cmdFifoAMax: + case SST_cmdFifoAMax: voodoo->cmdfifo_amax = val; break; - case SST_cmdFifoDepth: + case SST_cmdFifoDepth: voodoo->cmdfifo_depth_rd = 0; voodoo->cmdfifo_depth_wr = val & 0xffff; break; - default: - if (voodoo->fbiInit7 & FBIINIT7_CMDFIFO_ENABLE) - { - voodoo_log("Unknown register write in CMDFIFO mode %08x %08x\n", addr, val); - } - else - { - voodoo_queue_command(voodoo, addr | FIFO_WRITEL_REG, val); + default: + if (voodoo->fbiInit7 & FBIINIT7_CMDFIFO_ENABLE) { + voodoo_log("Unknown register write in CMDFIFO mode %08x %08x\n", addr, val); + } else { + voodoo_queue_command(voodoo, addr | FIFO_WRITEL_REG, val); } break; } } -static uint16_t voodoo_snoop_readw(uint32_t addr, void *p) +static uint16_t +voodoo_snoop_readw(uint32_t addr, void *p) { - voodoo_set_t *set = (voodoo_set_t *)p; + voodoo_set_t *set = (voodoo_set_t *) p; - return voodoo_readw(addr, set->voodoos[0]); + return voodoo_readw(addr, set->voodoos[0]); } -static uint32_t voodoo_snoop_readl(uint32_t addr, void *p) +static uint32_t +voodoo_snoop_readl(uint32_t addr, void *p) { - voodoo_set_t *set = (voodoo_set_t *)p; + voodoo_set_t *set = (voodoo_set_t *) p; - return voodoo_readl(addr, set->voodoos[0]); + return voodoo_readl(addr, set->voodoos[0]); } -static void voodoo_snoop_writew(uint32_t addr, uint16_t val, void *p) +static void +voodoo_snoop_writew(uint32_t addr, uint16_t val, void *p) { - voodoo_set_t *set = (voodoo_set_t *)p; + voodoo_set_t *set = (voodoo_set_t *) p; - voodoo_writew(addr, val, set->voodoos[0]); - voodoo_writew(addr, val, set->voodoos[1]); + voodoo_writew(addr, val, set->voodoos[0]); + voodoo_writew(addr, val, set->voodoos[1]); } -static void voodoo_snoop_writel(uint32_t addr, uint32_t val, void *p) +static void +voodoo_snoop_writel(uint32_t addr, uint32_t val, void *p) { - voodoo_set_t *set = (voodoo_set_t *)p; + voodoo_set_t *set = (voodoo_set_t *) p; - voodoo_writel(addr, val, set->voodoos[0]); - voodoo_writel(addr, val, set->voodoos[1]); + voodoo_writel(addr, val, set->voodoos[0]); + voodoo_writel(addr, val, set->voodoos[1]); } -static void voodoo_recalcmapping(voodoo_set_t *set) +static void +voodoo_recalcmapping(voodoo_set_t *set) { - if (set->nr_cards == 2) - { - if (set->voodoos[0]->pci_enable && set->voodoos[0]->memBaseAddr) - { - if (set->voodoos[0]->type == VOODOO_2 && set->voodoos[1]->initEnable & (1 << 23)) - { - voodoo_log("voodoo_recalcmapping (pri) with snoop : memBaseAddr %08X\n", set->voodoos[0]->memBaseAddr); - mem_mapping_disable(&set->voodoos[0]->mapping); - mem_mapping_set_addr(&set->snoop_mapping, set->voodoos[0]->memBaseAddr, 0x01000000); - } - else if (set->voodoos[1]->pci_enable && (set->voodoos[0]->memBaseAddr == set->voodoos[1]->memBaseAddr)) - { - voodoo_log("voodoo_recalcmapping (pri) (sec) same addr : memBaseAddr %08X\n", set->voodoos[0]->memBaseAddr); - mem_mapping_disable(&set->voodoos[0]->mapping); - mem_mapping_disable(&set->voodoos[1]->mapping); - mem_mapping_set_addr(&set->snoop_mapping, set->voodoos[0]->memBaseAddr, 0x01000000); - return; - } - else - { - voodoo_log("voodoo_recalcmapping (pri) : memBaseAddr %08X\n", set->voodoos[0]->memBaseAddr); - mem_mapping_disable(&set->snoop_mapping); - mem_mapping_set_addr(&set->voodoos[0]->mapping, set->voodoos[0]->memBaseAddr, 0x01000000); - } - } - else - { - voodoo_log("voodoo_recalcmapping (pri) : disabled\n"); - mem_mapping_disable(&set->voodoos[0]->mapping); - } - - if (set->voodoos[1]->pci_enable && set->voodoos[1]->memBaseAddr) - { - voodoo_log("voodoo_recalcmapping (sec) : memBaseAddr %08X\n", set->voodoos[1]->memBaseAddr); - mem_mapping_set_addr(&set->voodoos[1]->mapping, set->voodoos[1]->memBaseAddr, 0x01000000); - } - else - { - voodoo_log("voodoo_recalcmapping (sec) : disabled\n"); - mem_mapping_disable(&set->voodoos[1]->mapping); - } - } - else - { - voodoo_t *voodoo = set->voodoos[0]; - - if (voodoo->pci_enable && voodoo->memBaseAddr) - { - voodoo_log("voodoo_recalcmapping : memBaseAddr %08X\n", voodoo->memBaseAddr); - mem_mapping_set_addr(&voodoo->mapping, voodoo->memBaseAddr, 0x01000000); - } - else - { - voodoo_log("voodoo_recalcmapping : disabled\n"); - mem_mapping_disable(&voodoo->mapping); - } - } -} - -uint8_t voodoo_pci_read(int func, int addr, void *p) -{ - voodoo_t *voodoo = (voodoo_t *)p; - - if (func) - return 0; - -// voodoo_log("Voodoo PCI read %08X PC=%08x\n", addr, cpu_state.pc); - - switch (addr) - { - case 0x00: return 0x1a; /*3dfx*/ - case 0x01: return 0x12; - - case 0x02: - if (voodoo->type == VOODOO_2) - return 0x02; /*Voodoo 2*/ - else - return 0x01; /*SST-1 (Voodoo Graphics)*/ - case 0x03: return 0x00; - - case 0x04: return voodoo->pci_enable ? 0x02 : 0x00; /*Respond to memory accesses*/ - - case 0x08: return 2; /*Revision ID*/ - case 0x09: return 0; /*Programming interface*/ - case 0x0a: return 0; - case 0x0b: return 0x04; - - case 0x10: return 0x00; /*memBaseAddr*/ - case 0x11: return 0x00; - case 0x12: return 0x00; - case 0x13: return voodoo->memBaseAddr >> 24; - - case 0x40: - return voodoo->initEnable & 0xff; - case 0x41: - if (voodoo->type == VOODOO_2) - return 0x50 | ((voodoo->initEnable >> 8) & 0x0f); - return (voodoo->initEnable >> 8) & 0x0f; - case 0x42: - return (voodoo->initEnable >> 16) & 0xff; - case 0x43: - return (voodoo->initEnable >> 24) & 0xff; - } - return 0; -} - -void voodoo_pci_write(int func, int addr, uint8_t val, void *p) -{ - voodoo_t *voodoo = (voodoo_t *)p; - - if (func) + if (set->nr_cards == 2) { + if (set->voodoos[0]->pci_enable && set->voodoos[0]->memBaseAddr) { + if (set->voodoos[0]->type == VOODOO_2 && set->voodoos[1]->initEnable & (1 << 23)) { + voodoo_log("voodoo_recalcmapping (pri) with snoop : memBaseAddr %08X\n", set->voodoos[0]->memBaseAddr); + mem_mapping_disable(&set->voodoos[0]->mapping); + mem_mapping_set_addr(&set->snoop_mapping, set->voodoos[0]->memBaseAddr, 0x01000000); + } else if (set->voodoos[1]->pci_enable && (set->voodoos[0]->memBaseAddr == set->voodoos[1]->memBaseAddr)) { + voodoo_log("voodoo_recalcmapping (pri) (sec) same addr : memBaseAddr %08X\n", set->voodoos[0]->memBaseAddr); + mem_mapping_disable(&set->voodoos[0]->mapping); + mem_mapping_disable(&set->voodoos[1]->mapping); + mem_mapping_set_addr(&set->snoop_mapping, set->voodoos[0]->memBaseAddr, 0x01000000); return; - -// voodoo_log("Voodoo PCI write %04X %02X PC=%08x\n", addr, val, cpu_state.pc); - - switch (addr) - { - case 0x04: - voodoo->pci_enable = val & 2; - voodoo_recalcmapping(voodoo->set); - break; - - case 0x13: - voodoo->memBaseAddr = val << 24; - voodoo_recalcmapping(voodoo->set); - break; - - case 0x40: - voodoo->initEnable = (voodoo->initEnable & ~0x000000ff) | val; - break; - case 0x41: - voodoo->initEnable = (voodoo->initEnable & ~0x0000ff00) | (val << 8); - break; - case 0x42: - voodoo->initEnable = (voodoo->initEnable & ~0x00ff0000) | (val << 16); - voodoo_recalcmapping(voodoo->set); - break; - case 0x43: - voodoo->initEnable = (voodoo->initEnable & ~0xff000000) | (val << 24); - voodoo_recalcmapping(voodoo->set); - break; - } -} - - -static void voodoo_speed_changed(void *p) -{ - voodoo_set_t *voodoo_set = (voodoo_set_t *)p; - - voodoo_pixelclock_update(voodoo_set->voodoos[0]); - voodoo_set->voodoos[0]->read_time = pci_nonburst_time + pci_burst_time * ((voodoo_set->voodoos[0]->fbiInit4 & 1) ? 2 : 1); - voodoo_set->voodoos[0]->write_time = pci_nonburst_time + pci_burst_time * ((voodoo_set->voodoos[0]->fbiInit1 & 2) ? 1 : 0); - voodoo_set->voodoos[0]->burst_time = pci_burst_time * ((voodoo_set->voodoos[0]->fbiInit1 & 2) ? 2 : 1); - if (voodoo_set->nr_cards == 2) - { - voodoo_pixelclock_update(voodoo_set->voodoos[1]); - voodoo_set->voodoos[1]->read_time = pci_nonburst_time + pci_burst_time * ((voodoo_set->voodoos[1]->fbiInit4 & 1) ? 2 : 1); - voodoo_set->voodoos[1]->write_time = pci_nonburst_time + pci_burst_time * ((voodoo_set->voodoos[1]->fbiInit1 & 2) ? 1 : 0); - voodoo_set->voodoos[1]->burst_time = pci_burst_time * ((voodoo_set->voodoos[1]->fbiInit1 & 2) ? 2 : 1); - } -// voodoo_log("Voodoo read_time=%i write_time=%i burst_time=%i %08x %08x\n", voodoo->read_time, voodoo->write_time, voodoo->burst_time, voodoo->fbiInit1, voodoo->fbiInit4); -} - -static void voodoo_force_blit(void *p) -{ - voodoo_set_t *voodoo_set = (voodoo_set_t *)p; - - thread_wait_mutex(voodoo_set->voodoos[0]->force_blit_mutex); - if(voodoo_set->voodoos[0]->can_blit) { - voodoo_set->voodoos[0]->force_blit_count++; - } - thread_release_mutex(voodoo_set->voodoos[0]->force_blit_mutex); - if(voodoo_set->nr_cards == 2) { - thread_wait_mutex(voodoo_set->voodoos[1]->force_blit_mutex); - if(voodoo_set->voodoos[1]->can_blit) { - voodoo_set->voodoos[1]->force_blit_count++; + } else { + voodoo_log("voodoo_recalcmapping (pri) : memBaseAddr %08X\n", set->voodoos[0]->memBaseAddr); + mem_mapping_disable(&set->snoop_mapping); + mem_mapping_set_addr(&set->voodoos[0]->mapping, set->voodoos[0]->memBaseAddr, 0x01000000); } - thread_release_mutex(voodoo_set->voodoos[1]->force_blit_mutex); + } else { + voodoo_log("voodoo_recalcmapping (pri) : disabled\n"); + mem_mapping_disable(&set->voodoos[0]->mapping); } + + if (set->voodoos[1]->pci_enable && set->voodoos[1]->memBaseAddr) { + voodoo_log("voodoo_recalcmapping (sec) : memBaseAddr %08X\n", set->voodoos[1]->memBaseAddr); + mem_mapping_set_addr(&set->voodoos[1]->mapping, set->voodoos[1]->memBaseAddr, 0x01000000); + } else { + voodoo_log("voodoo_recalcmapping (sec) : disabled\n"); + mem_mapping_disable(&set->voodoos[1]->mapping); + } + } else { + voodoo_t *voodoo = set->voodoos[0]; + + if (voodoo->pci_enable && voodoo->memBaseAddr) { + voodoo_log("voodoo_recalcmapping : memBaseAddr %08X\n", voodoo->memBaseAddr); + mem_mapping_set_addr(&voodoo->mapping, voodoo->memBaseAddr, 0x01000000); + } else { + voodoo_log("voodoo_recalcmapping : disabled\n"); + mem_mapping_disable(&voodoo->mapping); + } + } } -void *voodoo_card_init() +uint8_t +voodoo_pci_read(int func, int addr, void *p) { - int c; - voodoo_t *voodoo = malloc(sizeof(voodoo_t)); - memset(voodoo, 0, sizeof(voodoo_t)); + voodoo_t *voodoo = (voodoo_t *) p; - voodoo->bilinear_enabled = device_get_config_int("bilinear"); - voodoo->dithersub_enabled = device_get_config_int("dithersub"); - voodoo->scrfilter = device_get_config_int("dacfilter"); - voodoo->texture_size = device_get_config_int("texture_memory"); - voodoo->texture_mask = (voodoo->texture_size << 20) - 1; - voodoo->fb_size = device_get_config_int("framebuffer_memory"); - voodoo->fb_mask = (voodoo->fb_size << 20) - 1; - voodoo->render_threads = device_get_config_int("render_threads"); - voodoo->odd_even_mask = voodoo->render_threads - 1; -#ifndef NO_CODEGEN - voodoo->use_recompiler = device_get_config_int("recompiler"); -#endif - voodoo->type = device_get_config_int("type"); - switch (voodoo->type) { - case VOODOO_1: - voodoo->dual_tmus = 0; - break; - case VOODOO_SB50: - voodoo->dual_tmus = 1; - break; - case VOODOO_2: - voodoo->dual_tmus = 1; - break; - } + if (func) + return 0; - if (voodoo->type == VOODOO_2) /*generate filter lookup tables*/ - voodoo_generate_filter_v2(voodoo); - else - voodoo_generate_filter_v1(voodoo); + // voodoo_log("Voodoo PCI read %08X PC=%08x\n", addr, cpu_state.pc); - pci_add_card(PCI_ADD_NORMAL, voodoo_pci_read, voodoo_pci_write, voodoo); + switch (addr) { + case 0x00: + return 0x1a; /*3dfx*/ + case 0x01: + return 0x12; - mem_mapping_add(&voodoo->mapping, 0, 0, NULL, voodoo_readw, voodoo_readl, NULL, voodoo_writew, voodoo_writel, NULL, MEM_MAPPING_EXTERNAL, voodoo); + case 0x02: + if (voodoo->type == VOODOO_2) + return 0x02; /*Voodoo 2*/ + else + return 0x01; /*SST-1 (Voodoo Graphics)*/ + case 0x03: + return 0x00; - voodoo->fb_mem = malloc(4 * 1024 * 1024); - voodoo->tex_mem[0] = malloc(voodoo->texture_size * 1024 * 1024); - if (voodoo->dual_tmus) - voodoo->tex_mem[1] = malloc(voodoo->texture_size * 1024 * 1024); - voodoo->tex_mem_w[0] = (uint16_t *)voodoo->tex_mem[0]; - voodoo->tex_mem_w[1] = (uint16_t *)voodoo->tex_mem[1]; + case 0x04: + return voodoo->pci_enable ? 0x02 : 0x00; /*Respond to memory accesses*/ - for (c = 0; c < TEX_CACHE_MAX; c++) { - voodoo->texture_cache[0][c].data = malloc((256*256 + 256*256 + 128*128 + 64*64 + 32*32 + 16*16 + 8*8 + 4*4 + 2*2) * 4); - voodoo->texture_cache[0][c].base = -1; /*invalid*/ - voodoo->texture_cache[0][c].refcount = 0; - if (voodoo->dual_tmus) - { - voodoo->texture_cache[1][c].data = malloc((256*256 + 256*256 + 128*128 + 64*64 + 32*32 + 16*16 + 8*8 + 4*4 + 2*2) * 4); - voodoo->texture_cache[1][c].base = -1; /*invalid*/ - voodoo->texture_cache[1][c].refcount = 0; - } - } + case 0x08: + return 2; /*Revision ID*/ + case 0x09: + return 0; /*Programming interface*/ + case 0x0a: + return 0; + case 0x0b: + return 0x04; - timer_add(&voodoo->timer, voodoo_callback, voodoo, 1); + case 0x10: + return 0x00; /*memBaseAddr*/ + case 0x11: + return 0x00; + case 0x12: + return 0x00; + case 0x13: + return voodoo->memBaseAddr >> 24; - voodoo->svga = svga_get_pri(); - voodoo->fbiInit0 = 0; - - voodoo->wake_fifo_thread = thread_create_event(); - voodoo->wake_render_thread[0] = thread_create_event(); - voodoo->wake_render_thread[1] = thread_create_event(); - voodoo->wake_render_thread[2] = thread_create_event(); - voodoo->wake_render_thread[3] = thread_create_event(); - voodoo->wake_main_thread = thread_create_event(); - voodoo->fifo_not_full_event = thread_create_event(); - voodoo->render_not_full_event[0] = thread_create_event(); - voodoo->render_not_full_event[1] = thread_create_event(); - voodoo->render_not_full_event[2] = thread_create_event(); - voodoo->render_not_full_event[3] = thread_create_event(); - voodoo->fifo_thread_run = 1; - voodoo->fifo_thread = thread_create(voodoo_fifo_thread, voodoo); - voodoo->render_thread_run[0] = 1; - voodoo->render_thread[0] = thread_create(voodoo_render_thread_1, voodoo); - if (voodoo->render_threads >= 2) { - voodoo->render_thread_run[1] = 1; - voodoo->render_thread[1] = thread_create(voodoo_render_thread_2, voodoo); - } - if (voodoo->render_threads == 4) { - voodoo->render_thread_run[2] = 1; - voodoo->render_thread[2] = thread_create(voodoo_render_thread_3, voodoo); - voodoo->render_thread_run[3] = 1; - voodoo->render_thread[3] = thread_create(voodoo_render_thread_4, voodoo); - } - voodoo->swap_mutex = thread_create_mutex(); - timer_add(&voodoo->wake_timer, voodoo_wake_timer, (void *)voodoo, 0); - - for (c = 0; c < 0x100; c++) { - rgb332[c].r = c & 0xe0; - rgb332[c].g = (c << 3) & 0xe0; - rgb332[c].b = (c << 6) & 0xc0; - rgb332[c].r = rgb332[c].r | (rgb332[c].r >> 3) | (rgb332[c].r >> 6); - rgb332[c].g = rgb332[c].g | (rgb332[c].g >> 3) | (rgb332[c].g >> 6); - rgb332[c].b = rgb332[c].b | (rgb332[c].b >> 2); - rgb332[c].b = rgb332[c].b | (rgb332[c].b >> 4); - rgb332[c].a = 0xff; - - ai44[c].a = (c & 0xf0) | ((c & 0xf0) >> 4); - ai44[c].r = (c & 0x0f) | ((c & 0x0f) << 4); - ai44[c].g = ai44[c].b = ai44[c].r; - } - - for (c = 0; c < 0x10000; c++) { - rgb565[c].r = (c >> 8) & 0xf8; - rgb565[c].g = (c >> 3) & 0xfc; - rgb565[c].b = (c << 3) & 0xf8; - rgb565[c].r |= (rgb565[c].r >> 5); - rgb565[c].g |= (rgb565[c].g >> 6); - rgb565[c].b |= (rgb565[c].b >> 5); - rgb565[c].a = 0xff; - - argb1555[c].r = (c >> 7) & 0xf8; - argb1555[c].g = (c >> 2) & 0xf8; - argb1555[c].b = (c << 3) & 0xf8; - argb1555[c].r |= (argb1555[c].r >> 5); - argb1555[c].g |= (argb1555[c].g >> 5); - argb1555[c].b |= (argb1555[c].b >> 5); - argb1555[c].a = (c & 0x8000) ? 0xff : 0; - - argb4444[c].a = (c >> 8) & 0xf0; - argb4444[c].r = (c >> 4) & 0xf0; - argb4444[c].g = c & 0xf0; - argb4444[c].b = (c << 4) & 0xf0; - argb4444[c].a |= (argb4444[c].a >> 4); - argb4444[c].r |= (argb4444[c].r >> 4); - argb4444[c].g |= (argb4444[c].g >> 4); - argb4444[c].b |= (argb4444[c].b >> 4); - - ai88[c].a = (c >> 8); - ai88[c].r = c & 0xff; - ai88[c].g = c & 0xff; - ai88[c].b = c & 0xff; - } -#ifndef NO_CODEGEN - voodoo_codegen_init(voodoo); -#endif - - voodoo->disp_buffer = 0; - voodoo->draw_buffer = 1; - - voodoo->force_blit_count = 0; - voodoo->can_blit = 0; - voodoo->force_blit_mutex = thread_create_mutex(); - - return voodoo; + case 0x40: + return voodoo->initEnable & 0xff; + case 0x41: + if (voodoo->type == VOODOO_2) + return 0x50 | ((voodoo->initEnable >> 8) & 0x0f); + return (voodoo->initEnable >> 8) & 0x0f; + case 0x42: + return (voodoo->initEnable >> 16) & 0xff; + case 0x43: + return (voodoo->initEnable >> 24) & 0xff; + } + return 0; } -void *voodoo_2d3d_card_init(int type) +void +voodoo_pci_write(int func, int addr, uint8_t val, void *p) { - int c; - voodoo_t *voodoo = malloc(sizeof(voodoo_t)); - memset(voodoo, 0, sizeof(voodoo_t)); + voodoo_t *voodoo = (voodoo_t *) p; - voodoo->bilinear_enabled = device_get_config_int("bilinear"); - voodoo->dithersub_enabled = device_get_config_int("dithersub"); - voodoo->scrfilter = device_get_config_int("dacfilter"); - voodoo->render_threads = device_get_config_int("render_threads"); - voodoo->odd_even_mask = voodoo->render_threads - 1; -#ifndef NO_CODEGEN - voodoo->use_recompiler = device_get_config_int("recompiler"); -#endif - voodoo->type = type; - voodoo->dual_tmus = (type == VOODOO_3) ? 1 : 0; + if (func) + return; - /*generate filter lookup tables*/ - voodoo_generate_filter_v2(voodoo); + // voodoo_log("Voodoo PCI write %04X %02X PC=%08x\n", addr, val, cpu_state.pc); - for (c = 0; c < TEX_CACHE_MAX; c++) { - voodoo->texture_cache[0][c].data = malloc((256*256 + 256*256 + 128*128 + 64*64 + 32*32 + 16*16 + 8*8 + 4*4 + 2*2) * 4); - voodoo->texture_cache[0][c].base = -1; /*invalid*/ - voodoo->texture_cache[0][c].refcount = 0; - if (voodoo->dual_tmus) - { - voodoo->texture_cache[1][c].data = malloc((256*256 + 256*256 + 128*128 + 64*64 + 32*32 + 16*16 + 8*8 + 4*4 + 2*2) * 4); - voodoo->texture_cache[1][c].base = -1; /*invalid*/ - voodoo->texture_cache[1][c].refcount = 0; - } - } + switch (addr) { + case 0x04: + voodoo->pci_enable = val & 2; + voodoo_recalcmapping(voodoo->set); + break; - timer_add(&voodoo->timer, voodoo_callback, voodoo, 1); + case 0x13: + voodoo->memBaseAddr = val << 24; + voodoo_recalcmapping(voodoo->set); + break; - voodoo->fbiInit0 = 0; - - voodoo->wake_fifo_thread = thread_create_event(); - voodoo->wake_render_thread[0] = thread_create_event(); - voodoo->wake_render_thread[1] = thread_create_event(); - voodoo->wake_render_thread[2] = thread_create_event(); - voodoo->wake_render_thread[3] = thread_create_event(); - voodoo->wake_main_thread = thread_create_event(); - voodoo->fifo_not_full_event = thread_create_event(); - voodoo->render_not_full_event[0] = thread_create_event(); - voodoo->render_not_full_event[1] = thread_create_event(); - voodoo->render_not_full_event[2] = thread_create_event(); - voodoo->render_not_full_event[3] = thread_create_event(); - voodoo->fifo_thread_run = 1; - voodoo->fifo_thread = thread_create(voodoo_fifo_thread, voodoo); - voodoo->render_thread_run[0] = 1; - voodoo->render_thread[0] = thread_create(voodoo_render_thread_1, voodoo); - if (voodoo->render_threads >= 2) { - voodoo->render_thread_run[1] = 1; - voodoo->render_thread[1] = thread_create(voodoo_render_thread_2, voodoo); - } - if (voodoo->render_threads == 4) { - voodoo->render_thread_run[2] = 1; - voodoo->render_thread[2] = thread_create(voodoo_render_thread_3, voodoo); - voodoo->render_thread_run[3] = 1; - voodoo->render_thread[3] = thread_create(voodoo_render_thread_4, voodoo); - } - voodoo->swap_mutex = thread_create_mutex(); - timer_add(&voodoo->wake_timer, voodoo_wake_timer, (void *)voodoo, 0); - - for (c = 0; c < 0x100; c++) { - rgb332[c].r = c & 0xe0; - rgb332[c].g = (c << 3) & 0xe0; - rgb332[c].b = (c << 6) & 0xc0; - rgb332[c].r = rgb332[c].r | (rgb332[c].r >> 3) | (rgb332[c].r >> 6); - rgb332[c].g = rgb332[c].g | (rgb332[c].g >> 3) | (rgb332[c].g >> 6); - rgb332[c].b = rgb332[c].b | (rgb332[c].b >> 2); - rgb332[c].b = rgb332[c].b | (rgb332[c].b >> 4); - rgb332[c].a = 0xff; - - ai44[c].a = (c & 0xf0) | ((c & 0xf0) >> 4); - ai44[c].r = (c & 0x0f) | ((c & 0x0f) << 4); - ai44[c].g = ai44[c].b = ai44[c].r; - } - - for (c = 0; c < 0x10000; c++) { - rgb565[c].r = (c >> 8) & 0xf8; - rgb565[c].g = (c >> 3) & 0xfc; - rgb565[c].b = (c << 3) & 0xf8; - rgb565[c].r |= (rgb565[c].r >> 5); - rgb565[c].g |= (rgb565[c].g >> 6); - rgb565[c].b |= (rgb565[c].b >> 5); - rgb565[c].a = 0xff; - - argb1555[c].r = (c >> 7) & 0xf8; - argb1555[c].g = (c >> 2) & 0xf8; - argb1555[c].b = (c << 3) & 0xf8; - argb1555[c].r |= (argb1555[c].r >> 5); - argb1555[c].g |= (argb1555[c].g >> 5); - argb1555[c].b |= (argb1555[c].b >> 5); - argb1555[c].a = (c & 0x8000) ? 0xff : 0; - - argb4444[c].a = (c >> 8) & 0xf0; - argb4444[c].r = (c >> 4) & 0xf0; - argb4444[c].g = c & 0xf0; - argb4444[c].b = (c << 4) & 0xf0; - argb4444[c].a |= (argb4444[c].a >> 4); - argb4444[c].r |= (argb4444[c].r >> 4); - argb4444[c].g |= (argb4444[c].g >> 4); - argb4444[c].b |= (argb4444[c].b >> 4); - - ai88[c].a = (c >> 8); - ai88[c].r = c & 0xff; - ai88[c].g = c & 0xff; - ai88[c].b = c & 0xff; - } -#ifndef NO_CODEGEN - voodoo_codegen_init(voodoo); -#endif - - voodoo->disp_buffer = 0; - voodoo->draw_buffer = 1; - - voodoo->force_blit_count = 0; - voodoo->can_blit = 0; - voodoo->force_blit_mutex = thread_create_mutex(); - - return voodoo; + case 0x40: + voodoo->initEnable = (voodoo->initEnable & ~0x000000ff) | val; + break; + case 0x41: + voodoo->initEnable = (voodoo->initEnable & ~0x0000ff00) | (val << 8); + break; + case 0x42: + voodoo->initEnable = (voodoo->initEnable & ~0x00ff0000) | (val << 16); + voodoo_recalcmapping(voodoo->set); + break; + case 0x43: + voodoo->initEnable = (voodoo->initEnable & ~0xff000000) | (val << 24); + voodoo_recalcmapping(voodoo->set); + break; + } } -void *voodoo_init() +static void +voodoo_speed_changed(void *p) { - voodoo_set_t *voodoo_set = malloc(sizeof(voodoo_set_t)); - uint32_t tmuConfig = 1; - int type; - memset(voodoo_set, 0, sizeof(voodoo_set_t)); + voodoo_set_t *voodoo_set = (voodoo_set_t *) p; - type = device_get_config_int("type"); + voodoo_pixelclock_update(voodoo_set->voodoos[0]); + voodoo_set->voodoos[0]->read_time = pci_nonburst_time + pci_burst_time * ((voodoo_set->voodoos[0]->fbiInit4 & 1) ? 2 : 1); + voodoo_set->voodoos[0]->write_time = pci_nonburst_time + pci_burst_time * ((voodoo_set->voodoos[0]->fbiInit1 & 2) ? 1 : 0); + voodoo_set->voodoos[0]->burst_time = pci_burst_time * ((voodoo_set->voodoos[0]->fbiInit1 & 2) ? 2 : 1); + if (voodoo_set->nr_cards == 2) { + voodoo_pixelclock_update(voodoo_set->voodoos[1]); + voodoo_set->voodoos[1]->read_time = pci_nonburst_time + pci_burst_time * ((voodoo_set->voodoos[1]->fbiInit4 & 1) ? 2 : 1); + voodoo_set->voodoos[1]->write_time = pci_nonburst_time + pci_burst_time * ((voodoo_set->voodoos[1]->fbiInit1 & 2) ? 1 : 0); + voodoo_set->voodoos[1]->burst_time = pci_burst_time * ((voodoo_set->voodoos[1]->fbiInit1 & 2) ? 2 : 1); + } + // voodoo_log("Voodoo read_time=%i write_time=%i burst_time=%i %08x %08x\n", voodoo->read_time, voodoo->write_time, voodoo->burst_time, voodoo->fbiInit1, voodoo->fbiInit4); +} - voodoo_set->nr_cards = device_get_config_int("sli") ? 2 : 1; - voodoo_set->voodoos[0] = voodoo_card_init(); - voodoo_set->voodoos[0]->set = voodoo_set; - if (voodoo_set->nr_cards == 2) - { - voodoo_set->voodoos[1] = voodoo_card_init(); +static void +voodoo_force_blit(void *p) +{ + voodoo_set_t *voodoo_set = (voodoo_set_t *) p; - voodoo_set->voodoos[1]->set = voodoo_set; - - if (type == VOODOO_2) - { - voodoo_set->voodoos[0]->fbiInit5 |= FBIINIT5_MULTI_CVG; - voodoo_set->voodoos[1]->fbiInit5 |= FBIINIT5_MULTI_CVG; - } - else - { - voodoo_set->voodoos[0]->fbiInit1 |= FBIINIT1_MULTI_SST; - voodoo_set->voodoos[1]->fbiInit1 |= FBIINIT1_MULTI_SST; - } + thread_wait_mutex(voodoo_set->voodoos[0]->force_blit_mutex); + if (voodoo_set->voodoos[0]->can_blit) { + voodoo_set->voodoos[0]->force_blit_count++; + } + thread_release_mutex(voodoo_set->voodoos[0]->force_blit_mutex); + if (voodoo_set->nr_cards == 2) { + thread_wait_mutex(voodoo_set->voodoos[1]->force_blit_mutex); + if (voodoo_set->voodoos[1]->can_blit) { + voodoo_set->voodoos[1]->force_blit_count++; } + thread_release_mutex(voodoo_set->voodoos[1]->force_blit_mutex); + } +} - switch (type) - { - case VOODOO_1: - if (voodoo_set->nr_cards == 2) - tmuConfig = 1 | (3 << 3); - else - tmuConfig = 1; - break; - case VOODOO_SB50: - if (voodoo_set->nr_cards == 2) - tmuConfig = 1 | (3 << 3) | (3 << 6) | (2 << 9); - else - tmuConfig = 1 | (3 << 6); - break; - case VOODOO_2: +void * +voodoo_card_init() +{ + int c; + voodoo_t *voodoo = malloc(sizeof(voodoo_t)); + memset(voodoo, 0, sizeof(voodoo_t)); + + voodoo->bilinear_enabled = device_get_config_int("bilinear"); + voodoo->dithersub_enabled = device_get_config_int("dithersub"); + voodoo->scrfilter = device_get_config_int("dacfilter"); + voodoo->texture_size = device_get_config_int("texture_memory"); + voodoo->texture_mask = (voodoo->texture_size << 20) - 1; + voodoo->fb_size = device_get_config_int("framebuffer_memory"); + voodoo->fb_mask = (voodoo->fb_size << 20) - 1; + voodoo->render_threads = device_get_config_int("render_threads"); + voodoo->odd_even_mask = voodoo->render_threads - 1; +#ifndef NO_CODEGEN + voodoo->use_recompiler = device_get_config_int("recompiler"); +#endif + voodoo->type = device_get_config_int("type"); + switch (voodoo->type) { + case VOODOO_1: + voodoo->dual_tmus = 0; + break; + case VOODOO_SB50: + voodoo->dual_tmus = 1; + break; + case VOODOO_2: + voodoo->dual_tmus = 1; + break; + } + + if (voodoo->type == VOODOO_2) /*generate filter lookup tables*/ + voodoo_generate_filter_v2(voodoo); + else + voodoo_generate_filter_v1(voodoo); + + pci_add_card(PCI_ADD_NORMAL, voodoo_pci_read, voodoo_pci_write, voodoo); + + mem_mapping_add(&voodoo->mapping, 0, 0, NULL, voodoo_readw, voodoo_readl, NULL, voodoo_writew, voodoo_writel, NULL, MEM_MAPPING_EXTERNAL, voodoo); + + voodoo->fb_mem = malloc(4 * 1024 * 1024); + voodoo->tex_mem[0] = malloc(voodoo->texture_size * 1024 * 1024); + if (voodoo->dual_tmus) + voodoo->tex_mem[1] = malloc(voodoo->texture_size * 1024 * 1024); + voodoo->tex_mem_w[0] = (uint16_t *) voodoo->tex_mem[0]; + voodoo->tex_mem_w[1] = (uint16_t *) voodoo->tex_mem[1]; + + for (c = 0; c < TEX_CACHE_MAX; c++) { + voodoo->texture_cache[0][c].data = malloc((256 * 256 + 256 * 256 + 128 * 128 + 64 * 64 + 32 * 32 + 16 * 16 + 8 * 8 + 4 * 4 + 2 * 2) * 4); + voodoo->texture_cache[0][c].base = -1; /*invalid*/ + voodoo->texture_cache[0][c].refcount = 0; + if (voodoo->dual_tmus) { + voodoo->texture_cache[1][c].data = malloc((256 * 256 + 256 * 256 + 128 * 128 + 64 * 64 + 32 * 32 + 16 * 16 + 8 * 8 + 4 * 4 + 2 * 2) * 4); + voodoo->texture_cache[1][c].base = -1; /*invalid*/ + voodoo->texture_cache[1][c].refcount = 0; + } + } + + timer_add(&voodoo->timer, voodoo_callback, voodoo, 1); + + voodoo->svga = svga_get_pri(); + voodoo->fbiInit0 = 0; + + voodoo->wake_fifo_thread = thread_create_event(); + voodoo->wake_render_thread[0] = thread_create_event(); + voodoo->wake_render_thread[1] = thread_create_event(); + voodoo->wake_render_thread[2] = thread_create_event(); + voodoo->wake_render_thread[3] = thread_create_event(); + voodoo->wake_main_thread = thread_create_event(); + voodoo->fifo_not_full_event = thread_create_event(); + voodoo->render_not_full_event[0] = thread_create_event(); + voodoo->render_not_full_event[1] = thread_create_event(); + voodoo->render_not_full_event[2] = thread_create_event(); + voodoo->render_not_full_event[3] = thread_create_event(); + voodoo->fifo_thread_run = 1; + voodoo->fifo_thread = thread_create(voodoo_fifo_thread, voodoo); + voodoo->render_thread_run[0] = 1; + voodoo->render_thread[0] = thread_create(voodoo_render_thread_1, voodoo); + if (voodoo->render_threads >= 2) { + voodoo->render_thread_run[1] = 1; + voodoo->render_thread[1] = thread_create(voodoo_render_thread_2, voodoo); + } + if (voodoo->render_threads == 4) { + voodoo->render_thread_run[2] = 1; + voodoo->render_thread[2] = thread_create(voodoo_render_thread_3, voodoo); + voodoo->render_thread_run[3] = 1; + voodoo->render_thread[3] = thread_create(voodoo_render_thread_4, voodoo); + } + voodoo->swap_mutex = thread_create_mutex(); + timer_add(&voodoo->wake_timer, voodoo_wake_timer, (void *) voodoo, 0); + + for (c = 0; c < 0x100; c++) { + rgb332[c].r = c & 0xe0; + rgb332[c].g = (c << 3) & 0xe0; + rgb332[c].b = (c << 6) & 0xc0; + rgb332[c].r = rgb332[c].r | (rgb332[c].r >> 3) | (rgb332[c].r >> 6); + rgb332[c].g = rgb332[c].g | (rgb332[c].g >> 3) | (rgb332[c].g >> 6); + rgb332[c].b = rgb332[c].b | (rgb332[c].b >> 2); + rgb332[c].b = rgb332[c].b | (rgb332[c].b >> 4); + rgb332[c].a = 0xff; + + ai44[c].a = (c & 0xf0) | ((c & 0xf0) >> 4); + ai44[c].r = (c & 0x0f) | ((c & 0x0f) << 4); + ai44[c].g = ai44[c].b = ai44[c].r; + } + + for (c = 0; c < 0x10000; c++) { + rgb565[c].r = (c >> 8) & 0xf8; + rgb565[c].g = (c >> 3) & 0xfc; + rgb565[c].b = (c << 3) & 0xf8; + rgb565[c].r |= (rgb565[c].r >> 5); + rgb565[c].g |= (rgb565[c].g >> 6); + rgb565[c].b |= (rgb565[c].b >> 5); + rgb565[c].a = 0xff; + + argb1555[c].r = (c >> 7) & 0xf8; + argb1555[c].g = (c >> 2) & 0xf8; + argb1555[c].b = (c << 3) & 0xf8; + argb1555[c].r |= (argb1555[c].r >> 5); + argb1555[c].g |= (argb1555[c].g >> 5); + argb1555[c].b |= (argb1555[c].b >> 5); + argb1555[c].a = (c & 0x8000) ? 0xff : 0; + + argb4444[c].a = (c >> 8) & 0xf0; + argb4444[c].r = (c >> 4) & 0xf0; + argb4444[c].g = c & 0xf0; + argb4444[c].b = (c << 4) & 0xf0; + argb4444[c].a |= (argb4444[c].a >> 4); + argb4444[c].r |= (argb4444[c].r >> 4); + argb4444[c].g |= (argb4444[c].g >> 4); + argb4444[c].b |= (argb4444[c].b >> 4); + + ai88[c].a = (c >> 8); + ai88[c].r = c & 0xff; + ai88[c].g = c & 0xff; + ai88[c].b = c & 0xff; + } +#ifndef NO_CODEGEN + voodoo_codegen_init(voodoo); +#endif + + voodoo->disp_buffer = 0; + voodoo->draw_buffer = 1; + + voodoo->force_blit_count = 0; + voodoo->can_blit = 0; + voodoo->force_blit_mutex = thread_create_mutex(); + + return voodoo; +} + +void * +voodoo_2d3d_card_init(int type) +{ + int c; + voodoo_t *voodoo = malloc(sizeof(voodoo_t)); + memset(voodoo, 0, sizeof(voodoo_t)); + + voodoo->bilinear_enabled = device_get_config_int("bilinear"); + voodoo->dithersub_enabled = device_get_config_int("dithersub"); + voodoo->scrfilter = device_get_config_int("dacfilter"); + voodoo->render_threads = device_get_config_int("render_threads"); + voodoo->odd_even_mask = voodoo->render_threads - 1; +#ifndef NO_CODEGEN + voodoo->use_recompiler = device_get_config_int("recompiler"); +#endif + voodoo->type = type; + voodoo->dual_tmus = (type == VOODOO_3) ? 1 : 0; + + /*generate filter lookup tables*/ + voodoo_generate_filter_v2(voodoo); + + for (c = 0; c < TEX_CACHE_MAX; c++) { + voodoo->texture_cache[0][c].data = malloc((256 * 256 + 256 * 256 + 128 * 128 + 64 * 64 + 32 * 32 + 16 * 16 + 8 * 8 + 4 * 4 + 2 * 2) * 4); + voodoo->texture_cache[0][c].base = -1; /*invalid*/ + voodoo->texture_cache[0][c].refcount = 0; + if (voodoo->dual_tmus) { + voodoo->texture_cache[1][c].data = malloc((256 * 256 + 256 * 256 + 128 * 128 + 64 * 64 + 32 * 32 + 16 * 16 + 8 * 8 + 4 * 4 + 2 * 2) * 4); + voodoo->texture_cache[1][c].base = -1; /*invalid*/ + voodoo->texture_cache[1][c].refcount = 0; + } + } + + timer_add(&voodoo->timer, voodoo_callback, voodoo, 1); + + voodoo->fbiInit0 = 0; + + voodoo->wake_fifo_thread = thread_create_event(); + voodoo->wake_render_thread[0] = thread_create_event(); + voodoo->wake_render_thread[1] = thread_create_event(); + voodoo->wake_render_thread[2] = thread_create_event(); + voodoo->wake_render_thread[3] = thread_create_event(); + voodoo->wake_main_thread = thread_create_event(); + voodoo->fifo_not_full_event = thread_create_event(); + voodoo->render_not_full_event[0] = thread_create_event(); + voodoo->render_not_full_event[1] = thread_create_event(); + voodoo->render_not_full_event[2] = thread_create_event(); + voodoo->render_not_full_event[3] = thread_create_event(); + voodoo->fifo_thread_run = 1; + voodoo->fifo_thread = thread_create(voodoo_fifo_thread, voodoo); + voodoo->render_thread_run[0] = 1; + voodoo->render_thread[0] = thread_create(voodoo_render_thread_1, voodoo); + if (voodoo->render_threads >= 2) { + voodoo->render_thread_run[1] = 1; + voodoo->render_thread[1] = thread_create(voodoo_render_thread_2, voodoo); + } + if (voodoo->render_threads == 4) { + voodoo->render_thread_run[2] = 1; + voodoo->render_thread[2] = thread_create(voodoo_render_thread_3, voodoo); + voodoo->render_thread_run[3] = 1; + voodoo->render_thread[3] = thread_create(voodoo_render_thread_4, voodoo); + } + voodoo->swap_mutex = thread_create_mutex(); + timer_add(&voodoo->wake_timer, voodoo_wake_timer, (void *) voodoo, 0); + + for (c = 0; c < 0x100; c++) { + rgb332[c].r = c & 0xe0; + rgb332[c].g = (c << 3) & 0xe0; + rgb332[c].b = (c << 6) & 0xc0; + rgb332[c].r = rgb332[c].r | (rgb332[c].r >> 3) | (rgb332[c].r >> 6); + rgb332[c].g = rgb332[c].g | (rgb332[c].g >> 3) | (rgb332[c].g >> 6); + rgb332[c].b = rgb332[c].b | (rgb332[c].b >> 2); + rgb332[c].b = rgb332[c].b | (rgb332[c].b >> 4); + rgb332[c].a = 0xff; + + ai44[c].a = (c & 0xf0) | ((c & 0xf0) >> 4); + ai44[c].r = (c & 0x0f) | ((c & 0x0f) << 4); + ai44[c].g = ai44[c].b = ai44[c].r; + } + + for (c = 0; c < 0x10000; c++) { + rgb565[c].r = (c >> 8) & 0xf8; + rgb565[c].g = (c >> 3) & 0xfc; + rgb565[c].b = (c << 3) & 0xf8; + rgb565[c].r |= (rgb565[c].r >> 5); + rgb565[c].g |= (rgb565[c].g >> 6); + rgb565[c].b |= (rgb565[c].b >> 5); + rgb565[c].a = 0xff; + + argb1555[c].r = (c >> 7) & 0xf8; + argb1555[c].g = (c >> 2) & 0xf8; + argb1555[c].b = (c << 3) & 0xf8; + argb1555[c].r |= (argb1555[c].r >> 5); + argb1555[c].g |= (argb1555[c].g >> 5); + argb1555[c].b |= (argb1555[c].b >> 5); + argb1555[c].a = (c & 0x8000) ? 0xff : 0; + + argb4444[c].a = (c >> 8) & 0xf0; + argb4444[c].r = (c >> 4) & 0xf0; + argb4444[c].g = c & 0xf0; + argb4444[c].b = (c << 4) & 0xf0; + argb4444[c].a |= (argb4444[c].a >> 4); + argb4444[c].r |= (argb4444[c].r >> 4); + argb4444[c].g |= (argb4444[c].g >> 4); + argb4444[c].b |= (argb4444[c].b >> 4); + + ai88[c].a = (c >> 8); + ai88[c].r = c & 0xff; + ai88[c].g = c & 0xff; + ai88[c].b = c & 0xff; + } +#ifndef NO_CODEGEN + voodoo_codegen_init(voodoo); +#endif + + voodoo->disp_buffer = 0; + voodoo->draw_buffer = 1; + + voodoo->force_blit_count = 0; + voodoo->can_blit = 0; + voodoo->force_blit_mutex = thread_create_mutex(); + + return voodoo; +} + +void * +voodoo_init() +{ + voodoo_set_t *voodoo_set = malloc(sizeof(voodoo_set_t)); + uint32_t tmuConfig = 1; + int type; + memset(voodoo_set, 0, sizeof(voodoo_set_t)); + + type = device_get_config_int("type"); + + voodoo_set->nr_cards = device_get_config_int("sli") ? 2 : 1; + voodoo_set->voodoos[0] = voodoo_card_init(); + voodoo_set->voodoos[0]->set = voodoo_set; + if (voodoo_set->nr_cards == 2) { + voodoo_set->voodoos[1] = voodoo_card_init(); + + voodoo_set->voodoos[1]->set = voodoo_set; + + if (type == VOODOO_2) { + voodoo_set->voodoos[0]->fbiInit5 |= FBIINIT5_MULTI_CVG; + voodoo_set->voodoos[1]->fbiInit5 |= FBIINIT5_MULTI_CVG; + } else { + voodoo_set->voodoos[0]->fbiInit1 |= FBIINIT1_MULTI_SST; + voodoo_set->voodoos[1]->fbiInit1 |= FBIINIT1_MULTI_SST; + } + } + + switch (type) { + case VOODOO_1: + if (voodoo_set->nr_cards == 2) + tmuConfig = 1 | (3 << 3); + else + tmuConfig = 1; + break; + case VOODOO_SB50: + if (voodoo_set->nr_cards == 2) + tmuConfig = 1 | (3 << 3) | (3 << 6) | (2 << 9); + else tmuConfig = 1 | (3 << 6); - break; - } + break; + case VOODOO_2: + tmuConfig = 1 | (3 << 6); + break; + } - voodoo_set->voodoos[0]->tmuConfig = tmuConfig; - if (voodoo_set->nr_cards == 2) - voodoo_set->voodoos[1]->tmuConfig = tmuConfig; + voodoo_set->voodoos[0]->tmuConfig = tmuConfig; + if (voodoo_set->nr_cards == 2) + voodoo_set->voodoos[1]->tmuConfig = tmuConfig; - mem_mapping_add(&voodoo_set->snoop_mapping, 0, 0, NULL, voodoo_snoop_readw, voodoo_snoop_readl, NULL, voodoo_snoop_writew, voodoo_snoop_writel, NULL, MEM_MAPPING_EXTERNAL, voodoo_set); + mem_mapping_add(&voodoo_set->snoop_mapping, 0, 0, NULL, voodoo_snoop_readw, voodoo_snoop_readl, NULL, voodoo_snoop_writew, voodoo_snoop_writel, NULL, MEM_MAPPING_EXTERNAL, voodoo_set); - return voodoo_set; + return voodoo_set; } -void voodoo_card_close(voodoo_t *voodoo) +void +voodoo_card_close(voodoo_t *voodoo) { - int c; + int c; - voodoo->fifo_thread_run = 0; - thread_set_event(voodoo->wake_fifo_thread); - thread_wait(voodoo->fifo_thread); - voodoo->render_thread_run[0] = 0; - thread_set_event(voodoo->wake_render_thread[0]); - thread_wait(voodoo->render_thread[0]); - if (voodoo->render_threads >= 2) { - voodoo->render_thread_run[1] = 0; - thread_set_event(voodoo->wake_render_thread[1]); - thread_wait(voodoo->render_thread[1]); - } - if (voodoo->render_threads == 4) { - voodoo->render_thread_run[2] = 0; - thread_set_event(voodoo->wake_render_thread[2]); - thread_wait(voodoo->render_thread[2]); - voodoo->render_thread_run[3] = 0; - thread_set_event(voodoo->wake_render_thread[3]); - thread_wait(voodoo->render_thread[3]); - } - thread_destroy_event(voodoo->fifo_not_full_event); - thread_destroy_event(voodoo->wake_main_thread); - thread_destroy_event(voodoo->wake_fifo_thread); - thread_destroy_event(voodoo->wake_render_thread[0]); - thread_destroy_event(voodoo->wake_render_thread[1]); - thread_destroy_event(voodoo->render_not_full_event[0]); - thread_destroy_event(voodoo->render_not_full_event[1]); + voodoo->fifo_thread_run = 0; + thread_set_event(voodoo->wake_fifo_thread); + thread_wait(voodoo->fifo_thread); + voodoo->render_thread_run[0] = 0; + thread_set_event(voodoo->wake_render_thread[0]); + thread_wait(voodoo->render_thread[0]); + if (voodoo->render_threads >= 2) { + voodoo->render_thread_run[1] = 0; + thread_set_event(voodoo->wake_render_thread[1]); + thread_wait(voodoo->render_thread[1]); + } + if (voodoo->render_threads == 4) { + voodoo->render_thread_run[2] = 0; + thread_set_event(voodoo->wake_render_thread[2]); + thread_wait(voodoo->render_thread[2]); + voodoo->render_thread_run[3] = 0; + thread_set_event(voodoo->wake_render_thread[3]); + thread_wait(voodoo->render_thread[3]); + } + thread_destroy_event(voodoo->fifo_not_full_event); + thread_destroy_event(voodoo->wake_main_thread); + thread_destroy_event(voodoo->wake_fifo_thread); + thread_destroy_event(voodoo->wake_render_thread[0]); + thread_destroy_event(voodoo->wake_render_thread[1]); + thread_destroy_event(voodoo->render_not_full_event[0]); + thread_destroy_event(voodoo->render_not_full_event[1]); - for (c = 0; c < TEX_CACHE_MAX; c++) - { - if (voodoo->dual_tmus) - free(voodoo->texture_cache[1][c].data); - free(voodoo->texture_cache[0][c].data); - } + for (c = 0; c < TEX_CACHE_MAX; c++) { + if (voodoo->dual_tmus) + free(voodoo->texture_cache[1][c].data); + free(voodoo->texture_cache[0][c].data); + } #ifndef NO_CODEGEN - voodoo_codegen_close(voodoo); + voodoo_codegen_close(voodoo); #endif - if (voodoo->type < VOODOO_BANSHEE && voodoo->fb_mem) - { - free(voodoo->fb_mem); - if (voodoo->dual_tmus) - free(voodoo->tex_mem[1]); - free(voodoo->tex_mem[0]); - } + if (voodoo->type < VOODOO_BANSHEE && voodoo->fb_mem) { + free(voodoo->fb_mem); + if (voodoo->dual_tmus) + free(voodoo->tex_mem[1]); + free(voodoo->tex_mem[0]); + } - thread_close_mutex(voodoo->force_blit_mutex); + thread_close_mutex(voodoo->force_blit_mutex); - free(voodoo); + free(voodoo); } -void voodoo_close(void *p) +void +voodoo_close(void *p) { - voodoo_set_t *voodoo_set = (voodoo_set_t *)p; + voodoo_set_t *voodoo_set = (voodoo_set_t *) p; - if (voodoo_set->nr_cards == 2) - voodoo_card_close(voodoo_set->voodoos[1]); - voodoo_card_close(voodoo_set->voodoos[0]); + if (voodoo_set->nr_cards == 2) + voodoo_card_close(voodoo_set->voodoos[1]); + voodoo_card_close(voodoo_set->voodoos[0]); - free(voodoo_set); + free(voodoo_set); } static const device_config_t voodoo_config[] = { -// clang-format off + // clang-format off { .name = "type", .description = "Voodoo type", @@ -1424,17 +1391,16 @@ static const device_config_t voodoo_config[] = { // clang-format on }; -const device_t voodoo_device = -{ - .name = "3DFX Voodoo Graphics", +const device_t voodoo_device = { + .name = "3DFX Voodoo Graphics", .internal_name = "voodoo", - .flags = DEVICE_PCI, - .local = 0, - .init = voodoo_init, - .close = voodoo_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = 0, + .init = voodoo_init, + .close = voodoo_close, + .reset = NULL, { .available = NULL }, .speed_changed = voodoo_speed_changed, - .force_redraw = voodoo_force_blit, - .config = voodoo_config + .force_redraw = voodoo_force_blit, + .config = voodoo_config }; diff --git a/src/video/vid_voodoo_banshee.c b/src/video/vid_voodoo_banshee.c index 42b06eb4b..b0ac32035 100644 --- a/src/video/vid_voodoo_banshee.c +++ b/src/video/vid_voodoo_banshee.c @@ -44,237 +44,232 @@ #include <86box/vid_voodoo_regs.h> #include <86box/vid_voodoo_render.h> - -static video_timings_t timing_banshee = {VIDEO_PCI, 2, 2, 1, 20, 20, 21}; -static video_timings_t timing_banshee_agp = {VIDEO_AGP, 2, 2, 1, 20, 20, 21}; - +static video_timings_t timing_banshee = { .type = VIDEO_PCI, .write_b = 2, .write_w = 2, .write_l = 1, .read_b = 20, .read_w = 20, .read_l = 21 }; +static video_timings_t timing_banshee_agp = { .type = VIDEO_AGP, .write_b = 2, .write_w = 2, .write_l = 1, .read_b = 20, .read_w = 20, .read_l = 21 }; #ifdef CLAMP -#undef CLAMP +# undef CLAMP #endif static uint8_t vb_filter_v1_rb[256][256]; -static uint8_t vb_filter_v1_g [256][256]; +static uint8_t vb_filter_v1_g[256][256]; static uint8_t vb_filter_bx_rb[256][256]; -static uint8_t vb_filter_bx_g [256][256]; +static uint8_t vb_filter_bx_g[256][256]; -enum -{ - TYPE_BANSHEE = 0, - TYPE_V3_2000, - TYPE_V3_3000, - TYPE_VELOCITY100 +enum { + TYPE_BANSHEE = 0, + TYPE_V3_2000, + TYPE_V3_3000, + TYPE_VELOCITY100 }; -typedef struct banshee_t -{ - svga_t svga; +typedef struct banshee_t { + svga_t svga; - rom_t bios_rom; + rom_t bios_rom; - uint8_t pci_regs[256]; + uint8_t pci_regs[256]; - uint32_t memBaseAddr0; - uint32_t memBaseAddr1; - uint32_t ioBaseAddr; + uint32_t memBaseAddr0; + uint32_t memBaseAddr1; + uint32_t ioBaseAddr; - uint32_t agpInit0; - uint32_t dramInit0, dramInit1; - uint32_t lfbMemoryConfig; - uint32_t miscInit0, miscInit1; - uint32_t pciInit0; - uint32_t vgaInit0, vgaInit1; + uint32_t agpInit0; + uint32_t dramInit0, dramInit1; + uint32_t lfbMemoryConfig; + uint32_t miscInit0, miscInit1; + uint32_t pciInit0; + uint32_t vgaInit0, vgaInit1; - uint32_t command_2d; - uint32_t srcBaseAddr_2d; + uint32_t command_2d; + uint32_t srcBaseAddr_2d; - uint32_t pllCtrl0, pllCtrl1, pllCtrl2; + uint32_t pllCtrl0, pllCtrl1, pllCtrl2; - uint32_t dacMode; - int dacAddr; + uint32_t dacMode; + int dacAddr; - uint32_t vidDesktopOverlayStride; - uint32_t vidDesktopStartAddr; - uint32_t vidProcCfg; - uint32_t vidScreenSize; - uint32_t vidSerialParallelPort; + uint32_t vidDesktopOverlayStride; + uint32_t vidDesktopStartAddr; + uint32_t vidProcCfg; + uint32_t vidScreenSize; + uint32_t vidSerialParallelPort; - int overlay_pix_fmt; + int overlay_pix_fmt; - uint32_t hwCurPatAddr, hwCurLoc, hwCurC0, hwCurC1; + uint32_t hwCurPatAddr, hwCurLoc, hwCurC0, hwCurC1; - uint32_t intrCtrl; + uint32_t intrCtrl; - uint32_t overlay_buffer[2][4096]; + uint32_t overlay_buffer[2][4096]; - mem_mapping_t linear_mapping; + mem_mapping_t linear_mapping; - mem_mapping_t reg_mapping_low; /*0000000-07fffff*/ - mem_mapping_t reg_mapping_high; /*0c00000-1ffffff - Windows 2000 puts the BIOS ROM in between these two areas*/ + mem_mapping_t reg_mapping_low; /*0000000-07fffff*/ + mem_mapping_t reg_mapping_high; /*0c00000-1ffffff - Windows 2000 puts the BIOS ROM in between these two areas*/ - voodoo_t *voodoo; + voodoo_t *voodoo; - uint32_t desktop_addr; - int desktop_y; - uint32_t desktop_stride_tiled; + uint32_t desktop_addr; + int desktop_y; + uint32_t desktop_stride_tiled; - int type, card, agp, has_bios; - int vblank_irq; + int type, card, agp, has_bios; + int vblank_irq; - void *i2c, *i2c_ddc, *ddc; + void *i2c, *i2c_ddc, *ddc; } banshee_t; -enum -{ - Init_status = 0x00, - Init_pciInit0 = 0x04, - Init_lfbMemoryConfig = 0x0c, - Init_miscInit0 = 0x10, - Init_miscInit1 = 0x14, - Init_dramInit0 = 0x18, - Init_dramInit1 = 0x1c, - Init_agpInit0 = 0x20, - Init_vgaInit0 = 0x28, - Init_vgaInit1 = 0x2c, - Init_2dCommand = 0x30, - Init_2dSrcBaseAddr = 0x34, - Init_strapInfo = 0x38, +enum { + Init_status = 0x00, + Init_pciInit0 = 0x04, + Init_lfbMemoryConfig = 0x0c, + Init_miscInit0 = 0x10, + Init_miscInit1 = 0x14, + Init_dramInit0 = 0x18, + Init_dramInit1 = 0x1c, + Init_agpInit0 = 0x20, + Init_vgaInit0 = 0x28, + Init_vgaInit1 = 0x2c, + Init_2dCommand = 0x30, + Init_2dSrcBaseAddr = 0x34, + Init_strapInfo = 0x38, - PLL_pllCtrl0 = 0x40, - PLL_pllCtrl1 = 0x44, - PLL_pllCtrl2 = 0x48, + PLL_pllCtrl0 = 0x40, + PLL_pllCtrl1 = 0x44, + PLL_pllCtrl2 = 0x48, - DAC_dacMode = 0x4c, - DAC_dacAddr = 0x50, - DAC_dacData = 0x54, + DAC_dacMode = 0x4c, + DAC_dacAddr = 0x50, + DAC_dacData = 0x54, - Video_vidProcCfg = 0x5c, - Video_maxRgbDelta = 0x58, - Video_hwCurPatAddr = 0x60, - Video_hwCurLoc = 0x64, - Video_hwCurC0 = 0x68, - Video_hwCurC1 = 0x6c, - Video_vidSerialParallelPort = 0x78, - Video_vidScreenSize = 0x98, - Video_vidOverlayStartCoords = 0x9c, - Video_vidOverlayEndScreenCoords = 0xa0, - Video_vidOverlayDudx = 0xa4, - Video_vidOverlayDudxOffsetSrcWidth = 0xa8, - Video_vidOverlayDvdy = 0xac, - Video_vidOverlayDvdyOffset = 0xe0, - Video_vidDesktopStartAddr = 0xe4, - Video_vidDesktopOverlayStride = 0xe8 + Video_vidProcCfg = 0x5c, + Video_maxRgbDelta = 0x58, + Video_hwCurPatAddr = 0x60, + Video_hwCurLoc = 0x64, + Video_hwCurC0 = 0x68, + Video_hwCurC1 = 0x6c, + Video_vidSerialParallelPort = 0x78, + Video_vidScreenSize = 0x98, + Video_vidOverlayStartCoords = 0x9c, + Video_vidOverlayEndScreenCoords = 0xa0, + Video_vidOverlayDudx = 0xa4, + Video_vidOverlayDudxOffsetSrcWidth = 0xa8, + Video_vidOverlayDvdy = 0xac, + Video_vidOverlayDvdyOffset = 0xe0, + Video_vidDesktopStartAddr = 0xe4, + Video_vidDesktopOverlayStride = 0xe8 }; -enum -{ - cmdBaseAddr0 = 0x20, - cmdBaseSize0 = 0x24, - cmdBump0 = 0x28, - cmdRdPtrL0 = 0x2c, - cmdRdPtrH0 = 0x30, - cmdAMin0 = 0x34, - cmdAMax0 = 0x3c, - cmdFifoDepth0 = 0x44, - cmdHoleCnt0 = 0x48 +enum { + cmdBaseAddr0 = 0x20, + cmdBaseSize0 = 0x24, + cmdBump0 = 0x28, + cmdRdPtrL0 = 0x2c, + cmdRdPtrH0 = 0x30, + cmdAMin0 = 0x34, + cmdAMax0 = 0x3c, + cmdFifoDepth0 = 0x44, + cmdHoleCnt0 = 0x48 }; -#define VGAINIT0_EXTENDED_SHIFT_OUT (1 << 12) +#define VGAINIT0_EXTENDED_SHIFT_OUT (1 << 12) -#define VIDPROCCFG_VIDPROC_ENABLE (1 << 0) -#define VIDPROCCFG_CURSOR_MODE (1 << 1) -#define VIDPROCCFG_INTERLACE (1 << 3) -#define VIDPROCCFG_HALF_MODE (1 << 4) -#define VIDPROCCFG_OVERLAY_ENABLE (1 << 8) -#define VIDPROCCFG_OVERLAY_CLUT_BYPASS (1 << 11) -#define VIDPROCCFG_OVERLAY_CLUT_SEL (1 << 13) -#define VIDPROCCFG_H_SCALE_ENABLE (1 << 14) -#define VIDPROCCFG_V_SCALE_ENABLE (1 << 15) -#define VIDPROCCFG_FILTER_MODE_MASK (3 << 16) -#define VIDPROCCFG_FILTER_MODE_POINT (0 << 16) -#define VIDPROCCFG_FILTER_MODE_DITHER_2X2 (1 << 16) -#define VIDPROCCFG_FILTER_MODE_DITHER_4X4 (2 << 16) -#define VIDPROCCFG_FILTER_MODE_BILINEAR (3 << 16) -#define VIDPROCCFG_DESKTOP_PIX_FORMAT ((banshee->vidProcCfg >> 18) & 7) -#define VIDPROCCFG_OVERLAY_PIX_FORMAT ((banshee->vidProcCfg >> 21) & 7) +#define VIDPROCCFG_VIDPROC_ENABLE (1 << 0) +#define VIDPROCCFG_CURSOR_MODE (1 << 1) +#define VIDPROCCFG_INTERLACE (1 << 3) +#define VIDPROCCFG_HALF_MODE (1 << 4) +#define VIDPROCCFG_OVERLAY_ENABLE (1 << 8) +#define VIDPROCCFG_OVERLAY_CLUT_BYPASS (1 << 11) +#define VIDPROCCFG_OVERLAY_CLUT_SEL (1 << 13) +#define VIDPROCCFG_H_SCALE_ENABLE (1 << 14) +#define VIDPROCCFG_V_SCALE_ENABLE (1 << 15) +#define VIDPROCCFG_FILTER_MODE_MASK (3 << 16) +#define VIDPROCCFG_FILTER_MODE_POINT (0 << 16) +#define VIDPROCCFG_FILTER_MODE_DITHER_2X2 (1 << 16) +#define VIDPROCCFG_FILTER_MODE_DITHER_4X4 (2 << 16) +#define VIDPROCCFG_FILTER_MODE_BILINEAR (3 << 16) +#define VIDPROCCFG_DESKTOP_PIX_FORMAT ((banshee->vidProcCfg >> 18) & 7) +#define VIDPROCCFG_OVERLAY_PIX_FORMAT ((banshee->vidProcCfg >> 21) & 7) #define VIDPROCCFG_OVERLAY_PIX_FORMAT_SHIFT (21) -#define VIDPROCCFG_OVERLAY_PIX_FORMAT_MASK (7 << VIDPROCCFG_OVERLAY_PIX_FORMAT_SHIFT) -#define VIDPROCCFG_DESKTOP_TILE (1 << 24) -#define VIDPROCCFG_OVERLAY_TILE (1 << 25) -#define VIDPROCCFG_2X_MODE (1 << 26) -#define VIDPROCCFG_HWCURSOR_ENA (1 << 27) +#define VIDPROCCFG_OVERLAY_PIX_FORMAT_MASK (7 << VIDPROCCFG_OVERLAY_PIX_FORMAT_SHIFT) +#define VIDPROCCFG_DESKTOP_TILE (1 << 24) +#define VIDPROCCFG_OVERLAY_TILE (1 << 25) +#define VIDPROCCFG_2X_MODE (1 << 26) +#define VIDPROCCFG_HWCURSOR_ENA (1 << 27) -#define OVERLAY_FMT_565 (1) -#define OVERLAY_FMT_YUYV422 (5) -#define OVERLAY_FMT_UYVY422 (6) -#define OVERLAY_FMT_565_DITHER (7) +#define OVERLAY_FMT_565 (1) +#define OVERLAY_FMT_YUYV422 (5) +#define OVERLAY_FMT_UYVY422 (6) +#define OVERLAY_FMT_565_DITHER (7) -#define OVERLAY_START_X_MASK (0xfff) -#define OVERLAY_START_Y_SHIFT (12) -#define OVERLAY_START_Y_MASK (0xfff << OVERLAY_START_Y_SHIFT) +#define OVERLAY_START_X_MASK (0xfff) +#define OVERLAY_START_Y_SHIFT (12) +#define OVERLAY_START_Y_MASK (0xfff << OVERLAY_START_Y_SHIFT) -#define OVERLAY_END_X_MASK (0xfff) -#define OVERLAY_END_Y_SHIFT (12) -#define OVERLAY_END_Y_MASK (0xfff << OVERLAY_END_Y_SHIFT) +#define OVERLAY_END_X_MASK (0xfff) +#define OVERLAY_END_Y_SHIFT (12) +#define OVERLAY_END_Y_MASK (0xfff << OVERLAY_END_Y_SHIFT) -#define OVERLAY_SRC_WIDTH_SHIFT (19) -#define OVERLAY_SRC_WIDTH_MASK (0x1fff << OVERLAY_SRC_WIDTH_SHIFT) +#define OVERLAY_SRC_WIDTH_SHIFT (19) +#define OVERLAY_SRC_WIDTH_MASK (0x1fff << OVERLAY_SRC_WIDTH_SHIFT) -#define VID_STRIDE_OVERLAY_SHIFT (16) -#define VID_STRIDE_OVERLAY_MASK (0x7fff << VID_STRIDE_OVERLAY_SHIFT) +#define VID_STRIDE_OVERLAY_SHIFT (16) +#define VID_STRIDE_OVERLAY_MASK (0x7fff << VID_STRIDE_OVERLAY_SHIFT) -#define VID_DUDX_MASK (0xffffff) -#define VID_DVDY_MASK (0xffffff) +#define VID_DUDX_MASK (0xffffff) +#define VID_DVDY_MASK (0xffffff) -#define PIX_FORMAT_8 0 -#define PIX_FORMAT_RGB565 1 -#define PIX_FORMAT_RGB24 2 -#define PIX_FORMAT_RGB32 3 +#define PIX_FORMAT_8 0 +#define PIX_FORMAT_RGB565 1 +#define PIX_FORMAT_RGB24 2 +#define PIX_FORMAT_RGB32 3 -#define VIDSERIAL_DDC_EN (1 << 18) -#define VIDSERIAL_DDC_DCK_W (1 << 19) -#define VIDSERIAL_DDC_DDA_W (1 << 20) -#define VIDSERIAL_DDC_DCK_R (1 << 21) -#define VIDSERIAL_DDC_DDA_R (1 << 22) -#define VIDSERIAL_I2C_EN (1 << 23) -#define VIDSERIAL_I2C_SCK_W (1 << 24) -#define VIDSERIAL_I2C_SDA_W (1 << 25) -#define VIDSERIAL_I2C_SCK_R (1 << 26) -#define VIDSERIAL_I2C_SDA_R (1 << 27) +#define VIDSERIAL_DDC_EN (1 << 18) +#define VIDSERIAL_DDC_DCK_W (1 << 19) +#define VIDSERIAL_DDC_DDA_W (1 << 20) +#define VIDSERIAL_DDC_DCK_R (1 << 21) +#define VIDSERIAL_DDC_DDA_R (1 << 22) +#define VIDSERIAL_I2C_EN (1 << 23) +#define VIDSERIAL_I2C_SCK_W (1 << 24) +#define VIDSERIAL_I2C_SDA_W (1 << 25) +#define VIDSERIAL_I2C_SCK_R (1 << 26) +#define VIDSERIAL_I2C_SDA_R (1 << 27) -#define MISCINIT0_Y_ORIGIN_SWAP_SHIFT (18) -#define MISCINIT0_Y_ORIGIN_SWAP_MASK (0xfff << MISCINIT0_Y_ORIGIN_SWAP_SHIFT) +#define MISCINIT0_Y_ORIGIN_SWAP_SHIFT (18) +#define MISCINIT0_Y_ORIGIN_SWAP_MASK (0xfff << MISCINIT0_Y_ORIGIN_SWAP_SHIFT) #ifdef ENABLE_BANSHEE_LOG int banshee_do_log = ENABLE_BANSHEE_LOG; - static void banshee_log(const char *fmt, ...) { va_list ap; if (banshee_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define banshee_log(fmt, ...) +# define banshee_log(fmt, ...) #endif static uint32_t banshee_status(banshee_t *banshee); -static int banshee_vga_vsync_enabled(banshee_t *banshee) +static int +banshee_vga_vsync_enabled(banshee_t *banshee) { if (!(banshee->svga.crtc[0x11] & 0x20) && (banshee->svga.crtc[0x11] & 0x10) && ((banshee->pciInit0 >> 18) & 1) != 0) return 1; return 0; } -static void banshee_update_irqs(banshee_t *banshee) +static void +banshee_update_irqs(banshee_t *banshee) { if (banshee->vblank_irq > 0 && banshee_vga_vsync_enabled(banshee)) { pci_set_irq(banshee->card, PCI_INTA); @@ -283,2322 +278,2433 @@ static void banshee_update_irqs(banshee_t *banshee) } } -static void banshee_vblank_start(svga_t* svga) +static void +banshee_vblank_start(svga_t *svga) { - banshee_t *banshee = (banshee_t*)svga->p; + banshee_t *banshee = (banshee_t *) svga->p; if (banshee->vblank_irq >= 0) { banshee->vblank_irq = 1; banshee_update_irqs(banshee); } } - -static void banshee_out(uint16_t addr, uint8_t val, void *p) +static void +banshee_out(uint16_t addr, uint8_t val, void *p) { - banshee_t *banshee = (banshee_t *)p; - svga_t *svga = &banshee->svga; - uint8_t old; + banshee_t *banshee = (banshee_t *) p; + svga_t *svga = &banshee->svga; + uint8_t old; -// /*if (addr != 0x3c9) */banshee_log("banshee_out : %04X %02X %04X:%04X\n", addr, val, CS,cpu_state.pc); + // /*if (addr != 0x3c9) */banshee_log("banshee_out : %04X %02X %04X:%04X\n", addr, val, CS,cpu_state.pc); - if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x3D4: - svga->crtcreg = val & 0x3f; + switch (addr) { + case 0x3D4: + svga->crtcreg = val & 0x3f; + return; + case 0x3D5: + if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) return; - case 0x3D5: - if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80)) - return; - if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) - val = (svga->crtc[7] & ~0x10) | (val & 0x10); - old = svga->crtc[svga->crtcreg]; - svga->crtc[svga->crtcreg] = val; - if (old != val) - { - if (svga->crtcreg == 0x11) { - if (!(val & 0x10)) { - if (banshee->vblank_irq > 0) - banshee->vblank_irq = -1; - } else if (banshee->vblank_irq < 0) { - banshee->vblank_irq = 0; - } - banshee_update_irqs(banshee); - if ((val & ~0x30) == (old & ~0x30)) - old = val; - } - if (svga->crtcreg < 0xe || svga->crtcreg > 0x11 || (svga->crtcreg == 0x11 && old != val)) - { - if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { - svga->fullchange = 3; - svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); - } else { - svga->fullchange = changeframecount; - svga_recalctimings(svga); - } - } + if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80)) + val = (svga->crtc[7] & ~0x10) | (val & 0x10); + old = svga->crtc[svga->crtcreg]; + svga->crtc[svga->crtcreg] = val; + if (old != val) { + if (svga->crtcreg == 0x11) { + if (!(val & 0x10)) { + if (banshee->vblank_irq > 0) + banshee->vblank_irq = -1; + } else if (banshee->vblank_irq < 0) { + banshee->vblank_irq = 0; + } + banshee_update_irqs(banshee); + if ((val & ~0x30) == (old & ~0x30)) + old = val; } - break; - } - svga_out(addr, val, svga); + if (svga->crtcreg < 0xe || svga->crtcreg > 0x11 || (svga->crtcreg == 0x11 && old != val)) { + if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) { + svga->fullchange = 3; + svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5); + } else { + svga->fullchange = changeframecount; + svga_recalctimings(svga); + } + } + } + break; + } + svga_out(addr, val, svga); } -static uint8_t banshee_in(uint16_t addr, void *p) +static uint8_t +banshee_in(uint16_t addr, void *p) { - banshee_t *banshee = (banshee_t *)p; - svga_t *svga = &banshee->svga; - uint8_t temp; + banshee_t *banshee = (banshee_t *) p; + svga_t *svga = &banshee->svga; + uint8_t temp; -// if (addr != 0x3da) banshee_log("banshee_in : %04X ", addr); + // if (addr != 0x3da) banshee_log("banshee_in : %04X ", addr); - if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) - addr ^= 0x60; + if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) + addr ^= 0x60; - switch (addr) - { - case 0x3c2: - if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x40) - temp = 0; - else - temp = 0x10; - if (banshee->vblank_irq > 0) - temp |= 0x80; - break; - case 0x3D4: - temp = svga->crtcreg; - break; - case 0x3D5: - temp = svga->crtc[svga->crtcreg]; - break; - default: - temp = svga_in(addr, svga); - break; - } -// if (addr != 0x3da) banshee_log("%02X %04X:%04X %i\n", temp, CS,cpu_state.pc, ins); - return temp; + switch (addr) { + case 0x3c2: + if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x40) + temp = 0; + else + temp = 0x10; + if (banshee->vblank_irq > 0) + temp |= 0x80; + break; + case 0x3D4: + temp = svga->crtcreg; + break; + case 0x3D5: + temp = svga->crtc[svga->crtcreg]; + break; + default: + temp = svga_in(addr, svga); + break; + } + // if (addr != 0x3da) banshee_log("%02X %04X:%04X %i\n", temp, CS,cpu_state.pc, ins); + return temp; } -static void banshee_updatemapping(banshee_t *banshee) +static void +banshee_updatemapping(banshee_t *banshee) { - svga_t *svga = &banshee->svga; + svga_t *svga = &banshee->svga; - if (!(banshee->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) - { -// banshee_log("Update mapping - PCI disabled\n"); - mem_mapping_disable(&svga->mapping); - mem_mapping_disable(&banshee->linear_mapping); - mem_mapping_disable(&banshee->reg_mapping_low); - mem_mapping_disable(&banshee->reg_mapping_high); - return; - } + if (!(banshee->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) { + // banshee_log("Update mapping - PCI disabled\n"); + mem_mapping_disable(&svga->mapping); + mem_mapping_disable(&banshee->linear_mapping); + mem_mapping_disable(&banshee->reg_mapping_low); + mem_mapping_disable(&banshee->reg_mapping_high); + return; + } - banshee_log("Update mapping - bank %02X ", svga->gdcreg[6] & 0xc); - switch (svga->gdcreg[6] & 0xc) /*Banked framebuffer*/ - { - case 0x0: /*128k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); - svga->banked_mask = 0xffff; - break; - case 0x4: /*64k at A0000*/ - mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); - svga->banked_mask = 0xffff; - break; - case 0x8: /*32k at B0000*/ - mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); - svga->banked_mask = 0x7fff; - break; - case 0xC: /*32k at B8000*/ - mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); - svga->banked_mask = 0x7fff; - break; - } + banshee_log("Update mapping - bank %02X ", svga->gdcreg[6] & 0xc); + switch (svga->gdcreg[6] & 0xc) /*Banked framebuffer*/ + { + case 0x0: /*128k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); + svga->banked_mask = 0xffff; + break; + case 0x4: /*64k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + svga->banked_mask = 0xffff; + break; + case 0x8: /*32k at B0000*/ + mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); + svga->banked_mask = 0x7fff; + break; + case 0xC: /*32k at B8000*/ + mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); + svga->banked_mask = 0x7fff; + break; + } - banshee_log("Linear framebuffer %08X ", banshee->memBaseAddr1); - mem_mapping_set_addr(&banshee->linear_mapping, banshee->memBaseAddr1, 32 << 20); - banshee_log("registers %08X\n", banshee->memBaseAddr0); - mem_mapping_set_addr(&banshee->reg_mapping_low, banshee->memBaseAddr0, 8 << 20); - mem_mapping_set_addr(&banshee->reg_mapping_high, banshee->memBaseAddr0 + 0xc00000, 20 << 20); + banshee_log("Linear framebuffer %08X ", banshee->memBaseAddr1); + mem_mapping_set_addr(&banshee->linear_mapping, banshee->memBaseAddr1, 32 << 20); + banshee_log("registers %08X\n", banshee->memBaseAddr0); + mem_mapping_set_addr(&banshee->reg_mapping_low, banshee->memBaseAddr0, 8 << 20); + mem_mapping_set_addr(&banshee->reg_mapping_high, banshee->memBaseAddr0 + 0xc00000, 20 << 20); } -static void banshee_render_16bpp_tiled(svga_t *svga) +static void +banshee_render_16bpp_tiled(svga_t *svga) { - banshee_t *banshee = (banshee_t *)svga->p; - int x; - uint32_t *p = &((uint32_t *)buffer32->line[svga->displine + svga->y_add])[svga->x_add]; - uint32_t addr; - int drawn = 0; + banshee_t *banshee = (banshee_t *) svga->p; + int x; + uint32_t *p = &((uint32_t *) buffer32->line[svga->displine + svga->y_add])[svga->x_add]; + uint32_t addr; + int drawn = 0; - if ((svga->displine + svga->y_add) < 0) - return; + if ((svga->displine + svga->y_add) < 0) + return; - if (banshee->vidProcCfg & VIDPROCCFG_HALF_MODE) - addr = banshee->desktop_addr + ((banshee->desktop_y >> 1) & 31) * 128 + ((banshee->desktop_y >> 6) * banshee->desktop_stride_tiled); + if (banshee->vidProcCfg & VIDPROCCFG_HALF_MODE) + addr = banshee->desktop_addr + ((banshee->desktop_y >> 1) & 31) * 128 + ((banshee->desktop_y >> 6) * banshee->desktop_stride_tiled); + else + addr = banshee->desktop_addr + (banshee->desktop_y & 31) * 128 + ((banshee->desktop_y >> 5) * banshee->desktop_stride_tiled); + + for (x = 0; x <= svga->hdisp; x += 64) { + if (svga->hwcursor_on || svga->overlay_on) + svga->changedvram[addr >> 12] = 2; + if (svga->changedvram[addr >> 12] || svga->fullchange) { + uint16_t *vram_p = (uint16_t *) &svga->vram[addr & svga->vram_display_mask]; + int xx; + + for (xx = 0; xx < 64; xx++) + *p++ = video_16to32[*vram_p++]; + + drawn = 1; + } else + p += 64; + addr += 128 * 32; + } + + if (drawn) { + if (svga->firstline_draw == 2000) + svga->firstline_draw = svga->displine; + svga->lastline_draw = svga->displine; + } + + banshee->desktop_y++; +} + +static void +banshee_recalctimings(svga_t *svga) +{ + banshee_t *banshee = (banshee_t *) svga->p; + voodoo_t *voodoo = banshee->voodoo; + + /*7 R/W Horizontal Retrace End bit 5. - + 6 R/W Horizontal Retrace Start bit 8 0x4 + 5 R/W Horizontal Blank End bit 6. - + 4 R/W Horizontal Blank Start bit 8. 0x3 + 3 R/W Reserved. - + 2 R/W Horizontal Display Enable End bit 8. 0x1 + 1 R/W Reserved. - + 0 R/W Horizontal Total bit 8. 0x0*/ + if (svga->crtc[0x1a] & 0x01) + svga->htotal += 0x100; + if (svga->crtc[0x1a] & 0x04) + svga->hdisp += 0x100; + /*6 R/W Vertical Retrace Start bit 10 0x10 + 5 R/W Reserved. - + 4 R/W Vertical Blank Start bit 10. 0x15 + 3 R/W Reserved. - + 2 R/W Vertical Display Enable End bit 10 0x12 + 1 R/W Reserved. - + 0 R/W Vertical Total bit 10. 0x6*/ + if (svga->crtc[0x1b] & 0x01) + svga->vtotal += 0x400; + if (svga->crtc[0x1b] & 0x04) + svga->dispend += 0x400; + if (svga->crtc[0x1b] & 0x10) + svga->vblankstart += 0x400; + if (svga->crtc[0x1b] & 0x40) + svga->vsyncstart += 0x400; + // banshee_log("svga->hdisp=%i\n", svga->hdisp); + + svga->interlace = 0; + + if (banshee->vgaInit0 & VGAINIT0_EXTENDED_SHIFT_OUT) { + switch (VIDPROCCFG_DESKTOP_PIX_FORMAT) { + case PIX_FORMAT_8: + svga->render = svga_render_8bpp_highres; + svga->bpp = 8; + break; + case PIX_FORMAT_RGB565: + svga->render = (banshee->vidProcCfg & VIDPROCCFG_DESKTOP_TILE) ? banshee_render_16bpp_tiled : svga_render_16bpp_highres; + svga->bpp = 16; + break; + case PIX_FORMAT_RGB24: + svga->render = svga_render_24bpp_highres; + svga->bpp = 24; + break; + case PIX_FORMAT_RGB32: + svga->render = svga_render_32bpp_highres; + svga->bpp = 32; + break; + default: + fatal("Unknown pixel format %08x\n", banshee->vgaInit0); + } + if (!(banshee->vidProcCfg & VIDPROCCFG_DESKTOP_TILE) && (banshee->vidProcCfg & VIDPROCCFG_HALF_MODE)) + svga->rowcount = 1; else - addr = banshee->desktop_addr + (banshee->desktop_y & 31) * 128 + ((banshee->desktop_y >> 5) * banshee->desktop_stride_tiled); - - for (x = 0; x <= svga->hdisp; x += 64) - { - if (svga->hwcursor_on || svga->overlay_on) - svga->changedvram[addr >> 12] = 2; - if (svga->changedvram[addr >> 12] || svga->fullchange) - { - uint16_t *vram_p = (uint16_t *)&svga->vram[addr & svga->vram_display_mask]; - int xx; - - for (xx = 0; xx < 64; xx++) - *p++ = video_16to32[*vram_p++]; - - drawn = 1; - } - else - p += 64; - addr += 128*32; - } - - if (drawn) - { - if (svga->firstline_draw == 2000) - svga->firstline_draw = svga->displine; - svga->lastline_draw = svga->displine; - } - - banshee->desktop_y++; -} - -static void banshee_recalctimings(svga_t *svga) -{ - banshee_t *banshee = (banshee_t *)svga->p; - voodoo_t *voodoo = banshee->voodoo; - -/*7 R/W Horizontal Retrace End bit 5. - - 6 R/W Horizontal Retrace Start bit 8 0x4 - 5 R/W Horizontal Blank End bit 6. - - 4 R/W Horizontal Blank Start bit 8. 0x3 - 3 R/W Reserved. - - 2 R/W Horizontal Display Enable End bit 8. 0x1 - 1 R/W Reserved. - - 0 R/W Horizontal Total bit 8. 0x0*/ - if (svga->crtc[0x1a] & 0x01) svga->htotal += 0x100; - if (svga->crtc[0x1a] & 0x04) svga->hdisp += 0x100; -/*6 R/W Vertical Retrace Start bit 10 0x10 - 5 R/W Reserved. - - 4 R/W Vertical Blank Start bit 10. 0x15 - 3 R/W Reserved. - - 2 R/W Vertical Display Enable End bit 10 0x12 - 1 R/W Reserved. - - 0 R/W Vertical Total bit 10. 0x6*/ - if (svga->crtc[0x1b] & 0x01) svga->vtotal += 0x400; - if (svga->crtc[0x1b] & 0x04) svga->dispend += 0x400; - if (svga->crtc[0x1b] & 0x10) svga->vblankstart += 0x400; - if (svga->crtc[0x1b] & 0x40) svga->vsyncstart += 0x400; -// banshee_log("svga->hdisp=%i\n", svga->hdisp); - - svga->interlace = 0; - - if (banshee->vgaInit0 & VGAINIT0_EXTENDED_SHIFT_OUT) - { - switch (VIDPROCCFG_DESKTOP_PIX_FORMAT) - { - case PIX_FORMAT_8: - svga->render = svga_render_8bpp_highres; - svga->bpp = 8; - break; - case PIX_FORMAT_RGB565: - svga->render = (banshee->vidProcCfg & VIDPROCCFG_DESKTOP_TILE) ? banshee_render_16bpp_tiled : svga_render_16bpp_highres; - svga->bpp = 16; - break; - case PIX_FORMAT_RGB24: - svga->render = svga_render_24bpp_highres; - svga->bpp = 24; - break; - case PIX_FORMAT_RGB32: - svga->render = svga_render_32bpp_highres; - svga->bpp = 32; - break; - default: - fatal("Unknown pixel format %08x\n", banshee->vgaInit0); - } - if (!(banshee->vidProcCfg & VIDPROCCFG_DESKTOP_TILE) && (banshee->vidProcCfg & VIDPROCCFG_HALF_MODE)) - svga->rowcount = 1; - else - svga->rowcount = 0; - if (banshee->vidProcCfg & VIDPROCCFG_DESKTOP_TILE) - svga->rowoffset = ((banshee->vidDesktopOverlayStride & 0x3fff) * 128) >> 3; - else - svga->rowoffset = (banshee->vidDesktopOverlayStride & 0x3fff) >> 3; - svga->ma_latch = banshee->vidDesktopStartAddr >> 2; - banshee->desktop_stride_tiled = (banshee->vidDesktopOverlayStride & 0x3fff) * 128 * 32; -// banshee_log("Extended shift out %i rowoffset=%i %02x\n", VIDPROCCFG_DESKTOP_PIX_FORMAT, svga->rowoffset, svga->crtc[1]); - - svga->char_width = 8; - svga->split = 99999; - - if (banshee->vidProcCfg & VIDPROCCFG_2X_MODE) - { - svga->hdisp *= 2; - svga->htotal *= 2; - } - - svga->interlace = !!(banshee->vidProcCfg & VIDPROCCFG_INTERLACE); - - svga->overlay.ena = banshee->vidProcCfg & VIDPROCCFG_OVERLAY_ENABLE; - - svga->overlay.x = voodoo->overlay.start_x; - svga->overlay.y = voodoo->overlay.start_y; - svga->overlay.cur_xsize = voodoo->overlay.size_x; - svga->overlay.cur_ysize = voodoo->overlay.size_y; - svga->overlay.pitch = (banshee->vidDesktopOverlayStride & VID_STRIDE_OVERLAY_MASK) >> VID_STRIDE_OVERLAY_SHIFT; - if (banshee->vidProcCfg & VIDPROCCFG_OVERLAY_TILE) - svga->overlay.pitch *= 128*32; - if (svga->overlay.cur_xsize <= 0 || svga->overlay.cur_ysize <= 0) - svga->overlay.ena = 0; - if (svga->overlay.ena) - { -/* banshee_log("Overlay enabled : start=%i,%i end=%i,%i size=%i,%i pitch=%x\n", - voodoo->overlay.start_x, voodoo->overlay.start_y, - voodoo->overlay.end_x, voodoo->overlay.end_y, - voodoo->overlay.size_x, voodoo->overlay.size_y, - svga->overlay.pitch);*/ - if (!voodoo->overlay.start_x && !voodoo->overlay.start_y && - svga->hdisp == voodoo->overlay.size_x && svga->dispend == voodoo->overlay.size_y) - { - /*Overlay is full screen, so don't bother rendering the desktop - behind it*/ - svga->render = svga_render_null; - svga->bpp = 0; - } - } - } + svga->rowcount = 0; + if (banshee->vidProcCfg & VIDPROCCFG_DESKTOP_TILE) + svga->rowoffset = ((banshee->vidDesktopOverlayStride & 0x3fff) * 128) >> 3; else - { -// banshee_log("Normal shift out\n"); - svga->bpp = 8; + svga->rowoffset = (banshee->vidDesktopOverlayStride & 0x3fff) >> 3; + svga->ma_latch = banshee->vidDesktopStartAddr >> 2; + banshee->desktop_stride_tiled = (banshee->vidDesktopOverlayStride & 0x3fff) * 128 * 32; + // banshee_log("Extended shift out %i rowoffset=%i %02x\n", VIDPROCCFG_DESKTOP_PIX_FORMAT, svga->rowoffset, svga->crtc[1]); + + svga->char_width = 8; + svga->split = 99999; + + if (banshee->vidProcCfg & VIDPROCCFG_2X_MODE) { + svga->hdisp *= 2; + svga->htotal *= 2; } - svga->fb_only = (banshee->vidProcCfg & VIDPROCCFG_VIDPROC_ENABLE); + svga->interlace = !!(banshee->vidProcCfg & VIDPROCCFG_INTERLACE); - if (((svga->miscout >> 2) & 3) == 3) - { - int k = banshee->pllCtrl0 & 3; - int m = (banshee->pllCtrl0 >> 2) & 0x3f; - int n = (banshee->pllCtrl0 >> 8) & 0xff; - double freq = (((double)n + 2) / (((double)m + 2) * (double)(1 << k))) * 14318184.0; + svga->overlay.ena = banshee->vidProcCfg & VIDPROCCFG_OVERLAY_ENABLE; - svga->clock = (cpuclock * (float)(1ull << 32)) / freq; -// svga->clock = cpuclock / freq; - -// banshee_log("svga->clock = %g %g m=%i k=%i n=%i\n", freq, freq / 1000000.0, m, k, n); + svga->overlay.x = voodoo->overlay.start_x; + svga->overlay.y = voodoo->overlay.start_y; + svga->overlay.cur_xsize = voodoo->overlay.size_x; + svga->overlay.cur_ysize = voodoo->overlay.size_y; + svga->overlay.pitch = (banshee->vidDesktopOverlayStride & VID_STRIDE_OVERLAY_MASK) >> VID_STRIDE_OVERLAY_SHIFT; + if (banshee->vidProcCfg & VIDPROCCFG_OVERLAY_TILE) + svga->overlay.pitch *= 128 * 32; + if (svga->overlay.cur_xsize <= 0 || svga->overlay.cur_ysize <= 0) + svga->overlay.ena = 0; + if (svga->overlay.ena) { + /* banshee_log("Overlay enabled : start=%i,%i end=%i,%i size=%i,%i pitch=%x\n", + voodoo->overlay.start_x, voodoo->overlay.start_y, + voodoo->overlay.end_x, voodoo->overlay.end_y, + voodoo->overlay.size_x, voodoo->overlay.size_y, + svga->overlay.pitch);*/ + if (!voodoo->overlay.start_x && !voodoo->overlay.start_y && svga->hdisp == voodoo->overlay.size_x && svga->dispend == voodoo->overlay.size_y) { + /*Overlay is full screen, so don't bother rendering the desktop + behind it*/ + svga->render = svga_render_null; + svga->bpp = 0; + } } + } else { + // banshee_log("Normal shift out\n"); + svga->bpp = 8; + } + + svga->fb_only = (banshee->vidProcCfg & VIDPROCCFG_VIDPROC_ENABLE); + + if (((svga->miscout >> 2) & 3) == 3) { + int k = banshee->pllCtrl0 & 3; + int m = (banshee->pllCtrl0 >> 2) & 0x3f; + int n = (banshee->pllCtrl0 >> 8) & 0xff; + double freq = (((double) n + 2) / (((double) m + 2) * (double) (1 << k))) * 14318184.0; + + svga->clock = (cpuclock * (float) (1ull << 32)) / freq; + // svga->clock = cpuclock / freq; + + // banshee_log("svga->clock = %g %g m=%i k=%i n=%i\n", freq, freq / 1000000.0, m, k, n); + } } -static void banshee_ext_out(uint16_t addr, uint8_t val, void *p) +static void +banshee_ext_out(uint16_t addr, uint8_t val, void *p) { -// banshee_t *banshee = (banshee_t *)p; -// svga_t *svga = &banshee->svga; + // banshee_t *banshee = (banshee_t *)p; + // svga_t *svga = &banshee->svga; -// banshee_log("banshee_ext_out: addr=%04x val=%02x\n", addr, val); + // banshee_log("banshee_ext_out: addr=%04x val=%02x\n", addr, val); - switch (addr & 0xff) - { - case 0xb0: case 0xb1: case 0xb2: case 0xb3: - case 0xb4: case 0xb5: case 0xb6: case 0xb7: - case 0xb8: case 0xb9: case 0xba: case 0xbb: - case 0xbc: case 0xbd: case 0xbe: case 0xbf: - case 0xc0: case 0xc1: case 0xc2: case 0xc3: - case 0xc4: case 0xc5: case 0xc6: case 0xc7: - case 0xc8: case 0xc9: case 0xca: case 0xcb: - case 0xcc: case 0xcd: case 0xce: case 0xcf: - case 0xd0: case 0xd1: case 0xd2: case 0xd3: - case 0xd4: case 0xd5: case 0xd6: case 0xd7: - case 0xd8: case 0xd9: case 0xda: case 0xdb: - case 0xdc: case 0xdd: case 0xde: case 0xdf: - banshee_out((addr & 0xff)+0x300, val, p); - break; + switch (addr & 0xff) { + case 0xb0: + case 0xb1: + case 0xb2: + case 0xb3: + case 0xb4: + case 0xb5: + case 0xb6: + case 0xb7: + case 0xb8: + case 0xb9: + case 0xba: + case 0xbb: + case 0xbc: + case 0xbd: + case 0xbe: + case 0xbf: + case 0xc0: + case 0xc1: + case 0xc2: + case 0xc3: + case 0xc4: + case 0xc5: + case 0xc6: + case 0xc7: + case 0xc8: + case 0xc9: + case 0xca: + case 0xcb: + case 0xcc: + case 0xcd: + case 0xce: + case 0xcf: + case 0xd0: + case 0xd1: + case 0xd2: + case 0xd3: + case 0xd4: + case 0xd5: + case 0xd6: + case 0xd7: + case 0xd8: + case 0xd9: + case 0xda: + case 0xdb: + case 0xdc: + case 0xdd: + case 0xde: + case 0xdf: + banshee_out((addr & 0xff) + 0x300, val, p); + break; - default: - banshee_log("bad banshee_ext_out: addr=%04x val=%02x\n", addr, val); - } + default: + banshee_log("bad banshee_ext_out: addr=%04x val=%02x\n", addr, val); + } } -static void banshee_ext_outl(uint16_t addr, uint32_t val, void *p) +static void +banshee_ext_outl(uint16_t addr, uint32_t val, void *p) { - banshee_t *banshee = (banshee_t *)p; - voodoo_t *voodoo = banshee->voodoo; - svga_t *svga = &banshee->svga; + banshee_t *banshee = (banshee_t *) p; + voodoo_t *voodoo = banshee->voodoo; + svga_t *svga = &banshee->svga; -// banshee_log("banshee_ext_outl: addr=%04x val=%08x %04x(%08x):%08x\n", addr, val, CS,cs,cpu_state.pc); + // banshee_log("banshee_ext_outl: addr=%04x val=%08x %04x(%08x):%08x\n", addr, val, CS,cs,cpu_state.pc); - switch (addr & 0xff) - { - case Init_pciInit0: - banshee->pciInit0 = val; - voodoo->read_time = (banshee->agp ? agp_nonburst_time : pci_nonburst_time) + (banshee->agp ? agp_burst_time : pci_burst_time) * ((val & 0x100) ? 2 : 1); - voodoo->burst_time = (banshee->agp ? agp_burst_time : pci_burst_time) * ((val & 0x200) ? 1 : 0); - voodoo->write_time = (banshee->agp ? agp_nonburst_time : pci_nonburst_time) + voodoo->burst_time; - break; + switch (addr & 0xff) { + case Init_pciInit0: + banshee->pciInit0 = val; + voodoo->read_time = (banshee->agp ? agp_nonburst_time : pci_nonburst_time) + (banshee->agp ? agp_burst_time : pci_burst_time) * ((val & 0x100) ? 2 : 1); + voodoo->burst_time = (banshee->agp ? agp_burst_time : pci_burst_time) * ((val & 0x200) ? 1 : 0); + voodoo->write_time = (banshee->agp ? agp_nonburst_time : pci_nonburst_time) + voodoo->burst_time; + break; - case Init_lfbMemoryConfig: - banshee->lfbMemoryConfig = val; -// banshee_log("lfbMemoryConfig=%08x\n", val); - voodoo->tile_base = (val & 0x1fff) << 12; - voodoo->tile_stride = 1024 << ((val >> 13) & 7); - voodoo->tile_stride_shift = 10 + ((val >> 13) & 7); - voodoo->tile_x = ((val >> 16) & 0x7f) * 128; - voodoo->tile_x_real = ((val >> 16) & 0x7f) * 128*32; - break; + case Init_lfbMemoryConfig: + banshee->lfbMemoryConfig = val; + // banshee_log("lfbMemoryConfig=%08x\n", val); + voodoo->tile_base = (val & 0x1fff) << 12; + voodoo->tile_stride = 1024 << ((val >> 13) & 7); + voodoo->tile_stride_shift = 10 + ((val >> 13) & 7); + voodoo->tile_x = ((val >> 16) & 0x7f) * 128; + voodoo->tile_x_real = ((val >> 16) & 0x7f) * 128 * 32; + break; - case Init_miscInit0: - banshee->miscInit0 = val; - voodoo->y_origin_swap = (val & MISCINIT0_Y_ORIGIN_SWAP_MASK) >> MISCINIT0_Y_ORIGIN_SWAP_SHIFT; - break; - case Init_miscInit1: - banshee->miscInit1 = val; - break; - case Init_dramInit0: - banshee->dramInit0 = val; - break; - case Init_dramInit1: - banshee->dramInit1 = val; - break; - case Init_agpInit0: - banshee->agpInit0 = val; - break; + case Init_miscInit0: + banshee->miscInit0 = val; + voodoo->y_origin_swap = (val & MISCINIT0_Y_ORIGIN_SWAP_MASK) >> MISCINIT0_Y_ORIGIN_SWAP_SHIFT; + break; + case Init_miscInit1: + banshee->miscInit1 = val; + break; + case Init_dramInit0: + banshee->dramInit0 = val; + break; + case Init_dramInit1: + banshee->dramInit1 = val; + break; + case Init_agpInit0: + banshee->agpInit0 = val; + break; - case Init_2dCommand: - banshee->command_2d = val; - break; - case Init_2dSrcBaseAddr: - banshee->srcBaseAddr_2d = val; - break; - case Init_vgaInit0: - banshee->vgaInit0 = val; - break; - case Init_vgaInit1: - banshee->vgaInit1 = val; - svga->write_bank = (val & 0x3ff) << 15; - svga->read_bank = ((val >> 10) & 0x3ff) << 15; - svga->packed_chain4 = !!(val & 0x00100000); - break; + case Init_2dCommand: + banshee->command_2d = val; + break; + case Init_2dSrcBaseAddr: + banshee->srcBaseAddr_2d = val; + break; + case Init_vgaInit0: + banshee->vgaInit0 = val; + break; + case Init_vgaInit1: + banshee->vgaInit1 = val; + svga->write_bank = (val & 0x3ff) << 15; + svga->read_bank = ((val >> 10) & 0x3ff) << 15; + svga->packed_chain4 = !!(val & 0x00100000); + break; - case PLL_pllCtrl0: - banshee->pllCtrl0 = val; - break; - case PLL_pllCtrl1: - banshee->pllCtrl1 = val; - break; - case PLL_pllCtrl2: - banshee->pllCtrl2 = val; - break; + case PLL_pllCtrl0: + banshee->pllCtrl0 = val; + break; + case PLL_pllCtrl1: + banshee->pllCtrl1 = val; + break; + case PLL_pllCtrl2: + banshee->pllCtrl2 = val; + break; - case DAC_dacMode: - banshee->dacMode = val; - svga->dpms = !!(val & 0x0a); - svga_recalctimings(svga); - break; - case DAC_dacAddr: - banshee->dacAddr = val & 0x1ff; - break; - case DAC_dacData: - svga->pallook[banshee->dacAddr] = val & 0xffffff; - svga->fullchange = changeframecount; - break; + case DAC_dacMode: + banshee->dacMode = val; + svga->dpms = !!(val & 0x0a); + svga_recalctimings(svga); + break; + case DAC_dacAddr: + banshee->dacAddr = val & 0x1ff; + break; + case DAC_dacData: + svga->pallook[banshee->dacAddr] = val & 0xffffff; + svga->fullchange = changeframecount; + break; - case Video_vidProcCfg: - banshee->vidProcCfg = val; -// banshee_log("vidProcCfg=%08x\n", val); - banshee->overlay_pix_fmt = (val & VIDPROCCFG_OVERLAY_PIX_FORMAT_MASK) >> VIDPROCCFG_OVERLAY_PIX_FORMAT_SHIFT; - svga->hwcursor.ena = val & VIDPROCCFG_HWCURSOR_ENA; - svga->fullchange = changeframecount; - svga_recalctimings(svga); - break; + case Video_vidProcCfg: + banshee->vidProcCfg = val; + // banshee_log("vidProcCfg=%08x\n", val); + banshee->overlay_pix_fmt = (val & VIDPROCCFG_OVERLAY_PIX_FORMAT_MASK) >> VIDPROCCFG_OVERLAY_PIX_FORMAT_SHIFT; + svga->hwcursor.ena = val & VIDPROCCFG_HWCURSOR_ENA; + svga->fullchange = changeframecount; + svga_recalctimings(svga); + break; - case Video_maxRgbDelta: - banshee->voodoo->scrfilterThreshold = val; - if (val > 0x00) - banshee->voodoo->scrfilterEnabled = 1; - else - banshee->voodoo->scrfilterEnabled = 0; - voodoo_threshold_check(banshee->voodoo); - banshee_log("Banshee Filter: %06x\n", val); - break; + case Video_maxRgbDelta: + banshee->voodoo->scrfilterThreshold = val; + if (val > 0x00) + banshee->voodoo->scrfilterEnabled = 1; + else + banshee->voodoo->scrfilterEnabled = 0; + voodoo_threshold_check(banshee->voodoo); + banshee_log("Banshee Filter: %06x\n", val); + break; - case Video_hwCurPatAddr: - banshee->hwCurPatAddr = val; - svga->hwcursor.addr = (val & 0xfffff0) + (svga->hwcursor.yoff * 16); - break; - case Video_hwCurLoc: - banshee->hwCurLoc = val; - svga->hwcursor.x = (val & 0x7ff) - 64; - svga->hwcursor.y = ((val >> 16) & 0x7ff) - 64; - if (svga->hwcursor.y < 0) - { - svga->hwcursor.yoff = -svga->hwcursor.y; - svga->hwcursor.y = 0; - } - else - svga->hwcursor.yoff = 0; - svga->hwcursor.addr = (banshee->hwCurPatAddr & 0xfffff0) + (svga->hwcursor.yoff * 16); - svga->hwcursor.cur_xsize = 64; - svga->hwcursor.cur_ysize = 64; -// banshee_log("hwCurLoc %08x %i\n", val, svga->hwcursor.y); - break; - case Video_hwCurC0: - banshee->hwCurC0 = val; - break; - case Video_hwCurC1: - banshee->hwCurC1 = val; - break; + case Video_hwCurPatAddr: + banshee->hwCurPatAddr = val; + svga->hwcursor.addr = (val & 0xfffff0) + (svga->hwcursor.yoff * 16); + break; + case Video_hwCurLoc: + banshee->hwCurLoc = val; + svga->hwcursor.x = (val & 0x7ff) - 64; + svga->hwcursor.y = ((val >> 16) & 0x7ff) - 64; + if (svga->hwcursor.y < 0) { + svga->hwcursor.yoff = -svga->hwcursor.y; + svga->hwcursor.y = 0; + } else + svga->hwcursor.yoff = 0; + svga->hwcursor.addr = (banshee->hwCurPatAddr & 0xfffff0) + (svga->hwcursor.yoff * 16); + svga->hwcursor.cur_xsize = 64; + svga->hwcursor.cur_ysize = 64; + // banshee_log("hwCurLoc %08x %i\n", val, svga->hwcursor.y); + break; + case Video_hwCurC0: + banshee->hwCurC0 = val; + break; + case Video_hwCurC1: + banshee->hwCurC1 = val; + break; - case Video_vidSerialParallelPort: - banshee->vidSerialParallelPort = val; -// banshee_log("vidSerialParallelPort: write %08x %08x %04x(%08x):%08x\n", val, val & (VIDSERIAL_DDC_DCK_W | VIDSERIAL_DDC_DDA_W), CS,cs,cpu_state.pc); - i2c_gpio_set(banshee->i2c_ddc, !!(val & VIDSERIAL_DDC_DCK_W), !!(val & VIDSERIAL_DDC_DDA_W)); - i2c_gpio_set(banshee->i2c, !!(val & VIDSERIAL_I2C_SCK_W), !!(val & VIDSERIAL_I2C_SDA_W)); - break; + case Video_vidSerialParallelPort: + banshee->vidSerialParallelPort = val; + // banshee_log("vidSerialParallelPort: write %08x %08x %04x(%08x):%08x\n", val, val & (VIDSERIAL_DDC_DCK_W | VIDSERIAL_DDC_DDA_W), CS,cs,cpu_state.pc); + i2c_gpio_set(banshee->i2c_ddc, !!(val & VIDSERIAL_DDC_DCK_W), !!(val & VIDSERIAL_DDC_DDA_W)); + i2c_gpio_set(banshee->i2c, !!(val & VIDSERIAL_I2C_SCK_W), !!(val & VIDSERIAL_I2C_SDA_W)); + break; - case Video_vidScreenSize: - banshee->vidScreenSize = val; - voodoo->h_disp = (val & 0xfff) + 1; - voodoo->v_disp = (val >> 12) & 0xfff; - break; - case Video_vidOverlayStartCoords: - voodoo->overlay.vidOverlayStartCoords = val; - voodoo->overlay.start_x = val & OVERLAY_START_X_MASK; - voodoo->overlay.start_y = (val & OVERLAY_START_Y_MASK) >> OVERLAY_START_Y_SHIFT; - voodoo->overlay.size_x = voodoo->overlay.end_x - voodoo->overlay.start_x; - voodoo->overlay.size_y = voodoo->overlay.end_y - voodoo->overlay.start_y; - svga_recalctimings(svga); - break; - case Video_vidOverlayEndScreenCoords: - voodoo->overlay.vidOverlayEndScreenCoords = val; - voodoo->overlay.end_x = val & OVERLAY_END_X_MASK; - voodoo->overlay.end_y = (val & OVERLAY_END_Y_MASK) >> OVERLAY_END_Y_SHIFT; - voodoo->overlay.size_x = (voodoo->overlay.end_x - voodoo->overlay.start_x) + 1; - voodoo->overlay.size_y = (voodoo->overlay.end_y - voodoo->overlay.start_y) + 1; - svga_recalctimings(svga); - break; - case Video_vidOverlayDudx: - voodoo->overlay.vidOverlayDudx = val & VID_DUDX_MASK; -// banshee_log("vidOverlayDudx=%08x\n", val); - break; - case Video_vidOverlayDudxOffsetSrcWidth: - voodoo->overlay.vidOverlayDudxOffsetSrcWidth = val; - voodoo->overlay.overlay_bytes = (val & OVERLAY_SRC_WIDTH_MASK) >> OVERLAY_SRC_WIDTH_SHIFT; -// banshee_log("vidOverlayDudxOffsetSrcWidth=%08x\n", val); - break; - case Video_vidOverlayDvdy: - voodoo->overlay.vidOverlayDvdy = val & VID_DVDY_MASK; -// banshee_log("vidOverlayDvdy=%08x\n", val); - break; - case Video_vidOverlayDvdyOffset: - voodoo->overlay.vidOverlayDvdyOffset = val; - break; + case Video_vidScreenSize: + banshee->vidScreenSize = val; + voodoo->h_disp = (val & 0xfff) + 1; + voodoo->v_disp = (val >> 12) & 0xfff; + break; + case Video_vidOverlayStartCoords: + voodoo->overlay.vidOverlayStartCoords = val; + voodoo->overlay.start_x = val & OVERLAY_START_X_MASK; + voodoo->overlay.start_y = (val & OVERLAY_START_Y_MASK) >> OVERLAY_START_Y_SHIFT; + voodoo->overlay.size_x = voodoo->overlay.end_x - voodoo->overlay.start_x; + voodoo->overlay.size_y = voodoo->overlay.end_y - voodoo->overlay.start_y; + svga_recalctimings(svga); + break; + case Video_vidOverlayEndScreenCoords: + voodoo->overlay.vidOverlayEndScreenCoords = val; + voodoo->overlay.end_x = val & OVERLAY_END_X_MASK; + voodoo->overlay.end_y = (val & OVERLAY_END_Y_MASK) >> OVERLAY_END_Y_SHIFT; + voodoo->overlay.size_x = (voodoo->overlay.end_x - voodoo->overlay.start_x) + 1; + voodoo->overlay.size_y = (voodoo->overlay.end_y - voodoo->overlay.start_y) + 1; + svga_recalctimings(svga); + break; + case Video_vidOverlayDudx: + voodoo->overlay.vidOverlayDudx = val & VID_DUDX_MASK; + // banshee_log("vidOverlayDudx=%08x\n", val); + break; + case Video_vidOverlayDudxOffsetSrcWidth: + voodoo->overlay.vidOverlayDudxOffsetSrcWidth = val; + voodoo->overlay.overlay_bytes = (val & OVERLAY_SRC_WIDTH_MASK) >> OVERLAY_SRC_WIDTH_SHIFT; + // banshee_log("vidOverlayDudxOffsetSrcWidth=%08x\n", val); + break; + case Video_vidOverlayDvdy: + voodoo->overlay.vidOverlayDvdy = val & VID_DVDY_MASK; + // banshee_log("vidOverlayDvdy=%08x\n", val); + break; + case Video_vidOverlayDvdyOffset: + voodoo->overlay.vidOverlayDvdyOffset = val; + break; - - case Video_vidDesktopStartAddr: - banshee->vidDesktopStartAddr = val & 0xffffff; -// banshee_log("vidDesktopStartAddr=%08x\n", val); - svga->fullchange = changeframecount; - svga_recalctimings(svga); - break; - case Video_vidDesktopOverlayStride: - banshee->vidDesktopOverlayStride = val; -// banshee_log("vidDesktopOverlayStride=%08x\n", val); - svga->fullchange = changeframecount; - svga_recalctimings(svga); - break; -// default: -// fatal("bad banshee_ext_outl: addr=%04x val=%08x\n", addr, val); - } + case Video_vidDesktopStartAddr: + banshee->vidDesktopStartAddr = val & 0xffffff; + // banshee_log("vidDesktopStartAddr=%08x\n", val); + svga->fullchange = changeframecount; + svga_recalctimings(svga); + break; + case Video_vidDesktopOverlayStride: + banshee->vidDesktopOverlayStride = val; + // banshee_log("vidDesktopOverlayStride=%08x\n", val); + svga->fullchange = changeframecount; + svga_recalctimings(svga); + break; + // default: + // fatal("bad banshee_ext_outl: addr=%04x val=%08x\n", addr, val); + } } -static uint8_t banshee_ext_in(uint16_t addr, void *p) +static uint8_t +banshee_ext_in(uint16_t addr, void *p) { - banshee_t *banshee = (banshee_t *)p; -// svga_t *svga = &banshee->svga; - uint8_t ret = 0xff; + banshee_t *banshee = (banshee_t *) p; + // svga_t *svga = &banshee->svga; + uint8_t ret = 0xff; - switch (addr & 0xff) - { - case Init_status: case Init_status+1: case Init_status+2: case Init_status+3: - ret = (banshee_status(banshee) >> ((addr & 3) * 8)) & 0xff; -// banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc); - break; + switch (addr & 0xff) { + case Init_status: + case Init_status + 1: + case Init_status + 2: + case Init_status + 3: + ret = (banshee_status(banshee) >> ((addr & 3) * 8)) & 0xff; + // banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc); + break; - case 0xb0: case 0xb1: case 0xb2: case 0xb3: - case 0xb4: case 0xb5: case 0xb6: case 0xb7: - case 0xb8: case 0xb9: case 0xba: case 0xbb: - case 0xbc: case 0xbd: case 0xbe: case 0xbf: - case 0xc0: case 0xc1: case 0xc2: case 0xc3: - case 0xc4: case 0xc5: case 0xc6: case 0xc7: - case 0xc8: case 0xc9: case 0xca: case 0xcb: - case 0xcc: case 0xcd: case 0xce: case 0xcf: - case 0xd0: case 0xd1: case 0xd2: case 0xd3: - case 0xd4: case 0xd5: case 0xd6: case 0xd7: - case 0xd8: case 0xd9: case 0xda: case 0xdb: - case 0xdc: case 0xdd: case 0xde: case 0xdf: - ret = banshee_in((addr & 0xff)+0x300, p); - break; + case 0xb0: + case 0xb1: + case 0xb2: + case 0xb3: + case 0xb4: + case 0xb5: + case 0xb6: + case 0xb7: + case 0xb8: + case 0xb9: + case 0xba: + case 0xbb: + case 0xbc: + case 0xbd: + case 0xbe: + case 0xbf: + case 0xc0: + case 0xc1: + case 0xc2: + case 0xc3: + case 0xc4: + case 0xc5: + case 0xc6: + case 0xc7: + case 0xc8: + case 0xc9: + case 0xca: + case 0xcb: + case 0xcc: + case 0xcd: + case 0xce: + case 0xcf: + case 0xd0: + case 0xd1: + case 0xd2: + case 0xd3: + case 0xd4: + case 0xd5: + case 0xd6: + case 0xd7: + case 0xd8: + case 0xd9: + case 0xda: + case 0xdb: + case 0xdc: + case 0xdd: + case 0xde: + case 0xdf: + ret = banshee_in((addr & 0xff) + 0x300, p); + break; - default: - banshee_log("bad banshee_ext_in: addr=%04x\n", addr); - break; - } + default: + banshee_log("bad banshee_ext_in: addr=%04x\n", addr); + break; + } -// banshee_log("banshee_ext_in: addr=%04x val=%02x\n", addr, ret); + // banshee_log("banshee_ext_in: addr=%04x val=%02x\n", addr, ret); - return ret; + return ret; } -static uint32_t banshee_status(banshee_t *banshee) +static uint32_t +banshee_status(banshee_t *banshee) { - voodoo_t *voodoo = banshee->voodoo; - svga_t *svga = &banshee->svga; - int fifo_entries = FIFO_ENTRIES; - int swap_count = voodoo->swap_count; - int written = voodoo->cmd_written + voodoo->cmd_written_fifo; - int busy = (written - voodoo->cmd_read) || (voodoo->cmdfifo_depth_rd != voodoo->cmdfifo_depth_wr) || - voodoo->render_voodoo_busy[0] || voodoo->render_voodoo_busy[1] || - voodoo->render_voodoo_busy[2] || voodoo->render_voodoo_busy[3] || - voodoo->voodoo_busy; - uint32_t ret; + voodoo_t *voodoo = banshee->voodoo; + svga_t *svga = &banshee->svga; + int fifo_entries = FIFO_ENTRIES; + int swap_count = voodoo->swap_count; + int written = voodoo->cmd_written + voodoo->cmd_written_fifo; + int busy = (written - voodoo->cmd_read) || (voodoo->cmdfifo_depth_rd != voodoo->cmdfifo_depth_wr) || voodoo->render_voodoo_busy[0] || voodoo->render_voodoo_busy[1] || voodoo->render_voodoo_busy[2] || voodoo->render_voodoo_busy[3] || voodoo->voodoo_busy; + uint32_t ret; - ret = 0; - if (fifo_entries < 0x20) - ret |= 0x1f - fifo_entries; - else - ret |= 0x1f; - if (fifo_entries) - ret |= 0x20; - if (swap_count < 7) - ret |= (swap_count << 28); - else - ret |= (7 << 28); - if (!(svga->cgastat & 8)) - ret |= 0x40; + ret = 0; + if (fifo_entries < 0x20) + ret |= 0x1f - fifo_entries; + else + ret |= 0x1f; + if (fifo_entries) + ret |= 0x20; + if (swap_count < 7) + ret |= (swap_count << 28); + else + ret |= (7 << 28); + if (!(svga->cgastat & 8)) + ret |= 0x40; - if (busy) - ret |= 0x780; /*Busy*/ + if (busy) + ret |= 0x780; /*Busy*/ - if (voodoo->cmdfifo_depth_rd != voodoo->cmdfifo_depth_wr) - ret |= (1 << 11); + if (voodoo->cmdfifo_depth_rd != voodoo->cmdfifo_depth_wr) + ret |= (1 << 11); - if (!voodoo->voodoo_busy) - voodoo_wake_fifo_thread(voodoo); + if (!voodoo->voodoo_busy) + voodoo_wake_fifo_thread(voodoo); -// banshee_log("banshee_status: busy %i %i (%i %i) %i %i %i %04x(%08x):%08x %08x\n", busy, written, voodoo->cmd_written, voodoo->cmd_written_fifo, voodoo->cmd_read, voodoo->cmdfifo_depth_rd, voodoo->cmdfifo_depth_wr, CS,cs,cpu_state.pc, ret); + // banshee_log("banshee_status: busy %i %i (%i %i) %i %i %i %04x(%08x):%08x %08x\n", busy, written, voodoo->cmd_written, voodoo->cmd_written_fifo, voodoo->cmd_read, voodoo->cmdfifo_depth_rd, voodoo->cmdfifo_depth_wr, CS,cs,cpu_state.pc, ret); - return ret; + return ret; } -static uint32_t banshee_ext_inl(uint16_t addr, void *p) +static uint32_t +banshee_ext_inl(uint16_t addr, void *p) { - banshee_t *banshee = (banshee_t *)p; - voodoo_t *voodoo = banshee->voodoo; - svga_t *svga = &banshee->svga; - uint32_t ret = 0xffffffff; + banshee_t *banshee = (banshee_t *) p; + voodoo_t *voodoo = banshee->voodoo; + svga_t *svga = &banshee->svga; + uint32_t ret = 0xffffffff; - cycles -= voodoo->read_time; + cycles -= voodoo->read_time; - switch (addr & 0xff) - { - case Init_status: - ret = banshee_status(banshee); -// banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc); - break; - case Init_pciInit0: - ret = banshee->pciInit0; - break; - case Init_lfbMemoryConfig: - ret = banshee->lfbMemoryConfig; - break; + switch (addr & 0xff) { + case Init_status: + ret = banshee_status(banshee); + // banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc); + break; + case Init_pciInit0: + ret = banshee->pciInit0; + break; + case Init_lfbMemoryConfig: + ret = banshee->lfbMemoryConfig; + break; - case Init_miscInit0: - ret = banshee->miscInit0; - break; - case Init_miscInit1: - ret = banshee->miscInit1; - break; - case Init_dramInit0: - ret = banshee->dramInit0; - break; - case Init_dramInit1: - ret = banshee->dramInit1; - break; - case Init_agpInit0: - ret = banshee->agpInit0; - break; + case Init_miscInit0: + ret = banshee->miscInit0; + break; + case Init_miscInit1: + ret = banshee->miscInit1; + break; + case Init_dramInit0: + ret = banshee->dramInit0; + break; + case Init_dramInit1: + ret = banshee->dramInit1; + break; + case Init_agpInit0: + ret = banshee->agpInit0; + break; - case Init_vgaInit0: - ret = banshee->vgaInit0; - break; - case Init_vgaInit1: - ret = banshee->vgaInit1; - break; + case Init_vgaInit0: + ret = banshee->vgaInit0; + break; + case Init_vgaInit1: + ret = banshee->vgaInit1; + break; - case Init_2dCommand: - ret = banshee->command_2d; - break; - case Init_2dSrcBaseAddr: - ret = banshee->srcBaseAddr_2d; - break; - case Init_strapInfo: - ret = 0x00000040; /*8 MB SGRAM, PCI, IRQ enabled, 32kB BIOS*/ - break; + case Init_2dCommand: + ret = banshee->command_2d; + break; + case Init_2dSrcBaseAddr: + ret = banshee->srcBaseAddr_2d; + break; + case Init_strapInfo: + ret = 0x00000040; /*8 MB SGRAM, PCI, IRQ enabled, 32kB BIOS*/ + break; - case PLL_pllCtrl0: - ret = banshee->pllCtrl0; - break; - case PLL_pllCtrl1: - ret = banshee->pllCtrl1; - break; - case PLL_pllCtrl2: - ret = banshee->pllCtrl2; - break; + case PLL_pllCtrl0: + ret = banshee->pllCtrl0; + break; + case PLL_pllCtrl1: + ret = banshee->pllCtrl1; + break; + case PLL_pllCtrl2: + ret = banshee->pllCtrl2; + break; - case DAC_dacMode: - ret = banshee->dacMode; - break; - case DAC_dacAddr: - ret = banshee->dacAddr; - break; - case DAC_dacData: - ret = svga->pallook[banshee->dacAddr]; - break; + case DAC_dacMode: + ret = banshee->dacMode; + break; + case DAC_dacAddr: + ret = banshee->dacAddr; + break; + case DAC_dacData: + ret = svga->pallook[banshee->dacAddr]; + break; - case Video_vidProcCfg: - ret = banshee->vidProcCfg; - break; + case Video_vidProcCfg: + ret = banshee->vidProcCfg; + break; - case Video_hwCurPatAddr: - ret = banshee->hwCurPatAddr; - break; - case Video_hwCurLoc: - ret = banshee->hwCurLoc; - break; - case Video_hwCurC0: - ret = banshee->hwCurC0; - break; - case Video_hwCurC1: - ret = banshee->hwCurC1; - break; + case Video_hwCurPatAddr: + ret = banshee->hwCurPatAddr; + break; + case Video_hwCurLoc: + ret = banshee->hwCurLoc; + break; + case Video_hwCurC0: + ret = banshee->hwCurC0; + break; + case Video_hwCurC1: + ret = banshee->hwCurC1; + break; - case Video_vidSerialParallelPort: - ret = banshee->vidSerialParallelPort & ~(VIDSERIAL_DDC_DCK_R | VIDSERIAL_DDC_DDA_R | VIDSERIAL_I2C_SCK_R | VIDSERIAL_I2C_SDA_R); - if (banshee->vidSerialParallelPort & VIDSERIAL_DDC_EN) { - if (i2c_gpio_get_scl(banshee->i2c_ddc)) - ret |= VIDSERIAL_DDC_DCK_R; - if (i2c_gpio_get_sda(banshee->i2c_ddc)) - ret |= VIDSERIAL_DDC_DDA_R; - } - if (banshee->vidSerialParallelPort & VIDSERIAL_I2C_EN) { - if (i2c_gpio_get_scl(banshee->i2c)) - ret |= VIDSERIAL_I2C_SCK_R; - if (i2c_gpio_get_sda(banshee->i2c)) - ret |= VIDSERIAL_I2C_SDA_R; - } -// banshee_log("vidSerialParallelPort: read %08x %08x %04x(%08x):%08x\n", ret, ret & (VIDSERIAL_DDC_DCK_R | VIDSERIAL_DDC_DDA_R), CS,cs,cpu_state.pc); - break; + case Video_vidSerialParallelPort: + ret = banshee->vidSerialParallelPort & ~(VIDSERIAL_DDC_DCK_R | VIDSERIAL_DDC_DDA_R | VIDSERIAL_I2C_SCK_R | VIDSERIAL_I2C_SDA_R); + if (banshee->vidSerialParallelPort & VIDSERIAL_DDC_EN) { + if (i2c_gpio_get_scl(banshee->i2c_ddc)) + ret |= VIDSERIAL_DDC_DCK_R; + if (i2c_gpio_get_sda(banshee->i2c_ddc)) + ret |= VIDSERIAL_DDC_DDA_R; + } + if (banshee->vidSerialParallelPort & VIDSERIAL_I2C_EN) { + if (i2c_gpio_get_scl(banshee->i2c)) + ret |= VIDSERIAL_I2C_SCK_R; + if (i2c_gpio_get_sda(banshee->i2c)) + ret |= VIDSERIAL_I2C_SDA_R; + } + // banshee_log("vidSerialParallelPort: read %08x %08x %04x(%08x):%08x\n", ret, ret & (VIDSERIAL_DDC_DCK_R | VIDSERIAL_DDC_DDA_R), CS,cs,cpu_state.pc); + break; - case Video_vidScreenSize: - ret = banshee->vidScreenSize; - break; - case Video_vidOverlayStartCoords: - ret = voodoo->overlay.vidOverlayStartCoords; - break; - case Video_vidOverlayEndScreenCoords: - ret = voodoo->overlay.vidOverlayEndScreenCoords; - break; - case Video_vidOverlayDudx: - ret = voodoo->overlay.vidOverlayDudx; - break; - case Video_vidOverlayDudxOffsetSrcWidth: - ret = voodoo->overlay.vidOverlayDudxOffsetSrcWidth; - break; - case Video_vidOverlayDvdy: - ret = voodoo->overlay.vidOverlayDvdy; - break; - case Video_vidOverlayDvdyOffset: - ret = voodoo->overlay.vidOverlayDvdyOffset; - break; + case Video_vidScreenSize: + ret = banshee->vidScreenSize; + break; + case Video_vidOverlayStartCoords: + ret = voodoo->overlay.vidOverlayStartCoords; + break; + case Video_vidOverlayEndScreenCoords: + ret = voodoo->overlay.vidOverlayEndScreenCoords; + break; + case Video_vidOverlayDudx: + ret = voodoo->overlay.vidOverlayDudx; + break; + case Video_vidOverlayDudxOffsetSrcWidth: + ret = voodoo->overlay.vidOverlayDudxOffsetSrcWidth; + break; + case Video_vidOverlayDvdy: + ret = voodoo->overlay.vidOverlayDvdy; + break; + case Video_vidOverlayDvdyOffset: + ret = voodoo->overlay.vidOverlayDvdyOffset; + break; - case Video_vidDesktopStartAddr: - ret = banshee->vidDesktopStartAddr; - break; - case Video_vidDesktopOverlayStride: - ret = banshee->vidDesktopOverlayStride; - break; + case Video_vidDesktopStartAddr: + ret = banshee->vidDesktopStartAddr; + break; + case Video_vidDesktopOverlayStride: + ret = banshee->vidDesktopOverlayStride; + break; - default: -// fatal("bad banshee_ext_inl: addr=%04x\n", addr); - break; - } + default: + // fatal("bad banshee_ext_inl: addr=%04x\n", addr); + break; + } -// /*if (addr) */banshee_log("banshee_ext_inl: addr=%04x val=%08x\n", addr, ret); + // /*if (addr) */banshee_log("banshee_ext_inl: addr=%04x val=%08x\n", addr, ret); - return ret; + return ret; } - static uint32_t banshee_reg_readl(uint32_t addr, void *p); -static uint8_t banshee_reg_read(uint32_t addr, void *p) +static uint8_t +banshee_reg_read(uint32_t addr, void *p) { -// banshee_log("banshee_reg_read: addr=%08x\n", addr); - return banshee_reg_readl(addr & ~3, p) >> (8*(addr & 3)); + // banshee_log("banshee_reg_read: addr=%08x\n", addr); + return banshee_reg_readl(addr & ~3, p) >> (8 * (addr & 3)); } -static uint16_t banshee_reg_readw(uint32_t addr, void *p) +static uint16_t +banshee_reg_readw(uint32_t addr, void *p) { -// banshee_log("banshee_reg_readw: addr=%08x\n", addr); - return banshee_reg_readl(addr & ~3, p) >> (8*(addr & 2)); + // banshee_log("banshee_reg_readw: addr=%08x\n", addr); + return banshee_reg_readl(addr & ~3, p) >> (8 * (addr & 2)); } -static uint32_t banshee_cmd_read(banshee_t *banshee, uint32_t addr) +static uint32_t +banshee_cmd_read(banshee_t *banshee, uint32_t addr) { - voodoo_t *voodoo = banshee->voodoo; - uint32_t ret = 0xffffffff; + voodoo_t *voodoo = banshee->voodoo; + uint32_t ret = 0xffffffff; - switch (addr & 0x1fc) - { - case cmdBaseAddr0: - ret = voodoo->cmdfifo_base >> 12; -// banshee_log("Read cmdfifo_base %08x\n", ret); - break; + switch (addr & 0x1fc) { + case cmdBaseAddr0: + ret = voodoo->cmdfifo_base >> 12; + // banshee_log("Read cmdfifo_base %08x\n", ret); + break; - case cmdRdPtrL0: - ret = voodoo->cmdfifo_rp; -// banshee_log("Read cmdfifo_rp %08x\n", ret); - break; + case cmdRdPtrL0: + ret = voodoo->cmdfifo_rp; + // banshee_log("Read cmdfifo_rp %08x\n", ret); + break; - case cmdFifoDepth0: - ret = voodoo->cmdfifo_depth_wr - voodoo->cmdfifo_depth_rd; -// banshee_log("Read cmdfifo_depth %08x\n", ret); - break; + case cmdFifoDepth0: + ret = voodoo->cmdfifo_depth_wr - voodoo->cmdfifo_depth_rd; + // banshee_log("Read cmdfifo_depth %08x\n", ret); + break; - case 0x108: - break; + case 0x108: + break; + + default: + fatal("Unknown banshee_cmd_read %08x\n", addr); + } + + return ret; +} + +static uint32_t +banshee_reg_readl(uint32_t addr, void *p) +{ + banshee_t *banshee = (banshee_t *) p; + voodoo_t *voodoo = banshee->voodoo; + uint32_t ret = 0xffffffff; + + cycles -= voodoo->read_time; + + switch (addr & 0x1f00000) { + case 0x0000000: /*IO remap*/ + if (!(addr & 0x80000)) + ret = banshee_ext_inl(addr & 0xff, banshee); + else + ret = banshee_cmd_read(banshee, addr); + break; + + case 0x0100000: /*2D registers*/ + voodoo_flush(voodoo); + switch (addr & 0x1fc) { + case SST_status: + ret = banshee_status(banshee); + break; + + case SST_intrCtrl: + ret = banshee->intrCtrl & 0x0030003f; + break; + + case 0x08: + ret = voodoo->banshee_blt.clip0Min; + break; + case 0x0c: + ret = voodoo->banshee_blt.clip0Max; + break; + case 0x10: + ret = voodoo->banshee_blt.dstBaseAddr; + break; + case 0x14: + ret = voodoo->banshee_blt.dstFormat; + break; + case 0x34: + ret = voodoo->banshee_blt.srcBaseAddr; + break; + case 0x38: + ret = voodoo->banshee_blt.commandExtra; + break; + case 0x5c: + ret = voodoo->banshee_blt.srcXY; + break; + case 0x60: + ret = voodoo->banshee_blt.colorBack; + break; + case 0x64: + ret = voodoo->banshee_blt.colorFore; + break; + case 0x68: + ret = voodoo->banshee_blt.dstSize; + break; + case 0x6c: + ret = voodoo->banshee_blt.dstXY; + break; + case 0x70: + ret = voodoo->banshee_blt.command; + break; + default: + banshee_log("banshee_reg_readl: addr=%08x\n", addr); + } + break; + + case 0x0200000: + case 0x0300000: + case 0x0400000: + case 0x0500000: /*3D registers*/ + switch (addr & 0x3fc) { + case SST_status: + ret = banshee_status(banshee); + break; + + case SST_intrCtrl: + ret = banshee->intrCtrl & 0x0030003f; + break; + + case SST_fbzColorPath: + voodoo_flush(voodoo); + ret = voodoo->params.fbzColorPath; + break; + case SST_fogMode: + voodoo_flush(voodoo); + ret = voodoo->params.fogMode; + break; + case SST_alphaMode: + voodoo_flush(voodoo); + ret = voodoo->params.alphaMode; + break; + case SST_fbzMode: + voodoo_flush(voodoo); + ret = voodoo->params.fbzMode; + break; + case SST_lfbMode: + voodoo_flush(voodoo); + ret = voodoo->lfbMode; + break; + case SST_clipLeftRight: + ret = voodoo->params.clipRight | (voodoo->params.clipLeft << 16); + break; + case SST_clipLowYHighY: + ret = voodoo->params.clipHighY | (voodoo->params.clipLowY << 16); + break; + + case SST_clipLeftRight1: + ret = voodoo->params.clipRight1 | (voodoo->params.clipLeft1 << 16); + break; + case SST_clipTopBottom1: + ret = voodoo->params.clipHighY1 | (voodoo->params.clipLowY1 << 16); + break; + + case SST_stipple: + voodoo_flush(voodoo); + ret = voodoo->params.stipple; + break; + case SST_color0: + voodoo_flush(voodoo); + ret = voodoo->params.color0; + break; + case SST_color1: + voodoo_flush(voodoo); + ret = voodoo->params.color1; + break; + + case SST_fbiPixelsIn: + ret = voodoo->fbiPixelsIn & 0xffffff; + break; + case SST_fbiChromaFail: + ret = voodoo->fbiChromaFail & 0xffffff; + break; + case SST_fbiZFuncFail: + ret = voodoo->fbiZFuncFail & 0xffffff; + break; + case SST_fbiAFuncFail: + ret = voodoo->fbiAFuncFail & 0xffffff; + break; + case SST_fbiPixelsOut: + ret = voodoo->fbiPixelsOut & 0xffffff; + break; default: - fatal("Unknown banshee_cmd_read %08x\n", addr); - } + banshee_log("banshee_reg_readl: 3D addr=%08x\n", addr); + break; + } + break; + } - return ret; + // /*if (addr != 0xe0000000) */banshee_log("banshee_reg_readl: addr=%08x ret=%08x %04x(%08x):%08x\n", addr, ret, CS,cs,cpu_state.pc); + + return ret; } -static uint32_t banshee_reg_readl(uint32_t addr, void *p) +static void +banshee_reg_write(uint32_t addr, uint8_t val, void *p) { - banshee_t *banshee = (banshee_t *)p; - voodoo_t *voodoo = banshee->voodoo; - uint32_t ret = 0xffffffff; - - cycles -= voodoo->read_time; - - switch (addr & 0x1f00000) - { - case 0x0000000: /*IO remap*/ - if (!(addr & 0x80000)) - ret = banshee_ext_inl(addr & 0xff, banshee); - else - ret = banshee_cmd_read(banshee, addr); - break; - - case 0x0100000: /*2D registers*/ - voodoo_flush(voodoo); - switch (addr & 0x1fc) - { - case SST_status: - ret = banshee_status(banshee); - break; - - case SST_intrCtrl: - ret = banshee->intrCtrl & 0x0030003f; - break; - - case 0x08: - ret = voodoo->banshee_blt.clip0Min; - break; - case 0x0c: - ret = voodoo->banshee_blt.clip0Max; - break; - case 0x10: - ret = voodoo->banshee_blt.dstBaseAddr; - break; - case 0x14: - ret = voodoo->banshee_blt.dstFormat; - break; - case 0x34: - ret = voodoo->banshee_blt.srcBaseAddr; - break; - case 0x38: - ret = voodoo->banshee_blt.commandExtra; - break; - case 0x5c: - ret = voodoo->banshee_blt.srcXY; - break; - case 0x60: - ret = voodoo->banshee_blt.colorBack; - break; - case 0x64: - ret = voodoo->banshee_blt.colorFore; - break; - case 0x68: - ret = voodoo->banshee_blt.dstSize; - break; - case 0x6c: - ret = voodoo->banshee_blt.dstXY; - break; - case 0x70: - ret = voodoo->banshee_blt.command; - break; - default: - banshee_log("banshee_reg_readl: addr=%08x\n", addr); - } - break; - - case 0x0200000: case 0x0300000: case 0x0400000: case 0x0500000: /*3D registers*/ - switch (addr & 0x3fc) - { - case SST_status: - ret = banshee_status(banshee); - break; - - case SST_intrCtrl: - ret = banshee->intrCtrl & 0x0030003f; - break; - - case SST_fbzColorPath: - voodoo_flush(voodoo); - ret = voodoo->params.fbzColorPath; - break; - case SST_fogMode: - voodoo_flush(voodoo); - ret = voodoo->params.fogMode; - break; - case SST_alphaMode: - voodoo_flush(voodoo); - ret = voodoo->params.alphaMode; - break; - case SST_fbzMode: - voodoo_flush(voodoo); - ret = voodoo->params.fbzMode; - break; - case SST_lfbMode: - voodoo_flush(voodoo); - ret = voodoo->lfbMode; - break; - case SST_clipLeftRight: - ret = voodoo->params.clipRight | (voodoo->params.clipLeft << 16); - break; - case SST_clipLowYHighY: - ret = voodoo->params.clipHighY | (voodoo->params.clipLowY << 16); - break; - - case SST_clipLeftRight1: - ret = voodoo->params.clipRight1 | (voodoo->params.clipLeft1 << 16); - break; - case SST_clipTopBottom1: - ret = voodoo->params.clipHighY1 | (voodoo->params.clipLowY1 << 16); - break; - - case SST_stipple: - voodoo_flush(voodoo); - ret = voodoo->params.stipple; - break; - case SST_color0: - voodoo_flush(voodoo); - ret = voodoo->params.color0; - break; - case SST_color1: - voodoo_flush(voodoo); - ret = voodoo->params.color1; - break; - - case SST_fbiPixelsIn: - ret = voodoo->fbiPixelsIn & 0xffffff; - break; - case SST_fbiChromaFail: - ret = voodoo->fbiChromaFail & 0xffffff; - break; - case SST_fbiZFuncFail: - ret = voodoo->fbiZFuncFail & 0xffffff; - break; - case SST_fbiAFuncFail: - ret = voodoo->fbiAFuncFail & 0xffffff; - break; - case SST_fbiPixelsOut: - ret = voodoo->fbiPixelsOut & 0xffffff; - break; - - default: - banshee_log("banshee_reg_readl: 3D addr=%08x\n", addr); - break; - } - break; - } - -// /*if (addr != 0xe0000000) */banshee_log("banshee_reg_readl: addr=%08x ret=%08x %04x(%08x):%08x\n", addr, ret, CS,cs,cpu_state.pc); - - return ret; + // banshee_log("banshee_reg_writeb: addr=%08x val=%02x\n", addr, val); } -static void banshee_reg_write(uint32_t addr, uint8_t val, void *p) +static void +banshee_reg_writew(uint32_t addr, uint16_t val, void *p) { -// banshee_log("banshee_reg_writeb: addr=%08x val=%02x\n", addr, val); + banshee_t *banshee = (banshee_t *) p; + voodoo_t *voodoo = banshee->voodoo; + + cycles -= voodoo->write_time; + + // banshee_log("banshee_reg_writew: addr=%08x val=%04x\n", addr, val); + switch (addr & 0x1f00000) { + case 0x1000000: + case 0x1100000: + case 0x1200000: + case 0x1300000: /*3D LFB*/ + case 0x1400000: + case 0x1500000: + case 0x1600000: + case 0x1700000: + case 0x1800000: + case 0x1900000: + case 0x1a00000: + case 0x1b00000: + case 0x1c00000: + case 0x1d00000: + case 0x1e00000: + case 0x1f00000: + voodoo_queue_command(voodoo, (addr & 0xffffff) | FIFO_WRITEW_FB, val); + break; + } } -static void banshee_reg_writew(uint32_t addr, uint16_t val, void *p) +static void +banshee_cmd_write(banshee_t *banshee, uint32_t addr, uint32_t val) { - banshee_t *banshee = (banshee_t *)p; - voodoo_t *voodoo = banshee->voodoo; + voodoo_t *voodoo = banshee->voodoo; + // banshee_log("banshee_cmd_write: addr=%03x val=%08x\n", addr & 0x1fc, val); + switch (addr & 0x1fc) { + case cmdBaseAddr0: + voodoo->cmdfifo_base = (val & 0xfff) << 12; + voodoo->cmdfifo_end = voodoo->cmdfifo_base + (((voodoo->cmdfifo_size & 0xff) + 1) << 12); + // banshee_log("cmdfifo_base=%08x cmdfifo_end=%08x %08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end, val); + break; + case cmdBaseSize0: + voodoo->cmdfifo_size = val; + voodoo->cmdfifo_end = voodoo->cmdfifo_base + (((voodoo->cmdfifo_size & 0xff) + 1) << 12); + voodoo->cmdfifo_enabled = val & 0x100; + if (!voodoo->cmdfifo_enabled) + voodoo->cmdfifo_in_sub = 0; /*Not sure exactly when this should be reset*/ + // banshee_log("cmdfifo_base=%08x cmdfifo_end=%08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end); + break; + + // voodoo->cmdfifo_end = ((val >> 16) & 0x3ff) << 12; + // banshee_log("CMDFIFO base=%08x end=%08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end); + // break; + + case cmdRdPtrL0: + voodoo->cmdfifo_rp = val; + break; + case cmdAMin0: + voodoo->cmdfifo_amin = val; + break; + case cmdAMax0: + voodoo->cmdfifo_amax = val; + break; + case cmdFifoDepth0: + voodoo->cmdfifo_depth_rd = 0; + voodoo->cmdfifo_depth_wr = val & 0xffff; + break; + + default: + banshee_log("Unknown banshee_cmd_write: addr=%08x val=%08x\n", addr, val); + break; + } + + /* cmdBaseSize0 = 0x24, + cmdBump0 = 0x28, + cmdRdPtrL0 = 0x2c, + cmdRdPtrH0 = 0x30, + cmdAMin0 = 0x34, + cmdAMax0 = 0x3c, + cmdFifoDepth0 = 0x44, + cmdHoleCnt0 = 0x48 + }*/ +} + +static void +banshee_reg_writel(uint32_t addr, uint32_t val, void *p) +{ + banshee_t *banshee = (banshee_t *) p; + voodoo_t *voodoo = banshee->voodoo; + + if (addr == voodoo->last_write_addr + 4) + cycles -= voodoo->burst_time; + else cycles -= voodoo->write_time; + voodoo->last_write_addr = addr; -// banshee_log("banshee_reg_writew: addr=%08x val=%04x\n", addr, val); - switch (addr & 0x1f00000) - { - case 0x1000000: case 0x1100000: case 0x1200000: case 0x1300000: /*3D LFB*/ - case 0x1400000: case 0x1500000: case 0x1600000: case 0x1700000: - case 0x1800000: case 0x1900000: case 0x1a00000: case 0x1b00000: - case 0x1c00000: case 0x1d00000: case 0x1e00000: case 0x1f00000: - voodoo_queue_command(voodoo, (addr & 0xffffff) | FIFO_WRITEW_FB, val); - break; - } -} + // banshee_log("banshee_reg_writel: addr=%08x val=%08x\n", addr, val); -static void banshee_cmd_write(banshee_t *banshee, uint32_t addr, uint32_t val) -{ - voodoo_t *voodoo = banshee->voodoo; -// banshee_log("banshee_cmd_write: addr=%03x val=%08x\n", addr & 0x1fc, val); - switch (addr & 0x1fc) - { - case cmdBaseAddr0: - voodoo->cmdfifo_base = (val & 0xfff) << 12; - voodoo->cmdfifo_end = voodoo->cmdfifo_base + (((voodoo->cmdfifo_size & 0xff) + 1) << 12); -// banshee_log("cmdfifo_base=%08x cmdfifo_end=%08x %08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end, val); - break; + switch (addr & 0x1f00000) { + case 0x0000000: /*IO remap*/ + if (!(addr & 0x80000)) + banshee_ext_outl(addr & 0xff, val, banshee); + else + banshee_cmd_write(banshee, addr, val); + // banshee_log("CMD!!! write %08x %08x\n", addr, val); + break; - case cmdBaseSize0: - voodoo->cmdfifo_size = val; - voodoo->cmdfifo_end = voodoo->cmdfifo_base + (((voodoo->cmdfifo_size & 0xff) + 1) << 12); - voodoo->cmdfifo_enabled = val & 0x100; - if (!voodoo->cmdfifo_enabled) - voodoo->cmdfifo_in_sub = 0; /*Not sure exactly when this should be reset*/ -// banshee_log("cmdfifo_base=%08x cmdfifo_end=%08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end); - break; + case 0x0100000: /*2D registers*/ + if ((addr & 0x3fc) == SST_intrCtrl) { + banshee->intrCtrl = val & 0x0030003f; + } else { + voodoo_queue_command(voodoo, (addr & 0x1fc) | FIFO_WRITEL_2DREG, val); + } + break; -// voodoo->cmdfifo_end = ((val >> 16) & 0x3ff) << 12; -// banshee_log("CMDFIFO base=%08x end=%08x\n", voodoo->cmdfifo_base, voodoo->cmdfifo_end); -// break; + case 0x0200000: + case 0x0300000: + case 0x0400000: + case 0x0500000: /*3D registers*/ + switch (addr & 0x3fc) { + case SST_intrCtrl: + banshee->intrCtrl = val & 0x0030003f; + // banshee_log("intrCtrl=%08x\n", val); + break; - case cmdRdPtrL0: - voodoo->cmdfifo_rp = val; - break; - case cmdAMin0: - voodoo->cmdfifo_amin = val; - break; - case cmdAMax0: - voodoo->cmdfifo_amax = val; - break; - case cmdFifoDepth0: - voodoo->cmdfifo_depth_rd = 0; - voodoo->cmdfifo_depth_wr = val & 0xffff; - break; + case SST_userIntrCMD: + fatal("userIntrCMD write %08x\n", val); + break; + + case SST_swapbufferCMD: + voodoo->cmd_written++; + voodoo_queue_command(voodoo, (addr & 0x3fc) | FIFO_WRITEL_REG, val); + if (!voodoo->voodoo_busy) + voodoo_wake_fifo_threads(voodoo->set, voodoo); + // banshee_log("SST_swapbufferCMD write: %i %i\n", voodoo->cmd_written, voodoo->cmd_written_fifo); + break; + case SST_triangleCMD: + voodoo->cmd_written++; + voodoo_queue_command(voodoo, (addr & 0x3fc) | FIFO_WRITEL_REG, val); + if (!voodoo->voodoo_busy) + voodoo_wake_fifo_threads(voodoo->set, voodoo); + break; + case SST_ftriangleCMD: + voodoo->cmd_written++; + voodoo_queue_command(voodoo, (addr & 0x3fc) | FIFO_WRITEL_REG, val); + if (!voodoo->voodoo_busy) + voodoo_wake_fifo_threads(voodoo->set, voodoo); + break; + case SST_fastfillCMD: + voodoo->cmd_written++; + voodoo_queue_command(voodoo, (addr & 0x3fc) | FIFO_WRITEL_REG, val); + if (!voodoo->voodoo_busy) + voodoo_wake_fifo_threads(voodoo->set, voodoo); + break; + case SST_nopCMD: + voodoo->cmd_written++; + voodoo_queue_command(voodoo, (addr & 0x3fc) | FIFO_WRITEL_REG, val); + if (!voodoo->voodoo_busy) + voodoo_wake_fifo_threads(voodoo->set, voodoo); + break; + + case SST_swapPending: + thread_wait_mutex(voodoo->swap_mutex); + voodoo->swap_count++; + thread_release_mutex(voodoo->swap_mutex); + // voodoo->cmd_written++; + break; default: - banshee_log("Unknown banshee_cmd_write: addr=%08x val=%08x\n", addr, val); - break; - } + voodoo_queue_command(voodoo, (addr & 0x3ffffc) | FIFO_WRITEL_REG, val); + break; + } + break; -/* cmdBaseSize0 = 0x24, - cmdBump0 = 0x28, - cmdRdPtrL0 = 0x2c, - cmdRdPtrH0 = 0x30, - cmdAMin0 = 0x34, - cmdAMax0 = 0x3c, - cmdFifoDepth0 = 0x44, - cmdHoleCnt0 = 0x48 - }*/ + case 0x0600000: + case 0x0700000: /*Texture download*/ + voodoo->tex_count++; + voodoo_queue_command(voodoo, (addr & 0x1ffffc) | FIFO_WRITEL_TEX, val); + break; + + case 0x1000000: + case 0x1100000: + case 0x1200000: + case 0x1300000: /*3D LFB*/ + case 0x1400000: + case 0x1500000: + case 0x1600000: + case 0x1700000: + case 0x1800000: + case 0x1900000: + case 0x1a00000: + case 0x1b00000: + case 0x1c00000: + case 0x1d00000: + case 0x1e00000: + case 0x1f00000: + voodoo_queue_command(voodoo, (addr & 0xfffffc) | FIFO_WRITEL_FB, val); + break; + } } -static void banshee_reg_writel(uint32_t addr, uint32_t val, void *p) +static uint8_t +banshee_read_linear(uint32_t addr, void *p) { - banshee_t *banshee = (banshee_t *)p; - voodoo_t *voodoo = banshee->voodoo; + banshee_t *banshee = (banshee_t *) p; + voodoo_t *voodoo = banshee->voodoo; + svga_t *svga = &banshee->svga; - if (addr == voodoo->last_write_addr+4) - cycles -= voodoo->burst_time; - else - cycles -= voodoo->write_time; - voodoo->last_write_addr = addr; + cycles -= voodoo->read_time; -// banshee_log("banshee_reg_writel: addr=%08x val=%08x\n", addr, val); + addr &= svga->decode_mask; + if (addr >= voodoo->tile_base) { + int x, y; - switch (addr & 0x1f00000) - { - case 0x0000000: /*IO remap*/ - if (!(addr & 0x80000)) - banshee_ext_outl(addr & 0xff, val, banshee); - else - banshee_cmd_write(banshee, addr, val); -// banshee_log("CMD!!! write %08x %08x\n", addr, val); - break; + addr -= voodoo->tile_base; + x = addr & (voodoo->tile_stride - 1); + y = addr >> voodoo->tile_stride_shift; - case 0x0100000: /*2D registers*/ - if ((addr & 0x3fc) == SST_intrCtrl) { - banshee->intrCtrl = val & 0x0030003f; - } else { - voodoo_queue_command(voodoo, (addr & 0x1fc) | FIFO_WRITEL_2DREG, val); - } - break; + addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128 * 32) + ((y & 31) * 128) + (y >> 5) * voodoo->tile_x_real; + // banshee_log(" Tile rb %08x->%08x %i %i\n", old_addr, addr, x, y); + } + if (addr >= svga->vram_max) + return 0xff; - case 0x0200000: case 0x0300000: case 0x0400000: case 0x0500000: /*3D registers*/ - switch (addr & 0x3fc) - { - case SST_intrCtrl: - banshee->intrCtrl = val & 0x0030003f; -// banshee_log("intrCtrl=%08x\n", val); - break; + cycles -= video_timing_read_b; - case SST_userIntrCMD: - fatal("userIntrCMD write %08x\n", val); - break; + // banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]); - case SST_swapbufferCMD: - voodoo->cmd_written++; - voodoo_queue_command(voodoo, (addr & 0x3fc) | FIFO_WRITEL_REG, val); - if (!voodoo->voodoo_busy) - voodoo_wake_fifo_threads(voodoo->set, voodoo); -// banshee_log("SST_swapbufferCMD write: %i %i\n", voodoo->cmd_written, voodoo->cmd_written_fifo); - break; - case SST_triangleCMD: - voodoo->cmd_written++; - voodoo_queue_command(voodoo, (addr & 0x3fc) | FIFO_WRITEL_REG, val); - if (!voodoo->voodoo_busy) - voodoo_wake_fifo_threads(voodoo->set, voodoo); - break; - case SST_ftriangleCMD: - voodoo->cmd_written++; - voodoo_queue_command(voodoo, (addr & 0x3fc) | FIFO_WRITEL_REG, val); - if (!voodoo->voodoo_busy) - voodoo_wake_fifo_threads(voodoo->set, voodoo); - break; - case SST_fastfillCMD: - voodoo->cmd_written++; - voodoo_queue_command(voodoo, (addr & 0x3fc) | FIFO_WRITEL_REG, val); - if (!voodoo->voodoo_busy) - voodoo_wake_fifo_threads(voodoo->set, voodoo); - break; - case SST_nopCMD: - voodoo->cmd_written++; - voodoo_queue_command(voodoo, (addr & 0x3fc) | FIFO_WRITEL_REG, val); - if (!voodoo->voodoo_busy) - voodoo_wake_fifo_threads(voodoo->set, voodoo); - break; + return svga->vram[addr & svga->vram_mask]; +} - case SST_swapPending: - thread_wait_mutex(voodoo->swap_mutex); - voodoo->swap_count++; - thread_release_mutex(voodoo->swap_mutex); -// voodoo->cmd_written++; - break; +static uint16_t +banshee_read_linear_w(uint32_t addr, void *p) +{ + banshee_t *banshee = (banshee_t *) p; + voodoo_t *voodoo = banshee->voodoo; + svga_t *svga = &banshee->svga; - default: - voodoo_queue_command(voodoo, (addr & 0x3ffffc) | FIFO_WRITEL_REG, val); - break; + if (addr & 1) + return banshee_read_linear(addr, p) | (banshee_read_linear(addr + 1, p) << 8); + + cycles -= voodoo->read_time; + addr &= svga->decode_mask; + if (addr >= voodoo->tile_base) { + int x, y; + + addr -= voodoo->tile_base; + x = addr & (voodoo->tile_stride - 1); + y = addr >> voodoo->tile_stride_shift; + + addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128 * 32) + ((y & 31) * 128) + (y >> 5) * voodoo->tile_x_real; + // banshee_log(" Tile rb %08x->%08x %i %i\n", old_addr, addr, x, y); + } + if (addr >= svga->vram_max) + return 0xff; + + cycles -= video_timing_read_w; + + // banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]); + + return *(uint16_t *) &svga->vram[addr & svga->vram_mask]; +} + +static uint32_t +banshee_read_linear_l(uint32_t addr, void *p) +{ + banshee_t *banshee = (banshee_t *) p; + voodoo_t *voodoo = banshee->voodoo; + svga_t *svga = &banshee->svga; + + if (addr & 3) + return banshee_read_linear_w(addr, p) | (banshee_read_linear_w(addr + 2, p) << 16); + + cycles -= voodoo->read_time; + + addr &= svga->decode_mask; + if (addr >= voodoo->tile_base) { + int x, y; + + addr -= voodoo->tile_base; + x = addr & (voodoo->tile_stride - 1); + y = addr >> voodoo->tile_stride_shift; + + addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128 * 32) + ((y & 31) * 128) + (y >> 5) * voodoo->tile_x_real; + // banshee_log(" Tile rb %08x->%08x %i %i\n", old_addr, addr, x, y); + } + if (addr >= svga->vram_max) + return 0xff; + + cycles -= video_timing_read_l; + + // banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]); + + return *(uint32_t *) &svga->vram[addr & svga->vram_mask]; +} + +static void +banshee_write_linear(uint32_t addr, uint8_t val, void *p) +{ + banshee_t *banshee = (banshee_t *) p; + voodoo_t *voodoo = banshee->voodoo; + svga_t *svga = &banshee->svga; + + cycles -= voodoo->write_time; + + // banshee_log("write_linear: addr=%08x val=%02x\n", addr, val); + addr &= svga->decode_mask; + if (addr >= voodoo->tile_base) { + int x, y; + + addr -= voodoo->tile_base; + x = addr & (voodoo->tile_stride - 1); + y = addr >> voodoo->tile_stride_shift; + + addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128 * 32) + ((y & 31) * 128) + (y >> 5) * voodoo->tile_x_real; + // banshee_log(" Tile b %08x->%08x %i %i\n", old_addr, addr, x, y); + } + if (addr >= svga->vram_max) + return; + + cycles -= video_timing_write_b; + + svga->changedvram[addr >> 12] = changeframecount; + svga->vram[addr & svga->vram_mask] = val; +} + +static void +banshee_write_linear_w(uint32_t addr, uint16_t val, void *p) +{ + banshee_t *banshee = (banshee_t *) p; + voodoo_t *voodoo = banshee->voodoo; + svga_t *svga = &banshee->svga; + + if (addr & 1) { + banshee_write_linear(addr, val, p); + banshee_write_linear(addr + 1, val >> 8, p); + return; + } + + cycles -= voodoo->write_time; + // banshee_log("write_linear: addr=%08x val=%02x\n", addr, val); + addr &= svga->decode_mask; + if (addr >= voodoo->tile_base) { + int x, y; + + addr -= voodoo->tile_base; + x = addr & (voodoo->tile_stride - 1); + y = addr >> voodoo->tile_stride_shift; + + addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128 * 32) + ((y & 31) * 128) + (y >> 5) * voodoo->tile_x_real; + // banshee_log(" Tile b %08x->%08x %i %i\n", old_addr, addr, x, y); + } + if (addr >= svga->vram_max) + return; + + cycles -= video_timing_write_w; + + svga->changedvram[addr >> 12] = changeframecount; + *(uint16_t *) &svga->vram[addr & svga->vram_mask] = val; +} + +static void +banshee_write_linear_l(uint32_t addr, uint32_t val, void *p) +{ + banshee_t *banshee = (banshee_t *) p; + voodoo_t *voodoo = banshee->voodoo; + svga_t *svga = &banshee->svga; + int timing; + + if (addr & 3) { + banshee_write_linear_w(addr, val, p); + banshee_write_linear_w(addr + 2, val >> 16, p); + return; + } + + if (addr == voodoo->last_write_addr + 4) + timing = voodoo->burst_time; + else + timing = voodoo->write_time; + cycles -= timing; + voodoo->last_write_addr = addr; + + // /*if (val) */banshee_log("write_linear_l: addr=%08x val=%08x %08x\n", addr, val, voodoo->tile_base); + addr &= svga->decode_mask; + if (addr >= voodoo->tile_base) { + int x, y; + + addr -= voodoo->tile_base; + x = addr & (voodoo->tile_stride - 1); + y = addr >> voodoo->tile_stride_shift; + + addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128 * 32) + ((y & 31) * 128) + (y >> 5) * voodoo->tile_x_real; + // banshee_log(" Tile %08x->%08x->%08x->%08x %i %i tile_x=%i\n", old_addr, addr_off, addr2, addr, x, y, voodoo->tile_x_real); + } + + if (addr >= svga->vram_max) + return; + + cycles -= video_timing_write_l; + + svga->changedvram[addr >> 12] = changeframecount; + *(uint32_t *) &svga->vram[addr & svga->vram_mask] = val; + if (voodoo->cmdfifo_enabled && addr >= voodoo->cmdfifo_base && addr < voodoo->cmdfifo_end) { + // banshee_log("CMDFIFO write %08x %08x old amin=%08x amax=%08x hlcnt=%i depth_wr=%i rp=%08x\n", addr, val, voodoo->cmdfifo_amin, voodoo->cmdfifo_amax, voodoo->cmdfifo_holecount, voodoo->cmdfifo_depth_wr, voodoo->cmdfifo_rp); + if (addr == voodoo->cmdfifo_base && !voodoo->cmdfifo_holecount) { + // if (voodoo->cmdfifo_holecount) + // fatal("CMDFIFO reset pointers while outstanding holes\n"); + /*Reset pointers*/ + voodoo->cmdfifo_amin = voodoo->cmdfifo_base; + voodoo->cmdfifo_amax = voodoo->cmdfifo_base; + voodoo->cmdfifo_depth_wr++; + voodoo_wake_fifo_thread(voodoo); + } else if (voodoo->cmdfifo_holecount) { + // if ((addr <= voodoo->cmdfifo_amin && voodoo->cmdfifo_amin != -4) || addr >= voodoo->cmdfifo_amax) + // fatal("CMDFIFO holecount write outside of amin/amax - amin=%08x amax=%08x holecount=%i\n", voodoo->cmdfifo_amin, voodoo->cmdfifo_amax, voodoo->cmdfifo_holecount); + // banshee_log("holecount %i\n", voodoo->cmdfifo_holecount); + voodoo->cmdfifo_holecount--; + if (!voodoo->cmdfifo_holecount) { + /*Filled in holes, resume normal operation*/ + voodoo->cmdfifo_depth_wr += ((voodoo->cmdfifo_amax - voodoo->cmdfifo_amin) >> 2); + voodoo->cmdfifo_amin = voodoo->cmdfifo_amax; + voodoo_wake_fifo_thread(voodoo); + // banshee_log("hole filled! amin=%08x amax=%08x added %i words\n", voodoo->cmdfifo_amin, voodoo->cmdfifo_amax, words_to_add); + } + } else if (addr == voodoo->cmdfifo_amax + 4) { + /*In-order write*/ + voodoo->cmdfifo_amin = addr; + voodoo->cmdfifo_amax = addr; + voodoo->cmdfifo_depth_wr++; + voodoo_wake_fifo_thread(voodoo); + } else { + /*Out-of-order write*/ + if (addr < voodoo->cmdfifo_amin) { + /*Reset back to start. Note that write is still out of order!*/ + voodoo->cmdfifo_amin = voodoo->cmdfifo_base - 4; + } + // else if (addr < voodoo->cmdfifo_amax) + // fatal("Out-of-order write really out of order\n"); + voodoo->cmdfifo_amax = addr; + voodoo->cmdfifo_holecount = ((voodoo->cmdfifo_amax - voodoo->cmdfifo_amin) >> 2) - 1; + // banshee_log("CMDFIFO out of order: amin=%08x amax=%08x holecount=%i\n", voodoo->cmdfifo_amin, voodoo->cmdfifo_amax, voodoo->cmdfifo_holecount); + } + } +} + +void +banshee_hwcursor_draw(svga_t *svga, int displine) +{ + banshee_t *banshee = (banshee_t *) svga->p; + int x, c; + int x_off; + int xx; + uint32_t col0 = banshee->hwCurC0; + uint32_t col1 = banshee->hwCurC1; + uint8_t plane0[8], plane1[8]; + + for (c = 0; c < 8; c++) + plane0[c] = svga->vram[svga->hwcursor_latch.addr + c]; + for (c = 0; c < 8; c++) + plane1[c] = svga->vram[svga->hwcursor_latch.addr + c + 8]; + svga->hwcursor_latch.addr += 16; + + x_off = svga->hwcursor_latch.x; + + if (banshee->vidProcCfg & VIDPROCCFG_CURSOR_MODE) { + /*X11 mode*/ + for (x = 0; x < 64; x += 8) { + if (x_off > -8) { + for (xx = 0; xx < 8; xx++) { + if (plane0[x >> 3] & (1 << 7)) + ((uint32_t *) buffer32->line[displine])[x_off + xx + svga->x_add] = (plane1[x >> 3] & (1 << 7)) ? col1 : col0; + + plane0[x >> 3] <<= 1; + plane1[x >> 3] <<= 1; } - break; + } - case 0x0600000: case 0x0700000: /*Texture download*/ - voodoo->tex_count++; - voodoo_queue_command(voodoo, (addr & 0x1ffffc) | FIFO_WRITEL_TEX, val); - break; - - case 0x1000000: case 0x1100000: case 0x1200000: case 0x1300000: /*3D LFB*/ - case 0x1400000: case 0x1500000: case 0x1600000: case 0x1700000: - case 0x1800000: case 0x1900000: case 0x1a00000: case 0x1b00000: - case 0x1c00000: case 0x1d00000: case 0x1e00000: case 0x1f00000: - voodoo_queue_command(voodoo, (addr & 0xfffffc) | FIFO_WRITEL_FB, val); - break; + x_off += 8; } -} + } else { + /*Windows mode*/ + for (x = 0; x < 64; x += 8) { + if (x_off > -8) { + for (xx = 0; xx < 8; xx++) { + if (!(plane0[x >> 3] & (1 << 7))) + ((uint32_t *) buffer32->line[displine])[x_off + xx + svga->x_add] = (plane1[x >> 3] & (1 << 7)) ? col1 : col0; + else if (plane1[x >> 3] & (1 << 7)) + ((uint32_t *) buffer32->line[displine])[x_off + xx + svga->x_add] ^= 0xffffff; -static uint8_t banshee_read_linear(uint32_t addr, void *p) -{ - banshee_t *banshee = (banshee_t *)p; - voodoo_t *voodoo = banshee->voodoo; - svga_t *svga = &banshee->svga; - - cycles -= voodoo->read_time; - - addr &= svga->decode_mask; - if (addr >= voodoo->tile_base) - { - int x, y; - - addr -= voodoo->tile_base; - x = addr & (voodoo->tile_stride-1); - y = addr >> voodoo->tile_stride_shift; - - addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128*32) + ((y & 31) * 128) + (y >> 5)*voodoo->tile_x_real; -// banshee_log(" Tile rb %08x->%08x %i %i\n", old_addr, addr, x, y); - } - if (addr >= svga->vram_max) - return 0xff; - - cycles -= video_timing_read_b; - -// banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]); - - return svga->vram[addr & svga->vram_mask]; -} - -static uint16_t banshee_read_linear_w(uint32_t addr, void *p) -{ - banshee_t *banshee = (banshee_t *)p; - voodoo_t *voodoo = banshee->voodoo; - svga_t *svga = &banshee->svga; - - if (addr & 1) - return banshee_read_linear(addr, p) | (banshee_read_linear(addr+1, p) << 8); - - cycles -= voodoo->read_time; - addr &= svga->decode_mask; - if (addr >= voodoo->tile_base) - { - int x, y; - - addr -= voodoo->tile_base; - x = addr & (voodoo->tile_stride-1); - y = addr >> voodoo->tile_stride_shift; - - addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128*32) + ((y & 31) * 128) + (y >> 5)*voodoo->tile_x_real; -// banshee_log(" Tile rb %08x->%08x %i %i\n", old_addr, addr, x, y); - } - if (addr >= svga->vram_max) - return 0xff; - - cycles -= video_timing_read_w; - -// banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]); - - return *(uint16_t *)&svga->vram[addr & svga->vram_mask]; -} - -static uint32_t banshee_read_linear_l(uint32_t addr, void *p) -{ - banshee_t *banshee = (banshee_t *)p; - voodoo_t *voodoo = banshee->voodoo; - svga_t *svga = &banshee->svga; - - if (addr & 3) - return banshee_read_linear_w(addr, p) | (banshee_read_linear_w(addr+2, p) << 16); - - cycles -= voodoo->read_time; - - addr &= svga->decode_mask; - if (addr >= voodoo->tile_base) - { - int x, y; - - addr -= voodoo->tile_base; - x = addr & (voodoo->tile_stride-1); - y = addr >> voodoo->tile_stride_shift; - - addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128*32) + ((y & 31) * 128) + (y >> 5)*voodoo->tile_x_real; -// banshee_log(" Tile rb %08x->%08x %i %i\n", old_addr, addr, x, y); - } - if (addr >= svga->vram_max) - return 0xff; - - cycles -= video_timing_read_l; - -// banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]); - - return *(uint32_t *)&svga->vram[addr & svga->vram_mask]; -} - -static void banshee_write_linear(uint32_t addr, uint8_t val, void *p) -{ - banshee_t *banshee = (banshee_t *)p; - voodoo_t *voodoo = banshee->voodoo; - svga_t *svga = &banshee->svga; - - cycles -= voodoo->write_time; - -// banshee_log("write_linear: addr=%08x val=%02x\n", addr, val); - addr &= svga->decode_mask; - if (addr >= voodoo->tile_base) - { - int x, y; - - addr -= voodoo->tile_base; - x = addr & (voodoo->tile_stride-1); - y = addr >> voodoo->tile_stride_shift; - - addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128*32) + ((y & 31) * 128) + (y >> 5)*voodoo->tile_x_real; -// banshee_log(" Tile b %08x->%08x %i %i\n", old_addr, addr, x, y); - } - if (addr >= svga->vram_max) - return; - - cycles -= video_timing_write_b; - - svga->changedvram[addr >> 12] = changeframecount; - svga->vram[addr & svga->vram_mask] = val; -} - -static void banshee_write_linear_w(uint32_t addr, uint16_t val, void *p) -{ - banshee_t *banshee = (banshee_t *)p; - voodoo_t *voodoo = banshee->voodoo; - svga_t *svga = &banshee->svga; - - if (addr & 1) - { - banshee_write_linear(addr, val, p); - banshee_write_linear(addr + 1, val >> 8, p); - return; - } - - cycles -= voodoo->write_time; -// banshee_log("write_linear: addr=%08x val=%02x\n", addr, val); - addr &= svga->decode_mask; - if (addr >= voodoo->tile_base) - { - int x, y; - - addr -= voodoo->tile_base; - x = addr & (voodoo->tile_stride-1); - y = addr >> voodoo->tile_stride_shift; - - addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128*32) + ((y & 31) * 128) + (y >> 5)*voodoo->tile_x_real; -// banshee_log(" Tile b %08x->%08x %i %i\n", old_addr, addr, x, y); - } - if (addr >= svga->vram_max) - return; - - cycles -= video_timing_write_w; - - svga->changedvram[addr >> 12] = changeframecount; - *(uint16_t *)&svga->vram[addr & svga->vram_mask] = val; -} - -static void banshee_write_linear_l(uint32_t addr, uint32_t val, void *p) -{ - banshee_t *banshee = (banshee_t *)p; - voodoo_t *voodoo = banshee->voodoo; - svga_t *svga = &banshee->svga; - int timing; - - if (addr & 3) - { - banshee_write_linear_w(addr, val, p); - banshee_write_linear_w(addr + 2, val >> 16, p); - return; - } - - if (addr == voodoo->last_write_addr+4) - timing = voodoo->burst_time; - else - timing = voodoo->write_time; - cycles -= timing; - voodoo->last_write_addr = addr; - -// /*if (val) */banshee_log("write_linear_l: addr=%08x val=%08x %08x\n", addr, val, voodoo->tile_base); - addr &= svga->decode_mask; - if (addr >= voodoo->tile_base) - { - int x, y; - - addr -= voodoo->tile_base; - x = addr & (voodoo->tile_stride-1); - y = addr >> voodoo->tile_stride_shift; - - addr = voodoo->tile_base + (x & 127) + ((x >> 7) * 128*32) + ((y & 31) * 128) + (y >> 5)*voodoo->tile_x_real; -// banshee_log(" Tile %08x->%08x->%08x->%08x %i %i tile_x=%i\n", old_addr, addr_off, addr2, addr, x, y, voodoo->tile_x_real); - } - - if (addr >= svga->vram_max) - return; - - cycles -= video_timing_write_l; - - svga->changedvram[addr >> 12] = changeframecount; - *(uint32_t *)&svga->vram[addr & svga->vram_mask] = val; - if (voodoo->cmdfifo_enabled && addr >= voodoo->cmdfifo_base && addr < voodoo->cmdfifo_end) - { -// banshee_log("CMDFIFO write %08x %08x old amin=%08x amax=%08x hlcnt=%i depth_wr=%i rp=%08x\n", addr, val, voodoo->cmdfifo_amin, voodoo->cmdfifo_amax, voodoo->cmdfifo_holecount, voodoo->cmdfifo_depth_wr, voodoo->cmdfifo_rp); - if (addr == voodoo->cmdfifo_base && !voodoo->cmdfifo_holecount) - { -// if (voodoo->cmdfifo_holecount) -// fatal("CMDFIFO reset pointers while outstanding holes\n"); - /*Reset pointers*/ - voodoo->cmdfifo_amin = voodoo->cmdfifo_base; - voodoo->cmdfifo_amax = voodoo->cmdfifo_base; - voodoo->cmdfifo_depth_wr++; - voodoo_wake_fifo_thread(voodoo); + plane0[x >> 3] <<= 1; + plane1[x >> 3] <<= 1; } - else if (voodoo->cmdfifo_holecount) - { -// if ((addr <= voodoo->cmdfifo_amin && voodoo->cmdfifo_amin != -4) || addr >= voodoo->cmdfifo_amax) -// fatal("CMDFIFO holecount write outside of amin/amax - amin=%08x amax=%08x holecount=%i\n", voodoo->cmdfifo_amin, voodoo->cmdfifo_amax, voodoo->cmdfifo_holecount); -// banshee_log("holecount %i\n", voodoo->cmdfifo_holecount); - voodoo->cmdfifo_holecount--; - if (!voodoo->cmdfifo_holecount) - { - /*Filled in holes, resume normal operation*/ - voodoo->cmdfifo_depth_wr += ((voodoo->cmdfifo_amax - voodoo->cmdfifo_amin) >> 2); - voodoo->cmdfifo_amin = voodoo->cmdfifo_amax; - voodoo_wake_fifo_thread(voodoo); -// banshee_log("hole filled! amin=%08x amax=%08x added %i words\n", voodoo->cmdfifo_amin, voodoo->cmdfifo_amax, words_to_add); - } - } - else if (addr == voodoo->cmdfifo_amax+4) - { - /*In-order write*/ - voodoo->cmdfifo_amin = addr; - voodoo->cmdfifo_amax = addr; - voodoo->cmdfifo_depth_wr++; - voodoo_wake_fifo_thread(voodoo); - } - else - { - /*Out-of-order write*/ - if (addr < voodoo->cmdfifo_amin) - { - /*Reset back to start. Note that write is still out of order!*/ - voodoo->cmdfifo_amin = voodoo->cmdfifo_base-4; + } - } -// else if (addr < voodoo->cmdfifo_amax) -// fatal("Out-of-order write really out of order\n"); - voodoo->cmdfifo_amax = addr; - voodoo->cmdfifo_holecount = ((voodoo->cmdfifo_amax - voodoo->cmdfifo_amin) >> 2) - 1; -// banshee_log("CMDFIFO out of order: amin=%08x amax=%08x holecount=%i\n", voodoo->cmdfifo_amin, voodoo->cmdfifo_amax, voodoo->cmdfifo_holecount); - } + x_off += 8; } + } } -void banshee_hwcursor_draw(svga_t *svga, int displine) -{ - banshee_t *banshee = (banshee_t *)svga->p; - int x, c; - int x_off; - int xx; - uint32_t col0 = banshee->hwCurC0; - uint32_t col1 = banshee->hwCurC1; - uint8_t plane0[8], plane1[8]; +#define CLAMP(x) \ + do { \ + if ((x) & ~0xff) \ + x = ((x) < 0) ? 0 : 0xff; \ + } while (0) - for (c = 0; c < 8; c++) - plane0[c] = svga->vram[svga->hwcursor_latch.addr + c]; - for (c = 0; c < 8; c++) - plane1[c] = svga->vram[svga->hwcursor_latch.addr + c + 8]; - svga->hwcursor_latch.addr += 16; +#define DECODE_RGB565(buf) \ + do { \ + int c; \ + int wp = 0; \ + \ + for (c = 0; c < voodoo->overlay.overlay_bytes; c += 2) { \ + uint16_t data = *(uint16_t *) src; \ + int r = data & 0x1f; \ + int g = (data >> 5) & 0x3f; \ + int b = data >> 11; \ + \ + if (banshee->vidProcCfg & VIDPROCCFG_OVERLAY_CLUT_BYPASS) \ + buf[wp++] = (r << 3) | (g << 10) | (b << 19); \ + else \ + buf[wp++] = (clut[r << 3] & 0x0000ff) | (clut[g << 2] & 0x00ff00) | (clut[b << 3] & 0xff0000); \ + src += 2; \ + } \ + } while (0) - x_off = svga->hwcursor_latch.x; +#define DECODE_RGB565_TILED(buf) \ + do { \ + int c; \ + int wp = 0; \ + uint32_t base_addr = (buf == banshee->overlay_buffer[1]) ? src_addr2 : src_addr; \ + \ + for (c = 0; c < voodoo->overlay.overlay_bytes; c += 2) { \ + uint16_t data = *(uint16_t *) &svga->vram[(base_addr + (c & 127) + (c >> 7) * 128 * 32) & svga->vram_mask]; \ + int r = data & 0x1f; \ + int g = (data >> 5) & 0x3f; \ + int b = data >> 11; \ + \ + if (banshee->vidProcCfg & VIDPROCCFG_OVERLAY_CLUT_BYPASS) \ + buf[wp++] = (r << 3) | (g << 10) | (b << 19); \ + else \ + buf[wp++] = (clut[r << 3] & 0x0000ff) | (clut[g << 2] & 0x00ff00) | (clut[b << 3] & 0xff0000); \ + } \ + } while (0) - if (banshee->vidProcCfg & VIDPROCCFG_CURSOR_MODE) - { - /*X11 mode*/ - for (x = 0; x < 64; x += 8) - { - if (x_off > -8) - { - for (xx = 0; xx < 8; xx++) - { - if (plane0[x >> 3] & (1 << 7)) - ((uint32_t *)buffer32->line[displine])[x_off + xx + svga->x_add] = (plane1[x >> 3] & (1 << 7)) ? col1 : col0; +#define DECODE_YUYV422(buf) \ + do { \ + int c; \ + int wp = 0; \ + \ + for (c = 0; c < voodoo->overlay.overlay_bytes; c += 4) { \ + uint8_t y1, y2; \ + int8_t Cr, Cb; \ + int dR, dG, dB; \ + int r, g, b; \ + \ + y1 = src[0]; \ + Cr = src[1] - 0x80; \ + y2 = src[2]; \ + Cb = src[3] - 0x80; \ + src += 4; \ + \ + dR = (359 * Cr) >> 8; \ + dG = (88 * Cb + 183 * Cr) >> 8; \ + dB = (453 * Cb) >> 8; \ + \ + r = y1 + dR; \ + CLAMP(r); \ + g = y1 - dG; \ + CLAMP(g); \ + b = y1 + dB; \ + CLAMP(b); \ + buf[wp++] = r | (g << 8) | (b << 16); \ + \ + r = y2 + dR; \ + CLAMP(r); \ + g = y2 - dG; \ + CLAMP(g); \ + b = y2 + dB; \ + CLAMP(b); \ + buf[wp++] = r | (g << 8) | (b << 16); \ + } \ + } while (0) - plane0[x >> 3] <<= 1; - plane1[x >> 3] <<= 1; - } - } +#define DECODE_UYUV422(buf) \ + do { \ + int c; \ + int wp = 0; \ + \ + for (c = 0; c < voodoo->overlay.overlay_bytes; c += 4) { \ + uint8_t y1, y2; \ + int8_t Cr, Cb; \ + int dR, dG, dB; \ + int r, g, b; \ + \ + Cr = src[0] - 0x80; \ + y1 = src[1]; \ + Cb = src[2] - 0x80; \ + y2 = src[3]; \ + src += 4; \ + \ + dR = (359 * Cr) >> 8; \ + dG = (88 * Cb + 183 * Cr) >> 8; \ + dB = (453 * Cb) >> 8; \ + \ + r = y1 + dR; \ + CLAMP(r); \ + g = y1 - dG; \ + CLAMP(g); \ + b = y1 + dB; \ + CLAMP(b); \ + buf[wp++] = r | (g << 8) | (b << 16); \ + \ + r = y2 + dR; \ + CLAMP(r); \ + g = y2 - dG; \ + CLAMP(g); \ + b = y2 + dB; \ + CLAMP(b); \ + buf[wp++] = r | (g << 8) | (b << 16); \ + } \ + } while (0) - x_off += 8; - } - } - else - { - /*Windows mode*/ - for (x = 0; x < 64; x += 8) - { - if (x_off > -8) - { - for (xx = 0; xx < 8; xx++) - { - if (!(plane0[x >> 3] & (1 << 7))) - ((uint32_t *)buffer32->line[displine])[x_off + xx + svga->x_add] = (plane1[x >> 3] & (1 << 7)) ? col1 : col0; - else if (plane1[x >> 3] & (1 << 7)) - ((uint32_t *)buffer32->line[displine])[x_off + xx + svga->x_add] ^= 0xffffff; - - plane0[x >> 3] <<= 1; - plane1[x >> 3] <<= 1; - } - } - - x_off += 8; - } - } -} - -#define CLAMP(x) do \ - { \ - if ((x) & ~0xff) \ - x = ((x) < 0) ? 0 : 0xff; \ - } \ - while (0) - -#define DECODE_RGB565(buf) \ - do \ - { \ - int c; \ - int wp = 0; \ - \ - for (c = 0; c < voodoo->overlay.overlay_bytes; c += 2) \ - { \ - uint16_t data = *(uint16_t *)src; \ - int r = data & 0x1f; \ - int g = (data >> 5) & 0x3f; \ - int b = data >> 11; \ - \ - if (banshee->vidProcCfg & VIDPROCCFG_OVERLAY_CLUT_BYPASS) \ - buf[wp++] = (r << 3) | (g << 10) | (b << 19); \ - else \ - buf[wp++] = (clut[r << 3] & 0x0000ff) | \ - (clut[g << 2] & 0x00ff00) | \ - (clut[b << 3] & 0xff0000); \ - src += 2; \ - } \ - } while (0) - -#define DECODE_RGB565_TILED(buf) \ - do \ - { \ - int c; \ - int wp = 0; \ - uint32_t base_addr = (buf == banshee->overlay_buffer[1]) ? src_addr2 : src_addr; \ - \ - for (c = 0; c < voodoo->overlay.overlay_bytes; c += 2) \ - { \ - uint16_t data = *(uint16_t *)&svga->vram[(base_addr + (c & 127) + (c >> 7)*128*32) & svga->vram_mask]; \ - int r = data & 0x1f; \ - int g = (data >> 5) & 0x3f; \ - int b = data >> 11; \ - \ - if (banshee->vidProcCfg & VIDPROCCFG_OVERLAY_CLUT_BYPASS) \ - buf[wp++] = (r << 3) | (g << 10) | (b << 19); \ - else \ - buf[wp++] = (clut[r << 3] & 0x0000ff) | \ - (clut[g << 2] & 0x00ff00) | \ - (clut[b << 3] & 0xff0000); \ - } \ - } while (0) - -#define DECODE_YUYV422(buf) \ - do \ - { \ - int c; \ - int wp = 0; \ - \ - for (c = 0; c < voodoo->overlay.overlay_bytes; c += 4) \ - { \ - uint8_t y1, y2; \ - int8_t Cr, Cb; \ - int dR, dG, dB; \ - int r, g, b; \ - \ - y1 = src[0]; \ - Cr = src[1] - 0x80; \ - y2 = src[2]; \ - Cb = src[3] - 0x80; \ - src += 4; \ - \ - dR = (359*Cr) >> 8; \ - dG = (88*Cb + 183*Cr) >> 8; \ - dB = (453*Cb) >> 8; \ - \ - r = y1 + dR; \ - CLAMP(r); \ - g = y1 - dG; \ - CLAMP(g); \ - b = y1 + dB; \ - CLAMP(b); \ - buf[wp++] = r | (g << 8) | (b << 16); \ - \ - r = y2 + dR; \ - CLAMP(r); \ - g = y2 - dG; \ - CLAMP(g); \ - b = y2 + dB; \ - CLAMP(b); \ - buf[wp++] = r | (g << 8) | (b << 16); \ - } \ - } while (0) - -#define DECODE_UYUV422(buf) \ - do \ - { \ - int c; \ - int wp = 0; \ - \ - for (c = 0; c < voodoo->overlay.overlay_bytes; c += 4) \ - { \ - uint8_t y1, y2; \ - int8_t Cr, Cb; \ - int dR, dG, dB; \ - int r, g, b; \ - \ - Cr = src[0] - 0x80; \ - y1 = src[1]; \ - Cb = src[2] - 0x80; \ - y2 = src[3]; \ - src += 4; \ - \ - dR = (359*Cr) >> 8; \ - dG = (88*Cb + 183*Cr) >> 8; \ - dB = (453*Cb) >> 8; \ - \ - r = y1 + dR; \ - CLAMP(r); \ - g = y1 - dG; \ - CLAMP(g); \ - b = y1 + dB; \ - CLAMP(b); \ - buf[wp++] = r | (g << 8) | (b << 16); \ - \ - r = y2 + dR; \ - CLAMP(r); \ - g = y2 - dG; \ - CLAMP(g); \ - b = y2 + dB; \ - CLAMP(b); \ - buf[wp++] = r | (g << 8) | (b << 16); \ - } \ - } while (0) - - -#define OVERLAY_SAMPLE(buf) \ - do \ - { \ - switch (banshee->overlay_pix_fmt) \ - { \ - case 0: \ - break; \ - \ - case OVERLAY_FMT_YUYV422: \ - DECODE_YUYV422(buf); \ - break; \ - \ - case OVERLAY_FMT_UYVY422: \ - DECODE_UYUV422(buf); \ - break; \ - \ - case OVERLAY_FMT_565: \ - case OVERLAY_FMT_565_DITHER: \ - if (banshee->vidProcCfg & VIDPROCCFG_OVERLAY_TILE) \ - DECODE_RGB565_TILED(buf); \ - else \ - DECODE_RGB565(buf); \ - break; \ - \ - default: \ - fatal("Unknown overlay pix fmt %i\n", banshee->overlay_pix_fmt); \ - } \ - } while (0) +#define OVERLAY_SAMPLE(buf) \ + do { \ + switch (banshee->overlay_pix_fmt) { \ + case 0: \ + break; \ + \ + case OVERLAY_FMT_YUYV422: \ + DECODE_YUYV422(buf); \ + break; \ + \ + case OVERLAY_FMT_UYVY422: \ + DECODE_UYUV422(buf); \ + break; \ + \ + case OVERLAY_FMT_565: \ + case OVERLAY_FMT_565_DITHER: \ + if (banshee->vidProcCfg & VIDPROCCFG_OVERLAY_TILE) \ + DECODE_RGB565_TILED(buf); \ + else \ + DECODE_RGB565(buf); \ + break; \ + \ + default: \ + fatal("Unknown overlay pix fmt %i\n", banshee->overlay_pix_fmt); \ + } \ + } while (0) /* generate both filters for the static table here */ -void voodoo_generate_vb_filters(voodoo_t *voodoo, int fcr, int fcg) +void +voodoo_generate_vb_filters(voodoo_t *voodoo, int fcr, int fcg) { - int g, h; - float difference, diffg; - float thiscol, thiscolg; - float clr, clg = 0; - float hack = 1.0f; - // pre-clamping + int g, h; + float difference, diffg; + float thiscol, thiscolg; + float clr, clg = 0; + float hack = 1.0f; + // pre-clamping - fcr *= hack; - fcg *= hack; + fcr *= hack; + fcg *= hack; - - /* box prefilter */ - for (g=0;g<256;g++) // pixel 1 - our target pixel we want to bleed into + /* box prefilter */ + for (g = 0; g < 256; g++) // pixel 1 - our target pixel we want to bleed into + { + for (h = 0; h < 256; h++) // pixel 2 - our main pixel { - for (h=0;h<256;h++) // pixel 2 - our main pixel - { - float avg; - float avgdiff; + float avg; + float avgdiff; - difference = (float)(g - h); - avg = g; - avgdiff = avg - h; + difference = (float) (g - h); + avg = g; + avgdiff = avg - h; - avgdiff = avgdiff * 0.75f; - if (avgdiff < 0) avgdiff *= -1; - if (difference < 0) difference *= -1; + avgdiff = avgdiff * 0.75f; + if (avgdiff < 0) + avgdiff *= -1; + if (difference < 0) + difference *= -1; - thiscol = thiscolg = g; + thiscol = thiscolg = g; - if (h > g) - { - clr = clg = avgdiff; + if (h > g) { + clr = clg = avgdiff; - if (clr>fcr) clr=fcr; - if (clg>fcg) clg=fcg; + if (clr > fcr) + clr = fcr; + if (clg > fcg) + clg = fcg; - thiscol = g; - thiscolg = g; + thiscol = g; + thiscolg = g; - if (thiscol>g+fcr) - thiscol=g+fcr; - if (thiscolg>g+fcg) - thiscolg=g+fcg; + if (thiscol > g + fcr) + thiscol = g + fcr; + if (thiscolg > g + fcg) + thiscolg = g + fcg; - if (thiscol>g+difference) - thiscol=g+difference; - if (thiscolg>g+difference) - thiscolg=g+difference; + if (thiscol > g + difference) + thiscol = g + difference; + if (thiscolg > g + difference) + thiscolg = g + difference; - // hmm this might not be working out.. - int ugh = g - h; - if (ugh < fcr) - thiscol = h; - if (ugh < fcg) - thiscolg = h; - } + // hmm this might not be working out.. + int ugh = g - h; + if (ugh < fcr) + thiscol = h; + if (ugh < fcg) + thiscolg = h; + } - if (difference > fcr) - thiscol = g; - if (difference > fcg) - thiscolg = g; + if (difference > fcr) + thiscol = g; + if (difference > fcg) + thiscolg = g; - // clamp - if (thiscol < 0) thiscol = 0; - if (thiscolg < 0) thiscolg = 0; + // clamp + if (thiscol < 0) + thiscol = 0; + if (thiscolg < 0) + thiscolg = 0; - if (thiscol > 255) thiscol = 255; - if (thiscolg > 255) thiscolg = 255; + if (thiscol > 255) + thiscol = 255; + if (thiscolg > 255) + thiscolg = 255; - vb_filter_bx_rb[g][h] = (thiscol); - vb_filter_bx_g [g][h] = (thiscolg); - - } - float lined = g + 4; - if (lined > 255) - lined = 255; - voodoo->purpleline[g][0] = lined; - voodoo->purpleline[g][2] = lined; - - lined = g + 0; - if (lined > 255) - lined = 255; - voodoo->purpleline[g][1] = lined; + vb_filter_bx_rb[g][h] = (thiscol); + vb_filter_bx_g[g][h] = (thiscolg); } + float lined = g + 4; + if (lined > 255) + lined = 255; + voodoo->purpleline[g][0] = lined; + voodoo->purpleline[g][2] = lined; - /* 4x1 and 2x2 filter */ - //fcr *= 5; - //fcg *= 6; + lined = g + 0; + if (lined > 255) + lined = 255; + voodoo->purpleline[g][1] = lined; + } - for (g=0;g<256;g++) // pixel 1 + /* 4x1 and 2x2 filter */ + // fcr *= 5; + // fcg *= 6; + + for (g = 0; g < 256; g++) // pixel 1 + { + for (h = 0; h < 256; h++) // pixel 2 { - for (h=0;h<256;h++) // pixel 2 - { - difference = (float)(h - g); - diffg = difference; + difference = (float) (h - g); + diffg = difference; - thiscol = thiscolg = g; + thiscol = thiscolg = g; - if (difference > fcr) - difference = fcr; - if (difference < -fcr) - difference = -fcr; + if (difference > fcr) + difference = fcr; + if (difference < -fcr) + difference = -fcr; - if (diffg > fcg) - diffg = fcg; - if (diffg < -fcg) - diffg = -fcg; + if (diffg > fcg) + diffg = fcg; + if (diffg < -fcg) + diffg = -fcg; - if ((difference < fcr) || (-difference > -fcr)) - thiscol = g + (difference / 2); - if ((diffg < fcg) || (-diffg > -fcg)) - thiscolg = g + (diffg / 2); + if ((difference < fcr) || (-difference > -fcr)) + thiscol = g + (difference / 2); + if ((diffg < fcg) || (-diffg > -fcg)) + thiscolg = g + (diffg / 2); - if (thiscol < 0) - thiscol = 0; - if (thiscol > 255) - thiscol = 255; + if (thiscol < 0) + thiscol = 0; + if (thiscol > 255) + thiscol = 255; - if (thiscolg < 0) - thiscolg = 0; - if (thiscolg > 255) - thiscolg = 255; + if (thiscolg < 0) + thiscolg = 0; + if (thiscolg > 255) + thiscolg = 255; - vb_filter_v1_rb[g][h] = thiscol; - vb_filter_v1_g [g][h] = thiscolg; - - } + vb_filter_v1_rb[g][h] = thiscol; + vb_filter_v1_g[g][h] = thiscolg; } - + } } - -static void banshee_overlay_draw(svga_t *svga, int displine) +static void +banshee_overlay_draw(svga_t *svga, int displine) { - banshee_t *banshee = (banshee_t *)svga->p; - voodoo_t *voodoo = banshee->voodoo; - uint32_t *p; - int x; - int y = voodoo->overlay.src_y >> 20; - uint32_t src_addr = svga->overlay_latch.addr + ((banshee->vidProcCfg & VIDPROCCFG_OVERLAY_TILE) ? - ((y & 31) * 128 + (y >> 5) * svga->overlay_latch.pitch) : - y * svga->overlay_latch.pitch); - uint32_t src_addr2 = svga->overlay_latch.addr + ((banshee->vidProcCfg & VIDPROCCFG_OVERLAY_TILE) ? - (((y + 1) & 31) * 128 + ((y + 1) >> 5) * svga->overlay_latch.pitch) : - (y + 1) * svga->overlay_latch.pitch); - uint8_t *src = &svga->vram[src_addr & svga->vram_mask]; - uint32_t src_x = 0; - unsigned int y_coeff = (voodoo->overlay.src_y & 0xfffff) >> 4; - int skip_filtering; - uint32_t *clut = &svga->pallook[(banshee->vidProcCfg & VIDPROCCFG_OVERLAY_CLUT_SEL) ? 256 : 0]; + banshee_t *banshee = (banshee_t *) svga->p; + voodoo_t *voodoo = banshee->voodoo; + uint32_t *p; + int x; + int y = voodoo->overlay.src_y >> 20; + uint32_t src_addr = svga->overlay_latch.addr + ((banshee->vidProcCfg & VIDPROCCFG_OVERLAY_TILE) ? ((y & 31) * 128 + (y >> 5) * svga->overlay_latch.pitch) : y * svga->overlay_latch.pitch); + uint32_t src_addr2 = svga->overlay_latch.addr + ((banshee->vidProcCfg & VIDPROCCFG_OVERLAY_TILE) ? (((y + 1) & 31) * 128 + ((y + 1) >> 5) * svga->overlay_latch.pitch) : (y + 1) * svga->overlay_latch.pitch); + uint8_t *src = &svga->vram[src_addr & svga->vram_mask]; + uint32_t src_x = 0; + unsigned int y_coeff = (voodoo->overlay.src_y & 0xfffff) >> 4; + int skip_filtering; + uint32_t *clut = &svga->pallook[(banshee->vidProcCfg & VIDPROCCFG_OVERLAY_CLUT_SEL) ? 256 : 0]; - if (svga->render == svga_render_null && - !svga->changedvram[src_addr >> 12] && !svga->changedvram[src_addr2 >> 12] && - !svga->fullchange && - ((voodoo->overlay.src_y >> 20) < 2048 && !voodoo->dirty_line[voodoo->overlay.src_y >> 20]) && - !(banshee->vidProcCfg & VIDPROCCFG_V_SCALE_ENABLE)) - { - voodoo->overlay.src_y += (1 << 20); - return; - } + if (svga->render == svga_render_null && !svga->changedvram[src_addr >> 12] && !svga->changedvram[src_addr2 >> 12] && !svga->fullchange && ((voodoo->overlay.src_y >> 20) < 2048 && !voodoo->dirty_line[voodoo->overlay.src_y >> 20]) && !(banshee->vidProcCfg & VIDPROCCFG_V_SCALE_ENABLE)) { + voodoo->overlay.src_y += (1 << 20); + return; + } - if ((voodoo->overlay.src_y >> 20) < 2048) - voodoo->dirty_line[voodoo->overlay.src_y >> 20] = 0; -// pclog("displine=%i addr=%08x %08x %08x %08x\n", displine, svga->overlay_latch.addr, src_addr, voodoo->overlay.vidOverlayDvdy, *(uint32_t *)src); -// if (src_addr >= 0x800000) -// fatal("overlay out of range!\n"); - p = &((uint32_t *)buffer32->line[displine])[svga->overlay_latch.x + svga->x_add]; + if ((voodoo->overlay.src_y >> 20) < 2048) + voodoo->dirty_line[voodoo->overlay.src_y >> 20] = 0; + // pclog("displine=%i addr=%08x %08x %08x %08x\n", displine, svga->overlay_latch.addr, src_addr, voodoo->overlay.vidOverlayDvdy, *(uint32_t *)src); + // if (src_addr >= 0x800000) + // fatal("overlay out of range!\n"); + p = &((uint32_t *) buffer32->line[displine])[svga->overlay_latch.x + svga->x_add]; - if (banshee->voodoo->scrfilter && banshee->voodoo->scrfilterEnabled) - skip_filtering = ((banshee->vidProcCfg & VIDPROCCFG_FILTER_MODE_MASK) != VIDPROCCFG_FILTER_MODE_BILINEAR && - !(banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE) && !(banshee->vidProcCfg & VIDPROCCFG_FILTER_MODE_DITHER_4X4) && - !(banshee->vidProcCfg & VIDPROCCFG_FILTER_MODE_DITHER_2X2)); - else - skip_filtering = ((banshee->vidProcCfg & VIDPROCCFG_FILTER_MODE_MASK) != VIDPROCCFG_FILTER_MODE_BILINEAR && - !(banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE)); + if (banshee->voodoo->scrfilter && banshee->voodoo->scrfilterEnabled) + skip_filtering = ((banshee->vidProcCfg & VIDPROCCFG_FILTER_MODE_MASK) != VIDPROCCFG_FILTER_MODE_BILINEAR && !(banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE) && !(banshee->vidProcCfg & VIDPROCCFG_FILTER_MODE_DITHER_4X4) && !(banshee->vidProcCfg & VIDPROCCFG_FILTER_MODE_DITHER_2X2)); + else + skip_filtering = ((banshee->vidProcCfg & VIDPROCCFG_FILTER_MODE_MASK) != VIDPROCCFG_FILTER_MODE_BILINEAR && !(banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE)); - if (skip_filtering) - { - /*No scaling or filtering required, just write straight to output buffer*/ - OVERLAY_SAMPLE(p); - } - else - { - OVERLAY_SAMPLE(banshee->overlay_buffer[0]); + if (skip_filtering) { + /*No scaling or filtering required, just write straight to output buffer*/ + OVERLAY_SAMPLE(p); + } else { + OVERLAY_SAMPLE(banshee->overlay_buffer[0]); - switch (banshee->vidProcCfg & VIDPROCCFG_FILTER_MODE_MASK) - { - case VIDPROCCFG_FILTER_MODE_BILINEAR: - src = &svga->vram[src_addr2 & svga->vram_mask]; - OVERLAY_SAMPLE(banshee->overlay_buffer[1]); - if (banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE) - { - for (x = 0; x < svga->overlay_latch.cur_xsize; x++) - { - unsigned int x_coeff = (src_x & 0xfffff) >> 4; - unsigned int coeffs[4] = { - ((0x10000 - x_coeff) * (0x10000 - y_coeff)) >> 16, - ( x_coeff * (0x10000 - y_coeff)) >> 16, - ((0x10000 - x_coeff) * y_coeff) >> 16, - ( x_coeff * y_coeff) >> 16 - }; - uint32_t samp0 = banshee->overlay_buffer[0][src_x >> 20]; - uint32_t samp1 = banshee->overlay_buffer[0][(src_x >> 20) + 1]; - uint32_t samp2 = banshee->overlay_buffer[1][src_x >> 20]; - uint32_t samp3 = banshee->overlay_buffer[1][(src_x >> 20) + 1]; - int r = (((samp0 >> 16) & 0xff) * coeffs[0] + - ((samp1 >> 16) & 0xff) * coeffs[1] + - ((samp2 >> 16) & 0xff) * coeffs[2] + - ((samp3 >> 16) & 0xff) * coeffs[3]) >> 16; - int g = (((samp0 >> 8) & 0xff) * coeffs[0] + - ((samp1 >> 8) & 0xff) * coeffs[1] + - ((samp2 >> 8) & 0xff) * coeffs[2] + - ((samp3 >> 8) & 0xff) * coeffs[3]) >> 16; - int b = ((samp0 & 0xff) * coeffs[0] + - (samp1 & 0xff) * coeffs[1] + - (samp2 & 0xff) * coeffs[2] + - (samp3 & 0xff) * coeffs[3]) >> 16; - p[x] = (r << 16) | (g << 8) | b; + switch (banshee->vidProcCfg & VIDPROCCFG_FILTER_MODE_MASK) { + case VIDPROCCFG_FILTER_MODE_BILINEAR: + src = &svga->vram[src_addr2 & svga->vram_mask]; + OVERLAY_SAMPLE(banshee->overlay_buffer[1]); + if (banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE) { + for (x = 0; x < svga->overlay_latch.cur_xsize; x++) { + unsigned int x_coeff = (src_x & 0xfffff) >> 4; + unsigned int coeffs[4] = { + ((0x10000 - x_coeff) * (0x10000 - y_coeff)) >> 16, + (x_coeff * (0x10000 - y_coeff)) >> 16, + ((0x10000 - x_coeff) * y_coeff) >> 16, + (x_coeff * y_coeff) >> 16 + }; + uint32_t samp0 = banshee->overlay_buffer[0][src_x >> 20]; + uint32_t samp1 = banshee->overlay_buffer[0][(src_x >> 20) + 1]; + uint32_t samp2 = banshee->overlay_buffer[1][src_x >> 20]; + uint32_t samp3 = banshee->overlay_buffer[1][(src_x >> 20) + 1]; + int r = (((samp0 >> 16) & 0xff) * coeffs[0] + ((samp1 >> 16) & 0xff) * coeffs[1] + ((samp2 >> 16) & 0xff) * coeffs[2] + ((samp3 >> 16) & 0xff) * coeffs[3]) >> 16; + int g = (((samp0 >> 8) & 0xff) * coeffs[0] + ((samp1 >> 8) & 0xff) * coeffs[1] + ((samp2 >> 8) & 0xff) * coeffs[2] + ((samp3 >> 8) & 0xff) * coeffs[3]) >> 16; + int b = ((samp0 & 0xff) * coeffs[0] + (samp1 & 0xff) * coeffs[1] + (samp2 & 0xff) * coeffs[2] + (samp3 & 0xff) * coeffs[3]) >> 16; + p[x] = (r << 16) | (g << 8) | b; - src_x += voodoo->overlay.vidOverlayDudx; - } - } - else - { - for (x = 0; x < svga->overlay_latch.cur_xsize; x++) - { - uint32_t samp0 = banshee->overlay_buffer[0][src_x >> 20]; - uint32_t samp1 = banshee->overlay_buffer[1][src_x >> 20]; - int r = (((samp0 >> 16) & 0xff) * (0x10000 - y_coeff) + - ((samp1 >> 16) & 0xff) * y_coeff) >> 16; - int g = (((samp0 >> 8) & 0xff) * (0x10000 - y_coeff) + - ((samp1 >> 8) & 0xff) * y_coeff) >> 16; - int b = ((samp0 & 0xff) * (0x10000 - y_coeff) + - (samp1 & 0xff) * y_coeff) >> 16; - p[x] = (r << 16) | (g << 8) | b; - } - } - break; - - case VIDPROCCFG_FILTER_MODE_DITHER_4X4: - if (banshee->voodoo->scrfilter && banshee->voodoo->scrfilterEnabled) - { - uint8_t *fil = malloc((svga->overlay_latch.cur_xsize) * 3); - uint8_t *fil3 = malloc((svga->overlay_latch.cur_xsize) * 3); - - if (banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE) /* leilei HACK - don't know of real 4x1 hscaled behavior yet, double for now */ - { - for (x=0; xoverlay_latch.cur_xsize;x++) - { - fil[x*3] = ((banshee->overlay_buffer[0][src_x >> 20])); - fil[x*3+1] = ((banshee->overlay_buffer[0][src_x >> 20] >> 8)); - fil[x*3+2] = ((banshee->overlay_buffer[0][src_x >> 20] >> 16)); - fil3[x*3+0] = fil[x*3+0]; - fil3[x*3+1] = fil[x*3+1]; - fil3[x*3+2] = fil[x*3+2]; - src_x += voodoo->overlay.vidOverlayDudx; - } - } - else - { - for (x=0; xoverlay_latch.cur_xsize;x++) - { - fil[x*3] = ((banshee->overlay_buffer[0][x])); - fil[x*3+1] = ((banshee->overlay_buffer[0][x] >> 8)); - fil[x*3+2] = ((banshee->overlay_buffer[0][x] >> 16)); - fil3[x*3+0] = fil[x*3+0]; - fil3[x*3+1] = fil[x*3+1]; - fil3[x*3+2] = fil[x*3+2]; - } - } - if (y % 2 == 0) - { - for (x=0; xoverlay_latch.cur_xsize;x++) - { - fil[x*3] = banshee->voodoo->purpleline[fil[x*3+0]][0]; - fil[x*3+1] = banshee->voodoo->purpleline[fil[x*3+1]][1]; - fil[x*3+2] = banshee->voodoo->purpleline[fil[x*3+2]][2]; - } - } - - for (x=1; xoverlay_latch.cur_xsize;x++) - { - fil3[(x)*3] = vb_filter_v1_rb [fil[x*3]] [fil[(x-1) *3]]; - fil3[(x)*3+1] = vb_filter_v1_g [fil[x*3+1]][fil[(x-1) *3+1]]; - fil3[(x)*3+2] = vb_filter_v1_rb [fil[x*3+2]] [fil[(x-1) *3+2]]; - } - for (x=1; xoverlay_latch.cur_xsize;x++) - { - fil[(x)*3] = vb_filter_v1_rb [fil[x*3]] [fil3[(x-1) *3]]; - fil[(x)*3+1] = vb_filter_v1_g [fil[x*3+1]][fil3[(x-1) *3+1]]; - fil[(x)*3+2] = vb_filter_v1_rb [fil[x*3+2]] [fil3[(x-1) *3+2]]; - } - for (x=1; xoverlay_latch.cur_xsize;x++) - { - fil3[(x)*3] = vb_filter_v1_rb [fil[x*3]] [fil[(x-1) *3]]; - fil3[(x)*3+1] = vb_filter_v1_g [fil[x*3+1]][fil[(x-1) *3+1]]; - fil3[(x)*3+2] = vb_filter_v1_rb [fil[x*3+2]] [fil[(x-1) *3+2]]; - } - for (x=0; xoverlay_latch.cur_xsize;x++) - { - fil[(x)*3] = vb_filter_v1_rb [fil[x*3]] [fil3[(x+1) *3]]; - fil[(x)*3+1] = vb_filter_v1_g [fil[x*3+1]][fil3[(x+1) *3+1]]; - fil[(x)*3+2] = vb_filter_v1_rb [fil[x*3+2]] [fil3[(x+1) *3+2]]; - p[x] = (fil[x*3+2] << 16) | (fil[x*3+1] << 8) | fil[x*3]; - } - - free(fil); - free(fil3); - } - else /* filter disabled by emulator option */ - { - if (banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE) - { - for (x = 0; x < svga->overlay_latch.cur_xsize; x++) - { - p[x] = banshee->overlay_buffer[0][src_x >> 20]; - src_x += voodoo->overlay.vidOverlayDudx; - } - } - else - { - for (x = 0; x < svga->overlay_latch.cur_xsize; x++) - p[x] = banshee->overlay_buffer[0][x]; - } - } - break; - - case VIDPROCCFG_FILTER_MODE_DITHER_2X2: - if (banshee->voodoo->scrfilter && banshee->voodoo->scrfilterEnabled) - { - uint8_t *fil = malloc((svga->overlay_latch.cur_xsize) * 3); - uint8_t *soak = malloc((svga->overlay_latch.cur_xsize) * 3); - uint8_t *soak2 = malloc((svga->overlay_latch.cur_xsize) * 3); - - uint8_t *samp1 = malloc((svga->overlay_latch.cur_xsize) * 3); - uint8_t *samp2 = malloc((svga->overlay_latch.cur_xsize) * 3); - uint8_t *samp3 = malloc((svga->overlay_latch.cur_xsize) * 3); - uint8_t *samp4 = malloc((svga->overlay_latch.cur_xsize) * 3); - - src = &svga->vram[src_addr2 & svga->vram_mask]; - OVERLAY_SAMPLE(banshee->overlay_buffer[1]); - for (x=0; xoverlay_latch.cur_xsize;x++) - { - samp1[x*3] = ((banshee->overlay_buffer[0][x])); - samp1[x*3+1] = ((banshee->overlay_buffer[0][x] >> 8)); - samp1[x*3+2] = ((banshee->overlay_buffer[0][x] >> 16)); - - samp2[x*3+0] = ((banshee->overlay_buffer[0][x+1])); - samp2[x*3+1] = ((banshee->overlay_buffer[0][x+1] >> 8)); - samp2[x*3+2] = ((banshee->overlay_buffer[0][x+1] >> 16)); - - samp3[x*3+0] = ((banshee->overlay_buffer[1][x])); - samp3[x*3+1] = ((banshee->overlay_buffer[1][x] >> 8)); - samp3[x*3+2] = ((banshee->overlay_buffer[1][x] >> 16)); - - samp4[x*3+0] = ((banshee->overlay_buffer[1][x+1])); - samp4[x*3+1] = ((banshee->overlay_buffer[1][x+1] >> 8)); - samp4[x*3+2] = ((banshee->overlay_buffer[1][x+1] >> 16)); - - /* sample two lines */ - - soak[x*3+0] = vb_filter_bx_rb [samp1[x*3+0]] [samp2[x*3+0]]; - soak[x*3+1] = vb_filter_bx_g [samp1[x*3+1]] [samp2[x*3+1]]; - soak[x*3+2] = vb_filter_bx_rb [samp1[x*3+2]] [samp2[x*3+2]]; - - soak2[x*3+0] = vb_filter_bx_rb[samp3[x*3+0]] [samp4[x*3+0]]; - soak2[x*3+1] = vb_filter_bx_g [samp3[x*3+1]] [samp4[x*3+1]]; - soak2[x*3+2] = vb_filter_bx_rb[samp3[x*3+2]] [samp4[x*3+2]]; - - /* then pour it on the rest */ - - fil[x*3+0] = vb_filter_v1_rb[soak[x*3+0]] [soak2[x*3+0]]; - fil[x*3+1] = vb_filter_v1_g [soak[x*3+1]] [soak2[x*3+1]]; - fil[x*3+2] = vb_filter_v1_rb[soak[x*3+2]] [soak2[x*3+2]]; - } - - if (banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE) /* 2x2 on a scaled low res */ - { - for (x=0; xoverlay_latch.cur_xsize;x++) - { - p[x] = (fil[(src_x >> 20)*3+2] << 16) | (fil[(src_x >> 20)*3+1] << 8) | fil[(src_x >> 20)*3]; - src_x += voodoo->overlay.vidOverlayDudx; - } - } - else - { - for (x=0; xoverlay_latch.cur_xsize;x++) - { - p[x] = (fil[x*3+2] << 16) | (fil[x*3+1] << 8) | fil[x*3]; - } - } - - free(fil); - free(soak); - free(soak2); - free(samp1); - free(samp2); - free(samp3); - free(samp4); - } - else /* filter disabled by emulator option */ - { - if (banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE) - { - for (x = 0; x < svga->overlay_latch.cur_xsize; x++) - { - p[x] = banshee->overlay_buffer[0][src_x >> 20]; - - src_x += voodoo->overlay.vidOverlayDudx; - } - } - else - { - for (x = 0; x < svga->overlay_latch.cur_xsize; x++) - p[x] = banshee->overlay_buffer[0][x]; - } - } - break; - - case VIDPROCCFG_FILTER_MODE_POINT: - default: - if (banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE) - { - for (x = 0; x < svga->overlay_latch.cur_xsize; x++) - { - p[x] = banshee->overlay_buffer[0][src_x >> 20]; - - src_x += voodoo->overlay.vidOverlayDudx; - } - } - else - { - for (x = 0; x < svga->overlay_latch.cur_xsize; x++) - p[x] = banshee->overlay_buffer[0][x]; - } - break; + src_x += voodoo->overlay.vidOverlayDudx; + } + } else { + for (x = 0; x < svga->overlay_latch.cur_xsize; x++) { + uint32_t samp0 = banshee->overlay_buffer[0][src_x >> 20]; + uint32_t samp1 = banshee->overlay_buffer[1][src_x >> 20]; + int r = (((samp0 >> 16) & 0xff) * (0x10000 - y_coeff) + ((samp1 >> 16) & 0xff) * y_coeff) >> 16; + int g = (((samp0 >> 8) & 0xff) * (0x10000 - y_coeff) + ((samp1 >> 8) & 0xff) * y_coeff) >> 16; + int b = ((samp0 & 0xff) * (0x10000 - y_coeff) + (samp1 & 0xff) * y_coeff) >> 16; + p[x] = (r << 16) | (g << 8) | b; + } } - } + break; - if (banshee->vidProcCfg & VIDPROCCFG_V_SCALE_ENABLE) - voodoo->overlay.src_y += voodoo->overlay.vidOverlayDvdy; - else - voodoo->overlay.src_y += (1 << 20); + case VIDPROCCFG_FILTER_MODE_DITHER_4X4: + if (banshee->voodoo->scrfilter && banshee->voodoo->scrfilterEnabled) { + uint8_t *fil = malloc((svga->overlay_latch.cur_xsize) * 3); + uint8_t *fil3 = malloc((svga->overlay_latch.cur_xsize) * 3); + + if (banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE) /* leilei HACK - don't know of real 4x1 hscaled behavior yet, double for now */ + { + for (x = 0; x < svga->overlay_latch.cur_xsize; x++) { + fil[x * 3] = ((banshee->overlay_buffer[0][src_x >> 20])); + fil[x * 3 + 1] = ((banshee->overlay_buffer[0][src_x >> 20] >> 8)); + fil[x * 3 + 2] = ((banshee->overlay_buffer[0][src_x >> 20] >> 16)); + fil3[x * 3 + 0] = fil[x * 3 + 0]; + fil3[x * 3 + 1] = fil[x * 3 + 1]; + fil3[x * 3 + 2] = fil[x * 3 + 2]; + src_x += voodoo->overlay.vidOverlayDudx; + } + } else { + for (x = 0; x < svga->overlay_latch.cur_xsize; x++) { + fil[x * 3] = ((banshee->overlay_buffer[0][x])); + fil[x * 3 + 1] = ((banshee->overlay_buffer[0][x] >> 8)); + fil[x * 3 + 2] = ((banshee->overlay_buffer[0][x] >> 16)); + fil3[x * 3 + 0] = fil[x * 3 + 0]; + fil3[x * 3 + 1] = fil[x * 3 + 1]; + fil3[x * 3 + 2] = fil[x * 3 + 2]; + } + } + if (y % 2 == 0) { + for (x = 0; x < svga->overlay_latch.cur_xsize; x++) { + fil[x * 3] = banshee->voodoo->purpleline[fil[x * 3 + 0]][0]; + fil[x * 3 + 1] = banshee->voodoo->purpleline[fil[x * 3 + 1]][1]; + fil[x * 3 + 2] = banshee->voodoo->purpleline[fil[x * 3 + 2]][2]; + } + } + + for (x = 1; x < svga->overlay_latch.cur_xsize; x++) { + fil3[(x) *3] = vb_filter_v1_rb[fil[x * 3]][fil[(x - 1) * 3]]; + fil3[(x) *3 + 1] = vb_filter_v1_g[fil[x * 3 + 1]][fil[(x - 1) * 3 + 1]]; + fil3[(x) *3 + 2] = vb_filter_v1_rb[fil[x * 3 + 2]][fil[(x - 1) * 3 + 2]]; + } + for (x = 1; x < svga->overlay_latch.cur_xsize; x++) { + fil[(x) *3] = vb_filter_v1_rb[fil[x * 3]][fil3[(x - 1) * 3]]; + fil[(x) *3 + 1] = vb_filter_v1_g[fil[x * 3 + 1]][fil3[(x - 1) * 3 + 1]]; + fil[(x) *3 + 2] = vb_filter_v1_rb[fil[x * 3 + 2]][fil3[(x - 1) * 3 + 2]]; + } + for (x = 1; x < svga->overlay_latch.cur_xsize; x++) { + fil3[(x) *3] = vb_filter_v1_rb[fil[x * 3]][fil[(x - 1) * 3]]; + fil3[(x) *3 + 1] = vb_filter_v1_g[fil[x * 3 + 1]][fil[(x - 1) * 3 + 1]]; + fil3[(x) *3 + 2] = vb_filter_v1_rb[fil[x * 3 + 2]][fil[(x - 1) * 3 + 2]]; + } + for (x = 0; x < svga->overlay_latch.cur_xsize; x++) { + fil[(x) *3] = vb_filter_v1_rb[fil[x * 3]][fil3[(x + 1) * 3]]; + fil[(x) *3 + 1] = vb_filter_v1_g[fil[x * 3 + 1]][fil3[(x + 1) * 3 + 1]]; + fil[(x) *3 + 2] = vb_filter_v1_rb[fil[x * 3 + 2]][fil3[(x + 1) * 3 + 2]]; + p[x] = (fil[x * 3 + 2] << 16) | (fil[x * 3 + 1] << 8) | fil[x * 3]; + } + + free(fil); + free(fil3); + } else /* filter disabled by emulator option */ + { + if (banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE) { + for (x = 0; x < svga->overlay_latch.cur_xsize; x++) { + p[x] = banshee->overlay_buffer[0][src_x >> 20]; + src_x += voodoo->overlay.vidOverlayDudx; + } + } else { + for (x = 0; x < svga->overlay_latch.cur_xsize; x++) + p[x] = banshee->overlay_buffer[0][x]; + } + } + break; + + case VIDPROCCFG_FILTER_MODE_DITHER_2X2: + if (banshee->voodoo->scrfilter && banshee->voodoo->scrfilterEnabled) { + uint8_t *fil = malloc((svga->overlay_latch.cur_xsize) * 3); + uint8_t *soak = malloc((svga->overlay_latch.cur_xsize) * 3); + uint8_t *soak2 = malloc((svga->overlay_latch.cur_xsize) * 3); + + uint8_t *samp1 = malloc((svga->overlay_latch.cur_xsize) * 3); + uint8_t *samp2 = malloc((svga->overlay_latch.cur_xsize) * 3); + uint8_t *samp3 = malloc((svga->overlay_latch.cur_xsize) * 3); + uint8_t *samp4 = malloc((svga->overlay_latch.cur_xsize) * 3); + + src = &svga->vram[src_addr2 & svga->vram_mask]; + OVERLAY_SAMPLE(banshee->overlay_buffer[1]); + for (x = 0; x < svga->overlay_latch.cur_xsize; x++) { + samp1[x * 3] = ((banshee->overlay_buffer[0][x])); + samp1[x * 3 + 1] = ((banshee->overlay_buffer[0][x] >> 8)); + samp1[x * 3 + 2] = ((banshee->overlay_buffer[0][x] >> 16)); + + samp2[x * 3 + 0] = ((banshee->overlay_buffer[0][x + 1])); + samp2[x * 3 + 1] = ((banshee->overlay_buffer[0][x + 1] >> 8)); + samp2[x * 3 + 2] = ((banshee->overlay_buffer[0][x + 1] >> 16)); + + samp3[x * 3 + 0] = ((banshee->overlay_buffer[1][x])); + samp3[x * 3 + 1] = ((banshee->overlay_buffer[1][x] >> 8)); + samp3[x * 3 + 2] = ((banshee->overlay_buffer[1][x] >> 16)); + + samp4[x * 3 + 0] = ((banshee->overlay_buffer[1][x + 1])); + samp4[x * 3 + 1] = ((banshee->overlay_buffer[1][x + 1] >> 8)); + samp4[x * 3 + 2] = ((banshee->overlay_buffer[1][x + 1] >> 16)); + + /* sample two lines */ + + soak[x * 3 + 0] = vb_filter_bx_rb[samp1[x * 3 + 0]][samp2[x * 3 + 0]]; + soak[x * 3 + 1] = vb_filter_bx_g[samp1[x * 3 + 1]][samp2[x * 3 + 1]]; + soak[x * 3 + 2] = vb_filter_bx_rb[samp1[x * 3 + 2]][samp2[x * 3 + 2]]; + + soak2[x * 3 + 0] = vb_filter_bx_rb[samp3[x * 3 + 0]][samp4[x * 3 + 0]]; + soak2[x * 3 + 1] = vb_filter_bx_g[samp3[x * 3 + 1]][samp4[x * 3 + 1]]; + soak2[x * 3 + 2] = vb_filter_bx_rb[samp3[x * 3 + 2]][samp4[x * 3 + 2]]; + + /* then pour it on the rest */ + + fil[x * 3 + 0] = vb_filter_v1_rb[soak[x * 3 + 0]][soak2[x * 3 + 0]]; + fil[x * 3 + 1] = vb_filter_v1_g[soak[x * 3 + 1]][soak2[x * 3 + 1]]; + fil[x * 3 + 2] = vb_filter_v1_rb[soak[x * 3 + 2]][soak2[x * 3 + 2]]; + } + + if (banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE) /* 2x2 on a scaled low res */ + { + for (x = 0; x < svga->overlay_latch.cur_xsize; x++) { + p[x] = (fil[(src_x >> 20) * 3 + 2] << 16) | (fil[(src_x >> 20) * 3 + 1] << 8) | fil[(src_x >> 20) * 3]; + src_x += voodoo->overlay.vidOverlayDudx; + } + } else { + for (x = 0; x < svga->overlay_latch.cur_xsize; x++) { + p[x] = (fil[x * 3 + 2] << 16) | (fil[x * 3 + 1] << 8) | fil[x * 3]; + } + } + + free(fil); + free(soak); + free(soak2); + free(samp1); + free(samp2); + free(samp3); + free(samp4); + } else /* filter disabled by emulator option */ + { + if (banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE) { + for (x = 0; x < svga->overlay_latch.cur_xsize; x++) { + p[x] = banshee->overlay_buffer[0][src_x >> 20]; + + src_x += voodoo->overlay.vidOverlayDudx; + } + } else { + for (x = 0; x < svga->overlay_latch.cur_xsize; x++) + p[x] = banshee->overlay_buffer[0][x]; + } + } + break; + + case VIDPROCCFG_FILTER_MODE_POINT: + default: + if (banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE) { + for (x = 0; x < svga->overlay_latch.cur_xsize; x++) { + p[x] = banshee->overlay_buffer[0][src_x >> 20]; + + src_x += voodoo->overlay.vidOverlayDudx; + } + } else { + for (x = 0; x < svga->overlay_latch.cur_xsize; x++) + p[x] = banshee->overlay_buffer[0][x]; + } + break; + } + } + + if (banshee->vidProcCfg & VIDPROCCFG_V_SCALE_ENABLE) + voodoo->overlay.src_y += voodoo->overlay.vidOverlayDvdy; + else + voodoo->overlay.src_y += (1 << 20); } -void banshee_set_overlay_addr(void *p, uint32_t addr) +void +banshee_set_overlay_addr(void *p, uint32_t addr) { - banshee_t *banshee = (banshee_t *)p; - voodoo_t *voodoo = banshee->voodoo; + banshee_t *banshee = (banshee_t *) p; + voodoo_t *voodoo = banshee->voodoo; + + banshee->svga.overlay.addr = banshee->voodoo->leftOverlayBuf & 0xfffffff; + banshee->svga.overlay_latch.addr = banshee->voodoo->leftOverlayBuf & 0xfffffff; + memset(voodoo->dirty_line, 1, sizeof(voodoo->dirty_line)); +} + +static void +banshee_vsync_callback(svga_t *svga) +{ + banshee_t *banshee = (banshee_t *) svga->p; + voodoo_t *voodoo = banshee->voodoo; + + voodoo->retrace_count++; + thread_wait_mutex(voodoo->swap_mutex); + if (voodoo->swap_pending && (voodoo->retrace_count > voodoo->swap_interval)) { + if (voodoo->swap_count > 0) + voodoo->swap_count--; + voodoo->swap_pending = 0; + thread_release_mutex(voodoo->swap_mutex); - banshee->svga.overlay.addr = banshee->voodoo->leftOverlayBuf & 0xfffffff; - banshee->svga.overlay_latch.addr = banshee->voodoo->leftOverlayBuf & 0xfffffff; memset(voodoo->dirty_line, 1, sizeof(voodoo->dirty_line)); + voodoo->retrace_count = 0; + banshee_set_overlay_addr(banshee, voodoo->swap_offset); + thread_set_event(voodoo->wake_fifo_thread); + voodoo->frame_count++; + } else + thread_release_mutex(voodoo->swap_mutex); + + voodoo->overlay.src_y = 0; + banshee->desktop_addr = banshee->vidDesktopStartAddr; + banshee->desktop_y = 0; } -static void banshee_vsync_callback(svga_t *svga) +static uint8_t +banshee_pci_read(int func, int addr, void *p) { - banshee_t *banshee = (banshee_t *)svga->p; - voodoo_t *voodoo = banshee->voodoo; + banshee_t *banshee = (banshee_t *) p; + // svga_t *svga = &banshee->svga; + uint8_t ret = 0; - voodoo->retrace_count++; - thread_wait_mutex(voodoo->swap_mutex); - if (voodoo->swap_pending && (voodoo->retrace_count > voodoo->swap_interval)) - { - if (voodoo->swap_count > 0) - voodoo->swap_count--; - voodoo->swap_pending = 0; - thread_release_mutex(voodoo->swap_mutex); + if (func) + return 0xff; + // banshee_log("Banshee PCI read %08X ", addr); + switch (addr) { + case 0x00: + ret = 0x1a; + break; /*3DFX*/ + case 0x01: + ret = 0x12; + break; - memset(voodoo->dirty_line, 1, sizeof(voodoo->dirty_line)); - voodoo->retrace_count = 0; - banshee_set_overlay_addr(banshee, voodoo->swap_offset); - thread_set_event(voodoo->wake_fifo_thread); - voodoo->frame_count++; - } - else - thread_release_mutex(voodoo->swap_mutex); + case 0x02: + ret = (banshee->type == TYPE_BANSHEE) ? 0x03 : 0x05; + break; + case 0x03: + ret = 0x00; + break; - voodoo->overlay.src_y = 0; - banshee->desktop_addr = banshee->vidDesktopStartAddr; - banshee->desktop_y = 0; + case 0x04: + ret = banshee->pci_regs[0x04] & 0x27; + break; + + case 0x07: + ret = banshee->pci_regs[0x07] & 0x36; + break; + + case 0x08: + ret = (banshee->type == TYPE_BANSHEE) ? 3 : 1; + break; /*Revision ID*/ + case 0x09: + ret = 0; + break; /*Programming interface*/ + + case 0x0a: + ret = 0x00; + break; /*Supports VGA interface*/ + case 0x0b: + ret = 0x03; + break; + + case 0x0d: + ret = banshee->pci_regs[0x0d] & 0xf8; + break; + + case 0x10: + ret = 0x00; + break; /*memBaseAddr0*/ + case 0x11: + ret = 0x00; + break; + case 0x12: + ret = 0x00; + break; + case 0x13: + ret = banshee->memBaseAddr0 >> 24; + break; + + case 0x14: + ret = 0x00; + break; /*memBaseAddr1*/ + case 0x15: + ret = 0x00; + break; + case 0x16: + ret = 0x00; + break; + case 0x17: + ret = banshee->memBaseAddr1 >> 24; + break; + + case 0x18: + ret = 0x01; + break; /*ioBaseAddr*/ + case 0x19: + ret = banshee->ioBaseAddr >> 8; + break; + case 0x1a: + ret = banshee->ioBaseAddr >> 16; + break; + case 0x1b: + ret = banshee->ioBaseAddr >> 24; + break; + + /*Subsystem vendor ID*/ + case 0x2c: + ret = banshee->pci_regs[0x2c]; + break; + case 0x2d: + ret = banshee->pci_regs[0x2d]; + break; + case 0x2e: + ret = banshee->pci_regs[0x2e]; + break; + case 0x2f: + ret = banshee->pci_regs[0x2f]; + break; + + case 0x30: + ret = banshee->pci_regs[0x30] & 0x01; + break; /*BIOS ROM address*/ + case 0x31: + ret = 0x00; + break; + case 0x32: + ret = banshee->pci_regs[0x32]; + break; + case 0x33: + ret = banshee->pci_regs[0x33]; + break; + + case 0x34: + ret = banshee->agp ? 0x54 : 0x60; + break; + + case 0x3c: + ret = banshee->pci_regs[0x3c]; + break; + + case 0x3d: + ret = 0x01; + break; /*INTA*/ + + case 0x3e: + ret = 0x04; + break; + case 0x3f: + ret = 0xff; + break; + + case 0x40: + ret = 0x01; + break; + + case 0x50: + ret = banshee->pci_regs[0x50]; + break; + + case 0x54: + ret = 0x02; + break; + case 0x55: + ret = 0x60; + break; + case 0x56: + ret = 0x10; + break; /* assumed AGP 1.0 */ + + case 0x58: + ret = (banshee->type == TYPE_BANSHEE) ? 0x21 : 0x23; + break; + case 0x59: + ret = 0x02; + break; + case 0x5b: + ret = 0x07; + break; + + case 0x5c: + ret = banshee->pci_regs[0x5c]; + break; + case 0x5d: + ret = banshee->pci_regs[0x5d]; + break; + case 0x5e: + ret = banshee->pci_regs[0x5e]; + break; + case 0x5f: + ret = banshee->pci_regs[0x5f]; + break; + + case 0x60: + ret = 0x01; + break; + case 0x62: + ret = 0x21; + break; + + case 0x64: + ret = banshee->pci_regs[0x64]; + break; + case 0x65: + ret = banshee->pci_regs[0x65]; + break; + case 0x66: + ret = banshee->pci_regs[0x66]; + break; + case 0x67: + ret = banshee->pci_regs[0x67]; + break; + } + // banshee_log("%02X\n", ret); + return ret; } -static uint8_t banshee_pci_read(int func, int addr, void *p) +static void +banshee_pci_write(int func, int addr, uint8_t val, void *p) { - banshee_t *banshee = (banshee_t *)p; -// svga_t *svga = &banshee->svga; - uint8_t ret = 0; + banshee_t *banshee = (banshee_t *) p; + // svga_t *svga = &banshee->svga; - if (func) - return 0xff; -// banshee_log("Banshee PCI read %08X ", addr); - switch (addr) - { - case 0x00: ret = 0x1a; break; /*3DFX*/ - case 0x01: ret = 0x12; break; + if (func) + return; + // banshee_log("Banshee write %08X %02X %04X:%08X\n", addr, val, CS, cpu_state.pc); + switch (addr) { + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + case 0x3d: + case 0x3e: + case 0x3f: + return; - case 0x02: ret = (banshee->type == TYPE_BANSHEE) ? 0x03 : 0x05; break; - case 0x03: ret = 0x00; break; + case PCI_REG_COMMAND: + if (val & PCI_COMMAND_IO) { + io_removehandler(0x03c0, 0x0020, banshee_in, NULL, NULL, banshee_out, NULL, NULL, banshee); + if (banshee->ioBaseAddr) + io_removehandler(banshee->ioBaseAddr, 0x0100, banshee_ext_in, NULL, banshee_ext_inl, banshee_ext_out, NULL, banshee_ext_outl, banshee); - case 0x04: ret = banshee->pci_regs[0x04] & 0x27; break; + io_sethandler(0x03c0, 0x0020, banshee_in, NULL, NULL, banshee_out, NULL, NULL, banshee); + if (banshee->ioBaseAddr) + io_sethandler(banshee->ioBaseAddr, 0x0100, banshee_ext_in, NULL, banshee_ext_inl, banshee_ext_out, NULL, banshee_ext_outl, banshee); + } else { + io_removehandler(0x03c0, 0x0020, banshee_in, NULL, NULL, banshee_out, NULL, NULL, banshee); + io_removehandler(banshee->ioBaseAddr, 0x0100, banshee_ext_in, NULL, banshee_ext_inl, banshee_ext_out, NULL, banshee_ext_outl, banshee); + } + banshee->pci_regs[PCI_REG_COMMAND] = val & 0x27; + banshee_updatemapping(banshee); + return; + case 0x07: + banshee->pci_regs[0x07] = val & 0x3e; + return; + case 0x0d: + banshee->pci_regs[0x0d] = val & 0xf8; + return; - case 0x07: ret = banshee->pci_regs[0x07] & 0x36; break; + case 0x13: + banshee->memBaseAddr0 = (val & 0xfe) << 24; + banshee_updatemapping(banshee); + return; - case 0x08: ret = (banshee->type == TYPE_BANSHEE) ? 3 : 1; break; /*Revision ID*/ - case 0x09: ret = 0; break; /*Programming interface*/ + case 0x17: + banshee->memBaseAddr1 = (val & 0xfe) << 24; + banshee_updatemapping(banshee); + return; - case 0x0a: ret = 0x00; break; /*Supports VGA interface*/ - case 0x0b: ret = 0x03; break; + case 0x19: + if (banshee->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) + io_removehandler(banshee->ioBaseAddr, 0x0100, banshee_ext_in, NULL, banshee_ext_inl, banshee_ext_out, NULL, banshee_ext_outl, banshee); + banshee->ioBaseAddr &= 0xffff00ff; + banshee->ioBaseAddr |= val << 8; + if ((banshee->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) && banshee->ioBaseAddr) + io_sethandler(banshee->ioBaseAddr, 0x0100, banshee_ext_in, NULL, banshee_ext_inl, banshee_ext_out, NULL, banshee_ext_outl, banshee); + banshee_log("Banshee ioBaseAddr=%08x\n", banshee->ioBaseAddr); + return; - case 0x0d: ret = banshee->pci_regs[0x0d] & 0xf8; break; + case 0x1a: + banshee->ioBaseAddr &= 0xff00ffff; + banshee->ioBaseAddr |= val << 16; + break; - case 0x10: ret = 0x00; break; /*memBaseAddr0*/ - case 0x11: ret = 0x00; break; - case 0x12: ret = 0x00; break; - case 0x13: ret = banshee->memBaseAddr0 >> 24; break; + case 0x1b: + banshee->ioBaseAddr &= 0x00ffffff; + banshee->ioBaseAddr |= val << 24; + break; - case 0x14: ret = 0x00; break; /*memBaseAddr1*/ - case 0x15: ret = 0x00; break; - case 0x16: ret = 0x00; break; - case 0x17: ret = banshee->memBaseAddr1 >> 24; break; - - case 0x18: ret = 0x01; break; /*ioBaseAddr*/ - case 0x19: ret = banshee->ioBaseAddr >> 8; break; - case 0x1a: ret = banshee->ioBaseAddr >> 16; break; - case 0x1b: ret = banshee->ioBaseAddr >> 24; break; - - /*Subsystem vendor ID*/ - case 0x2c: ret = banshee->pci_regs[0x2c]; break; - case 0x2d: ret = banshee->pci_regs[0x2d]; break; - case 0x2e: ret = banshee->pci_regs[0x2e]; break; - case 0x2f: ret = banshee->pci_regs[0x2f]; break; - - case 0x30: ret = banshee->pci_regs[0x30] & 0x01; break; /*BIOS ROM address*/ - case 0x31: ret = 0x00; break; - case 0x32: ret = banshee->pci_regs[0x32]; break; - case 0x33: ret = banshee->pci_regs[0x33]; break; - - case 0x34: ret = banshee->agp ? 0x54 : 0x60; break; - - case 0x3c: ret = banshee->pci_regs[0x3c]; break; - - case 0x3d: ret = 0x01; break; /*INTA*/ - - case 0x3e: ret = 0x04; break; - case 0x3f: ret = 0xff; break; - - case 0x40: ret = 0x01; break; - - case 0x50: ret = banshee->pci_regs[0x50]; break; - - case 0x54: ret = 0x02; break; - case 0x55: ret = 0x60; break; - case 0x56: ret = 0x10; break; /* assumed AGP 1.0 */ - - case 0x58: ret = (banshee->type == TYPE_BANSHEE) ? 0x21 : 0x23; break; - case 0x59: ret = 0x02; break; - case 0x5b: ret = 0x07; break; - - case 0x5c: ret = banshee->pci_regs[0x5c]; break; - case 0x5d: ret = banshee->pci_regs[0x5d]; break; - case 0x5e: ret = banshee->pci_regs[0x5e]; break; - case 0x5f: ret = banshee->pci_regs[0x5f]; break; - - case 0x60: ret = 0x01; break; - case 0x62: ret = 0x21; break; - - case 0x64: ret = banshee->pci_regs[0x64]; break; - case 0x65: ret = banshee->pci_regs[0x65]; break; - case 0x66: ret = banshee->pci_regs[0x66]; break; - case 0x67: ret = banshee->pci_regs[0x67]; break; - } -// banshee_log("%02X\n", ret); - return ret; -} - -static void banshee_pci_write(int func, int addr, uint8_t val, void *p) -{ - banshee_t *banshee = (banshee_t *)p; -// svga_t *svga = &banshee->svga; - - if (func) - return; -// banshee_log("Banshee write %08X %02X %04X:%08X\n", addr, val, CS, cpu_state.pc); - switch (addr) - { - case 0x00: case 0x01: case 0x02: case 0x03: - case 0x08: case 0x09: case 0x0a: case 0x0b: - case 0x3d: case 0x3e: case 0x3f: + case 0x30: + case 0x32: + case 0x33: + if (!banshee->has_bios) return; + banshee->pci_regs[addr] = val; + if (banshee->pci_regs[0x30] & 0x01) { + uint32_t biosaddr = (banshee->pci_regs[0x32] << 16) | (banshee->pci_regs[0x33] << 24); + banshee_log("Banshee bios_rom enabled at %08x\n", biosaddr); + mem_mapping_set_addr(&banshee->bios_rom.mapping, biosaddr, 0x10000); + mem_mapping_enable(&banshee->bios_rom.mapping); + } else { + banshee_log("Banshee bios_rom disabled\n"); + mem_mapping_disable(&banshee->bios_rom.mapping); + } + return; + case 0x3c: + case 0x50: + case 0x65: + case 0x67: + banshee->pci_regs[addr] = val; + return; - case PCI_REG_COMMAND: - if (val & PCI_COMMAND_IO) - { - io_removehandler(0x03c0, 0x0020, banshee_in, NULL, NULL, banshee_out, NULL, NULL, banshee); - if (banshee->ioBaseAddr) - io_removehandler(banshee->ioBaseAddr, 0x0100, banshee_ext_in, NULL, banshee_ext_inl, banshee_ext_out, NULL, banshee_ext_outl, banshee); + case 0x5c: + banshee->pci_regs[0x5c] = val & 0x27; + return; - io_sethandler(0x03c0, 0x0020, banshee_in, NULL, NULL, banshee_out, NULL, NULL, banshee); - if (banshee->ioBaseAddr) - io_sethandler(banshee->ioBaseAddr, 0x0100, banshee_ext_in, NULL, banshee_ext_inl, banshee_ext_out, NULL, banshee_ext_outl, banshee); - } - else - { - io_removehandler(0x03c0, 0x0020, banshee_in, NULL, NULL, banshee_out, NULL, NULL, banshee); - io_removehandler(banshee->ioBaseAddr, 0x0100, banshee_ext_in, NULL, banshee_ext_inl, banshee_ext_out, NULL, banshee_ext_outl, banshee); - } - banshee->pci_regs[PCI_REG_COMMAND] = val & 0x27; - banshee_updatemapping(banshee); - return; - case 0x07: - banshee->pci_regs[0x07] = val & 0x3e; - return; - case 0x0d: - banshee->pci_regs[0x0d] = val & 0xf8; - return; + case 0x5d: + banshee->pci_regs[0x5d] = val & 0x03; + return; - case 0x13: - banshee->memBaseAddr0 = (val & 0xfe) << 24; - banshee_updatemapping(banshee); - return; + case 0x5f: + banshee->pci_regs[0x5e] = val; + return; - case 0x17: - banshee->memBaseAddr1 = (val & 0xfe) << 24; - banshee_updatemapping(banshee); - return; + case 0x64: + banshee->pci_regs[0x64] = val & 0x03; + return; - case 0x19: - if (banshee->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) - io_removehandler(banshee->ioBaseAddr, 0x0100, banshee_ext_in, NULL, banshee_ext_inl, banshee_ext_out, NULL, banshee_ext_outl, banshee); - banshee->ioBaseAddr &= 0xffff00ff; - banshee->ioBaseAddr |= val << 8; - if ((banshee->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) && banshee->ioBaseAddr) - io_sethandler(banshee->ioBaseAddr, 0x0100, banshee_ext_in, NULL, banshee_ext_inl, banshee_ext_out, NULL, banshee_ext_outl, banshee); - banshee_log("Banshee ioBaseAddr=%08x\n", banshee->ioBaseAddr); - return; - - case 0x1a: - banshee->ioBaseAddr &= 0xff00ffff; - banshee->ioBaseAddr |= val << 16; - break; - - case 0x1b: - banshee->ioBaseAddr &= 0x00ffffff; - banshee->ioBaseAddr |= val << 24; - break; - - case 0x30: case 0x32: case 0x33: - if (!banshee->has_bios) - return; - banshee->pci_regs[addr] = val; - if (banshee->pci_regs[0x30] & 0x01) - { - uint32_t biosaddr = (banshee->pci_regs[0x32] << 16) | (banshee->pci_regs[0x33] << 24); - banshee_log("Banshee bios_rom enabled at %08x\n", biosaddr); - mem_mapping_set_addr(&banshee->bios_rom.mapping, biosaddr, 0x10000); - mem_mapping_enable(&banshee->bios_rom.mapping); - } - else - { - banshee_log("Banshee bios_rom disabled\n"); - mem_mapping_disable(&banshee->bios_rom.mapping); - } - return; - case 0x3c: case 0x50: case 0x65: case 0x67: - banshee->pci_regs[addr] = val; - return; - - case 0x5c: - banshee->pci_regs[0x5c] = val & 0x27; - return; - - case 0x5d: - banshee->pci_regs[0x5d] = val & 0x03; - return; - - case 0x5f: - banshee->pci_regs[0x5e] = val; - return; - - case 0x64: - banshee->pci_regs[0x64] = val & 0x03; - return; - - case 0x66: - banshee->pci_regs[0x66] = val & 0xc0; - return; - } + case 0x66: + banshee->pci_regs[0x66] = val & 0xc0; + return; + } } // clang-format off @@ -2732,335 +2838,351 @@ static const device_config_t banshee_sdram_config[] = { }; // clang-format on -static void *banshee_init_common(const device_t *info, char *fn, int has_sgram, int type, int voodoo_type, int agp) +static void * +banshee_init_common(const device_t *info, char *fn, int has_sgram, int type, int voodoo_type, int agp) { - int mem_size; - banshee_t *banshee = malloc(sizeof(banshee_t)); - memset(banshee, 0, sizeof(banshee_t)); + int mem_size; + banshee_t *banshee = malloc(sizeof(banshee_t)); + memset(banshee, 0, sizeof(banshee_t)); - banshee->type = type; - banshee->agp = agp; - banshee->has_bios = !!fn; + banshee->type = type; + banshee->agp = agp; + banshee->has_bios = !!fn; - if (banshee->has_bios) { - rom_init(&banshee->bios_rom, fn, 0xc0000, 0x10000, 0xffff, 0, MEM_MAPPING_EXTERNAL); - mem_mapping_disable(&banshee->bios_rom.mapping); - } + if (banshee->has_bios) { + rom_init(&banshee->bios_rom, fn, 0xc0000, 0x10000, 0xffff, 0, MEM_MAPPING_EXTERNAL); + mem_mapping_disable(&banshee->bios_rom.mapping); + } - if (!banshee->has_bios) - mem_size = info->local; /* fixed size for on-board chips */ - else if (has_sgram) { - if (banshee->type == TYPE_VELOCITY100) - mem_size = 8; /* Velocity 100 only supports 8 MB */ - else - mem_size = device_get_config_int("memory"); - } else - mem_size = 16; /* SDRAM Banshee only supports 16 MB */ + if (!banshee->has_bios) + mem_size = info->local; /* fixed size for on-board chips */ + else if (has_sgram) { + if (banshee->type == TYPE_VELOCITY100) + mem_size = 8; /* Velocity 100 only supports 8 MB */ + else + mem_size = device_get_config_int("memory"); + } else + mem_size = 16; /* SDRAM Banshee only supports 16 MB */ - svga_init(info, &banshee->svga, banshee, mem_size << 20, - banshee_recalctimings, - banshee_in, banshee_out, - banshee_hwcursor_draw, - banshee_overlay_draw); - banshee->svga.vsync_callback = banshee_vsync_callback; + svga_init(info, &banshee->svga, banshee, mem_size << 20, + banshee_recalctimings, + banshee_in, banshee_out, + banshee_hwcursor_draw, + banshee_overlay_draw); + banshee->svga.vsync_callback = banshee_vsync_callback; - mem_mapping_add(&banshee->linear_mapping, 0, 0, banshee_read_linear, - banshee_read_linear_w, - banshee_read_linear_l, - banshee_write_linear, - banshee_write_linear_w, - banshee_write_linear_l, - NULL, - MEM_MAPPING_EXTERNAL, - &banshee->svga); - mem_mapping_add(&banshee->reg_mapping_low, 0, 0,banshee_reg_read, - banshee_reg_readw, - banshee_reg_readl, - banshee_reg_write, - banshee_reg_writew, - banshee_reg_writel, - NULL, - MEM_MAPPING_EXTERNAL, - banshee); - mem_mapping_add(&banshee->reg_mapping_high, 0,0,banshee_reg_read, - banshee_reg_readw, - banshee_reg_readl, - banshee_reg_write, - banshee_reg_writew, - banshee_reg_writel, - NULL, - MEM_MAPPING_EXTERNAL, - banshee); + mem_mapping_add(&banshee->linear_mapping, 0, 0, banshee_read_linear, + banshee_read_linear_w, + banshee_read_linear_l, + banshee_write_linear, + banshee_write_linear_w, + banshee_write_linear_l, + NULL, + MEM_MAPPING_EXTERNAL, + &banshee->svga); + mem_mapping_add(&banshee->reg_mapping_low, 0, 0, banshee_reg_read, + banshee_reg_readw, + banshee_reg_readl, + banshee_reg_write, + banshee_reg_writew, + banshee_reg_writel, + NULL, + MEM_MAPPING_EXTERNAL, + banshee); + mem_mapping_add(&banshee->reg_mapping_high, 0, 0, banshee_reg_read, + banshee_reg_readw, + banshee_reg_readl, + banshee_reg_write, + banshee_reg_writew, + banshee_reg_writel, + NULL, + MEM_MAPPING_EXTERNAL, + banshee); - banshee->svga.vblank_start = banshee_vblank_start; + banshee->svga.vblank_start = banshee_vblank_start; -// io_sethandler(0x03c0, 0x0020, banshee_in, NULL, NULL, banshee_out, NULL, NULL, banshee); + // io_sethandler(0x03c0, 0x0020, banshee_in, NULL, NULL, banshee_out, NULL, NULL, banshee); - banshee->svga.bpp = 8; - banshee->svga.miscout = 1; + banshee->svga.bpp = 8; + banshee->svga.miscout = 1; - banshee->dramInit0 = 1 << 27; - if (has_sgram && mem_size == 16) - banshee->dramInit0 |= (1 << 26); /*2xSGRAM = 16 MB*/ - if (!has_sgram) - banshee->dramInit1 = 1 << 30; /*SDRAM*/ - banshee->svga.decode_mask = 0x1ffffff; + banshee->dramInit0 = 1 << 27; + if (has_sgram && mem_size == 16) + banshee->dramInit0 |= (1 << 26); /*2xSGRAM = 16 MB*/ + if (!has_sgram) + banshee->dramInit1 = 1 << 30; /*SDRAM*/ + banshee->svga.decode_mask = 0x1ffffff; - banshee->card = pci_add_card(banshee->agp ? PCI_ADD_AGP : PCI_ADD_VIDEO, banshee_pci_read, banshee_pci_write, banshee); + banshee->card = pci_add_card(banshee->agp ? PCI_ADD_AGP : PCI_ADD_VIDEO, banshee_pci_read, banshee_pci_write, banshee); - banshee->voodoo = voodoo_2d3d_card_init(voodoo_type); - banshee->voodoo->p = banshee; - banshee->voodoo->vram = banshee->svga.vram; - banshee->voodoo->changedvram = banshee->svga.changedvram; - banshee->voodoo->fb_mem = banshee->svga.vram; - banshee->voodoo->fb_mask = banshee->svga.vram_mask; - banshee->voodoo->tex_mem[0] = banshee->svga.vram; - banshee->voodoo->tex_mem_w[0] = (uint16_t *)banshee->svga.vram; - banshee->voodoo->tex_mem[1] = banshee->svga.vram; - banshee->voodoo->tex_mem_w[1] = (uint16_t *)banshee->svga.vram; - banshee->voodoo->texture_mask = banshee->svga.vram_mask; - voodoo_generate_filter_v1(banshee->voodoo); + banshee->voodoo = voodoo_2d3d_card_init(voodoo_type); + banshee->voodoo->p = banshee; + banshee->voodoo->vram = banshee->svga.vram; + banshee->voodoo->changedvram = banshee->svga.changedvram; + banshee->voodoo->fb_mem = banshee->svga.vram; + banshee->voodoo->fb_mask = banshee->svga.vram_mask; + banshee->voodoo->tex_mem[0] = banshee->svga.vram; + banshee->voodoo->tex_mem_w[0] = (uint16_t *) banshee->svga.vram; + banshee->voodoo->tex_mem[1] = banshee->svga.vram; + banshee->voodoo->tex_mem_w[1] = (uint16_t *) banshee->svga.vram; + banshee->voodoo->texture_mask = banshee->svga.vram_mask; + voodoo_generate_filter_v1(banshee->voodoo); - banshee->vidSerialParallelPort = VIDSERIAL_DDC_DCK_W | VIDSERIAL_DDC_DDA_W; + banshee->vidSerialParallelPort = VIDSERIAL_DDC_DCK_W | VIDSERIAL_DDC_DDA_W; - banshee->i2c = i2c_gpio_init("i2c_voodoo_banshee"); - banshee->i2c_ddc = i2c_gpio_init("ddc_voodoo_banshee"); - banshee->ddc = ddc_init(i2c_gpio_get_bus(banshee->i2c_ddc)); + banshee->i2c = i2c_gpio_init("i2c_voodoo_banshee"); + banshee->i2c_ddc = i2c_gpio_init("ddc_voodoo_banshee"); + banshee->ddc = ddc_init(i2c_gpio_get_bus(banshee->i2c_ddc)); - switch (type) - { - case TYPE_BANSHEE: - if (has_sgram) { - banshee->pci_regs[0x2c] = 0x1a; - banshee->pci_regs[0x2d] = 0x12; - banshee->pci_regs[0x2e] = 0x04; - banshee->pci_regs[0x2f] = 0x00; - } else { - banshee->pci_regs[0x2c] = 0x02; - banshee->pci_regs[0x2d] = 0x11; - banshee->pci_regs[0x2e] = 0x17; - banshee->pci_regs[0x2f] = 0x10; - } - break; + switch (type) { + case TYPE_BANSHEE: + if (has_sgram) { + banshee->pci_regs[0x2c] = 0x1a; + banshee->pci_regs[0x2d] = 0x12; + banshee->pci_regs[0x2e] = 0x04; + banshee->pci_regs[0x2f] = 0x00; + } else { + banshee->pci_regs[0x2c] = 0x02; + banshee->pci_regs[0x2d] = 0x11; + banshee->pci_regs[0x2e] = 0x17; + banshee->pci_regs[0x2f] = 0x10; + } + break; - case TYPE_V3_2000: - banshee->pci_regs[0x2c] = 0x1a; - banshee->pci_regs[0x2d] = 0x12; - banshee->pci_regs[0x2e] = 0x30; - banshee->pci_regs[0x2f] = 0x00; - break; + case TYPE_V3_2000: + banshee->pci_regs[0x2c] = 0x1a; + banshee->pci_regs[0x2d] = 0x12; + banshee->pci_regs[0x2e] = 0x30; + banshee->pci_regs[0x2f] = 0x00; + break; - case TYPE_V3_3000: - banshee->pci_regs[0x2c] = 0x1a; - banshee->pci_regs[0x2d] = 0x12; - banshee->pci_regs[0x2e] = 0x3a; - banshee->pci_regs[0x2f] = 0x00; - break; + case TYPE_V3_3000: + banshee->pci_regs[0x2c] = 0x1a; + banshee->pci_regs[0x2d] = 0x12; + banshee->pci_regs[0x2e] = 0x3a; + banshee->pci_regs[0x2f] = 0x00; + break; - case TYPE_VELOCITY100: - banshee->pci_regs[0x2c] = 0x1a; - banshee->pci_regs[0x2d] = 0x12; - banshee->pci_regs[0x2e] = 0x4b; - banshee->pci_regs[0x2f] = 0x00; - break; - } + case TYPE_VELOCITY100: + banshee->pci_regs[0x2c] = 0x1a; + banshee->pci_regs[0x2d] = 0x12; + banshee->pci_regs[0x2e] = 0x4b; + banshee->pci_regs[0x2f] = 0x00; + break; + } - video_inform(VIDEO_FLAG_TYPE_SPECIAL, banshee->agp ? &timing_banshee_agp : &timing_banshee); + video_inform(VIDEO_FLAG_TYPE_SPECIAL, banshee->agp ? &timing_banshee_agp : &timing_banshee); - return banshee; + return banshee; } -static void *banshee_init(const device_t *info) +static void * +banshee_init(const device_t *info) { - return banshee_init_common(info, "roms/video/voodoo/Pci_sg.rom", 1, TYPE_BANSHEE, VOODOO_BANSHEE, 0); + return banshee_init_common(info, "roms/video/voodoo/Pci_sg.rom", 1, TYPE_BANSHEE, VOODOO_BANSHEE, 0); } -static void *creative_banshee_init(const device_t *info) +static void * +creative_banshee_init(const device_t *info) { - return banshee_init_common(info, "roms/video/voodoo/BlasterPCI.rom", 0, TYPE_BANSHEE, VOODOO_BANSHEE, 0); + return banshee_init_common(info, "roms/video/voodoo/BlasterPCI.rom", 0, TYPE_BANSHEE, VOODOO_BANSHEE, 0); } -static void *v3_2000_init(const device_t *info) +static void * +v3_2000_init(const device_t *info) { - return banshee_init_common(info, "roms/video/voodoo/2k11sd.rom", 0, TYPE_V3_2000, VOODOO_3, 0); + return banshee_init_common(info, "roms/video/voodoo/2k11sd.rom", 0, TYPE_V3_2000, VOODOO_3, 0); } -static void *v3_2000_agp_init(const device_t *info) +static void * +v3_2000_agp_init(const device_t *info) { - return banshee_init_common(info, "roms/video/voodoo/2k11sd.rom", 0, TYPE_V3_2000, VOODOO_3, 1); + return banshee_init_common(info, "roms/video/voodoo/2k11sd.rom", 0, TYPE_V3_2000, VOODOO_3, 1); } -static void *v3_2000_agp_onboard_init(const device_t *info) +static void * +v3_2000_agp_onboard_init(const device_t *info) { - return banshee_init_common(info, NULL, 0, TYPE_V3_2000, VOODOO_3, 1); + return banshee_init_common(info, NULL, 0, TYPE_V3_2000, VOODOO_3, 1); } -static void *v3_3000_init(const device_t *info) +static void * +v3_3000_init(const device_t *info) { - return banshee_init_common(info, "roms/video/voodoo/3k12sd.rom", 0, TYPE_V3_3000, VOODOO_3, 0); + return banshee_init_common(info, "roms/video/voodoo/3k12sd.rom", 0, TYPE_V3_3000, VOODOO_3, 0); } -static void *v3_3000_agp_init(const device_t *info) +static void * +v3_3000_agp_init(const device_t *info) { - return banshee_init_common(info, "roms/video/voodoo/3k12sd.rom", 0, TYPE_V3_3000, VOODOO_3, 1); + return banshee_init_common(info, "roms/video/voodoo/3k12sd.rom", 0, TYPE_V3_3000, VOODOO_3, 1); } -static void *velocity_100_agp_init(const device_t *info) +static void * +velocity_100_agp_init(const device_t *info) { - return banshee_init_common(info, "roms/video/voodoo/Velocity100.VBI", 1, TYPE_VELOCITY100, VOODOO_3, 1); + return banshee_init_common(info, "roms/video/voodoo/Velocity100.VBI", 1, TYPE_VELOCITY100, VOODOO_3, 1); } -static int banshee_available(void) +static int +banshee_available(void) { - return rom_present("roms/video/voodoo/Pci_sg.rom"); + return rom_present("roms/video/voodoo/Pci_sg.rom"); } -static int creative_banshee_available(void) +static int +creative_banshee_available(void) { - return rom_present("roms/video/voodoo/BlasterPCI.rom"); + return rom_present("roms/video/voodoo/BlasterPCI.rom"); } -static int v3_2000_available(void) +static int +v3_2000_available(void) { - return rom_present("roms/video/voodoo/2k11sd.rom"); + return rom_present("roms/video/voodoo/2k11sd.rom"); } #define v3_2000_agp_available v3_2000_available -static int v3_3000_available(void) +static int +v3_3000_available(void) { - return rom_present("roms/video/voodoo/3k12sd.rom"); + return rom_present("roms/video/voodoo/3k12sd.rom"); } #define v3_3000_agp_available v3_3000_available -static int velocity_100_available(void) +static int +velocity_100_available(void) { - return rom_present("roms/video/voodoo/Velocity100.VBI"); + return rom_present("roms/video/voodoo/Velocity100.VBI"); } -static void banshee_close(void *p) +static void +banshee_close(void *p) { - banshee_t *banshee = (banshee_t *)p; + banshee_t *banshee = (banshee_t *) p; - voodoo_card_close(banshee->voodoo); - svga_close(&banshee->svga); - ddc_close(banshee->ddc); - i2c_gpio_close(banshee->i2c_ddc); - i2c_gpio_close(banshee->i2c); + voodoo_card_close(banshee->voodoo); + svga_close(&banshee->svga); + ddc_close(banshee->ddc); + i2c_gpio_close(banshee->i2c_ddc); + i2c_gpio_close(banshee->i2c); - free(banshee); + free(banshee); } -static void banshee_speed_changed(void *p) +static void +banshee_speed_changed(void *p) { - banshee_t *banshee = (banshee_t *)p; + banshee_t *banshee = (banshee_t *) p; - svga_recalctimings(&banshee->svga); + svga_recalctimings(&banshee->svga); } -static void banshee_force_redraw(void *p) +static void +banshee_force_redraw(void *p) { - banshee_t *banshee = (banshee_t *)p; + banshee_t *banshee = (banshee_t *) p; - banshee->svga.fullchange = changeframecount; + banshee->svga.fullchange = changeframecount; } const device_t voodoo_banshee_device = { - .name = "3dfx Voodoo Banshee", + .name = "3dfx Voodoo Banshee", .internal_name = "voodoo_banshee_pci", - .flags = DEVICE_PCI, - .local = 0, - .init = banshee_init, - .close = banshee_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = 0, + .init = banshee_init, + .close = banshee_close, + .reset = NULL, { .available = banshee_available }, .speed_changed = banshee_speed_changed, - .force_redraw = banshee_force_redraw, + .force_redraw = banshee_force_redraw, banshee_sgram_config }; const device_t creative_voodoo_banshee_device = { - .name = "Creative 3D Blaster Banshee", + .name = "Creative 3D Blaster Banshee", .internal_name = "ctl3d_banshee_pci", - .flags = DEVICE_PCI, - .local = 0, - .init = creative_banshee_init, - .close = banshee_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = 0, + .init = creative_banshee_init, + .close = banshee_close, + .reset = NULL, { .available = creative_banshee_available }, .speed_changed = banshee_speed_changed, - .force_redraw = banshee_force_redraw, + .force_redraw = banshee_force_redraw, banshee_sdram_config }; const device_t voodoo_3_2000_device = { - .name = "3dfx Voodoo3 2000", + .name = "3dfx Voodoo3 2000", .internal_name = "voodoo3_2k_pci", - .flags = DEVICE_PCI, - .local = 0, - .init = v3_2000_init, - .close = banshee_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = 0, + .init = v3_2000_init, + .close = banshee_close, + .reset = NULL, { .available = v3_2000_available }, .speed_changed = banshee_speed_changed, - .force_redraw = banshee_force_redraw, + .force_redraw = banshee_force_redraw, banshee_sdram_config }; const device_t voodoo_3_2000_agp_device = { - .name = "3dfx Voodoo3 2000", + .name = "3dfx Voodoo3 2000", .internal_name = "voodoo3_2k_agp", - .flags = DEVICE_AGP, - .local = 0, - .init = v3_2000_agp_init, - .close = banshee_close, - .reset = NULL, + .flags = DEVICE_AGP, + .local = 0, + .init = v3_2000_agp_init, + .close = banshee_close, + .reset = NULL, { .available = v3_2000_agp_available }, .speed_changed = banshee_speed_changed, - .force_redraw = banshee_force_redraw, + .force_redraw = banshee_force_redraw, banshee_sdram_config }; const device_t voodoo_3_2000_agp_onboard_8m_device = { - .name = "3dfx Voodoo3 2000 (On-Board 8MB SGRAM)", + .name = "3dfx Voodoo3 2000 (On-Board 8MB SGRAM)", .internal_name = "voodoo3_2k_agp_onboard_8m", - .flags = DEVICE_AGP, - .local = 8, - .init = v3_2000_agp_onboard_init, - .close = banshee_close, - .reset = NULL, + .flags = DEVICE_AGP, + .local = 8, + .init = v3_2000_agp_onboard_init, + .close = banshee_close, + .reset = NULL, { .available = NULL }, .speed_changed = banshee_speed_changed, - .force_redraw = banshee_force_redraw, + .force_redraw = banshee_force_redraw, banshee_sdram_config }; const device_t voodoo_3_3000_device = { - .name = "3dfx Voodoo3 3000", + .name = "3dfx Voodoo3 3000", .internal_name = "voodoo3_3k_pci", - .flags = DEVICE_PCI, - .local = 0, - .init = v3_3000_init, - .close = banshee_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = 0, + .init = v3_3000_init, + .close = banshee_close, + .reset = NULL, { .available = v3_3000_available }, .speed_changed = banshee_speed_changed, - .force_redraw = banshee_force_redraw, + .force_redraw = banshee_force_redraw, banshee_sdram_config }; const device_t voodoo_3_3000_agp_device = { - .name = "3dfx Voodoo3 3000", + .name = "3dfx Voodoo3 3000", .internal_name = "voodoo3_3k_agp", - .flags = DEVICE_AGP, - .local = 0, - .init = v3_3000_agp_init, - .close = banshee_close, - .reset = NULL, + .flags = DEVICE_AGP, + .local = 0, + .init = v3_3000_agp_init, + .close = banshee_close, + .reset = NULL, { .available = v3_3000_agp_available }, .speed_changed = banshee_speed_changed, - .force_redraw = banshee_force_redraw, + .force_redraw = banshee_force_redraw, banshee_sdram_config }; const device_t velocity_100_agp_device = { - .name = "3dfx Velocity 100", + .name = "3dfx Velocity 100", .internal_name = "velocity100_agp", - .flags = DEVICE_AGP, - .local = 0, - .init = velocity_100_agp_init, - .close = banshee_close, - .reset = NULL, + .flags = DEVICE_AGP, + .local = 0, + .init = velocity_100_agp_init, + .close = banshee_close, + .reset = NULL, { .available = velocity_100_available }, .speed_changed = banshee_speed_changed, - .force_redraw = banshee_force_redraw, + .force_redraw = banshee_force_redraw, banshee_sdram_config }; diff --git a/src/video/vid_voodoo_banshee_blitter.c b/src/video/vid_voodoo_banshee_blitter.c index 4062acb3a..548ec0f6e 100644 --- a/src/video/vid_voodoo_banshee_blitter.c +++ b/src/video/vid_voodoo_banshee_blitter.c @@ -41,56 +41,55 @@ #define COMMAND_CMD_LINE (6 << 0) #define COMMAND_CMD_POLYLINE (7 << 0) #define COMMAND_CMD_POLYFILL (8 << 0) -#define COMMAND_INITIATE (1 << 8) -#define COMMAND_INC_X_START (1 << 10) -#define COMMAND_INC_Y_START (1 << 11) -#define COMMAND_STIPPLE_LINE (1 << 12) -#define COMMAND_PATTERN_MONO (1 << 13) -#define COMMAND_DX (1 << 14) -#define COMMAND_DY (1 << 15) -#define COMMAND_TRANS_MONO (1 << 16) -#define COMMAND_PATOFF_X_MASK (7 << 17) -#define COMMAND_PATOFF_X_SHIFT (17) -#define COMMAND_PATOFF_Y_MASK (7 << 20) -#define COMMAND_PATOFF_Y_SHIFT (20) -#define COMMAND_CLIP_SEL (1 << 23) +#define COMMAND_INITIATE (1 << 8) +#define COMMAND_INC_X_START (1 << 10) +#define COMMAND_INC_Y_START (1 << 11) +#define COMMAND_STIPPLE_LINE (1 << 12) +#define COMMAND_PATTERN_MONO (1 << 13) +#define COMMAND_DX (1 << 14) +#define COMMAND_DY (1 << 15) +#define COMMAND_TRANS_MONO (1 << 16) +#define COMMAND_PATOFF_X_MASK (7 << 17) +#define COMMAND_PATOFF_X_SHIFT (17) +#define COMMAND_PATOFF_Y_MASK (7 << 20) +#define COMMAND_PATOFF_Y_SHIFT (20) +#define COMMAND_CLIP_SEL (1 << 23) -#define CMDEXTRA_SRC_COLORKEY (1 << 0) -#define CMDEXTRA_DST_COLORKEY (1 << 1) -#define CMDEXTRA_FORCE_PAT_ROW0 (1 << 3) +#define CMDEXTRA_SRC_COLORKEY (1 << 0) +#define CMDEXTRA_DST_COLORKEY (1 << 1) +#define CMDEXTRA_FORCE_PAT_ROW0 (1 << 3) -#define SRC_FORMAT_STRIDE_MASK (0x1fff) -#define SRC_FORMAT_COL_MASK (0xf << 16) -#define SRC_FORMAT_COL_1_BPP (0 << 16) -#define SRC_FORMAT_COL_8_BPP (1 << 16) -#define SRC_FORMAT_COL_16_BPP (3 << 16) -#define SRC_FORMAT_COL_24_BPP (4 << 16) -#define SRC_FORMAT_COL_32_BPP (5 << 16) -#define SRC_FORMAT_COL_YUYV (8 << 16) -#define SRC_FORMAT_COL_UYVY (9 << 16) -#define SRC_FORMAT_BYTE_SWIZZLE (1 << 20) -#define SRC_FORMAT_WORD_SWIZZLE (1 << 21) -#define SRC_FORMAT_PACKING_MASK (3 << 22) -#define SRC_FORMAT_PACKING_STRIDE (0 << 22) -#define SRC_FORMAT_PACKING_BYTE (1 << 22) -#define SRC_FORMAT_PACKING_WORD (2 << 22) -#define SRC_FORMAT_PACKING_DWORD (3 << 22) +#define SRC_FORMAT_STRIDE_MASK (0x1fff) +#define SRC_FORMAT_COL_MASK (0xf << 16) +#define SRC_FORMAT_COL_1_BPP (0 << 16) +#define SRC_FORMAT_COL_8_BPP (1 << 16) +#define SRC_FORMAT_COL_16_BPP (3 << 16) +#define SRC_FORMAT_COL_24_BPP (4 << 16) +#define SRC_FORMAT_COL_32_BPP (5 << 16) +#define SRC_FORMAT_COL_YUYV (8 << 16) +#define SRC_FORMAT_COL_UYVY (9 << 16) +#define SRC_FORMAT_BYTE_SWIZZLE (1 << 20) +#define SRC_FORMAT_WORD_SWIZZLE (1 << 21) +#define SRC_FORMAT_PACKING_MASK (3 << 22) +#define SRC_FORMAT_PACKING_STRIDE (0 << 22) +#define SRC_FORMAT_PACKING_BYTE (1 << 22) +#define SRC_FORMAT_PACKING_WORD (2 << 22) +#define SRC_FORMAT_PACKING_DWORD (3 << 22) -#define DST_FORMAT_STRIDE_MASK (0x1fff) -#define DST_FORMAT_COL_MASK (0xf << 16) -#define DST_FORMAT_COL_8_BPP (1 << 16) -#define DST_FORMAT_COL_16_BPP (3 << 16) -#define DST_FORMAT_COL_24_BPP (4 << 16) -#define DST_FORMAT_COL_32_BPP (5 << 16) +#define DST_FORMAT_STRIDE_MASK (0x1fff) +#define DST_FORMAT_COL_MASK (0xf << 16) +#define DST_FORMAT_COL_8_BPP (1 << 16) +#define DST_FORMAT_COL_16_BPP (3 << 16) +#define DST_FORMAT_COL_24_BPP (4 << 16) +#define DST_FORMAT_COL_32_BPP (5 << 16) -#define BRES_ERROR_MASK (0xffff) -#define BRES_ERROR_USE (1 << 31) +#define BRES_ERROR_MASK (0xffff) +#define BRES_ERROR_USE (1 << 31) -enum -{ - COLORKEY_8, - COLORKEY_16, - COLORKEY_32 +enum { + COLORKEY_8, + COLORKEY_16, + COLORKEY_32 }; #ifdef ENABLE_BANSHEEBLT_LOG @@ -102,1371 +101,1345 @@ bansheeblt_log(const char *fmt, ...) va_list ap; if (bansheeblt_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define banshee_log(fmt, ...) +# define banshee_log(fmt, ...) #endif -static int colorkey(voodoo_t *voodoo, uint32_t src, int src_notdst, int color_format) +static int +colorkey(voodoo_t *voodoo, uint32_t src, int src_notdst, int color_format) { - uint32_t min = src_notdst ? voodoo->banshee_blt.srcColorkeyMin : voodoo->banshee_blt.dstColorkeyMin; - uint32_t max = src_notdst ? voodoo->banshee_blt.srcColorkeyMax : voodoo->banshee_blt.dstColorkeyMax; + uint32_t min = src_notdst ? voodoo->banshee_blt.srcColorkeyMin : voodoo->banshee_blt.dstColorkeyMin; + uint32_t max = src_notdst ? voodoo->banshee_blt.srcColorkeyMax : voodoo->banshee_blt.dstColorkeyMax; - if (!(voodoo->banshee_blt.commandExtra & (src_notdst ? CMDEXTRA_SRC_COLORKEY : CMDEXTRA_DST_COLORKEY))) - return 0; + if (!(voodoo->banshee_blt.commandExtra & (src_notdst ? CMDEXTRA_SRC_COLORKEY : CMDEXTRA_DST_COLORKEY))) + return 0; - switch (color_format) - { - case COLORKEY_8: - return ((src & 0xff) >= (min & 0xff)) && ((src & 0xff) <= (max & 0xff)); + switch (color_format) { + case COLORKEY_8: + return ((src & 0xff) >= (min & 0xff)) && ((src & 0xff) <= (max & 0xff)); - case COLORKEY_16: - { - int r = (src >> 11) & 0x1f, r_min = (min >> 11) & 0x1f, r_max = (max >> 11) & 0x1f; - int g = (src >> 5) & 0x3f, g_min = (min >> 5) & 0x3f, g_max = (max >> 5) & 0x3f; - int b = src & 0x1f, b_min = min & 0x1f, b_max = max & 0x1f; + case COLORKEY_16: + { + int r = (src >> 11) & 0x1f, r_min = (min >> 11) & 0x1f, r_max = (max >> 11) & 0x1f; + int g = (src >> 5) & 0x3f, g_min = (min >> 5) & 0x3f, g_max = (max >> 5) & 0x3f; + int b = src & 0x1f, b_min = min & 0x1f, b_max = max & 0x1f; - return (r >= r_min) && (r <= r_max) && (g >= g_min) && (g <= g_max) && - (b >= b_min) && (b <= b_max); - } + return (r >= r_min) && (r <= r_max) && (g >= g_min) && (g <= g_max) && (b >= b_min) && (b <= b_max); + } - case COLORKEY_32: - { - int r = (src >> 16) & 0xff, r_min = (min >> 16) & 0xff, r_max = (max >> 16) & 0xff; - int g = (src >> 8) & 0xff, g_min = (min >> 8) & 0xff, g_max = (max >> 8) & 0xff; - int b = src & 0xff, b_min = min & 0xff, b_max = max & 0xff; + case COLORKEY_32: + { + int r = (src >> 16) & 0xff, r_min = (min >> 16) & 0xff, r_max = (max >> 16) & 0xff; + int g = (src >> 8) & 0xff, g_min = (min >> 8) & 0xff, g_max = (max >> 8) & 0xff; + int b = src & 0xff, b_min = min & 0xff, b_max = max & 0xff; - return (r >= r_min) && (r <= r_max) && (g >= g_min) && (g <= g_max) && - (b >= b_min) && (b <= b_max); - } + return (r >= r_min) && (r <= r_max) && (g >= g_min) && (g <= g_max) && (b >= b_min) && (b <= b_max); + } - default: - return 0; - } + default: + return 0; + } } -static uint32_t MIX(voodoo_t *voodoo, uint32_t dest, uint32_t src, uint32_t pattern, int colour_format_src, int colour_format_dest) +static uint32_t +MIX(voodoo_t *voodoo, uint32_t dest, uint32_t src, uint32_t pattern, int colour_format_src, int colour_format_dest) { - int rop_nr = 0; - uint32_t result = 0; - uint32_t rop; + int rop_nr = 0; + uint32_t result = 0; + uint32_t rop; - if (colorkey(voodoo, src, 1, colour_format_src)) - rop_nr |= 2; - if (colorkey(voodoo, dest, 0, colour_format_dest)) - rop_nr |= 1; + if (colorkey(voodoo, src, 1, colour_format_src)) + rop_nr |= 2; + if (colorkey(voodoo, dest, 0, colour_format_dest)) + rop_nr |= 1; - rop = voodoo->banshee_blt.rops[rop_nr]; + rop = voodoo->banshee_blt.rops[rop_nr]; - if (rop & 0x01) - result |= (~pattern & ~src & ~dest); - if (rop & 0x02) - result |= (~pattern & ~src & dest); - if (rop & 0x04) - result |= (~pattern & src & ~dest); - if (rop & 0x08) - result |= (~pattern & src & dest); - if (rop & 0x10) - result |= ( pattern & ~src & ~dest); - if (rop & 0x20) - result |= ( pattern & ~src & dest); - if (rop & 0x40) - result |= ( pattern & src & ~dest); - if (rop & 0x80) - result |= ( pattern & src & dest); + if (rop & 0x01) + result |= (~pattern & ~src & ~dest); + if (rop & 0x02) + result |= (~pattern & ~src & dest); + if (rop & 0x04) + result |= (~pattern & src & ~dest); + if (rop & 0x08) + result |= (~pattern & src & dest); + if (rop & 0x10) + result |= (pattern & ~src & ~dest); + if (rop & 0x20) + result |= (pattern & ~src & dest); + if (rop & 0x40) + result |= (pattern & src & ~dest); + if (rop & 0x80) + result |= (pattern & src & dest); - return result; + return result; } -static uint32_t get_addr(voodoo_t *voodoo, int x, int y, int src_notdst, uint32_t src_stride) +static uint32_t +get_addr(voodoo_t *voodoo, int x, int y, int src_notdst, uint32_t src_stride) { - uint32_t stride = src_notdst ? src_stride : voodoo->banshee_blt.dst_stride; - uint32_t base_addr = src_notdst ? voodoo->banshee_blt.srcBaseAddr : voodoo->banshee_blt.dstBaseAddr; + uint32_t stride = src_notdst ? src_stride : voodoo->banshee_blt.dst_stride; + uint32_t base_addr = src_notdst ? voodoo->banshee_blt.srcBaseAddr : voodoo->banshee_blt.dstBaseAddr; - if (src_notdst ? voodoo->banshee_blt.srcBaseAddr_tiled : voodoo->banshee_blt.dstBaseAddr_tiled) - return (base_addr + (x & 127) + ((x >> 7) * 128*32) + ((y & 31) * 128) + (y >> 5)*stride) & voodoo->fb_mask; - else - return (base_addr + x + y*stride) & voodoo->fb_mask; + if (src_notdst ? voodoo->banshee_blt.srcBaseAddr_tiled : voodoo->banshee_blt.dstBaseAddr_tiled) + return (base_addr + (x & 127) + ((x >> 7) * 128 * 32) + ((y & 31) * 128) + (y >> 5) * stride) & voodoo->fb_mask; + else + return (base_addr + x + y * stride) & voodoo->fb_mask; } -static void PLOT(voodoo_t *voodoo, int x, int y, int pat_x, int pat_y, uint8_t pattern_mask, uint8_t rop, uint32_t src, int src_colorkey) +static void +PLOT(voodoo_t *voodoo, int x, int y, int pat_x, int pat_y, uint8_t pattern_mask, uint8_t rop, uint32_t src, int src_colorkey) { - switch (voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK) - { - case DST_FORMAT_COL_8_BPP: - { - uint32_t addr = get_addr(voodoo, x, y, 0, 0);//(voodoo->banshee_blt.dstBaseAddr + x + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t dest = voodoo->vram[addr]; - uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? - ((pattern_mask & (1 << (7-(pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : - voodoo->banshee_blt.colorPattern8[(pat_x & 7) + (pat_y & 7)*8]; + switch (voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK) { + case DST_FORMAT_COL_8_BPP: + { + uint32_t addr = get_addr(voodoo, x, y, 0, 0); //(voodoo->banshee_blt.dstBaseAddr + x + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t dest = voodoo->vram[addr]; + uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? ((pattern_mask & (1 << (7 - (pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : voodoo->banshee_blt.colorPattern8[(pat_x & 7) + (pat_y & 7) * 8]; - voodoo->vram[addr] = MIX(voodoo, dest, src, pattern, src_colorkey, COLORKEY_8); - voodoo->changedvram[addr >> 12] = changeframecount; - break; - } - case DST_FORMAT_COL_16_BPP: - { - uint32_t addr = get_addr(voodoo, x*2, y, 0, 0);//(voodoo->banshee_blt.dstBaseAddr + x*2 + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t dest = *(uint16_t *)&voodoo->vram[addr]; - uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? - ((pattern_mask & (1 << (7-(pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : - voodoo->banshee_blt.colorPattern16[(pat_x & 7) + (pat_y & 7)*8]; + voodoo->vram[addr] = MIX(voodoo, dest, src, pattern, src_colorkey, COLORKEY_8); + voodoo->changedvram[addr >> 12] = changeframecount; + break; + } + case DST_FORMAT_COL_16_BPP: + { + uint32_t addr = get_addr(voodoo, x * 2, y, 0, 0); //(voodoo->banshee_blt.dstBaseAddr + x*2 + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t dest = *(uint16_t *) &voodoo->vram[addr]; + uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? ((pattern_mask & (1 << (7 - (pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : voodoo->banshee_blt.colorPattern16[(pat_x & 7) + (pat_y & 7) * 8]; - *(uint16_t *)&voodoo->vram[addr] = MIX(voodoo, dest, src, pattern, src_colorkey, COLORKEY_16); - voodoo->changedvram[addr >> 12] = changeframecount; - break; - } - case DST_FORMAT_COL_24_BPP: - { - uint32_t addr = get_addr(voodoo, x*3, y, 0, 0);//(voodoo->banshee_blt.dstBaseAddr + x*3 + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t dest = *(uint32_t *)&voodoo->vram[addr]; - uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? - ((pattern_mask & (1 << (7-(pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : - voodoo->banshee_blt.colorPattern24[(pat_x & 7) + (pat_y & 7)*8]; + *(uint16_t *) &voodoo->vram[addr] = MIX(voodoo, dest, src, pattern, src_colorkey, COLORKEY_16); + voodoo->changedvram[addr >> 12] = changeframecount; + break; + } + case DST_FORMAT_COL_24_BPP: + { + uint32_t addr = get_addr(voodoo, x * 3, y, 0, 0); //(voodoo->banshee_blt.dstBaseAddr + x*3 + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t dest = *(uint32_t *) &voodoo->vram[addr]; + uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? ((pattern_mask & (1 << (7 - (pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : voodoo->banshee_blt.colorPattern24[(pat_x & 7) + (pat_y & 7) * 8]; - *(uint32_t *)&voodoo->vram[addr] = (MIX(voodoo, dest, src, pattern, src_colorkey, COLORKEY_32) & 0xffffff) | (dest & 0xff000000); - voodoo->changedvram[addr >> 12] = changeframecount; - break; - } - case DST_FORMAT_COL_32_BPP: - { - uint32_t addr = get_addr(voodoo, x*4, y, 0, 0);//(voodoo->banshee_blt.dstBaseAddr + x*4 + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t dest = *(uint32_t *)&voodoo->vram[addr]; - uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? - ((pattern_mask & (1 << (7-(pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : - voodoo->banshee_blt.colorPattern[(pat_x & 7) + (pat_y & 7)*8]; + *(uint32_t *) &voodoo->vram[addr] = (MIX(voodoo, dest, src, pattern, src_colorkey, COLORKEY_32) & 0xffffff) | (dest & 0xff000000); + voodoo->changedvram[addr >> 12] = changeframecount; + break; + } + case DST_FORMAT_COL_32_BPP: + { + uint32_t addr = get_addr(voodoo, x * 4, y, 0, 0); //(voodoo->banshee_blt.dstBaseAddr + x*4 + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t dest = *(uint32_t *) &voodoo->vram[addr]; + uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? ((pattern_mask & (1 << (7 - (pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : voodoo->banshee_blt.colorPattern[(pat_x & 7) + (pat_y & 7) * 8]; - *(uint32_t *)&voodoo->vram[addr] = MIX(voodoo, dest, src, pattern, src_colorkey, COLORKEY_32); - voodoo->changedvram[addr >> 12] = changeframecount; - break; - } - } + *(uint32_t *) &voodoo->vram[addr] = MIX(voodoo, dest, src, pattern, src_colorkey, COLORKEY_32); + voodoo->changedvram[addr >> 12] = changeframecount; + break; + } + } } -static void PLOT_LINE(voodoo_t *voodoo, int x, int y, uint8_t rop, uint32_t pattern, int src_colorkey) +static void +PLOT_LINE(voodoo_t *voodoo, int x, int y, uint8_t rop, uint32_t pattern, int src_colorkey) { - switch (voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK) - { - case DST_FORMAT_COL_8_BPP: - { - uint32_t addr = get_addr(voodoo, x, y, 0, 0);//(voodoo->banshee_blt.dstBaseAddr + x + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t dest = voodoo->vram[addr]; + switch (voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK) { + case DST_FORMAT_COL_8_BPP: + { + uint32_t addr = get_addr(voodoo, x, y, 0, 0); //(voodoo->banshee_blt.dstBaseAddr + x + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t dest = voodoo->vram[addr]; - voodoo->vram[addr] = MIX(voodoo, dest, voodoo->banshee_blt.colorFore, pattern, src_colorkey, COLORKEY_8); - voodoo->changedvram[addr >> 12] = changeframecount; - break; - } - case DST_FORMAT_COL_16_BPP: - { - uint32_t addr = get_addr(voodoo, x*2, y, 0, 0);//(voodoo->banshee_blt.dstBaseAddr + x*2 + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t dest = *(uint16_t *)&voodoo->vram[addr]; + voodoo->vram[addr] = MIX(voodoo, dest, voodoo->banshee_blt.colorFore, pattern, src_colorkey, COLORKEY_8); + voodoo->changedvram[addr >> 12] = changeframecount; + break; + } + case DST_FORMAT_COL_16_BPP: + { + uint32_t addr = get_addr(voodoo, x * 2, y, 0, 0); //(voodoo->banshee_blt.dstBaseAddr + x*2 + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t dest = *(uint16_t *) &voodoo->vram[addr]; - *(uint16_t *)&voodoo->vram[addr] = MIX(voodoo, dest, voodoo->banshee_blt.colorFore, pattern, src_colorkey, COLORKEY_16); - voodoo->changedvram[addr >> 12] = changeframecount; - break; - } - case DST_FORMAT_COL_24_BPP: - { - uint32_t addr = get_addr(voodoo, x*3, y, 0, 0);//(voodoo->banshee_blt.dstBaseAddr + x*3 + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t dest = *(uint32_t *)&voodoo->vram[addr]; + *(uint16_t *) &voodoo->vram[addr] = MIX(voodoo, dest, voodoo->banshee_blt.colorFore, pattern, src_colorkey, COLORKEY_16); + voodoo->changedvram[addr >> 12] = changeframecount; + break; + } + case DST_FORMAT_COL_24_BPP: + { + uint32_t addr = get_addr(voodoo, x * 3, y, 0, 0); //(voodoo->banshee_blt.dstBaseAddr + x*3 + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t dest = *(uint32_t *) &voodoo->vram[addr]; - *(uint32_t *)&voodoo->vram[addr] = (MIX(voodoo, dest, voodoo->banshee_blt.colorFore, pattern, src_colorkey, COLORKEY_32) & 0xffffff) | (dest & 0xff000000); - voodoo->changedvram[addr >> 12] = changeframecount; - break; - } - case DST_FORMAT_COL_32_BPP: - { - uint32_t addr = get_addr(voodoo, x*4, y, 0, 0);//(voodoo->banshee_blt.dstBaseAddr + x*4 + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t dest = *(uint32_t *)&voodoo->vram[addr]; + *(uint32_t *) &voodoo->vram[addr] = (MIX(voodoo, dest, voodoo->banshee_blt.colorFore, pattern, src_colorkey, COLORKEY_32) & 0xffffff) | (dest & 0xff000000); + voodoo->changedvram[addr >> 12] = changeframecount; + break; + } + case DST_FORMAT_COL_32_BPP: + { + uint32_t addr = get_addr(voodoo, x * 4, y, 0, 0); //(voodoo->banshee_blt.dstBaseAddr + x*4 + y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t dest = *(uint32_t *) &voodoo->vram[addr]; - *(uint32_t *)&voodoo->vram[addr] = MIX(voodoo, dest, voodoo->banshee_blt.colorFore, pattern, src_colorkey, COLORKEY_32); - voodoo->changedvram[addr >> 12] = changeframecount; - break; - } - } + *(uint32_t *) &voodoo->vram[addr] = MIX(voodoo, dest, voodoo->banshee_blt.colorFore, pattern, src_colorkey, COLORKEY_32); + voodoo->changedvram[addr >> 12] = changeframecount; + break; + } + } } - -static void update_src_stride(voodoo_t *voodoo) +static void +update_src_stride(voodoo_t *voodoo) { - int bpp; + int bpp; - switch (voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) - { - case SRC_FORMAT_COL_1_BPP: - bpp = 1; - break; - case SRC_FORMAT_COL_8_BPP: - bpp = 8; - break; - case SRC_FORMAT_COL_16_BPP: - bpp = 16; - break; - case SRC_FORMAT_COL_24_BPP: - bpp = 24; - break; - case SRC_FORMAT_COL_32_BPP: - bpp = 32; - break; + switch (voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) { + case SRC_FORMAT_COL_1_BPP: + bpp = 1; + break; + case SRC_FORMAT_COL_8_BPP: + bpp = 8; + break; + case SRC_FORMAT_COL_16_BPP: + bpp = 16; + break; + case SRC_FORMAT_COL_24_BPP: + bpp = 24; + break; + case SRC_FORMAT_COL_32_BPP: + bpp = 32; + break; - default: - bpp = 16; - break; - } + default: + bpp = 16; + break; + } - switch (voodoo->banshee_blt.srcFormat & SRC_FORMAT_PACKING_MASK) - { - case SRC_FORMAT_PACKING_STRIDE: - voodoo->banshee_blt.src_stride_src = voodoo->banshee_blt.src_stride; //voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK; - voodoo->banshee_blt.src_stride_dest = voodoo->banshee_blt.src_stride; //voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK; - voodoo->banshee_blt.host_data_size_src = (voodoo->banshee_blt.srcSizeX * bpp + 7) >> 3; - voodoo->banshee_blt.host_data_size_dest = (voodoo->banshee_blt.dstSizeX * bpp + 7) >> 3; -// bansheeblt_log("Stride packing %08x %08x bpp=%i dstSizeX=%i\n", voodoo->banshee_blt.src_stride_dest, voodoo->banshee_blt.host_data_size_dest, bpp, voodoo->banshee_blt.dstSizeX); - break; + switch (voodoo->banshee_blt.srcFormat & SRC_FORMAT_PACKING_MASK) { + case SRC_FORMAT_PACKING_STRIDE: + voodoo->banshee_blt.src_stride_src = voodoo->banshee_blt.src_stride; // voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK; + voodoo->banshee_blt.src_stride_dest = voodoo->banshee_blt.src_stride; // voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK; + voodoo->banshee_blt.host_data_size_src = (voodoo->banshee_blt.srcSizeX * bpp + 7) >> 3; + voodoo->banshee_blt.host_data_size_dest = (voodoo->banshee_blt.dstSizeX * bpp + 7) >> 3; + // bansheeblt_log("Stride packing %08x %08x bpp=%i dstSizeX=%i\n", voodoo->banshee_blt.src_stride_dest, voodoo->banshee_blt.host_data_size_dest, bpp, voodoo->banshee_blt.dstSizeX); + break; - case SRC_FORMAT_PACKING_BYTE: - voodoo->banshee_blt.src_stride_src = (voodoo->banshee_blt.srcSizeX * bpp + 7) >> 3; - voodoo->banshee_blt.src_stride_dest = (voodoo->banshee_blt.dstSizeX * bpp + 7) >> 3; - voodoo->banshee_blt.host_data_size_src = voodoo->banshee_blt.src_stride_src; - voodoo->banshee_blt.host_data_size_dest = voodoo->banshee_blt.src_stride_dest; -// bansheeblt_log("Byte packing %08x %08x\n", voodoo->banshee_blt.src_stride_dest, voodoo->banshee_blt.host_data_size_dest); - break; + case SRC_FORMAT_PACKING_BYTE: + voodoo->banshee_blt.src_stride_src = (voodoo->banshee_blt.srcSizeX * bpp + 7) >> 3; + voodoo->banshee_blt.src_stride_dest = (voodoo->banshee_blt.dstSizeX * bpp + 7) >> 3; + voodoo->banshee_blt.host_data_size_src = voodoo->banshee_blt.src_stride_src; + voodoo->banshee_blt.host_data_size_dest = voodoo->banshee_blt.src_stride_dest; + // bansheeblt_log("Byte packing %08x %08x\n", voodoo->banshee_blt.src_stride_dest, voodoo->banshee_blt.host_data_size_dest); + break; - case SRC_FORMAT_PACKING_WORD: - voodoo->banshee_blt.src_stride_src = ((voodoo->banshee_blt.srcSizeX * bpp + 15) >> 4) * 2; - voodoo->banshee_blt.src_stride_dest = ((voodoo->banshee_blt.dstSizeX * bpp + 15) >> 4) * 2; - voodoo->banshee_blt.host_data_size_src = voodoo->banshee_blt.src_stride_src; - voodoo->banshee_blt.host_data_size_dest = voodoo->banshee_blt.src_stride_dest; -// bansheeblt_log("Word packing %08x %08x\n", voodoo->banshee_blt.src_stride_dest, voodoo->banshee_blt.host_data_size_dest); - break; + case SRC_FORMAT_PACKING_WORD: + voodoo->banshee_blt.src_stride_src = ((voodoo->banshee_blt.srcSizeX * bpp + 15) >> 4) * 2; + voodoo->banshee_blt.src_stride_dest = ((voodoo->banshee_blt.dstSizeX * bpp + 15) >> 4) * 2; + voodoo->banshee_blt.host_data_size_src = voodoo->banshee_blt.src_stride_src; + voodoo->banshee_blt.host_data_size_dest = voodoo->banshee_blt.src_stride_dest; + // bansheeblt_log("Word packing %08x %08x\n", voodoo->banshee_blt.src_stride_dest, voodoo->banshee_blt.host_data_size_dest); + break; - case SRC_FORMAT_PACKING_DWORD: - voodoo->banshee_blt.src_stride_src = ((voodoo->banshee_blt.srcSizeX * bpp + 31) >> 5) * 4; - voodoo->banshee_blt.src_stride_dest = ((voodoo->banshee_blt.dstSizeX * bpp + 31) >> 5) * 4; - voodoo->banshee_blt.host_data_size_src = voodoo->banshee_blt.src_stride_src; - voodoo->banshee_blt.host_data_size_dest = voodoo->banshee_blt.src_stride_dest; -// bansheeblt_log("Dword packing %08x %08x\n", voodoo->banshee_blt.src_stride_dest, voodoo->banshee_blt.host_data_size_dest); - break; - } + case SRC_FORMAT_PACKING_DWORD: + voodoo->banshee_blt.src_stride_src = ((voodoo->banshee_blt.srcSizeX * bpp + 31) >> 5) * 4; + voodoo->banshee_blt.src_stride_dest = ((voodoo->banshee_blt.dstSizeX * bpp + 31) >> 5) * 4; + voodoo->banshee_blt.host_data_size_src = voodoo->banshee_blt.src_stride_src; + voodoo->banshee_blt.host_data_size_dest = voodoo->banshee_blt.src_stride_dest; + // bansheeblt_log("Dword packing %08x %08x\n", voodoo->banshee_blt.src_stride_dest, voodoo->banshee_blt.host_data_size_dest); + break; + } } -static void end_command(voodoo_t *voodoo) +static void +end_command(voodoo_t *voodoo) { - /*Update dest coordinates if required*/ - if (voodoo->banshee_blt.command & COMMAND_INC_X_START) - { - voodoo->banshee_blt.dstXY &= ~0x0000ffff; - voodoo->banshee_blt.dstXY |= (voodoo->banshee_blt.dstX & 0xffff); - } + /*Update dest coordinates if required*/ + if (voodoo->banshee_blt.command & COMMAND_INC_X_START) { + voodoo->banshee_blt.dstXY &= ~0x0000ffff; + voodoo->banshee_blt.dstXY |= (voodoo->banshee_blt.dstX & 0xffff); + } - if (voodoo->banshee_blt.command & COMMAND_INC_Y_START) - { - voodoo->banshee_blt.dstXY &= ~0xffff0000; - voodoo->banshee_blt.dstXY |= (voodoo->banshee_blt.dstY << 16); - } + if (voodoo->banshee_blt.command & COMMAND_INC_Y_START) { + voodoo->banshee_blt.dstXY &= ~0xffff0000; + voodoo->banshee_blt.dstXY |= (voodoo->banshee_blt.dstY << 16); + } } -static void banshee_do_rectfill(voodoo_t *voodoo) +static void +banshee_do_rectfill(voodoo_t *voodoo) { - clip_t *clip = &voodoo->banshee_blt.clip[(voodoo->banshee_blt.command & COMMAND_CLIP_SEL) ? 1 : 0]; - int dst_y = voodoo->banshee_blt.dstY; - uint8_t *pattern_mono = (uint8_t *)voodoo->banshee_blt.colorPattern; - int pat_y = (voodoo->banshee_blt.commandExtra & CMDEXTRA_FORCE_PAT_ROW0) ? 0 : (voodoo->banshee_blt.patoff_y + voodoo->banshee_blt.dstY); - int use_pattern_trans = (voodoo->banshee_blt.command & (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO)) == - (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO); - uint8_t rop = voodoo->banshee_blt.command >> 24; + clip_t *clip = &voodoo->banshee_blt.clip[(voodoo->banshee_blt.command & COMMAND_CLIP_SEL) ? 1 : 0]; + int dst_y = voodoo->banshee_blt.dstY; + uint8_t *pattern_mono = (uint8_t *) voodoo->banshee_blt.colorPattern; + int pat_y = (voodoo->banshee_blt.commandExtra & CMDEXTRA_FORCE_PAT_ROW0) ? 0 : (voodoo->banshee_blt.patoff_y + voodoo->banshee_blt.dstY); + int use_pattern_trans = (voodoo->banshee_blt.command & (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO)) == (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO); + uint8_t rop = voodoo->banshee_blt.command >> 24; -// bansheeblt_log("banshee_do_rectfill: size=%i,%i dst=%i,%i\n", voodoo->banshee_blt.dstSizeX, voodoo->banshee_blt.dstSizeY, voodoo->banshee_blt.dstX, voodoo->banshee_blt.dstY); -// bansheeblt_log("clipping: %i,%i -> %i,%i\n", clip->x_min, clip->y_min, clip->x_max, clip->y_max); -// bansheeblt_log("colorFore=%08x\n", voodoo->banshee_blt.colorFore); - for (voodoo->banshee_blt.cur_y = 0; voodoo->banshee_blt.cur_y < voodoo->banshee_blt.dstSizeY; voodoo->banshee_blt.cur_y++) - { - int dst_x = voodoo->banshee_blt.dstX; + // bansheeblt_log("banshee_do_rectfill: size=%i,%i dst=%i,%i\n", voodoo->banshee_blt.dstSizeX, voodoo->banshee_blt.dstSizeY, voodoo->banshee_blt.dstX, voodoo->banshee_blt.dstY); + // bansheeblt_log("clipping: %i,%i -> %i,%i\n", clip->x_min, clip->y_min, clip->x_max, clip->y_max); + // bansheeblt_log("colorFore=%08x\n", voodoo->banshee_blt.colorFore); + for (voodoo->banshee_blt.cur_y = 0; voodoo->banshee_blt.cur_y < voodoo->banshee_blt.dstSizeY; voodoo->banshee_blt.cur_y++) { + int dst_x = voodoo->banshee_blt.dstX; - if (dst_y >= clip->y_min && dst_y < clip->y_max) - { - int pat_x = voodoo->banshee_blt.patoff_x + voodoo->banshee_blt.dstX; - uint8_t pattern_mask = pattern_mono[pat_y & 7]; + if (dst_y >= clip->y_min && dst_y < clip->y_max) { + int pat_x = voodoo->banshee_blt.patoff_x + voodoo->banshee_blt.dstX; + uint8_t pattern_mask = pattern_mono[pat_y & 7]; - for (voodoo->banshee_blt.cur_x = 0; voodoo->banshee_blt.cur_x < voodoo->banshee_blt.dstSizeX; voodoo->banshee_blt.cur_x++) - { - int pattern_trans = use_pattern_trans ? (pattern_mask & (1 << (7-(pat_x & 7)))) : 1; + for (voodoo->banshee_blt.cur_x = 0; voodoo->banshee_blt.cur_x < voodoo->banshee_blt.dstSizeX; voodoo->banshee_blt.cur_x++) { + int pattern_trans = use_pattern_trans ? (pattern_mask & (1 << (7 - (pat_x & 7)))) : 1; - if (dst_x >= clip->x_min && dst_x < clip->x_max && pattern_trans) - PLOT(voodoo, dst_x, dst_y, pat_x, pat_y, pattern_mask, rop, voodoo->banshee_blt.colorFore, COLORKEY_32); + if (dst_x >= clip->x_min && dst_x < clip->x_max && pattern_trans) + PLOT(voodoo, dst_x, dst_y, pat_x, pat_y, pattern_mask, rop, voodoo->banshee_blt.colorFore, COLORKEY_32); - dst_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; - pat_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; - } - } - dst_y += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; - if (!(voodoo->banshee_blt.commandExtra & CMDEXTRA_FORCE_PAT_ROW0)) - pat_y += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; + dst_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; + pat_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; + } } + dst_y += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; + if (!(voodoo->banshee_blt.commandExtra & CMDEXTRA_FORCE_PAT_ROW0)) + pat_y += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; + } - end_command(voodoo); + end_command(voodoo); } -static void do_screen_to_screen_line(voodoo_t *voodoo, uint8_t *src_p, int use_x_dir, int src_x, int src_tiled) +static void +do_screen_to_screen_line(voodoo_t *voodoo, uint8_t *src_p, int use_x_dir, int src_x, int src_tiled) { - clip_t *clip = &voodoo->banshee_blt.clip[(voodoo->banshee_blt.command & COMMAND_CLIP_SEL) ? 1 : 0]; - int dst_y = voodoo->banshee_blt.dstY; - int pat_y = (voodoo->banshee_blt.commandExtra & CMDEXTRA_FORCE_PAT_ROW0) ? 0 : (voodoo->banshee_blt.patoff_y + voodoo->banshee_blt.dstY); - uint8_t *pattern_mono = (uint8_t *)voodoo->banshee_blt.colorPattern; - int use_pattern_trans = (voodoo->banshee_blt.command & (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO)) == - (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO); - uint8_t rop = voodoo->banshee_blt.command >> 24; - int src_colorkey; + clip_t *clip = &voodoo->banshee_blt.clip[(voodoo->banshee_blt.command & COMMAND_CLIP_SEL) ? 1 : 0]; + int dst_y = voodoo->banshee_blt.dstY; + int pat_y = (voodoo->banshee_blt.commandExtra & CMDEXTRA_FORCE_PAT_ROW0) ? 0 : (voodoo->banshee_blt.patoff_y + voodoo->banshee_blt.dstY); + uint8_t *pattern_mono = (uint8_t *) voodoo->banshee_blt.colorPattern; + int use_pattern_trans = (voodoo->banshee_blt.command & (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO)) == (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO); + uint8_t rop = voodoo->banshee_blt.command >> 24; + int src_colorkey; - switch (voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) - { - case SRC_FORMAT_COL_8_BPP: - src_colorkey = COLORKEY_8; - break; - case SRC_FORMAT_COL_16_BPP: - src_colorkey = COLORKEY_16; - break; - default: - src_colorkey = COLORKEY_32; - break; - } -// bansheeblt_log("do_screen_to_screen_line: srcFormat=%08x dst=%08x\n", voodoo->banshee_blt.srcFormat, voodoo->banshee_blt.dstFormat); - if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == - (voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK)) - { - /*No conversion required*/ - if (dst_y >= clip->y_min && dst_y < clip->y_max) - { - int dst_x = voodoo->banshee_blt.dstX; - int pat_x = voodoo->banshee_blt.patoff_x + voodoo->banshee_blt.dstX; - uint8_t pattern_mask = pattern_mono[pat_y & 7]; + switch (voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) { + case SRC_FORMAT_COL_8_BPP: + src_colorkey = COLORKEY_8; + break; + case SRC_FORMAT_COL_16_BPP: + src_colorkey = COLORKEY_16; + break; + default: + src_colorkey = COLORKEY_32; + break; + } + // bansheeblt_log("do_screen_to_screen_line: srcFormat=%08x dst=%08x\n", voodoo->banshee_blt.srcFormat, voodoo->banshee_blt.dstFormat); + if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == (voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK)) { + /*No conversion required*/ + if (dst_y >= clip->y_min && dst_y < clip->y_max) { + int dst_x = voodoo->banshee_blt.dstX; + int pat_x = voodoo->banshee_blt.patoff_x + voodoo->banshee_blt.dstX; + uint8_t pattern_mask = pattern_mono[pat_y & 7]; - for (voodoo->banshee_blt.cur_x = 0; voodoo->banshee_blt.cur_x < voodoo->banshee_blt.dstSizeX; voodoo->banshee_blt.cur_x++) - { - int pattern_trans = use_pattern_trans ? (pattern_mask & (1 << (7-(pat_x & 7)))) : 1; - int src_x_real = (src_x * voodoo->banshee_blt.src_bpp) >> 3; + for (voodoo->banshee_blt.cur_x = 0; voodoo->banshee_blt.cur_x < voodoo->banshee_blt.dstSizeX; voodoo->banshee_blt.cur_x++) { + int pattern_trans = use_pattern_trans ? (pattern_mask & (1 << (7 - (pat_x & 7)))) : 1; + int src_x_real = (src_x * voodoo->banshee_blt.src_bpp) >> 3; - if (src_tiled) - src_x_real = (src_x_real & 127) + ((src_x_real >> 7) * 128*32); + if (src_tiled) + src_x_real = (src_x_real & 127) + ((src_x_real >> 7) * 128 * 32); - if (dst_x >= clip->x_min && dst_x < clip->x_max && pattern_trans) - { - switch (voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK) - { - case DST_FORMAT_COL_8_BPP: - { - uint32_t dst_addr = get_addr(voodoo, dst_x, dst_y, 0, 0);//(voodoo->banshee_blt.dstBaseAddr + dst_x + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t src = src_p[src_x_real]; - uint32_t dest = voodoo->vram[dst_addr]; - uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? - ((pattern_mask & (1 << (7-(pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : - voodoo->banshee_blt.colorPattern8[(pat_x & 7) + (pat_y & 7)*8]; + if (dst_x >= clip->x_min && dst_x < clip->x_max && pattern_trans) { + switch (voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK) { + case DST_FORMAT_COL_8_BPP: + { + uint32_t dst_addr = get_addr(voodoo, dst_x, dst_y, 0, 0); //(voodoo->banshee_blt.dstBaseAddr + dst_x + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t src = src_p[src_x_real]; + uint32_t dest = voodoo->vram[dst_addr]; + uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? ((pattern_mask & (1 << (7 - (pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : voodoo->banshee_blt.colorPattern8[(pat_x & 7) + (pat_y & 7) * 8]; - voodoo->vram[dst_addr] = MIX(voodoo, dest, src, pattern, COLORKEY_8, COLORKEY_8); - voodoo->changedvram[dst_addr >> 12] = changeframecount; - break; - } - case DST_FORMAT_COL_16_BPP: - { - uint32_t dst_addr = get_addr(voodoo, dst_x*2, dst_y, 0, 0);//dst_addr = (voodoo->banshee_blt.dstBaseAddr + dst_x*2 + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t src = *(uint16_t *)&src_p[src_x_real]; - uint32_t dest = *(uint16_t *)&voodoo->vram[dst_addr]; - uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? - ((pattern_mask & (1 << (7-(pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : - voodoo->banshee_blt.colorPattern16[(pat_x & 7) + (pat_y & 7)*8]; + voodoo->vram[dst_addr] = MIX(voodoo, dest, src, pattern, COLORKEY_8, COLORKEY_8); + voodoo->changedvram[dst_addr >> 12] = changeframecount; + break; + } + case DST_FORMAT_COL_16_BPP: + { + uint32_t dst_addr = get_addr(voodoo, dst_x * 2, dst_y, 0, 0); // dst_addr = (voodoo->banshee_blt.dstBaseAddr + dst_x*2 + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t src = *(uint16_t *) &src_p[src_x_real]; + uint32_t dest = *(uint16_t *) &voodoo->vram[dst_addr]; + uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? ((pattern_mask & (1 << (7 - (pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : voodoo->banshee_blt.colorPattern16[(pat_x & 7) + (pat_y & 7) * 8]; - *(uint16_t *)&voodoo->vram[dst_addr] = MIX(voodoo, dest, src, pattern, COLORKEY_16, COLORKEY_16); - voodoo->changedvram[dst_addr >> 12] = changeframecount; - break; - } - case DST_FORMAT_COL_24_BPP: - { - uint32_t dst_addr = get_addr(voodoo, dst_x*3, dst_y, 0, 0);//dst_addr = (voodoo->banshee_blt.dstBaseAddr + dst_x*3 + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t src = *(uint32_t *)&src_p[src_x_real]; - uint32_t dest = *(uint32_t *)&voodoo->vram[dst_addr]; - uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? - ((pattern_mask & (1 << (7-(pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : - voodoo->banshee_blt.colorPattern24[(pat_x & 7) + (pat_y & 7)*8]; + *(uint16_t *) &voodoo->vram[dst_addr] = MIX(voodoo, dest, src, pattern, COLORKEY_16, COLORKEY_16); + voodoo->changedvram[dst_addr >> 12] = changeframecount; + break; + } + case DST_FORMAT_COL_24_BPP: + { + uint32_t dst_addr = get_addr(voodoo, dst_x * 3, dst_y, 0, 0); // dst_addr = (voodoo->banshee_blt.dstBaseAddr + dst_x*3 + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t src = *(uint32_t *) &src_p[src_x_real]; + uint32_t dest = *(uint32_t *) &voodoo->vram[dst_addr]; + uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? ((pattern_mask & (1 << (7 - (pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : voodoo->banshee_blt.colorPattern24[(pat_x & 7) + (pat_y & 7) * 8]; - *(uint32_t *)&voodoo->vram[dst_addr] = (MIX(voodoo, dest, src, pattern, COLORKEY_32, COLORKEY_32) & 0xffffff) | (dest & 0xff000000); - voodoo->changedvram[dst_addr >> 12] = changeframecount; - break; - } - case DST_FORMAT_COL_32_BPP: - { - uint32_t dst_addr = get_addr(voodoo, dst_x*4, dst_y, 0, 0);//dst_addr = (voodoo->banshee_blt.dstBaseAddr + dst_x*4 + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t src = *(uint32_t *)&src_p[src_x_real]; - uint32_t dest = *(uint32_t *)&voodoo->vram[dst_addr]; - uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? - ((pattern_mask & (1 << (7-(pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : - voodoo->banshee_blt.colorPattern[(pat_x & 7) + (pat_y & 7)*8]; + *(uint32_t *) &voodoo->vram[dst_addr] = (MIX(voodoo, dest, src, pattern, COLORKEY_32, COLORKEY_32) & 0xffffff) | (dest & 0xff000000); + voodoo->changedvram[dst_addr >> 12] = changeframecount; + break; + } + case DST_FORMAT_COL_32_BPP: + { + uint32_t dst_addr = get_addr(voodoo, dst_x * 4, dst_y, 0, 0); // dst_addr = (voodoo->banshee_blt.dstBaseAddr + dst_x*4 + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t src = *(uint32_t *) &src_p[src_x_real]; + uint32_t dest = *(uint32_t *) &voodoo->vram[dst_addr]; + uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? ((pattern_mask & (1 << (7 - (pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : voodoo->banshee_blt.colorPattern[(pat_x & 7) + (pat_y & 7) * 8]; - *(uint32_t *)&voodoo->vram[dst_addr] = MIX(voodoo, dest, src, pattern, COLORKEY_32, COLORKEY_32); - voodoo->changedvram[dst_addr >> 12] = changeframecount; - break; - } - } - } - if (use_x_dir) - { - src_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; - dst_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; - pat_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; - } - else - { - src_x++; - dst_x++; - pat_x++; - } - } + *(uint32_t *) &voodoo->vram[dst_addr] = MIX(voodoo, dest, src, pattern, COLORKEY_32, COLORKEY_32); + voodoo->changedvram[dst_addr >> 12] = changeframecount; + break; + } + } } - voodoo->banshee_blt.srcY += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; - voodoo->banshee_blt.dstY += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; - } - else - { - /*Conversion required*/ - if (dst_y >= clip->y_min && dst_y < clip->y_max) - { -// int src_x = voodoo->banshee_blt.srcX; - int dst_x = voodoo->banshee_blt.dstX; - int pat_x = voodoo->banshee_blt.patoff_x + voodoo->banshee_blt.dstX; - uint8_t pattern_mask = pattern_mono[pat_y & 7]; - - for (voodoo->banshee_blt.cur_x = 0; voodoo->banshee_blt.cur_x < voodoo->banshee_blt.dstSizeX; voodoo->banshee_blt.cur_x++) - { - int pattern_trans = use_pattern_trans ? (pattern_mask & (1 << (7-(pat_x & 7)))) : 1; - int src_x_real = (src_x * voodoo->banshee_blt.src_bpp) >> 3; - - if (src_tiled) - src_x_real = (src_x_real & 127) + ((src_x_real >> 7) * 128*32); - - if (dst_x >= clip->x_min && dst_x < clip->x_max && pattern_trans) - { - uint32_t src_data = 0; - int transparent = 0; - - switch (voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) - { - case SRC_FORMAT_COL_1_BPP: - { - uint8_t src_byte = src_p[src_x_real]; - src_data = (src_byte & (0x80 >> (src_x & 7))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack; - if (voodoo->banshee_blt.command & COMMAND_TRANS_MONO) - transparent = !(src_byte & (0x80 >> (src_x & 7))); -// bansheeblt_log(" 1bpp src_byte=%02x src_x=%i src_data=%x transparent=%i\n", src_byte, src_x, src_data, transparent); - break; - } - case SRC_FORMAT_COL_8_BPP: - { - src_data = src_p[src_x_real]; - break; - } - case SRC_FORMAT_COL_16_BPP: - { - uint16_t src_16 = *(uint16_t *)&src_p[src_x_real]; - int r = (src_16 >> 11); - int g = (src_16 >> 5) & 0x3f; - int b = src_16 & 0x1f; - - r = (r << 3) | (r >> 2); - g = (g << 2) | (g >> 4); - b = (b << 3) | (b >> 2); - src_data = (r << 16) | (g << 8) | b; - break; - } - case SRC_FORMAT_COL_24_BPP: - { - src_data = *(uint32_t *)&src_p[src_x_real]; - break; - } - case SRC_FORMAT_COL_32_BPP: - { - src_data = *(uint32_t *)&src_p[src_x_real]; - break; - } - - default: - fatal("banshee_do_screen_to_screen_blt: unknown srcFormat %08x\n", voodoo->banshee_blt.srcFormat); - } - - if ((voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK) == DST_FORMAT_COL_16_BPP && - (voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) != SRC_FORMAT_COL_1_BPP) - { - int r = src_data >> 16; - int g = (src_data >> 8) & 0xff; - int b = src_data & 0xff; - - src_data = (b >> 3) | ((g >> 2) << 5) | ((r >> 3) << 11); - } - - if (!transparent) - PLOT(voodoo, dst_x, dst_y, pat_x, pat_y, pattern_mask, rop, src_data, src_colorkey); - } - if (use_x_dir) - { - src_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; - dst_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; - pat_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; - } - else - { - src_x++; - dst_x++; - pat_x++; - } - } + if (use_x_dir) { + src_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; + dst_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; + pat_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; + } else { + src_x++; + dst_x++; + pat_x++; } - voodoo->banshee_blt.srcY += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; - voodoo->banshee_blt.dstY += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; - } -} - -static void banshee_do_screen_to_screen_blt(voodoo_t *voodoo) -{ -// bansheeblt_log("screen_to_screen: %08x %08x %08x\n", voodoo->banshee_blt.srcFormat, voodoo->banshee_blt.src_stride, voodoo->banshee_blt.src_stride_dest); -// return; - for (voodoo->banshee_blt.cur_y = 0; voodoo->banshee_blt.cur_y < voodoo->banshee_blt.dstSizeY; voodoo->banshee_blt.cur_y++) - { - uint32_t src_addr = get_addr(voodoo, 0, voodoo->banshee_blt.srcY, 1, voodoo->banshee_blt.src_stride_dest); -// if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == SRC_FORMAT_COL_1_BPP) -// bansheeblt_log(" srcY=%i src_addr=%08x\n", voodoo->banshee_blt.srcY, src_addr); - do_screen_to_screen_line(voodoo, &voodoo->vram[src_addr], 1, voodoo->banshee_blt.srcX, voodoo->banshee_blt.srcBaseAddr_tiled); - } - end_command(voodoo); -} - -static void banshee_do_host_to_screen_blt(voodoo_t *voodoo, int count, uint32_t data) -{ -// if (voodoo->banshee_blt.dstBaseAddr == 0xee5194) -// bansheeblt_log("banshee_do_host_to_screen_blt: data=%08x host_data_count=%i src_stride_dest=%i host_data_size_dest=%i\n", data, voodoo->banshee_blt.host_data_count, voodoo->banshee_blt.src_stride_dest, voodoo->banshee_blt.host_data_size_dest); - - if (voodoo->banshee_blt.srcFormat & SRC_FORMAT_BYTE_SWIZZLE) - data = (data >> 24) | ((data >> 8) & 0xff00) | ((data << 8) & 0xff0000) | (data << 24); - if (voodoo->banshee_blt.srcFormat & SRC_FORMAT_WORD_SWIZZLE) - data = (data >> 16) | (data << 16); - - if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_PACKING_MASK) == SRC_FORMAT_PACKING_STRIDE) - { - int last_byte; - - if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == SRC_FORMAT_COL_1_BPP) - last_byte = ((voodoo->banshee_blt.srcX & 31) + voodoo->banshee_blt.dstSizeX + 7) >> 3; - else - last_byte = (voodoo->banshee_blt.srcX & 3) + voodoo->banshee_blt.host_data_size_dest; - - *(uint32_t *)&voodoo->banshee_blt.host_data[voodoo->banshee_blt.host_data_count] = data; - voodoo->banshee_blt.host_data_count += 4; - if (voodoo->banshee_blt.host_data_count >= last_byte) - { -// bansheeblt_log(" %i %i srcX=%i srcFormat=%08x\n", voodoo->banshee_blt.cur_y, voodoo->banshee_blt.dstSizeY, voodoo->banshee_blt.srcX); - if (voodoo->banshee_blt.cur_y < voodoo->banshee_blt.dstSizeY) - { - if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == SRC_FORMAT_COL_1_BPP) - do_screen_to_screen_line(voodoo, &voodoo->banshee_blt.host_data[(voodoo->banshee_blt.srcX >> 3) & 3], 0, voodoo->banshee_blt.srcX & 7, 0); - else - do_screen_to_screen_line(voodoo, &voodoo->banshee_blt.host_data[voodoo->banshee_blt.srcX & 3], 0, 0, 0); - voodoo->banshee_blt.cur_y++; - if (voodoo->banshee_blt.cur_y == voodoo->banshee_blt.dstSizeY) - end_command(voodoo); - } - - if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == SRC_FORMAT_COL_1_BPP) - voodoo->banshee_blt.srcX += (voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK) << 3; - else - voodoo->banshee_blt.srcX += (voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK); - - voodoo->banshee_blt.host_data_count = 0; - } - } - else - { - *(uint32_t *)&voodoo->banshee_blt.host_data[voodoo->banshee_blt.host_data_count] = data; - voodoo->banshee_blt.host_data_count += 4; - while (voodoo->banshee_blt.host_data_count >= voodoo->banshee_blt.src_stride_dest) - { - voodoo->banshee_blt.host_data_count -= voodoo->banshee_blt.src_stride_dest; - -// bansheeblt_log(" %i %i\n", voodoo->banshee_blt.cur_y, voodoo->banshee_blt.dstSizeY); - if (voodoo->banshee_blt.cur_y < voodoo->banshee_blt.dstSizeY) - { - do_screen_to_screen_line(voodoo, voodoo->banshee_blt.host_data, 0, 0, 0); - voodoo->banshee_blt.cur_y++; - if (voodoo->banshee_blt.cur_y == voodoo->banshee_blt.dstSizeY) - end_command(voodoo); - } - - if (voodoo->banshee_blt.host_data_count) - { -// bansheeblt_log(" remaining=%i\n", voodoo->banshee_blt.host_data_count); - *(uint32_t *)&voodoo->banshee_blt.host_data[0] = data >> (4-voodoo->banshee_blt.host_data_count)*8; - } - } - } -} - -static void do_screen_to_screen_stretch_line(voodoo_t *voodoo,uint8_t *src_p, int src_x, int *src_y) -{ - clip_t *clip = &voodoo->banshee_blt.clip[(voodoo->banshee_blt.command & COMMAND_CLIP_SEL) ? 1 : 0]; -// int src_y = voodoo->banshee_blt.srcY; - int dst_y = voodoo->banshee_blt.dstY; - int pat_y = (voodoo->banshee_blt.commandExtra & CMDEXTRA_FORCE_PAT_ROW0) ? 0 : (voodoo->banshee_blt.patoff_y + voodoo->banshee_blt.dstY); - uint8_t *pattern_mono = (uint8_t *)voodoo->banshee_blt.colorPattern; - int use_pattern_trans = (voodoo->banshee_blt.command & (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO)) == - (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO); - uint32_t *colorPattern = voodoo->banshee_blt.colorPattern; - - //int error_y = voodoo->banshee_blt.dstSizeY / 2; - -/* bansheeblt_log("banshee_do_screen_to_screen_stretch_blt:\n"); - bansheeblt_log(" srcXY=%i,%i srcsizeXY=%i,%i\n", voodoo->banshee_blt.srcX, voodoo->banshee_blt.srcY, voodoo->banshee_blt.srcSizeX, voodoo->banshee_blt.srcSizeY); - bansheeblt_log(" dstXY=%i,%i dstsizeXY=%i,%i\n", voodoo->banshee_blt.dstX, voodoo->banshee_blt.dstY, voodoo->banshee_blt.dstSizeX, voodoo->banshee_blt.dstSizeY);*/ - if (dst_y >= clip->y_min && dst_y < clip->y_max) - { -// int src_x = voodoo->banshee_blt.srcX; - int dst_x = voodoo->banshee_blt.dstX; - int pat_x = voodoo->banshee_blt.patoff_x + voodoo->banshee_blt.dstX; - uint8_t pattern_mask = pattern_mono[pat_y & 7]; - int error_x = voodoo->banshee_blt.dstSizeX / 2; - -// bansheeblt_log(" Plot dest line %03i : src line %03i\n", dst_y, src_y); - for (voodoo->banshee_blt.cur_x = 0; voodoo->banshee_blt.cur_x < voodoo->banshee_blt.dstSizeX; voodoo->banshee_blt.cur_x++) - { - int pattern_trans = use_pattern_trans ? (pattern_mask & (1 << (7-(pat_x & 7)))) : 1; - - if (dst_x >= clip->x_min && dst_x < clip->x_max && pattern_trans) - { - switch (voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK) - { - case DST_FORMAT_COL_8_BPP: - { - uint32_t dst_addr = get_addr(voodoo, dst_x, dst_y, 0, 0);//(voodoo->banshee_blt.dstBaseAddr + dst_x + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t src = src_p[src_x]; - uint32_t dest = voodoo->vram[dst_addr]; - uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? - ((pattern_mask & (1 << (7-(pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : - colorPattern[(pat_x & 7) + (pat_y & 7)*8]; - - voodoo->vram[dst_addr] = MIX(voodoo, dest, src, pattern, COLORKEY_8, COLORKEY_8); -// bansheeblt_log("%i,%i : sdp=%02x,%02x,%02x res=%02x\n", voodoo->banshee_blt.cur_x, voodoo->banshee_blt.cur_y, src, dest, pattern, voodoo->vram[dst_addr]); - voodoo->changedvram[dst_addr >> 12] = changeframecount; - break; - } - case DST_FORMAT_COL_16_BPP: - { - uint32_t dst_addr = get_addr(voodoo, dst_x*2, dst_y, 0, 0);//(voodoo->banshee_blt.dstBaseAddr + dst_x*2 + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t src = *(uint16_t *)&src_p[src_x*2]; - uint32_t dest = *(uint16_t *)&voodoo->vram[dst_addr]; - uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? - ((pattern_mask & (1 << (7-(pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : - colorPattern[(pat_x & 7) + (pat_y & 7)*8]; - - *(uint16_t *)&voodoo->vram[dst_addr] = MIX(voodoo, dest, src, pattern, COLORKEY_16, COLORKEY_16); -// bansheeblt_log("%i,%i : sdp=%02x,%02x,%02x res=%02x\n", voodoo->banshee_blt.cur_x, voodoo->banshee_blt.cur_y, src, dest, pattern, *(uint16_t *)&voodoo->vram[dst_addr]); - voodoo->changedvram[dst_addr >> 12] = changeframecount; - break; - } - case DST_FORMAT_COL_24_BPP: - { - uint32_t dst_addr = get_addr(voodoo, dst_x*3, dst_y, 0, 0);//(voodoo->banshee_blt.dstBaseAddr + dst_x*3 + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t src = *(uint32_t *)&src_p[src_x*3]; - uint32_t dest = *(uint32_t *)&voodoo->vram[dst_addr]; - uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? - ((pattern_mask & (1 << (7-(pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : - colorPattern[(pat_x & 7) + (pat_y & 7)*8]; - - *(uint32_t *)&voodoo->vram[dst_addr] = (MIX(voodoo, dest, src, pattern, COLORKEY_32, COLORKEY_32) & 0xffffff) | (*(uint32_t *)&voodoo->vram[dst_addr] & 0xff000000); -// bansheeblt_log("%i,%i : sdp=%02x,%02x,%02x res=%02x\n", voodoo->banshee_blt.cur_x, voodoo->banshee_blt.cur_y, src, dest, pattern, voodoo->vram[dst_addr]); - voodoo->changedvram[dst_addr >> 12] = changeframecount; - break; - } - case DST_FORMAT_COL_32_BPP: - { - uint32_t dst_addr = get_addr(voodoo, dst_x*4, dst_y, 0, 0);//(voodoo->banshee_blt.dstBaseAddr + dst_x*4 + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; - uint32_t src = *(uint32_t *)&src_p[src_x*4]; - uint32_t dest = *(uint32_t *)&voodoo->vram[dst_addr]; - uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? - ((pattern_mask & (1 << (7-(pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : - colorPattern[(pat_x & 7) + (pat_y & 7)*8]; - - *(uint32_t *)&voodoo->vram[dst_addr] = MIX(voodoo, dest, src, pattern, COLORKEY_32, COLORKEY_32); -// bansheeblt_log("%i,%i : sdp=%02x,%02x,%02x res=%02x\n", voodoo->banshee_blt.cur_x, voodoo->banshee_blt.cur_y, src, dest, pattern, voodoo->vram[dst_addr]); - voodoo->changedvram[dst_addr >> 12] = changeframecount; - break; - } - } - } - - error_x -= voodoo->banshee_blt.srcSizeX; - while (error_x < 0) - { - error_x += voodoo->banshee_blt.dstSizeX; - src_x++; - } - dst_x++; - pat_x++; - } - } - - voodoo->banshee_blt.bres_error_0 -= voodoo->banshee_blt.srcSizeY; - while (voodoo->banshee_blt.bres_error_0 < 0) - { - voodoo->banshee_blt.bres_error_0 += voodoo->banshee_blt.dstSizeY; - if (src_y) - (*src_y) += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; + } } + voodoo->banshee_blt.srcY += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; voodoo->banshee_blt.dstY += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; -// pat_y += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; -} + } else { + /*Conversion required*/ + if (dst_y >= clip->y_min && dst_y < clip->y_max) { + // int src_x = voodoo->banshee_blt.srcX; + int dst_x = voodoo->banshee_blt.dstX; + int pat_x = voodoo->banshee_blt.patoff_x + voodoo->banshee_blt.dstX; + uint8_t pattern_mask = pattern_mono[pat_y & 7]; -static void banshee_do_screen_to_screen_stretch_blt(voodoo_t *voodoo) -{ -// bansheeblt_log("screen_to_screen: %08x %08x %08x\n", voodoo->banshee_blt.srcFormat, voodoo->banshee_blt.src_stride, voodoo->banshee_blt.src_stride_dest); -// return; - for (voodoo->banshee_blt.cur_y = 0; voodoo->banshee_blt.cur_y < voodoo->banshee_blt.dstSizeY; voodoo->banshee_blt.cur_y++) - { - uint32_t src_addr = get_addr(voodoo, 0, voodoo->banshee_blt.srcY, 1, voodoo->banshee_blt.src_stride_src);//(voodoo->banshee_blt.srcBaseAddr + voodoo->banshee_blt.srcY*voodoo->banshee_blt.src_stride_src) & voodoo->fb_mask; -// bansheeblt_log("scale_blit %i %08x %08x\n", voodoo->banshee_blt.cur_y, src_addr, voodoo->banshee_blt.command); -// if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == SRC_FORMAT_COL_1_BPP) -// bansheeblt_log(" srcY=%i src_addr=%08x\n", voodoo->banshee_blt.srcY, src_addr); - do_screen_to_screen_stretch_line(voodoo, &voodoo->vram[src_addr], voodoo->banshee_blt.srcX, &voodoo->banshee_blt.srcY); - } - end_command(voodoo); -} + for (voodoo->banshee_blt.cur_x = 0; voodoo->banshee_blt.cur_x < voodoo->banshee_blt.dstSizeX; voodoo->banshee_blt.cur_x++) { + int pattern_trans = use_pattern_trans ? (pattern_mask & (1 << (7 - (pat_x & 7)))) : 1; + int src_x_real = (src_x * voodoo->banshee_blt.src_bpp) >> 3; -static void banshee_do_host_to_screen_stretch_blt(voodoo_t *voodoo, int count, uint32_t data) -{ -// if (voodoo->banshee_blt.dstBaseAddr == 0xee5194) -// bansheeblt_log("banshee_do_host_to_screen_blt: data=%08x host_data_count=%i src_stride_dest=%i host_data_size_dest=%i\n", data, voodoo->banshee_blt.host_data_count, voodoo->banshee_blt.src_stride_dest, voodoo->banshee_blt.host_data_size_dest); + if (src_tiled) + src_x_real = (src_x_real & 127) + ((src_x_real >> 7) * 128 * 32); - if (voodoo->banshee_blt.srcFormat & SRC_FORMAT_BYTE_SWIZZLE) - data = (data >> 24) | ((data >> 8) & 0xff00) | ((data << 8) & 0xff0000) | (data << 24); - if (voodoo->banshee_blt.srcFormat & SRC_FORMAT_WORD_SWIZZLE) - data = (data >> 16) | (data << 16); + if (dst_x >= clip->x_min && dst_x < clip->x_max && pattern_trans) { + uint32_t src_data = 0; + int transparent = 0; - if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_PACKING_MASK) == SRC_FORMAT_PACKING_STRIDE) - { - int last_byte = (voodoo->banshee_blt.srcX & 3) + voodoo->banshee_blt.host_data_size_src; + switch (voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) { + case SRC_FORMAT_COL_1_BPP: + { + uint8_t src_byte = src_p[src_x_real]; + src_data = (src_byte & (0x80 >> (src_x & 7))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack; + if (voodoo->banshee_blt.command & COMMAND_TRANS_MONO) + transparent = !(src_byte & (0x80 >> (src_x & 7))); + // bansheeblt_log(" 1bpp src_byte=%02x src_x=%i src_data=%x transparent=%i\n", src_byte, src_x, src_data, transparent); + break; + } + case SRC_FORMAT_COL_8_BPP: + { + src_data = src_p[src_x_real]; + break; + } + case SRC_FORMAT_COL_16_BPP: + { + uint16_t src_16 = *(uint16_t *) &src_p[src_x_real]; + int r = (src_16 >> 11); + int g = (src_16 >> 5) & 0x3f; + int b = src_16 & 0x1f; - *(uint32_t *)&voodoo->banshee_blt.host_data[voodoo->banshee_blt.host_data_count] = data; - voodoo->banshee_blt.host_data_count += 4; - if (voodoo->banshee_blt.host_data_count >= last_byte) - { -// bansheeblt_log(" %i %i srcX=%i srcFormat=%08x\n", voodoo->banshee_blt.cur_y, voodoo->banshee_blt.dstSizeY, voodoo->banshee_blt.srcX); - if (voodoo->banshee_blt.cur_y < voodoo->banshee_blt.dstSizeY) - { - if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == SRC_FORMAT_COL_1_BPP) - do_screen_to_screen_stretch_line(voodoo, &voodoo->banshee_blt.host_data[(voodoo->banshee_blt.srcX >> 3) & 3], voodoo->banshee_blt.srcX & 7, NULL); - else - do_screen_to_screen_stretch_line(voodoo, &voodoo->banshee_blt.host_data[voodoo->banshee_blt.srcX & 3], 0, NULL); - voodoo->banshee_blt.cur_y++; - if (voodoo->banshee_blt.cur_y == voodoo->banshee_blt.dstSizeY) - end_command(voodoo); - } + r = (r << 3) | (r >> 2); + g = (g << 2) | (g >> 4); + b = (b << 3) | (b >> 2); + src_data = (r << 16) | (g << 8) | b; + break; + } + case SRC_FORMAT_COL_24_BPP: + { + src_data = *(uint32_t *) &src_p[src_x_real]; + break; + } + case SRC_FORMAT_COL_32_BPP: + { + src_data = *(uint32_t *) &src_p[src_x_real]; + break; + } - if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == SRC_FORMAT_COL_1_BPP) - voodoo->banshee_blt.srcX += (voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK) << 3; - else - voodoo->banshee_blt.srcX += (voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK); + default: + fatal("banshee_do_screen_to_screen_blt: unknown srcFormat %08x\n", voodoo->banshee_blt.srcFormat); + } - voodoo->banshee_blt.host_data_count = 0; + if ((voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK) == DST_FORMAT_COL_16_BPP && (voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) != SRC_FORMAT_COL_1_BPP) { + int r = src_data >> 16; + int g = (src_data >> 8) & 0xff; + int b = src_data & 0xff; + + src_data = (b >> 3) | ((g >> 2) << 5) | ((r >> 3) << 11); + } + + if (!transparent) + PLOT(voodoo, dst_x, dst_y, pat_x, pat_y, pattern_mask, rop, src_data, src_colorkey); } + if (use_x_dir) { + src_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; + dst_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; + pat_x += (voodoo->banshee_blt.command & COMMAND_DX) ? -1 : 1; + } else { + src_x++; + dst_x++; + pat_x++; + } + } } + voodoo->banshee_blt.srcY += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; + voodoo->banshee_blt.dstY += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; + } +} + +static void +banshee_do_screen_to_screen_blt(voodoo_t *voodoo) +{ + // bansheeblt_log("screen_to_screen: %08x %08x %08x\n", voodoo->banshee_blt.srcFormat, voodoo->banshee_blt.src_stride, voodoo->banshee_blt.src_stride_dest); + // return; + for (voodoo->banshee_blt.cur_y = 0; voodoo->banshee_blt.cur_y < voodoo->banshee_blt.dstSizeY; voodoo->banshee_blt.cur_y++) { + uint32_t src_addr = get_addr(voodoo, 0, voodoo->banshee_blt.srcY, 1, voodoo->banshee_blt.src_stride_dest); + // if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == SRC_FORMAT_COL_1_BPP) + // bansheeblt_log(" srcY=%i src_addr=%08x\n", voodoo->banshee_blt.srcY, src_addr); + do_screen_to_screen_line(voodoo, &voodoo->vram[src_addr], 1, voodoo->banshee_blt.srcX, voodoo->banshee_blt.srcBaseAddr_tiled); + } + end_command(voodoo); +} + +static void +banshee_do_host_to_screen_blt(voodoo_t *voodoo, int count, uint32_t data) +{ + // if (voodoo->banshee_blt.dstBaseAddr == 0xee5194) + // bansheeblt_log("banshee_do_host_to_screen_blt: data=%08x host_data_count=%i src_stride_dest=%i host_data_size_dest=%i\n", data, voodoo->banshee_blt.host_data_count, voodoo->banshee_blt.src_stride_dest, voodoo->banshee_blt.host_data_size_dest); + + if (voodoo->banshee_blt.srcFormat & SRC_FORMAT_BYTE_SWIZZLE) + data = (data >> 24) | ((data >> 8) & 0xff00) | ((data << 8) & 0xff0000) | (data << 24); + if (voodoo->banshee_blt.srcFormat & SRC_FORMAT_WORD_SWIZZLE) + data = (data >> 16) | (data << 16); + + if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_PACKING_MASK) == SRC_FORMAT_PACKING_STRIDE) { + int last_byte; + + if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == SRC_FORMAT_COL_1_BPP) + last_byte = ((voodoo->banshee_blt.srcX & 31) + voodoo->banshee_blt.dstSizeX + 7) >> 3; else - { - *(uint32_t *)&voodoo->banshee_blt.host_data[voodoo->banshee_blt.host_data_count] = data; - voodoo->banshee_blt.host_data_count += 4; - while (voodoo->banshee_blt.host_data_count >= voodoo->banshee_blt.src_stride_src) - { - voodoo->banshee_blt.host_data_count -= voodoo->banshee_blt.src_stride_src; + last_byte = (voodoo->banshee_blt.srcX & 3) + voodoo->banshee_blt.host_data_size_dest; -// bansheeblt_log(" %i %i\n", voodoo->banshee_blt.cur_y, voodoo->banshee_blt.dstSizeY); - if (voodoo->banshee_blt.cur_y < voodoo->banshee_blt.dstSizeY) - { - do_screen_to_screen_stretch_line(voodoo, voodoo->banshee_blt.host_data, 0, NULL); - voodoo->banshee_blt.cur_y++; - if (voodoo->banshee_blt.cur_y == voodoo->banshee_blt.dstSizeY) - end_command(voodoo); - } - - if (voodoo->banshee_blt.host_data_count) - { -// bansheeblt_log(" remaining=%i\n", voodoo->banshee_blt.host_data_count); - *(uint32_t *)&voodoo->banshee_blt.host_data[0] = data >> (4-voodoo->banshee_blt.host_data_count)*8; - } - } - } -} - -static void step_line(voodoo_t *voodoo) -{ - if (voodoo->banshee_blt.line_pix_pos == voodoo->banshee_blt.line_rep_cnt) - { - voodoo->banshee_blt.line_pix_pos = 0; - if (voodoo->banshee_blt.line_bit_pos == voodoo->banshee_blt.line_bit_mask_size) - voodoo->banshee_blt.line_bit_pos = 0; + *(uint32_t *) &voodoo->banshee_blt.host_data[voodoo->banshee_blt.host_data_count] = data; + voodoo->banshee_blt.host_data_count += 4; + if (voodoo->banshee_blt.host_data_count >= last_byte) { + // bansheeblt_log(" %i %i srcX=%i srcFormat=%08x\n", voodoo->banshee_blt.cur_y, voodoo->banshee_blt.dstSizeY, voodoo->banshee_blt.srcX); + if (voodoo->banshee_blt.cur_y < voodoo->banshee_blt.dstSizeY) { + if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == SRC_FORMAT_COL_1_BPP) + do_screen_to_screen_line(voodoo, &voodoo->banshee_blt.host_data[(voodoo->banshee_blt.srcX >> 3) & 3], 0, voodoo->banshee_blt.srcX & 7, 0); else - voodoo->banshee_blt.line_bit_pos++; + do_screen_to_screen_line(voodoo, &voodoo->banshee_blt.host_data[voodoo->banshee_blt.srcX & 3], 0, 0, 0); + voodoo->banshee_blt.cur_y++; + if (voodoo->banshee_blt.cur_y == voodoo->banshee_blt.dstSizeY) + end_command(voodoo); + } + + if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == SRC_FORMAT_COL_1_BPP) + voodoo->banshee_blt.srcX += (voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK) << 3; + else + voodoo->banshee_blt.srcX += (voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK); + + voodoo->banshee_blt.host_data_count = 0; } - else - voodoo->banshee_blt.line_pix_pos++; + } else { + *(uint32_t *) &voodoo->banshee_blt.host_data[voodoo->banshee_blt.host_data_count] = data; + voodoo->banshee_blt.host_data_count += 4; + while (voodoo->banshee_blt.host_data_count >= voodoo->banshee_blt.src_stride_dest) { + voodoo->banshee_blt.host_data_count -= voodoo->banshee_blt.src_stride_dest; + + // bansheeblt_log(" %i %i\n", voodoo->banshee_blt.cur_y, voodoo->banshee_blt.dstSizeY); + if (voodoo->banshee_blt.cur_y < voodoo->banshee_blt.dstSizeY) { + do_screen_to_screen_line(voodoo, voodoo->banshee_blt.host_data, 0, 0, 0); + voodoo->banshee_blt.cur_y++; + if (voodoo->banshee_blt.cur_y == voodoo->banshee_blt.dstSizeY) + end_command(voodoo); + } + + if (voodoo->banshee_blt.host_data_count) { + // bansheeblt_log(" remaining=%i\n", voodoo->banshee_blt.host_data_count); + *(uint32_t *) &voodoo->banshee_blt.host_data[0] = data >> (4 - voodoo->banshee_blt.host_data_count) * 8; + } + } + } } - -static void banshee_do_line(voodoo_t *voodoo, int draw_last_pixel) +static void +do_screen_to_screen_stretch_line(voodoo_t *voodoo, uint8_t *src_p, int src_x, int *src_y) { - clip_t *clip = &voodoo->banshee_blt.clip[(voodoo->banshee_blt.command & COMMAND_CLIP_SEL) ? 1 : 0]; - uint8_t rop = voodoo->banshee_blt.command >> 24; - int dx = ABS(voodoo->banshee_blt.dstX - voodoo->banshee_blt.srcX); - int dy = ABS(voodoo->banshee_blt.dstY - voodoo->banshee_blt.srcY); - int x_inc = (voodoo->banshee_blt.dstX > voodoo->banshee_blt.srcX) ? 1 : -1; - int y_inc = (voodoo->banshee_blt.dstY > voodoo->banshee_blt.srcY) ? 1 : -1; - int x = voodoo->banshee_blt.srcX; - int y = voodoo->banshee_blt.srcY; - int error; - uint32_t stipple = (voodoo->banshee_blt.command & COMMAND_STIPPLE_LINE) ? - voodoo->banshee_blt.lineStipple : ~0; + clip_t *clip = &voodoo->banshee_blt.clip[(voodoo->banshee_blt.command & COMMAND_CLIP_SEL) ? 1 : 0]; + // int src_y = voodoo->banshee_blt.srcY; + int dst_y = voodoo->banshee_blt.dstY; + int pat_y = (voodoo->banshee_blt.commandExtra & CMDEXTRA_FORCE_PAT_ROW0) ? 0 : (voodoo->banshee_blt.patoff_y + voodoo->banshee_blt.dstY); + uint8_t *pattern_mono = (uint8_t *) voodoo->banshee_blt.colorPattern; + int use_pattern_trans = (voodoo->banshee_blt.command & (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO)) == (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO); + uint32_t *colorPattern = voodoo->banshee_blt.colorPattern; - if (dx > dy) /*X major*/ - { - error = dx/2; - while (x != voodoo->banshee_blt.dstX) - { - int mask = stipple & (1 << voodoo->banshee_blt.line_bit_pos); - int pattern_trans = (voodoo->banshee_blt.command & COMMAND_TRANS_MONO) ? mask : 1; + // int error_y = voodoo->banshee_blt.dstSizeY / 2; - if (y >= clip->y_min && y < clip->y_max && x >= clip->x_min && x < clip->x_max && pattern_trans) - PLOT_LINE(voodoo, x, y, rop, mask ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack, COLORKEY_32); + /* bansheeblt_log("banshee_do_screen_to_screen_stretch_blt:\n"); + bansheeblt_log(" srcXY=%i,%i srcsizeXY=%i,%i\n", voodoo->banshee_blt.srcX, voodoo->banshee_blt.srcY, voodoo->banshee_blt.srcSizeX, voodoo->banshee_blt.srcSizeY); + bansheeblt_log(" dstXY=%i,%i dstsizeXY=%i,%i\n", voodoo->banshee_blt.dstX, voodoo->banshee_blt.dstY, voodoo->banshee_blt.dstSizeX, voodoo->banshee_blt.dstSizeY);*/ + if (dst_y >= clip->y_min && dst_y < clip->y_max) { + // int src_x = voodoo->banshee_blt.srcX; + int dst_x = voodoo->banshee_blt.dstX; + int pat_x = voodoo->banshee_blt.patoff_x + voodoo->banshee_blt.dstX; + uint8_t pattern_mask = pattern_mono[pat_y & 7]; + int error_x = voodoo->banshee_blt.dstSizeX / 2; - error -= dy; - if (error < 0) + // bansheeblt_log(" Plot dest line %03i : src line %03i\n", dst_y, src_y); + for (voodoo->banshee_blt.cur_x = 0; voodoo->banshee_blt.cur_x < voodoo->banshee_blt.dstSizeX; voodoo->banshee_blt.cur_x++) { + int pattern_trans = use_pattern_trans ? (pattern_mask & (1 << (7 - (pat_x & 7)))) : 1; + + if (dst_x >= clip->x_min && dst_x < clip->x_max && pattern_trans) { + switch (voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK) { + case DST_FORMAT_COL_8_BPP: { - error += dx; - y += y_inc; + uint32_t dst_addr = get_addr(voodoo, dst_x, dst_y, 0, 0); //(voodoo->banshee_blt.dstBaseAddr + dst_x + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t src = src_p[src_x]; + uint32_t dest = voodoo->vram[dst_addr]; + uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? ((pattern_mask & (1 << (7 - (pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : colorPattern[(pat_x & 7) + (pat_y & 7) * 8]; + + voodoo->vram[dst_addr] = MIX(voodoo, dest, src, pattern, COLORKEY_8, COLORKEY_8); + // bansheeblt_log("%i,%i : sdp=%02x,%02x,%02x res=%02x\n", voodoo->banshee_blt.cur_x, voodoo->banshee_blt.cur_y, src, dest, pattern, voodoo->vram[dst_addr]); + voodoo->changedvram[dst_addr >> 12] = changeframecount; + break; } - x += x_inc; - step_line(voodoo); - } - } - else /*Y major*/ - { - error = dy/2; - while (y != voodoo->banshee_blt.dstY) - { - int mask = stipple & (1 << voodoo->banshee_blt.line_bit_pos); - int pattern_trans = (voodoo->banshee_blt.command & COMMAND_TRANS_MONO) ? mask : 1; - - if (y >= clip->y_min && y < clip->y_max && x >= clip->x_min && x < clip->x_max && pattern_trans) - PLOT_LINE(voodoo, x, y, rop, mask ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack, COLORKEY_32); - - error -= dx; - if (error < 0) + case DST_FORMAT_COL_16_BPP: { - error += dy; - x += x_inc; + uint32_t dst_addr = get_addr(voodoo, dst_x * 2, dst_y, 0, 0); //(voodoo->banshee_blt.dstBaseAddr + dst_x*2 + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t src = *(uint16_t *) &src_p[src_x * 2]; + uint32_t dest = *(uint16_t *) &voodoo->vram[dst_addr]; + uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? ((pattern_mask & (1 << (7 - (pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : colorPattern[(pat_x & 7) + (pat_y & 7) * 8]; + + *(uint16_t *) &voodoo->vram[dst_addr] = MIX(voodoo, dest, src, pattern, COLORKEY_16, COLORKEY_16); + // bansheeblt_log("%i,%i : sdp=%02x,%02x,%02x res=%02x\n", voodoo->banshee_blt.cur_x, voodoo->banshee_blt.cur_y, src, dest, pattern, *(uint16_t *)&voodoo->vram[dst_addr]); + voodoo->changedvram[dst_addr >> 12] = changeframecount; + break; } - y += y_inc; - step_line(voodoo); - } - } - - if (draw_last_pixel) - { - int mask = stipple & (1 << voodoo->banshee_blt.line_bit_pos); - int pattern_trans = (voodoo->banshee_blt.command & COMMAND_TRANS_MONO) ? mask : 1; - - if (y >= clip->y_min && y < clip->y_max && x >= clip->x_min && x < clip->x_max && pattern_trans) - PLOT_LINE(voodoo, x, y, rop, mask ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack, COLORKEY_32); - } - - voodoo->banshee_blt.srcXY = (x & 0xffff) | (y << 16); - voodoo->banshee_blt.srcX = x; - voodoo->banshee_blt.srcY = y; -} - -static void banshee_polyfill_start(voodoo_t *voodoo) -{ - voodoo->banshee_blt.lx[0] = voodoo->banshee_blt.srcX; - voodoo->banshee_blt.ly[0] = voodoo->banshee_blt.srcY; - voodoo->banshee_blt.rx[0] = voodoo->banshee_blt.dstX; - voodoo->banshee_blt.ry[0] = voodoo->banshee_blt.dstY; - voodoo->banshee_blt.lx[1] = voodoo->banshee_blt.srcX; - voodoo->banshee_blt.ly[1] = voodoo->banshee_blt.srcY; - voodoo->banshee_blt.rx[1] = voodoo->banshee_blt.dstX; - voodoo->banshee_blt.ry[1] = voodoo->banshee_blt.dstY; - voodoo->banshee_blt.lx_cur = voodoo->banshee_blt.srcX; - voodoo->banshee_blt.rx_cur = voodoo->banshee_blt.dstX; -} - -static void banshee_polyfill_continue(voodoo_t *voodoo, uint32_t data) -{ - clip_t *clip = &voodoo->banshee_blt.clip[(voodoo->banshee_blt.command & COMMAND_CLIP_SEL) ? 1 : 0]; - uint8_t *pattern_mono = (uint8_t *)voodoo->banshee_blt.colorPattern; - int use_pattern_trans = (voodoo->banshee_blt.command & (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO)) == - (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO); - uint8_t rop = voodoo->banshee_blt.command >> 24; - int y = MAX(voodoo->banshee_blt.ly[0], voodoo->banshee_blt.ry[0]); - int y_end; - -// bansheeblt_log("Polyfill : data %08x\n", data); - - /*if r1.y>=l1.y, next vertex is left*/ - if (voodoo->banshee_blt.ry[1] >= voodoo->banshee_blt.ly[1]) - { - voodoo->banshee_blt.lx[1] = ((int32_t)(data << 19)) >> 19; - voodoo->banshee_blt.ly[1] = ((int32_t)(data << 3)) >> 19; - voodoo->banshee_blt.dx[0] = ABS(voodoo->banshee_blt.lx[1] - voodoo->banshee_blt.lx[0]); - voodoo->banshee_blt.dy[0] = ABS(voodoo->banshee_blt.ly[1] - voodoo->banshee_blt.ly[0]); - voodoo->banshee_blt.x_inc[0] = (voodoo->banshee_blt.lx[1] > voodoo->banshee_blt.lx[0]) ? 1 : -1; - voodoo->banshee_blt.error[0] = voodoo->banshee_blt.dy[0] / 2; - } - else - { - voodoo->banshee_blt.rx[1] = ((int32_t)(data << 19)) >> 19; - voodoo->banshee_blt.ry[1] = ((int32_t)(data << 3)) >> 19; - voodoo->banshee_blt.dx[1] = ABS(voodoo->banshee_blt.rx[1] - voodoo->banshee_blt.rx[0]); - voodoo->banshee_blt.dy[1] = ABS(voodoo->banshee_blt.ry[1] - voodoo->banshee_blt.ry[0]); - voodoo->banshee_blt.x_inc[1] = (voodoo->banshee_blt.rx[1] > voodoo->banshee_blt.rx[0]) ? 1 : -1; - voodoo->banshee_blt.error[1] = voodoo->banshee_blt.dy[1] / 2; - } - -/* bansheeblt_log(" verts now : %03i,%03i %03i,%03i\n", voodoo->banshee_blt.lx[0], voodoo->banshee_blt.ly[0], voodoo->banshee_blt.rx[0], voodoo->banshee_blt.ry[0]); - bansheeblt_log(" %03i,%03i %03i,%03i\n", voodoo->banshee_blt.lx[1], voodoo->banshee_blt.ly[1], voodoo->banshee_blt.rx[1], voodoo->banshee_blt.ry[1]); - bansheeblt_log(" left dx=%i dy=%i x_inc=%i error=%i\n", voodoo->banshee_blt.dx[0],voodoo->banshee_blt.dy[0],voodoo->banshee_blt.x_inc[0],voodoo->banshee_blt.error[0]); - bansheeblt_log(" right dx=%i dy=%i x_inc=%i error=%i\n", voodoo->banshee_blt.dx[1],voodoo->banshee_blt.dy[1],voodoo->banshee_blt.x_inc[1],voodoo->banshee_blt.error[1]);*/ - y_end = MIN(voodoo->banshee_blt.ly[1], voodoo->banshee_blt.ry[1]); -// bansheeblt_log("Polyfill : draw spans from %i-%i\n", y, y_end); - for (; y < y_end; y++) - { -// bansheeblt_log(" %i: %i %i\n", y, voodoo->banshee_blt.lx_cur, voodoo->banshee_blt.rx_cur); - /*Draw span from lx_cur to rx_cur*/ - if (y >= clip->y_min && y < clip->y_max) - { - int pat_y = (voodoo->banshee_blt.commandExtra & CMDEXTRA_FORCE_PAT_ROW0) ? 0 : (voodoo->banshee_blt.patoff_y + y); - uint8_t pattern_mask = pattern_mono[pat_y & 7]; - int x; - - for (x = voodoo->banshee_blt.lx_cur; x < voodoo->banshee_blt.rx_cur; x++) + case DST_FORMAT_COL_24_BPP: { - int pat_x = voodoo->banshee_blt.patoff_x + x; - int pattern_trans = use_pattern_trans ? (pattern_mask & (1 << (7-(pat_x & 7)))) : 1; + uint32_t dst_addr = get_addr(voodoo, dst_x * 3, dst_y, 0, 0); //(voodoo->banshee_blt.dstBaseAddr + dst_x*3 + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t src = *(uint32_t *) &src_p[src_x * 3]; + uint32_t dest = *(uint32_t *) &voodoo->vram[dst_addr]; + uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? ((pattern_mask & (1 << (7 - (pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : colorPattern[(pat_x & 7) + (pat_y & 7) * 8]; - if (x >= clip->x_min && x < clip->x_max && pattern_trans) - PLOT(voodoo, x, y, pat_x, pat_y, pattern_mask, rop, voodoo->banshee_blt.colorFore, COLORKEY_32); + *(uint32_t *) &voodoo->vram[dst_addr] = (MIX(voodoo, dest, src, pattern, COLORKEY_32, COLORKEY_32) & 0xffffff) | (*(uint32_t *) &voodoo->vram[dst_addr] & 0xff000000); + // bansheeblt_log("%i,%i : sdp=%02x,%02x,%02x res=%02x\n", voodoo->banshee_blt.cur_x, voodoo->banshee_blt.cur_y, src, dest, pattern, voodoo->vram[dst_addr]); + voodoo->changedvram[dst_addr >> 12] = changeframecount; + break; + } + case DST_FORMAT_COL_32_BPP: + { + uint32_t dst_addr = get_addr(voodoo, dst_x * 4, dst_y, 0, 0); //(voodoo->banshee_blt.dstBaseAddr + dst_x*4 + dst_y*voodoo->banshee_blt.dst_stride) & voodoo->fb_mask; + uint32_t src = *(uint32_t *) &src_p[src_x * 4]; + uint32_t dest = *(uint32_t *) &voodoo->vram[dst_addr]; + uint32_t pattern = (voodoo->banshee_blt.command & COMMAND_PATTERN_MONO) ? ((pattern_mask & (1 << (7 - (pat_x & 7)))) ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack) : colorPattern[(pat_x & 7) + (pat_y & 7) * 8]; + + *(uint32_t *) &voodoo->vram[dst_addr] = MIX(voodoo, dest, src, pattern, COLORKEY_32, COLORKEY_32); + // bansheeblt_log("%i,%i : sdp=%02x,%02x,%02x res=%02x\n", voodoo->banshee_blt.cur_x, voodoo->banshee_blt.cur_y, src, dest, pattern, voodoo->vram[dst_addr]); + voodoo->changedvram[dst_addr >> 12] = changeframecount; + break; } } + } - voodoo->banshee_blt.error[0] -= voodoo->banshee_blt.dx[0]; - while (voodoo->banshee_blt.error[0] < 0) - { - voodoo->banshee_blt.error[0] += voodoo->banshee_blt.dy[0]; - voodoo->banshee_blt.lx_cur += voodoo->banshee_blt.x_inc[0]; - } - voodoo->banshee_blt.error[1] -= voodoo->banshee_blt.dx[1]; - while (voodoo->banshee_blt.error[1] < 0) - { - voodoo->banshee_blt.error[1] += voodoo->banshee_blt.dy[1]; - voodoo->banshee_blt.rx_cur += voodoo->banshee_blt.x_inc[1]; - } + error_x -= voodoo->banshee_blt.srcSizeX; + while (error_x < 0) { + error_x += voodoo->banshee_blt.dstSizeX; + src_x++; + } + dst_x++; + pat_x++; } + } - if (voodoo->banshee_blt.ry[1] == voodoo->banshee_blt.ly[1]) - { - voodoo->banshee_blt.lx[0] = voodoo->banshee_blt.lx[1]; - voodoo->banshee_blt.ly[0] = voodoo->banshee_blt.ly[1]; - voodoo->banshee_blt.rx[0] = voodoo->banshee_blt.rx[1]; - voodoo->banshee_blt.ry[0] = voodoo->banshee_blt.ry[1]; - } - else if (voodoo->banshee_blt.ry[1] >= voodoo->banshee_blt.ly[1]) - { - voodoo->banshee_blt.lx[0] = voodoo->banshee_blt.lx[1]; - voodoo->banshee_blt.ly[0] = voodoo->banshee_blt.ly[1]; - } - else - { - voodoo->banshee_blt.rx[0] = voodoo->banshee_blt.rx[1]; - voodoo->banshee_blt.ry[0] = voodoo->banshee_blt.ry[1]; - } + voodoo->banshee_blt.bres_error_0 -= voodoo->banshee_blt.srcSizeY; + while (voodoo->banshee_blt.bres_error_0 < 0) { + voodoo->banshee_blt.bres_error_0 += voodoo->banshee_blt.dstSizeY; + if (src_y) + (*src_y) += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; + } + voodoo->banshee_blt.dstY += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; + // pat_y += (voodoo->banshee_blt.command & COMMAND_DY) ? -1 : 1; } -static void banshee_do_2d_blit(voodoo_t *voodoo, int count, uint32_t data) +static void +banshee_do_screen_to_screen_stretch_blt(voodoo_t *voodoo) { - switch (voodoo->banshee_blt.command & COMMAND_CMD_MASK) - { - case COMMAND_CMD_NOP: - break; + // bansheeblt_log("screen_to_screen: %08x %08x %08x\n", voodoo->banshee_blt.srcFormat, voodoo->banshee_blt.src_stride, voodoo->banshee_blt.src_stride_dest); + // return; + for (voodoo->banshee_blt.cur_y = 0; voodoo->banshee_blt.cur_y < voodoo->banshee_blt.dstSizeY; voodoo->banshee_blt.cur_y++) { + uint32_t src_addr = get_addr(voodoo, 0, voodoo->banshee_blt.srcY, 1, voodoo->banshee_blt.src_stride_src); //(voodoo->banshee_blt.srcBaseAddr + voodoo->banshee_blt.srcY*voodoo->banshee_blt.src_stride_src) & voodoo->fb_mask; + // bansheeblt_log("scale_blit %i %08x %08x\n", voodoo->banshee_blt.cur_y, src_addr, voodoo->banshee_blt.command); + // if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == SRC_FORMAT_COL_1_BPP) + // bansheeblt_log(" srcY=%i src_addr=%08x\n", voodoo->banshee_blt.srcY, src_addr); + do_screen_to_screen_stretch_line(voodoo, &voodoo->vram[src_addr], voodoo->banshee_blt.srcX, &voodoo->banshee_blt.srcY); + } + end_command(voodoo); +} +static void +banshee_do_host_to_screen_stretch_blt(voodoo_t *voodoo, int count, uint32_t data) +{ + // if (voodoo->banshee_blt.dstBaseAddr == 0xee5194) + // bansheeblt_log("banshee_do_host_to_screen_blt: data=%08x host_data_count=%i src_stride_dest=%i host_data_size_dest=%i\n", data, voodoo->banshee_blt.host_data_count, voodoo->banshee_blt.src_stride_dest, voodoo->banshee_blt.host_data_size_dest); + + if (voodoo->banshee_blt.srcFormat & SRC_FORMAT_BYTE_SWIZZLE) + data = (data >> 24) | ((data >> 8) & 0xff00) | ((data << 8) & 0xff0000) | (data << 24); + if (voodoo->banshee_blt.srcFormat & SRC_FORMAT_WORD_SWIZZLE) + data = (data >> 16) | (data << 16); + + if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_PACKING_MASK) == SRC_FORMAT_PACKING_STRIDE) { + int last_byte = (voodoo->banshee_blt.srcX & 3) + voodoo->banshee_blt.host_data_size_src; + + *(uint32_t *) &voodoo->banshee_blt.host_data[voodoo->banshee_blt.host_data_count] = data; + voodoo->banshee_blt.host_data_count += 4; + if (voodoo->banshee_blt.host_data_count >= last_byte) { + // bansheeblt_log(" %i %i srcX=%i srcFormat=%08x\n", voodoo->banshee_blt.cur_y, voodoo->banshee_blt.dstSizeY, voodoo->banshee_blt.srcX); + if (voodoo->banshee_blt.cur_y < voodoo->banshee_blt.dstSizeY) { + if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == SRC_FORMAT_COL_1_BPP) + do_screen_to_screen_stretch_line(voodoo, &voodoo->banshee_blt.host_data[(voodoo->banshee_blt.srcX >> 3) & 3], voodoo->banshee_blt.srcX & 7, NULL); + else + do_screen_to_screen_stretch_line(voodoo, &voodoo->banshee_blt.host_data[voodoo->banshee_blt.srcX & 3], 0, NULL); + voodoo->banshee_blt.cur_y++; + if (voodoo->banshee_blt.cur_y == voodoo->banshee_blt.dstSizeY) + end_command(voodoo); + } + + if ((voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) == SRC_FORMAT_COL_1_BPP) + voodoo->banshee_blt.srcX += (voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK) << 3; + else + voodoo->banshee_blt.srcX += (voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK); + + voodoo->banshee_blt.host_data_count = 0; + } + } else { + *(uint32_t *) &voodoo->banshee_blt.host_data[voodoo->banshee_blt.host_data_count] = data; + voodoo->banshee_blt.host_data_count += 4; + while (voodoo->banshee_blt.host_data_count >= voodoo->banshee_blt.src_stride_src) { + voodoo->banshee_blt.host_data_count -= voodoo->banshee_blt.src_stride_src; + + // bansheeblt_log(" %i %i\n", voodoo->banshee_blt.cur_y, voodoo->banshee_blt.dstSizeY); + if (voodoo->banshee_blt.cur_y < voodoo->banshee_blt.dstSizeY) { + do_screen_to_screen_stretch_line(voodoo, voodoo->banshee_blt.host_data, 0, NULL); + voodoo->banshee_blt.cur_y++; + if (voodoo->banshee_blt.cur_y == voodoo->banshee_blt.dstSizeY) + end_command(voodoo); + } + + if (voodoo->banshee_blt.host_data_count) { + // bansheeblt_log(" remaining=%i\n", voodoo->banshee_blt.host_data_count); + *(uint32_t *) &voodoo->banshee_blt.host_data[0] = data >> (4 - voodoo->banshee_blt.host_data_count) * 8; + } + } + } +} + +static void +step_line(voodoo_t *voodoo) +{ + if (voodoo->banshee_blt.line_pix_pos == voodoo->banshee_blt.line_rep_cnt) { + voodoo->banshee_blt.line_pix_pos = 0; + if (voodoo->banshee_blt.line_bit_pos == voodoo->banshee_blt.line_bit_mask_size) + voodoo->banshee_blt.line_bit_pos = 0; + else + voodoo->banshee_blt.line_bit_pos++; + } else + voodoo->banshee_blt.line_pix_pos++; +} + +static void +banshee_do_line(voodoo_t *voodoo, int draw_last_pixel) +{ + clip_t *clip = &voodoo->banshee_blt.clip[(voodoo->banshee_blt.command & COMMAND_CLIP_SEL) ? 1 : 0]; + uint8_t rop = voodoo->banshee_blt.command >> 24; + int dx = ABS(voodoo->banshee_blt.dstX - voodoo->banshee_blt.srcX); + int dy = ABS(voodoo->banshee_blt.dstY - voodoo->banshee_blt.srcY); + int x_inc = (voodoo->banshee_blt.dstX > voodoo->banshee_blt.srcX) ? 1 : -1; + int y_inc = (voodoo->banshee_blt.dstY > voodoo->banshee_blt.srcY) ? 1 : -1; + int x = voodoo->banshee_blt.srcX; + int y = voodoo->banshee_blt.srcY; + int error; + uint32_t stipple = (voodoo->banshee_blt.command & COMMAND_STIPPLE_LINE) ? voodoo->banshee_blt.lineStipple : ~0; + + if (dx > dy) /*X major*/ + { + error = dx / 2; + while (x != voodoo->banshee_blt.dstX) { + int mask = stipple & (1 << voodoo->banshee_blt.line_bit_pos); + int pattern_trans = (voodoo->banshee_blt.command & COMMAND_TRANS_MONO) ? mask : 1; + + if (y >= clip->y_min && y < clip->y_max && x >= clip->x_min && x < clip->x_max && pattern_trans) + PLOT_LINE(voodoo, x, y, rop, mask ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack, COLORKEY_32); + + error -= dy; + if (error < 0) { + error += dx; + y += y_inc; + } + x += x_inc; + step_line(voodoo); + } + } else /*Y major*/ + { + error = dy / 2; + while (y != voodoo->banshee_blt.dstY) { + int mask = stipple & (1 << voodoo->banshee_blt.line_bit_pos); + int pattern_trans = (voodoo->banshee_blt.command & COMMAND_TRANS_MONO) ? mask : 1; + + if (y >= clip->y_min && y < clip->y_max && x >= clip->x_min && x < clip->x_max && pattern_trans) + PLOT_LINE(voodoo, x, y, rop, mask ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack, COLORKEY_32); + + error -= dx; + if (error < 0) { + error += dy; + x += x_inc; + } + y += y_inc; + step_line(voodoo); + } + } + + if (draw_last_pixel) { + int mask = stipple & (1 << voodoo->banshee_blt.line_bit_pos); + int pattern_trans = (voodoo->banshee_blt.command & COMMAND_TRANS_MONO) ? mask : 1; + + if (y >= clip->y_min && y < clip->y_max && x >= clip->x_min && x < clip->x_max && pattern_trans) + PLOT_LINE(voodoo, x, y, rop, mask ? voodoo->banshee_blt.colorFore : voodoo->banshee_blt.colorBack, COLORKEY_32); + } + + voodoo->banshee_blt.srcXY = (x & 0xffff) | (y << 16); + voodoo->banshee_blt.srcX = x; + voodoo->banshee_blt.srcY = y; +} + +static void +banshee_polyfill_start(voodoo_t *voodoo) +{ + voodoo->banshee_blt.lx[0] = voodoo->banshee_blt.srcX; + voodoo->banshee_blt.ly[0] = voodoo->banshee_blt.srcY; + voodoo->banshee_blt.rx[0] = voodoo->banshee_blt.dstX; + voodoo->banshee_blt.ry[0] = voodoo->banshee_blt.dstY; + voodoo->banshee_blt.lx[1] = voodoo->banshee_blt.srcX; + voodoo->banshee_blt.ly[1] = voodoo->banshee_blt.srcY; + voodoo->banshee_blt.rx[1] = voodoo->banshee_blt.dstX; + voodoo->banshee_blt.ry[1] = voodoo->banshee_blt.dstY; + voodoo->banshee_blt.lx_cur = voodoo->banshee_blt.srcX; + voodoo->banshee_blt.rx_cur = voodoo->banshee_blt.dstX; +} + +static void +banshee_polyfill_continue(voodoo_t *voodoo, uint32_t data) +{ + clip_t *clip = &voodoo->banshee_blt.clip[(voodoo->banshee_blt.command & COMMAND_CLIP_SEL) ? 1 : 0]; + uint8_t *pattern_mono = (uint8_t *) voodoo->banshee_blt.colorPattern; + int use_pattern_trans = (voodoo->banshee_blt.command & (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO)) == (COMMAND_PATTERN_MONO | COMMAND_TRANS_MONO); + uint8_t rop = voodoo->banshee_blt.command >> 24; + int y = MAX(voodoo->banshee_blt.ly[0], voodoo->banshee_blt.ry[0]); + int y_end; + + // bansheeblt_log("Polyfill : data %08x\n", data); + + /*if r1.y>=l1.y, next vertex is left*/ + if (voodoo->banshee_blt.ry[1] >= voodoo->banshee_blt.ly[1]) { + voodoo->banshee_blt.lx[1] = ((int32_t) (data << 19)) >> 19; + voodoo->banshee_blt.ly[1] = ((int32_t) (data << 3)) >> 19; + voodoo->banshee_blt.dx[0] = ABS(voodoo->banshee_blt.lx[1] - voodoo->banshee_blt.lx[0]); + voodoo->banshee_blt.dy[0] = ABS(voodoo->banshee_blt.ly[1] - voodoo->banshee_blt.ly[0]); + voodoo->banshee_blt.x_inc[0] = (voodoo->banshee_blt.lx[1] > voodoo->banshee_blt.lx[0]) ? 1 : -1; + voodoo->banshee_blt.error[0] = voodoo->banshee_blt.dy[0] / 2; + } else { + voodoo->banshee_blt.rx[1] = ((int32_t) (data << 19)) >> 19; + voodoo->banshee_blt.ry[1] = ((int32_t) (data << 3)) >> 19; + voodoo->banshee_blt.dx[1] = ABS(voodoo->banshee_blt.rx[1] - voodoo->banshee_blt.rx[0]); + voodoo->banshee_blt.dy[1] = ABS(voodoo->banshee_blt.ry[1] - voodoo->banshee_blt.ry[0]); + voodoo->banshee_blt.x_inc[1] = (voodoo->banshee_blt.rx[1] > voodoo->banshee_blt.rx[0]) ? 1 : -1; + voodoo->banshee_blt.error[1] = voodoo->banshee_blt.dy[1] / 2; + } + + /* bansheeblt_log(" verts now : %03i,%03i %03i,%03i\n", voodoo->banshee_blt.lx[0], voodoo->banshee_blt.ly[0], voodoo->banshee_blt.rx[0], voodoo->banshee_blt.ry[0]); + bansheeblt_log(" %03i,%03i %03i,%03i\n", voodoo->banshee_blt.lx[1], voodoo->banshee_blt.ly[1], voodoo->banshee_blt.rx[1], voodoo->banshee_blt.ry[1]); + bansheeblt_log(" left dx=%i dy=%i x_inc=%i error=%i\n", voodoo->banshee_blt.dx[0],voodoo->banshee_blt.dy[0],voodoo->banshee_blt.x_inc[0],voodoo->banshee_blt.error[0]); + bansheeblt_log(" right dx=%i dy=%i x_inc=%i error=%i\n", voodoo->banshee_blt.dx[1],voodoo->banshee_blt.dy[1],voodoo->banshee_blt.x_inc[1],voodoo->banshee_blt.error[1]);*/ + y_end = MIN(voodoo->banshee_blt.ly[1], voodoo->banshee_blt.ry[1]); + // bansheeblt_log("Polyfill : draw spans from %i-%i\n", y, y_end); + for (; y < y_end; y++) { + // bansheeblt_log(" %i: %i %i\n", y, voodoo->banshee_blt.lx_cur, voodoo->banshee_blt.rx_cur); + /*Draw span from lx_cur to rx_cur*/ + if (y >= clip->y_min && y < clip->y_max) { + int pat_y = (voodoo->banshee_blt.commandExtra & CMDEXTRA_FORCE_PAT_ROW0) ? 0 : (voodoo->banshee_blt.patoff_y + y); + uint8_t pattern_mask = pattern_mono[pat_y & 7]; + int x; + + for (x = voodoo->banshee_blt.lx_cur; x < voodoo->banshee_blt.rx_cur; x++) { + int pat_x = voodoo->banshee_blt.patoff_x + x; + int pattern_trans = use_pattern_trans ? (pattern_mask & (1 << (7 - (pat_x & 7)))) : 1; + + if (x >= clip->x_min && x < clip->x_max && pattern_trans) + PLOT(voodoo, x, y, pat_x, pat_y, pattern_mask, rop, voodoo->banshee_blt.colorFore, COLORKEY_32); + } + } + + voodoo->banshee_blt.error[0] -= voodoo->banshee_blt.dx[0]; + while (voodoo->banshee_blt.error[0] < 0) { + voodoo->banshee_blt.error[0] += voodoo->banshee_blt.dy[0]; + voodoo->banshee_blt.lx_cur += voodoo->banshee_blt.x_inc[0]; + } + voodoo->banshee_blt.error[1] -= voodoo->banshee_blt.dx[1]; + while (voodoo->banshee_blt.error[1] < 0) { + voodoo->banshee_blt.error[1] += voodoo->banshee_blt.dy[1]; + voodoo->banshee_blt.rx_cur += voodoo->banshee_blt.x_inc[1]; + } + } + + if (voodoo->banshee_blt.ry[1] == voodoo->banshee_blt.ly[1]) { + voodoo->banshee_blt.lx[0] = voodoo->banshee_blt.lx[1]; + voodoo->banshee_blt.ly[0] = voodoo->banshee_blt.ly[1]; + voodoo->banshee_blt.rx[0] = voodoo->banshee_blt.rx[1]; + voodoo->banshee_blt.ry[0] = voodoo->banshee_blt.ry[1]; + } else if (voodoo->banshee_blt.ry[1] >= voodoo->banshee_blt.ly[1]) { + voodoo->banshee_blt.lx[0] = voodoo->banshee_blt.lx[1]; + voodoo->banshee_blt.ly[0] = voodoo->banshee_blt.ly[1]; + } else { + voodoo->banshee_blt.rx[0] = voodoo->banshee_blt.rx[1]; + voodoo->banshee_blt.ry[0] = voodoo->banshee_blt.ry[1]; + } +} + +static void +banshee_do_2d_blit(voodoo_t *voodoo, int count, uint32_t data) +{ + switch (voodoo->banshee_blt.command & COMMAND_CMD_MASK) { + case COMMAND_CMD_NOP: + break; + + case COMMAND_CMD_SCREEN_TO_SCREEN_BLT: + banshee_do_screen_to_screen_blt(voodoo); + break; + + case COMMAND_CMD_SCREEN_TO_SCREEN_STRETCH_BLT: + banshee_do_screen_to_screen_stretch_blt(voodoo); + break; + + case COMMAND_CMD_HOST_TO_SCREEN_BLT: + banshee_do_host_to_screen_blt(voodoo, count, data); + break; + + case COMMAND_CMD_HOST_TO_SCREEN_STRETCH_BLT: + banshee_do_host_to_screen_stretch_blt(voodoo, count, data); + break; + + case COMMAND_CMD_RECTFILL: + banshee_do_rectfill(voodoo); + break; + + case COMMAND_CMD_LINE: + banshee_do_line(voodoo, 1); + break; + + case COMMAND_CMD_POLYLINE: + banshee_do_line(voodoo, 0); + break; + + default: + fatal("banshee_do_2d_blit: unknown command=%08x\n", voodoo->banshee_blt.command); + } +} + +void +voodoo_2d_reg_writel(voodoo_t *voodoo, uint32_t addr, uint32_t val) +{ + // /*if ((addr & 0x1fc) != 0x80) */bansheeblt_log("2D reg write %03x %08x\n", addr & 0x1fc, val); + switch (addr & 0x1fc) { + case 0x08: + voodoo->banshee_blt.clip0Min = val; + voodoo->banshee_blt.clip[0].x_min = val & 0xfff; + voodoo->banshee_blt.clip[0].y_min = (val >> 16) & 0xfff; + break; + case 0x0c: + voodoo->banshee_blt.clip0Max = val; + voodoo->banshee_blt.clip[0].x_max = val & 0xfff; + voodoo->banshee_blt.clip[0].y_max = (val >> 16) & 0xfff; + break; + case 0x10: + voodoo->banshee_blt.dstBaseAddr = val & 0xffffff; + voodoo->banshee_blt.dstBaseAddr_tiled = val & 0x80000000; + if (voodoo->banshee_blt.dstBaseAddr_tiled) + voodoo->banshee_blt.dst_stride = (voodoo->banshee_blt.dstFormat & DST_FORMAT_STRIDE_MASK) * 128 * 32; + else + voodoo->banshee_blt.dst_stride = voodoo->banshee_blt.dstFormat & DST_FORMAT_STRIDE_MASK; + // bansheeblt_log("dstBaseAddr=%08x\n", val); + break; + case 0x14: + voodoo->banshee_blt.dstFormat = val; + if (voodoo->banshee_blt.dstBaseAddr_tiled) + voodoo->banshee_blt.dst_stride = (voodoo->banshee_blt.dstFormat & DST_FORMAT_STRIDE_MASK) * 128 * 32; + else + voodoo->banshee_blt.dst_stride = voodoo->banshee_blt.dstFormat & DST_FORMAT_STRIDE_MASK; + // bansheeblt_log("dstFormat=%08x\n", val); + break; + + case 0x18: + voodoo->banshee_blt.srcColorkeyMin = val & 0xffffff; + break; + case 0x1c: + voodoo->banshee_blt.srcColorkeyMax = val & 0xffffff; + break; + case 0x20: + voodoo->banshee_blt.dstColorkeyMin = val & 0xffffff; + break; + case 0x24: + voodoo->banshee_blt.dstColorkeyMax = val & 0xffffff; + break; + + case 0x28: + voodoo->banshee_blt.bresError0 = val; + voodoo->banshee_blt.bres_error_0 = val & 0xffff; + break; + case 0x2c: + voodoo->banshee_blt.bresError1 = val; + voodoo->banshee_blt.bres_error_1 = val & 0xffff; + break; + + case 0x30: + voodoo->banshee_blt.rop = val; + voodoo->banshee_blt.rops[1] = val & 0xff; + voodoo->banshee_blt.rops[2] = (val >> 8) & 0xff; + voodoo->banshee_blt.rops[3] = (val >> 16) & 0xff; + // bansheeblt_log("rop=%08x\n", val); + break; + case 0x34: + voodoo->banshee_blt.srcBaseAddr = val & 0xffffff; + voodoo->banshee_blt.srcBaseAddr_tiled = val & 0x80000000; + if (voodoo->banshee_blt.srcBaseAddr_tiled) + voodoo->banshee_blt.src_stride = (voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK) * 128 * 32; + else + voodoo->banshee_blt.src_stride = voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK; + update_src_stride(voodoo); + // bansheeblt_log("srcBaseAddr=%08x\n", val); + break; + case 0x38: + voodoo->banshee_blt.commandExtra = val; + // bansheeblt_log("commandExtra=%08x\n", val); + break; + case 0x3c: + voodoo->banshee_blt.lineStipple = val; + break; + case 0x40: + voodoo->banshee_blt.lineStyle = val; + voodoo->banshee_blt.line_rep_cnt = val & 0xff; + voodoo->banshee_blt.line_bit_mask_size = (val >> 8) & 0x1f; + voodoo->banshee_blt.line_pix_pos = (val >> 16) & 0xff; + voodoo->banshee_blt.line_bit_pos = (val >> 24) & 0x1f; + break; + case 0x44: + voodoo->banshee_blt.colorPattern[0] = val; + // bansheeblt_log("colorPattern0=%08x\n", val); + voodoo->banshee_blt.colorPattern24[0] = val & 0xffffff; + voodoo->banshee_blt.colorPattern24[1] = (voodoo->banshee_blt.colorPattern24[1] & 0xffff00) | (val >> 24); + voodoo->banshee_blt.colorPattern16[0] = val & 0xffff; + voodoo->banshee_blt.colorPattern16[1] = (val >> 16) & 0xffff; + voodoo->banshee_blt.colorPattern8[0] = val & 0xff; + voodoo->banshee_blt.colorPattern8[1] = (val >> 8) & 0xff; + voodoo->banshee_blt.colorPattern8[2] = (val >> 16) & 0xff; + voodoo->banshee_blt.colorPattern8[3] = (val >> 24) & 0xff; + break; + case 0x48: + voodoo->banshee_blt.colorPattern[1] = val; + // bansheeblt_log("colorPattern1=%08x\n", val); + voodoo->banshee_blt.colorPattern24[1] = (voodoo->banshee_blt.colorPattern24[1] & 0xff) | ((val & 0xffff) << 8); + voodoo->banshee_blt.colorPattern24[2] = (voodoo->banshee_blt.colorPattern24[2] & 0xff0000) | (val >> 16); + voodoo->banshee_blt.colorPattern16[2] = val & 0xffff; + voodoo->banshee_blt.colorPattern16[3] = (val >> 16) & 0xffff; + voodoo->banshee_blt.colorPattern8[4] = val & 0xff; + voodoo->banshee_blt.colorPattern8[5] = (val >> 8) & 0xff; + voodoo->banshee_blt.colorPattern8[6] = (val >> 16) & 0xff; + voodoo->banshee_blt.colorPattern8[7] = (val >> 24) & 0xff; + break; + case 0x4c: + voodoo->banshee_blt.clip1Min = val; + voodoo->banshee_blt.clip[1].x_min = val & 0xfff; + voodoo->banshee_blt.clip[1].y_min = (val >> 16) & 0xfff; + break; + case 0x50: + voodoo->banshee_blt.clip1Max = val; + voodoo->banshee_blt.clip[1].x_max = val & 0xfff; + voodoo->banshee_blt.clip[1].y_max = (val >> 16) & 0xfff; + break; + case 0x54: + voodoo->banshee_blt.srcFormat = val; + if (voodoo->banshee_blt.srcBaseAddr_tiled) + voodoo->banshee_blt.src_stride = (voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK) * 128 * 32; + else + voodoo->banshee_blt.src_stride = voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK; + update_src_stride(voodoo); + switch (voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) { + case SRC_FORMAT_COL_1_BPP: + voodoo->banshee_blt.src_bpp = 1; + break; + case SRC_FORMAT_COL_8_BPP: + voodoo->banshee_blt.src_bpp = 8; + break; + case SRC_FORMAT_COL_24_BPP: + voodoo->banshee_blt.src_bpp = 24; + break; + case SRC_FORMAT_COL_32_BPP: + voodoo->banshee_blt.src_bpp = 32; + break; + case SRC_FORMAT_COL_16_BPP: + default: + voodoo->banshee_blt.src_bpp = 16; + break; + } + // bansheeblt_log("srcFormat=%08x\n", val); + break; + case 0x58: + voodoo->banshee_blt.srcSize = val; + voodoo->banshee_blt.srcSizeX = voodoo->banshee_blt.srcSize & 0x1fff; + voodoo->banshee_blt.srcSizeY = (voodoo->banshee_blt.srcSize >> 16) & 0x1fff; + update_src_stride(voodoo); + // bansheeblt_log("srcSize=%08x\n", val); + break; + case 0x5c: + voodoo->banshee_blt.srcXY = val; + voodoo->banshee_blt.srcX = ((int32_t) (val << 19)) >> 19; + voodoo->banshee_blt.srcY = ((int32_t) (val << 3)) >> 19; + update_src_stride(voodoo); + // bansheeblt_log("srcXY=%08x\n", val); + break; + case 0x60: + voodoo->banshee_blt.colorBack = val; + break; + case 0x64: + voodoo->banshee_blt.colorFore = val; + break; + case 0x68: + voodoo->banshee_blt.dstSize = val; + voodoo->banshee_blt.dstSizeX = voodoo->banshee_blt.dstSize & 0x1fff; + voodoo->banshee_blt.dstSizeY = (voodoo->banshee_blt.dstSize >> 16) & 0x1fff; + update_src_stride(voodoo); + // bansheeblt_log("dstSize=%08x\n", val); + break; + case 0x6c: + voodoo->banshee_blt.dstXY = val; + voodoo->banshee_blt.dstX = ((int32_t) (val << 19)) >> 19; + voodoo->banshee_blt.dstY = ((int32_t) (val << 3)) >> 19; + // bansheeblt_log("dstXY=%08x\n", val); + break; + case 0x70: + voodoo_wait_for_render_thread_idle(voodoo); + voodoo->banshee_blt.command = val; + voodoo->banshee_blt.rops[0] = val >> 24; + // bansheeblt_log("command=%x %08x\n", voodoo->banshee_blt.command & COMMAND_CMD_MASK, val); + voodoo->banshee_blt.patoff_x = (val & COMMAND_PATOFF_X_MASK) >> COMMAND_PATOFF_X_SHIFT; + voodoo->banshee_blt.patoff_y = (val & COMMAND_PATOFF_Y_MASK) >> COMMAND_PATOFF_Y_SHIFT; + voodoo->banshee_blt.cur_x = 0; + voodoo->banshee_blt.cur_y = 0; + voodoo->banshee_blt.dstX = ((int32_t) (voodoo->banshee_blt.dstXY << 19)) >> 19; + voodoo->banshee_blt.dstY = ((int32_t) (voodoo->banshee_blt.dstXY << 3)) >> 19; + voodoo->banshee_blt.srcX = ((int32_t) (voodoo->banshee_blt.srcXY << 19)) >> 19; + voodoo->banshee_blt.srcY = ((int32_t) (voodoo->banshee_blt.srcXY << 3)) >> 19; + voodoo->banshee_blt.old_srcX = voodoo->banshee_blt.srcX; + voodoo->banshee_blt.host_data_remainder = 0; + voodoo->banshee_blt.host_data_count = 0; + switch (voodoo->banshee_blt.command & COMMAND_CMD_MASK) { + /* case COMMAND_CMD_SCREEN_TO_SCREEN_STRETCH_BLT: + if (voodoo->banshee_blt.bresError0 & BRES_ERROR_USE) + voodoo->banshee_blt.bres_error_0 = (int32_t)(int16_t)(voodoo->banshee_blt.bresError0 & BRES_ERROR_MASK); + else + voodoo->banshee_blt.bres_error_0 = voodoo->banshee_blt.dstSizeY / 2; + if (voodoo->banshee_blt.bresError1 & BRES_ERROR_USE) + voodoo->banshee_blt.bres_error_1 = (int32_t)(int16_t)(voodoo->banshee_blt.bresError1 & BRES_ERROR_MASK); + else + voodoo->banshee_blt.bres_error_1 = voodoo->banshee_blt.dstSizeX / 2; + + if (val & COMMAND_INITIATE) + banshee_do_2d_blit(voodoo, -1, 0); + break;*/ + + case COMMAND_CMD_POLYFILL: + if (val & COMMAND_INITIATE) { + voodoo->banshee_blt.dstXY = voodoo->banshee_blt.srcXY; + voodoo->banshee_blt.dstX = voodoo->banshee_blt.srcX; + voodoo->banshee_blt.dstY = voodoo->banshee_blt.srcY; + } + banshee_polyfill_start(voodoo); + break; + + default: + if (val & COMMAND_INITIATE) { + banshee_do_2d_blit(voodoo, -1, 0); + // fatal("Initiate command!\n"); + } + break; + } + break; + + case 0x80: + case 0x84: + case 0x88: + case 0x8c: + case 0x90: + case 0x94: + case 0x98: + case 0x9c: + case 0xa0: + case 0xa4: + case 0xa8: + case 0xac: + case 0xb0: + case 0xb4: + case 0xb8: + case 0xbc: + case 0xc0: + case 0xc4: + case 0xc8: + case 0xcc: + case 0xd0: + case 0xd4: + case 0xd8: + case 0xdc: + case 0xe0: + case 0xe4: + case 0xe8: + case 0xec: + case 0xf0: + case 0xf4: + case 0xf8: + case 0xfc: + // bansheeblt_log("launch %08x %08x %08x %08x\n", voodoo->banshee_blt.command, voodoo->banshee_blt.commandExtra, voodoo->banshee_blt.srcColorkeyMin, voodoo->banshee_blt.srcColorkeyMax); + switch (voodoo->banshee_blt.command & COMMAND_CMD_MASK) { case COMMAND_CMD_SCREEN_TO_SCREEN_BLT: - banshee_do_screen_to_screen_blt(voodoo); - break; - - case COMMAND_CMD_SCREEN_TO_SCREEN_STRETCH_BLT: - banshee_do_screen_to_screen_stretch_blt(voodoo); - break; + voodoo->banshee_blt.srcXY = val; + voodoo->banshee_blt.srcX = ((int32_t) (val << 19)) >> 19; + voodoo->banshee_blt.srcY = ((int32_t) (val << 3)) >> 19; + banshee_do_screen_to_screen_blt(voodoo); + break; case COMMAND_CMD_HOST_TO_SCREEN_BLT: - banshee_do_host_to_screen_blt(voodoo, count, data); - break; + banshee_do_2d_blit(voodoo, 32, val); + break; case COMMAND_CMD_HOST_TO_SCREEN_STRETCH_BLT: - banshee_do_host_to_screen_stretch_blt(voodoo, count, data); - break; + banshee_do_2d_blit(voodoo, 32, val); + break; case COMMAND_CMD_RECTFILL: - banshee_do_rectfill(voodoo); - break; + voodoo->banshee_blt.dstXY = val; + voodoo->banshee_blt.dstX = ((int32_t) (val << 19)) >> 19; + voodoo->banshee_blt.dstY = ((int32_t) (val << 3)) >> 19; + banshee_do_rectfill(voodoo); + break; case COMMAND_CMD_LINE: - banshee_do_line(voodoo, 1); - break; + voodoo->banshee_blt.dstXY = val; + voodoo->banshee_blt.dstX = ((int32_t) (val << 19)) >> 19; + voodoo->banshee_blt.dstY = ((int32_t) (val << 3)) >> 19; + banshee_do_line(voodoo, 1); + break; case COMMAND_CMD_POLYLINE: - banshee_do_line(voodoo, 0); - break; + voodoo->banshee_blt.dstXY = val; + voodoo->banshee_blt.dstX = ((int32_t) (val << 19)) >> 19; + voodoo->banshee_blt.dstY = ((int32_t) (val << 3)) >> 19; + banshee_do_line(voodoo, 0); + break; + + case COMMAND_CMD_POLYFILL: + banshee_polyfill_continue(voodoo, val); + break; default: - fatal("banshee_do_2d_blit: unknown command=%08x\n", voodoo->banshee_blt.command); - } -} - -void voodoo_2d_reg_writel(voodoo_t *voodoo, uint32_t addr, uint32_t val) -{ -// /*if ((addr & 0x1fc) != 0x80) */bansheeblt_log("2D reg write %03x %08x\n", addr & 0x1fc, val); - switch (addr & 0x1fc) - { - case 0x08: - voodoo->banshee_blt.clip0Min = val; - voodoo->banshee_blt.clip[0].x_min = val & 0xfff; - voodoo->banshee_blt.clip[0].y_min = (val >> 16) & 0xfff; - break; - case 0x0c: - voodoo->banshee_blt.clip0Max = val; - voodoo->banshee_blt.clip[0].x_max = val & 0xfff; - voodoo->banshee_blt.clip[0].y_max = (val >> 16) & 0xfff; - break; - case 0x10: - voodoo->banshee_blt.dstBaseAddr = val & 0xffffff; - voodoo->banshee_blt.dstBaseAddr_tiled = val & 0x80000000; - if (voodoo->banshee_blt.dstBaseAddr_tiled) - voodoo->banshee_blt.dst_stride = (voodoo->banshee_blt.dstFormat & DST_FORMAT_STRIDE_MASK) * 128*32; - else - voodoo->banshee_blt.dst_stride = voodoo->banshee_blt.dstFormat & DST_FORMAT_STRIDE_MASK; -// bansheeblt_log("dstBaseAddr=%08x\n", val); - break; - case 0x14: - voodoo->banshee_blt.dstFormat = val; - if (voodoo->banshee_blt.dstBaseAddr_tiled) - voodoo->banshee_blt.dst_stride = (voodoo->banshee_blt.dstFormat & DST_FORMAT_STRIDE_MASK) * 128*32; - else - voodoo->banshee_blt.dst_stride = voodoo->banshee_blt.dstFormat & DST_FORMAT_STRIDE_MASK; -// bansheeblt_log("dstFormat=%08x\n", val); - break; - - case 0x18: - voodoo->banshee_blt.srcColorkeyMin = val & 0xffffff; - break; - case 0x1c: - voodoo->banshee_blt.srcColorkeyMax = val & 0xffffff; - break; - case 0x20: - voodoo->banshee_blt.dstColorkeyMin = val & 0xffffff; - break; - case 0x24: - voodoo->banshee_blt.dstColorkeyMax = val & 0xffffff; - break; - - case 0x28: - voodoo->banshee_blt.bresError0 = val; - voodoo->banshee_blt.bres_error_0 = val & 0xffff; - break; - case 0x2c: - voodoo->banshee_blt.bresError1 = val; - voodoo->banshee_blt.bres_error_1 = val & 0xffff; - break; - - case 0x30: - voodoo->banshee_blt.rop = val; - voodoo->banshee_blt.rops[1] = val & 0xff; - voodoo->banshee_blt.rops[2] = (val >> 8) & 0xff; - voodoo->banshee_blt.rops[3] = (val >> 16) & 0xff; -// bansheeblt_log("rop=%08x\n", val); - break; - case 0x34: - voodoo->banshee_blt.srcBaseAddr = val & 0xffffff; - voodoo->banshee_blt.srcBaseAddr_tiled = val & 0x80000000; - if (voodoo->banshee_blt.srcBaseAddr_tiled) - voodoo->banshee_blt.src_stride = (voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK) * 128*32; - else - voodoo->banshee_blt.src_stride = voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK; - update_src_stride(voodoo); -// bansheeblt_log("srcBaseAddr=%08x\n", val); - break; - case 0x38: - voodoo->banshee_blt.commandExtra = val; -// bansheeblt_log("commandExtra=%08x\n", val); - break; - case 0x3c: - voodoo->banshee_blt.lineStipple = val; - break; - case 0x40: - voodoo->banshee_blt.lineStyle = val; - voodoo->banshee_blt.line_rep_cnt = val & 0xff; - voodoo->banshee_blt.line_bit_mask_size = (val >> 8) & 0x1f; - voodoo->banshee_blt.line_pix_pos = (val >> 16) & 0xff; - voodoo->banshee_blt.line_bit_pos = (val >> 24) & 0x1f; - break; - case 0x44: - voodoo->banshee_blt.colorPattern[0] = val; -// bansheeblt_log("colorPattern0=%08x\n", val); - voodoo->banshee_blt.colorPattern24[0] = val & 0xffffff; - voodoo->banshee_blt.colorPattern24[1] = (voodoo->banshee_blt.colorPattern24[1] & 0xffff00) | (val >> 24); - voodoo->banshee_blt.colorPattern16[0] = val & 0xffff; - voodoo->banshee_blt.colorPattern16[1] = (val >> 16) & 0xffff; - voodoo->banshee_blt.colorPattern8[0] = val & 0xff; - voodoo->banshee_blt.colorPattern8[1] = (val >> 8) & 0xff; - voodoo->banshee_blt.colorPattern8[2] = (val >> 16) & 0xff; - voodoo->banshee_blt.colorPattern8[3] = (val >> 24) & 0xff; - break; - case 0x48: - voodoo->banshee_blt.colorPattern[1] = val; -// bansheeblt_log("colorPattern1=%08x\n", val); - voodoo->banshee_blt.colorPattern24[1] = (voodoo->banshee_blt.colorPattern24[1] & 0xff) | ((val & 0xffff) << 8); - voodoo->banshee_blt.colorPattern24[2] = (voodoo->banshee_blt.colorPattern24[2] & 0xff0000) | (val >> 16); - voodoo->banshee_blt.colorPattern16[2] = val & 0xffff; - voodoo->banshee_blt.colorPattern16[3] = (val >> 16) & 0xffff; - voodoo->banshee_blt.colorPattern8[4] = val & 0xff; - voodoo->banshee_blt.colorPattern8[5] = (val >> 8) & 0xff; - voodoo->banshee_blt.colorPattern8[6] = (val >> 16) & 0xff; - voodoo->banshee_blt.colorPattern8[7] = (val >> 24) & 0xff; - break; - case 0x4c: - voodoo->banshee_blt.clip1Min = val; - voodoo->banshee_blt.clip[1].x_min = val & 0xfff; - voodoo->banshee_blt.clip[1].y_min = (val >> 16) & 0xfff; - break; - case 0x50: - voodoo->banshee_blt.clip1Max = val; - voodoo->banshee_blt.clip[1].x_max = val & 0xfff; - voodoo->banshee_blt.clip[1].y_max = (val >> 16) & 0xfff; - break; - case 0x54: - voodoo->banshee_blt.srcFormat = val; - if (voodoo->banshee_blt.srcBaseAddr_tiled) - voodoo->banshee_blt.src_stride = (voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK) * 128*32; - else - voodoo->banshee_blt.src_stride = voodoo->banshee_blt.srcFormat & SRC_FORMAT_STRIDE_MASK; - update_src_stride(voodoo); - switch (voodoo->banshee_blt.srcFormat & SRC_FORMAT_COL_MASK) - { - case SRC_FORMAT_COL_1_BPP: - voodoo->banshee_blt.src_bpp = 1; - break; - case SRC_FORMAT_COL_8_BPP: - voodoo->banshee_blt.src_bpp = 8; - break; - case SRC_FORMAT_COL_24_BPP: - voodoo->banshee_blt.src_bpp = 24; - break; - case SRC_FORMAT_COL_32_BPP: - voodoo->banshee_blt.src_bpp = 32; - break; - case SRC_FORMAT_COL_16_BPP: default: - voodoo->banshee_blt.src_bpp = 16; - break; - } -// bansheeblt_log("srcFormat=%08x\n", val); - break; - case 0x58: - voodoo->banshee_blt.srcSize = val; - voodoo->banshee_blt.srcSizeX = voodoo->banshee_blt.srcSize & 0x1fff; - voodoo->banshee_blt.srcSizeY = (voodoo->banshee_blt.srcSize >> 16) & 0x1fff; - update_src_stride(voodoo); -// bansheeblt_log("srcSize=%08x\n", val); - break; - case 0x5c: - voodoo->banshee_blt.srcXY = val; - voodoo->banshee_blt.srcX = ((int32_t)(val << 19)) >> 19; - voodoo->banshee_blt.srcY = ((int32_t)(val << 3)) >> 19; - update_src_stride(voodoo); -// bansheeblt_log("srcXY=%08x\n", val); - break; - case 0x60: - voodoo->banshee_blt.colorBack = val; - break; - case 0x64: - voodoo->banshee_blt.colorFore = val; - break; - case 0x68: - voodoo->banshee_blt.dstSize = val; - voodoo->banshee_blt.dstSizeX = voodoo->banshee_blt.dstSize & 0x1fff; - voodoo->banshee_blt.dstSizeY = (voodoo->banshee_blt.dstSize >> 16) & 0x1fff; - update_src_stride(voodoo); -// bansheeblt_log("dstSize=%08x\n", val); - break; - case 0x6c: - voodoo->banshee_blt.dstXY = val; - voodoo->banshee_blt.dstX = ((int32_t)(val << 19)) >> 19; - voodoo->banshee_blt.dstY = ((int32_t)(val << 3)) >> 19; -// bansheeblt_log("dstXY=%08x\n", val); - break; - case 0x70: - voodoo_wait_for_render_thread_idle(voodoo); - voodoo->banshee_blt.command = val; - voodoo->banshee_blt.rops[0] = val >> 24; -// bansheeblt_log("command=%x %08x\n", voodoo->banshee_blt.command & COMMAND_CMD_MASK, val); - voodoo->banshee_blt.patoff_x = (val & COMMAND_PATOFF_X_MASK) >> COMMAND_PATOFF_X_SHIFT; - voodoo->banshee_blt.patoff_y = (val & COMMAND_PATOFF_Y_MASK) >> COMMAND_PATOFF_Y_SHIFT; - voodoo->banshee_blt.cur_x = 0; - voodoo->banshee_blt.cur_y = 0; - voodoo->banshee_blt.dstX = ((int32_t)(voodoo->banshee_blt.dstXY << 19)) >> 19; - voodoo->banshee_blt.dstY = ((int32_t)(voodoo->banshee_blt.dstXY << 3)) >> 19; - voodoo->banshee_blt.srcX = ((int32_t)(voodoo->banshee_blt.srcXY << 19)) >> 19; - voodoo->banshee_blt.srcY = ((int32_t)(voodoo->banshee_blt.srcXY << 3)) >> 19; - voodoo->banshee_blt.old_srcX = voodoo->banshee_blt.srcX; - voodoo->banshee_blt.host_data_remainder = 0; - voodoo->banshee_blt.host_data_count = 0; - switch (voodoo->banshee_blt.command & COMMAND_CMD_MASK) - { -/* case COMMAND_CMD_SCREEN_TO_SCREEN_STRETCH_BLT: - if (voodoo->banshee_blt.bresError0 & BRES_ERROR_USE) - voodoo->banshee_blt.bres_error_0 = (int32_t)(int16_t)(voodoo->banshee_blt.bresError0 & BRES_ERROR_MASK); - else - voodoo->banshee_blt.bres_error_0 = voodoo->banshee_blt.dstSizeY / 2; - if (voodoo->banshee_blt.bresError1 & BRES_ERROR_USE) - voodoo->banshee_blt.bres_error_1 = (int32_t)(int16_t)(voodoo->banshee_blt.bresError1 & BRES_ERROR_MASK); - else - voodoo->banshee_blt.bres_error_1 = voodoo->banshee_blt.dstSizeX / 2; - - if (val & COMMAND_INITIATE) - banshee_do_2d_blit(voodoo, -1, 0); - break;*/ - - case COMMAND_CMD_POLYFILL: - if (val & COMMAND_INITIATE) - { - voodoo->banshee_blt.dstXY = voodoo->banshee_blt.srcXY; - voodoo->banshee_blt.dstX = voodoo->banshee_blt.srcX; - voodoo->banshee_blt.dstY = voodoo->banshee_blt.srcY; - } - banshee_polyfill_start(voodoo); - break; - - default: - if (val & COMMAND_INITIATE) - { - banshee_do_2d_blit(voodoo, -1, 0); - // fatal("Initiate command!\n"); - } - break; - } - break; - - case 0x80: case 0x84: case 0x88: case 0x8c: - case 0x90: case 0x94: case 0x98: case 0x9c: - case 0xa0: case 0xa4: case 0xa8: case 0xac: - case 0xb0: case 0xb4: case 0xb8: case 0xbc: - case 0xc0: case 0xc4: case 0xc8: case 0xcc: - case 0xd0: case 0xd4: case 0xd8: case 0xdc: - case 0xe0: case 0xe4: case 0xe8: case 0xec: - case 0xf0: case 0xf4: case 0xf8: case 0xfc: -// bansheeblt_log("launch %08x %08x %08x %08x\n", voodoo->banshee_blt.command, voodoo->banshee_blt.commandExtra, voodoo->banshee_blt.srcColorkeyMin, voodoo->banshee_blt.srcColorkeyMax); - switch (voodoo->banshee_blt.command & COMMAND_CMD_MASK) - { - case COMMAND_CMD_SCREEN_TO_SCREEN_BLT: - voodoo->banshee_blt.srcXY = val; - voodoo->banshee_blt.srcX = ((int32_t)(val << 19)) >> 19; - voodoo->banshee_blt.srcY = ((int32_t)(val << 3)) >> 19; - banshee_do_screen_to_screen_blt(voodoo); - break; - - case COMMAND_CMD_HOST_TO_SCREEN_BLT: - banshee_do_2d_blit(voodoo, 32, val); - break; - - case COMMAND_CMD_HOST_TO_SCREEN_STRETCH_BLT: - banshee_do_2d_blit(voodoo, 32, val); - break; - - case COMMAND_CMD_RECTFILL: - voodoo->banshee_blt.dstXY = val; - voodoo->banshee_blt.dstX = ((int32_t)(val << 19)) >> 19; - voodoo->banshee_blt.dstY = ((int32_t)(val << 3)) >> 19; - banshee_do_rectfill(voodoo); - break; - - case COMMAND_CMD_LINE: - voodoo->banshee_blt.dstXY = val; - voodoo->banshee_blt.dstX = ((int32_t)(val << 19)) >> 19; - voodoo->banshee_blt.dstY = ((int32_t)(val << 3)) >> 19; - banshee_do_line(voodoo, 1); - break; - - case COMMAND_CMD_POLYLINE: - voodoo->banshee_blt.dstXY = val; - voodoo->banshee_blt.dstX = ((int32_t)(val << 19)) >> 19; - voodoo->banshee_blt.dstY = ((int32_t)(val << 3)) >> 19; - banshee_do_line(voodoo, 0); - break; - - case COMMAND_CMD_POLYFILL: - banshee_polyfill_continue(voodoo, val); - break; - - default: - fatal("launch area write, command=%08x\n", voodoo->banshee_blt.command); - } - break; - - case 0x100: case 0x104: case 0x108: case 0x10c: - case 0x110: case 0x114: case 0x118: case 0x11c: - case 0x120: case 0x124: case 0x128: case 0x12c: - case 0x130: case 0x134: case 0x138: case 0x13c: - case 0x140: case 0x144: case 0x148: case 0x14c: - case 0x150: case 0x154: case 0x158: case 0x15c: - case 0x160: case 0x164: case 0x168: case 0x16c: - case 0x170: case 0x174: case 0x178: case 0x17c: - case 0x180: case 0x184: case 0x188: case 0x18c: - case 0x190: case 0x194: case 0x198: case 0x19c: - case 0x1a0: case 0x1a4: case 0x1a8: case 0x1ac: - case 0x1b0: case 0x1b4: case 0x1b8: case 0x1bc: - case 0x1c0: case 0x1c4: case 0x1c8: case 0x1cc: - case 0x1d0: case 0x1d4: case 0x1d8: case 0x1dc: - case 0x1e0: case 0x1e4: case 0x1e8: case 0x1ec: - case 0x1f0: case 0x1f4: case 0x1f8: case 0x1fc: - voodoo->banshee_blt.colorPattern[(addr >> 2) & 63] = val; - if ((addr & 0x1fc) < 0x1c0) - { - int base_addr = (addr & 0xfc) / 0xc; - uintptr_t src_p = (uintptr_t)&voodoo->banshee_blt.colorPattern[base_addr * 3]; - int col24 = base_addr * 4; - - voodoo->banshee_blt.colorPattern24[col24] = *(uint32_t *)src_p & 0xffffff; - voodoo->banshee_blt.colorPattern24[col24 + 1] = *(uint32_t *)(src_p + 3) & 0xffffff; - voodoo->banshee_blt.colorPattern24[col24 + 2] = *(uint32_t *)(src_p + 6) & 0xffffff; - voodoo->banshee_blt.colorPattern24[col24 + 3] = *(uint32_t *)(src_p + 9) & 0xffffff; - } - if ((addr & 0x1fc) < 0x180) - { - voodoo->banshee_blt.colorPattern16[(addr >> 1) & 62] = val & 0xffff; - voodoo->banshee_blt.colorPattern16[((addr >> 1) & 62) + 1] = (val >> 16) & 0xffff; - } - if ((addr & 0x1fc) < 0x140) - { - voodoo->banshee_blt.colorPattern8[addr & 60] = val & 0xff; - voodoo->banshee_blt.colorPattern8[(addr & 60) + 1] = (val >> 8) & 0xff; - voodoo->banshee_blt.colorPattern8[(addr & 60) + 2] = (val >> 16) & 0xff; - voodoo->banshee_blt.colorPattern8[(addr & 60) + 3] = (val >> 24) & 0xff; - } -// bansheeblt_log("colorPattern%02x=%08x\n", (addr >> 2) & 63, val); - break; - - default: - fatal("Unknown 2D reg write %03x %08x\n", addr & 0x1fc, val); - } + fatal("launch area write, command=%08x\n", voodoo->banshee_blt.command); + } + break; + + case 0x100: + case 0x104: + case 0x108: + case 0x10c: + case 0x110: + case 0x114: + case 0x118: + case 0x11c: + case 0x120: + case 0x124: + case 0x128: + case 0x12c: + case 0x130: + case 0x134: + case 0x138: + case 0x13c: + case 0x140: + case 0x144: + case 0x148: + case 0x14c: + case 0x150: + case 0x154: + case 0x158: + case 0x15c: + case 0x160: + case 0x164: + case 0x168: + case 0x16c: + case 0x170: + case 0x174: + case 0x178: + case 0x17c: + case 0x180: + case 0x184: + case 0x188: + case 0x18c: + case 0x190: + case 0x194: + case 0x198: + case 0x19c: + case 0x1a0: + case 0x1a4: + case 0x1a8: + case 0x1ac: + case 0x1b0: + case 0x1b4: + case 0x1b8: + case 0x1bc: + case 0x1c0: + case 0x1c4: + case 0x1c8: + case 0x1cc: + case 0x1d0: + case 0x1d4: + case 0x1d8: + case 0x1dc: + case 0x1e0: + case 0x1e4: + case 0x1e8: + case 0x1ec: + case 0x1f0: + case 0x1f4: + case 0x1f8: + case 0x1fc: + voodoo->banshee_blt.colorPattern[(addr >> 2) & 63] = val; + if ((addr & 0x1fc) < 0x1c0) { + int base_addr = (addr & 0xfc) / 0xc; + uintptr_t src_p = (uintptr_t) &voodoo->banshee_blt.colorPattern[base_addr * 3]; + int col24 = base_addr * 4; + + voodoo->banshee_blt.colorPattern24[col24] = *(uint32_t *) src_p & 0xffffff; + voodoo->banshee_blt.colorPattern24[col24 + 1] = *(uint32_t *) (src_p + 3) & 0xffffff; + voodoo->banshee_blt.colorPattern24[col24 + 2] = *(uint32_t *) (src_p + 6) & 0xffffff; + voodoo->banshee_blt.colorPattern24[col24 + 3] = *(uint32_t *) (src_p + 9) & 0xffffff; + } + if ((addr & 0x1fc) < 0x180) { + voodoo->banshee_blt.colorPattern16[(addr >> 1) & 62] = val & 0xffff; + voodoo->banshee_blt.colorPattern16[((addr >> 1) & 62) + 1] = (val >> 16) & 0xffff; + } + if ((addr & 0x1fc) < 0x140) { + voodoo->banshee_blt.colorPattern8[addr & 60] = val & 0xff; + voodoo->banshee_blt.colorPattern8[(addr & 60) + 1] = (val >> 8) & 0xff; + voodoo->banshee_blt.colorPattern8[(addr & 60) + 2] = (val >> 16) & 0xff; + voodoo->banshee_blt.colorPattern8[(addr & 60) + 3] = (val >> 24) & 0xff; + } + // bansheeblt_log("colorPattern%02x=%08x\n", (addr >> 2) & 63, val); + break; + + default: + fatal("Unknown 2D reg write %03x %08x\n", addr & 0x1fc, val); + } } diff --git a/src/video/vid_voodoo_blitter.c b/src/video/vid_voodoo_blitter.c index 94fb9dfa1..9ffeb9553 100644 --- a/src/video/vid_voodoo_blitter.c +++ b/src/video/vid_voodoo_blitter.c @@ -39,519 +39,479 @@ #include <86box/vid_voodoo_regs.h> #include <86box/vid_voodoo_render.h> - -enum -{ - BLIT_COMMAND_SCREEN_TO_SCREEN = 0, - BLIT_COMMAND_CPU_TO_SCREEN = 1, - BLIT_COMMAND_RECT_FILL = 2, - BLIT_COMMAND_SGRAM_FILL = 3 +enum { + BLIT_COMMAND_SCREEN_TO_SCREEN = 0, + BLIT_COMMAND_CPU_TO_SCREEN = 1, + BLIT_COMMAND_RECT_FILL = 2, + BLIT_COMMAND_SGRAM_FILL = 3 }; -enum -{ - BLIT_SRC_1BPP = (0 << 3), - BLIT_SRC_1BPP_BYTE_PACKED = (1 << 3), - BLIT_SRC_16BPP = (2 << 3), - BLIT_SRC_24BPP = (3 << 3), - BLIT_SRC_24BPP_DITHER_2X2 = (4 << 3), - BLIT_SRC_24BPP_DITHER_4X4 = (5 << 3) +enum { + BLIT_SRC_1BPP = (0 << 3), + BLIT_SRC_1BPP_BYTE_PACKED = (1 << 3), + BLIT_SRC_16BPP = (2 << 3), + BLIT_SRC_24BPP = (3 << 3), + BLIT_SRC_24BPP_DITHER_2X2 = (4 << 3), + BLIT_SRC_24BPP_DITHER_4X4 = (5 << 3) }; -enum -{ - BLIT_SRC_RGB_ARGB = (0 << 6), - BLIT_SRC_RGB_ABGR = (1 << 6), - BLIT_SRC_RGB_RGBA = (2 << 6), - BLIT_SRC_RGB_BGRA = (3 << 6) +enum { + BLIT_SRC_RGB_ARGB = (0 << 6), + BLIT_SRC_RGB_ABGR = (1 << 6), + BLIT_SRC_RGB_RGBA = (2 << 6), + BLIT_SRC_RGB_BGRA = (3 << 6) }; -enum -{ - BLIT_COMMAND_MASK = 7, - BLIT_SRC_FORMAT = (7 << 3), - BLIT_SRC_RGB_FORMAT = (3 << 6), - BLIT_SRC_CHROMA = (1 << 10), - BLIT_DST_CHROMA = (1 << 12), - BLIT_CLIPPING_ENABLED = (1 << 16) +enum { + BLIT_COMMAND_MASK = 7, + BLIT_SRC_FORMAT = (7 << 3), + BLIT_SRC_RGB_FORMAT = (3 << 6), + BLIT_SRC_CHROMA = (1 << 10), + BLIT_DST_CHROMA = (1 << 12), + BLIT_CLIPPING_ENABLED = (1 << 16) }; -enum -{ - BLIT_ROP_DST_PASS = (1 << 0), - BLIT_ROP_SRC_PASS = (1 << 1) +enum { + BLIT_ROP_DST_PASS = (1 << 0), + BLIT_ROP_SRC_PASS = (1 << 1) }; - #ifdef ENABLE_VOODOOBLT_LOG int voodooblt_do_log = ENABLE_VOODOOBLT_LOG; - static void voodooblt_log(const char *fmt, ...) { va_list ap; if (voodooblt_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define voodooblt_log(fmt, ...) +# define voodooblt_log(fmt, ...) #endif +#define MIX(src_dat, dst_dat, rop) \ + switch (rop) { \ + case 0x0: \ + dst_dat = 0; \ + break; \ + case 0x1: \ + dst_dat = ~(src_dat | dst_dat); \ + break; \ + case 0x2: \ + dst_dat = ~src_dat & dst_dat; \ + break; \ + case 0x3: \ + dst_dat = ~src_dat; \ + break; \ + case 0x4: \ + dst_dat = src_dat & ~dst_dat; \ + break; \ + case 0x5: \ + dst_dat = ~dst_dat; \ + break; \ + case 0x6: \ + dst_dat = src_dat ^ dst_dat; \ + break; \ + case 0x7: \ + dst_dat = ~(src_dat & dst_dat); \ + break; \ + case 0x8: \ + dst_dat = src_dat & dst_dat; \ + break; \ + case 0x9: \ + dst_dat = ~(src_dat ^ dst_dat); \ + break; \ + case 0xa: \ + dst_dat = dst_dat; \ + break; \ + case 0xb: \ + dst_dat = ~src_dat | dst_dat; \ + break; \ + case 0xc: \ + dst_dat = src_dat; \ + break; \ + case 0xd: \ + dst_dat = src_dat | ~dst_dat; \ + break; \ + case 0xe: \ + dst_dat = src_dat | dst_dat; \ + break; \ + case 0xf: \ + dst_dat = 0xffff; \ + break; \ + } -#define MIX(src_dat, dst_dat, rop) \ - switch (rop) \ - { \ - case 0x0: dst_dat = 0; break; \ - case 0x1: dst_dat = ~(src_dat | dst_dat); break; \ - case 0x2: dst_dat = ~src_dat & dst_dat; break; \ - case 0x3: dst_dat = ~src_dat; break; \ - case 0x4: dst_dat = src_dat & ~dst_dat; break; \ - case 0x5: dst_dat = ~dst_dat; break; \ - case 0x6: dst_dat = src_dat ^ dst_dat; break; \ - case 0x7: dst_dat = ~(src_dat & dst_dat); break; \ - case 0x8: dst_dat = src_dat & dst_dat; break; \ - case 0x9: dst_dat = ~(src_dat ^ dst_dat); break; \ - case 0xa: dst_dat = dst_dat; break; \ - case 0xb: dst_dat = ~src_dat | dst_dat; break; \ - case 0xc: dst_dat = src_dat; break; \ - case 0xd: dst_dat = src_dat | ~dst_dat; break; \ - case 0xe: dst_dat = src_dat | dst_dat; break; \ - case 0xf: dst_dat = 0xffff; break; \ - } - -void voodoo_v2_blit_start(voodoo_t *voodoo) +void +voodoo_v2_blit_start(voodoo_t *voodoo) { - uint64_t dat64; - int size_x = ABS(voodoo->bltSizeX), size_y = ABS(voodoo->bltSizeY); - int x_dir = (voodoo->bltSizeX > 0) ? 1 : -1; - int y_dir = (voodoo->bltSizeY > 0) ? 1 : -1; - int dst_x; - int src_y = voodoo->bltSrcY & 0x7ff, dst_y = voodoo->bltDstY & 0x7ff; - int src_stride = (voodoo->bltCommand & BLTCMD_SRC_TILED) ? ((voodoo->bltSrcXYStride & 0x3f) * 32*2) : (voodoo->bltSrcXYStride & 0xff8); - int dst_stride = (voodoo->bltCommand & BLTCMD_DST_TILED) ? ((voodoo->bltDstXYStride & 0x3f) * 32*2) : (voodoo->bltDstXYStride & 0xff8); - uint32_t src_base_addr = (voodoo->bltCommand & BLTCMD_SRC_TILED) ? ((voodoo->bltSrcBaseAddr & 0x3ff) << 12) : (voodoo->bltSrcBaseAddr & 0x3ffff8); - uint32_t dst_base_addr = (voodoo->bltCommand & BLTCMD_DST_TILED) ? ((voodoo->bltDstBaseAddr & 0x3ff) << 12) : (voodoo->bltDstBaseAddr & 0x3ffff8); - int x, y; + uint64_t dat64; + int size_x = ABS(voodoo->bltSizeX), size_y = ABS(voodoo->bltSizeY); + int x_dir = (voodoo->bltSizeX > 0) ? 1 : -1; + int y_dir = (voodoo->bltSizeY > 0) ? 1 : -1; + int dst_x; + int src_y = voodoo->bltSrcY & 0x7ff, dst_y = voodoo->bltDstY & 0x7ff; + int src_stride = (voodoo->bltCommand & BLTCMD_SRC_TILED) ? ((voodoo->bltSrcXYStride & 0x3f) * 32 * 2) : (voodoo->bltSrcXYStride & 0xff8); + int dst_stride = (voodoo->bltCommand & BLTCMD_DST_TILED) ? ((voodoo->bltDstXYStride & 0x3f) * 32 * 2) : (voodoo->bltDstXYStride & 0xff8); + uint32_t src_base_addr = (voodoo->bltCommand & BLTCMD_SRC_TILED) ? ((voodoo->bltSrcBaseAddr & 0x3ff) << 12) : (voodoo->bltSrcBaseAddr & 0x3ffff8); + uint32_t dst_base_addr = (voodoo->bltCommand & BLTCMD_DST_TILED) ? ((voodoo->bltDstBaseAddr & 0x3ff) << 12) : (voodoo->bltDstBaseAddr & 0x3ffff8); + int x, y; -/* voodooblt_log("blit_start: command=%08x srcX=%i srcY=%i dstX=%i dstY=%i sizeX=%i sizeY=%i color=%04x,%04x\n", - voodoo->bltCommand, voodoo->bltSrcX, voodoo->bltSrcY, voodoo->bltDstX, voodoo->bltDstY, voodoo->bltSizeX, voodoo->bltSizeY, voodoo->bltColorFg, voodoo->bltColorBg);*/ + /* voodooblt_log("blit_start: command=%08x srcX=%i srcY=%i dstX=%i dstY=%i sizeX=%i sizeY=%i color=%04x,%04x\n", + voodoo->bltCommand, voodoo->bltSrcX, voodoo->bltSrcY, voodoo->bltDstX, voodoo->bltDstY, voodoo->bltSizeX, voodoo->bltSizeY, voodoo->bltColorFg, voodoo->bltColorBg);*/ - voodoo_wait_for_render_thread_idle(voodoo); + voodoo_wait_for_render_thread_idle(voodoo); - switch (voodoo->bltCommand & BLIT_COMMAND_MASK) - { - case BLIT_COMMAND_SCREEN_TO_SCREEN: - for (y = 0; y <= size_y; y++) - { - uint16_t *src = (uint16_t *)&voodoo->fb_mem[src_base_addr + src_y*src_stride]; - uint16_t *dst = (uint16_t *)&voodoo->fb_mem[dst_base_addr + dst_y*dst_stride]; - int src_x = voodoo->bltSrcX, dst_x = voodoo->bltDstX; + switch (voodoo->bltCommand & BLIT_COMMAND_MASK) { + case BLIT_COMMAND_SCREEN_TO_SCREEN: + for (y = 0; y <= size_y; y++) { + uint16_t *src = (uint16_t *) &voodoo->fb_mem[src_base_addr + src_y * src_stride]; + uint16_t *dst = (uint16_t *) &voodoo->fb_mem[dst_base_addr + dst_y * dst_stride]; + int src_x = voodoo->bltSrcX, dst_x = voodoo->bltDstX; - for (x = 0; x <= size_x; x++) - { - uint16_t src_dat = src[src_x]; - uint16_t dst_dat = dst[dst_x]; - int rop = 0; + for (x = 0; x <= size_x; x++) { + uint16_t src_dat = src[src_x]; + uint16_t dst_dat = dst[dst_x]; + int rop = 0; - if (voodoo->bltCommand & BLIT_CLIPPING_ENABLED) - { - if (dst_x < voodoo->bltClipLeft || dst_x >= voodoo->bltClipRight || - dst_y < voodoo->bltClipLowY || dst_y >= voodoo->bltClipHighY) - goto skip_pixel_blit; - } + if (voodoo->bltCommand & BLIT_CLIPPING_ENABLED) { + if (dst_x < voodoo->bltClipLeft || dst_x >= voodoo->bltClipRight || dst_y < voodoo->bltClipLowY || dst_y >= voodoo->bltClipHighY) + goto skip_pixel_blit; + } - if (voodoo->bltCommand & BLIT_SRC_CHROMA) - { - int r = (src_dat >> 11); - int g = (src_dat >> 5) & 0x3f; - int b = src_dat & 0x1f; + if (voodoo->bltCommand & BLIT_SRC_CHROMA) { + int r = (src_dat >> 11); + int g = (src_dat >> 5) & 0x3f; + int b = src_dat & 0x1f; - if (r >= voodoo->bltSrcChromaMinR && r <= voodoo->bltSrcChromaMaxR && - g >= voodoo->bltSrcChromaMinG && g <= voodoo->bltSrcChromaMaxG && - b >= voodoo->bltSrcChromaMinB && b <= voodoo->bltSrcChromaMaxB) - rop |= BLIT_ROP_SRC_PASS; - } - if (voodoo->bltCommand & BLIT_DST_CHROMA) - { - int r = (dst_dat >> 11); - int g = (dst_dat >> 5) & 0x3f; - int b = dst_dat & 0x1f; + if (r >= voodoo->bltSrcChromaMinR && r <= voodoo->bltSrcChromaMaxR && g >= voodoo->bltSrcChromaMinG && g <= voodoo->bltSrcChromaMaxG && b >= voodoo->bltSrcChromaMinB && b <= voodoo->bltSrcChromaMaxB) + rop |= BLIT_ROP_SRC_PASS; + } + if (voodoo->bltCommand & BLIT_DST_CHROMA) { + int r = (dst_dat >> 11); + int g = (dst_dat >> 5) & 0x3f; + int b = dst_dat & 0x1f; - if (r >= voodoo->bltDstChromaMinR && r <= voodoo->bltDstChromaMaxR && - g >= voodoo->bltDstChromaMinG && g <= voodoo->bltDstChromaMaxG && - b >= voodoo->bltDstChromaMinB && b <= voodoo->bltDstChromaMaxB) - rop |= BLIT_ROP_DST_PASS; - } + if (r >= voodoo->bltDstChromaMinR && r <= voodoo->bltDstChromaMaxR && g >= voodoo->bltDstChromaMinG && g <= voodoo->bltDstChromaMaxG && b >= voodoo->bltDstChromaMinB && b <= voodoo->bltDstChromaMaxB) + rop |= BLIT_ROP_DST_PASS; + } - MIX(src_dat, dst_dat, voodoo->bltRop[rop]); + MIX(src_dat, dst_dat, voodoo->bltRop[rop]); - dst[dst_x] = dst_dat; + dst[dst_x] = dst_dat; skip_pixel_blit: - src_x += x_dir; - dst_x += x_dir; - } - - src_y += y_dir; - dst_y += y_dir; + src_x += x_dir; + dst_x += x_dir; } - break; - case BLIT_COMMAND_CPU_TO_SCREEN: - voodoo->blt.dst_x = voodoo->bltDstX; - voodoo->blt.dst_y = voodoo->bltDstY; - voodoo->blt.cur_x = 0; - voodoo->blt.size_x = size_x; - voodoo->blt.size_y = size_y; - voodoo->blt.x_dir = x_dir; - voodoo->blt.y_dir = y_dir; - voodoo->blt.dst_stride = (voodoo->bltCommand & BLTCMD_DST_TILED) ? ((voodoo->bltDstXYStride & 0x3f) * 32*2) : (voodoo->bltDstXYStride & 0xff8); - break; + src_y += y_dir; + dst_y += y_dir; + } + break; - case BLIT_COMMAND_RECT_FILL: - for (y = 0; y <= size_y; y++) - { - uint16_t *dst; - int dst_x = voodoo->bltDstX; + case BLIT_COMMAND_CPU_TO_SCREEN: + voodoo->blt.dst_x = voodoo->bltDstX; + voodoo->blt.dst_y = voodoo->bltDstY; + voodoo->blt.cur_x = 0; + voodoo->blt.size_x = size_x; + voodoo->blt.size_y = size_y; + voodoo->blt.x_dir = x_dir; + voodoo->blt.y_dir = y_dir; + voodoo->blt.dst_stride = (voodoo->bltCommand & BLTCMD_DST_TILED) ? ((voodoo->bltDstXYStride & 0x3f) * 32 * 2) : (voodoo->bltDstXYStride & 0xff8); + break; - if (SLI_ENABLED) - { - if ((!(voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && (voodoo->blt.dst_y & 1)) || - ((voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && !(voodoo->blt.dst_y & 1))) - goto skip_line_fill; - dst = (uint16_t *)&voodoo->fb_mem[dst_base_addr + (dst_y >> 1) * dst_stride]; - } - else - dst = (uint16_t *)&voodoo->fb_mem[dst_base_addr + dst_y*dst_stride]; + case BLIT_COMMAND_RECT_FILL: + for (y = 0; y <= size_y; y++) { + uint16_t *dst; + int dst_x = voodoo->bltDstX; - for (x = 0; x <= size_x; x++) - { - if (voodoo->bltCommand & BLIT_CLIPPING_ENABLED) - { - if (dst_x < voodoo->bltClipLeft || dst_x >= voodoo->bltClipRight || - dst_y < voodoo->bltClipLowY || dst_y >= voodoo->bltClipHighY) - goto skip_pixel_fill; - } + if (SLI_ENABLED) { + if ((!(voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && (voodoo->blt.dst_y & 1)) || ((voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && !(voodoo->blt.dst_y & 1))) + goto skip_line_fill; + dst = (uint16_t *) &voodoo->fb_mem[dst_base_addr + (dst_y >> 1) * dst_stride]; + } else + dst = (uint16_t *) &voodoo->fb_mem[dst_base_addr + dst_y * dst_stride]; - dst[dst_x] = voodoo->bltColorFg; + for (x = 0; x <= size_x; x++) { + if (voodoo->bltCommand & BLIT_CLIPPING_ENABLED) { + if (dst_x < voodoo->bltClipLeft || dst_x >= voodoo->bltClipRight || dst_y < voodoo->bltClipLowY || dst_y >= voodoo->bltClipHighY) + goto skip_pixel_fill; + } + + dst[dst_x] = voodoo->bltColorFg; skip_pixel_fill: - dst_x += x_dir; - } + dst_x += x_dir; + } skip_line_fill: - dst_y += y_dir; + dst_y += y_dir; + } + break; + + case BLIT_COMMAND_SGRAM_FILL: + /*32x32 tiles - 2kb*/ + dst_y = voodoo->bltDstY & 0x3ff; + size_x = voodoo->bltSizeX & 0x1ff; // 512*8 = 4kb + size_y = voodoo->bltSizeY & 0x3ff; + + dat64 = voodoo->bltColorFg | ((uint64_t) voodoo->bltColorFg << 16) | ((uint64_t) voodoo->bltColorFg << 32) | ((uint64_t) voodoo->bltColorFg << 48); + + for (y = 0; y <= size_y; y++) { + uint64_t *dst; + + /*This may be wrong*/ + if (!y) { + dst_x = voodoo->bltDstX & 0x1ff; + size_x = 511 - dst_x; + } else if (y < size_y) { + dst_x = 0; + size_x = 511; + } else { + dst_x = 0; + size_x = voodoo->bltSizeX & 0x1ff; } - break; - case BLIT_COMMAND_SGRAM_FILL: - /*32x32 tiles - 2kb*/ - dst_y = voodoo->bltDstY & 0x3ff; - size_x = voodoo->bltSizeX & 0x1ff; //512*8 = 4kb - size_y = voodoo->bltSizeY & 0x3ff; + dst = (uint64_t *) &voodoo->fb_mem[(dst_y * 512 * 8 + dst_x * 8) & voodoo->fb_mask]; - dat64 = voodoo->bltColorFg | ((uint64_t)voodoo->bltColorFg << 16) | - ((uint64_t)voodoo->bltColorFg << 32) | ((uint64_t)voodoo->bltColorFg << 48); + for (x = 0; x <= size_x; x++) + dst[x] = dat64; - for (y = 0; y <= size_y; y++) - { - uint64_t *dst; + dst_y++; + } + break; - /*This may be wrong*/ - if (!y) - { - dst_x = voodoo->bltDstX & 0x1ff; - size_x = 511 - dst_x; - } - else if (y < size_y) - { - dst_x = 0; - size_x = 511; - } - else - { - dst_x = 0; - size_x = voodoo->bltSizeX & 0x1ff; - } - - dst = (uint64_t *)&voodoo->fb_mem[(dst_y*512*8 + dst_x*8) & voodoo->fb_mask]; - - for (x = 0; x <= size_x; x++) - dst[x] = dat64; - - dst_y++; - } - break; - - default: - fatal("bad blit command %08x\n", voodoo->bltCommand); - } + default: + fatal("bad blit command %08x\n", voodoo->bltCommand); + } } -void voodoo_v2_blit_data(voodoo_t *voodoo, uint32_t data) +void +voodoo_v2_blit_data(voodoo_t *voodoo, uint32_t data) { - int src_bits = 32; - uint32_t base_addr = (voodoo->bltCommand & BLTCMD_DST_TILED) ? ((voodoo->bltDstBaseAddr & 0x3ff) << 12) : (voodoo->bltDstBaseAddr & 0x3ffff8); - uint32_t addr; - uint16_t *dst; + int src_bits = 32; + uint32_t base_addr = (voodoo->bltCommand & BLTCMD_DST_TILED) ? ((voodoo->bltDstBaseAddr & 0x3ff) << 12) : (voodoo->bltDstBaseAddr & 0x3ffff8); + uint32_t addr; + uint16_t *dst; - if ((voodoo->bltCommand & BLIT_COMMAND_MASK) != BLIT_COMMAND_CPU_TO_SCREEN) - return; + if ((voodoo->bltCommand & BLIT_COMMAND_MASK) != BLIT_COMMAND_CPU_TO_SCREEN) + return; - if (SLI_ENABLED) - { - addr = base_addr + (voodoo->blt.dst_y >> 1) * voodoo->blt.dst_stride; - dst = (uint16_t *)&voodoo->fb_mem[addr]; - } - else - { - addr = base_addr + voodoo->blt.dst_y*voodoo->blt.dst_stride; - dst = (uint16_t *)&voodoo->fb_mem[addr]; - } + if (SLI_ENABLED) { + addr = base_addr + (voodoo->blt.dst_y >> 1) * voodoo->blt.dst_stride; + dst = (uint16_t *) &voodoo->fb_mem[addr]; + } else { + addr = base_addr + voodoo->blt.dst_y * voodoo->blt.dst_stride; + dst = (uint16_t *) &voodoo->fb_mem[addr]; + } - if (addr >= voodoo->front_offset && voodoo->row_width) - { - int y = (addr - voodoo->front_offset) / voodoo->row_width; - if (y < voodoo->v_disp) - voodoo->dirty_line[y] = 2; - } + if (addr >= voodoo->front_offset && voodoo->row_width) { + int y = (addr - voodoo->front_offset) / voodoo->row_width; + if (y < voodoo->v_disp) + voodoo->dirty_line[y] = 2; + } - while (src_bits && voodoo->blt.cur_x <= voodoo->blt.size_x) - { - int r = 0, g = 0, b = 0; - uint16_t src_dat = 0, dst_dat; - int x = (voodoo->blt.x_dir > 0) ? (voodoo->blt.dst_x + voodoo->blt.cur_x) : (voodoo->blt.dst_x - voodoo->blt.cur_x); - int rop = 0; + while (src_bits && voodoo->blt.cur_x <= voodoo->blt.size_x) { + int r = 0, g = 0, b = 0; + uint16_t src_dat = 0, dst_dat; + int x = (voodoo->blt.x_dir > 0) ? (voodoo->blt.dst_x + voodoo->blt.cur_x) : (voodoo->blt.dst_x - voodoo->blt.cur_x); + int rop = 0; - switch (voodoo->bltCommand & BLIT_SRC_FORMAT) - { - case BLIT_SRC_1BPP: case BLIT_SRC_1BPP_BYTE_PACKED: - src_dat = (data & 1) ? voodoo->bltColorFg : voodoo->bltColorBg; - data >>= 1; - src_bits--; + switch (voodoo->bltCommand & BLIT_SRC_FORMAT) { + case BLIT_SRC_1BPP: + case BLIT_SRC_1BPP_BYTE_PACKED: + src_dat = (data & 1) ? voodoo->bltColorFg : voodoo->bltColorBg; + data >>= 1; + src_bits--; + break; + case BLIT_SRC_16BPP: + switch (voodoo->bltCommand & BLIT_SRC_RGB_FORMAT) { + case BLIT_SRC_RGB_ARGB: + case BLIT_SRC_RGB_RGBA: + src_dat = data & 0xffff; break; - case BLIT_SRC_16BPP: - switch (voodoo->bltCommand & BLIT_SRC_RGB_FORMAT) - { - case BLIT_SRC_RGB_ARGB: case BLIT_SRC_RGB_RGBA: - src_dat = data & 0xffff; - break; - case BLIT_SRC_RGB_ABGR: case BLIT_SRC_RGB_BGRA: - src_dat = ((data & 0xf800) >> 11) | (data & 0x07c0) | ((data & 0x0038) << 11); - break; - } - data >>= 16; - src_bits -= 16; - break; - case BLIT_SRC_24BPP: case BLIT_SRC_24BPP_DITHER_2X2: case BLIT_SRC_24BPP_DITHER_4X4: - switch (voodoo->bltCommand & BLIT_SRC_RGB_FORMAT) - { - case BLIT_SRC_RGB_ARGB: - r = (data >> 16) & 0xff; - g = (data >> 8) & 0xff; - b = data & 0xff; - break; - case BLIT_SRC_RGB_ABGR: - r = data & 0xff; - g = (data >> 8) & 0xff; - b = (data >> 16) & 0xff; - break; - case BLIT_SRC_RGB_RGBA: - r = (data >> 24) & 0xff; - g = (data >> 16) & 0xff; - b = (data >> 8) & 0xff; - break; - case BLIT_SRC_RGB_BGRA: - r = (data >> 8) & 0xff; - g = (data >> 16) & 0xff; - b = (data >> 24) & 0xff; - break; - } - switch (voodoo->bltCommand & BLIT_SRC_FORMAT) - { - case BLIT_SRC_24BPP: - src_dat = (b >> 3) | ((g & 0xfc) << 3) | ((r & 0xf8) << 8); - break; - case BLIT_SRC_24BPP_DITHER_2X2: - r = dither_rb2x2[r][voodoo->blt.dst_y & 1][x & 1]; - g = dither_g2x2[g][voodoo->blt.dst_y & 1][x & 1]; - b = dither_rb2x2[b][voodoo->blt.dst_y & 1][x & 1]; - src_dat = (b >> 3) | ((g & 0xfc) << 3) | ((r & 0xf8) << 8); - break; - case BLIT_SRC_24BPP_DITHER_4X4: - r = dither_rb[r][voodoo->blt.dst_y & 3][x & 3]; - g = dither_g[g][voodoo->blt.dst_y & 3][x & 3]; - b = dither_rb[b][voodoo->blt.dst_y & 3][x & 3]; - src_dat = (b >> 3) | ((g & 0xfc) << 3) | ((r & 0xf8) << 8); - break; - } - src_bits = 0; + case BLIT_SRC_RGB_ABGR: + case BLIT_SRC_RGB_BGRA: + src_dat = ((data & 0xf800) >> 11) | (data & 0x07c0) | ((data & 0x0038) << 11); break; } - - if (SLI_ENABLED) - { - if ((!(voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && (voodoo->blt.dst_y & 1)) || - ((voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && !(voodoo->blt.dst_y & 1))) - goto skip_pixel; + data >>= 16; + src_bits -= 16; + break; + case BLIT_SRC_24BPP: + case BLIT_SRC_24BPP_DITHER_2X2: + case BLIT_SRC_24BPP_DITHER_4X4: + switch (voodoo->bltCommand & BLIT_SRC_RGB_FORMAT) { + case BLIT_SRC_RGB_ARGB: + r = (data >> 16) & 0xff; + g = (data >> 8) & 0xff; + b = data & 0xff; + break; + case BLIT_SRC_RGB_ABGR: + r = data & 0xff; + g = (data >> 8) & 0xff; + b = (data >> 16) & 0xff; + break; + case BLIT_SRC_RGB_RGBA: + r = (data >> 24) & 0xff; + g = (data >> 16) & 0xff; + b = (data >> 8) & 0xff; + break; + case BLIT_SRC_RGB_BGRA: + r = (data >> 8) & 0xff; + g = (data >> 16) & 0xff; + b = (data >> 24) & 0xff; + break; } - - if (voodoo->bltCommand & BLIT_CLIPPING_ENABLED) - { - if (x < voodoo->bltClipLeft || x >= voodoo->bltClipRight || - voodoo->blt.dst_y < voodoo->bltClipLowY || voodoo->blt.dst_y >= voodoo->bltClipHighY) - goto skip_pixel; + switch (voodoo->bltCommand & BLIT_SRC_FORMAT) { + case BLIT_SRC_24BPP: + src_dat = (b >> 3) | ((g & 0xfc) << 3) | ((r & 0xf8) << 8); + break; + case BLIT_SRC_24BPP_DITHER_2X2: + r = dither_rb2x2[r][voodoo->blt.dst_y & 1][x & 1]; + g = dither_g2x2[g][voodoo->blt.dst_y & 1][x & 1]; + b = dither_rb2x2[b][voodoo->blt.dst_y & 1][x & 1]; + src_dat = (b >> 3) | ((g & 0xfc) << 3) | ((r & 0xf8) << 8); + break; + case BLIT_SRC_24BPP_DITHER_4X4: + r = dither_rb[r][voodoo->blt.dst_y & 3][x & 3]; + g = dither_g[g][voodoo->blt.dst_y & 3][x & 3]; + b = dither_rb[b][voodoo->blt.dst_y & 3][x & 3]; + src_dat = (b >> 3) | ((g & 0xfc) << 3) | ((r & 0xf8) << 8); + break; } + src_bits = 0; + break; + } - dst_dat = dst[x]; + if (SLI_ENABLED) { + if ((!(voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && (voodoo->blt.dst_y & 1)) || ((voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && !(voodoo->blt.dst_y & 1))) + goto skip_pixel; + } - if (voodoo->bltCommand & BLIT_SRC_CHROMA) - { - r = (src_dat >> 11); - g = (src_dat >> 5) & 0x3f; - b = src_dat & 0x1f; + if (voodoo->bltCommand & BLIT_CLIPPING_ENABLED) { + if (x < voodoo->bltClipLeft || x >= voodoo->bltClipRight || voodoo->blt.dst_y < voodoo->bltClipLowY || voodoo->blt.dst_y >= voodoo->bltClipHighY) + goto skip_pixel; + } - if (r >= voodoo->bltSrcChromaMinR && r <= voodoo->bltSrcChromaMaxR && - g >= voodoo->bltSrcChromaMinG && g <= voodoo->bltSrcChromaMaxG && - b >= voodoo->bltSrcChromaMinB && b <= voodoo->bltSrcChromaMaxB) - rop |= BLIT_ROP_SRC_PASS; - } - if (voodoo->bltCommand & BLIT_DST_CHROMA) - { - r = (dst_dat >> 11); - g = (dst_dat >> 5) & 0x3f; - b = dst_dat & 0x1f; + dst_dat = dst[x]; - if (r >= voodoo->bltDstChromaMinR && r <= voodoo->bltDstChromaMaxR && - g >= voodoo->bltDstChromaMinG && g <= voodoo->bltDstChromaMaxG && - b >= voodoo->bltDstChromaMinB && b <= voodoo->bltDstChromaMaxB) - rop |= BLIT_ROP_DST_PASS; - } + if (voodoo->bltCommand & BLIT_SRC_CHROMA) { + r = (src_dat >> 11); + g = (src_dat >> 5) & 0x3f; + b = src_dat & 0x1f; - MIX(src_dat, dst_dat, voodoo->bltRop[rop]); + if (r >= voodoo->bltSrcChromaMinR && r <= voodoo->bltSrcChromaMaxR && g >= voodoo->bltSrcChromaMinG && g <= voodoo->bltSrcChromaMaxG && b >= voodoo->bltSrcChromaMinB && b <= voodoo->bltSrcChromaMaxB) + rop |= BLIT_ROP_SRC_PASS; + } + if (voodoo->bltCommand & BLIT_DST_CHROMA) { + r = (dst_dat >> 11); + g = (dst_dat >> 5) & 0x3f; + b = dst_dat & 0x1f; - dst[x] = dst_dat; + if (r >= voodoo->bltDstChromaMinR && r <= voodoo->bltDstChromaMaxR && g >= voodoo->bltDstChromaMinG && g <= voodoo->bltDstChromaMaxG && b >= voodoo->bltDstChromaMinB && b <= voodoo->bltDstChromaMaxB) + rop |= BLIT_ROP_DST_PASS; + } + + MIX(src_dat, dst_dat, voodoo->bltRop[rop]); + + dst[x] = dst_dat; skip_pixel: - voodoo->blt.cur_x++; - } + voodoo->blt.cur_x++; + } - if (voodoo->blt.cur_x > voodoo->blt.size_x) - { - voodoo->blt.size_y--; - if (voodoo->blt.size_y >= 0) - { - voodoo->blt.cur_x = 0; - voodoo->blt.dst_y += voodoo->blt.y_dir; - } + if (voodoo->blt.cur_x > voodoo->blt.size_x) { + voodoo->blt.size_y--; + if (voodoo->blt.size_y >= 0) { + voodoo->blt.cur_x = 0; + voodoo->blt.dst_y += voodoo->blt.y_dir; } + } } - -void voodoo_fastfill(voodoo_t *voodoo, voodoo_params_t *params) +void +voodoo_fastfill(voodoo_t *voodoo, voodoo_params_t *params) { - int y; - int low_y, high_y; + int y; + int low_y, high_y; - if (params->fbzMode & (1 << 17)) - { - int y_origin = (voodoo->type >= VOODOO_BANSHEE) ? (voodoo->y_origin_swap+1) : voodoo->v_disp; + if (params->fbzMode & (1 << 17)) { + int y_origin = (voodoo->type >= VOODOO_BANSHEE) ? (voodoo->y_origin_swap + 1) : voodoo->v_disp; - high_y = y_origin - params->clipLowY; - low_y = y_origin - params->clipHighY; - } - else - { - low_y = params->clipLowY; - high_y = params->clipHighY; - } + high_y = y_origin - params->clipLowY; + low_y = y_origin - params->clipHighY; + } else { + low_y = params->clipLowY; + high_y = params->clipHighY; + } - if (params->fbzMode & FBZ_RGB_WMASK) - { - int r, g, b; - uint16_t col; + if (params->fbzMode & FBZ_RGB_WMASK) { + int r, g, b; + uint16_t col; - r = ((params->color1 >> 16) >> 3) & 0x1f; - g = ((params->color1 >> 8) >> 2) & 0x3f; - b = (params->color1 >> 3) & 0x1f; - col = b | (g << 5) | (r << 11); + r = ((params->color1 >> 16) >> 3) & 0x1f; + g = ((params->color1 >> 8) >> 2) & 0x3f; + b = (params->color1 >> 3) & 0x1f; + col = b | (g << 5) | (r << 11); - if (SLI_ENABLED) - { - for (y = low_y; y < high_y; y += 2) - { - uint16_t *cbuf = (uint16_t *)&voodoo->fb_mem[(params->draw_offset + (y >> 1) * voodoo->row_width) & voodoo->fb_mask]; - int x; + if (SLI_ENABLED) { + for (y = low_y; y < high_y; y += 2) { + uint16_t *cbuf = (uint16_t *) &voodoo->fb_mem[(params->draw_offset + (y >> 1) * voodoo->row_width) & voodoo->fb_mask]; + int x; - for (x = params->clipLeft; x < params->clipRight; x++) - cbuf[x] = col; - } - } - else - { - for (y = low_y; y < high_y; y++) - { - if (voodoo->col_tiled) - { - uint16_t *cbuf = (uint16_t *)&voodoo->fb_mem[(params->draw_offset + (y >> 5) * voodoo->row_width + (y & 31) * 128) & voodoo->fb_mask]; - int x; - - for (x = params->clipLeft; x < params->clipRight; x++) - { - int x2 = (x & 63) | ((x >> 6) * 128*32/2); - cbuf[x2] = col; - } - } - else - { - uint16_t *cbuf = (uint16_t *)&voodoo->fb_mem[(params->draw_offset + y * voodoo->row_width) & voodoo->fb_mask]; - int x; - - for (x = params->clipLeft; x < params->clipRight; x++) - cbuf[x] = col; - } - } + for (x = params->clipLeft; x < params->clipRight; x++) + cbuf[x] = col; + } + } else { + for (y = low_y; y < high_y; y++) { + if (voodoo->col_tiled) { + uint16_t *cbuf = (uint16_t *) &voodoo->fb_mem[(params->draw_offset + (y >> 5) * voodoo->row_width + (y & 31) * 128) & voodoo->fb_mask]; + int x; + + for (x = params->clipLeft; x < params->clipRight; x++) { + int x2 = (x & 63) | ((x >> 6) * 128 * 32 / 2); + cbuf[x2] = col; + } + } else { + uint16_t *cbuf = (uint16_t *) &voodoo->fb_mem[(params->draw_offset + y * voodoo->row_width) & voodoo->fb_mask]; + int x; + + for (x = params->clipLeft; x < params->clipRight; x++) + cbuf[x] = col; } + } } - if (params->fbzMode & FBZ_DEPTH_WMASK) - { - if (SLI_ENABLED) - { - for (y = low_y; y < high_y; y += 2) - { - uint16_t *abuf = (uint16_t *)&voodoo->fb_mem[(params->aux_offset + (y >> 1) * voodoo->row_width) & voodoo->fb_mask]; - int x; + } + if (params->fbzMode & FBZ_DEPTH_WMASK) { + if (SLI_ENABLED) { + for (y = low_y; y < high_y; y += 2) { + uint16_t *abuf = (uint16_t *) &voodoo->fb_mem[(params->aux_offset + (y >> 1) * voodoo->row_width) & voodoo->fb_mask]; + int x; - for (x = params->clipLeft; x < params->clipRight; x++) - abuf[x] = params->zaColor & 0xffff; - } - } - else - { - for (y = low_y; y < high_y; y++) - { - if (voodoo->aux_tiled) - { - uint16_t *abuf = (uint16_t *)&voodoo->fb_mem[(params->aux_offset + (y >> 5) * voodoo->aux_row_width + (y & 31) * 128) & voodoo->fb_mask]; - int x; - - for (x = params->clipLeft; x < params->clipRight; x++) - { - int x2 = (x & 63) | ((x >> 6) * 128*32/2); - abuf[x2] = params->zaColor & 0xffff; - } - } - else - { - uint16_t *abuf = (uint16_t *)&voodoo->fb_mem[(params->aux_offset + y * voodoo->aux_row_width) & voodoo->fb_mask]; - int x; - - for (x = params->clipLeft; x < params->clipRight; x++) - abuf[x] = params->zaColor & 0xffff; - } - } + for (x = params->clipLeft; x < params->clipRight; x++) + abuf[x] = params->zaColor & 0xffff; + } + } else { + for (y = low_y; y < high_y; y++) { + if (voodoo->aux_tiled) { + uint16_t *abuf = (uint16_t *) &voodoo->fb_mem[(params->aux_offset + (y >> 5) * voodoo->aux_row_width + (y & 31) * 128) & voodoo->fb_mask]; + int x; + + for (x = params->clipLeft; x < params->clipRight; x++) { + int x2 = (x & 63) | ((x >> 6) * 128 * 32 / 2); + abuf[x2] = params->zaColor & 0xffff; + } + } else { + uint16_t *abuf = (uint16_t *) &voodoo->fb_mem[(params->aux_offset + y * voodoo->aux_row_width) & voodoo->fb_mask]; + int x; + + for (x = params->clipLeft; x < params->clipRight; x++) + abuf[x] = params->zaColor & 0xffff; } + } } + } } diff --git a/src/video/vid_voodoo_display.c b/src/video/vid_voodoo_display.c index 8e4e952d2..071e29df2 100644 --- a/src/video/vid_voodoo_display.c +++ b/src/video/vid_voodoo_display.c @@ -37,643 +37,609 @@ #include <86box/vid_voodoo_regs.h> #include <86box/vid_voodoo_render.h> - #ifdef ENABLE_VOODOODISP_LOG int voodoodisp_do_log = ENABLE_VOODOODISP_LOG; - static void voodoodisp_log(const char *fmt, ...) { va_list ap; if (voodoodisp_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define voodoodisp_log(fmt, ...) +# define voodoodisp_log(fmt, ...) #endif -void voodoo_update_ncc(voodoo_t *voodoo, int tmu) +void +voodoo_update_ncc(voodoo_t *voodoo, int tmu) { - int tbl; + int tbl; - for (tbl = 0; tbl < 2; tbl++) - { - int col; + for (tbl = 0; tbl < 2; tbl++) { + int col; - for (col = 0; col < 256; col++) - { - int y = (col >> 4), i = (col >> 2) & 3, q = col & 3; - int i_r, i_g, i_b; - int q_r, q_g, q_b; + for (col = 0; col < 256; col++) { + int y = (col >> 4), i = (col >> 2) & 3, q = col & 3; + int i_r, i_g, i_b; + int q_r, q_g, q_b; - y = (voodoo->nccTable[tmu][tbl].y[y >> 2] >> ((y & 3) * 8)) & 0xff; + y = (voodoo->nccTable[tmu][tbl].y[y >> 2] >> ((y & 3) * 8)) & 0xff; - i_r = (voodoo->nccTable[tmu][tbl].i[i] >> 18) & 0x1ff; - if (i_r & 0x100) - i_r |= 0xfffffe00; - i_g = (voodoo->nccTable[tmu][tbl].i[i] >> 9) & 0x1ff; - if (i_g & 0x100) - i_g |= 0xfffffe00; - i_b = voodoo->nccTable[tmu][tbl].i[i] & 0x1ff; - if (i_b & 0x100) - i_b |= 0xfffffe00; + i_r = (voodoo->nccTable[tmu][tbl].i[i] >> 18) & 0x1ff; + if (i_r & 0x100) + i_r |= 0xfffffe00; + i_g = (voodoo->nccTable[tmu][tbl].i[i] >> 9) & 0x1ff; + if (i_g & 0x100) + i_g |= 0xfffffe00; + i_b = voodoo->nccTable[tmu][tbl].i[i] & 0x1ff; + if (i_b & 0x100) + i_b |= 0xfffffe00; - q_r = (voodoo->nccTable[tmu][tbl].q[q] >> 18) & 0x1ff; - if (q_r & 0x100) - q_r |= 0xfffffe00; - q_g = (voodoo->nccTable[tmu][tbl].q[q] >> 9) & 0x1ff; - if (q_g & 0x100) - q_g |= 0xfffffe00; - q_b = voodoo->nccTable[tmu][tbl].q[q] & 0x1ff; - if (q_b & 0x100) - q_b |= 0xfffffe00; + q_r = (voodoo->nccTable[tmu][tbl].q[q] >> 18) & 0x1ff; + if (q_r & 0x100) + q_r |= 0xfffffe00; + q_g = (voodoo->nccTable[tmu][tbl].q[q] >> 9) & 0x1ff; + if (q_g & 0x100) + q_g |= 0xfffffe00; + q_b = voodoo->nccTable[tmu][tbl].q[q] & 0x1ff; + if (q_b & 0x100) + q_b |= 0xfffffe00; - voodoo->ncc_lookup[tmu][tbl][col].rgba.r = CLAMP(y + i_r + q_r); - voodoo->ncc_lookup[tmu][tbl][col].rgba.g = CLAMP(y + i_g + q_g); - voodoo->ncc_lookup[tmu][tbl][col].rgba.b = CLAMP(y + i_b + q_b); - voodoo->ncc_lookup[tmu][tbl][col].rgba.a = 0xff; - } + voodoo->ncc_lookup[tmu][tbl][col].rgba.r = CLAMP(y + i_r + q_r); + voodoo->ncc_lookup[tmu][tbl][col].rgba.g = CLAMP(y + i_g + q_g); + voodoo->ncc_lookup[tmu][tbl][col].rgba.b = CLAMP(y + i_b + q_b); + voodoo->ncc_lookup[tmu][tbl][col].rgba.a = 0xff; } + } } -void voodoo_pixelclock_update(voodoo_t *voodoo) +void +voodoo_pixelclock_update(voodoo_t *voodoo) { - int m = (voodoo->dac_pll_regs[0] & 0x7f) + 2; - int n1 = ((voodoo->dac_pll_regs[0] >> 8) & 0x1f) + 2; - int n2 = ((voodoo->dac_pll_regs[0] >> 13) & 0x07); - float t = (14318184.0 * ((float)m / (float)n1)) / (float)(1 << n2); - double clock_const; - int line_length; + int m = (voodoo->dac_pll_regs[0] & 0x7f) + 2; + int n1 = ((voodoo->dac_pll_regs[0] >> 8) & 0x1f) + 2; + int n2 = ((voodoo->dac_pll_regs[0] >> 13) & 0x07); + float t = (14318184.0 * ((float) m / (float) n1)) / (float) (1 << n2); + double clock_const; + int line_length; - if ((voodoo->dac_data[6] & 0xf0) == 0x20 || - (voodoo->dac_data[6] & 0xf0) == 0x60 || - (voodoo->dac_data[6] & 0xf0) == 0x70) - t /= 2.0f; + if ((voodoo->dac_data[6] & 0xf0) == 0x20 || (voodoo->dac_data[6] & 0xf0) == 0x60 || (voodoo->dac_data[6] & 0xf0) == 0x70) + t /= 2.0f; - line_length = (voodoo->hSync & 0xff) + ((voodoo->hSync >> 16) & 0x3ff); + line_length = (voodoo->hSync & 0xff) + ((voodoo->hSync >> 16) & 0x3ff); -// voodoodisp_log("Pixel clock %f MHz hsync %08x line_length %d\n", t, voodoo->hSync, line_length); + // voodoodisp_log("Pixel clock %f MHz hsync %08x line_length %d\n", t, voodoo->hSync, line_length); - voodoo->pixel_clock = t; + voodoo->pixel_clock = t; - clock_const = cpuclock / t; - voodoo->line_time = (uint64_t)((double)line_length * clock_const * (double)(1ull << 32)); + clock_const = cpuclock / t; + voodoo->line_time = (uint64_t) ((double) line_length * clock_const * (double) (1ull << 32)); } -static void voodoo_calc_clutData(voodoo_t *voodoo) +static void +voodoo_calc_clutData(voodoo_t *voodoo) { - int c; + int c; - for (c = 0; c < 256; c++) - { - voodoo->clutData256[c].r = (voodoo->clutData[c >> 3].r*(8-(c & 7)) + - voodoo->clutData[(c >> 3)+1].r*(c & 7)) >> 3; - voodoo->clutData256[c].g = (voodoo->clutData[c >> 3].g*(8-(c & 7)) + - voodoo->clutData[(c >> 3)+1].g*(c & 7)) >> 3; - voodoo->clutData256[c].b = (voodoo->clutData[c >> 3].b*(8-(c & 7)) + - voodoo->clutData[(c >> 3)+1].b*(c & 7)) >> 3; - } + for (c = 0; c < 256; c++) { + voodoo->clutData256[c].r = (voodoo->clutData[c >> 3].r * (8 - (c & 7)) + voodoo->clutData[(c >> 3) + 1].r * (c & 7)) >> 3; + voodoo->clutData256[c].g = (voodoo->clutData[c >> 3].g * (8 - (c & 7)) + voodoo->clutData[(c >> 3) + 1].g * (c & 7)) >> 3; + voodoo->clutData256[c].b = (voodoo->clutData[c >> 3].b * (8 - (c & 7)) + voodoo->clutData[(c >> 3) + 1].b * (c & 7)) >> 3; + } - for (c = 0; c < 65536; c++) - { - int r = (c >> 8) & 0xf8; - int g = (c >> 3) & 0xfc; - int b = (c << 3) & 0xf8; -// r |= (r >> 5); -// g |= (g >> 6); -// b |= (b >> 5); + for (c = 0; c < 65536; c++) { + int r = (c >> 8) & 0xf8; + int g = (c >> 3) & 0xfc; + int b = (c << 3) & 0xf8; + // r |= (r >> 5); + // g |= (g >> 6); + // b |= (b >> 5); - voodoo->video_16to32[c] = (voodoo->clutData256[r].r << 16) | (voodoo->clutData256[g].g << 8) | voodoo->clutData256[b].b; - } + voodoo->video_16to32[c] = (voodoo->clutData256[r].r << 16) | (voodoo->clutData256[g].g << 8) | voodoo->clutData256[b].b; + } } - - #define FILTDIV 256 -static int FILTCAP, FILTCAPG, FILTCAPB = 0; /* color filter threshold values */ +static int FILTCAP, FILTCAPG, FILTCAPB = 0; /* color filter threshold values */ -void voodoo_generate_filter_v1(voodoo_t *voodoo) +void +voodoo_generate_filter_v1(voodoo_t *voodoo) { - int g, h; - float difference, diffg, diffb; - float thiscol, thiscolg, thiscolb, lined; - float fcr, fcg, fcb; + int g, h; + float difference, diffg, diffb; + float thiscol, thiscolg, thiscolb, lined; + float fcr, fcg, fcb; - fcr = FILTCAP * 5; - fcg = FILTCAPG * 6; - fcb = FILTCAPB * 5; + fcr = FILTCAP * 5; + fcg = FILTCAPG * 6; + fcb = FILTCAPB * 5; - for (g=0;g FILTCAP) - difference = FILTCAP; - if (difference < -FILTCAP) - difference = -FILTCAP; + if (difference > FILTCAP) + difference = FILTCAP; + if (difference < -FILTCAP) + difference = -FILTCAP; - if (diffg > FILTCAPG) - diffg = FILTCAPG; - if (diffg < -FILTCAPG) - diffg = -FILTCAPG; + if (diffg > FILTCAPG) + diffg = FILTCAPG; + if (diffg < -FILTCAPG) + diffg = -FILTCAPG; - if (diffb > FILTCAPB) - diffb = FILTCAPB; - if (diffb < -FILTCAPB) - diffb = -FILTCAPB; + if (diffb > FILTCAPB) + diffb = FILTCAPB; + if (diffb < -FILTCAPB) + diffb = -FILTCAPB; - // hack - to make it not bleed onto black - //if (g == 0){ - //difference = diffg = diffb = 0; - //} + // hack - to make it not bleed onto black + // if (g == 0){ + // difference = diffg = diffb = 0; + //} - if ((difference < fcr) || (-difference > -fcr)) - thiscol = g + (difference / 2); - if ((diffg < fcg) || (-diffg > -fcg)) - thiscolg = g + (diffg / 2); /* need these divides so we can actually undither! */ - if ((diffb < fcb) || (-diffb > -fcb)) - thiscolb = g + (diffb / 2); + if ((difference < fcr) || (-difference > -fcr)) + thiscol = g + (difference / 2); + if ((diffg < fcg) || (-diffg > -fcg)) + thiscolg = g + (diffg / 2); /* need these divides so we can actually undither! */ + if ((diffb < fcb) || (-diffb > -fcb)) + thiscolb = g + (diffb / 2); - if (thiscol < 0) - thiscol = 0; - if (thiscol > FILTDIV-1) - thiscol = FILTDIV-1; + if (thiscol < 0) + thiscol = 0; + if (thiscol > FILTDIV - 1) + thiscol = FILTDIV - 1; - if (thiscolg < 0) - thiscolg = 0; - if (thiscolg > FILTDIV-1) - thiscolg = FILTDIV-1; + if (thiscolg < 0) + thiscolg = 0; + if (thiscolg > FILTDIV - 1) + thiscolg = FILTDIV - 1; - if (thiscolb < 0) - thiscolb = 0; - if (thiscolb > FILTDIV-1) - thiscolb = FILTDIV-1; + if (thiscolb < 0) + thiscolb = 0; + if (thiscolb > FILTDIV - 1) + thiscolb = FILTDIV - 1; - voodoo->thefilter[g][h] = thiscol; - voodoo->thefilterg[g][h] = thiscolg; - voodoo->thefilterb[g][h] = thiscolb; - } - - lined = g + 4; - if (lined > 255) - lined = 255; - voodoo->purpleline[g][0] = lined; - voodoo->purpleline[g][2] = lined; - - lined = g + 0; - if (lined > 255) - lined = 255; - voodoo->purpleline[g][1] = lined; + voodoo->thefilter[g][h] = thiscol; + voodoo->thefilterg[g][h] = thiscolg; + voodoo->thefilterb[g][h] = thiscolb; } + + lined = g + 4; + if (lined > 255) + lined = 255; + voodoo->purpleline[g][0] = lined; + voodoo->purpleline[g][2] = lined; + + lined = g + 0; + if (lined > 255) + lined = 255; + voodoo->purpleline[g][1] = lined; + } } -void voodoo_generate_filter_v2(voodoo_t *voodoo) +void +voodoo_generate_filter_v2(voodoo_t *voodoo) { - int g, h; - float difference; - float thiscol, thiscolg, thiscolb; - float clr, clg, clb = 0; - float fcr, fcg, fcb = 0; + int g, h; + float difference; + float thiscol, thiscolg, thiscolb; + float clr, clg, clb = 0; + float fcr, fcg, fcb = 0; - // pre-clamping + // pre-clamping - fcr = FILTCAP; - fcg = FILTCAPG; - fcb = FILTCAPB; + fcr = FILTCAP; + fcg = FILTCAPG; + fcb = FILTCAPB; - if (fcr > 32) fcr = 32; - if (fcg > 32) fcg = 32; - if (fcb > 32) fcb = 32; + if (fcr > 32) + fcr = 32; + if (fcg > 32) + fcg = 32; + if (fcb > 32) + fcb = 32; - for (g=0;g<256;g++) // pixel 1 - our target pixel we want to bleed into + for (g = 0; g < 256; g++) // pixel 1 - our target pixel we want to bleed into + { + for (h = 0; h < 256; h++) // pixel 2 - our main pixel { - for (h=0;h<256;h++) // pixel 2 - our main pixel - { - float avg; - float avgdiff; + float avg; + float avgdiff; - difference = (float)(g - h); - avg = (float)((g + g + g + g + h) / 5); - avgdiff = avg - (float)((g + h + h + h + h) / 5); - if (avgdiff < 0) avgdiff *= -1; - if (difference < 0) difference *= -1; + difference = (float) (g - h); + avg = (float) ((g + g + g + g + h) / 5); + avgdiff = avg - (float) ((g + h + h + h + h) / 5); + if (avgdiff < 0) + avgdiff *= -1; + if (difference < 0) + difference *= -1; - thiscol = thiscolg = thiscolb = g; + thiscol = thiscolg = thiscolb = g; - // try lighten - if (h > g) - { - clr = clg = clb = avgdiff; + // try lighten + if (h > g) { + clr = clg = clb = avgdiff; - if (clr>fcr) clr=fcr; - if (clg>fcg) clg=fcg; - if (clb>fcb) clb=fcb; + if (clr > fcr) + clr = fcr; + if (clg > fcg) + clg = fcg; + if (clb > fcb) + clb = fcb; + thiscol = g + clr; + thiscolg = g + clg; + thiscolb = g + clb; - thiscol = g + clr; - thiscolg = g + clg; - thiscolb = g + clb; + if (thiscol > g + FILTCAP) + thiscol = g + FILTCAP; + if (thiscolg > g + FILTCAPG) + thiscolg = g + FILTCAPG; + if (thiscolb > g + FILTCAPB) + thiscolb = g + FILTCAPB; - if (thiscol>g+FILTCAP) - thiscol=g+FILTCAP; - if (thiscolg>g+FILTCAPG) - thiscolg=g+FILTCAPG; - if (thiscolb>g+FILTCAPB) - thiscolb=g+FILTCAPB; + if (thiscol > g + avgdiff) + thiscol = g + avgdiff; + if (thiscolg > g + avgdiff) + thiscolg = g + avgdiff; + if (thiscolb > g + avgdiff) + thiscolb = g + avgdiff; + } + if (difference > FILTCAP) + thiscol = g; + if (difference > FILTCAPG) + thiscolg = g; + if (difference > FILTCAPB) + thiscolb = g; - if (thiscol>g+avgdiff) - thiscol=g+avgdiff; - if (thiscolg>g+avgdiff) - thiscolg=g+avgdiff; - if (thiscolb>g+avgdiff) - thiscolb=g+avgdiff; + // clamp + if (thiscol < 0) + thiscol = 0; + if (thiscolg < 0) + thiscolg = 0; + if (thiscolb < 0) + thiscolb = 0; - } + if (thiscol > 255) + thiscol = 255; + if (thiscolg > 255) + thiscolg = 255; + if (thiscolb > 255) + thiscolb = 255; - if (difference > FILTCAP) - thiscol = g; - if (difference > FILTCAPG) - thiscolg = g; - if (difference > FILTCAPB) - thiscolb = g; - - // clamp - if (thiscol < 0) thiscol = 0; - if (thiscolg < 0) thiscolg = 0; - if (thiscolb < 0) thiscolb = 0; - - if (thiscol > 255) thiscol = 255; - if (thiscolg > 255) thiscolg = 255; - if (thiscolb > 255) thiscolb = 255; - - // add to the table - voodoo->thefilter[g][h] = (thiscol); - voodoo->thefilterg[g][h] = (thiscolg); - voodoo->thefilterb[g][h] = (thiscolb); - - // debug the ones that don't give us much of a difference - //if (difference < FILTCAP) - //voodoodisp_log("Voodoofilter: %ix%i - %f difference, %f average difference, R=%f, G=%f, B=%f\n", g, h, difference, avgdiff, thiscol, thiscolg, thiscolb); - } + // add to the table + voodoo->thefilter[g][h] = (thiscol); + voodoo->thefilterg[g][h] = (thiscolg); + voodoo->thefilterb[g][h] = (thiscolb); + // debug the ones that don't give us much of a difference + // if (difference < FILTCAP) + // voodoodisp_log("Voodoofilter: %ix%i - %f difference, %f average difference, R=%f, G=%f, B=%f\n", g, h, difference, avgdiff, thiscol, thiscolg, thiscolb); } + } } -void voodoo_threshold_check(voodoo_t *voodoo) +void +voodoo_threshold_check(voodoo_t *voodoo) { - int r, g, b; + int r, g, b; - if (!voodoo->scrfilterEnabled) - return; /* considered disabled; don't check and generate */ + if (!voodoo->scrfilterEnabled) + return; /* considered disabled; don't check and generate */ - /* Check for changes, to generate anew table */ - if (voodoo->scrfilterThreshold != voodoo->scrfilterThresholdOld) - { - r = (voodoo->scrfilterThreshold >> 16) & 0xFF; - g = (voodoo->scrfilterThreshold >> 8 ) & 0xFF; - b = voodoo->scrfilterThreshold & 0xFF; + /* Check for changes, to generate anew table */ + if (voodoo->scrfilterThreshold != voodoo->scrfilterThresholdOld) { + r = (voodoo->scrfilterThreshold >> 16) & 0xFF; + g = (voodoo->scrfilterThreshold >> 8) & 0xFF; + b = voodoo->scrfilterThreshold & 0xFF; - FILTCAP = r; - FILTCAPG = g; - FILTCAPB = b; + FILTCAP = r; + FILTCAPG = g; + FILTCAPB = b; - voodoodisp_log("Voodoo Filter Threshold Check: %06x - RED %i GREEN %i BLUE %i\n", voodoo->scrfilterThreshold, r, g, b); + voodoodisp_log("Voodoo Filter Threshold Check: %06x - RED %i GREEN %i BLUE %i\n", voodoo->scrfilterThreshold, r, g, b); - voodoo->scrfilterThresholdOld = voodoo->scrfilterThreshold; + voodoo->scrfilterThresholdOld = voodoo->scrfilterThreshold; - if (voodoo->type == VOODOO_2) - voodoo_generate_filter_v2(voodoo); - else - voodoo_generate_filter_v1(voodoo); - - if (voodoo->type >= VOODOO_BANSHEE) - voodoo_generate_vb_filters(voodoo, FILTCAP, FILTCAPG); - } -} - -static void voodoo_filterline_v1(voodoo_t *voodoo, uint8_t *fil, int column, uint16_t *src, int line) -{ - int x; - - // Scratchpad for avoiding feedback streaks - uint8_t *fil3 = malloc((voodoo->h_disp) * 3); - - /* 16 to 32-bit */ - for (x=0; x> 5) & 63) << 2); - fil[x*3+2] = (((src[x] >> 11) & 31) << 3); - - // Copy to our scratchpads - fil3[x*3+0] = fil[x*3+0]; - fil3[x*3+1] = fil[x*3+1]; - fil3[x*3+2] = fil[x*3+2]; - } - - - /* lines */ - - if (line & 1) - { - for (x=0; xpurpleline[fil[x*3]][0]; - fil[x*3+1] = voodoo->purpleline[fil[x*3+1]][1]; - fil[x*3+2] = voodoo->purpleline[fil[x*3+2]][2]; - } - } - - - /* filtering time */ - - for (x=1; xthefilterb[fil[x*3]][fil[ (x-1) *3]]; - fil3[(x)*3+1] = voodoo->thefilterg[fil[x*3+1]][fil[ (x-1) *3+1]]; - fil3[(x)*3+2] = voodoo->thefilter[fil[x*3+2]][fil[ (x-1) *3+2]]; - } - - for (x=1; xthefilterb[fil3[x*3]][fil3[ (x-1) *3]]; - fil[(x)*3+1] = voodoo->thefilterg[fil3[x*3+1]][fil3[ (x-1) *3+1]]; - fil[(x)*3+2] = voodoo->thefilter[fil3[x*3+2]][fil3[ (x-1) *3+2]]; - } - - for (x=1; xthefilterb[fil[x*3]][fil[ (x-1) *3]]; - fil3[(x)*3+1] = voodoo->thefilterg[fil[x*3+1]][fil[ (x-1) *3+1]]; - fil3[(x)*3+2] = voodoo->thefilter[fil[x*3+2]][fil[ (x-1) *3+2]]; - } - - for (x=0; xthefilterb[fil3[x*3]][fil3[ (x+1) *3]]; - fil[(x)*3+1] = voodoo->thefilterg[fil3[x*3+1]][fil3[ (x+1) *3+1]]; - fil[(x)*3+2] = voodoo->thefilter[fil3[x*3+2]][fil3[ (x+1) *3+2]]; - } - - free(fil3); -} - - -static void voodoo_filterline_v2(voodoo_t *voodoo, uint8_t *fil, int column, uint16_t *src, int line) -{ - int x; - - // Scratchpad for blending filter - uint8_t *fil3 = malloc((voodoo->h_disp) * 3); - - /* 16 to 32-bit */ - for (x=0; x> 5) & 63) << 2); - fil3[x*3+2] = fil[x*3+2] = (((src[x] >> 11) & 31) << 3); - } - - /* filtering time */ - - for (x=1; xthefilterb [((src[x+3] & 31) << 3)] [((src[x] & 31) << 3)]; - fil3[(x+3)*3+1] = voodoo->thefilterg [(((src[x+3] >> 5) & 63) << 2)] [(((src[x] >> 5) & 63) << 2)]; - fil3[(x+3)*3+2] = voodoo->thefilter [(((src[x+3] >> 11) & 31) << 3)] [(((src[x] >> 11) & 31) << 3)]; - - fil[(x+2)*3] = voodoo->thefilterb [fil3[(x+2)*3]][((src[x] & 31) << 3)]; - fil[(x+2)*3+1] = voodoo->thefilterg [fil3[(x+2)*3+1]][(((src[x] >> 5) & 63) << 2)]; - fil[(x+2)*3+2] = voodoo->thefilter [fil3[(x+2)*3+2]][(((src[x] >> 11) & 31) << 3)]; - - fil3[(x+1)*3] = voodoo->thefilterb [fil[(x+1)*3]][((src[x] & 31) << 3)]; - fil3[(x+1)*3+1] = voodoo->thefilterg [fil[(x+1)*3+1]][(((src[x] >> 5) & 63) << 2)]; - fil3[(x+1)*3+2] = voodoo->thefilter [fil[(x+1)*3+2]][(((src[x] >> 11) & 31) << 3)]; - - fil[(x-1)*3] = voodoo->thefilterb [fil3[(x-1)*3]][((src[x] & 31) << 3)]; - fil[(x-1)*3+1] = voodoo->thefilterg [fil3[(x-1)*3+1]][(((src[x] >> 5) & 63) << 2)]; - fil[(x-1)*3+2] = voodoo->thefilter [fil3[(x-1)*3+2]][(((src[x] >> 11) & 31) << 3)]; - } - - // unroll for edge cases - - fil3[(column-3)*3] = voodoo->thefilterb [((src[column-3] & 31) << 3)] [((src[column] & 31) << 3)]; - fil3[(column-3)*3+1] = voodoo->thefilterg [(((src[column-3] >> 5) & 63) << 2)] [(((src[column] >> 5) & 63) << 2)]; - fil3[(column-3)*3+2] = voodoo->thefilter [(((src[column-3] >> 11) & 31) << 3)] [(((src[column] >> 11) & 31) << 3)]; - - fil3[(column-2)*3] = voodoo->thefilterb [((src[column-2] & 31) << 3)] [((src[column] & 31) << 3)]; - fil3[(column-2)*3+1] = voodoo->thefilterg [(((src[column-2] >> 5) & 63) << 2)] [(((src[column] >> 5) & 63) << 2)]; - fil3[(column-2)*3+2] = voodoo->thefilter [(((src[column-2] >> 11) & 31) << 3)] [(((src[column] >> 11) & 31) << 3)]; - - fil3[(column-1)*3] = voodoo->thefilterb [((src[column-1] & 31) << 3)] [((src[column] & 31) << 3)]; - fil3[(column-1)*3+1] = voodoo->thefilterg [(((src[column-1] >> 5) & 63) << 2)] [(((src[column] >> 5) & 63) << 2)]; - fil3[(column-1)*3+2] = voodoo->thefilter [(((src[column-1] >> 11) & 31) << 3)] [(((src[column] >> 11) & 31) << 3)]; - - fil[(column-2)*3] = voodoo->thefilterb [fil3[(column-2)*3]][((src[column] & 31) << 3)]; - fil[(column-2)*3+1] = voodoo->thefilterg [fil3[(column-2)*3+1]][(((src[column] >> 5) & 63) << 2)]; - fil[(column-2)*3+2] = voodoo->thefilter [fil3[(column-2)*3+2]][(((src[column] >> 11) & 31) << 3)]; - - fil[(column-1)*3] = voodoo->thefilterb [fil3[(column-1)*3]][((src[column] & 31) << 3)]; - fil[(column-1)*3+1] = voodoo->thefilterg [fil3[(column-1)*3+1]][(((src[column] >> 5) & 63) << 2)]; - fil[(column-1)*3+2] = voodoo->thefilter [fil3[(column-1)*3+2]][(((src[column] >> 11) & 31) << 3)]; - - fil3[(column-1)*3] = voodoo->thefilterb [fil[(column-1)*3]][((src[column] & 31) << 3)]; - fil3[(column-1)*3+1] = voodoo->thefilterg [fil[(column-1)*3+1]][(((src[column] >> 5) & 63) << 2)]; - fil3[(column-1)*3+2] = voodoo->thefilter [fil[(column-1)*3+2]][(((src[column] >> 11) & 31) << 3)]; - - free(fil3); -} - -void voodoo_callback(void *p) -{ - voodoo_t *voodoo = (voodoo_t *)p; - - if (voodoo->fbiInit0 & FBIINIT0_VGA_PASS) - { - if (voodoo->line < voodoo->v_disp) - { - voodoo_t *draw_voodoo; - int draw_line; - - if (SLI_ENABLED) - { - if (voodoo == voodoo->set->voodoos[1]) - goto skip_draw; - - if (((voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) ? 1 : 0) == (voodoo->line & 1)) - draw_voodoo = voodoo; - else - draw_voodoo = voodoo->set->voodoos[1]; - draw_line = voodoo->line >> 1; - } - else - { - if (!(voodoo->fbiInit0 & 1)) - goto skip_draw; - draw_voodoo = voodoo; - draw_line = voodoo->line; - } - - if (draw_voodoo->dirty_line[draw_line]) - { - uint32_t *p = &buffer32->line[voodoo->line + 8][8]; - uint16_t *src = (uint16_t *)&draw_voodoo->fb_mem[draw_voodoo->front_offset + draw_line*draw_voodoo->row_width]; - int x; - - draw_voodoo->dirty_line[draw_line] = 0; - - if (voodoo->line < voodoo->dirty_line_low) - { - voodoo->dirty_line_low = voodoo->line; - video_wait_for_buffer(); - } - if (voodoo->line > voodoo->dirty_line_high) - voodoo->dirty_line_high = voodoo->line; - - /* Draw left overscan. */ - for (x = 0; x < 8; x++) - buffer32->line[voodoo->line + 8][x] = 0x00000000; - - if (voodoo->scrfilter && voodoo->scrfilterEnabled) - { - uint8_t *fil = malloc((voodoo->h_disp) * 3); /* interleaved 24-bit RGB */ - - if (voodoo->type == VOODOO_2) - voodoo_filterline_v2(voodoo, fil, voodoo->h_disp, src, voodoo->line); - else - voodoo_filterline_v1(voodoo, fil, voodoo->h_disp, src, voodoo->line); - - for (x = 0; x < voodoo->h_disp; x++) - { - p[x] = (voodoo->clutData256[fil[x*3]].b << 0 | voodoo->clutData256[fil[x*3+1]].g << 8 | voodoo->clutData256[fil[x*3+2]].r << 16); - } - - free(fil); - } - else - { - for (x = 0; x < voodoo->h_disp; x++) - { - p[x] = draw_voodoo->video_16to32[src[x]]; - } - } - - /* Draw right overscan. */ - for (x = 0; x < 8; x++) - buffer32->line[voodoo->line + 8][voodoo->h_disp + x + 8] = 0x00000000; - } - } - } -skip_draw: - if (voodoo->line == voodoo->v_disp) - { -// voodoodisp_log("retrace %i %i %08x %i\n", voodoo->retrace_count, voodoo->swap_interval, voodoo->swap_offset, voodoo->swap_pending); - voodoo->retrace_count++; - if (SLI_ENABLED && (voodoo->fbiInit2 & FBIINIT2_SWAP_ALGORITHM_MASK) == FBIINIT2_SWAP_ALGORITHM_SLI_SYNC) - { - if (voodoo == voodoo->set->voodoos[0]) - { - voodoo_t *voodoo_1 = voodoo->set->voodoos[1]; - - thread_wait_mutex(voodoo->swap_mutex); - /*Only swap if both Voodoos are waiting for buffer swap*/ - if (voodoo->swap_pending && (voodoo->retrace_count > voodoo->swap_interval) && - voodoo_1->swap_pending && (voodoo_1->retrace_count > voodoo_1->swap_interval)) - { - memset(voodoo->dirty_line, 1, 1024); - voodoo->retrace_count = 0; - voodoo->front_offset = voodoo->swap_offset; - if (voodoo->swap_count > 0) - voodoo->swap_count--; - voodoo->swap_pending = 0; - - memset(voodoo_1->dirty_line, 1, 1024); - voodoo_1->retrace_count = 0; - voodoo_1->front_offset = voodoo_1->swap_offset; - if (voodoo_1->swap_count > 0) - voodoo_1->swap_count--; - voodoo_1->swap_pending = 0; - thread_release_mutex(voodoo->swap_mutex); - - thread_set_event(voodoo->wake_fifo_thread); - thread_set_event(voodoo_1->wake_fifo_thread); - - voodoo->frame_count++; - voodoo_1->frame_count++; - } - else - thread_release_mutex(voodoo->swap_mutex); - } - } - else - { - thread_wait_mutex(voodoo->swap_mutex); - if (voodoo->swap_pending && (voodoo->retrace_count > voodoo->swap_interval)) - { - voodoo->front_offset = voodoo->swap_offset; - if (voodoo->swap_count > 0) - voodoo->swap_count--; - voodoo->swap_pending = 0; - thread_release_mutex(voodoo->swap_mutex); - - memset(voodoo->dirty_line, 1, 1024); - voodoo->retrace_count = 0; - thread_set_event(voodoo->wake_fifo_thread); - voodoo->frame_count++; - } - else - thread_release_mutex(voodoo->swap_mutex); - } - voodoo->v_retrace = 1; - } - voodoo->line++; - - if (voodoo->fbiInit0 & FBIINIT0_VGA_PASS) - { - if (voodoo->line == voodoo->v_disp) - { - int force_blit = 0; - thread_wait_mutex(voodoo->force_blit_mutex); - if(voodoo->force_blit_count) { - force_blit = 1; - if(--voodoo->force_blit_count < 0) - voodoo->force_blit_count = 0; - } - thread_release_mutex(voodoo->force_blit_mutex); - - if (voodoo->dirty_line_high > voodoo->dirty_line_low || force_blit) - svga_doblit(voodoo->h_disp, voodoo->v_disp-1, voodoo->svga); - if (voodoo->clutData_dirty) - { - voodoo->clutData_dirty = 0; - voodoo_calc_clutData(voodoo); - } - voodoo->dirty_line_high = -1; - voodoo->dirty_line_low = 2000; - } - } - - if (voodoo->line >= voodoo->v_total) - { - voodoo->line = 0; - voodoo->v_retrace = 0; - } - if (voodoo->line_time) - timer_advance_u64(&voodoo->timer, voodoo->line_time); + if (voodoo->type == VOODOO_2) + voodoo_generate_filter_v2(voodoo); else - timer_advance_u64(&voodoo->timer, TIMER_USEC * 32); + voodoo_generate_filter_v1(voodoo); + + if (voodoo->type >= VOODOO_BANSHEE) + voodoo_generate_vb_filters(voodoo, FILTCAP, FILTCAPG); + } +} + +static void +voodoo_filterline_v1(voodoo_t *voodoo, uint8_t *fil, int column, uint16_t *src, int line) +{ + int x; + + // Scratchpad for avoiding feedback streaks + uint8_t *fil3 = malloc((voodoo->h_disp) * 3); + + /* 16 to 32-bit */ + for (x = 0; x < column; x++) { + fil[x * 3] = ((src[x] & 31) << 3); + fil[x * 3 + 1] = (((src[x] >> 5) & 63) << 2); + fil[x * 3 + 2] = (((src[x] >> 11) & 31) << 3); + + // Copy to our scratchpads + fil3[x * 3 + 0] = fil[x * 3 + 0]; + fil3[x * 3 + 1] = fil[x * 3 + 1]; + fil3[x * 3 + 2] = fil[x * 3 + 2]; + } + + /* lines */ + + if (line & 1) { + for (x = 0; x < column; x++) { + fil[x * 3] = voodoo->purpleline[fil[x * 3]][0]; + fil[x * 3 + 1] = voodoo->purpleline[fil[x * 3 + 1]][1]; + fil[x * 3 + 2] = voodoo->purpleline[fil[x * 3 + 2]][2]; + } + } + + /* filtering time */ + + for (x = 1; x < column; x++) { + fil3[(x) *3] = voodoo->thefilterb[fil[x * 3]][fil[(x - 1) * 3]]; + fil3[(x) *3 + 1] = voodoo->thefilterg[fil[x * 3 + 1]][fil[(x - 1) * 3 + 1]]; + fil3[(x) *3 + 2] = voodoo->thefilter[fil[x * 3 + 2]][fil[(x - 1) * 3 + 2]]; + } + + for (x = 1; x < column; x++) { + fil[(x) *3] = voodoo->thefilterb[fil3[x * 3]][fil3[(x - 1) * 3]]; + fil[(x) *3 + 1] = voodoo->thefilterg[fil3[x * 3 + 1]][fil3[(x - 1) * 3 + 1]]; + fil[(x) *3 + 2] = voodoo->thefilter[fil3[x * 3 + 2]][fil3[(x - 1) * 3 + 2]]; + } + + for (x = 1; x < column; x++) { + fil3[(x) *3] = voodoo->thefilterb[fil[x * 3]][fil[(x - 1) * 3]]; + fil3[(x) *3 + 1] = voodoo->thefilterg[fil[x * 3 + 1]][fil[(x - 1) * 3 + 1]]; + fil3[(x) *3 + 2] = voodoo->thefilter[fil[x * 3 + 2]][fil[(x - 1) * 3 + 2]]; + } + + for (x = 0; x < column - 1; x++) { + fil[(x) *3] = voodoo->thefilterb[fil3[x * 3]][fil3[(x + 1) * 3]]; + fil[(x) *3 + 1] = voodoo->thefilterg[fil3[x * 3 + 1]][fil3[(x + 1) * 3 + 1]]; + fil[(x) *3 + 2] = voodoo->thefilter[fil3[x * 3 + 2]][fil3[(x + 1) * 3 + 2]]; + } + + free(fil3); +} + +static void +voodoo_filterline_v2(voodoo_t *voodoo, uint8_t *fil, int column, uint16_t *src, int line) +{ + int x; + + // Scratchpad for blending filter + uint8_t *fil3 = malloc((voodoo->h_disp) * 3); + + /* 16 to 32-bit */ + for (x = 0; x < column; x++) { + // Blank scratchpads + fil3[x * 3 + 0] = fil[x * 3 + 0] = ((src[x] & 31) << 3); + fil3[x * 3 + 1] = fil[x * 3 + 1] = (((src[x] >> 5) & 63) << 2); + fil3[x * 3 + 2] = fil[x * 3 + 2] = (((src[x] >> 11) & 31) << 3); + } + + /* filtering time */ + + for (x = 1; x < column - 3; x++) { + fil3[(x + 3) * 3] = voodoo->thefilterb[((src[x + 3] & 31) << 3)][((src[x] & 31) << 3)]; + fil3[(x + 3) * 3 + 1] = voodoo->thefilterg[(((src[x + 3] >> 5) & 63) << 2)][(((src[x] >> 5) & 63) << 2)]; + fil3[(x + 3) * 3 + 2] = voodoo->thefilter[(((src[x + 3] >> 11) & 31) << 3)][(((src[x] >> 11) & 31) << 3)]; + + fil[(x + 2) * 3] = voodoo->thefilterb[fil3[(x + 2) * 3]][((src[x] & 31) << 3)]; + fil[(x + 2) * 3 + 1] = voodoo->thefilterg[fil3[(x + 2) * 3 + 1]][(((src[x] >> 5) & 63) << 2)]; + fil[(x + 2) * 3 + 2] = voodoo->thefilter[fil3[(x + 2) * 3 + 2]][(((src[x] >> 11) & 31) << 3)]; + + fil3[(x + 1) * 3] = voodoo->thefilterb[fil[(x + 1) * 3]][((src[x] & 31) << 3)]; + fil3[(x + 1) * 3 + 1] = voodoo->thefilterg[fil[(x + 1) * 3 + 1]][(((src[x] >> 5) & 63) << 2)]; + fil3[(x + 1) * 3 + 2] = voodoo->thefilter[fil[(x + 1) * 3 + 2]][(((src[x] >> 11) & 31) << 3)]; + + fil[(x - 1) * 3] = voodoo->thefilterb[fil3[(x - 1) * 3]][((src[x] & 31) << 3)]; + fil[(x - 1) * 3 + 1] = voodoo->thefilterg[fil3[(x - 1) * 3 + 1]][(((src[x] >> 5) & 63) << 2)]; + fil[(x - 1) * 3 + 2] = voodoo->thefilter[fil3[(x - 1) * 3 + 2]][(((src[x] >> 11) & 31) << 3)]; + } + + // unroll for edge cases + + fil3[(column - 3) * 3] = voodoo->thefilterb[((src[column - 3] & 31) << 3)][((src[column] & 31) << 3)]; + fil3[(column - 3) * 3 + 1] = voodoo->thefilterg[(((src[column - 3] >> 5) & 63) << 2)][(((src[column] >> 5) & 63) << 2)]; + fil3[(column - 3) * 3 + 2] = voodoo->thefilter[(((src[column - 3] >> 11) & 31) << 3)][(((src[column] >> 11) & 31) << 3)]; + + fil3[(column - 2) * 3] = voodoo->thefilterb[((src[column - 2] & 31) << 3)][((src[column] & 31) << 3)]; + fil3[(column - 2) * 3 + 1] = voodoo->thefilterg[(((src[column - 2] >> 5) & 63) << 2)][(((src[column] >> 5) & 63) << 2)]; + fil3[(column - 2) * 3 + 2] = voodoo->thefilter[(((src[column - 2] >> 11) & 31) << 3)][(((src[column] >> 11) & 31) << 3)]; + + fil3[(column - 1) * 3] = voodoo->thefilterb[((src[column - 1] & 31) << 3)][((src[column] & 31) << 3)]; + fil3[(column - 1) * 3 + 1] = voodoo->thefilterg[(((src[column - 1] >> 5) & 63) << 2)][(((src[column] >> 5) & 63) << 2)]; + fil3[(column - 1) * 3 + 2] = voodoo->thefilter[(((src[column - 1] >> 11) & 31) << 3)][(((src[column] >> 11) & 31) << 3)]; + + fil[(column - 2) * 3] = voodoo->thefilterb[fil3[(column - 2) * 3]][((src[column] & 31) << 3)]; + fil[(column - 2) * 3 + 1] = voodoo->thefilterg[fil3[(column - 2) * 3 + 1]][(((src[column] >> 5) & 63) << 2)]; + fil[(column - 2) * 3 + 2] = voodoo->thefilter[fil3[(column - 2) * 3 + 2]][(((src[column] >> 11) & 31) << 3)]; + + fil[(column - 1) * 3] = voodoo->thefilterb[fil3[(column - 1) * 3]][((src[column] & 31) << 3)]; + fil[(column - 1) * 3 + 1] = voodoo->thefilterg[fil3[(column - 1) * 3 + 1]][(((src[column] >> 5) & 63) << 2)]; + fil[(column - 1) * 3 + 2] = voodoo->thefilter[fil3[(column - 1) * 3 + 2]][(((src[column] >> 11) & 31) << 3)]; + + fil3[(column - 1) * 3] = voodoo->thefilterb[fil[(column - 1) * 3]][((src[column] & 31) << 3)]; + fil3[(column - 1) * 3 + 1] = voodoo->thefilterg[fil[(column - 1) * 3 + 1]][(((src[column] >> 5) & 63) << 2)]; + fil3[(column - 1) * 3 + 2] = voodoo->thefilter[fil[(column - 1) * 3 + 2]][(((src[column] >> 11) & 31) << 3)]; + + free(fil3); +} + +void +voodoo_callback(void *p) +{ + voodoo_t *voodoo = (voodoo_t *) p; + + if (voodoo->fbiInit0 & FBIINIT0_VGA_PASS) { + if (voodoo->line < voodoo->v_disp) { + voodoo_t *draw_voodoo; + int draw_line; + + if (SLI_ENABLED) { + if (voodoo == voodoo->set->voodoos[1]) + goto skip_draw; + + if (((voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) ? 1 : 0) == (voodoo->line & 1)) + draw_voodoo = voodoo; + else + draw_voodoo = voodoo->set->voodoos[1]; + draw_line = voodoo->line >> 1; + } else { + if (!(voodoo->fbiInit0 & 1)) + goto skip_draw; + draw_voodoo = voodoo; + draw_line = voodoo->line; + } + + if (draw_voodoo->dirty_line[draw_line]) { + uint32_t *p = &buffer32->line[voodoo->line + 8][8]; + uint16_t *src = (uint16_t *) &draw_voodoo->fb_mem[draw_voodoo->front_offset + draw_line * draw_voodoo->row_width]; + int x; + + draw_voodoo->dirty_line[draw_line] = 0; + + if (voodoo->line < voodoo->dirty_line_low) { + voodoo->dirty_line_low = voodoo->line; + video_wait_for_buffer(); + } + if (voodoo->line > voodoo->dirty_line_high) + voodoo->dirty_line_high = voodoo->line; + + /* Draw left overscan. */ + for (x = 0; x < 8; x++) + buffer32->line[voodoo->line + 8][x] = 0x00000000; + + if (voodoo->scrfilter && voodoo->scrfilterEnabled) { + uint8_t *fil = malloc((voodoo->h_disp) * 3); /* interleaved 24-bit RGB */ + + if (voodoo->type == VOODOO_2) + voodoo_filterline_v2(voodoo, fil, voodoo->h_disp, src, voodoo->line); + else + voodoo_filterline_v1(voodoo, fil, voodoo->h_disp, src, voodoo->line); + + for (x = 0; x < voodoo->h_disp; x++) { + p[x] = (voodoo->clutData256[fil[x * 3]].b << 0 | voodoo->clutData256[fil[x * 3 + 1]].g << 8 | voodoo->clutData256[fil[x * 3 + 2]].r << 16); + } + + free(fil); + } else { + for (x = 0; x < voodoo->h_disp; x++) { + p[x] = draw_voodoo->video_16to32[src[x]]; + } + } + + /* Draw right overscan. */ + for (x = 0; x < 8; x++) + buffer32->line[voodoo->line + 8][voodoo->h_disp + x + 8] = 0x00000000; + } + } + } +skip_draw: + if (voodoo->line == voodoo->v_disp) { + // voodoodisp_log("retrace %i %i %08x %i\n", voodoo->retrace_count, voodoo->swap_interval, voodoo->swap_offset, voodoo->swap_pending); + voodoo->retrace_count++; + if (SLI_ENABLED && (voodoo->fbiInit2 & FBIINIT2_SWAP_ALGORITHM_MASK) == FBIINIT2_SWAP_ALGORITHM_SLI_SYNC) { + if (voodoo == voodoo->set->voodoos[0]) { + voodoo_t *voodoo_1 = voodoo->set->voodoos[1]; + + thread_wait_mutex(voodoo->swap_mutex); + /*Only swap if both Voodoos are waiting for buffer swap*/ + if (voodoo->swap_pending && (voodoo->retrace_count > voodoo->swap_interval) && voodoo_1->swap_pending && (voodoo_1->retrace_count > voodoo_1->swap_interval)) { + memset(voodoo->dirty_line, 1, 1024); + voodoo->retrace_count = 0; + voodoo->front_offset = voodoo->swap_offset; + if (voodoo->swap_count > 0) + voodoo->swap_count--; + voodoo->swap_pending = 0; + + memset(voodoo_1->dirty_line, 1, 1024); + voodoo_1->retrace_count = 0; + voodoo_1->front_offset = voodoo_1->swap_offset; + if (voodoo_1->swap_count > 0) + voodoo_1->swap_count--; + voodoo_1->swap_pending = 0; + thread_release_mutex(voodoo->swap_mutex); + + thread_set_event(voodoo->wake_fifo_thread); + thread_set_event(voodoo_1->wake_fifo_thread); + + voodoo->frame_count++; + voodoo_1->frame_count++; + } else + thread_release_mutex(voodoo->swap_mutex); + } + } else { + thread_wait_mutex(voodoo->swap_mutex); + if (voodoo->swap_pending && (voodoo->retrace_count > voodoo->swap_interval)) { + voodoo->front_offset = voodoo->swap_offset; + if (voodoo->swap_count > 0) + voodoo->swap_count--; + voodoo->swap_pending = 0; + thread_release_mutex(voodoo->swap_mutex); + + memset(voodoo->dirty_line, 1, 1024); + voodoo->retrace_count = 0; + thread_set_event(voodoo->wake_fifo_thread); + voodoo->frame_count++; + } else + thread_release_mutex(voodoo->swap_mutex); + } + voodoo->v_retrace = 1; + } + voodoo->line++; + + if (voodoo->fbiInit0 & FBIINIT0_VGA_PASS) { + if (voodoo->line == voodoo->v_disp) { + int force_blit = 0; + thread_wait_mutex(voodoo->force_blit_mutex); + if (voodoo->force_blit_count) { + force_blit = 1; + if (--voodoo->force_blit_count < 0) + voodoo->force_blit_count = 0; + } + thread_release_mutex(voodoo->force_blit_mutex); + + if (voodoo->dirty_line_high > voodoo->dirty_line_low || force_blit) + svga_doblit(voodoo->h_disp, voodoo->v_disp - 1, voodoo->svga); + if (voodoo->clutData_dirty) { + voodoo->clutData_dirty = 0; + voodoo_calc_clutData(voodoo); + } + voodoo->dirty_line_high = -1; + voodoo->dirty_line_low = 2000; + } + } + + if (voodoo->line >= voodoo->v_total) { + voodoo->line = 0; + voodoo->v_retrace = 0; + } + if (voodoo->line_time) + timer_advance_u64(&voodoo->timer, voodoo->line_time); + else + timer_advance_u64(&voodoo->timer, TIMER_USEC * 32); } diff --git a/src/video/vid_voodoo_fb.c b/src/video/vid_voodoo_fb.c index 3ab482bff..76c860239 100644 --- a/src/video/vid_voodoo_fb.c +++ b/src/video/vid_voodoo_fb.c @@ -38,7 +38,6 @@ #include <86box/vid_voodoo_render.h> #include <86box/vid_voodoo_fb.h> - #ifdef ENABLE_VOODOO_FB_LOG int voodoo_fb_do_log = ENABLE_VOODOO_FB_LOG; @@ -48,447 +47,402 @@ voodoo_fb_log(const char *fmt, ...) va_list ap; if (voodoo_fb_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define voodoo_fb_log(fmt, ...) +# define voodoo_fb_log(fmt, ...) #endif - -uint16_t voodoo_fb_readw(uint32_t addr, void *p) +uint16_t +voodoo_fb_readw(uint32_t addr, void *p) { - voodoo_t *voodoo = (voodoo_t *)p; - int x, y; - uint32_t read_addr; - uint16_t temp; + voodoo_t *voodoo = (voodoo_t *) p; + int x, y; + uint32_t read_addr; + uint16_t temp; - if (voodoo->type >= VOODOO_BANSHEE) - { - x = addr & 0xffe; - y = (addr >> 12) & 0x3ff; - } + if (voodoo->type >= VOODOO_BANSHEE) { + x = addr & 0xffe; + y = (addr >> 12) & 0x3ff; + } else { + x = addr & 0x7fe; + y = (addr >> 11) & 0x3ff; + } + + if (SLI_ENABLED) { + voodoo_set_t *set = voodoo->set; + + if (y & 1) + voodoo = set->voodoos[1]; else - { - x = addr & 0x7fe; - y = (addr >> 11) & 0x3ff; - } + voodoo = set->voodoos[0]; - if (SLI_ENABLED) - { - voodoo_set_t *set = voodoo->set; + y >>= 1; + } - if (y & 1) - voodoo = set->voodoos[1]; - else - voodoo = set->voodoos[0]; + if (voodoo->col_tiled) + read_addr = voodoo->fb_read_offset + (x & 127) + (x >> 7) * 128 * 32 + (y & 31) * 128 + (y >> 5) * voodoo->row_width; + else + read_addr = voodoo->fb_read_offset + x + (y * voodoo->row_width); - y >>= 1; - } + if (read_addr > voodoo->fb_mask) + return 0xffff; - if (voodoo->col_tiled) - read_addr = voodoo->fb_read_offset + (x & 127) + (x >> 7) * 128*32 + (y & 31) * 128 + (y >> 5) * voodoo->row_width; - else - read_addr = voodoo->fb_read_offset + x + (y * voodoo->row_width); + temp = *(uint16_t *) (&voodoo->fb_mem[read_addr & voodoo->fb_mask]); - if (read_addr > voodoo->fb_mask) - return 0xffff; - - temp = *(uint16_t *)(&voodoo->fb_mem[read_addr & voodoo->fb_mask]); - -// voodoo_fb_log("voodoo_fb_readw : %08X %08X %i %i %08X %08X %08x:%08x %i\n", addr, temp, x, y, read_addr, *(uint32_t *)(&voodoo->fb_mem[4]), cs, pc, fb_reads++); - return temp; + // voodoo_fb_log("voodoo_fb_readw : %08X %08X %i %i %08X %08X %08x:%08x %i\n", addr, temp, x, y, read_addr, *(uint32_t *)(&voodoo->fb_mem[4]), cs, pc, fb_reads++); + return temp; } -uint32_t voodoo_fb_readl(uint32_t addr, void *p) +uint32_t +voodoo_fb_readl(uint32_t addr, void *p) { - voodoo_t *voodoo = (voodoo_t *)p; - int x, y; - uint32_t read_addr; - uint32_t temp; + voodoo_t *voodoo = (voodoo_t *) p; + int x, y; + uint32_t read_addr; + uint32_t temp; - if (voodoo->type >= VOODOO_BANSHEE) - { - x = addr & 0xffe; - y = (addr >> 12) & 0x3ff; - } + if (voodoo->type >= VOODOO_BANSHEE) { + x = addr & 0xffe; + y = (addr >> 12) & 0x3ff; + } else { + x = addr & 0x7fe; + y = (addr >> 11) & 0x3ff; + } + + if (SLI_ENABLED) { + voodoo_set_t *set = voodoo->set; + + if (y & 1) + voodoo = set->voodoos[1]; else - { - x = addr & 0x7fe; - y = (addr >> 11) & 0x3ff; - } + voodoo = set->voodoos[0]; - if (SLI_ENABLED) - { - voodoo_set_t *set = voodoo->set; + y >>= 1; + } - if (y & 1) - voodoo = set->voodoos[1]; - else - voodoo = set->voodoos[0]; + if (voodoo->col_tiled) + read_addr = voodoo->fb_read_offset + (x & 127) + (x >> 7) * 128 * 32 + (y & 31) * 128 + (y >> 5) * voodoo->row_width; + else + read_addr = voodoo->fb_read_offset + x + (y * voodoo->row_width); - y >>= 1; - } + if (read_addr > voodoo->fb_mask) + return 0xffffffff; - if (voodoo->col_tiled) - read_addr = voodoo->fb_read_offset + (x & 127) + (x >> 7) * 128*32 + (y & 31) * 128 + (y >> 5) * voodoo->row_width; - else - read_addr = voodoo->fb_read_offset + x + (y * voodoo->row_width); + temp = *(uint32_t *) (&voodoo->fb_mem[read_addr & voodoo->fb_mask]); - if (read_addr > voodoo->fb_mask) - return 0xffffffff; - - temp = *(uint32_t *)(&voodoo->fb_mem[read_addr & voodoo->fb_mask]); - -// voodoo_fb_log("voodoo_fb_readl : %08X %08x %08X x=%i y=%i %08X %08X %08x:%08x %i ro=%08x rw=%i\n", addr, read_addr, temp, x, y, read_addr, *(uint32_t *)(&voodoo->fb_mem[4]), cs, pc, fb_reads++, voodoo->fb_read_offset, voodoo->row_width); - return temp; + // voodoo_fb_log("voodoo_fb_readl : %08X %08x %08X x=%i y=%i %08X %08X %08x:%08x %i ro=%08x rw=%i\n", addr, read_addr, temp, x, y, read_addr, *(uint32_t *)(&voodoo->fb_mem[4]), cs, pc, fb_reads++, voodoo->fb_read_offset, voodoo->row_width); + return temp; } -static inline uint16_t do_dither(voodoo_params_t *params, rgba8_t col, int x, int y) +static inline uint16_t +do_dither(voodoo_params_t *params, rgba8_t col, int x, int y) { - int r, g, b; + int r, g, b; - if (dither) - { - if (dither2x2) - { - r = dither_rb2x2[col.r][y & 1][x & 1]; - g = dither_g2x2[col.g][y & 1][x & 1]; - b = dither_rb2x2[col.b][y & 1][x & 1]; - } - else - { - r = dither_rb[col.r][y & 3][x & 3]; - g = dither_g[col.g][y & 3][x & 3]; - b = dither_rb[col.b][y & 3][x & 3]; - } - } - else - { - r = col.r >> 3; - g = col.g >> 2; - b = col.b >> 3; + if (dither) { + if (dither2x2) { + r = dither_rb2x2[col.r][y & 1][x & 1]; + g = dither_g2x2[col.g][y & 1][x & 1]; + b = dither_rb2x2[col.b][y & 1][x & 1]; + } else { + r = dither_rb[col.r][y & 3][x & 3]; + g = dither_g[col.g][y & 3][x & 3]; + b = dither_rb[col.b][y & 3][x & 3]; } + } else { + r = col.r >> 3; + g = col.g >> 2; + b = col.b >> 3; + } - return b | (g << 5) | (r << 11); + return b | (g << 5) | (r << 11); } -void voodoo_fb_writew(uint32_t addr, uint16_t val, void *p) +void +voodoo_fb_writew(uint32_t addr, uint16_t val, void *p) { - voodoo_t *voodoo = (voodoo_t *)p; - voodoo_params_t *params = &voodoo->params; - int x, y; - uint32_t write_addr, write_addr_aux; - rgba8_t colour_data; - uint16_t depth_data; - uint8_t alpha_data; - int write_mask = 0; + voodoo_t *voodoo = (voodoo_t *) p; + voodoo_params_t *params = &voodoo->params; + int x, y; + uint32_t write_addr, write_addr_aux; + rgba8_t colour_data; + uint16_t depth_data; + uint8_t alpha_data; + int write_mask = 0; - colour_data.r = colour_data.g = colour_data.b = colour_data.a = 0; + colour_data.r = colour_data.g = colour_data.b = colour_data.a = 0; - depth_data = voodoo->params.zaColor & 0xffff; - alpha_data = voodoo->params.zaColor >> 24; + depth_data = voodoo->params.zaColor & 0xffff; + alpha_data = voodoo->params.zaColor >> 24; -// while (!RB_EMPTY) -// thread_reset_event(voodoo->not_full_event); + // while (!RB_EMPTY) + // thread_reset_event(voodoo->not_full_event); -// voodoo_fb_log("voodoo_fb_writew : %08X %04X\n", addr, val); + // voodoo_fb_log("voodoo_fb_writew : %08X %04X\n", addr, val); + switch (voodoo->lfbMode & LFB_FORMAT_MASK) { + case LFB_FORMAT_RGB565: + colour_data = rgb565[val]; + alpha_data = 0xff; + write_mask = LFB_WRITE_COLOUR; + break; + case LFB_FORMAT_RGB555: + colour_data = argb1555[val]; + alpha_data = 0xff; + write_mask = LFB_WRITE_COLOUR; + break; + case LFB_FORMAT_ARGB1555: + colour_data = argb1555[val]; + alpha_data = colour_data.a; + write_mask = LFB_WRITE_COLOUR; + break; + case LFB_FORMAT_DEPTH: + depth_data = val; + write_mask = LFB_WRITE_DEPTH; + break; - switch (voodoo->lfbMode & LFB_FORMAT_MASK) + default: + fatal("voodoo_fb_writew : bad LFB format %08X\n", voodoo->lfbMode); + } + + if (voodoo->type >= VOODOO_BANSHEE) { + x = addr & 0xffe; + y = (addr >> 12) & 0x3ff; + } else { + x = addr & 0x7fe; + y = (addr >> 11) & 0x3ff; + } + + if (SLI_ENABLED) { + if ((!(voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && (y & 1)) || ((voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && !(y & 1))) + return; + y >>= 1; + } + + if (voodoo->fb_write_offset == voodoo->params.front_offset && y < 2048) + voodoo->dirty_line[y] = 1; + + if (voodoo->col_tiled) + write_addr = voodoo->fb_write_offset + (x & 127) + (x >> 7) * 128 * 32 + (y & 31) * 128 + (y >> 5) * voodoo->row_width; + else + write_addr = voodoo->fb_write_offset + x + (y * voodoo->row_width); + if (voodoo->aux_tiled) + write_addr_aux = voodoo->params.aux_offset + (x & 127) + (x >> 7) * 128 * 32 + (y & 31) * 128 + (y >> 5) * voodoo->row_width; + else + write_addr_aux = voodoo->params.aux_offset + x + (y * voodoo->row_width); + + // voodoo_fb_log("fb_writew %08x %i %i %i %08x\n", addr, x, y, voodoo->row_width, write_addr); + + if (voodoo->lfbMode & 0x100) { { - case LFB_FORMAT_RGB565: - colour_data = rgb565[val]; - alpha_data = 0xff; - write_mask = LFB_WRITE_COLOUR; - break; - case LFB_FORMAT_RGB555: - colour_data = argb1555[val]; - alpha_data = 0xff; - write_mask = LFB_WRITE_COLOUR; - break; - case LFB_FORMAT_ARGB1555: - colour_data = argb1555[val]; - alpha_data = colour_data.a; - write_mask = LFB_WRITE_COLOUR; - break; - case LFB_FORMAT_DEPTH: - depth_data = val; - write_mask = LFB_WRITE_DEPTH; - break; + rgba8_t write_data = colour_data; + uint16_t new_depth = depth_data; - default: - fatal("voodoo_fb_writew : bad LFB format %08X\n", voodoo->lfbMode); - } + if (params->fbzMode & FBZ_DEPTH_ENABLE) { + uint16_t old_depth = *(uint16_t *) (&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]); - if (voodoo->type >= VOODOO_BANSHEE) - { - x = addr & 0xffe; - y = (addr >> 12) & 0x3ff; - } - else - { - x = addr & 0x7fe; - y = (addr >> 11) & 0x3ff; - } + DEPTH_TEST(new_depth); + } - if (SLI_ENABLED) - { - if ((!(voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && (y & 1)) || - ((voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && !(y & 1))) - return; - y >>= 1; - } + if ((params->fbzMode & FBZ_CHROMAKEY) && write_data.r == params->chromaKey_r && write_data.g == params->chromaKey_g && write_data.b == params->chromaKey_b) + goto skip_pixel; + if (params->fogMode & FOG_ENABLE) { + int32_t z = new_depth << 12; + int64_t w_depth = (int64_t) (int32_t) new_depth; + int32_t ia = alpha_data << 12; - if (voodoo->fb_write_offset == voodoo->params.front_offset && y < 2048) - voodoo->dirty_line[y] = 1; + APPLY_FOG(write_data.r, write_data.g, write_data.b, z, ia, w_depth); + } - if (voodoo->col_tiled) - write_addr = voodoo->fb_write_offset + (x & 127) + (x >> 7) * 128*32 + (y & 31) * 128 + (y >> 5) * voodoo->row_width; - else - write_addr = voodoo->fb_write_offset + x + (y * voodoo->row_width); - if (voodoo->aux_tiled) - write_addr_aux = voodoo->params.aux_offset + (x & 127) + (x >> 7) * 128*32 + (y & 31) * 128 + (y >> 5) * voodoo->row_width; - else - write_addr_aux = voodoo->params.aux_offset + x + (y * voodoo->row_width); + if (params->alphaMode & 1) + ALPHA_TEST(alpha_data); -// voodoo_fb_log("fb_writew %08x %i %i %i %08x\n", addr, x, y, voodoo->row_width, write_addr); + if (params->alphaMode & (1 << 4)) { + uint16_t dat = *(uint16_t *) (&voodoo->fb_mem[write_addr & voodoo->fb_mask]); + int dest_r, dest_g, dest_b, dest_a; - if (voodoo->lfbMode & 0x100) - { - { - rgba8_t write_data = colour_data; - uint16_t new_depth = depth_data; + dest_r = (dat >> 8) & 0xf8; + dest_g = (dat >> 3) & 0xfc; + dest_b = (dat << 3) & 0xf8; + dest_r |= (dest_r >> 5); + dest_g |= (dest_g >> 6); + dest_b |= (dest_b >> 5); + dest_a = 0xff; - if (params->fbzMode & FBZ_DEPTH_ENABLE) - { - uint16_t old_depth = *(uint16_t *)(&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]); + ALPHA_BLEND(write_data.r, write_data.g, write_data.b, alpha_data); + } - DEPTH_TEST(new_depth); - } - - if ((params->fbzMode & FBZ_CHROMAKEY) && - write_data.r == params->chromaKey_r && - write_data.g == params->chromaKey_g && - write_data.b == params->chromaKey_b) - goto skip_pixel; - - if (params->fogMode & FOG_ENABLE) - { - int32_t z = new_depth << 12; - int64_t w_depth = (int64_t)(int32_t)new_depth; - int32_t ia = alpha_data << 12; - - APPLY_FOG(write_data.r, write_data.g, write_data.b, z, ia, w_depth); - } - - if (params->alphaMode & 1) - ALPHA_TEST(alpha_data); - - if (params->alphaMode & (1 << 4)) - { - uint16_t dat = *(uint16_t *)(&voodoo->fb_mem[write_addr & voodoo->fb_mask]); - int dest_r, dest_g, dest_b, dest_a; - - dest_r = (dat >> 8) & 0xf8; - dest_g = (dat >> 3) & 0xfc; - dest_b = (dat << 3) & 0xf8; - dest_r |= (dest_r >> 5); - dest_g |= (dest_g >> 6); - dest_b |= (dest_b >> 5); - dest_a = 0xff; - - ALPHA_BLEND(write_data.r, write_data.g, write_data.b, alpha_data); - } - - if (params->fbzMode & FBZ_RGB_WMASK) - *(uint16_t *)(&voodoo->fb_mem[write_addr & voodoo->fb_mask]) = do_dither(&voodoo->params, write_data, x >> 1, y); - if (params->fbzMode & FBZ_DEPTH_WMASK) - *(uint16_t *)(&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]) = new_depth; + if (params->fbzMode & FBZ_RGB_WMASK) + *(uint16_t *) (&voodoo->fb_mem[write_addr & voodoo->fb_mask]) = do_dither(&voodoo->params, write_data, x >> 1, y); + if (params->fbzMode & FBZ_DEPTH_WMASK) + *(uint16_t *) (&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]) = new_depth; skip_pixel: - return; - } - } - else - { - if (write_mask & LFB_WRITE_COLOUR) - *(uint16_t *)(&voodoo->fb_mem[write_addr & voodoo->fb_mask]) = do_dither(&voodoo->params, colour_data, x >> 1, y); - if (write_mask & LFB_WRITE_DEPTH) - *(uint16_t *)(&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]) = depth_data; + return; } + } else { + if (write_mask & LFB_WRITE_COLOUR) + *(uint16_t *) (&voodoo->fb_mem[write_addr & voodoo->fb_mask]) = do_dither(&voodoo->params, colour_data, x >> 1, y); + if (write_mask & LFB_WRITE_DEPTH) + *(uint16_t *) (&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]) = depth_data; + } } - -void voodoo_fb_writel(uint32_t addr, uint32_t val, void *p) +void +voodoo_fb_writel(uint32_t addr, uint32_t val, void *p) { - voodoo_t *voodoo = (voodoo_t *)p; - voodoo_params_t *params = &voodoo->params; - int x, y; - uint32_t write_addr, write_addr_aux; - rgba8_t colour_data[2]; - uint16_t depth_data[2]; - uint8_t alpha_data[2]; - int write_mask = 0, count = 1; + voodoo_t *voodoo = (voodoo_t *) p; + voodoo_params_t *params = &voodoo->params; + int x, y; + uint32_t write_addr, write_addr_aux; + rgba8_t colour_data[2]; + uint16_t depth_data[2]; + uint8_t alpha_data[2]; + int write_mask = 0, count = 1; - depth_data[0] = depth_data[1] = voodoo->params.zaColor & 0xffff; - alpha_data[0] = alpha_data[1] = voodoo->params.zaColor >> 24; -// while (!RB_EMPTY) -// thread_reset_event(voodoo->not_full_event); + depth_data[0] = depth_data[1] = voodoo->params.zaColor & 0xffff; + alpha_data[0] = alpha_data[1] = voodoo->params.zaColor >> 24; + // while (!RB_EMPTY) + // thread_reset_event(voodoo->not_full_event); -// voodoo_fb_log("voodoo_fb_writel : %08X %08X\n", addr, val); + // voodoo_fb_log("voodoo_fb_writel : %08X %08X\n", addr, val); - switch (voodoo->lfbMode & LFB_FORMAT_MASK) - { - case LFB_FORMAT_RGB565: - colour_data[0] = rgb565[val & 0xffff]; - colour_data[1] = rgb565[val >> 16]; - write_mask = LFB_WRITE_COLOUR; - count = 2; - break; - case LFB_FORMAT_RGB555: - colour_data[0] = argb1555[val & 0xffff]; - colour_data[1] = argb1555[val >> 16]; - write_mask = LFB_WRITE_COLOUR; - count = 2; - break; - case LFB_FORMAT_ARGB1555: - colour_data[0] = argb1555[val & 0xffff]; - alpha_data[0] = colour_data[0].a; - colour_data[1] = argb1555[val >> 16]; - alpha_data[1] = colour_data[1].a; - write_mask = LFB_WRITE_COLOUR; - count = 2; - break; + switch (voodoo->lfbMode & LFB_FORMAT_MASK) { + case LFB_FORMAT_RGB565: + colour_data[0] = rgb565[val & 0xffff]; + colour_data[1] = rgb565[val >> 16]; + write_mask = LFB_WRITE_COLOUR; + count = 2; + break; + case LFB_FORMAT_RGB555: + colour_data[0] = argb1555[val & 0xffff]; + colour_data[1] = argb1555[val >> 16]; + write_mask = LFB_WRITE_COLOUR; + count = 2; + break; + case LFB_FORMAT_ARGB1555: + colour_data[0] = argb1555[val & 0xffff]; + alpha_data[0] = colour_data[0].a; + colour_data[1] = argb1555[val >> 16]; + alpha_data[1] = colour_data[1].a; + write_mask = LFB_WRITE_COLOUR; + count = 2; + break; - case LFB_FORMAT_ARGB8888: - colour_data[0].b = val & 0xff; - colour_data[0].g = (val >> 8) & 0xff; - colour_data[0].r = (val >> 16) & 0xff; - alpha_data[0] = (val >> 24) & 0xff; - write_mask = LFB_WRITE_COLOUR; - addr >>= 1; - break; + case LFB_FORMAT_ARGB8888: + colour_data[0].b = val & 0xff; + colour_data[0].g = (val >> 8) & 0xff; + colour_data[0].r = (val >> 16) & 0xff; + alpha_data[0] = (val >> 24) & 0xff; + write_mask = LFB_WRITE_COLOUR; + addr >>= 1; + break; - case LFB_FORMAT_DEPTH: - depth_data[0] = val; - depth_data[1] = val >> 16; - write_mask = LFB_WRITE_DEPTH; - count = 2; - break; + case LFB_FORMAT_DEPTH: + depth_data[0] = val; + depth_data[1] = val >> 16; + write_mask = LFB_WRITE_DEPTH; + count = 2; + break; - default: - fatal("voodoo_fb_writel : bad LFB format %08X\n", voodoo->lfbMode); - } + default: + fatal("voodoo_fb_writel : bad LFB format %08X\n", voodoo->lfbMode); + } - if (voodoo->type >= VOODOO_BANSHEE) - { - x = addr & 0xffe; - y = (addr >> 12) & 0x3ff; - } - else - { - x = addr & 0x7fe; - y = (addr >> 11) & 0x3ff; - } + if (voodoo->type >= VOODOO_BANSHEE) { + x = addr & 0xffe; + y = (addr >> 12) & 0x3ff; + } else { + x = addr & 0x7fe; + y = (addr >> 11) & 0x3ff; + } - if (SLI_ENABLED) - { - if ((!(voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && (y & 1)) || - ((voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && !(y & 1))) - return; - y >>= 1; - } + if (SLI_ENABLED) { + if ((!(voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && (y & 1)) || ((voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && !(y & 1))) + return; + y >>= 1; + } - if (voodoo->fb_write_offset == voodoo->params.front_offset && y < 2048) - voodoo->dirty_line[y] = 1; + if (voodoo->fb_write_offset == voodoo->params.front_offset && y < 2048) + voodoo->dirty_line[y] = 1; - if (voodoo->col_tiled) - write_addr = voodoo->fb_write_offset + (x & 127) + (x >> 7) * 128*32 + (y & 31) * 128 + (y >> 5) * voodoo->row_width; - else - write_addr = voodoo->fb_write_offset + x + (y * voodoo->row_width); - if (voodoo->aux_tiled) - write_addr_aux = voodoo->params.aux_offset + (x & 127) + (x >> 7) * 128*32 + (y & 31) * 128 + (y >> 5) * voodoo->row_width; - else - write_addr_aux = voodoo->params.aux_offset + x + (y * voodoo->row_width); + if (voodoo->col_tiled) + write_addr = voodoo->fb_write_offset + (x & 127) + (x >> 7) * 128 * 32 + (y & 31) * 128 + (y >> 5) * voodoo->row_width; + else + write_addr = voodoo->fb_write_offset + x + (y * voodoo->row_width); + if (voodoo->aux_tiled) + write_addr_aux = voodoo->params.aux_offset + (x & 127) + (x >> 7) * 128 * 32 + (y & 31) * 128 + (y >> 5) * voodoo->row_width; + else + write_addr_aux = voodoo->params.aux_offset + x + (y * voodoo->row_width); -// voodoo_fb_log("fb_writel %08x x=%i y=%i rw=%i %08x wo=%08x\n", addr, x, y, voodoo->row_width, write_addr, voodoo->fb_write_offset); + // voodoo_fb_log("fb_writel %08x x=%i y=%i rw=%i %08x wo=%08x\n", addr, x, y, voodoo->row_width, write_addr, voodoo->fb_write_offset); - if (voodoo->lfbMode & 0x100) - { - int c; + if (voodoo->lfbMode & 0x100) { + int c; - for (c = 0; c < count; c++) - { - rgba8_t write_data = colour_data[c]; - uint16_t new_depth = depth_data[c]; + for (c = 0; c < count; c++) { + rgba8_t write_data = colour_data[c]; + uint16_t new_depth = depth_data[c]; - if (params->fbzMode & FBZ_DEPTH_ENABLE) - { - uint16_t old_depth = *(uint16_t *)(&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]); + if (params->fbzMode & FBZ_DEPTH_ENABLE) { + uint16_t old_depth = *(uint16_t *) (&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]); - DEPTH_TEST(new_depth); - } + DEPTH_TEST(new_depth); + } - if ((params->fbzMode & FBZ_CHROMAKEY) && - write_data.r == params->chromaKey_r && - write_data.g == params->chromaKey_g && - write_data.b == params->chromaKey_b) - goto skip_pixel; + if ((params->fbzMode & FBZ_CHROMAKEY) && write_data.r == params->chromaKey_r && write_data.g == params->chromaKey_g && write_data.b == params->chromaKey_b) + goto skip_pixel; - if (params->fogMode & FOG_ENABLE) - { - int32_t z = new_depth << 12; - int64_t w_depth = new_depth; - int32_t ia = alpha_data[c] << 12; + if (params->fogMode & FOG_ENABLE) { + int32_t z = new_depth << 12; + int64_t w_depth = new_depth; + int32_t ia = alpha_data[c] << 12; - APPLY_FOG(write_data.r, write_data.g, write_data.b, z, ia, w_depth); - } + APPLY_FOG(write_data.r, write_data.g, write_data.b, z, ia, w_depth); + } - if (params->alphaMode & 1) - ALPHA_TEST(alpha_data[c]); + if (params->alphaMode & 1) + ALPHA_TEST(alpha_data[c]); - if (params->alphaMode & (1 << 4)) - { - uint16_t dat = *(uint16_t *)(&voodoo->fb_mem[write_addr & voodoo->fb_mask]); - int dest_r, dest_g, dest_b, dest_a; + if (params->alphaMode & (1 << 4)) { + uint16_t dat = *(uint16_t *) (&voodoo->fb_mem[write_addr & voodoo->fb_mask]); + int dest_r, dest_g, dest_b, dest_a; - dest_r = (dat >> 8) & 0xf8; - dest_g = (dat >> 3) & 0xfc; - dest_b = (dat << 3) & 0xf8; - dest_r |= (dest_r >> 5); - dest_g |= (dest_g >> 6); - dest_b |= (dest_b >> 5); - dest_a = 0xff; + dest_r = (dat >> 8) & 0xf8; + dest_g = (dat >> 3) & 0xfc; + dest_b = (dat << 3) & 0xf8; + dest_r |= (dest_r >> 5); + dest_g |= (dest_g >> 6); + dest_b |= (dest_b >> 5); + dest_a = 0xff; - ALPHA_BLEND(write_data.r, write_data.g, write_data.b, alpha_data[c]); - } + ALPHA_BLEND(write_data.r, write_data.g, write_data.b, alpha_data[c]); + } - if (params->fbzMode & FBZ_RGB_WMASK) - *(uint16_t *)(&voodoo->fb_mem[write_addr & voodoo->fb_mask]) = do_dither(&voodoo->params, write_data, (x >> 1) + c, y); - if (params->fbzMode & FBZ_DEPTH_WMASK) - *(uint16_t *)(&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]) = new_depth; + if (params->fbzMode & FBZ_RGB_WMASK) + *(uint16_t *) (&voodoo->fb_mem[write_addr & voodoo->fb_mask]) = do_dither(&voodoo->params, write_data, (x >> 1) + c, y); + if (params->fbzMode & FBZ_DEPTH_WMASK) + *(uint16_t *) (&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]) = new_depth; skip_pixel: - write_addr += 2; - write_addr_aux += 2; - } + write_addr += 2; + write_addr_aux += 2; } - else - { - int c; + } else { + int c; - for (c = 0; c < count; c++) - { - if (write_mask & LFB_WRITE_COLOUR) - *(uint16_t *)(&voodoo->fb_mem[write_addr & voodoo->fb_mask]) = do_dither(&voodoo->params, colour_data[c], (x >> 1) + c, y); - if (write_mask & LFB_WRITE_DEPTH) - *(uint16_t *)(&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]) = depth_data[c]; + for (c = 0; c < count; c++) { + if (write_mask & LFB_WRITE_COLOUR) + *(uint16_t *) (&voodoo->fb_mem[write_addr & voodoo->fb_mask]) = do_dither(&voodoo->params, colour_data[c], (x >> 1) + c, y); + if (write_mask & LFB_WRITE_DEPTH) + *(uint16_t *) (&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]) = depth_data[c]; - write_addr += 2; - write_addr_aux += 2; - } + write_addr += 2; + write_addr_aux += 2; } + } } diff --git a/src/video/vid_voodoo_fifo.c b/src/video/vid_voodoo_fifo.c index 87260ce54..5ac845e6f 100644 --- a/src/video/vid_voodoo_fifo.c +++ b/src/video/vid_voodoo_fifo.c @@ -41,7 +41,6 @@ #include <86box/vid_voodoo_render.h> #include <86box/vid_voodoo_texture.h> - #ifdef ENABLE_VOODOO_FIFO_LOG int voodoo_fifo_do_log = ENABLE_VOODOO_FIFO_LOG; @@ -51,497 +50,461 @@ voodoo_fifo_log(const char *fmt, ...) va_list ap; if (voodoo_fifo_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define voodoo_fifo_log(fmt, ...) +# define voodoo_fifo_log(fmt, ...) #endif #define WAKE_DELAY (TIMER_USEC * 100) -void voodoo_wake_fifo_thread(voodoo_t *voodoo) +void +voodoo_wake_fifo_thread(voodoo_t *voodoo) { - if (!timer_is_enabled(&voodoo->wake_timer)) - { - /*Don't wake FIFO thread immediately - if we do that it will probably - process one word and go back to sleep, requiring it to be woken on - almost every write. Instead, wait a short while so that the CPU - emulation writes more data so we have more batched-up work.*/ - timer_set_delay_u64(&voodoo->wake_timer, WAKE_DELAY); - } + if (!timer_is_enabled(&voodoo->wake_timer)) { + /*Don't wake FIFO thread immediately - if we do that it will probably + process one word and go back to sleep, requiring it to be woken on + almost every write. Instead, wait a short while so that the CPU + emulation writes more data so we have more batched-up work.*/ + timer_set_delay_u64(&voodoo->wake_timer, WAKE_DELAY); + } } -void voodoo_wake_fifo_thread_now(voodoo_t *voodoo) +void +voodoo_wake_fifo_thread_now(voodoo_t *voodoo) { - thread_set_event(voodoo->wake_fifo_thread); /*Wake up FIFO thread if moving from idle*/ + thread_set_event(voodoo->wake_fifo_thread); /*Wake up FIFO thread if moving from idle*/ } -void voodoo_wake_timer(void *p) +void +voodoo_wake_timer(void *p) { - voodoo_t *voodoo = (voodoo_t *)p; + voodoo_t *voodoo = (voodoo_t *) p; - thread_set_event(voodoo->wake_fifo_thread); /*Wake up FIFO thread if moving from idle*/ + thread_set_event(voodoo->wake_fifo_thread); /*Wake up FIFO thread if moving from idle*/ } -void voodoo_queue_command(voodoo_t *voodoo, uint32_t addr_type, uint32_t val) +void +voodoo_queue_command(voodoo_t *voodoo, uint32_t addr_type, uint32_t val) { - fifo_entry_t *fifo = &voodoo->fifo[voodoo->fifo_write_idx & FIFO_MASK]; + fifo_entry_t *fifo = &voodoo->fifo[voodoo->fifo_write_idx & FIFO_MASK]; - while (FIFO_FULL) - { - thread_reset_event(voodoo->fifo_not_full_event); - if (FIFO_FULL) - { - thread_wait_event(voodoo->fifo_not_full_event, 1); /*Wait for room in ringbuffer*/ - if (FIFO_FULL) - voodoo_wake_fifo_thread_now(voodoo); - } - } - - fifo->val = val; - fifo->addr_type = addr_type; - - voodoo->fifo_write_idx++; - - if (FIFO_ENTRIES > 0xe000) - voodoo_wake_fifo_thread(voodoo); -} - -void voodoo_flush(voodoo_t *voodoo) -{ - voodoo->flush = 1; - while (!FIFO_EMPTY) - { + while (FIFO_FULL) { + thread_reset_event(voodoo->fifo_not_full_event); + if (FIFO_FULL) { + thread_wait_event(voodoo->fifo_not_full_event, 1); /*Wait for room in ringbuffer*/ + if (FIFO_FULL) voodoo_wake_fifo_thread_now(voodoo); - thread_wait_event(voodoo->fifo_not_full_event, 1); } - voodoo_wait_for_render_thread_idle(voodoo); - voodoo->flush = 0; -} + } -void voodoo_wake_fifo_threads(voodoo_set_t *set, voodoo_t *voodoo) -{ + fifo->val = val; + fifo->addr_type = addr_type; + + voodoo->fifo_write_idx++; + + if (FIFO_ENTRIES > 0xe000) voodoo_wake_fifo_thread(voodoo); - if (SLI_ENABLED && voodoo->type != VOODOO_2 && set->voodoos[0] == voodoo) - voodoo_wake_fifo_thread(set->voodoos[1]); } -void voodoo_wait_for_swap_complete(voodoo_t *voodoo) +void +voodoo_flush(voodoo_t *voodoo) { - while (voodoo->swap_pending) - { - thread_wait_event(voodoo->wake_fifo_thread, -1); - thread_reset_event(voodoo->wake_fifo_thread); + voodoo->flush = 1; + while (!FIFO_EMPTY) { + voodoo_wake_fifo_thread_now(voodoo); + thread_wait_event(voodoo->fifo_not_full_event, 1); + } + voodoo_wait_for_render_thread_idle(voodoo); + voodoo->flush = 0; +} - thread_wait_mutex(voodoo->swap_mutex); - if ((voodoo->swap_pending && voodoo->flush) || FIFO_FULL) - { - /*Main thread is waiting for FIFO to empty, so skip vsync wait and just swap*/ - memset(voodoo->dirty_line, 1, sizeof(voodoo->dirty_line)); - voodoo->front_offset = voodoo->params.front_offset; - if (voodoo->swap_count > 0) - voodoo->swap_count--; - voodoo->swap_pending = 0; - thread_release_mutex(voodoo->swap_mutex);; - break; - } - else - thread_release_mutex(voodoo->swap_mutex);; +void +voodoo_wake_fifo_threads(voodoo_set_t *set, voodoo_t *voodoo) +{ + voodoo_wake_fifo_thread(voodoo); + if (SLI_ENABLED && voodoo->type != VOODOO_2 && set->voodoos[0] == voodoo) + voodoo_wake_fifo_thread(set->voodoos[1]); +} + +void +voodoo_wait_for_swap_complete(voodoo_t *voodoo) +{ + while (voodoo->swap_pending) { + thread_wait_event(voodoo->wake_fifo_thread, -1); + thread_reset_event(voodoo->wake_fifo_thread); + + thread_wait_mutex(voodoo->swap_mutex); + if ((voodoo->swap_pending && voodoo->flush) || FIFO_FULL) { + /*Main thread is waiting for FIFO to empty, so skip vsync wait and just swap*/ + memset(voodoo->dirty_line, 1, sizeof(voodoo->dirty_line)); + voodoo->front_offset = voodoo->params.front_offset; + if (voodoo->swap_count > 0) + voodoo->swap_count--; + voodoo->swap_pending = 0; + thread_release_mutex(voodoo->swap_mutex); + ; + break; + } else + thread_release_mutex(voodoo->swap_mutex); + ; + } +} + +static uint32_t +cmdfifo_get(voodoo_t *voodoo) +{ + uint32_t val; + + if (!voodoo->cmdfifo_in_sub) { + while (voodoo->cmdfifo_depth_rd == voodoo->cmdfifo_depth_wr) { + thread_wait_event(voodoo->wake_fifo_thread, -1); + thread_reset_event(voodoo->wake_fifo_thread); } + } + + val = *(uint32_t *) &voodoo->fb_mem[voodoo->cmdfifo_rp & voodoo->fb_mask]; + + if (!voodoo->cmdfifo_in_sub) + voodoo->cmdfifo_depth_rd++; + voodoo->cmdfifo_rp += 4; + + // voodoo_fifo_log(" CMDFIFO get %08x\n", val); + return val; } - -static uint32_t cmdfifo_get(voodoo_t *voodoo) +static inline float +cmdfifo_get_f(voodoo_t *voodoo) { - uint32_t val; + union { + uint32_t i; + float f; + } tempif; - if (!voodoo->cmdfifo_in_sub) { - while (voodoo->cmdfifo_depth_rd == voodoo->cmdfifo_depth_wr) - { - thread_wait_event(voodoo->wake_fifo_thread, -1); - thread_reset_event(voodoo->wake_fifo_thread); - } - } - - val = *(uint32_t *)&voodoo->fb_mem[voodoo->cmdfifo_rp & voodoo->fb_mask]; - - if (!voodoo->cmdfifo_in_sub) - voodoo->cmdfifo_depth_rd++; - voodoo->cmdfifo_rp += 4; - -// voodoo_fifo_log(" CMDFIFO get %08x\n", val); - return val; + tempif.i = cmdfifo_get(voodoo); + return tempif.f; } -static inline float cmdfifo_get_f(voodoo_t *voodoo) -{ - union - { - uint32_t i; - float f; - } tempif; +enum { + CMDFIFO3_PC_MASK_RGB = (1 << 10), + CMDFIFO3_PC_MASK_ALPHA = (1 << 11), + CMDFIFO3_PC_MASK_Z = (1 << 12), + CMDFIFO3_PC_MASK_Wb = (1 << 13), + CMDFIFO3_PC_MASK_W0 = (1 << 14), + CMDFIFO3_PC_MASK_S0_T0 = (1 << 15), + CMDFIFO3_PC_MASK_W1 = (1 << 16), + CMDFIFO3_PC_MASK_S1_T1 = (1 << 17), - tempif.i = cmdfifo_get(voodoo); - return tempif.f; -} - -enum -{ - CMDFIFO3_PC_MASK_RGB = (1 << 10), - CMDFIFO3_PC_MASK_ALPHA = (1 << 11), - CMDFIFO3_PC_MASK_Z = (1 << 12), - CMDFIFO3_PC_MASK_Wb = (1 << 13), - CMDFIFO3_PC_MASK_W0 = (1 << 14), - CMDFIFO3_PC_MASK_S0_T0 = (1 << 15), - CMDFIFO3_PC_MASK_W1 = (1 << 16), - CMDFIFO3_PC_MASK_S1_T1 = (1 << 17), - - CMDFIFO3_PC = (1 << 28) + CMDFIFO3_PC = (1 << 28) }; -void voodoo_fifo_thread(void *param) +void +voodoo_fifo_thread(void *param) { - voodoo_t *voodoo = (voodoo_t *)param; + voodoo_t *voodoo = (voodoo_t *) param; - while (voodoo->fifo_thread_run) - { + while (voodoo->fifo_thread_run) { + thread_set_event(voodoo->fifo_not_full_event); + thread_wait_event(voodoo->wake_fifo_thread, -1); + thread_reset_event(voodoo->wake_fifo_thread); + voodoo->voodoo_busy = 1; + while (!FIFO_EMPTY) { + uint64_t start_time = plat_timer_read(); + uint64_t end_time; + fifo_entry_t *fifo = &voodoo->fifo[voodoo->fifo_read_idx & FIFO_MASK]; + + switch (fifo->addr_type & FIFO_TYPE) { + case FIFO_WRITEL_REG: + while ((fifo->addr_type & FIFO_TYPE) == FIFO_WRITEL_REG) { + voodoo_reg_writel(fifo->addr_type & FIFO_ADDR, fifo->val, voodoo); + fifo->addr_type = FIFO_INVALID; + voodoo->fifo_read_idx++; + if (FIFO_EMPTY) + break; + fifo = &voodoo->fifo[voodoo->fifo_read_idx & FIFO_MASK]; + } + break; + case FIFO_WRITEW_FB: + voodoo_wait_for_render_thread_idle(voodoo); + while ((fifo->addr_type & FIFO_TYPE) == FIFO_WRITEW_FB) { + voodoo_fb_writew(fifo->addr_type & FIFO_ADDR, fifo->val, voodoo); + fifo->addr_type = FIFO_INVALID; + voodoo->fifo_read_idx++; + if (FIFO_EMPTY) + break; + fifo = &voodoo->fifo[voodoo->fifo_read_idx & FIFO_MASK]; + } + break; + case FIFO_WRITEL_FB: + voodoo_wait_for_render_thread_idle(voodoo); + while ((fifo->addr_type & FIFO_TYPE) == FIFO_WRITEL_FB) { + voodoo_fb_writel(fifo->addr_type & FIFO_ADDR, fifo->val, voodoo); + fifo->addr_type = FIFO_INVALID; + voodoo->fifo_read_idx++; + if (FIFO_EMPTY) + break; + fifo = &voodoo->fifo[voodoo->fifo_read_idx & FIFO_MASK]; + } + break; + case FIFO_WRITEL_TEX: + while ((fifo->addr_type & FIFO_TYPE) == FIFO_WRITEL_TEX) { + if (!(fifo->addr_type & 0x400000)) + voodoo_tex_writel(fifo->addr_type & FIFO_ADDR, fifo->val, voodoo); + fifo->addr_type = FIFO_INVALID; + voodoo->fifo_read_idx++; + if (FIFO_EMPTY) + break; + fifo = &voodoo->fifo[voodoo->fifo_read_idx & FIFO_MASK]; + } + break; + case FIFO_WRITEL_2DREG: + while ((fifo->addr_type & FIFO_TYPE) == FIFO_WRITEL_2DREG) { + voodoo_2d_reg_writel(voodoo, fifo->addr_type & FIFO_ADDR, fifo->val); + fifo->addr_type = FIFO_INVALID; + voodoo->fifo_read_idx++; + if (FIFO_EMPTY) + break; + fifo = &voodoo->fifo[voodoo->fifo_read_idx & FIFO_MASK]; + } + break; + + default: + fatal("Unknown fifo entry %08x\n", fifo->addr_type); + } + + if (FIFO_ENTRIES > 0xe000) thread_set_event(voodoo->fifo_not_full_event); - thread_wait_event(voodoo->wake_fifo_thread, -1); - thread_reset_event(voodoo->wake_fifo_thread); - voodoo->voodoo_busy = 1; - while (!FIFO_EMPTY) - { - uint64_t start_time = plat_timer_read(); - uint64_t end_time; - fifo_entry_t *fifo = &voodoo->fifo[voodoo->fifo_read_idx & FIFO_MASK]; - switch (fifo->addr_type & FIFO_TYPE) - { - case FIFO_WRITEL_REG: - while ((fifo->addr_type & FIFO_TYPE) == FIFO_WRITEL_REG) - { - voodoo_reg_writel(fifo->addr_type & FIFO_ADDR, fifo->val, voodoo); - fifo->addr_type = FIFO_INVALID; - voodoo->fifo_read_idx++; - if (FIFO_EMPTY) - break; - fifo = &voodoo->fifo[voodoo->fifo_read_idx & FIFO_MASK]; - } - break; - case FIFO_WRITEW_FB: - voodoo_wait_for_render_thread_idle(voodoo); - while ((fifo->addr_type & FIFO_TYPE) == FIFO_WRITEW_FB) - { - voodoo_fb_writew(fifo->addr_type & FIFO_ADDR, fifo->val, voodoo); - fifo->addr_type = FIFO_INVALID; - voodoo->fifo_read_idx++; - if (FIFO_EMPTY) - break; - fifo = &voodoo->fifo[voodoo->fifo_read_idx & FIFO_MASK]; - } - break; - case FIFO_WRITEL_FB: - voodoo_wait_for_render_thread_idle(voodoo); - while ((fifo->addr_type & FIFO_TYPE) == FIFO_WRITEL_FB) - { - voodoo_fb_writel(fifo->addr_type & FIFO_ADDR, fifo->val, voodoo); - fifo->addr_type = FIFO_INVALID; - voodoo->fifo_read_idx++; - if (FIFO_EMPTY) - break; - fifo = &voodoo->fifo[voodoo->fifo_read_idx & FIFO_MASK]; - } - break; - case FIFO_WRITEL_TEX: - while ((fifo->addr_type & FIFO_TYPE) == FIFO_WRITEL_TEX) - { - if (!(fifo->addr_type & 0x400000)) - voodoo_tex_writel(fifo->addr_type & FIFO_ADDR, fifo->val, voodoo); - fifo->addr_type = FIFO_INVALID; - voodoo->fifo_read_idx++; - if (FIFO_EMPTY) - break; - fifo = &voodoo->fifo[voodoo->fifo_read_idx & FIFO_MASK]; - } - break; - case FIFO_WRITEL_2DREG: - while ((fifo->addr_type & FIFO_TYPE) == FIFO_WRITEL_2DREG) - { - voodoo_2d_reg_writel(voodoo, fifo->addr_type & FIFO_ADDR, fifo->val); - fifo->addr_type = FIFO_INVALID; - voodoo->fifo_read_idx++; - if (FIFO_EMPTY) - break; - fifo = &voodoo->fifo[voodoo->fifo_read_idx & FIFO_MASK]; - } - break; - - default: - fatal("Unknown fifo entry %08x\n", fifo->addr_type); - } - - if (FIFO_ENTRIES > 0xe000) - thread_set_event(voodoo->fifo_not_full_event); - - end_time = plat_timer_read(); - voodoo->time += end_time - start_time; - } - - while (voodoo->cmdfifo_enabled && (voodoo->cmdfifo_depth_rd != voodoo->cmdfifo_depth_wr || voodoo->cmdfifo_in_sub)) - { - uint64_t start_time = plat_timer_read(); - uint64_t end_time; - uint32_t header = cmdfifo_get(voodoo); - uint32_t addr; - uint32_t mask; - int smode; - int num; - int num_verticies; - int v_num; - -// voodoo_fifo_log(" CMDFIFO header %08x at %08x\n", header, voodoo->cmdfifo_rp); - - switch (header & 7) - { - case 0: -// voodoo_fifo_log("CMDFIFO0\n"); - switch ((header >> 3) & 7) - { - case 0: /*NOP*/ - break; - - case 1: /*JSR*/ -// voodoo_fifo_log("JSR %08x\n", (header >> 4) & 0xfffffc); - voodoo->cmdfifo_ret_addr = voodoo->cmdfifo_rp; - voodoo->cmdfifo_rp = (header >> 4) & 0xfffffc; - voodoo->cmdfifo_in_sub = 1; - break; - - case 2: /*RET*/ - voodoo->cmdfifo_rp = voodoo->cmdfifo_ret_addr; - voodoo->cmdfifo_in_sub = 0; - break; - - case 3: /*JMP local frame buffer*/ - voodoo->cmdfifo_rp = (header >> 4) & 0xfffffc; -// voodoo_fifo_log("JMP to %08x %04x\n", voodoo->cmdfifo_rp, header); - break; - - default: - fatal("Bad CMDFIFO0 %08x\n", header); - } - break; - - case 1: - num = header >> 16; - addr = (header & 0x7ff8) >> 1; -// voodoo_fifo_log("CMDFIFO1 addr=%08x\n",addr); - while (num--) - { - uint32_t val = cmdfifo_get(voodoo); - if ((addr & (1 << 13)) && voodoo->type >= VOODOO_BANSHEE) - { -// if (voodoo->type != VOODOO_BANSHEE) -// fatal("CMDFIFO1: Not Banshee\n"); -// voodoo_fifo_log("CMDFIFO1: write %08x %08x\n", addr, val); - voodoo_2d_reg_writel(voodoo, addr, val); - } - else - { - if ((addr & 0x3ff) == SST_triangleCMD || (addr & 0x3ff) == SST_ftriangleCMD || - (addr & 0x3ff) == SST_fastfillCMD || (addr & 0x3ff) == SST_nopCMD) - voodoo->cmd_written_fifo++; - - if (voodoo->type >= VOODOO_BANSHEE && (addr & 0x3ff) == SST_swapbufferCMD) - voodoo->cmd_written_fifo++; - voodoo_reg_writel(addr, val, voodoo); - } - - if (header & (1 << 15)) - addr += 4; - } - break; - - case 2: - if (voodoo->type < VOODOO_BANSHEE) - fatal("CMDFIFO2: Not Banshee\n"); - mask = (header >> 3); - addr = 8; - while (mask) - { - if (mask & 1) - { - uint32_t val = cmdfifo_get(voodoo); - - voodoo_2d_reg_writel(voodoo, addr, val); - } - - addr += 4; - mask >>= 1; - } - break; - - case 3: - num = (header >> 29) & 7; - mask = header;//(header >> 10) & 0xff; - smode = (header >> 22) & 0xf; - voodoo_reg_writel(SST_sSetupMode, ((header >> 10) & 0xff) | (smode << 16), voodoo); - num_verticies = (header >> 6) & 0xf; - v_num = 0; - if (((header >> 3) & 7) == 2) - v_num = 1; -// voodoo_fifo_log("CMDFIFO3: num=%i verts=%i mask=%02x\n", num, num_verticies, (header >> 10) & 0xff); -// voodoo_fifo_log("CMDFIFO3 %02x %i\n", (header >> 10), (header >> 3) & 7); - - while (num_verticies--) - { - voodoo->verts[3].sVx = cmdfifo_get_f(voodoo); - voodoo->verts[3].sVy = cmdfifo_get_f(voodoo); - if (mask & CMDFIFO3_PC_MASK_RGB) - { - if (header & CMDFIFO3_PC) - { - uint32_t val = cmdfifo_get(voodoo); - voodoo->verts[3].sBlue = (float)(val & 0xff); - voodoo->verts[3].sGreen = (float)((val >> 8) & 0xff); - voodoo->verts[3].sRed = (float)((val >> 16) & 0xff); - voodoo->verts[3].sAlpha = (float)((val >> 24) & 0xff); - } - else - { - voodoo->verts[3].sRed = cmdfifo_get_f(voodoo); - voodoo->verts[3].sGreen = cmdfifo_get_f(voodoo); - voodoo->verts[3].sBlue = cmdfifo_get_f(voodoo); - } - } - if ((mask & CMDFIFO3_PC_MASK_ALPHA) && !(header & CMDFIFO3_PC)) - voodoo->verts[3].sAlpha = cmdfifo_get_f(voodoo); - if (mask & CMDFIFO3_PC_MASK_Z) - voodoo->verts[3].sVz = cmdfifo_get_f(voodoo); - if (mask & CMDFIFO3_PC_MASK_Wb) - voodoo->verts[3].sWb = cmdfifo_get_f(voodoo); - if (mask & CMDFIFO3_PC_MASK_W0) - voodoo->verts[3].sW0 = cmdfifo_get_f(voodoo); - if (mask & CMDFIFO3_PC_MASK_S0_T0) - { - voodoo->verts[3].sS0 = cmdfifo_get_f(voodoo); - voodoo->verts[3].sT0 = cmdfifo_get_f(voodoo); - } - if (mask & CMDFIFO3_PC_MASK_W1) - voodoo->verts[3].sW1 = cmdfifo_get_f(voodoo); - if (mask & CMDFIFO3_PC_MASK_S1_T1) - { - voodoo->verts[3].sS1 = cmdfifo_get_f(voodoo); - voodoo->verts[3].sT1 = cmdfifo_get_f(voodoo); - } - if (v_num) - voodoo_reg_writel(SST_sDrawTriCMD, 0, voodoo); - else - voodoo_reg_writel(SST_sBeginTriCMD, 0, voodoo); - v_num++; - if (v_num == 3 && ((header >> 3) & 7) == 0) - v_num = 0; - } - break; - - case 4: - num = (header >> 29) & 7; - mask = (header >> 15) & 0x3fff; - addr = (header & 0x7ff8) >> 1; -// voodoo_fifo_log("CMDFIFO4 addr=%08x\n",addr); - while (mask) - { - if (mask & 1) - { - uint32_t val = cmdfifo_get(voodoo); - - if ((addr & (1 << 13)) && voodoo->type >= VOODOO_BANSHEE) - { - if (voodoo->type < VOODOO_BANSHEE) - fatal("CMDFIFO1: Not Banshee\n"); -// voodoo_fifo_log("CMDFIFO1: write %08x %08x\n", addr, val); - voodoo_2d_reg_writel(voodoo, addr, val); - } - else - { - if ((addr & 0x3ff) == SST_triangleCMD || (addr & 0x3ff) == SST_ftriangleCMD || - (addr & 0x3ff) == SST_fastfillCMD || (addr & 0x3ff) == SST_nopCMD) - voodoo->cmd_written_fifo++; - - if (voodoo->type >= VOODOO_BANSHEE && (addr & 0x3ff) == SST_swapbufferCMD) - voodoo->cmd_written_fifo++; - voodoo_reg_writel(addr, val, voodoo); - } - } - - addr += 4; - mask >>= 1; - } - while (num--) - cmdfifo_get(voodoo); - break; - - case 5: -// if (header & 0x3fc00000) -// fatal("CMDFIFO packet 5 has byte disables set %08x\n", header); - num = (header >> 3) & 0x7ffff; - addr = cmdfifo_get(voodoo) & 0xffffff; - if (!num) - num = 1; -// voodoo_fifo_log("CMDFIFO5 addr=%08x num=%i\n", addr, num); - switch (header >> 30) - { - case 0: /*Linear framebuffer (Banshee)*/ - case 1: /*Planar YUV*/ - if (voodoo->texture_present[0][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) - { -// voodoo_fifo_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); - flush_texture_cache(voodoo, addr & voodoo->texture_mask, 0); - } - if (voodoo->texture_present[1][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) - { -// voodoo_fifo_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); - flush_texture_cache(voodoo, addr & voodoo->texture_mask, 1); - } - while (num--) - { - uint32_t val = cmdfifo_get(voodoo); - if (addr <= voodoo->fb_mask) - *(uint32_t *)&voodoo->fb_mem[addr] = val; - addr += 4; - } - break; - case 2: /*Framebuffer*/ - while (num--) - { - uint32_t val = cmdfifo_get(voodoo); - voodoo_fb_writel(addr, val, voodoo); - addr += 4; - } - break; - case 3: /*Texture*/ - while (num--) - { - uint32_t val = cmdfifo_get(voodoo); - voodoo_tex_writel(addr, val, voodoo); - addr += 4; - } - break; - - default: - fatal("CMDFIFO packet 5 bad space %08x %08x\n", header, voodoo->cmdfifo_rp); - } - break; - - default: - fatal("Bad CMDFIFO packet %08x %08x\n", header, voodoo->cmdfifo_rp); - } - - end_time = plat_timer_read(); - voodoo->time += end_time - start_time; - } - voodoo->voodoo_busy = 0; + end_time = plat_timer_read(); + voodoo->time += end_time - start_time; } + + while (voodoo->cmdfifo_enabled && (voodoo->cmdfifo_depth_rd != voodoo->cmdfifo_depth_wr || voodoo->cmdfifo_in_sub)) { + uint64_t start_time = plat_timer_read(); + uint64_t end_time; + uint32_t header = cmdfifo_get(voodoo); + uint32_t addr; + uint32_t mask; + int smode; + int num; + int num_verticies; + int v_num; + + // voodoo_fifo_log(" CMDFIFO header %08x at %08x\n", header, voodoo->cmdfifo_rp); + + switch (header & 7) { + case 0: + // voodoo_fifo_log("CMDFIFO0\n"); + switch ((header >> 3) & 7) { + case 0: /*NOP*/ + break; + + case 1: /*JSR*/ + // voodoo_fifo_log("JSR %08x\n", (header >> 4) & 0xfffffc); + voodoo->cmdfifo_ret_addr = voodoo->cmdfifo_rp; + voodoo->cmdfifo_rp = (header >> 4) & 0xfffffc; + voodoo->cmdfifo_in_sub = 1; + break; + + case 2: /*RET*/ + voodoo->cmdfifo_rp = voodoo->cmdfifo_ret_addr; + voodoo->cmdfifo_in_sub = 0; + break; + + case 3: /*JMP local frame buffer*/ + voodoo->cmdfifo_rp = (header >> 4) & 0xfffffc; + // voodoo_fifo_log("JMP to %08x %04x\n", voodoo->cmdfifo_rp, header); + break; + + default: + fatal("Bad CMDFIFO0 %08x\n", header); + } + break; + + case 1: + num = header >> 16; + addr = (header & 0x7ff8) >> 1; + // voodoo_fifo_log("CMDFIFO1 addr=%08x\n",addr); + while (num--) { + uint32_t val = cmdfifo_get(voodoo); + if ((addr & (1 << 13)) && voodoo->type >= VOODOO_BANSHEE) { + // if (voodoo->type != VOODOO_BANSHEE) + // fatal("CMDFIFO1: Not Banshee\n"); + // voodoo_fifo_log("CMDFIFO1: write %08x %08x\n", addr, val); + voodoo_2d_reg_writel(voodoo, addr, val); + } else { + if ((addr & 0x3ff) == SST_triangleCMD || (addr & 0x3ff) == SST_ftriangleCMD || (addr & 0x3ff) == SST_fastfillCMD || (addr & 0x3ff) == SST_nopCMD) + voodoo->cmd_written_fifo++; + + if (voodoo->type >= VOODOO_BANSHEE && (addr & 0x3ff) == SST_swapbufferCMD) + voodoo->cmd_written_fifo++; + voodoo_reg_writel(addr, val, voodoo); + } + + if (header & (1 << 15)) + addr += 4; + } + break; + + case 2: + if (voodoo->type < VOODOO_BANSHEE) + fatal("CMDFIFO2: Not Banshee\n"); + mask = (header >> 3); + addr = 8; + while (mask) { + if (mask & 1) { + uint32_t val = cmdfifo_get(voodoo); + + voodoo_2d_reg_writel(voodoo, addr, val); + } + + addr += 4; + mask >>= 1; + } + break; + + case 3: + num = (header >> 29) & 7; + mask = header; //(header >> 10) & 0xff; + smode = (header >> 22) & 0xf; + voodoo_reg_writel(SST_sSetupMode, ((header >> 10) & 0xff) | (smode << 16), voodoo); + num_verticies = (header >> 6) & 0xf; + v_num = 0; + if (((header >> 3) & 7) == 2) + v_num = 1; + // voodoo_fifo_log("CMDFIFO3: num=%i verts=%i mask=%02x\n", num, num_verticies, (header >> 10) & 0xff); + // voodoo_fifo_log("CMDFIFO3 %02x %i\n", (header >> 10), (header >> 3) & 7); + + while (num_verticies--) { + voodoo->verts[3].sVx = cmdfifo_get_f(voodoo); + voodoo->verts[3].sVy = cmdfifo_get_f(voodoo); + if (mask & CMDFIFO3_PC_MASK_RGB) { + if (header & CMDFIFO3_PC) { + uint32_t val = cmdfifo_get(voodoo); + voodoo->verts[3].sBlue = (float) (val & 0xff); + voodoo->verts[3].sGreen = (float) ((val >> 8) & 0xff); + voodoo->verts[3].sRed = (float) ((val >> 16) & 0xff); + voodoo->verts[3].sAlpha = (float) ((val >> 24) & 0xff); + } else { + voodoo->verts[3].sRed = cmdfifo_get_f(voodoo); + voodoo->verts[3].sGreen = cmdfifo_get_f(voodoo); + voodoo->verts[3].sBlue = cmdfifo_get_f(voodoo); + } + } + if ((mask & CMDFIFO3_PC_MASK_ALPHA) && !(header & CMDFIFO3_PC)) + voodoo->verts[3].sAlpha = cmdfifo_get_f(voodoo); + if (mask & CMDFIFO3_PC_MASK_Z) + voodoo->verts[3].sVz = cmdfifo_get_f(voodoo); + if (mask & CMDFIFO3_PC_MASK_Wb) + voodoo->verts[3].sWb = cmdfifo_get_f(voodoo); + if (mask & CMDFIFO3_PC_MASK_W0) + voodoo->verts[3].sW0 = cmdfifo_get_f(voodoo); + if (mask & CMDFIFO3_PC_MASK_S0_T0) { + voodoo->verts[3].sS0 = cmdfifo_get_f(voodoo); + voodoo->verts[3].sT0 = cmdfifo_get_f(voodoo); + } + if (mask & CMDFIFO3_PC_MASK_W1) + voodoo->verts[3].sW1 = cmdfifo_get_f(voodoo); + if (mask & CMDFIFO3_PC_MASK_S1_T1) { + voodoo->verts[3].sS1 = cmdfifo_get_f(voodoo); + voodoo->verts[3].sT1 = cmdfifo_get_f(voodoo); + } + if (v_num) + voodoo_reg_writel(SST_sDrawTriCMD, 0, voodoo); + else + voodoo_reg_writel(SST_sBeginTriCMD, 0, voodoo); + v_num++; + if (v_num == 3 && ((header >> 3) & 7) == 0) + v_num = 0; + } + break; + + case 4: + num = (header >> 29) & 7; + mask = (header >> 15) & 0x3fff; + addr = (header & 0x7ff8) >> 1; + // voodoo_fifo_log("CMDFIFO4 addr=%08x\n",addr); + while (mask) { + if (mask & 1) { + uint32_t val = cmdfifo_get(voodoo); + + if ((addr & (1 << 13)) && voodoo->type >= VOODOO_BANSHEE) { + if (voodoo->type < VOODOO_BANSHEE) + fatal("CMDFIFO1: Not Banshee\n"); + // voodoo_fifo_log("CMDFIFO1: write %08x %08x\n", addr, val); + voodoo_2d_reg_writel(voodoo, addr, val); + } else { + if ((addr & 0x3ff) == SST_triangleCMD || (addr & 0x3ff) == SST_ftriangleCMD || (addr & 0x3ff) == SST_fastfillCMD || (addr & 0x3ff) == SST_nopCMD) + voodoo->cmd_written_fifo++; + + if (voodoo->type >= VOODOO_BANSHEE && (addr & 0x3ff) == SST_swapbufferCMD) + voodoo->cmd_written_fifo++; + voodoo_reg_writel(addr, val, voodoo); + } + } + + addr += 4; + mask >>= 1; + } + while (num--) + cmdfifo_get(voodoo); + break; + + case 5: + // if (header & 0x3fc00000) + // fatal("CMDFIFO packet 5 has byte disables set %08x\n", header); + num = (header >> 3) & 0x7ffff; + addr = cmdfifo_get(voodoo) & 0xffffff; + if (!num) + num = 1; + // voodoo_fifo_log("CMDFIFO5 addr=%08x num=%i\n", addr, num); + switch (header >> 30) { + case 0: /*Linear framebuffer (Banshee)*/ + case 1: /*Planar YUV*/ + if (voodoo->texture_present[0][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) { + // voodoo_fifo_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); + flush_texture_cache(voodoo, addr & voodoo->texture_mask, 0); + } + if (voodoo->texture_present[1][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) { + // voodoo_fifo_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); + flush_texture_cache(voodoo, addr & voodoo->texture_mask, 1); + } + while (num--) { + uint32_t val = cmdfifo_get(voodoo); + if (addr <= voodoo->fb_mask) + *(uint32_t *) &voodoo->fb_mem[addr] = val; + addr += 4; + } + break; + case 2: /*Framebuffer*/ + while (num--) { + uint32_t val = cmdfifo_get(voodoo); + voodoo_fb_writel(addr, val, voodoo); + addr += 4; + } + break; + case 3: /*Texture*/ + while (num--) { + uint32_t val = cmdfifo_get(voodoo); + voodoo_tex_writel(addr, val, voodoo); + addr += 4; + } + break; + + default: + fatal("CMDFIFO packet 5 bad space %08x %08x\n", header, voodoo->cmdfifo_rp); + } + break; + + default: + fatal("Bad CMDFIFO packet %08x %08x\n", header, voodoo->cmdfifo_rp); + } + + end_time = plat_timer_read(); + voodoo->time += end_time - start_time; + } + voodoo->voodoo_busy = 0; + } } diff --git a/src/video/vid_voodoo_reg.c b/src/video/vid_voodoo_reg.c index 797fa130f..84f56e726 100644 --- a/src/video/vid_voodoo_reg.c +++ b/src/video/vid_voodoo_reg.c @@ -42,16 +42,13 @@ #include <86box/vid_voodoo_setup.h> #include <86box/vid_voodoo_texture.h> - -enum -{ - CHIP_FBI = 0x1, - CHIP_TREX0 = 0x2, - CHIP_TREX1 = 0x4, - CHIP_TREX2 = 0x8 +enum { + CHIP_FBI = 0x1, + CHIP_TREX0 = 0x2, + CHIP_TREX1 = 0x4, + CHIP_TREX2 = 0x8 }; - #ifdef ENABLE_VOODOO_REG_LOG int voodoo_reg_do_log = ENABLE_VOODOO_REG_LOG; @@ -61,1306 +58,1266 @@ voodoo_reg_log(const char *fmt, ...) va_list ap; if (voodoo_reg_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define voodoo_reg_log(fmt, ...) +# define voodoo_reg_log(fmt, ...) #endif - -void voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) +void +voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) { - voodoo_t *voodoo = (voodoo_t *)p; - union - { - uint32_t i; - float f; - } tempif; - int ad21 = addr & (1 << 21); - int chip = (addr >> 10) & 0xf; - if (!chip) - chip = 0xf; + voodoo_t *voodoo = (voodoo_t *) p; + union { + uint32_t i; + float f; + } tempif; + int ad21 = addr & (1 << 21); + int chip = (addr >> 10) & 0xf; + if (!chip) + chip = 0xf; - tempif.i = val; -//voodoo_reg_log("voodoo_reg_write_l: addr=%08x val=%08x(%f) chip=%x\n", addr, val, tempif.f, chip); - addr &= 0x3fc; + tempif.i = val; + // voodoo_reg_log("voodoo_reg_write_l: addr=%08x val=%08x(%f) chip=%x\n", addr, val, tempif.f, chip); + addr &= 0x3fc; - if ((voodoo->fbiInit3 & FBIINIT3_REMAP) && addr < 0x100 && ad21) - addr |= 0x400; - switch (addr) - { - case SST_swapbufferCMD: - if (voodoo->type >= VOODOO_BANSHEE) - { -// voodoo_reg_log("swapbufferCMD %08x %08x\n", val, voodoo->leftOverlayBuf); + if ((voodoo->fbiInit3 & FBIINIT3_REMAP) && addr < 0x100 && ad21) + addr |= 0x400; + switch (addr) { + case SST_swapbufferCMD: + if (voodoo->type >= VOODOO_BANSHEE) { + // voodoo_reg_log("swapbufferCMD %08x %08x\n", val, voodoo->leftOverlayBuf); - voodoo_wait_for_render_thread_idle(voodoo); - if (!(val & 1)) - { - banshee_set_overlay_addr(voodoo->p, voodoo->leftOverlayBuf); - thread_wait_mutex(voodoo->swap_mutex); - if (voodoo->swap_count > 0) - voodoo->swap_count--; - thread_release_mutex(voodoo->swap_mutex); - voodoo->frame_count++; - } - else if (TRIPLE_BUFFER) - { - if (voodoo->swap_pending) - voodoo_wait_for_swap_complete(voodoo); - voodoo->swap_interval = (val >> 1) & 0xff; - voodoo->swap_offset = voodoo->leftOverlayBuf; - voodoo->swap_pending = 1; - } - else - { - voodoo->swap_interval = (val >> 1) & 0xff; - voodoo->swap_offset = voodoo->leftOverlayBuf; - voodoo->swap_pending = 1; - - voodoo_wait_for_swap_complete(voodoo); - } - - voodoo->cmd_read++; - break; - } - - if (TRIPLE_BUFFER) - { - voodoo->disp_buffer = (voodoo->disp_buffer + 1) % 3; - voodoo->draw_buffer = (voodoo->draw_buffer + 1) % 3; - } - else - { - voodoo->disp_buffer = !voodoo->disp_buffer; - voodoo->draw_buffer = !voodoo->draw_buffer; - } - voodoo_recalc(voodoo); - - voodoo->params.swapbufferCMD = val; - -// voodoo_reg_log("Swap buffer %08x %d %p %i\n", val, voodoo->swap_count, &voodoo->swap_count, (voodoo == voodoo->set->voodoos[1]) ? 1 : 0); -// voodoo->front_offset = params->front_offset; voodoo_wait_for_render_thread_idle(voodoo); - if (!(val & 1)) - { - memset(voodoo->dirty_line, 1, sizeof(voodoo->dirty_line)); - voodoo->front_offset = voodoo->params.front_offset; - thread_wait_mutex(voodoo->swap_mutex); - if (voodoo->swap_count > 0) - voodoo->swap_count--; - thread_release_mutex(voodoo->swap_mutex); - } - else if (TRIPLE_BUFFER) - { - if (voodoo->swap_pending) - voodoo_wait_for_swap_complete(voodoo); - - voodoo->swap_interval = (val >> 1) & 0xff; - voodoo->swap_offset = voodoo->params.front_offset; - voodoo->swap_pending = 1; - } - else - { - voodoo->swap_interval = (val >> 1) & 0xff; - voodoo->swap_offset = voodoo->params.front_offset; - voodoo->swap_pending = 1; - + if (!(val & 1)) { + banshee_set_overlay_addr(voodoo->p, voodoo->leftOverlayBuf); + thread_wait_mutex(voodoo->swap_mutex); + if (voodoo->swap_count > 0) + voodoo->swap_count--; + thread_release_mutex(voodoo->swap_mutex); + voodoo->frame_count++; + } else if (TRIPLE_BUFFER) { + if (voodoo->swap_pending) voodoo_wait_for_swap_complete(voodoo); + voodoo->swap_interval = (val >> 1) & 0xff; + voodoo->swap_offset = voodoo->leftOverlayBuf; + voodoo->swap_pending = 1; + } else { + voodoo->swap_interval = (val >> 1) & 0xff; + voodoo->swap_offset = voodoo->leftOverlayBuf; + voodoo->swap_pending = 1; + + voodoo_wait_for_swap_complete(voodoo); } - voodoo->cmd_read++; - break; - - case SST_vertexAx: case SST_remap_vertexAx: - voodoo->params.vertexAx = val & 0xffff; - break; - case SST_vertexAy: case SST_remap_vertexAy: - voodoo->params.vertexAy = val & 0xffff; - break; - case SST_vertexBx: case SST_remap_vertexBx: - voodoo->params.vertexBx = val & 0xffff; - break; - case SST_vertexBy: case SST_remap_vertexBy: - voodoo->params.vertexBy = val & 0xffff; - break; - case SST_vertexCx: case SST_remap_vertexCx: - voodoo->params.vertexCx = val & 0xffff; - break; - case SST_vertexCy: case SST_remap_vertexCy: - voodoo->params.vertexCy = val & 0xffff; - break; - - case SST_startR: case SST_remap_startR: - voodoo->params.startR = val & 0xffffff; - break; - case SST_startG: case SST_remap_startG: - voodoo->params.startG = val & 0xffffff; - break; - case SST_startB: case SST_remap_startB: - voodoo->params.startB = val & 0xffffff; - break; - case SST_startZ: case SST_remap_startZ: - voodoo->params.startZ = val; - break; - case SST_startA: case SST_remap_startA: - voodoo->params.startA = val & 0xffffff; - break; - case SST_startS: case SST_remap_startS: - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].startS = ((int64_t)(int32_t)val) << 14; - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].startS = ((int64_t)(int32_t)val) << 14; - break; - case SST_startT: case SST_remap_startT: - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].startT = ((int64_t)(int32_t)val) << 14; - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].startT = ((int64_t)(int32_t)val) << 14; - break; - case SST_startW: case SST_remap_startW: - if (chip & CHIP_FBI) - voodoo->params.startW = (int64_t)(int32_t)val << 2; - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].startW = (int64_t)(int32_t)val << 2; - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].startW = (int64_t)(int32_t)val << 2; - break; - - case SST_dRdX: case SST_remap_dRdX: - voodoo->params.dRdX = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); - break; - case SST_dGdX: case SST_remap_dGdX: - voodoo->params.dGdX = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); - break; - case SST_dBdX: case SST_remap_dBdX: - voodoo->params.dBdX = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); - break; - case SST_dZdX: case SST_remap_dZdX: - voodoo->params.dZdX = val; - break; - case SST_dAdX: case SST_remap_dAdX: - voodoo->params.dAdX = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); - break; - case SST_dSdX: case SST_remap_dSdX: - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].dSdX = ((int64_t)(int32_t)val) << 14; - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].dSdX = ((int64_t)(int32_t)val) << 14; - break; - case SST_dTdX: case SST_remap_dTdX: - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].dTdX = ((int64_t)(int32_t)val) << 14; - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].dTdX = ((int64_t)(int32_t)val) << 14; - break; - case SST_dWdX: case SST_remap_dWdX: - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].dWdX = (int64_t)(int32_t)val << 2; - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].dWdX = (int64_t)(int32_t)val << 2; - if (chip & CHIP_FBI) - voodoo->params.dWdX = (int64_t)(int32_t)val << 2; - break; - - case SST_dRdY: case SST_remap_dRdY: - voodoo->params.dRdY = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); - break; - case SST_dGdY: case SST_remap_dGdY: - voodoo->params.dGdY = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); - break; - case SST_dBdY: case SST_remap_dBdY: - voodoo->params.dBdY = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); - break; - case SST_dZdY: case SST_remap_dZdY: - voodoo->params.dZdY = val; - break; - case SST_dAdY: case SST_remap_dAdY: - voodoo->params.dAdY = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); - break; - case SST_dSdY: case SST_remap_dSdY: - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].dSdY = ((int64_t)(int32_t)val) << 14; - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].dSdY = ((int64_t)(int32_t)val) << 14; - break; - case SST_dTdY: case SST_remap_dTdY: - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].dTdY = ((int64_t)(int32_t)val) << 14; - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].dTdY = ((int64_t)(int32_t)val) << 14; - break; - case SST_dWdY: case SST_remap_dWdY: - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].dWdY = (int64_t)(int32_t)val << 2; - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].dWdY = (int64_t)(int32_t)val << 2; - if (chip & CHIP_FBI) - voodoo->params.dWdY = (int64_t)(int32_t)val << 2; - break; - - case SST_triangleCMD: case SST_remap_triangleCMD: - voodoo->params.sign = val & (1 << 31); - - if (voodoo->ncc_dirty[0]) - voodoo_update_ncc(voodoo, 0); - if (voodoo->ncc_dirty[1]) - voodoo_update_ncc(voodoo, 1); - voodoo->ncc_dirty[0] = voodoo->ncc_dirty[1] = 0; - - voodoo_queue_triangle(voodoo, &voodoo->params); voodoo->cmd_read++; break; + } - case SST_fvertexAx: case SST_remap_fvertexAx: - voodoo->fvertexAx.i = val; - voodoo->params.vertexAx = (int32_t)(int16_t)(int32_t)(voodoo->fvertexAx.f * 16.0f) & 0xffff; - break; - case SST_fvertexAy: case SST_remap_fvertexAy: - voodoo->fvertexAy.i = val; - voodoo->params.vertexAy = (int32_t)(int16_t)(int32_t)(voodoo->fvertexAy.f * 16.0f) & 0xffff; - break; - case SST_fvertexBx: case SST_remap_fvertexBx: - voodoo->fvertexBx.i = val; - voodoo->params.vertexBx = (int32_t)(int16_t)(int32_t)(voodoo->fvertexBx.f * 16.0f) & 0xffff; - break; - case SST_fvertexBy: case SST_remap_fvertexBy: - voodoo->fvertexBy.i = val; - voodoo->params.vertexBy = (int32_t)(int16_t)(int32_t)(voodoo->fvertexBy.f * 16.0f) & 0xffff; - break; - case SST_fvertexCx: case SST_remap_fvertexCx: - voodoo->fvertexCx.i = val; - voodoo->params.vertexCx = (int32_t)(int16_t)(int32_t)(voodoo->fvertexCx.f * 16.0f) & 0xffff; - break; - case SST_fvertexCy: case SST_remap_fvertexCy: - voodoo->fvertexCy.i = val; - voodoo->params.vertexCy = (int32_t)(int16_t)(int32_t)(voodoo->fvertexCy.f * 16.0f) & 0xffff; - break; + if (TRIPLE_BUFFER) { + voodoo->disp_buffer = (voodoo->disp_buffer + 1) % 3; + voodoo->draw_buffer = (voodoo->draw_buffer + 1) % 3; + } else { + voodoo->disp_buffer = !voodoo->disp_buffer; + voodoo->draw_buffer = !voodoo->draw_buffer; + } + voodoo_recalc(voodoo); - case SST_fstartR: case SST_remap_fstartR: - tempif.i = val; - voodoo->params.startR = (int32_t)(tempif.f * 4096.0f); - break; - case SST_fstartG: case SST_remap_fstartG: - tempif.i = val; - voodoo->params.startG = (int32_t)(tempif.f * 4096.0f); - break; - case SST_fstartB: case SST_remap_fstartB: - tempif.i = val; - voodoo->params.startB = (int32_t)(tempif.f * 4096.0f); - break; - case SST_fstartZ: case SST_remap_fstartZ: - tempif.i = val; - voodoo->params.startZ = (int32_t)(tempif.f * 4096.0f); - break; - case SST_fstartA: case SST_remap_fstartA: - tempif.i = val; - voodoo->params.startA = (int32_t)(tempif.f * 4096.0f); - break; - case SST_fstartS: case SST_remap_fstartS: - tempif.i = val; - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].startS = (int64_t)(tempif.f * 4294967296.0f); - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].startS = (int64_t)(tempif.f * 4294967296.0f); - break; - case SST_fstartT: case SST_remap_fstartT: - tempif.i = val; - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].startT = (int64_t)(tempif.f * 4294967296.0f); - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].startT = (int64_t)(tempif.f * 4294967296.0f); - break; - case SST_fstartW: case SST_remap_fstartW: - tempif.i = val; - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].startW = (int64_t)(tempif.f * 4294967296.0f); - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].startW = (int64_t)(tempif.f * 4294967296.0f); - if (chip & CHIP_FBI) - voodoo->params.startW = (int64_t)(tempif.f * 4294967296.0f); - break; + voodoo->params.swapbufferCMD = val; - case SST_fdRdX: case SST_remap_fdRdX: - tempif.i = val; - voodoo->params.dRdX = (int32_t)(tempif.f * 4096.0f); - break; - case SST_fdGdX: case SST_remap_fdGdX: - tempif.i = val; - voodoo->params.dGdX = (int32_t)(tempif.f * 4096.0f); - break; - case SST_fdBdX: case SST_remap_fdBdX: - tempif.i = val; - voodoo->params.dBdX = (int32_t)(tempif.f * 4096.0f); - break; - case SST_fdZdX: case SST_remap_fdZdX: - tempif.i = val; - voodoo->params.dZdX = (int32_t)(tempif.f * 4096.0f); - break; - case SST_fdAdX: case SST_remap_fdAdX: - tempif.i = val; - voodoo->params.dAdX = (int32_t)(tempif.f * 4096.0f); - break; - case SST_fdSdX: case SST_remap_fdSdX: - tempif.i = val; - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].dSdX = (int64_t)(tempif.f * 4294967296.0f); - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].dSdX = (int64_t)(tempif.f * 4294967296.0f); - break; - case SST_fdTdX: case SST_remap_fdTdX: - tempif.i = val; - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].dTdX = (int64_t)(tempif.f * 4294967296.0f); - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].dTdX = (int64_t)(tempif.f * 4294967296.0f); - break; - case SST_fdWdX: case SST_remap_fdWdX: - tempif.i = val; - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].dWdX = (int64_t)(tempif.f * 4294967296.0f); - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].dWdX = (int64_t)(tempif.f * 4294967296.0f); - if (chip & CHIP_FBI) - voodoo->params.dWdX = (int64_t)(tempif.f * 4294967296.0f); - break; + // voodoo_reg_log("Swap buffer %08x %d %p %i\n", val, voodoo->swap_count, &voodoo->swap_count, (voodoo == voodoo->set->voodoos[1]) ? 1 : 0); + // voodoo->front_offset = params->front_offset; + voodoo_wait_for_render_thread_idle(voodoo); + if (!(val & 1)) { + memset(voodoo->dirty_line, 1, sizeof(voodoo->dirty_line)); + voodoo->front_offset = voodoo->params.front_offset; + thread_wait_mutex(voodoo->swap_mutex); + if (voodoo->swap_count > 0) + voodoo->swap_count--; + thread_release_mutex(voodoo->swap_mutex); + } else if (TRIPLE_BUFFER) { + if (voodoo->swap_pending) + voodoo_wait_for_swap_complete(voodoo); - case SST_fdRdY: case SST_remap_fdRdY: - tempif.i = val; - voodoo->params.dRdY = (int32_t)(tempif.f * 4096.0f); - break; - case SST_fdGdY: case SST_remap_fdGdY: - tempif.i = val; - voodoo->params.dGdY = (int32_t)(tempif.f * 4096.0f); - break; - case SST_fdBdY: case SST_remap_fdBdY: - tempif.i = val; - voodoo->params.dBdY = (int32_t)(tempif.f * 4096.0f); - break; - case SST_fdZdY: case SST_remap_fdZdY: - tempif.i = val; - voodoo->params.dZdY = (int32_t)(tempif.f * 4096.0f); - break; - case SST_fdAdY: case SST_remap_fdAdY: - tempif.i = val; - voodoo->params.dAdY = (int32_t)(tempif.f * 4096.0f); - break; - case SST_fdSdY: case SST_remap_fdSdY: - tempif.i = val; - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].dSdY = (int64_t)(tempif.f * 4294967296.0f); - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].dSdY = (int64_t)(tempif.f * 4294967296.0f); - break; - case SST_fdTdY: case SST_remap_fdTdY: - tempif.i = val; - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].dTdY = (int64_t)(tempif.f * 4294967296.0f); - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].dTdY = (int64_t)(tempif.f * 4294967296.0f); - break; - case SST_fdWdY: case SST_remap_fdWdY: - tempif.i = val; - if (chip & CHIP_TREX0) - voodoo->params.tmu[0].dWdY = (int64_t)(tempif.f * 4294967296.0f); - if (chip & CHIP_TREX1) - voodoo->params.tmu[1].dWdY = (int64_t)(tempif.f * 4294967296.0f); - if (chip & CHIP_FBI) - voodoo->params.dWdY = (int64_t)(tempif.f * 4294967296.0f); - break; + voodoo->swap_interval = (val >> 1) & 0xff; + voodoo->swap_offset = voodoo->params.front_offset; + voodoo->swap_pending = 1; + } else { + voodoo->swap_interval = (val >> 1) & 0xff; + voodoo->swap_offset = voodoo->params.front_offset; + voodoo->swap_pending = 1; - case SST_ftriangleCMD: - voodoo->params.sign = val & (1 << 31); + voodoo_wait_for_swap_complete(voodoo); + } + voodoo->cmd_read++; + break; - if (voodoo->ncc_dirty[0]) - voodoo_update_ncc(voodoo, 0); - if (voodoo->ncc_dirty[1]) - voodoo_update_ncc(voodoo, 1); - voodoo->ncc_dirty[0] = voodoo->ncc_dirty[1] = 0; + case SST_vertexAx: + case SST_remap_vertexAx: + voodoo->params.vertexAx = val & 0xffff; + break; + case SST_vertexAy: + case SST_remap_vertexAy: + voodoo->params.vertexAy = val & 0xffff; + break; + case SST_vertexBx: + case SST_remap_vertexBx: + voodoo->params.vertexBx = val & 0xffff; + break; + case SST_vertexBy: + case SST_remap_vertexBy: + voodoo->params.vertexBy = val & 0xffff; + break; + case SST_vertexCx: + case SST_remap_vertexCx: + voodoo->params.vertexCx = val & 0xffff; + break; + case SST_vertexCy: + case SST_remap_vertexCy: + voodoo->params.vertexCy = val & 0xffff; + break; - voodoo_queue_triangle(voodoo, &voodoo->params); + case SST_startR: + case SST_remap_startR: + voodoo->params.startR = val & 0xffffff; + break; + case SST_startG: + case SST_remap_startG: + voodoo->params.startG = val & 0xffffff; + break; + case SST_startB: + case SST_remap_startB: + voodoo->params.startB = val & 0xffffff; + break; + case SST_startZ: + case SST_remap_startZ: + voodoo->params.startZ = val; + break; + case SST_startA: + case SST_remap_startA: + voodoo->params.startA = val & 0xffffff; + break; + case SST_startS: + case SST_remap_startS: + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].startS = ((int64_t) (int32_t) val) << 14; + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].startS = ((int64_t) (int32_t) val) << 14; + break; + case SST_startT: + case SST_remap_startT: + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].startT = ((int64_t) (int32_t) val) << 14; + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].startT = ((int64_t) (int32_t) val) << 14; + break; + case SST_startW: + case SST_remap_startW: + if (chip & CHIP_FBI) + voodoo->params.startW = (int64_t) (int32_t) val << 2; + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].startW = (int64_t) (int32_t) val << 2; + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].startW = (int64_t) (int32_t) val << 2; + break; - voodoo->cmd_read++; - break; + case SST_dRdX: + case SST_remap_dRdX: + voodoo->params.dRdX = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); + break; + case SST_dGdX: + case SST_remap_dGdX: + voodoo->params.dGdX = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); + break; + case SST_dBdX: + case SST_remap_dBdX: + voodoo->params.dBdX = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); + break; + case SST_dZdX: + case SST_remap_dZdX: + voodoo->params.dZdX = val; + break; + case SST_dAdX: + case SST_remap_dAdX: + voodoo->params.dAdX = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); + break; + case SST_dSdX: + case SST_remap_dSdX: + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].dSdX = ((int64_t) (int32_t) val) << 14; + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].dSdX = ((int64_t) (int32_t) val) << 14; + break; + case SST_dTdX: + case SST_remap_dTdX: + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].dTdX = ((int64_t) (int32_t) val) << 14; + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].dTdX = ((int64_t) (int32_t) val) << 14; + break; + case SST_dWdX: + case SST_remap_dWdX: + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].dWdX = (int64_t) (int32_t) val << 2; + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].dWdX = (int64_t) (int32_t) val << 2; + if (chip & CHIP_FBI) + voodoo->params.dWdX = (int64_t) (int32_t) val << 2; + break; - case SST_fbzColorPath: - voodoo->params.fbzColorPath = val; - voodoo->rgb_sel = val & 3; - break; + case SST_dRdY: + case SST_remap_dRdY: + voodoo->params.dRdY = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); + break; + case SST_dGdY: + case SST_remap_dGdY: + voodoo->params.dGdY = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); + break; + case SST_dBdY: + case SST_remap_dBdY: + voodoo->params.dBdY = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); + break; + case SST_dZdY: + case SST_remap_dZdY: + voodoo->params.dZdY = val; + break; + case SST_dAdY: + case SST_remap_dAdY: + voodoo->params.dAdY = (val & 0xffffff) | ((val & 0x800000) ? 0xff000000 : 0); + break; + case SST_dSdY: + case SST_remap_dSdY: + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].dSdY = ((int64_t) (int32_t) val) << 14; + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].dSdY = ((int64_t) (int32_t) val) << 14; + break; + case SST_dTdY: + case SST_remap_dTdY: + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].dTdY = ((int64_t) (int32_t) val) << 14; + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].dTdY = ((int64_t) (int32_t) val) << 14; + break; + case SST_dWdY: + case SST_remap_dWdY: + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].dWdY = (int64_t) (int32_t) val << 2; + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].dWdY = (int64_t) (int32_t) val << 2; + if (chip & CHIP_FBI) + voodoo->params.dWdY = (int64_t) (int32_t) val << 2; + break; - case SST_fogMode: - voodoo->params.fogMode = val; - break; - case SST_alphaMode: - voodoo->params.alphaMode = val; - break; - case SST_fbzMode: - voodoo->params.fbzMode = val; - voodoo_recalc(voodoo); - break; - case SST_lfbMode: - voodoo->lfbMode = val; - voodoo_recalc(voodoo); - break; + case SST_triangleCMD: + case SST_remap_triangleCMD: + voodoo->params.sign = val & (1 << 31); - case SST_clipLeftRight: - if (voodoo->type >= VOODOO_2) - { - voodoo->params.clipRight = val & 0xfff; - voodoo->params.clipLeft = (val >> 16) & 0xfff; + if (voodoo->ncc_dirty[0]) + voodoo_update_ncc(voodoo, 0); + if (voodoo->ncc_dirty[1]) + voodoo_update_ncc(voodoo, 1); + voodoo->ncc_dirty[0] = voodoo->ncc_dirty[1] = 0; + + voodoo_queue_triangle(voodoo, &voodoo->params); + + voodoo->cmd_read++; + break; + + case SST_fvertexAx: + case SST_remap_fvertexAx: + voodoo->fvertexAx.i = val; + voodoo->params.vertexAx = (int32_t) (int16_t) (int32_t) (voodoo->fvertexAx.f * 16.0f) & 0xffff; + break; + case SST_fvertexAy: + case SST_remap_fvertexAy: + voodoo->fvertexAy.i = val; + voodoo->params.vertexAy = (int32_t) (int16_t) (int32_t) (voodoo->fvertexAy.f * 16.0f) & 0xffff; + break; + case SST_fvertexBx: + case SST_remap_fvertexBx: + voodoo->fvertexBx.i = val; + voodoo->params.vertexBx = (int32_t) (int16_t) (int32_t) (voodoo->fvertexBx.f * 16.0f) & 0xffff; + break; + case SST_fvertexBy: + case SST_remap_fvertexBy: + voodoo->fvertexBy.i = val; + voodoo->params.vertexBy = (int32_t) (int16_t) (int32_t) (voodoo->fvertexBy.f * 16.0f) & 0xffff; + break; + case SST_fvertexCx: + case SST_remap_fvertexCx: + voodoo->fvertexCx.i = val; + voodoo->params.vertexCx = (int32_t) (int16_t) (int32_t) (voodoo->fvertexCx.f * 16.0f) & 0xffff; + break; + case SST_fvertexCy: + case SST_remap_fvertexCy: + voodoo->fvertexCy.i = val; + voodoo->params.vertexCy = (int32_t) (int16_t) (int32_t) (voodoo->fvertexCy.f * 16.0f) & 0xffff; + break; + + case SST_fstartR: + case SST_remap_fstartR: + tempif.i = val; + voodoo->params.startR = (int32_t) (tempif.f * 4096.0f); + break; + case SST_fstartG: + case SST_remap_fstartG: + tempif.i = val; + voodoo->params.startG = (int32_t) (tempif.f * 4096.0f); + break; + case SST_fstartB: + case SST_remap_fstartB: + tempif.i = val; + voodoo->params.startB = (int32_t) (tempif.f * 4096.0f); + break; + case SST_fstartZ: + case SST_remap_fstartZ: + tempif.i = val; + voodoo->params.startZ = (int32_t) (tempif.f * 4096.0f); + break; + case SST_fstartA: + case SST_remap_fstartA: + tempif.i = val; + voodoo->params.startA = (int32_t) (tempif.f * 4096.0f); + break; + case SST_fstartS: + case SST_remap_fstartS: + tempif.i = val; + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].startS = (int64_t) (tempif.f * 4294967296.0f); + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].startS = (int64_t) (tempif.f * 4294967296.0f); + break; + case SST_fstartT: + case SST_remap_fstartT: + tempif.i = val; + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].startT = (int64_t) (tempif.f * 4294967296.0f); + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].startT = (int64_t) (tempif.f * 4294967296.0f); + break; + case SST_fstartW: + case SST_remap_fstartW: + tempif.i = val; + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].startW = (int64_t) (tempif.f * 4294967296.0f); + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].startW = (int64_t) (tempif.f * 4294967296.0f); + if (chip & CHIP_FBI) + voodoo->params.startW = (int64_t) (tempif.f * 4294967296.0f); + break; + + case SST_fdRdX: + case SST_remap_fdRdX: + tempif.i = val; + voodoo->params.dRdX = (int32_t) (tempif.f * 4096.0f); + break; + case SST_fdGdX: + case SST_remap_fdGdX: + tempif.i = val; + voodoo->params.dGdX = (int32_t) (tempif.f * 4096.0f); + break; + case SST_fdBdX: + case SST_remap_fdBdX: + tempif.i = val; + voodoo->params.dBdX = (int32_t) (tempif.f * 4096.0f); + break; + case SST_fdZdX: + case SST_remap_fdZdX: + tempif.i = val; + voodoo->params.dZdX = (int32_t) (tempif.f * 4096.0f); + break; + case SST_fdAdX: + case SST_remap_fdAdX: + tempif.i = val; + voodoo->params.dAdX = (int32_t) (tempif.f * 4096.0f); + break; + case SST_fdSdX: + case SST_remap_fdSdX: + tempif.i = val; + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].dSdX = (int64_t) (tempif.f * 4294967296.0f); + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].dSdX = (int64_t) (tempif.f * 4294967296.0f); + break; + case SST_fdTdX: + case SST_remap_fdTdX: + tempif.i = val; + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].dTdX = (int64_t) (tempif.f * 4294967296.0f); + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].dTdX = (int64_t) (tempif.f * 4294967296.0f); + break; + case SST_fdWdX: + case SST_remap_fdWdX: + tempif.i = val; + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].dWdX = (int64_t) (tempif.f * 4294967296.0f); + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].dWdX = (int64_t) (tempif.f * 4294967296.0f); + if (chip & CHIP_FBI) + voodoo->params.dWdX = (int64_t) (tempif.f * 4294967296.0f); + break; + + case SST_fdRdY: + case SST_remap_fdRdY: + tempif.i = val; + voodoo->params.dRdY = (int32_t) (tempif.f * 4096.0f); + break; + case SST_fdGdY: + case SST_remap_fdGdY: + tempif.i = val; + voodoo->params.dGdY = (int32_t) (tempif.f * 4096.0f); + break; + case SST_fdBdY: + case SST_remap_fdBdY: + tempif.i = val; + voodoo->params.dBdY = (int32_t) (tempif.f * 4096.0f); + break; + case SST_fdZdY: + case SST_remap_fdZdY: + tempif.i = val; + voodoo->params.dZdY = (int32_t) (tempif.f * 4096.0f); + break; + case SST_fdAdY: + case SST_remap_fdAdY: + tempif.i = val; + voodoo->params.dAdY = (int32_t) (tempif.f * 4096.0f); + break; + case SST_fdSdY: + case SST_remap_fdSdY: + tempif.i = val; + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].dSdY = (int64_t) (tempif.f * 4294967296.0f); + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].dSdY = (int64_t) (tempif.f * 4294967296.0f); + break; + case SST_fdTdY: + case SST_remap_fdTdY: + tempif.i = val; + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].dTdY = (int64_t) (tempif.f * 4294967296.0f); + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].dTdY = (int64_t) (tempif.f * 4294967296.0f); + break; + case SST_fdWdY: + case SST_remap_fdWdY: + tempif.i = val; + if (chip & CHIP_TREX0) + voodoo->params.tmu[0].dWdY = (int64_t) (tempif.f * 4294967296.0f); + if (chip & CHIP_TREX1) + voodoo->params.tmu[1].dWdY = (int64_t) (tempif.f * 4294967296.0f); + if (chip & CHIP_FBI) + voodoo->params.dWdY = (int64_t) (tempif.f * 4294967296.0f); + break; + + case SST_ftriangleCMD: + voodoo->params.sign = val & (1 << 31); + + if (voodoo->ncc_dirty[0]) + voodoo_update_ncc(voodoo, 0); + if (voodoo->ncc_dirty[1]) + voodoo_update_ncc(voodoo, 1); + voodoo->ncc_dirty[0] = voodoo->ncc_dirty[1] = 0; + + voodoo_queue_triangle(voodoo, &voodoo->params); + + voodoo->cmd_read++; + break; + + case SST_fbzColorPath: + voodoo->params.fbzColorPath = val; + voodoo->rgb_sel = val & 3; + break; + + case SST_fogMode: + voodoo->params.fogMode = val; + break; + case SST_alphaMode: + voodoo->params.alphaMode = val; + break; + case SST_fbzMode: + voodoo->params.fbzMode = val; + voodoo_recalc(voodoo); + break; + case SST_lfbMode: + voodoo->lfbMode = val; + voodoo_recalc(voodoo); + break; + + case SST_clipLeftRight: + if (voodoo->type >= VOODOO_2) { + voodoo->params.clipRight = val & 0xfff; + voodoo->params.clipLeft = (val >> 16) & 0xfff; + } else { + voodoo->params.clipRight = val & 0x3ff; + voodoo->params.clipLeft = (val >> 16) & 0x3ff; + } + break; + case SST_clipLowYHighY: + if (voodoo->type >= VOODOO_2) { + voodoo->params.clipHighY = val & 0xfff; + voodoo->params.clipLowY = (val >> 16) & 0xfff; + } else { + voodoo->params.clipHighY = val & 0x3ff; + voodoo->params.clipLowY = (val >> 16) & 0x3ff; + } + break; + + case SST_nopCMD: + voodoo->cmd_read++; + voodoo->fbiPixelsIn = 0; + voodoo->fbiChromaFail = 0; + voodoo->fbiZFuncFail = 0; + voodoo->fbiAFuncFail = 0; + voodoo->fbiPixelsOut = 0; + break; + case SST_fastfillCMD: + voodoo_wait_for_render_thread_idle(voodoo); + voodoo_fastfill(voodoo, &voodoo->params); + voodoo->cmd_read++; + break; + + case SST_fogColor: + voodoo->params.fogColor.r = (val >> 16) & 0xff; + voodoo->params.fogColor.g = (val >> 8) & 0xff; + voodoo->params.fogColor.b = val & 0xff; + break; + + case SST_zaColor: + voodoo->params.zaColor = val; + break; + case SST_chromaKey: + voodoo->params.chromaKey_r = (val >> 16) & 0xff; + voodoo->params.chromaKey_g = (val >> 8) & 0xff; + voodoo->params.chromaKey_b = val & 0xff; + voodoo->params.chromaKey = val & 0xffffff; + break; + case SST_stipple: + voodoo->params.stipple = val; + break; + case SST_color0: + voodoo->params.color0 = val; + break; + case SST_color1: + voodoo->params.color1 = val; + break; + + case SST_fogTable00: + case SST_fogTable01: + case SST_fogTable02: + case SST_fogTable03: + case SST_fogTable04: + case SST_fogTable05: + case SST_fogTable06: + case SST_fogTable07: + case SST_fogTable08: + case SST_fogTable09: + case SST_fogTable0a: + case SST_fogTable0b: + case SST_fogTable0c: + case SST_fogTable0d: + case SST_fogTable0e: + case SST_fogTable0f: + case SST_fogTable10: + case SST_fogTable11: + case SST_fogTable12: + case SST_fogTable13: + case SST_fogTable14: + case SST_fogTable15: + case SST_fogTable16: + case SST_fogTable17: + case SST_fogTable18: + case SST_fogTable19: + case SST_fogTable1a: + case SST_fogTable1b: + case SST_fogTable1c: + case SST_fogTable1d: + case SST_fogTable1e: + case SST_fogTable1f: + addr = (addr - SST_fogTable00) >> 1; + voodoo->params.fogTable[addr].dfog = val & 0xff; + voodoo->params.fogTable[addr].fog = (val >> 8) & 0xff; + voodoo->params.fogTable[addr + 1].dfog = (val >> 16) & 0xff; + voodoo->params.fogTable[addr + 1].fog = (val >> 24) & 0xff; + break; + + case SST_clipLeftRight1: + if (voodoo->type >= VOODOO_BANSHEE) { + voodoo->params.clipRight1 = val & 0xfff; + voodoo->params.clipLeft1 = (val >> 16) & 0xfff; + } + break; + case SST_clipTopBottom1: + if (voodoo->type >= VOODOO_BANSHEE) { + voodoo->params.clipHighY1 = val & 0xfff; + voodoo->params.clipLowY1 = (val >> 16) & 0xfff; + } + break; + + case SST_colBufferAddr: + if (voodoo->type >= VOODOO_BANSHEE) { + voodoo->params.draw_offset = val & 0xfffff0; + voodoo->fb_write_offset = voodoo->params.draw_offset; + // voodoo_reg_log("colorBufferAddr=%06x\n", voodoo->params.draw_offset); + } + break; + case SST_colBufferStride: + if (voodoo->type >= VOODOO_BANSHEE) { + voodoo->col_tiled = val & (1 << 15); + voodoo->params.col_tiled = voodoo->col_tiled; + if (voodoo->col_tiled) { + voodoo->row_width = (val & 0x7f) * 128 * 32; + // voodoo_reg_log("colBufferStride tiled = %i bytes, tiled %08x\n", voodoo->row_width, val); + } else { + voodoo->row_width = val & 0x3fff; + // voodoo_reg_log("colBufferStride linear = %i bytes, linear\n", voodoo->row_width); } + voodoo->params.row_width = voodoo->row_width; + } + break; + case SST_auxBufferAddr: + if (voodoo->type >= VOODOO_BANSHEE) { + voodoo->params.aux_offset = val & 0xfffff0; + // pclog("auxBufferAddr=%06x\n", voodoo->params.aux_offset); + } + break; + case SST_auxBufferStride: + if (voodoo->type >= VOODOO_BANSHEE) { + voodoo->aux_tiled = val & (1 << 15); + voodoo->params.aux_tiled = voodoo->aux_tiled; + if (voodoo->aux_tiled) { + voodoo->aux_row_width = (val & 0x7f) * 128 * 32; + // voodoo_reg_log("auxBufferStride tiled = %i bytes, tiled\n", voodoo->aux_row_width); + } else { + voodoo->aux_row_width = val & 0x3fff; + // voodoo_reg_log("auxBufferStride linear = %i bytes, linear\n", voodoo->aux_row_width); + } + voodoo->params.aux_row_width = voodoo->aux_row_width; + } + break; + + case SST_clutData: + voodoo->clutData[(val >> 24) & 0x3f].b = val & 0xff; + voodoo->clutData[(val >> 24) & 0x3f].g = (val >> 8) & 0xff; + voodoo->clutData[(val >> 24) & 0x3f].r = (val >> 16) & 0xff; + if (val & 0x20000000) { + voodoo->clutData[(val >> 24) & 0x3f].b = 255; + voodoo->clutData[(val >> 24) & 0x3f].g = 255; + voodoo->clutData[(val >> 24) & 0x3f].r = 255; + } + voodoo->clutData_dirty = 1; + break; + + case SST_sSetupMode: + voodoo->sSetupMode = val; + break; + case SST_sVx: + tempif.i = val; + voodoo->verts[3].sVx = tempif.f; + // voodoo_reg_log("sVx[%i]=%f\n", voodoo->vertex_num, tempif.f); + break; + case SST_sVy: + tempif.i = val; + voodoo->verts[3].sVy = tempif.f; + // voodoo_reg_log("sVy[%i]=%f\n", voodoo->vertex_num, tempif.f); + break; + case SST_sARGB: + voodoo->verts[3].sBlue = (float) (val & 0xff); + voodoo->verts[3].sGreen = (float) ((val >> 8) & 0xff); + voodoo->verts[3].sRed = (float) ((val >> 16) & 0xff); + voodoo->verts[3].sAlpha = (float) ((val >> 24) & 0xff); + break; + case SST_sRed: + tempif.i = val; + voodoo->verts[3].sRed = tempif.f; + break; + case SST_sGreen: + tempif.i = val; + voodoo->verts[3].sGreen = tempif.f; + break; + case SST_sBlue: + tempif.i = val; + voodoo->verts[3].sBlue = tempif.f; + break; + case SST_sAlpha: + tempif.i = val; + voodoo->verts[3].sAlpha = tempif.f; + break; + case SST_sVz: + tempif.i = val; + voodoo->verts[3].sVz = tempif.f; + break; + case SST_sWb: + tempif.i = val; + voodoo->verts[3].sWb = tempif.f; + break; + case SST_sW0: + tempif.i = val; + voodoo->verts[3].sW0 = tempif.f; + break; + case SST_sS0: + tempif.i = val; + voodoo->verts[3].sS0 = tempif.f; + break; + case SST_sT0: + tempif.i = val; + voodoo->verts[3].sT0 = tempif.f; + break; + case SST_sW1: + tempif.i = val; + voodoo->verts[3].sW1 = tempif.f; + break; + case SST_sS1: + tempif.i = val; + voodoo->verts[3].sS1 = tempif.f; + break; + case SST_sT1: + tempif.i = val; + voodoo->verts[3].sT1 = tempif.f; + break; + + case SST_sBeginTriCMD: + // voodoo_reg_log("sBeginTriCMD %i %f\n", voodoo->vertex_num, voodoo->verts[4].sVx); + voodoo->verts[0] = voodoo->verts[3]; + voodoo->verts[1] = voodoo->verts[3]; + voodoo->verts[2] = voodoo->verts[3]; + voodoo->vertex_next_age = 0; + voodoo->vertex_ages[0] = voodoo->vertex_next_age++; + + voodoo->num_verticies = 1; + voodoo->cull_pingpong = 0; + break; + case SST_sDrawTriCMD: + // voodoo_reg_log("sDrawTriCMD %i %i\n", voodoo->num_verticies, voodoo->sSetupMode & SETUPMODE_STRIP_MODE); + /*I'm not sure this is the vertex selection algorithm actually used in the 3dfx + chips, but this works with a number of games that switch between strip and fan + mode in the middle of a run (eg Black & White, Viper Racing)*/ + if (voodoo->vertex_next_age < 3) { + /*Fewer than three vertices already written, store in next slot*/ + int vertex_nr = voodoo->vertex_next_age; + + voodoo->verts[vertex_nr] = voodoo->verts[3]; + voodoo->vertex_ages[vertex_nr] = voodoo->vertex_next_age++; + } else { + int vertex_nr = 0; + + if (!(voodoo->sSetupMode & SETUPMODE_STRIP_MODE)) { + /*Strip - find oldest vertex*/ + if ((voodoo->vertex_ages[0] < voodoo->vertex_ages[1]) && (voodoo->vertex_ages[0] < voodoo->vertex_ages[2])) + vertex_nr = 0; + else if ((voodoo->vertex_ages[1] < voodoo->vertex_ages[0]) && (voodoo->vertex_ages[1] < voodoo->vertex_ages[2])) + vertex_nr = 1; + else + vertex_nr = 2; + } else { + /*Fan - find second oldest vertex (ie pivot around oldest)*/ + if ((voodoo->vertex_ages[1] < voodoo->vertex_ages[0]) && (voodoo->vertex_ages[0] < voodoo->vertex_ages[2])) + vertex_nr = 0; + else if ((voodoo->vertex_ages[2] < voodoo->vertex_ages[0]) && (voodoo->vertex_ages[0] < voodoo->vertex_ages[1])) + vertex_nr = 0; + else if ((voodoo->vertex_ages[0] < voodoo->vertex_ages[1]) && (voodoo->vertex_ages[1] < voodoo->vertex_ages[2])) + vertex_nr = 1; + else if ((voodoo->vertex_ages[2] < voodoo->vertex_ages[1]) && (voodoo->vertex_ages[1] < voodoo->vertex_ages[0])) + vertex_nr = 1; + else + vertex_nr = 2; + } + voodoo->verts[vertex_nr] = voodoo->verts[3]; + voodoo->vertex_ages[vertex_nr] = voodoo->vertex_next_age++; + } + + voodoo->num_verticies++; + if (voodoo->num_verticies == 3) { + // voodoo_reg_log("triangle_setup\n"); + voodoo_triangle_setup(voodoo); + voodoo->cull_pingpong = !voodoo->cull_pingpong; + + voodoo->num_verticies = 2; + } + break; + + case SST_bltSrcBaseAddr: + voodoo->bltSrcBaseAddr = val & 0x3fffff; + break; + case SST_bltDstBaseAddr: + // voodoo_reg_log("Write bltDstBaseAddr %08x\n", val); + voodoo->bltDstBaseAddr = val & 0x3fffff; + break; + case SST_bltXYStrides: + voodoo->bltSrcXYStride = val & 0xfff; + voodoo->bltDstXYStride = (val >> 16) & 0xfff; + // voodoo_reg_log("Write bltXYStrides %08x\n", val); + break; + case SST_bltSrcChromaRange: + voodoo->bltSrcChromaRange = val; + voodoo->bltSrcChromaMinB = val & 0x1f; + voodoo->bltSrcChromaMinG = (val >> 5) & 0x3f; + voodoo->bltSrcChromaMinR = (val >> 11) & 0x1f; + voodoo->bltSrcChromaMaxB = (val >> 16) & 0x1f; + voodoo->bltSrcChromaMaxG = (val >> 21) & 0x3f; + voodoo->bltSrcChromaMaxR = (val >> 27) & 0x1f; + break; + case SST_bltDstChromaRange: + voodoo->bltDstChromaRange = val; + voodoo->bltDstChromaMinB = val & 0x1f; + voodoo->bltDstChromaMinG = (val >> 5) & 0x3f; + voodoo->bltDstChromaMinR = (val >> 11) & 0x1f; + voodoo->bltDstChromaMaxB = (val >> 16) & 0x1f; + voodoo->bltDstChromaMaxG = (val >> 21) & 0x3f; + voodoo->bltDstChromaMaxR = (val >> 27) & 0x1f; + break; + case SST_bltClipX: + voodoo->bltClipRight = val & 0xfff; + voodoo->bltClipLeft = (val >> 16) & 0xfff; + break; + case SST_bltClipY: + voodoo->bltClipHighY = val & 0xfff; + voodoo->bltClipLowY = (val >> 16) & 0xfff; + break; + + case SST_bltSrcXY: + voodoo->bltSrcX = val & 0x7ff; + voodoo->bltSrcY = (val >> 16) & 0x7ff; + break; + case SST_bltDstXY: + // voodoo_reg_log("Write bltDstXY %08x\n", val); + voodoo->bltDstX = val & 0x7ff; + voodoo->bltDstY = (val >> 16) & 0x7ff; + if (val & (1 << 31)) + voodoo_v2_blit_start(voodoo); + break; + case SST_bltSize: + // voodoo_reg_log("Write bltSize %08x\n", val); + voodoo->bltSizeX = val & 0xfff; + if (voodoo->bltSizeX & 0x800) + voodoo->bltSizeX |= 0xfffff000; + voodoo->bltSizeY = (val >> 16) & 0xfff; + if (voodoo->bltSizeY & 0x800) + voodoo->bltSizeY |= 0xfffff000; + if (val & (1 << 31)) + voodoo_v2_blit_start(voodoo); + break; + case SST_bltRop: + voodoo->bltRop[0] = val & 0xf; + voodoo->bltRop[1] = (val >> 4) & 0xf; + voodoo->bltRop[2] = (val >> 8) & 0xf; + voodoo->bltRop[3] = (val >> 12) & 0xf; + break; + case SST_bltColor: + // voodoo_reg_log("Write bltColor %08x\n", val); + voodoo->bltColorFg = val & 0xffff; + voodoo->bltColorBg = (val >> 16) & 0xffff; + break; + + case SST_bltCommand: + voodoo->bltCommand = val; + // voodoo_reg_log("Write bltCommand %08x\n", val); + if (val & (1 << 31)) + voodoo_v2_blit_start(voodoo); + break; + case SST_bltData: + voodoo_v2_blit_data(voodoo, val); + break; + + case SST_textureMode: + if (chip & CHIP_TREX0) { + voodoo->params.textureMode[0] = val; + voodoo->params.tformat[0] = (val >> 8) & 0xf; + } + if (chip & CHIP_TREX1) { + voodoo->params.textureMode[1] = val; + voodoo->params.tformat[1] = (val >> 8) & 0xf; + } + break; + case SST_tLOD: + if (chip & CHIP_TREX0) { + voodoo->params.tLOD[0] = val; + voodoo_recalc_tex(voodoo, 0); + } + if (chip & CHIP_TREX1) { + voodoo->params.tLOD[1] = val; + voodoo_recalc_tex(voodoo, 1); + } + break; + case SST_tDetail: + if (chip & CHIP_TREX0) { + voodoo->params.detail_max[0] = val & 0xff; + voodoo->params.detail_bias[0] = (val >> 8) & 0x3f; + voodoo->params.detail_scale[0] = (val >> 14) & 7; + } + if (chip & CHIP_TREX1) { + voodoo->params.detail_max[1] = val & 0xff; + voodoo->params.detail_bias[1] = (val >> 8) & 0x3f; + voodoo->params.detail_scale[1] = (val >> 14) & 7; + } + break; + case SST_texBaseAddr: + if (chip & CHIP_TREX0) { + if (voodoo->type >= VOODOO_BANSHEE) + voodoo->params.texBaseAddr[0] = val & 0xfffff0; else - { - voodoo->params.clipRight = val & 0x3ff; - voodoo->params.clipLeft = (val >> 16) & 0x3ff; - } - break; - case SST_clipLowYHighY: - if (voodoo->type >= VOODOO_2) - { - voodoo->params.clipHighY = val & 0xfff; - voodoo->params.clipLowY = (val >> 16) & 0xfff; - } + voodoo->params.texBaseAddr[0] = (val & 0x7ffff) << 3; + // voodoo_reg_log("texBaseAddr = %08x %08x\n", voodoo->params.texBaseAddr[0], val); + voodoo_recalc_tex(voodoo, 0); + } + if (chip & CHIP_TREX1) { + if (voodoo->type >= VOODOO_BANSHEE) + voodoo->params.texBaseAddr[1] = val & 0xfffff0; else - { - voodoo->params.clipHighY = val & 0x3ff; - voodoo->params.clipLowY = (val >> 16) & 0x3ff; - } - break; - - case SST_nopCMD: - voodoo->cmd_read++; - voodoo->fbiPixelsIn = 0; - voodoo->fbiChromaFail = 0; - voodoo->fbiZFuncFail = 0; - voodoo->fbiAFuncFail = 0; - voodoo->fbiPixelsOut = 0; - break; - case SST_fastfillCMD: - voodoo_wait_for_render_thread_idle(voodoo); - voodoo_fastfill(voodoo, &voodoo->params); - voodoo->cmd_read++; - break; - - case SST_fogColor: - voodoo->params.fogColor.r = (val >> 16) & 0xff; - voodoo->params.fogColor.g = (val >> 8) & 0xff; - voodoo->params.fogColor.b = val & 0xff; - break; - - case SST_zaColor: - voodoo->params.zaColor = val; - break; - case SST_chromaKey: - voodoo->params.chromaKey_r = (val >> 16) & 0xff; - voodoo->params.chromaKey_g = (val >> 8) & 0xff; - voodoo->params.chromaKey_b = val & 0xff; - voodoo->params.chromaKey = val & 0xffffff; - break; - case SST_stipple: - voodoo->params.stipple = val; - break; - case SST_color0: - voodoo->params.color0 = val; - break; - case SST_color1: - voodoo->params.color1 = val; - break; - - case SST_fogTable00: case SST_fogTable01: case SST_fogTable02: case SST_fogTable03: - case SST_fogTable04: case SST_fogTable05: case SST_fogTable06: case SST_fogTable07: - case SST_fogTable08: case SST_fogTable09: case SST_fogTable0a: case SST_fogTable0b: - case SST_fogTable0c: case SST_fogTable0d: case SST_fogTable0e: case SST_fogTable0f: - case SST_fogTable10: case SST_fogTable11: case SST_fogTable12: case SST_fogTable13: - case SST_fogTable14: case SST_fogTable15: case SST_fogTable16: case SST_fogTable17: - case SST_fogTable18: case SST_fogTable19: case SST_fogTable1a: case SST_fogTable1b: - case SST_fogTable1c: case SST_fogTable1d: case SST_fogTable1e: case SST_fogTable1f: - addr = (addr - SST_fogTable00) >> 1; - voodoo->params.fogTable[addr].dfog = val & 0xff; - voodoo->params.fogTable[addr].fog = (val >> 8) & 0xff; - voodoo->params.fogTable[addr+1].dfog = (val >> 16) & 0xff; - voodoo->params.fogTable[addr+1].fog = (val >> 24) & 0xff; - break; - - case SST_clipLeftRight1: + voodoo->params.texBaseAddr[1] = (val & 0x7ffff) << 3; + voodoo_recalc_tex(voodoo, 1); + } + break; + case SST_texBaseAddr1: + if (chip & CHIP_TREX0) { if (voodoo->type >= VOODOO_BANSHEE) - { - voodoo->params.clipRight1 = val & 0xfff; - voodoo->params.clipLeft1 = (val >> 16) & 0xfff; - } - break; - case SST_clipTopBottom1: - if (voodoo->type >= VOODOO_BANSHEE) - { - voodoo->params.clipHighY1 = val & 0xfff; - voodoo->params.clipLowY1 = (val >> 16) & 0xfff; - } - break; - - case SST_colBufferAddr: - if (voodoo->type >= VOODOO_BANSHEE) - { - voodoo->params.draw_offset = val & 0xfffff0; - voodoo->fb_write_offset = voodoo->params.draw_offset; -// voodoo_reg_log("colorBufferAddr=%06x\n", voodoo->params.draw_offset); - } - break; - case SST_colBufferStride: - if (voodoo->type >= VOODOO_BANSHEE) - { - voodoo->col_tiled = val & (1 << 15); - voodoo->params.col_tiled = voodoo->col_tiled; - if (voodoo->col_tiled) - { - voodoo->row_width = (val & 0x7f) * 128*32; -// voodoo_reg_log("colBufferStride tiled = %i bytes, tiled %08x\n", voodoo->row_width, val); - } - else - { - voodoo->row_width = val & 0x3fff; -// voodoo_reg_log("colBufferStride linear = %i bytes, linear\n", voodoo->row_width); - } - voodoo->params.row_width = voodoo->row_width; - } - break; - case SST_auxBufferAddr: - if (voodoo->type >= VOODOO_BANSHEE) - { - voodoo->params.aux_offset = val & 0xfffff0; -// pclog("auxBufferAddr=%06x\n", voodoo->params.aux_offset); - } - break; - case SST_auxBufferStride: - if (voodoo->type >= VOODOO_BANSHEE) - { - voodoo->aux_tiled = val & (1 << 15); - voodoo->params.aux_tiled = voodoo->aux_tiled; - if (voodoo->aux_tiled) - { - voodoo->aux_row_width = (val & 0x7f) * 128*32; -// voodoo_reg_log("auxBufferStride tiled = %i bytes, tiled\n", voodoo->aux_row_width); - } - else - { - voodoo->aux_row_width = val & 0x3fff; -// voodoo_reg_log("auxBufferStride linear = %i bytes, linear\n", voodoo->aux_row_width); - } - voodoo->params.aux_row_width = voodoo->aux_row_width; - } - break; - - case SST_clutData: - voodoo->clutData[(val >> 24) & 0x3f].b = val & 0xff; - voodoo->clutData[(val >> 24) & 0x3f].g = (val >> 8) & 0xff; - voodoo->clutData[(val >> 24) & 0x3f].r = (val >> 16) & 0xff; - if (val & 0x20000000) - { - voodoo->clutData[(val >> 24) & 0x3f].b = 255; - voodoo->clutData[(val >> 24) & 0x3f].g = 255; - voodoo->clutData[(val >> 24) & 0x3f].r = 255; - } - voodoo->clutData_dirty = 1; - break; - - case SST_sSetupMode: - voodoo->sSetupMode = val; - break; - case SST_sVx: - tempif.i = val; - voodoo->verts[3].sVx = tempif.f; -// voodoo_reg_log("sVx[%i]=%f\n", voodoo->vertex_num, tempif.f); - break; - case SST_sVy: - tempif.i = val; - voodoo->verts[3].sVy = tempif.f; -// voodoo_reg_log("sVy[%i]=%f\n", voodoo->vertex_num, tempif.f); - break; - case SST_sARGB: - voodoo->verts[3].sBlue = (float)(val & 0xff); - voodoo->verts[3].sGreen = (float)((val >> 8) & 0xff); - voodoo->verts[3].sRed = (float)((val >> 16) & 0xff); - voodoo->verts[3].sAlpha = (float)((val >> 24) & 0xff); - break; - case SST_sRed: - tempif.i = val; - voodoo->verts[3].sRed = tempif.f; - break; - case SST_sGreen: - tempif.i = val; - voodoo->verts[3].sGreen = tempif.f; - break; - case SST_sBlue: - tempif.i = val; - voodoo->verts[3].sBlue = tempif.f; - break; - case SST_sAlpha: - tempif.i = val; - voodoo->verts[3].sAlpha = tempif.f; - break; - case SST_sVz: - tempif.i = val; - voodoo->verts[3].sVz = tempif.f; - break; - case SST_sWb: - tempif.i = val; - voodoo->verts[3].sWb = tempif.f; - break; - case SST_sW0: - tempif.i = val; - voodoo->verts[3].sW0 = tempif.f; - break; - case SST_sS0: - tempif.i = val; - voodoo->verts[3].sS0 = tempif.f; - break; - case SST_sT0: - tempif.i = val; - voodoo->verts[3].sT0 = tempif.f; - break; - case SST_sW1: - tempif.i = val; - voodoo->verts[3].sW1 = tempif.f; - break; - case SST_sS1: - tempif.i = val; - voodoo->verts[3].sS1 = tempif.f; - break; - case SST_sT1: - tempif.i = val; - voodoo->verts[3].sT1 = tempif.f; - break; - - case SST_sBeginTriCMD: -// voodoo_reg_log("sBeginTriCMD %i %f\n", voodoo->vertex_num, voodoo->verts[4].sVx); - voodoo->verts[0] = voodoo->verts[3]; - voodoo->verts[1] = voodoo->verts[3]; - voodoo->verts[2] = voodoo->verts[3]; - voodoo->vertex_next_age = 0; - voodoo->vertex_ages[0] = voodoo->vertex_next_age++; - - voodoo->num_verticies = 1; - voodoo->cull_pingpong = 0; - break; - case SST_sDrawTriCMD: -// voodoo_reg_log("sDrawTriCMD %i %i\n", voodoo->num_verticies, voodoo->sSetupMode & SETUPMODE_STRIP_MODE); - /*I'm not sure this is the vertex selection algorithm actually used in the 3dfx - chips, but this works with a number of games that switch between strip and fan - mode in the middle of a run (eg Black & White, Viper Racing)*/ - if (voodoo->vertex_next_age < 3) - { - /*Fewer than three vertices already written, store in next slot*/ - int vertex_nr = voodoo->vertex_next_age; - - voodoo->verts[vertex_nr] = voodoo->verts[3]; - voodoo->vertex_ages[vertex_nr] = voodoo->vertex_next_age++; - } + voodoo->params.texBaseAddr1[0] = val & 0xfffff0; else - { - int vertex_nr = 0; + voodoo->params.texBaseAddr1[0] = (val & 0x7ffff) << 3; + voodoo_recalc_tex(voodoo, 0); + } + if (chip & CHIP_TREX1) { + if (voodoo->type >= VOODOO_BANSHEE) + voodoo->params.texBaseAddr1[1] = val & 0xfffff0; + else + voodoo->params.texBaseAddr1[1] = (val & 0x7ffff) << 3; + voodoo_recalc_tex(voodoo, 1); + } + break; + case SST_texBaseAddr2: + if (chip & CHIP_TREX0) { + if (voodoo->type >= VOODOO_BANSHEE) + voodoo->params.texBaseAddr2[0] = val & 0xfffff0; + else + voodoo->params.texBaseAddr2[0] = (val & 0x7ffff) << 3; + voodoo_recalc_tex(voodoo, 0); + } + if (chip & CHIP_TREX1) { + if (voodoo->type >= VOODOO_BANSHEE) + voodoo->params.texBaseAddr2[1] = val & 0xfffff0; + else + voodoo->params.texBaseAddr2[1] = (val & 0x7ffff) << 3; + voodoo_recalc_tex(voodoo, 1); + } + break; + case SST_texBaseAddr38: + if (chip & CHIP_TREX0) { + if (voodoo->type >= VOODOO_BANSHEE) + voodoo->params.texBaseAddr38[0] = val & 0xfffff0; + else + voodoo->params.texBaseAddr38[0] = (val & 0x7ffff) << 3; + voodoo_recalc_tex(voodoo, 0); + } + if (chip & CHIP_TREX1) { + if (voodoo->type >= VOODOO_BANSHEE) + voodoo->params.texBaseAddr38[1] = val & 0xfffff0; + else + voodoo->params.texBaseAddr38[1] = (val & 0x7ffff) << 3; + voodoo_recalc_tex(voodoo, 1); + } + break; - if (!(voodoo->sSetupMode & SETUPMODE_STRIP_MODE)) - { - /*Strip - find oldest vertex*/ - if ((voodoo->vertex_ages[0] < voodoo->vertex_ages[1]) && - (voodoo->vertex_ages[0] < voodoo->vertex_ages[2])) - vertex_nr = 0; - else if ((voodoo->vertex_ages[1] < voodoo->vertex_ages[0]) && - (voodoo->vertex_ages[1] < voodoo->vertex_ages[2])) - vertex_nr = 1; - else - vertex_nr = 2; - } - else - { - /*Fan - find second oldest vertex (ie pivot around oldest)*/ - if ((voodoo->vertex_ages[1] < voodoo->vertex_ages[0]) && - (voodoo->vertex_ages[0] < voodoo->vertex_ages[2])) - vertex_nr = 0; - else if ((voodoo->vertex_ages[2] < voodoo->vertex_ages[0]) && - (voodoo->vertex_ages[0] < voodoo->vertex_ages[1])) - vertex_nr = 0; - else if ((voodoo->vertex_ages[0] < voodoo->vertex_ages[1]) && - (voodoo->vertex_ages[1] < voodoo->vertex_ages[2])) - vertex_nr = 1; - else if ((voodoo->vertex_ages[2] < voodoo->vertex_ages[1]) && - (voodoo->vertex_ages[1] < voodoo->vertex_ages[0])) - vertex_nr = 1; - else - vertex_nr = 2; - } - voodoo->verts[vertex_nr] = voodoo->verts[3]; - voodoo->vertex_ages[vertex_nr] = voodoo->vertex_next_age++; - } + case SST_trexInit1: + if (chip & CHIP_TREX0) + voodoo->trexInit1[0] = val; + if (chip & CHIP_TREX1) + voodoo->trexInit1[1] = val; + break; - voodoo->num_verticies++; - if (voodoo->num_verticies == 3) - { -// voodoo_reg_log("triangle_setup\n"); - voodoo_triangle_setup(voodoo); - voodoo->cull_pingpong = !voodoo->cull_pingpong; + case SST_nccTable0_Y0: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][0].y[0] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][0].y[0] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + case SST_nccTable0_Y1: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][0].y[1] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][0].y[1] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + case SST_nccTable0_Y2: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][0].y[2] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][0].y[2] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + case SST_nccTable0_Y3: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][0].y[3] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][0].y[3] = val; + voodoo->ncc_dirty[1] = 1; + } + break; - voodoo->num_verticies = 2; + case SST_nccTable0_I0: + if (!(val & (1 << 31))) { + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][0].i[0] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][0].i[0] = val; + voodoo->ncc_dirty[1] = 1; } break; + } + case SST_nccTable0_I2: + if (!(val & (1 << 31))) { + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][0].i[2] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][0].i[2] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + } + case SST_nccTable0_Q0: + if (!(val & (1 << 31))) { + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][0].q[0] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][0].q[0] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + } + case SST_nccTable0_Q2: + if (!(val & (1 << 31))) { + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][0].i[2] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][0].i[2] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + } + if (val & (1 << 31)) { + int p = (val >> 23) & 0xfe; + if (chip & CHIP_TREX0) { + voodoo->palette[0][p].u = val | 0xff000000; + voodoo->palette_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->palette[1][p].u = val | 0xff000000; + voodoo->palette_dirty[1] = 1; + } + } + break; - case SST_bltSrcBaseAddr: - voodoo->bltSrcBaseAddr = val & 0x3fffff; + case SST_nccTable0_I1: + if (!(val & (1 << 31))) { + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][0].i[1] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][0].i[1] = val; + voodoo->ncc_dirty[1] = 1; + } break; - case SST_bltDstBaseAddr: -// voodoo_reg_log("Write bltDstBaseAddr %08x\n", val); - voodoo->bltDstBaseAddr = val & 0x3fffff; + } + case SST_nccTable0_I3: + if (!(val & (1 << 31))) { + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][0].i[3] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][0].i[3] = val; + voodoo->ncc_dirty[1] = 1; + } break; - case SST_bltXYStrides: - voodoo->bltSrcXYStride = val & 0xfff; - voodoo->bltDstXYStride = (val >> 16) & 0xfff; -// voodoo_reg_log("Write bltXYStrides %08x\n", val); + } + case SST_nccTable0_Q1: + if (!(val & (1 << 31))) { + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][0].q[1] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][0].q[1] = val; + voodoo->ncc_dirty[1] = 1; + } break; - case SST_bltSrcChromaRange: - voodoo->bltSrcChromaRange = val; - voodoo->bltSrcChromaMinB = val & 0x1f; - voodoo->bltSrcChromaMinG = (val >> 5) & 0x3f; - voodoo->bltSrcChromaMinR = (val >> 11) & 0x1f; - voodoo->bltSrcChromaMaxB = (val >> 16) & 0x1f; - voodoo->bltSrcChromaMaxG = (val >> 21) & 0x3f; - voodoo->bltSrcChromaMaxR = (val >> 27) & 0x1f; - break; - case SST_bltDstChromaRange: - voodoo->bltDstChromaRange = val; - voodoo->bltDstChromaMinB = val & 0x1f; - voodoo->bltDstChromaMinG = (val >> 5) & 0x3f; - voodoo->bltDstChromaMinR = (val >> 11) & 0x1f; - voodoo->bltDstChromaMaxB = (val >> 16) & 0x1f; - voodoo->bltDstChromaMaxG = (val >> 21) & 0x3f; - voodoo->bltDstChromaMaxR = (val >> 27) & 0x1f; - break; - case SST_bltClipX: - voodoo->bltClipRight = val & 0xfff; - voodoo->bltClipLeft = (val >> 16) & 0xfff; - break; - case SST_bltClipY: - voodoo->bltClipHighY = val & 0xfff; - voodoo->bltClipLowY = (val >> 16) & 0xfff; + } + case SST_nccTable0_Q3: + if (!(val & (1 << 31))) { + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][0].q[3] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][0].q[3] = val; + voodoo->ncc_dirty[1] = 1; + } break; + } + if (val & (1 << 31)) { + int p = ((val >> 23) & 0xfe) | 0x01; + if (chip & CHIP_TREX0) { + voodoo->palette[0][p].u = val | 0xff000000; + voodoo->palette_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->palette[1][p].u = val | 0xff000000; + voodoo->palette_dirty[1] = 1; + } + } + break; - case SST_bltSrcXY: - voodoo->bltSrcX = val & 0x7ff; - voodoo->bltSrcY = (val >> 16) & 0x7ff; - break; - case SST_bltDstXY: -// voodoo_reg_log("Write bltDstXY %08x\n", val); - voodoo->bltDstX = val & 0x7ff; - voodoo->bltDstY = (val >> 16) & 0x7ff; - if (val & (1 << 31)) - voodoo_v2_blit_start(voodoo); - break; - case SST_bltSize: -// voodoo_reg_log("Write bltSize %08x\n", val); - voodoo->bltSizeX = val & 0xfff; - if (voodoo->bltSizeX & 0x800) - voodoo->bltSizeX |= 0xfffff000; - voodoo->bltSizeY = (val >> 16) & 0xfff; - if (voodoo->bltSizeY & 0x800) - voodoo->bltSizeY |= 0xfffff000; - if (val & (1 << 31)) - voodoo_v2_blit_start(voodoo); - break; - case SST_bltRop: - voodoo->bltRop[0] = val & 0xf; - voodoo->bltRop[1] = (val >> 4) & 0xf; - voodoo->bltRop[2] = (val >> 8) & 0xf; - voodoo->bltRop[3] = (val >> 12) & 0xf; - break; - case SST_bltColor: -// voodoo_reg_log("Write bltColor %08x\n", val); - voodoo->bltColorFg = val & 0xffff; - voodoo->bltColorBg = (val >> 16) & 0xffff; - break; + case SST_nccTable1_Y0: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][1].y[0] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][1].y[0] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + case SST_nccTable1_Y1: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][1].y[1] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][1].y[1] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + case SST_nccTable1_Y2: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][1].y[2] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][1].y[2] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + case SST_nccTable1_Y3: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][1].y[3] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][1].y[3] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + case SST_nccTable1_I0: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][1].i[0] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][1].i[0] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + case SST_nccTable1_I1: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][1].i[1] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][1].i[1] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + case SST_nccTable1_I2: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][1].i[2] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][1].i[2] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + case SST_nccTable1_I3: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][1].i[3] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][1].i[3] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + case SST_nccTable1_Q0: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][1].q[0] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][1].q[0] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + case SST_nccTable1_Q1: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][1].q[1] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][1].q[1] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + case SST_nccTable1_Q2: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][1].q[2] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][1].q[2] = val; + voodoo->ncc_dirty[1] = 1; + } + break; + case SST_nccTable1_Q3: + if (chip & CHIP_TREX0) { + voodoo->nccTable[0][1].q[3] = val; + voodoo->ncc_dirty[0] = 1; + } + if (chip & CHIP_TREX1) { + voodoo->nccTable[1][1].q[3] = val; + voodoo->ncc_dirty[1] = 1; + } + break; - case SST_bltCommand: - voodoo->bltCommand = val; -// voodoo_reg_log("Write bltCommand %08x\n", val); - if (val & (1 << 31)) - voodoo_v2_blit_start(voodoo); - break; - case SST_bltData: - voodoo_v2_blit_data(voodoo, val); - break; + case SST_userIntrCMD: + fatal("userIntrCMD write %08x from FIFO\n", val); + break; - case SST_textureMode: - if (chip & CHIP_TREX0) - { - voodoo->params.textureMode[0] = val; - voodoo->params.tformat[0] = (val >> 8) & 0xf; - } - if (chip & CHIP_TREX1) - { - voodoo->params.textureMode[1] = val; - voodoo->params.tformat[1] = (val >> 8) & 0xf; - } - break; - case SST_tLOD: - if (chip & CHIP_TREX0) - { - voodoo->params.tLOD[0] = val; - voodoo_recalc_tex(voodoo, 0); - } - if (chip & CHIP_TREX1) - { - voodoo->params.tLOD[1] = val; - voodoo_recalc_tex(voodoo, 1); - } - break; - case SST_tDetail: - if (chip & CHIP_TREX0) - { - voodoo->params.detail_max[0] = val & 0xff; - voodoo->params.detail_bias[0] = (val >> 8) & 0x3f; - voodoo->params.detail_scale[0] = (val >> 14) & 7; - } - if (chip & CHIP_TREX1) - { - voodoo->params.detail_max[1] = val & 0xff; - voodoo->params.detail_bias[1] = (val >> 8) & 0x3f; - voodoo->params.detail_scale[1] = (val >> 14) & 7; - } - break; - case SST_texBaseAddr: - if (chip & CHIP_TREX0) - { - if (voodoo->type >= VOODOO_BANSHEE) - voodoo->params.texBaseAddr[0] = val & 0xfffff0; - else - voodoo->params.texBaseAddr[0] = (val & 0x7ffff) << 3; -// voodoo_reg_log("texBaseAddr = %08x %08x\n", voodoo->params.texBaseAddr[0], val); - voodoo_recalc_tex(voodoo, 0); - } - if (chip & CHIP_TREX1) - { - if (voodoo->type >= VOODOO_BANSHEE) - voodoo->params.texBaseAddr[1] = val & 0xfffff0; - else - voodoo->params.texBaseAddr[1] = (val & 0x7ffff) << 3; - voodoo_recalc_tex(voodoo, 1); - } - break; - case SST_texBaseAddr1: - if (chip & CHIP_TREX0) - { - if (voodoo->type >= VOODOO_BANSHEE) - voodoo->params.texBaseAddr1[0] = val & 0xfffff0; - else - voodoo->params.texBaseAddr1[0] = (val & 0x7ffff) << 3; - voodoo_recalc_tex(voodoo, 0); - } - if (chip & CHIP_TREX1) - { - if (voodoo->type >= VOODOO_BANSHEE) - voodoo->params.texBaseAddr1[1] = val & 0xfffff0; - else - voodoo->params.texBaseAddr1[1] = (val & 0x7ffff) << 3; - voodoo_recalc_tex(voodoo, 1); - } - break; - case SST_texBaseAddr2: - if (chip & CHIP_TREX0) - { - if (voodoo->type >= VOODOO_BANSHEE) - voodoo->params.texBaseAddr2[0] = val & 0xfffff0; - else - voodoo->params.texBaseAddr2[0] = (val & 0x7ffff) << 3; - voodoo_recalc_tex(voodoo, 0); - } - if (chip & CHIP_TREX1) - { - if (voodoo->type >= VOODOO_BANSHEE) - voodoo->params.texBaseAddr2[1] = val & 0xfffff0; - else - voodoo->params.texBaseAddr2[1] = (val & 0x7ffff) << 3; - voodoo_recalc_tex(voodoo, 1); - } - break; - case SST_texBaseAddr38: - if (chip & CHIP_TREX0) - { - if (voodoo->type >= VOODOO_BANSHEE) - voodoo->params.texBaseAddr38[0] = val & 0xfffff0; - else - voodoo->params.texBaseAddr38[0] = (val & 0x7ffff) << 3; - voodoo_recalc_tex(voodoo, 0); - } - if (chip & CHIP_TREX1) - { - if (voodoo->type >= VOODOO_BANSHEE) - voodoo->params.texBaseAddr38[1] = val & 0xfffff0; - else - voodoo->params.texBaseAddr38[1] = (val & 0x7ffff) << 3; - voodoo_recalc_tex(voodoo, 1); - } - break; - - case SST_trexInit1: - if (chip & CHIP_TREX0) - voodoo->trexInit1[0] = val; - if (chip & CHIP_TREX1) - voodoo->trexInit1[1] = val; - break; - - case SST_nccTable0_Y0: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][0].y[0] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][0].y[0] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - case SST_nccTable0_Y1: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][0].y[1] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][0].y[1] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - case SST_nccTable0_Y2: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][0].y[2] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][0].y[2] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - case SST_nccTable0_Y3: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][0].y[3] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][0].y[3] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - - case SST_nccTable0_I0: - if (!(val & (1 << 31))) - { - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][0].i[0] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][0].i[0] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - } - case SST_nccTable0_I2: - if (!(val & (1 << 31))) - { - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][0].i[2] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][0].i[2] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - } - case SST_nccTable0_Q0: - if (!(val & (1 << 31))) - { - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][0].q[0] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][0].q[0] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - } - case SST_nccTable0_Q2: - if (!(val & (1 << 31))) - { - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][0].i[2] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][0].i[2] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - } - if (val & (1 << 31)) - { - int p = (val >> 23) & 0xfe; - if (chip & CHIP_TREX0) - { - voodoo->palette[0][p].u = val | 0xff000000; - voodoo->palette_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->palette[1][p].u = val | 0xff000000; - voodoo->palette_dirty[1] = 1; - } - } - break; - - case SST_nccTable0_I1: - if (!(val & (1 << 31))) - { - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][0].i[1] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][0].i[1] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - } - case SST_nccTable0_I3: - if (!(val & (1 << 31))) - { - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][0].i[3] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][0].i[3] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - } - case SST_nccTable0_Q1: - if (!(val & (1 << 31))) - { - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][0].q[1] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][0].q[1] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - } - case SST_nccTable0_Q3: - if (!(val & (1 << 31))) - { - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][0].q[3] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][0].q[3] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - } - if (val & (1 << 31)) - { - int p = ((val >> 23) & 0xfe) | 0x01; - if (chip & CHIP_TREX0) - { - voodoo->palette[0][p].u = val | 0xff000000; - voodoo->palette_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->palette[1][p].u = val | 0xff000000; - voodoo->palette_dirty[1] = 1; - } - } - break; - - case SST_nccTable1_Y0: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][1].y[0] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][1].y[0] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - case SST_nccTable1_Y1: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][1].y[1] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][1].y[1] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - case SST_nccTable1_Y2: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][1].y[2] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][1].y[2] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - case SST_nccTable1_Y3: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][1].y[3] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][1].y[3] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - case SST_nccTable1_I0: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][1].i[0] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][1].i[0] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - case SST_nccTable1_I1: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][1].i[1] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][1].i[1] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - case SST_nccTable1_I2: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][1].i[2] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][1].i[2] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - case SST_nccTable1_I3: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][1].i[3] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][1].i[3] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - case SST_nccTable1_Q0: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][1].q[0] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][1].q[0] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - case SST_nccTable1_Q1: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][1].q[1] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][1].q[1] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - case SST_nccTable1_Q2: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][1].q[2] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][1].q[2] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - case SST_nccTable1_Q3: - if (chip & CHIP_TREX0) - { - voodoo->nccTable[0][1].q[3] = val; - voodoo->ncc_dirty[0] = 1; - } - if (chip & CHIP_TREX1) - { - voodoo->nccTable[1][1].q[3] = val; - voodoo->ncc_dirty[1] = 1; - } - break; - - case SST_userIntrCMD: - fatal("userIntrCMD write %08x from FIFO\n", val); - break; - - - case SST_leftOverlayBuf: - voodoo->leftOverlayBuf = val; - break; - } + case SST_leftOverlayBuf: + voodoo->leftOverlayBuf = val; + break; + } } diff --git a/src/video/vid_voodoo_render.c b/src/video/vid_voodoo_render.c index 362f45abe..608f99a6a 100644 --- a/src/video/vid_voodoo_render.c +++ b/src/video/vid_voodoo_render.c @@ -38,59 +38,57 @@ #include <86box/vid_voodoo_render.h> #include <86box/vid_voodoo_texture.h> +typedef struct voodoo_state_t { + int xstart, xend, xdir; + uint32_t base_r, base_g, base_b, base_a, base_z; + struct + { + int64_t base_s, base_t, base_w; + int lod; + } tmu[2]; + int64_t base_w; + int lod; + int lod_min[2], lod_max[2]; + int dx1, dx2; + int y, yend, ydir; + int32_t dxAB, dxAC, dxBC; + int tex_b[2], tex_g[2], tex_r[2], tex_a[2]; + int tex_s, tex_t; + int clamp_s[2], clamp_t[2]; -typedef struct voodoo_state_t -{ - int xstart, xend, xdir; - uint32_t base_r, base_g, base_b, base_a, base_z; - struct - { - int64_t base_s, base_t, base_w; - int lod; - } tmu[2]; - int64_t base_w; - int lod; - int lod_min[2], lod_max[2]; - int dx1, dx2; - int y, yend, ydir; - int32_t dxAB, dxAC, dxBC; - int tex_b[2], tex_g[2], tex_r[2], tex_a[2]; - int tex_s, tex_t; - int clamp_s[2], clamp_t[2]; + int32_t vertexAx, vertexAy, vertexBx, vertexBy, vertexCx, vertexCy; - int32_t vertexAx, vertexAy, vertexBx, vertexBy, vertexCx, vertexCy; + uint32_t *tex[2][LOD_MAX + 1]; + int tformat; - uint32_t *tex[2][LOD_MAX+1]; - int tformat; + int *tex_w_mask[2]; + int *tex_h_mask[2]; + int *tex_shift[2]; + int *tex_lod[2]; - int *tex_w_mask[2]; - int *tex_h_mask[2]; - int *tex_shift[2]; - int *tex_lod[2]; + uint16_t *fb_mem, *aux_mem; - uint16_t *fb_mem, *aux_mem; + int32_t ib, ig, ir, ia; + int32_t z; - int32_t ib, ig, ir, ia; - int32_t z; + int32_t new_depth; - int32_t new_depth; + int64_t tmu0_s, tmu0_t; + int64_t tmu0_w; + int64_t tmu1_s, tmu1_t; + int64_t tmu1_w; + int64_t w; - int64_t tmu0_s, tmu0_t; - int64_t tmu0_w; - int64_t tmu1_s, tmu1_t; - int64_t tmu1_w; - int64_t w; + int pixel_count, texel_count; + int x, x2, x_tiled; - int pixel_count, texel_count; - int x, x2, x_tiled; + uint32_t w_depth; - uint32_t w_depth; + float log_temp; + uint32_t ebp_store; + uint32_t texBaseAddr; - float log_temp; - uint32_t ebp_store; - uint32_t texBaseAddr; - - int lod_frac[2]; + int lod_frac[2]; } voodoo_state_t; #ifdef ENABLE_VOODOO_RENDER_LOG @@ -102,1589 +100,1453 @@ voodoo_render_log(const char *fmt, ...) va_list ap; if (voodoo_render_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define voodoo_render_log(fmt, ...) +# define voodoo_render_log(fmt, ...) #endif - -static uint8_t logtable[256] = -{ - 0x00,0x01,0x02,0x04,0x05,0x07,0x08,0x09,0x0b,0x0c,0x0e,0x0f,0x10,0x12,0x13,0x15, - 0x16,0x17,0x19,0x1a,0x1b,0x1d,0x1e,0x1f,0x21,0x22,0x23,0x25,0x26,0x27,0x28,0x2a, - 0x2b,0x2c,0x2e,0x2f,0x30,0x31,0x33,0x34,0x35,0x36,0x38,0x39,0x3a,0x3b,0x3d,0x3e, - 0x3f,0x40,0x41,0x43,0x44,0x45,0x46,0x47,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x50,0x51, - 0x52,0x53,0x54,0x55,0x57,0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x60,0x61,0x62,0x63, - 0x64,0x65,0x66,0x67,0x68,0x69,0x6a,0x6c,0x6d,0x6e,0x6f,0x70,0x71,0x72,0x73,0x74, - 0x75,0x76,0x77,0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f,0x80,0x81,0x83,0x84,0x85, - 0x86,0x87,0x88,0x89,0x8a,0x8b,0x8c,0x8c,0x8d,0x8e,0x8f,0x90,0x91,0x92,0x93,0x94, - 0x95,0x96,0x97,0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f,0xa0,0xa1,0xa2,0xa2,0xa3, - 0xa4,0xa5,0xa6,0xa7,0xa8,0xa9,0xaa,0xab,0xac,0xad,0xad,0xae,0xaf,0xb0,0xb1,0xb2, - 0xb3,0xb4,0xb5,0xb5,0xb6,0xb7,0xb8,0xb9,0xba,0xbb,0xbc,0xbc,0xbd,0xbe,0xbf,0xc0, - 0xc1,0xc2,0xc2,0xc3,0xc4,0xc5,0xc6,0xc7,0xc8,0xc8,0xc9,0xca,0xcb,0xcc,0xcd,0xcd, - 0xce,0xcf,0xd0,0xd1,0xd1,0xd2,0xd3,0xd4,0xd5,0xd6,0xd6,0xd7,0xd8,0xd9,0xda,0xda, - 0xdb,0xdc,0xdd,0xde,0xde,0xdf,0xe0,0xe1,0xe1,0xe2,0xe3,0xe4,0xe5,0xe5,0xe6,0xe7, - 0xe8,0xe8,0xe9,0xea,0xeb,0xeb,0xec,0xed,0xee,0xef,0xef,0xf0,0xf1,0xf2,0xf2,0xf3, - 0xf4,0xf5,0xf5,0xf6,0xf7,0xf7,0xf8,0xf9,0xfa,0xfa,0xfb,0xfc,0xfd,0xfd,0xfe,0xff +static uint8_t logtable[256] = { + 0x00, 0x01, 0x02, 0x04, 0x05, 0x07, 0x08, 0x09, 0x0b, 0x0c, 0x0e, 0x0f, 0x10, 0x12, 0x13, 0x15, + 0x16, 0x17, 0x19, 0x1a, 0x1b, 0x1d, 0x1e, 0x1f, 0x21, 0x22, 0x23, 0x25, 0x26, 0x27, 0x28, 0x2a, + 0x2b, 0x2c, 0x2e, 0x2f, 0x30, 0x31, 0x33, 0x34, 0x35, 0x36, 0x38, 0x39, 0x3a, 0x3b, 0x3d, 0x3e, + 0x3f, 0x40, 0x41, 0x43, 0x44, 0x45, 0x46, 0x47, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x50, 0x51, + 0x52, 0x53, 0x54, 0x55, 0x57, 0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x60, 0x61, 0x62, 0x63, + 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6a, 0x6c, 0x6d, 0x6e, 0x6f, 0x70, 0x71, 0x72, 0x73, 0x74, + 0x75, 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f, 0x80, 0x81, 0x83, 0x84, 0x85, + 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8c, 0x8d, 0x8e, 0x8f, 0x90, 0x91, 0x92, 0x93, 0x94, + 0x95, 0x96, 0x97, 0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1, 0xa2, 0xa2, 0xa3, + 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2, + 0xb3, 0xb4, 0xb5, 0xb5, 0xb6, 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbc, 0xbd, 0xbe, 0xbf, 0xc0, + 0xc1, 0xc2, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xcd, + 0xce, 0xcf, 0xd0, 0xd1, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd6, 0xd7, 0xd8, 0xd9, 0xda, 0xda, + 0xdb, 0xdc, 0xdd, 0xde, 0xde, 0xdf, 0xe0, 0xe1, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe5, 0xe6, 0xe7, + 0xe8, 0xe8, 0xe9, 0xea, 0xeb, 0xeb, 0xec, 0xed, 0xee, 0xef, 0xef, 0xf0, 0xf1, 0xf2, 0xf2, 0xf3, + 0xf4, 0xf5, 0xf5, 0xf6, 0xf7, 0xf7, 0xf8, 0xf9, 0xfa, 0xfa, 0xfb, 0xfc, 0xfd, 0xfd, 0xfe, 0xff }; -static __inline int fastlog(uint64_t val) +static __inline int +fastlog(uint64_t val) { - uint64_t oldval = val; - int exp = 63; - int frac; + uint64_t oldval = val; + int exp = 63; + int frac; - if (!val || val & (1ULL << 63)) - return 0x80000000; + if (!val || val & (1ULL << 63)) + return 0x80000000; - if (!(val & 0xffffffff00000000)) - { - exp -= 32; - val <<= 32; - } - if (!(val & 0xffff000000000000)) - { - exp -= 16; - val <<= 16; - } - if (!(val & 0xff00000000000000)) - { - exp -= 8; - val <<= 8; - } - if (!(val & 0xf000000000000000)) - { - exp -= 4; - val <<= 4; - } - if (!(val & 0xc000000000000000)) - { - exp -= 2; - val <<= 2; - } - if (!(val & 0x8000000000000000)) - { - exp -= 1; - val <<= 1; - } + if (!(val & 0xffffffff00000000)) { + exp -= 32; + val <<= 32; + } + if (!(val & 0xffff000000000000)) { + exp -= 16; + val <<= 16; + } + if (!(val & 0xff00000000000000)) { + exp -= 8; + val <<= 8; + } + if (!(val & 0xf000000000000000)) { + exp -= 4; + val <<= 4; + } + if (!(val & 0xc000000000000000)) { + exp -= 2; + val <<= 2; + } + if (!(val & 0x8000000000000000)) { + exp -= 1; + val <<= 1; + } - if (exp >= 8) - frac = (oldval >> (exp - 8)) & 0xff; - else - frac = (oldval << (8 - exp)) & 0xff; + if (exp >= 8) + frac = (oldval >> (exp - 8)) & 0xff; + else + frac = (oldval << (8 - exp)) & 0xff; - return (exp << 8) | logtable[frac]; + return (exp << 8) | logtable[frac]; } -static inline int voodoo_fls(uint16_t val) +static inline int +voodoo_fls(uint16_t val) { - int num = 0; + int num = 0; -//voodoo_render_log("fls(%04x) = ", val); - if (!(val & 0xff00)) - { - num += 8; - val <<= 8; - } - if (!(val & 0xf000)) - { - num += 4; - val <<= 4; - } - if (!(val & 0xc000)) - { - num += 2; - val <<= 2; - } - if (!(val & 0x8000)) - { - num += 1; - val <<= 1; - } -//voodoo_render_log("%i %04x\n", num, val); - return num; + // voodoo_render_log("fls(%04x) = ", val); + if (!(val & 0xff00)) { + num += 8; + val <<= 8; + } + if (!(val & 0xf000)) { + num += 4; + val <<= 4; + } + if (!(val & 0xc000)) { + num += 2; + val <<= 2; + } + if (!(val & 0x8000)) { + num += 1; + val <<= 1; + } + // voodoo_render_log("%i %04x\n", num, val); + return num; } -typedef struct voodoo_texture_state_t -{ - int s, t; - int w_mask, h_mask; - int tex_shift; +typedef struct voodoo_texture_state_t { + int s, t; + int w_mask, h_mask; + int tex_shift; } voodoo_texture_state_t; -static inline void tex_read(voodoo_state_t *state, voodoo_texture_state_t *texture_state, int tmu) +static inline void +tex_read(voodoo_state_t *state, voodoo_texture_state_t *texture_state, int tmu) { - uint32_t dat; + uint32_t dat; - if (texture_state->s & ~texture_state->w_mask) - { - if (state->clamp_s[tmu]) - { - if (texture_state->s < 0) - texture_state->s = 0; - if (texture_state->s > texture_state->w_mask) - texture_state->s = texture_state->w_mask; - } - else - texture_state->s &= texture_state->w_mask; - } - if (texture_state->t & ~texture_state->h_mask) - { - if (state->clamp_t[tmu]) - { - if (texture_state->t < 0) - texture_state->t = 0; - if (texture_state->t > texture_state->h_mask) - texture_state->t = texture_state->h_mask; - } - else - texture_state->t &= texture_state->h_mask; - } + if (texture_state->s & ~texture_state->w_mask) { + if (state->clamp_s[tmu]) { + if (texture_state->s < 0) + texture_state->s = 0; + if (texture_state->s > texture_state->w_mask) + texture_state->s = texture_state->w_mask; + } else + texture_state->s &= texture_state->w_mask; + } + if (texture_state->t & ~texture_state->h_mask) { + if (state->clamp_t[tmu]) { + if (texture_state->t < 0) + texture_state->t = 0; + if (texture_state->t > texture_state->h_mask) + texture_state->t = texture_state->h_mask; + } else + texture_state->t &= texture_state->h_mask; + } - dat = state->tex[tmu][state->lod][texture_state->s + (texture_state->t << texture_state->tex_shift)]; + dat = state->tex[tmu][state->lod][texture_state->s + (texture_state->t << texture_state->tex_shift)]; - state->tex_b[tmu] = dat & 0xff; - state->tex_g[tmu] = (dat >> 8) & 0xff; - state->tex_r[tmu] = (dat >> 16) & 0xff; - state->tex_a[tmu] = (dat >> 24) & 0xff; + state->tex_b[tmu] = dat & 0xff; + state->tex_g[tmu] = (dat >> 8) & 0xff; + state->tex_r[tmu] = (dat >> 16) & 0xff; + state->tex_a[tmu] = (dat >> 24) & 0xff; } #define LOW4(x) ((x & 0x0f) | ((x & 0x0f) << 4)) #define HIGH4(x) ((x & 0xf0) | ((x & 0xf0) >> 4)) -static inline void tex_read_4(voodoo_state_t *state, voodoo_texture_state_t *texture_state, int s, int t, int *d, int tmu, int x) +static inline void +tex_read_4(voodoo_state_t *state, voodoo_texture_state_t *texture_state, int s, int t, int *d, int tmu, int x) { - rgba_u dat[4]; + rgba_u dat[4]; - if (((s | (s + 1)) & ~texture_state->w_mask) || ((t | (t + 1)) & ~texture_state->h_mask)) - { - int c; - for (c = 0; c < 4; c++) - { - int _s = s + (c & 1); - int _t = t + ((c & 2) >> 1); + if (((s | (s + 1)) & ~texture_state->w_mask) || ((t | (t + 1)) & ~texture_state->h_mask)) { + int c; + for (c = 0; c < 4; c++) { + int _s = s + (c & 1); + int _t = t + ((c & 2) >> 1); - if (_s & ~texture_state->w_mask) - { - if (state->clamp_s[tmu]) - { - if (_s < 0) - _s = 0; - if (_s > texture_state->w_mask) - _s = texture_state->w_mask; - } - else - _s &= texture_state->w_mask; - } - if (_t & ~texture_state->h_mask) - { - if (state->clamp_t[tmu]) - { - if (_t < 0) - _t = 0; - if (_t > texture_state->h_mask) - _t = texture_state->h_mask; - } - else - _t &= texture_state->h_mask; - } - dat[c].u = state->tex[tmu][state->lod][_s + (_t << texture_state->tex_shift)]; - } - } - else - { - dat[0].u = state->tex[tmu][state->lod][s + (t << texture_state->tex_shift)]; - dat[1].u = state->tex[tmu][state->lod][s + 1 + (t << texture_state->tex_shift)]; - dat[2].u = state->tex[tmu][state->lod][s + ((t + 1) << texture_state->tex_shift)]; - dat[3].u = state->tex[tmu][state->lod][s + 1 + ((t + 1) << texture_state->tex_shift)]; + if (_s & ~texture_state->w_mask) { + if (state->clamp_s[tmu]) { + if (_s < 0) + _s = 0; + if (_s > texture_state->w_mask) + _s = texture_state->w_mask; + } else + _s &= texture_state->w_mask; + } + if (_t & ~texture_state->h_mask) { + if (state->clamp_t[tmu]) { + if (_t < 0) + _t = 0; + if (_t > texture_state->h_mask) + _t = texture_state->h_mask; + } else + _t &= texture_state->h_mask; + } + dat[c].u = state->tex[tmu][state->lod][_s + (_t << texture_state->tex_shift)]; } + } else { + dat[0].u = state->tex[tmu][state->lod][s + (t << texture_state->tex_shift)]; + dat[1].u = state->tex[tmu][state->lod][s + 1 + (t << texture_state->tex_shift)]; + dat[2].u = state->tex[tmu][state->lod][s + ((t + 1) << texture_state->tex_shift)]; + dat[3].u = state->tex[tmu][state->lod][s + 1 + ((t + 1) << texture_state->tex_shift)]; + } - state->tex_r[tmu] = (dat[0].rgba.r * d[0] + dat[1].rgba.r * d[1] + dat[2].rgba.r * d[2] + dat[3].rgba.r * d[3]) >> 8; - state->tex_g[tmu] = (dat[0].rgba.g * d[0] + dat[1].rgba.g * d[1] + dat[2].rgba.g * d[2] + dat[3].rgba.g * d[3]) >> 8; - state->tex_b[tmu] = (dat[0].rgba.b * d[0] + dat[1].rgba.b * d[1] + dat[2].rgba.b * d[2] + dat[3].rgba.b * d[3]) >> 8; - state->tex_a[tmu] = (dat[0].rgba.a * d[0] + dat[1].rgba.a * d[1] + dat[2].rgba.a * d[2] + dat[3].rgba.a * d[3]) >> 8; + state->tex_r[tmu] = (dat[0].rgba.r * d[0] + dat[1].rgba.r * d[1] + dat[2].rgba.r * d[2] + dat[3].rgba.r * d[3]) >> 8; + state->tex_g[tmu] = (dat[0].rgba.g * d[0] + dat[1].rgba.g * d[1] + dat[2].rgba.g * d[2] + dat[3].rgba.g * d[3]) >> 8; + state->tex_b[tmu] = (dat[0].rgba.b * d[0] + dat[1].rgba.b * d[1] + dat[2].rgba.b * d[2] + dat[3].rgba.b * d[3]) >> 8; + state->tex_a[tmu] = (dat[0].rgba.a * d[0] + dat[1].rgba.a * d[1] + dat[2].rgba.a * d[2] + dat[3].rgba.a * d[3]) >> 8; } -static inline void voodoo_get_texture(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int tmu, int x) +static inline void +voodoo_get_texture(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int tmu, int x) { - voodoo_texture_state_t texture_state; - int d[4]; - int s, t; - int tex_lod = state->tex_lod[tmu][state->lod]; + voodoo_texture_state_t texture_state; + int d[4]; + int s, t; + int tex_lod = state->tex_lod[tmu][state->lod]; - texture_state.w_mask = state->tex_w_mask[tmu][state->lod]; - texture_state.h_mask = state->tex_h_mask[tmu][state->lod]; - texture_state.tex_shift = 8 - tex_lod; + texture_state.w_mask = state->tex_w_mask[tmu][state->lod]; + texture_state.h_mask = state->tex_h_mask[tmu][state->lod]; + texture_state.tex_shift = 8 - tex_lod; - if (params->tLOD[tmu] & LOD_TMIRROR_S) - { - if (state->tex_s & 0x1000) - state->tex_s = ~state->tex_s; - } - if (params->tLOD[tmu] & LOD_TMIRROR_T) - { - if (state->tex_t & 0x1000) - state->tex_t = ~state->tex_t; - } + if (params->tLOD[tmu] & LOD_TMIRROR_S) { + if (state->tex_s & 0x1000) + state->tex_s = ~state->tex_s; + } + if (params->tLOD[tmu] & LOD_TMIRROR_T) { + if (state->tex_t & 0x1000) + state->tex_t = ~state->tex_t; + } - if (voodoo->bilinear_enabled && params->textureMode[tmu] & 6) - { - int _ds, dt; + if (voodoo->bilinear_enabled && params->textureMode[tmu] & 6) { + int _ds, dt; - state->tex_s -= 1 << (3+tex_lod); - state->tex_t -= 1 << (3+tex_lod); + state->tex_s -= 1 << (3 + tex_lod); + state->tex_t -= 1 << (3 + tex_lod); - s = state->tex_s >> tex_lod; - t = state->tex_t >> tex_lod; + s = state->tex_s >> tex_lod; + t = state->tex_t >> tex_lod; - _ds = s & 0xf; - dt = t & 0xf; + _ds = s & 0xf; + dt = t & 0xf; - s >>= 4; - t >>= 4; -//if (x == 80) -//if (voodoo_output) -// voodoo_render_log("s=%08x t=%08x _ds=%02x _dt=%02x\n", s, t, _ds, dt); - d[0] = (16 - _ds) * (16 - dt); - d[1] = _ds * (16 - dt); - d[2] = (16 - _ds) * dt; - d[3] = _ds * dt; + s >>= 4; + t >>= 4; + // if (x == 80) + // if (voodoo_output) + // voodoo_render_log("s=%08x t=%08x _ds=%02x _dt=%02x\n", s, t, _ds, dt); + d[0] = (16 - _ds) * (16 - dt); + d[1] = _ds * (16 - dt); + d[2] = (16 - _ds) * dt; + d[3] = _ds * dt; -// texture_state.s = s; -// texture_state.t = t; - tex_read_4(state, &texture_state, s, t, d, tmu, x); + // texture_state.s = s; + // texture_state.t = t; + tex_read_4(state, &texture_state, s, t, d, tmu, x); - -/* state->tex_r = (tex_samples[0].rgba.r * d[0] + tex_samples[1].rgba.r * d[1] + tex_samples[2].rgba.r * d[2] + tex_samples[3].rgba.r * d[3]) >> 8; - state->tex_g = (tex_samples[0].rgba.g * d[0] + tex_samples[1].rgba.g * d[1] + tex_samples[2].rgba.g * d[2] + tex_samples[3].rgba.g * d[3]) >> 8; - state->tex_b = (tex_samples[0].rgba.b * d[0] + tex_samples[1].rgba.b * d[1] + tex_samples[2].rgba.b * d[2] + tex_samples[3].rgba.b * d[3]) >> 8; - state->tex_a = (tex_samples[0].rgba.a * d[0] + tex_samples[1].rgba.a * d[1] + tex_samples[2].rgba.a * d[2] + tex_samples[3].rgba.a * d[3]) >> 8;*/ -/* state->tex_r = tex_samples[0].r; - state->tex_g = tex_samples[0].g; - state->tex_b = tex_samples[0].b; - state->tex_a = tex_samples[0].a;*/ - } - else - { + /* state->tex_r = (tex_samples[0].rgba.r * d[0] + tex_samples[1].rgba.r * d[1] + tex_samples[2].rgba.r * d[2] + tex_samples[3].rgba.r * d[3]) >> 8; + state->tex_g = (tex_samples[0].rgba.g * d[0] + tex_samples[1].rgba.g * d[1] + tex_samples[2].rgba.g * d[2] + tex_samples[3].rgba.g * d[3]) >> 8; + state->tex_b = (tex_samples[0].rgba.b * d[0] + tex_samples[1].rgba.b * d[1] + tex_samples[2].rgba.b * d[2] + tex_samples[3].rgba.b * d[3]) >> 8; + state->tex_a = (tex_samples[0].rgba.a * d[0] + tex_samples[1].rgba.a * d[1] + tex_samples[2].rgba.a * d[2] + tex_samples[3].rgba.a * d[3]) >> 8;*/ + /* state->tex_r = tex_samples[0].r; + state->tex_g = tex_samples[0].g; + state->tex_b = tex_samples[0].b; + state->tex_a = tex_samples[0].a;*/ + } else { // rgba_t tex_samples; // voodoo_texture_state_t texture_state; -// int s = state->tex_s >> (18+state->lod); -// int t = state->tex_t >> (18+state->lod); + // int s = state->tex_s >> (18+state->lod); + // int t = state->tex_t >> (18+state->lod); // int s, t; -// state->tex_s -= 1 << (17+state->lod); -// state->tex_t -= 1 << (17+state->lod); + // state->tex_s -= 1 << (17+state->lod); + // state->tex_t -= 1 << (17+state->lod); - s = state->tex_s >> (4+tex_lod); - t = state->tex_t >> (4+tex_lod); + s = state->tex_s >> (4 + tex_lod); + t = state->tex_t >> (4 + tex_lod); - texture_state.s = s; - texture_state.t = t; - tex_read(state, &texture_state, tmu); + texture_state.s = s; + texture_state.t = t; + tex_read(state, &texture_state, tmu); -/* state->tex_r = tex_samples[0].rgba.r; - state->tex_g = tex_samples[0].rgba.g; - state->tex_b = tex_samples[0].rgba.b; - state->tex_a = tex_samples[0].rgba.a;*/ - } + /* state->tex_r = tex_samples[0].rgba.r; + state->tex_g = tex_samples[0].rgba.g; + state->tex_b = tex_samples[0].rgba.b; + state->tex_a = tex_samples[0].rgba.a;*/ + } } -static inline void voodoo_tmu_fetch(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int tmu, int x) +static inline void +voodoo_tmu_fetch(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int tmu, int x) { - if (params->textureMode[tmu] & 1) - { - int64_t _w = 0; + if (params->textureMode[tmu] & 1) { + int64_t _w = 0; - if (tmu) - { - if (state->tmu1_w) - _w = (int64_t)((1ULL << 48) / state->tmu1_w); - state->tex_s = (int32_t)(((((state->tmu1_s + (1 << 13)) >> 14) * _w) + (1 << 29)) >> 30); - state->tex_t = (int32_t)(((((state->tmu1_t + (1 << 13)) >> 14) * _w) + (1 << 29)) >> 30); - } - else - { - if (state->tmu0_w) - _w = (int64_t)((1ULL << 48) / state->tmu0_w); - state->tex_s = (int32_t)(((((state->tmu0_s + (1 << 13)) >> 14) * _w) + (1 << 29)) >> 30); - state->tex_t = (int32_t)(((((state->tmu0_t + (1 << 13)) >> 14) * _w) + (1 << 29)) >> 30); - } - - state->lod = state->tmu[tmu].lod + (fastlog(_w) - (19 << 8)); - } - else - { - if (tmu) - { - state->tex_s = (int32_t)(state->tmu1_s >> (14+14)); - state->tex_t = (int32_t)(state->tmu1_t >> (14+14)); - } - else - { - state->tex_s = (int32_t)(state->tmu0_s >> (14+14)); - state->tex_t = (int32_t)(state->tmu0_t >> (14+14)); - } - state->lod = state->tmu[tmu].lod; + if (tmu) { + if (state->tmu1_w) + _w = (int64_t) ((1ULL << 48) / state->tmu1_w); + state->tex_s = (int32_t) (((((state->tmu1_s + (1 << 13)) >> 14) * _w) + (1 << 29)) >> 30); + state->tex_t = (int32_t) (((((state->tmu1_t + (1 << 13)) >> 14) * _w) + (1 << 29)) >> 30); + } else { + if (state->tmu0_w) + _w = (int64_t) ((1ULL << 48) / state->tmu0_w); + state->tex_s = (int32_t) (((((state->tmu0_s + (1 << 13)) >> 14) * _w) + (1 << 29)) >> 30); + state->tex_t = (int32_t) (((((state->tmu0_t + (1 << 13)) >> 14) * _w) + (1 << 29)) >> 30); } - if (state->lod < state->lod_min[tmu]) - state->lod = state->lod_min[tmu]; - else if (state->lod > state->lod_max[tmu]) - state->lod = state->lod_max[tmu]; - state->lod_frac[tmu] = state->lod & 0xff; - state->lod >>= 8; + state->lod = state->tmu[tmu].lod + (fastlog(_w) - (19 << 8)); + } else { + if (tmu) { + state->tex_s = (int32_t) (state->tmu1_s >> (14 + 14)); + state->tex_t = (int32_t) (state->tmu1_t >> (14 + 14)); + } else { + state->tex_s = (int32_t) (state->tmu0_s >> (14 + 14)); + state->tex_t = (int32_t) (state->tmu0_t >> (14 + 14)); + } + state->lod = state->tmu[tmu].lod; + } - voodoo_get_texture(voodoo, params, state, tmu, x); + if (state->lod < state->lod_min[tmu]) + state->lod = state->lod_min[tmu]; + else if (state->lod > state->lod_max[tmu]) + state->lod = state->lod_max[tmu]; + state->lod_frac[tmu] = state->lod & 0xff; + state->lod >>= 8; + + voodoo_get_texture(voodoo, params, state, tmu, x); } - /*Perform texture fetch and blending for both TMUs*/ -static inline void voodoo_tmu_fetch_and_blend(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int x) +static inline void +voodoo_tmu_fetch_and_blend(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int x) { - int r,g,b,a; - int c_reverse, a_reverse; -// int c_reverse1, a_reverse1; - int factor_r = 0, factor_g = 0, factor_b = 0, factor_a = 0; + int r, g, b, a; + int c_reverse, a_reverse; + // int c_reverse1, a_reverse1; + int factor_r = 0, factor_g = 0, factor_b = 0, factor_a = 0; - voodoo_tmu_fetch(voodoo, params, state, 1, x); + voodoo_tmu_fetch(voodoo, params, state, 1, x); - if ((params->textureMode[1] & TEXTUREMODE_TRILINEAR) && (state->lod & 1)) - { - c_reverse = tc_reverse_blend; - a_reverse = tca_reverse_blend; - } - else - { - c_reverse = !tc_reverse_blend; - a_reverse = !tca_reverse_blend; - } -/* c_reverse1 = c_reverse; - a_reverse1 = a_reverse;*/ - if (tc_sub_clocal_1) - { - switch (tc_mselect_1) - { - case TC_MSELECT_ZERO: - factor_r = factor_g = factor_b = 0; - break; - case TC_MSELECT_CLOCAL: - factor_r = state->tex_r[1]; - factor_g = state->tex_g[1]; - factor_b = state->tex_b[1]; - break; - case TC_MSELECT_AOTHER: - factor_r = factor_g = factor_b = 0; - break; - case TC_MSELECT_ALOCAL: - factor_r = factor_g = factor_b = state->tex_a[1]; - break; - case TC_MSELECT_DETAIL: - factor_r = (params->detail_bias[1] - state->lod) << params->detail_scale[1]; - if (factor_r > params->detail_max[1]) - factor_r = params->detail_max[1]; - factor_g = factor_b = factor_r; - break; - case TC_MSELECT_LOD_FRAC: - factor_r = factor_g = factor_b = state->lod_frac[1]; - break; - } - if (!c_reverse) - { - r = (-state->tex_r[1] * (factor_r + 1)) >> 8; - g = (-state->tex_g[1] * (factor_g + 1)) >> 8; - b = (-state->tex_b[1] * (factor_b + 1)) >> 8; - } - else - { - r = (-state->tex_r[1] * ((factor_r^0xff) + 1)) >> 8; - g = (-state->tex_g[1] * ((factor_g^0xff) + 1)) >> 8; - b = (-state->tex_b[1] * ((factor_b^0xff) + 1)) >> 8; - } - if (tc_add_clocal_1) - { - r += state->tex_r[1]; - g += state->tex_g[1]; - b += state->tex_b[1]; - } - else if (tc_add_alocal_1) - { - r += state->tex_a[1]; - g += state->tex_a[1]; - b += state->tex_a[1]; - } - state->tex_r[1] = CLAMP(r); - state->tex_g[1] = CLAMP(g); - state->tex_b[1] = CLAMP(b); - } - if (tca_sub_clocal_1) - { - switch (tca_mselect_1) - { - case TCA_MSELECT_ZERO: - factor_a = 0; - break; - case TCA_MSELECT_CLOCAL: - factor_a = state->tex_a[1]; - break; - case TCA_MSELECT_AOTHER: - factor_a = 0; - break; - case TCA_MSELECT_ALOCAL: - factor_a = state->tex_a[1]; - break; - case TCA_MSELECT_DETAIL: - factor_a = (params->detail_bias[1] - state->lod) << params->detail_scale[1]; - if (factor_a > params->detail_max[1]) - factor_a = params->detail_max[1]; - break; - case TCA_MSELECT_LOD_FRAC: - factor_a = state->lod_frac[1]; - break; - } - if (!a_reverse) - a = (-state->tex_a[1] * ((factor_a ^ 0xff) + 1)) >> 8; - else - a = (-state->tex_a[1] * (factor_a + 1)) >> 8; - if (tca_add_clocal_1 || tca_add_alocal_1) - a += state->tex_a[1]; - state->tex_a[1] = CLAMP(a); - } - - - voodoo_tmu_fetch(voodoo, params, state, 0, x); - - if ((params->textureMode[0] & TEXTUREMODE_TRILINEAR) && (state->lod & 1)) - { - c_reverse = tc_reverse_blend; - a_reverse = tca_reverse_blend; - } - else - { - c_reverse = !tc_reverse_blend; - a_reverse = !tca_reverse_blend; - } - - if (!tc_zero_other) - { - r = state->tex_r[1]; - g = state->tex_g[1]; - b = state->tex_b[1]; - } - else - r = g = b = 0; - if (tc_sub_clocal) - { - r -= state->tex_r[0]; - g -= state->tex_g[0]; - b -= state->tex_b[0]; - } - switch (tc_mselect) - { - case TC_MSELECT_ZERO: + if ((params->textureMode[1] & TEXTUREMODE_TRILINEAR) && (state->lod & 1)) { + c_reverse = tc_reverse_blend; + a_reverse = tca_reverse_blend; + } else { + c_reverse = !tc_reverse_blend; + a_reverse = !tca_reverse_blend; + } + /* c_reverse1 = c_reverse; + a_reverse1 = a_reverse;*/ + if (tc_sub_clocal_1) { + switch (tc_mselect_1) { + case TC_MSELECT_ZERO: factor_r = factor_g = factor_b = 0; break; - case TC_MSELECT_CLOCAL: - factor_r = state->tex_r[0]; - factor_g = state->tex_g[0]; - factor_b = state->tex_b[0]; + case TC_MSELECT_CLOCAL: + factor_r = state->tex_r[1]; + factor_g = state->tex_g[1]; + factor_b = state->tex_b[1]; break; - case TC_MSELECT_AOTHER: + case TC_MSELECT_AOTHER: + factor_r = factor_g = factor_b = 0; + break; + case TC_MSELECT_ALOCAL: factor_r = factor_g = factor_b = state->tex_a[1]; break; - case TC_MSELECT_ALOCAL: - factor_r = factor_g = factor_b = state->tex_a[0]; - break; - case TC_MSELECT_DETAIL: - factor_r = (params->detail_bias[0] - state->lod) << params->detail_scale[0]; - if (factor_r > params->detail_max[0]) - factor_r = params->detail_max[0]; + case TC_MSELECT_DETAIL: + factor_r = (params->detail_bias[1] - state->lod) << params->detail_scale[1]; + if (factor_r > params->detail_max[1]) + factor_r = params->detail_max[1]; factor_g = factor_b = factor_r; break; - case TC_MSELECT_LOD_FRAC: - factor_r = factor_g = factor_b = state->lod_frac[0]; + case TC_MSELECT_LOD_FRAC: + factor_r = factor_g = factor_b = state->lod_frac[1]; break; } - if (!c_reverse) - { - r = (r * (factor_r + 1)) >> 8; - g = (g * (factor_g + 1)) >> 8; - b = (b * (factor_b + 1)) >> 8; + if (!c_reverse) { + r = (-state->tex_r[1] * (factor_r + 1)) >> 8; + g = (-state->tex_g[1] * (factor_g + 1)) >> 8; + b = (-state->tex_b[1] * (factor_b + 1)) >> 8; + } else { + r = (-state->tex_r[1] * ((factor_r ^ 0xff) + 1)) >> 8; + g = (-state->tex_g[1] * ((factor_g ^ 0xff) + 1)) >> 8; + b = (-state->tex_b[1] * ((factor_b ^ 0xff) + 1)) >> 8; } - else - { - r = (r * ((factor_r^0xff) + 1)) >> 8; - g = (g * ((factor_g^0xff) + 1)) >> 8; - b = (b * ((factor_b^0xff) + 1)) >> 8; + if (tc_add_clocal_1) { + r += state->tex_r[1]; + g += state->tex_g[1]; + b += state->tex_b[1]; + } else if (tc_add_alocal_1) { + r += state->tex_a[1]; + g += state->tex_a[1]; + b += state->tex_a[1]; } - if (tc_add_clocal) - { - r += state->tex_r[0]; - g += state->tex_g[0]; - b += state->tex_b[0]; - } - else if (tc_add_alocal) - { - r += state->tex_a[0]; - g += state->tex_a[0]; - b += state->tex_a[0]; - } - - if (!tca_zero_other) - a = state->tex_a[1]; - else - a = 0; - if (tca_sub_clocal) - a -= state->tex_a[0]; - switch (tca_mselect) - { - case TCA_MSELECT_ZERO: + state->tex_r[1] = CLAMP(r); + state->tex_g[1] = CLAMP(g); + state->tex_b[1] = CLAMP(b); + } + if (tca_sub_clocal_1) { + switch (tca_mselect_1) { + case TCA_MSELECT_ZERO: factor_a = 0; break; - case TCA_MSELECT_CLOCAL: - factor_a = state->tex_a[0]; - break; - case TCA_MSELECT_AOTHER: + case TCA_MSELECT_CLOCAL: factor_a = state->tex_a[1]; break; - case TCA_MSELECT_ALOCAL: - factor_a = state->tex_a[0]; + case TCA_MSELECT_AOTHER: + factor_a = 0; break; - case TCA_MSELECT_DETAIL: - factor_a = (params->detail_bias[0] - state->lod) << params->detail_scale[0]; - if (factor_a > params->detail_max[0]) - factor_a = params->detail_max[0]; + case TCA_MSELECT_ALOCAL: + factor_a = state->tex_a[1]; break; - case TCA_MSELECT_LOD_FRAC: - factor_a = state->lod_frac[0]; + case TCA_MSELECT_DETAIL: + factor_a = (params->detail_bias[1] - state->lod) << params->detail_scale[1]; + if (factor_a > params->detail_max[1]) + factor_a = params->detail_max[1]; + break; + case TCA_MSELECT_LOD_FRAC: + factor_a = state->lod_frac[1]; break; } - if (a_reverse) - a = (a * ((factor_a ^ 0xff) + 1)) >> 8; + if (!a_reverse) + a = (-state->tex_a[1] * ((factor_a ^ 0xff) + 1)) >> 8; else - a = (a * (factor_a + 1)) >> 8; - if (tca_add_clocal || tca_add_alocal) - a += state->tex_a[0]; + a = (-state->tex_a[1] * (factor_a + 1)) >> 8; + if (tca_add_clocal_1 || tca_add_alocal_1) + a += state->tex_a[1]; + state->tex_a[1] = CLAMP(a); + } + voodoo_tmu_fetch(voodoo, params, state, 0, x); - state->tex_r[0] = CLAMP(r); - state->tex_g[0] = CLAMP(g); - state->tex_b[0] = CLAMP(b); - state->tex_a[0] = CLAMP(a); + if ((params->textureMode[0] & TEXTUREMODE_TRILINEAR) && (state->lod & 1)) { + c_reverse = tc_reverse_blend; + a_reverse = tca_reverse_blend; + } else { + c_reverse = !tc_reverse_blend; + a_reverse = !tca_reverse_blend; + } - if (tc_invert_output) - { - state->tex_r[0] ^= 0xff; - state->tex_g[0] ^= 0xff; - state->tex_b[0] ^= 0xff; - } - if (tca_invert_output) - state->tex_a[0] ^= 0xff; + if (!tc_zero_other) { + r = state->tex_r[1]; + g = state->tex_g[1]; + b = state->tex_b[1]; + } else + r = g = b = 0; + if (tc_sub_clocal) { + r -= state->tex_r[0]; + g -= state->tex_g[0]; + b -= state->tex_b[0]; + } + switch (tc_mselect) { + case TC_MSELECT_ZERO: + factor_r = factor_g = factor_b = 0; + break; + case TC_MSELECT_CLOCAL: + factor_r = state->tex_r[0]; + factor_g = state->tex_g[0]; + factor_b = state->tex_b[0]; + break; + case TC_MSELECT_AOTHER: + factor_r = factor_g = factor_b = state->tex_a[1]; + break; + case TC_MSELECT_ALOCAL: + factor_r = factor_g = factor_b = state->tex_a[0]; + break; + case TC_MSELECT_DETAIL: + factor_r = (params->detail_bias[0] - state->lod) << params->detail_scale[0]; + if (factor_r > params->detail_max[0]) + factor_r = params->detail_max[0]; + factor_g = factor_b = factor_r; + break; + case TC_MSELECT_LOD_FRAC: + factor_r = factor_g = factor_b = state->lod_frac[0]; + break; + } + if (!c_reverse) { + r = (r * (factor_r + 1)) >> 8; + g = (g * (factor_g + 1)) >> 8; + b = (b * (factor_b + 1)) >> 8; + } else { + r = (r * ((factor_r ^ 0xff) + 1)) >> 8; + g = (g * ((factor_g ^ 0xff) + 1)) >> 8; + b = (b * ((factor_b ^ 0xff) + 1)) >> 8; + } + if (tc_add_clocal) { + r += state->tex_r[0]; + g += state->tex_g[0]; + b += state->tex_b[0]; + } else if (tc_add_alocal) { + r += state->tex_a[0]; + g += state->tex_a[0]; + b += state->tex_a[0]; + } + + if (!tca_zero_other) + a = state->tex_a[1]; + else + a = 0; + if (tca_sub_clocal) + a -= state->tex_a[0]; + switch (tca_mselect) { + case TCA_MSELECT_ZERO: + factor_a = 0; + break; + case TCA_MSELECT_CLOCAL: + factor_a = state->tex_a[0]; + break; + case TCA_MSELECT_AOTHER: + factor_a = state->tex_a[1]; + break; + case TCA_MSELECT_ALOCAL: + factor_a = state->tex_a[0]; + break; + case TCA_MSELECT_DETAIL: + factor_a = (params->detail_bias[0] - state->lod) << params->detail_scale[0]; + if (factor_a > params->detail_max[0]) + factor_a = params->detail_max[0]; + break; + case TCA_MSELECT_LOD_FRAC: + factor_a = state->lod_frac[0]; + break; + } + if (a_reverse) + a = (a * ((factor_a ^ 0xff) + 1)) >> 8; + else + a = (a * (factor_a + 1)) >> 8; + if (tca_add_clocal || tca_add_alocal) + a += state->tex_a[0]; + + state->tex_r[0] = CLAMP(r); + state->tex_g[0] = CLAMP(g); + state->tex_b[0] = CLAMP(b); + state->tex_a[0] = CLAMP(a); + + if (tc_invert_output) { + state->tex_r[0] ^= 0xff; + state->tex_g[0] ^= 0xff; + state->tex_b[0] ^= 0xff; + } + if (tca_invert_output) + state->tex_a[0] ^= 0xff; } #if (defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86) && !(defined __amd64__ || defined _M_X64) -#include <86box/vid_voodoo_codegen_x86.h> +# include <86box/vid_voodoo_codegen_x86.h> #elif (defined __amd64__ || defined _M_X64) -#include <86box/vid_voodoo_codegen_x86-64.h> +# include <86box/vid_voodoo_codegen_x86-64.h> #else int voodoo_recomp = 0; #endif -static void voodoo_half_triangle(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int ystart, int yend, int odd_even) +static void +voodoo_half_triangle(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int ystart, int yend, int odd_even) { -/* int rgb_sel = params->fbzColorPath & 3; - int a_sel = (params->fbzColorPath >> 2) & 3; - int cc_localselect = params->fbzColorPath & (1 << 4); - int cca_localselect = (params->fbzColorPath >> 5) & 3; - int cc_localselect_override = params->fbzColorPath & (1 << 7); - int cc_zero_other = params->fbzColorPath & (1 << 8); - int cc_sub_clocal = params->fbzColorPath & (1 << 9); - int cc_mselect = (params->fbzColorPath >> 10) & 7; - int cc_reverse_blend = params->fbzColorPath & (1 << 13); - int cc_add = (params->fbzColorPath >> 14) & 3; - int cc_add_alocal = params->fbzColorPath & (1 << 15); - int cc_invert_output = params->fbzColorPath & (1 << 16); - int cca_zero_other = params->fbzColorPath & (1 << 17); - int cca_sub_clocal = params->fbzColorPath & (1 << 18); - int cca_mselect = (params->fbzColorPath >> 19) & 7; - int cca_reverse_blend = params->fbzColorPath & (1 << 22); - int cca_add = (params->fbzColorPath >> 23) & 3; - int cca_invert_output = params->fbzColorPath & (1 << 25); - int src_afunc = (params->alphaMode >> 8) & 0xf; - int dest_afunc = (params->alphaMode >> 12) & 0xf; - int alpha_func = (params->alphaMode >> 1) & 7; - int a_ref = params->alphaMode >> 24; - int depth_op = (params->fbzMode >> 5) & 7; - int dither = params->fbzMode & FBZ_DITHER;*/ - int texels; - int c; + /* int rgb_sel = params->fbzColorPath & 3; + int a_sel = (params->fbzColorPath >> 2) & 3; + int cc_localselect = params->fbzColorPath & (1 << 4); + int cca_localselect = (params->fbzColorPath >> 5) & 3; + int cc_localselect_override = params->fbzColorPath & (1 << 7); + int cc_zero_other = params->fbzColorPath & (1 << 8); + int cc_sub_clocal = params->fbzColorPath & (1 << 9); + int cc_mselect = (params->fbzColorPath >> 10) & 7; + int cc_reverse_blend = params->fbzColorPath & (1 << 13); + int cc_add = (params->fbzColorPath >> 14) & 3; + int cc_add_alocal = params->fbzColorPath & (1 << 15); + int cc_invert_output = params->fbzColorPath & (1 << 16); + int cca_zero_other = params->fbzColorPath & (1 << 17); + int cca_sub_clocal = params->fbzColorPath & (1 << 18); + int cca_mselect = (params->fbzColorPath >> 19) & 7; + int cca_reverse_blend = params->fbzColorPath & (1 << 22); + int cca_add = (params->fbzColorPath >> 23) & 3; + int cca_invert_output = params->fbzColorPath & (1 << 25); + int src_afunc = (params->alphaMode >> 8) & 0xf; + int dest_afunc = (params->alphaMode >> 12) & 0xf; + int alpha_func = (params->alphaMode >> 1) & 7; + int a_ref = params->alphaMode >> 24; + int depth_op = (params->fbzMode >> 5) & 7; + int dither = params->fbzMode & FBZ_DITHER;*/ + int texels; + int c; #ifndef NO_CODEGEN - uint8_t (*voodoo_draw)(voodoo_state_t *state, voodoo_params_t *params, int x, int real_y); + uint8_t (*voodoo_draw)(voodoo_state_t * state, voodoo_params_t * params, int x, int real_y); #endif - int y_diff = SLI_ENABLED ? 2 : 1; - int y_origin = (voodoo->type >= VOODOO_BANSHEE) ? voodoo->y_origin_swap : (voodoo->v_disp-1); + int y_diff = SLI_ENABLED ? 2 : 1; + int y_origin = (voodoo->type >= VOODOO_BANSHEE) ? voodoo->y_origin_swap : (voodoo->v_disp - 1); - if ((params->textureMode[0] & TEXTUREMODE_MASK) == TEXTUREMODE_PASSTHROUGH || - (params->textureMode[0] & TEXTUREMODE_LOCAL_MASK) == TEXTUREMODE_LOCAL) - texels = 1; + if ((params->textureMode[0] & TEXTUREMODE_MASK) == TEXTUREMODE_PASSTHROUGH || (params->textureMode[0] & TEXTUREMODE_LOCAL_MASK) == TEXTUREMODE_LOCAL) + texels = 1; + else + texels = 2; + + state->clamp_s[0] = params->textureMode[0] & TEXTUREMODE_TCLAMPS; + state->clamp_t[0] = params->textureMode[0] & TEXTUREMODE_TCLAMPT; + state->clamp_s[1] = params->textureMode[1] & TEXTUREMODE_TCLAMPS; + state->clamp_t[1] = params->textureMode[1] & TEXTUREMODE_TCLAMPT; + // int last_x; + // voodoo_render_log("voodoo_triangle : bottom-half %X %X %X %X %X %i %i %i %i\n", xstart, xend, dx1, dx2, dx2 * 36, xdir, y, yend, ydir); + + for (c = 0; c <= LOD_MAX; c++) { + state->tex[0][c] = &voodoo->texture_cache[0][params->tex_entry[0]].data[texture_offset[c]]; + state->tex[1][c] = &voodoo->texture_cache[1][params->tex_entry[1]].data[texture_offset[c]]; + } + + state->tformat = params->tformat[0]; + + state->tex_w_mask[0] = params->tex_w_mask[0]; + state->tex_h_mask[0] = params->tex_h_mask[0]; + state->tex_shift[0] = params->tex_shift[0]; + state->tex_lod[0] = params->tex_lod[0]; + state->tex_w_mask[1] = params->tex_w_mask[1]; + state->tex_h_mask[1] = params->tex_h_mask[1]; + state->tex_shift[1] = params->tex_shift[1]; + state->tex_lod[1] = params->tex_lod[1]; + + if ((params->fbzMode & 1) && (ystart < params->clipLowY)) { + int dy = params->clipLowY - ystart; + + state->base_r += params->dRdY * dy; + state->base_g += params->dGdY * dy; + state->base_b += params->dBdY * dy; + state->base_a += params->dAdY * dy; + state->base_z += params->dZdY * dy; + state->tmu[0].base_s += params->tmu[0].dSdY * dy; + state->tmu[0].base_t += params->tmu[0].dTdY * dy; + state->tmu[0].base_w += params->tmu[0].dWdY * dy; + state->tmu[1].base_s += params->tmu[1].dSdY * dy; + state->tmu[1].base_t += params->tmu[1].dTdY * dy; + state->tmu[1].base_w += params->tmu[1].dWdY * dy; + state->base_w += params->dWdY * dy; + state->xstart += state->dx1 * dy; + state->xend += state->dx2 * dy; + + ystart = params->clipLowY; + } + + if ((params->fbzMode & 1) && (yend >= params->clipHighY)) + yend = params->clipHighY; + + state->y = ystart; + // yend--; + + if (SLI_ENABLED) { + int test_y; + + if (params->fbzMode & (1 << 17)) + test_y = y_origin - state->y; else - texels = 2; + test_y = state->y; - state->clamp_s[0] = params->textureMode[0] & TEXTUREMODE_TCLAMPS; - state->clamp_t[0] = params->textureMode[0] & TEXTUREMODE_TCLAMPT; - state->clamp_s[1] = params->textureMode[1] & TEXTUREMODE_TCLAMPS; - state->clamp_t[1] = params->textureMode[1] & TEXTUREMODE_TCLAMPT; -// int last_x; -// voodoo_render_log("voodoo_triangle : bottom-half %X %X %X %X %X %i %i %i %i\n", xstart, xend, dx1, dx2, dx2 * 36, xdir, y, yend, ydir); + if ((!(voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && (test_y & 1)) || ((voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && !(test_y & 1))) { + state->y++; - for (c = 0; c <= LOD_MAX; c++) - { - state->tex[0][c] = &voodoo->texture_cache[0][params->tex_entry[0]].data[texture_offset[c]]; - state->tex[1][c] = &voodoo->texture_cache[1][params->tex_entry[1]].data[texture_offset[c]]; - } - - state->tformat = params->tformat[0]; - - state->tex_w_mask[0] = params->tex_w_mask[0]; - state->tex_h_mask[0] = params->tex_h_mask[0]; - state->tex_shift[0] = params->tex_shift[0]; - state->tex_lod[0] = params->tex_lod[0]; - state->tex_w_mask[1] = params->tex_w_mask[1]; - state->tex_h_mask[1] = params->tex_h_mask[1]; - state->tex_shift[1] = params->tex_shift[1]; - state->tex_lod[1] = params->tex_lod[1]; - - if ((params->fbzMode & 1) && (ystart < params->clipLowY)) - { - int dy = params->clipLowY - ystart; - - state->base_r += params->dRdY*dy; - state->base_g += params->dGdY*dy; - state->base_b += params->dBdY*dy; - state->base_a += params->dAdY*dy; - state->base_z += params->dZdY*dy; - state->tmu[0].base_s += params->tmu[0].dSdY*dy; - state->tmu[0].base_t += params->tmu[0].dTdY*dy; - state->tmu[0].base_w += params->tmu[0].dWdY*dy; - state->tmu[1].base_s += params->tmu[1].dSdY*dy; - state->tmu[1].base_t += params->tmu[1].dTdY*dy; - state->tmu[1].base_w += params->tmu[1].dWdY*dy; - state->base_w += params->dWdY*dy; - state->xstart += state->dx1*dy; - state->xend += state->dx2*dy; - - ystart = params->clipLowY; - } - - if ((params->fbzMode & 1) && (yend >= params->clipHighY)) - yend = params->clipHighY; - - state->y = ystart; -// yend--; - - if (SLI_ENABLED) - { - int test_y; - - if (params->fbzMode & (1 << 17)) - test_y = y_origin - state->y; - else - test_y = state->y; - - if ((!(voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && (test_y & 1)) || - ((voodoo->initEnable & INITENABLE_SLI_MASTER_SLAVE) && !(test_y & 1))) - { - state->y++; - - state->base_r += params->dRdY; - state->base_g += params->dGdY; - state->base_b += params->dBdY; - state->base_a += params->dAdY; - state->base_z += params->dZdY; - state->tmu[0].base_s += params->tmu[0].dSdY; - state->tmu[0].base_t += params->tmu[0].dTdY; - state->tmu[0].base_w += params->tmu[0].dWdY; - state->tmu[1].base_s += params->tmu[1].dSdY; - state->tmu[1].base_t += params->tmu[1].dTdY; - state->tmu[1].base_w += params->tmu[1].dWdY; - state->base_w += params->dWdY; - state->xstart += state->dx1; - state->xend += state->dx2; - } + state->base_r += params->dRdY; + state->base_g += params->dGdY; + state->base_b += params->dBdY; + state->base_a += params->dAdY; + state->base_z += params->dZdY; + state->tmu[0].base_s += params->tmu[0].dSdY; + state->tmu[0].base_t += params->tmu[0].dTdY; + state->tmu[0].base_w += params->tmu[0].dWdY; + state->tmu[1].base_s += params->tmu[1].dSdY; + state->tmu[1].base_t += params->tmu[1].dTdY; + state->tmu[1].base_w += params->tmu[1].dWdY; + state->base_w += params->dWdY; + state->xstart += state->dx1; + state->xend += state->dx2; } + } #ifndef NO_CODEGEN - if (voodoo->use_recompiler) - voodoo_draw = voodoo_get_block(voodoo, params, state, odd_even); + if (voodoo->use_recompiler) + voodoo_draw = voodoo_get_block(voodoo, params, state, odd_even); + else + voodoo_draw = NULL; +#endif + + voodoo_render_log("dxAB=%08x dxBC=%08x dxAC=%08x\n", state->dxAB, state->dxBC, state->dxAC); + // voodoo_render_log("Start %i %i\n", ystart, voodoo->fbzMode & (1 << 17)); + + for (; state->y < yend; state->y += y_diff) { + int x, x2; + int real_y = (state->y << 4) + 8; + int start_x; + int dx; + uint16_t *fb_mem, *aux_mem; + + state->ir = state->base_r; + state->ig = state->base_g; + state->ib = state->base_b; + state->ia = state->base_a; + state->z = state->base_z; + state->tmu0_s = state->tmu[0].base_s; + state->tmu0_t = state->tmu[0].base_t; + state->tmu0_w = state->tmu[0].base_w; + state->tmu1_s = state->tmu[1].base_s; + state->tmu1_t = state->tmu[1].base_t; + state->tmu1_w = state->tmu[1].base_w; + state->w = state->base_w; + + x = (state->vertexAx << 12) + ((state->dxAC * (real_y - state->vertexAy)) >> 4); + + if (real_y < state->vertexBy) + x2 = (state->vertexAx << 12) + ((state->dxAB * (real_y - state->vertexAy)) >> 4); else - voodoo_draw = NULL; -#endif + x2 = (state->vertexBx << 12) + ((state->dxBC * (real_y - state->vertexBy)) >> 4); - voodoo_render_log("dxAB=%08x dxBC=%08x dxAC=%08x\n", state->dxAB, state->dxBC, state->dxAC); -// voodoo_render_log("Start %i %i\n", ystart, voodoo->fbzMode & (1 << 17)); + if (params->fbzMode & (1 << 17)) + real_y = y_origin - (real_y >> 4); + else + real_y >>= 4; - for (; state->y < yend; state->y += y_diff) - { - int x, x2; - int real_y = (state->y << 4) + 8; - int start_x; - int dx; - uint16_t *fb_mem, *aux_mem; + if (SLI_ENABLED) { + if (((real_y >> 1) & voodoo->odd_even_mask) != odd_even) + goto next_line; + } else { + if ((real_y & voodoo->odd_even_mask) != odd_even) + goto next_line; + } - state->ir = state->base_r; - state->ig = state->base_g; - state->ib = state->base_b; - state->ia = state->base_a; - state->z = state->base_z; - state->tmu0_s = state->tmu[0].base_s; - state->tmu0_t = state->tmu[0].base_t; - state->tmu0_w = state->tmu[0].base_w; - state->tmu1_s = state->tmu[1].base_s; - state->tmu1_t = state->tmu[1].base_t; - state->tmu1_w = state->tmu[1].base_w; - state->w = state->base_w; + start_x = x; - x = (state->vertexAx << 12) + ((state->dxAC * (real_y - state->vertexAy)) >> 4); + if (state->xdir > 0) + x2 -= (1 << 16); + else + x -= (1 << 16); + dx = ((x + 0x7000) >> 16) - (((state->vertexAx << 12) + 0x7000) >> 16); + x = (x + 0x7000) >> 16; + x2 = (x2 + 0x7000) >> 16; - if (real_y < state->vertexBy) - x2 = (state->vertexAx << 12) + ((state->dxAB * (real_y - state->vertexAy)) >> 4); - else - x2 = (state->vertexBx << 12) + ((state->dxBC * (real_y - state->vertexBy)) >> 4); + voodoo_render_log("%03i:%03i : Ax=%08x start_x=%08x dSdX=%016llx dx=%08x s=%08x -> ", x, state->y, state->vertexAx << 8, start_x, params->tmu[0].dTdX, dx, state->tmu0_t); - if (params->fbzMode & (1 << 17)) - real_y = y_origin - (real_y >> 4); - else - real_y >>= 4; + state->ir += (params->dRdX * dx); + state->ig += (params->dGdX * dx); + state->ib += (params->dBdX * dx); + state->ia += (params->dAdX * dx); + state->z += (params->dZdX * dx); + state->tmu0_s += (params->tmu[0].dSdX * dx); + state->tmu0_t += (params->tmu[0].dTdX * dx); + state->tmu0_w += (params->tmu[0].dWdX * dx); + state->tmu1_s += (params->tmu[1].dSdX * dx); + state->tmu1_t += (params->tmu[1].dTdX * dx); + state->tmu1_w += (params->tmu[1].dWdX * dx); + state->w += (params->dWdX * dx); - if (SLI_ENABLED) - { - if (((real_y >> 1) & voodoo->odd_even_mask) != odd_even) - goto next_line; + voodoo_render_log("%08llx %lli %lli\n", state->tmu0_t, state->tmu0_t >> (18 + state->lod), (state->tmu0_t + (1 << (17 + state->lod))) >> (18 + state->lod)); + + if (params->fbzMode & 1) { + if (state->xdir > 0) { + if (x < params->clipLeft) { + int dx = params->clipLeft - x; + + state->ir += params->dRdX * dx; + state->ig += params->dGdX * dx; + state->ib += params->dBdX * dx; + state->ia += params->dAdX * dx; + state->z += params->dZdX * dx; + state->tmu0_s += params->tmu[0].dSdX * dx; + state->tmu0_t += params->tmu[0].dTdX * dx; + state->tmu0_w += params->tmu[0].dWdX * dx; + state->tmu1_s += params->tmu[1].dSdX * dx; + state->tmu1_t += params->tmu[1].dTdX * dx; + state->tmu1_w += params->tmu[1].dWdX * dx; + state->w += params->dWdX * dx; + + x = params->clipLeft; } - else - { - if ((real_y & voodoo->odd_even_mask) != odd_even) - goto next_line; + if (x2 >= params->clipRight) + x2 = params->clipRight - 1; + } else { + if (x >= params->clipRight) { + int dx = (params->clipRight - 1) - x; + + state->ir += params->dRdX * dx; + state->ig += params->dGdX * dx; + state->ib += params->dBdX * dx; + state->ia += params->dAdX * dx; + state->z += params->dZdX * dx; + state->tmu0_s += params->tmu[0].dSdX * dx; + state->tmu0_t += params->tmu[0].dTdX * dx; + state->tmu0_w += params->tmu[0].dWdX * dx; + state->tmu1_s += params->tmu[1].dSdX * dx; + state->tmu1_t += params->tmu[1].dTdX * dx; + state->tmu1_w += params->tmu[1].dWdX * dx; + state->w += params->dWdX * dx; + + x = params->clipRight - 1; } + if (x2 < params->clipLeft) + x2 = params->clipLeft; + } + } - start_x = x; + if (x2 < x && state->xdir > 0) + goto next_line; + if (x2 > x && state->xdir < 0) + goto next_line; - if (state->xdir > 0) - x2 -= (1 << 16); - else - x -= (1 << 16); - dx = ((x + 0x7000) >> 16) - (((state->vertexAx << 12) + 0x7000) >> 16); - x = (x + 0x7000) >> 16; - x2 = (x2 + 0x7000) >> 16; + if (SLI_ENABLED) { + state->fb_mem = fb_mem = (uint16_t *) &voodoo->fb_mem[params->draw_offset + ((real_y >> 1) * params->row_width)]; + state->aux_mem = aux_mem = (uint16_t *) &voodoo->fb_mem[(params->aux_offset + ((real_y >> 1) * params->row_width)) & voodoo->fb_mask]; + } else { + if (params->col_tiled) + state->fb_mem = fb_mem = (uint16_t *) &voodoo->fb_mem[params->draw_offset + (real_y >> 5) * params->row_width + (real_y & 31) * 128]; + else + state->fb_mem = fb_mem = (uint16_t *) &voodoo->fb_mem[params->draw_offset + (real_y * params->row_width)]; + if (params->aux_tiled) + state->aux_mem = aux_mem = (uint16_t *) &voodoo->fb_mem[(params->aux_offset + (real_y >> 5) * params->aux_row_width + (real_y & 31) * 128) & voodoo->fb_mask]; + else + state->aux_mem = aux_mem = (uint16_t *) &voodoo->fb_mem[(params->aux_offset + (real_y * params->row_width)) & voodoo->fb_mask]; + } - voodoo_render_log("%03i:%03i : Ax=%08x start_x=%08x dSdX=%016llx dx=%08x s=%08x -> ", x, state->y, state->vertexAx << 8, start_x, params->tmu[0].dTdX, dx, state->tmu0_t); + voodoo_render_log("%03i: x=%08x x2=%08x xstart=%08x xend=%08x dx=%08x\n", state->y, x, x2, state->xstart, state->xend, dx); - state->ir += (params->dRdX * dx); - state->ig += (params->dGdX * dx); - state->ib += (params->dBdX * dx); - state->ia += (params->dAdX * dx); - state->z += (params->dZdX * dx); - state->tmu0_s += (params->tmu[0].dSdX * dx); - state->tmu0_t += (params->tmu[0].dTdX * dx); - state->tmu0_w += (params->tmu[0].dWdX * dx); - state->tmu1_s += (params->tmu[1].dSdX * dx); - state->tmu1_t += (params->tmu[1].dTdX * dx); - state->tmu1_w += (params->tmu[1].dWdX * dx); - state->w += (params->dWdX * dx); - - voodoo_render_log("%08llx %lli %lli\n", state->tmu0_t, state->tmu0_t >> (18+state->lod), (state->tmu0_t + (1 << (17+state->lod))) >> (18+state->lod)); - - if (params->fbzMode & 1) - { - if (state->xdir > 0) - { - if (x < params->clipLeft) - { - int dx = params->clipLeft - x; - - state->ir += params->dRdX*dx; - state->ig += params->dGdX*dx; - state->ib += params->dBdX*dx; - state->ia += params->dAdX*dx; - state->z += params->dZdX*dx; - state->tmu0_s += params->tmu[0].dSdX*dx; - state->tmu0_t += params->tmu[0].dTdX*dx; - state->tmu0_w += params->tmu[0].dWdX*dx; - state->tmu1_s += params->tmu[1].dSdX*dx; - state->tmu1_t += params->tmu[1].dTdX*dx; - state->tmu1_w += params->tmu[1].dWdX*dx; - state->w += params->dWdX*dx; - - x = params->clipLeft; - } - if (x2 >= params->clipRight) - x2 = params->clipRight-1; - } - else - { - if (x >= params->clipRight) - { - int dx = (params->clipRight-1) - x; - - state->ir += params->dRdX*dx; - state->ig += params->dGdX*dx; - state->ib += params->dBdX*dx; - state->ia += params->dAdX*dx; - state->z += params->dZdX*dx; - state->tmu0_s += params->tmu[0].dSdX*dx; - state->tmu0_t += params->tmu[0].dTdX*dx; - state->tmu0_w += params->tmu[0].dWdX*dx; - state->tmu1_s += params->tmu[1].dSdX*dx; - state->tmu1_t += params->tmu[1].dTdX*dx; - state->tmu1_w += params->tmu[1].dWdX*dx; - state->w += params->dWdX*dx; - - x = params->clipRight-1; - } - if (x2 < params->clipLeft) - x2 = params->clipLeft; - } - } - - if (x2 < x && state->xdir > 0) - goto next_line; - if (x2 > x && state->xdir < 0) - goto next_line; - - if (SLI_ENABLED) - { - state->fb_mem = fb_mem = (uint16_t *)&voodoo->fb_mem[params->draw_offset + ((real_y >> 1) * params->row_width)]; - state->aux_mem = aux_mem = (uint16_t *)&voodoo->fb_mem[(params->aux_offset + ((real_y >> 1) * params->row_width)) & voodoo->fb_mask]; - } - else - { - if (params->col_tiled) - state->fb_mem = fb_mem = (uint16_t *)&voodoo->fb_mem[params->draw_offset + (real_y >> 5) * params->row_width + (real_y & 31) * 128]; - else - state->fb_mem = fb_mem = (uint16_t *)&voodoo->fb_mem[params->draw_offset + (real_y * params->row_width)]; - if (params->aux_tiled) - state->aux_mem = aux_mem = (uint16_t *)&voodoo->fb_mem[(params->aux_offset + (real_y >> 5) * params->aux_row_width + (real_y & 31) * 128) & voodoo->fb_mask]; - else - state->aux_mem = aux_mem = (uint16_t *)&voodoo->fb_mem[(params->aux_offset + (real_y * params->row_width)) & voodoo->fb_mask]; - } - - voodoo_render_log("%03i: x=%08x x2=%08x xstart=%08x xend=%08x dx=%08x\n", state->y, x, x2, state->xstart, state->xend, dx); - - state->pixel_count = 0; - state->texel_count = 0; - state->x = x; - state->x2 = x2; + state->pixel_count = 0; + state->texel_count = 0; + state->x = x; + state->x2 = x2; #ifndef NO_CODEGEN - if (voodoo->use_recompiler) - { - voodoo_draw(state, params, x, real_y); - } - else + if (voodoo->use_recompiler) { + voodoo_draw(state, params, x, real_y); + } else #endif - do + do { + int x_tiled = (x & 63) | ((x >> 6) * 128 * 32 / 2); + start_x = x; + state->x = x; + voodoo->pixel_count[odd_even]++; + voodoo->texel_count[odd_even] += texels; + voodoo->fbiPixelsIn++; + + voodoo_render_log(" X=%03i T=%08x\n", x, state->tmu0_t); + // if (voodoo->fbzMode & FBZ_RGB_WMASK) { - int x_tiled = (x & 63) | ((x >> 6) * 128*32/2); - start_x = x; - state->x = x; - voodoo->pixel_count[odd_even]++; - voodoo->texel_count[odd_even] += texels; - voodoo->fbiPixelsIn++; + int update = 1; + uint8_t cother_r = 0, cother_g = 0, cother_b = 0, aother; + uint8_t clocal_r, clocal_g, clocal_b, alocal; + int src_r = 0, src_g = 0, src_b = 0, src_a = 0; + int msel_r, msel_g, msel_b, msel_a; + uint8_t dest_r, dest_g, dest_b, dest_a; + uint16_t dat; + int sel; + int32_t new_depth, w_depth; - voodoo_render_log(" X=%03i T=%08x\n", x, state->tmu0_t); -// if (voodoo->fbzMode & FBZ_RGB_WMASK) - { - int update = 1; - uint8_t cother_r = 0, cother_g = 0, cother_b = 0, aother; - uint8_t clocal_r, clocal_g, clocal_b, alocal; - int src_r = 0, src_g = 0, src_b = 0, src_a = 0; - int msel_r, msel_g, msel_b, msel_a; - uint8_t dest_r, dest_g, dest_b, dest_a; - uint16_t dat; - int sel; - int32_t new_depth, w_depth; + if (state->w & 0xffff00000000) + w_depth = 0; + else if (!(state->w & 0xffff0000)) + w_depth = 0xf001; + else { + int exp = voodoo_fls((uint16_t) ((uint32_t) state->w >> 16)); + int mant = ((~(uint32_t) state->w >> (19 - exp))) & 0xfff; + w_depth = (exp << 12) + mant + 1; + if (w_depth > 0xffff) + w_depth = 0xffff; + } - if (state->w & 0xffff00000000) - w_depth = 0; - else if (!(state->w & 0xffff0000)) - w_depth = 0xf001; - else - { - int exp = voodoo_fls((uint16_t)((uint32_t)state->w >> 16)); - int mant = ((~(uint32_t)state->w >> (19 - exp))) & 0xfff; - w_depth = (exp << 12) + mant + 1; - if (w_depth > 0xffff) - w_depth = 0xffff; - } + // w_depth = CLAMP16(w_depth); -// w_depth = CLAMP16(w_depth); + if (params->fbzMode & FBZ_W_BUFFER) + new_depth = w_depth; + else + new_depth = CLAMP16(state->z >> 12); - if (params->fbzMode & FBZ_W_BUFFER) - new_depth = w_depth; - else - new_depth = CLAMP16(state->z >> 12); + if (params->fbzMode & FBZ_DEPTH_BIAS) + new_depth = CLAMP16(new_depth + (int16_t) params->zaColor); - if (params->fbzMode & FBZ_DEPTH_BIAS) - new_depth = CLAMP16(new_depth + (int16_t)params->zaColor); + if (params->fbzMode & FBZ_DEPTH_ENABLE) { + uint16_t old_depth = voodoo->params.aux_tiled ? aux_mem[x_tiled] : aux_mem[x]; - if (params->fbzMode & FBZ_DEPTH_ENABLE) - { - uint16_t old_depth = voodoo->params.aux_tiled ? aux_mem[x_tiled] : aux_mem[x]; + DEPTH_TEST((params->fbzMode & FBZ_DEPTH_SOURCE) ? (params->zaColor & 0xffff) : new_depth); + } - DEPTH_TEST((params->fbzMode & FBZ_DEPTH_SOURCE) ? (params->zaColor & 0xffff) : new_depth); - } + dat = voodoo->params.col_tiled ? fb_mem[x_tiled] : fb_mem[x]; + dest_r = (dat >> 8) & 0xf8; + dest_g = (dat >> 3) & 0xfc; + dest_b = (dat << 3) & 0xf8; + dest_r |= (dest_r >> 5); + dest_g |= (dest_g >> 6); + dest_b |= (dest_b >> 5); + dest_a = 0xff; - dat = voodoo->params.col_tiled ? fb_mem[x_tiled] : fb_mem[x]; - dest_r = (dat >> 8) & 0xf8; - dest_g = (dat >> 3) & 0xfc; - dest_b = (dat << 3) & 0xf8; - dest_r |= (dest_r >> 5); - dest_g |= (dest_g >> 6); - dest_b |= (dest_b >> 5); - dest_a = 0xff; + if (params->fbzColorPath & FBZCP_TEXTURE_ENABLED) { + if ((params->textureMode[0] & TEXTUREMODE_LOCAL_MASK) == TEXTUREMODE_LOCAL || !voodoo->dual_tmus) { + /*TMU0 only sampling local colour or only one TMU, only sample TMU0*/ + voodoo_tmu_fetch(voodoo, params, state, 0, x); + } else if ((params->textureMode[0] & TEXTUREMODE_MASK) == TEXTUREMODE_PASSTHROUGH) { + /*TMU0 in pass-through mode, only sample TMU1*/ + voodoo_tmu_fetch(voodoo, params, state, 1, x); - if (params->fbzColorPath & FBZCP_TEXTURE_ENABLED) - { - if ((params->textureMode[0] & TEXTUREMODE_LOCAL_MASK) == TEXTUREMODE_LOCAL || !voodoo->dual_tmus) - { - /*TMU0 only sampling local colour or only one TMU, only sample TMU0*/ - voodoo_tmu_fetch(voodoo, params, state, 0, x); - } - else if ((params->textureMode[0] & TEXTUREMODE_MASK) == TEXTUREMODE_PASSTHROUGH) - { - /*TMU0 in pass-through mode, only sample TMU1*/ - voodoo_tmu_fetch(voodoo, params, state, 1, x); - - state->tex_r[0] = state->tex_r[1]; - state->tex_g[0] = state->tex_g[1]; - state->tex_b[0] = state->tex_b[1]; - state->tex_a[0] = state->tex_a[1]; - } - else - { - voodoo_tmu_fetch_and_blend(voodoo, params, state, x); - } - - if ((params->fbzMode & FBZ_CHROMAKEY) && - state->tex_r[0] == params->chromaKey_r && - state->tex_g[0] == params->chromaKey_g && - state->tex_b[0] == params->chromaKey_b) - { - voodoo->fbiChromaFail++; - goto skip_pixel; - } - } - - if (voodoo->trexInit1[0] & (1 << 18)) - { - state->tex_r[0] = state->tex_g[0] = 0; - state->tex_b[0] = voodoo->tmuConfig; - } - - if (cc_localselect_override) - sel = (state->tex_a[0] & 0x80) ? 1 : 0; - else - sel = cc_localselect; - - if (sel) - { - clocal_r = (params->color0 >> 16) & 0xff; - clocal_g = (params->color0 >> 8) & 0xff; - clocal_b = params->color0 & 0xff; - } - else - { - clocal_r = CLAMP(state->ir >> 12); - clocal_g = CLAMP(state->ig >> 12); - clocal_b = CLAMP(state->ib >> 12); - } - - switch (_rgb_sel) - { - case CC_LOCALSELECT_ITER_RGB: /*Iterated RGB*/ - cother_r = CLAMP(state->ir >> 12); - cother_g = CLAMP(state->ig >> 12); - cother_b = CLAMP(state->ib >> 12); - break; - - case CC_LOCALSELECT_TEX: /*TREX Color Output*/ - cother_r = state->tex_r[0]; - cother_g = state->tex_g[0]; - cother_b = state->tex_b[0]; - break; - - case CC_LOCALSELECT_COLOR1: /*Color1 RGB*/ - cother_r = (params->color1 >> 16) & 0xff; - cother_g = (params->color1 >> 8) & 0xff; - cother_b = params->color1 & 0xff; - break; - - case CC_LOCALSELECT_LFB: /*Linear Frame Buffer*/ - cother_r = src_r; - cother_g = src_g; - cother_b = src_b; - break; - } - - switch (cca_localselect) - { - case CCA_LOCALSELECT_ITER_A: - alocal = CLAMP(state->ia >> 12); - break; - - case CCA_LOCALSELECT_COLOR0: - alocal = (params->color0 >> 24) & 0xff; - break; - - case CCA_LOCALSELECT_ITER_Z: - alocal = CLAMP(state->z >> 20); - break; - - default: - fatal("Bad cca_localselect %i\n", cca_localselect); - alocal = 0xff; - break; - } - - switch (a_sel) - { - case A_SEL_ITER_A: - aother = CLAMP(state->ia >> 12); - break; - case A_SEL_TEX: - aother = state->tex_a[0]; - break; - case A_SEL_COLOR1: - aother = (params->color1 >> 24) & 0xff; - break; - default: - fatal("Bad a_sel %i\n", a_sel); - aother = 0; - break; - } - - if (cc_zero_other) - { - src_r = 0; - src_g = 0; - src_b = 0; - } - else - { - src_r = cother_r; - src_g = cother_g; - src_b = cother_b; - } - - if (cca_zero_other) - src_a = 0; - else - src_a = aother; - - if (cc_sub_clocal) - { - src_r -= clocal_r; - src_g -= clocal_g; - src_b -= clocal_b; - } - - if (cca_sub_clocal) - src_a -= alocal; - - switch (cc_mselect) - { - case CC_MSELECT_ZERO: - msel_r = 0; - msel_g = 0; - msel_b = 0; - break; - case CC_MSELECT_CLOCAL: - msel_r = clocal_r; - msel_g = clocal_g; - msel_b = clocal_b; - break; - case CC_MSELECT_AOTHER: - msel_r = aother; - msel_g = aother; - msel_b = aother; - break; - case CC_MSELECT_ALOCAL: - msel_r = alocal; - msel_g = alocal; - msel_b = alocal; - break; - case CC_MSELECT_TEX: - msel_r = state->tex_a[0]; - msel_g = state->tex_a[0]; - msel_b = state->tex_a[0]; - break; - case CC_MSELECT_TEXRGB: - msel_r = state->tex_r[0]; - msel_g = state->tex_g[0]; - msel_b = state->tex_b[0]; - break; - - default: - fatal("Bad cc_mselect %i\n", cc_mselect); - msel_r = 0; - msel_g = 0; - msel_b = 0; - break; - } - - switch (cca_mselect) - { - case CCA_MSELECT_ZERO: - msel_a = 0; - break; - case CCA_MSELECT_ALOCAL: - msel_a = alocal; - break; - case CCA_MSELECT_AOTHER: - msel_a = aother; - break; - case CCA_MSELECT_ALOCAL2: - msel_a = alocal; - break; - case CCA_MSELECT_TEX: - msel_a = state->tex_a[0]; - break; - - default: - fatal("Bad cca_mselect %i\n", cca_mselect); - msel_a = 0; - break; - } - - if (!cc_reverse_blend) - { - msel_r ^= 0xff; - msel_g ^= 0xff; - msel_b ^= 0xff; - } - msel_r++; - msel_g++; - msel_b++; - - if (!cca_reverse_blend) - msel_a ^= 0xff; - msel_a++; - - src_r = (src_r * msel_r) >> 8; - src_g = (src_g * msel_g) >> 8; - src_b = (src_b * msel_b) >> 8; - src_a = (src_a * msel_a) >> 8; - - switch (cc_add) - { - case CC_ADD_CLOCAL: - src_r += clocal_r; - src_g += clocal_g; - src_b += clocal_b; - break; - case CC_ADD_ALOCAL: - src_r += alocal; - src_g += alocal; - src_b += alocal; - break; - case 0: - break; - default: - fatal("Bad cc_add %i\n", cc_add); - } - - if (cca_add) - src_a += alocal; - - src_r = CLAMP(src_r); - src_g = CLAMP(src_g); - src_b = CLAMP(src_b); - src_a = CLAMP(src_a); - - if (cc_invert_output) - { - src_r ^= 0xff; - src_g ^= 0xff; - src_b ^= 0xff; - } - if (cca_invert_output) - src_a ^= 0xff; - - if (params->fogMode & FOG_ENABLE) - APPLY_FOG(src_r, src_g, src_b, state->z, state->ia, state->w); - - if (params->alphaMode & 1) - ALPHA_TEST(src_a); - - if (params->alphaMode & (1 << 4)) { - if (dithersub && !dither2x2 && voodoo->dithersub_enabled) - { - dest_r = dithersub_rb[dest_r][real_y & 3][x & 3]; - dest_g = dithersub_g [dest_g][real_y & 3][x & 3]; - dest_b = dithersub_rb[dest_b][real_y & 3][x & 3]; - } - if (dithersub && dither2x2 && voodoo->dithersub_enabled) - { - dest_r = dithersub_rb2x2[dest_r][real_y & 1][x & 1]; - dest_g = dithersub_g2x2 [dest_g][real_y & 1][x & 1]; - dest_b = dithersub_rb2x2[dest_b][real_y & 1][x & 1]; - } - ALPHA_BLEND(src_r, src_g, src_b, src_a); - } - - if (update) - { - if (dither) - { - if (dither2x2) - { - src_r = dither_rb2x2[src_r][real_y & 1][x & 1]; - src_g = dither_g2x2[src_g][real_y & 1][x & 1]; - src_b = dither_rb2x2[src_b][real_y & 1][x & 1]; - } - else - { - src_r = dither_rb[src_r][real_y & 3][x & 3]; - src_g = dither_g[src_g][real_y & 3][x & 3]; - src_b = dither_rb[src_b][real_y & 3][x & 3]; - } - } - else - { - src_r >>= 3; - src_g >>= 2; - src_b >>= 3; - } - - if (params->fbzMode & FBZ_RGB_WMASK) - { - if (voodoo->params.col_tiled) - fb_mem[x_tiled] = src_b | (src_g << 5) | (src_r << 11); - else - fb_mem[x] = src_b | (src_g << 5) | (src_r << 11); - } - if ((params->fbzMode & (FBZ_DEPTH_WMASK | FBZ_DEPTH_ENABLE)) == (FBZ_DEPTH_WMASK | FBZ_DEPTH_ENABLE)) - { - if (voodoo->params.aux_tiled) - aux_mem[x_tiled] = new_depth; - else - aux_mem[x] = new_depth; - } - } + state->tex_r[0] = state->tex_r[1]; + state->tex_g[0] = state->tex_g[1]; + state->tex_b[0] = state->tex_b[1]; + state->tex_a[0] = state->tex_a[1]; + } else { + voodoo_tmu_fetch_and_blend(voodoo, params, state, x); } - voodoo->fbiPixelsOut++; + + if ((params->fbzMode & FBZ_CHROMAKEY) && state->tex_r[0] == params->chromaKey_r && state->tex_g[0] == params->chromaKey_g && state->tex_b[0] == params->chromaKey_b) { + voodoo->fbiChromaFail++; + goto skip_pixel; + } + } + + if (voodoo->trexInit1[0] & (1 << 18)) { + state->tex_r[0] = state->tex_g[0] = 0; + state->tex_b[0] = voodoo->tmuConfig; + } + + if (cc_localselect_override) + sel = (state->tex_a[0] & 0x80) ? 1 : 0; + else + sel = cc_localselect; + + if (sel) { + clocal_r = (params->color0 >> 16) & 0xff; + clocal_g = (params->color0 >> 8) & 0xff; + clocal_b = params->color0 & 0xff; + } else { + clocal_r = CLAMP(state->ir >> 12); + clocal_g = CLAMP(state->ig >> 12); + clocal_b = CLAMP(state->ib >> 12); + } + + switch (_rgb_sel) { + case CC_LOCALSELECT_ITER_RGB: /*Iterated RGB*/ + cother_r = CLAMP(state->ir >> 12); + cother_g = CLAMP(state->ig >> 12); + cother_b = CLAMP(state->ib >> 12); + break; + + case CC_LOCALSELECT_TEX: /*TREX Color Output*/ + cother_r = state->tex_r[0]; + cother_g = state->tex_g[0]; + cother_b = state->tex_b[0]; + break; + + case CC_LOCALSELECT_COLOR1: /*Color1 RGB*/ + cother_r = (params->color1 >> 16) & 0xff; + cother_g = (params->color1 >> 8) & 0xff; + cother_b = params->color1 & 0xff; + break; + + case CC_LOCALSELECT_LFB: /*Linear Frame Buffer*/ + cother_r = src_r; + cother_g = src_g; + cother_b = src_b; + break; + } + + switch (cca_localselect) { + case CCA_LOCALSELECT_ITER_A: + alocal = CLAMP(state->ia >> 12); + break; + + case CCA_LOCALSELECT_COLOR0: + alocal = (params->color0 >> 24) & 0xff; + break; + + case CCA_LOCALSELECT_ITER_Z: + alocal = CLAMP(state->z >> 20); + break; + + default: + fatal("Bad cca_localselect %i\n", cca_localselect); + alocal = 0xff; + break; + } + + switch (a_sel) { + case A_SEL_ITER_A: + aother = CLAMP(state->ia >> 12); + break; + case A_SEL_TEX: + aother = state->tex_a[0]; + break; + case A_SEL_COLOR1: + aother = (params->color1 >> 24) & 0xff; + break; + default: + fatal("Bad a_sel %i\n", a_sel); + aother = 0; + break; + } + + if (cc_zero_other) { + src_r = 0; + src_g = 0; + src_b = 0; + } else { + src_r = cother_r; + src_g = cother_g; + src_b = cother_b; + } + + if (cca_zero_other) + src_a = 0; + else + src_a = aother; + + if (cc_sub_clocal) { + src_r -= clocal_r; + src_g -= clocal_g; + src_b -= clocal_b; + } + + if (cca_sub_clocal) + src_a -= alocal; + + switch (cc_mselect) { + case CC_MSELECT_ZERO: + msel_r = 0; + msel_g = 0; + msel_b = 0; + break; + case CC_MSELECT_CLOCAL: + msel_r = clocal_r; + msel_g = clocal_g; + msel_b = clocal_b; + break; + case CC_MSELECT_AOTHER: + msel_r = aother; + msel_g = aother; + msel_b = aother; + break; + case CC_MSELECT_ALOCAL: + msel_r = alocal; + msel_g = alocal; + msel_b = alocal; + break; + case CC_MSELECT_TEX: + msel_r = state->tex_a[0]; + msel_g = state->tex_a[0]; + msel_b = state->tex_a[0]; + break; + case CC_MSELECT_TEXRGB: + msel_r = state->tex_r[0]; + msel_g = state->tex_g[0]; + msel_b = state->tex_b[0]; + break; + + default: + fatal("Bad cc_mselect %i\n", cc_mselect); + msel_r = 0; + msel_g = 0; + msel_b = 0; + break; + } + + switch (cca_mselect) { + case CCA_MSELECT_ZERO: + msel_a = 0; + break; + case CCA_MSELECT_ALOCAL: + msel_a = alocal; + break; + case CCA_MSELECT_AOTHER: + msel_a = aother; + break; + case CCA_MSELECT_ALOCAL2: + msel_a = alocal; + break; + case CCA_MSELECT_TEX: + msel_a = state->tex_a[0]; + break; + + default: + fatal("Bad cca_mselect %i\n", cca_mselect); + msel_a = 0; + break; + } + + if (!cc_reverse_blend) { + msel_r ^= 0xff; + msel_g ^= 0xff; + msel_b ^= 0xff; + } + msel_r++; + msel_g++; + msel_b++; + + if (!cca_reverse_blend) + msel_a ^= 0xff; + msel_a++; + + src_r = (src_r * msel_r) >> 8; + src_g = (src_g * msel_g) >> 8; + src_b = (src_b * msel_b) >> 8; + src_a = (src_a * msel_a) >> 8; + + switch (cc_add) { + case CC_ADD_CLOCAL: + src_r += clocal_r; + src_g += clocal_g; + src_b += clocal_b; + break; + case CC_ADD_ALOCAL: + src_r += alocal; + src_g += alocal; + src_b += alocal; + break; + case 0: + break; + default: + fatal("Bad cc_add %i\n", cc_add); + } + + if (cca_add) + src_a += alocal; + + src_r = CLAMP(src_r); + src_g = CLAMP(src_g); + src_b = CLAMP(src_b); + src_a = CLAMP(src_a); + + if (cc_invert_output) { + src_r ^= 0xff; + src_g ^= 0xff; + src_b ^= 0xff; + } + if (cca_invert_output) + src_a ^= 0xff; + + if (params->fogMode & FOG_ENABLE) + APPLY_FOG(src_r, src_g, src_b, state->z, state->ia, state->w); + + if (params->alphaMode & 1) + ALPHA_TEST(src_a); + + if (params->alphaMode & (1 << 4)) { + if (dithersub && !dither2x2 && voodoo->dithersub_enabled) { + dest_r = dithersub_rb[dest_r][real_y & 3][x & 3]; + dest_g = dithersub_g[dest_g][real_y & 3][x & 3]; + dest_b = dithersub_rb[dest_b][real_y & 3][x & 3]; + } + if (dithersub && dither2x2 && voodoo->dithersub_enabled) { + dest_r = dithersub_rb2x2[dest_r][real_y & 1][x & 1]; + dest_g = dithersub_g2x2[dest_g][real_y & 1][x & 1]; + dest_b = dithersub_rb2x2[dest_b][real_y & 1][x & 1]; + } + ALPHA_BLEND(src_r, src_g, src_b, src_a); + } + + if (update) { + if (dither) { + if (dither2x2) { + src_r = dither_rb2x2[src_r][real_y & 1][x & 1]; + src_g = dither_g2x2[src_g][real_y & 1][x & 1]; + src_b = dither_rb2x2[src_b][real_y & 1][x & 1]; + } else { + src_r = dither_rb[src_r][real_y & 3][x & 3]; + src_g = dither_g[src_g][real_y & 3][x & 3]; + src_b = dither_rb[src_b][real_y & 3][x & 3]; + } + } else { + src_r >>= 3; + src_g >>= 2; + src_b >>= 3; + } + + if (params->fbzMode & FBZ_RGB_WMASK) { + if (voodoo->params.col_tiled) + fb_mem[x_tiled] = src_b | (src_g << 5) | (src_r << 11); + else + fb_mem[x] = src_b | (src_g << 5) | (src_r << 11); + } + if ((params->fbzMode & (FBZ_DEPTH_WMASK | FBZ_DEPTH_ENABLE)) == (FBZ_DEPTH_WMASK | FBZ_DEPTH_ENABLE)) { + if (voodoo->params.aux_tiled) + aux_mem[x_tiled] = new_depth; + else + aux_mem[x] = new_depth; + } + } + } + voodoo->fbiPixelsOut++; skip_pixel: - if (state->xdir > 0) - { - state->ir += params->dRdX; - state->ig += params->dGdX; - state->ib += params->dBdX; - state->ia += params->dAdX; - state->z += params->dZdX; - state->tmu0_s += params->tmu[0].dSdX; - state->tmu0_t += params->tmu[0].dTdX; - state->tmu0_w += params->tmu[0].dWdX; - state->tmu1_s += params->tmu[1].dSdX; - state->tmu1_t += params->tmu[1].dTdX; - state->tmu1_w += params->tmu[1].dWdX; - state->w += params->dWdX; - } - else - { - state->ir -= params->dRdX; - state->ig -= params->dGdX; - state->ib -= params->dBdX; - state->ia -= params->dAdX; - state->z -= params->dZdX; - state->tmu0_s -= params->tmu[0].dSdX; - state->tmu0_t -= params->tmu[0].dTdX; - state->tmu0_w -= params->tmu[0].dWdX; - state->tmu1_s -= params->tmu[1].dSdX; - state->tmu1_t -= params->tmu[1].dTdX; - state->tmu1_w -= params->tmu[1].dWdX; - state->w -= params->dWdX; - } + if (state->xdir > 0) { + state->ir += params->dRdX; + state->ig += params->dGdX; + state->ib += params->dBdX; + state->ia += params->dAdX; + state->z += params->dZdX; + state->tmu0_s += params->tmu[0].dSdX; + state->tmu0_t += params->tmu[0].dTdX; + state->tmu0_w += params->tmu[0].dWdX; + state->tmu1_s += params->tmu[1].dSdX; + state->tmu1_t += params->tmu[1].dTdX; + state->tmu1_w += params->tmu[1].dWdX; + state->w += params->dWdX; + } else { + state->ir -= params->dRdX; + state->ig -= params->dGdX; + state->ib -= params->dBdX; + state->ia -= params->dAdX; + state->z -= params->dZdX; + state->tmu0_s -= params->tmu[0].dSdX; + state->tmu0_t -= params->tmu[0].dTdX; + state->tmu0_w -= params->tmu[0].dWdX; + state->tmu1_s -= params->tmu[1].dSdX; + state->tmu1_t -= params->tmu[1].dTdX; + state->tmu1_w -= params->tmu[1].dWdX; + state->w -= params->dWdX; + } - x += state->xdir; - } while (start_x != x2); + x += state->xdir; + } while (start_x != x2); - voodoo->pixel_count[odd_even] += state->pixel_count; - voodoo->texel_count[odd_even] += state->texel_count; - voodoo->fbiPixelsIn += state->pixel_count; + voodoo->pixel_count[odd_even] += state->pixel_count; + voodoo->texel_count[odd_even] += state->texel_count; + voodoo->fbiPixelsIn += state->pixel_count; - if (voodoo->params.draw_offset == voodoo->params.front_offset && (real_y >> 1) < 2048) - voodoo->dirty_line[real_y >> 1] = 1; + if (voodoo->params.draw_offset == voodoo->params.front_offset && (real_y >> 1) < 2048) + voodoo->dirty_line[real_y >> 1] = 1; next_line: - if (SLI_ENABLED) - { - state->base_r += params->dRdY; - state->base_g += params->dGdY; - state->base_b += params->dBdY; - state->base_a += params->dAdY; - state->base_z += params->dZdY; - state->tmu[0].base_s += params->tmu[0].dSdY; - state->tmu[0].base_t += params->tmu[0].dTdY; - state->tmu[0].base_w += params->tmu[0].dWdY; - state->tmu[1].base_s += params->tmu[1].dSdY; - state->tmu[1].base_t += params->tmu[1].dTdY; - state->tmu[1].base_w += params->tmu[1].dWdY; - state->base_w += params->dWdY; - state->xstart += state->dx1; - state->xend += state->dx2; - } - state->base_r += params->dRdY; - state->base_g += params->dGdY; - state->base_b += params->dBdY; - state->base_a += params->dAdY; - state->base_z += params->dZdY; - state->tmu[0].base_s += params->tmu[0].dSdY; - state->tmu[0].base_t += params->tmu[0].dTdY; - state->tmu[0].base_w += params->tmu[0].dWdY; - state->tmu[1].base_s += params->tmu[1].dSdY; - state->tmu[1].base_t += params->tmu[1].dTdY; - state->tmu[1].base_w += params->tmu[1].dWdY; - state->base_w += params->dWdY; - state->xstart += state->dx1; - state->xend += state->dx2; + if (SLI_ENABLED) { + state->base_r += params->dRdY; + state->base_g += params->dGdY; + state->base_b += params->dBdY; + state->base_a += params->dAdY; + state->base_z += params->dZdY; + state->tmu[0].base_s += params->tmu[0].dSdY; + state->tmu[0].base_t += params->tmu[0].dTdY; + state->tmu[0].base_w += params->tmu[0].dWdY; + state->tmu[1].base_s += params->tmu[1].dSdY; + state->tmu[1].base_t += params->tmu[1].dTdY; + state->tmu[1].base_w += params->tmu[1].dWdY; + state->base_w += params->dWdY; + state->xstart += state->dx1; + state->xend += state->dx2; } + state->base_r += params->dRdY; + state->base_g += params->dGdY; + state->base_b += params->dBdY; + state->base_a += params->dAdY; + state->base_z += params->dZdY; + state->tmu[0].base_s += params->tmu[0].dSdY; + state->tmu[0].base_t += params->tmu[0].dTdY; + state->tmu[0].base_w += params->tmu[0].dWdY; + state->tmu[1].base_s += params->tmu[1].dSdY; + state->tmu[1].base_t += params->tmu[1].dTdY; + state->tmu[1].base_w += params->tmu[1].dWdY; + state->base_w += params->dWdY; + state->xstart += state->dx1; + state->xend += state->dx2; + } - voodoo->texture_cache[0][params->tex_entry[0]].refcount_r[odd_even]++; - voodoo->texture_cache[1][params->tex_entry[1]].refcount_r[odd_even]++; + voodoo->texture_cache[0][params->tex_entry[0]].refcount_r[odd_even]++; + voodoo->texture_cache[1][params->tex_entry[1]].refcount_r[odd_even]++; } -void voodoo_triangle(voodoo_t *voodoo, voodoo_params_t *params, int odd_even) +void +voodoo_triangle(voodoo_t *voodoo, voodoo_params_t *params, int odd_even) { - voodoo_state_t state; - int vertexAy_adjusted; - int vertexCy_adjusted; - int dx, dy; + voodoo_state_t state; + int vertexAy_adjusted; + int vertexCy_adjusted; + int dx, dy; - uint64_t tempdx, tempdy; - uint64_t tempLOD; - int LOD; - int lodbias; + uint64_t tempdx, tempdy; + uint64_t tempLOD; + int LOD; + int lodbias; - voodoo->tri_count++; + voodoo->tri_count++; - dx = 8 - (params->vertexAx & 0xf); - if ((params->vertexAx & 0xf) > 8) - dx += 16; - dy = 8 - (params->vertexAy & 0xf); - if ((params->vertexAy & 0xf) > 8) - dy += 16; + dx = 8 - (params->vertexAx & 0xf); + if ((params->vertexAx & 0xf) > 8) + dx += 16; + dy = 8 - (params->vertexAy & 0xf); + if ((params->vertexAy & 0xf) > 8) + dy += 16; -/* voodoo_render_log("voodoo_triangle %i %i %i : vA %f, %f vB %f, %f vC %f, %f f %i,%i %08x %08x %08x,%08x tex=%i,%i fogMode=%08x\n", odd_even, voodoo->params_read_idx[odd_even], voodoo->params_read_idx[odd_even] & PARAM_MASK, (float)params->vertexAx / 16.0, (float)params->vertexAy / 16.0, - (float)params->vertexBx / 16.0, (float)params->vertexBy / 16.0, - (float)params->vertexCx / 16.0, (float)params->vertexCy / 16.0, - (params->fbzColorPath & FBZCP_TEXTURE_ENABLED) ? params->tformat[0] : 0, - (params->fbzColorPath & FBZCP_TEXTURE_ENABLED) ? params->tformat[1] : 0, params->fbzColorPath, params->alphaMode, params->textureMode[0],params->textureMode[1], params->tex_entry[0],params->tex_entry[1], params->fogMode);*/ + /* voodoo_render_log("voodoo_triangle %i %i %i : vA %f, %f vB %f, %f vC %f, %f f %i,%i %08x %08x %08x,%08x tex=%i,%i fogMode=%08x\n", odd_even, voodoo->params_read_idx[odd_even], voodoo->params_read_idx[odd_even] & PARAM_MASK, (float)params->vertexAx / 16.0, (float)params->vertexAy / 16.0, + (float)params->vertexBx / 16.0, (float)params->vertexBy / 16.0, + (float)params->vertexCx / 16.0, (float)params->vertexCy / 16.0, + (params->fbzColorPath & FBZCP_TEXTURE_ENABLED) ? params->tformat[0] : 0, + (params->fbzColorPath & FBZCP_TEXTURE_ENABLED) ? params->tformat[1] : 0, params->fbzColorPath, params->alphaMode, params->textureMode[0],params->textureMode[1], params->tex_entry[0],params->tex_entry[1], params->fogMode);*/ - state.base_r = params->startR; - state.base_g = params->startG; - state.base_b = params->startB; - state.base_a = params->startA; - state.base_z = params->startZ; - state.tmu[0].base_s = params->tmu[0].startS; - state.tmu[0].base_t = params->tmu[0].startT; - state.tmu[0].base_w = params->tmu[0].startW; - state.tmu[1].base_s = params->tmu[1].startS; - state.tmu[1].base_t = params->tmu[1].startT; - state.tmu[1].base_w = params->tmu[1].startW; - state.base_w = params->startW; + state.base_r = params->startR; + state.base_g = params->startG; + state.base_b = params->startB; + state.base_a = params->startA; + state.base_z = params->startZ; + state.tmu[0].base_s = params->tmu[0].startS; + state.tmu[0].base_t = params->tmu[0].startT; + state.tmu[0].base_w = params->tmu[0].startW; + state.tmu[1].base_s = params->tmu[1].startS; + state.tmu[1].base_t = params->tmu[1].startT; + state.tmu[1].base_w = params->tmu[1].startW; + state.base_w = params->startW; - if (params->fbzColorPath & FBZ_PARAM_ADJUST) - { - state.base_r += (dx*params->dRdX + dy*params->dRdY) >> 4; - state.base_g += (dx*params->dGdX + dy*params->dGdY) >> 4; - state.base_b += (dx*params->dBdX + dy*params->dBdY) >> 4; - state.base_a += (dx*params->dAdX + dy*params->dAdY) >> 4; - state.base_z += (dx*params->dZdX + dy*params->dZdY) >> 4; - state.tmu[0].base_s += (dx*params->tmu[0].dSdX + dy*params->tmu[0].dSdY) >> 4; - state.tmu[0].base_t += (dx*params->tmu[0].dTdX + dy*params->tmu[0].dTdY) >> 4; - state.tmu[0].base_w += (dx*params->tmu[0].dWdX + dy*params->tmu[0].dWdY) >> 4; - state.tmu[1].base_s += (dx*params->tmu[1].dSdX + dy*params->tmu[1].dSdY) >> 4; - state.tmu[1].base_t += (dx*params->tmu[1].dTdX + dy*params->tmu[1].dTdY) >> 4; - state.tmu[1].base_w += (dx*params->tmu[1].dWdX + dy*params->tmu[1].dWdY) >> 4; - state.base_w += (dx*params->dWdX + dy*params->dWdY) >> 4; - } + if (params->fbzColorPath & FBZ_PARAM_ADJUST) { + state.base_r += (dx * params->dRdX + dy * params->dRdY) >> 4; + state.base_g += (dx * params->dGdX + dy * params->dGdY) >> 4; + state.base_b += (dx * params->dBdX + dy * params->dBdY) >> 4; + state.base_a += (dx * params->dAdX + dy * params->dAdY) >> 4; + state.base_z += (dx * params->dZdX + dy * params->dZdY) >> 4; + state.tmu[0].base_s += (dx * params->tmu[0].dSdX + dy * params->tmu[0].dSdY) >> 4; + state.tmu[0].base_t += (dx * params->tmu[0].dTdX + dy * params->tmu[0].dTdY) >> 4; + state.tmu[0].base_w += (dx * params->tmu[0].dWdX + dy * params->tmu[0].dWdY) >> 4; + state.tmu[1].base_s += (dx * params->tmu[1].dSdX + dy * params->tmu[1].dSdY) >> 4; + state.tmu[1].base_t += (dx * params->tmu[1].dTdX + dy * params->tmu[1].dTdY) >> 4; + state.tmu[1].base_w += (dx * params->tmu[1].dWdX + dy * params->tmu[1].dWdY) >> 4; + state.base_w += (dx * params->dWdX + dy * params->dWdY) >> 4; + } - tris++; + tris++; - state.vertexAy = params->vertexAy & ~0xffff0000; - if (state.vertexAy & 0x8000) - state.vertexAy |= 0xffff0000; - state.vertexBy = params->vertexBy & ~0xffff0000; - if (state.vertexBy & 0x8000) - state.vertexBy |= 0xffff0000; - state.vertexCy = params->vertexCy & ~0xffff0000; - if (state.vertexCy & 0x8000) - state.vertexCy |= 0xffff0000; + state.vertexAy = params->vertexAy & ~0xffff0000; + if (state.vertexAy & 0x8000) + state.vertexAy |= 0xffff0000; + state.vertexBy = params->vertexBy & ~0xffff0000; + if (state.vertexBy & 0x8000) + state.vertexBy |= 0xffff0000; + state.vertexCy = params->vertexCy & ~0xffff0000; + if (state.vertexCy & 0x8000) + state.vertexCy |= 0xffff0000; - state.vertexAx = params->vertexAx & ~0xffff0000; - if (state.vertexAx & 0x8000) - state.vertexAx |= 0xffff0000; - state.vertexBx = params->vertexBx & ~0xffff0000; - if (state.vertexBx & 0x8000) - state.vertexBx |= 0xffff0000; - state.vertexCx = params->vertexCx & ~0xffff0000; - if (state.vertexCx & 0x8000) - state.vertexCx |= 0xffff0000; + state.vertexAx = params->vertexAx & ~0xffff0000; + if (state.vertexAx & 0x8000) + state.vertexAx |= 0xffff0000; + state.vertexBx = params->vertexBx & ~0xffff0000; + if (state.vertexBx & 0x8000) + state.vertexBx |= 0xffff0000; + state.vertexCx = params->vertexCx & ~0xffff0000; + if (state.vertexCx & 0x8000) + state.vertexCx |= 0xffff0000; - vertexAy_adjusted = (state.vertexAy+7) >> 4; - vertexCy_adjusted = (state.vertexCy+7) >> 4; + vertexAy_adjusted = (state.vertexAy + 7) >> 4; + vertexCy_adjusted = (state.vertexCy + 7) >> 4; - if (state.vertexBy - state.vertexAy) - state.dxAB = (int)((((int64_t)state.vertexBx << 12) - ((int64_t)state.vertexAx << 12)) << 4) / (int)(state.vertexBy - state.vertexAy); - else - state.dxAB = 0; - if (state.vertexCy - state.vertexAy) - state.dxAC = (int)((((int64_t)state.vertexCx << 12) - ((int64_t)state.vertexAx << 12)) << 4) / (int)(state.vertexCy - state.vertexAy); - else - state.dxAC = 0; - if (state.vertexCy - state.vertexBy) - state.dxBC = (int)((((int64_t)state.vertexCx << 12) - ((int64_t)state.vertexBx << 12)) << 4) / (int)(state.vertexCy - state.vertexBy); - else - state.dxBC = 0; + if (state.vertexBy - state.vertexAy) + state.dxAB = (int) ((((int64_t) state.vertexBx << 12) - ((int64_t) state.vertexAx << 12)) << 4) / (int) (state.vertexBy - state.vertexAy); + else + state.dxAB = 0; + if (state.vertexCy - state.vertexAy) + state.dxAC = (int) ((((int64_t) state.vertexCx << 12) - ((int64_t) state.vertexAx << 12)) << 4) / (int) (state.vertexCy - state.vertexAy); + else + state.dxAC = 0; + if (state.vertexCy - state.vertexBy) + state.dxBC = (int) ((((int64_t) state.vertexCx << 12) - ((int64_t) state.vertexBx << 12)) << 4) / (int) (state.vertexCy - state.vertexBy); + else + state.dxBC = 0; - state.lod_min[0] = (params->tLOD[0] & 0x3f) << 6; - state.lod_max[0] = ((params->tLOD[0] >> 6) & 0x3f) << 6; - if (state.lod_max[0] > 0x800) - state.lod_max[0] = 0x800; - state.lod_min[1] = (params->tLOD[1] & 0x3f) << 6; - state.lod_max[1] = ((params->tLOD[1] >> 6) & 0x3f) << 6; - if (state.lod_max[1] > 0x800) - state.lod_max[1] = 0x800; + state.lod_min[0] = (params->tLOD[0] & 0x3f) << 6; + state.lod_max[0] = ((params->tLOD[0] >> 6) & 0x3f) << 6; + if (state.lod_max[0] > 0x800) + state.lod_max[0] = 0x800; + state.lod_min[1] = (params->tLOD[1] & 0x3f) << 6; + state.lod_max[1] = ((params->tLOD[1] >> 6) & 0x3f) << 6; + if (state.lod_max[1] > 0x800) + state.lod_max[1] = 0x800; - state.xstart = state.xend = state.vertexAx << 8; - state.xdir = params->sign ? -1 : 1; + state.xstart = state.xend = state.vertexAx << 8; + state.xdir = params->sign ? -1 : 1; - state.y = (state.vertexAy + 8) >> 4; - state.ydir = 1; + state.y = (state.vertexAy + 8) >> 4; + state.ydir = 1; + tempdx = (params->tmu[0].dSdX >> 14) * (params->tmu[0].dSdX >> 14) + (params->tmu[0].dTdX >> 14) * (params->tmu[0].dTdX >> 14); + tempdy = (params->tmu[0].dSdY >> 14) * (params->tmu[0].dSdY >> 14) + (params->tmu[0].dTdY >> 14) * (params->tmu[0].dTdY >> 14); - tempdx = (params->tmu[0].dSdX >> 14) * (params->tmu[0].dSdX >> 14) + (params->tmu[0].dTdX >> 14) * (params->tmu[0].dTdX >> 14); - tempdy = (params->tmu[0].dSdY >> 14) * (params->tmu[0].dSdY >> 14) + (params->tmu[0].dTdY >> 14) * (params->tmu[0].dTdY >> 14); + if (tempdx > tempdy) + tempLOD = tempdx; + else + tempLOD = tempdy; - if (tempdx > tempdy) - tempLOD = tempdx; - else - tempLOD = tempdy; + LOD = (int) (log2((double) tempLOD / (double) (1ULL << 36)) * 256); + LOD >>= 2; - LOD = (int)(log2((double)tempLOD / (double)(1ULL << 36)) * 256); - LOD >>= 2; + lodbias = (params->tLOD[0] >> 12) & 0x3f; + if (lodbias & 0x20) + lodbias |= ~0x3f; + state.tmu[0].lod = LOD + (lodbias << 6); - lodbias = (params->tLOD[0] >> 12) & 0x3f; - if (lodbias & 0x20) - lodbias |= ~0x3f; - state.tmu[0].lod = LOD + (lodbias << 6); + tempdx = (params->tmu[1].dSdX >> 14) * (params->tmu[1].dSdX >> 14) + (params->tmu[1].dTdX >> 14) * (params->tmu[1].dTdX >> 14); + tempdy = (params->tmu[1].dSdY >> 14) * (params->tmu[1].dSdY >> 14) + (params->tmu[1].dTdY >> 14) * (params->tmu[1].dTdY >> 14); + if (tempdx > tempdy) + tempLOD = tempdx; + else + tempLOD = tempdy; - tempdx = (params->tmu[1].dSdX >> 14) * (params->tmu[1].dSdX >> 14) + (params->tmu[1].dTdX >> 14) * (params->tmu[1].dTdX >> 14); - tempdy = (params->tmu[1].dSdY >> 14) * (params->tmu[1].dSdY >> 14) + (params->tmu[1].dTdY >> 14) * (params->tmu[1].dTdY >> 14); + LOD = (int) (log2((double) tempLOD / (double) (1ULL << 36)) * 256); + LOD >>= 2; - if (tempdx > tempdy) - tempLOD = tempdx; - else - tempLOD = tempdy; + lodbias = (params->tLOD[1] >> 12) & 0x3f; + if (lodbias & 0x20) + lodbias |= ~0x3f; + state.tmu[1].lod = LOD + (lodbias << 6); - LOD = (int)(log2((double)tempLOD / (double)(1ULL << 36)) * 256); - LOD >>= 2; - - lodbias = (params->tLOD[1] >> 12) & 0x3f; - if (lodbias & 0x20) - lodbias |= ~0x3f; - state.tmu[1].lod = LOD + (lodbias << 6); - - - voodoo_half_triangle(voodoo, params, &state, vertexAy_adjusted, vertexCy_adjusted, odd_even); + voodoo_half_triangle(voodoo, params, &state, vertexAy_adjusted, vertexCy_adjusted, odd_even); } - -static void render_thread(void *param, int odd_even) +static void +render_thread(void *param, int odd_even) { - voodoo_t *voodoo = (voodoo_t *)param; + voodoo_t *voodoo = (voodoo_t *) param; - while (voodoo->render_thread_run[odd_even]) - { + while (voodoo->render_thread_run[odd_even]) { + thread_set_event(voodoo->render_not_full_event[odd_even]); + thread_wait_event(voodoo->wake_render_thread[odd_even], -1); + thread_reset_event(voodoo->wake_render_thread[odd_even]); + voodoo->render_voodoo_busy[odd_even] = 1; + + while (!PARAM_EMPTY(odd_even)) { + uint64_t start_time = plat_timer_read(); + uint64_t end_time; + voodoo_params_t *params = &voodoo->params_buffer[voodoo->params_read_idx[odd_even] & PARAM_MASK]; + + voodoo_triangle(voodoo, params, odd_even); + + voodoo->params_read_idx[odd_even]++; + + if (PARAM_ENTRIES(odd_even) > (PARAM_SIZE - 10)) thread_set_event(voodoo->render_not_full_event[odd_even]); - thread_wait_event(voodoo->wake_render_thread[odd_even], -1); - thread_reset_event(voodoo->wake_render_thread[odd_even]); - voodoo->render_voodoo_busy[odd_even] = 1; - while (!PARAM_EMPTY(odd_even)) - { - uint64_t start_time = plat_timer_read(); - uint64_t end_time; - voodoo_params_t *params = &voodoo->params_buffer[voodoo->params_read_idx[odd_even] & PARAM_MASK]; - - voodoo_triangle(voodoo, params, odd_even); - - voodoo->params_read_idx[odd_even]++; - - if (PARAM_ENTRIES(odd_even) > (PARAM_SIZE - 10)) - thread_set_event(voodoo->render_not_full_event[odd_even]); - - end_time = plat_timer_read(); - voodoo->render_time[odd_even] += end_time - start_time; - } - - voodoo->render_voodoo_busy[odd_even] = 0; - } -} - -void voodoo_render_thread_1(void *param) -{ - render_thread(param, 0); -} -void voodoo_render_thread_2(void *param) -{ - render_thread(param, 1); -} -void voodoo_render_thread_3(void *param) -{ - render_thread(param, 2); -} -void voodoo_render_thread_4(void *param) -{ - render_thread(param, 3); -} - -void voodoo_queue_triangle(voodoo_t *voodoo, voodoo_params_t *params) -{ - voodoo_params_t *params_new = &voodoo->params_buffer[voodoo->params_write_idx & PARAM_MASK]; - - while (PARAM_FULL(0) || (voodoo->render_threads >= 2 && PARAM_FULL(1)) || - (voodoo->render_threads == 4 && (PARAM_FULL(2) || PARAM_FULL(3)))) - { - thread_reset_event(voodoo->render_not_full_event[0]); - if (voodoo->render_threads >= 2) - thread_reset_event(voodoo->render_not_full_event[1]); - if (voodoo->render_threads == 4) - { - thread_reset_event(voodoo->render_not_full_event[2]); - thread_reset_event(voodoo->render_not_full_event[3]); - } - if (PARAM_FULL(0)) - thread_wait_event(voodoo->render_not_full_event[0], -1); /*Wait for room in ringbuffer*/ - if (voodoo->render_threads >= 2 && PARAM_FULL(1)) - thread_wait_event(voodoo->render_not_full_event[1], -1); /*Wait for room in ringbuffer*/ - if (voodoo->render_threads == 4 && PARAM_FULL(2)) - thread_wait_event(voodoo->render_not_full_event[2], -1); /*Wait for room in ringbuffer*/ - if (voodoo->render_threads == 4 && PARAM_FULL(3)) - thread_wait_event(voodoo->render_not_full_event[3], -1); /*Wait for room in ringbuffer*/ + end_time = plat_timer_read(); + voodoo->render_time[odd_even] += end_time - start_time; } - voodoo_use_texture(voodoo, params, 0); - if (voodoo->dual_tmus) - voodoo_use_texture(voodoo, params, 1); - - memcpy(params_new, params, sizeof(voodoo_params_t)); - - voodoo->params_write_idx++; - - if (PARAM_ENTRIES(0) < 4 || (voodoo->render_threads >= 2 && PARAM_ENTRIES(1) < 4) || - (voodoo->render_threads == 4 && (PARAM_ENTRIES(2) < 4 || PARAM_ENTRIES(3) < 4))) - voodoo_wake_render_thread(voodoo); + voodoo->render_voodoo_busy[odd_even] = 0; + } +} + +void +voodoo_render_thread_1(void *param) +{ + render_thread(param, 0); +} +void +voodoo_render_thread_2(void *param) +{ + render_thread(param, 1); +} +void +voodoo_render_thread_3(void *param) +{ + render_thread(param, 2); +} +void +voodoo_render_thread_4(void *param) +{ + render_thread(param, 3); +} + +void +voodoo_queue_triangle(voodoo_t *voodoo, voodoo_params_t *params) +{ + voodoo_params_t *params_new = &voodoo->params_buffer[voodoo->params_write_idx & PARAM_MASK]; + + while (PARAM_FULL(0) || (voodoo->render_threads >= 2 && PARAM_FULL(1)) || (voodoo->render_threads == 4 && (PARAM_FULL(2) || PARAM_FULL(3)))) { + thread_reset_event(voodoo->render_not_full_event[0]); + if (voodoo->render_threads >= 2) + thread_reset_event(voodoo->render_not_full_event[1]); + if (voodoo->render_threads == 4) { + thread_reset_event(voodoo->render_not_full_event[2]); + thread_reset_event(voodoo->render_not_full_event[3]); + } + if (PARAM_FULL(0)) + thread_wait_event(voodoo->render_not_full_event[0], -1); /*Wait for room in ringbuffer*/ + if (voodoo->render_threads >= 2 && PARAM_FULL(1)) + thread_wait_event(voodoo->render_not_full_event[1], -1); /*Wait for room in ringbuffer*/ + if (voodoo->render_threads == 4 && PARAM_FULL(2)) + thread_wait_event(voodoo->render_not_full_event[2], -1); /*Wait for room in ringbuffer*/ + if (voodoo->render_threads == 4 && PARAM_FULL(3)) + thread_wait_event(voodoo->render_not_full_event[3], -1); /*Wait for room in ringbuffer*/ + } + + voodoo_use_texture(voodoo, params, 0); + if (voodoo->dual_tmus) + voodoo_use_texture(voodoo, params, 1); + + memcpy(params_new, params, sizeof(voodoo_params_t)); + + voodoo->params_write_idx++; + + if (PARAM_ENTRIES(0) < 4 || (voodoo->render_threads >= 2 && PARAM_ENTRIES(1) < 4) || (voodoo->render_threads == 4 && (PARAM_ENTRIES(2) < 4 || PARAM_ENTRIES(3) < 4))) + voodoo_wake_render_thread(voodoo); } diff --git a/src/video/vid_voodoo_setup.c b/src/video/vid_voodoo_setup.c index 92a984c87..0da5449bf 100644 --- a/src/video/vid_voodoo_setup.c +++ b/src/video/vid_voodoo_setup.c @@ -46,216 +46,190 @@ voodoo_setup_log(const char *fmt, ...) va_list ap; if (voodoo_setup_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define voodoo_setup_log(fmt, ...) +# define voodoo_setup_log(fmt, ...) #endif - -void voodoo_triangle_setup(voodoo_t *voodoo) +void +voodoo_triangle_setup(voodoo_t *voodoo) { - float dxAB, dxBC, dyAB, dyBC; - float area; - int va = 0, vb = 1, vc = 2; - vert_t verts[3]; + float dxAB, dxBC, dyAB, dyBC; + float area; + int va = 0, vb = 1, vc = 2; + vert_t verts[3]; - verts[0] = voodoo->verts[0]; - verts[1] = voodoo->verts[1]; - verts[2] = voodoo->verts[2]; + verts[0] = voodoo->verts[0]; + verts[1] = voodoo->verts[1]; + verts[2] = voodoo->verts[2]; - if (verts[0].sVy < verts[1].sVy) - { - if (verts[1].sVy < verts[2].sVy) - { - /* V1>V0, V2>V1, V2>V1>V0*/ - va = 0; /*OK*/ - vb = 1; - vc = 2; - } - else - { - /* V1>V0, V1>V2*/ - if (verts[0].sVy < verts[2].sVy) - { - /* V1>V0, V1>V2, V2>V0, V1>V2>V0*/ - va = 0; - vb = 2; - vc = 1; - } - else - { - /* V1>V0, V1>V2, V0>V2, V1>V0>V2*/ - va = 2; - vb = 0; - vc = 1; - } - } + if (verts[0].sVy < verts[1].sVy) { + if (verts[1].sVy < verts[2].sVy) { + /* V1>V0, V2>V1, V2>V1>V0*/ + va = 0; /*OK*/ + vb = 1; + vc = 2; + } else { + /* V1>V0, V1>V2*/ + if (verts[0].sVy < verts[2].sVy) { + /* V1>V0, V1>V2, V2>V0, V1>V2>V0*/ + va = 0; + vb = 2; + vc = 1; + } else { + /* V1>V0, V1>V2, V0>V2, V1>V0>V2*/ + va = 2; + vb = 0; + vc = 1; + } } - else - { - if (verts[1].sVy < verts[2].sVy) - { - /* V0>V1, V2>V1*/ - if (verts[0].sVy < verts[2].sVy) - { - /* V0>V1, V2>V1, V2>V0, V2>V0>V1*/ - va = 1; - vb = 0; - vc = 2; - } - else - { - /* V0>V1, V2>V1, V0>V2, V0>V2>V1*/ - va = 1; - vb = 2; - vc = 0; - } - } - else - { - /*V0>V1>V2*/ - va = 2; - vb = 1; - vc = 0; - } + } else { + if (verts[1].sVy < verts[2].sVy) { + /* V0>V1, V2>V1*/ + if (verts[0].sVy < verts[2].sVy) { + /* V0>V1, V2>V1, V2>V0, V2>V0>V1*/ + va = 1; + vb = 0; + vc = 2; + } else { + /* V0>V1, V2>V1, V0>V2, V0>V2>V1*/ + va = 1; + vb = 2; + vc = 0; + } + } else { + /*V0>V1>V2*/ + va = 2; + vb = 1; + vc = 0; } + } - dxAB = verts[0].sVx - verts[1].sVx; - dxBC = verts[1].sVx - verts[2].sVx; - dyAB = verts[0].sVy - verts[1].sVy; - dyBC = verts[1].sVy - verts[2].sVy; + dxAB = verts[0].sVx - verts[1].sVx; + dxBC = verts[1].sVx - verts[2].sVx; + dyAB = verts[0].sVy - verts[1].sVy; + dyBC = verts[1].sVy - verts[2].sVy; - area = dxAB * dyBC - dxBC * dyAB; + area = dxAB * dyBC - dxBC * dyAB; - if (area == 0.0) - return; + if (area == 0.0) + return; - if (voodoo->sSetupMode & SETUPMODE_CULLING_ENABLE) - { - int cull_sign = voodoo->sSetupMode & SETUPMODE_CULLING_SIGN; - int sign = (area < 0.0); + if (voodoo->sSetupMode & SETUPMODE_CULLING_ENABLE) { + int cull_sign = voodoo->sSetupMode & SETUPMODE_CULLING_SIGN; + int sign = (area < 0.0); - if ((voodoo->sSetupMode & (SETUPMODE_CULLING_ENABLE | SETUPMODE_DISABLE_PINGPONG)) - == SETUPMODE_CULLING_ENABLE && voodoo->cull_pingpong) - cull_sign = !cull_sign; + if ((voodoo->sSetupMode & (SETUPMODE_CULLING_ENABLE | SETUPMODE_DISABLE_PINGPONG)) + == SETUPMODE_CULLING_ENABLE + && voodoo->cull_pingpong) + cull_sign = !cull_sign; - if (cull_sign && sign) - return; - if (!cull_sign && !sign) - return; - } + if (cull_sign && sign) + return; + if (!cull_sign && !sign) + return; + } + dxAB = verts[va].sVx - verts[vb].sVx; + dxBC = verts[vb].sVx - verts[vc].sVx; + dyAB = verts[va].sVy - verts[vb].sVy; + dyBC = verts[vb].sVy - verts[vc].sVy; - dxAB = verts[va].sVx - verts[vb].sVx; - dxBC = verts[vb].sVx - verts[vc].sVx; - dyAB = verts[va].sVy - verts[vb].sVy; - dyBC = verts[vb].sVy - verts[vc].sVy; + area = dxAB * dyBC - dxBC * dyAB; - area = dxAB * dyBC - dxBC * dyAB; + dxAB /= area; + dxBC /= area; + dyAB /= area; + dyBC /= area; - dxAB /= area; - dxBC /= area; - dyAB /= area; - dyBC /= area; + voodoo->params.vertexAx = (int32_t) (int16_t) ((int32_t) (verts[va].sVx * 16.0f) & 0xffff); + voodoo->params.vertexAy = (int32_t) (int16_t) ((int32_t) (verts[va].sVy * 16.0f) & 0xffff); + voodoo->params.vertexBx = (int32_t) (int16_t) ((int32_t) (verts[vb].sVx * 16.0f) & 0xffff); + voodoo->params.vertexBy = (int32_t) (int16_t) ((int32_t) (verts[vb].sVy * 16.0f) & 0xffff); + voodoo->params.vertexCx = (int32_t) (int16_t) ((int32_t) (verts[vc].sVx * 16.0f) & 0xffff); + voodoo->params.vertexCy = (int32_t) (int16_t) ((int32_t) (verts[vc].sVy * 16.0f) & 0xffff); + if (voodoo->params.vertexAy > voodoo->params.vertexBy || voodoo->params.vertexBy > voodoo->params.vertexCy) { + voodoo_setup_log("triangle_setup wrong order %d %d %d\n", voodoo->params.vertexAy, voodoo->params.vertexBy, voodoo->params.vertexCy); + return; + } + if (voodoo->sSetupMode & SETUPMODE_RGB) { + voodoo->params.startR = (int32_t) (verts[va].sRed * 4096.0f); + voodoo->params.dRdX = (int32_t) (((verts[va].sRed - verts[vb].sRed) * dyBC - (verts[vb].sRed - verts[vc].sRed) * dyAB) * 4096.0f); + voodoo->params.dRdY = (int32_t) (((verts[vb].sRed - verts[vc].sRed) * dxAB - (verts[va].sRed - verts[vb].sRed) * dxBC) * 4096.0f); + voodoo->params.startG = (int32_t) (verts[va].sGreen * 4096.0f); + voodoo->params.dGdX = (int32_t) (((verts[va].sGreen - verts[vb].sGreen) * dyBC - (verts[vb].sGreen - verts[vc].sGreen) * dyAB) * 4096.0f); + voodoo->params.dGdY = (int32_t) (((verts[vb].sGreen - verts[vc].sGreen) * dxAB - (verts[va].sGreen - verts[vb].sGreen) * dxBC) * 4096.0f); + voodoo->params.startB = (int32_t) (verts[va].sBlue * 4096.0f); + voodoo->params.dBdX = (int32_t) (((verts[va].sBlue - verts[vb].sBlue) * dyBC - (verts[vb].sBlue - verts[vc].sBlue) * dyAB) * 4096.0f); + voodoo->params.dBdY = (int32_t) (((verts[vb].sBlue - verts[vc].sBlue) * dxAB - (verts[va].sBlue - verts[vb].sBlue) * dxBC) * 4096.0f); + } + if (voodoo->sSetupMode & SETUPMODE_ALPHA) { + voodoo->params.startA = (int32_t) (verts[va].sAlpha * 4096.0f); + voodoo->params.dAdX = (int32_t) (((verts[va].sAlpha - verts[vb].sAlpha) * dyBC - (verts[vb].sAlpha - verts[vc].sAlpha) * dyAB) * 4096.0f); + voodoo->params.dAdY = (int32_t) (((verts[vb].sAlpha - verts[vc].sAlpha) * dxAB - (verts[va].sAlpha - verts[vb].sAlpha) * dxBC) * 4096.0f); + } + if (voodoo->sSetupMode & SETUPMODE_Z) { + voodoo->params.startZ = (int32_t) (verts[va].sVz * 4096.0f); + voodoo->params.dZdX = (int32_t) (((verts[va].sVz - verts[vb].sVz) * dyBC - (verts[vb].sVz - verts[vc].sVz) * dyAB) * 4096.0f); + voodoo->params.dZdY = (int32_t) (((verts[vb].sVz - verts[vc].sVz) * dxAB - (verts[va].sVz - verts[vb].sVz) * dxBC) * 4096.0f); + } + if (voodoo->sSetupMode & SETUPMODE_Wb) { + voodoo->params.startW = (int64_t) (verts[va].sWb * 4294967296.0f); + voodoo->params.dWdX = (int64_t) (((verts[va].sWb - verts[vb].sWb) * dyBC - (verts[vb].sWb - verts[vc].sWb) * dyAB) * 4294967296.0f); + voodoo->params.dWdY = (int64_t) (((verts[vb].sWb - verts[vc].sWb) * dxAB - (verts[va].sWb - verts[vb].sWb) * dxBC) * 4294967296.0f); + voodoo->params.tmu[0].startW = voodoo->params.tmu[1].startW = voodoo->params.startW; + voodoo->params.tmu[0].dWdX = voodoo->params.tmu[1].dWdX = voodoo->params.dWdX; + voodoo->params.tmu[0].dWdY = voodoo->params.tmu[1].dWdY = voodoo->params.dWdY; + } + if (voodoo->sSetupMode & SETUPMODE_W0) { + voodoo->params.tmu[0].startW = (int64_t) (verts[va].sW0 * 4294967296.0f); + voodoo->params.tmu[0].dWdX = (int64_t) (((verts[va].sW0 - verts[vb].sW0) * dyBC - (verts[vb].sW0 - verts[vc].sW0) * dyAB) * 4294967296.0f); + voodoo->params.tmu[0].dWdY = (int64_t) (((verts[vb].sW0 - verts[vc].sW0) * dxAB - (verts[va].sW0 - verts[vb].sW0) * dxBC) * 4294967296.0f); + voodoo->params.tmu[1].startW = voodoo->params.tmu[0].startW; + voodoo->params.tmu[1].dWdX = voodoo->params.tmu[0].dWdX; + voodoo->params.tmu[1].dWdY = voodoo->params.tmu[0].dWdY; + } + if (voodoo->sSetupMode & SETUPMODE_S0_T0) { + voodoo->params.tmu[0].startS = (int64_t) (verts[va].sS0 * 4294967296.0f); + voodoo->params.tmu[0].dSdX = (int64_t) (((verts[va].sS0 - verts[vb].sS0) * dyBC - (verts[vb].sS0 - verts[vc].sS0) * dyAB) * 4294967296.0f); + voodoo->params.tmu[0].dSdY = (int64_t) (((verts[vb].sS0 - verts[vc].sS0) * dxAB - (verts[va].sS0 - verts[vb].sS0) * dxBC) * 4294967296.0f); + voodoo->params.tmu[0].startT = (int64_t) (verts[va].sT0 * 4294967296.0f); + voodoo->params.tmu[0].dTdX = (int64_t) (((verts[va].sT0 - verts[vb].sT0) * dyBC - (verts[vb].sT0 - verts[vc].sT0) * dyAB) * 4294967296.0f); + voodoo->params.tmu[0].dTdY = (int64_t) (((verts[vb].sT0 - verts[vc].sT0) * dxAB - (verts[va].sT0 - verts[vb].sT0) * dxBC) * 4294967296.0f); + voodoo->params.tmu[1].startS = voodoo->params.tmu[0].startS; + voodoo->params.tmu[1].dSdX = voodoo->params.tmu[0].dSdX; + voodoo->params.tmu[1].dSdY = voodoo->params.tmu[0].dSdY; + voodoo->params.tmu[1].startT = voodoo->params.tmu[0].startT; + voodoo->params.tmu[1].dTdX = voodoo->params.tmu[0].dTdX; + voodoo->params.tmu[1].dTdY = voodoo->params.tmu[0].dTdY; + } + if (voodoo->sSetupMode & SETUPMODE_W1) { + voodoo->params.tmu[1].startW = (int64_t) (verts[va].sW1 * 4294967296.0f); + voodoo->params.tmu[1].dWdX = (int64_t) (((verts[va].sW1 - verts[vb].sW1) * dyBC - (verts[vb].sW1 - verts[vc].sW1) * dyAB) * 4294967296.0f); + voodoo->params.tmu[1].dWdY = (int64_t) (((verts[vb].sW1 - verts[vc].sW1) * dxAB - (verts[va].sW1 - verts[vb].sW1) * dxBC) * 4294967296.0f); + } + if (voodoo->sSetupMode & SETUPMODE_S1_T1) { + voodoo->params.tmu[1].startS = (int64_t) (verts[va].sS1 * 4294967296.0f); + voodoo->params.tmu[1].dSdX = (int64_t) (((verts[va].sS1 - verts[vb].sS1) * dyBC - (verts[vb].sS1 - verts[vc].sS1) * dyAB) * 4294967296.0f); + voodoo->params.tmu[1].dSdY = (int64_t) (((verts[vb].sS1 - verts[vc].sS1) * dxAB - (verts[va].sS1 - verts[vb].sS1) * dxBC) * 4294967296.0f); + voodoo->params.tmu[1].startT = (int64_t) (verts[va].sT1 * 4294967296.0f); + voodoo->params.tmu[1].dTdX = (int64_t) (((verts[va].sT1 - verts[vb].sT1) * dyBC - (verts[vb].sT1 - verts[vc].sT1) * dyAB) * 4294967296.0f); + voodoo->params.tmu[1].dTdY = (int64_t) (((verts[vb].sT1 - verts[vc].sT1) * dxAB - (verts[va].sT1 - verts[vb].sT1) * dxBC) * 4294967296.0f); + } - voodoo->params.vertexAx = (int32_t)(int16_t)((int32_t)(verts[va].sVx * 16.0f) & 0xffff); - voodoo->params.vertexAy = (int32_t)(int16_t)((int32_t)(verts[va].sVy * 16.0f) & 0xffff); - voodoo->params.vertexBx = (int32_t)(int16_t)((int32_t)(verts[vb].sVx * 16.0f) & 0xffff); - voodoo->params.vertexBy = (int32_t)(int16_t)((int32_t)(verts[vb].sVy * 16.0f) & 0xffff); - voodoo->params.vertexCx = (int32_t)(int16_t)((int32_t)(verts[vc].sVx * 16.0f) & 0xffff); - voodoo->params.vertexCy = (int32_t)(int16_t)((int32_t)(verts[vc].sVy * 16.0f) & 0xffff); + voodoo->params.sign = (area < 0.0); - if (voodoo->params.vertexAy > voodoo->params.vertexBy || voodoo->params.vertexBy > voodoo->params.vertexCy) { - voodoo_setup_log("triangle_setup wrong order %d %d %d\n", voodoo->params.vertexAy, voodoo->params.vertexBy, voodoo->params.vertexCy); - return; - } + if (voodoo->ncc_dirty[0]) + voodoo_update_ncc(voodoo, 0); + if (voodoo->ncc_dirty[1]) + voodoo_update_ncc(voodoo, 1); + voodoo->ncc_dirty[0] = voodoo->ncc_dirty[1] = 0; - if (voodoo->sSetupMode & SETUPMODE_RGB) - { - voodoo->params.startR = (int32_t)(verts[va].sRed * 4096.0f); - voodoo->params.dRdX = (int32_t)(((verts[va].sRed - verts[vb].sRed) * dyBC - (verts[vb].sRed - verts[vc].sRed) * dyAB) * 4096.0f); - voodoo->params.dRdY = (int32_t)(((verts[vb].sRed - verts[vc].sRed) * dxAB - (verts[va].sRed - verts[vb].sRed) * dxBC) * 4096.0f); - voodoo->params.startG = (int32_t)(verts[va].sGreen * 4096.0f); - voodoo->params.dGdX = (int32_t)(((verts[va].sGreen - verts[vb].sGreen) * dyBC - (verts[vb].sGreen - verts[vc].sGreen) * dyAB) * 4096.0f); - voodoo->params.dGdY = (int32_t)(((verts[vb].sGreen - verts[vc].sGreen) * dxAB - (verts[va].sGreen - verts[vb].sGreen) * dxBC) * 4096.0f); - voodoo->params.startB = (int32_t)(verts[va].sBlue * 4096.0f); - voodoo->params.dBdX = (int32_t)(((verts[va].sBlue - verts[vb].sBlue) * dyBC - (verts[vb].sBlue - verts[vc].sBlue) * dyAB) * 4096.0f); - voodoo->params.dBdY = (int32_t)(((verts[vb].sBlue - verts[vc].sBlue) * dxAB - (verts[va].sBlue - verts[vb].sBlue) * dxBC) * 4096.0f); - } - if (voodoo->sSetupMode & SETUPMODE_ALPHA) - { - voodoo->params.startA = (int32_t)(verts[va].sAlpha * 4096.0f); - voodoo->params.dAdX = (int32_t)(((verts[va].sAlpha - verts[vb].sAlpha) * dyBC - (verts[vb].sAlpha - verts[vc].sAlpha) * dyAB) * 4096.0f); - voodoo->params.dAdY = (int32_t)(((verts[vb].sAlpha - verts[vc].sAlpha) * dxAB - (verts[va].sAlpha - verts[vb].sAlpha) * dxBC) * 4096.0f); - } - if (voodoo->sSetupMode & SETUPMODE_Z) - { - voodoo->params.startZ = (int32_t)(verts[va].sVz * 4096.0f); - voodoo->params.dZdX = (int32_t)(((verts[va].sVz - verts[vb].sVz) * dyBC - (verts[vb].sVz - verts[vc].sVz) * dyAB) * 4096.0f); - voodoo->params.dZdY = (int32_t)(((verts[vb].sVz - verts[vc].sVz) * dxAB - (verts[va].sVz - verts[vb].sVz) * dxBC) * 4096.0f); - } - if (voodoo->sSetupMode & SETUPMODE_Wb) - { - voodoo->params.startW = (int64_t)(verts[va].sWb * 4294967296.0f); - voodoo->params.dWdX = (int64_t)(((verts[va].sWb - verts[vb].sWb) * dyBC - (verts[vb].sWb - verts[vc].sWb) * dyAB) * 4294967296.0f); - voodoo->params.dWdY = (int64_t)(((verts[vb].sWb - verts[vc].sWb) * dxAB - (verts[va].sWb - verts[vb].sWb) * dxBC) * 4294967296.0f); - voodoo->params.tmu[0].startW = voodoo->params.tmu[1].startW = voodoo->params.startW; - voodoo->params.tmu[0].dWdX = voodoo->params.tmu[1].dWdX = voodoo->params.dWdX; - voodoo->params.tmu[0].dWdY = voodoo->params.tmu[1].dWdY = voodoo->params.dWdY; - } - if (voodoo->sSetupMode & SETUPMODE_W0) - { - voodoo->params.tmu[0].startW = (int64_t)(verts[va].sW0 * 4294967296.0f); - voodoo->params.tmu[0].dWdX = (int64_t)(((verts[va].sW0 - verts[vb].sW0) * dyBC - (verts[vb].sW0 - verts[vc].sW0) * dyAB) * 4294967296.0f); - voodoo->params.tmu[0].dWdY = (int64_t)(((verts[vb].sW0 - verts[vc].sW0) * dxAB - (verts[va].sW0 - verts[vb].sW0) * dxBC) * 4294967296.0f); - voodoo->params.tmu[1].startW = voodoo->params.tmu[0].startW; - voodoo->params.tmu[1].dWdX = voodoo->params.tmu[0].dWdX; - voodoo->params.tmu[1].dWdY = voodoo->params.tmu[0].dWdY; - } - if (voodoo->sSetupMode & SETUPMODE_S0_T0) - { - voodoo->params.tmu[0].startS = (int64_t)(verts[va].sS0 * 4294967296.0f); - voodoo->params.tmu[0].dSdX = (int64_t)(((verts[va].sS0 - verts[vb].sS0) * dyBC - (verts[vb].sS0 - verts[vc].sS0) * dyAB) * 4294967296.0f); - voodoo->params.tmu[0].dSdY = (int64_t)(((verts[vb].sS0 - verts[vc].sS0) * dxAB - (verts[va].sS0 - verts[vb].sS0) * dxBC) * 4294967296.0f); - voodoo->params.tmu[0].startT = (int64_t)(verts[va].sT0 * 4294967296.0f); - voodoo->params.tmu[0].dTdX = (int64_t)(((verts[va].sT0 - verts[vb].sT0) * dyBC - (verts[vb].sT0 - verts[vc].sT0) * dyAB) * 4294967296.0f); - voodoo->params.tmu[0].dTdY = (int64_t)(((verts[vb].sT0 - verts[vc].sT0) * dxAB - (verts[va].sT0 - verts[vb].sT0) * dxBC) * 4294967296.0f); - voodoo->params.tmu[1].startS = voodoo->params.tmu[0].startS; - voodoo->params.tmu[1].dSdX = voodoo->params.tmu[0].dSdX; - voodoo->params.tmu[1].dSdY = voodoo->params.tmu[0].dSdY; - voodoo->params.tmu[1].startT = voodoo->params.tmu[0].startT; - voodoo->params.tmu[1].dTdX = voodoo->params.tmu[0].dTdX; - voodoo->params.tmu[1].dTdY = voodoo->params.tmu[0].dTdY; - } - if (voodoo->sSetupMode & SETUPMODE_W1) - { - voodoo->params.tmu[1].startW = (int64_t)(verts[va].sW1 * 4294967296.0f); - voodoo->params.tmu[1].dWdX = (int64_t)(((verts[va].sW1 - verts[vb].sW1) * dyBC - (verts[vb].sW1 - verts[vc].sW1) * dyAB) * 4294967296.0f); - voodoo->params.tmu[1].dWdY = (int64_t)(((verts[vb].sW1 - verts[vc].sW1) * dxAB - (verts[va].sW1 - verts[vb].sW1) * dxBC) * 4294967296.0f); - } - if (voodoo->sSetupMode & SETUPMODE_S1_T1) - { - voodoo->params.tmu[1].startS = (int64_t)(verts[va].sS1 * 4294967296.0f); - voodoo->params.tmu[1].dSdX = (int64_t)(((verts[va].sS1 - verts[vb].sS1) * dyBC - (verts[vb].sS1 - verts[vc].sS1) * dyAB) * 4294967296.0f); - voodoo->params.tmu[1].dSdY = (int64_t)(((verts[vb].sS1 - verts[vc].sS1) * dxAB - (verts[va].sS1 - verts[vb].sS1) * dxBC) * 4294967296.0f); - voodoo->params.tmu[1].startT = (int64_t)(verts[va].sT1 * 4294967296.0f); - voodoo->params.tmu[1].dTdX = (int64_t)(((verts[va].sT1 - verts[vb].sT1) * dyBC - (verts[vb].sT1 - verts[vc].sT1) * dyAB) * 4294967296.0f); - voodoo->params.tmu[1].dTdY = (int64_t)(((verts[vb].sT1 - verts[vc].sT1) * dxAB - (verts[va].sT1 - verts[vb].sT1) * dxBC) * 4294967296.0f); - } - - voodoo->params.sign = (area < 0.0); - - if (voodoo->ncc_dirty[0]) - voodoo_update_ncc(voodoo, 0); - if (voodoo->ncc_dirty[1]) - voodoo_update_ncc(voodoo, 1); - voodoo->ncc_dirty[0] = voodoo->ncc_dirty[1] = 0; - - voodoo_queue_triangle(voodoo, &voodoo->params); + voodoo_queue_triangle(voodoo, &voodoo->params); } diff --git a/src/video/vid_voodoo_texture.c b/src/video/vid_voodoo_texture.c index 784ea17fe..e0530c6d4 100644 --- a/src/video/vid_voodoo_texture.c +++ b/src/video/vid_voodoo_texture.c @@ -38,7 +38,6 @@ #include <86box/vid_voodoo_render.h> #include <86box/vid_voodoo_texture.h> - #ifdef ENABLE_VOODOO_TEXTURE_LOG int voodoo_texture_do_log = ENABLE_VOODOO_TEXTURE_LOG; @@ -48,581 +47,501 @@ voodoo_texture_log(const char *fmt, ...) va_list ap; if (voodoo_texture_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define voodoo_texture_log(fmt, ...) +# define voodoo_texture_log(fmt, ...) #endif - -void voodoo_recalc_tex(voodoo_t *voodoo, int tmu) +void +voodoo_recalc_tex(voodoo_t *voodoo, int tmu) { - int aspect = (voodoo->params.tLOD[tmu] >> 21) & 3; - int width = 256, height = 256; - int shift = 8; - int lod; - uint32_t base = voodoo->params.texBaseAddr[tmu]; - uint32_t offset = 0; - int tex_lod = 0; - uint32_t offsets[LOD_MAX+3]; - int widths[LOD_MAX+3], heights[LOD_MAX+3], shifts[LOD_MAX+3]; + int aspect = (voodoo->params.tLOD[tmu] >> 21) & 3; + int width = 256, height = 256; + int shift = 8; + int lod; + uint32_t base = voodoo->params.texBaseAddr[tmu]; + uint32_t offset = 0; + int tex_lod = 0; + uint32_t offsets[LOD_MAX + 3]; + int widths[LOD_MAX + 3], heights[LOD_MAX + 3], shifts[LOD_MAX + 3]; - if (voodoo->params.tLOD[tmu] & LOD_S_IS_WIDER) - height >>= aspect; + if (voodoo->params.tLOD[tmu] & LOD_S_IS_WIDER) + height >>= aspect; + else { + width >>= aspect; + shift -= aspect; + } + + for (lod = 0; lod <= LOD_MAX + 2; lod++) { + offsets[lod] = offset; + widths[lod] = width >> lod; + heights[lod] = height >> lod; + shifts[lod] = shift - lod; + + if (!widths[lod]) + widths[lod] = 1; + if (!heights[lod]) + heights[lod] = 1; + if (shifts[lod] < 0) + shifts[lod] = 0; + + if (!(voodoo->params.tLOD[tmu] & LOD_SPLIT) || ((lod & 1) && (voodoo->params.tLOD[tmu] & LOD_ODD)) || (!(lod & 1) && !(voodoo->params.tLOD[tmu] & LOD_ODD))) { + if (voodoo->params.tformat[tmu] & 8) + offset += (width >> lod) * (height >> lod) * 2; + else + offset += (width >> lod) * (height >> lod); + } + } + + if ((voodoo->params.textureMode[tmu] & TEXTUREMODE_TRILINEAR) && (voodoo->params.tLOD[tmu] & LOD_ODD)) + tex_lod++; /*Skip LOD 0*/ + + // voodoo_texture_log("TMU %i: %08x\n", tmu, voodoo->params.textureMode[tmu]); + for (lod = 0; lod <= LOD_MAX + 1; lod++) { + if (voodoo->params.tLOD[tmu] & LOD_TMULTIBASEADDR) { + switch (tex_lod) { + case 0: + base = voodoo->params.texBaseAddr[tmu]; + break; + case 1: + base = voodoo->params.texBaseAddr1[tmu]; + break; + case 2: + base = voodoo->params.texBaseAddr2[tmu]; + break; + default: + base = voodoo->params.texBaseAddr38[tmu]; + break; + } + } + + voodoo->params.tex_base[tmu][lod] = base + offsets[tex_lod]; + if (voodoo->params.tformat[tmu] & 8) + voodoo->params.tex_end[tmu][lod] = base + offsets[tex_lod] + (widths[tex_lod] * heights[tex_lod] * 2); else - { - width >>= aspect; - shift -= aspect; - } + voodoo->params.tex_end[tmu][lod] = base + offsets[tex_lod] + (widths[tex_lod] * heights[tex_lod]); + voodoo->params.tex_w_mask[tmu][lod] = widths[tex_lod] - 1; + voodoo->params.tex_w_nmask[tmu][lod] = ~(widths[tex_lod] - 1); + voodoo->params.tex_h_mask[tmu][lod] = heights[tex_lod] - 1; + voodoo->params.tex_shift[tmu][lod] = shifts[tex_lod]; + voodoo->params.tex_lod[tmu][lod] = tex_lod; - for (lod = 0; lod <= LOD_MAX + 2; lod++) - { - offsets[lod] = offset; - widths[lod] = width >> lod; - heights[lod] = height >> lod; - shifts[lod] = shift - lod; - - if (!widths[lod]) - widths[lod] = 1; - if (!heights[lod]) - heights[lod] = 1; - if (shifts[lod] < 0) - shifts[lod] = 0; - - if (!(voodoo->params.tLOD[tmu] & LOD_SPLIT) || - ((lod & 1) && (voodoo->params.tLOD[tmu] & LOD_ODD)) || - (!(lod & 1) && !(voodoo->params.tLOD[tmu] & LOD_ODD))) - { - if (voodoo->params.tformat[tmu] & 8) - offset += (width >> lod) * (height >> lod) * 2; - else - offset += (width >> lod) * (height >> lod); - } - } - - - if ((voodoo->params.textureMode[tmu] & TEXTUREMODE_TRILINEAR) && (voodoo->params.tLOD[tmu] & LOD_ODD)) - tex_lod++; /*Skip LOD 0*/ - -// voodoo_texture_log("TMU %i: %08x\n", tmu, voodoo->params.textureMode[tmu]); - for (lod = 0; lod <= LOD_MAX+1; lod++) - { - if (voodoo->params.tLOD[tmu] & LOD_TMULTIBASEADDR) - { - switch (tex_lod) - { - case 0: - base = voodoo->params.texBaseAddr[tmu]; - break; - case 1: - base = voodoo->params.texBaseAddr1[tmu]; - break; - case 2: - base = voodoo->params.texBaseAddr2[tmu]; - break; - default: - base = voodoo->params.texBaseAddr38[tmu]; - break; - } - } - - voodoo->params.tex_base[tmu][lod] = base + offsets[tex_lod]; - if (voodoo->params.tformat[tmu] & 8) - voodoo->params.tex_end[tmu][lod] = base + offsets[tex_lod] + (widths[tex_lod] * heights[tex_lod] * 2); + if (!(voodoo->params.textureMode[tmu] & TEXTUREMODE_TRILINEAR) || ((lod & 1) && (voodoo->params.tLOD[tmu] & LOD_ODD)) || (!(lod & 1) && !(voodoo->params.tLOD[tmu] & LOD_ODD))) { + if (!(voodoo->params.tLOD[tmu] & LOD_ODD) || lod != 0) { + if (voodoo->params.textureMode[tmu] & TEXTUREMODE_TRILINEAR) + tex_lod += 2; else - voodoo->params.tex_end[tmu][lod] = base + offsets[tex_lod] + (widths[tex_lod] * heights[tex_lod]); - voodoo->params.tex_w_mask[tmu][lod] = widths[tex_lod] - 1; - voodoo->params.tex_w_nmask[tmu][lod] = ~(widths[tex_lod] - 1); - voodoo->params.tex_h_mask[tmu][lod] = heights[tex_lod] - 1; - voodoo->params.tex_shift[tmu][lod] = shifts[tex_lod]; - voodoo->params.tex_lod[tmu][lod] = tex_lod; - - if (!(voodoo->params.textureMode[tmu] & TEXTUREMODE_TRILINEAR) || - ((lod & 1) && (voodoo->params.tLOD[tmu] & LOD_ODD)) || - (!(lod & 1) && !(voodoo->params.tLOD[tmu] & LOD_ODD))) - { - if (!(voodoo->params.tLOD[tmu] & LOD_ODD) || lod != 0) - { - if (voodoo->params.textureMode[tmu] & TEXTUREMODE_TRILINEAR) - tex_lod += 2; - else - tex_lod++; - } - } + tex_lod++; + } } + } - voodoo->params.tex_width[tmu] = width; + voodoo->params.tex_width[tmu] = width; } -#define makergba(r, g, b, a) ((b) | ((g) << 8) | ((r) << 16) | ((a) << 24)) +#define makergba(r, g, b, a) ((b) | ((g) << 8) | ((r) << 16) | ((a) << 24)) -void voodoo_use_texture(voodoo_t *voodoo, voodoo_params_t *params, int tmu) +void +voodoo_use_texture(voodoo_t *voodoo, voodoo_params_t *params, int tmu) { - int c, d; - int lod; - int lod_min, lod_max; - uint32_t addr = 0, addr_end; - uint32_t palette_checksum; + int c, d; + int lod; + int lod_min, lod_max; + uint32_t addr = 0, addr_end; + uint32_t palette_checksum; - lod_min = (params->tLOD[tmu] >> 2) & 15; - lod_max = (params->tLOD[tmu] >> 8) & 15; + lod_min = (params->tLOD[tmu] >> 2) & 15; + lod_max = (params->tLOD[tmu] >> 8) & 15; - if (params->tformat[tmu] == TEX_PAL8 || params->tformat[tmu] == TEX_APAL8 || params->tformat[tmu] == TEX_APAL88) - { - if (voodoo->palette_dirty[tmu]) - { - palette_checksum = 0; + if (params->tformat[tmu] == TEX_PAL8 || params->tformat[tmu] == TEX_APAL8 || params->tformat[tmu] == TEX_APAL88) { + if (voodoo->palette_dirty[tmu]) { + palette_checksum = 0; - for (c = 0; c < 256; c++) - palette_checksum ^= voodoo->palette[tmu][c].u; + for (c = 0; c < 256; c++) + palette_checksum ^= voodoo->palette[tmu][c].u; - voodoo->palette_checksum[tmu] = palette_checksum; - voodoo->palette_dirty[tmu] = 0; - } - else - palette_checksum = voodoo->palette_checksum[tmu]; + voodoo->palette_checksum[tmu] = palette_checksum; + voodoo->palette_dirty[tmu] = 0; + } else + palette_checksum = voodoo->palette_checksum[tmu]; + } else + palette_checksum = 0; + + if ((voodoo->params.tLOD[tmu] & LOD_SPLIT) && (voodoo->params.tLOD[tmu] & LOD_ODD) && (voodoo->params.tLOD[tmu] & LOD_TMULTIBASEADDR)) + addr = params->texBaseAddr1[tmu]; + else + addr = params->texBaseAddr[tmu]; + + /*Try to find texture in cache*/ + for (c = 0; c < TEX_CACHE_MAX; c++) { + if (voodoo->texture_cache[tmu][c].base == addr && voodoo->texture_cache[tmu][c].tLOD == (params->tLOD[tmu] & 0xf00fff) && voodoo->texture_cache[tmu][c].palette_checksum == palette_checksum) { + params->tex_entry[tmu] = c; + voodoo->texture_cache[tmu][c].refcount++; + return; } - else - palette_checksum = 0; + } - if ((voodoo->params.tLOD[tmu] & LOD_SPLIT) && (voodoo->params.tLOD[tmu] & LOD_ODD) && (voodoo->params.tLOD[tmu] & LOD_TMULTIBASEADDR)) - addr = params->texBaseAddr1[tmu]; - else - addr = params->texBaseAddr[tmu]; - - /*Try to find texture in cache*/ - for (c = 0; c < TEX_CACHE_MAX; c++) - { - if (voodoo->texture_cache[tmu][c].base == addr && - voodoo->texture_cache[tmu][c].tLOD == (params->tLOD[tmu] & 0xf00fff) && - voodoo->texture_cache[tmu][c].palette_checksum == palette_checksum) - { - params->tex_entry[tmu] = c; - voodoo->texture_cache[tmu][c].refcount++; - return; - } + /*Texture not found, search for unused texture*/ + do { + for (c = 0; c < TEX_CACHE_MAX; c++) { + voodoo->texture_last_removed++; + voodoo->texture_last_removed &= (TEX_CACHE_MAX - 1); + if (voodoo->texture_cache[tmu][voodoo->texture_last_removed].refcount == voodoo->texture_cache[tmu][voodoo->texture_last_removed].refcount_r[0] && (voodoo->render_threads == 1 || voodoo->texture_cache[tmu][voodoo->texture_last_removed].refcount == voodoo->texture_cache[tmu][voodoo->texture_last_removed].refcount_r[1])) + break; } - - /*Texture not found, search for unused texture*/ - do - { - for (c = 0; c < TEX_CACHE_MAX; c++) - { - voodoo->texture_last_removed++; - voodoo->texture_last_removed &= (TEX_CACHE_MAX-1); - if (voodoo->texture_cache[tmu][voodoo->texture_last_removed].refcount == voodoo->texture_cache[tmu][voodoo->texture_last_removed].refcount_r[0] && - (voodoo->render_threads == 1 || voodoo->texture_cache[tmu][voodoo->texture_last_removed].refcount == voodoo->texture_cache[tmu][voodoo->texture_last_removed].refcount_r[1])) - break; - } - if (c == TEX_CACHE_MAX) - voodoo_wait_for_render_thread_idle(voodoo); - } while (c == TEX_CACHE_MAX); if (c == TEX_CACHE_MAX) - fatal("Texture cache full!\n"); + voodoo_wait_for_render_thread_idle(voodoo); + } while (c == TEX_CACHE_MAX); + if (c == TEX_CACHE_MAX) + fatal("Texture cache full!\n"); - c = voodoo->texture_last_removed; + c = voodoo->texture_last_removed; + if ((voodoo->params.tLOD[tmu] & LOD_SPLIT) && (voodoo->params.tLOD[tmu] & LOD_ODD) && (voodoo->params.tLOD[tmu] & LOD_TMULTIBASEADDR)) + voodoo->texture_cache[tmu][c].base = params->texBaseAddr1[tmu]; + else + voodoo->texture_cache[tmu][c].base = params->texBaseAddr[tmu]; + voodoo->texture_cache[tmu][c].tLOD = params->tLOD[tmu] & 0xf00fff; - if ((voodoo->params.tLOD[tmu] & LOD_SPLIT) && (voodoo->params.tLOD[tmu] & LOD_ODD) && (voodoo->params.tLOD[tmu] & LOD_TMULTIBASEADDR)) - voodoo->texture_cache[tmu][c].base = params->texBaseAddr1[tmu]; - else - voodoo->texture_cache[tmu][c].base = params->texBaseAddr[tmu]; - voodoo->texture_cache[tmu][c].tLOD = params->tLOD[tmu] & 0xf00fff; + lod_min = (params->tLOD[tmu] >> 2) & 15; + lod_max = (params->tLOD[tmu] >> 8) & 15; + // voodoo_texture_log(" add new texture to %i tformat=%i %08x LOD=%i-%i tmu=%i\n", c, voodoo->params.tformat[tmu], params->texBaseAddr[tmu], lod_min, lod_max, tmu); + lod_min = MIN(lod_min, 8); + lod_max = MIN(lod_max, 8); + for (lod = lod_min; lod <= lod_max; lod++) { + uint32_t *base = &voodoo->texture_cache[tmu][c].data[texture_offset[lod]]; + uint32_t tex_addr = params->tex_base[tmu][lod] & voodoo->texture_mask; + int x, y; + int shift = 8 - params->tex_lod[tmu][lod]; + rgba_u *pal; - lod_min = (params->tLOD[tmu] >> 2) & 15; - lod_max = (params->tLOD[tmu] >> 8) & 15; -// voodoo_texture_log(" add new texture to %i tformat=%i %08x LOD=%i-%i tmu=%i\n", c, voodoo->params.tformat[tmu], params->texBaseAddr[tmu], lod_min, lod_max, tmu); - lod_min = MIN(lod_min, 8); - lod_max = MIN(lod_max, 8); - for (lod = lod_min; lod <= lod_max; lod++) - { - uint32_t *base = &voodoo->texture_cache[tmu][c].data[texture_offset[lod]]; - uint32_t tex_addr = params->tex_base[tmu][lod] & voodoo->texture_mask; - int x, y; - int shift = 8 - params->tex_lod[tmu][lod]; - rgba_u *pal; + // voodoo_texture_log(" LOD %i : %08x - %08x %i %i,%i\n", lod, params->tex_base[tmu][lod] & voodoo->texture_mask, addr, voodoo->params.tformat[tmu], voodoo->params.tex_w_mask[tmu][lod],voodoo->params.tex_h_mask[tmu][lod]); - //voodoo_texture_log(" LOD %i : %08x - %08x %i %i,%i\n", lod, params->tex_base[tmu][lod] & voodoo->texture_mask, addr, voodoo->params.tformat[tmu], voodoo->params.tex_w_mask[tmu][lod],voodoo->params.tex_h_mask[tmu][lod]); + switch (params->tformat[tmu]) { + case TEX_RGB332: + for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod] + 1; y++) { + for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod] + 1; x++) { + uint8_t dat = voodoo->tex_mem[tmu][(tex_addr + x) & voodoo->texture_mask]; - - switch (params->tformat[tmu]) - { - case TEX_RGB332: - for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod]+1; y++) - { - for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod]+1; x++) - { - uint8_t dat = voodoo->tex_mem[tmu][(tex_addr+x) & voodoo->texture_mask]; - - base[x] = makergba(rgb332[dat].r, rgb332[dat].g, rgb332[dat].b, 0xff); - } - tex_addr += (1 << voodoo->params.tex_shift[tmu][lod]); - base += (1 << shift); - } - break; - - case TEX_Y4I2Q2: - pal = voodoo->ncc_lookup[tmu][(voodoo->params.textureMode[tmu] & TEXTUREMODE_NCC_SEL) ? 1 : 0]; - for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod]+1; y++) - { - for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod]+1; x++) - { - uint8_t dat = voodoo->tex_mem[tmu][(tex_addr+x) & voodoo->texture_mask]; - - base[x] = makergba(pal[dat].rgba.r, pal[dat].rgba.g, pal[dat].rgba.b, 0xff); - } - tex_addr += (1 << voodoo->params.tex_shift[tmu][lod]); - base += (1 << shift); - } - break; - - case TEX_A8: - for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod]+1; y++) - { - for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod]+1; x++) - { - uint8_t dat = voodoo->tex_mem[tmu][(tex_addr+x) & voodoo->texture_mask]; - - base[x] = makergba(dat, dat, dat, dat); - } - tex_addr += (1 << voodoo->params.tex_shift[tmu][lod]); - base += (1 << shift); - } - break; - - case TEX_I8: - for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod]+1; y++) - { - for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod]+1; x++) - { - uint8_t dat = voodoo->tex_mem[tmu][(tex_addr+x) & voodoo->texture_mask]; - - base[x] = makergba(dat, dat, dat, 0xff); - } - tex_addr += (1 << voodoo->params.tex_shift[tmu][lod]); - base += (1 << shift); - } - break; - - case TEX_AI8: - for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod]+1; y++) - { - for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod]+1; x++) - { - uint8_t dat = voodoo->tex_mem[tmu][(tex_addr+x) & voodoo->texture_mask]; - - base[x] = makergba((dat & 0x0f) | ((dat << 4) & 0xf0), (dat & 0x0f) | ((dat << 4) & 0xf0), (dat & 0x0f) | ((dat << 4) & 0xf0), (dat & 0xf0) | ((dat >> 4) & 0x0f)); - } - tex_addr += (1 << voodoo->params.tex_shift[tmu][lod]); - base += (1 << shift); - } - break; - - case TEX_PAL8: - pal = voodoo->palette[tmu]; - for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod]+1; y++) - { - for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod]+1; x++) - { - uint8_t dat = voodoo->tex_mem[tmu][(tex_addr+x) & voodoo->texture_mask]; - - base[x] = makergba(pal[dat].rgba.r, pal[dat].rgba.g, pal[dat].rgba.b, 0xff); - } - tex_addr += (1 << voodoo->params.tex_shift[tmu][lod]); - base += (1 << shift); - } - break; - - case TEX_APAL8: - pal = voodoo->palette[tmu]; - for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod]+1; y++) - { - for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod]+1; x++) - { - uint8_t dat = voodoo->tex_mem[tmu][(tex_addr+x) & voodoo->texture_mask]; - - int r = ((pal[dat].rgba.r & 3) << 6) | ((pal[dat].rgba.g & 0xf0) >> 2) | (pal[dat].rgba.r & 3); - int g = ((pal[dat].rgba.g & 0xf) << 4) | ((pal[dat].rgba.b & 0xc0) >> 4) | ((pal[dat].rgba.g & 0xf) >> 2); - int b = ((pal[dat].rgba.b & 0x3f) << 2) | ((pal[dat].rgba.b & 0x30) >> 4); - int a = (pal[dat].rgba.r & 0xfc) | ((pal[dat].rgba.r & 0xc0) >> 6); - - base[x] = makergba(r, g, b, a); - } - tex_addr += (1 << voodoo->params.tex_shift[tmu][lod]); - base += (1 << shift); - } - break; - - case TEX_ARGB8332: - for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod]+1; y++) - { - for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod]+1; x++) - { - uint16_t dat = *(uint16_t *)&voodoo->tex_mem[tmu][(tex_addr + x*2) & voodoo->texture_mask]; - - base[x] = makergba(rgb332[dat & 0xff].r, rgb332[dat & 0xff].g, rgb332[dat & 0xff].b, dat >> 8); - } - tex_addr += (1 << (voodoo->params.tex_shift[tmu][lod]+1)); - base += (1 << shift); - } - break; - - case TEX_A8Y4I2Q2: - pal = voodoo->ncc_lookup[tmu][(voodoo->params.textureMode[tmu] & TEXTUREMODE_NCC_SEL) ? 1 : 0]; - for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod]+1; y++) - { - for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod]+1; x++) - { - uint16_t dat = *(uint16_t *)&voodoo->tex_mem[tmu][(tex_addr + x*2) & voodoo->texture_mask]; - - base[x] = makergba(pal[dat & 0xff].rgba.r, pal[dat & 0xff].rgba.g, pal[dat & 0xff].rgba.b, dat >> 8); - } - tex_addr += (1 << (voodoo->params.tex_shift[tmu][lod]+1)); - base += (1 << shift); - } - break; - - case TEX_R5G6B5: - for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod]+1; y++) - { - for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod]+1; x++) - { - uint16_t dat = *(uint16_t *)&voodoo->tex_mem[tmu][(tex_addr + x*2) & voodoo->texture_mask]; - - base[x] = makergba(rgb565[dat].r, rgb565[dat].g, rgb565[dat].b, 0xff); - } - tex_addr += (1 << (voodoo->params.tex_shift[tmu][lod]+1)); - base += (1 << shift); - } - break; - - case TEX_ARGB1555: - for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod]+1; y++) - { - for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod]+1; x++) - { - uint16_t dat = *(uint16_t *)&voodoo->tex_mem[tmu][(tex_addr + x*2) & voodoo->texture_mask]; - - base[x] = makergba(argb1555[dat].r, argb1555[dat].g, argb1555[dat].b, argb1555[dat].a); - } - tex_addr += (1 << (voodoo->params.tex_shift[tmu][lod]+1)); - base += (1 << shift); - } - break; - - case TEX_ARGB4444: - for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod]+1; y++) - { - for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod]+1; x++) - { - uint16_t dat = *(uint16_t *)&voodoo->tex_mem[tmu][(tex_addr + x*2) & voodoo->texture_mask]; - - base[x] = makergba(argb4444[dat].r, argb4444[dat].g, argb4444[dat].b, argb4444[dat].a); - } - tex_addr += (1 << (voodoo->params.tex_shift[tmu][lod]+1)); - base += (1 << shift); - } - break; - - case TEX_A8I8: - for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod]+1; y++) - { - for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod]+1; x++) - { - uint16_t dat = *(uint16_t *)&voodoo->tex_mem[tmu][(tex_addr + x*2) & voodoo->texture_mask]; - - base[x] = makergba(dat & 0xff, dat & 0xff, dat & 0xff, dat >> 8); - } - tex_addr += (1 << (voodoo->params.tex_shift[tmu][lod]+1)); - base += (1 << shift); - } - break; - - case TEX_APAL88: - pal = voodoo->palette[tmu]; - for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod]+1; y++) - { - for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod]+1; x++) - { - uint16_t dat = *(uint16_t *)&voodoo->tex_mem[tmu][(tex_addr + x*2) & voodoo->texture_mask]; - - base[x] = makergba(pal[dat & 0xff].rgba.r, pal[dat & 0xff].rgba.g, pal[dat & 0xff].rgba.b, dat >> 8); - } - tex_addr += (1 << (voodoo->params.tex_shift[tmu][lod]+1)); - base += (1 << shift); - } - break; - - default: - fatal("Unknown texture format %i\n", params->tformat[tmu]); + base[x] = makergba(rgb332[dat].r, rgb332[dat].g, rgb332[dat].b, 0xff); + } + tex_addr += (1 << voodoo->params.tex_shift[tmu][lod]); + base += (1 << shift); } - } + break; - voodoo->texture_cache[tmu][c].is16 = voodoo->params.tformat[tmu] & 8; + case TEX_Y4I2Q2: + pal = voodoo->ncc_lookup[tmu][(voodoo->params.textureMode[tmu] & TEXTUREMODE_NCC_SEL) ? 1 : 0]; + for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod] + 1; y++) { + for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod] + 1; x++) { + uint8_t dat = voodoo->tex_mem[tmu][(tex_addr + x) & voodoo->texture_mask]; - if (params->tformat[tmu] == TEX_PAL8 || params->tformat[tmu] == TEX_APAL8 || params->tformat[tmu] == TEX_APAL88) - voodoo->texture_cache[tmu][c].palette_checksum = palette_checksum; - else - voodoo->texture_cache[tmu][c].palette_checksum = 0; - - if (lod_min == 0) - { - voodoo->texture_cache[tmu][c].addr_start[0] = voodoo->params.tex_base[tmu][0]; - voodoo->texture_cache[tmu][c].addr_end[0] = voodoo->params.tex_end[tmu][0]; - } - else - voodoo->texture_cache[tmu][c].addr_start[0] = voodoo->texture_cache[tmu][c].addr_end[0] = 0; - - if (lod_min <= 1 && lod_max >= 1) - { - voodoo->texture_cache[tmu][c].addr_start[1] = voodoo->params.tex_base[tmu][1]; - voodoo->texture_cache[tmu][c].addr_end[1] = voodoo->params.tex_end[tmu][1]; - } - else - voodoo->texture_cache[tmu][c].addr_start[1] = voodoo->texture_cache[tmu][c].addr_end[1] = 0; - - if (lod_min <= 2 && lod_max >= 2) - { - voodoo->texture_cache[tmu][c].addr_start[2] = voodoo->params.tex_base[tmu][2]; - voodoo->texture_cache[tmu][c].addr_end[2] = voodoo->params.tex_end[tmu][2]; - } - else - voodoo->texture_cache[tmu][c].addr_start[2] = voodoo->texture_cache[tmu][c].addr_end[2] = 0; - - if (lod_max >= 3) - { - voodoo->texture_cache[tmu][c].addr_start[3] = voodoo->params.tex_base[tmu][(lod_min > 3) ? lod_min : 3]; - voodoo->texture_cache[tmu][c].addr_end[3] = voodoo->params.tex_end[tmu][(lod_max < 8) ? lod_max : 8]; - } - else - voodoo->texture_cache[tmu][c].addr_start[3] = voodoo->texture_cache[tmu][c].addr_end[3] = 0; - - - for (d = 0; d < 4; d++) - { - addr = voodoo->texture_cache[tmu][c].addr_start[d]; - addr_end = voodoo->texture_cache[tmu][c].addr_end[d]; - - if (addr_end != 0) - { - for (; addr <= addr_end; addr += (1 << TEX_DIRTY_SHIFT)) - voodoo->texture_present[tmu][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT] = 1; + base[x] = makergba(pal[dat].rgba.r, pal[dat].rgba.g, pal[dat].rgba.b, 0xff); + } + tex_addr += (1 << voodoo->params.tex_shift[tmu][lod]); + base += (1 << shift); } - } + break; - params->tex_entry[tmu] = c; - voodoo->texture_cache[tmu][c].refcount++; + case TEX_A8: + for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod] + 1; y++) { + for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod] + 1; x++) { + uint8_t dat = voodoo->tex_mem[tmu][(tex_addr + x) & voodoo->texture_mask]; + + base[x] = makergba(dat, dat, dat, dat); + } + tex_addr += (1 << voodoo->params.tex_shift[tmu][lod]); + base += (1 << shift); + } + break; + + case TEX_I8: + for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod] + 1; y++) { + for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod] + 1; x++) { + uint8_t dat = voodoo->tex_mem[tmu][(tex_addr + x) & voodoo->texture_mask]; + + base[x] = makergba(dat, dat, dat, 0xff); + } + tex_addr += (1 << voodoo->params.tex_shift[tmu][lod]); + base += (1 << shift); + } + break; + + case TEX_AI8: + for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod] + 1; y++) { + for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod] + 1; x++) { + uint8_t dat = voodoo->tex_mem[tmu][(tex_addr + x) & voodoo->texture_mask]; + + base[x] = makergba((dat & 0x0f) | ((dat << 4) & 0xf0), (dat & 0x0f) | ((dat << 4) & 0xf0), (dat & 0x0f) | ((dat << 4) & 0xf0), (dat & 0xf0) | ((dat >> 4) & 0x0f)); + } + tex_addr += (1 << voodoo->params.tex_shift[tmu][lod]); + base += (1 << shift); + } + break; + + case TEX_PAL8: + pal = voodoo->palette[tmu]; + for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod] + 1; y++) { + for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod] + 1; x++) { + uint8_t dat = voodoo->tex_mem[tmu][(tex_addr + x) & voodoo->texture_mask]; + + base[x] = makergba(pal[dat].rgba.r, pal[dat].rgba.g, pal[dat].rgba.b, 0xff); + } + tex_addr += (1 << voodoo->params.tex_shift[tmu][lod]); + base += (1 << shift); + } + break; + + case TEX_APAL8: + pal = voodoo->palette[tmu]; + for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod] + 1; y++) { + for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod] + 1; x++) { + uint8_t dat = voodoo->tex_mem[tmu][(tex_addr + x) & voodoo->texture_mask]; + + int r = ((pal[dat].rgba.r & 3) << 6) | ((pal[dat].rgba.g & 0xf0) >> 2) | (pal[dat].rgba.r & 3); + int g = ((pal[dat].rgba.g & 0xf) << 4) | ((pal[dat].rgba.b & 0xc0) >> 4) | ((pal[dat].rgba.g & 0xf) >> 2); + int b = ((pal[dat].rgba.b & 0x3f) << 2) | ((pal[dat].rgba.b & 0x30) >> 4); + int a = (pal[dat].rgba.r & 0xfc) | ((pal[dat].rgba.r & 0xc0) >> 6); + + base[x] = makergba(r, g, b, a); + } + tex_addr += (1 << voodoo->params.tex_shift[tmu][lod]); + base += (1 << shift); + } + break; + + case TEX_ARGB8332: + for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod] + 1; y++) { + for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod] + 1; x++) { + uint16_t dat = *(uint16_t *) &voodoo->tex_mem[tmu][(tex_addr + x * 2) & voodoo->texture_mask]; + + base[x] = makergba(rgb332[dat & 0xff].r, rgb332[dat & 0xff].g, rgb332[dat & 0xff].b, dat >> 8); + } + tex_addr += (1 << (voodoo->params.tex_shift[tmu][lod] + 1)); + base += (1 << shift); + } + break; + + case TEX_A8Y4I2Q2: + pal = voodoo->ncc_lookup[tmu][(voodoo->params.textureMode[tmu] & TEXTUREMODE_NCC_SEL) ? 1 : 0]; + for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod] + 1; y++) { + for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod] + 1; x++) { + uint16_t dat = *(uint16_t *) &voodoo->tex_mem[tmu][(tex_addr + x * 2) & voodoo->texture_mask]; + + base[x] = makergba(pal[dat & 0xff].rgba.r, pal[dat & 0xff].rgba.g, pal[dat & 0xff].rgba.b, dat >> 8); + } + tex_addr += (1 << (voodoo->params.tex_shift[tmu][lod] + 1)); + base += (1 << shift); + } + break; + + case TEX_R5G6B5: + for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod] + 1; y++) { + for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod] + 1; x++) { + uint16_t dat = *(uint16_t *) &voodoo->tex_mem[tmu][(tex_addr + x * 2) & voodoo->texture_mask]; + + base[x] = makergba(rgb565[dat].r, rgb565[dat].g, rgb565[dat].b, 0xff); + } + tex_addr += (1 << (voodoo->params.tex_shift[tmu][lod] + 1)); + base += (1 << shift); + } + break; + + case TEX_ARGB1555: + for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod] + 1; y++) { + for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod] + 1; x++) { + uint16_t dat = *(uint16_t *) &voodoo->tex_mem[tmu][(tex_addr + x * 2) & voodoo->texture_mask]; + + base[x] = makergba(argb1555[dat].r, argb1555[dat].g, argb1555[dat].b, argb1555[dat].a); + } + tex_addr += (1 << (voodoo->params.tex_shift[tmu][lod] + 1)); + base += (1 << shift); + } + break; + + case TEX_ARGB4444: + for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod] + 1; y++) { + for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod] + 1; x++) { + uint16_t dat = *(uint16_t *) &voodoo->tex_mem[tmu][(tex_addr + x * 2) & voodoo->texture_mask]; + + base[x] = makergba(argb4444[dat].r, argb4444[dat].g, argb4444[dat].b, argb4444[dat].a); + } + tex_addr += (1 << (voodoo->params.tex_shift[tmu][lod] + 1)); + base += (1 << shift); + } + break; + + case TEX_A8I8: + for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod] + 1; y++) { + for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod] + 1; x++) { + uint16_t dat = *(uint16_t *) &voodoo->tex_mem[tmu][(tex_addr + x * 2) & voodoo->texture_mask]; + + base[x] = makergba(dat & 0xff, dat & 0xff, dat & 0xff, dat >> 8); + } + tex_addr += (1 << (voodoo->params.tex_shift[tmu][lod] + 1)); + base += (1 << shift); + } + break; + + case TEX_APAL88: + pal = voodoo->palette[tmu]; + for (y = 0; y < voodoo->params.tex_h_mask[tmu][lod] + 1; y++) { + for (x = 0; x < voodoo->params.tex_w_mask[tmu][lod] + 1; x++) { + uint16_t dat = *(uint16_t *) &voodoo->tex_mem[tmu][(tex_addr + x * 2) & voodoo->texture_mask]; + + base[x] = makergba(pal[dat & 0xff].rgba.r, pal[dat & 0xff].rgba.g, pal[dat & 0xff].rgba.b, dat >> 8); + } + tex_addr += (1 << (voodoo->params.tex_shift[tmu][lod] + 1)); + base += (1 << shift); + } + break; + + default: + fatal("Unknown texture format %i\n", params->tformat[tmu]); + } + } + + voodoo->texture_cache[tmu][c].is16 = voodoo->params.tformat[tmu] & 8; + + if (params->tformat[tmu] == TEX_PAL8 || params->tformat[tmu] == TEX_APAL8 || params->tformat[tmu] == TEX_APAL88) + voodoo->texture_cache[tmu][c].palette_checksum = palette_checksum; + else + voodoo->texture_cache[tmu][c].palette_checksum = 0; + + if (lod_min == 0) { + voodoo->texture_cache[tmu][c].addr_start[0] = voodoo->params.tex_base[tmu][0]; + voodoo->texture_cache[tmu][c].addr_end[0] = voodoo->params.tex_end[tmu][0]; + } else + voodoo->texture_cache[tmu][c].addr_start[0] = voodoo->texture_cache[tmu][c].addr_end[0] = 0; + + if (lod_min <= 1 && lod_max >= 1) { + voodoo->texture_cache[tmu][c].addr_start[1] = voodoo->params.tex_base[tmu][1]; + voodoo->texture_cache[tmu][c].addr_end[1] = voodoo->params.tex_end[tmu][1]; + } else + voodoo->texture_cache[tmu][c].addr_start[1] = voodoo->texture_cache[tmu][c].addr_end[1] = 0; + + if (lod_min <= 2 && lod_max >= 2) { + voodoo->texture_cache[tmu][c].addr_start[2] = voodoo->params.tex_base[tmu][2]; + voodoo->texture_cache[tmu][c].addr_end[2] = voodoo->params.tex_end[tmu][2]; + } else + voodoo->texture_cache[tmu][c].addr_start[2] = voodoo->texture_cache[tmu][c].addr_end[2] = 0; + + if (lod_max >= 3) { + voodoo->texture_cache[tmu][c].addr_start[3] = voodoo->params.tex_base[tmu][(lod_min > 3) ? lod_min : 3]; + voodoo->texture_cache[tmu][c].addr_end[3] = voodoo->params.tex_end[tmu][(lod_max < 8) ? lod_max : 8]; + } else + voodoo->texture_cache[tmu][c].addr_start[3] = voodoo->texture_cache[tmu][c].addr_end[3] = 0; + + for (d = 0; d < 4; d++) { + addr = voodoo->texture_cache[tmu][c].addr_start[d]; + addr_end = voodoo->texture_cache[tmu][c].addr_end[d]; + + if (addr_end != 0) { + for (; addr <= addr_end; addr += (1 << TEX_DIRTY_SHIFT)) + voodoo->texture_present[tmu][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT] = 1; + } + } + + params->tex_entry[tmu] = c; + voodoo->texture_cache[tmu][c].refcount++; } -void flush_texture_cache(voodoo_t *voodoo, uint32_t dirty_addr, int tmu) +void +flush_texture_cache(voodoo_t *voodoo, uint32_t dirty_addr, int tmu) { - int wait_for_idle = 0; - int c; + int wait_for_idle = 0; + int c; - memset(voodoo->texture_present[tmu], 0, sizeof(voodoo->texture_present[0])); -// voodoo_texture_log("Evict %08x %i\n", dirty_addr, sizeof(voodoo->texture_present)); - for (c = 0; c < TEX_CACHE_MAX; c++) - { - if (voodoo->texture_cache[tmu][c].base != -1) - { - int d; + memset(voodoo->texture_present[tmu], 0, sizeof(voodoo->texture_present[0])); + // voodoo_texture_log("Evict %08x %i\n", dirty_addr, sizeof(voodoo->texture_present)); + for (c = 0; c < TEX_CACHE_MAX; c++) { + if (voodoo->texture_cache[tmu][c].base != -1) { + int d; - for (d = 0; d < 4; d++) - { - int addr_start = voodoo->texture_cache[tmu][c].addr_start[d]; - int addr_end = voodoo->texture_cache[tmu][c].addr_end[d]; + for (d = 0; d < 4; d++) { + int addr_start = voodoo->texture_cache[tmu][c].addr_start[d]; + int addr_end = voodoo->texture_cache[tmu][c].addr_end[d]; - if (addr_end != 0) - { - int addr_start_masked = addr_start & voodoo->texture_mask & ~0x3ff; - int addr_end_masked = ((addr_end & voodoo->texture_mask) + 0x3ff) & ~0x3ff; + if (addr_end != 0) { + int addr_start_masked = addr_start & voodoo->texture_mask & ~0x3ff; + int addr_end_masked = ((addr_end & voodoo->texture_mask) + 0x3ff) & ~0x3ff; - if (addr_end_masked < addr_start_masked) - addr_end_masked = voodoo->texture_mask+1; - if (dirty_addr >= addr_start_masked && dirty_addr < addr_end_masked) - { -// voodoo_texture_log(" Evict texture %i %08x\n", c, voodoo->texture_cache[tmu][c].base); + if (addr_end_masked < addr_start_masked) + addr_end_masked = voodoo->texture_mask + 1; + if (dirty_addr >= addr_start_masked && dirty_addr < addr_end_masked) { + // voodoo_texture_log(" Evict texture %i %08x\n", c, voodoo->texture_cache[tmu][c].base); - if (voodoo->texture_cache[tmu][c].refcount != voodoo->texture_cache[tmu][c].refcount_r[0] || - (voodoo->render_threads == 2 && voodoo->texture_cache[tmu][c].refcount != voodoo->texture_cache[tmu][c].refcount_r[1])) - wait_for_idle = 1; + if (voodoo->texture_cache[tmu][c].refcount != voodoo->texture_cache[tmu][c].refcount_r[0] || (voodoo->render_threads == 2 && voodoo->texture_cache[tmu][c].refcount != voodoo->texture_cache[tmu][c].refcount_r[1])) + wait_for_idle = 1; - voodoo->texture_cache[tmu][c].base = -1; - } - else - { - for (; addr_start <= addr_end; addr_start += (1 << TEX_DIRTY_SHIFT)) - voodoo->texture_present[tmu][(addr_start & voodoo->texture_mask) >> TEX_DIRTY_SHIFT] = 1; - } - } - } + voodoo->texture_cache[tmu][c].base = -1; + } else { + for (; addr_start <= addr_end; addr_start += (1 << TEX_DIRTY_SHIFT)) + voodoo->texture_present[tmu][(addr_start & voodoo->texture_mask) >> TEX_DIRTY_SHIFT] = 1; + } } + } } - if (wait_for_idle) - voodoo_wait_for_render_thread_idle(voodoo); + } + if (wait_for_idle) + voodoo_wait_for_render_thread_idle(voodoo); } -void voodoo_tex_writel(uint32_t addr, uint32_t val, void *p) +void +voodoo_tex_writel(uint32_t addr, uint32_t val, void *p) { - int lod, s, t; - voodoo_t *voodoo = (voodoo_t *)p; - int tmu; + int lod, s, t; + voodoo_t *voodoo = (voodoo_t *) p; + int tmu; - if (addr & 0x400000) - return; /*TREX != 0*/ + if (addr & 0x400000) + return; /*TREX != 0*/ - tmu = (addr & 0x200000) ? 1 : 0; + tmu = (addr & 0x200000) ? 1 : 0; - if (tmu && !voodoo->dual_tmus) - return; + if (tmu && !voodoo->dual_tmus) + return; - if (voodoo->type < VOODOO_BANSHEE) - { - if (!(voodoo->params.tformat[tmu] & 8) && voodoo->type >= VOODOO_BANSHEE) - { - lod = (addr >> 16) & 0xf; - t = (addr >> 8) & 0xff; - } - else - { - lod = (addr >> 17) & 0xf; - t = (addr >> 9) & 0xff; - } - if (voodoo->params.tformat[tmu] & 8) - s = (addr >> 1) & 0xfe; - else - { - if ((voodoo->params.textureMode[tmu] & (1 << 31)) || voodoo->type >= VOODOO_BANSHEE) - s = addr & 0xfc; - else - s = (addr >> 1) & 0xfc; - } - if (lod > LOD_MAX) - return; - -// if (addr >= 0x200000) -// return; - - if (voodoo->params.tformat[tmu] & 8) - addr = voodoo->params.tex_base[tmu][lod] + s*2 + (t << voodoo->params.tex_shift[tmu][lod])*2; - else - addr = voodoo->params.tex_base[tmu][lod] + s + (t << voodoo->params.tex_shift[tmu][lod]); + if (voodoo->type < VOODOO_BANSHEE) { + if (!(voodoo->params.tformat[tmu] & 8) && voodoo->type >= VOODOO_BANSHEE) { + lod = (addr >> 16) & 0xf; + t = (addr >> 8) & 0xff; + } else { + lod = (addr >> 17) & 0xf; + t = (addr >> 9) & 0xff; } + if (voodoo->params.tformat[tmu] & 8) + s = (addr >> 1) & 0xfe; + else { + if ((voodoo->params.textureMode[tmu] & (1 << 31)) || voodoo->type >= VOODOO_BANSHEE) + s = addr & 0xfc; + else + s = (addr >> 1) & 0xfc; + } + if (lod > LOD_MAX) + return; + + // if (addr >= 0x200000) + // return; + + if (voodoo->params.tformat[tmu] & 8) + addr = voodoo->params.tex_base[tmu][lod] + s * 2 + (t << voodoo->params.tex_shift[tmu][lod]) * 2; else - addr = (addr & 0x1ffffc) + voodoo->params.tex_base[tmu][0]; + addr = voodoo->params.tex_base[tmu][lod] + s + (t << voodoo->params.tex_shift[tmu][lod]); + } else + addr = (addr & 0x1ffffc) + voodoo->params.tex_base[tmu][0]; - if (voodoo->texture_present[tmu][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) - { -// voodoo_texture_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); - flush_texture_cache(voodoo, addr & voodoo->texture_mask, tmu); - } - if (voodoo->type == VOODOO_3 && voodoo->texture_present[tmu^1][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) - { -// voodoo_texture_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); - flush_texture_cache(voodoo, addr & voodoo->texture_mask, tmu^1); - } - *(uint32_t *)(&voodoo->tex_mem[tmu][addr & voodoo->texture_mask]) = val; + if (voodoo->texture_present[tmu][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) { + // voodoo_texture_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); + flush_texture_cache(voodoo, addr & voodoo->texture_mask, tmu); + } + if (voodoo->type == VOODOO_3 && voodoo->texture_present[tmu ^ 1][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) { + // voodoo_texture_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); + flush_texture_cache(voodoo, addr & voodoo->texture_mask, tmu ^ 1); + } + *(uint32_t *) (&voodoo->tex_mem[tmu][addr & voodoo->texture_mask]) = val; } diff --git a/src/video/vid_wy700.c b/src/video/vid_wy700.c index ef641627b..2478a5089 100644 --- a/src/video/vid_wy700.c +++ b/src/video/vid_wy700.c @@ -29,14 +29,11 @@ #include <86box/device.h> #include <86box/video.h> - #define WY700_XSIZE 1280 #define WY700_YSIZE 800 - void updatewindowsize(int x, int y); - /* The Wyse 700 is an unusual video card. Though it has an MC6845 CRTC, this * is not exposed directly to the host PC. Instead, the CRTC is controlled by * an MC68705P3 microcontroller. @@ -81,145 +78,136 @@ void updatewindowsize(int x, int y); * - Cursor detach (commands 4 and 5) */ - /* The microcontroller sets up the real CRTC with one of five fixed mode * definitions. As written, this is a fairly simplistic emulation that * doesn't attempt to closely follow the actual working of the CRTC; but I've * included the definitions here for information. */ -static uint8_t mode_1280x800[] = -{ - 0x31, /* Horizontal total */ - 0x28, /* Horizontal displayed */ - 0x29, /* Horizontal sync position */ - 0x06, /* Horizontal sync width */ - 0x1b, /* Vertical total */ - 0x00, /* Vertical total adjust */ - 0x19, /* Vertical displayed */ - 0x1a, /* Vsync position */ - 0x03, /* Interlace and skew */ - 0x0f, /* Maximum raster address */ +static uint8_t mode_1280x800[] = { + 0x31, /* Horizontal total */ + 0x28, /* Horizontal displayed */ + 0x29, /* Horizontal sync position */ + 0x06, /* Horizontal sync width */ + 0x1b, /* Vertical total */ + 0x00, /* Vertical total adjust */ + 0x19, /* Vertical displayed */ + 0x1a, /* Vsync position */ + 0x03, /* Interlace and skew */ + 0x0f, /* Maximum raster address */ }; -static uint8_t mode_1280x400[] = -{ - 0x31, /* Horizontal total */ - 0x28, /* Horizontal displayed */ - 0x29, /* Horizontal sync position */ - 0x06, /* Horizontal sync width */ - 0x1b, /* Vertical total */ - 0x00, /* Vertical total adjust */ - 0x19, /* Vertical displayed */ - 0x1a, /* Vsync position */ - 0x01, /* Interlace and skew */ - 0x0f, /* Maximum raster address */ +static uint8_t mode_1280x400[] = { + 0x31, /* Horizontal total */ + 0x28, /* Horizontal displayed */ + 0x29, /* Horizontal sync position */ + 0x06, /* Horizontal sync width */ + 0x1b, /* Vertical total */ + 0x00, /* Vertical total adjust */ + 0x19, /* Vertical displayed */ + 0x1a, /* Vsync position */ + 0x01, /* Interlace and skew */ + 0x0f, /* Maximum raster address */ }; -static uint8_t mode_640x400[] = -{ - 0x18, /* Horizontal total */ - 0x14, /* Horizontal displayed */ - 0x14, /* Horizontal sync position */ - 0x03, /* Horizontal sync width */ - 0x1b, /* Vertical total */ - 0x00, /* Vertical total adjust */ - 0x19, /* Vertical displayed */ - 0x1a, /* Vsync position */ - 0x01, /* Interlace and skew */ - 0x0f, /* Maximum raster address */ +static uint8_t mode_640x400[] = { + 0x18, /* Horizontal total */ + 0x14, /* Horizontal displayed */ + 0x14, /* Horizontal sync position */ + 0x03, /* Horizontal sync width */ + 0x1b, /* Vertical total */ + 0x00, /* Vertical total adjust */ + 0x19, /* Vertical displayed */ + 0x1a, /* Vsync position */ + 0x01, /* Interlace and skew */ + 0x0f, /* Maximum raster address */ }; -static uint8_t mode_640x200[] = -{ - 0x18, /* Horizontal total */ - 0x14, /* Horizontal displayed */ - 0x14, /* Horizontal sync position */ - 0xff, /* Horizontal sync width */ - 0x37, /* Vertical total */ - 0x00, /* Vertical total adjust */ - 0x32, /* Vertical displayed */ - 0x34, /* Vsync position */ - 0x03, /* Interlace and skew */ - 0x07, /* Maximum raster address */ +static uint8_t mode_640x200[] = { + 0x18, /* Horizontal total */ + 0x14, /* Horizontal displayed */ + 0x14, /* Horizontal sync position */ + 0xff, /* Horizontal sync width */ + 0x37, /* Vertical total */ + 0x00, /* Vertical total adjust */ + 0x32, /* Vertical displayed */ + 0x34, /* Vsync position */ + 0x03, /* Interlace and skew */ + 0x07, /* Maximum raster address */ }; -static uint8_t mode_80x24[] = -{ - 0x31, /* Horizontal total */ - 0x28, /* Horizontal displayed */ - 0x2A, /* Horizontal sync position */ - 0xff, /* Horizontal sync width */ - 0x1b, /* Vertical total */ - 0x00, /* Vertical total adjust */ - 0x19, /* Vertical displayed */ - 0x1a, /* Vsync position */ - 0x01, /* Interlace and skew */ - 0x0f, /* Maximum raster address */ +static uint8_t mode_80x24[] = { + 0x31, /* Horizontal total */ + 0x28, /* Horizontal displayed */ + 0x2A, /* Horizontal sync position */ + 0xff, /* Horizontal sync width */ + 0x1b, /* Vertical total */ + 0x00, /* Vertical total adjust */ + 0x19, /* Vertical displayed */ + 0x1a, /* Vsync position */ + 0x01, /* Interlace and skew */ + 0x0f, /* Maximum raster address */ }; -static uint8_t mode_40x24[] = -{ - 0x18, /* Horizontal total */ - 0x14, /* Horizontal displayed */ - 0x15, /* Horizontal sync position */ - 0xff, /* Horizontal sync width */ - 0x1b, /* Vertical total */ - 0x00, /* Vertical total adjust */ - 0x19, /* Vertical displayed */ - 0x1a, /* Vsync position */ - 0x01, /* Interlace and skew */ - 0x0f, /* Maximum raster address */ +static uint8_t mode_40x24[] = { + 0x18, /* Horizontal total */ + 0x14, /* Horizontal displayed */ + 0x15, /* Horizontal sync position */ + 0xff, /* Horizontal sync width */ + 0x1b, /* Vertical total */ + 0x00, /* Vertical total adjust */ + 0x19, /* Vertical displayed */ + 0x1a, /* Vsync position */ + 0x01, /* Interlace and skew */ + 0x0f, /* Maximum raster address */ }; - /* Font ROM: Two fonts, each containing 256 characters, 16x16 pixels */ extern uint8_t fontdatw[512][32]; -typedef struct wy700_t -{ - mem_mapping_t mapping; +typedef struct wy700_t { + mem_mapping_t mapping; - /* The microcontroller works by watching four ports: - * 0x3D8 / 0x3B8 (mode control register) - * 0x3DD (top scanline address) - * 0x3DF (Wy700 control register) - * CRTC reg 14 (cursor location high) - * - * It will do nothing until one of these registers is touched. When - * one is, it then reconfigures the internal 6845 based on what it - * sees. - */ - uint8_t last_03D8; /* Copies of values written to the listed */ - uint8_t last_03DD; /* I/O ports */ - uint8_t last_03DF; - uint8_t last_crtc_0E; + /* The microcontroller works by watching four ports: + * 0x3D8 / 0x3B8 (mode control register) + * 0x3DD (top scanline address) + * 0x3DF (Wy700 control register) + * CRTC reg 14 (cursor location high) + * + * It will do nothing until one of these registers is touched. When + * one is, it then reconfigures the internal 6845 based on what it + * sees. + */ + uint8_t last_03D8; /* Copies of values written to the listed */ + uint8_t last_03DD; /* I/O ports */ + uint8_t last_03DF; + uint8_t last_crtc_0E; - uint8_t cga_crtc[32]; /* The 'CRTC' as the host PC sees it */ - uint8_t real_crtc[32]; /* The internal CRTC as the microcontroller */ - /* sees it */ - int cga_crtcreg; /* Current CRTC register */ - uint16_t wy700_base; /* Framebuffer base address (native modes) */ - uint8_t wy700_control; /* Native control / command register */ - uint8_t wy700_mode; /* Current mode (see list at top of file) */ - uint8_t cga_ctrl; /* Emulated MDA/CGA control register */ - uint8_t cga_colour; /* Emulated CGA colour register (ignored) */ + uint8_t cga_crtc[32]; /* The 'CRTC' as the host PC sees it */ + uint8_t real_crtc[32]; /* The internal CRTC as the microcontroller */ + /* sees it */ + int cga_crtcreg; /* Current CRTC register */ + uint16_t wy700_base; /* Framebuffer base address (native modes) */ + uint8_t wy700_control; /* Native control / command register */ + uint8_t wy700_mode; /* Current mode (see list at top of file) */ + uint8_t cga_ctrl; /* Emulated MDA/CGA control register */ + uint8_t cga_colour; /* Emulated CGA colour register (ignored) */ - uint8_t mda_stat; /* MDA status (IN 0x3BA) */ - uint8_t cga_stat; /* CGA status (IN 0x3DA) */ + uint8_t mda_stat; /* MDA status (IN 0x3BA) */ + uint8_t cga_stat; /* CGA status (IN 0x3DA) */ - int font; /* Current font, 0 or 1 */ - int enabled; /* Display enabled, 0 or 1 */ - int detach; /* Detach cursor, 0 or 1 */ + int font; /* Current font, 0 or 1 */ + int enabled; /* Display enabled, 0 or 1 */ + int detach; /* Detach cursor, 0 or 1 */ - uint64_t dispontime, dispofftime; - pc_timer_t timer; + uint64_t dispontime, dispofftime; + pc_timer_t timer; - int linepos, displine; - int vc; - int dispon, blink; - int vsynctime; + int linepos, displine; + int vc; + int dispon, blink; + int vsynctime; - uint8_t *vram; + uint8_t *vram; } wy700_t; /* Mapping of attributes to colours, in CGA emulation... */ @@ -227,796 +215,771 @@ static int cgacols[256][2][2]; /* ... and MDA emulation. */ static int mdacols[256][2][2]; -void wy700_recalctimings(wy700_t *wy700); -void wy700_write(uint32_t addr, uint8_t val, void *p); +void wy700_recalctimings(wy700_t *wy700); +void wy700_write(uint32_t addr, uint8_t val, void *p); uint8_t wy700_read(uint32_t addr, void *p); -void wy700_checkchanges(wy700_t *wy700); +void wy700_checkchanges(wy700_t *wy700); -static video_timings_t timing_wy700 = {VIDEO_ISA, 8, 16, 32, 8, 16, 32}; +static video_timings_t timing_wy700 = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; - -void wy700_out(uint16_t addr, uint8_t val, void *p) +void +wy700_out(uint16_t addr, uint8_t val, void *p) { - wy700_t *wy700 = (wy700_t *)p; - switch (addr) - { - /* These three registers are only mapped in the 3Dx range, - * not the 3Bx range. */ - case 0x3DD: /* Base address (low) */ - wy700->wy700_base &= 0xFF00; - wy700->wy700_base |= val; - wy700_checkchanges(wy700); - break; + wy700_t *wy700 = (wy700_t *) p; + switch (addr) { + /* These three registers are only mapped in the 3Dx range, + * not the 3Bx range. */ + case 0x3DD: /* Base address (low) */ + wy700->wy700_base &= 0xFF00; + wy700->wy700_base |= val; + wy700_checkchanges(wy700); + break; - case 0x3DE: /* Base address (high) */ - wy700->wy700_base &= 0xFF; - wy700->wy700_base |= ((uint16_t)val) << 8; - wy700_checkchanges(wy700); - break; + case 0x3DE: /* Base address (high) */ + wy700->wy700_base &= 0xFF; + wy700->wy700_base |= ((uint16_t) val) << 8; + wy700_checkchanges(wy700); + break; - case 0x3DF: /* Command / control register */ - wy700->wy700_control = val; - wy700_checkchanges(wy700); - break; + case 0x3DF: /* Command / control register */ + wy700->wy700_control = val; + wy700_checkchanges(wy700); + break; - /* Emulated CRTC, register select */ - case 0x3b0: case 0x3b2: case 0x3b4: case 0x3b6: - case 0x3d0: case 0x3d2: case 0x3d4: case 0x3d6: - wy700->cga_crtcreg = val & 31; - break; + /* Emulated CRTC, register select */ + case 0x3b0: + case 0x3b2: + case 0x3b4: + case 0x3b6: + case 0x3d0: + case 0x3d2: + case 0x3d4: + case 0x3d6: + wy700->cga_crtcreg = val & 31; + break; - /* Emulated CRTC, value */ - case 0x3b1: case 0x3b3: case 0x3b5: case 0x3b7: - case 0x3d1: case 0x3d3: case 0x3d5: case 0x3d7: - wy700->cga_crtc[wy700->cga_crtcreg] = val; + /* Emulated CRTC, value */ + case 0x3b1: + case 0x3b3: + case 0x3b5: + case 0x3b7: + case 0x3d1: + case 0x3d3: + case 0x3d5: + case 0x3d7: + wy700->cga_crtc[wy700->cga_crtcreg] = val; - wy700_checkchanges(wy700); - wy700_recalctimings(wy700); - return; + wy700_checkchanges(wy700); + wy700_recalctimings(wy700); + return; - /* Emulated MDA / CGA control register */ - case 0x3b8: case 0x3D8: - wy700->cga_ctrl = val; - wy700_checkchanges(wy700); - return; - /* Emulated CGA colour register */ - case 0x3D9: - wy700->cga_colour = val; - return; - } + /* Emulated MDA / CGA control register */ + case 0x3b8: + case 0x3D8: + wy700->cga_ctrl = val; + wy700_checkchanges(wy700); + return; + /* Emulated CGA colour register */ + case 0x3D9: + wy700->cga_colour = val; + return; + } } -uint8_t wy700_in(uint16_t addr, void *p) +uint8_t +wy700_in(uint16_t addr, void *p) { - wy700_t *wy700 = (wy700_t *)p; - switch (addr) - { - case 0x3b0: case 0x3b2: case 0x3b4: case 0x3b6: - case 0x3d0: case 0x3d2: case 0x3d4: case 0x3d6: - return wy700->cga_crtcreg; - case 0x3b1: case 0x3b3: case 0x3b5: case 0x3b7: - case 0x3d1: case 0x3d3: case 0x3d5: case 0x3d7: - return wy700->cga_crtc[wy700->cga_crtcreg]; - case 0x3b8: case 0x3d8: - return wy700->cga_ctrl; - case 0x3d9: - return wy700->cga_colour; - case 0x3ba: - return wy700->mda_stat; - case 0x3da: - return wy700->cga_stat; - } - return 0xff; + wy700_t *wy700 = (wy700_t *) p; + switch (addr) { + case 0x3b0: + case 0x3b2: + case 0x3b4: + case 0x3b6: + case 0x3d0: + case 0x3d2: + case 0x3d4: + case 0x3d6: + return wy700->cga_crtcreg; + case 0x3b1: + case 0x3b3: + case 0x3b5: + case 0x3b7: + case 0x3d1: + case 0x3d3: + case 0x3d5: + case 0x3d7: + return wy700->cga_crtc[wy700->cga_crtcreg]; + case 0x3b8: + case 0x3d8: + return wy700->cga_ctrl; + case 0x3d9: + return wy700->cga_colour; + case 0x3ba: + return wy700->mda_stat; + case 0x3da: + return wy700->cga_stat; + } + return 0xff; } - /* Check if any of the four key registers has changed. If so, check for a * mode change or cursor size change */ -void wy700_checkchanges(wy700_t *wy700) +void +wy700_checkchanges(wy700_t *wy700) { - uint8_t curstart, curend; + uint8_t curstart, curend; - if (wy700->last_03D8 == wy700->cga_ctrl && - wy700->last_03DD == (wy700->wy700_base & 0xFF) && - wy700->last_03DF == wy700->wy700_control && - wy700->last_crtc_0E == wy700->cga_crtc[0x0E]) - { - return; /* Nothing changed */ - } - /* Check for control register changes */ - if (wy700->last_03DF != wy700->wy700_control) - { - wy700->last_03DF = wy700->wy700_control; + if (wy700->last_03D8 == wy700->cga_ctrl && wy700->last_03DD == (wy700->wy700_base & 0xFF) && wy700->last_03DF == wy700->wy700_control && wy700->last_crtc_0E == wy700->cga_crtc[0x0E]) { + return; /* Nothing changed */ + } + /* Check for control register changes */ + if (wy700->last_03DF != wy700->wy700_control) { + wy700->last_03DF = wy700->wy700_control; - /* Values 1-7 are commands. */ - switch (wy700->wy700_control) - { - case 1: /* Reset */ - wy700->font = 0; - wy700->enabled = 1; - wy700->detach = 0; - break; + /* Values 1-7 are commands. */ + switch (wy700->wy700_control) { + case 1: /* Reset */ + wy700->font = 0; + wy700->enabled = 1; + wy700->detach = 0; + break; - case 2: /* Font 1 */ - wy700->font = 0; - break; + case 2: /* Font 1 */ + wy700->font = 0; + break; - case 3: /* Font 2 */ - wy700->font = 1; - break; + case 3: /* Font 2 */ + wy700->font = 1; + break; -/* Even with the microprogram from an original card, I can't really work out - * what commands 4 and 5 (which I've called 'cursor detach' / 'cursor attach') - * do. Command 4 sets a flag in microcontroller RAM, and command 5 clears - * it. When the flag is set, the real cursor doesn't track the cursor in the - * emulated CRTC, and its blink rate increases. Possibly it's a self-test - * function of some kind. - * - * The card documentation doesn't cover these commands. - */ + /* Even with the microprogram from an original card, I can't really work out + * what commands 4 and 5 (which I've called 'cursor detach' / 'cursor attach') + * do. Command 4 sets a flag in microcontroller RAM, and command 5 clears + * it. When the flag is set, the real cursor doesn't track the cursor in the + * emulated CRTC, and its blink rate increases. Possibly it's a self-test + * function of some kind. + * + * The card documentation doesn't cover these commands. + */ - case 4: /* Detach cursor */ - wy700->detach = 1; - break; + case 4: /* Detach cursor */ + wy700->detach = 1; + break; - case 5: /* Attach cursor */ - wy700->detach = 0; - break; + case 5: /* Attach cursor */ + wy700->detach = 0; + break; - case 6: /* Disable display */ - wy700->enabled = 0; - break; + case 6: /* Disable display */ + wy700->enabled = 0; + break; - case 7: /* Enable display */ - wy700->enabled = 1; - break; - } - /* A control write with the top bit set selects graphics mode */ - if (wy700->wy700_control & 0x80) - { - /* Select hi-res graphics mode; map framebuffer at A0000 */ - mem_mapping_set_addr(&wy700->mapping, 0xa0000, 0x20000); - wy700->wy700_mode = wy700->wy700_control; + case 7: /* Enable display */ + wy700->enabled = 1; + break; + } + /* A control write with the top bit set selects graphics mode */ + if (wy700->wy700_control & 0x80) { + /* Select hi-res graphics mode; map framebuffer at A0000 */ + mem_mapping_set_addr(&wy700->mapping, 0xa0000, 0x20000); + wy700->wy700_mode = wy700->wy700_control; - /* Select appropriate preset timings */ - if (wy700->wy700_mode & 0x40) - { - memcpy(wy700->real_crtc, mode_1280x800, - sizeof(mode_1280x800)); - } - else if (wy700->wy700_mode & 0x20) - { - memcpy(wy700->real_crtc, mode_1280x400, - sizeof(mode_1280x400)); - } - else - { - memcpy(wy700->real_crtc, mode_640x400, - sizeof(mode_640x400)); - } - } - } - /* An attempt to program the CGA / MDA selects low-res mode */ - else if (wy700->last_03D8 != wy700->cga_ctrl) - { - wy700->last_03D8 = wy700->cga_ctrl; - /* Set lo-res text or graphics mode. - * (Strictly speaking, when not in hi-res mode the card - * should be mapped at B0000-B3FFF and B8000-BBFFF, leaving - * a 16k hole between the two ranges) */ - mem_mapping_set_addr(&wy700->mapping, 0xb0000, 0x0C000); - if (wy700->cga_ctrl & 2) /* Graphics mode */ - { - wy700->wy700_mode = (wy700->cga_ctrl & 0x10) ? 6 : 4; - memcpy(wy700->real_crtc, mode_640x200, - sizeof(mode_640x200)); - } - else if (wy700->cga_ctrl & 1) /* Text mode 80x24 */ - { - wy700->wy700_mode = 2; - memcpy(wy700->real_crtc, mode_80x24, sizeof(mode_80x24)); - } - else /* Text mode 40x24 */ - { - wy700->wy700_mode = 0; - memcpy(wy700->real_crtc, mode_40x24, sizeof(mode_40x24)); - } - } - /* Convert the cursor sizes from the ones used by the CGA or MDA - * to native */ + /* Select appropriate preset timings */ + if (wy700->wy700_mode & 0x40) { + memcpy(wy700->real_crtc, mode_1280x800, + sizeof(mode_1280x800)); + } else if (wy700->wy700_mode & 0x20) { + memcpy(wy700->real_crtc, mode_1280x400, + sizeof(mode_1280x400)); + } else { + memcpy(wy700->real_crtc, mode_640x400, + sizeof(mode_640x400)); + } + } + } + /* An attempt to program the CGA / MDA selects low-res mode */ + else if (wy700->last_03D8 != wy700->cga_ctrl) { + wy700->last_03D8 = wy700->cga_ctrl; + /* Set lo-res text or graphics mode. + * (Strictly speaking, when not in hi-res mode the card + * should be mapped at B0000-B3FFF and B8000-BBFFF, leaving + * a 16k hole between the two ranges) */ + mem_mapping_set_addr(&wy700->mapping, 0xb0000, 0x0C000); + if (wy700->cga_ctrl & 2) /* Graphics mode */ + { + wy700->wy700_mode = (wy700->cga_ctrl & 0x10) ? 6 : 4; + memcpy(wy700->real_crtc, mode_640x200, + sizeof(mode_640x200)); + } else if (wy700->cga_ctrl & 1) /* Text mode 80x24 */ + { + wy700->wy700_mode = 2; + memcpy(wy700->real_crtc, mode_80x24, sizeof(mode_80x24)); + } else /* Text mode 40x24 */ + { + wy700->wy700_mode = 0; + memcpy(wy700->real_crtc, mode_40x24, sizeof(mode_40x24)); + } + } + /* Convert the cursor sizes from the ones used by the CGA or MDA + * to native */ - if (wy700->cga_crtc[9] == 13) /* MDA scaling */ - { - curstart = wy700->cga_crtc[10] & 0x1F; - wy700->real_crtc[10] = ((curstart + 5) >> 3) + curstart; - if (wy700->real_crtc[10] > 31) wy700->real_crtc[10] = 31; - /* And bring 'cursor disabled' flag across */ - if ((wy700->cga_crtc[10] & 0x60) == 0x20) - { - wy700->real_crtc[10] |= 0x20; - } - curend = wy700->cga_crtc[11] & 0x1F; - wy700->real_crtc[11] = ((curend + 5) >> 3) + curend; - if (wy700->real_crtc[11] > 31) wy700->real_crtc[11] = 31; - } - else /* CGA scaling */ - { - curstart = wy700->cga_crtc[10] & 0x1F; - wy700->real_crtc[10] = curstart << 1; - if (wy700->real_crtc[10] > 31) wy700->real_crtc[10] = 31; - /* And bring 'cursor disabled' flag across */ - if ((wy700->cga_crtc[10] & 0x60) == 0x20) - { - wy700->real_crtc[10] |= 0x20; - } - curend = wy700->cga_crtc[11] & 0x1F; - wy700->real_crtc[11] = curend << 1; - if (wy700->real_crtc[11] > 31) wy700->real_crtc[11] = 31; - } + if (wy700->cga_crtc[9] == 13) /* MDA scaling */ + { + curstart = wy700->cga_crtc[10] & 0x1F; + wy700->real_crtc[10] = ((curstart + 5) >> 3) + curstart; + if (wy700->real_crtc[10] > 31) + wy700->real_crtc[10] = 31; + /* And bring 'cursor disabled' flag across */ + if ((wy700->cga_crtc[10] & 0x60) == 0x20) { + wy700->real_crtc[10] |= 0x20; + } + curend = wy700->cga_crtc[11] & 0x1F; + wy700->real_crtc[11] = ((curend + 5) >> 3) + curend; + if (wy700->real_crtc[11] > 31) + wy700->real_crtc[11] = 31; + } else /* CGA scaling */ + { + curstart = wy700->cga_crtc[10] & 0x1F; + wy700->real_crtc[10] = curstart << 1; + if (wy700->real_crtc[10] > 31) + wy700->real_crtc[10] = 31; + /* And bring 'cursor disabled' flag across */ + if ((wy700->cga_crtc[10] & 0x60) == 0x20) { + wy700->real_crtc[10] |= 0x20; + } + curend = wy700->cga_crtc[11] & 0x1F; + wy700->real_crtc[11] = curend << 1; + if (wy700->real_crtc[11] > 31) + wy700->real_crtc[11] = 31; + } } - -void wy700_write(uint32_t addr, uint8_t val, void *p) +void +wy700_write(uint32_t addr, uint8_t val, void *p) { - wy700_t *wy700 = (wy700_t *)p; + wy700_t *wy700 = (wy700_t *) p; - if (wy700->wy700_mode & 0x80) /* High-res mode. */ - { - addr &= 0xFFFF; -/* In 800-line modes, bit 1 of the control register sets the high bit of the - * write address. */ - if ((wy700->wy700_mode & 0x42) == 0x42) - { - addr |= 0x10000; - } - wy700->vram[addr] = val; - } - else - { - wy700->vram[addr & 0x3fff] = val; - } + if (wy700->wy700_mode & 0x80) /* High-res mode. */ + { + addr &= 0xFFFF; + /* In 800-line modes, bit 1 of the control register sets the high bit of the + * write address. */ + if ((wy700->wy700_mode & 0x42) == 0x42) { + addr |= 0x10000; + } + wy700->vram[addr] = val; + } else { + wy700->vram[addr & 0x3fff] = val; + } } - - -uint8_t wy700_read(uint32_t addr, void *p) +uint8_t +wy700_read(uint32_t addr, void *p) { - wy700_t *wy700 = (wy700_t *)p; - if (wy700->wy700_mode & 0x80) /* High-res mode. */ - { - addr &= 0xFFFF; -/* In 800-line modes, bit 0 of the control register sets the high bit of the - * read address. */ - if ((wy700->wy700_mode & 0x41) == 0x41) - { - addr |= 0x10000; - } - return wy700->vram[addr]; - } - else - { - return wy700->vram[addr & 0x3fff]; - } + wy700_t *wy700 = (wy700_t *) p; + if (wy700->wy700_mode & 0x80) /* High-res mode. */ + { + addr &= 0xFFFF; + /* In 800-line modes, bit 0 of the control register sets the high bit of the + * read address. */ + if ((wy700->wy700_mode & 0x41) == 0x41) { + addr |= 0x10000; + } + return wy700->vram[addr]; + } else { + return wy700->vram[addr & 0x3fff]; + } } - - -void wy700_recalctimings(wy700_t *wy700) +void +wy700_recalctimings(wy700_t *wy700) { - double disptime; - double _dispontime, _dispofftime; + double disptime; + double _dispontime, _dispofftime; - disptime = wy700->real_crtc[0] + 1; - _dispontime = wy700->real_crtc[1]; - _dispofftime = disptime - _dispontime; - _dispontime *= MDACONST; - _dispofftime *= MDACONST; - wy700->dispontime = (uint64_t)(_dispontime); - wy700->dispofftime = (uint64_t)(_dispofftime); + disptime = wy700->real_crtc[0] + 1; + _dispontime = wy700->real_crtc[1]; + _dispofftime = disptime - _dispontime; + _dispontime *= MDACONST; + _dispofftime *= MDACONST; + wy700->dispontime = (uint64_t) (_dispontime); + wy700->dispofftime = (uint64_t) (_dispofftime); } - /* Draw a single line of the screen in either text mode */ -void wy700_textline(wy700_t *wy700) +void +wy700_textline(wy700_t *wy700) { - int x; - int w = (wy700->wy700_mode == 0) ? 40 : 80; - int cw = (wy700->wy700_mode == 0) ? 32 : 16; - uint8_t chr, attr; - uint8_t bitmap[2]; - uint8_t *fontbase = &fontdatw[0][0]; - int blink, c; - int drawcursor, cursorline; - int mda = 0; - uint16_t addr; - uint8_t sc; - uint16_t ma = (wy700->cga_crtc[13] | (wy700->cga_crtc[12] << 8)) & 0x3fff; - uint16_t ca = (wy700->cga_crtc[15] | (wy700->cga_crtc[14] << 8)) & 0x3fff; + int x; + int w = (wy700->wy700_mode == 0) ? 40 : 80; + int cw = (wy700->wy700_mode == 0) ? 32 : 16; + uint8_t chr, attr; + uint8_t bitmap[2]; + uint8_t *fontbase = &fontdatw[0][0]; + int blink, c; + int drawcursor, cursorline; + int mda = 0; + uint16_t addr; + uint8_t sc; + uint16_t ma = (wy700->cga_crtc[13] | (wy700->cga_crtc[12] << 8)) & 0x3fff; + uint16_t ca = (wy700->cga_crtc[15] | (wy700->cga_crtc[14] << 8)) & 0x3fff; + /* The fake CRTC character height register selects whether MDA or CGA + * attributes are used */ + if (wy700->cga_crtc[9] == 0 || wy700->cga_crtc[9] == 13) { + mda = 1; + } -/* The fake CRTC character height register selects whether MDA or CGA - * attributes are used */ - if (wy700->cga_crtc[9] == 0 || wy700->cga_crtc[9] == 13) - { - mda = 1; - } + if (wy700->font) { + fontbase += 256 * 32; + } + addr = ((ma & ~1) + (wy700->displine >> 5) * w) * 2; + sc = (wy700->displine >> 1) & 15; - if (wy700->font) - { - fontbase += 256*32; - } - addr = ((ma & ~1) + (wy700->displine >> 5) * w) * 2; - sc = (wy700->displine >> 1) & 15; + ma += ((wy700->displine >> 5) * w); - ma += ((wy700->displine >> 5) * w); + if ((wy700->real_crtc[10] & 0x60) == 0x20) { + cursorline = 0; + } else { + cursorline = ((wy700->real_crtc[10] & 0x1F) <= sc) && ((wy700->real_crtc[11] & 0x1F) >= sc); + } - if ((wy700->real_crtc[10] & 0x60) == 0x20) - { - cursorline = 0; - } - else - { - cursorline = ((wy700->real_crtc[10] & 0x1F) <= sc) && - ((wy700->real_crtc[11] & 0x1F) >= sc); - } + for (x = 0; x < w; x++) { + chr = wy700->vram[(addr + 2 * x) & 0x3FFF]; + attr = wy700->vram[(addr + 2 * x + 1) & 0x3FFF]; + drawcursor = ((ma == ca) && cursorline && wy700->enabled && (wy700->cga_ctrl & 8) && (wy700->blink & 16)); + blink = ((wy700->blink & 16) && (wy700->cga_ctrl & 0x20) && (attr & 0x80) && !drawcursor); - for (x = 0; x < w; x++) - { - chr = wy700->vram[(addr + 2 * x) & 0x3FFF]; - attr = wy700->vram[(addr + 2 * x + 1) & 0x3FFF]; - drawcursor = ((ma == ca) && cursorline && wy700->enabled && - (wy700->cga_ctrl & 8) && (wy700->blink & 16)); - blink = ((wy700->blink & 16) && - (wy700->cga_ctrl & 0x20) && - (attr & 0x80) && !drawcursor); + if (wy700->cga_ctrl & 0x20) + attr &= 0x7F; + /* MDA underline */ + if (sc == 14 && mda && ((attr & 7) == 1)) { + for (c = 0; c < cw; c++) + buffer32->line[wy700->displine][(x * cw) + c] = mdacols[attr][blink][1]; + } else /* Draw 16 pixels of character */ + { + bitmap[0] = fontbase[chr * 32 + 2 * sc]; + bitmap[1] = fontbase[chr * 32 + 2 * sc + 1]; + for (c = 0; c < 16; c++) { + int col; + if (c < 8) + col = (mda ? mdacols : cgacols)[attr][blink][(bitmap[0] & (1 << (c ^ 7))) ? 1 : 0]; + else + col = (mda ? mdacols : cgacols)[attr][blink][(bitmap[1] & (1 << ((c & 7) ^ 7))) ? 1 : 0]; + if (!(wy700->enabled) || !(wy700->cga_ctrl & 8)) + col = mdacols[0][0][0]; + if (w == 40) { + buffer32->line[wy700->displine][(x * cw) + 2 * c] = col; + buffer32->line[wy700->displine][(x * cw) + 2 * c + 1] = col; + } else + buffer32->line[wy700->displine][(x * cw) + c] = col; + } - if (wy700->cga_ctrl & 0x20) attr &= 0x7F; - /* MDA underline */ - if (sc == 14 && mda && ((attr & 7) == 1)) - { - for (c = 0; c < cw; c++) - buffer32->line[wy700->displine][(x * cw) + c] = - mdacols[attr][blink][1]; - } - else /* Draw 16 pixels of character */ - { - bitmap[0] = fontbase[chr * 32 + 2 * sc]; - bitmap[1] = fontbase[chr * 32 + 2 * sc + 1]; - for (c = 0; c < 16; c++) - { - int col; - if (c < 8) - col = (mda ? mdacols : cgacols)[attr][blink][(bitmap[0] & (1 << (c ^ 7))) ? 1 : 0]; - else col = (mda ? mdacols : cgacols)[attr][blink][(bitmap[1] & (1 << ((c & 7) ^ 7))) ? 1 : 0]; - if (!(wy700->enabled) || !(wy700->cga_ctrl & 8)) - col = mdacols[0][0][0]; - if (w == 40) - { - buffer32->line[wy700->displine][(x * cw) + 2*c] = col; - buffer32->line[wy700->displine][(x * cw) + 2*c + 1] = col; - } - else buffer32->line[wy700->displine][(x * cw) + c] = col; - } - - if (drawcursor) - { - for (c = 0; c < cw; c++) - buffer32->line[wy700->displine][(x * cw) + c] ^= (mda ? mdacols : cgacols)[attr][0][1]; - } - ++ma; - } - } + if (drawcursor) { + for (c = 0; c < cw; c++) + buffer32->line[wy700->displine][(x * cw) + c] ^= (mda ? mdacols : cgacols)[attr][0][1]; + } + ++ma; + } + } } - /* Draw a line in either of the CGA graphics modes (320x200 or 640x200) */ -void wy700_cgaline(wy700_t *wy700) +void +wy700_cgaline(wy700_t *wy700) { - int x, c; - uint32_t dat; - uint8_t ink = 0; - uint16_t addr; + int x, c; + uint32_t dat; + uint8_t ink = 0; + uint16_t addr; - uint16_t ma = (wy700->cga_crtc[13] | (wy700->cga_crtc[12] << 8)) & 0x3fff; - addr = ((wy700->displine >> 2) & 1) * 0x2000 + - (wy700->displine >> 3) * 80 + - ((ma & ~1) << 1); + uint16_t ma = (wy700->cga_crtc[13] | (wy700->cga_crtc[12] << 8)) & 0x3fff; + addr = ((wy700->displine >> 2) & 1) * 0x2000 + (wy700->displine >> 3) * 80 + ((ma & ~1) << 1); - /* The fixed mode setting here programs the real CRTC with a screen - * width to 20, so draw in 20 fixed chunks of 4 bytes each */ - for (x = 0; x < 20; x++) - { - dat = ((wy700->vram[addr & 0x3FFF] << 24) | - (wy700->vram[(addr+1) & 0x3FFF] << 16) | - (wy700->vram[(addr+2) & 0x3FFF] << 8) | - (wy700->vram[(addr+3) & 0x3FFF])); - addr += 4; + /* The fixed mode setting here programs the real CRTC with a screen + * width to 20, so draw in 20 fixed chunks of 4 bytes each */ + for (x = 0; x < 20; x++) { + dat = ((wy700->vram[addr & 0x3FFF] << 24) | (wy700->vram[(addr + 1) & 0x3FFF] << 16) | (wy700->vram[(addr + 2) & 0x3FFF] << 8) | (wy700->vram[(addr + 3) & 0x3FFF])); + addr += 4; - if (wy700->wy700_mode == 6) - { - for (c = 0; c < 32; c++) - { - ink = (dat & 0x80000000) ? 16 + 15: 16 + 0; - if (!(wy700->enabled) || !(wy700->cga_ctrl & 8)) - ink = 16; - buffer32->line[wy700->displine][x*64 + 2*c] = - buffer32->line[wy700->displine][x*64 + 2*c+1] = - ink; - dat = dat << 1; - } - } - else - { - for (c = 0; c < 16; c++) - { - switch ((dat >> 30) & 3) - { - case 0: ink = 16 + 0; break; - case 1: ink = 16 + 8; break; - case 2: ink = 16 + 7; break; - case 3: ink = 16 + 15; break; - } - if (!(wy700->enabled) || !(wy700->cga_ctrl & 8)) - ink = 16; - buffer32->line[wy700->displine][x*64 + 4*c] = - buffer32->line[wy700->displine][x*64 + 4*c+1] = - buffer32->line[wy700->displine][x*64 + 4*c+2] = - buffer32->line[wy700->displine][x*64 + 4*c+3] = - ink; - dat = dat << 2; - } - } - } + if (wy700->wy700_mode == 6) { + for (c = 0; c < 32; c++) { + ink = (dat & 0x80000000) ? 16 + 15 : 16 + 0; + if (!(wy700->enabled) || !(wy700->cga_ctrl & 8)) + ink = 16; + buffer32->line[wy700->displine][x * 64 + 2 * c] = buffer32->line[wy700->displine][x * 64 + 2 * c + 1] = ink; + dat = dat << 1; + } + } else { + for (c = 0; c < 16; c++) { + switch ((dat >> 30) & 3) { + case 0: + ink = 16 + 0; + break; + case 1: + ink = 16 + 8; + break; + case 2: + ink = 16 + 7; + break; + case 3: + ink = 16 + 15; + break; + } + if (!(wy700->enabled) || !(wy700->cga_ctrl & 8)) + ink = 16; + buffer32->line[wy700->displine][x * 64 + 4 * c] = buffer32->line[wy700->displine][x * 64 + 4 * c + 1] = buffer32->line[wy700->displine][x * 64 + 4 * c + 2] = buffer32->line[wy700->displine][x * 64 + 4 * c + 3] = ink; + dat = dat << 2; + } + } + } } /* Draw a line in the medium-resolution graphics modes (640x400 or 320x400) */ -void wy700_medresline(wy700_t *wy700) +void +wy700_medresline(wy700_t *wy700) { - int x, c; - uint32_t dat; - uint8_t ink = 0; - uint32_t addr; + int x, c; + uint32_t dat; + uint8_t ink = 0; + uint32_t addr; - addr = (wy700->displine >> 1) * 80 + 4 * wy700->wy700_base; + addr = (wy700->displine >> 1) * 80 + 4 * wy700->wy700_base; - for (x = 0; x < 20; x++) - { - dat = ((wy700->vram[addr & 0x1FFFF] << 24) | - (wy700->vram[(addr+1) & 0x1FFFF] << 16) | - (wy700->vram[(addr+2) & 0x1FFFF] << 8) | - (wy700->vram[(addr+3) & 0x1FFFF])); - addr += 4; + for (x = 0; x < 20; x++) { + dat = ((wy700->vram[addr & 0x1FFFF] << 24) | (wy700->vram[(addr + 1) & 0x1FFFF] << 16) | (wy700->vram[(addr + 2) & 0x1FFFF] << 8) | (wy700->vram[(addr + 3) & 0x1FFFF])); + addr += 4; - if (wy700->wy700_mode & 0x10) - { - for (c = 0; c < 16; c++) - { - switch ((dat >> 30) & 3) - { - case 0: ink = 16 + 0; break; - case 1: ink = 16 + 8; break; - case 2: ink = 16 + 7; break; - case 3: ink = 16 + 15; break; - } - /* Display disabled? */ - if (!(wy700->wy700_mode & 8)) ink = 16; - buffer32->line[wy700->displine][x*64 + 4*c] = - buffer32->line[wy700->displine][x*64 + 4*c+1] = - buffer32->line[wy700->displine][x*64 + 4*c+2] = - buffer32->line[wy700->displine][x*64 + 4*c+3] = - ink; - dat = dat << 2; - } - } - else - { - for (c = 0; c < 32; c++) - { - ink = (dat & 0x80000000) ? 16 + 15: 16 + 0; - /* Display disabled? */ - if (!(wy700->wy700_mode & 8)) ink = 16; - buffer32->line[wy700->displine][x*64 + 2*c] = - buffer32->line[wy700->displine][x*64 + 2*c+1] = - ink; - dat = dat << 1; - } - } - } + if (wy700->wy700_mode & 0x10) { + for (c = 0; c < 16; c++) { + switch ((dat >> 30) & 3) { + case 0: + ink = 16 + 0; + break; + case 1: + ink = 16 + 8; + break; + case 2: + ink = 16 + 7; + break; + case 3: + ink = 16 + 15; + break; + } + /* Display disabled? */ + if (!(wy700->wy700_mode & 8)) + ink = 16; + buffer32->line[wy700->displine][x * 64 + 4 * c] = buffer32->line[wy700->displine][x * 64 + 4 * c + 1] = buffer32->line[wy700->displine][x * 64 + 4 * c + 2] = buffer32->line[wy700->displine][x * 64 + 4 * c + 3] = ink; + dat = dat << 2; + } + } else { + for (c = 0; c < 32; c++) { + ink = (dat & 0x80000000) ? 16 + 15 : 16 + 0; + /* Display disabled? */ + if (!(wy700->wy700_mode & 8)) + ink = 16; + buffer32->line[wy700->displine][x * 64 + 2 * c] = buffer32->line[wy700->displine][x * 64 + 2 * c + 1] = ink; + dat = dat << 1; + } + } + } } - - - /* Draw a line in one of the high-resolution modes */ -void wy700_hiresline(wy700_t *wy700) +void +wy700_hiresline(wy700_t *wy700) { - int x, c; - uint32_t dat; - uint8_t ink = 0; - uint32_t addr; + int x, c; + uint32_t dat; + uint8_t ink = 0; + uint32_t addr; - addr = (wy700->displine >> 1) * 160 + 4 * wy700->wy700_base; + addr = (wy700->displine >> 1) * 160 + 4 * wy700->wy700_base; - if (wy700->wy700_mode & 0x40) /* 800-line interleaved modes */ - { - if (wy700->displine & 1) addr += 0x10000; - } - for (x = 0; x < 40; x++) - { - dat = ((wy700->vram[addr & 0x1FFFF] << 24) | - (wy700->vram[(addr+1) & 0x1FFFF] << 16) | - (wy700->vram[(addr+2) & 0x1FFFF] << 8) | - (wy700->vram[(addr+3) & 0x1FFFF])); - addr += 4; + if (wy700->wy700_mode & 0x40) /* 800-line interleaved modes */ + { + if (wy700->displine & 1) + addr += 0x10000; + } + for (x = 0; x < 40; x++) { + dat = ((wy700->vram[addr & 0x1FFFF] << 24) | (wy700->vram[(addr + 1) & 0x1FFFF] << 16) | (wy700->vram[(addr + 2) & 0x1FFFF] << 8) | (wy700->vram[(addr + 3) & 0x1FFFF])); + addr += 4; - if (wy700->wy700_mode & 0x10) - { - for (c = 0; c < 16; c++) - { - switch ((dat >> 30) & 3) - { - case 0: ink = 16 + 0; break; - case 1: ink = 16 + 8; break; - case 2: ink = 16 + 7; break; - case 3: ink = 16 + 15; break; - } - /* Display disabled? */ - if (!(wy700->wy700_mode & 8)) ink = 16; - buffer32->line[wy700->displine][x*32 + 2*c] = - buffer32->line[wy700->displine][x*32 + 2*c+1] = - ink; - dat = dat << 2; - } - } - else - { - for (c = 0; c < 32; c++) - { - ink = (dat & 0x80000000) ? 16 + 15: 16 + 0; - /* Display disabled? */ - if (!(wy700->wy700_mode & 8)) ink = 16; - buffer32->line[wy700->displine][x*32 + c] = ink; - dat = dat << 1; - } - } - } + if (wy700->wy700_mode & 0x10) { + for (c = 0; c < 16; c++) { + switch ((dat >> 30) & 3) { + case 0: + ink = 16 + 0; + break; + case 1: + ink = 16 + 8; + break; + case 2: + ink = 16 + 7; + break; + case 3: + ink = 16 + 15; + break; + } + /* Display disabled? */ + if (!(wy700->wy700_mode & 8)) + ink = 16; + buffer32->line[wy700->displine][x * 32 + 2 * c] = buffer32->line[wy700->displine][x * 32 + 2 * c + 1] = ink; + dat = dat << 2; + } + } else { + for (c = 0; c < 32; c++) { + ink = (dat & 0x80000000) ? 16 + 15 : 16 + 0; + /* Display disabled? */ + if (!(wy700->wy700_mode & 8)) + ink = 16; + buffer32->line[wy700->displine][x * 32 + c] = ink; + dat = dat << 1; + } + } + } } - - - -void wy700_poll(void *p) +void +wy700_poll(void *p) { - wy700_t *wy700 = (wy700_t *)p; - int mode; + wy700_t *wy700 = (wy700_t *) p; + int mode; - if (!wy700->linepos) - { - timer_advance_u64(&wy700->timer, wy700->dispofftime); - wy700->cga_stat |= 1; - wy700->mda_stat |= 1; - wy700->linepos = 1; - if (wy700->dispon) - { - if (wy700->displine == 0) - { - video_wait_for_buffer(); - } + if (!wy700->linepos) { + timer_advance_u64(&wy700->timer, wy700->dispofftime); + wy700->cga_stat |= 1; + wy700->mda_stat |= 1; + wy700->linepos = 1; + if (wy700->dispon) { + if (wy700->displine == 0) { + video_wait_for_buffer(); + } - if (wy700->wy700_mode & 0x80) - mode = wy700->wy700_mode & 0xF0; - else mode = wy700->wy700_mode & 0x0F; + if (wy700->wy700_mode & 0x80) + mode = wy700->wy700_mode & 0xF0; + else + mode = wy700->wy700_mode & 0x0F; - switch (mode) - { - default: - case 0x00: - case 0x02: - wy700_textline(wy700); - break; - case 0x04: - case 0x06: - wy700_cgaline(wy700); - break; - case 0x80: - case 0x90: - wy700_medresline(wy700); - break; - case 0xA0: - case 0xB0: - case 0xC0: - case 0xD0: - case 0xE0: - case 0xF0: - wy700_hiresline(wy700); - break; - } - } - wy700->displine++; - /* Hardcode a fixed refresh rate and VSYNC timing */ - if (wy700->displine == 800) /* Start of VSYNC */ - { - wy700->cga_stat |= 8; - wy700->dispon = 0; - } - if (wy700->displine == 832) /* End of VSYNC */ - { - wy700->displine = 0; - wy700->cga_stat &= ~8; - wy700->dispon = 1; - } + switch (mode) { + default: + case 0x00: + case 0x02: + wy700_textline(wy700); + break; + case 0x04: + case 0x06: + wy700_cgaline(wy700); + break; + case 0x80: + case 0x90: + wy700_medresline(wy700); + break; + case 0xA0: + case 0xB0: + case 0xC0: + case 0xD0: + case 0xE0: + case 0xF0: + wy700_hiresline(wy700); + break; + } } + wy700->displine++; + /* Hardcode a fixed refresh rate and VSYNC timing */ + if (wy700->displine == 800) /* Start of VSYNC */ + { + wy700->cga_stat |= 8; + wy700->dispon = 0; + } + if (wy700->displine == 832) /* End of VSYNC */ + { + wy700->displine = 0; + wy700->cga_stat &= ~8; + wy700->dispon = 1; + } + } else { + if (wy700->dispon) { + wy700->cga_stat &= ~1; + wy700->mda_stat &= ~1; + } + timer_advance_u64(&wy700->timer, wy700->dispontime); + wy700->linepos = 0; + + if (wy700->displine == 800) { + /* Hardcode 1280x800 window size */ + if ((WY700_XSIZE != xsize) || (WY700_YSIZE != ysize) || video_force_resize_get()) { + xsize = WY700_XSIZE; + ysize = WY700_YSIZE; + if (xsize < 64) + xsize = 656; + if (ysize < 32) + ysize = 200; + set_screen_size(xsize, ysize); + + if (video_force_resize_get()) + video_force_resize_set(0); + } + video_blit_memtoscreen_8(0, 0, xsize, ysize); + + frames++; + /* Fixed 1280x800 resolution */ + video_res_x = WY700_XSIZE; + video_res_y = WY700_YSIZE; + if (wy700->wy700_mode & 0x80) + mode = wy700->wy700_mode & 0xF0; + else + mode = wy700->wy700_mode & 0x0F; + switch (mode) { + case 0x00: + case 0x02: + video_bpp = 0; + break; + case 0x04: + case 0x90: + case 0xB0: + case 0xD0: + case 0xF0: + video_bpp = 2; + break; + default: + video_bpp = 1; + break; + } + wy700->blink++; + } + } +} + +void * +wy700_init(const device_t *info) +{ + int c; + wy700_t *wy700 = malloc(sizeof(wy700_t)); + memset(wy700, 0, sizeof(wy700_t)); + video_inform(VIDEO_FLAG_TYPE_CGA, &timing_wy700); + + /* 128k video RAM */ + wy700->vram = malloc(0x20000); + + loadfont("roms/video/wyse700/wy700.rom", 3); + + timer_add(&wy700->timer, wy700_poll, wy700, 1); + + /* Occupy memory between 0xB0000 and 0xBFFFF (moves to 0xA0000 in + * high-resolution modes) */ + mem_mapping_add(&wy700->mapping, 0xb0000, 0x10000, wy700_read, NULL, NULL, wy700_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, wy700); + /* Respond to both MDA and CGA I/O ports */ + io_sethandler(0x03b0, 0x000C, wy700_in, NULL, NULL, wy700_out, NULL, NULL, wy700); + io_sethandler(0x03d0, 0x0010, wy700_in, NULL, NULL, wy700_out, NULL, NULL, wy700); + + /* Set up the emulated attributes. + * CGA is done in four groups: 00-0F, 10-7F, 80-8F, 90-FF */ + for (c = 0; c < 0x10; c++) { + cgacols[c][0][0] = cgacols[c][1][0] = cgacols[c][1][1] = 16; + if (c & 8) + cgacols[c][0][1] = 15 + 16; else - { - if (wy700->dispon) - { - wy700->cga_stat &= ~1; - wy700->mda_stat &= ~1; - } - timer_advance_u64(&wy700->timer, wy700->dispontime); - wy700->linepos = 0; + cgacols[c][0][1] = 7 + 16; + } + for (c = 0x10; c < 0x80; c++) { + cgacols[c][0][0] = cgacols[c][1][0] = cgacols[c][1][1] = 16 + 7; + if (c & 8) + cgacols[c][0][1] = 15 + 16; + else + cgacols[c][0][1] = 0 + 16; - if (wy700->displine == 800) - { -/* Hardcode 1280x800 window size */ - if ((WY700_XSIZE != xsize) || (WY700_YSIZE != ysize) || video_force_resize_get()) - { - xsize = WY700_XSIZE; - ysize = WY700_YSIZE; - if (xsize < 64) xsize = 656; - if (ysize < 32) ysize = 200; - set_screen_size(xsize, ysize); + if ((c & 0x0F) == 8) + cgacols[c][0][1] = 8 + 16; + } + /* With special cases for 00, 11, 22, ... 77 */ + cgacols[0x00][0][1] = cgacols[0x00][1][1] = 16; + for (c = 0x11; c <= 0x77; c += 0x11) { + cgacols[c][0][1] = cgacols[c][1][1] = 16 + 7; + } + for (c = 0x80; c < 0x90; c++) { + cgacols[c][0][0] = 16 + 8; + if (c & 8) + cgacols[c][0][1] = 15 + 16; + else + cgacols[c][0][1] = 7 + 16; + cgacols[c][1][0] = cgacols[c][1][1] = cgacols[c - 0x80][0][0]; + } + for (c = 0x90; c < 0x100; c++) { + cgacols[c][0][0] = 16 + 15; + if (c & 8) + cgacols[c][0][1] = 8 + 16; + else + cgacols[c][0][1] = 7 + 16; + if ((c & 0x0F) == 0) + cgacols[c][0][1] = 16; + cgacols[c][1][0] = cgacols[c][1][1] = cgacols[c - 0x80][0][0]; + } + /* Also special cases for 99, AA, ..., FF */ + for (c = 0x99; c <= 0xFF; c += 0x11) { + cgacols[c][0][1] = 16 + 15; + } + /* Special cases for 08, 80 and 88 */ + cgacols[0x08][0][1] = 16 + 8; + cgacols[0x80][0][1] = 16; + cgacols[0x88][0][1] = 16 + 8; - if (video_force_resize_get()) - video_force_resize_set(0); - } - video_blit_memtoscreen_8(0, 0, xsize, ysize); + /* MDA attributes */ + for (c = 0; c < 256; c++) { + mdacols[c][0][0] = mdacols[c][1][0] = mdacols[c][1][1] = 16; + if (c & 8) + mdacols[c][0][1] = 15 + 16; + else + mdacols[c][0][1] = 7 + 16; + } + mdacols[0x70][0][1] = 16; + mdacols[0x70][0][0] = mdacols[0x70][1][0] = mdacols[0x70][1][1] = 16 + 15; + mdacols[0xF0][0][1] = 16; + mdacols[0xF0][0][0] = mdacols[0xF0][1][0] = mdacols[0xF0][1][1] = 16 + 15; + mdacols[0x78][0][1] = 16 + 7; + mdacols[0x78][0][0] = mdacols[0x78][1][0] = mdacols[0x78][1][1] = 16 + 15; + mdacols[0xF8][0][1] = 16 + 7; + mdacols[0xF8][0][0] = mdacols[0xF8][1][0] = mdacols[0xF8][1][1] = 16 + 15; + mdacols[0x00][0][1] = mdacols[0x00][1][1] = 16; + mdacols[0x08][0][1] = mdacols[0x08][1][1] = 16; + mdacols[0x80][0][1] = mdacols[0x80][1][1] = 16; + mdacols[0x88][0][1] = mdacols[0x88][1][1] = 16; - frames++; - /* Fixed 1280x800 resolution */ - video_res_x = WY700_XSIZE; - video_res_y = WY700_YSIZE; - if (wy700->wy700_mode & 0x80) - mode = wy700->wy700_mode & 0xF0; - else mode = wy700->wy700_mode & 0x0F; - switch(mode) - { - case 0x00: - case 0x02: video_bpp = 0; break; - case 0x04: - case 0x90: - case 0xB0: - case 0xD0: - case 0xF0: video_bpp = 2; break; - default: video_bpp = 1; break; - } - wy700->blink++; - } - } + /* Start off in 80x25 text mode */ + wy700->cga_stat = 0xF4; + wy700->wy700_mode = 2; + wy700->enabled = 1; + memcpy(wy700->real_crtc, mode_80x24, sizeof(mode_80x24)); + return wy700; } - -void *wy700_init(const device_t *info) +void +wy700_close(void *p) { - int c; - wy700_t *wy700 = malloc(sizeof(wy700_t)); - memset(wy700, 0, sizeof(wy700_t)); - video_inform(VIDEO_FLAG_TYPE_CGA, &timing_wy700); + wy700_t *wy700 = (wy700_t *) p; - /* 128k video RAM */ - wy700->vram = malloc(0x20000); - - loadfont("roms/video/wyse700/wy700.rom", 3); - - timer_add(&wy700->timer, wy700_poll, wy700, 1); - - /* Occupy memory between 0xB0000 and 0xBFFFF (moves to 0xA0000 in - * high-resolution modes) */ - mem_mapping_add(&wy700->mapping, 0xb0000, 0x10000, wy700_read, NULL, NULL, wy700_write, NULL, NULL, NULL, MEM_MAPPING_EXTERNAL, wy700); - /* Respond to both MDA and CGA I/O ports */ - io_sethandler(0x03b0, 0x000C, wy700_in, NULL, NULL, wy700_out, NULL, NULL, wy700); - io_sethandler(0x03d0, 0x0010, wy700_in, NULL, NULL, wy700_out, NULL, NULL, wy700); - - /* Set up the emulated attributes. - * CGA is done in four groups: 00-0F, 10-7F, 80-8F, 90-FF */ - for (c = 0; c < 0x10; c++) - { - cgacols[c][0][0] = cgacols[c][1][0] = cgacols[c][1][1] = 16; - if (c & 8) cgacols[c][0][1] = 15 + 16; - else cgacols[c][0][1] = 7 + 16; - } - for (c = 0x10; c < 0x80; c++) - { - cgacols[c][0][0] = cgacols[c][1][0] = cgacols[c][1][1] = 16 + 7; - if (c & 8) cgacols[c][0][1] = 15 + 16; - else cgacols[c][0][1] = 0 + 16; - - if ((c & 0x0F) == 8) cgacols[c][0][1] = 8 + 16; - } - /* With special cases for 00, 11, 22, ... 77 */ - cgacols[0x00][0][1] = cgacols[0x00][1][1] = 16; - for (c = 0x11; c <= 0x77; c += 0x11) - { - cgacols[c][0][1] = cgacols[c][1][1] = 16 + 7; - } - for (c = 0x80; c < 0x90; c++) - { - cgacols[c][0][0] = 16 + 8; - if (c & 8) cgacols[c][0][1] = 15 + 16; - else cgacols[c][0][1] = 7 + 16; - cgacols[c][1][0] = cgacols[c][1][1] = cgacols[c-0x80][0][0]; - } - for (c = 0x90; c < 0x100; c++) - { - cgacols[c][0][0] = 16 + 15; - if (c & 8) cgacols[c][0][1] = 8 + 16; - else cgacols[c][0][1] = 7 + 16; - if ((c & 0x0F) == 0) cgacols[c][0][1] = 16; - cgacols[c][1][0] = cgacols[c][1][1] = cgacols[c-0x80][0][0]; - } - /* Also special cases for 99, AA, ..., FF */ - for (c = 0x99; c <= 0xFF; c += 0x11) - { - cgacols[c][0][1] = 16 + 15; - } - /* Special cases for 08, 80 and 88 */ - cgacols[0x08][0][1] = 16 + 8; - cgacols[0x80][0][1] = 16; - cgacols[0x88][0][1] = 16 + 8; - - /* MDA attributes */ - for (c = 0; c < 256; c++) - { - mdacols[c][0][0] = mdacols[c][1][0] = mdacols[c][1][1] = 16; - if (c & 8) mdacols[c][0][1] = 15 + 16; - else mdacols[c][0][1] = 7 + 16; - } - mdacols[0x70][0][1] = 16; - mdacols[0x70][0][0] = mdacols[0x70][1][0] = mdacols[0x70][1][1] = 16 + 15; - mdacols[0xF0][0][1] = 16; - mdacols[0xF0][0][0] = mdacols[0xF0][1][0] = mdacols[0xF0][1][1] = 16 + 15; - mdacols[0x78][0][1] = 16 + 7; - mdacols[0x78][0][0] = mdacols[0x78][1][0] = mdacols[0x78][1][1] = 16 + 15; - mdacols[0xF8][0][1] = 16 + 7; - mdacols[0xF8][0][0] = mdacols[0xF8][1][0] = mdacols[0xF8][1][1] = 16 + 15; - mdacols[0x00][0][1] = mdacols[0x00][1][1] = 16; - mdacols[0x08][0][1] = mdacols[0x08][1][1] = 16; - mdacols[0x80][0][1] = mdacols[0x80][1][1] = 16; - mdacols[0x88][0][1] = mdacols[0x88][1][1] = 16; - -/* Start off in 80x25 text mode */ - wy700->cga_stat = 0xF4; - wy700->wy700_mode = 2; - wy700->enabled = 1; - memcpy(wy700->real_crtc, mode_80x24, sizeof(mode_80x24)); - return wy700; + free(wy700->vram); + free(wy700); } -void wy700_close(void *p) +void +wy700_speed_changed(void *p) { - wy700_t *wy700 = (wy700_t *)p; + wy700_t *wy700 = (wy700_t *) p; - free(wy700->vram); - free(wy700); -} - -void wy700_speed_changed(void *p) -{ - wy700_t *wy700 = (wy700_t *)p; - - wy700_recalctimings(wy700); + wy700_recalctimings(wy700); } const device_t wy700_device = { - .name = "Wyse 700", + .name = "Wyse 700", .internal_name = "wy700", - .flags = DEVICE_ISA, - .local = 0, - .init = wy700_init, - .close = wy700_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = wy700_init, + .close = wy700_close, + .reset = NULL, { .available = NULL }, .speed_changed = wy700_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index f6734627b..f8787fa53 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -35,10 +35,10 @@ #include <86box/vid_xga_device.h> #include "cpu.h" -#define XGA_BIOS_PATH "roms/video/xga/XGA_37F9576_Ver200.BIN" +#define XGA_BIOS_PATH "roms/video/xga/XGA_37F9576_Ver200.BIN" #define XGA2_BIOS_PATH "roms/video/xga/xga2_v300.bin" -static void xga_ext_outb(uint16_t addr, uint8_t val, void *p); +static void xga_ext_outb(uint16_t addr, uint8_t val, void *p); static uint8_t xga_ext_inb(uint16_t addr, void *p); static void @@ -46,7 +46,7 @@ xga_updatemapping(svga_t *svga) { xga_t *xga = &svga->xga; - //pclog("OpMode = %x, linear base = %08x, aperture cntl = %d, opmodereset1 = %d, access mode = %x, map = %x.\n", xga->op_mode, xga->linear_base, xga->aperture_cntl, xga->op_mode_reset, xga->access_mode, svga->gdcreg[6] & 0x0c); + // pclog("OpMode = %x, linear base = %08x, aperture cntl = %d, opmodereset1 = %d, access mode = %x, map = %x.\n", xga->op_mode, xga->linear_base, xga->aperture_cntl, xga->op_mode_reset, xga->access_mode, svga->gdcreg[6] & 0x0c); if ((xga->op_mode & 7) >= 4) { if (xga->aperture_cntl == 1) { mem_mapping_disable(&svga->mapping); @@ -72,7 +72,7 @@ linear: mem_mapping_disable(&xga->linear_mapping); } xga->on = 0; - vga_on = 1; + vga_on = 1; if (((xga->op_mode & 7) == 4) && ((svga->gdcreg[6] & 0x0c) == 0x0c) && !xga->a5_test) xga->linear_endian_reverse = 1; } else { @@ -99,7 +99,7 @@ linear: } mem_mapping_disable(&xga->linear_mapping); xga->on = 0; - vga_on = 1; + vga_on = 1; } } @@ -109,10 +109,10 @@ xga_recalctimings(svga_t *svga) xga_t *xga = &svga->xga; if (xga->on) { - xga->v_total = xga->vtotal + 1; - xga->dispend = xga->vdispend + 1; - xga->v_syncstart = xga->vsyncstart + 1; - xga->split = xga->linecmp + 1; + xga->v_total = xga->vtotal + 1; + xga->dispend = xga->vdispend + 1; + xga->v_syncstart = xga->vsyncstart + 1; + xga->split = xga->linecmp + 1; xga->v_blankstart = xga->vblankstart + 1; xga->h_disp = (xga->hdisp + 1) << 3; @@ -120,7 +120,7 @@ xga_recalctimings(svga_t *svga) xga->rowoffset = (xga->hdisp + 1); xga->interlace = !!(xga->disp_cntl_1 & 0x08); - xga->rowcount = (xga->disp_cntl_2 & 0xc0) >> 6; + xga->rowcount = (xga->disp_cntl_2 & 0xc0) >> 6; if (xga->interlace) { xga->v_total >>= 1; @@ -135,16 +135,16 @@ xga_recalctimings(svga_t *svga) switch (xga->clk_sel_1 & 0x0c) { case 0: if (xga->clk_sel_2 & 0x80) { - svga->clock = (cpuclock * (double)(1ull << 32)) / 41539000.0; + svga->clock = (cpuclock * (double) (1ull << 32)) / 41539000.0; } else { - svga->clock = (cpuclock * (double)(1ull << 32)) / 25175000.0; + svga->clock = (cpuclock * (double) (1ull << 32)) / 25175000.0; } break; case 4: - svga->clock = (cpuclock * (double)(1ull << 32)) / 28322000.0; + svga->clock = (cpuclock * (double) (1ull << 32)) / 28322000.0; break; case 0x0c: - svga->clock = (cpuclock * (double)(1ull << 32)) / 44900000.0; + svga->clock = (cpuclock * (double) (1ull << 32)) / 44900000.0; break; } } else { @@ -215,11 +215,11 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) break; case 0x30: - xga->hwc_pos_x = (xga->hwc_pos_x & 0x0700) | val; + xga->hwc_pos_x = (xga->hwc_pos_x & 0x0700) | val; xga->hwcursor.x = xga->hwc_pos_x; break; case 0x31: - xga->hwc_pos_x = (xga->hwc_pos_x & 0xff) | ((val & 0x07) << 8); + xga->hwc_pos_x = (xga->hwc_pos_x & 0xff) | ((val & 0x07) << 8); xga->hwcursor.x = xga->hwc_pos_x; break; @@ -229,11 +229,11 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) break; case 0x33: - xga->hwc_pos_y = (xga->hwc_pos_y & 0x0700) | val; + xga->hwc_pos_y = (xga->hwc_pos_y & 0x0700) | val; xga->hwcursor.y = xga->hwc_pos_y; break; case 0x34: - xga->hwc_pos_y = (xga->hwc_pos_y & 0xff) | ((val & 0x07) << 8); + xga->hwc_pos_y = (xga->hwc_pos_y & 0xff) | ((val & 0x07) << 8); xga->hwcursor.y = xga->hwc_pos_y; break; @@ -243,7 +243,7 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) break; case 0x36: - xga->hwc_control = val; + xga->hwc_control = val; xga->hwcursor.ena = xga->hwc_control & 1; break; @@ -306,12 +306,12 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) case 0x60: xga->sprite_pal_addr_idx = (xga->sprite_pal_addr_idx & 0x3f00) | val; - svga->dac_pos = 0; - svga->dac_addr = val & 0xff; + svga->dac_pos = 0; + svga->dac_addr = val & 0xff; break; case 0x61: xga->sprite_pal_addr_idx = (xga->sprite_pal_addr_idx & 0xff) | ((val & 0x3f) << 8); - xga->sprite_pos = xga->sprite_pal_addr_idx & 0x1ff; + xga->sprite_pos = xga->sprite_pal_addr_idx & 0x1ff; if ((xga->sprite_pos >= 0) && (xga->sprite_pos <= 16)) { if ((xga->op_mode & 7) >= 5) xga->cursor_data_on = 1; @@ -333,17 +333,17 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) xga->cursor_data_on = 0; } } - //pclog("Sprite POS = %d, data on = %d, idx = %d, apcntl = %d\n", xga->sprite_pos, xga->cursor_data_on, xga->sprite_pal_addr_idx, xga->aperture_cntl); + // pclog("Sprite POS = %d, data on = %d, idx = %d, apcntl = %d\n", xga->sprite_pos, xga->cursor_data_on, xga->sprite_pal_addr_idx, xga->aperture_cntl); break; case 0x62: xga->sprite_pal_addr_idx_prefetch = (xga->sprite_pal_addr_idx_prefetch & 0x3f00) | val; - svga->dac_pos = 0; - svga->dac_addr = val & 0xff; + svga->dac_pos = 0; + svga->dac_addr = val & 0xff; break; case 0x63: xga->sprite_pal_addr_idx_prefetch = (xga->sprite_pal_addr_idx_prefetch & 0xff) | ((val & 0x3f) << 8); - xga->sprite_pos_prefetch = xga->sprite_pal_addr_idx_prefetch & 0x1ff; + xga->sprite_pos_prefetch = xga->sprite_pal_addr_idx_prefetch & 0x1ff; break; case 0x64: @@ -362,14 +362,14 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) svga->dac_pos++; break; case 2: - xga->pal_b = val; - index = svga->dac_addr & 0xff; + xga->pal_b = val; + index = svga->dac_addr & 0xff; svga->vgapal[index].r = svga->dac_r; svga->vgapal[index].g = svga->dac_g; svga->vgapal[index].b = xga->pal_b; - svga->pallook[index] = makecol32(svga->vgapal[index].r, svga->vgapal[index].g, svga->vgapal[index].b); - svga->dac_pos = 0; - svga->dac_addr = (svga->dac_addr + 1) & 0xff; + svga->pallook[index] = makecol32(svga->vgapal[index].r, svga->vgapal[index].g, svga->vgapal[index].b); + svga->dac_pos = 0; + svga->dac_addr = (svga->dac_addr + 1) & 0xff; break; } break; @@ -390,7 +390,7 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) case 0x6a: xga->sprite_data[xga->sprite_pos] = val; - xga->sprite_pos = (xga->sprite_pos + 1) & 0x3ff; + xga->sprite_pos = (xga->sprite_pos + 1) & 0x3ff; break; case 0x70: @@ -403,10 +403,10 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) static void xga_ext_outb(uint16_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; - //pclog("[%04X:%08X]: EXT OUTB = %02x, val = %02x\n", CS, cpu_state.pc, addr, val); + // pclog("[%04X:%08X]: EXT OUTB = %02x, val = %02x\n", CS, cpu_state.pc, addr, val); switch (addr & 0x0f) { case 0: xga->op_mode = val; @@ -421,17 +421,17 @@ xga_ext_outb(uint16_t addr, uint8_t val, void *p) xga->aperture_cntl = 0; break; case 6: - vga_on = 0; + vga_on = 0; xga->on = 1; break; case 8: xga->ap_idx = val; - //pclog("Aperture CNTL = %d, val = %02x, up to bit6 = %02x\n", xga->aperture_cntl, val, val & 0x3f); + // pclog("Aperture CNTL = %d, val = %02x, up to bit6 = %02x\n", xga->aperture_cntl, val, val & 0x3f); if ((xga->op_mode & 7) < 4) { xga->write_bank = xga->read_bank = 0; } else { xga->write_bank = (xga->ap_idx & 0x3f) << 16; - xga->read_bank = xga->write_bank; + xga->read_bank = xga->write_bank; } break; case 9: @@ -454,8 +454,8 @@ xga_ext_outb(uint16_t addr, uint8_t val, void *p) static uint8_t xga_ext_inb(uint16_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; uint8_t ret, index; switch (addr & 0x0f) { @@ -629,9 +629,9 @@ xga_ext_inb(uint16_t addr, void *p) ret = svga->vgapal[index].g; break; case 2: - svga->dac_pos = 0; + svga->dac_pos = 0; svga->dac_addr = (svga->dac_addr + 1) & 0xff; - ret = svga->vgapal[index].b; + ret = svga->vgapal[index].b; break; } break; @@ -651,8 +651,8 @@ xga_ext_inb(uint16_t addr, void *p) break; case 0x6a: - //pclog("Sprite POS Read = %d, addr idx = %04x\n", xga->sprite_pos, xga->sprite_pal_addr_idx_prefetch); - ret = xga->sprite_data[xga->sprite_pos_prefetch]; + // pclog("Sprite POS Read = %d, addr idx = %04x\n", xga->sprite_pos, xga->sprite_pal_addr_idx_prefetch); + ret = xga->sprite_data[xga->sprite_pos_prefetch]; xga->sprite_pos_prefetch = (xga->sprite_pos_prefetch + 1) & 0x3ff; break; @@ -667,70 +667,114 @@ xga_ext_inb(uint16_t addr, void *p) break; } - //pclog("[%04X:%08X]: EXT INB = %02x, ret = %02x\n", CS, cpu_state.pc, addr, ret); + // pclog("[%04X:%08X]: EXT INB = %02x, ret = %02x\n", CS, cpu_state.pc, addr, ret); return ret; } - #define READ(addr, dat) \ dat = xga->vram[(addr) & (xga->vram_mask)]; -#define WRITE(addr, dat) \ - xga->vram[((addr)) & (xga->vram_mask)] = dat; \ +#define WRITE(addr, dat) \ + xga->vram[((addr)) & (xga->vram_mask)] = dat; \ xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = changeframecount; #define READW(addr, dat) \ - dat = *(uint16_t *)&xga->vram[(addr) & (xga->vram_mask)]; + dat = *(uint16_t *) &xga->vram[(addr) & (xga->vram_mask)]; -#define READW_REVERSE(addr, dat) \ +#define READW_REVERSE(addr, dat) \ dat = xga->vram[(addr + 1) & (xga->vram_mask - 1)] & 0xff; \ dat |= (xga->vram[(addr) & (xga->vram_mask - 1)] << 8); -#define WRITEW(addr, dat) \ - *(uint16_t *)&xga->vram[((addr)) & (xga->vram_mask)] = dat; \ +#define WRITEW(addr, dat) \ + *(uint16_t *) &xga->vram[((addr)) & (xga->vram_mask)] = dat; \ xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = changeframecount; -#define WRITEW_REVERSE(addr, dat) \ - xga->vram[((addr + 1)) & (xga->vram_mask - 1)] = dat & 0xff; \ - xga->vram[((addr)) & (xga->vram_mask - 1)] = dat >> 8; \ +#define WRITEW_REVERSE(addr, dat) \ + xga->vram[((addr + 1)) & (xga->vram_mask - 1)] = dat & 0xff; \ + xga->vram[((addr)) & (xga->vram_mask - 1)] = dat >> 8; \ xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = changeframecount; -#define ROP(mix, d, s) { \ - switch ((mix) ? (xga->accel.frgd_mix & 0x1f) : (xga->accel.bkgd_mix & 0x1f)) { \ - case 0x00: d = 0; break; \ - case 0x01: d = s & d; break; \ - case 0x02: d = s & ~d; break; \ - case 0x03: d = s; break; \ - case 0x04: d = ~s & d; break; \ - case 0x05: d = d; break; \ - case 0x06: d = s ^ d; break; \ - case 0x07: d = s | d; break; \ - case 0x08: d = ~s & ~d; break; \ - case 0x09: d = s ^ ~d; break; \ - case 0x0a: d = ~d; break; \ - case 0x0b: d = s | ~d; break; \ - case 0x0c: d = ~s; break; \ - case 0x0d: d = ~s | d; break; \ - case 0x0e: d = ~s | ~d; break; \ - case 0x0f: d = ~0; break; \ - case 0x10: d = MAX(s, d); break; \ - case 0x11: d = MIN(s, d); break; \ - case 0x12: d = MIN(0xff, s + d); break; \ - case 0x13: d = MAX(0, d - s); break; \ - case 0x14: d = MAX(0, s - d); break; \ - case 0x15: d = (s + d) >> 1; break; \ - } \ - } +#define ROP(mix, d, s) \ + { \ + switch ((mix) ? (xga->accel.frgd_mix & 0x1f) : (xga->accel.bkgd_mix & 0x1f)) { \ + case 0x00: \ + d = 0; \ + break; \ + case 0x01: \ + d = s & d; \ + break; \ + case 0x02: \ + d = s & ~d; \ + break; \ + case 0x03: \ + d = s; \ + break; \ + case 0x04: \ + d = ~s & d; \ + break; \ + case 0x05: \ + d = d; \ + break; \ + case 0x06: \ + d = s ^ d; \ + break; \ + case 0x07: \ + d = s | d; \ + break; \ + case 0x08: \ + d = ~s & ~d; \ + break; \ + case 0x09: \ + d = s ^ ~d; \ + break; \ + case 0x0a: \ + d = ~d; \ + break; \ + case 0x0b: \ + d = s | ~d; \ + break; \ + case 0x0c: \ + d = ~s; \ + break; \ + case 0x0d: \ + d = ~s | d; \ + break; \ + case 0x0e: \ + d = ~s | ~d; \ + break; \ + case 0x0f: \ + d = ~0; \ + break; \ + case 0x10: \ + d = MAX(s, d); \ + break; \ + case 0x11: \ + d = MIN(s, d); \ + break; \ + case 0x12: \ + d = MIN(0xff, s + d); \ + break; \ + case 0x13: \ + d = MAX(0, d - s); \ + break; \ + case 0x14: \ + d = MAX(0, s - d); \ + break; \ + case 0x15: \ + d = (s + d) >> 1; \ + break; \ + } \ + } static uint32_t xga_accel_read_pattern_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int width) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t addr = base; - int bits; + int bits; uint32_t byte; - uint8_t px; - int skip = 0; + uint8_t px; + int skip = 0; if (xga->base_addr_1mb) { if (addr < xga->base_addr_1mb || (addr > (xga->base_addr_1mb + 0xfffff))) @@ -759,16 +803,15 @@ xga_accel_read_pattern_map_pixel(svga_t *svga, int x, int y, int map, uint32_t b return px; } - static uint32_t xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int width) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t addr = base; - int bits; + int bits; uint32_t byte; - uint8_t px; - int skip = 0; + uint8_t px; + int skip = 0; if (xga->base_addr_1mb) { if (addr < xga->base_addr_1mb || (addr > (xga->base_addr_1mb + 0xfffff))) @@ -831,10 +874,10 @@ xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int static void xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, uint32_t pixel, int width) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t addr = base; - uint8_t byte, mask; - int skip = 0; + uint8_t byte, mask; + int skip = 0; if (xga->base_addr_1mb) { if (addr < xga->base_addr_1mb || (addr > (xga->base_addr_1mb + 0xfffff))) @@ -848,11 +891,11 @@ xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, ui case 0: /*1-bit*/ addr += (y * (width) >> 3); addr += (x >> 3); - if (!skip) { + if (!skip) { READ(addr, byte); - } else { + } else { byte = mem_readb_phys(addr); - } + } if ((xga->accel.px_map_format[map] & 8) && !(xga->access_mode & 8)) { if (xga->linear_endian_reverse) mask = 1 << (7 - (x & 7)); @@ -905,15 +948,15 @@ xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, ui static void xga_short_stroke(svga_t *svga, uint8_t ssv) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t src_dat, dest_dat, old_dest_dat; - uint32_t color_cmp = xga->accel.color_cmp; + uint32_t color_cmp = xga->accel.color_cmp; uint32_t plane_mask = xga->accel.plane_mask; - uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; - uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; - int y = ssv & 0x0f; - int x = 0; - int dx, dy, dirx = 0, diry = 0; + uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; + uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; + int y = ssv & 0x0f; + int x = 0; + int dx, dy, dirx = 0, diry = 0; dx = xga->accel.dst_map_x & 0x1fff; if (xga->accel.dst_map_x & 0x1800) @@ -961,18 +1004,11 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) if (xga->accel.pat_src == 8) { while (y >= 0) { if (xga->accel.command & 0xc0) { - if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && - (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -989,16 +1025,10 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) } } } else { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1031,37 +1061,40 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) xga->accel.dst_map_y = dy; } -#define SWAP(a,b) tmpswap = a; a = b; b = tmpswap; +#define SWAP(a, b) \ + tmpswap = a; \ + a = b; \ + b = tmpswap; static void xga_line_draw_write(svga_t *svga) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t src_dat, dest_dat, old_dest_dat; - uint32_t color_cmp = xga->accel.color_cmp; + uint32_t color_cmp = xga->accel.color_cmp; uint32_t plane_mask = xga->accel.plane_mask; - uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; - uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; - int dminor, destxtmp, dmajor, err, tmpswap; - int steep = 1; - int xdir, ydir; - int y = xga->accel.blt_width; - int x = 0; - int dx, dy; + uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; + uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; + int dminor, destxtmp, dmajor, err, tmpswap; + int steep = 1; + int xdir, ydir; + int y = xga->accel.blt_width; + int x = 0; + int dx, dy; - dminor = ((int16_t)xga->accel.bres_k1); - if (xga->accel.bres_k1 & 0x2000) + dminor = ((int16_t) xga->accel.bres_k1); + if (xga->accel.bres_k1 & 0x2000) dminor |= ~0x1fff; - dminor >>= 1; + dminor >>= 1; - destxtmp = ((int16_t)xga->accel.bres_k2); - if (xga->accel.bres_k2 & 0x2000) + destxtmp = ((int16_t) xga->accel.bres_k2); + if (xga->accel.bres_k2 & 0x2000) destxtmp |= ~0x1fff; dmajor = -(destxtmp - (dminor << 1)) >> 1; - err = ((int16_t)xga->accel.bres_err_term); - if (xga->accel.bres_err_term & 0x2000) + err = ((int16_t) xga->accel.bres_err_term); + if (xga->accel.bres_err_term & 0x2000) destxtmp |= ~0x1fff; if (xga->accel.octant & 0x02) { @@ -1085,27 +1118,20 @@ xga_line_draw_write(svga_t *svga) dy |= ~0x17ff; if (xga->accel.octant & 0x01) { - steep = 0; - SWAP(dx, dy); - SWAP(xdir, ydir); + steep = 0; + SWAP(dx, dy); + SWAP(xdir, ydir); } if (xga->accel.pat_src == 8) { while (y >= 0) { if (xga->accel.command & 0xc0) { if (steep) { - if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && - (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1118,18 +1144,11 @@ xga_line_draw_write(svga_t *svga) } } } else { - if ((dy >= xga->accel.mask_map_origin_x_off) && (dy <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && - (dx >= xga->accel.mask_map_origin_y_off) && (dx <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + if ((dy >= xga->accel.mask_map_origin_x_off) && (dy <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dx >= xga->accel.mask_map_origin_y_off) && (dx <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1144,16 +1163,10 @@ xga_line_draw_write(svga_t *svga) } } else { if (steep) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1165,16 +1178,10 @@ xga_line_draw_write(svga_t *svga) xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); } } else { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1214,7 +1221,6 @@ xga_line_draw_write(svga_t *svga) } } - static int16_t xga_dst_wrap(int16_t addr) { @@ -1225,20 +1231,20 @@ xga_dst_wrap(int16_t addr) static void xga_bitblt(svga_t *svga) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t src_dat, dest_dat, old_dest_dat; - uint32_t color_cmp = xga->accel.color_cmp; + uint32_t color_cmp = xga->accel.color_cmp; uint32_t plane_mask = xga->accel.plane_mask; - uint32_t patbase = xga->accel.px_map_base[xga->accel.pat_src]; - uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; - uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; - uint32_t patwidth = xga->accel.px_map_width[xga->accel.pat_src]; - uint32_t dstwidth = xga->accel.px_map_width[xga->accel.dst_map]; - uint32_t srcwidth = xga->accel.px_map_width[xga->accel.src_map]; - uint32_t patheight = xga->accel.px_map_height[xga->accel.pat_src]; - uint32_t srcheight = xga->accel.px_map_height[xga->accel.src_map]; - int mix = 0; - int xdir, ydir; + uint32_t patbase = xga->accel.px_map_base[xga->accel.pat_src]; + uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; + uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; + uint32_t patwidth = xga->accel.px_map_width[xga->accel.pat_src]; + uint32_t dstwidth = xga->accel.px_map_width[xga->accel.dst_map]; + uint32_t srcwidth = xga->accel.px_map_width[xga->accel.src_map]; + uint32_t patheight = xga->accel.px_map_height[xga->accel.pat_src]; + uint32_t srcheight = xga->accel.px_map_height[xga->accel.src_map]; + int mix = 0; + int xdir, ydir; if (xga->accel.octant & 0x02) { ydir = -1; @@ -1277,22 +1283,15 @@ xga_bitblt(svga_t *svga) } } - //pclog("Pattern Map = 8: CMD = %08x: SRCBase = %08x, DSTBase = %08x, from/to vram dir = %d, cmd dir = %06x\n", xga->accel.command, srcbase, dstbase, xga->from_to_vram, xga->accel.dir_cmd); - //pclog("CMD = %08x: Y = %d, X = %d, patsrc = %02x, srcmap = %d, dstmap = %d, py = %d, sy = %d, dy = %d, width0 = %d, width1 = %d, width2 = %d, width3 = %d\n", xga->accel.command, xga->accel.y, xga->accel.x, xga->accel.pat_src, xga->accel.src_map, xga->accel.dst_map, xga->accel.py, xga->accel.sy, xga->accel.dy, xga->accel.px_map_width[0], xga->accel.px_map_width[1], xga->accel.px_map_width[2], xga->accel.px_map_width[3]); + // pclog("Pattern Map = 8: CMD = %08x: SRCBase = %08x, DSTBase = %08x, from/to vram dir = %d, cmd dir = %06x\n", xga->accel.command, srcbase, dstbase, xga->from_to_vram, xga->accel.dir_cmd); + // pclog("CMD = %08x: Y = %d, X = %d, patsrc = %02x, srcmap = %d, dstmap = %d, py = %d, sy = %d, dy = %d, width0 = %d, width1 = %d, width2 = %d, width3 = %d\n", xga->accel.command, xga->accel.y, xga->accel.x, xga->accel.pat_src, xga->accel.src_map, xga->accel.dst_map, xga->accel.py, xga->accel.sy, xga->accel.dy, xga->accel.px_map_width[0], xga->accel.px_map_width[1], xga->accel.px_map_width[2], xga->accel.px_map_width[3]); while (xga->accel.y >= 0) { if (xga->accel.command & 0xc0) { - if ((xga->accel.dx >= xga->accel.mask_map_origin_x_off) && (xga->accel.dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && - (xga->accel.dy >= xga->accel.mask_map_origin_y_off) && (xga->accel.dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; + if ((xga->accel.dx >= xga->accel.mask_map_origin_x_off) && (xga->accel.dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (xga->accel.dy >= xga->accel.mask_map_origin_y_off) && (xga->accel.dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1300,16 +1299,10 @@ xga_bitblt(svga_t *svga) } } } else { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1368,14 +1361,13 @@ xga_bitblt(svga_t *svga) } } - //pclog("Pattern Map = %d: CMD = %08x: PATBase = %08x, SRCBase = %08x, DSTBase = %08x\n", xga->accel.pat_src, xga->accel.command, patbase, srcbase, dstbase); - //pclog("CMD = %08x: Y = %d, X = %d, patsrc = %02x, srcmap = %d, dstmap = %d, py = %d, sy = %d, dy = %d, width0 = %d, width1 = %d, width2 = %d, width3 = %d\n", xga->accel.command, xga->accel.y, xga->accel.x, xga->accel.pat_src, xga->accel.src_map, xga->accel.dst_map, xga->accel.py, xga->accel.sy, xga->accel.dy, xga->accel.px_map_width[0], xga->accel.px_map_width[1], xga->accel.px_map_width[2], xga->accel.px_map_width[3]); + // pclog("Pattern Map = %d: CMD = %08x: PATBase = %08x, SRCBase = %08x, DSTBase = %08x\n", xga->accel.pat_src, xga->accel.command, patbase, srcbase, dstbase); + // pclog("CMD = %08x: Y = %d, X = %d, patsrc = %02x, srcmap = %d, dstmap = %d, py = %d, sy = %d, dy = %d, width0 = %d, width1 = %d, width2 = %d, width3 = %d\n", xga->accel.command, xga->accel.y, xga->accel.x, xga->accel.pat_src, xga->accel.src_map, xga->accel.dst_map, xga->accel.py, xga->accel.sy, xga->accel.dy, xga->accel.px_map_width[0], xga->accel.px_map_width[1], xga->accel.px_map_width[2], xga->accel.px_map_width[3]); while (xga->accel.y >= 0) { mix = xga_accel_read_pattern_map_pixel(svga, xga->accel.px, xga->accel.py, xga->accel.pat_src, patbase, patwidth + 1); if (xga->accel.command & 0xc0) { - if ((xga->accel.dx >= xga->accel.mask_map_origin_x_off) && (xga->accel.dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && - (xga->accel.dy >= xga->accel.mask_map_origin_y_off) && (xga->accel.dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { + if ((xga->accel.dx >= xga->accel.mask_map_origin_x_off) && (xga->accel.dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (xga->accel.dy >= xga->accel.mask_map_origin_y_off) && (xga->accel.dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { if (mix) src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; else @@ -1383,13 +1375,7 @@ xga_bitblt(svga_t *svga) dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(mix, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1404,13 +1390,7 @@ xga_bitblt(svga_t *svga) dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(mix, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1418,7 +1398,6 @@ xga_bitblt(svga_t *svga) } } - xga->accel.sx += xdir; if (xga->accel.pattern) xga->accel.px = ((xga->accel.px + xdir) & patwidth) | (xga->accel.px & ~patwidth); @@ -1487,7 +1466,7 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) case 0x18: if (len == 4) { - xga->accel.px_map_width[xga->accel.px_map_idx] = val & 0xffff; + xga->accel.px_map_width[xga->accel.px_map_idx] = val & 0xffff; xga->accel.px_map_height[xga->accel.px_map_idx] = (val >> 16) & 0xffff; } else if (len == 2) { xga->accel.px_map_width[xga->accel.px_map_idx] = val & 0xffff; @@ -1564,13 +1543,13 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) case 0x2c: if (len == 4) { - xga->accel.short_stroke = val; + xga->accel.short_stroke = val; xga->accel.short_stroke_vector1 = xga->accel.short_stroke & 0xff; xga->accel.short_stroke_vector2 = (xga->accel.short_stroke >> 8) & 0xff; xga->accel.short_stroke_vector3 = (xga->accel.short_stroke >> 16) & 0xff; xga->accel.short_stroke_vector4 = (xga->accel.short_stroke >> 24) & 0xff; - //pclog("1Vector = %02x, 2Vector = %02x, 3Vector = %02x, 4Vector = %02x\n", xga->accel.short_stroke_vector1, xga->accel.short_stroke_vector2, xga->accel.short_stroke_vector3, xga->accel.short_stroke_vector4); + // pclog("1Vector = %02x, 2Vector = %02x, 3Vector = %02x, 4Vector = %02x\n", xga->accel.short_stroke_vector1, xga->accel.short_stroke_vector2, xga->accel.short_stroke_vector3, xga->accel.short_stroke_vector4); xga_short_stroke(svga, xga->accel.short_stroke_vector1); xga_short_stroke(svga, xga->accel.short_stroke_vector2); xga_short_stroke(svga, xga->accel.short_stroke_vector3); @@ -1600,7 +1579,7 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) xga->accel.frgd_mix = val & 0xff; if (len == 4) { xga->accel.bkgd_mix = (val >> 8) & 0xff; - xga->accel.cc_cond = (val >> 16) & 0x07; + xga->accel.cc_cond = (val >> 16) & 0x07; } else if (len == 2) { xga->accel.bkgd_mix = (val >> 8) & 0xff; } @@ -1708,7 +1687,7 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) case 0x60: if (len == 4) { - xga->accel.blt_width = val & 0xffff; + xga->accel.blt_width = val & 0xffff; xga->accel.blt_height = (val >> 16) & 0xffff; } else if (len == 2) { xga->accel.blt_width = val; @@ -1835,30 +1814,30 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) if (len == 4) { xga->accel.command = val; exec_command: - xga->accel.octant = xga->accel.command & 0x07; + xga->accel.octant = xga->accel.command & 0x07; xga->accel.draw_mode = xga->accel.command & 0x30; xga->accel.mask_mode = xga->accel.command & 0xc0; - xga->accel.pat_src = ((xga->accel.command >> 12) & 0x0f); - xga->accel.dst_map = ((xga->accel.command >> 16) & 0x0f); - xga->accel.src_map = ((xga->accel.command >> 20) & 0x0f); + xga->accel.pat_src = ((xga->accel.command >> 12) & 0x0f); + xga->accel.dst_map = ((xga->accel.command >> 16) & 0x0f); + xga->accel.src_map = ((xga->accel.command >> 20) & 0x0f); - //if (xga->accel.pat_src) { - // pclog("[%04X:%08X]: Accel Command = %02x, full = %08x, patwidth = %d, dstwidth = %d, srcwidth = %d, patheight = %d, dstheight = %d, srcheight = %d, px = %d, py = %d, dx = %d, dy = %d, sx = %d, sy = %d, patsrc = %d, dstmap = %d, srcmap = %d, dstbase = %08x, srcbase = %08x, patbase = %08x, dstformat = %x, srcformat = %x, planemask = %08x\n", - // CS, cpu_state.pc, ((xga->accel.command >> 24) & 0x0f), xga->accel.command, xga->accel.px_map_width[xga->accel.pat_src], - // xga->accel.px_map_width[xga->accel.dst_map], xga->accel.px_map_width[xga->accel.src_map], - // xga->accel.px_map_height[xga->accel.pat_src], xga->accel.px_map_height[xga->accel.dst_map], - // xga->accel.px_map_height[xga->accel.src_map], - // xga->accel.pat_map_x, xga->accel.pat_map_y, - // xga->accel.dst_map_x, xga->accel.dst_map_y, - // xga->accel.src_map_x, xga->accel.src_map_y, - // xga->accel.pat_src, xga->accel.dst_map, xga->accel.src_map, - // xga->accel.px_map_base[xga->accel.dst_map], xga->accel.px_map_base[xga->accel.src_map], xga->accel.px_map_base[xga->accel.pat_src], - // xga->accel.px_map_format[xga->accel.dst_map] & 0x0f, xga->accel.px_map_format[xga->accel.src_map] & 0x0f, xga->accel.plane_mask); - // //pclog("\n"); - //} + // if (xga->accel.pat_src) { + // pclog("[%04X:%08X]: Accel Command = %02x, full = %08x, patwidth = %d, dstwidth = %d, srcwidth = %d, patheight = %d, dstheight = %d, srcheight = %d, px = %d, py = %d, dx = %d, dy = %d, sx = %d, sy = %d, patsrc = %d, dstmap = %d, srcmap = %d, dstbase = %08x, srcbase = %08x, patbase = %08x, dstformat = %x, srcformat = %x, planemask = %08x\n", + // CS, cpu_state.pc, ((xga->accel.command >> 24) & 0x0f), xga->accel.command, xga->accel.px_map_width[xga->accel.pat_src], + // xga->accel.px_map_width[xga->accel.dst_map], xga->accel.px_map_width[xga->accel.src_map], + // xga->accel.px_map_height[xga->accel.pat_src], xga->accel.px_map_height[xga->accel.dst_map], + // xga->accel.px_map_height[xga->accel.src_map], + // xga->accel.pat_map_x, xga->accel.pat_map_y, + // xga->accel.dst_map_x, xga->accel.dst_map_y, + // xga->accel.src_map_x, xga->accel.src_map_y, + // xga->accel.pat_src, xga->accel.dst_map, xga->accel.src_map, + // xga->accel.px_map_base[xga->accel.dst_map], xga->accel.px_map_base[xga->accel.src_map], xga->accel.px_map_base[xga->accel.pat_src], + // xga->accel.px_map_format[xga->accel.dst_map] & 0x0f, xga->accel.px_map_format[xga->accel.src_map] & 0x0f, xga->accel.plane_mask); + // //pclog("\n"); + // } switch ((xga->accel.command >> 24) & 0x0f) { case 3: /*Bresenham Line Draw Read*/ - //pclog("Line Draw Read\n"); + // pclog("Line Draw Read\n"); break; case 4: /*Short Stroke Vectors*/ break; @@ -1869,7 +1848,7 @@ exec_command: xga_bitblt(svga); break; case 9: /*Inverting BitBLT*/ - //pclog("Inverting BitBLT\n"); + // pclog("Inverting BitBLT\n"); break; } } else if (len == 2) { @@ -1901,31 +1880,31 @@ exec_command: static void xga_memio_writeb(uint32_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; xga_mem_write(addr, val, xga, svga, 1); - //pclog("Write MEMIOB = %04x, val = %02x\n", addr & 0x7f, val); + // pclog("Write MEMIOB = %04x, val = %02x\n", addr & 0x7f, val); } static void xga_memio_writew(uint32_t addr, uint16_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; xga_mem_write(addr, val, xga, svga, 2); - //pclog("Write MEMIOW = %04x, val = %04x\n", addr & 0x7f, val); + // pclog("Write MEMIOW = %04x, val = %04x\n", addr & 0x7f, val); } static void xga_memio_writel(uint32_t addr, uint32_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; xga_mem_write(addr, val, xga, svga, 4); - //pclog("Write MEMIOL = %04x, val = %08x\n", addr & 0x7f, val); + // pclog("Write MEMIOL = %04x, val = %08x\n", addr & 0x7f, val); } static uint8_t @@ -2002,35 +1981,35 @@ xga_mem_read(uint32_t addr, xga_t *xga, svga_t *svga) static uint8_t xga_memio_readb(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; uint8_t temp; temp = xga_mem_read(addr, xga, svga); - //pclog("[%04X:%08X]: Read MEMIOB = %04x, temp = %02x\n", CS, cpu_state.pc, addr, temp); + // pclog("[%04X:%08X]: Read MEMIOB = %04x, temp = %02x\n", CS, cpu_state.pc, addr, temp); return temp; } static uint16_t xga_memio_readw(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; uint16_t temp; temp = xga_mem_read(addr, xga, svga); temp |= (xga_mem_read(addr + 1, xga, svga) << 8); - //pclog("[%04X:%08X]: Read MEMIOW = %04x, temp = %04x\n", CS, cpu_state.pc, addr, temp); + // pclog("[%04X:%08X]: Read MEMIOW = %04x, temp = %04x\n", CS, cpu_state.pc, addr, temp); return temp; } static uint32_t xga_memio_readl(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; uint32_t temp; temp = xga_mem_read(addr, xga, svga); @@ -2038,59 +2017,59 @@ xga_memio_readl(uint32_t addr, void *p) temp |= (xga_mem_read(addr + 2, xga, svga) << 16); temp |= (xga_mem_read(addr + 3, xga, svga) << 24); - //pclog("Read MEMIOL = %04x, temp = %08x\n", addr, temp); + // pclog("Read MEMIOL = %04x, temp = %08x\n", addr, temp); return temp; } static void xga_hwcursor_draw(svga_t *svga, int displine) { - xga_t *xga = &svga->xga; - uint8_t dat = 0; - int offset = xga->hwcursor_latch.x - xga->hwcursor_latch.xoff; - int x, x_pos, y_pos; - int comb = 0; + xga_t *xga = &svga->xga; + uint8_t dat = 0; + int offset = xga->hwcursor_latch.x - xga->hwcursor_latch.xoff; + int x, x_pos, y_pos; + int comb = 0; uint32_t *p; - int idx = (xga->cursor_data_on) ? 32 : 0; + int idx = (xga->cursor_data_on) ? 32 : 0; if (xga->interlace && xga->hwcursor_oddeven) - xga->hwcursor_latch.addr += 16; + xga->hwcursor_latch.addr += 16; y_pos = displine; x_pos = offset + svga->x_add; - p = buffer32->line[y_pos]; + p = buffer32->line[y_pos]; for (x = 0; x < xga->hwcursor_latch.cur_xsize; x++) { - if (x >= idx) { - if (!(x & 0x03)) - dat = xga->sprite_data[xga->hwcursor_latch.addr & 0x3ff]; + if (x >= idx) { + if (!(x & 0x03)) + dat = xga->sprite_data[xga->hwcursor_latch.addr & 0x3ff]; - comb = (dat >> ((x & 0x03) << 1)) & 0x03; + comb = (dat >> ((x & 0x03) << 1)) & 0x03; - x_pos = offset + svga->x_add + x; + x_pos = offset + svga->x_add + x; - switch (comb) { - case 0x00: - /* Cursor Color 1 */ - p[x_pos] = xga->hwc_color0; - break; - case 0x01: - /* Cursor Color 2 */ - p[x_pos] = xga->hwc_color1; - break; - case 0x03: - /* Complement */ - p[x_pos] ^= 0xffffff; - break; + switch (comb) { + case 0x00: + /* Cursor Color 1 */ + p[x_pos] = xga->hwc_color0; + break; + case 0x01: + /* Cursor Color 2 */ + p[x_pos] = xga->hwc_color1; + break; + case 0x03: + /* Complement */ + p[x_pos] ^= 0xffffff; + break; + } } - } - if ((x & 0x03) == 0x03) - xga->hwcursor_latch.addr++; + if ((x & 0x03) == 0x03) + xga->hwcursor_latch.addr++; } if (xga->interlace && !xga->hwcursor_oddeven) - xga->hwcursor_latch.addr += 16; + xga->hwcursor_latch.addr += 16; } static void @@ -2099,13 +2078,13 @@ xga_render_overscan_left(xga_t *xga, svga_t *svga) int i; if ((xga->displine + svga->y_add) < 0) - return; + return; if (svga->scrblank || (xga->h_disp == 0)) - return; + return; for (i = 0; i < svga->x_add; i++) - buffer32->line[xga->displine + svga->y_add][i] = svga->overscan_color; + buffer32->line[xga->displine + svga->y_add][i] = svga->overscan_color; } static void @@ -2114,62 +2093,62 @@ xga_render_overscan_right(xga_t *xga, svga_t *svga) int i, right; if ((xga->displine + svga->y_add) < 0) - return; + return; if (svga->scrblank || (xga->h_disp == 0)) - return; + return; right = (overscan_x >> 1); for (i = 0; i < right; i++) - buffer32->line[xga->displine + svga->y_add][svga->x_add + xga->h_disp + i] = svga->overscan_color; + buffer32->line[xga->displine + svga->y_add][svga->x_add + xga->h_disp + i] = svga->overscan_color; } static void xga_render_8bpp(xga_t *xga, svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; + uint32_t dat; if ((xga->displine + svga->y_add) < 0) - return; + return; if (xga->changedvram[xga->ma >> 12] || xga->changedvram[(xga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[xga->displine + svga->y_add][svga->x_add]; + p = &buffer32->line[xga->displine + svga->y_add][svga->x_add]; - if (xga->firstline_draw == 2000) - xga->firstline_draw = xga->displine; - xga->lastline_draw = xga->displine; + if (xga->firstline_draw == 2000) + xga->firstline_draw = xga->displine; + xga->lastline_draw = xga->displine; - for (x = 0; x <= xga->h_disp; x += 8) { - dat = *(uint32_t *)(&xga->vram[xga->ma & xga->vram_mask]); - p[0] = svga->pallook[dat & 0xff]; - p[1] = svga->pallook[(dat >> 8) & 0xff]; - p[2] = svga->pallook[(dat >> 16) & 0xff]; - p[3] = svga->pallook[(dat >> 24) & 0xff]; + for (x = 0; x <= xga->h_disp; x += 8) { + dat = *(uint32_t *) (&xga->vram[xga->ma & xga->vram_mask]); + p[0] = svga->pallook[dat & 0xff]; + p[1] = svga->pallook[(dat >> 8) & 0xff]; + p[2] = svga->pallook[(dat >> 16) & 0xff]; + p[3] = svga->pallook[(dat >> 24) & 0xff]; - dat = *(uint32_t *)(&xga->vram[(xga->ma + 4) & xga->vram_mask]); - p[4] = svga->pallook[dat & 0xff]; - p[5] = svga->pallook[(dat >> 8) & 0xff]; - p[6] = svga->pallook[(dat >> 16) & 0xff]; - p[7] = svga->pallook[(dat >> 24) & 0xff]; + dat = *(uint32_t *) (&xga->vram[(xga->ma + 4) & xga->vram_mask]); + p[4] = svga->pallook[dat & 0xff]; + p[5] = svga->pallook[(dat >> 8) & 0xff]; + p[6] = svga->pallook[(dat >> 16) & 0xff]; + p[7] = svga->pallook[(dat >> 24) & 0xff]; - xga->ma += 8; - p += 8; - } - xga->ma &= xga->vram_mask; + xga->ma += 8; + p += 8; + } + xga->ma &= xga->vram_mask; } } static void xga_render_16bpp(xga_t *xga, svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; + uint32_t dat; if ((xga->displine + svga->y_add) < 0) - return; + return; if (xga->changedvram[xga->ma >> 12] || xga->changedvram[(xga->ma >> 12) + 1] || svga->fullchange) { p = &buffer32->line[xga->displine + svga->y_add][svga->x_add]; @@ -2179,19 +2158,19 @@ xga_render_16bpp(xga_t *xga, svga_t *svga) xga->lastline_draw = xga->displine; for (x = 0; x <= (xga->h_disp); x += 8) { - dat = *(uint32_t *)(&xga->vram[(xga->ma + (x << 1)) & xga->vram_mask]); - p[x] = video_16to32[dat & 0xffff]; + dat = *(uint32_t *) (&xga->vram[(xga->ma + (x << 1)) & xga->vram_mask]); + p[x] = video_16to32[dat & 0xffff]; p[x + 1] = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&xga->vram[(xga->ma + (x << 1) + 4) & xga->vram_mask]); + dat = *(uint32_t *) (&xga->vram[(xga->ma + (x << 1) + 4) & xga->vram_mask]); p[x + 2] = video_16to32[dat & 0xffff]; p[x + 3] = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&xga->vram[(xga->ma + (x << 1) + 8) & xga->vram_mask]); + dat = *(uint32_t *) (&xga->vram[(xga->ma + (x << 1) + 8) & xga->vram_mask]); p[x + 4] = video_16to32[dat & 0xffff]; p[x + 5] = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&xga->vram[(xga->ma + (x << 1) + 12) & xga->vram_mask]); + dat = *(uint32_t *) (&xga->vram[(xga->ma + (x << 1) + 12) & xga->vram_mask]); p[x + 6] = video_16to32[dat & 0xffff]; p[x + 7] = video_16to32[dat >> 16]; } @@ -2203,8 +2182,8 @@ xga_render_16bpp(xga_t *xga, svga_t *svga) static void xga_write(uint32_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (!xga->on) { svga_write(addr, val, svga); @@ -2220,20 +2199,20 @@ xga_write(uint32_t addr, uint8_t val, void *p) cycles -= video_timing_write_b; xga->changedvram[(addr & xga->vram_mask) >> 12] = changeframecount; - xga->vram[addr & xga->vram_mask] = val; + xga->vram[addr & xga->vram_mask] = val; } static void xga_writeb(uint32_t addr, uint8_t val, void *p) { - //pclog("[%04X:%08X]: WriteB\n", CS, cpu_state.pc); + // pclog("[%04X:%08X]: WriteB\n", CS, cpu_state.pc); xga_write(addr, val, p); } static void xga_writew(uint32_t addr, uint16_t val, void *p) { - //pclog("[%04X:%08X]: WriteW\n", CS, cpu_state.pc); + // pclog("[%04X:%08X]: WriteW\n", CS, cpu_state.pc); xga_write(addr, val, p); xga_write(addr + 1, val >> 8, p); } @@ -2241,7 +2220,7 @@ xga_writew(uint32_t addr, uint16_t val, void *p) static void xga_writel(uint32_t addr, uint32_t val, void *p) { - //pclog("[%04X:%08X]: WriteL\n", CS, cpu_state.pc); + // pclog("[%04X:%08X]: WriteL\n", CS, cpu_state.pc); xga_write(addr, val, p); xga_write(addr + 1, val >> 8, p); xga_write(addr + 2, val >> 16, p); @@ -2251,8 +2230,8 @@ xga_writel(uint32_t addr, uint32_t val, void *p) static void xga_write_linear(uint32_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (!xga->on) { svga_write_linear(addr, val, svga); @@ -2267,14 +2246,14 @@ xga_write_linear(uint32_t addr, uint8_t val, void *p) cycles -= video_timing_write_b; xga->changedvram[(addr & xga->vram_mask) >> 12] = changeframecount; - xga->vram[addr & xga->vram_mask] = val; + xga->vram[addr & xga->vram_mask] = val; } static void xga_writew_linear(uint32_t addr, uint16_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (!xga->on) { svga_writew_linear(addr, val, svga); @@ -2309,8 +2288,8 @@ xga_writew_linear(uint32_t addr, uint16_t val, void *p) static void xga_writel_linear(uint32_t addr, uint32_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (!xga->on) { svga_writel_linear(addr, val, svga); @@ -2326,8 +2305,8 @@ xga_writel_linear(uint32_t addr, uint32_t val, void *p) static uint8_t xga_read(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (!xga->on) return svga_read(addr, svga); @@ -2380,8 +2359,8 @@ xga_readl(uint32_t addr, void *p) static uint8_t xga_read_linear(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (!xga->on) return svga_read_linear(addr, svga); @@ -2399,8 +2378,8 @@ xga_read_linear(uint32_t addr, void *p) static uint16_t xga_readw_linear(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; uint16_t ret; if (!xga->on) @@ -2427,14 +2406,13 @@ xga_readw_linear(uint32_t addr, void *p) static uint32_t xga_readl_linear(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (!xga->on) return svga_readl_linear(addr, svga); - return xga_read_linear(addr, p) | (xga_read_linear(addr + 1, p) << 8) | - (xga_read_linear(addr + 2, p) << 16) | (xga_read_linear(addr + 3, p) << 24); + return xga_read_linear(addr, p) | (xga_read_linear(addr + 1, p) << 8) | (xga_read_linear(addr + 2, p) << 16) | (xga_read_linear(addr + 3, p) << 24); } static void @@ -2451,16 +2429,16 @@ xga_do_render(svga_t *svga) break; } - svga->x_add = (overscan_x >> 1); - xga_render_overscan_left(xga, svga); - xga_render_overscan_right(xga, svga); - svga->x_add = (overscan_x >> 1); + svga->x_add = (overscan_x >> 1); + xga_render_overscan_left(xga, svga); + xga_render_overscan_right(xga, svga); + svga->x_add = (overscan_x >> 1); if (xga->hwcursor_on) { - xga_hwcursor_draw(svga, xga->displine + svga->y_add); - xga->hwcursor_on--; - if (xga->hwcursor_on && xga->interlace) - xga->hwcursor_on--; + xga_hwcursor_draw(svga, xga->displine + svga->y_add); + xga->hwcursor_on--; + if (xga->hwcursor_on && xga->interlace) + xga->hwcursor_on--; } } @@ -2468,160 +2446,158 @@ void xga_poll(xga_t *xga, svga_t *svga) { uint32_t x; - int wx, wy; + int wx, wy; if (!xga->linepos) { - if (xga->displine == xga->hwcursor_latch.y && xga->hwcursor_latch.ena) { - xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - (xga->cursor_data_on ? 32 : 0); - xga->hwcursor_oddeven = 0; - } - - if (xga->displine == (xga->hwcursor_latch.y + 1) && xga->hwcursor_latch.ena && - xga->interlace) { - xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - (xga->cursor_data_on ? 33 : 1); - xga->hwcursor_oddeven = 1; - } - - timer_advance_u64(&svga->timer, svga->dispofftime); - xga->linepos = 1; - - if (xga->dispon) { - xga->h_disp_on = 1; - - xga->ma &= xga->vram_mask; - - if (xga->firstline == 2000) { - xga->firstline = xga->displine; - video_wait_for_buffer(); + if (xga->displine == xga->hwcursor_latch.y && xga->hwcursor_latch.ena) { + xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - (xga->cursor_data_on ? 32 : 0); + xga->hwcursor_oddeven = 0; } - if (xga->hwcursor_on) { - xga->changedvram[xga->ma >> 12] = xga->changedvram[(xga->ma >> 12) + 1] = - xga->interlace ? 3 : 2; + if (xga->displine == (xga->hwcursor_latch.y + 1) && xga->hwcursor_latch.ena && xga->interlace) { + xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - (xga->cursor_data_on ? 33 : 1); + xga->hwcursor_oddeven = 1; } - xga_do_render(svga); + timer_advance_u64(&svga->timer, svga->dispofftime); + xga->linepos = 1; - if (xga->lastline < xga->displine) - xga->lastline = xga->displine; - } + if (xga->dispon) { + xga->h_disp_on = 1; - xga->displine++; - if (xga->interlace) - xga->displine++; - if (xga->displine > 1500) - xga->displine = 0; - } else { - timer_advance_u64(&svga->timer, svga->dispontime); - xga->h_disp_on = 0; + xga->ma &= xga->vram_mask; - xga->linepos = 0; - if (xga->dispon) { - if (xga->sc == xga->rowcount) { - xga->sc = 0; - - if ((xga->disp_cntl_2 & 7) == 4) { - xga->maback += (xga->rowoffset << 4); - if (xga->interlace) - xga->maback += (xga->rowoffset << 4); - } else { - xga->maback += (xga->rowoffset << 3); - if (xga->interlace) - xga->maback += (xga->rowoffset << 3); + if (xga->firstline == 2000) { + xga->firstline = xga->displine; + video_wait_for_buffer(); } - xga->maback &= xga->vram_mask; - xga->ma = xga->maback; - } else { - xga->sc++; - xga->sc &= 0x1f; - xga->ma = xga->maback; + + if (xga->hwcursor_on) { + xga->changedvram[xga->ma >> 12] = xga->changedvram[(xga->ma >> 12) + 1] = xga->interlace ? 3 : 2; + } + + xga_do_render(svga); + + if (xga->lastline < xga->displine) + xga->lastline = xga->displine; } - } - xga->vc++; - xga->vc &= 2047; + xga->displine++; + if (xga->interlace) + xga->displine++; + if (xga->displine > 1500) + xga->displine = 0; + } else { + timer_advance_u64(&svga->timer, svga->dispontime); + xga->h_disp_on = 0; - if (xga->vc == xga->split) { - if (xga->interlace && xga->oddeven) - xga->ma = xga->maback = (xga->rowoffset << 1); - else - xga->ma = xga->maback = 0; - xga->ma = (xga->ma << 2); - xga->maback = (xga->maback << 2); + xga->linepos = 0; + if (xga->dispon) { + if (xga->sc == xga->rowcount) { + xga->sc = 0; - xga->sc = 0; - } - if (xga->vc == xga->dispend) { - xga->dispon = 0; - - for (x = 0; x < ((xga->vram_mask + 1) >> 12); x++) { - if (xga->changedvram[x]) - xga->changedvram[x]--; + if ((xga->disp_cntl_2 & 7) == 4) { + xga->maback += (xga->rowoffset << 4); + if (xga->interlace) + xga->maback += (xga->rowoffset << 4); + } else { + xga->maback += (xga->rowoffset << 3); + if (xga->interlace) + xga->maback += (xga->rowoffset << 3); + } + xga->maback &= xga->vram_mask; + xga->ma = xga->maback; + } else { + xga->sc++; + xga->sc &= 0x1f; + xga->ma = xga->maback; + } } - if (svga->fullchange) - svga->fullchange--; - } - if (xga->vc == xga->v_syncstart) { - xga->dispon = 0; - x = xga->h_disp; - if (xga->interlace && !xga->oddeven) - xga->lastline++; - if (xga->interlace && xga->oddeven) - xga->firstline--; + xga->vc++; + xga->vc &= 2047; - wx = x; + if (xga->vc == xga->split) { + if (xga->interlace && xga->oddeven) + xga->ma = xga->maback = (xga->rowoffset << 1); + else + xga->ma = xga->maback = 0; + xga->ma = (xga->ma << 2); + xga->maback = (xga->maback << 2); - wy = xga->lastline - xga->firstline; - svga_doblit(wx, wy, svga); + xga->sc = 0; + } + if (xga->vc == xga->dispend) { + xga->dispon = 0; - xga->firstline = 2000; - xga->lastline = 0; + for (x = 0; x < ((xga->vram_mask + 1) >> 12); x++) { + if (xga->changedvram[x]) + xga->changedvram[x]--; + } + if (svga->fullchange) + svga->fullchange--; + } + if (xga->vc == xga->v_syncstart) { + xga->dispon = 0; + x = xga->h_disp; - xga->firstline_draw = 2000; - xga->lastline_draw = 0; + if (xga->interlace && !xga->oddeven) + xga->lastline++; + if (xga->interlace && xga->oddeven) + xga->firstline--; - xga->oddeven ^= 1; + wx = x; - changeframecount = xga->interlace ? 3 : 2; + wy = xga->lastline - xga->firstline; + svga_doblit(wx, wy, svga); - if (xga->interlace && xga->oddeven) - xga->ma = xga->maback = xga->ma_latch + (xga->rowoffset << 1); - else - xga->ma = xga->maback = xga->ma_latch; + xga->firstline = 2000; + xga->lastline = 0; - xga->ma = (xga->ma << 2); - xga->maback = (xga->maback << 2); - } - if (xga->vc == xga->v_total) { - xga->vc = 0; - xga->sc = 0; - xga->dispon = 1; - xga->displine = (xga->interlace && xga->oddeven) ? 1 : 0; + xga->firstline_draw = 2000; + xga->lastline_draw = 0; - svga->x_add = (overscan_x >> 1); + xga->oddeven ^= 1; - xga->hwcursor_on = 0; - xga->hwcursor_latch = xga->hwcursor; - } + changeframecount = xga->interlace ? 3 : 2; + + if (xga->interlace && xga->oddeven) + xga->ma = xga->maback = xga->ma_latch + (xga->rowoffset << 1); + else + xga->ma = xga->maback = xga->ma_latch; + + xga->ma = (xga->ma << 2); + xga->maback = (xga->maback << 2); + } + if (xga->vc == xga->v_total) { + xga->vc = 0; + xga->sc = 0; + xga->dispon = 1; + xga->displine = (xga->interlace && xga->oddeven) ? 1 : 0; + + svga->x_add = (overscan_x >> 1); + + xga->hwcursor_on = 0; + xga->hwcursor_latch = xga->hwcursor; + } } } static uint8_t xga_mca_read(int port, void *priv) { - svga_t *svga = (svga_t *)priv; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) priv; + xga_t *xga = &svga->xga; - //pclog("[%04X:%08X]: POS Read Port = %x, val = %02x\n", CS, cpu_state.pc, port & 7, xga->pos_regs[port & 7]); + // pclog("[%04X:%08X]: POS Read Port = %x, val = %02x\n", CS, cpu_state.pc, port & 7, xga->pos_regs[port & 7]); return (xga->pos_regs[port & 7]); } static void xga_mca_write(int port, uint8_t val, void *priv) { - svga_t *svga = (svga_t *)priv; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) priv; + xga_t *xga = &svga->xga; /* MCA does not write registers below 0x0100. */ if (port < 0x0102) @@ -2631,19 +2607,19 @@ xga_mca_write(int port, uint8_t val, void *priv) mem_mapping_disable(&xga->bios_rom.mapping); mem_mapping_disable(&xga->memio_mapping); xga->on = 0; - vga_on = 1; + vga_on = 1; /* Save the MCA register value. */ xga->pos_regs[port & 7] = val; if (!(xga->pos_regs[4] & 1)) /*MCA 4MB addressing on systems with more than 16MB of memory*/ xga->pos_regs[4] |= 1; - //pclog("[%04X:%08X]: POS Write Port = %x, val = %02x, linear base = %08x, instance = %d, rom addr = %05x\n", CS, cpu_state.pc, port & 7, val, xga->linear_base, xga->instance, xga->rom_addr); + // pclog("[%04X:%08X]: POS Write Port = %x, val = %02x, linear base = %08x, instance = %d, rom addr = %05x\n", CS, cpu_state.pc, port & 7, val, xga->linear_base, xga->instance, xga->rom_addr); if (xga->pos_regs[2] & 1) { - xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; + xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; xga->base_addr_1mb = (xga->pos_regs[5] & 0x0f) << 20; - xga->linear_base = ((xga->pos_regs[4] & 0xfe) * 0x1000000) + (xga->instance << 22); - xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); + xga->linear_base = ((xga->pos_regs[4] & 0xfe) * 0x1000000) + (xga->instance << 22); + xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); io_sethandler(0x2100 + (xga->instance << 4), 0x0010, xga_ext_inb, NULL, NULL, xga_ext_outb, NULL, NULL, svga); mem_mapping_set_addr(&xga->bios_rom.mapping, xga->rom_addr, 0x2000); @@ -2654,8 +2630,8 @@ xga_mca_write(int port, uint8_t val, void *priv) static uint8_t xga_mca_feedb(void *priv) { - svga_t *svga = (svga_t *)priv; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) priv; + xga_t *xga = &svga->xga; return xga->pos_regs[2] & 1; } @@ -2663,7 +2639,7 @@ xga_mca_feedb(void *priv) static void xga_mca_reset(void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; xga_mca_write(0x102, 0, svga); } @@ -2671,47 +2647,48 @@ xga_mca_reset(void *p) static uint8_t xga_pos_in(uint16_t addr, void *priv) { - svga_t *svga = (svga_t *)priv; + svga_t *svga = (svga_t *) priv; return (xga_mca_read(addr, svga)); } static void -*xga_init(const device_t *info) + * + xga_init(const device_t *info) { - svga_t *svga = svga_get_pri(); - xga_t *xga = &svga->xga; - FILE *f; + svga_t *svga = svga_get_pri(); + xga_t *xga = &svga->xga; + FILE *f; uint32_t temp; uint32_t initial_bios_addr = device_get_config_hex20("init_bios_addr"); - uint8_t *rom = NULL; + uint8_t *rom = NULL; xga->type = device_get_config_int("type"); - xga->bus = info->flags; + xga->bus = info->flags; - xga->vram_size = (1024 << 10); - xga->vram_mask = xga->vram_size - 1; - xga->vram = calloc(xga->vram_size, 1); - xga->changedvram = calloc(xga->vram_size >> 12, 1); - xga->on = 0; - xga->hwcursor.cur_xsize = 64; - xga->hwcursor.cur_ysize = 64; - xga->bios_rom.sz = 0x2000; + xga->vram_size = (1024 << 10); + xga->vram_mask = xga->vram_size - 1; + xga->vram = calloc(xga->vram_size, 1); + xga->changedvram = calloc(xga->vram_size >> 12, 1); + xga->on = 0; + xga->hwcursor.cur_xsize = 64; + xga->hwcursor.cur_ysize = 64; + xga->bios_rom.sz = 0x2000; xga->linear_endian_reverse = 0; - xga->a5_test = 0; + xga->a5_test = 0; f = rom_fopen(xga->type ? XGA2_BIOS_PATH : XGA_BIOS_PATH, "rb"); - (void)fseek(f, 0L, SEEK_END); + (void) fseek(f, 0L, SEEK_END); temp = ftell(f); - (void)fseek(f, 0L, SEEK_SET); + (void) fseek(f, 0L, SEEK_SET); rom = malloc(xga->bios_rom.sz); memset(rom, 0xff, xga->bios_rom.sz); (void) !fread(rom, xga->bios_rom.sz, 1, f); temp -= xga->bios_rom.sz; - (void)fclose(f); + (void) fclose(f); - xga->bios_rom.rom = rom; + xga->bios_rom.rom = rom; xga->bios_rom.mask = xga->bios_rom.sz - 1; if (f != NULL) { free(rom); @@ -2720,29 +2697,29 @@ static void xga->base_addr_1mb = 0; if (info->flags & DEVICE_MCA) { xga->linear_base = 0; - xga->instance = 0; - xga->rom_addr = 0; + xga->instance = 0; + xga->rom_addr = 0; mem_mapping_add(&xga->bios_rom.mapping, - initial_bios_addr, xga->bios_rom.sz, - rom_read, rom_readw, rom_readl, - NULL, NULL, NULL, - xga->bios_rom.rom, MEM_MAPPING_EXTERNAL, &xga->bios_rom); + initial_bios_addr, xga->bios_rom.sz, + rom_read, rom_readw, rom_readl, + NULL, NULL, NULL, + xga->bios_rom.rom, MEM_MAPPING_EXTERNAL, &xga->bios_rom); } else { xga->pos_regs[2] = 1 | 0x0c | 0xf0; - xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; + xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; xga->pos_regs[4] = 1 | 2; xga->linear_base = ((xga->pos_regs[4] & 0xfe) * 0x1000000) + (xga->instance << 22); - xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); + xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); } mem_mapping_add(&xga->video_mapping, 0, 0, xga_readb, xga_readw, xga_readl, xga_writeb, xga_writew, xga_writel, NULL, MEM_MAPPING_EXTERNAL, svga); - mem_mapping_add(&xga->linear_mapping, 0, 0, xga_read_linear, xga_readw_linear, xga_readl_linear, + mem_mapping_add(&xga->linear_mapping, 0, 0, xga_read_linear, xga_readw_linear, xga_readl_linear, xga_write_linear, xga_writew_linear, xga_writel_linear, - NULL, MEM_MAPPING_EXTERNAL, svga); + NULL, MEM_MAPPING_EXTERNAL, svga); mem_mapping_add(&xga->memio_mapping, 0, 0, xga_memio_readb, xga_memio_readw, xga_memio_readl, - xga_memio_writeb, xga_memio_writew, xga_memio_writel, + xga_memio_writeb, xga_memio_writew, xga_memio_writel, xga->bios_rom.rom, MEM_MAPPING_EXTERNAL, svga); mem_mapping_disable(&xga->video_mapping); @@ -2766,8 +2743,8 @@ static void static void xga_close(void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (svga) { free(xga->vram); @@ -2784,7 +2761,7 @@ xga_available(void) static void xga_speed_changed(void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; svga_recalctimings(svga); } @@ -2792,13 +2769,13 @@ xga_speed_changed(void *p) static void xga_force_redraw(void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; svga->fullchange = changeframecount; } static const device_config_t xga_configuration[] = { - // clang-format off + // clang-format off { .name = "init_bios_addr", .description = "Initial MCA BIOS Address (before POS configuration)", @@ -2839,35 +2816,35 @@ static const device_config_t xga_configuration[] = { } }, { .name = "", .description = "", .type = CONFIG_END } - // clang-format on +// clang-format on }; const device_t xga_device = { - .name = "XGA (MCA)", + .name = "XGA (MCA)", .internal_name = "xga_mca", - .flags = DEVICE_MCA, - .local = 0, - .init = xga_init, - .close = xga_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = 0, + .init = xga_init, + .close = xga_close, + .reset = NULL, { .available = xga_available }, .speed_changed = xga_speed_changed, - .force_redraw = xga_force_redraw, - .config = xga_configuration + .force_redraw = xga_force_redraw, + .config = xga_configuration }; const device_t xga_isa_device = { - .name = "XGA (ISA)", + .name = "XGA (ISA)", .internal_name = "xga_isa", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 0, - .init = xga_init, - .close = xga_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 0, + .init = xga_init, + .close = xga_close, + .reset = NULL, { .available = xga_available }, .speed_changed = xga_speed_changed, - .force_redraw = xga_force_redraw, - .config = xga_configuration + .force_redraw = xga_force_redraw, + .config = xga_configuration }; void diff --git a/src/video/video.c b/src/video/video.c index 945247934..37a0fe9fc 100644 --- a/src/video/video.c +++ b/src/video/video.c @@ -76,35 +76,34 @@ #include -volatile int screenshots = 0; -uint8_t edatlookup[4][4]; -uint8_t fontdat[2048][8]; /* IBM CGA font */ -uint8_t fontdatm[2048][16]; /* IBM MDA font */ -uint8_t fontdatw[512][32]; /* Wyse700 font */ -uint8_t fontdat8x12[256][16]; /* MDSI Genius font */ -uint8_t fontdat12x18[256][36]; /* IM1024 font */ -dbcs_font_t *fontdatksc5601 = NULL; /* Korean KSC-5601 font */ -dbcs_font_t *fontdatksc5601_user = NULL; /* Korean KSC-5601 user defined font */ -int herc_blend = 0; -int frames = 0; -int fullchange = 0; -int video_grayscale = 0; -int video_graytype = 0; -int monitor_index_global = 0; -uint32_t *video_6to8 = NULL, - *video_8togs = NULL, - *video_8to32 = NULL, - *video_15to32 = NULL, - *video_16to32 = NULL; -monitor_t monitors[MONITORS_NUM]; -monitor_settings_t monitor_settings[MONITORS_NUM]; -atomic_bool doresize_monitors[MONITORS_NUM]; - +volatile int screenshots = 0; +uint8_t edatlookup[4][4]; +uint8_t fontdat[2048][8]; /* IBM CGA font */ +uint8_t fontdatm[2048][16]; /* IBM MDA font */ +uint8_t fontdatw[512][32]; /* Wyse700 font */ +uint8_t fontdat8x12[256][16]; /* MDSI Genius font */ +uint8_t fontdat12x18[256][36]; /* IM1024 font */ +dbcs_font_t *fontdatksc5601 = NULL; /* Korean KSC-5601 font */ +dbcs_font_t *fontdatksc5601_user = NULL; /* Korean KSC-5601 user defined font */ +int herc_blend = 0; +int frames = 0; +int fullchange = 0; +int video_grayscale = 0; +int video_graytype = 0; +int monitor_index_global = 0; +uint32_t *video_6to8 = NULL, + *video_8togs = NULL, + *video_8to32 = NULL, + *video_15to32 = NULL, + *video_16to32 = NULL; +monitor_t monitors[MONITORS_NUM]; +monitor_settings_t monitor_settings[MONITORS_NUM]; +atomic_bool doresize_monitors[MONITORS_NUM]; #ifdef _WIN32 -void * __cdecl (*video_copy)(void *_Dst, const void *_Src, size_t _Size) = memcpy; +void *__cdecl (*video_copy)(void *_Dst, const void *_Src, size_t _Size) = memcpy; #else -void * (*video_copy)(void *__restrict, const void *__restrict, size_t); +void *(*video_copy)(void *__restrict, const void *__restrict, size_t); #endif @@ -235,147 +234,136 @@ const uint32_t shade[5][256] = } }; - typedef struct blit_data_struct { - int x, y, w, h; - int busy; - int buffer_in_use; - int thread_run; - int monitor_index; + int x, y, w, h; + int busy; + int buffer_in_use; + int thread_run; + int monitor_index; - thread_t *blit_thread; - event_t *wake_blit_thread; - event_t *blit_complete; - event_t *buffer_not_in_use; + thread_t *blit_thread; + event_t *wake_blit_thread; + event_t *blit_complete; + event_t *buffer_not_in_use; } blit_data_t; - -static uint32_t cga_2_table[16]; - +static uint32_t cga_2_table[16]; static void (*blit_func)(int x, int y, int w, int h, int monitor_index); - #ifdef ENABLE_VIDEO_LOG int sdl_do_log = ENABLE_VIDEO_LOG; - static void video_log(const char *fmt, ...) { va_list ap; if (video_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define video_log(fmt, ...) +# define video_log(fmt, ...) #endif - void -video_setblit(void(*blit)(int,int,int,int,int)) +video_setblit(void (*blit)(int, int, int, int, int)) { blit_func = blit; } - void video_blit_complete_monitor(int monitor_index) { - blit_data_t* blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; + blit_data_t *blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; blit_data_ptr->buffer_in_use = 0; thread_set_event(blit_data_ptr->buffer_not_in_use); } - void video_wait_for_blit_monitor(int monitor_index) { - blit_data_t* blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; + blit_data_t *blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; while (blit_data_ptr->busy) - thread_wait_event(blit_data_ptr->blit_complete, -1); + thread_wait_event(blit_data_ptr->blit_complete, -1); thread_reset_event(blit_data_ptr->blit_complete); } - void video_wait_for_buffer_monitor(int monitor_index) { - blit_data_t* blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; + blit_data_t *blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; while (blit_data_ptr->buffer_in_use) - thread_wait_event(blit_data_ptr->buffer_not_in_use, -1); + thread_wait_event(blit_data_ptr->buffer_not_in_use, -1); thread_reset_event(blit_data_ptr->buffer_not_in_use); } - -static png_structp png_ptr[MONITORS_NUM]; -static png_infop info_ptr[MONITORS_NUM]; - +static png_structp png_ptr[MONITORS_NUM]; +static png_infop info_ptr[MONITORS_NUM]; static void video_take_screenshot_monitor(const char *fn, uint32_t *buf, int start_x, int start_y, int row_len, int monitor_index) { - int i, x, y; - png_bytep *b_rgb = NULL; - FILE *fp = NULL; - uint32_t temp = 0x00000000; - blit_data_t* blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; + int i, x, y; + png_bytep *b_rgb = NULL; + FILE *fp = NULL; + uint32_t temp = 0x00000000; + blit_data_t *blit_data_ptr = monitors[monitor_index].mon_blit_data_ptr; /* create file */ fp = plat_fopen((char *) fn, (char *) "wb"); if (!fp) { - video_log("[video_take_screenshot] File %s could not be opened for writing", fn); - return; + video_log("[video_take_screenshot] File %s could not be opened for writing", fn); + return; } /* initialize stuff */ png_ptr[monitor_index] = png_create_write_struct(PNG_LIBPNG_VER_STRING, NULL, NULL, NULL); if (!png_ptr[monitor_index]) { - video_log("[video_take_screenshot] png_create_write_struct failed"); - fclose(fp); - return; + video_log("[video_take_screenshot] png_create_write_struct failed"); + fclose(fp); + return; } info_ptr[monitor_index] = png_create_info_struct(png_ptr[monitor_index]); if (!info_ptr[monitor_index]) { - video_log("[video_take_screenshot] png_create_info_struct failed"); - fclose(fp); - return; + video_log("[video_take_screenshot] png_create_info_struct failed"); + fclose(fp); + return; } png_init_io(png_ptr[monitor_index], fp); png_set_IHDR(png_ptr[monitor_index], info_ptr[monitor_index], blit_data_ptr->w, blit_data_ptr->h, - 8, PNG_COLOR_TYPE_RGB, PNG_INTERLACE_NONE, - PNG_COMPRESSION_TYPE_BASE, PNG_FILTER_TYPE_BASE); + 8, PNG_COLOR_TYPE_RGB, PNG_INTERLACE_NONE, + PNG_COMPRESSION_TYPE_BASE, PNG_FILTER_TYPE_BASE); b_rgb = (png_bytep *) malloc(sizeof(png_bytep) * blit_data_ptr->h); if (b_rgb == NULL) { - video_log("[video_take_screenshot] Unable to Allocate RGB Bitmap Memory"); - fclose(fp); - return; + video_log("[video_take_screenshot] Unable to Allocate RGB Bitmap Memory"); + fclose(fp); + return; } for (y = 0; y < blit_data_ptr->h; ++y) { - b_rgb[y] = (png_byte *) malloc(png_get_rowbytes(png_ptr[monitor_index], info_ptr[monitor_index])); + b_rgb[y] = (png_byte *) malloc(png_get_rowbytes(png_ptr[monitor_index], info_ptr[monitor_index])); for (x = 0; x < blit_data_ptr->w; ++x) { - if (buf == NULL) - memset(&(b_rgb[y][x * 3]), 0x00, 3); - else { - temp = buf[((start_y + y) * row_len) + start_x + x]; - b_rgb[y][x * 3] = (temp >> 16) & 0xff; - b_rgb[y][(x * 3) + 1] = (temp >> 8) & 0xff; - b_rgb[y][(x * 3) + 2] = temp & 0xff; - } - } + if (buf == NULL) + memset(&(b_rgb[y][x * 3]), 0x00, 3); + else { + temp = buf[((start_y + y) * row_len) + start_x + x]; + b_rgb[y][x * 3] = (temp >> 16) & 0xff; + b_rgb[y][(x * 3) + 1] = (temp >> 8) & 0xff; + b_rgb[y][(x * 3) + 2] = temp & 0xff; + } + } } png_write_info(png_ptr[monitor_index], info_ptr[monitor_index]); @@ -386,14 +374,16 @@ video_take_screenshot_monitor(const char *fn, uint32_t *buf, int start_x, int st /* cleanup heap allocation */ for (i = 0; i < blit_data_ptr->h; i++) - if (b_rgb[i]) free(b_rgb[i]); + if (b_rgb[i]) + free(b_rgb[i]); - if (b_rgb) free(b_rgb); + if (b_rgb) + free(b_rgb); - if (fp) fclose(fp); + if (fp) + fclose(fp); } - void video_screenshot_monitor(uint32_t *buf, int start_x, int start_y, int row_len, int monitor_index) { @@ -404,8 +394,8 @@ video_screenshot_monitor(uint32_t *buf, int start_x, int start_y, int row_len, i path_append_filename(path, usr_path, SCREENSHOT_PATH); - if (! plat_dir_check(path)) - plat_dir_create(path); + if (!plat_dir_check(path)) + plat_dir_create(path); path_slash(path); strcat(path, "Monitor_"); @@ -428,476 +418,461 @@ video_screenshot(uint32_t *buf, int start_x, int start_y, int row_len) video_screenshot_monitor(buf, start_x, start_y, row_len, 0); } - #ifdef _WIN32 -void * __cdecl -video_transform_copy(void *_Dst, const void *_Src, size_t _Size) +void *__cdecl video_transform_copy(void *_Dst, const void *_Src, size_t _Size) #else void * video_transform_copy(void *__restrict _Dst, const void *__restrict _Src, size_t _Size) #endif { - int i; + int i; uint32_t *dest_ex = (uint32_t *) _Dst; - uint32_t *src_ex = (uint32_t *) _Src; + uint32_t *src_ex = (uint32_t *) _Src; _Size /= sizeof(uint32_t); if ((dest_ex != NULL) && (src_ex != NULL)) { - for (i = 0; i < _Size; i++) { - *dest_ex = video_color_transform(*src_ex); - dest_ex++; - src_ex++; - } + for (i = 0; i < _Size; i++) { + *dest_ex = video_color_transform(*src_ex); + dest_ex++; + src_ex++; + } } return _Dst; } - -static -void blit_thread(void *param) +static void +blit_thread(void *param) { - blit_data_t* data = param; + blit_data_t *data = param; while (data->thread_run) { - thread_wait_event(data->wake_blit_thread, -1); - thread_reset_event(data->wake_blit_thread); - MTR_BEGIN("video", "blit_thread"); + thread_wait_event(data->wake_blit_thread, -1); + thread_reset_event(data->wake_blit_thread); + MTR_BEGIN("video", "blit_thread"); - if (blit_func) - blit_func(data->x, data->y, data->w, data->h, data->monitor_index); + if (blit_func) + blit_func(data->x, data->y, data->w, data->h, data->monitor_index); - data->busy = 0; + data->busy = 0; - MTR_END("video", "blit_thread"); - thread_set_event(data->blit_complete); + MTR_END("video", "blit_thread"); + thread_set_event(data->blit_complete); } } - void video_blit_memtoscreen_monitor(int x, int y, int w, int h, int monitor_index) { MTR_BEGIN("video", "video_blit_memtoscreen"); if ((w <= 0) || (h <= 0)) - return; + return; video_wait_for_blit_monitor(monitor_index); - monitors[monitor_index].mon_blit_data_ptr->busy = 1; + monitors[monitor_index].mon_blit_data_ptr->busy = 1; monitors[monitor_index].mon_blit_data_ptr->buffer_in_use = 1; - monitors[monitor_index].mon_blit_data_ptr->x = x; - monitors[monitor_index].mon_blit_data_ptr->y = y; - monitors[monitor_index].mon_blit_data_ptr->w = w; - monitors[monitor_index].mon_blit_data_ptr->h = h; + monitors[monitor_index].mon_blit_data_ptr->x = x; + monitors[monitor_index].mon_blit_data_ptr->y = y; + monitors[monitor_index].mon_blit_data_ptr->w = w; + monitors[monitor_index].mon_blit_data_ptr->h = h; thread_set_event(monitors[monitor_index].mon_blit_data_ptr->wake_blit_thread); MTR_END("video", "video_blit_memtoscreen"); } - -uint8_t pixels8(uint32_t *pixels) +uint8_t +pixels8(uint32_t *pixels) { - int i; + int i; uint8_t temp = 0; for (i = 0; i < 8; i++) - temp |= (!!*(pixels + i) << (i ^ 7)); + temp |= (!!*(pixels + i) << (i ^ 7)); return temp; } - -uint32_t pixel_to_color(uint8_t *pixels32, uint8_t pos) +uint32_t +pixel_to_color(uint8_t *pixels32, uint8_t pos) { uint32_t temp; temp = *(pixels32 + pos) & 0x03; switch (temp) { - case 0: - default: - return 0x00; - case 1: - return 0x07; - case 2: - return 0x0f; + case 0: + default: + return 0x00; + case 1: + return 0x07; + case 2: + return 0x0f; } } - void video_blend_monitor(int x, int y, int monitor_index) { - int xx; - uint32_t pixels32_1, pixels32_2; - unsigned int val1, val2; + int xx; + uint32_t pixels32_1, pixels32_2; + unsigned int val1, val2; static unsigned int carry = 0; if (!herc_blend) - return; + return; if (!x) - carry = 0; + carry = 0; - val1 = pixels8(&(monitors[monitor_index].target_buffer->line[y][x])); - val2 = (val1 >> 1) + carry; - carry = (val1 & 1) << 7; + val1 = pixels8(&(monitors[monitor_index].target_buffer->line[y][x])); + val2 = (val1 >> 1) + carry; + carry = (val1 & 1) << 7; pixels32_1 = cga_2_table[val1 >> 4] + cga_2_table[val2 >> 4]; pixels32_2 = cga_2_table[val1 & 0xf] + cga_2_table[val2 & 0xf]; for (xx = 0; xx < 4; xx++) { - monitors[monitor_index].target_buffer->line[y][x + xx] = pixel_to_color((uint8_t *) &pixels32_1, xx); - monitors[monitor_index].target_buffer->line[y][x + (xx | 4)] = pixel_to_color((uint8_t *) &pixels32_2, xx); + monitors[monitor_index].target_buffer->line[y][x + xx] = pixel_to_color((uint8_t *) &pixels32_1, xx); + monitors[monitor_index].target_buffer->line[y][x + (xx | 4)] = pixel_to_color((uint8_t *) &pixels32_2, xx); } } - - void video_blit_memtoscreen_8_monitor(int x, int y, int w, int h, int monitor_index) { int yy, xx; if ((w > 0) && (h > 0)) { - for (yy = 0; yy < h; yy++) { - if ((y + yy) >= 0 && (y + yy) < monitors[monitor_index].target_buffer->h) { - for (xx = 0; xx < w; xx++) { - if (monitors[monitor_index].target_buffer->line[y + yy][x + xx] <= 0xff) - monitors[monitor_index].target_buffer->line[y + yy][x + xx] = monitors[monitor_index].mon_pal_lookup[monitors[monitor_index].target_buffer->line[y + yy][x + xx]]; - else - monitors[monitor_index].target_buffer->line[y + yy][x + xx] = 0x00000000; + for (yy = 0; yy < h; yy++) { + if ((y + yy) >= 0 && (y + yy) < monitors[monitor_index].target_buffer->h) { + for (xx = 0; xx < w; xx++) { + if (monitors[monitor_index].target_buffer->line[y + yy][x + xx] <= 0xff) + monitors[monitor_index].target_buffer->line[y + yy][x + xx] = monitors[monitor_index].mon_pal_lookup[monitors[monitor_index].target_buffer->line[y + yy][x + xx]]; + else + monitors[monitor_index].target_buffer->line[y + yy][x + xx] = 0x00000000; + } } } } - } video_blit_memtoscreen_monitor(x, y, w, h, monitor_index); } - void cgapal_rebuild_monitor(int monitor_index) { - int c; - uint32_t* palette_lookup = monitors[monitor_index].mon_pal_lookup; - int cga_palette_monitor = 0; + int c; + uint32_t *palette_lookup = monitors[monitor_index].mon_pal_lookup; + int cga_palette_monitor = 0; /* We cannot do this (yet) if we have not been enabled yet. */ - if (video_6to8 == NULL) return; + if (video_6to8 == NULL) + return; - if (monitors[monitor_index].target_buffer == NULL || - monitors[monitor_index].mon_cga_palette == NULL) return; + if (monitors[monitor_index].target_buffer == NULL || monitors[monitor_index].mon_cga_palette == NULL) + return; cga_palette_monitor = *monitors[monitor_index].mon_cga_palette; - for (c=0; c<256; c++) { - palette_lookup[c] = makecol(video_6to8[cgapal[c].r], - video_6to8[cgapal[c].g], - video_6to8[cgapal[c].b]); + for (c = 0; c < 256; c++) { + palette_lookup[c] = makecol(video_6to8[cgapal[c].r], + video_6to8[cgapal[c].g], + video_6to8[cgapal[c].b]); } if ((cga_palette_monitor > 1) && (cga_palette_monitor < 7)) { - if (vid_cga_contrast != 0) { - for (c = 0; c < 16; c++) { - palette_lookup[c] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 2][c].r], - video_6to8[cgapal_mono[cga_palette_monitor - 2][c].g], - video_6to8[cgapal_mono[cga_palette_monitor - 2][c].b]); - palette_lookup[c+16] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 2][c].r], - video_6to8[cgapal_mono[cga_palette_monitor - 2][c].g], - video_6to8[cgapal_mono[cga_palette_monitor - 2][c].b]); - palette_lookup[c+32] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 2][c].r], - video_6to8[cgapal_mono[cga_palette_monitor - 2][c].g], - video_6to8[cgapal_mono[cga_palette_monitor - 2][c].b]); - palette_lookup[c+48] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 2][c].r], - video_6to8[cgapal_mono[cga_palette_monitor - 2][c].g], - video_6to8[cgapal_mono[cga_palette_monitor - 2][c].b]); - } - } else { - for (c = 0; c < 16; c++) { - palette_lookup[c] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 1][c].r], - video_6to8[cgapal_mono[cga_palette_monitor - 1][c].g], - video_6to8[cgapal_mono[cga_palette_monitor - 1][c].b]); - palette_lookup[c+16] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 1][c].r], - video_6to8[cgapal_mono[cga_palette_monitor - 1][c].g], - video_6to8[cgapal_mono[cga_palette_monitor - 1][c].b]); - palette_lookup[c+32] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 1][c].r], - video_6to8[cgapal_mono[cga_palette_monitor - 1][c].g], - video_6to8[cgapal_mono[cga_palette_monitor - 1][c].b]); - palette_lookup[c+48] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 1][c].r], - video_6to8[cgapal_mono[cga_palette_monitor - 1][c].g], - video_6to8[cgapal_mono[cga_palette_monitor - 1][c].b]); - } - } + if (vid_cga_contrast != 0) { + for (c = 0; c < 16; c++) { + palette_lookup[c] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 2][c].r], + video_6to8[cgapal_mono[cga_palette_monitor - 2][c].g], + video_6to8[cgapal_mono[cga_palette_monitor - 2][c].b]); + palette_lookup[c + 16] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 2][c].r], + video_6to8[cgapal_mono[cga_palette_monitor - 2][c].g], + video_6to8[cgapal_mono[cga_palette_monitor - 2][c].b]); + palette_lookup[c + 32] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 2][c].r], + video_6to8[cgapal_mono[cga_palette_monitor - 2][c].g], + video_6to8[cgapal_mono[cga_palette_monitor - 2][c].b]); + palette_lookup[c + 48] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 2][c].r], + video_6to8[cgapal_mono[cga_palette_monitor - 2][c].g], + video_6to8[cgapal_mono[cga_palette_monitor - 2][c].b]); + } + } else { + for (c = 0; c < 16; c++) { + palette_lookup[c] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 1][c].r], + video_6to8[cgapal_mono[cga_palette_monitor - 1][c].g], + video_6to8[cgapal_mono[cga_palette_monitor - 1][c].b]); + palette_lookup[c + 16] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 1][c].r], + video_6to8[cgapal_mono[cga_palette_monitor - 1][c].g], + video_6to8[cgapal_mono[cga_palette_monitor - 1][c].b]); + palette_lookup[c + 32] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 1][c].r], + video_6to8[cgapal_mono[cga_palette_monitor - 1][c].g], + video_6to8[cgapal_mono[cga_palette_monitor - 1][c].b]); + palette_lookup[c + 48] = makecol(video_6to8[cgapal_mono[cga_palette_monitor - 1][c].r], + video_6to8[cgapal_mono[cga_palette_monitor - 1][c].g], + video_6to8[cgapal_mono[cga_palette_monitor - 1][c].b]); + } + } } if (cga_palette_monitor == 7) - palette_lookup[0x16] = makecol(video_6to8[42],video_6to8[42],video_6to8[0]); + palette_lookup[0x16] = makecol(video_6to8[42], video_6to8[42], video_6to8[0]); } - void video_inform_monitor(int type, const video_timings_t *ptr, int monitor_index) { - monitor_t* monitor = &monitors[monitor_index]; - monitor->mon_vid_type = type; + monitor_t *monitor = &monitors[monitor_index]; + monitor->mon_vid_type = type; monitor->mon_vid_timings = ptr; } - int video_get_type_monitor(int monitor_index) { return monitors[monitor_index].mon_vid_type; } - void video_update_timing(void) { - const video_timings_t* monitor_vid_timings = NULL; - int *vid_timing_read_b = NULL; - int *vid_timing_read_l = NULL; - int *vid_timing_read_w = NULL; - int *vid_timing_write_b = NULL; - int *vid_timing_write_l = NULL; - int *vid_timing_write_w = NULL; - int i = 0; + const video_timings_t *monitor_vid_timings = NULL; + int *vid_timing_read_b = NULL; + int *vid_timing_read_l = NULL; + int *vid_timing_read_w = NULL; + int *vid_timing_write_b = NULL; + int *vid_timing_write_l = NULL; + int *vid_timing_write_w = NULL; + int i = 0; for (i = 0; i < MONITORS_NUM; i++) { monitor_vid_timings = monitors[i].mon_vid_timings; if (!monitor_vid_timings) - continue; - vid_timing_read_b = &monitors[i].mon_video_timing_read_b; - vid_timing_read_l = &monitors[i].mon_video_timing_read_l; - vid_timing_read_w = &monitors[i].mon_video_timing_read_w; + continue; + vid_timing_read_b = &monitors[i].mon_video_timing_read_b; + vid_timing_read_l = &monitors[i].mon_video_timing_read_l; + vid_timing_read_w = &monitors[i].mon_video_timing_read_w; vid_timing_write_b = &monitors[i].mon_video_timing_write_b; vid_timing_write_l = &monitors[i].mon_video_timing_write_l; vid_timing_write_w = &monitors[i].mon_video_timing_write_w; if (monitor_vid_timings->type == VIDEO_ISA) { - *vid_timing_read_b = ISA_CYCLES(monitor_vid_timings->read_b); - *vid_timing_read_w = ISA_CYCLES(monitor_vid_timings->read_w); - *vid_timing_read_l = ISA_CYCLES(monitor_vid_timings->read_l); - *vid_timing_write_b = ISA_CYCLES(monitor_vid_timings->write_b); - *vid_timing_write_w = ISA_CYCLES(monitor_vid_timings->write_w); - *vid_timing_write_l = ISA_CYCLES(monitor_vid_timings->write_l); + *vid_timing_read_b = ISA_CYCLES(monitor_vid_timings->read_b); + *vid_timing_read_w = ISA_CYCLES(monitor_vid_timings->read_w); + *vid_timing_read_l = ISA_CYCLES(monitor_vid_timings->read_l); + *vid_timing_write_b = ISA_CYCLES(monitor_vid_timings->write_b); + *vid_timing_write_w = ISA_CYCLES(monitor_vid_timings->write_w); + *vid_timing_write_l = ISA_CYCLES(monitor_vid_timings->write_l); } else if (monitor_vid_timings->type == VIDEO_PCI) { - *vid_timing_read_b = (int)(pci_timing * monitor_vid_timings->read_b); - *vid_timing_read_w = (int)(pci_timing * monitor_vid_timings->read_w); - *vid_timing_read_l = (int)(pci_timing * monitor_vid_timings->read_l); - *vid_timing_write_b = (int)(pci_timing * monitor_vid_timings->write_b); - *vid_timing_write_w = (int)(pci_timing * monitor_vid_timings->write_w); - *vid_timing_write_l = (int)(pci_timing * monitor_vid_timings->write_l); + *vid_timing_read_b = (int) (pci_timing * monitor_vid_timings->read_b); + *vid_timing_read_w = (int) (pci_timing * monitor_vid_timings->read_w); + *vid_timing_read_l = (int) (pci_timing * monitor_vid_timings->read_l); + *vid_timing_write_b = (int) (pci_timing * monitor_vid_timings->write_b); + *vid_timing_write_w = (int) (pci_timing * monitor_vid_timings->write_w); + *vid_timing_write_l = (int) (pci_timing * monitor_vid_timings->write_l); } else if (monitor_vid_timings->type == VIDEO_AGP) { - *vid_timing_read_b = (int)(agp_timing * monitor_vid_timings->read_b); - *vid_timing_read_w = (int)(agp_timing * monitor_vid_timings->read_w); - *vid_timing_read_l = (int)(agp_timing * monitor_vid_timings->read_l); - *vid_timing_write_b = (int)(agp_timing * monitor_vid_timings->write_b); - *vid_timing_write_w = (int)(agp_timing * monitor_vid_timings->write_w); - *vid_timing_write_l = (int)(agp_timing * monitor_vid_timings->write_l); + *vid_timing_read_b = (int) (agp_timing * monitor_vid_timings->read_b); + *vid_timing_read_w = (int) (agp_timing * monitor_vid_timings->read_w); + *vid_timing_read_l = (int) (agp_timing * monitor_vid_timings->read_l); + *vid_timing_write_b = (int) (agp_timing * monitor_vid_timings->write_b); + *vid_timing_write_w = (int) (agp_timing * monitor_vid_timings->write_w); + *vid_timing_write_l = (int) (agp_timing * monitor_vid_timings->write_l); } else { - *vid_timing_read_b = (int)(bus_timing * monitor_vid_timings->read_b); - *vid_timing_read_w = (int)(bus_timing * monitor_vid_timings->read_w); - *vid_timing_read_l = (int)(bus_timing * monitor_vid_timings->read_l); - *vid_timing_write_b = (int)(bus_timing * monitor_vid_timings->write_b); - *vid_timing_write_w = (int)(bus_timing * monitor_vid_timings->write_w); - *vid_timing_write_l = (int)(bus_timing * monitor_vid_timings->write_l); + *vid_timing_read_b = (int) (bus_timing * monitor_vid_timings->read_b); + *vid_timing_read_w = (int) (bus_timing * monitor_vid_timings->read_w); + *vid_timing_read_l = (int) (bus_timing * monitor_vid_timings->read_l); + *vid_timing_write_b = (int) (bus_timing * monitor_vid_timings->write_b); + *vid_timing_write_w = (int) (bus_timing * monitor_vid_timings->write_w); + *vid_timing_write_l = (int) (bus_timing * monitor_vid_timings->write_l); } if (cpu_16bitbus) { - *vid_timing_read_l = *vid_timing_read_w * 2; - *vid_timing_write_l = *vid_timing_write_w * 2; + *vid_timing_read_l = *vid_timing_read_w * 2; + *vid_timing_write_l = *vid_timing_write_w * 2; } } } - int calc_6to8(int c) { - int ic, i8; + int ic, i8; double d8; ic = c; if (ic == 64) - ic = 63; - else - ic &= 0x3f; + ic = 63; + else + ic &= 0x3f; d8 = (ic / 63.0) * 255.0; i8 = (int) d8; - return(i8 & 0xff); + return (i8 & 0xff); } - int calc_8to32(int c) { - int b, g, r; + int b, g, r; double db, dg, dr; - b = (c & 3); - g = ((c >> 2) & 7); - r = ((c >> 5) & 7); - db = (((double) b) / 3.0) * 255.0; - dg = (((double) g) / 7.0) * 255.0; - dr = (((double) r) / 7.0) * 255.0; - b = (int) db; - g = ((int) dg) << 8; - r = ((int) dr) << 16; + b = (c & 3); + g = ((c >> 2) & 7); + r = ((c >> 5) & 7); + db = (((double) b) / 3.0) * 255.0; + dg = (((double) g) / 7.0) * 255.0; + dr = (((double) r) / 7.0) * 255.0; + b = (int) db; + g = ((int) dg) << 8; + r = ((int) dr) << 16; - return(b | g | r); + return (b | g | r); } - int calc_15to32(int c) { - int b, g, r; + int b, g, r; double db, dg, dr; - b = (c & 31); - g = ((c >> 5) & 31); - r = ((c >> 10) & 31); + b = (c & 31); + g = ((c >> 5) & 31); + r = ((c >> 10) & 31); db = (((double) b) / 31.0) * 255.0; dg = (((double) g) / 31.0) * 255.0; dr = (((double) r) / 31.0) * 255.0; - b = (int) db; - g = ((int) dg) << 8; - r = ((int) dr) << 16; + b = (int) db; + g = ((int) dg) << 8; + r = ((int) dr) << 16; - return(b | g | r); + return (b | g | r); } - int calc_16to32(int c) { - int b, g, r; + int b, g, r; double db, dg, dr; - b = (c & 31); - g = ((c >> 5) & 63); - r = ((c >> 11) & 31); + b = (c & 31); + g = ((c >> 5) & 63); + r = ((c >> 11) & 31); db = (((double) b) / 31.0) * 255.0; dg = (((double) g) / 63.0) * 255.0; dr = (((double) r) / 31.0) * 255.0; - b = (int) db; - g = ((int) dg) << 8; - r = ((int) dr) << 16; + b = (int) db; + g = ((int) dg) << 8; + r = ((int) dr) << 16; - return(b | g | r); + return (b | g | r); } - void hline(bitmap_t *b, int x1, int y, int x2, uint32_t col) { int x; if (y < 0 || y >= b->h) - return; + return; for (x = x1; x < x2; x++) - b->line[y][x] = col; + b->line[y][x] = col; } - void blit(bitmap_t *src, bitmap_t *dst, int x1, int y1, int x2, int y2, int xs, int ys) { } - void stretch_blit(bitmap_t *src, bitmap_t *dst, int x1, int y1, int xs1, int ys1, int x2, int y2, int xs2, int ys2) { } - void rectfill(bitmap_t *b, int x1, int y1, int x2, int y2, uint32_t col) { } - void set_palette(PALETTE p) { } - void destroy_bitmap(bitmap_t *b) { if ((b != NULL) && (b->dat != NULL)) - free(b->dat); + free(b->dat); if (b != NULL) - free(b); + free(b); } - bitmap_t * create_bitmap(int x, int y) { bitmap_t *b = malloc(sizeof(bitmap_t) + (y * sizeof(uint32_t *))); - int c; + int c; b->dat = malloc(x * y * 4); for (c = 0; c < y; c++) - b->line[c] = &(b->dat[c * x]); + b->line[c] = &(b->dat[c * x]); b->w = x; b->h = y; - return(b); + return (b); } void video_monitor_init(int index) { memset(&monitors[index], 0, sizeof(monitor_t)); - monitors[index].mon_xsize = 640; - monitors[index].mon_ysize = 480; - monitors[index].mon_res_x = 640; - monitors[index].mon_res_y = 480; - monitors[index].mon_scrnsz_x = 640; - monitors[index].mon_scrnsz_y = 480; - monitors[index].mon_efscrnsz_y = 480; - monitors[index].mon_unscaled_size_x = 480; - monitors[index].mon_unscaled_size_y = 480; - monitors[index].mon_bpp = 8; - monitors[index].mon_changeframecount = 2; - monitors[index].target_buffer = create_bitmap(2048, 2048); - monitors[index].mon_blit_data_ptr = calloc(1, sizeof(blit_data_t)); - monitors[index].mon_blit_data_ptr->wake_blit_thread = thread_create_event(); - monitors[index].mon_blit_data_ptr->blit_complete = thread_create_event(); + monitors[index].mon_xsize = 640; + monitors[index].mon_ysize = 480; + monitors[index].mon_res_x = 640; + monitors[index].mon_res_y = 480; + monitors[index].mon_scrnsz_x = 640; + monitors[index].mon_scrnsz_y = 480; + monitors[index].mon_efscrnsz_y = 480; + monitors[index].mon_unscaled_size_x = 480; + monitors[index].mon_unscaled_size_y = 480; + monitors[index].mon_bpp = 8; + monitors[index].mon_changeframecount = 2; + monitors[index].target_buffer = create_bitmap(2048, 2048); + monitors[index].mon_blit_data_ptr = calloc(1, sizeof(blit_data_t)); + monitors[index].mon_blit_data_ptr->wake_blit_thread = thread_create_event(); + monitors[index].mon_blit_data_ptr->blit_complete = thread_create_event(); monitors[index].mon_blit_data_ptr->buffer_not_in_use = thread_create_event(); - monitors[index].mon_blit_data_ptr->thread_run = 1; - monitors[index].mon_blit_data_ptr->monitor_index = index; - monitors[index].mon_pal_lookup = calloc(sizeof(uint32_t), 256); - monitors[index].mon_cga_palette = calloc(1, sizeof(int)); - monitors[index].mon_force_resize = 1; - monitors[index].mon_vid_type = VIDEO_FLAG_TYPE_NONE; + monitors[index].mon_blit_data_ptr->thread_run = 1; + monitors[index].mon_blit_data_ptr->monitor_index = index; + monitors[index].mon_pal_lookup = calloc(sizeof(uint32_t), 256); + monitors[index].mon_cga_palette = calloc(1, sizeof(int)); + monitors[index].mon_force_resize = 1; + monitors[index].mon_vid_type = VIDEO_FLAG_TYPE_NONE; atomic_init(&doresize_monitors[index], 0); atomic_init(&monitors[index].mon_screenshots, 0); - if (index >= 1) ui_init_monitor(index); + if (index >= 1) + ui_init_monitor(index); monitors[index].mon_blit_data_ptr->blit_thread = thread_create(blit_thread, monitors[index].mon_blit_data_ptr); } void video_monitor_close(int monitor_index) { - if (monitors[monitor_index].target_buffer == NULL) { return; } + if (monitors[monitor_index].target_buffer == NULL) { + return; + } monitors[monitor_index].mon_blit_data_ptr->thread_run = 0; thread_set_event(monitors[monitor_index].mon_blit_data_ptr->wake_blit_thread); thread_wait(monitors[monitor_index].mon_blit_data_ptr->blit_thread); - if (monitor_index >= 1) ui_deinit_monitor(monitor_index); + if (monitor_index >= 1) + ui_deinit_monitor(monitor_index); thread_destroy_event(monitors[monitor_index].mon_blit_data_ptr->buffer_not_in_use); thread_destroy_event(monitors[monitor_index].mon_blit_data_ptr->blit_complete); thread_destroy_event(monitors[monitor_index].mon_blit_data_ptr->wake_blit_thread); free(monitors[monitor_index].mon_blit_data_ptr); - if (!monitors[monitor_index].mon_pal_lookup_static) free(monitors[monitor_index].mon_pal_lookup); - if (!monitors[monitor_index].mon_cga_palette_static) free(monitors[monitor_index].mon_cga_palette); + if (!monitors[monitor_index].mon_pal_lookup_static) + free(monitors[monitor_index].mon_pal_lookup); + if (!monitors[monitor_index].mon_cga_palette_static) + free(monitors[monitor_index].mon_cga_palette); destroy_bitmap(monitors[monitor_index].target_buffer); monitors[monitor_index].target_buffer = NULL; memset(&monitors[monitor_index], 0, sizeof(monitor_t)); @@ -906,62 +881,64 @@ video_monitor_close(int monitor_index) void video_init(void) { - int c, d; + int c, d; uint8_t total[2] = { 0, 1 }; for (c = 0; c < 16; c++) { - cga_2_table[c] = (total[(c >> 3) & 1] << 0 ) | (total[(c >> 2) & 1] << 8 ) | - (total[(c >> 1) & 1] << 16) | (total[(c >> 0) & 1] << 24); + cga_2_table[c] = (total[(c >> 3) & 1] << 0) | (total[(c >> 2) & 1] << 8) | (total[(c >> 1) & 1] << 16) | (total[(c >> 0) & 1] << 24); } for (c = 0; c < 64; c++) { - cgapal[c + 64].r = (((c & 4) ? 2 : 0) | ((c & 0x10) ? 1 : 0)) * 21; - cgapal[c + 64].g = (((c & 2) ? 2 : 0) | ((c & 0x10) ? 1 : 0)) * 21; - cgapal[c + 64].b = (((c & 1) ? 2 : 0) | ((c & 0x10) ? 1 : 0)) * 21; - if ((c & 0x17) == 6) - cgapal[c + 64].g >>= 1; + cgapal[c + 64].r = (((c & 4) ? 2 : 0) | ((c & 0x10) ? 1 : 0)) * 21; + cgapal[c + 64].g = (((c & 2) ? 2 : 0) | ((c & 0x10) ? 1 : 0)) * 21; + cgapal[c + 64].b = (((c & 1) ? 2 : 0) | ((c & 0x10) ? 1 : 0)) * 21; + if ((c & 0x17) == 6) + cgapal[c + 64].g >>= 1; } for (c = 0; c < 64; c++) { - cgapal[c + 128].r = (((c & 4) ? 2 : 0) | ((c & 0x20) ? 1 : 0)) * 21; - cgapal[c + 128].g = (((c & 2) ? 2 : 0) | ((c & 0x10) ? 1 : 0)) * 21; - cgapal[c + 128].b = (((c & 1) ? 2 : 0) | ((c & 0x08) ? 1 : 0)) * 21; + cgapal[c + 128].r = (((c & 4) ? 2 : 0) | ((c & 0x20) ? 1 : 0)) * 21; + cgapal[c + 128].g = (((c & 2) ? 2 : 0) | ((c & 0x10) ? 1 : 0)) * 21; + cgapal[c + 128].b = (((c & 1) ? 2 : 0) | ((c & 0x08) ? 1 : 0)) * 21; } for (c = 0; c < 4; c++) { - for (d = 0; d < 4; d++) { - edatlookup[c][d] = 0; - if (c & 1) edatlookup[c][d] |= 1; - if (d & 1) edatlookup[c][d] |= 2; - if (c & 2) edatlookup[c][d] |= 0x10; - if (d & 2) edatlookup[c][d] |= 0x20; - } + for (d = 0; d < 4; d++) { + edatlookup[c][d] = 0; + if (c & 1) + edatlookup[c][d] |= 1; + if (d & 1) + edatlookup[c][d] |= 2; + if (c & 2) + edatlookup[c][d] |= 0x10; + if (d & 2) + edatlookup[c][d] |= 0x20; + } } video_6to8 = malloc(4 * 256); for (c = 0; c < 256; c++) - video_6to8[c] = calc_6to8(c); + video_6to8[c] = calc_6to8(c); video_8togs = malloc(4 * 256); for (c = 0; c < 256; c++) - video_8togs[c] = c | (c << 16) | (c << 24); + video_8togs[c] = c | (c << 16) | (c << 24); video_8to32 = malloc(4 * 256); for (c = 0; c < 256; c++) - video_8to32[c] = calc_8to32(c); + video_8to32[c] = calc_8to32(c); video_15to32 = malloc(4 * 65536); for (c = 0; c < 65536; c++) - video_15to32[c] = calc_15to32(c & 0x7fff); + video_15to32[c] = calc_15to32(c & 0x7fff); video_16to32 = malloc(4 * 65536); for (c = 0; c < 65536; c++) - video_16to32[c] = calc_16to32(c); + video_16to32[c] = calc_16to32(c); memset(monitors, 0, sizeof(monitors)); video_monitor_init(0); } - void video_close(void) { @@ -974,13 +951,13 @@ video_close(void) free(video_6to8); if (fontdatksc5601) { - free(fontdatksc5601); - fontdatksc5601 = NULL; + free(fontdatksc5601); + fontdatksc5601 = NULL; } if (fontdatksc5601_user) { - free(fontdatksc5601_user); - fontdatksc5601_user = NULL; + free(fontdatksc5601_user); + fontdatksc5601_user = NULL; } } @@ -990,150 +967,138 @@ video_force_resize_get_monitor(int monitor_index) return monitors[monitor_index].mon_force_resize; } - void video_force_resize_set_monitor(uint8_t res, int monitor_index) { monitors[monitor_index].mon_force_resize = res; } - void loadfont_common(FILE *f, int format) { int c, d; - switch (format) { - case 0: /* MDA */ - for (c=0; c<256; c++) - for (d=0; d<8; d++) - fontdatm[c][d] = fgetc(f) & 0xff; - for (c=0; c<256; c++) - for (d=0; d<8; d++) - fontdatm[c][d+8] = fgetc(f) & 0xff; - (void)fseek(f, 4096+2048, SEEK_SET); - for (c=0; c<256; c++) - for (d=0; d<8; d++) - fontdat[c][d] = fgetc(f) & 0xff; - break; + switch (format) { + case 0: /* MDA */ + for (c = 0; c < 256; c++) + for (d = 0; d < 8; d++) + fontdatm[c][d] = fgetc(f) & 0xff; + for (c = 0; c < 256; c++) + for (d = 0; d < 8; d++) + fontdatm[c][d + 8] = fgetc(f) & 0xff; + (void) fseek(f, 4096 + 2048, SEEK_SET); + for (c = 0; c < 256; c++) + for (d = 0; d < 8; d++) + fontdat[c][d] = fgetc(f) & 0xff; + break; - case 1: /* PC200 */ - for (d = 0; d < 4; d++) { - /* There are 4 fonts in the ROM */ - for (c = 0; c < 256; c++) /* 8x14 MDA in 8x16 cell */ - (void) !fread(&fontdatm[256*d + c][0], 1, 16, f); - for (c = 0; c < 256; c++) { /* 8x8 CGA in 8x16 cell */ - (void) !fread(&fontdat[256*d + c][0], 1, 8, f); - fseek(f, 8, SEEK_CUR); - } - } - break; + case 1: /* PC200 */ + for (d = 0; d < 4; d++) { + /* There are 4 fonts in the ROM */ + for (c = 0; c < 256; c++) /* 8x14 MDA in 8x16 cell */ + fread(&fontdatm[256 * d + c][0], 1, 16, f); + for (c = 0; c < 256; c++) { /* 8x8 CGA in 8x16 cell */ + fread(&fontdat[256 * d + c][0], 1, 8, f); + fseek(f, 8, SEEK_CUR); + } + } + break; - default: - case 2: /* CGA */ - for (c=0; c<256; c++) - for (d=0; d<8; d++) - fontdat[c][d] = fgetc(f) & 0xff; - break; + default: + case 2: /* CGA */ + for (c = 0; c < 256; c++) + for (d = 0; d < 8; d++) + fontdat[c][d] = fgetc(f) & 0xff; + break; - case 3: /* Wyse 700 */ - for (c=0; c<512; c++) - for (d=0; d<32; d++) - fontdatw[c][d] = fgetc(f) & 0xff; - break; + case 3: /* Wyse 700 */ + for (c = 0; c < 512; c++) + for (d = 0; d < 32; d++) + fontdatw[c][d] = fgetc(f) & 0xff; + break; - case 4: /* MDSI Genius */ - for (c=0; c<256; c++) - for (d=0; d<16; d++) - fontdat8x12[c][d] = fgetc(f) & 0xff; - break; + case 4: /* MDSI Genius */ + for (c = 0; c < 256; c++) + for (d = 0; d < 16; d++) + fontdat8x12[c][d] = fgetc(f) & 0xff; + break; - case 5: /* Toshiba 3100e */ - for (d = 0; d < 2048; d += 512) /* Four languages... */ - { - for (c = d; c < d+256; c++) - { - (void) !fread(&fontdatm[c][8], 1, 8, f); - } - for (c = d+256; c < d+512; c++) - { - (void) !fread(&fontdatm[c][8], 1, 8, f); - } - for (c = d; c < d+256; c++) - { - (void) !fread(&fontdatm[c][0], 1, 8, f); - } - for (c = d+256; c < d+512; c++) - { - (void) !fread(&fontdatm[c][0], 1, 8, f); - } - fseek(f, 4096, SEEK_CUR); /* Skip blank section */ - for (c = d; c < d+256; c++) - { - (void) !fread(&fontdat[c][0], 1, 8, f); - } - for (c = d+256; c < d+512; c++) - { - (void) !fread(&fontdat[c][0], 1, 8, f); - } - } - break; + case 5: /* Toshiba 3100e */ + for (d = 0; d < 2048; d += 512) { /* Four languages... */ + for (c = d; c < d + 256; c++) { + (void) !fread(&fontdatm[c][8], 1, 8, f); + } + for (c = d + 256; c < d + 512; c++) { + (void) !fread(&fontdatm[c][8], 1, 8, f); + } + for (c = d; c < d + 256; c++) { + (void) !fread(&fontdatm[c][0], 1, 8, f); + } + for (c = d + 256; c < d + 512; c++) { + (void) !fread(&fontdatm[c][0], 1, 8, f); + } + fseek(f, 4096, SEEK_CUR); /* Skip blank section */ + for (c = d; c < d + 256; c++) { + (void) !fread(&fontdat[c][0], 1, 8, f); + } + for (c = d + 256; c < d + 512; c++) { + (void) !fread(&fontdat[c][0], 1, 8, f); + } + } + break; - case 6: /* Korean KSC-5601 */ - if (!fontdatksc5601) - fontdatksc5601 = malloc(16384 * sizeof(dbcs_font_t)); + case 6: /* Korean KSC-5601 */ + if (!fontdatksc5601) + fontdatksc5601 = malloc(16384 * sizeof(dbcs_font_t)); - if (!fontdatksc5601_user) - fontdatksc5601_user = malloc(192 * sizeof(dbcs_font_t)); + if (!fontdatksc5601_user) + fontdatksc5601_user = malloc(192 * sizeof(dbcs_font_t)); - for (c = 0; c < 16384; c++) - { - for (d = 0; d < 32; d++) - fontdatksc5601[c].chr[d]=fgetc(f) & 0xff; - } - break; + for (c = 0; c < 16384; c++) { + for (d = 0; d < 32; d++) + fontdatksc5601[c].chr[d] = fgetc(f) & 0xff; + } + break; - case 7: /* Sigma Color 400 */ - /* The first 4k of the character ROM holds an 8x8 font */ - for (c = 0; c < 256; c++) { - (void) !fread(&fontdat[c][0], 1, 8, f); - fseek(f, 8, SEEK_CUR); - } - /* The second 4k holds an 8x16 font */ - for (c = 0; c < 256; c++) { - if (fread(&fontdatm[c][0], 1, 16, f) != 16) - fatal("loadfont(): Error reading 8x16 font in Sigma Color 400 mode, c = %i\n", c); - } - break; + case 7: /* Sigma Color 400 */ + /* The first 4k of the character ROM holds an 8x8 font */ + for (c = 0; c < 256; c++) { + (void) !fread(&fontdat[c][0], 1, 8, f); + fseek(f, 8, SEEK_CUR); + } + /* The second 4k holds an 8x16 font */ + for (c = 0; c < 256; c++) { + if (fread(&fontdatm[c][0], 1, 16, f) != 16) + fatal("loadfont(): Error reading 8x16 font in Sigma Color 400 mode, c = %i\n", c); + } + break; - case 8: /* Amstrad PC1512, Toshiba T1000/T1200 */ - for (c = 0; c < 2048; c++) /* Allow up to 2048 chars */ - for (d=0; d<8; d++) - fontdat[c][d] = fgetc(f) & 0xff; - break; + case 8: /* Amstrad PC1512, Toshiba T1000/T1200 */ + for (c = 0; c < 2048; c++) /* Allow up to 2048 chars */ + for (d = 0; d < 8; d++) + fontdat[c][d] = fgetc(f) & 0xff; + break; - case 9: /* Image Manager 1024 native font */ - for (c = 0; c < 256; c++) - (void) !fread(&fontdat12x18[c][0], 1, 36, f); - break; + case 9: /* Image Manager 1024 native font */ + for (c = 0; c < 256; c++) + (void) !fread(&fontdat12x18[c][0], 1, 36, f); + break; + } - } - - (void)fclose(f); + (void) fclose(f); } void loadfont_ex(char *s, int format, int offset) { - FILE *f; + FILE *f; f = rom_fopen(s, "rb"); if (f == NULL) - return; - - fseek(f, offset, SEEK_SET); - loadfont_common(f, format); + return; + fseek(f, offset, SEEK_SET); + loadfont_common(f, format); } void @@ -1147,27 +1112,29 @@ video_color_transform(uint32_t color) { uint8_t *clr8 = (uint8_t *) &color; /* if (!video_grayscale && !invert_display) - return color; */ + return color; */ if (video_grayscale) { - if (video_graytype) { - if (video_graytype == 1) - color = ((54 * (uint32_t)clr8[2]) + (183 * (uint32_t)clr8[1]) + (18 * (uint32_t)clr8[0])) / 255; - else - color = ((uint32_t)clr8[2] + (uint32_t)clr8[1] + (uint32_t)clr8[0]) / 3; - } else - color = ((76 * (uint32_t)clr8[2]) + (150 * (uint32_t)clr8[1]) + (29 * (uint32_t)clr8[0])) / 255; - switch (video_grayscale) { - case 2: case 3: case 4: - color = (uint32_t) shade[video_grayscale][color]; - break; - default: - clr8[3] = 0; - clr8[0] = color; - clr8[1] = clr8[2] = clr8[0]; - break; - } + if (video_graytype) { + if (video_graytype == 1) + color = ((54 * (uint32_t) clr8[2]) + (183 * (uint32_t) clr8[1]) + (18 * (uint32_t) clr8[0])) / 255; + else + color = ((uint32_t) clr8[2] + (uint32_t) clr8[1] + (uint32_t) clr8[0]) / 3; + } else + color = ((76 * (uint32_t) clr8[2]) + (150 * (uint32_t) clr8[1]) + (29 * (uint32_t) clr8[0])) / 255; + switch (video_grayscale) { + case 2: + case 3: + case 4: + color = (uint32_t) shade[video_grayscale][color]; + break; + default: + clr8[3] = 0; + clr8[0] = color; + clr8[1] = clr8[2] = clr8[0]; + break; + } } if (invert_display) - color ^= 0x00ffffff; + color ^= 0x00ffffff; return color; } From aa67147525f6e54def0df936ddcf2061247496a5 Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Wed, 31 Aug 2022 19:46:36 -0400 Subject: [PATCH 330/386] Media history: small adjustment for vcpkg builds --- src/qt/qt_mediahistorymanager.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_mediahistorymanager.cpp b/src/qt/qt_mediahistorymanager.cpp index 2c08f66f9..a672c0843 100644 --- a/src/qt/qt_mediahistorymanager.cpp +++ b/src/qt/qt_mediahistorymanager.cpp @@ -289,7 +289,7 @@ MediaHistoryManager::removeMissingImages(device_index_list_t &device_history) continue; } // For this check, explicitly prepend `usr_path` to relative paths to account for $CWD platform variances - QFileInfo absolute_path = file_info.isRelative() ? getUsrPath().append(file_info.filePath()) : file_info; + QFileInfo absolute_path = file_info.isRelative() ? QFileInfo(getUsrPath().append(file_info.filePath())) : file_info; if(!absolute_path.exists()) { qWarning("Image file %s does not exist - removing from history", qPrintable(file_info.filePath())); checked_path = ""; From 194b85b601380f0201f86e5d6b5d1abf6f6c756f Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Wed, 31 Aug 2022 21:46:30 -0300 Subject: [PATCH 331/386] agpgart: Fix AGP aperture never being enabled --- src/video/agpgart.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/video/agpgart.c b/src/video/agpgart.c index cf4fcd7a8..e84a2dd85 100644 --- a/src/video/agpgart.c +++ b/src/video/agpgart.c @@ -51,10 +51,11 @@ agpgart_set_aperture(agpgart_t *dev, uint32_t base, uint32_t size, int enable) /* Disable old aperture mapping. */ mem_mapping_disable(&dev->aperture_mapping); - /* Set new aperture base address, size and mask. */ + /* Set new aperture base address, size, mask and enable. */ dev->aperture_base = base; dev->aperture_size = size; dev->aperture_mask = size - 1; + dev->aperture_enable = enable; /* Enable new aperture mapping if requested. */ if (dev->aperture_base && dev->aperture_size && dev->aperture_enable) { From 11f6fee8caf484ce20d9a8a3d9403eea355a3cf4 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Thu, 1 Sep 2022 16:55:12 +0600 Subject: [PATCH 332/386] qt_hardwarerenderer: Don't update the entire texture on blits --- src/qt/qt_hardwarerenderer.cpp | 4 +++- src/qt/qt_hardwarerenderer.hpp | 5 +++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/src/qt/qt_hardwarerenderer.cpp b/src/qt/qt_hardwarerenderer.cpp index 3577234ee..a7af8bb4c 100644 --- a/src/qt/qt_hardwarerenderer.cpp +++ b/src/qt/qt_hardwarerenderer.cpp @@ -21,6 +21,8 @@ #include "qt_hardwarerenderer.hpp" #include #include +#include + #include #include @@ -196,7 +198,7 @@ void HardwareRenderer::onBlit(int buf_idx, int x, int y, int w, int h) { return; } m_context->makeCurrent(this); - m_texture->setData(QOpenGLTexture::PixelFormat::RGBA, QOpenGLTexture::PixelType::UInt8, (const void*)imagebufs[buf_idx].get()); + m_texture->setData(0, 0, 0, w + x, h + y, 0, QOpenGLTexture::PixelFormat::RGBA, QOpenGLTexture::PixelType::UInt8, (const void*)imagebufs[buf_idx].get(), &m_transferOptions); buf_usage[buf_idx].clear(); source.setRect(x, y, w, h); if (origSource != source) onResize(this->width(), this->height()); diff --git a/src/qt/qt_hardwarerenderer.hpp b/src/qt/qt_hardwarerenderer.hpp index b9b7895e0..6bf0d3276 100644 --- a/src/qt/qt_hardwarerenderer.hpp +++ b/src/qt/qt_hardwarerenderer.hpp @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -38,6 +39,8 @@ private: QOpenGLTextureBlitter* m_blt{nullptr}; QOpenGLBuffer m_vbo[2]; QOpenGLVertexArrayObject m_vao; + QOpenGLPixelTransferOptions m_transferOptions; + public: enum class RenderType { OpenGL, @@ -67,6 +70,8 @@ public: parentWidget = parent; setRenderType(rtype); + m_transferOptions.setRowLength(2048); + m_context = new QOpenGLContext(); m_context->setFormat(format()); m_context->create(); From c3f6a461429a9fff28c479aa48ad478594fa0059 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Thu, 1 Sep 2022 17:52:51 +0200 Subject: [PATCH 333/386] XGA: Revert to the rom_init routine to load the XGA-1/XGA-2 bios, this fixes intermittent hangs on the XGA-2 end (MCA only, ISA version is intact). --- src/video/vid_xga.c | 1080 ++++++++++++++++++++++--------------------- 1 file changed, 550 insertions(+), 530 deletions(-) diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index f8787fa53..df145743c 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -35,10 +35,10 @@ #include <86box/vid_xga_device.h> #include "cpu.h" -#define XGA_BIOS_PATH "roms/video/xga/XGA_37F9576_Ver200.BIN" +#define XGA_BIOS_PATH "roms/video/xga/XGA_37F9576_Ver200.BIN" #define XGA2_BIOS_PATH "roms/video/xga/xga2_v300.bin" -static void xga_ext_outb(uint16_t addr, uint8_t val, void *p); +static void xga_ext_outb(uint16_t addr, uint8_t val, void *p); static uint8_t xga_ext_inb(uint16_t addr, void *p); static void @@ -46,7 +46,7 @@ xga_updatemapping(svga_t *svga) { xga_t *xga = &svga->xga; - // pclog("OpMode = %x, linear base = %08x, aperture cntl = %d, opmodereset1 = %d, access mode = %x, map = %x.\n", xga->op_mode, xga->linear_base, xga->aperture_cntl, xga->op_mode_reset, xga->access_mode, svga->gdcreg[6] & 0x0c); + //pclog("OpMode = %x, linear base = %08x, aperture cntl = %d, opmodereset1 = %d, access mode = %x, map = %x.\n", xga->op_mode, xga->linear_base, xga->aperture_cntl, xga->op_mode_reset, xga->access_mode, svga->gdcreg[6] & 0x0c); if ((xga->op_mode & 7) >= 4) { if (xga->aperture_cntl == 1) { mem_mapping_disable(&svga->mapping); @@ -72,7 +72,7 @@ linear: mem_mapping_disable(&xga->linear_mapping); } xga->on = 0; - vga_on = 1; + vga_on = 1; if (((xga->op_mode & 7) == 4) && ((svga->gdcreg[6] & 0x0c) == 0x0c) && !xga->a5_test) xga->linear_endian_reverse = 1; } else { @@ -99,7 +99,7 @@ linear: } mem_mapping_disable(&xga->linear_mapping); xga->on = 0; - vga_on = 1; + vga_on = 1; } } @@ -109,10 +109,10 @@ xga_recalctimings(svga_t *svga) xga_t *xga = &svga->xga; if (xga->on) { - xga->v_total = xga->vtotal + 1; - xga->dispend = xga->vdispend + 1; - xga->v_syncstart = xga->vsyncstart + 1; - xga->split = xga->linecmp + 1; + xga->v_total = xga->vtotal + 1; + xga->dispend = xga->vdispend + 1; + xga->v_syncstart = xga->vsyncstart + 1; + xga->split = xga->linecmp + 1; xga->v_blankstart = xga->vblankstart + 1; xga->h_disp = (xga->hdisp + 1) << 3; @@ -120,7 +120,7 @@ xga_recalctimings(svga_t *svga) xga->rowoffset = (xga->hdisp + 1); xga->interlace = !!(xga->disp_cntl_1 & 0x08); - xga->rowcount = (xga->disp_cntl_2 & 0xc0) >> 6; + xga->rowcount = (xga->disp_cntl_2 & 0xc0) >> 6; if (xga->interlace) { xga->v_total >>= 1; @@ -135,16 +135,16 @@ xga_recalctimings(svga_t *svga) switch (xga->clk_sel_1 & 0x0c) { case 0: if (xga->clk_sel_2 & 0x80) { - svga->clock = (cpuclock * (double) (1ull << 32)) / 41539000.0; + svga->clock = (cpuclock * (double)(1ull << 32)) / 41539000.0; } else { - svga->clock = (cpuclock * (double) (1ull << 32)) / 25175000.0; + svga->clock = (cpuclock * (double)(1ull << 32)) / 25175000.0; } break; case 4: - svga->clock = (cpuclock * (double) (1ull << 32)) / 28322000.0; + svga->clock = (cpuclock * (double)(1ull << 32)) / 28322000.0; break; case 0x0c: - svga->clock = (cpuclock * (double) (1ull << 32)) / 44900000.0; + svga->clock = (cpuclock * (double)(1ull << 32)) / 44900000.0; break; } } else { @@ -215,11 +215,11 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) break; case 0x30: - xga->hwc_pos_x = (xga->hwc_pos_x & 0x0700) | val; + xga->hwc_pos_x = (xga->hwc_pos_x & 0x0700) | val; xga->hwcursor.x = xga->hwc_pos_x; break; case 0x31: - xga->hwc_pos_x = (xga->hwc_pos_x & 0xff) | ((val & 0x07) << 8); + xga->hwc_pos_x = (xga->hwc_pos_x & 0xff) | ((val & 0x07) << 8); xga->hwcursor.x = xga->hwc_pos_x; break; @@ -229,11 +229,11 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) break; case 0x33: - xga->hwc_pos_y = (xga->hwc_pos_y & 0x0700) | val; + xga->hwc_pos_y = (xga->hwc_pos_y & 0x0700) | val; xga->hwcursor.y = xga->hwc_pos_y; break; case 0x34: - xga->hwc_pos_y = (xga->hwc_pos_y & 0xff) | ((val & 0x07) << 8); + xga->hwc_pos_y = (xga->hwc_pos_y & 0xff) | ((val & 0x07) << 8); xga->hwcursor.y = xga->hwc_pos_y; break; @@ -243,7 +243,7 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) break; case 0x36: - xga->hwc_control = val; + xga->hwc_control = val; xga->hwcursor.ena = xga->hwc_control & 1; break; @@ -306,12 +306,12 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) case 0x60: xga->sprite_pal_addr_idx = (xga->sprite_pal_addr_idx & 0x3f00) | val; - svga->dac_pos = 0; - svga->dac_addr = val & 0xff; + svga->dac_pos = 0; + svga->dac_addr = val & 0xff; break; case 0x61: xga->sprite_pal_addr_idx = (xga->sprite_pal_addr_idx & 0xff) | ((val & 0x3f) << 8); - xga->sprite_pos = xga->sprite_pal_addr_idx & 0x1ff; + xga->sprite_pos = xga->sprite_pal_addr_idx & 0x1ff; if ((xga->sprite_pos >= 0) && (xga->sprite_pos <= 16)) { if ((xga->op_mode & 7) >= 5) xga->cursor_data_on = 1; @@ -333,17 +333,17 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) xga->cursor_data_on = 0; } } - // pclog("Sprite POS = %d, data on = %d, idx = %d, apcntl = %d\n", xga->sprite_pos, xga->cursor_data_on, xga->sprite_pal_addr_idx, xga->aperture_cntl); + //pclog("Sprite POS = %d, data on = %d, idx = %d, apcntl = %d\n", xga->sprite_pos, xga->cursor_data_on, xga->sprite_pal_addr_idx, xga->aperture_cntl); break; case 0x62: xga->sprite_pal_addr_idx_prefetch = (xga->sprite_pal_addr_idx_prefetch & 0x3f00) | val; - svga->dac_pos = 0; - svga->dac_addr = val & 0xff; + svga->dac_pos = 0; + svga->dac_addr = val & 0xff; break; case 0x63: xga->sprite_pal_addr_idx_prefetch = (xga->sprite_pal_addr_idx_prefetch & 0xff) | ((val & 0x3f) << 8); - xga->sprite_pos_prefetch = xga->sprite_pal_addr_idx_prefetch & 0x1ff; + xga->sprite_pos_prefetch = xga->sprite_pal_addr_idx_prefetch & 0x1ff; break; case 0x64: @@ -362,14 +362,14 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) svga->dac_pos++; break; case 2: - xga->pal_b = val; - index = svga->dac_addr & 0xff; + xga->pal_b = val; + index = svga->dac_addr & 0xff; svga->vgapal[index].r = svga->dac_r; svga->vgapal[index].g = svga->dac_g; svga->vgapal[index].b = xga->pal_b; - svga->pallook[index] = makecol32(svga->vgapal[index].r, svga->vgapal[index].g, svga->vgapal[index].b); - svga->dac_pos = 0; - svga->dac_addr = (svga->dac_addr + 1) & 0xff; + svga->pallook[index] = makecol32(svga->vgapal[index].r, svga->vgapal[index].g, svga->vgapal[index].b); + svga->dac_pos = 0; + svga->dac_addr = (svga->dac_addr + 1) & 0xff; break; } break; @@ -390,7 +390,7 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) case 0x6a: xga->sprite_data[xga->sprite_pos] = val; - xga->sprite_pos = (xga->sprite_pos + 1) & 0x3ff; + xga->sprite_pos = (xga->sprite_pos + 1) & 0x3ff; break; case 0x70: @@ -403,10 +403,10 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) static void xga_ext_outb(uint16_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; - // pclog("[%04X:%08X]: EXT OUTB = %02x, val = %02x\n", CS, cpu_state.pc, addr, val); + //pclog("[%04X:%08X]: EXT OUTB = %02x, val = %02x\n", CS, cpu_state.pc, addr, val); switch (addr & 0x0f) { case 0: xga->op_mode = val; @@ -421,17 +421,17 @@ xga_ext_outb(uint16_t addr, uint8_t val, void *p) xga->aperture_cntl = 0; break; case 6: - vga_on = 0; + vga_on = 0; xga->on = 1; break; case 8: xga->ap_idx = val; - // pclog("Aperture CNTL = %d, val = %02x, up to bit6 = %02x\n", xga->aperture_cntl, val, val & 0x3f); + //pclog("Aperture CNTL = %d, val = %02x, up to bit6 = %02x\n", xga->aperture_cntl, val, val & 0x3f); if ((xga->op_mode & 7) < 4) { xga->write_bank = xga->read_bank = 0; } else { xga->write_bank = (xga->ap_idx & 0x3f) << 16; - xga->read_bank = xga->write_bank; + xga->read_bank = xga->write_bank; } break; case 9: @@ -454,8 +454,8 @@ xga_ext_outb(uint16_t addr, uint8_t val, void *p) static uint8_t xga_ext_inb(uint16_t addr, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; uint8_t ret, index; switch (addr & 0x0f) { @@ -629,9 +629,9 @@ xga_ext_inb(uint16_t addr, void *p) ret = svga->vgapal[index].g; break; case 2: - svga->dac_pos = 0; + svga->dac_pos = 0; svga->dac_addr = (svga->dac_addr + 1) & 0xff; - ret = svga->vgapal[index].b; + ret = svga->vgapal[index].b; break; } break; @@ -651,8 +651,8 @@ xga_ext_inb(uint16_t addr, void *p) break; case 0x6a: - // pclog("Sprite POS Read = %d, addr idx = %04x\n", xga->sprite_pos, xga->sprite_pal_addr_idx_prefetch); - ret = xga->sprite_data[xga->sprite_pos_prefetch]; + //pclog("Sprite POS Read = %d, addr idx = %04x\n", xga->sprite_pos, xga->sprite_pal_addr_idx_prefetch); + ret = xga->sprite_data[xga->sprite_pos_prefetch]; xga->sprite_pos_prefetch = (xga->sprite_pos_prefetch + 1) & 0x3ff; break; @@ -667,114 +667,70 @@ xga_ext_inb(uint16_t addr, void *p) break; } - // pclog("[%04X:%08X]: EXT INB = %02x, ret = %02x\n", CS, cpu_state.pc, addr, ret); + //pclog("[%04X:%08X]: EXT INB = %02x, ret = %02x\n", CS, cpu_state.pc, addr, ret); return ret; } + #define READ(addr, dat) \ dat = xga->vram[(addr) & (xga->vram_mask)]; -#define WRITE(addr, dat) \ - xga->vram[((addr)) & (xga->vram_mask)] = dat; \ +#define WRITE(addr, dat) \ + xga->vram[((addr)) & (xga->vram_mask)] = dat; \ xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = changeframecount; #define READW(addr, dat) \ - dat = *(uint16_t *) &xga->vram[(addr) & (xga->vram_mask)]; + dat = *(uint16_t *)&xga->vram[(addr) & (xga->vram_mask)]; -#define READW_REVERSE(addr, dat) \ +#define READW_REVERSE(addr, dat) \ dat = xga->vram[(addr + 1) & (xga->vram_mask - 1)] & 0xff; \ dat |= (xga->vram[(addr) & (xga->vram_mask - 1)] << 8); -#define WRITEW(addr, dat) \ - *(uint16_t *) &xga->vram[((addr)) & (xga->vram_mask)] = dat; \ +#define WRITEW(addr, dat) \ + *(uint16_t *)&xga->vram[((addr)) & (xga->vram_mask)] = dat; \ xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = changeframecount; -#define WRITEW_REVERSE(addr, dat) \ - xga->vram[((addr + 1)) & (xga->vram_mask - 1)] = dat & 0xff; \ - xga->vram[((addr)) & (xga->vram_mask - 1)] = dat >> 8; \ +#define WRITEW_REVERSE(addr, dat) \ + xga->vram[((addr + 1)) & (xga->vram_mask - 1)] = dat & 0xff; \ + xga->vram[((addr)) & (xga->vram_mask - 1)] = dat >> 8; \ xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = changeframecount; -#define ROP(mix, d, s) \ - { \ - switch ((mix) ? (xga->accel.frgd_mix & 0x1f) : (xga->accel.bkgd_mix & 0x1f)) { \ - case 0x00: \ - d = 0; \ - break; \ - case 0x01: \ - d = s & d; \ - break; \ - case 0x02: \ - d = s & ~d; \ - break; \ - case 0x03: \ - d = s; \ - break; \ - case 0x04: \ - d = ~s & d; \ - break; \ - case 0x05: \ - d = d; \ - break; \ - case 0x06: \ - d = s ^ d; \ - break; \ - case 0x07: \ - d = s | d; \ - break; \ - case 0x08: \ - d = ~s & ~d; \ - break; \ - case 0x09: \ - d = s ^ ~d; \ - break; \ - case 0x0a: \ - d = ~d; \ - break; \ - case 0x0b: \ - d = s | ~d; \ - break; \ - case 0x0c: \ - d = ~s; \ - break; \ - case 0x0d: \ - d = ~s | d; \ - break; \ - case 0x0e: \ - d = ~s | ~d; \ - break; \ - case 0x0f: \ - d = ~0; \ - break; \ - case 0x10: \ - d = MAX(s, d); \ - break; \ - case 0x11: \ - d = MIN(s, d); \ - break; \ - case 0x12: \ - d = MIN(0xff, s + d); \ - break; \ - case 0x13: \ - d = MAX(0, d - s); \ - break; \ - case 0x14: \ - d = MAX(0, s - d); \ - break; \ - case 0x15: \ - d = (s + d) >> 1; \ - break; \ - } \ - } +#define ROP(mix, d, s) { \ + switch ((mix) ? (xga->accel.frgd_mix & 0x1f) : (xga->accel.bkgd_mix & 0x1f)) { \ + case 0x00: d = 0; break; \ + case 0x01: d = s & d; break; \ + case 0x02: d = s & ~d; break; \ + case 0x03: d = s; break; \ + case 0x04: d = ~s & d; break; \ + case 0x05: d = d; break; \ + case 0x06: d = s ^ d; break; \ + case 0x07: d = s | d; break; \ + case 0x08: d = ~s & ~d; break; \ + case 0x09: d = s ^ ~d; break; \ + case 0x0a: d = ~d; break; \ + case 0x0b: d = s | ~d; break; \ + case 0x0c: d = ~s; break; \ + case 0x0d: d = ~s | d; break; \ + case 0x0e: d = ~s | ~d; break; \ + case 0x0f: d = ~0; break; \ + case 0x10: d = MAX(s, d); break; \ + case 0x11: d = MIN(s, d); break; \ + case 0x12: d = MIN(0xff, s + d); break; \ + case 0x13: d = MAX(0, d - s); break; \ + case 0x14: d = MAX(0, s - d); break; \ + case 0x15: d = (s + d) >> 1; break; \ + } \ + } static uint32_t xga_accel_read_pattern_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int width) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t addr = base; - int bits; + int bits; uint32_t byte; - uint8_t px; - int skip = 0; + uint8_t px; + int skip = 0; if (xga->base_addr_1mb) { if (addr < xga->base_addr_1mb || (addr > (xga->base_addr_1mb + 0xfffff))) @@ -803,15 +759,16 @@ xga_accel_read_pattern_map_pixel(svga_t *svga, int x, int y, int map, uint32_t b return px; } + static uint32_t xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int width) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t addr = base; - int bits; + int bits; uint32_t byte; - uint8_t px; - int skip = 0; + uint8_t px; + int skip = 0; if (xga->base_addr_1mb) { if (addr < xga->base_addr_1mb || (addr > (xga->base_addr_1mb + 0xfffff))) @@ -874,10 +831,10 @@ xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int static void xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, uint32_t pixel, int width) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t addr = base; - uint8_t byte, mask; - int skip = 0; + uint8_t byte, mask; + int skip = 0; if (xga->base_addr_1mb) { if (addr < xga->base_addr_1mb || (addr > (xga->base_addr_1mb + 0xfffff))) @@ -891,11 +848,11 @@ xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, ui case 0: /*1-bit*/ addr += (y * (width) >> 3); addr += (x >> 3); - if (!skip) { + if (!skip) { READ(addr, byte); - } else { + } else { byte = mem_readb_phys(addr); - } + } if ((xga->accel.px_map_format[map] & 8) && !(xga->access_mode & 8)) { if (xga->linear_endian_reverse) mask = 1 << (7 - (x & 7)); @@ -948,15 +905,15 @@ xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, ui static void xga_short_stroke(svga_t *svga, uint8_t ssv) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t src_dat, dest_dat, old_dest_dat; - uint32_t color_cmp = xga->accel.color_cmp; + uint32_t color_cmp = xga->accel.color_cmp; uint32_t plane_mask = xga->accel.plane_mask; - uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; - uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; - int y = ssv & 0x0f; - int x = 0; - int dx, dy, dirx = 0, diry = 0; + uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; + uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; + int y = ssv & 0x0f; + int x = 0; + int dx, dy, dirx = 0, diry = 0; dx = xga->accel.dst_map_x & 0x1fff; if (xga->accel.dst_map_x & 0x1800) @@ -1004,11 +961,18 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) if (xga->accel.pat_src == 8) { while (y >= 0) { if (xga->accel.command & 0xc0) { - if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && + (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || + ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || + ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || + ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || + ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || + ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || + ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1025,10 +989,16 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) } } } else { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || + ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || + ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || + ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || + ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || + ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || + ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1061,40 +1031,37 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) xga->accel.dst_map_y = dy; } -#define SWAP(a, b) \ - tmpswap = a; \ - a = b; \ - b = tmpswap; +#define SWAP(a,b) tmpswap = a; a = b; b = tmpswap; static void xga_line_draw_write(svga_t *svga) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t src_dat, dest_dat, old_dest_dat; - uint32_t color_cmp = xga->accel.color_cmp; + uint32_t color_cmp = xga->accel.color_cmp; uint32_t plane_mask = xga->accel.plane_mask; - uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; - uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; - int dminor, destxtmp, dmajor, err, tmpswap; - int steep = 1; - int xdir, ydir; - int y = xga->accel.blt_width; - int x = 0; - int dx, dy; + uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; + uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; + int dminor, destxtmp, dmajor, err, tmpswap; + int steep = 1; + int xdir, ydir; + int y = xga->accel.blt_width; + int x = 0; + int dx, dy; - dminor = ((int16_t) xga->accel.bres_k1); - if (xga->accel.bres_k1 & 0x2000) + dminor = ((int16_t)xga->accel.bres_k1); + if (xga->accel.bres_k1 & 0x2000) dminor |= ~0x1fff; - dminor >>= 1; + dminor >>= 1; - destxtmp = ((int16_t) xga->accel.bres_k2); - if (xga->accel.bres_k2 & 0x2000) + destxtmp = ((int16_t)xga->accel.bres_k2); + if (xga->accel.bres_k2 & 0x2000) destxtmp |= ~0x1fff; dmajor = -(destxtmp - (dminor << 1)) >> 1; - err = ((int16_t) xga->accel.bres_err_term); - if (xga->accel.bres_err_term & 0x2000) + err = ((int16_t)xga->accel.bres_err_term); + if (xga->accel.bres_err_term & 0x2000) destxtmp |= ~0x1fff; if (xga->accel.octant & 0x02) { @@ -1118,20 +1085,27 @@ xga_line_draw_write(svga_t *svga) dy |= ~0x17ff; if (xga->accel.octant & 0x01) { - steep = 0; - SWAP(dx, dy); - SWAP(xdir, ydir); + steep = 0; + SWAP(dx, dy); + SWAP(xdir, ydir); } if (xga->accel.pat_src == 8) { while (y >= 0) { if (xga->accel.command & 0xc0) { if (steep) { - if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && + (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || + ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || + ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || + ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || + ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || + ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || + ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1144,11 +1118,18 @@ xga_line_draw_write(svga_t *svga) } } } else { - if ((dy >= xga->accel.mask_map_origin_x_off) && (dy <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dx >= xga->accel.mask_map_origin_y_off) && (dx <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + if ((dy >= xga->accel.mask_map_origin_x_off) && (dy <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && + (dx >= xga->accel.mask_map_origin_y_off) && (dx <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || + ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || + ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || + ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || + ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || + ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || + ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1163,10 +1144,16 @@ xga_line_draw_write(svga_t *svga) } } else { if (steep) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || + ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || + ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || + ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || + ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || + ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || + ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1178,10 +1165,16 @@ xga_line_draw_write(svga_t *svga) xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); } } else { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || + ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || + ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || + ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || + ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || + ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || + ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1221,6 +1214,7 @@ xga_line_draw_write(svga_t *svga) } } + static int16_t xga_dst_wrap(int16_t addr) { @@ -1231,20 +1225,20 @@ xga_dst_wrap(int16_t addr) static void xga_bitblt(svga_t *svga) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t src_dat, dest_dat, old_dest_dat; - uint32_t color_cmp = xga->accel.color_cmp; + uint32_t color_cmp = xga->accel.color_cmp; uint32_t plane_mask = xga->accel.plane_mask; - uint32_t patbase = xga->accel.px_map_base[xga->accel.pat_src]; - uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; - uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; - uint32_t patwidth = xga->accel.px_map_width[xga->accel.pat_src]; - uint32_t dstwidth = xga->accel.px_map_width[xga->accel.dst_map]; - uint32_t srcwidth = xga->accel.px_map_width[xga->accel.src_map]; - uint32_t patheight = xga->accel.px_map_height[xga->accel.pat_src]; - uint32_t srcheight = xga->accel.px_map_height[xga->accel.src_map]; - int mix = 0; - int xdir, ydir; + uint32_t patbase = xga->accel.px_map_base[xga->accel.pat_src]; + uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; + uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; + uint32_t patwidth = xga->accel.px_map_width[xga->accel.pat_src]; + uint32_t dstwidth = xga->accel.px_map_width[xga->accel.dst_map]; + uint32_t srcwidth = xga->accel.px_map_width[xga->accel.src_map]; + uint32_t patheight = xga->accel.px_map_height[xga->accel.pat_src]; + uint32_t srcheight = xga->accel.px_map_height[xga->accel.src_map]; + int mix = 0; + int xdir, ydir; if (xga->accel.octant & 0x02) { ydir = -1; @@ -1283,15 +1277,22 @@ xga_bitblt(svga_t *svga) } } - // pclog("Pattern Map = 8: CMD = %08x: SRCBase = %08x, DSTBase = %08x, from/to vram dir = %d, cmd dir = %06x\n", xga->accel.command, srcbase, dstbase, xga->from_to_vram, xga->accel.dir_cmd); - // pclog("CMD = %08x: Y = %d, X = %d, patsrc = %02x, srcmap = %d, dstmap = %d, py = %d, sy = %d, dy = %d, width0 = %d, width1 = %d, width2 = %d, width3 = %d\n", xga->accel.command, xga->accel.y, xga->accel.x, xga->accel.pat_src, xga->accel.src_map, xga->accel.dst_map, xga->accel.py, xga->accel.sy, xga->accel.dy, xga->accel.px_map_width[0], xga->accel.px_map_width[1], xga->accel.px_map_width[2], xga->accel.px_map_width[3]); + //pclog("Pattern Map = 8: CMD = %08x: SRCBase = %08x, DSTBase = %08x, from/to vram dir = %d, cmd dir = %06x\n", xga->accel.command, srcbase, dstbase, xga->from_to_vram, xga->accel.dir_cmd); + //pclog("CMD = %08x: Y = %d, X = %d, patsrc = %02x, srcmap = %d, dstmap = %d, py = %d, sy = %d, dy = %d, width0 = %d, width1 = %d, width2 = %d, width3 = %d\n", xga->accel.command, xga->accel.y, xga->accel.x, xga->accel.pat_src, xga->accel.src_map, xga->accel.dst_map, xga->accel.py, xga->accel.sy, xga->accel.dy, xga->accel.px_map_width[0], xga->accel.px_map_width[1], xga->accel.px_map_width[2], xga->accel.px_map_width[3]); while (xga->accel.y >= 0) { if (xga->accel.command & 0xc0) { - if ((xga->accel.dx >= xga->accel.mask_map_origin_x_off) && (xga->accel.dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (xga->accel.dy >= xga->accel.mask_map_origin_y_off) && (xga->accel.dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; + if ((xga->accel.dx >= xga->accel.mask_map_origin_x_off) && (xga->accel.dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && + (xga->accel.dy >= xga->accel.mask_map_origin_y_off) && (xga->accel.dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); - if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || + ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || + ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || + ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || + ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || + ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || + ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1299,10 +1300,16 @@ xga_bitblt(svga_t *svga) } } } else { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); - if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || + ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || + ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || + ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || + ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || + ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || + ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1361,13 +1368,14 @@ xga_bitblt(svga_t *svga) } } - // pclog("Pattern Map = %d: CMD = %08x: PATBase = %08x, SRCBase = %08x, DSTBase = %08x\n", xga->accel.pat_src, xga->accel.command, patbase, srcbase, dstbase); - // pclog("CMD = %08x: Y = %d, X = %d, patsrc = %02x, srcmap = %d, dstmap = %d, py = %d, sy = %d, dy = %d, width0 = %d, width1 = %d, width2 = %d, width3 = %d\n", xga->accel.command, xga->accel.y, xga->accel.x, xga->accel.pat_src, xga->accel.src_map, xga->accel.dst_map, xga->accel.py, xga->accel.sy, xga->accel.dy, xga->accel.px_map_width[0], xga->accel.px_map_width[1], xga->accel.px_map_width[2], xga->accel.px_map_width[3]); + //pclog("Pattern Map = %d: CMD = %08x: PATBase = %08x, SRCBase = %08x, DSTBase = %08x\n", xga->accel.pat_src, xga->accel.command, patbase, srcbase, dstbase); + //pclog("CMD = %08x: Y = %d, X = %d, patsrc = %02x, srcmap = %d, dstmap = %d, py = %d, sy = %d, dy = %d, width0 = %d, width1 = %d, width2 = %d, width3 = %d\n", xga->accel.command, xga->accel.y, xga->accel.x, xga->accel.pat_src, xga->accel.src_map, xga->accel.dst_map, xga->accel.py, xga->accel.sy, xga->accel.dy, xga->accel.px_map_width[0], xga->accel.px_map_width[1], xga->accel.px_map_width[2], xga->accel.px_map_width[3]); while (xga->accel.y >= 0) { mix = xga_accel_read_pattern_map_pixel(svga, xga->accel.px, xga->accel.py, xga->accel.pat_src, patbase, patwidth + 1); if (xga->accel.command & 0xc0) { - if ((xga->accel.dx >= xga->accel.mask_map_origin_x_off) && (xga->accel.dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (xga->accel.dy >= xga->accel.mask_map_origin_y_off) && (xga->accel.dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { + if ((xga->accel.dx >= xga->accel.mask_map_origin_x_off) && (xga->accel.dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && + (xga->accel.dy >= xga->accel.mask_map_origin_y_off) && (xga->accel.dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { if (mix) src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; else @@ -1375,7 +1383,13 @@ xga_bitblt(svga_t *svga) dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); - if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || + ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || + ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || + ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || + ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || + ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || + ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(mix, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1390,7 +1404,13 @@ xga_bitblt(svga_t *svga) dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); - if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || + ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || + ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || + ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || + ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || + ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || + ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(mix, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1398,6 +1418,7 @@ xga_bitblt(svga_t *svga) } } + xga->accel.sx += xdir; if (xga->accel.pattern) xga->accel.px = ((xga->accel.px + xdir) & patwidth) | (xga->accel.px & ~patwidth); @@ -1466,7 +1487,7 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) case 0x18: if (len == 4) { - xga->accel.px_map_width[xga->accel.px_map_idx] = val & 0xffff; + xga->accel.px_map_width[xga->accel.px_map_idx] = val & 0xffff; xga->accel.px_map_height[xga->accel.px_map_idx] = (val >> 16) & 0xffff; } else if (len == 2) { xga->accel.px_map_width[xga->accel.px_map_idx] = val & 0xffff; @@ -1543,13 +1564,13 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) case 0x2c: if (len == 4) { - xga->accel.short_stroke = val; + xga->accel.short_stroke = val; xga->accel.short_stroke_vector1 = xga->accel.short_stroke & 0xff; xga->accel.short_stroke_vector2 = (xga->accel.short_stroke >> 8) & 0xff; xga->accel.short_stroke_vector3 = (xga->accel.short_stroke >> 16) & 0xff; xga->accel.short_stroke_vector4 = (xga->accel.short_stroke >> 24) & 0xff; - // pclog("1Vector = %02x, 2Vector = %02x, 3Vector = %02x, 4Vector = %02x\n", xga->accel.short_stroke_vector1, xga->accel.short_stroke_vector2, xga->accel.short_stroke_vector3, xga->accel.short_stroke_vector4); + //pclog("1Vector = %02x, 2Vector = %02x, 3Vector = %02x, 4Vector = %02x\n", xga->accel.short_stroke_vector1, xga->accel.short_stroke_vector2, xga->accel.short_stroke_vector3, xga->accel.short_stroke_vector4); xga_short_stroke(svga, xga->accel.short_stroke_vector1); xga_short_stroke(svga, xga->accel.short_stroke_vector2); xga_short_stroke(svga, xga->accel.short_stroke_vector3); @@ -1579,7 +1600,7 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) xga->accel.frgd_mix = val & 0xff; if (len == 4) { xga->accel.bkgd_mix = (val >> 8) & 0xff; - xga->accel.cc_cond = (val >> 16) & 0x07; + xga->accel.cc_cond = (val >> 16) & 0x07; } else if (len == 2) { xga->accel.bkgd_mix = (val >> 8) & 0xff; } @@ -1687,7 +1708,7 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) case 0x60: if (len == 4) { - xga->accel.blt_width = val & 0xffff; + xga->accel.blt_width = val & 0xffff; xga->accel.blt_height = (val >> 16) & 0xffff; } else if (len == 2) { xga->accel.blt_width = val; @@ -1814,30 +1835,30 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) if (len == 4) { xga->accel.command = val; exec_command: - xga->accel.octant = xga->accel.command & 0x07; + xga->accel.octant = xga->accel.command & 0x07; xga->accel.draw_mode = xga->accel.command & 0x30; xga->accel.mask_mode = xga->accel.command & 0xc0; - xga->accel.pat_src = ((xga->accel.command >> 12) & 0x0f); - xga->accel.dst_map = ((xga->accel.command >> 16) & 0x0f); - xga->accel.src_map = ((xga->accel.command >> 20) & 0x0f); + xga->accel.pat_src = ((xga->accel.command >> 12) & 0x0f); + xga->accel.dst_map = ((xga->accel.command >> 16) & 0x0f); + xga->accel.src_map = ((xga->accel.command >> 20) & 0x0f); - // if (xga->accel.pat_src) { - // pclog("[%04X:%08X]: Accel Command = %02x, full = %08x, patwidth = %d, dstwidth = %d, srcwidth = %d, patheight = %d, dstheight = %d, srcheight = %d, px = %d, py = %d, dx = %d, dy = %d, sx = %d, sy = %d, patsrc = %d, dstmap = %d, srcmap = %d, dstbase = %08x, srcbase = %08x, patbase = %08x, dstformat = %x, srcformat = %x, planemask = %08x\n", - // CS, cpu_state.pc, ((xga->accel.command >> 24) & 0x0f), xga->accel.command, xga->accel.px_map_width[xga->accel.pat_src], - // xga->accel.px_map_width[xga->accel.dst_map], xga->accel.px_map_width[xga->accel.src_map], - // xga->accel.px_map_height[xga->accel.pat_src], xga->accel.px_map_height[xga->accel.dst_map], - // xga->accel.px_map_height[xga->accel.src_map], - // xga->accel.pat_map_x, xga->accel.pat_map_y, - // xga->accel.dst_map_x, xga->accel.dst_map_y, - // xga->accel.src_map_x, xga->accel.src_map_y, - // xga->accel.pat_src, xga->accel.dst_map, xga->accel.src_map, - // xga->accel.px_map_base[xga->accel.dst_map], xga->accel.px_map_base[xga->accel.src_map], xga->accel.px_map_base[xga->accel.pat_src], - // xga->accel.px_map_format[xga->accel.dst_map] & 0x0f, xga->accel.px_map_format[xga->accel.src_map] & 0x0f, xga->accel.plane_mask); - // //pclog("\n"); - // } + //if (xga->accel.pat_src) { + // pclog("[%04X:%08X]: Accel Command = %02x, full = %08x, patwidth = %d, dstwidth = %d, srcwidth = %d, patheight = %d, dstheight = %d, srcheight = %d, px = %d, py = %d, dx = %d, dy = %d, sx = %d, sy = %d, patsrc = %d, dstmap = %d, srcmap = %d, dstbase = %08x, srcbase = %08x, patbase = %08x, dstformat = %x, srcformat = %x, planemask = %08x\n", + // CS, cpu_state.pc, ((xga->accel.command >> 24) & 0x0f), xga->accel.command, xga->accel.px_map_width[xga->accel.pat_src], + // xga->accel.px_map_width[xga->accel.dst_map], xga->accel.px_map_width[xga->accel.src_map], + // xga->accel.px_map_height[xga->accel.pat_src], xga->accel.px_map_height[xga->accel.dst_map], + // xga->accel.px_map_height[xga->accel.src_map], + // xga->accel.pat_map_x, xga->accel.pat_map_y, + // xga->accel.dst_map_x, xga->accel.dst_map_y, + // xga->accel.src_map_x, xga->accel.src_map_y, + // xga->accel.pat_src, xga->accel.dst_map, xga->accel.src_map, + // xga->accel.px_map_base[xga->accel.dst_map], xga->accel.px_map_base[xga->accel.src_map], xga->accel.px_map_base[xga->accel.pat_src], + // xga->accel.px_map_format[xga->accel.dst_map] & 0x0f, xga->accel.px_map_format[xga->accel.src_map] & 0x0f, xga->accel.plane_mask); + // //pclog("\n"); + //} switch ((xga->accel.command >> 24) & 0x0f) { case 3: /*Bresenham Line Draw Read*/ - // pclog("Line Draw Read\n"); + //pclog("Line Draw Read\n"); break; case 4: /*Short Stroke Vectors*/ break; @@ -1848,7 +1869,7 @@ exec_command: xga_bitblt(svga); break; case 9: /*Inverting BitBLT*/ - // pclog("Inverting BitBLT\n"); + //pclog("Inverting BitBLT\n"); break; } } else if (len == 2) { @@ -1880,31 +1901,31 @@ exec_command: static void xga_memio_writeb(uint32_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; xga_mem_write(addr, val, xga, svga, 1); - // pclog("Write MEMIOB = %04x, val = %02x\n", addr & 0x7f, val); + //pclog("Write MEMIOB = %04x, val = %02x\n", addr & 0x7f, val); } static void xga_memio_writew(uint32_t addr, uint16_t val, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; xga_mem_write(addr, val, xga, svga, 2); - // pclog("Write MEMIOW = %04x, val = %04x\n", addr & 0x7f, val); + //pclog("Write MEMIOW = %04x, val = %04x\n", addr & 0x7f, val); } static void xga_memio_writel(uint32_t addr, uint32_t val, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; xga_mem_write(addr, val, xga, svga, 4); - // pclog("Write MEMIOL = %04x, val = %08x\n", addr & 0x7f, val); + //pclog("Write MEMIOL = %04x, val = %08x\n", addr & 0x7f, val); } static uint8_t @@ -1981,35 +2002,35 @@ xga_mem_read(uint32_t addr, xga_t *xga, svga_t *svga) static uint8_t xga_memio_readb(uint32_t addr, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; uint8_t temp; temp = xga_mem_read(addr, xga, svga); - // pclog("[%04X:%08X]: Read MEMIOB = %04x, temp = %02x\n", CS, cpu_state.pc, addr, temp); + //pclog("[%04X:%08X]: Read MEMIOB = %04x, temp = %02x\n", CS, cpu_state.pc, addr, temp); return temp; } static uint16_t xga_memio_readw(uint32_t addr, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; uint16_t temp; temp = xga_mem_read(addr, xga, svga); temp |= (xga_mem_read(addr + 1, xga, svga) << 8); - // pclog("[%04X:%08X]: Read MEMIOW = %04x, temp = %04x\n", CS, cpu_state.pc, addr, temp); + //pclog("[%04X:%08X]: Read MEMIOW = %04x, temp = %04x\n", CS, cpu_state.pc, addr, temp); return temp; } static uint32_t xga_memio_readl(uint32_t addr, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; uint32_t temp; temp = xga_mem_read(addr, xga, svga); @@ -2017,59 +2038,59 @@ xga_memio_readl(uint32_t addr, void *p) temp |= (xga_mem_read(addr + 2, xga, svga) << 16); temp |= (xga_mem_read(addr + 3, xga, svga) << 24); - // pclog("Read MEMIOL = %04x, temp = %08x\n", addr, temp); + //pclog("Read MEMIOL = %04x, temp = %08x\n", addr, temp); return temp; } static void xga_hwcursor_draw(svga_t *svga, int displine) { - xga_t *xga = &svga->xga; - uint8_t dat = 0; - int offset = xga->hwcursor_latch.x - xga->hwcursor_latch.xoff; - int x, x_pos, y_pos; - int comb = 0; + xga_t *xga = &svga->xga; + uint8_t dat = 0; + int offset = xga->hwcursor_latch.x - xga->hwcursor_latch.xoff; + int x, x_pos, y_pos; + int comb = 0; uint32_t *p; - int idx = (xga->cursor_data_on) ? 32 : 0; + int idx = (xga->cursor_data_on) ? 32 : 0; if (xga->interlace && xga->hwcursor_oddeven) - xga->hwcursor_latch.addr += 16; + xga->hwcursor_latch.addr += 16; y_pos = displine; x_pos = offset + svga->x_add; - p = buffer32->line[y_pos]; + p = buffer32->line[y_pos]; for (x = 0; x < xga->hwcursor_latch.cur_xsize; x++) { - if (x >= idx) { - if (!(x & 0x03)) - dat = xga->sprite_data[xga->hwcursor_latch.addr & 0x3ff]; + if (x >= idx) { + if (!(x & 0x03)) + dat = xga->sprite_data[xga->hwcursor_latch.addr & 0x3ff]; - comb = (dat >> ((x & 0x03) << 1)) & 0x03; + comb = (dat >> ((x & 0x03) << 1)) & 0x03; - x_pos = offset + svga->x_add + x; + x_pos = offset + svga->x_add + x; - switch (comb) { - case 0x00: - /* Cursor Color 1 */ - p[x_pos] = xga->hwc_color0; - break; - case 0x01: - /* Cursor Color 2 */ - p[x_pos] = xga->hwc_color1; - break; - case 0x03: - /* Complement */ - p[x_pos] ^= 0xffffff; - break; - } + switch (comb) { + case 0x00: + /* Cursor Color 1 */ + p[x_pos] = xga->hwc_color0; + break; + case 0x01: + /* Cursor Color 2 */ + p[x_pos] = xga->hwc_color1; + break; + case 0x03: + /* Complement */ + p[x_pos] ^= 0xffffff; + break; } + } - if ((x & 0x03) == 0x03) - xga->hwcursor_latch.addr++; + if ((x & 0x03) == 0x03) + xga->hwcursor_latch.addr++; } if (xga->interlace && !xga->hwcursor_oddeven) - xga->hwcursor_latch.addr += 16; + xga->hwcursor_latch.addr += 16; } static void @@ -2078,13 +2099,13 @@ xga_render_overscan_left(xga_t *xga, svga_t *svga) int i; if ((xga->displine + svga->y_add) < 0) - return; + return; if (svga->scrblank || (xga->h_disp == 0)) - return; + return; for (i = 0; i < svga->x_add; i++) - buffer32->line[xga->displine + svga->y_add][i] = svga->overscan_color; + buffer32->line[xga->displine + svga->y_add][i] = svga->overscan_color; } static void @@ -2093,62 +2114,62 @@ xga_render_overscan_right(xga_t *xga, svga_t *svga) int i, right; if ((xga->displine + svga->y_add) < 0) - return; + return; if (svga->scrblank || (xga->h_disp == 0)) - return; + return; right = (overscan_x >> 1); for (i = 0; i < right; i++) - buffer32->line[xga->displine + svga->y_add][svga->x_add + xga->h_disp + i] = svga->overscan_color; + buffer32->line[xga->displine + svga->y_add][svga->x_add + xga->h_disp + i] = svga->overscan_color; } static void xga_render_8bpp(xga_t *xga, svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; + uint32_t dat; if ((xga->displine + svga->y_add) < 0) - return; + return; if (xga->changedvram[xga->ma >> 12] || xga->changedvram[(xga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[xga->displine + svga->y_add][svga->x_add]; + p = &buffer32->line[xga->displine + svga->y_add][svga->x_add]; - if (xga->firstline_draw == 2000) - xga->firstline_draw = xga->displine; - xga->lastline_draw = xga->displine; + if (xga->firstline_draw == 2000) + xga->firstline_draw = xga->displine; + xga->lastline_draw = xga->displine; - for (x = 0; x <= xga->h_disp; x += 8) { - dat = *(uint32_t *) (&xga->vram[xga->ma & xga->vram_mask]); - p[0] = svga->pallook[dat & 0xff]; - p[1] = svga->pallook[(dat >> 8) & 0xff]; - p[2] = svga->pallook[(dat >> 16) & 0xff]; - p[3] = svga->pallook[(dat >> 24) & 0xff]; + for (x = 0; x <= xga->h_disp; x += 8) { + dat = *(uint32_t *)(&xga->vram[xga->ma & xga->vram_mask]); + p[0] = svga->pallook[dat & 0xff]; + p[1] = svga->pallook[(dat >> 8) & 0xff]; + p[2] = svga->pallook[(dat >> 16) & 0xff]; + p[3] = svga->pallook[(dat >> 24) & 0xff]; - dat = *(uint32_t *) (&xga->vram[(xga->ma + 4) & xga->vram_mask]); - p[4] = svga->pallook[dat & 0xff]; - p[5] = svga->pallook[(dat >> 8) & 0xff]; - p[6] = svga->pallook[(dat >> 16) & 0xff]; - p[7] = svga->pallook[(dat >> 24) & 0xff]; + dat = *(uint32_t *)(&xga->vram[(xga->ma + 4) & xga->vram_mask]); + p[4] = svga->pallook[dat & 0xff]; + p[5] = svga->pallook[(dat >> 8) & 0xff]; + p[6] = svga->pallook[(dat >> 16) & 0xff]; + p[7] = svga->pallook[(dat >> 24) & 0xff]; - xga->ma += 8; - p += 8; - } - xga->ma &= xga->vram_mask; + xga->ma += 8; + p += 8; + } + xga->ma &= xga->vram_mask; } } static void xga_render_16bpp(xga_t *xga, svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; + uint32_t dat; if ((xga->displine + svga->y_add) < 0) - return; + return; if (xga->changedvram[xga->ma >> 12] || xga->changedvram[(xga->ma >> 12) + 1] || svga->fullchange) { p = &buffer32->line[xga->displine + svga->y_add][svga->x_add]; @@ -2158,19 +2179,19 @@ xga_render_16bpp(xga_t *xga, svga_t *svga) xga->lastline_draw = xga->displine; for (x = 0; x <= (xga->h_disp); x += 8) { - dat = *(uint32_t *) (&xga->vram[(xga->ma + (x << 1)) & xga->vram_mask]); - p[x] = video_16to32[dat & 0xffff]; + dat = *(uint32_t *)(&xga->vram[(xga->ma + (x << 1)) & xga->vram_mask]); + p[x] = video_16to32[dat & 0xffff]; p[x + 1] = video_16to32[dat >> 16]; - dat = *(uint32_t *) (&xga->vram[(xga->ma + (x << 1) + 4) & xga->vram_mask]); + dat = *(uint32_t *)(&xga->vram[(xga->ma + (x << 1) + 4) & xga->vram_mask]); p[x + 2] = video_16to32[dat & 0xffff]; p[x + 3] = video_16to32[dat >> 16]; - dat = *(uint32_t *) (&xga->vram[(xga->ma + (x << 1) + 8) & xga->vram_mask]); + dat = *(uint32_t *)(&xga->vram[(xga->ma + (x << 1) + 8) & xga->vram_mask]); p[x + 4] = video_16to32[dat & 0xffff]; p[x + 5] = video_16to32[dat >> 16]; - dat = *(uint32_t *) (&xga->vram[(xga->ma + (x << 1) + 12) & xga->vram_mask]); + dat = *(uint32_t *)(&xga->vram[(xga->ma + (x << 1) + 12) & xga->vram_mask]); p[x + 6] = video_16to32[dat & 0xffff]; p[x + 7] = video_16to32[dat >> 16]; } @@ -2182,8 +2203,8 @@ xga_render_16bpp(xga_t *xga, svga_t *svga) static void xga_write(uint32_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; if (!xga->on) { svga_write(addr, val, svga); @@ -2199,20 +2220,20 @@ xga_write(uint32_t addr, uint8_t val, void *p) cycles -= video_timing_write_b; xga->changedvram[(addr & xga->vram_mask) >> 12] = changeframecount; - xga->vram[addr & xga->vram_mask] = val; + xga->vram[addr & xga->vram_mask] = val; } static void xga_writeb(uint32_t addr, uint8_t val, void *p) { - // pclog("[%04X:%08X]: WriteB\n", CS, cpu_state.pc); + //pclog("[%04X:%08X]: WriteB\n", CS, cpu_state.pc); xga_write(addr, val, p); } static void xga_writew(uint32_t addr, uint16_t val, void *p) { - // pclog("[%04X:%08X]: WriteW\n", CS, cpu_state.pc); + //pclog("[%04X:%08X]: WriteW\n", CS, cpu_state.pc); xga_write(addr, val, p); xga_write(addr + 1, val >> 8, p); } @@ -2220,7 +2241,7 @@ xga_writew(uint32_t addr, uint16_t val, void *p) static void xga_writel(uint32_t addr, uint32_t val, void *p) { - // pclog("[%04X:%08X]: WriteL\n", CS, cpu_state.pc); + //pclog("[%04X:%08X]: WriteL\n", CS, cpu_state.pc); xga_write(addr, val, p); xga_write(addr + 1, val >> 8, p); xga_write(addr + 2, val >> 16, p); @@ -2230,8 +2251,8 @@ xga_writel(uint32_t addr, uint32_t val, void *p) static void xga_write_linear(uint32_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; if (!xga->on) { svga_write_linear(addr, val, svga); @@ -2246,14 +2267,14 @@ xga_write_linear(uint32_t addr, uint8_t val, void *p) cycles -= video_timing_write_b; xga->changedvram[(addr & xga->vram_mask) >> 12] = changeframecount; - xga->vram[addr & xga->vram_mask] = val; + xga->vram[addr & xga->vram_mask] = val; } static void xga_writew_linear(uint32_t addr, uint16_t val, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; if (!xga->on) { svga_writew_linear(addr, val, svga); @@ -2288,8 +2309,8 @@ xga_writew_linear(uint32_t addr, uint16_t val, void *p) static void xga_writel_linear(uint32_t addr, uint32_t val, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; if (!xga->on) { svga_writel_linear(addr, val, svga); @@ -2305,8 +2326,8 @@ xga_writel_linear(uint32_t addr, uint32_t val, void *p) static uint8_t xga_read(uint32_t addr, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; if (!xga->on) return svga_read(addr, svga); @@ -2359,8 +2380,8 @@ xga_readl(uint32_t addr, void *p) static uint8_t xga_read_linear(uint32_t addr, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; if (!xga->on) return svga_read_linear(addr, svga); @@ -2378,8 +2399,8 @@ xga_read_linear(uint32_t addr, void *p) static uint16_t xga_readw_linear(uint32_t addr, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; uint16_t ret; if (!xga->on) @@ -2406,13 +2427,14 @@ xga_readw_linear(uint32_t addr, void *p) static uint32_t xga_readl_linear(uint32_t addr, void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; if (!xga->on) return svga_readl_linear(addr, svga); - return xga_read_linear(addr, p) | (xga_read_linear(addr + 1, p) << 8) | (xga_read_linear(addr + 2, p) << 16) | (xga_read_linear(addr + 3, p) << 24); + return xga_read_linear(addr, p) | (xga_read_linear(addr + 1, p) << 8) | + (xga_read_linear(addr + 2, p) << 16) | (xga_read_linear(addr + 3, p) << 24); } static void @@ -2429,16 +2451,16 @@ xga_do_render(svga_t *svga) break; } - svga->x_add = (overscan_x >> 1); - xga_render_overscan_left(xga, svga); - xga_render_overscan_right(xga, svga); - svga->x_add = (overscan_x >> 1); + svga->x_add = (overscan_x >> 1); + xga_render_overscan_left(xga, svga); + xga_render_overscan_right(xga, svga); + svga->x_add = (overscan_x >> 1); if (xga->hwcursor_on) { - xga_hwcursor_draw(svga, xga->displine + svga->y_add); - xga->hwcursor_on--; - if (xga->hwcursor_on && xga->interlace) - xga->hwcursor_on--; + xga_hwcursor_draw(svga, xga->displine + svga->y_add); + xga->hwcursor_on--; + if (xga->hwcursor_on && xga->interlace) + xga->hwcursor_on--; } } @@ -2446,158 +2468,160 @@ void xga_poll(xga_t *xga, svga_t *svga) { uint32_t x; - int wx, wy; + int wx, wy; if (!xga->linepos) { - if (xga->displine == xga->hwcursor_latch.y && xga->hwcursor_latch.ena) { - xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - (xga->cursor_data_on ? 32 : 0); - xga->hwcursor_oddeven = 0; + if (xga->displine == xga->hwcursor_latch.y && xga->hwcursor_latch.ena) { + xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - (xga->cursor_data_on ? 32 : 0); + xga->hwcursor_oddeven = 0; + } + + if (xga->displine == (xga->hwcursor_latch.y + 1) && xga->hwcursor_latch.ena && + xga->interlace) { + xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - (xga->cursor_data_on ? 33 : 1); + xga->hwcursor_oddeven = 1; + } + + timer_advance_u64(&svga->timer, svga->dispofftime); + xga->linepos = 1; + + if (xga->dispon) { + xga->h_disp_on = 1; + + xga->ma &= xga->vram_mask; + + if (xga->firstline == 2000) { + xga->firstline = xga->displine; + video_wait_for_buffer(); } - if (xga->displine == (xga->hwcursor_latch.y + 1) && xga->hwcursor_latch.ena && xga->interlace) { - xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - (xga->cursor_data_on ? 33 : 1); - xga->hwcursor_oddeven = 1; + if (xga->hwcursor_on) { + xga->changedvram[xga->ma >> 12] = xga->changedvram[(xga->ma >> 12) + 1] = + xga->interlace ? 3 : 2; } - timer_advance_u64(&svga->timer, svga->dispofftime); - xga->linepos = 1; + xga_do_render(svga); - if (xga->dispon) { - xga->h_disp_on = 1; - - xga->ma &= xga->vram_mask; - - if (xga->firstline == 2000) { - xga->firstline = xga->displine; - video_wait_for_buffer(); - } - - if (xga->hwcursor_on) { - xga->changedvram[xga->ma >> 12] = xga->changedvram[(xga->ma >> 12) + 1] = xga->interlace ? 3 : 2; - } - - xga_do_render(svga); - - if (xga->lastline < xga->displine) - xga->lastline = xga->displine; - } + if (xga->lastline < xga->displine) + xga->lastline = xga->displine; + } + xga->displine++; + if (xga->interlace) xga->displine++; - if (xga->interlace) - xga->displine++; - if (xga->displine > 1500) - xga->displine = 0; + if (xga->displine > 1500) + xga->displine = 0; } else { - timer_advance_u64(&svga->timer, svga->dispontime); - xga->h_disp_on = 0; - - xga->linepos = 0; - if (xga->dispon) { - if (xga->sc == xga->rowcount) { - xga->sc = 0; - - if ((xga->disp_cntl_2 & 7) == 4) { - xga->maback += (xga->rowoffset << 4); - if (xga->interlace) - xga->maback += (xga->rowoffset << 4); - } else { - xga->maback += (xga->rowoffset << 3); - if (xga->interlace) - xga->maback += (xga->rowoffset << 3); - } - xga->maback &= xga->vram_mask; - xga->ma = xga->maback; - } else { - xga->sc++; - xga->sc &= 0x1f; - xga->ma = xga->maback; - } - } - - xga->vc++; - xga->vc &= 2047; - - if (xga->vc == xga->split) { - if (xga->interlace && xga->oddeven) - xga->ma = xga->maback = (xga->rowoffset << 1); - else - xga->ma = xga->maback = 0; - xga->ma = (xga->ma << 2); - xga->maback = (xga->maback << 2); + timer_advance_u64(&svga->timer, svga->dispontime); + xga->h_disp_on = 0; + xga->linepos = 0; + if (xga->dispon) { + if (xga->sc == xga->rowcount) { xga->sc = 0; - } - if (xga->vc == xga->dispend) { - xga->dispon = 0; - for (x = 0; x < ((xga->vram_mask + 1) >> 12); x++) { - if (xga->changedvram[x]) - xga->changedvram[x]--; + if ((xga->disp_cntl_2 & 7) == 4) { + xga->maback += (xga->rowoffset << 4); + if (xga->interlace) + xga->maback += (xga->rowoffset << 4); + } else { + xga->maback += (xga->rowoffset << 3); + if (xga->interlace) + xga->maback += (xga->rowoffset << 3); } - if (svga->fullchange) - svga->fullchange--; + xga->maback &= xga->vram_mask; + xga->ma = xga->maback; + } else { + xga->sc++; + xga->sc &= 0x1f; + xga->ma = xga->maback; } - if (xga->vc == xga->v_syncstart) { - xga->dispon = 0; - x = xga->h_disp; + } - if (xga->interlace && !xga->oddeven) - xga->lastline++; - if (xga->interlace && xga->oddeven) - xga->firstline--; + xga->vc++; + xga->vc &= 2047; - wx = x; + if (xga->vc == xga->split) { + if (xga->interlace && xga->oddeven) + xga->ma = xga->maback = (xga->rowoffset << 1); + else + xga->ma = xga->maback = 0; + xga->ma = (xga->ma << 2); + xga->maback = (xga->maback << 2); - wy = xga->lastline - xga->firstline; - svga_doblit(wx, wy, svga); + xga->sc = 0; + } + if (xga->vc == xga->dispend) { + xga->dispon = 0; - xga->firstline = 2000; - xga->lastline = 0; - - xga->firstline_draw = 2000; - xga->lastline_draw = 0; - - xga->oddeven ^= 1; - - changeframecount = xga->interlace ? 3 : 2; - - if (xga->interlace && xga->oddeven) - xga->ma = xga->maback = xga->ma_latch + (xga->rowoffset << 1); - else - xga->ma = xga->maback = xga->ma_latch; - - xga->ma = (xga->ma << 2); - xga->maback = (xga->maback << 2); + for (x = 0; x < ((xga->vram_mask + 1) >> 12); x++) { + if (xga->changedvram[x]) + xga->changedvram[x]--; } - if (xga->vc == xga->v_total) { - xga->vc = 0; - xga->sc = 0; - xga->dispon = 1; - xga->displine = (xga->interlace && xga->oddeven) ? 1 : 0; + if (svga->fullchange) + svga->fullchange--; + } + if (xga->vc == xga->v_syncstart) { + xga->dispon = 0; + x = xga->h_disp; - svga->x_add = (overscan_x >> 1); + if (xga->interlace && !xga->oddeven) + xga->lastline++; + if (xga->interlace && xga->oddeven) + xga->firstline--; - xga->hwcursor_on = 0; - xga->hwcursor_latch = xga->hwcursor; - } + wx = x; + + wy = xga->lastline - xga->firstline; + svga_doblit(wx, wy, svga); + + xga->firstline = 2000; + xga->lastline = 0; + + xga->firstline_draw = 2000; + xga->lastline_draw = 0; + + xga->oddeven ^= 1; + + changeframecount = xga->interlace ? 3 : 2; + + if (xga->interlace && xga->oddeven) + xga->ma = xga->maback = xga->ma_latch + (xga->rowoffset << 1); + else + xga->ma = xga->maback = xga->ma_latch; + + xga->ma = (xga->ma << 2); + xga->maback = (xga->maback << 2); + } + if (xga->vc == xga->v_total) { + xga->vc = 0; + xga->sc = 0; + xga->dispon = 1; + xga->displine = (xga->interlace && xga->oddeven) ? 1 : 0; + + svga->x_add = (overscan_x >> 1); + + xga->hwcursor_on = 0; + xga->hwcursor_latch = xga->hwcursor; + } } } static uint8_t xga_mca_read(int port, void *priv) { - svga_t *svga = (svga_t *) priv; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)priv; + xga_t *xga = &svga->xga; - // pclog("[%04X:%08X]: POS Read Port = %x, val = %02x\n", CS, cpu_state.pc, port & 7, xga->pos_regs[port & 7]); + //pclog("[%04X:%08X]: POS Read Port = %x, val = %02x\n", CS, cpu_state.pc, port & 7, xga->pos_regs[port & 7]); return (xga->pos_regs[port & 7]); } static void xga_mca_write(int port, uint8_t val, void *priv) { - svga_t *svga = (svga_t *) priv; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)priv; + xga_t *xga = &svga->xga; /* MCA does not write registers below 0x0100. */ if (port < 0x0102) @@ -2607,22 +2631,23 @@ xga_mca_write(int port, uint8_t val, void *priv) mem_mapping_disable(&xga->bios_rom.mapping); mem_mapping_disable(&xga->memio_mapping); xga->on = 0; - vga_on = 1; + vga_on = 1; /* Save the MCA register value. */ xga->pos_regs[port & 7] = val; if (!(xga->pos_regs[4] & 1)) /*MCA 4MB addressing on systems with more than 16MB of memory*/ xga->pos_regs[4] |= 1; - // pclog("[%04X:%08X]: POS Write Port = %x, val = %02x, linear base = %08x, instance = %d, rom addr = %05x\n", CS, cpu_state.pc, port & 7, val, xga->linear_base, xga->instance, xga->rom_addr); + //pclog("[%04X:%08X]: POS Write Port = %x, val = %02x, linear base = %08x, instance = %d, rom addr = %05x\n", CS, cpu_state.pc, port & 7, val, xga->linear_base, xga->instance, xga->rom_addr); if (xga->pos_regs[2] & 1) { - xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; + xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; xga->base_addr_1mb = (xga->pos_regs[5] & 0x0f) << 20; - xga->linear_base = ((xga->pos_regs[4] & 0xfe) * 0x1000000) + (xga->instance << 22); - xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); + xga->linear_base = ((xga->pos_regs[4] & 0xfe) * 0x1000000) + (xga->instance << 22); + xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); io_sethandler(0x2100 + (xga->instance << 4), 0x0010, xga_ext_inb, NULL, NULL, xga_ext_outb, NULL, NULL, svga); - mem_mapping_set_addr(&xga->bios_rom.mapping, xga->rom_addr, 0x2000); + if ((port & 7) == 2) + mem_mapping_set_addr(&xga->bios_rom.mapping, xga->rom_addr, 0x2000); mem_mapping_set_addr(&xga->memio_mapping, xga->rom_addr + 0x1c00 + (xga->instance * 0x80), 0x80); } } @@ -2630,8 +2655,8 @@ xga_mca_write(int port, uint8_t val, void *priv) static uint8_t xga_mca_feedb(void *priv) { - svga_t *svga = (svga_t *) priv; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)priv; + xga_t *xga = &svga->xga; return xga->pos_regs[2] & 1; } @@ -2639,7 +2664,7 @@ xga_mca_feedb(void *priv) static void xga_mca_reset(void *p) { - svga_t *svga = (svga_t *) p; + svga_t *svga = (svga_t *)p; xga_mca_write(0x102, 0, svga); } @@ -2647,48 +2672,47 @@ xga_mca_reset(void *p) static uint8_t xga_pos_in(uint16_t addr, void *priv) { - svga_t *svga = (svga_t *) priv; + svga_t *svga = (svga_t *)priv; return (xga_mca_read(addr, svga)); } static void - * - xga_init(const device_t *info) +*xga_init(const device_t *info) { - svga_t *svga = svga_get_pri(); - xga_t *xga = &svga->xga; - FILE *f; + svga_t *svga = svga_get_pri(); + xga_t *xga = &svga->xga; + FILE *f; uint32_t temp; uint32_t initial_bios_addr = device_get_config_hex20("init_bios_addr"); - uint8_t *rom = NULL; + uint8_t *rom = NULL; xga->type = device_get_config_int("type"); - xga->bus = info->flags; + xga->bus = info->flags; - xga->vram_size = (1024 << 10); - xga->vram_mask = xga->vram_size - 1; - xga->vram = calloc(xga->vram_size, 1); - xga->changedvram = calloc(xga->vram_size >> 12, 1); - xga->on = 0; - xga->hwcursor.cur_xsize = 64; - xga->hwcursor.cur_ysize = 64; - xga->bios_rom.sz = 0x2000; + xga->vram_size = (1024 << 10); + xga->vram_mask = xga->vram_size - 1; + xga->vram = calloc(xga->vram_size, 1); + xga->changedvram = calloc(xga->vram_size >> 12, 1); + xga->on = 0; + xga->hwcursor.cur_xsize = 64; + xga->hwcursor.cur_ysize = 64; + xga->bios_rom.sz = 0x2000; xga->linear_endian_reverse = 0; - xga->a5_test = 0; + xga->a5_test = 0; f = rom_fopen(xga->type ? XGA2_BIOS_PATH : XGA_BIOS_PATH, "rb"); - (void) fseek(f, 0L, SEEK_END); + (void)fseek(f, 0L, SEEK_END); temp = ftell(f); - (void) fseek(f, 0L, SEEK_SET); + (void)fseek(f, 0L, SEEK_SET); rom = malloc(xga->bios_rom.sz); memset(rom, 0xff, xga->bios_rom.sz); - (void) !fread(rom, xga->bios_rom.sz, 1, f); + (void)fread(rom, xga->bios_rom.sz, 1, f); temp -= xga->bios_rom.sz; - (void) fclose(f); + (void)fclose(f); - xga->bios_rom.rom = rom; + xga->bios_rom.rom = rom; xga->bios_rom.mask = xga->bios_rom.sz - 1; if (f != NULL) { free(rom); @@ -2697,29 +2721,25 @@ static void xga->base_addr_1mb = 0; if (info->flags & DEVICE_MCA) { xga->linear_base = 0; - xga->instance = 0; - xga->rom_addr = 0; - mem_mapping_add(&xga->bios_rom.mapping, - initial_bios_addr, xga->bios_rom.sz, - rom_read, rom_readw, rom_readl, - NULL, NULL, NULL, - xga->bios_rom.rom, MEM_MAPPING_EXTERNAL, &xga->bios_rom); + xga->instance = 0; + xga->rom_addr = 0; + rom_init(&xga->bios_rom, xga->type ? XGA2_BIOS_PATH : XGA_BIOS_PATH, initial_bios_addr, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); } else { xga->pos_regs[2] = 1 | 0x0c | 0xf0; - xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; + xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; xga->pos_regs[4] = 1 | 2; xga->linear_base = ((xga->pos_regs[4] & 0xfe) * 0x1000000) + (xga->instance << 22); - xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); + xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); } mem_mapping_add(&xga->video_mapping, 0, 0, xga_readb, xga_readw, xga_readl, xga_writeb, xga_writew, xga_writel, NULL, MEM_MAPPING_EXTERNAL, svga); - mem_mapping_add(&xga->linear_mapping, 0, 0, xga_read_linear, xga_readw_linear, xga_readl_linear, + mem_mapping_add(&xga->linear_mapping, 0, 0, xga_read_linear, xga_readw_linear, xga_readl_linear, xga_write_linear, xga_writew_linear, xga_writel_linear, - NULL, MEM_MAPPING_EXTERNAL, svga); + NULL, MEM_MAPPING_EXTERNAL, svga); mem_mapping_add(&xga->memio_mapping, 0, 0, xga_memio_readb, xga_memio_readw, xga_memio_readl, - xga_memio_writeb, xga_memio_writew, xga_memio_writel, + xga_memio_writeb, xga_memio_writew, xga_memio_writel, xga->bios_rom.rom, MEM_MAPPING_EXTERNAL, svga); mem_mapping_disable(&xga->video_mapping); @@ -2743,8 +2763,8 @@ static void static void xga_close(void *p) { - svga_t *svga = (svga_t *) p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *)p; + xga_t *xga = &svga->xga; if (svga) { free(xga->vram); @@ -2761,7 +2781,7 @@ xga_available(void) static void xga_speed_changed(void *p) { - svga_t *svga = (svga_t *) p; + svga_t *svga = (svga_t *)p; svga_recalctimings(svga); } @@ -2769,13 +2789,13 @@ xga_speed_changed(void *p) static void xga_force_redraw(void *p) { - svga_t *svga = (svga_t *) p; + svga_t *svga = (svga_t *)p; svga->fullchange = changeframecount; } static const device_config_t xga_configuration[] = { - // clang-format off + // clang-format off { .name = "init_bios_addr", .description = "Initial MCA BIOS Address (before POS configuration)", @@ -2816,35 +2836,35 @@ static const device_config_t xga_configuration[] = { } }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; const device_t xga_device = { - .name = "XGA (MCA)", + .name = "XGA (MCA)", .internal_name = "xga_mca", - .flags = DEVICE_MCA, - .local = 0, - .init = xga_init, - .close = xga_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = 0, + .init = xga_init, + .close = xga_close, + .reset = NULL, { .available = xga_available }, .speed_changed = xga_speed_changed, - .force_redraw = xga_force_redraw, - .config = xga_configuration + .force_redraw = xga_force_redraw, + .config = xga_configuration }; const device_t xga_isa_device = { - .name = "XGA (ISA)", + .name = "XGA (ISA)", .internal_name = "xga_isa", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 0, - .init = xga_init, - .close = xga_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 0, + .init = xga_init, + .close = xga_close, + .reset = NULL, { .available = xga_available }, .speed_changed = xga_speed_changed, - .force_redraw = xga_force_redraw, - .config = xga_configuration + .force_redraw = xga_force_redraw, + .config = xga_configuration }; void From 72628669024f07289dfe7a08021e01317675877f Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Thu, 1 Sep 2022 13:49:35 -0400 Subject: [PATCH 334/386] qt: Fix discord update timer to run at one second interval --- src/qt/qt_main.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/qt_main.cpp b/src/qt/qt_main.cpp index de2fef1bd..6f471dc53 100644 --- a/src/qt/qt_main.cpp +++ b/src/qt/qt_main.cpp @@ -293,7 +293,7 @@ int main(int argc, char* argv[]) { QObject::connect(&discordupdate, &QTimer::timeout, &app, [] { discord_run_callbacks(); }); - discordupdate.start(0); + discordupdate.start(1000); } /* Initialize the rendering window, or fullscreen. */ From d32cd981c889edf1bd349a5bda8746a79887c555 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Fri, 2 Sep 2022 00:32:04 +0600 Subject: [PATCH 335/386] qt_hardwarerenderer: Don't blit black, hidden portions of images --- src/qt/qt_hardwarerenderer.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/qt/qt_hardwarerenderer.cpp b/src/qt/qt_hardwarerenderer.cpp index a7af8bb4c..c7a6b0811 100644 --- a/src/qt/qt_hardwarerenderer.cpp +++ b/src/qt/qt_hardwarerenderer.cpp @@ -24,6 +24,7 @@ #include #include +#include #include extern "C" { @@ -198,7 +199,7 @@ void HardwareRenderer::onBlit(int buf_idx, int x, int y, int w, int h) { return; } m_context->makeCurrent(this); - m_texture->setData(0, 0, 0, w + x, h + y, 0, QOpenGLTexture::PixelFormat::RGBA, QOpenGLTexture::PixelType::UInt8, (const void*)imagebufs[buf_idx].get(), &m_transferOptions); + m_texture->setData(x, y, 0, w, h, 0, QOpenGLTexture::PixelFormat::RGBA, QOpenGLTexture::PixelType::UInt8, (const void*)((uintptr_t)imagebufs[buf_idx].get() + (uintptr_t)(2048 * 4 * y + x * 4)), &m_transferOptions); buf_usage[buf_idx].clear(); source.setRect(x, y, w, h); if (origSource != source) onResize(this->width(), this->height()); From a84a8615c5bacdf264f6b968856f0a358380ed42 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Fri, 2 Sep 2022 13:45:48 +0600 Subject: [PATCH 336/386] qt_hardwarerenderer: Fix compilation with Qt 5.12 --- src/qt/qt_hardwarerenderer.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/qt/qt_hardwarerenderer.cpp b/src/qt/qt_hardwarerenderer.cpp index c7a6b0811..809777f37 100644 --- a/src/qt/qt_hardwarerenderer.cpp +++ b/src/qt/qt_hardwarerenderer.cpp @@ -199,7 +199,10 @@ void HardwareRenderer::onBlit(int buf_idx, int x, int y, int w, int h) { return; } m_context->makeCurrent(this); - m_texture->setData(x, y, 0, w, h, 0, QOpenGLTexture::PixelFormat::RGBA, QOpenGLTexture::PixelType::UInt8, (const void*)((uintptr_t)imagebufs[buf_idx].get() + (uintptr_t)(2048 * 4 * y + x * 4)), &m_transferOptions); + m_texture->bind(); + glPixelStorei(GL_UNPACK_ROW_LENGTH, 2048); + glTexSubImage2D(GL_TEXTURE_2D, 0, x, y, w, h, QOpenGLTexture::PixelFormat::RGBA, QOpenGLTexture::PixelType::UInt8, (const void*)((uintptr_t)imagebufs[buf_idx].get() + (uintptr_t)(2048 * 4 * y + x * 4))); + m_texture->release(); buf_usage[buf_idx].clear(); source.setRect(x, y, w, h); if (origSource != source) onResize(this->width(), this->height()); From 0cca0d98315e7fca0cb255f796ddd11af618140a Mon Sep 17 00:00:00 2001 From: GH Cao Date: Fri, 2 Sep 2022 16:53:53 +0800 Subject: [PATCH 337/386] win_joystick_rawinput: Fix wchar/char mismatch --- src/include/86box/win.h | 2 ++ src/qt/win_joystick_rawinput.c | 10 +++++----- src/win/win_joystick_rawinput.c | 10 +++++----- 3 files changed, 12 insertions(+), 10 deletions(-) diff --git a/src/include/86box/win.h b/src/include/86box/win.h index ccd6e0f19..4122bb684 100644 --- a/src/include/86box/win.h +++ b/src/include/86box/win.h @@ -23,7 +23,9 @@ #ifndef PLAT_WIN_H #define PLAT_WIN_H +#ifndef UNICODE #define UNICODE +#endif #define BITMAP WINDOWS_BITMAP #if 0 # ifdef _WIN32_WINNT diff --git a/src/qt/win_joystick_rawinput.c b/src/qt/win_joystick_rawinput.c index d1fca0491..dd95f40c9 100644 --- a/src/qt/win_joystick_rawinput.c +++ b/src/qt/win_joystick_rawinput.c @@ -205,15 +205,15 @@ void joystick_get_capabilities(raw_joystick_t* rawjoy, plat_joystick_t* joy) { void joystick_get_device_name(raw_joystick_t* rawjoy, plat_joystick_t* joy, PRID_DEVICE_INFO info) { UINT size = 0; - char *device_name = NULL; + WCHAR *device_name = NULL; WCHAR device_desc_wide[200] = {0}; - GetRawInputDeviceInfoA(rawjoy->hdevice, RIDI_DEVICENAME, device_name, &size); - device_name = calloc(size, sizeof(char)); - if (GetRawInputDeviceInfoA(rawjoy->hdevice, RIDI_DEVICENAME, device_name, &size) <= 0) + GetRawInputDeviceInfoW(rawjoy->hdevice, RIDI_DEVICENAME, device_name, &size); + device_name = calloc(size, sizeof(WCHAR)); + if (GetRawInputDeviceInfoW(rawjoy->hdevice, RIDI_DEVICENAME, device_name, &size) <= 0) fatal("joystick_get_capabilities: Failed to get device name.\n"); - HANDLE hDevObj = CreateFile(device_name, GENERIC_READ | GENERIC_WRITE, + HANDLE hDevObj = CreateFileW(device_name, GENERIC_READ | GENERIC_WRITE, FILE_SHARE_READ | FILE_SHARE_WRITE, NULL, OPEN_EXISTING, 0, NULL); if (hDevObj) { HidD_GetProductString(hDevObj, device_desc_wide, sizeof(WCHAR) * 200); diff --git a/src/win/win_joystick_rawinput.c b/src/win/win_joystick_rawinput.c index 47441f8cf..86c4bfa87 100644 --- a/src/win/win_joystick_rawinput.c +++ b/src/win/win_joystick_rawinput.c @@ -220,15 +220,15 @@ void joystick_get_device_name(raw_joystick_t *rawjoy, plat_joystick_t *joy, PRID_DEVICE_INFO info) { UINT size = 0; - char *device_name = NULL; + WCHAR *device_name = NULL; WCHAR device_desc_wide[200] = { 0 }; - GetRawInputDeviceInfoA(rawjoy->hdevice, RIDI_DEVICENAME, device_name, &size); - device_name = calloc(size, sizeof(char)); - if (GetRawInputDeviceInfoA(rawjoy->hdevice, RIDI_DEVICENAME, device_name, &size) <= 0) + GetRawInputDeviceInfoW(rawjoy->hdevice, RIDI_DEVICENAME, device_name, &size); + device_name = calloc(size, sizeof(WCHAR)); + if (GetRawInputDeviceInfoW(rawjoy->hdevice, RIDI_DEVICENAME, device_name, &size) <= 0) fatal("joystick_get_capabilities: Failed to get device name.\n"); - HANDLE hDevObj = CreateFile(device_name, GENERIC_READ | GENERIC_WRITE, + HANDLE hDevObj = CreateFileW(device_name, GENERIC_READ | GENERIC_WRITE, FILE_SHARE_READ | FILE_SHARE_WRITE, NULL, OPEN_EXISTING, 0, NULL); if (hDevObj) { HidD_GetProductString(hDevObj, device_desc_wide, sizeof(WCHAR) * 200); From 06cfd4dcaec8bf3a4254b7eb11d0e56998724927 Mon Sep 17 00:00:00 2001 From: GH Cao Date: Fri, 2 Sep 2022 16:54:38 +0800 Subject: [PATCH 338/386] net_slirp: Fix building with clang --- src/network/net_slirp.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/network/net_slirp.c b/src/network/net_slirp.c index 46b913416..24b75e208 100644 --- a/src/network/net_slirp.c +++ b/src/network/net_slirp.c @@ -329,9 +329,11 @@ net_slirp_thread(void *priv) break; case NET_EVENT_TX: - int packets = network_tx_popv(slirp->card, slirp->pkt_tx_v, SLIRP_PKT_BATCH); - for (int i = 0; i < packets; i++) { - net_slirp_in(slirp, slirp->pkt_tx_v[i].data, slirp->pkt_tx_v[i].len); + { + int packets = network_tx_popv(slirp->card, slirp->pkt_tx_v, SLIRP_PKT_BATCH); + for (int i = 0; i < packets; i++) { + net_slirp_in(slirp, slirp->pkt_tx_v[i].data, slirp->pkt_tx_v[i].len); + } } break; From d47bd06f25233a29a882ac95b0ce10fc5cb3db1a Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sat, 3 Sep 2022 13:13:07 +0600 Subject: [PATCH 339/386] qt_hardwarerenderer: Use setData on Qt 5.14 and later --- src/qt/qt_hardwarerenderer.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/qt/qt_hardwarerenderer.cpp b/src/qt/qt_hardwarerenderer.cpp index 809777f37..29b3613ea 100644 --- a/src/qt/qt_hardwarerenderer.cpp +++ b/src/qt/qt_hardwarerenderer.cpp @@ -199,10 +199,14 @@ void HardwareRenderer::onBlit(int buf_idx, int x, int y, int w, int h) { return; } m_context->makeCurrent(this); +#if QT_VERSION >= QT_VERSION_CHECK(5, 14, 0) + m_texture->setData(x, y, 0, w, h, 0, QOpenGLTexture::PixelFormat::RGBA, QOpenGLTexture::PixelType::UInt8, (const void*)((uintptr_t)imagebufs[buf_idx].get() + (uintptr_t)(2048 * 4 * y + x * 4)), &m_transferOptions); +#else m_texture->bind(); glPixelStorei(GL_UNPACK_ROW_LENGTH, 2048); glTexSubImage2D(GL_TEXTURE_2D, 0, x, y, w, h, QOpenGLTexture::PixelFormat::RGBA, QOpenGLTexture::PixelType::UInt8, (const void*)((uintptr_t)imagebufs[buf_idx].get() + (uintptr_t)(2048 * 4 * y + x * 4))); m_texture->release(); +#endif buf_usage[buf_idx].clear(); source.setRect(x, y, w, h); if (origSource != source) onResize(this->width(), this->height()); From 19280008b3d847f018bccac21579434fcb2b1796 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Mon, 5 Sep 2022 16:34:58 -0300 Subject: [PATCH 340/386] Jenkins: Fix compiler flags not being used on macOS x86_64h slice --- .ci/build.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.ci/build.sh b/.ci/build.sh index 455ba3995..320451a83 100644 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -231,7 +231,7 @@ toolchain_prefix=flags-gcc is_mac && toolchain_prefix=llvm-macos case $arch in 32 | x86) toolchain="$toolchain_prefix-i686";; - 64 | x86_64) toolchain="$toolchain_prefix-x86_64";; + 64 | x86_64*) toolchain="$toolchain_prefix-x86_64";; ARM32 | arm32) toolchain="$toolchain_prefix-armv7";; ARM64 | arm64) toolchain="$toolchain_prefix-aarch64";; *) toolchain="$toolchain_prefix-$arch";; From 32220dab84d213f85135e7742e43bfc25fab05fb Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 6 Sep 2022 23:39:37 +0200 Subject: [PATCH 341/386] XGA: made the source file compatible with the 86box clang-format style (ident) and actually fixed the 40 25 POST hang (the key element was bit 0 of MCA port 0x103). --- src/video/vid_xga.c | 1094 +++++++++++++++++++++---------------------- 1 file changed, 537 insertions(+), 557 deletions(-) diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index df145743c..e41430c86 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -14,31 +14,31 @@ * * Copyright 2022 TheCollector1995. */ -#include -#include -#include -#include -#include -#include <86box/bswap.h> +#include "cpu.h" #include <86box/86box.h> +#include <86box/bswap.h> +#include <86box/device.h> +#include <86box/dma.h> #include <86box/io.h> #include <86box/machine.h> -#include <86box/mem.h> -#include <86box/dma.h> -#include <86box/rom.h> #include <86box/mca.h> -#include <86box/device.h> +#include <86box/mem.h> +#include <86box/rom.h> #include <86box/timer.h> -#include <86box/video.h> #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> #include <86box/vid_xga_device.h> -#include "cpu.h" +#include <86box/video.h> +#include +#include +#include +#include +#include -#define XGA_BIOS_PATH "roms/video/xga/XGA_37F9576_Ver200.BIN" +#define XGA_BIOS_PATH "roms/video/xga/XGA_37F9576_Ver200.BIN" #define XGA2_BIOS_PATH "roms/video/xga/xga2_v300.bin" -static void xga_ext_outb(uint16_t addr, uint8_t val, void *p); +static void xga_ext_outb(uint16_t addr, uint8_t val, void *p); static uint8_t xga_ext_inb(uint16_t addr, void *p); static void @@ -46,7 +46,7 @@ xga_updatemapping(svga_t *svga) { xga_t *xga = &svga->xga; - //pclog("OpMode = %x, linear base = %08x, aperture cntl = %d, opmodereset1 = %d, access mode = %x, map = %x.\n", xga->op_mode, xga->linear_base, xga->aperture_cntl, xga->op_mode_reset, xga->access_mode, svga->gdcreg[6] & 0x0c); + // pclog("OpMode = %x, linear base = %08x, aperture cntl = %d, opmodereset1 = %d, access mode = %x, map = %x.\n", xga->op_mode, xga->linear_base, xga->aperture_cntl, xga->op_mode_reset, xga->access_mode, svga->gdcreg[6] & 0x0c); if ((xga->op_mode & 7) >= 4) { if (xga->aperture_cntl == 1) { mem_mapping_disable(&svga->mapping); @@ -72,7 +72,7 @@ linear: mem_mapping_disable(&xga->linear_mapping); } xga->on = 0; - vga_on = 1; + vga_on = 1; if (((xga->op_mode & 7) == 4) && ((svga->gdcreg[6] & 0x0c) == 0x0c) && !xga->a5_test) xga->linear_endian_reverse = 1; } else { @@ -99,7 +99,7 @@ linear: } mem_mapping_disable(&xga->linear_mapping); xga->on = 0; - vga_on = 1; + vga_on = 1; } } @@ -109,10 +109,10 @@ xga_recalctimings(svga_t *svga) xga_t *xga = &svga->xga; if (xga->on) { - xga->v_total = xga->vtotal + 1; - xga->dispend = xga->vdispend + 1; - xga->v_syncstart = xga->vsyncstart + 1; - xga->split = xga->linecmp + 1; + xga->v_total = xga->vtotal + 1; + xga->dispend = xga->vdispend + 1; + xga->v_syncstart = xga->vsyncstart + 1; + xga->split = xga->linecmp + 1; xga->v_blankstart = xga->vblankstart + 1; xga->h_disp = (xga->hdisp + 1) << 3; @@ -120,7 +120,7 @@ xga_recalctimings(svga_t *svga) xga->rowoffset = (xga->hdisp + 1); xga->interlace = !!(xga->disp_cntl_1 & 0x08); - xga->rowcount = (xga->disp_cntl_2 & 0xc0) >> 6; + xga->rowcount = (xga->disp_cntl_2 & 0xc0) >> 6; if (xga->interlace) { xga->v_total >>= 1; @@ -135,16 +135,16 @@ xga_recalctimings(svga_t *svga) switch (xga->clk_sel_1 & 0x0c) { case 0: if (xga->clk_sel_2 & 0x80) { - svga->clock = (cpuclock * (double)(1ull << 32)) / 41539000.0; + svga->clock = (cpuclock * (double) (1ull << 32)) / 41539000.0; } else { - svga->clock = (cpuclock * (double)(1ull << 32)) / 25175000.0; + svga->clock = (cpuclock * (double) (1ull << 32)) / 25175000.0; } break; case 4: - svga->clock = (cpuclock * (double)(1ull << 32)) / 28322000.0; + svga->clock = (cpuclock * (double) (1ull << 32)) / 28322000.0; break; case 0x0c: - svga->clock = (cpuclock * (double)(1ull << 32)) / 44900000.0; + svga->clock = (cpuclock * (double) (1ull << 32)) / 44900000.0; break; } } else { @@ -215,11 +215,11 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) break; case 0x30: - xga->hwc_pos_x = (xga->hwc_pos_x & 0x0700) | val; + xga->hwc_pos_x = (xga->hwc_pos_x & 0x0700) | val; xga->hwcursor.x = xga->hwc_pos_x; break; case 0x31: - xga->hwc_pos_x = (xga->hwc_pos_x & 0xff) | ((val & 0x07) << 8); + xga->hwc_pos_x = (xga->hwc_pos_x & 0xff) | ((val & 0x07) << 8); xga->hwcursor.x = xga->hwc_pos_x; break; @@ -229,11 +229,11 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) break; case 0x33: - xga->hwc_pos_y = (xga->hwc_pos_y & 0x0700) | val; + xga->hwc_pos_y = (xga->hwc_pos_y & 0x0700) | val; xga->hwcursor.y = xga->hwc_pos_y; break; case 0x34: - xga->hwc_pos_y = (xga->hwc_pos_y & 0xff) | ((val & 0x07) << 8); + xga->hwc_pos_y = (xga->hwc_pos_y & 0xff) | ((val & 0x07) << 8); xga->hwcursor.y = xga->hwc_pos_y; break; @@ -243,7 +243,7 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) break; case 0x36: - xga->hwc_control = val; + xga->hwc_control = val; xga->hwcursor.ena = xga->hwc_control & 1; break; @@ -306,12 +306,12 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) case 0x60: xga->sprite_pal_addr_idx = (xga->sprite_pal_addr_idx & 0x3f00) | val; - svga->dac_pos = 0; - svga->dac_addr = val & 0xff; + svga->dac_pos = 0; + svga->dac_addr = val & 0xff; break; case 0x61: xga->sprite_pal_addr_idx = (xga->sprite_pal_addr_idx & 0xff) | ((val & 0x3f) << 8); - xga->sprite_pos = xga->sprite_pal_addr_idx & 0x1ff; + xga->sprite_pos = xga->sprite_pal_addr_idx & 0x1ff; if ((xga->sprite_pos >= 0) && (xga->sprite_pos <= 16)) { if ((xga->op_mode & 7) >= 5) xga->cursor_data_on = 1; @@ -333,17 +333,17 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) xga->cursor_data_on = 0; } } - //pclog("Sprite POS = %d, data on = %d, idx = %d, apcntl = %d\n", xga->sprite_pos, xga->cursor_data_on, xga->sprite_pal_addr_idx, xga->aperture_cntl); + // pclog("Sprite POS = %d, data on = %d, idx = %d, apcntl = %d\n", xga->sprite_pos, xga->cursor_data_on, xga->sprite_pal_addr_idx, xga->aperture_cntl); break; case 0x62: xga->sprite_pal_addr_idx_prefetch = (xga->sprite_pal_addr_idx_prefetch & 0x3f00) | val; - svga->dac_pos = 0; - svga->dac_addr = val & 0xff; + svga->dac_pos = 0; + svga->dac_addr = val & 0xff; break; case 0x63: xga->sprite_pal_addr_idx_prefetch = (xga->sprite_pal_addr_idx_prefetch & 0xff) | ((val & 0x3f) << 8); - xga->sprite_pos_prefetch = xga->sprite_pal_addr_idx_prefetch & 0x1ff; + xga->sprite_pos_prefetch = xga->sprite_pal_addr_idx_prefetch & 0x1ff; break; case 0x64: @@ -362,14 +362,14 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) svga->dac_pos++; break; case 2: - xga->pal_b = val; - index = svga->dac_addr & 0xff; + xga->pal_b = val; + index = svga->dac_addr & 0xff; svga->vgapal[index].r = svga->dac_r; svga->vgapal[index].g = svga->dac_g; svga->vgapal[index].b = xga->pal_b; - svga->pallook[index] = makecol32(svga->vgapal[index].r, svga->vgapal[index].g, svga->vgapal[index].b); - svga->dac_pos = 0; - svga->dac_addr = (svga->dac_addr + 1) & 0xff; + svga->pallook[index] = makecol32(svga->vgapal[index].r, svga->vgapal[index].g, svga->vgapal[index].b); + svga->dac_pos = 0; + svga->dac_addr = (svga->dac_addr + 1) & 0xff; break; } break; @@ -390,7 +390,7 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) case 0x6a: xga->sprite_data[xga->sprite_pos] = val; - xga->sprite_pos = (xga->sprite_pos + 1) & 0x3ff; + xga->sprite_pos = (xga->sprite_pos + 1) & 0x3ff; break; case 0x70: @@ -403,10 +403,10 @@ xga_ext_out_reg(xga_t *xga, svga_t *svga, uint8_t idx, uint8_t val) static void xga_ext_outb(uint16_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; - //pclog("[%04X:%08X]: EXT OUTB = %02x, val = %02x\n", CS, cpu_state.pc, addr, val); + // pclog("[%04X:%08X]: EXT OUTB = %02x, val = %02x\n", CS, cpu_state.pc, addr, val); switch (addr & 0x0f) { case 0: xga->op_mode = val; @@ -421,17 +421,17 @@ xga_ext_outb(uint16_t addr, uint8_t val, void *p) xga->aperture_cntl = 0; break; case 6: - vga_on = 0; + vga_on = 0; xga->on = 1; break; case 8: xga->ap_idx = val; - //pclog("Aperture CNTL = %d, val = %02x, up to bit6 = %02x\n", xga->aperture_cntl, val, val & 0x3f); + // pclog("Aperture CNTL = %d, val = %02x, up to bit6 = %02x\n", xga->aperture_cntl, val, val & 0x3f); if ((xga->op_mode & 7) < 4) { xga->write_bank = xga->read_bank = 0; } else { xga->write_bank = (xga->ap_idx & 0x3f) << 16; - xga->read_bank = xga->write_bank; + xga->read_bank = xga->write_bank; } break; case 9: @@ -454,8 +454,8 @@ xga_ext_outb(uint16_t addr, uint8_t val, void *p) static uint8_t xga_ext_inb(uint16_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; uint8_t ret, index; switch (addr & 0x0f) { @@ -629,9 +629,9 @@ xga_ext_inb(uint16_t addr, void *p) ret = svga->vgapal[index].g; break; case 2: - svga->dac_pos = 0; + svga->dac_pos = 0; svga->dac_addr = (svga->dac_addr + 1) & 0xff; - ret = svga->vgapal[index].b; + ret = svga->vgapal[index].b; break; } break; @@ -651,8 +651,8 @@ xga_ext_inb(uint16_t addr, void *p) break; case 0x6a: - //pclog("Sprite POS Read = %d, addr idx = %04x\n", xga->sprite_pos, xga->sprite_pal_addr_idx_prefetch); - ret = xga->sprite_data[xga->sprite_pos_prefetch]; + // pclog("Sprite POS Read = %d, addr idx = %04x\n", xga->sprite_pos, xga->sprite_pal_addr_idx_prefetch); + ret = xga->sprite_data[xga->sprite_pos_prefetch]; xga->sprite_pos_prefetch = (xga->sprite_pos_prefetch + 1) & 0x3ff; break; @@ -667,70 +667,114 @@ xga_ext_inb(uint16_t addr, void *p) break; } - //pclog("[%04X:%08X]: EXT INB = %02x, ret = %02x\n", CS, cpu_state.pc, addr, ret); + // pclog("[%04X:%08X]: EXT INB = %02x, ret = %02x\n", CS, cpu_state.pc, addr, ret); return ret; } - #define READ(addr, dat) \ dat = xga->vram[(addr) & (xga->vram_mask)]; -#define WRITE(addr, dat) \ - xga->vram[((addr)) & (xga->vram_mask)] = dat; \ +#define WRITE(addr, dat) \ + xga->vram[((addr)) & (xga->vram_mask)] = dat; \ xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = changeframecount; #define READW(addr, dat) \ - dat = *(uint16_t *)&xga->vram[(addr) & (xga->vram_mask)]; + dat = *(uint16_t *) &xga->vram[(addr) & (xga->vram_mask)]; -#define READW_REVERSE(addr, dat) \ +#define READW_REVERSE(addr, dat) \ dat = xga->vram[(addr + 1) & (xga->vram_mask - 1)] & 0xff; \ dat |= (xga->vram[(addr) & (xga->vram_mask - 1)] << 8); -#define WRITEW(addr, dat) \ - *(uint16_t *)&xga->vram[((addr)) & (xga->vram_mask)] = dat; \ +#define WRITEW(addr, dat) \ + *(uint16_t *) &xga->vram[((addr)) & (xga->vram_mask)] = dat; \ xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = changeframecount; -#define WRITEW_REVERSE(addr, dat) \ - xga->vram[((addr + 1)) & (xga->vram_mask - 1)] = dat & 0xff; \ - xga->vram[((addr)) & (xga->vram_mask - 1)] = dat >> 8; \ +#define WRITEW_REVERSE(addr, dat) \ + xga->vram[((addr + 1)) & (xga->vram_mask - 1)] = dat & 0xff; \ + xga->vram[((addr)) & (xga->vram_mask - 1)] = dat >> 8; \ xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = changeframecount; -#define ROP(mix, d, s) { \ - switch ((mix) ? (xga->accel.frgd_mix & 0x1f) : (xga->accel.bkgd_mix & 0x1f)) { \ - case 0x00: d = 0; break; \ - case 0x01: d = s & d; break; \ - case 0x02: d = s & ~d; break; \ - case 0x03: d = s; break; \ - case 0x04: d = ~s & d; break; \ - case 0x05: d = d; break; \ - case 0x06: d = s ^ d; break; \ - case 0x07: d = s | d; break; \ - case 0x08: d = ~s & ~d; break; \ - case 0x09: d = s ^ ~d; break; \ - case 0x0a: d = ~d; break; \ - case 0x0b: d = s | ~d; break; \ - case 0x0c: d = ~s; break; \ - case 0x0d: d = ~s | d; break; \ - case 0x0e: d = ~s | ~d; break; \ - case 0x0f: d = ~0; break; \ - case 0x10: d = MAX(s, d); break; \ - case 0x11: d = MIN(s, d); break; \ - case 0x12: d = MIN(0xff, s + d); break; \ - case 0x13: d = MAX(0, d - s); break; \ - case 0x14: d = MAX(0, s - d); break; \ - case 0x15: d = (s + d) >> 1; break; \ - } \ - } +#define ROP(mix, d, s) \ + { \ + switch ((mix) ? (xga->accel.frgd_mix & 0x1f) : (xga->accel.bkgd_mix & 0x1f)) { \ + case 0x00: \ + d = 0; \ + break; \ + case 0x01: \ + d = s & d; \ + break; \ + case 0x02: \ + d = s & ~d; \ + break; \ + case 0x03: \ + d = s; \ + break; \ + case 0x04: \ + d = ~s & d; \ + break; \ + case 0x05: \ + d = d; \ + break; \ + case 0x06: \ + d = s ^ d; \ + break; \ + case 0x07: \ + d = s | d; \ + break; \ + case 0x08: \ + d = ~s & ~d; \ + break; \ + case 0x09: \ + d = s ^ ~d; \ + break; \ + case 0x0a: \ + d = ~d; \ + break; \ + case 0x0b: \ + d = s | ~d; \ + break; \ + case 0x0c: \ + d = ~s; \ + break; \ + case 0x0d: \ + d = ~s | d; \ + break; \ + case 0x0e: \ + d = ~s | ~d; \ + break; \ + case 0x0f: \ + d = ~0; \ + break; \ + case 0x10: \ + d = MAX(s, d); \ + break; \ + case 0x11: \ + d = MIN(s, d); \ + break; \ + case 0x12: \ + d = MIN(0xff, s + d); \ + break; \ + case 0x13: \ + d = MAX(0, d - s); \ + break; \ + case 0x14: \ + d = MAX(0, s - d); \ + break; \ + case 0x15: \ + d = (s + d) >> 1; \ + break; \ + } \ + } static uint32_t xga_accel_read_pattern_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int width) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t addr = base; - int bits; + int bits; uint32_t byte; - uint8_t px; - int skip = 0; + uint8_t px; + int skip = 0; if (xga->base_addr_1mb) { if (addr < xga->base_addr_1mb || (addr > (xga->base_addr_1mb + 0xfffff))) @@ -759,16 +803,15 @@ xga_accel_read_pattern_map_pixel(svga_t *svga, int x, int y, int map, uint32_t b return px; } - static uint32_t xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int width) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t addr = base; - int bits; + int bits; uint32_t byte; - uint8_t px; - int skip = 0; + uint8_t px; + int skip = 0; if (xga->base_addr_1mb) { if (addr < xga->base_addr_1mb || (addr > (xga->base_addr_1mb + 0xfffff))) @@ -831,10 +874,10 @@ xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int static void xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, uint32_t pixel, int width) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t addr = base; - uint8_t byte, mask; - int skip = 0; + uint8_t byte, mask; + int skip = 0; if (xga->base_addr_1mb) { if (addr < xga->base_addr_1mb || (addr > (xga->base_addr_1mb + 0xfffff))) @@ -848,11 +891,11 @@ xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, ui case 0: /*1-bit*/ addr += (y * (width) >> 3); addr += (x >> 3); - if (!skip) { + if (!skip) { READ(addr, byte); - } else { + } else { byte = mem_readb_phys(addr); - } + } if ((xga->accel.px_map_format[map] & 8) && !(xga->access_mode & 8)) { if (xga->linear_endian_reverse) mask = 1 << (7 - (x & 7)); @@ -905,15 +948,15 @@ xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, ui static void xga_short_stroke(svga_t *svga, uint8_t ssv) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t src_dat, dest_dat, old_dest_dat; - uint32_t color_cmp = xga->accel.color_cmp; + uint32_t color_cmp = xga->accel.color_cmp; uint32_t plane_mask = xga->accel.plane_mask; - uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; - uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; - int y = ssv & 0x0f; - int x = 0; - int dx, dy, dirx = 0, diry = 0; + uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; + uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; + int y = ssv & 0x0f; + int x = 0; + int dx, dy, dirx = 0, diry = 0; dx = xga->accel.dst_map_x & 0x1fff; if (xga->accel.dst_map_x & 0x1800) @@ -961,18 +1004,11 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) if (xga->accel.pat_src == 8) { while (y >= 0) { if (xga->accel.command & 0xc0) { - if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && - (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -989,16 +1025,10 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) } } } else { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1031,37 +1061,40 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) xga->accel.dst_map_y = dy; } -#define SWAP(a,b) tmpswap = a; a = b; b = tmpswap; +#define SWAP(a, b) \ + tmpswap = a; \ + a = b; \ + b = tmpswap; static void xga_line_draw_write(svga_t *svga) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t src_dat, dest_dat, old_dest_dat; - uint32_t color_cmp = xga->accel.color_cmp; + uint32_t color_cmp = xga->accel.color_cmp; uint32_t plane_mask = xga->accel.plane_mask; - uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; - uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; - int dminor, destxtmp, dmajor, err, tmpswap; - int steep = 1; - int xdir, ydir; - int y = xga->accel.blt_width; - int x = 0; - int dx, dy; + uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; + uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; + int dminor, destxtmp, dmajor, err, tmpswap; + int steep = 1; + int xdir, ydir; + int y = xga->accel.blt_width; + int x = 0; + int dx, dy; - dminor = ((int16_t)xga->accel.bres_k1); - if (xga->accel.bres_k1 & 0x2000) + dminor = ((int16_t) xga->accel.bres_k1); + if (xga->accel.bres_k1 & 0x2000) dminor |= ~0x1fff; - dminor >>= 1; + dminor >>= 1; - destxtmp = ((int16_t)xga->accel.bres_k2); - if (xga->accel.bres_k2 & 0x2000) + destxtmp = ((int16_t) xga->accel.bres_k2); + if (xga->accel.bres_k2 & 0x2000) destxtmp |= ~0x1fff; dmajor = -(destxtmp - (dminor << 1)) >> 1; - err = ((int16_t)xga->accel.bres_err_term); - if (xga->accel.bres_err_term & 0x2000) + err = ((int16_t) xga->accel.bres_err_term); + if (xga->accel.bres_err_term & 0x2000) destxtmp |= ~0x1fff; if (xga->accel.octant & 0x02) { @@ -1085,27 +1118,20 @@ xga_line_draw_write(svga_t *svga) dy |= ~0x17ff; if (xga->accel.octant & 0x01) { - steep = 0; - SWAP(dx, dy); - SWAP(xdir, ydir); + steep = 0; + SWAP(dx, dy); + SWAP(xdir, ydir); } if (xga->accel.pat_src == 8) { while (y >= 0) { if (xga->accel.command & 0xc0) { if (steep) { - if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && - (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1118,18 +1144,11 @@ xga_line_draw_write(svga_t *svga) } } } else { - if ((dy >= xga->accel.mask_map_origin_x_off) && (dy <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && - (dx >= xga->accel.mask_map_origin_y_off) && (dx <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + if ((dy >= xga->accel.mask_map_origin_x_off) && (dy <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dx >= xga->accel.mask_map_origin_y_off) && (dx <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1144,16 +1163,10 @@ xga_line_draw_write(svga_t *svga) } } else { if (steep) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1165,16 +1178,10 @@ xga_line_draw_write(svga_t *svga) xga_accel_write_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dest_dat, xga->accel.px_map_width[xga->accel.dst_map] + 1); } } else { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, dy, dx, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1214,7 +1221,6 @@ xga_line_draw_write(svga_t *svga) } } - static int16_t xga_dst_wrap(int16_t addr) { @@ -1225,20 +1231,20 @@ xga_dst_wrap(int16_t addr) static void xga_bitblt(svga_t *svga) { - xga_t *xga = &svga->xga; + xga_t *xga = &svga->xga; uint32_t src_dat, dest_dat, old_dest_dat; - uint32_t color_cmp = xga->accel.color_cmp; + uint32_t color_cmp = xga->accel.color_cmp; uint32_t plane_mask = xga->accel.plane_mask; - uint32_t patbase = xga->accel.px_map_base[xga->accel.pat_src]; - uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; - uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; - uint32_t patwidth = xga->accel.px_map_width[xga->accel.pat_src]; - uint32_t dstwidth = xga->accel.px_map_width[xga->accel.dst_map]; - uint32_t srcwidth = xga->accel.px_map_width[xga->accel.src_map]; - uint32_t patheight = xga->accel.px_map_height[xga->accel.pat_src]; - uint32_t srcheight = xga->accel.px_map_height[xga->accel.src_map]; - int mix = 0; - int xdir, ydir; + uint32_t patbase = xga->accel.px_map_base[xga->accel.pat_src]; + uint32_t dstbase = xga->accel.px_map_base[xga->accel.dst_map]; + uint32_t srcbase = xga->accel.px_map_base[xga->accel.src_map]; + uint32_t patwidth = xga->accel.px_map_width[xga->accel.pat_src]; + uint32_t dstwidth = xga->accel.px_map_width[xga->accel.dst_map]; + uint32_t srcwidth = xga->accel.px_map_width[xga->accel.src_map]; + uint32_t patheight = xga->accel.px_map_height[xga->accel.pat_src]; + uint32_t srcheight = xga->accel.px_map_height[xga->accel.src_map]; + int mix = 0; + int xdir, ydir; if (xga->accel.octant & 0x02) { ydir = -1; @@ -1277,22 +1283,15 @@ xga_bitblt(svga_t *svga) } } - //pclog("Pattern Map = 8: CMD = %08x: SRCBase = %08x, DSTBase = %08x, from/to vram dir = %d, cmd dir = %06x\n", xga->accel.command, srcbase, dstbase, xga->from_to_vram, xga->accel.dir_cmd); - //pclog("CMD = %08x: Y = %d, X = %d, patsrc = %02x, srcmap = %d, dstmap = %d, py = %d, sy = %d, dy = %d, width0 = %d, width1 = %d, width2 = %d, width3 = %d\n", xga->accel.command, xga->accel.y, xga->accel.x, xga->accel.pat_src, xga->accel.src_map, xga->accel.dst_map, xga->accel.py, xga->accel.sy, xga->accel.dy, xga->accel.px_map_width[0], xga->accel.px_map_width[1], xga->accel.px_map_width[2], xga->accel.px_map_width[3]); + // pclog("Pattern Map = 8: CMD = %08x: SRCBase = %08x, DSTBase = %08x, from/to vram dir = %d, cmd dir = %06x\n", xga->accel.command, srcbase, dstbase, xga->from_to_vram, xga->accel.dir_cmd); + // pclog("CMD = %08x: Y = %d, X = %d, patsrc = %02x, srcmap = %d, dstmap = %d, py = %d, sy = %d, dy = %d, width0 = %d, width1 = %d, width2 = %d, width3 = %d\n", xga->accel.command, xga->accel.y, xga->accel.x, xga->accel.pat_src, xga->accel.src_map, xga->accel.dst_map, xga->accel.py, xga->accel.sy, xga->accel.dy, xga->accel.px_map_width[0], xga->accel.px_map_width[1], xga->accel.px_map_width[2], xga->accel.px_map_width[3]); while (xga->accel.y >= 0) { if (xga->accel.command & 0xc0) { - if ((xga->accel.dx >= xga->accel.mask_map_origin_x_off) && (xga->accel.dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && - (xga->accel.dy >= xga->accel.mask_map_origin_y_off) && (xga->accel.dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; + if ((xga->accel.dx >= xga->accel.mask_map_origin_x_off) && (xga->accel.dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (xga->accel.dy >= xga->accel.mask_map_origin_y_off) && (xga->accel.dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1300,16 +1299,10 @@ xga_bitblt(svga_t *svga) } } } else { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1368,14 +1361,13 @@ xga_bitblt(svga_t *svga) } } - //pclog("Pattern Map = %d: CMD = %08x: PATBase = %08x, SRCBase = %08x, DSTBase = %08x\n", xga->accel.pat_src, xga->accel.command, patbase, srcbase, dstbase); - //pclog("CMD = %08x: Y = %d, X = %d, patsrc = %02x, srcmap = %d, dstmap = %d, py = %d, sy = %d, dy = %d, width0 = %d, width1 = %d, width2 = %d, width3 = %d\n", xga->accel.command, xga->accel.y, xga->accel.x, xga->accel.pat_src, xga->accel.src_map, xga->accel.dst_map, xga->accel.py, xga->accel.sy, xga->accel.dy, xga->accel.px_map_width[0], xga->accel.px_map_width[1], xga->accel.px_map_width[2], xga->accel.px_map_width[3]); + // pclog("Pattern Map = %d: CMD = %08x: PATBase = %08x, SRCBase = %08x, DSTBase = %08x\n", xga->accel.pat_src, xga->accel.command, patbase, srcbase, dstbase); + // pclog("CMD = %08x: Y = %d, X = %d, patsrc = %02x, srcmap = %d, dstmap = %d, py = %d, sy = %d, dy = %d, width0 = %d, width1 = %d, width2 = %d, width3 = %d\n", xga->accel.command, xga->accel.y, xga->accel.x, xga->accel.pat_src, xga->accel.src_map, xga->accel.dst_map, xga->accel.py, xga->accel.sy, xga->accel.dy, xga->accel.px_map_width[0], xga->accel.px_map_width[1], xga->accel.px_map_width[2], xga->accel.px_map_width[3]); while (xga->accel.y >= 0) { mix = xga_accel_read_pattern_map_pixel(svga, xga->accel.px, xga->accel.py, xga->accel.pat_src, patbase, patwidth + 1); if (xga->accel.command & 0xc0) { - if ((xga->accel.dx >= xga->accel.mask_map_origin_x_off) && (xga->accel.dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && - (xga->accel.dy >= xga->accel.mask_map_origin_y_off) && (xga->accel.dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { + if ((xga->accel.dx >= xga->accel.mask_map_origin_x_off) && (xga->accel.dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (xga->accel.dy >= xga->accel.mask_map_origin_y_off) && (xga->accel.dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { if (mix) src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : xga->accel.frgd_color; else @@ -1383,13 +1375,7 @@ xga_bitblt(svga_t *svga) dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(mix, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1404,13 +1390,7 @@ xga_bitblt(svga_t *svga) dest_dat = xga_accel_read_map_pixel(svga, xga->accel.dx, xga->accel.dy, xga->accel.dst_map, dstbase, dstwidth + 1); - if ((xga->accel.cc_cond == 4) || - ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || - ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || - ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || - ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || - ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || - ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { + if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(mix, dest_dat, src_dat); dest_dat = (dest_dat & plane_mask) | (old_dest_dat & ~plane_mask); @@ -1418,7 +1398,6 @@ xga_bitblt(svga_t *svga) } } - xga->accel.sx += xdir; if (xga->accel.pattern) xga->accel.px = ((xga->accel.px + xdir) & patwidth) | (xga->accel.px & ~patwidth); @@ -1487,7 +1466,7 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) case 0x18: if (len == 4) { - xga->accel.px_map_width[xga->accel.px_map_idx] = val & 0xffff; + xga->accel.px_map_width[xga->accel.px_map_idx] = val & 0xffff; xga->accel.px_map_height[xga->accel.px_map_idx] = (val >> 16) & 0xffff; } else if (len == 2) { xga->accel.px_map_width[xga->accel.px_map_idx] = val & 0xffff; @@ -1564,13 +1543,13 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) case 0x2c: if (len == 4) { - xga->accel.short_stroke = val; + xga->accel.short_stroke = val; xga->accel.short_stroke_vector1 = xga->accel.short_stroke & 0xff; xga->accel.short_stroke_vector2 = (xga->accel.short_stroke >> 8) & 0xff; xga->accel.short_stroke_vector3 = (xga->accel.short_stroke >> 16) & 0xff; xga->accel.short_stroke_vector4 = (xga->accel.short_stroke >> 24) & 0xff; - //pclog("1Vector = %02x, 2Vector = %02x, 3Vector = %02x, 4Vector = %02x\n", xga->accel.short_stroke_vector1, xga->accel.short_stroke_vector2, xga->accel.short_stroke_vector3, xga->accel.short_stroke_vector4); + // pclog("1Vector = %02x, 2Vector = %02x, 3Vector = %02x, 4Vector = %02x\n", xga->accel.short_stroke_vector1, xga->accel.short_stroke_vector2, xga->accel.short_stroke_vector3, xga->accel.short_stroke_vector4); xga_short_stroke(svga, xga->accel.short_stroke_vector1); xga_short_stroke(svga, xga->accel.short_stroke_vector2); xga_short_stroke(svga, xga->accel.short_stroke_vector3); @@ -1600,7 +1579,7 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) xga->accel.frgd_mix = val & 0xff; if (len == 4) { xga->accel.bkgd_mix = (val >> 8) & 0xff; - xga->accel.cc_cond = (val >> 16) & 0x07; + xga->accel.cc_cond = (val >> 16) & 0x07; } else if (len == 2) { xga->accel.bkgd_mix = (val >> 8) & 0xff; } @@ -1708,7 +1687,7 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) case 0x60: if (len == 4) { - xga->accel.blt_width = val & 0xffff; + xga->accel.blt_width = val & 0xffff; xga->accel.blt_height = (val >> 16) & 0xffff; } else if (len == 2) { xga->accel.blt_width = val; @@ -1835,30 +1814,30 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) if (len == 4) { xga->accel.command = val; exec_command: - xga->accel.octant = xga->accel.command & 0x07; + xga->accel.octant = xga->accel.command & 0x07; xga->accel.draw_mode = xga->accel.command & 0x30; xga->accel.mask_mode = xga->accel.command & 0xc0; - xga->accel.pat_src = ((xga->accel.command >> 12) & 0x0f); - xga->accel.dst_map = ((xga->accel.command >> 16) & 0x0f); - xga->accel.src_map = ((xga->accel.command >> 20) & 0x0f); + xga->accel.pat_src = ((xga->accel.command >> 12) & 0x0f); + xga->accel.dst_map = ((xga->accel.command >> 16) & 0x0f); + xga->accel.src_map = ((xga->accel.command >> 20) & 0x0f); - //if (xga->accel.pat_src) { - // pclog("[%04X:%08X]: Accel Command = %02x, full = %08x, patwidth = %d, dstwidth = %d, srcwidth = %d, patheight = %d, dstheight = %d, srcheight = %d, px = %d, py = %d, dx = %d, dy = %d, sx = %d, sy = %d, patsrc = %d, dstmap = %d, srcmap = %d, dstbase = %08x, srcbase = %08x, patbase = %08x, dstformat = %x, srcformat = %x, planemask = %08x\n", - // CS, cpu_state.pc, ((xga->accel.command >> 24) & 0x0f), xga->accel.command, xga->accel.px_map_width[xga->accel.pat_src], - // xga->accel.px_map_width[xga->accel.dst_map], xga->accel.px_map_width[xga->accel.src_map], - // xga->accel.px_map_height[xga->accel.pat_src], xga->accel.px_map_height[xga->accel.dst_map], - // xga->accel.px_map_height[xga->accel.src_map], - // xga->accel.pat_map_x, xga->accel.pat_map_y, - // xga->accel.dst_map_x, xga->accel.dst_map_y, - // xga->accel.src_map_x, xga->accel.src_map_y, - // xga->accel.pat_src, xga->accel.dst_map, xga->accel.src_map, - // xga->accel.px_map_base[xga->accel.dst_map], xga->accel.px_map_base[xga->accel.src_map], xga->accel.px_map_base[xga->accel.pat_src], - // xga->accel.px_map_format[xga->accel.dst_map] & 0x0f, xga->accel.px_map_format[xga->accel.src_map] & 0x0f, xga->accel.plane_mask); - // //pclog("\n"); - //} + // if (xga->accel.pat_src) { + // pclog("[%04X:%08X]: Accel Command = %02x, full = %08x, patwidth = %d, dstwidth = %d, srcwidth = %d, patheight = %d, dstheight = %d, srcheight = %d, px = %d, py = %d, dx = %d, dy = %d, sx = %d, sy = %d, patsrc = %d, dstmap = %d, srcmap = %d, dstbase = %08x, srcbase = %08x, patbase = %08x, dstformat = %x, srcformat = %x, planemask = %08x\n", + // CS, cpu_state.pc, ((xga->accel.command >> 24) & 0x0f), xga->accel.command, xga->accel.px_map_width[xga->accel.pat_src], + // xga->accel.px_map_width[xga->accel.dst_map], xga->accel.px_map_width[xga->accel.src_map], + // xga->accel.px_map_height[xga->accel.pat_src], xga->accel.px_map_height[xga->accel.dst_map], + // xga->accel.px_map_height[xga->accel.src_map], + // xga->accel.pat_map_x, xga->accel.pat_map_y, + // xga->accel.dst_map_x, xga->accel.dst_map_y, + // xga->accel.src_map_x, xga->accel.src_map_y, + // xga->accel.pat_src, xga->accel.dst_map, xga->accel.src_map, + // xga->accel.px_map_base[xga->accel.dst_map], xga->accel.px_map_base[xga->accel.src_map], xga->accel.px_map_base[xga->accel.pat_src], + // xga->accel.px_map_format[xga->accel.dst_map] & 0x0f, xga->accel.px_map_format[xga->accel.src_map] & 0x0f, xga->accel.plane_mask); + // //pclog("\n"); + // } switch ((xga->accel.command >> 24) & 0x0f) { case 3: /*Bresenham Line Draw Read*/ - //pclog("Line Draw Read\n"); + // pclog("Line Draw Read\n"); break; case 4: /*Short Stroke Vectors*/ break; @@ -1869,7 +1848,7 @@ exec_command: xga_bitblt(svga); break; case 9: /*Inverting BitBLT*/ - //pclog("Inverting BitBLT\n"); + // pclog("Inverting BitBLT\n"); break; } } else if (len == 2) { @@ -1901,31 +1880,31 @@ exec_command: static void xga_memio_writeb(uint32_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; xga_mem_write(addr, val, xga, svga, 1); - //pclog("Write MEMIOB = %04x, val = %02x\n", addr & 0x7f, val); + // pclog("Write MEMIOB = %04x, val = %02x\n", addr & 0x7f, val); } static void xga_memio_writew(uint32_t addr, uint16_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; xga_mem_write(addr, val, xga, svga, 2); - //pclog("Write MEMIOW = %04x, val = %04x\n", addr & 0x7f, val); + // pclog("Write MEMIOW = %04x, val = %04x\n", addr & 0x7f, val); } static void xga_memio_writel(uint32_t addr, uint32_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; xga_mem_write(addr, val, xga, svga, 4); - //pclog("Write MEMIOL = %04x, val = %08x\n", addr & 0x7f, val); + // pclog("Write MEMIOL = %04x, val = %08x\n", addr & 0x7f, val); } static uint8_t @@ -2002,35 +1981,35 @@ xga_mem_read(uint32_t addr, xga_t *xga, svga_t *svga) static uint8_t xga_memio_readb(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; uint8_t temp; temp = xga_mem_read(addr, xga, svga); - //pclog("[%04X:%08X]: Read MEMIOB = %04x, temp = %02x\n", CS, cpu_state.pc, addr, temp); + // pclog("[%04X:%08X]: Read MEMIOB = %04x, temp = %02x\n", CS, cpu_state.pc, addr, temp); return temp; } static uint16_t xga_memio_readw(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; uint16_t temp; temp = xga_mem_read(addr, xga, svga); temp |= (xga_mem_read(addr + 1, xga, svga) << 8); - //pclog("[%04X:%08X]: Read MEMIOW = %04x, temp = %04x\n", CS, cpu_state.pc, addr, temp); + // pclog("[%04X:%08X]: Read MEMIOW = %04x, temp = %04x\n", CS, cpu_state.pc, addr, temp); return temp; } static uint32_t xga_memio_readl(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; uint32_t temp; temp = xga_mem_read(addr, xga, svga); @@ -2038,59 +2017,59 @@ xga_memio_readl(uint32_t addr, void *p) temp |= (xga_mem_read(addr + 2, xga, svga) << 16); temp |= (xga_mem_read(addr + 3, xga, svga) << 24); - //pclog("Read MEMIOL = %04x, temp = %08x\n", addr, temp); + // pclog("Read MEMIOL = %04x, temp = %08x\n", addr, temp); return temp; } static void xga_hwcursor_draw(svga_t *svga, int displine) { - xga_t *xga = &svga->xga; - uint8_t dat = 0; - int offset = xga->hwcursor_latch.x - xga->hwcursor_latch.xoff; - int x, x_pos, y_pos; - int comb = 0; + xga_t *xga = &svga->xga; + uint8_t dat = 0; + int offset = xga->hwcursor_latch.x - xga->hwcursor_latch.xoff; + int x, x_pos, y_pos; + int comb = 0; uint32_t *p; - int idx = (xga->cursor_data_on) ? 32 : 0; + int idx = (xga->cursor_data_on) ? 32 : 0; if (xga->interlace && xga->hwcursor_oddeven) - xga->hwcursor_latch.addr += 16; + xga->hwcursor_latch.addr += 16; y_pos = displine; x_pos = offset + svga->x_add; - p = buffer32->line[y_pos]; + p = buffer32->line[y_pos]; for (x = 0; x < xga->hwcursor_latch.cur_xsize; x++) { - if (x >= idx) { - if (!(x & 0x03)) - dat = xga->sprite_data[xga->hwcursor_latch.addr & 0x3ff]; + if (x >= idx) { + if (!(x & 0x03)) + dat = xga->sprite_data[xga->hwcursor_latch.addr & 0x3ff]; - comb = (dat >> ((x & 0x03) << 1)) & 0x03; + comb = (dat >> ((x & 0x03) << 1)) & 0x03; - x_pos = offset + svga->x_add + x; + x_pos = offset + svga->x_add + x; - switch (comb) { - case 0x00: - /* Cursor Color 1 */ - p[x_pos] = xga->hwc_color0; - break; - case 0x01: - /* Cursor Color 2 */ - p[x_pos] = xga->hwc_color1; - break; - case 0x03: - /* Complement */ - p[x_pos] ^= 0xffffff; - break; + switch (comb) { + case 0x00: + /* Cursor Color 1 */ + p[x_pos] = xga->hwc_color0; + break; + case 0x01: + /* Cursor Color 2 */ + p[x_pos] = xga->hwc_color1; + break; + case 0x03: + /* Complement */ + p[x_pos] ^= 0xffffff; + break; + } } - } - if ((x & 0x03) == 0x03) - xga->hwcursor_latch.addr++; + if ((x & 0x03) == 0x03) + xga->hwcursor_latch.addr++; } if (xga->interlace && !xga->hwcursor_oddeven) - xga->hwcursor_latch.addr += 16; + xga->hwcursor_latch.addr += 16; } static void @@ -2099,13 +2078,13 @@ xga_render_overscan_left(xga_t *xga, svga_t *svga) int i; if ((xga->displine + svga->y_add) < 0) - return; + return; if (svga->scrblank || (xga->h_disp == 0)) - return; + return; for (i = 0; i < svga->x_add; i++) - buffer32->line[xga->displine + svga->y_add][i] = svga->overscan_color; + buffer32->line[xga->displine + svga->y_add][i] = svga->overscan_color; } static void @@ -2114,62 +2093,62 @@ xga_render_overscan_right(xga_t *xga, svga_t *svga) int i, right; if ((xga->displine + svga->y_add) < 0) - return; + return; if (svga->scrblank || (xga->h_disp == 0)) - return; + return; right = (overscan_x >> 1); for (i = 0; i < right; i++) - buffer32->line[xga->displine + svga->y_add][svga->x_add + xga->h_disp + i] = svga->overscan_color; + buffer32->line[xga->displine + svga->y_add][svga->x_add + xga->h_disp + i] = svga->overscan_color; } static void xga_render_8bpp(xga_t *xga, svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; + uint32_t dat; if ((xga->displine + svga->y_add) < 0) - return; + return; if (xga->changedvram[xga->ma >> 12] || xga->changedvram[(xga->ma >> 12) + 1] || svga->fullchange) { - p = &buffer32->line[xga->displine + svga->y_add][svga->x_add]; + p = &buffer32->line[xga->displine + svga->y_add][svga->x_add]; - if (xga->firstline_draw == 2000) - xga->firstline_draw = xga->displine; - xga->lastline_draw = xga->displine; + if (xga->firstline_draw == 2000) + xga->firstline_draw = xga->displine; + xga->lastline_draw = xga->displine; - for (x = 0; x <= xga->h_disp; x += 8) { - dat = *(uint32_t *)(&xga->vram[xga->ma & xga->vram_mask]); - p[0] = svga->pallook[dat & 0xff]; - p[1] = svga->pallook[(dat >> 8) & 0xff]; - p[2] = svga->pallook[(dat >> 16) & 0xff]; - p[3] = svga->pallook[(dat >> 24) & 0xff]; + for (x = 0; x <= xga->h_disp; x += 8) { + dat = *(uint32_t *) (&xga->vram[xga->ma & xga->vram_mask]); + p[0] = svga->pallook[dat & 0xff]; + p[1] = svga->pallook[(dat >> 8) & 0xff]; + p[2] = svga->pallook[(dat >> 16) & 0xff]; + p[3] = svga->pallook[(dat >> 24) & 0xff]; - dat = *(uint32_t *)(&xga->vram[(xga->ma + 4) & xga->vram_mask]); - p[4] = svga->pallook[dat & 0xff]; - p[5] = svga->pallook[(dat >> 8) & 0xff]; - p[6] = svga->pallook[(dat >> 16) & 0xff]; - p[7] = svga->pallook[(dat >> 24) & 0xff]; + dat = *(uint32_t *) (&xga->vram[(xga->ma + 4) & xga->vram_mask]); + p[4] = svga->pallook[dat & 0xff]; + p[5] = svga->pallook[(dat >> 8) & 0xff]; + p[6] = svga->pallook[(dat >> 16) & 0xff]; + p[7] = svga->pallook[(dat >> 24) & 0xff]; - xga->ma += 8; - p += 8; - } - xga->ma &= xga->vram_mask; + xga->ma += 8; + p += 8; + } + xga->ma &= xga->vram_mask; } } static void xga_render_16bpp(xga_t *xga, svga_t *svga) { - int x; + int x; uint32_t *p; - uint32_t dat; + uint32_t dat; if ((xga->displine + svga->y_add) < 0) - return; + return; if (xga->changedvram[xga->ma >> 12] || xga->changedvram[(xga->ma >> 12) + 1] || svga->fullchange) { p = &buffer32->line[xga->displine + svga->y_add][svga->x_add]; @@ -2179,19 +2158,19 @@ xga_render_16bpp(xga_t *xga, svga_t *svga) xga->lastline_draw = xga->displine; for (x = 0; x <= (xga->h_disp); x += 8) { - dat = *(uint32_t *)(&xga->vram[(xga->ma + (x << 1)) & xga->vram_mask]); - p[x] = video_16to32[dat & 0xffff]; + dat = *(uint32_t *) (&xga->vram[(xga->ma + (x << 1)) & xga->vram_mask]); + p[x] = video_16to32[dat & 0xffff]; p[x + 1] = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&xga->vram[(xga->ma + (x << 1) + 4) & xga->vram_mask]); + dat = *(uint32_t *) (&xga->vram[(xga->ma + (x << 1) + 4) & xga->vram_mask]); p[x + 2] = video_16to32[dat & 0xffff]; p[x + 3] = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&xga->vram[(xga->ma + (x << 1) + 8) & xga->vram_mask]); + dat = *(uint32_t *) (&xga->vram[(xga->ma + (x << 1) + 8) & xga->vram_mask]); p[x + 4] = video_16to32[dat & 0xffff]; p[x + 5] = video_16to32[dat >> 16]; - dat = *(uint32_t *)(&xga->vram[(xga->ma + (x << 1) + 12) & xga->vram_mask]); + dat = *(uint32_t *) (&xga->vram[(xga->ma + (x << 1) + 12) & xga->vram_mask]); p[x + 6] = video_16to32[dat & 0xffff]; p[x + 7] = video_16to32[dat >> 16]; } @@ -2203,8 +2182,8 @@ xga_render_16bpp(xga_t *xga, svga_t *svga) static void xga_write(uint32_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (!xga->on) { svga_write(addr, val, svga); @@ -2220,20 +2199,20 @@ xga_write(uint32_t addr, uint8_t val, void *p) cycles -= video_timing_write_b; xga->changedvram[(addr & xga->vram_mask) >> 12] = changeframecount; - xga->vram[addr & xga->vram_mask] = val; + xga->vram[addr & xga->vram_mask] = val; } static void xga_writeb(uint32_t addr, uint8_t val, void *p) { - //pclog("[%04X:%08X]: WriteB\n", CS, cpu_state.pc); + // pclog("[%04X:%08X]: WriteB\n", CS, cpu_state.pc); xga_write(addr, val, p); } static void xga_writew(uint32_t addr, uint16_t val, void *p) { - //pclog("[%04X:%08X]: WriteW\n", CS, cpu_state.pc); + // pclog("[%04X:%08X]: WriteW\n", CS, cpu_state.pc); xga_write(addr, val, p); xga_write(addr + 1, val >> 8, p); } @@ -2241,7 +2220,7 @@ xga_writew(uint32_t addr, uint16_t val, void *p) static void xga_writel(uint32_t addr, uint32_t val, void *p) { - //pclog("[%04X:%08X]: WriteL\n", CS, cpu_state.pc); + // pclog("[%04X:%08X]: WriteL\n", CS, cpu_state.pc); xga_write(addr, val, p); xga_write(addr + 1, val >> 8, p); xga_write(addr + 2, val >> 16, p); @@ -2251,8 +2230,8 @@ xga_writel(uint32_t addr, uint32_t val, void *p) static void xga_write_linear(uint32_t addr, uint8_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (!xga->on) { svga_write_linear(addr, val, svga); @@ -2267,14 +2246,14 @@ xga_write_linear(uint32_t addr, uint8_t val, void *p) cycles -= video_timing_write_b; xga->changedvram[(addr & xga->vram_mask) >> 12] = changeframecount; - xga->vram[addr & xga->vram_mask] = val; + xga->vram[addr & xga->vram_mask] = val; } static void xga_writew_linear(uint32_t addr, uint16_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (!xga->on) { svga_writew_linear(addr, val, svga); @@ -2309,8 +2288,8 @@ xga_writew_linear(uint32_t addr, uint16_t val, void *p) static void xga_writel_linear(uint32_t addr, uint32_t val, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (!xga->on) { svga_writel_linear(addr, val, svga); @@ -2326,8 +2305,8 @@ xga_writel_linear(uint32_t addr, uint32_t val, void *p) static uint8_t xga_read(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (!xga->on) return svga_read(addr, svga); @@ -2380,8 +2359,8 @@ xga_readl(uint32_t addr, void *p) static uint8_t xga_read_linear(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (!xga->on) return svga_read_linear(addr, svga); @@ -2399,8 +2378,8 @@ xga_read_linear(uint32_t addr, void *p) static uint16_t xga_readw_linear(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; uint16_t ret; if (!xga->on) @@ -2427,14 +2406,13 @@ xga_readw_linear(uint32_t addr, void *p) static uint32_t xga_readl_linear(uint32_t addr, void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (!xga->on) return svga_readl_linear(addr, svga); - return xga_read_linear(addr, p) | (xga_read_linear(addr + 1, p) << 8) | - (xga_read_linear(addr + 2, p) << 16) | (xga_read_linear(addr + 3, p) << 24); + return xga_read_linear(addr, p) | (xga_read_linear(addr + 1, p) << 8) | (xga_read_linear(addr + 2, p) << 16) | (xga_read_linear(addr + 3, p) << 24); } static void @@ -2451,16 +2429,16 @@ xga_do_render(svga_t *svga) break; } - svga->x_add = (overscan_x >> 1); - xga_render_overscan_left(xga, svga); - xga_render_overscan_right(xga, svga); - svga->x_add = (overscan_x >> 1); + svga->x_add = (overscan_x >> 1); + xga_render_overscan_left(xga, svga); + xga_render_overscan_right(xga, svga); + svga->x_add = (overscan_x >> 1); if (xga->hwcursor_on) { - xga_hwcursor_draw(svga, xga->displine + svga->y_add); - xga->hwcursor_on--; - if (xga->hwcursor_on && xga->interlace) - xga->hwcursor_on--; + xga_hwcursor_draw(svga, xga->displine + svga->y_add); + xga->hwcursor_on--; + if (xga->hwcursor_on && xga->interlace) + xga->hwcursor_on--; } } @@ -2468,160 +2446,158 @@ void xga_poll(xga_t *xga, svga_t *svga) { uint32_t x; - int wx, wy; + int wx, wy; if (!xga->linepos) { - if (xga->displine == xga->hwcursor_latch.y && xga->hwcursor_latch.ena) { - xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - (xga->cursor_data_on ? 32 : 0); - xga->hwcursor_oddeven = 0; - } - - if (xga->displine == (xga->hwcursor_latch.y + 1) && xga->hwcursor_latch.ena && - xga->interlace) { - xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - (xga->cursor_data_on ? 33 : 1); - xga->hwcursor_oddeven = 1; - } - - timer_advance_u64(&svga->timer, svga->dispofftime); - xga->linepos = 1; - - if (xga->dispon) { - xga->h_disp_on = 1; - - xga->ma &= xga->vram_mask; - - if (xga->firstline == 2000) { - xga->firstline = xga->displine; - video_wait_for_buffer(); + if (xga->displine == xga->hwcursor_latch.y && xga->hwcursor_latch.ena) { + xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - (xga->cursor_data_on ? 32 : 0); + xga->hwcursor_oddeven = 0; } - if (xga->hwcursor_on) { - xga->changedvram[xga->ma >> 12] = xga->changedvram[(xga->ma >> 12) + 1] = - xga->interlace ? 3 : 2; + if (xga->displine == (xga->hwcursor_latch.y + 1) && xga->hwcursor_latch.ena && xga->interlace) { + xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - (xga->cursor_data_on ? 33 : 1); + xga->hwcursor_oddeven = 1; } - xga_do_render(svga); + timer_advance_u64(&svga->timer, svga->dispofftime); + xga->linepos = 1; - if (xga->lastline < xga->displine) - xga->lastline = xga->displine; - } + if (xga->dispon) { + xga->h_disp_on = 1; - xga->displine++; - if (xga->interlace) - xga->displine++; - if (xga->displine > 1500) - xga->displine = 0; - } else { - timer_advance_u64(&svga->timer, svga->dispontime); - xga->h_disp_on = 0; + xga->ma &= xga->vram_mask; - xga->linepos = 0; - if (xga->dispon) { - if (xga->sc == xga->rowcount) { - xga->sc = 0; - - if ((xga->disp_cntl_2 & 7) == 4) { - xga->maback += (xga->rowoffset << 4); - if (xga->interlace) - xga->maback += (xga->rowoffset << 4); - } else { - xga->maback += (xga->rowoffset << 3); - if (xga->interlace) - xga->maback += (xga->rowoffset << 3); + if (xga->firstline == 2000) { + xga->firstline = xga->displine; + video_wait_for_buffer(); } - xga->maback &= xga->vram_mask; - xga->ma = xga->maback; - } else { - xga->sc++; - xga->sc &= 0x1f; - xga->ma = xga->maback; + + if (xga->hwcursor_on) { + xga->changedvram[xga->ma >> 12] = xga->changedvram[(xga->ma >> 12) + 1] = xga->interlace ? 3 : 2; + } + + xga_do_render(svga); + + if (xga->lastline < xga->displine) + xga->lastline = xga->displine; } - } - xga->vc++; - xga->vc &= 2047; + xga->displine++; + if (xga->interlace) + xga->displine++; + if (xga->displine > 1500) + xga->displine = 0; + } else { + timer_advance_u64(&svga->timer, svga->dispontime); + xga->h_disp_on = 0; - if (xga->vc == xga->split) { - if (xga->interlace && xga->oddeven) - xga->ma = xga->maback = (xga->rowoffset << 1); - else - xga->ma = xga->maback = 0; - xga->ma = (xga->ma << 2); - xga->maback = (xga->maback << 2); + xga->linepos = 0; + if (xga->dispon) { + if (xga->sc == xga->rowcount) { + xga->sc = 0; - xga->sc = 0; - } - if (xga->vc == xga->dispend) { - xga->dispon = 0; - - for (x = 0; x < ((xga->vram_mask + 1) >> 12); x++) { - if (xga->changedvram[x]) - xga->changedvram[x]--; + if ((xga->disp_cntl_2 & 7) == 4) { + xga->maback += (xga->rowoffset << 4); + if (xga->interlace) + xga->maback += (xga->rowoffset << 4); + } else { + xga->maback += (xga->rowoffset << 3); + if (xga->interlace) + xga->maback += (xga->rowoffset << 3); + } + xga->maback &= xga->vram_mask; + xga->ma = xga->maback; + } else { + xga->sc++; + xga->sc &= 0x1f; + xga->ma = xga->maback; + } } - if (svga->fullchange) - svga->fullchange--; - } - if (xga->vc == xga->v_syncstart) { - xga->dispon = 0; - x = xga->h_disp; - if (xga->interlace && !xga->oddeven) - xga->lastline++; - if (xga->interlace && xga->oddeven) - xga->firstline--; + xga->vc++; + xga->vc &= 2047; - wx = x; + if (xga->vc == xga->split) { + if (xga->interlace && xga->oddeven) + xga->ma = xga->maback = (xga->rowoffset << 1); + else + xga->ma = xga->maback = 0; + xga->ma = (xga->ma << 2); + xga->maback = (xga->maback << 2); - wy = xga->lastline - xga->firstline; - svga_doblit(wx, wy, svga); + xga->sc = 0; + } + if (xga->vc == xga->dispend) { + xga->dispon = 0; - xga->firstline = 2000; - xga->lastline = 0; + for (x = 0; x < ((xga->vram_mask + 1) >> 12); x++) { + if (xga->changedvram[x]) + xga->changedvram[x]--; + } + if (svga->fullchange) + svga->fullchange--; + } + if (xga->vc == xga->v_syncstart) { + xga->dispon = 0; + x = xga->h_disp; - xga->firstline_draw = 2000; - xga->lastline_draw = 0; + if (xga->interlace && !xga->oddeven) + xga->lastline++; + if (xga->interlace && xga->oddeven) + xga->firstline--; - xga->oddeven ^= 1; + wx = x; - changeframecount = xga->interlace ? 3 : 2; + wy = xga->lastline - xga->firstline; + svga_doblit(wx, wy, svga); - if (xga->interlace && xga->oddeven) - xga->ma = xga->maback = xga->ma_latch + (xga->rowoffset << 1); - else - xga->ma = xga->maback = xga->ma_latch; + xga->firstline = 2000; + xga->lastline = 0; - xga->ma = (xga->ma << 2); - xga->maback = (xga->maback << 2); - } - if (xga->vc == xga->v_total) { - xga->vc = 0; - xga->sc = 0; - xga->dispon = 1; - xga->displine = (xga->interlace && xga->oddeven) ? 1 : 0; + xga->firstline_draw = 2000; + xga->lastline_draw = 0; - svga->x_add = (overscan_x >> 1); + xga->oddeven ^= 1; - xga->hwcursor_on = 0; - xga->hwcursor_latch = xga->hwcursor; - } + changeframecount = xga->interlace ? 3 : 2; + + if (xga->interlace && xga->oddeven) + xga->ma = xga->maback = xga->ma_latch + (xga->rowoffset << 1); + else + xga->ma = xga->maback = xga->ma_latch; + + xga->ma = (xga->ma << 2); + xga->maback = (xga->maback << 2); + } + if (xga->vc == xga->v_total) { + xga->vc = 0; + xga->sc = 0; + xga->dispon = 1; + xga->displine = (xga->interlace && xga->oddeven) ? 1 : 0; + + svga->x_add = (overscan_x >> 1); + + xga->hwcursor_on = 0; + xga->hwcursor_latch = xga->hwcursor; + } } } static uint8_t xga_mca_read(int port, void *priv) { - svga_t *svga = (svga_t *)priv; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) priv; + xga_t *xga = &svga->xga; - //pclog("[%04X:%08X]: POS Read Port = %x, val = %02x\n", CS, cpu_state.pc, port & 7, xga->pos_regs[port & 7]); + // pclog("[%04X:%08X]: POS Read Port = %x, val = %02x\n", CS, cpu_state.pc, port & 7, xga->pos_regs[port & 7]); return (xga->pos_regs[port & 7]); } static void xga_mca_write(int port, uint8_t val, void *priv) { - svga_t *svga = (svga_t *)priv; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) priv; + xga_t *xga = &svga->xga; /* MCA does not write registers below 0x0100. */ if (port < 0x0102) @@ -2631,32 +2607,35 @@ xga_mca_write(int port, uint8_t val, void *priv) mem_mapping_disable(&xga->bios_rom.mapping); mem_mapping_disable(&xga->memio_mapping); xga->on = 0; - vga_on = 1; + vga_on = 1; /* Save the MCA register value. */ xga->pos_regs[port & 7] = val; if (!(xga->pos_regs[4] & 1)) /*MCA 4MB addressing on systems with more than 16MB of memory*/ xga->pos_regs[4] |= 1; - //pclog("[%04X:%08X]: POS Write Port = %x, val = %02x, linear base = %08x, instance = %d, rom addr = %05x\n", CS, cpu_state.pc, port & 7, val, xga->linear_base, xga->instance, xga->rom_addr); if (xga->pos_regs[2] & 1) { - xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; + xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; xga->base_addr_1mb = (xga->pos_regs[5] & 0x0f) << 20; - xga->linear_base = ((xga->pos_regs[4] & 0xfe) * 0x1000000) + (xga->instance << 22); - xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); + xga->linear_base = ((xga->pos_regs[4] & 0xfe) * 0x1000000) + (xga->instance << 22); + xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); io_sethandler(0x2100 + (xga->instance << 4), 0x0010, xga_ext_inb, NULL, NULL, xga_ext_outb, NULL, NULL, svga); - if ((port & 7) == 2) + + if (xga->pos_regs[3] & 1) { mem_mapping_set_addr(&xga->bios_rom.mapping, xga->rom_addr, 0x2000); - mem_mapping_set_addr(&xga->memio_mapping, xga->rom_addr + 0x1c00 + (xga->instance * 0x80), 0x80); + } else { + mem_mapping_set_addr(&xga->memio_mapping, xga->rom_addr + 0x1c00 + (xga->instance * 0x80), 0x80); + } } + // pclog("[%04X:%08X]: POS Write Port = %x, val = %02x, linear base = %08x, instance = %d, rom addr = %05x\n", CS, cpu_state.pc, port & 7, val, xga->linear_base, xga->instance, xga->rom_addr); } static uint8_t xga_mca_feedb(void *priv) { - svga_t *svga = (svga_t *)priv; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) priv; + xga_t *xga = &svga->xga; return xga->pos_regs[2] & 1; } @@ -2664,7 +2643,7 @@ xga_mca_feedb(void *priv) static void xga_mca_reset(void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; xga_mca_write(0x102, 0, svga); } @@ -2672,47 +2651,48 @@ xga_mca_reset(void *p) static uint8_t xga_pos_in(uint16_t addr, void *priv) { - svga_t *svga = (svga_t *)priv; + svga_t *svga = (svga_t *) priv; return (xga_mca_read(addr, svga)); } static void -*xga_init(const device_t *info) + * + xga_init(const device_t *info) { - svga_t *svga = svga_get_pri(); - xga_t *xga = &svga->xga; - FILE *f; + svga_t *svga = svga_get_pri(); + xga_t *xga = &svga->xga; + FILE *f; uint32_t temp; uint32_t initial_bios_addr = device_get_config_hex20("init_bios_addr"); - uint8_t *rom = NULL; + uint8_t *rom = NULL; xga->type = device_get_config_int("type"); - xga->bus = info->flags; + xga->bus = info->flags; - xga->vram_size = (1024 << 10); - xga->vram_mask = xga->vram_size - 1; - xga->vram = calloc(xga->vram_size, 1); - xga->changedvram = calloc(xga->vram_size >> 12, 1); - xga->on = 0; - xga->hwcursor.cur_xsize = 64; - xga->hwcursor.cur_ysize = 64; - xga->bios_rom.sz = 0x2000; + xga->vram_size = (1024 << 10); + xga->vram_mask = xga->vram_size - 1; + xga->vram = calloc(xga->vram_size, 1); + xga->changedvram = calloc(xga->vram_size >> 12, 1); + xga->on = 0; + xga->hwcursor.cur_xsize = 64; + xga->hwcursor.cur_ysize = 64; + xga->bios_rom.sz = 0x2000; xga->linear_endian_reverse = 0; - xga->a5_test = 0; + xga->a5_test = 0; f = rom_fopen(xga->type ? XGA2_BIOS_PATH : XGA_BIOS_PATH, "rb"); - (void)fseek(f, 0L, SEEK_END); + (void) fseek(f, 0L, SEEK_END); temp = ftell(f); - (void)fseek(f, 0L, SEEK_SET); + (void) fseek(f, 0L, SEEK_SET); rom = malloc(xga->bios_rom.sz); memset(rom, 0xff, xga->bios_rom.sz); - (void)fread(rom, xga->bios_rom.sz, 1, f); + (void) fread(rom, xga->bios_rom.sz, 1, f); temp -= xga->bios_rom.sz; - (void)fclose(f); + (void) fclose(f); - xga->bios_rom.rom = rom; + xga->bios_rom.rom = rom; xga->bios_rom.mask = xga->bios_rom.sz - 1; if (f != NULL) { free(rom); @@ -2721,25 +2701,25 @@ static void xga->base_addr_1mb = 0; if (info->flags & DEVICE_MCA) { xga->linear_base = 0; - xga->instance = 0; - xga->rom_addr = 0; + xga->instance = 0; + xga->rom_addr = 0; rom_init(&xga->bios_rom, xga->type ? XGA2_BIOS_PATH : XGA_BIOS_PATH, initial_bios_addr, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); } else { xga->pos_regs[2] = 1 | 0x0c | 0xf0; - xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; + xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; xga->pos_regs[4] = 1 | 2; xga->linear_base = ((xga->pos_regs[4] & 0xfe) * 0x1000000) + (xga->instance << 22); - xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); + xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); } mem_mapping_add(&xga->video_mapping, 0, 0, xga_readb, xga_readw, xga_readl, xga_writeb, xga_writew, xga_writel, NULL, MEM_MAPPING_EXTERNAL, svga); - mem_mapping_add(&xga->linear_mapping, 0, 0, xga_read_linear, xga_readw_linear, xga_readl_linear, + mem_mapping_add(&xga->linear_mapping, 0, 0, xga_read_linear, xga_readw_linear, xga_readl_linear, xga_write_linear, xga_writew_linear, xga_writel_linear, - NULL, MEM_MAPPING_EXTERNAL, svga); + NULL, MEM_MAPPING_EXTERNAL, svga); mem_mapping_add(&xga->memio_mapping, 0, 0, xga_memio_readb, xga_memio_readw, xga_memio_readl, - xga_memio_writeb, xga_memio_writew, xga_memio_writel, + xga_memio_writeb, xga_memio_writew, xga_memio_writel, xga->bios_rom.rom, MEM_MAPPING_EXTERNAL, svga); mem_mapping_disable(&xga->video_mapping); @@ -2763,8 +2743,8 @@ static void static void xga_close(void *p) { - svga_t *svga = (svga_t *)p; - xga_t *xga = &svga->xga; + svga_t *svga = (svga_t *) p; + xga_t *xga = &svga->xga; if (svga) { free(xga->vram); @@ -2781,7 +2761,7 @@ xga_available(void) static void xga_speed_changed(void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; svga_recalctimings(svga); } @@ -2789,13 +2769,13 @@ xga_speed_changed(void *p) static void xga_force_redraw(void *p) { - svga_t *svga = (svga_t *)p; + svga_t *svga = (svga_t *) p; svga->fullchange = changeframecount; } static const device_config_t xga_configuration[] = { - // clang-format off + // clang-format off { .name = "init_bios_addr", .description = "Initial MCA BIOS Address (before POS configuration)", @@ -2836,35 +2816,35 @@ static const device_config_t xga_configuration[] = { } }, { .name = "", .description = "", .type = CONFIG_END } - // clang-format on +// clang-format on }; const device_t xga_device = { - .name = "XGA (MCA)", + .name = "XGA (MCA)", .internal_name = "xga_mca", - .flags = DEVICE_MCA, - .local = 0, - .init = xga_init, - .close = xga_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = 0, + .init = xga_init, + .close = xga_close, + .reset = NULL, { .available = xga_available }, .speed_changed = xga_speed_changed, - .force_redraw = xga_force_redraw, - .config = xga_configuration + .force_redraw = xga_force_redraw, + .config = xga_configuration }; const device_t xga_isa_device = { - .name = "XGA (ISA)", + .name = "XGA (ISA)", .internal_name = "xga_isa", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 0, - .init = xga_init, - .close = xga_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 0, + .init = xga_init, + .close = xga_close, + .reset = NULL, { .available = xga_available }, .speed_changed = xga_speed_changed, - .force_redraw = xga_force_redraw, - .config = xga_configuration + .force_redraw = xga_force_redraw, + .config = xga_configuration }; void From 3a77be3820f1077052f0856ef5611b1fee319b1d Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 6 Sep 2022 23:48:10 +0200 Subject: [PATCH 342/386] Clang-format fixes... --- src/video/vid_xga.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index e41430c86..b83d6467d 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -14,26 +14,26 @@ * * Copyright 2022 TheCollector1995. */ -#include "cpu.h" -#include <86box/86box.h> +#include +#include +#include +#include +#include #include <86box/bswap.h> -#include <86box/device.h> -#include <86box/dma.h> +#include <86box/86box.h> #include <86box/io.h> #include <86box/machine.h> -#include <86box/mca.h> #include <86box/mem.h> +#include <86box/dma.h> #include <86box/rom.h> +#include <86box/mca.h> +#include <86box/device.h> #include <86box/timer.h> +#include <86box/video.h> #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> #include <86box/vid_xga_device.h> -#include <86box/video.h> -#include -#include -#include -#include -#include +#include "cpu.h" #define XGA_BIOS_PATH "roms/video/xga/XGA_37F9576_Ver200.BIN" #define XGA2_BIOS_PATH "roms/video/xga/xga2_v300.bin" From 3d7fdf0eda0a8dd0f318e29974319ffe3a3f88a0 Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Thu, 8 Sep 2022 11:19:37 -0400 Subject: [PATCH 343/386] qt: Fix searching for icon packs in roms dir --- src/qt/qt_progsettings.cpp | 37 ++++++++++++++++++++----------------- 1 file changed, 20 insertions(+), 17 deletions(-) diff --git a/src/qt/qt_progsettings.cpp b/src/qt/qt_progsettings.cpp index 0b4f0e955..dcfdbab85 100644 --- a/src/qt/qt_progsettings.cpp +++ b/src/qt/qt_progsettings.cpp @@ -33,6 +33,8 @@ extern "C" #include <86box/version.h> #include <86box/config.h> #include <86box/plat.h> +#include <86box/mem.h> +#include <86box/rom.h> } @@ -43,24 +45,25 @@ ProgSettings::CustomTranslator* ProgSettings::translator = nullptr; QTranslator* ProgSettings::qtTranslator = nullptr; QString ProgSettings::getIconSetPath() { - QString roms_root; - if (rom_path[0]) - roms_root = rom_path; - else { - roms_root = QString("%1/roms").arg(exe_path); - } - - if (iconset_to_qt.isEmpty()) - { + if (iconset_to_qt.isEmpty()) { + QVector roms_dirs; + // Walk rom_paths to get the candidates + for (rom_path_t *emu_rom_path = &rom_paths; emu_rom_path != nullptr; emu_rom_path = emu_rom_path->next) { + roms_dirs.append(QFileInfo(emu_rom_path->path)); + } + // Always include default bundled icons iconset_to_qt.insert("", ":/settings/win/icons"); - QDir dir(roms_root + "/icons/"); - if (dir.isReadable()) - { - auto dirList = dir.entryList(QDir::AllDirs | QDir::Executable | QDir::Readable); - for (auto &curIconSet : dirList) - { - if (curIconSet == "." || curIconSet == "..") continue; - iconset_to_qt.insert(curIconSet, (dir.canonicalPath() + '/') + curIconSet); + for (auto &checked_dir : roms_dirs) { + // Check for icons subdir in each candidate + QDir roms_icons_dir(checked_dir.filePath() + "/icons"); + if (roms_icons_dir.isReadable()) { + auto dirList = roms_icons_dir.entryList(QDir::AllDirs | QDir::Executable | QDir::Readable); + for (auto &curIconSet : dirList) { + if (curIconSet == "." || curIconSet == "..") { + continue; + } + iconset_to_qt.insert(curIconSet, (roms_icons_dir.canonicalPath() + '/') + curIconSet); + } } } } From 2cdc63e83aed5da8e0d96ce275a55d2de0a34529 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sat, 10 Sep 2022 14:53:00 +0600 Subject: [PATCH 344/386] 808x: Switch to __builtin_parity for parity flag setting --- src/cpu/808x.c | 20 +------------------- 1 file changed, 1 insertion(+), 19 deletions(-) diff --git a/src/cpu/808x.c b/src/cpu/808x.c index 96b184bc4..219bb4b67 100644 --- a/src/cpu/808x.c +++ b/src/cpu/808x.c @@ -1310,25 +1310,7 @@ set_sf(int bits) static void set_pf(void) { - static uint8_t table[0x100] = { - 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4, - 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0, - 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0, - 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4, - 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0, - 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4, - 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4, - 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0, - 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0, - 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4, - 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4, - 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0, - 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4, - 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0, - 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0, - 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4}; - - cpu_state.flags = (cpu_state.flags & ~4) | table[cpu_data & 0xff]; + cpu_state.flags = (cpu_state.flags & ~4) | (!__builtin_parity(cpu_data & 0xFF) << 2); } From 7dd8c96ffc34ccd8e80681caa219800da2f0d77c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20Hrdli=C4=8Dka?= Date: Sat, 10 Sep 2022 13:32:46 +0200 Subject: [PATCH 345/386] config: Refactor the INI parser out --- src/CMakeLists.txt | 2 +- src/config.c | 1802 +++++++++++------------------------- src/device.c | 1 + src/include/86box/config.h | 44 +- src/include/86box/ini.h | 81 ++ src/ini.c | 795 ++++++++++++++++ src/network/net_slirp.c | 1 + src/qt/qt_deviceconfig.cpp | 1 + src/sound/midi_rtmidi.cpp | 1 + 9 files changed, 1446 insertions(+), 1282 deletions(-) create mode 100644 src/include/86box/ini.h create mode 100644 src/ini.c diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 01de9a473..18302d6fe 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -20,7 +20,7 @@ endif() add_executable(86Box 86box.c config.c log.c random.c timer.c io.c acpi.c apm.c dma.c ddma.c discord.c nmi.c pic.c pit.c pit_fast.c port_6x.c port_92.c ppi.c pci.c - mca.c usb.c fifo8.c device.c nvr.c nvr_at.c nvr_ps2.c machine_status.c) + mca.c usb.c fifo8.c device.c nvr.c nvr_at.c nvr_ps2.c machine_status.c ini.c) if(CMAKE_SYSTEM_NAME MATCHES "Linux") add_compile_definitions(_FILE_OFFSET_BITS=64 _LARGEFILE_SOURCE=1 _LARGEFILE64_SOURCE=1) diff --git a/src/config.c b/src/config.c index 0cc782854..01710ebc4 100644 --- a/src/config.c +++ b/src/config.c @@ -41,6 +41,7 @@ #include <86box/cassette.h> #include <86box/cartridge.h> #include <86box/nvr.h> +#include <86box/ini.h> #include <86box/config.h> #include <86box/isamem.h> #include <86box/isartc.h> @@ -74,53 +75,7 @@ static int cx, cy, cw, ch; - - -typedef struct _list_ { - struct _list_ *next; -} list_t; - -typedef struct { - list_t list; - - char name[128]; - - list_t entry_head; -} section_t; - -typedef struct { - list_t list; - - char name[128]; - char data[512]; - wchar_t wdata[512]; -} entry_t; - -#define list_add(new, head) \ - { \ - list_t *next = head; \ - \ - while (next->next != NULL) \ - next = next->next; \ - \ - (next)->next = new; \ - (new)->next = NULL; \ - } - -#define list_delete(old, head) \ - { \ - list_t *next = head; \ - \ - while ((next)->next != old) { \ - next = (next)->next; \ - } \ - \ - (next)->next = (old)->next; \ - if ((next) == (head)) \ - (head)->next = (old)->next; \ - } - -static list_t config_head; +static ini_t config; /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ static int backwards_compat = 0; @@ -144,432 +99,55 @@ config_log(const char *fmt, ...) # define config_log(fmt, ...) #endif -static section_t * -find_section(char *name) -{ - section_t *sec; - char blank[] = ""; - - sec = (section_t *) config_head.next; - if (name == NULL) - name = blank; - - while (sec != NULL) { - if (!strncmp(sec->name, name, sizeof(sec->name))) - return (sec); - - sec = (section_t *) sec->list.next; - } - - return (NULL); -} - -void * -config_find_section(char *name) -{ - return (void *) find_section(name); -} - -void -config_rename_section(void *priv, char *name) -{ - section_t *sec = (section_t *) priv; - - memset(sec->name, 0x00, sizeof(sec->name)); - memcpy(sec->name, name, MIN(128, strlen(name) + 1)); -} - -static entry_t * -find_entry(section_t *section, char *name) -{ - entry_t *ent; - - ent = (entry_t *) section->entry_head.next; - - while (ent != NULL) { - if (!strncmp(ent->name, name, sizeof(ent->name))) - return (ent); - - ent = (entry_t *) ent->list.next; - } - - return (NULL); -} - -static int -entries_num(section_t *section) -{ - entry_t *ent; - int i = 0; - - ent = (entry_t *) section->entry_head.next; - - while (ent != NULL) { - if (strlen(ent->name) > 0) - i++; - - ent = (entry_t *) ent->list.next; - } - - return (i); -} - -static void -delete_section_if_empty(char *head) -{ - section_t *section; - - section = find_section(head); - if (section == NULL) - return; - - if (entries_num(section) == 0) { - list_delete(§ion->list, &config_head); - free(section); - } -} - -static section_t * -create_section(char *name) -{ - section_t *ns = malloc(sizeof(section_t)); - - memset(ns, 0x00, sizeof(section_t)); - memcpy(ns->name, name, strlen(name) + 1); - list_add(&ns->list, &config_head); - - return (ns); -} - -static entry_t * -create_entry(section_t *section, char *name) -{ - entry_t *ne = malloc(sizeof(entry_t)); - - memset(ne, 0x00, sizeof(entry_t)); - memcpy(ne->name, name, strlen(name) + 1); - list_add(&ne->list, §ion->entry_head); - - return (ne); -} - -#if 0 -static void -config_free(void) -{ - section_t *sec, *ns; - entry_t *ent; - - sec = (section_t *)config_head.next; - while (sec != NULL) { - ns = (section_t *)sec->list.next; - ent = (entry_t *)sec->entry_head.next; - - while (ent != NULL) { - entry_t *nent = (entry_t *)ent->list.next; - - free(ent); - ent = nent; - } - - free(sec); - sec = ns; - } -} -#endif - -static int -config_detect_bom(char *fn) -{ - FILE *f; - unsigned char bom[4] = { 0, 0, 0, 0 }; - -#if defined(ANSI_CFG) || !defined(_WIN32) - f = plat_fopen(fn, "rt"); -#else - f = plat_fopen(fn, "rt, ccs=UTF-8"); -#endif - if (f == NULL) - return (0); - (void) !fread(bom, 1, 3, f); - if (bom[0] == 0xEF && bom[1] == 0xBB && bom[2] == 0xBF) { - fclose(f); - return 1; - } - fclose(f); - return 0; -} - -#ifdef __HAIKU__ -/* Local version of fgetws to avoid a crash */ -static wchar_t * -config_fgetws(wchar_t *str, int count, FILE *stream) -{ - int i = 0; - if (feof(stream)) - return NULL; - for (i = 0; i < count; i++) { - wint_t curChar = fgetwc(stream); - if (curChar == WEOF) { - if (i + 1 < count) - str[i + 1] = 0; - return feof(stream) ? str : NULL; - } - str[i] = curChar; - if (curChar == '\n') - break; - } - if (i + 1 < count) - str[i + 1] = 0; - return str; -} -#endif - -/* Read and parse the configuration file into memory. */ -static int -config_read(char *fn) -{ - char sname[128], ename[128]; - wchar_t buff[1024]; - section_t *sec, *ns; - entry_t *ne; - int c, d, bom; - FILE *f; - - bom = config_detect_bom(fn); -#if defined(ANSI_CFG) || !defined(_WIN32) - f = plat_fopen(fn, "rt"); -#else - f = plat_fopen(fn, "rt, ccs=UTF-8"); -#endif - if (f == NULL) - return (0); - - sec = malloc(sizeof(section_t)); - memset(sec, 0x00, sizeof(section_t)); - memset(&config_head, 0x00, sizeof(list_t)); - list_add(&sec->list, &config_head); - if (bom) - fseek(f, 3, SEEK_SET); - - while (1) { - memset(buff, 0x00, sizeof(buff)); -#ifdef __HAIKU__ - config_fgetws(buff, sizeof_w(buff), f); -#else - (void) !fgetws(buff, sizeof_w(buff), f); -#endif - if (feof(f)) - break; - - /* Make sure there are no stray newlines or hard-returns in there. */ - if (wcslen(buff) > 0) - if (buff[wcslen(buff) - 1] == L'\n') - buff[wcslen(buff) - 1] = L'\0'; - if (wcslen(buff) > 0) - if (buff[wcslen(buff) - 1] == L'\r') - buff[wcslen(buff) - 1] = L'\0'; - - /* Skip any leading whitespace. */ - c = 0; - while ((buff[c] == L' ') || (buff[c] == L'\t')) - c++; - - /* Skip empty lines. */ - if (buff[c] == L'\0') - continue; - - /* Skip lines that (only) have a comment. */ - if ((buff[c] == L'#') || (buff[c] == L';')) - continue; - - if (buff[c] == L'[') { /*Section*/ - c++; - d = 0; - while (buff[c] != L']' && buff[c]) - (void) !wctomb(&(sname[d++]), buff[c++]); - sname[d] = L'\0'; - - /* Is the section name properly terminated? */ - if (buff[c] != L']') - continue; - - /* Create a new section and insert it. */ - ns = malloc(sizeof(section_t)); - memset(ns, 0x00, sizeof(section_t)); - memcpy(ns->name, sname, 128); - list_add(&ns->list, &config_head); - - /* New section is now the current one. */ - sec = ns; - continue; - } - - /* Get the variable name. */ - d = 0; - while ((buff[c] != L'=') && (buff[c] != L' ') && buff[c]) - (void) !wctomb(&(ename[d++]), buff[c++]); - ename[d] = L'\0'; - - /* Skip incomplete lines. */ - if (buff[c] == L'\0') - continue; - - /* Look for =, skip whitespace. */ - while ((buff[c] == L'=' || buff[c] == L' ') && buff[c]) - c++; - - /* Skip incomplete lines. */ - if (buff[c] == L'\0') - continue; - - /* This is where the value part starts. */ - d = c; - - /* Allocate a new variable entry.. */ - ne = malloc(sizeof(entry_t)); - memset(ne, 0x00, sizeof(entry_t)); - memcpy(ne->name, ename, 128); - wcsncpy(ne->wdata, &buff[d], sizeof_w(ne->wdata) - 1); - ne->wdata[sizeof_w(ne->wdata) - 1] = L'\0'; -#ifdef _WIN32 /* Make sure the string is converted to UTF-8 rather than a legacy codepage */ - c16stombs(ne->data, ne->wdata, sizeof(ne->data)); -#else - wcstombs(ne->data, ne->wdata, sizeof(ne->data)); -#endif - ne->data[sizeof(ne->data) - 1] = '\0'; - - /* .. and insert it. */ - list_add(&ne->list, &sec->entry_head); - } - - (void) fclose(f); - - if (do_dump_config) - config_dump(); - - return (1); -} - -/* - * Write the in-memory configuration to disk. - * This is a public function, because the Settings UI - * want to directly write the configuration after it - * has changed it. - */ -void -config_write(char *fn) -{ - wchar_t wtemp[512]; - section_t *sec; - FILE *f; - int fl = 0; - -#if defined(ANSI_CFG) || !defined(_WIN32) - f = plat_fopen(fn, "wt"); -#else - f = plat_fopen(fn, "wt, ccs=UTF-8"); -#endif - if (f == NULL) - return; - - sec = (section_t *) config_head.next; - while (sec != NULL) { - entry_t *ent; - - if (sec->name[0]) { - mbstowcs(wtemp, sec->name, strlen(sec->name) + 1); - if (fl) - fwprintf(f, L"\n[%ls]\n", wtemp); - else - fwprintf(f, L"[%ls]\n", wtemp); - fl++; - } - - ent = (entry_t *) sec->entry_head.next; - while (ent != NULL) { - if (ent->name[0] != '\0') { - mbstowcs(wtemp, ent->name, 128); - if (ent->wdata[0] == L'\0') - fwprintf(f, L"%ls = \n", wtemp); - else - fwprintf(f, L"%ls = %ls\n", wtemp, ent->wdata); - fl++; - } - - ent = (entry_t *) ent->list.next; - } - - sec = (section_t *) sec->list.next; - } - - (void) fclose(f); -} - -#if NOT_USED -static void -config_new(void) -{ -# if defined(ANSI_CFG) || !defined(_WIN32) - FILE *f = _wfopen(config_file, L"wt"); -# else - FILE *f = _wfopen(config_file, L"wt, ccs=UTF-8"); -# endif - - if (file != NULL) - (void) fclose(f); -} -#endif - /* Load "General" section. */ static void load_general(void) { - char *cat = "General"; + ini_section_t cat = ini_find_section(config, "General"); char temp[512]; char *p; - vid_resize = config_get_int(cat, "vid_resize", 0); + vid_resize = ini_section_get_int(cat, "vid_resize", 0); if (vid_resize & ~3) vid_resize &= 3; memset(temp, '\0', sizeof(temp)); - p = config_get_string(cat, "vid_renderer", "default"); + p = ini_section_get_string(cat, "vid_renderer", "default"); vid_api = plat_vidapi(p); - config_delete_var(cat, "vid_api"); + ini_section_delete_var(cat, "vid_api"); - video_fullscreen_scale = config_get_int(cat, "video_fullscreen_scale", 0); + video_fullscreen_scale = ini_section_get_int(cat, "video_fullscreen_scale", 0); - video_fullscreen_first = config_get_int(cat, "video_fullscreen_first", 1); + video_fullscreen_first = ini_section_get_int(cat, "video_fullscreen_first", 1); - video_filter_method = config_get_int(cat, "video_filter_method", 1); + video_filter_method = ini_section_get_int(cat, "video_filter_method", 1); - force_43 = !!config_get_int(cat, "force_43", 0); - scale = config_get_int(cat, "scale", 1); + force_43 = !!ini_section_get_int(cat, "force_43", 0); + scale = ini_section_get_int(cat, "scale", 1); if (scale > 3) scale = 3; - dpi_scale = config_get_int(cat, "dpi_scale", 1); + dpi_scale = ini_section_get_int(cat, "dpi_scale", 1); - enable_overscan = !!config_get_int(cat, "enable_overscan", 0); - vid_cga_contrast = !!config_get_int(cat, "vid_cga_contrast", 0); - video_grayscale = config_get_int(cat, "video_grayscale", 0); - video_graytype = config_get_int(cat, "video_graytype", 0); + enable_overscan = !!ini_section_get_int(cat, "enable_overscan", 0); + vid_cga_contrast = !!ini_section_get_int(cat, "vid_cga_contrast", 0); + video_grayscale = ini_section_get_int(cat, "video_grayscale", 0); + video_graytype = ini_section_get_int(cat, "video_graytype", 0); - rctrl_is_lalt = config_get_int(cat, "rctrl_is_lalt", 0); - update_icons = config_get_int(cat, "update_icons", 1); + rctrl_is_lalt = ini_section_get_int(cat, "rctrl_is_lalt", 0); + update_icons = ini_section_get_int(cat, "update_icons", 1); - window_remember = config_get_int(cat, "window_remember", 0); + window_remember = ini_section_get_int(cat, "window_remember", 0); if (window_remember || (vid_resize & 2)) { if (!window_remember) - config_delete_var(cat, "window_remember"); + ini_section_delete_var(cat, "window_remember"); } else { - config_delete_var(cat, "window_remember"); + ini_section_delete_var(cat, "window_remember"); window_w = window_h = window_x = window_y = 0; } if (vid_resize & 2) { - p = config_get_string(cat, "window_fixed_res", NULL); + p = ini_section_get_string(cat, "window_fixed_res", NULL); if (p == NULL) p = "120x120"; sscanf(p, "%ix%i", &fixed_size_x, &fixed_size_y); @@ -582,70 +160,73 @@ load_general(void) if (fixed_size_y > 2048) fixed_size_y = 2048; } else { - config_delete_var(cat, "window_fixed_res"); + ini_section_delete_var(cat, "window_fixed_res"); fixed_size_x = fixed_size_y = 120; } - sound_gain = config_get_int(cat, "sound_gain", 0); + sound_gain = ini_section_get_int(cat, "sound_gain", 0); - kbd_req_capture = config_get_int(cat, "kbd_req_capture", 0); - hide_status_bar = config_get_int(cat, "hide_status_bar", 0); - hide_tool_bar = config_get_int(cat, "hide_tool_bar", 0); + kbd_req_capture = ini_section_get_int(cat, "kbd_req_capture", 0); + hide_status_bar = ini_section_get_int(cat, "hide_status_bar", 0); + hide_tool_bar = ini_section_get_int(cat, "hide_tool_bar", 0); - confirm_reset = config_get_int(cat, "confirm_reset", 1); - confirm_exit = config_get_int(cat, "confirm_exit", 1); - confirm_save = config_get_int(cat, "confirm_save", 1); + confirm_reset = ini_section_get_int(cat, "confirm_reset", 1); + confirm_exit = ini_section_get_int(cat, "confirm_exit", 1); + confirm_save = ini_section_get_int(cat, "confirm_save", 1); - p = config_get_string(cat, "language", NULL); + p = ini_section_get_string(cat, "language", NULL); if (p != NULL) lang_id = plat_language_code(p); - mouse_sensitivity = config_get_double(cat, "mouse_sensitivity", 1.0); + mouse_sensitivity = ini_section_get_double(cat, "mouse_sensitivity", 1.0); if (mouse_sensitivity < 0.5) mouse_sensitivity = 0.5; else if (mouse_sensitivity > 2.0) mouse_sensitivity = 2.0; - p = config_get_string(cat, "iconset", NULL); + p = ini_section_get_string(cat, "iconset", NULL); if (p != NULL) strcpy(icon_set, p); else strcpy(icon_set, ""); - enable_discord = !!config_get_int(cat, "enable_discord", 0); + enable_discord = !!ini_section_get_int(cat, "enable_discord", 0); - open_dir_usr_path = config_get_int(cat, "open_dir_usr_path", 0); + open_dir_usr_path = ini_section_get_int(cat, "open_dir_usr_path", 0); - video_framerate = config_get_int(cat, "video_gl_framerate", -1); - video_vsync = config_get_int(cat, "video_gl_vsync", 0); - strncpy(video_shader, config_get_string(cat, "video_gl_shader", ""), sizeof(video_shader)); + video_framerate = ini_section_get_int(cat, "video_gl_framerate", -1); + video_vsync = ini_section_get_int(cat, "video_gl_vsync", 0); + strncpy(video_shader, ini_section_get_string(cat, "video_gl_shader", ""), sizeof(video_shader)); - window_remember = config_get_int(cat, "window_remember", 0); + window_remember = ini_section_get_int(cat, "window_remember", 0); if (window_remember) { - p = config_get_string(cat, "window_coordinates", NULL); + p = ini_section_get_string(cat, "window_coordinates", NULL); if (p == NULL) p = "0, 0, 0, 0"; sscanf(p, "%i, %i, %i, %i", &cw, &ch, &cx, &cy); } else { cw = ch = cx = cy = 0; - config_delete_var(cat, "window_remember"); + ini_section_delete_var(cat, "window_remember"); } - config_delete_var(cat, "window_coordinates"); + ini_section_delete_var(cat, "window_coordinates"); } /* Load monitor section. */ static void load_monitor(int monitor_index) { - char cat[512], temp[512]; + ini_section_t cat; + char name[512], temp[512]; char *p = NULL; - sprintf(cat, "Monitor #%i", monitor_index + 1); + sprintf(name, "Monitor #%i", monitor_index + 1); sprintf(temp, "%i, %i, %i, %i", cx, cy, cw, ch); - p = config_get_string(cat, "window_coordinates", NULL); + cat = ini_find_section(config, name); + + p = ini_section_get_string(cat, "window_coordinates", NULL); if (p == NULL) p = temp; @@ -654,7 +235,7 @@ load_monitor(int monitor_index) sscanf(p, "%i, %i, %i, %i", &monitor_settings[monitor_index].mon_window_x, &monitor_settings[monitor_index].mon_window_y, &monitor_settings[monitor_index].mon_window_w, &monitor_settings[monitor_index].mon_window_h); - monitor_settings[monitor_index].mon_window_maximized = !!config_get_int(cat, "window_maximized", 0); + monitor_settings[monitor_index].mon_window_maximized = !!ini_section_get_int(cat, "window_maximized", 0); } else { monitor_settings[monitor_index].mon_window_maximized = 0; } @@ -664,12 +245,12 @@ load_monitor(int monitor_index) static void load_machine(void) { - char *cat = "Machine"; + ini_section_t cat = ini_find_section(config, "Machine"); char *p, *migrate_from = NULL; int c, i, j, speed, legacy_mfg, legacy_cpu; double multi; - p = config_get_string(cat, "machine", NULL); + p = ini_section_get_string(cat, "machine", NULL); if (p != NULL) { migrate_from = p; if (!strcmp(p, "8500ttc")) /* migrate typo... */ @@ -754,7 +335,7 @@ load_machine(void) machine = 0; /* This is for backwards compatibility. */ - p = config_get_string(cat, "model", NULL); + p = ini_section_get_string(cat, "model", NULL); if (p != NULL) { migrate_from = p; if (!strcmp(p, "p55r2p4")) /* migrate typo */ @@ -763,7 +344,7 @@ load_machine(void) machine = machine_get_machine_from_internal_name(p); migrate_from = NULL; } - config_delete_var(cat, "model"); + ini_section_delete_var(cat, "model"); } if (machine >= machine_count()) machine = machine_count() - 1; @@ -808,9 +389,9 @@ load_machine(void) } } - cpu_override = config_get_int(cat, "cpu_override", 0); + cpu_override = ini_section_get_int(cat, "cpu_override", 0); cpu_f = NULL; - p = config_get_string(cat, "cpu_family", NULL); + p = ini_section_get_string(cat, "cpu_family", NULL); if (p) { if (!strcmp(p, "enh_am486dx2")) /* migrate modified names */ cpu_f = cpu_get_family("am486dx2_slenh"); @@ -823,8 +404,8 @@ load_machine(void) cpu_f = NULL; } else { /* Backwards compatibility with the previous CPU model system. */ - legacy_mfg = config_get_int(cat, "cpu_manufacturer", 0); - legacy_cpu = config_get_int(cat, "cpu", 0); + legacy_mfg = ini_section_get_int(cat, "cpu_manufacturer", 0); + legacy_cpu = ini_section_get_int(cat, "cpu", 0); /* Check if either legacy ID is present, and if they are within bounds. */ if (((legacy_mfg > 0) || (legacy_cpu > 0)) && (legacy_mfg >= 0) && (legacy_mfg < 4) && (legacy_cpu >= 0)) { @@ -852,17 +433,17 @@ load_machine(void) cpu_f = cpu_get_family(legacy_table_entry->family); if (cpu_f) { /* Save the new values. */ - config_set_string(cat, "cpu_family", (char *) legacy_table_entry->family); - config_set_int(cat, "cpu_speed", legacy_table_entry->rspeed); - config_set_double(cat, "cpu_multi", legacy_table_entry->multi); + ini_section_set_string(cat, "cpu_family", (char *) legacy_table_entry->family); + ini_section_set_int(cat, "cpu_speed", legacy_table_entry->rspeed); + ini_section_set_double(cat, "cpu_multi", legacy_table_entry->multi); } } } } if (cpu_f) { - speed = config_get_int(cat, "cpu_speed", 0); - multi = config_get_double(cat, "cpu_multi", 0); + speed = ini_section_get_int(cat, "cpu_speed", 0); + multi = ini_section_get_double(cat, "cpu_multi", 0); /* Find the configured CPU. */ cpu = 0; @@ -902,12 +483,12 @@ load_machine(void) } cpu_s = (CPU *) &cpu_f->cpus[cpu]; - cpu_waitstates = config_get_int(cat, "cpu_waitstates", 0); + cpu_waitstates = ini_section_get_int(cat, "cpu_waitstates", 0); - p = (char *) config_get_string(cat, "fpu_type", "none"); + p = (char *) ini_section_get_string(cat, "fpu_type", "none"); fpu_type = fpu_get_type(cpu_f, cpu, p); - mem_size = config_get_int(cat, "mem_size", 64); + mem_size = ini_section_get_int(cat, "mem_size", 64); #if 0 if (mem_size < ((machine_has_bus(machine, MACHINE_AT) && (machines[machine].ram_granularity < 128)) ? machines[machine].min_ram*1024 : machines[machine].min_ram)) @@ -917,9 +498,9 @@ load_machine(void) if (mem_size > 2097152) mem_size = 2097152; - cpu_use_dynarec = !!config_get_int(cat, "cpu_use_dynarec", 0); + cpu_use_dynarec = !!ini_section_get_int(cat, "cpu_use_dynarec", 0); - p = config_get_string(cat, "time_sync", NULL); + p = ini_section_get_string(cat, "time_sync", NULL); if (p != NULL) { if (!strcmp(p, "disabled")) time_sync = TIME_SYNC_DISABLED; @@ -930,28 +511,28 @@ load_machine(void) else time_sync = TIME_SYNC_ENABLED; } else - time_sync = !!config_get_int(cat, "enable_sync", 1); + time_sync = !!ini_section_get_int(cat, "enable_sync", 1); - pit_mode = config_get_int(cat, "pit_mode", -1); + pit_mode = ini_section_get_int(cat, "pit_mode", -1); /* Remove this after a while.. */ - config_delete_var(cat, "nvr_path"); - config_delete_var(cat, "enable_sync"); + ini_section_delete_var(cat, "nvr_path"); + ini_section_delete_var(cat, "enable_sync"); } /* Load "Video" section. */ static void load_video(void) { - char *cat = "Video"; + ini_section_t cat = ini_find_section(config, "Video"); char *p; int free_p = 0; if (machine_has_flags(machine, MACHINE_VIDEO_ONLY)) { - config_delete_var(cat, "gfxcard"); + ini_section_delete_var(cat, "gfxcard"); gfxcard = VID_INTERNAL; } else { - p = config_get_string(cat, "gfxcard", NULL); + p = ini_section_get_string(cat, "gfxcard", NULL); if (p == NULL) { if (machine_has_flags(machine, MACHINE_VIDEO)) { p = (char *) malloc((strlen("internal") + 1) * sizeof(char)); @@ -970,13 +551,13 @@ load_video(void) free(p); } - voodoo_enabled = !!config_get_int(cat, "voodoo", 0); - ibm8514_enabled = !!config_get_int(cat, "8514a", 0); - xga_enabled = !!config_get_int(cat, "xga", 0); - show_second_monitors = !!config_get_int(cat, "show_second_monitors", 1); - video_fullscreen_scale_maximized = !!config_get_int(cat, "video_fullscreen_scale_maximized", 0); + voodoo_enabled = !!ini_section_get_int(cat, "voodoo", 0); + ibm8514_enabled = !!ini_section_get_int(cat, "8514a", 0); + xga_enabled = !!ini_section_get_int(cat, "xga", 0); + show_second_monitors = !!ini_section_get_int(cat, "show_second_monitors", 1); + video_fullscreen_scale_maximized = !!ini_section_get_int(cat, "video_fullscreen_scale_maximized", 0); - p = config_get_string(cat, "gfxcard_2", NULL); + p = ini_section_get_string(cat, "gfxcard_2", NULL); if (!p) p = "none"; gfxcard_2 = video_get_video_from_internal_name(p); @@ -986,18 +567,18 @@ load_video(void) static void load_input_devices(void) { - char *cat = "Input devices"; + ini_section_t cat = ini_find_section(config, "Input devices"); char temp[512]; int c, d; char *p; - p = config_get_string(cat, "mouse_type", NULL); + p = ini_section_get_string(cat, "mouse_type", NULL); if (p != NULL) mouse_type = mouse_get_from_internal_name(p); else mouse_type = 0; - p = config_get_string(cat, "joystick_type", NULL); + p = ini_section_get_string(cat, "joystick_type", NULL); if (p != NULL) { if (!strcmp(p, "standard_2button")) /* migrate renamed types */ joystick_type = joystick_get_from_internal_name("2axis_2button"); @@ -1014,10 +595,10 @@ load_input_devices(void) if (!joystick_type) { /* Try to read an integer for backwards compatibility with old configs */ - if (!strcmp(p, "0")) /* workaround for config_get_int returning 0 on non-integer data */ + if (!strcmp(p, "0")) /* workaround for ini_section_get_int returning 0 on non-integer data */ joystick_type = joystick_get_from_internal_name("2axis_2button"); else { - c = config_get_int(cat, "joystick_type", 8); + c = ini_section_get_int(cat, "joystick_type", 8); switch (c) { case 1: joystick_type = joystick_get_from_internal_name("2axis_4button"); @@ -1051,20 +632,20 @@ load_input_devices(void) for (c = 0; c < joystick_get_max_joysticks(joystick_type); c++) { sprintf(temp, "joystick_%i_nr", c); - joystick_state[c].plat_joystick_nr = config_get_int(cat, temp, 0); + joystick_state[c].plat_joystick_nr = ini_section_get_int(cat, temp, 0); if (joystick_state[c].plat_joystick_nr) { for (d = 0; d < joystick_get_axis_count(joystick_type); d++) { sprintf(temp, "joystick_%i_axis_%i", c, d); - joystick_state[c].axis_mapping[d] = config_get_int(cat, temp, d); + joystick_state[c].axis_mapping[d] = ini_section_get_int(cat, temp, d); } for (d = 0; d < joystick_get_button_count(joystick_type); d++) { sprintf(temp, "joystick_%i_button_%i", c, d); - joystick_state[c].button_mapping[d] = config_get_int(cat, temp, d); + joystick_state[c].button_mapping[d] = ini_section_get_int(cat, temp, d); } for (d = 0; d < joystick_get_pov_count(joystick_type); d++) { sprintf(temp, "joystick_%i_pov_%i", c, d); - p = config_get_string(cat, temp, "0, 0"); + p = ini_section_get_string(cat, temp, "0, 0"); joystick_state[c].pov_mapping[d][0] = joystick_state[c].pov_mapping[d][1] = 0; sscanf(p, "%i, %i", &joystick_state[c].pov_mapping[d][0], &joystick_state[c].pov_mapping[d][1]); } @@ -1076,11 +657,11 @@ load_input_devices(void) static void load_sound(void) { - char *cat = "Sound"; + ini_section_t cat = ini_find_section(config, "Sound"); char temp[512]; char *p; - p = config_get_string(cat, "sndcard", NULL); + p = ini_section_get_string(cat, "sndcard", NULL); /* FIXME: Hack to not break configs with the Sound Blaster 128 PCI set. */ if ((p != NULL) && (!strcmp(p, "sbpci128") || !strcmp(p, "sb128pci"))) p = "es1371"; @@ -1089,26 +670,26 @@ load_sound(void) else sound_card_current = 0; - p = config_get_string(cat, "midi_device", NULL); + p = ini_section_get_string(cat, "midi_device", NULL); if (p != NULL) midi_output_device_current = midi_out_device_get_from_internal_name(p); else midi_output_device_current = 0; - p = config_get_string(cat, "midi_in_device", NULL); + p = ini_section_get_string(cat, "midi_in_device", NULL); if (p != NULL) midi_input_device_current = midi_in_device_get_from_internal_name(p); else midi_input_device_current = 0; - mpu401_standalone_enable = !!config_get_int(cat, "mpu401_standalone", 0); + mpu401_standalone_enable = !!ini_section_get_int(cat, "mpu401_standalone", 0); - SSI2001 = !!config_get_int(cat, "ssi2001", 0); - GAMEBLASTER = !!config_get_int(cat, "gameblaster", 0); - GUS = !!config_get_int(cat, "gus", 0); + SSI2001 = !!ini_section_get_int(cat, "ssi2001", 0); + GAMEBLASTER = !!ini_section_get_int(cat, "gameblaster", 0); + GUS = !!ini_section_get_int(cat, "gus", 0); memset(temp, '\0', sizeof(temp)); - p = config_get_string(cat, "sound_type", "float"); + p = ini_section_get_string(cat, "sound_type", "float"); if (strlen(p) > 511) fatal("load_sound(): strlen(p) > 511\n"); else @@ -1118,7 +699,7 @@ load_sound(void) else sound_is_float = 0; - p = config_get_string(cat, "fm_driver", "nuked"); + p = ini_section_get_string(cat, "fm_driver", "nuked"); if (!strcmp(p, "ymfm")) { fm_driver = FM_DRV_YMFM; } else { @@ -1130,17 +711,17 @@ load_sound(void) static void load_network(void) { - char *cat = "Network"; + ini_section_t cat = ini_find_section(config, "Network"); char *p; char temp[512]; int c = 0, min = 0; /* Handle legacy configuration which supported only one NIC */ - p = config_get_string(cat, "net_card", NULL); + p = ini_section_get_string(cat, "net_card", NULL); if (p != NULL) { net_cards_conf[c].device_num = network_card_get_from_internal_name(p); - p = config_get_string(cat, "net_type", NULL); + p = ini_section_get_string(cat, "net_type", NULL); if (p != NULL) { if (!strcmp(p, "pcap") || !strcmp(p, "1")) net_cards_conf[c].net_type = NET_TYPE_PCAP; @@ -1152,7 +733,7 @@ load_network(void) net_cards_conf[c].net_type = NET_TYPE_NONE; } - p = config_get_string(cat, "net_host_device", NULL); + p = ini_section_get_string(cat, "net_host_device", NULL); if (p != NULL) { if ((network_dev_to_id(p) == -1) || (network_ndev == 1)) { if (network_ndev == 1) { @@ -1171,13 +752,13 @@ load_network(void) min++; } - config_delete_var(cat, "net_card"); - config_delete_var(cat, "net_type"); - config_delete_var(cat, "net_host_device"); + ini_section_delete_var(cat, "net_card"); + ini_section_delete_var(cat, "net_type"); + ini_section_delete_var(cat, "net_host_device"); for (c = min; c < NET_CARD_MAX; c++) { sprintf(temp, "net_%02i_card", c + 1); - p = config_get_string(cat, temp, NULL); + p = ini_section_get_string(cat, temp, NULL); if (p != NULL) { net_cards_conf[c].device_num = network_card_get_from_internal_name(p); } else { @@ -1185,7 +766,7 @@ load_network(void) } sprintf(temp, "net_%02i_net_type", c + 1); - p = config_get_string(cat, temp, NULL); + p = ini_section_get_string(cat, temp, NULL); if (p != NULL) { if (!strcmp(p, "pcap") || !strcmp(p, "1")) { net_cards_conf[c].net_type = NET_TYPE_PCAP; @@ -1199,7 +780,7 @@ load_network(void) } sprintf(temp, "net_%02i_host_device", c + 1); - p = config_get_string(cat, temp, NULL); + p = ini_section_get_string(cat, temp, NULL); if (p != NULL) { if ((network_dev_to_id(p) == -1) || (network_ndev == 1)) { if (network_ndev == 1) { @@ -1216,7 +797,7 @@ load_network(void) } sprintf(temp, "net_%02i_link", c +1); - net_cards_conf[c].link_state = config_get_int(cat, temp, + net_cards_conf[c].link_state = ini_section_get_int(cat, temp, (NET_LINK_10_HD|NET_LINK_10_FD|NET_LINK_100_HD|NET_LINK_100_FD|NET_LINK_1000_HD|NET_LINK_1000_FD)); } @@ -1226,77 +807,77 @@ load_network(void) static void load_ports(void) { - char *cat = "Ports (COM & LPT)"; + ini_section_t cat = ini_find_section(config, "Ports (COM & LPT)"); char *p; char temp[512]; int c, d; for (c = 0; c < SERIAL_MAX; c++) { sprintf(temp, "serial%d_enabled", c + 1); - com_ports[c].enabled = !!config_get_int(cat, temp, (c >= 2) ? 0 : 1); + com_ports[c].enabled = !!ini_section_get_int(cat, temp, (c >= 2) ? 0 : 1); /* sprintf(temp, "serial%d_device", c + 1); - p = (char *) config_get_string(cat, temp, "none"); + p = (char *) ini_section_get_string(cat, temp, "none"); com_ports[c].device = com_device_get_from_internal_name(p); */ } for (c = 0; c < PARALLEL_MAX; c++) { sprintf(temp, "lpt%d_enabled", c + 1); - lpt_ports[c].enabled = !!config_get_int(cat, temp, (c == 0) ? 1 : 0); + lpt_ports[c].enabled = !!ini_section_get_int(cat, temp, (c == 0) ? 1 : 0); sprintf(temp, "lpt%d_device", c + 1); - p = (char *) config_get_string(cat, temp, "none"); + p = (char *) ini_section_get_string(cat, temp, "none"); lpt_ports[c].device = lpt_device_get_from_internal_name(p); } /* Legacy config compatibility. */ - d = config_get_int(cat, "lpt_enabled", 2); + d = ini_section_get_int(cat, "lpt_enabled", 2); if (d < 2) { for (c = 0; c < PARALLEL_MAX; c++) lpt_ports[c].enabled = d; } - config_delete_var(cat, "lpt_enabled"); + ini_section_delete_var(cat, "lpt_enabled"); } /* Load "Storage Controllers" section. */ static void load_storage_controllers(void) { - char *cat = "Storage controllers"; + ini_section_t cat = ini_find_section(config, "Storage controllers"); char *p, temp[512]; int c, min = 0; int free_p = 0; /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ - backwards_compat2 = (find_section(cat) == NULL); + backwards_compat2 = (cat == NULL); /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ - p = config_get_string(cat, "scsicard", NULL); + p = ini_section_get_string(cat, "scsicard", NULL); if (p != NULL) { scsi_card_current[0] = scsi_card_get_from_internal_name(p); min++; } - config_delete_var(cat, "scsi_card"); + ini_section_delete_var(cat, "scsi_card"); for (c = min; c < SCSI_BUS_MAX; c++) { sprintf(temp, "scsicard_%d", c + 1); - p = config_get_string(cat, temp, NULL); + p = ini_section_get_string(cat, temp, NULL); if (p != NULL) scsi_card_current[c] = scsi_card_get_from_internal_name(p); else scsi_card_current[c] = 0; } - p = config_get_string(cat, "fdc", NULL); + p = ini_section_get_string(cat, "fdc", NULL); if (p != NULL) fdc_type = fdc_card_get_from_internal_name(p); else fdc_type = FDC_INTERNAL; - p = config_get_string(cat, "hdc", NULL); + p = ini_section_get_string(cat, "hdc", NULL); if (p == NULL) { if (machine_has_flags(machine, MACHINE_HDC)) { p = (char *) malloc((strlen("internal") + 1) * sizeof(char)); @@ -1325,30 +906,30 @@ load_storage_controllers(void) p = NULL; } - ide_ter_enabled = !!config_get_int(cat, "ide_ter", 0); - ide_qua_enabled = !!config_get_int(cat, "ide_qua", 0); + ide_ter_enabled = !!ini_section_get_int(cat, "ide_ter", 0); + ide_qua_enabled = !!ini_section_get_int(cat, "ide_qua", 0); /* TODO: Re-enable by default after we actually have a proper machine flag for this. */ - cassette_enable = !!config_get_int(cat, "cassette_enabled", 0); - p = config_get_string(cat, "cassette_file", ""); + cassette_enable = !!ini_section_get_int(cat, "cassette_enabled", 0); + p = ini_section_get_string(cat, "cassette_file", ""); if (strlen(p) > 511) fatal("load_storage_controllers(): strlen(p) > 511\n"); else strncpy(cassette_fname, p, MIN(512, strlen(p) + 1)); - p = config_get_string(cat, "cassette_mode", ""); + p = ini_section_get_string(cat, "cassette_mode", ""); if (strlen(p) > 511) fatal("load_storage_controllers(): strlen(p) > 511\n"); else strncpy(cassette_mode, p, MIN(512, strlen(p) + 1)); - cassette_pos = config_get_int(cat, "cassette_position", 0); - cassette_srate = config_get_int(cat, "cassette_srate", 44100); - cassette_append = !!config_get_int(cat, "cassette_append", 0); - cassette_pcm = config_get_int(cat, "cassette_pcm", 0); - cassette_ui_writeprot = !!config_get_int(cat, "cassette_writeprot", 0); + cassette_pos = ini_section_get_int(cat, "cassette_position", 0); + cassette_srate = ini_section_get_int(cat, "cassette_srate", 44100); + cassette_append = !!ini_section_get_int(cat, "cassette_append", 0); + cassette_pcm = ini_section_get_int(cat, "cassette_pcm", 0); + cassette_ui_writeprot = !!ini_section_get_int(cat, "cassette_writeprot", 0); for (c = 0; c < 2; c++) { sprintf(temp, "cartridge_%02i_fn", c + 1); - p = config_get_string(cat, temp, ""); + p = ini_section_get_string(cat, temp, ""); #if 0 /* @@ -1378,7 +959,7 @@ load_storage_controllers(void) static void load_hard_disks(void) { - char *cat = "Hard disks"; + ini_section_t cat = ini_find_section(config, "Hard disks"); char temp[512], tmp2[512]; char s[512]; int c; @@ -1389,7 +970,7 @@ load_hard_disks(void) memset(temp, '\0', sizeof(temp)); for (c = 0; c < HDD_NUM; c++) { sprintf(temp, "hdd_%02i_parameters", c + 1); - p = config_get_string(cat, temp, "0, 0, 0, 0, none"); + p = ini_section_get_string(cat, temp, "0, 0, 0, 0, none"); sscanf(p, "%u, %u, %u, %i, %s", &hdd[c].spt, &hdd[c].hpc, &hdd[c].tracks, (int *) &hdd[c].wp, s); @@ -1448,35 +1029,35 @@ load_hard_disks(void) sprintf(tmp2, "ramdisk"); break; } - p = config_get_string(cat, temp, tmp2); + p = ini_section_get_string(cat, temp, tmp2); hdd[c].speed_preset = hdd_preset_get_from_internal_name(p); /* MFM/RLL */ sprintf(temp, "hdd_%02i_mfm_channel", c + 1); if (hdd[c].bus == HDD_BUS_MFM) - hdd[c].mfm_channel = !!config_get_int(cat, temp, c & 1); + hdd[c].mfm_channel = !!ini_section_get_int(cat, temp, c & 1); else - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); /* XTA */ sprintf(temp, "hdd_%02i_xta_channel", c + 1); if (hdd[c].bus == HDD_BUS_XTA) - hdd[c].xta_channel = !!config_get_int(cat, temp, c & 1); + hdd[c].xta_channel = !!ini_section_get_int(cat, temp, c & 1); else - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); /* ESDI */ sprintf(temp, "hdd_%02i_esdi_channel", c + 1); if (hdd[c].bus == HDD_BUS_ESDI) - hdd[c].esdi_channel = !!config_get_int(cat, temp, c & 1); + hdd[c].esdi_channel = !!ini_section_get_int(cat, temp, c & 1); else - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); /* IDE */ sprintf(temp, "hdd_%02i_ide_channel", c + 1); if (hdd[c].bus == HDD_BUS_IDE) { sprintf(tmp2, "%01u:%01u", c >> 1, c & 1); - p = config_get_string(cat, temp, tmp2); + p = ini_section_get_string(cat, temp, tmp2); sscanf(p, "%01u:%01u", &board, &dev); board &= 3; dev &= 1; @@ -1485,19 +1066,19 @@ load_hard_disks(void) if (hdd[c].ide_channel > 7) hdd[c].ide_channel = 7; } else { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } /* SCSI */ if (hdd[c].bus == HDD_BUS_SCSI) { sprintf(temp, "hdd_%02i_scsi_location", c + 1); sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c + 2); - p = config_get_string(cat, temp, tmp2); + p = ini_section_get_string(cat, temp, tmp2); sscanf(p, "%01u:%02u", &board, &dev); if (board >= SCSI_BUS_MAX) { /* Invalid bus - check legacy ID */ sprintf(temp, "hdd_%02i_scsi_id", c + 1); - hdd[c].scsi_id = config_get_int(cat, temp, c + 2); + hdd[c].scsi_id = ini_section_get_int(cat, temp, c + 2); if (hdd[c].scsi_id > 15) hdd[c].scsi_id = 15; @@ -1508,16 +1089,16 @@ load_hard_disks(void) } } else { sprintf(temp, "hdd_%02i_scsi_location", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } sprintf(temp, "hdd_%02i_scsi_id", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); memset(hdd[c].fn, 0x00, sizeof(hdd[c].fn)); memset(hdd[c].prev_fn, 0x00, sizeof(hdd[c].prev_fn)); sprintf(temp, "hdd_%02i_fn", c + 1); - p = config_get_string(cat, temp, ""); + p = ini_section_get_string(cat, temp, ""); #if 0 /* @@ -1551,26 +1132,26 @@ load_hard_disks(void) /* If disk is empty or invalid, mark it for deletion. */ if (!hdd_is_valid(c)) { sprintf(temp, "hdd_%02i_parameters", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "hdd_%02i_preide_channels", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "hdd_%02i_ide_channels", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "hdd_%02i_scsi_id", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "hdd_%02i_fn", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } sprintf(temp, "hdd_%02i_mfm_channel", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "hdd_%02i_ide_channel", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } } @@ -1579,7 +1160,7 @@ load_hard_disks(void) static void load_floppy_drives(void) { - char *cat = "Floppy drives"; + ini_section_t cat = ini_find_section(config, "Floppy drives"); char temp[512], *p; int c; @@ -1588,15 +1169,15 @@ load_floppy_drives(void) for (c = 0; c < FDD_NUM; c++) { sprintf(temp, "fdd_%02i_type", c + 1); - p = config_get_string(cat, temp, (c < 2) ? "525_2dd" : "none"); + p = ini_section_get_string(cat, temp, (c < 2) ? "525_2dd" : "none"); fdd_set_type(c, fdd_get_from_internal_name(p)); if (fdd_get_type(c) > 13) fdd_set_type(c, 13); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "fdd_%02i_fn", c + 1); - p = config_get_string(cat, temp, ""); - config_delete_var(cat, temp); + p = ini_section_get_string(cat, temp, ""); + ini_section_delete_var(cat, temp); #if 0 /* @@ -1623,42 +1204,42 @@ load_floppy_drives(void) /* if (*wp != L'\0') config_log("Floppy%d: %ls\n", c, floppyfns[c]); */ sprintf(temp, "fdd_%02i_writeprot", c + 1); - ui_writeprot[c] = !!config_get_int(cat, temp, 0); - config_delete_var(cat, temp); + ui_writeprot[c] = !!ini_section_get_int(cat, temp, 0); + ini_section_delete_var(cat, temp); sprintf(temp, "fdd_%02i_turbo", c + 1); - fdd_set_turbo(c, !!config_get_int(cat, temp, 0)); - config_delete_var(cat, temp); + fdd_set_turbo(c, !!ini_section_get_int(cat, temp, 0)); + ini_section_delete_var(cat, temp); sprintf(temp, "fdd_%02i_check_bpb", c + 1); - fdd_set_check_bpb(c, !!config_get_int(cat, temp, 1)); - config_delete_var(cat, temp); + fdd_set_check_bpb(c, !!ini_section_get_int(cat, temp, 1)); + ini_section_delete_var(cat, temp); } - delete_section_if_empty(cat); + ini_delete_section_if_empty(config, cat); } /* Load "Floppy and CD-ROM Drives" section. */ static void load_floppy_and_cdrom_drives(void) { - char *cat = "Floppy and CD-ROM drives"; + ini_section_t cat = ini_find_section(config, "Floppy and CD-ROM drives"); char temp[512], tmp2[512], *p; char s[512]; unsigned int board = 0, dev = 0; int c, d = 0; /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ - backwards_compat = (find_section(cat) == NULL); + backwards_compat = (cat == NULL); memset(temp, 0x00, sizeof(temp)); for (c = 0; c < FDD_NUM; c++) { sprintf(temp, "fdd_%02i_type", c + 1); - p = config_get_string(cat, temp, (c < 2) ? "525_2dd" : "none"); + p = ini_section_get_string(cat, temp, (c < 2) ? "525_2dd" : "none"); fdd_set_type(c, fdd_get_from_internal_name(p)); if (fdd_get_type(c) > 13) fdd_set_type(c, 13); sprintf(temp, "fdd_%02i_fn", c + 1); - p = config_get_string(cat, temp, ""); + p = ini_section_get_string(cat, temp, ""); #if 0 /* @@ -1685,43 +1266,43 @@ load_floppy_and_cdrom_drives(void) /* if (*wp != L'\0') config_log("Floppy%d: %ls\n", c, floppyfns[c]); */ sprintf(temp, "fdd_%02i_writeprot", c + 1); - ui_writeprot[c] = !!config_get_int(cat, temp, 0); + ui_writeprot[c] = !!ini_section_get_int(cat, temp, 0); sprintf(temp, "fdd_%02i_turbo", c + 1); - fdd_set_turbo(c, !!config_get_int(cat, temp, 0)); + fdd_set_turbo(c, !!ini_section_get_int(cat, temp, 0)); sprintf(temp, "fdd_%02i_check_bpb", c + 1); - fdd_set_check_bpb(c, !!config_get_int(cat, temp, 1)); + fdd_set_check_bpb(c, !!ini_section_get_int(cat, temp, 1)); /* Check whether each value is default, if yes, delete it so that only non-default values will later be saved. */ if (fdd_get_type(c) == ((c < 2) ? 2 : 0)) { sprintf(temp, "fdd_%02i_type", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } if (strlen(floppyfns[c]) == 0) { sprintf(temp, "fdd_%02i_fn", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } if (ui_writeprot[c] == 0) { sprintf(temp, "fdd_%02i_writeprot", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } if (fdd_get_turbo(c) == 0) { sprintf(temp, "fdd_%02i_turbo", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } if (fdd_get_check_bpb(c) == 1) { sprintf(temp, "fdd_%02i_check_bpb", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } } memset(temp, 0x00, sizeof(temp)); for (c = 0; c < CDROM_NUM; c++) { sprintf(temp, "cdrom_%02i_host_drive", c + 1); - cdrom[c].host_drive = config_get_int(cat, temp, 0); + cdrom[c].host_drive = ini_section_get_int(cat, temp, 0); cdrom[c].prev_host_drive = cdrom[c].host_drive; sprintf(temp, "cdrom_%02i_parameters", c + 1); - p = config_get_string(cat, temp, NULL); + p = ini_section_get_string(cat, temp, NULL); if (p != NULL) sscanf(p, "%01u, %s", &d, s); else if (c == 0) @@ -1733,7 +1314,7 @@ load_floppy_and_cdrom_drives(void) cdrom[c].bus_type = hdd_string_to_bus(s, 1); sprintf(temp, "cdrom_%02i_speed", c + 1); - cdrom[c].speed = config_get_int(cat, temp, 8); + cdrom[c].speed = ini_section_get_int(cat, temp, 8); /* Default values, needed for proper operation of the Settings dialog. */ cdrom[c].ide_channel = cdrom[c].scsi_device_id = c + 2; @@ -1741,7 +1322,7 @@ load_floppy_and_cdrom_drives(void) if (cdrom[c].bus_type == CDROM_BUS_ATAPI) { sprintf(temp, "cdrom_%02i_ide_channel", c + 1); sprintf(tmp2, "%01u:%01u", (c + 2) >> 1, (c + 2) & 1); - p = config_get_string(cat, temp, tmp2); + p = ini_section_get_string(cat, temp, tmp2); sscanf(p, "%01u:%01u", &board, &dev); board &= 3; dev &= 1; @@ -1752,12 +1333,12 @@ load_floppy_and_cdrom_drives(void) } else if (cdrom[c].bus_type == CDROM_BUS_SCSI) { sprintf(temp, "cdrom_%02i_scsi_location", c + 1); sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c + 2); - p = config_get_string(cat, temp, tmp2); + p = ini_section_get_string(cat, temp, tmp2); sscanf(p, "%01u:%02u", &board, &dev); if (board >= SCSI_BUS_MAX) { /* Invalid bus - check legacy ID */ sprintf(temp, "cdrom_%02i_scsi_id", c + 1); - cdrom[c].scsi_device_id = config_get_int(cat, temp, c + 2); + cdrom[c].scsi_device_id = ini_section_get_int(cat, temp, c + 2); if (cdrom[c].scsi_device_id > 15) cdrom[c].scsi_device_id = 15; @@ -1770,19 +1351,19 @@ load_floppy_and_cdrom_drives(void) if (cdrom[c].bus_type != CDROM_BUS_ATAPI) { sprintf(temp, "cdrom_%02i_ide_channel", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } if (cdrom[c].bus_type != CDROM_BUS_SCSI) { sprintf(temp, "cdrom_%02i_scsi_location", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } sprintf(temp, "cdrom_%02i_scsi_id", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "cdrom_%02i_image_path", c + 1); - p = config_get_string(cat, temp, ""); + p = ini_section_get_string(cat, temp, ""); #if 0 /* @@ -1812,28 +1393,28 @@ load_floppy_and_cdrom_drives(void) /* If the CD-ROM is disabled, delete all its variables. */ if (cdrom[c].bus_type == CDROM_BUS_DISABLED) { sprintf(temp, "cdrom_%02i_host_drive", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "cdrom_%02i_parameters", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "cdrom_%02i_ide_channel", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "cdrom_%02i_scsi_id", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "cdrom_%02i_image_path", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } sprintf(temp, "cdrom_%02i_iso_path", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); for (int i = 0; i < MAX_PREV_IMAGES; i++) { cdrom[c].image_history[i] = (char *) calloc(MAX_IMAGE_PATH_LEN + 1, sizeof(char)); sprintf(temp, "cdrom_%02i_image_history_%02i", c + 1, i + 1); - p = config_get_string(cat, temp, NULL); + p = ini_section_get_string(cat, temp, NULL); if(p) { sprintf(cdrom[c].image_history[i], "%s", p); } @@ -1845,7 +1426,7 @@ load_floppy_and_cdrom_drives(void) static void load_other_removable_devices(void) { - char *cat = "Other removable devices"; + ini_section_t cat = ini_find_section(config, "Other removable devices"); char temp[512], tmp2[512], *p; char s[512]; unsigned int board = 0, dev = 0; @@ -1856,32 +1437,32 @@ load_other_removable_devices(void) memset(temp, 0x00, sizeof(temp)); for (c = 0; c < CDROM_NUM; c++) { sprintf(temp, "cdrom_%02i_host_drive", c + 1); - cdrom[c].host_drive = config_get_int(cat, temp, 0); + cdrom[c].host_drive = ini_section_get_int(cat, temp, 0); cdrom[c].prev_host_drive = cdrom[c].host_drive; - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "cdrom_%02i_parameters", c + 1); - p = config_get_string(cat, temp, NULL); + p = ini_section_get_string(cat, temp, NULL); if (p != NULL) sscanf(p, "%01u, %s", &d, s); else sscanf("0, none", "%01u, %s", &d, s); cdrom[c].sound_on = d; cdrom[c].bus_type = hdd_string_to_bus(s, 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "cdrom_%02i_speed", c + 1); - cdrom[c].speed = config_get_int(cat, temp, 8); - config_delete_var(cat, temp); + cdrom[c].speed = ini_section_get_int(cat, temp, 8); + ini_section_delete_var(cat, temp); /* Default values, needed for proper operation of the Settings dialog. */ cdrom[c].ide_channel = cdrom[c].scsi_device_id = c + 2; - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); if (cdrom[c].bus_type == CDROM_BUS_ATAPI) { sprintf(temp, "cdrom_%02i_ide_channel", c + 1); sprintf(tmp2, "%01u:%01u", (c + 2) >> 1, (c + 2) & 1); - p = config_get_string(cat, temp, tmp2); + p = ini_section_get_string(cat, temp, tmp2); sscanf(p, "%01u:%01u", &board, &dev); board &= 3; dev &= 1; @@ -1890,20 +1471,20 @@ load_other_removable_devices(void) if (cdrom[c].ide_channel > 7) cdrom[c].ide_channel = 7; - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } else if (cdrom[c].bus_type == CDROM_BUS_SCSI) { sprintf(temp, "cdrom_%02i_scsi_id", c + 1); - cdrom[c].scsi_device_id = config_get_int(cat, temp, c + 2); + cdrom[c].scsi_device_id = ini_section_get_int(cat, temp, c + 2); if (cdrom[c].scsi_device_id > 15) cdrom[c].scsi_device_id = 15; - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } sprintf(temp, "cdrom_%02i_image_path", c + 1); - p = config_get_string(cat, temp, ""); - config_delete_var(cat, temp); + p = ini_section_get_string(cat, temp, ""); + ini_section_delete_var(cat, temp); #if 0 /* @@ -1936,7 +1517,7 @@ load_other_removable_devices(void) memset(temp, 0x00, sizeof(temp)); for (c = 0; c < ZIP_NUM; c++) { sprintf(temp, "zip_%02i_parameters", c + 1); - p = config_get_string(cat, temp, NULL); + p = ini_section_get_string(cat, temp, NULL); if (p != NULL) sscanf(p, "%01u, %s", &zip_drives[c].is_250, s); else @@ -1949,7 +1530,7 @@ load_other_removable_devices(void) if (zip_drives[c].bus_type == ZIP_BUS_ATAPI) { sprintf(temp, "zip_%02i_ide_channel", c + 1); sprintf(tmp2, "%01u:%01u", (c + 2) >> 1, (c + 2) & 1); - p = config_get_string(cat, temp, tmp2); + p = ini_section_get_string(cat, temp, tmp2); sscanf(p, "%01u:%01u", &board, &dev); board &= 3; dev &= 1; @@ -1960,12 +1541,12 @@ load_other_removable_devices(void) } else if (zip_drives[c].bus_type == ZIP_BUS_SCSI) { sprintf(temp, "zip_%02i_scsi_location", c + 1); sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c + 2); - p = config_get_string(cat, temp, tmp2); + p = ini_section_get_string(cat, temp, tmp2); sscanf(p, "%01u:%02u", &board, &dev); if (board >= SCSI_BUS_MAX) { /* Invalid bus - check legacy ID */ sprintf(temp, "zip_%02i_scsi_id", c + 1); - zip_drives[c].scsi_device_id = config_get_int(cat, temp, c + 2); + zip_drives[c].scsi_device_id = ini_section_get_int(cat, temp, c + 2); if (zip_drives[c].scsi_device_id > 15) zip_drives[c].scsi_device_id = 15; @@ -1978,19 +1559,19 @@ load_other_removable_devices(void) if (zip_drives[c].bus_type != ZIP_BUS_ATAPI) { sprintf(temp, "zip_%02i_ide_channel", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } if (zip_drives[c].bus_type != ZIP_BUS_SCSI) { sprintf(temp, "zip_%02i_scsi_location", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } sprintf(temp, "zip_%02i_scsi_id", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "zip_%02i_image_path", c + 1); - p = config_get_string(cat, temp, ""); + p = ini_section_get_string(cat, temp, ""); #if 0 /* @@ -2014,29 +1595,29 @@ load_other_removable_devices(void) /* If the CD-ROM is disabled, delete all its variables. */ if (zip_drives[c].bus_type == ZIP_BUS_DISABLED) { sprintf(temp, "zip_%02i_host_drive", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "zip_%02i_parameters", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "zip_%02i_ide_channel", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "zip_%02i_scsi_id", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "zip_%02i_image_path", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } sprintf(temp, "zip_%02i_iso_path", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } memset(temp, 0x00, sizeof(temp)); for (c = 0; c < MO_NUM; c++) { sprintf(temp, "mo_%02i_parameters", c + 1); - p = config_get_string(cat, temp, NULL); + p = ini_section_get_string(cat, temp, NULL); if (p != NULL) sscanf(p, "%u, %s", &mo_drives[c].type, s); else @@ -2049,7 +1630,7 @@ load_other_removable_devices(void) if (mo_drives[c].bus_type == MO_BUS_ATAPI) { sprintf(temp, "mo_%02i_ide_channel", c + 1); sprintf(tmp2, "%01u:%01u", (c + 2) >> 1, (c + 2) & 1); - p = config_get_string(cat, temp, tmp2); + p = ini_section_get_string(cat, temp, tmp2); sscanf(p, "%01u:%01u", &board, &dev); board &= 3; dev &= 1; @@ -2060,12 +1641,12 @@ load_other_removable_devices(void) } else if (mo_drives[c].bus_type == MO_BUS_SCSI) { sprintf(temp, "mo_%02i_scsi_location", c + 1); sprintf(tmp2, "%01u:%02u", SCSI_BUS_MAX, c + 2); - p = config_get_string(cat, temp, tmp2); + p = ini_section_get_string(cat, temp, tmp2); sscanf(p, "%01u:%02u", &board, &dev); if (board >= SCSI_BUS_MAX) { /* Invalid bus - check legacy ID */ sprintf(temp, "mo_%02i_scsi_id", c + 1); - mo_drives[c].scsi_device_id = config_get_int(cat, temp, c + 2); + mo_drives[c].scsi_device_id = ini_section_get_int(cat, temp, c + 2); if (mo_drives[c].scsi_device_id > 15) mo_drives[c].scsi_device_id = 15; @@ -2078,42 +1659,42 @@ load_other_removable_devices(void) if (mo_drives[c].bus_type != MO_BUS_ATAPI) { sprintf(temp, "mo_%02i_ide_channel", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } if (mo_drives[c].bus_type != MO_BUS_SCSI) { sprintf(temp, "mo_%02i_scsi_location", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } sprintf(temp, "mo_%02i_scsi_id", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "mo_%02i_image_path", c + 1); - p = config_get_string(cat, temp, ""); + p = ini_section_get_string(cat, temp, ""); strncpy(mo_drives[c].image_path, p, sizeof(mo_drives[c].image_path) - 1); /* If the CD-ROM is disabled, delete all its variables. */ if (mo_drives[c].bus_type == MO_BUS_DISABLED) { sprintf(temp, "mo_%02i_host_drive", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "mo_%02i_parameters", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "mo_%02i_ide_channel", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "mo_%02i_scsi_id", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "mo_%02i_image_path", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } sprintf(temp, "mo_%02i_iso_path", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } } @@ -2121,27 +1702,27 @@ load_other_removable_devices(void) static void load_other_peripherals(void) { - char *cat = "Other peripherals"; + ini_section_t cat = ini_find_section(config, "Other peripherals"); char *p; char temp[512]; int c, free_p = 0; if (backwards_compat2) { - p = config_get_string(cat, "scsicard", NULL); + p = ini_section_get_string(cat, "scsicard", NULL); if (p != NULL) scsi_card_current[0] = scsi_card_get_from_internal_name(p); else scsi_card_current[0] = 0; - config_delete_var(cat, "scsicard"); + ini_section_delete_var(cat, "scsicard"); - p = config_get_string(cat, "fdc", NULL); + p = ini_section_get_string(cat, "fdc", NULL); if (p != NULL) fdc_type = fdc_card_get_from_internal_name(p); else fdc_type = FDC_INTERNAL; - config_delete_var(cat, "fdc"); + ini_section_delete_var(cat, "fdc"); - p = config_get_string(cat, "hdc", NULL); + p = ini_section_get_string(cat, "hdc", NULL); if (p == NULL) { if (machine_has_flags(machine, MACHINE_HDC)) { p = (char *) malloc((strlen("internal") + 1) * sizeof(char)); @@ -2164,31 +1745,31 @@ load_other_peripherals(void) hdc_current = hdc_get_from_internal_name("ide_vlb_2ch"); else hdc_current = hdc_get_from_internal_name(p); - config_delete_var(cat, "hdc"); + ini_section_delete_var(cat, "hdc"); if (free_p) { free(p); p = NULL; } - ide_ter_enabled = !!config_get_int(cat, "ide_ter", 0); - config_delete_var(cat, "ide_ter"); - ide_qua_enabled = !!config_get_int(cat, "ide_qua", 0); - config_delete_var(cat, "ide_qua"); + ide_ter_enabled = !!ini_section_get_int(cat, "ide_ter", 0); + ini_section_delete_var(cat, "ide_ter"); + ide_qua_enabled = !!ini_section_get_int(cat, "ide_qua", 0); + ini_section_delete_var(cat, "ide_qua"); } backwards_compat2 = 0; - bugger_enabled = !!config_get_int(cat, "bugger_enabled", 0); - postcard_enabled = !!config_get_int(cat, "postcard_enabled", 0); + bugger_enabled = !!ini_section_get_int(cat, "bugger_enabled", 0); + postcard_enabled = !!ini_section_get_int(cat, "postcard_enabled", 0); for (c = 0; c < ISAMEM_MAX; c++) { sprintf(temp, "isamem%d_type", c); - p = config_get_string(cat, temp, "none"); + p = ini_section_get_string(cat, temp, "none"); isamem_type[c] = isamem_get_from_internal_name(p); } - p = config_get_string(cat, "isartc_type", "none"); + p = ini_section_get_string(cat, "isartc_type", "none"); isartc_type = isartc_get_from_internal_name(p); } @@ -2207,7 +1788,10 @@ config_load(void) #endif memset(zip_drives, 0, sizeof(zip_drive_t)); - if (!config_read(cfg_path)) { + config = ini_read(cfg_path); + + if (!config) { + config = ini_new(); config_changed = 1; cpu_f = (cpu_family_t *) &cpu_families[0]; @@ -2297,171 +1881,171 @@ config_load(void) static void save_general(void) { - char *cat = "General"; + ini_section_t cat = ini_find_or_create_section(config, "General"); char temp[512], buffer[512] = { 0 }; char *va_name; - config_set_int(cat, "vid_resize", vid_resize); + ini_section_set_int(cat, "vid_resize", vid_resize); if (vid_resize == 0) - config_delete_var(cat, "vid_resize"); + ini_section_delete_var(cat, "vid_resize"); va_name = plat_vidapi_name(vid_api); if (!strcmp(va_name, "default")) - config_delete_var(cat, "vid_renderer"); + ini_section_delete_var(cat, "vid_renderer"); else - config_set_string(cat, "vid_renderer", va_name); + ini_section_set_string(cat, "vid_renderer", va_name); if (video_fullscreen_scale == 0) - config_delete_var(cat, "video_fullscreen_scale"); + ini_section_delete_var(cat, "video_fullscreen_scale"); else - config_set_int(cat, "video_fullscreen_scale", video_fullscreen_scale); + ini_section_set_int(cat, "video_fullscreen_scale", video_fullscreen_scale); if (video_fullscreen_first == 1) - config_delete_var(cat, "video_fullscreen_first"); + ini_section_delete_var(cat, "video_fullscreen_first"); else - config_set_int(cat, "video_fullscreen_first", video_fullscreen_first); + ini_section_set_int(cat, "video_fullscreen_first", video_fullscreen_first); if (video_filter_method == 1) - config_delete_var(cat, "video_filter_method"); + ini_section_delete_var(cat, "video_filter_method"); else - config_set_int(cat, "video_filter_method", video_filter_method); + ini_section_set_int(cat, "video_filter_method", video_filter_method); if (force_43 == 0) - config_delete_var(cat, "force_43"); + ini_section_delete_var(cat, "force_43"); else - config_set_int(cat, "force_43", force_43); + ini_section_set_int(cat, "force_43", force_43); if (scale == 1) - config_delete_var(cat, "scale"); + ini_section_delete_var(cat, "scale"); else - config_set_int(cat, "scale", scale); + ini_section_set_int(cat, "scale", scale); if (dpi_scale == 1) - config_delete_var(cat, "dpi_scale"); + ini_section_delete_var(cat, "dpi_scale"); else - config_set_int(cat, "dpi_scale", dpi_scale); + ini_section_set_int(cat, "dpi_scale", dpi_scale); if (enable_overscan == 0) - config_delete_var(cat, "enable_overscan"); + ini_section_delete_var(cat, "enable_overscan"); else - config_set_int(cat, "enable_overscan", enable_overscan); + ini_section_set_int(cat, "enable_overscan", enable_overscan); if (vid_cga_contrast == 0) - config_delete_var(cat, "vid_cga_contrast"); + ini_section_delete_var(cat, "vid_cga_contrast"); else - config_set_int(cat, "vid_cga_contrast", vid_cga_contrast); + ini_section_set_int(cat, "vid_cga_contrast", vid_cga_contrast); if (video_grayscale == 0) - config_delete_var(cat, "video_grayscale"); + ini_section_delete_var(cat, "video_grayscale"); else - config_set_int(cat, "video_grayscale", video_grayscale); + ini_section_set_int(cat, "video_grayscale", video_grayscale); if (video_graytype == 0) - config_delete_var(cat, "video_graytype"); + ini_section_delete_var(cat, "video_graytype"); else - config_set_int(cat, "video_graytype", video_graytype); + ini_section_set_int(cat, "video_graytype", video_graytype); if (rctrl_is_lalt == 0) - config_delete_var(cat, "rctrl_is_lalt"); + ini_section_delete_var(cat, "rctrl_is_lalt"); else - config_set_int(cat, "rctrl_is_lalt", rctrl_is_lalt); + ini_section_set_int(cat, "rctrl_is_lalt", rctrl_is_lalt); if (update_icons == 1) - config_delete_var(cat, "update_icons"); + ini_section_delete_var(cat, "update_icons"); else - config_set_int(cat, "update_icons", update_icons); + ini_section_set_int(cat, "update_icons", update_icons); if (window_remember || (vid_resize & 2)) { if (window_remember) - config_set_int(cat, "window_remember", window_remember); + ini_section_set_int(cat, "window_remember", window_remember); else - config_delete_var(cat, "window_remember"); + ini_section_delete_var(cat, "window_remember"); } else - config_delete_var(cat, "window_remember"); + ini_section_delete_var(cat, "window_remember"); if (vid_resize & 2) { sprintf(temp, "%ix%i", fixed_size_x, fixed_size_y); - config_set_string(cat, "window_fixed_res", temp); + ini_section_set_string(cat, "window_fixed_res", temp); } else - config_delete_var(cat, "window_fixed_res"); + ini_section_delete_var(cat, "window_fixed_res"); if (sound_gain != 0) - config_set_int(cat, "sound_gain", sound_gain); + ini_section_set_int(cat, "sound_gain", sound_gain); else - config_delete_var(cat, "sound_gain"); + ini_section_delete_var(cat, "sound_gain"); if (kbd_req_capture != 0) - config_set_int(cat, "kbd_req_capture", kbd_req_capture); + ini_section_set_int(cat, "kbd_req_capture", kbd_req_capture); else - config_delete_var(cat, "kbd_req_capture"); + ini_section_delete_var(cat, "kbd_req_capture"); if (hide_status_bar != 0) - config_set_int(cat, "hide_status_bar", hide_status_bar); + ini_section_set_int(cat, "hide_status_bar", hide_status_bar); else - config_delete_var(cat, "hide_status_bar"); + ini_section_delete_var(cat, "hide_status_bar"); if (hide_tool_bar != 0) - config_set_int(cat, "hide_tool_bar", hide_tool_bar); + ini_section_set_int(cat, "hide_tool_bar", hide_tool_bar); else - config_delete_var(cat, "hide_tool_bar"); + ini_section_delete_var(cat, "hide_tool_bar"); if (confirm_reset != 1) - config_set_int(cat, "confirm_reset", confirm_reset); + ini_section_set_int(cat, "confirm_reset", confirm_reset); else - config_delete_var(cat, "confirm_reset"); + ini_section_delete_var(cat, "confirm_reset"); if (confirm_exit != 1) - config_set_int(cat, "confirm_exit", confirm_exit); + ini_section_set_int(cat, "confirm_exit", confirm_exit); else - config_delete_var(cat, "confirm_exit"); + ini_section_delete_var(cat, "confirm_exit"); if (confirm_save != 1) - config_set_int(cat, "confirm_save", confirm_save); + ini_section_set_int(cat, "confirm_save", confirm_save); else - config_delete_var(cat, "confirm_save"); + ini_section_delete_var(cat, "confirm_save"); if (mouse_sensitivity != 1.0) - config_set_double(cat, "mouse_sensitivity", mouse_sensitivity); + ini_section_set_double(cat, "mouse_sensitivity", mouse_sensitivity); else - config_delete_var(cat, "mouse_sensitivity"); + ini_section_delete_var(cat, "mouse_sensitivity"); if (lang_id == DEFAULT_LANGUAGE) - config_delete_var(cat, "language"); + ini_section_delete_var(cat, "language"); else { plat_language_code_r(lang_id, buffer, 511); - config_set_string(cat, "language", buffer); + ini_section_set_string(cat, "language", buffer); } if (!strcmp(icon_set, "")) - config_delete_var(cat, "iconset"); + ini_section_delete_var(cat, "iconset"); else - config_set_string(cat, "iconset", icon_set); + ini_section_set_string(cat, "iconset", icon_set); if (enable_discord) - config_set_int(cat, "enable_discord", enable_discord); + ini_section_set_int(cat, "enable_discord", enable_discord); else - config_delete_var(cat, "enable_discord"); + ini_section_delete_var(cat, "enable_discord"); if (open_dir_usr_path) - config_set_int(cat, "open_dir_usr_path", open_dir_usr_path); + ini_section_set_int(cat, "open_dir_usr_path", open_dir_usr_path); else - config_delete_var(cat, "open_dir_usr_path"); + ini_section_delete_var(cat, "open_dir_usr_path"); if (video_framerate != -1) - config_set_int(cat, "video_gl_framerate", video_framerate); + ini_section_set_int(cat, "video_gl_framerate", video_framerate); else - config_delete_var(cat, "video_gl_framerate"); + ini_section_delete_var(cat, "video_gl_framerate"); if (video_vsync != 0) - config_set_int(cat, "video_gl_vsync", video_vsync); + ini_section_set_int(cat, "video_gl_vsync", video_vsync); else - config_delete_var(cat, "video_gl_vsync"); + ini_section_delete_var(cat, "video_gl_vsync"); if (strlen(video_shader) > 0) - config_set_string(cat, "video_gl_shader", video_shader); + ini_section_set_string(cat, "video_gl_shader", video_shader); else - config_delete_var(cat, "video_gl_shader"); + ini_section_delete_var(cat, "video_gl_shader"); - delete_section_if_empty(cat); + ini_delete_section_if_empty(config, cat); } /* Save monitor section. */ @@ -2477,15 +2061,15 @@ save_monitor(int monitor_index) monitor_settings[monitor_index].mon_window_x, monitor_settings[monitor_index].mon_window_y, monitor_settings[monitor_index].mon_window_w, monitor_settings[monitor_index].mon_window_h); - config_set_string(cat, "window_coordinates", temp); + ini_section_set_string(cat, "window_coordinates", temp); if (monitor_settings[monitor_index].mon_window_maximized != 0) { - config_set_int(cat, "window_maximized", monitor_settings[monitor_index].mon_window_maximized); + ini_section_set_int(cat, "window_maximized", monitor_settings[monitor_index].mon_window_maximized); } else { - config_delete_var(cat, "window_maximized"); + ini_section_delete_var(cat, "window_maximized"); } } else { - config_delete_var(cat, "window_coordinates"); - config_delete_var(cat, "window_maximized"); + ini_section_delete_var(cat, "window_coordinates"); + ini_section_delete_var(cat, "window_maximized"); } } @@ -2493,24 +2077,24 @@ save_monitor(int monitor_index) static void save_machine(void) { - char *cat = "Machine"; + ini_section_t cat = ini_find_or_create_section(config, "Machine"); char *p; int c, i = 0, legacy_mfg, legacy_cpu = -1, closest_legacy_cpu = -1; p = machine_get_internal_name(); - config_set_string(cat, "machine", p); + ini_section_set_string(cat, "machine", p); - config_set_string(cat, "cpu_family", (char *) cpu_f->internal_name); - config_set_int(cat, "cpu_speed", cpu_f->cpus[cpu].rspeed); - config_set_double(cat, "cpu_multi", cpu_f->cpus[cpu].multi); + ini_section_set_string(cat, "cpu_family", (char *) cpu_f->internal_name); + ini_section_set_int(cat, "cpu_speed", cpu_f->cpus[cpu].rspeed); + ini_section_set_double(cat, "cpu_multi", cpu_f->cpus[cpu].multi); if (cpu_override) - config_set_int(cat, "cpu_override", cpu_override); + ini_section_set_int(cat, "cpu_override", cpu_override); else - config_delete_var(cat, "cpu_override"); + ini_section_delete_var(cat, "cpu_override"); /* Forwards compatibility with the previous CPU model system. */ - config_delete_var(cat, "cpu_manufacturer"); - config_delete_var(cat, "cpu"); + ini_section_delete_var(cat, "cpu_manufacturer"); + ini_section_delete_var(cat, "cpu"); /* Look for a machine entry on the legacy table. */ c = 0; @@ -2554,193 +2138,193 @@ save_machine(void) /* Set legacy values if a match was found. */ if (legacy_cpu > -1) { if (legacy_mfg) - config_set_int(cat, "cpu_manufacturer", legacy_mfg); + ini_section_set_int(cat, "cpu_manufacturer", legacy_mfg); if (legacy_cpu) - config_set_int(cat, "cpu", legacy_cpu); + ini_section_set_int(cat, "cpu", legacy_cpu); } } if (cpu_waitstates == 0) - config_delete_var(cat, "cpu_waitstates"); + ini_section_delete_var(cat, "cpu_waitstates"); else - config_set_int(cat, "cpu_waitstates", cpu_waitstates); + ini_section_set_int(cat, "cpu_waitstates", cpu_waitstates); if (fpu_type == 0) - config_delete_var(cat, "fpu_type"); + ini_section_delete_var(cat, "fpu_type"); else - config_set_string(cat, "fpu_type", (char *) fpu_get_internal_name(cpu_f, cpu, fpu_type)); + ini_section_set_string(cat, "fpu_type", (char *) fpu_get_internal_name(cpu_f, cpu, fpu_type)); // Write the mem_size explicitly to the setttings in order to help managers to display it without having the actual machine table - config_delete_var(cat, "mem_size"); - config_set_int(cat, "mem_size", mem_size); + ini_section_delete_var(cat, "mem_size"); + ini_section_set_int(cat, "mem_size", mem_size); - config_set_int(cat, "cpu_use_dynarec", cpu_use_dynarec); + ini_section_set_int(cat, "cpu_use_dynarec", cpu_use_dynarec); if (time_sync & TIME_SYNC_ENABLED) if (time_sync & TIME_SYNC_UTC) - config_set_string(cat, "time_sync", "utc"); + ini_section_set_string(cat, "time_sync", "utc"); else - config_set_string(cat, "time_sync", "local"); + ini_section_set_string(cat, "time_sync", "local"); else - config_set_string(cat, "time_sync", "disabled"); + ini_section_set_string(cat, "time_sync", "disabled"); if (pit_mode == -1) - config_delete_var(cat, "pit_mode"); + ini_section_delete_var(cat, "pit_mode"); else - config_set_int(cat, "pit_mode", pit_mode); + ini_section_set_int(cat, "pit_mode", pit_mode); - delete_section_if_empty(cat); + ini_delete_section_if_empty(config, cat); } /* Save "Video" section. */ static void save_video(void) { - char *cat = "Video"; + ini_section_t cat = ini_find_or_create_section(config, "Video"); - config_set_string(cat, "gfxcard", + ini_section_set_string(cat, "gfxcard", video_get_internal_name(gfxcard)); if (voodoo_enabled == 0) - config_delete_var(cat, "voodoo"); + ini_section_delete_var(cat, "voodoo"); else - config_set_int(cat, "voodoo", voodoo_enabled); + ini_section_set_int(cat, "voodoo", voodoo_enabled); if (ibm8514_enabled == 0) - config_delete_var(cat, "8514a"); + ini_section_delete_var(cat, "8514a"); else - config_set_int(cat, "8514a", ibm8514_enabled); + ini_section_set_int(cat, "8514a", ibm8514_enabled); if (xga_enabled == 0) - config_delete_var(cat, "xga"); + ini_section_delete_var(cat, "xga"); else - config_set_int(cat, "xga", xga_enabled); + ini_section_set_int(cat, "xga", xga_enabled); if (gfxcard_2 == 0) - config_delete_var(cat, "gfxcard_2"); + ini_section_delete_var(cat, "gfxcard_2"); else - config_set_string(cat, "gfxcard_2", video_get_internal_name(gfxcard_2)); + ini_section_set_string(cat, "gfxcard_2", video_get_internal_name(gfxcard_2)); if (show_second_monitors == 1) - config_delete_var(cat, "show_second_monitors"); + ini_section_delete_var(cat, "show_second_monitors"); else - config_set_int(cat, "show_second_monitors", show_second_monitors); + ini_section_set_int(cat, "show_second_monitors", show_second_monitors); if (video_fullscreen_scale_maximized == 0) - config_delete_var(cat, "video_fullscreen_scale_maximized"); + ini_section_delete_var(cat, "video_fullscreen_scale_maximized"); else - config_set_int(cat, "video_fullscreen_scale_maximized", video_fullscreen_scale_maximized); + ini_section_set_int(cat, "video_fullscreen_scale_maximized", video_fullscreen_scale_maximized); - delete_section_if_empty(cat); + ini_delete_section_if_empty(config, cat); } /* Save "Input Devices" section. */ static void save_input_devices(void) { - char *cat = "Input devices"; + ini_section_t cat = ini_find_or_create_section(config, "Input devices"); char temp[512], tmp2[512]; int c, d; - config_set_string(cat, "mouse_type", mouse_get_internal_name(mouse_type)); + ini_section_set_string(cat, "mouse_type", mouse_get_internal_name(mouse_type)); if (!joystick_type) { - config_delete_var(cat, "joystick_type"); + ini_section_delete_var(cat, "joystick_type"); for (c = 0; c < 16; c++) { sprintf(tmp2, "joystick_%i_nr", c); - config_delete_var(cat, tmp2); + ini_section_delete_var(cat, tmp2); for (d = 0; d < 16; d++) { sprintf(tmp2, "joystick_%i_axis_%i", c, d); - config_delete_var(cat, tmp2); + ini_section_delete_var(cat, tmp2); } for (d = 0; d < 16; d++) { sprintf(tmp2, "joystick_%i_button_%i", c, d); - config_delete_var(cat, tmp2); + ini_section_delete_var(cat, tmp2); } for (d = 0; d < 16; d++) { sprintf(tmp2, "joystick_%i_pov_%i", c, d); - config_delete_var(cat, tmp2); + ini_section_delete_var(cat, tmp2); } } } else { - config_set_string(cat, "joystick_type", joystick_get_internal_name(joystick_type)); + ini_section_set_string(cat, "joystick_type", joystick_get_internal_name(joystick_type)); for (c = 0; c < joystick_get_max_joysticks(joystick_type); c++) { sprintf(tmp2, "joystick_%i_nr", c); - config_set_int(cat, tmp2, joystick_state[c].plat_joystick_nr); + ini_section_set_int(cat, tmp2, joystick_state[c].plat_joystick_nr); if (joystick_state[c].plat_joystick_nr) { for (d = 0; d < joystick_get_axis_count(joystick_type); d++) { sprintf(tmp2, "joystick_%i_axis_%i", c, d); - config_set_int(cat, tmp2, joystick_state[c].axis_mapping[d]); + ini_section_set_int(cat, tmp2, joystick_state[c].axis_mapping[d]); } for (d = 0; d < joystick_get_button_count(joystick_type); d++) { sprintf(tmp2, "joystick_%i_button_%i", c, d); - config_set_int(cat, tmp2, joystick_state[c].button_mapping[d]); + ini_section_set_int(cat, tmp2, joystick_state[c].button_mapping[d]); } for (d = 0; d < joystick_get_pov_count(joystick_type); d++) { sprintf(tmp2, "joystick_%i_pov_%i", c, d); sprintf(temp, "%i, %i", joystick_state[c].pov_mapping[d][0], joystick_state[c].pov_mapping[d][1]); - config_set_string(cat, tmp2, temp); + ini_section_set_string(cat, tmp2, temp); } } } } - delete_section_if_empty(cat); + ini_delete_section_if_empty(config, cat); } /* Save "Sound" section. */ static void save_sound(void) { - char *cat = "Sound"; + ini_section_t cat = ini_find_or_create_section(config, "Sound"); if (sound_card_current == 0) - config_delete_var(cat, "sndcard"); + ini_section_delete_var(cat, "sndcard"); else - config_set_string(cat, "sndcard", sound_card_get_internal_name(sound_card_current)); + ini_section_set_string(cat, "sndcard", sound_card_get_internal_name(sound_card_current)); if (!strcmp(midi_out_device_get_internal_name(midi_output_device_current), "none")) - config_delete_var(cat, "midi_device"); + ini_section_delete_var(cat, "midi_device"); else - config_set_string(cat, "midi_device", midi_out_device_get_internal_name(midi_output_device_current)); + ini_section_set_string(cat, "midi_device", midi_out_device_get_internal_name(midi_output_device_current)); if (!strcmp(midi_in_device_get_internal_name(midi_input_device_current), "none")) - config_delete_var(cat, "midi_in_device"); + ini_section_delete_var(cat, "midi_in_device"); else - config_set_string(cat, "midi_in_device", midi_in_device_get_internal_name(midi_input_device_current)); + ini_section_set_string(cat, "midi_in_device", midi_in_device_get_internal_name(midi_input_device_current)); if (mpu401_standalone_enable == 0) - config_delete_var(cat, "mpu401_standalone"); + ini_section_delete_var(cat, "mpu401_standalone"); else - config_set_int(cat, "mpu401_standalone", mpu401_standalone_enable); + ini_section_set_int(cat, "mpu401_standalone", mpu401_standalone_enable); if (SSI2001 == 0) - config_delete_var(cat, "ssi2001"); + ini_section_delete_var(cat, "ssi2001"); else - config_set_int(cat, "ssi2001", SSI2001); + ini_section_set_int(cat, "ssi2001", SSI2001); if (GAMEBLASTER == 0) - config_delete_var(cat, "gameblaster"); + ini_section_delete_var(cat, "gameblaster"); else - config_set_int(cat, "gameblaster", GAMEBLASTER); + ini_section_set_int(cat, "gameblaster", GAMEBLASTER); if (GUS == 0) - config_delete_var(cat, "gus"); + ini_section_delete_var(cat, "gus"); else - config_set_int(cat, "gus", GUS); + ini_section_set_int(cat, "gus", GUS); if (sound_is_float == 1) - config_delete_var(cat, "sound_type"); + ini_section_delete_var(cat, "sound_type"); else - config_set_string(cat, "sound_type", (sound_is_float == 1) ? "float" : "int16"); + ini_section_set_string(cat, "sound_type", (sound_is_float == 1) ? "float" : "int16"); - config_set_string(cat, "fm_driver", (fm_driver == FM_DRV_NUKED) ? "nuked" : "ymfm"); + ini_section_set_string(cat, "fm_driver", (fm_driver == FM_DRV_NUKED) ? "nuked" : "ymfm"); - delete_section_if_empty(cat); + ini_delete_section_if_empty(config, cat); } /* Save "Network" section. */ @@ -2749,77 +2333,77 @@ save_network(void) { int c = 0; char temp[512]; - char *cat = "Network"; + ini_section_t cat = ini_find_or_create_section(config, "Network"); - config_delete_var(cat, "net_type"); - config_delete_var(cat, "net_host_device"); - config_delete_var(cat, "net_card"); + ini_section_delete_var(cat, "net_type"); + ini_section_delete_var(cat, "net_host_device"); + ini_section_delete_var(cat, "net_card"); for (c = 0; c < NET_CARD_MAX; c++) { sprintf(temp, "net_%02i_card", c + 1); if (net_cards_conf[c].device_num == 0) { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } else { - config_set_string(cat, temp, network_card_get_internal_name(net_cards_conf[c].device_num)); + ini_section_set_string(cat, temp, network_card_get_internal_name(net_cards_conf[c].device_num)); } sprintf(temp, "net_%02i_net_type", c + 1); if (net_cards_conf[c].net_type == NET_TYPE_NONE) { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } else { - config_set_string(cat, temp, + ini_section_set_string(cat, temp, (net_cards_conf[c].net_type == NET_TYPE_SLIRP) ? "slirp" : "pcap"); } sprintf(temp, "net_%02i_host_device", c + 1); if (net_cards_conf[c].host_dev_name[0] != '\0') { if (!strcmp(net_cards_conf[c].host_dev_name, "none")) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else - config_set_string(cat, temp, net_cards_conf[c].host_dev_name); + ini_section_set_string(cat, temp, net_cards_conf[c].host_dev_name); } else { - /* config_set_string(cat, temp, "none"); */ - config_delete_var(cat, temp); + /* ini_section_set_string(cat, temp, "none"); */ + ini_section_delete_var(cat, temp); } sprintf(temp, "net_%02i_link", c + 1); if (net_cards_conf[c].link_state == (NET_LINK_10_HD|NET_LINK_10_FD|NET_LINK_100_HD|NET_LINK_100_FD|NET_LINK_1000_HD|NET_LINK_1000_FD)) { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } else { - config_set_int(cat, temp, net_cards_conf[c].link_state); + ini_section_set_int(cat, temp, net_cards_conf[c].link_state); } } - delete_section_if_empty(cat); + ini_delete_section_if_empty(config, cat); } /* Save "Ports" section. */ static void save_ports(void) { - char *cat = "Ports (COM & LPT)"; + ini_section_t cat = ini_find_or_create_section(config, "Ports (COM & LPT)"); char temp[512]; int c, d; for (c = 0; c < SERIAL_MAX; c++) { sprintf(temp, "serial%d_enabled", c + 1); if (((c < 2) && com_ports[c].enabled) || ((c >= 2) && !com_ports[c].enabled)) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else - config_set_int(cat, temp, com_ports[c].enabled); + ini_section_set_int(cat, temp, com_ports[c].enabled); /* sprintf(temp, "serial%d_type", c + 1); if (!com_ports[c].enabled)) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); // else -// config_set_string(cat, temp, (char *) serial_type[c]) +// ini_section_set_string(cat, temp, (char *) serial_type[c]) sprintf(temp, "serial%d_device", c + 1); if (com_ports[c].device == 0) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else - config_set_string(cat, temp, + ini_section_set_string(cat, temp, (char *) com_device_get_internal_name(com_ports[c].device)); */ } @@ -2828,108 +2412,108 @@ save_ports(void) sprintf(temp, "lpt%d_enabled", c + 1); d = (c == 0) ? 1 : 0; if (lpt_ports[c].enabled == d) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else - config_set_int(cat, temp, lpt_ports[c].enabled); + ini_section_set_int(cat, temp, lpt_ports[c].enabled); sprintf(temp, "lpt%d_device", c + 1); if (lpt_ports[c].device == 0) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else - config_set_string(cat, temp, + ini_section_set_string(cat, temp, (char *) lpt_device_get_internal_name(lpt_ports[c].device)); } - delete_section_if_empty(cat); + ini_delete_section_if_empty(config, cat); } /* Save "Storage Controllers" section. */ static void save_storage_controllers(void) { - char *cat = "Storage controllers"; + ini_section_t cat = ini_find_or_create_section(config, "Storage controllers"); char temp[512]; int c; - config_delete_var(cat, "scsicard"); + ini_section_delete_var(cat, "scsicard"); for (c = 0; c < SCSI_BUS_MAX; c++) { sprintf(temp, "scsicard_%d", c + 1); if (scsi_card_current[c] == 0) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else - config_set_string(cat, temp, + ini_section_set_string(cat, temp, scsi_card_get_internal_name(scsi_card_current[c])); } if (fdc_type == FDC_INTERNAL) - config_delete_var(cat, "fdc"); + ini_section_delete_var(cat, "fdc"); else - config_set_string(cat, "fdc", + ini_section_set_string(cat, "fdc", fdc_card_get_internal_name(fdc_type)); - config_set_string(cat, "hdc", + ini_section_set_string(cat, "hdc", hdc_get_internal_name(hdc_current)); if (ide_ter_enabled == 0) - config_delete_var(cat, "ide_ter"); + ini_section_delete_var(cat, "ide_ter"); else - config_set_int(cat, "ide_ter", ide_ter_enabled); + ini_section_set_int(cat, "ide_ter", ide_ter_enabled); if (ide_qua_enabled == 0) - config_delete_var(cat, "ide_qua"); + ini_section_delete_var(cat, "ide_qua"); else - config_set_int(cat, "ide_qua", ide_qua_enabled); + ini_section_set_int(cat, "ide_qua", ide_qua_enabled); - delete_section_if_empty(cat); + ini_delete_section_if_empty(config, cat); if (cassette_enable == 0) - config_delete_var(cat, "cassette_enabled"); + ini_section_delete_var(cat, "cassette_enabled"); else - config_set_int(cat, "cassette_enabled", cassette_enable); + ini_section_set_int(cat, "cassette_enabled", cassette_enable); if (strlen(cassette_fname) == 0) - config_delete_var(cat, "cassette_file"); + ini_section_delete_var(cat, "cassette_file"); else - config_set_string(cat, "cassette_file", cassette_fname); + ini_section_set_string(cat, "cassette_file", cassette_fname); if (strlen(cassette_mode) == 0) - config_delete_var(cat, "cassette_mode"); + ini_section_delete_var(cat, "cassette_mode"); else - config_set_string(cat, "cassette_mode", cassette_mode); + ini_section_set_string(cat, "cassette_mode", cassette_mode); if (cassette_pos == 0) - config_delete_var(cat, "cassette_position"); + ini_section_delete_var(cat, "cassette_position"); else - config_set_int(cat, "cassette_position", cassette_pos); + ini_section_set_int(cat, "cassette_position", cassette_pos); if (cassette_srate == 44100) - config_delete_var(cat, "cassette_srate"); + ini_section_delete_var(cat, "cassette_srate"); else - config_set_int(cat, "cassette_srate", cassette_srate); + ini_section_set_int(cat, "cassette_srate", cassette_srate); if (cassette_append == 0) - config_delete_var(cat, "cassette_append"); + ini_section_delete_var(cat, "cassette_append"); else - config_set_int(cat, "cassette_append", cassette_append); + ini_section_set_int(cat, "cassette_append", cassette_append); if (cassette_pcm == 0) - config_delete_var(cat, "cassette_pcm"); + ini_section_delete_var(cat, "cassette_pcm"); else - config_set_int(cat, "cassette_pcm", cassette_pcm); + ini_section_set_int(cat, "cassette_pcm", cassette_pcm); if (cassette_ui_writeprot == 0) - config_delete_var(cat, "cassette_writeprot"); + ini_section_delete_var(cat, "cassette_writeprot"); else - config_set_int(cat, "cassette_writeprot", cassette_ui_writeprot); + ini_section_set_int(cat, "cassette_writeprot", cassette_ui_writeprot); for (c = 0; c < 2; c++) { sprintf(temp, "cartridge_%02i_fn", c + 1); if (strlen(cart_fns[c]) == 0) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else - config_set_string(cat, temp, cart_fns[c]); + ini_section_set_string(cat, temp, cart_fns[c]); } } @@ -2937,43 +2521,43 @@ save_storage_controllers(void) static void save_other_peripherals(void) { - char *cat = "Other peripherals"; + ini_section_t cat = ini_find_or_create_section(config, "Other peripherals"); char temp[512]; int c; if (bugger_enabled == 0) - config_delete_var(cat, "bugger_enabled"); + ini_section_delete_var(cat, "bugger_enabled"); else - config_set_int(cat, "bugger_enabled", bugger_enabled); + ini_section_set_int(cat, "bugger_enabled", bugger_enabled); if (postcard_enabled == 0) - config_delete_var(cat, "postcard_enabled"); + ini_section_delete_var(cat, "postcard_enabled"); else - config_set_int(cat, "postcard_enabled", postcard_enabled); + ini_section_set_int(cat, "postcard_enabled", postcard_enabled); for (c = 0; c < ISAMEM_MAX; c++) { sprintf(temp, "isamem%d_type", c); if (isamem_type[c] == 0) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else - config_set_string(cat, temp, + ini_section_set_string(cat, temp, (char *) isamem_get_internal_name(isamem_type[c])); } if (isartc_type == 0) - config_delete_var(cat, "isartc_type"); + ini_section_delete_var(cat, "isartc_type"); else - config_set_string(cat, "isartc_type", + ini_section_set_string(cat, "isartc_type", isartc_get_internal_name(isartc_type)); - delete_section_if_empty(cat); + ini_delete_section_if_empty(config, cat); } /* Save "Hard Disks" section. */ static void save_hard_disks(void) { - char *cat = "Hard disks"; + ini_section_t cat = ini_find_or_create_section(config, "Hard disks"); char temp[32], tmp2[512]; char *p; int c; @@ -2985,268 +2569,268 @@ save_hard_disks(void) p = hdd_bus_to_string(hdd[c].bus, 0); sprintf(tmp2, "%u, %u, %u, %i, %s", hdd[c].spt, hdd[c].hpc, hdd[c].tracks, hdd[c].wp, p); - config_set_string(cat, temp, tmp2); + ini_section_set_string(cat, temp, tmp2); } else { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } sprintf(temp, "hdd_%02i_mfm_channel", c + 1); if (hdd_is_valid(c) && (hdd[c].bus == HDD_BUS_MFM)) - config_set_int(cat, temp, hdd[c].mfm_channel); + ini_section_set_int(cat, temp, hdd[c].mfm_channel); else - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "hdd_%02i_xta_channel", c + 1); if (hdd_is_valid(c) && (hdd[c].bus == HDD_BUS_XTA)) - config_set_int(cat, temp, hdd[c].xta_channel); + ini_section_set_int(cat, temp, hdd[c].xta_channel); else - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "hdd_%02i_esdi_channel", c + 1); if (hdd_is_valid(c) && (hdd[c].bus == HDD_BUS_ESDI)) - config_set_int(cat, temp, hdd[c].esdi_channel); + ini_section_set_int(cat, temp, hdd[c].esdi_channel); else - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "hdd_%02i_ide_channel", c + 1); if (!hdd_is_valid(c) || (hdd[c].bus != HDD_BUS_IDE)) { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } else { sprintf(tmp2, "%01u:%01u", hdd[c].ide_channel >> 1, hdd[c].ide_channel & 1); - config_set_string(cat, temp, tmp2); + ini_section_set_string(cat, temp, tmp2); } sprintf(temp, "hdd_%02i_scsi_id", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "hdd_%02i_scsi_location", c + 1); if (hdd[c].bus != HDD_BUS_SCSI) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else { sprintf(tmp2, "%01u:%02u", hdd[c].scsi_id >> 4, hdd[c].scsi_id & 15); - config_set_string(cat, temp, tmp2); + ini_section_set_string(cat, temp, tmp2); } sprintf(temp, "hdd_%02i_fn", c + 1); if (hdd_is_valid(c) && (strlen(hdd[c].fn) != 0)) { path_normalize(hdd[c].fn); if (!strnicmp(hdd[c].fn, usr_path, strlen(usr_path))) - config_set_string(cat, temp, &hdd[c].fn[strlen(usr_path)]); + ini_section_set_string(cat, temp, &hdd[c].fn[strlen(usr_path)]); else - config_set_string(cat, temp, hdd[c].fn); + ini_section_set_string(cat, temp, hdd[c].fn); } else - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "hdd_%02i_speed", c + 1); if (!hdd_is_valid(c) || (hdd[c].bus != HDD_BUS_IDE && hdd[c].bus != HDD_BUS_ESDI)) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else - config_set_string(cat, temp, hdd_preset_get_internal_name(hdd[c].speed_preset)); + ini_section_set_string(cat, temp, hdd_preset_get_internal_name(hdd[c].speed_preset)); } - delete_section_if_empty(cat); + ini_delete_section_if_empty(config, cat); } /* Save "Floppy Drives" section. */ static void save_floppy_and_cdrom_drives(void) { - char *cat = "Floppy and CD-ROM drives"; + ini_section_t cat = ini_find_or_create_section(config, "Floppy and CD-ROM drives"); char temp[512], tmp2[512]; int c; for (c = 0; c < FDD_NUM; c++) { sprintf(temp, "fdd_%02i_type", c + 1); if (fdd_get_type(c) == ((c < 2) ? 2 : 0)) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else - config_set_string(cat, temp, + ini_section_set_string(cat, temp, fdd_get_internal_name(fdd_get_type(c))); sprintf(temp, "fdd_%02i_fn", c + 1); if (strlen(floppyfns[c]) == 0) { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); ui_writeprot[c] = 0; sprintf(temp, "fdd_%02i_writeprot", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } else { - config_set_string(cat, temp, floppyfns[c]); + ini_section_set_string(cat, temp, floppyfns[c]); } sprintf(temp, "fdd_%02i_writeprot", c + 1); if (ui_writeprot[c] == 0) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else - config_set_int(cat, temp, ui_writeprot[c]); + ini_section_set_int(cat, temp, ui_writeprot[c]); sprintf(temp, "fdd_%02i_turbo", c + 1); if (fdd_get_turbo(c) == 0) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else - config_set_int(cat, temp, fdd_get_turbo(c)); + ini_section_set_int(cat, temp, fdd_get_turbo(c)); sprintf(temp, "fdd_%02i_check_bpb", c + 1); if (fdd_get_check_bpb(c) == 1) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else - config_set_int(cat, temp, fdd_get_check_bpb(c)); + ini_section_set_int(cat, temp, fdd_get_check_bpb(c)); } for (c = 0; c < CDROM_NUM; c++) { sprintf(temp, "cdrom_%02i_host_drive", c + 1); if ((cdrom[c].bus_type == 0) || (cdrom[c].host_drive != 200)) { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } else { - config_set_int(cat, temp, cdrom[c].host_drive); + ini_section_set_int(cat, temp, cdrom[c].host_drive); } sprintf(temp, "cdrom_%02i_speed", c + 1); if ((cdrom[c].bus_type == 0) || (cdrom[c].speed == 8)) { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } else { - config_set_int(cat, temp, cdrom[c].speed); + ini_section_set_int(cat, temp, cdrom[c].speed); } sprintf(temp, "cdrom_%02i_parameters", c + 1); if (cdrom[c].bus_type == 0) { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } else { sprintf(tmp2, "%u, %s", cdrom[c].sound_on, hdd_bus_to_string(cdrom[c].bus_type, 1)); - config_set_string(cat, temp, tmp2); + ini_section_set_string(cat, temp, tmp2); } sprintf(temp, "cdrom_%02i_ide_channel", c + 1); if (cdrom[c].bus_type != CDROM_BUS_ATAPI) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else { sprintf(tmp2, "%01u:%01u", cdrom[c].ide_channel >> 1, cdrom[c].ide_channel & 1); - config_set_string(cat, temp, tmp2); + ini_section_set_string(cat, temp, tmp2); } sprintf(temp, "cdrom_%02i_scsi_id", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "cdrom_%02i_scsi_location", c + 1); if (cdrom[c].bus_type != CDROM_BUS_SCSI) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else { sprintf(tmp2, "%01u:%02u", cdrom[c].scsi_device_id >> 4, cdrom[c].scsi_device_id & 15); - config_set_string(cat, temp, tmp2); + ini_section_set_string(cat, temp, tmp2); } sprintf(temp, "cdrom_%02i_image_path", c + 1); if ((cdrom[c].bus_type == 0) || (strlen(cdrom[c].image_path) == 0)) { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } else { - config_set_string(cat, temp, cdrom[c].image_path); + ini_section_set_string(cat, temp, cdrom[c].image_path); } for (int i = 0; i < MAX_PREV_IMAGES; i++) { sprintf(temp, "cdrom_%02i_image_history_%02i", c + 1, i + 1); if((cdrom[c].image_history[i] == 0) || strlen(cdrom[c].image_history[i]) == 0) { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } else { - config_set_string(cat, temp, cdrom[c].image_history[i]); + ini_section_set_string(cat, temp, cdrom[c].image_history[i]); } } } - delete_section_if_empty(cat); + ini_delete_section_if_empty(config, cat); } /* Save "Other Removable Devices" section. */ static void save_other_removable_devices(void) { - char *cat = "Other removable devices"; + ini_section_t cat = ini_find_or_create_section(config, "Other removable devices"); char temp[512], tmp2[512]; int c; for (c = 0; c < ZIP_NUM; c++) { sprintf(temp, "zip_%02i_parameters", c + 1); if (zip_drives[c].bus_type == 0) { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } else { sprintf(tmp2, "%u, %s", zip_drives[c].is_250, hdd_bus_to_string(zip_drives[c].bus_type, 1)); - config_set_string(cat, temp, tmp2); + ini_section_set_string(cat, temp, tmp2); } sprintf(temp, "zip_%02i_ide_channel", c + 1); if (zip_drives[c].bus_type != ZIP_BUS_ATAPI) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else { sprintf(tmp2, "%01u:%01u", zip_drives[c].ide_channel >> 1, zip_drives[c].ide_channel & 1); - config_set_string(cat, temp, tmp2); + ini_section_set_string(cat, temp, tmp2); } sprintf(temp, "zip_%02i_scsi_id", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "zip_%02i_scsi_location", c + 1); if (zip_drives[c].bus_type != ZIP_BUS_SCSI) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else { sprintf(tmp2, "%01u:%02u", zip_drives[c].scsi_device_id >> 4, zip_drives[c].scsi_device_id & 15); - config_set_string(cat, temp, tmp2); + ini_section_set_string(cat, temp, tmp2); } sprintf(temp, "zip_%02i_image_path", c + 1); if ((zip_drives[c].bus_type == 0) || (strlen(zip_drives[c].image_path) == 0)) { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } else { - config_set_string(cat, temp, zip_drives[c].image_path); + ini_section_set_string(cat, temp, zip_drives[c].image_path); } } for (c = 0; c < MO_NUM; c++) { sprintf(temp, "mo_%02i_parameters", c + 1); if (mo_drives[c].bus_type == 0) { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } else { sprintf(tmp2, "%u, %s", mo_drives[c].type, hdd_bus_to_string(mo_drives[c].bus_type, 1)); - config_set_string(cat, temp, tmp2); + ini_section_set_string(cat, temp, tmp2); } sprintf(temp, "mo_%02i_ide_channel", c + 1); if (mo_drives[c].bus_type != MO_BUS_ATAPI) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else { sprintf(tmp2, "%01u:%01u", mo_drives[c].ide_channel >> 1, mo_drives[c].ide_channel & 1); - config_set_string(cat, temp, tmp2); + ini_section_set_string(cat, temp, tmp2); } sprintf(temp, "mo_%02i_scsi_id", c + 1); - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); sprintf(temp, "mo_%02i_scsi_location", c + 1); if (mo_drives[c].bus_type != MO_BUS_SCSI) - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); else { sprintf(tmp2, "%01u:%02u", mo_drives[c].scsi_device_id >> 4, mo_drives[c].scsi_device_id & 15); - config_set_string(cat, temp, tmp2); + ini_section_set_string(cat, temp, tmp2); } sprintf(temp, "mo_%02i_image_path", c + 1); if ((mo_drives[c].bus_type == 0) || (strlen(mo_drives[c].image_path) == 0)) { - config_delete_var(cat, temp); + ini_section_delete_var(cat, temp); } else { - config_set_string(cat, temp, mo_drives[c].image_path); + ini_section_set_string(cat, temp, mo_drives[c].image_path); } } - delete_section_if_empty(cat); + ini_delete_section_if_empty(config, cat); } void @@ -3269,317 +2853,11 @@ config_save(void) save_other_removable_devices(); /* Other removable devices */ save_other_peripherals(); /* Other peripherals */ - config_write(cfg_path); + ini_write(config, cfg_path); } -void -config_dump(void) +ini_t +config_get_ini(void) { - section_t *sec; - - sec = (section_t *) config_head.next; - while (sec != NULL) { - entry_t *ent; - - if (sec->name[0]) - config_log("[%s]\n", sec->name); - - ent = (entry_t *) sec->entry_head.next; - while (ent != NULL) { - config_log("%s = %s\n", ent->name, ent->data); - - ent = (entry_t *) ent->list.next; - } - - sec = (section_t *) sec->list.next; - } -} - -void -config_delete_var(char *head, char *name) -{ - section_t *section; - entry_t *entry; - - section = find_section(head); - if (section == NULL) - return; - - entry = find_entry(section, name); - if (entry != NULL) { - list_delete(&entry->list, §ion->entry_head); - free(entry); - } -} - -int -config_get_int(char *head, char *name, int def) -{ - section_t *section; - entry_t *entry; - int value; - - section = find_section(head); - if (section == NULL) - return (def); - - entry = find_entry(section, name); - if (entry == NULL) - return (def); - - sscanf(entry->data, "%i", &value); - - return (value); -} - -double -config_get_double(char *head, char *name, double def) -{ - section_t *section; - entry_t *entry; - double value; - - section = find_section(head); - if (section == NULL) - return (def); - - entry = find_entry(section, name); - if (entry == NULL) - return (def); - - sscanf(entry->data, "%lg", &value); - - return (value); -} - -int -config_get_hex16(char *head, char *name, int def) -{ - section_t *section; - entry_t *entry; - unsigned int value; - - section = find_section(head); - if (section == NULL) - return (def); - - entry = find_entry(section, name); - if (entry == NULL) - return (def); - - sscanf(entry->data, "%04X", &value); - - return (value); -} - -int -config_get_hex20(char *head, char *name, int def) -{ - section_t *section; - entry_t *entry; - unsigned int value; - - section = find_section(head); - if (section == NULL) - return (def); - - entry = find_entry(section, name); - if (entry == NULL) - return (def); - - sscanf(entry->data, "%05X", &value); - - return (value); -} - -int -config_get_mac(char *head, char *name, int def) -{ - section_t *section; - entry_t *entry; - unsigned int val0 = 0, val1 = 0, val2 = 0; - - section = find_section(head); - if (section == NULL) - return (def); - - entry = find_entry(section, name); - if (entry == NULL) - return (def); - - sscanf(entry->data, "%02x:%02x:%02x", &val0, &val1, &val2); - - return ((val0 << 16) + (val1 << 8) + val2); -} - -char * -config_get_string(char *head, char *name, char *def) -{ - section_t *section; - entry_t *entry; - - section = find_section(head); - if (section == NULL) - return (def); - - entry = find_entry(section, name); - if (entry == NULL) - return (def); - - return (entry->data); -} - -wchar_t * -config_get_wstring(char *head, char *name, wchar_t *def) -{ - section_t *section; - entry_t *entry; - - section = find_section(head); - if (section == NULL) - return (def); - - entry = find_entry(section, name); - if (entry == NULL) - return (def); - - return (entry->wdata); -} - -void -config_set_int(char *head, char *name, int val) -{ - section_t *section; - entry_t *ent; - - section = find_section(head); - if (section == NULL) - section = create_section(head); - - ent = find_entry(section, name); - if (ent == NULL) - ent = create_entry(section, name); - - sprintf(ent->data, "%i", val); - mbstowcs(ent->wdata, ent->data, 512); -} - -void -config_set_double(char *head, char *name, double val) -{ - section_t *section; - entry_t *ent; - - section = find_section(head); - if (section == NULL) - section = create_section(head); - - ent = find_entry(section, name); - if (ent == NULL) - ent = create_entry(section, name); - - sprintf(ent->data, "%lg", val); - mbstowcs(ent->wdata, ent->data, 512); -} - -void -config_set_hex16(char *head, char *name, int val) -{ - section_t *section; - entry_t *ent; - - section = find_section(head); - if (section == NULL) - section = create_section(head); - - ent = find_entry(section, name); - if (ent == NULL) - ent = create_entry(section, name); - - sprintf(ent->data, "%04X", val); - mbstowcs(ent->wdata, ent->data, sizeof_w(ent->wdata)); -} - -void -config_set_hex20(char *head, char *name, int val) -{ - section_t *section; - entry_t *ent; - - section = find_section(head); - if (section == NULL) - section = create_section(head); - - ent = find_entry(section, name); - if (ent == NULL) - ent = create_entry(section, name); - - sprintf(ent->data, "%05X", val); - mbstowcs(ent->wdata, ent->data, sizeof_w(ent->wdata)); -} - -void -config_set_mac(char *head, char *name, int val) -{ - section_t *section; - entry_t *ent; - - section = find_section(head); - if (section == NULL) - section = create_section(head); - - ent = find_entry(section, name); - if (ent == NULL) - ent = create_entry(section, name); - - sprintf(ent->data, "%02x:%02x:%02x", - (val >> 16) & 0xff, (val >> 8) & 0xff, val & 0xff); - mbstowcs(ent->wdata, ent->data, 512); -} - -void -config_set_string(char *head, char *name, char *val) -{ - section_t *section; - entry_t *ent; - - section = find_section(head); - if (section == NULL) - section = create_section(head); - - ent = find_entry(section, name); - if (ent == NULL) - ent = create_entry(section, name); - - if ((strlen(val) + 1) <= sizeof(ent->data)) - memcpy(ent->data, val, strlen(val) + 1); - else - memcpy(ent->data, val, sizeof(ent->data)); -#ifdef _WIN32 /* Make sure the string is converted from UTF-8 rather than a legacy codepage */ - mbstoc16s(ent->wdata, ent->data, sizeof_w(ent->wdata)); -#else - mbstowcs(ent->wdata, ent->data, sizeof_w(ent->wdata)); -#endif -} - -void -config_set_wstring(char *head, char *name, wchar_t *val) -{ - section_t *section; - entry_t *ent; - - section = find_section(head); - if (section == NULL) - section = create_section(head); - - ent = find_entry(section, name); - if (ent == NULL) - ent = create_entry(section, name); - - memcpy(ent->wdata, val, sizeof_w(ent->wdata)); -#ifdef _WIN32 /* Make sure the string is converted to UTF-8 rather than a legacy codepage */ - c16stombs(ent->data, ent->wdata, sizeof(ent->data)); -#else - wcstombs(ent->data, ent->wdata, sizeof(ent->data)); -#endif + return config; } diff --git a/src/device.c b/src/device.c index c69acaad0..0eace721e 100644 --- a/src/device.c +++ b/src/device.c @@ -45,6 +45,7 @@ #include #define HAVE_STDARG_H #include <86box/86box.h> +#include <86box/ini.h> #include <86box/config.h> #include <86box/device.h> #include <86box/machine.h> diff --git a/src/include/86box/config.h b/src/include/86box/config.h index 86bf39dce..1cddddaab 100644 --- a/src/include/86box/config.h +++ b/src/include/86box/config.h @@ -136,27 +136,33 @@ typedef struct { extern void config_load(void); extern void config_save(void); -extern void config_write(char *fn); -extern void config_dump(void); -extern void config_delete_var(char *head, char *name); -extern int config_get_int(char *head, char *name, int def); -extern double config_get_double(char *head, char *name, double def); -extern int config_get_hex16(char *head, char *name, int def); -extern int config_get_hex20(char *head, char *name, int def); -extern int config_get_mac(char *head, char *name, int def); -extern char *config_get_string(char *head, char *name, char *def); -extern wchar_t *config_get_wstring(char *head, char *name, wchar_t *def); -extern void config_set_int(char *head, char *name, int val); -extern void config_set_double(char *head, char *name, double val); -extern void config_set_hex16(char *head, char *name, int val); -extern void config_set_hex20(char *head, char *name, int val); -extern void config_set_mac(char *head, char *name, int val); -extern void config_set_string(char *head, char *name, char *val); -extern void config_set_wstring(char *head, char *name, wchar_t *val); +#ifdef EMU_INI_H +extern ini_t config_get_ini(void); +#else +extern void *config_get_ini(void); +#endif -extern void *config_find_section(char *name); -extern void config_rename_section(void *priv, char *name); +#define config_delete_var(head, name) ini_delete_var(config_get_ini(), head, name) + +#define config_get_int(head, name, def) ini_get_int(config_get_ini(), head, name, def) +#define config_get_double(head, name, def) ini_get_double(config_get_ini(), head, name, def) +#define config_get_hex16(head, name, def) ini_get_hex16(config_get_ini(), head, name, def) +#define config_get_hex20(head, name, def) ini_get_hex20(config_get_ini(), head, name, def) +#define config_get_mac(head, name, def) ini_get_mac(config_get_ini(), head, name, def) +#define config_get_string(head, name, def) ini_get_string(config_get_ini(), head, name, def) +#define config_get_wstring(head, name, def) ini_get_wstring(config_get_ini(), head, name, def) + +#define config_set_int(head, name, val) ini_set_int(config_get_ini(), head, name, val) +#define config_set_double(head, name, val) ini_set_double(config_get_ini(), head, name, val) +#define config_set_hex16(head, name, val) ini_set_hex16(config_get_ini(), head, name, val) +#define config_set_hex20(head, name, val) ini_set_hex20(config_get_ini(), head, name, val) +#define config_set_mac(head, name, val) ini_set_mac(config_get_ini(), head, name, val) +#define config_set_string(head, name, val) ini_set_string(config_get_ini(), head, name, val) +#define config_set_wstring(head, name, val) ini_set_wstring(config_get_ini(), head, name, val) + +#define config_find_section(name) ini_find_section(config_get_ini(), name) +#define config_rename_section ini_rename_section #ifdef __cplusplus } diff --git a/src/include/86box/ini.h b/src/include/86box/ini.h new file mode 100644 index 000000000..43b71f357 --- /dev/null +++ b/src/include/86box/ini.h @@ -0,0 +1,81 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Configuration file handler header. + * + * + * + * Authors: Sarah Walker, + * Miran Grca, + * Fred N. van Kempen, + * Overdoze, + * + * Copyright 2008-2017 Sarah Walker. + * Copyright 2016,2017 Miran Grca. + * + */ +#ifndef EMU_INI_H +#define EMU_INI_H + +#ifdef __cplusplus +extern "C" { +#endif + +typedef void *ini_t; +typedef void *ini_section_t; + +extern ini_t ini_new(void); +extern ini_t ini_read(char *fn); +extern void ini_write(ini_t ini, char *fn); +extern void ini_dump(ini_t ini); +extern void ini_close(ini_t ini); + +extern void ini_section_delete_var(ini_section_t section, char *name); +extern int ini_section_get_int(ini_section_t section, char *name, int def); +extern double ini_section_get_double(ini_section_t section, char *name, double def); +extern int ini_section_get_hex16(ini_section_t section, char *name, int def); +extern int ini_section_get_hex20(ini_section_t section, char *name, int def); +extern int ini_section_get_mac(ini_section_t section, char *name, int def); +extern char *ini_section_get_string(ini_section_t section, char *name, char *def); +extern wchar_t *ini_section_get_wstring(ini_section_t section, char *name, wchar_t *def); +extern void ini_section_set_int(ini_section_t section, char *name, int val); +extern void ini_section_set_double(ini_section_t section, char *name, double val); +extern void ini_section_set_hex16(ini_section_t section, char *name, int val); +extern void ini_section_set_hex20(ini_section_t section, char *name, int val); +extern void ini_section_set_mac(ini_section_t section, char *name, int val); +extern void ini_section_set_string(ini_section_t section, char *name, char *val); +extern void ini_section_set_wstring(ini_section_t section, char *name, wchar_t *val); + +#define ini_delete_var(ini, head, name) ini_section_delete_var(ini_find_section(ini, head), name) + +#define ini_get_int(ini, head, name, def) ini_section_get_int(ini_find_section(ini, head), name, def) +#define ini_get_double(ini, head, name, def) ini_section_get_double(ini_find_section(ini, head), name, def) +#define ini_get_hex16(ini, head, name, def) ini_section_get_hex16(ini_find_section(ini, head), name, def) +#define ini_get_hex20(ini, head, name, def) ini_section_get_hex20(ini_find_section(ini, head), name, def) +#define ini_get_mac(ini, head, name, def) ini_section_get_mac(ini_find_section(ini, head), name, def) +#define ini_get_string(ini, head, name, def) ini_section_get_string(ini_find_section(ini, head), name, def) +#define ini_get_wstring(ini, head, name, def) ini_section_get_wstring(ini_find_section(ini, head), name, def) + +#define ini_set_int(ini, head, name, val) ini_section_set_int(ini_find_or_create_section(ini, head), name, val) +#define ini_set_double(ini, head, name, val) ini_section_set_double(ini_find_or_create_section(ini, head), name, val) +#define ini_set_hex16(ini, head, name, val) ini_section_set_hex16(ini_find_or_create_section(ini, head), name, val) +#define ini_set_hex20(ini, head, name, val) ini_section_set_hex20(ini_find_or_create_section(ini, head), name, val) +#define ini_set_mac(ini, head, name, val) ini_section_set_mac(ini_find_or_create_section(ini, head), name, val) +#define ini_set_string(ini, head, name, val) ini_section_set_string(ini_find_or_create_section(ini, head), name, val) +#define ini_set_wstring(ini, head, name, val) ini_section_set_wstring(ini_find_or_create_section(ini, head), name, val) + +extern ini_section_t ini_find_section(ini_t ini, char *name); +extern ini_section_t ini_find_or_create_section(ini_t ini, char *name); +extern void ini_rename_section(ini_section_t section, char *name); +extern void ini_delete_section_if_empty(ini_t ini, ini_section_t section); + +#ifdef __cplusplus +} +#endif + +#endif \ No newline at end of file diff --git a/src/ini.c b/src/ini.c new file mode 100644 index 000000000..167d3c67e --- /dev/null +++ b/src/ini.c @@ -0,0 +1,795 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Configuration file handler. + * + * + * + * Authors: Sarah Walker, + * Miran Grca, + * Fred N. van Kempen, + * Overdoze, + * David Hrdlička, + * + * Copyright 2008-2019 Sarah Walker. + * Copyright 2016-2019 Miran Grca. + * Copyright 2017-2019 Fred N. van Kempen. + * Copyright 2018,2019 David Hrdlička. + * + * NOTE: Forcing config files to be in Unicode encoding breaks + * it on Windows XP, and possibly also Vista. Use the + * -DANSI_CFG for use on these systems. + */ + +#include +#include +#include +#include +#include +#include +#include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include <86box/ini.h> +#include <86box/plat.h> + +typedef struct _list_ { + struct _list_ *next; +} list_t; + +typedef struct { + list_t list; + + char name[128]; + + list_t entry_head; +} section_t; + +typedef struct { + list_t list; + + char name[128]; + char data[512]; + wchar_t wdata[512]; +} entry_t; + +#define list_add(new, head) \ + { \ + list_t *next = head; \ + \ + while (next->next != NULL) \ + next = next->next; \ + \ + (next)->next = new; \ + (new)->next = NULL; \ + } + +#define list_delete(old, head) \ + { \ + list_t *next = head; \ + \ + while ((next)->next != old) { \ + next = (next)->next; \ + } \ + \ + (next)->next = (old)->next; \ + if ((next) == (head)) \ + (head)->next = (old)->next; \ + } + +#ifdef ENABLE_INI_LOG +int ini_do_log = ENABLE_INI_LOG; + +static void +ini_log(const char *fmt, ...) +{ + va_list ap; + + if (ini_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +# define ini_log(fmt, ...) +#endif + +static section_t * +find_section(list_t *head, char *name) +{ + section_t *sec = (section_t *) head->next; + char blank[] = ""; + + if (name == NULL) + name = blank; + + while (sec != NULL) { + if (!strncmp(sec->name, name, sizeof(sec->name))) + return (sec); + + sec = (section_t *) sec->list.next; + } + + return NULL; +} + +ini_section_t +ini_find_section(ini_t ini, char *name) +{ + if (ini == NULL) + return NULL; + + return (ini_section_t) find_section((list_t *) ini, name); +} + +void +ini_rename_section(ini_section_t section, char *name) +{ + section_t *sec = (section_t *) section; + + if (sec == NULL) + return; + + memset(sec->name, 0x00, sizeof(sec->name)); + memcpy(sec->name, name, MIN(128, strlen(name) + 1)); +} + +static entry_t * +find_entry(section_t *section, char *name) +{ + entry_t *ent; + + ent = (entry_t *) section->entry_head.next; + + while (ent != NULL) { + if (!strncmp(ent->name, name, sizeof(ent->name))) + return (ent); + + ent = (entry_t *) ent->list.next; + } + + return (NULL); +} + +static int +entries_num(section_t *section) +{ + entry_t *ent; + int i = 0; + + ent = (entry_t *) section->entry_head.next; + + while (ent != NULL) { + if (strlen(ent->name) > 0) + i++; + + ent = (entry_t *) ent->list.next; + } + + return (i); +} + +static void +delete_section_if_empty(list_t *head, section_t *section) +{ + if (section == NULL) + return; + + if (entries_num(section) == 0) { + list_delete(§ion->list, head); + free(section); + } +} + +void +ini_delete_section_if_empty(ini_t ini, ini_section_t section) +{ + if (ini == NULL || section == NULL) + return; + + delete_section_if_empty((list_t *) ini, (section_t *) section); +} + +static section_t * +create_section(list_t *head, char *name) +{ + section_t *ns = malloc(sizeof(section_t)); + + memset(ns, 0x00, sizeof(section_t)); + memcpy(ns->name, name, strlen(name) + 1); + list_add(&ns->list, head); + + return (ns); +} + +ini_section_t +ini_find_or_create_section(ini_t ini, char *name) +{ + if (ini == NULL) + return NULL; + + section_t *section = find_section((list_t *) ini, name); + if (section == NULL) + section = create_section((list_t *) ini, name); + + return (ini_section_t) section; +} + +static entry_t * +create_entry(section_t *section, char *name) +{ + entry_t *ne = malloc(sizeof(entry_t)); + + memset(ne, 0x00, sizeof(entry_t)); + memcpy(ne->name, name, strlen(name) + 1); + list_add(&ne->list, §ion->entry_head); + + return (ne); +} + +static void +ini_close(ini_t ini) +{ + section_t *sec, *ns; + entry_t *ent; + list_t *list = (list_t *) ini; + + if (list == NULL) + return; + + sec = (section_t *) list->next; + while (sec != NULL) { + ns = (section_t *) sec->list.next; + ent = (entry_t *) sec->entry_head.next; + + while (ent != NULL) { + entry_t *nent = (entry_t *) ent->list.next; + + free(ent); + ent = nent; + } + + free(sec); + sec = ns; + } + + free(list); +} + +static int +ini_detect_bom(char *fn) +{ + FILE *f; + unsigned char bom[4] = { 0, 0, 0, 0 }; + +#if defined(ANSI_CFG) || !defined(_WIN32) + f = plat_fopen(fn, "rt"); +#else + f = plat_fopen(fn, "rt, ccs=UTF-8"); +#endif + if (f == NULL) + return (0); + fread(bom, 1, 3, f); + if (bom[0] == 0xEF && bom[1] == 0xBB && bom[2] == 0xBF) { + fclose(f); + return 1; + } + fclose(f); + return 0; +} + +#ifdef __HAIKU__ +/* Local version of fgetws to avoid a crash */ +static wchar_t * +ini_fgetws(wchar_t *str, int count, FILE *stream) +{ + int i = 0; + if (feof(stream)) + return NULL; + for (i = 0; i < count; i++) { + wint_t curChar = fgetwc(stream); + if (curChar == WEOF) { + if (i + 1 < count) + str[i + 1] = 0; + return feof(stream) ? str : NULL; + } + str[i] = curChar; + if (curChar == '\n') + break; + } + if (i + 1 < count) + str[i + 1] = 0; + return str; +} +#endif + +/* Read and parse the configuration file into memory. */ +ini_t +ini_read(char *fn) +{ + char sname[128], ename[128]; + wchar_t buff[1024]; + section_t *sec, *ns; + entry_t *ne; + int c, d, bom; + FILE *f; + list_t *head; + + bom = ini_detect_bom(fn); +#if defined(ANSI_CFG) || !defined(_WIN32) + f = plat_fopen(fn, "rt"); +#else + f = plat_fopen(fn, "rt, ccs=UTF-8"); +#endif + if (f == NULL) + return NULL; + + head = malloc(sizeof(list_t)); + memset(head, 0x00, sizeof(list_t)); + + sec = malloc(sizeof(section_t)); + memset(sec, 0x00, sizeof(section_t)); + + list_add(&sec->list, head); + if (bom) + fseek(f, 3, SEEK_SET); + + while (1) { + memset(buff, 0x00, sizeof(buff)); +#ifdef __HAIKU__ + ini_fgetws(buff, sizeof_w(buff), f); +#else + (void) !fgetws(buff, sizeof_w(buff), f); +#endif + if (feof(f)) + break; + + /* Make sure there are no stray newlines or hard-returns in there. */ + if (wcslen(buff) > 0) + if (buff[wcslen(buff) - 1] == L'\n') + buff[wcslen(buff) - 1] = L'\0'; + if (wcslen(buff) > 0) + if (buff[wcslen(buff) - 1] == L'\r') + buff[wcslen(buff) - 1] = L'\0'; + + /* Skip any leading whitespace. */ + c = 0; + while ((buff[c] == L' ') || (buff[c] == L'\t')) + c++; + + /* Skip empty lines. */ + if (buff[c] == L'\0') + continue; + + /* Skip lines that (only) have a comment. */ + if ((buff[c] == L'#') || (buff[c] == L';')) + continue; + + if (buff[c] == L'[') { /*Section*/ + c++; + d = 0; + while (buff[c] != L']' && buff[c]) + (void) !wctomb(&(sname[d++]), buff[c++]); + sname[d] = L'\0'; + + /* Is the section name properly terminated? */ + if (buff[c] != L']') + continue; + + /* Create a new section and insert it. */ + ns = malloc(sizeof(section_t)); + memset(ns, 0x00, sizeof(section_t)); + memcpy(ns->name, sname, 128); + list_add(&ns->list, head); + + /* New section is now the current one. */ + sec = ns; + continue; + } + + /* Get the variable name. */ + d = 0; + while ((buff[c] != L'=') && (buff[c] != L' ') && buff[c]) + (void) !wctomb(&(ename[d++]), buff[c++]); + ename[d] = L'\0'; + + /* Skip incomplete lines. */ + if (buff[c] == L'\0') + continue; + + /* Look for =, skip whitespace. */ + while ((buff[c] == L'=' || buff[c] == L' ') && buff[c]) + c++; + + /* Skip incomplete lines. */ + if (buff[c] == L'\0') + continue; + + /* This is where the value part starts. */ + d = c; + + /* Allocate a new variable entry.. */ + ne = malloc(sizeof(entry_t)); + memset(ne, 0x00, sizeof(entry_t)); + memcpy(ne->name, ename, 128); + wcsncpy(ne->wdata, &buff[d], sizeof_w(ne->wdata) - 1); + ne->wdata[sizeof_w(ne->wdata) - 1] = L'\0'; +#ifdef _WIN32 /* Make sure the string is converted to UTF-8 rather than a legacy codepage */ + c16stombs(ne->data, ne->wdata, sizeof(ne->data)); +#else + wcstombs(ne->data, ne->wdata, sizeof(ne->data)); +#endif + ne->data[sizeof(ne->data) - 1] = '\0'; + + /* .. and insert it. */ + list_add(&ne->list, &sec->entry_head); + } + + (void) fclose(f); + + return (ini_t) head; +} + +/* Write the in-memory configuration to disk. */ +void +ini_write(ini_t ini, char *fn) +{ + wchar_t wtemp[512]; + list_t *list = (list_t *) ini; + section_t *sec; + FILE *f; + int fl = 0; + + if (list == NULL) + return; + + sec = (section_t *) list->next; + +#if defined(ANSI_CFG) || !defined(_WIN32) + f = plat_fopen(fn, "wt"); +#else + f = plat_fopen(fn, "wt, ccs=UTF-8"); +#endif + if (f == NULL) + return; + + while (sec != NULL) { + entry_t *ent; + + if (sec->name[0]) { + mbstowcs(wtemp, sec->name, strlen(sec->name) + 1); + if (fl) + fwprintf(f, L"\n[%ls]\n", wtemp); + else + fwprintf(f, L"[%ls]\n", wtemp); + fl++; + } + + ent = (entry_t *) sec->entry_head.next; + while (ent != NULL) { + if (ent->name[0] != '\0') { + mbstowcs(wtemp, ent->name, 128); + if (ent->wdata[0] == L'\0') + fwprintf(f, L"%ls = \n", wtemp); + else + fwprintf(f, L"%ls = %ls\n", wtemp, ent->wdata); + fl++; + } + + ent = (entry_t *) ent->list.next; + } + + sec = (section_t *) sec->list.next; + } + + (void) fclose(f); +} + +ini_t +ini_new() +{ + ini_t ini = malloc(sizeof(list_t)); + memset(ini, 0, sizeof(list_t)); + return ini; +} + +void +ini_dump(ini_t ini) +{ + section_t *sec = (section_t *) ini; + while (sec != NULL) { + entry_t *ent; + + if (sec->name[0]) + ini_log("[%s]\n", sec->name); + + ent = (entry_t *) sec->entry_head.next; + while (ent != NULL) { + ini_log("%s = %s\n", ent->name, ent->data); + + ent = (entry_t *) ent->list.next; + } + + sec = (section_t *) sec->list.next; + } +} + +void +ini_section_delete_var(ini_section_t self, char *name) +{ + section_t *section = (section_t *) self; + entry_t *entry; + + if (section == NULL) + return; + + entry = find_entry(section, name); + if (entry != NULL) { + list_delete(&entry->list, §ion->entry_head); + free(entry); + } +} + +int +ini_section_get_int(ini_section_t self, char *name, int def) +{ + section_t *section = (section_t *) self; + entry_t *entry; + int value; + + if (section == NULL) + return (def); + + entry = find_entry(section, name); + if (entry == NULL) + return (def); + + sscanf(entry->data, "%i", &value); + + return (value); +} + +double +ini_section_get_double(ini_section_t self, char *name, double def) +{ + section_t *section = (section_t *) self; + entry_t *entry; + double value; + + if (section == NULL) + return (def); + + entry = find_entry(section, name); + if (entry == NULL) + return (def); + + sscanf(entry->data, "%lg", &value); + + return (value); +} + +int +ini_section_get_hex16(ini_section_t self, char *name, int def) +{ + section_t *section = (section_t *) self; + entry_t *entry; + unsigned int value; + + if (section == NULL) + return (def); + + entry = find_entry(section, name); + if (entry == NULL) + return (def); + + sscanf(entry->data, "%04X", &value); + + return (value); +} + +int +ini_section_get_hex20(ini_section_t self, char *name, int def) +{ + section_t *section = (section_t *) self; + entry_t *entry; + unsigned int value; + + if (section == NULL) + return (def); + + entry = find_entry(section, name); + if (entry == NULL) + return (def); + + sscanf(entry->data, "%05X", &value); + + return (value); +} + +int +ini_section_get_mac(ini_section_t self, char *name, int def) +{ + section_t *section = (section_t *) self; + entry_t *entry; + unsigned int val0 = 0, val1 = 0, val2 = 0; + + if (section == NULL) + return (def); + + entry = find_entry(section, name); + if (entry == NULL) + return (def); + + sscanf(entry->data, "%02x:%02x:%02x", &val0, &val1, &val2); + + return ((val0 << 16) + (val1 << 8) + val2); +} + +char * +ini_section_get_string(ini_section_t self, char *name, char *def) +{ + section_t *section = (section_t *) self; + entry_t *entry; + + if (section == NULL) + return (def); + + entry = find_entry(section, name); + if (entry == NULL) + return (def); + + return (entry->data); +} + +wchar_t * +ini_section_get_wstring(ini_section_t self, char *name, wchar_t *def) +{ + section_t *section = (section_t *) self; + entry_t *entry; + + if (section == NULL) + return (def); + + entry = find_entry(section, name); + if (entry == NULL) + return (def); + + return (entry->wdata); +} + +void +ini_section_set_int(ini_section_t self, char *name, int val) +{ + section_t *section = (section_t *) self; + entry_t *ent; + + if (section == NULL) + return; + + ent = find_entry(section, name); + if (ent == NULL) + ent = create_entry(section, name); + + sprintf(ent->data, "%i", val); + mbstowcs(ent->wdata, ent->data, 512); +} + +void +ini_section_set_double(ini_section_t self, char *name, double val) +{ + section_t *section = (section_t *) self; + entry_t *ent; + + if (section == NULL) + return; + + ent = find_entry(section, name); + if (ent == NULL) + ent = create_entry(section, name); + + sprintf(ent->data, "%lg", val); + mbstowcs(ent->wdata, ent->data, 512); +} + +void +ini_section_set_hex16(ini_section_t self, char *name, int val) +{ + section_t *section = (section_t *) self; + entry_t *ent; + + if (section == NULL) + return; + + ent = find_entry(section, name); + if (ent == NULL) + ent = create_entry(section, name); + + sprintf(ent->data, "%04X", val); + mbstowcs(ent->wdata, ent->data, sizeof_w(ent->wdata)); +} + +void +ini_section_set_hex20(ini_section_t self, char *name, int val) +{ + section_t *section = (section_t *) self; + entry_t *ent; + + if (section == NULL) + return; + + ent = find_entry(section, name); + if (ent == NULL) + ent = create_entry(section, name); + + sprintf(ent->data, "%05X", val); + mbstowcs(ent->wdata, ent->data, sizeof_w(ent->wdata)); +} + +void +ini_section_set_mac(ini_section_t self, char *name, int val) +{ + section_t *section = (section_t *) self; + entry_t *ent; + + if (section == NULL) + return; + + ent = find_entry(section, name); + if (ent == NULL) + ent = create_entry(section, name); + + sprintf(ent->data, "%02x:%02x:%02x", + (val >> 16) & 0xff, (val >> 8) & 0xff, val & 0xff); + mbstowcs(ent->wdata, ent->data, 512); +} + +void +ini_section_set_string(ini_section_t self, char *name, char *val) +{ + section_t *section = (section_t *) self; + entry_t *ent; + + if (section == NULL) + return; + + ent = find_entry(section, name); + if (ent == NULL) + ent = create_entry(section, name); + + if ((strlen(val) + 1) <= sizeof(ent->data)) + memcpy(ent->data, val, strlen(val) + 1); + else + memcpy(ent->data, val, sizeof(ent->data)); +#ifdef _WIN32 /* Make sure the string is converted from UTF-8 rather than a legacy codepage */ + mbstoc16s(ent->wdata, ent->data, sizeof_w(ent->wdata)); +#else + mbstowcs(ent->wdata, ent->data, sizeof_w(ent->wdata)); +#endif +} + +void +ini_section_set_wstring(ini_section_t self, char *name, wchar_t *val) +{ + section_t *section = (section_t *) self; + entry_t *ent; + + if (section == NULL) + return; + + ent = find_entry(section, name); + if (ent == NULL) + ent = create_entry(section, name); + + memcpy(ent->wdata, val, sizeof_w(ent->wdata)); +#ifdef _WIN32 /* Make sure the string is converted to UTF-8 rather than a legacy codepage */ + c16stombs(ent->data, ent->wdata, sizeof(ent->data)); +#else + wcstombs(ent->data, ent->wdata, sizeof(ent->data)); +#endif +} diff --git a/src/network/net_slirp.c b/src/network/net_slirp.c index 24b75e208..0bbd534b3 100644 --- a/src/network/net_slirp.c +++ b/src/network/net_slirp.c @@ -35,6 +35,7 @@ #include <86box/timer.h> #include <86box/network.h> #include <86box/machine.h> +#include <86box/ini.h> #include <86box/config.h> #include <86box/video.h> #ifdef _WIN32 diff --git a/src/qt/qt_deviceconfig.cpp b/src/qt/qt_deviceconfig.cpp index 6ebc59b5d..7218aab6e 100644 --- a/src/qt/qt_deviceconfig.cpp +++ b/src/qt/qt_deviceconfig.cpp @@ -28,6 +28,7 @@ extern "C" { #include <86box/86box.h> +#include <86box/ini.h> #include <86box/config.h> #include <86box/device.h> #include <86box/midi_rtmidi.h> diff --git a/src/sound/midi_rtmidi.cpp b/src/sound/midi_rtmidi.cpp index c60f224ab..16538cf9e 100644 --- a/src/sound/midi_rtmidi.cpp +++ b/src/sound/midi_rtmidi.cpp @@ -34,6 +34,7 @@ extern "C" #include <86box/device.h> #include <86box/midi.h> #include <86box/midi_rtmidi.h> +#include <86box/ini.h> #include <86box/config.h> // Disable c99-designator to avoid the warnings in rtmidi_*_device From 08f48b8b00256ad6b475b3099d12fbecbb6d4ba5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20Hrdli=C4=8Dka?= Date: Sat, 10 Sep 2022 13:47:36 +0200 Subject: [PATCH 346/386] ini: Fix `ini_close` definition --- src/ini.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/ini.c b/src/ini.c index 167d3c67e..6c4565bb9 100644 --- a/src/ini.c +++ b/src/ini.c @@ -233,7 +233,7 @@ create_entry(section_t *section, char *name) return (ne); } -static void +void ini_close(ini_t ini) { section_t *sec, *ns; From 2cc7fc666bf38e68f00ad1be36abbc07a3e0f8a4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20Hrdli=C4=8Dka?= Date: Sat, 10 Sep 2022 13:48:48 +0200 Subject: [PATCH 347/386] ini: Add to legacy makefile --- src/win/Makefile.mingw | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 6d5fb92fe..cdc59e485 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -536,7 +536,7 @@ CXXFLAGS := $(CFLAGS) ######################################################################### MAINOBJ := 86box.o config.o log.o random.o timer.o io.o acpi.o apm.o dma.o ddma.o \ nmi.o pic.o pit.o pit_fast.o port_6x.o port_92.o ppi.o pci.o mca.o fifo8.o \ - usb.o device.o nvr.o nvr_at.o nvr_ps2.o machine_status.o \ + usb.o device.o nvr.o nvr_at.o nvr_ps2.o machine_status.o ini.o \ $(VNCOBJ) MEMOBJ := catalyst_flash.o i2c_eeprom.o intel_flash.o mem.o rom.o smram.o spd.o sst_flash.o From 70711759751380875c16a27058a8d98750760791 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20Hrdli=C4=8Dka?= Date: Sat, 10 Sep 2022 14:46:47 +0200 Subject: [PATCH 348/386] ini: Fix the legacy Windows UI --- src/win/win_devconf.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/win/win_devconf.c b/src/win/win_devconf.c index c5ddf9cb6..602aaa174 100644 --- a/src/win/win_devconf.c +++ b/src/win/win_devconf.c @@ -22,6 +22,7 @@ #include #include #include <86box/86box.h> +#include <86box/ini.h> #include <86box/config.h> #include <86box/device.h> #include <86box/plat.h> From e5d6430ec8375276550ce1cdb32e9942d1e24345 Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Mon, 12 Sep 2022 09:48:14 -0400 Subject: [PATCH 349/386] qt: Fix potential null pointer access in media history --- src/qt/qt_mediahistorymanager.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/qt/qt_mediahistorymanager.cpp b/src/qt/qt_mediahistorymanager.cpp index a672c0843..884a13de5 100644 --- a/src/qt/qt_mediahistorymanager.cpp +++ b/src/qt/qt_mediahistorymanager.cpp @@ -132,8 +132,9 @@ void MediaHistoryManager::serializeImageHistoryType(ui::MediaType type) continue; } for ( int slot = 0; slot < MAX_PREV_IMAGES; slot++) { - strncpy(device_history_ptr[slot], master_list[type][device][slot].toUtf8().constData(), MAX_IMAGE_PATH_LEN); - + if (device_history_ptr[slot] != nullptr) { + strncpy(device_history_ptr[slot], master_list[type][device][slot].toUtf8().constData(), MAX_IMAGE_PATH_LEN); + } } } } From dc046c5b5f5ffa5e3a50eb853d5b57bbc4f0d535 Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Mon, 12 Sep 2022 10:10:22 -0400 Subject: [PATCH 350/386] qt: Use a single loop for icon dir search --- src/qt/qt_progsettings.cpp | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/src/qt/qt_progsettings.cpp b/src/qt/qt_progsettings.cpp index dcfdbab85..6018b0158 100644 --- a/src/qt/qt_progsettings.cpp +++ b/src/qt/qt_progsettings.cpp @@ -46,16 +46,12 @@ QTranslator* ProgSettings::qtTranslator = nullptr; QString ProgSettings::getIconSetPath() { if (iconset_to_qt.isEmpty()) { - QVector roms_dirs; - // Walk rom_paths to get the candidates - for (rom_path_t *emu_rom_path = &rom_paths; emu_rom_path != nullptr; emu_rom_path = emu_rom_path->next) { - roms_dirs.append(QFileInfo(emu_rom_path->path)); - } // Always include default bundled icons iconset_to_qt.insert("", ":/settings/win/icons"); - for (auto &checked_dir : roms_dirs) { + // Walk rom_paths to get the candidates + for (rom_path_t *emu_rom_path = &rom_paths; emu_rom_path != nullptr; emu_rom_path = emu_rom_path->next) { // Check for icons subdir in each candidate - QDir roms_icons_dir(checked_dir.filePath() + "/icons"); + QDir roms_icons_dir(QString(emu_rom_path->path) + "/icons"); if (roms_icons_dir.isReadable()) { auto dirList = roms_icons_dir.entryList(QDir::AllDirs | QDir::Executable | QDir::Readable); for (auto &curIconSet : dirList) { From 84f5d9c39320e3676c102dd49df93c76bb826c35 Mon Sep 17 00:00:00 2001 From: Jameson Ernst Date: Wed, 14 Sep 2022 22:11:32 -0700 Subject: [PATCH 351/386] Improve handling of High-DPI mice - Reduce lower bound of mouse sensitivity - Add error accumulators to prevent small motions from being rounded off --- src/config.c | 4 ++-- src/include/86box/86box.h | 1 + src/qt/qt_progsettings.ui | 2 +- src/qt/qt_rendererstack.cpp | 11 +++++++++-- src/unix/unix_sdl.c | 1 + src/win/win_mouse.c | 1 + 6 files changed, 15 insertions(+), 5 deletions(-) diff --git a/src/config.c b/src/config.c index 01710ebc4..69c4e7c6b 100644 --- a/src/config.c +++ b/src/config.c @@ -180,8 +180,8 @@ load_general(void) lang_id = plat_language_code(p); mouse_sensitivity = ini_section_get_double(cat, "mouse_sensitivity", 1.0); - if (mouse_sensitivity < 0.5) - mouse_sensitivity = 0.5; + if (mouse_sensitivity < 0.1) + mouse_sensitivity = 0.1; else if (mouse_sensitivity > 2.0) mouse_sensitivity = 2.0; diff --git a/src/include/86box/86box.h b/src/include/86box/86box.h index fce923e4f..4f9ccabed 100644 --- a/src/include/86box/86box.h +++ b/src/include/86box/86box.h @@ -136,6 +136,7 @@ extern int is_pentium; /* TODO: Move back to cpu/cpu.h when it's figured out, how to remove that hack from the ET4000/W32p. */ extern int fixed_size_x, fixed_size_y; extern double mouse_sensitivity; /* (C) Mouse sensitivity scale */ +extern double mouse_x_error, mouse_y_error; /* Mouse error accumulators */ extern int pit_mode; /* (C) force setting PIT mode */ extern int fm_driver; /* (C) select FM sound driver */ diff --git a/src/qt/qt_progsettings.ui b/src/qt/qt_progsettings.ui index 05775489f..fa0818652 100644 --- a/src/qt/qt_progsettings.ui +++ b/src/qt/qt_progsettings.ui @@ -88,7 +88,7 @@ - 50 + 10 200 diff --git a/src/qt/qt_rendererstack.cpp b/src/qt/qt_rendererstack.cpp index 6beb37516..f0e5b12e0 100644 --- a/src/qt/qt_rendererstack.cpp +++ b/src/qt/qt_rendererstack.cpp @@ -54,6 +54,7 @@ extern "C" { #include <86box/video.h> double mouse_sensitivity = 1.0; +double mouse_x_error = 0.0, mouse_y_error = 0.0; } struct mouseinputdata { @@ -151,8 +152,14 @@ RendererStack::mousePoll() #endif this->mouse_poll_func(); - mouse_x *= mouse_sensitivity; - mouse_y *= mouse_sensitivity; + double scaled_x = mouse_x * mouse_sensitivity + mouse_x_error; + double scaled_y = mouse_y * mouse_sensitivity + mouse_y_error; + + mouse_x = static_cast(scaled_x); + mouse_y = static_cast(scaled_y); + + mouse_x_error = scaled_x - mouse_x; + mouse_y_error = scaled_y - mouse_y; } int ignoreNextMouseEvent = 1; diff --git a/src/unix/unix_sdl.c b/src/unix/unix_sdl.c index 3d989bf53..b023299d2 100644 --- a/src/unix/unix_sdl.c +++ b/src/unix/unix_sdl.c @@ -44,6 +44,7 @@ int resize_pending = 0; int resize_w = 0; int resize_h = 0; double mouse_sensitivity = 1.0; /* Unused. */ +double mouse_x_error = 0.0, mouse_y_error = 0.0; /* Unused. */ static uint8_t interpixels[17842176]; extern void RenderImGui(); diff --git a/src/win/win_mouse.c b/src/win/win_mouse.c index bb592f419..dfc0ac691 100644 --- a/src/win/win_mouse.c +++ b/src/win/win_mouse.c @@ -29,6 +29,7 @@ int mouse_capture; double mouse_sensitivity = 1.0; /* Unused. */ +double mouse_x_error = 0.0, mouse_y_error = 0.0; /* Unused. */ typedef struct { int buttons; From be910fb683912c1b3a266b3bf0601a3224e3ce3e Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 16:01:29 -0400 Subject: [PATCH 352/386] Don't sort includes --- .clang-format | 1 + 1 file changed, 1 insertion(+) diff --git a/.clang-format b/.clang-format index 7e38e8e4b..c5bb52eed 100644 --- a/.clang-format +++ b/.clang-format @@ -16,3 +16,4 @@ IndentPPDirectives: AfterHash IndentExternBlock: NoIndent PointerAlignment: Right SpaceAfterCStyleCast: true +SortIncludes: false From c95c79a580d50ff054bf593acaede855dd4c6d12 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 16:04:23 -0400 Subject: [PATCH 353/386] named initializers in isapnp --- src/device/isapnp.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/src/device/isapnp.c b/src/device/isapnp.c index 45752a3ca..669a45eec 100644 --- a/src/device/isapnp.c +++ b/src/device/isapnp.c @@ -1064,11 +1064,15 @@ isapnp_reset_device(void *priv, uint8_t ldn) static const device_t isapnp_device = { - "ISA Plug and Play", - "isapnp", - 0, - 0, - isapnp_init, isapnp_close, NULL, - { NULL }, NULL, NULL, - NULL + .name = "ISA Plug and Play", + .internal_name = "isapnp", + .flags = 0, + .local = 0, + .init = isapnp_init, + .close = isapnp_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL }; From e6dbaefeb19c6da96fa628a9517a5d5d1188d2e6 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:11:43 -0400 Subject: [PATCH 354/386] clang-format in src/ --- src/86box.c | 1527 +++++++++++++++++------------------ src/acpi.c | 1819 ++++++++++++++++++++++-------------------- src/apm.c | 88 +- src/arch_detect.c | 8 +- src/config.c | 220 +++-- src/ddma.c | 185 +++-- src/device.c | 586 +++++++------- src/dma.c | 1794 ++++++++++++++++++++--------------------- src/fifo8.c | 51 +- src/gdbstub.c | 8 +- src/ini.c | 2 +- src/io.c | 614 +++++++------- src/ioapic.c | 62 +- src/log.c | 65 +- src/machine_status.c | 13 +- src/mca.c | 128 +-- src/nmi.c | 15 +- src/nvr.c | 220 +++-- src/nvr_at.c | 1250 ++++++++++++++--------------- src/nvr_ps2.c | 119 ++- src/pci.c | 935 +++++++++++----------- src/pci_dummy.c | 401 +++++----- src/pic.c | 593 +++++++------- src/pit.c | 1148 +++++++++++++------------- src/pit_fast.c | 126 +-- src/port_6x.c | 122 ++- src/port_92.c | 151 ++-- src/ppi.c | 2 - src/random.c | 74 +- src/thread.cpp | 47 +- src/timer.c | 150 ++-- src/upi42.c | 468 ++++++----- src/usb.c | 484 +++++------ src/vnc.c | 243 +++--- src/vnc_keymap.c | 782 +++++++++--------- 35 files changed, 7113 insertions(+), 7387 deletions(-) diff --git a/src/86box.c b/src/86box.c index 3e1bd6e3c..b1176bb69 100644 --- a/src/86box.c +++ b/src/86box.c @@ -31,15 +31,15 @@ #include #ifndef _WIN32 -#include -#include +# include +# include #endif #ifdef __APPLE__ -#include -#include -#ifdef __aarch64__ -#include -#endif +# include +# include +# ifdef __aarch64__ +# include +# endif #endif #define HAVE_STDARG_H @@ -48,7 +48,7 @@ #include <86box/mem.h> #include "cpu.h" #ifdef USE_DYNAREC -# include "codegen_public.h" +# include "codegen_public.h" #endif #include "x86_ops.h" #include <86box/io.h> @@ -99,95 +99,94 @@ // Disable c99-designator to avoid the warnings about int ng #ifdef __clang__ -#if __has_warning("-Wunused-but-set-variable") -#pragma clang diagnostic ignored "-Wunused-but-set-variable" +# if __has_warning("-Wunused-but-set-variable") +# pragma clang diagnostic ignored "-Wunused-but-set-variable" +# endif #endif -#endif - /* Stuff that used to be globally declared in plat.h but is now extern there and declared here instead. */ -int dopause; /* system is paused */ -atomic_flag doresize; /* screen resize requested */ -volatile int is_quit; /* system exit requested */ -uint64_t timer_freq; -char emu_version[200]; /* version ID string */ +int dopause; /* system is paused */ +atomic_flag doresize; /* screen resize requested */ +volatile int is_quit; /* system exit requested */ +uint64_t timer_freq; +char emu_version[200]; /* version ID string */ #ifdef MTR_ENABLED -int tracing_on = 0; +int tracing_on = 0; #endif /* Commandline options. */ -int dump_on_exit = 0; /* (O) dump regs on exit */ -int do_dump_config = 0; /* (O) dump config on load */ -int start_in_fullscreen = 0; /* (O) start in fullscreen */ +int dump_on_exit = 0; /* (O) dump regs on exit */ +int do_dump_config = 0; /* (O) dump config on load */ +int start_in_fullscreen = 0; /* (O) start in fullscreen */ #ifdef _WIN32 -int force_debug = 0; /* (O) force debug output */ +int force_debug = 0; /* (O) force debug output */ #endif #ifdef USE_WX -int video_fps = RENDER_FPS; /* (O) render speed in fps */ +int video_fps = RENDER_FPS; /* (O) render speed in fps */ #endif -int settings_only = 0; /* (O) show only the settings dialog */ -int confirm_exit_cmdl = 1; /* (O) do not ask for confirmation on quit if set to 0 */ +int settings_only = 0; /* (O) show only the settings dialog */ +int confirm_exit_cmdl = 1; /* (O) do not ask for confirmation on quit if set to 0 */ #ifdef _WIN32 -uint64_t unique_id = 0; -uint64_t source_hwnd = 0; +uint64_t unique_id = 0; +uint64_t source_hwnd = 0; #endif -char rom_path[1024] = { '\0'}; /* (O) full path to ROMs */ -rom_path_t rom_paths = { "", NULL }; /* (O) full paths to ROMs */ -char log_path[1024] = { '\0'}; /* (O) full path of logfile */ -char vm_name[1024] = { '\0'}; /* (O) display name of the VM */ +char rom_path[1024] = { '\0' }; /* (O) full path to ROMs */ +rom_path_t rom_paths = { "", NULL }; /* (O) full paths to ROMs */ +char log_path[1024] = { '\0' }; /* (O) full path of logfile */ +char vm_name[1024] = { '\0' }; /* (O) display name of the VM */ #ifdef USE_INSTRUMENT -uint8_t instru_enabled = 0; -uint64_t instru_run_ms = 0; +uint8_t instru_enabled = 0; +uint64_t instru_run_ms = 0; #endif /* Configuration values. */ -int window_remember; -int vid_resize; /* (C) allow resizing */ -int invert_display = 0; /* (C) invert the display */ -int suppress_overscan = 0; /* (C) suppress overscans */ -int scale = 0; /* (C) screen scale factor */ -int dpi_scale = 0; /* (C) DPI scaling of the emulated screen */ -int vid_api = 0; /* (C) video renderer */ -int vid_cga_contrast = 0; /* (C) video */ -int video_fullscreen = 0; /* (C) video */ -int video_fullscreen_scale = 0; /* (C) video */ -int video_fullscreen_first = 0; /* (C) video */ -int enable_overscan = 0; /* (C) video */ -int force_43 = 0; /* (C) video */ -int video_filter_method = 1; /* (C) video */ -int video_vsync = 0; /* (C) video */ -int video_framerate = -1; /* (C) video */ -char video_shader[512] = { '\0' }; /* (C) video */ -int bugger_enabled = 0; /* (C) enable ISAbugger */ -int postcard_enabled = 0; /* (C) enable POST card */ -int isamem_type[ISAMEM_MAX] = { 0,0,0,0 }; /* (C) enable ISA mem cards */ -int isartc_type = 0; /* (C) enable ISA RTC card */ -int gfxcard = 0; /* (C) graphics/video card */ -int gfxcard_2 = 0; /* (C) graphics/video card */ -int show_second_monitors = 1; /* (C) show non-primary monitors */ -int sound_is_float = 1; /* (C) sound uses FP values */ -int GAMEBLASTER = 0; /* (C) sound option */ -int GUS = 0; /* (C) sound option */ -int SSI2001 = 0; /* (C) sound option */ -int voodoo_enabled = 0; /* (C) video option */ -int ibm8514_enabled = 0; /* (C) video option */ -int xga_enabled = 0; /* (C) video option */ -uint32_t mem_size = 0; /* (C) memory size (Installed on system board)*/ -uint32_t isa_mem_size = 0; /* (C) memory size (ISA Memory Cards) */ -int cpu_use_dynarec = 0; /* (C) cpu uses/needs Dyna */ -int cpu = 0; /* (C) cpu type */ -int fpu_type = 0; /* (C) fpu type */ -int time_sync = 0; /* (C) enable time sync */ -int confirm_reset = 1; /* (C) enable reset confirmation */ -int confirm_exit = 1; /* (C) enable exit confirmation */ -int confirm_save = 1; /* (C) enable save confirmation */ -int enable_discord = 0; /* (C) enable Discord integration */ -int pit_mode = -1; /* (C) force setting PIT mode */ -int fm_driver = 0; /* (C) select FM sound driver */ -int open_dir_usr_path = 0; /* default file open dialog directory of usr_path */ -int video_fullscreen_scale_maximized = 0; /* (C) Whether fullscreen scaling settings also apply when maximized. */ +int window_remember; +int vid_resize; /* (C) allow resizing */ +int invert_display = 0; /* (C) invert the display */ +int suppress_overscan = 0; /* (C) suppress overscans */ +int scale = 0; /* (C) screen scale factor */ +int dpi_scale = 0; /* (C) DPI scaling of the emulated screen */ +int vid_api = 0; /* (C) video renderer */ +int vid_cga_contrast = 0; /* (C) video */ +int video_fullscreen = 0; /* (C) video */ +int video_fullscreen_scale = 0; /* (C) video */ +int video_fullscreen_first = 0; /* (C) video */ +int enable_overscan = 0; /* (C) video */ +int force_43 = 0; /* (C) video */ +int video_filter_method = 1; /* (C) video */ +int video_vsync = 0; /* (C) video */ +int video_framerate = -1; /* (C) video */ +char video_shader[512] = { '\0' }; /* (C) video */ +int bugger_enabled = 0; /* (C) enable ISAbugger */ +int postcard_enabled = 0; /* (C) enable POST card */ +int isamem_type[ISAMEM_MAX] = { 0, 0, 0, 0 }; /* (C) enable ISA mem cards */ +int isartc_type = 0; /* (C) enable ISA RTC card */ +int gfxcard = 0; /* (C) graphics/video card */ +int gfxcard_2 = 0; /* (C) graphics/video card */ +int show_second_monitors = 1; /* (C) show non-primary monitors */ +int sound_is_float = 1; /* (C) sound uses FP values */ +int GAMEBLASTER = 0; /* (C) sound option */ +int GUS = 0; /* (C) sound option */ +int SSI2001 = 0; /* (C) sound option */ +int voodoo_enabled = 0; /* (C) video option */ +int ibm8514_enabled = 0; /* (C) video option */ +int xga_enabled = 0; /* (C) video option */ +uint32_t mem_size = 0; /* (C) memory size (Installed on system board)*/ +uint32_t isa_mem_size = 0; /* (C) memory size (ISA Memory Cards) */ +int cpu_use_dynarec = 0; /* (C) cpu uses/needs Dyna */ +int cpu = 0; /* (C) cpu type */ +int fpu_type = 0; /* (C) fpu type */ +int time_sync = 0; /* (C) enable time sync */ +int confirm_reset = 1; /* (C) enable reset confirmation */ +int confirm_exit = 1; /* (C) enable exit confirmation */ +int confirm_save = 1; /* (C) enable save confirmation */ +int enable_discord = 0; /* (C) enable Discord integration */ +int pit_mode = -1; /* (C) force setting PIT mode */ +int fm_driver = 0; /* (C) select FM sound driver */ +int open_dir_usr_path = 0; /* default file open dialog directory of usr_path */ +int video_fullscreen_scale_maximized = 0; /* (C) Whether fullscreen scaling settings also apply when maximized. */ /* Statistics. */ extern int mmuflush; @@ -195,36 +194,33 @@ extern int readlnum; extern int writelnum; /* emulator % */ -int fps; +int fps; int framecount; -extern int CPUID; -extern int output; -int atfullspeed; +extern int CPUID; +extern int output; +int atfullspeed; -char exe_path[2048]; /* path (dir) of executable */ -char usr_path[1024]; /* path (dir) of user data */ -char cfg_path[1024]; /* full path of config file */ -FILE *stdlog = NULL; /* file to log output to */ -//int scrnsz_x = SCREEN_RES_X; /* current screen size, X */ -//int scrnsz_y = SCREEN_RES_Y; /* current screen size, Y */ -int config_changed; /* config has changed */ -int title_update; -int framecountx = 0; -int hard_reset_pending = 0; +char exe_path[2048]; /* path (dir) of executable */ +char usr_path[1024]; /* path (dir) of user data */ +char cfg_path[1024]; /* full path of config file */ +FILE *stdlog = NULL; /* file to log output to */ +// int scrnsz_x = SCREEN_RES_X; /* current screen size, X */ +// int scrnsz_y = SCREEN_RES_Y; /* current screen size, Y */ +int config_changed; /* config has changed */ +int title_update; +int framecountx = 0; +int hard_reset_pending = 0; +// int unscaled_size_x = SCREEN_RES_X; /* current unscaled size X */ +// int unscaled_size_y = SCREEN_RES_Y; /* current unscaled size Y */ +// int efscrnsz_y = SCREEN_RES_Y; -//int unscaled_size_x = SCREEN_RES_X; /* current unscaled size X */ -//int unscaled_size_y = SCREEN_RES_Y; /* current unscaled size Y */ -//int efscrnsz_y = SCREEN_RES_Y; - - -static wchar_t mouse_msg[3][200]; - +static wchar_t mouse_msg[3][200]; #ifndef RELEASE_BUILD static char buff[1024]; -static int seen = 0; +static int seen = 0; static int suppr_seen = 1; #endif @@ -243,73 +239,70 @@ pclog_ex(const char *fmt, va_list ap) char temp[1024]; if (strcmp(fmt, "") == 0) - return; + return; if (stdlog == NULL) { - if (log_path[0] != '\0') { - stdlog = plat_fopen(log_path, "w"); - if (stdlog == NULL) - stdlog = stdout; - } else - stdlog = stdout; + if (log_path[0] != '\0') { + stdlog = plat_fopen(log_path, "w"); + if (stdlog == NULL) + stdlog = stdout; + } else + stdlog = stdout; } vsprintf(temp, fmt, ap); - if (suppr_seen && ! strcmp(buff, temp)) - seen++; + if (suppr_seen && !strcmp(buff, temp)) + seen++; else { - if (suppr_seen && seen) - fprintf(stdlog, "*** %d repeats ***\n", seen); - seen = 0; - strcpy(buff, temp); - fprintf(stdlog, "%s", temp); + if (suppr_seen && seen) + fprintf(stdlog, "*** %d repeats ***\n", seen); + seen = 0; + strcpy(buff, temp); + fprintf(stdlog, "%s", temp); } fflush(stdlog); #endif } - void pclog_toggle_suppr(void) { #ifndef RELEASE_BUILD - suppr_seen ^= 1; + suppr_seen ^= 1; #endif } - /* Log something. We only do this in non-release builds. */ void pclog(const char *fmt, ...) { #ifndef RELEASE_BUILD - va_list ap; + va_list ap; - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); #endif } - /* Log a fatal error, and display a UI message before exiting. */ void fatal(const char *fmt, ...) { - char temp[1024]; + char temp[1024]; va_list ap; - char *sp; + char *sp; va_start(ap, fmt); if (stdlog == NULL) { - if (log_path[0] != '\0') { - stdlog = plat_fopen(log_path, "w"); - if (stdlog == NULL) - stdlog = stdout; - } else - stdlog = stdout; + if (log_path[0] != '\0') { + stdlog = plat_fopen(log_path, "w"); + if (stdlog == NULL) + stdlog = stdout; + } else + stdlog = stdout; } vsprintf(temp, fmt, ap); @@ -326,7 +319,8 @@ fatal(const char *fmt, ...) #endif /* Make sure the message does not have a trailing newline. */ - if ((sp = strchr(temp, '\n')) != NULL) *sp = '\0'; + if ((sp = strchr(temp, '\n')) != NULL) + *sp = '\0'; /* Cleanly terminate all of the emulator's components so as to avoid things like threads getting stuck. */ @@ -339,20 +333,19 @@ fatal(const char *fmt, ...) exit(-1); } - void fatal_ex(const char *fmt, va_list ap) { - char temp[1024]; + char temp[1024]; char *sp; if (stdlog == NULL) { - if (log_path[0] != '\0') { - stdlog = plat_fopen(log_path, "w"); - if (stdlog == NULL) - stdlog = stdout; - } else - stdlog = stdout; + if (log_path[0] != '\0') { + stdlog = plat_fopen(log_path, "w"); + if (stdlog == NULL) + stdlog = stdout; + } else + stdlog = stdout; } vsprintf(temp, fmt, ap); @@ -368,7 +361,8 @@ fatal_ex(const char *fmt, va_list ap) #endif /* Make sure the message does not have a trailing newline. */ - if ((sp = strchr(temp, '\n')) != NULL) *sp = '\0'; + if ((sp = strchr(temp, '\n')) != NULL) + *sp = '\0'; /* Cleanly terminate all of the emulator's components so as to avoid things like threads getting stuck. */ @@ -379,27 +373,24 @@ fatal_ex(const char *fmt, va_list ap) fflush(stdlog); } - #ifdef ENABLE_PC_LOG int pc_do_log = ENABLE_PC_LOG; - static void pc_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (pc_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (pc_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define pc_log(fmt, ...) +# define pc_log(fmt, ...) #endif - /* * Perform initial startup of the PC. * @@ -410,34 +401,34 @@ pc_log(const char *fmt, ...) int pc_init(int argc, char *argv[]) { - char *ppath = NULL, *rpath = NULL; - char *cfg = NULL, *p; - char temp[2048]; - struct tm *info; - time_t now; - int c, lvmp = 0; + char *ppath = NULL, *rpath = NULL; + char *cfg = NULL, *p; + char temp[2048]; + struct tm *info; + time_t now; + int c, lvmp = 0; #ifdef ENABLE_NG - int ng = 0; + int ng = 0; #endif #ifdef _WIN32 - uint32_t *uid, *shwnd; + uint32_t *uid, *shwnd; #endif - uint32_t lang_init = 0; + uint32_t lang_init = 0; - /* Grab the executable's full path. */ - plat_get_exe_name(exe_path, sizeof(exe_path)-1); - p = path_get_filename(exe_path); - *p = '\0'; + /* Grab the executable's full path. */ + plat_get_exe_name(exe_path, sizeof(exe_path) - 1); + p = path_get_filename(exe_path); + *p = '\0'; #if defined(__APPLE__) c = strlen(exe_path); if ((c >= 16) && !strcmp(&exe_path[c - 16], "/Contents/MacOS/")) { exe_path[c - 16] = '\0'; - p = path_get_filename(exe_path); - *p = '\0'; + p = path_get_filename(exe_path); + *p = '\0'; } if (!strncmp(exe_path, "/private/var/folders/", 21)) { ui_msgbox_header(MBX_FATAL, L"App Translocation", EMU_NAME_W L" cannot determine the emulated machine's location due to a macOS security feature. Please move the " EMU_NAME_W L" app to another folder (not /Applications), or make a copy of it and open that copy instead."); - return(0); + return (0); } #elif !defined(_WIN32) /* Grab the actual path if we are an AppImage. */ @@ -446,184 +437,179 @@ pc_init(int argc, char *argv[]) path_get_dirname(exe_path, p); #endif - path_slash(exe_path); + path_slash(exe_path); - /* - * Get the current working directory. - * - * This is normally the directory from where the - * program was run. If we have been started via - * a shortcut (desktop icon), however, the CWD - * could have been set to something else. - */ - plat_getcwd(usr_path, sizeof(usr_path) - 1); - plat_getcwd(rom_path, sizeof(rom_path) - 1); + /* + * Get the current working directory. + * + * This is normally the directory from where the + * program was run. If we have been started via + * a shortcut (desktop icon), however, the CWD + * could have been set to something else. + */ + plat_getcwd(usr_path, sizeof(usr_path) - 1); + plat_getcwd(rom_path, sizeof(rom_path) - 1); - for (c=1; cnext) { + /* + * This is where we start outputting to the log file, + * if there is one. Create a little info header first. + */ + (void) time(&now); + info = localtime(&now); + strftime(temp, sizeof(temp), "%Y/%m/%d %H:%M:%S", info); + pclog("#\n# %ls v%ls logfile, created %s\n#\n", + EMU_NAME_W, EMU_VERSION_FULL_W, temp); + pclog("# VM: %s\n#\n", vm_name); + pclog("# Emulator path: %s\n", exe_path); + pclog("# Userfiles path: %s\n", usr_path); + for (rom_path_t *rom_path = &rom_paths; rom_path != NULL; rom_path = rom_path->next) { pclog("# ROM path: %s\n", rom_path->path); } - pclog("# Configuration file: %s\n#\n\n", cfg_path); - /* - * We are about to read the configuration file, which MAY - * put data into global variables (the hard- and floppy - * disks are an example) so we have to initialize those - * modules before we load the config.. - */ - hdd_init(); - network_init(); - mouse_init(); - cdrom_global_init(); - zip_global_init(); - mo_global_init(); + pclog("# Configuration file: %s\n#\n\n", cfg_path); + /* + * We are about to read the configuration file, which MAY + * put data into global variables (the hard- and floppy + * disks are an example) so we have to initialize those + * modules before we load the config.. + */ + hdd_init(); + network_init(); + mouse_init(); + cdrom_global_init(); + zip_global_init(); + mo_global_init(); - /* Load the configuration file. */ - config_load(); + /* Load the configuration file. */ + config_load(); - /* Load the desired language */ - if (lang_init) - lang_id = lang_init; + /* Load the desired language */ + if (lang_init) + lang_id = lang_init; - gdbstub_init(); + gdbstub_init(); - /* All good! */ - return(1); + /* All good! */ + return (1); } - void pc_speed_changed(void) { - if (cpu_s->cpu_type >= CPU_286) - pit_set_clock(cpu_s->rspeed); - else - pit_set_clock(14318184.0); + if (cpu_s->cpu_type >= CPU_286) + pit_set_clock(cpu_s->rspeed); + else + pit_set_clock(14318184.0); } - void pc_full_speed(void) { - if (! atfullspeed) { - pc_log("Set fullspeed - %i %i\n", is386, AT); - pc_speed_changed(); - } - atfullspeed = 1; + if (!atfullspeed) { + pc_log("Set fullspeed - %i %i\n", is386, AT); + pc_speed_changed(); + } + atfullspeed = 1; } - /* Initialize modules, ran once, after pc_init. */ int pc_init_modules(void) { - int c, m; - wchar_t temp[512]; - char tempc[512]; + int c, m; + wchar_t temp[512]; + char tempc[512]; #ifdef PRINT_MISSING_MACHINES_AND_VIDEO_CARDS - c = m = 0; - while (machine_get_internal_name_ex(c) != NULL) { - m = machine_available(c); - if (!m) - pclog("Missing machine: %s\n", machine_getname_ex(c)); - c++; - } + c = m = 0; + while (machine_get_internal_name_ex(c) != NULL) { + m = machine_available(c); + if (!m) + pclog("Missing machine: %s\n", machine_getname_ex(c)); + c++; + } - c = m = 0; - while (video_get_internal_name(c) != NULL) { - memset(tempc, 0, sizeof(tempc)); - device_get_name(video_card_getdevice(c), 0, tempc); - if ((c > 1) && !(tempc[0])) - break; - m = video_card_available(c); - if (!m) - pclog("Missing video card: %s\n", tempc); - c++; - } + c = m = 0; + while (video_get_internal_name(c) != NULL) { + memset(tempc, 0, sizeof(tempc)); + device_get_name(video_card_getdevice(c), 0, tempc); + if ((c > 1) && !(tempc[0])) + break; + m = video_card_available(c); + if (!m) + pclog("Missing video card: %s\n", tempc); + c++; + } #endif - pc_log("Scanning for ROM images:\n"); - c = m = 0; - while (machine_get_internal_name_ex(m) != NULL) { - c += machine_available(m); - m++; - } - if (c == 0) { - /* No usable ROMs found, aborting. */ - return(0); - } - pc_log("A total of %d ROM sets have been loaded.\n", c); + pc_log("Scanning for ROM images:\n"); + c = m = 0; + while (machine_get_internal_name_ex(m) != NULL) { + c += machine_available(m); + m++; + } + if (c == 0) { + /* No usable ROMs found, aborting. */ + return (0); + } + pc_log("A total of %d ROM sets have been loaded.\n", c); - /* Load the ROMs for the selected machine. */ - if (! machine_available(machine)) { - swprintf(temp, sizeof(temp), plat_get_string(IDS_2063), machine_getname()); - c = 0; - machine = -1; - while (machine_get_internal_name_ex(c) != NULL) { - if (machine_available(c)) { - ui_msgbox_header(MBX_INFO, (wchar_t *) IDS_2128, temp); - machine = c; - config_save(); - break; - } - c++; - } - if (machine == -1) { - fatal("No available machines\n"); - exit(-1); - return(0); - } - } + /* Load the ROMs for the selected machine. */ + if (!machine_available(machine)) { + swprintf(temp, sizeof(temp), plat_get_string(IDS_2063), machine_getname()); + c = 0; + machine = -1; + while (machine_get_internal_name_ex(c) != NULL) { + if (machine_available(c)) { + ui_msgbox_header(MBX_INFO, (wchar_t *) IDS_2128, temp); + machine = c; + config_save(); + break; + } + c++; + } + if (machine == -1) { + fatal("No available machines\n"); + exit(-1); + return (0); + } + } - /* Make sure we have a usable video card. */ - if (! video_card_available(gfxcard)) { - memset(tempc, 0, sizeof(tempc)); - device_get_name(video_card_getdevice(gfxcard), 0, tempc); - swprintf(temp, sizeof(temp), plat_get_string(IDS_2064), tempc); - c = 0; - while (video_get_internal_name(c) != NULL) { - gfxcard = -1; - if (video_card_available(c)) { - ui_msgbox_header(MBX_INFO, (wchar_t *) IDS_2128, temp); - gfxcard = c; - config_save(); - break; - } - c++; - } - if (gfxcard == -1) { - fatal("No available video cards\n"); - exit(-1); - return(0); - } - } + /* Make sure we have a usable video card. */ + if (!video_card_available(gfxcard)) { + memset(tempc, 0, sizeof(tempc)); + device_get_name(video_card_getdevice(gfxcard), 0, tempc); + swprintf(temp, sizeof(temp), plat_get_string(IDS_2064), tempc); + c = 0; + while (video_get_internal_name(c) != NULL) { + gfxcard = -1; + if (video_card_available(c)) { + ui_msgbox_header(MBX_INFO, (wchar_t *) IDS_2128, temp); + gfxcard = c; + config_save(); + break; + } + c++; + } + if (gfxcard == -1) { + fatal("No available video cards\n"); + exit(-1); + return (0); + } + } - if (! video_card_available(gfxcard_2)) { - char temp[1024] = { 0 }; + if (!video_card_available(gfxcard_2)) { + char temp[1024] = { 0 }; char tempc[1024] = { 0 }; device_get_name(video_card_getdevice(gfxcard_2), 0, tempc); snprintf(temp, sizeof(temp), "Video card #2 \"%s\" is not available due to missing ROMs in the roms/video directory. Disabling the second video card.", tempc); @@ -879,113 +862,108 @@ pc_init_modules(void) gfxcard_2 = 0; } - atfullspeed = 0; + atfullspeed = 0; - random_init(); + random_init(); - mem_init(); + mem_init(); #ifdef USE_DYNAREC -#if defined(__APPLE__) && defined(__aarch64__) - pthread_jit_write_protect_np(0); -#endif - codegen_init(); -#if defined(__APPLE__) && defined(__aarch64__) - pthread_jit_write_protect_np(1); -#endif +# if defined(__APPLE__) && defined(__aarch64__) + pthread_jit_write_protect_np(0); +# endif + codegen_init(); +# if defined(__APPLE__) && defined(__aarch64__) + pthread_jit_write_protect_np(1); +# endif #endif - keyboard_init(); - joystick_init(); + keyboard_init(); + joystick_init(); - video_init(); + video_init(); - fdd_init(); + fdd_init(); - sound_init(); + sound_init(); - hdc_init(); + hdc_init(); - video_reset_close(); + video_reset_close(); - machine_status_init(); + machine_status_init(); - return(1); + return (1); } - void pc_send_ca(uint16_t sc) { - keyboard_input(1, 0x1D); /* Ctrl key pressed */ - keyboard_input(1, 0x38); /* Alt key pressed */ - keyboard_input(1, sc); - keyboard_input(0, sc); - keyboard_input(0, 0x38); /* Alt key released */ - keyboard_input(0, 0x1D); /* Ctrl key released */ + keyboard_input(1, 0x1D); /* Ctrl key pressed */ + keyboard_input(1, 0x38); /* Alt key pressed */ + keyboard_input(1, sc); + keyboard_input(0, sc); + keyboard_input(0, 0x38); /* Alt key released */ + keyboard_input(0, 0x1D); /* Ctrl key released */ } - /* Send the machine a Control-Alt-DEL sequence. */ void pc_send_cad(void) { - pc_send_ca(0x153); + pc_send_ca(0x153); } - /* Send the machine a Control-Alt-ESC sequence. */ void pc_send_cae(void) { - pc_send_ca(1); + pc_send_ca(1); } - void pc_reset_hard_close(void) { - ui_sb_set_ready(0); + ui_sb_set_ready(0); - /* Close all the memory mappings. */ - mem_close(); + /* Close all the memory mappings. */ + mem_close(); - /* Turn off timer processing to avoid potential segmentation faults. */ - timer_close(); + /* Turn off timer processing to avoid potential segmentation faults. */ + timer_close(); - suppress_overscan = 0; + suppress_overscan = 0; - nvr_save(); - nvr_close(); + nvr_save(); + nvr_close(); - mouse_close(); + mouse_close(); - lpt_devices_close(); + lpt_devices_close(); - device_close_all(); + device_close_all(); - scsi_device_close_all(); + scsi_device_close_all(); - midi_out_close(); + midi_out_close(); - midi_in_close(); + midi_in_close(); - cdrom_close(); + cdrom_close(); - zip_close(); + zip_close(); - mo_close(); + mo_close(); - scsi_disk_close(); + scsi_disk_close(); - closeal(); + closeal(); - video_reset_close(); + video_reset_close(); - cpu_close(); + cpu_close(); } - /* * This is basically the spot where we start up the actual machine, * by issuing a 'hard reset' to the entire configuration. Order is @@ -995,353 +973,355 @@ pc_reset_hard_close(void) void pc_reset_hard_init(void) { - /* - * First, we reset the modules that are not part of - * the actual machine, but which support some of the - * modules that are. - */ + /* + * First, we reset the modules that are not part of + * the actual machine, but which support some of the + * modules that are. + */ - /* Reset the general machine support modules. */ - io_init(); + /* Reset the general machine support modules. */ + io_init(); - /* Turn on and (re)initialize timer processing. */ - timer_init(); + /* Turn on and (re)initialize timer processing. */ + timer_init(); - device_init(); + device_init(); - sound_reset(); + sound_reset(); - scsi_reset(); - scsi_device_init(); + scsi_reset(); + scsi_device_init(); - /* Initialize the actual machine and its basic modules. */ - machine_init(); + /* Initialize the actual machine and its basic modules. */ + machine_init(); - /* Reset and reconfigure the serial ports. */ - serial_standalone_init(); + /* Reset and reconfigure the serial ports. */ + serial_standalone_init(); - /* Reset and reconfigure the Sound Card layer. */ - sound_card_reset(); + /* Reset and reconfigure the Sound Card layer. */ + sound_card_reset(); - /* Reset any ISA RTC cards. */ - isartc_reset(); + /* Reset any ISA RTC cards. */ + isartc_reset(); - fdc_card_init(); + fdc_card_init(); - fdd_reset(); + fdd_reset(); - /* - * Once the machine has been initialized, all that remains - * should be resetting all devices set up for it, to their - * current configurations ! - * - * For now, we will call their reset functions here, but - * that will be a call to device_reset_all() later ! - */ + /* + * Once the machine has been initialized, all that remains + * should be resetting all devices set up for it, to their + * current configurations ! + * + * For now, we will call their reset functions here, but + * that will be a call to device_reset_all() later ! + */ - /* Reset some basic devices. */ - speaker_init(); - lpt_devices_init(); - shadowbios = 0; + /* Reset some basic devices. */ + speaker_init(); + lpt_devices_init(); + shadowbios = 0; - /* - * Reset the mouse, this will attach it to any port needed. - */ - mouse_reset(); + /* + * Reset the mouse, this will attach it to any port needed. + */ + mouse_reset(); - /* Reset the Hard Disk Controller module. */ - hdc_reset(); - /* Reset and reconfigure the SCSI layer. */ - scsi_card_init(); + /* Reset the Hard Disk Controller module. */ + hdc_reset(); + /* Reset and reconfigure the SCSI layer. */ + scsi_card_init(); - cdrom_hard_reset(); + cdrom_hard_reset(); - zip_hard_reset(); + zip_hard_reset(); - mo_hard_reset(); + mo_hard_reset(); - scsi_disk_hard_reset(); + scsi_disk_hard_reset(); - /* Reset and reconfigure the Network Card layer. */ - network_reset(); + /* Reset and reconfigure the Network Card layer. */ + network_reset(); - if (joystick_type) - gameport_update_joystick_type(); + if (joystick_type) + gameport_update_joystick_type(); - ui_sb_update_panes(); + ui_sb_update_panes(); - if (config_changed) { - config_save(); + if (config_changed) { + config_save(); - config_changed = 0; - } else - ui_sb_set_ready(1); + config_changed = 0; + } else + ui_sb_set_ready(1); - /* Needs the status bar... */ - if (bugger_enabled) - device_add(&bugger_device); - if (postcard_enabled) - device_add(&postcard_device); + /* Needs the status bar... */ + if (bugger_enabled) + device_add(&bugger_device); + if (postcard_enabled) + device_add(&postcard_device); - /* Reset the CPU module. */ - resetx86(); - dma_reset(); - pci_pic_reset(); - cpu_cache_int_enabled = cpu_cache_ext_enabled = 0; + /* Reset the CPU module. */ + resetx86(); + dma_reset(); + pci_pic_reset(); + cpu_cache_int_enabled = cpu_cache_ext_enabled = 0; - atfullspeed = 0; - pc_full_speed(); + atfullspeed = 0; + pc_full_speed(); - cycles = 0; + cycles = 0; #ifdef FPU_CYCLES - fpu_cycles = 0; + fpu_cycles = 0; #endif #ifdef USE_DYNAREC - cycles_main = 0; + cycles_main = 0; #endif - update_mouse_msg(); + update_mouse_msg(); } -void update_mouse_msg() +void +update_mouse_msg() { - wchar_t wcpufamily[2048], wcpu[2048], wmachine[2048], *wcp; + wchar_t wcpufamily[2048], wcpu[2048], wmachine[2048], *wcp; - mbstowcs(wmachine, machine_getname(), strlen(machine_getname())+1); + mbstowcs(wmachine, machine_getname(), strlen(machine_getname()) + 1); - if (!cpu_override) - mbstowcs(wcpufamily, cpu_f->name, strlen(cpu_f->name)+1); - else - swprintf(wcpufamily, sizeof_w(wcpufamily), L"[U] %hs", cpu_f->name); + if (!cpu_override) + mbstowcs(wcpufamily, cpu_f->name, strlen(cpu_f->name) + 1); + else + swprintf(wcpufamily, sizeof_w(wcpufamily), L"[U] %hs", cpu_f->name); - wcp = wcschr(wcpufamily, L'('); - if (wcp) /* remove parentheses */ - *(wcp - 1) = L'\0'; - mbstowcs(wcpu, cpu_s->name, strlen(cpu_s->name)+1); + wcp = wcschr(wcpufamily, L'('); + if (wcp) /* remove parentheses */ + *(wcp - 1) = L'\0'; + mbstowcs(wcpu, cpu_s->name, strlen(cpu_s->name) + 1); #ifdef _WIN32 - swprintf(mouse_msg[0], sizeof_w(mouse_msg[0]), L"%%i%%%% - %ls", - plat_get_string(IDS_2077)); - swprintf(mouse_msg[1], sizeof_w(mouse_msg[1]), L"%%i%%%% - %ls", - (mouse_get_buttons() > 2) ? plat_get_string(IDS_2078) : plat_get_string(IDS_2079)); - wcsncpy(mouse_msg[2], L"%i%%", sizeof_w(mouse_msg[2])); + swprintf(mouse_msg[0], sizeof_w(mouse_msg[0]), L"%%i%%%% - %ls", + plat_get_string(IDS_2077)); + swprintf(mouse_msg[1], sizeof_w(mouse_msg[1]), L"%%i%%%% - %ls", + (mouse_get_buttons() > 2) ? plat_get_string(IDS_2078) : plat_get_string(IDS_2079)); + wcsncpy(mouse_msg[2], L"%i%%", sizeof_w(mouse_msg[2])); #else - swprintf(mouse_msg[0], sizeof_w(mouse_msg[0]), L"%ls v%ls - %%i%%%% - %ls - %ls/%ls - %ls", - EMU_NAME_W, EMU_VERSION_FULL_W, wmachine, wcpufamily, wcpu, - plat_get_string(IDS_2077)); - swprintf(mouse_msg[1], sizeof_w(mouse_msg[1]), L"%ls v%ls - %%i%%%% - %ls - %ls/%ls - %ls", - EMU_NAME_W, EMU_VERSION_FULL_W, wmachine, wcpufamily, wcpu, - (mouse_get_buttons() > 2) ? plat_get_string(IDS_2078) : plat_get_string(IDS_2079)); - swprintf(mouse_msg[2], sizeof_w(mouse_msg[2]), L"%ls v%ls - %%i%%%% - %ls - %ls/%ls", - EMU_NAME_W, EMU_VERSION_FULL_W, wmachine, wcpufamily, wcpu); + swprintf(mouse_msg[0], sizeof_w(mouse_msg[0]), L"%ls v%ls - %%i%%%% - %ls - %ls/%ls - %ls", + EMU_NAME_W, EMU_VERSION_FULL_W, wmachine, wcpufamily, wcpu, + plat_get_string(IDS_2077)); + swprintf(mouse_msg[1], sizeof_w(mouse_msg[1]), L"%ls v%ls - %%i%%%% - %ls - %ls/%ls - %ls", + EMU_NAME_W, EMU_VERSION_FULL_W, wmachine, wcpufamily, wcpu, + (mouse_get_buttons() > 2) ? plat_get_string(IDS_2078) : plat_get_string(IDS_2079)); + swprintf(mouse_msg[2], sizeof_w(mouse_msg[2]), L"%ls v%ls - %%i%%%% - %ls - %ls/%ls", + EMU_NAME_W, EMU_VERSION_FULL_W, wmachine, wcpufamily, wcpu); #endif } void pc_reset_hard(void) { - hard_reset_pending = 1; + hard_reset_pending = 1; } - void pc_close(thread_t *ptr) { - int i; + int i; - /* Wait a while so things can shut down. */ - plat_delay_ms(200); + /* Wait a while so things can shut down. */ + plat_delay_ms(200); - /* Claim the video blitter. */ - startblit(); + /* Claim the video blitter. */ + startblit(); - /* Terminate the UI thread. */ - is_quit = 1; + /* Terminate the UI thread. */ + is_quit = 1; #if (defined(USE_DYNAREC) && defined(USE_NEW_DYNAREC)) - codegen_close(); + codegen_close(); #endif - nvr_save(); + nvr_save(); - config_save(); + config_save(); - plat_mouse_capture(0); + plat_mouse_capture(0); - /* Close all the memory mappings. */ - mem_close(); + /* Close all the memory mappings. */ + mem_close(); - /* Turn off timer processing to avoid potential segmentation faults. */ - timer_close(); + /* Turn off timer processing to avoid potential segmentation faults. */ + timer_close(); - lpt_devices_close(); + lpt_devices_close(); - for (i=0; irspeed / 100); + /* Run a block of code. */ + startblit(); + cpu_exec(cpu_s->rspeed / 100); #ifdef USE_GDBSTUB /* avoid a KBC FIFO overflow when CPU emulation is stalled */ - if (gdbstub_step == GDBSTUB_EXEC) + if (gdbstub_step == GDBSTUB_EXEC) #endif - mouse_process(); - joystick_process(); - endblit(); + mouse_process(); + joystick_process(); + endblit(); - /* Done with this frame, update statistics. */ - framecount++; - if (++framecountx >= 100) { - framecountx = 0; - frames = 0; - } + /* Done with this frame, update statistics. */ + framecount++; + if (++framecountx >= 100) { + framecountx = 0; + frames = 0; + } - if (title_update) { - mouse_msg_idx = (mouse_type == MOUSE_TYPE_NONE) ? 2 : !!mouse_capture; - swprintf(temp, sizeof_w(temp), mouse_msg[mouse_msg_idx], fps); + if (title_update) { + mouse_msg_idx = (mouse_type == MOUSE_TYPE_NONE) ? 2 : !!mouse_capture; + swprintf(temp, sizeof_w(temp), mouse_msg[mouse_msg_idx], fps); #ifdef __APPLE__ - /* Needed due to modifying the UI on the non-main thread is a big no-no. */ - dispatch_async_f(dispatch_get_main_queue(), wcsdup((const wchar_t *) temp), _ui_window_title); + /* Needed due to modifying the UI on the non-main thread is a big no-no. */ + dispatch_async_f(dispatch_get_main_queue(), wcsdup((const wchar_t *) temp), _ui_window_title); #else - ui_window_title(temp); + ui_window_title(temp); #endif - title_update = 0; - } + title_update = 0; + } } - /* Handler for the 1-second timer to refresh the window title. */ void pc_onesec(void) { - fps = framecount; - framecount = 0; + fps = framecount; + framecount = 0; - title_update = 1; + title_update = 1; } void set_screen_size_monitor(int x, int y, int monitor_index) { - int temp_overscan_x = monitors[monitor_index].mon_overscan_x; - int temp_overscan_y = monitors[monitor_index].mon_overscan_y; + int temp_overscan_x = monitors[monitor_index].mon_overscan_x; + int temp_overscan_y = monitors[monitor_index].mon_overscan_y; double dx, dy, dtx, dty; /* Make sure we keep usable values. */ #if 0 pc_log("SetScreenSize(%d, %d) resize=%d\n", x, y, vid_resize); #endif - if (x < 320) x = 320; - if (y < 200) y = 200; - if (x > 2048) x = 2048; - if (y > 2048) y = 2048; + if (x < 320) + x = 320; + if (y < 200) + y = 200; + if (x > 2048) + x = 2048; + if (y > 2048) + y = 2048; /* Save the new values as "real" (unscaled) resolution. */ monitors[monitor_index].mon_unscaled_size_x = x; - monitors[monitor_index].mon_efscrnsz_y = y; + monitors[monitor_index].mon_efscrnsz_y = y; if (suppress_overscan) - temp_overscan_x = temp_overscan_y = 0; + temp_overscan_x = temp_overscan_y = 0; if (force_43) { - dx = (double)x; - dtx = (double)temp_overscan_x; + dx = (double) x; + dtx = (double) temp_overscan_x; - dy = (double)y; - dty = (double)temp_overscan_y; + dy = (double) y; + dty = (double) temp_overscan_y; - /* Account for possible overscan. */ - if (video_get_type_monitor(monitor_index) != VIDEO_FLAG_TYPE_SPECIAL && (temp_overscan_y == 16)) { - /* CGA */ - dy = (((dx - dtx) / 4.0) * 3.0) + dty; - } else if (video_get_type_monitor(monitor_index) != VIDEO_FLAG_TYPE_SPECIAL && (temp_overscan_y < 16)) { - /* MDA/Hercules */ - dy = (x / 4.0) * 3.0; - } else { - if (enable_overscan) { - /* EGA/(S)VGA with overscan */ + /* Account for possible overscan. */ + if (video_get_type_monitor(monitor_index) != VIDEO_FLAG_TYPE_SPECIAL && (temp_overscan_y == 16)) { + /* CGA */ dy = (((dx - dtx) / 4.0) * 3.0) + dty; - } else { - /* EGA/(S)VGA without overscan */ + } else if (video_get_type_monitor(monitor_index) != VIDEO_FLAG_TYPE_SPECIAL && (temp_overscan_y < 16)) { + /* MDA/Hercules */ dy = (x / 4.0) * 3.0; + } else { + if (enable_overscan) { + /* EGA/(S)VGA with overscan */ + dy = (((dx - dtx) / 4.0) * 3.0) + dty; + } else { + /* EGA/(S)VGA without overscan */ + dy = (x / 4.0) * 3.0; + } } - } - monitors[monitor_index].mon_unscaled_size_y = (int)dy; + monitors[monitor_index].mon_unscaled_size_y = (int) dy; } else - monitors[monitor_index].mon_unscaled_size_y = monitors[monitor_index].mon_efscrnsz_y; + monitors[monitor_index].mon_unscaled_size_y = monitors[monitor_index].mon_efscrnsz_y; - switch(scale) { - case 0: /* 50% */ - monitors[monitor_index].mon_scrnsz_x = (monitors[monitor_index].mon_unscaled_size_x>>1); - monitors[monitor_index].mon_scrnsz_y = (monitors[monitor_index].mon_unscaled_size_y>>1); - break; + switch (scale) { + case 0: /* 50% */ + monitors[monitor_index].mon_scrnsz_x = (monitors[monitor_index].mon_unscaled_size_x >> 1); + monitors[monitor_index].mon_scrnsz_y = (monitors[monitor_index].mon_unscaled_size_y >> 1); + break; - case 1: /* 100% */ - monitors[monitor_index].mon_scrnsz_x = monitors[monitor_index].mon_unscaled_size_x; - monitors[monitor_index].mon_scrnsz_y = monitors[monitor_index].mon_unscaled_size_y; - break; + case 1: /* 100% */ + monitors[monitor_index].mon_scrnsz_x = monitors[monitor_index].mon_unscaled_size_x; + monitors[monitor_index].mon_scrnsz_y = monitors[monitor_index].mon_unscaled_size_y; + break; - case 2: /* 150% */ - monitors[monitor_index].mon_scrnsz_x = ((monitors[monitor_index].mon_unscaled_size_x*3)>>1); - monitors[monitor_index].mon_scrnsz_y = ((monitors[monitor_index].mon_unscaled_size_y*3)>>1); - break; + case 2: /* 150% */ + monitors[monitor_index].mon_scrnsz_x = ((monitors[monitor_index].mon_unscaled_size_x * 3) >> 1); + monitors[monitor_index].mon_scrnsz_y = ((monitors[monitor_index].mon_unscaled_size_y * 3) >> 1); + break; - case 3: /* 200% */ - monitors[monitor_index].mon_scrnsz_x = (monitors[monitor_index].mon_unscaled_size_x<<1); - monitors[monitor_index].mon_scrnsz_y = (monitors[monitor_index].mon_unscaled_size_y<<1); - break; + case 3: /* 200% */ + monitors[monitor_index].mon_scrnsz_x = (monitors[monitor_index].mon_unscaled_size_x << 1); + monitors[monitor_index].mon_scrnsz_y = (monitors[monitor_index].mon_unscaled_size_y << 1); + break; } plat_resize_request(monitors[monitor_index].mon_scrnsz_x, monitors[monitor_index].mon_scrnsz_y, monitor_index); @@ -1366,7 +1346,6 @@ reset_screen_size(void) set_screen_size(monitors[i].mon_unscaled_size_x, monitors[i].mon_efscrnsz_y); } - void set_screen_size_natural(void) { @@ -1374,16 +1353,14 @@ set_screen_size_natural(void) set_screen_size(monitors[i].mon_unscaled_size_x, monitors[i].mon_unscaled_size_y); } - int get_actual_size_x(void) { - return(unscaled_size_x); + return (unscaled_size_x); } - int get_actual_size_y(void) { - return(efscrnsz_y); + return (efscrnsz_y); } diff --git a/src/acpi.c b/src/acpi.c index db181cee8..f607eb9cf 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -47,27 +47,30 @@ static double cpu_to_acpi; #ifdef ENABLE_ACPI_LOG int acpi_do_log = ENABLE_ACPI_LOG; - static void acpi_log(const char *fmt, ...) { va_list ap; if (acpi_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define acpi_log(fmt, ...) +# define acpi_log(fmt, ...) #endif -static uint64_t acpi_clock_get() { +static uint64_t +acpi_clock_get() +{ return tsc * cpu_to_acpi; } -static uint32_t acpi_timer_get(acpi_t *dev) { +static uint32_t +acpi_timer_get(acpi_t *dev) +{ uint64_t clock = acpi_clock_get(); if (dev->regs.timer32) return clock & 0xffffffff; @@ -75,7 +78,9 @@ static uint32_t acpi_timer_get(acpi_t *dev) { return clock & 0xffffff; } -static double acpi_get_overflow_period(acpi_t *dev) { +static double +acpi_get_overflow_period(acpi_t *dev) +{ uint64_t timer = acpi_clock_get(); uint64_t overflow_time; @@ -87,7 +92,7 @@ static double acpi_get_overflow_period(acpi_t *dev) { uint64_t time_to_overflow = overflow_time - timer; - return ((double)time_to_overflow / (double)ACPI_TIMER_FREQ) * 1000000.0; + return ((double) time_to_overflow / (double) ACPI_TIMER_FREQ) * 1000000.0; } static void @@ -113,415 +118,469 @@ acpi_update_irq(acpi_t *dev) { int sci_level = (dev->regs.pmsts & dev->regs.pmen) & (RTC_EN | PWRBTN_EN | GBL_EN | TMROF_EN); if (dev->vendor == VEN_SMC) - sci_level |= (dev->regs.pmsts & BM_STS); + sci_level |= (dev->regs.pmsts & BM_STS); if (sci_level) { - if (dev->irq_mode == 1) - pci_set_irq(dev->slot, dev->irq_pin); - else if (dev->irq_mode == 2) - pci_set_mirq(5, dev->mirq_is_level); - else - pci_set_mirq(0xf0 | dev->irq_line, 1); + if (dev->irq_mode == 1) + pci_set_irq(dev->slot, dev->irq_pin); + else if (dev->irq_mode == 2) + pci_set_mirq(5, dev->mirq_is_level); + else + pci_set_mirq(0xf0 | dev->irq_line, 1); } else { - if (dev->irq_mode == 1) - pci_clear_irq(dev->slot, dev->irq_pin); - else if (dev->irq_mode == 2) - pci_clear_mirq(5, dev->mirq_is_level); - else - pci_clear_mirq(0xf0 | dev->irq_line, 1); + if (dev->irq_mode == 1) + pci_clear_irq(dev->slot, dev->irq_pin); + else if (dev->irq_mode == 2) + pci_clear_mirq(5, dev->mirq_is_level); + else + pci_clear_mirq(0xf0 | dev->irq_line, 1); } acpi_timer_update(dev, (dev->regs.pmen & TMROF_EN) && !(dev->regs.pmsts & TMROF_STS)); } - void acpi_raise_smi(void *priv, int do_smi) { acpi_t *dev = (acpi_t *) priv; if (dev->regs.glbctl & 0x01) { - if ((dev->vendor == VEN_VIA) || (dev->vendor == VEN_VIA_596B)) { - if ((!dev->regs.smi_lock || !dev->regs.smi_active)) { - if (do_smi) - smi_raise(); - dev->regs.smi_active = 1; - } - } else if ((dev->vendor == VEN_INTEL) || (dev->vendor == VEN_ALI)) { - if (do_smi) - smi_raise(); - /* Clear bit 16 of GLBCTL. */ - if (dev->vendor == VEN_INTEL) - dev->regs.glbctl &= ~0x00010000; - else - dev->regs.ali_soft_smi = 1; - } else if (dev->vendor == VEN_SMC) { - if (do_smi) - smi_raise(); - } + if ((dev->vendor == VEN_VIA) || (dev->vendor == VEN_VIA_596B)) { + if ((!dev->regs.smi_lock || !dev->regs.smi_active)) { + if (do_smi) + smi_raise(); + dev->regs.smi_active = 1; + } + } else if ((dev->vendor == VEN_INTEL) || (dev->vendor == VEN_ALI)) { + if (do_smi) + smi_raise(); + /* Clear bit 16 of GLBCTL. */ + if (dev->vendor == VEN_INTEL) + dev->regs.glbctl &= ~0x00010000; + else + dev->regs.ali_soft_smi = 1; + } else if (dev->vendor == VEN_SMC) { + if (do_smi) + smi_raise(); + } } } - static uint32_t acpi_reg_read_common_regs(int size, uint16_t addr, void *p) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) p; uint32_t ret = 0x00000000; - int shift16, shift32; + int shift16, shift32; addr &= 0x3f; shift16 = (addr & 1) << 3; shift32 = (addr & 3) << 3; switch (addr) { - case 0x00: case 0x01: - /* PMSTS - Power Management Status Register (IO) */ - ret = (dev->regs.pmsts >> shift16) & 0xff; - if (addr == 0x01) - ret |= (acpi_rtc_status << 2); - break; - case 0x02: case 0x03: - /* PMEN - Power Management Resume Enable Register (IO) */ - ret = (dev->regs.pmen >> shift16) & 0xff; - break; - case 0x04: case 0x05: - /* PMCNTRL - Power Management Control Register (IO) */ - ret = (dev->regs.pmcntrl >> shift16) & 0xff; - if (addr == 0x05) - ret = (ret & 0xdf); /* Bit 5 is write-only. */ - break; - case 0x08: case 0x09: case 0x0a: case 0x0b: - /* PMTMR - Power Management Timer Register (IO) */ - ret = (acpi_timer_get(dev) >> shift32) & 0xff; + case 0x00: + case 0x01: + /* PMSTS - Power Management Status Register (IO) */ + ret = (dev->regs.pmsts >> shift16) & 0xff; + if (addr == 0x01) + ret |= (acpi_rtc_status << 2); + break; + case 0x02: + case 0x03: + /* PMEN - Power Management Resume Enable Register (IO) */ + ret = (dev->regs.pmen >> shift16) & 0xff; + break; + case 0x04: + case 0x05: + /* PMCNTRL - Power Management Control Register (IO) */ + ret = (dev->regs.pmcntrl >> shift16) & 0xff; + if (addr == 0x05) + ret = (ret & 0xdf); /* Bit 5 is write-only. */ + break; + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + /* PMTMR - Power Management Timer Register (IO) */ + ret = (acpi_timer_get(dev) >> shift32) & 0xff; #ifdef USE_DYNAREC - if (cpu_use_dynarec) - update_tsc(); + if (cpu_use_dynarec) + update_tsc(); #endif - break; + break; } #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); + acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); #endif return ret; } - static uint32_t acpi_reg_read_ali(int size, uint16_t addr, void *p) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) p; uint32_t ret = 0x00000000; - int shift16, shift32; + int shift16, shift32; addr &= 0x3f; shift16 = (addr & 1) << 3; shift32 = (addr & 3) << 3; - switch(addr) { - case 0x10: case 0x11: case 0x12: case 0x13: - /* PCNTRL - Processor Control Register (IO) */ - ret = (dev->regs.pcntrl >> shift16) & 0xff; - break; - case 0x14: - /* LVL2 - Processor Level 2 Register */ - ret = dev->regs.plvl2; - break; - case 0x15: - /* LVL3 - Processor Level 3 Register */ - ret = dev->regs.plvl3; - break; - case 0x18: case 0x19: - /* GPE0_STS - General Purpose Event0 Status Register */ - ret = (dev->regs.gpsts >> shift16) & 0xff; - break; - case 0x1a: case 0x1b: - /* GPE0_EN - General Purpose Event0 Enable Register */ - ret = (dev->regs.gpen >> shift16) & 0xff; - break; - case 0x1d: case 0x1c: - /* GPE1_STS - General Purpose Event1 Status Register */ - ret = (dev->regs.gpsts1 >> shift16) & 0xff; - break; - case 0x1f: case 0x1e: - /* GPE1_EN - General Purpose Event1 Enable Register */ - ret = (dev->regs.gpen1 >> shift16) & 0xff; - break; - case 0x20 ... 0x27: - /* GPE1_CTL - General Purpose Event1 Control Register */ - ret = (dev->regs.gpcntrl >> shift32) & 0xff; - break; - case 0x30: - /* PM2_CNTRL - Power Management 2 Control Register( */ - ret = dev->regs.pmcntrl; - break; - default: - ret = acpi_reg_read_common_regs(size, addr, p); - break; + switch (addr) { + case 0x10: + case 0x11: + case 0x12: + case 0x13: + /* PCNTRL - Processor Control Register (IO) */ + ret = (dev->regs.pcntrl >> shift16) & 0xff; + break; + case 0x14: + /* LVL2 - Processor Level 2 Register */ + ret = dev->regs.plvl2; + break; + case 0x15: + /* LVL3 - Processor Level 3 Register */ + ret = dev->regs.plvl3; + break; + case 0x18: + case 0x19: + /* GPE0_STS - General Purpose Event0 Status Register */ + ret = (dev->regs.gpsts >> shift16) & 0xff; + break; + case 0x1a: + case 0x1b: + /* GPE0_EN - General Purpose Event0 Enable Register */ + ret = (dev->regs.gpen >> shift16) & 0xff; + break; + case 0x1d: + case 0x1c: + /* GPE1_STS - General Purpose Event1 Status Register */ + ret = (dev->regs.gpsts1 >> shift16) & 0xff; + break; + case 0x1f: + case 0x1e: + /* GPE1_EN - General Purpose Event1 Enable Register */ + ret = (dev->regs.gpen1 >> shift16) & 0xff; + break; + case 0x20 ... 0x27: + /* GPE1_CTL - General Purpose Event1 Control Register */ + ret = (dev->regs.gpcntrl >> shift32) & 0xff; + break; + case 0x30: + /* PM2_CNTRL - Power Management 2 Control Register( */ + ret = dev->regs.pmcntrl; + break; + default: + ret = acpi_reg_read_common_regs(size, addr, p); + break; } #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); + acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); #endif return ret; } - static uint32_t acpi_reg_read_intel(int size, uint16_t addr, void *p) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) p; uint32_t ret = 0x00000000; - int shift16, shift32; + int shift16, shift32; addr &= 0x3f; shift16 = (addr & 1) << 3; shift32 = (addr & 3) << 3; switch (addr) { - case 0x0c: case 0x0d: - /* GPSTS - General Purpose Status Register (IO) */ - ret = (dev->regs.gpsts >> shift16) & 0xff; - break; - case 0x0e: case 0x0f: - /* GPEN - General Purpose Enable Register (IO) */ - ret = (dev->regs.gpen >> shift16) & 0xff; - break; - case 0x10: case 0x11: case 0x12: case 0x13: - /* PCNTRL - Processor Control Register (IO) */ - ret = (dev->regs.pcntrl >> shift32) & 0xff; - break; - case 0x18: case 0x19: - /* GLBSTS - Global Status Register (IO) */ - ret = (dev->regs.glbsts >> shift16) & 0xff; - if (addr == 0x18) { - ret &= 0x27; - if (dev->regs.gpsts != 0x0000) - ret |= 0x80; - if (dev->regs.pmsts != 0x0000) - ret |= 0x40; - if (dev->regs.devsts != 0x00000000) - ret |= 0x10; - } - break; - case 0x1c: case 0x1d: case 0x1e: case 0x1f: - /* DEVSTS - Device Status Register (IO) */ - ret = (dev->regs.devsts >> shift32) & 0xff; - break; - case 0x20: case 0x21: - /* GLBEN - Global Enable Register (IO) */ - ret = (dev->regs.glben >> shift16) & 0xff; - break; - case 0x28: case 0x29: case 0x2a: case 0x2b: - /* GLBCTL - Global Control Register (IO) */ - ret = (dev->regs.glbctl >> shift32) & 0xff; - break; - case 0x2c: case 0x2d: case 0x2e: case 0x2f: - /* DEVCTL - Device Control Register (IO) */ - ret = (dev->regs.devctl >> shift32) & 0xff; - break; - case 0x30: case 0x31: case 0x32: - /* GPIREG - General Purpose Input Register (IO) */ - if (size == 1) - ret = dev->regs.gpireg[addr & 3]; - break; - case 0x34: case 0x35: case 0x36: case 0x37: - /* GPOREG - General Purpose Output Register (IO) */ - if (size == 1) - ret = dev->regs.gporeg[addr & 3]; - break; - default: - ret = acpi_reg_read_common_regs(size, addr, p); - break; + case 0x0c: + case 0x0d: + /* GPSTS - General Purpose Status Register (IO) */ + ret = (dev->regs.gpsts >> shift16) & 0xff; + break; + case 0x0e: + case 0x0f: + /* GPEN - General Purpose Enable Register (IO) */ + ret = (dev->regs.gpen >> shift16) & 0xff; + break; + case 0x10: + case 0x11: + case 0x12: + case 0x13: + /* PCNTRL - Processor Control Register (IO) */ + ret = (dev->regs.pcntrl >> shift32) & 0xff; + break; + case 0x18: + case 0x19: + /* GLBSTS - Global Status Register (IO) */ + ret = (dev->regs.glbsts >> shift16) & 0xff; + if (addr == 0x18) { + ret &= 0x27; + if (dev->regs.gpsts != 0x0000) + ret |= 0x80; + if (dev->regs.pmsts != 0x0000) + ret |= 0x40; + if (dev->regs.devsts != 0x00000000) + ret |= 0x10; + } + break; + case 0x1c: + case 0x1d: + case 0x1e: + case 0x1f: + /* DEVSTS - Device Status Register (IO) */ + ret = (dev->regs.devsts >> shift32) & 0xff; + break; + case 0x20: + case 0x21: + /* GLBEN - Global Enable Register (IO) */ + ret = (dev->regs.glben >> shift16) & 0xff; + break; + case 0x28: + case 0x29: + case 0x2a: + case 0x2b: + /* GLBCTL - Global Control Register (IO) */ + ret = (dev->regs.glbctl >> shift32) & 0xff; + break; + case 0x2c: + case 0x2d: + case 0x2e: + case 0x2f: + /* DEVCTL - Device Control Register (IO) */ + ret = (dev->regs.devctl >> shift32) & 0xff; + break; + case 0x30: + case 0x31: + case 0x32: + /* GPIREG - General Purpose Input Register (IO) */ + if (size == 1) + ret = dev->regs.gpireg[addr & 3]; + break; + case 0x34: + case 0x35: + case 0x36: + case 0x37: + /* GPOREG - General Purpose Output Register (IO) */ + if (size == 1) + ret = dev->regs.gporeg[addr & 3]; + break; + default: + ret = acpi_reg_read_common_regs(size, addr, p); + break; } #ifdef ENABLE_ACPI_LOG - // if (size != 1) - // acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); + // if (size != 1) + // acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); #endif return ret; } - static uint32_t acpi_reg_read_via_common(int size, uint16_t addr, void *p) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) p; uint32_t ret = 0x00000000; - int shift16, shift32; + int shift16, shift32; addr &= 0xff; shift16 = (addr & 1) << 3; shift32 = (addr & 3) << 3; switch (addr) { - case 0x10: case 0x11: case 0x12: case 0x13: - /* PCNTRL - Processor Control Register (IO) */ - ret = (dev->regs.pcntrl >> shift32) & 0xff; - break; - case 0x20: case 0x21: - /* GPSTS - General Purpose Status Register (IO) */ - ret = (dev->regs.gpsts >> shift16) & 0xff; - break; - case 0x22: case 0x23: - /* General Purpose SCI Enable */ - ret = (dev->regs.gpscien >> shift16) & 0xff; - break; - case 0x24: case 0x25: - /* General Purpose SMI Enable */ - ret = (dev->regs.gpsmien >> shift16) & 0xff; - break; - case 0x26: case 0x27: - /* Power Supply Control */ - ret = (dev->regs.pscntrl >> shift16) & 0xff; - break; - case 0x28: case 0x29: - /* GLBSTS - Global Status Register (IO) */ - ret = (dev->regs.glbsts >> shift16) & 0xff; - break; - case 0x2a: case 0x2b: - /* GLBEN - Global Enable Register (IO) */ - ret = (dev->regs.glben >> shift16) & 0xff; - break; - case 0x2c: case 0x2d: - /* GLBCTL - Global Control Register (IO) */ - ret = (dev->regs.glbctl >> shift16) & 0xff; - ret &= ~0x0110; - ret |= (dev->regs.smi_lock ? 0x10 : 0x00); - ret |= (dev->regs.smi_active ? 0x01 : 0x00); - break; - case 0x2f: - /* SMI Command */ - if (size == 1) - ret = dev->regs.smicmd & 0xff; - break; - case 0x30: case 0x31: case 0x32: case 0x33: - /* Primary Activity Detect Status */ - ret = (dev->regs.padsts >> shift32) & 0xff; - break; - case 0x34: case 0x35: case 0x36: case 0x37: - /* Primary Activity Detect Enable */ - ret = (dev->regs.paden >> shift32) & 0xff; - break; - case 0x38: case 0x39: case 0x3a: case 0x3b: - /* GP Timer Reload Enable */ - ret = (dev->regs.gptren >> shift32) & 0xff; - break; - default: - ret = acpi_reg_read_common_regs(size, addr, p); - break; + case 0x10: + case 0x11: + case 0x12: + case 0x13: + /* PCNTRL - Processor Control Register (IO) */ + ret = (dev->regs.pcntrl >> shift32) & 0xff; + break; + case 0x20: + case 0x21: + /* GPSTS - General Purpose Status Register (IO) */ + ret = (dev->regs.gpsts >> shift16) & 0xff; + break; + case 0x22: + case 0x23: + /* General Purpose SCI Enable */ + ret = (dev->regs.gpscien >> shift16) & 0xff; + break; + case 0x24: + case 0x25: + /* General Purpose SMI Enable */ + ret = (dev->regs.gpsmien >> shift16) & 0xff; + break; + case 0x26: + case 0x27: + /* Power Supply Control */ + ret = (dev->regs.pscntrl >> shift16) & 0xff; + break; + case 0x28: + case 0x29: + /* GLBSTS - Global Status Register (IO) */ + ret = (dev->regs.glbsts >> shift16) & 0xff; + break; + case 0x2a: + case 0x2b: + /* GLBEN - Global Enable Register (IO) */ + ret = (dev->regs.glben >> shift16) & 0xff; + break; + case 0x2c: + case 0x2d: + /* GLBCTL - Global Control Register (IO) */ + ret = (dev->regs.glbctl >> shift16) & 0xff; + ret &= ~0x0110; + ret |= (dev->regs.smi_lock ? 0x10 : 0x00); + ret |= (dev->regs.smi_active ? 0x01 : 0x00); + break; + case 0x2f: + /* SMI Command */ + if (size == 1) + ret = dev->regs.smicmd & 0xff; + break; + case 0x30: + case 0x31: + case 0x32: + case 0x33: + /* Primary Activity Detect Status */ + ret = (dev->regs.padsts >> shift32) & 0xff; + break; + case 0x34: + case 0x35: + case 0x36: + case 0x37: + /* Primary Activity Detect Enable */ + ret = (dev->regs.paden >> shift32) & 0xff; + break; + case 0x38: + case 0x39: + case 0x3a: + case 0x3b: + /* GP Timer Reload Enable */ + ret = (dev->regs.gptren >> shift32) & 0xff; + break; + default: + ret = acpi_reg_read_common_regs(size, addr, p); + break; } #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); + acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); #endif return ret; } - static uint32_t acpi_reg_read_via(int size, uint16_t addr, void *p) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) p; uint32_t ret = 0x00000000; - int shift16; + int shift16; addr &= 0xff; shift16 = (addr & 1) << 3; switch (addr) { - case 0x40: - /* GPIO Direction Control */ - if (size == 1) - ret = dev->regs.gpio_dir & 0xff; - break; - case 0x42: - /* GPIO port Output Value */ - if (size == 1) - ret = dev->regs.gpio_val & 0x13; - break; - case 0x44: - /* GPIO port Input Value */ - if (size == 1) { - ret = dev->regs.extsmi_val & 0xff; + case 0x40: + /* GPIO Direction Control */ + if (size == 1) + ret = dev->regs.gpio_dir & 0xff; + break; + case 0x42: + /* GPIO port Output Value */ + if (size == 1) + ret = dev->regs.gpio_val & 0x13; + break; + case 0x44: + /* GPIO port Input Value */ + if (size == 1) { + ret = dev->regs.extsmi_val & 0xff; - if (dev->i2c) { - ret &= 0xf9; - if (!(dev->regs.gpio_dir & 0x02) && i2c_gpio_get_scl(dev->i2c)) - ret |= 0x02; - if (!(dev->regs.gpio_dir & 0x04) && i2c_gpio_get_sda(dev->i2c)) - ret |= 0x04; - } - } - break; - case 0x46: case 0x47: - /* GPO Port Output Value */ - ret = (dev->regs.gpo_val >> shift16) & 0xff; - break; - case 0x48: case 0x49: - /* GPO Port Input Value */ - ret = (dev->regs.gpi_val >> shift16) & 0xff; - break; - default: - ret = acpi_reg_read_via_common(size, addr, p); - break; + if (dev->i2c) { + ret &= 0xf9; + if (!(dev->regs.gpio_dir & 0x02) && i2c_gpio_get_scl(dev->i2c)) + ret |= 0x02; + if (!(dev->regs.gpio_dir & 0x04) && i2c_gpio_get_sda(dev->i2c)) + ret |= 0x04; + } + } + break; + case 0x46: + case 0x47: + /* GPO Port Output Value */ + ret = (dev->regs.gpo_val >> shift16) & 0xff; + break; + case 0x48: + case 0x49: + /* GPO Port Input Value */ + ret = (dev->regs.gpi_val >> shift16) & 0xff; + break; + default: + ret = acpi_reg_read_via_common(size, addr, p); + break; } #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); + acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); #endif return ret; } - static uint32_t acpi_reg_read_via_596b(int size, uint16_t addr, void *p) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) p; uint32_t ret = 0x00000000; - int shift16, shift32; + int shift16, shift32; addr &= 0x7f; shift16 = (addr & 1) << 3; shift32 = (addr & 3) << 3; switch (addr) { - case 0x40: /* Extended I/O Trap Status (686A/B) */ - ret = dev->regs.extiotrapsts; - break; - case 0x42: /* Extended I/O Trap Enable (686A/B) */ - ret = dev->regs.extiotrapen; - break; - case 0x44: case 0x45: - /* External SMI Input Value */ - ret = (dev->regs.extsmi_val >> shift16) & 0xff; - break; - case 0x48: case 0x49: case 0x4a: case 0x4b: - /* GPI Port Input Value */ - ret = (dev->regs.gpi_val >> shift32) & 0xff; - break; - case 0x4c: case 0x4d: case 0x4e: case 0x4f: - /* GPO Port Output Value */ - ret = (dev->regs.gpo_val >> shift32) & 0xff; - break; - default: - ret = acpi_reg_read_via_common(size, addr, p); - break; + case 0x40: /* Extended I/O Trap Status (686A/B) */ + ret = dev->regs.extiotrapsts; + break; + case 0x42: /* Extended I/O Trap Enable (686A/B) */ + ret = dev->regs.extiotrapen; + break; + case 0x44: + case 0x45: + /* External SMI Input Value */ + ret = (dev->regs.extsmi_val >> shift16) & 0xff; + break; + case 0x48: + case 0x49: + case 0x4a: + case 0x4b: + /* GPI Port Input Value */ + ret = (dev->regs.gpi_val >> shift32) & 0xff; + break; + case 0x4c: + case 0x4d: + case 0x4e: + case 0x4f: + /* GPO Port Output Value */ + ret = (dev->regs.gpo_val >> shift32) & 0xff; + break; + default: + ret = acpi_reg_read_via_common(size, addr, p); + break; } #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); + acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); #endif return ret; } - static uint32_t acpi_reg_read_smc(int size, uint16_t addr, void *p) { @@ -533,274 +592,300 @@ acpi_reg_read_smc(int size, uint16_t addr, void *p) #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); + acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); #endif return ret; } - static uint32_t acpi_aux_reg_read_smc(int size, uint16_t addr, void *p) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) p; uint32_t ret = 0x00000000; - int shift16; + int shift16; addr &= 0x07; shift16 = (addr & 1) << 3; switch (addr) { - case 0x00: case 0x01: - /* SCI Status Register */ - ret = (dev->regs.pcntrl >> shift16) & 0xff; - break; - case 0x02: case 0x03: - /* SCI Enable Register */ - ret = (dev->regs.gpscien >> shift16) & 0xff; - break; - case 0x04: case 0x05: - /* Miscellaneous Status Register */ - ret = (dev->regs.glbsts >> shift16) & 0xff; - break; - case 0x06: - /* Miscellaneous Enable Register */ - ret = dev->regs.glben & 0xff; - break; - case 0x07: - /* Miscellaneous Control Register */ - ret = dev->regs.glbctl & 0xff; - break; + case 0x00: + case 0x01: + /* SCI Status Register */ + ret = (dev->regs.pcntrl >> shift16) & 0xff; + break; + case 0x02: + case 0x03: + /* SCI Enable Register */ + ret = (dev->regs.gpscien >> shift16) & 0xff; + break; + case 0x04: + case 0x05: + /* Miscellaneous Status Register */ + ret = (dev->regs.glbsts >> shift16) & 0xff; + break; + case 0x06: + /* Miscellaneous Enable Register */ + ret = dev->regs.glben & 0xff; + break; + case 0x07: + /* Miscellaneous Control Register */ + ret = dev->regs.glbctl & 0xff; + break; } acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); return ret; } - static void acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; - int shift16, sus_typ; + int shift16, sus_typ; addr &= 0x3f; #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); + acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); #endif shift16 = (addr & 1) << 3; switch (addr) { - case 0x00: case 0x01: - /* PMSTS - Power Management Status Register (IO) */ - dev->regs.pmsts &= ~((val << shift16) & 0x8d31); - if ((addr == 0x01) && (val & 0x04)) - acpi_rtc_status = 0; - acpi_update_irq(dev); - break; - case 0x02: case 0x03: - /* PMEN - Power Management Resume Enable Register (IO) */ - dev->regs.pmen = ((dev->regs.pmen & ~(0xff << shift16)) | (val << shift16)) & 0x0521; - acpi_update_irq(dev); - break; - case 0x04: case 0x05: - /* PMCNTRL - Power Management Control Register (IO) */ - if ((addr == 0x05) && (val & 0x20)) { - sus_typ = dev->suspend_types[(val >> 2) & 7]; + case 0x00: + case 0x01: + /* PMSTS - Power Management Status Register (IO) */ + dev->regs.pmsts &= ~((val << shift16) & 0x8d31); + if ((addr == 0x01) && (val & 0x04)) + acpi_rtc_status = 0; + acpi_update_irq(dev); + break; + case 0x02: + case 0x03: + /* PMEN - Power Management Resume Enable Register (IO) */ + dev->regs.pmen = ((dev->regs.pmen & ~(0xff << shift16)) | (val << shift16)) & 0x0521; + acpi_update_irq(dev); + break; + case 0x04: + case 0x05: + /* PMCNTRL - Power Management Control Register (IO) */ + if ((addr == 0x05) && (val & 0x20)) { + sus_typ = dev->suspend_types[(val >> 2) & 7]; - if (sus_typ & SUS_POWER_OFF) { - /* Soft power off. */ - plat_power_off(); - return; - } + if (sus_typ & SUS_POWER_OFF) { + /* Soft power off. */ + plat_power_off(); + return; + } - if (sus_typ & SUS_SUSPEND) { - if (sus_typ & SUS_NVR) { - /* Suspend to RAM. */ - nvr_reg_write(0x000f, 0xff, dev->nvr); - } + if (sus_typ & SUS_SUSPEND) { + if (sus_typ & SUS_NVR) { + /* Suspend to RAM. */ + nvr_reg_write(0x000f, 0xff, dev->nvr); + } - if (sus_typ & SUS_RESET_PCI) - device_reset_all_pci(); + if (sus_typ & SUS_RESET_PCI) + device_reset_all_pci(); - if (sus_typ & SUS_RESET_CPU) - cpu_alt_reset = 0; + if (sus_typ & SUS_RESET_CPU) + cpu_alt_reset = 0; - if (sus_typ & SUS_RESET_PCI) { - pci_reset(); - keyboard_at_reset(); + if (sus_typ & SUS_RESET_PCI) { + pci_reset(); + keyboard_at_reset(); - mem_a20_alt = 0; - mem_a20_recalc(); - } + mem_a20_alt = 0; + mem_a20_recalc(); + } - if (sus_typ & (SUS_RESET_CPU | SUS_RESET_CACHE)) - flushmmucache(); + if (sus_typ & (SUS_RESET_CPU | SUS_RESET_CACHE)) + flushmmucache(); - if (sus_typ & SUS_RESET_CPU) - resetx86(); + if (sus_typ & SUS_RESET_CPU) + resetx86(); - /* Since the UI doesn't have a power button at the moment, pause emulation, - then trigger a resume event so that the system resumes after unpausing. */ - plat_pause(1); - timer_set_delay_u64(&dev->resume_timer, 50 * TIMER_USEC); - } - } - dev->regs.pmcntrl = ((dev->regs.pmcntrl & ~(0xff << shift16)) | (val << shift16)) & 0x3f07 /* 0x3c07 */; - break; + /* Since the UI doesn't have a power button at the moment, pause emulation, + then trigger a resume event so that the system resumes after unpausing. */ + plat_pause(1); + timer_set_delay_u64(&dev->resume_timer, 50 * TIMER_USEC); + } + } + dev->regs.pmcntrl = ((dev->regs.pmcntrl & ~(0xff << shift16)) | (val << shift16)) & 0x3f07 /* 0x3c07 */; + break; } } - static void acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; - int shift16, shift32; + int shift16, shift32; addr &= 0x3f; #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); + acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); #endif shift16 = (addr & 1) << 3; shift32 = (addr & 3) << 3; switch (addr) { - case 0x10: case 0x11: case 0x12: case 0x13: - /* PCNTRL - Processor Control Register (IO) */ - dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x00023e1e; - break; - case 0x14: - /* LVL2 - Processor Level 2 Register */ - dev->regs.plvl2 = val; - break; - case 0x15: - /* LVL3 - Processor Level 3 Register */ - dev->regs.plvl3 = val; - break; - case 0x18: case 0x19: - /* GPE0_STS - General Purpose Event0 Status Register */ - dev->regs.gpsts &= ~((val << shift16) & 0x0d07); - break; - case 0x1a: case 0x1b: - /* GPE0_EN - General Purpose Event0 Enable Register */ - dev->regs.gpen = ((dev->regs.gpen & ~(0xff << shift16)) | (val << shift16)) & 0x0d07; - break; - case 0x1d: case 0x1c: - /* GPE1_STS - General Purpose Event1 Status Register */ - dev->regs.gpsts1 &= ~((val << shift16) & 0x0c01); - break; - case 0x1f: case 0x1e: - /* GPE1_EN - General Purpose Event1 Enable Register */ - dev->regs.gpen1 = ((dev->regs.gpen & ~(0xff << shift16)) | (val << shift16)) & 0x0c01; - break; - case 0x20 ... 0x27: - /* GPE1_CTL - General Purpose Event1 Control Register */ - dev->regs.gpcntrl = ((dev->regs.gpcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x00000001; - break; - case 0x30: - /* PM2_CNTRL - Power Management 2 Control Register( */ - dev->regs.pmcntrl = val & 1; - break; - default: - acpi_reg_write_common_regs(size, addr, val, p); - /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ - if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) - dev->regs.gpcntrl &= ~0x0002; - else if ((addr == 0x04) && (dev->regs.pmcntrl & 0x0004)) { - dev->regs.gpsts1 |= 0x01; - if (dev->regs.gpen1 & 0x01) - acpi_raise_smi(dev, 1); - } - } + case 0x10: + case 0x11: + case 0x12: + case 0x13: + /* PCNTRL - Processor Control Register (IO) */ + dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x00023e1e; + break; + case 0x14: + /* LVL2 - Processor Level 2 Register */ + dev->regs.plvl2 = val; + break; + case 0x15: + /* LVL3 - Processor Level 3 Register */ + dev->regs.plvl3 = val; + break; + case 0x18: + case 0x19: + /* GPE0_STS - General Purpose Event0 Status Register */ + dev->regs.gpsts &= ~((val << shift16) & 0x0d07); + break; + case 0x1a: + case 0x1b: + /* GPE0_EN - General Purpose Event0 Enable Register */ + dev->regs.gpen = ((dev->regs.gpen & ~(0xff << shift16)) | (val << shift16)) & 0x0d07; + break; + case 0x1d: + case 0x1c: + /* GPE1_STS - General Purpose Event1 Status Register */ + dev->regs.gpsts1 &= ~((val << shift16) & 0x0c01); + break; + case 0x1f: + case 0x1e: + /* GPE1_EN - General Purpose Event1 Enable Register */ + dev->regs.gpen1 = ((dev->regs.gpen & ~(0xff << shift16)) | (val << shift16)) & 0x0c01; + break; + case 0x20 ... 0x27: + /* GPE1_CTL - General Purpose Event1 Control Register */ + dev->regs.gpcntrl = ((dev->regs.gpcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x00000001; + break; + case 0x30: + /* PM2_CNTRL - Power Management 2 Control Register( */ + dev->regs.pmcntrl = val & 1; + break; + default: + acpi_reg_write_common_regs(size, addr, val, p); + /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ + if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) + dev->regs.gpcntrl &= ~0x0002; + else if ((addr == 0x04) && (dev->regs.pmcntrl & 0x0004)) { + dev->regs.gpsts1 |= 0x01; + if (dev->regs.gpen1 & 0x01) + acpi_raise_smi(dev, 1); + } + } } - static void acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; - int shift16, shift32; + int shift16, shift32; addr &= 0x3f; #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); + acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); #endif shift16 = (addr & 1) << 3; shift32 = (addr & 3) << 3; switch (addr) { - case 0x0c: case 0x0d: - /* GPSTS - General Purpose Status Register (IO) */ - dev->regs.gpsts &= ~((val << shift16) & 0x0f81); - break; - case 0x0e: case 0x0f: - /* GPEN - General Purpose Enable Register (IO) */ - dev->regs.gpen = ((dev->regs.gpen & ~(0xff << shift16)) | (val << shift16)) & 0x0f01; - break; - case 0x10: case 0x11: case 0x13: - /* PCNTRL - Processor Control Register (IO) */ - dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x00023e1e; - break; - case 0x12: - /* PCNTRL - Processor Control Register (IO) */ - dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xfd << shift32)) | (val << shift32)) & 0x00023e1e; - break; - case 0x18: case 0x19: - /* GLBSTS - Global Status Register (IO) */ - dev->regs.glbsts &= ~((val << shift16) & 0x0d27); - break; - case 0x1c: case 0x1d: case 0x1e: case 0x1f: - /* DEVSTS - Device Status Register (IO) */ - dev->regs.devsts &= ~((val << shift32) & 0x3fff0fff); - break; - case 0x20: case 0x21: - /* GLBEN - Global Enable Register (IO) */ - dev->regs.glben = ((dev->regs.glben & ~(0xff << shift16)) | (val << shift16)) & 0x8d1f; - break; - case 0x28: case 0x29: case 0x2a: case 0x2b: - /* GLBCTL - Global Control Register (IO) */ - dev->regs.glbctl = ((dev->regs.glbctl & ~(0xff << shift32)) | (val << shift32)) & 0x0701ff07; - /* Setting BIOS_RLS also sets GBL_STS and generates SMI. */ - if (dev->regs.glbctl & 0x00000002) { - dev->regs.pmsts |= 0x20; - if (dev->regs.pmen & 0x20) - acpi_update_irq(dev); - } - break; - case 0x2c: case 0x2d: case 0x2e: case 0x2f: - /* DEVCTL - Device Control Register (IO) */ - dev->regs.devctl = ((dev->regs.devctl & ~(0xff << shift32)) | (val << shift32)) & 0x0fffffff; - if (dev->trap_update) - dev->trap_update(dev->trap_priv); - break; - case 0x34: case 0x35: case 0x36: case 0x37: - /* GPOREG - General Purpose Output Register (IO) */ - if (size == 1) - dev->regs.gporeg[addr & 3] = val; - break; - default: - acpi_reg_write_common_regs(size, addr, val, p); - /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ - if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) - dev->regs.glbctl &= ~0x0002; - else if ((addr == 0x04) && (dev->regs.pmcntrl & 0x0004)) { - dev->regs.glbsts |= 0x01; - if (dev->regs.glben & 0x02) - acpi_raise_smi(dev, 1); - } - break; + case 0x0c: + case 0x0d: + /* GPSTS - General Purpose Status Register (IO) */ + dev->regs.gpsts &= ~((val << shift16) & 0x0f81); + break; + case 0x0e: + case 0x0f: + /* GPEN - General Purpose Enable Register (IO) */ + dev->regs.gpen = ((dev->regs.gpen & ~(0xff << shift16)) | (val << shift16)) & 0x0f01; + break; + case 0x10: + case 0x11: + case 0x13: + /* PCNTRL - Processor Control Register (IO) */ + dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x00023e1e; + break; + case 0x12: + /* PCNTRL - Processor Control Register (IO) */ + dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xfd << shift32)) | (val << shift32)) & 0x00023e1e; + break; + case 0x18: + case 0x19: + /* GLBSTS - Global Status Register (IO) */ + dev->regs.glbsts &= ~((val << shift16) & 0x0d27); + break; + case 0x1c: + case 0x1d: + case 0x1e: + case 0x1f: + /* DEVSTS - Device Status Register (IO) */ + dev->regs.devsts &= ~((val << shift32) & 0x3fff0fff); + break; + case 0x20: + case 0x21: + /* GLBEN - Global Enable Register (IO) */ + dev->regs.glben = ((dev->regs.glben & ~(0xff << shift16)) | (val << shift16)) & 0x8d1f; + break; + case 0x28: + case 0x29: + case 0x2a: + case 0x2b: + /* GLBCTL - Global Control Register (IO) */ + dev->regs.glbctl = ((dev->regs.glbctl & ~(0xff << shift32)) | (val << shift32)) & 0x0701ff07; + /* Setting BIOS_RLS also sets GBL_STS and generates SMI. */ + if (dev->regs.glbctl & 0x00000002) { + dev->regs.pmsts |= 0x20; + if (dev->regs.pmen & 0x20) + acpi_update_irq(dev); + } + break; + case 0x2c: + case 0x2d: + case 0x2e: + case 0x2f: + /* DEVCTL - Device Control Register (IO) */ + dev->regs.devctl = ((dev->regs.devctl & ~(0xff << shift32)) | (val << shift32)) & 0x0fffffff; + if (dev->trap_update) + dev->trap_update(dev->trap_priv); + break; + case 0x34: + case 0x35: + case 0x36: + case 0x37: + /* GPOREG - General Purpose Output Register (IO) */ + if (size == 1) + dev->regs.gporeg[addr & 3] = val; + break; + default: + acpi_reg_write_common_regs(size, addr, val, p); + /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ + if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) + dev->regs.glbctl &= ~0x0002; + else if ((addr == 0x04) && (dev->regs.pmcntrl & 0x0004)) { + dev->regs.glbsts |= 0x01; + if (dev->regs.glben & 0x02) + acpi_raise_smi(dev, 1); + } + break; } } - static void acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; - int shift16, shift32; + int shift16, shift32; addr &= 0xff; acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); @@ -808,84 +893,92 @@ acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *p) shift32 = (addr & 3) << 3; switch (addr) { - case 0x10: case 0x11: case 0x12: case 0x13: - /* PCNTRL - Processor Control Register (IO) */ - dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x0000001e; - break; - case 0x20: case 0x21: - /* GPSTS - General Purpose Status Register (IO) */ - dev->regs.gpsts &= ~((val << shift16) & 0x03ff); - break; - case 0x22: case 0x23: - /* General Purpose SCI Enable */ - dev->regs.gpscien = ((dev->regs.gpscien & ~(0xff << shift16)) | (val << shift16)) & 0x03ff; - break; - case 0x24: case 0x25: - /* General Purpose SMI Enable */ - dev->regs.gpsmien = ((dev->regs.gpsmien & ~(0xff << shift16)) | (val << shift16)) & 0x03ff; - break; - case 0x26: case 0x27: - /* Power Supply Control */ - dev->regs.pscntrl = ((dev->regs.pscntrl & ~(0xff << shift16)) | (val << shift16)) & 0x0701; - break; - case 0x2c: - /* GLBCTL - Global Control Register (IO) */ - dev->regs.glbctl = (dev->regs.glbctl & ~0xff) | (val & 0xff); - dev->regs.smi_lock = !!(dev->regs.glbctl & 0x0010); - /* Setting BIOS_RLS also sets GBL_STS and generates SMI. */ - if (dev->regs.glbctl & 0x0002) { - dev->regs.pmsts |= 0x20; - if (dev->regs.pmen & 0x20) - acpi_update_irq(dev); - } - break; - case 0x2d: - /* GLBCTL - Global Control Register (IO) */ - dev->regs.glbctl &= ~((val << 8) & 0x0100); - if (val & 0x01) - dev->regs.smi_active = 0; - break; - case 0x2f: - /* SMI Command */ - if (size == 1) { - dev->regs.smicmd = val & 0xff; - dev->regs.glbsts |= 0x40; - if (dev->regs.glben & 0x40) - acpi_raise_smi(dev, 1); - } - break; - case 0x38: case 0x39: case 0x3a: case 0x3b: - /* GP Timer Reload Enable */ - dev->regs.gptren = ((dev->regs.gptren & ~(0xff << shift32)) | (val << shift32)) & 0x000000d9; - break; - default: - acpi_reg_write_common_regs(size, addr, val, p); - /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ - if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) - dev->regs.glbctl &= ~0x0002; - else if ((addr == 0x04) && (dev->regs.pmcntrl & 0x0004)) { - dev->regs.glbsts |= 0x20; - if (dev->regs.glben & 0x20) - acpi_raise_smi(dev, 1); - } - break; + case 0x10: + case 0x11: + case 0x12: + case 0x13: + /* PCNTRL - Processor Control Register (IO) */ + dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x0000001e; + break; + case 0x20: + case 0x21: + /* GPSTS - General Purpose Status Register (IO) */ + dev->regs.gpsts &= ~((val << shift16) & 0x03ff); + break; + case 0x22: + case 0x23: + /* General Purpose SCI Enable */ + dev->regs.gpscien = ((dev->regs.gpscien & ~(0xff << shift16)) | (val << shift16)) & 0x03ff; + break; + case 0x24: + case 0x25: + /* General Purpose SMI Enable */ + dev->regs.gpsmien = ((dev->regs.gpsmien & ~(0xff << shift16)) | (val << shift16)) & 0x03ff; + break; + case 0x26: + case 0x27: + /* Power Supply Control */ + dev->regs.pscntrl = ((dev->regs.pscntrl & ~(0xff << shift16)) | (val << shift16)) & 0x0701; + break; + case 0x2c: + /* GLBCTL - Global Control Register (IO) */ + dev->regs.glbctl = (dev->regs.glbctl & ~0xff) | (val & 0xff); + dev->regs.smi_lock = !!(dev->regs.glbctl & 0x0010); + /* Setting BIOS_RLS also sets GBL_STS and generates SMI. */ + if (dev->regs.glbctl & 0x0002) { + dev->regs.pmsts |= 0x20; + if (dev->regs.pmen & 0x20) + acpi_update_irq(dev); + } + break; + case 0x2d: + /* GLBCTL - Global Control Register (IO) */ + dev->regs.glbctl &= ~((val << 8) & 0x0100); + if (val & 0x01) + dev->regs.smi_active = 0; + break; + case 0x2f: + /* SMI Command */ + if (size == 1) { + dev->regs.smicmd = val & 0xff; + dev->regs.glbsts |= 0x40; + if (dev->regs.glben & 0x40) + acpi_raise_smi(dev, 1); + } + break; + case 0x38: + case 0x39: + case 0x3a: + case 0x3b: + /* GP Timer Reload Enable */ + dev->regs.gptren = ((dev->regs.gptren & ~(0xff << shift32)) | (val << shift32)) & 0x000000d9; + break; + default: + acpi_reg_write_common_regs(size, addr, val, p); + /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ + if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) + dev->regs.glbctl &= ~0x0002; + else if ((addr == 0x04) && (dev->regs.pmcntrl & 0x0004)) { + dev->regs.glbsts |= 0x20; + if (dev->regs.glben & 0x20) + acpi_raise_smi(dev, 1); + } + break; } } - static void acpi_i2c_set(acpi_t *dev) { if (dev->i2c) - i2c_gpio_set(dev->i2c, !(dev->regs.gpio_dir & 0x02) || (dev->regs.gpio_val & 0x02), !(dev->regs.gpio_dir & 0x04) || (dev->regs.gpio_val & 0x04)); + i2c_gpio_set(dev->i2c, !(dev->regs.gpio_dir & 0x02) || (dev->regs.gpio_val & 0x02), !(dev->regs.gpio_dir & 0x04) || (dev->regs.gpio_val & 0x04)); } - static void acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; - int shift16, shift32; + int shift16, shift32; addr &= 0xff; acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); @@ -893,54 +986,62 @@ acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *p) shift32 = (addr & 3) << 3; switch (addr) { - case 0x28: case 0x29: - /* GLBSTS - Global Status Register (IO) */ - dev->regs.glbsts &= ~((val << shift16) & 0x007f); - break; - case 0x2a: case 0x2b: - /* GLBEN - Global Enable Register (IO) */ - dev->regs.glben = ((dev->regs.glben & ~(0xff << shift16)) | (val << shift16)) & 0x007f; - break; - case 0x30: case 0x31: case 0x32: case 0x33: - /* Primary Activity Detect Status */ - dev->regs.padsts &= ~((val << shift32) & 0x000000fd); - break; - case 0x34: case 0x35: case 0x36: case 0x37: - /* Primary Activity Detect Enable */ - dev->regs.paden = ((dev->regs.paden & ~(0xff << shift32)) | (val << shift32)) & 0x000000fd; - if (dev->trap_update) - dev->trap_update(dev->trap_priv); - break; - case 0x40: - /* GPIO Direction Control */ - if (size == 1) { - dev->regs.gpio_dir = val & 0x7f; - acpi_i2c_set(dev); - } - break; - case 0x42: - /* GPIO port Output Value */ - if (size == 1) { - dev->regs.gpio_val = val & 0x13; - acpi_i2c_set(dev); - } - break; - case 0x46: case 0x47: - /* GPO Port Output Value */ - dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift16)) | (val << shift16)) & 0xffff; - break; - default: - acpi_reg_write_via_common(size, addr, val, p); - break; + case 0x28: + case 0x29: + /* GLBSTS - Global Status Register (IO) */ + dev->regs.glbsts &= ~((val << shift16) & 0x007f); + break; + case 0x2a: + case 0x2b: + /* GLBEN - Global Enable Register (IO) */ + dev->regs.glben = ((dev->regs.glben & ~(0xff << shift16)) | (val << shift16)) & 0x007f; + break; + case 0x30: + case 0x31: + case 0x32: + case 0x33: + /* Primary Activity Detect Status */ + dev->regs.padsts &= ~((val << shift32) & 0x000000fd); + break; + case 0x34: + case 0x35: + case 0x36: + case 0x37: + /* Primary Activity Detect Enable */ + dev->regs.paden = ((dev->regs.paden & ~(0xff << shift32)) | (val << shift32)) & 0x000000fd; + if (dev->trap_update) + dev->trap_update(dev->trap_priv); + break; + case 0x40: + /* GPIO Direction Control */ + if (size == 1) { + dev->regs.gpio_dir = val & 0x7f; + acpi_i2c_set(dev); + } + break; + case 0x42: + /* GPIO port Output Value */ + if (size == 1) { + dev->regs.gpio_val = val & 0x13; + acpi_i2c_set(dev); + } + break; + case 0x46: + case 0x47: + /* GPO Port Output Value */ + dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift16)) | (val << shift16)) & 0xffff; + break; + default: + acpi_reg_write_via_common(size, addr, val, p); + break; } } - static void acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; - int shift16, shift32; + int shift16, shift32; addr &= 0x7f; acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); @@ -948,41 +1049,51 @@ acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *p) shift32 = (addr & 3) << 3; switch (addr) { - case 0x28: case 0x29: - /* GLBSTS - Global Status Register (IO) */ - dev->regs.glbsts &= ~((val << shift16) & 0xfdff); - break; - case 0x2a: case 0x2b: - /* GLBEN - Global Enable Register (IO) */ - dev->regs.glben = ((dev->regs.glben & ~(0xff << shift16)) | (val << shift16)) & 0xfdff; - break; - case 0x30: case 0x31: case 0x32: case 0x33: - /* Primary Activity Detect Status */ - dev->regs.padsts &= ~((val << shift32) & 0x000007ff); - break; - case 0x34: case 0x35: case 0x36: case 0x37: - /* Primary Activity Detect Enable */ - dev->regs.paden = ((dev->regs.paden & ~(0xff << shift32)) | (val << shift32)) & 0x000007ff; - if (dev->trap_update) - dev->trap_update(dev->trap_priv); - break; - case 0x40: /* Extended I/O Trap Status (686A/B) */ - dev->regs.extiotrapsts &= ~(val & 0x13); - break; - case 0x42: /* Extended I/O Trap Enable (686A/B) */ - dev->regs.extiotrapen = val & 0x13; - break; - case 0x4c: case 0x4d: case 0x4e: case 0x4f: - /* GPO Port Output Value */ - dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift32)) | (val << shift32)) & 0x7fffffff; - break; - default: - acpi_reg_write_via_common(size, addr, val, p); - break; + case 0x28: + case 0x29: + /* GLBSTS - Global Status Register (IO) */ + dev->regs.glbsts &= ~((val << shift16) & 0xfdff); + break; + case 0x2a: + case 0x2b: + /* GLBEN - Global Enable Register (IO) */ + dev->regs.glben = ((dev->regs.glben & ~(0xff << shift16)) | (val << shift16)) & 0xfdff; + break; + case 0x30: + case 0x31: + case 0x32: + case 0x33: + /* Primary Activity Detect Status */ + dev->regs.padsts &= ~((val << shift32) & 0x000007ff); + break; + case 0x34: + case 0x35: + case 0x36: + case 0x37: + /* Primary Activity Detect Enable */ + dev->regs.paden = ((dev->regs.paden & ~(0xff << shift32)) | (val << shift32)) & 0x000007ff; + if (dev->trap_update) + dev->trap_update(dev->trap_priv); + break; + case 0x40: /* Extended I/O Trap Status (686A/B) */ + dev->regs.extiotrapsts &= ~(val & 0x13); + break; + case 0x42: /* Extended I/O Trap Enable (686A/B) */ + dev->regs.extiotrapen = val & 0x13; + break; + case 0x4c: + case 0x4d: + case 0x4e: + case 0x4f: + /* GPO Port Output Value */ + dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift32)) | (val << shift32)) & 0x7fffffff; + break; + default: + acpi_reg_write_via_common(size, addr, val, p); + break; } } - static void acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p) { @@ -994,61 +1105,62 @@ acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p) acpi_reg_write_common_regs(size, addr, val, p); /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) - dev->regs.glbctl &= ~0x0001; + dev->regs.glbctl &= ~0x0001; else if ((addr == 0x04) && (dev->regs.pmcntrl & 0x0004)) { - dev->regs.glbsts |= 0x01; - if (dev->regs.glben & 0x01) - acpi_raise_smi(dev, 1); + dev->regs.glbsts |= 0x01; + if (dev->regs.glben & 0x01) + acpi_raise_smi(dev, 1); } } - static void acpi_aux_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; - int shift16; + int shift16; addr &= 0x07; acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); shift16 = (addr & 1) << 3; switch (addr) { - case 0x00: case 0x01: - /* SCI Status Register */ - dev->regs.gpscists &= ~((val << shift16) & 0x000c); - break; - case 0x02: case 0x03: - /* SCI Enable Register */ - dev->regs.gpscien = ((dev->regs.gpscien & ~(0xff << shift16)) | (val << shift16)) & 0x3fff; - break; - case 0x04: case 0x05: - /* Miscellanous Status Register */ - dev->regs.glbsts &= ~((val << shift16) & 0x001f); - break; - case 0x06: - /* Miscellaneous Enable Register */ - dev->regs.glben = (uint16_t) (val & 0x03); - break; - case 0x07: - /* Miscellaneous Control Register */ - dev->regs.glbctl = (uint16_t) (val & 0x03); - /* Setting BIOS_RLS also sets GBL_STS and generates SMI. */ - if (dev->regs.glbctl & 0x0001) { - dev->regs.pmsts |= 0x20; - if (dev->regs.pmen & 0x20) - acpi_update_irq(dev); - } - if (dev->regs.glbctl & 0x0002) { - dev->regs.pmsts |= 0x10; - if (dev->regs.pmcntrl & 0x02) - acpi_update_irq(dev); - } - break; + case 0x00: + case 0x01: + /* SCI Status Register */ + dev->regs.gpscists &= ~((val << shift16) & 0x000c); + break; + case 0x02: + case 0x03: + /* SCI Enable Register */ + dev->regs.gpscien = ((dev->regs.gpscien & ~(0xff << shift16)) | (val << shift16)) & 0x3fff; + break; + case 0x04: + case 0x05: + /* Miscellanous Status Register */ + dev->regs.glbsts &= ~((val << shift16) & 0x001f); + break; + case 0x06: + /* Miscellaneous Enable Register */ + dev->regs.glben = (uint16_t) (val & 0x03); + break; + case 0x07: + /* Miscellaneous Control Register */ + dev->regs.glbctl = (uint16_t) (val & 0x03); + /* Setting BIOS_RLS also sets GBL_STS and generates SMI. */ + if (dev->regs.glbctl & 0x0001) { + dev->regs.pmsts |= 0x20; + if (dev->regs.pmen & 0x20) + acpi_update_irq(dev); + } + if (dev->regs.glbctl & 0x0002) { + dev->regs.pmsts |= 0x10; + if (dev->regs.pmcntrl & 0x02) + acpi_update_irq(dev); + } + break; } } - static uint32_t acpi_reg_read_common(int size, uint16_t addr, void *p) { @@ -1056,38 +1168,36 @@ acpi_reg_read_common(int size, uint16_t addr, void *p) uint8_t ret = 0xff; if (dev->vendor == VEN_ALI) - ret = acpi_reg_read_ali(size, addr, p); + ret = acpi_reg_read_ali(size, addr, p); else if (dev->vendor == VEN_VIA) - ret = acpi_reg_read_via(size, addr, p); + ret = acpi_reg_read_via(size, addr, p); else if (dev->vendor == VEN_VIA_596B) - ret = acpi_reg_read_via_596b(size, addr, p); + ret = acpi_reg_read_via_596b(size, addr, p); else if (dev->vendor == VEN_INTEL) - ret = acpi_reg_read_intel(size, addr, p); + ret = acpi_reg_read_intel(size, addr, p); else if (dev->vendor == VEN_SMC) - ret = acpi_reg_read_smc(size, addr, p); + ret = acpi_reg_read_smc(size, addr, p); return ret; } - static void acpi_reg_write_common(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; if (dev->vendor == VEN_ALI) - acpi_reg_write_ali(size, addr, val, p); + acpi_reg_write_ali(size, addr, val, p); else if (dev->vendor == VEN_VIA) - acpi_reg_write_via(size, addr, val, p); + acpi_reg_write_via(size, addr, val, p); else if (dev->vendor == VEN_VIA_596B) - acpi_reg_write_via_596b(size, addr, val, p); + acpi_reg_write_via_596b(size, addr, val, p); else if (dev->vendor == VEN_INTEL) - acpi_reg_write_intel(size, addr, val, p); + acpi_reg_write_intel(size, addr, val, p); else if (dev->vendor == VEN_SMC) - acpi_reg_write_smc(size, addr, val, p); + acpi_reg_write_smc(size, addr, val, p); } - static uint32_t acpi_aux_reg_read_common(int size, uint16_t addr, void *p) { @@ -1095,22 +1205,20 @@ acpi_aux_reg_read_common(int size, uint16_t addr, void *p) uint8_t ret = 0xff; if (dev->vendor == VEN_SMC) - ret = acpi_aux_reg_read_smc(size, addr, p); + ret = acpi_aux_reg_read_smc(size, addr, p); return ret; } - static void acpi_aux_reg_write_common(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; if (dev->vendor == VEN_SMC) - acpi_aux_reg_write_smc(size, addr, val, p); + acpi_aux_reg_write_smc(size, addr, val, p); } - static uint32_t acpi_reg_readl(uint16_t addr, void *p) { @@ -1126,7 +1234,6 @@ acpi_reg_readl(uint16_t addr, void *p) return ret; } - static uint16_t acpi_reg_readw(uint16_t addr, void *p) { @@ -1140,7 +1247,6 @@ acpi_reg_readw(uint16_t addr, void *p) return ret; } - static uint8_t acpi_reg_read(uint16_t addr, void *p) { @@ -1153,7 +1259,6 @@ acpi_reg_read(uint16_t addr, void *p) return ret; } - static uint32_t acpi_aux_reg_readl(uint16_t addr, void *p) { @@ -1169,7 +1274,6 @@ acpi_aux_reg_readl(uint16_t addr, void *p) return ret; } - static uint16_t acpi_aux_reg_readw(uint16_t addr, void *p) { @@ -1183,7 +1287,6 @@ acpi_aux_reg_readw(uint16_t addr, void *p) return ret; } - static uint8_t acpi_aux_reg_read(uint16_t addr, void *p) { @@ -1196,7 +1299,6 @@ acpi_aux_reg_read(uint16_t addr, void *p) return ret; } - static void acpi_reg_writel(uint16_t addr, uint32_t val, void *p) { @@ -1208,7 +1310,6 @@ acpi_reg_writel(uint16_t addr, uint32_t val, void *p) acpi_reg_write_common(4, addr + 3, (val >> 24) & 0xff, p); } - static void acpi_reg_writew(uint16_t addr, uint16_t val, void *p) { @@ -1218,7 +1319,6 @@ acpi_reg_writew(uint16_t addr, uint16_t val, void *p) acpi_reg_write_common(2, addr + 1, (val >> 8) & 0xff, p); } - static void acpi_reg_write(uint16_t addr, uint8_t val, void *p) { @@ -1227,7 +1327,6 @@ acpi_reg_write(uint16_t addr, uint8_t val, void *p) acpi_reg_write_common(1, addr, val, p); } - static void acpi_aux_reg_writel(uint16_t addr, uint32_t val, void *p) { @@ -1239,7 +1338,6 @@ acpi_aux_reg_writel(uint16_t addr, uint32_t val, void *p) acpi_aux_reg_write_common(4, addr + 3, (val >> 24) & 0xff, p); } - static void acpi_aux_reg_writew(uint16_t addr, uint16_t val, void *p) { @@ -1249,7 +1347,6 @@ acpi_aux_reg_writew(uint16_t addr, uint16_t val, void *p) acpi_aux_reg_write_common(2, addr + 1, (val >> 8) & 0xff, p); } - static void acpi_aux_reg_write(uint16_t addr, uint8_t val, void *p) { @@ -1258,75 +1355,73 @@ acpi_aux_reg_write(uint16_t addr, uint8_t val, void *p) acpi_aux_reg_write_common(1, addr, val, p); } - void acpi_update_io_mapping(acpi_t *dev, uint32_t base, int chipset_en) { int size; switch (dev->vendor) { - case VEN_ALI: - case VEN_INTEL: - default: - size = 0x040; - break; - case VEN_SMC: - size = 0x010; - break; - case VEN_VIA: - size = 0x100; - break; - case VEN_VIA_596B: - size = 0x080; - break; + case VEN_ALI: + case VEN_INTEL: + default: + size = 0x040; + break; + case VEN_SMC: + size = 0x010; + break; + case VEN_VIA: + size = 0x100; + break; + case VEN_VIA_596B: + size = 0x080; + break; } acpi_log("ACPI: Update I/O %04X to %04X (%sabled)\n", dev->io_base, base, chipset_en ? "en" : "dis"); if (dev->io_base != 0x0000) { - io_removehandler(dev->io_base, size, - acpi_reg_read, acpi_reg_readw, acpi_reg_readl, - acpi_reg_write, acpi_reg_writew, acpi_reg_writel, dev); + io_removehandler(dev->io_base, size, + acpi_reg_read, acpi_reg_readw, acpi_reg_readl, + acpi_reg_write, acpi_reg_writew, acpi_reg_writel, dev); } dev->io_base = base; if (chipset_en && (dev->io_base != 0x0000)) { - io_sethandler(dev->io_base, size, - acpi_reg_read, acpi_reg_readw, acpi_reg_readl, - acpi_reg_write, acpi_reg_writew, acpi_reg_writel, dev); + io_sethandler(dev->io_base, size, + acpi_reg_read, acpi_reg_readw, acpi_reg_readl, + acpi_reg_write, acpi_reg_writew, acpi_reg_writel, dev); } } - void acpi_update_aux_io_mapping(acpi_t *dev, uint32_t base, int chipset_en) { int size; switch (dev->vendor) { - case VEN_SMC: - size = 0x008; - break; - default: - size = 0x000; - break; + case VEN_SMC: + size = 0x008; + break; + default: + size = 0x000; + break; } acpi_log("ACPI: Update Aux I/O %04X to %04X (%sabled)\n", dev->aux_io_base, base, chipset_en ? "en" : "dis"); if (dev->aux_io_base != 0x0000) { - io_removehandler(dev->aux_io_base, size, - acpi_aux_reg_read, acpi_aux_reg_readw, acpi_aux_reg_readl, - acpi_aux_reg_write, acpi_aux_reg_writew, acpi_aux_reg_writel, dev); + io_removehandler(dev->aux_io_base, size, + acpi_aux_reg_read, acpi_aux_reg_readw, acpi_aux_reg_readl, + acpi_aux_reg_write, acpi_aux_reg_writew, acpi_aux_reg_writel, dev); } dev->aux_io_base = base; if (chipset_en && (dev->aux_io_base != 0x0000)) { - io_sethandler(dev->aux_io_base, size, - acpi_aux_reg_read, acpi_aux_reg_readw, acpi_aux_reg_readl, - acpi_aux_reg_write, acpi_aux_reg_writew, acpi_aux_reg_writel, dev); + io_sethandler(dev->aux_io_base, size, + acpi_aux_reg_read, acpi_aux_reg_readw, acpi_aux_reg_readl, + acpi_aux_reg_write, acpi_aux_reg_writew, acpi_aux_reg_writel, dev); } } @@ -1340,10 +1435,9 @@ acpi_timer_resume(void *priv) /* Nasty workaround for ASUS P2B-LS and potentially others, where the PMCNTRL SMI trap handler clears the resume bit before returning control to the OS. */ if (in_smm) - timer_set_delay_u64(&dev->resume_timer, 50 * TIMER_USEC); + timer_set_delay_u64(&dev->resume_timer, 50 * TIMER_USEC); } - void acpi_init_gporeg(acpi_t *dev, uint8_t val0, uint8_t val1, uint8_t val2, uint8_t val3) { @@ -1354,86 +1448,74 @@ acpi_init_gporeg(acpi_t *dev, uint8_t val0, uint8_t val1, uint8_t val2, uint8_t acpi_log("acpi_init_gporeg(): %02X %02X %02X %02X\n", dev->regs.gporeg[0], dev->regs.gporeg[1], dev->regs.gporeg[2], dev->regs.gporeg[3]); } - void acpi_set_timer32(acpi_t *dev, uint8_t timer32) { dev->regs.timer32 = timer32; } - void acpi_set_slot(acpi_t *dev, int slot) { dev->slot = slot; } - void acpi_set_irq_mode(acpi_t *dev, int irq_mode) { dev->irq_mode = irq_mode; } - void acpi_set_irq_pin(acpi_t *dev, int irq_pin) { dev->irq_pin = irq_pin; } - void acpi_set_irq_line(acpi_t *dev, int irq_line) { dev->irq_line = irq_line; } - void acpi_set_mirq_is_level(acpi_t *dev, int mirq_is_level) { dev->mirq_is_level = mirq_is_level; } - void acpi_set_gpireg2_default(acpi_t *dev, uint8_t gpireg2_default) { dev->gpireg2_default = gpireg2_default; - dev->regs.gpireg[2] = dev->gpireg2_default; + dev->regs.gpireg[2] = dev->gpireg2_default; } - void acpi_set_nvr(acpi_t *dev, nvr_t *nvr) { dev->nvr = nvr; } - void acpi_set_trap_update(acpi_t *dev, void (*update)(void *priv), void *priv) { dev->trap_update = update; - dev->trap_priv = priv; + dev->trap_priv = priv; } - uint8_t acpi_ali_soft_smi_status_read(acpi_t *dev) { return dev->regs.ali_soft_smi = 1; } - void acpi_ali_soft_smi_status_write(acpi_t *dev, uint8_t soft_smi) { dev->regs.ali_soft_smi = soft_smi; } - static void acpi_apm_out(uint16_t port, uint8_t val, void *p) { @@ -1444,27 +1526,26 @@ acpi_apm_out(uint16_t port, uint8_t val, void *p) port &= 0x0001; if (dev->vendor == VEN_ALI) { - if (port == 0x0001) { - acpi_log("ALi SOFT SMI# status set (%i)\n", dev->apm->do_smi); - dev->apm->cmd = val; - // acpi_raise_smi(dev, dev->apm->do_smi); - if (dev->apm->do_smi) - smi_raise(); - dev->regs.ali_soft_smi = 1; - } else if (port == 0x0003) - dev->apm->stat = val; + if (port == 0x0001) { + acpi_log("ALi SOFT SMI# status set (%i)\n", dev->apm->do_smi); + dev->apm->cmd = val; + // acpi_raise_smi(dev, dev->apm->do_smi); + if (dev->apm->do_smi) + smi_raise(); + dev->regs.ali_soft_smi = 1; + } else if (port == 0x0003) + dev->apm->stat = val; } else { - if (port == 0x0000) { - dev->apm->cmd = val; - if (dev->vendor == VEN_INTEL) - dev->regs.glbsts |= 0x20; - acpi_raise_smi(dev, dev->apm->do_smi); - } else - dev->apm->stat = val; + if (port == 0x0000) { + dev->apm->cmd = val; + if (dev->vendor == VEN_INTEL) + dev->regs.glbsts |= 0x20; + acpi_raise_smi(dev, dev->apm->do_smi); + } else + dev->apm->stat = val; } } - static uint8_t acpi_apm_in(uint16_t port, void *p) { @@ -1474,15 +1555,15 @@ acpi_apm_in(uint16_t port, void *p) port &= 0x0001; if (dev->vendor == VEN_ALI) { - if (port == 0x0001) - ret = dev->apm->cmd; - else if (port == 0x0003) - ret = dev->apm->stat; + if (port == 0x0001) + ret = dev->apm->cmd; + else if (port == 0x0003) + ret = dev->apm->stat; } else { - if (port == 0x0000) - ret = dev->apm->cmd; - else - ret = dev->apm->stat; + if (port == 0x0000) + ret = dev->apm->cmd; + else + ret = dev->apm->stat; } acpi_log("[%04X:%08X] APM read: %04X = %02X\n", CS, cpu_state.pc, port, ret); @@ -1490,15 +1571,15 @@ acpi_apm_in(uint16_t port, void *p) return ret; } - static void acpi_reset(void *priv) { acpi_t *dev = (acpi_t *) priv; - int i; + int i; memset(&dev->regs, 0x00, sizeof(acpi_regs_t)); - dev->regs.gpireg[0] = 0xff; dev->regs.gpireg[1] = 0xff; + dev->regs.gpireg[0] = 0xff; + dev->regs.gpireg[1] = 0xff; /* A-Trend ATC7020BXII: - Bit 3: 80-conductor cable on secondary IDE channel (active low) - Bit 2: 80-conductor cable on primary IDE channel (active low) @@ -1506,29 +1587,29 @@ acpi_reset(void *priv) - Bit 1: CMOS battery low (active high) */ dev->regs.gpireg[2] = dev->gpireg2_default; for (i = 0; i < 4; i++) - dev->regs.gporeg[i] = dev->gporeg_default[i]; + dev->regs.gporeg[i] = dev->gporeg_default[i]; if (dev->vendor == VEN_VIA_596B) { - dev->regs.gpo_val = 0x7fffffff; - /* FIC VA-503A: - - Bit 11: ATX power (active high) - - Bit 4: 80-conductor cable on primary IDE channel (active low) - - Bit 3: 80-conductor cable on secondary IDE channel (active low) - - Bit 2: password cleared (active low) - ASUS P3V4X: - - Bit 15: 80-conductor cable on secondary IDE channel (active low) - - Bit 5: 80-conductor cable on primary IDE channel (active low) - BCM GT694VA: - - Bit 19: 80-conductor cable on secondary IDE channel (active low) - - Bit 17: 80-conductor cable on primary IDE channel (active low) - ASUS CUV4X-LS: - - Bit 2: 80-conductor cable on secondary IDE channel (active low) - - Bit 1: 80-conductor cable on primary IDE channel (active low) - Acorp 6VIA90AP: - - Bit 3: 80-conductor cable on secondary IDE channel (active low) - - Bit 1: 80-conductor cable on primary IDE channel (active low) */ - dev->regs.gpi_val = 0xfff57fc1; - if (!strcmp(machine_get_internal_name(), "ficva503a") || !strcmp(machine_get_internal_name(), "6via90ap")) - dev->regs.gpi_val |= 0x00000004; + dev->regs.gpo_val = 0x7fffffff; + /* FIC VA-503A: + - Bit 11: ATX power (active high) + - Bit 4: 80-conductor cable on primary IDE channel (active low) + - Bit 3: 80-conductor cable on secondary IDE channel (active low) + - Bit 2: password cleared (active low) + ASUS P3V4X: + - Bit 15: 80-conductor cable on secondary IDE channel (active low) + - Bit 5: 80-conductor cable on primary IDE channel (active low) + BCM GT694VA: + - Bit 19: 80-conductor cable on secondary IDE channel (active low) + - Bit 17: 80-conductor cable on primary IDE channel (active low) + ASUS CUV4X-LS: + - Bit 2: 80-conductor cable on secondary IDE channel (active low) + - Bit 1: 80-conductor cable on primary IDE channel (active low) + Acorp 6VIA90AP: + - Bit 3: 80-conductor cable on secondary IDE channel (active low) + - Bit 1: 80-conductor cable on primary IDE channel (active low) */ + dev->regs.gpi_val = 0xfff57fc1; + if (!strcmp(machine_get_internal_name(), "ficva503a") || !strcmp(machine_get_internal_name(), "6via90ap")) + dev->regs.gpi_val |= 0x00000004; } /* Power on always generates a resume event. */ @@ -1537,12 +1618,11 @@ acpi_reset(void *priv) acpi_rtc_status = 0; } - static void acpi_speed_changed(void *priv) { - acpi_t *dev = (acpi_t *) priv; - cpu_to_acpi = ACPI_TIMER_FREQ / cpuclock; + acpi_t *dev = (acpi_t *) priv; + cpu_to_acpi = ACPI_TIMER_FREQ / cpuclock; bool timer_enabled = timer_is_enabled(&dev->timer); timer_stop(&dev->timer); @@ -1550,16 +1630,15 @@ acpi_speed_changed(void *priv) timer_on_auto(&dev->timer, acpi_get_overflow_period(dev)); } - static void acpi_close(void *priv) { acpi_t *dev = (acpi_t *) priv; if (dev->i2c) { - if (i2c_smbus == i2c_gpio_get_bus(dev->i2c)) - i2c_smbus = NULL; - i2c_gpio_close(dev->i2c); + if (i2c_smbus == i2c_gpio_get_bus(dev->i2c)) + i2c_smbus = NULL; + i2c_gpio_close(dev->i2c); } timer_stop(&dev->timer); @@ -1567,14 +1646,14 @@ acpi_close(void *priv) free(dev); } - static void * acpi_init(const device_t *info) { acpi_t *dev; - dev = (acpi_t *)malloc(sizeof(acpi_t)); - if (dev == NULL) return(NULL); + dev = (acpi_t *) malloc(sizeof(acpi_t)); + if (dev == NULL) + return (NULL); memset(dev, 0x00, sizeof(acpi_t)); cpu_to_acpi = ACPI_TIMER_FREQ / cpuclock; @@ -1583,47 +1662,47 @@ acpi_init(const device_t *info) dev->irq_line = 9; if ((dev->vendor == VEN_INTEL) || (dev->vendor == VEN_ALI)) { - if (dev->vendor == VEN_ALI) - dev->irq_mode = 2; - dev->apm = device_add(&apm_pci_acpi_device); - if (dev->vendor == VEN_ALI) { - acpi_log("Setting I/O handler at port B1\n"); - io_sethandler(0x00b1, 0x0003, acpi_apm_in, NULL, NULL, acpi_apm_out, NULL, NULL, dev); - } else - io_sethandler(0x00b2, 0x0002, acpi_apm_in, NULL, NULL, acpi_apm_out, NULL, NULL, dev); + if (dev->vendor == VEN_ALI) + dev->irq_mode = 2; + dev->apm = device_add(&apm_pci_acpi_device); + if (dev->vendor == VEN_ALI) { + acpi_log("Setting I/O handler at port B1\n"); + io_sethandler(0x00b1, 0x0003, acpi_apm_in, NULL, NULL, acpi_apm_out, NULL, NULL, dev); + } else + io_sethandler(0x00b2, 0x0002, acpi_apm_in, NULL, NULL, acpi_apm_out, NULL, NULL, dev); } else if (dev->vendor == VEN_VIA) { - dev->i2c = i2c_gpio_init("smbus_vt82c586b"); - i2c_smbus = i2c_gpio_get_bus(dev->i2c); + dev->i2c = i2c_gpio_init("smbus_vt82c586b"); + i2c_smbus = i2c_gpio_get_bus(dev->i2c); } switch (dev->vendor) { - case VEN_ALI: - dev->suspend_types[0] = SUS_POWER_OFF; - dev->suspend_types[1] = SUS_POWER_OFF; - dev->suspend_types[2] = SUS_SUSPEND | SUS_NVR | SUS_RESET_CPU | SUS_RESET_PCI; - dev->suspend_types[3] = SUS_SUSPEND; - break; + case VEN_ALI: + dev->suspend_types[0] = SUS_POWER_OFF; + dev->suspend_types[1] = SUS_POWER_OFF; + dev->suspend_types[2] = SUS_SUSPEND | SUS_NVR | SUS_RESET_CPU | SUS_RESET_PCI; + dev->suspend_types[3] = SUS_SUSPEND; + break; - case VEN_VIA: - dev->suspend_types[0] = SUS_POWER_OFF; - dev->suspend_types[2] = SUS_SUSPEND; - break; + case VEN_VIA: + dev->suspend_types[0] = SUS_POWER_OFF; + dev->suspend_types[2] = SUS_SUSPEND; + break; - case VEN_VIA_596B: - dev->suspend_types[1] = SUS_SUSPEND | SUS_NVR | SUS_RESET_CPU | SUS_RESET_PCI; - dev->suspend_types[2] = SUS_POWER_OFF; - dev->suspend_types[4] = SUS_SUSPEND; - dev->suspend_types[5] = SUS_SUSPEND | SUS_RESET_CPU; - dev->suspend_types[6] = SUS_SUSPEND | SUS_RESET_CPU | SUS_RESET_PCI; - break; + case VEN_VIA_596B: + dev->suspend_types[1] = SUS_SUSPEND | SUS_NVR | SUS_RESET_CPU | SUS_RESET_PCI; + dev->suspend_types[2] = SUS_POWER_OFF; + dev->suspend_types[4] = SUS_SUSPEND; + dev->suspend_types[5] = SUS_SUSPEND | SUS_RESET_CPU; + dev->suspend_types[6] = SUS_SUSPEND | SUS_RESET_CPU | SUS_RESET_PCI; + break; - case VEN_INTEL: - dev->suspend_types[0] = SUS_POWER_OFF; - dev->suspend_types[1] = SUS_SUSPEND | SUS_NVR | SUS_RESET_CPU | SUS_RESET_PCI; - dev->suspend_types[2] = SUS_SUSPEND | SUS_RESET_CPU; - dev->suspend_types[3] = SUS_SUSPEND | SUS_RESET_CACHE; - dev->suspend_types[4] = SUS_SUSPEND; - break; + case VEN_INTEL: + dev->suspend_types[0] = SUS_POWER_OFF; + dev->suspend_types[1] = SUS_SUSPEND | SUS_NVR | SUS_RESET_CPU | SUS_RESET_PCI; + dev->suspend_types[2] = SUS_SUSPEND | SUS_RESET_CPU; + dev->suspend_types[3] = SUS_SUSPEND | SUS_RESET_CACHE; + dev->suspend_types[4] = SUS_SUSPEND; + break; } timer_add(&dev->timer, acpi_timer_overflow, dev, 0); @@ -1635,71 +1714,71 @@ acpi_init(const device_t *info) } const device_t acpi_ali_device = { - .name = "ALi M7101 ACPI", + .name = "ALi M7101 ACPI", .internal_name = "acpi_ali", - .flags = DEVICE_PCI, - .local = VEN_ALI, - .init = acpi_init, - .close = acpi_close, - .reset = acpi_reset, + .flags = DEVICE_PCI, + .local = VEN_ALI, + .init = acpi_init, + .close = acpi_close, + .reset = acpi_reset, { .available = NULL }, .speed_changed = acpi_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t acpi_intel_device = { - .name = "Intel ACPI", + .name = "Intel ACPI", .internal_name = "acpi_intel", - .flags = DEVICE_PCI, - .local = VEN_INTEL, - .init = acpi_init, - .close = acpi_close, - .reset = acpi_reset, + .flags = DEVICE_PCI, + .local = VEN_INTEL, + .init = acpi_init, + .close = acpi_close, + .reset = acpi_reset, { .available = NULL }, .speed_changed = acpi_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t acpi_via_device = { - .name = "VIA ACPI", + .name = "VIA ACPI", .internal_name = "acpi_via", - .flags = DEVICE_PCI, - .local = VEN_VIA, - .init = acpi_init, - .close = acpi_close, - .reset = acpi_reset, + .flags = DEVICE_PCI, + .local = VEN_VIA, + .init = acpi_init, + .close = acpi_close, + .reset = acpi_reset, { .available = NULL }, .speed_changed = acpi_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t acpi_via_596b_device = { - .name = "VIA VT82C596 ACPI", + .name = "VIA VT82C596 ACPI", .internal_name = "acpi_via_596b", - .flags = DEVICE_PCI, - .local = VEN_VIA_596B, - .init = acpi_init, - .close = acpi_close, - .reset = acpi_reset, + .flags = DEVICE_PCI, + .local = VEN_VIA_596B, + .init = acpi_init, + .close = acpi_close, + .reset = acpi_reset, { .available = NULL }, .speed_changed = acpi_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t acpi_smc_device = { - .name = "SMC FDC73C931APM ACPI", + .name = "SMC FDC73C931APM ACPI", .internal_name = "acpi_smc", - .flags = DEVICE_PCI, - .local = VEN_SMC, - .init = acpi_init, - .close = acpi_close, - .reset = acpi_reset, + .flags = DEVICE_PCI, + .local = VEN_SMC, + .init = acpi_init, + .close = acpi_close, + .reset = acpi_reset, { .available = NULL }, .speed_changed = acpi_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/apm.c b/src/apm.c index 3fe8d54c6..d4e85d837 100644 --- a/src/apm.c +++ b/src/apm.c @@ -27,34 +27,30 @@ #include <86box/io.h> #include <86box/apm.h> - #ifdef ENABLE_APM_LOG int apm_do_log = ENABLE_APM_LOG; - static void apm_log(const char *fmt, ...) { va_list ap; if (apm_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define apm_log(fmt, ...) +# define apm_log(fmt, ...) #endif - void apm_set_do_smi(apm_t *dev, uint8_t do_smi) { dev->do_smi = do_smi; } - static void apm_out(uint16_t port, uint8_t val, void *p) { @@ -65,102 +61,98 @@ apm_out(uint16_t port, uint8_t val, void *p) port &= 0x0001; if (port == 0x0000) { - dev->cmd = val; - if (dev->do_smi) - smi_raise(); + dev->cmd = val; + if (dev->do_smi) + smi_raise(); } else - dev->stat = val; + dev->stat = val; } - static uint8_t apm_in(uint16_t port, void *p) { - apm_t *dev = (apm_t *) p; + apm_t *dev = (apm_t *) p; uint8_t ret = 0xff; port &= 0x0001; if (port == 0x0000) - ret = dev->cmd; + ret = dev->cmd; else - ret = dev->stat; + ret = dev->stat; apm_log("[%04X:%08X] APM read: %04X = %02X\n", CS, cpu_state.pc, port, ret); return ret; } - static void apm_reset(void *p) { - apm_t *dev = (apm_t *)p; + apm_t *dev = (apm_t *) p; dev->cmd = dev->stat = 0x00; } - static void apm_close(void *p) { - apm_t *dev = (apm_t *)p; + apm_t *dev = (apm_t *) p; free(dev); } - static void -*apm_init(const device_t *info) + * + apm_init(const device_t *info) { apm_t *dev = (apm_t *) malloc(sizeof(apm_t)); memset(dev, 0, sizeof(apm_t)); if (info->local == 0) - io_sethandler(0x00b2, 0x0002, apm_in, NULL, NULL, apm_out, NULL, NULL, dev); + io_sethandler(0x00b2, 0x0002, apm_in, NULL, NULL, apm_out, NULL, NULL, dev); return dev; } - const device_t apm_device = { - .name = "Advanced Power Management", + .name = "Advanced Power Management", .internal_name = "apm", - .flags = 0, - .local = 0, - .init = apm_init, - .close = apm_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = apm_init, + .close = apm_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t apm_pci_device = { - .name = "Advanced Power Management (PCI)", + .name = "Advanced Power Management (PCI)", .internal_name = "apm_pci", - .flags = DEVICE_PCI, - .local = 0, - .init = apm_init, - .close = apm_close, - .reset = apm_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = apm_init, + .close = apm_close, + .reset = apm_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t apm_pci_acpi_device = { - .name = "Advanced Power Management (PCI)", + .name = "Advanced Power Management (PCI)", .internal_name = "apm_pci_acpi", - .flags = DEVICE_PCI, - .local = 1, - .init = apm_init, - .close = apm_close, - .reset = apm_reset, + .flags = DEVICE_PCI, + .local = 1, + .init = apm_init, + .close = apm_close, + .reset = apm_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/arch_detect.c b/src/arch_detect.c index 03d3b61e7..42ebde095 100644 --- a/src/arch_detect.c +++ b/src/arch_detect.c @@ -16,12 +16,12 @@ */ #if defined(__arm__) || defined(__TARGET_ARCH_ARM) - #error ARCH arm +# error ARCH arm #elif defined(__aarch64__) || defined(_M_ARM64) - #error ARCH arm64 +# error ARCH arm64 #elif defined(__i386) || defined(__i386__) || defined(_M_IX86) - #error ARCH i386 +# error ARCH i386 #elif defined(__x86_64) || defined(__x86_64__) || defined(__amd64) || defined(_M_X64) - #error ARCH x86_64 +# error ARCH x86_64 #endif #error ARCH unknown diff --git a/src/config.c b/src/config.c index 69c4e7c6b..f9fa81945 100644 --- a/src/config.c +++ b/src/config.c @@ -73,8 +73,7 @@ #include <86box/ui.h> #include <86box/snd_opl.h> - -static int cx, cy, cw, ch; +static int cx, cy, cw, ch; static ini_t config; /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ @@ -104,8 +103,8 @@ static void load_general(void) { ini_section_t cat = ini_find_section(config, "General"); - char temp[512]; - char *p; + char temp[512]; + char *p; vid_resize = ini_section_get_int(cat, "vid_resize", 0); if (vid_resize & ~3) @@ -201,13 +200,13 @@ load_general(void) window_remember = ini_section_get_int(cat, "window_remember", 0); if (window_remember) { - p = ini_section_get_string(cat, "window_coordinates", NULL); - if (p == NULL) - p = "0, 0, 0, 0"; - sscanf(p, "%i, %i, %i, %i", &cw, &ch, &cx, &cy); + p = ini_section_get_string(cat, "window_coordinates", NULL); + if (p == NULL) + p = "0, 0, 0, 0"; + sscanf(p, "%i, %i, %i, %i", &cw, &ch, &cx, &cy); } else { - cw = ch = cx = cy = 0; - ini_section_delete_var(cat, "window_remember"); + cw = ch = cx = cy = 0; + ini_section_delete_var(cat, "window_remember"); } ini_section_delete_var(cat, "window_coordinates"); @@ -218,8 +217,8 @@ static void load_monitor(int monitor_index) { ini_section_t cat; - char name[512], temp[512]; - char *p = NULL; + char name[512], temp[512]; + char *p = NULL; sprintf(name, "Monitor #%i", monitor_index + 1); sprintf(temp, "%i, %i, %i, %i", cx, cy, cw, ch); @@ -229,7 +228,7 @@ load_monitor(int monitor_index) p = ini_section_get_string(cat, "window_coordinates", NULL); if (p == NULL) - p = temp; + p = temp; if (window_remember) { sscanf(p, "%i, %i, %i, %i", @@ -245,10 +244,10 @@ load_monitor(int monitor_index) static void load_machine(void) { - ini_section_t cat = ini_find_section(config, "Machine"); - char *p, *migrate_from = NULL; - int c, i, j, speed, legacy_mfg, legacy_cpu; - double multi; + ini_section_t cat = ini_find_section(config, "Machine"); + char *p, *migrate_from = NULL; + int c, i, j, speed, legacy_mfg, legacy_cpu; + double multi; p = ini_section_get_string(cat, "machine", NULL); if (p != NULL) { @@ -525,8 +524,8 @@ static void load_video(void) { ini_section_t cat = ini_find_section(config, "Video"); - char *p; - int free_p = 0; + char *p; + int free_p = 0; if (machine_has_flags(machine, MACHINE_VIDEO_ONLY)) { ini_section_delete_var(cat, "gfxcard"); @@ -551,13 +550,13 @@ load_video(void) free(p); } - voodoo_enabled = !!ini_section_get_int(cat, "voodoo", 0); - ibm8514_enabled = !!ini_section_get_int(cat, "8514a", 0); - xga_enabled = !!ini_section_get_int(cat, "xga", 0); - show_second_monitors = !!ini_section_get_int(cat, "show_second_monitors", 1); + voodoo_enabled = !!ini_section_get_int(cat, "voodoo", 0); + ibm8514_enabled = !!ini_section_get_int(cat, "8514a", 0); + xga_enabled = !!ini_section_get_int(cat, "xga", 0); + show_second_monitors = !!ini_section_get_int(cat, "show_second_monitors", 1); video_fullscreen_scale_maximized = !!ini_section_get_int(cat, "video_fullscreen_scale_maximized", 0); - - p = ini_section_get_string(cat, "gfxcard_2", NULL); + + p = ini_section_get_string(cat, "gfxcard_2", NULL); if (!p) p = "none"; gfxcard_2 = video_get_video_from_internal_name(p); @@ -568,9 +567,9 @@ static void load_input_devices(void) { ini_section_t cat = ini_find_section(config, "Input devices"); - char temp[512]; - int c, d; - char *p; + char temp[512]; + int c, d; + char *p; p = ini_section_get_string(cat, "mouse_type", NULL); if (p != NULL) @@ -658,8 +657,8 @@ static void load_sound(void) { ini_section_t cat = ini_find_section(config, "Sound"); - char temp[512]; - char *p; + char temp[512]; + char *p; p = ini_section_get_string(cat, "sndcard", NULL); /* FIXME: Hack to not break configs with the Sound Blaster 128 PCI set. */ @@ -712,9 +711,9 @@ static void load_network(void) { ini_section_t cat = ini_find_section(config, "Network"); - char *p; - char temp[512]; - int c = 0, min = 0; + char *p; + char temp[512]; + int c = 0, min = 0; /* Handle legacy configuration which supported only one NIC */ p = ini_section_get_string(cat, "net_card", NULL); @@ -796,10 +795,9 @@ load_network(void) strcpy(net_cards_conf[c].host_dev_name, "none"); } - sprintf(temp, "net_%02i_link", c +1); + sprintf(temp, "net_%02i_link", c + 1); net_cards_conf[c].link_state = ini_section_get_int(cat, temp, - (NET_LINK_10_HD|NET_LINK_10_FD|NET_LINK_100_HD|NET_LINK_100_FD|NET_LINK_1000_HD|NET_LINK_1000_FD)); - + (NET_LINK_10_HD | NET_LINK_10_FD | NET_LINK_100_HD | NET_LINK_100_FD | NET_LINK_1000_HD | NET_LINK_1000_FD)); } } @@ -808,9 +806,9 @@ static void load_ports(void) { ini_section_t cat = ini_find_section(config, "Ports (COM & LPT)"); - char *p; - char temp[512]; - int c, d; + char *p; + char temp[512]; + int c, d; for (c = 0; c < SERIAL_MAX; c++) { sprintf(temp, "serial%d_enabled", c + 1); @@ -846,9 +844,9 @@ static void load_storage_controllers(void) { ini_section_t cat = ini_find_section(config, "Storage controllers"); - char *p, temp[512]; - int c, min = 0; - int free_p = 0; + char *p, temp[512]; + int c, min = 0; + int free_p = 0; /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ backwards_compat2 = (cat == NULL); @@ -959,13 +957,13 @@ load_storage_controllers(void) static void load_hard_disks(void) { - ini_section_t cat = ini_find_section(config, "Hard disks"); - char temp[512], tmp2[512]; - char s[512]; - int c; - char *p; - uint32_t max_spt, max_hpc, max_tracks; - uint32_t board = 0, dev = 0; + ini_section_t cat = ini_find_section(config, "Hard disks"); + char temp[512], tmp2[512]; + char s[512]; + int c; + char *p; + uint32_t max_spt, max_hpc, max_tracks; + uint32_t board = 0, dev = 0; memset(temp, '\0', sizeof(temp)); for (c = 0; c < HDD_NUM; c++) { @@ -1161,8 +1159,8 @@ static void load_floppy_drives(void) { ini_section_t cat = ini_find_section(config, "Floppy drives"); - char temp[512], *p; - int c; + char temp[512], *p; + int c; if (!backwards_compat) return; @@ -1221,11 +1219,11 @@ load_floppy_drives(void) static void load_floppy_and_cdrom_drives(void) { - ini_section_t cat = ini_find_section(config, "Floppy and CD-ROM drives"); - char temp[512], tmp2[512], *p; - char s[512]; - unsigned int board = 0, dev = 0; - int c, d = 0; + ini_section_t cat = ini_find_section(config, "Floppy and CD-ROM drives"); + char temp[512], tmp2[512], *p; + char s[512]; + unsigned int board = 0, dev = 0; + int c, d = 0; /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ backwards_compat = (cat == NULL); @@ -1415,7 +1413,7 @@ load_floppy_and_cdrom_drives(void) cdrom[c].image_history[i] = (char *) calloc(MAX_IMAGE_PATH_LEN + 1, sizeof(char)); sprintf(temp, "cdrom_%02i_image_history_%02i", c + 1, i + 1); p = ini_section_get_string(cat, temp, NULL); - if(p) { + if (p) { sprintf(cdrom[c].image_history[i], "%s", p); } } @@ -1427,10 +1425,10 @@ static void load_other_removable_devices(void) { ini_section_t cat = ini_find_section(config, "Other removable devices"); - char temp[512], tmp2[512], *p; - char s[512]; - unsigned int board = 0, dev = 0; - int c, d = 0; + char temp[512], tmp2[512], *p; + char s[512]; + unsigned int board = 0, dev = 0; + int c, d = 0; /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ if (backwards_compat) { @@ -1703,9 +1701,9 @@ static void load_other_peripherals(void) { ini_section_t cat = ini_find_section(config, "Other peripherals"); - char *p; - char temp[512]; - int c, free_p = 0; + char *p; + char temp[512]; + int c, free_p = 0; if (backwards_compat2) { p = ini_section_get_string(cat, "scsicard", NULL); @@ -1882,7 +1880,7 @@ static void save_general(void) { ini_section_t cat = ini_find_or_create_section(config, "General"); - char temp[512], buffer[512] = { 0 }; + char temp[512], buffer[512] = { 0 }; char *va_name; @@ -2058,8 +2056,8 @@ save_monitor(int monitor_index) snprintf(cat, sizeof(cat), "Monitor #%i", monitor_index + 1); if (window_remember) { sprintf(temp, "%i, %i, %i, %i", - monitor_settings[monitor_index].mon_window_x, monitor_settings[monitor_index].mon_window_y, - monitor_settings[monitor_index].mon_window_w, monitor_settings[monitor_index].mon_window_h); + monitor_settings[monitor_index].mon_window_x, monitor_settings[monitor_index].mon_window_y, + monitor_settings[monitor_index].mon_window_w, monitor_settings[monitor_index].mon_window_h); ini_section_set_string(cat, "window_coordinates", temp); if (monitor_settings[monitor_index].mon_window_maximized != 0) { @@ -2078,8 +2076,8 @@ static void save_machine(void) { ini_section_t cat = ini_find_or_create_section(config, "Machine"); - char *p; - int c, i = 0, legacy_mfg, legacy_cpu = -1, closest_legacy_cpu = -1; + char *p; + int c, i = 0, legacy_mfg, legacy_cpu = -1, closest_legacy_cpu = -1; p = machine_get_internal_name(); ini_section_set_string(cat, "machine", p); @@ -2183,7 +2181,7 @@ save_video(void) ini_section_t cat = ini_find_or_create_section(config, "Video"); ini_section_set_string(cat, "gfxcard", - video_get_internal_name(gfxcard)); + video_get_internal_name(gfxcard)); if (voodoo_enabled == 0) ini_section_delete_var(cat, "voodoo"); @@ -2223,8 +2221,8 @@ static void save_input_devices(void) { ini_section_t cat = ini_find_or_create_section(config, "Input devices"); - char temp[512], tmp2[512]; - int c, d; + char temp[512], tmp2[512]; + int c, d; ini_section_set_string(cat, "mouse_type", mouse_get_internal_name(mouse_type)); @@ -2331,8 +2329,8 @@ save_sound(void) static void save_network(void) { - int c = 0; - char temp[512]; + int c = 0; + char temp[512]; ini_section_t cat = ini_find_or_create_section(config, "Network"); ini_section_delete_var(cat, "net_type"); @@ -2351,8 +2349,8 @@ save_network(void) if (net_cards_conf[c].net_type == NET_TYPE_NONE) { ini_section_delete_var(cat, temp); } else { - ini_section_set_string(cat, temp, - (net_cards_conf[c].net_type == NET_TYPE_SLIRP) ? "slirp" : "pcap"); + ini_section_set_string(cat, temp, + (net_cards_conf[c].net_type == NET_TYPE_SLIRP) ? "slirp" : "pcap"); } sprintf(temp, "net_%02i_host_device", c + 1); @@ -2367,7 +2365,7 @@ save_network(void) } sprintf(temp, "net_%02i_link", c + 1); - if (net_cards_conf[c].link_state == (NET_LINK_10_HD|NET_LINK_10_FD|NET_LINK_100_HD|NET_LINK_100_FD|NET_LINK_1000_HD|NET_LINK_1000_FD)) { + if (net_cards_conf[c].link_state == (NET_LINK_10_HD | NET_LINK_10_FD | NET_LINK_100_HD | NET_LINK_100_FD | NET_LINK_1000_HD | NET_LINK_1000_FD)) { ini_section_delete_var(cat, temp); } else { ini_section_set_int(cat, temp, net_cards_conf[c].link_state); @@ -2382,8 +2380,8 @@ static void save_ports(void) { ini_section_t cat = ini_find_or_create_section(config, "Ports (COM & LPT)"); - char temp[512]; - int c, d; + char temp[512]; + int c, d; for (c = 0; c < SERIAL_MAX; c++) { sprintf(temp, "serial%d_enabled", c + 1); @@ -2392,20 +2390,20 @@ save_ports(void) else ini_section_set_int(cat, temp, com_ports[c].enabled); -/* - sprintf(temp, "serial%d_type", c + 1); - if (!com_ports[c].enabled)) - ini_section_delete_var(cat, temp); -// else -// ini_section_set_string(cat, temp, (char *) serial_type[c]) + /* + sprintf(temp, "serial%d_type", c + 1); + if (!com_ports[c].enabled)) + ini_section_delete_var(cat, temp); + // else + // ini_section_set_string(cat, temp, (char *) serial_type[c]) - sprintf(temp, "serial%d_device", c + 1); - if (com_ports[c].device == 0) - ini_section_delete_var(cat, temp); - else - ini_section_set_string(cat, temp, - (char *) com_device_get_internal_name(com_ports[c].device)); - */ + sprintf(temp, "serial%d_device", c + 1); + if (com_ports[c].device == 0) + ini_section_delete_var(cat, temp); + else + ini_section_set_string(cat, temp, + (char *) com_device_get_internal_name(com_ports[c].device)); + */ } for (c = 0; c < PARALLEL_MAX; c++) { @@ -2421,7 +2419,7 @@ save_ports(void) ini_section_delete_var(cat, temp); else ini_section_set_string(cat, temp, - (char *) lpt_device_get_internal_name(lpt_ports[c].device)); + (char *) lpt_device_get_internal_name(lpt_ports[c].device)); } ini_delete_section_if_empty(config, cat); @@ -2432,8 +2430,8 @@ static void save_storage_controllers(void) { ini_section_t cat = ini_find_or_create_section(config, "Storage controllers"); - char temp[512]; - int c; + char temp[512]; + int c; ini_section_delete_var(cat, "scsicard"); @@ -2444,17 +2442,17 @@ save_storage_controllers(void) ini_section_delete_var(cat, temp); else ini_section_set_string(cat, temp, - scsi_card_get_internal_name(scsi_card_current[c])); + scsi_card_get_internal_name(scsi_card_current[c])); } if (fdc_type == FDC_INTERNAL) ini_section_delete_var(cat, "fdc"); else ini_section_set_string(cat, "fdc", - fdc_card_get_internal_name(fdc_type)); + fdc_card_get_internal_name(fdc_type)); ini_section_set_string(cat, "hdc", - hdc_get_internal_name(hdc_current)); + hdc_get_internal_name(hdc_current)); if (ide_ter_enabled == 0) ini_section_delete_var(cat, "ide_ter"); @@ -2522,8 +2520,8 @@ static void save_other_peripherals(void) { ini_section_t cat = ini_find_or_create_section(config, "Other peripherals"); - char temp[512]; - int c; + char temp[512]; + int c; if (bugger_enabled == 0) ini_section_delete_var(cat, "bugger_enabled"); @@ -2541,14 +2539,14 @@ save_other_peripherals(void) ini_section_delete_var(cat, temp); else ini_section_set_string(cat, temp, - (char *) isamem_get_internal_name(isamem_type[c])); + (char *) isamem_get_internal_name(isamem_type[c])); } if (isartc_type == 0) ini_section_delete_var(cat, "isartc_type"); else ini_section_set_string(cat, "isartc_type", - isartc_get_internal_name(isartc_type)); + isartc_get_internal_name(isartc_type)); ini_delete_section_if_empty(config, cat); } @@ -2558,9 +2556,9 @@ static void save_hard_disks(void) { ini_section_t cat = ini_find_or_create_section(config, "Hard disks"); - char temp[32], tmp2[512]; - char *p; - int c; + char temp[32], tmp2[512]; + char *p; + int c; memset(temp, 0x00, sizeof(temp)); for (c = 0; c < HDD_NUM; c++) { @@ -2637,8 +2635,8 @@ static void save_floppy_and_cdrom_drives(void) { ini_section_t cat = ini_find_or_create_section(config, "Floppy and CD-ROM drives"); - char temp[512], tmp2[512]; - int c; + char temp[512], tmp2[512]; + int c; for (c = 0; c < FDD_NUM; c++) { sprintf(temp, "fdd_%02i_type", c + 1); @@ -2646,7 +2644,7 @@ save_floppy_and_cdrom_drives(void) ini_section_delete_var(cat, temp); else ini_section_set_string(cat, temp, - fdd_get_internal_name(fdd_get_type(c))); + fdd_get_internal_name(fdd_get_type(c))); sprintf(temp, "fdd_%02i_fn", c + 1); if (strlen(floppyfns[c]) == 0) { @@ -2733,7 +2731,7 @@ save_floppy_and_cdrom_drives(void) for (int i = 0; i < MAX_PREV_IMAGES; i++) { sprintf(temp, "cdrom_%02i_image_history_%02i", c + 1, i + 1); - if((cdrom[c].image_history[i] == 0) || strlen(cdrom[c].image_history[i]) == 0) { + if ((cdrom[c].image_history[i] == 0) || strlen(cdrom[c].image_history[i]) == 0) { ini_section_delete_var(cat, temp); } else { ini_section_set_string(cat, temp, cdrom[c].image_history[i]); @@ -2749,8 +2747,8 @@ static void save_other_removable_devices(void) { ini_section_t cat = ini_find_or_create_section(config, "Other removable devices"); - char temp[512], tmp2[512]; - int c; + char temp[512], tmp2[512]; + int c; for (c = 0; c < ZIP_NUM; c++) { sprintf(temp, "zip_%02i_parameters", c + 1); diff --git a/src/ddma.c b/src/ddma.c index 2993add52..88afe3f69 100644 --- a/src/ddma.c +++ b/src/ddma.c @@ -35,130 +35,125 @@ #include <86box/dma.h> #include <86box/ddma.h> - #ifdef ENABLE_DDMA_LOG int ddma_do_log = ENABLE_DDMA_LOG; - static void ddma_log(const char *fmt, ...) { va_list ap; if (ddma_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define ddma_log(fmt, ...) +# define ddma_log(fmt, ...) #endif static uint8_t ddma_reg_read(uint16_t addr, void *p) { - ddma_channel_t *dev = (ddma_channel_t *) p; - uint8_t ret = 0xff; - int ch = dev->channel; - int dmab = (ch >= 4) ? 0xc0 : 0x00; + ddma_channel_t *dev = (ddma_channel_t *) p; + uint8_t ret = 0xff; + int ch = dev->channel; + int dmab = (ch >= 4) ? 0xc0 : 0x00; switch (addr & 0x0f) { - case 0x00: - ret = dma[ch].ac & 0xff; - break; - case 0x01: - ret = (dma[ch].ac >> 8) & 0xff; - break; - case 0x02: - ret = dma[ch].page; - break; - case 0x04: - ret = dma[ch].cc & 0xff; - break; - case 0x05: - ret = (dma[ch].cc >> 8) & 0xff; - break; - case 0x09: - ret = inb(dmab + 0x08); - break; + case 0x00: + ret = dma[ch].ac & 0xff; + break; + case 0x01: + ret = (dma[ch].ac >> 8) & 0xff; + break; + case 0x02: + ret = dma[ch].page; + break; + case 0x04: + ret = dma[ch].cc & 0xff; + break; + case 0x05: + ret = (dma[ch].cc >> 8) & 0xff; + break; + case 0x09: + ret = inb(dmab + 0x08); + break; } return ret; } - static void ddma_reg_write(uint16_t addr, uint8_t val, void *p) { - ddma_channel_t *dev = (ddma_channel_t *) p; - int ch = dev->channel; - int page_regs[4] = { 7, 3, 1, 2 }; - int i, dmab = (ch >= 4) ? 0xc0 : 0x00; + ddma_channel_t *dev = (ddma_channel_t *) p; + int ch = dev->channel; + int page_regs[4] = { 7, 3, 1, 2 }; + int i, dmab = (ch >= 4) ? 0xc0 : 0x00; switch (addr & 0x0f) { - case 0x00: - dma[ch].ab = (dma[ch].ab & 0xffff00) | val; - dma[ch].ac = dma[ch].ab; - break; - case 0x01: - dma[ch].ab = (dma[ch].ab & 0xff00ff) | (val << 8); - dma[ch].ac = dma[ch].ab; - break; - case 0x02: - if (ch >= 4) - outb(0x88 + page_regs[ch & 3], val); - else - outb(0x80 + page_regs[ch & 3], val); - break; - case 0x04: - dma[ch].cb = (dma[ch].cb & 0xffff00) | val; - dma[ch].cc = dma[ch].cb; - break; - case 0x05: - dma[ch].cb = (dma[ch].cb & 0xff00ff) | (val << 8); - dma[ch].cc = dma[ch].cb; - break; - case 0x08: - outb(dmab + 0x08, val); - break; - case 0x09: - outb(dmab + 0x09, val); - break; - case 0x0a: - outb(dmab + 0x0a, val); - break; - case 0x0b: - outb(dmab + 0x0b, val); - break; - case 0x0d: - outb(dmab + 0x0d, val); - break; - case 0x0e: - for (i = 0; i < 4; i++) - outb(dmab + 0x0a, i); - break; - case 0x0f: - outb(dmab + 0x0a, (val << 2) | (ch & 3)); - break; + case 0x00: + dma[ch].ab = (dma[ch].ab & 0xffff00) | val; + dma[ch].ac = dma[ch].ab; + break; + case 0x01: + dma[ch].ab = (dma[ch].ab & 0xff00ff) | (val << 8); + dma[ch].ac = dma[ch].ab; + break; + case 0x02: + if (ch >= 4) + outb(0x88 + page_regs[ch & 3], val); + else + outb(0x80 + page_regs[ch & 3], val); + break; + case 0x04: + dma[ch].cb = (dma[ch].cb & 0xffff00) | val; + dma[ch].cc = dma[ch].cb; + break; + case 0x05: + dma[ch].cb = (dma[ch].cb & 0xff00ff) | (val << 8); + dma[ch].cc = dma[ch].cb; + break; + case 0x08: + outb(dmab + 0x08, val); + break; + case 0x09: + outb(dmab + 0x09, val); + break; + case 0x0a: + outb(dmab + 0x0a, val); + break; + case 0x0b: + outb(dmab + 0x0b, val); + break; + case 0x0d: + outb(dmab + 0x0d, val); + break; + case 0x0e: + for (i = 0; i < 4; i++) + outb(dmab + 0x0a, i); + break; + case 0x0f: + outb(dmab + 0x0a, (val << 2) | (ch & 3)); + break; } } - void ddma_update_io_mapping(ddma_t *dev, int ch, uint8_t base_l, uint8_t base_h, int enable) { if (dev->channels[ch].enable && (dev->channels[ch].io_base != 0x0000)) - io_removehandler(dev->channels[ch].io_base, 0x10, ddma_reg_read, NULL, NULL, ddma_reg_write, NULL, NULL, &dev->channels[ch]); + io_removehandler(dev->channels[ch].io_base, 0x10, ddma_reg_read, NULL, NULL, ddma_reg_write, NULL, NULL, &dev->channels[ch]); dev->channels[ch].io_base = base_l | (base_h << 8); - dev->channels[ch].enable = enable; + dev->channels[ch].enable = enable; if (dev->channels[ch].enable && (dev->channels[ch].io_base != 0x0000)) - io_sethandler(dev->channels[ch].io_base, 0x10, ddma_reg_read, NULL, NULL, ddma_reg_write, NULL, NULL, &dev->channels[ch]); + io_sethandler(dev->channels[ch].io_base, 0x10, ddma_reg_read, NULL, NULL, ddma_reg_write, NULL, NULL, &dev->channels[ch]); } - static void ddma_close(void *priv) { @@ -167,33 +162,33 @@ ddma_close(void *priv) free(dev); } - static void * ddma_init(const device_t *info) { ddma_t *dev; - int i; + int i; - dev = (ddma_t *)malloc(sizeof(ddma_t)); - if (dev == NULL) return(NULL); + dev = (ddma_t *) malloc(sizeof(ddma_t)); + if (dev == NULL) + return (NULL); memset(dev, 0x00, sizeof(ddma_t)); for (i = 0; i < 8; i++) - dev->channels[i].channel = i; + dev->channels[i].channel = i; return dev; } const device_t ddma_device = { - .name = "Distributed DMA", + .name = "Distributed DMA", .internal_name = "ddma", - .flags = DEVICE_PCI, - .local = 0, - .init = ddma_init, - .close = ddma_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = 0, + .init = ddma_init, + .close = ddma_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/device.c b/src/device.c index 0eace721e..6b52ec3b1 100644 --- a/src/device.c +++ b/src/device.c @@ -53,35 +53,30 @@ #include <86box/rom.h> #include <86box/sound.h> +#define DEVICE_MAX 256 /* max # of devices */ -#define DEVICE_MAX 256 /* max # of devices */ - - -static device_t *devices[DEVICE_MAX]; -static void *device_priv[DEVICE_MAX]; -static device_context_t device_current, device_prev; - +static device_t *devices[DEVICE_MAX]; +static void *device_priv[DEVICE_MAX]; +static device_context_t device_current, device_prev; #ifdef ENABLE_DEVICE_LOG int device_do_log = ENABLE_DEVICE_LOG; - static void device_log(const char *fmt, ...) { va_list ap; if (device_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define device_log(fmt, ...) +# define device_log(fmt, ...) #endif - /* Initialize the module for use. */ void device_init(void) @@ -89,7 +84,6 @@ device_init(void) memset(devices, 0x00, sizeof(devices)); } - void device_set_context(device_context_t *c, const device_t *d, int inst) { @@ -98,21 +92,20 @@ device_set_context(device_context_t *c, const device_t *d, int inst) memset(c, 0, sizeof(device_context_t)); c->dev = d; if (inst) { - sprintf(c->name, "%s #%i", d->name, inst); + sprintf(c->name, "%s #%i", d->name, inst); - /* If this is the first instance and a numbered section is not present, but a non-numbered - section of the same name is, rename the non-numbered section to numbered. */ - if (inst == 1) { - sec = config_find_section(c->name); - single_sec = config_find_section((char *) d->name); - if ((sec == NULL) && (single_sec != NULL)) - config_rename_section(single_sec, c->name); - } + /* If this is the first instance and a numbered section is not present, but a non-numbered + section of the same name is, rename the non-numbered section to numbered. */ + if (inst == 1) { + sec = config_find_section(c->name); + single_sec = config_find_section((char *) d->name); + if ((sec == NULL) && (single_sec != NULL)) + config_rename_section(single_sec, c->name); + } } else - sprintf(c->name, "%s", d->name); + sprintf(c->name, "%s", d->name); } - static void device_context_common(const device_t *d, int inst) { @@ -120,98 +113,92 @@ device_context_common(const device_t *d, int inst) device_set_context(&device_current, d, inst); } - void device_context(const device_t *d) { device_context_common(d, 0); } - void device_context_inst(const device_t *d, int inst) { device_context_common(d, inst); } - void device_context_restore(void) { memcpy(&device_current, &device_prev, sizeof(device_context_t)); } - static void * device_add_common(const device_t *d, const device_t *cd, void *p, int inst) { void *priv = NULL; - int c; + int c; for (c = 0; c < 256; c++) { - if (!inst && (devices[c] == (device_t *) d)) { - device_log("DEVICE: device already exists!\n"); - return (NULL); - } - if (devices[c] == NULL) break; + if (!inst && (devices[c] == (device_t *) d)) { + device_log("DEVICE: device already exists!\n"); + return (NULL); + } + if (devices[c] == NULL) + break; } if (c >= DEVICE_MAX) - fatal("DEVICE: too many devices\n"); + fatal("DEVICE: too many devices\n"); /* Do this so that a chained device_add will not identify the same ID its master device is already trying to assign. */ - devices[c] = (device_t *)d; + devices[c] = (device_t *) d; if (p == NULL) { - memcpy(&device_prev, &device_current, sizeof(device_context_t)); - device_set_context(&device_current, cd, inst); + memcpy(&device_prev, &device_current, sizeof(device_context_t)); + device_set_context(&device_current, cd, inst); - if (d->init != NULL) { - priv = d->init(d); - if (priv == NULL) { - if (d->name) - device_log("DEVICE: device '%s' init failed\n", d->name); - else - device_log("DEVICE: device init failed\n"); + if (d->init != NULL) { + priv = d->init(d); + if (priv == NULL) { + if (d->name) + device_log("DEVICE: device '%s' init failed\n", d->name); + else + device_log("DEVICE: device init failed\n"); - devices[c] = NULL; - device_priv[c] = NULL; + devices[c] = NULL; + device_priv[c] = NULL; - return(NULL); - } - } + return (NULL); + } + } - if (d->name) - device_log("DEVICE: device '%s' init successful\n", d->name); - else - device_log("DEVICE: device init successful\n"); + if (d->name) + device_log("DEVICE: device '%s' init successful\n", d->name); + else + device_log("DEVICE: device init successful\n"); - memcpy(&device_current, &device_prev, sizeof(device_context_t)); - device_priv[c] = priv; + memcpy(&device_current, &device_prev, sizeof(device_context_t)); + device_priv[c] = priv; } else - device_priv[c] = p; + device_priv[c] = p; - return(priv); + return (priv); } - char * device_get_internal_name(const device_t *d) { if (d == NULL) - return ""; + return ""; return (char *) d->internal_name; } - void * device_add(const device_t *d) { return device_add_common(d, d, NULL, 0); } - /* For devices that do not have an init function (internal video etc.) */ void device_add_ex(const device_t *d, void *priv) @@ -219,14 +206,12 @@ device_add_ex(const device_t *d, void *priv) device_add_common(d, d, priv, 0); } - void * device_add_inst(const device_t *d, int inst) { return device_add_common(d, d, NULL, inst); } - /* For devices that do not have an init function (internal video etc.) */ void device_add_inst_ex(const device_t *d, void *priv, int inst) @@ -234,7 +219,6 @@ device_add_inst_ex(const device_t *d, void *priv, int inst) device_add_common(d, d, priv, inst); } - /* These four are to add a device with another device's context - will be used to add machines' internal devices. */ void * @@ -243,7 +227,6 @@ device_cadd(const device_t *d, const device_t *cd) return device_add_common(d, cd, NULL, 0); } - /* For devices that do not have an init function (internal video etc.) */ void device_cadd_ex(const device_t *d, const device_t *cd, void *priv) @@ -251,14 +234,12 @@ device_cadd_ex(const device_t *d, const device_t *cd, void *priv) device_add_common(d, cd, priv, 0); } - void * device_cadd_inst(const device_t *d, const device_t *cd, int inst) { return device_add_common(d, cd, NULL, inst); } - /* For devices that do not have an init function (internal video etc.) */ void device_cadd_inst_ex(const device_t *d, const device_t *cd, void *priv, int inst) @@ -266,173 +247,164 @@ device_cadd_inst_ex(const device_t *d, const device_t *cd, void *priv, int inst) device_add_common(d, cd, priv, inst); } - void device_close_all(void) { int c; for (c = (DEVICE_MAX - 1); c >= 0; c--) { - if (devices[c] != NULL) { - if (devices[c]->name) - device_log("Closing device: \"%s\"...\n", devices[c]->name); - if (devices[c]->close != NULL) - devices[c]->close(device_priv[c]); - devices[c] = device_priv[c] = NULL; - } + if (devices[c] != NULL) { + if (devices[c]->name) + device_log("Closing device: \"%s\"...\n", devices[c]->name); + if (devices[c]->close != NULL) + devices[c]->close(device_priv[c]); + devices[c] = device_priv[c] = NULL; + } } } - void device_reset_all(void) { int c; for (c = 0; c < DEVICE_MAX; c++) { - if (devices[c] != NULL) { - if (devices[c]->reset != NULL) - devices[c]->reset(device_priv[c]); - } + if (devices[c] != NULL) { + if (devices[c]->reset != NULL) + devices[c]->reset(device_priv[c]); + } } } - /* Reset all attached PCI devices - needed for PCI turbo reset control. */ void device_reset_all_pci(void) { int c; - for (c=0; creset != NULL) && (devices[c]->flags & DEVICE_PCI)) - devices[c]->reset(device_priv[c]); - } + for (c = 0; c < DEVICE_MAX; c++) { + if (devices[c] != NULL) { + if ((devices[c]->reset != NULL) && (devices[c]->flags & DEVICE_PCI)) + devices[c]->reset(device_priv[c]); + } } } - void * device_get_priv(const device_t *d) { int c; for (c = 0; c < DEVICE_MAX; c++) { - if (devices[c] != NULL) { - if (devices[c] == d) - return(device_priv[c]); - } + if (devices[c] != NULL) { + if (devices[c] == d) + return (device_priv[c]); + } } - return(NULL); + return (NULL); } - int device_available(const device_t *d) { - device_config_t *config = NULL; - device_config_bios_t *bios = NULL; - int bf, roms_present = 0; - int i = 0; + device_config_t *config = NULL; + device_config_bios_t *bios = NULL; + int bf, roms_present = 0; + int i = 0; if (d != NULL) { - config = (device_config_t *) d->config; - if (config != NULL) { - while (config->type != -1) { - if (config->type == CONFIG_BIOS) { - bios = (device_config_bios_t *) config->bios; + config = (device_config_t *) d->config; + if (config != NULL) { + while (config->type != -1) { + if (config->type == CONFIG_BIOS) { + bios = (device_config_bios_t *) config->bios; - /* Go through the ROM's in the device configuration. */ - while (bios->files_no != 0) { - i = 0; - for (bf = 0; bf < bios->files_no; bf++) - i += !!rom_present((char *) bios->files[bf]); - if (i == bios->files_no) - roms_present++; - bios++; - } + /* Go through the ROM's in the device configuration. */ + while (bios->files_no != 0) { + i = 0; + for (bf = 0; bf < bios->files_no; bf++) + i += !!rom_present((char *) bios->files[bf]); + if (i == bios->files_no) + roms_present++; + bios++; + } - return(roms_present ? -1 : 0); - } - config++; - } - } + return (roms_present ? -1 : 0); + } + config++; + } + } - /* No CONFIG_BIOS field present, use the classic available(). */ - if (d->available != NULL) - return(d->available()); - else - return(1); + /* No CONFIG_BIOS field present, use the classic available(). */ + if (d->available != NULL) + return (d->available()); + else + return (1); } /* A NULL device is never available. */ - return(0); + return (0); } - int device_has_config(const device_t *d) { - int c = 0; + int c = 0; device_config_t *config; if (d == NULL) - return 0; + return 0; if (d->config == NULL) - return 0; + return 0; config = (device_config_t *) d->config; while (config->type != -1) { - if (config->type != CONFIG_MAC) - c++; - config++; + if (config->type != CONFIG_MAC) + c++; + config++; } return (c > 0) ? 1 : 0; } - int device_poll(const device_t *d, int x, int y, int z, int b) { int c; for (c = 0; c < DEVICE_MAX; c++) { - if (devices[c] != NULL) { - if (devices[c] == d) { - if (devices[c]->poll) - return(devices[c]->poll(x, y, z, b, device_priv[c])); - } - } + if (devices[c] != NULL) { + if (devices[c] == d) { + if (devices[c]->poll) + return (devices[c]->poll(x, y, z, b, device_priv[c])); + } + } } - return(0); + return (0); } - void device_register_pci_slot(const device_t *d, int device, int type, int inta, int intb, int intc, int intd) { int c; for (c = 0; c < DEVICE_MAX; c++) { - if (devices[c] != NULL) { - if (devices[c] == d) { - if (devices[c]->register_pci_slot) - devices[c]->register_pci_slot(device, type, inta, intb, intc, intd, device_priv[c]); - return; - } - } + if (devices[c] != NULL) { + if (devices[c] == d) { + if (devices[c]->register_pci_slot) + devices[c]->register_pci_slot(device, type, inta, intb, intc, intd, device_priv[c]); + return; + } + } } return; } - void device_get_name(const device_t *d, int bus, char *name) { @@ -440,344 +412,342 @@ device_get_name(const device_t *d, int bus, char *name) char *tname, pbus[8] = { 0 }; if (d == NULL) - return; + return; name[0] = 0x00; if (bus) { - if (d->flags & DEVICE_ISA) - sbus = (d->flags & DEVICE_AT) ? "ISA16" : "ISA"; - else if (d->flags & DEVICE_CBUS) - sbus = "C-BUS"; - else if (d->flags & DEVICE_MCA) - sbus = "MCA"; - else if (d->flags & DEVICE_EISA) - sbus = "EISA"; - else if (d->flags & DEVICE_VLB) - sbus = "VLB"; - else if (d->flags & DEVICE_PCI) - sbus = "PCI"; - else if (d->flags & DEVICE_AGP) - sbus = "AGP"; - else if (d->flags & DEVICE_AC97) - sbus = "AMR"; - else if (d->flags & DEVICE_COM) - sbus = "COM"; - else if (d->flags & DEVICE_LPT) - sbus = "LPT"; + if (d->flags & DEVICE_ISA) + sbus = (d->flags & DEVICE_AT) ? "ISA16" : "ISA"; + else if (d->flags & DEVICE_CBUS) + sbus = "C-BUS"; + else if (d->flags & DEVICE_MCA) + sbus = "MCA"; + else if (d->flags & DEVICE_EISA) + sbus = "EISA"; + else if (d->flags & DEVICE_VLB) + sbus = "VLB"; + else if (d->flags & DEVICE_PCI) + sbus = "PCI"; + else if (d->flags & DEVICE_AGP) + sbus = "AGP"; + else if (d->flags & DEVICE_AC97) + sbus = "AMR"; + else if (d->flags & DEVICE_COM) + sbus = "COM"; + else if (d->flags & DEVICE_LPT) + sbus = "LPT"; - if (sbus != NULL) { - /* First concatenate [] before the device's name. */ - strcat(name, "["); - strcat(name, sbus); - strcat(name, "] "); + if (sbus != NULL) { + /* First concatenate [] before the device's name. */ + strcat(name, "["); + strcat(name, sbus); + strcat(name, "] "); - /* Then change string from ISA16 to ISA if applicable. */ - if (!strcmp(sbus, "ISA16")) - sbus = "ISA"; - else if (!strcmp(sbus, "COM")|| !strcmp(sbus, "LPT")) { - sbus = NULL; - strcat(name, d->name); - return; - } + /* Then change string from ISA16 to ISA if applicable. */ + if (!strcmp(sbus, "ISA16")) + sbus = "ISA"; + else if (!strcmp(sbus, "COM") || !strcmp(sbus, "LPT")) { + sbus = NULL; + strcat(name, d->name); + return; + } - /* Generate the bus string with parentheses. */ - strcat(pbus, "("); - strcat(pbus, sbus); - strcat(pbus, ")"); + /* Generate the bus string with parentheses. */ + strcat(pbus, "("); + strcat(pbus, sbus); + strcat(pbus, ")"); - /* Allocate the temporary device name string and set it to all zeroes. */ - tname = (char *) malloc(strlen(d->name) + 1); - memset(tname, 0x00, strlen(d->name) + 1); + /* Allocate the temporary device name string and set it to all zeroes. */ + tname = (char *) malloc(strlen(d->name) + 1); + memset(tname, 0x00, strlen(d->name) + 1); - /* First strip the bus string with parentheses. */ - fbus = strstr(d->name, pbus); - if (fbus == d->name) - strcat(tname, d->name + strlen(pbus) + 1); - else if (fbus == NULL) - strcat(tname, d->name); - else { - strncat(tname, d->name, fbus - d->name - 1); - strcat(tname, fbus + strlen(pbus)); - } + /* First strip the bus string with parentheses. */ + fbus = strstr(d->name, pbus); + if (fbus == d->name) + strcat(tname, d->name + strlen(pbus) + 1); + else if (fbus == NULL) + strcat(tname, d->name); + else { + strncat(tname, d->name, fbus - d->name - 1); + strcat(tname, fbus + strlen(pbus)); + } - /* Then also strip the bus string with parentheses. */ - fbus = strstr(tname, sbus); - if (fbus == tname) - strcat(name, tname + strlen(sbus) + 1); - /* Special case to not strip the "oPCI" from "Ensoniq AudioPCI" or - the "-ISA" from "AMD PCnet-ISA". */ - else if ((fbus == NULL) || (*(fbus - 1) == 'o') || (*(fbus - 1) == '-')) - strcat(name, tname); - else { - strncat(name, tname, fbus - tname - 1); - strcat(name, fbus + strlen(sbus)); - } + /* Then also strip the bus string with parentheses. */ + fbus = strstr(tname, sbus); + if (fbus == tname) + strcat(name, tname + strlen(sbus) + 1); + /* Special case to not strip the "oPCI" from "Ensoniq AudioPCI" or + the "-ISA" from "AMD PCnet-ISA". */ + else if ((fbus == NULL) || (*(fbus - 1) == 'o') || (*(fbus - 1) == '-')) + strcat(name, tname); + else { + strncat(name, tname, fbus - tname - 1); + strcat(name, fbus + strlen(sbus)); + } - /* Free the temporary device name string. */ - free(tname); - tname = NULL; - } else - strcat(name, d->name); + /* Free the temporary device name string. */ + free(tname); + tname = NULL; + } else + strcat(name, d->name); } else - strcat(name, d->name); + strcat(name, d->name); } - void device_speed_changed(void) { int c; for (c = 0; c < DEVICE_MAX; c++) { - if (devices[c] != NULL) { - if (devices[c]->speed_changed != NULL) - devices[c]->speed_changed(device_priv[c]); - } + if (devices[c] != NULL) { + if (devices[c]->speed_changed != NULL) + devices[c]->speed_changed(device_priv[c]); + } } sound_speed_changed(); } - void device_force_redraw(void) { int c; for (c = 0; c < DEVICE_MAX; c++) { - if (devices[c] != NULL) { - if (devices[c]->force_redraw != NULL) - devices[c]->force_redraw(device_priv[c]); - } + if (devices[c] != NULL) { + if (devices[c]->force_redraw != NULL) + devices[c]->force_redraw(device_priv[c]); + } } } - const char * device_get_config_string(const char *s) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_string((char *) device_current.name, (char *) s, (char *) c->default_string)); + if (!strcmp(s, c->name)) + return (config_get_string((char *) device_current.name, (char *) s, (char *) c->default_string)); - c++; + c++; } - return(NULL); + return (NULL); } - int device_get_config_int(const char *s) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_int((char *) device_current.name, (char *) s, c->default_int)); + if (!strcmp(s, c->name)) + return (config_get_int((char *) device_current.name, (char *) s, c->default_int)); - c++; + c++; } - return(0); + return (0); } - int device_get_config_int_ex(const char *s, int def) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_int((char *) device_current.name, (char *) s, def)); + if (!strcmp(s, c->name)) + return (config_get_int((char *) device_current.name, (char *) s, def)); - c++; + c++; } - return(def); + return (def); } - int device_get_config_hex16(const char *s) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_hex16((char *) device_current.name, (char *) s, c->default_int)); + if (!strcmp(s, c->name)) + return (config_get_hex16((char *) device_current.name, (char *) s, c->default_int)); - c++; + c++; } - return(0); + return (0); } - int device_get_config_hex20(const char *s) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_hex20((char *) device_current.name, (char *) s, c->default_int)); + if (!strcmp(s, c->name)) + return (config_get_hex20((char *) device_current.name, (char *) s, c->default_int)); - c++; + c++; } - return(0); + return (0); } - int device_get_config_mac(const char *s, int def) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_mac((char *) device_current.name, (char *) s, def)); + if (!strcmp(s, c->name)) + return (config_get_mac((char *) device_current.name, (char *) s, def)); - c++; + c++; } - return(def); + return (def); } - void device_set_config_int(const char *s, int val) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) { - config_set_int((char *) device_current.name, (char *) s, val); - break; - } + if (!strcmp(s, c->name)) { + config_set_int((char *) device_current.name, (char *) s, val); + break; + } - c++; + c++; } } - void device_set_config_hex16(const char *s, int val) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) { - config_set_hex16((char *) device_current.name, (char *) s, val); - break; - } + if (!strcmp(s, c->name)) { + config_set_hex16((char *) device_current.name, (char *) s, val); + break; + } - c++; + c++; } } - void device_set_config_hex20(const char *s, int val) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) { - config_set_hex20((char *) device_current.name, (char *) s, val); - break; - } + if (!strcmp(s, c->name)) { + config_set_hex20((char *) device_current.name, (char *) s, val); + break; + } - c++; + c++; } } - void device_set_config_mac(const char *s, int val) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) { - config_set_mac((char *) device_current.name, (char *) s, val); - break; - } + if (!strcmp(s, c->name)) { + config_set_mac((char *) device_current.name, (char *) s, val); + break; + } - c++; + c++; } } - int device_is_valid(const device_t *device, int m) { - if (device == NULL) return(1); + if (device == NULL) + return (1); - if ((device->flags & DEVICE_AT) && !machine_has_bus(m, MACHINE_BUS_ISA16)) return(0); + if ((device->flags & DEVICE_AT) && !machine_has_bus(m, MACHINE_BUS_ISA16)) + return (0); - if ((device->flags & DEVICE_CBUS) && !machine_has_bus(m, MACHINE_BUS_CBUS)) return(0); + if ((device->flags & DEVICE_CBUS) && !machine_has_bus(m, MACHINE_BUS_CBUS)) + return (0); - if ((device->flags & DEVICE_ISA) && !machine_has_bus(m, MACHINE_BUS_ISA)) return(0); + if ((device->flags & DEVICE_ISA) && !machine_has_bus(m, MACHINE_BUS_ISA)) + return (0); - if ((device->flags & DEVICE_MCA) && !machine_has_bus(m, MACHINE_BUS_MCA)) return(0); + if ((device->flags & DEVICE_MCA) && !machine_has_bus(m, MACHINE_BUS_MCA)) + return (0); - if ((device->flags & DEVICE_EISA) && !machine_has_bus(m, MACHINE_BUS_EISA)) return(0); + if ((device->flags & DEVICE_EISA) && !machine_has_bus(m, MACHINE_BUS_EISA)) + return (0); - if ((device->flags & DEVICE_VLB) && !machine_has_bus(m, MACHINE_BUS_VLB)) return(0); + if ((device->flags & DEVICE_VLB) && !machine_has_bus(m, MACHINE_BUS_VLB)) + return (0); - if ((device->flags & DEVICE_PCI) && !machine_has_bus(m, MACHINE_BUS_PCI)) return(0); + if ((device->flags & DEVICE_PCI) && !machine_has_bus(m, MACHINE_BUS_PCI)) + return (0); - if ((device->flags & DEVICE_AGP) && !machine_has_bus(m, MACHINE_BUS_AGP)) return(0); + if ((device->flags & DEVICE_AGP) && !machine_has_bus(m, MACHINE_BUS_AGP)) + return (0); - if ((device->flags & DEVICE_PS2) && !machine_has_bus(m, MACHINE_BUS_PS2)) return(0); + if ((device->flags & DEVICE_PS2) && !machine_has_bus(m, MACHINE_BUS_PS2)) + return (0); - if ((device->flags & DEVICE_AC97) && !machine_has_bus(m, MACHINE_BUS_AC97)) return(0); + if ((device->flags & DEVICE_AC97) && !machine_has_bus(m, MACHINE_BUS_AC97)) + return (0); - return(1); + return (1); } - int machine_get_config_int(char *s) { - const device_t *d = machine_getdevice(machine); + const device_t *d = machine_getdevice(machine); const device_config_t *c; - if (d == NULL) return(0); + if (d == NULL) + return (0); c = d->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_int((char *)d->name, s, c->default_int)); + if (!strcmp(s, c->name)) + return (config_get_int((char *) d->name, s, c->default_int)); - c++; + c++; } - return(0); + return (0); } - char * machine_get_config_string(char *s) { - const device_t *d = machine_getdevice(machine); + const device_t *d = machine_getdevice(machine); const device_config_t *c; - if (d == NULL) return(0); + if (d == NULL) + return (0); c = d->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_string((char *)d->name, s, (char *)c->default_string)); + if (!strcmp(s, c->name)) + return (config_get_string((char *) d->name, s, (char *) c->default_string)); - c++; + c++; } - return(NULL); + return (NULL); } diff --git a/src/dma.c b/src/dma.c index 5eb129860..48853321a 100644 --- a/src/dma.c +++ b/src/dma.c @@ -32,114 +32,103 @@ #include <86box/pic.h> #include <86box/dma.h> +dma_t dma[8]; +uint8_t dma_e; +uint8_t dma_m; -dma_t dma[8]; -uint8_t dma_e; -uint8_t dma_m; - - -static uint8_t dmaregs[3][16]; -static int dma_wp[2]; -static uint8_t dma_stat; -static uint8_t dma_stat_rq; -static uint8_t dma_stat_rq_pc; -static uint8_t dma_command[2]; -static uint8_t dma_req_is_soft; -static uint8_t dma_advanced; -static uint8_t dma_at; -static uint8_t dma_buffer[65536]; -static uint16_t dma_sg_base; -static uint16_t dma16_buffer[65536]; +static uint8_t dmaregs[3][16]; +static int dma_wp[2]; +static uint8_t dma_stat; +static uint8_t dma_stat_rq; +static uint8_t dma_stat_rq_pc; +static uint8_t dma_command[2]; +static uint8_t dma_req_is_soft; +static uint8_t dma_advanced; +static uint8_t dma_at; +static uint8_t dma_buffer[65536]; +static uint16_t dma_sg_base; +static uint16_t dma16_buffer[65536]; static uint32_t dma_mask; static struct { - int xfr_command, - xfr_channel; - int byte_ptr; + int xfr_command, + xfr_channel; + int byte_ptr; - int is_ps2; + int is_ps2; } dma_ps2; - -#define DMA_PS2_IOA (1 << 0) -#define DMA_PS2_AUTOINIT (1 << 1) -#define DMA_PS2_XFER_MEM_TO_IO (1 << 2) -#define DMA_PS2_XFER_IO_TO_MEM (3 << 2) -#define DMA_PS2_XFER_MASK (3 << 2) -#define DMA_PS2_DEC2 (1 << 4) -#define DMA_PS2_SIZE16 (1 << 6) - +#define DMA_PS2_IOA (1 << 0) +#define DMA_PS2_AUTOINIT (1 << 1) +#define DMA_PS2_XFER_MEM_TO_IO (1 << 2) +#define DMA_PS2_XFER_IO_TO_MEM (3 << 2) +#define DMA_PS2_XFER_MASK (3 << 2) +#define DMA_PS2_DEC2 (1 << 4) +#define DMA_PS2_SIZE16 (1 << 6) #ifdef ENABLE_DMA_LOG int dma_do_log = ENABLE_DMA_LOG; - static void dma_log(const char *fmt, ...) { va_list ap; if (dma_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define dma_log(fmt, ...) +# define dma_log(fmt, ...) #endif - static void dma_ps2_run(int channel); - int dma_get_drq(int channel) { return !!(dma_stat_rq_pc & (1 << channel)); } - void dma_set_drq(int channel, int set) { dma_stat_rq_pc &= ~(1 << channel); if (set) - dma_stat_rq_pc |= (1 << channel); + dma_stat_rq_pc |= (1 << channel); } - static int dma_transfer_size(dma_t *dev) { return dev->transfer_mode & 0xff; } - static void dma_sg_next_addr(dma_t *dev) { int ts = dma_transfer_size(dev); - dma_bm_read(dev->ptr_cur, (uint8_t *)&(dev->addr), 4, ts); - dma_bm_read(dev->ptr_cur + 4, (uint8_t *)&(dev->count), 4, ts); + dma_bm_read(dev->ptr_cur, (uint8_t *) &(dev->addr), 4, ts); + dma_bm_read(dev->ptr_cur + 4, (uint8_t *) &(dev->count), 4, ts); dma_log("DMA S/G DWORDs: %08X %08X\n", dev->addr, dev->count); dev->eot = dev->count >> 31; dev->count &= 0xfffe; dev->cb = (uint16_t) dev->count; dev->cc = (int) dev->count; if (!dev->count) - dev->count = 65536; + dev->count = 65536; if (ts == 2) - dev->addr &= 0xfffffffe; - dev->ab = dev->addr & dma_mask; - dev->ac = dev->addr & dma_mask; + dev->addr &= 0xfffffffe; + dev->ab = dev->addr & dma_mask; + dev->ac = dev->addr & dma_mask; dev->page = dev->page_l = (dev->ac >> 16) & 0xff; - dev->page_h = (dev->ac >> 24) & 0xff; + dev->page_h = (dev->ac >> 24) & 0xff; dev->ptr_cur += 8; } - static void dma_block_transfer(int channel) { @@ -148,48 +137,46 @@ dma_block_transfer(int channel) bit16 = (channel >= 4); if (dma_advanced) - bit16 = !!(dma_transfer_size(&(dma[channel])) == 2); + bit16 = !!(dma_transfer_size(&(dma[channel])) == 2); dma_req_is_soft = 1; for (i = 0; i <= dma[channel].cb; i++) { - if ((dma[channel].mode & 0x8c) == 0x84) { - if (bit16) - dma_channel_write(channel, dma16_buffer[i]); - else - dma_channel_write(channel, dma_buffer[i]); - } else if ((dma[channel].mode & 0x8c) == 0x88) { - if (bit16) - dma16_buffer[i] = dma_channel_read(channel); - else - dma_buffer[i] = dma_channel_read(channel); - } + if ((dma[channel].mode & 0x8c) == 0x84) { + if (bit16) + dma_channel_write(channel, dma16_buffer[i]); + else + dma_channel_write(channel, dma_buffer[i]); + } else if ((dma[channel].mode & 0x8c) == 0x88) { + if (bit16) + dma16_buffer[i] = dma_channel_read(channel); + else + dma_buffer[i] = dma_channel_read(channel); + } } dma_req_is_soft = 0; } - static void dma_mem_to_mem_transfer(void) { int i; if ((dma[0].mode & 0x0c) != 0x08) - fatal("DMA memory to memory transfer: channel 0 mode not read\n"); + fatal("DMA memory to memory transfer: channel 0 mode not read\n"); if ((dma[1].mode & 0x0c) != 0x04) - fatal("DMA memory to memory transfer: channel 1 mode not write\n"); + fatal("DMA memory to memory transfer: channel 1 mode not write\n"); dma_req_is_soft = 1; for (i = 0; i <= dma[0].cb; i++) - dma_buffer[i] = dma_channel_read(0); + dma_buffer[i] = dma_channel_read(0); for (i = 0; i <= dma[1].cb; i++) - dma_channel_write(1, dma_buffer[i]); + dma_channel_write(1, dma_buffer[i]); dma_req_is_soft = 0; } - static void dma_sg_write(uint16_t port, uint8_t val, void *priv) { @@ -200,51 +187,50 @@ dma_sg_write(uint16_t port, uint8_t val, void *priv) port &= 0xff; if (port < 0x20) - port &= 0xf8; + port &= 0xf8; else - port &= 0xe3; + port &= 0xe3; switch (port) { - case 0x00: - dma_log("DMA S/G Cmd : val = %02X, old = %02X\n", val, dev->sg_command); - if ((val & 1) && !(dev->sg_command & 1)) { /*Start*/ + case 0x00: + dma_log("DMA S/G Cmd : val = %02X, old = %02X\n", val, dev->sg_command); + if ((val & 1) && !(dev->sg_command & 1)) { /*Start*/ #ifdef ENABLE_DMA_LOG - dma_log("DMA S/G start\n"); + dma_log("DMA S/G start\n"); #endif - dev->ptr_cur = dev->ptr; - dma_sg_next_addr(dev); - dev->sg_status = (dev->sg_status & 0xf7) | 0x01; - } - if (!(val & 1) && (dev->sg_command & 1)) { /*Stop*/ + dev->ptr_cur = dev->ptr; + dma_sg_next_addr(dev); + dev->sg_status = (dev->sg_status & 0xf7) | 0x01; + } + if (!(val & 1) && (dev->sg_command & 1)) { /*Stop*/ #ifdef ENABLE_DMA_LOG - dma_log("DMA S/G stop\n"); + dma_log("DMA S/G stop\n"); #endif - dev->sg_status &= ~0x81; - } + dev->sg_status &= ~0x81; + } - dev->sg_command = val; - break; - case 0x20: - dev->ptr = (dev->ptr & 0xffffff00) | (val & 0xfc); - dev->ptr %= (mem_size * 1024); - dev->ptr0 = val; - break; - case 0x21: - dev->ptr = (dev->ptr & 0xffff00fc) | (val << 8); - dev->ptr %= (mem_size * 1024); - break; - case 0x22: - dev->ptr = (dev->ptr & 0xff00fffc) | (val << 16); - dev->ptr %= (mem_size * 1024); - break; - case 0x23: - dev->ptr = (dev->ptr & 0x00fffffc) | (val << 24); - dev->ptr %= (mem_size * 1024); - break; + dev->sg_command = val; + break; + case 0x20: + dev->ptr = (dev->ptr & 0xffffff00) | (val & 0xfc); + dev->ptr %= (mem_size * 1024); + dev->ptr0 = val; + break; + case 0x21: + dev->ptr = (dev->ptr & 0xffff00fc) | (val << 8); + dev->ptr %= (mem_size * 1024); + break; + case 0x22: + dev->ptr = (dev->ptr & 0xff00fffc) | (val << 16); + dev->ptr %= (mem_size * 1024); + break; + case 0x23: + dev->ptr = (dev->ptr & 0x00fffffc) | (val << 24); + dev->ptr %= (mem_size * 1024); + break; } } - static void dma_sg_writew(uint16_t port, uint16_t val, void *priv) { @@ -255,27 +241,26 @@ dma_sg_writew(uint16_t port, uint16_t val, void *priv) port &= 0xff; if (port < 0x20) - port &= 0xf8; + port &= 0xf8; else - port &= 0xe3; + port &= 0xe3; switch (port) { - case 0x00: - dma_sg_write(port, val & 0xff, priv); - break; - case 0x20: - dev->ptr = (dev->ptr & 0xffff0000) | (val & 0xfffc); - dev->ptr %= (mem_size * 1024); - dev->ptr0 = val & 0xff; - break; - case 0x22: - dev->ptr = (dev->ptr & 0x0000fffc) | (val << 16); - dev->ptr %= (mem_size * 1024); - break; + case 0x00: + dma_sg_write(port, val & 0xff, priv); + break; + case 0x20: + dev->ptr = (dev->ptr & 0xffff0000) | (val & 0xfffc); + dev->ptr %= (mem_size * 1024); + dev->ptr0 = val & 0xff; + break; + case 0x22: + dev->ptr = (dev->ptr & 0x0000fffc) | (val << 16); + dev->ptr %= (mem_size * 1024); + break; } } - static void dma_sg_writel(uint16_t port, uint32_t val, void *priv) { @@ -286,23 +271,22 @@ dma_sg_writel(uint16_t port, uint32_t val, void *priv) port &= 0xff; if (port < 0x20) - port &= 0xf8; + port &= 0xf8; else - port &= 0xe3; + port &= 0xe3; switch (port) { - case 0x00: - dma_sg_write(port, val & 0xff, priv); - break; - case 0x20: - dev->ptr = (val & 0xfffffffc); - dev->ptr %= (mem_size * 1024); - dev->ptr0 = val & 0xff; - break; + case 0x00: + dma_sg_write(port, val & 0xff, priv); + break; + case 0x20: + dev->ptr = (val & 0xfffffffc); + dev->ptr %= (mem_size * 1024); + dev->ptr0 = val & 0xff; + break; } } - static uint8_t dma_sg_read(uint16_t port, void *priv) { @@ -313,34 +297,34 @@ dma_sg_read(uint16_t port, void *priv) port &= 0xff; if (port < 0x20) - port &= 0xf8; + port &= 0xf8; else - port &= 0xe3; + port &= 0xe3; switch (port) { - case 0x08: - ret = (dev->sg_status & 0x01); - if (dev->eot) - ret |= 0x80; - if ((dev->sg_command & 0xc0) == 0x40) - ret |= 0x20; - if (dev->ab != 0x00000000) - ret |= 0x08; - if (dev->ac != 0x00000000) - ret |= 0x04; - break; - case 0x20: - ret = dev->ptr0; - break; - case 0x21: - ret = dev->ptr >> 8; - break; - case 0x22: - ret = dev->ptr >> 16; - break; - case 0x23: - ret = dev->ptr >> 24; - break; + case 0x08: + ret = (dev->sg_status & 0x01); + if (dev->eot) + ret |= 0x80; + if ((dev->sg_command & 0xc0) == 0x40) + ret |= 0x20; + if (dev->ab != 0x00000000) + ret |= 0x08; + if (dev->ac != 0x00000000) + ret |= 0x04; + break; + case 0x20: + ret = dev->ptr0; + break; + case 0x21: + ret = dev->ptr >> 8; + break; + case 0x22: + ret = dev->ptr >> 16; + break; + case 0x23: + ret = dev->ptr >> 24; + break; } dma_log("DMA S/G BYTE read : %04X %02X\n", port, ret); @@ -348,7 +332,6 @@ dma_sg_read(uint16_t port, void *priv) return ret; } - static uint16_t dma_sg_readw(uint16_t port, void *priv) { @@ -359,20 +342,20 @@ dma_sg_readw(uint16_t port, void *priv) port &= 0xff; if (port < 0x20) - port &= 0xf8; + port &= 0xf8; else - port &= 0xe3; + port &= 0xe3; switch (port) { - case 0x08: - ret = (uint16_t) dma_sg_read(port, priv); - break; - case 0x20: - ret = dev->ptr0 | (dev->ptr & 0xff00); - break; - case 0x22: - ret = dev->ptr >> 16; - break; + case 0x08: + ret = (uint16_t) dma_sg_read(port, priv); + break; + case 0x20: + ret = dev->ptr0 | (dev->ptr & 0xff00); + break; + case 0x22: + ret = dev->ptr >> 16; + break; } dma_log("DMA S/G WORD read : %04X %04X\n", port, ret); @@ -380,7 +363,6 @@ dma_sg_readw(uint16_t port, void *priv) return ret; } - static uint32_t dma_sg_readl(uint16_t port, void *priv) { @@ -391,17 +373,17 @@ dma_sg_readl(uint16_t port, void *priv) port &= 0xff; if (port < 0x20) - port &= 0xf8; + port &= 0xf8; else - port &= 0xe3; + port &= 0xe3; switch (port) { - case 0x08: - ret = (uint32_t) dma_sg_read(port, priv); - break; - case 0x20: - ret = dev->ptr0 | (dev->ptr & 0xffffff00); - break; + case 0x08: + ret = (uint32_t) dma_sg_read(port, priv); + break; + case 0x20: + ret = dev->ptr0 | (dev->ptr & 0xffffff00); + break; } dma_log("DMA S/G DWORD read : %04X %08X\n", port, ret); @@ -409,93 +391,89 @@ dma_sg_readl(uint16_t port, void *priv) return ret; } - static void dma_ext_mode_write(uint16_t addr, uint8_t val, void *priv) { int channel = (val & 0x03); if (addr == 0x4d6) - channel |= 4; + channel |= 4; dma[channel].ext_mode = val & 0x7c; switch ((val > 2) & 0x03) { - case 0x00: - dma[channel].transfer_mode = 0x0101; - break; - case 0x01: - dma[channel].transfer_mode = 0x0202; - break; - case 0x02: /* 0x02 is reserved. */ - /* Logic says this should be an undocumented mode that counts by words, - but is 8-bit I/O, thus only transferring every second byte. */ - dma[channel].transfer_mode = 0x0201; - break; - case 0x03: - dma[channel].transfer_mode = 0x0102; - break; + case 0x00: + dma[channel].transfer_mode = 0x0101; + break; + case 0x01: + dma[channel].transfer_mode = 0x0202; + break; + case 0x02: /* 0x02 is reserved. */ + /* Logic says this should be an undocumented mode that counts by words, + but is 8-bit I/O, thus only transferring every second byte. */ + dma[channel].transfer_mode = 0x0201; + break; + case 0x03: + dma[channel].transfer_mode = 0x0102; + break; } } - static uint8_t dma_sg_int_status_read(uint16_t addr, void *priv) { - int i; + int i; uint8_t ret = 0x00; for (i = 0; i < 8; i++) { - if (i != 4) - ret = (!!(dma[i].sg_status & 8)) << i; + if (i != 4) + ret = (!!(dma[i].sg_status & 8)) << i; } return ret; } - static uint8_t dma_read(uint16_t addr, void *priv) { - int channel = (addr >> 1) & 3; + int channel = (addr >> 1) & 3; uint8_t temp; switch (addr & 0xf) { - case 0: - case 2: - case 4: - case 6: /*Address registers*/ - dma_wp[0] ^= 1; - if (dma_wp[0]) - return(dma[channel].ac & 0xff); - return((dma[channel].ac >> 8) & 0xff); + case 0: + case 2: + case 4: + case 6: /*Address registers*/ + dma_wp[0] ^= 1; + if (dma_wp[0]) + return (dma[channel].ac & 0xff); + return ((dma[channel].ac >> 8) & 0xff); - case 1: - case 3: - case 5: - case 7: /*Count registers*/ - dma_wp[0] ^= 1; - if (dma_wp[0]) - temp = dma[channel].cc & 0xff; - else - temp = dma[channel].cc >> 8; - return(temp); + case 1: + case 3: + case 5: + case 7: /*Count registers*/ + dma_wp[0] ^= 1; + if (dma_wp[0]) + temp = dma[channel].cc & 0xff; + else + temp = dma[channel].cc >> 8; + return (temp); - case 8: /*Status register*/ - temp = dma_stat_rq_pc & 0xf; - temp <<= 4; - temp |= dma_stat & 0xf; - dma_stat &= ~0xf; - return(temp); + case 8: /*Status register*/ + temp = dma_stat_rq_pc & 0xf; + temp <<= 4; + temp |= dma_stat & 0xf; + dma_stat &= ~0xf; + return (temp); - case 0xd: /*Temporary register*/ - return(0); + case 0xd: /*Temporary register*/ + return (0); } - return(dmaregs[0][addr & 0xf]); + return (dmaregs[0][addr & 0xf]); } - static void dma_write(uint16_t addr, uint8_t val, void *priv) { @@ -503,295 +481,291 @@ dma_write(uint16_t addr, uint8_t val, void *priv) dmaregs[0][addr & 0xf] = val; switch (addr & 0xf) { - case 0: - case 2: - case 4: - case 6: /*Address registers*/ - dma_wp[0] ^= 1; - if (dma_wp[0]) - dma[channel].ab = (dma[channel].ab & 0xffffff00 & dma_mask) | val; - else - dma[channel].ab = (dma[channel].ab & 0xffff00ff & dma_mask) | (val << 8); - dma[channel].ac = dma[channel].ab; - return; + case 0: + case 2: + case 4: + case 6: /*Address registers*/ + dma_wp[0] ^= 1; + if (dma_wp[0]) + dma[channel].ab = (dma[channel].ab & 0xffffff00 & dma_mask) | val; + else + dma[channel].ab = (dma[channel].ab & 0xffff00ff & dma_mask) | (val << 8); + dma[channel].ac = dma[channel].ab; + return; - case 1: - case 3: - case 5: - case 7: /*Count registers*/ - dma_wp[0] ^= 1; - if (dma_wp[0]) - dma[channel].cb = (dma[channel].cb & 0xff00) | val; - else - dma[channel].cb = (dma[channel].cb & 0x00ff) | (val << 8); - dma[channel].cc = dma[channel].cb; - return; + case 1: + case 3: + case 5: + case 7: /*Count registers*/ + dma_wp[0] ^= 1; + if (dma_wp[0]) + dma[channel].cb = (dma[channel].cb & 0xff00) | val; + else + dma[channel].cb = (dma[channel].cb & 0x00ff) | (val << 8); + dma[channel].cc = dma[channel].cb; + return; - case 8: /*Control register*/ - dma_command[0] = val; - if (val & 0x01) - pclog("[%08X:%04X] Memory-to-memory enable\n", CS, cpu_state.pc); - return; + case 8: /*Control register*/ + dma_command[0] = val; + if (val & 0x01) + pclog("[%08X:%04X] Memory-to-memory enable\n", CS, cpu_state.pc); + return; - case 9: /*Request register */ - channel = (val & 3); - if (val & 4) { - dma_stat_rq_pc |= (1 << channel); - if ((channel == 0) && (dma_command[0] & 0x01)) { - pclog("Memory to memory transfer start\n"); - dma_mem_to_mem_transfer(); - } else - dma_block_transfer(channel); - } else - dma_stat_rq_pc &= ~(1 << channel); - break; + case 9: /*Request register */ + channel = (val & 3); + if (val & 4) { + dma_stat_rq_pc |= (1 << channel); + if ((channel == 0) && (dma_command[0] & 0x01)) { + pclog("Memory to memory transfer start\n"); + dma_mem_to_mem_transfer(); + } else + dma_block_transfer(channel); + } else + dma_stat_rq_pc &= ~(1 << channel); + break; - case 0xa: /*Mask*/ - channel = (val & 3); - if (val & 4) - dma_m |= (1 << channel); - else - dma_m &= ~(1 << channel); - return; + case 0xa: /*Mask*/ + channel = (val & 3); + if (val & 4) + dma_m |= (1 << channel); + else + dma_m &= ~(1 << channel); + return; - case 0xb: /*Mode*/ - channel = (val & 3); - dma[channel].mode = val; - if (dma_ps2.is_ps2) { - dma[channel].ps2_mode &= ~0x1c; - if (val & 0x20) - dma[channel].ps2_mode |= 0x10; - if ((val & 0xc) == 8) - dma[channel].ps2_mode |= 4; - else if ((val & 0xc) == 4) - dma[channel].ps2_mode |= 0xc; - } - return; + case 0xb: /*Mode*/ + channel = (val & 3); + dma[channel].mode = val; + if (dma_ps2.is_ps2) { + dma[channel].ps2_mode &= ~0x1c; + if (val & 0x20) + dma[channel].ps2_mode |= 0x10; + if ((val & 0xc) == 8) + dma[channel].ps2_mode |= 4; + else if ((val & 0xc) == 4) + dma[channel].ps2_mode |= 0xc; + } + return; - case 0xc: /*Clear FF*/ - dma_wp[0] = 0; - return; + case 0xc: /*Clear FF*/ + dma_wp[0] = 0; + return; - case 0xd: /*Master clear*/ - dma_wp[0] = 0; - dma_m |= 0xf; - dma_stat_rq_pc &= ~0x0f; - return; + case 0xd: /*Master clear*/ + dma_wp[0] = 0; + dma_m |= 0xf; + dma_stat_rq_pc &= ~0x0f; + return; - case 0xe: /*Clear mask*/ - dma_m &= 0xf0; - return; + case 0xe: /*Clear mask*/ + dma_m &= 0xf0; + return; - case 0xf: /*Mask write*/ - dma_m = (dma_m & 0xf0) | (val & 0xf); - return; + case 0xf: /*Mask write*/ + dma_m = (dma_m & 0xf0) | (val & 0xf); + return; } } - static uint8_t dma_ps2_read(uint16_t addr, void *priv) { - dma_t *dma_c = &dma[dma_ps2.xfr_channel]; - uint8_t temp = 0xff; + dma_t *dma_c = &dma[dma_ps2.xfr_channel]; + uint8_t temp = 0xff; switch (addr) { - case 0x1a: - switch (dma_ps2.xfr_command) { - case 2: /*Address*/ - case 3: - switch (dma_ps2.byte_ptr) { - case 0: - temp = dma_c->ac & 0xff; - dma_ps2.byte_ptr = 1; - break; - case 1: - temp = (dma_c->ac >> 8) & 0xff; - dma_ps2.byte_ptr = 2; - break; - case 2: - temp = (dma_c->ac >> 16) & 0xff; - dma_ps2.byte_ptr = 0; - break; - } - break; + case 0x1a: + switch (dma_ps2.xfr_command) { + case 2: /*Address*/ + case 3: + switch (dma_ps2.byte_ptr) { + case 0: + temp = dma_c->ac & 0xff; + dma_ps2.byte_ptr = 1; + break; + case 1: + temp = (dma_c->ac >> 8) & 0xff; + dma_ps2.byte_ptr = 2; + break; + case 2: + temp = (dma_c->ac >> 16) & 0xff; + dma_ps2.byte_ptr = 0; + break; + } + break; - case 4: /*Count*/ - case 5: - if (dma_ps2.byte_ptr) - temp = dma_c->cc >> 8; - else - temp = dma_c->cc & 0xff; - dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; - break; + case 4: /*Count*/ + case 5: + if (dma_ps2.byte_ptr) + temp = dma_c->cc >> 8; + else + temp = dma_c->cc & 0xff; + dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; + break; - case 6: /*Read DMA status*/ - if (dma_ps2.byte_ptr) { - temp = ((dma_stat_rq & 0xf0) >> 4) | (dma_stat & 0xf0); - dma_stat &= ~0xf0; - dma_stat_rq &= ~0xf0; - } else { - temp = (dma_stat_rq & 0xf) | ((dma_stat & 0xf) << 4); - dma_stat &= ~0xf; - dma_stat_rq &= ~0xf; - } - dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; - break; + case 6: /*Read DMA status*/ + if (dma_ps2.byte_ptr) { + temp = ((dma_stat_rq & 0xf0) >> 4) | (dma_stat & 0xf0); + dma_stat &= ~0xf0; + dma_stat_rq &= ~0xf0; + } else { + temp = (dma_stat_rq & 0xf) | ((dma_stat & 0xf) << 4); + dma_stat &= ~0xf; + dma_stat_rq &= ~0xf; + } + dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; + break; - case 7: /*Mode*/ - temp = dma_c->ps2_mode; - break; + case 7: /*Mode*/ + temp = dma_c->ps2_mode; + break; - case 8: /*Arbitration Level*/ - temp = dma_c->arb_level; - break; + case 8: /*Arbitration Level*/ + temp = dma_c->arb_level; + break; - default: - fatal("Bad XFR Read command %i channel %i\n", dma_ps2.xfr_command, dma_ps2.xfr_channel); - } - break; + default: + fatal("Bad XFR Read command %i channel %i\n", dma_ps2.xfr_command, dma_ps2.xfr_channel); + } + break; } - return(temp); + return (temp); } - static void dma_ps2_write(uint16_t addr, uint8_t val, void *priv) { - dma_t *dma_c = &dma[dma_ps2.xfr_channel]; + dma_t *dma_c = &dma[dma_ps2.xfr_channel]; uint8_t mode; switch (addr) { - case 0x18: - dma_ps2.xfr_channel = val & 0x7; - dma_ps2.xfr_command = val >> 4; - dma_ps2.byte_ptr = 0; - switch (dma_ps2.xfr_command) { - case 9: /*Set DMA mask*/ - dma_m |= (1 << dma_ps2.xfr_channel); - break; + case 0x18: + dma_ps2.xfr_channel = val & 0x7; + dma_ps2.xfr_command = val >> 4; + dma_ps2.byte_ptr = 0; + switch (dma_ps2.xfr_command) { + case 9: /*Set DMA mask*/ + dma_m |= (1 << dma_ps2.xfr_channel); + break; - case 0xa: /*Reset DMA mask*/ - dma_m &= ~(1 << dma_ps2.xfr_channel); - break; + case 0xa: /*Reset DMA mask*/ + dma_m &= ~(1 << dma_ps2.xfr_channel); + break; - case 0xb: - if (!(dma_m & (1 << dma_ps2.xfr_channel))) - dma_ps2_run(dma_ps2.xfr_channel); - break; - } - break; + case 0xb: + if (!(dma_m & (1 << dma_ps2.xfr_channel))) + dma_ps2_run(dma_ps2.xfr_channel); + break; + } + break; - case 0x1a: - switch (dma_ps2.xfr_command) { - case 0: /*I/O address*/ - if (dma_ps2.byte_ptr) - dma_c->io_addr = (dma_c->io_addr & 0x00ff) | (val << 8); - else - dma_c->io_addr = (dma_c->io_addr & 0xff00) | val; - dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; - break; + case 0x1a: + switch (dma_ps2.xfr_command) { + case 0: /*I/O address*/ + if (dma_ps2.byte_ptr) + dma_c->io_addr = (dma_c->io_addr & 0x00ff) | (val << 8); + else + dma_c->io_addr = (dma_c->io_addr & 0xff00) | val; + dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; + break; - case 2: /*Address*/ - switch (dma_ps2.byte_ptr) { - case 0: - dma_c->ac = (dma_c->ac & 0xffff00) | val; - dma_ps2.byte_ptr = 1; - break; + case 2: /*Address*/ + switch (dma_ps2.byte_ptr) { + case 0: + dma_c->ac = (dma_c->ac & 0xffff00) | val; + dma_ps2.byte_ptr = 1; + break; - case 1: - dma_c->ac = (dma_c->ac & 0xff00ff) | (val << 8); - dma_ps2.byte_ptr = 2; - break; + case 1: + dma_c->ac = (dma_c->ac & 0xff00ff) | (val << 8); + dma_ps2.byte_ptr = 2; + break; - case 2: - dma_c->ac = (dma_c->ac & 0x00ffff) | (val << 16); - dma_ps2.byte_ptr = 0; - break; - } - dma_c->ab = dma_c->ac; - break; + case 2: + dma_c->ac = (dma_c->ac & 0x00ffff) | (val << 16); + dma_ps2.byte_ptr = 0; + break; + } + dma_c->ab = dma_c->ac; + break; - case 4: /*Count*/ - if (dma_ps2.byte_ptr) - dma_c->cc = (dma_c->cc & 0xff) | (val << 8); - else - dma_c->cc = (dma_c->cc & 0xff00) | val; - dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; - dma_c->cb = dma_c->cc; - break; + case 4: /*Count*/ + if (dma_ps2.byte_ptr) + dma_c->cc = (dma_c->cc & 0xff) | (val << 8); + else + dma_c->cc = (dma_c->cc & 0xff00) | val; + dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; + dma_c->cb = dma_c->cc; + break; - case 7: /*Mode register*/ - mode = 0; - if (val & DMA_PS2_DEC2) - mode |= 0x20; - if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_MEM_TO_IO) - mode |= 8; - else if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_IO_TO_MEM) - mode |= 4; - dma_c->mode = (dma_c->mode & ~0x2c) | mode; - if (val & DMA_PS2_AUTOINIT) - dma_c->mode |= 0x10; - dma_c->ps2_mode = val; - dma_c->size = val & DMA_PS2_SIZE16; - break; + case 7: /*Mode register*/ + mode = 0; + if (val & DMA_PS2_DEC2) + mode |= 0x20; + if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_MEM_TO_IO) + mode |= 8; + else if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_IO_TO_MEM) + mode |= 4; + dma_c->mode = (dma_c->mode & ~0x2c) | mode; + if (val & DMA_PS2_AUTOINIT) + dma_c->mode |= 0x10; + dma_c->ps2_mode = val; + dma_c->size = val & DMA_PS2_SIZE16; + break; - case 8: /*Arbitration Level*/ - dma_c->arb_level = val; - break; + case 8: /*Arbitration Level*/ + dma_c->arb_level = val; + break; - default: - fatal("Bad XFR command %i channel %i val %02x\n", dma_ps2.xfr_command, dma_ps2.xfr_channel, val); - } - break; + default: + fatal("Bad XFR command %i channel %i val %02x\n", dma_ps2.xfr_command, dma_ps2.xfr_channel, val); + } + break; } } - static uint8_t dma16_read(uint16_t addr, void *priv) { - int channel = ((addr >> 2) & 3) + 4; + int channel = ((addr >> 2) & 3) + 4; uint8_t temp; addr >>= 1; switch (addr & 0xf) { - case 0: - case 2: - case 4: - case 6: /*Address registers*/ - dma_wp[1] ^= 1; - if (dma_ps2.is_ps2) { - if (dma_wp[1]) - return(dma[channel].ac); - return((dma[channel].ac >> 8) & 0xff); - } - if (dma_wp[1]) - return((dma[channel].ac >> 1) & 0xff); - return((dma[channel].ac >> 9) & 0xff); + case 0: + case 2: + case 4: + case 6: /*Address registers*/ + dma_wp[1] ^= 1; + if (dma_ps2.is_ps2) { + if (dma_wp[1]) + return (dma[channel].ac); + return ((dma[channel].ac >> 8) & 0xff); + } + if (dma_wp[1]) + return ((dma[channel].ac >> 1) & 0xff); + return ((dma[channel].ac >> 9) & 0xff); - case 1: - case 3: - case 5: - case 7: /*Count registers*/ - dma_wp[1] ^= 1; - if (dma_wp[1]) - temp = dma[channel].cc & 0xff; - else - temp = dma[channel].cc >> 8; - return(temp); + case 1: + case 3: + case 5: + case 7: /*Count registers*/ + dma_wp[1] ^= 1; + if (dma_wp[1]) + temp = dma[channel].cc & 0xff; + else + temp = dma[channel].cc >> 8; + return (temp); - case 8: /*Status register*/ - temp = (dma_stat_rq_pc & 0xf0); - temp |= dma_stat >> 4; - dma_stat &= ~0xf0; - return(temp); + case 8: /*Status register*/ + temp = (dma_stat_rq_pc & 0xf0); + temp |= dma_stat >> 4; + dma_stat &= ~0xf0; + return (temp); } - return(dmaregs[1][addr & 0xf]); + return (dmaregs[1][addr & 0xf]); } - static void dma16_write(uint16_t addr, uint8_t val, void *priv) { @@ -800,94 +774,95 @@ dma16_write(uint16_t addr, uint8_t val, void *priv) dmaregs[1][addr & 0xf] = val; switch (addr & 0xf) { - case 0: - case 2: - case 4: - case 6: /*Address registers*/ - dma_wp[1] ^= 1; - if (dma_ps2.is_ps2) { - if (dma_wp[1]) - dma[channel].ab = (dma[channel].ab & 0xffffff00 & dma_mask) | val; - else - dma[channel].ab = (dma[channel].ab & 0xffff00ff & dma_mask) | (val << 8); - } else { - if (dma_wp[1]) - dma[channel].ab = (dma[channel].ab & 0xfffffe00 & dma_mask) | (val << 1); - else - dma[channel].ab = (dma[channel].ab & 0xfffe01ff & dma_mask) | (val << 9); - } - dma[channel].ac = dma[channel].ab; - return; + case 0: + case 2: + case 4: + case 6: /*Address registers*/ + dma_wp[1] ^= 1; + if (dma_ps2.is_ps2) { + if (dma_wp[1]) + dma[channel].ab = (dma[channel].ab & 0xffffff00 & dma_mask) | val; + else + dma[channel].ab = (dma[channel].ab & 0xffff00ff & dma_mask) | (val << 8); + } else { + if (dma_wp[1]) + dma[channel].ab = (dma[channel].ab & 0xfffffe00 & dma_mask) | (val << 1); + else + dma[channel].ab = (dma[channel].ab & 0xfffe01ff & dma_mask) | (val << 9); + } + dma[channel].ac = dma[channel].ab; + return; - case 1: - case 3: - case 5: - case 7: /*Count registers*/ - dma_wp[1] ^= 1; - if (dma_wp[1]) - dma[channel].cb = (dma[channel].cb & 0xff00) | val; - else - dma[channel].cb = (dma[channel].cb & 0x00ff) | (val << 8); - dma[channel].cc = dma[channel].cb; - return; + case 1: + case 3: + case 5: + case 7: /*Count registers*/ + dma_wp[1] ^= 1; + if (dma_wp[1]) + dma[channel].cb = (dma[channel].cb & 0xff00) | val; + else + dma[channel].cb = (dma[channel].cb & 0x00ff) | (val << 8); + dma[channel].cc = dma[channel].cb; + return; - case 8: /*Control register*/ - return; + case 8: /*Control register*/ + return; - case 9: /*Request register */ - channel = (val & 3) + 4; - if (val & 4) { - dma_stat_rq_pc |= (1 << channel); - dma_block_transfer(channel); - } else - dma_stat_rq_pc &= ~(1 << channel); - break; + case 9: /*Request register */ + channel = (val & 3) + 4; + if (val & 4) { + dma_stat_rq_pc |= (1 << channel); + dma_block_transfer(channel); + } else + dma_stat_rq_pc &= ~(1 << channel); + break; - case 0xa: /*Mask*/ - channel = (val & 3); - if (val & 4) - dma_m |= (0x10 << channel); - else - dma_m &= ~(0x10 << channel); - return; + case 0xa: /*Mask*/ + channel = (val & 3); + if (val & 4) + dma_m |= (0x10 << channel); + else + dma_m &= ~(0x10 << channel); + return; - case 0xb: /*Mode*/ - channel = (val & 3) + 4; - dma[channel].mode = val; - if (dma_ps2.is_ps2) { - dma[channel].ps2_mode &= ~0x1c; - if (val & 0x20) - dma[channel].ps2_mode |= 0x10; - if ((val & 0xc) == 8) - dma[channel].ps2_mode |= 4; - else if ((val & 0xc) == 4) - dma[channel].ps2_mode |= 0xc; - } - return; + case 0xb: /*Mode*/ + channel = (val & 3) + 4; + dma[channel].mode = val; + if (dma_ps2.is_ps2) { + dma[channel].ps2_mode &= ~0x1c; + if (val & 0x20) + dma[channel].ps2_mode |= 0x10; + if ((val & 0xc) == 8) + dma[channel].ps2_mode |= 4; + else if ((val & 0xc) == 4) + dma[channel].ps2_mode |= 0xc; + } + return; - case 0xc: /*Clear FF*/ - dma_wp[1] = 0; - return; + case 0xc: /*Clear FF*/ + dma_wp[1] = 0; + return; - case 0xd: /*Master clear*/ - dma_wp[1] = 0; - dma_m |= 0xf0; - dma_stat_rq_pc &= ~0xf0; - return; + case 0xd: /*Master clear*/ + dma_wp[1] = 0; + dma_m |= 0xf0; + dma_stat_rq_pc &= ~0xf0; + return; - case 0xe: /*Clear mask*/ - dma_m &= 0x0f; - return; + case 0xe: /*Clear mask*/ + dma_m &= 0x0f; + return; - case 0xf: /*Mask write*/ - dma_m = (dma_m & 0x0f) | ((val & 0xf) << 4); - return; + case 0xf: /*Mask write*/ + dma_m = (dma_m & 0x0f) | ((val & 0xf) << 4); + return; } } - -#define CHANNELS { 8, 2, 3, 1, 8, 8, 8, 0 } - +#define CHANNELS \ + { \ + 8, 2, 3, 1, 8, 8, 8, 0 \ + } static void dma_page_write(uint16_t addr, uint8_t val, void *priv) @@ -896,54 +871,52 @@ dma_page_write(uint16_t addr, uint8_t val, void *priv) #ifdef USE_DYNAREC if ((addr == 0x84) && cpu_use_dynarec) - update_tsc(); + update_tsc(); #endif addr &= 0x0f; dmaregs[2][addr] = val; if (addr >= 8) - addr = convert[addr & 0x07] | 4; + addr = convert[addr & 0x07] | 4; else - addr = convert[addr & 0x07]; + addr = convert[addr & 0x07]; if (addr < 8) { - dma[addr].page_l = val; + dma[addr].page_l = val; - if (addr > 4) { - dma[addr].page = val & 0xfe; - dma[addr].ab = (dma[addr].ab & 0xff01ffff & dma_mask) | (dma[addr].page << 16); - dma[addr].ac = (dma[addr].ac & 0xff01ffff & dma_mask) | (dma[addr].page << 16); - } else { - dma[addr].page = (dma_at) ? val : val & 0xf; - dma[addr].ab = (dma[addr].ab & 0xff00ffff & dma_mask) | (dma[addr].page << 16); - dma[addr].ac = (dma[addr].ac & 0xff00ffff & dma_mask) | (dma[addr].page << 16); - } + if (addr > 4) { + dma[addr].page = val & 0xfe; + dma[addr].ab = (dma[addr].ab & 0xff01ffff & dma_mask) | (dma[addr].page << 16); + dma[addr].ac = (dma[addr].ac & 0xff01ffff & dma_mask) | (dma[addr].page << 16); + } else { + dma[addr].page = (dma_at) ? val : val & 0xf; + dma[addr].ab = (dma[addr].ab & 0xff00ffff & dma_mask) | (dma[addr].page << 16); + dma[addr].ac = (dma[addr].ac & 0xff00ffff & dma_mask) | (dma[addr].page << 16); + } } } - static uint8_t dma_page_read(uint16_t addr, void *priv) { uint8_t convert[8] = CHANNELS; - uint8_t ret = 0xff; + uint8_t ret = 0xff; addr &= 0x0f; ret = dmaregs[2][addr]; if (addr >= 8) - addr = convert[addr & 0x07] | 4; + addr = convert[addr & 0x07] | 4; else - addr = convert[addr & 0x07]; + addr = convert[addr & 0x07]; if (addr < 8) - ret = dma[addr].page_l; + ret = dma[addr].page_l; return ret; } - static void dma_high_page_write(uint16_t addr, uint8_t val, void *priv) { @@ -952,47 +925,44 @@ dma_high_page_write(uint16_t addr, uint8_t val, void *priv) addr &= 0x0f; if (addr >= 8) - addr = convert[addr & 0x07] | 4; + addr = convert[addr & 0x07] | 4; else - addr = convert[addr & 0x07]; + addr = convert[addr & 0x07]; if (addr < 8) { - dma[addr].page_h = val; + dma[addr].page_h = val; - dma[addr].ab = ((dma[addr].ab & 0xffffff) | (dma[addr].page << 24)) & dma_mask; - dma[addr].ac = ((dma[addr].ac & 0xffffff) | (dma[addr].page << 24)) & dma_mask; + dma[addr].ab = ((dma[addr].ab & 0xffffff) | (dma[addr].page << 24)) & dma_mask; + dma[addr].ac = ((dma[addr].ac & 0xffffff) | (dma[addr].page << 24)) & dma_mask; } } - static uint8_t dma_high_page_read(uint16_t addr, void *priv) { uint8_t convert[8] = CHANNELS; - uint8_t ret = 0xff; + uint8_t ret = 0xff; addr &= 0x0f; if (addr >= 8) - addr = convert[addr & 0x07] | 4; + addr = convert[addr & 0x07] | 4; else - addr = convert[addr & 0x07]; + addr = convert[addr & 0x07]; if (addr < 8) - ret = dma[addr].page_h; + ret = dma[addr].page_h; return ret; } - void dma_set_params(uint8_t advanced, uint32_t mask) { dma_advanced = advanced; - dma_mask = mask; + dma_mask = mask; } - void dma_set_mask(uint32_t mask) { @@ -1001,43 +971,41 @@ dma_set_mask(uint32_t mask) dma_mask = mask; for (i = 0; i < 8; i++) { - dma[i].ab &= mask; - dma[i].ac &= mask; + dma[i].ab &= mask; + dma[i].ac &= mask; } } - void dma_set_at(uint8_t at) { dma_at = at; } - void dma_reset(void) { int c; dma_wp[0] = dma_wp[1] = 0; - dma_m = 0; + dma_m = 0; dma_e = 0xff; for (c = 0; c < 16; c++) - dmaregs[0][c] = dmaregs[1][c] = 0; + dmaregs[0][c] = dmaregs[1][c] = 0; for (c = 0; c < 8; c++) { - memset(&(dma[c]), 0x00, sizeof(dma_t)); - dma[c].size = (c & 4) ? 1 : 0; - dma[c].transfer_mode = (c & 4) ? 0x0202 : 0x0101; + memset(&(dma[c]), 0x00, sizeof(dma_t)); + dma[c].size = (c & 4) ? 1 : 0; + dma[c].transfer_mode = (c & 4) ? 0x0202 : 0x0101; } - dma_stat = 0x00; - dma_stat_rq = 0x00; - dma_stat_rq_pc = 0x00; + dma_stat = 0x00; + dma_stat_rq = 0x00; + dma_stat_rq_pc = 0x00; dma_req_is_soft = 0; - dma_advanced = 0; + dma_advanced = 0; memset(dma_buffer, 0x00, sizeof(dma_buffer)); memset(dma16_buffer, 0x00, sizeof(dma16_buffer)); @@ -1050,34 +1018,32 @@ dma_reset(void) dma_at = is286; } - void dma_remove_sg(void) { int i; io_removehandler(dma_sg_base + 0x0a, 0x01, - dma_sg_int_status_read, NULL, NULL, - NULL, NULL, NULL, - NULL); + dma_sg_int_status_read, NULL, NULL, + NULL, NULL, NULL, + NULL); for (i = 0; i < 8; i++) { - io_removehandler(dma_sg_base + 0x10 + i, 0x01, - dma_sg_read, dma_sg_readw, dma_sg_readl, - dma_sg_write, dma_sg_writew, dma_sg_writel, - &dma[i]); - io_removehandler(dma_sg_base + 0x18 + i, 0x01, - dma_sg_read, dma_sg_readw, dma_sg_readl, - dma_sg_write, dma_sg_writew, dma_sg_writel, - &dma[i]); - io_removehandler(dma_sg_base + 0x20 + i, 0x04, - dma_sg_read, dma_sg_readw, dma_sg_readl, - dma_sg_write, dma_sg_writew, dma_sg_writel, - &dma[i]); + io_removehandler(dma_sg_base + 0x10 + i, 0x01, + dma_sg_read, dma_sg_readw, dma_sg_readl, + dma_sg_write, dma_sg_writew, dma_sg_writel, + &dma[i]); + io_removehandler(dma_sg_base + 0x18 + i, 0x01, + dma_sg_read, dma_sg_readw, dma_sg_readl, + dma_sg_write, dma_sg_writew, dma_sg_writel, + &dma[i]); + io_removehandler(dma_sg_base + 0x20 + i, 0x04, + dma_sg_read, dma_sg_readw, dma_sg_readl, + dma_sg_write, dma_sg_writew, dma_sg_writel, + &dma[i]); } } - void dma_set_sg_base(uint8_t sg_base) { @@ -1086,134 +1052,123 @@ dma_set_sg_base(uint8_t sg_base) dma_sg_base = sg_base << 8; io_sethandler(dma_sg_base + 0x0a, 0x01, - dma_sg_int_status_read, NULL, NULL, - NULL, NULL, NULL, - NULL); + dma_sg_int_status_read, NULL, NULL, + NULL, NULL, NULL, + NULL); for (i = 0; i < 8; i++) { - io_sethandler(dma_sg_base + 0x10 + i, 0x01, - dma_sg_read, dma_sg_readw, dma_sg_readl, - dma_sg_write, dma_sg_writew, dma_sg_writel, - &dma[i]); - io_sethandler(dma_sg_base + 0x18 + i, 0x01, - dma_sg_read, dma_sg_readw, dma_sg_readl, - dma_sg_write, dma_sg_writew, dma_sg_writel, - &dma[i]); - io_sethandler(dma_sg_base + 0x20 + i, 0x04, - dma_sg_read, dma_sg_readw, dma_sg_readl, - dma_sg_write, dma_sg_writew, dma_sg_writel, - &dma[i]); + io_sethandler(dma_sg_base + 0x10 + i, 0x01, + dma_sg_read, dma_sg_readw, dma_sg_readl, + dma_sg_write, dma_sg_writew, dma_sg_writel, + &dma[i]); + io_sethandler(dma_sg_base + 0x18 + i, 0x01, + dma_sg_read, dma_sg_readw, dma_sg_readl, + dma_sg_write, dma_sg_writew, dma_sg_writel, + &dma[i]); + io_sethandler(dma_sg_base + 0x20 + i, 0x04, + dma_sg_read, dma_sg_readw, dma_sg_readl, + dma_sg_write, dma_sg_writew, dma_sg_writel, + &dma[i]); } } - void dma_ext_mode_init(void) { io_sethandler(0x040b, 0x01, - NULL,NULL,NULL, dma_ext_mode_write,NULL,NULL, NULL); + NULL, NULL, NULL, dma_ext_mode_write, NULL, NULL, NULL); io_sethandler(0x04d6, 0x01, - NULL,NULL,NULL, dma_ext_mode_write,NULL,NULL, NULL); + NULL, NULL, NULL, dma_ext_mode_write, NULL, NULL, NULL); } - void dma_high_page_init(void) { io_sethandler(0x0480, 8, - dma_high_page_read,NULL,NULL, dma_high_page_write,NULL,NULL, NULL); + dma_high_page_read, NULL, NULL, dma_high_page_write, NULL, NULL, NULL); } - void dma_init(void) { dma_reset(); io_sethandler(0x0000, 16, - dma_read,NULL,NULL, dma_write,NULL,NULL, NULL); + dma_read, NULL, NULL, dma_write, NULL, NULL, NULL); io_sethandler(0x0080, 8, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); dma_ps2.is_ps2 = 0; } - void dma16_init(void) { dma_reset(); io_sethandler(0x00C0, 32, - dma16_read,NULL,NULL, dma16_write,NULL,NULL, NULL); + dma16_read, NULL, NULL, dma16_write, NULL, NULL, NULL); io_sethandler(0x0088, 8, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); } - void dma_alias_set(void) { io_sethandler(0x0090, 2, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_sethandler(0x0093, 13, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); } - void dma_alias_set_piix(void) { io_sethandler(0x0090, 1, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_sethandler(0x0094, 3, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_sethandler(0x0098, 1, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_sethandler(0x009C, 3, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); } - void dma_alias_remove(void) { io_removehandler(0x0090, 2, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_removehandler(0x0093, 13, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); } - void dma_alias_remove_piix(void) { io_removehandler(0x0090, 1, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_removehandler(0x0094, 3, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_removehandler(0x0098, 1, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_removehandler(0x009C, 3, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); } - void ps2_dma_init(void) { dma_reset(); io_sethandler(0x0018, 1, - dma_ps2_read,NULL,NULL, dma_ps2_write,NULL,NULL, NULL); + dma_ps2_read, NULL, NULL, dma_ps2_write, NULL, NULL, NULL); io_sethandler(0x001a, 1, - dma_ps2_read,NULL,NULL, dma_ps2_write,NULL,NULL, NULL); + dma_ps2_read, NULL, NULL, dma_ps2_write, NULL, NULL, NULL); dma_ps2.is_ps2 = 1; } - -extern void dma_bm_read(uint32_t PhysAddress, uint8_t *DataRead, uint32_t TotalSize, int TransferSize); -extern void dma_bm_write(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_t TotalSize, int TransferSize); - +extern void dma_bm_read(uint32_t PhysAddress, uint8_t *DataRead, uint32_t TotalSize, int TransferSize); +extern void dma_bm_write(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_t TotalSize, int TransferSize); static int dma_sg(uint8_t *data, int transfer_length, int out, void *priv) @@ -1230,479 +1185,466 @@ dma_sg(uint8_t *data, int transfer_length, int out, void *priv) #endif if (!(dev->sg_status & 1)) - return 2; /*S/G disabled*/ + return 2; /*S/G disabled*/ dma_log("DMA S/G %s: %i bytes\n", out ? "write" : "read", transfer_length); while (1) { - if (dev->count <= transfer_length) { - dma_log("%sing %i bytes to %08X\n", sop, dev->count, dev->addr); - if (out) - dma_bm_read(dev->addr, (uint8_t *)(data + buffer_pos), dev->count, 4); - else - dma_bm_write(dev->addr, (uint8_t *)(data + buffer_pos), dev->count, 4); - transfer_length -= dev->count; - buffer_pos += dev->count; - } else { - dma_log("%sing %i bytes to %08X\n", sop, transfer_length, dev->addr); - if (out) - dma_bm_read(dev->addr, (uint8_t *)(data + buffer_pos), transfer_length, 4); - else - dma_bm_write(dev->addr, (uint8_t *)(data + buffer_pos), transfer_length, 4); - /* Increase addr and decrease count so that resumed transfers do not mess up. */ - dev->addr += transfer_length; - dev->count -= transfer_length; - transfer_length = 0; - force_end = 1; - } + if (dev->count <= transfer_length) { + dma_log("%sing %i bytes to %08X\n", sop, dev->count, dev->addr); + if (out) + dma_bm_read(dev->addr, (uint8_t *) (data + buffer_pos), dev->count, 4); + else + dma_bm_write(dev->addr, (uint8_t *) (data + buffer_pos), dev->count, 4); + transfer_length -= dev->count; + buffer_pos += dev->count; + } else { + dma_log("%sing %i bytes to %08X\n", sop, transfer_length, dev->addr); + if (out) + dma_bm_read(dev->addr, (uint8_t *) (data + buffer_pos), transfer_length, 4); + else + dma_bm_write(dev->addr, (uint8_t *) (data + buffer_pos), transfer_length, 4); + /* Increase addr and decrease count so that resumed transfers do not mess up. */ + dev->addr += transfer_length; + dev->count -= transfer_length; + transfer_length = 0; + force_end = 1; + } - if (force_end) { - dma_log("Total transfer length smaller than sum of all blocks, partial block\n"); - return 1; /* This block has exhausted the data to transfer and it was smaller than the count, break. */ - } else { - if (!transfer_length && !dev->eot) { - dma_log("Total transfer length smaller than sum of all blocks, full block\n"); - return 1; /* We have exhausted the data to transfer but there's more blocks left, break. */ - } else if (transfer_length && dev->eot) { - dma_log("Total transfer length greater than sum of all blocks\n"); - return 4; /* There is data left to transfer but we have reached EOT - return with error. */ - } else if (dev->eot) { - dma_log("Regular EOT\n"); - return 5; /* We have regularly reached EOT - clear status and break. */ - } else { - /* We have more to transfer and there are blocks left, get next block. */ - dma_sg_next_addr(dev); - } - } + if (force_end) { + dma_log("Total transfer length smaller than sum of all blocks, partial block\n"); + return 1; /* This block has exhausted the data to transfer and it was smaller than the count, break. */ + } else { + if (!transfer_length && !dev->eot) { + dma_log("Total transfer length smaller than sum of all blocks, full block\n"); + return 1; /* We have exhausted the data to transfer but there's more blocks left, break. */ + } else if (transfer_length && dev->eot) { + dma_log("Total transfer length greater than sum of all blocks\n"); + return 4; /* There is data left to transfer but we have reached EOT - return with error. */ + } else if (dev->eot) { + dma_log("Regular EOT\n"); + return 5; /* We have regularly reached EOT - clear status and break. */ + } else { + /* We have more to transfer and there are blocks left, get next block. */ + dma_sg_next_addr(dev); + } + } } return 1; } - uint8_t _dma_read(uint32_t addr, dma_t *dma_c) { uint8_t temp; if (dma_advanced) { - if (dma_c->sg_status & 1) - dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg(&temp, 1, 1, dma_c) << 4); - else - dma_bm_read(addr, &temp, 1, dma_transfer_size(dma_c)); + if (dma_c->sg_status & 1) + dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg(&temp, 1, 1, dma_c) << 4); + else + dma_bm_read(addr, &temp, 1, dma_transfer_size(dma_c)); } else - temp = mem_readb_phys(addr); + temp = mem_readb_phys(addr); - return(temp); + return (temp); } - static uint16_t _dma_readw(uint32_t addr, dma_t *dma_c) { uint16_t temp; if (dma_advanced) { - if (dma_c->sg_status & 1) - dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg((uint8_t *) &temp, 2, 1, dma_c) << 4); - else - dma_bm_read(addr, (uint8_t *) &temp, 2, dma_transfer_size(dma_c)); + if (dma_c->sg_status & 1) + dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg((uint8_t *) &temp, 2, 1, dma_c) << 4); + else + dma_bm_read(addr, (uint8_t *) &temp, 2, dma_transfer_size(dma_c)); } else - temp = _dma_read(addr, dma_c) | (_dma_read(addr + 1, dma_c) << 8); + temp = _dma_read(addr, dma_c) | (_dma_read(addr + 1, dma_c) << 8); - return(temp); + return (temp); } - static void _dma_write(uint32_t addr, uint8_t val, dma_t *dma_c) { if (dma_advanced) { - if (dma_c->sg_status & 1) - dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg(&val, 1, 0, dma_c) << 4); - else - dma_bm_write(addr, &val, 1, dma_transfer_size(dma_c)); + if (dma_c->sg_status & 1) + dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg(&val, 1, 0, dma_c) << 4); + else + dma_bm_write(addr, &val, 1, dma_transfer_size(dma_c)); } else { - mem_writeb_phys(addr, val); - if (dma_at) - mem_invalidate_range(addr, addr); + mem_writeb_phys(addr, val); + if (dma_at) + mem_invalidate_range(addr, addr); } } - static void _dma_writew(uint32_t addr, uint16_t val, dma_t *dma_c) { if (dma_advanced) { - if (dma_c->sg_status & 1) - dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg((uint8_t *) &val, 2, 0, dma_c) << 4); - else - dma_bm_write(addr, (uint8_t *) &val, 2, dma_transfer_size(dma_c)); + if (dma_c->sg_status & 1) + dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg((uint8_t *) &val, 2, 0, dma_c) << 4); + else + dma_bm_write(addr, (uint8_t *) &val, 2, dma_transfer_size(dma_c)); } else { - _dma_write(addr, val & 0xff, dma_c); - _dma_write(addr + 1, val >> 8, dma_c); + _dma_write(addr, val & 0xff, dma_c); + _dma_write(addr + 1, val >> 8, dma_c); } } - static void dma_retreat(dma_t *dma_c) { int as = dma_c->transfer_mode >> 8; if (dma->sg_status & 1) { - dma_c->ac = (dma_c->ac - as) & dma_mask; + dma_c->ac = (dma_c->ac - as) & dma_mask; - dma_c->page = dma_c->page_l = (dma_c->ac >> 16) & 0xff; - dma_c->page_h = (dma_c->ac >> 24) & 0xff; + dma_c->page = dma_c->page_l = (dma_c->ac >> 16) & 0xff; + dma_c->page_h = (dma_c->ac >> 24) & 0xff; } else if (as == 2) - dma_c->ac = ((dma_c->ac & 0xfffe0000) & dma_mask) | ((dma_c->ac - as) & 0xffff); + dma_c->ac = ((dma_c->ac & 0xfffe0000) & dma_mask) | ((dma_c->ac - as) & 0xffff); else - dma_c->ac = ((dma_c->ac & 0xffff0000) & dma_mask) | ((dma_c->ac - as) & 0xffff); + dma_c->ac = ((dma_c->ac & 0xffff0000) & dma_mask) | ((dma_c->ac - as) & 0xffff); } - void dma_advance(dma_t *dma_c) { int as = dma_c->transfer_mode >> 8; if (dma->sg_status & 1) { - dma_c->ac = (dma_c->ac + as) & dma_mask; + dma_c->ac = (dma_c->ac + as) & dma_mask; - dma_c->page = dma_c->page_l = (dma_c->ac >> 16) & 0xff; - dma_c->page_h = (dma_c->ac >> 24) & 0xff; + dma_c->page = dma_c->page_l = (dma_c->ac >> 16) & 0xff; + dma_c->page_h = (dma_c->ac >> 24) & 0xff; } else if (as == 2) - dma_c->ac = ((dma_c->ac & 0xfffe0000) & dma_mask) | ((dma_c->ac + as) & 0xffff); + dma_c->ac = ((dma_c->ac & 0xfffe0000) & dma_mask) | ((dma_c->ac + as) & 0xffff); else - dma_c->ac = ((dma_c->ac & 0xffff0000) & dma_mask) | ((dma_c->ac + as) & 0xffff); + dma_c->ac = ((dma_c->ac & 0xffff0000) & dma_mask) | ((dma_c->ac + as) & 0xffff); } - int dma_channel_read(int channel) { - dma_t *dma_c = &dma[channel]; + dma_t *dma_c = &dma[channel]; uint16_t temp; - int tc = 0; + int tc = 0; if (channel < 4) { - if (dma_command[0] & 0x04) - return(DMA_NODATA); + if (dma_command[0] & 0x04) + return (DMA_NODATA); } else { - if (dma_command[1] & 0x04) - return(DMA_NODATA); + if (dma_command[1] & 0x04) + return (DMA_NODATA); } if (!(dma_e & (1 << channel))) - return(DMA_NODATA); + return (DMA_NODATA); if ((dma_m & (1 << channel)) && !dma_req_is_soft) - return(DMA_NODATA); + return (DMA_NODATA); if ((dma_c->mode & 0xC) != 8) - return(DMA_NODATA); + return (DMA_NODATA); if (!dma_at && !channel) - refreshread(); + refreshread(); - if (! dma_c->size) { - temp = _dma_read(dma_c->ac, dma_c); + if (!dma_c->size) { + temp = _dma_read(dma_c->ac, dma_c); - if (dma_c->mode & 0x20) { - if (dma_ps2.is_ps2) - dma_c->ac--; - else if (dma_advanced) - dma_retreat(dma_c); - else - dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac - 1) & 0xffff); - } else { - if (dma_ps2.is_ps2) - dma_c->ac++; - else if (dma_advanced) - dma_advance(dma_c); - else - dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac + 1) & 0xffff); - } + if (dma_c->mode & 0x20) { + if (dma_ps2.is_ps2) + dma_c->ac--; + else if (dma_advanced) + dma_retreat(dma_c); + else + dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac - 1) & 0xffff); + } else { + if (dma_ps2.is_ps2) + dma_c->ac++; + else if (dma_advanced) + dma_advance(dma_c); + else + dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac + 1) & 0xffff); + } } else { - temp = _dma_readw(dma_c->ac, dma_c); + temp = _dma_readw(dma_c->ac, dma_c); - if (dma_c->mode & 0x20) { - if (dma_ps2.is_ps2) - dma_c->ac -= 2; - else if (dma_advanced) - dma_retreat(dma_c); - else - dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac - 2) & 0x1ffff); - } else { - if (dma_ps2.is_ps2) - dma_c->ac += 2; - else if (dma_advanced) - dma_advance(dma_c); - else - dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac + 2) & 0x1ffff); - } + if (dma_c->mode & 0x20) { + if (dma_ps2.is_ps2) + dma_c->ac -= 2; + else if (dma_advanced) + dma_retreat(dma_c); + else + dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac - 2) & 0x1ffff); + } else { + if (dma_ps2.is_ps2) + dma_c->ac += 2; + else if (dma_advanced) + dma_advance(dma_c); + else + dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac + 2) & 0x1ffff); + } } dma_stat_rq |= (1 << channel); dma_c->cc--; if (dma_c->cc < 0) { - if (dma_advanced && (dma_c->sg_status & 1) && !(dma_c->sg_status & 6)) - dma_sg_next_addr(dma_c); - else { - tc = 1; - if (dma_c->mode & 0x10) { /*Auto-init*/ - dma_c->cc = dma_c->cb; - dma_c->ac = dma_c->ab; - } else - dma_m |= (1 << channel); - dma_stat |= (1 << channel); - } + if (dma_advanced && (dma_c->sg_status & 1) && !(dma_c->sg_status & 6)) + dma_sg_next_addr(dma_c); + else { + tc = 1; + if (dma_c->mode & 0x10) { /*Auto-init*/ + dma_c->cc = dma_c->cb; + dma_c->ac = dma_c->ab; + } else + dma_m |= (1 << channel); + dma_stat |= (1 << channel); + } } if (tc) { - if (dma_advanced && (dma_c->sg_status & 1) && ((dma_c->sg_command & 0xc0) == 0x40)) { - picint(1 << 13); - dma_c->sg_status |= 8; - } + if (dma_advanced && (dma_c->sg_status & 1) && ((dma_c->sg_command & 0xc0) == 0x40)) { + picint(1 << 13); + dma_c->sg_status |= 8; + } - return(temp | DMA_OVER); + return (temp | DMA_OVER); } - return(temp); + return (temp); } - int dma_channel_write(int channel, uint16_t val) { dma_t *dma_c = &dma[channel]; if (channel < 4) { - if (dma_command[0] & 0x04) - return(DMA_NODATA); + if (dma_command[0] & 0x04) + return (DMA_NODATA); } else { - if (dma_command[1] & 0x04) - return(DMA_NODATA); + if (dma_command[1] & 0x04) + return (DMA_NODATA); } if (!(dma_e & (1 << channel))) - return(DMA_NODATA); + return (DMA_NODATA); if ((dma_m & (1 << channel)) && !dma_req_is_soft) - return(DMA_NODATA); + return (DMA_NODATA); if ((dma_c->mode & 0xC) != 4) - return(DMA_NODATA); + return (DMA_NODATA); - if (! dma_c->size) { - _dma_write(dma_c->ac, val & 0xff, dma_c); + if (!dma_c->size) { + _dma_write(dma_c->ac, val & 0xff, dma_c); - if (dma_c->mode & 0x20) { - if (dma_ps2.is_ps2) - dma_c->ac--; - else if (dma_advanced) - dma_retreat(dma_c); - else - dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac - 1) & 0xffff); - } else { - if (dma_ps2.is_ps2) - dma_c->ac++; - else if (dma_advanced) - dma_advance(dma_c); - else - dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac + 1) & 0xffff); - } + if (dma_c->mode & 0x20) { + if (dma_ps2.is_ps2) + dma_c->ac--; + else if (dma_advanced) + dma_retreat(dma_c); + else + dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac - 1) & 0xffff); + } else { + if (dma_ps2.is_ps2) + dma_c->ac++; + else if (dma_advanced) + dma_advance(dma_c); + else + dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac + 1) & 0xffff); + } } else { - _dma_writew(dma_c->ac, val, dma_c); + _dma_writew(dma_c->ac, val, dma_c); - if (dma_c->mode & 0x20) { - if (dma_ps2.is_ps2) - dma_c->ac -= 2; - else if (dma_advanced) - dma_retreat(dma_c); - else - dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac - 2) & 0x1ffff); - dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac - 2) & 0x1ffff); - } else { - if (dma_ps2.is_ps2) - dma_c->ac += 2; - else if (dma_advanced) - dma_advance(dma_c); - else - dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac + 2) & 0x1ffff); - } + if (dma_c->mode & 0x20) { + if (dma_ps2.is_ps2) + dma_c->ac -= 2; + else if (dma_advanced) + dma_retreat(dma_c); + else + dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac - 2) & 0x1ffff); + dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac - 2) & 0x1ffff); + } else { + if (dma_ps2.is_ps2) + dma_c->ac += 2; + else if (dma_advanced) + dma_advance(dma_c); + else + dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac + 2) & 0x1ffff); + } } dma_stat_rq |= (1 << channel); dma_c->cc--; if (dma_c->cc < 0) { - if (dma_advanced && (dma_c->sg_status & 1) && !(dma_c->sg_status & 6)) - dma_sg_next_addr(dma_c); - else { - if (dma_c->mode & 0x10) { /*Auto-init*/ - dma_c->cc = dma_c->cb; - dma_c->ac = dma_c->ab; - } else - dma_m |= (1 << channel); - dma_stat |= (1 << channel); - } + if (dma_advanced && (dma_c->sg_status & 1) && !(dma_c->sg_status & 6)) + dma_sg_next_addr(dma_c); + else { + if (dma_c->mode & 0x10) { /*Auto-init*/ + dma_c->cc = dma_c->cb; + dma_c->ac = dma_c->ab; + } else + dma_m |= (1 << channel); + dma_stat |= (1 << channel); + } } if (dma_m & (1 << channel)) { - if (dma_advanced && (dma_c->sg_status & 1) && ((dma_c->sg_command & 0xc0) == 0x40)) { - picint(1 << 13); - dma_c->sg_status |= 8; - } + if (dma_advanced && (dma_c->sg_status & 1) && ((dma_c->sg_command & 0xc0) == 0x40)) { + picint(1 << 13); + dma_c->sg_status |= 8; + } - return(DMA_OVER); + return (DMA_OVER); } - return(0); + return (0); } - static void dma_ps2_run(int channel) { dma_t *dma_c = &dma[channel]; switch (dma_c->ps2_mode & DMA_PS2_XFER_MASK) { - case DMA_PS2_XFER_MEM_TO_IO: - do { - if (! dma_c->size) { - uint8_t temp = _dma_read(dma_c->ac, dma_c); + case DMA_PS2_XFER_MEM_TO_IO: + do { + if (!dma_c->size) { + uint8_t temp = _dma_read(dma_c->ac, dma_c); - outb(dma_c->io_addr, temp); + outb(dma_c->io_addr, temp); - if (dma_c->ps2_mode & DMA_PS2_DEC2) - dma_c->ac--; - else - dma_c->ac++; - } else { - uint16_t temp = _dma_readw(dma_c->ac, dma_c); + if (dma_c->ps2_mode & DMA_PS2_DEC2) + dma_c->ac--; + else + dma_c->ac++; + } else { + uint16_t temp = _dma_readw(dma_c->ac, dma_c); - outw(dma_c->io_addr, temp); + outw(dma_c->io_addr, temp); - if (dma_c->ps2_mode & DMA_PS2_DEC2) - dma_c->ac -= 2; - else - dma_c->ac += 2; - } + if (dma_c->ps2_mode & DMA_PS2_DEC2) + dma_c->ac -= 2; + else + dma_c->ac += 2; + } - dma_stat_rq |= (1 << channel); - dma_c->cc--; - } while (dma_c->cc > 0); + dma_stat_rq |= (1 << channel); + dma_c->cc--; + } while (dma_c->cc > 0); - dma_stat |= (1 << channel); - break; + dma_stat |= (1 << channel); + break; - case DMA_PS2_XFER_IO_TO_MEM: - do { - if (! dma_c->size) { - uint8_t temp = inb(dma_c->io_addr); + case DMA_PS2_XFER_IO_TO_MEM: + do { + if (!dma_c->size) { + uint8_t temp = inb(dma_c->io_addr); - _dma_write(dma_c->ac, temp, dma_c); + _dma_write(dma_c->ac, temp, dma_c); - if (dma_c->ps2_mode & DMA_PS2_DEC2) - dma_c->ac--; - else - dma_c->ac++; - } else { - uint16_t temp = inw(dma_c->io_addr); + if (dma_c->ps2_mode & DMA_PS2_DEC2) + dma_c->ac--; + else + dma_c->ac++; + } else { + uint16_t temp = inw(dma_c->io_addr); - _dma_writew(dma_c->ac, temp, dma_c); + _dma_writew(dma_c->ac, temp, dma_c); - if (dma_c->ps2_mode & DMA_PS2_DEC2) - dma_c->ac -= 2; - else - dma_c->ac += 2; - } + if (dma_c->ps2_mode & DMA_PS2_DEC2) + dma_c->ac -= 2; + else + dma_c->ac += 2; + } - dma_stat_rq |= (1 << channel); - dma_c->cc--; - } while (dma_c->cc > 0); + dma_stat_rq |= (1 << channel); + dma_c->cc--; + } while (dma_c->cc > 0); - ps2_cache_clean(); - dma_stat |= (1 << channel); - break; + ps2_cache_clean(); + dma_stat |= (1 << channel); + break; - default: /*Memory verify*/ - do { - if (! dma_c->size) { - if (dma_c->ps2_mode & DMA_PS2_DEC2) - dma_c->ac--; - else - dma_c->ac++; - } else { - if (dma_c->ps2_mode & DMA_PS2_DEC2) - dma_c->ac -= 2; - else - dma_c->ac += 2; - } + default: /*Memory verify*/ + do { + if (!dma_c->size) { + if (dma_c->ps2_mode & DMA_PS2_DEC2) + dma_c->ac--; + else + dma_c->ac++; + } else { + if (dma_c->ps2_mode & DMA_PS2_DEC2) + dma_c->ac -= 2; + else + dma_c->ac += 2; + } - dma_stat_rq |= (1 << channel); - dma->cc--; - } while (dma->cc > 0); - - dma_stat |= (1 << channel); - break; + dma_stat_rq |= (1 << channel); + dma->cc--; + } while (dma->cc > 0); + dma_stat |= (1 << channel); + break; } } - int dma_mode(int channel) { - return(dma[channel].mode); + return (dma[channel].mode); } - /* DMA Bus Master Page Read/Write */ void dma_bm_read(uint32_t PhysAddress, uint8_t *DataRead, uint32_t TotalSize, int TransferSize) { - uint32_t i = 0, n, n2; - uint8_t bytes[4] = { 0, 0, 0, 0 }; + uint32_t i = 0, n, n2; + uint8_t bytes[4] = { 0, 0, 0, 0 }; - n = TotalSize & ~(TransferSize - 1); + n = TotalSize & ~(TransferSize - 1); n2 = TotalSize - n; /* Do the divisible block, if there is one. */ if (n) { - for (i = 0; i < n; i += TransferSize) - mem_read_phys((void *) &(DataRead[i]), PhysAddress + i, TransferSize); + for (i = 0; i < n; i += TransferSize) + mem_read_phys((void *) &(DataRead[i]), PhysAddress + i, TransferSize); } /* Do the non-divisible block, if there is one. */ if (n2) { - mem_read_phys((void *) bytes, PhysAddress + n, TransferSize); - memcpy((void *) &(DataRead[n]), bytes, n2); + mem_read_phys((void *) bytes, PhysAddress + n, TransferSize); + memcpy((void *) &(DataRead[n]), bytes, n2); } } - void dma_bm_write(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_t TotalSize, int TransferSize) { - uint32_t i = 0, n, n2; - uint8_t bytes[4] = { 0, 0, 0, 0 }; + uint32_t i = 0, n, n2; + uint8_t bytes[4] = { 0, 0, 0, 0 }; - n = TotalSize & ~(TransferSize - 1); + n = TotalSize & ~(TransferSize - 1); n2 = TotalSize - n; /* Do the divisible block, if there is one. */ if (n) { - for (i = 0; i < n; i += TransferSize) - mem_write_phys((void *) &(DataWrite[i]), PhysAddress + i, TransferSize); + for (i = 0; i < n; i += TransferSize) + mem_write_phys((void *) &(DataWrite[i]), PhysAddress + i, TransferSize); } /* Do the non-divisible block, if there is one. */ if (n2) { - mem_read_phys((void *) bytes, PhysAddress + n, TransferSize); - memcpy(bytes, (void *) &(DataWrite[n]), n2); - mem_write_phys((void *) bytes, PhysAddress + n, TransferSize); + mem_read_phys((void *) bytes, PhysAddress + n, TransferSize); + memcpy(bytes, (void *) &(DataWrite[n]), n2); + mem_write_phys((void *) bytes, PhysAddress + n, TransferSize); } if (dma_at) - mem_invalidate_range(PhysAddress, PhysAddress + TotalSize - 1); + mem_invalidate_range(PhysAddress, PhysAddress + TotalSize - 1); } diff --git a/src/fifo8.c b/src/fifo8.c index a6f7f1e0e..5e3008a7d 100644 --- a/src/fifo8.c +++ b/src/fifo8.c @@ -21,31 +21,35 @@ #include <86box/86box.h> #include <86box/fifo8.h> -void fifo8_create(Fifo8 *fifo, uint32_t capacity) +void +fifo8_create(Fifo8 *fifo, uint32_t capacity) { - fifo->data = (uint8_t *)malloc(capacity); - memset(fifo->data, 0, capacity); + fifo->data = (uint8_t *) malloc(capacity); + memset(fifo->data, 0, capacity); fifo->capacity = capacity; - fifo->head = 0; - fifo->num = 0; + fifo->head = 0; + fifo->num = 0; } -void fifo8_destroy(Fifo8 *fifo) +void +fifo8_destroy(Fifo8 *fifo) { if (fifo->data) { - free(fifo->data); - fifo->data = NULL; - } + free(fifo->data); + fifo->data = NULL; + } } -void fifo8_push(Fifo8 *fifo, uint8_t data) +void +fifo8_push(Fifo8 *fifo, uint8_t data) { assert(fifo->num < fifo->capacity); fifo->data[(fifo->head + fifo->num) % fifo->capacity] = data; fifo->num++; } -void fifo8_push_all(Fifo8 *fifo, const uint8_t *data, uint32_t num) +void +fifo8_push_all(Fifo8 *fifo, const uint8_t *data, uint32_t num) { uint32_t start, avail; @@ -64,7 +68,8 @@ void fifo8_push_all(Fifo8 *fifo, const uint8_t *data, uint32_t num) fifo->num += num; } -uint8_t fifo8_pop(Fifo8 *fifo) +uint8_t +fifo8_pop(Fifo8 *fifo) { uint8_t ret; @@ -75,41 +80,47 @@ uint8_t fifo8_pop(Fifo8 *fifo) return ret; } -const uint8_t *fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *num) +const uint8_t * +fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *num) { uint8_t *ret; assert(max > 0 && max <= fifo->num); *num = MIN(fifo->capacity - fifo->head, max); - ret = &fifo->data[fifo->head]; + ret = &fifo->data[fifo->head]; fifo->head += *num; fifo->head %= fifo->capacity; fifo->num -= *num; return ret; } -void fifo8_reset(Fifo8 *fifo) +void +fifo8_reset(Fifo8 *fifo) { - fifo->num = 0; + fifo->num = 0; fifo->head = 0; } -int fifo8_is_empty(Fifo8 *fifo) +int +fifo8_is_empty(Fifo8 *fifo) { return (fifo->num == 0); } -int fifo8_is_full(Fifo8 *fifo) +int +fifo8_is_full(Fifo8 *fifo) { return (fifo->num == fifo->capacity); } -uint32_t fifo8_num_free(Fifo8 *fifo) +uint32_t +fifo8_num_free(Fifo8 *fifo) { return fifo->capacity - fifo->num; } -uint32_t fifo8_num_used(Fifo8 *fifo) +uint32_t +fifo8_num_used(Fifo8 *fifo) { return fifo->num; } diff --git a/src/gdbstub.c b/src/gdbstub.c index d609c68e2..efca53f74 100644 --- a/src/gdbstub.c +++ b/src/gdbstub.c @@ -25,7 +25,7 @@ # include # else # include -# define ssize_t long +# define ssize_t long # define strtok_r(a, b, c) strtok_s(a, b, c) # endif # include @@ -121,8 +121,8 @@ typedef struct _gdbstub_client_ { struct sockaddr_in addr; char packet[16384], response[16384]; - int has_packet: 1, first_packet_received: 1, ida_mode: 1, waiting_stop: 1, - packet_pos, response_pos; + int has_packet : 1, first_packet_received : 1, ida_mode : 1, waiting_stop : 1, + packet_pos, response_pos; event_t *processed_event, *response_event; @@ -162,7 +162,7 @@ gdbstub_log(const char *fmt, ...) static x86seg *segment_regs[] = { &cpu_state.seg_cs, &cpu_state.seg_ss, &cpu_state.seg_ds, &cpu_state.seg_es, &cpu_state.seg_fs, &cpu_state.seg_gs }; static uint32_t *cr_regs[] = { &cpu_state.CR0.l, &cr2, &cr3, &cr4 }; static void *fpu_regs[] = { &cpu_state.npxc, &cpu_state.npxs, NULL, &x87_pc_seg, &x87_pc_off, &x87_op_seg, &x87_op_off }; -static char target_xml[] = /* QEMU gdb-xml/i386-32bit.xml with modifications (described in comments) */ +static char target_xml[] = /* QEMU gdb-xml/i386-32bit.xml with modifications (described in comments) */ // clang-format off "" "" diff --git a/src/ini.c b/src/ini.c index 6c4565bb9..b3c7295cb 100644 --- a/src/ini.c +++ b/src/ini.c @@ -245,7 +245,7 @@ ini_close(ini_t ini) sec = (section_t *) list->next; while (sec != NULL) { - ns = (section_t *) sec->list.next; + ns = (section_t *) sec->list.next; ent = (entry_t *) sec->entry_head.next; while (ent != NULL) { diff --git a/src/io.c b/src/io.c index 6501a199a..ef7dc7c02 100644 --- a/src/io.c +++ b/src/io.c @@ -30,286 +30,268 @@ #include "cpu.h" #include <86box/m_amstrad.h> - -#define NPORTS 65536 /* PC/AT supports 64K ports */ - +#define NPORTS 65536 /* PC/AT supports 64K ports */ typedef struct _io_ { - uint8_t (*inb)(uint16_t addr, void *priv); + uint8_t (*inb)(uint16_t addr, void *priv); uint16_t (*inw)(uint16_t addr, void *priv); uint32_t (*inl)(uint16_t addr, void *priv); - void (*outb)(uint16_t addr, uint8_t val, void *priv); - void (*outw)(uint16_t addr, uint16_t val, void *priv); - void (*outl)(uint16_t addr, uint32_t val, void *priv); + void (*outb)(uint16_t addr, uint8_t val, void *priv); + void (*outw)(uint16_t addr, uint16_t val, void *priv); + void (*outl)(uint16_t addr, uint32_t val, void *priv); - void *priv; + void *priv; struct _io_ *prev, *next; } io_t; typedef struct { - uint8_t enable; - uint16_t base, size; - void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv), - *priv; + uint8_t enable; + uint16_t base, size; + void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv), + *priv; } io_trap_t; -int initialized = 0; +int initialized = 0; io_t *io[NPORTS], *io_last[NPORTS]; - #ifdef ENABLE_IO_LOG int io_do_log = ENABLE_IO_LOG; - static void io_log(const char *fmt, ...) { va_list ap; if (io_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define io_log(fmt, ...) +# define io_log(fmt, ...) #endif - void io_init(void) { - int c; + int c; io_t *p, *q; if (!initialized) { - for (c=0; cprev; - free(p); - p = q; - } - p = NULL; - } + /* Port c has at least one handler. */ + p = io_last[c]; + /* After this loop, p will have the pointer to the first handler. */ + while (p) { + q = p->prev; + free(p); + p = q; + } + p = NULL; + } - /* io[c] should be NULL. */ - io[c] = io_last[c] = NULL; + /* io[c] should be NULL. */ + io[c] = io_last[c] = NULL; } } - void io_sethandler_common(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv, int step) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv, int step) { - int c; + int c; io_t *p, *q = NULL; for (c = 0; c < size; c += step) { - p = io_last[base + c]; - q = (io_t *) malloc(sizeof(io_t)); - memset(q, 0, sizeof(io_t)); - if (p) { - p->next = q; - q->prev = p; - } else { - io[base + c] = q; - q->prev = NULL; - } + p = io_last[base + c]; + q = (io_t *) malloc(sizeof(io_t)); + memset(q, 0, sizeof(io_t)); + if (p) { + p->next = q; + q->prev = p; + } else { + io[base + c] = q; + q->prev = NULL; + } - q->inb = inb; - q->inw = inw; - q->inl = inl; + q->inb = inb; + q->inw = inw; + q->inl = inl; - q->outb = outb; - q->outw = outw; - q->outl = outl; + q->outb = outb; + q->outw = outw; + q->outl = outl; - q->priv = priv; - q->next = NULL; + q->priv = priv; + q->next = NULL; - io_last[base + c] = q; + io_last[base + c] = q; } } - void io_removehandler_common(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv, int step) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv, int step) { - int c; + int c; io_t *p, *q; for (c = 0; c < size; c += step) { - p = io[base + c]; - if (!p) - continue; - while(p) { - q = p->next; - if ((p->inb == inb) && (p->inw == inw) && - (p->inl == inl) && (p->outb == outb) && - (p->outw == outw) && (p->outl == outl) && - (p->priv == priv)) { - if (p->prev) - p->prev->next = p->next; - else - io[base + c] = p->next; - if (p->next) - p->next->prev = p->prev; - else - io_last[base + c] = p->prev; - free(p); - p = NULL; - break; - } - p = q; - } + p = io[base + c]; + if (!p) + continue; + while (p) { + q = p->next; + if ((p->inb == inb) && (p->inw == inw) && (p->inl == inl) && (p->outb == outb) && (p->outw == outw) && (p->outl == outl) && (p->priv == priv)) { + if (p->prev) + p->prev->next = p->next; + else + io[base + c] = p->next; + if (p->next) + p->next->prev = p->prev; + else + io_last[base + c] = p->prev; + free(p); + p = NULL; + break; + } + p = q; + } } } - void io_handler_common(int set, uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv, int step) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv, int step) { if (set) - io_sethandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, step); + io_sethandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, step); else - io_removehandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, step); + io_removehandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, step); } - void io_sethandler(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv) { io_sethandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, 1); } - void io_removehandler(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv) { io_removehandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, 1); } - void io_handler(int set, uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv) { io_handler_common(set, base, size, inb, inw, inl, outb, outw, outl, priv, 1); } - void io_sethandler_interleaved(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv) { io_sethandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, 2); } - void io_removehandler_interleaved(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv) { io_removehandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, 2); } - void io_handler_interleaved(int set, uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv) { io_handler_common(set, base, size, inb, inw, inl, outb, outw, outl, priv, 2); } - uint8_t inb(uint16_t port) { uint8_t ret = 0xff; - io_t *p, *q; - int found = 0; - int qfound = 0; + io_t *p, *q; + int found = 0; + int qfound = 0; p = io[port]; - while(p) { - q = p->next; - if (p->inb) { - ret &= p->inb(port, p->priv); - found |= 1; - qfound++; - } - p = q; + while (p) { + q = p->next; + if (p->inb) { + ret &= p->inb(port, p->priv); + found |= 1; + qfound++; + } + p = q; } if (amstrad_latch & 0x80000000) { @@ -322,41 +304,40 @@ inb(uint16_t port) } if (!found) - cycles -= io_delay; + cycles -= io_delay; /* TriGem 486-BIOS MHz output. */ /* if (port == 0x1ed) - ret = 0xfe; */ + ret = 0xfe; */ io_log("[%04X:%08X] (%i, %i, %04i) in b(%04X) = %02X\n", CS, cpu_state.pc, in_smm, found, qfound, port, ret); - return(ret); + return (ret); } - void outb(uint16_t port, uint8_t val) { io_t *p, *q; - int found = 0; - int qfound = 0; + int found = 0; + int qfound = 0; p = io[port]; - while(p) { - q = p->next; - if (p->outb) { - p->outb(port, val, p->priv); - found |= 1; - qfound++; - } - p = q; + while (p) { + q = p->next; + if (p->outb) { + p->outb(port, val, p->priv); + found |= 1; + qfound++; + } + p = q; } if (!found) { - cycles -= io_delay; + cycles -= io_delay; #ifdef USE_DYNAREC - if (cpu_use_dynarec && ((port == 0xeb) || (port == 0xed))) - update_tsc(); + if (cpu_use_dynarec && ((port == 0xeb) || (port == 0xed))) + update_tsc(); #endif } @@ -365,41 +346,40 @@ outb(uint16_t port, uint8_t val) return; } - uint16_t inw(uint16_t port) { - io_t *p, *q; - uint16_t ret = 0xffff; - int found = 0; - int qfound = 0; - uint8_t ret8[2]; - int i = 0; + io_t *p, *q; + uint16_t ret = 0xffff; + int found = 0; + int qfound = 0; + uint8_t ret8[2]; + int i = 0; p = io[port]; - while(p) { - q = p->next; - if (p->inw) { - ret &= p->inw(port, p->priv); - found |= 2; - qfound++; - } - p = q; + while (p) { + q = p->next; + if (p->inw) { + ret &= p->inw(port, p->priv); + found |= 2; + qfound++; + } + p = q; } ret8[0] = ret & 0xff; ret8[1] = (ret >> 8) & 0xff; for (i = 0; i < 2; i++) { - p = io[(port + i) & 0xffff]; - while(p) { - q = p->next; - if (p->inb && !p->inw) { - ret8[i] &= p->inb(port + i, p->priv); - found |= 1; - qfound++; - } - p = q; - } + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->inb && !p->inw) { + ret8[i] &= p->inb(port + i, p->priv); + found |= 1; + qfound++; + } + p = q; + } } ret = (ret8[1] << 8) | ret8[0]; @@ -413,51 +393,50 @@ inw(uint16_t port) } if (!found) - cycles -= io_delay; + cycles -= io_delay; io_log("[%04X:%08X] (%i, %i, %04i) in w(%04X) = %04X\n", CS, cpu_state.pc, in_smm, found, qfound, port, ret); return ret; } - void outw(uint16_t port, uint16_t val) { io_t *p, *q; - int found = 0; - int qfound = 0; - int i = 0; + int found = 0; + int qfound = 0; + int i = 0; p = io[port]; - while(p) { - q = p->next; - if (p->outw) { - p->outw(port, val, p->priv); - found |= 2; - qfound++; - } - p = q; + while (p) { + q = p->next; + if (p->outw) { + p->outw(port, val, p->priv); + found |= 2; + qfound++; + } + p = q; } for (i = 0; i < 2; i++) { - p = io[(port + i) & 0xffff]; - while(p) { - q = p->next; - if (p->outb && !p->outw) { - p->outb(port + i, val >> (i << 3), p->priv); - found |= 1; - qfound++; - } - p = q; - } + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->outb && !p->outw) { + p->outb(port + i, val >> (i << 3), p->priv); + found |= 1; + qfound++; + } + p = q; + } } if (!found) { - cycles -= io_delay; + cycles -= io_delay; #ifdef USE_DYNAREC - if (cpu_use_dynarec && ((port == 0xeb) || (port == 0xed))) - update_tsc(); + if (cpu_use_dynarec && ((port == 0xeb) || (port == 0xed))) + update_tsc(); #endif } @@ -466,32 +445,31 @@ outw(uint16_t port, uint16_t val) return; } - uint32_t inl(uint16_t port) { - io_t *p, *q; + io_t *p, *q; uint32_t ret = 0xffffffff; uint16_t ret16[2]; - uint8_t ret8[4]; - int found = 0; - int qfound = 0; - int i = 0; + uint8_t ret8[4]; + int found = 0; + int qfound = 0; + int i = 0; p = io[port]; - while(p) { - q = p->next; - if (p->inl) { - ret &= p->inl(port, p->priv); - found |= 4; - qfound++; - } - p = q; + while (p) { + q = p->next; + if (p->inl) { + ret &= p->inl(port, p->priv); + found |= 4; + qfound++; + } + p = q; } ret16[0] = ret & 0xffff; ret16[1] = (ret >> 16) & 0xffff; - p = io[port & 0xffff]; + p = io[port & 0xffff]; while (p) { q = p->next; if (p->inw && !p->inl) { @@ -519,16 +497,16 @@ inl(uint16_t port) ret8[2] = (ret >> 16) & 0xff; ret8[3] = (ret >> 24) & 0xff; for (i = 0; i < 4; i++) { - p = io[(port + i) & 0xffff]; - while(p) { - q = p->next; - if (p->inb && !p->inw && !p->inl) { - ret8[i] &= p->inb(port + i, p->priv); - found |= 1; - qfound++; - } - p = q; - } + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->inb && !p->inw && !p->inl) { + ret8[i] &= p->inb(port + i, p->priv); + found |= 1; + qfound++; + } + p = q; + } } ret = (ret8[3] << 24) | (ret8[2] << 16) | (ret8[1] << 8) | ret8[0]; @@ -542,66 +520,65 @@ inl(uint16_t port) } if (!found) - cycles -= io_delay; + cycles -= io_delay; io_log("[%04X:%08X] (%i, %i, %04i) in l(%04X) = %08X\n", CS, cpu_state.pc, in_smm, found, qfound, port, ret); return ret; } - void outl(uint16_t port, uint32_t val) { io_t *p, *q; - int found = 0; - int qfound = 0; - int i = 0; + int found = 0; + int qfound = 0; + int i = 0; p = io[port]; if (p) { - while(p) { - q = p->next; - if (p->outl) { - p->outl(port, val, p->priv); - found |= 4; - qfound++; - } - p = q; - } + while (p) { + q = p->next; + if (p->outl) { + p->outl(port, val, p->priv); + found |= 4; + qfound++; + } + p = q; + } } for (i = 0; i < 4; i += 2) { - p = io[(port + i) & 0xffff]; - while(p) { - q = p->next; - if (p->outw && !p->outl) { - p->outw(port + i, val >> (i << 3), p->priv); - found |= 2; - qfound++; - } - p = q; - } + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->outw && !p->outl) { + p->outw(port + i, val >> (i << 3), p->priv); + found |= 2; + qfound++; + } + p = q; + } } for (i = 0; i < 4; i++) { - p = io[(port + i) & 0xffff]; - while(p) { - q = p->next; - if (p->outb && !p->outw && !p->outl) { - p->outb(port + i, val >> (i << 3), p->priv); - found |= 1; - qfound++; - } - p = q; - } + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->outb && !p->outw && !p->outl) { + p->outb(port + i, val >> (i << 3), p->priv); + found |= 1; + qfound++; + } + p = q; + } } if (!found) { - cycles -= io_delay; + cycles -= io_delay; #ifdef USE_DYNAREC - if (cpu_use_dynarec && ((port == 0xeb) || (port == 0xed))) - update_tsc(); + if (cpu_use_dynarec && ((port == 0xeb) || (port == 0xed))) + update_tsc(); #endif } @@ -610,7 +587,6 @@ outl(uint16_t port, uint32_t val) return; } - static uint8_t io_trap_readb(uint16_t addr, void *priv) { @@ -619,7 +595,6 @@ io_trap_readb(uint16_t addr, void *priv) return 0xff; } - static uint16_t io_trap_readw(uint16_t addr, void *priv) { @@ -628,7 +603,6 @@ io_trap_readw(uint16_t addr, void *priv) return 0xffff; } - static uint32_t io_trap_readl(uint16_t addr, void *priv) { @@ -637,7 +611,6 @@ io_trap_readl(uint16_t addr, void *priv) return 0xffffffff; } - static void io_trap_writeb(uint16_t addr, uint8_t val, void *priv) { @@ -645,7 +618,6 @@ io_trap_writeb(uint16_t addr, uint8_t val, void *priv) trap->func(1, addr, 1, val, trap->priv); } - static void io_trap_writew(uint16_t addr, uint16_t val, void *priv) { @@ -653,7 +625,6 @@ io_trap_writew(uint16_t addr, uint16_t val, void *priv) trap->func(2, addr, 1, val, trap->priv); } - static void io_trap_writel(uint16_t addr, uint32_t val, void *priv) { @@ -661,61 +632,58 @@ io_trap_writel(uint16_t addr, uint32_t val, void *priv) trap->func(4, addr, 1, val, trap->priv); } - void * io_trap_add(void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv), - void *priv) + void *priv) { /* Instantiate new I/O trap. */ io_trap_t *trap = (io_trap_t *) malloc(sizeof(io_trap_t)); - trap->enable = 0; + trap->enable = 0; trap->base = trap->size = 0; - trap->func = func; - trap->priv = priv; + trap->func = func; + trap->priv = priv; return trap; } - void io_trap_remap(void *handle, int enable, uint16_t addr, uint16_t size) { io_trap_t *trap = (io_trap_t *) handle; if (!trap) - return; + return; io_log("I/O: Remapping trap from %04X-%04X (enable %d) to %04X-%04X (enable %d)\n", - trap->base, trap->base + trap->size - 1, trap->enable, addr, addr + size - 1, enable); + trap->base, trap->base + trap->size - 1, trap->enable, addr, addr + size - 1, enable); /* Remove old I/O mapping. */ if (trap->enable && trap->size) { - io_removehandler(trap->base, trap->size, - io_trap_readb, io_trap_readw, io_trap_readl, - io_trap_writeb, io_trap_writew, io_trap_writel, - trap); + io_removehandler(trap->base, trap->size, + io_trap_readb, io_trap_readw, io_trap_readl, + io_trap_writeb, io_trap_writew, io_trap_writel, + trap); } /* Set trap enable flag, base address and size. */ trap->enable = !!enable; - trap->base = addr; - trap->size = size; + trap->base = addr; + trap->size = size; /* Add new I/O mapping. */ if (trap->enable && trap->size) { - io_sethandler(trap->base, trap->size, - io_trap_readb, io_trap_readw, io_trap_readl, - io_trap_writeb, io_trap_writew, io_trap_writel, - trap); + io_sethandler(trap->base, trap->size, + io_trap_readb, io_trap_readw, io_trap_readl, + io_trap_writeb, io_trap_writew, io_trap_writel, + trap); } } - void io_trap_remove(void *handle) { io_trap_t *trap = (io_trap_t *) handle; if (!trap) - return; + return; /* Unmap I/O trap before freeing it. */ io_trap_remap(trap, 0, 0, 0); diff --git a/src/ioapic.c b/src/ioapic.c index e308b9a1c..587b3699d 100644 --- a/src/ioapic.c +++ b/src/ioapic.c @@ -28,32 +28,28 @@ #include <86box/mem.h> #include <86box/chipset.h> - typedef struct { uint8_t dummy; } ioapic_t; - #ifdef ENABLE_IOAPIC_LOG int ioapic_do_log = ENABLE_IOAPIC_LOG; - static void ioapic_log(const char *fmt, ...) { va_list ap; if (ioapic_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define ioapic_log(fmt, ...) +# define ioapic_log(fmt, ...) #endif - static void ioapic_write(uint16_t port, uint8_t val, void *priv) { @@ -61,50 +57,47 @@ ioapic_write(uint16_t port, uint8_t val, void *priv) /* target POST FF, issued by Award before jumping to the bootloader */ if (val != 0xff) - return; + return; ioapic_log("IOAPIC: Caught POST %02X\n", val); /* The _MP_ table must be located in the BIOS area, the EBDA, or the last 1k of conventional memory; at a 16-byte boundary in all cases. Award writes both tables to the BIOS area. */ for (addr = 0xf0000; addr <= 0xfffff; addr += 16) { - /* check signature for the _MP_ table (Floating Point Structure) */ - if (mem_readl_phys(addr) != 0x5f504d5f) /* ASCII "_MP_" */ - continue; + /* check signature for the _MP_ table (Floating Point Structure) */ + if (mem_readl_phys(addr) != 0x5f504d5f) /* ASCII "_MP_" */ + continue; - /* read and check pointer to the PCMP table (Configuration Table) */ - pcmp = mem_readl_phys(addr + 4); - if ((pcmp < 0xf0000) || (pcmp > 0xfffff) || (mem_readl_phys(pcmp) != 0x504d4350)) /* ASCII "PCMP" */ - continue; + /* read and check pointer to the PCMP table (Configuration Table) */ + pcmp = mem_readl_phys(addr + 4); + if ((pcmp < 0xf0000) || (pcmp > 0xfffff) || (mem_readl_phys(pcmp) != 0x504d4350)) /* ASCII "PCMP" */ + continue; - /* patch over the signature on both tables */ - ioapic_log("IOAPIC: Patching _MP_ [%08x] and PCMP [%08x] tables\n", addr, pcmp); - ram[addr] = ram[addr + 1] = ram[addr + 2] = ram[addr + 3] = 0xff; - ram[pcmp] = ram[pcmp + 1] = ram[pcmp + 2] = ram[pcmp + 3] = 0xff; + /* patch over the signature on both tables */ + ioapic_log("IOAPIC: Patching _MP_ [%08x] and PCMP [%08x] tables\n", addr, pcmp); + ram[addr] = ram[addr + 1] = ram[addr + 2] = ram[addr + 3] = 0xff; + ram[pcmp] = ram[pcmp + 1] = ram[pcmp + 2] = ram[pcmp + 3] = 0xff; - break; + break; } } - static void ioapic_reset(ioapic_t *dev) { } - static void ioapic_close(void *priv) { ioapic_t *dev = (ioapic_t *) priv; io_removehandler(0x80, 1, - NULL, NULL, NULL, ioapic_write, NULL, NULL, NULL); + NULL, NULL, NULL, ioapic_write, NULL, NULL, NULL); free(dev); } - static void * ioapic_init(const device_t *info) { @@ -114,22 +107,21 @@ ioapic_init(const device_t *info) ioapic_reset(dev); io_sethandler(0x80, 1, - NULL, NULL, NULL, ioapic_write, NULL, NULL, NULL); + NULL, NULL, NULL, ioapic_write, NULL, NULL, NULL); return dev; } - const device_t ioapic_device = { - .name = "I/O Advanced Programmable Interrupt Controller", + .name = "I/O Advanced Programmable Interrupt Controller", .internal_name = "ioapic", - .flags = DEVICE_AT, - .local = 0, - .init = ioapic_init, - .close = ioapic_close, - .reset = NULL, + .flags = DEVICE_AT, + .local = 0, + .init = ioapic_init, + .close = ioapic_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/log.c b/src/log.c index 99bab97a5..9eb80c6ad 100644 --- a/src/log.c +++ b/src/log.c @@ -34,17 +34,14 @@ #include <86box/version.h> #include <86box/log.h> - #ifndef RELEASE_BUILD typedef struct { - char buff[1024], *dev_name; - int seen, suppr_seen; + char buff[1024], *dev_name; + int seen, suppr_seen; } log_t; - -extern FILE *stdlog; /* file to log output to */ - +extern FILE *stdlog; /* file to log output to */ void log_set_suppr_seen(void *priv, int suppr_seen) @@ -54,7 +51,6 @@ log_set_suppr_seen(void *priv, int suppr_seen) log->suppr_seen = suppr_seen; } - void log_set_dev_name(void *priv, char *dev_name) { @@ -63,19 +59,17 @@ log_set_dev_name(void *priv, char *dev_name) log->dev_name = dev_name; } - static void log_copy(log_t *log, char *dest, const char *src, size_t dest_size) { memset(dest, 0x00, dest_size * sizeof(char)); if (log && log->dev_name && strcmp(log->dev_name, "")) { - strcat(dest, log->dev_name); - strcat(dest, ": "); + strcat(dest, log->dev_name); + strcat(dest, ": "); } strcat(dest, src); } - /* * Log something to the logfile or stdout. * @@ -87,50 +81,49 @@ void log_out(void *priv, const char *fmt, va_list ap) { log_t *log = (log_t *) priv; - char temp[1024], fmt2[1024]; + char temp[1024], fmt2[1024]; if (log == NULL) - return; + return; if (strcmp(fmt, "") == 0) - return; + return; if (stdlog == NULL) { - if (log_path[0] != '\0') { - stdlog = plat_fopen(log_path, "w"); - if (stdlog == NULL) - stdlog = stdout; - } else - stdlog = stdout; + if (log_path[0] != '\0') { + stdlog = plat_fopen(log_path, "w"); + if (stdlog == NULL) + stdlog = stdout; + } else + stdlog = stdout; } vsprintf(temp, fmt, ap); - if (log->suppr_seen && ! strcmp(log->buff, temp)) - log->seen++; + if (log->suppr_seen && !strcmp(log->buff, temp)) + log->seen++; else { - if (log->suppr_seen && log->seen) { - log_copy(log, fmt2, "*** %d repeats ***\n", 1024); - fprintf(stdlog, fmt2, log->seen); - } - log->seen = 0; - strcpy(log->buff, temp); - log_copy(log, fmt2, temp, 1024); - fprintf(stdlog, fmt2, ap); + if (log->suppr_seen && log->seen) { + log_copy(log, fmt2, "*** %d repeats ***\n", 1024); + fprintf(stdlog, fmt2, log->seen); + } + log->seen = 0; + strcpy(log->buff, temp); + log_copy(log, fmt2, temp, 1024); + fprintf(stdlog, fmt2, ap); } fflush(stdlog); } - void log_fatal(void *priv, const char *fmt, ...) { - log_t *log = (log_t *) priv; - char temp[1024], fmt2[1024]; + log_t *log = (log_t *) priv; + char temp[1024], fmt2[1024]; va_list ap; if (log == NULL) - return; + return; va_start(ap, fmt); log_copy(log, fmt2, fmt, 1024); @@ -140,7 +133,6 @@ log_fatal(void *priv, const char *fmt, ...) exit(-1); } - void * log_open(char *dev_name) { @@ -148,13 +140,12 @@ log_open(char *dev_name) memset(log, 0, sizeof(log_t)); - log->dev_name = dev_name; + log->dev_name = dev_name; log->suppr_seen = 1; return (void *) log; } - void log_close(void *priv) { diff --git a/src/machine_status.c b/src/machine_status.c index 1429d9295..47541d3ef 100644 --- a/src/machine_status.c +++ b/src/machine_status.c @@ -26,21 +26,22 @@ machine_status_t machine_status; void -machine_status_init() { +machine_status_init() +{ for (size_t i = 0; i < FDD_NUM; ++i) { - machine_status.fdd[i].empty = (strlen(floppyfns[i]) == 0); + machine_status.fdd[i].empty = (strlen(floppyfns[i]) == 0); machine_status.fdd[i].active = false; } for (size_t i = 0; i < CDROM_NUM; ++i) { - machine_status.cdrom[i].empty = cdrom[i].host_drive != 200 || (strlen(cdrom[i].image_path) == 0); + machine_status.cdrom[i].empty = cdrom[i].host_drive != 200 || (strlen(cdrom[i].image_path) == 0); machine_status.cdrom[i].active = false; } for (size_t i = 0; i < ZIP_NUM; i++) { - machine_status.zip[i].empty = (strlen(zip_drives[i].image_path) == 0); + machine_status.zip[i].empty = (strlen(zip_drives[i].image_path) == 0); machine_status.zip[i].active = false; } for (size_t i = 0; i < MO_NUM; i++) { - machine_status.mo[i].empty = (strlen(mo_drives[i].image_path) == 0); + machine_status.mo[i].empty = (strlen(mo_drives[i].image_path) == 0); machine_status.mo[i].active = false; } @@ -52,6 +53,6 @@ machine_status_init() { for (size_t i = 0; i < NET_CARD_MAX; i++) { machine_status.net[i].active = false; - machine_status.net[i].empty = !network_is_connected(i); + machine_status.net[i].empty = !network_is_connected(i); } } \ No newline at end of file diff --git a/src/mca.c b/src/mca.c index 4ef00318d..b48bdd2a7 100644 --- a/src/mca.c +++ b/src/mca.c @@ -5,99 +5,105 @@ #include <86box/io.h> #include <86box/mca.h> - -void (*mca_card_write[8])(int addr, uint8_t val, void *priv); -uint8_t (*mca_card_read[8])(int addr, void *priv); +void (*mca_card_write[8])(int addr, uint8_t val, void *priv); +uint8_t (*mca_card_read[8])(int addr, void *priv); uint8_t (*mca_card_feedb[8])(void *priv); -void (*mca_card_reset[8])(void *priv); -void *mca_priv[8]; +void (*mca_card_reset[8])(void *priv); +void *mca_priv[8]; static int mca_index; static int mca_nr_cards; - -void mca_init(int nr_cards) +void +mca_init(int nr_cards) { - int c; + int c; - for (c = 0; c < 8; c++) { - mca_card_read[c] = NULL; - mca_card_write[c] = NULL; - mca_card_reset[c] = NULL; - mca_priv[c] = NULL; - } + for (c = 0; c < 8; c++) { + mca_card_read[c] = NULL; + mca_card_write[c] = NULL; + mca_card_reset[c] = NULL; + mca_priv[c] = NULL; + } - mca_index = 0; - mca_nr_cards = nr_cards; + mca_index = 0; + mca_nr_cards = nr_cards; } -void mca_set_index(int index) +void +mca_set_index(int index) { - mca_index = index; + mca_index = index; } -uint8_t mca_read(uint16_t port) +uint8_t +mca_read(uint16_t port) { - if (mca_index >= mca_nr_cards) - return 0xff; - if (!mca_card_read[mca_index]) - return 0xff; - return mca_card_read[mca_index](port, mca_priv[mca_index]); + if (mca_index >= mca_nr_cards) + return 0xff; + if (!mca_card_read[mca_index]) + return 0xff; + return mca_card_read[mca_index](port, mca_priv[mca_index]); } -uint8_t mca_read_index(uint16_t port, int index) +uint8_t +mca_read_index(uint16_t port, int index) { - if (mca_index >= mca_nr_cards) - return 0xff; - if (!mca_card_read[index]) - return 0xff; - return mca_card_read[index](port, mca_priv[index]); + if (mca_index >= mca_nr_cards) + return 0xff; + if (!mca_card_read[index]) + return 0xff; + return mca_card_read[index](port, mca_priv[index]); } -int mca_get_nr_cards(void) +int +mca_get_nr_cards(void) { - return mca_nr_cards; + return mca_nr_cards; } -void mca_write(uint16_t port, uint8_t val) +void +mca_write(uint16_t port, uint8_t val) { - if (mca_index >= mca_nr_cards) - return; - if (mca_card_write[mca_index]) - mca_card_write[mca_index](port, val, mca_priv[mca_index]); + if (mca_index >= mca_nr_cards) + return; + if (mca_card_write[mca_index]) + mca_card_write[mca_index](port, val, mca_priv[mca_index]); } -uint8_t mca_feedb(void) +uint8_t +mca_feedb(void) { - if (mca_card_feedb[mca_index]) - return !!(mca_card_feedb[mca_index](mca_priv[mca_index])); - else - return 0; + if (mca_card_feedb[mca_index]) + return !!(mca_card_feedb[mca_index](mca_priv[mca_index])); + else + return 0; } -void mca_reset(void) +void +mca_reset(void) { - int c; + int c; - for (c = 0; c < 8; c++) { - if (mca_card_reset[c]) - mca_card_reset[c](mca_priv[c]); - } + for (c = 0; c < 8; c++) { + if (mca_card_reset[c]) + mca_card_reset[c](mca_priv[c]); + } } - -void mca_add(uint8_t (*read)(int addr, void *priv), void (*write)(int addr, uint8_t val, void *priv), uint8_t (*feedb)(void *priv), void (*reset)(void *priv), void *priv) +void +mca_add(uint8_t (*read)(int addr, void *priv), void (*write)(int addr, uint8_t val, void *priv), uint8_t (*feedb)(void *priv), void (*reset)(void *priv), void *priv) { - int c; + int c; - for (c = 0; c < mca_nr_cards; c++) { - if (!mca_card_read[c] && !mca_card_write[c]) { - mca_card_read[c] = read; - mca_card_write[c] = write; - mca_card_feedb[c] = feedb; - mca_card_reset[c] = reset; - mca_priv[c] = priv; - return; - } - } + for (c = 0; c < mca_nr_cards; c++) { + if (!mca_card_read[c] && !mca_card_write[c]) { + mca_card_read[c] = read; + mca_card_write[c] = write; + mca_card_feedb[c] = feedb; + mca_card_reset[c] = reset; + mca_priv[c] = priv; + return; + } + } } diff --git a/src/nmi.c b/src/nmi.c index 1e820a82a..4fde00765 100644 --- a/src/nmi.c +++ b/src/nmi.c @@ -8,18 +8,17 @@ #include <86box/io.h> #include <86box/nmi.h> - int nmi_mask; - -void nmi_write(uint16_t port, uint8_t val, void *p) +void +nmi_write(uint16_t port, uint8_t val, void *p) { - nmi_mask = val & 0x80; + nmi_mask = val & 0x80; } - -void nmi_init(void) +void +nmi_init(void) { - io_sethandler(0x00a0, 0x000f, NULL, NULL, NULL, nmi_write, NULL, NULL, NULL); - nmi_mask = 0; + io_sethandler(0x00a0, 0x000f, NULL, NULL, NULL, nmi_write, NULL, NULL, NULL); + nmi_mask = 0; } diff --git a/src/nvr.c b/src/nvr.c index a68331e34..eb5a1e49d 100644 --- a/src/nvr.c +++ b/src/nvr.c @@ -62,107 +62,100 @@ #include <86box/plat.h> #include <86box/nvr.h> +int nvr_dosave; /* NVR is dirty, needs saved */ -int nvr_dosave; /* NVR is dirty, needs saved */ - - -static int8_t days_in_month[12] = { 31,28,31,30,31,30,31,31,30,31,30,31 }; +static int8_t days_in_month[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; static struct tm intclk; -static nvr_t *saved_nvr = NULL; - +static nvr_t *saved_nvr = NULL; #ifdef ENABLE_NVR_LOG int nvr_do_log = ENABLE_NVR_LOG; - static void nvr_log(const char *fmt, ...) { va_list ap; if (nvr_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define nvr_log(fmt, ...) +# define nvr_log(fmt, ...) #endif - /* Determine whether or not the year is leap. */ int nvr_is_leap(int year) { - if (year % 400 == 0) return(1); - if (year % 100 == 0) return(0); - if (year % 4 == 0) return(1); + if (year % 400 == 0) + return (1); + if (year % 100 == 0) + return (0); + if (year % 4 == 0) + return (1); - return(0); + return (0); } - /* Determine the days in the current month. */ int nvr_get_days(int month, int year) { if (month != 2) - return(days_in_month[month - 1]); + return (days_in_month[month - 1]); - return(nvr_is_leap(year) ? 29 : 28); + return (nvr_is_leap(year) ? 29 : 28); } - /* One more second has passed, update the internal clock. */ void rtc_tick(void) { /* Ping the internal clock. */ if (++intclk.tm_sec == 60) { - intclk.tm_sec = 0; - if (++intclk.tm_min == 60) { - intclk.tm_min = 0; - if (++intclk.tm_hour == 24) { - intclk.tm_hour = 0; - if (++intclk.tm_mday == (nvr_get_days(intclk.tm_mon, - intclk.tm_year) + 1)) { - intclk.tm_mday = 1; - if (++intclk.tm_mon == 13) { - intclk.tm_mon = 1; - intclk.tm_year++; - } - } - } - } + intclk.tm_sec = 0; + if (++intclk.tm_min == 60) { + intclk.tm_min = 0; + if (++intclk.tm_hour == 24) { + intclk.tm_hour = 0; + if (++intclk.tm_mday == (nvr_get_days(intclk.tm_mon, intclk.tm_year) + 1)) { + intclk.tm_mday = 1; + if (++intclk.tm_mon == 13) { + intclk.tm_mon = 1; + intclk.tm_year++; + } + } + } + } } } - /* This is the RTC one-second timer. */ static void onesec_timer(void *priv) { - nvr_t *nvr = (nvr_t *)priv; - int is_at; + nvr_t *nvr = (nvr_t *) priv; + int is_at; if (++nvr->onesec_cnt >= 100) { - /* Update the internal clock. */ - is_at = IS_AT(machine); - if (!is_at) - rtc_tick(); + /* Update the internal clock. */ + is_at = IS_AT(machine); + if (!is_at) + rtc_tick(); - /* Update the RTC device if needed. */ - if (nvr->tick != NULL) - (*nvr->tick)(nvr); + /* Update the RTC device if needed. */ + if (nvr->tick != NULL) + (*nvr->tick)(nvr); - nvr->onesec_cnt = 0; + nvr->onesec_cnt = 0; } - timer_advance_u64(&nvr->onesec_time, (uint64_t)(10000ULL * TIMER_USEC)); + timer_advance_u64(&nvr->onesec_time, (uint64_t) (10000ULL * TIMER_USEC)); } - /* Initialize the generic NVRAM/RTC device. */ void nvr_init(nvr_t *nvr) @@ -170,18 +163,18 @@ nvr_init(nvr_t *nvr) int c; /* Set up the NVR file's name. */ - c = strlen(machine_get_internal_name()) + 5; - nvr->fn = (char *)malloc(c + 1); + c = strlen(machine_get_internal_name()) + 5; + nvr->fn = (char *) malloc(c + 1); sprintf(nvr->fn, "%s.nvr", machine_get_internal_name()); /* Initialize the internal clock as needed. */ memset(&intclk, 0x00, sizeof(intclk)); if (time_sync & TIME_SYNC_ENABLED) { - nvr_time_sync(); + nvr_time_sync(); } else { - /* Reset the internal clock to 1980/01/01 00:00. */ - intclk.tm_mon = 1; - intclk.tm_year = 1980; + /* Reset the internal clock to 1980/01/01 00:00. */ + intclk.tm_mon = 1; + intclk.tm_year = 1980; } /* Set up our timer. */ @@ -194,10 +187,9 @@ nvr_init(nvr_t *nvr) saved_nvr = nvr; /* Try to load the saved data. */ - (void)nvr_load(); + (void) nvr_load(); } - /* Get path to the NVR folder. */ char * nvr_path(char *str) @@ -210,17 +202,16 @@ nvr_path(char *str) strcat(temp, NVR_PATH); /* Create the directory if needed. */ - if (! plat_dir_check(temp)) - plat_dir_create(temp); + if (!plat_dir_check(temp)) + plat_dir_create(temp); /* Now append the actual filename. */ path_slash(temp); strcat(temp, str); - return(temp); + return (temp); } - /* * Load an NVR from file. * @@ -235,53 +226,52 @@ nvr_path(char *str) int nvr_load(void) { - char *path; - FILE *fp; - uint8_t regs[NVR_MAXSIZE] = { 0 }; + char *path; + FILE *fp; + uint8_t regs[NVR_MAXSIZE] = { 0 }; /* Make sure we have been initialized. */ - if (saved_nvr == NULL) return(0); + if (saved_nvr == NULL) + return (0); /* Clear out any old data. */ memset(saved_nvr->regs, 0x00, sizeof(saved_nvr->regs)); /* Set the defaults. */ if (saved_nvr->reset != NULL) - saved_nvr->reset(saved_nvr); + saved_nvr->reset(saved_nvr); /* Load the (relevant) part of the NVR contents. */ if (saved_nvr->size != 0) { - path = nvr_path(saved_nvr->fn); - nvr_log("NVR: loading from '%s'\n", path); - fp = plat_fopen(path, "rb"); - saved_nvr->is_new = (fp == NULL); - if (fp != NULL) { - memcpy(regs, saved_nvr->regs, sizeof(regs)); - /* Read NVR contents from file. */ - if (fread(saved_nvr->regs, 1, saved_nvr->size, fp) != saved_nvr->size) { - memcpy(saved_nvr->regs, regs, sizeof(regs)); - saved_nvr->is_new = 1; + path = nvr_path(saved_nvr->fn); + nvr_log("NVR: loading from '%s'\n", path); + fp = plat_fopen(path, "rb"); + saved_nvr->is_new = (fp == NULL); + if (fp != NULL) { + memcpy(regs, saved_nvr->regs, sizeof(regs)); + /* Read NVR contents from file. */ + if (fread(saved_nvr->regs, 1, saved_nvr->size, fp) != saved_nvr->size) { + memcpy(saved_nvr->regs, regs, sizeof(regs)); + saved_nvr->is_new = 1; + } + (void) fclose(fp); } - (void)fclose(fp); - } } else - saved_nvr->is_new = 1; + saved_nvr->is_new = 1; /* Get the local RTC running! */ if (saved_nvr->start != NULL) - saved_nvr->start(saved_nvr); + saved_nvr->start(saved_nvr); - return(1); + return (1); } - void nvr_set_ven_save(void (*ven_save)(void)) { saved_nvr->ven_save = ven_save; } - /* Save the current NVR to a file. */ int nvr_save(void) @@ -290,94 +280,90 @@ nvr_save(void) FILE *fp; /* Make sure we have been initialized. */ - if (saved_nvr == NULL) return(0); + if (saved_nvr == NULL) + return (0); if (saved_nvr->size != 0) { - path = nvr_path(saved_nvr->fn); - nvr_log("NVR: saving to '%s'\n", path); - fp = plat_fopen(path, "wb"); - if (fp != NULL) { - /* Save NVR contents to file. */ - (void)fwrite(saved_nvr->regs, saved_nvr->size, 1, fp); - fclose(fp); - } + path = nvr_path(saved_nvr->fn); + nvr_log("NVR: saving to '%s'\n", path); + fp = plat_fopen(path, "wb"); + if (fp != NULL) { + /* Save NVR contents to file. */ + (void) fwrite(saved_nvr->regs, saved_nvr->size, 1, fp); + fclose(fp); + } } if (saved_nvr->ven_save) - saved_nvr->ven_save(); + saved_nvr->ven_save(); /* Device is clean again. */ nvr_dosave = 0; - return(1); + return (1); } - void nvr_close(void) { saved_nvr = NULL; } - void nvr_time_sync(void) { struct tm *tm; - time_t now; + time_t now; /* Get the current time of day, and convert to local time. */ - (void)time(&now); - if(time_sync & TIME_SYNC_UTC) - tm = gmtime(&now); + (void) time(&now); + if (time_sync & TIME_SYNC_UTC) + tm = gmtime(&now); else - tm = localtime(&now); + tm = localtime(&now); /* Set the internal clock. */ nvr_time_set(tm); } - /* Get current time from internal clock. */ void nvr_time_get(struct tm *tm) { - uint8_t dom, mon, sum, wd; + uint8_t dom, mon, sum, wd; uint16_t cent, yr; - tm->tm_sec = intclk.tm_sec; - tm->tm_min = intclk.tm_min; + tm->tm_sec = intclk.tm_sec; + tm->tm_min = intclk.tm_min; tm->tm_hour = intclk.tm_hour; - dom = intclk.tm_mday; - mon = intclk.tm_mon; - yr = (intclk.tm_year % 100); - cent = ((intclk.tm_year - yr) / 100) % 4; - sum = dom+mon+yr+cent; - wd = ((sum + 6) % 7); + dom = intclk.tm_mday; + mon = intclk.tm_mon; + yr = (intclk.tm_year % 100); + cent = ((intclk.tm_year - yr) / 100) % 4; + sum = dom + mon + yr + cent; + wd = ((sum + 6) % 7); tm->tm_wday = wd; tm->tm_mday = intclk.tm_mday; - tm->tm_mon = (intclk.tm_mon - 1); + tm->tm_mon = (intclk.tm_mon - 1); tm->tm_year = (intclk.tm_year - 1900); } - /* Set internal clock time. */ void nvr_time_set(struct tm *tm) { - intclk.tm_sec = tm->tm_sec; - intclk.tm_min = tm->tm_min; + intclk.tm_sec = tm->tm_sec; + intclk.tm_min = tm->tm_min; intclk.tm_hour = tm->tm_hour; intclk.tm_wday = tm->tm_wday; intclk.tm_mday = tm->tm_mday; - intclk.tm_mon = (tm->tm_mon + 1); + intclk.tm_mon = (tm->tm_mon + 1); intclk.tm_year = (tm->tm_year + 1900); } - /* Open or create a file in the NVR area. */ FILE * nvr_fopen(char *str, char *mode) { - return(plat_fopen(nvr_path(str), mode)); + return (plat_fopen(nvr_path(str), mode)); } diff --git a/src/nvr_at.c b/src/nvr_at.c index eb749ff49..91ee4a949 100644 --- a/src/nvr_at.c +++ b/src/nvr_at.c @@ -238,588 +238,570 @@ #include <86box/device.h> #include <86box/nvr.h> - /* RTC registers and bit definitions. */ -#define RTC_SECONDS 0 -#define RTC_ALSECONDS 1 -# define AL_DONTCARE 0xc0 /* Alarm time is not set */ -#define RTC_MINUTES 2 -#define RTC_ALMINUTES 3 -#define RTC_HOURS 4 -# define RTC_AMPM 0x80 /* PM flag if 12h format in use */ -#define RTC_ALHOURS 5 -#define RTC_DOW 6 -#define RTC_DOM 7 -#define RTC_MONTH 8 -#define RTC_YEAR 9 -#define RTC_REGA 10 -# define REGA_UIP 0x80 -# define REGA_DV2 0x40 -# define REGA_DV1 0x20 -# define REGA_DV0 0x10 -# define REGA_DV 0x70 -# define REGA_RS3 0x08 -# define REGA_RS2 0x04 -# define REGA_RS1 0x02 -# define REGA_RS0 0x01 -# define REGA_RS 0x0f -#define RTC_REGB 11 -# define REGB_SET 0x80 -# define REGB_PIE 0x40 -# define REGB_AIE 0x20 -# define REGB_UIE 0x10 -# define REGB_SQWE 0x08 -# define REGB_DM 0x04 -# define REGB_2412 0x02 -# define REGB_DSE 0x01 -#define RTC_REGC 12 -# define REGC_IRQF 0x80 -# define REGC_PF 0x40 -# define REGC_AF 0x20 -# define REGC_UF 0x10 -#define RTC_REGD 13 -# define REGD_VRT 0x80 -#define RTC_CENTURY_AT 0x32 /* century register for AT etc */ -#define RTC_CENTURY_PS 0x37 /* century register for PS/1 PS/2 */ -#define RTC_ALDAY 0x7D /* VIA VT82C586B - alarm day */ -#define RTC_ALMONTH 0x7E /* VIA VT82C586B - alarm month */ -#define RTC_CENTURY_VIA 0x7F /* century register for VIA VT82C586B */ +#define RTC_SECONDS 0 +#define RTC_ALSECONDS 1 +#define AL_DONTCARE 0xc0 /* Alarm time is not set */ +#define RTC_MINUTES 2 +#define RTC_ALMINUTES 3 +#define RTC_HOURS 4 +#define RTC_AMPM 0x80 /* PM flag if 12h format in use */ +#define RTC_ALHOURS 5 +#define RTC_DOW 6 +#define RTC_DOM 7 +#define RTC_MONTH 8 +#define RTC_YEAR 9 +#define RTC_REGA 10 +#define REGA_UIP 0x80 +#define REGA_DV2 0x40 +#define REGA_DV1 0x20 +#define REGA_DV0 0x10 +#define REGA_DV 0x70 +#define REGA_RS3 0x08 +#define REGA_RS2 0x04 +#define REGA_RS1 0x02 +#define REGA_RS0 0x01 +#define REGA_RS 0x0f +#define RTC_REGB 11 +#define REGB_SET 0x80 +#define REGB_PIE 0x40 +#define REGB_AIE 0x20 +#define REGB_UIE 0x10 +#define REGB_SQWE 0x08 +#define REGB_DM 0x04 +#define REGB_2412 0x02 +#define REGB_DSE 0x01 +#define RTC_REGC 12 +#define REGC_IRQF 0x80 +#define REGC_PF 0x40 +#define REGC_AF 0x20 +#define REGC_UF 0x10 +#define RTC_REGD 13 +#define REGD_VRT 0x80 +#define RTC_CENTURY_AT 0x32 /* century register for AT etc */ +#define RTC_CENTURY_PS 0x37 /* century register for PS/1 PS/2 */ +#define RTC_ALDAY 0x7D /* VIA VT82C586B - alarm day */ +#define RTC_ALMONTH 0x7E /* VIA VT82C586B - alarm month */ +#define RTC_CENTURY_VIA 0x7F /* century register for VIA VT82C586B */ -#define RTC_ALDAY_SIS 0x7E /* Day of Month Alarm for SiS */ -#define RTC_ALMONT_SIS 0x7F /* Month Alarm for SiS */ +#define RTC_ALDAY_SIS 0x7E /* Day of Month Alarm for SiS */ +#define RTC_ALMONT_SIS 0x7F /* Month Alarm for SiS */ -#define RTC_REGS 14 /* number of registers */ - -#define FLAG_NO_NMI 0x01 -#define FLAG_AMI_1992_HACK 0x02 -#define FLAG_AMI_1994_HACK 0x04 -#define FLAG_AMI_1995_HACK 0x08 -#define FLAG_P6RP4_HACK 0x10 -#define FLAG_PIIX4 0x20 +#define RTC_REGS 14 /* number of registers */ +#define FLAG_NO_NMI 0x01 +#define FLAG_AMI_1992_HACK 0x02 +#define FLAG_AMI_1994_HACK 0x04 +#define FLAG_AMI_1995_HACK 0x08 +#define FLAG_P6RP4_HACK 0x10 +#define FLAG_PIIX4 0x20 typedef struct { - int8_t stat; + int8_t stat; - uint8_t cent, def, - flags, read_addr, - wp_0d, wp_32, - pad, pad0; + uint8_t cent, def, + flags, read_addr, + wp_0d, wp_32, + pad, pad0; - uint8_t addr[8], wp[2], - bank[8], *lock; + uint8_t addr[8], wp[2], + bank[8], *lock; - int16_t count, state; + int16_t count, state; - uint64_t ecount, - rtc_time; - pc_timer_t update_timer, - rtc_timer; + uint64_t ecount, + rtc_time; + pc_timer_t update_timer, + rtc_timer; } local_t; - -static uint8_t nvr_at_inited = 0; - +static uint8_t nvr_at_inited = 0; /* Get the current NVR time. */ static void time_get(nvr_t *nvr, struct tm *tm) { - local_t *local = (local_t *)nvr->data; - int8_t temp; + local_t *local = (local_t *) nvr->data; + int8_t temp; if (nvr->regs[RTC_REGB] & REGB_DM) { - /* NVR is in Binary data mode. */ - tm->tm_sec = nvr->regs[RTC_SECONDS]; - tm->tm_min = nvr->regs[RTC_MINUTES]; - temp = nvr->regs[RTC_HOURS]; - tm->tm_wday = (nvr->regs[RTC_DOW] - 1); - tm->tm_mday = nvr->regs[RTC_DOM]; - tm->tm_mon = (nvr->regs[RTC_MONTH] - 1); - tm->tm_year = nvr->regs[RTC_YEAR]; - if (local->cent != 0xFF) - tm->tm_year += (nvr->regs[local->cent] * 100) - 1900; + /* NVR is in Binary data mode. */ + tm->tm_sec = nvr->regs[RTC_SECONDS]; + tm->tm_min = nvr->regs[RTC_MINUTES]; + temp = nvr->regs[RTC_HOURS]; + tm->tm_wday = (nvr->regs[RTC_DOW] - 1); + tm->tm_mday = nvr->regs[RTC_DOM]; + tm->tm_mon = (nvr->regs[RTC_MONTH] - 1); + tm->tm_year = nvr->regs[RTC_YEAR]; + if (local->cent != 0xFF) + tm->tm_year += (nvr->regs[local->cent] * 100) - 1900; } else { - /* NVR is in BCD data mode. */ - tm->tm_sec = RTC_DCB(nvr->regs[RTC_SECONDS]); - tm->tm_min = RTC_DCB(nvr->regs[RTC_MINUTES]); - temp = RTC_DCB(nvr->regs[RTC_HOURS]); - tm->tm_wday = (RTC_DCB(nvr->regs[RTC_DOW]) - 1); - tm->tm_mday = RTC_DCB(nvr->regs[RTC_DOM]); - tm->tm_mon = (RTC_DCB(nvr->regs[RTC_MONTH]) - 1); - tm->tm_year = RTC_DCB(nvr->regs[RTC_YEAR]); - if (local->cent != 0xFF) - tm->tm_year += (RTC_DCB(nvr->regs[local->cent]) * 100) - 1900; + /* NVR is in BCD data mode. */ + tm->tm_sec = RTC_DCB(nvr->regs[RTC_SECONDS]); + tm->tm_min = RTC_DCB(nvr->regs[RTC_MINUTES]); + temp = RTC_DCB(nvr->regs[RTC_HOURS]); + tm->tm_wday = (RTC_DCB(nvr->regs[RTC_DOW]) - 1); + tm->tm_mday = RTC_DCB(nvr->regs[RTC_DOM]); + tm->tm_mon = (RTC_DCB(nvr->regs[RTC_MONTH]) - 1); + tm->tm_year = RTC_DCB(nvr->regs[RTC_YEAR]); + if (local->cent != 0xFF) + tm->tm_year += (RTC_DCB(nvr->regs[local->cent]) * 100) - 1900; } /* Adjust for 12/24 hour mode. */ if (nvr->regs[RTC_REGB] & REGB_2412) - tm->tm_hour = temp; - else - tm->tm_hour = ((temp & ~RTC_AMPM)%12) + ((temp&RTC_AMPM) ? 12 : 0); + tm->tm_hour = temp; + else + tm->tm_hour = ((temp & ~RTC_AMPM) % 12) + ((temp & RTC_AMPM) ? 12 : 0); } - /* Set the current NVR time. */ static void time_set(nvr_t *nvr, struct tm *tm) { - local_t *local = (local_t *)nvr->data; - int year = (tm->tm_year + 1900); + local_t *local = (local_t *) nvr->data; + int year = (tm->tm_year + 1900); if (nvr->regs[RTC_REGB] & REGB_DM) { - /* NVR is in Binary data mode. */ - nvr->regs[RTC_SECONDS] = tm->tm_sec; - nvr->regs[RTC_MINUTES] = tm->tm_min; - nvr->regs[RTC_DOW] = (tm->tm_wday + 1); - nvr->regs[RTC_DOM] = tm->tm_mday; - nvr->regs[RTC_MONTH] = (tm->tm_mon + 1); - nvr->regs[RTC_YEAR] = (year % 100); - if (local->cent != 0xFF) - nvr->regs[local->cent] = (year / 100); + /* NVR is in Binary data mode. */ + nvr->regs[RTC_SECONDS] = tm->tm_sec; + nvr->regs[RTC_MINUTES] = tm->tm_min; + nvr->regs[RTC_DOW] = (tm->tm_wday + 1); + nvr->regs[RTC_DOM] = tm->tm_mday; + nvr->regs[RTC_MONTH] = (tm->tm_mon + 1); + nvr->regs[RTC_YEAR] = (year % 100); + if (local->cent != 0xFF) + nvr->regs[local->cent] = (year / 100); - if (nvr->regs[RTC_REGB] & REGB_2412) { - /* NVR is in 24h mode. */ - nvr->regs[RTC_HOURS] = tm->tm_hour; - } else { - /* NVR is in 12h mode. */ - nvr->regs[RTC_HOURS] = (tm->tm_hour % 12) ? (tm->tm_hour % 12) : 12; - if (tm->tm_hour > 11) - nvr->regs[RTC_HOURS] |= RTC_AMPM; - } + if (nvr->regs[RTC_REGB] & REGB_2412) { + /* NVR is in 24h mode. */ + nvr->regs[RTC_HOURS] = tm->tm_hour; + } else { + /* NVR is in 12h mode. */ + nvr->regs[RTC_HOURS] = (tm->tm_hour % 12) ? (tm->tm_hour % 12) : 12; + if (tm->tm_hour > 11) + nvr->regs[RTC_HOURS] |= RTC_AMPM; + } } else { - /* NVR is in BCD data mode. */ - nvr->regs[RTC_SECONDS] = RTC_BCD(tm->tm_sec); - nvr->regs[RTC_MINUTES] = RTC_BCD(tm->tm_min); - nvr->regs[RTC_DOW] = RTC_BCD(tm->tm_wday + 1); - nvr->regs[RTC_DOM] = RTC_BCD(tm->tm_mday); - nvr->regs[RTC_MONTH] = RTC_BCD(tm->tm_mon + 1); - nvr->regs[RTC_YEAR] = RTC_BCD(year % 100); - if (local->cent != 0xFF) - nvr->regs[local->cent] = RTC_BCD(year / 100); + /* NVR is in BCD data mode. */ + nvr->regs[RTC_SECONDS] = RTC_BCD(tm->tm_sec); + nvr->regs[RTC_MINUTES] = RTC_BCD(tm->tm_min); + nvr->regs[RTC_DOW] = RTC_BCD(tm->tm_wday + 1); + nvr->regs[RTC_DOM] = RTC_BCD(tm->tm_mday); + nvr->regs[RTC_MONTH] = RTC_BCD(tm->tm_mon + 1); + nvr->regs[RTC_YEAR] = RTC_BCD(year % 100); + if (local->cent != 0xFF) + nvr->regs[local->cent] = RTC_BCD(year / 100); - if (nvr->regs[RTC_REGB] & REGB_2412) { - /* NVR is in 24h mode. */ - nvr->regs[RTC_HOURS] = RTC_BCD(tm->tm_hour); - } else { - /* NVR is in 12h mode. */ - nvr->regs[RTC_HOURS] = (tm->tm_hour % 12) - ? RTC_BCD(tm->tm_hour % 12) - : RTC_BCD(12); - if (tm->tm_hour > 11) - nvr->regs[RTC_HOURS] |= RTC_AMPM; - } + if (nvr->regs[RTC_REGB] & REGB_2412) { + /* NVR is in 24h mode. */ + nvr->regs[RTC_HOURS] = RTC_BCD(tm->tm_hour); + } else { + /* NVR is in 12h mode. */ + nvr->regs[RTC_HOURS] = (tm->tm_hour % 12) + ? RTC_BCD(tm->tm_hour % 12) + : RTC_BCD(12); + if (tm->tm_hour > 11) + nvr->regs[RTC_HOURS] |= RTC_AMPM; + } } } - /* Check if the current time matches a set alarm time. */ static int8_t check_alarm(nvr_t *nvr, int8_t addr) { - return((nvr->regs[addr+1] == nvr->regs[addr]) || - ((nvr->regs[addr+1] & AL_DONTCARE) == AL_DONTCARE)); + return ((nvr->regs[addr + 1] == nvr->regs[addr]) || ((nvr->regs[addr + 1] & AL_DONTCARE) == AL_DONTCARE)); } - /* Check for VIA stuff. */ static int8_t check_alarm_via(nvr_t *nvr, int8_t addr, int8_t addr_2) { - local_t *local = (local_t *)nvr->data; + local_t *local = (local_t *) nvr->data; if (local->cent == RTC_CENTURY_VIA) { - return((nvr->regs[addr_2] == nvr->regs[addr]) || - ((nvr->regs[addr_2] & AL_DONTCARE) == AL_DONTCARE)); + return ((nvr->regs[addr_2] == nvr->regs[addr]) || ((nvr->regs[addr_2] & AL_DONTCARE) == AL_DONTCARE)); } else - return 1; + return 1; } - /* Update the NVR registers from the internal clock. */ static void timer_update(void *priv) { - nvr_t *nvr = (nvr_t *)priv; - local_t *local = (local_t *)nvr->data; + nvr_t *nvr = (nvr_t *) priv; + local_t *local = (local_t *) nvr->data; struct tm tm; local->ecount = 0LL; - if (! (nvr->regs[RTC_REGB] & REGB_SET)) { - /* Get the current time from the internal clock. */ - nvr_time_get(&tm); + if (!(nvr->regs[RTC_REGB] & REGB_SET)) { + /* Get the current time from the internal clock. */ + nvr_time_get(&tm); - /* Update registers with current time. */ - time_set(nvr, &tm); + /* Update registers with current time. */ + time_set(nvr, &tm); - /* Clear update status. */ - local->stat = 0x00; + /* Clear update status. */ + local->stat = 0x00; - /* Check for any alarms we need to handle. */ - if (check_alarm(nvr, RTC_SECONDS) && - check_alarm(nvr, RTC_MINUTES) && - check_alarm(nvr, RTC_HOURS) && - check_alarm_via(nvr, RTC_DOM, RTC_ALDAY) && - check_alarm_via(nvr, RTC_MONTH, RTC_ALMONTH)/* && - check_alarm_via(nvr, RTC_DOM, RTC_ALDAY_SIS) && - check_alarm_via(nvr, RTC_MONTH, RTC_ALMONT_SIS)*/) { - nvr->regs[RTC_REGC] |= REGC_AF; - if (nvr->regs[RTC_REGB] & REGB_AIE) { - /* Generate an interrupt. */ - if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) { - picintlevel(1 << nvr->irq); - nvr->regs[RTC_REGC] |= REGC_IRQF; - } - } - } + /* Check for any alarms we need to handle. */ + if (check_alarm(nvr, RTC_SECONDS) && check_alarm(nvr, RTC_MINUTES) && check_alarm(nvr, RTC_HOURS) && check_alarm_via(nvr, RTC_DOM, RTC_ALDAY) && check_alarm_via(nvr, RTC_MONTH, RTC_ALMONTH) /* && + check_alarm_via(nvr, RTC_DOM, RTC_ALDAY_SIS) && + check_alarm_via(nvr, RTC_MONTH, RTC_ALMONT_SIS)*/ + ) { + nvr->regs[RTC_REGC] |= REGC_AF; + if (nvr->regs[RTC_REGB] & REGB_AIE) { + /* Generate an interrupt. */ + if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) { + picintlevel(1 << nvr->irq); + nvr->regs[RTC_REGC] |= REGC_IRQF; + } + } + } - /* - * The flag and interrupt should be issued - * on update ended, not started. - */ - nvr->regs[RTC_REGC] |= REGC_UF; - if (nvr->regs[RTC_REGB] & REGB_UIE) { - /* Generate an interrupt. */ - if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) { - picintlevel(1 << nvr->irq); - nvr->regs[RTC_REGC] |= REGC_IRQF; - } - } + /* + * The flag and interrupt should be issued + * on update ended, not started. + */ + nvr->regs[RTC_REGC] |= REGC_UF; + if (nvr->regs[RTC_REGB] & REGB_UIE) { + /* Generate an interrupt. */ + if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) { + picintlevel(1 << nvr->irq); + nvr->regs[RTC_REGC] |= REGC_IRQF; + } + } } } - static void timer_load_count(nvr_t *nvr) { - int c = nvr->regs[RTC_REGA] & REGA_RS; + int c = nvr->regs[RTC_REGA] & REGA_RS; local_t *local = (local_t *) nvr->data; timer_disable(&local->rtc_timer); if ((nvr->regs[RTC_REGA] & 0x70) != 0x20) { - local->state = 0; - return; + local->state = 0; + return; } local->state = 1; switch (c) { - case 0: - local->state = 0; - break; - case 1: case 2: - local->count = 1 << (c + 6); - timer_set_delay_u64(&local->rtc_timer, (local->count) * RTCCONST); - break; - default: - local->count = 1 << (c - 1); - timer_set_delay_u64(&local->rtc_timer, (local->count) * RTCCONST); - break; + case 0: + local->state = 0; + break; + case 1: + case 2: + local->count = 1 << (c + 6); + timer_set_delay_u64(&local->rtc_timer, (local->count) * RTCCONST); + break; + default: + local->count = 1 << (c - 1); + timer_set_delay_u64(&local->rtc_timer, (local->count) * RTCCONST); + break; } } - static void timer_intr(void *priv) { - nvr_t *nvr = (nvr_t *)priv; - local_t *local = (local_t *)nvr->data; + nvr_t *nvr = (nvr_t *) priv; + local_t *local = (local_t *) nvr->data; if (local->state == 1) { - timer_load_count(nvr); + timer_load_count(nvr); - nvr->regs[RTC_REGC] |= REGC_PF; - if (nvr->regs[RTC_REGB] & REGB_PIE) { - /* Generate an interrupt. */ - if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) { - picintlevel(1 << nvr->irq); - nvr->regs[RTC_REGC] |= REGC_IRQF; - } - } + nvr->regs[RTC_REGC] |= REGC_PF; + if (nvr->regs[RTC_REGB] & REGB_PIE) { + /* Generate an interrupt. */ + if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) { + picintlevel(1 << nvr->irq); + nvr->regs[RTC_REGC] |= REGC_IRQF; + } + } } } - /* Callback from internal clock, another second passed. */ static void timer_tick(nvr_t *nvr) { - local_t *local = (local_t *)nvr->data; + local_t *local = (local_t *) nvr->data; /* Only update it there is no SET in progress. */ - if (! (nvr->regs[RTC_REGB] & REGB_SET)) { - /* Set the UIP bit, announcing the update. */ - local->stat = REGA_UIP; + if (!(nvr->regs[RTC_REGB] & REGB_SET)) { + /* Set the UIP bit, announcing the update. */ + local->stat = REGA_UIP; - rtc_tick(); + rtc_tick(); - /* Schedule the actual update. */ - local->ecount = (244ULL + 1984ULL) * TIMER_USEC; - timer_set_delay_u64(&local->update_timer, local->ecount); + /* Schedule the actual update. */ + local->ecount = (244ULL + 1984ULL) * TIMER_USEC; + timer_set_delay_u64(&local->update_timer, local->ecount); } } - static void nvr_reg_common_write(uint16_t reg, uint8_t val, nvr_t *nvr, local_t *local) { if ((reg == 0x2c) && (local->flags & FLAG_AMI_1994_HACK)) - nvr->is_new = 0; + nvr->is_new = 0; if ((reg == 0x2d) && (local->flags & FLAG_AMI_1992_HACK)) - nvr->is_new = 0; + nvr->is_new = 0; if ((reg == 0x52) && (local->flags & FLAG_AMI_1995_HACK)) - nvr->is_new = 0; + nvr->is_new = 0; if ((reg >= 0x38) && (reg <= 0x3f) && local->wp[0]) - return; + return; if ((reg >= 0xb8) && (reg <= 0xbf) && local->wp[1]) - return; + return; if (local->lock[reg]) - return; + return; if (nvr->regs[reg] != val) { - nvr->regs[reg] = val; - nvr_dosave = 1; + nvr->regs[reg] = val; + nvr_dosave = 1; } } - /* This must be exposed because ACPI uses it. */ void nvr_reg_write(uint16_t reg, uint8_t val, void *priv) { - nvr_t *nvr = (nvr_t *)priv; - local_t *local = (local_t *)nvr->data; + nvr_t *nvr = (nvr_t *) priv; + local_t *local = (local_t *) nvr->data; struct tm tm; - uint8_t old; - uint8_t irq = 0, old_irq = 0; + uint8_t old; + uint8_t irq = 0, old_irq = 0; old = nvr->regs[reg]; - switch(reg) { - case RTC_REGA: - nvr->regs[RTC_REGA] = val; - timer_load_count(nvr); - break; + switch (reg) { + case RTC_REGA: + nvr->regs[RTC_REGA] = val; + timer_load_count(nvr); + break; - case RTC_REGB: - old_irq = (nvr->regs[RTC_REGB] & nvr->regs[RTC_REGC]) & 0x70; - nvr->regs[RTC_REGB] = val; - if (((old^val) & REGB_SET) && (val & REGB_SET)) { - /* According to the datasheet... */ - nvr->regs[RTC_REGA] &= ~REGA_UIP; - nvr->regs[RTC_REGB] &= ~REGB_UIE; - } - irq = (nvr->regs[RTC_REGB] & nvr->regs[RTC_REGC]) & 0x70; - if (old_irq && !irq) { - picintc(1 << nvr->irq); - nvr->regs[RTC_REGC] &= ~REGC_IRQF; - } else if (!old_irq && irq) { - picintlevel(1 << nvr->irq); - nvr->regs[RTC_REGC] |= REGC_IRQF; - } - break; + case RTC_REGB: + old_irq = (nvr->regs[RTC_REGB] & nvr->regs[RTC_REGC]) & 0x70; + nvr->regs[RTC_REGB] = val; + if (((old ^ val) & REGB_SET) && (val & REGB_SET)) { + /* According to the datasheet... */ + nvr->regs[RTC_REGA] &= ~REGA_UIP; + nvr->regs[RTC_REGB] &= ~REGB_UIE; + } + irq = (nvr->regs[RTC_REGB] & nvr->regs[RTC_REGC]) & 0x70; + if (old_irq && !irq) { + picintc(1 << nvr->irq); + nvr->regs[RTC_REGC] &= ~REGC_IRQF; + } else if (!old_irq && irq) { + picintlevel(1 << nvr->irq); + nvr->regs[RTC_REGC] |= REGC_IRQF; + } + break; - case RTC_REGC: /* R/O */ - break; + case RTC_REGC: /* R/O */ + break; - case RTC_REGD: /* R/O */ - /* This is needed for VIA, where writing to this register changes a write-only - bit whose value is read from power management register 42. */ - nvr->regs[RTC_REGD] = val & 0x80; - break; + case RTC_REGD: /* R/O */ + /* This is needed for VIA, where writing to this register changes a write-only + bit whose value is read from power management register 42. */ + nvr->regs[RTC_REGD] = val & 0x80; + break; - case 0x32: - if ((reg == 0x32) && (local->cent == RTC_CENTURY_VIA) && local->wp_32) - break; - nvr_reg_common_write(reg, val, nvr, local); - break; + case 0x32: + if ((reg == 0x32) && (local->cent == RTC_CENTURY_VIA) && local->wp_32) + break; + nvr_reg_common_write(reg, val, nvr, local); + break; - default: /* non-RTC registers are just NVRAM */ - nvr_reg_common_write(reg, val, nvr, local); - break; + default: /* non-RTC registers are just NVRAM */ + nvr_reg_common_write(reg, val, nvr, local); + break; } if ((reg < RTC_REGA) || ((local->cent != 0xff) && (reg == local->cent))) { - if ((reg != 1) && (reg != 3) && (reg != 5)) { - if ((old != val) && !(time_sync & TIME_SYNC_ENABLED)) { - /* Update internal clock. */ - time_get(nvr, &tm); - nvr_time_set(&tm); - nvr_dosave = 1; - } - } + if ((reg != 1) && (reg != 3) && (reg != 5)) { + if ((old != val) && !(time_sync & TIME_SYNC_ENABLED)) { + /* Update internal clock. */ + time_get(nvr, &tm); + nvr_time_set(&tm); + nvr_dosave = 1; + } + } } } - /* Write to one of the NVR registers. */ static void nvr_write(uint16_t addr, uint8_t val, void *priv) { - nvr_t *nvr = (nvr_t *)priv; - local_t *local = (local_t *)nvr->data; - uint8_t addr_id = (addr & 0x0e) >> 1; + nvr_t *nvr = (nvr_t *) priv; + local_t *local = (local_t *) nvr->data; + uint8_t addr_id = (addr & 0x0e) >> 1; cycles -= ISA_CYCLES(8); if (local->bank[addr_id] == 0xff) - return; + return; if (addr & 1) { - // if (local->bank[addr_id] == 0xff) - // return; - nvr_reg_write(local->addr[addr_id], val, priv); + // if (local->bank[addr_id] == 0xff) + // return; + nvr_reg_write(local->addr[addr_id], val, priv); } else { - local->addr[addr_id] = (val & (nvr->size - 1)); - /* Some chipsets use a 256 byte NVRAM but ports 70h and 71h always access only 128 bytes. */ - if (addr_id == 0x0) - local->addr[addr_id] &= 0x7f; - else if ((addr_id == 0x1) && (local->flags & FLAG_PIIX4)) - local->addr[addr_id] = (local->addr[addr_id] & 0x7f) | 0x80; - if (local->bank[addr_id] > 0) - local->addr[addr_id] = (local->addr[addr_id] & 0x7f) | (0x80 * local->bank[addr_id]); - if (!(local->flags & FLAG_NO_NMI)) - nmi_mask = (~val & 0x80); + local->addr[addr_id] = (val & (nvr->size - 1)); + /* Some chipsets use a 256 byte NVRAM but ports 70h and 71h always access only 128 bytes. */ + if (addr_id == 0x0) + local->addr[addr_id] &= 0x7f; + else if ((addr_id == 0x1) && (local->flags & FLAG_PIIX4)) + local->addr[addr_id] = (local->addr[addr_id] & 0x7f) | 0x80; + if (local->bank[addr_id] > 0) + local->addr[addr_id] = (local->addr[addr_id] & 0x7f) | (0x80 * local->bank[addr_id]); + if (!(local->flags & FLAG_NO_NMI)) + nmi_mask = (~val & 0x80); } } - /* Read from one of the NVR registers. */ static uint8_t nvr_read(uint16_t addr, void *priv) { - nvr_t *nvr = (nvr_t *)priv; - local_t *local = (local_t *)nvr->data; - uint8_t ret; - uint8_t addr_id = (addr & 0x0e) >> 1; + nvr_t *nvr = (nvr_t *) priv; + local_t *local = (local_t *) nvr->data; + uint8_t ret; + uint8_t addr_id = (addr & 0x0e) >> 1; uint16_t i, checksum = 0x0000; cycles -= ISA_CYCLES(8); if (local->bank[addr_id] == 0xff) - ret = 0xff; - else if (addr & 1) switch(local->addr[addr_id]) { - case RTC_REGA: - ret = (nvr->regs[RTC_REGA] & 0x7f) | local->stat; - break; + ret = 0xff; + else if (addr & 1) + switch (local->addr[addr_id]) { + case RTC_REGA: + ret = (nvr->regs[RTC_REGA] & 0x7f) | local->stat; + break; - case RTC_REGC: - ret = nvr->regs[RTC_REGC]; - picintc(1 << nvr->irq); - nvr->regs[RTC_REGC] = 0x00; - break; + case RTC_REGC: + ret = nvr->regs[RTC_REGC]; + picintc(1 << nvr->irq); + nvr->regs[RTC_REGC] = 0x00; + break; - case RTC_REGD: - /* Bits 6-0 of this register always read 0. Bit 7 is battery state, - we should always return it set, as that means the battery is OK. */ - ret = REGD_VRT; - break; + case RTC_REGD: + /* Bits 6-0 of this register always read 0. Bit 7 is battery state, + we should always return it set, as that means the battery is OK. */ + ret = REGD_VRT; + break; - case 0x2c: - if (!nvr->is_new && (local->flags & FLAG_AMI_1994_HACK)) - ret = nvr->regs[local->addr[addr_id]] & 0x7f; - else - ret = nvr->regs[local->addr[addr_id]]; - break; + case 0x2c: + if (!nvr->is_new && (local->flags & FLAG_AMI_1994_HACK)) + ret = nvr->regs[local->addr[addr_id]] & 0x7f; + else + ret = nvr->regs[local->addr[addr_id]]; + break; - case 0x2d: - if (!nvr->is_new && (local->flags & FLAG_AMI_1992_HACK)) - ret = nvr->regs[local->addr[addr_id]] & 0xf7; - else - ret = nvr->regs[local->addr[addr_id]]; - break; + case 0x2d: + if (!nvr->is_new && (local->flags & FLAG_AMI_1992_HACK)) + ret = nvr->regs[local->addr[addr_id]] & 0xf7; + else + ret = nvr->regs[local->addr[addr_id]]; + break; - case 0x2e: - case 0x2f: - if (!nvr->is_new && (local->flags & FLAG_AMI_1992_HACK)) { - for (i = 0x10; i <= 0x2d; i++) { - if (i == 0x2d) - checksum += (nvr->regs[i] & 0xf7); - else - checksum += nvr->regs[i]; - } - if (local->addr[addr_id] == 0x2e) - ret = checksum >> 8; - else - ret = checksum & 0xff; - } else if (!nvr->is_new && (local->flags & FLAG_AMI_1994_HACK)) { - for (i = 0x10; i <= 0x2d; i++) { - if (i == 0x2c) - checksum += (nvr->regs[i] & 0x7f); - else - checksum += nvr->regs[i]; - } - if (local->addr[addr_id] == 0x2e) - ret = checksum >> 8; - else - ret = checksum & 0xff; - } else - ret = nvr->regs[local->addr[addr_id]]; - break; + case 0x2e: + case 0x2f: + if (!nvr->is_new && (local->flags & FLAG_AMI_1992_HACK)) { + for (i = 0x10; i <= 0x2d; i++) { + if (i == 0x2d) + checksum += (nvr->regs[i] & 0xf7); + else + checksum += nvr->regs[i]; + } + if (local->addr[addr_id] == 0x2e) + ret = checksum >> 8; + else + ret = checksum & 0xff; + } else if (!nvr->is_new && (local->flags & FLAG_AMI_1994_HACK)) { + for (i = 0x10; i <= 0x2d; i++) { + if (i == 0x2c) + checksum += (nvr->regs[i] & 0x7f); + else + checksum += nvr->regs[i]; + } + if (local->addr[addr_id] == 0x2e) + ret = checksum >> 8; + else + ret = checksum & 0xff; + } else + ret = nvr->regs[local->addr[addr_id]]; + break; - case 0x3e: - case 0x3f: - if (!nvr->is_new && (local->flags & FLAG_AMI_1995_HACK)) { - /* The checksum at 3E-3F is for 37-3D and 40-7F. */ - for (i = 0x37; i <= 0x3d; i++) - checksum += nvr->regs[i]; - for (i = 0x40; i <= 0x7f; i++) { - if (i == 0x52) - checksum += (nvr->regs[i] & 0xf3); - else - checksum += nvr->regs[i]; - } - if (local->addr[addr_id] == 0x3e) - ret = checksum >> 8; - else - ret = checksum & 0xff; - } else if (!nvr->is_new && (local->flags & FLAG_P6RP4_HACK)) { - /* The checksum at 3E-3F is for 37-3D and 40-51. */ - for (i = 0x37; i <= 0x3d; i++) - checksum += nvr->regs[i]; - for (i = 0x40; i <= 0x51; i++) { - if (i == 0x43) - checksum += (nvr->regs[i] | 0x02); - else - checksum += nvr->regs[i]; - } - if (local->addr[addr_id] == 0x3e) - ret = checksum >> 8; - else - ret = checksum & 0xff; - } else - ret = nvr->regs[local->addr[addr_id]]; - break; + case 0x3e: + case 0x3f: + if (!nvr->is_new && (local->flags & FLAG_AMI_1995_HACK)) { + /* The checksum at 3E-3F is for 37-3D and 40-7F. */ + for (i = 0x37; i <= 0x3d; i++) + checksum += nvr->regs[i]; + for (i = 0x40; i <= 0x7f; i++) { + if (i == 0x52) + checksum += (nvr->regs[i] & 0xf3); + else + checksum += nvr->regs[i]; + } + if (local->addr[addr_id] == 0x3e) + ret = checksum >> 8; + else + ret = checksum & 0xff; + } else if (!nvr->is_new && (local->flags & FLAG_P6RP4_HACK)) { + /* The checksum at 3E-3F is for 37-3D and 40-51. */ + for (i = 0x37; i <= 0x3d; i++) + checksum += nvr->regs[i]; + for (i = 0x40; i <= 0x51; i++) { + if (i == 0x43) + checksum += (nvr->regs[i] | 0x02); + else + checksum += nvr->regs[i]; + } + if (local->addr[addr_id] == 0x3e) + ret = checksum >> 8; + else + ret = checksum & 0xff; + } else + ret = nvr->regs[local->addr[addr_id]]; + break; - case 0x43: - if (!nvr->is_new && (local->flags & FLAG_P6RP4_HACK)) - ret = nvr->regs[local->addr[addr_id]] | 0x02; - else - ret = nvr->regs[local->addr[addr_id]]; - break; + case 0x43: + if (!nvr->is_new && (local->flags & FLAG_P6RP4_HACK)) + ret = nvr->regs[local->addr[addr_id]] | 0x02; + else + ret = nvr->regs[local->addr[addr_id]]; + break; - case 0x52: - if (!nvr->is_new && (local->flags & FLAG_AMI_1995_HACK)) - ret = nvr->regs[local->addr[addr_id]] & 0xf3; - else - ret = nvr->regs[local->addr[addr_id]]; - break; + case 0x52: + if (!nvr->is_new && (local->flags & FLAG_AMI_1995_HACK)) + ret = nvr->regs[local->addr[addr_id]] & 0xf3; + else + ret = nvr->regs[local->addr[addr_id]]; + break; - default: - ret = nvr->regs[local->addr[addr_id]]; - break; - } else { - ret = local->addr[addr_id]; - if (!local->read_addr) - ret &= 0x80; - if (alt_access) - ret = (ret & 0x7f) | (nmi_mask ? 0x00 : 0x80); + default: + ret = nvr->regs[local->addr[addr_id]]; + break; + } + else { + ret = local->addr[addr_id]; + if (!local->read_addr) + ret &= 0x80; + if (alt_access) + ret = (ret & 0x7f) | (nmi_mask ? 0x00 : 0x80); } - return(ret); + return (ret); } - /* Secondary NVR write - used by SMC. */ static void nvr_sec_write(uint16_t addr, uint8_t val, void *priv) @@ -827,7 +809,6 @@ nvr_sec_write(uint16_t addr, uint8_t val, void *priv) nvr_write(0x72 + (addr & 1), val, priv); } - /* Secondary NVR read - used by SMC. */ static uint8_t nvr_sec_read(uint16_t addr, void *priv) @@ -835,20 +816,19 @@ nvr_sec_read(uint16_t addr, void *priv) return nvr_read(0x72 + (addr & 1), priv); } - /* Reset the RTC state to 1980/01/01 00:00. */ static void nvr_reset(nvr_t *nvr) { - local_t *local = (local_t *)nvr->data; + local_t *local = (local_t *) nvr->data; /* memset(nvr->regs, local->def, RTC_REGS); */ memset(nvr->regs, local->def, nvr->size); - nvr->regs[RTC_DOM] = 1; + nvr->regs[RTC_DOM] = 1; nvr->regs[RTC_MONTH] = 1; - nvr->regs[RTC_YEAR] = RTC_BCD(80); + nvr->regs[RTC_YEAR] = RTC_BCD(80); if (local->cent != 0xFF) - nvr->regs[local->cent] = RTC_BCD(19); + nvr->regs[local->cent] = RTC_BCD(19); nvr->regs[RTC_REGD] = REGD_VRT; } @@ -857,68 +837,65 @@ nvr_reset(nvr_t *nvr) static void nvr_start(nvr_t *nvr) { - int i; + int i; local_t *local = (local_t *) nvr->data; struct tm tm; - int default_found = 0; + int default_found = 0; for (i = 0; i < nvr->size; i++) { - if (nvr->regs[i] == local->def) - default_found++; + if (nvr->regs[i] == local->def) + default_found++; } if (default_found == nvr->size) - nvr->regs[0x0e] = 0xff; /* If load failed or it loaded an uninitialized NVR, - mark everything as bad. */ + nvr->regs[0x0e] = 0xff; /* If load failed or it loaded an uninitialized NVR, + mark everything as bad. */ /* Initialize the internal and chip times. */ if (time_sync & TIME_SYNC_ENABLED) { - /* Use the internal clock's time. */ - nvr_time_get(&tm); - time_set(nvr, &tm); + /* Use the internal clock's time. */ + nvr_time_get(&tm); + time_set(nvr, &tm); } else { - /* Set the internal clock from the chip time. */ - time_get(nvr, &tm); - nvr_time_set(&tm); + /* Set the internal clock from the chip time. */ + time_get(nvr, &tm); + nvr_time_set(&tm); } /* Start the RTC. */ - nvr->regs[RTC_REGA] = (REGA_RS2|REGA_RS1); + nvr->regs[RTC_REGA] = (REGA_RS2 | REGA_RS1); nvr->regs[RTC_REGB] = REGB_2412; } - static void nvr_at_speed_changed(void *priv) { - nvr_t *nvr = (nvr_t *) priv; + nvr_t *nvr = (nvr_t *) priv; local_t *local = (local_t *) nvr->data; timer_load_count(nvr); timer_disable(&local->update_timer); if (local->ecount > 0ULL) - timer_set_delay_u64(&local->update_timer, local->ecount); + timer_set_delay_u64(&local->update_timer, local->ecount); timer_disable(&nvr->onesec_time); timer_set_delay_u64(&nvr->onesec_time, (10000ULL * TIMER_USEC)); } - void nvr_at_handler(int set, uint16_t base, nvr_t *nvr) { io_handler(set, base, 2, - nvr_read,NULL,NULL, nvr_write,NULL,NULL, nvr); + nvr_read, NULL, NULL, nvr_write, NULL, NULL, nvr); } - void nvr_at_sec_handler(int set, uint16_t base, nvr_t *nvr) { io_handler(set, base, 2, - nvr_sec_read,NULL,NULL, nvr_sec_write,NULL,NULL, nvr); + nvr_sec_read, NULL, NULL, nvr_sec_write, NULL, NULL, nvr); } void @@ -929,7 +906,6 @@ nvr_read_addr_set(int set, nvr_t *nvr) local->read_addr = set; } - void nvr_wp_set(int set, int h, nvr_t *nvr) { @@ -938,19 +914,17 @@ nvr_wp_set(int set, int h, nvr_t *nvr) local->wp[h] = set; } - void nvr_via_wp_set(int set, int reg, nvr_t *nvr) { local_t *local = (local_t *) nvr->data; if (reg == 0x0d) - local->wp_0d = set; + local->wp_0d = set; else - local->wp_32 = set; + local->wp_32 = set; } - void nvr_bank_set(int base, uint8_t bank, nvr_t *nvr) { @@ -959,25 +933,22 @@ nvr_bank_set(int base, uint8_t bank, nvr_t *nvr) local->bank[base] = bank; } - void nvr_lock_set(int base, int size, int lock, nvr_t *nvr) { local_t *local = (local_t *) nvr->data; - int i; + int i; for (i = 0; i < size; i++) - local->lock[base + i] = lock; + local->lock[base + i] = lock; } - void nvr_irq_set(int irq, nvr_t *nvr) { nvr->irq = irq; } - static void nvr_at_reset(void *priv) { @@ -988,90 +959,90 @@ nvr_at_reset(void *priv) nvr->regs[RTC_REGC] &= ~(REGC_PF | REGC_AF | REGC_UF | REGC_IRQF); } - static void * nvr_at_init(const device_t *info) { local_t *local; - nvr_t *nvr; + nvr_t *nvr; /* Allocate an NVR for this machine. */ - nvr = (nvr_t *)malloc(sizeof(nvr_t)); - if (nvr == NULL) return(NULL); + nvr = (nvr_t *) malloc(sizeof(nvr_t)); + if (nvr == NULL) + return (NULL); memset(nvr, 0x00, sizeof(nvr_t)); - local = (local_t *)malloc(sizeof(local_t)); + local = (local_t *) malloc(sizeof(local_t)); memset(local, 0x00, sizeof(local_t)); nvr->data = local; /* This is machine specific. */ - nvr->size = machines[machine].nvrmask + 1; + nvr->size = machines[machine].nvrmask + 1; local->lock = (uint8_t *) malloc(nvr->size); memset(local->lock, 0x00, nvr->size); - local->def = 0xff /*0x00*/; + local->def = 0xff /*0x00*/; local->flags = 0x00; - switch(info->local & 7) { - case 0: /* standard AT, no century register */ - if (info->local == 16) { - local->flags |= FLAG_P6RP4_HACK; - nvr->irq = 8; - local->cent = RTC_CENTURY_AT; - } else { - nvr->irq = 8; - local->cent = 0xff; - } - break; + switch (info->local & 7) { + case 0: /* standard AT, no century register */ + if (info->local == 16) { + local->flags |= FLAG_P6RP4_HACK; + nvr->irq = 8; + local->cent = RTC_CENTURY_AT; + } else { + nvr->irq = 8; + local->cent = 0xff; + } + break; - case 1: /* standard AT */ - case 5: /* AMI WinBIOS 1994 */ - case 6: /* AMI BIOS 1995 */ - if (info->local == 9) - local->flags |= FLAG_PIIX4; - else { - local->def = 0x00; - if ((info->local & 7) == 5) - local->flags |= FLAG_AMI_1994_HACK; - else if ((info->local & 7) == 6) - local->flags |= FLAG_AMI_1995_HACK; - else - local->def = 0xff; - } - nvr->irq = 8; - local->cent = RTC_CENTURY_AT; - break; + case 1: /* standard AT */ + case 5: /* AMI WinBIOS 1994 */ + case 6: /* AMI BIOS 1995 */ + if (info->local == 9) + local->flags |= FLAG_PIIX4; + else { + local->def = 0x00; + if ((info->local & 7) == 5) + local->flags |= FLAG_AMI_1994_HACK; + else if ((info->local & 7) == 6) + local->flags |= FLAG_AMI_1995_HACK; + else + local->def = 0xff; + } + nvr->irq = 8; + local->cent = RTC_CENTURY_AT; + break; - case 2: /* PS/1 or PS/2 */ - nvr->irq = 8; - local->cent = RTC_CENTURY_PS; - local->def = 0x00; - if (info->local & 8) - local->flags |= FLAG_NO_NMI; - break; + case 2: /* PS/1 or PS/2 */ + nvr->irq = 8; + local->cent = RTC_CENTURY_PS; + local->def = 0x00; + if (info->local & 8) + local->flags |= FLAG_NO_NMI; + break; - case 3: /* Amstrad PC's */ - nvr->irq = 1; - local->cent = RTC_CENTURY_AT; - local->def = 0xff; - if (info->local & 8) - local->flags |= FLAG_NO_NMI; - break; + case 3: /* Amstrad PC's */ + nvr->irq = 1; + local->cent = RTC_CENTURY_AT; + local->def = 0xff; + if (info->local & 8) + local->flags |= FLAG_NO_NMI; + break; - case 4: /* IBM AT */ - if (info->local == 12) { - local->def = 0x00; - local->flags |= FLAG_AMI_1992_HACK; - } else if (info->local == 20) - local->def = 0x00; - else - local->def = 0xff; - nvr->irq = 8; - local->cent = RTC_CENTURY_AT; - break; + case 4: /* IBM AT */ + if (info->local == 12) { + local->def = 0x00; + local->flags |= FLAG_AMI_1992_HACK; + } else if (info->local == 20) + local->def = 0x00; + else + local->def = 0xff; + nvr->irq = 8; + local->cent = RTC_CENTURY_AT; + break; - case 7: /* VIA VT82C586B */ - nvr->irq = 8; - local->cent = RTC_CENTURY_VIA; - break; + case 7: /* VIA VT82C586B */ + nvr->irq = 8; + local->cent = RTC_CENTURY_VIA; + break; } local->read_addr = 1; @@ -1079,41 +1050,40 @@ nvr_at_init(const device_t *info) /* Set up any local handlers here. */ nvr->reset = nvr_reset; nvr->start = nvr_start; - nvr->tick = timer_tick; + nvr->tick = timer_tick; /* Initialize the generic NVR. */ nvr_init(nvr); if (nvr_at_inited == 0) { - /* Start the timers. */ - timer_add(&local->update_timer, timer_update, nvr, 0); + /* Start the timers. */ + timer_add(&local->update_timer, timer_update, nvr, 0); - timer_add(&local->rtc_timer, timer_intr, nvr, 0); - /* On power on, if the oscillator is disabled, it's reenabled. */ - if ((nvr->regs[RTC_REGA] & 0x70) == 0x00) - nvr->regs[RTC_REGA] = (nvr->regs[RTC_REGA] & 0x8f) | 0x20; - nvr_at_reset(nvr); - timer_load_count(nvr); + timer_add(&local->rtc_timer, timer_intr, nvr, 0); + /* On power on, if the oscillator is disabled, it's reenabled. */ + if ((nvr->regs[RTC_REGA] & 0x70) == 0x00) + nvr->regs[RTC_REGA] = (nvr->regs[RTC_REGA] & 0x8f) | 0x20; + nvr_at_reset(nvr); + timer_load_count(nvr); - /* Set up the I/O handler for this device. */ - io_sethandler(0x0070, 2, - nvr_read,NULL,NULL, nvr_write,NULL,NULL, nvr); - if (info->local & 8) { - io_sethandler(0x0072, 2, - nvr_read,NULL,NULL, nvr_write,NULL,NULL, nvr); - } + /* Set up the I/O handler for this device. */ + io_sethandler(0x0070, 2, + nvr_read, NULL, NULL, nvr_write, NULL, NULL, nvr); + if (info->local & 8) { + io_sethandler(0x0072, 2, + nvr_read, NULL, NULL, nvr_write, NULL, NULL, nvr); + } - nvr_at_inited = 1; + nvr_at_inited = 1; } - return(nvr); + return (nvr); } - static void nvr_at_close(void *priv) { - nvr_t *nvr = (nvr_t *) priv; + nvr_t *nvr = (nvr_t *) priv; local_t *local = (local_t *) nvr->data; nvr_close(); @@ -1123,101 +1093,101 @@ nvr_at_close(void *priv) timer_disable(&nvr->onesec_time); if (nvr != NULL) { - if (nvr->fn != NULL) - free(nvr->fn); + if (nvr->fn != NULL) + free(nvr->fn); - if (nvr->data != NULL) - free(nvr->data); + if (nvr->data != NULL) + free(nvr->data); - free(nvr); + free(nvr); } if (nvr_at_inited == 1) - nvr_at_inited = 0; + nvr_at_inited = 0; } const device_t at_nvr_old_device = { - .name = "PC/AT NVRAM (No century)", + .name = "PC/AT NVRAM (No century)", .internal_name = "at_nvr_old", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 0, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 0, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t at_nvr_device = { - .name = "PC/AT NVRAM", + .name = "PC/AT NVRAM", .internal_name = "at_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 1, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 1, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ps_nvr_device = { - .name = "PS/1 or PS/2 NVRAM", + .name = "PS/1 or PS/2 NVRAM", .internal_name = "ps_nvr", - .flags = DEVICE_PS2, - .local = 2, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_PS2, + .local = 2, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t amstrad_nvr_device = { - .name = "Amstrad NVRAM", + .name = "Amstrad NVRAM", .internal_name = "amstrad_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 3, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 3, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ibmat_nvr_device = { - .name = "IBM AT NVRAM", + .name = "IBM AT NVRAM", .internal_name = "ibmat_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 4, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 4, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t piix4_nvr_device = { - .name = "Intel PIIX4 PC/AT NVRAM", + .name = "Intel PIIX4 PC/AT NVRAM", .internal_name = "piix4_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 9, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 9, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ps_no_nmi_nvr_device = { @@ -1225,8 +1195,11 @@ const device_t ps_no_nmi_nvr_device = { "ps1_nvr", DEVICE_PS2, 10, - nvr_at_init, nvr_at_close, nvr_at_reset, - { NULL }, nvr_at_speed_changed, + nvr_at_init, + nvr_at_close, + nvr_at_reset, + { NULL }, + nvr_at_speed_changed, NULL }; @@ -1235,91 +1208,94 @@ const device_t amstrad_no_nmi_nvr_device = { "amstrad_nvr", DEVICE_ISA | DEVICE_AT, 11, - nvr_at_init, nvr_at_close, nvr_at_reset, - { NULL }, nvr_at_speed_changed, + nvr_at_init, + nvr_at_close, + nvr_at_reset, + { NULL }, + nvr_at_speed_changed, NULL }; const device_t ami_1992_nvr_device = { - .name = "AMI Color 1992 PC/AT NVRAM", + .name = "AMI Color 1992 PC/AT NVRAM", .internal_name = "ami_1992_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 12, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 12, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ami_1994_nvr_device = { - .name = "AMI WinBIOS 1994 PC/AT NVRAM", + .name = "AMI WinBIOS 1994 PC/AT NVRAM", .internal_name = "ami_1994_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 13, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 13, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ami_1995_nvr_device = { - .name = "AMI WinBIOS 1995 PC/AT NVRAM", + .name = "AMI WinBIOS 1995 PC/AT NVRAM", .internal_name = "ami_1995_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 14, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 14, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_nvr_device = { - .name = "VIA PC/AT NVRAM", + .name = "VIA PC/AT NVRAM", .internal_name = "via_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 15, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 15, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t p6rp4_nvr_device = { - .name = "ASUS P/I-P6RP4 PC/AT NVRAM", + .name = "ASUS P/I-P6RP4 PC/AT NVRAM", .internal_name = "p6rp4_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 16, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 16, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t amstrad_megapc_nvr_device = { - .name = "Amstrad MegapC NVRAM", + .name = "Amstrad MegapC NVRAM", .internal_name = "amstrad_megapc_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 20, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 20, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/nvr_ps2.c b/src/nvr_ps2.c index e82eff150..6b6b69cc8 100644 --- a/src/nvr_ps2.c +++ b/src/nvr_ps2.c @@ -49,70 +49,66 @@ #include <86box/nvr_ps2.h> #include <86box/rom.h> - typedef struct { - int addr; + int addr; - uint8_t *ram; - int size; + uint8_t *ram; + int size; - char *fn; + char *fn; } ps2_nvr_t; - static uint8_t ps2_nvr_read(uint16_t port, void *priv) { - ps2_nvr_t *nvr = (ps2_nvr_t *)priv; - uint8_t ret = 0xff; + ps2_nvr_t *nvr = (ps2_nvr_t *) priv; + uint8_t ret = 0xff; switch (port) { - case 0x74: - ret = nvr->addr & 0xff; - break; + case 0x74: + ret = nvr->addr & 0xff; + break; - case 0x75: - ret = nvr->addr >> 8; - break; + case 0x75: + ret = nvr->addr >> 8; + break; - case 0x76: - ret = nvr->ram[nvr->addr]; - break; + case 0x76: + ret = nvr->ram[nvr->addr]; + break; } - return(ret); + return (ret); } - static void ps2_nvr_write(uint16_t port, uint8_t val, void *priv) { - ps2_nvr_t *nvr = (ps2_nvr_t *)priv; + ps2_nvr_t *nvr = (ps2_nvr_t *) priv; switch (port) { - case 0x74: - nvr->addr = (nvr->addr & 0x1f00) | val; - break; + case 0x74: + nvr->addr = (nvr->addr & 0x1f00) | val; + break; - case 0x75: - nvr->addr = (nvr->addr & 0xff) | ((val & 0x1f) << 8); - break; + case 0x75: + nvr->addr = (nvr->addr & 0xff) | ((val & 0x1f) << 8); + break; - case 0x76: - nvr->ram[nvr->addr] = val; - break; + case 0x76: + nvr->ram[nvr->addr] = val; + break; } } - static void * ps2_nvr_init(const device_t *info) { ps2_nvr_t *nvr; - FILE *f = NULL; - int c; + FILE *f = NULL; + int c; - nvr = (ps2_nvr_t *)malloc(sizeof(ps2_nvr_t)); + nvr = (ps2_nvr_t *) malloc(sizeof(ps2_nvr_t)); memset(nvr, 0x00, sizeof(ps2_nvr_t)); if (info->local) @@ -121,38 +117,37 @@ ps2_nvr_init(const device_t *info) nvr->size = 8192; /* Set up the NVR file's name. */ - c = strlen(machine_get_internal_name()) + 9; - nvr->fn = (char *)malloc(c + 1); + c = strlen(machine_get_internal_name()) + 9; + nvr->fn = (char *) malloc(c + 1); sprintf(nvr->fn, "%s_sec.nvr", machine_get_internal_name()); io_sethandler(0x0074, 3, - ps2_nvr_read,NULL,NULL, ps2_nvr_write,NULL,NULL, nvr); + ps2_nvr_read, NULL, NULL, ps2_nvr_write, NULL, NULL, nvr); f = nvr_fopen(nvr->fn, "rb"); - nvr->ram = (uint8_t *)malloc(nvr->size); + nvr->ram = (uint8_t *) malloc(nvr->size); memset(nvr->ram, 0xff, nvr->size); if (f != NULL) { - if (fread(nvr->ram, 1, nvr->size, f) != nvr->size) - fatal("ps2_nvr_init(): Error reading EEPROM data\n"); - fclose(f); + if (fread(nvr->ram, 1, nvr->size, f) != nvr->size) + fatal("ps2_nvr_init(): Error reading EEPROM data\n"); + fclose(f); } - return(nvr); + return (nvr); } - static void ps2_nvr_close(void *priv) { - ps2_nvr_t *nvr = (ps2_nvr_t *)priv; - FILE *f = NULL; + ps2_nvr_t *nvr = (ps2_nvr_t *) priv; + FILE *f = NULL; f = nvr_fopen(nvr->fn, "wb"); if (f != NULL) { - (void)fwrite(nvr->ram, nvr->size, 1, f); - fclose(f); + (void) fwrite(nvr->ram, nvr->size, 1, f); + fclose(f); } if (nvr->ram != NULL) @@ -162,29 +157,29 @@ ps2_nvr_close(void *priv) } const device_t ps2_nvr_device = { - .name = "PS/2 Secondary NVRAM for PS/2 Models 70-80", + .name = "PS/2 Secondary NVRAM for PS/2 Models 70-80", .internal_name = "ps2_nvr", - .flags = 0, - .local = 0, - .init = ps2_nvr_init, - .close = ps2_nvr_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = ps2_nvr_init, + .close = ps2_nvr_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ps2_nvr_55ls_device = { - .name = "PS/2 Secondary NVRAM for PS/2 Models 55LS-65SX", + .name = "PS/2 Secondary NVRAM for PS/2 Models 55LS-65SX", .internal_name = "ps2_nvr_55ls", - .flags = 0, - .local = 1, - .init = ps2_nvr_init, - .close = ps2_nvr_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = ps2_nvr_init, + .close = ps2_nvr_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/pci.c b/src/pci.c index 36dd09002..b4078167c 100644 --- a/src/pci.c +++ b/src/pci.c @@ -35,65 +35,59 @@ #include <86box/pci.h> #include <86box/keyboard.h> - typedef struct { - uint8_t bus, id, type; - uint8_t irq_routing[4]; + uint8_t bus, id, type; + uint8_t irq_routing[4]; - void *priv; - void (*write)(int func, int addr, uint8_t val, void *priv); - uint8_t (*read)(int func, int addr, void *priv); + void *priv; + void (*write)(int func, int addr, uint8_t val, void *priv); + uint8_t (*read)(int func, int addr, void *priv); } pci_card_t; typedef struct { - uint8_t enabled; - uint8_t irq_line; + uint8_t enabled; + uint8_t irq_line; } pci_mirq_t; +int pci_burst_time, agp_burst_time, + pci_nonburst_time, agp_nonburst_time; -int pci_burst_time, agp_burst_time, - pci_nonburst_time, agp_nonburst_time; - -static pci_card_t pci_cards[32]; -static uint8_t pci_pmc = 0, last_pci_card = 0, last_normal_pci_card = 0, last_pci_bus = 1; -static uint8_t pci_card_to_slot_mapping[256][32], pci_bus_number_to_index_mapping[256]; -static uint8_t pci_irqs[16], pci_irq_level[16]; -static uint64_t pci_irq_hold[16]; -static pci_mirq_t pci_mirqs[8]; -static int pci_type, - pci_switch, - pci_index, - pci_func, - pci_card, - pci_bus, - pci_enable, - pci_key; -static int trc_reg = 0; - - -static void pci_reset_regs(void); +static pci_card_t pci_cards[32]; +static uint8_t pci_pmc = 0, last_pci_card = 0, last_normal_pci_card = 0, last_pci_bus = 1; +static uint8_t pci_card_to_slot_mapping[256][32], pci_bus_number_to_index_mapping[256]; +static uint8_t pci_irqs[16], pci_irq_level[16]; +static uint64_t pci_irq_hold[16]; +static pci_mirq_t pci_mirqs[8]; +static int pci_type, + pci_switch, + pci_index, + pci_func, + pci_card, + pci_bus, + pci_enable, + pci_key; +static int trc_reg = 0; +static void pci_reset_regs(void); #ifdef ENABLE_PCI_LOG int pci_do_log = ENABLE_PCI_LOG; - static void pci_log(const char *fmt, ...) { va_list ap; if (pci_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define pci_log(fmt, ...) +# define pci_log(fmt, ...) #endif - static void pci_clear_slot(int card) { @@ -101,201 +95,205 @@ pci_clear_slot(int card) pci_card_to_slot_mapping[pci_cards[card].bus][pci_cards[card].id] = 0xff; - pci_cards[card].id = 0xff; + pci_cards[card].id = 0xff; pci_cards[card].type = 0xff; for (i = 0; i < 4; i++) - pci_cards[card].irq_routing[i] = 0; + pci_cards[card].irq_routing[i] = 0; - pci_cards[card].read = NULL; + pci_cards[card].read = NULL; pci_cards[card].write = NULL; - pci_cards[card].priv = NULL; + pci_cards[card].priv = NULL; } - void pci_relocate_slot(int type, int new_slot) { - int i, card = -1; - int old_slot; + int i, card = -1; + int old_slot; uint8_t mapping; if ((new_slot < 0) || (new_slot > 31)) - return; + return; for (i = 0; i < 32; i++) { - if ((pci_cards[i].bus == 0) && (pci_cards[i].type == type)) { - card = i; - break; - } + if ((pci_cards[i].bus == 0) && (pci_cards[i].type == type)) { + card = i; + break; + } } if (card == -1) - return; + return; - old_slot = pci_cards[card].id; - pci_cards[card].id = new_slot; - mapping = pci_card_to_slot_mapping[0][old_slot]; + old_slot = pci_cards[card].id; + pci_cards[card].id = new_slot; + mapping = pci_card_to_slot_mapping[0][old_slot]; pci_card_to_slot_mapping[0][old_slot] = 0xff; pci_card_to_slot_mapping[0][new_slot] = mapping; } - static void pci_cf8_write(uint16_t port, uint32_t val, void *priv) { pci_log("cf8 write: %08X\n", val); - pci_index = val & 0xff; - pci_func = (val >> 8) & 7; - pci_card = (val >> 11) & 31; - pci_bus = (val >> 16) & 0xff; + pci_index = val & 0xff; + pci_func = (val >> 8) & 7; + pci_card = (val >> 11) & 31; + pci_bus = (val >> 16) & 0xff; pci_enable = (val >> 31) & 1; } - static uint32_t pci_cf8_read(uint16_t port, void *priv) { - return pci_index | (pci_func << 8) | - (pci_card << 11) | (pci_bus << 16) | (pci_enable << 31); + return pci_index | (pci_func << 8) | (pci_card << 11) | (pci_bus << 16) | (pci_enable << 31); } - static void pci_write(uint16_t port, uint8_t val, void *priv) { uint8_t slot = 0; if (in_smm) - pci_log("(%i) %03x write: %02X\n", pci_enable, port, val); + pci_log("(%i) %03x write: %02X\n", pci_enable, port, val); switch (port) { - case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff: - if (! pci_enable) - return; + case 0xcfc: + case 0xcfd: + case 0xcfe: + case 0xcff: + if (!pci_enable) + return; - pci_log("Writing %02X to PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", val, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].write) { - pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); - pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv); - } + pci_log("Writing %02X to PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", val, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].write) { + pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv); + } #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - } + } #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - break; + break; } } - static void pci_writew(uint16_t port, uint16_t val, void *priv) { uint8_t slot = 0; if (in_smm) - pci_log("(%i) %03x write: %02X\n", pci_enable, port, val); + pci_log("(%i) %03x write: %02X\n", pci_enable, port, val); switch (port) { - case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff: - if (! pci_enable) - return; + case 0xcfc: + case 0xcfd: + case 0xcfe: + case 0xcff: + if (!pci_enable) + return; - pci_log("Writing %04X to PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", val, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].write) { - pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); - pci_cards[slot].write(pci_func, pci_index | (port & 3), val & 0xff, pci_cards[slot].priv); - pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 1), val >> 8, pci_cards[slot].priv); - } + pci_log("Writing %04X to PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", val, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].write) { + pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + pci_cards[slot].write(pci_func, pci_index | (port & 3), val & 0xff, pci_cards[slot].priv); + pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 1), val >> 8, pci_cards[slot].priv); + } #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - } + } #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - break; + break; } } - static void pci_writel(uint16_t port, uint32_t val, void *priv) { uint8_t slot = 0; if (in_smm) - pci_log("(%i) %03x write: %02X\n", pci_enable, port, val); + pci_log("(%i) %03x write: %02X\n", pci_enable, port, val); switch (port) { - case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff: - if (! pci_enable) - return; + case 0xcfc: + case 0xcfd: + case 0xcfe: + case 0xcff: + if (!pci_enable) + return; - pci_log("Writing %08X to PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", val, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].write) { - pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); - pci_cards[slot].write(pci_func, pci_index | (port & 3), val & 0xff, pci_cards[slot].priv); - pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 1), (val >> 8) & 0xff, pci_cards[slot].priv); - pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 2), (val >> 16) & 0xff, pci_cards[slot].priv); - pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 3), (val >> 24) & 0xff, pci_cards[slot].priv); - } + pci_log("Writing %08X to PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", val, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].write) { + pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + pci_cards[slot].write(pci_func, pci_index | (port & 3), val & 0xff, pci_cards[slot].priv); + pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 1), (val >> 8) & 0xff, pci_cards[slot].priv); + pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 2), (val >> 16) & 0xff, pci_cards[slot].priv); + pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 3), (val >> 24) & 0xff, pci_cards[slot].priv); + } #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - } + } #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - break; + break; } } - static uint8_t pci_read(uint16_t port, void *priv) { uint8_t slot = 0; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (in_smm) - pci_log("(%i) %03x read\n", pci_enable, port); + pci_log("(%i) %03x read\n", pci_enable, port); switch (port) { - case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff: - if (! pci_enable) - return 0xff; + case 0xcfc: + case 0xcfd: + case 0xcfe: + case 0xcff: + if (!pci_enable) + return 0xff; - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].read) - ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].read) + ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); #ifdef ENABLE_PCI_LOG - else - pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - } + } #ifdef ENABLE_PCI_LOG - else - pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif } @@ -304,35 +302,37 @@ pci_read(uint16_t port, void *priv) return ret; } - static uint16_t pci_readw(uint16_t port, void *priv) { - uint8_t slot = 0; - uint16_t ret = 0xffff; + uint8_t slot = 0; + uint16_t ret = 0xffff; if (in_smm) - pci_log("(%i) %03x read\n", pci_enable, port); + pci_log("(%i) %03x read\n", pci_enable, port); switch (port) { - case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff: - if (! pci_enable) - return 0xff; + case 0xcfc: + case 0xcfd: + case 0xcfe: + case 0xcff: + if (!pci_enable) + return 0xff; - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].read) { - ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); - ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 1, pci_cards[slot].priv) << 8); - } + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].read) { + ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); + ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 1, pci_cards[slot].priv) << 8); + } #ifdef ENABLE_PCI_LOG - else - pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - } + } #ifdef ENABLE_PCI_LOG - else - pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif } @@ -341,37 +341,39 @@ pci_readw(uint16_t port, void *priv) return ret; } - static uint32_t pci_readl(uint16_t port, void *priv) { - uint8_t slot = 0; - uint32_t ret = 0xffffffff; + uint8_t slot = 0; + uint32_t ret = 0xffffffff; if (in_smm) - pci_log("(%i) %03x read\n", pci_enable, port); + pci_log("(%i) %03x read\n", pci_enable, port); switch (port) { - case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff: - if (! pci_enable) - return 0xff; + case 0xcfc: + case 0xcfd: + case 0xcfe: + case 0xcff: + if (!pci_enable) + return 0xff; - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].read) { - ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); - ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 1, pci_cards[slot].priv) << 8); - ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 2, pci_cards[slot].priv) << 16); - ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 3, pci_cards[slot].priv) << 24); - } + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].read) { + ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); + ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 1, pci_cards[slot].priv) << 8); + ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 2, pci_cards[slot].priv) << 16); + ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 3, pci_cards[slot].priv) << 24); + } #ifdef ENABLE_PCI_LOG - else - pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - } + } #ifdef ENABLE_PCI_LOG - else - pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif } @@ -380,10 +382,8 @@ pci_readl(uint16_t port, void *priv) return ret; } - -static void pci_type2_write(uint16_t port, uint8_t val, void *priv); -static uint8_t pci_type2_read(uint16_t port, void *priv); - +static void pci_type2_write(uint16_t port, uint8_t val, void *priv); +static uint8_t pci_type2_read(uint16_t port, void *priv); void pci_set_pmc(uint8_t pmc) @@ -391,148 +391,140 @@ pci_set_pmc(uint8_t pmc) pci_reset_regs(); if (!pci_pmc && (pmc & 0x01)) { - io_removehandler(0x0cf8, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); - io_removehandler(0x0cfa, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); - io_sethandler(0x0cf8, 1, - NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL); - io_sethandler(0x0cfc, 4, - pci_read,NULL,NULL, pci_write,NULL,NULL, NULL); + io_removehandler(0x0cf8, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); + io_removehandler(0x0cfa, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); + io_sethandler(0x0cf8, 1, + NULL, NULL, pci_cf8_read, NULL, NULL, pci_cf8_write, NULL); + io_sethandler(0x0cfc, 4, + pci_read, NULL, NULL, pci_write, NULL, NULL, NULL); } else if (pci_pmc && !(pmc & 0x01)) { - io_removehandler(0x0cf8, 1, - NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL); - io_removehandler(0x0cfc, 4, - pci_read,NULL,NULL, pci_write,NULL,NULL, NULL); - io_sethandler(0x0cf8, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); - io_sethandler(0x0cfa, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); + io_removehandler(0x0cf8, 1, + NULL, NULL, pci_cf8_read, NULL, NULL, pci_cf8_write, NULL); + io_removehandler(0x0cfc, 4, + pci_read, NULL, NULL, pci_write, NULL, NULL, NULL); + io_sethandler(0x0cf8, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); + io_sethandler(0x0cfa, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); } pci_pmc = (pmc & 0x01); } - static void pci_type2_write(uint16_t port, uint8_t val, void *priv) { uint8_t slot = 0; if (port == 0xcf8) { - pci_func = (val >> 1) & 7; + pci_func = (val >> 1) & 7; - if (!pci_key && (val & 0xf0)) - io_sethandler(0xc000, 0x1000, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); - else if (pci_key && !(val & 0xf0)) - io_removehandler(0xc000, 0x1000, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); + if (!pci_key && (val & 0xf0)) + io_sethandler(0xc000, 0x1000, + pci_type2_read, NULL, NULL, + pci_type2_write, NULL, NULL, NULL); + else if (pci_key && !(val & 0xf0)) + io_removehandler(0xc000, 0x1000, + pci_type2_read, NULL, NULL, + pci_type2_write, NULL, NULL, NULL); - pci_key = val & 0xf0; + pci_key = val & 0xf0; } else if (port == 0xcfa) - pci_bus = val; + pci_bus = val; else if (port == 0xcfb) { - pci_log("Write %02X to port 0CFB\n", val); - pci_set_pmc(val); + pci_log("Write %02X to port 0CFB\n", val); + pci_set_pmc(val); } else { - pci_card = (port >> 8) & 0xf; - pci_index = port & 0xff; + pci_card = (port >> 8) & 0xf; + pci_index = port & 0xff; - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].write) - pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv); + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].write) + pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv); #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); + else + pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); #endif - } + } #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); + else + pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); #endif } } - static void pci_type2_writel(uint16_t port, uint32_t val, void *priv) { int i; for (i = 0; i < 4; i++) { - /* Make sure to have the DWORD write not pass through to PMC if mechanism 1 is in use, - as otherwise, the PCI enable bits clobber it. */ - if (!pci_pmc || ((port + i) != 0x0cfb)) - pci_type2_write(port + i, val >> 8, priv); + /* Make sure to have the DWORD write not pass through to PMC if mechanism 1 is in use, + as otherwise, the PCI enable bits clobber it. */ + if (!pci_pmc || ((port + i) != 0x0cfb)) + pci_type2_write(port + i, val >> 8, priv); } } - static uint8_t pci_type2_read(uint16_t port, void *priv) { uint8_t slot = 0; if (port == 0xcf8) - return pci_key | (pci_func << 1); + return pci_key | (pci_func << 1); else if (port == 0xcfa) - return pci_bus; + return pci_bus; else if (port == 0xcfb) - return pci_pmc; + return pci_pmc; - pci_card = (port >> 8) & 0xf; + pci_card = (port >> 8) & 0xf; pci_index = port & 0xff; slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; if (slot != 0xff) { - if (pci_cards[slot].read) - return pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); + if (pci_cards[slot].read) + return pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); #ifdef ENABLE_PCI_LOG - else - pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); + else + pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); #endif } #ifdef ENABLE_PCI_LOG else - pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); + pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); #endif return 0xff; } - void pci_set_irq_routing(int pci_int, int irq) { pci_irqs[pci_int - 1] = irq; } - void pci_set_irq_level(int pci_int, int level) { pci_irq_level[pci_int - 1] = !!level; } - void pci_enable_mirq(int mirq) { pci_mirqs[mirq].enabled = 1; } - void pci_set_mirq_routing(int mirq, int irq) { pci_mirqs[mirq].irq_line = irq; } - void pci_set_mirq(uint8_t mirq, int level) { @@ -540,129 +532,127 @@ pci_set_mirq(uint8_t mirq, int level) uint8_t irq_bit; if (mirq >= 0xf0) { - irq_line = mirq & 0x0f; - irq_bit = 0x1D; + irq_line = mirq & 0x0f; + irq_bit = 0x1D; } else { - if (! pci_mirqs[mirq].enabled) { - pci_log("pci_set_mirq(%02X): MIRQ0 disabled\n", mirq); - return; - } + if (!pci_mirqs[mirq].enabled) { + pci_log("pci_set_mirq(%02X): MIRQ0 disabled\n", mirq); + return; + } - if (pci_mirqs[mirq].irq_line > 0x0f) { - pci_log("pci_set_mirq(%02X): IRQ line is disabled\n", mirq); - return; - } + if (pci_mirqs[mirq].irq_line > 0x0f) { + pci_log("pci_set_mirq(%02X): IRQ line is disabled\n", mirq); + return; + } - irq_line = pci_mirqs[mirq].irq_line; - irq_bit = (0x1E + mirq); + irq_line = pci_mirqs[mirq].irq_line; + irq_bit = (0x1E + mirq); } pci_log("pci_set_mirq(%02X): Using IRQ %i\n", mirq, irq_line); if (level && (pci_irq_hold[irq_line] & (1ULL << irq_bit))) { - /* IRQ already held, do nothing. */ - pci_log("pci_set_mirq(%02X): MIRQ is already holding the IRQ\n", mirq); - picintlevel(1 << irq_line); - return; + /* IRQ already held, do nothing. */ + pci_log("pci_set_mirq(%02X): MIRQ is already holding the IRQ\n", mirq); + picintlevel(1 << irq_line); + return; } pci_log("pci_set_mirq(%02X): MIRQ not yet holding the IRQ\n", mirq); if (!level || !pci_irq_hold[irq_line]) { - pci_log("pci_set_mirq(%02X): Issuing %s-triggered IRQ (%sheld)\n", mirq, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not "); + pci_log("pci_set_mirq(%02X): Issuing %s-triggered IRQ (%sheld)\n", mirq, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not "); - /* Only raise the interrupt if it's edge-triggered or level-triggered and not yet being held. */ - if (level) - picintlevel(1 << irq_line); - else - picint(1 << irq_line); + /* Only raise the interrupt if it's edge-triggered or level-triggered and not yet being held. */ + if (level) + picintlevel(1 << irq_line); + else + picint(1 << irq_line); } else if (level && pci_irq_hold[irq_line]) { - pci_log("pci_set_mirq(%02X): IRQ line already being held\n", mirq); - picintlevel(1 << irq_line); + pci_log("pci_set_mirq(%02X): IRQ line already being held\n", mirq); + picintlevel(1 << irq_line); } /* If the IRQ is level-triggered, mark that this MIRQ is holding it. */ if (level) { - pci_log("pci_set_mirq(%02X): Marking that this card is holding the IRQ\n", mirq); - pci_irq_hold[irq_line] |= (1ULL << irq_bit); + pci_log("pci_set_mirq(%02X): Marking that this card is holding the IRQ\n", mirq); + pci_irq_hold[irq_line] |= (1ULL << irq_bit); } pci_log("pci_set_mirq(%02X): Edge-triggered interrupt, not marking\n", mirq); } - void pci_set_irq(uint8_t card, uint8_t pci_int) { - uint8_t slot = 0; - uint8_t irq_routing = 0; + uint8_t slot = 0; + uint8_t irq_routing = 0; uint8_t pci_int_index = pci_int - PCI_INTA; - uint8_t irq_line = 0; - uint8_t level = 0; + uint8_t irq_line = 0; + uint8_t level = 0; - if (! last_pci_card) { - pci_log("pci_set_irq(%02X, %02X): No PCI slots (how are we even here?!)\n", card, pci_int); - return; + if (!last_pci_card) { + pci_log("pci_set_irq(%02X, %02X): No PCI slots (how are we even here?!)\n", card, pci_int); + return; } pci_log("pci_set_irq(%02X, %02X): %i PCI slots\n", card, pci_int, last_pci_card); slot = card; if (slot == 0xff) { - pci_log("pci_set_irq(%02X, %02X): Card is not on a PCI slot (how are we even here?!)\n", card, pci_int); - return; + pci_log("pci_set_irq(%02X, %02X): Card is not on a PCI slot (how are we even here?!)\n", card, pci_int); + return; } pci_log("pci_set_irq(%02X, %02X): Card is on PCI slot %02X\n", card, pci_int, slot); - if (! pci_cards[slot].irq_routing[pci_int_index]) { - pci_log("pci_set_irq(%02X, %02X): No IRQ routing for this slot and INT pin combination\n", card, pci_int); - return; + if (!pci_cards[slot].irq_routing[pci_int_index]) { + pci_log("pci_set_irq(%02X, %02X): No IRQ routing for this slot and INT pin combination\n", card, pci_int); + return; } if (pci_type & PCI_NO_IRQ_STEERING) - irq_line = pci_cards[slot].read(0, 0x3c, pci_cards[slot].priv); + irq_line = pci_cards[slot].read(0, 0x3c, pci_cards[slot].priv); else { - irq_routing = (pci_cards[slot].irq_routing[pci_int_index] - PCI_INTA) & 3; - pci_log("pci_set_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing); + irq_routing = (pci_cards[slot].irq_routing[pci_int_index] - PCI_INTA) & 3; + pci_log("pci_set_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing); - irq_line = pci_irqs[irq_routing]; - level = pci_irq_level[irq_routing]; + irq_line = pci_irqs[irq_routing]; + level = pci_irq_level[irq_routing]; } if (irq_line > 0x0f) { - pci_log("pci_set_irq(%02X, %02X): IRQ line is disabled\n", card, pci_int); - return; + pci_log("pci_set_irq(%02X, %02X): IRQ line is disabled\n", card, pci_int); + return; } else - pci_log("pci_set_irq(%02X, %02X): Using IRQ %i\n", card, pci_int, irq_line); + pci_log("pci_set_irq(%02X, %02X): Using IRQ %i\n", card, pci_int, irq_line); if (level && (pci_irq_hold[irq_line] & (1ULL << slot))) { - /* IRQ already held, do nothing. */ - pci_log("pci_set_irq(%02X, %02X): Card is already holding the IRQ\n", card, pci_int); - picintlevel(1 << irq_line); - return; + /* IRQ already held, do nothing. */ + pci_log("pci_set_irq(%02X, %02X): Card is already holding the IRQ\n", card, pci_int); + picintlevel(1 << irq_line); + return; } pci_log("pci_set_irq(%02X, %02X): Card not yet holding the IRQ\n", card, pci_int); if (!level || !pci_irq_hold[irq_line]) { - pci_log("pci_set_irq(%02X, %02X): Issuing %s-triggered IRQ (%sheld)\n", card, pci_int, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not "); + pci_log("pci_set_irq(%02X, %02X): Issuing %s-triggered IRQ (%sheld)\n", card, pci_int, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not "); - /* Only raise the interrupt if it's edge-triggered or level-triggered and not yet being held. */ - if (level) - picintlevel(1 << irq_line); - else - picint(1 << irq_line); + /* Only raise the interrupt if it's edge-triggered or level-triggered and not yet being held. */ + if (level) + picintlevel(1 << irq_line); + else + picint(1 << irq_line); } else if (level && pci_irq_hold[irq_line]) { - pci_log("pci_set_irq(%02X, %02X): IRQ line already being held\n", card, pci_int); - picintlevel(1 << irq_line); + pci_log("pci_set_irq(%02X, %02X): IRQ line already being held\n", card, pci_int); + picintlevel(1 << irq_line); } /* If the IRQ is level-triggered, mark that this card is holding it. */ if (level) { - pci_log("pci_set_irq(%02X, %02X): Marking that this card is holding the IRQ\n", card, pci_int); - pci_irq_hold[irq_line] |= (1ULL << slot); + pci_log("pci_set_irq(%02X, %02X): Marking that this card is holding the IRQ\n", card, pci_int); + pci_irq_hold[irq_line] |= (1ULL << slot); } else { - pci_log("pci_set_irq(%02X, %02X): Edge-triggered interrupt, not marking\n", card, pci_int); + pci_log("pci_set_irq(%02X, %02X): Edge-triggered interrupt, not marking\n", card, pci_int); } } - void pci_clear_mirq(uint8_t mirq, int level) { @@ -670,137 +660,133 @@ pci_clear_mirq(uint8_t mirq, int level) uint8_t irq_bit; if (mirq >= 0xf0) { - irq_line = mirq & 0x0f; - irq_bit = 0x1D; + irq_line = mirq & 0x0f; + irq_bit = 0x1D; } else { - if (mirq > 1) { - pci_log("pci_clear_mirq(%02X): Invalid MIRQ\n", mirq); - return; - } + if (mirq > 1) { + pci_log("pci_clear_mirq(%02X): Invalid MIRQ\n", mirq); + return; + } - if (! pci_mirqs[mirq].enabled) { - pci_log("pci_clear_mirq(%02X): MIRQ0 disabled\n", mirq); - return; - } + if (!pci_mirqs[mirq].enabled) { + pci_log("pci_clear_mirq(%02X): MIRQ0 disabled\n", mirq); + return; + } - if (pci_mirqs[mirq].irq_line > 0x0f) { - pci_log("pci_clear_mirq(%02X): IRQ line is disabled\n", mirq); - return; - } + if (pci_mirqs[mirq].irq_line > 0x0f) { + pci_log("pci_clear_mirq(%02X): IRQ line is disabled\n", mirq); + return; + } - irq_line = pci_mirqs[mirq].irq_line; - irq_bit = (0x1E + mirq); + irq_line = pci_mirqs[mirq].irq_line; + irq_bit = (0x1E + mirq); } pci_log("pci_clear_mirq(%02X): Using IRQ %i\n", mirq, irq_line); if (level && !(pci_irq_hold[irq_line] & (1ULL << irq_bit))) { - /* IRQ not held, do nothing. */ - pci_log("pci_clear_mirq(%02X): MIRQ is not holding the IRQ\n", mirq); - return; + /* IRQ not held, do nothing. */ + pci_log("pci_clear_mirq(%02X): MIRQ is not holding the IRQ\n", mirq); + return; } if (level) { - pci_log("pci_clear_mirq(%02X): Releasing this MIRQ's hold on the IRQ\n", mirq); - pci_irq_hold[irq_line] &= ~(1 << irq_bit); + pci_log("pci_clear_mirq(%02X): Releasing this MIRQ's hold on the IRQ\n", mirq); + pci_irq_hold[irq_line] &= ~(1 << irq_bit); - if (! pci_irq_hold[irq_line]) { - pci_log("pci_clear_mirq(%02X): IRQ no longer held by any card, clearing it\n", mirq); - picintc(1 << irq_line); - } else { - pci_log("pci_clear_mirq(%02X): IRQ is still being held\n", mirq); - } + if (!pci_irq_hold[irq_line]) { + pci_log("pci_clear_mirq(%02X): IRQ no longer held by any card, clearing it\n", mirq); + picintc(1 << irq_line); + } else { + pci_log("pci_clear_mirq(%02X): IRQ is still being held\n", mirq); + } } else { - pci_log("pci_clear_mirq(%02X): Clearing edge-triggered interrupt\n", mirq); - picintc(1 << irq_line); - } + pci_log("pci_clear_mirq(%02X): Clearing edge-triggered interrupt\n", mirq); + picintc(1 << irq_line); + } } - void pci_clear_irq(uint8_t card, uint8_t pci_int) { - uint8_t slot = 0; - uint8_t irq_routing = 0; + uint8_t slot = 0; + uint8_t irq_routing = 0; uint8_t pci_int_index = pci_int - PCI_INTA; - uint8_t irq_line = 0; - uint8_t level = 0; + uint8_t irq_line = 0; + uint8_t level = 0; - if (! last_pci_card) { - // pci_log("pci_clear_irq(%02X, %02X): No PCI slots (how are we even here?!)\n", card, pci_int); - return; + if (!last_pci_card) { + // pci_log("pci_clear_irq(%02X, %02X): No PCI slots (how are we even here?!)\n", card, pci_int); + return; } // pci_log("pci_clear_irq(%02X, %02X): %i PCI slots\n", card, pci_int, last_pci_card); slot = card; if (slot == 0xff) { - // pci_log("pci_clear_irq(%02X, %02X): Card is not on a PCI slot (how are we even here?!)\n", card, pci_int); - return; + // pci_log("pci_clear_irq(%02X, %02X): Card is not on a PCI slot (how are we even here?!)\n", card, pci_int); + return; } // pci_log("pci_clear_irq(%02X, %02X): Card is on PCI slot %02X\n", card, pci_int, slot); - if (! pci_cards[slot].irq_routing[pci_int_index]) { - // pci_log("pci_clear_irq(%02X, %02X): No IRQ routing for this slot and INT pin combination\n", card, pci_int); - return; + if (!pci_cards[slot].irq_routing[pci_int_index]) { + // pci_log("pci_clear_irq(%02X, %02X): No IRQ routing for this slot and INT pin combination\n", card, pci_int); + return; } if (pci_type & PCI_NO_IRQ_STEERING) - irq_line = pci_cards[slot].read(0, 0x3c, pci_cards[slot].priv); + irq_line = pci_cards[slot].read(0, 0x3c, pci_cards[slot].priv); else { - irq_routing = (pci_cards[slot].irq_routing[pci_int_index] - PCI_INTA) & 3; - // pci_log("pci_clear_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing); + irq_routing = (pci_cards[slot].irq_routing[pci_int_index] - PCI_INTA) & 3; + // pci_log("pci_clear_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing); - irq_line = pci_irqs[irq_routing]; - level = pci_irq_level[irq_routing]; + irq_line = pci_irqs[irq_routing]; + level = pci_irq_level[irq_routing]; } if (irq_line > 0x0f) { - // pci_log("pci_clear_irq(%02X, %02X): IRQ line is disabled\n", card, pci_int); - return; + // pci_log("pci_clear_irq(%02X, %02X): IRQ line is disabled\n", card, pci_int); + return; } // pci_log("pci_clear_irq(%02X, %02X): Using IRQ %i\n", card, pci_int, irq_line); if (level && !(pci_irq_hold[irq_line] & (1ULL << slot))) { - /* IRQ not held, do nothing. */ - // pci_log("pci_clear_irq(%02X, %02X): Card is not holding the IRQ\n", card, pci_int); - return; + /* IRQ not held, do nothing. */ + // pci_log("pci_clear_irq(%02X, %02X): Card is not holding the IRQ\n", card, pci_int); + return; } if (level) { - // pci_log("pci_clear_irq(%02X, %02X): Releasing this card's hold on the IRQ\n", card, pci_int); - pci_irq_hold[irq_line] &= ~(1 << slot); + // pci_log("pci_clear_irq(%02X, %02X): Releasing this card's hold on the IRQ\n", card, pci_int); + pci_irq_hold[irq_line] &= ~(1 << slot); - if (! pci_irq_hold[irq_line]) { - // pci_log("pci_clear_irq(%02X, %02X): IRQ no longer held by any card, clearing it\n", card, pci_int); - picintc(1 << irq_line); - } // else { - // pci_log("pci_clear_irq(%02X, %02X): IRQ is still being held\n", card, pci_int); - // } + if (!pci_irq_hold[irq_line]) { + // pci_log("pci_clear_irq(%02X, %02X): IRQ no longer held by any card, clearing it\n", card, pci_int); + picintc(1 << irq_line); + } // else { + // pci_log("pci_clear_irq(%02X, %02X): IRQ is still being held\n", card, pci_int); + // } } else { - // pci_log("pci_clear_irq(%02X, %02X): Clearing edge-triggered interrupt\n", card, pci_int); - picintc(1 << irq_line); + // pci_log("pci_clear_irq(%02X, %02X): Clearing edge-triggered interrupt\n", card, pci_int); + picintc(1 << irq_line); } } - uint8_t pci_get_int(uint8_t slot, uint8_t pci_int) { return pci_cards[slot].irq_routing[pci_int - PCI_INTA]; } - static void pci_reset_regs(void) { pci_index = pci_card = pci_func = pci_bus = pci_key = 0; io_removehandler(0xc000, 0x1000, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); + pci_type2_read, NULL, NULL, + pci_type2_write, NULL, NULL, NULL); } - void pci_pic_reset(void) { @@ -808,7 +794,6 @@ pci_pic_reset(void) pic_set_pci_flag(last_pci_card > 0); } - static void pci_reset_hard(void) { @@ -817,141 +802,130 @@ pci_reset_hard(void) pci_reset_regs(); for (i = 0; i < 16; i++) { - if (pci_irq_hold[i]) { - pci_irq_hold[i] = 0; + if (pci_irq_hold[i]) { + pci_irq_hold[i] = 0; - picintc(1 << i); - } + picintc(1 << i); + } } pci_pic_reset(); } - void pci_reset(void) { if (pci_switch) { - pci_pmc = 0x00; + pci_pmc = 0x00; - io_removehandler(0x0cf8, 1, - NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL); - io_removehandler(0x0cfc, 4, - pci_read,NULL,NULL, pci_write,NULL,NULL, NULL); - io_sethandler(0x0cf8, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); - io_sethandler(0x0cfa, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); + io_removehandler(0x0cf8, 1, + NULL, NULL, pci_cf8_read, NULL, NULL, pci_cf8_write, NULL); + io_removehandler(0x0cfc, 4, + pci_read, NULL, NULL, pci_write, NULL, NULL, NULL); + io_sethandler(0x0cf8, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); + io_sethandler(0x0cfa, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); } pci_reset_hard(); } - static void pci_slots_clear(void) { uint8_t i, j; last_pci_card = last_normal_pci_card = 0; - last_pci_bus = 1; + last_pci_bus = 1; for (i = 0; i < 32; i++) - pci_clear_slot(i); + pci_clear_slot(i); i = 0; do { - for (j = 0; j < 32; j++) - pci_card_to_slot_mapping[i][j] = 0xff; - pci_bus_number_to_index_mapping[i] = 0xff; + for (j = 0; j < 32; j++) + pci_card_to_slot_mapping[i][j] = 0xff; + pci_bus_number_to_index_mapping[i] = 0xff; } while (i++ < 0xff); pci_bus_number_to_index_mapping[0] = 0; /* always map bus 0 to index 0 */ } - uint32_t trc_readl(uint16_t port, void *priv) { return 0xffffffff; } - uint16_t trc_readw(uint16_t port, void *priv) { return 0xffff; } - uint8_t trc_read(uint16_t port, void *priv) { return trc_reg & 0xfb; } - static void trc_reset(uint8_t val) { if (val & 2) { - dma_reset(); - dma_set_at(1); + dma_reset(); + dma_set_at(1); - device_reset_all(); + device_reset_all(); - cpu_alt_reset = 0; + cpu_alt_reset = 0; - pci_reset(); - keyboard_at_reset(); + pci_reset(); + keyboard_at_reset(); - mem_a20_alt = 0; - mem_a20_recalc(); + mem_a20_alt = 0; + mem_a20_recalc(); - flushmmucache(); + flushmmucache(); } resetx86(); } - void trc_writel(uint16_t port, uint32_t val, void *priv) { } - void trc_writew(uint16_t port, uint16_t val, void *priv) { } - void trc_write(uint16_t port, uint8_t val, void *priv) { pci_log("TRC Write: %02X\n", val); if (!(trc_reg & 4) && (val & 4)) - trc_reset(val); + trc_reset(val); trc_reg = val & 0xfd; if (val & 2) - trc_reg &= 0xfb; + trc_reg &= 0xfb; } - void trc_init(void) { trc_reg = 0; io_sethandler(0x0cf9, 0x0001, - trc_read, trc_readw, trc_readl, trc_write, trc_writew, trc_writel, NULL); + trc_read, trc_readw, trc_readl, trc_write, trc_writew, trc_writel, NULL); } - void pci_init(int type) { @@ -963,167 +937,160 @@ pci_init(int type) trc_init(); - pci_type = type; + pci_type = type; pci_switch = !!(type & PCI_CAN_SWITCH_TYPE); if (pci_switch) { - pci_pmc = 0x00; + pci_pmc = 0x00; - io_sethandler(0x0cfb, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,pci_type2_writel, NULL); + io_sethandler(0x0cfb, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, pci_type2_writel, NULL); } if (type & PCI_NO_IRQ_STEERING) { - pic_elcr_io_handler(0); - pic_elcr_set_enabled(0); + pic_elcr_io_handler(0); + pic_elcr_set_enabled(0); } else { - pic_elcr_io_handler(1); - pic_elcr_set_enabled(1); + pic_elcr_io_handler(1); + pic_elcr_set_enabled(1); } if ((type & PCI_CONFIG_TYPE_MASK) == PCI_CONFIG_TYPE_1) { - io_sethandler(0x0cf8, 1, - NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL); - io_sethandler(0x0cfc, 4, - pci_read,pci_readw,pci_readl, pci_write,pci_writew,pci_writel, NULL); - pci_pmc = 1; + io_sethandler(0x0cf8, 1, + NULL, NULL, pci_cf8_read, NULL, NULL, pci_cf8_write, NULL); + io_sethandler(0x0cfc, 4, + pci_read, pci_readw, pci_readl, pci_write, pci_writew, pci_writel, NULL); + pci_pmc = 1; } else { - io_sethandler(0x0cf8, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); - io_sethandler(0x0cfa, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); - pci_pmc = 0; + io_sethandler(0x0cf8, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); + io_sethandler(0x0cfa, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); + pci_pmc = 0; } for (c = 0; c < 4; c++) { - pci_irqs[c] = PCI_IRQ_DISABLED; - pci_irq_level[c] = (type & PCI_NO_IRQ_STEERING) ? 0 : 1; + pci_irqs[c] = PCI_IRQ_DISABLED; + pci_irq_level[c] = (type & PCI_NO_IRQ_STEERING) ? 0 : 1; } for (c = 0; c < 3; c++) { - pci_mirqs[c].enabled = 0; - pci_mirqs[c].irq_line = PCI_IRQ_DISABLED; + pci_mirqs[c].enabled = 0; + pci_mirqs[c].irq_line = PCI_IRQ_DISABLED; } pic_set_pci_flag(1); } - uint8_t pci_register_bus() { return last_pci_bus++; } - void pci_remap_bus(uint8_t bus_index, uint8_t bus_number) { uint8_t i = 1; do { - if (pci_bus_number_to_index_mapping[i] == bus_index) - pci_bus_number_to_index_mapping[i] = 0xff; + if (pci_bus_number_to_index_mapping[i] == bus_index) + pci_bus_number_to_index_mapping[i] = 0xff; } while (i++ < 0xff); if ((bus_number > 0) && (bus_number < 0xff)) - pci_bus_number_to_index_mapping[bus_number] = bus_index; + pci_bus_number_to_index_mapping[bus_number] = bus_index; } - void pci_register_slot(int card, int type, int inta, int intb, int intc, int intd) { pci_register_bus_slot(0, card, type, inta, intb, intc, intd); } - void pci_register_bus_slot(int bus, int card, int type, int inta, int intb, int intc, int intd) { pci_card_t *dev = &pci_cards[last_pci_card]; - dev->bus = bus; - dev->id = card; - dev->type = type; - dev->irq_routing[0] = inta; - dev->irq_routing[1] = intb; - dev->irq_routing[2] = intc; - dev->irq_routing[3] = intd; - dev->read = NULL; - dev->write = NULL; - dev->priv = NULL; + dev->bus = bus; + dev->id = card; + dev->type = type; + dev->irq_routing[0] = inta; + dev->irq_routing[1] = intb; + dev->irq_routing[2] = intc; + dev->irq_routing[3] = intd; + dev->read = NULL; + dev->write = NULL; + dev->priv = NULL; pci_card_to_slot_mapping[bus][card] = last_pci_card; pci_log("pci_register_slot(): pci_cards[%i].bus = %02X; .id = %02X\n", last_pci_card, bus, card); if (type == PCI_CARD_NORMAL) - last_normal_pci_card = last_pci_card; + last_normal_pci_card = last_pci_card; last_pci_card++; } - uint8_t pci_find_slot(uint8_t add_type, uint8_t ignore_slot) { pci_card_t *dev; - uint8_t i, ret = 0xff; + uint8_t i, ret = 0xff; for (i = 0; i < last_pci_card; i++) { - dev = &pci_cards[i]; + dev = &pci_cards[i]; - if (!dev->read && !dev->write && ((ignore_slot == 0xff) || (i != ignore_slot))) { - if (add_type & PCI_ADD_STRICT) { - if (dev->type == (add_type & 0x7f)) { - ret = i; - break; - } - } else { - if (((dev->type == PCI_CARD_NORMAL) && ((add_type & 0x7f) >= PCI_ADD_NORMAL)) || - (dev->type == (add_type & 0x7f))) { - ret = i; - break; - } - } - } + if (!dev->read && !dev->write && ((ignore_slot == 0xff) || (i != ignore_slot))) { + if (add_type & PCI_ADD_STRICT) { + if (dev->type == (add_type & 0x7f)) { + ret = i; + break; + } + } else { + if (((dev->type == PCI_CARD_NORMAL) && ((add_type & 0x7f) >= PCI_ADD_NORMAL)) || (dev->type == (add_type & 0x7f))) { + ret = i; + break; + } + } + } } return ret; } - uint8_t pci_add_card(uint8_t add_type, uint8_t (*read)(int func, int addr, void *priv), void (*write)(int func, int addr, uint8_t val, void *priv), void *priv) { pci_card_t *dev; - uint8_t i, j; + uint8_t i, j; if (add_type < PCI_ADD_AGP) - pci_log("pci_add_card(): Adding PCI CARD at specific slot %02X [SPECIFIC]\n", add_type); + pci_log("pci_add_card(): Adding PCI CARD at specific slot %02X [SPECIFIC]\n", add_type); - if (! last_pci_card) { - pci_log("pci_add_card(): Adding PCI CARD failed (no PCI slots) [%s]\n", (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_AGP) ? "AGP" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : ((add_type == PCI_ADD_SCSI) ? "SCSI" : ((add_type == PCI_ADD_SOUND) ? "SOUND" : "SPECIFIC"))))); - return 0xff; + if (!last_pci_card) { + pci_log("pci_add_card(): Adding PCI CARD failed (no PCI slots) [%s]\n", (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_AGP) ? "AGP" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : ((add_type == PCI_ADD_SCSI) ? "SCSI" : ((add_type == PCI_ADD_SOUND) ? "SOUND" : "SPECIFIC"))))); + return 0xff; } /* First, find the next available slot. */ i = pci_find_slot(add_type, 0xff); if (i != 0xff) { - dev = &pci_cards[i]; - j = pci_find_slot(add_type, i); + dev = &pci_cards[i]; + j = pci_find_slot(add_type, i); - if (!(pci_type & PCI_NO_BRIDGES) && (dev->type == PCI_CARD_NORMAL) && (add_type != PCI_ADD_BRIDGE) && (j == 0xff)) { - pci_log("pci_add_card(): Reached last NORMAL slot, adding bridge to pci_cards[%i]\n", i); - device_add_inst(&dec21150_device, last_pci_bus); - i = pci_find_slot(add_type, 0xff); - dev = &pci_cards[i]; - } + if (!(pci_type & PCI_NO_BRIDGES) && (dev->type == PCI_CARD_NORMAL) && (add_type != PCI_ADD_BRIDGE) && (j == 0xff)) { + pci_log("pci_add_card(): Reached last NORMAL slot, adding bridge to pci_cards[%i]\n", i); + device_add_inst(&dec21150_device, last_pci_bus); + i = pci_find_slot(add_type, 0xff); + dev = &pci_cards[i]; + } - dev->read = read; - dev->write = write; - dev->priv = priv; - pci_log("pci_add_card(): Adding PCI CARD to pci_cards[%i] (bus %02X slot %02X) [%s]\n", i, dev->bus, dev->id, (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_AGP) ? "AGP" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : ((add_type == PCI_ADD_SCSI) ? "SCSI" : ((add_type == PCI_ADD_SOUND) ? "SOUND" : "SPECIFIC"))))); - return i; + dev->read = read; + dev->write = write; + dev->priv = priv; + pci_log("pci_add_card(): Adding PCI CARD to pci_cards[%i] (bus %02X slot %02X) [%s]\n", i, dev->bus, dev->id, (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_AGP) ? "AGP" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : ((add_type == PCI_ADD_SCSI) ? "SCSI" : ((add_type == PCI_ADD_SOUND) ? "SOUND" : "SPECIFIC"))))); + return i; } return 0xff; diff --git a/src/pci_dummy.c b/src/pci_dummy.c index d843b9ee9..22ed1522d 100644 --- a/src/pci_dummy.c +++ b/src/pci_dummy.c @@ -13,230 +13,225 @@ static uint8_t pci_regs[256]; static bar_t pci_bar[2]; static uint8_t interrupt_on = 0x00; -static uint8_t card = 0; +static uint8_t card = 0; -static void pci_dummy_interrupt(int set) +static void +pci_dummy_interrupt(int set) { - if (set) - { - pci_set_irq(card, pci_regs[0x3D]); - } - else - { - pci_clear_irq(card, pci_regs[0x3D]); - } -} - - -static uint8_t pci_dummy_read(uint16_t Port, void *p) -{ - uint8_t ret = 0; - - switch(Port & 0x20) - { - case 0x00: - return 0x1A; - case 0x01: - return 0x07; - case 0x02: - return 0x0B; - case 0x03: - return 0xAB; - case 0x04: - return pci_regs[0x3C]; - case 0x05: - return pci_regs[0x3D]; - case 0x06: - ret = interrupt_on; - if (interrupt_on) - { - pci_dummy_interrupt(0); - interrupt_on = 0; - } - return ret; - default: - return 0x00; - } -} - -static uint16_t pci_dummy_readw(uint16_t Port, void *p) -{ - return pci_dummy_read(Port, p); -} - - -static uint32_t pci_dummy_readl(uint16_t Port, void *p) -{ - return pci_dummy_read(Port, p); -} - - -static void pci_dummy_write(uint16_t Port, uint8_t Val, void *p) -{ - switch(Port & 0x20) - { - case 0x06: - if (!interrupt_on) - { - interrupt_on = 1; - pci_dummy_interrupt(1); - } - return; - default: - return; - } -} - -static void pci_dummy_writew(uint16_t Port, uint16_t Val, void *p) -{ - pci_dummy_write(Port, Val & 0xFF, p); -} - -static void pci_dummy_writel(uint16_t Port, uint32_t Val, void *p) -{ - pci_dummy_write(Port, Val & 0xFF, p); -} - - -static void pci_dummy_io_remove(void) -{ - io_removehandler(pci_bar[0].addr, 0x0020, pci_dummy_read, pci_dummy_readw, pci_dummy_readl, pci_dummy_write, pci_dummy_writew, pci_dummy_writel, NULL); -} - -static void pci_dummy_io_set(void) -{ - io_sethandler(pci_bar[0].addr, 0x0020, pci_dummy_read, pci_dummy_readw, pci_dummy_readl, pci_dummy_write, pci_dummy_writew, pci_dummy_writel, NULL); -} - - -static uint8_t pci_dummy_pci_read(int func, int addr, void *priv) -{ - pclog("AB0B:071A: PCI_Read(%d, %04x)\n", func, addr); - - switch(addr) { - case 0x00: - return 0x1A; - case 0x01: - return 0x07; - break; - - case 0x02: - return 0x0B; - case 0x03: - return 0xAB; - - case 0x04: /* PCI_COMMAND_LO */ - case 0x05: /* PCI_COMMAND_HI */ - return pci_regs[addr]; - - case 0x06: /* PCI_STATUS_LO */ - case 0x07: /* PCI_STATUS_HI */ - return pci_regs[addr]; - - case 0x08: - case 0x09: - return 0x00; - - case 0x0A: - return pci_regs[addr]; - - case 0x0B: - return pci_regs[addr]; - - case 0x10: /* PCI_BAR 7:5 */ - return (pci_bar[0].addr_regs[0] & 0xe0) | 0x01; - case 0x11: /* PCI_BAR 15:8 */ - return pci_bar[0].addr_regs[1]; - case 0x12: /* PCI_BAR 23:16 */ - return pci_bar[0].addr_regs[2]; - case 0x13: /* PCI_BAR 31:24 */ - return pci_bar[0].addr_regs[3]; - - case 0x2C: - return 0x1A; - case 0x2D: - return 0x07; - - case 0x2E: - return 0x0B; - case 0x2F: - return 0xAB; - - case 0x3C: /* PCI_ILR */ - return pci_regs[addr]; - - case 0x3D: /* PCI_IPR */ - return pci_regs[addr]; - - default: - return 0x00; + if (set) { + pci_set_irq(card, pci_regs[0x3D]); + } else { + pci_clear_irq(card, pci_regs[0x3D]); } } -static void pci_dummy_pci_write(int func, int addr, uint8_t val, void *priv) +static uint8_t +pci_dummy_read(uint16_t Port, void *p) +{ + uint8_t ret = 0; + + switch (Port & 0x20) { + case 0x00: + return 0x1A; + case 0x01: + return 0x07; + case 0x02: + return 0x0B; + case 0x03: + return 0xAB; + case 0x04: + return pci_regs[0x3C]; + case 0x05: + return pci_regs[0x3D]; + case 0x06: + ret = interrupt_on; + if (interrupt_on) { + pci_dummy_interrupt(0); + interrupt_on = 0; + } + return ret; + default: + return 0x00; + } +} + +static uint16_t +pci_dummy_readw(uint16_t Port, void *p) +{ + return pci_dummy_read(Port, p); +} + +static uint32_t +pci_dummy_readl(uint16_t Port, void *p) +{ + return pci_dummy_read(Port, p); +} + +static void +pci_dummy_write(uint16_t Port, uint8_t Val, void *p) +{ + switch (Port & 0x20) { + case 0x06: + if (!interrupt_on) { + interrupt_on = 1; + pci_dummy_interrupt(1); + } + return; + default: + return; + } +} + +static void +pci_dummy_writew(uint16_t Port, uint16_t Val, void *p) +{ + pci_dummy_write(Port, Val & 0xFF, p); +} + +static void +pci_dummy_writel(uint16_t Port, uint32_t Val, void *p) +{ + pci_dummy_write(Port, Val & 0xFF, p); +} + +static void +pci_dummy_io_remove(void) +{ + io_removehandler(pci_bar[0].addr, 0x0020, pci_dummy_read, pci_dummy_readw, pci_dummy_readl, pci_dummy_write, pci_dummy_writew, pci_dummy_writel, NULL); +} + +static void +pci_dummy_io_set(void) +{ + io_sethandler(pci_bar[0].addr, 0x0020, pci_dummy_read, pci_dummy_readw, pci_dummy_readl, pci_dummy_write, pci_dummy_writew, pci_dummy_writel, NULL); +} + +static uint8_t +pci_dummy_pci_read(int func, int addr, void *priv) +{ + pclog("AB0B:071A: PCI_Read(%d, %04x)\n", func, addr); + + switch (addr) { + case 0x00: + return 0x1A; + case 0x01: + return 0x07; + break; + + case 0x02: + return 0x0B; + case 0x03: + return 0xAB; + + case 0x04: /* PCI_COMMAND_LO */ + case 0x05: /* PCI_COMMAND_HI */ + return pci_regs[addr]; + + case 0x06: /* PCI_STATUS_LO */ + case 0x07: /* PCI_STATUS_HI */ + return pci_regs[addr]; + + case 0x08: + case 0x09: + return 0x00; + + case 0x0A: + return pci_regs[addr]; + + case 0x0B: + return pci_regs[addr]; + + case 0x10: /* PCI_BAR 7:5 */ + return (pci_bar[0].addr_regs[0] & 0xe0) | 0x01; + case 0x11: /* PCI_BAR 15:8 */ + return pci_bar[0].addr_regs[1]; + case 0x12: /* PCI_BAR 23:16 */ + return pci_bar[0].addr_regs[2]; + case 0x13: /* PCI_BAR 31:24 */ + return pci_bar[0].addr_regs[3]; + + case 0x2C: + return 0x1A; + case 0x2D: + return 0x07; + + case 0x2E: + return 0x0B; + case 0x2F: + return 0xAB; + + case 0x3C: /* PCI_ILR */ + return pci_regs[addr]; + + case 0x3D: /* PCI_IPR */ + return pci_regs[addr]; + + default: + return 0x00; + } +} + +static void +pci_dummy_pci_write(int func, int addr, uint8_t val, void *priv) { uint8_t valxor; pclog("AB0B:071A: PCI_Write(%d, %04x, %02x)\n", func, addr, val); - switch(addr) { - case 0x04: /* PCI_COMMAND_LO */ - valxor = (val & 0x03) ^ pci_regs[addr]; - if (valxor & PCI_COMMAND_IO) - { - pci_dummy_io_remove(); - if (((pci_bar[0].addr & 0xffe0) != 0) && (val & PCI_COMMAND_IO)) - { - pci_dummy_io_set(); - } - } - pci_regs[addr] = val & 0x03; - break; + switch (addr) { + case 0x04: /* PCI_COMMAND_LO */ + valxor = (val & 0x03) ^ pci_regs[addr]; + if (valxor & PCI_COMMAND_IO) { + pci_dummy_io_remove(); + if (((pci_bar[0].addr & 0xffe0) != 0) && (val & PCI_COMMAND_IO)) { + pci_dummy_io_set(); + } + } + pci_regs[addr] = val & 0x03; + break; - case 0x10: /* PCI_BAR */ - val &= 0xe0; /* 0xe0 acc to RTL DS */ - val |= 0x01; /* re-enable IOIN bit */ - /*FALLTHROUGH*/ + case 0x10: /* PCI_BAR */ + val &= 0xe0; /* 0xe0 acc to RTL DS */ + val |= 0x01; /* re-enable IOIN bit */ + /*FALLTHROUGH*/ - case 0x11: /* PCI_BAR */ - case 0x12: /* PCI_BAR */ - case 0x13: /* PCI_BAR */ - /* Remove old I/O. */ - pci_dummy_io_remove(); + case 0x11: /* PCI_BAR */ + case 0x12: /* PCI_BAR */ + case 0x13: /* PCI_BAR */ + /* Remove old I/O. */ + pci_dummy_io_remove(); - /* Set new I/O as per PCI request. */ - pci_bar[0].addr_regs[addr & 3] = val; + /* Set new I/O as per PCI request. */ + pci_bar[0].addr_regs[addr & 3] = val; - /* Then let's calculate the new I/O base. */ - pci_bar[0].addr &= 0xffe0; + /* Then let's calculate the new I/O base. */ + pci_bar[0].addr &= 0xffe0; - /* Log the new base. */ - pclog("AB0B:071A: PCI: new I/O base is %04X\n", pci_bar[0].addr); + /* Log the new base. */ + pclog("AB0B:071A: PCI: new I/O base is %04X\n", pci_bar[0].addr); - /* We're done, so get out of the here. */ - if (pci_regs[4] & PCI_COMMAND_IO) - { - if ((pci_bar[0].addr) != 0) - { - pci_dummy_io_set(); - } - } - break; + /* We're done, so get out of the here. */ + if (pci_regs[4] & PCI_COMMAND_IO) { + if ((pci_bar[0].addr) != 0) { + pci_dummy_io_set(); + } + } + break; - case 0x3C: /* PCI_ILR */ - pclog("AB0B:071A: IRQ now: %i\n", val); - pci_regs[addr] = val; - return; + case 0x3C: /* PCI_ILR */ + pclog("AB0B:071A: IRQ now: %i\n", val); + pci_regs[addr] = val; + return; } } - -void pci_dummy_init(void) +void +pci_dummy_init(void) { - card = pci_add_card(PCI_ADD_NORMAL, pci_dummy_pci_read, pci_dummy_pci_write, NULL); + card = pci_add_card(PCI_ADD_NORMAL, pci_dummy_pci_read, pci_dummy_pci_write, NULL); - pci_bar[0].addr_regs[0] = 0x01; - pci_regs[0x04] = 0x03; + pci_bar[0].addr_regs[0] = 0x01; + pci_regs[0x04] = 0x03; - pci_regs[0x3D] = PCI_INTD; + pci_regs[0x3D] = PCI_INTD; } diff --git a/src/pic.c b/src/pic.c index 12fd80264..b39e75e33 100644 --- a/src/pic.c +++ b/src/pic.c @@ -36,66 +36,58 @@ #include <86box/nvr.h> #include <86box/acpi.h> - -enum -{ +enum { STATE_NONE = 0, STATE_ICW2, STATE_ICW3, STATE_ICW4 }; +pic_t pic, pic2; -pic_t pic, pic2; +static pc_timer_t pic_timer; +static int shadow = 0, elcr_enabled = 0, + tmr_inited = 0, latched = 0, + pic_pci = 0; -static pc_timer_t pic_timer; - -static int shadow = 0, elcr_enabled = 0, - tmr_inited = 0, latched = 0, - pic_pci = 0; - -static uint16_t smi_irq_mask = 0x0000, - smi_irq_status = 0x0000; - -static void (*update_pending)(void); +static uint16_t smi_irq_mask = 0x0000, + smi_irq_status = 0x0000; +static void (*update_pending)(void); #ifdef ENABLE_PIC_LOG int pic_do_log = ENABLE_PIC_LOG; - static void pic_log(const char *fmt, ...) { va_list ap; if (pic_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define pic_log(fmt, ...) +# define pic_log(fmt, ...) #endif - void pic_reset_smi_irq_mask(void) { smi_irq_mask = 0x0000; } - void pic_set_smi_irq_mask(int irq, int set) { if ((irq >= 0) && (irq <= 15)) { - if (set) - smi_irq_mask |= (1 << irq); - else - smi_irq_mask &= ~(1 << irq); + if (set) + smi_irq_mask |= (1 << irq); + else + smi_irq_mask &= ~(1 << irq); } } @@ -105,15 +97,13 @@ pic_get_smi_irq_status(void) return smi_irq_status; } - void pic_clear_smi_irq_status(int irq) { if ((irq >= 0) && (irq <= 15)) - smi_irq_status &= ~(1 << irq); + smi_irq_status &= ~(1 << irq); } - void pic_elcr_write(uint16_t port, uint8_t val, void *priv) { @@ -122,25 +112,24 @@ pic_elcr_write(uint16_t port, uint8_t val, void *priv) pic_log("ELCR%i: WRITE %02X\n", port & 1, val); if (port & 1) - val &= 0xde; + val &= 0xde; else - val &= 0xf8; + val &= 0xf8; dev->elcr = val; pic_log("ELCR %i: %c %c %c %c %c %c %c %c\n", - port & 1, - (val & 1) ? 'L' : 'E', - (val & 2) ? 'L' : 'E', - (val & 4) ? 'L' : 'E', - (val & 8) ? 'L' : 'E', - (val & 0x10) ? 'L' : 'E', - (val & 0x20) ? 'L' : 'E', - (val & 0x40) ? 'L' : 'E', - (val & 0x80) ? 'L' : 'E'); + port & 1, + (val & 1) ? 'L' : 'E', + (val & 2) ? 'L' : 'E', + (val & 4) ? 'L' : 'E', + (val & 8) ? 'L' : 'E', + (val & 0x10) ? 'L' : 'E', + (val & 0x20) ? 'L' : 'E', + (val & 0x40) ? 'L' : 'E', + (val & 0x80) ? 'L' : 'E'); } - uint8_t pic_elcr_read(uint16_t port, void *priv) { @@ -151,110 +140,100 @@ pic_elcr_read(uint16_t port, void *priv) return dev->elcr; } - int pic_elcr_get_enabled(void) { return elcr_enabled; } - void pic_elcr_set_enabled(int enabled) { elcr_enabled = enabled; } - void pic_elcr_io_handler(int set) { io_handler(set, 0x04d0, 0x0001, - pic_elcr_read, NULL, NULL, - pic_elcr_write, NULL, NULL, &pic); + pic_elcr_read, NULL, NULL, + pic_elcr_write, NULL, NULL, &pic); io_handler(set, 0x04d1, 0x0001, - pic_elcr_read, NULL, NULL, - pic_elcr_write, NULL, NULL, &pic2); + pic_elcr_read, NULL, NULL, + pic_elcr_write, NULL, NULL, &pic2); } - static uint8_t pic_cascade_mode(pic_t *dev) { return !(dev->icw1 & 2); } - static __inline uint8_t pic_slave_on(pic_t *dev, int channel) { pic_log("pic_slave_on(%i): %i, %02X, %02X\n", channel, pic_cascade_mode(dev), dev->icw4 & 0x0c, dev->icw3 & (1 << channel)); - return pic_cascade_mode(dev) && (dev->is_master || ((dev->icw4 & 0x0c) == 0x0c)) && - (dev->icw3 & (1 << channel)); + return pic_cascade_mode(dev) && (dev->is_master || ((dev->icw4 & 0x0c) == 0x0c)) && (dev->icw3 & (1 << channel)); } - static __inline int find_best_interrupt(pic_t *dev) { uint8_t b; uint8_t intr; - int i, j; - int ret = -1; + int i, j; + int ret = -1; for (i = 0; i < 8; i++) { - j = (i + dev->priority) & 7; - b = 1 << j; + j = (i + dev->priority) & 7; + b = 1 << j; - if (dev->isr & b) - break; - else if ((dev->state == 0) && ((dev->irr & ~dev->imr) & b)) { - ret = j; - break; - } + if (dev->isr & b) + break; + else if ((dev->state == 0) && ((dev->irr & ~dev->imr) & b)) { + ret = j; + break; + } } intr = dev->interrupt = (ret == -1) ? 0x17 : ret; if (dev->at && (ret != 1)) { - if (dev == &pic2) - intr += 8; + if (dev == &pic2) + intr += 8; - if (cpu_fast_off_flags & (1u << intr)) - cpu_fast_off_advance(); + if (cpu_fast_off_flags & (1u << intr)) + cpu_fast_off_advance(); } return ret; } - static __inline void pic_update_pending_xt(void) { if (find_best_interrupt(&pic) != -1) { - latched++; - if (latched == 1) - timer_on_auto(&pic_timer, 0.35); + latched++; + if (latched == 1) + timer_on_auto(&pic_timer, 0.35); } else if (latched == 0) - pic.int_pending = 0; + pic.int_pending = 0; } - static __inline void pic_update_pending_at(void) { pic2.int_pending = (find_best_interrupt(&pic2) != -1); if (pic2.int_pending) - pic.irr |= (1 << pic2.icw3); + pic.irr |= (1 << pic2.icw3); else - pic.irr &= ~(1 << pic2.icw3); + pic.irr &= ~(1 << pic2.icw3); pic.int_pending = (find_best_interrupt(&pic) != -1); } - static void pic_callback(void *priv) { @@ -264,15 +243,14 @@ pic_callback(void *priv) latched--; if (latched > 0) - timer_on_auto(&pic_timer, 0.35); + timer_on_auto(&pic_timer, 0.35); } - void pic_reset() { int is_at = IS_AT(machine); - is_at = is_at || !strcmp(machine_get_internal_name(), "xi8088"); + is_at = is_at || !strcmp(machine_get_internal_name(), "xi8088"); memset(&pic, 0, sizeof(pic_t)); memset(&pic2, 0, sizeof(pic_t)); @@ -281,10 +259,10 @@ pic_reset() pic.interrupt = pic2.interrupt = 0x17; if (is_at) - pic.slaves[2] = &pic2; + pic.slaves[2] = &pic2; if (tmr_inited) - timer_on_auto(&pic_timer, 0.0); + timer_on_auto(&pic_timer, 0.0); memset(&pic_timer, 0x00, sizeof(pc_timer_t)); timer_add(&pic_timer, pic_callback, &pic, 0); tmr_inited = 1; @@ -294,76 +272,69 @@ pic_reset() smi_irq_mask = smi_irq_status = 0x0000; - shadow = 0; + shadow = 0; pic_pci = 0; } - void pic_set_shadow(int sh) { shadow = sh; } - void pic_set_pci_flag(int pci) { pic_pci = pci; } - static uint8_t pic_level_triggered(pic_t *dev, int irq) { if (elcr_enabled) - return !!(dev->elcr & (1 << irq)); + return !!(dev->elcr & (1 << irq)); else - return !!(dev->icw1 & 8); + return !!(dev->icw1 & 8); } - int picint_is_level(int irq) { return pic_level_triggered(((irq > 7) ? &pic2 : &pic), irq & 7); } - static void pic_acknowledge(pic_t *dev) { - int pic_int = dev->interrupt & 7; + int pic_int = dev->interrupt & 7; int pic_int_num = 1 << pic_int; dev->isr |= pic_int_num; if (!pic_level_triggered(dev, pic_int) || !(dev->lines & pic_int_num)) - dev->irr &= ~pic_int_num; + dev->irr &= ~pic_int_num; } - /* Find IRQ for non-specific EOI (either by command or automatic) by finding the highest IRQ priority with ISR bit set, that is also not masked if the PIC is in special mask mode. */ static uint8_t pic_non_specific_find(pic_t *dev) { - int i, j; + int i, j; uint8_t b, irq = 0xff; for (i = 0; i < 8; i++) { - j = (i + dev->priority) & 7; - b = (1 << j); + j = (i + dev->priority) & 7; + b = (1 << j); - if ((dev->isr & b) && (!dev->special_mask_mode || !(dev->imr & b))) { - irq = j; - break; - } + if ((dev->isr & b) && (!dev->special_mask_mode || !(dev->imr & b))) { + irq = j; + break; + } } return irq; } - /* Do the EOI and rotation, if either is requested, on the given IRQ. */ static void pic_action(pic_t *dev, uint8_t irq, uint8_t eoi, uint8_t rotate) @@ -371,16 +342,15 @@ pic_action(pic_t *dev, uint8_t irq, uint8_t eoi, uint8_t rotate) uint8_t b = (1 << irq); if (irq != 0xff) { - if (eoi) - dev->isr &= ~b; - if (rotate) - dev->priority = (irq + 1) & 7; + if (eoi) + dev->isr &= ~b; + if (rotate) + dev->priority = (irq + 1) & 7; - update_pending(); + update_pending(); } } - /* Automatic non-specific EOI. */ static __inline void pic_auto_non_specific_eoi(pic_t *dev) @@ -388,75 +358,73 @@ pic_auto_non_specific_eoi(pic_t *dev) uint8_t irq; if (dev->icw4 & 2) { - irq = pic_non_specific_find(dev); + irq = pic_non_specific_find(dev); - pic_action(dev, irq, 1, dev->auto_eoi_rotate); + pic_action(dev, irq, 1, dev->auto_eoi_rotate); } } - /* Do the PIC command specified by bits 7-5 of the value written to the OCW2 register. */ static void pic_command(pic_t *dev) { uint8_t irq = 0xff; - if (dev->ocw2 & 0x60) { /* SL and/or EOI set */ - if (dev->ocw2 & 0x40) /* SL set, specific priority level */ - irq = (dev->ocw2 & 0x07); - else /* SL clear, non-specific priority level (find highest with ISR set) */ - irq = pic_non_specific_find(dev); + if (dev->ocw2 & 0x60) { /* SL and/or EOI set */ + if (dev->ocw2 & 0x40) /* SL set, specific priority level */ + irq = (dev->ocw2 & 0x07); + else /* SL clear, non-specific priority level (find highest with ISR set) */ + irq = pic_non_specific_find(dev); pic_action(dev, irq, dev->ocw2 & 0x20, dev->ocw2 & 0x80); - } else /* SL and EOI clear */ - dev->auto_eoi_rotate = !!(dev->ocw2 & 0x80); + } else /* SL and EOI clear */ + dev->auto_eoi_rotate = !!(dev->ocw2 & 0x80); } - uint8_t pic_read(uint16_t addr, void *priv) { pic_t *dev = (pic_t *) priv; if (shadow) { - /* VIA PIC shadow read */ - if (addr & 0x0001) - dev->data_bus = ((dev->icw2 & 0xf8) >> 3) << 0; - else { - dev->data_bus = ((dev->ocw3 & 0x20) >> 5) << 4; - dev->data_bus |= ((dev->ocw2 & 0x80) >> 7) << 3; - dev->data_bus |= ((dev->icw4 & 0x10) >> 4) << 2; - dev->data_bus |= ((dev->icw4 & 0x02) >> 1) << 1; - dev->data_bus |= ((dev->icw4 & 0x08) >> 3) << 0; - } + /* VIA PIC shadow read */ + if (addr & 0x0001) + dev->data_bus = ((dev->icw2 & 0xf8) >> 3) << 0; + else { + dev->data_bus = ((dev->ocw3 & 0x20) >> 5) << 4; + dev->data_bus |= ((dev->ocw2 & 0x80) >> 7) << 3; + dev->data_bus |= ((dev->icw4 & 0x10) >> 4) << 2; + dev->data_bus |= ((dev->icw4 & 0x02) >> 1) << 1; + dev->data_bus |= ((dev->icw4 & 0x08) >> 3) << 0; + } } else { - /* Standard 8259 PIC read */ + /* Standard 8259 PIC read */ #ifndef UNDEFINED_READ - /* Put the IRR on to the data bus by default until the real PIC is probed. */ - dev->data_bus = dev->irr; + /* Put the IRR on to the data bus by default until the real PIC is probed. */ + dev->data_bus = dev->irr; #endif - if (dev->ocw3 & 0x04) { - dev->interrupt &= ~0x20; /* Freeze the interrupt until the poll is over. */ - if (dev->int_pending) { - dev->data_bus = 0x80 | (dev->interrupt & 7); - pic_acknowledge(dev); - dev->int_pending = 0; - update_pending(); - } else - dev->data_bus = 0x00; - dev->ocw3 &= ~0x04; - } else if (addr & 0x0001) - dev->data_bus = dev->imr; - else if (dev->ocw3 & 0x02) { - if (dev->ocw3 & 0x01) - dev->data_bus = dev->isr; + if (dev->ocw3 & 0x04) { + dev->interrupt &= ~0x20; /* Freeze the interrupt until the poll is over. */ + if (dev->int_pending) { + dev->data_bus = 0x80 | (dev->interrupt & 7); + pic_acknowledge(dev); + dev->int_pending = 0; + update_pending(); + } else + dev->data_bus = 0x00; + dev->ocw3 &= ~0x04; + } else if (addr & 0x0001) + dev->data_bus = dev->imr; + else if (dev->ocw3 & 0x02) { + if (dev->ocw3 & 0x01) + dev->data_bus = dev->isr; #ifdef UNDEFINED_READ - else - dev->data_bus = 0x00; + else + dev->data_bus = 0x00; #endif - } - /* If A0 = 0, VIA shadow is disabled, and poll mode is disabled, - simply read whatever is currently on the data bus. */ + } + /* If A0 = 0, VIA shadow is disabled, and poll mode is disabled, + simply read whatever is currently on the data bus. */ } pic_log("pic_read(%04X, %08X) = %02X\n", addr, priv, dev->data_bus); @@ -464,7 +432,6 @@ pic_read(uint16_t addr, void *priv) return dev->data_bus; } - static void pic_write(uint16_t addr, uint8_t val, void *priv) { @@ -475,77 +442,75 @@ pic_write(uint16_t addr, uint8_t val, void *priv) dev->data_bus = val; if (addr & 0x0001) { - switch (dev->state) { - case STATE_ICW2: - dev->icw2 = val; - if (pic_cascade_mode(dev)) - dev->state = STATE_ICW3; - else - dev->state = (dev->icw1 & 1) ? STATE_ICW4 : STATE_NONE; - break; - case STATE_ICW3: - dev->icw3 = val; - dev->state = (dev->icw1 & 1) ? STATE_ICW4 : STATE_NONE; - break; - case STATE_ICW4: - dev->icw4 = val; - dev->state = STATE_NONE; - break; - case STATE_NONE: - dev->imr = val; - update_pending(); - break; - } + switch (dev->state) { + case STATE_ICW2: + dev->icw2 = val; + if (pic_cascade_mode(dev)) + dev->state = STATE_ICW3; + else + dev->state = (dev->icw1 & 1) ? STATE_ICW4 : STATE_NONE; + break; + case STATE_ICW3: + dev->icw3 = val; + dev->state = (dev->icw1 & 1) ? STATE_ICW4 : STATE_NONE; + break; + case STATE_ICW4: + dev->icw4 = val; + dev->state = STATE_NONE; + break; + case STATE_NONE: + dev->imr = val; + update_pending(); + break; + } } else { - if (val & 0x10) { - /* Treat any write with any of the bits 7 to 5 set as invalid if PCI. */ - if (pic_pci && (val & 0xe0)) - return; + if (val & 0x10) { + /* Treat any write with any of the bits 7 to 5 set as invalid if PCI. */ + if (pic_pci && (val & 0xe0)) + return; - dev->icw1 = val; - dev->icw2 = dev->icw3 = 0x00; - if (!(dev->icw1 & 1)) - dev->icw4 = 0x00; - dev->ocw2 = dev->ocw3 = 0x00; - dev->irr = dev->lines; - dev->imr = dev->isr = 0x00; - dev->ack_bytes = dev->priority = 0x00; - dev->auto_eoi_rotate = dev->special_mask_mode = 0x00; - dev->interrupt = 0x17; - dev->int_pending = 0x00; - dev->state = STATE_ICW2; - update_pending(); - } else if (val & 0x08) { - dev->ocw3 = val; - if (dev->ocw3 & 0x04) - dev->interrupt |= 0x20; /* Freeze the interrupt until the poll is over. */ - if (dev->ocw3 & 0x40) - dev->special_mask_mode = !!(dev->ocw3 & 0x20); - } else { - dev->ocw2 = val; - pic_command(dev); - } + dev->icw1 = val; + dev->icw2 = dev->icw3 = 0x00; + if (!(dev->icw1 & 1)) + dev->icw4 = 0x00; + dev->ocw2 = dev->ocw3 = 0x00; + dev->irr = dev->lines; + dev->imr = dev->isr = 0x00; + dev->ack_bytes = dev->priority = 0x00; + dev->auto_eoi_rotate = dev->special_mask_mode = 0x00; + dev->interrupt = 0x17; + dev->int_pending = 0x00; + dev->state = STATE_ICW2; + update_pending(); + } else if (val & 0x08) { + dev->ocw3 = val; + if (dev->ocw3 & 0x04) + dev->interrupt |= 0x20; /* Freeze the interrupt until the poll is over. */ + if (dev->ocw3 & 0x40) + dev->special_mask_mode = !!(dev->ocw3 & 0x20); + } else { + dev->ocw2 = val; + pic_command(dev); + } } } - void pic_set_pci(void) { int i; for (i = 0x0024; i < 0x0040; i += 4) { - io_sethandler(i, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); - io_sethandler(i + 0x0080, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic2); + io_sethandler(i, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); + io_sethandler(i + 0x0080, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic2); } for (i = 0x1120; i < 0x1140; i += 4) { - io_sethandler(i, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); - io_sethandler(i + 0x0080, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic2); + io_sethandler(i, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); + io_sethandler(i + 0x0080, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic2); } } - void pic_init(void) { @@ -555,7 +520,6 @@ pic_init(void) io_sethandler(0x0020, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); } - void pic_init_pcjr(void) { @@ -565,7 +529,6 @@ pic_init_pcjr(void) io_sethandler(0x0020, 0x0008, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); } - void pic2_init(void) { @@ -573,152 +536,145 @@ pic2_init(void) pic.slaves[2] = &pic2; } - void picint_common(uint16_t num, int level, int set) { - int i, raise; + int i, raise; uint8_t b, slaves = 0; /* Make sure to ignore all slave IRQ's, and in case of AT+, translate IRQ 2 to IRQ 9. */ for (i = 0; i < 8; i++) { - b = (1 << i); - raise = num & b; + b = (1 << i); + raise = num & b; - if (pic.icw3 & b) { - slaves++; + if (pic.icw3 & b) { + slaves++; - if (raise) { - num &= ~b; - if (pic.at && (i == 2)) - num |= (1 << 9); - } - } + if (raise) { + num &= ~b; + if (pic.at && (i == 2)) + num |= (1 << 9); + } + } } if (!slaves) - num &= 0x00ff; + num &= 0x00ff; if (!num) { - pic_log("Attempting to %s null IRQ\n", set ? "raise" : "lower"); - return; + pic_log("Attempting to %s null IRQ\n", set ? "raise" : "lower"); + return; } if (num & 0x0100) - acpi_rtc_status = !!set; + acpi_rtc_status = !!set; if (set) { - if (smi_irq_mask & num) { - smi_raise(); - smi_irq_status |= num; - } + if (smi_irq_mask & num) { + smi_raise(); + smi_irq_status |= num; + } - if (num & 0xff00) { - if (level) - pic2.lines |= (num >> 8); + if (num & 0xff00) { + if (level) + pic2.lines |= (num >> 8); - pic2.irr |= (num >> 8); - } + pic2.irr |= (num >> 8); + } - if (num & 0x00ff) { - if (level) - pic.lines |= (num >> 8); + if (num & 0x00ff) { + if (level) + pic.lines |= (num >> 8); - pic.irr |= num; - } + pic.irr |= num; + } } else { - smi_irq_status &= ~num; + smi_irq_status &= ~num; - if (num & 0xff00) { - pic2.lines &= ~(num >> 8); - pic2.irr &= ~(num >> 8); - } + if (num & 0xff00) { + pic2.lines &= ~(num >> 8); + pic2.irr &= ~(num >> 8); + } - if (num & 0x00ff) { - pic.lines &= ~num; - pic.irr &= ~num; - } + if (num & 0x00ff) { + pic.lines &= ~num; + pic.irr &= ~num; + } } if (!(pic.interrupt & 0x20) && !(pic2.interrupt & 0x20)) - update_pending(); + update_pending(); } - void picint(uint16_t num) { picint_common(num, 0, 1); } - void picintlevel(uint16_t num) { picint_common(num, 1, 1); } - void picintc(uint16_t num) { picint_common(num, 0, 0); } - static uint8_t pic_i86_mode(pic_t *dev) { return !!(dev->icw4 & 1); } - static uint8_t pic_irq_ack_read(pic_t *dev, int phase) { - uint8_t intr = dev->interrupt & 0x47; + uint8_t intr = dev->interrupt & 0x47; uint8_t slave = intr & 0x40; intr &= 0x07; pic_log(" pic_irq_ack_read(%08X, %i)\n", dev, phase); if (dev != NULL) { - if (phase == 0) { - dev->interrupt |= 0x20; /* Freeze it so it still takes interrupts but they do not - override the one currently being processed. */ - pic_acknowledge(dev); - if (slave) - dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); - else - dev->data_bus = pic_i86_mode(dev) ? 0xff : 0xcd; - } else if (pic_i86_mode(dev)) { - dev->int_pending = 0; - if (slave) - dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); - else - dev->data_bus = intr + (dev->icw2 & 0xf8); - pic_auto_non_specific_eoi(dev); - } else if (phase == 1) { - if (slave) - dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); - else if (dev->icw1 & 0x04) - dev->data_bus = (intr << 2) + (dev->icw1 & 0xe0); - else - dev->data_bus = (intr << 3) + (dev->icw1 & 0xc0); - } else if (phase == 2) { - dev->int_pending = 0; - if (slave) - dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); - else - dev->data_bus = dev->icw2; - pic_auto_non_specific_eoi(dev); - } + if (phase == 0) { + dev->interrupt |= 0x20; /* Freeze it so it still takes interrupts but they do not + override the one currently being processed. */ + pic_acknowledge(dev); + if (slave) + dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); + else + dev->data_bus = pic_i86_mode(dev) ? 0xff : 0xcd; + } else if (pic_i86_mode(dev)) { + dev->int_pending = 0; + if (slave) + dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); + else + dev->data_bus = intr + (dev->icw2 & 0xf8); + pic_auto_non_specific_eoi(dev); + } else if (phase == 1) { + if (slave) + dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); + else if (dev->icw1 & 0x04) + dev->data_bus = (intr << 2) + (dev->icw1 & 0xe0); + else + dev->data_bus = (intr << 3) + (dev->icw1 & 0xc0); + } else if (phase == 2) { + dev->int_pending = 0; + if (slave) + dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); + else + dev->data_bus = dev->icw2; + pic_auto_non_specific_eoi(dev); + } } return dev->data_bus; } - uint8_t pic_irq_ack(void) { @@ -726,63 +682,62 @@ pic_irq_ack(void) /* Needed for Xi8088. */ if ((pic.ack_bytes == 0) && pic.int_pending && pic_slave_on(&pic, pic.interrupt)) { - if (!pic.slaves[pic.interrupt]->int_pending) { - /* If we are on AT, IRQ 2 is pending, and we cannot find a pending IRQ on PIC 2, fatal out. */ - fatal("IRQ %i pending on AT without a pending IRQ on PIC %i (normal)\n", pic.interrupt, pic.interrupt); - exit(-1); - return -1; - } + if (!pic.slaves[pic.interrupt]->int_pending) { + /* If we are on AT, IRQ 2 is pending, and we cannot find a pending IRQ on PIC 2, fatal out. */ + fatal("IRQ %i pending on AT without a pending IRQ on PIC %i (normal)\n", pic.interrupt, pic.interrupt); + exit(-1); + return -1; + } - pic.interrupt |= 0x40; /* Mark slave pending. */ + pic.interrupt |= 0x40; /* Mark slave pending. */ } - ret = pic_irq_ack_read(&pic, pic.ack_bytes); + ret = pic_irq_ack_read(&pic, pic.ack_bytes); pic.ack_bytes = (pic.ack_bytes + 1) % (pic_i86_mode(&pic) ? 2 : 3); if (pic.ack_bytes == 0) { - /* Needed for Xi8088. */ - if (pic.interrupt & 0x40) - pic2.interrupt = 0x17; - pic.interrupt = 0x17; - update_pending(); + /* Needed for Xi8088. */ + if (pic.interrupt & 0x40) + pic2.interrupt = 0x17; + pic.interrupt = 0x17; + update_pending(); } return ret; } - int picinterrupt() { int i, ret = -1; if (pic.int_pending) { - if (pic_slave_on(&pic, pic.interrupt)) { - if (!pic.slaves[pic.interrupt]->int_pending) { - /* If we are on AT, IRQ 2 is pending, and we cannot find a pending IRQ on PIC 2, fatal out. */ - fatal("IRQ %i pending on AT without a pending IRQ on PIC %i (normal)\n", pic.interrupt, pic.interrupt); - exit(-1); - return -1; - } + if (pic_slave_on(&pic, pic.interrupt)) { + if (!pic.slaves[pic.interrupt]->int_pending) { + /* If we are on AT, IRQ 2 is pending, and we cannot find a pending IRQ on PIC 2, fatal out. */ + fatal("IRQ %i pending on AT without a pending IRQ on PIC %i (normal)\n", pic.interrupt, pic.interrupt); + exit(-1); + return -1; + } - pic.interrupt |= 0x40; /* Mark slave pending. */ - } + pic.interrupt |= 0x40; /* Mark slave pending. */ + } - if ((pic.interrupt == 0) && (pit_devs[1].data != NULL)) - pit_devs[1].set_gate(pit_devs[1].data, 0, 0); + if ((pic.interrupt == 0) && (pit_devs[1].data != NULL)) + pit_devs[1].set_gate(pit_devs[1].data, 0, 0); - /* Two ACK's - do them in a loop to avoid potential compiler misoptimizations. */ - for (i = 0; i < 2; i++) { - ret = pic_irq_ack_read(&pic, pic.ack_bytes); - pic.ack_bytes = (pic.ack_bytes + 1) % (pic_i86_mode(&pic) ? 2 : 3); + /* Two ACK's - do them in a loop to avoid potential compiler misoptimizations. */ + for (i = 0; i < 2; i++) { + ret = pic_irq_ack_read(&pic, pic.ack_bytes); + pic.ack_bytes = (pic.ack_bytes + 1) % (pic_i86_mode(&pic) ? 2 : 3); - if (pic.ack_bytes == 0) { - if (pic.interrupt & 0x40) - pic2.interrupt = 0x17; - pic.interrupt = 0x17; - update_pending(); - } - } + if (pic.ack_bytes == 0) { + if (pic.interrupt & 0x40) + pic2.interrupt = 0x17; + pic.interrupt = 0x17; + update_pending(); + } + } } return ret; diff --git a/src/pit.c b/src/pit.c index ba71928ca..392701056 100644 --- a/src/pit.c +++ b/src/pit.c @@ -43,91 +43,84 @@ pit_intf_t pit_devs[2]; -double cpuclock, PITCONSTD, - SYSCLK, - isa_timing, - bus_timing, pci_timing, agp_timing, - PCICLK, AGPCLK; +double cpuclock, PITCONSTD, + SYSCLK, + isa_timing, + bus_timing, pci_timing, agp_timing, + PCICLK, AGPCLK; -uint64_t PITCONST, ISACONST, - CGACONST, - MDACONST, HERCCONST, - VGACONST1, VGACONST2, - RTCCONST, ACPICONST; +uint64_t PITCONST, ISACONST, + CGACONST, + MDACONST, HERCCONST, + VGACONST1, VGACONST2, + RTCCONST, ACPICONST; -int refresh_at_enable = 1, - io_delay = 5; +int refresh_at_enable = 1, + io_delay = 5; +int64_t firsttime = 1; -int64_t firsttime = 1; - - -#define PIT_PS2 16 /* The PIT is the PS/2's second PIT. */ -#define PIT_EXT_IO 32 /* The PIT has externally specified port I/O. */ -#define PIT_CUSTOM_CLOCK 64 /* The PIT uses custom clock inputs provided by another provider. */ -#define PIT_SECONDARY 128 /* The PIT is secondary (ports 0048-004B). */ - +#define PIT_PS2 16 /* The PIT is the PS/2's second PIT. */ +#define PIT_EXT_IO 32 /* The PIT has externally specified port I/O. */ +#define PIT_CUSTOM_CLOCK 64 /* The PIT uses custom clock inputs provided by another provider. */ +#define PIT_SECONDARY 128 /* The PIT is secondary (ports 0048-004B). */ #ifdef ENABLE_PIT_LOG int pit_do_log = ENABLE_PIT_LOG; - static void pit_log(const char *fmt, ...) { va_list ap; if (pit_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define pit_log(fmt, ...) +# define pit_log(fmt, ...) #endif - static void ctr_set_out(ctr_t *ctr, int out) { if (ctr == NULL) - return; + return; if (ctr->out_func != NULL) - ctr->out_func(out, ctr->out); + ctr->out_func(out, ctr->out); ctr->out = out; } - static void ctr_decrease_count(ctr_t *ctr) { if (ctr->bcd) { - ctr->units--; - if (ctr->units == -1) { - ctr->units = -7; - ctr->tens--; - if (ctr->tens == -1) { - ctr->tens = -7; - ctr->hundreds--; - if (ctr->hundreds == -1) { - ctr->hundreds = -7; - ctr->thousands--; - if (ctr->thousands == -1) { - ctr->thousands = -7; - ctr->myriads--; - if (ctr->myriads == -1) - ctr->myriads = -7; /* 0 - 1 should wrap around to 9999. */ - } - } - } - } + ctr->units--; + if (ctr->units == -1) { + ctr->units = -7; + ctr->tens--; + if (ctr->tens == -1) { + ctr->tens = -7; + ctr->hundreds--; + if (ctr->hundreds == -1) { + ctr->hundreds = -7; + ctr->thousands--; + if (ctr->thousands == -1) { + ctr->thousands = -7; + ctr->myriads--; + if (ctr->myriads == -1) + ctr->myriads = -7; /* 0 - 1 should wrap around to 9999. */ + } + } + } + } } else - ctr->count = (ctr->count - 1) & 0xffff; + ctr->count = (ctr->count - 1) & 0xffff; } - static void ctr_load_count(ctr_t *ctr) { @@ -136,313 +129,310 @@ ctr_load_count(ctr_t *ctr) ctr->count = l; pit_log("ctr->count = %i\n", l); ctr->null_count = 0; - ctr->newcount = !!(l & 1); + ctr->newcount = !!(l & 1); } - static void ctr_tick(ctr_t *ctr) { uint8_t state = ctr->state; if (state == 1) { - /* This is true for all modes */ - ctr_load_count(ctr); - ctr->state = 2; - if ((ctr->m & 0x07) == 0x01) - ctr_set_out(ctr, 0); - return; + /* This is true for all modes */ + ctr_load_count(ctr); + ctr->state = 2; + if ((ctr->m & 0x07) == 0x01) + ctr_set_out(ctr, 0); + return; } - switch(ctr->m & 0x07) { - case 0: - /* Interrupt on terminal count */ - switch (state) { - case 2: - if (ctr->gate && (ctr->count >= 1)) { - ctr_decrease_count(ctr); - if (ctr->count < 1) { - ctr->state = 3; - ctr_set_out(ctr, 1); - } - } - break; - case 3: - ctr_decrease_count(ctr); - break; - } - break; - case 1: - /* Hardware retriggerable one-shot */ - switch (state) { - case 1: - ctr_load_count(ctr); - ctr->state = 2; - ctr_set_out(ctr, 0); - break; - case 2: - if (ctr->count >= 1) { - ctr_decrease_count(ctr); - if (ctr->count < 1) { - ctr->state = 3; - ctr_set_out(ctr, 1); - } - } - break; - case 3: - ctr_decrease_count(ctr); - break; - } - break; - case 2: case 6: - /* Rate generator */ - switch (state) { - case 3: - ctr_load_count(ctr); - ctr->state = 2; - ctr_set_out(ctr, 1); - break; - case 2: - if (ctr->gate == 0) - break; - else if (ctr->count >= 2) { - ctr_decrease_count(ctr); - if (ctr->count < 2) { - ctr->state = 3; - ctr_set_out(ctr, 0); - } - } - break; - } - break; - case 3: case 7: - /* Square wave mode */ - switch (state) { - case 2: - if (ctr->gate == 0) - break; - else if (ctr->count >= 0) { - if (ctr->bcd) { - ctr_decrease_count(ctr); - if (!ctr->newcount) - ctr_decrease_count(ctr); - } else - ctr->count -= (ctr->newcount ? 1 : 2); - if (ctr->count < 0) { - ctr_load_count(ctr); - ctr->state = 3; - ctr_set_out(ctr, 0); - } else if (ctr->newcount) - ctr->newcount = 0; - } - break; - case 3: - if (ctr->gate == 0) - break; - else if (ctr->count >= 0) { - if (ctr->bcd) { - ctr_decrease_count(ctr); - ctr_decrease_count(ctr); - if (ctr->newcount) - ctr_decrease_count(ctr); - } else - ctr->count -= (ctr->newcount ? 3 : 2); - if (ctr->count < 0) { - ctr_load_count(ctr); - ctr->state = 2; - ctr_set_out(ctr, 1); - } else if (ctr->newcount) - ctr->newcount = 0; - } - break; - } - break; - case 4: case 5: - /* Software triggered strobe */ - /* Hardware triggered strobe */ - if ((ctr->gate != 0) || (ctr->m != 4)) { - switch(state) { - case 0: - ctr_decrease_count(ctr); - break; - case 2: - if (ctr->count >= 1) { - ctr_decrease_count(ctr); - if (ctr->count < 1) { - ctr->state = 3; - ctr_set_out(ctr, 0); - } - } - break; - case 3: - ctr->state = 0; - ctr_set_out(ctr, 1); - break; - } - } - break; - default: - break; + switch (ctr->m & 0x07) { + case 0: + /* Interrupt on terminal count */ + switch (state) { + case 2: + if (ctr->gate && (ctr->count >= 1)) { + ctr_decrease_count(ctr); + if (ctr->count < 1) { + ctr->state = 3; + ctr_set_out(ctr, 1); + } + } + break; + case 3: + ctr_decrease_count(ctr); + break; + } + break; + case 1: + /* Hardware retriggerable one-shot */ + switch (state) { + case 1: + ctr_load_count(ctr); + ctr->state = 2; + ctr_set_out(ctr, 0); + break; + case 2: + if (ctr->count >= 1) { + ctr_decrease_count(ctr); + if (ctr->count < 1) { + ctr->state = 3; + ctr_set_out(ctr, 1); + } + } + break; + case 3: + ctr_decrease_count(ctr); + break; + } + break; + case 2: + case 6: + /* Rate generator */ + switch (state) { + case 3: + ctr_load_count(ctr); + ctr->state = 2; + ctr_set_out(ctr, 1); + break; + case 2: + if (ctr->gate == 0) + break; + else if (ctr->count >= 2) { + ctr_decrease_count(ctr); + if (ctr->count < 2) { + ctr->state = 3; + ctr_set_out(ctr, 0); + } + } + break; + } + break; + case 3: + case 7: + /* Square wave mode */ + switch (state) { + case 2: + if (ctr->gate == 0) + break; + else if (ctr->count >= 0) { + if (ctr->bcd) { + ctr_decrease_count(ctr); + if (!ctr->newcount) + ctr_decrease_count(ctr); + } else + ctr->count -= (ctr->newcount ? 1 : 2); + if (ctr->count < 0) { + ctr_load_count(ctr); + ctr->state = 3; + ctr_set_out(ctr, 0); + } else if (ctr->newcount) + ctr->newcount = 0; + } + break; + case 3: + if (ctr->gate == 0) + break; + else if (ctr->count >= 0) { + if (ctr->bcd) { + ctr_decrease_count(ctr); + ctr_decrease_count(ctr); + if (ctr->newcount) + ctr_decrease_count(ctr); + } else + ctr->count -= (ctr->newcount ? 3 : 2); + if (ctr->count < 0) { + ctr_load_count(ctr); + ctr->state = 2; + ctr_set_out(ctr, 1); + } else if (ctr->newcount) + ctr->newcount = 0; + } + break; + } + break; + case 4: + case 5: + /* Software triggered strobe */ + /* Hardware triggered strobe */ + if ((ctr->gate != 0) || (ctr->m != 4)) { + switch (state) { + case 0: + ctr_decrease_count(ctr); + break; + case 2: + if (ctr->count >= 1) { + ctr_decrease_count(ctr); + if (ctr->count < 1) { + ctr->state = 3; + ctr_set_out(ctr, 0); + } + } + break; + case 3: + ctr->state = 0; + ctr_set_out(ctr, 1); + break; + } + } + break; + default: + break; } } - static void ctr_clock(void *data, int counter_id) { - pit_t *pit = (pit_t *)data; + pit_t *pit = (pit_t *) data; ctr_t *ctr = &pit->counters[counter_id]; - /* FIXME: Is this even needed? */ + /* FIXME: Is this even needed? */ if ((ctr->state == 3) && (ctr->m != 2) && (ctr->m != 3)) - return; + return; if (ctr->using_timer) - return; + return; ctr_tick(ctr); } - static void ctr_set_state_1(ctr_t *ctr) { uint8_t mode = (ctr->m & 0x03); if ((mode == 0) || ((mode > 1) && (ctr->state == 0))) - ctr->state = 1; + ctr->state = 1; } - static void ctr_load(ctr_t *ctr) { if (ctr->l == 1) { - /* Count of 1 is illegal in modes 2 and 3. What happens here was - determined experimentally. */ - if (ctr->m == 2) - ctr->l = 2; - else if (ctr->m == 3) - ctr->l = 0; + /* Count of 1 is illegal in modes 2 and 3. What happens here was + determined experimentally. */ + if (ctr->m == 2) + ctr->l = 2; + else if (ctr->m == 3) + ctr->l = 0; } if (ctr->using_timer) - ctr->latch = 1; + ctr->latch = 1; else - ctr_set_state_1(ctr); + ctr_set_state_1(ctr); if (ctr->load_func != NULL) - ctr->load_func(ctr->m, ctr->l ? ctr->l : 0x10000); + ctr->load_func(ctr->m, ctr->l ? ctr->l : 0x10000); pit_log("Counter loaded, state = %i, gate = %i\n", ctr->state, ctr->gate); } - static __inline void ctr_latch_status(ctr_t *ctr) { - ctr->read_status = (ctr->ctrl & 0x3f) | (ctr->out ? 0x80 : 0) | (ctr->null_count ? 0x40 : 0); + ctr->read_status = (ctr->ctrl & 0x3f) | (ctr->out ? 0x80 : 0) | (ctr->null_count ? 0x40 : 0); ctr->do_read_status = 1; } - static __inline void ctr_latch_count(ctr_t *ctr) { int count = (ctr->latch || (ctr->state == 1)) ? ctr->l : ctr->count; switch (ctr->rm & 0x03) { - case 0x00: - /* This should never happen. */ - break; - case 0x01: - /* Latch bits 0-7 only. */ - ctr->rl = ((count << 8) & 0xff00) | (count & 0xff); - ctr->latched = 1; - break; - case 0x02: - /* Latch bit 8-15 only. */ - ctr->rl = (count & 0xff00) | ((count >> 8) & 0xff); - ctr->latched = 1; - break; - case 0x03: - /* Latch all 16 bits. */ - ctr->rl = count; - ctr->latched = 2; - break; + case 0x00: + /* This should never happen. */ + break; + case 0x01: + /* Latch bits 0-7 only. */ + ctr->rl = ((count << 8) & 0xff00) | (count & 0xff); + ctr->latched = 1; + break; + case 0x02: + /* Latch bit 8-15 only. */ + ctr->rl = (count & 0xff00) | ((count >> 8) & 0xff); + ctr->latched = 1; + break; + case 0x03: + /* Latch all 16 bits. */ + ctr->rl = count; + ctr->latched = 2; + break; } pit_log("latched counter = %04X\n", ctr->rl & 0xffff); } - uint16_t pit_ctr_get_count(void *data, int counter_id) { - pit_t *pit = (pit_t *)data; + pit_t *pit = (pit_t *) data; ctr_t *ctr = &pit->counters[counter_id]; return (uint16_t) ctr->l; } - void pit_ctr_set_load_func(void *data, int counter_id, void (*func)(uint8_t new_m, int new_count)) { if (data == NULL) - return; + return; - pit_t *pit = (pit_t *)data; + pit_t *pit = (pit_t *) data; ctr_t *ctr = &pit->counters[counter_id]; ctr->load_func = func; } - void pit_ctr_set_out_func(void *data, int counter_id, void (*func)(int new_out, int old_out)) { if (data == NULL) - return; + return; - pit_t *pit = (pit_t *)data; + pit_t *pit = (pit_t *) data; ctr_t *ctr = &pit->counters[counter_id]; ctr->out_func = func; } - void pit_ctr_set_gate(void *data, int counter_id, int gate) { - pit_t *pit = (pit_t *)data; + pit_t *pit = (pit_t *) data; ctr_t *ctr = &pit->counters[counter_id]; - int old = ctr->gate; + int old = ctr->gate; uint8_t mode = ctr->m & 3; ctr->gate = gate; switch (mode) { - case 1: case 2: case 3: case 5: case 6: case 7: - if (!old && gate) { - /* Here we handle the rising edges. */ - if (mode & 1) { - if (mode != 1) - ctr_set_out(ctr, 1); - ctr->state = 1; - } else if (mode == 2) - ctr->state = 3; - } else if (old && !gate) { - /* Here we handle the lowering edges. */ - if (mode & 2) - ctr_set_out(ctr, 1); - } - break; - } + case 1: + case 2: + case 3: + case 5: + case 6: + case 7: + if (!old && gate) { + /* Here we handle the rising edges. */ + if (mode & 1) { + if (mode != 1) + ctr_set_out(ctr, 1); + ctr->state = 1; + } else if (mode == 2) + ctr->state = 3; + } else if (old && !gate) { + /* Here we handle the lowering edges. */ + if (mode & 2) + ctr_set_out(ctr, 1); + } + break; + } } - static __inline void pit_ctr_set_clock_common(ctr_t *ctr, int clock) { @@ -451,232 +441,231 @@ pit_ctr_set_clock_common(ctr_t *ctr, int clock) ctr->clock = clock; if (ctr->using_timer && ctr->latch) { - if (old && !ctr->clock) { - ctr_set_state_1(ctr); - ctr->latch = 0; - } + if (old && !ctr->clock) { + ctr_set_state_1(ctr); + ctr->latch = 0; + } } else if (ctr->using_timer && !ctr->latch) { - if (ctr->state == 1) { - if (!old && ctr->clock) - ctr->s1_det = 1; /* Rising edge. */ - else if (old && !ctr->clock) { - ctr->s1_det++; /* Falling edge. */ - if (ctr->s1_det >= 2) { - ctr->s1_det = 0; - ctr_tick(ctr); - } - } - } else if (old && !ctr->clock) - ctr_tick(ctr); + if (ctr->state == 1) { + if (!old && ctr->clock) + ctr->s1_det = 1; /* Rising edge. */ + else if (old && !ctr->clock) { + ctr->s1_det++; /* Falling edge. */ + if (ctr->s1_det >= 2) { + ctr->s1_det = 0; + ctr_tick(ctr); + } + } + } else if (old && !ctr->clock) + ctr_tick(ctr); } } - void pit_ctr_set_clock(ctr_t *ctr, int clock) { pit_ctr_set_clock_common(ctr, clock); } - void pit_ctr_set_using_timer(void *data, int counter_id, int using_timer) { if (tsc > 0) timer_process(); - pit_t *pit = (pit_t *)data; - ctr_t *ctr = &pit->counters[counter_id]; + pit_t *pit = (pit_t *) data; + ctr_t *ctr = &pit->counters[counter_id]; ctr->using_timer = using_timer; } - static void pit_timer_over(void *p) { pit_t *dev = (pit_t *) p; - int i; + int i; dev->clock ^= 1; for (i = 0; i < 3; i++) - pit_ctr_set_clock_common(&dev->counters[i], dev->clock); + pit_ctr_set_clock_common(&dev->counters[i], dev->clock); timer_advance_u64(&dev->callback_timer, PITCONST >> 1ULL); } - static void pit_write(uint16_t addr, uint8_t val, void *priv) { - pit_t *dev = (pit_t *)priv; - int t = (addr & 3); + pit_t *dev = (pit_t *) priv; + int t = (addr & 3); ctr_t *ctr; pit_log("[%04X:%08X] pit_write(%04X, %02X, %08X)\n", CS, cpu_state.pc, addr, val, priv); switch (addr & 3) { - case 3: /* control */ - t = val >> 6; + case 3: /* control */ + t = val >> 6; - if (t == 3) { - if (dev->flags & PIT_8254) { - /* This is 8254-only. */ - if (!(val & 0x20)) { - if (val & 2) - ctr_latch_count(&dev->counters[0]); - if (val & 4) - ctr_latch_count(&dev->counters[1]); - if (val & 8) - ctr_latch_count(&dev->counters[2]); - pit_log("PIT %i: Initiated readback command\n", t); - } - if (!(val & 0x10)) { - if (val & 2) - ctr_latch_status(&dev->counters[0]); - if (val & 4) - ctr_latch_status(&dev->counters[1]); - if (val & 8) - ctr_latch_status(&dev->counters[2]); - } - } - } else { - dev->ctrl = val; - ctr = &dev->counters[t]; + if (t == 3) { + if (dev->flags & PIT_8254) { + /* This is 8254-only. */ + if (!(val & 0x20)) { + if (val & 2) + ctr_latch_count(&dev->counters[0]); + if (val & 4) + ctr_latch_count(&dev->counters[1]); + if (val & 8) + ctr_latch_count(&dev->counters[2]); + pit_log("PIT %i: Initiated readback command\n", t); + } + if (!(val & 0x10)) { + if (val & 2) + ctr_latch_status(&dev->counters[0]); + if (val & 4) + ctr_latch_status(&dev->counters[1]); + if (val & 8) + ctr_latch_status(&dev->counters[2]); + } + } + } else { + dev->ctrl = val; + ctr = &dev->counters[t]; - if (!(dev->ctrl & 0x30)) { - ctr_latch_count(ctr); - pit_log("PIT %i: Initiated latched read, %i bytes latched\n", - t, ctr->latched); - } else { - ctr->ctrl = val; - ctr->rm = ctr->wm = (ctr->ctrl >> 4) & 3; - ctr->m = (val >> 1) & 7; - if (ctr->m > 5) - ctr->m &= 3; - ctr->null_count = 1; - ctr->bcd = (ctr->ctrl & 0x01); - ctr_set_out(ctr, !!ctr->m); - ctr->state = 0; - if (ctr->latched) { - pit_log("PIT %i: Reload while counter is latched\n", t); - ctr->rl--; - } + if (!(dev->ctrl & 0x30)) { + ctr_latch_count(ctr); + pit_log("PIT %i: Initiated latched read, %i bytes latched\n", + t, ctr->latched); + } else { + ctr->ctrl = val; + ctr->rm = ctr->wm = (ctr->ctrl >> 4) & 3; + ctr->m = (val >> 1) & 7; + if (ctr->m > 5) + ctr->m &= 3; + ctr->null_count = 1; + ctr->bcd = (ctr->ctrl & 0x01); + ctr_set_out(ctr, !!ctr->m); + ctr->state = 0; + if (ctr->latched) { + pit_log("PIT %i: Reload while counter is latched\n", t); + ctr->rl--; + } - pit_log("PIT %i: M = %i, RM/WM = %i, State = %i, Out = %i\n", t, ctr->m, ctr->rm, ctr->state, ctr->out); - } - } - break; + pit_log("PIT %i: M = %i, RM/WM = %i, State = %i, Out = %i\n", t, ctr->m, ctr->rm, ctr->state, ctr->out); + } + } + break; - case 0: - case 1: - case 2: /* the actual timers */ - ctr = &dev->counters[t]; + case 0: + case 1: + case 2: /* the actual timers */ + ctr = &dev->counters[t]; - switch (ctr->wm) { - case 0: - /* This should never happen. */ - break; - case 1: - ctr->l = val; - if (ctr->m == 0) - ctr_set_out(ctr, 0); - ctr_load(ctr); - break; - case 2: - ctr->l = (val << 8); - if (ctr->m == 0) - ctr_set_out(ctr, 0); - ctr_load(ctr); - break; - case 3: case 0x83: - if (ctr->wm & 0x80) { - ctr->l = (ctr->l & 0x00ff) | (val << 8); - pit_log("PIT %i: Written high byte %02X, latch now %04X\n", t, val, ctr->l); - ctr_load(ctr); - } else { - ctr->l = (ctr->l & 0xff00) | val; - pit_log("PIT %i: Written low byte %02X, latch now %04X\n", t, val, ctr->l); - if (ctr->m == 0) { - ctr->state = 0; - ctr_set_out(ctr, 0); - } - } + switch (ctr->wm) { + case 0: + /* This should never happen. */ + break; + case 1: + ctr->l = val; + if (ctr->m == 0) + ctr_set_out(ctr, 0); + ctr_load(ctr); + break; + case 2: + ctr->l = (val << 8); + if (ctr->m == 0) + ctr_set_out(ctr, 0); + ctr_load(ctr); + break; + case 3: + case 0x83: + if (ctr->wm & 0x80) { + ctr->l = (ctr->l & 0x00ff) | (val << 8); + pit_log("PIT %i: Written high byte %02X, latch now %04X\n", t, val, ctr->l); + ctr_load(ctr); + } else { + ctr->l = (ctr->l & 0xff00) | val; + pit_log("PIT %i: Written low byte %02X, latch now %04X\n", t, val, ctr->l); + if (ctr->m == 0) { + ctr->state = 0; + ctr_set_out(ctr, 0); + } + } - if (ctr->wm & 0x80) - ctr->wm &= ~0x80; - else - ctr->wm |= 0x80; - break; - } - break; + if (ctr->wm & 0x80) + ctr->wm &= ~0x80; + else + ctr->wm |= 0x80; + break; + } + break; } } - static uint8_t pit_read(uint16_t addr, void *priv) { - pit_t *dev = (pit_t *)priv; + pit_t *dev = (pit_t *) priv; uint8_t ret = 0xff; - int count, t = (addr & 3); - ctr_t *ctr; + int count, t = (addr & 3); + ctr_t *ctr; switch (addr & 3) { - case 3: /* Control. */ - /* This is 8254-only, 8253 returns 0x00. */ - ret = (dev->flags & PIT_8254) ? dev->ctrl : 0x00; - break; + case 3: /* Control. */ + /* This is 8254-only, 8253 returns 0x00. */ + ret = (dev->flags & PIT_8254) ? dev->ctrl : 0x00; + break; - case 0: - case 1: - case 2: /* The actual timers. */ - ctr = &dev->counters[t]; + case 0: + case 1: + case 2: /* The actual timers. */ + ctr = &dev->counters[t]; - if (ctr->do_read_status) { - ctr->do_read_status = 0; - ret = ctr->read_status; - break; - } + if (ctr->do_read_status) { + ctr->do_read_status = 0; + ret = ctr->read_status; + break; + } - count = (ctr->state == 1) ? ctr->l : ctr->count; + count = (ctr->state == 1) ? ctr->l : ctr->count; - if (ctr->latched) { - ret = (ctr->rl) >> ((ctr->rm & 0x80) ? 8 : 0); + if (ctr->latched) { + ret = (ctr->rl) >> ((ctr->rm & 0x80) ? 8 : 0); - if (ctr->rm & 0x80) - ctr->rm &= ~0x80; - else - ctr->rm |= 0x80; + if (ctr->rm & 0x80) + ctr->rm &= ~0x80; + else + ctr->rm |= 0x80; - ctr->latched--; - } else switch (ctr->rm) { - case 0: case 0x80: - ret = 0x00; - break; + ctr->latched--; + } else + switch (ctr->rm) { + case 0: + case 0x80: + ret = 0x00; + break; - case 1: - ret = count & 0xff; - break; + case 1: + ret = count & 0xff; + break; - case 2: - ret = count >> 8; - break; + case 2: + ret = count >> 8; + break; - case 3: case 0x83: - /* Yes, wm is correct here - this is to ensure correct readout while the - count is being written. */ - if (ctr->wm & 0x80) - ret = ~(ctr->l & 0xff); - else - ret = count >> ((ctr->rm & 0x80) ? 8 : 0); + case 3: + case 0x83: + /* Yes, wm is correct here - this is to ensure correct readout while the + count is being written. */ + if (ctr->wm & 0x80) + ret = ~(ctr->l & 0xff); + else + ret = count >> ((ctr->rm & 0x80) ? 8 : 0); - if (ctr->rm & 0x80) - ctr->rm &= ~0x80; - else - ctr->rm |= 0x80; - break; - } - break; + if (ctr->rm & 0x80) + ctr->rm &= ~0x80; + else + ctr->rm |= 0x80; + break; + } + break; } pit_log("[%04X:%08X] pit_read(%04X, %08X) = %02X\n", CS, cpu_state.pc, addr, priv, ret); @@ -684,88 +673,81 @@ pit_read(uint16_t addr, void *priv) return ret; } - void pit_irq0_timer_ps2(int new_out, int old_out) { if (new_out && !old_out) { - picint(1); - pit_devs[1].set_gate(pit_devs[1].data, 0, 1); + picint(1); + pit_devs[1].set_gate(pit_devs[1].data, 0, 1); } if (!new_out) - picintc(1); + picintc(1); if (!new_out && old_out) - pit_devs[1].ctr_clock(pit_devs[1].data, 0); + pit_devs[1].ctr_clock(pit_devs[1].data, 0); } - void pit_refresh_timer_xt(int new_out, int old_out) { if (new_out && !old_out) - dma_channel_read(0); + dma_channel_read(0); } - void pit_refresh_timer_at(int new_out, int old_out) { if (refresh_at_enable && new_out && !old_out) - ppi.pb ^= 0x10; + ppi.pb ^= 0x10; } - void pit_speaker_timer(int new_out, int old_out) { int l; if (cassette != NULL) - pc_cas_set_out(cassette, new_out); + pc_cas_set_out(cassette, new_out); speaker_update(); uint16_t count = pit_devs[0].get_count(pit_devs[0].data, 2); - l = count ? count : 0x10000; + l = count ? count : 0x10000; if (l < 25) - speakon = 0; + speakon = 0; else - speakon = new_out; + speakon = new_out; ppispeakon = new_out; } - void pit_nmi_timer_ps2(int new_out, int old_out) { nmi = new_out; if (nmi) - nmi_auto_clear = 1; + nmi_auto_clear = 1; } - static void ctr_reset(ctr_t *ctr) { - ctr->ctrl = 0; - ctr->m = 0; - ctr->gate = 0; - ctr->l = 0xffff; + ctr->ctrl = 0; + ctr->m = 0; + ctr->gate = 0; + ctr->l = 0xffff; ctr->using_timer = 1; - ctr->state = 0; - ctr->null_count = 1; + ctr->state = 0; + ctr->null_count = 1; ctr->latch = 0; ctr->s1_det = 0; - ctr->l_det = 0; + ctr->l_det = 0; } - void pit_reset(pit_t *dev) { @@ -776,36 +758,33 @@ pit_reset(pit_t *dev) dev->clock = 0; for (i = 0; i < 3; i++) - ctr_reset(&dev->counters[i]); + ctr_reset(&dev->counters[i]); /* Disable speaker gate. */ dev->counters[2].gate = 0; } - void pit_handler(int set, uint16_t base, int size, void *priv) { io_handler(set, base, size, pit_read, NULL, NULL, pit_write, NULL, NULL, priv); } - static void pit_close(void *priv) { pit_t *dev = (pit_t *) priv; if (dev == pit_devs[0].data) - pit_devs[0].data = NULL; + pit_devs[0].data = NULL; if (dev == pit_devs[1].data) - pit_devs[1].data = NULL; + pit_devs[1].data = NULL; if (dev != NULL) - free(dev); + free(dev); } - static void * pit_init(const device_t *info) { @@ -813,124 +792,123 @@ pit_init(const device_t *info) pit_reset(dev); if (!(dev->flags & PIT_PS2) && !(dev->flags & PIT_CUSTOM_CLOCK)) { - timer_add(&dev->callback_timer, pit_timer_over, (void *) dev, 0); - timer_set_delay_u64(&dev->callback_timer, PITCONST >> 1ULL); + timer_add(&dev->callback_timer, pit_timer_over, (void *) dev, 0); + timer_set_delay_u64(&dev->callback_timer, PITCONST >> 1ULL); } dev->flags = info->local; if (!(dev->flags & PIT_EXT_IO)) { - io_sethandler((dev->flags & PIT_SECONDARY) ? 0x0048 : 0x0040, 0x0004, - pit_read, NULL, NULL, pit_write, NULL, NULL, dev); + io_sethandler((dev->flags & PIT_SECONDARY) ? 0x0048 : 0x0040, 0x0004, + pit_read, NULL, NULL, pit_write, NULL, NULL, dev); } return dev; } const device_t i8253_device = { - .name = "Intel 8253/8253-5 Programmable Interval Timer", + .name = "Intel 8253/8253-5 Programmable Interval Timer", .internal_name = "i8253", - .flags = DEVICE_ISA, - .local = PIT_8253, - .init = pit_init, - .close = pit_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8253, + .init = pit_init, + .close = pit_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_device = { - .name = "Intel 8254 Programmable Interval Timer", + .name = "Intel 8254 Programmable Interval Timer", .internal_name = "i8254", - .flags = DEVICE_ISA, - .local = PIT_8254, - .init = pit_init, - .close = pit_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254, + .init = pit_init, + .close = pit_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_sec_device = { - .name = "Intel 8254 Programmable Interval Timer (Secondary)", + .name = "Intel 8254 Programmable Interval Timer (Secondary)", .internal_name = "i8254_sec", - .flags = DEVICE_ISA, - .local = PIT_8254 | PIT_SECONDARY, - .init = pit_init, - .close = pit_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254 | PIT_SECONDARY, + .init = pit_init, + .close = pit_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_ext_io_device = { - .name = "Intel 8254 Programmable Interval Timer (External I/O)", + .name = "Intel 8254 Programmable Interval Timer (External I/O)", .internal_name = "i8254_ext_io", - .flags = DEVICE_ISA, - .local = PIT_8254 | PIT_EXT_IO, - .init = pit_init, - .close = pit_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254 | PIT_EXT_IO, + .init = pit_init, + .close = pit_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_ps2_device = { - .name = "Intel 8254 Programmable Interval Timer (PS/2)", + .name = "Intel 8254 Programmable Interval Timer (PS/2)", .internal_name = "i8254_ps2", - .flags = DEVICE_ISA, - .local = PIT_8254 | PIT_PS2 | PIT_EXT_IO, - .init = pit_init, - .close = pit_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254 | PIT_PS2 | PIT_EXT_IO, + .init = pit_init, + .close = pit_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; pit_t * pit_common_init(int type, void (*out0)(int new_out, int old_out), void (*out1)(int new_out, int old_out)) { - int i; + int i; void *pit; pit_intf_t *pit_intf = &pit_devs[0]; switch (type) { - case PIT_8253: - default: - pit = device_add(&i8253_device); - *pit_intf = pit_classic_intf; - break; - case PIT_8254: - pit = device_add(&i8254_device); - *pit_intf = pit_classic_intf; - break; - case PIT_8253_FAST: - pit = device_add(&i8253_fast_device); - *pit_intf = pit_fast_intf; - break; - case PIT_8254_FAST: - pit = device_add(&i8254_fast_device); - *pit_intf = pit_fast_intf; - break; - + case PIT_8253: + default: + pit = device_add(&i8253_device); + *pit_intf = pit_classic_intf; + break; + case PIT_8254: + pit = device_add(&i8254_device); + *pit_intf = pit_classic_intf; + break; + case PIT_8253_FAST: + pit = device_add(&i8253_fast_device); + *pit_intf = pit_fast_intf; + break; + case PIT_8254_FAST: + pit = device_add(&i8254_fast_device); + *pit_intf = pit_fast_intf; + break; } pit_intf->data = pit; for (i = 0; i < 3; i++) { - pit_intf->set_gate(pit_intf->data, i, 1); - pit_intf->set_using_timer(pit_intf->data, i, 1); + pit_intf->set_gate(pit_intf->data, i, 1); + pit_intf->set_using_timer(pit_intf->data, i, 1); } pit_intf->set_out_func(pit_intf->data, 0, out0); @@ -943,7 +921,6 @@ pit_common_init(int type, void (*out0)(int new_out, int old_out), void (*out1)(i return pit; } - pit_t * pit_ps2_init(int type) { @@ -954,12 +931,12 @@ pit_ps2_init(int type) switch (type) { case PIT_8254: default: - pit = device_add(&i8254_ps2_device); + pit = device_add(&i8254_ps2_device); *ps2_pit = pit_classic_intf; break; case PIT_8254_FAST: - pit = device_add(&i8254_ps2_fast_device); + pit = device_add(&i8254_ps2_fast_device); *ps2_pit = pit_fast_intf; break; } @@ -980,106 +957,105 @@ pit_ps2_init(int type) return pit; } - void pit_set_clock(int clock) { /* Set default CPU/crystal clock and xt_cpu_multi. */ if (cpu_s->cpu_type >= CPU_286) { - int remainder = (clock % 100000000); - if (remainder == 66666666) - cpuclock = (double) (clock - remainder) + (200000000.0 / 3.0); - else if (remainder == 33333333) - cpuclock = (double) (clock - remainder) + (100000000.0 / 3.0); - else - cpuclock = (double) clock; + int remainder = (clock % 100000000); + if (remainder == 66666666) + cpuclock = (double) (clock - remainder) + (200000000.0 / 3.0); + else if (remainder == 33333333) + cpuclock = (double) (clock - remainder) + (100000000.0 / 3.0); + else + cpuclock = (double) clock; - PITCONSTD = (cpuclock / 1193182.0); - PITCONST = (uint64_t) (PITCONSTD * (double)(1ull << 32)); - CGACONST = (uint64_t) ((cpuclock / (19687503.0/11.0)) * (double)(1ull << 32)); - ISACONST = (uint64_t) ((cpuclock / (double)cpu_isa_speed) * (double)(1ull << 32)); - xt_cpu_multi = 1ULL; + PITCONSTD = (cpuclock / 1193182.0); + PITCONST = (uint64_t) (PITCONSTD * (double) (1ull << 32)); + CGACONST = (uint64_t) ((cpuclock / (19687503.0 / 11.0)) * (double) (1ull << 32)); + ISACONST = (uint64_t) ((cpuclock / (double) cpu_isa_speed) * (double) (1ull << 32)); + xt_cpu_multi = 1ULL; } else { - cpuclock = 14318184.0; - PITCONSTD = 12.0; - PITCONST = (12ULL << 32ULL); - CGACONST = (8ULL << 32ULL); - xt_cpu_multi = 3ULL; + cpuclock = 14318184.0; + PITCONSTD = 12.0; + PITCONST = (12ULL << 32ULL); + CGACONST = (8ULL << 32ULL); + xt_cpu_multi = 3ULL; - switch (cpu_s->rspeed) { - case 7159092: - if (cpu_s->cpu_flags & CPU_ALTERNATE_XTAL) { - cpuclock = 28636368.0; - xt_cpu_multi = 4ULL; - } else - xt_cpu_multi = 2ULL; - break; + switch (cpu_s->rspeed) { + case 7159092: + if (cpu_s->cpu_flags & CPU_ALTERNATE_XTAL) { + cpuclock = 28636368.0; + xt_cpu_multi = 4ULL; + } else + xt_cpu_multi = 2ULL; + break; - case 8000000: - cpuclock = 24000000.0; - break; - case 9545456: - cpuclock = 28636368.0; - break; - case 10000000: - cpuclock = 30000000.0; - break; - case 12000000: - cpuclock = 36000000.0; - break; - case 16000000: - cpuclock = 48000000.0; - break; + case 8000000: + cpuclock = 24000000.0; + break; + case 9545456: + cpuclock = 28636368.0; + break; + case 10000000: + cpuclock = 30000000.0; + break; + case 12000000: + cpuclock = 36000000.0; + break; + case 16000000: + cpuclock = 48000000.0; + break; - default: - if (cpu_s->cpu_flags & CPU_ALTERNATE_XTAL) { - cpuclock = 28636368.0; - xt_cpu_multi = 6ULL; - } - break; - } + default: + if (cpu_s->cpu_flags & CPU_ALTERNATE_XTAL) { + cpuclock = 28636368.0; + xt_cpu_multi = 6ULL; + } + break; + } - if (cpuclock == 28636368.0) { - PITCONSTD = 24.0; - PITCONST = (24ULL << 32LL); - CGACONST = (16ULL << 32LL); - } else if (cpuclock != 14318184.0) { - PITCONSTD = (cpuclock / 1193182.0); - PITCONST = (uint64_t) (PITCONSTD * (double)(1ull << 32)); - CGACONST = (uint64_t) (((cpuclock/(19687503.0/11.0)) * (double)(1ull << 32))); - } + if (cpuclock == 28636368.0) { + PITCONSTD = 24.0; + PITCONST = (24ULL << 32LL); + CGACONST = (16ULL << 32LL); + } else if (cpuclock != 14318184.0) { + PITCONSTD = (cpuclock / 1193182.0); + PITCONST = (uint64_t) (PITCONSTD * (double) (1ull << 32)); + CGACONST = (uint64_t) (((cpuclock / (19687503.0 / 11.0)) * (double) (1ull << 32))); + } - ISACONST = (1ULL << 32ULL); + ISACONST = (1ULL << 32ULL); } xt_cpu_multi <<= 32ULL; /* Delay for empty I/O ports. */ io_delay = (int) round(((double) cpu_s->rspeed) / 3000000.0); - MDACONST = (uint64_t) (cpuclock / 2032125.0 * (double)(1ull << 32)); + MDACONST = (uint64_t) (cpuclock / 2032125.0 * (double) (1ull << 32)); HERCCONST = MDACONST; - VGACONST1 = (uint64_t) (cpuclock / 25175000.0 * (double)(1ull << 32)); - VGACONST2 = (uint64_t) (cpuclock / 28322000.0 * (double)(1ull << 32)); - RTCCONST = (uint64_t) (cpuclock / 32768.0 * (double)(1ull << 32)); + VGACONST1 = (uint64_t) (cpuclock / 25175000.0 * (double) (1ull << 32)); + VGACONST2 = (uint64_t) (cpuclock / 28322000.0 * (double) (1ull << 32)); + RTCCONST = (uint64_t) (cpuclock / 32768.0 * (double) (1ull << 32)); - TIMER_USEC = (uint64_t)((cpuclock / 1000000.0) * (double)(1ull << 32)); + TIMER_USEC = (uint64_t) ((cpuclock / 1000000.0) * (double) (1ull << 32)); - isa_timing = (cpuclock / (double)cpu_isa_speed); + isa_timing = (cpuclock / (double) cpu_isa_speed); if (cpu_64bitbus) - bus_timing = (cpuclock / ((double)cpu_busspeed / 2)); + bus_timing = (cpuclock / ((double) cpu_busspeed / 2)); else - bus_timing = (cpuclock / (double)cpu_busspeed); - pci_timing = (cpuclock / (double)cpu_pci_speed); - agp_timing = (cpuclock / (double)cpu_agp_speed); + bus_timing = (cpuclock / (double) cpu_busspeed); + pci_timing = (cpuclock / (double) cpu_pci_speed); + agp_timing = (cpuclock / (double) cpu_agp_speed); /* PCICLK in us for use with timer_on_auto(). */ PCICLK = pci_timing / (cpuclock / 1000000.0); AGPCLK = agp_timing / (cpuclock / 1000000.0); if (cpu_busspeed >= 30000000) - SYSCLK = bus_timing * 4.0; + SYSCLK = bus_timing * 4.0; else - SYSCLK = bus_timing * 3.0; + SYSCLK = bus_timing * 3.0; video_update_timing(); diff --git a/src/pit_fast.c b/src/pit_fast.c index 758183d5e..d029cf3ee 100644 --- a/src/pit_fast.c +++ b/src/pit_fast.c @@ -41,10 +41,10 @@ #include <86box/snd_speaker.h> #include <86box/video.h> -#define PIT_PS2 16 /* The PIT is the PS/2's second PIT. */ -#define PIT_EXT_IO 32 /* The PIT has externally specified port I/O. */ -#define PIT_CUSTOM_CLOCK 64 /* The PIT uses custom clock inputs provided by another provider. */ -#define PIT_SECONDARY 128 /* The PIT is secondary (ports 0048-004B). */ +#define PIT_PS2 16 /* The PIT is the PS/2's second PIT. */ +#define PIT_EXT_IO 32 /* The PIT has externally specified port I/O. */ +#define PIT_CUSTOM_CLOCK 64 /* The PIT uses custom clock inputs provided by another provider. */ +#define PIT_SECONDARY 128 /* The PIT is secondary (ports 0048-004B). */ #ifdef ENABLE_PIT_LOG int pit_do_log = ENABLE_PIT_LOG; @@ -61,7 +61,7 @@ pit_log(const char *fmt, ...) } } #else -#define pit_log(fmt, ...) +# define pit_log(fmt, ...) #endif static void @@ -81,7 +81,7 @@ pitf_ctr_set_load_func(void *data, int counter_id, void (*func)(uint8_t new_m, i if (data == NULL) return; - pitf_t *pit = (pitf_t *)data; + pitf_t *pit = (pitf_t *) data; ctrf_t *ctr = &pit->counters[counter_id]; ctr->load_func = func; @@ -90,7 +90,7 @@ pitf_ctr_set_load_func(void *data, int counter_id, void (*func)(uint8_t new_m, i static uint16_t pitf_ctr_get_count(void *data, int counter_id) { - pitf_t *pit = (pitf_t *)data; + pitf_t *pit = (pitf_t *) data; ctrf_t *ctr = &pit->counters[counter_id]; return (uint16_t) ctr->l; } @@ -101,7 +101,7 @@ pitf_ctr_set_out_func(void *data, int counter_id, void (*func)(int new_out, int if (data == NULL) return; - pitf_t *pit = (pitf_t *)data; + pitf_t *pit = (pitf_t *) data; ctrf_t *ctr = &pit->counters[counter_id]; ctr->out_func = func; @@ -113,8 +113,8 @@ pitf_ctr_set_using_timer(void *data, int counter_id, int using_timer) if (tsc > 0) timer_process(); - pitf_t *pit = (pitf_t *)data; - ctrf_t *ctr = &pit->counters[counter_id]; + pitf_t *pit = (pitf_t *) data; + ctrf_t *ctr = &pit->counters[counter_id]; ctr->using_timer = using_timer; } @@ -266,7 +266,7 @@ pitf_set_gate_no_timer(ctrf_t *ctr, int gate) ctr->enabled = gate; break; } - ctr->gate = gate; + ctr->gate = gate; ctr->running = ctr->enabled && ctr->using_timer && !ctr->disabled; if (ctr->using_timer && !ctr->running) pitf_dump_and_disable_timer(ctr); @@ -275,7 +275,7 @@ pitf_set_gate_no_timer(ctrf_t *ctr, int gate) static void pitf_ctr_set_gate(void *data, int counter_id, int gate) { - pitf_t *pit = (pitf_t *)data; + pitf_t *pit = (pitf_t *) data; ctrf_t *ctr = &pit->counters[counter_id]; if (ctr->disabled) { @@ -375,7 +375,7 @@ pitf_ctr_latch_count(ctrf_t *ctr) static __inline void pitf_ctr_latch_status(ctrf_t *ctr) { - ctr->read_status = (ctr->ctrl & 0x3f) | (ctr->out ? 0x80 : 0); + ctr->read_status = (ctr->ctrl & 0x3f) | (ctr->out ? 0x80 : 0); ctr->do_read_status = 1; } @@ -383,7 +383,7 @@ static void pitf_write(uint16_t addr, uint8_t val, void *priv) { pitf_t *dev = (pitf_t *) priv; - int t = (addr & 3); + int t = (addr & 3); ctrf_t *ctr; pit_log("[%04X:%08X] pit_write(%04X, %02X, %08X)\n", CS, cpu_state.pc, addr, val, priv); @@ -479,10 +479,10 @@ pitf_write(uint16_t addr, uint8_t val, void *priv) static uint8_t pitf_read(uint16_t addr, void *priv) { - pitf_t *dev = (pitf_t *) priv; + pitf_t *dev = (pitf_t *) priv; uint8_t ret = 0xff; int t = (addr & 3); - ctrf_t *ctr; + ctrf_t *ctr; switch (addr & 3) { case 3: /* Control. */ @@ -548,7 +548,7 @@ pitf_timer_over(void *p) static void pitf_ctr_clock(void *data, int counter_id) { - pitf_t *pit = (pitf_t *)data; + pitf_t *pit = (pitf_t *) data; ctrf_t *ctr = &pit->counters[counter_id]; if (ctr->thit || !ctr->enabled) @@ -565,11 +565,11 @@ pitf_ctr_clock(void *data, int counter_id) static void ctr_reset(ctrf_t *ctr) { - ctr->ctrl = 0; - ctr->m = 0; - ctr->gate = 0; - ctr->l = 0xffff; - ctr->thit = 1; + ctr->ctrl = 0; + ctr->m = 0; + ctr->gate = 0; + ctr->l = 0xffff; + ctr->thit = 1; ctr->using_timer = 1; } @@ -613,7 +613,7 @@ pitf_init(const device_t *info) if (!(dev->flags & PIT_PS2) && !(dev->flags & PIT_CUSTOM_CLOCK)) { for (int i = 0; i < 3; i++) { ctrf_t *ctr = &dev->counters[i]; - timer_add(&ctr->timer, pitf_timer_over, (void *)ctr, 0); + timer_add(&ctr->timer, pitf_timer_over, (void *) ctr, 0); } } @@ -626,73 +626,73 @@ pitf_init(const device_t *info) } const device_t i8253_fast_device = { - .name = "Intel 8253/8253-5 Programmable Interval Timer", + .name = "Intel 8253/8253-5 Programmable Interval Timer", .internal_name = "i8253_fast", - .flags = DEVICE_ISA, - .local = PIT_8253, - .init = pitf_init, - .close = pitf_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8253, + .init = pitf_init, + .close = pitf_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_fast_device = { - .name = "Intel 8254 Programmable Interval Timer", + .name = "Intel 8254 Programmable Interval Timer", .internal_name = "i8254_fast", - .flags = DEVICE_ISA, - .local = PIT_8254, - .init = pitf_init, - .close = pitf_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254, + .init = pitf_init, + .close = pitf_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_sec_fast_device = { - .name = "Intel 8254 Programmable Interval Timer (Secondary)", + .name = "Intel 8254 Programmable Interval Timer (Secondary)", .internal_name = "i8254_sec_fast", - .flags = DEVICE_ISA, - .local = PIT_8254 | PIT_SECONDARY, - .init = pitf_init, - .close = pitf_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254 | PIT_SECONDARY, + .init = pitf_init, + .close = pitf_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_ext_io_fast_device = { - .name = "Intel 8254 Programmable Interval Timer (External I/O)", + .name = "Intel 8254 Programmable Interval Timer (External I/O)", .internal_name = "i8254_ext_io_fast", - .flags = DEVICE_ISA, - .local = PIT_8254 | PIT_EXT_IO, - .init = pitf_init, - .close = pitf_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254 | PIT_EXT_IO, + .init = pitf_init, + .close = pitf_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_ps2_fast_device = { - .name = "Intel 8254 Programmable Interval Timer (PS/2)", + .name = "Intel 8254 Programmable Interval Timer (PS/2)", .internal_name = "i8254_ps2_fast", - .flags = DEVICE_ISA, - .local = PIT_8254 | PIT_PS2 | PIT_EXT_IO, - .init = pitf_init, - .close = pitf_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254 | PIT_PS2 | PIT_EXT_IO, + .init = pitf_init, + .close = pitf_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const pit_intf_t pit_fast_intf = { diff --git a/src/port_6x.c b/src/port_6x.c index 0fe168a3c..a825b643c 100644 --- a/src/port_6x.c +++ b/src/port_6x.c @@ -35,14 +35,12 @@ #include <86box/video.h> #include <86box/port_6x.h> +#define PS2_REFRESH_TIME (16 * TIMER_USEC) -#define PS2_REFRESH_TIME (16 * TIMER_USEC) - -#define PORT_6X_TURBO 1 -#define PORT_6X_EXT_REF 2 -#define PORT_6X_MIRROR 4 -#define PORT_6X_SWA 8 - +#define PORT_6X_TURBO 1 +#define PORT_6X_EXT_REF 2 +#define PORT_6X_MIRROR 4 +#define PORT_6X_SWA 8 static void port_6x_write(uint16_t port, uint8_t val, void *priv) @@ -52,22 +50,22 @@ port_6x_write(uint16_t port, uint8_t val, void *priv) port &= 3; if ((port == 3) && (dev->flags & PORT_6X_MIRROR)) - port = 1; + port = 1; switch (port) { - case 1: - ppi.pb = (ppi.pb & 0x10) | (val & 0x0f); + case 1: + ppi.pb = (ppi.pb & 0x10) | (val & 0x0f); - speaker_update(); - speaker_gated = val & 1; - speaker_enable = val & 2; - if (speaker_enable) - was_speaker_enable = 1; - pit_devs[0].set_gate(pit_devs[0].data, 2, val & 1); + speaker_update(); + speaker_gated = val & 1; + speaker_enable = val & 2; + if (speaker_enable) + was_speaker_enable = 1; + pit_devs[0].set_gate(pit_devs[0].data, 2, val & 1); - if (dev->flags & PORT_6X_TURBO) - xi8088_turbo_set(!!(val & 0x04)); - break; + if (dev->flags & PORT_6X_TURBO) + xi8088_turbo_set(!!(val & 0x04)); + break; } } @@ -79,14 +77,14 @@ port_61_read_simple(uint16_t port, void *priv) if (ppispeakon) ret |= 0x20; - return(ret); + return (ret); } static uint8_t port_61_read(uint16_t port, void *priv) { port_6x_t *dev = (port_6x_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (dev->flags & PORT_6X_EXT_REF) { ret = ppi.pb & 0x0f; @@ -102,7 +100,7 @@ port_61_read(uint16_t port, void *priv) if (dev->flags & PORT_6X_TURBO) ret = (ret & 0xfb) | (xi8088_turbo_get() ? 0x04 : 0x00); - return(ret); + return (ret); } static uint8_t @@ -138,7 +136,7 @@ port_62_read(uint16_t port, void *priv) ret |= 0x02; } - return(ret); + return (ret); } static void @@ -150,7 +148,6 @@ port_6x_refresh(void *priv) timer_advance_u64(&dev->refresh_timer, PS2_REFRESH_TIME); } - static void port_6x_close(void *priv) { @@ -161,7 +158,6 @@ port_6x_close(void *priv) free(dev); } - void * port_6x_init(const device_t *info) { @@ -173,16 +169,16 @@ port_6x_init(const device_t *info) if (dev->flags & (PORT_6X_TURBO | PORT_6X_EXT_REF)) { io_sethandler(0x0061, 1, port_61_read, NULL, NULL, port_6x_write, NULL, NULL, dev); - if (dev->flags & PORT_6X_EXT_REF) - timer_add(&dev->refresh_timer, port_6x_refresh, dev, 1); + if (dev->flags & PORT_6X_EXT_REF) + timer_add(&dev->refresh_timer, port_6x_refresh, dev, 1); - if (dev->flags & PORT_6X_MIRROR) - io_sethandler(0x0063, 1, port_61_read, NULL, NULL, port_6x_write, NULL, NULL, dev); + if (dev->flags & PORT_6X_MIRROR) + io_sethandler(0x0063, 1, port_61_read, NULL, NULL, port_6x_write, NULL, NULL, dev); } else { io_sethandler(0x0061, 1, port_61_read_simple, NULL, NULL, port_6x_write, NULL, NULL, dev); - if (dev->flags & PORT_6X_MIRROR) - io_sethandler(0x0063, 1, port_61_read_simple, NULL, NULL, port_6x_write, NULL, NULL, dev); + if (dev->flags & PORT_6X_MIRROR) + io_sethandler(0x0063, 1, port_61_read_simple, NULL, NULL, port_6x_write, NULL, NULL, dev); } if (dev->flags & PORT_6X_SWA) @@ -192,57 +188,57 @@ port_6x_init(const device_t *info) } const device_t port_6x_device = { - .name = "Port 6x Registers", + .name = "Port 6x Registers", .internal_name = "port_6x", - .flags = 0, - .local = 0, - .init = port_6x_init, - .close = port_6x_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = port_6x_init, + .close = port_6x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t port_6x_xi8088_device = { - .name = "Port 6x Registers (Xi8088)", + .name = "Port 6x Registers (Xi8088)", .internal_name = "port_6x_xi8088", - .flags = 0, - .local = PORT_6X_TURBO | PORT_6X_EXT_REF | PORT_6X_MIRROR, - .init = port_6x_init, - .close = port_6x_close, - .reset = NULL, + .flags = 0, + .local = PORT_6X_TURBO | PORT_6X_EXT_REF | PORT_6X_MIRROR, + .init = port_6x_init, + .close = port_6x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t port_6x_ps2_device = { - .name = "Port 6x Registers (IBM PS/2)", + .name = "Port 6x Registers (IBM PS/2)", .internal_name = "port_6x_ps2", - .flags = 0, - .local = PORT_6X_EXT_REF, - .init = port_6x_init, - .close = port_6x_close, - .reset = NULL, + .flags = 0, + .local = PORT_6X_EXT_REF, + .init = port_6x_init, + .close = port_6x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t port_6x_olivetti_device = { - .name = "Port 6x Registers (Olivetti)", + .name = "Port 6x Registers (Olivetti)", .internal_name = "port_6x_olivetti", - .flags = 0, - .local = PORT_6X_SWA, - .init = port_6x_init, - .close = port_6x_close, - .reset = NULL, + .flags = 0, + .local = PORT_6X_SWA, + .init = port_6x_init, + .close = port_6x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/port_92.c b/src/port_92.c index c4c421f53..898f46c98 100644 --- a/src/port_92.c +++ b/src/port_92.c @@ -30,50 +30,45 @@ #include <86box/pit.h> #include <86box/port_92.h> - -#define PORT_92_INV 1 -#define PORT_92_WORD 2 -#define PORT_92_PCI 4 -#define PORT_92_RESET 8 -#define PORT_92_A20 16 - +#define PORT_92_INV 1 +#define PORT_92_WORD 2 +#define PORT_92_PCI 4 +#define PORT_92_RESET 8 +#define PORT_92_A20 16 static uint8_t port_92_readb(uint16_t port, void *priv) { - uint8_t ret = 0x00; + uint8_t ret = 0x00; port_92_t *dev = (port_92_t *) priv; if (port == 0x92) { - /* Return bit 1 directly from mem_a20_alt, so the - pin can be reset independently of the device. */ - ret = (dev->reg & ~0x03) | (mem_a20_alt & 2) | - (cpu_alt_reset & 1); + /* Return bit 1 directly from mem_a20_alt, so the + pin can be reset independently of the device. */ + ret = (dev->reg & ~0x03) | (mem_a20_alt & 2) | (cpu_alt_reset & 1); - if (dev->flags & PORT_92_INV) - ret |= 0xfc; - else if (dev->flags & PORT_92_PCI) - ret |= 0x24; /* Intel SIO datasheet says bits 2 and 5 are always 1. */ + if (dev->flags & PORT_92_INV) + ret |= 0xfc; + else if (dev->flags & PORT_92_PCI) + ret |= 0x24; /* Intel SIO datasheet says bits 2 and 5 are always 1. */ } else if (dev->flags & PORT_92_INV) - ret = 0xff; + ret = 0xff; return ret; } - static uint16_t port_92_readw(uint16_t port, void *priv) { - uint16_t ret = 0xffff; + uint16_t ret = 0xffff; port_92_t *dev = (port_92_t *) priv; if (!(dev->flags & PORT_92_PCI)) - ret = port_92_readb(port, priv); + ret = port_92_readb(port, priv); return ret; } - static void port_92_pulse(void *priv) { @@ -81,44 +76,41 @@ port_92_pulse(void *priv) cpu_set_edx(); } - static void port_92_writeb(uint16_t port, uint8_t val, void *priv) { port_92_t *dev = (port_92_t *) priv; if (port != 0x92) - return; + return; dev->reg = val & 0x03; if ((mem_a20_alt ^ val) & 2) { - mem_a20_alt = (val & 2); - mem_a20_recalc(); + mem_a20_alt = (val & 2); + mem_a20_recalc(); } if ((~cpu_alt_reset & val) & 1) - timer_set_delay_u64(&dev->pulse_timer, dev->pulse_period); + timer_set_delay_u64(&dev->pulse_timer, dev->pulse_period); else if (!(val & 1)) - timer_disable(&dev->pulse_timer); + timer_disable(&dev->pulse_timer); cpu_alt_reset = (val & 1); if (dev->flags & PORT_92_INV) - dev->reg |= 0xfc; + dev->reg |= 0xfc; } - static void port_92_writew(uint16_t port, uint16_t val, void *priv) { port_92_t *dev = (port_92_t *) priv; if (!(dev->flags & PORT_92_PCI)) - port_92_writeb(port, val & 0xff, priv); + port_92_writeb(port, val & 0xff, priv); } - void port_92_set_period(void *priv, uint64_t pulse_period) { @@ -127,7 +119,6 @@ port_92_set_period(void *priv, uint64_t pulse_period) dev->pulse_period = pulse_period; } - void port_92_set_features(void *priv, int reset, int a20) { @@ -136,48 +127,45 @@ port_92_set_features(void *priv, int reset, int a20) dev->flags &= ~(PORT_92_RESET | PORT_92_A20); if (reset) - dev->flags |= PORT_92_RESET; + dev->flags |= PORT_92_RESET; timer_disable(&dev->pulse_timer); if (a20) { - dev->flags |= PORT_92_A20; - mem_a20_alt = (dev->reg & 2); + dev->flags |= PORT_92_A20; + mem_a20_alt = (dev->reg & 2); } else - mem_a20_alt = 0; + mem_a20_alt = 0; mem_a20_recalc(); } - void port_92_add(void *priv) { port_92_t *dev = (port_92_t *) priv; if (dev->flags & (PORT_92_WORD | PORT_92_PCI)) - io_sethandler(0x0092, 2, - port_92_readb, port_92_readw, NULL, port_92_writeb, port_92_writew, NULL, dev); + io_sethandler(0x0092, 2, + port_92_readb, port_92_readw, NULL, port_92_writeb, port_92_writew, NULL, dev); else - io_sethandler(0x0092, 1, - port_92_readb, NULL, NULL, port_92_writeb, NULL, NULL, dev); + io_sethandler(0x0092, 1, + port_92_readb, NULL, NULL, port_92_writeb, NULL, NULL, dev); } - void port_92_remove(void *priv) { port_92_t *dev = (port_92_t *) priv; if (dev->flags & (PORT_92_WORD | PORT_92_PCI)) - io_removehandler(0x0092, 2, - port_92_readb, port_92_readw, NULL, port_92_writeb, port_92_writew, NULL, dev); + io_removehandler(0x0092, 2, + port_92_readb, port_92_readw, NULL, port_92_writeb, port_92_writew, NULL, dev); else - io_removehandler(0x0092, 1, - port_92_readb, NULL, NULL, port_92_writeb, NULL, NULL, dev); + io_removehandler(0x0092, 1, + port_92_readb, NULL, NULL, port_92_writeb, NULL, NULL, dev); } - static void port_92_close(void *priv) { @@ -188,7 +176,6 @@ port_92_close(void *priv) free(dev); } - void * port_92_init(const device_t *info) { @@ -199,7 +186,7 @@ port_92_init(const device_t *info) timer_add(&dev->pulse_timer, port_92_pulse, dev, 0); - dev->reg = 0; + dev->reg = 0; mem_a20_alt = 0; mem_a20_recalc(); @@ -209,7 +196,7 @@ port_92_init(const device_t *info) port_92_add(dev); - dev->pulse_period = (uint64_t) (4.0 * SYSCLK * (double)(1ULL << 32ULL)); + dev->pulse_period = (uint64_t) (4.0 * SYSCLK * (double) (1ULL << 32ULL)); dev->flags |= (PORT_92_RESET | PORT_92_A20); @@ -217,57 +204,57 @@ port_92_init(const device_t *info) } const device_t port_92_device = { - .name = "Port 92 Register", + .name = "Port 92 Register", .internal_name = "port_92", - .flags = 0, - .local = 0, - .init = port_92_init, - .close = port_92_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = port_92_init, + .close = port_92_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t port_92_inv_device = { - .name = "Port 92 Register (inverted bits 2-7)", + .name = "Port 92 Register (inverted bits 2-7)", .internal_name = "port_92_inv", - .flags = 0, - .local = PORT_92_INV, - .init = port_92_init, - .close = port_92_close, - .reset = NULL, + .flags = 0, + .local = PORT_92_INV, + .init = port_92_init, + .close = port_92_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t port_92_word_device = { - .name = "Port 92 Register (16-bit)", + .name = "Port 92 Register (16-bit)", .internal_name = "port_92_word", - .flags = 0, - .local = PORT_92_WORD, - .init = port_92_init, - .close = port_92_close, - .reset = NULL, + .flags = 0, + .local = PORT_92_WORD, + .init = port_92_init, + .close = port_92_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t port_92_pci_device = { - .name = "Port 92 Register (PCI)", + .name = "Port 92 Register (PCI)", .internal_name = "port_92_pci", - .flags = 0, - .local = PORT_92_PCI, - .init = port_92_init, - .close = port_92_close, - .reset = NULL, + .flags = 0, + .local = PORT_92_PCI, + .init = port_92_init, + .close = port_92_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/ppi.c b/src/ppi.c index c70d01ece..54ac8d037 100644 --- a/src/ppi.c +++ b/src/ppi.c @@ -15,11 +15,9 @@ #include <86box/pit.h> #include <86box/ppi.h> - PPI ppi; int ppispeakon; - void ppi_reset(void) { diff --git a/src/random.c b/src/random.c index fb1fead52..9deea1f56 100644 --- a/src/random.c +++ b/src/random.c @@ -18,79 +18,83 @@ #include #include <86box/random.h> -#if !(defined(__i386__) || defined (__x86_64__)) -#include +#if !(defined(__i386__) || defined(__x86_64__)) +# include #endif uint32_t preconst = 0x6ED9EBA1; - -static __inline uint32_t rotl32c (uint32_t x, uint32_t n) +static __inline uint32_t +rotl32c(uint32_t x, uint32_t n) { #if 0 assert (n<32); #endif - return (x<>(-n&31)); + return (x << n) | (x >> (-n & 31)); } -static __inline uint32_t rotr32c (uint32_t x, uint32_t n) +static __inline uint32_t +rotr32c(uint32_t x, uint32_t n) { #if 0 assert (n<32); #endif - return (x>>n) | (x<<(-n&31)); + return (x >> n) | (x << (-n & 31)); } -#define ROTATE_LEFT rotl32c +#define ROTATE_LEFT rotl32c #define ROTATE_RIGHT rotr32c -static __inline unsigned long long rdtsc(void) +static __inline unsigned long long +rdtsc(void) { -#if defined(__i386__) || defined (__x86_64__) +#if defined(__i386__) || defined(__x86_64__) unsigned hi, lo; -#ifdef _MSC_VER +# ifdef _MSC_VER __asm { rdtsc mov hi, edx ; EDX:EAX is already standard return!! mov lo, eax } +# else + __asm__ __volatile__("rdtsc" + : "=a"(lo), "=d"(hi)); +# endif + return ((unsigned long long) lo) | (((unsigned long long) hi) << 32); #else - __asm__ __volatile__ ("rdtsc" : "=a"(lo), "=d"(hi)); -#endif - return ( (unsigned long long)lo)|( ((unsigned long long)hi)<<32 ); -#else - return time(NULL); + return time(NULL); #endif } -static uint32_t RDTSC(void) +static uint32_t +RDTSC(void) { - return (uint32_t) (rdtsc()); + return (uint32_t) (rdtsc()); } - -static void random_twist(uint32_t *val) +static void +random_twist(uint32_t *val) { - *val = ROTATE_LEFT(*val, rand() % 32); - *val ^= 0x5A827999; - *val = ROTATE_RIGHT(*val, rand() % 32); - *val ^= 0x4ED32706; + *val = ROTATE_LEFT(*val, rand() % 32); + *val ^= 0x5A827999; + *val = ROTATE_RIGHT(*val, rand() % 32); + *val ^= 0x4ED32706; } - -uint8_t random_generate(void) +uint8_t +random_generate(void) { - uint16_t r = 0; - r = (RDTSC() ^ ROTATE_LEFT(preconst, rand() % 32)) % 256; - random_twist(&preconst); - return (r & 0xff); + uint16_t r = 0; + r = (RDTSC() ^ ROTATE_LEFT(preconst, rand() % 32)) % 256; + random_twist(&preconst); + return (r & 0xff); } - -void random_init(void) +void +random_init(void) { - uint32_t seed = RDTSC(); - srand(seed); - return; + uint32_t seed = RDTSC(); + srand(seed); + return; } diff --git a/src/thread.cpp b/src/thread.cpp index 67bf8d5e6..1b4311f37 100644 --- a/src/thread.cpp +++ b/src/thread.cpp @@ -5,11 +5,10 @@ #include <86box/plat.h> #include <86box/thread.h> -struct event_cpp11_t -{ +struct event_cpp11_t { std::condition_variable cond; - std::mutex mutex; - bool state = false; + std::mutex mutex; + bool state = false; }; extern "C" { @@ -18,7 +17,7 @@ thread_t * thread_create(void (*thread_rout)(void *param), void *param) { auto thread = new std::thread([thread_rout, param] { - thread_rout(param); + thread_rout(param); }); return thread; } @@ -26,8 +25,9 @@ thread_create(void (*thread_rout)(void *param), void *param) int thread_wait(thread_t *arg) { - if (!arg) return 0; - auto thread = reinterpret_cast(arg); + if (!arg) + return 0; + auto thread = reinterpret_cast(arg); thread->join(); return 0; } @@ -43,9 +43,9 @@ int thread_test_mutex(mutex_t *_mutex) { if (_mutex == nullptr) - return 0; + return 0; - auto mutex = reinterpret_cast(_mutex); + auto mutex = reinterpret_cast(_mutex); return mutex->try_lock() ? 1 : 0; } @@ -53,30 +53,28 @@ int thread_wait_mutex(mutex_t *_mutex) { if (_mutex == nullptr) - return 0; + return 0; - auto mutex = reinterpret_cast(_mutex); + auto mutex = reinterpret_cast(_mutex); mutex->lock(); return 1; } - int thread_release_mutex(mutex_t *_mutex) { if (_mutex == nullptr) - return 0; + return 0; - auto mutex = reinterpret_cast(_mutex); + auto mutex = reinterpret_cast(_mutex); mutex->unlock(); return 1; } - void thread_close_mutex(mutex_t *_mutex) { - auto mutex = reinterpret_cast(_mutex); + auto mutex = reinterpret_cast(_mutex); delete mutex; } @@ -90,13 +88,13 @@ thread_create_event() int thread_wait_event(event_t *handle, int timeout) { - auto event = reinterpret_cast(handle); - auto lock = std::unique_lock(event->mutex); + auto event = reinterpret_cast(handle); + auto lock = std::unique_lock(event->mutex); if (timeout < 0) { event->cond.wait(lock, [event] { return event->state; }); } else { - auto to = std::chrono::system_clock::now() + std::chrono::milliseconds(timeout); + auto to = std::chrono::system_clock::now() + std::chrono::milliseconds(timeout); std::cv_status status; do { @@ -113,9 +111,9 @@ thread_wait_event(event_t *handle, int timeout) void thread_set_event(event_t *handle) { - auto event = reinterpret_cast(handle); + auto event = reinterpret_cast(handle); { - auto lock = std::unique_lock(event->mutex); + auto lock = std::unique_lock(event->mutex); event->state = true; } event->cond.notify_all(); @@ -124,16 +122,15 @@ thread_set_event(event_t *handle) void thread_reset_event(event_t *handle) { - auto event = reinterpret_cast(handle); - auto lock = std::unique_lock(event->mutex); + auto event = reinterpret_cast(handle); + auto lock = std::unique_lock(event->mutex); event->state = false; } void thread_destroy_event(event_t *handle) { - auto event = reinterpret_cast(handle); + auto event = reinterpret_cast(handle); delete event; } - } diff --git a/src/timer.c b/src/timer.c index f8e17be2e..7a6600fc3 100644 --- a/src/timer.c +++ b/src/timer.c @@ -5,7 +5,6 @@ #include <86box/86box.h> #include <86box/timer.h> - uint64_t TIMER_USEC; uint32_t timer_target; @@ -16,29 +15,28 @@ pc_timer_t *timer_head = NULL; /* Are we initialized? */ int timer_inited = 0; - void timer_enable(pc_timer_t *timer) { pc_timer_t *timer_node = timer_head; if (!timer_inited || (timer == NULL)) - return; + return; if (timer->flags & TIMER_ENABLED) - timer_disable(timer); + timer_disable(timer); if (timer->next || timer->prev) - fatal("timer_enable - timer->next\n"); + fatal("timer_enable - timer->next\n"); timer->flags |= TIMER_ENABLED; /*List currently empty - add to head*/ if (!timer_head) { - timer_head = timer; - timer->next = timer->prev = NULL; - timer_target = timer_head->ts.ts32.integer; - return; + timer_head = timer; + timer->next = timer->prev = NULL; + timer_target = timer_head->ts.ts32.integer; + return; } if (TIMER_LESS_THAN(timer, timer_head)) { @@ -57,83 +55,80 @@ timer_enable(pc_timer_t *timer) } pc_timer_t *prev = timer_head; - timer_node = timer_head->next; + timer_node = timer_head->next; - while(1) { - /*Timer expires before timer_node. Add to list in front of timer_node*/ - if (TIMER_LESS_THAN(timer, timer_node)) { - timer->next = timer_node; - timer->prev = prev; - timer_node->prev = timer; - prev->next = timer; - return; - } + while (1) { + /*Timer expires before timer_node. Add to list in front of timer_node*/ + if (TIMER_LESS_THAN(timer, timer_node)) { + timer->next = timer_node; + timer->prev = prev; + timer_node->prev = timer; + prev->next = timer; + return; + } - /*timer_node is last in the list. Add timer to end of list*/ - if (!timer_node->next) { - timer_node->next = timer; - timer->prev = timer_node; - return; - } + /*timer_node is last in the list. Add timer to end of list*/ + if (!timer_node->next) { + timer_node->next = timer; + timer->prev = timer_node; + return; + } - prev = timer_node; - timer_node = timer_node->next; + prev = timer_node; + timer_node = timer_node->next; } } - void timer_disable(pc_timer_t *timer) { if (!timer_inited || (timer == NULL) || !(timer->flags & TIMER_ENABLED)) - return; + return; if (!timer->next && !timer->prev && timer != timer_head) - fatal("timer_disable - !timer->next\n"); + fatal("timer_disable - !timer->next\n"); timer->flags &= ~TIMER_ENABLED; if (timer->prev) - timer->prev->next = timer->next; + timer->prev->next = timer->next; else - timer_head = timer->next; + timer_head = timer->next; if (timer->next) - timer->next->prev = timer->prev; + timer->next->prev = timer->prev; timer->prev = timer->next = NULL; } - void timer_process(void) { pc_timer_t *timer; if (!timer_head) - return; + return; - while(1) { - timer = timer_head; + while (1) { + timer = timer_head; - if (!TIMER_LESS_THAN_VAL(timer, (uint32_t)tsc)) - break; + if (!TIMER_LESS_THAN_VAL(timer, (uint32_t) tsc)) + break; - timer_head = timer->next; - if (timer_head) - timer_head->prev = NULL; + timer_head = timer->next; + if (timer_head) + timer_head->prev = NULL; - timer->next = timer->prev = NULL; - timer->flags &= ~TIMER_ENABLED; + timer->next = timer->prev = NULL; + timer->flags &= ~TIMER_ENABLED; - if (timer->flags & TIMER_SPLIT) - timer_advance_ex(timer, 0); /* We're splitting a > 1 s period into multiple <= 1 s periods. */ - else if (timer->callback != NULL) /* Make sure it's no NULL, so that we can have a NULL callback when no operation is needed. */ - timer->callback(timer->p); + if (timer->flags & TIMER_SPLIT) + timer_advance_ex(timer, 0); /* We're splitting a > 1 s period into multiple <= 1 s periods. */ + else if (timer->callback != NULL) /* Make sure it's no NULL, so that we can have a NULL callback when no operation is needed. */ + timer->callback(timer->p); } timer_target = timer_head->ts.ts32.integer; } - void timer_close(void) { @@ -143,9 +138,9 @@ timer_close(void) timers that are not in malloc'd structs don't keep pointing to timers that may be in malloc'd structs. */ while (t != NULL) { - r = t; - r->prev = r->next = NULL; - t = r->next; + r = t; + r->prev = r->next = NULL; + t = r->next; } timer_head = NULL; @@ -153,97 +148,90 @@ timer_close(void) timer_inited = 0; } - void timer_init(void) { timer_target = 0ULL; - tsc = 0; + tsc = 0; timer_inited = 1; } - void timer_add(pc_timer_t *timer, void (*callback)(void *p), void *p, int start_timer) { memset(timer, 0, sizeof(pc_timer_t)); timer->callback = callback; - timer->p = p; - timer->flags = 0; + timer->p = p; + timer->flags = 0; timer->prev = timer->next = NULL; if (start_timer) - timer_set_delay_u64(timer, 0); + timer_set_delay_u64(timer, 0); } - /* The API for big timer periods starts here. */ void timer_stop(pc_timer_t *timer) { if (!timer_inited || (timer == NULL)) - return; + return; timer->period = 0.0; timer_disable(timer); timer->flags &= ~TIMER_SPLIT; } - static void timer_do_period(pc_timer_t *timer, uint64_t period, int start) { if (!timer_inited || (timer == NULL)) - return; + return; if (start) - timer_set_delay_u64(timer, period); + timer_set_delay_u64(timer, period); else - timer_advance_u64(timer, period); + timer_advance_u64(timer, period); } - void timer_advance_ex(pc_timer_t *timer, int start) { if (!timer_inited || (timer == NULL)) - return; + return; if (timer->period > MAX_USEC) { - timer_do_period(timer, MAX_USEC64 * TIMER_USEC, start); - timer->period -= MAX_USEC; - timer->flags |= TIMER_SPLIT; + timer_do_period(timer, MAX_USEC64 * TIMER_USEC, start); + timer->period -= MAX_USEC; + timer->flags |= TIMER_SPLIT; } else { - if (timer->period > 0.0) - timer_do_period(timer, (uint64_t) (timer->period * ((double) TIMER_USEC)), start); - else - timer_disable(timer); - timer->period = 0.0; - timer->flags &= ~TIMER_SPLIT; + if (timer->period > 0.0) + timer_do_period(timer, (uint64_t) (timer->period * ((double) TIMER_USEC)), start); + else + timer_disable(timer); + timer->period = 0.0; + timer->flags &= ~TIMER_SPLIT; } } - void timer_on(pc_timer_t *timer, double period, int start) { if (!timer_inited || (timer == NULL)) - return; + return; timer->period = period; timer_advance_ex(timer, start); } - void timer_on_auto(pc_timer_t *timer, double period) { if (!timer_inited || (timer == NULL)) - return; + return; if (period > 0.0) - timer_on(timer, period, (timer->period == 0.0)); + timer_on(timer, period, (timer->period == 0.0)); else - timer_stop(timer); + timer_stop(timer); } diff --git a/src/upi42.c b/src/upi42.c index 8b8e4b72e..eb0a46e1c 100644 --- a/src/upi42.c +++ b/src/upi42.c @@ -31,18 +31,16 @@ fflush(stdout); \ } #else -#include -#define HAVE_STDARG_H -#include <86box/86box.h> -#include <86box/device.h> -#include <86box/io.h> -#include <86box/timer.h> +# include +# define HAVE_STDARG_H +# include <86box/86box.h> +# include <86box/device.h> +# include <86box/io.h> +# include <86box/timer.h> - -#ifdef ENABLE_UPI42_LOG +# ifdef ENABLE_UPI42_LOG int upi42_do_log = ENABLE_UPI42_LOG; - void upi42_log(const char *fmt, ...) { @@ -54,9 +52,9 @@ upi42_log(const char *fmt, ...) va_end(ap); } } -#else -#define upi42_log(fmt, ...) -#endif +# else +# define upi42_log(fmt, ...) +# endif #endif #define UPI42_REG(upi42, r, op) ((upi42->psw & 0x10) ? (upi42->ram[24 + ((r) &7)] op) : (upi42->ram[(r) &7] op)) @@ -97,7 +95,7 @@ typedef struct _upi42_ { int cycs; /* cycle counter */ #ifndef UPI42_STANDALONE - uint8_t ram_index; + uint8_t ram_index; uint16_t rom_index; #endif } upi42_t; @@ -1178,275 +1176,273 @@ upi42_write(uint16_t port, uint8_t val, void *priv) int i; switch (port) { - /* Write to data port. */ - case 0x0060: - case 0x0160: - upi42_dbb_write(0, val, upi42); - break; + /* Write to data port. */ + case 0x0060: + case 0x0160: + upi42_dbb_write(0, val, upi42); + break; - /* RAM Index. */ - case 0x0162: - upi42->ram_index = val & upi42->rammask; - break; + /* RAM Index. */ + case 0x0162: + upi42->ram_index = val & upi42->rammask; + break; - /* RAM. */ - case 0x0163: - upi42->ram[upi42->ram_index & upi42->rammask] = val; - break; + /* RAM. */ + case 0x0163: + upi42->ram[upi42->ram_index & upi42->rammask] = val; + break; - /* Write to command port. */ - case 0x0064: - case 0x0164: - upi42_cmd_write(0, val, upi42); - break; + /* Write to command port. */ + case 0x0064: + case 0x0164: + upi42_cmd_write(0, val, upi42); + break; - /* Input ports. */ - case 0x0180 ... 0x0187: - upi42->ports_in[addr & 0x0007] = val; - break; + /* Input ports. */ + case 0x0180 ... 0x0187: + upi42->ports_in[addr & 0x0007] = val; + break; - /* Output ports. */ - case 0x0188 ... 0x018f: - upi42->ports_out[addr & 0x0007] = val; - break; + /* Output ports. */ + case 0x0188 ... 0x018f: + upi42->ports_out[addr & 0x0007] = val; + break; - /* 4 = T0, 5 = T1. */ - case 0x0194: - upi42->t0 = (val >> 4) & 0x01; - upi42->t1 = (val >> 5) & 0x01; - break; + /* 4 = T0, 5 = T1. */ + case 0x0194: + upi42->t0 = (val >> 4) & 0x01; + upi42->t1 = (val >> 5) & 0x01; + break; - /* Program counter. */ - case 0x0196: - upi42->pc = (upi42->pc & 0xff00) | val; - break; - case 0x0197: - upi42->pc = (upi42->pc & 0x00ff) | (val << 8); - break; + /* Program counter. */ + case 0x0196: + upi42->pc = (upi42->pc & 0xff00) | val; + break; + case 0x0197: + upi42->pc = (upi42->pc & 0x00ff) | (val << 8); + break; - /* Input data buffer. */ - case 0x019a: - upi42->dbb_in = val; - break; + /* Input data buffer. */ + case 0x019a: + upi42->dbb_in = val; + break; - /* Output data buffer. */ - case 0x019b: - upi42->dbb_out = val; - break; + /* Output data buffer. */ + case 0x019b: + upi42->dbb_out = val; + break; - /* ROM Index. */ - case 0x01a0: - upi42->rom_index = (upi42->rom_index & 0xff00) | val; - break; - case 0x01a1: - upi42->rom_index = (upi42->rom_index & 0x00ff) | (val << 8); - break; + /* ROM Index. */ + case 0x01a0: + upi42->rom_index = (upi42->rom_index & 0xff00) | val; + break; + case 0x01a1: + upi42->rom_index = (upi42->rom_index & 0x00ff) | (val << 8); + break; - /* Hard reset. */ - case 0x01a2: - temp_type = upi42->type; - temp_rom = upi42->rom; - upi42_do_init(temp_type, temp_rom); - break; + /* Hard reset. */ + case 0x01a2: + temp_type = upi42->type; + temp_rom = upi42->rom; + upi42_do_init(temp_type, temp_rom); + break; - /* Soft reset. */ - case 0x01a3: - upi42_reset(upi42); - break; + /* Soft reset. */ + case 0x01a3: + upi42_reset(upi42); + break; - /* ROM. */ - case 0x01a4: - upi42->rom[upi42->rom_index & upi42->rommask] = val; - break; - case 0x01a5: - upi42->rom[(upi42->rom_index + 1) & upi42->rommask] = val; - break; - case 0x01a6: - upi42->rom[(upi42->rom_index + 2) & upi42->rommask] = val; - break; - case 0x01a7: - upi42->rom[(upi42->rom_index + 3) & upi42->rommask] = val; - break; + /* ROM. */ + case 0x01a4: + upi42->rom[upi42->rom_index & upi42->rommask] = val; + break; + case 0x01a5: + upi42->rom[(upi42->rom_index + 1) & upi42->rommask] = val; + break; + case 0x01a6: + upi42->rom[(upi42->rom_index + 2) & upi42->rommask] = val; + break; + case 0x01a7: + upi42->rom[(upi42->rom_index + 3) & upi42->rommask] = val; + break; - /* Pause. */ - case 0x01a8: - break; + /* Pause. */ + case 0x01a8: + break; - /* Resume. */ - case 0x01a9: - break; + /* Resume. */ + case 0x01a9: + break; - /* Bus master ROM: 0 = direction (0 = to memory, 1 = from memory). */ - case 0x01aa: - if (val & 0x01) { - for (i = 0; i <= upi42->rommask; i += 4) - *(uint32_t *) &(upi42->rom[i]) = mem_readl_phys(upi42->ram_addr + i); - } else { - for (i = 0; i <= upi42->rommask; i += 4) - mem_writel_phys(upi42->ram_addr + i, *(uint32_t *) &(upi42->rom[i])); - } - upi42->bm_stat = (val & 0x01) | 0x02; - break; + /* Bus master ROM: 0 = direction (0 = to memory, 1 = from memory). */ + case 0x01aa: + if (val & 0x01) { + for (i = 0; i <= upi42->rommask; i += 4) + *(uint32_t *) &(upi42->rom[i]) = mem_readl_phys(upi42->ram_addr + i); + } else { + for (i = 0; i <= upi42->rommask; i += 4) + mem_writel_phys(upi42->ram_addr + i, *(uint32_t *) &(upi42->rom[i])); + } + upi42->bm_stat = (val & 0x01) | 0x02; + break; } } - static uint8_t upi42_read(uint16_t port, void *priv) { upi42_t *upi42 = (upi42_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; switch (port) { - /* Type. */ - case 0x015c: - ret = upi42->type & 0xff; - break; - case 0x015d: - ret = upi42->type >> 8; - break; - case 0x015e: - ret = upi42->type >> 16; - break; - case 0x015f: - ret = upi42->type >> 24; - break; + /* Type. */ + case 0x015c: + ret = upi42->type & 0xff; + break; + case 0x015d: + ret = upi42->type >> 8; + break; + case 0x015e: + ret = upi42->type >> 16; + break; + case 0x015f: + ret = upi42->type >> 24; + break; - /* Read from data port and reset OBF. */ - case 0x0060: - case 0x0160: - ret = upi42->dbb_out; - upi42->sts &= ~0x01; /* clear OBF */ - break; + /* Read from data port and reset OBF. */ + case 0x0060: + case 0x0160: + ret = upi42->dbb_out; + upi42->sts &= ~0x01; /* clear OBF */ + break; - /* RAM Mask. */ - case 0x0161: - ret = upi42->rammask; - break; + /* RAM Mask. */ + case 0x0161: + ret = upi42->rammask; + break; - /* RAM Index. */ - case 0x0162: - ret = upi42->ram_index; - break; + /* RAM Index. */ + case 0x0162: + ret = upi42->ram_index; + break; - /* RAM. */ - case 0x0163: - ret = upi42->ram[upi42->ram_index & upi42->rammask]; - break; + /* RAM. */ + case 0x0163: + ret = upi42->ram[upi42->ram_index & upi42->rammask]; + break; - /* Read status. */ - case 0x0064: - case 0x0164: - ret = upi42->sts; - break; + /* Read status. */ + case 0x0064: + case 0x0164: + ret = upi42->sts; + break; - /* Input ports. */ - case 0x0180 ... 0x0187: - ret = upi42->ports_in[addr & 0x0007]; - break; + /* Input ports. */ + case 0x0180 ... 0x0187: + ret = upi42->ports_in[addr & 0x0007]; + break; - /* Output ports. */ - case 0x0188 ... 0x018f: - ret = upi42->ports_out[addr & 0x0007]; - break; + /* Output ports. */ + case 0x0188 ... 0x018f: + ret = upi42->ports_out[addr & 0x0007]; + break; - /* Accumulator. */ - case 0x0190: - ret = upi42->a; - break; + /* Accumulator. */ + case 0x0190: + ret = upi42->a; + break; - /* Timer counter. */ - case 0x0191: - ret = upi42->t; - break; + /* Timer counter. */ + case 0x0191: + ret = upi42->t; + break; - /* Program status word. */ - case 0x0192: - ret = upi42->psw; - break; + /* Program status word. */ + case 0x0192: + ret = upi42->psw; + break; - /* 0-4 = Prescaler, 5 = TF, 6 = Skip Timer Inc, 7 = Run Timer. */ - case 0x0193: - ret = (upi42->prescaler & 0x1f) || ((upi42->tf & 0x01) << 5) || ((upi42->skip_timer_inc & 0x01) << 6) || ((upi42->run_timer & 0x01) << 7); - break; + /* 0-4 = Prescaler, 5 = TF, 6 = Skip Timer Inc, 7 = Run Timer. */ + case 0x0193: + ret = (upi42->prescaler & 0x1f) || ((upi42->tf & 0x01) << 5) || ((upi42->skip_timer_inc & 0x01) << 6) || ((upi42->run_timer & 0x01) << 7); + break; - /* 0 = I, 1 = I Raise, 2 = TCNTI Raise, 3 = IRQ Mask, 4 = T0, 5 = T1, 6 = Flags, 7 = DBF. */ - case 0x0194: - ret = (upi42->i & 0x01) || ((upi42->i_raise & 0x01) << 1) || ((upi42->tcnti_raise & 0x01) << 2) || ((upi42->irq_mask & 0x01) << 3) || - ((upi42->t0 & 0x01) << 4) || ((upi42->t1 & 0x01) << 5) || ((upi42->flags & 0x01) << 6) || ((upi42->dbf & 0x01) << 7); - break; + /* 0 = I, 1 = I Raise, 2 = TCNTI Raise, 3 = IRQ Mask, 4 = T0, 5 = T1, 6 = Flags, 7 = DBF. */ + case 0x0194: + ret = (upi42->i & 0x01) || ((upi42->i_raise & 0x01) << 1) || ((upi42->tcnti_raise & 0x01) << 2) || ((upi42->irq_mask & 0x01) << 3) || ((upi42->t0 & 0x01) << 4) || ((upi42->t1 & 0x01) << 5) || ((upi42->flags & 0x01) << 6) || ((upi42->dbf & 0x01) << 7); + break; - /* 0 = Suspend. */ - case 0x0195: - ret = (upi42->suspend & 0x01); - break; + /* 0 = Suspend. */ + case 0x0195: + ret = (upi42->suspend & 0x01); + break; - /* Program counter. */ - case 0x0196: - ret = upi42->pc & 0xff; - break; - case 0x0197: - ret = upi42->pc >> 8; - break; + /* Program counter. */ + case 0x0196: + ret = upi42->pc & 0xff; + break; + case 0x0197: + ret = upi42->pc >> 8; + break; - /* ROM Mask. */ - case 0x0198: - ret = upi42->rommask & 0xff; - break; - case 0x0199: - ret = upi42->rommask >> 8; - break; + /* ROM Mask. */ + case 0x0198: + ret = upi42->rommask & 0xff; + break; + case 0x0199: + ret = upi42->rommask >> 8; + break; - /* Input data buffer. */ - case 0x019a: - ret = upi42->dbb_in; - break; + /* Input data buffer. */ + case 0x019a: + ret = upi42->dbb_in; + break; - /* Output data buffer. */ - case 0x019b: - ret = upi42->dbb_out; - break; + /* Output data buffer. */ + case 0x019b: + ret = upi42->dbb_out; + break; - /* Cycle counter. */ - case 0x019c: - ret = upi42->cycs & 0xff; - break; - case 0x019d: - ret = upi42->cycs >> 8; - break; - case 0x019e: - ret = upi42->cycs >> 16; - break; - case 0x019f: - ret = upi42->cycs >> 24; - break; + /* Cycle counter. */ + case 0x019c: + ret = upi42->cycs & 0xff; + break; + case 0x019d: + ret = upi42->cycs >> 8; + break; + case 0x019e: + ret = upi42->cycs >> 16; + break; + case 0x019f: + ret = upi42->cycs >> 24; + break; - /* ROM Index. */ - case 0x01a0: - ret = upi42->rom_index & 0xff; - break; - case 0x01a1: - ret = upi42->rom_index >> 8; - break; + /* ROM Index. */ + case 0x01a0: + ret = upi42->rom_index & 0xff; + break; + case 0x01a1: + ret = upi42->rom_index >> 8; + break; - /* ROM. */ - case 0x01a4: - ret = upi42->rom[upi42->rom_index & upi42->rommask]; - break; - case 0x01a5: - ret = upi42->rom[(upi42->rom_index + 1) & upi42->rommask]; - break; - case 0x01a6: - ret = upi42->rom[(upi42->rom_index + 2) & upi42->rommask]; - break; - case 0x01a7: - ret = upi42->rom[(upi42->rom_index + 3) & upi42->rommask]; - break; + /* ROM. */ + case 0x01a4: + ret = upi42->rom[upi42->rom_index & upi42->rommask]; + break; + case 0x01a5: + ret = upi42->rom[(upi42->rom_index + 1) & upi42->rommask]; + break; + case 0x01a6: + ret = upi42->rom[(upi42->rom_index + 2) & upi42->rommask]; + break; + case 0x01a7: + ret = upi42->rom[(upi42->rom_index + 3) & upi42->rommask]; + break; - /* Bus master status: 0 = direction, 1 = finished. */ - case 0x01ab: - ret = upi42->bm_stat; - break; + /* Bus master status: 0 = direction, 1 = finished. */ + case 0x01ab: + ret = upi42->bm_stat; + break; } return ret; diff --git a/src/usb.c b/src/usb.c index c70fc2d63..04b22064d 100644 --- a/src/usb.c +++ b/src/usb.c @@ -29,31 +29,28 @@ #include <86box/usb.h> #include "cpu.h" - #ifdef ENABLE_USB_LOG int usb_do_log = ENABLE_USB_LOG; - static void usb_log(const char *fmt, ...) { va_list ap; if (usb_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define usb_log(fmt, ...) +# define usb_log(fmt, ...) #endif - static uint8_t uhci_reg_read(uint16_t addr, void *p) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) p; uint8_t ret, *regs = dev->uhci_io; addr &= 0x0000001f; @@ -63,83 +60,81 @@ uhci_reg_read(uint16_t addr, void *p) return ret; } - static void uhci_reg_write(uint16_t addr, uint8_t val, void *p) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) p; uint8_t *regs = dev->uhci_io; addr &= 0x0000001f; switch (addr) { - case 0x02: - regs[0x02] &= ~(val & 0x3f); - break; - case 0x04: - regs[0x04] = (val & 0x0f); - break; - case 0x09: - regs[0x09] = (val & 0xf0); - break; - case 0x0a: case 0x0b: - regs[addr] = val; - break; - case 0x0c: - regs[0x0c] = (val & 0x7f); - break; + case 0x02: + regs[0x02] &= ~(val & 0x3f); + break; + case 0x04: + regs[0x04] = (val & 0x0f); + break; + case 0x09: + regs[0x09] = (val & 0xf0); + break; + case 0x0a: + case 0x0b: + regs[addr] = val; + break; + case 0x0c: + regs[0x0c] = (val & 0x7f); + break; } } - static void uhci_reg_writew(uint16_t addr, uint16_t val, void *p) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) p; uint16_t *regs = (uint16_t *) dev->uhci_io; addr &= 0x0000001f; switch (addr) { - case 0x00: - if ((val & 0x0001) && !(regs[0x00] & 0x0001)) - regs[0x01] &= ~0x20; - else if (!(val & 0x0001)) - regs[0x01] |= 0x20; - regs[0x00] = (val & 0x00ff); - break; - case 0x06: - regs[0x03] = (val & 0x07ff); - break; - case 0x10: case 0x12: - regs[addr >> 1] = ((regs[addr >> 1] & 0xedbb) | (val & 0x1244)) & ~(val & 0x080a); - break; - default: - uhci_reg_write(addr, val & 0xff, p); - uhci_reg_write(addr + 1, (val >> 8) & 0xff, p); - break; + case 0x00: + if ((val & 0x0001) && !(regs[0x00] & 0x0001)) + regs[0x01] &= ~0x20; + else if (!(val & 0x0001)) + regs[0x01] |= 0x20; + regs[0x00] = (val & 0x00ff); + break; + case 0x06: + regs[0x03] = (val & 0x07ff); + break; + case 0x10: + case 0x12: + regs[addr >> 1] = ((regs[addr >> 1] & 0xedbb) | (val & 0x1244)) & ~(val & 0x080a); + break; + default: + uhci_reg_write(addr, val & 0xff, p); + uhci_reg_write(addr + 1, (val >> 8) & 0xff, p); + break; } } - void uhci_update_io_mapping(usb_t *dev, uint8_t base_l, uint8_t base_h, int enable) { if (dev->uhci_enable && (dev->uhci_io_base != 0x0000)) - io_removehandler(dev->uhci_io_base, 0x20, uhci_reg_read, NULL, NULL, uhci_reg_write, uhci_reg_writew, NULL, dev); + io_removehandler(dev->uhci_io_base, 0x20, uhci_reg_read, NULL, NULL, uhci_reg_write, uhci_reg_writew, NULL, dev); dev->uhci_io_base = base_l | (base_h << 8); - dev->uhci_enable = enable; + dev->uhci_enable = enable; if (dev->uhci_enable && (dev->uhci_io_base != 0x0000)) - io_sethandler(dev->uhci_io_base, 0x20, uhci_reg_read, NULL, NULL, uhci_reg_write, uhci_reg_writew, NULL, dev); + io_sethandler(dev->uhci_io_base, 0x20, uhci_reg_read, NULL, NULL, uhci_reg_write, uhci_reg_writew, NULL, dev); } - static uint8_t ohci_mmio_read(uint32_t addr, void *p) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) p; uint8_t ret = 0x00; addr &= 0x00000fff; @@ -147,210 +142,222 @@ ohci_mmio_read(uint32_t addr, void *p) ret = dev->ohci_mmio[addr]; if (addr == 0x101) - ret = (ret & 0xfe) | (!!mem_a20_key); + ret = (ret & 0xfe) | (!!mem_a20_key); return ret; } - static void ohci_mmio_write(uint32_t addr, uint8_t val, void *p) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) p; uint8_t old; addr &= 0x00000fff; switch (addr) { - case 0x04: - if ((val & 0xc0) == 0x00) { - /* UsbReset */ - dev->ohci_mmio[0x56] = dev->ohci_mmio[0x5a] = 0x16; - } - break; - case 0x08: /* HCCOMMANDSTATUS */ - /* bit OwnershipChangeRequest triggers an ownership change (SMM <-> OS) */ - if (val & 0x08) { - dev->ohci_mmio[0x0f] = 0x40; - if ((dev->ohci_mmio[0x13] & 0xc0) == 0xc0) - smi_raise(); - } + case 0x04: + if ((val & 0xc0) == 0x00) { + /* UsbReset */ + dev->ohci_mmio[0x56] = dev->ohci_mmio[0x5a] = 0x16; + } + break; + case 0x08: /* HCCOMMANDSTATUS */ + /* bit OwnershipChangeRequest triggers an ownership change (SMM <-> OS) */ + if (val & 0x08) { + dev->ohci_mmio[0x0f] = 0x40; + if ((dev->ohci_mmio[0x13] & 0xc0) == 0xc0) + smi_raise(); + } - /* bit HostControllerReset must be cleared for the controller to be seen as initialized */ - if (val & 0x01) { - memset(dev->ohci_mmio, 0x00, 4096); - dev->ohci_mmio[0x00] = 0x10; - dev->ohci_mmio[0x01] = 0x01; - dev->ohci_mmio[0x48] = 0x02; - val &= ~0x01; - } - break; - case 0x0c: - dev->ohci_mmio[addr] &= ~(val & 0x7f); - return; - case 0x0d: case 0x0e: - return; - case 0x0f: - dev->ohci_mmio[addr] &= ~(val & 0x40); - return; - case 0x3b: - dev->ohci_mmio[addr] = (val & 0x80); - return; - case 0x39: case 0x41: - dev->ohci_mmio[addr] = (val & 0x3f); - return; - case 0x45: - dev->ohci_mmio[addr] = (val & 0x0f); - return; - case 0x3a: - case 0x3e: case 0x3f: case 0x42: case 0x43: - case 0x46: case 0x47: case 0x48: case 0x4a: - return; - case 0x49: - dev->ohci_mmio[addr] = (val & 0x1b); - if (val & 0x02) { - dev->ohci_mmio[0x55] |= 0x01; - dev->ohci_mmio[0x59] |= 0x01; - } - return; - case 0x4b: - dev->ohci_mmio[addr] = (val & 0x03); - return; - case 0x4c: case 0x4e: - dev->ohci_mmio[addr] = (val & 0x06); - if ((addr == 0x4c) && !(val & 0x04)) { - if (!(dev->ohci_mmio[0x58] & 0x01)) - dev->ohci_mmio[0x5a] |= 0x01; - dev->ohci_mmio[0x58] |= 0x01; - } if ((addr == 0x4c) && !(val & 0x02)) { - if (!(dev->ohci_mmio[0x54] & 0x01)) - dev->ohci_mmio[0x56] |= 0x01; - dev->ohci_mmio[0x54] |= 0x01; - } - return; - case 0x4d: case 0x4f: - return; - case 0x50: - if (val & 0x01) { - if ((dev->ohci_mmio[0x49] & 0x03) == 0x00) { - dev->ohci_mmio[0x55] &= ~0x01; - dev->ohci_mmio[0x54] &= ~0x17; - dev->ohci_mmio[0x56] &= ~0x17; - dev->ohci_mmio[0x59] &= ~0x01; - dev->ohci_mmio[0x58] &= ~0x17; - dev->ohci_mmio[0x5a] &= ~0x17; - } else if ((dev->ohci_mmio[0x49] & 0x03) == 0x01) { - if (!(dev->ohci_mmio[0x4e] & 0x02)) { - dev->ohci_mmio[0x55] &= ~0x01; - dev->ohci_mmio[0x54] &= ~0x17; - dev->ohci_mmio[0x56] &= ~0x17; - } - if (!(dev->ohci_mmio[0x4e] & 0x04)) { - dev->ohci_mmio[0x59] &= ~0x01; - dev->ohci_mmio[0x58] &= ~0x17; - dev->ohci_mmio[0x5a] &= ~0x17; - } - } - } - return; - case 0x51: - if (val & 0x80) - dev->ohci_mmio[addr] |= 0x80; - return; - case 0x52: - dev->ohci_mmio[addr] &= ~(val & 0x02); - if (val & 0x01) { - if ((dev->ohci_mmio[0x49] & 0x03) == 0x00) { - dev->ohci_mmio[0x55] |= 0x01; - dev->ohci_mmio[0x59] |= 0x01; - } else if ((dev->ohci_mmio[0x49] & 0x03) == 0x01) { - if (!(dev->ohci_mmio[0x4e] & 0x02)) - dev->ohci_mmio[0x55] |= 0x01; - if (!(dev->ohci_mmio[0x4e] & 0x04)) - dev->ohci_mmio[0x59] |= 0x01; - } - } - return; - case 0x53: - if (val & 0x80) - dev->ohci_mmio[0x51] &= ~0x80; - return; - case 0x54: case 0x58: - old = dev->ohci_mmio[addr]; + /* bit HostControllerReset must be cleared for the controller to be seen as initialized */ + if (val & 0x01) { + memset(dev->ohci_mmio, 0x00, 4096); + dev->ohci_mmio[0x00] = 0x10; + dev->ohci_mmio[0x01] = 0x01; + dev->ohci_mmio[0x48] = 0x02; + val &= ~0x01; + } + break; + case 0x0c: + dev->ohci_mmio[addr] &= ~(val & 0x7f); + return; + case 0x0d: + case 0x0e: + return; + case 0x0f: + dev->ohci_mmio[addr] &= ~(val & 0x40); + return; + case 0x3b: + dev->ohci_mmio[addr] = (val & 0x80); + return; + case 0x39: + case 0x41: + dev->ohci_mmio[addr] = (val & 0x3f); + return; + case 0x45: + dev->ohci_mmio[addr] = (val & 0x0f); + return; + case 0x3a: + case 0x3e: + case 0x3f: + case 0x42: + case 0x43: + case 0x46: + case 0x47: + case 0x48: + case 0x4a: + return; + case 0x49: + dev->ohci_mmio[addr] = (val & 0x1b); + if (val & 0x02) { + dev->ohci_mmio[0x55] |= 0x01; + dev->ohci_mmio[0x59] |= 0x01; + } + return; + case 0x4b: + dev->ohci_mmio[addr] = (val & 0x03); + return; + case 0x4c: + case 0x4e: + dev->ohci_mmio[addr] = (val & 0x06); + if ((addr == 0x4c) && !(val & 0x04)) { + if (!(dev->ohci_mmio[0x58] & 0x01)) + dev->ohci_mmio[0x5a] |= 0x01; + dev->ohci_mmio[0x58] |= 0x01; + } + if ((addr == 0x4c) && !(val & 0x02)) { + if (!(dev->ohci_mmio[0x54] & 0x01)) + dev->ohci_mmio[0x56] |= 0x01; + dev->ohci_mmio[0x54] |= 0x01; + } + return; + case 0x4d: + case 0x4f: + return; + case 0x50: + if (val & 0x01) { + if ((dev->ohci_mmio[0x49] & 0x03) == 0x00) { + dev->ohci_mmio[0x55] &= ~0x01; + dev->ohci_mmio[0x54] &= ~0x17; + dev->ohci_mmio[0x56] &= ~0x17; + dev->ohci_mmio[0x59] &= ~0x01; + dev->ohci_mmio[0x58] &= ~0x17; + dev->ohci_mmio[0x5a] &= ~0x17; + } else if ((dev->ohci_mmio[0x49] & 0x03) == 0x01) { + if (!(dev->ohci_mmio[0x4e] & 0x02)) { + dev->ohci_mmio[0x55] &= ~0x01; + dev->ohci_mmio[0x54] &= ~0x17; + dev->ohci_mmio[0x56] &= ~0x17; + } + if (!(dev->ohci_mmio[0x4e] & 0x04)) { + dev->ohci_mmio[0x59] &= ~0x01; + dev->ohci_mmio[0x58] &= ~0x17; + dev->ohci_mmio[0x5a] &= ~0x17; + } + } + } + return; + case 0x51: + if (val & 0x80) + dev->ohci_mmio[addr] |= 0x80; + return; + case 0x52: + dev->ohci_mmio[addr] &= ~(val & 0x02); + if (val & 0x01) { + if ((dev->ohci_mmio[0x49] & 0x03) == 0x00) { + dev->ohci_mmio[0x55] |= 0x01; + dev->ohci_mmio[0x59] |= 0x01; + } else if ((dev->ohci_mmio[0x49] & 0x03) == 0x01) { + if (!(dev->ohci_mmio[0x4e] & 0x02)) + dev->ohci_mmio[0x55] |= 0x01; + if (!(dev->ohci_mmio[0x4e] & 0x04)) + dev->ohci_mmio[0x59] |= 0x01; + } + } + return; + case 0x53: + if (val & 0x80) + dev->ohci_mmio[0x51] &= ~0x80; + return; + case 0x54: + case 0x58: + old = dev->ohci_mmio[addr]; - if (val & 0x10) { - if (old & 0x01) { - dev->ohci_mmio[addr] |= 0x10; - /* TODO: The clear should be on a 10 ms timer. */ - dev->ohci_mmio[addr] &= ~0x10; - dev->ohci_mmio[addr + 2] |= 0x10; - } else - dev->ohci_mmio[addr + 2] |= 0x01; - } - if (val & 0x08) - dev->ohci_mmio[addr] &= ~0x04; - if (val & 0x04) - dev->ohci_mmio[addr] |= 0x04; - if (val & 0x02) { - if (old & 0x01) - dev->ohci_mmio[addr] |= 0x02; - else - dev->ohci_mmio[addr + 2] |= 0x01; - } - if (val & 0x01) { - if (old & 0x01) - dev->ohci_mmio[addr] &= ~0x02; - else - dev->ohci_mmio[addr + 2] |= 0x01; - } + if (val & 0x10) { + if (old & 0x01) { + dev->ohci_mmio[addr] |= 0x10; + /* TODO: The clear should be on a 10 ms timer. */ + dev->ohci_mmio[addr] &= ~0x10; + dev->ohci_mmio[addr + 2] |= 0x10; + } else + dev->ohci_mmio[addr + 2] |= 0x01; + } + if (val & 0x08) + dev->ohci_mmio[addr] &= ~0x04; + if (val & 0x04) + dev->ohci_mmio[addr] |= 0x04; + if (val & 0x02) { + if (old & 0x01) + dev->ohci_mmio[addr] |= 0x02; + else + dev->ohci_mmio[addr + 2] |= 0x01; + } + if (val & 0x01) { + if (old & 0x01) + dev->ohci_mmio[addr] &= ~0x02; + else + dev->ohci_mmio[addr + 2] |= 0x01; + } - if (!(dev->ohci_mmio[addr] & 0x04) && (old & 0x04)) - dev->ohci_mmio[addr + 2] |= 0x04; - /* if (!(dev->ohci_mmio[addr] & 0x02)) - dev->ohci_mmio[addr + 2] |= 0x02; */ - return; - case 0x55: - if ((val & 0x02) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x02)) { - dev->ohci_mmio[addr] &= ~0x01; - dev->ohci_mmio[0x54] &= ~0x17; - dev->ohci_mmio[0x56] &= ~0x17; - } if ((val & 0x01) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x02)) { - dev->ohci_mmio[addr] |= 0x01; - dev->ohci_mmio[0x58] &= ~0x17; - dev->ohci_mmio[0x5a] &= ~0x17; - } - return; - case 0x59: - if ((val & 0x02) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x04)) - dev->ohci_mmio[addr] &= ~0x01; - if ((val & 0x01) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x04)) - dev->ohci_mmio[addr] |= 0x01; - return; - case 0x56: case 0x5a: - dev->ohci_mmio[addr] &= ~(val & 0x1f); - return; - case 0x57: case 0x5b: - return; + if (!(dev->ohci_mmio[addr] & 0x04) && (old & 0x04)) + dev->ohci_mmio[addr + 2] |= 0x04; + /* if (!(dev->ohci_mmio[addr] & 0x02)) + dev->ohci_mmio[addr + 2] |= 0x02; */ + return; + case 0x55: + if ((val & 0x02) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x02)) { + dev->ohci_mmio[addr] &= ~0x01; + dev->ohci_mmio[0x54] &= ~0x17; + dev->ohci_mmio[0x56] &= ~0x17; + } + if ((val & 0x01) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x02)) { + dev->ohci_mmio[addr] |= 0x01; + dev->ohci_mmio[0x58] &= ~0x17; + dev->ohci_mmio[0x5a] &= ~0x17; + } + return; + case 0x59: + if ((val & 0x02) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x04)) + dev->ohci_mmio[addr] &= ~0x01; + if ((val & 0x01) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x04)) + dev->ohci_mmio[addr] |= 0x01; + return; + case 0x56: + case 0x5a: + dev->ohci_mmio[addr] &= ~(val & 0x1f); + return; + case 0x57: + case 0x5b: + return; } dev->ohci_mmio[addr] = val; } - void ohci_update_mem_mapping(usb_t *dev, uint8_t base1, uint8_t base2, uint8_t base3, int enable) { if (dev->ohci_enable && (dev->ohci_mem_base != 0x00000000)) - mem_mapping_disable(&dev->ohci_mmio_mapping); + mem_mapping_disable(&dev->ohci_mmio_mapping); dev->ohci_mem_base = ((base1 << 8) | (base2 << 16) | (base3 << 24)) & 0xfffff000; - dev->ohci_enable = enable; + dev->ohci_enable = enable; if (dev->ohci_enable && (dev->ohci_mem_base != 0x00000000)) - mem_mapping_set_addr(&dev->ohci_mmio_mapping, dev->ohci_mem_base, 0x1000); + mem_mapping_set_addr(&dev->ohci_mmio_mapping, dev->ohci_mem_base, 0x1000); } - static void usb_reset(void *priv) { @@ -372,7 +379,6 @@ usb_reset(void *priv) dev->ohci_enable = 0; } - static void usb_close(void *priv) { @@ -381,14 +387,14 @@ usb_close(void *priv) free(dev); } - static void * usb_init(const device_t *info) { usb_t *dev; - dev = (usb_t *)malloc(sizeof(usb_t)); - if (dev == NULL) return(NULL); + dev = (usb_t *) malloc(sizeof(usb_t)); + if (dev == NULL) + return (NULL); memset(dev, 0x00, sizeof(usb_t)); memset(dev->uhci_io, 0x00, 128); @@ -401,24 +407,24 @@ usb_init(const device_t *info) dev->ohci_mmio[0x48] = 0x02; mem_mapping_add(&dev->ohci_mmio_mapping, 0, 0, - ohci_mmio_read, NULL, NULL, - ohci_mmio_write, NULL, NULL, - NULL, MEM_MAPPING_EXTERNAL, dev); + ohci_mmio_read, NULL, NULL, + ohci_mmio_write, NULL, NULL, + NULL, MEM_MAPPING_EXTERNAL, dev); usb_reset(dev); return dev; } const device_t usb_device = { - .name = "Universal Serial Bus", + .name = "Universal Serial Bus", .internal_name = "usb", - .flags = DEVICE_PCI, - .local = 0, - .init = usb_init, - .close = usb_close, - .reset = usb_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = usb_init, + .close = usb_close, + .reset = usb_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/vnc.c b/src/vnc.c index 0cc745883..e7b112be2 100644 --- a/src/vnc.c +++ b/src/vnc.c @@ -32,97 +32,90 @@ #include <86box/ui.h> #include <86box/vnc.h> +#define VNC_MIN_X 320 +#define VNC_MAX_X 2048 +#define VNC_MIN_Y 200 +#define VNC_MAX_Y 2048 -#define VNC_MIN_X 320 -#define VNC_MAX_X 2048 -#define VNC_MIN_Y 200 -#define VNC_MAX_Y 2048 - - -static rfbScreenInfoPtr rfb = NULL; -static int clients; -static int updatingSize; -static int allowedX, - allowedY; -static int ptr_x, ptr_y, ptr_but; - +static rfbScreenInfoPtr rfb = NULL; +static int clients; +static int updatingSize; +static int allowedX, + allowedY; +static int ptr_x, ptr_y, ptr_but; #ifdef ENABLE_VNC_LOG int vnc_do_log = ENABLE_VNC_LOG; - static void vnc_log(const char *fmt, ...) { va_list ap; if (vnc_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define vnc_log(fmt, ...) +# define vnc_log(fmt, ...) #endif - static void vnc_kbdevent(rfbBool down, rfbKeySym k, rfbClientPtr cl) { - (void)cl; + (void) cl; /* Handle it through the lookup tables. */ - vnc_kbinput(down?1:0, (int)k); + vnc_kbinput(down ? 1 : 0, (int) k); } - static void vnc_ptrevent(int but, int x, int y, rfbClientPtr cl) { - if (x>=0 && x=0 && y= 0 && x < allowedX && y >= 0 && y < allowedY) { + /* VNC uses absolute positions within the window, no deltas. */ + if (x != ptr_x || y != ptr_y) { + mouse_x += (x - ptr_x) / 100; + mouse_y += (y - ptr_y) / 100; + ptr_x = x; + ptr_y = y; + } - if (but != ptr_but) { - mouse_buttons = 0; - if (but & 0x01) - mouse_buttons |= 0x01; - if (but & 0x02) - mouse_buttons |= 0x04; - if (but & 0x04) - mouse_buttons |= 0x02; - ptr_but = but; - } - } + if (but != ptr_but) { + mouse_buttons = 0; + if (but & 0x01) + mouse_buttons |= 0x01; + if (but & 0x02) + mouse_buttons |= 0x04; + if (but & 0x04) + mouse_buttons |= 0x02; + ptr_but = but; + } + } - rfbDefaultPtrAddEvent(but, x, y, cl); + rfbDefaultPtrAddEvent(but, x, y, cl); } - static void vnc_clientgone(rfbClientPtr cl) { vnc_log("VNC: client disconnected: %s\n", cl->host); if (clients > 0) - clients--; + clients--; if (clients == 0) { - /* No more clients, pause the emulator. */ - vnc_log("VNC: no clients, pausing..\n"); + /* No more clients, pause the emulator. */ + vnc_log("VNC: no clients, pausing..\n"); - /* Disable the mouse. */ - plat_mouse_capture(0); + /* Disable the mouse. */ + plat_mouse_capture(0); - plat_pause(1); + plat_pause(1); } } - static enum rfbNewClientAction vnc_newclient(rfbClientPtr cl) { @@ -131,114 +124,111 @@ vnc_newclient(rfbClientPtr cl) vnc_log("VNC: new client: %s\n", cl->host); if (++clients == 1) { - /* Reset the mouse. */ - ptr_x = allowedX/2; - ptr_y = allowedY/2; - mouse_x = mouse_y = mouse_z = 0; - mouse_buttons = 0x00; + /* Reset the mouse. */ + ptr_x = allowedX / 2; + ptr_y = allowedY / 2; + mouse_x = mouse_y = mouse_z = 0; + mouse_buttons = 0x00; - /* We now have clients, un-pause the emulator if needed. */ - vnc_log("VNC: unpausing..\n"); + /* We now have clients, un-pause the emulator if needed. */ + vnc_log("VNC: unpausing..\n"); - /* Enable the mouse. */ - plat_mouse_capture(1); + /* Enable the mouse. */ + plat_mouse_capture(1); - plat_pause(0); + plat_pause(0); } /* For now, we always accept clients. */ - return(RFB_CLIENT_ACCEPT); + return (RFB_CLIENT_ACCEPT); } - static void vnc_display(rfbClientPtr cl) { /* Avoid race condition between resize and update. */ if (!updatingSize && cl->newFBSizePending) { - updatingSize = 1; + updatingSize = 1; } else if (updatingSize && !cl->newFBSizePending) { - updatingSize = 0; + updatingSize = 0; - allowedX = rfb->width; - allowedY = rfb->height; + allowedX = rfb->width; + allowedY = rfb->height; } } - static void vnc_blit(int x, int y, int w, int h, int monitor_index) { uint32_t *p; - int yy; + int yy; if (monitor_index || (x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (buffer32 == NULL)) { video_blit_complete_monitor(monitor_index); return; } - for (yy=0; yyframeBuffer)[yy*VNC_MAX_X]); + for (yy = 0; yy < h; yy++) { + p = (uint32_t *) &(((uint32_t *) rfb->frameBuffer)[yy * VNC_MAX_X]); - if ((y+yy) >= 0 && (y+yy) < VNC_MAX_Y) - video_copy(p, &(buffer32->line[yy]), w*sizeof(uint32_t)); + if ((y + yy) >= 0 && (y + yy) < VNC_MAX_Y) + video_copy(p, &(buffer32->line[yy]), w * sizeof(uint32_t)); } if (screenshots) - video_screenshot((uint32_t *) rfb->frameBuffer, 0, 0, VNC_MAX_X); + video_screenshot((uint32_t *) rfb->frameBuffer, 0, 0, VNC_MAX_X); video_blit_complete_monitor(monitor_index); - if (! updatingSize) - rfbMarkRectAsModified(rfb, 0,0, allowedX,allowedY); + if (!updatingSize) + rfbMarkRectAsModified(rfb, 0, 0, allowedX, allowedY); } - /* Initialize VNC for operation. */ int vnc_init(UNUSED(void *arg)) { - static char title[128]; + static char title[128]; rfbPixelFormat rpf = { - /* - * Screen format: - * 32bpp; 32 depth; - * little endian; - * true color; - * max 255 R/G/B; - * red shift 16; green shift 8; blue shift 0; - * padding - */ - 32, 32, 0, 1, 255,255,255, 16, 8, 0, 0, 0 + /* + * Screen format: + * 32bpp; 32 depth; + * little endian; + * true color; + * max 255 R/G/B; + * red shift 16; green shift 8; blue shift 0; + * padding + */ + 32, 32, 0, 1, 255, 255, 255, 16, 8, 0, 0, 0 }; plat_pause(1); cgapal_rebuild_monitor(0); if (rfb == NULL) { - wcstombs(title, ui_window_title(NULL), sizeof(title)); - updatingSize = 0; - allowedX = scrnsz_x; - allowedY = scrnsz_y; + wcstombs(title, ui_window_title(NULL), sizeof(title)); + updatingSize = 0; + allowedX = scrnsz_x; + allowedY = scrnsz_y; - rfb = rfbGetScreen(0, NULL, VNC_MAX_X, VNC_MAX_Y, 8, 3, 4); - rfb->desktopName = title; - rfb->frameBuffer = (char *)malloc(VNC_MAX_X*VNC_MAX_Y*4); + rfb = rfbGetScreen(0, NULL, VNC_MAX_X, VNC_MAX_Y, 8, 3, 4); + rfb->desktopName = title; + rfb->frameBuffer = (char *) malloc(VNC_MAX_X * VNC_MAX_Y * 4); - rfb->serverFormat = rpf; - rfb->alwaysShared = TRUE; - rfb->displayHook = vnc_display; - rfb->ptrAddEvent = vnc_ptrevent; - rfb->kbdAddEvent = vnc_kbdevent; - rfb->newClientHook = vnc_newclient; + rfb->serverFormat = rpf; + rfb->alwaysShared = TRUE; + rfb->displayHook = vnc_display; + rfb->ptrAddEvent = vnc_ptrevent; + rfb->kbdAddEvent = vnc_kbdevent; + rfb->newClientHook = vnc_newclient; - /* Set up our current resolution. */ - rfb->width = allowedX; - rfb->height = allowedY; + /* Set up our current resolution. */ + rfb->width = allowedX; + rfb->height = allowedY; - rfbInitServer(rfb); + rfbInitServer(rfb); - rfbRunEventLoop(rfb, -1, TRUE); + rfbRunEventLoop(rfb, -1, TRUE); } /* Set up our BLIT handlers. */ @@ -248,66 +238,63 @@ vnc_init(UNUSED(void *arg)) vnc_log("VNC: init complete.\n"); - return(1); + return (1); } - void vnc_close(void) { video_setblit(NULL); if (rfb != NULL) { - free(rfb->frameBuffer); + free(rfb->frameBuffer); - rfbScreenCleanup(rfb); + rfbScreenCleanup(rfb); - rfb = NULL; + rfb = NULL; } } - void vnc_resize(int x, int y) { rfbClientIteratorPtr iterator; - rfbClientPtr cl; + rfbClientPtr cl; - if (rfb == NULL) return; + if (rfb == NULL) + return; /* TightVNC doesn't like certain sizes.. */ if (x < VNC_MIN_X || x > VNC_MAX_X || y < VNC_MIN_Y || y > VNC_MAX_Y) { - vnc_log("VNC: invalid resoltion %dx%d requested!\n", x, y); - return; + vnc_log("VNC: invalid resoltion %dx%d requested!\n", x, y); + return; } if ((x != rfb->width || y != rfb->height) && x > 160 && y > 0) { - vnc_log("VNC: updating resolution: %dx%d\n", x, y); + vnc_log("VNC: updating resolution: %dx%d\n", x, y); - allowedX = (rfb->width < x) ? rfb->width : x; - allowedY = (rfb->width < y) ? rfb->width : y; + allowedX = (rfb->width < x) ? rfb->width : x; + allowedY = (rfb->width < y) ? rfb->width : y; - rfb->width = x; - rfb->height = y; + rfb->width = x; + rfb->height = y; - iterator = rfbGetClientIterator(rfb); - while ((cl = rfbClientIteratorNext(iterator)) != NULL) { - LOCK(cl->updateMutex); - cl->newFBSizePending = 1; - UNLOCK(cl->updateMutex); - } + iterator = rfbGetClientIterator(rfb); + while ((cl = rfbClientIteratorNext(iterator)) != NULL) { + LOCK(cl->updateMutex); + cl->newFBSizePending = 1; + UNLOCK(cl->updateMutex); + } } } - /* Tell them to pause if we have no clients. */ int vnc_pause(void) { - return((clients > 0) ? 0 : 1); + return ((clients > 0) ? 0 : 1); } - void vnc_take_screenshot(wchar_t *fn) { diff --git a/src/vnc_keymap.c b/src/vnc_keymap.c index fd9769de9..a3c60d398 100644 --- a/src/vnc_keymap.c +++ b/src/vnc_keymap.c @@ -41,9 +41,8 @@ #include <86box/plat.h> #include <86box/vnc.h> - static int keysyms_00[] = { - 0x0000, /* 0x00 */ + 0x0000, /* 0x00 */ 0x0000, 0x0000, 0x0000, @@ -52,7 +51,7 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0000, /* 0x08 */ + 0x0000, /* 0x08 */ 0x0000, 0x0000, 0x0000, @@ -61,7 +60,7 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0000, /* 0x10 */ + 0x0000, /* 0x10 */ 0x0000, 0x0000, 0x0000, @@ -70,7 +69,7 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0000, /* 0x18 */ + 0x0000, /* 0x18 */ 0x0000, 0x0000, 0x0000, @@ -79,115 +78,115 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0039, /* 0x20 (XK_space) */ - 0x2a02, /* 0x21 (XK_exclam) */ - 0x2a28, /* 0x22 (XK_quotedbl) */ - 0x2a04, /* 0x23 (XK_numbersign) */ - 0x2a05, /* 0x24 (XK_dollar) */ - 0x2a06, /* 0x25 (XK_percent) */ - 0x2a08, /* 0x26 (XK_ampersand) */ - 0x0028, /* 0x27 (XK_apostrophe) */ + 0x0039, /* 0x20 (XK_space) */ + 0x2a02, /* 0x21 (XK_exclam) */ + 0x2a28, /* 0x22 (XK_quotedbl) */ + 0x2a04, /* 0x23 (XK_numbersign) */ + 0x2a05, /* 0x24 (XK_dollar) */ + 0x2a06, /* 0x25 (XK_percent) */ + 0x2a08, /* 0x26 (XK_ampersand) */ + 0x0028, /* 0x27 (XK_apostrophe) */ - 0x2a0a, /* 0x28 (XK_parenleft) */ - 0x2a0b, /* 0x29 (XK_parenright) */ - 0x2a09, /* 0x2a (XK_asterisk) */ - 0x2a0d, /* 0x2b (XK_plus) */ - 0x0033, /* 0x2c (XK_comma) */ - 0x000c, /* 0x2d (XK_minus) */ - 0x0034, /* 0x2e (XK_period) */ - 0x0035, /* 0x2f (XK_slash) */ + 0x2a0a, /* 0x28 (XK_parenleft) */ + 0x2a0b, /* 0x29 (XK_parenright) */ + 0x2a09, /* 0x2a (XK_asterisk) */ + 0x2a0d, /* 0x2b (XK_plus) */ + 0x0033, /* 0x2c (XK_comma) */ + 0x000c, /* 0x2d (XK_minus) */ + 0x0034, /* 0x2e (XK_period) */ + 0x0035, /* 0x2f (XK_slash) */ - 0x000b, /* 0x30 (XK_0) */ - 0x0002, /* 0x31 (XK_1) */ - 0x0003, /* 0x32 (XK_2) */ - 0x0004, /* 0x33 (XK_3) */ - 0x0005, /* 0x34 (XK_4) */ - 0x0006, /* 0x35 (XK_5) */ - 0x0007, /* 0x36 (XK_6) */ - 0x0008, /* 0x37 (XK_7) */ + 0x000b, /* 0x30 (XK_0) */ + 0x0002, /* 0x31 (XK_1) */ + 0x0003, /* 0x32 (XK_2) */ + 0x0004, /* 0x33 (XK_3) */ + 0x0005, /* 0x34 (XK_4) */ + 0x0006, /* 0x35 (XK_5) */ + 0x0007, /* 0x36 (XK_6) */ + 0x0008, /* 0x37 (XK_7) */ - 0x0009, /* 0x38 (XK_8) */ - 0x000a, /* 0x39 (XK_9) */ - 0x2a27, /* 0x3a (XK_colon) */ - 0x0027, /* 0x3b (XK_semicolon) */ - 0x2a33, /* 0x3c (XK_less) */ - 0x000d, /* 0x3d (XK_equal) */ - 0x2a34, /* 0x3e (XK_greater) */ - 0x2a35, /* 0x3f (XK_question) */ + 0x0009, /* 0x38 (XK_8) */ + 0x000a, /* 0x39 (XK_9) */ + 0x2a27, /* 0x3a (XK_colon) */ + 0x0027, /* 0x3b (XK_semicolon) */ + 0x2a33, /* 0x3c (XK_less) */ + 0x000d, /* 0x3d (XK_equal) */ + 0x2a34, /* 0x3e (XK_greater) */ + 0x2a35, /* 0x3f (XK_question) */ - 0x2a03, /* 0x40 (XK_at) */ - 0x2a1e, /* 0x41 (XK_A) */ - 0x2a30, /* 0x42 (XK_B) */ - 0x2a2e, /* 0x43 (XK_C) */ - 0x2a20, /* 0x44 (XK_D) */ - 0x2a12, /* 0x45 (XK_E) */ - 0x2a21, /* 0x46 (XK_F) */ - 0x2a22, /* 0x47 (XK_G) */ + 0x2a03, /* 0x40 (XK_at) */ + 0x2a1e, /* 0x41 (XK_A) */ + 0x2a30, /* 0x42 (XK_B) */ + 0x2a2e, /* 0x43 (XK_C) */ + 0x2a20, /* 0x44 (XK_D) */ + 0x2a12, /* 0x45 (XK_E) */ + 0x2a21, /* 0x46 (XK_F) */ + 0x2a22, /* 0x47 (XK_G) */ - 0x2a23, /* 0x48 (XK_H) */ - 0x2a17, /* 0x49 (XK_I) */ - 0x2a24, /* 0x4a (XK_J) */ - 0x2a25, /* 0x4b (XK_K) */ - 0x2a26, /* 0x4c (XK_L) */ - 0x2a32, /* 0x4d (XK_M) */ - 0x2a31, /* 0x4e (XK_N) */ - 0x2a18, /* 0x4f (XK_O) */ + 0x2a23, /* 0x48 (XK_H) */ + 0x2a17, /* 0x49 (XK_I) */ + 0x2a24, /* 0x4a (XK_J) */ + 0x2a25, /* 0x4b (XK_K) */ + 0x2a26, /* 0x4c (XK_L) */ + 0x2a32, /* 0x4d (XK_M) */ + 0x2a31, /* 0x4e (XK_N) */ + 0x2a18, /* 0x4f (XK_O) */ - 0x2a19, /* 0x50 (XK_P) */ - 0x2a10, /* 0x51 (XK_Q) */ - 0x2a13, /* 0x52 (XK_R) */ - 0x2a1f, /* 0x53 (XK_S) */ - 0x2a14, /* 0x54 (XK_T) */ - 0x2a16, /* 0x55 (XK_U) */ - 0x2a2f, /* 0x56 (XK_V) */ - 0x2a11, /* 0x57 (XK_W) */ + 0x2a19, /* 0x50 (XK_P) */ + 0x2a10, /* 0x51 (XK_Q) */ + 0x2a13, /* 0x52 (XK_R) */ + 0x2a1f, /* 0x53 (XK_S) */ + 0x2a14, /* 0x54 (XK_T) */ + 0x2a16, /* 0x55 (XK_U) */ + 0x2a2f, /* 0x56 (XK_V) */ + 0x2a11, /* 0x57 (XK_W) */ - 0x2a2d, /* 0x58 (XK_X) */ - 0x2a15, /* 0x59 (XK_Y) */ - 0x2a2c, /* 0x5a (XK_Z) */ - 0x001a, /* 0x5b (XK_bracketleft) */ - 0x002b, /* 0x5c (XK_backslash) */ - 0x001b, /* 0x5d (XK_bracketright) */ - 0x2a07, /* 0x5e (XK_asciicircum) */ - 0x2a0c, /* 0x5f (XK_underscore) */ + 0x2a2d, /* 0x58 (XK_X) */ + 0x2a15, /* 0x59 (XK_Y) */ + 0x2a2c, /* 0x5a (XK_Z) */ + 0x001a, /* 0x5b (XK_bracketleft) */ + 0x002b, /* 0x5c (XK_backslash) */ + 0x001b, /* 0x5d (XK_bracketright) */ + 0x2a07, /* 0x5e (XK_asciicircum) */ + 0x2a0c, /* 0x5f (XK_underscore) */ - 0x0029, /* 0x60 (XK_grave) */ - 0x001e, /* 0x61 (XK_a) */ - 0x0030, /* 0x62 (XK_b) */ - 0x002e, /* 0x63 (XK_c) */ - 0x0020, /* 0x64 (XK_d) */ - 0x0012, /* 0x65 (XK_e) */ - 0x0021, /* 0x66 (XK_f) */ - 0x0022, /* 0x67 (XK_g) */ + 0x0029, /* 0x60 (XK_grave) */ + 0x001e, /* 0x61 (XK_a) */ + 0x0030, /* 0x62 (XK_b) */ + 0x002e, /* 0x63 (XK_c) */ + 0x0020, /* 0x64 (XK_d) */ + 0x0012, /* 0x65 (XK_e) */ + 0x0021, /* 0x66 (XK_f) */ + 0x0022, /* 0x67 (XK_g) */ - 0x0023, /* 0x68 (XK_h) */ - 0x0017, /* 0x69 (XK_i) */ - 0x0024, /* 0x6a (XK_j) */ - 0x0025, /* 0x6b (XK_k) */ - 0x0026, /* 0x6c (XK_l) */ - 0x0032, /* 0x6d (XK_m) */ - 0x0031, /* 0x6e (XK_n) */ - 0x0018, /* 0x6f (XK_o) */ + 0x0023, /* 0x68 (XK_h) */ + 0x0017, /* 0x69 (XK_i) */ + 0x0024, /* 0x6a (XK_j) */ + 0x0025, /* 0x6b (XK_k) */ + 0x0026, /* 0x6c (XK_l) */ + 0x0032, /* 0x6d (XK_m) */ + 0x0031, /* 0x6e (XK_n) */ + 0x0018, /* 0x6f (XK_o) */ - 0x0019, /* 0x70 (XK_p) */ - 0x0010, /* 0x71 (XK_q) */ - 0x0013, /* 0x72 (XK_r) */ - 0x001f, /* 0x73 (XK_s) */ - 0x0014, /* 0x74 (XK_t) */ - 0x0016, /* 0x75 (XK_u) */ - 0x002f, /* 0x76 (XK_v) */ - 0x0011, /* 0x77 (XK_w) */ + 0x0019, /* 0x70 (XK_p) */ + 0x0010, /* 0x71 (XK_q) */ + 0x0013, /* 0x72 (XK_r) */ + 0x001f, /* 0x73 (XK_s) */ + 0x0014, /* 0x74 (XK_t) */ + 0x0016, /* 0x75 (XK_u) */ + 0x002f, /* 0x76 (XK_v) */ + 0x0011, /* 0x77 (XK_w) */ - 0x002d, /* 0x78 (XK_x) */ - 0x0015, /* 0x79 (XK_y) */ - 0x002c, /* 0x7a (XK_z) */ - 0x2a1a, /* 0x7b (XK_braceleft) */ - 0x2a2b, /* 0x7c (XK_bar) */ - 0x2a1b, /* 0x7d (XK_braceright) */ - 0x2a29, /* 0x7e (XK_asciitilde) */ - 0x0053, /* 0x7f (XK_delete) */ + 0x002d, /* 0x78 (XK_x) */ + 0x0015, /* 0x79 (XK_y) */ + 0x002c, /* 0x7a (XK_z) */ + 0x2a1a, /* 0x7b (XK_braceleft) */ + 0x2a2b, /* 0x7c (XK_bar) */ + 0x2a1b, /* 0x7d (XK_braceright) */ + 0x2a29, /* 0x7e (XK_asciitilde) */ + 0x0053, /* 0x7f (XK_delete) */ - 0x0000, /* 0x80 */ + 0x0000, /* 0x80 */ 0x0000, 0x0000, 0x0000, @@ -196,7 +195,7 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0000, /* 0x88 */ + 0x0000, /* 0x88 */ 0x0000, 0x0000, 0x0000, @@ -205,7 +204,7 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0000, /* 0x90 */ + 0x0000, /* 0x90 */ 0x0000, 0x0000, 0x0000, @@ -214,7 +213,7 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0000, /* 0x98 */ + 0x0000, /* 0x98 */ 0x0000, 0x0000, 0x0000, @@ -223,117 +222,117 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0000, /* 0xa0 (XK_nobreakspace) */ - 0x0000, /* 0xa1 (XK_exclamdown) */ - 0x0000, /* 0xa2 (XK_cent) */ - 0x0000, /* 0xa3 (XK_sterling) */ - 0x0000, /* 0xa4 (XK_currency) */ - 0x0000, /* 0xa5 (XK_yen) */ - 0x0000, /* 0xa6 (XK_brokenbar) */ - 0x0000, /* 0xa7 (XK_section) */ + 0x0000, /* 0xa0 (XK_nobreakspace) */ + 0x0000, /* 0xa1 (XK_exclamdown) */ + 0x0000, /* 0xa2 (XK_cent) */ + 0x0000, /* 0xa3 (XK_sterling) */ + 0x0000, /* 0xa4 (XK_currency) */ + 0x0000, /* 0xa5 (XK_yen) */ + 0x0000, /* 0xa6 (XK_brokenbar) */ + 0x0000, /* 0xa7 (XK_section) */ - 0x0000, /* 0xa8 (XK_diaeresis) */ - 0x0000, /* 0xa9 (XK_copyright) */ - 0x0000, /* 0xaa (XK_ordfeminine) */ - 0x0000, /* 0xab (XK_guillemotleft) */ - 0x0000, /* 0xac (XK_notsign) */ - 0x0000, /* 0xad (XK_hyphen) */ - 0x0000, /* 0xae (XK_registered) */ - 0x0000, /* 0xaf (XK_macron) */ + 0x0000, /* 0xa8 (XK_diaeresis) */ + 0x0000, /* 0xa9 (XK_copyright) */ + 0x0000, /* 0xaa (XK_ordfeminine) */ + 0x0000, /* 0xab (XK_guillemotleft) */ + 0x0000, /* 0xac (XK_notsign) */ + 0x0000, /* 0xad (XK_hyphen) */ + 0x0000, /* 0xae (XK_registered) */ + 0x0000, /* 0xaf (XK_macron) */ - 0x0000, /* 0xb0 (XK_degree) */ - 0x0000, /* 0xb1 (XK_plusminus) */ - 0x0000, /* 0xb2 (XK_twosuperior) */ - 0x0000, /* 0xb3 (XK_threesuperior) */ - 0x0000, /* 0xb4 (XK_acute) */ - 0x0000, /* 0xb5 (XK_mu) */ - 0x0000, /* 0xb6 (XK_paragraph) */ - 0x0000, /* 0xb7 (XK_periodcentered) */ + 0x0000, /* 0xb0 (XK_degree) */ + 0x0000, /* 0xb1 (XK_plusminus) */ + 0x0000, /* 0xb2 (XK_twosuperior) */ + 0x0000, /* 0xb3 (XK_threesuperior) */ + 0x0000, /* 0xb4 (XK_acute) */ + 0x0000, /* 0xb5 (XK_mu) */ + 0x0000, /* 0xb6 (XK_paragraph) */ + 0x0000, /* 0xb7 (XK_periodcentered) */ - 0x0000, /* 0xb8 (XK_cedilla) */ - 0x0000, /* 0xb9 (XK_onesuperior) */ - 0x0000, /* 0xba (XK_masculine) */ - 0x0000, /* 0xbb (XK_guillemotright) */ - 0x0000, /* 0xbc (XK_onequarter) */ - 0x0000, /* 0xbd (XK_onehalf) */ - 0x0000, /* 0xbe (XK_threequarters) */ - 0x0000, /* 0xbf (XK_questiondown) */ + 0x0000, /* 0xb8 (XK_cedilla) */ + 0x0000, /* 0xb9 (XK_onesuperior) */ + 0x0000, /* 0xba (XK_masculine) */ + 0x0000, /* 0xbb (XK_guillemotright) */ + 0x0000, /* 0xbc (XK_onequarter) */ + 0x0000, /* 0xbd (XK_onehalf) */ + 0x0000, /* 0xbe (XK_threequarters) */ + 0x0000, /* 0xbf (XK_questiondown) */ - 0x0000, /* 0xc0 (XK_Agrave) */ - 0x0000, /* 0xc1 (XK_Aacute) */ - 0x0000, /* 0xc2 (XK_Acircumflex) */ - 0x0000, /* 0xc3 (XK_Atilde) */ - 0x0000, /* 0xc4 (XK_Adiaeresis) */ - 0x0000, /* 0xc5 (XK_Aring) */ - 0x0000, /* 0xc6 (XK_AE) */ - 0x0000, /* 0xc7 (XK_Ccedilla) */ + 0x0000, /* 0xc0 (XK_Agrave) */ + 0x0000, /* 0xc1 (XK_Aacute) */ + 0x0000, /* 0xc2 (XK_Acircumflex) */ + 0x0000, /* 0xc3 (XK_Atilde) */ + 0x0000, /* 0xc4 (XK_Adiaeresis) */ + 0x0000, /* 0xc5 (XK_Aring) */ + 0x0000, /* 0xc6 (XK_AE) */ + 0x0000, /* 0xc7 (XK_Ccedilla) */ - 0x0000, /* 0xc8 (XK_Egrave) */ - 0x0000, /* 0xc9 (XK_Eacute) */ - 0x0000, /* 0xca (XK_Ecircumflex) */ - 0x0000, /* 0xcb (XK_Ediaeresis) */ - 0x0000, /* 0xcc (XK_Igrave) */ - 0x0000, /* 0xcd (XK_Iacute) */ - 0x0000, /* 0xce (XK_Icircumflex) */ - 0x0000, /* 0xcf (XK_Idiaeresis) */ + 0x0000, /* 0xc8 (XK_Egrave) */ + 0x0000, /* 0xc9 (XK_Eacute) */ + 0x0000, /* 0xca (XK_Ecircumflex) */ + 0x0000, /* 0xcb (XK_Ediaeresis) */ + 0x0000, /* 0xcc (XK_Igrave) */ + 0x0000, /* 0xcd (XK_Iacute) */ + 0x0000, /* 0xce (XK_Icircumflex) */ + 0x0000, /* 0xcf (XK_Idiaeresis) */ - 0x0000, /* 0xd0 (XK_ETH, also XK_Eth) */ - 0x0000, /* 0xd1 (XK_Ntilde) */ - 0x0000, /* 0xd2 (XK_Ograve) */ - 0x0000, /* 0xd3 (XK_Oacute) */ - 0x0000, /* 0xd4 (XK_Ocircumflex) */ - 0x0000, /* 0xd5 (XK_Otilde) */ - 0x0000, /* 0xd6 (XK_Odiaeresis) */ - 0x0000, /* 0xd7 (XK_multiply) */ + 0x0000, /* 0xd0 (XK_ETH, also XK_Eth) */ + 0x0000, /* 0xd1 (XK_Ntilde) */ + 0x0000, /* 0xd2 (XK_Ograve) */ + 0x0000, /* 0xd3 (XK_Oacute) */ + 0x0000, /* 0xd4 (XK_Ocircumflex) */ + 0x0000, /* 0xd5 (XK_Otilde) */ + 0x0000, /* 0xd6 (XK_Odiaeresis) */ + 0x0000, /* 0xd7 (XK_multiply) */ - 0x0000, /* 0xd8 (XK_Ooblique) */ - 0x0000, /* 0xd9 (XK_Ugrave) */ - 0x0000, /* 0xda (XK_Uacute) */ - 0x0000, /* 0xdb (XK_Ucircumflex) */ - 0x0000, /* 0xdc (XK_Udiaeresis) */ - 0x0000, /* 0xdd (XK_Yacute) */ - 0x0000, /* 0xde (XK_THORN) */ - 0x0000, /* 0xdf (XK_ssharp) */ + 0x0000, /* 0xd8 (XK_Ooblique) */ + 0x0000, /* 0xd9 (XK_Ugrave) */ + 0x0000, /* 0xda (XK_Uacute) */ + 0x0000, /* 0xdb (XK_Ucircumflex) */ + 0x0000, /* 0xdc (XK_Udiaeresis) */ + 0x0000, /* 0xdd (XK_Yacute) */ + 0x0000, /* 0xde (XK_THORN) */ + 0x0000, /* 0xdf (XK_ssharp) */ - 0x0000, /* 0xe0 (XK_agrave) */ - 0x0000, /* 0xe1 (XK_aacute) */ - 0x0000, /* 0xe2 (XK_acircumflex) */ - 0x0000, /* 0xe3 (XK_atilde) */ - 0x0000, /* 0xe4 (XK_adiaeresis) */ - 0x0000, /* 0xe5 (XK_aring) */ - 0x0000, /* 0xe6 (XK_ae) */ - 0x0000, /* 0xe7 (XK_ccedilla) */ + 0x0000, /* 0xe0 (XK_agrave) */ + 0x0000, /* 0xe1 (XK_aacute) */ + 0x0000, /* 0xe2 (XK_acircumflex) */ + 0x0000, /* 0xe3 (XK_atilde) */ + 0x0000, /* 0xe4 (XK_adiaeresis) */ + 0x0000, /* 0xe5 (XK_aring) */ + 0x0000, /* 0xe6 (XK_ae) */ + 0x0000, /* 0xe7 (XK_ccedilla) */ - 0x0000, /* 0xe8 (XK_egrave) */ - 0x0000, /* 0xe9 (XK_eacute) */ - 0x0000, /* 0xea (XK_ecircumflex) */ - 0x0000, /* 0xeb (XK_ediaeresis) */ - 0x0000, /* 0xec (XK_igrave) */ - 0x0000, /* 0xed (XK_iacute) */ - 0x0000, /* 0xee (XK_icircumflex) */ - 0x0000, /* 0xef (XK_idiaeresis) */ + 0x0000, /* 0xe8 (XK_egrave) */ + 0x0000, /* 0xe9 (XK_eacute) */ + 0x0000, /* 0xea (XK_ecircumflex) */ + 0x0000, /* 0xeb (XK_ediaeresis) */ + 0x0000, /* 0xec (XK_igrave) */ + 0x0000, /* 0xed (XK_iacute) */ + 0x0000, /* 0xee (XK_icircumflex) */ + 0x0000, /* 0xef (XK_idiaeresis) */ - 0x0000, /* 0xf0 (XK_eth) */ - 0x0000, /* 0xf1 (XK_ntilde) */ - 0x0000, /* 0xf2 (XK_ograve) */ - 0x0000, /* 0xf3 (XK_oacute) */ - 0x0000, /* 0xf4 (XK_ocircumflex) */ - 0x0000, /* 0xf5 (XK_otilde) */ - 0x0000, /* 0xf6 (XK_odiaeresis) */ - 0x0000, /* 0xf7 (XK_division) */ + 0x0000, /* 0xf0 (XK_eth) */ + 0x0000, /* 0xf1 (XK_ntilde) */ + 0x0000, /* 0xf2 (XK_ograve) */ + 0x0000, /* 0xf3 (XK_oacute) */ + 0x0000, /* 0xf4 (XK_ocircumflex) */ + 0x0000, /* 0xf5 (XK_otilde) */ + 0x0000, /* 0xf6 (XK_odiaeresis) */ + 0x0000, /* 0xf7 (XK_division) */ - 0x0000, /* 0xf8 (XK_oslash) */ - 0x0000, /* 0xf9 (XK_ugrave) */ - 0x0000, /* 0xfa (XK_uacute) */ - 0x0000, /* 0xfb (XK_ucircumflex) */ - 0x0000, /* 0xfc (XK_udiaeresis) */ - 0x0000, /* 0xfd (XK_yacute) */ - 0x0000, /* 0xfe (XK_thorn) */ - 0x0000 /* 0xff (XK_ydiaeresis) */ + 0x0000, /* 0xf8 (XK_oslash) */ + 0x0000, /* 0xf9 (XK_ugrave) */ + 0x0000, /* 0xfa (XK_uacute) */ + 0x0000, /* 0xfb (XK_ucircumflex) */ + 0x0000, /* 0xfc (XK_udiaeresis) */ + 0x0000, /* 0xfd (XK_yacute) */ + 0x0000, /* 0xfe (XK_thorn) */ + 0x0000 /* 0xff (XK_ydiaeresis) */ }; static int keysyms_ff[] = { - 0x0000, /* 0x00 */ + 0x0000, /* 0x00 */ 0x0000, 0x0000, 0x0000, @@ -342,52 +341,52 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x000e, /* 0x08 (XK_BackSpace) */ - 0x000f, /* 0x09 (XK_Tab) */ - 0x0000, /* 0x0a (XK_Linefeed) */ - 0x004c, /* 0x0b (XK_Clear) */ + 0x000e, /* 0x08 (XK_BackSpace) */ + 0x000f, /* 0x09 (XK_Tab) */ + 0x0000, /* 0x0a (XK_Linefeed) */ + 0x004c, /* 0x0b (XK_Clear) */ 0x0000, - 0x001c, /* 0x0d (XK_Return) */ + 0x001c, /* 0x0d (XK_Return) */ 0x0000, 0x0000, - 0x0000, /* 0x10 */ + 0x0000, /* 0x10 */ 0x0000, 0x0000, - 0xff45, /* 0x13 (XK_Pause) */ - 0x0000, /* 0x14 (XK_Scroll_Lock) */ - 0x0000, /* 0x15 (XK_Sys_Req) */ + 0xff45, /* 0x13 (XK_Pause) */ + 0x0000, /* 0x14 (XK_Scroll_Lock) */ + 0x0000, /* 0x15 (XK_Sys_Req) */ 0x0000, 0x0000, - 0x0000, /* 0x18 */ + 0x0000, /* 0x18 */ 0x0000, 0x0000, - 0x0001, /* 0x1b (XK_Escape) */ + 0x0001, /* 0x1b (XK_Escape) */ 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, /* 0x20 (XK_Multi_key) */ - 0x0000, /* 0x21 (XK_Kanji; Kanji, Kanji convert) */ - 0x0000, /* 0x22 (XK_Muhenkan; Cancel Conversion) */ - 0x0000, /* 0x23 (XK_Henkan_Mode; Start/Stop Conversion) */ - 0x0000, /* 0x24 (XK_Romaji; to Romaji) */ - 0x0000, /* 0x25 (XK_Hiragana; to Hiragana) */ - 0x0000, /* 0x26 (XK_Katakana; to Katakana) */ - 0x0000, /* 0x27 (XK_Hiragana_Katakana; Hiragana/Katakana toggle) */ + 0x0000, /* 0x20 (XK_Multi_key) */ + 0x0000, /* 0x21 (XK_Kanji; Kanji, Kanji convert) */ + 0x0000, /* 0x22 (XK_Muhenkan; Cancel Conversion) */ + 0x0000, /* 0x23 (XK_Henkan_Mode; Start/Stop Conversion) */ + 0x0000, /* 0x24 (XK_Romaji; to Romaji) */ + 0x0000, /* 0x25 (XK_Hiragana; to Hiragana) */ + 0x0000, /* 0x26 (XK_Katakana; to Katakana) */ + 0x0000, /* 0x27 (XK_Hiragana_Katakana; Hiragana/Katakana toggle) */ - 0x0000, /* 0x28 (XK_Zenkaku; to Zenkaku) */ - 0x0000, /* 0x29 (XK_Hankaku; to Hankaku */ - 0x0000, /* 0x2a (XK_Zenkaku_Hankaku; Zenkaku/Hankaku toggle) */ - 0x0000, /* 0x2b (XK_Touroku; Add to Dictionary) */ - 0x0000, /* 0x2c (XK_Massyo; Delete from Dictionary) */ - 0x0000, /* 0x2d (XK_Kana_Lock; Kana Lock) */ - 0x0000, /* 0x2e (XK_Kana_Shift; Kana Shift) */ - 0x0000, /* 0x2f (XK_Eisu_Shift; Alphanumeric Shift) */ + 0x0000, /* 0x28 (XK_Zenkaku; to Zenkaku) */ + 0x0000, /* 0x29 (XK_Hankaku; to Hankaku */ + 0x0000, /* 0x2a (XK_Zenkaku_Hankaku; Zenkaku/Hankaku toggle) */ + 0x0000, /* 0x2b (XK_Touroku; Add to Dictionary) */ + 0x0000, /* 0x2c (XK_Massyo; Delete from Dictionary) */ + 0x0000, /* 0x2d (XK_Kana_Lock; Kana Lock) */ + 0x0000, /* 0x2e (XK_Kana_Shift; Kana Shift) */ + 0x0000, /* 0x2f (XK_Eisu_Shift; Alphanumeric Shift) */ - 0x0000, /* 0x30 (XK_Eisu_toggle; Alphanumeric toggle) */ + 0x0000, /* 0x30 (XK_Eisu_toggle; Alphanumeric toggle) */ 0x0000, 0x0000, 0x0000, @@ -396,16 +395,16 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x0000, /* 0x38 */ + 0x0000, /* 0x38 */ 0x0000, 0x0000, 0x0000, - 0x0000, /* 0x3c (XK_SingleCandidate) */ - 0x0000, /* 0x3d (XK_MultipleCandidate/XK_Zen_Koho) */ - 0x0000, /* 0x3e (XK_PreviousCandidate/XK_Mae_Koho) */ + 0x0000, /* 0x3c (XK_SingleCandidate) */ + 0x0000, /* 0x3d (XK_MultipleCandidate/XK_Zen_Koho) */ + 0x0000, /* 0x3e (XK_PreviousCandidate/XK_Mae_Koho) */ 0x0000, - 0x0000, /* 0x40 */ + 0x0000, /* 0x40 */ 0x0000, 0x0000, 0x0000, @@ -414,7 +413,7 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x0000, /* 0x48 */ + 0x0000, /* 0x48 */ 0x0000, 0x0000, 0x0000, @@ -423,16 +422,16 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0xe047, /* 0x50 (XK_Home) */ - 0xe04b, /* 0x51 (XK_Left) */ - 0xe048, /* 0x52 (XK_Up) */ - 0xe04d, /* 0x53 (XK_Right) */ - 0xe050, /* 0x54 (XK_Down) */ - 0xe049, /* 0x55 (XK_Prior, XK_Page_Up) */ - 0xe051, /* 0x56 (XK_Next, XK_Page_Down) */ - 0xe04f, /* 0x57 (XK_End) */ + 0xe047, /* 0x50 (XK_Home) */ + 0xe04b, /* 0x51 (XK_Left) */ + 0xe048, /* 0x52 (XK_Up) */ + 0xe04d, /* 0x53 (XK_Right) */ + 0xe050, /* 0x54 (XK_Down) */ + 0xe049, /* 0x55 (XK_Prior, XK_Page_Up) */ + 0xe051, /* 0x56 (XK_Next, XK_Page_Down) */ + 0xe04f, /* 0x57 (XK_End) */ - 0x0000, /* 0x58 (XK_Begin) */ + 0x0000, /* 0x58 (XK_Begin) */ 0x0000, 0x0000, 0x0000, @@ -441,25 +440,25 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x0000, /* 0x60 (XK_Select) */ - 0x0000, /* 0x61 (XK_Print) */ - 0x0000, /* 0x62 (XK_Execute) */ - 0xe052, /* 0x63 (XK_Insert) */ + 0x0000, /* 0x60 (XK_Select) */ + 0x0000, /* 0x61 (XK_Print) */ + 0x0000, /* 0x62 (XK_Execute) */ + 0xe052, /* 0x63 (XK_Insert) */ 0x0000, - 0x0000, /* 0x65 (XK_Undo) */ - 0x0000, /* 0x66 (XK_Redo) */ - 0xe05d, /* 0x67 (XK_Menu) */ + 0x0000, /* 0x65 (XK_Undo) */ + 0x0000, /* 0x66 (XK_Redo) */ + 0xe05d, /* 0x67 (XK_Menu) */ - 0x0000, /* 0x68 (XK_Find) */ - 0x0000, /* 0x69 (XK_Cancel) */ - 0x0000, /* 0x6a (XK_Help) */ - 0x0000, /* 0x6b (XK_Break) */ + 0x0000, /* 0x68 (XK_Find) */ + 0x0000, /* 0x69 (XK_Cancel) */ + 0x0000, /* 0x6a (XK_Help) */ + 0x0000, /* 0x6b (XK_Break) */ 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, /* 0x70 */ + 0x0000, /* 0x70 */ 0x0000, 0x0000, 0x0000, @@ -468,16 +467,16 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x0000, /* 0x78 */ + 0x0000, /* 0x78 */ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, /* 0x7e (XK_Mode_switch,XK_script_switch) */ - 0x0045, /* 0x7f (XK_Num_Lock) */ + 0x0000, /* 0x7e (XK_Mode_switch,XK_script_switch) */ + 0x0045, /* 0x7f (XK_Num_Lock) */ - 0x0039, /* 0x80 (XK_KP_Space) */ + 0x0039, /* 0x80 (XK_KP_Space) */ 0x0000, 0x0000, 0x0000, @@ -486,34 +485,34 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x0000, /* 0x88 */ - 0x000f, /* 0x89 (XK_KP_Tab) */ + 0x0000, /* 0x88 */ + 0x000f, /* 0x89 (XK_KP_Tab) */ 0x0000, 0x0000, 0x0000, - 0xe01c, /* 0x8d (XK_KP_Enter) */ + 0xe01c, /* 0x8d (XK_KP_Enter) */ 0x0000, 0x0000, - 0x0000, /* 0x90 */ - 0x0000, /* 0x91 (XK_KP_F1) */ - 0x0000, /* 0x92 (XK_KP_F2) */ - 0x0000, /* 0x93 (XK_KP_F3) */ - 0x0000, /* 0x94 (XK_KP_F4) */ - 0x0047, /* 0x95 (XK_KP_Home) */ - 0x004b, /* 0x96 (XK_KP_Left) */ - 0x0048, /* 0x97 (XK_KP_Up) */ + 0x0000, /* 0x90 */ + 0x0000, /* 0x91 (XK_KP_F1) */ + 0x0000, /* 0x92 (XK_KP_F2) */ + 0x0000, /* 0x93 (XK_KP_F3) */ + 0x0000, /* 0x94 (XK_KP_F4) */ + 0x0047, /* 0x95 (XK_KP_Home) */ + 0x004b, /* 0x96 (XK_KP_Left) */ + 0x0048, /* 0x97 (XK_KP_Up) */ - 0x004d, /* 0x98 (XK_KP_Right) */ - 0x0050, /* 0x99 (XK_KP_Down) */ - 0x0049, /* 0x9a (XK_KP_Prior,XK_KP_Page_Up) */ - 0x0051, /* 0x9b (XK_KP_Next,XK_KP_Page_Down) */ - 0x004f, /* 0x9c (XK_KP_End) */ - 0x0000, /* 0x9d (XK_KP_Begin) */ - 0x0052, /* 0x9e (XK_KP_Insert) */ - 0x0053, /* 0x9f (XK_KP_Delete) */ + 0x004d, /* 0x98 (XK_KP_Right) */ + 0x0050, /* 0x99 (XK_KP_Down) */ + 0x0049, /* 0x9a (XK_KP_Prior,XK_KP_Page_Up) */ + 0x0051, /* 0x9b (XK_KP_Next,XK_KP_Page_Down) */ + 0x004f, /* 0x9c (XK_KP_End) */ + 0x0000, /* 0x9d (XK_KP_Begin) */ + 0x0052, /* 0x9e (XK_KP_Insert) */ + 0x0053, /* 0x9f (XK_KP_Delete) */ - 0x0000, /* 0xa0 */ + 0x0000, /* 0xa0 */ 0x0000, 0x0000, 0x0000, @@ -522,88 +521,88 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x0000, /* 0xa8 */ + 0x0000, /* 0xa8 */ 0x0000, - 0x0037, /* 0xaa (XK_KP_Multiply) */ - 0x004e, /* 0xab (XK_KP_Add) */ - 0x0000, /* 0xac (XK_KP_Separator) */ - 0x004a, /* 0xad (XK_KP_Subtract) */ - 0x0000, /* 0xae (XK_KP_Decimal) */ - 0x0035, /* 0xaf (XK_KP_Divide) */ + 0x0037, /* 0xaa (XK_KP_Multiply) */ + 0x004e, /* 0xab (XK_KP_Add) */ + 0x0000, /* 0xac (XK_KP_Separator) */ + 0x004a, /* 0xad (XK_KP_Subtract) */ + 0x0000, /* 0xae (XK_KP_Decimal) */ + 0x0035, /* 0xaf (XK_KP_Divide) */ - 0x0052, /* 0xb0 (XK_KP_0) */ - 0x004f, /* 0xb1 (XK_KP_1) */ - 0x0050, /* 0xb2 (XK_KP_2) */ - 0x0051, /* 0xb3 (XK_KP_3) */ - 0x004b, /* 0xb4 (XK_KP_4) */ - 0x004c, /* 0xb5 (XK_KP_5) */ - 0x004d, /* 0xb6 (XK_KP_6) */ - 0x0047, /* 0xb7 (XK_KP_7) */ + 0x0052, /* 0xb0 (XK_KP_0) */ + 0x004f, /* 0xb1 (XK_KP_1) */ + 0x0050, /* 0xb2 (XK_KP_2) */ + 0x0051, /* 0xb3 (XK_KP_3) */ + 0x004b, /* 0xb4 (XK_KP_4) */ + 0x004c, /* 0xb5 (XK_KP_5) */ + 0x004d, /* 0xb6 (XK_KP_6) */ + 0x0047, /* 0xb7 (XK_KP_7) */ - 0x0048, /* 0xb8 (XK_KP_8) */ - 0x0049, /* 0xb9 (XK_KP_9) */ + 0x0048, /* 0xb8 (XK_KP_8) */ + 0x0049, /* 0xb9 (XK_KP_9) */ 0x0000, 0x0000, 0x0000, - 0x000d, /* 0xbd (XK_KP_Equal) */ - 0x003b, /* 0xbe (XK_F1) */ - 0x003c, /* 0xbf (XK_F2) */ + 0x000d, /* 0xbd (XK_KP_Equal) */ + 0x003b, /* 0xbe (XK_F1) */ + 0x003c, /* 0xbf (XK_F2) */ - 0x003d, /* 0xc0 (XK_F3) */ - 0x003e, /* 0xc1 (XK_F4) */ - 0x003f, /* 0xc2 (XK_F5) */ - 0x0040, /* 0xc3 (XK_F6) */ - 0x0041, /* 0xc4 (XK_F7) */ - 0x0042, /* 0xc5 (XK_F8) */ - 0x0043, /* 0xc6 (XK_F9) */ - 0x0044, /* 0xc7 (XK_F10) */ + 0x003d, /* 0xc0 (XK_F3) */ + 0x003e, /* 0xc1 (XK_F4) */ + 0x003f, /* 0xc2 (XK_F5) */ + 0x0040, /* 0xc3 (XK_F6) */ + 0x0041, /* 0xc4 (XK_F7) */ + 0x0042, /* 0xc5 (XK_F8) */ + 0x0043, /* 0xc6 (XK_F9) */ + 0x0044, /* 0xc7 (XK_F10) */ - 0x0057, /* 0xc8 (XK_F11,XK_L1) */ - 0x0058, /* 0xc9 (XK_F12,XK_L2) */ - 0x0000, /* 0xca (XK_F13,XK_L3) */ - 0x0000, /* 0xcb (XK_F14,XK_L4) */ - 0x0000, /* 0xcc (XK_F15,XK_L5) */ - 0x0000, /* 0xcd (XK_F16,XK_L6) */ - 0x0000, /* 0xce (XK_F17,XK_L7) */ - 0x0000, /* 0xcf (XK_F18,XK_L8) */ + 0x0057, /* 0xc8 (XK_F11,XK_L1) */ + 0x0058, /* 0xc9 (XK_F12,XK_L2) */ + 0x0000, /* 0xca (XK_F13,XK_L3) */ + 0x0000, /* 0xcb (XK_F14,XK_L4) */ + 0x0000, /* 0xcc (XK_F15,XK_L5) */ + 0x0000, /* 0xcd (XK_F16,XK_L6) */ + 0x0000, /* 0xce (XK_F17,XK_L7) */ + 0x0000, /* 0xcf (XK_F18,XK_L8) */ - 0x0000, /* 0xd0 (XK_F19,XK_L9) */ - 0x0000, /* 0xd1 (XK_F20,XK_L10) */ - 0x0000, /* 0xd2 (XK_F21,XK_R1) */ - 0x0000, /* 0xd3 (XK_F22,XK_R2) */ - 0x0000, /* 0xd4 (XK_F23,XK_R3) */ - 0x0000, /* 0xd5 (XK_F24,XK_R4) */ - 0x0000, /* 0xd6 (XK_F25,XK_R5) */ - 0x0000, /* 0xd7 (XK_F26,XK_R6) */ + 0x0000, /* 0xd0 (XK_F19,XK_L9) */ + 0x0000, /* 0xd1 (XK_F20,XK_L10) */ + 0x0000, /* 0xd2 (XK_F21,XK_R1) */ + 0x0000, /* 0xd3 (XK_F22,XK_R2) */ + 0x0000, /* 0xd4 (XK_F23,XK_R3) */ + 0x0000, /* 0xd5 (XK_F24,XK_R4) */ + 0x0000, /* 0xd6 (XK_F25,XK_R5) */ + 0x0000, /* 0xd7 (XK_F26,XK_R6) */ - 0x0000, /* 0xd8 (XK_F27,XK_R7) */ - 0x0000, /* 0xd9 (XK_F28,XK_R8) */ - 0x0000, /* 0xda (XK_F29,XK_R9) */ - 0x0000, /* 0xdb (XK_F30,XK_R10) */ - 0x0000, /* 0xdc (XK_F31,XK_R11) */ - 0x0000, /* 0xdd (XK_F32,XK_R12) */ - 0x0000, /* 0xde (XK_F33,XK_R13) */ - 0x0000, /* 0xdf (XK_F34,XK_R14) */ + 0x0000, /* 0xd8 (XK_F27,XK_R7) */ + 0x0000, /* 0xd9 (XK_F28,XK_R8) */ + 0x0000, /* 0xda (XK_F29,XK_R9) */ + 0x0000, /* 0xdb (XK_F30,XK_R10) */ + 0x0000, /* 0xdc (XK_F31,XK_R11) */ + 0x0000, /* 0xdd (XK_F32,XK_R12) */ + 0x0000, /* 0xde (XK_F33,XK_R13) */ + 0x0000, /* 0xdf (XK_F34,XK_R14) */ - 0x0000, /* 0xe0 (XK_F35,XK_R15) */ - 0x002a, /* 0xe1 (XK_Shift_L) */ - 0x0036, /* 0xe2 (XK_Shift_R) */ - 0x001d, /* 0xe3 (XK_Control_L) */ - 0xe01d, /* 0xe4 (XK_Control_R) */ - 0x003a, /* 0xe5 (XK_Caps_Lock) */ - 0x003a, /* 0xe6 (XK_Shift_Lock) */ - 0xe05b, /* 0xe7 (XK_Meta_L) */ + 0x0000, /* 0xe0 (XK_F35,XK_R15) */ + 0x002a, /* 0xe1 (XK_Shift_L) */ + 0x0036, /* 0xe2 (XK_Shift_R) */ + 0x001d, /* 0xe3 (XK_Control_L) */ + 0xe01d, /* 0xe4 (XK_Control_R) */ + 0x003a, /* 0xe5 (XK_Caps_Lock) */ + 0x003a, /* 0xe6 (XK_Shift_Lock) */ + 0xe05b, /* 0xe7 (XK_Meta_L) */ - 0xe05c, /* 0xe8 (XK_Meta_R) */ - 0x0038, /* 0xe9 (XK_Alt_L) */ - 0xe038, /* 0xea (XK_Alt_R) */ - 0x0000, /* 0xeb (XK_Super_L) */ - 0x0000, /* 0xec (XK_Super_R) */ - 0x0000, /* 0xed (XK_Hyper_L) */ - 0x0000, /* 0xee (XK_Hyper_R) */ + 0xe05c, /* 0xe8 (XK_Meta_R) */ + 0x0038, /* 0xe9 (XK_Alt_L) */ + 0xe038, /* 0xea (XK_Alt_R) */ + 0x0000, /* 0xeb (XK_Super_L) */ + 0x0000, /* 0xec (XK_Super_R) */ + 0x0000, /* 0xed (XK_Hyper_L) */ + 0x0000, /* 0xee (XK_Hyper_R) */ 0x0000, - 0x0000, /* 0xf0 */ + 0x0000, /* 0xf0 */ 0x0000, 0x0000, 0x0000, @@ -612,22 +611,20 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x0000, /* 0xf8 */ + 0x0000, /* 0xf8 */ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0xe053 /* 0xff (XK_Delete) */ + 0xe053 /* 0xff (XK_Delete) */ }; - #ifdef ENABLE_VNC_KEYMAP_LOG int vnc_keymap_do_log = ENABLE_VNC_KEYMAP_LOG; #endif - static void vnc_keymap_log(const char *format, ...) { @@ -635,63 +632,62 @@ vnc_keymap_log(const char *format, ...) va_list ap; if (vnc_keymap_do_log) { - va_start(ap, format); - pclog_ex(format, ap); - va_end(ap); + va_start(ap, format); + pclog_ex(format, ap); + va_end(ap); } #endif } - void vnc_kbinput(int down, int k) { uint16_t scan; - switch(k >> 8) { - case 0x00: /* page 00, Latin-1 */ - scan = keysyms_00[k & 0xff]; - break; + switch (k >> 8) { + case 0x00: /* page 00, Latin-1 */ + scan = keysyms_00[k & 0xff]; + break; - case 0xff: /* page FF, Special */ - scan = keysyms_ff[k & 0xff]; - break; + case 0xff: /* page FF, Special */ + scan = keysyms_ff[k & 0xff]; + break; - default: - vnc_keymap_log("VNC: unhandled Xkbd page: %02x\n", k>>8); - return; + default: + vnc_keymap_log("VNC: unhandled Xkbd page: %02x\n", k >> 8); + return; } if (scan == 0x0000) { - vnc_keymap_log("VNC: unhandled Xkbd key: %d (%04x)\n", k, k); - return; + vnc_keymap_log("VNC: unhandled Xkbd key: %d (%04x)\n", k, k); + return; } /* Send this scancode sequence to the PC keyboard. */ switch (scan >> 8) { - case 0x00: - default: - if (scan & 0xff) - keyboard_input(down, scan & 0xff); - break; - case 0x2a: - if (scan & 0xff) { - if (down) { - keyboard_input(down, 0x2a); - keyboard_input(down, scan & 0xff); - } else { - keyboard_input(down, scan & 0xff); - keyboard_input(down, 0x2a); - } - } - break; - case 0xe0: - if (scan & 0xff) - keyboard_input(down, (scan & 0xff) | 0x100); - break; - case 0xe1: - if (scan == 0x1d) - keyboard_input(down, 0x100); - break; + case 0x00: + default: + if (scan & 0xff) + keyboard_input(down, scan & 0xff); + break; + case 0x2a: + if (scan & 0xff) { + if (down) { + keyboard_input(down, 0x2a); + keyboard_input(down, scan & 0xff); + } else { + keyboard_input(down, scan & 0xff); + keyboard_input(down, 0x2a); + } + } + break; + case 0xe0: + if (scan & 0xff) + keyboard_input(down, (scan & 0xff) | 0x100); + break; + case 0xe1: + if (scan == 0x1d) + keyboard_input(down, 0x100); + break; } } From d044f8d1f6756460b37e25680ba3c6e977f6d7a3 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:11:56 -0400 Subject: [PATCH 355/386] clang-format in src/cdrom/ --- src/cdrom/cdrom.c | 311 ++++++++++++++++---------------- src/cdrom/cdrom_image.c | 85 ++++----- src/cdrom/cdrom_image_backend.c | 307 ++++++++++++++----------------- 3 files changed, 323 insertions(+), 380 deletions(-) diff --git a/src/cdrom/cdrom.c b/src/cdrom/cdrom.c index ee5972756..86907c2e4 100644 --- a/src/cdrom/cdrom.c +++ b/src/cdrom/cdrom.c @@ -29,76 +29,71 @@ #include <86box/scsi_device.h> #include <86box/sound.h> - /* The addresses sent from the guest are absolute, ie. a LBA of 0 corresponds to a MSF of 00:00:00. Otherwise, the counter displayed by the guest is wrong: there is a seeming 2 seconds in which audio plays but counter does not move, while a data track before audio jumps to 2 seconds before the actual start of the audio while audio still plays. With an absolute conversion, the counter is fine. */ #undef MSFtoLBA -#define MSFtoLBA(m,s,f) ((((m*60)+s)*75)+f) +#define MSFtoLBA(m, s, f) ((((m * 60) + s) * 75) + f) -#define RAW_SECTOR_SIZE 2352 -#define COOKED_SECTOR_SIZE 2048 +#define RAW_SECTOR_SIZE 2352 +#define COOKED_SECTOR_SIZE 2048 -#define MIN_SEEK 2000 -#define MAX_SEEK 333333 +#define MIN_SEEK 2000 +#define MAX_SEEK 333333 -#define CD_BCD(x) (((x) % 10) | (((x) / 10) << 4)) -#define CD_DCB(x) ((((x) & 0xf0) >> 4) * 10 + ((x) & 0x0f)) +#define CD_BCD(x) (((x) % 10) | (((x) / 10) << 4)) +#define CD_DCB(x) ((((x) &0xf0) >> 4) * 10 + ((x) &0x0f)) -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { uint8_t user_data[2048], - ecc[288]; + ecc[288]; } m1_data_t; typedef struct { uint8_t sub_header[8], - user_data[2328]; + user_data[2328]; } m2_data_t; typedef union { m1_data_t m1_data; m2_data_t m2_data; - uint8_t raw_data[2336]; + uint8_t raw_data[2336]; } sector_data_t; typedef struct { - uint8_t sync[12]; - uint8_t header[4]; + uint8_t sync[12]; + uint8_t header[4]; sector_data_t data; } sector_raw_data_t; typedef union { sector_raw_data_t sector_data; - uint8_t raw_data[2352]; + uint8_t raw_data[2352]; } sector_t; typedef struct { sector_t sector; - uint8_t c2[296]; - uint8_t subchannel_raw[96]; - uint8_t subchannel_q[16]; - uint8_t subchannel_rw[96]; + uint8_t c2[296]; + uint8_t subchannel_raw[96]; + uint8_t subchannel_q[16]; + uint8_t subchannel_rw[96]; } cdrom_sector_t; typedef union { cdrom_sector_t cdrom_sector; - uint8_t buffer[2856]; + uint8_t buffer[2856]; } sector_buffer_t; #pragma pack(pop) +static int cdrom_sector_size; +static uint8_t raw_buffer[2856]; /* Needs to be the same size as sector_buffer_t in the structs. */ +static uint8_t extra_buffer[296]; -static int cdrom_sector_size; -static uint8_t raw_buffer[2856]; /* Needs to be the same size as sector_buffer_t in the structs. */ -static uint8_t extra_buffer[296]; - - -cdrom_t cdrom[CDROM_NUM]; - +cdrom_t cdrom[CDROM_NUM]; #ifdef ENABLE_CDROM_LOG -int cdrom_do_log = ENABLE_CDROM_LOG; - +int cdrom_do_log = ENABLE_CDROM_LOG; void cdrom_log(const char *fmt, ...) @@ -112,10 +107,9 @@ cdrom_log(const char *fmt, ...) } } #else -#define cdrom_log(fmt, ...) +# define cdrom_log(fmt, ...) #endif - int cdrom_lba_to_msf_accurate(int lba) { @@ -123,7 +117,7 @@ cdrom_lba_to_msf_accurate(int lba) int m, s, f; pos = lba + 150; - f = pos % 75; + f = pos % 75; pos -= f; pos /= 75; s = pos % 60; @@ -134,11 +128,10 @@ cdrom_lba_to_msf_accurate(int lba) return ((m << 16) | (s << 8) | f); } - static double cdrom_get_short_seek(cdrom_t *dev) { - switch(dev->cur_speed) { + switch (dev->cur_speed) { case 0: fatal("CD-ROM %i: 0x speed\n", dev->id); return 0.0; @@ -148,16 +141,37 @@ cdrom_get_short_seek(cdrom_t *dev) return 160.0; case 3: return 150.0; - case 4: case 5: case 6: case 7: case 8: - case 9: case 10: case 11: + case 4: + case 5: + case 6: + case 7: + case 8: + case 9: + case 10: + case 11: return 112.0; - case 12: case 13: case 14: case 15: + case 12: + case 13: + case 14: + case 15: return 75.0; - case 16: case 17: case 18: case 19: + case 16: + case 17: + case 18: + case 19: return 58.0; - case 20: case 21: case 22: case 23: - case 40: case 41: case 42: case 43: - case 44: case 45: case 46: case 47: + case 20: + case 21: + case 22: + case 23: + case 40: + case 41: + case 42: + case 43: + case 44: + case 45: + case 46: + case 47: case 48: return 50.0; default: @@ -166,11 +180,10 @@ cdrom_get_short_seek(cdrom_t *dev) } } - static double cdrom_get_long_seek(cdrom_t *dev) { - switch(dev->cur_speed) { + switch (dev->cur_speed) { case 0: fatal("CD-ROM %i: 0x speed\n", dev->id); return 0.0; @@ -180,16 +193,37 @@ cdrom_get_long_seek(cdrom_t *dev) return 1000.0; case 3: return 900.0; - case 4: case 5: case 6: case 7: case 8: - case 9: case 10: case 11: + case 4: + case 5: + case 6: + case 7: + case 8: + case 9: + case 10: + case 11: return 675.0; - case 12: case 13: case 14: case 15: + case 12: + case 13: + case 14: + case 15: return 400.0; - case 16: case 17: case 18: case 19: + case 16: + case 17: + case 18: + case 19: return 350.0; - case 20: case 21: case 22: case 23: - case 40: case 41: case 42: case 43: - case 44: case 45: case 46: case 47: + case 20: + case 21: + case 22: + case 23: + case 40: + case 41: + case 42: + case 43: + case 44: + case 45: + case 46: + case 47: case 48: return 300.0; default: @@ -198,12 +232,11 @@ cdrom_get_long_seek(cdrom_t *dev) } } - double cdrom_seek_time(cdrom_t *dev) { uint32_t diff = dev->seek_diff; - double sd = (double) (MAX_SEEK - MIN_SEEK); + double sd = (double) (MAX_SEEK - MIN_SEEK); if (diff < MIN_SEEK) return 0.0; @@ -215,7 +248,6 @@ cdrom_seek_time(cdrom_t *dev) return cdrom_get_short_seek(dev) + ((cdrom_get_long_seek(dev) * ((double) diff)) / sd); } - void cdrom_stop(cdrom_t *dev) { @@ -223,7 +255,6 @@ cdrom_stop(cdrom_t *dev) dev->cd_status = CD_STATUS_STOPPED; } - void cdrom_seek(cdrom_t *dev, uint32_t pos) { @@ -232,11 +263,10 @@ cdrom_seek(cdrom_t *dev, uint32_t pos) cdrom_log("CD-ROM %i: Seek to LBA %08X\n", dev->id, pos); - dev->seek_pos = pos; + dev->seek_pos = pos; cdrom_stop(dev); } - int cdrom_is_pre(cdrom_t *dev, uint32_t lba) { @@ -246,7 +276,6 @@ cdrom_is_pre(cdrom_t *dev, uint32_t lba) return 0; } - int cdrom_audio_callback(cdrom_t *dev, int16_t *output, int len) { @@ -273,14 +302,14 @@ cdrom_audio_callback(cdrom_t *dev, int16_t *output, int len) memset(&(dev->cd_buffer[dev->cd_buflen]), 0x00, (BUF_SIZE - dev->cd_buflen) * 2); dev->cd_status = CD_STATUS_STOPPED; dev->cd_buflen = len; - ret = 0; + ret = 0; } } else { cdrom_log("CD-ROM %i: Playing completed\n", dev->id); memset(&dev->cd_buffer[dev->cd_buflen], 0x00, (BUF_SIZE - dev->cd_buflen) * 2); dev->cd_status = CD_STATUS_PLAYING_COMPLETED; dev->cd_buflen = len; - ret = 0; + ret = 0; } } @@ -292,12 +321,11 @@ cdrom_audio_callback(cdrom_t *dev, int16_t *output, int len) return ret; } - uint8_t cdrom_audio_play(cdrom_t *dev, uint32_t pos, uint32_t len, int ismsf) { track_info_t ti; - int m = 0, s = 0, f = 0; + int m = 0, s = 0, f = 0; if (dev->cd_status == CD_STATUS_DATA_ONLY) return 0; @@ -325,9 +353,9 @@ cdrom_audio_play(cdrom_t *dev, uint32_t pos, uint32_t len, int ismsf) } else pos = MSFtoLBA(m, s, f) - 150; - m = (len >> 16) & 0xff; - s = (len >> 8) & 0xff; - f = len & 0xff; + m = (len >> 16) & 0xff; + s = (len >> 8) & 0xff; + f = len & 0xff; len = MSFtoLBA(m, s, f) - 150; cdrom_log("CD-ROM %i: MSF - pos = %08X len = %08X\n", dev->id, pos, len); @@ -347,15 +375,14 @@ cdrom_audio_play(cdrom_t *dev, uint32_t pos, uint32_t len, int ismsf) return 0; } - dev->seek_pos = pos; - dev->cd_end = len; + dev->seek_pos = pos; + dev->cd_end = len; dev->cd_status = CD_STATUS_PLAYING; dev->cd_buflen = 0; return 1; } - uint8_t cdrom_audio_track_search(cdrom_t *dev, uint32_t pos, int type, uint8_t playbit) { @@ -367,9 +394,9 @@ cdrom_audio_track_search(cdrom_t *dev, uint32_t pos, int type, uint8_t playbit) switch (type) { case 0x40: cdrom_log("Audio Track Search: MSF = %06x, type = %02x\n", pos, type); - m = CD_DCB((pos >> 24) & 0xff); - s = CD_DCB((pos >> 16) & 0xff); - f = CD_DCB((pos >> 8) & 0xff); + m = CD_DCB((pos >> 24) & 0xff); + s = CD_DCB((pos >> 16) & 0xff); + f = CD_DCB((pos >> 8) & 0xff); pos = MSFtoLBA(m, s, f) - 150; break; } @@ -382,13 +409,12 @@ cdrom_audio_track_search(cdrom_t *dev, uint32_t pos, int type, uint8_t playbit) return 0; } - dev->seek_pos = pos; - dev->noplay = !playbit; + dev->seek_pos = pos; + dev->noplay = !playbit; dev->cd_status = playbit ? CD_STATUS_PLAYING : CD_STATUS_PAUSED; return 1; } - uint8_t cdrom_toshiba_audio_play(cdrom_t *dev, uint32_t pos, int type) { @@ -404,9 +430,9 @@ cdrom_toshiba_audio_play(cdrom_t *dev, uint32_t pos, int type) switch (type) { case 0x40: cdrom_log("Toshiba Play Audio: MSF = %06x, type = %02x\n", pos, type); - m = CD_DCB((pos >> 24) & 0xff); - s = CD_DCB((pos >> 16) & 0xff); - f = CD_DCB((pos >> 8) & 0xff); + m = CD_DCB((pos >> 24) & 0xff); + s = CD_DCB((pos >> 16) & 0xff); + f = CD_DCB((pos >> 8) & 0xff); pos = MSFtoLBA(m, s, f) - 150; break; } @@ -419,12 +445,11 @@ cdrom_toshiba_audio_play(cdrom_t *dev, uint32_t pos, int type) return 0; } - dev->cd_end = pos; + dev->cd_end = pos; dev->cd_buflen = 0; return 1; } - void cdrom_audio_pause_resume(cdrom_t *dev, uint8_t resume) { @@ -432,14 +457,13 @@ cdrom_audio_pause_resume(cdrom_t *dev, uint8_t resume) dev->cd_status = (dev->cd_status & 0xfe) | (resume & 0x01); } - uint8_t cdrom_get_current_subchannel(cdrom_t *dev, uint8_t *b, int msf) { - uint8_t ret; + uint8_t ret; subchannel_t subc; - int pos = 1; - uint32_t dat; + int pos = 1; + uint32_t dat; dev->ops->get_subchannel(dev, dev->seek_pos, &subc); cdrom_log("CD-ROM %i: Returned subchannel at %02i:%02i.%02i\n", subc.abs_m, subc.abs_s, subc.abs_f); @@ -474,12 +498,12 @@ cdrom_get_current_subchannel(cdrom_t *dev, uint8_t *b, int msf) b[pos + 3] = subc.rel_f; pos += 4; } else { - dat = MSFtoLBA(subc.abs_m, subc.abs_s, subc.abs_f) - 150; + dat = MSFtoLBA(subc.abs_m, subc.abs_s, subc.abs_f) - 150; b[pos++] = (dat >> 24) & 0xff; b[pos++] = (dat >> 16) & 0xff; b[pos++] = (dat >> 8) & 0xff; b[pos++] = dat & 0xff; - dat = MSFtoLBA(subc.rel_m, subc.rel_s, subc.rel_f); + dat = MSFtoLBA(subc.rel_m, subc.rel_s, subc.rel_f); b[pos++] = (dat >> 24) & 0xff; b[pos++] = (dat >> 16) & 0xff; b[pos++] = (dat >> 8) & 0xff; @@ -489,11 +513,10 @@ cdrom_get_current_subchannel(cdrom_t *dev, uint8_t *b, int msf) return ret; } - uint8_t cdrom_get_current_subcodeq_playstatus(cdrom_t *dev, uint8_t *b) { - uint8_t ret; + uint8_t ret; subchannel_t subc; dev->ops->get_subchannel(dev, dev->seek_pos, &subc); @@ -522,14 +545,13 @@ cdrom_get_current_subcodeq_playstatus(cdrom_t *dev, uint8_t *b) return ret; } - static int read_toc_normal(cdrom_t *dev, unsigned char *b, unsigned char start_track, int msf) { track_info_t ti; - int i, len = 4; - int first_track, last_track; - uint32_t temp; + int i, len = 4; + int first_track, last_track; + uint32_t temp; cdrom_log("read_toc_normal(%08X, %08X, %02X, %i)\n", dev, b, start_track, msf); @@ -571,18 +593,18 @@ read_toc_normal(cdrom_t *dev, unsigned char *b, unsigned char start_track, int m cdrom_log(" tracks(%i) = %02X, %02X, %i:%02i.%02i\n", i, ti.attr, ti.number, ti.m, ti.s, ti.f); dev->ops->get_track_info(dev, i + 1, 0, &ti); - b[len++] = 0; /* reserved */ - b[len++] = ti.attr; - b[len++] = ti.number; /* track number */ - b[len++] = 0; /* reserved */ + b[len++] = 0; /* reserved */ + b[len++] = ti.attr; + b[len++] = ti.number; /* track number */ + b[len++] = 0; /* reserved */ - if (msf) { + if (msf) { b[len++] = 0; b[len++] = ti.m; b[len++] = ti.s; b[len++] = ti.f; - } else { - temp = MSFtoLBA(ti.m, ti.s, ti.f) - 150; + } else { + temp = MSFtoLBA(ti.m, ti.s, ti.f) - 150; b[len++] = temp >> 24; b[len++] = temp >> 16; b[len++] = temp >> 8; @@ -593,13 +615,12 @@ read_toc_normal(cdrom_t *dev, unsigned char *b, unsigned char start_track, int m return len; } - static int read_toc_session(cdrom_t *dev, unsigned char *b, int msf) { track_info_t ti; - int len = 4; - uint32_t temp; + int len = 4; + uint32_t temp; cdrom_log("read_toc_session(%08X, %08X, %i)\n", dev, b, msf); @@ -613,7 +634,7 @@ read_toc_session(cdrom_t *dev, unsigned char *b, int msf) b[len++] = 0; /* reserved */ b[len++] = ti.attr; b[len++] = ti.number; /* track number */ - b[len++] = 0; /* reserved */ + b[len++] = 0; /* reserved */ if (msf) { b[len++] = 0; @@ -621,7 +642,7 @@ read_toc_session(cdrom_t *dev, unsigned char *b, int msf) b[len++] = ti.s; b[len++] = ti.f; } else { - temp = MSFtoLBA(ti.m, ti.s, ti.f) - 150; + temp = MSFtoLBA(ti.m, ti.s, ti.f) - 150; b[len++] = temp >> 24; b[len++] = temp >> 16; b[len++] = temp >> 8; @@ -631,13 +652,12 @@ read_toc_session(cdrom_t *dev, unsigned char *b, int msf) return len; } - static int read_toc_raw(cdrom_t *dev, unsigned char *b) { track_info_t ti; - int i, len = 4; - int first_track, last_track; + int i, len = 4; + int first_track, last_track; cdrom_log("read_toc_raw(%08X, %08X)\n", dev, b); @@ -651,13 +671,13 @@ read_toc_raw(cdrom_t *dev, unsigned char *b) cdrom_log(" tracks(%i) = %02X, %02X, %i:%02i.%02i\n", i, ti.attr, ti.number, ti.m, ti.s, ti.f); - b[len++] = 1; /* Session number */ - b[len++] = ti.attr; /* Track ADR and Control */ - b[len++] = 0; /* TNO (always 0) */ - b[len++] = ti.number; /* Point (for track points - track number) */ - b[len++] = ti.m; /* M */ - b[len++] = ti.s; /* S */ - b[len++] = ti.f; /* F */ + b[len++] = 1; /* Session number */ + b[len++] = ti.attr; /* Track ADR and Control */ + b[len++] = 0; /* TNO (always 0) */ + b[len++] = ti.number; /* Point (for track points - track number) */ + b[len++] = ti.m; /* M */ + b[len++] = ti.s; /* S */ + b[len++] = ti.f; /* F */ b[len++] = 0; b[len++] = 0; b[len++] = 0; @@ -666,13 +686,12 @@ read_toc_raw(cdrom_t *dev, unsigned char *b) return len; } - int cdrom_read_toc(cdrom_t *dev, unsigned char *b, int type, unsigned char start_track, int msf, int max_len) { int len; - switch(type) { + switch (type) { case CD_TOC_NORMAL: len = read_toc_normal(dev, b, start_track, msf); break; @@ -695,13 +714,12 @@ cdrom_read_toc(cdrom_t *dev, unsigned char *b, int type, unsigned char start_tra return len; } - /* A new API call for Mitsumi CD-ROM. */ void cdrom_get_track_buffer(cdrom_t *dev, uint8_t *buf) { track_info_t ti; - int first_track, last_track; + int first_track, last_track; if (dev != NULL) { dev->ops->get_tracks(dev, &first_track, &last_track); @@ -720,12 +738,11 @@ cdrom_get_track_buffer(cdrom_t *dev, uint8_t *buf) memset(buf, 0x00, 9); } - void cdrom_read_disc_info_toc(cdrom_t *dev, unsigned char *b, unsigned char track, int type) { track_info_t ti; - int first_track, last_track; + int first_track, last_track; dev->ops->get_tracks(dev, &first_track, &last_track); @@ -760,11 +777,10 @@ cdrom_read_disc_info_toc(cdrom_t *dev, unsigned char *b, unsigned char track, in } } - static int track_type_is_valid(uint8_t id, int type, int flags, int audio, int mode2) { - if (!(flags & 0x70) && (flags & 0xf8)) { /* 0x08/0x80/0x88 are illegal modes */ + if (!(flags & 0x70) && (flags & 0xf8)) { /* 0x08/0x80/0x88 are illegal modes */ cdrom_log("CD-ROM %i: [Any Mode] 0x08/0x80/0x88 are illegal modes\n", id); return 0; } @@ -780,22 +796,22 @@ track_type_is_valid(uint8_t id, int type, int flags, int audio, int mode2) return 0; } - if ((flags & 0x18) == 0x08) { /* EDC/ECC without user data is an illegal mode */ + if ((flags & 0x18) == 0x08) { /* EDC/ECC without user data is an illegal mode */ cdrom_log("CD-ROM %i: [Any Data Mode] EDC/ECC without user data is an illegal mode\n", id); return 0; } - if (((flags & 0xf0) == 0x90) || ((flags & 0xf0) == 0xc0)) { /* 0x90/0x98/0xC0/0xC8 are illegal modes */ + if (((flags & 0xf0) == 0x90) || ((flags & 0xf0) == 0xc0)) { /* 0x90/0x98/0xC0/0xC8 are illegal modes */ cdrom_log("CD-ROM %i: [Any Data Mode] 0x90/0x98/0xC0/0xC8 are illegal modes\n", id); return 0; } if (((type > 3) && (type != 8)) || (mode2 && (mode2 & 0x03))) { - if ((flags & 0xf0) == 0x30) { /* 0x30/0x38 are illegal modes */ + if ((flags & 0xf0) == 0x30) { /* 0x30/0x38 are illegal modes */ cdrom_log("CD-ROM %i: [Any XA Mode 2] 0x30/0x38 are illegal modes\n", id); return 0; } - if (((flags & 0xf0) == 0xb0) || ((flags & 0xf0) == 0xd0)) { /* 0xBx and 0xDx are illegal modes */ + if (((flags & 0xf0) == 0xb0) || ((flags & 0xf0) == 0xd0)) { /* 0xBx and 0xDx are illegal modes */ cdrom_log("CD-ROM %i: [Any XA Mode 2] 0xBx and 0xDx are illegal modes\n", id); return 0; } @@ -805,7 +821,6 @@ track_type_is_valid(uint8_t id, int type, int flags, int audio, int mode2) return 1; } - static void read_sector_to_buffer(cdrom_t *dev, uint8_t *rbuf, uint32_t msf, uint32_t lba, int mode2, int len) { @@ -833,7 +848,6 @@ read_sector_to_buffer(cdrom_t *dev, uint8_t *rbuf, uint32_t msf, uint32_t lba, i memset(bb, 0, 288); } - static void read_audio(cdrom_t *dev, uint32_t lba, uint8_t *b) { @@ -844,7 +858,6 @@ read_audio(cdrom_t *dev, uint32_t lba, uint8_t *b) cdrom_sector_size = 2352; } - static void read_mode1(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t msf, int mode2, uint8_t *b) { @@ -899,7 +912,6 @@ read_mode1(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t msf, int } } - static void read_mode2_non_xa(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t msf, int mode2, uint8_t *b) { @@ -944,7 +956,6 @@ read_mode2_non_xa(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t m } } - static void read_mode2_xa_form1(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t msf, int mode2, uint8_t *b) { @@ -996,7 +1007,6 @@ read_mode2_xa_form1(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t } } - static void read_mode2_xa_form2(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t msf, int mode2, uint8_t *b) { @@ -1040,15 +1050,14 @@ read_mode2_xa_form2(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t } } - int cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, int sector, int ismsf, int cdrom_sector_type, - int cdrom_sector_flags, int *len) + int cdrom_sector_flags, int *len) { uint8_t *b, *temp_b; uint32_t msf, lba; - int audio = 0, mode2 = 0; - int m, s, f; + int audio = 0, mode2 = 0; + int m, s, f; if (dev->cd_status == CD_STATUS_EMPTY) return 0; @@ -1058,9 +1067,9 @@ cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, int sector, int ismsf, int c *len = 0; if (ismsf) { - m = (sector >> 16) & 0xff; - s = (sector >> 8) & 0xff; - f = sector & 0xff; + m = (sector >> 16) & 0xff; + s = (sector >> 8) & 0xff; + f = sector & 0xff; lba = MSFtoLBA(m, s, f) - 150; msf = sector; } else { @@ -1185,7 +1194,6 @@ cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, int sector, int ismsf, int c return 1; } - /* Peform a master init on the entire module. */ void cdrom_global_init(void) @@ -1194,23 +1202,21 @@ cdrom_global_init(void) memset(cdrom, 0x00, sizeof(cdrom)); } - static void cdrom_drive_reset(cdrom_t *dev) { - dev->priv = NULL; - dev->insert = NULL; - dev->close = NULL; - dev->get_volume = NULL; + dev->priv = NULL; + dev->insert = NULL; + dev->close = NULL; + dev->get_volume = NULL; dev->get_channel = NULL; } - void cdrom_hard_reset(void) { cdrom_t *dev; - int i; + int i; for (i = 0; i < CDROM_NUM; i++) { dev = &cdrom[i]; @@ -1221,7 +1227,7 @@ cdrom_hard_reset(void) cdrom_drive_reset(dev); - switch(dev->bus_type) { + switch (dev->bus_type) { case CDROM_BUS_ATAPI: case CDROM_BUS_SCSI: scsi_cdrom_drive_reset(i); @@ -1241,12 +1247,11 @@ cdrom_hard_reset(void) sound_cd_thread_reset(); } - void cdrom_close(void) { cdrom_t *dev; - int i; + int i; for (i = 0; i < CDROM_NUM; i++) { dev = &cdrom[i]; @@ -1260,14 +1265,13 @@ cdrom_close(void) if (dev->ops && dev->ops->exit) dev->ops->exit(dev); - dev->ops = NULL; + dev->ops = NULL; dev->priv = NULL; cdrom_drive_reset(dev); } } - /* Signal disc change to the emulated machine. */ void cdrom_insert(uint8_t id) @@ -1280,7 +1284,6 @@ cdrom_insert(uint8_t id) } } - /* The mechanics of ejecting a CD-ROM from a drive. */ void cdrom_eject(uint8_t id) @@ -1297,7 +1300,7 @@ cdrom_eject(uint8_t id) strcpy(dev->prev_image_path, dev->image_path); dev->prev_host_drive = dev->host_drive; - dev->host_drive = 0; + dev->host_drive = 0; dev->ops->exit(dev); dev->ops = NULL; @@ -1310,15 +1313,13 @@ cdrom_eject(uint8_t id) config_save(); } - /* The mechanics of re-loading a CD-ROM drive. */ void cdrom_reload(uint8_t id) { cdrom_t *dev = &cdrom[id]; - if ((dev->host_drive == dev->prev_host_drive) || - (dev->prev_host_drive == 0) || (dev->host_drive != 0)) { + if ((dev->host_drive == dev->prev_host_drive) || (dev->prev_host_drive == 0) || (dev->host_drive != 0)) { /* Switch from empty to empty. Do nothing. */ return; } diff --git a/src/cdrom/cdrom_image.c b/src/cdrom/cdrom_image.c index f8f7536e6..a327adad2 100644 --- a/src/cdrom/cdrom_image.c +++ b/src/cdrom/cdrom_image.c @@ -33,11 +33,9 @@ #include <86box/cdrom.h> #include <86box/cdrom_image.h> - #ifdef ENABLE_CDROM_IMAGE_LOG int cdrom_image_do_log = ENABLE_CDROM_IMAGE_LOG; - void cdrom_image_log(const char *fmt, ...) { @@ -50,31 +48,28 @@ cdrom_image_log(const char *fmt, ...) } } #else -#define cdrom_image_log(fmt, ...) +# define cdrom_image_log(fmt, ...) #endif - /* The addresses sent from the guest are absolute, ie. a LBA of 0 corresponds to a MSF of 00:00:00. Otherwise, the counter displayed by the guest is wrong: there is a seeming 2 seconds in which audio plays but counter does not move, while a data track before audio jumps to 2 seconds before the actual start of the audio while audio still plays. With an absolute conversion, the counter is fine. */ -#define MSFtoLBA(m,s,f) ((((m * 60) + s) * 75) + f) - +#define MSFtoLBA(m, s, f) ((((m * 60) + s) * 75) + f) static void image_get_tracks(cdrom_t *dev, int *first, int *last) { - cd_img_t *img = (cd_img_t *)dev->image; - TMSF tmsf; + cd_img_t *img = (cd_img_t *) dev->image; + TMSF tmsf; cdi_get_audio_tracks(img, first, last, &tmsf); } - static void image_get_track_info(cdrom_t *dev, uint32_t track, int end, track_info_t *ti) { - cd_img_t *img = (cd_img_t *)dev->image; - TMSF tmsf; + cd_img_t *img = (cd_img_t *) dev->image; + TMSF tmsf; cdi_get_audio_track_info(img, end, track, &ti->number, &tmsf, &ti->attr); @@ -83,12 +78,11 @@ image_get_track_info(cdrom_t *dev, uint32_t track, int end, track_info_t *ti) ti->f = tmsf.fr; } - static void image_get_subchannel(cdrom_t *dev, uint32_t lba, subchannel_t *subc) { - cd_img_t *img = (cd_img_t *)dev->image; - TMSF rel_pos, abs_pos; + cd_img_t *img = (cd_img_t *) dev->image; + TMSF rel_pos, abs_pos; cdi_get_audio_sub(img, lba, &subc->attr, &subc->track, &subc->index, &rel_pos, &abs_pos); @@ -102,15 +96,14 @@ image_get_subchannel(cdrom_t *dev, uint32_t lba, subchannel_t *subc) subc->rel_f = rel_pos.fr; } - static int image_get_capacity(cdrom_t *dev) { - cd_img_t *img = (cd_img_t *)dev->image; - int first_track, last_track; - int number, c; + cd_img_t *img = (cd_img_t *) dev->image; + int first_track, last_track; + int number, c; unsigned char attr; - uint32_t address = 0, lb = 0; + uint32_t address = 0, lb = 0; if (!img) return 0; @@ -126,23 +119,22 @@ image_get_capacity(cdrom_t *dev) return lb; } - static int image_is_track_audio(cdrom_t *dev, uint32_t pos, int ismsf) { - cd_img_t *img = (cd_img_t *)dev->image; - uint8_t attr; - TMSF tmsf; - int m, s, f; - int number, track; + cd_img_t *img = (cd_img_t *) dev->image; + uint8_t attr; + TMSF tmsf; + int m, s, f; + int number, track; if (!img || (dev->cd_status == CD_STATUS_DATA_ONLY)) return 0; if (ismsf) { - m = (pos >> 16) & 0xff; - s = (pos >> 8) & 0xff; - f = pos & 0xff; + m = (pos >> 16) & 0xff; + s = (pos >> 8) & 0xff; + f = pos & 0xff; pos = MSFtoLBA(m, s, f) - 150; } @@ -156,12 +148,11 @@ image_is_track_audio(cdrom_t *dev, uint32_t pos, int ismsf) } } - static int image_is_track_pre(cdrom_t *dev, uint32_t lba) { - cd_img_t *img = (cd_img_t *)dev->image; - int track; + cd_img_t *img = (cd_img_t *) dev->image; + int track; /* GetTrack requires LBA. */ track = cdi_get_track(img, lba); @@ -172,20 +163,18 @@ image_is_track_pre(cdrom_t *dev, uint32_t lba) return 0; } - static int image_sector_size(struct cdrom *dev, uint32_t lba) { - cd_img_t *img = (cd_img_t *)dev->image; + cd_img_t *img = (cd_img_t *) dev->image; return cdi_get_sector_size(img, lba); } - static int image_read_sector(struct cdrom *dev, int type, uint8_t *b, uint32_t lba) { - cd_img_t *img = (cd_img_t *)dev->image; + cd_img_t *img = (cd_img_t *) dev->image; switch (type) { case CD_READ_DATA: @@ -203,11 +192,10 @@ image_read_sector(struct cdrom *dev, int type, uint8_t *b, uint32_t lba) } } - static int image_track_type(cdrom_t *dev, uint32_t lba) { - cd_img_t *img = (cd_img_t *)dev->image; + cd_img_t *img = (cd_img_t *) dev->image; if (img) { if (image_is_track_audio(dev, lba, 0)) @@ -215,17 +203,16 @@ image_track_type(cdrom_t *dev, uint32_t lba) else { if (cdi_is_mode2(img, lba)) return CD_TRACK_MODE2 | cdi_get_mode2_form(img, lba); - } + } } return 0; } - static void image_exit(cdrom_t *dev) { - cd_img_t *img = (cd_img_t *)dev->image; + cd_img_t *img = (cd_img_t *) dev->image; cdrom_image_log("CDROM: image_exit(%s)\n", dev->image_path); dev->cd_status = CD_STATUS_EMPTY; @@ -238,7 +225,6 @@ image_exit(cdrom_t *dev) dev->ops = NULL; } - static const cdrom_ops_t cdrom_image_ops = { image_get_tracks, image_get_track_info, @@ -250,18 +236,16 @@ static const cdrom_ops_t cdrom_image_ops = { image_exit }; - static int image_open_abort(cdrom_t *dev) { cdrom_image_close(dev); - dev->ops = NULL; - dev->host_drive = 0; + dev->ops = NULL; + dev->host_drive = 0; dev->image_path[0] = 0; return 1; } - int cdrom_image_open(cdrom_t *dev, const char *fn) { @@ -288,12 +272,12 @@ cdrom_image_open(cdrom_t *dev, const char *fn) return image_open_abort(dev); /* All good, reset state. */ - if (! strcasecmp(path_get_extension((char *) fn), "ISO")) - dev->cd_status = CD_STATUS_DATA_ONLY; + if (!strcasecmp(path_get_extension((char *) fn), "ISO")) + dev->cd_status = CD_STATUS_DATA_ONLY; else - dev->cd_status = CD_STATUS_STOPPED; - dev->seek_pos = 0; - dev->cd_buflen = 0; + dev->cd_status = CD_STATUS_STOPPED; + dev->seek_pos = 0; + dev->cd_buflen = 0; dev->cdrom_capacity = image_get_capacity(dev); cdrom_image_log("CD-ROM capacity: %i sectors (%" PRIi64 " bytes)\n", dev->cdrom_capacity, ((uint64_t) dev->cdrom_capacity) << 11ULL); @@ -303,7 +287,6 @@ cdrom_image_open(cdrom_t *dev, const char *fn) return 0; } - void cdrom_image_close(cdrom_t *dev) { diff --git a/src/cdrom/cdrom_image_backend.c b/src/cdrom/cdrom_image_backend.c index 028c3c3ed..0fe12869c 100644 --- a/src/cdrom/cdrom_image_backend.c +++ b/src/cdrom/cdrom_image_backend.c @@ -26,9 +26,9 @@ #include #include #ifdef _WIN32 -# include +# include #else -# include +# include #endif #include #define HAVE_STDARG_H @@ -37,21 +37,17 @@ #include <86box/plat.h> #include <86box/cdrom_image_backend.h> +#define CDROM_BCD(x) (((x) % 10) | (((x) / 10) << 4)) -#define CDROM_BCD(x) (((x) % 10) | (((x) / 10) << 4)) - -#define MAX_LINE_LENGTH 512 -#define MAX_FILENAME_LENGTH 256 -#define CROSS_LEN 512 - - -static char temp_keyword[1024]; +#define MAX_LINE_LENGTH 512 +#define MAX_FILENAME_LENGTH 256 +#define CROSS_LEN 512 +static char temp_keyword[1024]; #ifdef ENABLE_CDROM_IMAGE_BACKEND_LOG int cdrom_image_backend_do_log = ENABLE_CDROM_IMAGE_BACKEND_LOG; - void cdrom_image_backend_log(const char *fmt, ...) { @@ -64,10 +60,9 @@ cdrom_image_backend_log(const char *fmt, ...) } } #else -#define cdrom_image_backend_log(fmt, ...) +# define cdrom_image_backend_log(fmt, ...) #endif - /* Binary file functions. */ static int bin_read(void *p, uint8_t *buffer, uint64_t seek, size_t count) @@ -97,11 +92,10 @@ bin_read(void *p, uint8_t *buffer, uint64_t seek, size_t count) return 1; } - static uint64_t bin_get_length(void *p) { - off64_t len; + off64_t len; track_file_t *tf = (track_file_t *) p; cdrom_image_backend_log("CDROM: binary_length(%08lx)\n", tf->file); @@ -116,7 +110,6 @@ bin_get_length(void *p) return len; } - static void bin_close(void *p) { @@ -135,7 +128,6 @@ bin_close(void *p) free(p); } - static track_file_t * bin_init(const char *filename, int *error) { @@ -155,9 +147,9 @@ bin_init(const char *filename, int *error) /* Set the function pointers. */ if (!*error) { - tf->read = bin_read; + tf->read = bin_read; tf->get_length = bin_get_length; - tf->close = bin_close; + tf->close = bin_close; } else { free(tf); tf = NULL; @@ -166,7 +158,6 @@ bin_init(const char *filename, int *error) return tf; } - static track_file_t * track_file_init(const char *filename, int *error) { @@ -175,7 +166,6 @@ track_file_init(const char *filename, int *error) return bin_init(filename, error); } - static void track_file_close(track_t *trk) { @@ -192,14 +182,13 @@ track_file_close(track_t *trk) trk->file = NULL; } - /* Root functions. */ static void cdi_clear_tracks(cd_img_t *cdi) { - int i; + int i; track_file_t *last = NULL; - track_t *cur = NULL; + track_t *cur = NULL; if ((cdi->tracks == NULL) || (cdi->tracks_num == 0)) return; @@ -223,7 +212,6 @@ cdi_clear_tracks(cd_img_t *cdi) cdi->tracks_num = 0; } - void cdi_close(cd_img_t *cdi) { @@ -231,7 +219,6 @@ cdi_close(cd_img_t *cdi) free(cdi); } - int cdi_set_device(cd_img_t *cdi, const char *path) { @@ -244,31 +231,28 @@ cdi_set_device(cd_img_t *cdi, const char *path) return 0; } - /* TODO: This never returns anything other than 1, should it even be an int? */ int cdi_get_audio_tracks(cd_img_t *cdi, int *st_track, int *end, TMSF *lead_out) { *st_track = 1; - *end = cdi->tracks_num - 1; + *end = cdi->tracks_num - 1; FRAMES_TO_MSF(cdi->tracks[*end].start + 150, &lead_out->min, &lead_out->sec, &lead_out->fr); return 1; } - /* TODO: This never returns anything other than 1, should it even be an int? */ int cdi_get_audio_tracks_lba(cd_img_t *cdi, int *st_track, int *end, uint32_t *lead_out) { *st_track = 1; - *end = cdi->tracks_num - 1; + *end = cdi->tracks_num - 1; *lead_out = cdi->tracks[*end].start; return 1; } - int cdi_get_audio_track_pre(cd_img_t *cdi, int track) { @@ -280,13 +264,12 @@ cdi_get_audio_track_pre(cd_img_t *cdi, int track) return trk->pre; } - /* This replaces both Info and EndInfo, they are specified by a variable. */ int cdi_get_audio_track_info(cd_img_t *cdi, int end, int track, int *track_num, TMSF *start, uint8_t *attr) { track_t *trk = &cdi->tracks[track - 1]; - int pos = trk->start + 150; + int pos = trk->start + 150; if ((track < 1) || (track > cdi->tracks_num)) return 0; @@ -296,12 +279,11 @@ cdi_get_audio_track_info(cd_img_t *cdi, int end, int track, int *track_num, TMSF FRAMES_TO_MSF(pos, &start->min, &start->sec, &start->fr); *track_num = trk->track_number; - *attr = trk->attr; + *attr = trk->attr; return 1; } - int cdi_get_audio_track_info_lba(cd_img_t *cdi, int end, int track, int *track_num, uint32_t *start, uint8_t *attr) { @@ -313,16 +295,15 @@ cdi_get_audio_track_info_lba(cd_img_t *cdi, int end, int track, int *track_num, *start = (uint32_t) trk->start; *track_num = trk->track_number; - *attr = trk->attr; + *attr = trk->attr; return 1; } - int cdi_get_track(cd_img_t *cdi, uint32_t sector) { - int i; + int i; track_t *cur, *next; /* There must be at least two tracks - data and lead out. */ @@ -332,7 +313,7 @@ cdi_get_track(cd_img_t *cdi, uint32_t sector) /* This has a problem - the code skips the last track, which is lead out - is that correct? */ for (i = 0; i < (cdi->tracks_num - 1); i++) { - cur = &cdi->tracks[i]; + cur = &cdi->tracks[i]; next = &cdi->tracks[i + 1]; if ((cur->start <= sector) && (sector < next->start)) return cur->number; @@ -341,20 +322,19 @@ cdi_get_track(cd_img_t *cdi, uint32_t sector) return -1; } - /* TODO: See if track start is adjusted by 150 or not. */ int cdi_get_audio_sub(cd_img_t *cdi, uint32_t sector, uint8_t *attr, uint8_t *track, uint8_t *index, TMSF *rel_pos, TMSF *abs_pos) { - int cur_track = cdi_get_track(cdi, sector); + int cur_track = cdi_get_track(cdi, sector); track_t *trk; if (cur_track < 1) return 0; *track = (uint8_t) cur_track; - trk = &cdi->tracks[*track - 1]; - *attr = trk->attr; + trk = &cdi->tracks[*track - 1]; + *attr = trk->attr; *index = 1; FRAMES_TO_MSF(sector + 150, &abs_pos->min, &abs_pos->sec, &abs_pos->fr); @@ -365,23 +345,22 @@ cdi_get_audio_sub(cd_img_t *cdi, uint32_t sector, uint8_t *attr, uint8_t *track, return 1; } - int cdi_read_sector(cd_img_t *cdi, uint8_t *buffer, int raw, uint32_t sector) { - size_t length; - int track = cdi_get_track(cdi, sector) - 1; - uint64_t sect = (uint64_t) sector, seek; + size_t length; + int track = cdi_get_track(cdi, sector) - 1; + uint64_t sect = (uint64_t) sector, seek; track_t *trk; - int track_is_raw, ret; - int raw_size, cooked_size; + int track_is_raw, ret; + int raw_size, cooked_size; uint64_t offset = 0ULL; - int m = 0, s = 0, f = 0; + int m = 0, s = 0, f = 0; if (track < 0) return 0; - trk = &cdi->tracks[track]; + trk = &cdi->tracks[track]; track_is_raw = ((trk->sector_size == RAW_SECTOR_SIZE) || (trk->sector_size == 2448)); seek = trk->skip + ((sect - trk->start) * trk->sector_size); @@ -393,7 +372,7 @@ cdi_read_sector(cd_img_t *cdi, uint8_t *buffer, int raw, uint32_t sector) if (trk->mode2 && (trk->form != 1)) { if (trk->form == 2) - cooked_size = (track_is_raw ? 2328 : trk->sector_size); /* Both 2324 + ECC and 2328 variants are valid. */ + cooked_size = (track_is_raw ? 2328 : trk->sector_size); /* Both 2324 + ECC and 2328 variants are valid. */ else cooked_size = 2336; } else @@ -428,29 +407,27 @@ cdi_read_sector(cd_img_t *cdi, uint8_t *buffer, int raw, uint32_t sector) return trk->file->read(trk->file, buffer, seek, length); } - int cdi_read_sectors(cd_img_t *cdi, uint8_t *buffer, int raw, uint32_t sector, uint32_t num) { - int sector_size, success = 1; + int sector_size, success = 1; uint8_t *buf; uint32_t buf_len, i; /* TODO: This fails to account for Mode 2. Shouldn't we have a function to get sector size? */ sector_size = raw ? RAW_SECTOR_SIZE : COOKED_SECTOR_SIZE; - buf_len = num * sector_size; - buf = (uint8_t *) malloc(buf_len * sizeof(uint8_t)); + buf_len = num * sector_size; + buf = (uint8_t *) malloc(buf_len * sizeof(uint8_t)); for (i = 0; i < num; i++) { success = cdi_read_sector(cdi, &buf[i * sector_size], raw, sector + i); if (!success) - break; - /* Based on the DOSBox patch, but check all 8 bytes and makes sure it's not an - audio track. */ - if (raw && sector < cdi->tracks[0].length && !cdi->tracks[0].mode2 && - (cdi->tracks[0].attr != AUDIO_TRACK) && *(uint64_t *) &(buf[i * sector_size + 2068])) - return 0; + break; + /* Based on the DOSBox patch, but check all 8 bytes and makes sure it's not an + audio track. */ + if (raw && sector < cdi->tracks[0].length && !cdi->tracks[0].mode2 && (cdi->tracks[0].attr != AUDIO_TRACK) && *(uint64_t *) &(buf[i * sector_size + 2068])) + return 0; } memcpy((void *) buffer, buf, buf_len); @@ -460,19 +437,18 @@ cdi_read_sectors(cd_img_t *cdi, uint8_t *buffer, int raw, uint32_t sector, uint3 return success; } - /* TODO: Do CUE+BIN images with a sector size of 2448 even exist? */ int cdi_read_sector_sub(cd_img_t *cdi, uint8_t *buffer, uint32_t sector) { - int track = cdi_get_track(cdi, sector) - 1; + int track = cdi_get_track(cdi, sector) - 1; track_t *trk; uint64_t s = (uint64_t) sector, seek; if (track < 0) return 0; - trk = &cdi->tracks[track]; + trk = &cdi->tracks[track]; seek = trk->skip + ((s - trk->start) * trk->sector_size); if (trk->sector_size != 2448) return 0; @@ -480,11 +456,10 @@ cdi_read_sector_sub(cd_img_t *cdi, uint8_t *buffer, uint32_t sector) return trk->file->read(trk->file, buffer, seek, 2448); } - int cdi_get_sector_size(cd_img_t *cdi, uint32_t sector) { - int track = cdi_get_track(cdi, sector) - 1; + int track = cdi_get_track(cdi, sector) - 1; track_t *trk; if (track < 0) @@ -494,11 +469,10 @@ cdi_get_sector_size(cd_img_t *cdi, uint32_t sector) return trk->sector_size; } - int cdi_is_mode2(cd_img_t *cdi, uint32_t sector) { - int track = cdi_get_track(cdi, sector) - 1; + int track = cdi_get_track(cdi, sector) - 1; track_t *trk; if (track < 0) @@ -509,11 +483,10 @@ cdi_is_mode2(cd_img_t *cdi, uint32_t sector) return !!(trk->mode2); } - int cdi_get_mode2_form(cd_img_t *cdi, uint32_t sector) { - int track = cdi_get_track(cdi, sector) - 1; + int track = cdi_get_track(cdi, sector) - 1; track_t *trk; if (track < 0) @@ -524,12 +497,11 @@ cdi_get_mode2_form(cd_img_t *cdi, uint32_t sector) return trk->form; } - static int cdi_can_read_pvd(track_file_t *file, uint64_t sector_size, int mode2, int form) { - uint8_t pvd[COOKED_SECTOR_SIZE]; - uint64_t seek = 16ULL * sector_size; /* First VD is located at sector 16. */ + uint8_t pvd[COOKED_SECTOR_SIZE]; + uint64_t seek = 16ULL * sector_size; /* First VD is located at sector 16. */ if ((!mode2 || (form == 0)) && (sector_size == RAW_SECTOR_SIZE)) seek += 16; @@ -538,11 +510,9 @@ cdi_can_read_pvd(track_file_t *file, uint64_t sector_size, int mode2, int form) file->read(file, pvd, seek, COOKED_SECTOR_SIZE); - return ((pvd[0] == 1 && !strncmp((char*)(&pvd[1]), "CD001", 5) && pvd[6] == 1) || - (pvd[8] == 1 && !strncmp((char*)(&pvd[9]), "CDROM", 5) && pvd[14] == 1)); + return ((pvd[0] == 1 && !strncmp((char *) (&pvd[1]), "CD001", 5) && pvd[6] == 1) || (pvd[8] == 1 && !strncmp((char *) (&pvd[9]), "CDROM", 5) && pvd[14] == 1)); } - /* This reallocates the array and returns the pointer to the last track. */ static void cdi_track_push_back(cd_img_t *cdi, track_t *trk) @@ -559,14 +529,13 @@ cdi_track_push_back(cd_img_t *cdi, track_t *trk) cdi->tracks_num++; } - int cdi_load_iso(cd_img_t *cdi, const char *filename) { - int error; + int error; track_t trk; - cdi->tracks = NULL; + cdi->tracks = NULL; cdi->tracks_num = 0; memset(&trk, 0, sizeof(track_t)); @@ -578,26 +547,26 @@ cdi_load_iso(cd_img_t *cdi, const char *filename) trk.file->close(trk.file); return 0; } - trk.number = 1; + trk.number = 1; trk.track_number = 1; - trk.attr = DATA_TRACK; + trk.attr = DATA_TRACK; /* Try to detect ISO type. */ - trk.form = 0; + trk.form = 0; trk.mode2 = 0; /* TODO: Merge the first and last cases since they result in the same thing. */ if (cdi_can_read_pvd(trk.file, RAW_SECTOR_SIZE, 0, 0)) trk.sector_size = RAW_SECTOR_SIZE; else if (cdi_can_read_pvd(trk.file, 2336, 1, 0)) { trk.sector_size = 2336; - trk.mode2 = 1; + trk.mode2 = 1; } else if (cdi_can_read_pvd(trk.file, 2324, 1, 2)) { trk.sector_size = 2324; - trk.mode2 = 1; - trk.form = 2; + trk.mode2 = 1; + trk.form = 2; } else if (cdi_can_read_pvd(trk.file, RAW_SECTOR_SIZE, 1, 0)) { trk.sector_size = RAW_SECTOR_SIZE; - trk.mode2 = 1; + trk.mode2 = 1; } else { /* We use 2048 mode 1 as the default. */ trk.sector_size = COOKED_SECTOR_SIZE; @@ -608,30 +577,29 @@ cdi_load_iso(cd_img_t *cdi, const char *filename) cdi_track_push_back(cdi, &trk); /* Lead out track. */ - trk.number = 2; + trk.number = 2; trk.track_number = 0xAA; - trk.attr = 0x16; /* Was originally 0x00, but I believe 0x16 is appropriate. */ - trk.start = trk.length; - trk.length = 0; - trk.file = NULL; + trk.attr = 0x16; /* Was originally 0x00, but I believe 0x16 is appropriate. */ + trk.start = trk.length; + trk.length = 0; + trk.file = NULL; cdi_track_push_back(cdi, &trk); return 1; } - static int cdi_cue_get_buffer(char *str, char **line, int up) { - char *s = *line; - char *p = str; - int quote = 0; - int done = 0; - int space = 1; + char *s = *line; + char *p = str; + int quote = 0; + int done = 0; + int space = 1; /* Copy to local buffer until we have end of string or whitespace. */ - while (! done) { - switch(*s) { + while (!done) { + switch (*s) { case '\0': if (quote) { /* Ouch, unterminated string.. */ @@ -644,11 +612,12 @@ cdi_cue_get_buffer(char *str, char **line, int up) quote ^= 1; break; - case ' ': case '\t': + case ' ': + case '\t': if (space) - break; + break; - if (! quote) { + if (!quote) { done = 1; break; } @@ -663,7 +632,7 @@ cdi_cue_get_buffer(char *str, char **line, int up) break; } - if (! done) + if (!done) s++; } *p = '\0'; @@ -673,7 +642,6 @@ cdi_cue_get_buffer(char *str, char **line, int up) return 1; } - static int cdi_cue_get_keyword(char **dest, char **line) { @@ -686,12 +654,11 @@ cdi_cue_get_keyword(char **dest, char **line) return success; } - /* Get a string from the input line, handling quotes properly. */ static uint64_t cdi_cue_get_number(char **line) { - char temp[128]; + char temp[128]; uint64_t num; if (!cdi_cue_get_buffer(temp, line, 0)) @@ -703,13 +670,12 @@ cdi_cue_get_number(char **line) return num; } - static int cdi_cue_get_frame(uint64_t *frames, char **line) { char temp[128]; - int min, sec, fr; - int success; + int min, sec, fr; + int success; success = cdi_cue_get_buffer(temp, line, 0); if (!success) @@ -724,12 +690,11 @@ cdi_cue_get_frame(uint64_t *frames, char **line) return 1; } - static int cdi_cue_get_flags(track_t *cur, char **line) { char temp[128], temp2[128]; - int success; + int success; success = cdi_cue_get_buffer(temp, line, 0); if (!success) @@ -745,7 +710,6 @@ cdi_cue_get_flags(track_t *cur, char **line) return 1; } - static int cdi_add_track(cd_img_t *cdi, track_t *cur, uint64_t *shift, uint64_t prestart, uint64_t *total_pregap, uint64_t cur_pregap) { @@ -788,11 +752,11 @@ cdi_add_track(cd_img_t *cdi, track_t *cur, uint64_t *shift, uint64_t prestart, u *total_pregap += cur_pregap; cur->start += *total_pregap; } else { - temp = prev->file->get_length(prev->file) - ((uint64_t) prev->skip); + temp = prev->file->get_length(prev->file) - ((uint64_t) prev->skip); prev->length = temp / ((uint64_t) prev->sector_size); if ((temp % prev->sector_size) != 0) prev->length++; - /* Padding. */ + /* Padding. */ cur->start += prev->start + prev->length + cur_pregap; cur->skip = skip * cur->sector_size; @@ -813,24 +777,23 @@ cdi_add_track(cd_img_t *cdi, track_t *cur, uint64_t *shift, uint64_t prestart, u return 1; } - int cdi_load_cue(cd_img_t *cdi, const char *cuefile) { - track_t trk; - char pathname[MAX_FILENAME_LENGTH], filename[MAX_FILENAME_LENGTH]; - char temp[MAX_FILENAME_LENGTH]; + track_t trk; + char pathname[MAX_FILENAME_LENGTH], filename[MAX_FILENAME_LENGTH]; + char temp[MAX_FILENAME_LENGTH]; uint64_t shift = 0ULL, prestart = 0ULL; uint64_t cur_pregap = 0ULL, total_pregap = 0ULL; uint64_t frame = 0ULL, index; - int i, success; - int error, can_add_track = 0; - FILE *fp; - char buf[MAX_LINE_LENGTH], ansi[MAX_FILENAME_LENGTH]; - char *line, *command; - char *type; + int i, success; + int error, can_add_track = 0; + FILE *fp; + char buf[MAX_LINE_LENGTH], ansi[MAX_FILENAME_LENGTH]; + char *line, *command; + char *type; - cdi->tracks = NULL; + cdi->tracks = NULL; cdi->tracks_num = 0; memset(&trk, 0, sizeof(track_t)); @@ -859,10 +822,10 @@ cdi_load_cue(cd_img_t *cdi, const char *cuefile) if (strlen(buf) > 0) { if (buf[strlen(buf) - 1] == '\n') buf[strlen(buf) - 1] = '\0'; - /* nuke trailing newline */ + /* nuke trailing newline */ else if (buf[strlen(buf) - 1] == '\r') buf[strlen(buf) - 1] = '\0'; - /* nuke trailing newline */ + /* nuke trailing newline */ } } @@ -876,86 +839,86 @@ cdi_load_cue(cd_img_t *cdi, const char *cuefile) if (!success) break; - trk.start = 0; - trk.skip = 0; + trk.start = 0; + trk.skip = 0; cur_pregap = 0; - prestart = 0; + prestart = 0; - trk.number = cdi_cue_get_number(&line); + trk.number = cdi_cue_get_number(&line); trk.track_number = trk.number; - success = cdi_cue_get_keyword(&type, &line); + success = cdi_cue_get_keyword(&type, &line); if (!success) break; - trk.form = 0; + trk.form = 0; trk.mode2 = 0; trk.pre = 0; if (!strcmp(type, "AUDIO")) { trk.sector_size = RAW_SECTOR_SIZE; - trk.attr = AUDIO_TRACK; + trk.attr = AUDIO_TRACK; } else if (!strcmp(type, "MODE1/2048")) { trk.sector_size = COOKED_SECTOR_SIZE; - trk.attr = DATA_TRACK; + trk.attr = DATA_TRACK; } else if (!strcmp(type, "MODE1/2352")) { trk.sector_size = RAW_SECTOR_SIZE; - trk.attr = DATA_TRACK; + trk.attr = DATA_TRACK; } else if (!strcmp(type, "MODE1/2448")) { trk.sector_size = 2448; - trk.attr = DATA_TRACK; + trk.attr = DATA_TRACK; } else if (!strcmp(type, "MODE2/2048")) { - trk.form = 1; + trk.form = 1; trk.sector_size = COOKED_SECTOR_SIZE; - trk.attr = DATA_TRACK; - trk.mode2 = 1; + trk.attr = DATA_TRACK; + trk.mode2 = 1; } else if (!strcmp(type, "MODE2/2324")) { - trk.form = 2; + trk.form = 2; trk.sector_size = 2324; - trk.attr = DATA_TRACK; - trk.mode2 = 1; + trk.attr = DATA_TRACK; + trk.mode2 = 1; } else if (!strcmp(type, "MODE2/2328")) { - trk.form = 2; + trk.form = 2; trk.sector_size = 2328; - trk.attr = DATA_TRACK; - trk.mode2 = 1; + trk.attr = DATA_TRACK; + trk.mode2 = 1; } else if (!strcmp(type, "MODE2/2336")) { trk.sector_size = 2336; - trk.attr = DATA_TRACK; - trk.mode2 = 1; + trk.attr = DATA_TRACK; + trk.mode2 = 1; } else if (!strcmp(type, "MODE2/2352")) { /* Assume this is XA Mode 2 Form 1. */ - trk.form = 1; + trk.form = 1; trk.sector_size = RAW_SECTOR_SIZE; - trk.attr = DATA_TRACK; - trk.mode2 = 1; + trk.attr = DATA_TRACK; + trk.mode2 = 1; } else if (!strcmp(type, "MODE2/2448")) { /* Assume this is XA Mode 2 Form 1. */ - trk.form = 1; + trk.form = 1; trk.sector_size = 2448; - trk.attr = DATA_TRACK; - trk.mode2 = 1; + trk.attr = DATA_TRACK; + trk.mode2 = 1; } else if (!strcmp(type, "CDG/2448")) { trk.sector_size = 2448; - trk.attr = DATA_TRACK; - trk.mode2 = 1; + trk.attr = DATA_TRACK; + trk.mode2 = 1; } else if (!strcmp(type, "CDI/2336")) { trk.sector_size = 2336; - trk.attr = DATA_TRACK; - trk.mode2 = 1; + trk.attr = DATA_TRACK; + trk.mode2 = 1; } else if (!strcmp(type, "CDI/2352")) { trk.sector_size = RAW_SECTOR_SIZE; - trk.attr = DATA_TRACK; - trk.mode2 = 1; + trk.attr = DATA_TRACK; + trk.mode2 = 1; } else success = 0; can_add_track = 1; } else if (!strcmp(command, "INDEX")) { - index = cdi_cue_get_number(&line); + index = cdi_cue_get_number(&line); success = cdi_cue_get_frame(&frame, &line); - switch(index) { + switch (index) { case 0: prestart = frame; break; @@ -988,7 +951,7 @@ cdi_load_cue(cd_img_t *cdi, const char *cuefile) break; trk.file = NULL; - error = 1; + error = 1; if (!strcmp(type, "BINARY")) { memset(temp, 0, MAX_FILENAME_LENGTH * sizeof(char)); @@ -1010,9 +973,7 @@ cdi_load_cue(cd_img_t *cdi, const char *cuefile) success = cdi_cue_get_frame(&cur_pregap, &line); else if (!strcmp(command, "FLAGS")) success = cdi_cue_get_flags(&trk, &line); - else if (!strcmp(command, "CATALOG") || !strcmp(command, "CDTEXTFILE") || !strcmp(command, "ISRC") || - !strcmp(command, "PERFORMER") || !strcmp(command, "POSTGAP") || !strcmp(command, "REM") || - !strcmp(command, "SONGWRITER") || !strcmp(command, "TITLE") || !strcmp(command, "")) { + else if (!strcmp(command, "CATALOG") || !strcmp(command, "CDTEXTFILE") || !strcmp(command, "ISRC") || !strcmp(command, "PERFORMER") || !strcmp(command, "POSTGAP") || !strcmp(command, "REM") || !strcmp(command, "SONGWRITER") || !strcmp(command, "TITLE") || !strcmp(command, "")) { /* Ignored commands. */ success = 1; } else { @@ -1020,7 +981,7 @@ cdi_load_cue(cd_img_t *cdi, const char *cuefile) cdrom_image_backend_log("CUE: unsupported command '%s' in cue sheet!\n", command); #endif success = 0; - } + } if (!success) break; @@ -1037,17 +998,16 @@ cdi_load_cue(cd_img_t *cdi, const char *cuefile) /* Add lead out track. */ trk.number++; trk.track_number = 0xAA; - trk.attr = 0x16; /* Was 0x00 but I believe 0x16 is appropriate. */ - trk.start = 0; - trk.length = 0; - trk.file = NULL; + trk.attr = 0x16; /* Was 0x00 but I believe 0x16 is appropriate. */ + trk.start = 0; + trk.length = 0; + trk.file = NULL; if (!cdi_add_track(cdi, &trk, &shift, 0, &total_pregap, 0)) return 0; return 1; } - int cdi_has_data_track(cd_img_t *cdi) { @@ -1065,7 +1025,6 @@ cdi_has_data_track(cd_img_t *cdi) return 0; } - int cdi_has_audio_track(cd_img_t *cdi) { From 3753a9f8b248e3fb551a19aab25036e46fcbe687 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:12:38 -0400 Subject: [PATCH 356/386] clang-format in src/chipset/ --- src/chipset/82c100.c | 320 ++-- src/chipset/acc2168.c | 212 ++- src/chipset/ali1429.c | 271 ++- src/chipset/ali1489.c | 634 ++++--- src/chipset/ali1531.c | 368 ++-- src/chipset/ali1541.c | 928 +++++----- src/chipset/ali1543.c | 1996 +++++++++++----------- src/chipset/ali1621.c | 801 +++++---- src/chipset/ali6117.c | 482 +++--- src/chipset/contaq_82c59x.c | 388 +++-- src/chipset/cs4031.c | 135 +- src/chipset/cs8230.c | 148 +- src/chipset/et6000.c | 100 +- src/chipset/gc100.c | 184 +- src/chipset/headland.c | 808 +++++---- src/chipset/ims8848.c | 341 ++-- src/chipset/intel_420ex.c | 577 ++++--- src/chipset/intel_4x0.c | 3176 ++++++++++++++++++----------------- src/chipset/intel_82335.c | 114 +- src/chipset/intel_i450kx.c | 860 +++++----- src/chipset/intel_piix.c | 2194 ++++++++++++------------ src/chipset/intel_sio.c | 551 +++--- src/chipset/neat.c | 1016 ++++++----- src/chipset/olivetti_eva.c | 28 +- src/chipset/opti283.c | 230 ++- src/chipset/opti291.c | 163 +- src/chipset/opti391.c | 180 +- src/chipset/opti495.c | 233 ++- src/chipset/opti499.c | 209 ++- src/chipset/opti5x7.c | 152 +- src/chipset/opti822.c | 337 ++-- src/chipset/opti895.c | 258 ++- src/chipset/scamp.c | 1223 +++++++------- src/chipset/scat.c | 2242 ++++++++++++------------- src/chipset/sis_5511.c | 1017 ++++++----- src/chipset/sis_5571.c | 1091 ++++++------ src/chipset/sis_85c310.c | 106 +- src/chipset/sis_85c496.c | 746 ++++---- src/chipset/sis_85c4xx.c | 443 +++-- src/chipset/sis_85c50x.c | 368 ++-- src/chipset/stpc.c | 961 +++++------ src/chipset/umc_8886.c | 335 ++-- src/chipset/umc_hb4.c | 225 ++- src/chipset/via_apollo.c | 1156 +++++++------ src/chipset/via_pipc.c | 1867 ++++++++++---------- src/chipset/via_vt82c49x.c | 447 +++-- src/chipset/via_vt82c505.c | 207 +-- src/chipset/vl82c480.c | 198 ++- src/chipset/wd76c10.c | 502 +++--- 49 files changed, 15766 insertions(+), 15762 deletions(-) diff --git a/src/chipset/82c100.c b/src/chipset/82c100.c index 8b2259374..fc3441b47 100644 --- a/src/chipset/82c100.c +++ b/src/chipset/82c100.c @@ -30,76 +30,70 @@ #include <86box/rom.h> #include <86box/chipset.h> - typedef struct { - int enabled; - uint32_t virt, phys; + int enabled; + uint32_t virt, phys; } ems_page_t; - typedef struct { - uint8_t index, access; - uint16_t ems_io_base; - uint32_t ems_window_base; - uint8_t ems_page_regs[4], - regs[256]; - ems_page_t ems_pages[4]; - mem_mapping_t ems_mappings[4]; + uint8_t index, access; + uint16_t ems_io_base; + uint32_t ems_window_base; + uint8_t ems_page_regs[4], + regs[256]; + ems_page_t ems_pages[4]; + mem_mapping_t ems_mappings[4]; } ct_82c100_t; - #ifdef ENABLE_CT_82C100_LOG int ct_82c100_do_log = ENABLE_CT82C100_LOG; - static void ct_82c100_log(const char *fmt, ...) { va_list ap; if (ct_82c100_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define ct_82c100_log(fmt, ...) +# define ct_82c100_log(fmt, ...) #endif - static void ct_82c100_ems_pages_recalc(ct_82c100_t *dev) { - int i; + int i; uint32_t page_base; for (i = 0; i < 4; i++) { - page_base = dev->ems_window_base + (i << 14); - if ((i == 1) || (i == 2)) - page_base ^= 0xc000; - if (dev->ems_page_regs[i] & 0x80) { - dev->ems_pages[i].virt = page_base; - dev->ems_pages[i].phys = 0xa0000 + (((uint32_t) (dev->ems_page_regs[i] & 0x7f)) << 14); - ct_82c100_log("Enabling EMS page %i: %08X-%08X -> %08X-%08X\n", i, - dev->ems_pages[i].virt, dev->ems_pages[i].virt + 0x00003fff, - dev->ems_pages[i].phys, dev->ems_pages[i].phys + 0x00003fff); - mem_mapping_set_addr(&(dev->ems_mappings[i]), dev->ems_pages[i].virt, 0x4000); - mem_mapping_set_exec(&(dev->ems_mappings[i]), &(ram[dev->ems_pages[i].phys])); - mem_set_mem_state_both(page_base, 0x00004000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } else { - ct_82c100_log("Disabling EMS page %i\n", i); - mem_mapping_disable(&(dev->ems_mappings[i])); - mem_set_mem_state_both(page_base, 0x00004000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - } + page_base = dev->ems_window_base + (i << 14); + if ((i == 1) || (i == 2)) + page_base ^= 0xc000; + if (dev->ems_page_regs[i] & 0x80) { + dev->ems_pages[i].virt = page_base; + dev->ems_pages[i].phys = 0xa0000 + (((uint32_t) (dev->ems_page_regs[i] & 0x7f)) << 14); + ct_82c100_log("Enabling EMS page %i: %08X-%08X -> %08X-%08X\n", i, + dev->ems_pages[i].virt, dev->ems_pages[i].virt + 0x00003fff, + dev->ems_pages[i].phys, dev->ems_pages[i].phys + 0x00003fff); + mem_mapping_set_addr(&(dev->ems_mappings[i]), dev->ems_pages[i].virt, 0x4000); + mem_mapping_set_exec(&(dev->ems_mappings[i]), &(ram[dev->ems_pages[i].phys])); + mem_set_mem_state_both(page_base, 0x00004000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } else { + ct_82c100_log("Disabling EMS page %i\n", i); + mem_mapping_disable(&(dev->ems_mappings[i])); + mem_set_mem_state_both(page_base, 0x00004000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + } } flushmmucache_nopc(); } - static void ct_82c100_ems_out(uint16_t port, uint8_t val, void *priv) { @@ -110,36 +104,34 @@ ct_82c100_ems_out(uint16_t port, uint8_t val, void *priv) ct_82c100_ems_pages_recalc(dev); } - static uint8_t ct_82c100_ems_in(uint16_t port, void *priv) { ct_82c100_t *dev = (ct_82c100_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; ret = dev->ems_page_regs[port >> 14]; return ret; } - static void ct_82c100_ems_update(ct_82c100_t *dev) { int i; for (i = 0; i < 4; i++) { - ct_82c100_log("Disabling EMS I/O handler %i at %04X\n", i, dev->ems_io_base + (i << 14)); - io_handler(0, dev->ems_io_base + (i << 14), 1, - ct_82c100_ems_in, NULL, NULL, ct_82c100_ems_out, NULL, NULL, dev); + ct_82c100_log("Disabling EMS I/O handler %i at %04X\n", i, dev->ems_io_base + (i << 14)); + io_handler(0, dev->ems_io_base + (i << 14), 1, + ct_82c100_ems_in, NULL, NULL, ct_82c100_ems_out, NULL, NULL, dev); } dev->ems_io_base = 0x0208 + (dev->regs[0x4c] & 0xf0); for (i = 0; i < 4; i++) { - ct_82c100_log("Enabling EMS I/O handler %i at %04X\n", i, dev->ems_io_base + (i << 14)); - io_handler(1, dev->ems_io_base + (i << 14), 1, - ct_82c100_ems_in, NULL, NULL, ct_82c100_ems_out, NULL, NULL, dev); + ct_82c100_log("Enabling EMS I/O handler %i at %04X\n", i, dev->ems_io_base + (i << 14)); + io_handler(1, dev->ems_io_base + (i << 14), 1, + ct_82c100_ems_in, NULL, NULL, ct_82c100_ems_out, NULL, NULL, dev); } dev->ems_window_base = 0xc0000 + (((uint32_t) (dev->regs[0x4c] & 0x0f)) << 14); @@ -147,7 +139,6 @@ ct_82c100_ems_update(ct_82c100_t *dev) ct_82c100_ems_pages_recalc(dev); } - static void ct_82c100_reset(void *priv) { @@ -161,7 +152,7 @@ ct_82c100_reset(void *priv) dev->index = dev->access = 0x00; /* INTERNAL CONFIGURATION/CONTROL REGISTERS */ - dev->regs[0x40] = 0x01; /* Defaults to 8086/V30 mode. */ + dev->regs[0x40] = 0x01; /* Defaults to 8086/V30 mode. */ dev->regs[0x43] = 0x30; dev->regs[0x48] = 0x01; @@ -171,188 +162,183 @@ ct_82c100_reset(void *priv) /* ADDITIONAL I/O REGISTERS */ } - static void ct_82c100_out(uint16_t port, uint8_t val, void *priv) { ct_82c100_t *dev = (ct_82c100_t *) priv; if (port == 0x0022) { - dev->index = val; - dev->access = 1; + dev->index = val; + dev->access = 1; } else if (port == 0x0023) { - if (dev->access) { - switch (dev->index) { - /* INTERNAL CONFIGURATION/CONTROL REGISTERS */ - case 0x40: - dev->regs[0x40] = val & 0xc7; - /* TODO: Clock stuff - needs CPU speed change functionality that's - going to be implemented in 86box v4.0. - Bit 0 is 0 for 8088/V20 and 1 for 8086/V30. */ - break; - case 0x41: - dev->regs[0x41] = val & 0xed; - /* TODO: Where is the Software Reset Function that's enabled by - setting bit 6 to 1? */ - break; - case 0x42: - dev->regs[0x42] = val & 0x01; - break; - case 0x43: - dev->regs[0x43] = val; - break; - case 0x44: - dev->regs[0x44] = val; - custom_nmi_vector = (custom_nmi_vector & 0xffffff00) | ((uint32_t) val); - break; - case 0x45: - dev->regs[0x45] = val; - custom_nmi_vector = (custom_nmi_vector & 0xffff00ff) | (((uint32_t) val) << 8); - break; - case 0x46: - dev->regs[0x46] = val; - custom_nmi_vector = (custom_nmi_vector & 0xff00ffff) | (((uint32_t) val) << 16); - break; - case 0x47: - dev->regs[0x47] = val; - custom_nmi_vector = (custom_nmi_vector & 0x00ffffff) | (((uint32_t) val) << 24); - break; - case 0x48: case 0x49: - dev->regs[dev->index] = val; - break; - case 0x4b: - dev->regs[0x4b] = val; - use_custom_nmi_vector = !!(val & 0x40); - break; - case 0x4c: - ct_82c100_log("CS4C: %02X\n", val); - dev->regs[0x4c] = val; - ct_82c100_ems_update(dev); - break; - } - dev->access = 0; - } + if (dev->access) { + switch (dev->index) { + /* INTERNAL CONFIGURATION/CONTROL REGISTERS */ + case 0x40: + dev->regs[0x40] = val & 0xc7; + /* TODO: Clock stuff - needs CPU speed change functionality that's + going to be implemented in 86box v4.0. + Bit 0 is 0 for 8088/V20 and 1 for 8086/V30. */ + break; + case 0x41: + dev->regs[0x41] = val & 0xed; + /* TODO: Where is the Software Reset Function that's enabled by + setting bit 6 to 1? */ + break; + case 0x42: + dev->regs[0x42] = val & 0x01; + break; + case 0x43: + dev->regs[0x43] = val; + break; + case 0x44: + dev->regs[0x44] = val; + custom_nmi_vector = (custom_nmi_vector & 0xffffff00) | ((uint32_t) val); + break; + case 0x45: + dev->regs[0x45] = val; + custom_nmi_vector = (custom_nmi_vector & 0xffff00ff) | (((uint32_t) val) << 8); + break; + case 0x46: + dev->regs[0x46] = val; + custom_nmi_vector = (custom_nmi_vector & 0xff00ffff) | (((uint32_t) val) << 16); + break; + case 0x47: + dev->regs[0x47] = val; + custom_nmi_vector = (custom_nmi_vector & 0x00ffffff) | (((uint32_t) val) << 24); + break; + case 0x48: + case 0x49: + dev->regs[dev->index] = val; + break; + case 0x4b: + dev->regs[0x4b] = val; + use_custom_nmi_vector = !!(val & 0x40); + break; + case 0x4c: + ct_82c100_log("CS4C: %02X\n", val); + dev->regs[0x4c] = val; + ct_82c100_ems_update(dev); + break; + } + dev->access = 0; + } } else if (port == 0x72) - dev->regs[0x72] = val & 0x7e; + dev->regs[0x72] = val & 0x7e; else if (port == 0x7e) - dev->regs[0x7e] = val; + dev->regs[0x7e] = val; else if (port == 0x7f) { - /* Bit 3 is Software Controlled Reset, asserted if set. Will be - done in the feature/machine_and_kb branch using hardresetx86(). */ - dev->regs[0x7f] = val; - if ((dev->regs[0x41] & 0x40) && (val & 0x08)) { - softresetx86(); - cpu_set_edx(); - ct_82c100_reset(dev); - } + /* Bit 3 is Software Controlled Reset, asserted if set. Will be + done in the feature/machine_and_kb branch using hardresetx86(). */ + dev->regs[0x7f] = val; + if ((dev->regs[0x41] & 0x40) && (val & 0x08)) { + softresetx86(); + cpu_set_edx(); + ct_82c100_reset(dev); + } } } - static uint8_t ct_82c100_in(uint16_t port, void *priv) { ct_82c100_t *dev = (ct_82c100_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (port == 0x0022) - ret = dev->index; + ret = dev->index; else if (port == 0x0023) { - if (dev->access) { - switch (dev->index) { - /* INTERNAL CONFIGURATION/CONTROL REGISTERS */ - case 0x40 ... 0x49: - case 0x4b: case 0x4c: - ret = dev->regs[dev->index]; - break; - } - dev->access = 0; - } + if (dev->access) { + switch (dev->index) { + /* INTERNAL CONFIGURATION/CONTROL REGISTERS */ + case 0x40 ... 0x49: + case 0x4b: + case 0x4c: + ret = dev->regs[dev->index]; + break; + } + dev->access = 0; + } } else if (port == 0x72) - ret = dev->regs[0x72]; + ret = dev->regs[0x72]; else if (port == 0x7e) - ret = dev->regs[0x7e]; + ret = dev->regs[0x7e]; else if (port == 0x7f) - ret = dev->regs[0x7f]; + ret = dev->regs[0x7f]; return ret; } - static uint8_t mem_read_emsb(uint32_t addr, void *priv) { - ems_page_t *page = (ems_page_t *)priv; - uint8_t ret = 0xff; + ems_page_t *page = (ems_page_t *) priv; + uint8_t ret = 0xff; #ifdef ENABLE_CT_82C100_LOG uint32_t old_addr = addr; #endif addr = addr - page->virt + page->phys; - if (addr < ((uint32_t)mem_size << 10)) - ret = ram[addr]; + if (addr < ((uint32_t) mem_size << 10)) + ret = ram[addr]; ct_82c100_log("mem_read_emsb(%08X = %08X): %02X\n", old_addr, addr, ret); return ret; } - static uint16_t mem_read_emsw(uint32_t addr, void *priv) { - ems_page_t *page = (ems_page_t *)priv; - uint16_t ret = 0xffff; + ems_page_t *page = (ems_page_t *) priv; + uint16_t ret = 0xffff; #ifdef ENABLE_CT_82C100_LOG uint32_t old_addr = addr; #endif addr = addr - page->virt + page->phys; - if (addr < ((uint32_t)mem_size << 10)) - ret = *(uint16_t *)&ram[addr]; + if (addr < ((uint32_t) mem_size << 10)) + ret = *(uint16_t *) &ram[addr]; ct_82c100_log("mem_read_emsw(%08X = %08X): %04X\n", old_addr, addr, ret); return ret; } - static void mem_write_emsb(uint32_t addr, uint8_t val, void *priv) { - ems_page_t *page = (ems_page_t *)priv; + ems_page_t *page = (ems_page_t *) priv; #ifdef ENABLE_CT_82C100_LOG uint32_t old_addr = addr; #endif addr = addr - page->virt + page->phys; - if (addr < ((uint32_t)mem_size << 10)) - ram[addr] = val; + if (addr < ((uint32_t) mem_size << 10)) + ram[addr] = val; ct_82c100_log("mem_write_emsb(%08X = %08X, %02X)\n", old_addr, addr, val); } - static void mem_write_emsw(uint32_t addr, uint16_t val, void *priv) { - ems_page_t *page = (ems_page_t *)priv; + ems_page_t *page = (ems_page_t *) priv; #ifdef ENABLE_CT_82C100_LOG uint32_t old_addr = addr; #endif addr = addr - page->virt + page->phys; - if (addr < ((uint32_t)mem_size << 10)) - *(uint16_t *)&ram[addr] = val; + if (addr < ((uint32_t) mem_size << 10)) + *(uint16_t *) &ram[addr] = val; ct_82c100_log("mem_write_emsw(%08X = %08X, %04X)\n", old_addr, addr, val); } - static void ct_82c100_close(void *priv) { @@ -361,51 +347,49 @@ ct_82c100_close(void *priv) free(dev); } - static void * ct_82c100_init(const device_t *info) { ct_82c100_t *dev; - uint32_t i; + uint32_t i; - dev = (ct_82c100_t *)malloc(sizeof(ct_82c100_t)); + dev = (ct_82c100_t *) malloc(sizeof(ct_82c100_t)); memset(dev, 0x00, sizeof(ct_82c100_t)); ct_82c100_reset(dev); io_sethandler(0x0022, 2, - ct_82c100_in, NULL, NULL, ct_82c100_out, NULL, NULL, dev); + ct_82c100_in, NULL, NULL, ct_82c100_out, NULL, NULL, dev); io_sethandler(0x0072, 1, - ct_82c100_in, NULL, NULL, ct_82c100_out, NULL, NULL, dev); + ct_82c100_in, NULL, NULL, ct_82c100_out, NULL, NULL, dev); io_sethandler(0x007e, 2, - ct_82c100_in, NULL, NULL, ct_82c100_out, NULL, NULL, dev); + ct_82c100_in, NULL, NULL, ct_82c100_out, NULL, NULL, dev); for (i = 0; i < 4; i++) { - mem_mapping_add(&(dev->ems_mappings[i]), (i + 28) << 14, 0x04000, - mem_read_emsb, mem_read_emsw, NULL, - mem_write_emsb, mem_write_emsw, NULL, - ram + 0xa0000 + (i << 14), MEM_MAPPING_INTERNAL, &dev->ems_pages[i]); - mem_mapping_disable(&(dev->ems_mappings[i])); + mem_mapping_add(&(dev->ems_mappings[i]), (i + 28) << 14, 0x04000, + mem_read_emsb, mem_read_emsw, NULL, + mem_write_emsb, mem_write_emsw, NULL, + ram + 0xa0000 + (i << 14), MEM_MAPPING_INTERNAL, &dev->ems_pages[i]); + mem_mapping_disable(&(dev->ems_mappings[i])); } mem_mapping_disable(&ram_mid_mapping); device_add(&port_92_device); - return(dev); + return (dev); } - const device_t ct_82c100_device = { - .name = "C&T 82C100", + .name = "C&T 82C100", .internal_name = "ct_82c100", - .flags = 0, - .local = 0, - .init = ct_82c100_init, - .close = ct_82c100_close, - .reset = ct_82c100_reset, + .flags = 0, + .local = 0, + .init = ct_82c100_init, + .close = ct_82c100_close, + .reset = ct_82c100_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/acc2168.c b/src/chipset/acc2168.c index 9b8865784..aa3921d71 100644 --- a/src/chipset/acc2168.c +++ b/src/chipset/acc2168.c @@ -32,11 +32,11 @@ #include <86box/port_92.h> #include <86box/chipset.h> -#define ENABLED_SHADOW (MEM_READ_INTERNAL | ((dev->regs[0x02] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL)) +#define ENABLED_SHADOW (MEM_READ_INTERNAL | ((dev->regs[0x02] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL)) #define DISABLED_SHADOW (MEM_READ_EXTANY | MEM_WRITE_EXTANY) -#define SHADOW_ADDR ((i <= 1) ? (0xc0000 + (i << 15)) : (0xd0000 + ((i - 2) << 16))) -#define SHADOW_SIZE ((i <= 1) ? 0x8000 : 0x10000) -#define SHADOW_RECALC ((dev->regs[0x02] & (1 << i)) ? ENABLED_SHADOW : DISABLED_SHADOW) +#define SHADOW_ADDR ((i <= 1) ? (0xc0000 + (i << 15)) : (0xd0000 + ((i - 2) << 16))) +#define SHADOW_SIZE ((i <= 1) ? 0x8000 : 0x10000) +#define SHADOW_RECALC ((dev->regs[0x02] & (1 << i)) ? ENABLED_SHADOW : DISABLED_SHADOW) #ifdef ENABLE_ACC2168_LOG int acc2168_do_log = ENABLE_ACC2168_LOG; @@ -46,17 +46,16 @@ acc2168_log(const char *fmt, ...) va_list ap; if (acc2168_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define acc2168_log(fmt, ...) +# define acc2168_log(fmt, ...) #endif -typedef struct acc2168_t -{ +typedef struct acc2168_t { uint8_t reg_idx, regs[256]; } acc2168_t; @@ -70,104 +69,101 @@ acc2168_shadow_recalc(acc2168_t *dev) static void acc2168_write(uint16_t addr, uint8_t val, void *p) { - acc2168_t *dev = (acc2168_t *)p; + acc2168_t *dev = (acc2168_t *) p; - switch (addr) - { - case 0xf2: - dev->reg_idx = val; - break; - case 0xf3: - acc2168_log("ACC2168: dev->regs[%02x] = %02x\n", dev->reg_idx, val); - switch (dev->reg_idx) - { - case 0x00: - dev->regs[dev->reg_idx] = val; + switch (addr) { + case 0xf2: + dev->reg_idx = val; break; + case 0xf3: + acc2168_log("ACC2168: dev->regs[%02x] = %02x\n", dev->reg_idx, val); + switch (dev->reg_idx) { + case 0x00: + dev->regs[dev->reg_idx] = val; + break; - case 0x01: - dev->regs[dev->reg_idx] = val & 0xd3; - cpu_update_waitstates(); + case 0x01: + dev->regs[dev->reg_idx] = val & 0xd3; + cpu_update_waitstates(); + break; + + case 0x02: + dev->regs[dev->reg_idx] = val & 0x7f; + acc2168_shadow_recalc(dev); + break; + + case 0x03: + dev->regs[dev->reg_idx] = val & 0x1f; + break; + + case 0x04: + dev->regs[dev->reg_idx] = val; + cpu_cache_ext_enabled = !!(val & 0x01); + cpu_update_waitstates(); + break; + + case 0x05: + dev->regs[dev->reg_idx] = val & 0xf3; + break; + + case 0x06: + case 0x07: + dev->regs[dev->reg_idx] = val & 0x1f; + break; + + case 0x08: + dev->regs[dev->reg_idx] = val & 0x0f; + break; + + case 0x09: + dev->regs[dev->reg_idx] = val & 0x03; + break; + + case 0x0a: + case 0x0b: + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: + case 0x10: + case 0x11: + dev->regs[dev->reg_idx] = val; + break; + + case 0x12: + dev->regs[dev->reg_idx] = val & 0xbb; + break; + + case 0x18: + dev->regs[dev->reg_idx] = val & 0x77; + break; + + case 0x19: + dev->regs[dev->reg_idx] = val & 0xfb; + break; + + case 0x1a: + dev->regs[dev->reg_idx] = val; + cpu_cache_int_enabled = !(val & 0x40); + cpu_update_waitstates(); + break; + + case 0x1b: + dev->regs[dev->reg_idx] = val & 0xef; + break; + + default: /* ACC 2168 has way more registers which we haven't documented */ + dev->regs[dev->reg_idx] = val; + break; + } break; - - case 0x02: - dev->regs[dev->reg_idx] = val & 0x7f; - acc2168_shadow_recalc(dev); - break; - - case 0x03: - dev->regs[dev->reg_idx] = val & 0x1f; - break; - - case 0x04: - dev->regs[dev->reg_idx] = val; - cpu_cache_ext_enabled = !!(val & 0x01); - cpu_update_waitstates(); - break; - - case 0x05: - dev->regs[dev->reg_idx] = val & 0xf3; - break; - - case 0x06: - case 0x07: - dev->regs[dev->reg_idx] = val & 0x1f; - break; - - case 0x08: - dev->regs[dev->reg_idx] = val & 0x0f; - break; - - case 0x09: - dev->regs[dev->reg_idx] = val & 0x03; - break; - - case 0x0a: - case 0x0b: - case 0x0c: - case 0x0d: - case 0x0e: - case 0x0f: - case 0x10: - case 0x11: - dev->regs[dev->reg_idx] = val; - break; - - case 0x12: - dev->regs[dev->reg_idx] = val & 0xbb; - break; - - case 0x18: - dev->regs[dev->reg_idx] = val & 0x77; - break; - - case 0x19: - dev->regs[dev->reg_idx] = val & 0xfb; - break; - - case 0x1a: - dev->regs[dev->reg_idx] = val; - cpu_cache_int_enabled = !(val & 0x40); - cpu_update_waitstates(); - break; - - case 0x1b: - dev->regs[dev->reg_idx] = val & 0xef; - break; - - default: /* ACC 2168 has way more registers which we haven't documented */ - dev->regs[dev->reg_idx] = val; - break; - - } - break; } } static uint8_t acc2168_read(uint16_t addr, void *p) { - acc2168_t *dev = (acc2168_t *)p; + acc2168_t *dev = (acc2168_t *) p; return (addr == 0xf3) ? dev->regs[dev->reg_idx] : dev->reg_idx; } @@ -175,7 +171,7 @@ acc2168_read(uint16_t addr, void *p) static void acc2168_close(void *priv) { - acc2168_t *dev = (acc2168_t *)priv; + acc2168_t *dev = (acc2168_t *) priv; free(dev); } @@ -183,7 +179,7 @@ acc2168_close(void *priv) static void * acc2168_init(const device_t *info) { - acc2168_t *dev = (acc2168_t *)malloc(sizeof(acc2168_t)); + acc2168_t *dev = (acc2168_t *) malloc(sizeof(acc2168_t)); memset(dev, 0, sizeof(acc2168_t)); device_add(&port_92_device); @@ -193,15 +189,15 @@ acc2168_init(const device_t *info) } const device_t acc2168_device = { - .name = "ACC 2046/2168", + .name = "ACC 2046/2168", .internal_name = "acc2168", - .flags = 0, - .local = 0, - .init = acc2168_init, - .close = acc2168_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = acc2168_init, + .close = acc2168_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/ali1429.c b/src/chipset/ali1429.c index 468ed4f00..68ffd9fe0 100644 --- a/src/chipset/ali1429.c +++ b/src/chipset/ali1429.c @@ -64,12 +64,12 @@ Register 20h: Bits 2-1-0: Bus Clock Speed 0 0 0: 7.1519Mhz (ATCLK2) - 0 0 1: CLK2IN/4 - 0 1 0: CLK2IN/5 - 0 1 1: CLK2IN/6 - 1 0 0: CLK2IN/8 - 1 0 1: CLK2IN/10 - 1 1 0: CLK2IN/12 + 0 0 1: CLK2IN/4 + 0 1 0: CLK2IN/5 + 0 1 1: CLK2IN/6 + 1 0 0: CLK2IN/8 + 1 0 1: CLK2IN/10 + 1 1 0: CLK2IN/12 */ @@ -94,13 +94,11 @@ #include <86box/smram.h> #include <86box/chipset.h> -#define GREEN dev->is_g /* Is G Variant */ - +#define GREEN dev->is_g /* Is G Variant */ #ifdef ENABLE_ALI1429_LOG int ali1429_do_log = ENABLE_ALI1429_LOG; - static void ali1429_log(const char *fmt, ...) { @@ -113,27 +111,25 @@ ali1429_log(const char *fmt, ...) } } #else -#define ali1429_log(fmt, ...) +# define ali1429_log(fmt, ...) #endif - typedef struct { - uint8_t is_g, index, cfg_locked, reg_57h, - regs[90]; + uint8_t is_g, index, cfg_locked, reg_57h, + regs[90]; } ali1429_t; - static void ali1429_shadow_recalc(ali1429_t *dev) { uint32_t base, i, can_write, can_read; - shadowbios = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x01); + shadowbios = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x01); shadowbios_write = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x02); can_write = (dev->regs[0x14] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; - can_read = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + can_read = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; for (i = 0; i < 8; i++) { base = 0xc0000 + (i << 15); @@ -147,147 +143,149 @@ ali1429_shadow_recalc(ali1429_t *dev) flushmmucache_nopc(); } - static void ali1429_write(uint16_t addr, uint8_t val, void *priv) { - ali1429_t *dev = (ali1429_t *)priv; + ali1429_t *dev = (ali1429_t *) priv; switch (addr) { - case 0x22: - dev->index = val; - break; + case 0x22: + dev->index = val; + break; - case 0x23: + case 0x23: #ifdef ENABLE_ALI1429_LOG - if (dev->index != 0x03) - ali1429_log("M1429: dev->regs[%02x] = %02x\n", dev->index, val); + if (dev->index != 0x03) + ali1429_log("M1429: dev->regs[%02x] = %02x\n", dev->index, val); #endif - if (dev->index == 0x03) - dev->cfg_locked = !(val == 0xc5); + if (dev->index == 0x03) + dev->cfg_locked = !(val == 0xc5); - if (!dev->cfg_locked) { - /* Common M1429 Registers */ - switch (dev->index) { - case 0x10: case 0x11: - dev->regs[dev->index] = val; - break; + if (!dev->cfg_locked) { + /* Common M1429 Registers */ + switch (dev->index) { + case 0x10: + case 0x11: + dev->regs[dev->index] = val; + break; - case 0x12: - dev->regs[dev->index] = val; - if(val & 4) - mem_remap_top(128); - else - mem_remap_top(0); - break; + case 0x12: + dev->regs[dev->index] = val; + if (val & 4) + mem_remap_top(128); + else + mem_remap_top(0); + break; - case 0x13: case 0x14: - dev->regs[dev->index] = val; - ali1429_shadow_recalc(dev); - break; + case 0x13: + case 0x14: + dev->regs[dev->index] = val; + ali1429_shadow_recalc(dev); + break; - case 0x15: case 0x16: - case 0x17: - dev->regs[dev->index] = val; - break; + case 0x15: + case 0x16: + case 0x17: + dev->regs[dev->index] = val; + break; - case 0x18: - dev->regs[dev->index] = (val & 0x8f) | 0x20; - cpu_cache_ext_enabled = !!(val & 2); - cpu_update_waitstates(); - break; + case 0x18: + dev->regs[dev->index] = (val & 0x8f) | 0x20; + cpu_cache_ext_enabled = !!(val & 2); + cpu_update_waitstates(); + break; - case 0x19: case 0x1a: - case 0x1e: - dev->regs[dev->index] = val; - break; + case 0x19: + case 0x1a: + case 0x1e: + dev->regs[dev->index] = val; + break; - case 0x20: - dev->regs[dev->index] = val; + case 0x20: + dev->regs[dev->index] = val; - switch(val & 7) { - case 0: case 7: /* Illegal */ - cpu_set_isa_speed(7159091); - break; + switch (val & 7) { + case 0: + case 7: /* Illegal */ + cpu_set_isa_speed(7159091); + break; - case 1: - cpu_set_isa_speed(cpu_busspeed / 4); - break; + case 1: + cpu_set_isa_speed(cpu_busspeed / 4); + break; - case 2: - cpu_set_isa_speed(cpu_busspeed / 5); - break; + case 2: + cpu_set_isa_speed(cpu_busspeed / 5); + break; - case 3: - cpu_set_isa_speed(cpu_busspeed / 6); - break; + case 3: + cpu_set_isa_speed(cpu_busspeed / 6); + break; - case 4: - cpu_set_isa_speed(cpu_busspeed / 8); - break; + case 4: + cpu_set_isa_speed(cpu_busspeed / 8); + break; - case 5: - cpu_set_isa_speed(cpu_busspeed / 10); - break; + case 5: + cpu_set_isa_speed(cpu_busspeed / 10); + break; - case 6: - cpu_set_isa_speed(cpu_busspeed / 12); - break; - } - break; + case 6: + cpu_set_isa_speed(cpu_busspeed / 12); + break; + } + break; - case 0x21 ... 0x27: - dev->regs[dev->index] = val; - break; - } + case 0x21 ... 0x27: + dev->regs[dev->index] = val; + break; + } - /* M1429G Only Registers */ - if (GREEN) { - switch (dev->index) { - case 0x30 ... 0x41: - case 0x43: case 0x45: - case 0x4a: - dev->regs[dev->index] = val; - break; + /* M1429G Only Registers */ + if (GREEN) { + switch (dev->index) { + case 0x30 ... 0x41: + case 0x43: + case 0x45: + case 0x4a: + dev->regs[dev->index] = val; + break; - case 0x57: - dev->reg_57h = val; - break; - } - } - } - break; + case 0x57: + dev->reg_57h = val; + break; + } + } + } + break; } } - static uint8_t ali1429_read(uint16_t addr, void *priv) { - ali1429_t *dev = (ali1429_t *)priv; - uint8_t ret = 0xff; + ali1429_t *dev = (ali1429_t *) priv; + uint8_t ret = 0xff; if ((addr == 0x23) && (dev->index >= 0x10) && (dev->index <= 0x4a)) - ret = dev->regs[dev->index]; + ret = dev->regs[dev->index]; else if ((addr == 0x23) && (dev->index == 0x57)) - ret = dev->reg_57h; + ret = dev->reg_57h; else if (addr == 0x22) - ret = dev->index; + ret = dev->index; return ret; } - static void ali1429_close(void *priv) { - ali1429_t *dev = (ali1429_t *)priv; + ali1429_t *dev = (ali1429_t *) priv; free(dev); } - static void ali1429_defaults(ali1429_t *dev) { @@ -306,28 +304,27 @@ ali1429_defaults(ali1429_t *dev) /* M1429G Default Registers */ if (GREEN) { - dev->regs[0x31] = 0x88; - dev->regs[0x32] = 0xc0; - dev->regs[0x38] = 0xe5; - dev->regs[0x40] = 0xe3; - dev->regs[0x41] = 2; - dev->regs[0x45] = 0x80; + dev->regs[0x31] = 0x88; + dev->regs[0x32] = 0xc0; + dev->regs[0x38] = 0xe5; + dev->regs[0x40] = 0xe3; + dev->regs[0x41] = 2; + dev->regs[0x45] = 0x80; } } - static void * ali1429_init(const device_t *info) { - ali1429_t *dev = (ali1429_t *)malloc(sizeof(ali1429_t)); + ali1429_t *dev = (ali1429_t *) malloc(sizeof(ali1429_t)); memset(dev, 0, sizeof(ali1429_t)); dev->cfg_locked = 1; - GREEN = info->local; + GREEN = info->local; /* M1429 Ports: - 22h Index Port - 23h Data Port + 22h Index Port + 23h Data Port */ io_sethandler(0x0022, 0x0002, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev); @@ -339,29 +336,29 @@ ali1429_init(const device_t *info) } const device_t ali1429_device = { - .name = "ALi M1429", + .name = "ALi M1429", .internal_name = "ali1429", - .flags = 0, - .local = 0, - .init = ali1429_init, - .close = ali1429_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = ali1429_init, + .close = ali1429_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ali1429g_device = { - .name = "ALi M1429G", + .name = "ALi M1429G", .internal_name = "ali1429g", - .flags = 0, - .local = 1, - .init = ali1429_init, - .close = ali1429_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = ali1429_init, + .close = ali1429_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/ali1489.c b/src/chipset/ali1489.c index da6ff39cc..c71b3e46d 100644 --- a/src/chipset/ali1489.c +++ b/src/chipset/ali1489.c @@ -40,10 +40,8 @@ #include <86box/chipset.h> - #define DEFINE_SHADOW_PROCEDURE (((dev->regs[0x14] & 0x10) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x14] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY)) -#define DISABLED_SHADOW (MEM_READ_EXTANY | MEM_WRITE_EXTANY) - +#define DISABLED_SHADOW (MEM_READ_EXTANY | MEM_WRITE_EXTANY) #ifdef ENABLE_ALI1489_LOG int ali1489_do_log = ENABLE_ALI1489_LOG; @@ -52,30 +50,26 @@ ali1489_log(const char *fmt, ...) { va_list ap; - if (ali1489_do_log) - { + if (ali1489_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define ali1489_log(fmt, ...) +# define ali1489_log(fmt, ...) #endif - typedef struct { - uint8_t index, ide_index, ide_chip_id, pci_slot, - regs[256], pci_conf[256], ide_regs[256]; + uint8_t index, ide_index, ide_chip_id, pci_slot, + regs[256], pci_conf[256], ide_regs[256]; - port_92_t * port_92; - smram_t * smram; + port_92_t *port_92; + smram_t *smram; } ali1489_t; - -static void ali1489_ide_handler(ali1489_t *dev); - +static void ali1489_ide_handler(ali1489_t *dev); static void ali1489_shadow_recalc(ali1489_t *dev) @@ -85,33 +79,32 @@ ali1489_shadow_recalc(ali1489_t *dev) shadowbios = shadowbios_write = 0; for (i = 0; i < 8; i++) { - if (dev->regs[0x13] & (1 << i)) { - ali1489_log("%06Xh-%06Xh region shadow enabled: read = %i, write = %i\n", - 0xc0000 + (i << 14), 0xc3fff + (i << 14), !!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20)); - mem_set_mem_state_both(0xc0000 + (i << 14), 0x4000, DEFINE_SHADOW_PROCEDURE); - } else { - ali1489_log("%06Xh-%06Xh region shadow disabled\n", 0xc0000 + (i << 14), 0xc3fff + (i << 14)); - mem_set_mem_state_both(0xc0000 + (i << 14), 0x4000, DISABLED_SHADOW); - } + if (dev->regs[0x13] & (1 << i)) { + ali1489_log("%06Xh-%06Xh region shadow enabled: read = %i, write = %i\n", + 0xc0000 + (i << 14), 0xc3fff + (i << 14), !!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20)); + mem_set_mem_state_both(0xc0000 + (i << 14), 0x4000, DEFINE_SHADOW_PROCEDURE); + } else { + ali1489_log("%06Xh-%06Xh region shadow disabled\n", 0xc0000 + (i << 14), 0xc3fff + (i << 14)); + mem_set_mem_state_both(0xc0000 + (i << 14), 0x4000, DISABLED_SHADOW); + } } for (i = 0; i < 4; i++) { if (dev->regs[0x14] & (1 << i)) { - ali1489_log("%06Xh-%06Xh region shadow enabled: read = %i, write = %i\n", - 0xe0000 + (i << 15), 0xe7fff + (i << 15), !!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20)); - mem_set_mem_state_both(0xe0000 + (i << 15), 0x8000, DEFINE_SHADOW_PROCEDURE); - shadowbios |= !!(dev->regs[0x14] & 0x10); - shadowbios_write |= !!(dev->regs[0x14] & 0x20); + ali1489_log("%06Xh-%06Xh region shadow enabled: read = %i, write = %i\n", + 0xe0000 + (i << 15), 0xe7fff + (i << 15), !!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20)); + mem_set_mem_state_both(0xe0000 + (i << 15), 0x8000, DEFINE_SHADOW_PROCEDURE); + shadowbios |= !!(dev->regs[0x14] & 0x10); + shadowbios_write |= !!(dev->regs[0x14] & 0x20); } else { - ali1489_log("%06Xh-%06Xh region shadow disabled\n", 0xe0000 + (i << 15), 0xe7fff + (i << 15)); - mem_set_mem_state_both(0xe0000 + (i << 15), 0x8000, DISABLED_SHADOW); - } + ali1489_log("%06Xh-%06Xh region shadow disabled\n", 0xe0000 + (i << 15), 0xe7fff + (i << 15)); + mem_set_mem_state_both(0xe0000 + (i << 15), 0x8000, DISABLED_SHADOW); + } } flushmmucache_nopc(); } - static void ali1489_smram_recalc(ali1489_t *dev) { @@ -120,27 +113,26 @@ ali1489_smram_recalc(ali1489_t *dev) smram_disable(dev->smram); switch (dev->regs[0x19] & 0x30) { - case 0x10: - smram_enable(dev->smram, 0xa0000, 0xa0000, 0x20000, (dev->regs[0x19] & 0x08), 1); - break; - case 0x20: - smram_enable(dev->smram, 0xe0000, 0xe0000, 0x10000, (dev->regs[0x19] & 0x08), 1); - break; - case 0x30: - if ((dev->regs[0x35] & 0xc0) == 0x80) - smram_enable(dev->smram, 0x68000, 0xa8000, 0x08000, (dev->regs[0x19] & 0x08), 1); - else - smram_enable(dev->smram, 0x38000, 0xa8000, 0x08000, (dev->regs[0x19] & 0x08), 1); - break; + case 0x10: + smram_enable(dev->smram, 0xa0000, 0xa0000, 0x20000, (dev->regs[0x19] & 0x08), 1); + break; + case 0x20: + smram_enable(dev->smram, 0xe0000, 0xe0000, 0x10000, (dev->regs[0x19] & 0x08), 1); + break; + case 0x30: + if ((dev->regs[0x35] & 0xc0) == 0x80) + smram_enable(dev->smram, 0x68000, 0xa8000, 0x08000, (dev->regs[0x19] & 0x08), 1); + else + smram_enable(dev->smram, 0x38000, 0xa8000, 0x08000, (dev->regs[0x19] & 0x08), 1); + break; } if ((dev->regs[0x19] & 0x31) == 0x11) { - /* If SMRAM is enabled and bit 0 is set, code still goes to DRAM. */ - mem_set_mem_state_smram_ex(1, 0xa0000, 0x20000, 0x02); + /* If SMRAM is enabled and bit 0 is set, code still goes to DRAM. */ + mem_set_mem_state_smram_ex(1, 0xa0000, 0x20000, 0x02); } } - static void ali1489_defaults(ali1489_t *dev) { @@ -197,9 +189,9 @@ ali1489_defaults(ali1489_t *dev) picintc(1 << 10); picintc(1 << 15); - nmi = 0; + nmi = 0; smi_line = 0; - in_smm = 0; + in_smm = 0; pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED); pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED); @@ -209,214 +201,212 @@ ali1489_defaults(ali1489_t *dev) ali1489_ide_handler(dev); } - static void ali1489_write(uint16_t addr, uint8_t val, void *priv) { - ali1489_t *dev = (ali1489_t *)priv; - uint8_t old, irq; + ali1489_t *dev = (ali1489_t *) priv; + uint8_t old, irq; const uint8_t irq_array[16] = { 0, 3, 4, 7, 0, 0, 0, 0, 9, 10, 5, 6, 11, 12, 14, 15 }; switch (addr) { - case 0x22: - dev->index = val; - break; - case 0x23: - /* Check if the configuration registers are unlocked */ - if (dev->regs[0x03] == 0xc5) { - switch (dev->index) { - case 0x03: /* Lock Register */ - case 0x10: /* DRAM Configuration Register I */ - case 0x11: /* DRAM Configuration Register II */ - case 0x12: /* ROM Function Register */ - dev->regs[dev->index] = val; - break; + case 0x22: + dev->index = val; + break; + case 0x23: + /* Check if the configuration registers are unlocked */ + if (dev->regs[0x03] == 0xc5) { + switch (dev->index) { + case 0x03: /* Lock Register */ + case 0x10: /* DRAM Configuration Register I */ + case 0x11: /* DRAM Configuration Register II */ + case 0x12: /* ROM Function Register */ + dev->regs[dev->index] = val; + break; - case 0x13: /* Shadow Region Register */ - case 0x14: /* Shadow Control Register */ - if (dev->index == 0x14) - dev->regs[dev->index] = (val & 0xbf); - else - dev->regs[dev->index] = val; + case 0x13: /* Shadow Region Register */ + case 0x14: /* Shadow Control Register */ + if (dev->index == 0x14) + dev->regs[dev->index] = (val & 0xbf); + else + dev->regs[dev->index] = val; - ali1489_shadow_recalc(dev); - ali1489_smram_recalc(dev); - break; + ali1489_shadow_recalc(dev); + ali1489_smram_recalc(dev); + break; - case 0x15: /* Cycle Check Point Control Register */ - dev->regs[dev->index] = (val & 0xf1); - break; + case 0x15: /* Cycle Check Point Control Register */ + dev->regs[dev->index] = (val & 0xf1); + break; - case 0x16: /* Cache Control Register I */ - dev->regs[dev->index] = val; - cpu_cache_int_enabled = (val & 0x01); - cpu_cache_ext_enabled = (val & 0x02); - cpu_update_waitstates(); - break; - case 0x17: /* Cache Control Register II */ - dev->regs[dev->index] = val; - break; + case 0x16: /* Cache Control Register I */ + dev->regs[dev->index] = val; + cpu_cache_int_enabled = (val & 0x01); + cpu_cache_ext_enabled = (val & 0x02); + cpu_update_waitstates(); + break; + case 0x17: /* Cache Control Register II */ + dev->regs[dev->index] = val; + break; - case 0x19: /* SMM Control Register */ - dev->regs[dev->index] = val; - ali1489_smram_recalc(dev); - break; + case 0x19: /* SMM Control Register */ + dev->regs[dev->index] = val; + ali1489_smram_recalc(dev); + break; - case 0x1a: /* EDO DRAM Configuration Register */ - case 0x1b: /* DRAM Timing Control Register */ - dev->regs[dev->index] = val; - break; - case 0x1c: /* Memory Data Buffer Direction Control Register */ - dev->regs[dev->index] = val & 0x1f; - break; + case 0x1a: /* EDO DRAM Configuration Register */ + case 0x1b: /* DRAM Timing Control Register */ + dev->regs[dev->index] = val; + break; + case 0x1c: /* Memory Data Buffer Direction Control Register */ + dev->regs[dev->index] = val & 0x1f; + break; - case 0x1e: /* Linear Wrapped Burst Order Mode Control Register */ - dev->regs[dev->index] = (val & 0x40); - break; + case 0x1e: /* Linear Wrapped Burst Order Mode Control Register */ + dev->regs[dev->index] = (val & 0x40); + break; - case 0x20: /* CPU to PCI Buffer Control Register */ - dev->regs[dev->index] = val; - break; - case 0x21: /* DEVSELJ Check Point Setting Register */ - dev->regs[dev->index] = (val & 0xbb) | 0x04; - break; - case 0x22: /* PCI to CPU W/R Buffer Configuration Register */ - dev->regs[dev->index] = (val & 0xfd); - break; + case 0x20: /* CPU to PCI Buffer Control Register */ + dev->regs[dev->index] = val; + break; + case 0x21: /* DEVSELJ Check Point Setting Register */ + dev->regs[dev->index] = (val & 0xbb) | 0x04; + break; + case 0x22: /* PCI to CPU W/R Buffer Configuration Register */ + dev->regs[dev->index] = (val & 0xfd); + break; - case 0x25: /* GP/MEM Address Definition Register I */ - case 0x26: /* GP/MEM Address Definition Register II */ - case 0x27: /* GP/MEM Address Definition Register III */ - dev->regs[dev->index] = val; - break; - case 0x28: /* PCI Arbiter Control Register */ - dev->regs[dev->index] = val & 0x3f; - break; + case 0x25: /* GP/MEM Address Definition Register I */ + case 0x26: /* GP/MEM Address Definition Register II */ + case 0x27: /* GP/MEM Address Definition Register III */ + dev->regs[dev->index] = val; + break; + case 0x28: /* PCI Arbiter Control Register */ + dev->regs[dev->index] = val & 0x3f; + break; - case 0x29: /* System Clock Register */ - dev->regs[dev->index] = val; + case 0x29: /* System Clock Register */ + dev->regs[dev->index] = val; - port_92_remove(dev->port_92); - if (val & 0x10) - port_92_add(dev->port_92); - break; + port_92_remove(dev->port_92); + if (val & 0x10) + port_92_add(dev->port_92); + break; - case 0x2a: /* I/O Recovery Register */ - dev->regs[dev->index] = val; - break; + case 0x2a: /* I/O Recovery Register */ + dev->regs[dev->index] = val; + break; - case 0x2b: /* Turbo Function Register */ - dev->regs[dev->index] = (val & 0xbf) | 0x40; - break; + case 0x2b: /* Turbo Function Register */ + dev->regs[dev->index] = (val & 0xbf) | 0x40; + break; - case 0x30: /* Power Management Unit Control Register */ - old = dev->regs[dev->index]; - dev->regs[dev->index] = val; + case 0x30: /* Power Management Unit Control Register */ + old = dev->regs[dev->index]; + dev->regs[dev->index] = val; - if (((val & 0x14) == 0x14) && !(old & 0x08) && (val & 0x08)) { - switch (dev->regs[0x35] & 0x30) { - case 0x00: - smi_raise(); - break; - case 0x10: - nmi_raise(); - break; - case 0x20: - picint(1 << 15); - break; - case 0x30: - picint(1 << 10); - break; - } - dev->regs[0x35] |= 0x0e; - } else if (!(val & 0x10)) - dev->regs[0x35] &= ~0x0f; - break; + if (((val & 0x14) == 0x14) && !(old & 0x08) && (val & 0x08)) { + switch (dev->regs[0x35] & 0x30) { + case 0x00: + smi_raise(); + break; + case 0x10: + nmi_raise(); + break; + case 0x20: + picint(1 << 15); + break; + case 0x30: + picint(1 << 10); + break; + } + dev->regs[0x35] |= 0x0e; + } else if (!(val & 0x10)) + dev->regs[0x35] &= ~0x0f; + break; - case 0x31: /* Mode Timer Monitoring Events Selection Register I */ - case 0x32: /* Mode Timer Monitoring Events Selection Register II */ - case 0x33: /* SMI Triggered Events Selection Register I */ - case 0x34: /* SMI Triggered Events Selection Register II */ - dev->regs[dev->index] = val; - break; + case 0x31: /* Mode Timer Monitoring Events Selection Register I */ + case 0x32: /* Mode Timer Monitoring Events Selection Register II */ + case 0x33: /* SMI Triggered Events Selection Register I */ + case 0x34: /* SMI Triggered Events Selection Register II */ + dev->regs[dev->index] = val; + break; - case 0x35: /* SMI Status Register */ - dev->regs[dev->index] = (dev->regs[dev->index] & 0x0f) | (val & 0xf0); - break; + case 0x35: /* SMI Status Register */ + dev->regs[dev->index] = (dev->regs[dev->index] & 0x0f) | (val & 0xf0); + break; - case 0x36: /* IRQ Channel Group Selected Control Register I */ - dev->regs[dev->index] = (val & 0xe5); - break; - case 0x37: /* IRQ Channel Group Selected Control Register II */ - dev->regs[dev->index] = (val & 0xef); - break; + case 0x36: /* IRQ Channel Group Selected Control Register I */ + dev->regs[dev->index] = (val & 0xe5); + break; + case 0x37: /* IRQ Channel Group Selected Control Register II */ + dev->regs[dev->index] = (val & 0xef); + break; - case 0x38: /* DRQ Channel Selected Control Register */ - case 0x39: /* Mode Timer Setting Register */ - case 0x3a: /* Input_device Timer Setting Register */ - case 0x3b: /* GP/MEM Timer Setting Register */ - case 0x3c: /* LED Flash Control Register */ - dev->regs[dev->index] = val; - break; + case 0x38: /* DRQ Channel Selected Control Register */ + case 0x39: /* Mode Timer Setting Register */ + case 0x3a: /* Input_device Timer Setting Register */ + case 0x3b: /* GP/MEM Timer Setting Register */ + case 0x3c: /* LED Flash Control Register */ + dev->regs[dev->index] = val; + break; - case 0x3d: /* Miscellaneous Register I */ - dev->regs[dev->index] = (val & 0x07); - break; + case 0x3d: /* Miscellaneous Register I */ + dev->regs[dev->index] = (val & 0x07); + break; - case 0x40: /* Clock Generator Control Feature Register */ - dev->regs[dev->index] = (val & 0x3f); - break; - case 0x41: /* Power Control Output Register */ - dev->regs[dev->index] = val; - break; + case 0x40: /* Clock Generator Control Feature Register */ + dev->regs[dev->index] = (val & 0x3f); + break; + case 0x41: /* Power Control Output Register */ + dev->regs[dev->index] = val; + break; - case 0x42: /* PCI INTx Routing Table Mapping Register I */ - irq = irq_array[val & 0x0f]; - pci_set_irq_routing(PCI_INTA, (irq != 0) ? irq : PCI_IRQ_DISABLED); - irq = irq_array[(val & 0xf0) >> 4]; - pci_set_irq_routing(PCI_INTB, (irq != 0) ? irq : PCI_IRQ_DISABLED); - break; + case 0x42: /* PCI INTx Routing Table Mapping Register I */ + irq = irq_array[val & 0x0f]; + pci_set_irq_routing(PCI_INTA, (irq != 0) ? irq : PCI_IRQ_DISABLED); + irq = irq_array[(val & 0xf0) >> 4]; + pci_set_irq_routing(PCI_INTB, (irq != 0) ? irq : PCI_IRQ_DISABLED); + break; - case 0x43: /* PCI INTx Routing Table Mapping Register II */ - irq = irq_array[val & 0x0f]; - pci_set_irq_routing(PCI_INTC, (irq != 0) ? irq : PCI_IRQ_DISABLED); - irq = irq_array[(val & 0xf0) >> 4]; - pci_set_irq_routing(PCI_INTD, (irq != 0) ? irq : PCI_IRQ_DISABLED); - break; + case 0x43: /* PCI INTx Routing Table Mapping Register II */ + irq = irq_array[val & 0x0f]; + pci_set_irq_routing(PCI_INTC, (irq != 0) ? irq : PCI_IRQ_DISABLED); + irq = irq_array[(val & 0xf0) >> 4]; + pci_set_irq_routing(PCI_INTD, (irq != 0) ? irq : PCI_IRQ_DISABLED); + break; - case 0x44: /* PCI INTx Sensitivity Register */ - /* TODO: When doing the IRQ and PCI IRQ rewrite, bits 0 to 3 toggle edge/level output. */ - dev->regs[dev->index] = val; - break; - } + case 0x44: /* PCI INTx Sensitivity Register */ + /* TODO: When doing the IRQ and PCI IRQ rewrite, bits 0 to 3 toggle edge/level output. */ + dev->regs[dev->index] = val; + break; + } - if (dev->index != 0x03) { - ali1489_log("M1489: dev->regs[%02x] = %02x\n", dev->index, val); - } - } else if (dev->index == 0x03) - dev->regs[dev->index] = val; + if (dev->index != 0x03) { + ali1489_log("M1489: dev->regs[%02x] = %02x\n", dev->index, val); + } + } else if (dev->index == 0x03) + dev->regs[dev->index] = val; - break; + break; } } - static uint8_t ali1489_read(uint16_t addr, void *priv) { - uint8_t ret = 0xff; - ali1489_t *dev = (ali1489_t *)priv; + uint8_t ret = 0xff; + ali1489_t *dev = (ali1489_t *) priv; switch (addr) { - case 0x23: - /* Avoid conflict with Cyrix CPU registers */ - if (((dev->index == 0x20) || (dev->index >= 0xc0)) && cpu_iscyrix) - ret = 0xff; - else if (dev->index == 0x3f) - ret = inb(0x70); - else - ret = dev->regs[dev->index]; - break; + case 0x23: + /* Avoid conflict with Cyrix CPU registers */ + if (((dev->index == 0x20) || (dev->index >= 0xc0)) && cpu_iscyrix) + ret = 0xff; + else if (dev->index == 0x3f) + ret = inb(0x70); + else + ret = dev->regs[dev->index]; + break; } ali1489_log("M1489: dev->regs[%02x] (%02x)\n", dev->index, ret); @@ -424,155 +414,147 @@ ali1489_read(uint16_t addr, void *priv) return ret; } - static void ali1489_pci_write(int func, int addr, uint8_t val, void *priv) { - ali1489_t *dev = (ali1489_t *)priv; + ali1489_t *dev = (ali1489_t *) priv; ali1489_log("M1489-PCI: dev->pci_conf[%02x] = %02x\n", addr, val); switch (addr) { - /* Dummy PCI Config */ - case 0x04: - dev->pci_conf[0x04] = val & 0x7f; - break; + /* Dummy PCI Config */ + case 0x04: + dev->pci_conf[0x04] = val & 0x7f; + break; - /* Dummy PCI Status */ - case 0x07: - dev->pci_conf[0x07] &= ~(val & 0xb8); - break; + /* Dummy PCI Status */ + case 0x07: + dev->pci_conf[0x07] &= ~(val & 0xb8); + break; } } - static uint8_t ali1489_pci_read(int func, int addr, void *priv) { - ali1489_t *dev = (ali1489_t *)priv; - uint8_t ret = 0xff; + ali1489_t *dev = (ali1489_t *) priv; + uint8_t ret = 0xff; ret = dev->pci_conf[addr]; ali1489_log("M1489-PCI: dev->pci_conf[%02x] (%02x)\n", addr, ret); return ret; } - static void ali1489_ide_handler(ali1489_t *dev) { ide_pri_disable(); ide_sec_disable(); if (dev->ide_regs[0x01] & 0x01) { - ide_pri_enable(); - if (!(dev->ide_regs[0x35] & 0x40)) - ide_sec_enable(); + ide_pri_enable(); + if (!(dev->ide_regs[0x35] & 0x40)) + ide_sec_enable(); } } - static void ali1489_ide_write(uint16_t addr, uint8_t val, void *priv) { - ali1489_t *dev = (ali1489_t *)priv; + ali1489_t *dev = (ali1489_t *) priv; - switch (addr) - { - case 0xf4: /* Usually it writes 30h here */ - dev->ide_chip_id = val; - break; + switch (addr) { + case 0xf4: /* Usually it writes 30h here */ + dev->ide_chip_id = val; + break; - case 0xf8: - dev->ide_index = val; - break; + case 0xf8: + dev->ide_index = val; + break; - case 0xfc: - if (dev->ide_chip_id != 0x30) - break; + case 0xfc: + if (dev->ide_chip_id != 0x30) + break; - switch(dev->ide_index) { - case 0x01: /* IDE Configuration Register */ - dev->ide_regs[dev->ide_index] = val & 0x8f; - ali1489_ide_handler(dev); - break; - case 0x02: /* DBA Data Byte Cative Count for IDE-1 */ - case 0x03: /* D0RA Disk 0 Read Active Count for IDE-1 */ - case 0x04: /* D0WA Disk 0 Write Active Count for IDE-1 */ - case 0x05: /* D1RA Disk 1 Read Active Count for IDE-1 */ - case 0x06: /* D1WA Disk 1 Write Active Count for IDE-1 */ - case 0x25: /* DBR Data Byte Recovery Count for IDE-1 */ - case 0x26: /* D0RR Disk 0 Read Byte Recovery Count for IDE-1 */ - case 0x27: /* D0WR Disk 0 Write Byte Recovery Count for IDE-1 */ - case 0x28: /* D1RR Disk 1 Read Byte Recovery Count for IDE-1 */ - case 0x29: /* D1WR Disk 1 Write Byte Recovery Count for IDE-1 */ - case 0x2a: /* DBA Data Byte Cative Count for IDE-2 */ - case 0x2b: /* D0RA Disk 0 Read Active Count for IDE-2 */ - case 0x2c: /* D0WA Disk 0 Write Active Count for IDE-2 */ - case 0x2d: /* D1RA Disk 1 Read Active Count for IDE-2 */ - case 0x2e: /* D1WA Disk 1 Write Active Count for IDE-2 */ - case 0x2f: /* DBR Data Byte Recovery Count for IDE-2 */ - case 0x30: /* D0RR Disk 0 Read Byte Recovery Count for IDE-2 */ - case 0x31: /* D0WR Disk 0 Write Byte Recovery Count for IDE-2 */ - case 0x32: /* D1RR Disk 1 Read Byte Recovery Count for IDE-2 */ - case 0x33: /* D1WR Disk 1 Write Byte Recovery Count for IDE-2 */ - dev->ide_regs[dev->ide_index] = val & 0x1f; - break; - case 0x07: /* Buffer Mode Register 1 */ - dev->ide_regs[dev->ide_index] = val; - break; - case 0x09: /* IDEPE1 IDE Port Enable Register 1 */ - dev->ide_regs[dev->ide_index] = val & 0xc3; - break; - case 0x0a: /* Buffer Mode Register 2 */ - dev->ide_regs[dev->ide_index] = val & 0x4f; - break; - case 0x0b: /* IDE Channel 1 Disk 0 Sector Byte Count Register 1 */ - case 0x0d: /* IDE Channel 1 Disk 1 Sector Byte Count Register 1 */ - case 0x0f: /* IDE Channel 2 Disk 0 Sector Byte Count Register 1 */ - case 0x11: /* IDE Channel 2 Disk 1 Sector Byte Count Register 1 */ - dev->ide_regs[dev->ide_index] = val & 0x03; - break; - case 0x0c: /* IDE Channel 1 Disk 0 Sector Byte Count Register 2 */ - case 0x0e: /* IDE Channel 1 Disk 1 Sector Byte Count Register 2 */ - case 0x10: /* IDE Channel 2 Disk 1 Sector Byte Count Register 2 */ - case 0x12: /* IDE Channel 2 Disk 1 Sector Byte Count Register 2 */ - dev->ide_regs[dev->ide_index] = val & 0x1f; - break; - case 0x35: /* IDEPE3 IDE Port Enable Register 3 */ - dev->ide_regs[dev->ide_index] = val; - ali1489_ide_handler(dev); - break; - } - break; + switch (dev->ide_index) { + case 0x01: /* IDE Configuration Register */ + dev->ide_regs[dev->ide_index] = val & 0x8f; + ali1489_ide_handler(dev); + break; + case 0x02: /* DBA Data Byte Cative Count for IDE-1 */ + case 0x03: /* D0RA Disk 0 Read Active Count for IDE-1 */ + case 0x04: /* D0WA Disk 0 Write Active Count for IDE-1 */ + case 0x05: /* D1RA Disk 1 Read Active Count for IDE-1 */ + case 0x06: /* D1WA Disk 1 Write Active Count for IDE-1 */ + case 0x25: /* DBR Data Byte Recovery Count for IDE-1 */ + case 0x26: /* D0RR Disk 0 Read Byte Recovery Count for IDE-1 */ + case 0x27: /* D0WR Disk 0 Write Byte Recovery Count for IDE-1 */ + case 0x28: /* D1RR Disk 1 Read Byte Recovery Count for IDE-1 */ + case 0x29: /* D1WR Disk 1 Write Byte Recovery Count for IDE-1 */ + case 0x2a: /* DBA Data Byte Cative Count for IDE-2 */ + case 0x2b: /* D0RA Disk 0 Read Active Count for IDE-2 */ + case 0x2c: /* D0WA Disk 0 Write Active Count for IDE-2 */ + case 0x2d: /* D1RA Disk 1 Read Active Count for IDE-2 */ + case 0x2e: /* D1WA Disk 1 Write Active Count for IDE-2 */ + case 0x2f: /* DBR Data Byte Recovery Count for IDE-2 */ + case 0x30: /* D0RR Disk 0 Read Byte Recovery Count for IDE-2 */ + case 0x31: /* D0WR Disk 0 Write Byte Recovery Count for IDE-2 */ + case 0x32: /* D1RR Disk 1 Read Byte Recovery Count for IDE-2 */ + case 0x33: /* D1WR Disk 1 Write Byte Recovery Count for IDE-2 */ + dev->ide_regs[dev->ide_index] = val & 0x1f; + break; + case 0x07: /* Buffer Mode Register 1 */ + dev->ide_regs[dev->ide_index] = val; + break; + case 0x09: /* IDEPE1 IDE Port Enable Register 1 */ + dev->ide_regs[dev->ide_index] = val & 0xc3; + break; + case 0x0a: /* Buffer Mode Register 2 */ + dev->ide_regs[dev->ide_index] = val & 0x4f; + break; + case 0x0b: /* IDE Channel 1 Disk 0 Sector Byte Count Register 1 */ + case 0x0d: /* IDE Channel 1 Disk 1 Sector Byte Count Register 1 */ + case 0x0f: /* IDE Channel 2 Disk 0 Sector Byte Count Register 1 */ + case 0x11: /* IDE Channel 2 Disk 1 Sector Byte Count Register 1 */ + dev->ide_regs[dev->ide_index] = val & 0x03; + break; + case 0x0c: /* IDE Channel 1 Disk 0 Sector Byte Count Register 2 */ + case 0x0e: /* IDE Channel 1 Disk 1 Sector Byte Count Register 2 */ + case 0x10: /* IDE Channel 2 Disk 1 Sector Byte Count Register 2 */ + case 0x12: /* IDE Channel 2 Disk 1 Sector Byte Count Register 2 */ + dev->ide_regs[dev->ide_index] = val & 0x1f; + break; + case 0x35: /* IDEPE3 IDE Port Enable Register 3 */ + dev->ide_regs[dev->ide_index] = val; + ali1489_ide_handler(dev); + break; + } + break; } } - static uint8_t ali1489_ide_read(uint16_t addr, void *priv) { - ali1489_t *dev = (ali1489_t *)priv; - uint8_t ret = 0xff; + ali1489_t *dev = (ali1489_t *) priv; + uint8_t ret = 0xff; - switch (addr) - { - case 0xf4: - ret = dev->ide_chip_id; - break; - case 0xfc: - ret = dev->ide_regs[dev->ide_index]; - ali1489_log("M1489-IDE: dev->regs[%02x] (%02x)\n", dev->ide_index, ret); - break; + switch (addr) { + case 0xf4: + ret = dev->ide_chip_id; + break; + case 0xfc: + ret = dev->ide_regs[dev->ide_index]; + ali1489_log("M1489-IDE: dev->regs[%02x] (%02x)\n", dev->ide_index, ret); + break; } return ret; } - static void ali1489_reset(void *priv) { - ali1489_t *dev = (ali1489_t *)priv; + ali1489_t *dev = (ali1489_t *) priv; pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED); pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED); @@ -582,21 +564,19 @@ ali1489_reset(void *priv) ali1489_defaults(dev); } - static void ali1489_close(void *priv) { - ali1489_t *dev = (ali1489_t *)priv; + ali1489_t *dev = (ali1489_t *) priv; smram_del(dev->smram); free(dev); } - static void * ali1489_init(const device_t *info) { - ali1489_t *dev = (ali1489_t *)malloc(sizeof(ali1489_t)); + ali1489_t *dev = (ali1489_t *) malloc(sizeof(ali1489_t)); memset(dev, 0, sizeof(ali1489_t)); /* M1487/M1489 @@ -619,7 +599,7 @@ ali1489_init(const device_t *info) device_add(&ide_pci_2ch_device); dev->port_92 = device_add(&port_92_pci_device); - dev->smram = smram_add(); + dev->smram = smram_add(); ali1489_defaults(dev); @@ -627,15 +607,15 @@ ali1489_init(const device_t *info) } const device_t ali1489_device = { - .name = "ALi M1489", + .name = "ALi M1489", .internal_name = "ali1489", - .flags = 0, - .local = 0, - .init = ali1489_init, - .close = ali1489_close, - .reset = ali1489_reset, + .flags = 0, + .local = 0, + .init = ali1489_init, + .close = ali1489_close, + .reset = ali1489_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/ali1531.c b/src/chipset/ali1531.c index 350ec146f..bf157953d 100644 --- a/src/chipset/ali1531.c +++ b/src/chipset/ali1531.c @@ -34,15 +34,12 @@ #include <86box/chipset.h> - -typedef struct ali1531_t -{ +typedef struct ali1531_t { uint8_t pci_conf[256]; smram_t *smram; } ali1531_t; - #ifdef ENABLE_ALI1531_LOG int ali1531_do_log = ENABLE_ALI1531_LOG; static void @@ -50,262 +47,263 @@ ali1531_log(const char *fmt, ...) { va_list ap; - if (ali1531_do_log) - { + if (ali1531_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define ali1531_log(fmt, ...) +# define ali1531_log(fmt, ...) #endif - static void ali1531_smram_recalc(uint8_t val, ali1531_t *dev) { smram_disable_all(); if (val & 1) { - switch (val & 0x0c) { - case 0x00: - ali1531_log("SMRAM: D0000 -> B0000 (%i)\n", val & 2); - smram_enable(dev->smram, 0xd0000, 0xb0000, 0x10000, val & 2, 1); - if (val & 0x10) - mem_set_mem_state_smram_ex(1, 0xd0000, 0x10000, 0x02); - break; - case 0x04: - ali1531_log("SMRAM: A0000 -> A0000 (%i)\n", val & 2); - smram_enable(dev->smram, 0xa0000, 0xa0000, 0x20000, val & 2, 1); - if (val & 0x10) - mem_set_mem_state_smram_ex(1, 0xa0000, 0x20000, 0x02); - break; - case 0x08: - ali1531_log("SMRAM: 30000 -> B0000 (%i)\n", val & 2); - smram_enable(dev->smram, 0x30000, 0xb0000, 0x10000, val & 2, 1); - if (val & 0x10) - mem_set_mem_state_smram_ex(1, 0x30000, 0x10000, 0x02); - break; - } + switch (val & 0x0c) { + case 0x00: + ali1531_log("SMRAM: D0000 -> B0000 (%i)\n", val & 2); + smram_enable(dev->smram, 0xd0000, 0xb0000, 0x10000, val & 2, 1); + if (val & 0x10) + mem_set_mem_state_smram_ex(1, 0xd0000, 0x10000, 0x02); + break; + case 0x04: + ali1531_log("SMRAM: A0000 -> A0000 (%i)\n", val & 2); + smram_enable(dev->smram, 0xa0000, 0xa0000, 0x20000, val & 2, 1); + if (val & 0x10) + mem_set_mem_state_smram_ex(1, 0xa0000, 0x20000, 0x02); + break; + case 0x08: + ali1531_log("SMRAM: 30000 -> B0000 (%i)\n", val & 2); + smram_enable(dev->smram, 0x30000, 0xb0000, 0x10000, val & 2, 1); + if (val & 0x10) + mem_set_mem_state_smram_ex(1, 0x30000, 0x10000, 0x02); + break; + } } flushmmucache_nopc(); } - static void ali1531_shadow_recalc(int cur_reg, ali1531_t *dev) { - int i, bit, r_reg, w_reg; + int i, bit, r_reg, w_reg; uint32_t base, flags = 0; shadowbios = shadowbios_write = 0; for (i = 0; i < 16; i++) { - base = 0x000c0000 + (i << 14); - bit = i & 7; - r_reg = 0x4c + (i >> 3); - w_reg = 0x4e + (i >> 3); + base = 0x000c0000 + (i << 14); + bit = i & 7; + r_reg = 0x4c + (i >> 3); + w_reg = 0x4e + (i >> 3); - flags = (dev->pci_conf[r_reg] & (1 << bit)) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - flags |= ((dev->pci_conf[w_reg] & (1 << bit)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY); + flags = (dev->pci_conf[r_reg] & (1 << bit)) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + flags |= ((dev->pci_conf[w_reg] & (1 << bit)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY); - if (base >= 0x000e0000) { - if (dev->pci_conf[r_reg] & (1 << bit)) - shadowbios |= 1; - if (dev->pci_conf[w_reg] & (1 << bit)) - shadowbios_write |= 1; - } + if (base >= 0x000e0000) { + if (dev->pci_conf[r_reg] & (1 << bit)) + shadowbios |= 1; + if (dev->pci_conf[w_reg] & (1 << bit)) + shadowbios_write |= 1; + } - ali1531_log("%08X-%08X shadow: R%c, W%c\n", base, base + 0x00003fff, - (dev->pci_conf[r_reg] & (1 << bit)) ? 'I' : 'E', (dev->pci_conf[w_reg] & (1 << bit)) ? 'I' : 'E'); + ali1531_log("%08X-%08X shadow: R%c, W%c\n", base, base + 0x00003fff, + (dev->pci_conf[r_reg] & (1 << bit)) ? 'I' : 'E', (dev->pci_conf[w_reg] & (1 << bit)) ? 'I' : 'E'); mem_set_mem_state_both(base, 0x00004000, flags); } flushmmucache_nopc(); } - static void ali1531_write(int func, int addr, uint8_t val, void *priv) { - ali1531_t *dev = (ali1531_t *)priv; + ali1531_t *dev = (ali1531_t *) priv; switch (addr) { - case 0x04: - dev->pci_conf[addr] = val; - break; - case 0x05: - dev->pci_conf[addr] = val & 0x01; - break; + case 0x04: + dev->pci_conf[addr] = val; + break; + case 0x05: + dev->pci_conf[addr] = val & 0x01; + break; - case 0x07: - dev->pci_conf[addr] &= ~(val & 0xf8); - break; + case 0x07: + dev->pci_conf[addr] &= ~(val & 0xf8); + break; - case 0x0d: - dev->pci_conf[addr] = val & 0xf8; - break; + case 0x0d: + dev->pci_conf[addr] = val & 0xf8; + break; - case 0x2c: /* Subsystem Vendor ID */ - case 0x2d: - case 0x2e: - case 0x2f: - if (dev->pci_conf[0x70] & 0x08) - dev->pci_conf[addr] = val; - break; + case 0x2c: /* Subsystem Vendor ID */ + case 0x2d: + case 0x2e: + case 0x2f: + if (dev->pci_conf[0x70] & 0x08) + dev->pci_conf[addr] = val; + break; - case 0x40: - dev->pci_conf[addr] = val & 0xf1; - break; + case 0x40: + dev->pci_conf[addr] = val & 0xf1; + break; - case 0x41: - dev->pci_conf[addr] = (val & 0xd6) | 0x08; - break; + case 0x41: + dev->pci_conf[addr] = (val & 0xd6) | 0x08; + break; - case 0x42: /* L2 Cache */ - dev->pci_conf[addr] = val & 0xf7; - cpu_cache_ext_enabled = !!(val & 1); - cpu_update_waitstates(); - break; + case 0x42: /* L2 Cache */ + dev->pci_conf[addr] = val & 0xf7; + cpu_cache_ext_enabled = !!(val & 1); + cpu_update_waitstates(); + break; - case 0x43: /* L1 Cache */ - dev->pci_conf[addr] = val; - cpu_cache_int_enabled = !!(val & 1); - cpu_update_waitstates(); - break; + case 0x43: /* L1 Cache */ + dev->pci_conf[addr] = val; + cpu_cache_int_enabled = !!(val & 1); + cpu_update_waitstates(); + break; - case 0x44: - dev->pci_conf[addr] = val; - break; - case 0x45: - dev->pci_conf[addr] = val; - break; + case 0x44: + dev->pci_conf[addr] = val; + break; + case 0x45: + dev->pci_conf[addr] = val; + break; - case 0x46: - dev->pci_conf[addr] = val; - break; + case 0x46: + dev->pci_conf[addr] = val; + break; - case 0x47: - dev->pci_conf[addr] = val & 0xfc; + case 0x47: + dev->pci_conf[addr] = val & 0xfc; - if (mem_size > 0xe00000) - mem_set_mem_state_both(0xe00000, 0x100000, (val & 0x20) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)); + if (mem_size > 0xe00000) + mem_set_mem_state_both(0xe00000, 0x100000, (val & 0x20) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)); - if (mem_size > 0xf00000) - mem_set_mem_state_both(0xf00000, 0x100000, (val & 0x10) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)); + if (mem_size > 0xf00000) + mem_set_mem_state_both(0xf00000, 0x100000, (val & 0x10) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)); - mem_set_mem_state_both(0xa0000, 0x20000, (val & 8) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); - mem_set_mem_state_both(0x80000, 0x20000, (val & 4) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)); + mem_set_mem_state_both(0xa0000, 0x20000, (val & 8) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); + mem_set_mem_state_both(0x80000, 0x20000, (val & 4) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)); - flushmmucache_nopc(); - break; + flushmmucache_nopc(); + break; - case 0x48: /* SMRAM */ - dev->pci_conf[addr] = val; - ali1531_smram_recalc(val, dev); - break; + case 0x48: /* SMRAM */ + dev->pci_conf[addr] = val; + ali1531_smram_recalc(val, dev); + break; - case 0x49: - dev->pci_conf[addr] = val & 0x73; - break; + case 0x49: + dev->pci_conf[addr] = val & 0x73; + break; - case 0x4a: - dev->pci_conf[addr] = val; - break; + case 0x4a: + dev->pci_conf[addr] = val; + break; - case 0x4c ... 0x4f: /* Shadow RAM */ - dev->pci_conf[addr] = val; - ali1531_shadow_recalc(val, dev); - break; + case 0x4c ... 0x4f: /* Shadow RAM */ + dev->pci_conf[addr] = val; + ali1531_shadow_recalc(val, dev); + break; - case 0x50: case 0x51: case 0x52: case 0x54: - case 0x55: case 0x56: - dev->pci_conf[addr] = val; - break; + case 0x50: + case 0x51: + case 0x52: + case 0x54: + case 0x55: + case 0x56: + dev->pci_conf[addr] = val; + break; - case 0x57: /* H2PO */ - dev->pci_conf[addr] = val & 0x60; - /* Find where the Shut-down Special cycle is initiated. */ - // if (!(val & 0x20)) - // outb(0x92, 0x01); - break; + case 0x57: /* H2PO */ + dev->pci_conf[addr] = val & 0x60; + /* Find where the Shut-down Special cycle is initiated. */ + // if (!(val & 0x20)) + // outb(0x92, 0x01); + break; - case 0x58: - dev->pci_conf[addr] = val & 0x86; - break; + case 0x58: + dev->pci_conf[addr] = val & 0x86; + break; - case 0x59: case 0x5a: - case 0x5c: - dev->pci_conf[addr] = val; - break; + case 0x59: + case 0x5a: + case 0x5c: + dev->pci_conf[addr] = val; + break; - case 0x5b: - dev->pci_conf[addr] = val & 0x4f; - break; + case 0x5b: + dev->pci_conf[addr] = val & 0x4f; + break; - case 0x5d: - dev->pci_conf[addr] = val & 0x53; - break; + case 0x5d: + dev->pci_conf[addr] = val & 0x53; + break; - case 0x5f: - dev->pci_conf[addr] = val & 0x7f; - break; + case 0x5f: + dev->pci_conf[addr] = val & 0x7f; + break; - case 0x60 ... 0x6f: /* DRB's */ - dev->pci_conf[addr] = val; - spd_write_drbs_interleaved(dev->pci_conf, 0x60, 0x6f, 1); - break; + case 0x60 ... 0x6f: /* DRB's */ + dev->pci_conf[addr] = val; + spd_write_drbs_interleaved(dev->pci_conf, 0x60, 0x6f, 1); + break; - case 0x70: case 0x71: - dev->pci_conf[addr] = val; - break; + case 0x70: + case 0x71: + dev->pci_conf[addr] = val; + break; - case 0x72: - dev->pci_conf[addr] = val & 0x0f; - break; + case 0x72: + dev->pci_conf[addr] = val & 0x0f; + break; - case 0x74: - dev->pci_conf[addr] = val & 0x2b; - break; + case 0x74: + dev->pci_conf[addr] = val & 0x2b; + break; - case 0x76: case 0x77: - dev->pci_conf[addr] = val; - break; + case 0x76: + case 0x77: + dev->pci_conf[addr] = val; + break; - case 0x80: - dev->pci_conf[addr] = val & 0x84; - break; + case 0x80: + dev->pci_conf[addr] = val & 0x84; + break; - case 0x81: - dev->pci_conf[addr] = val & 0x81; - break; + case 0x81: + dev->pci_conf[addr] = val & 0x81; + break; - case 0x83: - dev->pci_conf[addr] = val & 0x10; - break; + case 0x83: + dev->pci_conf[addr] = val & 0x10; + break; } } - static uint8_t ali1531_read(int func, int addr, void *priv) { - ali1531_t *dev = (ali1531_t *)priv; - uint8_t ret = 0xff; + ali1531_t *dev = (ali1531_t *) priv; + uint8_t ret = 0xff; ret = dev->pci_conf[addr]; return ret; } - static void ali1531_reset(void *priv) { - ali1531_t *dev = (ali1531_t *)priv; - int i; + ali1531_t *dev = (ali1531_t *) priv; + int i; /* Default Registers */ dev->pci_conf[0x00] = 0xb9; @@ -342,29 +340,27 @@ ali1531_reset(void *priv) ali1531_write(0, 0x48, 0x00, dev); for (i = 0; i < 4; i++) - ali1531_write(0, 0x4c + i, 0x00, dev); + ali1531_write(0, 0x4c + i, 0x00, dev); for (i = 0; i < 16; i += 2) { - ali1531_write(0, 0x60 + i, 0x08, dev); - ali1531_write(0, 0x61 + i, 0x40, dev); + ali1531_write(0, 0x60 + i, 0x08, dev); + ali1531_write(0, 0x61 + i, 0x40, dev); } } - static void ali1531_close(void *priv) { - ali1531_t *dev = (ali1531_t *)priv; + ali1531_t *dev = (ali1531_t *) priv; smram_del(dev->smram); free(dev); } - static void * ali1531_init(const device_t *info) { - ali1531_t *dev = (ali1531_t *)malloc(sizeof(ali1531_t)); + ali1531_t *dev = (ali1531_t *) malloc(sizeof(ali1531_t)); memset(dev, 0, sizeof(ali1531_t)); pci_add_card(PCI_ADD_NORTHBRIDGE, ali1531_read, ali1531_write, dev); @@ -377,15 +373,15 @@ ali1531_init(const device_t *info) } const device_t ali1531_device = { - .name = "ALi M1531 CPU-to-PCI Bridge", + .name = "ALi M1531 CPU-to-PCI Bridge", .internal_name = "ali1531", - .flags = DEVICE_PCI, - .local = 0, - .init = ali1531_init, - .close = ali1531_close, - .reset = ali1531_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = ali1531_init, + .close = ali1531_close, + .reset = ali1531_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/ali1541.c b/src/chipset/ali1541.c index 097726106..4882ba717 100644 --- a/src/chipset/ali1541.c +++ b/src/chipset/ali1541.c @@ -31,16 +31,13 @@ #include <86box/chipset.h> +typedef struct ali1541_t { + uint8_t pci_conf[256]; -typedef struct ali1541_t -{ - uint8_t pci_conf[256]; - - smram_t * smram; - void * agp_bridge; + smram_t *smram; + void *agp_bridge; } ali1541_t; - #ifdef ENABLE_ALI1541_LOG int ali1541_do_log = ENABLE_ALI1541_LOG; static void @@ -48,518 +45,519 @@ ali1541_log(const char *fmt, ...) { va_list ap; - if (ali1541_do_log) - { + if (ali1541_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define ali1541_log(fmt, ...) +# define ali1541_log(fmt, ...) #endif - static void ali1541_smram_recalc(uint8_t val, ali1541_t *dev) { smram_disable_all(); if (val & 1) { - switch (val & 0x0c) { - case 0x00: - ali1541_log("SMRAM: D0000 -> B0000 (%i)\n", val & 2); - smram_enable(dev->smram, 0xd0000, 0xb0000, 0x10000, val & 2, 1); - if (val & 0x10) - mem_set_mem_state_smram_ex(1, 0xd0000, 0x10000, 0x02); - break; - case 0x04: - ali1541_log("SMRAM: A0000 -> A0000 (%i)\n", val & 2); - smram_enable(dev->smram, 0xa0000, 0xa0000, 0x20000, val & 2, 1); - if (val & 0x10) - mem_set_mem_state_smram_ex(1, 0xa0000, 0x20000, 0x02); - break; - case 0x08: - ali1541_log("SMRAM: 30000 -> B0000 (%i)\n", val & 2); - smram_enable(dev->smram, 0x30000, 0xb0000, 0x10000, val & 2, 1); - if (val & 0x10) - mem_set_mem_state_smram_ex(1, 0x30000, 0x10000, 0x02); - break; - } + switch (val & 0x0c) { + case 0x00: + ali1541_log("SMRAM: D0000 -> B0000 (%i)\n", val & 2); + smram_enable(dev->smram, 0xd0000, 0xb0000, 0x10000, val & 2, 1); + if (val & 0x10) + mem_set_mem_state_smram_ex(1, 0xd0000, 0x10000, 0x02); + break; + case 0x04: + ali1541_log("SMRAM: A0000 -> A0000 (%i)\n", val & 2); + smram_enable(dev->smram, 0xa0000, 0xa0000, 0x20000, val & 2, 1); + if (val & 0x10) + mem_set_mem_state_smram_ex(1, 0xa0000, 0x20000, 0x02); + break; + case 0x08: + ali1541_log("SMRAM: 30000 -> B0000 (%i)\n", val & 2); + smram_enable(dev->smram, 0x30000, 0xb0000, 0x10000, val & 2, 1); + if (val & 0x10) + mem_set_mem_state_smram_ex(1, 0x30000, 0x10000, 0x02); + break; + } } flushmmucache_nopc(); } - static void ali1541_shadow_recalc(int cur_reg, ali1541_t *dev) { - int i, bit, r_reg, w_reg; + int i, bit, r_reg, w_reg; uint32_t base, flags = 0; shadowbios = shadowbios_write = 0; for (i = 0; i < 16; i++) { - base = 0x000c0000 + (i << 14); - bit = i & 7; - r_reg = 0x56 + (i >> 3); - w_reg = 0x58 + (i >> 3); + base = 0x000c0000 + (i << 14); + bit = i & 7; + r_reg = 0x56 + (i >> 3); + w_reg = 0x58 + (i >> 3); - flags = (dev->pci_conf[r_reg] & (1 << bit)) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - flags |= ((dev->pci_conf[w_reg] & (1 << bit)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY); + flags = (dev->pci_conf[r_reg] & (1 << bit)) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + flags |= ((dev->pci_conf[w_reg] & (1 << bit)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY); - if (base >= 0x000e0000) { - if (dev->pci_conf[r_reg] & (1 << bit)) - shadowbios |= 1; - if (dev->pci_conf[w_reg] & (1 << bit)) - shadowbios_write |= 1; - } + if (base >= 0x000e0000) { + if (dev->pci_conf[r_reg] & (1 << bit)) + shadowbios |= 1; + if (dev->pci_conf[w_reg] & (1 << bit)) + shadowbios_write |= 1; + } - ali1541_log("%08X-%08X shadow: R%c, W%c\n", base, base + 0x00003fff, - (dev->pci_conf[r_reg] & (1 << bit)) ? 'I' : 'E', (dev->pci_conf[w_reg] & (1 << bit)) ? 'I' : 'E'); + ali1541_log("%08X-%08X shadow: R%c, W%c\n", base, base + 0x00003fff, + (dev->pci_conf[r_reg] & (1 << bit)) ? 'I' : 'E', (dev->pci_conf[w_reg] & (1 << bit)) ? 'I' : 'E'); mem_set_mem_state_both(base, 0x00004000, flags); } flushmmucache_nopc(); } - static void ali1541_mask_bar(ali1541_t *dev) { uint32_t bar, mask; switch (dev->pci_conf[0xbc] & 0x0f) { - case 0x00: - default: - mask = 0x00000000; - break; - case 0x01: - mask = 0xfff00000; - break; - case 0x02: - mask = 0xffe00000; - break; - case 0x03: - mask = 0xffc00000; - break; - case 0x04: - mask = 0xff800000; - break; - case 0x06: - mask = 0xff000000; - break; - case 0x07: - mask = 0xfe000000; - break; - case 0x08: - mask = 0xfc000000; - break; - case 0x09: - mask = 0xf8000000; - break; - case 0x0a: - mask = 0xf0000000; - break; + case 0x00: + default: + mask = 0x00000000; + break; + case 0x01: + mask = 0xfff00000; + break; + case 0x02: + mask = 0xffe00000; + break; + case 0x03: + mask = 0xffc00000; + break; + case 0x04: + mask = 0xff800000; + break; + case 0x06: + mask = 0xff000000; + break; + case 0x07: + mask = 0xfe000000; + break; + case 0x08: + mask = 0xfc000000; + break; + case 0x09: + mask = 0xf8000000; + break; + case 0x0a: + mask = 0xf0000000; + break; } - bar = ((dev->pci_conf[0x13] << 24) | (dev->pci_conf[0x12] << 16)) & mask; + bar = ((dev->pci_conf[0x13] << 24) | (dev->pci_conf[0x12] << 16)) & mask; dev->pci_conf[0x12] = (bar >> 16) & 0xff; dev->pci_conf[0x13] = (bar >> 24) & 0xff; } - static void ali1541_write(int func, int addr, uint8_t val, void *priv) { - ali1541_t *dev = (ali1541_t *)priv; + ali1541_t *dev = (ali1541_t *) priv; switch (addr) { - case 0x04: - dev->pci_conf[addr] = val; - break; - case 0x05: - dev->pci_conf[addr] = val & 0x01; - break; - - case 0x07: - dev->pci_conf[addr] &= ~(val & 0xf8); - break; - - case 0x0d: - dev->pci_conf[addr] = val & 0xf8; - break; - - case 0x12: - dev->pci_conf[0x12] = (val & 0xc0); - ali1541_mask_bar(dev); - break; - case 0x13: - dev->pci_conf[0x13] = val; - ali1541_mask_bar(dev); - break; - - case 0x2c: /* Subsystem Vendor ID */ - case 0x2d: - case 0x2e: - case 0x2f: - if (dev->pci_conf[0x90] & 0x01) - dev->pci_conf[addr] = val; - break; - - case 0x34: - if (dev->pci_conf[0x90] & 0x02) - dev->pci_conf[addr] = val; - break; - - case 0x40: - dev->pci_conf[addr] = val & 0x7f; - break; - - case 0x41: - dev->pci_conf[addr] = val & 0x7f; - break; - - case 0x42: /* L2 Cache */ - dev->pci_conf[addr] = val; - cpu_cache_ext_enabled = !!(val & 1); - cpu_update_waitstates(); - break; - - case 0x43: /* PLCTL-Pipe Line Control */ - dev->pci_conf[addr] = val & 0xf7; - break; - - case 0x44: - dev->pci_conf[addr] = val; - break; - case 0x45: - dev->pci_conf[addr] = val; - break; - case 0x46: - dev->pci_conf[addr] = val & 0xf0; - break; - case 0x47: - dev->pci_conf[addr] = val; - break; - - case 0x48: - dev->pci_conf[addr] = val; - break; - case 0x49: - dev->pci_conf[addr] = val; - break; - - case 0x4a: - dev->pci_conf[addr] = val & 0xf8; - break; - - case 0x4b: - dev->pci_conf[addr] = val; - break; - - case 0x4c: - dev->pci_conf[addr] = val; - break; - case 0x4d: - dev->pci_conf[addr] = val; - break; - - case 0x4e: - dev->pci_conf[addr] = val; - break; - case 0x4f: - dev->pci_conf[addr] = val; - break; - - case 0x50: - dev->pci_conf[addr] = val & 0x71; - break; - - case 0x51: - dev->pci_conf[addr] = val; - break; - - case 0x52: - dev->pci_conf[addr] = val; - break; - - case 0x53: - dev->pci_conf[addr] = val; - break; - - case 0x54: - dev->pci_conf[addr] = val & 0x3c; - - if (mem_size > 0xe00000) - mem_set_mem_state_both(0xe00000, 0x100000, (val & 0x20) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)); - - if (mem_size > 0xf00000) - mem_set_mem_state_both(0xf00000, 0x100000, (val & 0x10) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)); - - mem_set_mem_state_both(0xa0000, 0x20000, (val & 8) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); - mem_set_mem_state_both(0x80000, 0x20000, (val & 4) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)); - - flushmmucache_nopc(); - break; - - case 0x55: /* SMRAM */ - dev->pci_conf[addr] = val & 0x1f; - ali1541_smram_recalc(val, dev); - break; - - case 0x56 ... 0x59: /* Shadow RAM */ - dev->pci_conf[addr] = val; - ali1541_shadow_recalc(val, dev); - break; - - case 0x5a: case 0x5b: - dev->pci_conf[addr] = val; - break; - - case 0x5c: - dev->pci_conf[addr] = val; - break; - - case 0x5d: - dev->pci_conf[addr] = val & 0x17; - break; - - case 0x5e: - dev->pci_conf[addr] = val; - break; - - case 0x5f: - dev->pci_conf[addr] = val & 0xc1; - break; - - case 0x60 ... 0x6f: /* DRB's */ - dev->pci_conf[addr] = val; - spd_write_drbs_interleaved(dev->pci_conf, 0x60, 0x6f, 1); - break; - - case 0x70: - dev->pci_conf[addr] = val; - break; - - case 0x71: - dev->pci_conf[addr] = val; - break; - - case 0x72: - dev->pci_conf[addr] = val & 0xc7; - break; - - case 0x73: - dev->pci_conf[addr] = val & 0x1f; - break; - - case 0x84: case 0x85: - dev->pci_conf[addr] = val; - break; - - case 0x86: - dev->pci_conf[addr] = val & 0x0f; - break; - - case 0x87: /* H2PO */ - dev->pci_conf[addr] = val; - /* Find where the Shut-down Special cycle is initiated. */ - // if (!(val & 0x20)) - // outb(0x92, 0x01); - break; - - case 0x88: - dev->pci_conf[addr] = val; - break; - - case 0x89: - dev->pci_conf[addr] = val; - break; - - case 0x8a: - dev->pci_conf[addr] = val; - break; - - case 0x8b: - dev->pci_conf[addr] = val & 0x3f; - break; - - case 0x8c: - dev->pci_conf[addr] = val; - break; - - case 0x8d: - dev->pci_conf[addr] = val; - break; - - case 0x8e: - dev->pci_conf[addr] = val; - break; - - case 0x8f: - dev->pci_conf[addr] = val; - break; - - case 0x90: - dev->pci_conf[addr] = val; - pci_bridge_set_ctl(dev->agp_bridge, val); - break; - - case 0x91: - dev->pci_conf[addr] = val; - break; - - case 0xb4: - if (dev->pci_conf[0x90] & 0x01) - dev->pci_conf[addr] = val & 0x03; - break; - case 0xb5: - if (dev->pci_conf[0x90] & 0x01) - dev->pci_conf[addr] = val & 0x02; - break; - case 0xb7: - if (dev->pci_conf[0x90] & 0x01) - dev->pci_conf[addr] = val; - break; - - case 0xb8: - dev->pci_conf[addr] = val & 0x03; - break; - case 0xb9: - dev->pci_conf[addr] = val & 0x03; - break; - case 0xbb: - dev->pci_conf[addr] = val; - break; - - case 0xbc: - dev->pci_conf[addr] = val & 0x0f; - ali1541_mask_bar(dev); - break; - case 0xbd: - dev->pci_conf[addr] = val & 0xf0; - break; - case 0xbe: case 0xbf: - dev->pci_conf[addr] = val; - break; - - case 0xc0: - dev->pci_conf[addr] = val & 0x90; - break; - case 0xc1: case 0xc2: - case 0xc3: - dev->pci_conf[addr] = val; - break; - - case 0xc8: case 0xc9: - dev->pci_conf[addr] = val; - break; - - case 0xd1: - dev->pci_conf[addr] = val & 0xf1; - break; - case 0xd2: case 0xd3: - dev->pci_conf[addr] = val; - break; - - case 0xe0: case 0xe1: - if (dev->pci_conf[0x90] & 0x20) - dev->pci_conf[addr] = val; - break; - case 0xe2: - if (dev->pci_conf[0x90] & 0x20) - dev->pci_conf[addr] = val & 0x3f; - break; - case 0xe3: - if (dev->pci_conf[0x90] & 0x20) - dev->pci_conf[addr] = val & 0xfe; - break; - - case 0xe4: - if (dev->pci_conf[0x90] & 0x20) - dev->pci_conf[addr] = val & 0x03; - break; - case 0xe5: - if (dev->pci_conf[0x90] & 0x20) - dev->pci_conf[addr] = val; - break; - - case 0xe6: - if (dev->pci_conf[0x90] & 0x20) - dev->pci_conf[addr] = val & 0xc0; - break; - - case 0xe7: - if (dev->pci_conf[0x90] & 0x20) - dev->pci_conf[addr] = val; - break; - - case 0xe8: case 0xe9: - if (dev->pci_conf[0x90] & 0x04) - dev->pci_conf[addr] = val; - break; - - case 0xea: - dev->pci_conf[addr] = val & 0xcf; - break; - - case 0xeb: - dev->pci_conf[addr] = val & 0xcf; - break; - - case 0xec: - dev->pci_conf[addr] = val & 0x3f; - break; - - case 0xed: - dev->pci_conf[addr] = val; - break; - - case 0xee: - dev->pci_conf[addr] = val & 0x3e; - break; - case 0xef: - dev->pci_conf[addr] = val; - break; - - case 0xf3: - dev->pci_conf[addr] = val & 0x08; - break; - - case 0xf5: - dev->pci_conf[addr] = val; - break; - - case 0xf6: - dev->pci_conf[addr] = val; - break; - - case 0xf7: - dev->pci_conf[addr] = val & 0x43; - break; + case 0x04: + dev->pci_conf[addr] = val; + break; + case 0x05: + dev->pci_conf[addr] = val & 0x01; + break; + + case 0x07: + dev->pci_conf[addr] &= ~(val & 0xf8); + break; + + case 0x0d: + dev->pci_conf[addr] = val & 0xf8; + break; + + case 0x12: + dev->pci_conf[0x12] = (val & 0xc0); + ali1541_mask_bar(dev); + break; + case 0x13: + dev->pci_conf[0x13] = val; + ali1541_mask_bar(dev); + break; + + case 0x2c: /* Subsystem Vendor ID */ + case 0x2d: + case 0x2e: + case 0x2f: + if (dev->pci_conf[0x90] & 0x01) + dev->pci_conf[addr] = val; + break; + + case 0x34: + if (dev->pci_conf[0x90] & 0x02) + dev->pci_conf[addr] = val; + break; + + case 0x40: + dev->pci_conf[addr] = val & 0x7f; + break; + + case 0x41: + dev->pci_conf[addr] = val & 0x7f; + break; + + case 0x42: /* L2 Cache */ + dev->pci_conf[addr] = val; + cpu_cache_ext_enabled = !!(val & 1); + cpu_update_waitstates(); + break; + + case 0x43: /* PLCTL-Pipe Line Control */ + dev->pci_conf[addr] = val & 0xf7; + break; + + case 0x44: + dev->pci_conf[addr] = val; + break; + case 0x45: + dev->pci_conf[addr] = val; + break; + case 0x46: + dev->pci_conf[addr] = val & 0xf0; + break; + case 0x47: + dev->pci_conf[addr] = val; + break; + + case 0x48: + dev->pci_conf[addr] = val; + break; + case 0x49: + dev->pci_conf[addr] = val; + break; + + case 0x4a: + dev->pci_conf[addr] = val & 0xf8; + break; + + case 0x4b: + dev->pci_conf[addr] = val; + break; + + case 0x4c: + dev->pci_conf[addr] = val; + break; + case 0x4d: + dev->pci_conf[addr] = val; + break; + + case 0x4e: + dev->pci_conf[addr] = val; + break; + case 0x4f: + dev->pci_conf[addr] = val; + break; + + case 0x50: + dev->pci_conf[addr] = val & 0x71; + break; + + case 0x51: + dev->pci_conf[addr] = val; + break; + + case 0x52: + dev->pci_conf[addr] = val; + break; + + case 0x53: + dev->pci_conf[addr] = val; + break; + + case 0x54: + dev->pci_conf[addr] = val & 0x3c; + + if (mem_size > 0xe00000) + mem_set_mem_state_both(0xe00000, 0x100000, (val & 0x20) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)); + + if (mem_size > 0xf00000) + mem_set_mem_state_both(0xf00000, 0x100000, (val & 0x10) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)); + + mem_set_mem_state_both(0xa0000, 0x20000, (val & 8) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); + mem_set_mem_state_both(0x80000, 0x20000, (val & 4) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)); + + flushmmucache_nopc(); + break; + + case 0x55: /* SMRAM */ + dev->pci_conf[addr] = val & 0x1f; + ali1541_smram_recalc(val, dev); + break; + + case 0x56 ... 0x59: /* Shadow RAM */ + dev->pci_conf[addr] = val; + ali1541_shadow_recalc(val, dev); + break; + + case 0x5a: + case 0x5b: + dev->pci_conf[addr] = val; + break; + + case 0x5c: + dev->pci_conf[addr] = val; + break; + + case 0x5d: + dev->pci_conf[addr] = val & 0x17; + break; + + case 0x5e: + dev->pci_conf[addr] = val; + break; + + case 0x5f: + dev->pci_conf[addr] = val & 0xc1; + break; + + case 0x60 ... 0x6f: /* DRB's */ + dev->pci_conf[addr] = val; + spd_write_drbs_interleaved(dev->pci_conf, 0x60, 0x6f, 1); + break; + + case 0x70: + dev->pci_conf[addr] = val; + break; + + case 0x71: + dev->pci_conf[addr] = val; + break; + + case 0x72: + dev->pci_conf[addr] = val & 0xc7; + break; + + case 0x73: + dev->pci_conf[addr] = val & 0x1f; + break; + + case 0x84: + case 0x85: + dev->pci_conf[addr] = val; + break; + + case 0x86: + dev->pci_conf[addr] = val & 0x0f; + break; + + case 0x87: /* H2PO */ + dev->pci_conf[addr] = val; + /* Find where the Shut-down Special cycle is initiated. */ + // if (!(val & 0x20)) + // outb(0x92, 0x01); + break; + + case 0x88: + dev->pci_conf[addr] = val; + break; + + case 0x89: + dev->pci_conf[addr] = val; + break; + + case 0x8a: + dev->pci_conf[addr] = val; + break; + + case 0x8b: + dev->pci_conf[addr] = val & 0x3f; + break; + + case 0x8c: + dev->pci_conf[addr] = val; + break; + + case 0x8d: + dev->pci_conf[addr] = val; + break; + + case 0x8e: + dev->pci_conf[addr] = val; + break; + + case 0x8f: + dev->pci_conf[addr] = val; + break; + + case 0x90: + dev->pci_conf[addr] = val; + pci_bridge_set_ctl(dev->agp_bridge, val); + break; + + case 0x91: + dev->pci_conf[addr] = val; + break; + + case 0xb4: + if (dev->pci_conf[0x90] & 0x01) + dev->pci_conf[addr] = val & 0x03; + break; + case 0xb5: + if (dev->pci_conf[0x90] & 0x01) + dev->pci_conf[addr] = val & 0x02; + break; + case 0xb7: + if (dev->pci_conf[0x90] & 0x01) + dev->pci_conf[addr] = val; + break; + + case 0xb8: + dev->pci_conf[addr] = val & 0x03; + break; + case 0xb9: + dev->pci_conf[addr] = val & 0x03; + break; + case 0xbb: + dev->pci_conf[addr] = val; + break; + + case 0xbc: + dev->pci_conf[addr] = val & 0x0f; + ali1541_mask_bar(dev); + break; + case 0xbd: + dev->pci_conf[addr] = val & 0xf0; + break; + case 0xbe: + case 0xbf: + dev->pci_conf[addr] = val; + break; + + case 0xc0: + dev->pci_conf[addr] = val & 0x90; + break; + case 0xc1: + case 0xc2: + case 0xc3: + dev->pci_conf[addr] = val; + break; + + case 0xc8: + case 0xc9: + dev->pci_conf[addr] = val; + break; + + case 0xd1: + dev->pci_conf[addr] = val & 0xf1; + break; + case 0xd2: + case 0xd3: + dev->pci_conf[addr] = val; + break; + + case 0xe0: + case 0xe1: + if (dev->pci_conf[0x90] & 0x20) + dev->pci_conf[addr] = val; + break; + case 0xe2: + if (dev->pci_conf[0x90] & 0x20) + dev->pci_conf[addr] = val & 0x3f; + break; + case 0xe3: + if (dev->pci_conf[0x90] & 0x20) + dev->pci_conf[addr] = val & 0xfe; + break; + + case 0xe4: + if (dev->pci_conf[0x90] & 0x20) + dev->pci_conf[addr] = val & 0x03; + break; + case 0xe5: + if (dev->pci_conf[0x90] & 0x20) + dev->pci_conf[addr] = val; + break; + + case 0xe6: + if (dev->pci_conf[0x90] & 0x20) + dev->pci_conf[addr] = val & 0xc0; + break; + + case 0xe7: + if (dev->pci_conf[0x90] & 0x20) + dev->pci_conf[addr] = val; + break; + + case 0xe8: + case 0xe9: + if (dev->pci_conf[0x90] & 0x04) + dev->pci_conf[addr] = val; + break; + + case 0xea: + dev->pci_conf[addr] = val & 0xcf; + break; + + case 0xeb: + dev->pci_conf[addr] = val & 0xcf; + break; + + case 0xec: + dev->pci_conf[addr] = val & 0x3f; + break; + + case 0xed: + dev->pci_conf[addr] = val; + break; + + case 0xee: + dev->pci_conf[addr] = val & 0x3e; + break; + case 0xef: + dev->pci_conf[addr] = val; + break; + + case 0xf3: + dev->pci_conf[addr] = val & 0x08; + break; + + case 0xf5: + dev->pci_conf[addr] = val; + break; + + case 0xf6: + dev->pci_conf[addr] = val; + break; + + case 0xf7: + dev->pci_conf[addr] = val & 0x43; + break; } } - static uint8_t ali1541_read(int func, int addr, void *priv) { - ali1541_t *dev = (ali1541_t *)priv; - uint8_t ret = 0xff; + ali1541_t *dev = (ali1541_t *) priv; + uint8_t ret = 0xff; ret = dev->pci_conf[addr]; return ret; } - static void ali1541_reset(void *priv) { - ali1541_t *dev = (ali1541_t *)priv; - int i; + ali1541_t *dev = (ali1541_t *) priv; + int i; /* Default Registers */ dev->pci_conf[0x00] = 0xb9; @@ -603,31 +601,29 @@ ali1541_reset(void *priv) ali1541_write(0, 0x55, 0x00, dev); for (i = 0; i < 4; i++) - ali1541_write(0, 0x56 + i, 0x00, dev); + ali1541_write(0, 0x56 + i, 0x00, dev); ali1541_write(0, 0x60 + i, 0x07, dev); ali1541_write(0, 0x61 + i, 0x40, dev); for (i = 0; i < 14; i += 2) { - ali1541_write(0, 0x62 + i, 0x00, dev); - ali1541_write(0, 0x63 + i, 0x00, dev); + ali1541_write(0, 0x62 + i, 0x00, dev); + ali1541_write(0, 0x63 + i, 0x00, dev); } } - static void ali1541_close(void *priv) { - ali1541_t *dev = (ali1541_t *)priv; + ali1541_t *dev = (ali1541_t *) priv; smram_del(dev->smram); free(dev); } - static void * ali1541_init(const device_t *info) { - ali1541_t *dev = (ali1541_t *)malloc(sizeof(ali1541_t)); + ali1541_t *dev = (ali1541_t *) malloc(sizeof(ali1541_t)); memset(dev, 0, sizeof(ali1541_t)); pci_add_card(PCI_ADD_NORTHBRIDGE, ali1541_read, ali1541_write, dev); @@ -642,15 +638,15 @@ ali1541_init(const device_t *info) } const device_t ali1541_device = { - .name = "ALi M1541 CPU-to-PCI Bridge", + .name = "ALi M1541 CPU-to-PCI Bridge", .internal_name = "ali1541", - .flags = DEVICE_PCI, - .local = 0, - .init = ali1541_init, - .close = ali1541_close, - .reset = ali1541_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = ali1541_init, + .close = ali1541_close, + .reset = ali1541_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/ali1543.c b/src/chipset/ali1543.c index bbbf7d705..04f3f70c8 100644 --- a/src/chipset/ali1543.c +++ b/src/chipset/ali1543.c @@ -46,22 +46,20 @@ #include <86box/chipset.h> +typedef struct ali1543_t { + uint8_t pci_conf[256], pmu_conf[256], usb_conf[256], ide_conf[256], + pci_slot, ide_slot, usb_slot, pmu_slot, usb_dev_enable, ide_dev_enable, + pmu_dev_enable, type; + int offset; -typedef struct ali1543_t -{ - uint8_t pci_conf[256], pmu_conf[256], usb_conf[256], ide_conf[256], - pci_slot, ide_slot, usb_slot, pmu_slot, usb_dev_enable, ide_dev_enable, - pmu_dev_enable, type; - int offset; - - apm_t * apm; - acpi_t * acpi; - ddma_t * ddma; - nvr_t * nvr; - port_92_t * port_92; - sff8038i_t * ide_controller[2]; - smbus_ali7101_t * smbus; - usb_t * usb; + apm_t *apm; + acpi_t *acpi; + ddma_t *ddma; + nvr_t *nvr; + port_92_t *port_92; + sff8038i_t *ide_controller[2]; + smbus_ali7101_t *smbus; + usb_t *usb; } ali1543_t; @@ -75,9 +73,8 @@ typedef struct ali1543_t - Code quality is abysmal and needs lot's of cleanup. */ -int ali1533_irq_routing[16] = { PCI_IRQ_DISABLED, 9, 3, 10, 4, 5, 7, 6, - 1, 11, PCI_IRQ_DISABLED, 12, PCI_IRQ_DISABLED, 14, PCI_IRQ_DISABLED, 15 }; - +int ali1533_irq_routing[16] = { PCI_IRQ_DISABLED, 9, 3, 10, 4, 5, 7, 6, + 1, 11, PCI_IRQ_DISABLED, 12, PCI_IRQ_DISABLED, 14, PCI_IRQ_DISABLED, 15 }; #ifdef ENABLE_ALI1543_LOG int ali1543_do_log = ENABLE_ALI1543_LOG; @@ -86,380 +83,384 @@ ali1543_log(const char *fmt, ...) { va_list ap; - if (ali1543_do_log) - { + if (ali1543_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define ali1543_log(fmt, ...) +# define ali1543_log(fmt, ...) #endif - static void ali1533_ddma_handler(ali1543_t *dev) { /* TODO: Find any documentation that actually explains the ALi southbridge DDMA mapping. */ } +static void ali5229_ide_handler(ali1543_t *dev); +static void ali5229_ide_irq_handler(ali1543_t *dev); -static void ali5229_ide_handler(ali1543_t *dev); -static void ali5229_ide_irq_handler(ali1543_t *dev); - -static void ali5229_write(int func, int addr, uint8_t val, void *priv); - -static void ali7101_write(int func, int addr, uint8_t val, void *priv); -static uint8_t ali7101_read(int func, int addr, void *priv); +static void ali5229_write(int func, int addr, uint8_t val, void *priv); +static void ali7101_write(int func, int addr, uint8_t val, void *priv); +static uint8_t ali7101_read(int func, int addr, void *priv); static void ali1533_write(int func, int addr, uint8_t val, void *priv) { - ali1543_t *dev = (ali1543_t *)priv; - int irq; + ali1543_t *dev = (ali1543_t *) priv; + int irq; ali1543_log("M1533: dev->pci_conf[%02x] = %02x\n", addr, val); if (func > 0) - return; + return; switch (addr) { - case 0x04: /* Command Register */ - if (dev->type == 1) { - if (dev->pci_conf[0x5f] & 0x08) - dev->pci_conf[0x04] = val & 0x0f; - else - dev->pci_conf[0x04] = val; - } else { - if (!(dev->pci_conf[0x5f] & 0x08)) - dev->pci_conf[0x04] = val; - } - break; - case 0x05: /* Command Register */ - if (!(dev->pci_conf[0x5f] & 0x08)) - dev->pci_conf[0x04] = val & 0x03; - break; + case 0x04: /* Command Register */ + if (dev->type == 1) { + if (dev->pci_conf[0x5f] & 0x08) + dev->pci_conf[0x04] = val & 0x0f; + else + dev->pci_conf[0x04] = val; + } else { + if (!(dev->pci_conf[0x5f] & 0x08)) + dev->pci_conf[0x04] = val; + } + break; + case 0x05: /* Command Register */ + if (!(dev->pci_conf[0x5f] & 0x08)) + dev->pci_conf[0x04] = val & 0x03; + break; - case 0x07: /* Status Byte */ - dev->pci_conf[addr] &= ~(val & 0x30); - break; + case 0x07: /* Status Byte */ + dev->pci_conf[addr] &= ~(val & 0x30); + break; - case 0x2c: /* Subsystem Vendor ID */ - case 0x2d: - case 0x2e: - case 0x2f: - if (!(dev->pci_conf[0x74] & 0x40)) - dev->pci_conf[addr] = val; - break; + case 0x2c: /* Subsystem Vendor ID */ + case 0x2d: + case 0x2e: + case 0x2f: + if (!(dev->pci_conf[0x74] & 0x40)) + dev->pci_conf[addr] = val; + break; - case 0x40: - dev->pci_conf[addr] = val & 0x7f; - break; + case 0x40: + dev->pci_conf[addr] = val & 0x7f; + break; - case 0x41: - /* TODO: Bit 7 selects keyboard controller type: - 0 = AT, 1 = PS/2 */ - keyboard_at_set_mouse_scan((val & 0x40) ? 1 : 0); - dev->pci_conf[addr] = val & 0xbf; - break; + case 0x41: + /* TODO: Bit 7 selects keyboard controller type: + 0 = AT, 1 = PS/2 */ + keyboard_at_set_mouse_scan((val & 0x40) ? 1 : 0); + dev->pci_conf[addr] = val & 0xbf; + break; - case 0x42: /* ISA Bus Speed */ - dev->pci_conf[addr] = val & 0xcf; - switch (val & 7) { - case 0: - cpu_set_isa_speed(7159091); - break; - case 1: case 2: case 3: case 4: - case 5: case 6: - cpu_set_isa_pci_div((val & 7) + 1); - break; - } - break; + case 0x42: /* ISA Bus Speed */ + dev->pci_conf[addr] = val & 0xcf; + switch (val & 7) { + case 0: + cpu_set_isa_speed(7159091); + break; + case 1: + case 2: + case 3: + case 4: + case 5: + case 6: + cpu_set_isa_pci_div((val & 7) + 1); + break; + } + break; - case 0x43: - dev->pci_conf[addr] = val; - if (val & 0x80) - port_92_add(dev->port_92); - else - port_92_remove(dev->port_92); - break; + case 0x43: + dev->pci_conf[addr] = val; + if (val & 0x80) + port_92_add(dev->port_92); + else + port_92_remove(dev->port_92); + break; - /* We're going to cheat a little bit here and use MIRQ's as a substitute for the ALi's INTAJ's, - as they work pretty much the same - specifically, we're going to use MIRQ2 and MIRQ3 for them, - as MIRQ0 and MIRQ1 map to the ALi's MBIRQ0 and MBIRQ1. */ - case 0x44: /* Set IRQ Line for Primary IDE if it's on native mode */ - dev->pci_conf[addr] = val & 0xdf; - soft_reset_pci = !!(val & 0x80); - sff_set_irq_level(dev->ide_controller[0], 0, !(val & 0x10)); - sff_set_irq_level(dev->ide_controller[1], 0, !(val & 0x10)); - ali1543_log("INTAJ = IRQ %i\n", ali1533_irq_routing[val & 0x0f]); - pci_set_mirq_routing(PCI_MIRQ0, ali1533_irq_routing[val & 0x0f]); - pci_set_mirq_routing(PCI_MIRQ2, ali1533_irq_routing[val & 0x0f]); - break; + /* We're going to cheat a little bit here and use MIRQ's as a substitute for the ALi's INTAJ's, + as they work pretty much the same - specifically, we're going to use MIRQ2 and MIRQ3 for them, + as MIRQ0 and MIRQ1 map to the ALi's MBIRQ0 and MBIRQ1. */ + case 0x44: /* Set IRQ Line for Primary IDE if it's on native mode */ + dev->pci_conf[addr] = val & 0xdf; + soft_reset_pci = !!(val & 0x80); + sff_set_irq_level(dev->ide_controller[0], 0, !(val & 0x10)); + sff_set_irq_level(dev->ide_controller[1], 0, !(val & 0x10)); + ali1543_log("INTAJ = IRQ %i\n", ali1533_irq_routing[val & 0x0f]); + pci_set_mirq_routing(PCI_MIRQ0, ali1533_irq_routing[val & 0x0f]); + pci_set_mirq_routing(PCI_MIRQ2, ali1533_irq_routing[val & 0x0f]); + break; - /* TODO: Implement a ROMCS# assertion bitmask for I/O ports. */ - case 0x45: /* DDMA Enable */ - dev->pci_conf[addr] = val & 0xcb; - ali1533_ddma_handler(dev); - break; + /* TODO: Implement a ROMCS# assertion bitmask for I/O ports. */ + case 0x45: /* DDMA Enable */ + dev->pci_conf[addr] = val & 0xcb; + ali1533_ddma_handler(dev); + break; - /* TODO: For 0x47, we need a way to obtain the memory state for an address - and toggle ROMCS#. */ - case 0x47: /* BIOS chip select control */ - dev->pci_conf[addr] = val; - break; + /* TODO: For 0x47, we need a way to obtain the memory state for an address + and toggle ROMCS#. */ + case 0x47: /* BIOS chip select control */ + dev->pci_conf[addr] = val; + break; - /* PCI IRQ Routing */ - case 0x48: case 0x49: case 0x4a: case 0x4b: - dev->pci_conf[addr] = val; + /* PCI IRQ Routing */ + case 0x48: + case 0x49: + case 0x4a: + case 0x4b: + dev->pci_conf[addr] = val; - pci_set_irq_routing(((addr & 0x03) << 1) + 2, ali1533_irq_routing[(val >> 4) & 0x0f]); - pci_set_irq_routing(((addr & 0x03) << 1) + 1, ali1533_irq_routing[val & 0x0f]); - break; + pci_set_irq_routing(((addr & 0x03) << 1) + 2, ali1533_irq_routing[(val >> 4) & 0x0f]); + pci_set_irq_routing(((addr & 0x03) << 1) + 1, ali1533_irq_routing[val & 0x0f]); + break; - case 0x4c: /* PCI INT to ISA Level to Edge transfer */ - dev->pci_conf[addr] = val; + case 0x4c: /* PCI INT to ISA Level to Edge transfer */ + dev->pci_conf[addr] = val; - for (irq = 1; irq < 9; irq++) - pci_set_irq_level(irq, !(val & (1 << (irq - 1)))); - break; + for (irq = 1; irq < 9; irq++) + pci_set_irq_level(irq, !(val & (1 << (irq - 1)))); + break; - case 0x4d: /* MBIRQ0(SIRQI#), MBIRQ1(SIRQII#) Interrupt to ISA IRQ routing table */ - if (dev->type == 0) { - dev->pci_conf[addr] = val; + case 0x4d: /* MBIRQ0(SIRQI#), MBIRQ1(SIRQII#) Interrupt to ISA IRQ routing table */ + if (dev->type == 0) { + dev->pci_conf[addr] = val; - ali1543_log("SIRQI = IRQ %i; SIRQII = IRQ %i\n", ali1533_irq_routing[(val >> 4) & 0x0f], ali1533_irq_routing[val & 0x0f]); - // pci_set_mirq_routing(PCI_MIRQ0, ali1533_irq_routing[(val >> 4) & 0x0f]); - // pci_set_mirq_routing(PCI_MIRQ1, ali1533_irq_routing[val & 0x0f]); - } - break; + ali1543_log("SIRQI = IRQ %i; SIRQII = IRQ %i\n", ali1533_irq_routing[(val >> 4) & 0x0f], ali1533_irq_routing[val & 0x0f]); + // pci_set_mirq_routing(PCI_MIRQ0, ali1533_irq_routing[(val >> 4) & 0x0f]); + // pci_set_mirq_routing(PCI_MIRQ1, ali1533_irq_routing[val & 0x0f]); + } + break; - /* I/O cycle posted-write first port definition */ - case 0x50: - dev->pci_conf[addr] = val; - break; - case 0x51: - dev->pci_conf[addr] = val & 0x8f; - break; + /* I/O cycle posted-write first port definition */ + case 0x50: + dev->pci_conf[addr] = val; + break; + case 0x51: + dev->pci_conf[addr] = val & 0x8f; + break; - /* I/O cycle posted-write second port definition */ - case 0x52: - dev->pci_conf[addr] = val; - break; - case 0x53: - if (dev->type == 1) - dev->pci_conf[addr] = val; - else - dev->pci_conf[addr] = val & 0xcf; - /* This actually enables/disables the USB *device* rather than the interface itself. */ - dev->usb_dev_enable = !(val & 0x40); - break; + /* I/O cycle posted-write second port definition */ + case 0x52: + dev->pci_conf[addr] = val; + break; + case 0x53: + if (dev->type == 1) + dev->pci_conf[addr] = val; + else + dev->pci_conf[addr] = val & 0xcf; + /* This actually enables/disables the USB *device* rather than the interface itself. */ + dev->usb_dev_enable = !(val & 0x40); + break; - /* Hardware setting status bits, read-only (register 0x54) */ + /* Hardware setting status bits, read-only (register 0x54) */ - /* Programmable chip select (pin PCSJ) address define */ - case 0x55: case 0x56: - dev->pci_conf[addr] = val; - break; - case 0x57: - if (dev->type == 1) - dev->pci_conf[addr] = val & 0xf0; - else - dev->pci_conf[addr] = val & 0xe0; - break; + /* Programmable chip select (pin PCSJ) address define */ + case 0x55: + case 0x56: + dev->pci_conf[addr] = val; + break; + case 0x57: + if (dev->type == 1) + dev->pci_conf[addr] = val & 0xf0; + else + dev->pci_conf[addr] = val & 0xe0; + break; - /* IDE interface control */ - case 0x58: - dev->pci_conf[addr] = val & 0x7f; - ali1543_log("PCI58: %02X\n", val); - dev->ide_dev_enable = !!(val & 0x40); - switch (val & 0x30) { - case 0x00: - dev->ide_slot = 0x10; /* A27 = slot 16 */ - break; - case 0x10: - dev->ide_slot = 0x0f; /* A26 = slot 15 */ - break; - case 0x20: - dev->ide_slot = 0x0e; /* A25 = slot 14 */ - break; - case 0x30: - dev->ide_slot = 0x0d; /* A24 = slot 13 */ - break; - } - pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_IDE, ((int) dev->ide_slot) + dev->offset); - ali1543_log("IDE slot = %02X (A%0i)\n", ((int) dev->ide_slot) + dev->offset, dev->ide_slot + 11); - ali5229_ide_irq_handler(dev); - break; + /* IDE interface control */ + case 0x58: + dev->pci_conf[addr] = val & 0x7f; + ali1543_log("PCI58: %02X\n", val); + dev->ide_dev_enable = !!(val & 0x40); + switch (val & 0x30) { + case 0x00: + dev->ide_slot = 0x10; /* A27 = slot 16 */ + break; + case 0x10: + dev->ide_slot = 0x0f; /* A26 = slot 15 */ + break; + case 0x20: + dev->ide_slot = 0x0e; /* A25 = slot 14 */ + break; + case 0x30: + dev->ide_slot = 0x0d; /* A24 = slot 13 */ + break; + } + pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_IDE, ((int) dev->ide_slot) + dev->offset); + ali1543_log("IDE slot = %02X (A%0i)\n", ((int) dev->ide_slot) + dev->offset, dev->ide_slot + 11); + ali5229_ide_irq_handler(dev); + break; - /* General Purpose input multiplexed pin(GPI) select */ - case 0x59: - dev->pci_conf[addr] = val & 0x0e; - break; + /* General Purpose input multiplexed pin(GPI) select */ + case 0x59: + dev->pci_conf[addr] = val & 0x0e; + break; - /* General Purpose output multiplexed pin(GPO) select low */ - case 0x5a: - dev->pci_conf[addr] = val & 0x0f; - break; - /* General Purpose output multiplexed pin(GPO) select high */ - case 0x5b: - dev->pci_conf[addr] = val & 0x02; - break; + /* General Purpose output multiplexed pin(GPO) select low */ + case 0x5a: + dev->pci_conf[addr] = val & 0x0f; + break; + /* General Purpose output multiplexed pin(GPO) select high */ + case 0x5b: + dev->pci_conf[addr] = val & 0x02; + break; - case 0x5c: - dev->pci_conf[addr] = val & 0x7f; - break; - case 0x5d: - dev->pci_conf[addr] = val & 0x02; - break; + case 0x5c: + dev->pci_conf[addr] = val & 0x7f; + break; + case 0x5d: + dev->pci_conf[addr] = val & 0x02; + break; - case 0x5e: - if (dev->type == 1) - dev->pci_conf[addr] = val & 0xe1; - else - dev->pci_conf[addr] = val & 0xe0; - break; + case 0x5e: + if (dev->type == 1) + dev->pci_conf[addr] = val & 0xe1; + else + dev->pci_conf[addr] = val & 0xe0; + break; - case 0x5f: - dev->pci_conf[addr] = val; - dev->pmu_dev_enable = !(val & 0x04); - break; + case 0x5f: + dev->pci_conf[addr] = val; + dev->pmu_dev_enable = !(val & 0x04); + break; - case 0x6c: /* Deleted - no idea what it used to do */ - dev->pci_conf[addr] = val; - break; + case 0x6c: /* Deleted - no idea what it used to do */ + dev->pci_conf[addr] = val; + break; - case 0x6d: - dev->pci_conf[addr] = val & 0xbf; - break; + case 0x6d: + dev->pci_conf[addr] = val & 0xbf; + break; - case 0x6e: case 0x70: - dev->pci_conf[addr] = val; - break; + case 0x6e: + case 0x70: + dev->pci_conf[addr] = val; + break; - case 0x71: - dev->pci_conf[addr] = val & 0xef; - break; + case 0x71: + dev->pci_conf[addr] = val & 0xef; + break; - case 0x72: - dev->pci_conf[addr] = val & 0xef; - switch (val & 0x0c) { - case 0x00: - dev->pmu_slot = 0x11; /* A28 = slot 17 */ - break; - case 0x04: - dev->pmu_slot = 0x12; /* A29 = slot 18 */ - break; - case 0x08: - dev->pmu_slot = 0x03; /* A14 = slot 03 */ - break; - case 0x0c: - dev->pmu_slot = 0x04; /* A15 = slot 04 */ - break; - } - pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_PMU, ((int) dev->pmu_slot) + dev->offset); - ali1543_log("PMU slot = %02X (A%0i)\n", ((int) dev->pmu_slot) + dev->offset, dev->pmu_slot + 11); - switch (val & 0x03) { - case 0x00: - dev->usb_slot = 0x14; /* A31 = slot 20 */ - break; - case 0x01: - dev->usb_slot = 0x13; /* A30 = slot 19 */ - break; - case 0x02: - dev->usb_slot = 0x02; /* A13 = slot 02 */ - break; - case 0x03: - dev->usb_slot = 0x01; /* A12 = slot 01 */ - break; - } - pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_USB, ((int) dev->usb_slot) + dev->offset); - ali1543_log("USB slot = %02X (A%0i)\n", ((int) dev->usb_slot) + dev->offset, dev->usb_slot + 11); - break; + case 0x72: + dev->pci_conf[addr] = val & 0xef; + switch (val & 0x0c) { + case 0x00: + dev->pmu_slot = 0x11; /* A28 = slot 17 */ + break; + case 0x04: + dev->pmu_slot = 0x12; /* A29 = slot 18 */ + break; + case 0x08: + dev->pmu_slot = 0x03; /* A14 = slot 03 */ + break; + case 0x0c: + dev->pmu_slot = 0x04; /* A15 = slot 04 */ + break; + } + pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_PMU, ((int) dev->pmu_slot) + dev->offset); + ali1543_log("PMU slot = %02X (A%0i)\n", ((int) dev->pmu_slot) + dev->offset, dev->pmu_slot + 11); + switch (val & 0x03) { + case 0x00: + dev->usb_slot = 0x14; /* A31 = slot 20 */ + break; + case 0x01: + dev->usb_slot = 0x13; /* A30 = slot 19 */ + break; + case 0x02: + dev->usb_slot = 0x02; /* A13 = slot 02 */ + break; + case 0x03: + dev->usb_slot = 0x01; /* A12 = slot 01 */ + break; + } + pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_USB, ((int) dev->usb_slot) + dev->offset); + ali1543_log("USB slot = %02X (A%0i)\n", ((int) dev->usb_slot) + dev->offset, dev->usb_slot + 11); + break; - case 0x73: /* DDMA Base Address */ - dev->pci_conf[addr] = val; - ali1533_ddma_handler(dev); - break; + case 0x73: /* DDMA Base Address */ + dev->pci_conf[addr] = val; + ali1533_ddma_handler(dev); + break; - case 0x74: /* USB IRQ Routing - we cheat and use MIRQ4 */ - dev->pci_conf[addr] = val & 0xdf; - /* TODO: MIRQ level/edge control - if bit 4 = 1, it's level */ - pci_set_mirq_routing(PCI_MIRQ4, ali1533_irq_routing[val & 0x0f]); - break; + case 0x74: /* USB IRQ Routing - we cheat and use MIRQ4 */ + dev->pci_conf[addr] = val & 0xdf; + /* TODO: MIRQ level/edge control - if bit 4 = 1, it's level */ + pci_set_mirq_routing(PCI_MIRQ4, ali1533_irq_routing[val & 0x0f]); + break; - case 0x75: /* Set IRQ Line for Secondary IDE if it's on native mode */ - dev->pci_conf[addr] = val & 0x1f; - sff_set_irq_level(dev->ide_controller[0], 1, !(val & 0x10)); - sff_set_irq_level(dev->ide_controller[1], 1, !(val & 0x10)); - ali1543_log("INTBJ = IRQ %i\n", ali1533_irq_routing[val & 0x0f]); - pci_set_mirq_routing(PCI_MIRQ1, ali1533_irq_routing[val & 0x0f]); - pci_set_mirq_routing(PCI_MIRQ3, ali1533_irq_routing[val & 0x0f]); - break; + case 0x75: /* Set IRQ Line for Secondary IDE if it's on native mode */ + dev->pci_conf[addr] = val & 0x1f; + sff_set_irq_level(dev->ide_controller[0], 1, !(val & 0x10)); + sff_set_irq_level(dev->ide_controller[1], 1, !(val & 0x10)); + ali1543_log("INTBJ = IRQ %i\n", ali1533_irq_routing[val & 0x0f]); + pci_set_mirq_routing(PCI_MIRQ1, ali1533_irq_routing[val & 0x0f]); + pci_set_mirq_routing(PCI_MIRQ3, ali1533_irq_routing[val & 0x0f]); + break; - case 0x76: /* PMU IRQ Routing - we cheat and use MIRQ5 */ - if (dev->type == 1) - dev->pci_conf[addr] = val & 0x9f; - else - dev->pci_conf[addr] = val & 0x1f; - acpi_set_mirq_is_level(dev->acpi, !!(val & 0x10)); - if ((dev->type == 1) && (val & 0x80)) - pci_set_mirq_routing(PCI_MIRQ5, PCI_IRQ_DISABLED); - else - pci_set_mirq_routing(PCI_MIRQ5, ali1533_irq_routing[val & 0x0f]); - /* TODO: Tell ACPI to use MIRQ5 */ - break; + case 0x76: /* PMU IRQ Routing - we cheat and use MIRQ5 */ + if (dev->type == 1) + dev->pci_conf[addr] = val & 0x9f; + else + dev->pci_conf[addr] = val & 0x1f; + acpi_set_mirq_is_level(dev->acpi, !!(val & 0x10)); + if ((dev->type == 1) && (val & 0x80)) + pci_set_mirq_routing(PCI_MIRQ5, PCI_IRQ_DISABLED); + else + pci_set_mirq_routing(PCI_MIRQ5, ali1533_irq_routing[val & 0x0f]); + /* TODO: Tell ACPI to use MIRQ5 */ + break; - case 0x77: /* SMBus IRQ Routing - we cheat and use MIRQ6 */ - dev->pci_conf[addr] = val & 0x1f; - pci_set_mirq_routing(PCI_MIRQ6, ali1533_irq_routing[val & 0x0f]); - break; + case 0x77: /* SMBus IRQ Routing - we cheat and use MIRQ6 */ + dev->pci_conf[addr] = val & 0x1f; + pci_set_mirq_routing(PCI_MIRQ6, ali1533_irq_routing[val & 0x0f]); + break; - case 0x78: - if (dev->type == 1) { - ali1543_log("PCI78 = %02X\n", val); - dev->pci_conf[addr] = val & 0x33; - } - break; + case 0x78: + if (dev->type == 1) { + ali1543_log("PCI78 = %02X\n", val); + dev->pci_conf[addr] = val & 0x33; + } + break; - case 0x7c ... 0xff: - if ((dev->type == 1) && !dev->pmu_dev_enable) { - dev->pmu_dev_enable = 1; - ali7101_write(func, addr, val, priv); - dev->pmu_dev_enable = 0; - } - break; + case 0x7c ... 0xff: + if ((dev->type == 1) && !dev->pmu_dev_enable) { + dev->pmu_dev_enable = 1; + ali7101_write(func, addr, val, priv); + dev->pmu_dev_enable = 0; + } + break; } } static uint8_t ali1533_read(int func, int addr, void *priv) { - ali1543_t *dev = (ali1543_t *)priv; - uint8_t ret = 0xff; + ali1543_t *dev = (ali1543_t *) priv; + uint8_t ret = 0xff; if (func == 0) { - if (((dev->pci_conf[0x42] & 0x80) && (addr >= 0x40)) || ((dev->pci_conf[0x5f] & 8) && (addr == 4))) - ret = 0x00; - else { - ret = dev->pci_conf[addr]; - if (addr == 0x41) - ret |= (keyboard_at_get_mouse_scan() << 2); - else if (addr == 0x58) - ret = (ret & 0xbf) | (dev->ide_dev_enable ? 0x40 : 0x00); - else if ((dev->type == 1) && ((addr >= 0x7c) && (addr <= 0xff)) && !dev->pmu_dev_enable) { - dev->pmu_dev_enable = 1; - ret = ali7101_read(func, addr, priv); - dev->pmu_dev_enable = 0; - } - } + if (((dev->pci_conf[0x42] & 0x80) && (addr >= 0x40)) || ((dev->pci_conf[0x5f] & 8) && (addr == 4))) + ret = 0x00; + else { + ret = dev->pci_conf[addr]; + if (addr == 0x41) + ret |= (keyboard_at_get_mouse_scan() << 2); + else if (addr == 0x58) + ret = (ret & 0xbf) | (dev->ide_dev_enable ? 0x40 : 0x00); + else if ((dev->type == 1) && ((addr >= 0x7c) && (addr <= 0xff)) && !dev->pmu_dev_enable) { + dev->pmu_dev_enable = 1; + ret = ali7101_read(func, addr, priv); + dev->pmu_dev_enable = 0; + } + } } return ret; } - static void ali5229_ide_irq_handler(ali1543_t *dev) { @@ -467,85 +468,84 @@ ali5229_ide_irq_handler(ali1543_t *dev) int bit = 0; if (dev->ide_conf[0x52] & 0x10) { - ctl ^= 1; - ch ^= 1; - bit ^= 5; + ctl ^= 1; + ch ^= 1; + bit ^= 5; } if (dev->ide_conf[0x09] & (1 ^ bit)) { - /* Primary IDE is native. */ - ali1543_log("Primary IDE IRQ mode: Native, Native\n"); - sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 4); - sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 4); + /* Primary IDE is native. */ + ali1543_log("Primary IDE IRQ mode: Native, Native\n"); + sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 4); + sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 4); } else { - /* Primary IDE is legacy. */ - switch (dev->pci_conf[0x58] & 0x03) { - case 0x00: - /* SIRQI, SIRQII */ - ali1543_log("Primary IDE IRQ mode: SIRQI, SIRQII\n"); - sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 2); - sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 5); - break; - case 0x01: - /* IRQ14, IRQ15 */ - ali1543_log("Primary IDE IRQ mode: IRQ14, IRQ15\n"); - sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0); - sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 0); - break; - case 0x02: - /* IRQ14, SIRQII */ - ali1543_log("Primary IDE IRQ mode: IRQ14, SIRQII\n"); - sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0); - sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 5); - break; - case 0x03: - /* IRQ14, SIRQI */ - ali1543_log("Primary IDE IRQ mode: IRQ14, SIRQI\n"); - sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0); - sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 2); - break; - } + /* Primary IDE is legacy. */ + switch (dev->pci_conf[0x58] & 0x03) { + case 0x00: + /* SIRQI, SIRQII */ + ali1543_log("Primary IDE IRQ mode: SIRQI, SIRQII\n"); + sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 2); + sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 5); + break; + case 0x01: + /* IRQ14, IRQ15 */ + ali1543_log("Primary IDE IRQ mode: IRQ14, IRQ15\n"); + sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0); + sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 0); + break; + case 0x02: + /* IRQ14, SIRQII */ + ali1543_log("Primary IDE IRQ mode: IRQ14, SIRQII\n"); + sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0); + sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 5); + break; + case 0x03: + /* IRQ14, SIRQI */ + ali1543_log("Primary IDE IRQ mode: IRQ14, SIRQI\n"); + sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0); + sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 2); + break; + } } ctl ^= 1; if (dev->ide_conf[0x09] & (4 ^ bit)) { - /* Secondary IDE is native. */ - ali1543_log("Secondary IDE IRQ mode: Native, Native\n"); - sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 4); - sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 4); + /* Secondary IDE is native. */ + ali1543_log("Secondary IDE IRQ mode: Native, Native\n"); + sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 4); + sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 4); } else { - /* Secondary IDE is legacy. */ - switch (dev->pci_conf[0x58] & 0x03) { - case 0x00: - /* SIRQI, SIRQII */ - ali1543_log("Secondary IDE IRQ mode: SIRQI, SIRQII\n"); - sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 2); - sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 5); - break; - case 0x01: - /* IRQ14, IRQ15 */ - ali1543_log("Secondary IDE IRQ mode: IRQ14, IRQ15\n"); - sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0); - sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 0); - break; - case 0x02: - /* IRQ14, SIRQII */ - ali1543_log("Secondary IDE IRQ mode: IRQ14, SIRQII\n"); - sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0); - sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 5); - break; - case 0x03: - /* IRQ14, SIRQI */ - ali1543_log("Secondary IDE IRQ mode: IRQ14, SIRQI\n"); - sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0); - sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 2); - break; - } + /* Secondary IDE is legacy. */ + switch (dev->pci_conf[0x58] & 0x03) { + case 0x00: + /* SIRQI, SIRQII */ + ali1543_log("Secondary IDE IRQ mode: SIRQI, SIRQII\n"); + sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 2); + sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 5); + break; + case 0x01: + /* IRQ14, IRQ15 */ + ali1543_log("Secondary IDE IRQ mode: IRQ14, IRQ15\n"); + sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0); + sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 0); + break; + case 0x02: + /* IRQ14, SIRQII */ + ali1543_log("Secondary IDE IRQ mode: IRQ14, SIRQII\n"); + sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0); + sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 5); + break; + case 0x03: + /* IRQ14, SIRQI */ + ali1543_log("Secondary IDE IRQ mode: IRQ14, SIRQI\n"); + sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0); + sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 2); + break; + } } } - static void ali5229_ide_handler(ali1543_t *dev) { @@ -565,24 +565,24 @@ ali5229_ide_handler(ali1543_t *dev) /* Primary Channel Programming */ if (dev->ide_conf[0x52] & 0x10) { - current_pri_base = (!(dev->ide_conf[0x09] & 1)) ? comp_base_sec_addr : native_base_sec_addr; - current_pri_side = (!(dev->ide_conf[0x09] & 1)) ? comp_side_sec_addr : native_side_sec_addr; + current_pri_base = (!(dev->ide_conf[0x09] & 1)) ? comp_base_sec_addr : native_base_sec_addr; + current_pri_side = (!(dev->ide_conf[0x09] & 1)) ? comp_side_sec_addr : native_side_sec_addr; } else { - current_pri_base = (!(dev->ide_conf[0x09] & 1)) ? comp_base_pri_addr : native_base_pri_addr; - current_pri_side = (!(dev->ide_conf[0x09] & 1)) ? comp_side_pri_addr : native_side_pri_addr; + current_pri_base = (!(dev->ide_conf[0x09] & 1)) ? comp_base_pri_addr : native_base_pri_addr; + current_pri_side = (!(dev->ide_conf[0x09] & 1)) ? comp_side_pri_addr : native_side_pri_addr; } /* Secondary Channel Programming */ if (dev->ide_conf[0x52] & 0x10) { - current_sec_base = (!(dev->ide_conf[0x09] & 4)) ? comp_base_pri_addr : native_base_pri_addr; - current_sec_side = (!(dev->ide_conf[0x09] & 4)) ? comp_side_pri_addr : native_side_pri_addr; + current_sec_base = (!(dev->ide_conf[0x09] & 4)) ? comp_base_pri_addr : native_base_pri_addr; + current_sec_side = (!(dev->ide_conf[0x09] & 4)) ? comp_side_pri_addr : native_side_pri_addr; } else { - current_sec_base = (!(dev->ide_conf[0x09] & 4)) ? comp_base_sec_addr : native_base_sec_addr; - current_sec_side = (!(dev->ide_conf[0x09] & 4)) ? comp_side_sec_addr : native_side_sec_addr; + current_sec_base = (!(dev->ide_conf[0x09] & 4)) ? comp_base_sec_addr : native_base_sec_addr; + current_sec_side = (!(dev->ide_conf[0x09] & 4)) ? comp_side_sec_addr : native_side_sec_addr; } if (dev->ide_conf[0x52] & 0x10) - ch ^= 8; + ch ^= 8; ali1543_log("ali5229_ide_handler(): Disabling primary IDE...\n"); ide_pri_disable(); @@ -590,40 +590,39 @@ ali5229_ide_handler(ali1543_t *dev) ide_sec_disable(); if (dev->ide_conf[0x04] & 0x01) { - /* Primary Channel Setup */ - if ((dev->ide_conf[0x09] & 0x20) || (dev->ide_conf[0x4d] & 0x80)) { - ali1543_log("ali5229_ide_handler(): Primary IDE base now %04X...\n", current_pri_base); - ide_set_base(0, current_pri_base); - ali1543_log("ali5229_ide_handler(): Primary IDE side now %04X...\n", current_pri_side); - ide_set_side(0, current_pri_side); + /* Primary Channel Setup */ + if ((dev->ide_conf[0x09] & 0x20) || (dev->ide_conf[0x4d] & 0x80)) { + ali1543_log("ali5229_ide_handler(): Primary IDE base now %04X...\n", current_pri_base); + ide_set_base(0, current_pri_base); + ali1543_log("ali5229_ide_handler(): Primary IDE side now %04X...\n", current_pri_side); + ide_set_side(0, current_pri_side); - ali1543_log("ali5229_ide_handler(): Enabling primary IDE...\n"); - ide_pri_enable(); + ali1543_log("ali5229_ide_handler(): Enabling primary IDE...\n"); + ide_pri_enable(); - sff_bus_master_handler(dev->ide_controller[0], dev->ide_conf[0x04] & 0x01, ((dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8)) + (0 ^ ch)); - ali1543_log("M5229 PRI: BASE %04x SIDE %04x\n", current_pri_base, current_pri_side); - } + sff_bus_master_handler(dev->ide_controller[0], dev->ide_conf[0x04] & 0x01, ((dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8)) + (0 ^ ch)); + ali1543_log("M5229 PRI: BASE %04x SIDE %04x\n", current_pri_base, current_pri_side); + } - /* Secondary Channel Setup */ - if ((dev->ide_conf[0x09] & 0x10) || (dev->ide_conf[0x4d] & 0x80)) { - ali1543_log("ali5229_ide_handler(): Secondary IDE base now %04X...\n", current_sec_base); - ide_set_base(1, current_sec_base); - ali1543_log("ali5229_ide_handler(): Secondary IDE side now %04X...\n", current_sec_side); - ide_set_side(1, current_sec_side); + /* Secondary Channel Setup */ + if ((dev->ide_conf[0x09] & 0x10) || (dev->ide_conf[0x4d] & 0x80)) { + ali1543_log("ali5229_ide_handler(): Secondary IDE base now %04X...\n", current_sec_base); + ide_set_base(1, current_sec_base); + ali1543_log("ali5229_ide_handler(): Secondary IDE side now %04X...\n", current_sec_side); + ide_set_side(1, current_sec_side); - ali1543_log("ali5229_ide_handler(): Enabling secondary IDE...\n"); - ide_sec_enable(); + ali1543_log("ali5229_ide_handler(): Enabling secondary IDE...\n"); + ide_sec_enable(); - sff_bus_master_handler(dev->ide_controller[1], dev->ide_conf[0x04] & 0x01, (((dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8))) + (8 ^ ch)); - ali1543_log("M5229 SEC: BASE %04x SIDE %04x\n", current_sec_base, current_sec_side); - } + sff_bus_master_handler(dev->ide_controller[1], dev->ide_conf[0x04] & 0x01, (((dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8))) + (8 ^ ch)); + ali1543_log("M5229 SEC: BASE %04x SIDE %04x\n", current_sec_base, current_sec_side); + } } else { - sff_bus_master_handler(dev->ide_controller[0], dev->ide_conf[0x04] & 0x01, (dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8)); - sff_bus_master_handler(dev->ide_controller[1], dev->ide_conf[0x04] & 0x01, ((dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8)) + 8); + sff_bus_master_handler(dev->ide_controller[0], dev->ide_conf[0x04] & 0x01, (dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8)); + sff_bus_master_handler(dev->ide_controller[1], dev->ide_conf[0x04] & 0x01, ((dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8)) + 8); } } - static void ali5229_chip_reset(ali1543_t *dev) { @@ -660,11 +659,11 @@ ali5229_chip_reset(ali1543_t *dev) dev->ide_conf[0x78] = 0x21; if (dev->type == 1) { - dev->ide_conf[0x08] = 0xc1; - dev->ide_conf[0x43] = 0x00; - dev->ide_conf[0x4b] = 0x4a; - dev->ide_conf[0x4e] = 0xba; - dev->ide_conf[0x4f] = 0x1a; + dev->ide_conf[0x08] = 0xc1; + dev->ide_conf[0x43] = 0x00; + dev->ide_conf[0x4b] = 0x4a; + dev->ide_conf[0x4e] = 0xba; + dev->ide_conf[0x4f] = 0x1a; } ali5229_write(0, 0x04, 0x05, dev); @@ -692,715 +691,734 @@ ali5229_chip_reset(ali1543_t *dev) ali5229_ide_handler(dev); } - static void ali5229_write(int func, int addr, uint8_t val, void *priv) { - ali1543_t *dev = (ali1543_t *)priv; + ali1543_t *dev = (ali1543_t *) priv; ali1543_log("M5229: dev->ide_conf[%02x] = %02x\n", addr, val); if (func > 0) - return; + return; if (!dev->ide_dev_enable) - return; + return; switch (addr) { - case 0x04: /* COM - Command Register */ - ali1543_log("IDE04: %02X\n", val); - dev->ide_conf[addr] = val & 0x45; - ali5229_ide_handler(dev); - break; + case 0x04: /* COM - Command Register */ + ali1543_log("IDE04: %02X\n", val); + dev->ide_conf[addr] = val & 0x45; + ali5229_ide_handler(dev); + break; - case 0x05: - dev->ide_conf[addr] = val & 0x01; - break; + case 0x05: + dev->ide_conf[addr] = val & 0x01; + break; - case 0x07: - dev->ide_conf[addr] &= ~(val & 0xf1); - break; + case 0x07: + dev->ide_conf[addr] &= ~(val & 0xf1); + break; - case 0x09: /* Control */ - ali1543_log("IDE09: %02X\n", val); + case 0x09: /* Control */ + ali1543_log("IDE09: %02X\n", val); - if (dev->type == 1) { - val &= ~(dev->ide_conf[0x43]); - val |= (dev->ide_conf[addr] & dev->ide_conf[0x43]); - } + if (dev->type == 1) { + val &= ~(dev->ide_conf[0x43]); + val |= (dev->ide_conf[addr] & dev->ide_conf[0x43]); + } - if (dev->ide_conf[0x4d] & 0x80) - dev->ide_conf[addr] = (dev->ide_conf[addr] & 0xfa) | (val & 0x05); - else - dev->ide_conf[addr] = (dev->ide_conf[addr] & 0x8a) | (val & 0x75); - ali5229_ide_handler(dev); - ali5229_ide_irq_handler(dev); - break; + if (dev->ide_conf[0x4d] & 0x80) + dev->ide_conf[addr] = (dev->ide_conf[addr] & 0xfa) | (val & 0x05); + else + dev->ide_conf[addr] = (dev->ide_conf[addr] & 0x8a) | (val & 0x75); + ali5229_ide_handler(dev); + ali5229_ide_irq_handler(dev); + break; - /* Primary Base Address */ - case 0x10: case 0x11: case 0x14: case 0x15: - /* FALLTHROUGH */ + /* Primary Base Address */ + case 0x10: + case 0x11: + case 0x14: + case 0x15: + /* FALLTHROUGH */ - /* Secondary Base Address */ - case 0x18: case 0x19: case 0x1c: case 0x1d: - /* FALLTHROUGH */ + /* Secondary Base Address */ + case 0x18: + case 0x19: + case 0x1c: + case 0x1d: + /* FALLTHROUGH */ - /* Bus Mastering Base Address */ - case 0x20: case 0x21: case 0x22: case 0x23: - dev->ide_conf[addr] = val; - ali5229_ide_handler(dev); - break; + /* Bus Mastering Base Address */ + case 0x20: + case 0x21: + case 0x22: + case 0x23: + dev->ide_conf[addr] = val; + ali5229_ide_handler(dev); + break; - case 0x2c: /* Subsystem Vendor ID */ - case 0x2d: - case 0x2e: - case 0x2f: - if (!(dev->ide_conf[0x53] & 0x80)) - dev->ide_conf[addr] = val; - break; + case 0x2c: /* Subsystem Vendor ID */ + case 0x2d: + case 0x2e: + case 0x2f: + if (!(dev->ide_conf[0x53] & 0x80)) + dev->ide_conf[addr] = val; + break; - case 0x3c: /* Interrupt Line */ - case 0x3d: /* Interrupt Pin */ - dev->ide_conf[addr] = val; - break; + case 0x3c: /* Interrupt Line */ + case 0x3d: /* Interrupt Pin */ + dev->ide_conf[addr] = val; + break; - /* The machines don't touch anything beyond that point so we avoid any programming */ - case 0x43: - if (dev->type == 1) - dev->ide_conf[addr] = val & 0x7f; - break; + /* The machines don't touch anything beyond that point so we avoid any programming */ + case 0x43: + if (dev->type == 1) + dev->ide_conf[addr] = val & 0x7f; + break; - case 0x4b: - if (dev->type == 1) - dev->ide_conf[addr] = val; - break; + case 0x4b: + if (dev->type == 1) + dev->ide_conf[addr] = val; + break; - case 0x4d: - dev->ide_conf[addr] = val & 0x80; - ali5229_ide_handler(dev); - break; + case 0x4d: + dev->ide_conf[addr] = val & 0x80; + ali5229_ide_handler(dev); + break; - case 0x4f: - if (dev->type == 0) - dev->ide_conf[addr] = val & 0x3f; - break; + case 0x4f: + if (dev->type == 0) + dev->ide_conf[addr] = val & 0x3f; + break; - case 0x50: /* Configuration */ - ali1543_log("IDE50: %02X\n", val); - dev->ide_conf[addr] = val & 0x2b; - dev->ide_dev_enable = !!(val & 0x01); - break; + case 0x50: /* Configuration */ + ali1543_log("IDE50: %02X\n", val); + dev->ide_conf[addr] = val & 0x2b; + dev->ide_dev_enable = !!(val & 0x01); + break; - case 0x51: - dev->ide_conf[addr] = val & 0xf7; - if (val & 0x80) - ali5229_chip_reset(dev); - else if (val & 0x40) { - sff_bus_master_reset(dev->ide_controller[0], (dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8)); - sff_bus_master_reset(dev->ide_controller[1], ((dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8)) + 8); - } - break; + case 0x51: + dev->ide_conf[addr] = val & 0xf7; + if (val & 0x80) + ali5229_chip_reset(dev); + else if (val & 0x40) { + sff_bus_master_reset(dev->ide_controller[0], (dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8)); + sff_bus_master_reset(dev->ide_controller[1], ((dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8)) + 8); + } + break; - case 0x52: /* FCS - Flexible Channel Setting Register */ - dev->ide_conf[addr] = val; - ali5229_ide_handler(dev); - ali5229_ide_irq_handler(dev); - break; + case 0x52: /* FCS - Flexible Channel Setting Register */ + dev->ide_conf[addr] = val; + ali5229_ide_handler(dev); + ali5229_ide_irq_handler(dev); + break; - case 0x53: /* Subsystem Vendor ID */ - dev->ide_conf[addr] = val & 0x8b; - break; + case 0x53: /* Subsystem Vendor ID */ + dev->ide_conf[addr] = val & 0x8b; + break; - case 0x54: /* FIFO threshold of primary channel drive 0 and drive 1 */ - case 0x55: /* FIFO threshold of secondary channel drive 0 and drive 1 */ - case 0x56: /* Ultra DMA /33 setting for Primary drive 0 and drive 1 */ - case 0x57: /* Ultra DMA /33 setting for Secondary drive 0 and drive 1 */ - case 0x78: /* IDE clock's frequency (default value is 33 = 21H) */ - dev->ide_conf[addr] = val; - break; + case 0x54: /* FIFO threshold of primary channel drive 0 and drive 1 */ + case 0x55: /* FIFO threshold of secondary channel drive 0 and drive 1 */ + case 0x56: /* Ultra DMA /33 setting for Primary drive 0 and drive 1 */ + case 0x57: /* Ultra DMA /33 setting for Secondary drive 0 and drive 1 */ + case 0x78: /* IDE clock's frequency (default value is 33 = 21H) */ + dev->ide_conf[addr] = val; + break; - case 0x58: - dev->ide_conf[addr] = val & 3; - break; + case 0x58: + dev->ide_conf[addr] = val & 3; + break; - case 0x59: case 0x5a: - case 0x5b: - dev->ide_conf[addr] = val & 0x7f; - break; + case 0x59: + case 0x5a: + case 0x5b: + dev->ide_conf[addr] = val & 0x7f; + break; - case 0x5c: - dev->ide_conf[addr] = val & 3; - break; + case 0x5c: + dev->ide_conf[addr] = val & 3; + break; - case 0x5d: case 0x5e: - case 0x5f: - dev->ide_conf[addr] = val & 0x7f; - break; + case 0x5d: + case 0x5e: + case 0x5f: + dev->ide_conf[addr] = val & 0x7f; + break; } } - static uint8_t ali5229_read(int func, int addr, void *priv) { - ali1543_t *dev = (ali1543_t *)priv; - uint8_t ret = 0xff; + ali1543_t *dev = (ali1543_t *) priv; + uint8_t ret = 0xff; if (dev->ide_dev_enable && (func == 0)) { - ret = dev->ide_conf[addr]; - if ((addr == 0x09) && !(dev->ide_conf[0x50] & 0x02)) - ret &= 0x0f; - else if (addr == 0x50) - ret = (ret & 0xfe) | (dev->ide_dev_enable ? 0x01 : 0x00); - else if (addr == 0x75) - ret = ide_read_ali_75(); - else if (addr == 0x76) - ret = ide_read_ali_76(); + ret = dev->ide_conf[addr]; + if ((addr == 0x09) && !(dev->ide_conf[0x50] & 0x02)) + ret &= 0x0f; + else if (addr == 0x50) + ret = (ret & 0xfe) | (dev->ide_dev_enable ? 0x01 : 0x00); + else if (addr == 0x75) + ret = ide_read_ali_75(); + else if (addr == 0x76) + ret = ide_read_ali_76(); } return ret; } - static void ali5237_write(int func, int addr, uint8_t val, void *priv) { - ali1543_t *dev = (ali1543_t *)priv; + ali1543_t *dev = (ali1543_t *) priv; ali1543_log("M5237: dev->usb_conf[%02x] = %02x\n", addr, val); if (func > 0) - return; + return; if (!dev->usb_dev_enable) - return; + return; switch (addr) { - case 0x04: /* USB Enable */ - dev->usb_conf[addr] = val & 0x5f; - ohci_update_mem_mapping(dev->usb, dev->usb_conf[0x11], dev->usb_conf[0x12], dev->usb_conf[0x13], dev->usb_conf[0x04] & 1); - break; + case 0x04: /* USB Enable */ + dev->usb_conf[addr] = val & 0x5f; + ohci_update_mem_mapping(dev->usb, dev->usb_conf[0x11], dev->usb_conf[0x12], dev->usb_conf[0x13], dev->usb_conf[0x04] & 1); + break; - case 0x05: - dev->usb_conf[addr] = 0x01; - break; + case 0x05: + dev->usb_conf[addr] = 0x01; + break; - case 0x07: - dev->usb_conf[addr] &= ~(val & 0xc9); - break; + case 0x07: + dev->usb_conf[addr] &= ~(val & 0xc9); + break; - case 0x0c: /* Cache Line Size */ - case 0x0d: /* Latency Timer */ - case 0x3c: /* Interrupt Line Register */ + case 0x0c: /* Cache Line Size */ + case 0x0d: /* Latency Timer */ + case 0x3c: /* Interrupt Line Register */ - case 0x42: /* Test Mode Register */ - dev->usb_conf[addr] = val & 0x10; - break; - case 0x43: - if (dev->type == 1) - dev->usb_conf[addr] = val & 0x04; - break; + case 0x42: /* Test Mode Register */ + dev->usb_conf[addr] = val & 0x10; + break; + case 0x43: + if (dev->type == 1) + dev->usb_conf[addr] = val & 0x04; + break; - /* USB Base I/O */ - case 0x11: - dev->usb_conf[addr] = val & 0xf0; - ohci_update_mem_mapping(dev->usb, dev->usb_conf[0x11], dev->usb_conf[0x12], dev->usb_conf[0x13], dev->usb_conf[0x04] & 1); - break; - case 0x12: case 0x13: - dev->usb_conf[addr] = val; - ohci_update_mem_mapping(dev->usb, dev->usb_conf[0x11], dev->usb_conf[0x12], dev->usb_conf[0x13], dev->usb_conf[0x04] & 1); - break; + /* USB Base I/O */ + case 0x11: + dev->usb_conf[addr] = val & 0xf0; + ohci_update_mem_mapping(dev->usb, dev->usb_conf[0x11], dev->usb_conf[0x12], dev->usb_conf[0x13], dev->usb_conf[0x04] & 1); + break; + case 0x12: + case 0x13: + dev->usb_conf[addr] = val; + ohci_update_mem_mapping(dev->usb, dev->usb_conf[0x11], dev->usb_conf[0x12], dev->usb_conf[0x13], dev->usb_conf[0x04] & 1); + break; - case 0x2c: /* Subsystem Vendor ID */ - case 0x2d: - case 0x2e: - case 0x2f: - if (!(dev->usb_conf[0x42] & 0x10)) - dev->usb_conf[addr] = val; - break; + case 0x2c: /* Subsystem Vendor ID */ + case 0x2d: + case 0x2e: + case 0x2f: + if (!(dev->usb_conf[0x42] & 0x10)) + dev->usb_conf[addr] = val; + break; } } - static uint8_t ali5237_read(int func, int addr, void *priv) { - ali1543_t *dev = (ali1543_t *)priv; - uint8_t ret = 0xff; + ali1543_t *dev = (ali1543_t *) priv; + uint8_t ret = 0xff; if (dev->usb_dev_enable && (func == 0)) - ret = dev->usb_conf[addr]; + ret = dev->usb_conf[addr]; return ret; } - static void ali7101_write(int func, int addr, uint8_t val, void *priv) { - ali1543_t *dev = (ali1543_t *)priv; + ali1543_t *dev = (ali1543_t *) priv; ali1543_log("M7101: dev->pmu_conf[%02x] = %02x\n", addr, val); if (func > 0) - return; + return; if (!dev->pmu_dev_enable) - return; + return; if ((dev->pmu_conf[0xc9] & 0x01) && (addr >= 0x40) && (addr != 0xc9)) - return; + return; switch (addr) { - case 0x04: /* Enable PMU */ - ali1543_log("PMU04: %02X\n", val); - dev->pmu_conf[addr] = val & 0x01; - if (!(dev->pmu_conf[0x5b] & 0x02)) - acpi_update_io_mapping(dev->acpi, (dev->pmu_conf[0x11] << 8) | (dev->pmu_conf[0x10] & 0xc0), dev->pmu_conf[0x04] & 1); - if (!(dev->pmu_conf[0x5b] & 0x04)) { - if (dev->type == 1) - smbus_ali7101_remap(dev->smbus, (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xc0), (dev->pmu_conf[0xe0] & 1) && (dev->pmu_conf[0x04] & 1)); - else - smbus_ali7101_remap(dev->smbus, (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xe0), (dev->pmu_conf[0xe0] & 1) && (dev->pmu_conf[0x04] & 1)); - } - break; + case 0x04: /* Enable PMU */ + ali1543_log("PMU04: %02X\n", val); + dev->pmu_conf[addr] = val & 0x01; + if (!(dev->pmu_conf[0x5b] & 0x02)) + acpi_update_io_mapping(dev->acpi, (dev->pmu_conf[0x11] << 8) | (dev->pmu_conf[0x10] & 0xc0), dev->pmu_conf[0x04] & 1); + if (!(dev->pmu_conf[0x5b] & 0x04)) { + if (dev->type == 1) + smbus_ali7101_remap(dev->smbus, (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xc0), (dev->pmu_conf[0xe0] & 1) && (dev->pmu_conf[0x04] & 1)); + else + smbus_ali7101_remap(dev->smbus, (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xe0), (dev->pmu_conf[0xe0] & 1) && (dev->pmu_conf[0x04] & 1)); + } + break; - /* PMU Base I/O */ - case 0x10: case 0x11: - if (!(dev->pmu_conf[0x5b] & 0x02)) { - if (addr == 0x10) - dev->pmu_conf[addr] = (val & 0xc0) | 1; - else if (addr == 0x11) - dev->pmu_conf[addr] = val; + /* PMU Base I/O */ + case 0x10: + case 0x11: + if (!(dev->pmu_conf[0x5b] & 0x02)) { + if (addr == 0x10) + dev->pmu_conf[addr] = (val & 0xc0) | 1; + else if (addr == 0x11) + dev->pmu_conf[addr] = val; - ali1543_log("New ACPI base address: %08X\n", (dev->pmu_conf[0x11] << 8) | (dev->pmu_conf[0x10] & 0xc0)); - acpi_update_io_mapping(dev->acpi, (dev->pmu_conf[0x11] << 8) | (dev->pmu_conf[0x10] & 0xc0), dev->pmu_conf[0x04] & 1); - } - break; + ali1543_log("New ACPI base address: %08X\n", (dev->pmu_conf[0x11] << 8) | (dev->pmu_conf[0x10] & 0xc0)); + acpi_update_io_mapping(dev->acpi, (dev->pmu_conf[0x11] << 8) | (dev->pmu_conf[0x10] & 0xc0), dev->pmu_conf[0x04] & 1); + } + break; - /* SMBus Base I/O */ - case 0x14: case 0x15: - if (!(dev->pmu_conf[0x5b] & 0x04)) { - if (addr == 0x14) { - if (dev->type == 1) - dev->pmu_conf[addr] = (val & 0xc0) | 1; - else - dev->pmu_conf[addr] = (val & 0xe0) | 1; - } else if (addr == 0x15) - dev->pmu_conf[addr] = val; + /* SMBus Base I/O */ + case 0x14: + case 0x15: + if (!(dev->pmu_conf[0x5b] & 0x04)) { + if (addr == 0x14) { + if (dev->type == 1) + dev->pmu_conf[addr] = (val & 0xc0) | 1; + else + dev->pmu_conf[addr] = (val & 0xe0) | 1; + } else if (addr == 0x15) + dev->pmu_conf[addr] = val; - if (dev->type == 1) { - ali1543_log("New SMBUS base address: %08X\n", (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xc0)); - smbus_ali7101_remap(dev->smbus, (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xc0), (dev->pmu_conf[0xe0] & 1) && (dev->pmu_conf[0x04] & 1)); - } else { - ali1543_log("New SMBUS base address: %08X\n", (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xe0)); - smbus_ali7101_remap(dev->smbus, (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xe0), (dev->pmu_conf[0xe0] & 1) && (dev->pmu_conf[0x04] & 1)); - } - } - break; + if (dev->type == 1) { + ali1543_log("New SMBUS base address: %08X\n", (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xc0)); + smbus_ali7101_remap(dev->smbus, (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xc0), (dev->pmu_conf[0xe0] & 1) && (dev->pmu_conf[0x04] & 1)); + } else { + ali1543_log("New SMBUS base address: %08X\n", (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xe0)); + smbus_ali7101_remap(dev->smbus, (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xe0), (dev->pmu_conf[0xe0] & 1) && (dev->pmu_conf[0x04] & 1)); + } + } + break; - /* Subsystem Vendor ID */ - case 0x2c: case 0x2d: case 0x2e: case 0x2f: - if (!(dev->pmu_conf[0xd8] & 0x08)) - dev->pmu_conf[addr] = val; - break; + /* Subsystem Vendor ID */ + case 0x2c: + case 0x2d: + case 0x2e: + case 0x2f: + if (!(dev->pmu_conf[0xd8] & 0x08)) + dev->pmu_conf[addr] = val; + break; - case 0x40: - dev->pmu_conf[addr] = val & 0x1f; - pic_set_smi_irq_mask(8, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x40] & 0x03)); - break; - case 0x41: - dev->pmu_conf[addr] = val & 0x10; - ali1543_log("PMU41: %02X\n", val); - apm_set_do_smi(dev->acpi->apm, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x41] & 0x10)); - break; + case 0x40: + dev->pmu_conf[addr] = val & 0x1f; + pic_set_smi_irq_mask(8, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x40] & 0x03)); + break; + case 0x41: + dev->pmu_conf[addr] = val & 0x10; + ali1543_log("PMU41: %02X\n", val); + apm_set_do_smi(dev->acpi->apm, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x41] & 0x10)); + break; - /* TODO: Is the status R/W or R/WC? */ - case 0x42: - dev->pmu_conf[addr] &= ~(val & 0x1f); - break; - case 0x43: - dev->pmu_conf[addr] &= ~(val & 0x10); - if (val & 0x10) - acpi_ali_soft_smi_status_write(dev->acpi, 0); - break; + /* TODO: Is the status R/W or R/WC? */ + case 0x42: + dev->pmu_conf[addr] &= ~(val & 0x1f); + break; + case 0x43: + dev->pmu_conf[addr] &= ~(val & 0x10); + if (val & 0x10) + acpi_ali_soft_smi_status_write(dev->acpi, 0); + break; - case 0x44: - dev->pmu_conf[addr] = val; - break; - case 0x45: - dev->pmu_conf[addr] = val & 0x9f; - break; - case 0x46: - dev->pmu_conf[addr] = val & 0x18; - break; + case 0x44: + dev->pmu_conf[addr] = val; + break; + case 0x45: + dev->pmu_conf[addr] = val & 0x9f; + break; + case 0x46: + dev->pmu_conf[addr] = val & 0x18; + break; - /* TODO: Is the status R/W or R/WC? */ - case 0x48: - dev->pmu_conf[addr] &= ~val; - break; - case 0x49: - dev->pmu_conf[addr] &= ~(val & 0x9f); - break; - case 0x4a: - dev->pmu_conf[addr] &= ~(val & 0x38); - break; + /* TODO: Is the status R/W or R/WC? */ + case 0x48: + dev->pmu_conf[addr] &= ~val; + break; + case 0x49: + dev->pmu_conf[addr] &= ~(val & 0x9f); + break; + case 0x4a: + dev->pmu_conf[addr] &= ~(val & 0x38); + break; - case 0x4c: - dev->pmu_conf[addr] = val & 5; - break; - case 0x4d: - dev->pmu_conf[addr] = val & 1; - break; + case 0x4c: + dev->pmu_conf[addr] = val & 5; + break; + case 0x4d: + dev->pmu_conf[addr] = val & 1; + break; - /* TODO: Is the status R/W or R/WC? */ - case 0x4e: - dev->pmu_conf[addr] &= ~(val & 5); - break; - case 0x4f: - dev->pmu_conf[addr] &= ~(val & 1); - break; + /* TODO: Is the status R/W or R/WC? */ + case 0x4e: + dev->pmu_conf[addr] &= ~(val & 5); + break; + case 0x4f: + dev->pmu_conf[addr] &= ~(val & 1); + break; - case 0x50: case 0x51: - if (dev->type == 1) - dev->pmu_conf[addr] = val; - break; + case 0x50: + case 0x51: + if (dev->type == 1) + dev->pmu_conf[addr] = val; + break; - case 0x52: case 0x53: - if (dev->type == 1) - dev->pmu_conf[addr] &= ~val; - break; + case 0x52: + case 0x53: + if (dev->type == 1) + dev->pmu_conf[addr] &= ~val; + break; - case 0x54: /* Standby timer */ - dev->pmu_conf[addr] = val; - break; - case 0x55: /* APM Timer */ - dev->pmu_conf[addr] = val & 0x7f; - break; - case 0x59: /* Global display timer. */ - dev->pmu_conf[addr] = val & 0x1f; - break; + case 0x54: /* Standby timer */ + dev->pmu_conf[addr] = val; + break; + case 0x55: /* APM Timer */ + dev->pmu_conf[addr] = val & 0x7f; + break; + case 0x59: /* Global display timer. */ + dev->pmu_conf[addr] = val & 0x1f; + break; - case 0x5b: /* ACPI/SMB Base I/O Control */ - if (dev->type == 1) - dev->pmu_conf[addr] = val & 0x87; - else - dev->pmu_conf[addr] = val & 0x7f; - break; + case 0x5b: /* ACPI/SMB Base I/O Control */ + if (dev->type == 1) + dev->pmu_conf[addr] = val & 0x87; + else + dev->pmu_conf[addr] = val & 0x7f; + break; - case 0x60: - dev->pmu_conf[addr] = val; - break; - case 0x61: - dev->pmu_conf[addr] = val & 0x13; - break; - case 0x62: - dev->pmu_conf[addr] = val & 0xf1; - break; - case 0x63: - dev->pmu_conf[addr] = val & 0x07; - break; + case 0x60: + dev->pmu_conf[addr] = val; + break; + case 0x61: + dev->pmu_conf[addr] = val & 0x13; + break; + case 0x62: + dev->pmu_conf[addr] = val & 0xf1; + break; + case 0x63: + dev->pmu_conf[addr] = val & 0x07; + break; - case 0x64: - dev->pmu_conf[addr] = val; - break; - case 0x65: - dev->pmu_conf[addr] = val & 0x11; - break; + case 0x64: + dev->pmu_conf[addr] = val; + break; + case 0x65: + dev->pmu_conf[addr] = val & 0x11; + break; - case 0x68: - dev->pmu_conf[addr] = val & 0x07; - break; + case 0x68: + dev->pmu_conf[addr] = val & 0x07; + break; - case 0x6c: case 0x6d: - dev->pmu_conf[addr] = val; - break; - case 0x6e: - dev->pmu_conf[addr] = val & 0xbf; - break; - case 0x6f: - if (dev->type == 1) - dev->pmu_conf[addr] = val & 0x1e; - else - dev->pmu_conf[addr] = val & 0x1f; - break; + case 0x6c: + case 0x6d: + dev->pmu_conf[addr] = val; + break; + case 0x6e: + dev->pmu_conf[addr] = val & 0xbf; + break; + case 0x6f: + if (dev->type == 1) + dev->pmu_conf[addr] = val & 0x1e; + else + dev->pmu_conf[addr] = val & 0x1f; + break; - case 0x70: - dev->pmu_conf[addr] = val; - break; - case 0x71: - dev->pmu_conf[addr] = val & 0x3f; - break; + case 0x70: + dev->pmu_conf[addr] = val; + break; + case 0x71: + dev->pmu_conf[addr] = val & 0x3f; + break; - case 0x72: - dev->pmu_conf[addr] = val & 0x0f; - break; + case 0x72: + dev->pmu_conf[addr] = val & 0x0f; + break; - /* TODO: Is the status R/W or R/WC? */ - case 0x74: - dev->pmu_conf[addr] &= ~(val & 0x33); - break; + /* TODO: Is the status R/W or R/WC? */ + case 0x74: + dev->pmu_conf[addr] &= ~(val & 0x33); + break; - case 0x75: - dev->pmu_conf[addr] = val; - break; + case 0x75: + dev->pmu_conf[addr] = val; + break; - case 0x76: - dev->pmu_conf[addr] = val & 0x7f; - break; + case 0x76: + dev->pmu_conf[addr] = val & 0x7f; + break; - case 0x77: - /* TODO: If bit 1 is clear, then status bit is set even if SMI is disabled. */ - dev->pmu_conf[addr] = val; - pic_set_smi_irq_mask(8, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x40] & 0x03)); - ali1543_log("PMU77: %02X\n", val); - apm_set_do_smi(dev->acpi->apm, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x41] & 0x10)); - break; + case 0x77: + /* TODO: If bit 1 is clear, then status bit is set even if SMI is disabled. */ + dev->pmu_conf[addr] = val; + pic_set_smi_irq_mask(8, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x40] & 0x03)); + ali1543_log("PMU77: %02X\n", val); + apm_set_do_smi(dev->acpi->apm, (dev->pmu_conf[0x77] & 0x08) && (dev->pmu_conf[0x41] & 0x10)); + break; - case 0x78: - dev->pmu_conf[addr] = val; - break; - case 0x79: - dev->pmu_conf[addr] = val & 0x0f; - break; + case 0x78: + dev->pmu_conf[addr] = val; + break; + case 0x79: + dev->pmu_conf[addr] = val & 0x0f; + break; - case 0x7a: - if (dev->type == 1) - dev->pmu_conf[addr] = val & 0x07; - else - dev->pmu_conf[addr] = val & 0x02; - break; + case 0x7a: + if (dev->type == 1) + dev->pmu_conf[addr] = val & 0x07; + else + dev->pmu_conf[addr] = val & 0x02; + break; - case 0x7b: - if (dev->type == 1) - dev->pmu_conf[addr] = val; - else - dev->pmu_conf[addr] = val & 0x7f; - break; + case 0x7b: + if (dev->type == 1) + dev->pmu_conf[addr] = val; + else + dev->pmu_conf[addr] = val & 0x7f; + break; - case 0x7c ... 0x7f: - dev->pmu_conf[addr] = val; - break; + case 0x7c ... 0x7f: + dev->pmu_conf[addr] = val; + break; - case 0x81: - dev->pmu_conf[addr] = val & 0xf0; - break; + case 0x81: + dev->pmu_conf[addr] = val & 0xf0; + break; - case 0x82: - if (dev->type == 1) - dev->pmu_conf[addr] = val & 0x01; - break; + case 0x82: + if (dev->type == 1) + dev->pmu_conf[addr] = val & 0x01; + break; - case 0x84 ... 0x87: - if (dev->type == 1) - dev->pmu_conf[addr] = val; - break; - case 0x88 ... 0x8b: - if (dev->type == 1) - dev->pmu_conf[addr] = val; - break; + case 0x84 ... 0x87: + if (dev->type == 1) + dev->pmu_conf[addr] = val; + break; + case 0x88 ... 0x8b: + if (dev->type == 1) + dev->pmu_conf[addr] = val; + break; - case 0x8c: case 0x8d: - dev->pmu_conf[addr] = val & 0x0f; - break; + case 0x8c: + case 0x8d: + dev->pmu_conf[addr] = val & 0x0f; + break; - case 0x90: - if (dev->type == 1) - dev->pmu_conf[addr] = val & 0x0f; - else - dev->pmu_conf[addr] = val & 0x01; - break; + case 0x90: + if (dev->type == 1) + dev->pmu_conf[addr] = val & 0x0f; + else + dev->pmu_conf[addr] = val & 0x01; + break; - case 0x91: - if (dev->type == 1) - dev->pmu_conf[addr] = val & 0x02; - break; + case 0x91: + if (dev->type == 1) + dev->pmu_conf[addr] = val & 0x02; + break; - case 0x94: - dev->pmu_conf[addr] = val & 0xf0; - break; - case 0x95 ... 0x97: - dev->pmu_conf[addr] = val; - break; + case 0x94: + dev->pmu_conf[addr] = val & 0xf0; + break; + case 0x95 ... 0x97: + dev->pmu_conf[addr] = val; + break; - case 0x98: case 0x99: - if (dev->type == 1) - dev->pmu_conf[addr] = val; - break; + case 0x98: + case 0x99: + if (dev->type == 1) + dev->pmu_conf[addr] = val; + break; - case 0xa4: case 0xa5: - dev->pmu_conf[addr] = val; - break; + case 0xa4: + case 0xa5: + dev->pmu_conf[addr] = val; + break; - case 0xb2: - dev->pmu_conf[addr] = val & 0x01; - break; + case 0xb2: + dev->pmu_conf[addr] = val & 0x01; + break; - case 0xb3: - dev->pmu_conf[addr] = val & 0x7f; - break; + case 0xb3: + dev->pmu_conf[addr] = val & 0x7f; + break; - case 0xb4: - dev->pmu_conf[addr] = val & 0x7c; - break; + case 0xb4: + dev->pmu_conf[addr] = val & 0x7c; + break; - case 0xb5: case 0xb7: - dev->pmu_conf[addr] = val & 0x0f; - break; + case 0xb5: + case 0xb7: + dev->pmu_conf[addr] = val & 0x0f; + break; - case 0xb8: case 0xb9: - if (dev->type == 1) - dev->pmu_conf[addr] = val; - break; + case 0xb8: + case 0xb9: + if (dev->type == 1) + dev->pmu_conf[addr] = val; + break; - case 0xbc: - outb(0x70, val); - break; + case 0xbc: + outb(0x70, val); + break; - case 0xbd: - dev->pmu_conf[addr] = val & 0x0f; - acpi_set_timer32(dev->acpi, val & 0x04); - break; + case 0xbd: + dev->pmu_conf[addr] = val & 0x0f; + acpi_set_timer32(dev->acpi, val & 0x04); + break; - case 0xbe: - dev->pmu_conf[addr] = val & 0x03; - break; + case 0xbe: + dev->pmu_conf[addr] = val & 0x03; + break; - /* Continue Further Later */ - /* GPO Registers */ - case 0xc0: - dev->pmu_conf[addr] = val & 0x0f; - acpi_init_gporeg(dev->acpi, dev->pmu_conf[0xc0], dev->pmu_conf[0xc1], dev->pmu_conf[0xc2] | (dev->pmu_conf[0xc3] << 5), 0x00); - break; - case 0xc1: - dev->pmu_conf[addr] = val & 0x12; - acpi_init_gporeg(dev->acpi, dev->pmu_conf[0xc0], dev->pmu_conf[0xc1], dev->pmu_conf[0xc2] | (dev->pmu_conf[0xc3] << 5), 0x00); - break; - case 0xc2: - dev->pmu_conf[addr] = val & 0x1c; - acpi_init_gporeg(dev->acpi, dev->pmu_conf[0xc0], dev->pmu_conf[0xc1], dev->pmu_conf[0xc2] | (dev->pmu_conf[0xc3] << 5), 0x00); - break; - case 0xc3: - dev->pmu_conf[addr] = val & 0x06; - acpi_init_gporeg(dev->acpi, dev->pmu_conf[0xc0], dev->pmu_conf[0xc1], dev->pmu_conf[0xc2] | (dev->pmu_conf[0xc3] << 5), 0x00); - break; + /* Continue Further Later */ + /* GPO Registers */ + case 0xc0: + dev->pmu_conf[addr] = val & 0x0f; + acpi_init_gporeg(dev->acpi, dev->pmu_conf[0xc0], dev->pmu_conf[0xc1], dev->pmu_conf[0xc2] | (dev->pmu_conf[0xc3] << 5), 0x00); + break; + case 0xc1: + dev->pmu_conf[addr] = val & 0x12; + acpi_init_gporeg(dev->acpi, dev->pmu_conf[0xc0], dev->pmu_conf[0xc1], dev->pmu_conf[0xc2] | (dev->pmu_conf[0xc3] << 5), 0x00); + break; + case 0xc2: + dev->pmu_conf[addr] = val & 0x1c; + acpi_init_gporeg(dev->acpi, dev->pmu_conf[0xc0], dev->pmu_conf[0xc1], dev->pmu_conf[0xc2] | (dev->pmu_conf[0xc3] << 5), 0x00); + break; + case 0xc3: + dev->pmu_conf[addr] = val & 0x06; + acpi_init_gporeg(dev->acpi, dev->pmu_conf[0xc0], dev->pmu_conf[0xc1], dev->pmu_conf[0xc2] | (dev->pmu_conf[0xc3] << 5), 0x00); + break; - case 0xc6: - dev->pmu_conf[addr] = val & 0x06; - break; + case 0xc6: + dev->pmu_conf[addr] = val & 0x06; + break; - case 0xc8: case 0xc9: - dev->pmu_conf[addr] = val & 0x01; - break; + case 0xc8: + case 0xc9: + dev->pmu_conf[addr] = val & 0x01; + break; - case 0xca: - /* TODO: Write to this port causes a beep. */ - dev->pmu_conf[addr] = val; - break; + case 0xca: + /* TODO: Write to this port causes a beep. */ + dev->pmu_conf[addr] = val; + break; - case 0xcc: - if (dev->type == 1) - dev->pmu_conf[addr] = val & 0x1f; - break; - case 0xcd: - if (dev->type == 1) - dev->pmu_conf[addr] = val & 0x33; - break; + case 0xcc: + if (dev->type == 1) + dev->pmu_conf[addr] = val & 0x1f; + break; + case 0xcd: + if (dev->type == 1) + dev->pmu_conf[addr] = val & 0x33; + break; - case 0xd4: - dev->pmu_conf[addr] = val & 0x01; - break; + case 0xd4: + dev->pmu_conf[addr] = val & 0x01; + break; - case 0xd8: - dev->pmu_conf[addr] = val & 0xfd; - break; - case 0xd9: - if (dev->type == 1) - dev->pmu_conf[addr] = val & 0x3f; - break; + case 0xd8: + dev->pmu_conf[addr] = val & 0xfd; + break; + case 0xd9: + if (dev->type == 1) + dev->pmu_conf[addr] = val & 0x3f; + break; - case 0xe0: - dev->pmu_conf[addr] = val & 0x03; - if (dev->type == 1) - smbus_ali7101_remap(dev->smbus, (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xc0), (dev->pmu_conf[0xe0] & 1) && (dev->pmu_conf[0x04] & 1) && (!(dev->pci_conf[0x5f] & 4))); - else - smbus_ali7101_remap(dev->smbus, (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xe0), (dev->pmu_conf[0xe0] & 1) && (dev->pmu_conf[0x04] & 1) && (!(dev->pci_conf[0x5f] & 4))); - break; + case 0xe0: + dev->pmu_conf[addr] = val & 0x03; + if (dev->type == 1) + smbus_ali7101_remap(dev->smbus, (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xc0), (dev->pmu_conf[0xe0] & 1) && (dev->pmu_conf[0x04] & 1) && (!(dev->pci_conf[0x5f] & 4))); + else + smbus_ali7101_remap(dev->smbus, (dev->pmu_conf[0x15] << 8) | (dev->pmu_conf[0x14] & 0xe0), (dev->pmu_conf[0xe0] & 1) && (dev->pmu_conf[0x04] & 1) && (!(dev->pci_conf[0x5f] & 4))); + break; - case 0xe1: - dev->pmu_conf[addr] = val; - break; + case 0xe1: + dev->pmu_conf[addr] = val; + break; - case 0xe2: - dev->pmu_conf[addr] = val & 0xf8; - break; + case 0xe2: + dev->pmu_conf[addr] = val & 0xf8; + break; - default: - dev->pmu_conf[addr] = val; - break; + default: + dev->pmu_conf[addr] = val; + break; } } - static uint8_t ali7101_read(int func, int addr, void *priv) { - ali1543_t *dev = (ali1543_t *)priv; - uint8_t ret = 0xff; + ali1543_t *dev = (ali1543_t *) priv; + uint8_t ret = 0xff; if (dev->pmu_dev_enable && (func == 0)) { - if ((dev->pmu_conf[0xc9] & 0x01) && (addr >= 0x40) && (addr != 0xc9)) - return 0xff; + if ((dev->pmu_conf[0xc9] & 0x01) && (addr >= 0x40) && (addr != 0xc9)) + return 0xff; - /* TODO: C4, C5 = GPIREG (masks: 0D, 0E) */ - if (addr == 0x43) - ret = acpi_ali_soft_smi_status_read(dev->acpi) ? 0x10 : 0x00; - else if (addr == 0x7f) - ret = 0x80; - else if (addr == 0xbc) - ret = inb(0x70); - else - ret = dev->pmu_conf[addr]; + /* TODO: C4, C5 = GPIREG (masks: 0D, 0E) */ + if (addr == 0x43) + ret = acpi_ali_soft_smi_status_read(dev->acpi) ? 0x10 : 0x00; + else if (addr == 0x7f) + ret = 0x80; + else if (addr == 0xbc) + ret = inb(0x70); + else + ret = dev->pmu_conf[addr]; - if (dev->pmu_conf[0x77] & 0x10) { - switch (addr) { - case 0x42: - dev->pmu_conf[addr] &= 0xe0; - break; - case 0x43: - dev->pmu_conf[addr] &= 0xef; - acpi_ali_soft_smi_status_write(dev->acpi, 0); - break; + if (dev->pmu_conf[0x77] & 0x10) { + switch (addr) { + case 0x42: + dev->pmu_conf[addr] &= 0xe0; + break; + case 0x43: + dev->pmu_conf[addr] &= 0xef; + acpi_ali_soft_smi_status_write(dev->acpi, 0); + break; - case 0x48: - dev->pmu_conf[addr] = 0x00; - break; - case 0x49: - dev->pmu_conf[addr] &= 0x60; - break; - case 0x4a: - dev->pmu_conf[addr] &= 0xc7; - break; + case 0x48: + dev->pmu_conf[addr] = 0x00; + break; + case 0x49: + dev->pmu_conf[addr] &= 0x60; + break; + case 0x4a: + dev->pmu_conf[addr] &= 0xc7; + break; - case 0x4e: - dev->pmu_conf[addr] &= 0xfa; - break; - case 0x4f: - dev->pmu_conf[addr] &= 0xfe; - break; + case 0x4e: + dev->pmu_conf[addr] &= 0xfa; + break; + case 0x4f: + dev->pmu_conf[addr] &= 0xfe; + break; - case 0x74: - dev->pmu_conf[addr] &= 0xcc; - break; - } - } + case 0x74: + dev->pmu_conf[addr] &= 0xcc; + break; + } + } } return ret; } - static void ali1543_reset(void *priv) { - ali1543_t *dev = (ali1543_t *)priv; + ali1543_t *dev = (ali1543_t *) priv; /* Temporarily enable everything. Register writes will disable the devices. */ dev->ide_dev_enable = 1; @@ -1474,7 +1492,7 @@ ali1543_reset(void *priv) dev->pci_conf[0x04] = 0x0f; dev->pci_conf[0x07] = 0x02; if (dev->type == 1) - dev->pci_conf[0x08] = 0xc0; + dev->pci_conf[0x08] = 0xc0; dev->pci_conf[0x0a] = 0x01; dev->pci_conf[0x0b] = 0x06; @@ -1492,20 +1510,18 @@ ali1543_reset(void *priv) unmask_a20_in_smm = 1; } - static void ali1543_close(void *priv) { - ali1543_t *dev = (ali1543_t *)priv; + ali1543_t *dev = (ali1543_t *) priv; free(dev); } - static void * ali1543_init(const device_t *info) { - ali1543_t *dev = (ali1543_t *)malloc(sizeof(ali1543_t)); + ali1543_t *dev = (ali1543_t *) malloc(sizeof(ali1543_t)); memset(dev, 0, sizeof(ali1543_t)); /* Device 02: M1533 Southbridge */ @@ -1522,7 +1538,7 @@ ali1543_init(const device_t *info) /* ACPI */ dev->acpi = device_add(&acpi_ali_device); - dev->nvr = device_add(&piix4_nvr_device); + dev->nvr = device_add(&piix4_nvr_device); /* DMA */ dma_alias_set(); @@ -1548,10 +1564,10 @@ ali1543_init(const device_t *info) /* USB */ dev->usb = device_add(&usb_device); - dev->type = info->local & 0xff; + dev->type = info->local & 0xff; dev->offset = (info->local >> 8) & 0x7f; if (info->local & 0x8000) - dev->offset = -dev->offset; + dev->offset = -dev->offset; pclog("Offset = %i\n", dev->offset); pci_enable_mirq(0); @@ -1571,30 +1587,30 @@ ali1543_init(const device_t *info) } const device_t ali1543_device = { - .name = "ALi M1543 Desktop South Bridge", + .name = "ALi M1543 Desktop South Bridge", .internal_name = "ali1543", - .flags = DEVICE_PCI, - .local = 0x8500, /* -5 slot offset, we can do this because we currently - have no case of M1543 non-C with a different offset */ - .init = ali1543_init, + .flags = DEVICE_PCI, + .local = 0x8500, /* -5 slot offset, we can do this because we currently + have no case of M1543 non-C with a different offset */ + .init = ali1543_init, .close = ali1543_close, .reset = ali1543_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ali1543c_device = { - .name = "ALi M1543C Desktop South Bridge", + .name = "ALi M1543C Desktop South Bridge", .internal_name = "ali1543c", - .flags = DEVICE_PCI, - .local = 1, - .init = ali1543_init, - .close = ali1543_close, - .reset = ali1543_reset, + .flags = DEVICE_PCI, + .local = 1, + .init = ali1543_init, + .close = ali1543_close, + .reset = ali1543_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/ali1621.c b/src/chipset/ali1621.c index c234e65ce..5f5f5883c 100644 --- a/src/chipset/ali1621.c +++ b/src/chipset/ali1621.c @@ -31,15 +31,12 @@ #include <86box/chipset.h> +typedef struct ali1621_t { + uint8_t pci_conf[256]; -typedef struct ali1621_t -{ - uint8_t pci_conf[256]; - - smram_t * smram[2]; + smram_t *smram[2]; } ali1621_t; - #ifdef ENABLE_ALI1621_LOG int ali1621_do_log = ENABLE_ALI1621_LOG; static void @@ -47,51 +44,49 @@ ali1621_log(const char *fmt, ...) { va_list ap; - if (ali1621_do_log) - { + if (ali1621_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define ali1621_log(fmt, ...) +# define ali1621_log(fmt, ...) #endif - /* Table translated to a more sensible format: - Read cycles: - SMREN SMM Mode Code Data - 0 X X PCI PCI - 1 0 Close PCI PCI - 1 0 Lock PCI PCI - 1 0 Protect PCI PCI - 1 0 Open DRAM DRAM - 1 1 Open DRAM DRAM - 1 1 Protect DRAM DRAM - 1 1 Close DRAM PCI - 1 1 Lock DRAM PCI + Read cycles: + SMREN SMM Mode Code Data + 0 X X PCI PCI + 1 0 Close PCI PCI + 1 0 Lock PCI PCI + 1 0 Protect PCI PCI + 1 0 Open DRAM DRAM + 1 1 Open DRAM DRAM + 1 1 Protect DRAM DRAM + 1 1 Close DRAM PCI + 1 1 Lock DRAM PCI - Write cycles: - SMWEN SMM Mode Data - 0 X X PCI - 1 0 Close PCI - 1 0 Lock PCI - 1 0 Protect PCI - 1 0 Open DRAM - 1 1 Open DRAM - 1 1 Protect DRAM - 1 1 Close PCI - 1 1 Lock PCI + Write cycles: + SMWEN SMM Mode Data + 0 X X PCI + 1 0 Close PCI + 1 0 Lock PCI + 1 0 Protect PCI + 1 0 Open DRAM + 1 1 Open DRAM + 1 1 Protect DRAM + 1 1 Close PCI + 1 1 Lock PCI - Explanation of the modes based above: - If SM*EN = 0, SMRAM is entirely disabled, otherwise: - If mode is Close or Lock, then SMRAM always goes to PCI outside SMM, - and data to PCI, code to DRAM in SMM; - If mode is Protect, then SMRAM always goes to PCI outside SMM and - DRAM in SMM; - If mode is Open, then SMRAM always goes to DRAM. - Read and write are enabled separately. + Explanation of the modes based above: + If SM*EN = 0, SMRAM is entirely disabled, otherwise: + If mode is Close or Lock, then SMRAM always goes to PCI outside SMM, + and data to PCI, code to DRAM in SMM; + If mode is Protect, then SMRAM always goes to PCI outside SMM and + DRAM in SMM; + If mode is Open, then SMRAM always goes to DRAM. + Read and write are enabled separately. */ static void ali1621_smram_recalc(uint8_t val, ali1621_t *dev) @@ -101,486 +96,486 @@ ali1621_smram_recalc(uint8_t val, ali1621_t *dev) smram_disable_all(); if (val & 0xc0) { - /* SMRAM 0: A0000-BFFFF */ - if (val & 0x80) { - access_smm = ACCESS_SMRAM_X; + /* SMRAM 0: A0000-BFFFF */ + if (val & 0x80) { + access_smm = ACCESS_SMRAM_X; - switch (val & 0x30) { - case 0x10: /* Open. */ - access_normal = ACCESS_SMRAM_RX; - /* FALLTHROUGH */ - case 0x30: /* Protect. */ - access_smm |= ACCESS_SMRAM_R; - break; - } - } + switch (val & 0x30) { + case 0x10: /* Open. */ + access_normal = ACCESS_SMRAM_RX; + /* FALLTHROUGH */ + case 0x30: /* Protect. */ + access_smm |= ACCESS_SMRAM_R; + break; + } + } - if (val & 0x40) switch (val & 0x30) { - case 0x10: /* Open. */ - access_normal |= ACCESS_SMRAM_W; - /* FALLTHROUGH */ - case 0x30: /* Protect. */ - access_smm |= ACCESS_SMRAM_W; - break; - } + if (val & 0x40) + switch (val & 0x30) { + case 0x10: /* Open. */ + access_normal |= ACCESS_SMRAM_W; + /* FALLTHROUGH */ + case 0x30: /* Protect. */ + access_smm |= ACCESS_SMRAM_W; + break; + } - smram_enable(dev->smram[0], 0xa0000, 0xa0000, 0x20000, ((val & 0x30) == 0x10), (val & 0x30)); + smram_enable(dev->smram[0], 0xa0000, 0xa0000, 0x20000, ((val & 0x30) == 0x10), (val & 0x30)); - mem_set_access(ACCESS_NORMAL, 3, 0xa0000, 0x20000, access_normal); - mem_set_access(ACCESS_SMM, 3, 0xa0000, 0x20000, access_smm); + mem_set_access(ACCESS_NORMAL, 3, 0xa0000, 0x20000, access_normal); + mem_set_access(ACCESS_SMM, 3, 0xa0000, 0x20000, access_smm); } if (val & 0x08) - smram_enable(dev->smram[1], 0x38000, 0xa8000, 0x08000, 0, 1); + smram_enable(dev->smram[1], 0x38000, 0xa8000, 0x08000, 0, 1); flushmmucache_nopc(); } - static void ali1621_shadow_recalc(int cur_reg, ali1621_t *dev) { - int i, r_bit, w_bit, reg; + int i, r_bit, w_bit, reg; uint32_t base, flags = 0; shadowbios = shadowbios_write = 0; /* C0000-EFFFF */ for (i = 0; i < 12; i++) { - base = 0x000c0000 + (i << 14); - r_bit = (i << 1) + 4; - reg = 0x84; - if (r_bit > 23) { - r_bit &= 7; - reg += 3; - } else if (r_bit > 15) { - r_bit &= 7; - reg += 2; - } else if (r_bit > 7) { - r_bit &= 7; - reg++; - } - w_bit = r_bit + 1; + base = 0x000c0000 + (i << 14); + r_bit = (i << 1) + 4; + reg = 0x84; + if (r_bit > 23) { + r_bit &= 7; + reg += 3; + } else if (r_bit > 15) { + r_bit &= 7; + reg += 2; + } else if (r_bit > 7) { + r_bit &= 7; + reg++; + } + w_bit = r_bit + 1; - flags = (dev->pci_conf[reg] & (1 << r_bit)) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - flags |= ((dev->pci_conf[reg] & (1 << w_bit)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY); + flags = (dev->pci_conf[reg] & (1 << r_bit)) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + flags |= ((dev->pci_conf[reg] & (1 << w_bit)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY); - if (base >= 0x000e0000) { - if (dev->pci_conf[reg] & (1 << r_bit)) - shadowbios |= 1; - if (dev->pci_conf[reg] & (1 << r_bit)) - shadowbios_write |= 1; - } + if (base >= 0x000e0000) { + if (dev->pci_conf[reg] & (1 << r_bit)) + shadowbios |= 1; + if (dev->pci_conf[reg] & (1 << r_bit)) + shadowbios_write |= 1; + } - ali1621_log("%08X-%08X shadow: R%c, W%c\n", base, base + 0x00003fff, - (dev->pci_conf[reg] & (1 << r_bit)) ? 'I' : 'E', (dev->pci_conf[reg] & (1 << w_bit)) ? 'I' : 'E'); + ali1621_log("%08X-%08X shadow: R%c, W%c\n", base, base + 0x00003fff, + (dev->pci_conf[reg] & (1 << r_bit)) ? 'I' : 'E', (dev->pci_conf[reg] & (1 << w_bit)) ? 'I' : 'E'); mem_set_mem_state_both(base, 0x00004000, flags); } /* F0000-FFFFF */ - base = 0x000f0000; + base = 0x000f0000; r_bit = 4; w_bit = 5; - reg = 0x87; + reg = 0x87; flags = (dev->pci_conf[reg] & (1 << r_bit)) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; flags |= ((dev->pci_conf[reg] & (1 << w_bit)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY); if (dev->pci_conf[reg] & (1 << r_bit)) - shadowbios |= 1; + shadowbios |= 1; if (dev->pci_conf[reg] & (1 << r_bit)) - shadowbios_write |= 1; + shadowbios_write |= 1; ali1621_log("%08X-%08X shadow: R%c, W%c\n", base, base + 0x0000ffff, - (dev->pci_conf[reg] & (1 << r_bit)) ? 'I' : 'E', (dev->pci_conf[reg] & (1 << w_bit)) ? 'I' : 'E'); + (dev->pci_conf[reg] & (1 << r_bit)) ? 'I' : 'E', (dev->pci_conf[reg] & (1 << w_bit)) ? 'I' : 'E'); mem_set_mem_state_both(base, 0x00010000, flags); flushmmucache_nopc(); } - static void ali1621_mask_bar(ali1621_t *dev) { uint32_t bar, mask; switch (dev->pci_conf[0xbc] & 0x0f) { - case 0x00: - default: - mask = 0x00000000; - break; - case 0x01: - mask = 0xfff00000; - break; - case 0x02: - mask = 0xffe00000; - break; - case 0x03: - mask = 0xffc00000; - break; - case 0x04: - mask = 0xff800000; - break; - case 0x06: - mask = 0xff000000; - break; - case 0x07: - mask = 0xfe000000; - break; - case 0x08: - mask = 0xfc000000; - break; - case 0x09: - mask = 0xf8000000; - break; - case 0x0a: - mask = 0xf0000000; - break; + case 0x00: + default: + mask = 0x00000000; + break; + case 0x01: + mask = 0xfff00000; + break; + case 0x02: + mask = 0xffe00000; + break; + case 0x03: + mask = 0xffc00000; + break; + case 0x04: + mask = 0xff800000; + break; + case 0x06: + mask = 0xff000000; + break; + case 0x07: + mask = 0xfe000000; + break; + case 0x08: + mask = 0xfc000000; + break; + case 0x09: + mask = 0xf8000000; + break; + case 0x0a: + mask = 0xf0000000; + break; } - bar = ((dev->pci_conf[0x13] << 24) | (dev->pci_conf[0x12] << 16)) & mask; + bar = ((dev->pci_conf[0x13] << 24) | (dev->pci_conf[0x12] << 16)) & mask; dev->pci_conf[0x12] = (bar >> 16) & 0xff; dev->pci_conf[0x13] = (bar >> 24) & 0xff; } - static void ali1621_write(int func, int addr, uint8_t val, void *priv) { - ali1621_t *dev = (ali1621_t *)priv; + ali1621_t *dev = (ali1621_t *) priv; switch (addr) { - case 0x04: - dev->pci_conf[addr] = val & 0x01; - break; - case 0x05: - dev->pci_conf[addr] = val & 0x01; - break; + case 0x04: + dev->pci_conf[addr] = val & 0x01; + break; + case 0x05: + dev->pci_conf[addr] = val & 0x01; + break; - case 0x07: - dev->pci_conf[addr] &= ~(val & 0xf0); - break; + case 0x07: + dev->pci_conf[addr] &= ~(val & 0xf0); + break; - case 0x0d: - dev->pci_conf[addr] = val & 0xf8; - break; + case 0x0d: + dev->pci_conf[addr] = val & 0xf8; + break; - case 0x12: - dev->pci_conf[0x12] = (val & 0xc0); - ali1621_mask_bar(dev); - break; - case 0x13: - dev->pci_conf[0x13] = val; - ali1621_mask_bar(dev); - break; + case 0x12: + dev->pci_conf[0x12] = (val & 0xc0); + ali1621_mask_bar(dev); + break; + case 0x13: + dev->pci_conf[0x13] = val; + ali1621_mask_bar(dev); + break; - case 0x34: - dev->pci_conf[addr] = val; - break; + case 0x34: + dev->pci_conf[addr] = val; + break; - case 0x40: - dev->pci_conf[addr] = val; - break; - case 0x41: - dev->pci_conf[addr] = val; - break; + case 0x40: + dev->pci_conf[addr] = val; + break; + case 0x41: + dev->pci_conf[addr] = val; + break; - case 0x42: - dev->pci_conf[addr] = val; - break; - case 0x43: - dev->pci_conf[addr] = val; - break; + case 0x42: + dev->pci_conf[addr] = val; + break; + case 0x43: + dev->pci_conf[addr] = val; + break; - case 0x44: - dev->pci_conf[addr] = val; - break; - case 0x45: - dev->pci_conf[addr] = val; - break; + case 0x44: + dev->pci_conf[addr] = val; + break; + case 0x45: + dev->pci_conf[addr] = val; + break; - case 0x46: - dev->pci_conf[addr] = val; - break; - case 0x47: - dev->pci_conf[addr] = val; - break; + case 0x46: + dev->pci_conf[addr] = val; + break; + case 0x47: + dev->pci_conf[addr] = val; + break; - case 0x48: - dev->pci_conf[addr] = val; - break; - case 0x49: - dev->pci_conf[addr] = val; - break; + case 0x48: + dev->pci_conf[addr] = val; + break; + case 0x49: + dev->pci_conf[addr] = val; + break; - case 0x4a: - dev->pci_conf[addr] = val; - break; + case 0x4a: + dev->pci_conf[addr] = val; + break; - case 0x4b: - dev->pci_conf[addr] = val & 0x0f; - break; + case 0x4b: + dev->pci_conf[addr] = val & 0x0f; + break; - case 0x4c: - dev->pci_conf[addr] = val; - break; + case 0x4c: + dev->pci_conf[addr] = val; + break; - case 0x4d: - dev->pci_conf[addr] = val; - break; + case 0x4d: + dev->pci_conf[addr] = val; + break; - case 0x4e: - dev->pci_conf[addr] = val; - break; - case 0x4f: - dev->pci_conf[addr] = val; - break; + case 0x4e: + dev->pci_conf[addr] = val; + break; + case 0x4f: + dev->pci_conf[addr] = val; + break; - case 0x50: - dev->pci_conf[addr] = val & 0xef; - break; + case 0x50: + dev->pci_conf[addr] = val & 0xef; + break; - case 0x51: - dev->pci_conf[addr] = val; - break; + case 0x51: + dev->pci_conf[addr] = val; + break; - case 0x52: - dev->pci_conf[addr] = val & 0x9f; - break; + case 0x52: + dev->pci_conf[addr] = val & 0x9f; + break; - case 0x53: - dev->pci_conf[addr] = val; - break; + case 0x53: + dev->pci_conf[addr] = val; + break; - case 0x54: - dev->pci_conf[addr] = val & 0xb4; - break; - case 0x55: - dev->pci_conf[addr] = val & 0x01; - break; + case 0x54: + dev->pci_conf[addr] = val & 0xb4; + break; + case 0x55: + dev->pci_conf[addr] = val & 0x01; + break; - case 0x56: - dev->pci_conf[addr] = val & 0x3f; - break; + case 0x56: + dev->pci_conf[addr] = val & 0x3f; + break; - case 0x57: - dev->pci_conf[addr] = val & 0x08; - break; + case 0x57: + dev->pci_conf[addr] = val & 0x08; + break; - case 0x58: - dev->pci_conf[addr] = val; - break; + case 0x58: + dev->pci_conf[addr] = val; + break; - case 0x59: - dev->pci_conf[addr] = val; - break; + case 0x59: + dev->pci_conf[addr] = val; + break; - case 0x5a: - dev->pci_conf[addr] = val; - break; + case 0x5a: + dev->pci_conf[addr] = val; + break; - case 0x5c: - dev->pci_conf[addr] = val & 0x01; - break; + case 0x5c: + dev->pci_conf[addr] = val & 0x01; + break; - case 0x60: - dev->pci_conf[addr] = val; - break; + case 0x60: + dev->pci_conf[addr] = val; + break; - case 0x61: - dev->pci_conf[addr] = val; - break; + case 0x61: + dev->pci_conf[addr] = val; + break; - case 0x62: - dev->pci_conf[addr] = val; - break; + case 0x62: + dev->pci_conf[addr] = val; + break; - case 0x63: - dev->pci_conf[addr] = val; - break; + case 0x63: + dev->pci_conf[addr] = val; + break; - case 0x64: - dev->pci_conf[addr] = val & 0xb7; - break; - case 0x65: - dev->pci_conf[addr] = val & 0x01; - break; + case 0x64: + dev->pci_conf[addr] = val & 0xb7; + break; + case 0x65: + dev->pci_conf[addr] = val & 0x01; + break; - case 0x66: - dev->pci_conf[addr] &= ~(val & 0x33); - break; + case 0x66: + dev->pci_conf[addr] &= ~(val & 0x33); + break; - case 0x67: - dev->pci_conf[addr] = val; - break; + case 0x67: + dev->pci_conf[addr] = val; + break; - case 0x68: - dev->pci_conf[addr] = val; - break; + case 0x68: + dev->pci_conf[addr] = val; + break; - case 0x69: - dev->pci_conf[addr] = val; - break; + case 0x69: + dev->pci_conf[addr] = val; + break; - case 0x6c ... 0x7b: - /* Bits 22:20 = DRAM Row size: - - 000: 4 MB; - - 001: 8 MB; - - 010: 16 MB; - - 011: 32 MB; - - 100: 64 MB; - - 101: 128 MB; - - 110: 256 MB; - - 111: Reserved. */ - dev->pci_conf[addr] = val; - spd_write_drbs_ali1621(dev->pci_conf, 0x6c, 0x7b); - break; + case 0x6c ... 0x7b: + /* Bits 22:20 = DRAM Row size: + - 000: 4 MB; + - 001: 8 MB; + - 010: 16 MB; + - 011: 32 MB; + - 100: 64 MB; + - 101: 128 MB; + - 110: 256 MB; + - 111: Reserved. */ + dev->pci_conf[addr] = val; + spd_write_drbs_ali1621(dev->pci_conf, 0x6c, 0x7b); + break; - case 0x7c ... 0x7f: - dev->pci_conf[addr] = val; - break; + case 0x7c ... 0x7f: + dev->pci_conf[addr] = val; + break; - case 0x80: - dev->pci_conf[addr] = val; - break; - case 0x81: - dev->pci_conf[addr] = val & 0xdf; - break; + case 0x80: + dev->pci_conf[addr] = val; + break; + case 0x81: + dev->pci_conf[addr] = val & 0xdf; + break; - case 0x82: - dev->pci_conf[addr] = val & 0xf7; - break; + case 0x82: + dev->pci_conf[addr] = val & 0xf7; + break; - case 0x83: - dev->pci_conf[addr] = val & 0xfc; - ali1621_smram_recalc(val & 0xfc, dev); - break; + case 0x83: + dev->pci_conf[addr] = val & 0xfc; + ali1621_smram_recalc(val & 0xfc, dev); + break; - case 0x84 ... 0x87: - if (addr == 0x87) - dev->pci_conf[addr] = val & 0x3f; - else - dev->pci_conf[addr] = val; - ali1621_shadow_recalc(val, dev); - break; + case 0x84 ... 0x87: + if (addr == 0x87) + dev->pci_conf[addr] = val & 0x3f; + else + dev->pci_conf[addr] = val; + ali1621_shadow_recalc(val, dev); + break; - case 0x88: case 0x89: - dev->pci_conf[addr] = val; - break; - case 0x8a: - dev->pci_conf[addr] = val & 0xc5; - break; - case 0x8b: - dev->pci_conf[addr] = val & 0xbf; - break; + case 0x88: + case 0x89: + dev->pci_conf[addr] = val; + break; + case 0x8a: + dev->pci_conf[addr] = val & 0xc5; + break; + case 0x8b: + dev->pci_conf[addr] = val & 0xbf; + break; - case 0x8c ... 0x8f: - dev->pci_conf[addr] = val; - break; + case 0x8c ... 0x8f: + dev->pci_conf[addr] = val; + break; - case 0x90: - dev->pci_conf[addr] = val; - break; - case 0x91: - dev->pci_conf[addr] = val & 0x07; - break; + case 0x90: + dev->pci_conf[addr] = val; + break; + case 0x91: + dev->pci_conf[addr] = val & 0x07; + break; - case 0x94 ... 0x97: - dev->pci_conf[addr] = val; - break; + case 0x94 ... 0x97: + dev->pci_conf[addr] = val; + break; - case 0x98 ... 0x9b: - dev->pci_conf[addr] = val; - break; + case 0x98 ... 0x9b: + dev->pci_conf[addr] = val; + break; - case 0x9c ... 0x9f: - dev->pci_conf[addr] = val; - break; + case 0x9c ... 0x9f: + dev->pci_conf[addr] = val; + break; - case 0xa0: case 0xa1: - dev->pci_conf[addr] = val; - break; + case 0xa0: + case 0xa1: + dev->pci_conf[addr] = val; + break; - case 0xbc: - dev->pci_conf[addr] = val & 0x0f; - ali1621_mask_bar(dev); - break; - case 0xbd: - dev->pci_conf[addr] = val & 0xf0; - break; - case 0xbe: case 0xbf: - dev->pci_conf[addr] = val; - break; + case 0xbc: + dev->pci_conf[addr] = val & 0x0f; + ali1621_mask_bar(dev); + break; + case 0xbd: + dev->pci_conf[addr] = val & 0xf0; + break; + case 0xbe: + case 0xbf: + dev->pci_conf[addr] = val; + break; - case 0xc0: - dev->pci_conf[addr] = val & 0xb1; - break; + case 0xc0: + dev->pci_conf[addr] = val & 0xb1; + break; - case 0xc4 ... 0xc7: - dev->pci_conf[addr] = val; - break; + case 0xc4 ... 0xc7: + dev->pci_conf[addr] = val; + break; - case 0xc8: - dev->pci_conf[addr] = val & 0x8c; - break; - case 0xc9: - dev->pci_conf[addr] = val; - break; - case 0xca: - dev->pci_conf[addr] = val & 0x7f; - break; - case 0xcb: - dev->pci_conf[addr] = val & 0x87; - break; + case 0xc8: + dev->pci_conf[addr] = val & 0x8c; + break; + case 0xc9: + dev->pci_conf[addr] = val; + break; + case 0xca: + dev->pci_conf[addr] = val & 0x7f; + break; + case 0xcb: + dev->pci_conf[addr] = val & 0x87; + break; - case 0xcc ... 0xcf: - dev->pci_conf[addr] = val; - break; + case 0xcc ... 0xcf: + dev->pci_conf[addr] = val; + break; - case 0xd0: - dev->pci_conf[addr] = val & 0x80; - break; - case 0xd2: - dev->pci_conf[addr] = val & 0x40; - break; - case 0xd3: - dev->pci_conf[addr] = val & 0xb0; - break; + case 0xd0: + dev->pci_conf[addr] = val & 0x80; + break; + case 0xd2: + dev->pci_conf[addr] = val & 0x40; + break; + case 0xd3: + dev->pci_conf[addr] = val & 0xb0; + break; - case 0xd4: - dev->pci_conf[addr] = val; - break; - case 0xd5: - dev->pci_conf[addr] = val & 0xef; - break; - case 0xd6: case 0xd7: - dev->pci_conf[addr] = val; - break; + case 0xd4: + dev->pci_conf[addr] = val; + break; + case 0xd5: + dev->pci_conf[addr] = val & 0xef; + break; + case 0xd6: + case 0xd7: + dev->pci_conf[addr] = val; + break; - case 0xf0 ... 0xff: - dev->pci_conf[addr] = val; - break; + case 0xf0 ... 0xff: + dev->pci_conf[addr] = val; + break; } } - static uint8_t ali1621_read(int func, int addr, void *priv) { - ali1621_t *dev = (ali1621_t *)priv; - uint8_t ret = 0xff; + ali1621_t *dev = (ali1621_t *) priv; + uint8_t ret = 0xff; ret = dev->pci_conf[addr]; return ret; } - static void ali1621_reset(void *priv) { - ali1621_t *dev = (ali1621_t *)priv; - int i; + ali1621_t *dev = (ali1621_t *) priv; + int i; /* Default Registers */ dev->pci_conf[0x00] = 0xb9; @@ -636,14 +631,13 @@ ali1621_reset(void *priv) ali1621_write(0, 0x83, 0x08, dev); for (i = 0; i < 4; i++) - ali1621_write(0, 0x84 + i, 0x00, dev); + ali1621_write(0, 0x84 + i, 0x00, dev); } - static void ali1621_close(void *priv) { - ali1621_t *dev = (ali1621_t *)priv; + ali1621_t *dev = (ali1621_t *) priv; smram_del(dev->smram[1]); smram_del(dev->smram[0]); @@ -651,11 +645,10 @@ ali1621_close(void *priv) free(dev); } - static void * ali1621_init(const device_t *info) { - ali1621_t *dev = (ali1621_t *)malloc(sizeof(ali1621_t)); + ali1621_t *dev = (ali1621_t *) malloc(sizeof(ali1621_t)); memset(dev, 0, sizeof(ali1621_t)); pci_add_card(PCI_ADD_NORTHBRIDGE, ali1621_read, ali1621_write, dev); @@ -671,15 +664,15 @@ ali1621_init(const device_t *info) } const device_t ali1621_device = { - .name = "ALi M1621 CPU-to-PCI Bridge", + .name = "ALi M1621 CPU-to-PCI Bridge", .internal_name = "ali1621", - .flags = DEVICE_PCI, - .local = 0, - .init = ali1621_init, - .close = ali1621_close, - .reset = ali1621_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = ali1621_init, + .close = ali1621_close, + .reset = ali1621_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/ali6117.c b/src/chipset/ali6117.c index 612970e45..8f1b38627 100644 --- a/src/chipset/ali6117.c +++ b/src/chipset/ali6117.c @@ -35,18 +35,15 @@ #include <86box/hdc_ide.h> #include <86box/chipset.h> - -typedef struct ali6117_t -{ - uint32_t local; +typedef struct ali6117_t { + uint32_t local; /* Main registers (port 22h/23h) */ - uint8_t unlocked, mode; - uint8_t reg_offset; - uint8_t regs[256]; + uint8_t unlocked, mode; + uint8_t reg_offset; + uint8_t regs[256]; } ali6117_t; - /* Total size, Bank 0 size, Bank 1 size, Bank 2 size, Bank 3 size. */ static uint32_t ali6117_modes[32][5] = { { 1024, 512, 512, 0, 0 }, @@ -83,7 +80,6 @@ static uint32_t ali6117_modes[32][5] = { { 65536, 32768, 32768, 0, 0 } }; - #ifdef ENABLE_ALI6117_LOG int ali6117_do_log = ENABLE_ALI6117_LOG; @@ -93,108 +89,105 @@ ali6117_log(const char *fmt, ...) va_list ap; if (ali6117_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define ali6117_log(fmt, ...) +# define ali6117_log(fmt, ...) #endif - static void ali6117_recalcmapping(ali6117_t *dev) { - uint8_t reg, bitpair; + uint8_t reg, bitpair; uint32_t base, size; - int state; + int state; - shadowbios = 0; + shadowbios = 0; shadowbios_write = 0; ali6117_log("ALI6117: Shadowing for A0000-BFFFF (reg 12 bit 1) = %s\n", (dev->regs[0x12] & 0x02) ? "on" : "off"); mem_set_mem_state(0xa0000, 0x20000, (dev->regs[0x12] & 0x02) ? (MEM_WRITE_INTERNAL | MEM_READ_INTERNAL) : (MEM_WRITE_EXTANY | MEM_READ_EXTANY)); for (reg = 0; reg <= 1; reg++) { - for (bitpair = 0; bitpair <= 3; bitpair++) { - size = 0x8000; - base = 0xc0000 + (size * ((reg * 4) + bitpair)); - ali6117_log("ALI6117: Shadowing for %05X-%05X (reg %02X bp %d wmask %02X rmask %02X) =", base, base + size - 1, 0x14 + reg, bitpair, 1 << ((bitpair * 2) + 1), 1 << (bitpair * 2)); + for (bitpair = 0; bitpair <= 3; bitpair++) { + size = 0x8000; + base = 0xc0000 + (size * ((reg * 4) + bitpair)); + ali6117_log("ALI6117: Shadowing for %05X-%05X (reg %02X bp %d wmask %02X rmask %02X) =", base, base + size - 1, 0x14 + reg, bitpair, 1 << ((bitpair * 2) + 1), 1 << (bitpair * 2)); - state = 0; - if (dev->regs[0x14 + reg] & (1 << ((bitpair * 2) + 1))) { - ali6117_log(" w on"); - state |= MEM_WRITE_INTERNAL; - if (base >= 0xe0000) - shadowbios_write |= 1; - } else { - ali6117_log(" w off"); - state |= MEM_WRITE_EXTANY; - } - if (dev->regs[0x14 + reg] & (1 << (bitpair * 2))) { - ali6117_log("; r on\n"); - state |= MEM_READ_INTERNAL; - if (base >= 0xe0000) - shadowbios |= 1; - } else { - ali6117_log("; r off\n"); - state |= MEM_READ_EXTANY; - } + state = 0; + if (dev->regs[0x14 + reg] & (1 << ((bitpair * 2) + 1))) { + ali6117_log(" w on"); + state |= MEM_WRITE_INTERNAL; + if (base >= 0xe0000) + shadowbios_write |= 1; + } else { + ali6117_log(" w off"); + state |= MEM_WRITE_EXTANY; + } + if (dev->regs[0x14 + reg] & (1 << (bitpair * 2))) { + ali6117_log("; r on\n"); + state |= MEM_READ_INTERNAL; + if (base >= 0xe0000) + shadowbios |= 1; + } else { + ali6117_log("; r off\n"); + state |= MEM_READ_EXTANY; + } - mem_set_mem_state(base, size, state); - } + mem_set_mem_state(base, size, state); + } } flushmmucache_nopc(); } - static void ali6117_bank_recalc(ali6117_t *dev) { - int i; + int i; uint32_t bank, addr; for (i = 0x00000000; i < (mem_size << 10); i += 4096) { - if ((i >= 0x000a0000) && (i < 0x00100000)) - continue; + if ((i >= 0x000a0000) && (i < 0x00100000)) + continue; - if (!is6117 && (i >= 0x00f00000) && (i < 0x01000000)) - continue; + if (!is6117 && (i >= 0x00f00000) && (i < 0x01000000)) + continue; - if (is6117 && (i >= 0x03f00000) && (i < 0x04000000)) - continue; + if (is6117 && (i >= 0x03f00000) && (i < 0x04000000)) + continue; - switch (dev->regs[0x10] & 0xf8) { - case 0xe8: - bank = (i >> 12) & 3; - addr = (i & 0xfff) | ((i >> 14) << 12); - ali6117_log("E8 (%08X): Bank %i, address %08X vs. bank size %08X\n", i, bank, addr, ali6117_modes[dev->mode][bank + 1] * 1024); - if (addr < (ali6117_modes[dev->mode][bank + 1] * 1024)) - mem_set_mem_state_both(i, 4096, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - else - mem_set_mem_state_both(i, 4096, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - break; - case 0xf8: - bank = (i >> 12) & 1; - addr = (i & 0xfff) | ((i >> 13) << 12); - ali6117_log("F8 (%08X): Bank %i, address %08X vs. bank size %08X\n", i, bank, addr, ali6117_modes[dev->mode][bank + 1] * 1024); - if (addr < (ali6117_modes[dev->mode][bank + 1] * 1024)) - mem_set_mem_state_both(i, 4096, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - else - mem_set_mem_state_both(i, 4096, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - break; - default: - mem_set_mem_state_both(i, 4096, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - break; - } + switch (dev->regs[0x10] & 0xf8) { + case 0xe8: + bank = (i >> 12) & 3; + addr = (i & 0xfff) | ((i >> 14) << 12); + ali6117_log("E8 (%08X): Bank %i, address %08X vs. bank size %08X\n", i, bank, addr, ali6117_modes[dev->mode][bank + 1] * 1024); + if (addr < (ali6117_modes[dev->mode][bank + 1] * 1024)) + mem_set_mem_state_both(i, 4096, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + else + mem_set_mem_state_both(i, 4096, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + break; + case 0xf8: + bank = (i >> 12) & 1; + addr = (i & 0xfff) | ((i >> 13) << 12); + ali6117_log("F8 (%08X): Bank %i, address %08X vs. bank size %08X\n", i, bank, addr, ali6117_modes[dev->mode][bank + 1] * 1024); + if (addr < (ali6117_modes[dev->mode][bank + 1] * 1024)) + mem_set_mem_state_both(i, 4096, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + else + mem_set_mem_state_both(i, 4096, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + break; + default: + mem_set_mem_state_both(i, 4096, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + break; + } } flushmmucache(); } - static void ali6117_reg_write(uint16_t addr, uint8_t val, void *priv) { @@ -203,194 +196,202 @@ ali6117_reg_write(uint16_t addr, uint8_t val, void *priv) ali6117_log("ALI6117: reg_write(%04X, %02X)\n", addr, val); if (addr == 0x22) - dev->reg_offset = val; + dev->reg_offset = val; else if (dev->reg_offset == 0x13) - dev->unlocked = (val == 0xc5); + dev->unlocked = (val == 0xc5); else if (dev->unlocked) { - ali6117_log("ALI6117: regs[%02X] = %02X\n", dev->reg_offset, val); + ali6117_log("ALI6117: regs[%02X] = %02X\n", dev->reg_offset, val); - if (!(dev->local & 0x08) || (dev->reg_offset < 0x30)) switch (dev->reg_offset) { - case 0x30: case 0x34: case 0x35: case 0x3e: - case 0x3f: case 0x46: case 0x4c: case 0x6a: - case 0x73: - return; /* read-only registers */ + if (!(dev->local & 0x08) || (dev->reg_offset < 0x30)) + switch (dev->reg_offset) { + case 0x30: + case 0x34: + case 0x35: + case 0x3e: + case 0x3f: + case 0x46: + case 0x4c: + case 0x6a: + case 0x73: + return; /* read-only registers */ - case 0x10: - refresh_at_enable = !(val & 0x02) || !!(dev->regs[0x20] & 0x80); - dev->regs[dev->reg_offset] = val; + case 0x10: + refresh_at_enable = !(val & 0x02) || !!(dev->regs[0x20] & 0x80); + dev->regs[dev->reg_offset] = val; - if (dev->local != 0x8) { - if (val & 0x04) - mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - else - mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + if (dev->local != 0x8) { + if (val & 0x04) + mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + else + mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - ali6117_bank_recalc(dev); - } - break; + ali6117_bank_recalc(dev); + } + break; - case 0x12: - val &= 0xf7; - /* FALL-THROUGH */ + case 0x12: + val &= 0xf7; + /* FALL-THROUGH */ - case 0x14: case 0x15: - dev->regs[dev->reg_offset] = val; - ali6117_recalcmapping(dev); - break; + case 0x14: + case 0x15: + dev->regs[dev->reg_offset] = val; + ali6117_recalcmapping(dev); + break; - case 0x1e: - val &= 0x07; + case 0x1e: + val &= 0x07; - switch (val) { - /* Half PIT clock. */ - case 0x0: - cpu_set_isa_speed(7159091); - break; + switch (val) { + /* Half PIT clock. */ + case 0x0: + cpu_set_isa_speed(7159091); + break; - /* Divisors on the input clock PCLK2, which is double the CPU clock. */ - case 0x1: - cpu_set_isa_speed(cpu_busspeed / 1.5); - break; + /* Divisors on the input clock PCLK2, which is double the CPU clock. */ + case 0x1: + cpu_set_isa_speed(cpu_busspeed / 1.5); + break; - case 0x2: - cpu_set_isa_speed(cpu_busspeed / 2); - break; + case 0x2: + cpu_set_isa_speed(cpu_busspeed / 2); + break; - case 0x3: - cpu_set_isa_speed(cpu_busspeed / 2.5); - break; + case 0x3: + cpu_set_isa_speed(cpu_busspeed / 2.5); + break; - case 0x4: - cpu_set_isa_speed(cpu_busspeed / 3); - break; + case 0x4: + cpu_set_isa_speed(cpu_busspeed / 3); + break; - case 0x5: - cpu_set_isa_speed(cpu_busspeed / 4); - break; + case 0x5: + cpu_set_isa_speed(cpu_busspeed / 4); + break; - case 0x6: - cpu_set_isa_speed(cpu_busspeed / 5); - break; + case 0x6: + cpu_set_isa_speed(cpu_busspeed / 5); + break; - case 0x7: - cpu_set_isa_speed(cpu_busspeed / 6); - break; - } - break; + case 0x7: + cpu_set_isa_speed(cpu_busspeed / 6); + break; + } + break; - case 0x20: - val &= 0xbf; - refresh_at_enable = !(dev->regs[0x10] & 0x02) || !!(val & 0x80); - break; + case 0x20: + val &= 0xbf; + refresh_at_enable = !(dev->regs[0x10] & 0x02) || !!(val & 0x80); + break; - case 0x31: - /* TODO: fast gate A20 (bit 0) */ - val &= 0x21; - break; + case 0x31: + /* TODO: fast gate A20 (bit 0) */ + val &= 0x21; + break; - case 0x32: - val &= 0xc1; - break; + case 0x32: + val &= 0xc1; + break; - case 0x33: - val &= 0xfd; - break; + case 0x33: + val &= 0xfd; + break; - case 0x36: - val &= 0xf0; - val |= dev->regs[dev->reg_offset]; - break; + case 0x36: + val &= 0xf0; + val |= dev->regs[dev->reg_offset]; + break; - case 0x37: - val &= 0xf5; - break; + case 0x37: + val &= 0xf5; + break; - case 0x3c: - val &= 0x8f; - ide_pri_disable(); - ide_set_base(1, (val & 0x01) ? 0x170 : 0x1f0); - ide_set_side(1, (val & 0x01) ? 0x376 : 0x3f6); - ide_pri_enable(); - break; + case 0x3c: + val &= 0x8f; + ide_pri_disable(); + ide_set_base(1, (val & 0x01) ? 0x170 : 0x1f0); + ide_set_side(1, (val & 0x01) ? 0x376 : 0x3f6); + ide_pri_enable(); + break; - case 0x44: case 0x45: - val &= 0x3f; - break; + case 0x44: + case 0x45: + val &= 0x3f; + break; - case 0x4a: - val &= 0xfe; - break; + case 0x4a: + val &= 0xfe; + break; - case 0x55: - val &= 0x03; - break; + case 0x55: + val &= 0x03; + break; - case 0x56: - val &= 0xc7; - break; + case 0x56: + val &= 0xc7; + break; - case 0x58: - val &= 0xc3; - break; + case 0x58: + val &= 0xc3; + break; - case 0x59: - val &= 0x60; - break; + case 0x59: + val &= 0x60; + break; - case 0x5b: - val &= 0x1f; - break; + case 0x5b: + val &= 0x1f; + break; - case 0x64: - val &= 0xf7; - break; + case 0x64: + val &= 0xf7; + break; - case 0x66: - val &= 0xe3; - break; + case 0x66: + val &= 0xe3; + break; - case 0x67: - val &= 0xdf; - break; + case 0x67: + val &= 0xdf; + break; - case 0x69: - val &= 0x50; - break; + case 0x69: + val &= 0x50; + break; - case 0x6b: - val &= 0x7f; - break; + case 0x6b: + val &= 0x7f; + break; - case 0x6e: case 0x6f: - val &= 0x03; - break; + case 0x6e: + case 0x6f: + val &= 0x03; + break; - case 0x71: - val &= 0x1f; - break; - } + case 0x71: + val &= 0x1f; + break; + } - dev->regs[dev->reg_offset] = val; + dev->regs[dev->reg_offset] = val; } } - static uint8_t ali6117_reg_read(uint16_t addr, void *priv) { ali6117_t *dev = (ali6117_t *) priv; - uint8_t ret; + uint8_t ret; if (addr == 0x22) - ret = dev->reg_offset; + ret = dev->reg_offset; else - ret = dev->regs[dev->reg_offset]; + ret = dev->regs[dev->reg_offset]; ali6117_log("ALI6117: reg_read(%04X) = %02X\n", dev->reg_offset, ret); return ret; } - static void ali6117_reset(void *priv) { @@ -408,11 +409,11 @@ ali6117_reset(void *priv) dev->regs[0x1d] = 0xff; dev->regs[0x20] = 0x80; if (dev->local & 0x08) { - dev->regs[0x30] = 0x08; - dev->regs[0x31] = 0x01; - dev->regs[0x34] = 0x04; /* enable internal RTC */ - dev->regs[0x35] = 0x20; /* enable internal KBC */ - dev->regs[0x36] = dev->local & 0x07; /* M6117D ID */ + dev->regs[0x30] = 0x08; + dev->regs[0x31] = 0x01; + dev->regs[0x34] = 0x04; /* enable internal RTC */ + dev->regs[0x35] = 0x20; /* enable internal KBC */ + dev->regs[0x36] = dev->local & 0x07; /* M6117D ID */ } cpu_set_isa_speed(7159091); @@ -420,13 +421,12 @@ ali6117_reset(void *priv) refresh_at_enable = 1; if (dev->local != 0x8) { - /* On-board memory 15-16M is enabled by default. */ - mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - ali6117_bank_recalc(dev); + /* On-board memory 15-16M is enabled by default. */ + mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + ali6117_bank_recalc(dev); } } - static void ali6117_setup(ali6117_t *dev) { @@ -434,10 +434,9 @@ ali6117_setup(ali6117_t *dev) /* Main register interface */ io_sethandler(0x22, 2, - ali6117_reg_read, NULL, NULL, ali6117_reg_write, NULL, NULL, dev); + ali6117_reg_read, NULL, NULL, ali6117_reg_write, NULL, NULL, dev); } - static void ali6117_close(void *priv) { @@ -446,12 +445,11 @@ ali6117_close(void *priv) ali6117_log("ALI6117: close()\n"); io_removehandler(0x22, 2, - ali6117_reg_read, NULL, NULL, ali6117_reg_write, NULL, NULL, dev); + ali6117_reg_read, NULL, NULL, ali6117_reg_write, NULL, NULL, dev); free(dev); } - static void * ali6117_init(const device_t *info) { @@ -469,44 +467,44 @@ ali6117_init(const device_t *info) ali6117_setup(dev); for (i = 31; i >= 0; i--) { - if ((mem_size >= ali6117_modes[i][0]) && (ali6117_modes[i][0] > last_match)) { - last_match = ali6117_modes[i][0]; - dev->mode = i; - } + if ((mem_size >= ali6117_modes[i][0]) && (ali6117_modes[i][0] > last_match)) { + last_match = ali6117_modes[i][0]; + dev->mode = i; + } } ali6117_reset(dev); if (!(dev->local & 0x08)) - pic_elcr_io_handler(0); + pic_elcr_io_handler(0); return dev; } const device_t ali1217_device = { - .name = "ALi M1217", + .name = "ALi M1217", .internal_name = "ali1217", - .flags = DEVICE_AT, - .local = 0x8, - .init = ali6117_init, - .close = ali6117_close, - .reset = ali6117_reset, + .flags = DEVICE_AT, + .local = 0x8, + .init = ali6117_init, + .close = ali6117_close, + .reset = ali6117_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ali6117d_device = { - .name = "ALi M6117D", + .name = "ALi M6117D", .internal_name = "ali6117d", - .flags = DEVICE_AT, - .local = 0x2, - .init = ali6117_init, - .close = ali6117_close, - .reset = ali6117_reset, + .flags = DEVICE_AT, + .local = 0x2, + .init = ali6117_init, + .close = ali6117_close, + .reset = ali6117_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/contaq_82c59x.c b/src/chipset/contaq_82c59x.c index 97c8716eb..b724cbf4b 100644 --- a/src/chipset/contaq_82c59x.c +++ b/src/chipset/contaq_82c59x.c @@ -29,7 +29,6 @@ #include <86box/smram.h> #include <86box/chipset.h> - #ifdef ENABLE_CONTAQ_82C59X_LOG int contaq_82c59x_do_log = ENABLE_CONTAQ_82C59X_LOG; @@ -38,274 +37,268 @@ contaq_82c59x_log(const char *fmt, ...) { va_list ap; - if (contaq_82c59x_do_log) - { + if (contaq_82c59x_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define contaq_82c59x_log(fmt, ...) +# define contaq_82c59x_log(fmt, ...) #endif - typedef struct { - uint32_t phys, virt; + uint32_t phys, virt; } mem_remapping_t; - typedef struct { - uint8_t index, green, - smi_status_set, - regs[256], smi_status[2]; + uint8_t index, green, + smi_status_set, + regs[256], smi_status[2]; - smram_t *smram[2]; + smram_t *smram[2]; } contaq_82c59x_t; - static void contaq_82c59x_isa_speed_recalc(contaq_82c59x_t *dev) { if (dev->regs[0x1c] & 0x02) - cpu_set_isa_speed(7159091); + cpu_set_isa_speed(7159091); else { - /* TODO: ISA clock dividers for 386 and alt. 486. */ - switch (dev->regs[0x10] & 0x03) { - case 0x00: - cpu_set_isa_speed(cpu_busspeed / 4); - break; - case 0x01: - cpu_set_isa_speed(cpu_busspeed / 6); - break; - case 0x02: - cpu_set_isa_speed(cpu_busspeed / 8); - break; - case 0x03: - cpu_set_isa_speed(cpu_busspeed / 5); - break; - } + /* TODO: ISA clock dividers for 386 and alt. 486. */ + switch (dev->regs[0x10] & 0x03) { + case 0x00: + cpu_set_isa_speed(cpu_busspeed / 4); + break; + case 0x01: + cpu_set_isa_speed(cpu_busspeed / 6); + break; + case 0x02: + cpu_set_isa_speed(cpu_busspeed / 8); + break; + case 0x03: + cpu_set_isa_speed(cpu_busspeed / 5); + break; + } } } - static void contaq_82c59x_shadow_recalc(contaq_82c59x_t *dev) { uint32_t i, base; - uint8_t bit; + uint8_t bit; shadowbios = shadowbios_write = 0; /* F0000-FFFFF */ if (dev->regs[0x15] & 0x80) { - shadowbios |= 1; - mem_set_mem_state_both(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_EXTANY); + shadowbios |= 1; + mem_set_mem_state_both(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_EXTANY); } else { - shadowbios_write |= 1; - mem_set_mem_state_both(0xf0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + shadowbios_write |= 1; + mem_set_mem_state_both(0xf0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); } /* C0000-CFFFF */ if (dev->regs[0x15] & 0x01) - mem_set_mem_state_both(0xc0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + mem_set_mem_state_both(0xc0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); else { - for (i = 0; i < 4; i++) { - base = 0xc0000 + (i << 14); - bit = 1 << (i + 2); - if (dev->regs[0x15] & bit) { - if (dev->regs[0x15] & 0x02) - mem_set_mem_state_both(base, 0x04000, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL); - else - mem_set_mem_state_both(base, 0x04000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL); - } else - mem_set_mem_state_both(base, 0x04000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); - } + for (i = 0; i < 4; i++) { + base = 0xc0000 + (i << 14); + bit = 1 << (i + 2); + if (dev->regs[0x15] & bit) { + if (dev->regs[0x15] & 0x02) + mem_set_mem_state_both(base, 0x04000, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL); + else + mem_set_mem_state_both(base, 0x04000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL); + } else + mem_set_mem_state_both(base, 0x04000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); + } } if (dev->green) { - /* D0000-DFFFF */ - if (dev->regs[0x6e] & 0x01) - mem_set_mem_state_both(0xd0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - else { - for (i = 0; i < 4; i++) { - base = 0xd0000 + (i << 14); - bit = 1 << (i + 2); - if (dev->regs[0x6e] & bit) { - if (dev->regs[0x6e] & 0x02) - mem_set_mem_state_both(base, 0x04000, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL); - else - mem_set_mem_state_both(base, 0x04000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } else - mem_set_mem_state_both(base, 0x04000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); - } - } + /* D0000-DFFFF */ + if (dev->regs[0x6e] & 0x01) + mem_set_mem_state_both(0xd0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + else { + for (i = 0; i < 4; i++) { + base = 0xd0000 + (i << 14); + bit = 1 << (i + 2); + if (dev->regs[0x6e] & bit) { + if (dev->regs[0x6e] & 0x02) + mem_set_mem_state_both(base, 0x04000, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL); + else + mem_set_mem_state_both(base, 0x04000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } else + mem_set_mem_state_both(base, 0x04000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); + } + } - /* E0000-EFFFF */ - if (dev->regs[0x6f] & 0x01) - mem_set_mem_state_both(0xe0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - else { - for (i = 0; i < 4; i++) { - base = 0xe0000 + (i << 14); - bit = 1 << (i + 2); - if (dev->regs[0x6f] & bit) { - shadowbios |= 1; - if (dev->regs[0x6f] & 0x02) - mem_set_mem_state_both(base, 0x04000, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL); - else { - shadowbios_write |= 1; - mem_set_mem_state_both(base, 0x04000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } - } else - mem_set_mem_state_both(base, 0x04000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); - } - } + /* E0000-EFFFF */ + if (dev->regs[0x6f] & 0x01) + mem_set_mem_state_both(0xe0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + else { + for (i = 0; i < 4; i++) { + base = 0xe0000 + (i << 14); + bit = 1 << (i + 2); + if (dev->regs[0x6f] & bit) { + shadowbios |= 1; + if (dev->regs[0x6f] & 0x02) + mem_set_mem_state_both(base, 0x04000, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL); + else { + shadowbios_write |= 1; + mem_set_mem_state_both(base, 0x04000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } + } else + mem_set_mem_state_both(base, 0x04000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); + } + } } } - static void contaq_82c59x_smram_recalc(contaq_82c59x_t *dev) { smram_disable(dev->smram[1]); if (dev->regs[0x70] & 0x04) - smram_enable(dev->smram[1], 0x00040000, 0x000a0000, 0x00020000, 1, 1); + smram_enable(dev->smram[1], 0x00040000, 0x000a0000, 0x00020000, 1, 1); } - static void contaq_82c59x_write(uint16_t addr, uint8_t val, void *priv) { - contaq_82c59x_t *dev = (contaq_82c59x_t *)priv; + contaq_82c59x_t *dev = (contaq_82c59x_t *) priv; switch (addr) { - case 0x22: - dev->index = val; - break; + case 0x22: + dev->index = val; + break; - case 0x23: - contaq_82c59x_log("Contaq 82C59x: dev->regs[%02x] = %02x\n", dev->index, val); + case 0x23: + contaq_82c59x_log("Contaq 82C59x: dev->regs[%02x] = %02x\n", dev->index, val); - if ((dev->index >= 0x60) && !dev->green) - return; + if ((dev->index >= 0x60) && !dev->green) + return; - switch (dev->index) { - /* Registers common to 82C596(A) and 82C597. */ - case 0x10: - dev->regs[dev->index] = val; - contaq_82c59x_isa_speed_recalc(dev); - break; + switch (dev->index) { + /* Registers common to 82C596(A) and 82C597. */ + case 0x10: + dev->regs[dev->index] = val; + contaq_82c59x_isa_speed_recalc(dev); + break; - case 0x11: - dev->regs[dev->index] = val; - cpu_cache_int_enabled = !!(val & 0x01); - cpu_update_waitstates(); - break; + case 0x11: + dev->regs[dev->index] = val; + cpu_cache_int_enabled = !!(val & 0x01); + cpu_update_waitstates(); + break; - case 0x12: case 0x13: - dev->regs[dev->index] = val; - break; + case 0x12: + case 0x13: + dev->regs[dev->index] = val; + break; - case 0x14: - dev->regs[dev->index] = val; - reset_on_hlt = !!(val & 0x80); - break; + case 0x14: + dev->regs[dev->index] = val; + reset_on_hlt = !!(val & 0x80); + break; - case 0x15: - dev->regs[dev->index] = val; - contaq_82c59x_shadow_recalc(dev); - break; + case 0x15: + dev->regs[dev->index] = val; + contaq_82c59x_shadow_recalc(dev); + break; - case 0x16 ... 0x1b: - dev->regs[dev->index] = val; - break; + case 0x16 ... 0x1b: + dev->regs[dev->index] = val; + break; - case 0x1c: - /* TODO: What's NPRST (generated if bit 3 is set)? */ - dev->regs[dev->index] = val; - contaq_82c59x_isa_speed_recalc(dev); - break; + case 0x1c: + /* TODO: What's NPRST (generated if bit 3 is set)? */ + dev->regs[dev->index] = val; + contaq_82c59x_isa_speed_recalc(dev); + break; - case 0x1d ... 0x1f: - dev->regs[dev->index] = val; - break; + case 0x1d ... 0x1f: + dev->regs[dev->index] = val; + break; - /* Green (82C597-specific) registers. */ - case 0x60 ... 0x63: - dev->regs[dev->index] = val; - break; + /* Green (82C597-specific) registers. */ + case 0x60 ... 0x63: + dev->regs[dev->index] = val; + break; - case 0x64: - dev->regs[dev->index] = val; - if (val & 0x80) { - if (dev->regs[0x65] & 0x80) - smi_raise(); - dev->smi_status[0] |= 0x10; - } - break; + case 0x64: + dev->regs[dev->index] = val; + if (val & 0x80) { + if (dev->regs[0x65] & 0x80) + smi_raise(); + dev->smi_status[0] |= 0x10; + } + break; - case 0x65 ... 0x69: - dev->regs[dev->index] = val; - break; + case 0x65 ... 0x69: + dev->regs[dev->index] = val; + break; - case 0x6a: - dev->regs[dev->index] = val; - dev->smi_status_set = !!(val & 0x80); - break; + case 0x6a: + dev->regs[dev->index] = val; + dev->smi_status_set = !!(val & 0x80); + break; - case 0x6b ... 0x6d: - dev->regs[dev->index] = val; - break; + case 0x6b ... 0x6d: + dev->regs[dev->index] = val; + break; - case 0x6e: case 0x6f: - dev->regs[dev->index] = val; - contaq_82c59x_shadow_recalc(dev); - break; + case 0x6e: + case 0x6f: + dev->regs[dev->index] = val; + contaq_82c59x_shadow_recalc(dev); + break; - case 0x70: - dev->regs[dev->index] = val; - contaq_82c59x_smram_recalc(dev); - break; + case 0x70: + dev->regs[dev->index] = val; + contaq_82c59x_smram_recalc(dev); + break; - case 0x71 ... 0x79: - dev->regs[dev->index] = val; - break; + case 0x71 ... 0x79: + dev->regs[dev->index] = val; + break; - case 0x7b: case 0x7c: - dev->regs[dev->index] = val; - break; - } - break; + case 0x7b: + case 0x7c: + dev->regs[dev->index] = val; + break; + } + break; } } - static uint8_t contaq_82c59x_read(uint16_t addr, void *priv) { - contaq_82c59x_t *dev = (contaq_82c59x_t *)priv; - uint8_t ret = 0xff; + contaq_82c59x_t *dev = (contaq_82c59x_t *) priv; + uint8_t ret = 0xff; if (addr == 0x23) { - if (dev->index == 0x6a) { - ret = dev->smi_status[dev->smi_status_set]; - /* I assume it's cleared on read. */ - dev->smi_status[dev->smi_status_set] = 0x00; - } else - ret = dev->regs[dev->index]; + if (dev->index == 0x6a) { + ret = dev->smi_status[dev->smi_status_set]; + /* I assume it's cleared on read. */ + dev->smi_status[dev->smi_status_set] = 0x00; + } else + ret = dev->regs[dev->index]; } return ret; } - static void contaq_82c59x_close(void *priv) { - contaq_82c59x_t *dev = (contaq_82c59x_t *)priv; + contaq_82c59x_t *dev = (contaq_82c59x_t *) priv; smram_del(dev->smram[1]); smram_del(dev->smram[0]); @@ -313,11 +306,10 @@ contaq_82c59x_close(void *priv) free(dev); } - static void * contaq_82c59x_init(const device_t *info) { - contaq_82c59x_t *dev = (contaq_82c59x_t *)malloc(sizeof(contaq_82c59x_t)); + contaq_82c59x_t *dev = (contaq_82c59x_t *) malloc(sizeof(contaq_82c59x_t)); memset(dev, 0x00, sizeof(contaq_82c59x_t)); dev->green = info->local; @@ -334,42 +326,42 @@ contaq_82c59x_init(const device_t *info) contaq_82c59x_shadow_recalc(dev); if (dev->green) { - /* SMRAM 0: Fixed A0000-BFFFF to A0000-BFFFF DRAM. */ - dev->smram[0] = smram_add(); - smram_enable(dev->smram[0], 0x000a0000, 0x000a0000, 0x00020000, 0, 1); + /* SMRAM 0: Fixed A0000-BFFFF to A0000-BFFFF DRAM. */ + dev->smram[0] = smram_add(); + smram_enable(dev->smram[0], 0x000a0000, 0x000a0000, 0x00020000, 0, 1); - /* SMRAM 1: Optional. */ - dev->smram[1] = smram_add(); - contaq_82c59x_smram_recalc(dev); + /* SMRAM 1: Optional. */ + dev->smram[1] = smram_add(); + contaq_82c59x_smram_recalc(dev); } return dev; } const device_t contaq_82c596a_device = { - .name = "Contaq 82C596A", + .name = "Contaq 82C596A", .internal_name = "contaq_82c596a", - .flags = 0, - .local = 0, - .init = contaq_82c59x_init, - .close = contaq_82c59x_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = contaq_82c59x_init, + .close = contaq_82c59x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t contaq_82c597_device = { - .name = "Contaq 82C597", + .name = "Contaq 82C597", .internal_name = "contaq_82c597", - .flags = 0, - .local = 1, - .init = contaq_82c59x_init, - .close = contaq_82c59x_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = contaq_82c59x_init, + .close = contaq_82c59x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/cs4031.c b/src/chipset/cs4031.c index d5970b048..6eddc8cad 100644 --- a/src/chipset/cs4031.c +++ b/src/chipset/cs4031.c @@ -46,107 +46,104 @@ cs4031_log(const char *fmt, ...) { va_list ap; - if (cs4031_do_log) - { + if (cs4031_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define cs4031_log(fmt, ...) +# define cs4031_log(fmt, ...) #endif -static void cs4031_shadow_recalc(cs4031_t *dev) +static void +cs4031_shadow_recalc(cs4031_t *dev) { mem_set_mem_state_both(0xa0000, 0x10000, (dev->regs[0x18] & 0x01) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); mem_set_mem_state_both(0xb0000, 0x10000, (dev->regs[0x18] & 0x02) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); - for (uint32_t i = 0; i < 7; i++) - { + for (uint32_t i = 0; i < 7; i++) { if (i < 4) mem_set_mem_state_both(0xc0000 + (i << 14), 0x4000, ((dev->regs[0x19] & (1 << i)) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x1a] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY)); else mem_set_mem_state_both(0xd0000 + ((i - 4) << 16), 0x10000, ((dev->regs[0x19] & (1 << i)) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x1a] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY)); } - shadowbios = !!(dev->regs[0x19] & 0x40); + shadowbios = !!(dev->regs[0x19] & 0x40); shadowbios_write = !!(dev->regs[0x1a] & 0x40); } static void cs4031_write(uint16_t addr, uint8_t val, void *priv) { - cs4031_t *dev = (cs4031_t *)priv; + cs4031_t *dev = (cs4031_t *) priv; - switch (addr) - { - case 0x22: - dev->index = val; - break; - case 0x23: - cs4031_log("CS4031: dev->regs[%02x] = %02x\n", dev->index, val); - switch (dev->index) - { - case 0x05: - dev->regs[dev->index] = val & 0x3f; + switch (addr) { + case 0x22: + dev->index = val; break; + case 0x23: + cs4031_log("CS4031: dev->regs[%02x] = %02x\n", dev->index, val); + switch (dev->index) { + case 0x05: + dev->regs[dev->index] = val & 0x3f; + break; - case 0x06: - dev->regs[dev->index] = val & 0xbc; - break; + case 0x06: + dev->regs[dev->index] = val & 0xbc; + break; - case 0x07: - dev->regs[dev->index] = val & 0x0f; - break; + case 0x07: + dev->regs[dev->index] = val & 0x0f; + break; - case 0x10: - dev->regs[dev->index] = val & 0x3d; - break; + case 0x10: + dev->regs[dev->index] = val & 0x3d; + break; - case 0x11: - dev->regs[dev->index] = val & 0x8d; - break; + case 0x11: + dev->regs[dev->index] = val & 0x8d; + break; - case 0x12: - case 0x13: - dev->regs[dev->index] = val & 0x8d; - break; + case 0x12: + case 0x13: + dev->regs[dev->index] = val & 0x8d; + break; - case 0x14: - case 0x15: - case 0x16: - case 0x17: - dev->regs[dev->index] = val & 0x7f; - break; + case 0x14: + case 0x15: + case 0x16: + case 0x17: + dev->regs[dev->index] = val & 0x7f; + break; - case 0x18: - dev->regs[dev->index] = val & 0xf3; - cs4031_shadow_recalc(dev); - break; + case 0x18: + dev->regs[dev->index] = val & 0xf3; + cs4031_shadow_recalc(dev); + break; - case 0x19: - case 0x1a: - dev->regs[dev->index] = val & 0x7f; - cs4031_shadow_recalc(dev); - break; + case 0x19: + case 0x1a: + dev->regs[dev->index] = val & 0x7f; + cs4031_shadow_recalc(dev); + break; - case 0x1b: - dev->regs[dev->index] = val; - break; + case 0x1b: + dev->regs[dev->index] = val; + break; - case 0x1c: - dev->regs[dev->index] = val & 0xb3; - port_92_set_features(dev->port_92, val & 0x10, val & 0x20); + case 0x1c: + dev->regs[dev->index] = val & 0xb3; + port_92_set_features(dev->port_92, val & 0x10, val & 0x20); + break; + } break; - } - break; } } static uint8_t cs4031_read(uint16_t addr, void *priv) { - cs4031_t *dev = (cs4031_t *)priv; + cs4031_t *dev = (cs4031_t *) priv; return (addr == 0x23) ? dev->regs[dev->index] : 0xff; } @@ -154,7 +151,7 @@ cs4031_read(uint16_t addr, void *priv) static void cs4031_close(void *priv) { - cs4031_t *dev = (cs4031_t *)priv; + cs4031_t *dev = (cs4031_t *) priv; free(dev); } @@ -162,7 +159,7 @@ cs4031_close(void *priv) static void * cs4031_init(const device_t *info) { - cs4031_t *dev = (cs4031_t *)malloc(sizeof(cs4031_t)); + cs4031_t *dev = (cs4031_t *) malloc(sizeof(cs4031_t)); memset(dev, 0, sizeof(cs4031_t)); dev->port_92 = device_add(&port_92_device); @@ -176,15 +173,15 @@ cs4031_init(const device_t *info) } const device_t cs4031_device = { - .name = "Chips & Technogies CS4031", + .name = "Chips & Technogies CS4031", .internal_name = "cs4031", - .flags = 0, - .local = 0, - .init = cs4031_init, - .close = cs4031_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = cs4031_init, + .close = cs4031_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/cs8230.c b/src/chipset/cs8230.c index f6a77cabc..0917a3c88 100644 --- a/src/chipset/cs8230.c +++ b/src/chipset/cs8230.c @@ -29,143 +29,153 @@ #include <86box/fdc.h> #include <86box/chipset.h> - typedef struct { - int idx; - uint8_t regs[256]; + int idx; + uint8_t regs[256]; } cs8230_t; - static void shadow_control(uint32_t addr, uint32_t size, int state) { switch (state) { - case 0x00: - mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - break; - case 0x01: - mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); - break; - case 0x10: - mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTANY); - break; - case 0x11: - mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - break; + case 0x00: + mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + break; + case 0x01: + mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + break; + case 0x10: + mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTANY); + break; + case 0x11: + mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + break; } flushmmucache_nopc(); } - static void rethink_shadow_mappings(cs8230_t *cs8230) { int c; for (c = 0; c < 32; c++) { - /* Addresses 40000-bffff in 16k blocks */ - if (cs8230->regs[0xa + (c >> 3)] & (1 << (c & 7))) - mem_set_mem_state(0x40000 + (c << 14), 0x4000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); /* I/O channel */ - else - mem_set_mem_state(0x40000 + (c << 14), 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); /* System board */ + /* Addresses 40000-bffff in 16k blocks */ + if (cs8230->regs[0xa + (c >> 3)] & (1 << (c & 7))) + mem_set_mem_state(0x40000 + (c << 14), 0x4000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); /* I/O channel */ + else + mem_set_mem_state(0x40000 + (c << 14), 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); /* System board */ } for (c = 0; c < 16; c++) { - /* Addresses c0000-fffff in 16k blocks. System board ROM can be mapped here */ - if (cs8230->regs[0xe + (c >> 3)] & (1 << (c & 7))) - mem_set_mem_state(0xc0000 + (c << 14), 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); /* I/O channel */ - else - shadow_control(0xc0000 + (c << 14), 0x4000, (cs8230->regs[9] >> (3 - (c >> 2))) & 0x11); + /* Addresses c0000-fffff in 16k blocks. System board ROM can be mapped here */ + if (cs8230->regs[0xe + (c >> 3)] & (1 << (c & 7))) + mem_set_mem_state(0xc0000 + (c << 14), 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); /* I/O channel */ + else + shadow_control(0xc0000 + (c << 14), 0x4000, (cs8230->regs[9] >> (3 - (c >> 2))) & 0x11); } } - static uint8_t cs8230_read(uint16_t port, void *p) { cs8230_t *cs8230 = (cs8230_t *) p; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (port & 1) { - switch (cs8230->idx) { - case 0x04: /* 82C301 ID/version */ - ret = cs8230->regs[cs8230->idx] & ~0xe3; - break; + switch (cs8230->idx) { + case 0x04: /* 82C301 ID/version */ + ret = cs8230->regs[cs8230->idx] & ~0xe3; + break; - case 0x08: /* 82C302 ID/Version */ - ret = cs8230->regs[cs8230->idx] & ~0xe0; - break; + case 0x08: /* 82C302 ID/Version */ + ret = cs8230->regs[cs8230->idx] & ~0xe0; + break; - case 0x05: case 0x06: /* 82C301 registers */ - case 0x09: case 0x0a: case 0x0b: case 0x0c: /* 82C302 registers */ - case 0x0d: case 0x0e: case 0x0f: - case 0x10: case 0x11: case 0x12: case 0x13: - case 0x28: case 0x29: case 0x2a: - ret = cs8230->regs[cs8230->idx]; - break; - } + case 0x05: + case 0x06: /* 82C301 registers */ + case 0x09: + case 0x0a: + case 0x0b: + case 0x0c: /* 82C302 registers */ + case 0x0d: + case 0x0e: + case 0x0f: + case 0x10: + case 0x11: + case 0x12: + case 0x13: + case 0x28: + case 0x29: + case 0x2a: + ret = cs8230->regs[cs8230->idx]; + break; + } } return ret; } - static void cs8230_write(uint16_t port, uint8_t val, void *p) { - cs8230_t *cs8230 = (cs8230_t *)p; + cs8230_t *cs8230 = (cs8230_t *) p; if (!(port & 1)) - cs8230->idx = val; + cs8230->idx = val; else { - cs8230->regs[cs8230->idx] = val; - switch (cs8230->idx) { - case 0x09: /* RAM/ROM Configuration in boot area */ - case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: /* Address maps */ - rethink_shadow_mappings(cs8230); - break; - } + cs8230->regs[cs8230->idx] = val; + switch (cs8230->idx) { + case 0x09: /* RAM/ROM Configuration in boot area */ + case 0x0a: + case 0x0b: + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: /* Address maps */ + rethink_shadow_mappings(cs8230); + break; + } } } - static void cs8230_close(void *priv) { - cs8230_t *cs8230 = (cs8230_t *)priv; + cs8230_t *cs8230 = (cs8230_t *) priv; free(cs8230); } - static void -*cs8230_init(const device_t *info) + * + cs8230_init(const device_t *info) { - cs8230_t *cs8230 = (cs8230_t *)malloc(sizeof(cs8230_t)); + cs8230_t *cs8230 = (cs8230_t *) malloc(sizeof(cs8230_t)); memset(cs8230, 0, sizeof(cs8230_t)); io_sethandler(0x0022, 0x0002, cs8230_read, NULL, NULL, cs8230_write, NULL, NULL, cs8230); if (mem_size > 768) { - mem_mapping_set_addr(&ram_mid_mapping, 0xa0000, mem_size > 1024 ? 0x60000 : 0x20000 + (mem_size - 768) * 1024); - mem_mapping_set_exec(&ram_mid_mapping, ram + 0xa0000); + mem_mapping_set_addr(&ram_mid_mapping, 0xa0000, mem_size > 1024 ? 0x60000 : 0x20000 + (mem_size - 768) * 1024); + mem_mapping_set_exec(&ram_mid_mapping, ram + 0xa0000); } return cs8230; } const device_t cs8230_device = { - .name = "C&T CS8230 (386/AT)", + .name = "C&T CS8230 (386/AT)", .internal_name = "cs8230", - .flags = 0, - .local = 0, - .init = cs8230_init, - .close = cs8230_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = cs8230_init, + .close = cs8230_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/et6000.c b/src/chipset/et6000.c index 1d7541c7e..5aaa5bff9 100644 --- a/src/chipset/et6000.c +++ b/src/chipset/et6000.c @@ -45,18 +45,18 @@ et6000_log(const char *fmt, ...) { va_list ap; - if (et6000_do_log) - { + if (et6000_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define et6000_log(fmt, ...) +# define et6000_log(fmt, ...) #endif -static void et6000_shadow_control(int base, int size, int can_read, int can_write) +static void +et6000_shadow_control(int base, int size, int can_read, int can_write) { mem_set_mem_state_both(base, size, (can_read ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | (can_write ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY)); flushmmucache_nopc(); @@ -65,57 +65,55 @@ static void et6000_shadow_control(int base, int size, int can_read, int can_writ static void et6000_write(uint16_t addr, uint8_t val, void *priv) { - et6000_t *dev = (et6000_t *)priv; + et6000_t *dev = (et6000_t *) priv; - switch (addr) - { - case 0x22: - dev->index = val; - break; - case 0x23: - switch (INDEX) - { - case 0: /* System Configuration Register */ - dev->regs[INDEX] = val & 0xdf; - et6000_shadow_control(0xa0000, 0x20000, val & 1, val & 1); - refresh_at_enable = !(val & 0x10); + switch (addr) { + case 0x22: + dev->index = val; break; + case 0x23: + switch (INDEX) { + case 0: /* System Configuration Register */ + dev->regs[INDEX] = val & 0xdf; + et6000_shadow_control(0xa0000, 0x20000, val & 1, val & 1); + refresh_at_enable = !(val & 0x10); + break; - case 1: /* CACHE Configuration and Non-Cacheable Block Size */ - dev->regs[INDEX] = val & 0xf0; - break; + case 1: /* CACHE Configuration and Non-Cacheable Block Size */ + dev->regs[INDEX] = val & 0xf0; + break; - case 2: /* Non-Cacheable Block Address Register */ - dev->regs[INDEX] = val & 0xfe; - break; + case 2: /* Non-Cacheable Block Address Register */ + dev->regs[INDEX] = val & 0xfe; + break; - case 3: /* DRAM Bank and Type Configuration Register */ - dev->regs[INDEX] = val; - break; + case 3: /* DRAM Bank and Type Configuration Register */ + dev->regs[INDEX] = val; + break; - case 4: /* DRAM Configuration Register */ - dev->regs[INDEX] = val; - et6000_shadow_control(0xc0000, 0x10000, (dev->regs[0x15] & 2) && (val & 0x20), (dev->regs[0x15] & 2) && (val & 0x20) && (dev->regs[0x15] & 1)); - et6000_shadow_control(0xd0000, 0x10000, (dev->regs[0x15] & 8) && (val & 0x20), (dev->regs[0x15] & 8) && (val & 0x20) && (dev->regs[0x15] & 4)); - break; + case 4: /* DRAM Configuration Register */ + dev->regs[INDEX] = val; + et6000_shadow_control(0xc0000, 0x10000, (dev->regs[0x15] & 2) && (val & 0x20), (dev->regs[0x15] & 2) && (val & 0x20) && (dev->regs[0x15] & 1)); + et6000_shadow_control(0xd0000, 0x10000, (dev->regs[0x15] & 8) && (val & 0x20), (dev->regs[0x15] & 8) && (val & 0x20) && (dev->regs[0x15] & 4)); + break; - case 5: /* Shadow RAM Configuration Register */ - dev->regs[INDEX] = val; - et6000_shadow_control(0xc0000, 0x10000, (val & 2) && (dev->regs[0x14] & 0x20), (val & 2) && (dev->regs[0x14] & 0x20) && (val & 1)); - et6000_shadow_control(0xd0000, 0x10000, (val & 8) && (dev->regs[0x14] & 0x20), (val & 8) && (dev->regs[0x14] & 0x20) && (val & 4)); - et6000_shadow_control(0xe0000, 0x10000, val & 0x20, (val & 0x20) && (val & 0x10)); - et6000_shadow_control(0xf0000, 0x10000, val & 0x40, !(val & 0x40)); + case 5: /* Shadow RAM Configuration Register */ + dev->regs[INDEX] = val; + et6000_shadow_control(0xc0000, 0x10000, (val & 2) && (dev->regs[0x14] & 0x20), (val & 2) && (dev->regs[0x14] & 0x20) && (val & 1)); + et6000_shadow_control(0xd0000, 0x10000, (val & 8) && (dev->regs[0x14] & 0x20), (val & 8) && (dev->regs[0x14] & 0x20) && (val & 4)); + et6000_shadow_control(0xe0000, 0x10000, val & 0x20, (val & 0x20) && (val & 0x10)); + et6000_shadow_control(0xf0000, 0x10000, val & 0x40, !(val & 0x40)); + break; + } + et6000_log("ET6000: dev->regs[%02x] = %02x\n", dev->index, dev->regs[dev->index]); break; - } - et6000_log("ET6000: dev->regs[%02x] = %02x\n", dev->index, dev->regs[dev->index]); - break; } } static uint8_t et6000_read(uint16_t addr, void *priv) { - et6000_t *dev = (et6000_t *)priv; + et6000_t *dev = (et6000_t *) priv; return ((addr == 0x23) && (INDEX >= 0) && (INDEX <= 5)) ? dev->regs[INDEX] : 0xff; } @@ -123,7 +121,7 @@ et6000_read(uint16_t addr, void *priv) static void et6000_close(void *priv) { - et6000_t *dev = (et6000_t *)priv; + et6000_t *dev = (et6000_t *) priv; free(dev); } @@ -131,7 +129,7 @@ et6000_close(void *priv) static void * et6000_init(const device_t *info) { - et6000_t *dev = (et6000_t *)malloc(sizeof(et6000_t)); + et6000_t *dev = (et6000_t *) malloc(sizeof(et6000_t)); memset(dev, 0, sizeof(et6000_t)); /* Port 92h */ @@ -149,15 +147,15 @@ et6000_init(const device_t *info) } const device_t et6000_device = { - .name = "ETEQ Cheetah ET6000", + .name = "ETEQ Cheetah ET6000", .internal_name = "et6000", - .flags = 0, - .local = 0, - .init = et6000_init, - .close = et6000_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = et6000_init, + .close = et6000_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/gc100.c b/src/chipset/gc100.c index 09df87856..9ff577a1e 100644 --- a/src/chipset/gc100.c +++ b/src/chipset/gc100.c @@ -41,13 +41,11 @@ #include <86box/io.h> #include <86box/video.h> - typedef struct { - uint8_t reg[0x10]; + uint8_t reg[0x10]; } gc100_t; - #ifdef ENABLE_GC100_LOG int gc100_do_log = ENABLE_GC100_LOG; @@ -59,22 +57,21 @@ gc100_log(const char *fmt, ...) if (gc100_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); - va_end(ap); + va_end(ap); } } #else -#define gc100_log(fmt, ...) +# define gc100_log(fmt, ...) #endif - static uint8_t get_fdd_switch_settings(void) { int i, fdd_count = 0; for (i = 0; i < FDD_NUM; i++) { - if (fdd_get_flags(i)) - fdd_count++; + if (fdd_get_flags(i)) + fdd_count++; } if (!fdd_count) @@ -83,71 +80,68 @@ get_fdd_switch_settings(void) return ((fdd_count - 1) << 6) | 0x01; } - static uint8_t get_videomode_switch_settings(void) { if (video_is_mda()) - return 0x30; + return 0x30; else if (video_is_cga()) - return 0x20; /* 0x10 would be 40x25 */ + return 0x20; /* 0x10 would be 40x25 */ else - return 0x00; + return 0x00; } - static void gc100_write(uint16_t port, uint8_t val, void *priv) { - gc100_t *dev = (gc100_t *) priv; + gc100_t *dev = (gc100_t *) priv; uint16_t addr = port & 0xf; dev->reg[addr] = val; switch (addr) { - /* addr 0x2 - * bits 5-7: not used - * bit 4: intenal memory wait states - * bits 2-3: external memory wait states - * bits 0-1: i/o access wait states - */ - case 2: - break; + /* addr 0x2 + * bits 5-7: not used + * bit 4: intenal memory wait states + * bits 2-3: external memory wait states + * bits 0-1: i/o access wait states + */ + case 2: + break; - /* addr 0x3 - * bits 1-7: not used - * bit 0: turbo 0 xt 1 - */ - case 3: - if (val & 1) - cpu_dynamic_switch(0); - else - cpu_dynamic_switch(cpu); - break; + /* addr 0x3 + * bits 1-7: not used + * bit 0: turbo 0 xt 1 + */ + case 3: + if (val & 1) + cpu_dynamic_switch(0); + else + cpu_dynamic_switch(cpu); + break; - /* addr 0x5 - * programmable dip-switches - * bits 6-7: floppy drive number - * bits 4-5: video mode - * bits 2-3: memory size - * bit 1: fpu - * bit 0: not used - */ + /* addr 0x5 + * programmable dip-switches + * bits 6-7: floppy drive number + * bits 4-5: video mode + * bits 2-3: memory size + * bit 1: fpu + * bit 0: not used + */ - /* addr 0x6 */ + /* addr 0x6 */ - /* addr 0x7 */ + /* addr 0x7 */ } gc100_log("GC100: Write %02x at %02x\n", val, port); } - static uint8_t gc100_read(uint16_t port, void *priv) { - gc100_t *dev = (gc100_t *) priv; - uint8_t ret = 0xff; + gc100_t *dev = (gc100_t *) priv; + uint8_t ret = 0xff; uint16_t addr = port & 0xf; ret = dev->reg[addr]; @@ -155,47 +149,46 @@ gc100_read(uint16_t port, void *priv) gc100_log("GC100: Read %02x at %02x\n", ret, port); switch (addr) { - /* addr 0x2 - * bits 5-7: not used - * bit 4: intenal memory wait states - * bits 2-3: external memory wait states - * bits 0-1: i/o access wait states - */ - case 0x2: - break; + /* addr 0x2 + * bits 5-7: not used + * bit 4: intenal memory wait states + * bits 2-3: external memory wait states + * bits 0-1: i/o access wait states + */ + case 0x2: + break; - /* addr 0x3 - * bits 1-7: not used - * bit 0: turbo 0 xt 1 - */ - case 0x3: - break; + /* addr 0x3 + * bits 1-7: not used + * bit 0: turbo 0 xt 1 + */ + case 0x3: + break; - /* addr 0x5 - * programmable dip-switches - * bits 6-7: floppy drive number - * bits 4-5: video mode - * bits 2-3: memory size - * bit 1: fpu - * bit 0: not used - */ - case 0x5: - ret = ret & 0x0c; - ret |= get_fdd_switch_settings(); - ret |= get_videomode_switch_settings(); - if (hasfpu) - ret |= 0x02; - break; + /* addr 0x5 + * programmable dip-switches + * bits 6-7: floppy drive number + * bits 4-5: video mode + * bits 2-3: memory size + * bit 1: fpu + * bit 0: not used + */ + case 0x5: + ret = ret & 0x0c; + ret |= get_fdd_switch_settings(); + ret |= get_videomode_switch_settings(); + if (hasfpu) + ret |= 0x02; + break; - /* addr 0x6 */ + /* addr 0x6 */ - /* addr 0x7 */ + /* addr 0x7 */ } return ret; } - static void gc100_close(void *priv) { @@ -204,7 +197,6 @@ gc100_close(void *priv) free(dev); } - static void * gc100_init(const device_t *info) { @@ -218,11 +210,11 @@ gc100_init(const device_t *info) dev->reg[0x7] = 0x0; if (info->local) { - /* GC100A */ + /* GC100A */ io_sethandler(0x0c2, 0x02, gc100_read, NULL, NULL, gc100_write, NULL, NULL, dev); io_sethandler(0x0c5, 0x03, gc100_read, NULL, NULL, gc100_write, NULL, NULL, dev); } else { - /* GC100 */ + /* GC100 */ io_sethandler(0x022, 0x02, gc100_read, NULL, NULL, gc100_write, NULL, NULL, dev); io_sethandler(0x025, 0x01, gc100_read, NULL, NULL, gc100_write, NULL, NULL, dev); } @@ -231,29 +223,29 @@ gc100_init(const device_t *info) } const device_t gc100_device = { - .name = "G2 GC100", + .name = "G2 GC100", .internal_name = "gc100", - .flags = 0, - .local = 0, - .init = gc100_init, - .close = gc100_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = gc100_init, + .close = gc100_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t gc100a_device = { - .name = "G2 GC100A", + .name = "G2 GC100A", .internal_name = "gc100a", - .flags = 0, - .local = 1, - .init = gc100_init, - .close = gc100_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = gc100_init, + .close = gc100_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/headland.c b/src/chipset/headland.c index 91f1658d8..9aa6b3fac 100644 --- a/src/chipset/headland.c +++ b/src/chipset/headland.c @@ -37,59 +37,54 @@ #include <86box/port_92.h> #include <86box/chipset.h> - enum { - HEADLAND_GC103 = 0x00, - HEADLAND_GC113 = 0x10, - HEADLAND_HT18_A = 0x11, - HEADLAND_HT18_B = 0x12, - HEADLAND_HT18_C = 0x18, + HEADLAND_GC103 = 0x00, + HEADLAND_GC113 = 0x10, + HEADLAND_HT18_A = 0x11, + HEADLAND_HT18_B = 0x12, + HEADLAND_HT18_C = 0x18, HEADLAND_HT21_C_D = 0x31, - HEADLAND_HT21_E = 0x32, + HEADLAND_HT21_E = 0x32, }; +#define HEADLAND_REV_MASK 0x0F -#define HEADLAND_REV_MASK 0x0F - -#define HEADLAND_HAS_CRI 0x10 +#define HEADLAND_HAS_CRI 0x10 #define HEADLAND_HAS_SLEEP 0x20 - typedef struct { - uint8_t valid, enabled; - uint16_t mr; - uint32_t virt_base; + uint8_t valid, enabled; + uint16_t mr; + uint32_t virt_base; - struct headland_t * headland; + struct headland_t *headland; } headland_mr_t; - typedef struct headland_t { - uint8_t revision; - uint8_t has_cri, has_sleep; + uint8_t revision; + uint8_t has_cri, has_sleep; - uint8_t cri; - uint8_t cr[7]; + uint8_t cri; + uint8_t cr[7]; - uint8_t indx; - uint8_t regs[256]; + uint8_t indx; + uint8_t regs[256]; - uint8_t ems_mar; + uint8_t ems_mar; - headland_mr_t null_mr, - ems_mr[64]; + headland_mr_t null_mr, + ems_mr[64]; - mem_mapping_t low_mapping; - mem_mapping_t ems_mapping[64]; - mem_mapping_t mid_mapping; - mem_mapping_t high_mapping; - mem_mapping_t shadow_mapping[2]; - mem_mapping_t upper_mapping[24]; + mem_mapping_t low_mapping; + mem_mapping_t ems_mapping[64]; + mem_mapping_t mid_mapping; + mem_mapping_t high_mapping; + mem_mapping_t shadow_mapping[2]; + mem_mapping_t upper_mapping[24]; } headland_t; - /* TODO - Headland chipset's memory address mapping emulation isn't fully implemented yet, - so memory configuration is hardcoded now. */ + so memory configuration is hardcoded now. */ static const int mem_conf_cr0[41] = { 0x00, 0x00, 0x20, 0x40, 0x60, 0xA0, 0x40, 0xE0, 0xA0, 0xC0, 0xE0, 0xE0, 0xC0, 0xE0, 0xE0, 0xE0, @@ -107,23 +102,22 @@ static const int mem_conf_cr1[41] = { 0x40 }; - static uint32_t get_addr(headland_t *dev, uint32_t addr, headland_mr_t *mr) { uint32_t bank_base[4], bank_shift[4], shift, other_shift, bank; if ((addr >= 0x0e0000) && (addr <= 0x0fffff)) - return addr; + return addr; else if ((addr >= 0xfe0000) && (addr <= 0xffffff)) - return addr & 0x0fffff; + return addr & 0x0fffff; if (dev->revision == 8) { - shift = (dev->cr[0] & 0x80) ? 21 : ((dev->cr[6] & 0x01) ? 23 : 19); - other_shift = (dev->cr[0] & 0x80) ? ((dev->cr[6] & 0x01) ? 19 : 23) : 21; + shift = (dev->cr[0] & 0x80) ? 21 : ((dev->cr[6] & 0x01) ? 23 : 19); + other_shift = (dev->cr[0] & 0x80) ? ((dev->cr[6] & 0x01) ? 19 : 23) : 21; } else { - shift = (dev->cr[0] & 0x80) ? 21 : 19; - other_shift = (dev->cr[0] & 0x80) ? 21 : 19; + shift = (dev->cr[0] & 0x80) ? 21 : 19; + other_shift = (dev->cr[0] & 0x80) ? 21 : 19; } /* Bank size = 1 << (bank shift + 2) . */ @@ -134,296 +128,288 @@ get_addr(headland_t *dev, uint32_t addr, headland_mr_t *mr) bank_base[2] = bank_base[1] + (1 << shift); if ((dev->revision > 0) && (dev->revision < 8) && (dev->cr[1] & 0x40)) { - bank_shift[2] = bank_shift[3] = other_shift; - bank_base[3] = bank_base[2] + (1 << other_shift); - /* First address after the memory is bank_base[3] + (1 << other_shift) */ + bank_shift[2] = bank_shift[3] = other_shift; + bank_base[3] = bank_base[2] + (1 << other_shift); + /* First address after the memory is bank_base[3] + (1 << other_shift) */ } else { - bank_shift[2] = bank_shift[3] = shift; - bank_base[3] = bank_base[2] + (1 << shift); - /* First address after the memory is bank_base[3] + (1 << shift) */ + bank_shift[2] = bank_shift[3] = shift; + bank_base[3] = bank_base[2] + (1 << shift); + /* First address after the memory is bank_base[3] + (1 << shift) */ } if (mr && mr->valid && (dev->cr[0] & 2) && (mr->mr & 0x200)) { - addr = (addr & 0x3fff) | ((mr->mr & 0x1F) << 14); + addr = (addr & 0x3fff) | ((mr->mr & 0x1F) << 14); - bank = (mr->mr >> 7) & 3; + bank = (mr->mr >> 7) & 3; - if (bank_shift[bank] >= 21) - addr |= (mr->mr & 0x060) << 14; + if (bank_shift[bank] >= 21) + addr |= (mr->mr & 0x060) << 14; - if ((dev->revision == 8) && (bank_shift[bank] == 23)) - addr |= (mr->mr & 0xc00) << 11; + if ((dev->revision == 8) && (bank_shift[bank] == 23)) + addr |= (mr->mr & 0xc00) << 11; - addr |= bank_base[(mr->mr >> 7) & 3]; + addr |= bank_base[(mr->mr >> 7) & 3]; } else if (((mr == NULL) || !mr->valid) && (mem_size >= 1024) && (addr >= 0x100000) && ((dev->cr[0] & 4) == 0)) - addr -= 0x60000; + addr -= 0x60000; return addr; } - static void hl_ems_disable(headland_t *dev, uint8_t mar, uint32_t base_addr, uint8_t indx) { - if (base_addr < ((uint32_t)mem_size << 10)) - mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], ram + base_addr); + if (base_addr < ((uint32_t) mem_size << 10)) + mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], ram + base_addr); else - mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], NULL); + mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], NULL); mem_mapping_disable(&dev->ems_mapping[mar & 0x3f]); if (indx < 24) { - mem_set_mem_state(base_addr, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - mem_mapping_enable(&dev->upper_mapping[indx]); + mem_set_mem_state(base_addr, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + mem_mapping_enable(&dev->upper_mapping[indx]); } else - mem_set_mem_state(base_addr, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + mem_set_mem_state(base_addr, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); } - static void hl_ems_update(headland_t *dev, uint8_t mar) { uint32_t base_addr, virt_addr; - uint8_t indx = mar & 0x1f; + uint8_t indx = mar & 0x1f; base_addr = (indx + 16) << 14; if (indx >= 24) - base_addr += 0x20000; + base_addr += 0x20000; hl_ems_disable(dev, mar, base_addr, indx); - dev->ems_mr[mar & 0x3f].enabled = 0; + dev->ems_mr[mar & 0x3f].enabled = 0; dev->ems_mr[mar & 0x3f].virt_base = base_addr; if ((dev->cr[0] & 2) && ((dev->cr[0] & 1) == ((mar & 0x20) >> 5)) && (dev->ems_mr[mar & 0x3f].mr & 0x200)) { - mem_set_mem_state(base_addr, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - virt_addr = get_addr(dev, base_addr, &dev->ems_mr[mar & 0x3f]); - dev->ems_mr[mar & 0x3f].enabled = 1; - dev->ems_mr[mar & 0x3f].virt_base = virt_addr; - if (indx < 24) - mem_mapping_disable(&dev->upper_mapping[indx]); - if (virt_addr < ((uint32_t)mem_size << 10)) - mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], ram + virt_addr); - else - mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], NULL); - mem_mapping_enable(&dev->ems_mapping[mar & 0x3f]); + mem_set_mem_state(base_addr, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + virt_addr = get_addr(dev, base_addr, &dev->ems_mr[mar & 0x3f]); + dev->ems_mr[mar & 0x3f].enabled = 1; + dev->ems_mr[mar & 0x3f].virt_base = virt_addr; + if (indx < 24) + mem_mapping_disable(&dev->upper_mapping[indx]); + if (virt_addr < ((uint32_t) mem_size << 10)) + mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], ram + virt_addr); + else + mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], NULL); + mem_mapping_enable(&dev->ems_mapping[mar & 0x3f]); } flushmmucache(); } - static void set_global_EMS_state(headland_t *dev, int state) { int i; for (i = 0; i < 32; i++) { - hl_ems_update(dev, i | (((dev->cr[0] & 0x01) << 5) ^ 0x20)); - hl_ems_update(dev, i | ((dev->cr[0] & 0x01) << 5)); - } + hl_ems_update(dev, i | (((dev->cr[0] & 0x01) << 5) ^ 0x20)); + hl_ems_update(dev, i | ((dev->cr[0] & 0x01) << 5)); + } } - static void memmap_state_default(headland_t *dev, uint8_t ht_romcs) { mem_mapping_disable(&dev->mid_mapping); if (ht_romcs) - mem_set_mem_state(0x0e0000, 0x20000, MEM_READ_ROMCS | MEM_WRITE_ROMCS); + mem_set_mem_state(0x0e0000, 0x20000, MEM_READ_ROMCS | MEM_WRITE_ROMCS); else - mem_set_mem_state(0x0e0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); + mem_set_mem_state(0x0e0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); mem_set_mem_state(0xfe0000, 0x20000, MEM_READ_ROMCS | MEM_WRITE_ROMCS); mem_mapping_disable(&dev->shadow_mapping[0]); mem_mapping_disable(&dev->shadow_mapping[1]); } - static void memmap_state_update(headland_t *dev) { uint32_t addr; - int i; - uint8_t ht_cr0 = dev->cr[0]; - uint8_t ht_romcs = !(dev->cr[4] & 0x01); + int i; + uint8_t ht_cr0 = dev->cr[0]; + uint8_t ht_romcs = !(dev->cr[4] & 0x01); if (dev->revision <= 1) - ht_romcs = 1; + ht_romcs = 1; if (!(dev->cr[0] & 0x04)) - ht_cr0 &= ~0x18; + ht_cr0 &= ~0x18; for (i = 0; i < 24; i++) { - addr = get_addr(dev, 0x40000 + (i << 14), NULL); - mem_mapping_set_exec(&dev->upper_mapping[i], addr < ((uint32_t)mem_size << 10) ? ram + addr : NULL); + addr = get_addr(dev, 0x40000 + (i << 14), NULL); + mem_mapping_set_exec(&dev->upper_mapping[i], addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL); } memmap_state_default(dev, ht_romcs); if (mem_size > 640) { - if (ht_cr0 & 0x04) { - mem_mapping_set_addr(&dev->mid_mapping, 0xA0000, 0x40000); - mem_mapping_set_exec(&dev->mid_mapping, ram + 0xA0000); - mem_mapping_disable(&dev->mid_mapping); - if (mem_size > 1024) { - mem_set_mem_state((mem_size << 10), 0x60000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - mem_mapping_set_addr(&dev->high_mapping, 0x100000, (mem_size - 1024) << 10); - mem_mapping_set_exec(&dev->high_mapping, ram + 0x100000); - } - } else { - /* 1 MB - 1 MB + 384k: RAM pointing to A0000-FFFFF - 1 MB + 384k: Any ram pointing 1 MB onwards. */ - /* First, do the addresses above 1 MB. */ - mem_mapping_set_addr(&dev->mid_mapping, 0x100000, mem_size > 1024 ? 0x60000 : (mem_size - 640) << 10); - mem_mapping_set_exec(&dev->mid_mapping, ram + 0xA0000); - if (mem_size > 1024) { - /* We have ram above 1 MB, we need to relocate that. */ - mem_set_mem_state((mem_size << 10), 0x60000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - mem_mapping_set_addr(&dev->high_mapping, 0x160000, (mem_size - 1024) << 10); - mem_mapping_set_exec(&dev->high_mapping, ram + 0x100000); - } - } + if (ht_cr0 & 0x04) { + mem_mapping_set_addr(&dev->mid_mapping, 0xA0000, 0x40000); + mem_mapping_set_exec(&dev->mid_mapping, ram + 0xA0000); + mem_mapping_disable(&dev->mid_mapping); + if (mem_size > 1024) { + mem_set_mem_state((mem_size << 10), 0x60000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + mem_mapping_set_addr(&dev->high_mapping, 0x100000, (mem_size - 1024) << 10); + mem_mapping_set_exec(&dev->high_mapping, ram + 0x100000); + } + } else { + /* 1 MB - 1 MB + 384k: RAM pointing to A0000-FFFFF + 1 MB + 384k: Any ram pointing 1 MB onwards. */ + /* First, do the addresses above 1 MB. */ + mem_mapping_set_addr(&dev->mid_mapping, 0x100000, mem_size > 1024 ? 0x60000 : (mem_size - 640) << 10); + mem_mapping_set_exec(&dev->mid_mapping, ram + 0xA0000); + if (mem_size > 1024) { + /* We have ram above 1 MB, we need to relocate that. */ + mem_set_mem_state((mem_size << 10), 0x60000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + mem_mapping_set_addr(&dev->high_mapping, 0x160000, (mem_size - 1024) << 10); + mem_mapping_set_exec(&dev->high_mapping, ram + 0x100000); + } + } } switch (ht_cr0) { - case 0x18: - if ((mem_size << 10) > 0xe0000) { - mem_set_mem_state(0x0e0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); - mem_set_mem_state(0xfe0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); + case 0x18: + if ((mem_size << 10) > 0xe0000) { + mem_set_mem_state(0x0e0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); + mem_set_mem_state(0xfe0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); - mem_mapping_set_addr(&dev->shadow_mapping[0], 0x0e0000, 0x20000); - mem_mapping_set_exec(&dev->shadow_mapping[0], ram + 0xe0000); - mem_mapping_set_addr(&dev->shadow_mapping[1], 0xfe0000, 0x20000); - mem_mapping_set_exec(&dev->shadow_mapping[1], ram + 0xe0000); - } else { - mem_mapping_disable(&dev->shadow_mapping[0]); - mem_mapping_disable(&dev->shadow_mapping[1]); - } - break; - case 0x10: - if ((mem_size << 10) > 0xf0000) { - mem_set_mem_state(0x0f0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); - mem_set_mem_state(0xff0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); + mem_mapping_set_addr(&dev->shadow_mapping[0], 0x0e0000, 0x20000); + mem_mapping_set_exec(&dev->shadow_mapping[0], ram + 0xe0000); + mem_mapping_set_addr(&dev->shadow_mapping[1], 0xfe0000, 0x20000); + mem_mapping_set_exec(&dev->shadow_mapping[1], ram + 0xe0000); + } else { + mem_mapping_disable(&dev->shadow_mapping[0]); + mem_mapping_disable(&dev->shadow_mapping[1]); + } + break; + case 0x10: + if ((mem_size << 10) > 0xf0000) { + mem_set_mem_state(0x0f0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); + mem_set_mem_state(0xff0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); - mem_mapping_set_addr(&dev->shadow_mapping[0], 0x0f0000, 0x10000); - mem_mapping_set_exec(&dev->shadow_mapping[0], ram + 0xf0000); - mem_mapping_set_addr(&dev->shadow_mapping[1], 0xff0000, 0x10000); - mem_mapping_set_exec(&dev->shadow_mapping[1], ram + 0xf0000); - } else { - mem_mapping_disable(&dev->shadow_mapping[0]); - mem_mapping_disable(&dev->shadow_mapping[1]); - } - break; - case 0x08: - if ((mem_size << 10) > 0xe0000) { - mem_set_mem_state(0x0e0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); - mem_set_mem_state(0xfe0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); + mem_mapping_set_addr(&dev->shadow_mapping[0], 0x0f0000, 0x10000); + mem_mapping_set_exec(&dev->shadow_mapping[0], ram + 0xf0000); + mem_mapping_set_addr(&dev->shadow_mapping[1], 0xff0000, 0x10000); + mem_mapping_set_exec(&dev->shadow_mapping[1], ram + 0xf0000); + } else { + mem_mapping_disable(&dev->shadow_mapping[0]); + mem_mapping_disable(&dev->shadow_mapping[1]); + } + break; + case 0x08: + if ((mem_size << 10) > 0xe0000) { + mem_set_mem_state(0x0e0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); + mem_set_mem_state(0xfe0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); - mem_mapping_set_addr(&dev->shadow_mapping[0], 0x0e0000, 0x10000); - mem_mapping_set_exec(&dev->shadow_mapping[0], ram + 0xe0000); - mem_mapping_set_addr(&dev->shadow_mapping[1], 0xfe0000, 0x10000); - mem_mapping_set_exec(&dev->shadow_mapping[1], ram + 0xe0000); - } else { - mem_mapping_disable(&dev->shadow_mapping[0]); - mem_mapping_disable(&dev->shadow_mapping[1]); - } - break; - case 0x00: - default: - mem_mapping_disable(&dev->shadow_mapping[0]); - mem_mapping_disable(&dev->shadow_mapping[1]); - break; + mem_mapping_set_addr(&dev->shadow_mapping[0], 0x0e0000, 0x10000); + mem_mapping_set_exec(&dev->shadow_mapping[0], ram + 0xe0000); + mem_mapping_set_addr(&dev->shadow_mapping[1], 0xfe0000, 0x10000); + mem_mapping_set_exec(&dev->shadow_mapping[1], ram + 0xe0000); + } else { + mem_mapping_disable(&dev->shadow_mapping[0]); + mem_mapping_disable(&dev->shadow_mapping[1]); + } + break; + case 0x00: + default: + mem_mapping_disable(&dev->shadow_mapping[0]); + mem_mapping_disable(&dev->shadow_mapping[1]); + break; } set_global_EMS_state(dev, ht_cr0 & 3); } - static void hl_write(uint16_t addr, uint8_t val, void *priv) { - headland_t *dev = (headland_t *)priv; + headland_t *dev = (headland_t *) priv; - switch(addr) { - case 0x01ec: - dev->ems_mr[dev->ems_mar & 0x3f].mr = val | 0xff00; - hl_ems_update(dev, dev->ems_mar & 0x3f); - if (dev->ems_mar & 0x80) - dev->ems_mar++; - break; + switch (addr) { + case 0x01ec: + dev->ems_mr[dev->ems_mar & 0x3f].mr = val | 0xff00; + hl_ems_update(dev, dev->ems_mar & 0x3f); + if (dev->ems_mar & 0x80) + dev->ems_mar++; + break; - case 0x01ed: - if (dev->has_cri) - dev->cri = val; - break; + case 0x01ed: + if (dev->has_cri) + dev->cri = val; + break; - case 0x01ee: - dev->ems_mar = val; - break; + case 0x01ee: + dev->ems_mar = val; + break; - case 0x01ef: - switch(dev->cri & 0x07) { - case 0: - dev->cr[0] = (val & 0x1f) | mem_conf_cr0[(mem_size > 640 ? mem_size : mem_size - 128) >> 9]; - memmap_state_update(dev); - break; + case 0x01ef: + switch (dev->cri & 0x07) { + case 0: + dev->cr[0] = (val & 0x1f) | mem_conf_cr0[(mem_size > 640 ? mem_size : mem_size - 128) >> 9]; + memmap_state_update(dev); + break; - case 1: - dev->cr[1] = (val & 0xbf) | mem_conf_cr1[(mem_size > 640 ? mem_size : mem_size - 128) >> 9]; - memmap_state_update(dev); - break; + case 1: + dev->cr[1] = (val & 0xbf) | mem_conf_cr1[(mem_size > 640 ? mem_size : mem_size - 128) >> 9]; + memmap_state_update(dev); + break; - case 2: - case 3: - dev->cr[dev->cri] = val; - memmap_state_update(dev); - break; + case 2: + case 3: + dev->cr[dev->cri] = val; + memmap_state_update(dev); + break; - case 5: - if (dev->has_sleep) - dev->cr[dev->cri] = val; - else - dev->cr[dev->cri] = val & 0x0f; - memmap_state_update(dev); - break; + case 5: + if (dev->has_sleep) + dev->cr[dev->cri] = val; + else + dev->cr[dev->cri] = val & 0x0f; + memmap_state_update(dev); + break; - case 4: - dev->cr[4] = (dev->cr[4] & 0xf0) | (val & 0x0f); - memmap_state_update(dev); - break; + case 4: + dev->cr[4] = (dev->cr[4] & 0xf0) | (val & 0x0f); + memmap_state_update(dev); + break; - case 6: - if (dev->revision == 8) { - dev->cr[dev->cri] = (val & 0xfe) | (mem_size > 8192 ? 1 : 0); - memmap_state_update(dev); - } - break; + case 6: + if (dev->revision == 8) { + dev->cr[dev->cri] = (val & 0xfe) | (mem_size > 8192 ? 1 : 0); + memmap_state_update(dev); + } + break; - default: - break; - } - break; + default: + break; + } + break; - default: - break; + default: + break; } } - static void hl_writew(uint16_t addr, uint16_t val, void *priv) { - headland_t *dev = (headland_t *)priv; + headland_t *dev = (headland_t *) priv; - switch(addr) { - case 0x01ec: - dev->ems_mr[dev->ems_mar & 0x3f].mr = val; - hl_ems_update(dev, dev->ems_mar & 0x3f); - if (dev->ems_mar & 0x80) - dev->ems_mar++; - break; + switch (addr) { + case 0x01ec: + dev->ems_mr[dev->ems_mar & 0x3f].mr = val; + hl_ems_update(dev, dev->ems_mar & 0x3f); + if (dev->ems_mar & 0x80) + dev->ems_mar++; + break; - default: - break; + default: + break; } } - static void hl_writel(uint16_t addr, uint32_t val, void *priv) { @@ -431,81 +417,78 @@ hl_writel(uint16_t addr, uint32_t val, void *priv) hl_writew(addr + 2, val >> 16, priv); } - static uint8_t hl_read(uint16_t addr, void *priv) { - headland_t *dev = (headland_t *)priv; - uint8_t ret = 0xff; + headland_t *dev = (headland_t *) priv; + uint8_t ret = 0xff; - switch(addr) { - case 0x01ec: - ret = (uint8_t)dev->ems_mr[dev->ems_mar & 0x3f].mr; - if (dev->ems_mar & 0x80) - dev->ems_mar++; - break; + switch (addr) { + case 0x01ec: + ret = (uint8_t) dev->ems_mr[dev->ems_mar & 0x3f].mr; + if (dev->ems_mar & 0x80) + dev->ems_mar++; + break; - case 0x01ed: - if (dev->has_cri) - ret = dev->cri; - break; + case 0x01ed: + if (dev->has_cri) + ret = dev->cri; + break; - case 0x01ee: - ret = dev->ems_mar; - break; + case 0x01ee: + ret = dev->ems_mar; + break; - case 0x01ef: - switch(dev->cri & 0x07) { - case 0: - ret = (dev->cr[0] & 0x1f) | mem_conf_cr0[(mem_size > 640 ? mem_size : mem_size - 128) >> 9]; - break; + case 0x01ef: + switch (dev->cri & 0x07) { + case 0: + ret = (dev->cr[0] & 0x1f) | mem_conf_cr0[(mem_size > 640 ? mem_size : mem_size - 128) >> 9]; + break; - case 1: - ret = (dev->cr[1] & 0xbf) | mem_conf_cr1[(mem_size > 640 ? mem_size : mem_size - 128) >> 9]; - break; + case 1: + ret = (dev->cr[1] & 0xbf) | mem_conf_cr1[(mem_size > 640 ? mem_size : mem_size - 128) >> 9]; + break; - case 6: - if (dev->revision == 8) - ret = (dev->cr[6] & 0xfe) | (mem_size > 8192 ? 1 : 0); - else - ret = 0; - break; + case 6: + if (dev->revision == 8) + ret = (dev->cr[6] & 0xfe) | (mem_size > 8192 ? 1 : 0); + else + ret = 0; + break; - default: - ret = dev->cr[dev->cri]; - break; - } - break; + default: + ret = dev->cr[dev->cri]; + break; + } + break; - default: - break; + default: + break; } return ret; } - static uint16_t hl_readw(uint16_t addr, void *priv) { - headland_t *dev = (headland_t *)priv; - uint16_t ret = 0xffff; + headland_t *dev = (headland_t *) priv; + uint16_t ret = 0xffff; - switch(addr) { - case 0x01ec: - ret = dev->ems_mr[dev->ems_mar & 0x3f].mr | ((dev->cr[4] & 0x80) ? 0xf000 : 0xfc00); - if (dev->ems_mar & 0x80) - dev->ems_mar++; - break; + switch (addr) { + case 0x01ec: + ret = dev->ems_mr[dev->ems_mar & 0x3f].mr | ((dev->cr[4] & 0x80) ? 0xf000 : 0xfc00); + if (dev->ems_mar & 0x80) + dev->ems_mar++; + break; - default: - break; + default: + break; } return ret; } - static uint32_t hl_readl(uint16_t addr, void *priv) { @@ -517,131 +500,123 @@ hl_readl(uint16_t addr, void *priv) return ret; } - static uint8_t mem_read_b(uint32_t addr, void *priv) { - headland_mr_t *mr = (headland_mr_t *) priv; - headland_t *dev = mr->headland; - uint8_t ret = 0xff; + headland_mr_t *mr = (headland_mr_t *) priv; + headland_t *dev = mr->headland; + uint8_t ret = 0xff; addr = get_addr(dev, addr, mr); - if (addr < ((uint32_t)mem_size << 10)) - ret = ram[addr]; + if (addr < ((uint32_t) mem_size << 10)) + ret = ram[addr]; return ret; } - static uint16_t mem_read_w(uint32_t addr, void *priv) { - headland_mr_t *mr = (headland_mr_t *) priv; - headland_t *dev = mr->headland; - uint16_t ret = 0xffff; + headland_mr_t *mr = (headland_mr_t *) priv; + headland_t *dev = mr->headland; + uint16_t ret = 0xffff; addr = get_addr(dev, addr, mr); - if (addr < ((uint32_t)mem_size << 10)) - ret = *(uint16_t *)&ram[addr]; + if (addr < ((uint32_t) mem_size << 10)) + ret = *(uint16_t *) &ram[addr]; return ret; } - static uint32_t mem_read_l(uint32_t addr, void *priv) { - headland_mr_t *mr = (headland_mr_t *) priv; - headland_t *dev = mr->headland; - uint32_t ret = 0xffffffff; + headland_mr_t *mr = (headland_mr_t *) priv; + headland_t *dev = mr->headland; + uint32_t ret = 0xffffffff; addr = get_addr(dev, addr, mr); - if (addr < ((uint32_t)mem_size << 10)) - ret = *(uint32_t *)&ram[addr]; + if (addr < ((uint32_t) mem_size << 10)) + ret = *(uint32_t *) &ram[addr]; return ret; } - static void mem_write_b(uint32_t addr, uint8_t val, void *priv) { - headland_mr_t *mr = (headland_mr_t *) priv; - headland_t *dev = mr->headland; + headland_mr_t *mr = (headland_mr_t *) priv; + headland_t *dev = mr->headland; addr = get_addr(dev, addr, mr); - if (addr < ((uint32_t)mem_size << 10)) - ram[addr] = val; + if (addr < ((uint32_t) mem_size << 10)) + ram[addr] = val; } - static void mem_write_w(uint32_t addr, uint16_t val, void *priv) { - headland_mr_t *mr = (headland_mr_t *) priv; - headland_t *dev = mr->headland; + headland_mr_t *mr = (headland_mr_t *) priv; + headland_t *dev = mr->headland; addr = get_addr(dev, addr, mr); - if (addr < ((uint32_t)mem_size << 10)) - *(uint16_t *)&ram[addr] = val; + if (addr < ((uint32_t) mem_size << 10)) + *(uint16_t *) &ram[addr] = val; } - static void mem_write_l(uint32_t addr, uint32_t val, void *priv) { - headland_mr_t *mr = (headland_mr_t *) priv; - headland_t *dev = mr->headland; + headland_mr_t *mr = (headland_mr_t *) priv; + headland_t *dev = mr->headland; addr = get_addr(dev, addr, mr); - if (addr < ((uint32_t)mem_size << 10)) - *(uint32_t *)&ram[addr] = val; + if (addr < ((uint32_t) mem_size << 10)) + *(uint32_t *) &ram[addr] = val; } - static void headland_close(void *priv) { - headland_t *dev = (headland_t *)priv; + headland_t *dev = (headland_t *) priv; free(dev); } - static void * headland_init(const device_t *info) { headland_t *dev; - int ht386 = 0; - uint32_t i; + int ht386 = 0; + uint32_t i; dev = (headland_t *) malloc(sizeof(headland_t)); memset(dev, 0x00, sizeof(headland_t)); - dev->has_cri = (info->local & HEADLAND_HAS_CRI); + dev->has_cri = (info->local & HEADLAND_HAS_CRI); dev->has_sleep = (info->local & HEADLAND_HAS_SLEEP); - dev->revision = info->local & HEADLAND_REV_MASK; + dev->revision = info->local & HEADLAND_REV_MASK; if (dev->revision > 0) - ht386 = 1; + ht386 = 1; dev->cr[0] = 0x04; dev->cr[4] = dev->revision << 4; - if (ht386) - device_add(&port_92_inv_device); + if (ht386) + device_add(&port_92_inv_device); io_sethandler(0x01ec, 4, - hl_read,hl_readw,hl_readl, hl_write,hl_writew,hl_writel, dev); + hl_read, hl_readw, hl_readl, hl_write, hl_writew, hl_writel, dev); - dev->null_mr.valid = 0; - dev->null_mr.mr = 0xff; + dev->null_mr.valid = 0; + dev->null_mr.mr = 0xff; dev->null_mr.headland = dev; for (i = 0; i < 64; i++) { - dev->ems_mr[i].valid = 1; - dev->ems_mr[i].mr = 0x00; - dev->ems_mr[i].headland = dev; + dev->ems_mr[i].valid = 1; + dev->ems_mr[i].mr = 0x00; + dev->ems_mr[i].headland = dev; } /* Turn off mem.c mappings. */ @@ -650,163 +625,162 @@ headland_init(const device_t *info) mem_mapping_disable(&ram_high_mapping); mem_mapping_add(&dev->low_mapping, 0, 0x40000, - mem_read_b, mem_read_w, mem_read_l, - mem_write_b, mem_write_w, mem_write_l, - ram, MEM_MAPPING_INTERNAL, &dev->null_mr); + mem_read_b, mem_read_w, mem_read_l, + mem_write_b, mem_write_w, mem_write_l, + ram, MEM_MAPPING_INTERNAL, &dev->null_mr); if (mem_size > 640) { - mem_mapping_add(&dev->mid_mapping, 0xa0000, 0x60000, - mem_read_b, mem_read_w, mem_read_l, - mem_write_b, mem_write_w, mem_write_l, - ram + 0xa0000, MEM_MAPPING_INTERNAL, &dev->null_mr); - mem_mapping_disable(&dev->mid_mapping); + mem_mapping_add(&dev->mid_mapping, 0xa0000, 0x60000, + mem_read_b, mem_read_w, mem_read_l, + mem_write_b, mem_write_w, mem_write_l, + ram + 0xa0000, MEM_MAPPING_INTERNAL, &dev->null_mr); + mem_mapping_disable(&dev->mid_mapping); } if (mem_size > 1024) { - mem_mapping_add(&dev->high_mapping, 0x100000, ((mem_size-1024)*1024), - mem_read_b, mem_read_w, mem_read_l, - mem_write_b, mem_write_w, mem_write_l, - ram + 0x100000, MEM_MAPPING_INTERNAL, &dev->null_mr); - mem_mapping_enable(&dev->high_mapping); + mem_mapping_add(&dev->high_mapping, 0x100000, ((mem_size - 1024) * 1024), + mem_read_b, mem_read_w, mem_read_l, + mem_write_b, mem_write_w, mem_write_l, + ram + 0x100000, MEM_MAPPING_INTERNAL, &dev->null_mr); + mem_mapping_enable(&dev->high_mapping); } for (i = 0; i < 24; i++) { - mem_mapping_add(&dev->upper_mapping[i], - 0x40000 + (i << 14), 0x4000, - mem_read_b, mem_read_w, mem_read_l, - mem_write_b, mem_write_w, mem_write_l, - mem_size > (256 + (i << 4)) ? (ram + 0x40000 + (i << 14)) : NULL, - MEM_MAPPING_INTERNAL, &dev->null_mr); - mem_mapping_enable(&dev->upper_mapping[i]); + mem_mapping_add(&dev->upper_mapping[i], + 0x40000 + (i << 14), 0x4000, + mem_read_b, mem_read_w, mem_read_l, + mem_write_b, mem_write_w, mem_write_l, + mem_size > (256 + (i << 4)) ? (ram + 0x40000 + (i << 14)) : NULL, + MEM_MAPPING_INTERNAL, &dev->null_mr); + mem_mapping_enable(&dev->upper_mapping[i]); } mem_mapping_add(&dev->shadow_mapping[0], - 0xe0000, 0x20000, - mem_read_b, mem_read_w, mem_read_l, - mem_write_b, mem_write_w, mem_write_l, - ((mem_size << 10) > 0xe0000) ? (ram + 0xe0000) : NULL, - MEM_MAPPING_INTERNAL, &dev->null_mr); + 0xe0000, 0x20000, + mem_read_b, mem_read_w, mem_read_l, + mem_write_b, mem_write_w, mem_write_l, + ((mem_size << 10) > 0xe0000) ? (ram + 0xe0000) : NULL, + MEM_MAPPING_INTERNAL, &dev->null_mr); mem_mapping_disable(&dev->shadow_mapping[0]); mem_mapping_add(&dev->shadow_mapping[1], - 0xfe0000, 0x20000, - mem_read_b, mem_read_w, mem_read_l, - mem_write_b, mem_write_w, mem_write_l, - ((mem_size << 10) > 0xe0000) ? (ram + 0xe0000) : NULL, - MEM_MAPPING_INTERNAL, &dev->null_mr); + 0xfe0000, 0x20000, + mem_read_b, mem_read_w, mem_read_l, + mem_write_b, mem_write_w, mem_write_l, + ((mem_size << 10) > 0xe0000) ? (ram + 0xe0000) : NULL, + MEM_MAPPING_INTERNAL, &dev->null_mr); mem_mapping_disable(&dev->shadow_mapping[1]); for (i = 0; i < 64; i++) { - dev->ems_mr[i].mr = 0x00; - mem_mapping_add(&dev->ems_mapping[i], - ((i & 31) + ((i & 31) >= 24 ? 24 : 16)) << 14, 0x04000, - mem_read_b, mem_read_w, mem_read_l, - mem_write_b, mem_write_w, mem_write_l, - ram + (((i & 31) + ((i & 31) >= 24 ? 24 : 16)) << 14), - MEM_MAPPING_INTERNAL, &dev->ems_mr[i]); - mem_mapping_disable(&dev->ems_mapping[i]); + dev->ems_mr[i].mr = 0x00; + mem_mapping_add(&dev->ems_mapping[i], + ((i & 31) + ((i & 31) >= 24 ? 24 : 16)) << 14, 0x04000, + mem_read_b, mem_read_w, mem_read_l, + mem_write_b, mem_write_w, mem_write_l, + ram + (((i & 31) + ((i & 31) >= 24 ? 24 : 16)) << 14), + MEM_MAPPING_INTERNAL, &dev->ems_mr[i]); + mem_mapping_disable(&dev->ems_mapping[i]); } memmap_state_update(dev); - return(dev); + return (dev); } - const device_t headland_gc10x_device = { - .name = "Headland GC101/102/103", + .name = "Headland GC101/102/103", .internal_name = "headland_gc10x", - .flags = 0, - .local = HEADLAND_GC103, - .init = headland_init, - .close = headland_close, - .reset = NULL, + .flags = 0, + .local = HEADLAND_GC103, + .init = headland_init, + .close = headland_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t headland_gc113_device = { - .name = "Headland GC101/102/113", + .name = "Headland GC101/102/113", .internal_name = "headland_gc113", - .flags = 0, - .local = HEADLAND_GC113, - .init = headland_init, - .close = headland_close, - .reset = NULL, + .flags = 0, + .local = HEADLAND_GC113, + .init = headland_init, + .close = headland_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t headland_ht18a_device = { - .name = "Headland HT18 Rev. A", + .name = "Headland HT18 Rev. A", .internal_name = "headland_ht18a", - .flags = 0, - .local = HEADLAND_HT18_A, - .init = headland_init, - .close = headland_close, - .reset = NULL, + .flags = 0, + .local = HEADLAND_HT18_A, + .init = headland_init, + .close = headland_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t headland_ht18b_device = { - .name = "Headland HT18 Rev. B", + .name = "Headland HT18 Rev. B", .internal_name = "headland_ht18b", - .flags = 0, - .local = HEADLAND_HT18_B, - .init = headland_init, - .close = headland_close, - .reset = NULL, + .flags = 0, + .local = HEADLAND_HT18_B, + .init = headland_init, + .close = headland_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t headland_ht18c_device = { - .name = "Headland HT18 Rev. C", + .name = "Headland HT18 Rev. C", .internal_name = "headland_ht18c", - .flags = 0, - .local = HEADLAND_HT18_C, - .init = headland_init, - .close = headland_close, - .reset = NULL, + .flags = 0, + .local = HEADLAND_HT18_C, + .init = headland_init, + .close = headland_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t headland_ht21c_d_device = { - .name = "Headland HT21 Rev. C/D", + .name = "Headland HT21 Rev. C/D", .internal_name = "headland_ht21cd", - .flags = 0, - .local = HEADLAND_HT21_C_D, - .init = headland_init, - .close = headland_close, - .reset = NULL, + .flags = 0, + .local = HEADLAND_HT21_C_D, + .init = headland_init, + .close = headland_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t headland_ht21e_device = { - .name = "Headland HT21 Rev. E", + .name = "Headland HT21 Rev. E", .internal_name = "headland_ht21", - .flags = 0, - .local = HEADLAND_HT21_E, - .init = headland_init, - .close = headland_close, - .reset = NULL, + .flags = 0, + .local = HEADLAND_HT21_E, + .init = headland_init, + .close = headland_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/ims8848.c b/src/chipset/ims8848.c index 35b1ef62b..c4273b4fe 100644 --- a/src/chipset/ims8848.c +++ b/src/chipset/ims8848.c @@ -33,7 +33,6 @@ #include <86box/port_92.h> #include <86box/chipset.h> - /* IMS 884x Configuration Registers @@ -42,158 +41,152 @@ By: Tiseno100, Miran Grca(OBattler) Register 00h: - Bit 3: F0000-FFFFF Shadow Enable - Bit 2: E0000-EFFFF Shadow Enable - Bit 0: ???? + Bit 3: F0000-FFFFF Shadow Enable + Bit 2: E0000-EFFFF Shadow Enable + Bit 0: ???? Register 04h: - Bit 3: Cache Write Hit Wait State - Bit 2: Cache Read Hit Wait State + Bit 3: Cache Write Hit Wait State + Bit 2: Cache Read Hit Wait State Register 06h: - Bit 3: System BIOS Cacheable (1: Yes / 0: No) - Bit 1: Power Management Mode (1: IRQ / 0: SMI#) + Bit 3: System BIOS Cacheable (1: Yes / 0: No) + Bit 1: Power Management Mode (1: IRQ / 0: SMI#) Register 08h: - Bit 2: System BIOS Shadow Write (1: Enable / 0: Disable) - Bit 1: System BIOS Shadow Read? + Bit 2: System BIOS Shadow Write (1: Enable / 0: Disable) + Bit 1: System BIOS Shadow Read? Register 0Dh: - Bit 0: IO 100H-3FFH Idle Detect (1: Enable / 0: Disable) + Bit 0: IO 100H-3FFH Idle Detect (1: Enable / 0: Disable) Register 0Eh: - Bit 7: DMA & Local Bus Idle Detect (1: Enable / 0: Disable) - Bit 6: Floppy Disk Idle Detect (1: Enable / 0: Disable) - Bit 5: IDE Idle Detect (1: Enable / 0: Disable) - Bit 4: Serial Port Idle Detect (1: Enable / 0: Disable) - Bit 3: Parallel Port Idle Detect (1: Enable / 0: Disable) - Bit 2: Keyboard Idle Detect (1: Enable / 0: Disable) - Bit 1: Video Idle Detect (1: Enable / 0: Disable) + Bit 7: DMA & Local Bus Idle Detect (1: Enable / 0: Disable) + Bit 6: Floppy Disk Idle Detect (1: Enable / 0: Disable) + Bit 5: IDE Idle Detect (1: Enable / 0: Disable) + Bit 4: Serial Port Idle Detect (1: Enable / 0: Disable) + Bit 3: Parallel Port Idle Detect (1: Enable / 0: Disable) + Bit 2: Keyboard Idle Detect (1: Enable / 0: Disable) + Bit 1: Video Idle Detect (1: Enable / 0: Disable) Register 12h: - Bits 3-2: Power Saving Timer (00 = 1 MIN, 01 = 3 MIN, 10 = 5 MIN, 11 = 8 MIN) - Bit 1: Base Memory (1: 512KB / 0: 640KB) + Bits 3-2: Power Saving Timer (00 = 1 MIN, 01 = 3 MIN, 10 = 5 MIN, 11 = 8 MIN) + Bit 1: Base Memory (1: 512KB / 0: 640KB) Register 1Ah: - Bit 3: Cache Write Hit W/S For PCI (1: Enabled / 0: Disable) - Bit 2: Cache Read Hit W/S For PCI (1: Enabled / 0: Disable) - Bit 1: VESA Clock Skew (1: 4ns/6ns, 0: No Delay/2ns) + Bit 3: Cache Write Hit W/S For PCI (1: Enabled / 0: Disable) + Bit 2: Cache Read Hit W/S For PCI (1: Enabled / 0: Disable) + Bit 1: VESA Clock Skew (1: 4ns/6ns, 0: No Delay/2ns) Register 1Bh: - Bit 6: Enable SMRAM (always at 30000-4FFFF) in SMM - Bit 5: ???? - Bit 4: Software SMI# - Bit 3: DC000-DFFFF Shadow Enable - Bit 2: D8000-DBFFF Shadow Enable - Bit 1: D4000-D7FFF Shadow Enable - Bit 0: D0000-D3FFF Shadow Enable + Bit 6: Enable SMRAM (always at 30000-4FFFF) in SMM + Bit 5: ???? + Bit 4: Software SMI# + Bit 3: DC000-DFFFF Shadow Enable + Bit 2: D8000-DBFFF Shadow Enable + Bit 1: D4000-D7FFF Shadow Enable + Bit 0: D0000-D3FFF Shadow Enable Register 1Ch: - Bits 7-4: INTA IRQ routing (0 = disabled, 1 to F = IRQ) - Bit 3: CC000-CFFFF Shadow Enable - Bit 2: C8000-CBFFF Shadow Enable - Bit 1: C4000-C7FFF Shadow Enable - Bit 0: C0000-C3FFF Shadow Enable + Bits 7-4: INTA IRQ routing (0 = disabled, 1 to F = IRQ) + Bit 3: CC000-CFFFF Shadow Enable + Bit 2: C8000-CBFFF Shadow Enable + Bit 1: C4000-C7FFF Shadow Enable + Bit 0: C0000-C3FFF Shadow Enable Register 1Dh: - Bits 7-4: INTB IRQ routing (0 = disabled, 1 to F = IRQ) + Bits 7-4: INTB IRQ routing (0 = disabled, 1 to F = IRQ) Register 1Eh: - Bits 7-4: INTC IRQ routing (0 = disabled, 1 to F = IRQ) - Bit 1: C4000-C7FFF Cacheable - Bit 0: C0000-C3FFF Cacheable + Bits 7-4: INTC IRQ routing (0 = disabled, 1 to F = IRQ) + Bit 1: C4000-C7FFF Cacheable + Bit 0: C0000-C3FFF Cacheable Register 21h: - Bits 7-4: INTD IRQ routing (0 = disabled, 1 to F = IRQ) + Bits 7-4: INTD IRQ routing (0 = disabled, 1 to F = IRQ) Register 22h: - Bit 5: Local Bus Master #2 select (0 = VESA, 1 = PCI) - Bit 4: Local Bus Master #1 select (0 = VESA, 1 = PCI) - Bits 1-0: Internal HADS# Delay Always (00 = No Delay, 01 = 1 Clk, 10 = 2 Clks) + Bit 5: Local Bus Master #2 select (0 = VESA, 1 = PCI) + Bit 4: Local Bus Master #1 select (0 = VESA, 1 = PCI) + Bits 1-0: Internal HADS# Delay Always (00 = No Delay, 01 = 1 Clk, 10 = 2 Clks) Register 23h: - Bit 7: Seven Bits Tag (1: Enabled / 0: Disable) - Bit 3: Extend LBRDY#(VL Master) (1: Enabled / 0: Disable) - Bit 2: Sync LRDY#(VL Slave) (1: Enabled / 0: Disable) - Bit 0: HADS# Delay After LB. Cycle (1: Enabled / 0: Disable) + Bit 7: Seven Bits Tag (1: Enabled / 0: Disable) + Bit 3: Extend LBRDY#(VL Master) (1: Enabled / 0: Disable) + Bit 2: Sync LRDY#(VL Slave) (1: Enabled / 0: Disable) + Bit 0: HADS# Delay After LB. Cycle (1: Enabled / 0: Disable) */ typedef struct { - uint8_t idx, access_data, - regs[256], pci_conf[256]; + uint8_t idx, access_data, + regs[256], pci_conf[256]; - smram_t *smram; + smram_t *smram; } ims8848_t; - #ifdef ENABLE_IMS8848_LOG int ims8848_do_log = ENABLE_IMS8848_LOG; - static void ims8848_log(const char *fmt, ...) { va_list ap; if (ims8848_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define ims8848_log(fmt, ...) +# define ims8848_log(fmt, ...) #endif - /* Shadow write always enabled, 1B and 1C control C000-DFFF read. */ static void ims8848_recalc(ims8848_t *dev) { - int i, state_on; + int i, state_on; uint32_t base; ims8848_log("SHADOW: 00 = %02X, 08 = %02X, 1B = %02X, 1C = %02X\n", - dev->regs[0x00], dev->regs[0x08], dev->regs[0x1b], dev->regs[0x1c]); + dev->regs[0x00], dev->regs[0x08], dev->regs[0x1b], dev->regs[0x1c]); state_on = MEM_READ_INTERNAL; state_on |= (dev->regs[0x08] & 0x04) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; for (i = 0; i < 2; i++) { - base = 0xe0000 + (i << 16); - if (dev->regs[0x00] & (1 << (i + 2))) - mem_set_mem_state_both(base, 0x10000, state_on); - else - mem_set_mem_state_both(base, 0x10000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + base = 0xe0000 + (i << 16); + if (dev->regs[0x00] & (1 << (i + 2))) + mem_set_mem_state_both(base, 0x10000, state_on); + else + mem_set_mem_state_both(base, 0x10000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); } for (i = 0; i < 4; i++) { - base = 0xc0000 + (i << 14); - if (dev->regs[0x1c] & (1 << i)) - mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - else - mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + base = 0xc0000 + (i << 14); + if (dev->regs[0x1c] & (1 << i)) + mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + else + mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); - base = 0xd0000 + (i << 14); - if (dev->regs[0x1b] & (1 << i)) - mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - else - mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + base = 0xd0000 + (i << 14); + if (dev->regs[0x1b] & (1 << i)) + mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + else + mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); } flushmmucache_nopc(); } - static void ims8848_base_memory(ims8848_t *dev) { /* We can use the proper mem_set_access to handle that. */ - mem_set_mem_state_both(0x80000, 0x20000, (dev->regs[0x12] & 2) ? - (MEM_READ_DISABLED | MEM_WRITE_DISABLED) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)); + mem_set_mem_state_both(0x80000, 0x20000, (dev->regs[0x12] & 2) ? (MEM_READ_DISABLED | MEM_WRITE_DISABLED) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)); } - static void ims8848_smram(ims8848_t *dev) { @@ -202,137 +195,137 @@ ims8848_smram(ims8848_t *dev) smram_enable(dev->smram, 0x00030000, 0x00030000, 0x20000, dev->regs[0x1b] & 0x40, 1); } - static void ims8848_write(uint16_t addr, uint8_t val, void *priv) { ims8848_t *dev = (ims8848_t *) priv; - uint8_t old = dev->regs[dev->idx]; + uint8_t old = dev->regs[dev->idx]; switch (addr) { - case 0x22: - ims8848_log("[W] IDX = %02X\n", val); - dev->idx = val; - break; - case 0x23: - ims8848_log("[W] IDX IN = %02X\n", val); - if (((val & 0x0f) == ((dev->idx >> 4) & 0x0f)) && ((val & 0xf0) == ((dev->idx << 4) & 0xf0))) - dev->access_data = 1; - break; - case 0x24: - ims8848_log("[W] [%i] REG %02X = %02X\n", dev->access_data, dev->idx, val); - if (dev->access_data) { - dev->regs[dev->idx] = val; - switch (dev->idx) { - case 0x00: case 0x08: case 0x1b: case 0x1c: - /* Shadow RAM */ - ims8848_recalc(dev); - if (dev->idx == 0x1b) { - ims8848_smram(dev); - if (!(old & 0x10) && (val & 0x10)) - smi_raise(); - } else if (dev->idx == 0x1c) - pci_set_irq_routing(PCI_INTA, (val >> 4) ? (val >> 4) : PCI_IRQ_DISABLED); - break; + case 0x22: + ims8848_log("[W] IDX = %02X\n", val); + dev->idx = val; + break; + case 0x23: + ims8848_log("[W] IDX IN = %02X\n", val); + if (((val & 0x0f) == ((dev->idx >> 4) & 0x0f)) && ((val & 0xf0) == ((dev->idx << 4) & 0xf0))) + dev->access_data = 1; + break; + case 0x24: + ims8848_log("[W] [%i] REG %02X = %02X\n", dev->access_data, dev->idx, val); + if (dev->access_data) { + dev->regs[dev->idx] = val; + switch (dev->idx) { + case 0x00: + case 0x08: + case 0x1b: + case 0x1c: + /* Shadow RAM */ + ims8848_recalc(dev); + if (dev->idx == 0x1b) { + ims8848_smram(dev); + if (!(old & 0x10) && (val & 0x10)) + smi_raise(); + } else if (dev->idx == 0x1c) + pci_set_irq_routing(PCI_INTA, (val >> 4) ? (val >> 4) : PCI_IRQ_DISABLED); + break; - case 0x1d: case 0x1e: - pci_set_irq_routing(PCI_INTB + (dev->idx - 0x1d), (val >> 4) ? (val >> 4) : PCI_IRQ_DISABLED); - break; - case 0x21: - pci_set_irq_routing(PCI_INTD, (val >> 4) ? (val >> 4) : PCI_IRQ_DISABLED); - break; + case 0x1d: + case 0x1e: + pci_set_irq_routing(PCI_INTB + (dev->idx - 0x1d), (val >> 4) ? (val >> 4) : PCI_IRQ_DISABLED); + break; + case 0x21: + pci_set_irq_routing(PCI_INTD, (val >> 4) ? (val >> 4) : PCI_IRQ_DISABLED); + break; - case 0x12: - /* Base Memory */ - ims8848_base_memory(dev); - break; - } - dev->access_data = 0; - } - break; + case 0x12: + /* Base Memory */ + ims8848_base_memory(dev); + break; + } + dev->access_data = 0; + } + break; } } - static uint8_t ims8848_read(uint16_t addr, void *priv) { - uint8_t ret = 0xff; + uint8_t ret = 0xff; ims8848_t *dev = (ims8848_t *) priv; #ifdef ENABLE_IMS8848_LOG uint8_t old_ad = dev->access_data; #endif switch (addr) { - case 0x22: - ims8848_log("[R] IDX = %02X\n", ret); - ret = dev->idx; - break; - case 0x23: - ims8848_log("[R] IDX IN = %02X\n", ret); - ret = (dev->idx >> 4) | (dev->idx << 4); - break; - case 0x24: - if (dev->access_data) { - ret = dev->regs[dev->idx]; - dev->access_data = 0; - } - ims8848_log("[R] [%i] REG %02X = %02X\n", old_ad, dev->idx, ret); - break; + case 0x22: + ims8848_log("[R] IDX = %02X\n", ret); + ret = dev->idx; + break; + case 0x23: + ims8848_log("[R] IDX IN = %02X\n", ret); + ret = (dev->idx >> 4) | (dev->idx << 4); + break; + case 0x24: + if (dev->access_data) { + ret = dev->regs[dev->idx]; + dev->access_data = 0; + } + ims8848_log("[R] [%i] REG %02X = %02X\n", old_ad, dev->idx, ret); + break; } return ret; } - static void ims8849_pci_write(int func, int addr, uint8_t val, void *priv) { - ims8848_t *dev = (ims8848_t *)priv; + ims8848_t *dev = (ims8848_t *) priv; ims8848_log("IMS 884x-PCI: dev->regs[%02x] = %02x POST: %02x\n", addr, val, inb(0x80)); - if (func == 0) switch (addr) { - case 0x04: - dev->pci_conf[addr] = val; - break; + if (func == 0) + switch (addr) { + case 0x04: + dev->pci_conf[addr] = val; + break; - case 0x05: - dev->pci_conf[addr] = val & 3; - break; + case 0x05: + dev->pci_conf[addr] = val & 3; + break; - case 0x07: - dev->pci_conf[addr] &= val & 0xf7; - break; + case 0x07: + dev->pci_conf[addr] &= val & 0xf7; + break; - case 0x0c ... 0x0d: - dev->pci_conf[addr] = val; - break; + case 0x0c ... 0x0d: + dev->pci_conf[addr] = val; + break; - case 0x52 ... 0x55: - dev->pci_conf[addr] = val; - break; - } + case 0x52 ... 0x55: + dev->pci_conf[addr] = val; + break; + } } - static uint8_t ims8849_pci_read(int func, int addr, void *priv) { - ims8848_t *dev = (ims8848_t *)priv; - uint8_t ret = 0xff; + ims8848_t *dev = (ims8848_t *) priv; + uint8_t ret = 0xff; if (func == 0) - ret = dev->pci_conf[addr]; + ret = dev->pci_conf[addr]; return ret; } - static void ims8848_reset(void *priv) { - ims8848_t *dev = (ims8848_t *)priv; + ims8848_t *dev = (ims8848_t *) priv; memset(dev->regs, 0x00, sizeof(dev->regs)); memset(dev->pci_conf, 0x00, sizeof(dev->pci_conf)); @@ -347,7 +340,7 @@ ims8848_reset(void *priv) dev->pci_conf[0x0b] = 0x06; - ims8848_recalc(dev); /* Shadow RAM Setup */ + ims8848_recalc(dev); /* Shadow RAM Setup */ ims8848_base_memory(dev); /* Base Memory Setup */ pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED); @@ -358,7 +351,6 @@ ims8848_reset(void *priv) ims8848_smram(dev); } - static void ims8848_close(void *priv) { @@ -369,7 +361,6 @@ ims8848_close(void *priv) free(dev); } - static void * ims8848_init(const device_t *info) { @@ -379,12 +370,12 @@ ims8848_init(const device_t *info) device_add(&port_92_device); /* IMS 8848: - 22h Index - 23h Data Unlock - 24h Data + 22h Index + 23h Data Unlock + 24h Data IMS 8849: - PCI Device 0: IMS 8849 Dummy for compatibility reasons + PCI Device 0: IMS 8849 Dummy for compatibility reasons */ io_sethandler(0x0022, 0x0003, ims8848_read, NULL, NULL, ims8848_write, NULL, NULL, dev); pci_add_card(PCI_ADD_NORTHBRIDGE, ims8849_pci_read, ims8849_pci_write, dev); @@ -401,15 +392,15 @@ ims8848_init(const device_t *info) } const device_t ims8848_device = { - .name = "IMS 8848/8849", + .name = "IMS 8848/8849", .internal_name = "ims8848", - .flags = 0, - .local = 0, - .init = ims8848_init, - .close = ims8848_close, - .reset = ims8848_reset, + .flags = 0, + .local = 0, + .init = ims8848_init, + .close = ims8848_close, + .reset = ims8848_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/intel_420ex.c b/src/chipset/intel_420ex.c index 11c66b833..406aeb48a 100644 --- a/src/chipset/intel_420ex.c +++ b/src/chipset/intel_420ex.c @@ -36,72 +36,66 @@ #include <86box/chipset.h> #include <86box/spd.h> - -#define MEM_STATE_SHADOW_R 0x01 -#define MEM_STATE_SHADOW_W 0x02 -#define MEM_STATE_SMRAM 0x04 - +#define MEM_STATE_SHADOW_R 0x01 +#define MEM_STATE_SHADOW_W 0x02 +#define MEM_STATE_SMRAM 0x04 typedef struct { - uint8_t has_ide, smram_locked, - regs[256]; + uint8_t has_ide, smram_locked, + regs[256]; - uint16_t timer_base, - timer_latch; + uint16_t timer_base, + timer_latch; - smram_t *smram; + smram_t *smram; - double fast_off_period; + double fast_off_period; - pc_timer_t timer, fast_off_timer; + pc_timer_t timer, fast_off_timer; - apm_t * apm; - port_92_t * port_92; + apm_t *apm; + port_92_t *port_92; } i420ex_t; - #ifdef ENABLE_I420EX_LOG int i420ex_do_log = ENABLE_I420EX_LOG; - static void i420ex_log(const char *fmt, ...) { va_list ap; if (i420ex_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define i420ex_log(fmt, ...) +# define i420ex_log(fmt, ...) #endif - static void i420ex_map(uint32_t addr, uint32_t size, int state) { switch (state & 3) { - case 0: - mem_set_mem_state_both(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - break; - case 1: - mem_set_mem_state_both(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTANY); - break; - case 2: - mem_set_mem_state_both(addr, size, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); - break; - case 3: - mem_set_mem_state_both(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - break; + case 0: + mem_set_mem_state_both(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + break; + case 1: + mem_set_mem_state_both(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTANY); + break; + case 2: + mem_set_mem_state_both(addr, size, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + break; + case 3: + mem_set_mem_state_both(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + break; } flushmmucache_nopc(); } - static void i420ex_smram_handler_phase0(void) { @@ -109,7 +103,6 @@ i420ex_smram_handler_phase0(void) smram_disable_all(); } - static void i420ex_smram_handler_phase1(i420ex_t *dev) { @@ -119,244 +112,252 @@ i420ex_smram_handler_phase1(i420ex_t *dev) uint32_t size = 0x00010000; switch (regs[0x70] & 0x07) { - case 0: case 1: - default: - host_base = ram_base = 0x00000000; - size = 0x00000000; - break; - case 2: - host_base = 0x000a0000; - ram_base = 0x000a0000; - break; - case 3: - host_base = 0x000b0000; - ram_base = 0x000b0000; - break; - case 4: - host_base = 0x000c0000; - ram_base = 0x000a0000; - break; - case 5: - host_base = 0x000d0000; - ram_base = 0x000a0000; - break; - case 6: - host_base = 0x000e0000; - ram_base = 0x000a0000; - break; - case 7: - host_base = 0x000f0000; - ram_base = 0x000a0000; - break; + case 0: + case 1: + default: + host_base = ram_base = 0x00000000; + size = 0x00000000; + break; + case 2: + host_base = 0x000a0000; + ram_base = 0x000a0000; + break; + case 3: + host_base = 0x000b0000; + ram_base = 0x000b0000; + break; + case 4: + host_base = 0x000c0000; + ram_base = 0x000a0000; + break; + case 5: + host_base = 0x000d0000; + ram_base = 0x000a0000; + break; + case 6: + host_base = 0x000e0000; + ram_base = 0x000a0000; + break; + case 7: + host_base = 0x000f0000; + ram_base = 0x000a0000; + break; } smram_enable(dev->smram, host_base, ram_base, size, - (regs[0x70] & 0x70) == 0x40, !(regs[0x70] & 0x20)); + (regs[0x70] & 0x70) == 0x40, !(regs[0x70] & 0x20)); } - static void i420ex_write(int func, int addr, uint8_t val, void *priv) { i420ex_t *dev = (i420ex_t *) priv; if (func > 0) - return; + return; if (((addr >= 0x0f) && (addr < 0x4c)) && (addr != 0x40)) - return; + return; switch (addr) { - case 0x05: - dev->regs[addr] = (val & 0x01); - break; + case 0x05: + dev->regs[addr] = (val & 0x01); + break; - case 0x07: - dev->regs[addr] &= ~(val & 0xf0); - break; + case 0x07: + dev->regs[addr] &= ~(val & 0xf0); + break; - case 0x40: - dev->regs[addr] = (val & 0x7f); - break; - case 0x44: - dev->regs[addr] = (val & 0x07); - break; - case 0x48: - dev->regs[addr] = (val & 0x3f); - if (dev->has_ide) { - ide_pri_disable(); - switch (val & 0x03) { - case 0x01: - ide_set_base(0, 0x01f0); - ide_set_side(0, 0x03f6); - ide_pri_enable(); - break; - case 0x02: - ide_set_base(0, 0x0170); - ide_set_side(0, 0x0376); - ide_pri_enable(); - break; - } - } - break; - case 0x49: case 0x53: - dev->regs[addr] = (val & 0x1f); - break; - case 0x4c: case 0x51: - case 0x57: - case 0x68: case 0x69: - dev->regs[addr] = val; - if (addr == 0x4c) { - dma_alias_remove(); - if (!(val & 0x80)) - dma_alias_set(); - } - break; - case 0x4d: - dev->regs[addr] = (dev->regs[addr] & 0xef) | (val & 0x10); - break; - case 0x4e: - dev->regs[addr] = (val & 0xf7); - break; - case 0x50: - dev->regs[addr] = (val & 0x0f); - break; - case 0x52: - dev->regs[addr] = (val & 0x7f); - break; - case 0x56: - dev->regs[addr] = (val & 0x3e); - break; - case 0x59: /* PAM0 */ - if ((dev->regs[0x59] ^ val) & 0xf0) { - i420ex_map(0xf0000, 0x10000, val >> 4); - shadowbios = (val & 0x10); - } - dev->regs[0x59] = val & 0xf0; - break; - case 0x5a: /* PAM1 */ - if ((dev->regs[0x5a] ^ val) & 0x0f) - i420ex_map(0xc0000, 0x04000, val & 0xf); - if ((dev->regs[0x5a] ^ val) & 0xf0) - i420ex_map(0xc4000, 0x04000, val >> 4); - dev->regs[0x5a] = val; - break; - case 0x5b: /*PAM2 */ - if ((dev->regs[0x5b] ^ val) & 0x0f) - i420ex_map(0xc8000, 0x04000, val & 0xf); - if ((dev->regs[0x5b] ^ val) & 0xf0) - i420ex_map(0xcc000, 0x04000, val >> 4); - dev->regs[0x5b] = val; - break; - case 0x5c: /*PAM3 */ - if ((dev->regs[0x5c] ^ val) & 0x0f) - i420ex_map(0xd0000, 0x04000, val & 0xf); - if ((dev->regs[0x5c] ^ val) & 0xf0) - i420ex_map(0xd4000, 0x04000, val >> 4); - dev->regs[0x5c] = val; - break; - case 0x5d: /* PAM4 */ - if ((dev->regs[0x5d] ^ val) & 0x0f) - i420ex_map(0xd8000, 0x04000, val & 0xf); - if ((dev->regs[0x5d] ^ val) & 0xf0) - i420ex_map(0xdc000, 0x04000, val >> 4); - dev->regs[0x5d] = val; - break; - case 0x5e: /* PAM5 */ - if ((dev->regs[0x5e] ^ val) & 0x0f) - i420ex_map(0xe0000, 0x04000, val & 0xf); - if ((dev->regs[0x5e] ^ val) & 0xf0) - i420ex_map(0xe4000, 0x04000, val >> 4); - dev->regs[0x5e] = val; - break; - case 0x5f: /* PAM6 */ - if ((dev->regs[0x5f] ^ val) & 0x0f) - i420ex_map(0xe8000, 0x04000, val & 0xf); - if ((dev->regs[0x5f] ^ val) & 0xf0) - i420ex_map(0xec000, 0x04000, val >> 4); - dev->regs[0x5f] = val; - break; - case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: - spd_write_drbs(dev->regs, 0x60, 0x64, 1); - break; - case 0x66: case 0x67: - i420ex_log("Set IRQ routing: INT %c -> %02X\n", 0x41 + (addr & 0x01), val); - dev->regs[addr] = val & 0x8f; - if (val & 0x80) - pci_set_irq_routing(PCI_INTA + (addr & 0x01), PCI_IRQ_DISABLED); - else - pci_set_irq_routing(PCI_INTA + (addr & 0x01), val & 0xf); - break; - case 0x70: /* SMRAM */ - i420ex_smram_handler_phase0(); - if (dev->smram_locked) - dev->regs[0x70] = (dev->regs[0x70] & 0xdf) | (val & 0x20); - else { - dev->regs[0x70] = (dev->regs[0x70] & 0x88) | (val & 0x77); - dev->smram_locked = (val & 0x10); - if (dev->smram_locked) - dev->regs[0x70] &= 0xbf; - } - i420ex_smram_handler_phase1(dev); - break; - case 0xa0: - dev->regs[addr] = val & 0x1f; - apm_set_do_smi(dev->apm, !!(val & 0x01) && !!(dev->regs[0xa2] & 0x80)); - switch ((val & 0x18) >> 3) { - case 0x00: - dev->fast_off_period = PCICLK * 32768.0 * 60000.0; - break; - case 0x01: - default: - dev->fast_off_period = 0.0; - break; - case 0x02: - dev->fast_off_period = PCICLK; - break; - case 0x03: - dev->fast_off_period = PCICLK * 32768.0; - break; - } - cpu_fast_off_count = cpu_fast_off_val + 1; - cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); - break; - case 0xa2: - dev->regs[addr] = val & 0xff; - apm_set_do_smi(dev->apm, !!(dev->regs[0xa0] & 0x01) && !!(val & 0x80)); - break; - case 0xaa: - dev->regs[addr] &= (val & 0xff); - break; - case 0xac: case 0xae: - dev->regs[addr] = val & 0xff; - break; - case 0xa4: - dev->regs[addr] = val & 0xfb; - cpu_fast_off_flags = (cpu_fast_off_flags & 0xffffff00) | dev->regs[addr]; - break; - case 0xa5: - dev->regs[addr] = val; - cpu_fast_off_flags = (cpu_fast_off_flags & 0xffff00ff) | (dev->regs[addr] << 8); - break; - case 0xa7: - dev->regs[addr] = val & 0xe0; - cpu_fast_off_flags = (cpu_fast_off_flags & 0x00ffffff) | (dev->regs[addr] << 24); - break; - case 0xa8: - dev->regs[addr] = val & 0xff; - cpu_fast_off_val = val; - cpu_fast_off_count = val + 1; - cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); - break; + case 0x40: + dev->regs[addr] = (val & 0x7f); + break; + case 0x44: + dev->regs[addr] = (val & 0x07); + break; + case 0x48: + dev->regs[addr] = (val & 0x3f); + if (dev->has_ide) { + ide_pri_disable(); + switch (val & 0x03) { + case 0x01: + ide_set_base(0, 0x01f0); + ide_set_side(0, 0x03f6); + ide_pri_enable(); + break; + case 0x02: + ide_set_base(0, 0x0170); + ide_set_side(0, 0x0376); + ide_pri_enable(); + break; + } + } + break; + case 0x49: + case 0x53: + dev->regs[addr] = (val & 0x1f); + break; + case 0x4c: + case 0x51: + case 0x57: + case 0x68: + case 0x69: + dev->regs[addr] = val; + if (addr == 0x4c) { + dma_alias_remove(); + if (!(val & 0x80)) + dma_alias_set(); + } + break; + case 0x4d: + dev->regs[addr] = (dev->regs[addr] & 0xef) | (val & 0x10); + break; + case 0x4e: + dev->regs[addr] = (val & 0xf7); + break; + case 0x50: + dev->regs[addr] = (val & 0x0f); + break; + case 0x52: + dev->regs[addr] = (val & 0x7f); + break; + case 0x56: + dev->regs[addr] = (val & 0x3e); + break; + case 0x59: /* PAM0 */ + if ((dev->regs[0x59] ^ val) & 0xf0) { + i420ex_map(0xf0000, 0x10000, val >> 4); + shadowbios = (val & 0x10); + } + dev->regs[0x59] = val & 0xf0; + break; + case 0x5a: /* PAM1 */ + if ((dev->regs[0x5a] ^ val) & 0x0f) + i420ex_map(0xc0000, 0x04000, val & 0xf); + if ((dev->regs[0x5a] ^ val) & 0xf0) + i420ex_map(0xc4000, 0x04000, val >> 4); + dev->regs[0x5a] = val; + break; + case 0x5b: /*PAM2 */ + if ((dev->regs[0x5b] ^ val) & 0x0f) + i420ex_map(0xc8000, 0x04000, val & 0xf); + if ((dev->regs[0x5b] ^ val) & 0xf0) + i420ex_map(0xcc000, 0x04000, val >> 4); + dev->regs[0x5b] = val; + break; + case 0x5c: /*PAM3 */ + if ((dev->regs[0x5c] ^ val) & 0x0f) + i420ex_map(0xd0000, 0x04000, val & 0xf); + if ((dev->regs[0x5c] ^ val) & 0xf0) + i420ex_map(0xd4000, 0x04000, val >> 4); + dev->regs[0x5c] = val; + break; + case 0x5d: /* PAM4 */ + if ((dev->regs[0x5d] ^ val) & 0x0f) + i420ex_map(0xd8000, 0x04000, val & 0xf); + if ((dev->regs[0x5d] ^ val) & 0xf0) + i420ex_map(0xdc000, 0x04000, val >> 4); + dev->regs[0x5d] = val; + break; + case 0x5e: /* PAM5 */ + if ((dev->regs[0x5e] ^ val) & 0x0f) + i420ex_map(0xe0000, 0x04000, val & 0xf); + if ((dev->regs[0x5e] ^ val) & 0xf0) + i420ex_map(0xe4000, 0x04000, val >> 4); + dev->regs[0x5e] = val; + break; + case 0x5f: /* PAM6 */ + if ((dev->regs[0x5f] ^ val) & 0x0f) + i420ex_map(0xe8000, 0x04000, val & 0xf); + if ((dev->regs[0x5f] ^ val) & 0xf0) + i420ex_map(0xec000, 0x04000, val >> 4); + dev->regs[0x5f] = val; + break; + case 0x60: + case 0x61: + case 0x62: + case 0x63: + case 0x64: + spd_write_drbs(dev->regs, 0x60, 0x64, 1); + break; + case 0x66: + case 0x67: + i420ex_log("Set IRQ routing: INT %c -> %02X\n", 0x41 + (addr & 0x01), val); + dev->regs[addr] = val & 0x8f; + if (val & 0x80) + pci_set_irq_routing(PCI_INTA + (addr & 0x01), PCI_IRQ_DISABLED); + else + pci_set_irq_routing(PCI_INTA + (addr & 0x01), val & 0xf); + break; + case 0x70: /* SMRAM */ + i420ex_smram_handler_phase0(); + if (dev->smram_locked) + dev->regs[0x70] = (dev->regs[0x70] & 0xdf) | (val & 0x20); + else { + dev->regs[0x70] = (dev->regs[0x70] & 0x88) | (val & 0x77); + dev->smram_locked = (val & 0x10); + if (dev->smram_locked) + dev->regs[0x70] &= 0xbf; + } + i420ex_smram_handler_phase1(dev); + break; + case 0xa0: + dev->regs[addr] = val & 0x1f; + apm_set_do_smi(dev->apm, !!(val & 0x01) && !!(dev->regs[0xa2] & 0x80)); + switch ((val & 0x18) >> 3) { + case 0x00: + dev->fast_off_period = PCICLK * 32768.0 * 60000.0; + break; + case 0x01: + default: + dev->fast_off_period = 0.0; + break; + case 0x02: + dev->fast_off_period = PCICLK; + break; + case 0x03: + dev->fast_off_period = PCICLK * 32768.0; + break; + } + cpu_fast_off_count = cpu_fast_off_val + 1; + cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); + break; + case 0xa2: + dev->regs[addr] = val & 0xff; + apm_set_do_smi(dev->apm, !!(dev->regs[0xa0] & 0x01) && !!(val & 0x80)); + break; + case 0xaa: + dev->regs[addr] &= (val & 0xff); + break; + case 0xac: + case 0xae: + dev->regs[addr] = val & 0xff; + break; + case 0xa4: + dev->regs[addr] = val & 0xfb; + cpu_fast_off_flags = (cpu_fast_off_flags & 0xffffff00) | dev->regs[addr]; + break; + case 0xa5: + dev->regs[addr] = val; + cpu_fast_off_flags = (cpu_fast_off_flags & 0xffff00ff) | (dev->regs[addr] << 8); + break; + case 0xa7: + dev->regs[addr] = val & 0xe0; + cpu_fast_off_flags = (cpu_fast_off_flags & 0x00ffffff) | (dev->regs[addr] << 24); + break; + case 0xa8: + dev->regs[addr] = val & 0xff; + cpu_fast_off_val = val; + cpu_fast_off_count = val + 1; + cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); + break; } } - static uint8_t i420ex_read(int func, int addr, void *priv) { i420ex_t *dev = (i420ex_t *) priv; - uint8_t ret; + uint8_t ret; ret = 0xff; @@ -366,7 +367,6 @@ i420ex_read(int func, int addr, void *priv) return ret; } - static void i420ex_reset_hard(void *priv) { @@ -374,8 +374,10 @@ i420ex_reset_hard(void *priv) memset(dev->regs, 0, 256); - dev->regs[0x00] = 0x86; dev->regs[0x01] = 0x80; /*Intel*/ - dev->regs[0x02] = 0x86; dev->regs[0x03] = 0x04; /*82378IB (I420EX)*/ + dev->regs[0x00] = 0x86; + dev->regs[0x01] = 0x80; /*Intel*/ + dev->regs[0x02] = 0x86; + dev->regs[0x03] = 0x04; /*82378IB (I420EX)*/ dev->regs[0x04] = 0x07; dev->regs[0x07] = 0x02; @@ -383,13 +385,14 @@ i420ex_reset_hard(void *priv) dev->regs[0x4e] = 0x03; /* Bits 2:1 of register 50h are 00 is 25 MHz, and 01 if 33 MHz, 10 and 11 are reserved. */ if (cpu_busspeed >= 33333333) - dev->regs[0x50] |= 0x02; + dev->regs[0x50] |= 0x02; dev->regs[0x51] = 0x80; dev->regs[0x60] = dev->regs[0x61] = dev->regs[0x62] = dev->regs[0x63] = dev->regs[0x64] = 0x01; - dev->regs[0x66] = 0x80; dev->regs[0x67] = 0x80; - dev->regs[0x69] = 0x02; - dev->regs[0xa0] = 0x08; - dev->regs[0xa8] = 0x0f; + dev->regs[0x66] = 0x80; + dev->regs[0x67] = 0x80; + dev->regs[0x69] = 0x02; + dev->regs[0xa0] = 0x08; + dev->regs[0xa8] = 0x0f; mem_set_mem_state(0x000a0000, 0x00060000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); mem_set_mem_state_smm(0x000a0000, 0x00060000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); @@ -398,20 +401,18 @@ i420ex_reset_hard(void *priv) pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED); if (dev->has_ide) - ide_pri_disable(); + ide_pri_disable(); } - static void i420ex_apm_out(uint16_t port, uint8_t val, void *p) { i420ex_t *dev = (i420ex_t *) p; if (dev->apm->do_smi) - dev->regs[0xaa] |= 0x80; + dev->regs[0xaa] |= 0x80; } - static void i420ex_fast_off_count(void *priv) { @@ -423,22 +424,21 @@ i420ex_fast_off_count(void *priv) dev->regs[0xaa] |= 0x20; } - static void i420ex_reset(void *p) { i420ex_t *dev = (i420ex_t *) p; - int i; + int i; i420ex_write(0, 0x48, 0x00, p); for (i = 0; i < 7; i++) - i420ex_write(0, 0x59 + i, 0x00, p); + i420ex_write(0, 0x59 + i, 0x00, p); for (i = 0; i <= 4; i++) - i420ex_write(0, 0x60 + i, 0x01, p); + i420ex_write(0, 0x60 + i, 0x01, p); - dev->regs[0x70] &= 0xef; /* Forcibly unlock the SMRAM register. */ + dev->regs[0x70] &= 0xef; /* Forcibly unlock the SMRAM register. */ dev->smram_locked = 0; i420ex_write(0, 0x70, 0x00, p); @@ -454,38 +454,35 @@ i420ex_reset(void *p) i420ex_write(0, 0xa8, 0x0f, p); } - static void i420ex_close(void *p) { - i420ex_t *dev = (i420ex_t *)p; + i420ex_t *dev = (i420ex_t *) p; smram_del(dev->smram); free(dev); } - static void i420ex_speed_changed(void *priv) { i420ex_t *dev = (i420ex_t *) priv; - int te; + int te; te = timer_is_enabled(&dev->timer); timer_disable(&dev->timer); if (te) - timer_set_delay_u64(&dev->timer, ((uint64_t) dev->timer_latch) * TIMER_USEC); + timer_set_delay_u64(&dev->timer, ((uint64_t) dev->timer_latch) * TIMER_USEC); te = timer_is_enabled(&dev->fast_off_timer); timer_stop(&dev->fast_off_timer); if (te) - timer_on_auto(&dev->fast_off_timer, dev->fast_off_period); + timer_on_auto(&dev->fast_off_timer, dev->fast_off_period); } - static void * i420ex_init(const device_t *info) { @@ -502,7 +499,7 @@ i420ex_init(const device_t *info) cpu_fast_off_flags = 0x00000000; - cpu_fast_off_val = dev->regs[0xa8]; + cpu_fast_off_val = dev->regs[0xa8]; cpu_fast_off_count = cpu_fast_off_val + 1; cpu_register_fast_off_handler(&dev->fast_off_timer); @@ -523,29 +520,29 @@ i420ex_init(const device_t *info) } const device_t i420ex_device = { - .name = "Intel 82420EX", + .name = "Intel 82420EX", .internal_name = "i420ex", - .flags = DEVICE_PCI, - .local = 0x00, - .init = i420ex_init, - .close = i420ex_close, - .reset = i420ex_reset, + .flags = DEVICE_PCI, + .local = 0x00, + .init = i420ex_init, + .close = i420ex_close, + .reset = i420ex_reset, { .available = NULL }, .speed_changed = i420ex_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i420ex_ide_device = { - .name = "Intel 82420EX (With IDE)", + .name = "Intel 82420EX (With IDE)", .internal_name = "i420ex_ide", - .flags = DEVICE_PCI, - .local = 0x01, - .init = i420ex_init, - .close = i420ex_close, - .reset = i420ex_reset, + .flags = DEVICE_PCI, + .local = 0x01, + .init = i420ex_init, + .close = i420ex_close, + .reset = i420ex_reset, { .available = NULL }, .speed_changed = i420ex_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/intel_4x0.c b/src/chipset/intel_4x0.c index 49b8f3fc2..5ed236935 100644 --- a/src/chipset/intel_4x0.c +++ b/src/chipset/intel_4x0.c @@ -31,9 +31,7 @@ #include <86box/machine.h> #include <86box/agpgart.h> - -enum -{ +enum { INTEL_420TX, INTEL_420ZX, INTEL_430LX, @@ -52,160 +50,152 @@ enum typedef struct { - uint8_t pm2_cntrl, - smram_locked, max_drb, - drb_unit, drb_default; - uint8_t regs[256], regs_locked[256]; - uint8_t mem_state[256]; - int type; - smram_t *smram_low, *smram_high; + uint8_t pm2_cntrl, + smram_locked, max_drb, + drb_unit, drb_default; + uint8_t regs[256], regs_locked[256]; + uint8_t mem_state[256]; + int type; + smram_t *smram_low, *smram_high; agpgart_t *agpgart; - void (*write_drbs)(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit); + void (*write_drbs)(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit); } i4x0_t; - #ifdef ENABLE_I4X0_LOG int i4x0_do_log = ENABLE_I4X0_LOG; - static void i4x0_log(const char *fmt, ...) { va_list ap; if (i4x0_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define i4x0_log(fmt, ...) +# define i4x0_log(fmt, ...) #endif - static void i4x0_map(i4x0_t *dev, uint32_t addr, uint32_t size, int state) { - uint32_t base = addr >> 12; - int states[4] = { MEM_READ_EXTANY | MEM_WRITE_EXTANY, MEM_READ_INTERNAL | MEM_WRITE_EXTANY, - MEM_READ_EXTANY | MEM_WRITE_INTERNAL, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL }; + uint32_t base = addr >> 12; + int states[4] = { MEM_READ_EXTANY | MEM_WRITE_EXTANY, MEM_READ_INTERNAL | MEM_WRITE_EXTANY, + MEM_READ_EXTANY | MEM_WRITE_INTERNAL, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL }; state &= 3; if (dev->mem_state[base] != state) { - mem_set_mem_state_both(addr, size, states[state]); - dev->mem_state[base] = state; - flushmmucache_nopc(); + mem_set_mem_state_both(addr, size, states[state]); + dev->mem_state[base] = state; + flushmmucache_nopc(); } } - static void i4x0_smram_handler_phase0(i4x0_t *dev) { uint32_t tom = (mem_size << 10); - if (((dev->type == INTEL_430TX) || (dev->type >= INTEL_440BX)) && - smram_enabled(dev->smram_high)) { - tom -= (1 << 20); - mem_set_mem_state_smm(tom, (1 << 20), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + if (((dev->type == INTEL_430TX) || (dev->type >= INTEL_440BX)) && smram_enabled(dev->smram_high)) { + tom -= (1 << 20); + mem_set_mem_state_smm(tom, (1 << 20), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); } /* Disable any active mappings. */ smram_disable_all(); } - static void i4x0_smram_handler_phase1(i4x0_t *dev) { - uint8_t *regs = (uint8_t *) dev->regs; - uint32_t tom = (mem_size << 10); - uint8_t *reg = (dev->type >= INTEL_430LX) ? &(regs[0x72]) : &(regs[0x57]); + uint8_t *regs = (uint8_t *) dev->regs; + uint32_t tom = (mem_size << 10); + uint8_t *reg = (dev->type >= INTEL_430LX) ? &(regs[0x72]) : &(regs[0x57]); uint8_t *ext_reg = (dev->type >= INTEL_440BX) ? &(regs[0x73]) : &(regs[0x71]); uint32_t s, base[2] = { 0x000a0000, 0x00000000 }; uint32_t size[2] = { 0x00010000, 0x00000000 }; if ((dev->type <= INTEL_420ZX) || (dev->type >= INTEL_430FX)) { - /* Set temporary bases and sizes. */ - if (((dev->type == INTEL_430TX) || (dev->type >= INTEL_440BX)) && - (*ext_reg & 0x80)) { - base[0] = 0x100a0000; - size[0] = 0x00060000; - } else if (((dev->type == INTEL_440LX) || (dev->type == INTEL_440EX)) && ((*reg & 0x07) == 0x04)) { - base[0] = 0x000c0000; - size[0] = 0x00010000; - } else { - base[0] = 0x000a0000; - size[0] = 0x00020000; - } + /* Set temporary bases and sizes. */ + if (((dev->type == INTEL_430TX) || (dev->type >= INTEL_440BX)) && (*ext_reg & 0x80)) { + base[0] = 0x100a0000; + size[0] = 0x00060000; + } else if (((dev->type == INTEL_440LX) || (dev->type == INTEL_440EX)) && ((*reg & 0x07) == 0x04)) { + base[0] = 0x000c0000; + size[0] = 0x00010000; + } else { + base[0] = 0x000a0000; + size[0] = 0x00020000; + } - if (*reg & 0x08) - smram_enable(dev->smram_low, base[0], base[0] & 0x000f0000, size[0], - ((*reg & 0x78) == 0x48), (*reg & 0x08)); + if (*reg & 0x08) + smram_enable(dev->smram_low, base[0], base[0] & 0x000f0000, size[0], + ((*reg & 0x78) == 0x48), (*reg & 0x08)); - if ((*reg & 0x28) == 0x28) { - /* If SMRAM is enabled and DCLS is set, then data goes to PCI, but - code still goes to DRAM. */ - mem_set_mem_state_smram_ex(1, base[0], size[0], 0x02); - } + if ((*reg & 0x28) == 0x28) { + /* If SMRAM is enabled and DCLS is set, then data goes to PCI, but + code still goes to DRAM. */ + mem_set_mem_state_smram_ex(1, base[0], size[0], 0x02); + } - /* TSEG mapping. */ - if ((dev->type == INTEL_430TX) || (dev->type >= INTEL_440BX)) { - if ((*reg & 0x08) && (*ext_reg & 0x01)) { - size[1] = (1 << (17 + ((*ext_reg >> 1) & 0x03))); - tom -= size[1]; - base[1] = tom; - } else - base[1] = size[1] = 0x00000000; + /* TSEG mapping. */ + if ((dev->type == INTEL_430TX) || (dev->type >= INTEL_440BX)) { + if ((*reg & 0x08) && (*ext_reg & 0x01)) { + size[1] = (1 << (17 + ((*ext_reg >> 1) & 0x03))); + tom -= size[1]; + base[1] = tom; + } else + base[1] = size[1] = 0x00000000; - if (size[1] != 0x00000000) { - smram_enable(dev->smram_high, base[1] + (1 << 28), base[1], size[1], - 0, 1); + if (size[1] != 0x00000000) { + smram_enable(dev->smram_high, base[1] + (1 << 28), base[1], size[1], + 0, 1); - mem_set_mem_state_smm(base[1], size[1], MEM_READ_EXTANY | MEM_WRITE_EXTANY); - } - } + mem_set_mem_state_smm(base[1], size[1], MEM_READ_EXTANY | MEM_WRITE_EXTANY); + } + } } else { - size[0] = 0x00010000; - switch (*reg & 0x03) { - case 0: - default: - base[0] = (mem_size << 10) - size[0]; - s = 1; - break; - case 1: - base[0] = size[0] = 0x00000000; - s = 1; - break; - case 2: - base[0] = 0x000a0000; - s = 0; - break; - case 3: - base[0] = 0x000b0000; - s = 0; - break; - } + size[0] = 0x00010000; + switch (*reg & 0x03) { + case 0: + default: + base[0] = (mem_size << 10) - size[0]; + s = 1; + break; + case 1: + base[0] = size[0] = 0x00000000; + s = 1; + break; + case 2: + base[0] = 0x000a0000; + s = 0; + break; + case 3: + base[0] = 0x000b0000; + s = 0; + break; + } - if (size[0] != 0x00000000) { - smram_enable(dev->smram_low, base[0], base[0], size[0], - (((*reg & 0x38) == 0x20) || s), 1); + if (size[0] != 0x00000000) { + smram_enable(dev->smram_low, base[0], base[0], size[0], + (((*reg & 0x38) == 0x20) || s), 1); - if (*reg & 0x10) { - /* If SMRAM is enabled and DCLS is set, then data goes to PCI, but - code still goes to DRAM. */ - mem_set_mem_state_smram_ex(1, base[0], size[0], 0x02); - } - } + if (*reg & 0x10) { + /* If SMRAM is enabled and DCLS is set, then data goes to PCI, but + code still goes to DRAM. */ + mem_set_mem_state_smram_ex(1, base[0], size[0], 0x02); + } + } } flushmmucache(); } - static void i4x0_mask_bar(uint8_t *regs, void *agpgart) { @@ -218,17 +208,16 @@ i4x0_mask_bar(uint8_t *regs, void *agpgart) regs[0x13] = (bar >> 24) & 0xff; if (!agpgart) - return; + return; /* Map aperture and GART. */ agpgart_set_aperture(agpgart, - bar, - ((uint32_t) (uint8_t) (~regs[0xb4] & 0x3f) + 1) << 22, - !!(regs[0x51] & 0x02)); + bar, + ((uint32_t) (uint8_t) (~regs[0xb4] & 0x3f) + 1) << 22, + !!(regs[0x51] & 0x02)); agpgart_set_gart(agpgart, (regs[0xb9] << 8) | (regs[0xba] << 16) | (regs[0xbb] << 24)); } - static uint8_t pm2_cntrl_read(uint16_t addr, void *p) { @@ -237,7 +226,6 @@ pm2_cntrl_read(uint16_t addr, void *p) return dev->pm2_cntrl & 0x01; } - static void pm2_cntrl_write(uint16_t addr, uint8_t val, void *p) { @@ -246,1055 +234,1216 @@ pm2_cntrl_write(uint16_t addr, uint8_t val, void *p) dev->pm2_cntrl = val & 0x01; } - static void i4x0_write(int func, int addr, uint8_t val, void *priv) { - i4x0_t *dev = (i4x0_t *) priv; - uint8_t *regs = (uint8_t *) dev->regs; + i4x0_t *dev = (i4x0_t *) priv; + uint8_t *regs = (uint8_t *) dev->regs; uint8_t *regs_l = (uint8_t *) dev->regs_locked; - int i; + int i; if (func > 0) - return; + return; - if (func == 0) switch (addr) { - case 0x04: /*Command register*/ - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: case INTEL_430LX: case INTEL_430NX: - case INTEL_440BX: case INTEL_440GX: case INTEL_440ZX: - default: - regs[0x04] = (regs[0x04] & ~0x42) | (val & 0x42); - break; - case INTEL_430FX: case INTEL_430HX: case INTEL_430VX: case INTEL_430TX: - case INTEL_440FX: - regs[0x04] = (regs[0x04] & ~0x02) | (val & 0x02); - break; - case INTEL_440LX: case INTEL_440EX: - regs[0x04] = val & 0x40; - break; - } - break; - case 0x05: - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: case INTEL_430LX: case INTEL_430NX: - case INTEL_430HX: case INTEL_440FX: case INTEL_440BX: case INTEL_440GX: - case INTEL_440ZX: - regs[0x05] = (regs[0x05] & ~0x01) | (val & 0x01); - break; - case INTEL_440LX: case INTEL_440EX: - regs[0x05] = val & 0x01; - break; - } - break; - case 0x07: - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: case INTEL_430LX: case INTEL_430NX: - case INTEL_430HX: - default: - regs[0x07] &= ~(val & 0x70); - break; - case INTEL_430FX: case INTEL_430VX: - case INTEL_430TX: - regs[0x07] &= ~(val & 0x30); - break; - case INTEL_440FX: - regs[0x07] &= ~(val & 0xf9); - break; - case INTEL_440LX: case INTEL_440EX: - regs[0x07] &= ~(val & 0xf1); - break; - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0x07] &= ~(val & 0xf0); - break; - } - break; - case 0x0d: - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: case INTEL_430LX: case INTEL_430NX: - regs[0x0d] = (val & 0xf0); - break; - default: - regs[0x0d] = (val & 0xf8); - break; - } - break; - case 0x0f: - switch (dev->type) { - case INTEL_430FX: case INTEL_430HX: case INTEL_430VX: case INTEL_430TX: - regs[0x0f] = (val & 0x40); - break; - } - break; - case 0x12: - switch (dev->type) { - case INTEL_440LX: case INTEL_440EX: - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0x12] = (val & 0xc0); - i4x0_mask_bar(regs, dev->agpgart); - break; - } - break; - case 0x13: - switch (dev->type) { - case INTEL_440LX: case INTEL_440EX: - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0x13] = val; - i4x0_mask_bar(regs, dev->agpgart); - break; - } - break; - case 0x2c: case 0x2d: case 0x2e: case 0x2f: - switch (dev->type) { - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - if (!regs_l[addr]) { - regs[addr] = val; - regs_l[addr] = 1; - } - break; - } - break; + if (func == 0) + switch (addr) { + case 0x04: /*Command register*/ + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + case INTEL_430NX: + case INTEL_440BX: + case INTEL_440GX: + case INTEL_440ZX: + default: + regs[0x04] = (regs[0x04] & ~0x42) | (val & 0x42); + break; + case INTEL_430FX: + case INTEL_430HX: + case INTEL_430VX: + case INTEL_430TX: + case INTEL_440FX: + regs[0x04] = (regs[0x04] & ~0x02) | (val & 0x02); + break; + case INTEL_440LX: + case INTEL_440EX: + regs[0x04] = val & 0x40; + break; + } + break; + case 0x05: + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + case INTEL_430NX: + case INTEL_430HX: + case INTEL_440FX: + case INTEL_440BX: + case INTEL_440GX: + case INTEL_440ZX: + regs[0x05] = (regs[0x05] & ~0x01) | (val & 0x01); + break; + case INTEL_440LX: + case INTEL_440EX: + regs[0x05] = val & 0x01; + break; + } + break; + case 0x07: + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + case INTEL_430NX: + case INTEL_430HX: + default: + regs[0x07] &= ~(val & 0x70); + break; + case INTEL_430FX: + case INTEL_430VX: + case INTEL_430TX: + regs[0x07] &= ~(val & 0x30); + break; + case INTEL_440FX: + regs[0x07] &= ~(val & 0xf9); + break; + case INTEL_440LX: + case INTEL_440EX: + regs[0x07] &= ~(val & 0xf1); + break; + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0x07] &= ~(val & 0xf0); + break; + } + break; + case 0x0d: + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + case INTEL_430NX: + regs[0x0d] = (val & 0xf0); + break; + default: + regs[0x0d] = (val & 0xf8); + break; + } + break; + case 0x0f: + switch (dev->type) { + case INTEL_430FX: + case INTEL_430HX: + case INTEL_430VX: + case INTEL_430TX: + regs[0x0f] = (val & 0x40); + break; + } + break; + case 0x12: + switch (dev->type) { + case INTEL_440LX: + case INTEL_440EX: + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0x12] = (val & 0xc0); + i4x0_mask_bar(regs, dev->agpgart); + break; + } + break; + case 0x13: + switch (dev->type) { + case INTEL_440LX: + case INTEL_440EX: + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0x13] = val; + i4x0_mask_bar(regs, dev->agpgart); + break; + } + break; + case 0x2c: + case 0x2d: + case 0x2e: + case 0x2f: + switch (dev->type) { + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + if (!regs_l[addr]) { + regs[addr] = val; + regs_l[addr] = 1; + } + break; + } + break; - case 0x4f: - switch (dev->type) { - case INTEL_430HX: - regs[0x4f] = (val & 0x84); - break; - case INTEL_430VX: - regs[0x4f] = (val & 0x94); - break; - case INTEL_430TX: - regs[0x4f] = (val & 0x80); - break; - } - break; - case 0x50: - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: - case INTEL_430LX: default: - regs[0x50] = (val & 0xe5); - break; - case INTEL_430NX: - regs[0x50] = (val & 0xe7); - break; - case INTEL_430FX: - regs[0x50] = (val & 0xef); - break; - case INTEL_430HX: - regs[0x50] = (val & 0xf7); - break; - case INTEL_430VX: case INTEL_430TX: - regs[0x50] = (val & 0x08); - break; - case INTEL_440FX: - regs[0x50] = (val & 0xf4); - break; - case INTEL_440LX: - regs[0x50] = (val & 0x70); - break; - case INTEL_440EX: - regs[0x50] = (val & 0x20); - break; - case INTEL_440BX: - regs[0x50] = (regs[0x50] & 0x14) | (val & 0xeb); - break; - case INTEL_440GX: - regs[0x50] = (regs[0x50] & 0x04) | (val & 0xe8); - break; - case INTEL_440ZX: - regs[0x50] = (regs[0x50] & 0x34) | (val & 0xcb); - break; + case 0x4f: + switch (dev->type) { + case INTEL_430HX: + regs[0x4f] = (val & 0x84); + break; + case INTEL_430VX: + regs[0x4f] = (val & 0x94); + break; + case INTEL_430TX: + regs[0x4f] = (val & 0x80); + break; + } + break; + case 0x50: + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + default: + regs[0x50] = (val & 0xe5); + break; + case INTEL_430NX: + regs[0x50] = (val & 0xe7); + break; + case INTEL_430FX: + regs[0x50] = (val & 0xef); + break; + case INTEL_430HX: + regs[0x50] = (val & 0xf7); + break; + case INTEL_430VX: + case INTEL_430TX: + regs[0x50] = (val & 0x08); + break; + case INTEL_440FX: + regs[0x50] = (val & 0xf4); + break; + case INTEL_440LX: + regs[0x50] = (val & 0x70); + break; + case INTEL_440EX: + regs[0x50] = (val & 0x20); + break; + case INTEL_440BX: + regs[0x50] = (regs[0x50] & 0x14) | (val & 0xeb); + break; + case INTEL_440GX: + regs[0x50] = (regs[0x50] & 0x04) | (val & 0xe8); + break; + case INTEL_440ZX: + regs[0x50] = (regs[0x50] & 0x34) | (val & 0xcb); + break; + } + break; + case 0x51: + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + case INTEL_430NX: + regs[0x51] = (val & 0xc0); + break; + case INTEL_440FX: + regs[0x51] = (val & 0xc3); + break; + case INTEL_440LX: + regs[0x51] = (regs[0x51] & 0x40) | (val & 0x87); + i4x0_mask_bar(regs, dev->agpgart); + break; + case INTEL_440EX: + regs[0x51] = (val & 0x86); + i4x0_mask_bar(regs, dev->agpgart); + break; + case INTEL_440BX: + case INTEL_440ZX: + regs[0x51] = (regs[0x51] & 0x70) | (val & 0x8f); + i4x0_mask_bar(regs, dev->agpgart); + break; + case INTEL_440GX: + regs[0x51] = (regs[0x51] & 0xb0) | (val & 0x4f); + i4x0_mask_bar(regs, dev->agpgart); + break; + } + break; + case 0x52: /* Cache Control Register */ + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + case INTEL_430FX: + case INTEL_430VX: + case INTEL_430TX: + default: + regs[0x52] = (val & 0xfb); + break; + case INTEL_430NX: + case INTEL_430HX: + case INTEL_440FX: + regs[0x52] = val; + break; + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0x52] = val & 0x07; + break; + } + break; + case 0x53: + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + regs[0x53] = val & 0x0b; + break; + case INTEL_430NX: + regs[0x53] = val & 0x0a; + break; + case INTEL_430VX: + case INTEL_430TX: + regs[0x53] = val & 0x3f; + break; + case INTEL_440LX: + case INTEL_440EX: + regs[0x53] = val & 0x60; + break; + case INTEL_440BX: + case INTEL_440GX: + /* Not applicable to 440ZX as that does not support ECC. */ + regs[0x53] = val; + break; + } + break; + case 0x54: + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + case INTEL_430NX: + regs[0x54] = val & 0x07; + break; + case INTEL_430VX: + regs[0x54] = val & 0xd8; + break; + case INTEL_430TX: + regs[0x54] = val & 0xfa; + break; + case INTEL_440FX: + regs[0x54] = val & 0x82; + break; + } + break; + case 0x55: + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + /* According to the FreeBSD 3.x source code, the 420TX/ZX chipset has + this register. The mask is unknown, so write all bits. */ + regs[0x55] = val; + break; + case INTEL_430VX: + case INTEL_430TX: + regs[0x55] = val & 0x01; + break; + case INTEL_440FX: + case INTEL_440LX: + case INTEL_440EX: + regs[0x55] = val; + break; + } + break; + case 0x56: + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + /* According to the FreeBSD 3.x source code, the 420TX/ZX chipset has + this register. The mask is unknown, so write all bits. */ + regs[0x56] = val; + break; + case INTEL_430HX: + regs[0x56] = val & 0x1f; + break; + case INTEL_430VX: + regs[0x56] = val & 0x77; + break; + case INTEL_430TX: + regs[0x56] = val & 0x76; + break; + case INTEL_440FX: + case INTEL_440LX: + case INTEL_440EX: + regs[0x56] = val; + break; + } + break; + case 0x57: + switch (dev->type) { + /* On the 420TX and 420ZX, this is the SMRAM space register. */ + case INTEL_420TX: + case INTEL_420ZX: + i4x0_smram_handler_phase0(dev); + if (dev->smram_locked) + regs[0x57] = (regs[0x57] & 0xdf) | (val & 0x20); + else { + regs[0x57] = (regs[0x57] & 0x87) | (val & 0x78); + dev->smram_locked = (val & 0x10); + if (dev->smram_locked) + regs[0x57] &= 0xbf; + } + i4x0_smram_handler_phase1(dev); + break; + case INTEL_430LX: + default: + regs[0x57] = val & 0x3f; + break; + case INTEL_430NX: + regs[0x57] = val; + break; + case INTEL_430FX: + case INTEL_430HX: + case INTEL_430VX: + regs[0x57] = val & 0xcf; + break; + case INTEL_430TX: + regs[0x57] = val & 0xdf; + break; + case INTEL_440FX: + regs[0x57] = val & 0x77; + break; + case INTEL_440LX: + case INTEL_440EX: + regs[0x57] = val & 0x37; + break; + case INTEL_440BX: + case INTEL_440GX: + regs[0x57] = val & 0x3f; + break; + case INTEL_440ZX: + regs[0x57] = val & 0x2f; + break; + } + break; + case 0x58: + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + default: + regs[0x58] = val & 0x01; + break; + case INTEL_430NX: + case INTEL_440BX: + case INTEL_440ZX: + regs[0x58] = val & 0x03; + break; + case INTEL_430FX: + case INTEL_440FX: + regs[0x58] = val & 0x7f; + break; + case INTEL_430HX: + case INTEL_430VX: + case INTEL_440LX: + case INTEL_440EX: + regs[0x58] = val; + break; + case INTEL_430TX: + regs[0x58] = val & 0x7b; + break; + } + break; + case 0x59: /* PAM0 */ + if (dev->type <= INTEL_430NX) { + if ((regs[0x59] ^ val) & 0x0f) + i4x0_map(dev, 0x80000, 0x20000, val & 0x0f); + } + if ((regs[0x59] ^ val) & 0xf0) { + i4x0_map(dev, 0xf0000, 0x10000, val >> 4); + shadowbios = (val & 0x10); + } + if (dev->type > INTEL_430NX) + regs[0x59] = val & 0x70; + else + regs[0x59] = val & 0x77; + break; + case 0x5a: /* PAM1 */ + if ((regs[0x5a] ^ val) & 0x0f) + i4x0_map(dev, 0xc0000, 0x04000, val & 0xf); + if ((regs[0x5a] ^ val) & 0xf0) + i4x0_map(dev, 0xc4000, 0x04000, val >> 4); + regs[0x5a] = val & 0x77; + break; + case 0x5b: /*PAM2 */ + if ((regs[0x5b] ^ val) & 0x0f) + i4x0_map(dev, 0xc8000, 0x04000, val & 0xf); + if ((regs[0x5b] ^ val) & 0xf0) + i4x0_map(dev, 0xcc000, 0x04000, val >> 4); + regs[0x5b] = val & 0x77; + break; + case 0x5c: /*PAM3 */ + if ((regs[0x5c] ^ val) & 0x0f) + i4x0_map(dev, 0xd0000, 0x04000, val & 0xf); + if ((regs[0x5c] ^ val) & 0xf0) + i4x0_map(dev, 0xd4000, 0x04000, val >> 4); + regs[0x5c] = val & 0x77; + break; + case 0x5d: /* PAM4 */ + if ((regs[0x5d] ^ val) & 0x0f) + i4x0_map(dev, 0xd8000, 0x04000, val & 0xf); + if ((regs[0x5d] ^ val) & 0xf0) + i4x0_map(dev, 0xdc000, 0x04000, val >> 4); + regs[0x5d] = val & 0x77; + break; + case 0x5e: /* PAM5 */ + if ((regs[0x5e] ^ val) & 0x0f) + i4x0_map(dev, 0xe0000, 0x04000, val & 0xf); + if ((regs[0x5e] ^ val) & 0xf0) + i4x0_map(dev, 0xe4000, 0x04000, val >> 4); + regs[0x5e] = val & 0x77; + break; + case 0x5f: /* PAM6 */ + if ((regs[0x5f] ^ val) & 0x0f) + i4x0_map(dev, 0xe8000, 0x04000, val & 0xf); + if ((regs[0x5f] ^ val) & 0xf0) + i4x0_map(dev, 0xec000, 0x04000, val >> 4); + regs[0x5f] = val & 0x77; + break; + case 0x60: + case 0x61: + case 0x62: + case 0x63: + case 0x64: + if ((addr & 0x7) <= dev->max_drb) { + dev->write_drbs(regs, 0x60, 0x60 + dev->max_drb, dev->drb_unit); + break; + } + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + case INTEL_430NX: + case INTEL_430HX: + case INTEL_440FX: + case INTEL_440LX: + case INTEL_440EX: + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + default: + regs[addr] = val; + break; + case INTEL_430FX: + case INTEL_430VX: + regs[addr] = val & 0x3f; + break; + case INTEL_430TX: + regs[addr] = val & 0x7f; + break; + } + break; + case 0x65: + if ((addr & 0x7) <= dev->max_drb) { + dev->write_drbs(regs, 0x60, 0x60 + dev->max_drb, dev->drb_unit); + break; + } + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + case INTEL_430NX: + case INTEL_430HX: + case INTEL_440FX: + case INTEL_440LX: + case INTEL_440EX: + case INTEL_440GX: + case INTEL_440BX: + case INTEL_440ZX: + regs[addr] = val; + break; + case INTEL_430VX: + regs[addr] = val & 0x3f; + break; + case INTEL_430TX: + regs[addr] = val & 0x7f; + break; + } + break; + case 0x66: + if ((addr & 0x7) <= dev->max_drb) { + dev->write_drbs(regs, 0x60, 0x60 + dev->max_drb, dev->drb_unit); + break; + } + switch (dev->type) { + case INTEL_430NX: + case INTEL_430HX: + case INTEL_440FX: + case INTEL_440LX: + case INTEL_440EX: + case INTEL_440GX: + case INTEL_440BX: + case INTEL_440ZX: + regs[addr] = val; + break; + } + break; + case 0x67: + if ((addr & 0x7) <= dev->max_drb) { + dev->write_drbs(regs, 0x60, 0x60 + dev->max_drb, dev->drb_unit); + break; + } + switch (dev->type) { + case INTEL_430NX: + case INTEL_430HX: + case INTEL_440FX: + case INTEL_440LX: + case INTEL_440EX: + case INTEL_440BX: + case INTEL_440GX: + case INTEL_440ZX: + regs[addr] = val; + break; + case INTEL_430VX: + regs[addr] = val & 0x11; + break; + case INTEL_430TX: + regs[addr] = val & 0xb7; + break; + } + break; + case 0x68: + if (dev->type == INTEL_430NX) { + dev->write_drbs(regs, 0x60, 0x60 + dev->max_drb, dev->drb_unit); + break; + } + switch (dev->type) { + case INTEL_430HX: + case INTEL_430VX: + case INTEL_430TX: + regs[0x68] = val; + break; + case INTEL_430FX: + regs[0x68] = val & 0x1f; + break; + case INTEL_440FX: + case INTEL_440LX: + case INTEL_440EX: + case INTEL_440GX: + regs[0x68] = val & 0xc0; + break; + case INTEL_440BX: + regs[0x68] = (regs[0x68] & 0x38) | (val & 0xc7); + break; + case INTEL_440ZX: + regs[0x68] = (regs[0x68] & 0x3f) | (val & 0xc0); + break; + } + break; + case 0x69: + if (dev->type == INTEL_430NX) { + dev->write_drbs(regs, 0x60, 0x60 + dev->max_drb, dev->drb_unit); + break; + } + switch (dev->type) { + case INTEL_440BX: + case INTEL_440GX: + regs[0x69] = val; + break; + case INTEL_430VX: + regs[0x69] = val & 0x07; + break; + case INTEL_440ZX: + regs[0x69] = val & 0x3f; + break; + } + break; + case 0x6a: + case 0x6b: + if (dev->type == INTEL_430NX) { + dev->write_drbs(regs, 0x60, 0x60 + dev->max_drb, dev->drb_unit); + break; + } + switch (dev->type) { + case INTEL_440BX: + case INTEL_440GX: + regs[addr] = val; + break; + case INTEL_440LX: + case INTEL_440EX: + if (addr == 0x6a) + regs[addr] = val & 0xef; + break; + case INTEL_440ZX: + if (addr == 0x6a) + regs[addr] = val & 0xfc; + else + regs[addr] = val & 0x33; + break; + } + break; + case 0x6c: + case 0x6d: + case 0x6e: + switch (dev->type) { + case INTEL_440LX: + case INTEL_440EX: + case INTEL_440BX: + case INTEL_440GX: + if (addr != 0x6e) + regs[addr] = val; + break; + case INTEL_440ZX: + if (addr == 0x6c) + regs[addr] = val & 0x03; + else if (addr == 0x6d) + regs[addr] = val & 0xcf; + break; + } + break; + case 0x6f: + switch (dev->type) { + case INTEL_440LX: + regs[addr] = val; + break; + case INTEL_440EX: + regs[addr] = val & 0xcf; + break; + } + break; + case 0x70: + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + regs[addr] = val & 0xc7; + break; + case INTEL_430NX: + regs[addr] = val; + break; + case INTEL_430VX: + case INTEL_430TX: + regs[addr] = val & 0xfc; + break; + case INTEL_440FX: + case INTEL_440LX: + case INTEL_440EX: + regs[addr] = val & 0xf8; + break; + } + break; + case 0x71: + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + regs[addr] = val & 0x4d; + break; + case INTEL_430TX: + if (!dev->smram_locked) { + i4x0_smram_handler_phase0(dev); + regs[0x71] = (regs[0x71] & 0x20) | (val & 0xdf); + i4x0_smram_handler_phase1(dev); + } + break; + case INTEL_440EX: + regs[addr] = val; + break; + case INTEL_440FX: + case INTEL_440LX: + regs[addr] = val & 0x1f; + break; + } + break; + case 0x72: /* SMRAM */ + if (dev->type <= INTEL_420ZX) + break; - } - break; - case 0x51: - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: case INTEL_430LX: case INTEL_430NX: - regs[0x51] = (val & 0xc0); - break; - case INTEL_440FX: - regs[0x51] = (val & 0xc3); - break; - case INTEL_440LX: - regs[0x51] = (regs[0x51] & 0x40) | (val & 0x87); - i4x0_mask_bar(regs, dev->agpgart); - break; - case INTEL_440EX: - regs[0x51] = (val & 0x86); - i4x0_mask_bar(regs, dev->agpgart); - break; - case INTEL_440BX: case INTEL_440ZX: - regs[0x51] = (regs[0x51] & 0x70) | (val & 0x8f); - i4x0_mask_bar(regs, dev->agpgart); - break; - case INTEL_440GX: - regs[0x51] = (regs[0x51] & 0xb0) | (val & 0x4f); - i4x0_mask_bar(regs, dev->agpgart); - break; - } - break; - case 0x52: /* Cache Control Register */ - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: - case INTEL_430LX: case INTEL_430FX: - case INTEL_430VX: case INTEL_430TX: - default: - regs[0x52] = (val & 0xfb); - break; - case INTEL_430NX: case INTEL_430HX: - case INTEL_440FX: - regs[0x52] = val; - break; - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0x52] = val & 0x07; - break; - } - break; - case 0x53: - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: - case INTEL_430LX: - regs[0x53] = val & 0x0b; - break; - case INTEL_430NX: - regs[0x53] = val & 0x0a; - break; - case INTEL_430VX: case INTEL_430TX: - regs[0x53] = val & 0x3f; - break; - case INTEL_440LX: case INTEL_440EX: - regs[0x53] = val & 0x60; - break; - case INTEL_440BX: case INTEL_440GX: - /* Not applicable to 440ZX as that does not support ECC. */ - regs[0x53] = val; - break; - } - break; - case 0x54: - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: - case INTEL_430LX: case INTEL_430NX: - regs[0x54] = val & 0x07; - break; - case INTEL_430VX: - regs[0x54] = val & 0xd8; - break; - case INTEL_430TX: - regs[0x54] = val & 0xfa; - break; - case INTEL_440FX: - regs[0x54] = val & 0x82; - break; - } - break; - case 0x55: - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: - /* According to the FreeBSD 3.x source code, the 420TX/ZX chipset has - this register. The mask is unknown, so write all bits. */ - regs[0x55] = val; - break; - case INTEL_430VX: case INTEL_430TX: - regs[0x55] = val & 0x01; - break; - case INTEL_440FX: case INTEL_440LX: - case INTEL_440EX: - regs[0x55] = val; - break; - } - break; - case 0x56: - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: - /* According to the FreeBSD 3.x source code, the 420TX/ZX chipset has - this register. The mask is unknown, so write all bits. */ - regs[0x56] = val; - break; - case INTEL_430HX: - regs[0x56] = val & 0x1f; - break; - case INTEL_430VX: - regs[0x56] = val & 0x77; - break; - case INTEL_430TX: - regs[0x56] = val & 0x76; - break; - case INTEL_440FX: - case INTEL_440LX: case INTEL_440EX: - regs[0x56] = val; - break; - } - break; - case 0x57: - switch (dev->type) { - /* On the 420TX and 420ZX, this is the SMRAM space register. */ - case INTEL_420TX: case INTEL_420ZX: - i4x0_smram_handler_phase0(dev); - if (dev->smram_locked) - regs[0x57] = (regs[0x57] & 0xdf) | (val & 0x20); - else { - regs[0x57] = (regs[0x57] & 0x87) | (val & 0x78); - dev->smram_locked = (val & 0x10); - if (dev->smram_locked) - regs[0x57] &= 0xbf; - } - i4x0_smram_handler_phase1(dev); - break; - case INTEL_430LX: default: - regs[0x57] = val & 0x3f; - break; - case INTEL_430NX: - regs[0x57] = val; - break; - case INTEL_430FX: case INTEL_430HX: - case INTEL_430VX: - regs[0x57] = val & 0xcf; - break; - case INTEL_430TX: - regs[0x57] = val & 0xdf; - break; - case INTEL_440FX: - regs[0x57] = val & 0x77; - break; - case INTEL_440LX: case INTEL_440EX: - regs[0x57] = val & 0x37; - break; - case INTEL_440BX: case INTEL_440GX: - regs[0x57] = val & 0x3f; - break; - case INTEL_440ZX: - regs[0x57] = val & 0x2f; - break; - } - break; - case 0x58: - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: - case INTEL_430LX: default: - regs[0x58] = val & 0x01; - break; - case INTEL_430NX: - case INTEL_440BX: case INTEL_440ZX: - regs[0x58] = val & 0x03; - break; - case INTEL_430FX: case INTEL_440FX: - regs[0x58] = val & 0x7f; - break; - case INTEL_430HX: case INTEL_430VX: - case INTEL_440LX: case INTEL_440EX: - regs[0x58] = val; - break; - case INTEL_430TX: - regs[0x58] = val & 0x7b; - break; - } - break; - case 0x59: /* PAM0 */ - if (dev->type <= INTEL_430NX) { - if ((regs[0x59] ^ val) & 0x0f) - i4x0_map(dev, 0x80000, 0x20000, val & 0x0f); - } - if ((regs[0x59] ^ val) & 0xf0) { - i4x0_map(dev, 0xf0000, 0x10000, val >> 4); - shadowbios = (val & 0x10); - } - if (dev->type > INTEL_430NX) - regs[0x59] = val & 0x70; - else - regs[0x59] = val & 0x77; - break; - case 0x5a: /* PAM1 */ - if ((regs[0x5a] ^ val) & 0x0f) - i4x0_map(dev, 0xc0000, 0x04000, val & 0xf); - if ((regs[0x5a] ^ val) & 0xf0) - i4x0_map(dev, 0xc4000, 0x04000, val >> 4); - regs[0x5a] = val & 0x77; - break; - case 0x5b: /*PAM2 */ - if ((regs[0x5b] ^ val) & 0x0f) - i4x0_map(dev, 0xc8000, 0x04000, val & 0xf); - if ((regs[0x5b] ^ val) & 0xf0) - i4x0_map(dev, 0xcc000, 0x04000, val >> 4); - regs[0x5b] = val & 0x77; - break; - case 0x5c: /*PAM3 */ - if ((regs[0x5c] ^ val) & 0x0f) - i4x0_map(dev, 0xd0000, 0x04000, val & 0xf); - if ((regs[0x5c] ^ val) & 0xf0) - i4x0_map(dev, 0xd4000, 0x04000, val >> 4); - regs[0x5c] = val & 0x77; - break; - case 0x5d: /* PAM4 */ - if ((regs[0x5d] ^ val) & 0x0f) - i4x0_map(dev, 0xd8000, 0x04000, val & 0xf); - if ((regs[0x5d] ^ val) & 0xf0) - i4x0_map(dev, 0xdc000, 0x04000, val >> 4); - regs[0x5d] = val & 0x77; - break; - case 0x5e: /* PAM5 */ - if ((regs[0x5e] ^ val) & 0x0f) - i4x0_map(dev, 0xe0000, 0x04000, val & 0xf); - if ((regs[0x5e] ^ val) & 0xf0) - i4x0_map(dev, 0xe4000, 0x04000, val >> 4); - regs[0x5e] = val & 0x77; - break; - case 0x5f: /* PAM6 */ - if ((regs[0x5f] ^ val) & 0x0f) - i4x0_map(dev, 0xe8000, 0x04000, val & 0xf); - if ((regs[0x5f] ^ val) & 0xf0) - i4x0_map(dev, 0xec000, 0x04000, val >> 4); - regs[0x5f] = val & 0x77; - break; - case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: - if ((addr & 0x7) <= dev->max_drb) { - dev->write_drbs(regs, 0x60, 0x60 + dev->max_drb, dev->drb_unit); - break; - } - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: - case INTEL_430LX: case INTEL_430NX: - case INTEL_430HX: - case INTEL_440FX: - case INTEL_440LX: case INTEL_440EX: - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - default: - regs[addr] = val; - break; - case INTEL_430FX: case INTEL_430VX: - regs[addr] = val & 0x3f; - break; - case INTEL_430TX: - regs[addr] = val & 0x7f; - break; - } - break; - case 0x65: - if ((addr & 0x7) <= dev->max_drb) { - dev->write_drbs(regs, 0x60, 0x60 + dev->max_drb, dev->drb_unit); - break; - } - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: - case INTEL_430LX: case INTEL_430NX: - case INTEL_430HX: - case INTEL_440FX: - case INTEL_440LX: case INTEL_440EX: - case INTEL_440GX: - case INTEL_440BX: case INTEL_440ZX: - regs[addr] = val; - break; - case INTEL_430VX: - regs[addr] = val & 0x3f; - break; - case INTEL_430TX: - regs[addr] = val & 0x7f; - break; - } - break; - case 0x66: - if ((addr & 0x7) <= dev->max_drb) { - dev->write_drbs(regs, 0x60, 0x60 + dev->max_drb, dev->drb_unit); - break; - } - switch (dev->type) { - case INTEL_430NX: case INTEL_430HX: - case INTEL_440FX: case INTEL_440LX: - case INTEL_440EX: case INTEL_440GX: - case INTEL_440BX: case INTEL_440ZX: - regs[addr] = val; - break; - } - break; - case 0x67: - if ((addr & 0x7) <= dev->max_drb) { - dev->write_drbs(regs, 0x60, 0x60 + dev->max_drb, dev->drb_unit); - break; - } - switch (dev->type) { - case INTEL_430NX: case INTEL_430HX: - case INTEL_440FX: - case INTEL_440LX: case INTEL_440EX: - case INTEL_440BX: case INTEL_440GX: - case INTEL_440ZX: - regs[addr] = val; - break; - case INTEL_430VX: - regs[addr] = val & 0x11; - break; - case INTEL_430TX: - regs[addr] = val & 0xb7; - break; - } - break; - case 0x68: - if (dev->type == INTEL_430NX) { - dev->write_drbs(regs, 0x60, 0x60 + dev->max_drb, dev->drb_unit); - break; - } - switch (dev->type) { - case INTEL_430HX: - case INTEL_430VX: case INTEL_430TX: - regs[0x68] = val; - break; - case INTEL_430FX: - regs[0x68] = val & 0x1f; - break; - case INTEL_440FX: - case INTEL_440LX: case INTEL_440EX: - case INTEL_440GX: - regs[0x68] = val & 0xc0; - break; - case INTEL_440BX: - regs[0x68] = (regs[0x68] & 0x38) | (val & 0xc7); - break; - case INTEL_440ZX: - regs[0x68] = (regs[0x68] & 0x3f) | (val & 0xc0); - break; - } - break; - case 0x69: - if (dev->type == INTEL_430NX) { - dev->write_drbs(regs, 0x60, 0x60 + dev->max_drb, dev->drb_unit); - break; - } - switch (dev->type) { - case INTEL_440BX: case INTEL_440GX: - regs[0x69] = val; - break; - case INTEL_430VX: - regs[0x69] = val & 0x07; - break; - case INTEL_440ZX: - regs[0x69] = val & 0x3f; - break; - } - break; - case 0x6a: case 0x6b: - if (dev->type == INTEL_430NX) { - dev->write_drbs(regs, 0x60, 0x60 + dev->max_drb, dev->drb_unit); - break; - } - switch (dev->type) { - case INTEL_440BX: case INTEL_440GX: - regs[addr] = val; - break; - case INTEL_440LX: case INTEL_440EX: - if (addr == 0x6a) - regs[addr] = val & 0xef; - break; - case INTEL_440ZX: - if (addr == 0x6a) - regs[addr] = val & 0xfc; - else - regs[addr] = val & 0x33; - break; - } - break; - case 0x6c: case 0x6d: case 0x6e: - switch (dev->type) { - case INTEL_440LX: case INTEL_440EX: - case INTEL_440BX: case INTEL_440GX: - if (addr != 0x6e) - regs[addr] = val; - break; - case INTEL_440ZX: - if (addr == 0x6c) - regs[addr] = val & 0x03; - else if (addr == 0x6d) - regs[addr] = val & 0xcf; - break; - } - break; - case 0x6f: - switch (dev->type) { - case INTEL_440LX: - regs[addr] = val; - break; - case INTEL_440EX: - regs[addr] = val & 0xcf; - break; - } - break; - case 0x70: - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: - case INTEL_430LX: - regs[addr] = val & 0xc7; - break; - case INTEL_430NX: - regs[addr] = val; - break; - case INTEL_430VX: case INTEL_430TX: - regs[addr] = val & 0xfc; - break; - case INTEL_440FX: - case INTEL_440LX: case INTEL_440EX: - regs[addr] = val & 0xf8; - break; - } - break; - case 0x71: - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: - case INTEL_430LX: - regs[addr] = val & 0x4d; - break; - case INTEL_430TX: - if (!dev->smram_locked) { - i4x0_smram_handler_phase0(dev); - regs[0x71] = (regs[0x71] & 0x20) | (val & 0xdf); - i4x0_smram_handler_phase1(dev); - } - break; - case INTEL_440EX: - regs[addr] = val; - break; - case INTEL_440FX: case INTEL_440LX: - regs[addr] = val & 0x1f; - break; - } - break; - case 0x72: /* SMRAM */ - if (dev->type <= INTEL_420ZX) - break; + i4x0_smram_handler_phase0(dev); + if (dev->type >= INTEL_430FX) { + if (dev->smram_locked) + regs[0x72] = (regs[0x72] & 0xdf) | (val & 0x20); + else { + if ((dev->type == INTEL_440LX) || (dev->type == INTEL_440EX) || (dev->type == INTEL_440GX)) + regs[0x72] = (val & 0x7f); + else + regs[0x72] = (regs[0x72] & 0x87) | (val & 0x78); + dev->smram_locked = (val & 0x10); + if (dev->smram_locked) + regs[0x72] &= 0xbf; + } + } else { + if (dev->smram_locked) + regs[0x72] = (regs[0x72] & 0xef) | (val & 0x10); + else { + regs[0x72] = (regs[0x72] & 0xc0) | (val & 0x3f); + dev->smram_locked = (val & 0x08); + if (dev->smram_locked) + regs[0x72] &= 0xdf; + } + } + i4x0_smram_handler_phase1(dev); + break; + case 0x73: + switch (dev->type) { + case INTEL_430VX: + regs[0x73] = val & 0x03; + break; + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + if (!dev->smram_locked) { + i4x0_smram_handler_phase0(dev); + regs[0x73] = (regs[0x73] & 0x38) | (val & 0xc7); + i4x0_smram_handler_phase1(dev); + } + break; + } + break; + case 0x74: + switch (dev->type) { + case INTEL_430VX: + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0x74] = val; + break; + } + break; + case 0x75: + case 0x76: + case 0x7b: + switch (dev->type) { + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[addr] = val; + } + break; + case 0x77: + switch (dev->type) { + case INTEL_440BX: + case INTEL_440ZX: + regs[0x77] = val & 0x03; + } + break; + case 0x78: + switch (dev->type) { + case INTEL_430VX: + regs[0x78] = val & 0xcf; + break; + case INTEL_440BX: + case INTEL_440ZX: + regs[0x78] = val & 0x0f; + break; + case INTEL_440GX: + regs[0x78] = val & 0x1f; + break; + } + break; + case 0x79: + switch (dev->type) { + case INTEL_430TX: + regs[0x79] = val & 0x74; + io_removehandler(0x0022, 0x01, pm2_cntrl_read, NULL, NULL, pm2_cntrl_write, NULL, NULL, dev); + if (val & 0x40) + io_sethandler(0x0022, 0x01, pm2_cntrl_read, NULL, NULL, pm2_cntrl_write, NULL, NULL, dev); + break; + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0x79] = val; + break; + } + break; + case 0x7a: + switch (dev->type) { + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0x7a] = (regs[0x7a] & 0x0a) | (val & 0xf5); + io_removehandler(0x0022, 0x01, pm2_cntrl_read, NULL, NULL, pm2_cntrl_write, NULL, NULL, dev); + if (val & 0x40) + io_sethandler(0x0022, 0x01, pm2_cntrl_read, NULL, NULL, pm2_cntrl_write, NULL, NULL, dev); + break; + } + break; + case 0x7c: + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + case INTEL_430NX: + regs[0x7c] = val & 0x8f; + break; + case INTEL_440BX: + case INTEL_440GX: + case INTEL_440ZX: + regs[0x7c] = val & 0x1f; + break; + } + break; + case 0x7d: + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + case INTEL_430NX: + regs[0x7d] = val & 0x32; + break; + } + break; + case 0x7e: + case 0x7f: + switch (dev->type) { + case INTEL_420TX: + case INTEL_420ZX: + case INTEL_430LX: + case INTEL_430NX: + regs[addr] = val; + break; + } + break; + case 0x80: + switch (dev->type) { + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0x80] &= ~(val & 0x03); + break; + } + break; + case 0x90: + switch (dev->type) { + case INTEL_430HX: + regs[0x90] = val & 0x87; + break; + case INTEL_440FX: + regs[0x90] = val & 0x1b; + break; + case INTEL_440LX: + regs[0x90] = val & 0xfb; + break; + case INTEL_440EX: + regs[0x90] = val & 0xf8; + break; + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0x90] = val; + break; + } + break; + case 0x91: + switch (dev->type) { + case INTEL_430HX: + case INTEL_440BX: + case INTEL_440FX: + case INTEL_440LX: + case INTEL_440GX: + /* Not applicable on 82443EX and 82443ZX. */ + regs[0x91] &= ~(val & 0x11); + break; + } + break; + case 0x92: + switch (dev->type) { + case INTEL_440LX: + case INTEL_440EX: + regs[0x92] &= ~(val & 0x07); + break; + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0x92] &= ~(val & 0x1f); + break; + } + break; + case 0x93: + switch (dev->type) { + case INTEL_440FX: + regs[0x93] = (val & 0x0f); + trc_write(0x0093, val & 0x06, NULL); + break; + case INTEL_440LX: + case INTEL_440EX: + regs[0x93] = (val & 0x0e); + trc_write(0x0093, val & 0x06, NULL); + break; + } + break; + case 0xa7: + switch (dev->type) { + case INTEL_440LX: + case INTEL_440EX: + regs[0xa7] = val & 0x1f; + break; + } + break; + case 0xa8: + case 0xa9: + switch (dev->type) { + case INTEL_440LX: + case INTEL_440EX: + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[addr] = (val & 0x03); + break; + } + break; + case 0xb0: + switch (dev->type) { + case INTEL_440LX: + case INTEL_440EX: + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0xb0] = (val & 0x80); + break; + } + break; + case 0xb1: + switch (dev->type) { + case INTEL_440LX: + case INTEL_440EX: + regs[0xb1] = (val & 0x22); + break; + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0xb1] = (val & 0xa0); + break; + } + break; + case 0xb4: + switch (dev->type) { + case INTEL_440LX: + case INTEL_440EX: + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0xb4] = (val & 0x3f); + i4x0_mask_bar(regs, dev->agpgart); + break; + } + break; + case 0xb9: + switch (dev->type) { + case INTEL_440LX: + case INTEL_440EX: + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0xb9] = (val & 0xf0); + i4x0_mask_bar(regs, dev->agpgart); + break; + } + break; - i4x0_smram_handler_phase0(dev); - if (dev->type >= INTEL_430FX) { - if (dev->smram_locked) - regs[0x72] = (regs[0x72] & 0xdf) | (val & 0x20); - else { - if ((dev->type == INTEL_440LX) || (dev->type == INTEL_440EX) || - (dev->type == INTEL_440GX)) - regs[0x72] = (val & 0x7f); - else - regs[0x72] = (regs[0x72] & 0x87) | (val & 0x78); - dev->smram_locked = (val & 0x10); - if (dev->smram_locked) - regs[0x72] &= 0xbf; - } - } else { - if (dev->smram_locked) - regs[0x72] = (regs[0x72] & 0xef) | (val & 0x10); - else { - regs[0x72] = (regs[0x72] & 0xc0) | (val & 0x3f); - dev->smram_locked = (val & 0x08); - if (dev->smram_locked) - regs[0x72] &= 0xdf; - } - } - i4x0_smram_handler_phase1(dev); - break; - case 0x73: - switch (dev->type) { - case INTEL_430VX: - regs[0x73] = val & 0x03; - break; - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - if (!dev->smram_locked) { - i4x0_smram_handler_phase0(dev); - regs[0x73] = (regs[0x73] & 0x38) | (val & 0xc7); - i4x0_smram_handler_phase1(dev); - } - break; - } - break; - case 0x74: - switch (dev->type) { - case INTEL_430VX: - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0x74] = val; - break; - } - break; - case 0x75: case 0x76: - case 0x7b: - switch (dev->type) { - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[addr] = val; - } - break; - case 0x77: - switch (dev->type) { - case INTEL_440BX: case INTEL_440ZX: - regs[0x77] = val & 0x03; - } - break; - case 0x78: - switch (dev->type) { - case INTEL_430VX: - regs[0x78] = val & 0xcf; - break; - case INTEL_440BX: case INTEL_440ZX: - regs[0x78] = val & 0x0f; - break; - case INTEL_440GX: - regs[0x78] = val & 0x1f; - break; - } - break; - case 0x79: - switch (dev->type) { - case INTEL_430TX: - regs[0x79] = val & 0x74; - io_removehandler(0x0022, 0x01, pm2_cntrl_read, NULL, NULL, pm2_cntrl_write, NULL, NULL, dev); - if (val & 0x40) - io_sethandler(0x0022, 0x01, pm2_cntrl_read, NULL, NULL, pm2_cntrl_write, NULL, NULL, dev); - break; - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0x79] = val; - break; - } - break; - case 0x7a: - switch (dev->type) { - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0x7a] = (regs[0x7a] & 0x0a) | (val & 0xf5); - io_removehandler(0x0022, 0x01, pm2_cntrl_read, NULL, NULL, pm2_cntrl_write, NULL, NULL, dev); - if (val & 0x40) - io_sethandler(0x0022, 0x01, pm2_cntrl_read, NULL, NULL, pm2_cntrl_write, NULL, NULL, dev); - break; - } - break; - case 0x7c: - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: - case INTEL_430LX: case INTEL_430NX: - regs[0x7c] = val & 0x8f; - break; - case INTEL_440BX: case INTEL_440GX: - case INTEL_440ZX: - regs[0x7c] = val & 0x1f; - break; - } - break; - case 0x7d: - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: - case INTEL_430LX: case INTEL_430NX: - regs[0x7d] = val & 0x32; - break; - } - break; - case 0x7e: case 0x7f: - switch (dev->type) { - case INTEL_420TX: case INTEL_420ZX: - case INTEL_430LX: case INTEL_430NX: - regs[addr] = val; - break; - } - break; - case 0x80: - switch (dev->type) { - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0x80] &= ~(val & 0x03); - break; - } - break; - case 0x90: - switch (dev->type) { - case INTEL_430HX: - regs[0x90] = val & 0x87; - break; - case INTEL_440FX: - regs[0x90] = val & 0x1b; - break; - case INTEL_440LX: - regs[0x90] = val & 0xfb; - break; - case INTEL_440EX: - regs[0x90] = val & 0xf8; - break; - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0x90] = val; - break; - } - break; - case 0x91: - switch (dev->type) { - case INTEL_430HX: case INTEL_440BX: - case INTEL_440FX: case INTEL_440LX: - case INTEL_440GX: - /* Not applicable on 82443EX and 82443ZX. */ - regs[0x91] &= ~(val & 0x11); - break; - } - break; - case 0x92: - switch (dev->type) { - case INTEL_440LX: case INTEL_440EX: - regs[0x92] &= ~(val & 0x07); - break; - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0x92] &= ~(val & 0x1f); - break; - } - break; - case 0x93: - switch (dev->type) { - case INTEL_440FX: - regs[0x93] = (val & 0x0f); - trc_write(0x0093, val & 0x06, NULL); - break; - case INTEL_440LX: case INTEL_440EX: - regs[0x93] = (val & 0x0e); - trc_write(0x0093, val & 0x06, NULL); - break; - } - break; - case 0xa7: - switch (dev->type) { - case INTEL_440LX: case INTEL_440EX: - regs[0xa7] = val & 0x1f; - break; - } - break; - case 0xa8: case 0xa9: - switch (dev->type) { - case INTEL_440LX: case INTEL_440EX: - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[addr] = (val & 0x03); - break; - } - break; - case 0xb0: - switch (dev->type) { - case INTEL_440LX: case INTEL_440EX: - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0xb0] = (val & 0x80); - break; - } - break; - case 0xb1: - switch (dev->type) { - case INTEL_440LX: case INTEL_440EX: - regs[0xb1] = (val & 0x22); - break; - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0xb1] = (val & 0xa0); - break; - } - break; - case 0xb4: - switch (dev->type) { - case INTEL_440LX: case INTEL_440EX: - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0xb4] = (val & 0x3f); - i4x0_mask_bar(regs, dev->agpgart); - break; - } - break; - case 0xb9: - switch (dev->type) { - case INTEL_440LX: case INTEL_440EX: - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0xb9] = (val & 0xf0); - i4x0_mask_bar(regs, dev->agpgart); - break; - } - break; + case 0xba: + case 0xbb: + switch (dev->type) { + case INTEL_440LX: + case INTEL_440EX: + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[addr] = val; + i4x0_mask_bar(regs, dev->agpgart); + break; + } + break; - case 0xba: case 0xbb: - switch (dev->type) { - case INTEL_440LX: case INTEL_440EX: - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[addr] = val; - i4x0_mask_bar(regs, dev->agpgart); - break; - } - break; + case 0xbc: + switch (dev->type) { + case INTEL_440LX: + case INTEL_440EX: + regs[addr] = (val & 0xf8); + break; + } + break; - case 0xbc: - switch (dev->type) { - case INTEL_440LX: case INTEL_440EX: - regs[addr] = (val & 0xf8); - break; - } - break; + case 0xbd: + switch (dev->type) { + case INTEL_440LX: + case INTEL_440EX: + regs[addr] = (val & 0xf8); + break; + } + break; - case 0xbd: - switch (dev->type) { - case INTEL_440LX: case INTEL_440EX: - regs[addr] = (val & 0xf8); - break; - } - break; - - case 0xd0: case 0xd1: case 0xd2: case 0xd3: - case 0xd4: case 0xd5: case 0xd6: case 0xd7: - switch (dev->type) { - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[addr] = val; - break; - } - break; - case 0xca: - switch (dev->type) { - case INTEL_440BX: case INTEL_440GX: - regs[addr] = val; - break; - case INTEL_440ZX: - regs[addr] = val & 0xe7; - break; - } - break; - case 0xcb: - switch (dev->type) { - case INTEL_440BX: case INTEL_440GX: - regs[addr] = val; - break; - case INTEL_440ZX: - regs[addr] = val & 0xa7; - break; - } - break; - case 0xcc: - switch (dev->type) { - case INTEL_440BX: case INTEL_440GX: - regs[0xcc] = (val & 0x7f); - break; - case INTEL_440ZX: - regs[0xcc] = (val & 0x58); - break; - } - break; - case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: - case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: - switch (dev->type) { - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - if (!regs_l[addr]) - regs[addr] = val; - break; - } - break; - case 0xe5: case 0xed: - switch (dev->type) { - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - if (!regs_l[addr]) - regs[addr] = (val & 0x3f); - break; - } - break; - case 0xe7: - switch (dev->type) { - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0xe7] = 0x80; - for (i = 0; i < 16; i++) - regs_l[0xe0 + i] = !!(val & 0x80); - if (!regs_l[0xe7]) { - regs[0xe7] |= (val & 0x7f); - } - break; - } - break; - case 0xf0: - switch (dev->type) { - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0xf0] = (val & 0xc0); - break; - } - break; - case 0xf1: - switch (dev->type) { - case INTEL_440BX: case INTEL_440ZX: - case INTEL_440GX: - regs[0xf1] = (val & 0x03); - break; - } - break; - } + case 0xd0: + case 0xd1: + case 0xd2: + case 0xd3: + case 0xd4: + case 0xd5: + case 0xd6: + case 0xd7: + switch (dev->type) { + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[addr] = val; + break; + } + break; + case 0xca: + switch (dev->type) { + case INTEL_440BX: + case INTEL_440GX: + regs[addr] = val; + break; + case INTEL_440ZX: + regs[addr] = val & 0xe7; + break; + } + break; + case 0xcb: + switch (dev->type) { + case INTEL_440BX: + case INTEL_440GX: + regs[addr] = val; + break; + case INTEL_440ZX: + regs[addr] = val & 0xa7; + break; + } + break; + case 0xcc: + switch (dev->type) { + case INTEL_440BX: + case INTEL_440GX: + regs[0xcc] = (val & 0x7f); + break; + case INTEL_440ZX: + regs[0xcc] = (val & 0x58); + break; + } + break; + case 0xe0: + case 0xe1: + case 0xe2: + case 0xe3: + case 0xe4: + case 0xe8: + case 0xe9: + case 0xea: + case 0xeb: + case 0xec: + switch (dev->type) { + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + if (!regs_l[addr]) + regs[addr] = val; + break; + } + break; + case 0xe5: + case 0xed: + switch (dev->type) { + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + if (!regs_l[addr]) + regs[addr] = (val & 0x3f); + break; + } + break; + case 0xe7: + switch (dev->type) { + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0xe7] = 0x80; + for (i = 0; i < 16; i++) + regs_l[0xe0 + i] = !!(val & 0x80); + if (!regs_l[0xe7]) { + regs[0xe7] |= (val & 0x7f); + } + break; + } + break; + case 0xf0: + switch (dev->type) { + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0xf0] = (val & 0xc0); + break; + } + break; + case 0xf1: + switch (dev->type) { + case INTEL_440BX: + case INTEL_440ZX: + case INTEL_440GX: + regs[0xf1] = (val & 0x03); + break; + } + break; + } } - static uint8_t i4x0_read(int func, int addr, void *priv) { - i4x0_t *dev = (i4x0_t *) priv; - uint8_t ret = 0xff; + i4x0_t *dev = (i4x0_t *) priv; + uint8_t ret = 0xff; uint8_t *regs = (uint8_t *) dev->regs; if (func == 0) { - ret = regs[addr]; - /* Special behavior for 440FX register 0x93 which is basically TRC in PCI space - with the addition of bits 3 and 0. */ - if ((func == 0) && (addr == 0x93) && - ((dev->type == INTEL_440FX) || (dev->type == INTEL_440LX) || - (dev->type == INTEL_440EX))) - ret = (ret & 0xf9) | (trc_read(0x0093, NULL) & 0x06); + ret = regs[addr]; + /* Special behavior for 440FX register 0x93 which is basically TRC in PCI space + with the addition of bits 3 and 0. */ + if ((func == 0) && (addr == 0x93) && ((dev->type == INTEL_440FX) || (dev->type == INTEL_440LX) || (dev->type == INTEL_440EX))) + ret = (ret & 0xf9) | (trc_read(0x0093, NULL) & 0x06); } return ret; } - static void i4x0_reset(void *priv) { - i4x0_t *dev = (i4x0_t *)priv; - int i; + i4x0_t *dev = (i4x0_t *) priv; + int i; - if ((dev->type == INTEL_440LX) || (dev->type == INTEL_440BX) || - (dev->type == INTEL_440ZX)) - memset(dev->regs_locked, 0x00, 256 * sizeof(uint8_t)); + if ((dev->type == INTEL_440LX) || (dev->type == INTEL_440BX) || (dev->type == INTEL_440ZX)) + memset(dev->regs_locked, 0x00, 256 * sizeof(uint8_t)); if (dev->type >= INTEL_430FX) - i4x0_write(0, 0x59, 0x00, priv); + i4x0_write(0, 0x59, 0x00, priv); else - i4x0_write(0, 0x59, 0x0f, priv); + i4x0_write(0, 0x59, 0x0f, priv); for (i = 0; i < 6; i++) - i4x0_write(0, 0x5a + i, 0x00, priv); + i4x0_write(0, 0x5a + i, 0x00, priv); for (i = 0; i <= dev->max_drb; i++) - i4x0_write(0, 0x60 + i, dev->drb_default, priv); + i4x0_write(0, 0x60 + i, dev->drb_default, priv); if (dev->type >= INTEL_430FX) { - dev->regs[0x72] &= 0xef; /* Forcibly unlock the SMRAM register. */ - i4x0_write(0, 0x72, 0x02, priv); + dev->regs[0x72] &= 0xef; /* Forcibly unlock the SMRAM register. */ + i4x0_write(0, 0x72, 0x02, priv); } else if (dev->type >= INTEL_430LX) { - dev->regs[0x72] &= 0xf7; /* Forcibly unlock the SMRAM register. */ - i4x0_write(0, 0x72, 0x00, priv); + dev->regs[0x72] &= 0xf7; /* Forcibly unlock the SMRAM register. */ + i4x0_write(0, 0x72, 0x00, priv); } else { - dev->regs[0x57] &= 0xef; /* Forcibly unlock the SMRAM register. */ - i4x0_write(0, 0x57, 0x02, priv); + dev->regs[0x57] &= 0xef; /* Forcibly unlock the SMRAM register. */ + i4x0_write(0, 0x57, 0x02, priv); } if ((dev->type == INTEL_430TX) || (dev->type >= INTEL_440BX)) { - i4x0_write(0, (dev->type >= INTEL_440BX) ? 0x73 : 0x71, - (dev->type >= INTEL_440BX) ? 0x38 : 0x00, priv); + i4x0_write(0, (dev->type >= INTEL_440BX) ? 0x73 : 0x71, + (dev->type >= INTEL_440BX) ? 0x38 : 0x00, priv); } } - static void i4x0_close(void *p) { - i4x0_t *dev = (i4x0_t *)p; + i4x0_t *dev = (i4x0_t *) p; smram_del(dev->smram_high); smram_del(dev->smram_low); @@ -1302,303 +1451,318 @@ i4x0_close(void *p) free(dev); } - static void -*i4x0_init(const device_t *info) + * + i4x0_init(const device_t *info) { - i4x0_t *dev = (i4x0_t *) malloc(sizeof(i4x0_t)); + i4x0_t *dev = (i4x0_t *) malloc(sizeof(i4x0_t)); uint8_t *regs; memset(dev, 0, sizeof(i4x0_t)); - dev->smram_low = smram_add(); + dev->smram_low = smram_add(); dev->smram_high = smram_add(); dev->type = info->local & 0xff; regs = (uint8_t *) dev->regs; - regs[0x00] = 0x86; regs[0x01] = 0x80; /*Intel*/ + regs[0x00] = 0x86; + regs[0x01] = 0x80; /*Intel*/ dev->write_drbs = spd_write_drbs; switch (dev->type) { - case INTEL_420TX: - case INTEL_420ZX: - regs[0x02] = 0x83; regs[0x03] = 0x04; /* 82424TX/ZX */ - regs[0x06] = 0x40; - regs[0x08] = (dev->type == INTEL_420ZX) ? 0x01 : 0x00; - regs[0x0d] = 0x20; - /* According to information from FreeBSD 3.x source code: - 0x00 = 486DX, 0x20 = 486SX, 0x40 = 486DX2 or 486DX4, 0x80 = Pentium OverDrive. */ - if (!(hasfpu) && (cpu_multi == 1)) - regs[0x50] = 0x20; - else if (!(hasfpu) && (cpu_multi == 2)) - regs[0x50] = 0x60; /* Guess based on the SX, DX, and DX2 values. */ - else if (hasfpu && (cpu_multi == 1)) - regs[0x50] = 0x00; - else if (hasfpu && (cpu_multi >= 2) && !(cpu_s->cpu_type == CPU_P24T)) - regs[0x50] = 0x40; - else - regs[0x50] = 0x80; /* Pentium OverDrive. */ - /* According to information from FreeBSD 3.x source code: - 00 = 25 MHz, 01 = 33 MHz. */ - if (cpu_busspeed > 25000000) - regs[0x50] |= 0x01; - regs[0x51] = 0x80; - /* According to information from FreeBSD 3.x source code: - 0x00 = None, 0x01 = 64 kB, 0x41 = 128 kB, 0x81 = 256 kB, 0xc1 = 512 kB, - If bit 0 is set, then if bit 2 is also set, the cache is write back, - otherwise it's write through. */ - regs[0x52] = 0xc3; /* 512 kB writeback cache */ - regs[0x57] = 0x31; - regs[0x59] = 0x0f; - regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = 0x02; - dev->max_drb = 3; - dev->drb_unit = 4; - dev->drb_default = 0x02; - break; - case INTEL_430LX: - regs[0x02] = 0xa3; regs[0x03] = 0x04; /* 82434LX/NX */ - regs[0x06] = 0x40; - regs[0x08] = 0x03; - regs[0x0d] = 0x20; - regs[0x50] = 0x82; - if (cpu_busspeed <= 60000000) - regs[0x50] |= 0x00; - else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) - regs[0x50] |= 0x01; - regs[0x51] = 0x80; - regs[0x52] = 0xea; /* 512 kB burst cache, set to 0xaa for 256 kB */ - regs[0x59] = 0x0f; - regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = 0x02; - dev->max_drb = 5; - dev->drb_unit = 1; - dev->drb_default = 0x02; - break; - case INTEL_430NX: - regs[0x02] = 0xa3; regs[0x03] = 0x04; /* 82434LX/NX */ - regs[0x06] = 0x40; - regs[0x08] = 0x11; - regs[0x0d] = 0x20; - regs[0x50] = 0x80; - if (cpu_busspeed <= 50000000) - regs[0x50] |= 0x01; - else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000)) - regs[0x50] |= 0x02; - else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) - regs[0x50] |= 0x03; - regs[0x51] = 0x80; - regs[0x52] = 0xea; /* 512 kB burst cache, set to 0xaa for 256 kB */ - regs[0x57] = 0x31; - regs[0x59] = 0x0f; - regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = regs[0x66] = regs[0x67] = 0x02; - dev->max_drb = 7; - dev->drb_unit = 1; - dev->drb_default = 0x02; - dev->write_drbs = spd_write_drbs_with_ext; - break; - case INTEL_430FX: - regs[0x02] = 0x2d; regs[0x03] = 0x12; /* SB82437FX-66 */ - regs[0x08] = (info->local >> 8) & 0xff; - regs[0x52] = 0xb2; /* 512 kB PLB cache, set to 0x42 for 256 kB */ - if (cpu_busspeed <= 50000000) - regs[0x57] |= 0x01; - else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000)) - regs[0x57] |= 0x02; - else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) - regs[0x57] |= 0x03; - regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = 0x02; - regs[0x72] = 0x02; - dev->max_drb = 4; - dev->drb_unit = 4; - dev->drb_default = 0x02; - break; - case INTEL_430HX: - regs[0x02] = 0x50; regs[0x03] = 0x12; /* 82439HX */ - regs[0x52] = 0xb2; /* 512 kB PLB cache, set to 0x42 for 256 kB */ - if (cpu_busspeed <= 50000000) - regs[0x57] |= 0x01; - else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000)) - regs[0x57] |= 0x02; - else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) - regs[0x57] |= 0x03; - regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = regs[0x66] = regs[0x67] = 0x02; - regs[0x72] = 0x02; - dev->max_drb = 7; - dev->drb_unit = 4; - dev->drb_default = 0x02; - break; - case INTEL_430VX: - regs[0x02] = 0x30; regs[0x03] = 0x70; /* 82437VX */ - regs[0x52] = 0xb2; /* 512 kB PLB cache, set to 0x42 for 256 kB */ - regs[0x53] = 0x14; - regs[0x56] = 0x52; - if (cpu_busspeed <= 50000000) - regs[0x57] |= 0x01; - else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000)) - regs[0x57] |= 0x02; - else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) - regs[0x57] |= 0x03; - regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = 0x02; - regs[0x67] = 0x11; - regs[0x69] = 0x03; - regs[0x70] = 0x20; - regs[0x72] = 0x02; - regs[0x74] = 0x0e; - regs[0x78] = 0x23; - dev->max_drb = 4; - dev->drb_unit = 4; - dev->drb_default = 0x02; - break; - case INTEL_430TX: - regs[0x02] = 0x00; regs[0x03] = 0x71; /* 82439TX */ - regs[0x08] = 0x01; - regs[0x52] = 0xb2; /* 512 kB PLB cache, set to 0x42 for 256 kB */ - regs[0x53] = 0x14; - regs[0x56] = 0x52; - regs[0x57] = 0x01; - regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = 0x02; - if (cpu_busspeed <= 60000000) - regs[0x67] |= 0x00; - else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) - regs[0x67] |= 0x80; - regs[0x70] = 0x20; - regs[0x72] = 0x02; - dev->max_drb = 5; - dev->drb_unit = 4; - dev->drb_default = 0x02; - break; - case INTEL_440FX: - regs[0x02] = 0x37; regs[0x03] = 0x12; /* 82441FX */ - regs[0x08] = 0x02; - if (cpu_busspeed <= 60000000) - regs[0x51] |= 0x01; - else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) - regs[0x51] |= 0x02; - regs[0x53] = 0x80; - regs[0x57] = 0x01; - regs[0x58] = 0x10; - regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = regs[0x66] = regs[0x67] = 0x02; - regs[0x71] = 0x10; - regs[0x72] = 0x02; - dev->max_drb = 7; - dev->drb_unit = 8; - dev->drb_default = 0x02; - break; - case INTEL_440LX: - regs[0x02] = 0x80; regs[0x03] = 0x71; /* 82443LX */ - regs[0x08] = 0x03; - regs[0x06] = 0x90; - regs[0x10] = 0x08; - regs[0x34] = 0xa0; - if (cpu_busspeed <= 60000000) - regs[0x51] |= 0x40; - else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) - regs[0x51] |= 0x00; - regs[0x53] = 0x83; - regs[0x57] = 0x01; - regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = regs[0x66] = regs[0x67] = 0x01; - regs[0x6c] = regs[0x6d] = regs[0x6e] = regs[0x6f] = 0x55; - regs[0x72] = 0x02; - regs[0xa0] = 0x02; - regs[0xa2] = 0x10; - regs[0xa4] = 0x03; - regs[0xa5] = 0x02; - regs[0xa7] = 0x1f; - dev->max_drb = 7; - dev->drb_unit = 8; - dev->drb_default = 0x01; - break; - case INTEL_440EX: - regs[0x02] = 0x80; regs[0x03] = 0x71; /* 82443EX. Same Vendor ID as 440LX */ - regs[0x08] = 0x03; - regs[0x06] = 0x90; - regs[0x10] = 0x08; - regs[0x34] = 0xa0; - regs[0x51] = 0x80; - regs[0x53] = 0x83; - regs[0x57] = 0x01; - regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = regs[0x66] = regs[0x67] = 0x01; - regs[0x6c] = regs[0x6d] = regs[0x6e] = regs[0x6f] = 0x55; - regs[0x72] = 0x02; - regs[0xa0] = 0x02; - regs[0xa2] = 0x10; - regs[0xa4] = 0x03; - regs[0xa5] = 0x02; - regs[0xa7] = 0x1f; - dev->max_drb = 7; - dev->drb_unit = 8; - dev->drb_default = 0x01; - break; - case INTEL_440BX: case INTEL_440ZX: - regs[0x7a] = (info->local >> 8) & 0xff; + case INTEL_420TX: + case INTEL_420ZX: + regs[0x02] = 0x83; + regs[0x03] = 0x04; /* 82424TX/ZX */ + regs[0x06] = 0x40; + regs[0x08] = (dev->type == INTEL_420ZX) ? 0x01 : 0x00; + regs[0x0d] = 0x20; + /* According to information from FreeBSD 3.x source code: + 0x00 = 486DX, 0x20 = 486SX, 0x40 = 486DX2 or 486DX4, 0x80 = Pentium OverDrive. */ + if (!(hasfpu) && (cpu_multi == 1)) + regs[0x50] = 0x20; + else if (!(hasfpu) && (cpu_multi == 2)) + regs[0x50] = 0x60; /* Guess based on the SX, DX, and DX2 values. */ + else if (hasfpu && (cpu_multi == 1)) + regs[0x50] = 0x00; + else if (hasfpu && (cpu_multi >= 2) && !(cpu_s->cpu_type == CPU_P24T)) + regs[0x50] = 0x40; + else + regs[0x50] = 0x80; /* Pentium OverDrive. */ + /* According to information from FreeBSD 3.x source code: + 00 = 25 MHz, 01 = 33 MHz. */ + if (cpu_busspeed > 25000000) + regs[0x50] |= 0x01; + regs[0x51] = 0x80; + /* According to information from FreeBSD 3.x source code: + 0x00 = None, 0x01 = 64 kB, 0x41 = 128 kB, 0x81 = 256 kB, 0xc1 = 512 kB, + If bit 0 is set, then if bit 2 is also set, the cache is write back, + otherwise it's write through. */ + regs[0x52] = 0xc3; /* 512 kB writeback cache */ + regs[0x57] = 0x31; + regs[0x59] = 0x0f; + regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = 0x02; + dev->max_drb = 3; + dev->drb_unit = 4; + dev->drb_default = 0x02; + break; + case INTEL_430LX: + regs[0x02] = 0xa3; + regs[0x03] = 0x04; /* 82434LX/NX */ + regs[0x06] = 0x40; + regs[0x08] = 0x03; + regs[0x0d] = 0x20; + regs[0x50] = 0x82; + if (cpu_busspeed <= 60000000) + regs[0x50] |= 0x00; + else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) + regs[0x50] |= 0x01; + regs[0x51] = 0x80; + regs[0x52] = 0xea; /* 512 kB burst cache, set to 0xaa for 256 kB */ + regs[0x59] = 0x0f; + regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = 0x02; + dev->max_drb = 5; + dev->drb_unit = 1; + dev->drb_default = 0x02; + break; + case INTEL_430NX: + regs[0x02] = 0xa3; + regs[0x03] = 0x04; /* 82434LX/NX */ + regs[0x06] = 0x40; + regs[0x08] = 0x11; + regs[0x0d] = 0x20; + regs[0x50] = 0x80; + if (cpu_busspeed <= 50000000) + regs[0x50] |= 0x01; + else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000)) + regs[0x50] |= 0x02; + else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) + regs[0x50] |= 0x03; + regs[0x51] = 0x80; + regs[0x52] = 0xea; /* 512 kB burst cache, set to 0xaa for 256 kB */ + regs[0x57] = 0x31; + regs[0x59] = 0x0f; + regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = regs[0x66] = regs[0x67] = 0x02; + dev->max_drb = 7; + dev->drb_unit = 1; + dev->drb_default = 0x02; + dev->write_drbs = spd_write_drbs_with_ext; + break; + case INTEL_430FX: + regs[0x02] = 0x2d; + regs[0x03] = 0x12; /* SB82437FX-66 */ + regs[0x08] = (info->local >> 8) & 0xff; + regs[0x52] = 0xb2; /* 512 kB PLB cache, set to 0x42 for 256 kB */ + if (cpu_busspeed <= 50000000) + regs[0x57] |= 0x01; + else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000)) + regs[0x57] |= 0x02; + else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) + regs[0x57] |= 0x03; + regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = 0x02; + regs[0x72] = 0x02; + dev->max_drb = 4; + dev->drb_unit = 4; + dev->drb_default = 0x02; + break; + case INTEL_430HX: + regs[0x02] = 0x50; + regs[0x03] = 0x12; /* 82439HX */ + regs[0x52] = 0xb2; /* 512 kB PLB cache, set to 0x42 for 256 kB */ + if (cpu_busspeed <= 50000000) + regs[0x57] |= 0x01; + else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000)) + regs[0x57] |= 0x02; + else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) + regs[0x57] |= 0x03; + regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = regs[0x66] = regs[0x67] = 0x02; + regs[0x72] = 0x02; + dev->max_drb = 7; + dev->drb_unit = 4; + dev->drb_default = 0x02; + break; + case INTEL_430VX: + regs[0x02] = 0x30; + regs[0x03] = 0x70; /* 82437VX */ + regs[0x52] = 0xb2; /* 512 kB PLB cache, set to 0x42 for 256 kB */ + regs[0x53] = 0x14; + regs[0x56] = 0x52; + if (cpu_busspeed <= 50000000) + regs[0x57] |= 0x01; + else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000)) + regs[0x57] |= 0x02; + else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) + regs[0x57] |= 0x03; + regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = 0x02; + regs[0x67] = 0x11; + regs[0x69] = 0x03; + regs[0x70] = 0x20; + regs[0x72] = 0x02; + regs[0x74] = 0x0e; + regs[0x78] = 0x23; + dev->max_drb = 4; + dev->drb_unit = 4; + dev->drb_default = 0x02; + break; + case INTEL_430TX: + regs[0x02] = 0x00; + regs[0x03] = 0x71; /* 82439TX */ + regs[0x08] = 0x01; + regs[0x52] = 0xb2; /* 512 kB PLB cache, set to 0x42 for 256 kB */ + regs[0x53] = 0x14; + regs[0x56] = 0x52; + regs[0x57] = 0x01; + regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = 0x02; + if (cpu_busspeed <= 60000000) + regs[0x67] |= 0x00; + else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) + regs[0x67] |= 0x80; + regs[0x70] = 0x20; + regs[0x72] = 0x02; + dev->max_drb = 5; + dev->drb_unit = 4; + dev->drb_default = 0x02; + break; + case INTEL_440FX: + regs[0x02] = 0x37; + regs[0x03] = 0x12; /* 82441FX */ + regs[0x08] = 0x02; + if (cpu_busspeed <= 60000000) + regs[0x51] |= 0x01; + else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) + regs[0x51] |= 0x02; + regs[0x53] = 0x80; + regs[0x57] = 0x01; + regs[0x58] = 0x10; + regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = regs[0x66] = regs[0x67] = 0x02; + regs[0x71] = 0x10; + regs[0x72] = 0x02; + dev->max_drb = 7; + dev->drb_unit = 8; + dev->drb_default = 0x02; + break; + case INTEL_440LX: + regs[0x02] = 0x80; + regs[0x03] = 0x71; /* 82443LX */ + regs[0x08] = 0x03; + regs[0x06] = 0x90; + regs[0x10] = 0x08; + regs[0x34] = 0xa0; + if (cpu_busspeed <= 60000000) + regs[0x51] |= 0x40; + else if ((cpu_busspeed > 60000000) && (cpu_busspeed <= 66666667)) + regs[0x51] |= 0x00; + regs[0x53] = 0x83; + regs[0x57] = 0x01; + regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = regs[0x66] = regs[0x67] = 0x01; + regs[0x6c] = regs[0x6d] = regs[0x6e] = regs[0x6f] = 0x55; + regs[0x72] = 0x02; + regs[0xa0] = 0x02; + regs[0xa2] = 0x10; + regs[0xa4] = 0x03; + regs[0xa5] = 0x02; + regs[0xa7] = 0x1f; + dev->max_drb = 7; + dev->drb_unit = 8; + dev->drb_default = 0x01; + break; + case INTEL_440EX: + regs[0x02] = 0x80; + regs[0x03] = 0x71; /* 82443EX. Same Vendor ID as 440LX */ + regs[0x08] = 0x03; + regs[0x06] = 0x90; + regs[0x10] = 0x08; + regs[0x34] = 0xa0; + regs[0x51] = 0x80; + regs[0x53] = 0x83; + regs[0x57] = 0x01; + regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = regs[0x66] = regs[0x67] = 0x01; + regs[0x6c] = regs[0x6d] = regs[0x6e] = regs[0x6f] = 0x55; + regs[0x72] = 0x02; + regs[0xa0] = 0x02; + regs[0xa2] = 0x10; + regs[0xa4] = 0x03; + regs[0xa5] = 0x02; + regs[0xa7] = 0x1f; + dev->max_drb = 7; + dev->drb_unit = 8; + dev->drb_default = 0x01; + break; + case INTEL_440BX: + case INTEL_440ZX: + regs[0x7a] = (info->local >> 8) & 0xff; - regs[0x02] = (regs[0x7a] & 0x02) ? 0x92 : 0x90; regs[0x03] = 0x71; /* 82443BX */ - regs[0x06] = (regs[0x7a] & 0x02) ? 0x00 : 0x10; - regs[0x08] = (regs[0x7a] & 0x02) ? 0x03 : 0x02; - regs[0x10] = 0x08; - regs[0x34] = (regs[0x7a] & 0x02) ? 0x00 : 0xa0; - if (cpu_busspeed <= 66666667) - regs[0x51] |= 0x20; - else if ((cpu_busspeed > 66666667) && (cpu_busspeed <= 100000000)) - regs[0x51] |= 0x00; - regs[0x57] = 0x28; /* 4 DIMMs, SDRAM */ - regs[0x58] = 0x03; - regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = regs[0x66] = regs[0x67] = 0x01; - regs[0x72] = 0x02; - regs[0x73] = 0x38; - regs[0x7b] = 0x38; - regs[0x90] = 0x80; - regs[0xa0] = (regs[0x7a] & 0x02) ? 0x00 : 0x02; - regs[0xa2] = (regs[0x7a] & 0x02) ? 0x00 : 0x10; - regs[0xa4] = 0x03; - regs[0xa5] = 0x02; - regs[0xa7] = 0x1f; - dev->max_drb = 7; - dev->drb_unit = 8; - dev->drb_default = 0x01; - break; - case INTEL_440GX: - regs[0x7a] = (info->local >> 8) & 0xff; + regs[0x02] = (regs[0x7a] & 0x02) ? 0x92 : 0x90; + regs[0x03] = 0x71; /* 82443BX */ + regs[0x06] = (regs[0x7a] & 0x02) ? 0x00 : 0x10; + regs[0x08] = (regs[0x7a] & 0x02) ? 0x03 : 0x02; + regs[0x10] = 0x08; + regs[0x34] = (regs[0x7a] & 0x02) ? 0x00 : 0xa0; + if (cpu_busspeed <= 66666667) + regs[0x51] |= 0x20; + else if ((cpu_busspeed > 66666667) && (cpu_busspeed <= 100000000)) + regs[0x51] |= 0x00; + regs[0x57] = 0x28; /* 4 DIMMs, SDRAM */ + regs[0x58] = 0x03; + regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = regs[0x66] = regs[0x67] = 0x01; + regs[0x72] = 0x02; + regs[0x73] = 0x38; + regs[0x7b] = 0x38; + regs[0x90] = 0x80; + regs[0xa0] = (regs[0x7a] & 0x02) ? 0x00 : 0x02; + regs[0xa2] = (regs[0x7a] & 0x02) ? 0x00 : 0x10; + regs[0xa4] = 0x03; + regs[0xa5] = 0x02; + regs[0xa7] = 0x1f; + dev->max_drb = 7; + dev->drb_unit = 8; + dev->drb_default = 0x01; + break; + case INTEL_440GX: + regs[0x7a] = (info->local >> 8) & 0xff; - regs[0x02] = (regs[0x7a] & 0x02) ? 0xa2 : 0xa0; regs[0x03] = 0x71; /* 82443GX */ - regs[0x06] = (regs[0x7a] & 0x02) ? 0x00 : 0x10; - regs[0x10] = 0x08; - regs[0x34] = (regs[0x7a] & 0x02) ? 0x00 : 0xa0; - regs[0x57] = 0x28; - regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = regs[0x66] = regs[0x67] = 0x01; - regs[0x72] = 0x02; - regs[0x73] = 0x38; - regs[0x7b] = 0x38; - regs[0x90] = 0x80; - regs[0xa0] = (regs[0x7a] & 0x02) ? 0x00 : 0x02; - regs[0xa2] = (regs[0x7a] & 0x02) ? 0x00 : 0x10; - regs[0xa4] = 0x03; - regs[0xa5] = 0x02; - regs[0xa7] = 0x1f; - dev->max_drb = 7; - dev->drb_unit = 8; - dev->drb_default = 0x01; - break; + regs[0x02] = (regs[0x7a] & 0x02) ? 0xa2 : 0xa0; + regs[0x03] = 0x71; /* 82443GX */ + regs[0x06] = (regs[0x7a] & 0x02) ? 0x00 : 0x10; + regs[0x10] = 0x08; + regs[0x34] = (regs[0x7a] & 0x02) ? 0x00 : 0xa0; + regs[0x57] = 0x28; + regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = regs[0x66] = regs[0x67] = 0x01; + regs[0x72] = 0x02; + regs[0x73] = 0x38; + regs[0x7b] = 0x38; + regs[0x90] = 0x80; + regs[0xa0] = (regs[0x7a] & 0x02) ? 0x00 : 0x02; + regs[0xa2] = (regs[0x7a] & 0x02) ? 0x00 : 0x10; + regs[0xa4] = 0x03; + regs[0xa5] = 0x02; + regs[0xa7] = 0x1f; + dev->max_drb = 7; + dev->drb_unit = 8; + dev->drb_default = 0x01; + break; } - regs[0x04] = 0x06; regs[0x07] = 0x02; + regs[0x04] = 0x06; + regs[0x07] = 0x02; regs[0x0b] = 0x06; if (dev->type >= INTEL_440FX) { - cpu_cache_ext_enabled = 1; - cpu_update_waitstates(); + cpu_cache_ext_enabled = 1; + cpu_update_waitstates(); } /* Out-of-spec PCI and AGP clocks with overclocked bus. */ if ((dev->type <= INTEL_440FX) && (cpu_busspeed >= 66666666)) - cpu_set_pci_speed(cpu_busspeed / 2); + cpu_set_pci_speed(cpu_busspeed / 2); if ((dev->type >= INTEL_440BX) && (cpu_busspeed >= 100000000)) - cpu_set_agp_speed(cpu_busspeed / 1.5); + cpu_set_agp_speed(cpu_busspeed / 1.5); else if (dev->type >= INTEL_440LX) - cpu_set_agp_speed(cpu_busspeed); + cpu_set_agp_speed(cpu_busspeed); i4x0_write(regs[0x59], 0x59, 0x00, dev); i4x0_write(regs[0x5a], 0x5a, 0x00, dev); @@ -1609,250 +1773,250 @@ static void i4x0_write(regs[0x5f], 0x5f, 0x00, dev); if (dev->type >= INTEL_430FX) - i4x0_write(0, 0x72, 0x02, dev); + i4x0_write(0, 0x72, 0x02, dev); else if (dev->type >= INTEL_430LX) - i4x0_write(0, 0x72, 0x00, dev); + i4x0_write(0, 0x72, 0x00, dev); else - i4x0_write(0, 0x57, 0x02, dev); + i4x0_write(0, 0x57, 0x02, dev); if ((dev->type == INTEL_430TX) || (dev->type >= INTEL_440BX)) { - i4x0_write(0, (dev->type >= INTEL_440BX) ? 0x73 : 0x71, - (dev->type >= INTEL_440BX) ? 0x38 : 0x00, dev); + i4x0_write(0, (dev->type >= INTEL_440BX) ? 0x73 : 0x71, + (dev->type >= INTEL_440BX) ? 0x38 : 0x00, dev); } pci_add_card(PCI_ADD_NORTHBRIDGE, i4x0_read, i4x0_write, dev); if ((dev->type >= INTEL_440BX) && !(regs[0x7a] & 0x02)) { - device_add((dev->type == INTEL_440GX) ? &i440gx_agp_device : &i440bx_agp_device); - dev->agpgart = device_add(&agpgart_device); + device_add((dev->type == INTEL_440GX) ? &i440gx_agp_device : &i440bx_agp_device); + dev->agpgart = device_add(&agpgart_device); } else if (dev->type >= INTEL_440LX) { - device_add(&i440lx_agp_device); - dev->agpgart = device_add(&agpgart_device); + device_add(&i440lx_agp_device); + dev->agpgart = device_add(&agpgart_device); } return dev; } const device_t i420tx_device = { - .name = "Intel 82424TX", + .name = "Intel 82424TX", .internal_name = "i420tx", - .flags = DEVICE_PCI, - .local = INTEL_420TX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = INTEL_420TX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i420zx_device = { - .name = "Intel 82424ZX", + .name = "Intel 82424ZX", .internal_name = "i420zx", - .flags = DEVICE_PCI, - .local = INTEL_420ZX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = INTEL_420ZX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i430lx_device = { - .name = "Intel 82434LX", + .name = "Intel 82434LX", .internal_name = "i430lx", - .flags = DEVICE_PCI, - .local = INTEL_430LX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = INTEL_430LX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i430nx_device = { - .name = "Intel 82434NX", + .name = "Intel 82434NX", .internal_name = "i430nx", - .flags = DEVICE_PCI, - .local = INTEL_430NX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = INTEL_430NX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i430fx_device = { - .name = "Intel SB82437FX-66", + .name = "Intel SB82437FX-66", .internal_name = "i430fx", - .flags = DEVICE_PCI, - .local = INTEL_430FX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = INTEL_430FX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i430fx_rev02_device = { - .name = "Intel SB82437FX-66 (Rev. 02)", + .name = "Intel SB82437FX-66 (Rev. 02)", .internal_name = "i430fx_rev02", - .flags = DEVICE_PCI, - .local = 0x0200 | INTEL_430FX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = 0x0200 | INTEL_430FX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i430hx_device = { - .name = "Intel 82439HX", + .name = "Intel 82439HX", .internal_name = "i430hx", - .flags = DEVICE_PCI, - .local = INTEL_430HX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = INTEL_430HX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i430vx_device = { - .name = "Intel 82437VX", + .name = "Intel 82437VX", .internal_name = "i430vx", - .flags = DEVICE_PCI, - .local = INTEL_430VX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = INTEL_430VX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i430tx_device = { - .name = "Intel 82439TX", + .name = "Intel 82439TX", .internal_name = "i430tx", - .flags = DEVICE_PCI, - .local = INTEL_430TX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = INTEL_430TX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i440fx_device = { - .name = "Intel 82441FX", + .name = "Intel 82441FX", .internal_name = "i440fx", - .flags = DEVICE_PCI, - .local = INTEL_440FX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = INTEL_440FX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i440lx_device = { - .name = "Intel 82443LX", + .name = "Intel 82443LX", .internal_name = "i440lx", - .flags = DEVICE_PCI, - .local = INTEL_440LX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = INTEL_440LX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i440ex_device = { - .name = "Intel 82443EX", + .name = "Intel 82443EX", .internal_name = "i440ex", - .flags = DEVICE_PCI, - .local = INTEL_440EX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = INTEL_440EX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i440bx_device = { - .name = "Intel 82443BX", + .name = "Intel 82443BX", .internal_name = "i440bx", - .flags = DEVICE_PCI, - .local = 0x8000 | INTEL_440BX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = 0x8000 | INTEL_440BX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i440bx_no_agp_device = { - .name = "Intel 82443BX", + .name = "Intel 82443BX", .internal_name = "i440bx_no_agp", - .flags = DEVICE_PCI, - .local = 0x8200 | INTEL_440BX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = 0x8200 | INTEL_440BX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i440gx_device = { - .name = "Intel 82443GX", + .name = "Intel 82443GX", .internal_name = "i440gx", - .flags = DEVICE_PCI, - .local = 0x8000 | INTEL_440GX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = 0x8000 | INTEL_440GX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i440zx_device = { - .name = "Intel 82443ZX", + .name = "Intel 82443ZX", .internal_name = "i440zx", - .flags = DEVICE_PCI, - .local = 0x8000 | INTEL_440ZX, - .init = i4x0_init, - .close = i4x0_close, - .reset = i4x0_reset, + .flags = DEVICE_PCI, + .local = 0x8000 | INTEL_440ZX, + .init = i4x0_init, + .close = i4x0_close, + .reset = i4x0_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/intel_82335.c b/src/chipset/intel_82335.c index 2c018d3ef..96f0cad2c 100644 --- a/src/chipset/intel_82335.c +++ b/src/chipset/intel_82335.c @@ -29,19 +29,19 @@ /* Shadow capabilities */ #define DISABLED_SHADOW (MEM_READ_EXTANY | MEM_WRITE_EXTANY) -#define ENABLED_SHADOW ((LOCK_STATUS) ? RO_SHADOW : RW_SHADOW) -#define RW_SHADOW (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) -#define RO_SHADOW (MEM_READ_INTERNAL | MEM_WRITE_DISABLED) +#define ENABLED_SHADOW ((LOCK_STATUS) ? RO_SHADOW : RW_SHADOW) +#define RW_SHADOW (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) +#define RO_SHADOW (MEM_READ_INTERNAL | MEM_WRITE_DISABLED) /* Granularity Register Enable & Recalc */ #define EXTENDED_GRANULARITY_ENABLED (dev->regs[0x2c] & 0x01) -#define GRANULARITY_RECALC ((dev->regs[0x2e] & (1 << (i + 8))) ? ((dev->regs[0x2e] & (1 << i)) ? RO_SHADOW : RW_SHADOW) : DISABLED_SHADOW) +#define GRANULARITY_RECALC ((dev->regs[0x2e] & (1 << (i + 8))) ? ((dev->regs[0x2e] & (1 << i)) ? RO_SHADOW : RW_SHADOW) : DISABLED_SHADOW) /* R/W operator for the Video RAM region */ #define DETERMINE_VIDEO_RAM_WRITE_ACCESS ((dev->regs[0x22] & (0x08 << 8)) ? RW_SHADOW : RO_SHADOW) /* Base System 512/640KB switch */ -#define ENABLE_TOP_128KB (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) +#define ENABLE_TOP_128KB (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) #define DISABLE_TOP_128KB (MEM_READ_EXTANY | MEM_WRITE_EXTANY) /* ROM size determination */ @@ -70,75 +70,69 @@ intel_82335_log(const char *fmt, ...) { va_list ap; - if (intel_82335_do_log) - { + if (intel_82335_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define intel_82335_log(fmt, ...) +# define intel_82335_log(fmt, ...) #endif static void intel_82335_write(uint16_t addr, uint16_t val, void *priv) { - intel_82335_t *dev = (intel_82335_t *)priv; - uint32_t romsize = 0, base = 0, i = 0, rc1_remap = 0, rc2_remap = 0; + intel_82335_t *dev = (intel_82335_t *) priv; + uint32_t romsize = 0, base = 0, i = 0, rc1_remap = 0, rc2_remap = 0; dev->regs[addr] = val; - if (!dev->cfg_locked) - { + if (!dev->cfg_locked) { intel_82335_log("Register %02x: Write %04x\n", addr, val); - switch (addr) - { - case 0x22: /* Memory Controller */ + switch (addr) { + case 0x22: /* Memory Controller */ - /* Check if the ROM chips are 256 or 512Kbit (Just for Shadowing sanity) */ - romsize = ROM_SIZE; + /* Check if the ROM chips are 256 or 512Kbit (Just for Shadowing sanity) */ + romsize = ROM_SIZE; - if (!EXTENDED_GRANULARITY_ENABLED) - { - shadowbios = !!(dev->regs[0x22] & 0x01); - shadowbios_write = !!(dev->regs[0x22] & 0x01); + if (!EXTENDED_GRANULARITY_ENABLED) { + shadowbios = !!(dev->regs[0x22] & 0x01); + shadowbios_write = !!(dev->regs[0x22] & 0x01); - /* Base System 512/640KB set */ - mem_set_mem_state_both(0x80000, 0x20000, (dev->regs[0x22] & 0x08) ? ENABLE_TOP_128KB : DISABLE_TOP_128KB); + /* Base System 512/640KB set */ + mem_set_mem_state_both(0x80000, 0x20000, (dev->regs[0x22] & 0x08) ? ENABLE_TOP_128KB : DISABLE_TOP_128KB); - /* Video RAM shadow*/ - mem_set_mem_state_both(0xa0000, 0x20000, (dev->regs[0x22] & (0x04 << 8)) ? DETERMINE_VIDEO_RAM_WRITE_ACCESS : DISABLED_SHADOW); + /* Video RAM shadow*/ + mem_set_mem_state_both(0xa0000, 0x20000, (dev->regs[0x22] & (0x04 << 8)) ? DETERMINE_VIDEO_RAM_WRITE_ACCESS : DISABLED_SHADOW); - /* Option ROM shadow */ - mem_set_mem_state_both(0xc0000, 0x20000, (dev->regs[0x22] & (0x02 << 8)) ? ENABLED_SHADOW : DISABLED_SHADOW); + /* Option ROM shadow */ + mem_set_mem_state_both(0xc0000, 0x20000, (dev->regs[0x22] & (0x02 << 8)) ? ENABLED_SHADOW : DISABLED_SHADOW); - /* System ROM shadow */ - mem_set_mem_state_both(0xe0000, 0x20000, (dev->regs[0x22] & 0x01) ? ENABLED_SHADOW : DISABLED_SHADOW); - } - break; - - case 0x24: /* Roll Compare (Just top remapping. Not followed according to datasheet!) */ - case 0x26: - rc1_remap = (dev->regs[0x24] & 0x01) ? DEFINE_RC1_REMAP_SIZE : 0; - rc2_remap = (dev->regs[0x26] & 0x01) ? DEFINE_RC2_REMAP_SIZE : 0; - mem_remap_top(rc1_remap + rc2_remap); - break; - - case 0x2e: /* Extended Granularity (Enabled if Bit 0 in Register 2Ch is set) */ - if (EXTENDED_GRANULARITY_ENABLED) - { - for (i = 0; i < 8; i++) - { - base = 0xc0000 + (i << 15); - shadowbios = (dev->regs[0x2e] & (1 << (i + 8))) && (base == romsize); - shadowbios_write = (dev->regs[0x2e] & (1 << i)) && (base == romsize); - mem_set_mem_state_both(base, 0x8000, GRANULARITY_RECALC); + /* System ROM shadow */ + mem_set_mem_state_both(0xe0000, 0x20000, (dev->regs[0x22] & 0x01) ? ENABLED_SHADOW : DISABLED_SHADOW); } break; - } + + case 0x24: /* Roll Compare (Just top remapping. Not followed according to datasheet!) */ + case 0x26: + rc1_remap = (dev->regs[0x24] & 0x01) ? DEFINE_RC1_REMAP_SIZE : 0; + rc2_remap = (dev->regs[0x26] & 0x01) ? DEFINE_RC2_REMAP_SIZE : 0; + mem_remap_top(rc1_remap + rc2_remap); + break; + + case 0x2e: /* Extended Granularity (Enabled if Bit 0 in Register 2Ch is set) */ + if (EXTENDED_GRANULARITY_ENABLED) { + for (i = 0; i < 8; i++) { + base = 0xc0000 + (i << 15); + shadowbios = (dev->regs[0x2e] & (1 << (i + 8))) && (base == romsize); + shadowbios_write = (dev->regs[0x2e] & (1 << i)) && (base == romsize); + mem_set_mem_state_both(base, 0x8000, GRANULARITY_RECALC); + } + break; + } } } @@ -149,7 +143,7 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv) static uint16_t intel_82335_read(uint16_t addr, void *priv) { - intel_82335_t *dev = (intel_82335_t *)priv; + intel_82335_t *dev = (intel_82335_t *) priv; intel_82335_log("Register %02x: Read %04x\n", addr, dev->regs[addr]); @@ -159,7 +153,7 @@ intel_82335_read(uint16_t addr, void *priv) static void intel_82335_close(void *priv) { - intel_82335_t *dev = (intel_82335_t *)priv; + intel_82335_t *dev = (intel_82335_t *) priv; free(dev); } @@ -167,7 +161,7 @@ intel_82335_close(void *priv) static void * intel_82335_init(const device_t *info) { - intel_82335_t *dev = (intel_82335_t *)malloc(sizeof(intel_82335_t)); + intel_82335_t *dev = (intel_82335_t *) malloc(sizeof(intel_82335_t)); memset(dev, 0, sizeof(intel_82335_t)); memset(dev->regs, 0, sizeof(dev->regs)); @@ -197,15 +191,15 @@ intel_82335_init(const device_t *info) } const device_t intel_82335_device = { - .name = "Intel 82335", + .name = "Intel 82335", .internal_name = "intel_82335", - .flags = 0, - .local = 0, - .init = intel_82335_init, - .close = intel_82335_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = intel_82335_init, + .close = intel_82335_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/intel_i450kx.c b/src/chipset/intel_i450kx.c index ad92218f8..a6cecf915 100644 --- a/src/chipset/intel_i450kx.c +++ b/src/chipset/intel_i450kx.c @@ -38,7 +38,6 @@ i450GX is way more popular of an option but needs more stuff. #include <86box/spd.h> #include <86box/chipset.h> - #ifdef ENABLE_450KX_LOG int i450kx_do_log = ENABLE_450KX_LOG; static void @@ -46,48 +45,44 @@ i450kx_log(const char *fmt, ...) { va_list ap; - if (i450kx_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + if (i450kx_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define i450kx_log(fmt, ...) +# define i450kx_log(fmt, ...) #endif - /* TODO: Finish the bus index stuff. */ typedef struct i450kx_t { - smram_t * smram[2]; + smram_t *smram[2]; - uint8_t pb_pci_conf[256], mc_pci_conf[256]; - uint8_t mem_state[2][256]; + uint8_t pb_pci_conf[256], mc_pci_conf[256]; + uint8_t mem_state[2][256]; - uint8_t bus_index; + uint8_t bus_index; } i450kx_t; - static void i450kx_map(i450kx_t *dev, int bus, uint32_t addr, uint32_t size, int state) { - uint32_t base = addr >> 12; - int states[4] = { MEM_READ_EXTANY | MEM_WRITE_EXTANY, MEM_READ_INTERNAL | MEM_WRITE_EXTANY, - MEM_READ_EXTANY | MEM_WRITE_INTERNAL, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL }; + uint32_t base = addr >> 12; + int states[4] = { MEM_READ_EXTANY | MEM_WRITE_EXTANY, MEM_READ_INTERNAL | MEM_WRITE_EXTANY, + MEM_READ_EXTANY | MEM_WRITE_INTERNAL, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL }; state &= 3; if (dev->mem_state[bus][base] != state) { - if (bus) - mem_set_mem_state_bus_both(addr, size, states[state]); - else - mem_set_mem_state_cpu_both(addr, size, states[state]); - dev->mem_state[bus][base] = state; - flushmmucache_nopc(); + if (bus) + mem_set_mem_state_bus_both(addr, size, states[state]); + else + mem_set_mem_state_cpu_both(addr, size, states[state]); + dev->mem_state[bus][base] = state; + flushmmucache_nopc(); } } - static void i450kx_smram_recalc(i450kx_t *dev, int bus) { @@ -100,16 +95,15 @@ i450kx_smram_recalc(i450kx_t *dev, int bus) size = (((uint32_t) ((regs[0xbb] >> 4) & 0x0f)) << 16) + 0x00010000; if ((addr != 0x00000000) && !!(regs[0x57] & 0x08)) { - if (bus) - smram_enable_ex(dev->smram[bus], addr, addr, size, 0, !!(regs[0x57] & 8), 0, 1); - else - smram_enable_ex(dev->smram[bus], addr, addr, size, !!(regs[0x57] & 8), 0, 1, 0); + if (bus) + smram_enable_ex(dev->smram[bus], addr, addr, size, 0, !!(regs[0x57] & 8), 0, 1); + else + smram_enable_ex(dev->smram[bus], addr, addr, size, !!(regs[0x57] & 8), 0, 1, 0); } flushmmucache(); } - static void i450kx_vid_buf_recalc(i450kx_t *dev, int bus) { @@ -119,269 +113,273 @@ i450kx_vid_buf_recalc(i450kx_t *dev, int bus) int state = (regs[0x58] & 0x02) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY); if (bus) - mem_set_mem_state_bus_both(0x000a0000, 0x00020000, state); + mem_set_mem_state_bus_both(0x000a0000, 0x00020000, state); else - mem_set_mem_state_cpu_both(0x000a0000, 0x00020000, state); + mem_set_mem_state_cpu_both(0x000a0000, 0x00020000, state); flushmmucache_nopc(); } - static void pb_write(int func, int addr, uint8_t val, void *priv) { - i450kx_t *dev = (i450kx_t *)priv; + i450kx_t *dev = (i450kx_t *) priv; // pclog("i450KX-PB: [W] dev->pb_pci_conf[%02X] = %02X POST: %02X\n", addr, val, inb(0x80)); i450kx_log("i450KX-PB: [W] dev->pb_pci_conf[%02X] = %02X POST: %02X\n", addr, val, inb(0x80)); - if (func == 0) switch (addr) { - case 0x04: - dev->pb_pci_conf[addr] = (dev->pb_pci_conf[addr] & 0x04) | (val & 0x53); - break; - case 0x05: - dev->pb_pci_conf[addr] = val & 0x01; - break; + if (func == 0) + switch (addr) { + case 0x04: + dev->pb_pci_conf[addr] = (dev->pb_pci_conf[addr] & 0x04) | (val & 0x53); + break; + case 0x05: + dev->pb_pci_conf[addr] = val & 0x01; + break; - case 0x07: - dev->pb_pci_conf[addr] &= ~(val & 0xf9); - break; + case 0x07: + dev->pb_pci_conf[addr] &= ~(val & 0xf9); + break; - case 0x0d: - dev->pb_pci_conf[addr] = val; - break; + case 0x0d: + dev->pb_pci_conf[addr] = val; + break; - case 0x0f: - dev->pb_pci_conf[addr] = val & 0xcf; - break; + case 0x0f: + dev->pb_pci_conf[addr] = val & 0xcf; + break; - case 0x40: case 0x41: - dev->pb_pci_conf[addr] = val; - break; - case 0x43: - dev->pb_pci_conf[addr] = val & 0x80; - break; + case 0x40: + case 0x41: + dev->pb_pci_conf[addr] = val; + break; + case 0x43: + dev->pb_pci_conf[addr] = val & 0x80; + break; - case 0x48: - dev->pb_pci_conf[addr] = val & 0x06; - break; + case 0x48: + dev->pb_pci_conf[addr] = val & 0x06; + break; - case 0x4a: case 0x4b: - dev->pb_pci_conf[addr] = val; - // if (addr == 0x4a) - // pci_remap_bus(dev->bus_index, val); - break; + case 0x4a: + case 0x4b: + dev->pb_pci_conf[addr] = val; + // if (addr == 0x4a) + // pci_remap_bus(dev->bus_index, val); + break; - case 0x4c: - dev->pb_pci_conf[addr] = (dev->pb_pci_conf[addr] & 0x01) | (val & 0xd8); - break; + case 0x4c: + dev->pb_pci_conf[addr] = (dev->pb_pci_conf[addr] & 0x01) | (val & 0xd8); + break; - case 0x51: - dev->pb_pci_conf[addr] = val; - break; + case 0x51: + dev->pb_pci_conf[addr] = val; + break; - case 0x53: - dev->pb_pci_conf[addr] = val & 0x02; - break; + case 0x53: + dev->pb_pci_conf[addr] = val & 0x02; + break; - case 0x54: - dev->pb_pci_conf[addr] = val & 0x7b; - break; - case 0x55: - dev->pb_pci_conf[addr] = val & 0x03; - break; + case 0x54: + dev->pb_pci_conf[addr] = val & 0x7b; + break; + case 0x55: + dev->pb_pci_conf[addr] = val & 0x03; + break; - case 0x57: - dev->pb_pci_conf[addr] = val & 0x08; - i450kx_smram_recalc(dev, 1); - break; + case 0x57: + dev->pb_pci_conf[addr] = val & 0x08; + i450kx_smram_recalc(dev, 1); + break; - case 0x58: - dev->pb_pci_conf[addr] = val & 0x02; - i450kx_vid_buf_recalc(dev, 1); - break; + case 0x58: + dev->pb_pci_conf[addr] = val & 0x02; + i450kx_vid_buf_recalc(dev, 1); + break; - case 0x59: /* PAM0 */ - if ((dev->pb_pci_conf[0x59] ^ val) & 0x0f) - i450kx_map(dev, 1, 0x80000, 0x20000, val & 0x0f); - if ((dev->pb_pci_conf[0x59] ^ val) & 0xf0) { - i450kx_map(dev, 1, 0xf0000, 0x10000, val >> 4); - shadowbios = (val & 0x10); - } - dev->pb_pci_conf[0x59] = val & 0x33; - break; - case 0x5a: /* PAM1 */ - if ((dev->pb_pci_conf[0x5a] ^ val) & 0x0f) - i450kx_map(dev, 1, 0xc0000, 0x04000, val & 0xf); - if ((dev->pb_pci_conf[0x5a] ^ val) & 0xf0) - i450kx_map(dev, 1, 0xc4000, 0x04000, val >> 4); - dev->pb_pci_conf[0x5a] = val & 0x33; - break; - case 0x5b: /*PAM2 */ - if ((dev->pb_pci_conf[0x5b] ^ val) & 0x0f) - i450kx_map(dev, 1, 0xc8000, 0x04000, val & 0xf); - if ((dev->pb_pci_conf[0x5b] ^ val) & 0xf0) - i450kx_map(dev, 1, 0xcc000, 0x04000, val >> 4); - dev->pb_pci_conf[0x5b] = val & 0x33; - break; - case 0x5c: /*PAM3 */ - if ((dev->pb_pci_conf[0x5c] ^ val) & 0x0f) - i450kx_map(dev, 1, 0xd0000, 0x04000, val & 0xf); - if ((dev->pb_pci_conf[0x5c] ^ val) & 0xf0) - i450kx_map(dev, 1, 0xd4000, 0x04000, val >> 4); - dev->pb_pci_conf[0x5c] = val & 0x33; - break; - case 0x5d: /* PAM4 */ - if ((dev->pb_pci_conf[0x5d] ^ val) & 0x0f) - i450kx_map(dev, 1, 0xd8000, 0x04000, val & 0xf); - if ((dev->pb_pci_conf[0x5d] ^ val) & 0xf0) - i450kx_map(dev, 1, 0xdc000, 0x04000, val >> 4); - dev->pb_pci_conf[0x5d] = val & 0x33; - break; - case 0x5e: /* PAM5 */ - if ((dev->pb_pci_conf[0x5e] ^ val) & 0x0f) - i450kx_map(dev, 1, 0xe0000, 0x04000, val & 0xf); - if ((dev->pb_pci_conf[0x5e] ^ val) & 0xf0) - i450kx_map(dev, 1, 0xe4000, 0x04000, val >> 4); - dev->pb_pci_conf[0x5e] = val & 0x33; - break; - case 0x5f: /* PAM6 */ - if ((dev->pb_pci_conf[0x5f] ^ val) & 0x0f) - i450kx_map(dev, 1, 0xe8000, 0x04000, val & 0xf); - if ((dev->pb_pci_conf[0x5f] ^ val) & 0xf0) - i450kx_map(dev, 1, 0xec000, 0x04000, val >> 4); - dev->pb_pci_conf[0x5f] = val & 0x33; - break; + case 0x59: /* PAM0 */ + if ((dev->pb_pci_conf[0x59] ^ val) & 0x0f) + i450kx_map(dev, 1, 0x80000, 0x20000, val & 0x0f); + if ((dev->pb_pci_conf[0x59] ^ val) & 0xf0) { + i450kx_map(dev, 1, 0xf0000, 0x10000, val >> 4); + shadowbios = (val & 0x10); + } + dev->pb_pci_conf[0x59] = val & 0x33; + break; + case 0x5a: /* PAM1 */ + if ((dev->pb_pci_conf[0x5a] ^ val) & 0x0f) + i450kx_map(dev, 1, 0xc0000, 0x04000, val & 0xf); + if ((dev->pb_pci_conf[0x5a] ^ val) & 0xf0) + i450kx_map(dev, 1, 0xc4000, 0x04000, val >> 4); + dev->pb_pci_conf[0x5a] = val & 0x33; + break; + case 0x5b: /*PAM2 */ + if ((dev->pb_pci_conf[0x5b] ^ val) & 0x0f) + i450kx_map(dev, 1, 0xc8000, 0x04000, val & 0xf); + if ((dev->pb_pci_conf[0x5b] ^ val) & 0xf0) + i450kx_map(dev, 1, 0xcc000, 0x04000, val >> 4); + dev->pb_pci_conf[0x5b] = val & 0x33; + break; + case 0x5c: /*PAM3 */ + if ((dev->pb_pci_conf[0x5c] ^ val) & 0x0f) + i450kx_map(dev, 1, 0xd0000, 0x04000, val & 0xf); + if ((dev->pb_pci_conf[0x5c] ^ val) & 0xf0) + i450kx_map(dev, 1, 0xd4000, 0x04000, val >> 4); + dev->pb_pci_conf[0x5c] = val & 0x33; + break; + case 0x5d: /* PAM4 */ + if ((dev->pb_pci_conf[0x5d] ^ val) & 0x0f) + i450kx_map(dev, 1, 0xd8000, 0x04000, val & 0xf); + if ((dev->pb_pci_conf[0x5d] ^ val) & 0xf0) + i450kx_map(dev, 1, 0xdc000, 0x04000, val >> 4); + dev->pb_pci_conf[0x5d] = val & 0x33; + break; + case 0x5e: /* PAM5 */ + if ((dev->pb_pci_conf[0x5e] ^ val) & 0x0f) + i450kx_map(dev, 1, 0xe0000, 0x04000, val & 0xf); + if ((dev->pb_pci_conf[0x5e] ^ val) & 0xf0) + i450kx_map(dev, 1, 0xe4000, 0x04000, val >> 4); + dev->pb_pci_conf[0x5e] = val & 0x33; + break; + case 0x5f: /* PAM6 */ + if ((dev->pb_pci_conf[0x5f] ^ val) & 0x0f) + i450kx_map(dev, 1, 0xe8000, 0x04000, val & 0xf); + if ((dev->pb_pci_conf[0x5f] ^ val) & 0xf0) + i450kx_map(dev, 1, 0xec000, 0x04000, val >> 4); + dev->pb_pci_conf[0x5f] = val & 0x33; + break; - case 0x70: - dev->pb_pci_conf[addr] = val & 0xf8; - break; + case 0x70: + dev->pb_pci_conf[addr] = val & 0xf8; + break; - case 0x71: - dev->pb_pci_conf[addr] = val & 0x71; - break; + case 0x71: + dev->pb_pci_conf[addr] = val & 0x71; + break; - case 0x78: - dev->pb_pci_conf[addr] = val & 0xf0; - break; - case 0x79: - dev->pb_pci_conf[addr] = val & 0xfc; - break; - case 0x7a: - dev->pb_pci_conf[addr] = val; - break; - case 0x7b: - dev->pb_pci_conf[addr] = val & 0x0f; - break; + case 0x78: + dev->pb_pci_conf[addr] = val & 0xf0; + break; + case 0x79: + dev->pb_pci_conf[addr] = val & 0xfc; + break; + case 0x7a: + dev->pb_pci_conf[addr] = val; + break; + case 0x7b: + dev->pb_pci_conf[addr] = val & 0x0f; + break; - case 0x7c: - dev->pb_pci_conf[addr] = val & 0x9f; - break; - case 0x7d: - dev->pb_pci_conf[addr] = val & 0x1a; - break; - case 0x7e: - dev->pb_pci_conf[addr] = val & 0xf0; - break; - case 0x7f: - dev->pb_pci_conf[addr] = val; - break; + case 0x7c: + dev->pb_pci_conf[addr] = val & 0x9f; + break; + case 0x7d: + dev->pb_pci_conf[addr] = val & 0x1a; + break; + case 0x7e: + dev->pb_pci_conf[addr] = val & 0xf0; + break; + case 0x7f: + dev->pb_pci_conf[addr] = val; + break; - case 0x88: case 0x89: - dev->pb_pci_conf[addr] = val; - break; - case 0x8b: - dev->pb_pci_conf[addr] = val & 0x80; - break; - case 0x8c: case 0x8d: - dev->pb_pci_conf[addr] = val; - break; + case 0x88: + case 0x89: + dev->pb_pci_conf[addr] = val; + break; + case 0x8b: + dev->pb_pci_conf[addr] = val & 0x80; + break; + case 0x8c: + case 0x8d: + dev->pb_pci_conf[addr] = val; + break; - case 0x9c: - dev->pb_pci_conf[addr] = val & 0x01; - break; + case 0x9c: + dev->pb_pci_conf[addr] = val & 0x01; + break; - case 0xa4: - dev->pb_pci_conf[addr] = val & 0xf8; - break; - case 0xa5: case 0xa6: - dev->pb_pci_conf[addr] = val; - break; - case 0xa7: - dev->pb_pci_conf[addr] = val & 0x0f; - break; + case 0xa4: + dev->pb_pci_conf[addr] = val & 0xf8; + break; + case 0xa5: + case 0xa6: + dev->pb_pci_conf[addr] = val; + break; + case 0xa7: + dev->pb_pci_conf[addr] = val & 0x0f; + break; - case 0xb0: - dev->pb_pci_conf[addr] = val & 0xe0; - break; - case 0xb1: - dev->pb_pci_conf[addr] = val & /*0x1a*/ 0x1f; - break; + case 0xb0: + dev->pb_pci_conf[addr] = val & 0xe0; + break; + case 0xb1: + dev->pb_pci_conf[addr] = val & /*0x1a*/ 0x1f; + break; - case 0xb4: - dev->pb_pci_conf[addr] = val & 0xe0; - break; - case 0xb5: - dev->pb_pci_conf[addr] = val & 0x1f; - break; + case 0xb4: + dev->pb_pci_conf[addr] = val & 0xe0; + break; + case 0xb5: + dev->pb_pci_conf[addr] = val & 0x1f; + break; - case 0xb8: case 0xb9: - dev->pb_pci_conf[addr] = val; - i450kx_smram_recalc(dev, 1); - break; - case 0xbb: - dev->pb_pci_conf[addr] = val & 0xf0; - i450kx_smram_recalc(dev, 1); - break; + case 0xb8: + case 0xb9: + dev->pb_pci_conf[addr] = val; + i450kx_smram_recalc(dev, 1); + break; + case 0xbb: + dev->pb_pci_conf[addr] = val & 0xf0; + i450kx_smram_recalc(dev, 1); + break; - case 0xbc: - dev->pb_pci_conf[addr] = val & 0x11; - break; + case 0xbc: + dev->pb_pci_conf[addr] = val & 0x11; + break; - case 0xc0: - dev->pb_pci_conf[addr] = val & 0xdf; - break; - case 0xc1: - dev->pb_pci_conf[addr] = val & 0x3f; - break; + case 0xc0: + dev->pb_pci_conf[addr] = val & 0xdf; + break; + case 0xc1: + dev->pb_pci_conf[addr] = val & 0x3f; + break; - case 0xc4: - dev->pb_pci_conf[addr] &= ~(val & 0x0f); - break; - case 0xc5: - dev->pb_pci_conf[addr] &= ~(val & 0x0a); - break; - case 0xc6: - dev->pb_pci_conf[addr] &= ~(val & 0x1f); - break; + case 0xc4: + dev->pb_pci_conf[addr] &= ~(val & 0x0f); + break; + case 0xc5: + dev->pb_pci_conf[addr] &= ~(val & 0x0a); + break; + case 0xc6: + dev->pb_pci_conf[addr] &= ~(val & 0x1f); + break; - case 0xc8: - dev->pb_pci_conf[addr] = val & 0x1f; - break; + case 0xc8: + dev->pb_pci_conf[addr] = val & 0x1f; + break; - case 0xca: - case 0xcb: - dev->pb_pci_conf[addr] = val; - break; - } + case 0xca: + case 0xcb: + dev->pb_pci_conf[addr] = val; + break; + } } - static uint8_t pb_read(int func, int addr, void *priv) { - i450kx_t *dev = (i450kx_t *)priv; - uint8_t ret = 0xff; + i450kx_t *dev = (i450kx_t *) priv; + uint8_t ret = 0xff; if (func == 0) - ret = dev->pb_pci_conf[addr]; + ret = dev->pb_pci_conf[addr]; // pclog("i450KX-PB: [R] dev->pb_pci_conf[%02X] = %02X POST: %02X\n", addr, ret, inb(0x80)); return ret; } - /* A way to use spd_write_drbs_interlaved() and convert the output to what we need. */ static void mc_fill_drbs(i450kx_t *dev) @@ -390,227 +388,229 @@ mc_fill_drbs(i450kx_t *dev) spd_write_drbs_interleaved(dev->mc_pci_conf, 0x60, 0x6f, 4); for (i = 0x60; i <= 0x6f; i++) { - if (i & 0x01) - dev->mc_pci_conf[i] = 0x00; - else - dev->mc_pci_conf[i] &= 0x7f; + if (i & 0x01) + dev->mc_pci_conf[i] = 0x00; + else + dev->mc_pci_conf[i] &= 0x7f; } } - static void mc_write(int func, int addr, uint8_t val, void *priv) { - i450kx_t *dev = (i450kx_t *)priv; + i450kx_t *dev = (i450kx_t *) priv; // pclog("i450KX-MC: [W] dev->mc_pci_conf[%02X] = %02X POST: %02X\n", addr, val, inb(0x80)); i450kx_log("i450KX-MC: [W] dev->mc_pci_conf[%02X] = %02X POST: %02X\n", addr, val, inb(0x80)); - if (func == 0) switch (addr) { - case 0x4c: - dev->mc_pci_conf[addr] = val & 0xdf; - break; - case 0x4d: - dev->mc_pci_conf[addr] = val & 0xff; - break; + if (func == 0) + switch (addr) { + case 0x4c: + dev->mc_pci_conf[addr] = val & 0xdf; + break; + case 0x4d: + dev->mc_pci_conf[addr] = val & 0xff; + break; - case 0x57: - dev->mc_pci_conf[addr] = val & 0x08; - i450kx_smram_recalc(dev, 0); - break; + case 0x57: + dev->mc_pci_conf[addr] = val & 0x08; + i450kx_smram_recalc(dev, 0); + break; - case 0x58: - dev->mc_pci_conf[addr] = val & 0x02; - i450kx_vid_buf_recalc(dev, 0); - break; + case 0x58: + dev->mc_pci_conf[addr] = val & 0x02; + i450kx_vid_buf_recalc(dev, 0); + break; - case 0x59: /* PAM0 */ - if ((dev->mc_pci_conf[0x59] ^ val) & 0x0f) - i450kx_map(dev, 0, 0x80000, 0x20000, val & 0x0f); - if ((dev->mc_pci_conf[0x59] ^ val) & 0xf0) { - i450kx_map(dev, 0, 0xf0000, 0x10000, val >> 4); - shadowbios = (val & 0x10); - } - dev->mc_pci_conf[0x59] = val & 0x33; - break; - case 0x5a: /* PAM1 */ - if ((dev->mc_pci_conf[0x5a] ^ val) & 0x0f) - i450kx_map(dev, 0, 0xc0000, 0x04000, val & 0xf); - if ((dev->mc_pci_conf[0x5a] ^ val) & 0xf0) - i450kx_map(dev, 0, 0xc4000, 0x04000, val >> 4); - dev->mc_pci_conf[0x5a] = val & 0x33; - break; - case 0x5b: /*PAM2 */ - if ((dev->mc_pci_conf[0x5b] ^ val) & 0x0f) - i450kx_map(dev, 0, 0xc8000, 0x04000, val & 0xf); - if ((dev->mc_pci_conf[0x5b] ^ val) & 0xf0) - i450kx_map(dev, 0, 0xcc000, 0x04000, val >> 4); - dev->mc_pci_conf[0x5b] = val & 0x33; - break; - case 0x5c: /*PAM3 */ - if ((dev->mc_pci_conf[0x5c] ^ val) & 0x0f) - i450kx_map(dev, 0, 0xd0000, 0x04000, val & 0xf); - if ((dev->mc_pci_conf[0x5c] ^ val) & 0xf0) - i450kx_map(dev, 0, 0xd4000, 0x04000, val >> 4); - dev->mc_pci_conf[0x5c] = val & 0x33; - break; - case 0x5d: /* PAM4 */ - if ((dev->mc_pci_conf[0x5d] ^ val) & 0x0f) - i450kx_map(dev, 0, 0xd8000, 0x04000, val & 0xf); - if ((dev->mc_pci_conf[0x5d] ^ val) & 0xf0) - i450kx_map(dev, 0, 0xdc000, 0x04000, val >> 4); - dev->mc_pci_conf[0x5d] = val & 0x33; - break; - case 0x5e: /* PAM5 */ - if ((dev->mc_pci_conf[0x5e] ^ val) & 0x0f) - i450kx_map(dev, 0, 0xe0000, 0x04000, val & 0xf); - if ((dev->mc_pci_conf[0x5e] ^ val) & 0xf0) - i450kx_map(dev, 0, 0xe4000, 0x04000, val >> 4); - dev->mc_pci_conf[0x5e] = val & 0x33; - break; - case 0x5f: /* PAM6 */ - if ((dev->mc_pci_conf[0x5f] ^ val) & 0x0f) - i450kx_map(dev, 0, 0xe8000, 0x04000, val & 0xf); - if ((dev->mc_pci_conf[0x5f] ^ val) & 0xf0) - i450kx_map(dev, 0, 0xec000, 0x04000, val >> 4); - dev->mc_pci_conf[0x5f] = val & 0x33; - break; + case 0x59: /* PAM0 */ + if ((dev->mc_pci_conf[0x59] ^ val) & 0x0f) + i450kx_map(dev, 0, 0x80000, 0x20000, val & 0x0f); + if ((dev->mc_pci_conf[0x59] ^ val) & 0xf0) { + i450kx_map(dev, 0, 0xf0000, 0x10000, val >> 4); + shadowbios = (val & 0x10); + } + dev->mc_pci_conf[0x59] = val & 0x33; + break; + case 0x5a: /* PAM1 */ + if ((dev->mc_pci_conf[0x5a] ^ val) & 0x0f) + i450kx_map(dev, 0, 0xc0000, 0x04000, val & 0xf); + if ((dev->mc_pci_conf[0x5a] ^ val) & 0xf0) + i450kx_map(dev, 0, 0xc4000, 0x04000, val >> 4); + dev->mc_pci_conf[0x5a] = val & 0x33; + break; + case 0x5b: /*PAM2 */ + if ((dev->mc_pci_conf[0x5b] ^ val) & 0x0f) + i450kx_map(dev, 0, 0xc8000, 0x04000, val & 0xf); + if ((dev->mc_pci_conf[0x5b] ^ val) & 0xf0) + i450kx_map(dev, 0, 0xcc000, 0x04000, val >> 4); + dev->mc_pci_conf[0x5b] = val & 0x33; + break; + case 0x5c: /*PAM3 */ + if ((dev->mc_pci_conf[0x5c] ^ val) & 0x0f) + i450kx_map(dev, 0, 0xd0000, 0x04000, val & 0xf); + if ((dev->mc_pci_conf[0x5c] ^ val) & 0xf0) + i450kx_map(dev, 0, 0xd4000, 0x04000, val >> 4); + dev->mc_pci_conf[0x5c] = val & 0x33; + break; + case 0x5d: /* PAM4 */ + if ((dev->mc_pci_conf[0x5d] ^ val) & 0x0f) + i450kx_map(dev, 0, 0xd8000, 0x04000, val & 0xf); + if ((dev->mc_pci_conf[0x5d] ^ val) & 0xf0) + i450kx_map(dev, 0, 0xdc000, 0x04000, val >> 4); + dev->mc_pci_conf[0x5d] = val & 0x33; + break; + case 0x5e: /* PAM5 */ + if ((dev->mc_pci_conf[0x5e] ^ val) & 0x0f) + i450kx_map(dev, 0, 0xe0000, 0x04000, val & 0xf); + if ((dev->mc_pci_conf[0x5e] ^ val) & 0xf0) + i450kx_map(dev, 0, 0xe4000, 0x04000, val >> 4); + dev->mc_pci_conf[0x5e] = val & 0x33; + break; + case 0x5f: /* PAM6 */ + if ((dev->mc_pci_conf[0x5f] ^ val) & 0x0f) + i450kx_map(dev, 0, 0xe8000, 0x04000, val & 0xf); + if ((dev->mc_pci_conf[0x5f] ^ val) & 0xf0) + i450kx_map(dev, 0, 0xec000, 0x04000, val >> 4); + dev->mc_pci_conf[0x5f] = val & 0x33; + break; - case 0x60 ... 0x6f: - dev->mc_pci_conf[addr] = ((addr & 0x0f) & 0x01) ? 0x00 : (val & 0x7f); - mc_fill_drbs(dev); - break; + case 0x60 ... 0x6f: + dev->mc_pci_conf[addr] = ((addr & 0x0f) & 0x01) ? 0x00 : (val & 0x7f); + mc_fill_drbs(dev); + break; - case 0x74 ... 0x77: - dev->mc_pci_conf[addr] = val; - break; + case 0x74 ... 0x77: + dev->mc_pci_conf[addr] = val; + break; - case 0x78: - dev->mc_pci_conf[addr] = val & 0xf0; - break; - case 0x79: - dev->mc_pci_conf[addr] = val & 0xfe; - break; - case 0x7a: - dev->mc_pci_conf[addr] = val; - break; - case 0x7b: - dev->mc_pci_conf[addr] = val & 0x0f; - break; + case 0x78: + dev->mc_pci_conf[addr] = val & 0xf0; + break; + case 0x79: + dev->mc_pci_conf[addr] = val & 0xfe; + break; + case 0x7a: + dev->mc_pci_conf[addr] = val; + break; + case 0x7b: + dev->mc_pci_conf[addr] = val & 0x0f; + break; - case 0x7c: - dev->mc_pci_conf[addr] = val & 0x1f; - break; - case 0x7d: - dev->mc_pci_conf[addr] = val & 0x0c; - break; - case 0x7e: - dev->mc_pci_conf[addr] = val & 0xf0; - break; - case 0x7f: - dev->mc_pci_conf[addr] = val; - break; + case 0x7c: + dev->mc_pci_conf[addr] = val & 0x1f; + break; + case 0x7d: + dev->mc_pci_conf[addr] = val & 0x0c; + break; + case 0x7e: + dev->mc_pci_conf[addr] = val & 0xf0; + break; + case 0x7f: + dev->mc_pci_conf[addr] = val; + break; - case 0x88: case 0x89: - dev->mc_pci_conf[addr] = val; - break; - case 0x8b: - dev->mc_pci_conf[addr] = val & 0x80; - break; + case 0x88: + case 0x89: + dev->mc_pci_conf[addr] = val; + break; + case 0x8b: + dev->mc_pci_conf[addr] = val & 0x80; + break; - case 0x8c: case 0x8d: - dev->mc_pci_conf[addr] = val; - break; + case 0x8c: + case 0x8d: + dev->mc_pci_conf[addr] = val; + break; - case 0xa4: - dev->mc_pci_conf[addr] = val & 0x01; - break; - case 0xa5: - dev->pb_pci_conf[addr] = val & 0xf0; - break; - case 0xa6: - dev->mc_pci_conf[addr] = val; - break; - case 0xa7: - dev->mc_pci_conf[addr] = val & 0x0f; - break; + case 0xa4: + dev->mc_pci_conf[addr] = val & 0x01; + break; + case 0xa5: + dev->pb_pci_conf[addr] = val & 0xf0; + break; + case 0xa6: + dev->mc_pci_conf[addr] = val; + break; + case 0xa7: + dev->mc_pci_conf[addr] = val & 0x0f; + break; - case 0xa8: - dev->mc_pci_conf[addr] = val & 0xfe; - break; - case 0xa9 ... 0xab: - dev->mc_pci_conf[addr] = val; - break; + case 0xa8: + dev->mc_pci_conf[addr] = val & 0xfe; + break; + case 0xa9 ... 0xab: + dev->mc_pci_conf[addr] = val; + break; - case 0xac ... 0xae: - dev->mc_pci_conf[addr] = val; - break; - case 0xaf: - dev->mc_pci_conf[addr] = val & 0x7f; - break; + case 0xac ... 0xae: + dev->mc_pci_conf[addr] = val; + break; + case 0xaf: + dev->mc_pci_conf[addr] = val & 0x7f; + break; - case 0xb8: case 0xb9: - dev->mc_pci_conf[addr] = val; - i450kx_smram_recalc(dev, 0); - break; - case 0xbb: - dev->mc_pci_conf[addr] = val & 0xf0; - i450kx_smram_recalc(dev, 0); - break; + case 0xb8: + case 0xb9: + dev->mc_pci_conf[addr] = val; + i450kx_smram_recalc(dev, 0); + break; + case 0xbb: + dev->mc_pci_conf[addr] = val & 0xf0; + i450kx_smram_recalc(dev, 0); + break; - case 0xbc: - dev->mc_pci_conf[addr] = val & 0x01; - break; + case 0xbc: + dev->mc_pci_conf[addr] = val & 0x01; + break; - case 0xc0: - dev->mc_pci_conf[addr] = val & 0x07; - break; + case 0xc0: + dev->mc_pci_conf[addr] = val & 0x07; + break; - case 0xc2: - dev->mc_pci_conf[addr] &= ~(val & 0x03); - break; + case 0xc2: + dev->mc_pci_conf[addr] &= ~(val & 0x03); + break; - case 0xc4: - dev->mc_pci_conf[addr] = val & 0xbf; - break; - case 0xc5: - dev->mc_pci_conf[addr] = val & 0x03; - break; + case 0xc4: + dev->mc_pci_conf[addr] = val & 0xbf; + break; + case 0xc5: + dev->mc_pci_conf[addr] = val & 0x03; + break; - case 0xc6: - dev->mc_pci_conf[addr] &= ~(val & 0x19); - break; + case 0xc6: + dev->mc_pci_conf[addr] &= ~(val & 0x19); + break; - case 0xc8: - dev->mc_pci_conf[addr] = val & 0x1f; - break; - case 0xca: case 0xcb: - dev->mc_pci_conf[addr] = val; - break; - } + case 0xc8: + dev->mc_pci_conf[addr] = val & 0x1f; + break; + case 0xca: + case 0xcb: + dev->mc_pci_conf[addr] = val; + break; + } } - static uint8_t mc_read(int func, int addr, void *priv) { - i450kx_t *dev = (i450kx_t *)priv; - uint8_t ret = 0xff; + i450kx_t *dev = (i450kx_t *) priv; + uint8_t ret = 0xff; if (func == 0) - ret = dev->mc_pci_conf[addr]; + ret = dev->mc_pci_conf[addr]; // pclog("i450KX-MC: [R] dev->mc_pci_conf[%02X] = %02X POST: %02X\n", addr, ret, inb(0x80)); return ret; } - static void i450kx_reset(void *priv) { - i450kx_t *dev = (i450kx_t *)priv; - uint32_t i; + i450kx_t *dev = (i450kx_t *) priv; + uint32_t i; // pclog("i450KX: i450kx_reset()\n"); @@ -697,7 +697,7 @@ i450kx_reset(void *priv) i450kx_vid_buf_recalc(dev, 1); pb_write(0, 0x59, 0x30, dev); for (i = 0x5a; i <= 0x5f; i++) - pb_write(0, i, 0x33, dev); + pb_write(0, i, 0x33, dev); /* Defaults MC */ dev->mc_pci_conf[0x00] = 0x86; @@ -769,30 +769,28 @@ i450kx_reset(void *priv) i450kx_vid_buf_recalc(dev, 0); mc_write(0, 0x59, 0x03, dev); for (i = 0x5a; i <= 0x5f; i++) - mc_write(0, i, 0x00, dev); + mc_write(0, i, 0x00, dev); for (i = 0x60; i <= 0x6f; i++) - dev->mc_pci_conf[i] = 0x01; + dev->mc_pci_conf[i] = 0x01; } - static void i450kx_close(void *priv) { - i450kx_t *dev = (i450kx_t *)priv; + i450kx_t *dev = (i450kx_t *) priv; smram_del(dev->smram[1]); smram_del(dev->smram[0]); free(dev); } - static void * i450kx_init(const device_t *info) { - i450kx_t *dev = (i450kx_t *)malloc(sizeof(i450kx_t)); + i450kx_t *dev = (i450kx_t *) malloc(sizeof(i450kx_t)); memset(dev, 0, sizeof(i450kx_t)); - pci_add_card(PCI_ADD_NORTHBRIDGE, pb_read, pb_write, dev); /* Device 19h: Intel 450KX PCI Bridge PB */ - pci_add_card(PCI_ADD_AGPBRIDGE, mc_read, mc_write, dev); /* Device 14h: Intel 450KX Memory Controller MC */ + pci_add_card(PCI_ADD_NORTHBRIDGE, pb_read, pb_write, dev); /* Device 19h: Intel 450KX PCI Bridge PB */ + pci_add_card(PCI_ADD_AGPBRIDGE, mc_read, mc_write, dev); /* Device 14h: Intel 450KX Memory Controller MC */ dev->smram[0] = smram_add(); dev->smram[1] = smram_add(); @@ -807,15 +805,15 @@ i450kx_init(const device_t *info) } const device_t i450kx_device = { - .name = "Intel 450KX (Mars)", + .name = "Intel 450KX (Mars)", .internal_name = "i450kx", - .flags = DEVICE_PCI, - .local = 0, - .init = i450kx_init, - .close = i450kx_close, - .reset = i450kx_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = i450kx_init, + .close = i450kx_close, + .reset = i450kx_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/intel_piix.c b/src/chipset/intel_piix.c index f8302e854..8670de9e0 100644 --- a/src/chipset/intel_piix.c +++ b/src/chipset/intel_piix.c @@ -50,93 +50,89 @@ #include <86box/smbus.h> #include <86box/chipset.h> - typedef struct { struct _piix_ *dev; - void *trap; - uint8_t dev_id; - uint32_t *sts_reg, *en_reg, sts_mask, en_mask; + void *trap; + uint8_t dev_id; + uint32_t *sts_reg, *en_reg, sts_mask, en_mask; } piix_io_trap_t; typedef struct _piix_ { - uint8_t cur_readout_reg, rev, - type, func_shift, - max_func, pci_slot, - no_mirq0, pad, - regs[4][256], - readout_regs[256], board_config[2]; - uint16_t func0_id, nvr_io_base, - acpi_io_base; - double fast_off_period; - sff8038i_t *bm[2]; - smbus_piix4_t * smbus; - apm_t * apm; - nvr_t * nvr; - ddma_t * ddma; - usb_t * usb; - acpi_t * acpi; - piix_io_trap_t io_traps[26]; - port_92_t * port_92; - pc_timer_t fast_off_timer; + uint8_t cur_readout_reg, rev, + type, func_shift, + max_func, pci_slot, + no_mirq0, pad, + regs[4][256], + readout_regs[256], board_config[2]; + uint16_t func0_id, nvr_io_base, + acpi_io_base; + double fast_off_period; + sff8038i_t *bm[2]; + smbus_piix4_t *smbus; + apm_t *apm; + nvr_t *nvr; + ddma_t *ddma; + usb_t *usb; + acpi_t *acpi; + piix_io_trap_t io_traps[26]; + port_92_t *port_92; + pc_timer_t fast_off_timer; } piix_t; - #ifdef ENABLE_PIIX_LOG int piix_do_log = ENABLE_PIIX_LOG; - static void piix_log(const char *fmt, ...) { va_list ap; if (piix_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define piix_log(fmt, ...) +# define piix_log(fmt, ...) #endif - static void smsc_ide_irqs(piix_t *dev) { int irq_line = 3, irq_mode[2] = { 0, 0 }; if (dev->regs[1][0x09] & 0x01) - irq_mode[0] = (dev->regs[0][0xe1] & 0x01) ? 3 : 1; + irq_mode[0] = (dev->regs[0][0xe1] & 0x01) ? 3 : 1; if (dev->regs[1][0x09] & 0x04) - irq_mode[1] = (dev->regs[0][0xe1] & 0x01) ? 3 : 1; + irq_mode[1] = (dev->regs[0][0xe1] & 0x01) ? 3 : 1; switch ((dev->regs[0][0xe1] >> 1) & 0x07) { - case 0x00: - irq_line = 3; - break; - case 0x01: - irq_line = 5; - break; - case 0x02: - irq_line = 7; - break; - case 0x03: - irq_line = 8; - break; - case 0x04: - irq_line = 11; - break; - case 0x05: - irq_line = 12; - break; - case 0x06: - irq_line = 14; - break; - case 0x07: - irq_line = 15; - break; + case 0x00: + irq_line = 3; + break; + case 0x01: + irq_line = 5; + break; + case 0x02: + irq_line = 7; + break; + case 0x03: + irq_line = 8; + break; + case 0x04: + irq_line = 11; + break; + case 0x05: + irq_line = 12; + break; + case 0x06: + irq_line = 14; + break; + case 0x07: + irq_line = 15; + break; } sff_set_irq_line(dev->bm[0], irq_line); @@ -148,54 +144,52 @@ smsc_ide_irqs(piix_t *dev) sff_set_irq_mode(dev->bm[1], 1, irq_mode[1]); } - static void piix_ide_handlers(piix_t *dev, int bus) { uint16_t main, side; if (bus & 0x01) { - ide_pri_disable(); + ide_pri_disable(); - if (dev->type == 5) { - if (dev->regs[1][0x09] & 0x01) { - main = (dev->regs[1][0x11] << 8) | (dev->regs[1][0x10] & 0xf8); - side = ((dev->regs[1][0x15] << 8) | (dev->regs[1][0x14] & 0xfc)) + 2; - } else { - main = 0x1f0; - side = 0x3f6; - } + if (dev->type == 5) { + if (dev->regs[1][0x09] & 0x01) { + main = (dev->regs[1][0x11] << 8) | (dev->regs[1][0x10] & 0xf8); + side = ((dev->regs[1][0x15] << 8) | (dev->regs[1][0x14] & 0xfc)) + 2; + } else { + main = 0x1f0; + side = 0x3f6; + } - ide_set_base(0, main); - ide_set_side(0, side); - } + ide_set_base(0, main); + ide_set_side(0, side); + } - if ((dev->regs[1][0x04] & 0x01) && (dev->regs[1][0x41] & 0x80)) - ide_pri_enable(); + if ((dev->regs[1][0x04] & 0x01) && (dev->regs[1][0x41] & 0x80)) + ide_pri_enable(); } if (bus & 0x02) { - ide_sec_disable(); + ide_sec_disable(); - if (dev->type == 5) { - if (dev->regs[1][0x09] & 0x04) { - main = (dev->regs[1][0x19] << 8) | (dev->regs[1][0x18] & 0xf8); - side = ((dev->regs[1][0x1d] << 8) | (dev->regs[1][0x1c] & 0xfc)) + 2; - } else { - main = 0x170; - side = 0x376; - } + if (dev->type == 5) { + if (dev->regs[1][0x09] & 0x04) { + main = (dev->regs[1][0x19] << 8) | (dev->regs[1][0x18] & 0xf8); + side = ((dev->regs[1][0x1d] << 8) | (dev->regs[1][0x1c] & 0xfc)) + 2; + } else { + main = 0x170; + side = 0x376; + } - ide_set_base(1, main); - ide_set_side(1, side); - } + ide_set_base(1, main); + ide_set_side(1, side); + } - if ((dev->regs[1][0x04] & 0x01) && (dev->regs[1][0x43] & 0x80)) - ide_sec_enable(); + if ((dev->regs[1][0x04] & 0x01) && (dev->regs[1][0x43] & 0x80)) + ide_sec_enable(); } } - static void piix_ide_bm_handlers(piix_t *dev) { @@ -205,7 +199,6 @@ piix_ide_bm_handlers(piix_t *dev) sff_bus_master_handler(dev->bm[1], (dev->regs[1][0x04] & 1), base + 8); } - static uint8_t kbc_alias_reg_read(uint16_t addr, void *p) { @@ -214,14 +207,12 @@ kbc_alias_reg_read(uint16_t addr, void *p) return ret; } - static void kbc_alias_reg_write(uint16_t addr, uint8_t val, void *p) { outb(0x61, val); } - static void kbc_alias_update_io_mapping(piix_t *dev) { @@ -230,63 +221,59 @@ kbc_alias_update_io_mapping(piix_t *dev) io_removehandler(0x0067, 1, kbc_alias_reg_read, NULL, NULL, kbc_alias_reg_write, NULL, NULL, dev); if (dev->regs[0][0x4e] & 0x08) { - io_sethandler(0x0063, 1, kbc_alias_reg_read, NULL, NULL, kbc_alias_reg_write, NULL, NULL, dev); - io_sethandler(0x0065, 1, kbc_alias_reg_read, NULL, NULL, kbc_alias_reg_write, NULL, NULL, dev); - io_sethandler(0x0067, 1, kbc_alias_reg_read, NULL, NULL, kbc_alias_reg_write, NULL, NULL, dev); + io_sethandler(0x0063, 1, kbc_alias_reg_read, NULL, NULL, kbc_alias_reg_write, NULL, NULL, dev); + io_sethandler(0x0065, 1, kbc_alias_reg_read, NULL, NULL, kbc_alias_reg_write, NULL, NULL, dev); + io_sethandler(0x0067, 1, kbc_alias_reg_read, NULL, NULL, kbc_alias_reg_write, NULL, NULL, dev); } } - static void smbus_update_io_mapping(piix_t *dev) { smbus_piix4_remap(dev->smbus, ((uint16_t) (dev->regs[3][0x91] << 8)) | (dev->regs[3][0x90] & 0xf0), (dev->regs[3][PCI_REG_COMMAND] & PCI_COMMAND_IO) && (dev->regs[3][0xd2] & 0x01)); } - static void nvr_update_io_mapping(piix_t *dev) { if (dev->nvr_io_base != 0x0000) { - piix_log("Removing NVR at %04X...\n", dev->nvr_io_base); - nvr_at_handler(0, dev->nvr_io_base, dev->nvr); - nvr_at_handler(0, dev->nvr_io_base + 0x0002, dev->nvr); - nvr_at_handler(0, dev->nvr_io_base + 0x0004, dev->nvr); + piix_log("Removing NVR at %04X...\n", dev->nvr_io_base); + nvr_at_handler(0, dev->nvr_io_base, dev->nvr); + nvr_at_handler(0, dev->nvr_io_base + 0x0002, dev->nvr); + nvr_at_handler(0, dev->nvr_io_base + 0x0004, dev->nvr); } if (dev->type == 5) - dev->nvr_io_base = (dev->regs[0][0xd5] << 8) | (dev->regs[0][0xd4] & 0xf0); + dev->nvr_io_base = (dev->regs[0][0xd5] << 8) | (dev->regs[0][0xd4] & 0xf0); else - dev->nvr_io_base = 0x70; + dev->nvr_io_base = 0x70; piix_log("New NVR I/O base: %04X\n", dev->nvr_io_base); if (dev->regs[0][0xcb] & 0x01) { - piix_log("Adding low NVR at %04X...\n", dev->nvr_io_base); - if (dev->nvr_io_base != 0x0000) { - nvr_at_handler(1, dev->nvr_io_base, dev->nvr); - nvr_at_handler(1, dev->nvr_io_base + 0x0004, dev->nvr); - } + piix_log("Adding low NVR at %04X...\n", dev->nvr_io_base); + if (dev->nvr_io_base != 0x0000) { + nvr_at_handler(1, dev->nvr_io_base, dev->nvr); + nvr_at_handler(1, dev->nvr_io_base + 0x0004, dev->nvr); + } } if (dev->regs[0][0xcb] & 0x04) { - piix_log("Adding high NVR at %04X...\n", dev->nvr_io_base + 0x0002); - if (dev->nvr_io_base != 0x0000) - nvr_at_handler(1, dev->nvr_io_base + 0x0002, dev->nvr); + piix_log("Adding high NVR at %04X...\n", dev->nvr_io_base + 0x0002); + if (dev->nvr_io_base != 0x0000) + nvr_at_handler(1, dev->nvr_io_base + 0x0002, dev->nvr); } } - static void piix_trap_io(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv) { piix_io_trap_t *trap = (piix_io_trap_t *) priv; if (*(trap->en_reg) & trap->en_mask) { - *(trap->sts_reg) |= trap->sts_mask; - acpi_raise_smi(trap->dev->acpi, 1); + *(trap->sts_reg) |= trap->sts_mask; + acpi_raise_smi(trap->dev->acpi, 1); } } - static void piix_trap_io_ide(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv) { @@ -294,44 +281,42 @@ piix_trap_io_ide(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv /* IDE traps are per drive, not per channel. */ if (ide_drives[trap->dev_id]->selected) - piix_trap_io(size, addr, write, val, priv); + piix_trap_io(size, addr, write, val, priv); } - static void piix_trap_update_devctl(piix_t *dev, uint8_t trap_id, uint8_t dev_id, - uint32_t devctl_mask, uint8_t enable, - uint16_t addr, uint16_t size) + uint32_t devctl_mask, uint8_t enable, + uint16_t addr, uint16_t size) { piix_io_trap_t *trap = &dev->io_traps[trap_id]; - enable = (dev->acpi->regs.devctl & devctl_mask) && enable; + enable = (dev->acpi->regs.devctl & devctl_mask) && enable; /* Set up Device I/O traps dynamically. */ if (enable && !trap->trap) { - trap->dev = dev; - trap->trap = io_trap_add((dev_id <= 3) ? piix_trap_io_ide : piix_trap_io, trap); - trap->dev_id = dev_id; - trap->sts_reg = &dev->acpi->regs.devsts; - trap->sts_mask = 0x00010000 << dev_id; - trap->en_reg = &dev->acpi->regs.devctl; - trap->en_mask = devctl_mask; + trap->dev = dev; + trap->trap = io_trap_add((dev_id <= 3) ? piix_trap_io_ide : piix_trap_io, trap); + trap->dev_id = dev_id; + trap->sts_reg = &dev->acpi->regs.devsts; + trap->sts_mask = 0x00010000 << dev_id; + trap->en_reg = &dev->acpi->regs.devctl; + trap->en_mask = devctl_mask; } #ifdef ENABLE_PIIX_LOG if ((dev_id == 9) || (dev_id == 10) || (dev_id == 12) || (dev_id == 13)) - piix_log("PIIX: Mapping trap device %d to %04X-%04X (enable %d)\n", dev_id, addr, addr + size - 1, enable); + piix_log("PIIX: Mapping trap device %d to %04X-%04X (enable %d)\n", dev_id, addr, addr + size - 1, enable); #endif /* Remap I/O trap. */ io_trap_remap(trap->trap, enable, addr, size); } - static void piix_trap_update(void *priv) { - piix_t *dev = (piix_t *) priv; - uint8_t trap_id = 0, *fregs = dev->regs[3]; + piix_t *dev = (piix_t *) priv; + uint8_t trap_id = 0, *fregs = dev->regs[3]; uint16_t temp; piix_trap_update_devctl(dev, trap_id++, 0, 0x00000002, 1, 0x1f0, 8); @@ -350,10 +335,18 @@ piix_trap_update(void *priv) piix_trap_update_devctl(dev, trap_id++, 4, 0x00000200, fregs[0x5c] & 0x10, 0x200, 8); piix_trap_update_devctl(dev, trap_id++, 4, 0x00000200, fregs[0x5c] & 0x08, 0x388, 4); switch (fregs[0x5d] & 0x03) { - case 0x00: temp = 0x530; break; - case 0x01: temp = 0x604; break; - case 0x02: temp = 0xe80; break; - default: temp = 0xf40; break; + case 0x00: + temp = 0x530; + break; + case 0x01: + temp = 0x604; + break; + case 0x02: + temp = 0xe80; + break; + default: + temp = 0xf40; + break; } piix_trap_update_devctl(dev, trap_id++, 4, 0x00000200, fregs[0x5c] & 0x80, temp, 8); piix_trap_update_devctl(dev, trap_id++, 4, 0x00000200, fregs[0x5c] & 0x01, 0x300 + (0x10 * ((fregs[0x5c] >> 1) & 0x03)), 4); @@ -362,49 +355,81 @@ piix_trap_update(void *priv) piix_trap_update_devctl(dev, trap_id++, 5, 0x00000800, fregs[0x51] & 0x10, 0x377 + (0x80 * !(fregs[0x63] & 0x10)), 1); switch (fregs[0x67] & 0x07) { - case 0x00: temp = 0x3f8; break; - case 0x01: temp = 0x2f8; break; - case 0x02: temp = 0x220; break; - case 0x03: temp = 0x228; break; - case 0x04: temp = 0x238; break; - case 0x05: temp = 0x2e8; break; - case 0x06: temp = 0x338; break; - default: temp = 0x3e8; break; + case 0x00: + temp = 0x3f8; + break; + case 0x01: + temp = 0x2f8; + break; + case 0x02: + temp = 0x220; + break; + case 0x03: + temp = 0x228; + break; + case 0x04: + temp = 0x238; + break; + case 0x05: + temp = 0x2e8; + break; + case 0x06: + temp = 0x338; + break; + default: + temp = 0x3e8; + break; } piix_trap_update_devctl(dev, trap_id++, 6, 0x00002000, fregs[0x51] & 0x40, temp, 8); switch (fregs[0x67] & 0x70) { - case 0x00: temp = 0x3f8; break; - case 0x10: temp = 0x2f8; break; - case 0x20: temp = 0x220; break; - case 0x30: temp = 0x228; break; - case 0x40: temp = 0x238; break; - case 0x50: temp = 0x2e8; break; - case 0x60: temp = 0x338; break; - default: temp = 0x3e8; break; + case 0x00: + temp = 0x3f8; + break; + case 0x10: + temp = 0x2f8; + break; + case 0x20: + temp = 0x220; + break; + case 0x30: + temp = 0x228; + break; + case 0x40: + temp = 0x238; + break; + case 0x50: + temp = 0x2e8; + break; + case 0x60: + temp = 0x338; + break; + default: + temp = 0x3e8; + break; } piix_trap_update_devctl(dev, trap_id++, 7, 0x00008000, fregs[0x52] & 0x01, temp, 8); switch (fregs[0x63] & 0x06) { - case 0x00: - piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0x3bc, 4); - piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0x7bc, 3); - break; + case 0x00: + piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0x3bc, 4); + piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0x7bc, 3); + break; - case 0x02: - piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0x378, 8); - piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0x778, 3); - break; + case 0x02: + piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0x378, 8); + piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0x778, 3); + break; - case 0x04: - piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0x278, 8); - piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0x678, 3); - break; + case 0x04: + piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0x278, 8); + piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0x678, 3); + break; - default: - piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0, 0); - piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0, 0); - break; + default: + piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0, 0); + piix_trap_update_devctl(dev, trap_id++, 8, 0x00020000, fregs[0x52] & 0x04, 0, 0); + break; } temp = fregs[0x62] & 0x0f; @@ -427,639 +452,700 @@ piix_trap_update(void *priv) /* Programmable memory trap not implemented. */ } - static void piix_write(int func, int addr, uint8_t val, void *priv) { - piix_t *dev = (piix_t *) priv; + piix_t *dev = (piix_t *) priv; uint8_t *fregs; uint16_t base; - int i; + int i; /* Return on unsupported function. */ if (dev->max_func > 0) { - if (func > dev->max_func) - return; + if (func > dev->max_func) + return; } else { - if (func > 1) - return; + if (func > 1) + return; } /* Ignore the new IDE BAR's on the Intel chips. */ if ((dev->type < 5) && (func == 1) && (addr >= 0x10) && (addr <= 0x1f)) - return; + return; piix_log("PIIX function %i write: %02X to %02X\n", func, val, addr); fregs = (uint8_t *) dev->regs[func]; - if (func == 0) switch (addr) { - case 0x04: - fregs[0x04] = (val & 0x08) | 0x07; - break; - case 0x05: - if (dev->type > 1) - fregs[0x05] = (val & 0x01); - break; - case 0x07: - if ((val & 0x40) && (dev->type > 1)) - fregs[0x07] &= 0xbf; - if (val & 0x20) - fregs[0x07] &= 0xdf; - if (val & 0x10) - fregs[0x07] &= 0xef; - if (val & 0x08) - fregs[0x07] &= 0xf7; - if (val & 0x04) - fregs[0x07] &= 0xfb; - break; - case 0x4c: - fregs[0x4c] = val; - if (dev->type > 1) - dma_alias_remove(); - else - dma_alias_remove_piix(); - if (!(val & 0x80)) { - if (dev->type > 1) - dma_alias_set(); - else - dma_alias_set_piix(); - } - break; - case 0x4e: - fregs[0x4e] = val; - keyboard_at_set_mouse_scan((val & 0x10) ? 1 : 0); - if (dev->type >= 4) - kbc_alias_update_io_mapping(dev); - break; - case 0x4f: - if (dev->type > 3) - fregs[0x4f] = val & 0x07; - else if (dev->type == 3) - fregs[0x4f] = val & 0x01; - break; - case 0x60: case 0x61: case 0x62: case 0x63: - piix_log("Set IRQ routing: INT %c -> %02X\n", 0x41 + (addr & 0x03), val); - fregs[addr] = val & 0x8f; - if (val & 0x80) - pci_set_irq_routing(PCI_INTA + (addr & 0x03), PCI_IRQ_DISABLED); - else - pci_set_irq_routing(PCI_INTA + (addr & 0x03), val & 0xf); - break; - case 0x64: - if (dev->type > 3) - fregs[0x64] = val; - break; - case 0x65: - if (dev->type > 4) - fregs[0x65] = val; - break; - case 0x66: - if (dev->type > 4) - fregs[0x66] = val & 0x81; - break; - case 0x69: - if (dev->type > 1) - fregs[0x69] = val & 0xfe; - else - fregs[0x69] = val & 0xfa; - break; - case 0x6a: - switch (dev->type) { - case 1: - default: - fregs[0x6a] = (fregs[0x6a] & 0xfb) | (val & 0x04); - fregs[0x0e] = (val & 0x04) ? 0x80 : 0x00; - piix_log("PIIX: Write %02X\n", val); - dev->max_func = 0 + !!(val & 0x04); - break; - case 3: - fregs[0x6a] = val & 0xd1; - piix_log("PIIX3: Write %02X\n", val); - dev->max_func = 1 + !!(val & 0x10); - break; - case 4: - fregs[0x6a] = val & 0x80; - break; - case 5: - /* This case is needed so it doesn't behave the PIIX way on the SMSC. */ - break; - } - break; - case 0x6b: - if ((dev->type > 1) && (dev->type <= 4) && (val & 0x80)) - fregs[0x6b] &= 0x7f; - return; - case 0x70: case 0x71: - if ((dev->type > 1) && (addr == 0x71)) - break; - if (dev->type < 4) { - piix_log("Set MIRQ routing: MIRQ%i -> %02X\n", addr & 0x01, val); - if (dev->type > 1) - fregs[addr] = val & 0xef; - else - fregs[addr] = val & 0xcf; - if (val & 0x80) - pci_set_mirq_routing(PCI_MIRQ0 + (addr & 0x01), PCI_IRQ_DISABLED); - else - pci_set_mirq_routing(PCI_MIRQ0 + (addr & 0x01), val & 0xf); - piix_log("MIRQ%i is %s\n", addr & 0x01, (val & 0x20) ? "disabled" : "enabled"); - } - break; - case 0x76: case 0x77: - if (dev->type > 1) - fregs[addr] = val & 0x87; - else if (dev->type <= 4) - fregs[addr] = val & 0x8f; - break; - case 0x78: case 0x79: - if (dev->type < 4) - fregs[addr] = val; - break; - case 0x80: - if (dev->type > 1) - fregs[addr] = val & 0x7f; - break; - case 0x81: - if (dev->type > 1) - fregs[addr] = val & 0x0f; - break; - case 0x82: - if (dev->type > 3) - fregs[addr] = val & 0x0f; - break; - case 0x90: - if (dev->type > 3) - fregs[addr] = val; - break; - case 0x91: - if (dev->type > 3) - fregs[addr] = val & 0xfc; - break; - case 0x92: case 0x93: case 0x94: case 0x95: - if (dev->type > 3) { - if (addr & 0x01) - fregs[addr] = val & 0xff; - else - fregs[addr] = val & 0xc0; + if (func == 0) + switch (addr) { + case 0x04: + fregs[0x04] = (val & 0x08) | 0x07; + break; + case 0x05: + if (dev->type > 1) + fregs[0x05] = (val & 0x01); + break; + case 0x07: + if ((val & 0x40) && (dev->type > 1)) + fregs[0x07] &= 0xbf; + if (val & 0x20) + fregs[0x07] &= 0xdf; + if (val & 0x10) + fregs[0x07] &= 0xef; + if (val & 0x08) + fregs[0x07] &= 0xf7; + if (val & 0x04) + fregs[0x07] &= 0xfb; + break; + case 0x4c: + fregs[0x4c] = val; + if (dev->type > 1) + dma_alias_remove(); + else + dma_alias_remove_piix(); + if (!(val & 0x80)) { + if (dev->type > 1) + dma_alias_set(); + else + dma_alias_set_piix(); + } + break; + case 0x4e: + fregs[0x4e] = val; + keyboard_at_set_mouse_scan((val & 0x10) ? 1 : 0); + if (dev->type >= 4) + kbc_alias_update_io_mapping(dev); + break; + case 0x4f: + if (dev->type > 3) + fregs[0x4f] = val & 0x07; + else if (dev->type == 3) + fregs[0x4f] = val & 0x01; + break; + case 0x60: + case 0x61: + case 0x62: + case 0x63: + piix_log("Set IRQ routing: INT %c -> %02X\n", 0x41 + (addr & 0x03), val); + fregs[addr] = val & 0x8f; + if (val & 0x80) + pci_set_irq_routing(PCI_INTA + (addr & 0x03), PCI_IRQ_DISABLED); + else + pci_set_irq_routing(PCI_INTA + (addr & 0x03), val & 0xf); + break; + case 0x64: + if (dev->type > 3) + fregs[0x64] = val; + break; + case 0x65: + if (dev->type > 4) + fregs[0x65] = val; + break; + case 0x66: + if (dev->type > 4) + fregs[0x66] = val & 0x81; + break; + case 0x69: + if (dev->type > 1) + fregs[0x69] = val & 0xfe; + else + fregs[0x69] = val & 0xfa; + break; + case 0x6a: + switch (dev->type) { + case 1: + default: + fregs[0x6a] = (fregs[0x6a] & 0xfb) | (val & 0x04); + fregs[0x0e] = (val & 0x04) ? 0x80 : 0x00; + piix_log("PIIX: Write %02X\n", val); + dev->max_func = 0 + !!(val & 0x04); + break; + case 3: + fregs[0x6a] = val & 0xd1; + piix_log("PIIX3: Write %02X\n", val); + dev->max_func = 1 + !!(val & 0x10); + break; + case 4: + fregs[0x6a] = val & 0x80; + break; + case 5: + /* This case is needed so it doesn't behave the PIIX way on the SMSC. */ + break; + } + break; + case 0x6b: + if ((dev->type > 1) && (dev->type <= 4) && (val & 0x80)) + fregs[0x6b] &= 0x7f; + return; + case 0x70: + case 0x71: + if ((dev->type > 1) && (addr == 0x71)) + break; + if (dev->type < 4) { + piix_log("Set MIRQ routing: MIRQ%i -> %02X\n", addr & 0x01, val); + if (dev->type > 1) + fregs[addr] = val & 0xef; + else + fregs[addr] = val & 0xcf; + if (val & 0x80) + pci_set_mirq_routing(PCI_MIRQ0 + (addr & 0x01), PCI_IRQ_DISABLED); + else + pci_set_mirq_routing(PCI_MIRQ0 + (addr & 0x01), val & 0xf); + piix_log("MIRQ%i is %s\n", addr & 0x01, (val & 0x20) ? "disabled" : "enabled"); + } + break; + case 0x76: + case 0x77: + if (dev->type > 1) + fregs[addr] = val & 0x87; + else if (dev->type <= 4) + fregs[addr] = val & 0x8f; + break; + case 0x78: + case 0x79: + if (dev->type < 4) + fregs[addr] = val; + break; + case 0x80: + if (dev->type > 1) + fregs[addr] = val & 0x7f; + break; + case 0x81: + if (dev->type > 1) + fregs[addr] = val & 0x0f; + break; + case 0x82: + if (dev->type > 3) + fregs[addr] = val & 0x0f; + break; + case 0x90: + if (dev->type > 3) + fregs[addr] = val; + break; + case 0x91: + if (dev->type > 3) + fregs[addr] = val & 0xfc; + break; + case 0x92: + case 0x93: + case 0x94: + case 0x95: + if (dev->type > 3) { + if (addr & 0x01) + fregs[addr] = val & 0xff; + else + fregs[addr] = val & 0xc0; - base = fregs[addr | 0x01] << 8; - base |= fregs[addr & 0xfe]; + base = fregs[addr | 0x01] << 8; + base |= fregs[addr & 0xfe]; - for (i = 0; i < 4; i++) - ddma_update_io_mapping(dev->ddma, (addr & 4) + i, fregs[addr & 0xfe] + (i << 4), fregs[addr | 0x01], (base != 0x0000)); - } - break; - case 0xa0: - if (dev->type < 4) { - fregs[addr] = val & 0x1f; - apm_set_do_smi(dev->apm, !!(val & 0x01) && !!(fregs[0xa2] & 0x80)); - switch ((val & 0x18) >> 3) { - case 0x00: - dev->fast_off_period = PCICLK * 32768.0 * 60000.0; - break; - case 0x01: - default: - dev->fast_off_period = 0.0; - break; - case 0x02: - dev->fast_off_period = PCICLK; - break; - case 0x03: - dev->fast_off_period = PCICLK * 32768.0; - break; - } - cpu_fast_off_count = cpu_fast_off_val + 1; - cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); - } - break; - case 0xa2: - if (dev->type < 4) { - fregs[addr] = val & 0xff; - apm_set_do_smi(dev->apm, !!(fregs[0xa0] & 0x01) && !!(val & 0x80)); - } - break; - case 0xac: case 0xae: - if (dev->type < 4) - fregs[addr] = val & 0xff; - break; - case 0xa3: - if (dev->type == 3) - fregs[addr] = val & 0x01; - break; - case 0xa4: - if (dev->type < 4) { - fregs[addr] = val & 0xfb; - cpu_fast_off_flags = (cpu_fast_off_flags & 0xffffff00) | fregs[addr]; - } - break; - case 0xa5: - if (dev->type < 4) { - fregs[addr] = val & 0xff; - cpu_fast_off_flags = (cpu_fast_off_flags & 0xffff00ff) | (fregs[addr] << 8); - } - break; - case 0xa6: - if (dev->type < 4) { - fregs[addr] = val & 0xff; - cpu_fast_off_flags = (cpu_fast_off_flags & 0xff00ffff) | (fregs[addr] << 16); - } - break; - case 0xa7: - if (dev->type == 3) - fregs[addr] = val & 0xef; - else if (dev->type < 3) - fregs[addr] = val; - if (dev->type < 4) - cpu_fast_off_flags = (cpu_fast_off_flags & 0x00ffffff) | (fregs[addr] << 24); - break; - case 0xa8: - if (dev->type < 3) { - fregs[addr] = val & 0xff; - cpu_fast_off_val = val; - cpu_fast_off_count = val + 1; - cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); - } - break; - case 0xaa: - if (dev->type < 4) - fregs[addr] &= val; - break; - case 0xab: - if (dev->type == 3) - fregs[addr] &= (val & 0x01); - else if (dev->type < 3) - fregs[addr] = val; - break; - case 0xb0: - if (dev->type == 4) - fregs[addr] = (fregs[addr] & 0x8c) | (val & 0x73); - else if (dev->type == 5) - fregs[addr] = val & 0x7f; + for (i = 0; i < 4; i++) + ddma_update_io_mapping(dev->ddma, (addr & 4) + i, fregs[addr & 0xfe] + (i << 4), fregs[addr | 0x01], (base != 0x0000)); + } + break; + case 0xa0: + if (dev->type < 4) { + fregs[addr] = val & 0x1f; + apm_set_do_smi(dev->apm, !!(val & 0x01) && !!(fregs[0xa2] & 0x80)); + switch ((val & 0x18) >> 3) { + case 0x00: + dev->fast_off_period = PCICLK * 32768.0 * 60000.0; + break; + case 0x01: + default: + dev->fast_off_period = 0.0; + break; + case 0x02: + dev->fast_off_period = PCICLK; + break; + case 0x03: + dev->fast_off_period = PCICLK * 32768.0; + break; + } + cpu_fast_off_count = cpu_fast_off_val + 1; + cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); + } + break; + case 0xa2: + if (dev->type < 4) { + fregs[addr] = val & 0xff; + apm_set_do_smi(dev->apm, !!(fregs[0xa0] & 0x01) && !!(val & 0x80)); + } + break; + case 0xac: + case 0xae: + if (dev->type < 4) + fregs[addr] = val & 0xff; + break; + case 0xa3: + if (dev->type == 3) + fregs[addr] = val & 0x01; + break; + case 0xa4: + if (dev->type < 4) { + fregs[addr] = val & 0xfb; + cpu_fast_off_flags = (cpu_fast_off_flags & 0xffffff00) | fregs[addr]; + } + break; + case 0xa5: + if (dev->type < 4) { + fregs[addr] = val & 0xff; + cpu_fast_off_flags = (cpu_fast_off_flags & 0xffff00ff) | (fregs[addr] << 8); + } + break; + case 0xa6: + if (dev->type < 4) { + fregs[addr] = val & 0xff; + cpu_fast_off_flags = (cpu_fast_off_flags & 0xff00ffff) | (fregs[addr] << 16); + } + break; + case 0xa7: + if (dev->type == 3) + fregs[addr] = val & 0xef; + else if (dev->type < 3) + fregs[addr] = val; + if (dev->type < 4) + cpu_fast_off_flags = (cpu_fast_off_flags & 0x00ffffff) | (fregs[addr] << 24); + break; + case 0xa8: + if (dev->type < 3) { + fregs[addr] = val & 0xff; + cpu_fast_off_val = val; + cpu_fast_off_count = val + 1; + cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); + } + break; + case 0xaa: + if (dev->type < 4) + fregs[addr] &= val; + break; + case 0xab: + if (dev->type == 3) + fregs[addr] &= (val & 0x01); + else if (dev->type < 3) + fregs[addr] = val; + break; + case 0xb0: + if (dev->type == 4) + fregs[addr] = (fregs[addr] & 0x8c) | (val & 0x73); + else if (dev->type == 5) + fregs[addr] = val & 0x7f; - if (dev->type >= 4) - alt_access = !!(val & 0x20); - break; - case 0xb1: - if (dev->type > 3) - fregs[addr] = val & 0xdf; - break; - case 0xb2: - if (dev->type > 3) - fregs[addr] = val; - break; - case 0xb3: - if (dev->type > 3) - fregs[addr] = val & 0xfb; - break; - case 0xcb: - if (dev->type > 3) { - fregs[addr] = val & 0x3d; + if (dev->type >= 4) + alt_access = !!(val & 0x20); + break; + case 0xb1: + if (dev->type > 3) + fregs[addr] = val & 0xdf; + break; + case 0xb2: + if (dev->type > 3) + fregs[addr] = val; + break; + case 0xb3: + if (dev->type > 3) + fregs[addr] = val & 0xfb; + break; + case 0xcb: + if (dev->type > 3) { + fregs[addr] = val & 0x3d; - nvr_update_io_mapping(dev); + nvr_update_io_mapping(dev); - nvr_wp_set(!!(val & 0x08), 0, dev->nvr); - nvr_wp_set(!!(val & 0x10), 1, dev->nvr); - } - break; - case 0xd4: - if ((dev->type > 4) && !(fregs[addr] & 0x01)) { - fregs[addr] = val & 0xf1; - nvr_update_io_mapping(dev); - } - break; - case 0xd5: - if ((dev->type > 4) && !(fregs[0xd4] & 0x01)) { - fregs[addr] = val & 0xff; - nvr_update_io_mapping(dev); - } - break; - case 0xe0: - if (dev->type > 4) - fregs[addr] = val & 0xe7; - break; - case 0xe1: case 0xe4: case 0xe5: case 0xe6: case 0xe7: - case 0xe8: case 0xe9: case 0xea: case 0xeb: - if (dev->type > 4) { - fregs[addr] = val; - if ((dev->type == 5) && (addr == 0xe1)) { - smsc_ide_irqs(dev); - port_92_set_features(dev->port_92, !!(val & 0x40), !!(val & 0x40)); - } - } - break; - } else if (func == 1) switch(addr) { /* IDE */ - case 0x04: - fregs[0x04] = (val & 5); - if (dev->type <= 3) - fregs[0x04] |= 0x02; - piix_ide_handlers(dev, 0x03); - piix_ide_bm_handlers(dev); - break; - case 0x07: - fregs[0x07] &= ~(val & 0x38); - break; - case 0x09: - if (dev->type == 5) { - fregs[0x09] = (fregs[0x09] & 0xfa) | (val & 0x05); - piix_ide_handlers(dev, 0x03); - smsc_ide_irqs(dev); - } - break; - case 0x0d: - fregs[0x0d] = val & 0xf0; - break; - case 0x10: - if (dev->type == 5) { - fregs[0x10] = (val & 0xf8) | 1; - piix_ide_handlers(dev, 0x01); - } - break; - case 0x11: - if (dev->type == 5) { - fregs[0x11] = val; - piix_ide_handlers(dev, 0x01); - } - break; - case 0x14: - if (dev->type == 5) { - fregs[0x14] = (val & 0xfc) | 1; - piix_ide_handlers(dev, 0x01); - } - break; - case 0x15: - if (dev->type == 5) { - fregs[0x15] = val; - piix_ide_handlers(dev, 0x01); - } - break; - case 0x18: - if (dev->type == 5) { - fregs[0x18] = (val & 0xf8) | 1; - piix_ide_handlers(dev, 0x02); - } - break; - case 0x19: - if (dev->type == 5) { - fregs[0x19] = val; - piix_ide_handlers(dev, 0x02); - } - break; - case 0x1c: - if (dev->type == 5) { - fregs[0x1c] = (val & 0xfc) | 1; - piix_ide_handlers(dev, 0x02); - } - break; - case 0x1d: - if (dev->type == 5) { - fregs[0x1d] = val; - piix_ide_handlers(dev, 0x02); - } - break; - case 0x20: - fregs[0x20] = (val & 0xf0) | 1; - piix_ide_bm_handlers(dev); - break; - case 0x21: - fregs[0x21] = val; - piix_ide_bm_handlers(dev); - break; - case 0x3c: - if (dev->type == 5) - fregs[0x3c] = val; - break; - case 0x3d: - if (dev->type == 5) - fregs[0x3d] = val; - break; - case 0x40: case 0x42: - fregs[addr] = val; - break; - case 0x41: case 0x43: - fregs[addr] = val & ((dev->type > 1) ? 0xf3 : 0xb3); - piix_ide_handlers(dev, 1 << !!(addr & 0x02)); - break; - case 0x44: - if (dev->type > 1) - fregs[0x44] = val; - break; - case 0x45: - if (dev->type > 4) - fregs[0x45] = val; - break; - case 0x46: - if (dev->type > 4) - fregs[0x46] = val & 0x03; - break; - case 0x48: - if (dev->type > 3) - fregs[0x48] = val & 0x0f; - break; - case 0x4a: case 0x4b: - if (dev->type > 3) - fregs[addr] = val & 0x33; - break; - case 0x5c: case 0x5d: - if (dev->type > 4) - fregs[addr] = val; - break; - default: - break; - } else if (func == 2) switch(addr) { /* USB */ - case 0x04: - if (dev->type > 4) { - fregs[0x04] = (val & 7); - ohci_update_mem_mapping(dev->usb, fregs[0x11], fregs[0x12], fregs[0x13], fregs[PCI_REG_COMMAND] & PCI_COMMAND_MEM); - } else { - fregs[0x04] = (val & 5); - uhci_update_io_mapping(dev->usb, fregs[0x20] & ~0x1f, fregs[0x21], fregs[PCI_REG_COMMAND] & PCI_COMMAND_IO); - } - break; - case 0x07: - if (dev->type > 4) { - if (val & 0x80) - fregs[0x07] &= 0x7f; - if (val & 0x40) - fregs[0x07] &= 0xbf; - } - if (val & 0x20) - fregs[0x07] &= 0xdf; - if (val & 0x10) - fregs[0x07] &= 0xef; - if (val & 0x08) - fregs[0x07] &= 0xf7; - break; - case 0x0c: - if (dev->type > 4) - fregs[0x0c] = val; - break; - case 0x0d: - if (dev->type < 5) - fregs[0x0d] = val & 0xf0; - break; - case 0x11: - if (dev->type > 4) { - fregs[addr] = val & 0xf0; - ohci_update_mem_mapping(dev->usb, fregs[0x11], fregs[0x12], fregs[0x13], 1 /*fregs[PCI_REG_COMMAND] & PCI_COMMAND_MEM*/); - } - break; - case 0x12: case 0x13: - if (dev->type > 4) { - fregs[addr] = val; - ohci_update_mem_mapping(dev->usb, fregs[0x11], fregs[0x12], fregs[0x13], 1 /*fregs[PCI_REG_COMMAND] & PCI_COMMAND_MEM*/); - } - break; - case 0x20: - if (dev->type < 5) { - fregs[0x20] = (val & 0xe0) | 1; - uhci_update_io_mapping(dev->usb, fregs[0x20] & ~0x1f, fregs[0x21], fregs[PCI_REG_COMMAND] & PCI_COMMAND_IO); - } - break; - case 0x21: - if (dev->type < 5) { - fregs[0x21] = val; - uhci_update_io_mapping(dev->usb, fregs[0x20] & ~0x1f, fregs[0x21], fregs[PCI_REG_COMMAND] & PCI_COMMAND_IO); - } - break; - case 0x3c: - fregs[0x3c] = val; - break; - case 0x3e: case 0x3f: - case 0x40: case 0x41: case 0x43: - if (dev->type > 4) - fregs[addr] = val; - break; - case 0x42: - if (dev->type > 4) - fregs[addr] = val & 0x8f; - break; - case 0x44: case 0x45: - if (dev->type > 4) - fregs[addr] = val & 0x01; - break; - case 0x6a: - if (dev->type <= 4) - fregs[0x6a] = val & 0x01; - break; - case 0xc0: - if (dev->type <= 4) - fregs[0xc0] = (fregs[0xc0] & ~(val & 0xbf)) | (val & 0x20); - break; - case 0xc1: - if (dev->type <= 4) - fregs[0xc1] &= ~val; - break; - case 0xff: - if (dev->type == 4) { - fregs[addr] = val & 0x10; - nvr_read_addr_set(!!(val & 0x10), dev->nvr); - } - break; - } else if (func == 3) switch(addr) { /* Power Management */ - case 0x04: - fregs[0x04] = (val & 0x01); - smbus_update_io_mapping(dev); - apm_set_do_smi(dev->acpi->apm, !!(fregs[0x5b] & 0x02) && !!(val & 0x01)); - break; - case 0x07: - if (val & 0x08) - fregs[0x07] &= 0xf7; - break; + nvr_wp_set(!!(val & 0x08), 0, dev->nvr); + nvr_wp_set(!!(val & 0x10), 1, dev->nvr); + } + break; + case 0xd4: + if ((dev->type > 4) && !(fregs[addr] & 0x01)) { + fregs[addr] = val & 0xf1; + nvr_update_io_mapping(dev); + } + break; + case 0xd5: + if ((dev->type > 4) && !(fregs[0xd4] & 0x01)) { + fregs[addr] = val & 0xff; + nvr_update_io_mapping(dev); + } + break; + case 0xe0: + if (dev->type > 4) + fregs[addr] = val & 0xe7; + break; + case 0xe1: + case 0xe4: + case 0xe5: + case 0xe6: + case 0xe7: + case 0xe8: + case 0xe9: + case 0xea: + case 0xeb: + if (dev->type > 4) { + fregs[addr] = val; + if ((dev->type == 5) && (addr == 0xe1)) { + smsc_ide_irqs(dev); + port_92_set_features(dev->port_92, !!(val & 0x40), !!(val & 0x40)); + } + } + break; + } + else if (func == 1) + switch (addr) { /* IDE */ + case 0x04: + fregs[0x04] = (val & 5); + if (dev->type <= 3) + fregs[0x04] |= 0x02; + piix_ide_handlers(dev, 0x03); + piix_ide_bm_handlers(dev); + break; + case 0x07: + fregs[0x07] &= ~(val & 0x38); + break; + case 0x09: + if (dev->type == 5) { + fregs[0x09] = (fregs[0x09] & 0xfa) | (val & 0x05); + piix_ide_handlers(dev, 0x03); + smsc_ide_irqs(dev); + } + break; + case 0x0d: + fregs[0x0d] = val & 0xf0; + break; + case 0x10: + if (dev->type == 5) { + fregs[0x10] = (val & 0xf8) | 1; + piix_ide_handlers(dev, 0x01); + } + break; + case 0x11: + if (dev->type == 5) { + fregs[0x11] = val; + piix_ide_handlers(dev, 0x01); + } + break; + case 0x14: + if (dev->type == 5) { + fregs[0x14] = (val & 0xfc) | 1; + piix_ide_handlers(dev, 0x01); + } + break; + case 0x15: + if (dev->type == 5) { + fregs[0x15] = val; + piix_ide_handlers(dev, 0x01); + } + break; + case 0x18: + if (dev->type == 5) { + fregs[0x18] = (val & 0xf8) | 1; + piix_ide_handlers(dev, 0x02); + } + break; + case 0x19: + if (dev->type == 5) { + fregs[0x19] = val; + piix_ide_handlers(dev, 0x02); + } + break; + case 0x1c: + if (dev->type == 5) { + fregs[0x1c] = (val & 0xfc) | 1; + piix_ide_handlers(dev, 0x02); + } + break; + case 0x1d: + if (dev->type == 5) { + fregs[0x1d] = val; + piix_ide_handlers(dev, 0x02); + } + break; + case 0x20: + fregs[0x20] = (val & 0xf0) | 1; + piix_ide_bm_handlers(dev); + break; + case 0x21: + fregs[0x21] = val; + piix_ide_bm_handlers(dev); + break; + case 0x3c: + if (dev->type == 5) + fregs[0x3c] = val; + break; + case 0x3d: + if (dev->type == 5) + fregs[0x3d] = val; + break; + case 0x40: + case 0x42: + fregs[addr] = val; + break; + case 0x41: + case 0x43: + fregs[addr] = val & ((dev->type > 1) ? 0xf3 : 0xb3); + piix_ide_handlers(dev, 1 << !!(addr & 0x02)); + break; + case 0x44: + if (dev->type > 1) + fregs[0x44] = val; + break; + case 0x45: + if (dev->type > 4) + fregs[0x45] = val; + break; + case 0x46: + if (dev->type > 4) + fregs[0x46] = val & 0x03; + break; + case 0x48: + if (dev->type > 3) + fregs[0x48] = val & 0x0f; + break; + case 0x4a: + case 0x4b: + if (dev->type > 3) + fregs[addr] = val & 0x33; + break; + case 0x5c: + case 0x5d: + if (dev->type > 4) + fregs[addr] = val; + break; + default: + break; + } + else if (func == 2) + switch (addr) { /* USB */ + case 0x04: + if (dev->type > 4) { + fregs[0x04] = (val & 7); + ohci_update_mem_mapping(dev->usb, fregs[0x11], fregs[0x12], fregs[0x13], fregs[PCI_REG_COMMAND] & PCI_COMMAND_MEM); + } else { + fregs[0x04] = (val & 5); + uhci_update_io_mapping(dev->usb, fregs[0x20] & ~0x1f, fregs[0x21], fregs[PCI_REG_COMMAND] & PCI_COMMAND_IO); + } + break; + case 0x07: + if (dev->type > 4) { + if (val & 0x80) + fregs[0x07] &= 0x7f; + if (val & 0x40) + fregs[0x07] &= 0xbf; + } + if (val & 0x20) + fregs[0x07] &= 0xdf; + if (val & 0x10) + fregs[0x07] &= 0xef; + if (val & 0x08) + fregs[0x07] &= 0xf7; + break; + case 0x0c: + if (dev->type > 4) + fregs[0x0c] = val; + break; + case 0x0d: + if (dev->type < 5) + fregs[0x0d] = val & 0xf0; + break; + case 0x11: + if (dev->type > 4) { + fregs[addr] = val & 0xf0; + ohci_update_mem_mapping(dev->usb, fregs[0x11], fregs[0x12], fregs[0x13], 1 /*fregs[PCI_REG_COMMAND] & PCI_COMMAND_MEM*/); + } + break; + case 0x12: + case 0x13: + if (dev->type > 4) { + fregs[addr] = val; + ohci_update_mem_mapping(dev->usb, fregs[0x11], fregs[0x12], fregs[0x13], 1 /*fregs[PCI_REG_COMMAND] & PCI_COMMAND_MEM*/); + } + break; + case 0x20: + if (dev->type < 5) { + fregs[0x20] = (val & 0xe0) | 1; + uhci_update_io_mapping(dev->usb, fregs[0x20] & ~0x1f, fregs[0x21], fregs[PCI_REG_COMMAND] & PCI_COMMAND_IO); + } + break; + case 0x21: + if (dev->type < 5) { + fregs[0x21] = val; + uhci_update_io_mapping(dev->usb, fregs[0x20] & ~0x1f, fregs[0x21], fregs[PCI_REG_COMMAND] & PCI_COMMAND_IO); + } + break; + case 0x3c: + fregs[0x3c] = val; + break; + case 0x3e: + case 0x3f: + case 0x40: + case 0x41: + case 0x43: + if (dev->type > 4) + fregs[addr] = val; + break; + case 0x42: + if (dev->type > 4) + fregs[addr] = val & 0x8f; + break; + case 0x44: + case 0x45: + if (dev->type > 4) + fregs[addr] = val & 0x01; + break; + case 0x6a: + if (dev->type <= 4) + fregs[0x6a] = val & 0x01; + break; + case 0xc0: + if (dev->type <= 4) + fregs[0xc0] = (fregs[0xc0] & ~(val & 0xbf)) | (val & 0x20); + break; + case 0xc1: + if (dev->type <= 4) + fregs[0xc1] &= ~val; + break; + case 0xff: + if (dev->type == 4) { + fregs[addr] = val & 0x10; + nvr_read_addr_set(!!(val & 0x10), dev->nvr); + } + break; + } + else if (func == 3) + switch (addr) { /* Power Management */ + case 0x04: + fregs[0x04] = (val & 0x01); + smbus_update_io_mapping(dev); + apm_set_do_smi(dev->acpi->apm, !!(fregs[0x5b] & 0x02) && !!(val & 0x01)); + break; + case 0x07: + if (val & 0x08) + fregs[0x07] &= 0xf7; + break; #if 0 case 0x3c: fregs[0x3c] = val; break; #endif - case 0x40: - fregs[0x40] = (val & 0xc0) | 1; - dev->acpi_io_base = (dev->regs[3][0x41] << 8) | (dev->regs[3][0x40] & 0xc0); - acpi_update_io_mapping(dev->acpi, dev->acpi_io_base, (dev->regs[3][0x80] & 0x01)); - break; - case 0x41: - fregs[0x41] = val; - dev->acpi_io_base = (dev->regs[3][0x41] << 8) | (dev->regs[3][0x40] & 0xc0); - acpi_update_io_mapping(dev->acpi, dev->acpi_io_base, (dev->regs[3][0x80] & 0x01)); - break; - case 0x44: case 0x45: case 0x46: case 0x47: - case 0x48: case 0x49: - case 0x4c: case 0x4d: case 0x4e: - case 0x54: case 0x55: case 0x56: case 0x57: - case 0x59: case 0x5a: - case 0x5c: case 0x5d: case 0x5e: case 0x5f: - case 0x60: case 0x61: case 0x62: - case 0x64: case 0x65: - case 0x67: case 0x68: case 0x69: - case 0x6c: case 0x6e: case 0x6f: - case 0x70: case 0x71: - case 0x74: case 0x77: case 0x78: case 0x79: - case 0x7c: case 0x7d: - case 0xd3: case 0xd4: - case 0xd5: - fregs[addr] = val; - if ((addr == 0x5c) || (addr == 0x60) || (addr == 0x61) || (addr == 0x62) || - (addr == 0x64) || (addr == 0x65) || (addr == 0x68) || (addr == 0x69) || - (addr == 0x70) || (addr == 0x71)) - piix_trap_update(dev); - break; - case 0x4a: - fregs[addr] = val & 0x73; - break; - case 0x4b: - fregs[addr] = val & 0x01; - break; - case 0x4f: case 0x80: case 0xd2: - fregs[addr] = val & 0x0f; - if (addr == 0x80) - acpi_update_io_mapping(dev->acpi, dev->acpi_io_base, (dev->regs[3][0x80] & 0x01)); - else if (addr == 0xd2) - smbus_update_io_mapping(dev); - break; - case 0x50: - fregs[addr] = val & 0x3f; - break; - case 0x51: - fregs[addr] = val & 0x58; - piix_trap_update(dev); - break; - case 0x52: - fregs[addr] = val & 0x7f; - piix_trap_update(dev); - break; - case 0x58: - fregs[addr] = val & 0x77; - break; - case 0x5b: - fregs[addr] = val & 0x03; - apm_set_do_smi(dev->acpi->apm, !!(val & 0x02) && !!(fregs[0x04] & 0x01)); - break; - case 0x63: - fregs[addr] = val & 0xf7; - piix_trap_update(dev); - break; - case 0x66: - fregs[addr] = val & 0xef; - piix_trap_update(dev); - break; - case 0x6a: case 0x72: case 0x7a: case 0x7e: - fregs[addr] = val & 0x1f; - if ((addr == 0x6a) || (addr == 0x72)) - piix_trap_update(dev); - break; - case 0x6d: case 0x75: - fregs[addr] = val & 0x80; - break; - case 0x90: - fregs[0x90] = (val & 0xf0) | 1; - smbus_update_io_mapping(dev); - break; - case 0x91: - fregs[0x91] = val; - smbus_update_io_mapping(dev); - break; - } + case 0x40: + fregs[0x40] = (val & 0xc0) | 1; + dev->acpi_io_base = (dev->regs[3][0x41] << 8) | (dev->regs[3][0x40] & 0xc0); + acpi_update_io_mapping(dev->acpi, dev->acpi_io_base, (dev->regs[3][0x80] & 0x01)); + break; + case 0x41: + fregs[0x41] = val; + dev->acpi_io_base = (dev->regs[3][0x41] << 8) | (dev->regs[3][0x40] & 0xc0); + acpi_update_io_mapping(dev->acpi, dev->acpi_io_base, (dev->regs[3][0x80] & 0x01)); + break; + case 0x44: + case 0x45: + case 0x46: + case 0x47: + case 0x48: + case 0x49: + case 0x4c: + case 0x4d: + case 0x4e: + case 0x54: + case 0x55: + case 0x56: + case 0x57: + case 0x59: + case 0x5a: + case 0x5c: + case 0x5d: + case 0x5e: + case 0x5f: + case 0x60: + case 0x61: + case 0x62: + case 0x64: + case 0x65: + case 0x67: + case 0x68: + case 0x69: + case 0x6c: + case 0x6e: + case 0x6f: + case 0x70: + case 0x71: + case 0x74: + case 0x77: + case 0x78: + case 0x79: + case 0x7c: + case 0x7d: + case 0xd3: + case 0xd4: + case 0xd5: + fregs[addr] = val; + if ((addr == 0x5c) || (addr == 0x60) || (addr == 0x61) || (addr == 0x62) || (addr == 0x64) || (addr == 0x65) || (addr == 0x68) || (addr == 0x69) || (addr == 0x70) || (addr == 0x71)) + piix_trap_update(dev); + break; + case 0x4a: + fregs[addr] = val & 0x73; + break; + case 0x4b: + fregs[addr] = val & 0x01; + break; + case 0x4f: + case 0x80: + case 0xd2: + fregs[addr] = val & 0x0f; + if (addr == 0x80) + acpi_update_io_mapping(dev->acpi, dev->acpi_io_base, (dev->regs[3][0x80] & 0x01)); + else if (addr == 0xd2) + smbus_update_io_mapping(dev); + break; + case 0x50: + fregs[addr] = val & 0x3f; + break; + case 0x51: + fregs[addr] = val & 0x58; + piix_trap_update(dev); + break; + case 0x52: + fregs[addr] = val & 0x7f; + piix_trap_update(dev); + break; + case 0x58: + fregs[addr] = val & 0x77; + break; + case 0x5b: + fregs[addr] = val & 0x03; + apm_set_do_smi(dev->acpi->apm, !!(val & 0x02) && !!(fregs[0x04] & 0x01)); + break; + case 0x63: + fregs[addr] = val & 0xf7; + piix_trap_update(dev); + break; + case 0x66: + fregs[addr] = val & 0xef; + piix_trap_update(dev); + break; + case 0x6a: + case 0x72: + case 0x7a: + case 0x7e: + fregs[addr] = val & 0x1f; + if ((addr == 0x6a) || (addr == 0x72)) + piix_trap_update(dev); + break; + case 0x6d: + case 0x75: + fregs[addr] = val & 0x80; + break; + case 0x90: + fregs[0x90] = (val & 0xf0) | 1; + smbus_update_io_mapping(dev); + break; + case 0x91: + fregs[0x91] = val; + smbus_update_io_mapping(dev); + break; + } } - static uint8_t piix_read(int func, int addr, void *priv) { @@ -1067,38 +1153,36 @@ piix_read(int func, int addr, void *priv) uint8_t ret = 0xff, *fregs; if ((dev->type == 3) && (func == 2) && (dev->max_func == 1) && (addr >= 0x40)) - ret = 0x00; + ret = 0x00; /* Return on unsupported function. */ if ((func <= dev->max_func) || ((func == 1) && (dev->max_func == 0))) { - fregs = (uint8_t *) dev->regs[func]; - ret = fregs[addr]; - if ((func == 0) && (addr == 0x4e)) - ret |= keyboard_at_get_mouse_scan(); - else if ((func == 2) && (addr == 0xff)) - ret |= 0xef; + fregs = (uint8_t *) dev->regs[func]; + ret = fregs[addr]; + if ((func == 0) && (addr == 0x4e)) + ret |= keyboard_at_get_mouse_scan(); + else if ((func == 2) && (addr == 0xff)) + ret |= 0xef; - piix_log("PIIX function %i read: %02X from %02X\n", func, ret, addr); + piix_log("PIIX function %i read: %02X from %02X\n", func, ret, addr); } return ret; } - static void board_write(uint16_t port, uint8_t val, void *priv) { piix_t *dev = (piix_t *) priv; if (port == 0x0078) - dev->board_config[0] = val; + dev->board_config[0] = val; else if (port == 0x00e0) - dev->cur_readout_reg = val; + dev->cur_readout_reg = val; else if (port == 0x00e1) - dev->readout_regs[dev->cur_readout_reg] = val; + dev->readout_regs[dev->cur_readout_reg] = val; } - static uint8_t board_read(uint16_t port, void *priv) { @@ -1106,22 +1190,21 @@ board_read(uint16_t port, void *priv) uint8_t ret = 0x64; if (port == 0x0078) - ret = dev->board_config[0]; + ret = dev->board_config[0]; else if (port == 0x0079) - ret = dev->board_config[1]; + ret = dev->board_config[1]; else if (port == 0x00e0) - ret = dev->cur_readout_reg; + ret = dev->cur_readout_reg; else if (port == 0x00e1) - ret = dev->readout_regs[dev->cur_readout_reg]; + ret = dev->readout_regs[dev->cur_readout_reg]; return ret; } - static void piix_reset_hard(piix_t *dev) { - int i; + int i; uint8_t *fregs; uint16_t old_base = (dev->regs[1][0x20] & 0xf0) | (dev->regs[1][0x21] << 8); @@ -1130,17 +1213,17 @@ piix_reset_hard(piix_t *dev) sff_bus_master_reset(dev->bm[1], old_base + 8); if (dev->type >= 4) { - sff_set_slot(dev->bm[0], dev->pci_slot); - sff_set_irq_pin(dev->bm[0], PCI_INTA); - sff_set_irq_line(dev->bm[0], 14); - sff_set_irq_mode(dev->bm[0], 0, 0); - sff_set_irq_mode(dev->bm[0], 1, 0); + sff_set_slot(dev->bm[0], dev->pci_slot); + sff_set_irq_pin(dev->bm[0], PCI_INTA); + sff_set_irq_line(dev->bm[0], 14); + sff_set_irq_mode(dev->bm[0], 0, 0); + sff_set_irq_mode(dev->bm[0], 1, 0); - sff_set_slot(dev->bm[1], dev->pci_slot); - sff_set_irq_pin(dev->bm[1], PCI_INTA); - sff_set_irq_line(dev->bm[1], 14); - sff_set_irq_mode(dev->bm[1], 0, 0); - sff_set_irq_mode(dev->bm[1], 1, 0); + sff_set_slot(dev->bm[1], dev->pci_slot); + sff_set_irq_pin(dev->bm[1], PCI_INTA); + sff_set_irq_line(dev->bm[1], 14); + sff_set_irq_mode(dev->bm[1], 0, 0); + sff_set_irq_mode(dev->bm[1], 1, 0); } #ifdef ENABLE_PIIX_LOG @@ -1150,70 +1233,74 @@ piix_reset_hard(piix_t *dev) ide_sec_disable(); if (dev->type > 3) { - nvr_at_handler(0, 0x0072, dev->nvr); - nvr_wp_set(0, 0, dev->nvr); - nvr_wp_set(0, 1, dev->nvr); - nvr_at_handler(1, 0x0074, dev->nvr); - dev->nvr_io_base = 0x0070; + nvr_at_handler(0, 0x0072, dev->nvr); + nvr_wp_set(0, 0, dev->nvr); + nvr_wp_set(0, 1, dev->nvr); + nvr_at_handler(1, 0x0074, dev->nvr); + dev->nvr_io_base = 0x0070; } /* Clear all 4 functions' arrays and set their vendor and device ID's. */ for (i = 0; i < 4; i++) { - memset(dev->regs[i], 0, 256); - if (dev->type == 5) { - dev->regs[i][0x00] = 0x55; dev->regs[i][0x01] = 0x10; /* SMSC/EFAR */ - if (i == 1) { /* IDE controller is 9130, breaking convention */ - dev->regs[i][0x02] = 0x30; - dev->regs[i][0x03] = 0x91; - } else { - dev->regs[i][0x02] = (dev->func0_id & 0xff) + (i << dev->func_shift); - dev->regs[i][0x03] = (dev->func0_id >> 8); - } - } else { - dev->regs[i][0x00] = 0x86; dev->regs[i][0x01] = 0x80; /* Intel */ - dev->regs[i][0x02] = (dev->func0_id & 0xff) + (i << dev->func_shift); - dev->regs[i][0x03] = (dev->func0_id >> 8); - } + memset(dev->regs[i], 0, 256); + if (dev->type == 5) { + dev->regs[i][0x00] = 0x55; + dev->regs[i][0x01] = 0x10; /* SMSC/EFAR */ + if (i == 1) { /* IDE controller is 9130, breaking convention */ + dev->regs[i][0x02] = 0x30; + dev->regs[i][0x03] = 0x91; + } else { + dev->regs[i][0x02] = (dev->func0_id & 0xff) + (i << dev->func_shift); + dev->regs[i][0x03] = (dev->func0_id >> 8); + } + } else { + dev->regs[i][0x00] = 0x86; + dev->regs[i][0x01] = 0x80; /* Intel */ + dev->regs[i][0x02] = (dev->func0_id & 0xff) + (i << dev->func_shift); + dev->regs[i][0x03] = (dev->func0_id >> 8); + } } /* Function 0: PCI to ISA Bridge */ fregs = (uint8_t *) dev->regs[0]; piix_log("PIIX Function 0: %02X%02X:%02X%02X\n", fregs[0x01], fregs[0x00], fregs[0x03], fregs[0x02]); fregs[0x04] = 0x07; - fregs[0x06] = 0x80; fregs[0x07] = 0x02; + fregs[0x06] = 0x80; + fregs[0x07] = 0x02; if (dev->type == 4) - fregs[0x08] = (dev->rev & 0x08) ? 0x02 : (dev->rev & 0x07); + fregs[0x08] = (dev->rev & 0x08) ? 0x02 : (dev->rev & 0x07); else - fregs[0x08] = dev->rev; + fregs[0x08] = dev->rev; fregs[0x09] = 0x00; - fregs[0x0a] = 0x01; fregs[0x0b] = 0x06; + fregs[0x0a] = 0x01; + fregs[0x0b] = 0x06; fregs[0x0e] = ((dev->type > 1) || (dev->rev != 2)) ? 0x80 : 0x00; fregs[0x4c] = 0x4d; fregs[0x4e] = 0x03; fregs[0x60] = fregs[0x61] = fregs[0x62] = fregs[0x63] = 0x80; - fregs[0x64] = (dev->type > 3) ? 0x10 : 0x00; - fregs[0x69] = 0x02; + fregs[0x64] = (dev->type > 3) ? 0x10 : 0x00; + fregs[0x69] = 0x02; if ((dev->type == 1) && (dev->rev != 2)) - fregs[0x6a] = 0x04; + fregs[0x6a] = 0x04; else if (dev->type == 3) - fregs[0x6a] = 0x10; + fregs[0x6a] = 0x10; fregs[0x70] = (dev->type < 4) ? 0x80 : 0x00; fregs[0x71] = (dev->type < 3) ? 0x80 : 0x00; if (dev->type <= 4) { - fregs[0x76] = fregs[0x77] = (dev->type > 1) ? 0x04 : 0x0c; + fregs[0x76] = fregs[0x77] = (dev->type > 1) ? 0x04 : 0x0c; } fregs[0x78] = (dev->type < 4) ? 0x02 : 0x00; fregs[0xa0] = (dev->type < 4) ? 0x08 : 0x00; fregs[0xa8] = (dev->type < 4) ? 0x0f : 0x00; if (dev->type > 3) - fregs[0xb0] = (is_pentium) ? 0x00 : 0x04; + fregs[0xb0] = (is_pentium) ? 0x00 : 0x04; fregs[0xcb] = (dev->type > 3) ? 0x21 : 0x00; if (dev->type > 4) { - fregs[0xd4] = 0x70; - fregs[0xe1] = 0x40; - fregs[0xe6] = 0x12; - fregs[0xe8] = 0x02; - fregs[0xea] = 0x12; + fregs[0xd4] = 0x70; + fregs[0xe1] = 0x40; + fregs[0xe6] = 0x12; + fregs[0xe8] = 0x02; + fregs[0xea] = 0x12; } dev->max_func = 0; @@ -1221,78 +1308,90 @@ piix_reset_hard(piix_t *dev) fregs = (uint8_t *) dev->regs[1]; piix_log("PIIX Function 1: %02X%02X:%02X%02X\n", fregs[0x01], fregs[0x00], fregs[0x03], fregs[0x02]); if (dev->type < 4) - fregs[0x04] = 0x02; - fregs[0x06] = 0x80; fregs[0x07] = 0x02; + fregs[0x04] = 0x02; + fregs[0x06] = 0x80; + fregs[0x07] = 0x02; if (dev->type == 4) - fregs[0x08] = dev->rev & 0x07; + fregs[0x08] = dev->rev & 0x07; else - fregs[0x08] = dev->rev; + fregs[0x08] = dev->rev; if (dev->type == 5) - fregs[0x09] = 0x8a; + fregs[0x09] = 0x8a; else - fregs[0x09] = 0x80; - fregs[0x0a] = 0x01; fregs[0x0b] = 0x01; + fregs[0x09] = 0x80; + fregs[0x0a] = 0x01; + fregs[0x0b] = 0x01; if (dev->type == 5) { - fregs[0x10] = 0xf1; fregs[0x11] = 0x01; - fregs[0x14] = 0xf5; fregs[0x15] = 0x03; - fregs[0x18] = 0x71; fregs[0x19] = 0x01; - fregs[0x1c] = 0x75; fregs[0x1d] = 0x03; + fregs[0x10] = 0xf1; + fregs[0x11] = 0x01; + fregs[0x14] = 0xf5; + fregs[0x15] = 0x03; + fregs[0x18] = 0x71; + fregs[0x19] = 0x01; + fregs[0x1c] = 0x75; + fregs[0x1d] = 0x03; } fregs[0x20] = 0x01; if (dev->type == 5) { - fregs[0x3c] = 0x0e; fregs[0x3d] = 0x01; - fregs[0x45] = 0x55; fregs[0x46] = 0x01; + fregs[0x3c] = 0x0e; + fregs[0x3d] = 0x01; + fregs[0x45] = 0x55; + fregs[0x46] = 0x01; } if ((dev->type == 1) && (dev->rev == 2)) - dev->max_func = 0; /* It starts with IDE disabled, then enables it. */ + dev->max_func = 0; /* It starts with IDE disabled, then enables it. */ else - dev->max_func = 1; + dev->max_func = 1; /* Function 2: USB */ if (dev->type > 1) { - fregs = (uint8_t *) dev->regs[2]; - piix_log("PIIX Function 2: %02X%02X:%02X%02X\n", fregs[0x01], fregs[0x00], fregs[0x03], fregs[0x02]); - fregs[0x06] = 0x80; fregs[0x07] = 0x02; - if (dev->type == 4) - fregs[0x08] = dev->rev & 0x07; - else if (dev->type < 4) - fregs[0x08] = 0x01; - else - fregs[0x08] = 0x02; - if (dev->type > 4) - fregs[0x09] = 0x10; /* SMSC has OHCI rather than UHCI */ - fregs[0x0a] = 0x03; fregs[0x0b] = 0x0c; - if (dev->type < 5) - fregs[0x20] = 0x01; - fregs[0x3d] = 0x04; - if (dev->type > 4) - fregs[0x60] = (dev->type > 3) ? 0x10 : 0x00; - if (dev->type < 5) { - fregs[0x6a] = (dev->type == 3) ? 0x01 : 0x00; - fregs[0xc1] = 0x20; - fregs[0xff] = (dev->type > 3) ? 0x10 : 0x00; - } - dev->max_func = 2; /* It starts with USB disabled, then enables it. */ + fregs = (uint8_t *) dev->regs[2]; + piix_log("PIIX Function 2: %02X%02X:%02X%02X\n", fregs[0x01], fregs[0x00], fregs[0x03], fregs[0x02]); + fregs[0x06] = 0x80; + fregs[0x07] = 0x02; + if (dev->type == 4) + fregs[0x08] = dev->rev & 0x07; + else if (dev->type < 4) + fregs[0x08] = 0x01; + else + fregs[0x08] = 0x02; + if (dev->type > 4) + fregs[0x09] = 0x10; /* SMSC has OHCI rather than UHCI */ + fregs[0x0a] = 0x03; + fregs[0x0b] = 0x0c; + if (dev->type < 5) + fregs[0x20] = 0x01; + fregs[0x3d] = 0x04; + if (dev->type > 4) + fregs[0x60] = (dev->type > 3) ? 0x10 : 0x00; + if (dev->type < 5) { + fregs[0x6a] = (dev->type == 3) ? 0x01 : 0x00; + fregs[0xc1] = 0x20; + fregs[0xff] = (dev->type > 3) ? 0x10 : 0x00; + } + dev->max_func = 2; /* It starts with USB disabled, then enables it. */ } /* Function 3: Power Management */ if (dev->type > 3) { - fregs = (uint8_t *) dev->regs[3]; - piix_log("PIIX Function 3: %02X%02X:%02X%02X\n", fregs[0x01], fregs[0x00], fregs[0x03], fregs[0x02]); - fregs[0x06] = 0x80; fregs[0x07] = 0x02; - if (dev->type > 4) - fregs[0x08] = 0x02; - else - fregs[0x08] = (dev->rev & 0x08) ? 0x02 : 0x01 /*(dev->rev & 0x07)*/; - fregs[0x0a] = 0x80; fregs[0x0b] = 0x06; - /* NOTE: The Specification Update says this should default to 0x00 and be read-only. */ + fregs = (uint8_t *) dev->regs[3]; + piix_log("PIIX Function 3: %02X%02X:%02X%02X\n", fregs[0x01], fregs[0x00], fregs[0x03], fregs[0x02]); + fregs[0x06] = 0x80; + fregs[0x07] = 0x02; + if (dev->type > 4) + fregs[0x08] = 0x02; + else + fregs[0x08] = (dev->rev & 0x08) ? 0x02 : 0x01 /*(dev->rev & 0x07)*/; + fregs[0x0a] = 0x80; + fregs[0x0b] = 0x06; + /* NOTE: The Specification Update says this should default to 0x00 and be read-only. */ #ifdef WRONG_SPEC - if (dev->type == 4) - fregs[0x3d] = 0x01; + if (dev->type == 4) + fregs[0x3d] = 0x01; #endif - fregs[0x40] = 0x01; - fregs[0x90] = 0x01; - dev->max_func = 3; + fregs[0x40] = 0x01; + fregs[0x90] = 0x01; + dev->max_func = 3; } pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED); @@ -1301,27 +1400,25 @@ piix_reset_hard(piix_t *dev) pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED); if (dev->type < 4) - pci_set_mirq_routing(PCI_MIRQ0, PCI_IRQ_DISABLED); + pci_set_mirq_routing(PCI_MIRQ0, PCI_IRQ_DISABLED); if (dev->type < 3) - pci_set_mirq_routing(PCI_MIRQ1, PCI_IRQ_DISABLED); + pci_set_mirq_routing(PCI_MIRQ1, PCI_IRQ_DISABLED); if (dev->type >= 4) - acpi_init_gporeg(dev->acpi, 0xff, 0xbf, 0xff, 0x7f); + acpi_init_gporeg(dev->acpi, 0xff, 0xbf, 0xff, 0x7f); } - static void piix_apm_out(uint16_t port, uint8_t val, void *p) { piix_t *dev = (piix_t *) p; if (dev->apm->do_smi) { - if (dev->type < 4) - dev->regs[0][0xaa] |= 0x80; + if (dev->type < 4) + dev->regs[0][0xaa] |= 0x80; } } - static void piix_fast_off_count(void *priv) { @@ -1331,40 +1428,39 @@ piix_fast_off_count(void *priv) dev->regs[0][0xaa] |= 0x20; } - static void piix_reset(void *p) { - piix_t *dev = (piix_t *)p; + piix_t *dev = (piix_t *) p; if (dev->type > 3) { - piix_write(3, 0x04, 0x00, p); - piix_write(3, 0x5b, 0x00, p); + piix_write(3, 0x04, 0x00, p); + piix_write(3, 0x5b, 0x00, p); } else { - piix_write(0, 0xa0, 0x08, p); - piix_write(0, 0xa2, 0x00, p); - piix_write(0, 0xa4, 0x00, p); - piix_write(0, 0xa5, 0x00, p); - piix_write(0, 0xa6, 0x00, p); - piix_write(0, 0xa7, 0x00, p); - piix_write(0, 0xa8, 0x0f, p); + piix_write(0, 0xa0, 0x08, p); + piix_write(0, 0xa2, 0x00, p); + piix_write(0, 0xa4, 0x00, p); + piix_write(0, 0xa5, 0x00, p); + piix_write(0, 0xa6, 0x00, p); + piix_write(0, 0xa7, 0x00, p); + piix_write(0, 0xa8, 0x0f, p); } if (dev->type == 5) - piix_write(0, 0xe1, 0x40, p); + piix_write(0, 0xe1, 0x40, p); piix_write(1, 0x04, 0x00, p); if (dev->type == 5) { - piix_write(1, 0x09, 0x8a, p); - piix_write(1, 0x10, 0xf1, p); - piix_write(1, 0x11, 0x01, p); - piix_write(1, 0x14, 0xf5, p); - piix_write(1, 0x15, 0x03, p); - piix_write(1, 0x18, 0x71, p); - piix_write(1, 0x19, 0x01, p); - piix_write(1, 0x1c, 0x75, p); - piix_write(1, 0x1d, 0x03, p); + piix_write(1, 0x09, 0x8a, p); + piix_write(1, 0x10, 0xf1, p); + piix_write(1, 0x11, 0x01, p); + piix_write(1, 0x14, 0xf5, p); + piix_write(1, 0x15, 0x03, p); + piix_write(1, 0x18, 0x71, p); + piix_write(1, 0x19, 0x01, p); + piix_write(1, 0x1c, 0x75, p); + piix_write(1, 0x1d, 0x03, p); } else - piix_write(1, 0x09, 0x80, p); + piix_write(1, 0x09, 0x80, p); piix_write(1, 0x20, 0x01, p); piix_write(1, 0x21, 0x00, p); piix_write(1, 0x41, 0x00, p); @@ -1374,83 +1470,81 @@ piix_reset(void *p) ide_sec_disable(); if (dev->type >= 3) { - piix_write(2, 0x04, 0x00, p); - if (dev->type == 5) { - piix_write(2, 0x10, 0x00, p); - piix_write(2, 0x11, 0x00, p); - piix_write(2, 0x12, 0x00, p); - piix_write(2, 0x13, 0x00, p); - } else { - piix_write(2, 0x20, 0x01, p); - piix_write(2, 0x21, 0x00, p); - piix_write(2, 0x22, 0x00, p); - piix_write(2, 0x23, 0x00, p); - } + piix_write(2, 0x04, 0x00, p); + if (dev->type == 5) { + piix_write(2, 0x10, 0x00, p); + piix_write(2, 0x11, 0x00, p); + piix_write(2, 0x12, 0x00, p); + piix_write(2, 0x13, 0x00, p); + } else { + piix_write(2, 0x20, 0x01, p); + piix_write(2, 0x21, 0x00, p); + piix_write(2, 0x22, 0x00, p); + piix_write(2, 0x23, 0x00, p); + } } if (dev->type >= 4) { - piix_write(0, 0xb0, (is_pentium) ? 0x00 : 0x04, p); - piix_write(3, 0x40, 0x01, p); - piix_write(3, 0x41, 0x00, p); - piix_write(3, 0x5b, 0x00, p); - piix_write(3, 0x80, 0x00, p); - piix_write(3, 0x90, 0x01, p); - piix_write(3, 0x91, 0x00, p); - piix_write(3, 0xd2, 0x00, p); + piix_write(0, 0xb0, (is_pentium) ? 0x00 : 0x04, p); + piix_write(3, 0x40, 0x01, p); + piix_write(3, 0x41, 0x00, p); + piix_write(3, 0x5b, 0x00, p); + piix_write(3, 0x80, 0x00, p); + piix_write(3, 0x90, 0x01, p); + piix_write(3, 0x91, 0x00, p); + piix_write(3, 0xd2, 0x00, p); } sff_set_irq_mode(dev->bm[0], 0, 0); sff_set_irq_mode(dev->bm[1], 0, 0); if (dev->no_mirq0 || (dev->type >= 4)) { - sff_set_irq_mode(dev->bm[0], 1, 0); - sff_set_irq_mode(dev->bm[1], 1, 0); + sff_set_irq_mode(dev->bm[0], 1, 0); + sff_set_irq_mode(dev->bm[1], 1, 0); } else { - sff_set_irq_mode(dev->bm[0], 1, 2); - sff_set_irq_mode(dev->bm[1], 1, 2); + sff_set_irq_mode(dev->bm[0], 1, 2); + sff_set_irq_mode(dev->bm[1], 1, 2); } } - static void piix_close(void *priv) { piix_t *dev = (piix_t *) priv; for (int i = 0; i < (sizeof(dev->io_traps) / sizeof(dev->io_traps[0])); i++) - io_trap_remove(dev->io_traps[i].trap); + io_trap_remove(dev->io_traps[i].trap); free(dev); } - static void piix_speed_changed(void *priv) { piix_t *dev = (piix_t *) priv; if (!dev) - return; + return; int te = timer_is_enabled(&dev->fast_off_timer); timer_stop(&dev->fast_off_timer); if (te) - timer_on_auto(&dev->fast_off_timer, ((double) cpu_fast_off_val + 1) * dev->fast_off_period); + timer_on_auto(&dev->fast_off_timer, ((double) cpu_fast_off_val + 1) * dev->fast_off_period); } - static void -*piix_init(const device_t *info) + * + piix_init(const device_t *info) { piix_t *dev = (piix_t *) malloc(sizeof(piix_t)); memset(dev, 0, sizeof(piix_t)); dev->type = info->local & 0x0f; /* If (dev->type == 4) and (dev->rev & 0x08), then this is PIIX4E. */ - dev->rev = (info->local >> 4) & 0x0f; + dev->rev = (info->local >> 4) & 0x0f; dev->func_shift = (info->local >> 8) & 0x0f; - dev->no_mirq0 = (info->local >> 12) & 0x0f; - dev->func0_id = info->local >> 16; + dev->no_mirq0 = (info->local >> 12) & 0x0f; + dev->func0_id = info->local >> 16; dev->pci_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, piix_read, piix_write, dev); piix_log("PIIX%i: Added to slot: %02X\n", dev->type, dev->pci_slot); @@ -1459,55 +1553,55 @@ static void dev->bm[0] = device_add_inst(&sff8038i_device, 1); dev->bm[1] = device_add_inst(&sff8038i_device, 2); if ((dev->type == 1) && (dev->rev == 2)) { - /* PIIX rev. 02 has faulty bus mastering on real hardware, - so set our devices IDE devices to force ATA-3 (no DMA). */ - ide_board_set_force_ata3(0, 1); - ide_board_set_force_ata3(1, 1); + /* PIIX rev. 02 has faulty bus mastering on real hardware, + so set our devices IDE devices to force ATA-3 (no DMA). */ + ide_board_set_force_ata3(0, 1); + ide_board_set_force_ata3(1, 1); } sff_set_irq_mode(dev->bm[0], 0, 0); sff_set_irq_mode(dev->bm[1], 0, 0); if (dev->no_mirq0 || (dev->type >= 4)) { - sff_set_irq_mode(dev->bm[0], 1, 0); - sff_set_irq_mode(dev->bm[1], 1, 0); + sff_set_irq_mode(dev->bm[0], 1, 0); + sff_set_irq_mode(dev->bm[1], 1, 0); } else { - sff_set_irq_mode(dev->bm[0], 1, 2); - sff_set_irq_mode(dev->bm[1], 1, 2); + sff_set_irq_mode(dev->bm[0], 1, 2); + sff_set_irq_mode(dev->bm[1], 1, 2); } if (dev->type >= 3) - dev->usb = device_add(&usb_device); + dev->usb = device_add(&usb_device); if (dev->type > 3) { - dev->nvr = device_add(&piix4_nvr_device); - dev->smbus = device_add(&piix4_smbus_device); + dev->nvr = device_add(&piix4_nvr_device); + dev->smbus = device_add(&piix4_smbus_device); - dev->acpi = device_add(&acpi_intel_device); - acpi_set_slot(dev->acpi, dev->pci_slot); - acpi_set_nvr(dev->acpi, dev->nvr); - acpi_set_gpireg2_default(dev->acpi, (dev->type > 4) ? 0xf1 : 0xdd); - acpi_set_trap_update(dev->acpi, piix_trap_update, dev); + dev->acpi = device_add(&acpi_intel_device); + acpi_set_slot(dev->acpi, dev->pci_slot); + acpi_set_nvr(dev->acpi, dev->nvr); + acpi_set_gpireg2_default(dev->acpi, (dev->type > 4) ? 0xf1 : 0xdd); + acpi_set_trap_update(dev->acpi, piix_trap_update, dev); - dev->ddma = device_add(&ddma_device); + dev->ddma = device_add(&ddma_device); } else - timer_add(&dev->fast_off_timer, piix_fast_off_count, dev, 0); + timer_add(&dev->fast_off_timer, piix_fast_off_count, dev, 0); piix_reset_hard(dev); piix_log("Maximum function: %i\n", dev->max_func); cpu_fast_off_flags = 0x00000000; if (dev->type < 4) { - cpu_fast_off_val = dev->regs[0][0xa8]; - cpu_fast_off_count = cpu_fast_off_val + 1; - cpu_register_fast_off_handler(&dev->fast_off_timer); + cpu_fast_off_val = dev->regs[0][0xa8]; + cpu_fast_off_count = cpu_fast_off_val + 1; + cpu_register_fast_off_handler(&dev->fast_off_timer); } else - cpu_fast_off_val = cpu_fast_off_count = 0; + cpu_fast_off_val = cpu_fast_off_count = 0; /* On PIIX4, PIIX4E, and SMSC, APM is added by the ACPI device. */ if (dev->type < 4) { - dev->apm = device_add(&apm_pci_device); - /* APM intercept handler to update PIIX/PIIX3 and PIIX4/4E/SMSC ACPI SMI status on APM SMI. */ - io_sethandler(0x00b2, 0x0001, NULL, NULL, NULL, piix_apm_out, NULL, NULL, dev); + dev->apm = device_add(&apm_pci_device); + /* APM intercept handler to update PIIX/PIIX3 and PIIX4/4E/SMSC ACPI SMI status on APM SMI. */ + io_sethandler(0x00b2, 0x0001, NULL, NULL, NULL, piix_apm_out, NULL, NULL, dev); } dev->port_92 = device_add(&port_92_pci_device); @@ -1517,9 +1611,9 @@ static void dma_alias_set(); if (dev->type < 4) - pci_enable_mirq(0); + pci_enable_mirq(0); if (dev->type < 3) - pci_enable_mirq(1); + pci_enable_mirq(1); dev->readout_regs[0] = 0xff; dev->readout_regs[1] = 0x40; @@ -1527,31 +1621,31 @@ static void /* Port E1 register 01 (TODO: Find how multipliers > 3.0 are defined): - Bit 6: 1 = can boot, 0 = no; - Bit 7, 1 = multiplier (00 = 2.5, 01 = 2.0, 10 = 3.0, 11 = 1.5); - Bit 5, 4 = bus speed (00 = 50 MHz, 01 = 66 MHz, 10 = 60 MHz, 11 = ????): - Bit 7, 5, 4, 1: 0000 = 125 MHz, 0010 = 166 MHz, 0100 = 150 MHz, 0110 = ??? MHz; - 0001 = 100 MHz, 0011 = 133 MHz, 0101 = 120 MHz, 0111 = ??? MHz; - 1000 = 150 MHz, 1010 = 200 MHz, 1100 = 180 MHz, 1110 = ??? MHz; - 1001 = 75 MHz, 1011 = 100 MHz, 1101 = 90 MHz, 1111 = ??? MHz */ + Bit 6: 1 = can boot, 0 = no; + Bit 7, 1 = multiplier (00 = 2.5, 01 = 2.0, 10 = 3.0, 11 = 1.5); + Bit 5, 4 = bus speed (00 = 50 MHz, 01 = 66 MHz, 10 = 60 MHz, 11 = ????): + Bit 7, 5, 4, 1: 0000 = 125 MHz, 0010 = 166 MHz, 0100 = 150 MHz, 0110 = ??? MHz; + 0001 = 100 MHz, 0011 = 133 MHz, 0101 = 120 MHz, 0111 = ??? MHz; + 1000 = 150 MHz, 1010 = 200 MHz, 1100 = 180 MHz, 1110 = ??? MHz; + 1001 = 75 MHz, 1011 = 100 MHz, 1101 = 90 MHz, 1111 = ??? MHz */ if (cpu_busspeed <= 40000000) - dev->readout_regs[1] |= 0x30; + dev->readout_regs[1] |= 0x30; else if ((cpu_busspeed > 40000000) && (cpu_busspeed <= 50000000)) - dev->readout_regs[1] |= 0x00; + dev->readout_regs[1] |= 0x00; else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000)) - dev->readout_regs[1] |= 0x20; + dev->readout_regs[1] |= 0x20; else if (cpu_busspeed > 60000000) - dev->readout_regs[1] |= 0x10; + dev->readout_regs[1] |= 0x10; if (cpu_dmulti <= 1.5) - dev->readout_regs[1] |= 0x82; + dev->readout_regs[1] |= 0x82; else if ((cpu_dmulti > 1.5) && (cpu_dmulti <= 2.0)) - dev->readout_regs[1] |= 0x02; + dev->readout_regs[1] |= 0x02; else if ((cpu_dmulti > 2.0) && (cpu_dmulti <= 2.5)) - dev->readout_regs[1] |= 0x00; + dev->readout_regs[1] |= 0x00; else if (cpu_dmulti > 2.5) - dev->readout_regs[1] |= 0x80; + dev->readout_regs[1] |= 0x80; io_sethandler(0x0078, 0x0002, board_read, NULL, NULL, board_write, NULL, NULL, dev); io_sethandler(0x00e0, 0x0002, board_read, NULL, NULL, board_write, NULL, NULL, dev); @@ -1573,16 +1667,16 @@ static void dev->board_config[1] = 0xe0; if (cpu_busspeed <= 50000000) - dev->board_config[1] |= 0x10; + dev->board_config[1] |= 0x10; else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000)) - dev->board_config[1] |= 0x18; + dev->board_config[1] |= 0x18; else if (cpu_busspeed > 60000000) - dev->board_config[1] |= 0x00; + dev->board_config[1] |= 0x00; if (cpu_dmulti <= 1.5) - dev->board_config[1] |= 0x01; + dev->board_config[1] |= 0x01; else - dev->board_config[1] |= 0x00; + dev->board_config[1] |= 0x00; // device_add(&i8254_sec_device); @@ -1590,99 +1684,99 @@ static void } const device_t piix_device = { - .name = "Intel 82371FB (PIIX)", + .name = "Intel 82371FB (PIIX)", .internal_name = "piix", - .flags = DEVICE_PCI, - .local = 0x122e0101, - .init = piix_init, - .close = piix_close, - .reset = piix_reset, + .flags = DEVICE_PCI, + .local = 0x122e0101, + .init = piix_init, + .close = piix_close, + .reset = piix_reset, { .available = NULL }, .speed_changed = piix_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t piix_rev02_device = { - .name = "Intel 82371FB (PIIX) (Faulty BusMastering!!)", + .name = "Intel 82371FB (PIIX) (Faulty BusMastering!!)", .internal_name = "piix_rev02", - .flags = DEVICE_PCI, - .local = 0x122e0121, - .init = piix_init, - .close = piix_close, - .reset = piix_reset, + .flags = DEVICE_PCI, + .local = 0x122e0121, + .init = piix_init, + .close = piix_close, + .reset = piix_reset, { .available = NULL }, .speed_changed = piix_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t piix3_device = { - .name = "Intel 82371SB (PIIX3)", + .name = "Intel 82371SB (PIIX3)", .internal_name = "piix3", - .flags = DEVICE_PCI, - .local = 0x70000403, - .init = piix_init, - .close = piix_close, - .reset = piix_reset, + .flags = DEVICE_PCI, + .local = 0x70000403, + .init = piix_init, + .close = piix_close, + .reset = piix_reset, { .available = NULL }, .speed_changed = piix_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t piix3_ioapic_device = { - .name = "Intel 82371SB (PIIX3) (Boards with I/O APIC)", + .name = "Intel 82371SB (PIIX3) (Boards with I/O APIC)", .internal_name = "piix3_ioapic", - .flags = DEVICE_PCI, - .local = 0x70001403, - .init = piix_init, - .close = piix_close, - .reset = piix_reset, + .flags = DEVICE_PCI, + .local = 0x70001403, + .init = piix_init, + .close = piix_close, + .reset = piix_reset, { .available = NULL }, .speed_changed = piix_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t piix4_device = { - .name = "Intel 82371AB/EB (PIIX4/PIIX4E)", + .name = "Intel 82371AB/EB (PIIX4/PIIX4E)", .internal_name = "piix4", - .flags = DEVICE_PCI, - .local = 0x71100004, - .init = piix_init, - .close = piix_close, - .reset = piix_reset, + .flags = DEVICE_PCI, + .local = 0x71100004, + .init = piix_init, + .close = piix_close, + .reset = piix_reset, { .available = NULL }, .speed_changed = piix_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t piix4e_device = { - .name = "Intel 82371EB (PIIX4E)", + .name = "Intel 82371EB (PIIX4E)", .internal_name = "piix4e", - .flags = DEVICE_PCI, - .local = 0x71100094, - .init = piix_init, - .close = piix_close, - .reset = piix_reset, + .flags = DEVICE_PCI, + .local = 0x71100094, + .init = piix_init, + .close = piix_close, + .reset = piix_reset, { .available = NULL }, .speed_changed = piix_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t slc90e66_device = { - .name = "SMSC SLC90E66 (Victory66)", + .name = "SMSC SLC90E66 (Victory66)", .internal_name = "slc90e66", - .flags = DEVICE_PCI, - .local = 0x94600005, - .init = piix_init, - .close = piix_close, - .reset = piix_reset, + .flags = DEVICE_PCI, + .local = 0x94600005, + .init = piix_init, + .close = piix_close, + .reset = piix_reset, { .available = NULL }, .speed_changed = piix_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/intel_sio.c b/src/chipset/intel_sio.c index bbc85662d..5e9a001df 100644 --- a/src/chipset/intel_sio.c +++ b/src/chipset/intel_sio.c @@ -31,290 +31,292 @@ #include <86box/machine.h> #include <86box/chipset.h> - typedef struct { - uint8_t id, - regs[256]; + uint8_t id, + regs[256]; - uint16_t timer_base, - timer_latch; + uint16_t timer_base, + timer_latch; - double fast_off_period; + double fast_off_period; - pc_timer_t timer, fast_off_timer; + pc_timer_t timer, fast_off_timer; - apm_t * apm; - port_92_t * port_92; + apm_t *apm; + port_92_t *port_92; } sio_t; - #ifdef ENABLE_SIO_LOG int sio_do_log = ENABLE_SIO_LOG; - static void sio_log(const char *fmt, ...) { va_list ap; if (sio_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define sio_log(fmt, ...) +# define sio_log(fmt, ...) #endif - static void sio_timer_write(uint16_t addr, uint8_t val, void *priv) { sio_t *dev = (sio_t *) priv; if (!(addr & 0x0002)) { - if (addr & 0x0001) - dev->timer_latch = (dev->timer_latch & 0xff) | (val << 8); - else - dev->timer_latch = (dev->timer_latch & 0xff00) | val; + if (addr & 0x0001) + dev->timer_latch = (dev->timer_latch & 0xff) | (val << 8); + else + dev->timer_latch = (dev->timer_latch & 0xff00) | val; - timer_set_delay_u64(&dev->timer, ((uint64_t) dev->timer_latch) * TIMER_USEC); + timer_set_delay_u64(&dev->timer, ((uint64_t) dev->timer_latch) * TIMER_USEC); } } - static void sio_timer_writew(uint16_t addr, uint16_t val, void *priv) { sio_t *dev = (sio_t *) priv; if (!(addr & 0x0002)) { - dev->timer_latch = val; + dev->timer_latch = val; - timer_set_delay_u64(&dev->timer, ((uint64_t) dev->timer_latch) * TIMER_USEC); + timer_set_delay_u64(&dev->timer, ((uint64_t) dev->timer_latch) * TIMER_USEC); } } - static uint8_t sio_timer_read(uint16_t addr, void *priv) { - sio_t *dev = (sio_t *) priv; + sio_t *dev = (sio_t *) priv; uint16_t sio_timer_latch; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (!(addr & 0x0002)) { - cycles -= ((int) (PITCONST >> 32)); + cycles -= ((int) (PITCONST >> 32)); - sio_timer_latch = timer_get_remaining_us(&dev->timer); + sio_timer_latch = timer_get_remaining_us(&dev->timer); - if (addr & 0x0001) - ret = sio_timer_latch >> 8; - else - ret = sio_timer_latch & 0xff; + if (addr & 0x0001) + ret = sio_timer_latch >> 8; + else + ret = sio_timer_latch & 0xff; } return ret; } - static uint16_t sio_timer_readw(uint16_t addr, void *priv) { - sio_t *dev = (sio_t *) priv; + sio_t *dev = (sio_t *) priv; uint16_t ret = 0xffff; if (!(addr & 0x0002)) { - cycles -= ((int) (PITCONST >> 32)); + cycles -= ((int) (PITCONST >> 32)); - ret = timer_get_remaining_us(&dev->timer); + ret = timer_get_remaining_us(&dev->timer); } return ret; } - static void sio_write(int func, int addr, uint8_t val, void *priv) { - sio_t *dev = (sio_t *) priv; + sio_t *dev = (sio_t *) priv; uint8_t old; if (func > 0) - return; + return; if (((addr >= 0x0f) && (addr < 0x4c)) && (addr != 0x40)) - return; + return; /* The IB (original) variant of the SIO has no PCI IRQ steering. */ if ((addr >= 0x60) && (addr <= 0x63) && (dev->id < 0x03)) - return; + return; old = dev->regs[addr]; switch (addr) { - case 0x04: /*Command register*/ - if (dev->id == 0x03) - dev->regs[addr] = (dev->regs[addr] & 0xf7) | (val & 0x08); - break; + case 0x04: /*Command register*/ + if (dev->id == 0x03) + dev->regs[addr] = (dev->regs[addr] & 0xf7) | (val & 0x08); + break; - case 0x07: - dev->regs[addr] &= ~(val & 0x38); - break; + case 0x07: + dev->regs[addr] &= ~(val & 0x38); + break; - case 0x40: - if (dev->id == 0x03) { - dev->regs[addr] = (val & 0x7f); + case 0x40: + if (dev->id == 0x03) { + dev->regs[addr] = (val & 0x7f); - if (!((val ^ old) & 0x40)) - return; + if (!((val ^ old) & 0x40)) + return; - dma_alias_remove(); - if (!(val & 0x40)) - dma_alias_set(); - } else - dev->regs[addr] = (val & 0x3f); - break; - case 0x41: case 0x44: - dev->regs[addr] = (val & 0x1f); - break; - case 0x42: - if (dev->id == 0x03) - dev->regs[addr] = val; - else - dev->regs[addr] = (val & 0x77); - break; - case 0x43: - if (dev->id == 0x03) - dev->regs[addr] = (val & 0x01); - break; - case 0x45: case 0x46: - case 0x47: case 0x48: - case 0x49: case 0x4a: - case 0x4b: case 0x4e: - case 0x54: case 0x55: - case 0x56: - dev->regs[addr] = val; - break; - case 0x4c: case 0x4d: - dev->regs[addr] = (val & 0x7f); - break; - case 0x4f: - dev->regs[addr] = val; + dma_alias_remove(); + if (!(val & 0x40)) + dma_alias_set(); + } else + dev->regs[addr] = (val & 0x3f); + break; + case 0x41: + case 0x44: + dev->regs[addr] = (val & 0x1f); + break; + case 0x42: + if (dev->id == 0x03) + dev->regs[addr] = val; + else + dev->regs[addr] = (val & 0x77); + break; + case 0x43: + if (dev->id == 0x03) + dev->regs[addr] = (val & 0x01); + break; + case 0x45: + case 0x46: + case 0x47: + case 0x48: + case 0x49: + case 0x4a: + case 0x4b: + case 0x4e: + case 0x54: + case 0x55: + case 0x56: + dev->regs[addr] = val; + break; + case 0x4c: + case 0x4d: + dev->regs[addr] = (val & 0x7f); + break; + case 0x4f: + dev->regs[addr] = val; - if (!((val ^ old) & 0x40)) - return; + if (!((val ^ old) & 0x40)) + return; - port_92_remove(dev->port_92); - if (val & 0x40) - port_92_add(dev->port_92); - break; - case 0x57: - dev->regs[addr] = val; + port_92_remove(dev->port_92); + if (val & 0x40) + port_92_add(dev->port_92); + break; + case 0x57: + dev->regs[addr] = val; - dma_remove_sg(); - dma_set_sg_base(val); - break; - case 0x60: case 0x61: case 0x62: case 0x63: - if (dev->id == 0x03) { - sio_log("Set IRQ routing: INT %c -> %02X\n", 0x41 + (addr & 0x03), val); - dev->regs[addr] = val & 0x8f; - if (val & 0x80) - pci_set_irq_routing(PCI_INTA + (addr & 0x03), PCI_IRQ_DISABLED); - else - pci_set_irq_routing(PCI_INTA + (addr & 0x03), val & 0xf); - } - break; - case 0x80: - case 0x81: - if (addr == 0x80) - dev->regs[addr] = val & 0xfd; - else - dev->regs[addr] = val; + dma_remove_sg(); + dma_set_sg_base(val); + break; + case 0x60: + case 0x61: + case 0x62: + case 0x63: + if (dev->id == 0x03) { + sio_log("Set IRQ routing: INT %c -> %02X\n", 0x41 + (addr & 0x03), val); + dev->regs[addr] = val & 0x8f; + if (val & 0x80) + pci_set_irq_routing(PCI_INTA + (addr & 0x03), PCI_IRQ_DISABLED); + else + pci_set_irq_routing(PCI_INTA + (addr & 0x03), val & 0xf); + } + break; + case 0x80: + case 0x81: + if (addr == 0x80) + dev->regs[addr] = val & 0xfd; + else + dev->regs[addr] = val; - if (dev->timer_base & 0x01) { - io_removehandler(dev->timer_base & 0xfffc, 0x0004, - sio_timer_read, sio_timer_readw, NULL, - sio_timer_write, sio_timer_writew, NULL, dev); - } - dev->timer_base = (dev->regs[0x81] << 8) | (dev->regs[0x80] & 0xfd); - if (dev->timer_base & 0x01) { - io_sethandler(dev->timer_base & 0xfffc, 0x0004, - sio_timer_read, sio_timer_readw, NULL, - sio_timer_write, sio_timer_writew, NULL, dev); - } - break; - case 0xa0: - if (dev->id == 0x03) { - dev->regs[addr] = val & 0x1f; - apm_set_do_smi(dev->apm, !!(val & 0x01) && !!(dev->regs[0xa2] & 0x80)); - switch ((val & 0x18) >> 3) { - case 0x00: - dev->fast_off_period = PCICLK * 32768.0 * 60000.0; - break; - case 0x01: - default: - dev->fast_off_period = 0.0; - break; - case 0x02: - dev->fast_off_period = PCICLK; - break; - case 0x03: - dev->fast_off_period = PCICLK * 32768.0; - break; - } - cpu_fast_off_count = cpu_fast_off_val + 1; - cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); - } - break; - case 0xa2: - if (dev->id == 0x03) { - dev->regs[addr] = val & 0xff; - apm_set_do_smi(dev->apm, !!(dev->regs[0xa0] & 0x01) && !!(val & 0x80)); - } - break; - case 0xaa: - if (dev->id == 0x03) - dev->regs[addr] &= (val & 0xff); - break; - case 0xac: case 0xae: - if (dev->id == 0x03) - dev->regs[addr] = val & 0xff; - break; - case 0xa4: - if (dev->id == 0x03) { - dev->regs[addr] = val & 0xfb; - cpu_fast_off_flags = (cpu_fast_off_flags & 0xffffff00) | dev->regs[addr]; - } - break; - case 0xa5: - if (dev->id == 0x03) { - dev->regs[addr] = val & 0xff; - cpu_fast_off_flags = (cpu_fast_off_flags & 0xffff00ff) | (dev->regs[addr] << 8); - } - break; - case 0xa7: - if (dev->id == 0x03) { - dev->regs[addr] = val & 0xa0; - cpu_fast_off_flags = (cpu_fast_off_flags & 0x00ffffff) | (dev->regs[addr] << 24); - } - break; - case 0xa8: - dev->regs[addr] = val & 0xff; - cpu_fast_off_val = val; - cpu_fast_off_count = val + 1; - cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); - break; + if (dev->timer_base & 0x01) { + io_removehandler(dev->timer_base & 0xfffc, 0x0004, + sio_timer_read, sio_timer_readw, NULL, + sio_timer_write, sio_timer_writew, NULL, dev); + } + dev->timer_base = (dev->regs[0x81] << 8) | (dev->regs[0x80] & 0xfd); + if (dev->timer_base & 0x01) { + io_sethandler(dev->timer_base & 0xfffc, 0x0004, + sio_timer_read, sio_timer_readw, NULL, + sio_timer_write, sio_timer_writew, NULL, dev); + } + break; + case 0xa0: + if (dev->id == 0x03) { + dev->regs[addr] = val & 0x1f; + apm_set_do_smi(dev->apm, !!(val & 0x01) && !!(dev->regs[0xa2] & 0x80)); + switch ((val & 0x18) >> 3) { + case 0x00: + dev->fast_off_period = PCICLK * 32768.0 * 60000.0; + break; + case 0x01: + default: + dev->fast_off_period = 0.0; + break; + case 0x02: + dev->fast_off_period = PCICLK; + break; + case 0x03: + dev->fast_off_period = PCICLK * 32768.0; + break; + } + cpu_fast_off_count = cpu_fast_off_val + 1; + cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); + } + break; + case 0xa2: + if (dev->id == 0x03) { + dev->regs[addr] = val & 0xff; + apm_set_do_smi(dev->apm, !!(dev->regs[0xa0] & 0x01) && !!(val & 0x80)); + } + break; + case 0xaa: + if (dev->id == 0x03) + dev->regs[addr] &= (val & 0xff); + break; + case 0xac: + case 0xae: + if (dev->id == 0x03) + dev->regs[addr] = val & 0xff; + break; + case 0xa4: + if (dev->id == 0x03) { + dev->regs[addr] = val & 0xfb; + cpu_fast_off_flags = (cpu_fast_off_flags & 0xffffff00) | dev->regs[addr]; + } + break; + case 0xa5: + if (dev->id == 0x03) { + dev->regs[addr] = val & 0xff; + cpu_fast_off_flags = (cpu_fast_off_flags & 0xffff00ff) | (dev->regs[addr] << 8); + } + break; + case 0xa7: + if (dev->id == 0x03) { + dev->regs[addr] = val & 0xa0; + cpu_fast_off_flags = (cpu_fast_off_flags & 0x00ffffff) | (dev->regs[addr] << 24); + } + break; + case 0xa8: + dev->regs[addr] = val & 0xff; + cpu_fast_off_val = val; + cpu_fast_off_count = val + 1; + cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); + break; } } - static uint8_t sio_read(int func, int addr, void *priv) { - sio_t *dev = (sio_t *) priv; + sio_t *dev = (sio_t *) priv; uint8_t ret; ret = 0xff; @@ -325,47 +327,44 @@ sio_read(int func, int addr, void *priv) return ret; } - static void sio_config_write(uint16_t addr, uint8_t val, void *priv) { } - static uint8_t sio_config_read(uint16_t port, void *priv) { uint8_t ret = 0x00; switch (port & 0x000f) { - case 3: - ret = 0xff; - break; - case 5: - ret = 0xd3; + case 3: + ret = 0xff; + break; + case 5: + ret = 0xd3; - switch (cpu_pci_speed) { - case 20000000: - ret |= 0x0c; - break; - case 25000000: - default: - ret |= 0x00; - break; - case 30000000: - ret |= 0x08; - break; - case 33333333: - ret |= 0x04; - break; - } - break; + switch (cpu_pci_speed) { + case 20000000: + ret |= 0x0c; + break; + case 25000000: + default: + ret |= 0x00; + break; + case 30000000: + ret |= 0x08; + break; + case 33333333: + ret |= 0x04; + break; + } + break; } return ret; } - static void sio_reset_hard(void *priv) { @@ -373,27 +372,37 @@ sio_reset_hard(void *priv) memset(dev->regs, 0, 256); - dev->regs[0x00] = 0x86; dev->regs[0x01] = 0x80; /*Intel*/ - dev->regs[0x02] = 0x84; dev->regs[0x03] = 0x04; /*82378IB (SIO)*/ + dev->regs[0x00] = 0x86; + dev->regs[0x01] = 0x80; /*Intel*/ + dev->regs[0x02] = 0x84; + dev->regs[0x03] = 0x04; /*82378IB (SIO)*/ dev->regs[0x04] = 0x07; dev->regs[0x07] = 0x02; dev->regs[0x08] = dev->id; - dev->regs[0x40] = 0x20; dev->regs[0x41] = 0x00; + dev->regs[0x40] = 0x20; + dev->regs[0x41] = 0x00; dev->regs[0x42] = 0x04; - dev->regs[0x45] = 0x10; dev->regs[0x46] = 0x0f; + dev->regs[0x45] = 0x10; + dev->regs[0x46] = 0x0f; dev->regs[0x48] = 0x01; - dev->regs[0x4a] = 0x10; dev->regs[0x4b] = 0x0f; - dev->regs[0x4c] = 0x56; dev->regs[0x4d] = 0x40; - dev->regs[0x4e] = 0x07; dev->regs[0x4f] = 0x4f; + dev->regs[0x4a] = 0x10; + dev->regs[0x4b] = 0x0f; + dev->regs[0x4c] = 0x56; + dev->regs[0x4d] = 0x40; + dev->regs[0x4e] = 0x07; + dev->regs[0x4f] = 0x4f; dev->regs[0x57] = 0x04; if (dev->id == 0x03) { - dev->regs[0x60] = 0x80; dev->regs[0x61] = 0x80; dev->regs[0x62] = 0x80; dev->regs[0x63] = 0x80; + dev->regs[0x60] = 0x80; + dev->regs[0x61] = 0x80; + dev->regs[0x62] = 0x80; + dev->regs[0x63] = 0x80; } dev->regs[0x80] = 0x78; if (dev->id == 0x03) { - dev->regs[0xa0] = 0x08; - dev->regs[0xa8] = 0x0f; + dev->regs[0xa0] = 0x08; + dev->regs[0xa8] = 0x0f; } pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED); @@ -402,25 +411,23 @@ sio_reset_hard(void *priv) pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED); if (dev->timer_base & 0x0001) { - io_removehandler(dev->timer_base & 0xfffc, 0x0004, - sio_timer_read, sio_timer_readw, NULL, - sio_timer_write, sio_timer_writew, NULL, dev); + io_removehandler(dev->timer_base & 0xfffc, 0x0004, + sio_timer_read, sio_timer_readw, NULL, + sio_timer_write, sio_timer_writew, NULL, dev); } dev->timer_base = 0x0078; } - static void sio_apm_out(uint16_t port, uint8_t val, void *p) { sio_t *dev = (sio_t *) p; if (dev->apm->do_smi) - dev->regs[0xaa] |= 0x80; + dev->regs[0xaa] |= 0x80; } - static void sio_fast_off_count(void *priv) { @@ -430,7 +437,6 @@ sio_fast_off_count(void *priv) dev->regs[0xaa] |= 0x20; } - static void sio_reset(void *p) { @@ -441,48 +447,45 @@ sio_reset(void *p) dma_set_params(1, 0xffffffff); if (dev->id == 0x03) { - sio_write(0, 0xa0, 0x08, p); - sio_write(0, 0xa2, 0x00, p); - sio_write(0, 0xa4, 0x00, p); - sio_write(0, 0xa5, 0x00, p); - sio_write(0, 0xa6, 0x00, p); - sio_write(0, 0xa7, 0x00, p); - sio_write(0, 0xa8, 0x0f, p); + sio_write(0, 0xa0, 0x08, p); + sio_write(0, 0xa2, 0x00, p); + sio_write(0, 0xa4, 0x00, p); + sio_write(0, 0xa5, 0x00, p); + sio_write(0, 0xa6, 0x00, p); + sio_write(0, 0xa7, 0x00, p); + sio_write(0, 0xa8, 0x0f, p); } } - static void sio_close(void *p) { - sio_t *dev = (sio_t *)p; + sio_t *dev = (sio_t *) p; free(dev); } - static void sio_speed_changed(void *priv) { sio_t *dev = (sio_t *) priv; - int te; + int te; te = timer_is_enabled(&dev->timer); timer_disable(&dev->timer); if (te) - timer_set_delay_u64(&dev->timer, ((uint64_t) dev->timer_latch) * TIMER_USEC); + timer_set_delay_u64(&dev->timer, ((uint64_t) dev->timer_latch) * TIMER_USEC); if (dev->id == 0x03) { - te = timer_is_enabled(&dev->fast_off_timer); + te = timer_is_enabled(&dev->fast_off_timer); - timer_stop(&dev->fast_off_timer); - if (te) - timer_on_auto(&dev->fast_off_timer, dev->fast_off_period); + timer_stop(&dev->fast_off_timer); + if (te) + timer_on_auto(&dev->fast_off_timer, dev->fast_off_period); } } - static void * sio_init(const device_t *info) { @@ -494,24 +497,24 @@ sio_init(const device_t *info) dev->id = info->local; if (dev->id == 0x03) - timer_add(&dev->fast_off_timer, sio_fast_off_count, dev, 0); + timer_add(&dev->fast_off_timer, sio_fast_off_count, dev, 0); sio_reset_hard(dev); cpu_fast_off_flags = 0x00000000; if (dev->id == 0x03) { - cpu_fast_off_val = dev->regs[0xa8]; - cpu_fast_off_count = cpu_fast_off_val + 1; + cpu_fast_off_val = dev->regs[0xa8]; + cpu_fast_off_count = cpu_fast_off_val + 1; - cpu_register_fast_off_handler(&dev->fast_off_timer); + cpu_register_fast_off_handler(&dev->fast_off_timer); } else - cpu_fast_off_val = cpu_fast_off_count = 0; + cpu_fast_off_val = cpu_fast_off_count = 0; if (dev->id == 0x03) { - dev->apm = device_add(&apm_pci_device); - /* APM intercept handler to update 82378ZB SMI status on APM SMI. */ - io_sethandler(0x00b2, 0x0001, NULL, NULL, NULL, sio_apm_out, NULL, NULL, dev); + dev->apm = device_add(&apm_pci_device); + /* APM intercept handler to update 82378ZB SMI status on APM SMI. */ + io_sethandler(0x00b2, 0x0001, NULL, NULL, NULL, sio_apm_out, NULL, NULL, dev); } dev->port_92 = device_add(&port_92_pci_device); @@ -522,12 +525,12 @@ sio_init(const device_t *info) dma_high_page_init(); if (dev->id == 0x03) - dma_alias_set(); + dma_alias_set(); io_sethandler(0x0073, 0x0001, - sio_config_read, NULL, NULL, sio_config_write, NULL, NULL, dev); + sio_config_read, NULL, NULL, sio_config_write, NULL, NULL, dev); io_sethandler(0x0075, 0x0001, - sio_config_read, NULL, NULL, sio_config_write, NULL, NULL, dev); + sio_config_read, NULL, NULL, sio_config_write, NULL, NULL, dev); timer_add(&dev->timer, NULL, NULL, 0); @@ -536,32 +539,30 @@ sio_init(const device_t *info) return dev; } - const device_t sio_device = { - .name = "Intel 82378IB (SIO)", + .name = "Intel 82378IB (SIO)", .internal_name = "sio", - .flags = DEVICE_PCI, - .local = 0x00, - .init = sio_init, - .close = sio_close, - .reset = sio_reset, + .flags = DEVICE_PCI, + .local = 0x00, + .init = sio_init, + .close = sio_close, + .reset = sio_reset, { .available = NULL }, .speed_changed = sio_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; - const device_t sio_zb_device = { - .name = "Intel 82378ZB (SIO)", + .name = "Intel 82378ZB (SIO)", .internal_name = "sio_zb", - .flags = DEVICE_PCI, - .local = 0x03, - .init = sio_init, - .close = sio_close, - .reset = sio_reset, + .flags = DEVICE_PCI, + .local = 0x03, + .init = sio_init, + .close = sio_close, + .reset = sio_reset, { .available = NULL }, .speed_changed = sio_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/neat.c b/src/chipset/neat.c index 8e7bc1937..6b4f476fe 100644 --- a/src/chipset/neat.c +++ b/src/chipset/neat.c @@ -30,266 +30,260 @@ #include <86box/mem.h> #include <86box/chipset.h> -#define NEAT_DEBUG 0 - - -#define EMS_MAXPAGE 4 -#define EMS_PGSIZE 16384 +#define NEAT_DEBUG 0 +#define EMS_MAXPAGE 4 +#define EMS_PGSIZE 16384 /* CS8221 82C211 controller registers. */ -#define REG_RA0 0x60 /* PROCCLK selector */ -# define RA0_MASK 0x34 /* RR11 X1XR */ -# define RA0_READY 0x01 /* local bus READY timeout */ -# define RA0_RDYNMIEN 0x04 /* local bus READY tmo NMI enable */ -# define RA0_PROCCLK 0x10 /* PROCCLK=BCLK (1) or CLK2IN (0) */ -# define RA0_ALTRST 0x20 /* alternate CPU reset (1) */ -# define RA0_REV 0xc0 /* chip revision ID */ -# define RA0_REV_SH 6 -# define RA0_REV_ID 2 /* faked revision# for 82C211 */ +#define REG_RA0 0x60 /* PROCCLK selector */ +#define RA0_MASK 0x34 /* RR11 X1XR */ +#define RA0_READY 0x01 /* local bus READY timeout */ +#define RA0_RDYNMIEN 0x04 /* local bus READY tmo NMI enable */ +#define RA0_PROCCLK 0x10 /* PROCCLK=BCLK (1) or CLK2IN (0) */ +#define RA0_ALTRST 0x20 /* alternate CPU reset (1) */ +#define RA0_REV 0xc0 /* chip revision ID */ +#define RA0_REV_SH 6 +#define RA0_REV_ID 2 /* faked revision# for 82C211 */ -#define REG_RA1 0x61 /* Command Delay */ -# define RA1_MASK 0xff /* 1111 1111 */ -# define RA1_BUSDLY 0x03 /* AT BUS command delay */ -# define RA1_BUSDLY_SH 0 -# define RA1_BUS8DLY 0x0c /* AT BUS 8bit command delay */ -# define RA1_BUS8DLY_SH 2 -# define RA1_MEMDLY 0x30 /* AT BUS 16bit memory delay */ -# define RA1_MEMDLY_SH 4 -# define RA1_QUICKEN 0x40 /* Quick Mode enable */ -# define RA1_HOLDDLY 0x80 /* Hold Time Delay */ +#define REG_RA1 0x61 /* Command Delay */ +#define RA1_MASK 0xff /* 1111 1111 */ +#define RA1_BUSDLY 0x03 /* AT BUS command delay */ +#define RA1_BUSDLY_SH 0 +#define RA1_BUS8DLY 0x0c /* AT BUS 8bit command delay */ +#define RA1_BUS8DLY_SH 2 +#define RA1_MEMDLY 0x30 /* AT BUS 16bit memory delay */ +#define RA1_MEMDLY_SH 4 +#define RA1_QUICKEN 0x40 /* Quick Mode enable */ +#define RA1_HOLDDLY 0x80 /* Hold Time Delay */ -#define REG_RA2 0x62 /* Wait State / BCLK selector */ -# define RA2_MASK 0x3f /* XX11 1111 */ -# define RA2_BCLK 0x03 /* BCLK select */ -# define RA2_BCLK_SH 0 -# define BCLK_IN2 0 /* BCLK = CLK2IN/2 */ -# define BCLK_IN 1 /* BCLK = CLK2IN */ -# define BCLK_AT 2 /* BCLK = ATCLK */ -# define RA2_AT8WS 0x0c /* AT 8-bit wait states */ -# define RA2_AT8WS_SH 2 -# define AT8WS_2 0 /* 2 wait states */ -# define AT8WS_3 1 /* 3 wait states */ -# define AT8WS_4 2 /* 4 wait states */ -# define AT8WS_5 4 /* 5 wait states */ -# define RA2_ATWS 0x30 /* AT 16-bit wait states */ -# define RA2_ATWS_SH 4 -# define ATWS_2 0 /* 2 wait states */ -# define ATWS_3 1 /* 3 wait states */ -# define ATWS_4 2 /* 4 wait states */ -# define ATWS_5 4 /* 5 wait states */ +#define REG_RA2 0x62 /* Wait State / BCLK selector */ +#define RA2_MASK 0x3f /* XX11 1111 */ +#define RA2_BCLK 0x03 /* BCLK select */ +#define RA2_BCLK_SH 0 +#define BCLK_IN2 0 /* BCLK = CLK2IN/2 */ +#define BCLK_IN 1 /* BCLK = CLK2IN */ +#define BCLK_AT 2 /* BCLK = ATCLK */ +#define RA2_AT8WS 0x0c /* AT 8-bit wait states */ +#define RA2_AT8WS_SH 2 +#define AT8WS_2 0 /* 2 wait states */ +#define AT8WS_3 1 /* 3 wait states */ +#define AT8WS_4 2 /* 4 wait states */ +#define AT8WS_5 4 /* 5 wait states */ +#define RA2_ATWS 0x30 /* AT 16-bit wait states */ +#define RA2_ATWS_SH 4 +#define ATWS_2 0 /* 2 wait states */ +#define ATWS_3 1 /* 3 wait states */ +#define ATWS_4 2 /* 4 wait states */ +#define ATWS_5 4 /* 5 wait states */ /* CS8221 82C212 controller registers. */ -#define REG_RB0 0x64 /* Version ID */ -# define RB0_MASK 0x60 /* R11X XXXX */ -# define RB0_REV 0x60 /* Chip revsion number */ -# define RB0_REV_SH 5 -# define RB0_REV_ID 2 /* faked revision# for 82C212 */ -# define RB0_VERSION 0x80 /* Chip version (0=82C212) */ +#define REG_RB0 0x64 /* Version ID */ +#define RB0_MASK 0x60 /* R11X XXXX */ +#define RB0_REV 0x60 /* Chip revsion number */ +#define RB0_REV_SH 5 +#define RB0_REV_ID 2 /* faked revision# for 82C212 */ +#define RB0_VERSION 0x80 /* Chip version (0=82C212) */ -#define REG_RB1 0x65 /* ROM configuration */ -# define RB1_MASK 0xff /* 1111 1111 */ -# define RB1_ROMF0 0x01 /* ROM F0000 enabled (0) */ -# define RB1_ROME0 0x02 /* ROM E0000 disabled (1) */ -# define RB1_ROMD0 0x04 /* ROM D0000 disabled (1) */ -# define RB1_ROMC0 0x08 /* ROM C0000 disabled (1) */ -# define RB1_SHADOWF0 0x10 /* Shadow F0000 R/W (0) */ -# define RB1_SHADOWE0 0x20 /* Shadow E0000 R/W (0) */ -# define RB1_SHADOWD0 0x40 /* Shadow D0000 R/W (0) */ -# define RB1_SHADOWC0 0x80 /* Shadow C0000 R/W (0) */ +#define REG_RB1 0x65 /* ROM configuration */ +#define RB1_MASK 0xff /* 1111 1111 */ +#define RB1_ROMF0 0x01 /* ROM F0000 enabled (0) */ +#define RB1_ROME0 0x02 /* ROM E0000 disabled (1) */ +#define RB1_ROMD0 0x04 /* ROM D0000 disabled (1) */ +#define RB1_ROMC0 0x08 /* ROM C0000 disabled (1) */ +#define RB1_SHADOWF0 0x10 /* Shadow F0000 R/W (0) */ +#define RB1_SHADOWE0 0x20 /* Shadow E0000 R/W (0) */ +#define RB1_SHADOWD0 0x40 /* Shadow D0000 R/W (0) */ +#define RB1_SHADOWC0 0x80 /* Shadow C0000 R/W (0) */ -#define REG_RB2 0x66 /* Memory Enable 1 */ -# define RB2_MASK 0x80 /* 1XXX XXXX */ -# define RB2_TOP128 0x80 /* top 128K is on sysboard (1) */ +#define REG_RB2 0x66 /* Memory Enable 1 */ +#define RB2_MASK 0x80 /* 1XXX XXXX */ +#define RB2_TOP128 0x80 /* top 128K is on sysboard (1) */ -#define REG_RB3 0x67 /* Memory Enable 2 */ -# define RB3_MASK 0xff /* 1111 1111 */ -# define RB3_SHENB0 0x01 /* enable B0000-B3FFF shadow (1) */ -# define RB3_SHENB4 0x02 /* enable B4000-B7FFF shadow (1) */ -# define RB3_SHENB8 0x04 /* enable B8000-BBFFF shadow (1) */ -# define RB3_SHENBC 0x08 /* enable BC000-BFFFF shadow (1) */ -# define RB3_SHENA0 0x10 /* enable A0000-A3FFF shadow (1) */ -# define RB3_SHENA4 0x20 /* enable A4000-A7FFF shadow (1) */ -# define RB3_SHENA8 0x40 /* enable A8000-ABFFF shadow (1) */ -# define RB3_SHENAC 0x80 /* enable AC000-AFFFF shadow (1) */ +#define REG_RB3 0x67 /* Memory Enable 2 */ +#define RB3_MASK 0xff /* 1111 1111 */ +#define RB3_SHENB0 0x01 /* enable B0000-B3FFF shadow (1) */ +#define RB3_SHENB4 0x02 /* enable B4000-B7FFF shadow (1) */ +#define RB3_SHENB8 0x04 /* enable B8000-BBFFF shadow (1) */ +#define RB3_SHENBC 0x08 /* enable BC000-BFFFF shadow (1) */ +#define RB3_SHENA0 0x10 /* enable A0000-A3FFF shadow (1) */ +#define RB3_SHENA4 0x20 /* enable A4000-A7FFF shadow (1) */ +#define RB3_SHENA8 0x40 /* enable A8000-ABFFF shadow (1) */ +#define RB3_SHENAC 0x80 /* enable AC000-AFFFF shadow (1) */ -#define REG_RB4 0x68 /* Memory Enable 3 */ -# define RB4_MASK 0xff /* 1111 1111 */ -# define RB4_SHENC0 0x01 /* enable C0000-C3FFF shadow (1) */ -# define RB4_SHENC4 0x02 /* enable C4000-C7FFF shadow (1) */ -# define RB4_SHENC8 0x04 /* enable C8000-CBFFF shadow (1) */ -# define RB4_SHENCC 0x08 /* enable CC000-CFFFF shadow (1) */ -# define RB4_SHEND0 0x10 /* enable D0000-D3FFF shadow (1) */ -# define RB4_SHEND4 0x20 /* enable D4000-D7FFF shadow (1) */ -# define RB4_SHEND8 0x40 /* enable D8000-DBFFF shadow (1) */ -# define RB4_SHENDC 0x80 /* enable DC000-DFFFF shadow (1) */ +#define REG_RB4 0x68 /* Memory Enable 3 */ +#define RB4_MASK 0xff /* 1111 1111 */ +#define RB4_SHENC0 0x01 /* enable C0000-C3FFF shadow (1) */ +#define RB4_SHENC4 0x02 /* enable C4000-C7FFF shadow (1) */ +#define RB4_SHENC8 0x04 /* enable C8000-CBFFF shadow (1) */ +#define RB4_SHENCC 0x08 /* enable CC000-CFFFF shadow (1) */ +#define RB4_SHEND0 0x10 /* enable D0000-D3FFF shadow (1) */ +#define RB4_SHEND4 0x20 /* enable D4000-D7FFF shadow (1) */ +#define RB4_SHEND8 0x40 /* enable D8000-DBFFF shadow (1) */ +#define RB4_SHENDC 0x80 /* enable DC000-DFFFF shadow (1) */ -#define REG_RB5 0x69 /* Memory Enable 4 */ -# define RB5_MASK 0xff /* 1111 1111 */ -# define RB5_SHENE0 0x01 /* enable E0000-E3FFF shadow (1) */ -# define RB5_SHENE4 0x02 /* enable E4000-E7FFF shadow (1) */ -# define RB5_SHENE8 0x04 /* enable E8000-EBFFF shadow (1) */ -# define RB5_SHENEC 0x08 /* enable EC000-EFFFF shadow (1) */ -# define RB5_SHENF0 0x10 /* enable F0000-F3FFF shadow (1) */ -# define RB5_SHENF4 0x20 /* enable F4000-F7FFF shadow (1) */ -# define RB5_SHENF8 0x40 /* enable F8000-FBFFF shadow (1) */ -# define RB5_SHENFC 0x80 /* enable FC000-FFFFF shadow (1) */ +#define REG_RB5 0x69 /* Memory Enable 4 */ +#define RB5_MASK 0xff /* 1111 1111 */ +#define RB5_SHENE0 0x01 /* enable E0000-E3FFF shadow (1) */ +#define RB5_SHENE4 0x02 /* enable E4000-E7FFF shadow (1) */ +#define RB5_SHENE8 0x04 /* enable E8000-EBFFF shadow (1) */ +#define RB5_SHENEC 0x08 /* enable EC000-EFFFF shadow (1) */ +#define RB5_SHENF0 0x10 /* enable F0000-F3FFF shadow (1) */ +#define RB5_SHENF4 0x20 /* enable F4000-F7FFF shadow (1) */ +#define RB5_SHENF8 0x40 /* enable F8000-FBFFF shadow (1) */ +#define RB5_SHENFC 0x80 /* enable FC000-FFFFF shadow (1) */ -#define REG_RB6 0x6a /* Bank 0/1 Enable */ -# define RB6_MASK 0xe0 /* 111R RRRR */ -# define RB6_BANKS 0x20 /* #banks used (1=two) */ -# define RB6_RTYPE 0xc0 /* DRAM chip size used */ -# define RTYPE_SH 6 -# define RTYPE_NONE 0 /* Disabled */ -# define RTYPE_MIXED 1 /* 64K/256K mixed (for 640K) */ -# define RTYPE_256K 2 /* 256K (default) */ -# define RTYPE_1M 3 /* 1M */ +#define REG_RB6 0x6a /* Bank 0/1 Enable */ +#define RB6_MASK 0xe0 /* 111R RRRR */ +#define RB6_BANKS 0x20 /* #banks used (1=two) */ +#define RB6_RTYPE 0xc0 /* DRAM chip size used */ +#define RTYPE_SH 6 +#define RTYPE_NONE 0 /* Disabled */ +#define RTYPE_MIXED 1 /* 64K/256K mixed (for 640K) */ +#define RTYPE_256K 2 /* 256K (default) */ +#define RTYPE_1M 3 /* 1M */ -#define REG_RB7 0x6b /* DRAM configuration */ -# define RB7_MASK 0xff /* 1111 1111 */ -# define RB7_ROMWS 0x03 /* ROM access wait states */ -# define RB7_ROMWS_SH 0 -# define ROMWS_0 0 /* 0 wait states */ -# define ROMWS_1 1 /* 1 wait states */ -# define ROMWS_2 2 /* 2 wait states */ -# define ROMWS_3 3 /* 3 wait states (default) */ -# define RB7_EMSWS 0x0c /* EMS access wait states */ -# define RB7_EMSWS_SH 2 -# define EMSWS_0 0 /* 0 wait states */ -# define EMSWS_1 1 /* 1 wait states */ -# define EMSWS_2 2 /* 2 wait states */ -# define EMSWS_3 3 /* 3 wait states (default) */ -# define RB7_EMSEN 0x10 /* enable EMS (1=on) */ -# define RB7_RAMWS 0x20 /* RAM access wait state (1=1ws) */ -# define RB7_UMAREL 0x40 /* relocate 640-1024K to 1M */ -# define RB7_PAGEEN 0x80 /* enable Page/Interleaved mode */ +#define REG_RB7 0x6b /* DRAM configuration */ +#define RB7_MASK 0xff /* 1111 1111 */ +#define RB7_ROMWS 0x03 /* ROM access wait states */ +#define RB7_ROMWS_SH 0 +#define ROMWS_0 0 /* 0 wait states */ +#define ROMWS_1 1 /* 1 wait states */ +#define ROMWS_2 2 /* 2 wait states */ +#define ROMWS_3 3 /* 3 wait states (default) */ +#define RB7_EMSWS 0x0c /* EMS access wait states */ +#define RB7_EMSWS_SH 2 +#define EMSWS_0 0 /* 0 wait states */ +#define EMSWS_1 1 /* 1 wait states */ +#define EMSWS_2 2 /* 2 wait states */ +#define EMSWS_3 3 /* 3 wait states (default) */ +#define RB7_EMSEN 0x10 /* enable EMS (1=on) */ +#define RB7_RAMWS 0x20 /* RAM access wait state (1=1ws) */ +#define RB7_UMAREL 0x40 /* relocate 640-1024K to 1M */ +#define RB7_PAGEEN 0x80 /* enable Page/Interleaved mode */ -#define REG_RB8 0x6c /* Bank 2/3 Enable */ -# define RB8_MASK 0xf0 /* 1111 RRRR */ -# define RB8_4WAY 0x10 /* enable 4-way interleave mode */ -# define RB8_BANKS 0x20 /* enable 2 banks (1) */ -# define RB8_RTYPE 0xc0 /* DRAM chip size used */ -# define RB8_RTYPE_SH 6 +#define REG_RB8 0x6c /* Bank 2/3 Enable */ +#define RB8_MASK 0xf0 /* 1111 RRRR */ +#define RB8_4WAY 0x10 /* enable 4-way interleave mode */ +#define RB8_BANKS 0x20 /* enable 2 banks (1) */ +#define RB8_RTYPE 0xc0 /* DRAM chip size used */ +#define RB8_RTYPE_SH 6 -#define REG_RB9 0x6d /* EMS base address */ -# define RB9_MASK 0xff /* 1111 1111 */ -# define RB9_BASE 0x0f /* I/O base address selection */ -# define RB9_BASE_SH 0 -# define RB9_FRAME 0xf0 /* frame address selection */ -# define RB9_FRAME_SH 4 +#define REG_RB9 0x6d /* EMS base address */ +#define RB9_MASK 0xff /* 1111 1111 */ +#define RB9_BASE 0x0f /* I/O base address selection */ +#define RB9_BASE_SH 0 +#define RB9_FRAME 0xf0 /* frame address selection */ +#define RB9_FRAME_SH 4 -#define REG_RB10 0x6e /* EMS address extension */ -# define RB10_MASK 0xff /* 1111 1111 */ -# define RB10_P3EXT 0x03 /* page 3 extension */ -# define RB10_P3EXT_SH 0 -# define PEXT_0M 0 /* page is at 0-2M */ -# define PEXT_2M 1 /* page is at 2-4M */ -# define PEXT_4M 2 /* page is at 4-6M */ -# define PEXT_6M 3 /* page is at 6-8M */ -# define RB10_P2EXT 0x0c /* page 2 extension */ -# define RB10_P2EXT_SH 2 -# define RB10_P1EXT 0x30 /* page 1 extension */ -# define RB10_P1EXT_SH 4 -# define RB10_P0EXT 0xc0 /* page 0 extension */ -# define RB10_P0EXT_SH 6 +#define REG_RB10 0x6e /* EMS address extension */ +#define RB10_MASK 0xff /* 1111 1111 */ +#define RB10_P3EXT 0x03 /* page 3 extension */ +#define RB10_P3EXT_SH 0 +#define PEXT_0M 0 /* page is at 0-2M */ +#define PEXT_2M 1 /* page is at 2-4M */ +#define PEXT_4M 2 /* page is at 4-6M */ +#define PEXT_6M 3 /* page is at 6-8M */ +#define RB10_P2EXT 0x0c /* page 2 extension */ +#define RB10_P2EXT_SH 2 +#define RB10_P1EXT 0x30 /* page 1 extension */ +#define RB10_P1EXT_SH 4 +#define RB10_P0EXT 0xc0 /* page 0 extension */ +#define RB10_P0EXT_SH 6 -#define REG_RB11 0x6f /* Miscellaneous */ -# define RB11_MASK 0xe6 /* 111R R11R */ -# define RB11_GA20 0x02 /* gate for A20 */ -# define RB11_RASTMO 0x04 /* enable RAS timeout counter */ -# define RB11_EMSLEN 0xe0 /* EMS memory chunk size */ -# define RB11_EMSLEN_SH 5 +#define REG_RB11 0x6f /* Miscellaneous */ +#define RB11_MASK 0xe6 /* 111R R11R */ +#define RB11_GA20 0x02 /* gate for A20 */ +#define RB11_RASTMO 0x04 /* enable RAS timeout counter */ +#define RB11_EMSLEN 0xe0 /* EMS memory chunk size */ +#define RB11_EMSLEN_SH 5 typedef struct { - int8_t enabled; /* 1=ENABLED */ - char pad; - uint16_t page; /* selected page in EMS block */ - uint32_t start; /* start of EMS in RAM */ - uint8_t *addr; /* start addr in EMS RAM */ - mem_mapping_t mapping; /* mapping entry for page */ + int8_t enabled; /* 1=ENABLED */ + char pad; + uint16_t page; /* selected page in EMS block */ + uint32_t start; /* start of EMS in RAM */ + uint8_t *addr; /* start addr in EMS RAM */ + mem_mapping_t mapping; /* mapping entry for page */ } emspage_t; typedef struct { - uint8_t regs[128]; /* all the CS8221 registers */ - uint8_t indx; /* programmed index into registers */ + uint8_t regs[128]; /* all the CS8221 registers */ + uint8_t indx; /* programmed index into registers */ - char pad; + char pad; - uint16_t ems_base, /* configured base address */ - ems_oldbase; - uint32_t ems_frame, /* configured frame address */ - ems_oldframe; - uint16_t ems_size, /* EMS size in KB */ - ems_pages; /* EMS size in pages */ - emspage_t ems[EMS_MAXPAGE]; /* EMS page registers */ + uint16_t ems_base, /* configured base address */ + ems_oldbase; + uint32_t ems_frame, /* configured frame address */ + ems_oldframe; + uint16_t ems_size, /* EMS size in KB */ + ems_pages; /* EMS size in pages */ + emspage_t ems[EMS_MAXPAGE]; /* EMS page registers */ } neat_t; - #ifdef ENABLE_NEAT_LOG int neat_do_log = ENABLE_NEAT_LOG; - static void neat_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (neat_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (neat_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define neat_log(fmt, ...) +# define neat_log(fmt, ...) #endif - /* Read one byte from paged RAM. */ static uint8_t ems_readb(uint32_t addr, void *priv) { - neat_t *dev = (neat_t *)priv; + neat_t *dev = (neat_t *) priv; uint8_t ret = 0xff; /* Grab the data. */ - ret = *(uint8_t *)(dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)); + ret = *(uint8_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)); - return(ret); + return (ret); } /* Read one word from paged RAM. */ static uint16_t ems_readw(uint32_t addr, void *priv) { - neat_t *dev = (neat_t *)priv; + neat_t *dev = (neat_t *) priv; uint16_t ret = 0xffff; /* Grab the data. */ - ret = *(uint16_t *)(dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)); + ret = *(uint16_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)); - return(ret); + return (ret); } /* Write one byte to paged RAM. */ static void ems_writeb(uint32_t addr, uint8_t val, void *priv) { - neat_t *dev = (neat_t *)priv; + neat_t *dev = (neat_t *) priv; /* Write the data. */ - *(uint8_t *)(dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)) = val; + *(uint8_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)) = val; } /* Write one word to paged RAM. */ static void ems_writew(uint32_t addr, uint16_t val, void *priv) { - neat_t *dev = (neat_t *)priv; + neat_t *dev = (neat_t *) priv; /* Write the data. */ - *(uint16_t *)(dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)) = val; + *(uint16_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)) = val; } /* Re-calculate the active-page physical address. */ @@ -297,36 +291,36 @@ static void ems_recalc(neat_t *dev, emspage_t *ems) { if (ems->page >= dev->ems_pages) { - /* That page does not exist. */ - ems->enabled = 0; + /* That page does not exist. */ + ems->enabled = 0; } /* Pre-calculate the page address in EMS RAM. */ ems->addr = ram + ems->start + (ems->page * EMS_PGSIZE); if (ems->enabled) { - /* Update the EMS RAM address for this page. */ - mem_mapping_set_exec(&ems->mapping, ems->addr); + /* Update the EMS RAM address for this page. */ + mem_mapping_set_exec(&ems->mapping, ems->addr); - /* Enable this page. */ - mem_mapping_enable(&ems->mapping); + /* Enable this page. */ + mem_mapping_enable(&ems->mapping); #if NEAT_DEBUG > 1 - neat_log("NEAT EMS: page %d set to %08lx, %sabled)\n", - ems->page, ems->addr-ram, ems->enabled?"en":"dis"); + neat_log("NEAT EMS: page %d set to %08lx, %sabled)\n", + ems->page, ems->addr - ram, ems->enabled ? "en" : "dis"); #endif } else { - /* Disable this page. */ - mem_mapping_disable(&ems->mapping); + /* Disable this page. */ + mem_mapping_disable(&ems->mapping); } } static void ems_write(uint16_t port, uint8_t val, void *priv) { - neat_t *dev = (neat_t *)priv; + neat_t *dev = (neat_t *) priv; emspage_t *ems; - int vpage; + int vpage; #if NEAT_DEBUG > 1 neat_log("NEAT: ems_write(%04x, %02x)\n", port, val); @@ -334,42 +328,42 @@ ems_write(uint16_t port, uint8_t val, void *priv) /* Get the viewport page number. */ vpage = (port / EMS_PGSIZE); - ems = &dev->ems[vpage]; + ems = &dev->ems[vpage]; - switch(port & 0x000f) { - case 0x0008: - case 0x0009: - ems->enabled = !!(val & 0x80); - ems->page &= 0x0180; /* clear lower bits */ - ems->page |= (val & 0x7f); /* add new bits */ - ems_recalc(dev, ems); - break; + switch (port & 0x000f) { + case 0x0008: + case 0x0009: + ems->enabled = !!(val & 0x80); + ems->page &= 0x0180; /* clear lower bits */ + ems->page |= (val & 0x7f); /* add new bits */ + ems_recalc(dev, ems); + break; } } static uint8_t ems_read(uint16_t port, void *priv) { - neat_t *dev = (neat_t *)priv; + neat_t *dev = (neat_t *) priv; uint8_t ret = 0xff; - int vpage; + int vpage; /* Get the viewport page number. */ vpage = (port / EMS_PGSIZE); - switch(port & 0x000f) { - case 0x0008: /* page number register */ - ret = dev->ems[vpage].page & 0x7f; - if (dev->ems[vpage].enabled) - ret |= 0x80; - break; + switch (port & 0x000f) { + case 0x0008: /* page number register */ + ret = dev->ems[vpage].page & 0x7f; + if (dev->ems[vpage].enabled) + ret |= 0x80; + break; } #if NEAT_DEBUG > 1 neat_log("NEAT: ems_read(%04x) = %02x\n", port, ret); #endif - return(ret); + return (ret); } /* Initialize the EMS module. */ @@ -379,29 +373,30 @@ ems_init(neat_t *dev, int en) int i; /* Remove if needed. */ - if (! en) { - if (dev->ems_base > 0) for (i = 0; i < EMS_MAXPAGE; i++) { - /* Disable for now. */ - mem_mapping_disable(&dev->ems[i].mapping); + if (!en) { + if (dev->ems_base > 0) + for (i = 0; i < EMS_MAXPAGE; i++) { + /* Disable for now. */ + mem_mapping_disable(&dev->ems[i].mapping); - /* Remove I/O handler. */ - io_removehandler(dev->ems_base + (i * EMS_PGSIZE), 2, - ems_read,NULL,NULL, ems_write,NULL,NULL, dev); - } + /* Remove I/O handler. */ + io_removehandler(dev->ems_base + (i * EMS_PGSIZE), 2, + ems_read, NULL, NULL, ems_write, NULL, NULL, dev); + } #ifdef ENABLE_NEAT_LOG - neat_log("NEAT: EMS disabled\n"); + neat_log("NEAT: EMS disabled\n"); #endif - return; + return; } /* Get configured I/O address. */ - i = (dev->regs[REG_RB9] & RB9_BASE) >> RB9_BASE_SH; + i = (dev->regs[REG_RB9] & RB9_BASE) >> RB9_BASE_SH; dev->ems_base = 0x0208 + (0x10 * i); /* Get configured frame address. */ - i = (dev->regs[REG_RB9] & RB9_FRAME) >> RB9_FRAME_SH; + i = (dev->regs[REG_RB9] & RB9_FRAME) >> RB9_FRAME_SH; dev->ems_frame = 0xC0000 + (EMS_PGSIZE * i); /* @@ -410,253 +405,249 @@ ems_init(neat_t *dev, int en) * up the I/O control handler. */ for (i = 0; i < EMS_MAXPAGE; i++) { - /* Create and initialize a page mapping. */ - mem_mapping_add(&dev->ems[i].mapping, - dev->ems_frame + (EMS_PGSIZE*i), EMS_PGSIZE, - ems_readb, ems_readw, NULL, - ems_writeb, ems_writew, NULL, - ram, MEM_MAPPING_EXTERNAL, - dev); + /* Create and initialize a page mapping. */ + mem_mapping_add(&dev->ems[i].mapping, + dev->ems_frame + (EMS_PGSIZE * i), EMS_PGSIZE, + ems_readb, ems_readw, NULL, + ems_writeb, ems_writew, NULL, + ram, MEM_MAPPING_EXTERNAL, + dev); - /* Disable for now. */ - mem_mapping_disable(&dev->ems[i].mapping); + /* Disable for now. */ + mem_mapping_disable(&dev->ems[i].mapping); - /* Set up an I/O port handler. */ - io_sethandler(dev->ems_base + (i * EMS_PGSIZE), 2, - ems_read,NULL,NULL, ems_write,NULL,NULL, dev); + /* Set up an I/O port handler. */ + io_sethandler(dev->ems_base + (i * EMS_PGSIZE), 2, + ems_read, NULL, NULL, ems_write, NULL, NULL, dev); - /* - * TODO: update the 'high_mem' mapping to reflect that we now - * have NN MB less extended memory available.. - */ + /* + * TODO: update the 'high_mem' mapping to reflect that we now + * have NN MB less extended memory available.. + */ } neat_log("NEAT: EMS enabled, I/O=%04xH, Frame=%05XH\n", - dev->ems_base, dev->ems_frame); + dev->ems_base, dev->ems_frame); } static void neat_write(uint16_t port, uint8_t val, void *priv) { - neat_t *dev = (neat_t *)priv; + neat_t *dev = (neat_t *) priv; uint8_t xval, *reg; - int i; + int i; #if NEAT_DEBUG > 2 neat_log("NEAT: write(%04x, %02x)\n", port, val); #endif switch (port) { - case 0x22: - dev->indx = val; - break; + case 0x22: + dev->indx = val; + break; - case 0x23: - reg = &dev->regs[dev->indx]; - xval = *reg ^ val; - switch (dev->indx) { - case REG_RA0: - val &= RA0_MASK; - *reg = (*reg & ~RA0_MASK) | val | \ - (RA0_REV_ID << RA0_REV_SH); + case 0x23: + reg = &dev->regs[dev->indx]; + xval = *reg ^ val; + switch (dev->indx) { + case REG_RA0: + val &= RA0_MASK; + *reg = (*reg & ~RA0_MASK) | val | (RA0_REV_ID << RA0_REV_SH); #if NEAT_DEBUG > 1 - neat_log("NEAT: RA0=%02x(%02x)\n", val, *reg); + neat_log("NEAT: RA0=%02x(%02x)\n", val, *reg); #endif - break; + break; - case REG_RA1: - val &= RA1_MASK; - *reg = (*reg & ~RA1_MASK) | val; + case REG_RA1: + val &= RA1_MASK; + *reg = (*reg & ~RA1_MASK) | val; #if NEAT_DEBUG > 1 - neat_log("NEAT: RA1=%02x(%02x)\n", val, *reg); + neat_log("NEAT: RA1=%02x(%02x)\n", val, *reg); #endif - break; + break; - case REG_RA2: - val &= RA2_MASK; - *reg = (*reg & ~RA2_MASK) | val; + case REG_RA2: + val &= RA2_MASK; + *reg = (*reg & ~RA2_MASK) | val; #if NEAT_DEBUG > 1 - neat_log("NEAT: RA2=%02x(%02x)\n", val, *reg); + neat_log("NEAT: RA2=%02x(%02x)\n", val, *reg); #endif - break; + break; - case REG_RB0: - val &= RB0_MASK; - *reg = (*reg & ~RB0_MASK) | val | \ - (RB0_REV_ID << RB0_REV_SH); + case REG_RB0: + val &= RB0_MASK; + *reg = (*reg & ~RB0_MASK) | val | (RB0_REV_ID << RB0_REV_SH); #if NEAT_DEBUG > 1 - neat_log("NEAT: RB0=%02x(%02x)\n", val, *reg); + neat_log("NEAT: RB0=%02x(%02x)\n", val, *reg); #endif - break; + break; - case REG_RB1: - val &= RB1_MASK; - *reg = (*reg & ~RB1_MASK) | val; + case REG_RB1: + val &= RB1_MASK; + *reg = (*reg & ~RB1_MASK) | val; #if NEAT_DEBUG > 1 - neat_log("NEAT: RB1=%02x(%02x)\n", val, *reg); + neat_log("NEAT: RB1=%02x(%02x)\n", val, *reg); #endif - break; + break; - case REG_RB2: - val &= RB2_MASK; - *reg = (*reg & ~RB2_MASK) | val; + case REG_RB2: + val &= RB2_MASK; + *reg = (*reg & ~RB2_MASK) | val; #if NEAT_DEBUG > 1 - neat_log("NEAT: RB2=%02x(%02x)\n", val, *reg); + neat_log("NEAT: RB2=%02x(%02x)\n", val, *reg); #endif - break; + break; - case REG_RB3: - val &= RB3_MASK; - *reg = (*reg & ~RB3_MASK) | val; + case REG_RB3: + val &= RB3_MASK; + *reg = (*reg & ~RB3_MASK) | val; #if NEAT_DEBUG > 1 - neat_log("NEAT: RB3=%02x(%02x)\n", val, *reg); + neat_log("NEAT: RB3=%02x(%02x)\n", val, *reg); #endif - break; + break; - case REG_RB4: - val &= RB4_MASK; - *reg = (*reg & ~RB4_MASK) | val; + case REG_RB4: + val &= RB4_MASK; + *reg = (*reg & ~RB4_MASK) | val; #if NEAT_DEBUG > 1 - neat_log("NEAT: RB4=%02x(%02x)\n", val, *reg); + neat_log("NEAT: RB4=%02x(%02x)\n", val, *reg); #endif - break; + break; - case REG_RB5: - val &= RB5_MASK; - *reg = (*reg & ~RB5_MASK) | val; + case REG_RB5: + val &= RB5_MASK; + *reg = (*reg & ~RB5_MASK) | val; #if NEAT_DEBUG > 1 - neat_log("NEAT: RB5=%02x(%02x)\n", val, *reg); + neat_log("NEAT: RB5=%02x(%02x)\n", val, *reg); #endif - break; + break; - case REG_RB6: - val &= RB6_MASK; - *reg = (*reg & ~RB6_MASK) | val; + case REG_RB6: + val &= RB6_MASK; + *reg = (*reg & ~RB6_MASK) | val; #if NEAT_DEBUG > 1 - neat_log("NEAT: RB6=%02x(%02x)\n", val, *reg); + neat_log("NEAT: RB6=%02x(%02x)\n", val, *reg); #endif - break; + break; - case REG_RB7: - val &= RB7_MASK; - *reg = val; + case REG_RB7: + val &= RB7_MASK; + *reg = val; #if NEAT_DEBUG > 1 - neat_log("NEAT: RB7=%02x(%02x)\n", val, *reg); + neat_log("NEAT: RB7=%02x(%02x)\n", val, *reg); #endif - if (val & RB7_EMSEN) - ems_init(dev, 1); - else if (xval & RB7_EMSEN) - ems_init(dev, 0); + if (val & RB7_EMSEN) + ems_init(dev, 1); + else if (xval & RB7_EMSEN) + ems_init(dev, 0); - if (xval & RB7_UMAREL) { - if (val & RB7_UMAREL) - mem_remap_top(384); - else - mem_remap_top(0); - } - break; + if (xval & RB7_UMAREL) { + if (val & RB7_UMAREL) + mem_remap_top(384); + else + mem_remap_top(0); + } + break; - case REG_RB8: - val &= RB8_MASK; - *reg = (*reg & ~RB8_MASK) | val; + case REG_RB8: + val &= RB8_MASK; + *reg = (*reg & ~RB8_MASK) | val; #if NEAT_DEBUG > 1 - neat_log("NEAT: RB8=%02x(%02x)\n", val, *reg); + neat_log("NEAT: RB8=%02x(%02x)\n", val, *reg); #endif - break; + break; - case REG_RB9: - val &= RB9_MASK; - *reg = (*reg & ~RB9_MASK) | val; + case REG_RB9: + val &= RB9_MASK; + *reg = (*reg & ~RB9_MASK) | val; #if NEAT_DEBUG > 1 - neat_log("NEAT: RB9=%02x(%02x)\n", val, *reg); + neat_log("NEAT: RB9=%02x(%02x)\n", val, *reg); #endif - if (dev->regs[REG_RB7] & RB7_EMSEN) { - ems_init(dev, 0); - ems_init(dev, 1); - } - break; + if (dev->regs[REG_RB7] & RB7_EMSEN) { + ems_init(dev, 0); + ems_init(dev, 1); + } + break; - case REG_RB10: - val &= RB10_MASK; - *reg = (*reg & ~RB10_MASK) | val; + case REG_RB10: + val &= RB10_MASK; + *reg = (*reg & ~RB10_MASK) | val; #if NEAT_DEBUG > 1 - neat_log("NEAT: RB10=%02x(%02x)\n", val, *reg); + neat_log("NEAT: RB10=%02x(%02x)\n", val, *reg); #endif - dev->ems[3].start = ((val & RB10_P3EXT) >> RB10_P3EXT_SH) << 21; - dev->ems[2].start = ((val & RB10_P2EXT) >> RB10_P2EXT_SH) << 21; - dev->ems[1].start = ((val & RB10_P1EXT) >> RB10_P1EXT_SH) << 21; - dev->ems[0].start = ((val & RB10_P0EXT) >> RB10_P0EXT_SH) << 21; - for (i = 0; i < EMS_MAXPAGE; i++) - ems_recalc(dev, &dev->ems[i]); - break; + dev->ems[3].start = ((val & RB10_P3EXT) >> RB10_P3EXT_SH) << 21; + dev->ems[2].start = ((val & RB10_P2EXT) >> RB10_P2EXT_SH) << 21; + dev->ems[1].start = ((val & RB10_P1EXT) >> RB10_P1EXT_SH) << 21; + dev->ems[0].start = ((val & RB10_P0EXT) >> RB10_P0EXT_SH) << 21; + for (i = 0; i < EMS_MAXPAGE; i++) + ems_recalc(dev, &dev->ems[i]); + break; - case REG_RB11: - val &= RB11_MASK; - *reg = (*reg & ~RB11_MASK) | val; + case REG_RB11: + val &= RB11_MASK; + *reg = (*reg & ~RB11_MASK) | val; #if NEAT_DEBUG > 1 - neat_log("NEAT: RB11=%02x(%02x)\n", val, *reg); + neat_log("NEAT: RB11=%02x(%02x)\n", val, *reg); #endif - i = (val & RB11_EMSLEN) >> RB11_EMSLEN_SH; - switch(i) { - case 0: /* "less than 2MB" */ - dev->ems_size = 512; - break; + i = (val & RB11_EMSLEN) >> RB11_EMSLEN_SH; + switch (i) { + case 0: /* "less than 2MB" */ + dev->ems_size = 512; + break; - case 1: /* 1 MB */ - case 2: /* 2 MB */ - case 3: /* 3 MB */ - case 4: /* 4 MB */ - case 5: /* 5 MB */ - case 6: /* 6 MB */ - case 7: /* 7 MB */ - dev->ems_size = i << 10; - break; - } - dev->ems_pages = (dev->ems_size << 10) / EMS_PGSIZE; - if (dev->regs[REG_RB7] & RB7_EMSEN) { - neat_log("NEAT: EMS %iKB (%i pages)\n", - dev->ems_size, dev->ems_pages); - } - break; + case 1: /* 1 MB */ + case 2: /* 2 MB */ + case 3: /* 3 MB */ + case 4: /* 4 MB */ + case 5: /* 5 MB */ + case 6: /* 6 MB */ + case 7: /* 7 MB */ + dev->ems_size = i << 10; + break; + } + dev->ems_pages = (dev->ems_size << 10) / EMS_PGSIZE; + if (dev->regs[REG_RB7] & RB7_EMSEN) { + neat_log("NEAT: EMS %iKB (%i pages)\n", + dev->ems_size, dev->ems_pages); + } + break; - default: - neat_log("NEAT: inv write to reg %02x (%02x)\n", - dev->indx, val); - break; - } - break; + default: + neat_log("NEAT: inv write to reg %02x (%02x)\n", + dev->indx, val); + break; + } + break; } } - static uint8_t neat_read(uint16_t port, void *priv) { - neat_t *dev = (neat_t *)priv; + neat_t *dev = (neat_t *) priv; uint8_t ret = 0xff; switch (port) { - case 0x22: - ret = dev->indx; - break; + case 0x22: + ret = dev->indx; + break; - case 0x23: - ret = dev->regs[dev->indx]; - break; + case 0x23: + ret = dev->regs[dev->indx]; + break; - default: - break; + default: + break; } #if NEAT_DEBUG > 2 neat_log("NEAT: read(%04x) = %02x\n", port, ret); #endif - return(ret); + return (ret); } - static void neat_close(void *priv) { @@ -665,21 +656,20 @@ neat_close(void *priv) free(dev); } - static void * neat_init(const device_t *info) { neat_t *dev; - int i; + int i; /* Create an instance. */ - dev = (neat_t *)malloc(sizeof(neat_t)); + dev = (neat_t *) malloc(sizeof(neat_t)); memset(dev, 0x00, sizeof(neat_t)); /* Initialize some of the registers to specific defaults. */ for (i = REG_RA0; i <= REG_RB11; i++) { - dev->indx = i; - neat_write(0x0023, 0x00, dev); + dev->indx = i; + neat_write(0x0023, 0x00, dev); } /* @@ -690,150 +680,150 @@ neat_init(const device_t *info) * bits, based on our cpu speed. */ i = 0; - switch(mem_size) { - case 512: /* 512KB */ - /* 256K, 0, 0, 0 */ - dev->regs[REG_RB6] &= ~RB6_BANKS; /* one bank */ - dev->regs[REG_RB6] |= (RTYPE_256K<regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ - dev->regs[REG_RB8] |= (RTYPE_NONE<regs[REG_RB6] &= ~RB6_BANKS; /* one bank */ + dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */ + dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ + dev->regs[REG_RB8] |= (RTYPE_NONE << RTYPE_SH); /* NONE */ + i = 2; + break; - case 640: /* 640KB */ - /* 256K, 64K, 0, 0 */ - dev->regs[REG_RB6] |= RB6_BANKS; /* two banks */ - dev->regs[REG_RB6] |= (RTYPE_MIXED<regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ - dev->regs[REG_RB8] |= (RTYPE_NONE<regs[REG_RB6] |= RB6_BANKS; /* two banks */ + dev->regs[REG_RB6] |= (RTYPE_MIXED << RTYPE_SH); /* mixed */ + dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ + dev->regs[REG_RB8] |= (RTYPE_NONE << RTYPE_SH); /* NONE */ + i = 4; + break; - case 1024: /* 1MB */ - /* 256K, 256K, 0, 0 */ - dev->regs[REG_RB6] |= RB6_BANKS; /* two banks */ - dev->regs[REG_RB6] |= (RTYPE_256K<regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ - dev->regs[REG_RB8] |= (RTYPE_NONE<regs[REG_RB6] |= RB6_BANKS; /* two banks */ + dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */ + dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ + dev->regs[REG_RB8] |= (RTYPE_NONE << RTYPE_SH); /* NONE */ + i = 5; + break; - case 1536: /* 1.5MB */ - /* 256K, 256K, 256K, 0 */ - dev->regs[REG_RB6] |= RB6_BANKS; /* two banks */ - dev->regs[REG_RB6] |= (RTYPE_256K<regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ - dev->regs[REG_RB8] |= (RTYPE_256K<regs[REG_RB6] |= RB6_BANKS; /* two banks */ + dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */ + dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ + dev->regs[REG_RB8] |= (RTYPE_256K << RTYPE_SH); /* 256K */ + i = 7; + break; - case 1664: /* 1.64MB */ - /* 256K, 64K, 256K, 256K */ - dev->regs[REG_RB6] |= RB6_BANKS; /* two banks */ - dev->regs[REG_RB6] |= (RTYPE_MIXED<regs[REG_RB8] |= RB8_BANKS; /* two banks */ - dev->regs[REG_RB8] |= (RTYPE_256K<regs[REG_RB6] |= RB6_BANKS; /* two banks */ + dev->regs[REG_RB6] |= (RTYPE_MIXED << RTYPE_SH); /* mixed */ + dev->regs[REG_RB8] |= RB8_BANKS; /* two banks */ + dev->regs[REG_RB8] |= (RTYPE_256K << RTYPE_SH); /* 256K */ + i = 10; + break; - case 2048: /* 2MB */ + case 2048: /* 2MB */ #if 1 - /* 256K, 256K, 256K, 256K */ - dev->regs[REG_RB6] |= RB6_BANKS; /* two banks */ - dev->regs[REG_RB6] |= (RTYPE_256K<regs[REG_RB8] |= RB8_BANKS; /* two banks */ - dev->regs[REG_RB8] |= (RTYPE_256K<regs[REG_RB8] |= RB8_4WAY; /* 4way intl */ - i = 11; + /* 256K, 256K, 256K, 256K */ + dev->regs[REG_RB6] |= RB6_BANKS; /* two banks */ + dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */ + dev->regs[REG_RB8] |= RB8_BANKS; /* two banks */ + dev->regs[REG_RB8] |= (RTYPE_256K << RTYPE_SH); /* 256K */ + dev->regs[REG_RB8] |= RB8_4WAY; /* 4way intl */ + i = 11; #else - /* 1M, 0, 0, 0 */ - dev->regs[REG_RB6] &= ~RB6_BANKS; /* one bank */ - dev->regs[REG_RB6] |= (RTYPE_1M<regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ - dev->regs[REG_RB8] |= (RTYPE_NONE<regs[REG_RB6] &= ~RB6_BANKS; /* one bank */ + dev->regs[REG_RB6] |= (RTYPE_1M << RTYPE_SH); /* 1M */ + dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ + dev->regs[REG_RB8] |= (RTYPE_NONE << RTYPE_SH); /* NONE */ + i = 3; #endif - break; + break; - case 3072: /* 3MB */ - /* 256K, 256K, 1M, 0 */ - dev->regs[REG_RB6] |= RB6_BANKS; /* two banks */ - dev->regs[REG_RB6] |= (RTYPE_256K<regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ - dev->regs[REG_RB8] |= (RTYPE_1M<regs[REG_RB6] |= RB6_BANKS; /* two banks */ + dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */ + dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ + dev->regs[REG_RB8] |= (RTYPE_1M << RTYPE_SH); /* 1M */ + i = 8; + break; - case 4096: /* 4MB */ - /* 1M, 1M, 0, 0 */ - dev->regs[REG_RB6] |= RB6_BANKS; /* two banks */ - dev->regs[REG_RB6] |= (RTYPE_1M<regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ - dev->regs[REG_RB8] |= (RTYPE_NONE<regs[REG_RB6] |= RB6_BANKS; /* two banks */ + dev->regs[REG_RB6] |= (RTYPE_1M << RTYPE_SH); /* 1M */ + dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ + dev->regs[REG_RB8] |= (RTYPE_NONE << RTYPE_SH); /* NONE */ + i = 6; + break; - case 4224: /* 4.64MB */ - /* 256K, 64K, 1M, 1M */ - dev->regs[REG_RB6] |= RB6_BANKS; /* two banks */ - dev->regs[REG_RB6] |= (RTYPE_MIXED<regs[REG_RB8] |= RB8_BANKS; /* two banks */ - dev->regs[REG_RB8] |= (RTYPE_1M<regs[REG_RB6] |= RB6_BANKS; /* two banks */ + dev->regs[REG_RB6] |= (RTYPE_MIXED << RTYPE_SH); /* mixed */ + dev->regs[REG_RB8] |= RB8_BANKS; /* two banks */ + dev->regs[REG_RB8] |= (RTYPE_1M << RTYPE_SH); /* 1M */ + i = 12; + break; - case 5120: /* 5MB */ - /* 256K, 256K, 1M, 1M */ - dev->regs[REG_RB6] |= RB6_BANKS; /* two banks */ - dev->regs[REG_RB6] |= (RTYPE_256K<regs[REG_RB8] |= RB8_BANKS; /* two banks */ - dev->regs[REG_RB8] |= (RTYPE_1M<regs[REG_RB6] |= RB6_BANKS; /* two banks */ + dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */ + dev->regs[REG_RB8] |= RB8_BANKS; /* two banks */ + dev->regs[REG_RB8] |= (RTYPE_1M << RTYPE_SH); /* 1M */ + i = 13; + break; - case 6144: /* 6MB */ - /* 1M, 1M, 1M, 0 */ - dev->regs[REG_RB6] |= RB6_BANKS; /* two banks */ - dev->regs[REG_RB6] |= (RTYPE_1M<regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ - dev->regs[REG_RB8] |= (RTYPE_1M<regs[REG_RB6] |= RB6_BANKS; /* two banks */ + dev->regs[REG_RB6] |= (RTYPE_1M << RTYPE_SH); /* 1M */ + dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ + dev->regs[REG_RB8] |= (RTYPE_1M << RTYPE_SH); /* 1M */ + i = 9; + break; - case 8192: /* 8MB */ - /* 1M, 1M, 1M, 1M */ - dev->regs[REG_RB6] |= RB6_BANKS; /* two banks */ - dev->regs[REG_RB6] |= (RTYPE_1M<regs[REG_RB8] |= RB8_BANKS; /* two banks */ - dev->regs[REG_RB8] |= (RTYPE_1M<regs[REG_RB8] |= RB8_4WAY; /* 4way intl */ - i = 14; - break; + case 8192: /* 8MB */ + /* 1M, 1M, 1M, 1M */ + dev->regs[REG_RB6] |= RB6_BANKS; /* two banks */ + dev->regs[REG_RB6] |= (RTYPE_1M << RTYPE_SH); /* 1M */ + dev->regs[REG_RB8] |= RB8_BANKS; /* two banks */ + dev->regs[REG_RB8] |= (RTYPE_1M << RTYPE_SH); /* 1M */ + dev->regs[REG_RB8] |= RB8_4WAY; /* 4way intl */ + i = 14; + break; - default: - neat_log("NEAT: **INVALID DRAM SIZE %iKB !**\n", mem_size); + default: + neat_log("NEAT: **INVALID DRAM SIZE %iKB !**\n", mem_size); } if (i > 0) { - neat_log("NEAT: using DRAM mode #%i (mem=%iKB)\n", i, mem_size); + neat_log("NEAT: using DRAM mode #%i (mem=%iKB)\n", i, mem_size); } /* Set up an I/O handler for the chipset. */ io_sethandler(0x0022, 2, - neat_read,NULL,NULL, neat_write,NULL,NULL, dev); + neat_read, NULL, NULL, neat_write, NULL, NULL, dev); return dev; } const device_t neat_device = { - .name = "C&T CS8121 (NEAT)", + .name = "C&T CS8121 (NEAT)", .internal_name = "neat", - .flags = 0, - .local = 0, - .init = neat_init, - .close = neat_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = neat_init, + .close = neat_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/olivetti_eva.c b/src/chipset/olivetti_eva.c index 0728d44e5..b06030508 100644 --- a/src/chipset/olivetti_eva.c +++ b/src/chipset/olivetti_eva.c @@ -16,7 +16,6 @@ * Copyright 2020-2021 EngiNerd */ - #include #include #include @@ -35,8 +34,8 @@ typedef struct { - uint8_t reg_065; - uint8_t reg_067; + uint8_t reg_065; + uint8_t reg_067; uint8_t reg_069; } olivetti_eva_t; @@ -50,11 +49,11 @@ olivetti_eva_log(const char *fmt, ...) if (olivetti_eva_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); - va_end(ap); + va_end(ap); } } #else -#define olivetti_eva_log(fmt, ...) +# define olivetti_eva_log(fmt, ...) #endif static void @@ -98,7 +97,7 @@ static uint8_t olivetti_eva_read(uint16_t addr, void *priv) { olivetti_eva_t *dev = (olivetti_eva_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; switch (addr) { case 0x065: ret = dev->reg_065; @@ -115,7 +114,6 @@ olivetti_eva_read(uint16_t addr, void *priv) return ret; } - static void olivetti_eva_close(void *priv) { @@ -157,15 +155,15 @@ olivetti_eva_init(const device_t *info) } const device_t olivetti_eva_device = { - .name = "Olivetti EVA Gate Array", + .name = "Olivetti EVA Gate Array", .internal_name = "olivetta_eva", - .flags = 0, - .local = 0, - .init = olivetti_eva_init, - .close = olivetti_eva_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = olivetti_eva_init, + .close = olivetti_eva_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/opti283.c b/src/chipset/opti283.c index 8e9403c29..7053e2f2f 100644 --- a/src/chipset/opti283.c +++ b/src/chipset/opti283.c @@ -30,7 +30,6 @@ #include <86box/mem.h> #include <86box/chipset.h> - #ifdef ENABLE_OPTI283_LOG int opti283_do_log = ENABLE_OPTI283_LOG; @@ -39,33 +38,29 @@ opti283_log(const char *fmt, ...) { va_list ap; - if (opti283_do_log) - { + if (opti283_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define opti283_log(fmt, ...) +# define opti283_log(fmt, ...) #endif - typedef struct { - uint32_t phys, virt; + uint32_t phys, virt; } mem_remapping_t; - typedef struct { - uint8_t index, shadow_high, - regs[256]; - mem_remapping_t mem_remappings[2]; - mem_mapping_t mem_mappings[2]; + uint8_t index, shadow_high, + regs[256]; + mem_remapping_t mem_remappings[2]; + mem_mapping_t mem_mappings[2]; } opti283_t; - static uint8_t opti283_read_remapped_ram(uint32_t addr, void *priv) { @@ -74,7 +69,6 @@ opti283_read_remapped_ram(uint32_t addr, void *priv) return mem_read_ram((addr - dev->virt) + dev->phys, priv); } - static uint16_t opti283_read_remapped_ramw(uint32_t addr, void *priv) { @@ -83,7 +77,6 @@ opti283_read_remapped_ramw(uint32_t addr, void *priv) return mem_read_ramw((addr - dev->virt) + dev->phys, priv); } - static uint32_t opti283_read_remapped_raml(uint32_t addr, void *priv) { @@ -92,7 +85,6 @@ opti283_read_remapped_raml(uint32_t addr, void *priv) return mem_read_raml((addr - dev->virt) + dev->phys, priv); } - static void opti283_write_remapped_ram(uint32_t addr, uint8_t val, void *priv) { @@ -101,7 +93,6 @@ opti283_write_remapped_ram(uint32_t addr, uint8_t val, void *priv) mem_write_ram((addr - dev->virt) + dev->phys, val, priv); } - static void opti283_write_remapped_ramw(uint32_t addr, uint16_t val, void *priv) { @@ -110,7 +101,6 @@ opti283_write_remapped_ramw(uint32_t addr, uint16_t val, void *priv) mem_write_ramw((addr - dev->virt) + dev->phys, val, priv); } - static void opti283_write_remapped_raml(uint32_t addr, uint32_t val, void *priv) { @@ -119,161 +109,157 @@ opti283_write_remapped_raml(uint32_t addr, uint32_t val, void *priv) mem_write_raml((addr - dev->virt) + dev->phys, val, priv); } - static void opti283_shadow_recalc(opti283_t *dev) { uint32_t i, base; uint32_t rbase; - uint8_t sh_enable, sh_mode; - uint8_t rom, sh_copy; + uint8_t sh_enable, sh_mode; + uint8_t rom, sh_copy; shadowbios = shadowbios_write = 0; - dev->shadow_high = 0; + dev->shadow_high = 0; opti283_log("OPTI 283: %02X %02X %02X %02X\n", dev->regs[0x11], dev->regs[0x12], dev->regs[0x13], dev->regs[0x14]); if (dev->regs[0x11] & 0x80) { - mem_set_mem_state_both(0xf0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); - opti283_log("OPTI 283: F0000-FFFFF READ_EXTANY, WRITE_INTERNAL\n"); - shadowbios_write = 1; + mem_set_mem_state_both(0xf0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + opti283_log("OPTI 283: F0000-FFFFF READ_EXTANY, WRITE_INTERNAL\n"); + shadowbios_write = 1; } else { - shadowbios = 1; - if (dev->regs[0x14] & 0x80) { - mem_set_mem_state_both(0xf0000, 0x01000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - opti283_log("OPTI 283: F0000-F0FFF READ_INTERNAL, WRITE_INTERNAL\n"); - shadowbios_write = 1; - } else { - mem_set_mem_state_both(0xf0000, 0x01000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); - opti283_log("OPTI 283: F0000-F0FFF READ_INTERNAL, WRITE_DISABLED\n"); - } + shadowbios = 1; + if (dev->regs[0x14] & 0x80) { + mem_set_mem_state_both(0xf0000, 0x01000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + opti283_log("OPTI 283: F0000-F0FFF READ_INTERNAL, WRITE_INTERNAL\n"); + shadowbios_write = 1; + } else { + mem_set_mem_state_both(0xf0000, 0x01000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); + opti283_log("OPTI 283: F0000-F0FFF READ_INTERNAL, WRITE_DISABLED\n"); + } - mem_set_mem_state_both(0xf1000, 0x0f000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); - opti283_log("OPTI 283: F1000-FFFFF READ_INTERNAL, WRITE_DISABLED\n"); + mem_set_mem_state_both(0xf1000, 0x0f000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); + opti283_log("OPTI 283: F1000-FFFFF READ_INTERNAL, WRITE_DISABLED\n"); } sh_copy = dev->regs[0x11] & 0x08; for (i = 0; i < 12; i++) { - base = 0xc0000 + (i << 14); - if (i >= 4) - sh_enable = dev->regs[0x12] & (1 << (i - 4)); - else - sh_enable = dev->regs[0x13] & (1 << (i + 4)); - sh_mode = dev->regs[0x11] & (1 << (i >> 2)); - rom = dev->regs[0x11] & (1 << ((i >> 2) + 4)); - opti283_log("OPTI 283: %i/%08X: %i, %i, %i\n", i, base, (i >= 4) ? (1 << (i - 4)) : (1 << (i + 4)), (1 << (i >> 2)), (1 << ((i >> 2) + 4))); + base = 0xc0000 + (i << 14); + if (i >= 4) + sh_enable = dev->regs[0x12] & (1 << (i - 4)); + else + sh_enable = dev->regs[0x13] & (1 << (i + 4)); + sh_mode = dev->regs[0x11] & (1 << (i >> 2)); + rom = dev->regs[0x11] & (1 << ((i >> 2) + 4)); + opti283_log("OPTI 283: %i/%08X: %i, %i, %i\n", i, base, (i >= 4) ? (1 << (i - 4)) : (1 << (i + 4)), (1 << (i >> 2)), (1 << ((i >> 2) + 4))); - if (sh_enable && rom) { - if (base >= 0x000e0000) - shadowbios |= 1; - if (base >= 0x000d0000) - dev->shadow_high |= 1; + if (sh_enable && rom) { + if (base >= 0x000e0000) + shadowbios |= 1; + if (base >= 0x000d0000) + dev->shadow_high |= 1; - if (sh_mode) { - mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); - opti283_log("OPTI 283: %08X-%08X READ_INTERNAL, WRITE_DISABLED\n", base, base + 0x3fff); - } else { - if (base >= 0x000e0000) - shadowbios_write |= 1; + if (sh_mode) { + mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); + opti283_log("OPTI 283: %08X-%08X READ_INTERNAL, WRITE_DISABLED\n", base, base + 0x3fff); + } else { + if (base >= 0x000e0000) + shadowbios_write |= 1; - if (sh_copy) { - mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - opti283_log("OPTI 283: %08X-%08X READ_INTERNAL, WRITE_INTERNAL\n", base, base + 0x3fff); - } else { - mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL); - opti283_log("OPTI 283: %08X-%08X READ_INTERNAL, WRITE_EXTERNAL\n", base, base + 0x3fff); - } - } - } else { - if (base >= 0xe0000) { - mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_DISABLED); - opti283_log("OPTI 283: %08X-%08X READ_EXTANY, WRITE_DISABLED\n", base, base + 0x3fff); - } else { - mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTERNAL | MEM_WRITE_DISABLED); - opti283_log("OPTI 283: %08X-%08X READ_EXTERNAL, WRITE_DISABLED\n", base, base + 0x3fff); - } - } + if (sh_copy) { + mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + opti283_log("OPTI 283: %08X-%08X READ_INTERNAL, WRITE_INTERNAL\n", base, base + 0x3fff); + } else { + mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL); + opti283_log("OPTI 283: %08X-%08X READ_INTERNAL, WRITE_EXTERNAL\n", base, base + 0x3fff); + } + } + } else { + if (base >= 0xe0000) { + mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_DISABLED); + opti283_log("OPTI 283: %08X-%08X READ_EXTANY, WRITE_DISABLED\n", base, base + 0x3fff); + } else { + mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTERNAL | MEM_WRITE_DISABLED); + opti283_log("OPTI 283: %08X-%08X READ_EXTERNAL, WRITE_DISABLED\n", base, base + 0x3fff); + } + } } rbase = ((uint32_t) (dev->regs[0x13] & 0x0f)) << 20; if (rbase > 0) { - dev->mem_remappings[0].virt = rbase; - mem_mapping_set_addr(&dev->mem_mappings[0], rbase, 0x00020000); + dev->mem_remappings[0].virt = rbase; + mem_mapping_set_addr(&dev->mem_mappings[0], rbase, 0x00020000); - if (!dev->shadow_high) { - rbase += 0x00020000; - dev->mem_remappings[1].virt = rbase; - mem_mapping_set_addr(&dev->mem_mappings[1], rbase , 0x00020000); - } else - mem_mapping_disable(&dev->mem_mappings[1]); + if (!dev->shadow_high) { + rbase += 0x00020000; + dev->mem_remappings[1].virt = rbase; + mem_mapping_set_addr(&dev->mem_mappings[1], rbase, 0x00020000); + } else + mem_mapping_disable(&dev->mem_mappings[1]); } else { - mem_mapping_disable(&dev->mem_mappings[0]); - mem_mapping_disable(&dev->mem_mappings[1]); + mem_mapping_disable(&dev->mem_mappings[0]); + mem_mapping_disable(&dev->mem_mappings[1]); } flushmmucache_nopc(); } - static void opti283_write(uint16_t addr, uint8_t val, void *priv) { - opti283_t *dev = (opti283_t *)priv; + opti283_t *dev = (opti283_t *) priv; switch (addr) { - case 0x22: - dev->index = val; - break; + case 0x22: + dev->index = val; + break; - case 0x24: - opti283_log("OPTi 283: dev->regs[%02x] = %02x\n", dev->index, val); + case 0x24: + opti283_log("OPTi 283: dev->regs[%02x] = %02x\n", dev->index, val); - switch (dev->index) { - case 0x10: - dev->regs[dev->index] = val; - break; + switch (dev->index) { + case 0x10: + dev->regs[dev->index] = val; + break; - case 0x14: - reset_on_hlt = !!(val & 0x40); - /* FALLTHROUGH */ - case 0x11: case 0x12: - case 0x13: - dev->regs[dev->index] = val; - opti283_shadow_recalc(dev); - break; - } - break; + case 0x14: + reset_on_hlt = !!(val & 0x40); + /* FALLTHROUGH */ + case 0x11: + case 0x12: + case 0x13: + dev->regs[dev->index] = val; + opti283_shadow_recalc(dev); + break; + } + break; } } - static uint8_t opti283_read(uint16_t addr, void *priv) { - opti283_t *dev = (opti283_t *)priv; - uint8_t ret = 0xff; + opti283_t *dev = (opti283_t *) priv; + uint8_t ret = 0xff; if (addr == 0x24) - ret = dev->regs[dev->index]; + ret = dev->regs[dev->index]; return ret; } - static void opti283_close(void *priv) { - opti283_t *dev = (opti283_t *)priv; + opti283_t *dev = (opti283_t *) priv; free(dev); } - static void * opti283_init(const device_t *info) { - opti283_t *dev = (opti283_t *)malloc(sizeof(opti283_t)); + opti283_t *dev = (opti283_t *) malloc(sizeof(opti283_t)); memset(dev, 0x00, sizeof(opti283_t)); io_sethandler(0x0022, 0x0001, opti283_read, NULL, NULL, opti283_write, NULL, NULL, dev); @@ -286,14 +272,14 @@ opti283_init(const device_t *info) dev->mem_remappings[1].phys = 0x000d0000; mem_mapping_add(&dev->mem_mappings[0], 0, 0x00020000, - opti283_read_remapped_ram, opti283_read_remapped_ramw, opti283_read_remapped_raml, - opti283_write_remapped_ram, opti283_write_remapped_ramw, opti283_write_remapped_raml, + opti283_read_remapped_ram, opti283_read_remapped_ramw, opti283_read_remapped_raml, + opti283_write_remapped_ram, opti283_write_remapped_ramw, opti283_write_remapped_raml, &ram[dev->mem_remappings[0].phys], MEM_MAPPING_INTERNAL, &dev->mem_remappings[0]); mem_mapping_disable(&dev->mem_mappings[0]); mem_mapping_add(&dev->mem_mappings[1], 0, 0x00020000, - opti283_read_remapped_ram, opti283_read_remapped_ramw, opti283_read_remapped_raml, - opti283_write_remapped_ram, opti283_write_remapped_ramw, opti283_write_remapped_raml, + opti283_read_remapped_ram, opti283_read_remapped_ramw, opti283_read_remapped_raml, + opti283_write_remapped_ram, opti283_write_remapped_ramw, opti283_write_remapped_raml, &ram[dev->mem_remappings[1].phys], MEM_MAPPING_INTERNAL, &dev->mem_remappings[1]); mem_mapping_disable(&dev->mem_mappings[1]); @@ -303,15 +289,15 @@ opti283_init(const device_t *info) } const device_t opti283_device = { - .name = "OPTi 82C283", + .name = "OPTi 82C283", .internal_name = "opti283", - .flags = 0, - .local = 0, - .init = opti283_init, - .close = opti283_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = opti283_init, + .close = opti283_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/opti291.c b/src/chipset/opti291.c index 6bf8851e7..52a2803aa 100644 --- a/src/chipset/opti291.c +++ b/src/chipset/opti291.c @@ -34,128 +34,125 @@ int opti291_do_log = ENABLE_OPTI291_LOG; static void opti291_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (opti291_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (opti291_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define opti291_log(fmt, ...) +# define opti291_log(fmt, ...) #endif typedef struct { - uint8_t index, regs[256]; - port_92_t *port_92; + uint8_t index, regs[256]; + port_92_t *port_92; } opti291_t; -static void opti291_recalc(opti291_t *dev) +static void +opti291_recalc(opti291_t *dev) { - mem_set_mem_state_both(0xf0000, 0x10000, (!(dev->regs[0x23] & 0x40) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x80) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL)); + mem_set_mem_state_both(0xf0000, 0x10000, (!(dev->regs[0x23] & 0x40) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x80) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL)); - for (uint32_t i = 0; i < 4; i++) - { - mem_set_mem_state_both(0xc0000 + (i << 14), 0x4000, ((dev->regs[0x26] & (1 << (i + 4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x10) ? MEM_WRITE_DISABLED : ((dev->regs[0x26] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY))); - mem_set_mem_state_both(0xd0000 + (i << 14), 0x4000, ((dev->regs[0x25] & (1 << (i + 4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x20) ? MEM_WRITE_DISABLED : ((dev->regs[0x25] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY))); - mem_set_mem_state_both(0xe0000 + (i << 14), 0x4000, ((dev->regs[0x24] & (1 << (i + 4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x40) ? MEM_WRITE_DISABLED : ((dev->regs[0x24] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY))); - } - flushmmucache(); + for (uint32_t i = 0; i < 4; i++) { + mem_set_mem_state_both(0xc0000 + (i << 14), 0x4000, ((dev->regs[0x26] & (1 << (i + 4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x10) ? MEM_WRITE_DISABLED : ((dev->regs[0x26] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY))); + mem_set_mem_state_both(0xd0000 + (i << 14), 0x4000, ((dev->regs[0x25] & (1 << (i + 4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x20) ? MEM_WRITE_DISABLED : ((dev->regs[0x25] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY))); + mem_set_mem_state_both(0xe0000 + (i << 14), 0x4000, ((dev->regs[0x24] & (1 << (i + 4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x40) ? MEM_WRITE_DISABLED : ((dev->regs[0x24] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY))); + } + flushmmucache(); } static void opti291_write(uint16_t addr, uint8_t val, void *priv) { - opti291_t *dev = (opti291_t *)priv; + opti291_t *dev = (opti291_t *) priv; - switch (addr) - { - case 0x22: - dev->index = val; - break; - case 0x24: - opti291_log("OPTi 291: dev->regs[%02x] = %02x\n", dev->index, val); - switch (dev->index) - { - case 0x20: - dev->regs[dev->index] = val & 0x3f; - break; - case 0x21: - dev->regs[dev->index] = val & 0xf3; - break; - case 0x22: - dev->regs[dev->index] = val; - break; - case 0x23: - case 0x24: - case 0x25: - case 0x26: - dev->regs[dev->index] = val; - opti291_recalc(dev); - break; - case 0x27: - case 0x28: - dev->regs[dev->index] = val; - break; - case 0x29: - dev->regs[dev->index] = val & 0x0f; - break; - case 0x2a: - case 0x2b: - case 0x2c: - dev->regs[dev->index] = val; - break; - } - break; - } + switch (addr) { + case 0x22: + dev->index = val; + break; + case 0x24: + opti291_log("OPTi 291: dev->regs[%02x] = %02x\n", dev->index, val); + switch (dev->index) { + case 0x20: + dev->regs[dev->index] = val & 0x3f; + break; + case 0x21: + dev->regs[dev->index] = val & 0xf3; + break; + case 0x22: + dev->regs[dev->index] = val; + break; + case 0x23: + case 0x24: + case 0x25: + case 0x26: + dev->regs[dev->index] = val; + opti291_recalc(dev); + break; + case 0x27: + case 0x28: + dev->regs[dev->index] = val; + break; + case 0x29: + dev->regs[dev->index] = val & 0x0f; + break; + case 0x2a: + case 0x2b: + case 0x2c: + dev->regs[dev->index] = val; + break; + } + break; + } } static uint8_t opti291_read(uint16_t addr, void *priv) { - opti291_t *dev = (opti291_t *)priv; + opti291_t *dev = (opti291_t *) priv; - return (addr == 0x24) ? dev->regs[dev->index] : 0xff; + return (addr == 0x24) ? dev->regs[dev->index] : 0xff; } static void opti291_close(void *priv) { - opti291_t *dev = (opti291_t *)priv; + opti291_t *dev = (opti291_t *) priv; - free(dev); + free(dev); } static void * opti291_init(const device_t *info) { - opti291_t *dev = (opti291_t *)malloc(sizeof(opti291_t)); - memset(dev, 0, sizeof(opti291_t)); + opti291_t *dev = (opti291_t *) malloc(sizeof(opti291_t)); + memset(dev, 0, sizeof(opti291_t)); - io_sethandler(0x022, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev); - io_sethandler(0x024, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev); - dev->regs[0x22] = 0xf0; - dev->regs[0x23] = 0x40; - dev->regs[0x28] = 0x08; - dev->regs[0x29] = 0xa0; - device_add(&port_92_device); - opti291_recalc(dev); + io_sethandler(0x022, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev); + io_sethandler(0x024, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev); + dev->regs[0x22] = 0xf0; + dev->regs[0x23] = 0x40; + dev->regs[0x28] = 0x08; + dev->regs[0x29] = 0xa0; + device_add(&port_92_device); + opti291_recalc(dev); - return dev; + return dev; } const device_t opti291_device = { - .name = "OPTi 82C291", + .name = "OPTi 82C291", .internal_name = "opti291", - .flags = 0, - .local = 0, - .init = opti291_init, - .close = opti291_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = opti291_init, + .close = opti291_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/opti391.c b/src/chipset/opti391.c index 51c8d9daa..b787fae8f 100644 --- a/src/chipset/opti391.c +++ b/src/chipset/opti391.c @@ -28,7 +28,6 @@ #include <86box/mem.h> #include <86box/chipset.h> - #ifdef ENABLE_OPTI391_LOG int opti391_do_log = ENABLE_OPTI391_LOG; @@ -37,160 +36,159 @@ opti391_log(const char *fmt, ...) { va_list ap; - if (opti391_do_log) - { + if (opti391_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define opti391_log(fmt, ...) +# define opti391_log(fmt, ...) #endif - typedef struct { - uint32_t phys, virt; + uint32_t phys, virt; } mem_remapping_t; - typedef struct { - uint8_t index, regs[256]; + uint8_t index, regs[256]; } opti391_t; - static void opti391_shadow_recalc(opti391_t *dev) { uint32_t i, base; - uint8_t sh_enable, sh_master; - uint8_t sh_wp, sh_write_internal; + uint8_t sh_enable, sh_master; + uint8_t sh_wp, sh_write_internal; shadowbios = shadowbios_write = 0; /* F0000-FFFFF */ sh_enable = !(dev->regs[0x22] & 0x80); if (sh_enable) - mem_set_mem_state_both(0xf0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + mem_set_mem_state_both(0xf0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); else - mem_set_mem_state_both(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); + mem_set_mem_state_both(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); sh_write_internal = (dev->regs[0x26] & 0x40); /* D0000-EFFFF */ for (i = 0; i < 8; i++) { - base = 0xd0000 + (i << 14); - if (base >= 0xe0000) { - sh_master = (dev->regs[0x22] & 0x40); - sh_wp = (dev->regs[0x22] & 0x10); - } else { - sh_master = (dev->regs[0x22] & 0x20); - sh_wp = (dev->regs[0x22] & 0x08); - } - sh_enable = dev->regs[0x23] & (1 << i); + base = 0xd0000 + (i << 14); + if (base >= 0xe0000) { + sh_master = (dev->regs[0x22] & 0x40); + sh_wp = (dev->regs[0x22] & 0x10); + } else { + sh_master = (dev->regs[0x22] & 0x20); + sh_wp = (dev->regs[0x22] & 0x08); + } + sh_enable = dev->regs[0x23] & (1 << i); - if (sh_master) { - if (sh_enable) { - if (sh_wp) - mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); - else - mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } else if (sh_write_internal) - mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); - else - mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - } else if (sh_write_internal) - mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); - else - mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + if (sh_master) { + if (sh_enable) { + if (sh_wp) + mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); + else + mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } else if (sh_write_internal) + mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + else + mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + } else if (sh_write_internal) + mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + else + mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); } /* C0000-CFFFF */ sh_master = !(dev->regs[0x26] & 0x10); - sh_wp = (dev->regs[0x26] & 0x20); + sh_wp = (dev->regs[0x26] & 0x20); for (i = 0; i < 4; i++) { - base = 0xc0000 + (i << 14); - sh_enable = dev->regs[0x26] & (1 << i); + base = 0xc0000 + (i << 14); + sh_enable = dev->regs[0x26] & (1 << i); - if (sh_master) { - if (sh_enable) { - if (sh_wp) - mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); - else - mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } else if (sh_write_internal) - mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); - else - mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - } else if (sh_write_internal) - mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); - else - mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + if (sh_master) { + if (sh_enable) { + if (sh_wp) + mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED); + else + mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } else if (sh_write_internal) + mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + else + mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + } else if (sh_write_internal) + mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + else + mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); } } - static void opti391_write(uint16_t addr, uint8_t val, void *priv) { - opti391_t *dev = (opti391_t *)priv; + opti391_t *dev = (opti391_t *) priv; switch (addr) { - case 0x22: - dev->index = val; - break; + case 0x22: + dev->index = val; + break; - case 0x24: - opti391_log("OPTi 391: dev->regs[%02x] = %02x\n", dev->index, val); + case 0x24: + opti391_log("OPTi 391: dev->regs[%02x] = %02x\n", dev->index, val); - switch (dev->index) { - case 0x20: - dev->regs[dev->index] = (dev->regs[dev->index] & 0xc0) | (val & 0x3f); - break; + switch (dev->index) { + case 0x20: + dev->regs[dev->index] = (dev->regs[dev->index] & 0xc0) | (val & 0x3f); + break; - case 0x21: case 0x24: case 0x25: case 0x27: - case 0x28: case 0x29: case 0x2a: case 0x2b: - dev->regs[dev->index] = val; - break; + case 0x21: + case 0x24: + case 0x25: + case 0x27: + case 0x28: + case 0x29: + case 0x2a: + case 0x2b: + dev->regs[dev->index] = val; + break; - case 0x22: case 0x23: - case 0x26: - dev->regs[dev->index] = val; - opti391_shadow_recalc(dev); - break; - } - break; + case 0x22: + case 0x23: + case 0x26: + dev->regs[dev->index] = val; + opti391_shadow_recalc(dev); + break; + } + break; } } - static uint8_t opti391_read(uint16_t addr, void *priv) { - opti391_t *dev = (opti391_t *)priv; - uint8_t ret = 0xff; + opti391_t *dev = (opti391_t *) priv; + uint8_t ret = 0xff; if (addr == 0x24) - ret = dev->regs[dev->index]; + ret = dev->regs[dev->index]; return ret; } - static void opti391_close(void *priv) { - opti391_t *dev = (opti391_t *)priv; + opti391_t *dev = (opti391_t *) priv; free(dev); } - static void * opti391_init(const device_t *info) { - opti391_t *dev = (opti391_t *)malloc(sizeof(opti391_t)); + opti391_t *dev = (opti391_t *) malloc(sizeof(opti391_t)); memset(dev, 0x00, sizeof(opti391_t)); io_sethandler(0x0022, 0x0001, opti391_read, NULL, NULL, opti391_write, NULL, NULL, dev); @@ -212,15 +210,15 @@ opti391_init(const device_t *info) } const device_t opti391_device = { - .name = "OPTi 82C391", + .name = "OPTi 82C391", .internal_name = "opti391", - .flags = 0, - .local = 0, - .init = opti391_init, - .close = opti391_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = opti391_init, + .close = opti391_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/opti495.c b/src/chipset/opti495.c index c02f9cc1f..627952d09 100644 --- a/src/chipset/opti495.c +++ b/src/chipset/opti495.c @@ -31,159 +31,151 @@ #include <86box/port_92.h> #include <86box/chipset.h> - typedef struct { - uint8_t idx, - regs[256], - scratch[2]; + uint8_t idx, + regs[256], + scratch[2]; } opti495_t; - #ifdef ENABLE_OPTI495_LOG int opti495_do_log = ENABLE_OPTI495_LOG; - static void opti495_log(const char *fmt, ...) { va_list ap; if (opti495_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define opti495_log(fmt, ...) +# define opti495_log(fmt, ...) #endif - static void opti495_recalc(opti495_t *dev) { uint32_t base; uint32_t i, shflags = 0; - shadowbios = 0; + shadowbios = 0; shadowbios_write = 0; if (dev->regs[0x22] & 0x80) { - shadowbios = 1; - shadowbios_write = 0; - shflags = MEM_READ_EXTANY | MEM_WRITE_INTERNAL; + shadowbios = 1; + shadowbios_write = 0; + shflags = MEM_READ_EXTANY | MEM_WRITE_INTERNAL; } else { - shadowbios = 0; - shadowbios_write = 1; - shflags = MEM_READ_INTERNAL | MEM_WRITE_DISABLED; + shadowbios = 0; + shadowbios_write = 1; + shflags = MEM_READ_INTERNAL | MEM_WRITE_DISABLED; } mem_set_mem_state_both(0xf0000, 0x10000, shflags); for (i = 0; i < 8; i++) { - base = 0xd0000 + (i << 14); + base = 0xd0000 + (i << 14); - if ((dev->regs[0x22] & ((base >= 0xe0000) ? 0x20 : 0x40)) && - (dev->regs[0x23] & (1 << i))) { - shflags = MEM_READ_INTERNAL; - shflags |= (dev->regs[0x22] & ((base >= 0xe0000) ? 0x08 : 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; - } else { - if (dev->regs[0x26] & 0x40) { - shflags = MEM_READ_EXTANY; - shflags |= (dev->regs[0x22] & ((base >= 0xe0000) ? 0x08 : 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; - } else - shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY; - } + if ((dev->regs[0x22] & ((base >= 0xe0000) ? 0x20 : 0x40)) && (dev->regs[0x23] & (1 << i))) { + shflags = MEM_READ_INTERNAL; + shflags |= (dev->regs[0x22] & ((base >= 0xe0000) ? 0x08 : 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + } else { + if (dev->regs[0x26] & 0x40) { + shflags = MEM_READ_EXTANY; + shflags |= (dev->regs[0x22] & ((base >= 0xe0000) ? 0x08 : 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + } else + shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY; + } - mem_set_mem_state_both(base, 0x4000, shflags); + mem_set_mem_state_both(base, 0x4000, shflags); } for (i = 0; i < 4; i++) { - base = 0xc0000 + (i << 14); + base = 0xc0000 + (i << 14); - if ((dev->regs[0x26] & 0x10) && (dev->regs[0x26] & (1 << i))) { - shflags = MEM_READ_INTERNAL; - shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; - } else { - if (dev->regs[0x26] & 0x40) { - shflags = MEM_READ_EXTANY; - shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; - } else - shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY; - } + if ((dev->regs[0x26] & 0x10) && (dev->regs[0x26] & (1 << i))) { + shflags = MEM_READ_INTERNAL; + shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + } else { + if (dev->regs[0x26] & 0x40) { + shflags = MEM_READ_EXTANY; + shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + } else + shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY; + } - mem_set_mem_state_both(base, 0x4000, shflags); + mem_set_mem_state_both(base, 0x4000, shflags); } flushmmucache(); } - static void opti495_write(uint16_t addr, uint8_t val, void *priv) { opti495_t *dev = (opti495_t *) priv; switch (addr) { - case 0x22: - opti495_log("[%04X:%08X] [W] dev->idx = %02X\n", CS, cpu_state.pc, val); - dev->idx = val; - break; - case 0x24: - if ((dev->idx >= 0x20) && (dev->idx <= 0x2d)) { - dev->regs[dev->idx] = val; - opti495_log("[%04X:%08X] [W] dev->regs[%04X] = %02X\n", CS, cpu_state.pc, dev->idx, val); + case 0x22: + opti495_log("[%04X:%08X] [W] dev->idx = %02X\n", CS, cpu_state.pc, val); + dev->idx = val; + break; + case 0x24: + if ((dev->idx >= 0x20) && (dev->idx <= 0x2d)) { + dev->regs[dev->idx] = val; + opti495_log("[%04X:%08X] [W] dev->regs[%04X] = %02X\n", CS, cpu_state.pc, dev->idx, val); - switch(dev->idx) { - case 0x21: - cpu_cache_ext_enabled = !!(dev->regs[0x21] & 0x10); - cpu_update_waitstates(); - break; + switch (dev->idx) { + case 0x21: + cpu_cache_ext_enabled = !!(dev->regs[0x21] & 0x10); + cpu_update_waitstates(); + break; - case 0x22: - case 0x23: - case 0x26: - opti495_recalc(dev); - break; - } - } - break; + case 0x22: + case 0x23: + case 0x26: + opti495_recalc(dev); + break; + } + } + break; - case 0xe1: - case 0xe2: - dev->scratch[~addr & 0x01] = val; - break; + case 0xe1: + case 0xe2: + dev->scratch[~addr & 0x01] = val; + break; } } - static uint8_t opti495_read(uint16_t addr, void *priv) { - uint8_t ret = 0xff; + uint8_t ret = 0xff; opti495_t *dev = (opti495_t *) priv; switch (addr) { - case 0x22: - opti495_log("[%04X:%08X] [R] dev->idx = %02X\n", CS, cpu_state.pc, ret); - break; - case 0x24: - if ((dev->idx >= 0x20) && (dev->idx <= 0x2d)) { - ret = dev->regs[dev->idx]; - opti495_log("[%04X:%08X] [R] dev->regs[%04X] = %02X\n", CS, cpu_state.pc, dev->idx, ret); - } - break; - case 0xe1: - case 0xe2: - ret = dev->scratch[~addr & 0x01]; - break; + case 0x22: + opti495_log("[%04X:%08X] [R] dev->idx = %02X\n", CS, cpu_state.pc, ret); + break; + case 0x24: + if ((dev->idx >= 0x20) && (dev->idx <= 0x2d)) { + ret = dev->regs[dev->idx]; + opti495_log("[%04X:%08X] [R] dev->regs[%04X] = %02X\n", CS, cpu_state.pc, dev->idx, ret); + } + break; + case 0xe1: + case 0xe2: + ret = dev->scratch[~addr & 0x01]; + break; } return ret; } - static void opti495_close(void *priv) { @@ -192,7 +184,6 @@ opti495_close(void *priv) free(dev); } - static void * opti495_init(const device_t *info) { @@ -207,26 +198,26 @@ opti495_init(const device_t *info) dev->scratch[0] = dev->scratch[1] = 0xff; if (info->local == 1) { - /* 85C495 */ - dev->regs[0x20] = 0x02; - dev->regs[0x21] = 0x20; - dev->regs[0x22] = 0xe4; - dev->regs[0x25] = 0xf0; - dev->regs[0x26] = 0x80; - dev->regs[0x27] = 0xb1; - dev->regs[0x28] = 0x80; - dev->regs[0x29] = 0x10; + /* 85C495 */ + dev->regs[0x20] = 0x02; + dev->regs[0x21] = 0x20; + dev->regs[0x22] = 0xe4; + dev->regs[0x25] = 0xf0; + dev->regs[0x26] = 0x80; + dev->regs[0x27] = 0xb1; + dev->regs[0x28] = 0x80; + dev->regs[0x29] = 0x10; } else { - /* 85C493 */ - dev->regs[0x20] = 0x40; - dev->regs[0x22] = 0x84; - dev->regs[0x24] = 0x87; - dev->regs[0x25] = 0xf1; /* Note: 0xf0 is also valid default. */ - dev->regs[0x27] = 0x91; - dev->regs[0x28] = 0x80; - dev->regs[0x29] = 0x10; - dev->regs[0x2a] = 0x80; - dev->regs[0x2b] = 0x10; + /* 85C493 */ + dev->regs[0x20] = 0x40; + dev->regs[0x22] = 0x84; + dev->regs[0x24] = 0x87; + dev->regs[0x25] = 0xf1; /* Note: 0xf0 is also valid default. */ + dev->regs[0x27] = 0x91; + dev->regs[0x28] = 0x80; + dev->regs[0x29] = 0x10; + dev->regs[0x2a] = 0x80; + dev->regs[0x2b] = 0x10; } opti495_recalc(dev); @@ -237,29 +228,29 @@ opti495_init(const device_t *info) } const device_t opti493_device = { - .name = "OPTi 82C493", + .name = "OPTi 82C493", .internal_name = "opti493", - .flags = 0, - .local = 0, - .init = opti495_init, - .close = opti495_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = opti495_init, + .close = opti495_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t opti495_device = { - .name = "OPTi 82C495", + .name = "OPTi 82C495", .internal_name = "opti495", - .flags = 0, - .local = 1, - .init = opti495_init, - .close = opti495_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = opti495_init, + .close = opti495_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/opti499.c b/src/chipset/opti499.c index 08c06d58c..519b394a4 100644 --- a/src/chipset/opti499.c +++ b/src/chipset/opti499.c @@ -31,172 +31,167 @@ #include <86box/port_92.h> #include <86box/chipset.h> - typedef struct { - uint8_t idx, - regs[256], scratch[2]; + uint8_t idx, + regs[256], scratch[2]; } opti499_t; - #ifdef ENABLE_OPTI499_LOG int opti499_do_log = ENABLE_OPTI499_LOG; - static void opti499_log(const char *fmt, ...) { va_list ap; if (opti499_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define opti499_log(fmt, ...) +# define opti499_log(fmt, ...) #endif - static void opti499_recalc(opti499_t *dev) { uint32_t base; uint32_t i, shflags = 0; - shadowbios = 0; + shadowbios = 0; shadowbios_write = 0; if (dev->regs[0x22] & 0x80) { - shadowbios = 1; - shadowbios_write = 0; - shflags = MEM_READ_EXTANY | MEM_WRITE_INTERNAL; + shadowbios = 1; + shadowbios_write = 0; + shflags = MEM_READ_EXTANY | MEM_WRITE_INTERNAL; } else { - shadowbios = 0; - shadowbios_write = 1; - shflags = MEM_READ_INTERNAL | MEM_WRITE_DISABLED; + shadowbios = 0; + shadowbios_write = 1; + shflags = MEM_READ_INTERNAL | MEM_WRITE_DISABLED; } mem_set_mem_state_both(0xf0000, 0x10000, shflags); for (i = 0; i < 8; i++) { - base = 0xd0000 + (i << 14); + base = 0xd0000 + (i << 14); - if ((dev->regs[0x22] & ((base >= 0xe0000) ? 0x20 : 0x40)) && - (dev->regs[0x23] & (1 << i))) { - shflags = MEM_READ_INTERNAL; - shflags |= (dev->regs[0x22] & ((base >= 0xe0000) ? 0x08 : 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; - } else { - if (dev->regs[0x2d] && (1 << ((i >> 1) + 2))) - shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY; - else - shflags = MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL; - } + if ((dev->regs[0x22] & ((base >= 0xe0000) ? 0x20 : 0x40)) && (dev->regs[0x23] & (1 << i))) { + shflags = MEM_READ_INTERNAL; + shflags |= (dev->regs[0x22] & ((base >= 0xe0000) ? 0x08 : 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + } else { + if (dev->regs[0x2d] && (1 << ((i >> 1) + 2))) + shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY; + else + shflags = MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL; + } - mem_set_mem_state_both(base, 0x4000, shflags); + mem_set_mem_state_both(base, 0x4000, shflags); } for (i = 0; i < 4; i++) { - base = 0xc0000 + (i << 14); + base = 0xc0000 + (i << 14); - if ((dev->regs[0x26] & 0x10) && (dev->regs[0x26] & (1 << i))) { - shflags = MEM_READ_INTERNAL; - shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; - } else { - if (dev->regs[0x26] & 0x40) { - if (dev->regs[0x2d] && (1 << (i >> 1))) - shflags = MEM_READ_EXTANY; - else - shflags = MEM_READ_EXTERNAL; - shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; - } else { - if (dev->regs[0x2d] && (1 << (i >> 1))) - shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY; - else - shflags = MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL; - } - } + if ((dev->regs[0x26] & 0x10) && (dev->regs[0x26] & (1 << i))) { + shflags = MEM_READ_INTERNAL; + shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + } else { + if (dev->regs[0x26] & 0x40) { + if (dev->regs[0x2d] && (1 << (i >> 1))) + shflags = MEM_READ_EXTANY; + else + shflags = MEM_READ_EXTERNAL; + shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + } else { + if (dev->regs[0x2d] && (1 << (i >> 1))) + shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY; + else + shflags = MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL; + } + } - mem_set_mem_state_both(base, 0x4000, shflags); + mem_set_mem_state_both(base, 0x4000, shflags); } flushmmucache_nopc(); } - static void opti499_write(uint16_t addr, uint8_t val, void *priv) { opti499_t *dev = (opti499_t *) priv; switch (addr) { - case 0x22: - opti499_log("[%04X:%08X] [W] dev->idx = %02X\n", CS, cpu_state.pc, val); - dev->idx = val; - break; - case 0x24: - if ((dev->idx >= 0x20) && (dev->idx <= 0x2d)) { - if (dev->idx == 0x20) - dev->regs[dev->idx] = (dev->regs[dev->idx] & 0xc0) | (val & 0x3f); - else - dev->regs[dev->idx] = val; - opti499_log("[%04X:%08X] [W] dev->regs[%04X] = %02X\n", CS, cpu_state.pc, dev->idx, val); + case 0x22: + opti499_log("[%04X:%08X] [W] dev->idx = %02X\n", CS, cpu_state.pc, val); + dev->idx = val; + break; + case 0x24: + if ((dev->idx >= 0x20) && (dev->idx <= 0x2d)) { + if (dev->idx == 0x20) + dev->regs[dev->idx] = (dev->regs[dev->idx] & 0xc0) | (val & 0x3f); + else + dev->regs[dev->idx] = val; + opti499_log("[%04X:%08X] [W] dev->regs[%04X] = %02X\n", CS, cpu_state.pc, dev->idx, val); - switch(dev->idx) { - case 0x20: - reset_on_hlt = !(val & 0x02); - break; + switch (dev->idx) { + case 0x20: + reset_on_hlt = !(val & 0x02); + break; - case 0x21: - cpu_cache_ext_enabled = !!(dev->regs[0x21] & 0x10); - cpu_update_waitstates(); - break; + case 0x21: + cpu_cache_ext_enabled = !!(dev->regs[0x21] & 0x10); + cpu_update_waitstates(); + break; - case 0x22: case 0x23: - case 0x26: case 0x2d: - opti499_recalc(dev); - break; - } - } - break; + case 0x22: + case 0x23: + case 0x26: + case 0x2d: + opti499_recalc(dev); + break; + } + } + break; - case 0xe1: case 0xe2: - dev->scratch[~addr & 0x01] = val; - break; + case 0xe1: + case 0xe2: + dev->scratch[~addr & 0x01] = val; + break; } } - static uint8_t opti499_read(uint16_t addr, void *priv) { - uint8_t ret = 0xff; + uint8_t ret = 0xff; opti499_t *dev = (opti499_t *) priv; switch (addr) { - case 0x22: - opti499_log("[%04X:%08X] [R] dev->idx = %02X\n", CS, cpu_state.pc, ret); - break; - case 0x24: - if ((dev->idx >= 0x20) && (dev->idx <= 0x2d)) { - if (dev->idx == 0x2d) - ret = dev->regs[dev->idx] & 0xbf; - else - ret = dev->regs[dev->idx]; - opti499_log("[%04X:%08X] [R] dev->regs[%04X] = %02X\n", CS, cpu_state.pc, dev->idx, ret); - } - break; - case 0xe1: - case 0xe2: - ret = dev->scratch[~addr & 0x01]; - break; + case 0x22: + opti499_log("[%04X:%08X] [R] dev->idx = %02X\n", CS, cpu_state.pc, ret); + break; + case 0x24: + if ((dev->idx >= 0x20) && (dev->idx <= 0x2d)) { + if (dev->idx == 0x2d) + ret = dev->regs[dev->idx] & 0xbf; + else + ret = dev->regs[dev->idx]; + opti499_log("[%04X:%08X] [R] dev->regs[%04X] = %02X\n", CS, cpu_state.pc, dev->idx, ret); + } + break; + case 0xe1: + case 0xe2: + ret = dev->scratch[~addr & 0x01]; + break; } return ret; } - static void opti499_reset(void *priv) { @@ -213,7 +208,7 @@ opti499_reset(void *priv) dev->regs[0x27] = 0xd1; dev->regs[0x28] = dev->regs[0x2a] = 0x80; dev->regs[0x29] = dev->regs[0x2b] = 0x10; - dev->regs[0x2d] = 0x40; + dev->regs[0x2d] = 0x40; reset_on_hlt = 1; @@ -225,7 +220,6 @@ opti499_reset(void *priv) free(dev); } - static void opti499_close(void *priv) { @@ -234,7 +228,6 @@ opti499_close(void *priv) free(dev); } - static void * opti499_init(const device_t *info) { @@ -254,15 +247,15 @@ opti499_init(const device_t *info) } const device_t opti499_device = { - .name = "OPTi 82C499", + .name = "OPTi 82C499", .internal_name = "opti499", - .flags = 0, - .local = 1, - .init = opti499_init, - .close = opti499_close, - .reset = opti499_reset, + .flags = 0, + .local = 1, + .init = opti499_init, + .close = opti499_close, + .reset = opti499_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/opti5x7.c b/src/chipset/opti5x7.c index f0459a97f..d85ed4f54 100644 --- a/src/chipset/opti5x7.c +++ b/src/chipset/opti5x7.c @@ -45,43 +45,39 @@ opti5x7_log(const char *fmt, ...) { va_list ap; - if (opti5x7_do_log) - { + if (opti5x7_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define opti5x7_log(fmt, ...) +# define opti5x7_log(fmt, ...) #endif static void opti5x7_shadow_map(int cur_reg, opti5x7_t *dev) { -/* -Register 4h: Cxxxx Segment -Register 5h: Dxxxx Segment + /* + Register 4h: Cxxxx Segment + Register 5h: Dxxxx Segment -Bits 7-6: xC000-xFFFF -Bits 5-4: x8000-xBFFF -Bits 3-2: x4000-x7FFF -Bits 0-1: x0000-x3FFF + Bits 7-6: xC000-xFFFF + Bits 5-4: x8000-xBFFF + Bits 3-2: x4000-x7FFF + Bits 0-1: x0000-x3FFF - x-y - 0 0 Read/Write AT bus - 1 0 Read from AT - Write to DRAM - 1 1 Read from DRAM - Write to DRAM - 0 1 Read from DRAM (write protected) -*/ - if (cur_reg == 0x06) - { + x-y + 0 0 Read/Write AT bus + 1 0 Read from AT - Write to DRAM + 1 1 Read from DRAM - Write to DRAM + 0 1 Read from DRAM (write protected) + */ + if (cur_reg == 0x06) { mem_set_mem_state_both(0xe0000, 0x10000, ((dev->regs[6] & 1) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[6] & 2) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY)); mem_set_mem_state_both(0xf0000, 0x10000, ((dev->regs[6] & 4) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[6] & 8) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY)); - } - else - { + } else { for (int i = 0; i < 4; i++) mem_set_mem_state_both(0xc0000 + ((cur_reg & 1) << 16) + (i << 14), 0x4000, ((dev->regs[cur_reg] & (1 << (2 * i))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[cur_reg] & (2 << (2 * i))) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY)); } @@ -92,63 +88,61 @@ Bits 0-1: x0000-x3FFF static void opti5x7_write(uint16_t addr, uint8_t val, void *priv) { - opti5x7_t *dev = (opti5x7_t *)priv; + opti5x7_t *dev = (opti5x7_t *) priv; - switch (addr) - { - case 0x22: - dev->idx = val; - break; - case 0x24: - switch (dev->idx) - { - case 0x00: /* DRAM Configuration Register #1 */ - dev->regs[dev->idx] = val & 0x7f; + switch (addr) { + case 0x22: + dev->idx = val; break; - case 0x01: /* DRAM Control Register #1 */ - dev->regs[dev->idx] = val; + case 0x24: + switch (dev->idx) { + case 0x00: /* DRAM Configuration Register #1 */ + dev->regs[dev->idx] = val & 0x7f; + break; + case 0x01: /* DRAM Control Register #1 */ + dev->regs[dev->idx] = val; + break; + case 0x02: /* Cache Control Register #1 */ + dev->regs[dev->idx] = val; + cpu_cache_ext_enabled = !!(dev->regs[0x02] & 0x0c); + cpu_update_waitstates(); + break; + case 0x03: /* Cache Control Register #2 */ + dev->regs[dev->idx] = val; + break; + case 0x04: /* Shadow RAM Control Register #1 */ + case 0x05: /* Shadow RAM Control Register #2 */ + case 0x06: /* Shadow RAM Control Register #3 */ + dev->regs[dev->idx] = val; + opti5x7_shadow_map(dev->idx, dev); + break; + case 0x07: /* Tag Test Register */ + case 0x08: /* CPU Cache Control Register #1 */ + case 0x09: /* System Memory Function Register #1 */ + case 0x0a: /* System Memory Address Decode Register #1 */ + case 0x0b: /* System Memory Address Decode Register #2 */ + dev->regs[dev->idx] = val; + break; + case 0x0c: /* Extended DMA Register */ + dev->regs[dev->idx] = val & 0xcf; + break; + case 0x0d: /* ROMCS# Register */ + case 0x0e: /* Local Master Preemption Register */ + case 0x0f: /* Deturbo Control Register #1 */ + case 0x10: /* Cache Write-Hit Control Register */ + case 0x11: /* Master Cycle Control Register */ + dev->regs[dev->idx] = val; + break; + } + opti5x7_log("OPTi 5x7: dev->regs[%02x] = %02x\n", dev->idx, dev->regs[dev->idx]); break; - case 0x02: /* Cache Control Register #1 */ - dev->regs[dev->idx] = val; - cpu_cache_ext_enabled = !!(dev->regs[0x02] & 0x0c); - cpu_update_waitstates(); - break; - case 0x03: /* Cache Control Register #2 */ - dev->regs[dev->idx] = val; - break; - case 0x04: /* Shadow RAM Control Register #1 */ - case 0x05: /* Shadow RAM Control Register #2 */ - case 0x06: /* Shadow RAM Control Register #3 */ - dev->regs[dev->idx] = val; - opti5x7_shadow_map(dev->idx, dev); - break; - case 0x07: /* Tag Test Register */ - case 0x08: /* CPU Cache Control Register #1 */ - case 0x09: /* System Memory Function Register #1 */ - case 0x0a: /* System Memory Address Decode Register #1 */ - case 0x0b: /* System Memory Address Decode Register #2 */ - dev->regs[dev->idx] = val; - break; - case 0x0c: /* Extended DMA Register */ - dev->regs[dev->idx] = val & 0xcf; - break; - case 0x0d: /* ROMCS# Register */ - case 0x0e: /* Local Master Preemption Register */ - case 0x0f: /* Deturbo Control Register #1 */ - case 0x10: /* Cache Write-Hit Control Register */ - case 0x11: /* Master Cycle Control Register */ - dev->regs[dev->idx] = val; - break; - } - opti5x7_log("OPTi 5x7: dev->regs[%02x] = %02x\n", dev->idx, dev->regs[dev->idx]); - break; } } static uint8_t opti5x7_read(uint16_t addr, void *priv) { - opti5x7_t *dev = (opti5x7_t *)priv; + opti5x7_t *dev = (opti5x7_t *) priv; return (addr == 0x24) ? dev->regs[dev->idx] : 0xff; } @@ -156,7 +150,7 @@ opti5x7_read(uint16_t addr, void *priv) static void opti5x7_close(void *priv) { - opti5x7_t *dev = (opti5x7_t *)priv; + opti5x7_t *dev = (opti5x7_t *) priv; free(dev); } @@ -164,7 +158,7 @@ opti5x7_close(void *priv) static void * opti5x7_init(const device_t *info) { - opti5x7_t *dev = (opti5x7_t *)malloc(sizeof(opti5x7_t)); + opti5x7_t *dev = (opti5x7_t *) malloc(sizeof(opti5x7_t)); memset(dev, 0, sizeof(opti5x7_t)); io_sethandler(0x0022, 0x0001, opti5x7_read, NULL, NULL, opti5x7_write, NULL, NULL, dev); @@ -176,15 +170,15 @@ opti5x7_init(const device_t *info) } const device_t opti5x7_device = { - .name = "OPTi 82C5x6/82C5x7", + .name = "OPTi 82C5x6/82C5x7", .internal_name = "opti5x7", - .flags = 0, - .local = 0, - .init = opti5x7_init, - .close = opti5x7_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = opti5x7_init, + .close = opti5x7_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/opti822.c b/src/chipset/opti822.c index 0235e3ee9..cdcd2d2f8 100644 --- a/src/chipset/opti822.c +++ b/src/chipset/opti822.c @@ -33,9 +33,9 @@ #include <86box/chipset.h> /* Shadow RAM */ -#define SYSTEM_READ ((dev->pci_conf[0x44] & 2) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) +#define SYSTEM_READ ((dev->pci_conf[0x44] & 2) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) #define SYSTEM_WRITE ((dev->pci_conf[0x44] & 1) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY) -#define SHADOW_READ ((dev->pci_conf[cur_reg] & (1 << (4 + i))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) +#define SHADOW_READ ((dev->pci_conf[cur_reg] & (1 << (4 + i))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) #define SHADOW_WRITE ((dev->pci_conf[cur_reg] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY) #ifdef ENABLE_OPTI822_LOG @@ -45,25 +45,24 @@ opti822_log(const char *fmt, ...) { va_list ap; - if (opti822_do_log) - { + if (opti822_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define opti822_log(fmt, ...) +# define opti822_log(fmt, ...) #endif -typedef struct opti822_t -{ +typedef struct opti822_t { uint8_t pci_conf[256]; } opti822_t; -int opti822_irq_routing[7] = {5, 9, 0x0a, 0x0b, 0x0c, 0x0e, 0x0f}; +int opti822_irq_routing[7] = { 5, 9, 0x0a, 0x0b, 0x0c, 0x0e, 0x0f }; -void opti822_shadow(int cur_reg, opti822_t *dev) +void +opti822_shadow(int cur_reg, opti822_t *dev) { if (cur_reg == 0x44) mem_set_mem_state_both(0xf0000, 0x10000, SYSTEM_READ | SYSTEM_WRITE); @@ -78,183 +77,179 @@ static void opti822_write(int func, int addr, uint8_t val, void *priv) { - opti822_t *dev = (opti822_t *)priv; + opti822_t *dev = (opti822_t *) priv; - switch (func) - { - case 0x04: /* Command Register */ - dev->pci_conf[addr] = val & 0x40; - break; + switch (func) { + case 0x04: /* Command Register */ + dev->pci_conf[addr] = val & 0x40; + break; - case 0x05: /* Command Register */ - dev->pci_conf[addr] = val & 1; - break; + case 0x05: /* Command Register */ + dev->pci_conf[addr] = val & 1; + break; - case 0x06: /* Status Register */ - dev->pci_conf[addr] |= val & 0xc0; - break; + case 0x06: /* Status Register */ + dev->pci_conf[addr] |= val & 0xc0; + break; - case 0x07: /* Status Register */ - dev->pci_conf[addr] = val & 0xa9; - break; + case 0x07: /* Status Register */ + dev->pci_conf[addr] = val & 0xa9; + break; - case 0x40: - dev->pci_conf[addr] = val & 0xc0; - break; + case 0x40: + dev->pci_conf[addr] = val & 0xc0; + break; - case 0x41: - dev->pci_conf[addr] = val & 0xcf; - break; + case 0x41: + dev->pci_conf[addr] = val & 0xcf; + break; - case 0x42: - dev->pci_conf[addr] = val & 0xf8; - break; + case 0x42: + dev->pci_conf[addr] = val & 0xf8; + break; - case 0x43: - dev->pci_conf[addr] = val; - break; + case 0x43: + dev->pci_conf[addr] = val; + break; - case 0x44: /* Shadow RAM */ - case 0x45: - case 0x46: - case 0x47: - dev->pci_conf[addr] = (addr == 0x44) ? (val & 0xcb) : val; - opti822_shadow(addr, dev); - break; + case 0x44: /* Shadow RAM */ + case 0x45: + case 0x46: + case 0x47: + dev->pci_conf[addr] = (addr == 0x44) ? (val & 0xcb) : val; + opti822_shadow(addr, dev); + break; - case 0x48: - case 0x49: - case 0x4a: - case 0x4b: - case 0x4c: - case 0x4d: - case 0x4e: - case 0x4f: - case 0x50: - case 0x51: - case 0x52: - case 0x53: - case 0x54: - case 0x55: - case 0x56: - case 0x57: - dev->pci_conf[addr] = val; - break; + case 0x48: + case 0x49: + case 0x4a: + case 0x4b: + case 0x4c: + case 0x4d: + case 0x4e: + case 0x4f: + case 0x50: + case 0x51: + case 0x52: + case 0x53: + case 0x54: + case 0x55: + case 0x56: + case 0x57: + dev->pci_conf[addr] = val; + break; - case 0x58: - dev->pci_conf[addr] = val & 0xfc; - break; + case 0x58: + dev->pci_conf[addr] = val & 0xfc; + break; - case 0x59: - case 0x5a: - case 0x5b: - case 0x5c: - case 0x5d: - case 0x5e: - case 0x5f: - dev->pci_conf[addr] = val; - break; + case 0x59: + case 0x5a: + case 0x5b: + case 0x5c: + case 0x5d: + case 0x5e: + case 0x5f: + dev->pci_conf[addr] = val; + break; - case 0x60: - dev->pci_conf[addr] = val & 0xfc; - break; + case 0x60: + dev->pci_conf[addr] = val & 0xfc; + break; - case 0x61: - case 0x62: - case 0x63: - case 0x64: - case 0x65: - case 0x66: - case 0x67: - dev->pci_conf[addr] = val; - break; + case 0x61: + case 0x62: + case 0x63: + case 0x64: + case 0x65: + case 0x66: + case 0x67: + dev->pci_conf[addr] = val; + break; - case 0x68: - dev->pci_conf[addr] = val & 0xfc; - break; + case 0x68: + dev->pci_conf[addr] = val & 0xfc; + break; - case 0x69: - case 0x6a: - case 0x6b: - case 0x6c: - case 0x6d: - case 0x6e: - case 0x6f: - dev->pci_conf[addr] = val; - break; + case 0x69: + case 0x6a: + case 0x6b: + case 0x6c: + case 0x6d: + case 0x6e: + case 0x6f: + dev->pci_conf[addr] = val; + break; - case 0x70: - dev->pci_conf[addr] = val & 0xfc; - break; + case 0x70: + dev->pci_conf[addr] = val & 0xfc; + break; - case 0x71: - case 0x72: - case 0x73: - dev->pci_conf[addr] = val; - break; + case 0x71: + case 0x72: + case 0x73: + dev->pci_conf[addr] = val; + break; - case 0x74: - dev->pci_conf[addr] = val & 0xfc; - break; + case 0x74: + dev->pci_conf[addr] = val & 0xfc; + break; - case 0x75: - case 0x76: - dev->pci_conf[addr] = val; - break; + case 0x75: + case 0x76: + dev->pci_conf[addr] = val; + break; - case 0x77: - dev->pci_conf[addr] = val & 0xe7; - break; + case 0x77: + dev->pci_conf[addr] = val & 0xe7; + break; - case 0x78: - dev->pci_conf[addr] = val; - break; + case 0x78: + dev->pci_conf[addr] = val; + break; - case 0x79: - dev->pci_conf[addr] = val & 0xfc; - break; + case 0x79: + dev->pci_conf[addr] = val & 0xfc; + break; - case 0x7a: - case 0x7b: - case 0x7c: - case 0x7d: - case 0x7e: - dev->pci_conf[addr] = val; - break; + case 0x7a: + case 0x7b: + case 0x7c: + case 0x7d: + case 0x7e: + dev->pci_conf[addr] = val; + break; - case 0x7f: - dev->pci_conf[addr] = val & 3; - break; + case 0x7f: + dev->pci_conf[addr] = val & 3; + break; - case 0x80: - case 0x81: - case 0x82: - case 0x84: - case 0x85: - case 0x86: - dev->pci_conf[addr] = val; - break; + case 0x80: + case 0x81: + case 0x82: + case 0x84: + case 0x85: + case 0x86: + dev->pci_conf[addr] = val; + break; - case 0x88: /* PCI IRQ Routing */ - case 0x89: /* Very hacky implementation. Needs surely a rewrite after */ - case 0x8a: /* a PCI rework happens. */ - case 0x8b: - case 0x8c: - case 0x8d: - case 0x8e: - case 0x8f: - dev->pci_conf[addr] = val; - if (addr % 2) - { - pci_set_irq_routing(PCI_INTB, ((val & 0x0f) != 0) ? opti822_irq_routing[(val & 7) - 1] : PCI_IRQ_DISABLED); - pci_set_irq_routing(PCI_INTA, (((val >> 4) & 0x0f) != 0) ? opti822_irq_routing[((val >> 4) & 7) - 1] : PCI_IRQ_DISABLED); - } - else - { - pci_set_irq_routing(PCI_INTD, ((val & 0x0f) != 0) ? opti822_irq_routing[(val & 7) - 1] : PCI_IRQ_DISABLED); - pci_set_irq_routing(PCI_INTC, (((val >> 4) & 0x0f) != 0) ? opti822_irq_routing[((val >> 4) & 7) - 1] : PCI_IRQ_DISABLED); - } - break; + case 0x88: /* PCI IRQ Routing */ + case 0x89: /* Very hacky implementation. Needs surely a rewrite after */ + case 0x8a: /* a PCI rework happens. */ + case 0x8b: + case 0x8c: + case 0x8d: + case 0x8e: + case 0x8f: + dev->pci_conf[addr] = val; + if (addr % 2) { + pci_set_irq_routing(PCI_INTB, ((val & 0x0f) != 0) ? opti822_irq_routing[(val & 7) - 1] : PCI_IRQ_DISABLED); + pci_set_irq_routing(PCI_INTA, (((val >> 4) & 0x0f) != 0) ? opti822_irq_routing[((val >> 4) & 7) - 1] : PCI_IRQ_DISABLED); + } else { + pci_set_irq_routing(PCI_INTD, ((val & 0x0f) != 0) ? opti822_irq_routing[(val & 7) - 1] : PCI_IRQ_DISABLED); + pci_set_irq_routing(PCI_INTC, (((val >> 4) & 0x0f) != 0) ? opti822_irq_routing[((val >> 4) & 7) - 1] : PCI_IRQ_DISABLED); + } + break; } opti822_log("OPTI822: dev->pci_conf[%02x] = %02x\n", addr, dev->pci_conf[addr]); @@ -263,14 +258,14 @@ opti822_write(int func, int addr, uint8_t val, void *priv) static uint8_t opti822_read(int func, int addr, void *priv) { - opti822_t *dev = (opti822_t *)priv; + opti822_t *dev = (opti822_t *) priv; return dev->pci_conf[addr]; } static void opti822_reset(void *priv) { - opti822_t *dev = (opti822_t *)priv; + opti822_t *dev = (opti822_t *) priv; dev->pci_conf[0x00] = 0x45; dev->pci_conf[0x01] = 0x10; @@ -291,7 +286,7 @@ opti822_reset(void *priv) static void opti822_close(void *priv) { - opti822_t *dev = (opti822_t *)priv; + opti822_t *dev = (opti822_t *) priv; free(dev); } @@ -299,7 +294,7 @@ opti822_close(void *priv) static void * opti822_init(const device_t *info) { - opti822_t *dev = (opti822_t *)malloc(sizeof(opti822_t)); + opti822_t *dev = (opti822_t *) malloc(sizeof(opti822_t)); memset(dev, 0, sizeof(opti822_t)); pci_add_card(PCI_ADD_NORTHBRIDGE, opti822_read, opti822_write, dev); @@ -310,15 +305,15 @@ opti822_init(const device_t *info) } const device_t opti822_device = { - .name = "OPTi 82C822 PCIB", + .name = "OPTi 82C822 PCIB", .internal_name = "opti822", - .flags = DEVICE_PCI, - .local = 0, - .init = opti822_init, - .close = opti822_close, - .reset = opti822_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = opti822_init, + .close = opti822_close, + .reset = opti822_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/opti895.c b/src/chipset/opti895.c index 9eb360e02..b2e9ae0e0 100644 --- a/src/chipset/opti895.c +++ b/src/chipset/opti895.c @@ -32,195 +32,186 @@ #include <86box/port_92.h> #include <86box/chipset.h> - typedef struct { - uint8_t idx, forced_green, - regs[256], - scratch[2]; + uint8_t idx, forced_green, + regs[256], + scratch[2]; - smram_t *smram; + smram_t *smram; } opti895_t; - #ifdef ENABLE_OPTI895_LOG int opti895_do_log = ENABLE_OPTI895_LOG; - static void opti895_log(const char *fmt, ...) { va_list ap; if (opti895_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define opti895_log(fmt, ...) +# define opti895_log(fmt, ...) #endif - static void opti895_recalc(opti895_t *dev) { uint32_t base; uint32_t i, shflags = 0; - shadowbios = 0; + shadowbios = 0; shadowbios_write = 0; if (dev->regs[0x22] & 0x80) { - shadowbios = 1; - shadowbios_write = 0; - shflags = MEM_READ_EXTANY | MEM_WRITE_INTERNAL; + shadowbios = 1; + shadowbios_write = 0; + shflags = MEM_READ_EXTANY | MEM_WRITE_INTERNAL; } else { - shadowbios = 0; - shadowbios_write = 1; - shflags = MEM_READ_INTERNAL | MEM_WRITE_DISABLED; + shadowbios = 0; + shadowbios_write = 1; + shflags = MEM_READ_INTERNAL | MEM_WRITE_DISABLED; } mem_set_mem_state_both(0xf0000, 0x10000, shflags); for (i = 0; i < 8; i++) { - base = 0xd0000 + (i << 14); + base = 0xd0000 + (i << 14); - if (dev->regs[0x23] & (1 << i)) { - shflags = MEM_READ_INTERNAL; - shflags |= (dev->regs[0x22] & ((base >= 0xe0000) ? 0x08 : 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; - } else { - shflags = (dev->regs[0x2d] & (1 << ((i >> 1) + 2))) ? MEM_READ_EXTANY : MEM_READ_EXTERNAL; - if (dev->regs[0x26] & 0x40) - shflags |= (dev->regs[0x22] & ((base >= 0xe0000) ? 0x08 : 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; - else { - if (dev->regs[0x26] & 0x80) - shflags |= (dev->regs[0x2d] & (1 << ((i >> 1) + 2))) ? MEM_WRITE_EXTANY : MEM_WRITE_EXTERNAL; - else - shflags |= MEM_WRITE_EXTERNAL; - } - } + if (dev->regs[0x23] & (1 << i)) { + shflags = MEM_READ_INTERNAL; + shflags |= (dev->regs[0x22] & ((base >= 0xe0000) ? 0x08 : 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + } else { + shflags = (dev->regs[0x2d] & (1 << ((i >> 1) + 2))) ? MEM_READ_EXTANY : MEM_READ_EXTERNAL; + if (dev->regs[0x26] & 0x40) + shflags |= (dev->regs[0x22] & ((base >= 0xe0000) ? 0x08 : 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + else { + if (dev->regs[0x26] & 0x80) + shflags |= (dev->regs[0x2d] & (1 << ((i >> 1) + 2))) ? MEM_WRITE_EXTANY : MEM_WRITE_EXTERNAL; + else + shflags |= MEM_WRITE_EXTERNAL; + } + } - mem_set_mem_state_both(base, 0x4000, shflags); + mem_set_mem_state_both(base, 0x4000, shflags); } for (i = 0; i < 4; i++) { - base = 0xc0000 + (i << 14); + base = 0xc0000 + (i << 14); - if (dev->regs[0x26] & (1 << i)) { - shflags = MEM_READ_INTERNAL; - shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; - } else { - shflags = (dev->regs[0x2d] & (1 << (i >> 1))) ? MEM_READ_EXTANY : MEM_READ_EXTERNAL; - if (dev->regs[0x26] & 0x40) - shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; - else { - if (dev->regs[0x26] & 0x80) - shflags |= (dev->regs[0x2d] & (1 << (i >> 1))) ? MEM_WRITE_EXTANY : MEM_WRITE_EXTERNAL; - else - shflags |= MEM_WRITE_EXTERNAL; - } - } + if (dev->regs[0x26] & (1 << i)) { + shflags = MEM_READ_INTERNAL; + shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + } else { + shflags = (dev->regs[0x2d] & (1 << (i >> 1))) ? MEM_READ_EXTANY : MEM_READ_EXTERNAL; + if (dev->regs[0x26] & 0x40) + shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + else { + if (dev->regs[0x26] & 0x80) + shflags |= (dev->regs[0x2d] & (1 << (i >> 1))) ? MEM_WRITE_EXTANY : MEM_WRITE_EXTERNAL; + else + shflags |= MEM_WRITE_EXTERNAL; + } + } - mem_set_mem_state_both(base, 0x4000, shflags); + mem_set_mem_state_both(base, 0x4000, shflags); } flushmmucache_nopc(); } - static void opti895_write(uint16_t addr, uint8_t val, void *priv) { opti895_t *dev = (opti895_t *) priv; switch (addr) { - case 0x22: - dev->idx = val; - break; - case 0x23: - if (dev->idx == 0x01) { - dev->regs[dev->idx] = val; - opti895_log("dev->regs[%04x] = %08x\n", dev->idx, val); - } - break; - case 0x24: - if (((dev->idx >= 0x20) && (dev->idx <= 0x2f)) || - ((dev->idx >= 0xe0) && (dev->idx <= 0xef))) { - dev->regs[dev->idx] = val; - opti895_log("dev->regs[%04x] = %08x\n", dev->idx, val); + case 0x22: + dev->idx = val; + break; + case 0x23: + if (dev->idx == 0x01) { + dev->regs[dev->idx] = val; + opti895_log("dev->regs[%04x] = %08x\n", dev->idx, val); + } + break; + case 0x24: + if (((dev->idx >= 0x20) && (dev->idx <= 0x2f)) || ((dev->idx >= 0xe0) && (dev->idx <= 0xef))) { + dev->regs[dev->idx] = val; + opti895_log("dev->regs[%04x] = %08x\n", dev->idx, val); - switch(dev->idx) { - case 0x21: - cpu_cache_ext_enabled = !!(dev->regs[0x21] & 0x10); - cpu_update_waitstates(); - break; + switch (dev->idx) { + case 0x21: + cpu_cache_ext_enabled = !!(dev->regs[0x21] & 0x10); + cpu_update_waitstates(); + break; - case 0x22: - case 0x23: - case 0x26: - case 0x2d: - opti895_recalc(dev); - break; + case 0x22: + case 0x23: + case 0x26: + case 0x2d: + opti895_recalc(dev); + break; - case 0x24: - smram_state_change(dev->smram, 0, !!(val & 0x80)); - break; + case 0x24: + smram_state_change(dev->smram, 0, !!(val & 0x80)); + break; - case 0xe0: - if (!(val & 0x01)) - dev->forced_green = 0; - break; + case 0xe0: + if (!(val & 0x01)) + dev->forced_green = 0; + break; - case 0xe1: - if ((val & 0x08) && (dev->regs[0xe0] & 0x01)) { - smi_raise(); - dev->forced_green = 1; - break; - } - break; - } - } - break; + case 0xe1: + if ((val & 0x08) && (dev->regs[0xe0] & 0x01)) { + smi_raise(); + dev->forced_green = 1; + break; + } + break; + } + } + break; - case 0xe1: - case 0xe2: - dev->scratch[addr - 0xe1] = val; - break; + case 0xe1: + case 0xe2: + dev->scratch[addr - 0xe1] = val; + break; } } - static uint8_t opti895_read(uint16_t addr, void *priv) { - uint8_t ret = 0xff; + uint8_t ret = 0xff; opti895_t *dev = (opti895_t *) priv; switch (addr) { - case 0x23: - if (dev->idx == 0x01) - ret = dev->regs[dev->idx]; - break; - case 0x24: - if (((dev->idx >= 0x20) && (dev->idx <= 0x2f)) || - ((dev->idx >= 0xe0) && (dev->idx <= 0xef))) { - ret = dev->regs[dev->idx]; - if (dev->idx == 0xe0) - ret = (ret & 0xf6) | (in_smm ? 0x00 : 0x08) | !!dev->forced_green; - } - break; - case 0xe1: - case 0xe2: - ret = dev->scratch[addr - 0xe1]; - break; + case 0x23: + if (dev->idx == 0x01) + ret = dev->regs[dev->idx]; + break; + case 0x24: + if (((dev->idx >= 0x20) && (dev->idx <= 0x2f)) || ((dev->idx >= 0xe0) && (dev->idx <= 0xef))) { + ret = dev->regs[dev->idx]; + if (dev->idx == 0xe0) + ret = (ret & 0xf6) | (in_smm ? 0x00 : 0x08) | !!dev->forced_green; + } + break; + case 0xe1: + case 0xe2: + ret = dev->scratch[addr - 0xe1]; + break; } return ret; } - static void opti895_close(void *priv) { @@ -231,7 +222,6 @@ opti895_close(void *priv) free(dev); } - static void * opti895_init(const device_t *info) { @@ -273,29 +263,29 @@ opti895_init(const device_t *info) } const device_t opti802g_device = { - .name = "OPTi 82C802G", + .name = "OPTi 82C802G", .internal_name = "opti802g", - .flags = 0, - .local = 0, - .init = opti895_init, - .close = opti895_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = opti895_init, + .close = opti895_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t opti895_device = { - .name = "OPTi 82C895", + .name = "OPTi 82C895", .internal_name = "opti895", - .flags = 0, - .local = 0, - .init = opti895_init, - .close = opti895_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = opti895_init, + .close = opti895_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/scamp.c b/src/chipset/scamp.c index 621f7d9c5..5a30c3730 100644 --- a/src/chipset/scamp.c +++ b/src/chipset/scamp.c @@ -34,32 +34,29 @@ #include <86box/port_92.h> #include <86box/chipset.h> +#define CFG_ID 0x00 +#define CFG_SLTPTR 0x02 +#define CFG_RAMMAP 0x03 +#define CFG_EMSEN1 0x0b +#define CFG_EMSEN2 0x0c +#define CFG_ABAXS 0x0e +#define CFG_CAXS 0x0f +#define CFG_DAXS 0x10 +#define CFG_FEAXS 0x11 -#define CFG_ID 0x00 -#define CFG_SLTPTR 0x02 -#define CFG_RAMMAP 0x03 -#define CFG_EMSEN1 0x0b -#define CFG_EMSEN2 0x0c -#define CFG_ABAXS 0x0e -#define CFG_CAXS 0x0f -#define CFG_DAXS 0x10 -#define CFG_FEAXS 0x11 - -#define ID_VL82C311 0xd6 +#define ID_VL82C311 0xd6 #define RAMMAP_REMP386 (1 << 4) #define EMSEN1_EMSMAP (1 << 4) #define EMSEN1_EMSENAB (1 << 7) -#define NR_ELEMS(x) (sizeof(x) / sizeof(x[0])) - +#define NR_ELEMS(x) (sizeof(x) / sizeof(x[0])) /*Commodore SL386SX requires proper memory slot decoding to detect memory size. Therefore we emulate the SCAMP memory address decoding, and therefore are limited to the DRAM combinations supported by the actual chip*/ -enum -{ +enum { BANK_NONE, BANK_256K, BANK_256K_INTERLEAVED, @@ -69,589 +66,572 @@ enum BANK_4M_INTERLEAVED }; - typedef struct { - void * parent; - int bank; + void *parent; + int bank; } ram_struct_t; typedef struct { - void * parent; - int segment; + void *parent; + int segment; } ems_struct_t; typedef struct { - int cfg_index; - uint8_t cfg_regs[256]; - int cfg_enable, ram_config; + int cfg_index; + uint8_t cfg_regs[256]; + int cfg_enable, ram_config; - int ems_index; - int ems_autoinc; - uint16_t ems[0x24]; - mem_mapping_t ems_mappings[20]; /*a0000-effff*/ - uint32_t mappings[20]; + int ems_index; + int ems_autoinc; + uint16_t ems[0x24]; + mem_mapping_t ems_mappings[20]; /*a0000-effff*/ + uint32_t mappings[20]; mem_mapping_t ram_mapping[2]; - ram_struct_t ram_struct[2]; - ems_struct_t ems_struct[20]; + ram_struct_t ram_struct[2]; + ems_struct_t ems_struct[20]; - uint32_t ram_virt_base[2], ram_phys_base[2]; - uint32_t ram_mask[2]; - int row_virt_shift[2], row_phys_shift[2]; - int ram_interleaved[2], ibank_shift[2]; + uint32_t ram_virt_base[2], ram_phys_base[2]; + uint32_t ram_mask[2]; + int row_virt_shift[2], row_phys_shift[2]; + int ram_interleaved[2], ibank_shift[2]; - port_92_t * port_92; + port_92_t *port_92; } scamp_t; static const struct { - int size_kb; - int rammap; - int bank[2]; -} ram_configs[] = -{ - {512, 0x0, {BANK_256K, BANK_NONE}}, - {1024, 0x1, {BANK_256K_INTERLEAVED, BANK_NONE}}, - {1536, 0x2, {BANK_256K_INTERLEAVED, BANK_256K}}, - {2048, 0x3, {BANK_256K_INTERLEAVED, BANK_256K_INTERLEAVED}}, - {3072, 0xc, {BANK_256K_INTERLEAVED, BANK_1M}}, - {4096, 0x5, {BANK_1M_INTERLEAVED, BANK_NONE}}, - {5120, 0xd, {BANK_256K_INTERLEAVED, BANK_1M_INTERLEAVED}}, - {6144, 0x6, {BANK_1M_INTERLEAVED, BANK_1M}}, - {8192, 0x7, {BANK_1M_INTERLEAVED, BANK_1M_INTERLEAVED}}, - {12288, 0xe, {BANK_1M_INTERLEAVED, BANK_4M}}, - {16384, 0x9, {BANK_4M_INTERLEAVED, BANK_NONE}}, + int size_kb; + int rammap; + int bank[2]; +} ram_configs[] = { + {512, 0x0, { BANK_256K, BANK_NONE } }, + { 1024, 0x1, { BANK_256K_INTERLEAVED, BANK_NONE } }, + { 1536, 0x2, { BANK_256K_INTERLEAVED, BANK_256K } }, + { 2048, 0x3, { BANK_256K_INTERLEAVED, BANK_256K_INTERLEAVED }}, + { 3072, 0xc, { BANK_256K_INTERLEAVED, BANK_1M } }, + { 4096, 0x5, { BANK_1M_INTERLEAVED, BANK_NONE } }, + { 5120, 0xd, { BANK_256K_INTERLEAVED, BANK_1M_INTERLEAVED } }, + { 6144, 0x6, { BANK_1M_INTERLEAVED, BANK_1M } }, + { 8192, 0x7, { BANK_1M_INTERLEAVED, BANK_1M_INTERLEAVED } }, + { 12288, 0xe, { BANK_1M_INTERLEAVED, BANK_4M } }, + { 16384, 0x9, { BANK_4M_INTERLEAVED, BANK_NONE } }, }; static const struct { - int bank[2]; - int remapped; -} rammap[16] = -{ - {{BANK_256K, BANK_NONE}, 0}, - {{BANK_256K_INTERLEAVED, BANK_NONE}, 0}, - {{BANK_256K_INTERLEAVED, BANK_256K}, 0}, - {{BANK_256K_INTERLEAVED, BANK_256K_INTERLEAVED}, 0}, + int bank[2]; + int remapped; +} rammap[16] = { + {{ BANK_256K, BANK_NONE }, 0}, + { { BANK_256K_INTERLEAVED, BANK_NONE }, 0}, + { { BANK_256K_INTERLEAVED, BANK_256K }, 0}, + { { BANK_256K_INTERLEAVED, BANK_256K_INTERLEAVED }, 0}, - {{BANK_1M, BANK_NONE}, 0}, - {{BANK_1M_INTERLEAVED, BANK_NONE}, 0}, - {{BANK_1M_INTERLEAVED, BANK_1M}, 0}, - {{BANK_1M_INTERLEAVED, BANK_1M_INTERLEAVED}, 0}, + { { BANK_1M, BANK_NONE }, 0}, + { { BANK_1M_INTERLEAVED, BANK_NONE }, 0}, + { { BANK_1M_INTERLEAVED, BANK_1M }, 0}, + { { BANK_1M_INTERLEAVED, BANK_1M_INTERLEAVED }, 0}, - {{BANK_4M, BANK_NONE}, 0}, - {{BANK_4M_INTERLEAVED, BANK_NONE}, 0}, - {{BANK_NONE, BANK_4M}, 1}, /*Bank 2 remapped to 0*/ - {{BANK_NONE, BANK_4M_INTERLEAVED}, 1}, /*Banks 2/3 remapped to 0/1*/ + { { BANK_4M, BANK_NONE }, 0}, + { { BANK_4M_INTERLEAVED, BANK_NONE }, 0}, + { { BANK_NONE, BANK_4M }, 1}, /*Bank 2 remapped to 0*/ + { { BANK_NONE, BANK_4M_INTERLEAVED }, 1}, /*Banks 2/3 remapped to 0/1*/ - {{BANK_256K_INTERLEAVED, BANK_1M}, 0}, - {{BANK_256K_INTERLEAVED, BANK_1M_INTERLEAVED}, 0}, - {{BANK_1M_INTERLEAVED, BANK_4M}, 0}, - {{BANK_1M_INTERLEAVED, BANK_4M_INTERLEAVED}, 0}, /*Undocumented - probably wrong!*/ + { { BANK_256K_INTERLEAVED, BANK_1M }, 0}, + { { BANK_256K_INTERLEAVED, BANK_1M_INTERLEAVED }, 0}, + { { BANK_1M_INTERLEAVED, BANK_4M }, 0}, + { { BANK_1M_INTERLEAVED, BANK_4M_INTERLEAVED }, 0}, /*Undocumented - probably wrong!*/ }; - /* The column bits masked when using 256kbit DRAMs in 4Mbit mode aren't contiguous, so we use separate routines for that special case */ static uint8_t ram_mirrored_256k_in_4mi_read(uint32_t addr, void *priv) { - ram_struct_t *rs = (ram_struct_t *) priv; - scamp_t *dev = rs->parent; - int bank = rs->bank, byte; - int row, column; + ram_struct_t *rs = (ram_struct_t *) priv; + scamp_t *dev = rs->parent; + int bank = rs->bank, byte; + int row, column; addr -= dev->ram_virt_base[bank]; byte = addr & 1; if (!dev->ram_interleaved[bank]) { - if (addr & 0x400) - return 0xff; + if (addr & 0x400) + return 0xff; - addr = (addr & 0x3ff) | ((addr & ~0x7ff) >> 1); - column = (addr >> 1) & dev->ram_mask[bank]; - row = ((addr & 0xff000) >> 13) | (((addr & 0x200000) >> 22) << 9); + addr = (addr & 0x3ff) | ((addr & ~0x7ff) >> 1); + column = (addr >> 1) & dev->ram_mask[bank]; + row = ((addr & 0xff000) >> 13) | (((addr & 0x200000) >> 22) << 9); - addr = byte | (column << 1) | (row << dev->row_phys_shift[bank]); + addr = byte | (column << 1) | (row << dev->row_phys_shift[bank]); } else { - column = (addr >> 1) & ((dev->ram_mask[bank] << 1) | 1); - row = ((addr & 0x1fe000) >> 13) | (((addr & 0x400000) >> 22) << 9); + column = (addr >> 1) & ((dev->ram_mask[bank] << 1) | 1); + row = ((addr & 0x1fe000) >> 13) | (((addr & 0x400000) >> 22) << 9); - addr = byte | (column << 1) | (row << (dev->row_phys_shift[bank]+1)); + addr = byte | (column << 1) | (row << (dev->row_phys_shift[bank] + 1)); } return ram[addr + dev->ram_phys_base[bank]]; } - static void ram_mirrored_256k_in_4mi_write(uint32_t addr, uint8_t val, void *priv) { - ram_struct_t *rs = (ram_struct_t *) priv; - scamp_t *dev = rs->parent; - int bank = rs->bank, byte; - int row, column; + ram_struct_t *rs = (ram_struct_t *) priv; + scamp_t *dev = rs->parent; + int bank = rs->bank, byte; + int row, column; addr -= dev->ram_virt_base[bank]; byte = addr & 1; if (!dev->ram_interleaved[bank]) { - if (addr & 0x400) - return; + if (addr & 0x400) + return; - addr = (addr & 0x3ff) | ((addr & ~0x7ff) >> 1); - column = (addr >> 1) & dev->ram_mask[bank]; - row = ((addr & 0xff000) >> 13) | (((addr & 0x200000) >> 22) << 9); + addr = (addr & 0x3ff) | ((addr & ~0x7ff) >> 1); + column = (addr >> 1) & dev->ram_mask[bank]; + row = ((addr & 0xff000) >> 13) | (((addr & 0x200000) >> 22) << 9); - addr = byte | (column << 1) | (row << dev->row_phys_shift[bank]); + addr = byte | (column << 1) | (row << dev->row_phys_shift[bank]); } else { - column = (addr >> 1) & ((dev->ram_mask[bank] << 1) | 1); - row = ((addr & 0x1fe000) >> 13) | (((addr & 0x400000) >> 22) << 9); + column = (addr >> 1) & ((dev->ram_mask[bank] << 1) | 1); + row = ((addr & 0x1fe000) >> 13) | (((addr & 0x400000) >> 22) << 9); - addr = byte | (column << 1) | (row << (dev->row_phys_shift[bank]+1)); + addr = byte | (column << 1) | (row << (dev->row_phys_shift[bank] + 1)); } ram[addr + dev->ram_phys_base[bank]] = val; } - /*Read/write handlers for interleaved memory banks. We must keep CPU and ram array mapping linear, otherwise we won't be able to execute code from interleaved banks*/ static uint8_t ram_mirrored_interleaved_read(uint32_t addr, void *priv) { - ram_struct_t *rs = (ram_struct_t *) priv; - scamp_t *dev = rs->parent; - int bank = rs->bank, byte; - int row, column; + ram_struct_t *rs = (ram_struct_t *) priv; + scamp_t *dev = rs->parent; + int bank = rs->bank, byte; + int row, column; addr -= dev->ram_virt_base[bank]; byte = addr & 1; if (!dev->ram_interleaved[bank]) { - if (addr & 0x400) - return 0xff; + if (addr & 0x400) + return 0xff; - addr = (addr & 0x3ff) | ((addr & ~0x7ff) >> 1); - column = (addr >> 1) & dev->ram_mask[bank]; - row = (addr >> dev->row_virt_shift[bank]) & dev->ram_mask[bank]; + addr = (addr & 0x3ff) | ((addr & ~0x7ff) >> 1); + column = (addr >> 1) & dev->ram_mask[bank]; + row = (addr >> dev->row_virt_shift[bank]) & dev->ram_mask[bank]; - addr = byte | (column << 1) | (row << dev->row_phys_shift[bank]); + addr = byte | (column << 1) | (row << dev->row_phys_shift[bank]); } else { - column = (addr >> 1) & ((dev->ram_mask[bank] << 1) | 1); - row = (addr >> (dev->row_virt_shift[bank]+1)) & dev->ram_mask[bank]; + column = (addr >> 1) & ((dev->ram_mask[bank] << 1) | 1); + row = (addr >> (dev->row_virt_shift[bank] + 1)) & dev->ram_mask[bank]; - addr = byte | (column << 1) | (row << (dev->row_phys_shift[bank]+1)); + addr = byte | (column << 1) | (row << (dev->row_phys_shift[bank] + 1)); } return ram[addr + dev->ram_phys_base[bank]]; } - static void ram_mirrored_interleaved_write(uint32_t addr, uint8_t val, void *priv) { - ram_struct_t *rs = (ram_struct_t *) priv; - scamp_t *dev = rs->parent; - int bank = rs->bank, byte; - int row, column; + ram_struct_t *rs = (ram_struct_t *) priv; + scamp_t *dev = rs->parent; + int bank = rs->bank, byte; + int row, column; addr -= dev->ram_virt_base[bank]; byte = addr & 1; if (!dev->ram_interleaved[bank]) { - if (addr & 0x400) - return; + if (addr & 0x400) + return; - addr = (addr & 0x3ff) | ((addr & ~0x7ff) >> 1); - column = (addr >> 1) & dev->ram_mask[bank]; - row = (addr >> dev->row_virt_shift[bank]) & dev->ram_mask[bank]; + addr = (addr & 0x3ff) | ((addr & ~0x7ff) >> 1); + column = (addr >> 1) & dev->ram_mask[bank]; + row = (addr >> dev->row_virt_shift[bank]) & dev->ram_mask[bank]; - addr = byte | (column << 1) | (row << dev->row_phys_shift[bank]); + addr = byte | (column << 1) | (row << dev->row_phys_shift[bank]); } else { - column = (addr >> 1) & ((dev->ram_mask[bank] << 1) | 1); - row = (addr >> (dev->row_virt_shift[bank]+1)) & dev->ram_mask[bank]; + column = (addr >> 1) & ((dev->ram_mask[bank] << 1) | 1); + row = (addr >> (dev->row_virt_shift[bank] + 1)) & dev->ram_mask[bank]; - addr = byte | (column << 1) | (row << (dev->row_phys_shift[bank]+1)); + addr = byte | (column << 1) | (row << (dev->row_phys_shift[bank] + 1)); } ram[addr + dev->ram_phys_base[bank]] = val; } - static uint8_t ram_mirrored_read(uint32_t addr, void *priv) { - ram_struct_t *rs = (ram_struct_t *) priv; - scamp_t *dev = rs->parent; - int bank = rs->bank, byte; - int row, column; + ram_struct_t *rs = (ram_struct_t *) priv; + scamp_t *dev = rs->parent; + int bank = rs->bank, byte; + int row, column; addr -= dev->ram_virt_base[bank]; - byte = addr & 1; + byte = addr & 1; column = (addr >> 1) & dev->ram_mask[bank]; - row = (addr >> dev->row_virt_shift[bank]) & dev->ram_mask[bank]; - addr = byte | (column << 1) | (row << dev->row_phys_shift[bank]); + row = (addr >> dev->row_virt_shift[bank]) & dev->ram_mask[bank]; + addr = byte | (column << 1) | (row << dev->row_phys_shift[bank]); return ram[addr + dev->ram_phys_base[bank]]; } - static void ram_mirrored_write(uint32_t addr, uint8_t val, void *priv) { - ram_struct_t *rs = (ram_struct_t *) priv; - scamp_t *dev = rs->parent; - int bank = rs->bank, byte; - int row, column; + ram_struct_t *rs = (ram_struct_t *) priv; + scamp_t *dev = rs->parent; + int bank = rs->bank, byte; + int row, column; addr -= dev->ram_virt_base[bank]; - byte = addr & 1; + byte = addr & 1; column = (addr >> 1) & dev->ram_mask[bank]; - row = (addr >> dev->row_virt_shift[bank]) & dev->ram_mask[bank]; - addr = byte | (column << 1) | (row << dev->row_phys_shift[bank]); + row = (addr >> dev->row_virt_shift[bank]) & dev->ram_mask[bank]; + addr = byte | (column << 1) | (row << dev->row_phys_shift[bank]); ram[addr + dev->ram_phys_base[bank]] = val; } - static void recalc_mappings(void *priv) { scamp_t *dev = (scamp_t *) priv; - int c; - uint32_t virt_base = 0, old_virt_base; - uint8_t cur_rammap = dev->cfg_regs[CFG_RAMMAP] & 0xf; - int bank_nr = 0, phys_bank; + int c; + uint32_t virt_base = 0, old_virt_base; + uint8_t cur_rammap = dev->cfg_regs[CFG_RAMMAP] & 0xf; + int bank_nr = 0, phys_bank; mem_set_mem_state_both((1 << 20), (16256 - 1024) * 1024, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); mem_set_mem_state(0xfe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); for (c = 0; c < 2; c++) - mem_mapping_disable(&dev->ram_mapping[c]); + mem_mapping_disable(&dev->ram_mapping[c]); /* Once the BIOS programs the correct DRAM configuration, switch to regular linear memory mapping */ if (cur_rammap == ram_configs[dev->ram_config].rammap) { - mem_mapping_set_handler(&ram_low_mapping, - mem_read_ram, mem_read_ramw, mem_read_raml, - mem_write_ram, mem_write_ramw, mem_write_raml); - mem_mapping_set_addr(&ram_low_mapping, 0, 0xa0000); - if (mem_size > 1024) - mem_set_mem_state_both((1 << 20), (mem_size - 1024) << 10, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - mem_mapping_enable(&ram_high_mapping); - return; + mem_mapping_set_handler(&ram_low_mapping, + mem_read_ram, mem_read_ramw, mem_read_raml, + mem_write_ram, mem_write_ramw, mem_write_raml); + mem_mapping_set_addr(&ram_low_mapping, 0, 0xa0000); + if (mem_size > 1024) + mem_set_mem_state_both((1 << 20), (mem_size - 1024) << 10, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + mem_mapping_enable(&ram_high_mapping); + return; } else { - mem_mapping_set_handler(&ram_low_mapping, - ram_mirrored_read, NULL, NULL, - ram_mirrored_write, NULL, NULL); - mem_mapping_disable(&ram_low_mapping); + mem_mapping_set_handler(&ram_low_mapping, + ram_mirrored_read, NULL, NULL, + ram_mirrored_write, NULL, NULL); + mem_mapping_disable(&ram_low_mapping); } if (rammap[cur_rammap].bank[0] == BANK_NONE) - bank_nr = 1; + bank_nr = 1; for (; bank_nr < 2; bank_nr++) { - old_virt_base = virt_base; - phys_bank = ram_configs[dev->ram_config].bank[bank_nr]; + old_virt_base = virt_base; + phys_bank = ram_configs[dev->ram_config].bank[bank_nr]; - dev->ram_virt_base[bank_nr] = virt_base; + dev->ram_virt_base[bank_nr] = virt_base; - if (virt_base == 0) { - switch (rammap[cur_rammap].bank[bank_nr]) { - case BANK_NONE: - fatal(" Bank %i is empty!\n }\n}\n", bank_nr); - break; + if (virt_base == 0) { + switch (rammap[cur_rammap].bank[bank_nr]) { + case BANK_NONE: + fatal(" Bank %i is empty!\n }\n}\n", bank_nr); + break; - case BANK_256K: - if (phys_bank != BANK_NONE) { - mem_mapping_set_addr(&ram_low_mapping, 0, 0x80000); - mem_mapping_set_p(&ram_low_mapping, (void *)&dev->ram_struct[bank_nr]); - } - virt_base += (1 << 19); - dev->row_virt_shift[bank_nr] = 10; - break; + case BANK_256K: + if (phys_bank != BANK_NONE) { + mem_mapping_set_addr(&ram_low_mapping, 0, 0x80000); + mem_mapping_set_p(&ram_low_mapping, (void *) &dev->ram_struct[bank_nr]); + } + virt_base += (1 << 19); + dev->row_virt_shift[bank_nr] = 10; + break; - case BANK_256K_INTERLEAVED: - if (phys_bank != BANK_NONE) { - mem_mapping_set_addr(&ram_low_mapping, 0, 0xa0000); - mem_mapping_set_p(&ram_low_mapping, (void *)&dev->ram_struct[bank_nr]); - } - virt_base += (1 << 20); - dev->row_virt_shift[bank_nr] = 10; - break; + case BANK_256K_INTERLEAVED: + if (phys_bank != BANK_NONE) { + mem_mapping_set_addr(&ram_low_mapping, 0, 0xa0000); + mem_mapping_set_p(&ram_low_mapping, (void *) &dev->ram_struct[bank_nr]); + } + virt_base += (1 << 20); + dev->row_virt_shift[bank_nr] = 10; + break; - case BANK_1M: - if (phys_bank != BANK_NONE) { - mem_mapping_set_addr(&ram_low_mapping, 0, 0xa0000); - mem_mapping_set_p(&ram_low_mapping, (void *)&dev->ram_struct[bank_nr]); - mem_mapping_set_addr(&dev->ram_mapping[bank_nr], 0x100000, 0x100000); - mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr] + 0x100000]); - mem_set_mem_state_both((1 << 20), (1 << 20), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } - virt_base += (1 << 21); - dev->row_virt_shift[bank_nr] = 11; - break; + case BANK_1M: + if (phys_bank != BANK_NONE) { + mem_mapping_set_addr(&ram_low_mapping, 0, 0xa0000); + mem_mapping_set_p(&ram_low_mapping, (void *) &dev->ram_struct[bank_nr]); + mem_mapping_set_addr(&dev->ram_mapping[bank_nr], 0x100000, 0x100000); + mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr] + 0x100000]); + mem_set_mem_state_both((1 << 20), (1 << 20), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } + virt_base += (1 << 21); + dev->row_virt_shift[bank_nr] = 11; + break; - case BANK_1M_INTERLEAVED: - if (phys_bank != BANK_NONE) { - mem_mapping_set_addr(&ram_low_mapping, 0, 0xa0000); - mem_mapping_set_p(&ram_low_mapping, (void *)&dev->ram_struct[bank_nr]); - mem_mapping_set_addr(&dev->ram_mapping[bank_nr], 0x100000, 0x300000); - mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr] + 0x100000]); - mem_set_mem_state_both((1 << 20), (3 << 20), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } - virt_base += (1 << 22); - dev->row_virt_shift[bank_nr] = 11; - break; + case BANK_1M_INTERLEAVED: + if (phys_bank != BANK_NONE) { + mem_mapping_set_addr(&ram_low_mapping, 0, 0xa0000); + mem_mapping_set_p(&ram_low_mapping, (void *) &dev->ram_struct[bank_nr]); + mem_mapping_set_addr(&dev->ram_mapping[bank_nr], 0x100000, 0x300000); + mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr] + 0x100000]); + mem_set_mem_state_both((1 << 20), (3 << 20), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } + virt_base += (1 << 22); + dev->row_virt_shift[bank_nr] = 11; + break; - case BANK_4M: - if (phys_bank != BANK_NONE) { - mem_mapping_set_addr(&ram_low_mapping, 0, 0xa0000); - mem_mapping_set_p(&ram_low_mapping, (void *)&dev->ram_struct[bank_nr]); - mem_mapping_set_addr(&dev->ram_mapping[bank_nr], 0x100000, 0x700000); - mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr] + 0x100000]); - mem_set_mem_state_both((1 << 20), (7 << 20), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } - virt_base += (1 << 23); - dev->row_virt_shift[bank_nr] = 12; - break; + case BANK_4M: + if (phys_bank != BANK_NONE) { + mem_mapping_set_addr(&ram_low_mapping, 0, 0xa0000); + mem_mapping_set_p(&ram_low_mapping, (void *) &dev->ram_struct[bank_nr]); + mem_mapping_set_addr(&dev->ram_mapping[bank_nr], 0x100000, 0x700000); + mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr] + 0x100000]); + mem_set_mem_state_both((1 << 20), (7 << 20), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } + virt_base += (1 << 23); + dev->row_virt_shift[bank_nr] = 12; + break; - case BANK_4M_INTERLEAVED: - if (phys_bank != BANK_NONE) { - mem_mapping_set_addr(&ram_low_mapping, 0, 0xa0000); - mem_mapping_set_p(&ram_low_mapping, (void *)&dev->ram_struct[bank_nr]); - mem_mapping_set_addr(&dev->ram_mapping[bank_nr], 0x100000, 0xf00000); - mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr] + 0x100000]); - mem_set_mem_state_both((1 << 20), (15 << 20), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } - virt_base += (1 << 24); - dev->row_virt_shift[bank_nr] = 12; - break; - } - } else { - switch (rammap[cur_rammap].bank[bank_nr]) { - case BANK_NONE: - break; + case BANK_4M_INTERLEAVED: + if (phys_bank != BANK_NONE) { + mem_mapping_set_addr(&ram_low_mapping, 0, 0xa0000); + mem_mapping_set_p(&ram_low_mapping, (void *) &dev->ram_struct[bank_nr]); + mem_mapping_set_addr(&dev->ram_mapping[bank_nr], 0x100000, 0xf00000); + mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr] + 0x100000]); + mem_set_mem_state_both((1 << 20), (15 << 20), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } + virt_base += (1 << 24); + dev->row_virt_shift[bank_nr] = 12; + break; + } + } else { + switch (rammap[cur_rammap].bank[bank_nr]) { + case BANK_NONE: + break; - case BANK_256K: - if (phys_bank != BANK_NONE) { - mem_mapping_set_addr(&dev->ram_mapping[bank_nr], virt_base, 0x80000); - mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr]]); - mem_set_mem_state_both(virt_base, (1 << 19), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } - virt_base += (1 << 19); - dev->row_virt_shift[bank_nr] = 10; - break; + case BANK_256K: + if (phys_bank != BANK_NONE) { + mem_mapping_set_addr(&dev->ram_mapping[bank_nr], virt_base, 0x80000); + mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr]]); + mem_set_mem_state_both(virt_base, (1 << 19), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } + virt_base += (1 << 19); + dev->row_virt_shift[bank_nr] = 10; + break; - case BANK_256K_INTERLEAVED: - if (phys_bank != BANK_NONE) { - mem_mapping_set_addr(&dev->ram_mapping[bank_nr], virt_base, 0x100000); - mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr]]); - mem_set_mem_state_both(virt_base, (1 << 20), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } - virt_base += (1 << 20); - dev->row_virt_shift[bank_nr] = 10; - break; + case BANK_256K_INTERLEAVED: + if (phys_bank != BANK_NONE) { + mem_mapping_set_addr(&dev->ram_mapping[bank_nr], virt_base, 0x100000); + mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr]]); + mem_set_mem_state_both(virt_base, (1 << 20), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } + virt_base += (1 << 20); + dev->row_virt_shift[bank_nr] = 10; + break; - case BANK_1M: - if (phys_bank != BANK_NONE) { - mem_mapping_set_addr(&dev->ram_mapping[bank_nr], virt_base, 0x200000); - mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr]]); - mem_set_mem_state_both(virt_base, (1 << 21), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } - virt_base += (1 << 21); - dev->row_virt_shift[bank_nr] = 11; - break; + case BANK_1M: + if (phys_bank != BANK_NONE) { + mem_mapping_set_addr(&dev->ram_mapping[bank_nr], virt_base, 0x200000); + mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr]]); + mem_set_mem_state_both(virt_base, (1 << 21), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } + virt_base += (1 << 21); + dev->row_virt_shift[bank_nr] = 11; + break; - case BANK_1M_INTERLEAVED: - if (phys_bank != BANK_NONE) { - mem_mapping_set_addr(&dev->ram_mapping[bank_nr], virt_base, 0x400000); - mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr]]); - mem_set_mem_state_both(virt_base, (1 << 22), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } - virt_base += (1 << 22); - dev->row_virt_shift[bank_nr] = 11; - break; + case BANK_1M_INTERLEAVED: + if (phys_bank != BANK_NONE) { + mem_mapping_set_addr(&dev->ram_mapping[bank_nr], virt_base, 0x400000); + mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr]]); + mem_set_mem_state_both(virt_base, (1 << 22), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } + virt_base += (1 << 22); + dev->row_virt_shift[bank_nr] = 11; + break; - case BANK_4M: - if (phys_bank != BANK_NONE) { - mem_mapping_set_addr(&dev->ram_mapping[bank_nr], virt_base, 0x800000); - mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr]]); - mem_set_mem_state_both(virt_base, (1 << 23), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } - virt_base += (1 << 23); - dev->row_virt_shift[bank_nr] = 12; - break; + case BANK_4M: + if (phys_bank != BANK_NONE) { + mem_mapping_set_addr(&dev->ram_mapping[bank_nr], virt_base, 0x800000); + mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr]]); + mem_set_mem_state_both(virt_base, (1 << 23), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } + virt_base += (1 << 23); + dev->row_virt_shift[bank_nr] = 12; + break; - case BANK_4M_INTERLEAVED: - if (phys_bank != BANK_NONE) { - mem_mapping_set_addr(&dev->ram_mapping[bank_nr], virt_base, 0x1000000); - mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr]]); - mem_set_mem_state_both(virt_base, (1 << 24), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - } - virt_base += (1 << 24); - dev->row_virt_shift[bank_nr] = 12; - break; - } - } - switch (rammap[cur_rammap].bank[bank_nr]) { - case BANK_256K: case BANK_1M: case BANK_4M: - mem_mapping_set_handler(&dev->ram_mapping[bank_nr], - ram_mirrored_read, NULL, NULL, - ram_mirrored_write, NULL, NULL); - if (!old_virt_base) - mem_mapping_set_handler(&ram_low_mapping, - ram_mirrored_read, NULL, NULL, - ram_mirrored_write, NULL, NULL); - break; + case BANK_4M_INTERLEAVED: + if (phys_bank != BANK_NONE) { + mem_mapping_set_addr(&dev->ram_mapping[bank_nr], virt_base, 0x1000000); + mem_mapping_set_exec(&dev->ram_mapping[bank_nr], &ram[dev->ram_phys_base[bank_nr]]); + mem_set_mem_state_both(virt_base, (1 << 24), MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } + virt_base += (1 << 24); + dev->row_virt_shift[bank_nr] = 12; + break; + } + } + switch (rammap[cur_rammap].bank[bank_nr]) { + case BANK_256K: + case BANK_1M: + case BANK_4M: + mem_mapping_set_handler(&dev->ram_mapping[bank_nr], + ram_mirrored_read, NULL, NULL, + ram_mirrored_write, NULL, NULL); + if (!old_virt_base) + mem_mapping_set_handler(&ram_low_mapping, + ram_mirrored_read, NULL, NULL, + ram_mirrored_write, NULL, NULL); + break; - case BANK_256K_INTERLEAVED: case BANK_1M_INTERLEAVED: - mem_mapping_set_handler(&dev->ram_mapping[bank_nr], - ram_mirrored_interleaved_read, NULL, NULL, - ram_mirrored_interleaved_write, NULL, NULL); - if (!old_virt_base) - mem_mapping_set_handler(&ram_low_mapping, - ram_mirrored_interleaved_read, NULL, NULL, - ram_mirrored_interleaved_write, NULL, NULL); - break; + case BANK_256K_INTERLEAVED: + case BANK_1M_INTERLEAVED: + mem_mapping_set_handler(&dev->ram_mapping[bank_nr], + ram_mirrored_interleaved_read, NULL, NULL, + ram_mirrored_interleaved_write, NULL, NULL); + if (!old_virt_base) + mem_mapping_set_handler(&ram_low_mapping, + ram_mirrored_interleaved_read, NULL, NULL, + ram_mirrored_interleaved_write, NULL, NULL); + break; - case BANK_4M_INTERLEAVED: - if (phys_bank == BANK_256K || phys_bank == BANK_256K_INTERLEAVED) { - mem_mapping_set_handler(&dev->ram_mapping[bank_nr], - ram_mirrored_256k_in_4mi_read, NULL, NULL, - ram_mirrored_256k_in_4mi_write, NULL, NULL); - if (!old_virt_base) - mem_mapping_set_handler(&ram_low_mapping, - ram_mirrored_256k_in_4mi_read, NULL, NULL, - ram_mirrored_256k_in_4mi_write, NULL, NULL); - } else { - mem_mapping_set_handler(&dev->ram_mapping[bank_nr], - ram_mirrored_interleaved_read, NULL, NULL, - ram_mirrored_interleaved_write, NULL, NULL); - if (!old_virt_base) - mem_mapping_set_handler(&ram_low_mapping, - ram_mirrored_interleaved_read, NULL, NULL, - ram_mirrored_interleaved_write, NULL, NULL); - } - break; - } + case BANK_4M_INTERLEAVED: + if (phys_bank == BANK_256K || phys_bank == BANK_256K_INTERLEAVED) { + mem_mapping_set_handler(&dev->ram_mapping[bank_nr], + ram_mirrored_256k_in_4mi_read, NULL, NULL, + ram_mirrored_256k_in_4mi_write, NULL, NULL); + if (!old_virt_base) + mem_mapping_set_handler(&ram_low_mapping, + ram_mirrored_256k_in_4mi_read, NULL, NULL, + ram_mirrored_256k_in_4mi_write, NULL, NULL); + } else { + mem_mapping_set_handler(&dev->ram_mapping[bank_nr], + ram_mirrored_interleaved_read, NULL, NULL, + ram_mirrored_interleaved_write, NULL, NULL); + if (!old_virt_base) + mem_mapping_set_handler(&ram_low_mapping, + ram_mirrored_interleaved_read, NULL, NULL, + ram_mirrored_interleaved_write, NULL, NULL); + } + break; + } } } - static void recalc_sltptr(scamp_t *dev) { - uint32_t sltptr = dev->cfg_regs[CFG_SLTPTR] << 16; + uint32_t sltptr = dev->cfg_regs[CFG_SLTPTR] << 16; - if (sltptr >= 0xa0000 && sltptr < 0x100000) - sltptr = 0x100000; - if (sltptr > 0xfe0000) - sltptr = 0xfe0000; + if (sltptr >= 0xa0000 && sltptr < 0x100000) + sltptr = 0x100000; + if (sltptr > 0xfe0000) + sltptr = 0xfe0000; - if (sltptr >= 0xa0000) - { - mem_set_mem_state(0, 0xa0000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - mem_set_mem_state(0x100000, sltptr - 0x100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - mem_set_mem_state(sltptr, 0x1000000 - sltptr, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - } - else - { - mem_set_mem_state(0, sltptr, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - mem_set_mem_state(sltptr, 0xa0000-sltptr, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - mem_set_mem_state(0x100000, 0xf00000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - } + if (sltptr >= 0xa0000) { + mem_set_mem_state(0, 0xa0000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + mem_set_mem_state(0x100000, sltptr - 0x100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + mem_set_mem_state(sltptr, 0x1000000 - sltptr, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + } else { + mem_set_mem_state(0, sltptr, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + mem_set_mem_state(sltptr, 0xa0000 - sltptr, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + mem_set_mem_state(0x100000, 0xf00000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + } } static uint8_t scamp_ems_read(uint32_t addr, void *priv) { - ems_struct_t *ems = (ems_struct_t *) priv; - scamp_t *dev = ems->parent; - int segment = ems->segment; + ems_struct_t *ems = (ems_struct_t *) priv; + scamp_t *dev = ems->parent; + int segment = ems->segment; - addr = (addr & 0x3fff) | dev->mappings[segment]; - return ram[addr]; + addr = (addr & 0x3fff) | dev->mappings[segment]; + return ram[addr]; } static void scamp_ems_write(uint32_t addr, uint8_t val, void *priv) { - ems_struct_t *ems = (ems_struct_t *) priv; - scamp_t *dev = ems->parent; - int segment = ems->segment; + ems_struct_t *ems = (ems_struct_t *) priv; + scamp_t *dev = ems->parent; + int segment = ems->segment; - addr = (addr & 0x3fff) | dev->mappings[segment]; - ram[addr] = val; + addr = (addr & 0x3fff) | dev->mappings[segment]; + ram[addr] = val; } static void recalc_ems(scamp_t *dev) { - int segment; - const uint32_t ems_base[12] = - { - 0xc0000, 0xc4000, 0xc8000, 0xcc000, - 0xd0000, 0xd4000, 0xd8000, 0xdc000, - 0xe0000, 0xe4000, 0xe8000, 0xec000 - }; - uint32_t new_mappings[20]; - uint16_t ems_enable; + int segment; + const uint32_t ems_base[12] = { + 0xc0000, 0xc4000, 0xc8000, 0xcc000, + 0xd0000, 0xd4000, 0xd8000, 0xdc000, + 0xe0000, 0xe4000, 0xe8000, 0xec000 + }; + uint32_t new_mappings[20]; + uint16_t ems_enable; - for (segment = 0; segment < 20; segment++) - new_mappings[segment] = 0xa0000 + segment*0x4000; + for (segment = 0; segment < 20; segment++) + new_mappings[segment] = 0xa0000 + segment * 0x4000; - if (dev->cfg_regs[CFG_EMSEN1] & EMSEN1_EMSENAB) - ems_enable = dev->cfg_regs[CFG_EMSEN2] | ((dev->cfg_regs[CFG_EMSEN1] & 0xf) << 8); - else - ems_enable = 0; + if (dev->cfg_regs[CFG_EMSEN1] & EMSEN1_EMSENAB) + ems_enable = dev->cfg_regs[CFG_EMSEN2] | ((dev->cfg_regs[CFG_EMSEN1] & 0xf) << 8); + else + ems_enable = 0; - for (segment = 0; segment < 12; segment++) - { - if (ems_enable & (1 << segment)) - { - uint32_t phys_addr = dev->ems[segment] << 14; + for (segment = 0; segment < 12; segment++) { + if (ems_enable & (1 << segment)) { + uint32_t phys_addr = dev->ems[segment] << 14; - /*If physical address is in remapped memory then adjust down to a0000-fffff range*/ - if ((dev->cfg_regs[CFG_RAMMAP] & RAMMAP_REMP386) && phys_addr >= (mem_size * 1024) - && phys_addr < ((mem_size + 384) * 1024)) - phys_addr = (phys_addr - mem_size * 1024) + 0xa0000; - new_mappings[(ems_base[segment] - 0xa0000) >> 14] = phys_addr; - } + /*If physical address is in remapped memory then adjust down to a0000-fffff range*/ + if ((dev->cfg_regs[CFG_RAMMAP] & RAMMAP_REMP386) && phys_addr >= (mem_size * 1024) + && phys_addr < ((mem_size + 384) * 1024)) + phys_addr = (phys_addr - mem_size * 1024) + 0xa0000; + new_mappings[(ems_base[segment] - 0xa0000) >> 14] = phys_addr; } + } - for (segment = 0; segment < 20; segment++) - { - if (new_mappings[segment] != dev->mappings[segment]) - { - dev->mappings[segment] = new_mappings[segment]; - if (new_mappings[segment] < (mem_size * 1024)) - { - mem_mapping_set_exec(&dev->ems_mappings[segment], ram + dev->mappings[segment]); - mem_mapping_enable(&dev->ems_mappings[segment]); - } - else - mem_mapping_disable(&dev->ems_mappings[segment]); - } + for (segment = 0; segment < 20; segment++) { + if (new_mappings[segment] != dev->mappings[segment]) { + dev->mappings[segment] = new_mappings[segment]; + if (new_mappings[segment] < (mem_size * 1024)) { + mem_mapping_set_exec(&dev->ems_mappings[segment], ram + dev->mappings[segment]); + mem_mapping_enable(&dev->ems_mappings[segment]); + } else + mem_mapping_disable(&dev->ems_mappings[segment]); } + } } static void shadow_control(uint32_t addr, uint32_t size, int state, int ems_enable) { - if (ems_enable) - mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - else switch (state) { - case 0: - mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - break; - case 1: - mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); - break; - case 2: - mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTANY); - break; - case 3: - mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - break; - } + if (ems_enable) + mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + else + switch (state) { + case 0: + mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + break; + case 1: + mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + break; + case 2: + mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTANY); + break; + case 3: + mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + break; + } flushmmucache_nopc(); } @@ -659,51 +639,51 @@ shadow_control(uint32_t addr, uint32_t size, int state, int ems_enable) static void shadow_recalc(scamp_t *dev) { - uint8_t abaxs = (dev->cfg_regs[CFG_RAMMAP] & RAMMAP_REMP386) ? 0 : dev->cfg_regs[CFG_ABAXS]; - uint8_t caxs = (dev->cfg_regs[CFG_RAMMAP] & RAMMAP_REMP386) ? 0 : dev->cfg_regs[CFG_CAXS]; - uint8_t daxs = (dev->cfg_regs[CFG_RAMMAP] & RAMMAP_REMP386) ? 0 : dev->cfg_regs[CFG_DAXS]; - uint8_t feaxs = (dev->cfg_regs[CFG_RAMMAP] & RAMMAP_REMP386) ? 0 : dev->cfg_regs[CFG_FEAXS]; - uint32_t ems_enable; + uint8_t abaxs = (dev->cfg_regs[CFG_RAMMAP] & RAMMAP_REMP386) ? 0 : dev->cfg_regs[CFG_ABAXS]; + uint8_t caxs = (dev->cfg_regs[CFG_RAMMAP] & RAMMAP_REMP386) ? 0 : dev->cfg_regs[CFG_CAXS]; + uint8_t daxs = (dev->cfg_regs[CFG_RAMMAP] & RAMMAP_REMP386) ? 0 : dev->cfg_regs[CFG_DAXS]; + uint8_t feaxs = (dev->cfg_regs[CFG_RAMMAP] & RAMMAP_REMP386) ? 0 : dev->cfg_regs[CFG_FEAXS]; + uint32_t ems_enable; - if (dev->cfg_regs[CFG_EMSEN1] & EMSEN1_EMSENAB) { - if (dev->cfg_regs[CFG_EMSEN1] & EMSEN1_EMSMAP) /*Axxx/Bxxx/Dxxx*/ - ems_enable = (dev->cfg_regs[CFG_EMSEN2] & 0xf) | ((dev->cfg_regs[CFG_EMSEN1] & 0xf) << 4) | ((dev->cfg_regs[CFG_EMSEN2] & 0xf0) << 8); - else /*Cxxx/Dxxx/Exxx*/ - ems_enable = (dev->cfg_regs[CFG_EMSEN2] << 8) | ((dev->cfg_regs[CFG_EMSEN1] & 0xf) << 16); - } else - ems_enable = 0; + if (dev->cfg_regs[CFG_EMSEN1] & EMSEN1_EMSENAB) { + if (dev->cfg_regs[CFG_EMSEN1] & EMSEN1_EMSMAP) /*Axxx/Bxxx/Dxxx*/ + ems_enable = (dev->cfg_regs[CFG_EMSEN2] & 0xf) | ((dev->cfg_regs[CFG_EMSEN1] & 0xf) << 4) | ((dev->cfg_regs[CFG_EMSEN2] & 0xf0) << 8); + else /*Cxxx/Dxxx/Exxx*/ + ems_enable = (dev->cfg_regs[CFG_EMSEN2] << 8) | ((dev->cfg_regs[CFG_EMSEN1] & 0xf) << 16); + } else + ems_enable = 0; - /*Enabling remapping will disable all shadowing*/ - if (dev->cfg_regs[CFG_RAMMAP] & RAMMAP_REMP386) - mem_remap_top(384); + /*Enabling remapping will disable all shadowing*/ + if (dev->cfg_regs[CFG_RAMMAP] & RAMMAP_REMP386) + mem_remap_top(384); - shadow_control(0xa0000, 0x4000, abaxs & 3, ems_enable & 0x00001); - shadow_control(0xa0000, 0x4000, abaxs & 3, ems_enable & 0x00002); - shadow_control(0xa8000, 0x4000, (abaxs >> 2) & 3, ems_enable & 0x00004); - shadow_control(0xa8000, 0x4000, (abaxs >> 2) & 3, ems_enable & 0x00008); + shadow_control(0xa0000, 0x4000, abaxs & 3, ems_enable & 0x00001); + shadow_control(0xa0000, 0x4000, abaxs & 3, ems_enable & 0x00002); + shadow_control(0xa8000, 0x4000, (abaxs >> 2) & 3, ems_enable & 0x00004); + shadow_control(0xa8000, 0x4000, (abaxs >> 2) & 3, ems_enable & 0x00008); - shadow_control(0xb0000, 0x4000, (abaxs >> 4) & 3, ems_enable & 0x00010); - shadow_control(0xb0000, 0x4000, (abaxs >> 4) & 3, ems_enable & 0x00020); - shadow_control(0xb8000, 0x4000, (abaxs >> 6) & 3, ems_enable & 0x00040); - shadow_control(0xb8000, 0x4000, (abaxs >> 6) & 3, ems_enable & 0x00080); + shadow_control(0xb0000, 0x4000, (abaxs >> 4) & 3, ems_enable & 0x00010); + shadow_control(0xb0000, 0x4000, (abaxs >> 4) & 3, ems_enable & 0x00020); + shadow_control(0xb8000, 0x4000, (abaxs >> 6) & 3, ems_enable & 0x00040); + shadow_control(0xb8000, 0x4000, (abaxs >> 6) & 3, ems_enable & 0x00080); - shadow_control(0xc0000, 0x4000, caxs & 3, ems_enable & 0x00100); - shadow_control(0xc4000, 0x4000, (caxs >> 2) & 3, ems_enable & 0x00200); - shadow_control(0xc8000, 0x4000, (caxs >> 4) & 3, ems_enable & 0x00400); - shadow_control(0xcc000, 0x4000, (caxs >> 6) & 3, ems_enable & 0x00800); + shadow_control(0xc0000, 0x4000, caxs & 3, ems_enable & 0x00100); + shadow_control(0xc4000, 0x4000, (caxs >> 2) & 3, ems_enable & 0x00200); + shadow_control(0xc8000, 0x4000, (caxs >> 4) & 3, ems_enable & 0x00400); + shadow_control(0xcc000, 0x4000, (caxs >> 6) & 3, ems_enable & 0x00800); - shadow_control(0xd0000, 0x4000, daxs & 3, ems_enable & 0x01000); - shadow_control(0xd4000, 0x4000, (daxs >> 2) & 3, ems_enable & 0x02000); - shadow_control(0xd8000, 0x4000, (daxs >> 4) & 3, ems_enable & 0x04000); - shadow_control(0xdc000, 0x4000, (daxs >> 6) & 3, ems_enable & 0x08000); + shadow_control(0xd0000, 0x4000, daxs & 3, ems_enable & 0x01000); + shadow_control(0xd4000, 0x4000, (daxs >> 2) & 3, ems_enable & 0x02000); + shadow_control(0xd8000, 0x4000, (daxs >> 4) & 3, ems_enable & 0x04000); + shadow_control(0xdc000, 0x4000, (daxs >> 6) & 3, ems_enable & 0x08000); - shadow_control(0xe0000, 0x4000, feaxs & 3, ems_enable & 0x10000); - shadow_control(0xe4000, 0x4000, feaxs & 3, ems_enable & 0x20000); - shadow_control(0xe8000, 0x4000, (feaxs >> 2) & 3, ems_enable & 0x40000); - shadow_control(0xec000, 0x4000, (feaxs >> 2) & 3, ems_enable & 0x80000); + shadow_control(0xe0000, 0x4000, feaxs & 3, ems_enable & 0x10000); + shadow_control(0xe4000, 0x4000, feaxs & 3, ems_enable & 0x20000); + shadow_control(0xe8000, 0x4000, (feaxs >> 2) & 3, ems_enable & 0x40000); + shadow_control(0xec000, 0x4000, (feaxs >> 2) & 3, ems_enable & 0x80000); - shadow_control(0xf0000, 0x8000, (feaxs >> 4) & 3, 0); - shadow_control(0xf8000, 0x8000, (feaxs >> 6) & 3, 0); + shadow_control(0xf0000, 0x8000, (feaxs >> 4) & 3, 0); + shadow_control(0xf8000, 0x8000, (feaxs >> 6) & 3, 0); } static void @@ -712,117 +692,115 @@ scamp_write(uint16_t addr, uint8_t val, void *priv) scamp_t *dev = (scamp_t *) priv; switch (addr) { - case 0xe8: - dev->ems_index = val & 0x1f; - dev->ems_autoinc = val & 0x40; - break; + case 0xe8: + dev->ems_index = val & 0x1f; + dev->ems_autoinc = val & 0x40; + break; - case 0xea: - if (dev->ems_index < 0x24) { - dev->ems[dev->ems_index] = (dev->ems[dev->ems_index] & 0x300) | val; - recalc_ems(dev); - } - break; - case 0xeb: - if (dev->ems_index < 0x24) { - dev->ems[dev->ems_index] = (dev->ems[dev->ems_index] & 0x0ff) | ((val & 3) << 8); - recalc_ems(dev); - } - if (dev->ems_autoinc) - dev->ems_index = (dev->ems_index + 1) & 0x3f; - break; + case 0xea: + if (dev->ems_index < 0x24) { + dev->ems[dev->ems_index] = (dev->ems[dev->ems_index] & 0x300) | val; + recalc_ems(dev); + } + break; + case 0xeb: + if (dev->ems_index < 0x24) { + dev->ems[dev->ems_index] = (dev->ems[dev->ems_index] & 0x0ff) | ((val & 3) << 8); + recalc_ems(dev); + } + if (dev->ems_autoinc) + dev->ems_index = (dev->ems_index + 1) & 0x3f; + break; - case 0xec: - if (dev->cfg_enable) - dev->cfg_index = val; - break; + case 0xec: + if (dev->cfg_enable) + dev->cfg_index = val; + break; - case 0xed: - if (dev->cfg_enable && (dev->cfg_index >= 0x02) && (dev->cfg_index <= 0x16)) { - dev->cfg_regs[dev->cfg_index] = val; - switch (dev->cfg_index) { - case CFG_SLTPTR: - recalc_sltptr(dev); - break; + case 0xed: + if (dev->cfg_enable && (dev->cfg_index >= 0x02) && (dev->cfg_index <= 0x16)) { + dev->cfg_regs[dev->cfg_index] = val; + switch (dev->cfg_index) { + case CFG_SLTPTR: + recalc_sltptr(dev); + break; - case CFG_RAMMAP: - recalc_mappings(dev); - mem_mapping_disable(&ram_remapped_mapping); - shadow_recalc(dev); - break; + case CFG_RAMMAP: + recalc_mappings(dev); + mem_mapping_disable(&ram_remapped_mapping); + shadow_recalc(dev); + break; - case CFG_EMSEN1: - case CFG_EMSEN2: - shadow_recalc(dev); - recalc_ems(dev); - break; + case CFG_EMSEN1: + case CFG_EMSEN2: + shadow_recalc(dev); + recalc_ems(dev); + break; - case CFG_ABAXS: - case CFG_CAXS: - case CFG_DAXS: - case CFG_FEAXS: - shadow_recalc(dev); - break; - } - } - break; + case CFG_ABAXS: + case CFG_CAXS: + case CFG_DAXS: + case CFG_FEAXS: + shadow_recalc(dev); + break; + } + } + break; - case 0xee: - if (dev->cfg_enable && mem_a20_alt) { - dev->port_92->reg &= 0xfd; - mem_a20_alt = 0; - mem_a20_recalc(); - } - break; + case 0xee: + if (dev->cfg_enable && mem_a20_alt) { + dev->port_92->reg &= 0xfd; + mem_a20_alt = 0; + mem_a20_recalc(); + } + break; } } - static uint8_t scamp_read(uint16_t addr, void *priv) { scamp_t *dev = (scamp_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; switch (addr) { - case 0xe8: - ret = dev->ems_index | dev->ems_autoinc; - break; + case 0xe8: + ret = dev->ems_index | dev->ems_autoinc; + break; - case 0xea: - if (dev->ems_index < 0x24) - ret = dev->ems[dev->ems_index] & 0xff; - break; - case 0xeb: - if (dev->ems_index < 0x24) - ret = (dev->ems[dev->ems_index] >> 8) | 0xfc; - if (dev->ems_autoinc) - dev->ems_index = (dev->ems_index + 1) & 0x3f; - break; + case 0xea: + if (dev->ems_index < 0x24) + ret = dev->ems[dev->ems_index] & 0xff; + break; + case 0xeb: + if (dev->ems_index < 0x24) + ret = (dev->ems[dev->ems_index] >> 8) | 0xfc; + if (dev->ems_autoinc) + dev->ems_index = (dev->ems_index + 1) & 0x3f; + break; - case 0xed: - if (dev->cfg_enable && (dev->cfg_index >= 0x00) && (dev->cfg_index <= 0x16)) - ret = (dev->cfg_regs[dev->cfg_index]); - break; + case 0xed: + if (dev->cfg_enable && (dev->cfg_index >= 0x00) && (dev->cfg_index <= 0x16)) + ret = (dev->cfg_regs[dev->cfg_index]); + break; - case 0xee: - if (!mem_a20_alt) { - dev->port_92->reg |= 0x02; - mem_a20_alt = 1; - mem_a20_recalc(); - } - break; + case 0xee: + if (!mem_a20_alt) { + dev->port_92->reg |= 0x02; + mem_a20_alt = 1; + mem_a20_recalc(); + } + break; - case 0xef: - softresetx86(); - cpu_set_edx(); - break; + case 0xef: + softresetx86(); + cpu_set_edx(); + break; } return ret; } - static void scamp_close(void *priv) { @@ -831,124 +809,123 @@ scamp_close(void *priv) free(dev); } - static void * scamp_init(const device_t *info) { uint32_t addr; - int c; - scamp_t *dev = (scamp_t *)malloc(sizeof(scamp_t)); + int c; + scamp_t *dev = (scamp_t *) malloc(sizeof(scamp_t)); memset(dev, 0x00, sizeof(scamp_t)); dev->cfg_regs[CFG_ID] = ID_VL82C311; - dev->cfg_enable = 1; + dev->cfg_enable = 1; io_sethandler(0x00e8, 0x0001, - scamp_read, NULL, NULL, scamp_write, NULL, NULL, dev); + scamp_read, NULL, NULL, scamp_write, NULL, NULL, dev); io_sethandler(0x00ea, 0x0006, - scamp_read, NULL, NULL, scamp_write, NULL, NULL, dev); + scamp_read, NULL, NULL, scamp_write, NULL, NULL, dev); io_sethandler(0x00f4, 0x0002, - scamp_read, NULL, NULL, scamp_write, NULL, NULL, dev); + scamp_read, NULL, NULL, scamp_write, NULL, NULL, dev); io_sethandler(0x00f9, 0x0001, - scamp_read, NULL, NULL, scamp_write, NULL, NULL, dev); + scamp_read, NULL, NULL, scamp_write, NULL, NULL, dev); io_sethandler(0x00fb, 0x0001, - scamp_read, NULL, NULL, scamp_write, NULL, NULL, dev); + scamp_read, NULL, NULL, scamp_write, NULL, NULL, dev); dev->ram_config = 0; /* Find best fit configuration for the requested memory size */ for (c = 0; c < NR_ELEMS(ram_configs); c++) { - if (mem_size < ram_configs[c].size_kb) - break; + if (mem_size < ram_configs[c].size_kb) + break; - dev->ram_config = c; + dev->ram_config = c; } mem_mapping_set_p(&ram_low_mapping, (void *) &dev->ram_struct[0]); mem_mapping_set_handler(&ram_low_mapping, - ram_mirrored_read, NULL, NULL, - ram_mirrored_write, NULL, NULL); + ram_mirrored_read, NULL, NULL, + ram_mirrored_write, NULL, NULL); mem_mapping_disable(&ram_high_mapping); - mem_mapping_set_addr(&ram_mid_mapping, 0xf0000, 0x10000); - mem_mapping_set_exec(&ram_mid_mapping, ram+0xf0000); + mem_mapping_set_addr(&ram_mid_mapping, 0xf0000, 0x10000); + mem_mapping_set_exec(&ram_mid_mapping, ram + 0xf0000); addr = 0; for (c = 0; c < 2; c++) { - dev->ram_struct[c].parent = dev; - dev->ram_struct[c].bank = c; - mem_mapping_add(&dev->ram_mapping[c], 0, 0, - ram_mirrored_read, NULL, NULL, - ram_mirrored_write, NULL, NULL, - &ram[addr], MEM_MAPPING_INTERNAL, (void *) &dev->ram_struct[c]); - mem_mapping_disable(&dev->ram_mapping[c]); + dev->ram_struct[c].parent = dev; + dev->ram_struct[c].bank = c; + mem_mapping_add(&dev->ram_mapping[c], 0, 0, + ram_mirrored_read, NULL, NULL, + ram_mirrored_write, NULL, NULL, + &ram[addr], MEM_MAPPING_INTERNAL, (void *) &dev->ram_struct[c]); + mem_mapping_disable(&dev->ram_mapping[c]); - dev->ram_phys_base[c] = addr; + dev->ram_phys_base[c] = addr; - switch (ram_configs[dev->ram_config].bank[c]) { - case BANK_NONE: - dev->ram_mask[c] = 0; - dev->ram_interleaved[c] = 0; - break; + switch (ram_configs[dev->ram_config].bank[c]) { + case BANK_NONE: + dev->ram_mask[c] = 0; + dev->ram_interleaved[c] = 0; + break; - case BANK_256K: - addr += (1 << 19); - dev->ram_mask[c] = 0x1ff; - dev->row_phys_shift[c] = 10; - dev->ram_interleaved[c] = 0; - break; + case BANK_256K: + addr += (1 << 19); + dev->ram_mask[c] = 0x1ff; + dev->row_phys_shift[c] = 10; + dev->ram_interleaved[c] = 0; + break; - case BANK_256K_INTERLEAVED: - addr += (1 << 20); - dev->ram_mask[c] = 0x1ff; - dev->row_phys_shift[c] = 10; - dev->ibank_shift[c] = 19; - dev->ram_interleaved[c] = 1; - break; + case BANK_256K_INTERLEAVED: + addr += (1 << 20); + dev->ram_mask[c] = 0x1ff; + dev->row_phys_shift[c] = 10; + dev->ibank_shift[c] = 19; + dev->ram_interleaved[c] = 1; + break; - case BANK_1M: - addr += (1 << 21); - dev->ram_mask[c] = 0x3ff; - dev->row_phys_shift[c] = 11; - dev->ram_interleaved[c] = 0; - break; + case BANK_1M: + addr += (1 << 21); + dev->ram_mask[c] = 0x3ff; + dev->row_phys_shift[c] = 11; + dev->ram_interleaved[c] = 0; + break; - case BANK_1M_INTERLEAVED: - addr += (1 << 22); - dev->ram_mask[c] = 0x3ff; - dev->row_phys_shift[c] = 11; - dev->ibank_shift[c] = 21; - dev->ram_interleaved[c] = 1; - break; + case BANK_1M_INTERLEAVED: + addr += (1 << 22); + dev->ram_mask[c] = 0x3ff; + dev->row_phys_shift[c] = 11; + dev->ibank_shift[c] = 21; + dev->ram_interleaved[c] = 1; + break; - case BANK_4M: - addr += (1 << 23); - dev->ram_mask[c] = 0x7ff; - dev->row_phys_shift[c] = 12; - dev->ram_interleaved[c] = 0; - break; + case BANK_4M: + addr += (1 << 23); + dev->ram_mask[c] = 0x7ff; + dev->row_phys_shift[c] = 12; + dev->ram_interleaved[c] = 0; + break; - case BANK_4M_INTERLEAVED: - addr += (1 << 24); - dev->ram_mask[c] = 0x7ff; - dev->row_phys_shift[c] = 12; - dev->ibank_shift[c] = 23; - dev->ram_interleaved[c] = 1; - break; - } + case BANK_4M_INTERLEAVED: + addr += (1 << 24); + dev->ram_mask[c] = 0x7ff; + dev->row_phys_shift[c] = 12; + dev->ibank_shift[c] = 23; + dev->ram_interleaved[c] = 1; + break; + } } mem_set_mem_state(0xfe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - for (c = 0; c < 20; c++) { - dev->ems_struct[c].parent = dev; - dev->ems_struct[c].segment = c; - mem_mapping_add(&dev->ems_mappings[c], - 0xa0000 + c*0x4000, 0x4000, - scamp_ems_read, NULL, NULL, - scamp_ems_write, NULL, NULL, - ram + 0xa0000 + c*0x4000, MEM_MAPPING_INTERNAL, (void *)&dev->ems_struct[c]); - dev->mappings[c] = 0xa0000 + c*0x4000; - } + for (c = 0; c < 20; c++) { + dev->ems_struct[c].parent = dev; + dev->ems_struct[c].segment = c; + mem_mapping_add(&dev->ems_mappings[c], + 0xa0000 + c * 0x4000, 0x4000, + scamp_ems_read, NULL, NULL, + scamp_ems_write, NULL, NULL, + ram + 0xa0000 + c * 0x4000, MEM_MAPPING_INTERNAL, (void *) &dev->ems_struct[c]); + dev->mappings[c] = 0xa0000 + c * 0x4000; + } dev->port_92 = device_add(&port_92_device); @@ -956,15 +933,15 @@ scamp_init(const device_t *info) } const device_t vlsi_scamp_device = { - .name = "VLSI SCAMP", + .name = "VLSI SCAMP", .internal_name = "vlsi_scamp", - .flags = 0, - .local = 0, - .init = scamp_init, - .close = scamp_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = scamp_init, + .close = scamp_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/scat.c b/src/chipset/scat.c index 1e7ba9263..7b5a1d37d 100644 --- a/src/chipset/scat.c +++ b/src/chipset/scat.c @@ -34,21 +34,20 @@ #include <86box/rom.h> #include <86box/chipset.h> - -#define SCAT_DMA_WAIT_STATE_CONTROL 0x01 -#define SCAT_VERSION 0x40 -#define SCAT_CLOCK_CONTROL 0x41 -#define SCAT_PERIPHERAL_CONTROL 0x44 -#define SCAT_MISCELLANEOUS_STATUS 0x45 -#define SCAT_POWER_MANAGEMENT 0x46 -#define SCAT_ROM_ENABLE 0x48 -#define SCAT_RAM_WRITE_PROTECT 0x49 -#define SCAT_SHADOW_RAM_ENABLE_1 0x4A -#define SCAT_SHADOW_RAM_ENABLE_2 0x4B -#define SCAT_SHADOW_RAM_ENABLE_3 0x4C -#define SCAT_DRAM_CONFIGURATION 0x4D -#define SCAT_EXTENDED_BOUNDARY 0x4E -#define SCAT_EMS_CONTROL 0x4F +#define SCAT_DMA_WAIT_STATE_CONTROL 0x01 +#define SCAT_VERSION 0x40 +#define SCAT_CLOCK_CONTROL 0x41 +#define SCAT_PERIPHERAL_CONTROL 0x44 +#define SCAT_MISCELLANEOUS_STATUS 0x45 +#define SCAT_POWER_MANAGEMENT 0x46 +#define SCAT_ROM_ENABLE 0x48 +#define SCAT_RAM_WRITE_PROTECT 0x49 +#define SCAT_SHADOW_RAM_ENABLE_1 0x4A +#define SCAT_SHADOW_RAM_ENABLE_2 0x4B +#define SCAT_SHADOW_RAM_ENABLE_3 0x4C +#define SCAT_DRAM_CONFIGURATION 0x4D +#define SCAT_EXTENDED_BOUNDARY 0x4E +#define SCAT_EMS_CONTROL 0x4F #define SCATSX_LAPTOP_FEATURES 0x60 #define SCATSX_FAST_VIDEO_CONTROL 0x61 @@ -56,36 +55,34 @@ #define SCATSX_HIGH_PERFORMANCE_REFRESH 0x63 #define SCATSX_CAS_TIMING_FOR_DMA 0x64 - typedef struct { - uint8_t valid, pad; + uint8_t valid, pad; - uint8_t regs_2x8; - uint8_t regs_2x9; + uint8_t regs_2x8; + uint8_t regs_2x9; - struct scat_t * scat; + struct scat_t *scat; } ems_page_t; typedef struct scat_t { - int type; + int type; - int indx; - uint8_t regs[256]; - uint8_t reg_2xA; + int indx; + uint8_t regs[256]; + uint8_t reg_2xA; - uint32_t xms_bound; + uint32_t xms_bound; - int external_is_RAS; + int external_is_RAS; - ems_page_t null_page, page[32]; + ems_page_t null_page, page[32]; - mem_mapping_t low_mapping[32]; - mem_mapping_t remap_mapping[6]; - mem_mapping_t efff_mapping[44]; - mem_mapping_t ems_mapping[32]; + mem_mapping_t low_mapping[32]; + mem_mapping_t remap_mapping[6]; + mem_mapping_t efff_mapping[44]; + mem_mapping_t ems_mapping[32]; } scat_t; - static const uint8_t max_map[32] = { 0, 1, 1, 1, 2, 3, 4, 8, 4, 8, 12, 16, 20, 24, 28, 32, @@ -106,10 +103,8 @@ static const uint8_t scatsx_external_is_RAS[33] = { 0 }; - -static uint8_t scat_in(uint16_t port, void *priv); -static void scat_out(uint16_t port, uint8_t val, void *priv); - +static uint8_t scat_in(uint16_t port, void *priv); +static void scat_out(uint16_t port, uint8_t val, void *priv); static void shadow_state_update(scat_t *dev) @@ -121,901 +116,885 @@ shadow_state_update(scat_t *dev) shadowbios = shadowbios_write = 0; for (i = 0; i < 24; i++) { - if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0xf) < 4) - val = 0; - else - val = (dev->regs[SCAT_SHADOW_RAM_ENABLE_1 + (i >> 3)] >> (i & 7)) & 1; + if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0xf) < 4) + val = 0; + else + val = (dev->regs[SCAT_SHADOW_RAM_ENABLE_1 + (i >> 3)] >> (i & 7)) & 1; - base = 0xa0000 + (i << 14); - bit = (base - 0xc0000) >> 15; - romcs = 0; + base = 0xa0000 + (i << 14); + bit = (base - 0xc0000) >> 15; + romcs = 0; - if (base >= 0xc0000) - romcs = dev->regs[SCAT_ROM_ENABLE] & (1 << bit); + if (base >= 0xc0000) + romcs = dev->regs[SCAT_ROM_ENABLE] & (1 << bit); - if (base >= 0xe0000) { - shadowbios |= val; - shadowbios_write |= val; - } + if (base >= 0xe0000) { + shadowbios |= val; + shadowbios_write |= val; + } - shflags = val ? MEM_READ_INTERNAL : (romcs ? MEM_READ_EXTANY : MEM_READ_EXTERNAL); - shflags |= (val ? MEM_WRITE_INTERNAL : (romcs ? MEM_WRITE_EXTANY : MEM_WRITE_EXTERNAL)); + shflags = val ? MEM_READ_INTERNAL : (romcs ? MEM_READ_EXTANY : MEM_READ_EXTERNAL); + shflags |= (val ? MEM_WRITE_INTERNAL : (romcs ? MEM_WRITE_EXTANY : MEM_WRITE_EXTERNAL)); - mem_set_mem_state(base, 0x4000, shflags); + mem_set_mem_state(base, 0x4000, shflags); } flushmmucache(); } - static void set_xms_bound(scat_t *dev, uint8_t val) { uint32_t xms_max = ((dev->regs[SCAT_VERSION] & 0xf0) != 0 && ((val & 0x10) != 0)) || (dev->regs[SCAT_VERSION] >= 4) ? 0xfe0000 : 0xfc0000; - int i; + int i; switch (val & 0x0f) { - case 1: - dev->xms_bound = 0x100000; - break; + case 1: + dev->xms_bound = 0x100000; + break; - case 2: - dev->xms_bound = 0x140000; - break; + case 2: + dev->xms_bound = 0x140000; + break; - case 3: - dev->xms_bound = 0x180000; - break; + case 3: + dev->xms_bound = 0x180000; + break; - case 4: - dev->xms_bound = 0x200000; - break; + case 4: + dev->xms_bound = 0x200000; + break; - case 5: - dev->xms_bound = 0x300000; - break; + case 5: + dev->xms_bound = 0x300000; + break; - case 6: - dev->xms_bound = 0x400000; - break; + case 6: + dev->xms_bound = 0x400000; + break; - case 7: - dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0x600000 : 0x500000; - break; + case 7: + dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0x600000 : 0x500000; + break; - case 8: - dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0x800000 : 0x700000; - break; + case 8: + dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0x800000 : 0x700000; + break; - case 9: - dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0xa00000 : 0x800000; - break; + case 9: + dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0xa00000 : 0x800000; + break; - case 10: - dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0xc00000 : 0x900000; - break; + case 10: + dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0xc00000 : 0x900000; + break; - case 11: - dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0xe00000 : 0xa00000; - break; + case 11: + dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0xe00000 : 0xa00000; + break; - case 12: - dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? xms_max : 0xb00000; - break; + case 12: + dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? xms_max : 0xb00000; + break; - case 13: - dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? xms_max : 0xc00000; - break; + case 13: + dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? xms_max : 0xc00000; + break; - case 14: - dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? xms_max : 0xd00000; - break; + case 14: + dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? xms_max : 0xd00000; + break; - case 15: - dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? xms_max : 0xf00000; - break; + case 15: + dev->xms_bound = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? xms_max : 0xf00000; + break; - default: - dev->xms_bound = xms_max; - break; + default: + dev->xms_bound = xms_max; + break; } - if ((((dev->regs[SCAT_VERSION] & 0xf0) == 0) && (val & 0x40) == 0 && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) == 3) || - (((dev->regs[SCAT_VERSION] & 0xf0) != 0) && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 3)) { - if ((val & 0x0f) == 0 || dev->xms_bound > 0x160000) - dev->xms_bound = 0x160000; + if ((((dev->regs[SCAT_VERSION] & 0xf0) == 0) && (val & 0x40) == 0 && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) == 3) || (((dev->regs[SCAT_VERSION] & 0xf0) != 0) && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 3)) { + if ((val & 0x0f) == 0 || dev->xms_bound > 0x160000) + dev->xms_bound = 0x160000; - if (dev->xms_bound > 0x100000) - mem_set_mem_state(0x100000, dev->xms_bound - 0x100000, - MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + if (dev->xms_bound > 0x100000) + mem_set_mem_state(0x100000, dev->xms_bound - 0x100000, + MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - if (dev->xms_bound < 0x160000) - mem_set_mem_state(dev->xms_bound, 0x160000 - dev->xms_bound, - MEM_READ_EXTANY | MEM_WRITE_EXTANY); + if (dev->xms_bound < 0x160000) + mem_set_mem_state(dev->xms_bound, 0x160000 - dev->xms_bound, + MEM_READ_EXTANY | MEM_WRITE_EXTANY); } else { - if (dev->xms_bound > xms_max) - dev->xms_bound = xms_max; + if (dev->xms_bound > xms_max) + dev->xms_bound = xms_max; - if (dev->xms_bound > 0x100000) - mem_set_mem_state(0x100000, dev->xms_bound - 0x100000, - MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + if (dev->xms_bound > 0x100000) + mem_set_mem_state(0x100000, dev->xms_bound - 0x100000, + MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - if (dev->xms_bound < ((uint32_t)mem_size << 10)) - mem_set_mem_state(dev->xms_bound, (mem_size << 10) - dev->xms_bound, - MEM_READ_EXTANY | MEM_WRITE_EXTANY); + if (dev->xms_bound < ((uint32_t) mem_size << 10)) + mem_set_mem_state(dev->xms_bound, (mem_size << 10) - dev->xms_bound, + MEM_READ_EXTANY | MEM_WRITE_EXTANY); } mem_mapping_set_addr(&dev->low_mapping[31], 0xf80000, - ((dev->regs[SCAT_VERSION] & 0xf0) != 0 && ((val & 0x10) != 0)) || - (dev->regs[SCAT_VERSION] >= 4) ? 0x60000 : 0x40000); + ((dev->regs[SCAT_VERSION] & 0xf0) != 0 && ((val & 0x10) != 0)) || (dev->regs[SCAT_VERSION] >= 4) ? 0x60000 : 0x40000); if (dev->regs[SCAT_VERSION] & 0xf0) { - for (i = 0; i < 8; i++) { - if (val & 0x10) - mem_mapping_disable(&bios_high_mapping); - else - mem_mapping_enable(&bios_high_mapping); - } + for (i = 0; i < 8; i++) { + if (val & 0x10) + mem_mapping_disable(&bios_high_mapping); + else + mem_mapping_enable(&bios_high_mapping); + } } } - static uint32_t get_addr(scat_t *dev, uint32_t addr, ems_page_t *p) { #if 1 - int nbanks_2048k, nbanks_512k; + int nbanks_2048k, nbanks_512k; uint32_t addr2; - int nbank; + int nbank; #else uint32_t nbanks_2048k, nbanks_512k, addr2, nbank; #endif if (p && p->valid && (dev->regs[SCAT_EMS_CONTROL] & 0x80) && (p->regs_2x9 & 0x80)) - addr = (addr & 0x3fff) | (((p->regs_2x9 & 3) << 8) | p->regs_2x8) << 14; + addr = (addr & 0x3fff) | (((p->regs_2x9 & 3) << 8) | p->regs_2x8) << 14; if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) { - switch((dev->regs[SCAT_EXTENDED_BOUNDARY] & ((dev->regs[SCAT_VERSION] & 0x0f) > 3 ? 0x40 : 0)) | (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f)) { - case 0x41: - nbank = addr >> 19; - if (nbank < 4) - nbank = 1; - else if (nbank == 4) - nbank = 0; - else - nbank -= 3; - break; + switch ((dev->regs[SCAT_EXTENDED_BOUNDARY] & ((dev->regs[SCAT_VERSION] & 0x0f) > 3 ? 0x40 : 0)) | (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f)) { + case 0x41: + nbank = addr >> 19; + if (nbank < 4) + nbank = 1; + else if (nbank == 4) + nbank = 0; + else + nbank -= 3; + break; - case 0x42: - nbank = addr >> 19; - if (nbank < 8) - nbank = 1 + (nbank >> 2); - else if (nbank == 8) - nbank = 0; - else - nbank -= 6; - break; + case 0x42: + nbank = addr >> 19; + if (nbank < 8) + nbank = 1 + (nbank >> 2); + else if (nbank == 8) + nbank = 0; + else + nbank -= 6; + break; - case 0x43: - nbank = addr >> 19; - if (nbank < 12) - nbank = 1 + (nbank >> 2); - else if (nbank == 12) - nbank = 0; - else - nbank -= 9; - break; + case 0x43: + nbank = addr >> 19; + if (nbank < 12) + nbank = 1 + (nbank >> 2); + else if (nbank == 12) + nbank = 0; + else + nbank -= 9; + break; - case 0x44: - nbank = addr >> 19; - if (nbank < 4) - nbank = 2; - else if (nbank < 6) - nbank -= 4; - else - nbank -= 3; - break; + case 0x44: + nbank = addr >> 19; + if (nbank < 4) + nbank = 2; + else if (nbank < 6) + nbank -= 4; + else + nbank -= 3; + break; - case 0x45: - nbank = addr >> 19; - if (nbank < 8) - nbank = 2 + (nbank >> 2); - else if (nbank < 10) - nbank -= 8; - else - nbank -= 6; - break; + case 0x45: + nbank = addr >> 19; + if (nbank < 8) + nbank = 2 + (nbank >> 2); + else if (nbank < 10) + nbank -= 8; + else + nbank -= 6; + break; - default: - nbank = addr >> (((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) < 8 && (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40) == 0) ? 19 : 21); - break; - } + default: + nbank = addr >> (((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) < 8 && (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40) == 0) ? 19 : 21); + break; + } - nbank &= (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80) ? 7 : 3; + nbank &= (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80) ? 7 : 3; - if ((dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40) == 0 && - (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) == 3 && - nbank == 2 && (addr & 0x7ffff) < 0x60000 && mem_size > 640) { - nbank = 1; - addr ^= 0x70000; - } + if ((dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40) == 0 && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) == 3 && nbank == 2 && (addr & 0x7ffff) < 0x60000 && mem_size > 640) { + nbank = 1; + addr ^= 0x70000; + } - if (dev->external_is_RAS && (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80) == 0) { - if (nbank == 3) - nbank = 7; - else - return 0xffffffff; - } else if (!dev->external_is_RAS && dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80) { - switch(nbank) { - case 7: - nbank = 3; - break; + if (dev->external_is_RAS && (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80) == 0) { + if (nbank == 3) + nbank = 7; + else + return 0xffffffff; + } else if (!dev->external_is_RAS && dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80) { + switch (nbank) { + case 7: + nbank = 3; + break; - /* Note - In the following cases, the chipset accesses multiple memory banks - at the same time, so it's impossible to predict which memory bank - is actually accessed. */ - case 5: - case 1: - nbank = 1; - break; + /* Note - In the following cases, the chipset accesses multiple memory banks + at the same time, so it's impossible to predict which memory bank + is actually accessed. */ + case 5: + case 1: + nbank = 1; + break; - case 3: - nbank = 2; - break; + case 3: + nbank = 2; + break; - default: - nbank = 0; - break; - } - } + default: + nbank = 0; + break; + } + } - if ((dev->regs[SCAT_VERSION] & 0x0f) > 3 && (mem_size > 2048) && (mem_size & 1536)) { - if ((mem_size & 1536) == 512) { - if (nbank == 0) - addr &= 0x7ffff; - else - addr = 0x80000 + ((addr & 0x1fffff) | ((nbank - 1) << 21)); - } else { - if (nbank < 2) - addr = (addr & 0x7ffff) | (nbank << 19); - else - addr = 0x100000 + ((addr & 0x1fffff) | ((nbank - 2) << 21)); - } - } else { - if (mem_size <= ((dev->regs[SCAT_VERSION] & 0x0f) > 3 ? 2048 : 4096) && (((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) < 8) || dev->external_is_RAS)) { - nbanks_2048k = 0; - nbanks_512k = mem_size >> 9; - } else { - nbanks_2048k = mem_size >> 11; - nbanks_512k = (mem_size & 1536) >> 9; - } + if ((dev->regs[SCAT_VERSION] & 0x0f) > 3 && (mem_size > 2048) && (mem_size & 1536)) { + if ((mem_size & 1536) == 512) { + if (nbank == 0) + addr &= 0x7ffff; + else + addr = 0x80000 + ((addr & 0x1fffff) | ((nbank - 1) << 21)); + } else { + if (nbank < 2) + addr = (addr & 0x7ffff) | (nbank << 19); + else + addr = 0x100000 + ((addr & 0x1fffff) | ((nbank - 2) << 21)); + } + } else { + if (mem_size <= ((dev->regs[SCAT_VERSION] & 0x0f) > 3 ? 2048 : 4096) && (((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) < 8) || dev->external_is_RAS)) { + nbanks_2048k = 0; + nbanks_512k = mem_size >> 9; + } else { + nbanks_2048k = mem_size >> 11; + nbanks_512k = (mem_size & 1536) >> 9; + } - if (nbank < nbanks_2048k || (nbanks_2048k > 0 && nbank >= nbanks_2048k + nbanks_512k + ((mem_size & 511) >> 7))) { - addr &= 0x1fffff; - addr |= (nbank << 21); - } else if (nbank < nbanks_2048k + nbanks_512k || nbank >= nbanks_2048k + nbanks_512k + ((mem_size & 511) >> 7)) { - addr &= 0x7ffff; - addr |= (nbanks_2048k << 21) | ((nbank - nbanks_2048k) << 19); - } else { - addr &= 0x1ffff; - addr |= (nbanks_2048k << 21) | (nbanks_512k << 19) | ((nbank - nbanks_2048k - nbanks_512k) << 17); - } - } + if (nbank < nbanks_2048k || (nbanks_2048k > 0 && nbank >= nbanks_2048k + nbanks_512k + ((mem_size & 511) >> 7))) { + addr &= 0x1fffff; + addr |= (nbank << 21); + } else if (nbank < nbanks_2048k + nbanks_512k || nbank >= nbanks_2048k + nbanks_512k + ((mem_size & 511) >> 7)) { + addr &= 0x7ffff; + addr |= (nbanks_2048k << 21) | ((nbank - nbanks_2048k) << 19); + } else { + addr &= 0x1ffff; + addr |= (nbanks_2048k << 21) | (nbanks_512k << 19) | ((nbank - nbanks_2048k - nbanks_512k) << 17); + } + } } else { - switch(dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) { - case 0x02: - case 0x04: - nbank = addr >> 19; - if ((nbank & (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80 ? 7 : 3)) < 2) { - nbank = (addr >> 10) & 1; - addr2 = addr >> 11; - } else - addr2 = addr >> 10; - break; + switch (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) { + case 0x02: + case 0x04: + nbank = addr >> 19; + if ((nbank & (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80 ? 7 : 3)) < 2) { + nbank = (addr >> 10) & 1; + addr2 = addr >> 11; + } else + addr2 = addr >> 10; + break; - case 0x03: - nbank = addr >> 19; - if ((nbank & (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80 ? 7 : 3)) < 2) { - nbank = (addr >> 10) & 1; - addr2 = addr >> 11; - } else if ((nbank & (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80 ? 7 : 3)) == 2 && (addr & 0x7ffff) < 0x60000) { - addr ^= 0x1f0000; - nbank = (addr >> 10) & 1; - addr2 = addr >> 11; - } else - addr2 = addr >> 10; - break; + case 0x03: + nbank = addr >> 19; + if ((nbank & (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80 ? 7 : 3)) < 2) { + nbank = (addr >> 10) & 1; + addr2 = addr >> 11; + } else if ((nbank & (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80 ? 7 : 3)) == 2 && (addr & 0x7ffff) < 0x60000) { + addr ^= 0x1f0000; + nbank = (addr >> 10) & 1; + addr2 = addr >> 11; + } else + addr2 = addr >> 10; + break; - case 0x05: - nbank = addr >> 19; - if ((nbank & (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80 ? 7 : 3)) < 4) { - nbank = (addr >> 10) & 3; - addr2 = addr >> 12; - } else - addr2 = addr >> 10; - break; + case 0x05: + nbank = addr >> 19; + if ((nbank & (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80 ? 7 : 3)) < 4) { + nbank = (addr >> 10) & 3; + addr2 = addr >> 12; + } else + addr2 = addr >> 10; + break; - case 0x06: - nbank = addr >> 19; - if (nbank < 2) { - nbank = (addr >> 10) & 1; - addr2 = addr >> 11; - } else { - nbank = 2 + ((addr - 0x100000) >> 21); - addr2 = (addr - 0x100000) >> 11; - } - break; + case 0x06: + nbank = addr >> 19; + if (nbank < 2) { + nbank = (addr >> 10) & 1; + addr2 = addr >> 11; + } else { + nbank = 2 + ((addr - 0x100000) >> 21); + addr2 = (addr - 0x100000) >> 11; + } + break; - case 0x07: - case 0x0f: - nbank = addr >> 19; - if (nbank < 2) { - nbank = (addr >> 10) & 1; - addr2 = addr >> 11; - } else if (nbank < 10) { - nbank = 2 + (((addr - 0x100000) >> 11) & 1); - addr2 = (addr - 0x100000) >> 12; - } else { - nbank = 4 + ((addr - 0x500000) >> 21); - addr2 = (addr - 0x500000) >> 11; - } - break; + case 0x07: + case 0x0f: + nbank = addr >> 19; + if (nbank < 2) { + nbank = (addr >> 10) & 1; + addr2 = addr >> 11; + } else if (nbank < 10) { + nbank = 2 + (((addr - 0x100000) >> 11) & 1); + addr2 = (addr - 0x100000) >> 12; + } else { + nbank = 4 + ((addr - 0x500000) >> 21); + addr2 = (addr - 0x500000) >> 11; + } + break; - case 0x08: - nbank = addr >> 19; - if (nbank < 4) { - nbank = 1; - addr2 = addr >> 11; - } else if (nbank == 4) { - nbank = 0; - addr2 = addr >> 10; - } else { - nbank -= 3; - addr2 = addr >> 10; - } - break; + case 0x08: + nbank = addr >> 19; + if (nbank < 4) { + nbank = 1; + addr2 = addr >> 11; + } else if (nbank == 4) { + nbank = 0; + addr2 = addr >> 10; + } else { + nbank -= 3; + addr2 = addr >> 10; + } + break; - case 0x09: - nbank = addr >> 19; - if (nbank < 8) { - nbank = 1 + ((addr >> 11) & 1); - addr2 = addr >> 12; - } else if (nbank == 8) { - nbank = 0; - addr2 = addr >> 10; - } else { - nbank -= 6; - addr2 = addr >> 10; - } - break; + case 0x09: + nbank = addr >> 19; + if (nbank < 8) { + nbank = 1 + ((addr >> 11) & 1); + addr2 = addr >> 12; + } else if (nbank == 8) { + nbank = 0; + addr2 = addr >> 10; + } else { + nbank -= 6; + addr2 = addr >> 10; + } + break; - case 0x0a: - nbank = addr >> 19; - if (nbank < 8) { - nbank = 1 + ((addr >> 11) & 1); - addr2 = addr >> 12; - } else if (nbank < 12) { - nbank = 3; - addr2 = addr >> 11; - } else if (nbank == 12) { - nbank = 0; - addr2 = addr >> 10; - } else { - nbank -= 9; - addr2 = addr >> 10; - } - break; + case 0x0a: + nbank = addr >> 19; + if (nbank < 8) { + nbank = 1 + ((addr >> 11) & 1); + addr2 = addr >> 12; + } else if (nbank < 12) { + nbank = 3; + addr2 = addr >> 11; + } else if (nbank == 12) { + nbank = 0; + addr2 = addr >> 10; + } else { + nbank -= 9; + addr2 = addr >> 10; + } + break; - case 0x0b: - nbank = addr >> 21; - addr2 = addr >> 11; - break; + case 0x0b: + nbank = addr >> 21; + addr2 = addr >> 11; + break; - case 0x0c: - case 0x0d: - nbank = addr >> 21; - if ((nbank & (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80 ? 7 : 3)) < 2) { - nbank = (addr >> 11) & 1; - addr2 = addr >> 12; - } else - addr2 = addr >> 11; - break; + case 0x0c: + case 0x0d: + nbank = addr >> 21; + if ((nbank & (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80 ? 7 : 3)) < 2) { + nbank = (addr >> 11) & 1; + addr2 = addr >> 12; + } else + addr2 = addr >> 11; + break; - case 0x0e: - case 0x13: - nbank = addr >> 21; - if ((nbank & (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80 ? 7 : 3)) < 4) { - nbank = (addr >> 11) & 3; - addr2 = addr >> 13; - } else - addr2 = addr >> 11; - break; + case 0x0e: + case 0x13: + nbank = addr >> 21; + if ((nbank & (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80 ? 7 : 3)) < 4) { + nbank = (addr >> 11) & 3; + addr2 = addr >> 13; + } else + addr2 = addr >> 11; + break; - case 0x10: - case 0x11: - nbank = addr >> 19; - if (nbank < 2) { - nbank = (addr >> 10) & 1; - addr2 = addr >> 11; - } else if (nbank < 10) { - nbank = 2 + (((addr - 0x100000) >> 11) & 1); - addr2 = (addr - 0x100000) >> 12; - } else if (nbank < 18) { - nbank = 4 + (((addr - 0x500000) >> 11) & 1); - addr2 = (addr - 0x500000) >> 12; - } else { - nbank = 6 + ((addr - 0x900000) >> 21); - addr2 = (addr - 0x900000) >> 11; - } - break; + case 0x10: + case 0x11: + nbank = addr >> 19; + if (nbank < 2) { + nbank = (addr >> 10) & 1; + addr2 = addr >> 11; + } else if (nbank < 10) { + nbank = 2 + (((addr - 0x100000) >> 11) & 1); + addr2 = (addr - 0x100000) >> 12; + } else if (nbank < 18) { + nbank = 4 + (((addr - 0x500000) >> 11) & 1); + addr2 = (addr - 0x500000) >> 12; + } else { + nbank = 6 + ((addr - 0x900000) >> 21); + addr2 = (addr - 0x900000) >> 11; + } + break; - case 0x12: - nbank = addr >> 19; - if (nbank < 2) { - nbank = (addr >> 10) & 1; - addr2 = addr >> 11; - } else if (nbank < 10) { - nbank = 2 + (((addr - 0x100000) >> 11) & 1); - addr2 = (addr - 0x100000) >> 12; - } else { - nbank = 4 + (((addr - 0x500000) >> 11) & 3); - addr2 = (addr - 0x500000) >> 13; - } - break; + case 0x12: + nbank = addr >> 19; + if (nbank < 2) { + nbank = (addr >> 10) & 1; + addr2 = addr >> 11; + } else if (nbank < 10) { + nbank = 2 + (((addr - 0x100000) >> 11) & 1); + addr2 = (addr - 0x100000) >> 12; + } else { + nbank = 4 + (((addr - 0x500000) >> 11) & 3); + addr2 = (addr - 0x500000) >> 13; + } + break; - case 0x14: - case 0x15: - nbank = addr >> 21; - if ((nbank & 7) < 4) { - nbank = (addr >> 11) & 3; - addr2 = addr >> 13; - } else if ((nbank & 7) < 6) { - nbank = 4 + (((addr - 0x800000) >> 11) & 1); - addr2 = (addr - 0x800000) >> 12; - } else { - nbank = 6 + (((addr - 0xc00000) >> 11) & 3); - addr2 = (addr - 0xc00000) >> 13; - } - break; + case 0x14: + case 0x15: + nbank = addr >> 21; + if ((nbank & 7) < 4) { + nbank = (addr >> 11) & 3; + addr2 = addr >> 13; + } else if ((nbank & 7) < 6) { + nbank = 4 + (((addr - 0x800000) >> 11) & 1); + addr2 = (addr - 0x800000) >> 12; + } else { + nbank = 6 + (((addr - 0xc00000) >> 11) & 3); + addr2 = (addr - 0xc00000) >> 13; + } + break; - case 0x16: - nbank = ((addr >> 21) & 4) | ((addr >> 11) & 3); - addr2 = addr >> 13; - break; + case 0x16: + nbank = ((addr >> 21) & 4) | ((addr >> 11) & 3); + addr2 = addr >> 13; + break; - case 0x17: - if (dev->external_is_RAS && (addr & 0x800) == 0) - return 0xffffffff; - nbank = addr >> 19; - if (nbank < 2) { - nbank = (addr >> 10) & 1; - addr2 = addr >> 11; - } else { - nbank = 2 + ((addr - 0x100000) >> 23); - addr2 = (addr - 0x100000) >> 12; - } - break; + case 0x17: + if (dev->external_is_RAS && (addr & 0x800) == 0) + return 0xffffffff; + nbank = addr >> 19; + if (nbank < 2) { + nbank = (addr >> 10) & 1; + addr2 = addr >> 11; + } else { + nbank = 2 + ((addr - 0x100000) >> 23); + addr2 = (addr - 0x100000) >> 12; + } + break; - case 0x18: - if (dev->external_is_RAS && (addr & 0x800) == 0) - return 0xffffffff; - nbank = addr >> 21; - if (nbank < 4) { - nbank = 1; - addr2 = addr >> 12; - } else if (nbank == 4) { - nbank = 0; - addr2 = addr >> 11; - } else { - nbank -= 3; - addr2 = addr >> 11; - } - break; + case 0x18: + if (dev->external_is_RAS && (addr & 0x800) == 0) + return 0xffffffff; + nbank = addr >> 21; + if (nbank < 4) { + nbank = 1; + addr2 = addr >> 12; + } else if (nbank == 4) { + nbank = 0; + addr2 = addr >> 11; + } else { + nbank -= 3; + addr2 = addr >> 11; + } + break; - case 0x19: - if (dev->external_is_RAS && (addr & 0x800) == 0) - return 0xffffffff; - nbank = addr >> 23; - if ((nbank & 3) < 2) { - nbank = (addr >> 12) & 1; - addr2 = addr >> 13; - } else - addr2 = addr >> 12; - break; + case 0x19: + if (dev->external_is_RAS && (addr & 0x800) == 0) + return 0xffffffff; + nbank = addr >> 23; + if ((nbank & 3) < 2) { + nbank = (addr >> 12) & 1; + addr2 = addr >> 13; + } else + addr2 = addr >> 12; + break; - default: - if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) < 6) { - nbank = addr >> 19; - addr2 = (addr >> 10) & 0x1ff; - } else if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) < 0x17) { - nbank = addr >> 21; - addr2 = (addr >> 11) & 0x3ff; - } else { - nbank = addr >> 23; - addr2 = (addr >> 12) & 0x7ff; - } - break; - } + default: + if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) < 6) { + nbank = addr >> 19; + addr2 = (addr >> 10) & 0x1ff; + } else if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) < 0x17) { + nbank = addr >> 21; + addr2 = (addr >> 11) & 0x3ff; + } else { + nbank = addr >> 23; + addr2 = (addr >> 12) & 0x7ff; + } + break; + } - nbank &= (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80) ? 7 : 3; + nbank &= (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80) ? 7 : 3; - if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) > 0x16 && nbank == 3) - return 0xffffffff; + if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) > 0x16 && nbank == 3) + return 0xffffffff; - if (dev->external_is_RAS && (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80) == 0) { - if (nbank == 3) - nbank = 7; - else - return 0xffffffff; - } else if (!dev->external_is_RAS && dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80) { - switch(nbank) { - case 7: - nbank = 3; - break; + if (dev->external_is_RAS && (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80) == 0) { + if (nbank == 3) + nbank = 7; + else + return 0xffffffff; + } else if (!dev->external_is_RAS && dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x80) { + switch (nbank) { + case 7: + nbank = 3; + break; - /* Note - In the following cases, the chipset accesses multiple memory banks - at the same time, so it's impossible to predict which memory bank - is actually accessed. */ - case 5: - case 1: - nbank = 1; - break; + /* Note - In the following cases, the chipset accesses multiple memory banks + at the same time, so it's impossible to predict which memory bank + is actually accessed. */ + case 5: + case 1: + nbank = 1; + break; - case 3: - nbank = 2; - break; + case 3: + nbank = 2; + break; - default: - nbank = 0; - break; - } - } + default: + nbank = 0; + break; + } + } - switch(mem_size & ~511) { - case 1024: - case 1536: - addr &= 0x3ff; - if (nbank < 2) - addr |= (nbank << 10) | ((addr2 & 0x1ff) << 11); - else - addr |= ((addr2 & 0x1ff) << 10) | (nbank << 19); - break; + switch (mem_size & ~511) { + case 1024: + case 1536: + addr &= 0x3ff; + if (nbank < 2) + addr |= (nbank << 10) | ((addr2 & 0x1ff) << 11); + else + addr |= ((addr2 & 0x1ff) << 10) | (nbank << 19); + break; - case 2048: - if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 5) { - addr &= 0x3ff; - if (nbank < 4) - addr |= (nbank << 10) | ((addr2 & 0x1ff) << 12); - else - addr |= ((addr2 & 0x1ff) << 10) | (nbank << 19); - } else { - addr &= 0x7ff; - addr |= ((addr2 & 0x3ff) << 11) | (nbank << 21); - } - break; + case 2048: + if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 5) { + addr &= 0x3ff; + if (nbank < 4) + addr |= (nbank << 10) | ((addr2 & 0x1ff) << 12); + else + addr |= ((addr2 & 0x1ff) << 10) | (nbank << 19); + } else { + addr &= 0x7ff; + addr |= ((addr2 & 0x3ff) << 11) | (nbank << 21); + } + break; - case 2560: - if (nbank == 0) - addr = (addr & 0x3ff) | ((addr2 & 0x1ff) << 10); - else { - addr &= 0x7ff; - addr2 &= 0x3ff; - addr = addr + 0x80000 + ((addr2 << 11) | ((nbank - 1) << 21)); - } - break; + case 2560: + if (nbank == 0) + addr = (addr & 0x3ff) | ((addr2 & 0x1ff) << 10); + else { + addr &= 0x7ff; + addr2 &= 0x3ff; + addr = addr + 0x80000 + ((addr2 << 11) | ((nbank - 1) << 21)); + } + break; - case 3072: - if (nbank < 2) - addr = (addr & 0x3ff) | (nbank << 10) | ((addr2 & 0x1ff) << 11); - else - addr = 0x100000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 11) | ((nbank - 2) << 21)); - break; + case 3072: + if (nbank < 2) + addr = (addr & 0x3ff) | (nbank << 10) | ((addr2 & 0x1ff) << 11); + else + addr = 0x100000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 11) | ((nbank - 2) << 21)); + break; - case 4096: - case 6144: - addr &= 0x7ff; - if (nbank < 2) - addr |= (nbank << 11) | ((addr2 & 0x3ff) << 12); - else - addr |= ((addr2 & 0x3ff) << 11) | (nbank << 21); - break; + case 4096: + case 6144: + addr &= 0x7ff; + if (nbank < 2) + addr |= (nbank << 11) | ((addr2 & 0x3ff) << 12); + else + addr |= ((addr2 & 0x3ff) << 11) | (nbank << 21); + break; - case 4608: - if (((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) >= 8 && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) <= 0x0a) || ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 0x18)) { - if (nbank == 0) - addr = (addr & 0x3ff) | ((addr2 & 0x1ff) << 10); - else if (nbank < 3) - addr = 0x80000 + ((addr & 0x7ff) | ((nbank - 1) << 11) | ((addr2 & 0x3ff) << 12)); - else - addr = 0x480000 + ((addr & 0x3ff) | ((addr2 & 0x1ff) << 10) | ((nbank - 3) << 19)); - } else if (nbank == 0) - addr = (addr & 0x3ff) | ((addr2 & 0x1ff) << 10); - else { - addr &= 0x7ff; - addr2 &= 0x3ff; - addr = addr + 0x80000 + ((addr2 << 11) | ((nbank - 1) << 21)); - } - break; + case 4608: + if (((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) >= 8 && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) <= 0x0a) || ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 0x18)) { + if (nbank == 0) + addr = (addr & 0x3ff) | ((addr2 & 0x1ff) << 10); + else if (nbank < 3) + addr = 0x80000 + ((addr & 0x7ff) | ((nbank - 1) << 11) | ((addr2 & 0x3ff) << 12)); + else + addr = 0x480000 + ((addr & 0x3ff) | ((addr2 & 0x1ff) << 10) | ((nbank - 3) << 19)); + } else if (nbank == 0) + addr = (addr & 0x3ff) | ((addr2 & 0x1ff) << 10); + else { + addr &= 0x7ff; + addr2 &= 0x3ff; + addr = addr + 0x80000 + ((addr2 << 11) | ((nbank - 1) << 21)); + } + break; - case 5120: - case 7168: - if (nbank < 2) - addr = (addr & 0x3ff) | (nbank << 10) | ((addr2 & 0x1ff) << 11); - else if (nbank < 4) - addr = 0x100000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 12) | ((nbank & 1) << 11)); - else - addr = 0x100000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 11) | ((nbank - 2) << 21)); - break; + case 5120: + case 7168: + if (nbank < 2) + addr = (addr & 0x3ff) | (nbank << 10) | ((addr2 & 0x1ff) << 11); + else if (nbank < 4) + addr = 0x100000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 12) | ((nbank & 1) << 11)); + else + addr = 0x100000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 11) | ((nbank - 2) << 21)); + break; - case 6656: - if (((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) >= 8 && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) <= 0x0a) || ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 0x18)) { - if (nbank == 0) - addr = (addr & 0x3ff) | ((addr2 & 0x1ff) << 10); - else if (nbank < 3) - addr = 0x80000 + ((addr & 0x7ff) | ((nbank - 1) << 11) | ((addr2 & 0x3ff) << 12)); - else if (nbank == 3) - addr = 0x480000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 11)); - else - addr = 0x680000 + ((addr & 0x3ff) | ((addr2 & 0x1ff) << 10) | ((nbank - 4) << 19)); - } else if (nbank == 0) - addr = (addr & 0x3ff) | ((addr2 & 0x1ff) << 10); - else if (nbank == 1) { - addr &= 0x7ff; - addr2 &= 0x3ff; - addr = addr + 0x80000 + (addr2 << 11); - } else { - addr &= 0x7ff; - addr2 &= 0x3ff; - addr = addr + 0x280000 + ((addr2 << 12) | ((nbank & 1) << 11) | (((nbank - 2) & 6) << 21)); - } - break; + case 6656: + if (((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) >= 8 && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) <= 0x0a) || ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 0x18)) { + if (nbank == 0) + addr = (addr & 0x3ff) | ((addr2 & 0x1ff) << 10); + else if (nbank < 3) + addr = 0x80000 + ((addr & 0x7ff) | ((nbank - 1) << 11) | ((addr2 & 0x3ff) << 12)); + else if (nbank == 3) + addr = 0x480000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 11)); + else + addr = 0x680000 + ((addr & 0x3ff) | ((addr2 & 0x1ff) << 10) | ((nbank - 4) << 19)); + } else if (nbank == 0) + addr = (addr & 0x3ff) | ((addr2 & 0x1ff) << 10); + else if (nbank == 1) { + addr &= 0x7ff; + addr2 &= 0x3ff; + addr = addr + 0x80000 + (addr2 << 11); + } else { + addr &= 0x7ff; + addr2 &= 0x3ff; + addr = addr + 0x280000 + ((addr2 << 12) | ((nbank & 1) << 11) | (((nbank - 2) & 6) << 21)); + } + break; - case 8192: - addr &= 0x7ff; - if (nbank < 4) - addr |= (nbank << 11) | ((addr2 & 0x3ff) << 13); - else - addr |= ((addr2 & 0x3ff) << 11) | (nbank << 21); - break; + case 8192: + addr &= 0x7ff; + if (nbank < 4) + addr |= (nbank << 11) | ((addr2 & 0x3ff) << 13); + else + addr |= ((addr2 & 0x3ff) << 11) | (nbank << 21); + break; - case 9216: - if (nbank < 2) - addr = (addr & 0x3ff) | (nbank << 10) | ((addr2 & 0x1ff) << 11); - else if (dev->external_is_RAS) { - if (nbank < 6) - addr = 0x100000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 12) | ((nbank & 1) << 11)); - else - addr = 0x100000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 11) | ((nbank - 2) << 21)); - } else - addr = 0x100000 + ((addr & 0xfff) | ((addr2 & 0x7ff) << 12) | ((nbank - 2) << 23)); - break; + case 9216: + if (nbank < 2) + addr = (addr & 0x3ff) | (nbank << 10) | ((addr2 & 0x1ff) << 11); + else if (dev->external_is_RAS) { + if (nbank < 6) + addr = 0x100000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 12) | ((nbank & 1) << 11)); + else + addr = 0x100000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 11) | ((nbank - 2) << 21)); + } else + addr = 0x100000 + ((addr & 0xfff) | ((addr2 & 0x7ff) << 12) | ((nbank - 2) << 23)); + break; - case 10240: - if (dev->external_is_RAS) { - addr &= 0x7ff; - if (nbank < 4) - addr |= (nbank << 11) | ((addr2 & 0x3ff) << 13); - else - addr |= ((addr2 & 0x3ff) << 11) | (nbank << 21); - } else if (nbank == 0) - addr = (addr & 0x7ff) | ((addr2 & 0x3ff) << 11); - else { - addr &= 0xfff; - addr2 &= 0x7ff; - addr = addr + 0x200000 + ((addr2 << 12) | ((nbank - 1) << 23)); - } - break; + case 10240: + if (dev->external_is_RAS) { + addr &= 0x7ff; + if (nbank < 4) + addr |= (nbank << 11) | ((addr2 & 0x3ff) << 13); + else + addr |= ((addr2 & 0x3ff) << 11) | (nbank << 21); + } else if (nbank == 0) + addr = (addr & 0x7ff) | ((addr2 & 0x3ff) << 11); + else { + addr &= 0xfff; + addr2 &= 0x7ff; + addr = addr + 0x200000 + ((addr2 << 12) | ((nbank - 1) << 23)); + } + break; - case 11264: - if (nbank < 2) - addr = (addr & 0x3ff) | (nbank << 10) | ((addr2 & 0x1ff) << 11); - else if (nbank < 6) - addr = 0x100000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 12) | ((nbank & 1) << 11)); - else - addr = 0x100000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 11) | ((nbank - 2) << 21)); - break; + case 11264: + if (nbank < 2) + addr = (addr & 0x3ff) | (nbank << 10) | ((addr2 & 0x1ff) << 11); + else if (nbank < 6) + addr = 0x100000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 12) | ((nbank & 1) << 11)); + else + addr = 0x100000 + ((addr & 0x7ff) | ((addr2 & 0x3ff) << 11) | ((nbank - 2) << 21)); + break; - case 12288: - if (dev->external_is_RAS) { - addr &= 0x7ff; - if (nbank < 4) - addr |= (nbank << 11) | ((addr2 & 0x3ff) << 13); - else if (nbank < 6) - addr |= ((nbank & 1) << 11) | ((addr2 & 0x3ff) << 12) | ((nbank & 4) << 21); - else - addr |= ((addr2 & 0x3ff) << 11) | (nbank << 21); - } else { - if (nbank < 2) - addr = (addr & 0x7ff) | (nbank << 11) | ((addr2 & 0x3ff) << 12); - else - addr = 0x400000 + ((addr & 0xfff) | ((addr2 & 0x7ff) << 12) | ((nbank - 2) << 23)); - } - break; + case 12288: + if (dev->external_is_RAS) { + addr &= 0x7ff; + if (nbank < 4) + addr |= (nbank << 11) | ((addr2 & 0x3ff) << 13); + else if (nbank < 6) + addr |= ((nbank & 1) << 11) | ((addr2 & 0x3ff) << 12) | ((nbank & 4) << 21); + else + addr |= ((addr2 & 0x3ff) << 11) | (nbank << 21); + } else { + if (nbank < 2) + addr = (addr & 0x7ff) | (nbank << 11) | ((addr2 & 0x3ff) << 12); + else + addr = 0x400000 + ((addr & 0xfff) | ((addr2 & 0x7ff) << 12) | ((nbank - 2) << 23)); + } + break; - case 13312: - if (nbank < 2) - addr = (addr & 0x3FF) | (nbank << 10) | ((addr2 & 0x1FF) << 11); - else if (nbank < 4) - addr = 0x100000 + ((addr & 0x7FF) | ((addr2 & 0x3FF) << 12) | ((nbank & 1) << 11)); - else - addr = 0x500000 + ((addr & 0x7FF) | ((addr2 & 0x3FF) << 13) | ((nbank & 3) << 11)); - break; + case 13312: + if (nbank < 2) + addr = (addr & 0x3FF) | (nbank << 10) | ((addr2 & 0x1FF) << 11); + else if (nbank < 4) + addr = 0x100000 + ((addr & 0x7FF) | ((addr2 & 0x3FF) << 12) | ((nbank & 1) << 11)); + else + addr = 0x500000 + ((addr & 0x7FF) | ((addr2 & 0x3FF) << 13) | ((nbank & 3) << 11)); + break; - case 14336: - addr &= 0x7ff; - if (nbank < 4) - addr |= (nbank << 11) | ((addr2 & 0x3ff) << 13); - else if (nbank < 6) - addr |= ((nbank & 1) << 11) | ((addr2 & 0x3ff) << 12) | ((nbank & 4) << 21); - else - addr |= ((addr2 & 0x3ff) << 11) | (nbank << 21); - break; + case 14336: + addr &= 0x7ff; + if (nbank < 4) + addr |= (nbank << 11) | ((addr2 & 0x3ff) << 13); + else if (nbank < 6) + addr |= ((nbank & 1) << 11) | ((addr2 & 0x3ff) << 12) | ((nbank & 4) << 21); + else + addr |= ((addr2 & 0x3ff) << 11) | (nbank << 21); + break; - case 16384: - if (dev->external_is_RAS) { - addr &= 0x7ff; - addr2 &= 0x3ff; - addr |= ((nbank & 3) << 11) | (addr2 << 13) | ((nbank & 4) << 21); - } else { - addr &= 0xfff; - addr2 &= 0x7ff; - if (nbank < 2) - addr |= (addr2 << 13) | (nbank << 12); - else - addr |= (addr2 << 12) | (nbank << 23); - } - break; + case 16384: + if (dev->external_is_RAS) { + addr &= 0x7ff; + addr2 &= 0x3ff; + addr |= ((nbank & 3) << 11) | (addr2 << 13) | ((nbank & 4) << 21); + } else { + addr &= 0xfff; + addr2 &= 0x7ff; + if (nbank < 2) + addr |= (addr2 << 13) | (nbank << 12); + else + addr |= (addr2 << 12) | (nbank << 23); + } + break; - default: - if (mem_size < 2048 || ((mem_size & 1536) == 512) || (mem_size == 2048 && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) < 6)) { - addr &= 0x3ff; - addr2 &= 0x1ff; - addr |= (addr2 << 10) | (nbank << 19); - } else if (mem_size < 8192 || (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) < 0x17) { - addr &= 0x7ff; - addr2 &= 0x3ff; - addr |= (addr2 << 11) | (nbank << 21); - } else { - addr &= 0xfff; - addr2 &= 0x7ff; - addr |= (addr2 << 12) | (nbank << 23); - } - break; - } + default: + if (mem_size < 2048 || ((mem_size & 1536) == 512) || (mem_size == 2048 && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) < 6)) { + addr &= 0x3ff; + addr2 &= 0x1ff; + addr |= (addr2 << 10) | (nbank << 19); + } else if (mem_size < 8192 || (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) < 0x17) { + addr &= 0x7ff; + addr2 &= 0x3ff; + addr |= (addr2 << 11) | (nbank << 21); + } else { + addr &= 0xfff; + addr2 &= 0x7ff; + addr |= (addr2 << 12) | (nbank << 23); + } + break; + } } return addr; } - static void set_global_EMS_state(scat_t *dev, int state) { uint32_t base_addr, virt_addr; - int i, conf; + int i, conf; for (i = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0 : 24; i < 32; i++) { - base_addr = (i + 16) << 14; + base_addr = (i + 16) << 14; - if (i >= 24) - base_addr += 0x30000; - if (state && (dev->page[i].regs_2x9 & 0x80)) { - virt_addr = get_addr(dev, base_addr, &dev->page[i]); - if (i < 24) - mem_mapping_disable(&dev->efff_mapping[i]); - else - mem_mapping_disable(&dev->efff_mapping[i + 12]); - mem_mapping_enable(&dev->ems_mapping[i]); + if (i >= 24) + base_addr += 0x30000; + if (state && (dev->page[i].regs_2x9 & 0x80)) { + virt_addr = get_addr(dev, base_addr, &dev->page[i]); + if (i < 24) + mem_mapping_disable(&dev->efff_mapping[i]); + else + mem_mapping_disable(&dev->efff_mapping[i + 12]); + mem_mapping_enable(&dev->ems_mapping[i]); - if (virt_addr < ((uint32_t)mem_size << 10)) - mem_mapping_set_exec(&dev->ems_mapping[i], ram + virt_addr); - else - mem_mapping_set_exec(&dev->ems_mapping[i], NULL); - } else { - mem_mapping_set_exec(&dev->ems_mapping[i], ram + base_addr); - mem_mapping_disable(&dev->ems_mapping[i]); + if (virt_addr < ((uint32_t) mem_size << 10)) + mem_mapping_set_exec(&dev->ems_mapping[i], ram + virt_addr); + else + mem_mapping_set_exec(&dev->ems_mapping[i], NULL); + } else { + mem_mapping_set_exec(&dev->ems_mapping[i], ram + base_addr); + mem_mapping_disable(&dev->ems_mapping[i]); - conf = (dev->regs[SCAT_VERSION] & 0xf0) ? (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) - : (dev->regs[SCAT_DRAM_CONFIGURATION] & 0xf) | - ((dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40) >> 2); - if (i < 24) { - if (conf > 1 || (conf == 1 && i < 16)) - mem_mapping_enable(&dev->efff_mapping[i]); - else - mem_mapping_disable(&dev->efff_mapping[i]); - } else if (conf > 3 || ((dev->regs[SCAT_VERSION] & 0xf0) != 0 && conf == 2)) - mem_mapping_enable(&dev->efff_mapping[i + 12]); - else - mem_mapping_disable(&dev->efff_mapping[i + 12]); - } + conf = (dev->regs[SCAT_VERSION] & 0xf0) ? (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) + : (dev->regs[SCAT_DRAM_CONFIGURATION] & 0xf) | ((dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40) >> 2); + if (i < 24) { + if (conf > 1 || (conf == 1 && i < 16)) + mem_mapping_enable(&dev->efff_mapping[i]); + else + mem_mapping_disable(&dev->efff_mapping[i]); + } else if (conf > 3 || ((dev->regs[SCAT_VERSION] & 0xf0) != 0 && conf == 2)) + mem_mapping_enable(&dev->efff_mapping[i + 12]); + else + mem_mapping_disable(&dev->efff_mapping[i + 12]); + } } flushmmucache(); } - static void memmap_state_update(scat_t *dev) { uint32_t addr; - int i; + int i; for (i = (((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0 : 16); i < 44; i++) { - addr = get_addr(dev, 0x40000 + (i << 14), &dev->null_page); - mem_mapping_set_exec(&dev->efff_mapping[i], - addr < ((uint32_t)mem_size << 10) ? ram + addr : NULL); + addr = get_addr(dev, 0x40000 + (i << 14), &dev->null_page); + mem_mapping_set_exec(&dev->efff_mapping[i], + addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL); } addr = get_addr(dev, 0, &dev->null_page); mem_mapping_set_exec(&dev->low_mapping[0], - addr < ((uint32_t)mem_size << 10) ? ram + addr : NULL); + addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL); addr = get_addr(dev, 0xf0000, &dev->null_page); mem_mapping_set_exec(&dev->low_mapping[1], - addr < ((uint32_t)mem_size << 10) ? ram + addr : NULL); + addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL); for (i = 2; i < 32; i++) { - addr = get_addr(dev, i << 19, &dev->null_page); - mem_mapping_set_exec(&dev->low_mapping[i], - addr < ((uint32_t)mem_size << 10) ? ram + addr : NULL); + addr = get_addr(dev, i << 19, &dev->null_page); + mem_mapping_set_exec(&dev->low_mapping[i], + addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL); } if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) { - for (i = 0; i < max_map[(dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) | - ((dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40) >> 2)]; i++) - mem_mapping_enable(&dev->low_mapping[i]); + for (i = 0; i < max_map[(dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) | ((dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40) >> 2)]; i++) + mem_mapping_enable(&dev->low_mapping[i]); - for (; i < 32; i++) - mem_mapping_disable(&dev->low_mapping[i]); + for (; i < 32; i++) + mem_mapping_disable(&dev->low_mapping[i]); - for (i = 24; i < 36; i++) { - if (((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) | (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40)) < 4) - mem_mapping_disable(&dev->efff_mapping[i]); - else - mem_mapping_enable(&dev->efff_mapping[i]); - } + for (i = 24; i < 36; i++) { + if (((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) | (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40)) < 4) + mem_mapping_disable(&dev->efff_mapping[i]); + else + mem_mapping_enable(&dev->efff_mapping[i]); + } } else { - for (i = 0; i < max_map_sx[dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f]; i++) - mem_mapping_enable(&dev->low_mapping[i]); + for (i = 0; i < max_map_sx[dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f]; i++) + mem_mapping_enable(&dev->low_mapping[i]); - for (; i < 32; i++) - mem_mapping_disable(&dev->low_mapping[i]); + for (; i < 32; i++) + mem_mapping_disable(&dev->low_mapping[i]); - for(i = 24; i < 36; i++) { - if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) < 2 || (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 3) - mem_mapping_disable(&dev->efff_mapping[i]); - else - mem_mapping_enable(&dev->efff_mapping[i]); - } + for (i = 24; i < 36; i++) { + if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) < 2 || (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 3) + mem_mapping_disable(&dev->efff_mapping[i]); + else + mem_mapping_enable(&dev->efff_mapping[i]); + } } - if ((((dev->regs[SCAT_VERSION] & 0xf0) == 0) && - (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40) == 0) || ((dev->regs[SCAT_VERSION] & 0xf0) != 0)) { - if ((((dev->regs[SCAT_VERSION] & 0xf0) == 0) && - (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) == 3) || - (((dev->regs[SCAT_VERSION] & 0xf0) != 0) && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 3)) { - mem_mapping_disable(&dev->low_mapping[2]); + if ((((dev->regs[SCAT_VERSION] & 0xf0) == 0) && (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40) == 0) || ((dev->regs[SCAT_VERSION] & 0xf0) != 0)) { + if ((((dev->regs[SCAT_VERSION] & 0xf0) == 0) && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) == 3) || (((dev->regs[SCAT_VERSION] & 0xf0) != 0) && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 3)) { + mem_mapping_disable(&dev->low_mapping[2]); - for (i = 0; i < 6; i++) { - addr = get_addr(dev, 0x100000 + (i << 16), &dev->null_page); - mem_mapping_set_exec(&dev->remap_mapping[i], - addr < ((uint32_t)mem_size << 10) ? ram + addr : NULL); - mem_mapping_enable(&dev->remap_mapping[i]); - } - } else { - for (i = 0; i < 6; i++) - mem_mapping_disable(&dev->remap_mapping[i]); + for (i = 0; i < 6; i++) { + addr = get_addr(dev, 0x100000 + (i << 16), &dev->null_page); + mem_mapping_set_exec(&dev->remap_mapping[i], + addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL); + mem_mapping_enable(&dev->remap_mapping[i]); + } + } else { + for (i = 0; i < 6; i++) + mem_mapping_disable(&dev->remap_mapping[i]); - if ((((dev->regs[SCAT_VERSION] & 0xf0) == 0) && - (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) > 4) || - (((dev->regs[SCAT_VERSION] & 0xf0) != 0) && - (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) > 3)) - mem_mapping_enable(&dev->low_mapping[2]); - } + if ((((dev->regs[SCAT_VERSION] & 0xf0) == 0) && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) > 4) || (((dev->regs[SCAT_VERSION] & 0xf0) != 0) && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) > 3)) + mem_mapping_enable(&dev->low_mapping[2]); + } } else { - for (i = 0; i < 6; i++) - mem_mapping_disable(&dev->remap_mapping[i]); + for (i = 0; i < 6; i++) + mem_mapping_disable(&dev->remap_mapping[i]); - mem_mapping_enable(&dev->low_mapping[2]); + mem_mapping_enable(&dev->low_mapping[2]); } set_global_EMS_state(dev, dev->regs[SCAT_EMS_CONTROL] & 0x80); @@ -1023,511 +1002,500 @@ memmap_state_update(scat_t *dev) flushmmucache_cr3(); } - static void scat_out(uint16_t port, uint8_t val, void *priv) { - scat_t *dev = (scat_t *)priv; - uint8_t reg_valid = 0, - shadow_update = 0, - map_update = 0, - indx; + scat_t *dev = (scat_t *) priv; + uint8_t reg_valid = 0, + shadow_update = 0, + map_update = 0, + indx; uint32_t base_addr, virt_addr; switch (port) { - case 0x22: - dev->indx = val; - break; + case 0x22: + dev->indx = val; + break; - case 0x23: - switch (dev->indx) { - case SCAT_DMA_WAIT_STATE_CONTROL: - case SCAT_CLOCK_CONTROL: - case SCAT_PERIPHERAL_CONTROL: - reg_valid = 1; - break; + case 0x23: + switch (dev->indx) { + case SCAT_DMA_WAIT_STATE_CONTROL: + case SCAT_CLOCK_CONTROL: + case SCAT_PERIPHERAL_CONTROL: + reg_valid = 1; + break; - case SCAT_EMS_CONTROL: - io_removehandler(0x0208, 0x0003, scat_in, NULL, NULL, scat_out, NULL, NULL, dev); - io_removehandler(0x0218, 0x0003, scat_in, NULL, NULL, scat_out, NULL, NULL, dev); + case SCAT_EMS_CONTROL: + io_removehandler(0x0208, 0x0003, scat_in, NULL, NULL, scat_out, NULL, NULL, dev); + io_removehandler(0x0218, 0x0003, scat_in, NULL, NULL, scat_out, NULL, NULL, dev); - if (val & 0x40) { - if (val & 1) - io_sethandler(0x0218, 3, scat_in, NULL, NULL, scat_out, NULL, NULL, dev); - else - io_sethandler(0x0208, 3, scat_in, NULL, NULL, scat_out, NULL, NULL, dev); - } - set_global_EMS_state(dev, val & 0x80); - reg_valid = 1; - break; + if (val & 0x40) { + if (val & 1) + io_sethandler(0x0218, 3, scat_in, NULL, NULL, scat_out, NULL, NULL, dev); + else + io_sethandler(0x0208, 3, scat_in, NULL, NULL, scat_out, NULL, NULL, dev); + } + set_global_EMS_state(dev, val & 0x80); + reg_valid = 1; + break; - case SCAT_POWER_MANAGEMENT: - /* TODO - Only use AUX parity disable bit for this version. - Other bits should be implemented later. */ - val &= (dev->regs[SCAT_VERSION] & 0xf0) == 0 ? 0x40 : 0x60; - reg_valid = 1; - break; + case SCAT_POWER_MANAGEMENT: + /* TODO - Only use AUX parity disable bit for this version. + Other bits should be implemented later. */ + val &= (dev->regs[SCAT_VERSION] & 0xf0) == 0 ? 0x40 : 0x60; + reg_valid = 1; + break; - case SCAT_DRAM_CONFIGURATION: - map_update = 1; + case SCAT_DRAM_CONFIGURATION: + map_update = 1; - if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) { - cpu_waitstates = (val & 0x70) == 0 ? 1 : 2; - cpu_update_waitstates(); - } + if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) { + cpu_waitstates = (val & 0x70) == 0 ? 1 : 2; + cpu_update_waitstates(); + } - reg_valid = 1; - break; + reg_valid = 1; + break; - case SCAT_EXTENDED_BOUNDARY: - if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) { - if (dev->regs[SCAT_VERSION] < 4) { - val &= 0xbf; - set_xms_bound(dev, val & 0x0f); - } else { - val = (val & 0x7f) | 0x80; - set_xms_bound(dev, val & 0x4f); - } - } else - set_xms_bound(dev, val & 0x1f); + case SCAT_EXTENDED_BOUNDARY: + if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) { + if (dev->regs[SCAT_VERSION] < 4) { + val &= 0xbf; + set_xms_bound(dev, val & 0x0f); + } else { + val = (val & 0x7f) | 0x80; + set_xms_bound(dev, val & 0x4f); + } + } else + set_xms_bound(dev, val & 0x1f); - mem_set_mem_state(0x40000, 0x60000, (val & 0x20) ? MEM_READ_EXTANY | MEM_WRITE_EXTANY : - MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - if ((val ^ dev->regs[SCAT_EXTENDED_BOUNDARY]) & 0xc0) - map_update = 1; - reg_valid = 1; - break; + mem_set_mem_state(0x40000, 0x60000, (val & 0x20) ? MEM_READ_EXTANY | MEM_WRITE_EXTANY : MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + if ((val ^ dev->regs[SCAT_EXTENDED_BOUNDARY]) & 0xc0) + map_update = 1; + reg_valid = 1; + break; - case SCAT_ROM_ENABLE: - case SCAT_RAM_WRITE_PROTECT: - case SCAT_SHADOW_RAM_ENABLE_1: - case SCAT_SHADOW_RAM_ENABLE_2: - case SCAT_SHADOW_RAM_ENABLE_3: - reg_valid = 1; - shadow_update = 1; - break; + case SCAT_ROM_ENABLE: + case SCAT_RAM_WRITE_PROTECT: + case SCAT_SHADOW_RAM_ENABLE_1: + case SCAT_SHADOW_RAM_ENABLE_2: + case SCAT_SHADOW_RAM_ENABLE_3: + reg_valid = 1; + shadow_update = 1; + break; - case SCATSX_LAPTOP_FEATURES: - if ((dev->regs[SCAT_VERSION] & 0xf0) != 0) { - val = (val & ~8) | (dev->regs[SCATSX_LAPTOP_FEATURES] & 8); - reg_valid = 1; - } - break; + case SCATSX_LAPTOP_FEATURES: + if ((dev->regs[SCAT_VERSION] & 0xf0) != 0) { + val = (val & ~8) | (dev->regs[SCATSX_LAPTOP_FEATURES] & 8); + reg_valid = 1; + } + break; - case SCATSX_FAST_VIDEO_CONTROL: - case SCATSX_FAST_VIDEORAM_ENABLE: - case SCATSX_HIGH_PERFORMANCE_REFRESH: - case SCATSX_CAS_TIMING_FOR_DMA: - if ((dev->regs[SCAT_VERSION] & 0xf0) != 0) - reg_valid = 1; - break; + case SCATSX_FAST_VIDEO_CONTROL: + case SCATSX_FAST_VIDEORAM_ENABLE: + case SCATSX_HIGH_PERFORMANCE_REFRESH: + case SCATSX_CAS_TIMING_FOR_DMA: + if ((dev->regs[SCAT_VERSION] & 0xf0) != 0) + reg_valid = 1; + break; - default: - break; - } + default: + break; + } - if (reg_valid) - dev->regs[dev->indx] = val; + if (reg_valid) + dev->regs[dev->indx] = val; - if (shadow_update) - shadow_state_update(dev); + if (shadow_update) + shadow_state_update(dev); - if (map_update) - memmap_state_update(dev); - break; + if (map_update) + memmap_state_update(dev); + break; - case 0x208: - case 0x218: - if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) { - if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) - indx = dev->reg_2xA & 0x1f; - else - indx = ((dev->reg_2xA & 0x40) >> 4) + (dev->reg_2xA & 0x3) + 24; - dev->page[indx].regs_2x8 = val; - base_addr = (indx + 16) << 14; - if (indx >= 24) - base_addr += 0x30000; + case 0x208: + case 0x218: + if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) { + if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) + indx = dev->reg_2xA & 0x1f; + else + indx = ((dev->reg_2xA & 0x40) >> 4) + (dev->reg_2xA & 0x3) + 24; + dev->page[indx].regs_2x8 = val; + base_addr = (indx + 16) << 14; + if (indx >= 24) + base_addr += 0x30000; - if ((dev->regs[SCAT_EMS_CONTROL] & 0x80) && (dev->page[indx].regs_2x9 & 0x80)) { - virt_addr = get_addr(dev, base_addr, &dev->page[indx]); - if (virt_addr < ((uint32_t)mem_size << 10)) - mem_mapping_set_exec(&dev->ems_mapping[indx], ram + virt_addr); - else - mem_mapping_set_exec(&dev->ems_mapping[indx], NULL); - flushmmucache(); - } - } - break; + if ((dev->regs[SCAT_EMS_CONTROL] & 0x80) && (dev->page[indx].regs_2x9 & 0x80)) { + virt_addr = get_addr(dev, base_addr, &dev->page[indx]); + if (virt_addr < ((uint32_t) mem_size << 10)) + mem_mapping_set_exec(&dev->ems_mapping[indx], ram + virt_addr); + else + mem_mapping_set_exec(&dev->ems_mapping[indx], NULL); + flushmmucache(); + } + } + break; - case 0x209: - case 0x219: - if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) { - if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) - indx = dev->reg_2xA & 0x1f; - else - indx = ((dev->reg_2xA & 0x40) >> 4) + (dev->reg_2xA & 0x3) + 24; - dev->page[indx].regs_2x9 = val; - base_addr = (indx + 16) << 14; - if (indx >= 24) - base_addr += 0x30000; + case 0x209: + case 0x219: + if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) { + if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) + indx = dev->reg_2xA & 0x1f; + else + indx = ((dev->reg_2xA & 0x40) >> 4) + (dev->reg_2xA & 0x3) + 24; + dev->page[indx].regs_2x9 = val; + base_addr = (indx + 16) << 14; + if (indx >= 24) + base_addr += 0x30000; - if (dev->regs[SCAT_EMS_CONTROL] & 0x80) { - if (val & 0x80) { - virt_addr = get_addr(dev, base_addr, &dev->page[indx]); - if (indx < 24) - mem_mapping_disable(&dev->efff_mapping[indx]); - else - mem_mapping_disable(&dev->efff_mapping[indx + 12]); - if (virt_addr < ((uint32_t)mem_size << 10)) - mem_mapping_set_exec(&dev->ems_mapping[indx], ram + virt_addr); - else - mem_mapping_set_exec(&dev->ems_mapping[indx], NULL); - mem_mapping_enable(&dev->ems_mapping[indx]); - } else { - mem_mapping_set_exec(&dev->ems_mapping[indx], ram + base_addr); - mem_mapping_disable(&dev->ems_mapping[indx]); - if (indx < 24) - mem_mapping_enable(&dev->efff_mapping[indx]); - else - mem_mapping_enable(&dev->efff_mapping[indx + 12]); - } + if (dev->regs[SCAT_EMS_CONTROL] & 0x80) { + if (val & 0x80) { + virt_addr = get_addr(dev, base_addr, &dev->page[indx]); + if (indx < 24) + mem_mapping_disable(&dev->efff_mapping[indx]); + else + mem_mapping_disable(&dev->efff_mapping[indx + 12]); + if (virt_addr < ((uint32_t) mem_size << 10)) + mem_mapping_set_exec(&dev->ems_mapping[indx], ram + virt_addr); + else + mem_mapping_set_exec(&dev->ems_mapping[indx], NULL); + mem_mapping_enable(&dev->ems_mapping[indx]); + } else { + mem_mapping_set_exec(&dev->ems_mapping[indx], ram + base_addr); + mem_mapping_disable(&dev->ems_mapping[indx]); + if (indx < 24) + mem_mapping_enable(&dev->efff_mapping[indx]); + else + mem_mapping_enable(&dev->efff_mapping[indx + 12]); + } - flushmmucache(); - } + flushmmucache(); + } - if (dev->reg_2xA & 0x80) - dev->reg_2xA = (dev->reg_2xA & 0xe0) | ((dev->reg_2xA + 1) & (((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0x1f : 3)); - } - break; + if (dev->reg_2xA & 0x80) + dev->reg_2xA = (dev->reg_2xA & 0xe0) | ((dev->reg_2xA + 1) & (((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0x1f : 3)); + } + break; - case 0x20a: - case 0x21a: - if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) - dev->reg_2xA = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? val : val & 0xc3; - break; + case 0x20a: + case 0x21a: + if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) + dev->reg_2xA = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? val : val & 0xc3; + break; } } - static uint8_t scat_in(uint16_t port, void *priv) { - scat_t *dev = (scat_t *)priv; + scat_t *dev = (scat_t *) priv; uint8_t ret = 0xff, indx; switch (port) { - case 0x23: - switch (dev->indx) { - case SCAT_MISCELLANEOUS_STATUS: - ret = (dev->regs[dev->indx] & 0x3f) | (~nmi_mask & 0x80) | ((mem_a20_key & 2) << 5); - break; + case 0x23: + switch (dev->indx) { + case SCAT_MISCELLANEOUS_STATUS: + ret = (dev->regs[dev->indx] & 0x3f) | (~nmi_mask & 0x80) | ((mem_a20_key & 2) << 5); + break; - case SCAT_DRAM_CONFIGURATION: - if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) - ret = (dev->regs[dev->indx] & 0x8f) | (cpu_waitstates == 1 ? 0 : 0x10); - else - ret = dev->regs[dev->indx]; - break; + case SCAT_DRAM_CONFIGURATION: + if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) + ret = (dev->regs[dev->indx] & 0x8f) | (cpu_waitstates == 1 ? 0 : 0x10); + else + ret = dev->regs[dev->indx]; + break; - case SCAT_EXTENDED_BOUNDARY: - ret = dev->regs[dev->indx]; - if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) { - if ((dev->regs[SCAT_VERSION] & 0x0f) >= 4) - ret |= 0x80; - else - ret &= 0xaf; - } - break; + case SCAT_EXTENDED_BOUNDARY: + ret = dev->regs[dev->indx]; + if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) { + if ((dev->regs[SCAT_VERSION] & 0x0f) >= 4) + ret |= 0x80; + else + ret &= 0xaf; + } + break; - default: - ret = dev->regs[dev->indx]; - break; - } - break; + default: + ret = dev->regs[dev->indx]; + break; + } + break; - case 0x208: - case 0x218: - if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) { - if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) - indx = dev->reg_2xA & 0x1f; - else - indx = ((dev->reg_2xA & 0x40) >> 4) + (dev->reg_2xA & 0x3) + 24; - ret = dev->page[indx].regs_2x8; - } - break; + case 0x208: + case 0x218: + if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) { + if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) + indx = dev->reg_2xA & 0x1f; + else + indx = ((dev->reg_2xA & 0x40) >> 4) + (dev->reg_2xA & 0x3) + 24; + ret = dev->page[indx].regs_2x8; + } + break; - case 0x209: - case 0x219: - if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) { - if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) - indx = dev->reg_2xA & 0x1f; - else - indx = ((dev->reg_2xA & 0x40) >> 4) + (dev->reg_2xA & 0x3) + 24; - ret = dev->page[indx].regs_2x9; - } - break; + case 0x209: + case 0x219: + if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) { + if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) + indx = dev->reg_2xA & 0x1f; + else + indx = ((dev->reg_2xA & 0x40) >> 4) + (dev->reg_2xA & 0x3) + 24; + ret = dev->page[indx].regs_2x9; + } + break; - case 0x20a: - case 0x21a: - if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) - ret = dev->reg_2xA; - break; + case 0x20a: + case 0x21a: + if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) + ret = dev->reg_2xA; + break; } return ret; } - static uint8_t mem_read_scatb(uint32_t addr, void *priv) { - ems_page_t *page = (ems_page_t *)priv; - scat_t *dev = (scat_t *)page->scat; - uint8_t val = 0xff; + ems_page_t *page = (ems_page_t *) priv; + scat_t *dev = (scat_t *) page->scat; + uint8_t val = 0xff; addr = get_addr(dev, addr, page); - if (addr < ((uint32_t)mem_size << 10)) - val = ram[addr]; + if (addr < ((uint32_t) mem_size << 10)) + val = ram[addr]; return val; } - static uint16_t mem_read_scatw(uint32_t addr, void *priv) { - ems_page_t *page = (ems_page_t *)priv; - scat_t *dev = (scat_t *)page->scat; - uint16_t val = 0xffff; + ems_page_t *page = (ems_page_t *) priv; + scat_t *dev = (scat_t *) page->scat; + uint16_t val = 0xffff; addr = get_addr(dev, addr, page); - if (addr < ((uint32_t)mem_size << 10)) - val = *(uint16_t *)&ram[addr]; + if (addr < ((uint32_t) mem_size << 10)) + val = *(uint16_t *) &ram[addr]; return val; } - static uint32_t mem_read_scatl(uint32_t addr, void *priv) { - ems_page_t *page = (ems_page_t *)priv; - scat_t *dev = (scat_t *)page->scat; - uint32_t val = 0xffffffff; + ems_page_t *page = (ems_page_t *) priv; + scat_t *dev = (scat_t *) page->scat; + uint32_t val = 0xffffffff; addr = get_addr(dev, addr, page); - if (addr < ((uint32_t)mem_size << 10)) - val = *(uint32_t *)&ram[addr]; + if (addr < ((uint32_t) mem_size << 10)) + val = *(uint32_t *) &ram[addr]; return val; } - static void mem_write_scatb(uint32_t addr, uint8_t val, void *priv) { - ems_page_t *page = (ems_page_t *)priv; - scat_t *dev = (scat_t *)page->scat; - uint32_t oldaddr = addr, chkaddr; + ems_page_t *page = (ems_page_t *) priv; + scat_t *dev = (scat_t *) page->scat; + uint32_t oldaddr = addr, chkaddr; - addr = get_addr(dev, addr, page); + addr = get_addr(dev, addr, page); chkaddr = page->valid ? addr : oldaddr; if ((chkaddr >= 0xc0000) && (chkaddr < 0x100000)) { - if (dev->regs[SCAT_RAM_WRITE_PROTECT] & (1 << ((chkaddr - 0xc0000) >> 15))) - return; + if (dev->regs[SCAT_RAM_WRITE_PROTECT] & (1 << ((chkaddr - 0xc0000) >> 15))) + return; } - if (addr < ((uint32_t)mem_size << 10)) - ram[addr] = val; + if (addr < ((uint32_t) mem_size << 10)) + ram[addr] = val; } - static void mem_write_scatw(uint32_t addr, uint16_t val, void *priv) { - ems_page_t *page = (ems_page_t *)priv; - scat_t *dev = (scat_t *)page->scat; - uint32_t oldaddr = addr, chkaddr; + ems_page_t *page = (ems_page_t *) priv; + scat_t *dev = (scat_t *) page->scat; + uint32_t oldaddr = addr, chkaddr; - addr = get_addr(dev, addr, page); + addr = get_addr(dev, addr, page); chkaddr = page->valid ? addr : oldaddr; if ((chkaddr >= 0xc0000) && (chkaddr < 0x100000)) { - if (dev->regs[SCAT_RAM_WRITE_PROTECT] & (1 << ((chkaddr - 0xc0000) >> 15))) - return; + if (dev->regs[SCAT_RAM_WRITE_PROTECT] & (1 << ((chkaddr - 0xc0000) >> 15))) + return; } - if (addr < ((uint32_t)mem_size << 10)) - *(uint16_t *)&ram[addr] = val; + if (addr < ((uint32_t) mem_size << 10)) + *(uint16_t *) &ram[addr] = val; } - static void mem_write_scatl(uint32_t addr, uint32_t val, void *priv) { - ems_page_t *page = (ems_page_t *)priv; - scat_t *dev = (scat_t *)page->scat; - uint32_t oldaddr = addr, chkaddr; + ems_page_t *page = (ems_page_t *) priv; + scat_t *dev = (scat_t *) page->scat; + uint32_t oldaddr = addr, chkaddr; - addr = get_addr(dev, addr, page); + addr = get_addr(dev, addr, page); chkaddr = page->valid ? addr : oldaddr; if ((chkaddr >= 0xc0000) && (chkaddr < 0x100000)) { - if (dev->regs[SCAT_RAM_WRITE_PROTECT] & (1 << ((chkaddr - 0xc0000) >> 15))) - return; + if (dev->regs[SCAT_RAM_WRITE_PROTECT] & (1 << ((chkaddr - 0xc0000) >> 15))) + return; } - if (addr < ((uint32_t)mem_size << 10)) - *(uint32_t *)&ram[addr] = val; + if (addr < ((uint32_t) mem_size << 10)) + *(uint32_t *) &ram[addr] = val; } - static void scat_close(void *priv) { - scat_t *dev = (scat_t *)priv; + scat_t *dev = (scat_t *) priv; free(dev); } - static void * scat_init(const device_t *info) { - scat_t *dev; + scat_t *dev; uint32_t i, k; - int sx; + int sx; - dev = (scat_t *)malloc(sizeof(scat_t)); + dev = (scat_t *) malloc(sizeof(scat_t)); memset(dev, 0x00, sizeof(scat_t)); dev->type = info->local; sx = (dev->type == 32) ? 1 : 0; for (i = 0; i < sizeof(dev->regs); i++) - dev->regs[i] = 0xff; + dev->regs[i] = 0xff; if (sx) { - dev->regs[SCAT_VERSION] = 0x13; - dev->regs[SCAT_CLOCK_CONTROL] = 6; - dev->regs[SCAT_PERIPHERAL_CONTROL] = 0; - dev->regs[SCAT_DRAM_CONFIGURATION] = 1; - dev->regs[SCATSX_LAPTOP_FEATURES] = 0; - dev->regs[SCATSX_FAST_VIDEO_CONTROL] = 0; - dev->regs[SCATSX_FAST_VIDEORAM_ENABLE] = 0; - dev->regs[SCATSX_HIGH_PERFORMANCE_REFRESH] = 8; - dev->regs[SCATSX_CAS_TIMING_FOR_DMA] = 3; + dev->regs[SCAT_VERSION] = 0x13; + dev->regs[SCAT_CLOCK_CONTROL] = 6; + dev->regs[SCAT_PERIPHERAL_CONTROL] = 0; + dev->regs[SCAT_DRAM_CONFIGURATION] = 1; + dev->regs[SCATSX_LAPTOP_FEATURES] = 0; + dev->regs[SCATSX_FAST_VIDEO_CONTROL] = 0; + dev->regs[SCATSX_FAST_VIDEORAM_ENABLE] = 0; + dev->regs[SCATSX_HIGH_PERFORMANCE_REFRESH] = 8; + dev->regs[SCATSX_CAS_TIMING_FOR_DMA] = 3; } else { - switch(dev->type) { - case 4: - dev->regs[SCAT_VERSION] = 4; - break; + switch (dev->type) { + case 4: + dev->regs[SCAT_VERSION] = 4; + break; - default: - dev->regs[SCAT_VERSION] = 1; - break; - } - dev->regs[SCAT_CLOCK_CONTROL] = 2; - dev->regs[SCAT_PERIPHERAL_CONTROL] = 0x80; - dev->regs[SCAT_DRAM_CONFIGURATION] = cpu_waitstates == 1 ? 2 : 0x12; + default: + dev->regs[SCAT_VERSION] = 1; + break; + } + dev->regs[SCAT_CLOCK_CONTROL] = 2; + dev->regs[SCAT_PERIPHERAL_CONTROL] = 0x80; + dev->regs[SCAT_DRAM_CONFIGURATION] = cpu_waitstates == 1 ? 2 : 0x12; } dev->regs[SCAT_DMA_WAIT_STATE_CONTROL] = 0; - dev->regs[SCAT_MISCELLANEOUS_STATUS] = 0x37; - dev->regs[SCAT_ROM_ENABLE] = 0xc0; - dev->regs[SCAT_RAM_WRITE_PROTECT] = 0; - dev->regs[SCAT_POWER_MANAGEMENT] = 0; - dev->regs[SCAT_SHADOW_RAM_ENABLE_1] = 0; - dev->regs[SCAT_SHADOW_RAM_ENABLE_2] = 0; - dev->regs[SCAT_SHADOW_RAM_ENABLE_3] = 0; - dev->regs[SCAT_EXTENDED_BOUNDARY] = 0; - dev->regs[SCAT_EMS_CONTROL] = 0; + dev->regs[SCAT_MISCELLANEOUS_STATUS] = 0x37; + dev->regs[SCAT_ROM_ENABLE] = 0xc0; + dev->regs[SCAT_RAM_WRITE_PROTECT] = 0; + dev->regs[SCAT_POWER_MANAGEMENT] = 0; + dev->regs[SCAT_SHADOW_RAM_ENABLE_1] = 0; + dev->regs[SCAT_SHADOW_RAM_ENABLE_2] = 0; + dev->regs[SCAT_SHADOW_RAM_ENABLE_3] = 0; + dev->regs[SCAT_EXTENDED_BOUNDARY] = 0; + dev->regs[SCAT_EMS_CONTROL] = 0; /* Disable all system mappings, we will override them. */ mem_mapping_disable(&ram_low_mapping); - if (! sx) - mem_mapping_disable(&ram_mid_mapping); + if (!sx) + mem_mapping_disable(&ram_mid_mapping); mem_mapping_disable(&ram_high_mapping); k = (sx) ? 0x80000 : 0x40000; - dev->null_page.valid = 0; + dev->null_page.valid = 0; dev->null_page.regs_2x8 = 0xff; dev->null_page.regs_2x9 = 0xff; - dev->null_page.scat = dev; + dev->null_page.scat = dev; mem_mapping_add(&dev->low_mapping[0], 0, k, - mem_read_scatb, mem_read_scatw, mem_read_scatl, - mem_write_scatb, mem_write_scatw, mem_write_scatl, - ram, MEM_MAPPING_INTERNAL, &dev->null_page); + mem_read_scatb, mem_read_scatw, mem_read_scatl, + mem_write_scatb, mem_write_scatw, mem_write_scatl, + ram, MEM_MAPPING_INTERNAL, &dev->null_page); mem_mapping_add(&dev->low_mapping[1], 0xf0000, 0x10000, - mem_read_scatb, mem_read_scatw, mem_read_scatl, - mem_write_scatb, mem_write_scatw, mem_write_scatl, - ram + 0xf0000, MEM_MAPPING_INTERNAL, &dev->null_page); + mem_read_scatb, mem_read_scatw, mem_read_scatl, + mem_write_scatb, mem_write_scatw, mem_write_scatl, + ram + 0xf0000, MEM_MAPPING_INTERNAL, &dev->null_page); for (i = 2; i < 32; i++) { - mem_mapping_add(&dev->low_mapping[i], (i << 19), 0x80000, - mem_read_scatb, mem_read_scatw, mem_read_scatl, - mem_write_scatb, mem_write_scatw, mem_write_scatl, - ram + (i<<19), MEM_MAPPING_INTERNAL, &dev->null_page); + mem_mapping_add(&dev->low_mapping[i], (i << 19), 0x80000, + mem_read_scatb, mem_read_scatw, mem_read_scatl, + mem_write_scatb, mem_write_scatw, mem_write_scatl, + ram + (i << 19), MEM_MAPPING_INTERNAL, &dev->null_page); } if (sx) { - i = 16; - k = 0x40000; + i = 16; + k = 0x40000; } else { - i = 0; - k = (dev->regs[SCAT_VERSION] < 4) ? 0x40000 : 0x60000; + i = 0; + k = (dev->regs[SCAT_VERSION] < 4) ? 0x40000 : 0x60000; } mem_mapping_set_addr(&dev->low_mapping[31], 0xf80000, k); for (; i < 44; i++) { - mem_mapping_add(&dev->efff_mapping[i], 0x40000 + (i << 14), 0x4000, - mem_read_scatb, mem_read_scatw, mem_read_scatl, - mem_write_scatb, mem_write_scatw, mem_write_scatl, - mem_size > (256 + (i << 4)) ? ram + 0x40000 + (i << 14) : NULL, - MEM_MAPPING_INTERNAL, &dev->null_page); + mem_mapping_add(&dev->efff_mapping[i], 0x40000 + (i << 14), 0x4000, + mem_read_scatb, mem_read_scatw, mem_read_scatl, + mem_write_scatb, mem_write_scatw, mem_write_scatl, + mem_size > (256 + (i << 4)) ? ram + 0x40000 + (i << 14) : NULL, + MEM_MAPPING_INTERNAL, &dev->null_page); - if (sx) - mem_mapping_enable(&dev->efff_mapping[i]); + if (sx) + mem_mapping_enable(&dev->efff_mapping[i]); } if (sx) { - for (i = 24; i < 32; i++) { - dev->page[i].valid = 1; - dev->page[i].regs_2x8 = 0xff; - dev->page[i].regs_2x9 = 0x03; - dev->page[i].scat = dev; - mem_mapping_add(&dev->ems_mapping[i], (i + 28) << 14, 0x04000, - mem_read_scatb, mem_read_scatw, mem_read_scatl, - mem_write_scatb, mem_write_scatw, mem_write_scatl, - ram + ((i + 28) << 14), 0, &dev->page[i]); - mem_mapping_disable(&dev->ems_mapping[i]); - } + for (i = 24; i < 32; i++) { + dev->page[i].valid = 1; + dev->page[i].regs_2x8 = 0xff; + dev->page[i].regs_2x9 = 0x03; + dev->page[i].scat = dev; + mem_mapping_add(&dev->ems_mapping[i], (i + 28) << 14, 0x04000, + mem_read_scatb, mem_read_scatw, mem_read_scatl, + mem_write_scatb, mem_write_scatw, mem_write_scatl, + ram + ((i + 28) << 14), 0, &dev->page[i]); + mem_mapping_disable(&dev->ems_mapping[i]); + } } else { - for (i = 0; i < 32; i++) { - dev->page[i].valid = 1; - dev->page[i].regs_2x8 = 0xff; - dev->page[i].regs_2x9 = 0x03; - dev->page[i].scat = dev; - mem_mapping_add(&dev->ems_mapping[i], (i + (i >= 24 ? 28 : 16)) << 14, 0x04000, - mem_read_scatb, mem_read_scatw, mem_read_scatl, - mem_write_scatb, mem_write_scatw, mem_write_scatl, - ram + ((i + (i >= 24 ? 28 : 16)) << 14), - 0, &dev->page[i]); - } + for (i = 0; i < 32; i++) { + dev->page[i].valid = 1; + dev->page[i].regs_2x8 = 0xff; + dev->page[i].regs_2x9 = 0x03; + dev->page[i].scat = dev; + mem_mapping_add(&dev->ems_mapping[i], (i + (i >= 24 ? 28 : 16)) << 14, 0x04000, + mem_read_scatb, mem_read_scatw, mem_read_scatl, + mem_write_scatb, mem_write_scatw, mem_write_scatl, + ram + ((i + (i >= 24 ? 28 : 16)) << 14), + 0, &dev->page[i]); + } } for (i = 0; i < 6; i++) { - mem_mapping_add(&dev->remap_mapping[i], 0x100000 + (i << 16), 0x10000, - mem_read_scatb, mem_read_scatw, mem_read_scatl, - mem_write_scatb, mem_write_scatw, mem_write_scatl, - mem_size >= 1024 ? ram + get_addr(dev, 0x100000 + (i << 16), &dev->null_page) : NULL, - MEM_MAPPING_INTERNAL, &dev->null_page); + mem_mapping_add(&dev->remap_mapping[i], 0x100000 + (i << 16), 0x10000, + mem_read_scatb, mem_read_scatw, mem_read_scatl, + mem_write_scatb, mem_write_scatw, mem_write_scatl, + mem_size >= 1024 ? ram + get_addr(dev, 0x100000 + (i << 16), &dev->null_page) : NULL, + MEM_MAPPING_INTERNAL, &dev->null_page); } if (sx) { - dev->external_is_RAS = scatsx_external_is_RAS[mem_size >> 9]; + dev->external_is_RAS = scatsx_external_is_RAS[mem_size >> 9]; } else { - dev->external_is_RAS = (dev->regs[SCAT_VERSION] > 3) || (((mem_size & ~2047) >> 11) + ((mem_size & 1536) >> 9) + ((mem_size & 511) >> 7)) > 4; + dev->external_is_RAS = (dev->regs[SCAT_VERSION] > 3) || (((mem_size & ~2047) >> 11) + ((mem_size & 1536) >> 9) + ((mem_size & 511) >> 7)) > 4; } set_xms_bound(dev, 0); @@ -1535,51 +1503,51 @@ scat_init(const device_t *info) shadow_state_update(dev); io_sethandler(0x0022, 2, - scat_in, NULL, NULL, scat_out, NULL, NULL, dev); + scat_in, NULL, NULL, scat_out, NULL, NULL, dev); device_add(&port_92_device); - return(dev); + return (dev); } const device_t scat_device = { - .name = "C&T SCAT (v1)", + .name = "C&T SCAT (v1)", .internal_name = "scat", - .flags = 0, - .local = 0, - .init = scat_init, - .close = scat_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = scat_init, + .close = scat_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t scat_4_device = { - .name = "C&T SCAT (v4)", + .name = "C&T SCAT (v4)", .internal_name = "scat_4", - .flags = 0, - .local = 4, - .init = scat_init, - .close = scat_close, - .reset = NULL, + .flags = 0, + .local = 4, + .init = scat_init, + .close = scat_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t scat_sx_device = { - .name = "C&T SCATsx", + .name = "C&T SCATsx", .internal_name = "scat_sx", - .flags = 0, - .local = 32, - .init = scat_init, - .close = scat_close, - .reset = NULL, + .flags = 0, + .local = 32, + .init = scat_init, + .close = scat_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/sis_5511.c b/src/chipset/sis_5511.c index d0900629d..a4f3f42b1 100644 --- a/src/chipset/sis_5511.c +++ b/src/chipset/sis_5511.c @@ -39,70 +39,68 @@ #include <86box/chipset.h> /* IDE Flags (1 Native / 0 Compatibility)*/ -#define PRIMARY_COMP_NAT_SWITCH (dev->pci_conf_sb[1][9] & 1) +#define PRIMARY_COMP_NAT_SWITCH (dev->pci_conf_sb[1][9] & 1) #define SECONDARY_COMP_NAT_SWITCH (dev->pci_conf_sb[1][9] & 4) -#define PRIMARY_NATIVE_BASE (dev->pci_conf_sb[1][0x11] << 8) | (dev->pci_conf_sb[1][0x10] & 0xf8) -#define PRIMARY_NATIVE_SIDE (((dev->pci_conf_sb[1][0x15] << 8) | (dev->pci_conf_sb[1][0x14] & 0xfc)) + 2) -#define SECONDARY_NATIVE_BASE (dev->pci_conf_sb[1][0x19] << 8) | (dev->pci_conf_sb[1][0x18] & 0xf8) -#define SECONDARY_NATIVE_SIDE (((dev->pci_conf_sb[1][0x1d] << 8) | (dev->pci_conf_sb[1][0x1c] & 0xfc)) + 2) -#define BUS_MASTER_BASE ((dev->pci_conf_sb[1][0x20] & 0xf0) | (dev->pci_conf_sb[1][0x21] << 8)) +#define PRIMARY_NATIVE_BASE (dev->pci_conf_sb[1][0x11] << 8) | (dev->pci_conf_sb[1][0x10] & 0xf8) +#define PRIMARY_NATIVE_SIDE (((dev->pci_conf_sb[1][0x15] << 8) | (dev->pci_conf_sb[1][0x14] & 0xfc)) + 2) +#define SECONDARY_NATIVE_BASE (dev->pci_conf_sb[1][0x19] << 8) | (dev->pci_conf_sb[1][0x18] & 0xf8) +#define SECONDARY_NATIVE_SIDE (((dev->pci_conf_sb[1][0x1d] << 8) | (dev->pci_conf_sb[1][0x1c] & 0xfc)) + 2) +#define BUS_MASTER_BASE ((dev->pci_conf_sb[1][0x20] & 0xf0) | (dev->pci_conf_sb[1][0x21] << 8)) #ifdef ENABLE_SIS_5511_LOG int sis_5511_do_log = ENABLE_SIS_5511_LOG; static void sis_5511_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (sis_5511_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (sis_5511_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define sis_5511_log(fmt, ...) +# define sis_5511_log(fmt, ...) #endif -typedef struct sis_5511_t -{ - uint8_t pci_conf[256], pci_conf_sb[2][256], - index, regs[16]; +typedef struct sis_5511_t { + uint8_t pci_conf[256], pci_conf_sb[2][256], + index, regs[16]; - int nb_pci_slot, sb_pci_slot; + int nb_pci_slot, sb_pci_slot; - sff8038i_t *ide_drive[2]; - smram_t *smram; - port_92_t *port_92; + sff8038i_t *ide_drive[2]; + smram_t *smram; + port_92_t *port_92; } sis_5511_t; static void sis_5511_shadow_recalc(sis_5511_t *dev) { - int i, state; + int i, state; uint32_t base; for (i = 0x80; i <= 0x86; i++) { - if (i == 0x86) { - state = (dev->pci_conf[i] & 0x80) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - state |= (dev->pci_conf[i] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; - mem_set_mem_state_both(0xf0000, 0x10000, state); - pclog("000F0000-000FFFFF\n"); - } else { - base = ((i & 0x07) << 15) + 0xc0000; + if (i == 0x86) { + state = (dev->pci_conf[i] & 0x80) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + state |= (dev->pci_conf[i] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; + mem_set_mem_state_both(0xf0000, 0x10000, state); + pclog("000F0000-000FFFFF\n"); + } else { + base = ((i & 0x07) << 15) + 0xc0000; - state = (dev->pci_conf[i] & 0x80) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - state |= (dev->pci_conf[i] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; - mem_set_mem_state_both(base, 0x4000, state); - pclog("%08X-%08X\n", base, base + 0x3fff); + state = (dev->pci_conf[i] & 0x80) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + state |= (dev->pci_conf[i] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; + mem_set_mem_state_both(base, 0x4000, state); + pclog("%08X-%08X\n", base, base + 0x3fff); - state = (dev->pci_conf[i] & 0x08) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - state |= (dev->pci_conf[i] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; - mem_set_mem_state_both(base + 0x4000, 0x4000, state); - pclog("%08X-%08X\n", base + 0x4000, base + 0x7fff); - } + state = (dev->pci_conf[i] & 0x08) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + state |= (dev->pci_conf[i] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; + mem_set_mem_state_both(base + 0x4000, 0x4000, state); + pclog("%08X-%08X\n", base + 0x4000, base + 0x7fff); + } } flushmmucache_nopc(); @@ -114,512 +112,503 @@ sis_5511_smram_recalc(sis_5511_t *dev) smram_disable_all(); switch (dev->pci_conf[0x65] >> 6) { - case 0: - smram_enable(dev->smram, 0x000e0000, 0x000e0000, 0x8000, dev->pci_conf[0x65] & 0x10, 1); - break; - case 1: - smram_enable(dev->smram, 0x000e0000, 0x000a0000, 0x8000, dev->pci_conf[0x65] & 0x10, 1); - break; - case 2: - smram_enable(dev->smram, 0x000e0000, 0x000b0000, 0x8000, dev->pci_conf[0x65] & 0x10, 1); - break; - } + case 0: + smram_enable(dev->smram, 0x000e0000, 0x000e0000, 0x8000, dev->pci_conf[0x65] & 0x10, 1); + break; + case 1: + smram_enable(dev->smram, 0x000e0000, 0x000a0000, 0x8000, dev->pci_conf[0x65] & 0x10, 1); + break; + case 2: + smram_enable(dev->smram, 0x000e0000, 0x000b0000, 0x8000, dev->pci_conf[0x65] & 0x10, 1); + break; + } - flushmmucache(); + flushmmucache(); } - -void sis_5513_ide_handler(sis_5511_t *dev) +void +sis_5513_ide_handler(sis_5511_t *dev) { - ide_pri_disable(); - ide_sec_disable(); - if (dev->pci_conf_sb[1][4] & 1) - { - if (dev->pci_conf_sb[1][0x4a] & 4) - { - ide_set_base(0, PRIMARY_COMP_NAT_SWITCH ? PRIMARY_NATIVE_BASE : 0x1f0); - ide_set_side(0, PRIMARY_COMP_NAT_SWITCH ? PRIMARY_NATIVE_SIDE : 0x3f6); - ide_pri_enable(); - } - if (dev->pci_conf_sb[1][0x4a] & 2) - { - ide_set_base(1, SECONDARY_COMP_NAT_SWITCH ? SECONDARY_NATIVE_BASE : 0x170); - ide_set_side(1, SECONDARY_COMP_NAT_SWITCH ? SECONDARY_NATIVE_SIDE : 0x376); - ide_sec_enable(); - } - } + ide_pri_disable(); + ide_sec_disable(); + if (dev->pci_conf_sb[1][4] & 1) { + if (dev->pci_conf_sb[1][0x4a] & 4) { + ide_set_base(0, PRIMARY_COMP_NAT_SWITCH ? PRIMARY_NATIVE_BASE : 0x1f0); + ide_set_side(0, PRIMARY_COMP_NAT_SWITCH ? PRIMARY_NATIVE_SIDE : 0x3f6); + ide_pri_enable(); + } + if (dev->pci_conf_sb[1][0x4a] & 2) { + ide_set_base(1, SECONDARY_COMP_NAT_SWITCH ? SECONDARY_NATIVE_BASE : 0x170); + ide_set_side(1, SECONDARY_COMP_NAT_SWITCH ? SECONDARY_NATIVE_SIDE : 0x376); + ide_sec_enable(); + } + } } -void sis_5513_bm_handler(sis_5511_t *dev) +void +sis_5513_bm_handler(sis_5511_t *dev) { - sff_bus_master_handler(dev->ide_drive[0], dev->pci_conf_sb[1][4] & 4, BUS_MASTER_BASE); - sff_bus_master_handler(dev->ide_drive[1], dev->pci_conf_sb[1][4] & 4, BUS_MASTER_BASE + 8); + sff_bus_master_handler(dev->ide_drive[0], dev->pci_conf_sb[1][4] & 4, BUS_MASTER_BASE); + sff_bus_master_handler(dev->ide_drive[1], dev->pci_conf_sb[1][4] & 4, BUS_MASTER_BASE + 8); } - static void sis_5511_write(int func, int addr, uint8_t val, void *priv) { - sis_5511_t *dev = (sis_5511_t *)priv; + sis_5511_t *dev = (sis_5511_t *) priv; switch (addr) { - case 0x07: /* Status - High Byte */ - dev->pci_conf[addr] &= 0xb0; - break; + case 0x07: /* Status - High Byte */ + dev->pci_conf[addr] &= 0xb0; + break; - case 0x50: - dev->pci_conf[addr] = val; - cpu_cache_ext_enabled = !!(val & 0x40); - cpu_update_waitstates(); - break; + case 0x50: + dev->pci_conf[addr] = val; + cpu_cache_ext_enabled = !!(val & 0x40); + cpu_update_waitstates(); + break; - case 0x51: - dev->pci_conf[addr] = val & 0xfe; - break; + case 0x51: + dev->pci_conf[addr] = val & 0xfe; + break; - case 0x52: - dev->pci_conf[addr] = val & 0x3f; - break; + case 0x52: + dev->pci_conf[addr] = val & 0x3f; + break; - case 0x53: case 0x54: - dev->pci_conf[addr] = val; - break; + case 0x53: + case 0x54: + dev->pci_conf[addr] = val; + break; - case 0x55: - dev->pci_conf[addr] = val & 0xf8; - break; + case 0x55: + dev->pci_conf[addr] = val & 0xf8; + break; - case 0x56 ... 0x59: - dev->pci_conf[addr] = val; - break; + case 0x56 ... 0x59: + dev->pci_conf[addr] = val; + break; - case 0x5a: - /* TODO: Fast Gate A20 Emulation and Fast Reset Emulation on the KBC. - The former (bit 7) means the chipset intercepts D1h to 64h and 00h to 60h. - The latter (bit 6) means the chipset intercepts all odd FXh to 64h. - Bit 5 sets fast reset latency. This should be fixed on the other SiS - chipsets as well. */ - dev->pci_conf[addr] = val; - break; + case 0x5a: + /* TODO: Fast Gate A20 Emulation and Fast Reset Emulation on the KBC. + The former (bit 7) means the chipset intercepts D1h to 64h and 00h to 60h. + The latter (bit 6) means the chipset intercepts all odd FXh to 64h. + Bit 5 sets fast reset latency. This should be fixed on the other SiS + chipsets as well. */ + dev->pci_conf[addr] = val; + break; - case 0x5b: - dev->pci_conf[addr] = val & 0xf7; - break; + case 0x5b: + dev->pci_conf[addr] = val & 0xf7; + break; - case 0x5c: - dev->pci_conf[addr] = val & 0xcf; - break; + case 0x5c: + dev->pci_conf[addr] = val & 0xcf; + break; - case 0x5d: - dev->pci_conf[addr] = val; - break; + case 0x5d: + dev->pci_conf[addr] = val; + break; - case 0x5e: - dev->pci_conf[addr] = val & 0xfe; - break; + case 0x5e: + dev->pci_conf[addr] = val & 0xfe; + break; - case 0x5f: - dev->pci_conf[addr] = val & 0xfe; - break; + case 0x5f: + dev->pci_conf[addr] = val & 0xfe; + break; - case 0x60: - dev->pci_conf[addr] = val & 0x3e; - if ((dev->pci_conf[0x68] & 1) && (val & 2)) { - smi_raise(); - dev->pci_conf[0x69] |= 1; - } - break; + case 0x60: + dev->pci_conf[addr] = val & 0x3e; + if ((dev->pci_conf[0x68] & 1) && (val & 2)) { + smi_raise(); + dev->pci_conf[0x69] |= 1; + } + break; - case 0x61 ... 0x64: - dev->pci_conf[addr] = val; - break; + case 0x61 ... 0x64: + dev->pci_conf[addr] = val; + break; - case 0x65: - dev->pci_conf[addr] = val & 0xd0; - sis_5511_smram_recalc(dev); - break; + case 0x65: + dev->pci_conf[addr] = val & 0xd0; + sis_5511_smram_recalc(dev); + break; - case 0x66: - dev->pci_conf[addr] = val & 0x7f; - break; + case 0x66: + dev->pci_conf[addr] = val & 0x7f; + break; - case 0x67: case 0x68: - dev->pci_conf[addr] = val; - break; + case 0x67: + case 0x68: + dev->pci_conf[addr] = val; + break; - case 0x69: - dev->pci_conf[addr] &= val; - break; + case 0x69: + dev->pci_conf[addr] &= val; + break; - case 0x6a ... 0x6e: - dev->pci_conf[addr] = val; - break; + case 0x6a ... 0x6e: + dev->pci_conf[addr] = val; + break; - case 0x6f: - dev->pci_conf[addr] = val & 0x3f; - break; + case 0x6f: + dev->pci_conf[addr] = val & 0x3f; + break; - case 0x70: /* DRAM Bank Register 0-0 */ - case 0x71: /* DRAM Bank Register 0-0 */ - case 0x72: /* DRAM Bank Register 0-1 */ - dev->pci_conf[addr] = val; - break; + case 0x70: /* DRAM Bank Register 0-0 */ + case 0x71: /* DRAM Bank Register 0-0 */ + case 0x72: /* DRAM Bank Register 0-1 */ + dev->pci_conf[addr] = val; + break; - case 0x73: /* DRAM Bank Register 0-1 */ - dev->pci_conf[addr] = val & 0x83; - break; + case 0x73: /* DRAM Bank Register 0-1 */ + dev->pci_conf[addr] = val & 0x83; + break; - case 0x74: /* DRAM Bank Register 1-0 */ - dev->pci_conf[addr] = val; - break; + case 0x74: /* DRAM Bank Register 1-0 */ + dev->pci_conf[addr] = val; + break; - case 0x75: /* DRAM Bank Register 1-0 */ - dev->pci_conf[addr] = val & 0x7f; - break; + case 0x75: /* DRAM Bank Register 1-0 */ + dev->pci_conf[addr] = val & 0x7f; + break; - case 0x76: /* DRAM Bank Register 1-1 */ - dev->pci_conf[addr] = val; - break; + case 0x76: /* DRAM Bank Register 1-1 */ + dev->pci_conf[addr] = val; + break; - case 0x77: /* DRAM Bank Register 1-1 */ - dev->pci_conf[addr] = val & 0x83; - break; + case 0x77: /* DRAM Bank Register 1-1 */ + dev->pci_conf[addr] = val & 0x83; + break; - case 0x78: /* DRAM Bank Register 2-0 */ - dev->pci_conf[addr] = val; - break; + case 0x78: /* DRAM Bank Register 2-0 */ + dev->pci_conf[addr] = val; + break; - case 0x79: /* DRAM Bank Register 2-0 */ - dev->pci_conf[addr] = val & 0x7f; - break; + case 0x79: /* DRAM Bank Register 2-0 */ + dev->pci_conf[addr] = val & 0x7f; + break; - case 0x7a: /* DRAM Bank Register 2-1 */ - dev->pci_conf[addr] = val; - break; + case 0x7a: /* DRAM Bank Register 2-1 */ + dev->pci_conf[addr] = val; + break; - case 0x7b: /* DRAM Bank Register 2-1 */ - dev->pci_conf[addr] = val & 0x83; - break; + case 0x7b: /* DRAM Bank Register 2-1 */ + dev->pci_conf[addr] = val & 0x83; + break; - case 0x7c: /* DRAM Bank Register 3-0 */ - dev->pci_conf[addr] = val; - break; + case 0x7c: /* DRAM Bank Register 3-0 */ + dev->pci_conf[addr] = val; + break; - case 0x7d: /* DRAM Bank Register 3-0 */ - dev->pci_conf[addr] = val & 0x7f; - break; + case 0x7d: /* DRAM Bank Register 3-0 */ + dev->pci_conf[addr] = val & 0x7f; + break; - case 0x7e: /* DRAM Bank Register 3-1 */ - dev->pci_conf[addr] = val; - break; + case 0x7e: /* DRAM Bank Register 3-1 */ + dev->pci_conf[addr] = val; + break; - case 0x7f: /* DRAM Bank Register 3-1 */ - dev->pci_conf[addr] = val & 0x83; - break; + case 0x7f: /* DRAM Bank Register 3-1 */ + dev->pci_conf[addr] = val & 0x83; + break; - case 0x80: - case 0x81: - case 0x82: - case 0x83: - case 0x84: - case 0x85: - case 0x86: - dev->pci_conf[addr] = val & ((addr == 0x86) ? 0xe8 : 0xee); - sis_5511_shadow_recalc(dev); - break; + case 0x80: + case 0x81: + case 0x82: + case 0x83: + case 0x84: + case 0x85: + case 0x86: + dev->pci_conf[addr] = val & ((addr == 0x86) ? 0xe8 : 0xee); + sis_5511_shadow_recalc(dev); + break; - case 0x90: /* 5512 General Purpose Register Index */ - case 0x91: /* 5512 General Purpose Register Index */ - case 0x92: /* 5512 General Purpose Register Index */ - case 0x93: /* 5512 General Purpose Register Index */ - dev->pci_conf[addr] = val; - break; - } - sis_5511_log("SiS 5511: dev->pci_conf[%02x] = %02x POST: %02x\n", addr, dev->pci_conf[addr], inb(0x80)); + case 0x90: /* 5512 General Purpose Register Index */ + case 0x91: /* 5512 General Purpose Register Index */ + case 0x92: /* 5512 General Purpose Register Index */ + case 0x93: /* 5512 General Purpose Register Index */ + dev->pci_conf[addr] = val; + break; + } + sis_5511_log("SiS 5511: dev->pci_conf[%02x] = %02x POST: %02x\n", addr, dev->pci_conf[addr], inb(0x80)); } static uint8_t sis_5511_read(int func, int addr, void *priv) { - sis_5511_t *dev = (sis_5511_t *)priv; - sis_5511_log("SiS 5511: dev->pci_conf[%02x] (%02x) POST %02x\n", addr, dev->pci_conf[addr], inb(0x80)); - return dev->pci_conf[addr]; + sis_5511_t *dev = (sis_5511_t *) priv; + sis_5511_log("SiS 5511: dev->pci_conf[%02x] (%02x) POST %02x\n", addr, dev->pci_conf[addr], inb(0x80)); + return dev->pci_conf[addr]; } -void sis_5513_pci_to_isa_write(int addr, uint8_t val, sis_5511_t *dev) +void +sis_5513_pci_to_isa_write(int addr, uint8_t val, sis_5511_t *dev) { - switch (addr) - { - case 0x04: /* Command */ - dev->pci_conf_sb[0][addr] = val & 7; - break; + switch (addr) { + case 0x04: /* Command */ + dev->pci_conf_sb[0][addr] = val & 7; + break; - case 0x07: /* Status */ - dev->pci_conf_sb[0][addr] &= val & 0x36; - break; + case 0x07: /* Status */ + dev->pci_conf_sb[0][addr] &= val & 0x36; + break; - case 0x40: /* BIOS Control Register */ - dev->pci_conf_sb[0][addr] = val & 0x3f; - break; + case 0x40: /* BIOS Control Register */ + dev->pci_conf_sb[0][addr] = val & 0x3f; + break; - case 0x41: /* INTA# Remapping Control Register */ - case 0x42: /* INTB# Remapping Control Register */ - case 0x43: /* INTC# Remapping Control Register */ - case 0x44: /* INTD# Remapping Control Register */ - dev->pci_conf_sb[0][addr] = val & 0x8f; - pci_set_irq_routing(addr & 7, (val & 0x80) ? (val & 0x80) : PCI_IRQ_DISABLED); - break; + case 0x41: /* INTA# Remapping Control Register */ + case 0x42: /* INTB# Remapping Control Register */ + case 0x43: /* INTC# Remapping Control Register */ + case 0x44: /* INTD# Remapping Control Register */ + dev->pci_conf_sb[0][addr] = val & 0x8f; + pci_set_irq_routing(addr & 7, (val & 0x80) ? (val & 0x80) : PCI_IRQ_DISABLED); + break; - case 0x48: /* ISA Master/DMA Memory Cycle Control Register 1 */ - case 0x49: /* ISA Master/DMA Memory Cycle Control Register 2 */ - case 0x4a: /* ISA Master/DMA Memory Cycle Control Register 3 */ - case 0x4b: /* ISA Master/DMA Memory Cycle Control Register 4 */ - case 0x4c: - case 0x4d: - case 0x4e: - case 0x4f: - case 0x50: - case 0x51: - case 0x52: - case 0x53: - case 0x54: - case 0x55: - case 0x56: - case 0x57: - case 0x58: - case 0x59: - case 0x5a: - case 0x5b: - case 0x5c: - case 0x5d: - case 0x5e: - case 0x5f: - dev->pci_conf_sb[0][addr] = val; - break; + case 0x48: /* ISA Master/DMA Memory Cycle Control Register 1 */ + case 0x49: /* ISA Master/DMA Memory Cycle Control Register 2 */ + case 0x4a: /* ISA Master/DMA Memory Cycle Control Register 3 */ + case 0x4b: /* ISA Master/DMA Memory Cycle Control Register 4 */ + case 0x4c: + case 0x4d: + case 0x4e: + case 0x4f: + case 0x50: + case 0x51: + case 0x52: + case 0x53: + case 0x54: + case 0x55: + case 0x56: + case 0x57: + case 0x58: + case 0x59: + case 0x5a: + case 0x5b: + case 0x5c: + case 0x5d: + case 0x5e: + case 0x5f: + dev->pci_conf_sb[0][addr] = val; + break; - case 0x60: /* MIRQ0 Remapping Control Register */ - case 0x61: /* MIRQ1 Remapping Control Register */ - dev->pci_conf_sb[0][addr] = val & 0xcf; - pci_set_mirq_routing(addr & 1, (val & 0x80) ? (val & 0x0f) : PCI_IRQ_DISABLED); - break; + case 0x60: /* MIRQ0 Remapping Control Register */ + case 0x61: /* MIRQ1 Remapping Control Register */ + dev->pci_conf_sb[0][addr] = val & 0xcf; + pci_set_mirq_routing(addr & 1, (val & 0x80) ? (val & 0x0f) : PCI_IRQ_DISABLED); + break; - case 0x62: /* On-board Device DMA Control Register */ - dev->pci_conf_sb[0][addr] = val; - break; + case 0x62: /* On-board Device DMA Control Register */ + dev->pci_conf_sb[0][addr] = val; + break; - case 0x63: /* IDEIRQ Remapping Control Register */ - dev->pci_conf_sb[0][addr] = val & 0x8f; - if (val & 0x80) - { - sff_set_irq_line(dev->ide_drive[0], (val & 0x80) ? (val & 0x0f) : PCI_IRQ_DISABLED); - sff_set_irq_line(dev->ide_drive[1], (val & 0x80) ? (val & 0x0f) : PCI_IRQ_DISABLED); - } - break; + case 0x63: /* IDEIRQ Remapping Control Register */ + dev->pci_conf_sb[0][addr] = val & 0x8f; + if (val & 0x80) { + sff_set_irq_line(dev->ide_drive[0], (val & 0x80) ? (val & 0x0f) : PCI_IRQ_DISABLED); + sff_set_irq_line(dev->ide_drive[1], (val & 0x80) ? (val & 0x0f) : PCI_IRQ_DISABLED); + } + break; - case 0x64: /* GPIO0 Control Register */ - dev->pci_conf_sb[0][addr] = val & 0xef; - break; + case 0x64: /* GPIO0 Control Register */ + dev->pci_conf_sb[0][addr] = val & 0xef; + break; - case 0x65: - dev->pci_conf_sb[0][addr] = val & 0x80; - break; + case 0x65: + dev->pci_conf_sb[0][addr] = val & 0x80; + break; - case 0x66: /* GPIO0 Output Mode Control Register */ - case 0x67: /* GPIO0 Output Mode Control Register */ - dev->pci_conf_sb[0][addr] = val; - break; + case 0x66: /* GPIO0 Output Mode Control Register */ + case 0x67: /* GPIO0 Output Mode Control Register */ + dev->pci_conf_sb[0][addr] = val; + break; - case 0x6a: /* GPIO Status Register */ - dev->pci_conf_sb[0][addr] &= val & 0x15; - break; - } + case 0x6a: /* GPIO Status Register */ + dev->pci_conf_sb[0][addr] &= val & 0x15; + break; + } } -void sis_5513_ide_write(int addr, uint8_t val, sis_5511_t *dev) +void +sis_5513_ide_write(int addr, uint8_t val, sis_5511_t *dev) { - switch (addr) - { - case 0x04: /* Command low byte */ - dev->pci_conf_sb[1][addr] = val & 5; - sis_5513_ide_handler(dev); - sis_5513_bm_handler(dev); - break; - case 0x07: /* Status high byte */ - dev->pci_conf_sb[1][addr] &= val & 0x3f; - break; - case 0x09: /* Programming Interface Byte */ - dev->pci_conf_sb[1][addr] = val; - sis_5513_ide_handler(dev); - break; - case 0x0d: /* Latency Timer */ - dev->pci_conf_sb[1][addr] = val; - break; + switch (addr) { + case 0x04: /* Command low byte */ + dev->pci_conf_sb[1][addr] = val & 5; + sis_5513_ide_handler(dev); + sis_5513_bm_handler(dev); + break; + case 0x07: /* Status high byte */ + dev->pci_conf_sb[1][addr] &= val & 0x3f; + break; + case 0x09: /* Programming Interface Byte */ + dev->pci_conf_sb[1][addr] = val; + sis_5513_ide_handler(dev); + break; + case 0x0d: /* Latency Timer */ + dev->pci_conf_sb[1][addr] = val; + break; - case 0x10: /* Primary Channel Base Address Register */ - case 0x11: /* Primary Channel Base Address Register */ - case 0x12: /* Primary Channel Base Address Register */ - case 0x13: /* Primary Channel Base Address Register */ - case 0x14: /* Primary Channel Base Address Register */ - case 0x15: /* Primary Channel Base Address Register */ - case 0x16: /* Primary Channel Base Address Register */ - case 0x17: /* Primary Channel Base Address Register */ - case 0x18: /* Secondary Channel Base Address Register */ - case 0x19: /* Secondary Channel Base Address Register */ - case 0x1a: /* Secondary Channel Base Address Register */ - case 0x1b: /* Secondary Channel Base Address Register */ - case 0x1c: /* Secondary Channel Base Address Register */ - case 0x1d: /* Secondary Channel Base Address Register */ - case 0x1e: /* Secondary Channel Base Address Register */ - case 0x1f: /* Secondary Channel Base Address Register */ - dev->pci_conf_sb[1][addr] = val; - sis_5513_ide_handler(dev); - break; + case 0x10: /* Primary Channel Base Address Register */ + case 0x11: /* Primary Channel Base Address Register */ + case 0x12: /* Primary Channel Base Address Register */ + case 0x13: /* Primary Channel Base Address Register */ + case 0x14: /* Primary Channel Base Address Register */ + case 0x15: /* Primary Channel Base Address Register */ + case 0x16: /* Primary Channel Base Address Register */ + case 0x17: /* Primary Channel Base Address Register */ + case 0x18: /* Secondary Channel Base Address Register */ + case 0x19: /* Secondary Channel Base Address Register */ + case 0x1a: /* Secondary Channel Base Address Register */ + case 0x1b: /* Secondary Channel Base Address Register */ + case 0x1c: /* Secondary Channel Base Address Register */ + case 0x1d: /* Secondary Channel Base Address Register */ + case 0x1e: /* Secondary Channel Base Address Register */ + case 0x1f: /* Secondary Channel Base Address Register */ + dev->pci_conf_sb[1][addr] = val; + sis_5513_ide_handler(dev); + break; - case 0x20: /* Bus Master IDE Control Register Base Address */ - case 0x21: /* Bus Master IDE Control Register Base Address */ - case 0x22: /* Bus Master IDE Control Register Base Address */ - case 0x23: /* Bus Master IDE Control Register Base Address */ - dev->pci_conf_sb[1][addr] = val; - sis_5513_bm_handler(dev); - break; + case 0x20: /* Bus Master IDE Control Register Base Address */ + case 0x21: /* Bus Master IDE Control Register Base Address */ + case 0x22: /* Bus Master IDE Control Register Base Address */ + case 0x23: /* Bus Master IDE Control Register Base Address */ + dev->pci_conf_sb[1][addr] = val; + sis_5513_bm_handler(dev); + break; - case 0x30: /* Expansion ROM Base Address */ - case 0x31: /* Expansion ROM Base Address */ - case 0x32: /* Expansion ROM Base Address */ - case 0x33: /* Expansion ROM Base Address */ - dev->pci_conf_sb[1][addr] = val; - break; + case 0x30: /* Expansion ROM Base Address */ + case 0x31: /* Expansion ROM Base Address */ + case 0x32: /* Expansion ROM Base Address */ + case 0x33: /* Expansion ROM Base Address */ + dev->pci_conf_sb[1][addr] = val; + break; - case 0x40: /* IDE Primary Channel/Master Drive Data Recovery Time Control */ - case 0x41: /* IDE Primary Channel/Master Drive DataActive Time Control */ - case 0x42: /* IDE Primary Channel/Slave Drive Data Recovery Time Control */ - case 0x43: /* IDE Primary Channel/Slave Drive Data Active Time Control */ - case 0x44: /* IDE Secondary Channel/Master Drive Data Recovery Time Control */ - case 0x45: /* IDE Secondary Channel/Master Drive Data Active Time Control */ - case 0x46: /* IDE Secondary Channel/Slave Drive Data Recovery Time Control */ - case 0x47: /* IDE Secondary Channel/Slave Drive Data Active Time Control */ - case 0x48: /* IDE Command Recovery Time Control */ - case 0x49: /* IDE Command Active Time Control */ - dev->pci_conf_sb[1][addr] = val; - break; + case 0x40: /* IDE Primary Channel/Master Drive Data Recovery Time Control */ + case 0x41: /* IDE Primary Channel/Master Drive DataActive Time Control */ + case 0x42: /* IDE Primary Channel/Slave Drive Data Recovery Time Control */ + case 0x43: /* IDE Primary Channel/Slave Drive Data Active Time Control */ + case 0x44: /* IDE Secondary Channel/Master Drive Data Recovery Time Control */ + case 0x45: /* IDE Secondary Channel/Master Drive Data Active Time Control */ + case 0x46: /* IDE Secondary Channel/Slave Drive Data Recovery Time Control */ + case 0x47: /* IDE Secondary Channel/Slave Drive Data Active Time Control */ + case 0x48: /* IDE Command Recovery Time Control */ + case 0x49: /* IDE Command Active Time Control */ + dev->pci_conf_sb[1][addr] = val; + break; - case 0x4a: /* IDE General Control Register 0 */ - dev->pci_conf_sb[1][addr] = val & 0x9f; - sis_5513_ide_handler(dev); - break; + case 0x4a: /* IDE General Control Register 0 */ + dev->pci_conf_sb[1][addr] = val & 0x9f; + sis_5513_ide_handler(dev); + break; - case 0x4b: /* IDE General Control Register 1 */ - dev->pci_conf_sb[1][addr] = val & 0xef; - break; + case 0x4b: /* IDE General Control Register 1 */ + dev->pci_conf_sb[1][addr] = val & 0xef; + break; - case 0x4c: /* Prefetch Count of Primary Channel (Low Byte) */ - case 0x4d: /* Prefetch Count of Primary Channel (High Byte) */ - case 0x4e: /* Prefetch Count of Secondary Channel (Low Byte) */ - case 0x4f: /* Prefetch Count of Secondary Channel (High Byte) */ - dev->pci_conf_sb[1][addr] = val; - break; - } + case 0x4c: /* Prefetch Count of Primary Channel (Low Byte) */ + case 0x4d: /* Prefetch Count of Primary Channel (High Byte) */ + case 0x4e: /* Prefetch Count of Secondary Channel (Low Byte) */ + case 0x4f: /* Prefetch Count of Secondary Channel (High Byte) */ + dev->pci_conf_sb[1][addr] = val; + break; + } } static void sis_5513_write(int func, int addr, uint8_t val, void *priv) { - sis_5511_t *dev = (sis_5511_t *)priv; - switch (func) - { - case 0: - sis_5513_pci_to_isa_write(addr, val, dev); - break; - case 1: - sis_5513_ide_write(addr, val, dev); - break; - } - sis_5511_log("SiS 5513: dev->pci_conf[%02x][%02x] = %02x POST: %02x\n", func, addr, dev->pci_conf_sb[func][addr], inb(0x80)); + sis_5511_t *dev = (sis_5511_t *) priv; + switch (func) { + case 0: + sis_5513_pci_to_isa_write(addr, val, dev); + break; + case 1: + sis_5513_ide_write(addr, val, dev); + break; + } + sis_5511_log("SiS 5513: dev->pci_conf[%02x][%02x] = %02x POST: %02x\n", func, addr, dev->pci_conf_sb[func][addr], inb(0x80)); } static uint8_t sis_5513_read(int func, int addr, void *priv) { - sis_5511_t *dev = (sis_5511_t *)priv; + sis_5511_t *dev = (sis_5511_t *) priv; - sis_5511_log("SiS 5513: dev->pci_conf[%02x][%02x] = %02x POST %02x\n", func, addr, dev->pci_conf_sb[func][addr], inb(0x80)); - if ((func >= 0) && (func <= 1)) - return dev->pci_conf_sb[func][addr]; - else - return 0xff; + sis_5511_log("SiS 5513: dev->pci_conf[%02x][%02x] = %02x POST %02x\n", func, addr, dev->pci_conf_sb[func][addr], inb(0x80)); + if ((func >= 0) && (func <= 1)) + return dev->pci_conf_sb[func][addr]; + else + return 0xff; } static void sis_5513_isa_write(uint16_t addr, uint8_t val, void *priv) { - sis_5511_t *dev = (sis_5511_t *)priv; + sis_5511_t *dev = (sis_5511_t *) priv; - switch (addr) - { - case 0x22: - dev->index = val - 0x50; - break; - case 0x23: - switch (dev->index) - { - case 0x00: - dev->regs[dev->index] = val & 0xed; - switch (val >> 6) - { - case 0: - cpu_set_isa_speed(7159091); - break; - case 1: - cpu_set_isa_pci_div(4); - break; - case 2: - cpu_set_isa_pci_div(3); - break; - } - break; - case 0x01: - dev->regs[dev->index] = val & 0xf4; - break; - case 0x03: - dev->regs[dev->index] = val & 3; - break; - case 0x04: /* BIOS Register */ - dev->regs[dev->index] = val; - break; - case 0x05: - dev->regs[dev->index] = inb(0x70); - break; - case 0x08: - case 0x09: - case 0x0a: - case 0x0b: - dev->regs[dev->index] = val; - break; - } - sis_5511_log("SiS 5513-ISA: dev->regs[%02x] = %02x POST: %02x\n", dev->index + 0x50, dev->regs[dev->index], inb(0x80)); - break; - } + switch (addr) { + case 0x22: + dev->index = val - 0x50; + break; + case 0x23: + switch (dev->index) { + case 0x00: + dev->regs[dev->index] = val & 0xed; + switch (val >> 6) { + case 0: + cpu_set_isa_speed(7159091); + break; + case 1: + cpu_set_isa_pci_div(4); + break; + case 2: + cpu_set_isa_pci_div(3); + break; + } + break; + case 0x01: + dev->regs[dev->index] = val & 0xf4; + break; + case 0x03: + dev->regs[dev->index] = val & 3; + break; + case 0x04: /* BIOS Register */ + dev->regs[dev->index] = val; + break; + case 0x05: + dev->regs[dev->index] = inb(0x70); + break; + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + dev->regs[dev->index] = val; + break; + } + sis_5511_log("SiS 5513-ISA: dev->regs[%02x] = %02x POST: %02x\n", dev->index + 0x50, dev->regs[dev->index], inb(0x80)); + break; + } } static uint8_t sis_5513_isa_read(uint16_t addr, void *priv) { - sis_5511_t *dev = (sis_5511_t *)priv; + sis_5511_t *dev = (sis_5511_t *) priv; - if (addr == 0x23) - { - sis_5511_log("SiS 5513-ISA: dev->regs[%02x] (%02x) POST: %02x\n", dev->index + 0x50, dev->regs[dev->index], inb(0x80)); - return dev->regs[dev->index]; - } - else - return 0xff; + if (addr == 0x23) { + sis_5511_log("SiS 5513-ISA: dev->regs[%02x] (%02x) POST: %02x\n", dev->index + 0x50, dev->regs[dev->index], inb(0x80)); + return dev->regs[dev->index]; + } else + return 0xff; } - static void sis_5511_reset(void *priv) { - sis_5511_t *dev = (sis_5511_t *)priv; + sis_5511_t *dev = (sis_5511_t *) priv; /* SiS 5511 */ dev->pci_conf[0x00] = 0x39; @@ -628,12 +617,12 @@ sis_5511_reset(void *priv) dev->pci_conf[0x03] = 0x55; dev->pci_conf[0x04] = 0x07; dev->pci_conf[0x05] = dev->pci_conf[0x06] = 0x00; - dev->pci_conf[0x07] = 0x02; - dev->pci_conf[0x08] = 0x00; + dev->pci_conf[0x07] = 0x02; + dev->pci_conf[0x08] = 0x00; dev->pci_conf[0x09] = dev->pci_conf[0x0a] = 0x00; - dev->pci_conf[0x0b] = 0x06; + dev->pci_conf[0x0b] = 0x06; dev->pci_conf[0x50] = dev->pci_conf[0x51] = 0x00; - dev->pci_conf[0x52] = 0x20; + dev->pci_conf[0x52] = 0x20; dev->pci_conf[0x53] = dev->pci_conf[0x54] = 0x00; dev->pci_conf[0x55] = dev->pci_conf[0x56] = 0x00; dev->pci_conf[0x57] = dev->pci_conf[0x58] = 0x00; @@ -642,10 +631,10 @@ sis_5511_reset(void *priv) dev->pci_conf[0x5d] = dev->pci_conf[0x5e] = 0x00; dev->pci_conf[0x5f] = dev->pci_conf[0x60] = 0x00; dev->pci_conf[0x61] = dev->pci_conf[0x62] = 0xff; - dev->pci_conf[0x63] = 0xff; + dev->pci_conf[0x63] = 0xff; dev->pci_conf[0x64] = dev->pci_conf[0x65] = 0x00; - dev->pci_conf[0x66] = 0x00; - dev->pci_conf[0x67] = 0xff; + dev->pci_conf[0x66] = 0x00; + dev->pci_conf[0x67] = 0xff; dev->pci_conf[0x68] = dev->pci_conf[0x69] = 0x00; dev->pci_conf[0x6a] = dev->pci_conf[0x6b] = 0x00; dev->pci_conf[0x6c] = dev->pci_conf[0x6d] = 0x00; @@ -654,49 +643,49 @@ sis_5511_reset(void *priv) cpu_cache_ext_enabled = 0; cpu_update_waitstates(); - dev->pci_conf[0x6b] = 0xff; - dev->pci_conf[0x6c] = 0xff; - dev->pci_conf[0x70] = 4; - dev->pci_conf[0x72] = 4; - dev->pci_conf[0x73] = 0x80; - dev->pci_conf[0x74] = 4; - dev->pci_conf[0x76] = 4; - dev->pci_conf[0x77] = 0x80; - dev->pci_conf[0x78] = 4; - dev->pci_conf[0x7a] = 4; - dev->pci_conf[0x7b] = 0x80; - dev->pci_conf[0x7c] = 4; - dev->pci_conf[0x7e] = 4; - dev->pci_conf[0x7f] = 0x80; - dev->pci_conf[0x80] = 0x00; - dev->pci_conf[0x81] = 0x00; - dev->pci_conf[0x82] = 0x00; - dev->pci_conf[0x83] = 0x00; - dev->pci_conf[0x84] = 0x00; - dev->pci_conf[0x85] = 0x00; - dev->pci_conf[0x86] = 0x00; - sis_5511_smram_recalc(dev); - sis_5511_shadow_recalc(dev); + dev->pci_conf[0x6b] = 0xff; + dev->pci_conf[0x6c] = 0xff; + dev->pci_conf[0x70] = 4; + dev->pci_conf[0x72] = 4; + dev->pci_conf[0x73] = 0x80; + dev->pci_conf[0x74] = 4; + dev->pci_conf[0x76] = 4; + dev->pci_conf[0x77] = 0x80; + dev->pci_conf[0x78] = 4; + dev->pci_conf[0x7a] = 4; + dev->pci_conf[0x7b] = 0x80; + dev->pci_conf[0x7c] = 4; + dev->pci_conf[0x7e] = 4; + dev->pci_conf[0x7f] = 0x80; + dev->pci_conf[0x80] = 0x00; + dev->pci_conf[0x81] = 0x00; + dev->pci_conf[0x82] = 0x00; + dev->pci_conf[0x83] = 0x00; + dev->pci_conf[0x84] = 0x00; + dev->pci_conf[0x85] = 0x00; + dev->pci_conf[0x86] = 0x00; + sis_5511_smram_recalc(dev); + sis_5511_shadow_recalc(dev); - /* SiS 5513 */ - dev->pci_conf_sb[0][0x00] = 0x39; - dev->pci_conf_sb[0][0x01] = 0x10; - dev->pci_conf_sb[0][0x02] = 8; - dev->pci_conf_sb[0][0x04] = 7; - dev->pci_conf_sb[0][0x0a] = 1; - dev->pci_conf_sb[0][0x0b] = 6; - dev->pci_conf_sb[0][0x0e] = 0x80; + /* SiS 5513 */ + dev->pci_conf_sb[0][0x00] = 0x39; + dev->pci_conf_sb[0][0x01] = 0x10; + dev->pci_conf_sb[0][0x02] = 8; + dev->pci_conf_sb[0][0x04] = 7; + dev->pci_conf_sb[0][0x0a] = 1; + dev->pci_conf_sb[0][0x0b] = 6; + dev->pci_conf_sb[0][0x0e] = 0x80; - /* SiS 5513 IDE Controller */ - dev->pci_conf_sb[1][0x00] = 0x39; - dev->pci_conf_sb[1][0x01] = 0x10; - dev->pci_conf_sb[1][0x02] = 0x13; - dev->pci_conf_sb[1][0x03] = 0x55; - dev->pci_conf_sb[1][0x0a] = 1; - dev->pci_conf_sb[1][0x0b] = 1; - dev->pci_conf_sb[1][0x0e] = 0x80; - sff_set_slot(dev->ide_drive[0], dev->sb_pci_slot); - sff_set_slot(dev->ide_drive[1], dev->sb_pci_slot); + /* SiS 5513 IDE Controller */ + dev->pci_conf_sb[1][0x00] = 0x39; + dev->pci_conf_sb[1][0x01] = 0x10; + dev->pci_conf_sb[1][0x02] = 0x13; + dev->pci_conf_sb[1][0x03] = 0x55; + dev->pci_conf_sb[1][0x0a] = 1; + dev->pci_conf_sb[1][0x0b] = 1; + dev->pci_conf_sb[1][0x0e] = 0x80; + sff_set_slot(dev->ide_drive[0], dev->sb_pci_slot); + sff_set_slot(dev->ide_drive[1], dev->sb_pci_slot); sff_bus_master_reset(dev->ide_drive[0], BUS_MASTER_BASE); sff_bus_master_reset(dev->ide_drive[1], BUS_MASTER_BASE + 8); } @@ -704,51 +693,51 @@ sis_5511_reset(void *priv) static void sis_5511_close(void *priv) { - sis_5511_t *dev = (sis_5511_t *)priv; + sis_5511_t *dev = (sis_5511_t *) priv; - smram_del(dev->smram); - free(dev); + smram_del(dev->smram); + free(dev); } static void * sis_5511_init(const device_t *info) { - sis_5511_t *dev = (sis_5511_t *)malloc(sizeof(sis_5511_t)); - memset(dev, 0, sizeof(sis_5511_t)); + sis_5511_t *dev = (sis_5511_t *) malloc(sizeof(sis_5511_t)); + memset(dev, 0, sizeof(sis_5511_t)); - dev->nb_pci_slot = pci_add_card(PCI_ADD_NORTHBRIDGE, sis_5511_read, sis_5511_write, dev); /* Device 0: SiS 5511 */ - dev->sb_pci_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, sis_5513_read, sis_5513_write, dev); /* Device 1: SiS 5513 */ - io_sethandler(0x0022, 0x0002, sis_5513_isa_read, NULL, NULL, sis_5513_isa_write, NULL, NULL, dev); /* Ports 22h-23h: SiS 5513 ISA */ + dev->nb_pci_slot = pci_add_card(PCI_ADD_NORTHBRIDGE, sis_5511_read, sis_5511_write, dev); /* Device 0: SiS 5511 */ + dev->sb_pci_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, sis_5513_read, sis_5513_write, dev); /* Device 1: SiS 5513 */ + io_sethandler(0x0022, 0x0002, sis_5513_isa_read, NULL, NULL, sis_5513_isa_write, NULL, NULL, dev); /* Ports 22h-23h: SiS 5513 ISA */ - /* MIRQ */ - pci_enable_mirq(0); - pci_enable_mirq(1); + /* MIRQ */ + pci_enable_mirq(0); + pci_enable_mirq(1); - /* Port 92h */ - dev->port_92 = device_add(&port_92_device); + /* Port 92h */ + dev->port_92 = device_add(&port_92_device); - /* SFF IDE */ - dev->ide_drive[0] = device_add_inst(&sff8038i_device, 1); - dev->ide_drive[1] = device_add_inst(&sff8038i_device, 2); + /* SFF IDE */ + dev->ide_drive[0] = device_add_inst(&sff8038i_device, 1); + dev->ide_drive[1] = device_add_inst(&sff8038i_device, 2); - /* SMRAM */ - dev->smram = smram_add(); + /* SMRAM */ + dev->smram = smram_add(); - sis_5511_reset(dev); + sis_5511_reset(dev); - return dev; + return dev; } const device_t sis_5511_device = { - .name = "SiS 5511", + .name = "SiS 5511", .internal_name = "sis_5511", - .flags = DEVICE_PCI, - .local = 0, - .init = sis_5511_init, - .close = sis_5511_close, - .reset = sis_5511_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = sis_5511_init, + .close = sis_5511_close, + .reset = sis_5511_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/sis_5571.c b/src/chipset/sis_5571.c index 2d9d92c8d..c761e4f85 100644 --- a/src/chipset/sis_5571.c +++ b/src/chipset/sis_5571.c @@ -37,720 +37,705 @@ #include <86box/chipset.h> /* Shadow RAM */ -#define LSB_READ ((dev->pci_conf[0x70 + (cur_reg & 0x07)] & 0x08) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) -#define LSB_WRITE ((dev->pci_conf[0x70 + (cur_reg & 0x07)] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY) -#define MSB_READ ((dev->pci_conf[0x70 + (cur_reg & 0x07)] & 0x80) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) -#define MSB_WRITE ((dev->pci_conf[0x70 + (cur_reg & 0x07)] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY) -#define SYSTEM_READ ((dev->pci_conf[0x76] & 0x80) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) +#define LSB_READ ((dev->pci_conf[0x70 + (cur_reg & 0x07)] & 0x08) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) +#define LSB_WRITE ((dev->pci_conf[0x70 + (cur_reg & 0x07)] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY) +#define MSB_READ ((dev->pci_conf[0x70 + (cur_reg & 0x07)] & 0x80) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) +#define MSB_WRITE ((dev->pci_conf[0x70 + (cur_reg & 0x07)] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY) +#define SYSTEM_READ ((dev->pci_conf[0x76] & 0x80) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) #define SYSTEM_WRITE ((dev->pci_conf[0x76] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY) /* IDE Flags (1 Native / 0 Compatibility)*/ -#define PRIMARY_COMP_NAT_SWITCH (dev->pci_conf_sb[1][9] & 1) +#define PRIMARY_COMP_NAT_SWITCH (dev->pci_conf_sb[1][9] & 1) #define SECONDARY_COMP_NAT_SWITCH (dev->pci_conf_sb[1][9] & 4) -#define PRIMARY_NATIVE_BASE (dev->pci_conf_sb[1][0x11] << 8) | (dev->pci_conf_sb[1][0x10] & 0xf8) -#define PRIMARY_NATIVE_SIDE (((dev->pci_conf_sb[1][0x15] << 8) | (dev->pci_conf_sb[1][0x14] & 0xfc)) + 2) -#define SECONDARY_NATIVE_BASE (dev->pci_conf_sb[1][0x19] << 8) | (dev->pci_conf_sb[1][0x18] & 0xf8) -#define SECONDARY_NATIVE_SIDE (((dev->pci_conf_sb[1][0x1d] << 8) | (dev->pci_conf_sb[1][0x1c] & 0xfc)) + 2) -#define BUS_MASTER_BASE ((dev->pci_conf_sb[1][0x20] & 0xf0) | (dev->pci_conf_sb[1][0x21] << 8)) +#define PRIMARY_NATIVE_BASE (dev->pci_conf_sb[1][0x11] << 8) | (dev->pci_conf_sb[1][0x10] & 0xf8) +#define PRIMARY_NATIVE_SIDE (((dev->pci_conf_sb[1][0x15] << 8) | (dev->pci_conf_sb[1][0x14] & 0xfc)) + 2) +#define SECONDARY_NATIVE_BASE (dev->pci_conf_sb[1][0x19] << 8) | (dev->pci_conf_sb[1][0x18] & 0xf8) +#define SECONDARY_NATIVE_SIDE (((dev->pci_conf_sb[1][0x1d] << 8) | (dev->pci_conf_sb[1][0x1c] & 0xfc)) + 2) +#define BUS_MASTER_BASE ((dev->pci_conf_sb[1][0x20] & 0xf0) | (dev->pci_conf_sb[1][0x21] << 8)) #ifdef ENABLE_SIS_5571_LOG int sis_5571_do_log = ENABLE_SIS_5571_LOG; static void sis_5571_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (sis_5571_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (sis_5571_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define sis_5571_log(fmt, ...) +# define sis_5571_log(fmt, ...) #endif -typedef struct sis_5571_t -{ - uint8_t pci_conf[256], pci_conf_sb[3][256]; +typedef struct sis_5571_t { + uint8_t pci_conf[256], pci_conf_sb[3][256]; - int nb_pci_slot, sb_pci_slot; + int nb_pci_slot, sb_pci_slot; - port_92_t *port_92; - sff8038i_t *ide_drive[2]; - smram_t *smram; - usb_t *usb; + port_92_t *port_92; + sff8038i_t *ide_drive[2]; + smram_t *smram; + usb_t *usb; } sis_5571_t; static void sis_5571_shadow_recalc(int cur_reg, sis_5571_t *dev) { - if (cur_reg != 0x76) - { - mem_set_mem_state_both(0xc0000 + (0x8000 * (cur_reg & 0x07)), 0x4000, LSB_READ | LSB_WRITE); - mem_set_mem_state_both(0xc4000 + (0x8000 * (cur_reg & 0x07)), 0x4000, MSB_READ | MSB_WRITE); - } - else - mem_set_mem_state_both(0xf0000, 0x10000, SYSTEM_READ | SYSTEM_WRITE); + if (cur_reg != 0x76) { + mem_set_mem_state_both(0xc0000 + (0x8000 * (cur_reg & 0x07)), 0x4000, LSB_READ | LSB_WRITE); + mem_set_mem_state_both(0xc4000 + (0x8000 * (cur_reg & 0x07)), 0x4000, MSB_READ | MSB_WRITE); + } else + mem_set_mem_state_both(0xf0000, 0x10000, SYSTEM_READ | SYSTEM_WRITE); - flushmmucache_nopc(); + flushmmucache_nopc(); } static void sis_5571_smm_recalc(sis_5571_t *dev) { - smram_disable_all(); + smram_disable_all(); - switch ((dev->pci_conf[0xa3] & 0xc0) >> 6) - { - case 0x00: - smram_enable(dev->smram, 0xe0000, 0xe0000, 0x8000, (dev->pci_conf[0xa3] & 0x10), 1); - break; - case 0x01: - smram_enable(dev->smram, 0xe0000, 0xa0000, 0x8000, (dev->pci_conf[0xa3] & 0x10), 1); - break; - case 0x02: - smram_enable(dev->smram, 0xe0000, 0xb0000, 0x8000, (dev->pci_conf[0xa3] & 0x10), 1); - break; - case 0x03: - smram_enable(dev->smram, 0xa0000, 0xa0000, 0x10000, (dev->pci_conf[0xa3] & 0x10), 1); - break; - } + switch ((dev->pci_conf[0xa3] & 0xc0) >> 6) { + case 0x00: + smram_enable(dev->smram, 0xe0000, 0xe0000, 0x8000, (dev->pci_conf[0xa3] & 0x10), 1); + break; + case 0x01: + smram_enable(dev->smram, 0xe0000, 0xa0000, 0x8000, (dev->pci_conf[0xa3] & 0x10), 1); + break; + case 0x02: + smram_enable(dev->smram, 0xe0000, 0xb0000, 0x8000, (dev->pci_conf[0xa3] & 0x10), 1); + break; + case 0x03: + smram_enable(dev->smram, 0xa0000, 0xa0000, 0x10000, (dev->pci_conf[0xa3] & 0x10), 1); + break; + } - flushmmucache(); + flushmmucache(); } -void sis_5571_ide_handler(sis_5571_t *dev) +void +sis_5571_ide_handler(sis_5571_t *dev) { - ide_pri_disable(); - ide_sec_disable(); - if (dev->pci_conf_sb[1][4] & 1) - { - if (dev->pci_conf_sb[1][0x4a] & 4) - { - ide_set_base(0, PRIMARY_COMP_NAT_SWITCH ? PRIMARY_NATIVE_BASE : 0x1f0); - ide_set_side(0, PRIMARY_COMP_NAT_SWITCH ? PRIMARY_NATIVE_SIDE : 0x3f6); - ide_pri_enable(); - } - if (dev->pci_conf_sb[1][0x4a] & 2) - { - ide_set_base(1, SECONDARY_COMP_NAT_SWITCH ? SECONDARY_NATIVE_BASE : 0x170); - ide_set_side(1, SECONDARY_COMP_NAT_SWITCH ? SECONDARY_NATIVE_SIDE : 0x376); - ide_sec_enable(); - } - } + ide_pri_disable(); + ide_sec_disable(); + if (dev->pci_conf_sb[1][4] & 1) { + if (dev->pci_conf_sb[1][0x4a] & 4) { + ide_set_base(0, PRIMARY_COMP_NAT_SWITCH ? PRIMARY_NATIVE_BASE : 0x1f0); + ide_set_side(0, PRIMARY_COMP_NAT_SWITCH ? PRIMARY_NATIVE_SIDE : 0x3f6); + ide_pri_enable(); + } + if (dev->pci_conf_sb[1][0x4a] & 2) { + ide_set_base(1, SECONDARY_COMP_NAT_SWITCH ? SECONDARY_NATIVE_BASE : 0x170); + ide_set_side(1, SECONDARY_COMP_NAT_SWITCH ? SECONDARY_NATIVE_SIDE : 0x376); + ide_sec_enable(); + } + } } -void sis_5571_bm_handler(sis_5571_t *dev) +void +sis_5571_bm_handler(sis_5571_t *dev) { - sff_bus_master_handler(dev->ide_drive[0], dev->pci_conf_sb[1][4] & 4, BUS_MASTER_BASE); - sff_bus_master_handler(dev->ide_drive[1], dev->pci_conf_sb[1][4] & 4, BUS_MASTER_BASE + 8); + sff_bus_master_handler(dev->ide_drive[0], dev->pci_conf_sb[1][4] & 4, BUS_MASTER_BASE); + sff_bus_master_handler(dev->ide_drive[1], dev->pci_conf_sb[1][4] & 4, BUS_MASTER_BASE + 8); } static void memory_pci_bridge_write(int func, int addr, uint8_t val, void *priv) { - sis_5571_t *dev = (sis_5571_t *)priv; + sis_5571_t *dev = (sis_5571_t *) priv; - switch (addr) - { - case 0x04: /* Command - low byte */ - case 0x05: /* Command - high byte */ - dev->pci_conf[addr] |= val; - break; + switch (addr) { + case 0x04: /* Command - low byte */ + case 0x05: /* Command - high byte */ + dev->pci_conf[addr] |= val; + break; - case 0x06: /* Status - Low Byte */ - dev->pci_conf[addr] &= val; - break; + case 0x06: /* Status - Low Byte */ + dev->pci_conf[addr] &= val; + break; - case 0x07: /* Status - High Byte */ - dev->pci_conf[addr] &= val & 0xbe; - break; + case 0x07: /* Status - High Byte */ + dev->pci_conf[addr] &= val & 0xbe; + break; - case 0x0d: /* Master latency timer */ - dev->pci_conf[addr] = val; - break; + case 0x0d: /* Master latency timer */ + dev->pci_conf[addr] = val; + break; - case 0x50: /* Host Interface and DRAM arbiter */ - dev->pci_conf[addr] = val & 0xec; - break; + case 0x50: /* Host Interface and DRAM arbiter */ + dev->pci_conf[addr] = val & 0xec; + break; - case 0x51: /* CACHE */ - dev->pci_conf[addr] = val; - cpu_cache_ext_enabled = !!(val & 0x40); - cpu_update_waitstates(); - break; + case 0x51: /* CACHE */ + dev->pci_conf[addr] = val; + cpu_cache_ext_enabled = !!(val & 0x40); + cpu_update_waitstates(); + break; - case 0x52: - dev->pci_conf[addr] = val & 0xd0; - break; + case 0x52: + dev->pci_conf[addr] = val & 0xd0; + break; - case 0x53: /* DRAM */ - dev->pci_conf[addr] = val & 0xfe; - break; + case 0x53: /* DRAM */ + dev->pci_conf[addr] = val & 0xfe; + break; - case 0x54: /* FP/EDO */ - dev->pci_conf[addr] = val; - break; + case 0x54: /* FP/EDO */ + dev->pci_conf[addr] = val; + break; - case 0x55: - dev->pci_conf[addr] = val & 0xe0; - break; + case 0x55: + dev->pci_conf[addr] = val & 0xe0; + break; - case 0x56: /* MDLE delay */ - case 0x57: /* SDRAM */ - dev->pci_conf[addr] = val & 0xf8; - break; + case 0x56: /* MDLE delay */ + case 0x57: /* SDRAM */ + dev->pci_conf[addr] = val & 0xf8; + break; - case 0x59: /* Buffer strength and current rating */ - dev->pci_conf[addr] = val; - break; + case 0x59: /* Buffer strength and current rating */ + dev->pci_conf[addr] = val; + break; - case 0x5a: - dev->pci_conf[addr] = val & 0x03; - break; + case 0x5a: + dev->pci_conf[addr] = val & 0x03; + break; - case 0x60: /* Undocumented */ - case 0x61: /* Undocumented */ - case 0x62: /* Undocumented */ - case 0x63: /* Undocumented */ - case 0x64: /* Undocumented */ - case 0x65: /* Undocumented */ - case 0x66: /* Undocumented */ - case 0x67: /* Undocumented */ - case 0x68: /* Undocumented */ - case 0x69: /* Undocumented */ - case 0x6a: /* Undocumented */ - case 0x6b: /* Undocumented */ - dev->pci_conf[addr] = val; - break; + case 0x60: /* Undocumented */ + case 0x61: /* Undocumented */ + case 0x62: /* Undocumented */ + case 0x63: /* Undocumented */ + case 0x64: /* Undocumented */ + case 0x65: /* Undocumented */ + case 0x66: /* Undocumented */ + case 0x67: /* Undocumented */ + case 0x68: /* Undocumented */ + case 0x69: /* Undocumented */ + case 0x6a: /* Undocumented */ + case 0x6b: /* Undocumented */ + dev->pci_conf[addr] = val; + break; - case 0x70: - case 0x71: - case 0x72: - case 0x73: - case 0x74: - case 0x75: - case 0x76: /* Attribute of shadow RAM for BIOS area */ - dev->pci_conf[addr] = val & ((addr != 0x76) ? 0xee : 0xe8); - sis_5571_shadow_recalc(addr, dev); - sis_5571_smm_recalc(dev); - break; + case 0x70: + case 0x71: + case 0x72: + case 0x73: + case 0x74: + case 0x75: + case 0x76: /* Attribute of shadow RAM for BIOS area */ + dev->pci_conf[addr] = val & ((addr != 0x76) ? 0xee : 0xe8); + sis_5571_shadow_recalc(addr, dev); + sis_5571_smm_recalc(dev); + break; - case 0x77: /* Characteristics of non-cacheable area */ - dev->pci_conf[addr] = val & 0x0f; - break; + case 0x77: /* Characteristics of non-cacheable area */ + dev->pci_conf[addr] = val & 0x0f; + break; - case 0x78: /* Allocation of Non-Cacheable area #1 */ - case 0x79: /* NCA1REG2 */ - case 0x7a: /* Allocation of Non-Cacheable area #2 */ - case 0x7b: /* NCA2REG2 */ - dev->pci_conf[addr] = val; - break; + case 0x78: /* Allocation of Non-Cacheable area #1 */ + case 0x79: /* NCA1REG2 */ + case 0x7a: /* Allocation of Non-Cacheable area #2 */ + case 0x7b: /* NCA2REG2 */ + dev->pci_conf[addr] = val; + break; - case 0x80: /* PCI master characteristics */ - dev->pci_conf[addr] = val & 0xfe; - break; + case 0x80: /* PCI master characteristics */ + dev->pci_conf[addr] = val & 0xfe; + break; - case 0x81: - dev->pci_conf[addr] = val & 0xcc; - break; + case 0x81: + dev->pci_conf[addr] = val & 0xcc; + break; - case 0x82: - dev->pci_conf[addr] = val; - break; + case 0x82: + dev->pci_conf[addr] = val; + break; - case 0x83: /* CPU to PCI characteristics */ - dev->pci_conf[addr] = val; - port_92_set_features(dev->port_92, !!(val & 0x40), !!(val & 0x80)); - break; + case 0x83: /* CPU to PCI characteristics */ + dev->pci_conf[addr] = val; + port_92_set_features(dev->port_92, !!(val & 0x40), !!(val & 0x80)); + break; - case 0x84: - case 0x85: - case 0x86: - dev->pci_conf[addr] = val; - break; + case 0x84: + case 0x85: + case 0x86: + dev->pci_conf[addr] = val; + break; - case 0x87: /* Miscellanea */ - dev->pci_conf[addr] = val & 0xf8; - break; + case 0x87: /* Miscellanea */ + dev->pci_conf[addr] = val & 0xf8; + break; - case 0x90: /* PMU control register */ - case 0x91: /* Address trap for green function */ - case 0x92: - dev->pci_conf[addr] = val; - break; + case 0x90: /* PMU control register */ + case 0x91: /* Address trap for green function */ + case 0x92: + dev->pci_conf[addr] = val; + break; - case 0x93: /* STPCLK# and APM SMI control */ - dev->pci_conf[addr] = val; + case 0x93: /* STPCLK# and APM SMI control */ + dev->pci_conf[addr] = val; - if ((dev->pci_conf[0x9b] & 1) && !!(val & 2)) - { - smi_raise(); - dev->pci_conf[0x9d] |= 1; - } - break; + if ((dev->pci_conf[0x9b] & 1) && !!(val & 2)) { + smi_raise(); + dev->pci_conf[0x9d] |= 1; + } + break; - case 0x94: /* 6x86 and Green function control */ - dev->pci_conf[addr] = val & 0xf8; - break; + case 0x94: /* 6x86 and Green function control */ + dev->pci_conf[addr] = val & 0xf8; + break; - case 0x95: /* Test mode control */ - case 0x96: /* Time slot and Programmable 10-bit I/O port definition */ - dev->pci_conf[addr] = val & 0xfb; - break; + case 0x95: /* Test mode control */ + case 0x96: /* Time slot and Programmable 10-bit I/O port definition */ + dev->pci_conf[addr] = val & 0xfb; + break; - case 0x97: /* programmable 10-bit I/O port address */ - case 0x98: /* Programmable 16-bit I/O port */ - case 0x99: - case 0x9a: - case 0x9b: - case 0x9c: - dev->pci_conf[addr] = val; - break; + case 0x97: /* programmable 10-bit I/O port address */ + case 0x98: /* Programmable 16-bit I/O port */ + case 0x99: + case 0x9a: + case 0x9b: + case 0x9c: + dev->pci_conf[addr] = val; + break; - case 0x9d: - dev->pci_conf[addr] &= val; - break; + case 0x9d: + dev->pci_conf[addr] &= val; + break; - case 0x9e: /* STPCLK# Assertion Timer */ - case 0x9f: /* STPCLK# De-assertion Timer */ - case 0xa0: - case 0xa1: - case 0xa2: - dev->pci_conf[addr] = val; - break; + case 0x9e: /* STPCLK# Assertion Timer */ + case 0x9f: /* STPCLK# De-assertion Timer */ + case 0xa0: + case 0xa1: + case 0xa2: + dev->pci_conf[addr] = val; + break; - case 0xa3: /* SMRAM access control and Power supply control */ - dev->pci_conf[addr] = val & 0xd0; - sis_5571_smm_recalc(dev); - break; - } - sis_5571_log("SiS5571: dev->pci_conf[%02x] = %02x\n", addr, val); + case 0xa3: /* SMRAM access control and Power supply control */ + dev->pci_conf[addr] = val & 0xd0; + sis_5571_smm_recalc(dev); + break; + } + sis_5571_log("SiS5571: dev->pci_conf[%02x] = %02x\n", addr, val); } static uint8_t memory_pci_bridge_read(int func, int addr, void *priv) { - sis_5571_t *dev = (sis_5571_t *)priv; - sis_5571_log("SiS5571: dev->pci_conf[%02x] (%02x)\n", addr, dev->pci_conf[addr]); - return dev->pci_conf[addr]; + sis_5571_t *dev = (sis_5571_t *) priv; + sis_5571_log("SiS5571: dev->pci_conf[%02x] (%02x)\n", addr, dev->pci_conf[addr]); + return dev->pci_conf[addr]; } static void pci_isa_bridge_write(int func, int addr, uint8_t val, void *priv) { - sis_5571_t *dev = (sis_5571_t *)priv; - switch (func) - { - case 0: /* Bridge */ - switch (addr) - { - case 0x04: /* Command */ - dev->pci_conf_sb[0][addr] |= val & 0x0f; - break; + sis_5571_t *dev = (sis_5571_t *) priv; + switch (func) { + case 0: /* Bridge */ + switch (addr) { + case 0x04: /* Command */ + dev->pci_conf_sb[0][addr] |= val & 0x0f; + break; - case 0x06: /* Status */ - dev->pci_conf_sb[0][addr] &= val; - break; + case 0x06: /* Status */ + dev->pci_conf_sb[0][addr] &= val; + break; - case 0x40: /* BIOS Control Register */ - dev->pci_conf_sb[0][addr] = val & 0x3f; - break; + case 0x40: /* BIOS Control Register */ + dev->pci_conf_sb[0][addr] = val & 0x3f; + break; - case 0x41: /* INTA# Remapping Control Register */ - case 0x42: /* INTB# Remapping Control Register */ - case 0x43: /* INTC# Remapping Control Register */ - case 0x44: /* INTD# Remapping Control Register */ - dev->pci_conf_sb[0][addr] = val & 0x8f; - pci_set_irq_routing((addr & 0x07), !(val & 0x80) ? (val & 0x0f) : PCI_IRQ_DISABLED); - break; + case 0x41: /* INTA# Remapping Control Register */ + case 0x42: /* INTB# Remapping Control Register */ + case 0x43: /* INTC# Remapping Control Register */ + case 0x44: /* INTD# Remapping Control Register */ + dev->pci_conf_sb[0][addr] = val & 0x8f; + pci_set_irq_routing((addr & 0x07), !(val & 0x80) ? (val & 0x0f) : PCI_IRQ_DISABLED); + break; - case 0x45: - dev->pci_conf_sb[0][addr] = val & 0xec; - switch ((val & 0xc0) >> 6) - { - case 0: - cpu_set_isa_speed(7159091); - break; - case 1: - cpu_set_isa_pci_div(4); - break; - case 2: - cpu_set_isa_pci_div(3); - break; - } - break; + case 0x45: + dev->pci_conf_sb[0][addr] = val & 0xec; + switch ((val & 0xc0) >> 6) { + case 0: + cpu_set_isa_speed(7159091); + break; + case 1: + cpu_set_isa_pci_div(4); + break; + case 2: + cpu_set_isa_pci_div(3); + break; + } + break; - case 0x46: - dev->pci_conf_sb[0][addr] = val & 0xec; - break; + case 0x46: + dev->pci_conf_sb[0][addr] = val & 0xec; + break; - case 0x47: /* DMA Clock and Wait State Control Register */ - dev->pci_conf_sb[0][addr] = val & 0x3e; - break; + case 0x47: /* DMA Clock and Wait State Control Register */ + dev->pci_conf_sb[0][addr] = val & 0x3e; + break; - case 0x48: /* ISA Master/DMA Memory Cycle Control Register 1 */ - case 0x49: /* ISA Master/DMA Memory Cycle Control Register 2 */ - case 0x4a: /* ISA Master/DMA Memory Cycle Control Register 3 */ - case 0x4b: /* ISA Master/DMA Memory Cycle Control Register 4 */ - dev->pci_conf_sb[0][addr] = val; - break; + case 0x48: /* ISA Master/DMA Memory Cycle Control Register 1 */ + case 0x49: /* ISA Master/DMA Memory Cycle Control Register 2 */ + case 0x4a: /* ISA Master/DMA Memory Cycle Control Register 3 */ + case 0x4b: /* ISA Master/DMA Memory Cycle Control Register 4 */ + dev->pci_conf_sb[0][addr] = val; + break; - case 0x4c: - case 0x4d: - case 0x4e: - case 0x4f: - case 0x50: - case 0x51: - case 0x52: - case 0x53: - case 0x54: - case 0x55: - case 0x56: - case 0x57: - case 0x58: - case 0x59: - case 0x5a: - case 0x5b: - case 0x5c: - case 0x5d: - case 0x5e: - dev->pci_conf_sb[0][addr] = val; - break; + case 0x4c: + case 0x4d: + case 0x4e: + case 0x4f: + case 0x50: + case 0x51: + case 0x52: + case 0x53: + case 0x54: + case 0x55: + case 0x56: + case 0x57: + case 0x58: + case 0x59: + case 0x5a: + case 0x5b: + case 0x5c: + case 0x5d: + case 0x5e: + dev->pci_conf_sb[0][addr] = val; + break; - case 0x5f: - dev->pci_conf_sb[0][addr] = val & 0x3f; - break; + case 0x5f: + dev->pci_conf_sb[0][addr] = val & 0x3f; + break; - case 0x60: - dev->pci_conf_sb[0][addr] = val; - break; + case 0x60: + dev->pci_conf_sb[0][addr] = val; + break; - case 0x61: /* MIRQ Remapping Control Register */ - dev->pci_conf_sb[0][addr] = val; - pci_set_mirq_routing(PCI_MIRQ0, !(val & 0x80) ? (val & 0x0f) : PCI_IRQ_DISABLED); - break; + case 0x61: /* MIRQ Remapping Control Register */ + dev->pci_conf_sb[0][addr] = val; + pci_set_mirq_routing(PCI_MIRQ0, !(val & 0x80) ? (val & 0x0f) : PCI_IRQ_DISABLED); + break; - case 0x62: /* On-board Device DMA Control Register */ - dev->pci_conf_sb[0][addr] = val & 0x0f; - dma_set_drq((val & 0x07), 1); - break; + case 0x62: /* On-board Device DMA Control Register */ + dev->pci_conf_sb[0][addr] = val & 0x0f; + dma_set_drq((val & 0x07), 1); + break; - case 0x63: /* IDEIRQ Remapping Control Register */ - dev->pci_conf_sb[0][addr] = val & 0x8f; - if (val & 0x80) - { - sff_set_irq_line(dev->ide_drive[0], val & 0x0f); - sff_set_irq_line(dev->ide_drive[1], val & 0x0f); - } - break; + case 0x63: /* IDEIRQ Remapping Control Register */ + dev->pci_conf_sb[0][addr] = val & 0x8f; + if (val & 0x80) { + sff_set_irq_line(dev->ide_drive[0], val & 0x0f); + sff_set_irq_line(dev->ide_drive[1], val & 0x0f); + } + break; - case 0x64: /* GPIO Control Register */ - dev->pci_conf_sb[0][addr] = val & 0xef; - break; + case 0x64: /* GPIO Control Register */ + dev->pci_conf_sb[0][addr] = val & 0xef; + break; - case 0x65: - dev->pci_conf_sb[0][addr] = val & 0x1b; - break; + case 0x65: + dev->pci_conf_sb[0][addr] = val & 0x1b; + break; - case 0x66: /* GPIO Output Mode Control Register */ - case 0x67: /* GPIO Output Mode Control Register */ - dev->pci_conf_sb[0][addr] = val; - break; + case 0x66: /* GPIO Output Mode Control Register */ + case 0x67: /* GPIO Output Mode Control Register */ + dev->pci_conf_sb[0][addr] = val; + break; - case 0x68: /* USBIRQ Remapping Control Register */ - dev->pci_conf_sb[0][addr] = val & 0x1b; - break; + case 0x68: /* USBIRQ Remapping Control Register */ + dev->pci_conf_sb[0][addr] = val & 0x1b; + break; - case 0x69: - dev->pci_conf_sb[0][addr] = val; - break; + case 0x69: + dev->pci_conf_sb[0][addr] = val; + break; - case 0x6a: - dev->pci_conf_sb[0][addr] = val & 0xfc; - break; + case 0x6a: + dev->pci_conf_sb[0][addr] = val & 0xfc; + break; - case 0x6b: - dev->pci_conf_sb[0][addr] = val; - break; + case 0x6b: + dev->pci_conf_sb[0][addr] = val; + break; - case 0x6c: - dev->pci_conf_sb[0][addr] = val & 0x03; - break; + case 0x6c: + dev->pci_conf_sb[0][addr] = val & 0x03; + break; - case 0x6e: /* Software-Controlled Interrupt Request, Channels 7-0 */ - case 0x6f: /* Software-Controlled Interrupt Request, channels 15-8 */ - dev->pci_conf_sb[0][addr] = val; - break; + case 0x6e: /* Software-Controlled Interrupt Request, Channels 7-0 */ + case 0x6f: /* Software-Controlled Interrupt Request, channels 15-8 */ + dev->pci_conf_sb[0][addr] = val; + break; - case 0x70: - dev->pci_conf_sb[0][addr] = val & 0xde; - break; + case 0x70: + dev->pci_conf_sb[0][addr] = val & 0xde; + break; - case 0x71: /* Type-F DMA Control Register */ - dev->pci_conf_sb[0][addr] = val & 0xfe; - break; + case 0x71: /* Type-F DMA Control Register */ + dev->pci_conf_sb[0][addr] = val & 0xfe; + break; - case 0x72: /* SMI Triggered By IRQ/GPIO Control */ - case 0x73: /* SMI Triggered By IRQ/GPIO Control */ - dev->pci_conf_sb[0][addr] = (addr == 0x72) ? val & 0xfe : val; - break; + case 0x72: /* SMI Triggered By IRQ/GPIO Control */ + case 0x73: /* SMI Triggered By IRQ/GPIO Control */ + dev->pci_conf_sb[0][addr] = (addr == 0x72) ? val & 0xfe : val; + break; - case 0x74: /* System Standby Timer Reload, System Standby State Exit And Throttling State Exit Control */ - case 0x75: /* System Standby Timer Reload, System Standby State Exit And Throttling State Exit Control */ - case 0x76: /* Monitor Standby Timer Reload And Monitor Standby State ExitControl */ - case 0x77: /* Monitor Standby Timer Reload And Monitor Standby State ExitControl */ - dev->pci_conf_sb[0][addr] = val; - break; - } - sis_5571_log("SiS5571-SB: dev->pci_conf[%02x] = %02x\n", addr, val); - break; + case 0x74: /* System Standby Timer Reload, System Standby State Exit And Throttling State Exit Control */ + case 0x75: /* System Standby Timer Reload, System Standby State Exit And Throttling State Exit Control */ + case 0x76: /* Monitor Standby Timer Reload And Monitor Standby State ExitControl */ + case 0x77: /* Monitor Standby Timer Reload And Monitor Standby State ExitControl */ + dev->pci_conf_sb[0][addr] = val; + break; + } + sis_5571_log("SiS5571-SB: dev->pci_conf[%02x] = %02x\n", addr, val); + break; - case 1: /* IDE Controller */ - switch (addr) - { - case 0x04: /* Command low byte */ - dev->pci_conf_sb[1][addr] = val & 0x05; - sis_5571_ide_handler(dev); - sis_5571_bm_handler(dev); - break; + case 1: /* IDE Controller */ + switch (addr) { + case 0x04: /* Command low byte */ + dev->pci_conf_sb[1][addr] = val & 0x05; + sis_5571_ide_handler(dev); + sis_5571_bm_handler(dev); + break; - case 0x07: /* Status high byte */ - dev->pci_conf_sb[1][addr] &= val; - break; + case 0x07: /* Status high byte */ + dev->pci_conf_sb[1][addr] &= val; + break; - case 0x09: /* Programming Interface Byte */ - dev->pci_conf_sb[1][addr] = val & 0xcf; - sis_5571_ide_handler(dev); - break; + case 0x09: /* Programming Interface Byte */ + dev->pci_conf_sb[1][addr] = val & 0xcf; + sis_5571_ide_handler(dev); + break; - case 0x0d: /* Latency Time */ - case 0x10: /* Primary Channel Base Address Register */ - case 0x11: /* Primary Channel Base Address Register */ - case 0x12: /* Primary Channel Base Address Register */ - case 0x13: /* Primary Channel Base Address Register */ - case 0x14: /* Primary Channel Base Address Register */ - case 0x15: /* Primary Channel Base Address Register */ - case 0x16: /* Primary Channel Base Address Register */ - case 0x17: /* Primary Channel Base Address Register */ - case 0x18: /* Secondary Channel Base Address Register */ - case 0x19: /* Secondary Channel Base Address Register */ - case 0x1a: /* Secondary Channel Base Address Register */ - case 0x1b: /* Secondary Channel Base Address Register */ - case 0x1c: /* Secondary Channel Base Address Register */ - case 0x1d: /* Secondary Channel Base Address Register */ - case 0x1e: /* Secondary Channel Base Address Register */ - case 0x1f: /* Secondary Channel Base Address Register */ - dev->pci_conf_sb[1][addr] = val; - sis_5571_ide_handler(dev); - break; + case 0x0d: /* Latency Time */ + case 0x10: /* Primary Channel Base Address Register */ + case 0x11: /* Primary Channel Base Address Register */ + case 0x12: /* Primary Channel Base Address Register */ + case 0x13: /* Primary Channel Base Address Register */ + case 0x14: /* Primary Channel Base Address Register */ + case 0x15: /* Primary Channel Base Address Register */ + case 0x16: /* Primary Channel Base Address Register */ + case 0x17: /* Primary Channel Base Address Register */ + case 0x18: /* Secondary Channel Base Address Register */ + case 0x19: /* Secondary Channel Base Address Register */ + case 0x1a: /* Secondary Channel Base Address Register */ + case 0x1b: /* Secondary Channel Base Address Register */ + case 0x1c: /* Secondary Channel Base Address Register */ + case 0x1d: /* Secondary Channel Base Address Register */ + case 0x1e: /* Secondary Channel Base Address Register */ + case 0x1f: /* Secondary Channel Base Address Register */ + dev->pci_conf_sb[1][addr] = val; + sis_5571_ide_handler(dev); + break; - case 0x20: /* Bus Master IDE Control Register Base Address */ - case 0x21: /* Bus Master IDE Control Register Base Address */ - case 0x22: /* Bus Master IDE Control Register Base Address */ - case 0x23: /* Bus Master IDE Control Register Base Address */ - dev->pci_conf_sb[1][addr] = val; - sis_5571_bm_handler(dev); - break; + case 0x20: /* Bus Master IDE Control Register Base Address */ + case 0x21: /* Bus Master IDE Control Register Base Address */ + case 0x22: /* Bus Master IDE Control Register Base Address */ + case 0x23: /* Bus Master IDE Control Register Base Address */ + dev->pci_conf_sb[1][addr] = val; + sis_5571_bm_handler(dev); + break; - case 0x30: /* Expansion ROM Base Address */ - case 0x31: /* Expansion ROM Base Address */ - case 0x32: /* Expansion ROM Base Address */ - case 0x33: /* Expansion ROM Base Address */ - case 0x40: /* IDE Primary Channel/Master Drive Data Recovery Time Control */ - case 0x41: /* IDE Primary Channel/Master Drive DataActive Time Control */ - case 0x42: /* IDE Primary Channel/Slave Drive Data Recovery Time Control */ - case 0x43: /* IDE Primary Channel/Slave Drive Data Active Time Control */ - case 0x44: /* IDE Secondary Channel/Master Drive Data Recovery Time Control */ - case 0x45: /* IDE Secondary Channel/Master Drive Data Active Time Control */ - case 0x46: /* IDE Secondary Channel/Slave Drive Data Recovery Time Control */ - case 0x47: /* IDE Secondary Channel/Slave Drive Data Active Time Control */ - case 0x48: /* IDE Command Recovery Time Control */ - case 0x49: /* IDE Command Active Time Control */ - dev->pci_conf_sb[1][addr] = val; - break; + case 0x30: /* Expansion ROM Base Address */ + case 0x31: /* Expansion ROM Base Address */ + case 0x32: /* Expansion ROM Base Address */ + case 0x33: /* Expansion ROM Base Address */ + case 0x40: /* IDE Primary Channel/Master Drive Data Recovery Time Control */ + case 0x41: /* IDE Primary Channel/Master Drive DataActive Time Control */ + case 0x42: /* IDE Primary Channel/Slave Drive Data Recovery Time Control */ + case 0x43: /* IDE Primary Channel/Slave Drive Data Active Time Control */ + case 0x44: /* IDE Secondary Channel/Master Drive Data Recovery Time Control */ + case 0x45: /* IDE Secondary Channel/Master Drive Data Active Time Control */ + case 0x46: /* IDE Secondary Channel/Slave Drive Data Recovery Time Control */ + case 0x47: /* IDE Secondary Channel/Slave Drive Data Active Time Control */ + case 0x48: /* IDE Command Recovery Time Control */ + case 0x49: /* IDE Command Active Time Control */ + dev->pci_conf_sb[1][addr] = val; + break; - case 0x4a: /* IDE General Control Register 0 */ - dev->pci_conf_sb[1][addr] = val & 0xaf; - sis_5571_ide_handler(dev); - break; + case 0x4a: /* IDE General Control Register 0 */ + dev->pci_conf_sb[1][addr] = val & 0xaf; + sis_5571_ide_handler(dev); + break; - case 0x4b: /* IDE General Control register 1 */ - case 0x4c: /* Prefetch Count of Primary Channel (Low Byte) */ - case 0x4d: /* Prefetch Count of Primary Channel (High Byte) */ - case 0x4e: /* Prefetch Count of Secondary Channel (Low Byte) */ - case 0x4f: /* Prefetch Count of Secondary Channel (High Byte) */ - dev->pci_conf_sb[1][addr] = val; - break; - } - sis_5571_log("SiS5571-IDE: dev->pci_conf[%02x] = %02x\n", addr, val); - break; + case 0x4b: /* IDE General Control register 1 */ + case 0x4c: /* Prefetch Count of Primary Channel (Low Byte) */ + case 0x4d: /* Prefetch Count of Primary Channel (High Byte) */ + case 0x4e: /* Prefetch Count of Secondary Channel (Low Byte) */ + case 0x4f: /* Prefetch Count of Secondary Channel (High Byte) */ + dev->pci_conf_sb[1][addr] = val; + break; + } + sis_5571_log("SiS5571-IDE: dev->pci_conf[%02x] = %02x\n", addr, val); + break; - case 2: /* USB Controller */ - switch (addr) - { - case 0x04: /* Command - Low Byte */ - dev->pci_conf_sb[2][addr] = val; - ohci_update_mem_mapping(dev->usb, dev->pci_conf_sb[2][0x11], dev->pci_conf_sb[2][0x12], dev->pci_conf_sb[2][0x13], dev->pci_conf_sb[2][4] & 1); - break; + case 2: /* USB Controller */ + switch (addr) { + case 0x04: /* Command - Low Byte */ + dev->pci_conf_sb[2][addr] = val; + ohci_update_mem_mapping(dev->usb, dev->pci_conf_sb[2][0x11], dev->pci_conf_sb[2][0x12], dev->pci_conf_sb[2][0x13], dev->pci_conf_sb[2][4] & 1); + break; - case 0x05: /* Command - High Byte */ - dev->pci_conf_sb[2][addr] = val & 0x03; - break; + case 0x05: /* Command - High Byte */ + dev->pci_conf_sb[2][addr] = val & 0x03; + break; - case 0x06: /* Status - Low Byte */ - dev->pci_conf_sb[2][addr] &= val & 0xc0; - break; + case 0x06: /* Status - Low Byte */ + dev->pci_conf_sb[2][addr] &= val & 0xc0; + break; - case 0x07: /* Status - High Byte */ - dev->pci_conf_sb[2][addr] &= val; - break; + case 0x07: /* Status - High Byte */ + dev->pci_conf_sb[2][addr] &= val; + break; - case 0x10: /* Memory Space Base Address Register */ - case 0x11: /* Memory Space Base Address Register */ - case 0x12: /* Memory Space Base Address Register */ - case 0x13: /* Memory Space Base Address Register */ - dev->pci_conf_sb[2][addr] = val & ((addr == 0x11) ? 0x0f : 0xff); - ohci_update_mem_mapping(dev->usb, dev->pci_conf_sb[2][0x11], dev->pci_conf_sb[2][0x12], dev->pci_conf_sb[2][0x13], dev->pci_conf_sb[2][4] & 1); - break; + case 0x10: /* Memory Space Base Address Register */ + case 0x11: /* Memory Space Base Address Register */ + case 0x12: /* Memory Space Base Address Register */ + case 0x13: /* Memory Space Base Address Register */ + dev->pci_conf_sb[2][addr] = val & ((addr == 0x11) ? 0x0f : 0xff); + ohci_update_mem_mapping(dev->usb, dev->pci_conf_sb[2][0x11], dev->pci_conf_sb[2][0x12], dev->pci_conf_sb[2][0x13], dev->pci_conf_sb[2][4] & 1); + break; - case 0x14: /* IO Space Base Address Register */ - case 0x15: /* IO Space Base Address Register */ - case 0x16: /* IO Space Base Address Register */ - case 0x17: /* IO Space Base Address Register */ - case 0x3c: /* Interrupt Line */ - dev->pci_conf_sb[2][addr] = val; - break; - } - sis_5571_log("SiS5571-USB: dev->pci_conf[%02x] = %02x\n", addr, val); - } + case 0x14: /* IO Space Base Address Register */ + case 0x15: /* IO Space Base Address Register */ + case 0x16: /* IO Space Base Address Register */ + case 0x17: /* IO Space Base Address Register */ + case 0x3c: /* Interrupt Line */ + dev->pci_conf_sb[2][addr] = val; + break; + } + sis_5571_log("SiS5571-USB: dev->pci_conf[%02x] = %02x\n", addr, val); + } } static uint8_t pci_isa_bridge_read(int func, int addr, void *priv) { - sis_5571_t *dev = (sis_5571_t *)priv; + sis_5571_t *dev = (sis_5571_t *) priv; - switch (func) - { - case 0: - sis_5571_log("SiS5571-SB: dev->pci_conf[%02x] (%02x)\n", addr, dev->pci_conf_sb[0][addr]); - return dev->pci_conf_sb[0][addr]; - case 1: - sis_5571_log("SiS5571-IDE: dev->pci_conf[%02x] (%02x)\n", addr, dev->pci_conf_sb[1][addr]); - return dev->pci_conf_sb[1][addr]; - case 2: - sis_5571_log("SiS5571-USB: dev->pci_conf[%02x] (%02x)\n", addr, dev->pci_conf_sb[2][addr]); - return dev->pci_conf_sb[2][addr]; - default: - return 0xff; - } + switch (func) { + case 0: + sis_5571_log("SiS5571-SB: dev->pci_conf[%02x] (%02x)\n", addr, dev->pci_conf_sb[0][addr]); + return dev->pci_conf_sb[0][addr]; + case 1: + sis_5571_log("SiS5571-IDE: dev->pci_conf[%02x] (%02x)\n", addr, dev->pci_conf_sb[1][addr]); + return dev->pci_conf_sb[1][addr]; + case 2: + sis_5571_log("SiS5571-USB: dev->pci_conf[%02x] (%02x)\n", addr, dev->pci_conf_sb[2][addr]); + return dev->pci_conf_sb[2][addr]; + default: + return 0xff; + } } static void sis_5571_reset(void *priv) { - sis_5571_t *dev = (sis_5571_t *)priv; + sis_5571_t *dev = (sis_5571_t *) priv; - /* Memory/PCI Bridge */ - dev->pci_conf[0x00] = 0x39; - dev->pci_conf[0x01] = 0x10; - dev->pci_conf[0x02] = 0x71; - dev->pci_conf[0x03] = 0x55; - dev->pci_conf[0x04] = 0xfd; - dev->pci_conf[0x0b] = 0x06; - dev->pci_conf[0x9e] = 0xff; - dev->pci_conf[0x9f] = 0xff; - dev->pci_conf[0xa2] = 0xff; + /* Memory/PCI Bridge */ + dev->pci_conf[0x00] = 0x39; + dev->pci_conf[0x01] = 0x10; + dev->pci_conf[0x02] = 0x71; + dev->pci_conf[0x03] = 0x55; + dev->pci_conf[0x04] = 0xfd; + dev->pci_conf[0x0b] = 0x06; + dev->pci_conf[0x9e] = 0xff; + dev->pci_conf[0x9f] = 0xff; + dev->pci_conf[0xa2] = 0xff; - /* PCI to ISA bridge */ - dev->pci_conf_sb[0][0x00] = 0x39; - dev->pci_conf_sb[0][0x01] = 0x10; - dev->pci_conf_sb[0][0x02] = 0x08; - dev->pci_conf_sb[0][0x04] = 0xfd; - dev->pci_conf_sb[0][0x08] = 0x01; - dev->pci_conf_sb[0][0x0a] = 0x01; - dev->pci_conf_sb[0][0x0b] = 0x06; + /* PCI to ISA bridge */ + dev->pci_conf_sb[0][0x00] = 0x39; + dev->pci_conf_sb[0][0x01] = 0x10; + dev->pci_conf_sb[0][0x02] = 0x08; + dev->pci_conf_sb[0][0x04] = 0xfd; + dev->pci_conf_sb[0][0x08] = 0x01; + dev->pci_conf_sb[0][0x0a] = 0x01; + dev->pci_conf_sb[0][0x0b] = 0x06; - /* IDE Controller */ - dev->pci_conf_sb[1][0x00] = 0x39; - dev->pci_conf_sb[1][0x01] = 0x10; - dev->pci_conf_sb[1][0x02] = 0x13; - dev->pci_conf_sb[1][0x03] = 0x55; - dev->pci_conf_sb[1][0x08] = 0xc0; - dev->pci_conf_sb[1][0x0a] = 0x01; - dev->pci_conf_sb[1][0x0b] = 0x01; - dev->pci_conf_sb[1][0x0e] = 0x80; - dev->pci_conf_sb[1][0x4a] = 0x06; - sff_set_slot(dev->ide_drive[0], dev->sb_pci_slot); - sff_set_slot(dev->ide_drive[1], dev->sb_pci_slot); - sff_bus_master_reset(dev->ide_drive[0], BUS_MASTER_BASE); - sff_bus_master_reset(dev->ide_drive[1], BUS_MASTER_BASE + 8); + /* IDE Controller */ + dev->pci_conf_sb[1][0x00] = 0x39; + dev->pci_conf_sb[1][0x01] = 0x10; + dev->pci_conf_sb[1][0x02] = 0x13; + dev->pci_conf_sb[1][0x03] = 0x55; + dev->pci_conf_sb[1][0x08] = 0xc0; + dev->pci_conf_sb[1][0x0a] = 0x01; + dev->pci_conf_sb[1][0x0b] = 0x01; + dev->pci_conf_sb[1][0x0e] = 0x80; + dev->pci_conf_sb[1][0x4a] = 0x06; + sff_set_slot(dev->ide_drive[0], dev->sb_pci_slot); + sff_set_slot(dev->ide_drive[1], dev->sb_pci_slot); + sff_bus_master_reset(dev->ide_drive[0], BUS_MASTER_BASE); + sff_bus_master_reset(dev->ide_drive[1], BUS_MASTER_BASE + 8); - /* USB Controller */ - dev->pci_conf_sb[2][0x00] = 0x39; - dev->pci_conf_sb[2][0x01] = 0x10; - dev->pci_conf_sb[2][0x02] = 0x01; - dev->pci_conf_sb[2][0x03] = 0x70; - dev->pci_conf_sb[2][0x08] = 0xb0; - dev->pci_conf_sb[2][0x09] = 0x10; - dev->pci_conf_sb[2][0x0a] = 0x03; - dev->pci_conf_sb[2][0x0b] = 0xc0; - dev->pci_conf_sb[2][0x0e] = 0x80; - dev->pci_conf_sb[2][0x14] = 0x01; - dev->pci_conf_sb[2][0x3d] = 0x01; + /* USB Controller */ + dev->pci_conf_sb[2][0x00] = 0x39; + dev->pci_conf_sb[2][0x01] = 0x10; + dev->pci_conf_sb[2][0x02] = 0x01; + dev->pci_conf_sb[2][0x03] = 0x70; + dev->pci_conf_sb[2][0x08] = 0xb0; + dev->pci_conf_sb[2][0x09] = 0x10; + dev->pci_conf_sb[2][0x0a] = 0x03; + dev->pci_conf_sb[2][0x0b] = 0xc0; + dev->pci_conf_sb[2][0x0e] = 0x80; + dev->pci_conf_sb[2][0x14] = 0x01; + dev->pci_conf_sb[2][0x3d] = 0x01; } static void sis_5571_close(void *priv) { - sis_5571_t *dev = (sis_5571_t *)priv; + sis_5571_t *dev = (sis_5571_t *) priv; - smram_del(dev->smram); - free(dev); + smram_del(dev->smram); + free(dev); } static void * sis_5571_init(const device_t *info) { - sis_5571_t *dev = (sis_5571_t *)malloc(sizeof(sis_5571_t)); - memset(dev, 0x00, sizeof(sis_5571_t)); + sis_5571_t *dev = (sis_5571_t *) malloc(sizeof(sis_5571_t)); + memset(dev, 0x00, sizeof(sis_5571_t)); - dev->nb_pci_slot = pci_add_card(PCI_ADD_NORTHBRIDGE, memory_pci_bridge_read, memory_pci_bridge_write, dev); - dev->sb_pci_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, pci_isa_bridge_read, pci_isa_bridge_write, dev); + dev->nb_pci_slot = pci_add_card(PCI_ADD_NORTHBRIDGE, memory_pci_bridge_read, memory_pci_bridge_write, dev); + dev->sb_pci_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, pci_isa_bridge_read, pci_isa_bridge_write, dev); - /* MIRQ */ - pci_enable_mirq(0); + /* MIRQ */ + pci_enable_mirq(0); - /* Port 92 & SMRAM */ - dev->port_92 = device_add(&port_92_pci_device); - dev->smram = smram_add(); + /* Port 92 & SMRAM */ + dev->port_92 = device_add(&port_92_pci_device); + dev->smram = smram_add(); - /* SFF IDE */ - dev->ide_drive[0] = device_add_inst(&sff8038i_device, 1); - dev->ide_drive[1] = device_add_inst(&sff8038i_device, 2); + /* SFF IDE */ + dev->ide_drive[0] = device_add_inst(&sff8038i_device, 1); + dev->ide_drive[1] = device_add_inst(&sff8038i_device, 2); - /* USB */ - dev->usb = device_add(&usb_device); + /* USB */ + dev->usb = device_add(&usb_device); - sis_5571_reset(dev); + sis_5571_reset(dev); - return dev; + return dev; } const device_t sis_5571_device = { - .name = "SiS 5571", + .name = "SiS 5571", .internal_name = "sis_5571", - .flags = DEVICE_PCI, - .local = 0, - .init = sis_5571_init, - .close = sis_5571_close, - .reset = sis_5571_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = sis_5571_init, + .close = sis_5571_close, + .reset = sis_5571_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/sis_85c310.c b/src/chipset/sis_85c310.c index 2e83e3367..c3015e35b 100644 --- a/src/chipset/sis_85c310.c +++ b/src/chipset/sis_85c310.c @@ -12,27 +12,25 @@ #include <86box/mem.h> #include <86box/chipset.h> - typedef struct { - uint8_t cur_reg, tries, - regs[258]; + uint8_t cur_reg, tries, + regs[258]; } rabbit_t; - static void rabbit_recalcmapping(rabbit_t *dev) { uint32_t shread, shwrite; uint32_t shflags = 0; - shread = !!(dev->regs[0x101] & 0x40); + shread = !!(dev->regs[0x101] & 0x40); shwrite = !!(dev->regs[0x100] & 0x02); shflags = shread ? MEM_READ_INTERNAL : MEM_READ_EXTANY; shflags |= shwrite ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; - shadowbios = !!shread; + shadowbios = !!shread; shadowbios_write = !!shwrite; #ifdef USE_SHADOW_C0000 @@ -42,79 +40,76 @@ rabbit_recalcmapping(rabbit_t *dev) #endif switch (dev->regs[0x100] & 0x09) { - case 0x01: + case 0x01: /* The one BIOS we use seems to use something else to control C0000-DFFFF shadow, no idea what. */ #ifdef USE_SHADOW_C0000 - /* 64K at 0C0000-0CFFFF */ - mem_set_mem_state(0x000c0000, 0x00010000, shflags); - /* FALLTHROUGH */ + /* 64K at 0C0000-0CFFFF */ + mem_set_mem_state(0x000c0000, 0x00010000, shflags); + /* FALLTHROUGH */ #endif - case 0x00: - /* 64K at 0F0000-0FFFFF */ - mem_set_mem_state(0x000f0000, 0x00010000, shflags); - break; + case 0x00: + /* 64K at 0F0000-0FFFFF */ + mem_set_mem_state(0x000f0000, 0x00010000, shflags); + break; - case 0x09: + case 0x09: #ifdef USE_SHADOW_C0000 - /* 128K at 0C0000-0DFFFF */ - mem_set_mem_state(0x000c0000, 0x00020000, shflags); - /* FALLTHROUGH */ + /* 128K at 0C0000-0DFFFF */ + mem_set_mem_state(0x000c0000, 0x00020000, shflags); + /* FALLTHROUGH */ #endif - case 0x08: - /* 128K at 0E0000-0FFFFF */ - mem_set_mem_state(0x000e0000, 0x00020000, shflags); - break; + case 0x08: + /* 128K at 0E0000-0FFFFF */ + mem_set_mem_state(0x000e0000, 0x00020000, shflags); + break; } flushmmucache(); } - static void rabbit_write(uint16_t addr, uint8_t val, void *priv) { rabbit_t *dev = (rabbit_t *) priv; switch (addr) { - case 0x22: - dev->cur_reg = val; - dev->tries = 0; - break; - case 0x23: - if (dev->cur_reg == 0x83) { - if (dev->tries < 0x02) { - dev->regs[dev->tries++ | 0x100] = val; - if (dev->tries == 0x02) - rabbit_recalcmapping(dev); - } - } else - dev->regs[dev->cur_reg] = val; - break; + case 0x22: + dev->cur_reg = val; + dev->tries = 0; + break; + case 0x23: + if (dev->cur_reg == 0x83) { + if (dev->tries < 0x02) { + dev->regs[dev->tries++ | 0x100] = val; + if (dev->tries == 0x02) + rabbit_recalcmapping(dev); + } + } else + dev->regs[dev->cur_reg] = val; + break; } } - static uint8_t rabbit_read(uint16_t addr, void *priv) { - uint8_t ret = 0xff; + uint8_t ret = 0xff; rabbit_t *dev = (rabbit_t *) priv; switch (addr) { - case 0x23: - if (dev->cur_reg == 0x83) { - if (dev->tries < 0x02) - ret = dev->regs[dev->tries++ | 0x100]; - } else - ret = dev->regs[dev->cur_reg]; - break; + case 0x23: + if (dev->cur_reg == 0x83) { + if (dev->tries < 0x02) + ret = dev->regs[dev->tries++ | 0x100]; + } else + ret = dev->regs[dev->cur_reg]; + break; } return ret; } - static void rabbit_close(void *priv) { @@ -123,7 +118,6 @@ rabbit_close(void *priv) free(dev); } - static void * rabbit_init(const device_t *info) { @@ -136,15 +130,15 @@ rabbit_init(const device_t *info) } const device_t rabbit_device = { - .name = "SiS Rabbit", + .name = "SiS Rabbit", .internal_name = "rabbit", - .flags = 0, - .local = 0, - .init = rabbit_init, - .close = rabbit_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = rabbit_init, + .close = rabbit_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/sis_85c496.c b/src/chipset/sis_85c496.c index 36d1f2030..e6e32c4b6 100644 --- a/src/chipset/sis_85c496.c +++ b/src/chipset/sis_85c496.c @@ -38,39 +38,34 @@ #include <86box/chipset.h> #include <86box/spd.h> - -typedef struct sis_85c496_t -{ - uint8_t cur_reg, rmsmiblk_count, - regs[127], - pci_conf[256]; - smram_t *smram; - pc_timer_t rmsmiblk_timer; - port_92_t * port_92; - nvr_t * nvr; +typedef struct sis_85c496_t { + uint8_t cur_reg, rmsmiblk_count, + regs[127], + pci_conf[256]; + smram_t *smram; + pc_timer_t rmsmiblk_timer; + port_92_t *port_92; + nvr_t *nvr; } sis_85c496_t; - #ifdef ENABLE_SIS_85C496_LOG int sis_85c496_do_log = ENABLE_SIS_85C496_LOG; - void sis_85c496_log(const char *fmt, ...) { va_list ap; if (sis_85c496_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define sis_85c496_log(fmt, ...) +# define sis_85c496_log(fmt, ...) #endif - static void sis_85c497_isa_write(uint16_t port, uint8_t val, void *priv) { @@ -79,75 +74,74 @@ sis_85c497_isa_write(uint16_t port, uint8_t val, void *priv) sis_85c496_log("[%04X:%08X] ISA Write %02X to %04X\n", CS, cpu_state.pc, val, port); if (port == 0x22) - dev->cur_reg = val; - else if (port == 0x23) switch (dev->cur_reg) { - case 0x01: /* Built-in 206 Timing Control */ - dev->regs[dev->cur_reg] = val; - break; - case 0x70: /* ISA Bus Clock Selection */ - dev->regs[dev->cur_reg] = val & 0xc0; - break; - case 0x71: /* ISA Bus Timing Control */ - dev->regs[dev->cur_reg] = val & 0xf6; - break; - case 0x72: case 0x76: /* SMOUT */ - case 0x74: /* BIOS Timer */ - dev->regs[dev->cur_reg] = val; - break; - case 0x73: /* BIOS Timer */ - dev->regs[dev->cur_reg] = val & 0xfd; - break; - case 0x75: /* DMA / Deturbo Control */ - dev->regs[dev->cur_reg] = val & 0xfc; - dma_set_mask((val & 0x80) ? 0xffffffff : 0x00ffffff); - break; - } + dev->cur_reg = val; + else if (port == 0x23) + switch (dev->cur_reg) { + case 0x01: /* Built-in 206 Timing Control */ + dev->regs[dev->cur_reg] = val; + break; + case 0x70: /* ISA Bus Clock Selection */ + dev->regs[dev->cur_reg] = val & 0xc0; + break; + case 0x71: /* ISA Bus Timing Control */ + dev->regs[dev->cur_reg] = val & 0xf6; + break; + case 0x72: + case 0x76: /* SMOUT */ + case 0x74: /* BIOS Timer */ + dev->regs[dev->cur_reg] = val; + break; + case 0x73: /* BIOS Timer */ + dev->regs[dev->cur_reg] = val & 0xfd; + break; + case 0x75: /* DMA / Deturbo Control */ + dev->regs[dev->cur_reg] = val & 0xfc; + dma_set_mask((val & 0x80) ? 0xffffffff : 0x00ffffff); + break; + } } - static uint8_t sis_85c497_isa_read(uint16_t port, void *priv) { sis_85c496_t *dev = (sis_85c496_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (port == 0x23) - ret = dev->regs[dev->cur_reg]; + ret = dev->regs[dev->cur_reg]; else if (port == 0x33) - ret = 0x3c /*random_generate()*/; + ret = 0x3c /*random_generate()*/; sis_85c496_log("[%04X:%08X] ISA Read %02X from %04X\n", CS, cpu_state.pc, ret, port); return ret; } - static void sis_85c496_recalcmapping(sis_85c496_t *dev) { uint32_t base; uint32_t i, shflags = 0; - shadowbios = 0; + shadowbios = 0; shadowbios_write = 0; for (i = 0; i < 8; i++) { - base = 0xc0000 + (i << 15); + base = 0xc0000 + (i << 15); - if (dev->pci_conf[0x44] & (1 << i)) { - shadowbios |= (base >= 0xe0000) && (dev->pci_conf[0x45] & 0x02); - shadowbios_write |= (base >= 0xe0000) && !(dev->pci_conf[0x45] & 0x01); - shflags = (dev->pci_conf[0x45] & 0x02) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - shflags |= (dev->pci_conf[0x45] & 0x01) ? MEM_WRITE_EXTANY : MEM_WRITE_INTERNAL; - mem_set_mem_state_both(base, 0x8000, shflags); - } else - mem_set_mem_state_both(base, 0x8000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + if (dev->pci_conf[0x44] & (1 << i)) { + shadowbios |= (base >= 0xe0000) && (dev->pci_conf[0x45] & 0x02); + shadowbios_write |= (base >= 0xe0000) && !(dev->pci_conf[0x45] & 0x01); + shflags = (dev->pci_conf[0x45] & 0x02) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + shflags |= (dev->pci_conf[0x45] & 0x01) ? MEM_WRITE_EXTANY : MEM_WRITE_INTERNAL; + mem_set_mem_state_both(base, 0x8000, shflags); + } else + mem_set_mem_state_both(base, 0x8000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); } flushmmucache_nopc(); } - static void sis_85c496_ide_handler(sis_85c496_t *dev) { @@ -160,308 +154,330 @@ sis_85c496_ide_handler(sis_85c496_t *dev) ide_sec_disable(); if (ide_cfg[1] & 0x02) { - ide_set_base(0, 0x0170); - ide_set_side(0, 0x0376); - ide_set_base(1, 0x01f0); - ide_set_side(1, 0x03f6); + ide_set_base(0, 0x0170); + ide_set_side(0, 0x0376); + ide_set_base(1, 0x01f0); + ide_set_side(1, 0x03f6); - if (ide_cfg[1] & 0x01) { - if (!(ide_cfg[0] & 0x40)) - ide_pri_enable(); - if (!(ide_cfg[0] & 0x80)) - ide_sec_enable(); - } + if (ide_cfg[1] & 0x01) { + if (!(ide_cfg[0] & 0x40)) + ide_pri_enable(); + if (!(ide_cfg[0] & 0x80)) + ide_sec_enable(); + } } else { - ide_set_base(0, 0x01f0); - ide_set_side(0, 0x03f6); - ide_set_base(1, 0x0170); - ide_set_side(1, 0x0376); + ide_set_base(0, 0x01f0); + ide_set_side(0, 0x03f6); + ide_set_base(1, 0x0170); + ide_set_side(1, 0x0376); - if (ide_cfg[1] & 0x01) { - if (!(ide_cfg[0] & 0x40)) - ide_sec_enable(); - if (!(ide_cfg[0] & 0x80)) - ide_pri_enable(); - } + if (ide_cfg[1] & 0x01) { + if (!(ide_cfg[0] & 0x40)) + ide_sec_enable(); + if (!(ide_cfg[0] & 0x80)) + ide_pri_enable(); + } } } - /* 00 - 3F = PCI Configuration, 40 - 7F = 85C496, 80 - FF = 85C497 */ static void sis_85c49x_pci_write(int func, int addr, uint8_t val, void *priv) { sis_85c496_t *dev = (sis_85c496_t *) priv; - uint8_t old, valxor; - uint8_t smm_irq[4] = { 10, 11, 12, 15 }; - uint32_t host_base, ram_base, size; + uint8_t old, valxor; + uint8_t smm_irq[4] = { 10, 11, 12, 15 }; + uint32_t host_base, ram_base, size; - old = dev->pci_conf[addr]; + old = dev->pci_conf[addr]; valxor = (dev->pci_conf[addr]) ^ val; sis_85c496_log("[%04X:%08X] PCI Write %02X to %02X:%02X\n", CS, cpu_state.pc, val, func, addr); switch (addr) { - /* PCI Configuration Header Registers (00h ~ 3Fh) */ - case 0x04: /* PCI Device Command */ - dev->pci_conf[addr] = val & 0x40; - break; - case 0x05: /* PCI Device Command */ - dev->pci_conf[addr] = val & 0x03; - break; - case 0x07: /* Device Status */ - dev->pci_conf[addr] &= ~(val & 0xf1); - break; + /* PCI Configuration Header Registers (00h ~ 3Fh) */ + case 0x04: /* PCI Device Command */ + dev->pci_conf[addr] = val & 0x40; + break; + case 0x05: /* PCI Device Command */ + dev->pci_conf[addr] = val & 0x03; + break; + case 0x07: /* Device Status */ + dev->pci_conf[addr] &= ~(val & 0xf1); + break; - /* 86C496 Specific Registers (40h ~ 7Fh) */ - case 0x40: /* CPU Configuration */ - dev->pci_conf[addr] = val & 0x7f; - break; - case 0x41: /* DRAM Configuration */ - dev->pci_conf[addr] = val; - break; - case 0x42: /* Cache Configure */ - dev->pci_conf[addr] = val; - cpu_cache_ext_enabled = (val & 0x01); - cpu_update_waitstates(); - break; - case 0x43: /* Cache Configure */ - dev->pci_conf[addr] = val & 0x8f; - break; - case 0x44: /* Shadow Configure */ - dev->pci_conf[addr] = val; - if (valxor & 0xff) { - sis_85c496_recalcmapping(dev); - if (((old & 0xf0) == 0xf0) && ((val & 0xf0) == 0x30)) - flushmmucache_nopc(); - else if (((old & 0xf0) == 0xf0) && ((val & 0xf0) == 0x00)) - flushmmucache_nopc(); - else - flushmmucache(); - } - break; - case 0x45: /* Shadow Configure */ - dev->pci_conf[addr] = val & 0x0f; - if (valxor & 0x03) - sis_85c496_recalcmapping(dev); - break; - case 0x46: /* Cacheable Control */ - dev->pci_conf[addr] = val; - break; - case 0x47: /* 85C496 Address Decoder */ - dev->pci_conf[addr] = val & 0x1f; - break; - case 0x48: case 0x49: case 0x4a: case 0x4b: /* DRAM Boundary */ - case 0x4c: case 0x4d: case 0x4e: case 0x4f: - // dev->pci_conf[addr] = val; - spd_write_drbs(dev->pci_conf, 0x48, 0x4f, 1); - break; - case 0x50: case 0x51: /* Exclusive Area 0 Setup */ - dev->pci_conf[addr] = val; - break; - case 0x52: case 0x53: /* Exclusive Area 1 Setup */ - dev->pci_conf[addr] = val; - break; - case 0x54: /* Exclusive Area 2 Setup */ - dev->pci_conf[addr] = val; - break; - case 0x55: /* Exclusive Area 3 Setup */ - dev->pci_conf[addr] = val & 0xf0; - break; - case 0x56: /* PCI / Keyboard Configure */ - dev->pci_conf[addr] = val; - if (valxor & 0x02) { - port_92_remove(dev->port_92); - if (val & 0x02) - port_92_add(dev->port_92); - } - break; - case 0x57: /* Output Pin Configuration */ - dev->pci_conf[addr] = val; - break; - case 0x58: /* Build-in IDE Controller / VESA Bus Configuration */ - dev->pci_conf[addr] = val & 0xd7; - if (valxor & 0xc0) - sis_85c496_ide_handler(dev); - break; - case 0x59: /* Build-in IDE Controller / VESA Bus Configuration */ - dev->pci_conf[addr] = val; - if (valxor & 0x03) - sis_85c496_ide_handler(dev); - break; - case 0x5a: /* SMRAM Remapping Configuration */ - dev->pci_conf[addr] = val & 0xbe; - if (valxor & 0x3e) { - unmask_a20_in_smm = !!(val & 0x20); + /* 86C496 Specific Registers (40h ~ 7Fh) */ + case 0x40: /* CPU Configuration */ + dev->pci_conf[addr] = val & 0x7f; + break; + case 0x41: /* DRAM Configuration */ + dev->pci_conf[addr] = val; + break; + case 0x42: /* Cache Configure */ + dev->pci_conf[addr] = val; + cpu_cache_ext_enabled = (val & 0x01); + cpu_update_waitstates(); + break; + case 0x43: /* Cache Configure */ + dev->pci_conf[addr] = val & 0x8f; + break; + case 0x44: /* Shadow Configure */ + dev->pci_conf[addr] = val; + if (valxor & 0xff) { + sis_85c496_recalcmapping(dev); + if (((old & 0xf0) == 0xf0) && ((val & 0xf0) == 0x30)) + flushmmucache_nopc(); + else if (((old & 0xf0) == 0xf0) && ((val & 0xf0) == 0x00)) + flushmmucache_nopc(); + else + flushmmucache(); + } + break; + case 0x45: /* Shadow Configure */ + dev->pci_conf[addr] = val & 0x0f; + if (valxor & 0x03) + sis_85c496_recalcmapping(dev); + break; + case 0x46: /* Cacheable Control */ + dev->pci_conf[addr] = val; + break; + case 0x47: /* 85C496 Address Decoder */ + dev->pci_conf[addr] = val & 0x1f; + break; + case 0x48: + case 0x49: + case 0x4a: + case 0x4b: /* DRAM Boundary */ + case 0x4c: + case 0x4d: + case 0x4e: + case 0x4f: + // dev->pci_conf[addr] = val; + spd_write_drbs(dev->pci_conf, 0x48, 0x4f, 1); + break; + case 0x50: + case 0x51: /* Exclusive Area 0 Setup */ + dev->pci_conf[addr] = val; + break; + case 0x52: + case 0x53: /* Exclusive Area 1 Setup */ + dev->pci_conf[addr] = val; + break; + case 0x54: /* Exclusive Area 2 Setup */ + dev->pci_conf[addr] = val; + break; + case 0x55: /* Exclusive Area 3 Setup */ + dev->pci_conf[addr] = val & 0xf0; + break; + case 0x56: /* PCI / Keyboard Configure */ + dev->pci_conf[addr] = val; + if (valxor & 0x02) { + port_92_remove(dev->port_92); + if (val & 0x02) + port_92_add(dev->port_92); + } + break; + case 0x57: /* Output Pin Configuration */ + dev->pci_conf[addr] = val; + break; + case 0x58: /* Build-in IDE Controller / VESA Bus Configuration */ + dev->pci_conf[addr] = val & 0xd7; + if (valxor & 0xc0) + sis_85c496_ide_handler(dev); + break; + case 0x59: /* Build-in IDE Controller / VESA Bus Configuration */ + dev->pci_conf[addr] = val; + if (valxor & 0x03) + sis_85c496_ide_handler(dev); + break; + case 0x5a: /* SMRAM Remapping Configuration */ + dev->pci_conf[addr] = val & 0xbe; + if (valxor & 0x3e) { + unmask_a20_in_smm = !!(val & 0x20); - smram_disable_all(); + smram_disable_all(); - if (val & 0x02) { - host_base = 0x00060000; - ram_base = 0x000a0000; - size = 0x00010000; - switch ((val >> 3) & 0x03) { - case 0x00: - host_base = 0x00060000; - ram_base = 0x000a0000; - break; - case 0x01: - host_base = 0x00060000; - ram_base = 0x000b0000; - break; - case 0x02: - host_base = 0x000e0000; - ram_base = 0x000a0000; - break; - case 0x03: - host_base = 0x000e0000; - ram_base = 0x000b0000; - break; - } + if (val & 0x02) { + host_base = 0x00060000; + ram_base = 0x000a0000; + size = 0x00010000; + switch ((val >> 3) & 0x03) { + case 0x00: + host_base = 0x00060000; + ram_base = 0x000a0000; + break; + case 0x01: + host_base = 0x00060000; + ram_base = 0x000b0000; + break; + case 0x02: + host_base = 0x000e0000; + ram_base = 0x000a0000; + break; + case 0x03: + host_base = 0x000e0000; + ram_base = 0x000b0000; + break; + } - smram_enable(dev->smram, host_base, ram_base, size, - ((val & 0x06) == 0x06), (val & 0x02)); - } - } - break; - case 0x5b: /* Programmable I/O Traps Configure */ - case 0x5c: case 0x5d: /* Programmable I/O Trap 0 Base */ - case 0x5e: case 0x5f: /* Programmable I/O Trap 0 Base */ - case 0x60: case 0x61: /* IDE Controller Channel 0 Configuration */ - case 0x62: case 0x63: /* IDE Controller Channel 1 Configuration */ - case 0x64: case 0x65: /* Exclusive Area 3 Setup */ - case 0x66: /* EDO DRAM Configuration */ - case 0x68: case 0x69: /* Asymmetry DRAM Configuration */ - dev->pci_conf[addr] = val; - break; - case 0x67: /* Miscellaneous Control */ - dev->pci_conf[addr] = val & 0xf9; - if (valxor & 0x60) - port_92_set_features(dev->port_92, !!(val & 0x20), !!(val & 0x40)); - break; + smram_enable(dev->smram, host_base, ram_base, size, + ((val & 0x06) == 0x06), (val & 0x02)); + } + } + break; + case 0x5b: /* Programmable I/O Traps Configure */ + case 0x5c: + case 0x5d: /* Programmable I/O Trap 0 Base */ + case 0x5e: + case 0x5f: /* Programmable I/O Trap 0 Base */ + case 0x60: + case 0x61: /* IDE Controller Channel 0 Configuration */ + case 0x62: + case 0x63: /* IDE Controller Channel 1 Configuration */ + case 0x64: + case 0x65: /* Exclusive Area 3 Setup */ + case 0x66: /* EDO DRAM Configuration */ + case 0x68: + case 0x69: /* Asymmetry DRAM Configuration */ + dev->pci_conf[addr] = val; + break; + case 0x67: /* Miscellaneous Control */ + dev->pci_conf[addr] = val & 0xf9; + if (valxor & 0x60) + port_92_set_features(dev->port_92, !!(val & 0x20), !!(val & 0x40)); + break; - /* 86C497 Specific Registers (80h ~ FFh) */ - case 0x80: /* PMU Configuration */ - case 0x85: /* STPCLK# Event Control */ - case 0x86: case 0x87: /* STPCLK# Deassertion IRQ Selection */ - case 0x89: /* Fast Timer Count */ - case 0x8a: /* Generic Timer Count */ - case 0x8b: /* Slow Timer Count */ - case 0x8e: /* Clock Throttling On Timer Count */ - case 0x8f: /* Clock Throttling Off Timer Count */ - case 0x90: /* Clock Throttling On Timer Reload Condition */ - case 0x92: /* Fast Timer Reload Condition */ - case 0x94: /* Generic Timer Reload Condition */ - case 0x96: /* Slow Timer Reload Condition */ - case 0x98: case 0x99: /* Fast Timer Reload IRQ Selection */ - case 0x9a: case 0x9b: /* Generic Timer Reload IRQ Selection */ - case 0x9c: case 0x9d: /* Slow Timer Reload IRQ Selection */ - case 0xa2: /* SMI Request Status Selection */ - case 0xa4: case 0xa5: /* SMI Request IRQ Selection */ - case 0xa6: case 0xa7: /* Clock Throttlign On Timer Reload IRQ Selection */ - case 0xa8: /* GPIO Control */ - case 0xaa: /* GPIO DeBounce Count */ - case 0xd2: /* Exclusive Area 2 Base Address */ - dev->pci_conf[addr] = val; - break; - case 0x81: /* PMU CPU Type Configuration */ - dev->pci_conf[addr] = val & 0x9f; - break; - case 0x88: /* Timer Control */ - dev->pci_conf[addr] = val & 0x3f; - break; - case 0x8d: /* RMSMIBLK Timer Count */ - dev->pci_conf[addr] = val; - dev->rmsmiblk_count = val; - timer_stop(&dev->rmsmiblk_timer); - if (val >= 0x02) - timer_on_auto(&dev->rmsmiblk_timer, 35.0); - break; - case 0x91: /* Clock Throttling On Timer Reload Condition */ - case 0x93: /* Fast Timer Reload Condition */ - case 0x95: /* Generic Timer Reload Condition */ - dev->pci_conf[addr] = val & 0x03; - break; - case 0x97: /* Slow Timer Reload Condition */ - dev->pci_conf[addr] = val & 0xc3; - break; - case 0x9e: /* Soft-SMI Generation / RMSMIBLK Trigger */ - if (!smi_block && (val & 0x01) && (dev->pci_conf[0x80] & 0x80) && (dev->pci_conf[0xa2] & 0x10)) { - if (dev->pci_conf[0x80] & 0x10) - picint(1 << smm_irq[dev->pci_conf[0x81] & 0x03]); - else - smi_raise(); - smi_block = 1; - dev->pci_conf[0xa0] |= 0x10; - } - if (val & 0x02) { - timer_stop(&dev->rmsmiblk_timer); - if (dev->rmsmiblk_count >= 0x02) - timer_on_auto(&dev->rmsmiblk_timer, 35.0); - } - break; - case 0xa0: case 0xa1: /* SMI Request Status */ - dev->pci_conf[addr] &= ~val; - break; - case 0xa3: /* SMI Request Status Selection */ - dev->pci_conf[addr] = val & 0x7f; - break; - case 0xa9: /* GPIO SMI Request Status */ - dev->pci_conf[addr] = ~(val & 0x03); - break; - case 0xc0: /* PCI INTA# -to-IRQ Link */ - case 0xc1: /* PCI INTB# -to-IRQ Link */ - case 0xc2: /* PCI INTC# -to-IRQ Link */ - case 0xc3: /* PCI INTD# -to-IRQ Link */ - dev->pci_conf[addr] = val & 0x8f; - if (val & 0x80) - pci_set_irq_routing(PCI_INTA + (addr & 0x03), val & 0xf); - else - pci_set_irq_routing(PCI_INTA + (addr & 0x03), PCI_IRQ_DISABLED); - break; - case 0xc6: /* 85C497 Post / INIT Configuration */ - dev->pci_conf[addr] = val & 0x0f; - break; - case 0xc8: case 0xc9: case 0xca: case 0xcb: /* Mail Box */ - dev->pci_conf[addr] = val; - break; - case 0xd0: /* ISA BIOS Configuration */ - dev->pci_conf[addr] = val & 0xfb; - break; - case 0xd1: /* ISA Address Decoder */ - if (dev->pci_conf[0xd0] & 0x01) - dev->pci_conf[addr] = val; - break; - case 0xd3: /* Exclusive Area 2 Base Address */ - dev->pci_conf[addr] = val & 0xf0; - break; - case 0xd4: /* Miscellaneous Configuration */ - dev->pci_conf[addr] = val & 0x6e; - nvr_bank_set(0, !!(val & 0x40), dev->nvr); - break; + /* 86C497 Specific Registers (80h ~ FFh) */ + case 0x80: /* PMU Configuration */ + case 0x85: /* STPCLK# Event Control */ + case 0x86: + case 0x87: /* STPCLK# Deassertion IRQ Selection */ + case 0x89: /* Fast Timer Count */ + case 0x8a: /* Generic Timer Count */ + case 0x8b: /* Slow Timer Count */ + case 0x8e: /* Clock Throttling On Timer Count */ + case 0x8f: /* Clock Throttling Off Timer Count */ + case 0x90: /* Clock Throttling On Timer Reload Condition */ + case 0x92: /* Fast Timer Reload Condition */ + case 0x94: /* Generic Timer Reload Condition */ + case 0x96: /* Slow Timer Reload Condition */ + case 0x98: + case 0x99: /* Fast Timer Reload IRQ Selection */ + case 0x9a: + case 0x9b: /* Generic Timer Reload IRQ Selection */ + case 0x9c: + case 0x9d: /* Slow Timer Reload IRQ Selection */ + case 0xa2: /* SMI Request Status Selection */ + case 0xa4: + case 0xa5: /* SMI Request IRQ Selection */ + case 0xa6: + case 0xa7: /* Clock Throttlign On Timer Reload IRQ Selection */ + case 0xa8: /* GPIO Control */ + case 0xaa: /* GPIO DeBounce Count */ + case 0xd2: /* Exclusive Area 2 Base Address */ + dev->pci_conf[addr] = val; + break; + case 0x81: /* PMU CPU Type Configuration */ + dev->pci_conf[addr] = val & 0x9f; + break; + case 0x88: /* Timer Control */ + dev->pci_conf[addr] = val & 0x3f; + break; + case 0x8d: /* RMSMIBLK Timer Count */ + dev->pci_conf[addr] = val; + dev->rmsmiblk_count = val; + timer_stop(&dev->rmsmiblk_timer); + if (val >= 0x02) + timer_on_auto(&dev->rmsmiblk_timer, 35.0); + break; + case 0x91: /* Clock Throttling On Timer Reload Condition */ + case 0x93: /* Fast Timer Reload Condition */ + case 0x95: /* Generic Timer Reload Condition */ + dev->pci_conf[addr] = val & 0x03; + break; + case 0x97: /* Slow Timer Reload Condition */ + dev->pci_conf[addr] = val & 0xc3; + break; + case 0x9e: /* Soft-SMI Generation / RMSMIBLK Trigger */ + if (!smi_block && (val & 0x01) && (dev->pci_conf[0x80] & 0x80) && (dev->pci_conf[0xa2] & 0x10)) { + if (dev->pci_conf[0x80] & 0x10) + picint(1 << smm_irq[dev->pci_conf[0x81] & 0x03]); + else + smi_raise(); + smi_block = 1; + dev->pci_conf[0xa0] |= 0x10; + } + if (val & 0x02) { + timer_stop(&dev->rmsmiblk_timer); + if (dev->rmsmiblk_count >= 0x02) + timer_on_auto(&dev->rmsmiblk_timer, 35.0); + } + break; + case 0xa0: + case 0xa1: /* SMI Request Status */ + dev->pci_conf[addr] &= ~val; + break; + case 0xa3: /* SMI Request Status Selection */ + dev->pci_conf[addr] = val & 0x7f; + break; + case 0xa9: /* GPIO SMI Request Status */ + dev->pci_conf[addr] = ~(val & 0x03); + break; + case 0xc0: /* PCI INTA# -to-IRQ Link */ + case 0xc1: /* PCI INTB# -to-IRQ Link */ + case 0xc2: /* PCI INTC# -to-IRQ Link */ + case 0xc3: /* PCI INTD# -to-IRQ Link */ + dev->pci_conf[addr] = val & 0x8f; + if (val & 0x80) + pci_set_irq_routing(PCI_INTA + (addr & 0x03), val & 0xf); + else + pci_set_irq_routing(PCI_INTA + (addr & 0x03), PCI_IRQ_DISABLED); + break; + case 0xc6: /* 85C497 Post / INIT Configuration */ + dev->pci_conf[addr] = val & 0x0f; + break; + case 0xc8: + case 0xc9: + case 0xca: + case 0xcb: /* Mail Box */ + dev->pci_conf[addr] = val; + break; + case 0xd0: /* ISA BIOS Configuration */ + dev->pci_conf[addr] = val & 0xfb; + break; + case 0xd1: /* ISA Address Decoder */ + if (dev->pci_conf[0xd0] & 0x01) + dev->pci_conf[addr] = val; + break; + case 0xd3: /* Exclusive Area 2 Base Address */ + dev->pci_conf[addr] = val & 0xf0; + break; + case 0xd4: /* Miscellaneous Configuration */ + dev->pci_conf[addr] = val & 0x6e; + nvr_bank_set(0, !!(val & 0x40), dev->nvr); + break; } } - static uint8_t sis_85c49x_pci_read(int func, int addr, void *priv) { sis_85c496_t *dev = (sis_85c496_t *) priv; - uint8_t ret = dev->pci_conf[addr]; + uint8_t ret = dev->pci_conf[addr]; switch (addr) { - case 0xa0: - ret &= 0x10; - break; - case 0xa1: - ret = 0x00; - break; - case 0x82: /*Port 22h Mirror*/ - ret = dev->cur_reg; - break; - case 0x83: /*Port 70h Mirror*/ - ret = inb(0x70); - break; + case 0xa0: + ret &= 0x10; + break; + case 0xa1: + ret = 0x00; + break; + case 0x82: /*Port 22h Mirror*/ + ret = dev->cur_reg; + break; + case 0x83: /*Port 70h Mirror*/ + ret = inb(0x70); + break; } sis_85c496_log("[%04X:%08X] PCI Read %02X from %02X:%02X\n", CS, cpu_state.pc, ret, func, addr); @@ -469,7 +485,6 @@ sis_85c49x_pci_read(int func, int addr, void *priv) return ret; } - static void sis_85c496_rmsmiblk_count(void *priv) { @@ -478,14 +493,13 @@ sis_85c496_rmsmiblk_count(void *priv) dev->rmsmiblk_count--; if (dev->rmsmiblk_count == 1) { - smi_block = 0; - dev->rmsmiblk_count = 0; - timer_stop(&dev->rmsmiblk_timer); + smi_block = 0; + dev->rmsmiblk_count = 0; + timer_stop(&dev->rmsmiblk_timer); } else - timer_on_auto(&dev->rmsmiblk_timer, 35.0); + timer_on_auto(&dev->rmsmiblk_timer, 35.0); } - static void sis_85c497_isa_reset(sis_85c496_t *dev) { @@ -499,21 +513,20 @@ sis_85c497_isa_reset(sis_85c496_t *dev) dma_set_mask(0x00ffffff); io_removehandler(0x0022, 0x0002, - sis_85c497_isa_read, NULL, NULL, sis_85c497_isa_write, NULL, NULL, dev); + sis_85c497_isa_read, NULL, NULL, sis_85c497_isa_write, NULL, NULL, dev); io_removehandler(0x0033, 0x0001, - sis_85c497_isa_read, NULL, NULL, sis_85c497_isa_write, NULL, NULL, dev); + sis_85c497_isa_read, NULL, NULL, sis_85c497_isa_write, NULL, NULL, dev); io_sethandler(0x0022, 0x0002, - sis_85c497_isa_read, NULL, NULL, sis_85c497_isa_write, NULL, NULL, dev); + sis_85c497_isa_read, NULL, NULL, sis_85c497_isa_write, NULL, NULL, dev); io_sethandler(0x0033, 0x0001, - sis_85c497_isa_read, NULL, NULL, sis_85c497_isa_write, NULL, NULL, dev); + sis_85c497_isa_read, NULL, NULL, sis_85c497_isa_write, NULL, NULL, dev); } - static void sis_85c496_reset(void *priv) { sis_85c496_t *dev = (sis_85c496_t *) priv; - int i; + int i; sis_85c49x_pci_write(0, 0x44, 0x00, dev); sis_85c49x_pci_write(0, 0x45, 0x00, dev); @@ -523,7 +536,7 @@ sis_85c496_reset(void *priv) // sis_85c49x_pci_write(0, 0x5a, 0x06, dev); for (i = 0; i < 8; i++) - sis_85c49x_pci_write(0, 0x48 + i, 0x00, dev); + sis_85c49x_pci_write(0, 0x48 + i, 0x00, dev); sis_85c49x_pci_write(0, 0x80, 0x00, dev); sis_85c49x_pci_write(0, 0x81, 0x00, dev); @@ -553,20 +566,19 @@ sis_85c496_reset(void *priv) sis_85c497_isa_reset(dev); } - static void sis_85c496_close(void *p) { - sis_85c496_t *dev = (sis_85c496_t *)p; + sis_85c496_t *dev = (sis_85c496_t *) p; smram_del(dev->smram); free(dev); } - static void -*sis_85c496_init(const device_t *info) + * + sis_85c496_init(const device_t *info) { sis_85c496_t *dev = malloc(sizeof(sis_85c496_t)); memset(dev, 0x00, sizeof(sis_85c496_t)); @@ -574,21 +586,21 @@ static void dev->smram = smram_add(); /* PCI Configuration Header Registers (00h ~ 3Fh) */ - dev->pci_conf[0x00] = 0x39; /* SiS */ + dev->pci_conf[0x00] = 0x39; /* SiS */ dev->pci_conf[0x01] = 0x10; - dev->pci_conf[0x02] = 0x96; /* 496/497 */ + dev->pci_conf[0x02] = 0x96; /* 496/497 */ dev->pci_conf[0x03] = 0x04; dev->pci_conf[0x04] = 0x07; dev->pci_conf[0x06] = 0x80; dev->pci_conf[0x07] = 0x02; - dev->pci_conf[0x08] = 0x02; /* Device revision */ - dev->pci_conf[0x09] = 0x00; /* Device class (PCI bridge) */ + dev->pci_conf[0x08] = 0x02; /* Device revision */ + dev->pci_conf[0x09] = 0x00; /* Device class (PCI bridge) */ dev->pci_conf[0x0b] = 0x06; /* 86C496 Specific Registers (40h ~ 7Fh) */ /* 86C497 Specific Registers (80h ~ FFh) */ - dev->pci_conf[0xd0] = 0x78; /* ROM at E0000-FFFFF, Flash enable. */ + dev->pci_conf[0xd0] = 0x78; /* ROM at E0000-FFFFF, Flash enable. */ dev->pci_conf[0xd1] = 0xff; pci_add_card(PCI_ADD_NORTHBRIDGE, sis_85c49x_pci_read, sis_85c49x_pci_write, dev); @@ -605,9 +617,9 @@ static void ide_sec_disable(); if (info->local) - dev->nvr = device_add(&ami_1994_nvr_device); + dev->nvr = device_add(&ami_1994_nvr_device); else - dev->nvr = device_add(&at_nvr_device); + dev->nvr = device_add(&at_nvr_device); dma_high_page_init(); @@ -619,29 +631,29 @@ static void } const device_t sis_85c496_device = { - .name = "SiS 85c496/85c497", + .name = "SiS 85c496/85c497", .internal_name = "sis_85c496", - .flags = DEVICE_PCI, - .local = 0, - .init = sis_85c496_init, - .close = sis_85c496_close, - .reset = sis_85c496_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = sis_85c496_init, + .close = sis_85c496_close, + .reset = sis_85c496_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t sis_85c496_ls486e_device = { - .name = "SiS 85c496/85c497 (Lucky Star LS-486E)", + .name = "SiS 85c496/85c497 (Lucky Star LS-486E)", .internal_name = "sis_85c496_ls486e", - .flags = DEVICE_PCI, - .local = 1, - .init = sis_85c496_init, - .close = sis_85c496_close, - .reset = sis_85c496_reset, + .flags = DEVICE_PCI, + .local = 1, + .init = sis_85c496_init, + .close = sis_85c496_close, + .reset = sis_85c496_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/sis_85c4xx.c b/src/chipset/sis_85c4xx.c index 508f653e2..ba830ef0a 100644 --- a/src/chipset/sis_85c4xx.c +++ b/src/chipset/sis_85c4xx.c @@ -33,278 +33,275 @@ #include <86box/machine.h> #include <86box/chipset.h> - typedef struct { - uint8_t cur_reg, tries, - reg_base, reg_last, - reg_00, is_471, - regs[39], scratch[2]; - uint32_t mem_state[8]; - smram_t *smram; - port_92_t *port_92; + uint8_t cur_reg, tries, + reg_base, reg_last, + reg_00, is_471, + regs[39], scratch[2]; + uint32_t mem_state[8]; + smram_t *smram; + port_92_t *port_92; } sis_85c4xx_t; - static void sis_85c4xx_recalcmapping(sis_85c4xx_t *dev) { - uint32_t base, n = 0; + uint32_t base, n = 0; uint32_t i, shflags = 0; uint32_t readext, writeext; - uint8_t romcs = 0xc0, cur_romcs; + uint8_t romcs = 0xc0, cur_romcs; - shadowbios = 0; + shadowbios = 0; shadowbios_write = 0; if (dev->regs[0x03] & 0x40) - romcs |= 0x01; + romcs |= 0x01; if (dev->regs[0x03] & 0x80) - romcs |= 0x30; + romcs |= 0x30; if (dev->regs[0x08] & 0x04) - romcs |= 0x02; + romcs |= 0x02; for (i = 0; i < 8; i++) { - base = 0xc0000 + (i << 15); - cur_romcs = romcs & (1 << i); - readext = cur_romcs ? MEM_READ_EXTANY : MEM_READ_EXTERNAL; - writeext = cur_romcs ? MEM_WRITE_EXTANY : MEM_WRITE_EXTERNAL; + base = 0xc0000 + (i << 15); + cur_romcs = romcs & (1 << i); + readext = cur_romcs ? MEM_READ_EXTANY : MEM_READ_EXTERNAL; + writeext = cur_romcs ? MEM_WRITE_EXTANY : MEM_WRITE_EXTERNAL; - if ((i > 5) || (dev->regs[0x02] & (1 << i))) { - shadowbios |= (base >= 0xe0000) && (dev->regs[0x02] & 0x80); - shadowbios_write |= (base >= 0xe0000) && !(dev->regs[0x02] & 0x40); - shflags = (dev->regs[0x02] & 0x80) ? MEM_READ_INTERNAL : readext; - shflags |= (dev->regs[0x02] & 0x40) ? writeext : MEM_WRITE_INTERNAL; - if (dev->mem_state[i] != shflags) { - n++; - mem_set_mem_state(base, 0x8000, shflags); - if ((base >= 0xf0000) && (dev->mem_state[i] & MEM_READ_INTERNAL) && !(shflags & MEM_READ_INTERNAL)) - mem_invalidate_range(base, base + 0x7fff); - dev->mem_state[i] = shflags; - } - } else { - shflags = readext | writeext; - if (dev->mem_state[i] != shflags) { - n++; - mem_set_mem_state(base, 0x8000, shflags); - dev->mem_state[i] = shflags; - } - } + if ((i > 5) || (dev->regs[0x02] & (1 << i))) { + shadowbios |= (base >= 0xe0000) && (dev->regs[0x02] & 0x80); + shadowbios_write |= (base >= 0xe0000) && !(dev->regs[0x02] & 0x40); + shflags = (dev->regs[0x02] & 0x80) ? MEM_READ_INTERNAL : readext; + shflags |= (dev->regs[0x02] & 0x40) ? writeext : MEM_WRITE_INTERNAL; + if (dev->mem_state[i] != shflags) { + n++; + mem_set_mem_state(base, 0x8000, shflags); + if ((base >= 0xf0000) && (dev->mem_state[i] & MEM_READ_INTERNAL) && !(shflags & MEM_READ_INTERNAL)) + mem_invalidate_range(base, base + 0x7fff); + dev->mem_state[i] = shflags; + } + } else { + shflags = readext | writeext; + if (dev->mem_state[i] != shflags) { + n++; + mem_set_mem_state(base, 0x8000, shflags); + dev->mem_state[i] = shflags; + } + } } if (n > 0) - flushmmucache_nopc(); + flushmmucache_nopc(); } - static void sis_85c4xx_sw_smi_out(uint16_t port, uint8_t val, void *priv) { sis_85c4xx_t *dev = (sis_85c4xx_t *) priv; if (dev->regs[0x18] & 0x02) { - if (dev->regs[0x0b] & 0x10) - smi_raise(); - else - picint(1 << ((dev->regs[0x0b] & 0x08) ? 15 : 12)); - soft_reset_mask = 1; - dev->regs[0x19] |= 0x02; + if (dev->regs[0x0b] & 0x10) + smi_raise(); + else + picint(1 << ((dev->regs[0x0b] & 0x08) ? 15 : 12)); + soft_reset_mask = 1; + dev->regs[0x19] |= 0x02; } } - static void sis_85c4xx_sw_smi_handler(sis_85c4xx_t *dev) { uint16_t addr; if (!dev->is_471) - return; + return; addr = dev->regs[0x14] | (dev->regs[0x15] << 8); io_handler((dev->regs[0x0b] & 0x80) && (dev->regs[0x18] & 0x02), addr, 0x0001, - NULL, NULL, NULL, sis_85c4xx_sw_smi_out, NULL, NULL, dev); + NULL, NULL, NULL, sis_85c4xx_sw_smi_out, NULL, NULL, dev); } - static void sis_85c4xx_out(uint16_t port, uint8_t val, void *priv) { - sis_85c4xx_t *dev = (sis_85c4xx_t *) priv; - uint8_t rel_reg = dev->cur_reg - dev->reg_base; - uint8_t valxor = 0x00; - uint32_t host_base = 0x000e0000, ram_base = 0x000a0000; + sis_85c4xx_t *dev = (sis_85c4xx_t *) priv; + uint8_t rel_reg = dev->cur_reg - dev->reg_base; + uint8_t valxor = 0x00; + uint32_t host_base = 0x000e0000, ram_base = 0x000a0000; switch (port) { - case 0x22: - dev->cur_reg = val; - break; - case 0x23: - if ((dev->cur_reg >= dev->reg_base) && (dev->cur_reg <= dev->reg_last)) { - valxor = val ^ dev->regs[rel_reg]; - if (rel_reg == 0x19) - dev->regs[rel_reg] &= ~val; - else - dev->regs[rel_reg] = val; + case 0x22: + dev->cur_reg = val; + break; + case 0x23: + if ((dev->cur_reg >= dev->reg_base) && (dev->cur_reg <= dev->reg_last)) { + valxor = val ^ dev->regs[rel_reg]; + if (rel_reg == 0x19) + dev->regs[rel_reg] &= ~val; + else + dev->regs[rel_reg] = val; - switch (rel_reg) { - case 0x01: - cpu_cache_ext_enabled = ((val & 0x84) == 0x84); - cpu_update_waitstates(); - break; + switch (rel_reg) { + case 0x01: + cpu_cache_ext_enabled = ((val & 0x84) == 0x84); + cpu_update_waitstates(); + break; - case 0x02: case 0x03: - case 0x08: - if (valxor) - sis_85c4xx_recalcmapping(dev); - break; + case 0x02: + case 0x03: + case 0x08: + if (valxor) + sis_85c4xx_recalcmapping(dev); + break; - case 0x0b: - sis_85c4xx_sw_smi_handler(dev); - if (dev->is_471 && (valxor & 0x02)) { - if (val & 0x02) - mem_remap_top(0); - else - mem_remap_top(256); - } - break; + case 0x0b: + sis_85c4xx_sw_smi_handler(dev); + if (dev->is_471 && (valxor & 0x02)) { + if (val & 0x02) + mem_remap_top(0); + else + mem_remap_top(256); + } + break; - case 0x13: - if (dev->is_471 && (valxor & 0xf0)) { - smram_disable(dev->smram); - host_base = (val & 0x80) ? 0x00060000 : 0x000e0000; - switch ((val >> 5) & 0x03) { - case 0x00: - ram_base = 0x000a0000; - break; - case 0x01: - ram_base = 0x000b0000; - break; - case 0x02: - ram_base = (val & 0x80) ? 0x00000000 : 0x000e0000; - break; - default: - ram_base = 0x00000000; - break; - } - if (ram_base != 0x00000000) - smram_enable(dev->smram, host_base, ram_base, 0x00010000, (val & 0x10), 1); - } - break; + case 0x13: + if (dev->is_471 && (valxor & 0xf0)) { + smram_disable(dev->smram); + host_base = (val & 0x80) ? 0x00060000 : 0x000e0000; + switch ((val >> 5) & 0x03) { + case 0x00: + ram_base = 0x000a0000; + break; + case 0x01: + ram_base = 0x000b0000; + break; + case 0x02: + ram_base = (val & 0x80) ? 0x00000000 : 0x000e0000; + break; + default: + ram_base = 0x00000000; + break; + } + if (ram_base != 0x00000000) + smram_enable(dev->smram, host_base, ram_base, 0x00010000, (val & 0x10), 1); + } + break; - case 0x14: case 0x15: - case 0x18: - sis_85c4xx_sw_smi_handler(dev); - break; + case 0x14: + case 0x15: + case 0x18: + sis_85c4xx_sw_smi_handler(dev); + break; - case 0x1c: - if (dev->is_471) - soft_reset_mask = 0; - break; + case 0x1c: + if (dev->is_471) + soft_reset_mask = 0; + break; - case 0x22: - if (dev->is_471 && (valxor & 0x01)) { - port_92_remove(dev->port_92); - if (val & 0x01) - port_92_add(dev->port_92); - } - break; - } - } else if ((dev->reg_base == 0x60) && (dev->cur_reg == 0x00)) - dev->reg_00 = val; - dev->cur_reg = 0x00; - break; + case 0x22: + if (dev->is_471 && (valxor & 0x01)) { + port_92_remove(dev->port_92); + if (val & 0x01) + port_92_add(dev->port_92); + } + break; + } + } else if ((dev->reg_base == 0x60) && (dev->cur_reg == 0x00)) + dev->reg_00 = val; + dev->cur_reg = 0x00; + break; - case 0xe1: case 0xe2: - dev->scratch[port - 0xe1] = val; - return; + case 0xe1: + case 0xe2: + dev->scratch[port - 0xe1] = val; + return; } } - static uint8_t sis_85c4xx_in(uint16_t port, void *priv) { - sis_85c4xx_t *dev = (sis_85c4xx_t *) priv; - uint8_t rel_reg = dev->cur_reg - dev->reg_base; - uint8_t ret = 0xff; + sis_85c4xx_t *dev = (sis_85c4xx_t *) priv; + uint8_t rel_reg = dev->cur_reg - dev->reg_base; + uint8_t ret = 0xff; switch (port) { - case 0x23: - if (dev->is_471 && (dev->cur_reg == 0x1c)) - ret = inb(0x70); - /* On the SiS 40x, the shadow RAM read and write enable bits are write-only! */ - if ((dev->reg_base == 0x60) && (dev->cur_reg == 0x62)) - ret = dev->regs[rel_reg] & 0x3f; - else if ((dev->cur_reg >= dev->reg_base) && (dev->cur_reg <= dev->reg_last)) - ret = dev->regs[rel_reg]; - else if ((dev->reg_base == 0x60) && (dev->cur_reg == 0x00)) - ret = dev->reg_00; - if (dev->reg_base != 0x60) - dev->cur_reg = 0x00; - break; + case 0x23: + if (dev->is_471 && (dev->cur_reg == 0x1c)) + ret = inb(0x70); + /* On the SiS 40x, the shadow RAM read and write enable bits are write-only! */ + if ((dev->reg_base == 0x60) && (dev->cur_reg == 0x62)) + ret = dev->regs[rel_reg] & 0x3f; + else if ((dev->cur_reg >= dev->reg_base) && (dev->cur_reg <= dev->reg_last)) + ret = dev->regs[rel_reg]; + else if ((dev->reg_base == 0x60) && (dev->cur_reg == 0x00)) + ret = dev->reg_00; + if (dev->reg_base != 0x60) + dev->cur_reg = 0x00; + break; - case 0xe1: case 0xe2: - ret = dev->scratch[port - 0xe1]; + case 0xe1: + case 0xe2: + ret = dev->scratch[port - 0xe1]; } return ret; } - static void sis_85c4xx_reset(void *priv) { - sis_85c4xx_t *dev = (sis_85c4xx_t *) priv; - int mem_size_mb = mem_size >> 10; + sis_85c4xx_t *dev = (sis_85c4xx_t *) priv; + int mem_size_mb = mem_size >> 10; static uint8_t ram_4xx[64] = { 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x03, 0x00, 0x04, 0x00, 0x05, 0x00, 0x0b, 0x00, 0x00, 0x00, - 0x19, 0x00, 0x06, 0x00, 0x14, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x1b, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; + 0x19, 0x00, 0x06, 0x00, 0x14, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x1b, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; static uint8_t ram_471[64] = { 0x00, 0x00, 0x01, 0x01, 0x02, 0x20, 0x09, 0x09, 0x04, 0x04, 0x05, 0x05, 0x0b, 0x0b, 0x0b, 0x0b, - 0x13, 0x21, 0x06, 0x06, 0x0d, 0x0d, 0x0d, 0x0d, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, - 0x1b, 0x1b, 0x1b, 0x1b, 0x0f, 0x0f, 0x0f, 0x0f, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, - 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e }; + 0x13, 0x21, 0x06, 0x06, 0x0d, 0x0d, 0x0d, 0x0d, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, + 0x1b, 0x1b, 0x1b, 0x1b, 0x0f, 0x0f, 0x0f, 0x0f, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, + 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e }; memset(dev->regs, 0x00, sizeof(dev->regs)); if (cpu_s->rspeed < 25000000) - dev->regs[0x08] = 0x80; + dev->regs[0x08] = 0x80; if (dev->is_471) { - dev->regs[0x09] = 0x40; - if (mem_size_mb >= 64) { - if ((mem_size_mb >= 65) && (mem_size_mb < 68)) - dev->regs[0x09] |= 0x22; - else - dev->regs[0x09] |= 0x24; - } else - dev->regs[0x09] |= ram_471[mem_size_mb]; + dev->regs[0x09] = 0x40; + if (mem_size_mb >= 64) { + if ((mem_size_mb >= 65) && (mem_size_mb < 68)) + dev->regs[0x09] |= 0x22; + else + dev->regs[0x09] |= 0x24; + } else + dev->regs[0x09] |= ram_471[mem_size_mb]; - dev->regs[0x11] = 0x09; - dev->regs[0x12] = 0xff; - dev->regs[0x1f] = 0x20; /* Video access enabled. */ - dev->regs[0x23] = 0xf0; - dev->regs[0x26] = 0x01; + dev->regs[0x11] = 0x09; + dev->regs[0x12] = 0xff; + dev->regs[0x1f] = 0x20; /* Video access enabled. */ + dev->regs[0x23] = 0xf0; + dev->regs[0x26] = 0x01; - smram_enable(dev->smram, 0x000e0000, 0x000a0000, 0x00010000, 0, 1); + smram_enable(dev->smram, 0x000e0000, 0x000a0000, 0x00010000, 0, 1); - port_92_remove(dev->port_92); + port_92_remove(dev->port_92); - mem_remap_top(256); - soft_reset_mask = 0; + mem_remap_top(256); + soft_reset_mask = 0; } else { - /* Bits 6 and 7 must be clear on the SiS 40x. */ - if (dev->reg_base == 0x60) - dev->reg_00 = 0x24; + /* Bits 6 and 7 must be clear on the SiS 40x. */ + if (dev->reg_base == 0x60) + dev->reg_00 = 0x24; - if (mem_size_mb == 64) - dev->regs[0x00] = 0x1f; - else if (mem_size_mb < 64) - dev->regs[0x00] = ram_4xx[mem_size_mb]; + if (mem_size_mb == 64) + dev->regs[0x00] = 0x1f; + else if (mem_size_mb < 64) + dev->regs[0x00] = ram_4xx[mem_size_mb]; - dev->regs[0x11] = 0x01; + dev->regs[0x11] = 0x01; } dev->scratch[0] = dev->scratch[1] = 0xff; @@ -315,19 +312,17 @@ sis_85c4xx_reset(void *priv) sis_85c4xx_recalcmapping(dev); } - static void sis_85c4xx_close(void *priv) { sis_85c4xx_t *dev = (sis_85c4xx_t *) priv; if (dev->is_471) - smram_del(dev->smram); + smram_del(dev->smram); free(dev); } - static void * sis_85c4xx_init(const device_t *info) { @@ -339,19 +334,19 @@ sis_85c4xx_init(const device_t *info) dev->reg_base = info->local & 0xff; if (dev->is_471) { - dev->reg_last = dev->reg_base + 0x76; + dev->reg_last = dev->reg_base + 0x76; - dev->smram = smram_add(); + dev->smram = smram_add(); - dev->port_92 = device_add(&port_92_device); + dev->port_92 = device_add(&port_92_device); } else - dev->reg_last = dev->reg_base + 0x11; + dev->reg_last = dev->reg_base + 0x11; io_sethandler(0x0022, 0x0002, - sis_85c4xx_in, NULL, NULL, sis_85c4xx_out, NULL, NULL, dev); + sis_85c4xx_in, NULL, NULL, sis_85c4xx_out, NULL, NULL, dev); io_sethandler(0x00e1, 0x0002, - sis_85c4xx_in, NULL, NULL, sis_85c4xx_out, NULL, NULL, dev); + sis_85c4xx_in, NULL, NULL, sis_85c4xx_out, NULL, NULL, dev); sis_85c4xx_reset(dev); @@ -359,58 +354,58 @@ sis_85c4xx_init(const device_t *info) } const device_t sis_85c401_device = { - .name = "SiS 85c401/85c402", + .name = "SiS 85c401/85c402", .internal_name = "sis_85c401", - .flags = 0, - .local = 0x060, - .init = sis_85c4xx_init, - .close = sis_85c4xx_close, - .reset = sis_85c4xx_reset, + .flags = 0, + .local = 0x060, + .init = sis_85c4xx_init, + .close = sis_85c4xx_close, + .reset = sis_85c4xx_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t sis_85c460_device = { - .name = "SiS 85c460", + .name = "SiS 85c460", .internal_name = "sis_85c460", - .flags = 0, - .local = 0x050, - .init = sis_85c4xx_init, - .close = sis_85c4xx_close, - .reset = sis_85c4xx_reset, + .flags = 0, + .local = 0x050, + .init = sis_85c4xx_init, + .close = sis_85c4xx_close, + .reset = sis_85c4xx_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; /* TODO: Log to make sure the registers are correct. */ const device_t sis_85c461_device = { - .name = "SiS 85c461", + .name = "SiS 85c461", .internal_name = "sis_85c461", - .flags = 0, - .local = 0x050, - .init = sis_85c4xx_init, - .close = sis_85c4xx_close, - .reset = sis_85c4xx_reset, + .flags = 0, + .local = 0x050, + .init = sis_85c4xx_init, + .close = sis_85c4xx_close, + .reset = sis_85c4xx_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t sis_85c471_device = { - .name = "SiS 85c407/85c471", + .name = "SiS 85c407/85c471", .internal_name = "sis_85c471", - .flags = 0, - .local = 0x150, - .init = sis_85c4xx_init, - .close = sis_85c4xx_close, - .reset = sis_85c4xx_reset, + .flags = 0, + .local = 0x150, + .init = sis_85c4xx_init, + .close = sis_85c4xx_close, + .reset = sis_85c4xx_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/sis_85c50x.c b/src/chipset/sis_85c50x.c index 1c46074b1..f0209bf90 100644 --- a/src/chipset/sis_85c50x.c +++ b/src/chipset/sis_85c50x.c @@ -36,7 +36,6 @@ #include <86box/chipset.h> - #ifdef ENABLE_SIS_85C50X_LOG int sis_85c50x_do_log = ENABLE_SIS_85C50X_LOG; static void @@ -45,264 +44,272 @@ sis_85c50x_log(const char *fmt, ...) va_list ap; if (sis_85c50x_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define sis_85c50x_log(fmt, ...) +# define sis_85c50x_log(fmt, ...) #endif +typedef struct sis_85c50x_t { + uint8_t index, + pci_conf[256], pci_conf_sb[256], + regs[256]; -typedef struct sis_85c50x_t -{ - uint8_t index, - pci_conf[256], pci_conf_sb[256], - regs[256]; - - smram_t * smram; - port_92_t * port_92; + smram_t *smram; + port_92_t *port_92; } sis_85c50x_t; - static void sis_85c50x_shadow_recalc(sis_85c50x_t *dev) { uint32_t base, i, can_read, can_write; - can_read = (dev->pci_conf[0x53] & 0x40) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + can_read = (dev->pci_conf[0x53] & 0x40) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; can_write = (dev->pci_conf[0x53] & 0x20) ? MEM_WRITE_EXTANY : MEM_WRITE_INTERNAL; if (!can_read) - can_write = MEM_WRITE_EXTANY; + can_write = MEM_WRITE_EXTANY; mem_set_mem_state_both(0xf0000, 0x10000, can_read | can_write); - shadowbios = 1; + shadowbios = 1; shadowbios_write = 1; for (i = 0; i < 4; i++) { - base = 0xe0000 + (i << 14); - mem_set_mem_state_both(base, 0x4000, (dev->pci_conf[0x54] & (1 << (7 - i))) ? (can_read | can_write) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); - base = 0xd0000 + (i << 14); - mem_set_mem_state_both(base, 0x4000, (dev->pci_conf[0x55] & (1 << (7 - i))) ? (can_read | can_write) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); - base = 0xc0000 + (i << 14); - mem_set_mem_state_both(base, 0x4000, (dev->pci_conf[0x56] & (1 << (7 - i))) ? (can_read | can_write) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); + base = 0xe0000 + (i << 14); + mem_set_mem_state_both(base, 0x4000, (dev->pci_conf[0x54] & (1 << (7 - i))) ? (can_read | can_write) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); + base = 0xd0000 + (i << 14); + mem_set_mem_state_both(base, 0x4000, (dev->pci_conf[0x55] & (1 << (7 - i))) ? (can_read | can_write) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); + base = 0xc0000 + (i << 14); + mem_set_mem_state_both(base, 0x4000, (dev->pci_conf[0x56] & (1 << (7 - i))) ? (can_read | can_write) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); } flushmmucache_nopc(); } - static void sis_85c50x_smm_recalc(sis_85c50x_t *dev) { /* NOTE: Naming mismatch - what the datasheet calls "host address" is what we call ram_base. */ - uint32_t ram_base = (dev->pci_conf[0x64] << 20) | - ((dev->pci_conf[0x65] & 0x07) << 28); + uint32_t ram_base = (dev->pci_conf[0x64] << 20) | ((dev->pci_conf[0x65] & 0x07) << 28); smram_disable(dev->smram); if ((((dev->pci_conf[0x65] & 0xe0) >> 5) != 0x00) && (ram_base == 0x00000000)) - return; + return; switch ((dev->pci_conf[0x65] & 0xe0) >> 5) { - case 0x00: - smram_enable(dev->smram, 0xe0000, 0xe0000, 0x8000, (dev->pci_conf[0x65] & 0x10), 1); - break; - case 0x01: - smram_enable(dev->smram, 0xb0000, ram_base, 0x10000, (dev->pci_conf[0x65] & 0x10), 1); - break; - case 0x02: - smram_enable(dev->smram, 0xa0000, ram_base, 0x10000, (dev->pci_conf[0x65] & 0x10), 1); - break; - case 0x04: - smram_enable(dev->smram, 0xa0000, ram_base, 0x8000, (dev->pci_conf[0x65] & 0x10), 1); - break; - case 0x06: - smram_enable(dev->smram, 0xb0000, ram_base, 0x8000, (dev->pci_conf[0x65] & 0x10), 1); - break; + case 0x00: + smram_enable(dev->smram, 0xe0000, 0xe0000, 0x8000, (dev->pci_conf[0x65] & 0x10), 1); + break; + case 0x01: + smram_enable(dev->smram, 0xb0000, ram_base, 0x10000, (dev->pci_conf[0x65] & 0x10), 1); + break; + case 0x02: + smram_enable(dev->smram, 0xa0000, ram_base, 0x10000, (dev->pci_conf[0x65] & 0x10), 1); + break; + case 0x04: + smram_enable(dev->smram, 0xa0000, ram_base, 0x8000, (dev->pci_conf[0x65] & 0x10), 1); + break; + case 0x06: + smram_enable(dev->smram, 0xb0000, ram_base, 0x8000, (dev->pci_conf[0x65] & 0x10), 1); + break; } } - static void sis_85c50x_write(int func, int addr, uint8_t val, void *priv) { - sis_85c50x_t *dev = (sis_85c50x_t *)priv; - uint8_t valxor = (val ^ dev->pci_conf[addr]); + sis_85c50x_t *dev = (sis_85c50x_t *) priv; + uint8_t valxor = (val ^ dev->pci_conf[addr]); switch (addr) { - case 0x04: /* Command - low byte */ - dev->pci_conf[addr] = (dev->pci_conf[addr] & 0xb4) | (val & 0x4b); - break; - case 0x07: /* Status - high byte */ - dev->pci_conf[addr] = ((dev->pci_conf[addr] & 0xf9) & ~(val & 0xf8)) | (val & 0x06); - break; - case 0x50: - dev->pci_conf[addr] = val; - break; - case 0x51: /* Cache */ - dev->pci_conf[addr] = val; - cpu_cache_ext_enabled = (val & 0x40); - cpu_update_waitstates(); - break; - case 0x52: - dev->pci_conf[addr] = val; - break; - case 0x53: /* Shadow RAM */ - case 0x54: - case 0x55: - case 0x56: - dev->pci_conf[addr] = val; - sis_85c50x_shadow_recalc(dev); - if (addr == 0x54) - sis_85c50x_smm_recalc(dev); - break; - case 0x57: case 0x58: case 0x59: case 0x5a: - case 0x5c: case 0x5d: case 0x5e: case 0x61: - case 0x62: case 0x63: case 0x67: case 0x68: - case 0x6a: case 0x6b: case 0x6c: case 0x6d: - case 0x6e: case 0x6f: - dev->pci_conf[addr] = val; - break; - case 0x5f: - dev->pci_conf[addr] = val & 0xfe; - break; - case 0x5b: - dev->pci_conf[addr] = val; - if (valxor & 0xc0) - port_92_set_features(dev->port_92, !!(val & 0x40), !!(val & 0x80)); - break; - case 0x60: /* SMI */ - if ((dev->pci_conf[0x68] & 0x01) && !(dev->pci_conf[addr] & 0x02) && (val & 0x02)) { - dev->pci_conf[0x69] |= 0x01; - smi_raise(); - } - dev->pci_conf[addr] = val & 0x3e; - break; - case 0x64: /* SMRAM */ - case 0x65: - dev->pci_conf[addr] = val; - sis_85c50x_smm_recalc(dev); - break; - case 0x66: - dev->pci_conf[addr] = (val & 0x7f); - break; - case 0x69: - dev->pci_conf[addr] &= ~(val); - break; + case 0x04: /* Command - low byte */ + dev->pci_conf[addr] = (dev->pci_conf[addr] & 0xb4) | (val & 0x4b); + break; + case 0x07: /* Status - high byte */ + dev->pci_conf[addr] = ((dev->pci_conf[addr] & 0xf9) & ~(val & 0xf8)) | (val & 0x06); + break; + case 0x50: + dev->pci_conf[addr] = val; + break; + case 0x51: /* Cache */ + dev->pci_conf[addr] = val; + cpu_cache_ext_enabled = (val & 0x40); + cpu_update_waitstates(); + break; + case 0x52: + dev->pci_conf[addr] = val; + break; + case 0x53: /* Shadow RAM */ + case 0x54: + case 0x55: + case 0x56: + dev->pci_conf[addr] = val; + sis_85c50x_shadow_recalc(dev); + if (addr == 0x54) + sis_85c50x_smm_recalc(dev); + break; + case 0x57: + case 0x58: + case 0x59: + case 0x5a: + case 0x5c: + case 0x5d: + case 0x5e: + case 0x61: + case 0x62: + case 0x63: + case 0x67: + case 0x68: + case 0x6a: + case 0x6b: + case 0x6c: + case 0x6d: + case 0x6e: + case 0x6f: + dev->pci_conf[addr] = val; + break; + case 0x5f: + dev->pci_conf[addr] = val & 0xfe; + break; + case 0x5b: + dev->pci_conf[addr] = val; + if (valxor & 0xc0) + port_92_set_features(dev->port_92, !!(val & 0x40), !!(val & 0x80)); + break; + case 0x60: /* SMI */ + if ((dev->pci_conf[0x68] & 0x01) && !(dev->pci_conf[addr] & 0x02) && (val & 0x02)) { + dev->pci_conf[0x69] |= 0x01; + smi_raise(); + } + dev->pci_conf[addr] = val & 0x3e; + break; + case 0x64: /* SMRAM */ + case 0x65: + dev->pci_conf[addr] = val; + sis_85c50x_smm_recalc(dev); + break; + case 0x66: + dev->pci_conf[addr] = (val & 0x7f); + break; + case 0x69: + dev->pci_conf[addr] &= ~(val); + break; } sis_85c50x_log("85C501: dev->pci_conf[%02x] = %02x\n", addr, val); } - static uint8_t sis_85c50x_read(int func, int addr, void *priv) { - sis_85c50x_t *dev = (sis_85c50x_t *)priv; + sis_85c50x_t *dev = (sis_85c50x_t *) priv; sis_85c50x_log("85C501: dev->pci_conf[%02x] (%02x)\n", addr, dev->pci_conf[addr]); return dev->pci_conf[addr]; } - static void sis_85c50x_sb_write(int func, int addr, uint8_t val, void *priv) { - sis_85c50x_t *dev = (sis_85c50x_t *)priv; + sis_85c50x_t *dev = (sis_85c50x_t *) priv; switch (addr) { - case 0x04: /* Command */ - dev->pci_conf_sb[addr] = val & 0x0f; - break; - case 0x07: /* Status */ - dev->pci_conf_sb[addr] &= ~(val & 0x30); - break; - case 0x40: /* BIOS Control Register */ - dev->pci_conf_sb[addr] = val & 0x3f; - break; - case 0x41: case 0x42: case 0x43: case 0x44: - /* INTA/B/C/D# Remapping Control Register */ - dev->pci_conf_sb[addr] = val & 0x8f; - if (val & 0x80) - pci_set_irq_routing(PCI_INTA + (addr - 0x41), PCI_IRQ_DISABLED); - else - pci_set_irq_routing(PCI_INTA + (addr - 0x41), val & 0xf); - break; - case 0x48: /* ISA Master/DMA Memory Cycle Control Register 1 */ - case 0x49: /* ISA Master/DMA Memory Cycle Control Register 2 */ - case 0x4a: /* ISA Master/DMA Memory Cycle Control Register 3 */ - case 0x4b: /* ISA Master/DMA Memory Cycle Control Register 4 */ - dev->pci_conf_sb[addr] = val; - break; + case 0x04: /* Command */ + dev->pci_conf_sb[addr] = val & 0x0f; + break; + case 0x07: /* Status */ + dev->pci_conf_sb[addr] &= ~(val & 0x30); + break; + case 0x40: /* BIOS Control Register */ + dev->pci_conf_sb[addr] = val & 0x3f; + break; + case 0x41: + case 0x42: + case 0x43: + case 0x44: + /* INTA/B/C/D# Remapping Control Register */ + dev->pci_conf_sb[addr] = val & 0x8f; + if (val & 0x80) + pci_set_irq_routing(PCI_INTA + (addr - 0x41), PCI_IRQ_DISABLED); + else + pci_set_irq_routing(PCI_INTA + (addr - 0x41), val & 0xf); + break; + case 0x48: /* ISA Master/DMA Memory Cycle Control Register 1 */ + case 0x49: /* ISA Master/DMA Memory Cycle Control Register 2 */ + case 0x4a: /* ISA Master/DMA Memory Cycle Control Register 3 */ + case 0x4b: /* ISA Master/DMA Memory Cycle Control Register 4 */ + dev->pci_conf_sb[addr] = val; + break; } sis_85c50x_log("85C503: dev->pci_conf_sb[%02x] = %02x\n", addr, val); } - static uint8_t sis_85c50x_sb_read(int func, int addr, void *priv) { - sis_85c50x_t *dev = (sis_85c50x_t *)priv; + sis_85c50x_t *dev = (sis_85c50x_t *) priv; sis_85c50x_log("85C503: dev->pci_conf_sb[%02x] (%02x)\n", addr, dev->pci_conf_sb[addr]); return dev->pci_conf_sb[addr]; } - static void sis_85c50x_isa_write(uint16_t addr, uint8_t val, void *priv) { - sis_85c50x_t *dev = (sis_85c50x_t *)priv; + sis_85c50x_t *dev = (sis_85c50x_t *) priv; switch (addr) { - case 0x22: - dev->index = val; - break; + case 0x22: + dev->index = val; + break; - case 0x23: - switch (dev->index) { - case 0x80: - dev->regs[dev->index] = val & 0xe7; - break; - case 0x81: - dev->regs[dev->index] = val & 0xf4; - break; - case 0x84: case 0x88: case 0x9: case 0x8a: - case 0x8b: - dev->regs[dev->index] = val; - break; - case 0x85: - outb(0x70, val); - break; - } - break; + case 0x23: + switch (dev->index) { + case 0x80: + dev->regs[dev->index] = val & 0xe7; + break; + case 0x81: + dev->regs[dev->index] = val & 0xf4; + break; + case 0x84: + case 0x88: + case 0x9: + case 0x8a: + case 0x8b: + dev->regs[dev->index] = val; + break; + case 0x85: + outb(0x70, val); + break; + } + break; } sis_85c50x_log("85C501-ISA: dev->regs[%02x] = %02x\n", addr, val); } - static uint8_t sis_85c50x_isa_read(uint16_t addr, void *priv) { - sis_85c50x_t *dev = (sis_85c50x_t *)priv; - uint8_t ret = 0xff; + sis_85c50x_t *dev = (sis_85c50x_t *) priv; + uint8_t ret = 0xff; switch (addr) { - case 0x22: - ret = dev->index; - break; + case 0x22: + ret = dev->index; + break; - case 0x23: - if (dev->index == 0x85) - ret = inb(0x70); - else - ret = dev->regs[dev->index]; - break; + case 0x23: + if (dev->index == 0x85) + ret = inb(0x70); + else + ret = dev->regs[dev->index]; + break; } sis_85c50x_log("85C501-ISA: dev->regs[%02x] (%02x)\n", dev->index, ret); @@ -310,11 +317,10 @@ sis_85c50x_isa_read(uint16_t addr, void *priv) return ret; } - static void sis_85c50x_reset(void *priv) { - sis_85c50x_t *dev = (sis_85c50x_t *)priv; + sis_85c50x_t *dev = (sis_85c50x_t *) priv; /* North Bridge (SiS 85C501/502) */ dev->pci_conf[0x00] = 0x39; @@ -358,21 +364,19 @@ sis_85c50x_reset(void *priv) sis_85c50x_write(0, 0x44, 0x80, dev); } - static void sis_85c50x_close(void *priv) { - sis_85c50x_t *dev = (sis_85c50x_t *)priv; + sis_85c50x_t *dev = (sis_85c50x_t *) priv; smram_del(dev->smram); free(dev); } - static void * sis_85c50x_init(const device_t *info) { - sis_85c50x_t *dev = (sis_85c50x_t *)malloc(sizeof(sis_85c50x_t)); + sis_85c50x_t *dev = (sis_85c50x_t *) malloc(sizeof(sis_85c50x_t)); memset(dev, 0x00, sizeof(sis_85c50x_t)); /* 501/502 (Northbridge) */ @@ -382,7 +386,7 @@ sis_85c50x_init(const device_t *info) pci_add_card(PCI_ADD_SOUTHBRIDGE, sis_85c50x_sb_read, sis_85c50x_sb_write, dev); io_sethandler(0x0022, 0x0002, sis_85c50x_isa_read, NULL, NULL, sis_85c50x_isa_write, NULL, NULL, dev); - dev->smram = smram_add(); + dev->smram = smram_add(); dev->port_92 = device_add(&port_92_device); sis_85c50x_reset(dev); @@ -391,15 +395,15 @@ sis_85c50x_init(const device_t *info) } const device_t sis_85c50x_device = { - .name = "SiS 85C50x", + .name = "SiS 85C50x", .internal_name = "sis_85c50x", - .flags = DEVICE_PCI, - .local = 0, - .init = sis_85c50x_init, - .close = sis_85c50x_close, - .reset = sis_85c50x_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = sis_85c50x_init, + .close = sis_85c50x_close, + .reset = sis_85c50x_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/stpc.c b/src/chipset/stpc.c index f9bd8faff..b36010699 100644 --- a/src/chipset/stpc.c +++ b/src/chipset/stpc.c @@ -38,122 +38,113 @@ #include <86box/lpt.h> #include <86box/chipset.h> +#define STPC_CONSUMER2 0x104a020b +#define STPC_ATLAS 0x104a0210 +#define STPC_ELITE 0x104a021a +#define STPC_CLIENT 0x100e55cc -#define STPC_CONSUMER2 0x104a020b -#define STPC_ATLAS 0x104a0210 -#define STPC_ELITE 0x104a021a -#define STPC_CLIENT 0x100e55cc - - -typedef struct stpc_t -{ - uint32_t local; +typedef struct stpc_t { + uint32_t local; /* Main registers (port 22h/23h) */ - uint8_t reg_offset; - uint8_t regs[256]; + uint8_t reg_offset; + uint8_t regs[256]; /* Host bus interface */ - uint16_t host_base; - uint8_t host_offset; - uint8_t host_regs[256]; + uint16_t host_base; + uint8_t host_offset; + uint8_t host_regs[256]; /* Local bus */ - uint16_t localbus_base; - uint8_t localbus_offset; - uint8_t localbus_regs[256]; + uint16_t localbus_base; + uint8_t localbus_offset; + uint8_t localbus_regs[256]; /* PCI devices */ - uint8_t pci_conf[4][256]; - smram_t *smram; - usb_t *usb; - int ide_slot; - sff8038i_t *bm[2]; + uint8_t pci_conf[4][256]; + smram_t *smram; + usb_t *usb; + int ide_slot; + sff8038i_t *bm[2]; } stpc_t; -typedef struct stpc_serial_t -{ - serial_t *uart[2]; +typedef struct stpc_serial_t { + serial_t *uart[2]; } stpc_serial_t; -typedef struct stpc_lpt_t -{ - uint8_t unlocked; - uint8_t offset; - uint8_t reg1; - uint8_t reg4; +typedef struct stpc_lpt_t { + uint8_t unlocked; + uint8_t offset; + uint8_t reg1; + uint8_t reg4; } stpc_lpt_t; - #ifdef ENABLE_STPC_LOG int stpc_do_log = ENABLE_STPC_LOG; - static void stpc_log(const char *fmt, ...) { va_list ap; if (stpc_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define stpc_log(fmt, ...) +# define stpc_log(fmt, ...) #endif - static void stpc_recalcmapping(stpc_t *dev) { - uint8_t reg, bitpair; + uint8_t reg, bitpair; uint32_t base, size; - int state; + int state; - shadowbios = 0; + shadowbios = 0; shadowbios_write = 0; for (reg = 0; reg <= 3; reg++) { - for (bitpair = 0; bitpair <= ((reg == 3) ? 0 : 3); bitpair++) { - if (reg == 3) { - size = 0x10000; - base = 0xf0000; - } else { - size = 0x4000; - base = 0xc0000 + (size * ((reg * 4) + bitpair)); - } - stpc_log("STPC: Shadowing for %05X-%05X (reg %02X bp %d wmask %02X rmask %02X) =", base, base + size - 1, 0x25 + reg, bitpair, 1 << (bitpair * 2), 1 << ((bitpair * 2) + 1)); + for (bitpair = 0; bitpair <= ((reg == 3) ? 0 : 3); bitpair++) { + if (reg == 3) { + size = 0x10000; + base = 0xf0000; + } else { + size = 0x4000; + base = 0xc0000 + (size * ((reg * 4) + bitpair)); + } + stpc_log("STPC: Shadowing for %05X-%05X (reg %02X bp %d wmask %02X rmask %02X) =", base, base + size - 1, 0x25 + reg, bitpair, 1 << (bitpair * 2), 1 << ((bitpair * 2) + 1)); - state = 0; - if (dev->regs[0x25 + reg] & (1 << (bitpair * 2))) { - stpc_log(" w on"); - state |= MEM_WRITE_INTERNAL; - if (base >= 0xe0000) - shadowbios_write |= 1; - } else { - stpc_log(" w off"); - state |= MEM_WRITE_EXTANY; - } - if (dev->regs[0x25 + reg] & (1 << ((bitpair * 2) + 1))) { - stpc_log("; r on\n"); - state |= MEM_READ_INTERNAL; - if (base >= 0xe0000) - shadowbios |= 1; - } else { - stpc_log("; r off\n"); - state |= MEM_READ_EXTANY; - } + state = 0; + if (dev->regs[0x25 + reg] & (1 << (bitpair * 2))) { + stpc_log(" w on"); + state |= MEM_WRITE_INTERNAL; + if (base >= 0xe0000) + shadowbios_write |= 1; + } else { + stpc_log(" w off"); + state |= MEM_WRITE_EXTANY; + } + if (dev->regs[0x25 + reg] & (1 << ((bitpair * 2) + 1))) { + stpc_log("; r on\n"); + state |= MEM_READ_INTERNAL; + if (base >= 0xe0000) + shadowbios |= 1; + } else { + stpc_log("; r off\n"); + state |= MEM_READ_EXTANY; + } - mem_set_mem_state(base, size, state); - } + mem_set_mem_state(base, size, state); + } } flushmmucache_nopc(); } - static void stpc_host_write(uint16_t addr, uint8_t val, void *priv) { @@ -162,12 +153,11 @@ stpc_host_write(uint16_t addr, uint8_t val, void *priv) stpc_log("STPC: host_write(%04X, %02X)\n", addr, val); if (addr == dev->host_base) - dev->host_offset = val; + dev->host_offset = val; else if (addr == (dev->host_base + 4)) - dev->host_regs[dev->host_offset] = val; + dev->host_regs[dev->host_offset] = val; } - static uint8_t stpc_host_read(uint16_t addr, void *priv) { @@ -175,17 +165,16 @@ stpc_host_read(uint16_t addr, void *priv) uint8_t ret; if (addr == dev->host_base) - ret = dev->host_offset; + ret = dev->host_offset; else if (addr == (dev->host_base + 4)) - ret = dev->host_regs[dev->host_offset]; + ret = dev->host_regs[dev->host_offset]; else - ret = 0xff; + ret = 0xff; stpc_log("STPC: host_read(%04X) = %02X\n", addr, ret); return ret; } - static void stpc_localbus_write(uint16_t addr, uint8_t val, void *priv) { @@ -194,12 +183,11 @@ stpc_localbus_write(uint16_t addr, uint8_t val, void *priv) stpc_log("STPC: localbus_write(%04X, %02X)\n", addr, val); if (addr == dev->localbus_base) - dev->localbus_offset = val; + dev->localbus_offset = val; else if (addr == (dev->localbus_base + 4)) - dev->localbus_regs[addr] = val; + dev->localbus_regs[addr] = val; } - static uint8_t stpc_localbus_read(uint16_t addr, void *priv) { @@ -207,17 +195,16 @@ stpc_localbus_read(uint16_t addr, void *priv) uint8_t ret; if (addr == dev->localbus_base) - ret = dev->localbus_offset; + ret = dev->localbus_offset; else if (addr == (dev->localbus_base + 4)) - ret = dev->localbus_regs[dev->localbus_offset]; + ret = dev->localbus_regs[dev->localbus_offset]; else - ret = 0xff; + ret = 0xff; stpc_log("STPC: localbus_read(%04X) = %02X\n", addr, ret); return ret; } - static void stpc_nb_write(int func, int addr, uint8_t val, void *priv) { @@ -226,32 +213,42 @@ stpc_nb_write(int func, int addr, uint8_t val, void *priv) stpc_log("STPC: nb_write(%d, %02X, %02X)\n", func, addr, val); if (func > 0) - return; + return; switch (addr) { - case 0x00: case 0x01: case 0x02: case 0x03: - case 0x04: case 0x06: case 0x07: case 0x08: - case 0x09: case 0x0a: case 0x0b: case 0x0e: - case 0x51: case 0x53: case 0x54: - return; + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x04: + case 0x06: + case 0x07: + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + case 0x0e: + case 0x51: + case 0x53: + case 0x54: + return; - case 0x05: - val &= 0x01; - break; + case 0x05: + val &= 0x01; + break; - case 0x50: - val &= 0x1f; - break; + case 0x50: + val &= 0x1f; + break; - case 0x52: - val &= 0x70; - break; + case 0x52: + val &= 0x70; + break; } dev->pci_conf[0][addr] = val; } - static uint8_t stpc_nb_read(int func, int addr, void *priv) { @@ -259,68 +256,66 @@ stpc_nb_read(int func, int addr, void *priv) uint8_t ret; if (func > 0) - ret = 0xff; + ret = 0xff; else - ret = dev->pci_conf[0][addr]; + ret = dev->pci_conf[0][addr]; stpc_log("STPC: nb_read(%d, %02X) = %02X\n", func, addr, ret); return ret; } - static void stpc_ide_handlers(stpc_t *dev, int bus) { uint16_t main, side; if (bus & 0x01) { - ide_pri_disable(); + ide_pri_disable(); - if (dev->pci_conf[2][0x09] & 0x01) { - main = (dev->pci_conf[2][0x11] << 8) | (dev->pci_conf[2][0x10] & 0xf8); - side = ((dev->pci_conf[2][0x15] << 8) | (dev->pci_conf[2][0x14] & 0xfc)) + 2; - } else { - main = 0x1f0; - side = 0x3f6; - } + if (dev->pci_conf[2][0x09] & 0x01) { + main = (dev->pci_conf[2][0x11] << 8) | (dev->pci_conf[2][0x10] & 0xf8); + side = ((dev->pci_conf[2][0x15] << 8) | (dev->pci_conf[2][0x14] & 0xfc)) + 2; + } else { + main = 0x1f0; + side = 0x3f6; + } - ide_set_base(0, main); - ide_set_side(0, side); + ide_set_base(0, main); + ide_set_side(0, side); - stpc_log("STPC: IDE primary main %04X side %04X enable ", main, side); - if ((dev->pci_conf[2][0x04] & 0x01) && !(dev->pci_conf[2][0x48] & 0x04)) { - stpc_log("1\n"); - ide_pri_enable(); - } else { - stpc_log("0\n"); - } + stpc_log("STPC: IDE primary main %04X side %04X enable ", main, side); + if ((dev->pci_conf[2][0x04] & 0x01) && !(dev->pci_conf[2][0x48] & 0x04)) { + stpc_log("1\n"); + ide_pri_enable(); + } else { + stpc_log("0\n"); + } } if (bus & 0x02) { - ide_sec_disable(); + ide_sec_disable(); - if (dev->pci_conf[2][0x09] & 0x04) { - main = (dev->pci_conf[2][0x19] << 8) | (dev->pci_conf[2][0x18] & 0xf8); - side = ((dev->pci_conf[2][0x1d] << 8) | (dev->pci_conf[2][0x1c] & 0xfc)) + 2; - } else { - main = 0x170; - side = 0x376; - } + if (dev->pci_conf[2][0x09] & 0x04) { + main = (dev->pci_conf[2][0x19] << 8) | (dev->pci_conf[2][0x18] & 0xf8); + side = ((dev->pci_conf[2][0x1d] << 8) | (dev->pci_conf[2][0x1c] & 0xfc)) + 2; + } else { + main = 0x170; + side = 0x376; + } - ide_set_base(1, main); - ide_set_side(1, side); + ide_set_base(1, main); + ide_set_side(1, side); - stpc_log("STPC: IDE secondary main %04X side %04X enable ", main, side); - if ((dev->pci_conf[2][0x04] & 0x01) && !(dev->pci_conf[2][0x48] & 0x08)) { - stpc_log("1\n"); - ide_sec_enable(); - } else { - stpc_log("0\n"); - } + stpc_log("STPC: IDE secondary main %04X side %04X enable ", main, side); + if ((dev->pci_conf[2][0x04] & 0x01) && !(dev->pci_conf[2][0x48] & 0x08)) { + stpc_log("1\n"); + ide_sec_enable(); + } else { + stpc_log("0\n"); + } } } - static void stpc_ide_bm_handlers(stpc_t *dev) { @@ -330,7 +325,6 @@ stpc_ide_bm_handlers(stpc_t *dev) sff_bus_master_handler(dev->bm[1], dev->pci_conf[2][0x04] & 1, base + 8); } - static void stpc_ide_write(int func, int addr, uint8_t val, void *priv) { @@ -339,98 +333,103 @@ stpc_ide_write(int func, int addr, uint8_t val, void *priv) stpc_log("STPC: ide_write(%d, %02X, %02X)\n", func, addr, val); if (func > 0) - return; + return; switch (addr) { - case 0x04: - dev->pci_conf[2][addr] = (dev->pci_conf[2][addr] & 0xbe) | (val & 0x41); - stpc_ide_handlers(dev, 0x03); - stpc_ide_bm_handlers(dev); - break; + case 0x04: + dev->pci_conf[2][addr] = (dev->pci_conf[2][addr] & 0xbe) | (val & 0x41); + stpc_ide_handlers(dev, 0x03); + stpc_ide_bm_handlers(dev); + break; - case 0x05: - dev->pci_conf[2][addr] = val & 0x01; - break; + case 0x05: + dev->pci_conf[2][addr] = val & 0x01; + break; - case 0x07: - dev->pci_conf[2][addr] &= ~(val & 0x70); - break; + case 0x07: + dev->pci_conf[2][addr] &= ~(val & 0x70); + break; - case 0x09: - dev->pci_conf[2][addr] = (dev->pci_conf[2][addr] & 0x8a) | (val & 0x05); - stpc_ide_handlers(dev, 0x03); - break; + case 0x09: + dev->pci_conf[2][addr] = (dev->pci_conf[2][addr] & 0x8a) | (val & 0x05); + stpc_ide_handlers(dev, 0x03); + break; - case 0x10: - dev->pci_conf[2][addr] = (val & 0xf8) | 1; - stpc_ide_handlers(dev, 0x01); - break; - case 0x11: - dev->pci_conf[2][addr] = val; - stpc_ide_handlers(dev, 0x01); - break; + case 0x10: + dev->pci_conf[2][addr] = (val & 0xf8) | 1; + stpc_ide_handlers(dev, 0x01); + break; + case 0x11: + dev->pci_conf[2][addr] = val; + stpc_ide_handlers(dev, 0x01); + break; - case 0x14: - dev->pci_conf[2][addr] = (val & 0xfc) | 1; - stpc_ide_handlers(dev, 0x01); - break; - case 0x15: - dev->pci_conf[2][addr] = val; - stpc_ide_handlers(dev, 0x01); - break; + case 0x14: + dev->pci_conf[2][addr] = (val & 0xfc) | 1; + stpc_ide_handlers(dev, 0x01); + break; + case 0x15: + dev->pci_conf[2][addr] = val; + stpc_ide_handlers(dev, 0x01); + break; - case 0x18: - dev->pci_conf[2][addr] = (val & 0xf8) | 1; - stpc_ide_handlers(dev, 0x02); - break; - case 0x19: - dev->pci_conf[2][addr] = val; - stpc_ide_handlers(dev, 0x02); - break; + case 0x18: + dev->pci_conf[2][addr] = (val & 0xf8) | 1; + stpc_ide_handlers(dev, 0x02); + break; + case 0x19: + dev->pci_conf[2][addr] = val; + stpc_ide_handlers(dev, 0x02); + break; - case 0x1c: - dev->pci_conf[2][addr] = (val & 0xfc) | 1; - stpc_ide_handlers(dev, 0x02); - break; - case 0x1d: - dev->pci_conf[2][addr] = val; - stpc_ide_handlers(dev, 0x02); - break; + case 0x1c: + dev->pci_conf[2][addr] = (val & 0xfc) | 1; + stpc_ide_handlers(dev, 0x02); + break; + case 0x1d: + dev->pci_conf[2][addr] = val; + stpc_ide_handlers(dev, 0x02); + break; - case 0x20: - dev->pci_conf[2][0x20] = (val & 0xf0) | 1; - stpc_ide_bm_handlers(dev); - break; - case 0x21: - dev->pci_conf[2][0x21] = val; - stpc_ide_bm_handlers(dev); - break; + case 0x20: + dev->pci_conf[2][0x20] = (val & 0xf0) | 1; + stpc_ide_bm_handlers(dev); + break; + case 0x21: + dev->pci_conf[2][0x21] = val; + stpc_ide_bm_handlers(dev); + break; - case 0x3c: - dev->pci_conf[2][addr] = val; - break; + case 0x3c: + dev->pci_conf[2][addr] = val; + break; - case 0x40: case 0x41: case 0x42: case 0x43: - case 0x44: case 0x45: case 0x46: case 0x47: - dev->pci_conf[2][addr] = val; - break; + case 0x40: + case 0x41: + case 0x42: + case 0x43: + case 0x44: + case 0x45: + case 0x46: + case 0x47: + dev->pci_conf[2][addr] = val; + break; - case 0x48: - dev->pci_conf[2][addr] = (val & 0x8c) & ~(val & 0x03); - stpc_ide_handlers(dev, 0x03); - if (val & 0x02) { - sff_bus_master_set_irq(0x01, dev->bm[0]); - sff_bus_master_set_irq(0x01, dev->bm[1]); - } - if (val & 0x01) { - sff_bus_master_set_irq(0x00, dev->bm[0]); - sff_bus_master_set_irq(0x00, dev->bm[1]); - } - break; + case 0x48: + dev->pci_conf[2][addr] = (val & 0x8c) & ~(val & 0x03); + stpc_ide_handlers(dev, 0x03); + if (val & 0x02) { + sff_bus_master_set_irq(0x01, dev->bm[0]); + sff_bus_master_set_irq(0x01, dev->bm[1]); + } + if (val & 0x01) { + sff_bus_master_set_irq(0x00, dev->bm[0]); + sff_bus_master_set_irq(0x00, dev->bm[1]); + } + break; } } - static uint8_t stpc_ide_read(int func, int addr, void *priv) { @@ -438,51 +437,58 @@ stpc_ide_read(int func, int addr, void *priv) uint8_t ret; if (func > 0) - ret = 0xff; + ret = 0xff; else { - ret = dev->pci_conf[2][addr]; - if (addr == 0x48) { - ret &= 0xfc; - ret |= !!(dev->bm[0]->status & 0x04); - ret |= (!!(dev->bm[1]->status & 0x04)) << 1; - } + ret = dev->pci_conf[2][addr]; + if (addr == 0x48) { + ret &= 0xfc; + ret |= !!(dev->bm[0]->status & 0x04); + ret |= (!!(dev->bm[1]->status & 0x04)) << 1; + } } stpc_log("STPC: ide_read(%d, %02X) = %02X\n", func, addr, ret); return ret; } - static void stpc_isab_write(int func, int addr, uint8_t val, void *priv) { stpc_t *dev = (stpc_t *) priv; if ((func == 1) && (dev->local != STPC_ATLAS)) { - stpc_ide_write(0, addr, val, priv); - return; + stpc_ide_write(0, addr, val, priv); + return; } stpc_log("STPC: isab_write(%d, %02X, %02X)\n", func, addr, val); if (func > 0) - return; + return; switch (addr) { - case 0x00: case 0x01: case 0x02: case 0x03: - case 0x04: case 0x06: case 0x07: case 0x08: - case 0x09: case 0x0a: case 0x0b: case 0x0e: - return; + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x04: + case 0x06: + case 0x07: + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + case 0x0e: + return; - case 0x05: - val &= 0x01; - break; + case 0x05: + val &= 0x01; + break; } dev->pci_conf[1][addr] = val; } - static uint8_t stpc_isab_read(int func, int addr, void *priv) { @@ -490,17 +496,16 @@ stpc_isab_read(int func, int addr, void *priv) uint8_t ret; if ((func == 1) && (dev->local != STPC_ATLAS)) - ret = stpc_ide_read(0, addr, priv); + ret = stpc_ide_read(0, addr, priv); else if (func > 0) - ret = 0xff; + ret = 0xff; else - ret = dev->pci_conf[1][addr]; + ret = dev->pci_conf[1][addr]; stpc_log("STPC: isab_read(%d, %02X) = %02X\n", func, addr, ret); return ret; } - static void stpc_usb_write(int func, int addr, uint8_t val, void *priv) { @@ -509,34 +514,43 @@ stpc_usb_write(int func, int addr, uint8_t val, void *priv) stpc_log("STPC: usb_write(%d, %02X, %02X)\n", func, addr, val); if (func > 0) - return; + return; switch (addr) { - case 0x00: case 0x01: case 0x02: case 0x03: - case 0x04: case 0x06: case 0x07: case 0x08: - case 0x09: case 0x0a: case 0x0b: case 0x0e: - case 0x10: - return; + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x04: + case 0x06: + case 0x07: + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + case 0x0e: + case 0x10: + return; - case 0x05: - val &= 0x01; - break; + case 0x05: + val &= 0x01; + break; - case 0x11: - dev->pci_conf[3][addr] = val & 0xf0; - ohci_update_mem_mapping(dev->usb, dev->pci_conf[3][0x11], dev->pci_conf[3][0x12], dev->pci_conf[3][0x13], 1); - break; + case 0x11: + dev->pci_conf[3][addr] = val & 0xf0; + ohci_update_mem_mapping(dev->usb, dev->pci_conf[3][0x11], dev->pci_conf[3][0x12], dev->pci_conf[3][0x13], 1); + break; - case 0x12: case 0x13: - dev->pci_conf[3][addr] = val; - ohci_update_mem_mapping(dev->usb, dev->pci_conf[3][0x11], dev->pci_conf[3][0x12], dev->pci_conf[3][0x13], 1); - break; + case 0x12: + case 0x13: + dev->pci_conf[3][addr] = val; + ohci_update_mem_mapping(dev->usb, dev->pci_conf[3][0x11], dev->pci_conf[3][0x12], dev->pci_conf[3][0x13], 1); + break; } dev->pci_conf[3][addr] = val; } - static uint8_t stpc_usb_read(int func, int addr, void *priv) { @@ -544,77 +558,74 @@ stpc_usb_read(int func, int addr, void *priv) uint8_t ret; if (func > 0) - ret = 0xff; + ret = 0xff; else - ret = dev->pci_conf[3][addr]; + ret = dev->pci_conf[3][addr]; stpc_log("STPC: usb_read(%d, %02X) = %02X\n", func, addr, ret); return ret; } - static void stpc_remap_host(stpc_t *dev, uint16_t host_base) { stpc_log("STPC: Remapping host bus from %04X to %04X\n", dev->host_base, host_base); io_removehandler(dev->host_base, 5, - stpc_host_read, NULL, NULL, stpc_host_write, NULL, NULL, dev); + stpc_host_read, NULL, NULL, stpc_host_write, NULL, NULL, dev); if (host_base) { - io_sethandler(host_base, 5, - stpc_host_read, NULL, NULL, stpc_host_write, NULL, NULL, dev); + io_sethandler(host_base, 5, + stpc_host_read, NULL, NULL, stpc_host_write, NULL, NULL, dev); } dev->host_base = host_base; } - static void stpc_remap_localbus(stpc_t *dev, uint16_t localbus_base) { stpc_log("STPC: Remapping local bus from %04X to %04X\n", dev->localbus_base, localbus_base); io_removehandler(dev->localbus_base, 5, - stpc_localbus_read, NULL, NULL, stpc_localbus_write, NULL, NULL, dev); + stpc_localbus_read, NULL, NULL, stpc_localbus_write, NULL, NULL, dev); if (localbus_base) { - io_sethandler(localbus_base, 5, - stpc_localbus_read, NULL, NULL, stpc_localbus_write, NULL, NULL, dev); + io_sethandler(localbus_base, 5, + stpc_localbus_read, NULL, NULL, stpc_localbus_write, NULL, NULL, dev); } dev->localbus_base = localbus_base; } - static uint8_t stpc_serial_handlers(uint8_t val) { stpc_serial_t *dev = device_get_priv(&stpc_serial_device); if (!dev) { - stpc_log("STPC: Not remapping UARTs, disabled by strap (raw %02X)\n", val); - return 0; + stpc_log("STPC: Not remapping UARTs, disabled by strap (raw %02X)\n", val); + return 0; } uint16_t uart0_io = 0x3f8, uart1_io = 0x3f8; - uint8_t uart0_irq = 4, uart1_irq = 3; + uint8_t uart0_irq = 4, uart1_irq = 3; if (val & 0x10) - uart1_io &= 0xfeff; + uart1_io &= 0xfeff; if (val & 0x20) - uart1_io &= 0xffef; + uart1_io &= 0xffef; if (val & 0x40) - uart0_io &= 0xfeff; + uart0_io &= 0xfeff; if (val & 0x80) - uart0_io &= 0xffef; + uart0_io &= 0xffef; if (uart0_io == uart1_io) { - /* Apply defaults if both UARTs are set to the same address. */ - stpc_log("STPC: Both UARTs set to %02X, resetting to defaults\n", uart0_io); - uart0_io = 0x3f8; - uart1_io = 0x2f8; + /* Apply defaults if both UARTs are set to the same address. */ + stpc_log("STPC: Both UARTs set to %02X, resetting to defaults\n", uart0_io); + uart0_io = 0x3f8; + uart1_io = 0x2f8; } if (!(uart0_io & 0x100)) { - /* The address for UART0 establishes the IRQs for both ports. */ - uart0_irq = 3; - uart1_irq = 4; + /* The address for UART0 establishes the IRQs for both ports. */ + uart0_irq = 3; + uart1_irq = 4; } stpc_log("STPC: Remapping UART0 to %04X %d and UART1 to %04X %d (raw %02X)\n", uart0_io, uart0_irq, uart1_io, uart1_irq, val); @@ -627,7 +638,6 @@ stpc_serial_handlers(uint8_t val) return 1; } - static void stpc_reg_write(uint16_t addr, uint8_t val, void *priv) { @@ -636,73 +646,79 @@ stpc_reg_write(uint16_t addr, uint8_t val, void *priv) stpc_log("STPC: reg_write(%04X, %02X)\n", addr, val); if (addr == 0x22) { - dev->reg_offset = val; + dev->reg_offset = val; } else { - stpc_log("STPC: regs[%02X] = %02X\n", dev->reg_offset, val); + stpc_log("STPC: regs[%02X] = %02X\n", dev->reg_offset, val); - switch (dev->reg_offset) { - case 0x12: - if (dev->regs[0x10] == 0x07) - stpc_remap_host(dev, (dev->host_base & 0xff00) | val); - else if (dev->regs[0x10] == 0x06) - stpc_remap_localbus(dev, (dev->localbus_base & 0xff00) | val); - break; + switch (dev->reg_offset) { + case 0x12: + if (dev->regs[0x10] == 0x07) + stpc_remap_host(dev, (dev->host_base & 0xff00) | val); + else if (dev->regs[0x10] == 0x06) + stpc_remap_localbus(dev, (dev->localbus_base & 0xff00) | val); + break; - case 0x13: - if (dev->regs[0x10] == 0x07) - stpc_remap_host(dev, (dev->host_base & 0x00ff) | (val << 8)); - else if (dev->regs[0x10] == 0x06) - stpc_remap_localbus(dev, (dev->localbus_base & 0x00ff) | (val << 8)); - break; + case 0x13: + if (dev->regs[0x10] == 0x07) + stpc_remap_host(dev, (dev->host_base & 0x00ff) | (val << 8)); + else if (dev->regs[0x10] == 0x06) + stpc_remap_localbus(dev, (dev->localbus_base & 0x00ff) | (val << 8)); + break; - case 0x21: - val &= 0xfe; - break; + case 0x21: + val &= 0xfe; + break; - case 0x22: - val &= 0x7f; - break; + case 0x22: + val &= 0x7f; + break; - case 0x25: case 0x26: case 0x27: case 0x28: - if (dev->reg_offset == 0x28) { - val &= 0xe3; - smram_state_change(dev->smram, 0, !!(val & 0x80)); - } - dev->regs[dev->reg_offset] = val; - stpc_recalcmapping(dev); - break; + case 0x25: + case 0x26: + case 0x27: + case 0x28: + if (dev->reg_offset == 0x28) { + val &= 0xe3; + smram_state_change(dev->smram, 0, !!(val & 0x80)); + } + dev->regs[dev->reg_offset] = val; + stpc_recalcmapping(dev); + break; - case 0x29: - val &= 0x0f; - break; + case 0x29: + val &= 0x0f; + break; - case 0x36: - val &= 0x3f; - break; + case 0x36: + val &= 0x3f; + break; - case 0x52: case 0x53: case 0x54: case 0x55: - stpc_log("STPC: Set IRQ routing: INT %c -> %d\n", 0x41 + ((dev->reg_offset - 2) & 0x03), (val & 0x80) ? (val & 0xf) : -1); - val &= 0x8f; - pci_set_irq_routing(PCI_INTA + ((dev->reg_offset - 2) & 0x03), (val & 0x80) ? (val & 0xf) : PCI_IRQ_DISABLED); - break; + case 0x52: + case 0x53: + case 0x54: + case 0x55: + stpc_log("STPC: Set IRQ routing: INT %c -> %d\n", 0x41 + ((dev->reg_offset - 2) & 0x03), (val & 0x80) ? (val & 0xf) : -1); + val &= 0x8f; + pci_set_irq_routing(PCI_INTA + ((dev->reg_offset - 2) & 0x03), (val & 0x80) ? (val & 0xf) : PCI_IRQ_DISABLED); + break; - case 0x56: case 0x57: - pic_elcr_write(dev->reg_offset, val, (dev->reg_offset & 1) ? &pic2 : &pic); - if (dev->reg_offset == 0x57) - refresh_at_enable = (val & 0x01); - break; + case 0x56: + case 0x57: + pic_elcr_write(dev->reg_offset, val, (dev->reg_offset & 1) ? &pic2 : &pic); + if (dev->reg_offset == 0x57) + refresh_at_enable = (val & 0x01); + break; - case 0x59: - val &= 0xf1; - stpc_serial_handlers(val); - break; - } + case 0x59: + val &= 0xf1; + stpc_serial_handlers(val); + break; + } - dev->regs[dev->reg_offset] = val; + dev->regs[dev->reg_offset] = val; } } - static uint8_t stpc_reg_read(uint16_t addr, void *priv) { @@ -710,22 +726,21 @@ stpc_reg_read(uint16_t addr, void *priv) uint8_t ret; if (addr == 0x22) - ret = dev->reg_offset; + ret = dev->reg_offset; else if (dev->reg_offset >= 0xc0) - return 0xff; /* let the CPU code handle Cyrix CPU registers */ + return 0xff; /* let the CPU code handle Cyrix CPU registers */ else if ((dev->reg_offset == 0x56) || (dev->reg_offset == 0x57)) { - /* ELCR registers. */ - ret = pic_elcr_read(dev->reg_offset, (dev->reg_offset & 1) ? &pic2 : &pic); - if (dev->reg_offset == 0x57) - ret |= (dev->regs[dev->reg_offset] & 0x01); + /* ELCR registers. */ + ret = pic_elcr_read(dev->reg_offset, (dev->reg_offset & 1) ? &pic2 : &pic); + if (dev->reg_offset == 0x57) + ret |= (dev->regs[dev->reg_offset] & 0x01); } else - ret = dev->regs[dev->reg_offset]; + ret = dev->regs[dev->reg_offset]; stpc_log("STPC: reg_read(%04X) = %02X\n", dev->reg_offset, ret); return ret; } - static void stpc_reset(void *priv) { @@ -736,12 +751,11 @@ stpc_reset(void *priv) memset(dev->regs, 0, sizeof(dev->regs)); dev->regs[0x7b] = 0xff; if (device_get_priv(&stpc_lpt_device)) - dev->regs[0x4c] |= 0x80; /* LPT strap */ + dev->regs[0x4c] |= 0x80; /* LPT strap */ if (stpc_serial_handlers(0x00)) - dev->regs[0x4c] |= 0x03; /* UART straps */ + dev->regs[0x4c] |= 0x03; /* UART straps */ } - static void stpc_setup(stpc_t *dev) { @@ -749,19 +763,19 @@ stpc_setup(stpc_t *dev) /* Main register interface */ io_sethandler(0x22, 2, - stpc_reg_read, NULL, NULL, stpc_reg_write, NULL, NULL, dev); + stpc_reg_read, NULL, NULL, stpc_reg_write, NULL, NULL, dev); /* Northbridge */ if (dev->local & STPC_CLIENT) { - dev->pci_conf[0][0x00] = 0x0e; - dev->pci_conf[0][0x01] = 0x10; - dev->pci_conf[0][0x02] = 0x64; - dev->pci_conf[0][0x03] = 0x05; + dev->pci_conf[0][0x00] = 0x0e; + dev->pci_conf[0][0x01] = 0x10; + dev->pci_conf[0][0x02] = 0x64; + dev->pci_conf[0][0x03] = 0x05; } else { - dev->pci_conf[0][0x00] = 0x4a; - dev->pci_conf[0][0x01] = 0x10; - dev->pci_conf[0][0x02] = 0x0a; - dev->pci_conf[0][0x03] = 0x02; + dev->pci_conf[0][0x00] = 0x4a; + dev->pci_conf[0][0x01] = 0x10; + dev->pci_conf[0][0x02] = 0x0a; + dev->pci_conf[0][0x03] = 0x02; } dev->pci_conf[0][0x04] = 0x07; @@ -786,8 +800,8 @@ stpc_setup(stpc_t *dev) dev->pci_conf[1][0x0b] = 0x06; /* NOTE: This is an erratum in the STPC Atlas programming manual, the programming manuals for the other - STPC chipsets say 0x80, which is indeed multi-function (as the STPC Atlas programming manual - indicates as well), and Windows 2000 also issues a 0x7B STOP error if it is 0x40. */ + STPC chipsets say 0x80, which is indeed multi-function (as the STPC Atlas programming manual + indicates as well), and Windows 2000 also issues a 0x7B STOP error if it is 0x40. */ dev->pci_conf[1][0x0e] = /*0x40*/ 0x80; /* IDE */ @@ -795,11 +809,11 @@ stpc_setup(stpc_t *dev) dev->pci_conf[2][0x01] = dev->local >> 24; if (dev->local == STPC_ATLAS) { - dev->pci_conf[2][0x02] = 0x28; - dev->pci_conf[2][0x03] = 0x02; + dev->pci_conf[2][0x02] = 0x28; + dev->pci_conf[2][0x03] = 0x02; } else { - dev->pci_conf[2][0x02] = dev->pci_conf[1][0x02]; - dev->pci_conf[2][0x03] = dev->pci_conf[1][0x03]; + dev->pci_conf[2][0x02] = dev->pci_conf[1][0x02]; + dev->pci_conf[2][0x03] = dev->pci_conf[1][0x03]; } dev->pci_conf[2][0x06] = 0x80; @@ -810,8 +824,8 @@ stpc_setup(stpc_t *dev) dev->pci_conf[2][0x0b] = 0x01; /* NOTE: This is an erratum in the STPC Atlas programming manual, the programming manuals for the other - STPC chipsets say 0x80, which is indeed multi-function (as the STPC Atlas programming manual - indicates as well), and Windows 2000 also issues a 0x7B STOP error if it is 0x40. */ + STPC chipsets say 0x80, which is indeed multi-function (as the STPC Atlas programming manual + indicates as well), and Windows 2000 also issues a 0x7B STOP error if it is 0x40. */ dev->pci_conf[2][0x0e] = /*0x40*/ 0x80; dev->pci_conf[2][0x10] = 0x01; @@ -831,22 +845,22 @@ stpc_setup(stpc_t *dev) /* USB */ if (dev->usb) { - dev->pci_conf[3][0x00] = dev->local >> 16; - dev->pci_conf[3][0x01] = dev->local >> 24; - dev->pci_conf[3][0x02] = 0x30; - dev->pci_conf[3][0x03] = 0x02; + dev->pci_conf[3][0x00] = dev->local >> 16; + dev->pci_conf[3][0x01] = dev->local >> 24; + dev->pci_conf[3][0x02] = 0x30; + dev->pci_conf[3][0x03] = 0x02; - dev->pci_conf[3][0x06] = 0x80; - dev->pci_conf[3][0x07] = 0x02; + dev->pci_conf[3][0x06] = 0x80; + dev->pci_conf[3][0x07] = 0x02; - dev->pci_conf[3][0x09] = 0x10; - dev->pci_conf[3][0x0a] = 0x03; - dev->pci_conf[3][0x0b] = 0x0c; + dev->pci_conf[3][0x09] = 0x10; + dev->pci_conf[3][0x0a] = 0x03; + dev->pci_conf[3][0x0b] = 0x0c; - /* NOTE: This is an erratum in the STPC Atlas programming manual, the programming manuals for the other - STPC chipsets say 0x80, which is indeed multi-function (as the STPC Atlas programming manual - indicates as well), and Windows 2000 also issues a 0x7B STOP error if it is 0x40. */ - dev->pci_conf[3][0x0e] = /*0x40*/ 0x80; + /* NOTE: This is an erratum in the STPC Atlas programming manual, the programming manuals for the other + STPC chipsets say 0x80, which is indeed multi-function (as the STPC Atlas programming manual + indicates as well), and Windows 2000 also issues a 0x7B STOP error if it is 0x40. */ + dev->pci_conf[3][0x0e] = /*0x40*/ 0x80; } /* PCI setup */ @@ -856,7 +870,6 @@ stpc_setup(stpc_t *dev) pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED); } - static void stpc_close(void *priv) { @@ -869,7 +882,6 @@ stpc_close(void *priv) free(dev); } - static void * stpc_init(const device_t *info) { @@ -883,9 +895,9 @@ stpc_init(const device_t *info) pci_add_card(PCI_ADD_NORTHBRIDGE, stpc_nb_read, stpc_nb_write, dev); dev->ide_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, stpc_isab_read, stpc_isab_write, dev); if (dev->local == STPC_ATLAS) { - dev->ide_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, stpc_ide_read, stpc_ide_write, dev); - dev->usb = device_add(&usb_device); - pci_add_card(PCI_ADD_SOUTHBRIDGE, stpc_usb_read, stpc_usb_write, dev); + dev->ide_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, stpc_ide_read, stpc_ide_write, dev); + dev->usb = device_add(&usb_device); + pci_add_card(PCI_ADD_SOUTHBRIDGE, stpc_usb_read, stpc_usb_write, dev); } dev->bm[0] = device_add_inst(&sff8038i_device, 1); @@ -912,7 +924,6 @@ stpc_init(const device_t *info) return dev; } - static void stpc_serial_close(void *priv) { @@ -923,7 +934,6 @@ stpc_serial_close(void *priv) free(dev); } - static void * stpc_serial_init(const device_t *info) { @@ -940,45 +950,44 @@ stpc_serial_init(const device_t *info) return dev; } - static void stpc_lpt_handlers(stpc_lpt_t *dev, uint8_t val) { uint8_t old_addr = (dev->reg1 & 0x03), new_addr = (val & 0x03); switch (old_addr) { - case 0x1: - lpt3_remove(); - break; + case 0x1: + lpt3_remove(); + break; - case 0x2: - lpt1_remove(); - break; + case 0x2: + lpt1_remove(); + break; - case 0x3: - lpt2_remove(); - break; + case 0x3: + lpt2_remove(); + break; } switch (new_addr) { - case 0x1: - stpc_log("STPC: Remapping parallel port to LPT3\n"); - lpt3_init(0x3bc); - break; + case 0x1: + stpc_log("STPC: Remapping parallel port to LPT3\n"); + lpt3_init(0x3bc); + break; - case 0x2: - stpc_log("STPC: Remapping parallel port to LPT1\n"); - lpt1_init(0x378); - break; + case 0x2: + stpc_log("STPC: Remapping parallel port to LPT1\n"); + lpt1_init(0x378); + break; - case 0x3: - stpc_log("STPC: Remapping parallel port to LPT2\n"); - lpt2_init(0x278); - break; + case 0x3: + stpc_log("STPC: Remapping parallel port to LPT2\n"); + lpt2_init(0x278); + break; - default: - stpc_log("STPC: Disabling parallel port\n"); - break; + default: + stpc_log("STPC: Disabling parallel port\n"); + break; } dev->reg1 = (val & 0x08); @@ -986,33 +995,31 @@ stpc_lpt_handlers(stpc_lpt_t *dev, uint8_t val) dev->reg1 |= 0x84; /* reserved bits that default to 1; hardwired? */ } - static void stpc_lpt_write(uint16_t addr, uint8_t val, void *priv) { stpc_lpt_t *dev = (stpc_lpt_t *) priv; if (dev->unlocked < 2) { - /* Cheat a little bit: in reality, any write to any - I/O port is supposed to reset the unlock counter. */ - if ((addr == 0x3f0) && (val == 0x55)) - dev->unlocked++; - else - dev->unlocked = 0; + /* Cheat a little bit: in reality, any write to any + I/O port is supposed to reset the unlock counter. */ + if ((addr == 0x3f0) && (val == 0x55)) + dev->unlocked++; + else + dev->unlocked = 0; } else if (addr == 0x3f0) { - if (val == 0xaa) - dev->unlocked = 0; - else - dev->offset = val; + if (val == 0xaa) + dev->unlocked = 0; + else + dev->offset = val; } else if (dev->offset == 1) { - /* dev->reg1 is set by stpc_lpt_handlers */ - stpc_lpt_handlers(dev, val); + /* dev->reg1 is set by stpc_lpt_handlers */ + stpc_lpt_handlers(dev, val); } else if (dev->offset == 4) { - dev->reg4 = (val & 0x03); + dev->reg4 = (val & 0x03); } } - static void stpc_lpt_reset(void *priv) { @@ -1021,13 +1028,12 @@ stpc_lpt_reset(void *priv) stpc_log("STPC: lpt_reset()\n"); dev->unlocked = 0; - dev->offset = 0x00; - dev->reg1 = 0x9f; - dev->reg4 = 0x00; + dev->offset = 0x00; + dev->reg1 = 0x9f; + dev->reg4 = 0x00; stpc_lpt_handlers(dev, dev->reg1); } - static void stpc_lpt_close(void *priv) { @@ -1038,7 +1044,6 @@ stpc_lpt_close(void *priv) free(dev); } - static void * stpc_lpt_init(const device_t *info) { @@ -1050,93 +1055,93 @@ stpc_lpt_init(const device_t *info) stpc_lpt_reset(dev); io_sethandler(0x3f0, 2, - NULL, NULL, NULL, stpc_lpt_write, NULL, NULL, dev); + NULL, NULL, NULL, stpc_lpt_write, NULL, NULL, dev); return dev; } /* STPC SoCs */ const device_t stpc_client_device = { - .name = "STPC Client", + .name = "STPC Client", .internal_name = "stpc_client", - .flags = DEVICE_PCI, - .local = STPC_CLIENT, - .init = stpc_init, - .close = stpc_close, - .reset = stpc_reset, + .flags = DEVICE_PCI, + .local = STPC_CLIENT, + .init = stpc_init, + .close = stpc_close, + .reset = stpc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t stpc_consumer2_device = { - .name = "STPC Consumer-II", + .name = "STPC Consumer-II", .internal_name = "stpc_consumer2", - .flags = DEVICE_PCI, - .local = STPC_CONSUMER2, - .init = stpc_init, - .close = stpc_close, - .reset = stpc_reset, + .flags = DEVICE_PCI, + .local = STPC_CONSUMER2, + .init = stpc_init, + .close = stpc_close, + .reset = stpc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t stpc_elite_device = { - .name = "STPC Elite", + .name = "STPC Elite", .internal_name = "stpc_elite", - .flags = DEVICE_PCI, - .local = STPC_ELITE, - .init = stpc_init, - .close = stpc_close, - .reset = stpc_reset, + .flags = DEVICE_PCI, + .local = STPC_ELITE, + .init = stpc_init, + .close = stpc_close, + .reset = stpc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t stpc_atlas_device = { - .name = "STPC Atlas", + .name = "STPC Atlas", .internal_name = "stpc_atlas", - .flags = DEVICE_PCI, - .local = STPC_ATLAS, - .init = stpc_init, - .close = stpc_close, - .reset = stpc_reset, + .flags = DEVICE_PCI, + .local = STPC_ATLAS, + .init = stpc_init, + .close = stpc_close, + .reset = stpc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; /* Auxiliary devices */ const device_t stpc_serial_device = { - .name = "STPC Serial UARTs", + .name = "STPC Serial UARTs", .internal_name = "stpc_serial", - .flags = 0, - .local = 0, - .init = stpc_serial_init, - .close = stpc_serial_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = stpc_serial_init, + .close = stpc_serial_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t stpc_lpt_device = { - .name = "STPC Parallel Port", + .name = "STPC Parallel Port", .internal_name = "stpc_lpt", - .flags = 0, - .local = 0, - .init = stpc_lpt_init, - .close = stpc_lpt_close, - .reset = stpc_lpt_reset, + .flags = 0, + .local = 0, + .init = stpc_lpt_init, + .close = stpc_lpt_close, + .reset = stpc_lpt_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/umc_8886.c b/src/chipset/umc_8886.c index ba11ba829..47501dfb4 100644 --- a/src/chipset/umc_8886.c +++ b/src/chipset/umc_8886.c @@ -48,16 +48,16 @@ 1 0 PCICLK/2 Function 0 Register A2 - non-software SMI# status register - (documented by Miran Grca): + (documented by Miran Grca): Bit 4: I set, graphics card goes into sleep mode This register is most likely R/WC Function 0 Register A3 (added more details by Miran Grca): Bit 7: Unlock SMM Bit 6: Software SMI trigger (also doubles as software SMI# status register, - cleared by writing a 0 to it - see the handler used by Phoenix BIOS'es): - If Function 0 Register 46 Bit 6 is set, it raises the specified IRQ (15 - or 10) instead. + cleared by writing a 0 to it - see the handler used by Phoenix BIOS'es): + If Function 0 Register 46 Bit 6 is set, it raises the specified IRQ (15 + or 10) instead. Function 0 Register A4: Bit 0: Host to PCI Clock (1: 1 by 1/0: 1 by half) @@ -87,52 +87,45 @@ #include <86box/chipset.h> - -#define IDE_BIT 0x01 - +#define IDE_BIT 0x01 #ifdef ENABLE_UMC_8886_LOG int umc_8886_do_log = ENABLE_UMC_8886_LOG; - static void umc_8886_log(const char *fmt, ...) { va_list ap; if (umc_8886_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define umc_8886_log(fmt, ...) +# define umc_8886_log(fmt, ...) #endif - /* PCI IRQ Flags */ -#define INTA (PCI_INTA + (2 * !(addr & 1))) -#define INTB (PCI_INTB + (2 * !(addr & 1))) -#define IRQRECALCA (((val & 0xf0) != 0) ? ((val & 0xf0) >> 4) : PCI_IRQ_DISABLED) -#define IRQRECALCB (((val & 0x0f) != 0) ? (val & 0x0f) : PCI_IRQ_DISABLED) +#define INTA (PCI_INTA + (2 * !(addr & 1))) +#define INTB (PCI_INTB + (2 * !(addr & 1))) +#define IRQRECALCA (((val & 0xf0) != 0) ? ((val & 0xf0) >> 4) : PCI_IRQ_DISABLED) +#define IRQRECALCB (((val & 0x0f) != 0) ? (val & 0x0f) : PCI_IRQ_DISABLED) /* Disable Internal IDE Flag needed for the AF or BF Southbridge variant */ -#define HAS_IDE dev->has_ide +#define HAS_IDE dev->has_ide /* Southbridge Revision */ -#define SB_ID dev->sb_id +#define SB_ID dev->sb_id - -typedef struct umc_8886_t -{ - uint8_t max_func, /* Last function number */ - pci_conf_sb[2][256]; /* PCI Registers */ - uint16_t sb_id; /* Southbridge Revision */ - int has_ide; /* Check if Southbridge Revision is AF or F */ +typedef struct umc_8886_t { + uint8_t max_func, /* Last function number */ + pci_conf_sb[2][256]; /* PCI Registers */ + uint16_t sb_id; /* Southbridge Revision */ + int has_ide; /* Check if Southbridge Revision is AF or F */ } umc_8886_t; - static void umc_8886_ide_handler(int status) { @@ -140,164 +133,172 @@ umc_8886_ide_handler(int status) ide_sec_disable(); if (status) { - ide_pri_enable(); - ide_sec_enable(); + ide_pri_enable(); + ide_sec_enable(); } } - static void umc_8886_write(int func, int addr, uint8_t val, void *priv) { - umc_8886_t *dev = (umc_8886_t *)priv; + umc_8886_t *dev = (umc_8886_t *) priv; - if (func <= dev->max_func) switch (func) { - case 0: /* PCI to ISA Bridge */ - umc_8886_log("UM8886: dev->regs[%02x] = %02x POST %02x\n", addr, val, inb(0x80)); + if (func <= dev->max_func) + switch (func) { + case 0: /* PCI to ISA Bridge */ + umc_8886_log("UM8886: dev->regs[%02x] = %02x POST %02x\n", addr, val, inb(0x80)); - switch (addr) { - case 0x04: case 0x05: - dev->pci_conf_sb[func][addr] = val; - break; + switch (addr) { + case 0x04: + case 0x05: + dev->pci_conf_sb[func][addr] = val; + break; - case 0x07: - dev->pci_conf_sb[func][addr] &= ~(val & 0xf9); - break; + case 0x07: + dev->pci_conf_sb[func][addr] &= ~(val & 0xf9); + break; - case 0x0c: case 0x0d: - dev->pci_conf_sb[func][addr] = val; - break; + case 0x0c: + case 0x0d: + dev->pci_conf_sb[func][addr] = val; + break; - case 0x40: case 0x41: - case 0x42: - dev->pci_conf_sb[func][addr] = val; - break; + case 0x40: + case 0x41: + case 0x42: + dev->pci_conf_sb[func][addr] = val; + break; - case 0x43: case 0x44: - dev->pci_conf_sb[func][addr] = val; - pci_set_irq_routing(INTA, IRQRECALCA); - pci_set_irq_routing(INTB, IRQRECALCB); - break; + case 0x43: + case 0x44: + dev->pci_conf_sb[func][addr] = val; + pci_set_irq_routing(INTA, IRQRECALCA); + pci_set_irq_routing(INTB, IRQRECALCB); + break; - case 0x45: - dev->pci_conf_sb[func][addr] = val; - break; + case 0x45: + dev->pci_conf_sb[func][addr] = val; + break; - case 0x46: - /* Bit 6 seems to be the IRQ/SMI# toggle, 1 = IRQ, 0 = SMI#. */ - dev->pci_conf_sb[func][addr] = val; - break; + case 0x46: + /* Bit 6 seems to be the IRQ/SMI# toggle, 1 = IRQ, 0 = SMI#. */ + dev->pci_conf_sb[func][addr] = val; + break; - case 0x47: - dev->pci_conf_sb[func][addr] = val; - break; + case 0x47: + dev->pci_conf_sb[func][addr] = val; + break; - case 0x50: case 0x51: case 0x52: case 0x53: - case 0x54: case 0x55: - dev->pci_conf_sb[func][addr] = val; - break; + case 0x50: + case 0x51: + case 0x52: + case 0x53: + case 0x54: + case 0x55: + dev->pci_conf_sb[func][addr] = val; + break; - case 0x56: - dev->pci_conf_sb[func][addr] = val; + case 0x56: + dev->pci_conf_sb[func][addr] = val; - switch (val & 2) { - case 0: - cpu_set_isa_pci_div(3); - break; - case 1: - cpu_set_isa_pci_div(4); - break; - case 2: - cpu_set_isa_pci_div(2); - break; - } + switch (val & 2) { + case 0: + cpu_set_isa_pci_div(3); + break; + case 1: + cpu_set_isa_pci_div(4); + break; + case 2: + cpu_set_isa_pci_div(2); + break; + } - break; + break; - case 0x57: - case 0x70 ... 0x76: - case 0x80: case 0x81: - case 0x90 ... 0x92: - case 0xa0 ... 0xa1: - dev->pci_conf_sb[func][addr] = val; - break; + case 0x57: + case 0x70 ... 0x76: + case 0x80: + case 0x81: + case 0x90 ... 0x92: + case 0xa0 ... 0xa1: + dev->pci_conf_sb[func][addr] = val; + break; - case 0xa2: - dev->pci_conf_sb[func][addr] &= ~val; - break; + case 0xa2: + dev->pci_conf_sb[func][addr] &= ~val; + break; - case 0xa3: - /* SMI Provocation (Bit 7 Enable SMM + Bit 6 Software SMI) */ - if (((val & 0xc0) == 0xc0) && !(dev->pci_conf_sb[0][0xa3] & 0x40)) { - if (dev->pci_conf_sb[0][0x46] & 0x40) - picint(1 << ((dev->pci_conf_sb[0][0x46] & 0x80) ? 15 : 10)); - else - smi_raise(); - dev->pci_conf_sb[0][0xa3] |= 0x04; - } + case 0xa3: + /* SMI Provocation (Bit 7 Enable SMM + Bit 6 Software SMI) */ + if (((val & 0xc0) == 0xc0) && !(dev->pci_conf_sb[0][0xa3] & 0x40)) { + if (dev->pci_conf_sb[0][0x46] & 0x40) + picint(1 << ((dev->pci_conf_sb[0][0x46] & 0x80) ? 15 : 10)); + else + smi_raise(); + dev->pci_conf_sb[0][0xa3] |= 0x04; + } - dev->pci_conf_sb[func][addr] = val; - break; + dev->pci_conf_sb[func][addr] = val; + break; - case 0xa4: - dev->pci_conf_sb[func][addr] = val; - cpu_set_pci_speed(cpu_busspeed / ((val & 1) ? 1 : 2)); - break; + case 0xa4: + dev->pci_conf_sb[func][addr] = val; + cpu_set_pci_speed(cpu_busspeed / ((val & 1) ? 1 : 2)); + break; - case 0xa5 ... 0xa8: - dev->pci_conf_sb[func][addr] = val; - break; - } - break; + case 0xa5 ... 0xa8: + dev->pci_conf_sb[func][addr] = val; + break; + } + break; - case 1: /* IDE Controller */ - umc_8886_log("UM8886-IDE: dev->regs[%02x] = %02x POST: %02x\n", addr, val, inb(0x80)); + case 1: /* IDE Controller */ + umc_8886_log("UM8886-IDE: dev->regs[%02x] = %02x POST: %02x\n", addr, val, inb(0x80)); - switch (addr) { - case 0x04: - dev->pci_conf_sb[func][addr] = val; - umc_8886_ide_handler(val & 1); - break; + switch (addr) { + case 0x04: + dev->pci_conf_sb[func][addr] = val; + umc_8886_ide_handler(val & 1); + break; - case 0x07: - dev->pci_conf_sb[func][addr] &= ~(val & 0xf9); - break; + case 0x07: + dev->pci_conf_sb[func][addr] &= ~(val & 0xf9); + break; - case 0x3c: - case 0x40: case 0x41: - dev->pci_conf_sb[func][addr] = val; - break; - } - break; - } + case 0x3c: + case 0x40: + case 0x41: + dev->pci_conf_sb[func][addr] = val; + break; + } + break; + } } - static uint8_t umc_8886_read(int func, int addr, void *priv) { - umc_8886_t *dev = (umc_8886_t *)priv; - uint8_t ret = 0xff; + umc_8886_t *dev = (umc_8886_t *) priv; + uint8_t ret = 0xff; if (func <= dev->max_func) - ret = dev->pci_conf_sb[func][addr]; + ret = dev->pci_conf_sb[func][addr]; return ret; } - static void umc_8886_reset(void *priv) { - umc_8886_t *dev = (umc_8886_t *)priv; + umc_8886_t *dev = (umc_8886_t *) priv; memset(dev->pci_conf_sb[0], 0x00, sizeof(dev->pci_conf_sb[0])); memset(dev->pci_conf_sb[1], 0x00, sizeof(dev->pci_conf_sb[1])); - dev->pci_conf_sb[0][0] = 0x60; /* UMC */ + dev->pci_conf_sb[0][0] = 0x60; /* UMC */ dev->pci_conf_sb[0][1] = 0x10; - dev->pci_conf_sb[0][2] = (SB_ID & 0xff); /* 8886xx */ + dev->pci_conf_sb[0][2] = (SB_ID & 0xff); /* 8886xx */ dev->pci_conf_sb[0][3] = ((SB_ID >> 8) & 0xff); dev->pci_conf_sb[0][4] = 0x0f; @@ -321,43 +322,41 @@ umc_8886_reset(void *priv) dev->pci_conf_sb[0][0xa8] = 0x20; if (HAS_IDE) { - dev->pci_conf_sb[1][0] = 0x60; /* UMC */ - dev->pci_conf_sb[1][1] = 0x10; + dev->pci_conf_sb[1][0] = 0x60; /* UMC */ + dev->pci_conf_sb[1][1] = 0x10; - dev->pci_conf_sb[1][2] = 0x3a; /* 8886BF IDE */ - dev->pci_conf_sb[1][3] = 0x67; + dev->pci_conf_sb[1][2] = 0x3a; /* 8886BF IDE */ + dev->pci_conf_sb[1][3] = 0x67; - dev->pci_conf_sb[1][4] = 1; /* Start with Internal IDE Enabled */ + dev->pci_conf_sb[1][4] = 1; /* Start with Internal IDE Enabled */ - dev->pci_conf_sb[1][8] = 0x10; + dev->pci_conf_sb[1][8] = 0x10; - dev->pci_conf_sb[1][0x09] = 0x0f; - dev->pci_conf_sb[1][0x0a] = dev->pci_conf_sb[1][0x0b] = 1; + dev->pci_conf_sb[1][0x09] = 0x0f; + dev->pci_conf_sb[1][0x0a] = dev->pci_conf_sb[1][0x0b] = 1; - umc_8886_ide_handler(1); + umc_8886_ide_handler(1); } - for (int i = 1; i < 5; i++) /* Disable all IRQ interrupts */ - pci_set_irq_routing(i, PCI_IRQ_DISABLED); + for (int i = 1; i < 5; i++) /* Disable all IRQ interrupts */ + pci_set_irq_routing(i, PCI_IRQ_DISABLED); cpu_set_isa_pci_div(3); cpu_set_pci_speed(cpu_busspeed / 2); } - static void umc_8886_close(void *priv) { - umc_8886_t *dev = (umc_8886_t *)priv; + umc_8886_t *dev = (umc_8886_t *) priv; free(dev); } - static void * umc_8886_init(const device_t *info) { - umc_8886_t *dev = (umc_8886_t *)malloc(sizeof(umc_8886_t)); + umc_8886_t *dev = (umc_8886_t *) malloc(sizeof(umc_8886_t)); memset(dev, 0, sizeof(umc_8886_t)); dev->has_ide = !!(info->local == 0x886a); @@ -365,7 +364,7 @@ umc_8886_init(const device_t *info) /* Add IDE if UM8886AF variant */ if (HAS_IDE) - device_add(&ide_pci_2ch_device); + device_add(&ide_pci_2ch_device); dev->max_func = (HAS_IDE) ? 1 : 0; @@ -378,29 +377,29 @@ umc_8886_init(const device_t *info) } const device_t umc_8886f_device = { - .name = "UMC 8886F", + .name = "UMC 8886F", .internal_name = "umc_8886f", - .flags = DEVICE_PCI, - .local = 0x8886, - .init = umc_8886_init, - .close = umc_8886_close, - .reset = umc_8886_reset, + .flags = DEVICE_PCI, + .local = 0x8886, + .init = umc_8886_init, + .close = umc_8886_close, + .reset = umc_8886_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t umc_8886af_device = { - .name = "UMC 8886AF/8886BF", + .name = "UMC 8886AF/8886BF", .internal_name = "umc_8886af", - .flags = DEVICE_PCI, - .local = 0x886a, - .init = umc_8886_init, - .close = umc_8886_close, - .reset = umc_8886_reset, + .flags = DEVICE_PCI, + .local = 0x886a, + .init = umc_8886_init, + .close = umc_8886_close, + .reset = umc_8886_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/umc_hb4.c b/src/chipset/umc_hb4.c index 4440b7eef..0179bdc72 100644 --- a/src/chipset/umc_hb4.c +++ b/src/chipset/umc_hb4.c @@ -85,7 +85,7 @@ Register 60: Bit 5: If set and SMRAM is enabled, data cycles go to PCI and code cycles go to DRAM Bit 0: SMRAM Local Access Enable - if set, SMRAM is also enabled outside SMM - SMRAM appears to always be enabled in SMM, and always set to A0000-BFFFF. + SMRAM appears to always be enabled in SMM, and always set to A0000-BFFFF. */ #include @@ -108,56 +108,50 @@ #include <86box/smram.h> #ifdef USE_DYNAREC -# include "codegen_public.h" +# include "codegen_public.h" #else -#ifdef USE_NEW_DYNAREC -# define PAGE_MASK_SHIFT 6 -#else -# define PAGE_MASK_INDEX_MASK 3 -# define PAGE_MASK_INDEX_SHIFT 10 -# define PAGE_MASK_SHIFT 4 -#endif -# define PAGE_MASK_MASK 63 +# ifdef USE_NEW_DYNAREC +# define PAGE_MASK_SHIFT 6 +# else +# define PAGE_MASK_INDEX_MASK 3 +# define PAGE_MASK_INDEX_SHIFT 10 +# define PAGE_MASK_SHIFT 4 +# endif +# define PAGE_MASK_MASK 63 #endif #include <86box/chipset.h> - #ifdef ENABLE_HB4_LOG int hb4_do_log = ENABLE_HB4_LOG; - static void hb4_log(const char *fmt, ...) { va_list ap; if (hb4_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define hb4_log(fmt, ...) +# define hb4_log(fmt, ...) #endif - -typedef struct hb4_t -{ - uint8_t shadow, - shadow_read, shadow_write, - pci_conf[256]; /* PCI Registers */ - int mem_state[9]; - smram_t *smram[3]; /* SMRAM Handlers */ +typedef struct hb4_t { + uint8_t shadow, + shadow_read, shadow_write, + pci_conf[256]; /* PCI Registers */ + int mem_state[9]; + smram_t *smram[3]; /* SMRAM Handlers */ } hb4_t; - -static int shadow_bios[4] = { (MEM_READ_EXTANY | MEM_WRITE_INTERNAL), (MEM_READ_EXTANY | MEM_WRITE_EXTANY), - (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL), (MEM_READ_INTERNAL | MEM_WRITE_EXTANY) }; -static int shadow_read[2] = { MEM_READ_EXTANY, MEM_READ_INTERNAL }; +static int shadow_bios[4] = { (MEM_READ_EXTANY | MEM_WRITE_INTERNAL), (MEM_READ_EXTANY | MEM_WRITE_EXTANY), + (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL), (MEM_READ_INTERNAL | MEM_WRITE_EXTANY) }; +static int shadow_read[2] = { MEM_READ_EXTANY, MEM_READ_INTERNAL }; static int shadow_write[2] = { MEM_WRITE_INTERNAL, MEM_WRITE_EXTANY }; - int hb4_shadow_bios_high(hb4_t *dev) { @@ -166,17 +160,16 @@ hb4_shadow_bios_high(hb4_t *dev) state = shadow_bios[dev->pci_conf[0x55] >> 6]; if (state != dev->mem_state[8]) { - mem_set_mem_state_both(0xf0000, 0x10000, state); - if ((dev->mem_state[8] & MEM_READ_INTERNAL) && !(state & MEM_READ_INTERNAL)) - mem_invalidate_range(0xf0000, 0xfffff); - dev->mem_state[8] = state; - return 1; + mem_set_mem_state_both(0xf0000, 0x10000, state); + if ((dev->mem_state[8] & MEM_READ_INTERNAL) && !(state & MEM_READ_INTERNAL)) + mem_invalidate_range(0xf0000, 0xfffff); + dev->mem_state[8] = state; + return 1; } return 0; } - int hb4_shadow_bios_low(hb4_t *dev) { @@ -185,15 +178,14 @@ hb4_shadow_bios_low(hb4_t *dev) state = shadow_bios[(dev->pci_conf[0x55] >> 6) & (dev->shadow | 0x01)]; if (state != dev->mem_state[7]) { - mem_set_mem_state_both(0xe0000, 0x10000, state); - dev->mem_state[7] = state; - return 1; + mem_set_mem_state_both(0xe0000, 0x10000, state); + dev->mem_state[7] = state; + return 1; } return 0; } - int hb4_shadow_main(hb4_t *dev) { @@ -201,38 +193,34 @@ hb4_shadow_main(hb4_t *dev) int n = 0; for (i = 0; i < 6; i++) { - state = shadow_read[dev->shadow && ((dev->pci_conf[0x54] >> (i + 2)) & 0x01)] | - shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01]; + state = shadow_read[dev->shadow && ((dev->pci_conf[0x54] >> (i + 2)) & 0x01)] | shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01]; - if (state != dev->mem_state[i + 1]) { - n++; - mem_set_mem_state_both(0xc8000 + (i << 14), 0x4000, state); - dev->mem_state[i + 1] = state; - } + if (state != dev->mem_state[i + 1]) { + n++; + mem_set_mem_state_both(0xc8000 + (i << 14), 0x4000, state); + dev->mem_state[i + 1] = state; + } } return n; } - int hb4_shadow_video(hb4_t *dev) { int state; - state = shadow_read[dev->shadow && ((dev->pci_conf[0x54] >> 1) & 0x01)] | - shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01]; + state = shadow_read[dev->shadow && ((dev->pci_conf[0x54] >> 1) & 0x01)] | shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01]; if (state != dev->mem_state[0]) { - mem_set_mem_state_both(0xc0000, 0x8000, state); - dev->mem_state[0] = state; - return 1; + mem_set_mem_state_both(0xc0000, 0x8000, state); + dev->mem_state[0] = state; + return 1; } return 0; } - void hb4_shadow(hb4_t *dev) { @@ -245,10 +233,9 @@ hb4_shadow(hb4_t *dev) n += hb4_shadow_video(dev); if (n > 0) - flushmmucache_nopc(); + flushmmucache_nopc(); } - static void hb4_smram(hb4_t *dev) { @@ -265,93 +252,93 @@ hb4_smram(hb4_t *dev) /* Bit 5 seems to set data to go to PCI and code to DRAM. The Samsung SPC7700P-LW uses this. */ if (dev->pci_conf[0x60] & 0x20) { - if (dev->pci_conf[0x60] & 0x01) - mem_set_mem_state_smram_ex(0, 0x000a0000, 0x20000, 0x02); - mem_set_mem_state_smram_ex(1, 0x000a0000, 0x20000, 0x02); + if (dev->pci_conf[0x60] & 0x01) + mem_set_mem_state_smram_ex(0, 0x000a0000, 0x20000, 0x02); + mem_set_mem_state_smram_ex(1, 0x000a0000, 0x20000, 0x02); } } - static void hb4_write(int func, int addr, uint8_t val, void *priv) { - hb4_t *dev = (hb4_t *)priv; + hb4_t *dev = (hb4_t *) priv; hb4_log("UM8881: dev->regs[%02x] = %02x POST: %02x \n", addr, val, inb(0x80)); switch (addr) { - case 0x04: case 0x05: - dev->pci_conf[addr] = val; - break; + case 0x04: + case 0x05: + dev->pci_conf[addr] = val; + break; - case 0x07: - dev->pci_conf[addr] &= ~(val & 0xf9); - break; + case 0x07: + dev->pci_conf[addr] &= ~(val & 0xf9); + break; - case 0x0c: case 0x0d: - dev->pci_conf[addr] = val; - break; + case 0x0c: + case 0x0d: + dev->pci_conf[addr] = val; + break; - case 0x50: - dev->pci_conf[addr] = ((val & 0xf8) | 4); /* Hardcode Cache Size to 512KB */ - cpu_cache_ext_enabled = !!(val & 0x80); /* Fixes freezing issues on the HOT-433A*/ - cpu_update_waitstates(); - break; + case 0x50: + dev->pci_conf[addr] = ((val & 0xf8) | 4); /* Hardcode Cache Size to 512KB */ + cpu_cache_ext_enabled = !!(val & 0x80); /* Fixes freezing issues on the HOT-433A*/ + cpu_update_waitstates(); + break; - case 0x51: case 0x52: - dev->pci_conf[addr] = val; - break; + case 0x51: + case 0x52: + dev->pci_conf[addr] = val; + break; - case 0x53: - dev->pci_conf[addr] = val; - hb4_log("HB53: %02X\n", val); - break; + case 0x53: + dev->pci_conf[addr] = val; + hb4_log("HB53: %02X\n", val); + break; - case 0x55: - dev->shadow_read = (val & 0x80); - dev->shadow_write = (val & 0x40); - dev->pci_conf[addr] = val; - hb4_shadow(dev); - break; - case 0x54: - dev->shadow = (val & 0x01) << 1; - dev->pci_conf[addr] = val; - hb4_shadow(dev); - break; + case 0x55: + dev->shadow_read = (val & 0x80); + dev->shadow_write = (val & 0x40); + dev->pci_conf[addr] = val; + hb4_shadow(dev); + break; + case 0x54: + dev->shadow = (val & 0x01) << 1; + dev->pci_conf[addr] = val; + hb4_shadow(dev); + break; - case 0x56 ... 0x5f: - dev->pci_conf[addr] = val; - break; + case 0x56 ... 0x5f: + dev->pci_conf[addr] = val; + break; - case 0x60: - dev->pci_conf[addr] = val; - hb4_smram(dev); - break; + case 0x60: + dev->pci_conf[addr] = val; + hb4_smram(dev); + break; - case 0x61: - dev->pci_conf[addr] = val; - break; + case 0x61: + dev->pci_conf[addr] = val; + break; } } - static uint8_t hb4_read(int func, int addr, void *priv) { - hb4_t *dev = (hb4_t *)priv; + hb4_t *dev = (hb4_t *) priv; uint8_t ret = 0xff; if (func == 0) - ret = dev->pci_conf[addr]; + ret = dev->pci_conf[addr]; return ret; } - static void hb4_reset(void *priv) { - hb4_t *dev = (hb4_t *)priv; + hb4_t *dev = (hb4_t *) priv; memset(dev->pci_conf, 0x00, sizeof(dev->pci_conf)); dev->pci_conf[0] = 0x60; /* UMC */ @@ -385,23 +372,21 @@ hb4_reset(void *priv) memset(dev->mem_state, 0x00, sizeof(dev->mem_state)); } - static void hb4_close(void *priv) { - hb4_t *dev = (hb4_t *)priv; + hb4_t *dev = (hb4_t *) priv; free(dev); } - static void * hb4_init(const device_t *info) { - hb4_t *dev = (hb4_t *)malloc(sizeof(hb4_t)); + hb4_t *dev = (hb4_t *) malloc(sizeof(hb4_t)); memset(dev, 0, sizeof(hb4_t)); - pci_add_card(PCI_ADD_NORTHBRIDGE, hb4_read, hb4_write, dev); /* Device 10: UMC 8881x */ + pci_add_card(PCI_ADD_NORTHBRIDGE, hb4_read, hb4_write, dev); /* Device 10: UMC 8881x */ /* Port 92 */ device_add(&port_92_pci_device); @@ -417,15 +402,15 @@ hb4_init(const device_t *info) } const device_t umc_hb4_device = { - .name = "UMC HB4(8881F)", + .name = "UMC HB4(8881F)", .internal_name = "umc_hb4", - .flags = DEVICE_PCI, - .local = 0x886a, - .init = hb4_init, - .close = hb4_close, - .reset = hb4_reset, + .flags = DEVICE_PCI, + .local = 0x886a, + .init = hb4_init, + .close = hb4_close, + .reset = hb4_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/via_apollo.c b/src/chipset/via_apollo.c index bb30a0264..db137bc63 100644 --- a/src/chipset/via_apollo.c +++ b/src/chipset/via_apollo.c @@ -44,50 +44,46 @@ #define VIA_694 0x0691c200 #define VIA_8601 0x86010500 -typedef struct via_apollo_t -{ - uint32_t id; - uint8_t drb_unit; - uint8_t pci_conf[256]; +typedef struct via_apollo_t { + uint32_t id; + uint8_t drb_unit; + uint8_t pci_conf[256]; smram_t *smram; agpgart_t *agpgart; } via_apollo_t; - static void apollo_map(uint32_t addr, uint32_t size, int state) { switch (state & 3) { - case 0: - mem_set_mem_state_both(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - break; - case 1: - mem_set_mem_state_both(addr, size, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); - break; - case 2: - mem_set_mem_state_both(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTANY); - break; - case 3: - mem_set_mem_state_both(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - break; + case 0: + mem_set_mem_state_both(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + break; + case 1: + mem_set_mem_state_both(addr, size, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + break; + case 2: + mem_set_mem_state_both(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTANY); + break; + case 3: + mem_set_mem_state_both(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + break; } flushmmucache_nopc(); } - static void apollo_smram_map(via_apollo_t *dev, int smm, uint32_t host_base, uint32_t size, int is_smram) { if (((is_smram & 0x03) == 0x01) || ((is_smram & 0x03) == 0x02)) - smram_enable(dev->smram, host_base, 0x000a0000, size, 0, 1); + smram_enable(dev->smram, host_base, 0x000a0000, size, 0, 1); mem_set_mem_state_smram_ex(smm, host_base, size, is_smram & 0x03); flushmmucache(); } - static void apollo_agp_map(via_apollo_t *dev) { @@ -96,17 +92,16 @@ apollo_agp_map(via_apollo_t *dev) dev->pci_conf[0x13] &= 0xf0 | (dev->pci_conf[0x84] >> 4); if (!dev->agpgart) - return; + return; /* Map aperture and GART. */ agpgart_set_aperture(dev->agpgart, - (dev->pci_conf[0x12] << 16) | (dev->pci_conf[0x13] << 24), - ((uint32_t) (uint8_t) ~dev->pci_conf[0x84] + 1) << 20, - !!(dev->pci_conf[0x88] & 0x02)); + (dev->pci_conf[0x12] << 16) | (dev->pci_conf[0x13] << 24), + ((uint32_t) (uint8_t) ~dev->pci_conf[0x84] + 1) << 20, + !!(dev->pci_conf[0x88] & 0x02)); agpgart_set_gart(dev->agpgart, (dev->pci_conf[0x89] << 8) | (dev->pci_conf[0x8a] << 16) | (dev->pci_conf[0x8b] << 24)); } - static void via_apollo_setup(via_apollo_t *dev) { @@ -120,9 +115,9 @@ via_apollo_setup(via_apollo_t *dev) dev->pci_conf[0x05] = 0; if ((dev->id >= VIA_585) || (dev->id < VIA_597)) - dev->pci_conf[0x06] = 0xa0; + dev->pci_conf[0x06] = 0xa0; else - dev->pci_conf[0x06] = 0x90; + dev->pci_conf[0x06] = 0x90; dev->pci_conf[0x07] = 0x02; @@ -136,30 +131,30 @@ via_apollo_setup(via_apollo_t *dev) dev->pci_conf[0x0f] = 0; if (dev->id >= VIA_597) { - dev->pci_conf[0x10] = 0x08; - dev->pci_conf[0x34] = 0xa0; + dev->pci_conf[0x10] = 0x08; + dev->pci_conf[0x34] = 0xa0; } if ((dev->id >= VIA_585) || (dev->id < VIA_597)) - dev->pci_conf[0x52] = 0x02; + dev->pci_conf[0x52] = 0x02; else if (dev->id >= VIA_694) - dev->pci_conf[0x52] = (dev->id == VIA_694) ? 0x90 : 0x10; + dev->pci_conf[0x52] = (dev->id == VIA_694) ? 0x90 : 0x10; if (dev->id >= VIA_693A) - dev->pci_conf[0x53] = 0x10; + dev->pci_conf[0x53] = 0x10; if (dev->id == VIA_691) { - dev->pci_conf[0x56] = 0x01; - dev->pci_conf[0x57] = 0x01; + dev->pci_conf[0x56] = 0x01; + dev->pci_conf[0x57] = 0x01; } if (dev->id >= VIA_694) - dev->pci_conf[0x58] = 0x40; + dev->pci_conf[0x58] = 0x40; else if (dev->id >= VIA_585) - dev->pci_conf[0x58] = 0x05; + dev->pci_conf[0x58] = 0x05; if ((dev->id >= VIA_585) || (dev->id < VIA_597)) - dev->pci_conf[0x59] = 0x02; + dev->pci_conf[0x59] = 0x02; dev->pci_conf[0x5a] = 0x01; dev->pci_conf[0x5b] = 0x01; @@ -170,526 +165,529 @@ via_apollo_setup(via_apollo_t *dev) dev->pci_conf[0x64] = ((dev->id >= VIA_585) || (dev->id < VIA_597)) ? 0xab : 0xec; if (dev->id >= VIA_597) { - dev->pci_conf[0x65] = 0xec; - dev->pci_conf[0x66] = 0xec; + dev->pci_conf[0x65] = 0xec; + dev->pci_conf[0x66] = 0xec; } if (dev->id >= VIA_691) - dev->pci_conf[0x67] = 0xec; /* DRAM Timing for Banks 6, 7 */ + dev->pci_conf[0x67] = 0xec; /* DRAM Timing for Banks 6, 7 */ if (dev->id >= VIA_693A) { - if (cpu_busspeed < 95000000) { /* 66 MHz */ - cpu_set_pci_speed(cpu_busspeed / 2); - cpu_set_agp_speed(cpu_busspeed); - dev->pci_conf[0x68] |= 0x00; - } else if (cpu_busspeed < 124000000) { /* 100 MHz */ - cpu_set_pci_speed(cpu_busspeed / 3); - cpu_set_agp_speed(cpu_busspeed / 1.5); - dev->pci_conf[0x68] |= 0x01; - } else { /* 133 MHz */ - cpu_set_pci_speed(cpu_busspeed / 4); - cpu_set_agp_speed(cpu_busspeed / 2); - dev->pci_conf[0x68] |= (dev->id == VIA_8601) ? 0x03 : 0x02; - } + if (cpu_busspeed < 95000000) { /* 66 MHz */ + cpu_set_pci_speed(cpu_busspeed / 2); + cpu_set_agp_speed(cpu_busspeed); + dev->pci_conf[0x68] |= 0x00; + } else if (cpu_busspeed < 124000000) { /* 100 MHz */ + cpu_set_pci_speed(cpu_busspeed / 3); + cpu_set_agp_speed(cpu_busspeed / 1.5); + dev->pci_conf[0x68] |= 0x01; + } else { /* 133 MHz */ + cpu_set_pci_speed(cpu_busspeed / 4); + cpu_set_agp_speed(cpu_busspeed / 2); + dev->pci_conf[0x68] |= (dev->id == VIA_8601) ? 0x03 : 0x02; + } } else if (dev->id >= VIA_598) { - if (cpu_busspeed < ((dev->id >= VIA_691) ? 100000000 : 75000000)) { /* 66 MHz */ - cpu_set_pci_speed(cpu_busspeed / 2); - cpu_set_agp_speed(cpu_busspeed); - dev->pci_conf[0x68] |= 0x00; - } else if (cpu_busspeed < 100000000) { /* 75/83 MHz (not available on 691) */ - cpu_set_pci_speed(cpu_busspeed / 2.5); - cpu_set_agp_speed(cpu_busspeed / 1.25); - dev->pci_conf[0x68] |= 0x03; - } else { /* 100 MHz */ - cpu_set_pci_speed(cpu_busspeed / 3); - cpu_set_agp_speed(cpu_busspeed / 1.5); - dev->pci_conf[0x68] |= 0x01; - } + if (cpu_busspeed < ((dev->id >= VIA_691) ? 100000000 : 75000000)) { /* 66 MHz */ + cpu_set_pci_speed(cpu_busspeed / 2); + cpu_set_agp_speed(cpu_busspeed); + dev->pci_conf[0x68] |= 0x00; + } else if (cpu_busspeed < 100000000) { /* 75/83 MHz (not available on 691) */ + cpu_set_pci_speed(cpu_busspeed / 2.5); + cpu_set_agp_speed(cpu_busspeed / 1.25); + dev->pci_conf[0x68] |= 0x03; + } else { /* 100 MHz */ + cpu_set_pci_speed(cpu_busspeed / 3); + cpu_set_agp_speed(cpu_busspeed / 1.5); + dev->pci_conf[0x68] |= 0x01; + } } dev->pci_conf[0x6b] = 0x01; if (dev->id >= VIA_597) { - dev->pci_conf[0xa0] = 0x02; - dev->pci_conf[0xa2] = 0x10; - dev->pci_conf[0xa4] = 0x03; - dev->pci_conf[0xa5] = 0x02; - dev->pci_conf[0xa7] = 0x07; + dev->pci_conf[0xa0] = 0x02; + dev->pci_conf[0xa2] = 0x10; + dev->pci_conf[0xa4] = 0x03; + dev->pci_conf[0xa5] = 0x02; + dev->pci_conf[0xa7] = 0x07; - if (dev->id == VIA_693A) { - dev->pci_conf[0xac] = 0x08; - dev->pci_conf[0xad] = 0x02; - } + if (dev->id == VIA_693A) { + dev->pci_conf[0xac] = 0x08; + dev->pci_conf[0xad] = 0x02; + } - if (dev->id == VIA_694) { - dev->pci_conf[0xb0] = 0x80; /* The datasheet refers it as 8xh */ - dev->pci_conf[0xb1] = 0x63; - } + if (dev->id == VIA_694) { + dev->pci_conf[0xb0] = 0x80; /* The datasheet refers it as 8xh */ + dev->pci_conf[0xb1] = 0x63; + } } } - static void via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv) { via_apollo_t *dev = (via_apollo_t *) priv; if (func) - return; + return; /*Read-only addresses*/ - if ((addr < 4) || ((addr > 5) && (addr < 7)) || ((addr >= 8) && (addr < 0xd)) || - ((addr >= 0xe) && (addr != 0x0f) && (addr < 0x12)) || ((addr >= 0x14) && (addr < 0x50)) || - ((addr > 0x7a) && (addr < 0x7e)) || ((addr >= 0x81) && (addr < 0x84)) || - ((addr >= 0x85) && (addr < 0x88)) || ((addr >= 0x8c) && (addr < 0xa8)) || - ((addr >= 0xaa) && (addr < 0xac)) || ((addr > 0xad) && (addr < 0xf0)) || - ((addr >= 0xf8) && (addr < 0xfc))) - return; + if ((addr < 4) || ((addr > 5) && (addr < 7)) || ((addr >= 8) && (addr < 0xd)) || ((addr >= 0xe) && (addr != 0x0f) && (addr < 0x12)) || ((addr >= 0x14) && (addr < 0x50)) || ((addr > 0x7a) && (addr < 0x7e)) || ((addr >= 0x81) && (addr < 0x84)) || ((addr >= 0x85) && (addr < 0x88)) || ((addr >= 0x8c) && (addr < 0xa8)) || ((addr >= 0xaa) && (addr < 0xac)) || ((addr > 0xad) && (addr < 0xf0)) || ((addr >= 0xf8) && (addr < 0xfc))) + return; if (((addr == 0x12) || (addr == 0x13)) && (dev->id < VIA_597)) - return; + return; if (((addr == 0x78) || (addr >= 0xad)) && (dev->id == VIA_597)) - return; + return; if (((addr == 0x67) || ((addr >= 0xf0) && (addr < 0xfc))) && (dev->id < VIA_691)) - return; + return; - switch(addr) { - case 0x04: - dev->pci_conf[0x04] = (dev->pci_conf[0x04] & ~0x40) | (val & 0x40); - break; + switch (addr) { + case 0x04: + dev->pci_conf[0x04] = (dev->pci_conf[0x04] & ~0x40) | (val & 0x40); + break; - case 0x05: - if((dev->id >= VIA_585) || (dev->id < VIA_597)) - dev->pci_conf[0x05] = (dev->pci_conf[0x05] & ~0x03) | (val & 0x03); - else - dev->pci_conf[0x05] = val; - break; + case 0x05: + if ((dev->id >= VIA_585) || (dev->id < VIA_597)) + dev->pci_conf[0x05] = (dev->pci_conf[0x05] & ~0x03) | (val & 0x03); + else + dev->pci_conf[0x05] = val; + break; - case 0x07: - dev->pci_conf[0x07] &= ~(val & 0xb0); - break; - case 0x0d: - if(dev->id == VIA_8601) - dev->pci_conf[0x0d] = (dev->pci_conf[0x0d] & ~0x07) | (val & 0x07); - else if(dev->id == VIA_694) - dev->pci_conf[0x0d] = (dev->pci_conf[0x0d] & ~0xf8) | (val & 0xf8); - else - dev->pci_conf[0x0d] = (dev->pci_conf[0x0d] & ~0x07) | (val & 0x07); + case 0x07: + dev->pci_conf[0x07] &= ~(val & 0xb0); + break; + case 0x0d: + if (dev->id == VIA_8601) + dev->pci_conf[0x0d] = (dev->pci_conf[0x0d] & ~0x07) | (val & 0x07); + else if (dev->id == VIA_694) + dev->pci_conf[0x0d] = (dev->pci_conf[0x0d] & ~0xf8) | (val & 0xf8); + else + dev->pci_conf[0x0d] = (dev->pci_conf[0x0d] & ~0x07) | (val & 0x07); - dev->pci_conf[0x75] = (dev->pci_conf[0x75] & ~0x30) | ((val & 0x06) << 3); - break; + dev->pci_conf[0x75] = (dev->pci_conf[0x75] & ~0x30) | ((val & 0x06) << 3); + break; - case 0x0f: - if((dev->id >= VIA_585) || (dev->id < VIA_597)) - dev->pci_conf[0x0f] = (dev->pci_conf[0x0f] & ~0xcf) | (val & 0x0cf); - else - dev->pci_conf[0x0f] = val; - break; - case 0x12: /* Graphics Aperture Base */ - dev->pci_conf[0x12] = (val & 0xf0); - apollo_agp_map(dev); - break; - case 0x13: /* Graphics Aperture Base */ - dev->pci_conf[0x13] = val; - apollo_agp_map(dev); - break; + case 0x0f: + if ((dev->id >= VIA_585) || (dev->id < VIA_597)) + dev->pci_conf[0x0f] = (dev->pci_conf[0x0f] & ~0xcf) | (val & 0x0cf); + else + dev->pci_conf[0x0f] = val; + break; + case 0x12: /* Graphics Aperture Base */ + dev->pci_conf[0x12] = (val & 0xf0); + apollo_agp_map(dev); + break; + case 0x13: /* Graphics Aperture Base */ + dev->pci_conf[0x13] = val; + apollo_agp_map(dev); + break; - case 0x50: /* Cache Control 1 */ - if (dev->id == VIA_8601) - dev->pci_conf[0x50] = (dev->pci_conf[0x50] & ~0xd3) | (val & 0xd3); - else if (dev->id >= VIA_693A) - dev->pci_conf[0x50] = (dev->pci_conf[0x50] & ~0xd1) | (val & 0xd1); - else if (dev->id == VIA_595) - dev->pci_conf[0x50] = (dev->pci_conf[0x50] & ~0xfb) | (val & 0xfb); - else if ((dev->id == VIA_585) || (dev->id == VIA_691)) - dev->pci_conf[0x50] = val; - else - dev->pci_conf[0x50] = (dev->pci_conf[0x50] & ~0xf8) | (val & 0xf8); - break; - case 0x51: /* Cache Control 2 */ - if (dev->id == VIA_694) - dev->pci_conf[0x51] = (dev->pci_conf[0x51] & ~0xdd) | (val & 0xdd); - else if (dev->id >= VIA_693A) - dev->pci_conf[0x51] = (dev->pci_conf[0x51] & ~0xd9) | (val & 0xd9); - else if (dev->id >= VIA_691) - dev->pci_conf[0x51] = val; - else if ((dev->id >= VIA_585) || (dev->id < VIA_597)) - dev->pci_conf[0x51] = (dev->pci_conf[0x51] & ~0x2b) | (val & 0x2b); - else - dev->pci_conf[0x51] = (dev->pci_conf[0x51] & ~0xeb) | (val & 0xeb); - break; - case 0x52: /* Non_Cacheable Control */ - if (dev->id == VIA_8601) - dev->pci_conf[0x52] = (dev->pci_conf[0x52] & ~0xdf) | (val & 0xdf); - else if (dev->id >= VIA_693A) - dev->pci_conf[0x52] = val; - else if (dev->id == VIA_691) - dev->pci_conf[0x52] = (dev->pci_conf[0x52] & ~0x9f) | (val & 0x9f); - else - dev->pci_conf[0x52] = (dev->pci_conf[0x52] & ~0xf5) | (val & 0xf5); - break; - case 0x53: /* System Performance Control */ - if (dev->id == VIA_8601) - dev->pci_conf[0x53] = (dev->pci_conf[0x53] & ~0xfc) | (val & 0xfc); - else if ((dev->id == VIA_691) || (dev->id == VIA_694)) - dev->pci_conf[0x53] = val; - else if ((dev->id >= VIA_585) || (dev->id < VIA_597) || (dev->id == VIA_693A)) - dev->pci_conf[0x53] = (dev->pci_conf[0x53] & ~0xf8) | (val & 0xf8); - else - dev->pci_conf[0x53] = (dev->pci_conf[0x53] & ~0xf0) | (val & 0xf0); - break; - case 0x54: - if (dev->id == VIA_585) - dev->pci_conf[0x54] = val; - else - dev->pci_conf[0x54] = (dev->pci_conf[0x54] & ~0x07) | (val & 0x07); - break; + case 0x50: /* Cache Control 1 */ + if (dev->id == VIA_8601) + dev->pci_conf[0x50] = (dev->pci_conf[0x50] & ~0xd3) | (val & 0xd3); + else if (dev->id >= VIA_693A) + dev->pci_conf[0x50] = (dev->pci_conf[0x50] & ~0xd1) | (val & 0xd1); + else if (dev->id == VIA_595) + dev->pci_conf[0x50] = (dev->pci_conf[0x50] & ~0xfb) | (val & 0xfb); + else if ((dev->id == VIA_585) || (dev->id == VIA_691)) + dev->pci_conf[0x50] = val; + else + dev->pci_conf[0x50] = (dev->pci_conf[0x50] & ~0xf8) | (val & 0xf8); + break; + case 0x51: /* Cache Control 2 */ + if (dev->id == VIA_694) + dev->pci_conf[0x51] = (dev->pci_conf[0x51] & ~0xdd) | (val & 0xdd); + else if (dev->id >= VIA_693A) + dev->pci_conf[0x51] = (dev->pci_conf[0x51] & ~0xd9) | (val & 0xd9); + else if (dev->id >= VIA_691) + dev->pci_conf[0x51] = val; + else if ((dev->id >= VIA_585) || (dev->id < VIA_597)) + dev->pci_conf[0x51] = (dev->pci_conf[0x51] & ~0x2b) | (val & 0x2b); + else + dev->pci_conf[0x51] = (dev->pci_conf[0x51] & ~0xeb) | (val & 0xeb); + break; + case 0x52: /* Non_Cacheable Control */ + if (dev->id == VIA_8601) + dev->pci_conf[0x52] = (dev->pci_conf[0x52] & ~0xdf) | (val & 0xdf); + else if (dev->id >= VIA_693A) + dev->pci_conf[0x52] = val; + else if (dev->id == VIA_691) + dev->pci_conf[0x52] = (dev->pci_conf[0x52] & ~0x9f) | (val & 0x9f); + else + dev->pci_conf[0x52] = (dev->pci_conf[0x52] & ~0xf5) | (val & 0xf5); + break; + case 0x53: /* System Performance Control */ + if (dev->id == VIA_8601) + dev->pci_conf[0x53] = (dev->pci_conf[0x53] & ~0xfc) | (val & 0xfc); + else if ((dev->id == VIA_691) || (dev->id == VIA_694)) + dev->pci_conf[0x53] = val; + else if ((dev->id >= VIA_585) || (dev->id < VIA_597) || (dev->id == VIA_693A)) + dev->pci_conf[0x53] = (dev->pci_conf[0x53] & ~0xf8) | (val & 0xf8); + else + dev->pci_conf[0x53] = (dev->pci_conf[0x53] & ~0xf0) | (val & 0xf0); + break; + case 0x54: + if (dev->id == VIA_585) + dev->pci_conf[0x54] = val; + else + dev->pci_conf[0x54] = (dev->pci_conf[0x54] & ~0x07) | (val & 0x07); + break; - case 0x56: case 0x57: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f: /* DRAM Row Ending Address */ - if ((dev->id >= VIA_691) && (dev->id != VIA_8601)) - spd_write_drbs(dev->pci_conf, 0x5a, 0x56, dev->drb_unit); - else if (addr >= 0x5a) - spd_write_drbs(dev->pci_conf, 0x5a, 0x5f, dev->drb_unit); - break; + case 0x56: + case 0x57: + case 0x5a: + case 0x5b: + case 0x5c: + case 0x5d: + case 0x5e: + case 0x5f: /* DRAM Row Ending Address */ + if ((dev->id >= VIA_691) && (dev->id != VIA_8601)) + spd_write_drbs(dev->pci_conf, 0x5a, 0x56, dev->drb_unit); + else if (addr >= 0x5a) + spd_write_drbs(dev->pci_conf, 0x5a, 0x5f, dev->drb_unit); + break; - case 0x58: - if ((dev->id >= VIA_585) || (dev->id < VIA_597) || (dev->id == VIA_597) || ((dev->id >= VIA_693A) || (dev->id < VIA_8601))) - dev->pci_conf[0x58] = (dev->pci_conf[0x58] & ~0xee) | (val & 0xee); - else - dev->pci_conf[0x58] = val; - break; - case 0x59: - if (dev->id >= VIA_693A) - dev->pci_conf[0x59] = (dev->pci_conf[0x59] & ~0xee) | (val & 0xee); - else if (dev->id == VIA_691) - dev->pci_conf[0x59] = val; - else if ((dev->id >= VIA_585) || (dev->id < VIA_597)) - dev->pci_conf[0x59] = (dev->pci_conf[0x59] & ~0xe7) | (val & 0xe7); - else - dev->pci_conf[0x59] = (dev->pci_conf[0x59] & ~0xf0) | (val & 0xf0); - break; + case 0x58: + if ((dev->id >= VIA_585) || (dev->id < VIA_597) || (dev->id == VIA_597) || ((dev->id >= VIA_693A) || (dev->id < VIA_8601))) + dev->pci_conf[0x58] = (dev->pci_conf[0x58] & ~0xee) | (val & 0xee); + else + dev->pci_conf[0x58] = val; + break; + case 0x59: + if (dev->id >= VIA_693A) + dev->pci_conf[0x59] = (dev->pci_conf[0x59] & ~0xee) | (val & 0xee); + else if (dev->id == VIA_691) + dev->pci_conf[0x59] = val; + else if ((dev->id >= VIA_585) || (dev->id < VIA_597)) + dev->pci_conf[0x59] = (dev->pci_conf[0x59] & ~0xe7) | (val & 0xe7); + else + dev->pci_conf[0x59] = (dev->pci_conf[0x59] & ~0xf0) | (val & 0xf0); + break; - case 0x61: /* Shadow RAM Control 1 */ - apollo_map(0xc0000, 0x04000, val & 0x03); - apollo_map(0xc4000, 0x04000, (val & 0x0c) >> 2); - apollo_map(0xc8000, 0x04000, (val & 0x30) >> 4); - apollo_map(0xcc000, 0x04000, (val & 0xc0) >> 6); + case 0x61: /* Shadow RAM Control 1 */ + apollo_map(0xc0000, 0x04000, val & 0x03); + apollo_map(0xc4000, 0x04000, (val & 0x0c) >> 2); + apollo_map(0xc8000, 0x04000, (val & 0x30) >> 4); + apollo_map(0xcc000, 0x04000, (val & 0xc0) >> 6); - dev->pci_conf[0x61] = val; - break; - case 0x62: /* Shadow RAM Control 2 */ - apollo_map(0xd0000, 0x04000, val & 0x03); - apollo_map(0xd4000, 0x04000, (val & 0x0c) >> 2); - apollo_map(0xd8000, 0x04000, (val & 0x30) >> 4); - apollo_map(0xdc000, 0x04000, (val & 0xc0) >> 6); + dev->pci_conf[0x61] = val; + break; + case 0x62: /* Shadow RAM Control 2 */ + apollo_map(0xd0000, 0x04000, val & 0x03); + apollo_map(0xd4000, 0x04000, (val & 0x0c) >> 2); + apollo_map(0xd8000, 0x04000, (val & 0x30) >> 4); + apollo_map(0xdc000, 0x04000, (val & 0xc0) >> 6); - dev->pci_conf[0x62] = val; - break; - case 0x63: /* Shadow RAM Control 3 */ - shadowbios = 0; - shadowbios_write = 0; + dev->pci_conf[0x62] = val; + break; + case 0x63: /* Shadow RAM Control 3 */ + shadowbios = 0; + shadowbios_write = 0; - apollo_map(0xf0000, 0x10000, (val & 0x30) >> 4); - shadowbios = (((val & 0x30) >> 4) & 0x02); - shadowbios_write = (((val & 0x30) >> 4) & 0x01); + apollo_map(0xf0000, 0x10000, (val & 0x30) >> 4); + shadowbios = (((val & 0x30) >> 4) & 0x02); + shadowbios_write = (((val & 0x30) >> 4) & 0x01); - apollo_map(0xe0000, 0x10000, (val & 0xc0) >> 6); - shadowbios |= (((val & 0xc0) >> 6) & 0x02); - shadowbios_write |= (((val & 0xc0) >> 6) & 0x01); + apollo_map(0xe0000, 0x10000, (val & 0xc0) >> 6); + shadowbios |= (((val & 0xc0) >> 6) & 0x02); + shadowbios_write |= (((val & 0xc0) >> 6) & 0x01); - dev->pci_conf[0x63] = val; - smram_disable_all(); - if (dev->id >= VIA_691) switch (val & 0x03) { - case 0x00: - default: - apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); /* SMM: Code DRAM, Data DRAM */ - apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 0); /* Non-SMM: Code PCI, Data PCI */ - break; - case 0x01: - apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); /* SMM: Code DRAM, Data DRAM */ - apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 1); /* Non-SMM: Code DRAM, Data DRAM */ - break; - case 0x02: - apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 3); /* SMM: Code Invalid, Data Invalid */ - apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 2); /* Non-SMM: Code DRAM, Data PCI */ - break; - case 0x03: - apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); /* SMM: Code DRAM, Data DRAM */ - apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 3); /* Non-SMM: Code Invalid, Data Invalid */ - break; - } else if (dev->id >= VIA_597) switch (val & 0x03) { - case 0x00: - default: - /* Disable SMI Address Redirection (default) */ - apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 0); - apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 0); - break; - case 0x01: - /* Allow access to DRAM Axxxx-Bxxxx for both normal and SMI cycles */ - apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); - apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 1); - break; - case 0x02: - /* Reserved */ - apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 3); - if (dev->id == VIA_597) { - /* SMI 3xxxx-4xxxx redirect to Axxxx-Bxxxx. */ - apollo_smram_map(dev, 1, 0x00030000, 0x00020000, 1); - } - apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 3); - break; - case 0x03: - /* Allow SMI Axxxx-Bxxxx DRAM access */ - apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); - apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 0); - break; - } else switch(val & 0x03) { - case 0x00: - apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 0); - apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 0); - break; - case 0x01: - apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); - apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 0); - break; - case 0x02: - apollo_smram_map(dev, 1, 0x00030000, 0x00020000, 1); - apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 3); - break; - case 0x03: - apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); - apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 1); - apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 3); - apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 3); - break; - } - break; - case 0x65: - if (dev->id == VIA_585) - dev->pci_conf[0x65] = (dev->pci_conf[0x65] & ~0xfd) | (val & 0xfd); - else if (dev->id == VIA_595) - dev->pci_conf[0x65] = (dev->pci_conf[0x65] & ~0xf9) | (val & 0xf9); - else - dev->pci_conf[0x65] = val; - break; - case 0x66: - if (dev->id == VIA_585) - dev->pci_conf[0x66] = (dev->pci_conf[0x66] & ~0xaf) | (val & 0xaf); - else if (dev->id == VIA_595) - dev->pci_conf[0x66] = (dev->pci_conf[0x66] & ~0x8f) | (val & 0x8f); - else - dev->pci_conf[0x66] = val; - break; - case 0x68: - if (dev->id != VIA_595) { - if (dev->id == VIA_597) - dev->pci_conf[0x68] = (dev->pci_conf[0x68] & ~0xfe) | (val & 0xfe); - else if ((dev->id == VIA_693A) || (dev->id == VIA_694)) - dev->pci_conf[0x68] = (dev->pci_conf[0x68] & ~0xdc) | (val & 0xdc); - else - dev->pci_conf[0x68] = (dev->pci_conf[0x68] & ~0xfc) | (val & 0xfc); - } - break; - case 0x69: - if ((dev->id != VIA_585) || (dev->id != VIA_595)){ - if ((dev->id == VIA_693A) || (dev->id < VIA_8601)) - dev->pci_conf[0x69] = (dev->pci_conf[0x69] & ~0xfe) | (val & 0xfe); - else - dev->pci_conf[0x69] = val; - } - break; - case 0x6b: - if ((dev->id == VIA_693A) || (dev->id < VIA_8601)) - dev->pci_conf[0x6b] = val; - else if (dev->id == VIA_691) - dev->pci_conf[0x6b] = (dev->pci_conf[0x6b] & ~0xcf) | (val & 0xcf); - else if (dev->id == VIA_595) - dev->pci_conf[0x6b] = (dev->pci_conf[0x6b] & ~0xc0) | (val & 0xc0); - else if (dev->id == VIA_585) - dev->pci_conf[0x6b] = (dev->pci_conf[0x6b] & ~0xc4) | (val & 0xc4); - else - dev->pci_conf[0x6b] = (dev->pci_conf[0x6b] & ~0xc1) | (val & 0xc1); - break; - case 0x6c: - if ((dev->id == VIA_597) || ((dev->id == VIA_693A) || (dev->id < VIA_8601))) - dev->pci_conf[0x6c] = (dev->pci_conf[0x6c] & ~0x1f) | (val & 0x1f); - else if (dev->id == VIA_598) - dev->pci_conf[0x6c] = (dev->pci_conf[0x6c] & ~0x7f) | (val & 0x7f); - else if (dev->id == VIA_585) - dev->pci_conf[0x6c] = (dev->pci_conf[0x6c] & ~0xef) | (val & 0xef); - else - dev->pci_conf[0x6c] = val; - break; - case 0x6d: - if ((dev->id == VIA_597) || (dev->id == VIA_694)) - dev->pci_conf[0x6d] = (dev->pci_conf[0x6d] & ~0x0f) | (val & 0x0f); - else if ((dev->id == VIA_598) || (dev->id == VIA_693A) || (dev->id == VIA_8601)) - dev->pci_conf[0x6d] = (dev->pci_conf[0x6d] & ~0x7f) | (val & 0x7f); - else - dev->pci_conf[0x6d] = val; - break; - case 0x6e: - if((dev->id == VIA_595) || (dev->id == VIA_694)) - dev->pci_conf[0x6e] = val; - else - dev->pci_conf[0x6e] = (dev->pci_conf[0x6e] & ~0xb7) | (val & 0xb7); - break; + dev->pci_conf[0x63] = val; + smram_disable_all(); + if (dev->id >= VIA_691) + switch (val & 0x03) { + case 0x00: + default: + apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); /* SMM: Code DRAM, Data DRAM */ + apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 0); /* Non-SMM: Code PCI, Data PCI */ + break; + case 0x01: + apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); /* SMM: Code DRAM, Data DRAM */ + apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 1); /* Non-SMM: Code DRAM, Data DRAM */ + break; + case 0x02: + apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 3); /* SMM: Code Invalid, Data Invalid */ + apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 2); /* Non-SMM: Code DRAM, Data PCI */ + break; + case 0x03: + apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); /* SMM: Code DRAM, Data DRAM */ + apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 3); /* Non-SMM: Code Invalid, Data Invalid */ + break; + } + else if (dev->id >= VIA_597) + switch (val & 0x03) { + case 0x00: + default: + /* Disable SMI Address Redirection (default) */ + apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 0); + apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 0); + break; + case 0x01: + /* Allow access to DRAM Axxxx-Bxxxx for both normal and SMI cycles */ + apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); + apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 1); + break; + case 0x02: + /* Reserved */ + apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 3); + if (dev->id == VIA_597) { + /* SMI 3xxxx-4xxxx redirect to Axxxx-Bxxxx. */ + apollo_smram_map(dev, 1, 0x00030000, 0x00020000, 1); + } + apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 3); + break; + case 0x03: + /* Allow SMI Axxxx-Bxxxx DRAM access */ + apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); + apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 0); + break; + } + else + switch (val & 0x03) { + case 0x00: + apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 0); + apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 0); + break; + case 0x01: + apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); + apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 0); + break; + case 0x02: + apollo_smram_map(dev, 1, 0x00030000, 0x00020000, 1); + apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 3); + break; + case 0x03: + apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); + apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 1); + apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 3); + apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 3); + break; + } + break; + case 0x65: + if (dev->id == VIA_585) + dev->pci_conf[0x65] = (dev->pci_conf[0x65] & ~0xfd) | (val & 0xfd); + else if (dev->id == VIA_595) + dev->pci_conf[0x65] = (dev->pci_conf[0x65] & ~0xf9) | (val & 0xf9); + else + dev->pci_conf[0x65] = val; + break; + case 0x66: + if (dev->id == VIA_585) + dev->pci_conf[0x66] = (dev->pci_conf[0x66] & ~0xaf) | (val & 0xaf); + else if (dev->id == VIA_595) + dev->pci_conf[0x66] = (dev->pci_conf[0x66] & ~0x8f) | (val & 0x8f); + else + dev->pci_conf[0x66] = val; + break; + case 0x68: + if (dev->id != VIA_595) { + if (dev->id == VIA_597) + dev->pci_conf[0x68] = (dev->pci_conf[0x68] & ~0xfe) | (val & 0xfe); + else if ((dev->id == VIA_693A) || (dev->id == VIA_694)) + dev->pci_conf[0x68] = (dev->pci_conf[0x68] & ~0xdc) | (val & 0xdc); + else + dev->pci_conf[0x68] = (dev->pci_conf[0x68] & ~0xfc) | (val & 0xfc); + } + break; + case 0x69: + if ((dev->id != VIA_585) || (dev->id != VIA_595)) { + if ((dev->id == VIA_693A) || (dev->id < VIA_8601)) + dev->pci_conf[0x69] = (dev->pci_conf[0x69] & ~0xfe) | (val & 0xfe); + else + dev->pci_conf[0x69] = val; + } + break; + case 0x6b: + if ((dev->id == VIA_693A) || (dev->id < VIA_8601)) + dev->pci_conf[0x6b] = val; + else if (dev->id == VIA_691) + dev->pci_conf[0x6b] = (dev->pci_conf[0x6b] & ~0xcf) | (val & 0xcf); + else if (dev->id == VIA_595) + dev->pci_conf[0x6b] = (dev->pci_conf[0x6b] & ~0xc0) | (val & 0xc0); + else if (dev->id == VIA_585) + dev->pci_conf[0x6b] = (dev->pci_conf[0x6b] & ~0xc4) | (val & 0xc4); + else + dev->pci_conf[0x6b] = (dev->pci_conf[0x6b] & ~0xc1) | (val & 0xc1); + break; + case 0x6c: + if ((dev->id == VIA_597) || ((dev->id == VIA_693A) || (dev->id < VIA_8601))) + dev->pci_conf[0x6c] = (dev->pci_conf[0x6c] & ~0x1f) | (val & 0x1f); + else if (dev->id == VIA_598) + dev->pci_conf[0x6c] = (dev->pci_conf[0x6c] & ~0x7f) | (val & 0x7f); + else if (dev->id == VIA_585) + dev->pci_conf[0x6c] = (dev->pci_conf[0x6c] & ~0xef) | (val & 0xef); + else + dev->pci_conf[0x6c] = val; + break; + case 0x6d: + if ((dev->id == VIA_597) || (dev->id == VIA_694)) + dev->pci_conf[0x6d] = (dev->pci_conf[0x6d] & ~0x0f) | (val & 0x0f); + else if ((dev->id == VIA_598) || (dev->id == VIA_693A) || (dev->id == VIA_8601)) + dev->pci_conf[0x6d] = (dev->pci_conf[0x6d] & ~0x7f) | (val & 0x7f); + else + dev->pci_conf[0x6d] = val; + break; + case 0x6e: + if ((dev->id == VIA_595) || (dev->id == VIA_694)) + dev->pci_conf[0x6e] = val; + else + dev->pci_conf[0x6e] = (dev->pci_conf[0x6e] & ~0xb7) | (val & 0xb7); + break; - case 0x70: - if ((dev->id >= VIA_693A)) - dev->pci_conf[0x70] = (dev->pci_conf[0x70] & ~0xdf) | (val & 0xdf); - else if (dev->id == VIA_597) - dev->pci_conf[0x70] = (dev->pci_conf[0x70] & ~0xf1) | (val & 0xf1); - else if ((dev->id >= VIA_585) || (dev->id < VIA_597)) - dev->pci_conf[0x70] = (dev->pci_conf[0x70] & ~0xe3) | (val & 0xe3); - else - dev->pci_conf[0x70] = val; - break; - case 0x71: - if((dev->id >= VIA_585) || (dev->id == VIA_694)) - dev->pci_conf[0x71] = (dev->pci_conf[0x71] & ~0xdf) | (val & 0xdf); - else - dev->pci_conf[0x71] = val; - break; - case 0x73: - if (dev->id >= VIA_693A) - dev->pci_conf[0x73] = (dev->pci_conf[0x73] & ~0x7f) | (val & 0x7f); - else if ((dev->id >= VIA_585) || (dev->id < VIA_597)) - dev->pci_conf[0x73] = (dev->pci_conf[0x73] & ~0xef) | (val & 0xef); - else - dev->pci_conf[0x73] = val; - break; - case 0x74: - if ((dev->id == VIA_693A) || (dev->id == VIA_8601)) - dev->pci_conf[0x74] = (dev->pci_conf[0x74] & ~0xdf) | (val & 0xdf); - else if (dev->id == VIA_694) - dev->pci_conf[0x74] = (dev->pci_conf[0x74] & ~0x9f) | (val & 0x9f); - else - dev->pci_conf[0x74] = (dev->pci_conf[0x74] & ~0xc0) | (val & 0xc0); - break; - case 0x75: - if (dev->id >= VIA_693A) - dev->pci_conf[0x75] = val; - else - dev->pci_conf[0x75] = (dev->pci_conf[0x75] & ~0xcf) | (val & 0xcf); - break; - case 0x76: - if (dev->id >= VIA_693A) - dev->pci_conf[0x76] = val; - else if ((dev->id >= VIA_585) || (dev->id < VIA_597)) - dev->pci_conf[0x76] = (dev->pci_conf[0x76] & ~0xb0) | (val & 0xb0); - else - dev->pci_conf[0x76] = (dev->pci_conf[0x76] & ~0xf0) | (val & 0xf0); - break; - case 0x77: - if (dev->id < VIA_693A) - dev->pci_conf[0x77] = (dev->pci_conf[0x77] & ~0xc0) | (val & 0xc0); - break; - case 0x78: - dev->pci_conf[0x78] = (dev->pci_conf[0x78] & ~0xd5) | (val & 0xd5); - break; - case 0x79: - dev->pci_conf[0x79] = (dev->pci_conf[0x79] & ~0xfc) | (val & 0xfc); - break; - case 0x7a: - dev->pci_conf[0x7a] = (dev->pci_conf[0x7a] & ~0x89) | (val & 0x89); - break; - case 0x7e: - if ((dev->id != VIA_8601) || (dev->id != VIA_694)) - dev->pci_conf[0x7e] = (dev->pci_conf[0x7e] & ~0x3f) | (val & 0x3f); - break; + case 0x70: + if ((dev->id >= VIA_693A)) + dev->pci_conf[0x70] = (dev->pci_conf[0x70] & ~0xdf) | (val & 0xdf); + else if (dev->id == VIA_597) + dev->pci_conf[0x70] = (dev->pci_conf[0x70] & ~0xf1) | (val & 0xf1); + else if ((dev->id >= VIA_585) || (dev->id < VIA_597)) + dev->pci_conf[0x70] = (dev->pci_conf[0x70] & ~0xe3) | (val & 0xe3); + else + dev->pci_conf[0x70] = val; + break; + case 0x71: + if ((dev->id >= VIA_585) || (dev->id == VIA_694)) + dev->pci_conf[0x71] = (dev->pci_conf[0x71] & ~0xdf) | (val & 0xdf); + else + dev->pci_conf[0x71] = val; + break; + case 0x73: + if (dev->id >= VIA_693A) + dev->pci_conf[0x73] = (dev->pci_conf[0x73] & ~0x7f) | (val & 0x7f); + else if ((dev->id >= VIA_585) || (dev->id < VIA_597)) + dev->pci_conf[0x73] = (dev->pci_conf[0x73] & ~0xef) | (val & 0xef); + else + dev->pci_conf[0x73] = val; + break; + case 0x74: + if ((dev->id == VIA_693A) || (dev->id == VIA_8601)) + dev->pci_conf[0x74] = (dev->pci_conf[0x74] & ~0xdf) | (val & 0xdf); + else if (dev->id == VIA_694) + dev->pci_conf[0x74] = (dev->pci_conf[0x74] & ~0x9f) | (val & 0x9f); + else + dev->pci_conf[0x74] = (dev->pci_conf[0x74] & ~0xc0) | (val & 0xc0); + break; + case 0x75: + if (dev->id >= VIA_693A) + dev->pci_conf[0x75] = val; + else + dev->pci_conf[0x75] = (dev->pci_conf[0x75] & ~0xcf) | (val & 0xcf); + break; + case 0x76: + if (dev->id >= VIA_693A) + dev->pci_conf[0x76] = val; + else if ((dev->id >= VIA_585) || (dev->id < VIA_597)) + dev->pci_conf[0x76] = (dev->pci_conf[0x76] & ~0xb0) | (val & 0xb0); + else + dev->pci_conf[0x76] = (dev->pci_conf[0x76] & ~0xf0) | (val & 0xf0); + break; + case 0x77: + if (dev->id < VIA_693A) + dev->pci_conf[0x77] = (dev->pci_conf[0x77] & ~0xc0) | (val & 0xc0); + break; + case 0x78: + dev->pci_conf[0x78] = (dev->pci_conf[0x78] & ~0xd5) | (val & 0xd5); + break; + case 0x79: + dev->pci_conf[0x79] = (dev->pci_conf[0x79] & ~0xfc) | (val & 0xfc); + break; + case 0x7a: + dev->pci_conf[0x7a] = (dev->pci_conf[0x7a] & ~0x89) | (val & 0x89); + break; + case 0x7e: + if ((dev->id != VIA_8601) || (dev->id != VIA_694)) + dev->pci_conf[0x7e] = (dev->pci_conf[0x7e] & ~0x3f) | (val & 0x3f); + break; - case 0x80: - dev->pci_conf[0x80] = (dev->pci_conf[0x80] & ~0x8f) | (val & 0x8f); - break; - case 0x84: - /* The datasheet first mentions 7-0 but then says 3-0 are reserved - - - minimum of 16 MB for the graphics aperture? 8601 datasheet doesn't refer it. */ - if(dev->id >= VIA_693A) - dev->pci_conf[0x84] = val; - else - dev->pci_conf[0x84] = (dev->pci_conf[0x84] & ~0xf0) | (val & 0xf0); - apollo_agp_map(dev); - break; - case 0x88: - if((dev->id == VIA_693A) || (dev->id == VIA_8601)) - dev->pci_conf[0x88] = (dev->pci_conf[0x88] & ~0x06) | (val & 0x06); - else - dev->pci_conf[0x88] = (dev->pci_conf[0x88] & ~0x07) | (val & 0x07); - apollo_agp_map(dev); - break; - case 0x89: - dev->pci_conf[0x89] = val & 0xf0; - apollo_agp_map(dev); - break; - case 0x8a: - case 0x8b: - dev->pci_conf[addr] = val; - apollo_agp_map(dev); - break; + case 0x80: + dev->pci_conf[0x80] = (dev->pci_conf[0x80] & ~0x8f) | (val & 0x8f); + break; + case 0x84: + /* The datasheet first mentions 7-0 but then says 3-0 are reserved - + - minimum of 16 MB for the graphics aperture? 8601 datasheet doesn't refer it. */ + if (dev->id >= VIA_693A) + dev->pci_conf[0x84] = val; + else + dev->pci_conf[0x84] = (dev->pci_conf[0x84] & ~0xf0) | (val & 0xf0); + apollo_agp_map(dev); + break; + case 0x88: + if ((dev->id == VIA_693A) || (dev->id == VIA_8601)) + dev->pci_conf[0x88] = (dev->pci_conf[0x88] & ~0x06) | (val & 0x06); + else + dev->pci_conf[0x88] = (dev->pci_conf[0x88] & ~0x07) | (val & 0x07); + apollo_agp_map(dev); + break; + case 0x89: + dev->pci_conf[0x89] = val & 0xf0; + apollo_agp_map(dev); + break; + case 0x8a: + case 0x8b: + dev->pci_conf[addr] = val; + apollo_agp_map(dev); + break; - case 0xa8: - if(dev->id == VIA_694) - dev->pci_conf[0xa8] = (dev->pci_conf[0xa8] & ~0x33) | (val & 0x33); - else - dev->pci_conf[0xa8] = (dev->pci_conf[0xa8] & ~0x03) | (val & 0x03); - break; - case 0xa9: - dev->pci_conf[0xa9] = (dev->pci_conf[0xa9] & ~0x03) | (val & 0x03); - break; - case 0xac: - if(dev->id == VIA_8601) - dev->pci_conf[0xac] = (dev->pci_conf[0xac] & ~0x7f) | (val & 0x7f); - else - dev->pci_conf[0xac] = (dev->pci_conf[0xac] & ~0x0f) | (val & 0x0f); - break; - case 0xad: - dev->pci_conf[0xac] = (dev->pci_conf[0xac] & ~0x0f) | (val & 0x0f); - break; + case 0xa8: + if (dev->id == VIA_694) + dev->pci_conf[0xa8] = (dev->pci_conf[0xa8] & ~0x33) | (val & 0x33); + else + dev->pci_conf[0xa8] = (dev->pci_conf[0xa8] & ~0x03) | (val & 0x03); + break; + case 0xa9: + dev->pci_conf[0xa9] = (dev->pci_conf[0xa9] & ~0x03) | (val & 0x03); + break; + case 0xac: + if (dev->id == VIA_8601) + dev->pci_conf[0xac] = (dev->pci_conf[0xac] & ~0x7f) | (val & 0x7f); + else + dev->pci_conf[0xac] = (dev->pci_conf[0xac] & ~0x0f) | (val & 0x0f); + break; + case 0xad: + dev->pci_conf[0xac] = (dev->pci_conf[0xac] & ~0x0f) | (val & 0x0f); + break; - case 0xfc: - if (dev->id == VIA_8601) - dev->pci_conf[0xfc] = (dev->pci_conf[0xfc] & ~0x03) | (val & 0x03); - else if (dev->id > VIA_597) - dev->pci_conf[0xfc] = (dev->pci_conf[0xfc] & ~0x01) | (val & 0x01); - break; + case 0xfc: + if (dev->id == VIA_8601) + dev->pci_conf[0xfc] = (dev->pci_conf[0xfc] & ~0x03) | (val & 0x03); + else if (dev->id > VIA_597) + dev->pci_conf[0xfc] = (dev->pci_conf[0xfc] & ~0x01) | (val & 0x01); + break; - case 0xfd: - if (dev->id == VIA_8601) - dev->pci_conf[0xfd] = (dev->pci_conf[0xfd] & ~0x07) | (val & 0x07); - else - dev->pci_conf[0xfd] = val; - break; + case 0xfd: + if (dev->id == VIA_8601) + dev->pci_conf[0xfd] = (dev->pci_conf[0xfd] & ~0x07) | (val & 0x07); + else + dev->pci_conf[0xfd] = val; + break; - default: - dev->pci_conf[addr] = val; - break; + default: + dev->pci_conf[addr] = val; + break; } } - static uint8_t via_apollo_read(int func, int addr, void *priv) { via_apollo_t *dev = (via_apollo_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; - switch(func) { + switch (func) { case 0: - ret = dev->pci_conf[addr]; - break; + ret = dev->pci_conf[addr]; + break; } return ret; } - static void via_apollo_write(int func, int addr, uint8_t val, void *priv) { - switch(func) { - case 0: - via_apollo_host_bridge_write(func, addr, val, priv); - break; + switch (func) { + case 0: + via_apollo_host_bridge_write(func, addr, val, priv); + break; } } - static void via_apollo_reset(void *priv) { @@ -698,7 +696,6 @@ via_apollo_reset(void *priv) via_apollo_write(0, 0x63, 0x00, priv); } - static void * via_apollo_init(const device_t *info) { @@ -707,41 +704,41 @@ via_apollo_init(const device_t *info) dev->smram = smram_add(); if (dev->id != VIA_8601) - apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); /* SMM: Code DRAM, Data DRAM */ + apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); /* SMM: Code DRAM, Data DRAM */ pci_add_card(PCI_ADD_NORTHBRIDGE, via_apollo_read, via_apollo_write, dev); dev->id = info->local; switch (dev->id) { - case VIA_597: - device_add(&via_vp3_agp_device); - break; + case VIA_597: + device_add(&via_vp3_agp_device); + break; - case VIA_691: - device_add(&via_apro_agp_device); - break; + case VIA_691: + device_add(&via_apro_agp_device); + break; - case VIA_8601: - device_add(&via_vt8601_agp_device); - break; + case VIA_8601: + device_add(&via_vt8601_agp_device); + break; - case VIA_598: - case VIA_693A: - case VIA_694: - device_add(&via_mvp3_agp_device); - break; + case VIA_598: + case VIA_693A: + case VIA_694: + device_add(&via_mvp3_agp_device); + break; } if (dev->id >= VIA_597) - dev->agpgart = device_add(&agpgart_device); + dev->agpgart = device_add(&agpgart_device); if ((dev->id >= VIA_694) && (dev->id != VIA_8601)) - dev->drb_unit = 16; + dev->drb_unit = 16; else if (dev->id >= VIA_597) - dev->drb_unit = 8; + dev->drb_unit = 8; else - dev->drb_unit = 4; + dev->drb_unit = 4; via_apollo_setup(dev); via_apollo_reset(dev); @@ -749,7 +746,6 @@ via_apollo_init(const device_t *info) return dev; } - static void via_apollo_close(void *priv) { @@ -761,113 +757,113 @@ via_apollo_close(void *priv) } const device_t via_vpx_device = { - .name = "VIA Apollo VPX", + .name = "VIA Apollo VPX", .internal_name = "via_vpx", - .flags = DEVICE_PCI, - .local = VIA_585, /*VT82C585*/ - .init = via_apollo_init, - .close = via_apollo_close, - .reset = via_apollo_reset, + .flags = DEVICE_PCI, + .local = VIA_585, /*VT82C585*/ + .init = via_apollo_init, + .close = via_apollo_close, + .reset = via_apollo_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t amd640_device = { - .name = "AMD 640 System Controller", + .name = "AMD 640 System Controller", .internal_name = "amd640", - .flags = DEVICE_PCI, - .local = VIA_595, /*VT82C595*/ - .init = via_apollo_init, - .close = via_apollo_close, - .reset = via_apollo_reset, + .flags = DEVICE_PCI, + .local = VIA_595, /*VT82C595*/ + .init = via_apollo_init, + .close = via_apollo_close, + .reset = via_apollo_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_vp3_device = { - .name = "VIA Apollo VP3", + .name = "VIA Apollo VP3", .internal_name = "via_vp3", - .flags = DEVICE_PCI, - .local = VIA_597, /*VT82C597*/ - .init = via_apollo_init, - .close = via_apollo_close, - .reset = via_apollo_reset, + .flags = DEVICE_PCI, + .local = VIA_597, /*VT82C597*/ + .init = via_apollo_init, + .close = via_apollo_close, + .reset = via_apollo_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_mvp3_device = { - .name = "VIA Apollo MVP3", + .name = "VIA Apollo MVP3", .internal_name = "via_mvp3", - .flags = DEVICE_PCI, - .local = VIA_598, /*VT82C598MVP*/ - .init = via_apollo_init, - .close = via_apollo_close, - .reset = via_apollo_reset, + .flags = DEVICE_PCI, + .local = VIA_598, /*VT82C598MVP*/ + .init = via_apollo_init, + .close = via_apollo_close, + .reset = via_apollo_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_apro_device = { - .name = "VIA Apollo Pro", + .name = "VIA Apollo Pro", .internal_name = "via_apro", - .flags = DEVICE_PCI, - .local = VIA_691, /*VT82C691*/ - .init = via_apollo_init, - .close = via_apollo_close, - .reset = via_apollo_reset, + .flags = DEVICE_PCI, + .local = VIA_691, /*VT82C691*/ + .init = via_apollo_init, + .close = via_apollo_close, + .reset = via_apollo_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_apro133_device = { - .name = "VIA Apollo Pro133", + .name = "VIA Apollo Pro133", .internal_name = "via_apro133", - .flags = DEVICE_PCI, - .local = VIA_693A, /*VT82C693A*/ - .init = via_apollo_init, - .close = via_apollo_close, - .reset = via_apollo_reset, + .flags = DEVICE_PCI, + .local = VIA_693A, /*VT82C693A*/ + .init = via_apollo_init, + .close = via_apollo_close, + .reset = via_apollo_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_apro133a_device = { - .name = "VIA Apollo Pro133A", + .name = "VIA Apollo Pro133A", .internal_name = "via_apro_133a", - .flags = DEVICE_PCI, - .local = VIA_694, /*VT82C694X*/ - .init = via_apollo_init, - .close = via_apollo_close, - .reset = via_apollo_reset, + .flags = DEVICE_PCI, + .local = VIA_694, /*VT82C694X*/ + .init = via_apollo_init, + .close = via_apollo_close, + .reset = via_apollo_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_vt8601_device = { - .name = "VIA Apollo ProMedia", + .name = "VIA Apollo ProMedia", .internal_name = "via_vt8601", - .flags = DEVICE_PCI, - .local = VIA_8601, /*VT8601*/ - .init = via_apollo_init, - .close = via_apollo_close, - .reset = via_apollo_reset, + .flags = DEVICE_PCI, + .local = VIA_8601, /*VT8601*/ + .init = via_apollo_init, + .close = via_apollo_close, + .reset = via_apollo_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/via_pipc.c b/src/chipset/via_pipc.c index b8c06b9f4..48cae7e41 100644 --- a/src/chipset/via_pipc.c +++ b/src/chipset/via_pipc.c @@ -58,14 +58,13 @@ /* Most revision numbers (PCI-ISA bridge or otherwise) were lifted from PCI device listings on forums, as VIA's datasheets are not very helpful regarding those. */ -#define VIA_PIPC_586A 0x05862500 -#define VIA_PIPC_586B 0x05864700 -#define VIA_PIPC_596A 0x05960900 -#define VIA_PIPC_596B 0x05962300 -#define VIA_PIPC_686A 0x06861400 -#define VIA_PIPC_686B 0x06864000 -#define VIA_PIPC_8231 0x82311000 - +#define VIA_PIPC_586A 0x05862500 +#define VIA_PIPC_586B 0x05864700 +#define VIA_PIPC_596A 0x05960900 +#define VIA_PIPC_596B 0x05962300 +#define VIA_PIPC_686A 0x06861400 +#define VIA_PIPC_686B 0x06864000 +#define VIA_PIPC_8231 0x82311000 enum { TRAP_DRQ = 0, @@ -106,62 +105,58 @@ enum { typedef struct { struct _pipc_ *dev; - void *trap; - uint32_t *sts_reg, *en_reg, mask; + void *trap; + uint32_t *sts_reg, *en_reg, mask; } pipc_io_trap_t; typedef struct _pipc_ { - uint32_t local; - uint8_t max_func, max_pcs; + uint32_t local; + uint8_t max_func, max_pcs; - uint8_t pci_isa_regs[256], - ide_regs[256], - usb_regs[2][256], - power_regs[256], - ac97_regs[2][256], fmnmi_regs[4]; + uint8_t pci_isa_regs[256], + ide_regs[256], + usb_regs[2][256], + power_regs[256], + ac97_regs[2][256], fmnmi_regs[4]; - sff8038i_t *bm[2]; - nvr_t *nvr; - int nvr_enabled, slot; - ddma_t *ddma; + sff8038i_t *bm[2]; + nvr_t *nvr; + int nvr_enabled, slot; + ddma_t *ddma; smbus_piix4_t *smbus; - usb_t *usb[2]; + usb_t *usb[2]; - acpi_t *acpi; + acpi_t *acpi; pipc_io_trap_t io_traps[TRAP_MAX]; - void *gameport, *ac97, *sio, *hwm; - sb_t *sb; - uint16_t midigame_base, sb_base, fmnmi_base; + void *gameport, *ac97, *sio, *hwm; + sb_t *sb; + uint16_t midigame_base, sb_base, fmnmi_base; } pipc_t; - #ifdef ENABLE_PIPC_LOG int pipc_do_log = ENABLE_PIPC_LOG; - static void pipc_log(const char *fmt, ...) { va_list ap; if (pipc_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define pipc_log(fmt, ...) +# define pipc_log(fmt, ...) #endif - -static void pipc_sgd_handlers(pipc_t *dev, uint8_t modem); -static void pipc_codec_handlers(pipc_t *dev, uint8_t modem); -static void pipc_sb_handlers(pipc_t *dev, uint8_t modem); -static uint8_t pipc_read(int func, int addr, void *priv); -static void pipc_write(int func, int addr, uint8_t val, void *priv); - +static void pipc_sgd_handlers(pipc_t *dev, uint8_t modem); +static void pipc_codec_handlers(pipc_t *dev, uint8_t modem); +static void pipc_sb_handlers(pipc_t *dev, uint8_t modem); +static uint8_t pipc_read(int func, int addr, void *priv); +static void pipc_write(int func, int addr, uint8_t val, void *priv); static void pipc_io_trap_pact(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv) @@ -169,32 +164,30 @@ pipc_io_trap_pact(int size, uint16_t addr, uint8_t write, uint8_t val, void *pri pipc_io_trap_t *trap = (pipc_io_trap_t *) priv; if (*(trap->en_reg) & trap->mask) { - *(trap->sts_reg) |= trap->mask; - trap->dev->acpi->regs.glbsts |= 0x0001; - if (trap->dev->acpi->regs.glben & 0x0001) - acpi_raise_smi(trap->dev->acpi, 1); + *(trap->sts_reg) |= trap->mask; + trap->dev->acpi->regs.glbsts |= 0x0001; + if (trap->dev->acpi->regs.glben & 0x0001) + acpi_raise_smi(trap->dev->acpi, 1); } } - static void pipc_io_trap_glb(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv) { pipc_io_trap_t *trap = (pipc_io_trap_t *) priv; if (*(trap->en_reg) & trap->mask) { - *(trap->sts_reg) |= trap->mask; - if (trap->dev->local >= VIA_PIPC_686A) { - if (write) - trap->dev->acpi->regs.extsmi_val |= 0x1000; - else - trap->dev->acpi->regs.extsmi_val &= ~0x1000; - } - acpi_raise_smi(trap->dev->acpi, 1); + *(trap->sts_reg) |= trap->mask; + if (trap->dev->local >= VIA_PIPC_686A) { + if (write) + trap->dev->acpi->regs.extsmi_val |= 0x1000; + else + trap->dev->acpi->regs.extsmi_val &= ~0x1000; + } + acpi_raise_smi(trap->dev->acpi, 1); } } - static void pipc_reset_hard(void *priv) { @@ -202,7 +195,7 @@ pipc_reset_hard(void *priv) pipc_log("PIPC: reset_hard()\n"); - pipc_t *dev = (pipc_t *) priv; + pipc_t *dev = (pipc_t *) priv; uint16_t old_base = (dev->ide_regs[0x20] & 0xf0) | (dev->ide_regs[0x21] << 8); sff_bus_master_reset(dev->bm[0], old_base); @@ -215,7 +208,8 @@ pipc_reset_hard(void *priv) memset(dev->ac97_regs, 0, 512); /* PCI-ISA bridge registers. */ - dev->pci_isa_regs[0x00] = 0x06; dev->pci_isa_regs[0x01] = 0x11; + dev->pci_isa_regs[0x00] = 0x06; + dev->pci_isa_regs[0x01] = 0x11; dev->pci_isa_regs[0x02] = dev->local >> 16; dev->pci_isa_regs[0x03] = dev->local >> 24; dev->pci_isa_regs[0x04] = (dev->local <= VIA_PIPC_586B) ? 0x0f : 0x87; @@ -232,12 +226,12 @@ pipc_reset_hard(void *priv) dev->pci_isa_regs[0x50] = (dev->local >= VIA_PIPC_686A) ? 0x0e : 0x24; /* 686A/B default value does not line up with default bits */ dev->pci_isa_regs[0x59] = 0x04; if (dev->local >= VIA_PIPC_686A) - dev->pci_isa_regs[0x5a] = dev->pci_isa_regs[0x5f] = 0x04; + dev->pci_isa_regs[0x5a] = dev->pci_isa_regs[0x5f] = 0x04; dma_e = 0x00; for (i = 0; i < 8; i++) { - dma[i].ab &= 0xffff000f; - dma[i].ac &= 0xffff000f; + dma[i].ab &= 0xffff000f; + dma[i].ac &= 0xffff000f; } pic_set_shadow(0); @@ -246,229 +240,250 @@ pipc_reset_hard(void *priv) /* IDE registers. */ dev->max_func++; - dev->ide_regs[0x00] = 0x06; dev->ide_regs[0x01] = 0x11; - dev->ide_regs[0x02] = 0x71; dev->ide_regs[0x03] = 0x05; + dev->ide_regs[0x00] = 0x06; + dev->ide_regs[0x01] = 0x11; + dev->ide_regs[0x02] = 0x71; + dev->ide_regs[0x03] = 0x05; dev->ide_regs[0x04] = 0x80; - dev->ide_regs[0x06] = (dev->local == VIA_PIPC_686A) ? 0x90 : 0x80; dev->ide_regs[0x07] = 0x02; + dev->ide_regs[0x06] = (dev->local == VIA_PIPC_686A) ? 0x90 : 0x80; + dev->ide_regs[0x07] = 0x02; dev->ide_regs[0x08] = (dev->local == VIA_PIPC_596B) ? 0x10 : 0x06; /* only 596B has rev 0x10? */ dev->ide_regs[0x09] = 0x85; dev->ide_regs[0x0a] = 0x01; dev->ide_regs[0x0b] = 0x01; - dev->ide_regs[0x10] = 0xf1; dev->ide_regs[0x11] = 0x01; - dev->ide_regs[0x14] = 0xf5; dev->ide_regs[0x15] = 0x03; - dev->ide_regs[0x18] = 0x71; dev->ide_regs[0x19] = 0x01; - dev->ide_regs[0x1c] = 0x75; dev->ide_regs[0x1d] = 0x03; - dev->ide_regs[0x20] = 0x01; dev->ide_regs[0x21] = 0xcc; + dev->ide_regs[0x10] = 0xf1; + dev->ide_regs[0x11] = 0x01; + dev->ide_regs[0x14] = 0xf5; + dev->ide_regs[0x15] = 0x03; + dev->ide_regs[0x18] = 0x71; + dev->ide_regs[0x19] = 0x01; + dev->ide_regs[0x1c] = 0x75; + dev->ide_regs[0x1d] = 0x03; + dev->ide_regs[0x20] = 0x01; + dev->ide_regs[0x21] = 0xcc; if (dev->local >= VIA_PIPC_686A) - dev->ide_regs[0x34] = 0xc0; + dev->ide_regs[0x34] = 0xc0; dev->ide_regs[0x3c] = 0x0e; if (dev->local <= VIA_PIPC_586B) - dev->ide_regs[0x40] = 0x04; + dev->ide_regs[0x40] = 0x04; dev->ide_regs[0x41] = (dev->local == VIA_PIPC_686B) ? 0x06 : 0x02; dev->ide_regs[0x42] = 0x09; dev->ide_regs[0x43] = (dev->local >= VIA_PIPC_686A) ? 0x0a : 0x3a; dev->ide_regs[0x44] = 0x68; if (dev->local == VIA_PIPC_686B) - dev->ide_regs[0x45] = 0x20; + dev->ide_regs[0x45] = 0x20; else if (dev->local >= VIA_PIPC_8231) - dev->ide_regs[0x45] = 0x03; + dev->ide_regs[0x45] = 0x03; dev->ide_regs[0x46] = 0xc0; - dev->ide_regs[0x48] = 0xa8; dev->ide_regs[0x49] = 0xa8; - dev->ide_regs[0x4a] = 0xa8; dev->ide_regs[0x4b] = 0xa8; + dev->ide_regs[0x48] = 0xa8; + dev->ide_regs[0x49] = 0xa8; + dev->ide_regs[0x4a] = 0xa8; + dev->ide_regs[0x4b] = 0xa8; dev->ide_regs[0x4c] = 0xff; if (dev->local != VIA_PIPC_686B) - dev->ide_regs[0x4e] = dev->ide_regs[0x4f] = 0xff; + dev->ide_regs[0x4e] = dev->ide_regs[0x4f] = 0xff; dev->ide_regs[0x50] = dev->ide_regs[0x51] = dev->ide_regs[0x52] = dev->ide_regs[0x53] = ((dev->local == VIA_PIPC_686A) || (dev->local == VIA_PIPC_686B)) ? 0x07 : 0x03; if (dev->local >= VIA_PIPC_596A) - dev->ide_regs[0x54] = ((dev->local == VIA_PIPC_686A) || (dev->local == VIA_PIPC_686B)) ? 0x04 : 0x06; + dev->ide_regs[0x54] = ((dev->local == VIA_PIPC_686A) || (dev->local == VIA_PIPC_686B)) ? 0x04 : 0x06; dev->ide_regs[0x61] = 0x02; dev->ide_regs[0x69] = 0x02; if (dev->local >= VIA_PIPC_686A) { - dev->ide_regs[0xc0] = 0x01; - dev->ide_regs[0xc2] = 0x02; + dev->ide_regs[0xc0] = 0x01; + dev->ide_regs[0xc2] = 0x02; } /* USB registers. */ for (i = 0; i <= (dev->local >= VIA_PIPC_686A); i++) { - dev->max_func++; - dev->usb_regs[i][0x00] = 0x06; dev->usb_regs[i][0x01] = 0x11; - dev->usb_regs[i][0x02] = 0x38; dev->usb_regs[i][0x03] = 0x30; - dev->usb_regs[i][0x04] = 0x00; dev->usb_regs[i][0x05] = 0x00; - dev->usb_regs[i][0x06] = 0x00; dev->usb_regs[i][0x07] = 0x02; - switch (dev->local) { - case VIA_PIPC_586A: - case VIA_PIPC_586B: - case VIA_PIPC_596A: - dev->usb_regs[i][0x08] = 0x02; - break; + dev->max_func++; + dev->usb_regs[i][0x00] = 0x06; + dev->usb_regs[i][0x01] = 0x11; + dev->usb_regs[i][0x02] = 0x38; + dev->usb_regs[i][0x03] = 0x30; + dev->usb_regs[i][0x04] = 0x00; + dev->usb_regs[i][0x05] = 0x00; + dev->usb_regs[i][0x06] = 0x00; + dev->usb_regs[i][0x07] = 0x02; + switch (dev->local) { + case VIA_PIPC_586A: + case VIA_PIPC_586B: + case VIA_PIPC_596A: + dev->usb_regs[i][0x08] = 0x02; + break; - case VIA_PIPC_596B: - dev->usb_regs[i][0x08] = 0x08; - break; + case VIA_PIPC_596B: + dev->usb_regs[i][0x08] = 0x08; + break; - case VIA_PIPC_686A: - dev->usb_regs[i][0x08] = 0x06; - break; + case VIA_PIPC_686A: + dev->usb_regs[i][0x08] = 0x06; + break; - case VIA_PIPC_686B: - dev->usb_regs[i][0x08] = 0x1a; - break; + case VIA_PIPC_686B: + dev->usb_regs[i][0x08] = 0x1a; + break; - case VIA_PIPC_8231: - dev->usb_regs[i][0x08] = 0x1e; - break; - } + case VIA_PIPC_8231: + dev->usb_regs[i][0x08] = 0x1e; + break; + } - dev->usb_regs[i][0x0a] = 0x03; - dev->usb_regs[i][0x0b] = 0x0c; - dev->usb_regs[i][0x0d] = 0x16; - dev->usb_regs[i][0x20] = 0x01; - dev->usb_regs[i][0x21] = 0x03; - if (dev->local == VIA_PIPC_686B) - dev->usb_regs[i][0x34] = 0x80; - dev->usb_regs[i][0x3d] = 0x04; + dev->usb_regs[i][0x0a] = 0x03; + dev->usb_regs[i][0x0b] = 0x0c; + dev->usb_regs[i][0x0d] = 0x16; + dev->usb_regs[i][0x20] = 0x01; + dev->usb_regs[i][0x21] = 0x03; + if (dev->local == VIA_PIPC_686B) + dev->usb_regs[i][0x34] = 0x80; + dev->usb_regs[i][0x3d] = 0x04; - dev->usb_regs[i][0x60] = 0x10; - if (dev->local >= VIA_PIPC_686A) { - dev->usb_regs[i][0x80] = 0x01; - dev->usb_regs[i][0x82] = 0x02; - } - dev->usb_regs[i][0xc1] = 0x20; + dev->usb_regs[i][0x60] = 0x10; + if (dev->local >= VIA_PIPC_686A) { + dev->usb_regs[i][0x80] = 0x01; + dev->usb_regs[i][0x82] = 0x02; + } + dev->usb_regs[i][0xc1] = 0x20; } /* Power management registers. */ if (dev->acpi) { - dev->max_func++; - dev->power_regs[0x00] = 0x06; dev->power_regs[0x01] = 0x11; - if (dev->local >= VIA_PIPC_8231) { - /* The VT8231 preliminary datasheet lists *two* inaccurate - device IDs (3068 and 3057). Real dumps have 8235. */ - dev->power_regs[0x02] = 0x35; dev->power_regs[0x03] = 0x82; - } else { - if (dev->local <= VIA_PIPC_586B) - dev->power_regs[0x02] = 0x40; - else if (dev->local <= VIA_PIPC_596B) - dev->power_regs[0x02] = 0x50; - else - dev->power_regs[0x02] = 0x57; - dev->power_regs[0x03] = 0x30; - } - dev->power_regs[0x04] = 0x00; dev->power_regs[0x05] = 0x00; - dev->power_regs[0x06] = (dev->local == VIA_PIPC_686B) ? 0x90 : 0x80; dev->power_regs[0x07] = 0x02; - switch (dev->local) { - case VIA_PIPC_586B: - case VIA_PIPC_686A: - case VIA_PIPC_8231: - dev->power_regs[0x08] = 0x10; - break; + dev->max_func++; + dev->power_regs[0x00] = 0x06; + dev->power_regs[0x01] = 0x11; + if (dev->local >= VIA_PIPC_8231) { + /* The VT8231 preliminary datasheet lists *two* inaccurate + device IDs (3068 and 3057). Real dumps have 8235. */ + dev->power_regs[0x02] = 0x35; + dev->power_regs[0x03] = 0x82; + } else { + if (dev->local <= VIA_PIPC_586B) + dev->power_regs[0x02] = 0x40; + else if (dev->local <= VIA_PIPC_596B) + dev->power_regs[0x02] = 0x50; + else + dev->power_regs[0x02] = 0x57; + dev->power_regs[0x03] = 0x30; + } + dev->power_regs[0x04] = 0x00; + dev->power_regs[0x05] = 0x00; + dev->power_regs[0x06] = (dev->local == VIA_PIPC_686B) ? 0x90 : 0x80; + dev->power_regs[0x07] = 0x02; + switch (dev->local) { + case VIA_PIPC_586B: + case VIA_PIPC_686A: + case VIA_PIPC_8231: + dev->power_regs[0x08] = 0x10; + break; - case VIA_PIPC_596A: - dev->power_regs[0x08] = 0x20; - break; + case VIA_PIPC_596A: + dev->power_regs[0x08] = 0x20; + break; - case VIA_PIPC_596B: - dev->power_regs[0x08] = 0x30; - break; + case VIA_PIPC_596B: + dev->power_regs[0x08] = 0x30; + break; - case VIA_PIPC_686B: - dev->power_regs[0x08] = 0x40; - break; - } - if (dev->local == VIA_PIPC_686B) - dev->power_regs[0x34] = 0x68; - dev->power_regs[0x40] = 0x20; + case VIA_PIPC_686B: + dev->power_regs[0x08] = 0x40; + break; + } + if (dev->local == VIA_PIPC_686B) + dev->power_regs[0x34] = 0x68; + dev->power_regs[0x40] = 0x20; - dev->power_regs[0x42] = 0x50; - dev->power_regs[0x48] = 0x01; + dev->power_regs[0x42] = 0x50; + dev->power_regs[0x48] = 0x01; - if (dev->local == VIA_PIPC_686B) { - dev->power_regs[0x68] = 0x01; - dev->power_regs[0x6a] = 0x02; - } + if (dev->local == VIA_PIPC_686B) { + dev->power_regs[0x68] = 0x01; + dev->power_regs[0x6a] = 0x02; + } - if (dev->local >= VIA_PIPC_686A) - dev->power_regs[0x70] = 0x01; + if (dev->local >= VIA_PIPC_686A) + dev->power_regs[0x70] = 0x01; - if (dev->local == VIA_PIPC_596A) - dev->power_regs[0x80] = 0x01; - else if (dev->local >= VIA_PIPC_596B) - dev->power_regs[0x90] = 0x01; + if (dev->local == VIA_PIPC_596A) + dev->power_regs[0x80] = 0x01; + else if (dev->local >= VIA_PIPC_596B) + dev->power_regs[0x90] = 0x01; - /* Set up PCS I/O traps. */ - pipc_io_trap_t *trap; - for (i = 0; i <= dev->max_pcs; i++) { - trap = &dev->io_traps[TRAP_GR0 + i]; - trap->dev = dev; - trap->trap = io_trap_add(pipc_io_trap_glb, trap); - if (i & 2) { - trap->sts_reg = (uint32_t *) &dev->acpi->regs.extiotrapsts; - trap->en_reg = (uint32_t *) &dev->acpi->regs.extiotrapen; - trap->mask = 0x01 << (i & 1); - } else { - trap->sts_reg = &dev->acpi->regs.glbsts; - trap->en_reg = &dev->acpi->regs.glben; - trap->mask = 0x4000 << i; - } - } + /* Set up PCS I/O traps. */ + pipc_io_trap_t *trap; + for (i = 0; i <= dev->max_pcs; i++) { + trap = &dev->io_traps[TRAP_GR0 + i]; + trap->dev = dev; + trap->trap = io_trap_add(pipc_io_trap_glb, trap); + if (i & 2) { + trap->sts_reg = (uint32_t *) &dev->acpi->regs.extiotrapsts; + trap->en_reg = (uint32_t *) &dev->acpi->regs.extiotrapen; + trap->mask = 0x01 << (i & 1); + } else { + trap->sts_reg = &dev->acpi->regs.glbsts; + trap->en_reg = &dev->acpi->regs.glben; + trap->mask = 0x4000 << i; + } + } } /* AC97/MC97 registers. */ if (dev->local >= VIA_PIPC_686A) { - for (i = 0; i <= 1; i++) { - dev->max_func++; - dev->ac97_regs[i][0x00] = 0x06; dev->ac97_regs[i][0x01] = 0x11; - dev->ac97_regs[i][0x02] = 0x58 + (0x10 * i); dev->ac97_regs[i][0x03] = 0x30; - dev->ac97_regs[i][0x06] = 0x10 * (1 - i); dev->ac97_regs[i][0x07] = 0x02; - switch (dev->local) { - case VIA_PIPC_686A: - dev->ac97_regs[i][0x08] = (i == 0) ? 0x12 : 0x01; - break; + for (i = 0; i <= 1; i++) { + dev->max_func++; + dev->ac97_regs[i][0x00] = 0x06; + dev->ac97_regs[i][0x01] = 0x11; + dev->ac97_regs[i][0x02] = 0x58 + (0x10 * i); + dev->ac97_regs[i][0x03] = 0x30; + dev->ac97_regs[i][0x06] = 0x10 * (1 - i); + dev->ac97_regs[i][0x07] = 0x02; + switch (dev->local) { + case VIA_PIPC_686A: + dev->ac97_regs[i][0x08] = (i == 0) ? 0x12 : 0x01; + break; - case VIA_PIPC_686B: - dev->ac97_regs[i][0x08] = (i == 0) ? 0x50 : 0x30; - break; + case VIA_PIPC_686B: + dev->ac97_regs[i][0x08] = (i == 0) ? 0x50 : 0x30; + break; - case VIA_PIPC_8231: - dev->ac97_regs[i][0x08] = (i == 0) ? 0x40 : 0x20; - break; - } + case VIA_PIPC_8231: + dev->ac97_regs[i][0x08] = (i == 0) ? 0x40 : 0x20; + break; + } - if (i == 0) { - dev->ac97_regs[i][0x0a] = 0x01; - dev->ac97_regs[i][0x0b] = 0x04; - } else { - dev->ac97_regs[i][0x0a] = 0x80; - dev->ac97_regs[i][0x0b] = 0x07; - } + if (i == 0) { + dev->ac97_regs[i][0x0a] = 0x01; + dev->ac97_regs[i][0x0b] = 0x04; + } else { + dev->ac97_regs[i][0x0a] = 0x80; + dev->ac97_regs[i][0x0b] = 0x07; + } - dev->ac97_regs[i][0x10] = 0x01; - if (i == 0) { - dev->ac97_regs[i][0x14] = 0x01; - dev->ac97_regs[i][0x18] = 0x01; - } - dev->ac97_regs[i][0x1c] = 0x01; + dev->ac97_regs[i][0x10] = 0x01; + if (i == 0) { + dev->ac97_regs[i][0x14] = 0x01; + dev->ac97_regs[i][0x18] = 0x01; + } + dev->ac97_regs[i][0x1c] = 0x01; - dev->ac97_regs[i][0x3d] = 0x03; + dev->ac97_regs[i][0x3d] = 0x03; - if (i == 0) - dev->ac97_regs[i][0x40] = 0x01; + if (i == 0) + dev->ac97_regs[i][0x40] = 0x01; - dev->ac97_regs[i][0x43] = 0x1c; - dev->ac97_regs[i][0x48] = 0x01; - dev->ac97_regs[i][0x4b] = 0x02; + dev->ac97_regs[i][0x43] = 0x1c; + dev->ac97_regs[i][0x48] = 0x01; + dev->ac97_regs[i][0x4b] = 0x02; - pipc_sgd_handlers(dev, i); - pipc_codec_handlers(dev, i); - pipc_sb_handlers(dev, i); - } + pipc_sgd_handlers(dev, i); + pipc_codec_handlers(dev, i); + pipc_sb_handlers(dev, i); + } } if (dev->gameport) - gameport_remap(dev->gameport, 0x200); + gameport_remap(dev->gameport, 0x200); pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED); pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED); @@ -476,10 +491,10 @@ pipc_reset_hard(void *priv) pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED); if (dev->local <= VIA_PIPC_586B) { - pci_set_mirq_routing(PCI_MIRQ0, PCI_IRQ_DISABLED); - pci_set_mirq_routing(PCI_MIRQ1, PCI_IRQ_DISABLED); - if (dev->local == VIA_PIPC_586B) - pci_set_mirq_routing(PCI_MIRQ2, PCI_IRQ_DISABLED); + pci_set_mirq_routing(PCI_MIRQ0, PCI_IRQ_DISABLED); + pci_set_mirq_routing(PCI_MIRQ1, PCI_IRQ_DISABLED); + if (dev->local == VIA_PIPC_586B) + pci_set_mirq_routing(PCI_MIRQ2, PCI_IRQ_DISABLED); } ide_pri_disable(); @@ -489,7 +504,6 @@ pipc_reset_hard(void *priv) nvr_via_wp_set(0x00, 0x0d, dev->nvr); } - static void pipc_ide_handlers(pipc_t *dev) { @@ -499,44 +513,43 @@ pipc_ide_handlers(pipc_t *dev) ide_sec_disable(); if (dev->ide_regs[0x09] & 0x01) { - main = (dev->ide_regs[0x11] << 8) | (dev->ide_regs[0x10] & 0xf8); - side = ((dev->ide_regs[0x15] << 8) | (dev->ide_regs[0x14] & 0xfc)) + 2; + main = (dev->ide_regs[0x11] << 8) | (dev->ide_regs[0x10] & 0xf8); + side = ((dev->ide_regs[0x15] << 8) | (dev->ide_regs[0x14] & 0xfc)) + 2; } else { - main = 0x1f0; - side = 0x3f6; + main = 0x1f0; + side = 0x3f6; } ide_set_base(0, main); ide_set_side(0, side); if (dev->ide_regs[0x09] & 0x04) { - main = (dev->ide_regs[0x19] << 8) | (dev->ide_regs[0x18] & 0xf8); - side = ((dev->ide_regs[0x1d] << 8) | (dev->ide_regs[0x1c] & 0xfc)) + 2; + main = (dev->ide_regs[0x19] << 8) | (dev->ide_regs[0x18] & 0xf8); + side = ((dev->ide_regs[0x1d] << 8) | (dev->ide_regs[0x1c] & 0xfc)) + 2; } else { - main = 0x170; - side = 0x376; + main = 0x170; + side = 0x376; } ide_set_base(1, main); ide_set_side(1, side); if (dev->ide_regs[0x04] & PCI_COMMAND_IO) { - if (dev->ide_regs[0x40] & 0x02) - ide_pri_enable(); - if (dev->ide_regs[0x40] & 0x01) - ide_sec_enable(); + if (dev->ide_regs[0x40] & 0x02) + ide_pri_enable(); + if (dev->ide_regs[0x40] & 0x01) + ide_sec_enable(); } } - static void pipc_ide_irqs(pipc_t *dev) { int irq_mode[2] = { 0, 0 }; if (dev->ide_regs[0x09] & 0x01) - irq_mode[0] = (dev->ide_regs[0x3d] & 0x01); + irq_mode[0] = (dev->ide_regs[0x3d] & 0x01); if (dev->ide_regs[0x09] & 0x04) - irq_mode[1] = (dev->ide_regs[0x3d] & 0x01); + irq_mode[1] = (dev->ide_regs[0x3d] & 0x01); sff_set_irq_mode(dev->bm[0], 0, irq_mode[0]); sff_set_irq_mode(dev->bm[0], 1, irq_mode[1]); @@ -545,7 +558,6 @@ pipc_ide_irqs(pipc_t *dev) sff_set_irq_mode(dev->bm[1], 1, irq_mode[1]); } - static void pipc_bus_master_handlers(pipc_t *dev) { @@ -555,60 +567,57 @@ pipc_bus_master_handlers(pipc_t *dev) sff_bus_master_handler(dev->bm[1], (dev->ide_regs[0x04] & 1), base + 8); } - static void pipc_pcs_update(pipc_t *dev) { - uint8_t i, io_base_reg, io_mask_reg, io_mask_shift, enable; + uint8_t i, io_base_reg, io_mask_reg, io_mask_shift, enable; uint16_t io_base, io_mask; for (i = 0; i <= dev->max_pcs; i++) { - if (i & 2) { - io_base_reg = 0x8c; - io_mask_reg = 0x8a; - } else { - io_base_reg = 0x78; - io_mask_reg = 0x80; - } - io_base_reg |= (i & 1) << 1; - io_mask_shift = (i & 1) << 2; + if (i & 2) { + io_base_reg = 0x8c; + io_mask_reg = 0x8a; + } else { + io_base_reg = 0x78; + io_mask_reg = 0x80; + } + io_base_reg |= (i & 1) << 1; + io_mask_shift = (i & 1) << 2; - if (dev->local <= VIA_PIPC_596B) - enable = dev->pci_isa_regs[0x76] & (0x10 << i); - else - enable = dev->pci_isa_regs[0x8b] & (0x01 << i); + if (dev->local <= VIA_PIPC_596B) + enable = dev->pci_isa_regs[0x76] & (0x10 << i); + else + enable = dev->pci_isa_regs[0x8b] & (0x01 << i); - io_base = dev->pci_isa_regs[io_base_reg] | (dev->pci_isa_regs[io_base_reg | 1] << 8); - io_mask = (dev->pci_isa_regs[io_mask_reg] >> io_mask_shift) & 0x000f; + io_base = dev->pci_isa_regs[io_base_reg] | (dev->pci_isa_regs[io_base_reg | 1] << 8); + io_mask = (dev->pci_isa_regs[io_mask_reg] >> io_mask_shift) & 0x000f; - pipc_log("PIPC: Mapping PCS%d to %04X-%04X (enable %d)\n", i, io_base, io_base + io_mask, enable); - io_trap_remap(dev->io_traps[TRAP_GR0 + i].trap, enable, io_base & ~io_mask, io_mask + 1); + pipc_log("PIPC: Mapping PCS%d to %04X-%04X (enable %d)\n", i, io_base, io_base + io_mask, enable); + io_trap_remap(dev->io_traps[TRAP_GR0 + i].trap, enable, io_base & ~io_mask, io_mask + 1); } } - static void pipc_trap_update_paden(pipc_t *dev, uint8_t trap_id, - uint32_t paden_mask, uint8_t enable, - uint16_t addr, uint16_t size) + uint32_t paden_mask, uint8_t enable, + uint16_t addr, uint16_t size) { pipc_io_trap_t *trap = &dev->io_traps[trap_id]; - enable = (dev->acpi->regs.paden & paden_mask) && enable; + enable = (dev->acpi->regs.paden & paden_mask) && enable; /* Set up Primary Activity Detect I/O traps dynamically. */ if (enable && !trap->trap) { - trap->dev = dev; - trap->trap = io_trap_add(pipc_io_trap_pact, trap); - trap->sts_reg = &dev->acpi->regs.padsts; - trap->en_reg = &dev->acpi->regs.paden; - trap->mask = paden_mask; + trap->dev = dev; + trap->trap = io_trap_add(pipc_io_trap_pact, trap); + trap->sts_reg = &dev->acpi->regs.padsts; + trap->en_reg = &dev->acpi->regs.paden; + trap->mask = paden_mask; } /* Remap I/O trap. */ io_trap_remap(trap->trap, enable, addr, size); } - static void pipc_trap_update_586(void *priv) { @@ -634,12 +643,11 @@ pipc_trap_update_586(void *priv) pipc_trap_update_paden(dev, TRAP_KBC, 0x00000080, 1, 0x60, 1); } - static void pipc_trap_update_596(void *priv) { pipc_t *dev = (pipc_t *) priv; - int i; + int i; /* TRAP_DRQ (00000001) and TRAP_PIRQ (00000002) not implemented. */ @@ -671,13 +679,13 @@ pipc_trap_update_596(void *priv) It's better to be safe and cover all of them than to assume Intel-like behavior (one range). */ for (i = 0; i < 3; i++) { - pipc_trap_update_paden(dev, TRAP_AUD_MIDI_0 + i, - 0x00000400, (dev->local <= VIA_PIPC_596B) || (dev->power_regs[0x40] & 0x01), - 0x300 + (0x10 * i), 4); + pipc_trap_update_paden(dev, TRAP_AUD_MIDI_0 + i, + 0x00000400, (dev->local <= VIA_PIPC_596B) || (dev->power_regs[0x40] & 0x01), + 0x300 + (0x10 * i), 4); - pipc_trap_update_paden(dev, TRAP_AUD_SB_0 + i, - 0x00000400, (dev->local <= VIA_PIPC_596B) || (dev->power_regs[0x40] & 0x02), - 0x220 + (0x20 * i), 20); + pipc_trap_update_paden(dev, TRAP_AUD_SB_0 + i, + 0x00000400, (dev->local <= VIA_PIPC_596B) || (dev->power_regs[0x40] & 0x02), + 0x220 + (0x20 * i), 20); } pipc_trap_update_paden(dev, TRAP_AUD_GAME, 0x00000400, (dev->local <= VIA_PIPC_596B) || (dev->power_regs[0x40] & 0x04), 0x200, 8); @@ -688,33 +696,30 @@ pipc_trap_update_596(void *priv) pipc_trap_update_paden(dev, TRAP_AUD_WSS_3, 0x00000400, (dev->local <= VIA_PIPC_596B) || (dev->power_regs[0x40] & 0x08), 0xf40, 8); } - static void pipc_sgd_handlers(pipc_t *dev, uint8_t modem) { if (!dev->ac97) - return; + return; if (modem) - ac97_via_remap_modem_sgd(dev->ac97, dev->ac97_regs[1][0x11] << 8, dev->ac97_regs[1][0x04] & PCI_COMMAND_IO); + ac97_via_remap_modem_sgd(dev->ac97, dev->ac97_regs[1][0x11] << 8, dev->ac97_regs[1][0x04] & PCI_COMMAND_IO); else - ac97_via_remap_audio_sgd(dev->ac97, dev->ac97_regs[0][0x11] << 8, dev->ac97_regs[0][0x04] & PCI_COMMAND_IO); + ac97_via_remap_audio_sgd(dev->ac97, dev->ac97_regs[0][0x11] << 8, dev->ac97_regs[0][0x04] & PCI_COMMAND_IO); } - static void pipc_codec_handlers(pipc_t *dev, uint8_t modem) { if (!dev->ac97) - return; + return; if (modem) - ac97_via_remap_modem_codec(dev->ac97, dev->ac97_regs[1][0x1d] << 8, dev->ac97_regs[1][0x04] & PCI_COMMAND_IO); + ac97_via_remap_modem_codec(dev->ac97, dev->ac97_regs[1][0x1d] << 8, dev->ac97_regs[1][0x04] & PCI_COMMAND_IO); else - ac97_via_remap_audio_codec(dev->ac97, dev->ac97_regs[0][0x1d] << 8, dev->ac97_regs[0][0x04] & PCI_COMMAND_IO); + ac97_via_remap_audio_codec(dev->ac97, dev->ac97_regs[0][0x1d] << 8, dev->ac97_regs[0][0x04] & PCI_COMMAND_IO); } - static uint8_t pipc_fmnmi_read(uint16_t addr, void *priv) { @@ -725,34 +730,32 @@ pipc_fmnmi_read(uint16_t addr, void *priv) #ifdef VIA_PIPC_FM_EMULATION /* Clear NMI/SMI if enabled. */ - if (dev->ac97_regs[0][0x48] & 0x01) { - if (dev->ac97_regs[0][0x48] & 0x04) - smi_line = 0; - else - nmi = 0; + if (dev->ac97_regs[0][0x48] & 0x01) { + if (dev->ac97_regs[0][0x48] & 0x04) + smi_line = 0; + else + nmi = 0; } #endif return ret; } - static void pipc_fmnmi_handlers(pipc_t *dev, uint8_t modem) { if (!dev->ac97 || modem) - return; + return; if (dev->fmnmi_base) - io_removehandler(dev->fmnmi_base, 4, pipc_fmnmi_read, NULL, NULL, NULL, NULL, NULL, dev); + io_removehandler(dev->fmnmi_base, 4, pipc_fmnmi_read, NULL, NULL, NULL, NULL, NULL, dev); dev->fmnmi_base = (dev->ac97_regs[0][0x15] << 8) | (dev->ac97_regs[0][0x14] & 0xfc); if (dev->fmnmi_base && (dev->ac97_regs[0][0x04] & PCI_COMMAND_IO)) - io_sethandler(dev->fmnmi_base, 4, pipc_fmnmi_read, NULL, NULL, NULL, NULL, NULL, dev); + io_sethandler(dev->fmnmi_base, 4, pipc_fmnmi_read, NULL, NULL, NULL, NULL, NULL, dev); } - static uint8_t pipc_fm_read(uint16_t addr, void *priv) { @@ -768,7 +771,6 @@ pipc_fm_read(uint16_t addr, void *priv) return ret; } - static void pipc_fm_write(uint16_t addr, uint8_t val, void *priv) { @@ -780,36 +782,35 @@ pipc_fm_write(uint16_t addr, uint8_t val, void *priv) /* Real 686B only updates the bank ID register when writing to the index port, and only fires NMI/SMI when writing to the data port. */ if (!(addr & 0x01)) { - dev->fmnmi_regs[0x00] = (addr & 0x02) ? 0x02 : 0x01; - dev->fmnmi_regs[0x01] = val; + dev->fmnmi_regs[0x00] = (addr & 0x02) ? 0x02 : 0x01; + dev->fmnmi_regs[0x01] = val; } else { - dev->fmnmi_regs[0x02] = val; + dev->fmnmi_regs[0x02] = val; - /* Fire NMI/SMI if enabled. */ - if (dev->ac97_regs[0][0x48] & 0x01) { - if (dev->ac97_regs[0][0x48] & 0x04) - smi_raise(); - else - nmi_raise(); - } + /* Fire NMI/SMI if enabled. */ + if (dev->ac97_regs[0][0x48] & 0x01) { + if (dev->ac97_regs[0][0x48] & 0x04) + smi_raise(); + else + nmi_raise(); + } } #else dev->sb->opl.write(addr, val, dev->sb->opl.priv); #endif } - static void pipc_sb_handlers(pipc_t *dev, uint8_t modem) { if (!dev->ac97 || modem) - return; + return; sb_dsp_setaddr(&dev->sb->dsp, 0); if (dev->sb_base) { - io_removehandler(dev->sb_base, 4, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); - io_removehandler(dev->sb_base + 8, 2, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); - io_removehandler(dev->sb_base + 4, 2, sb_ct1345_mixer_read, NULL, NULL, sb_ct1345_mixer_write, NULL, NULL, dev->sb); + io_removehandler(dev->sb_base, 4, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); + io_removehandler(dev->sb_base + 8, 2, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); + io_removehandler(dev->sb_base + 4, 2, sb_ct1345_mixer_read, NULL, NULL, sb_ct1345_mixer_write, NULL, NULL, dev->sb); } mpu401_change_addr(dev->sb->mpu, 0); @@ -818,105 +819,101 @@ pipc_sb_handlers(pipc_t *dev, uint8_t modem) io_removehandler(0x388, 4, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); if (dev->ac97_regs[0][0x42] & 0x01) { - dev->sb_base = 0x220 + (0x20 * (dev->ac97_regs[0][0x43] & 0x03)); - sb_dsp_setaddr(&dev->sb->dsp, dev->sb_base); - if (dev->ac97_regs[0][0x42] & 0x04) { - io_sethandler(dev->sb_base, 4, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); - io_sethandler(dev->sb_base + 8, 2, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); - } - io_sethandler(dev->sb_base + 4, 2, sb_ct1345_mixer_read, NULL, NULL, sb_ct1345_mixer_write, NULL, NULL, dev->sb); + dev->sb_base = 0x220 + (0x20 * (dev->ac97_regs[0][0x43] & 0x03)); + sb_dsp_setaddr(&dev->sb->dsp, dev->sb_base); + if (dev->ac97_regs[0][0x42] & 0x04) { + io_sethandler(dev->sb_base, 4, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); + io_sethandler(dev->sb_base + 8, 2, dev->sb->opl.read, NULL, NULL, dev->sb->opl.write, NULL, NULL, dev->sb->opl.priv); + } + io_sethandler(dev->sb_base + 4, 2, sb_ct1345_mixer_read, NULL, NULL, sb_ct1345_mixer_write, NULL, NULL, dev->sb); - uint8_t irq = 5 + (2 * ((dev->ac97_regs[0][0x43] >> 6) & 0x03)); - sb_dsp_setirq(&dev->sb->dsp, (irq == 11) ? 10 : irq); + uint8_t irq = 5 + (2 * ((dev->ac97_regs[0][0x43] >> 6) & 0x03)); + sb_dsp_setirq(&dev->sb->dsp, (irq == 11) ? 10 : irq); - sb_dsp_setdma8(&dev->sb->dsp, (dev->ac97_regs[0][0x43] >> 4) & 0x03); + sb_dsp_setdma8(&dev->sb->dsp, (dev->ac97_regs[0][0x43] >> 4) & 0x03); - /* Set up CD audio filter. This might not actually work if VIAUDIO writes to CD volume through AC97. */ - sound_set_cd_audio_filter(sbpro_filter_cd_audio, dev->sb); + /* Set up CD audio filter. This might not actually work if VIAUDIO writes to CD volume through AC97. */ + sound_set_cd_audio_filter(sbpro_filter_cd_audio, dev->sb); } if (dev->ac97_regs[0][0x42] & 0x02) { - /* BAR 2 is a mess. The MPU and game port remapping registers that VIA claims to be there don't - seem to actually exist on a real 686B. Remapping the MPU to BAR 2 itself does work, though. */ - if (dev->ac97_regs[0][0x42] & 0x80) - mpu401_change_addr(dev->sb->mpu, (dev->ac97_regs[0][0x19] << 8) | (dev->ac97_regs[0][0x18] & 0xfc)); - else - mpu401_change_addr(dev->sb->mpu, 0x300 | ((dev->ac97_regs[0][0x43] << 2) & 0x30)); + /* BAR 2 is a mess. The MPU and game port remapping registers that VIA claims to be there don't + seem to actually exist on a real 686B. Remapping the MPU to BAR 2 itself does work, though. */ + if (dev->ac97_regs[0][0x42] & 0x80) + mpu401_change_addr(dev->sb->mpu, (dev->ac97_regs[0][0x19] << 8) | (dev->ac97_regs[0][0x18] & 0xfc)); + else + mpu401_change_addr(dev->sb->mpu, 0x300 | ((dev->ac97_regs[0][0x43] << 2) & 0x30)); if (!(dev->ac97_regs[0][0x42] & 0x40)) - mpu401_setirq(dev->sb->mpu, dev->sb->dsp.sb_irqnum); + mpu401_setirq(dev->sb->mpu, dev->sb->dsp.sb_irqnum); } if (dev->ac97_regs[0][0x42] & 0x04) { - io_sethandler(0x388, 4, pipc_fm_read, NULL, NULL, pipc_fm_write, NULL, NULL, dev); + io_sethandler(0x388, 4, pipc_fm_read, NULL, NULL, pipc_fm_write, NULL, NULL, dev); } } - static uint8_t pipc_read(int func, int addr, void *priv) { pipc_t *dev = (pipc_t *) priv; uint8_t ret = 0xff; - int c; + int c; uint8_t pm_func = dev->usb[1] ? 4 : 3; if (func > dev->max_func) - return ret; - else if (func == 0) { /* PCI-ISA bridge */ - if ((addr >= 0x60) && (addr <= 0x6f)) { /* DMA shadow registers */ - c = (addr & 0x0e) >> 1; - if (addr & 0x01) - ret = (dma[c].ab & 0x0000ff00) >> 8; - else { - ret = (dma[c].ab & 0x000000f0); - ret |= (!!(dma_e & (1 << c)) << 3); - } - } else - ret = dev->pci_isa_regs[addr]; - } - else if ((func == 1) && !(dev->pci_isa_regs[0x48] & 0x02)) { /* IDE */ - ret = dev->ide_regs[addr]; - if ((addr >= 0x50) && (addr <= 0x53)) { /* UDMA timing registers */ - /* Set or clear bit 5 according to UDMA mode. Documentation is unclear, but a real - 686B does set bit 5 when UDMA is enabled through the method specified in bit 7. */ - c = 0x53 - addr; - if (ret & 0x80) /* bit 7 set = use bit 6 */ - c = ret & 0x40; - else if (ide_drives[c]) /* bit 7 clear = use SET FEATURES mode */ - c = (ide_drives[c]->mdma_mode & 0x300) == 0x300; - else /* no drive here */ - c = 0; - /* 586A/B datasheet claims bit 5 must be clear for UDMA, unlike later models where - it must be set, but the Windows driver doesn't care and always checks if it's set. */ - if (c) - ret |= 0x20; - else - ret &= ~0x20; - } - } - else if ((func < pm_func) && !((func == 2) ? (dev->pci_isa_regs[0x48] & 0x04) : (dev->pci_isa_regs[0x85] & 0x10))) /* USB */ - ret = dev->usb_regs[func - 2][addr]; + return ret; + else if (func == 0) { /* PCI-ISA bridge */ + if ((addr >= 0x60) && (addr <= 0x6f)) { /* DMA shadow registers */ + c = (addr & 0x0e) >> 1; + if (addr & 0x01) + ret = (dma[c].ab & 0x0000ff00) >> 8; + else { + ret = (dma[c].ab & 0x000000f0); + ret |= (!!(dma_e & (1 << c)) << 3); + } + } else + ret = dev->pci_isa_regs[addr]; + } else if ((func == 1) && !(dev->pci_isa_regs[0x48] & 0x02)) { /* IDE */ + ret = dev->ide_regs[addr]; + if ((addr >= 0x50) && (addr <= 0x53)) { /* UDMA timing registers */ + /* Set or clear bit 5 according to UDMA mode. Documentation is unclear, but a real + 686B does set bit 5 when UDMA is enabled through the method specified in bit 7. */ + c = 0x53 - addr; + if (ret & 0x80) /* bit 7 set = use bit 6 */ + c = ret & 0x40; + else if (ide_drives[c]) /* bit 7 clear = use SET FEATURES mode */ + c = (ide_drives[c]->mdma_mode & 0x300) == 0x300; + else /* no drive here */ + c = 0; + /* 586A/B datasheet claims bit 5 must be clear for UDMA, unlike later models where + it must be set, but the Windows driver doesn't care and always checks if it's set. */ + if (c) + ret |= 0x20; + else + ret &= ~0x20; + } + } else if ((func < pm_func) && !((func == 2) ? (dev->pci_isa_regs[0x48] & 0x04) : (dev->pci_isa_regs[0x85] & 0x10))) /* USB */ + ret = dev->usb_regs[func - 2][addr]; else if (func == pm_func) { /* Power */ - ret = dev->power_regs[addr]; - if (addr == 0x42) { - if (dev->nvr->regs[0x0d] & 0x80) - ret |= 0x10; - else - ret &= ~0x10; - } else if ((addr == 0xd2) && (dev->local == VIA_PIPC_686B)) { - /* SMBus clock select bit. */ - if (dev->smbus->clock == 16384) - ret &= ~0x10; - else - ret |= 0x10; - } - } - else if ((func <= (pm_func + 2)) && !(dev->pci_isa_regs[0x85] & ((func == (pm_func + 1)) ? 0x04 : 0x08))) { /* AC97 / MC97 */ - if (addr == 0x40) - ret = ac97_via_read_status(dev->ac97, func - pm_func - 1); - else - ret = dev->ac97_regs[func - pm_func - 1][addr]; + ret = dev->power_regs[addr]; + if (addr == 0x42) { + if (dev->nvr->regs[0x0d] & 0x80) + ret |= 0x10; + else + ret &= ~0x10; + } else if ((addr == 0xd2) && (dev->local == VIA_PIPC_686B)) { + /* SMBus clock select bit. */ + if (dev->smbus->clock == 16384) + ret &= ~0x10; + else + ret |= 0x10; + } + } else if ((func <= (pm_func + 2)) && !(dev->pci_isa_regs[0x85] & ((func == (pm_func + 1)) ? 0x04 : 0x08))) { /* AC97 / MC97 */ + if (addr == 0x40) + ret = ac97_via_read_status(dev->ac97, func - pm_func - 1); + else + ret = dev->ac97_regs[func - pm_func - 1][addr]; } pipc_log("PIPC: read(%d, %02X) = %02X\n", func, addr, ret); @@ -924,587 +921,611 @@ pipc_read(int func, int addr, void *priv) return ret; } - static void nvr_update_io_mapping(pipc_t *dev) { if (dev->nvr_enabled) - nvr_at_handler(0, 0x0074, dev->nvr); + nvr_at_handler(0, 0x0074, dev->nvr); if ((dev->pci_isa_regs[0x5b] & 0x02) || (dev->pci_isa_regs[0x48] & 0x08)) - nvr_at_handler(1, 0x0074, dev->nvr); + nvr_at_handler(1, 0x0074, dev->nvr); } - static void usb_update_io_mapping(pipc_t *dev, int func) { uhci_update_io_mapping(dev->usb[func - 2], dev->usb_regs[func - 2][0x20] & ~0x1f, dev->usb_regs[func - 2][0x21], dev->usb_regs[func - 2][PCI_REG_COMMAND] & PCI_COMMAND_IO); } - static void pipc_ddma_update(pipc_t *dev, int addr) { uint32_t base; if (dev->local >= VIA_PIPC_8231) - return; + return; base = (dev->pci_isa_regs[addr] & 0xf0) | (((uint32_t) dev->pci_isa_regs[addr | 0x01]) << 8); ddma_update_io_mapping(dev->ddma, (addr & 0x0e) >> 1, (dev->pci_isa_regs[addr] & 0xf0), dev->pci_isa_regs[addr | 0x01], (dev->pci_isa_regs[addr] & 0x08) && (base != 0x0000)); } - static void pipc_write(int func, int addr, uint8_t val, void *priv) { pipc_t *dev = (pipc_t *) priv; - int c; + int c; uint8_t pm_func = dev->usb[1] ? 4 : 3; if (func > dev->max_func) - return; + return; pipc_log("PIPC: write(%d, %02X, %02X)\n", func, addr, val); if (func == 0) { /* PCI-ISA bridge */ - /* Read-only addresses. */ - if ((addr < 4) || (addr == 5) || ((addr >= 8) && (addr < 0x40)) || (addr == 0x49) || (addr == 0x4b) || - (addr == 0x53) || ((addr >= 0x5d) && (addr < 0x5f)) || (addr >= 0x90)) - return; + /* Read-only addresses. */ + if ((addr < 4) || (addr == 5) || ((addr >= 8) && (addr < 0x40)) || (addr == 0x49) || (addr == 0x4b) || (addr == 0x53) || ((addr >= 0x5d) && (addr < 0x5f)) || (addr >= 0x90)) + return; - if ((dev->local <= VIA_PIPC_586A) && ((addr >= 0x58) && (addr < 0x80))) - return; + if ((dev->local <= VIA_PIPC_586A) && ((addr >= 0x58) && (addr < 0x80))) + return; - if ((dev->local <= VIA_PIPC_586B) && (addr >= 0x74)) - return; + if ((dev->local <= VIA_PIPC_586B) && (addr >= 0x74)) + return; - if ((dev->local <= VIA_PIPC_596A) && ((addr == 0x51) || (addr == 0x52) || (addr == 0x5f) || (addr == 0x85) || - (addr == 0x86) || ((addr >= 0x8a) && (addr < 0x90)))) - return; + if ((dev->local <= VIA_PIPC_596A) && ((addr == 0x51) || (addr == 0x52) || (addr == 0x5f) || (addr == 0x85) || (addr == 0x86) || ((addr >= 0x8a) && (addr < 0x90)))) + return; - switch (addr) { - case 0x04: - dev->pci_isa_regs[0x04] = (val & 8) | 7; - break; - case 0x07: - dev->pci_isa_regs[0x07] &= ~(val & 0xb0); - break; + switch (addr) { + case 0x04: + dev->pci_isa_regs[0x04] = (val & 8) | 7; + break; + case 0x07: + dev->pci_isa_regs[0x07] &= ~(val & 0xb0); + break; - case 0x42: - dev->pci_isa_regs[0x42] = val & 0xcf; + case 0x42: + dev->pci_isa_regs[0x42] = val & 0xcf; - switch (val & 0xf) { - /* Divisors on the PCI clock. */ - case 0x8: - cpu_set_isa_pci_div(3); - break; + switch (val & 0xf) { + /* Divisors on the PCI clock. */ + case 0x8: + cpu_set_isa_pci_div(3); + break; - case 0x9: - cpu_set_isa_pci_div(2); - break; + case 0x9: + cpu_set_isa_pci_div(2); + break; - /* case 0xa: same as default */ + /* case 0xa: same as default */ - case 0xb: - cpu_set_isa_pci_div(6); - break; + case 0xb: + cpu_set_isa_pci_div(6); + break; - case 0xc: - cpu_set_isa_pci_div(5); - break; + case 0xc: + cpu_set_isa_pci_div(5); + break; - case 0xd: - cpu_set_isa_pci_div(10); - break; + case 0xd: + cpu_set_isa_pci_div(10); + break; - case 0xe: - cpu_set_isa_pci_div(12); - break; + case 0xe: + cpu_set_isa_pci_div(12); + break; - /* Half oscillator clock. */ - case 0xf: - cpu_set_isa_speed(7159091); - break; + /* Half oscillator clock. */ + case 0xf: + cpu_set_isa_speed(7159091); + break; - /* Divisor 4 on the PCI clock whenever bit 3 is clear. */ - default: - cpu_set_isa_pci_div(4); - break; - } + /* Divisor 4 on the PCI clock whenever bit 3 is clear. */ + default: + cpu_set_isa_pci_div(4); + break; + } - break; + break; - case 0x47: - if (val & 0x01) - trc_write(0x0047, (val & 0x80) ? 0x06 : 0x04, NULL); - pic_set_shadow(!!(val & 0x10)); - pic_elcr_io_handler(!!(val & 0x20)); - dev->pci_isa_regs[0x47] = val & 0xfe; - break; - case 0x48: - dev->pci_isa_regs[0x48] = val; - nvr_update_io_mapping(dev); - break; + case 0x47: + if (val & 0x01) + trc_write(0x0047, (val & 0x80) ? 0x06 : 0x04, NULL); + pic_set_shadow(!!(val & 0x10)); + pic_elcr_io_handler(!!(val & 0x20)); + dev->pci_isa_regs[0x47] = val & 0xfe; + break; + case 0x48: + dev->pci_isa_regs[0x48] = val; + nvr_update_io_mapping(dev); + break; - case 0x50: case 0x51: case 0x52: case 0x85: - dev->pci_isa_regs[addr] = val; - /* Forward Super I/O-related registers to sio_vt82c686.c */ - if (dev->sio) - vt82c686_sio_write(addr, val, dev->sio); - break; + case 0x50: + case 0x51: + case 0x52: + case 0x85: + dev->pci_isa_regs[addr] = val; + /* Forward Super I/O-related registers to sio_vt82c686.c */ + if (dev->sio) + vt82c686_sio_write(addr, val, dev->sio); + break; - case 0x54: - pci_set_irq_level(PCI_INTA, !(val & 8)); - pci_set_irq_level(PCI_INTB, !(val & 4)); - pci_set_irq_level(PCI_INTC, !(val & 2)); - pci_set_irq_level(PCI_INTD, !(val & 1)); - dev->pci_isa_regs[0x54] = val & 0x0f; - break; - case 0x55: - pipc_log("PIPC: Steering PIRQ%c to IRQ %d\n", (dev->local >= VIA_PIPC_596A) ? 'A' : 'D', val >> 4); - pci_set_irq_routing((dev->local >= VIA_PIPC_596A) ? PCI_INTA : PCI_INTD, (val & 0xf0) ? (val >> 4) : PCI_IRQ_DISABLED); - if (dev->local <= VIA_PIPC_586B) { - pipc_log("PIPC: Steering MIRQ0 to IRQ %d\n", val & 0x0f); - pci_set_mirq_routing(PCI_MIRQ0, (val & 0x0f) ? (val & 0x0f) : PCI_IRQ_DISABLED); - } - dev->pci_isa_regs[0x55] = val; - break; - case 0x56: - pipc_log("PIPC: Steering PIRQ%c to IRQ %d\n", (dev->local >= VIA_PIPC_596A) ? 'C' : 'A', val >> 4); - pipc_log("PIPC: Steering PIRQB to IRQ %d\n", val & 0x0f); - pci_set_irq_routing((dev->local >= VIA_PIPC_596A) ? PCI_INTC : PCI_INTA, (val & 0xf0) ? (val >> 4) : PCI_IRQ_DISABLED); - pci_set_irq_routing(PCI_INTB, (val & 0x0f) ? (val & 0x0f) : PCI_IRQ_DISABLED); - dev->pci_isa_regs[0x56] = val; - break; - case 0x57: - pipc_log("PIPC: Steering PIRQ%c to IRQ %d\n", (dev->local >= VIA_PIPC_596A) ? 'D' : 'C', val >> 4); - pci_set_irq_routing((dev->local >= VIA_PIPC_596A) ? PCI_INTD : PCI_INTC, (val & 0xf0) ? (val >> 4) : PCI_IRQ_DISABLED); - if (dev->local <= VIA_PIPC_586B) { - pipc_log("PIPC: Steering MIRQ1 to IRQ %d\n", val & 0x0f); - pci_set_mirq_routing(PCI_MIRQ1, (val & 0x0f) ? (val & 0x0f) : PCI_IRQ_DISABLED); - } - dev->pci_isa_regs[0x57] = val; - break; - case 0x58: - if (dev->local == VIA_PIPC_586B) { - pipc_log("PIPC: Steering MIRQ2 to IRQ %d\n", val & 0x0f); - pci_set_mirq_routing(PCI_MIRQ2, (val & 0x0f) ? (val & 0x0f) : PCI_IRQ_DISABLED); - } - dev->pci_isa_regs[0x58] = val; - break; - case 0x5b: - dev->pci_isa_regs[0x5b] = val; - nvr_update_io_mapping(dev); - break; + case 0x54: + pci_set_irq_level(PCI_INTA, !(val & 8)); + pci_set_irq_level(PCI_INTB, !(val & 4)); + pci_set_irq_level(PCI_INTC, !(val & 2)); + pci_set_irq_level(PCI_INTD, !(val & 1)); + dev->pci_isa_regs[0x54] = val & 0x0f; + break; + case 0x55: + pipc_log("PIPC: Steering PIRQ%c to IRQ %d\n", (dev->local >= VIA_PIPC_596A) ? 'A' : 'D', val >> 4); + pci_set_irq_routing((dev->local >= VIA_PIPC_596A) ? PCI_INTA : PCI_INTD, (val & 0xf0) ? (val >> 4) : PCI_IRQ_DISABLED); + if (dev->local <= VIA_PIPC_586B) { + pipc_log("PIPC: Steering MIRQ0 to IRQ %d\n", val & 0x0f); + pci_set_mirq_routing(PCI_MIRQ0, (val & 0x0f) ? (val & 0x0f) : PCI_IRQ_DISABLED); + } + dev->pci_isa_regs[0x55] = val; + break; + case 0x56: + pipc_log("PIPC: Steering PIRQ%c to IRQ %d\n", (dev->local >= VIA_PIPC_596A) ? 'C' : 'A', val >> 4); + pipc_log("PIPC: Steering PIRQB to IRQ %d\n", val & 0x0f); + pci_set_irq_routing((dev->local >= VIA_PIPC_596A) ? PCI_INTC : PCI_INTA, (val & 0xf0) ? (val >> 4) : PCI_IRQ_DISABLED); + pci_set_irq_routing(PCI_INTB, (val & 0x0f) ? (val & 0x0f) : PCI_IRQ_DISABLED); + dev->pci_isa_regs[0x56] = val; + break; + case 0x57: + pipc_log("PIPC: Steering PIRQ%c to IRQ %d\n", (dev->local >= VIA_PIPC_596A) ? 'D' : 'C', val >> 4); + pci_set_irq_routing((dev->local >= VIA_PIPC_596A) ? PCI_INTD : PCI_INTC, (val & 0xf0) ? (val >> 4) : PCI_IRQ_DISABLED); + if (dev->local <= VIA_PIPC_586B) { + pipc_log("PIPC: Steering MIRQ1 to IRQ %d\n", val & 0x0f); + pci_set_mirq_routing(PCI_MIRQ1, (val & 0x0f) ? (val & 0x0f) : PCI_IRQ_DISABLED); + } + dev->pci_isa_regs[0x57] = val; + break; + case 0x58: + if (dev->local == VIA_PIPC_586B) { + pipc_log("PIPC: Steering MIRQ2 to IRQ %d\n", val & 0x0f); + pci_set_mirq_routing(PCI_MIRQ2, (val & 0x0f) ? (val & 0x0f) : PCI_IRQ_DISABLED); + } + dev->pci_isa_regs[0x58] = val; + break; + case 0x5b: + dev->pci_isa_regs[0x5b] = val; + nvr_update_io_mapping(dev); + break; - case 0x60: case 0x62: case 0x64: case 0x66: - case 0x6a: case 0x6c: case 0x6e: - dev->pci_isa_regs[addr] = val & 0xf8; - pipc_ddma_update(dev, addr); - break; - case 0x61: case 0x63: case 0x65: case 0x67: - case 0x6b: case 0x6d: case 0x6f: - dev->pci_isa_regs[addr] = val; - pipc_ddma_update(dev, addr & 0xfe); - break; + case 0x60: + case 0x62: + case 0x64: + case 0x66: + case 0x6a: + case 0x6c: + case 0x6e: + dev->pci_isa_regs[addr] = val & 0xf8; + pipc_ddma_update(dev, addr); + break; + case 0x61: + case 0x63: + case 0x65: + case 0x67: + case 0x6b: + case 0x6d: + case 0x6f: + dev->pci_isa_regs[addr] = val; + pipc_ddma_update(dev, addr & 0xfe); + break; - case 0x70: case 0x71: case 0x72: case 0x73: - dev->pci_isa_regs[(addr - 0x44)] = val; - break; + case 0x70: + case 0x71: + case 0x72: + case 0x73: + dev->pci_isa_regs[(addr - 0x44)] = val; + break; - case 0x74: case 0x8b: - case 0x78: case 0x79: case 0x7a: case 0x7b: - case 0x8c: case 0x8d: case 0x8e: case 0x8f: - case 0x80: case 0x8a: - dev->pci_isa_regs[addr] = val; - pipc_pcs_update(dev); - break; + case 0x74: + case 0x8b: + case 0x78: + case 0x79: + case 0x7a: + case 0x7b: + case 0x8c: + case 0x8d: + case 0x8e: + case 0x8f: + case 0x80: + case 0x8a: + dev->pci_isa_regs[addr] = val; + pipc_pcs_update(dev); + break; - case 0x77: - if ((dev->local >= VIA_PIPC_686A) && (val & 0x10)) - pclog("PIPC: Warning: Internal I/O APIC enabled.\n"); - nvr_via_wp_set(!!(val & 0x04), 0x32, dev->nvr); - nvr_via_wp_set(!!(val & 0x02), 0x0d, dev->nvr); - break; + case 0x77: + if ((dev->local >= VIA_PIPC_686A) && (val & 0x10)) + pclog("PIPC: Warning: Internal I/O APIC enabled.\n"); + nvr_via_wp_set(!!(val & 0x04), 0x32, dev->nvr); + nvr_via_wp_set(!!(val & 0x02), 0x0d, dev->nvr); + break; - default: - dev->pci_isa_regs[addr] = val; - break; - } + default: + dev->pci_isa_regs[addr] = val; + break; + } } else if (func == 1) { /* IDE */ - /* Read-only addresses. */ - if ((addr < 4) || (addr == 5) || (addr == 8) || ((addr >= 0xa) && (addr < 0x0d)) || - ((addr >= 0x0e) && (addr < 0x10)) || ((addr >= 0x12) && (addr < 0x13)) || - ((addr >= 0x16) && (addr < 0x17)) || ((addr >= 0x1a) && (addr < 0x1b)) || - ((addr >= 0x1e) && (addr < 0x1f)) || ((addr >= 0x22) && (addr < 0x3c)) || - ((addr >= 0x3e) && (addr < 0x40)) || ((addr >= 0x55) && (addr < 0x60)) || - ((addr >= 0x62) && (addr < 0x68)) || ((addr >= 0x6a) && (addr < 0x70)) || - (addr == 0x72) || (addr == 0x73) || (addr == 0x76) || (addr == 0x77) || - (addr == 0x7a) || (addr == 0x7b) || (addr == 0x7e) || (addr == 0x7f) || - ((addr >= 0x84) && (addr < 0x88)) || (addr >= 0x8c)) - return; + /* Read-only addresses. */ + if ((addr < 4) || (addr == 5) || (addr == 8) || ((addr >= 0xa) && (addr < 0x0d)) || ((addr >= 0x0e) && (addr < 0x10)) || ((addr >= 0x12) && (addr < 0x13)) || ((addr >= 0x16) && (addr < 0x17)) || ((addr >= 0x1a) && (addr < 0x1b)) || ((addr >= 0x1e) && (addr < 0x1f)) || ((addr >= 0x22) && (addr < 0x3c)) || ((addr >= 0x3e) && (addr < 0x40)) || ((addr >= 0x55) && (addr < 0x60)) || ((addr >= 0x62) && (addr < 0x68)) || ((addr >= 0x6a) && (addr < 0x70)) || (addr == 0x72) || (addr == 0x73) || (addr == 0x76) || (addr == 0x77) || (addr == 0x7a) || (addr == 0x7b) || (addr == 0x7e) || (addr == 0x7f) || ((addr >= 0x84) && (addr < 0x88)) || (addr >= 0x8c)) + return; - if ((dev->local <= VIA_PIPC_586B) && ((addr == 0x54) || (addr >= 0x70))) - return; + if ((dev->local <= VIA_PIPC_586B) && ((addr == 0x54) || (addr >= 0x70))) + return; - /* Check disable bit. */ - if (dev->pci_isa_regs[0x48] & 0x02) - return; + /* Check disable bit. */ + if (dev->pci_isa_regs[0x48] & 0x02) + return; - switch (addr) { - case 0x04: - dev->ide_regs[0x04] = val & 0x85; - pipc_ide_handlers(dev); - pipc_bus_master_handlers(dev); - break; - case 0x07: - dev->ide_regs[0x07] &= ~(val & 0xf1); - break; + switch (addr) { + case 0x04: + dev->ide_regs[0x04] = val & 0x85; + pipc_ide_handlers(dev); + pipc_bus_master_handlers(dev); + break; + case 0x07: + dev->ide_regs[0x07] &= ~(val & 0xf1); + break; - case 0x09: - dev->ide_regs[0x09] = (val & 0x05) | 0x8a; - pipc_ide_handlers(dev); - pipc_ide_irqs(dev); - break; + case 0x09: + dev->ide_regs[0x09] = (val & 0x05) | 0x8a; + pipc_ide_handlers(dev); + pipc_ide_irqs(dev); + break; - case 0x10: - dev->ide_regs[0x10] = (val & 0xf8) | 1; - pipc_ide_handlers(dev); - break; - case 0x11: - dev->ide_regs[0x11] = val; - pipc_ide_handlers(dev); - break; + case 0x10: + dev->ide_regs[0x10] = (val & 0xf8) | 1; + pipc_ide_handlers(dev); + break; + case 0x11: + dev->ide_regs[0x11] = val; + pipc_ide_handlers(dev); + break; - case 0x14: - dev->ide_regs[0x14] = (val & 0xfc) | 1; - pipc_ide_handlers(dev); - break; - case 0x15: - dev->ide_regs[0x15] = val; - pipc_ide_handlers(dev); - break; + case 0x14: + dev->ide_regs[0x14] = (val & 0xfc) | 1; + pipc_ide_handlers(dev); + break; + case 0x15: + dev->ide_regs[0x15] = val; + pipc_ide_handlers(dev); + break; - case 0x18: - dev->ide_regs[0x18] = (val & 0xf8) | 1; - pipc_ide_handlers(dev); - break; - case 0x19: - dev->ide_regs[0x19] = val; - pipc_ide_handlers(dev); - break; + case 0x18: + dev->ide_regs[0x18] = (val & 0xf8) | 1; + pipc_ide_handlers(dev); + break; + case 0x19: + dev->ide_regs[0x19] = val; + pipc_ide_handlers(dev); + break; - case 0x1c: - dev->ide_regs[0x1c] = (val & 0xfc) | 1; - pipc_ide_handlers(dev); - break; - case 0x1d: - dev->ide_regs[0x1d] = val; - pipc_ide_handlers(dev); - break; + case 0x1c: + dev->ide_regs[0x1c] = (val & 0xfc) | 1; + pipc_ide_handlers(dev); + break; + case 0x1d: + dev->ide_regs[0x1d] = val; + pipc_ide_handlers(dev); + break; - case 0x20: - dev->ide_regs[0x20] = (val & 0xf0) | 1; - pipc_bus_master_handlers(dev); - break; - case 0x21: - dev->ide_regs[0x21] = val; - pipc_bus_master_handlers(dev); - break; + case 0x20: + dev->ide_regs[0x20] = (val & 0xf0) | 1; + pipc_bus_master_handlers(dev); + break; + case 0x21: + dev->ide_regs[0x21] = val; + pipc_bus_master_handlers(dev); + break; - case 0x3d: - dev->ide_regs[0x3d] = val & 0x01; - pipc_ide_irqs(dev); - break; + case 0x3d: + dev->ide_regs[0x3d] = val & 0x01; + pipc_ide_irqs(dev); + break; - case 0x40: - if (dev->local <= VIA_PIPC_586B) - dev->ide_regs[0x40] = (val & 0x03) | 0x04; - else - dev->ide_regs[0x40] = val & 0x0f; - pipc_ide_handlers(dev); - break; + case 0x40: + if (dev->local <= VIA_PIPC_586B) + dev->ide_regs[0x40] = (val & 0x03) | 0x04; + else + dev->ide_regs[0x40] = val & 0x0f; + pipc_ide_handlers(dev); + break; - case 0x41: - if (dev->local <= VIA_PIPC_686A) - dev->ide_regs[0x41] = val; - else if (dev->local == VIA_PIPC_8231) - dev->ide_regs[0x41] = val & 0xf6; - else - dev->ide_regs[0x41] = val & 0xf2; - break; + case 0x41: + if (dev->local <= VIA_PIPC_686A) + dev->ide_regs[0x41] = val; + else if (dev->local == VIA_PIPC_8231) + dev->ide_regs[0x41] = val & 0xf6; + else + dev->ide_regs[0x41] = val & 0xf2; + break; - case 0x43: - if (dev->local <= VIA_PIPC_586A) - dev->ide_regs[0x43] = (val & 0x6f) | 0x10; - else if (dev->local <= VIA_PIPC_586B) - dev->ide_regs[0x43] = (val & 0xef) | 0x10; - else - dev->ide_regs[0x43] = val & 0x0f; - break; + case 0x43: + if (dev->local <= VIA_PIPC_586A) + dev->ide_regs[0x43] = (val & 0x6f) | 0x10; + else if (dev->local <= VIA_PIPC_586B) + dev->ide_regs[0x43] = (val & 0xef) | 0x10; + else + dev->ide_regs[0x43] = val & 0x0f; + break; - case 0x44: - if (dev->local <= VIA_PIPC_586A) - dev->ide_regs[0x44] = val & 0x78; - else if (dev->local <= VIA_PIPC_586B) - dev->ide_regs[0x44] = val & 0x7b; - else if (dev->local <= VIA_PIPC_596B) - dev->ide_regs[0x44] = val & 0x7f; - else if ((dev->local <= VIA_PIPC_686A) || (dev->local == VIA_PIPC_8231)) - dev->ide_regs[0x44] = val & 0x69; - else - dev->ide_regs[0x44] = val & 0x7d; - break; + case 0x44: + if (dev->local <= VIA_PIPC_586A) + dev->ide_regs[0x44] = val & 0x78; + else if (dev->local <= VIA_PIPC_586B) + dev->ide_regs[0x44] = val & 0x7b; + else if (dev->local <= VIA_PIPC_596B) + dev->ide_regs[0x44] = val & 0x7f; + else if ((dev->local <= VIA_PIPC_686A) || (dev->local == VIA_PIPC_8231)) + dev->ide_regs[0x44] = val & 0x69; + else + dev->ide_regs[0x44] = val & 0x7d; + break; - case 0x45: - if (dev->local <= VIA_PIPC_586B) - dev->ide_regs[0x45] = val & 0x40; - else if ((dev->local <= VIA_PIPC_596B) || (dev->local == VIA_PIPC_8231)) - dev->ide_regs[0x45] = val & 0x4f; - else if (dev->local <= VIA_PIPC_686A) - dev->ide_regs[0x45] = val & 0x5f; - else - dev->ide_regs[0x45] = (val & 0x5c) | 0x20; - break; + case 0x45: + if (dev->local <= VIA_PIPC_586B) + dev->ide_regs[0x45] = val & 0x40; + else if ((dev->local <= VIA_PIPC_596B) || (dev->local == VIA_PIPC_8231)) + dev->ide_regs[0x45] = val & 0x4f; + else if (dev->local <= VIA_PIPC_686A) + dev->ide_regs[0x45] = val & 0x5f; + else + dev->ide_regs[0x45] = (val & 0x5c) | 0x20; + break; - case 0x46: - if ((dev->local <= VIA_PIPC_686A) || (dev->local == VIA_PIPC_8231)) - dev->ide_regs[0x46] = val & 0xf3; - else - dev->ide_regs[0x46] = val & 0xc0; - break; + case 0x46: + if ((dev->local <= VIA_PIPC_686A) || (dev->local == VIA_PIPC_8231)) + dev->ide_regs[0x46] = val & 0xf3; + else + dev->ide_regs[0x46] = val & 0xc0; + break; - case 0x50: case 0x51: case 0x52: case 0x53: - if (dev->local <= VIA_PIPC_586B) - dev->ide_regs[addr] = val & 0xc3; - else if (dev->local <= VIA_PIPC_596B) - dev->ide_regs[addr] = val & ((addr & 1) ? 0xc3 : 0xcb); - else if ((dev->local <= VIA_PIPC_686A) || (dev->local == VIA_PIPC_8231)) - dev->ide_regs[addr] = val & ((addr & 1) ? 0xc7 : 0xcf); - else - dev->ide_regs[addr] = val & 0xd7; - break; + case 0x50: + case 0x51: + case 0x52: + case 0x53: + if (dev->local <= VIA_PIPC_586B) + dev->ide_regs[addr] = val & 0xc3; + else if (dev->local <= VIA_PIPC_596B) + dev->ide_regs[addr] = val & ((addr & 1) ? 0xc3 : 0xcb); + else if ((dev->local <= VIA_PIPC_686A) || (dev->local == VIA_PIPC_8231)) + dev->ide_regs[addr] = val & ((addr & 1) ? 0xc7 : 0xcf); + else + dev->ide_regs[addr] = val & 0xd7; + break; - case 0x61: case 0x69: - dev->ide_regs[addr] = val & 0x0f; - break; + case 0x61: + case 0x69: + dev->ide_regs[addr] = val & 0x0f; + break; - default: - dev->ide_regs[addr] = val; - break; - } + default: + dev->ide_regs[addr] = val; + break; + } } else if (func < pm_func) { /* USB */ - /* Read-only addresses. */ - if ((addr < 4) || (addr == 5) || (addr == 6) || ((addr >= 8) && (addr < 0xd)) || - ((addr >= 0xe) && (addr < 0x20)) || ((addr >= 0x22) && (addr < 0x3c)) || - ((addr >= 0x3e) && (addr < 0x40)) || ((addr >= 0x42) && (addr < 0x44)) || - ((addr >= 0x46) && (addr < 0x84)) || ((addr >= 0x85) && (addr < 0xc0)) || (addr >= 0xc2)) - return; + /* Read-only addresses. */ + if ((addr < 4) || (addr == 5) || (addr == 6) || ((addr >= 8) && (addr < 0xd)) || ((addr >= 0xe) && (addr < 0x20)) || ((addr >= 0x22) && (addr < 0x3c)) || ((addr >= 0x3e) && (addr < 0x40)) || ((addr >= 0x42) && (addr < 0x44)) || ((addr >= 0x46) && (addr < 0x84)) || ((addr >= 0x85) && (addr < 0xc0)) || (addr >= 0xc2)) + return; - if ((dev->local <= VIA_PIPC_596B) && (addr == 0x84)) - return; + if ((dev->local <= VIA_PIPC_596B) && (addr == 0x84)) + return; - /* Check disable bits for both controllers. */ - if ((func == 2) ? (dev->pci_isa_regs[0x48] & 0x04) : (dev->pci_isa_regs[0x85] & 0x10)) - return; + /* Check disable bits for both controllers. */ + if ((func == 2) ? (dev->pci_isa_regs[0x48] & 0x04) : (dev->pci_isa_regs[0x85] & 0x10)) + return; - switch (addr) { - case 0x04: - dev->usb_regs[func - 2][0x04] = val & 0x97; - usb_update_io_mapping(dev, func); - break; - case 0x07: - dev->usb_regs[func - 2][0x07] &= ~(val & 0x78); - break; + switch (addr) { + case 0x04: + dev->usb_regs[func - 2][0x04] = val & 0x97; + usb_update_io_mapping(dev, func); + break; + case 0x07: + dev->usb_regs[func - 2][0x07] &= ~(val & 0x78); + break; - case 0x20: - dev->usb_regs[func - 2][0x20] = (val & ~0x1f) | 1; - usb_update_io_mapping(dev, func); - break; - case 0x21: - dev->usb_regs[func - 2][0x21] = val; - usb_update_io_mapping(dev, func); - break; + case 0x20: + dev->usb_regs[func - 2][0x20] = (val & ~0x1f) | 1; + usb_update_io_mapping(dev, func); + break; + case 0x21: + dev->usb_regs[func - 2][0x21] = val; + usb_update_io_mapping(dev, func); + break; - default: - dev->usb_regs[func - 2][addr] = val; - break; - } + default: + dev->usb_regs[func - 2][addr] = val; + break; + } } else if (func == pm_func) { /* Power */ - /* Read-only addresses */ - if ((addr < 0xd) || ((addr >= 0xe) && (addr < 0x40)) || (addr == 0x43) || (addr == 0x4a) || (addr == 0x4b) || - (addr == 0x4e) || (addr == 0x4f) || (addr == 0x56) || (addr == 0x57) || ((addr >= 0x5c) && (addr < 0x61)) || - ((addr >= 0x64) && (addr < 0x70)) || (addr == 0x72) || (addr == 0x73) || ((addr >= 0x75) && (addr < 0x80)) || - (addr == 0x83) || ((addr >= 0x85) && (addr < 0x90)) || ((addr >= 0x92) && (addr < 0xd2)) || (addr >= 0xd7)) - return; + /* Read-only addresses */ + if ((addr < 0xd) || ((addr >= 0xe) && (addr < 0x40)) || (addr == 0x43) || (addr == 0x4a) || (addr == 0x4b) || (addr == 0x4e) || (addr == 0x4f) || (addr == 0x56) || (addr == 0x57) || ((addr >= 0x5c) && (addr < 0x61)) || ((addr >= 0x64) && (addr < 0x70)) || (addr == 0x72) || (addr == 0x73) || ((addr >= 0x75) && (addr < 0x80)) || (addr == 0x83) || ((addr >= 0x85) && (addr < 0x90)) || ((addr >= 0x92) && (addr < 0xd2)) || (addr >= 0xd7)) + return; - if ((dev->local <= VIA_PIPC_586B) && ((addr == 0x48) || (addr == 0x4c) || (addr == 0x4d) || (addr >= 0x54))) - return; + if ((dev->local <= VIA_PIPC_586B) && ((addr == 0x48) || (addr == 0x4c) || (addr == 0x4d) || (addr >= 0x54))) + return; - if ((dev->local <= VIA_PIPC_596B) && ((addr >= 0x64) && (addr < (dev->local == VIA_PIPC_596A ? 0x80 : 0x85)))) - return; + if ((dev->local <= VIA_PIPC_596B) && ((addr >= 0x64) && (addr < (dev->local == VIA_PIPC_596A ? 0x80 : 0x85)))) + return; - switch (addr) { - case 0x41: case 0x48: case 0x49: - if (addr == 0x48) { - if (dev->local >= VIA_PIPC_596A) - val = (val & 0x80) | 0x01; - else - val = 0x01; - } + switch (addr) { + case 0x41: + case 0x48: + case 0x49: + if (addr == 0x48) { + if (dev->local >= VIA_PIPC_596A) + val = (val & 0x80) | 0x01; + else + val = 0x01; + } - dev->power_regs[addr] = val; - c = (dev->power_regs[0x49] << 8); - if (dev->local >= VIA_PIPC_596A) - c |= (dev->power_regs[0x48] & 0x80); - /* Workaround for P3V133 BIOS in 596B mode mapping ACPI to E800 (same as SMBus) instead of E400. */ - if ((dev->local == VIA_PIPC_596B) && (c == ((dev->power_regs[0x91] << 8) | (dev->power_regs[0x90] & 0xf0))) && (dev->power_regs[0xd2] & 0x01)) - c -= 0x400; - acpi_set_timer32(dev->acpi, dev->power_regs[0x41] & 0x08); - acpi_update_io_mapping(dev->acpi, c, dev->power_regs[0x41] & 0x80); - break; + dev->power_regs[addr] = val; + c = (dev->power_regs[0x49] << 8); + if (dev->local >= VIA_PIPC_596A) + c |= (dev->power_regs[0x48] & 0x80); + /* Workaround for P3V133 BIOS in 596B mode mapping ACPI to E800 (same as SMBus) instead of E400. */ + if ((dev->local == VIA_PIPC_596B) && (c == ((dev->power_regs[0x91] << 8) | (dev->power_regs[0x90] & 0xf0))) && (dev->power_regs[0xd2] & 0x01)) + c -= 0x400; + acpi_set_timer32(dev->acpi, dev->power_regs[0x41] & 0x08); + acpi_update_io_mapping(dev->acpi, c, dev->power_regs[0x41] & 0x80); + break; - case 0x42: - dev->power_regs[addr] = (dev->power_regs[addr] & 0xf0) | (val & 0x0f); - acpi_set_irq_line(dev->acpi, dev->power_regs[addr] & 0x0f); - break; + case 0x42: + dev->power_regs[addr] = (dev->power_regs[addr] & 0xf0) | (val & 0x0f); + acpi_set_irq_line(dev->acpi, dev->power_regs[addr] & 0x0f); + break; - case 0x54: - if (dev->local <= VIA_PIPC_596B) - dev->power_regs[addr] = val; /* write-only on 686A+ */ - else - smbus_piix4_setclock(dev->smbus, (val & 0x80) ? 65536 : 16384); /* final clock undocumented on 686A, assume RTC*2 like 686B */ - break; + case 0x54: + if (dev->local <= VIA_PIPC_596B) + dev->power_regs[addr] = val; /* write-only on 686A+ */ + else + smbus_piix4_setclock(dev->smbus, (val & 0x80) ? 65536 : 16384); /* final clock undocumented on 686A, assume RTC*2 like 686B */ + break; - case 0x61: case 0x62: case 0x63: - dev->power_regs[(addr - 0x58)] = val; - break; + case 0x61: + case 0x62: + case 0x63: + dev->power_regs[(addr - 0x58)] = val; + break; - case 0x70: case 0x71: case 0x74: - dev->power_regs[addr] = val; - /* Forward hardware monitor-related registers to hwm_vt82c686.c */ - if (dev->hwm) - vt82c686_hwm_write(addr, val, dev->hwm); - break; + case 0x70: + case 0x71: + case 0x74: + dev->power_regs[addr] = val; + /* Forward hardware monitor-related registers to hwm_vt82c686.c */ + if (dev->hwm) + vt82c686_hwm_write(addr, val, dev->hwm); + break; - case 0x80: case 0x81: case 0x84: /* 596A has the SMBus I/O base and enable bit here instead. */ - dev->power_regs[addr] = val; - smbus_piix4_remap(dev->smbus, (dev->power_regs[0x81] << 8) | (dev->power_regs[0x80] & 0xf0), dev->power_regs[0x84] & 0x01); - break; + case 0x80: + case 0x81: + case 0x84: /* 596A has the SMBus I/O base and enable bit here instead. */ + dev->power_regs[addr] = val; + smbus_piix4_remap(dev->smbus, (dev->power_regs[0x81] << 8) | (dev->power_regs[0x80] & 0xf0), dev->power_regs[0x84] & 0x01); + break; - case 0xd2: - if (dev->local == VIA_PIPC_686B) - smbus_piix4_setclock(dev->smbus, (val & 0x04) ? 65536 : 16384); - /* fall-through */ + case 0xd2: + if (dev->local == VIA_PIPC_686B) + smbus_piix4_setclock(dev->smbus, (val & 0x04) ? 65536 : 16384); + /* fall-through */ - case 0x90: case 0x91: - dev->power_regs[addr] = val; - smbus_piix4_remap(dev->smbus, (dev->power_regs[0x91] << 8) | (dev->power_regs[0x90] & 0xf0), dev->power_regs[0xd2] & 0x01); - break; + case 0x90: + case 0x91: + dev->power_regs[addr] = val; + smbus_piix4_remap(dev->smbus, (dev->power_regs[0x91] << 8) | (dev->power_regs[0x90] & 0xf0), dev->power_regs[0xd2] & 0x01); + break; - default: - dev->power_regs[addr] = val; - break; - } + default: + dev->power_regs[addr] = val; + break; + } } else if (func <= pm_func + 2) { /* AC97 / MC97 */ - /* Read-only addresses. */ - if ((addr < 0x4) || ((addr >= 0x6) && (addr < 0x9)) || ((addr >= 0xc) && (addr < 0x11)) || (addr == 0x16) || - (addr == 0x17) || (addr == 0x1a) || (addr == 0x1b) || ((addr >= 0x1e) && (addr < 0x2c)) || - ((addr >= 0x30) && (addr < 0x34)) || ((addr >= 0x35) && (addr < 0x3c)) || ((addr >= 0x3d) && (addr < 0x41)) || - ((addr >= 0x45) && (addr < 0x4a)) || (addr >= 0x4c)) - return; + /* Read-only addresses. */ + if ((addr < 0x4) || ((addr >= 0x6) && (addr < 0x9)) || ((addr >= 0xc) && (addr < 0x11)) || (addr == 0x16) || (addr == 0x17) || (addr == 0x1a) || (addr == 0x1b) || ((addr >= 0x1e) && (addr < 0x2c)) || ((addr >= 0x30) && (addr < 0x34)) || ((addr >= 0x35) && (addr < 0x3c)) || ((addr >= 0x3d) && (addr < 0x41)) || ((addr >= 0x45) && (addr < 0x4a)) || (addr >= 0x4c)) + return; - /* Small shortcut. */ - func = func - pm_func - 1; + /* Small shortcut. */ + func = func - pm_func - 1; - /* Check disable bits and specific read-only addresses for both controllers. */ - if ((func == 0) && (((addr >= 0x09) && (addr < 0xc)) || (addr == 0x44) || (dev->pci_isa_regs[0x85] & 0x04))) - return; + /* Check disable bits and specific read-only addresses for both controllers. */ + if ((func == 0) && (((addr >= 0x09) && (addr < 0xc)) || (addr == 0x44) || (dev->pci_isa_regs[0x85] & 0x04))) + return; - if ((func == 1) && ((addr == 0x14) || (addr == 0x15) || (addr == 0x18) || (addr == 0x19) || (addr == 0x42) || - (addr == 0x43) || (addr == 0x48) || (addr == 0x4a) || (addr == 0x4b) || (dev->pci_isa_regs[0x85] & 0x08))) - return; + if ((func == 1) && ((addr == 0x14) || (addr == 0x15) || (addr == 0x18) || (addr == 0x19) || (addr == 0x42) || (addr == 0x43) || (addr == 0x48) || (addr == 0x4a) || (addr == 0x4b) || (dev->pci_isa_regs[0x85] & 0x08))) + return; - switch (addr) { - case 0x04: - dev->ac97_regs[func][addr] = val; - pipc_sgd_handlers(dev, func); - pipc_codec_handlers(dev, func); - pipc_fmnmi_handlers(dev, func); - break; + switch (addr) { + case 0x04: + dev->ac97_regs[func][addr] = val; + pipc_sgd_handlers(dev, func); + pipc_codec_handlers(dev, func); + pipc_fmnmi_handlers(dev, func); + break; - case 0x09: case 0x0a: case 0x0b: - if (dev->ac97_regs[func][0x44] & 0x20) - dev->ac97_regs[func][addr] = val; - break; + case 0x09: + case 0x0a: + case 0x0b: + if (dev->ac97_regs[func][0x44] & 0x20) + dev->ac97_regs[func][addr] = val; + break; - case 0x10: case 0x11: - dev->ac97_regs[func][addr] = val; - pipc_sgd_handlers(dev, func); - break; + case 0x10: + case 0x11: + dev->ac97_regs[func][addr] = val; + pipc_sgd_handlers(dev, func); + break; - case 0x14: case 0x15: - if (addr == 0x14) - val = (val & 0xfc) | 1; - dev->ac97_regs[func][addr] = val; - pipc_fmnmi_handlers(dev, func); - break; + case 0x14: + case 0x15: + if (addr == 0x14) + val = (val & 0xfc) | 1; + dev->ac97_regs[func][addr] = val; + pipc_fmnmi_handlers(dev, func); + break; - case 0x18: case 0x19: - if (addr == 0x18) - val = (val & 0xfc) | 1; - dev->ac97_regs[func][addr] = val; - pipc_sb_handlers(dev, func); - break; + case 0x18: + case 0x19: + if (addr == 0x18) + val = (val & 0xfc) | 1; + dev->ac97_regs[func][addr] = val; + pipc_sb_handlers(dev, func); + break; - case 0x1c: case 0x1d: - dev->ac97_regs[func][addr] = val; - pipc_codec_handlers(dev, func); - break; + case 0x1c: + case 0x1d: + dev->ac97_regs[func][addr] = val; + pipc_codec_handlers(dev, func); + break; - case 0x2c: case 0x2d: case 0x2e: case 0x2f: - if ((func == 0) && (dev->ac97_regs[func][0x42] & 0x20)) - dev->ac97_regs[func][addr] = val; - break; + case 0x2c: + case 0x2d: + case 0x2e: + case 0x2f: + if ((func == 0) && (dev->ac97_regs[func][0x42] & 0x20)) + dev->ac97_regs[func][addr] = val; + break; - case 0x41: - dev->ac97_regs[func][addr] = val; - ac97_via_write_control(dev->ac97, func, val); - break; + case 0x41: + dev->ac97_regs[func][addr] = val; + ac97_via_write_control(dev->ac97, func, val); + break; - case 0x42: case 0x4a: case 0x4b: - dev->ac97_regs[0][addr] = dev->ac97_regs[1][addr] = val; - gameport_remap(dev->gameport, (dev->ac97_regs[0][0x42] & 0x08) ? ((dev->ac97_regs[0][0x4b] << 8) | (dev->ac97_regs[0][0x4a] & 0xf8)) : 0); - if (addr == 0x42) - pipc_sb_handlers(dev, func); - break; + case 0x42: + case 0x4a: + case 0x4b: + dev->ac97_regs[0][addr] = dev->ac97_regs[1][addr] = val; + gameport_remap(dev->gameport, (dev->ac97_regs[0][0x42] & 0x08) ? ((dev->ac97_regs[0][0x4b] << 8) | (dev->ac97_regs[0][0x4a] & 0xf8)) : 0); + if (addr == 0x42) + pipc_sb_handlers(dev, func); + break; - case 0x43: - dev->ac97_regs[0][addr] = dev->ac97_regs[1][addr] = val; - break; + case 0x43: + dev->ac97_regs[0][addr] = dev->ac97_regs[1][addr] = val; + break; - case 0x44: - dev->ac97_regs[0][addr] = dev->ac97_regs[1][addr] = val & 0xf0; - break; + case 0x44: + dev->ac97_regs[0][addr] = dev->ac97_regs[1][addr] = val & 0xf0; + break; - case 0x45: case 0x48: - dev->ac97_regs[0][addr] = dev->ac97_regs[1][addr] = val & 0x0f; - break; + case 0x45: + case 0x48: + dev->ac97_regs[0][addr] = dev->ac97_regs[1][addr] = val & 0x0f; + break; - default: - dev->ac97_regs[func][addr] = val; - break; - } + default: + dev->ac97_regs[func][addr] = val; + break; + } } } - static void pipc_reset(void *p) { - pipc_t *dev = (pipc_t *) p; + pipc_t *dev = (pipc_t *) p; uint8_t pm_func = dev->usb[1] ? 4 : 3; pipc_write(pm_func, 0x41, 0x00, p); @@ -1524,14 +1545,13 @@ pipc_reset(void *p) pipc_write(1, 0x20, 0x01, p); pipc_write(1, 0x21, 0xcc, p); if (dev->local <= VIA_PIPC_586B) - pipc_write(1, 0x40, 0x04, p); + pipc_write(1, 0x40, 0x04, p); else - pipc_write(1, 0x40, 0x00, p); + pipc_write(1, 0x40, 0x00, p); pipc_write(0, 0x77, 0x00, p); } - static void * pipc_init(const device_t *info) { @@ -1541,7 +1561,7 @@ pipc_init(const device_t *info) pipc_log("PIPC: init()\n"); dev->local = info->local; - dev->slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, pipc_read, pipc_write, dev); + dev->slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, pipc_read, pipc_write, dev); dev->bm[0] = device_add_inst(&sff8038i_device, 1); sff_set_slot(dev->bm[0], dev->slot); @@ -1558,35 +1578,35 @@ pipc_init(const device_t *info) dev->nvr = device_add(&via_nvr_device); if (dev->local == VIA_PIPC_686B) - dev->smbus = device_add(&via_smbus_device); + dev->smbus = device_add(&via_smbus_device); else if (dev->local >= VIA_PIPC_596A) - dev->smbus = device_add(&piix4_smbus_device); + dev->smbus = device_add(&piix4_smbus_device); if (dev->local >= VIA_PIPC_596A) { - dev->acpi = device_add(&acpi_via_596b_device); - acpi_set_trap_update(dev->acpi, pipc_trap_update_596, dev); + dev->acpi = device_add(&acpi_via_596b_device); + acpi_set_trap_update(dev->acpi, pipc_trap_update_596, dev); } else if (dev->local >= VIA_PIPC_586B) { - dev->acpi = device_add(&acpi_via_device); - acpi_set_trap_update(dev->acpi, pipc_trap_update_586, dev); + dev->acpi = device_add(&acpi_via_device); + acpi_set_trap_update(dev->acpi, pipc_trap_update_586, dev); } dev->usb[0] = device_add_inst(&usb_device, 1); if (dev->local >= VIA_PIPC_686A) { - dev->usb[1] = device_add_inst(&usb_device, 2); + dev->usb[1] = device_add_inst(&usb_device, 2); - dev->ac97 = device_add(&ac97_via_device); - ac97_via_set_slot(dev->ac97, dev->slot, PCI_INTC); + dev->ac97 = device_add(&ac97_via_device); + ac97_via_set_slot(dev->ac97, dev->slot, PCI_INTC); - dev->sb = device_add_inst(&sb_pro_compat_device, 2); + dev->sb = device_add_inst(&sb_pro_compat_device, 2); #ifndef VIA_PIPC_FM_EMULATION - dev->sb->opl_enabled = 1; + dev->sb->opl_enabled = 1; #endif - sound_add_handler(sb_get_buffer_sbpro, dev->sb); + sound_add_handler(sb_get_buffer_sbpro, dev->sb); - dev->gameport = gameport_add(&gameport_sio_device); + dev->gameport = gameport_add(&gameport_sio_device); - dev->sio = device_add(&via_vt82c686_sio_device); - dev->hwm = device_add(&via_vt82c686_hwm_device); + dev->sio = device_add(&via_vt82c686_sio_device); + dev->hwm = device_add(&via_vt82c686_hwm_device); } pipc_reset_hard(dev); @@ -1598,26 +1618,25 @@ pipc_init(const device_t *info) dma_alias_set(); if (dev->local <= VIA_PIPC_586B) { - pci_enable_mirq(0); - pci_enable_mirq(1); - if (dev->local == VIA_PIPC_586B) - pci_enable_mirq(2); + pci_enable_mirq(0); + pci_enable_mirq(1); + if (dev->local == VIA_PIPC_586B) + pci_enable_mirq(2); } if (dev->local < VIA_PIPC_8231) - dev->ddma = device_add(&ddma_device); + dev->ddma = device_add(&ddma_device); if (dev->acpi) { - acpi_set_slot(dev->acpi, dev->slot); - acpi_set_nvr(dev->acpi, dev->nvr); + acpi_set_slot(dev->acpi, dev->slot); + acpi_set_nvr(dev->acpi, dev->nvr); - acpi_init_gporeg(dev->acpi, 0xff, 0xbf, 0xff, 0x7f); + acpi_init_gporeg(dev->acpi, 0xff, 0xbf, 0xff, 0x7f); } return dev; } - static void pipc_close(void *p) { @@ -1626,91 +1645,91 @@ pipc_close(void *p) pipc_log("PIPC: close()\n"); for (int i = 0; i < TRAP_MAX; i++) - io_trap_remove(dev->io_traps[i].trap); + io_trap_remove(dev->io_traps[i].trap); free(dev); } const device_t via_vt82c586b_device = { - .name = "VIA VT82C586B", + .name = "VIA VT82C586B", .internal_name = "via_vt82c586b", - .flags = DEVICE_PCI, - .local = VIA_PIPC_586B, - .init = pipc_init, - .close = pipc_close, - .reset = pipc_reset, + .flags = DEVICE_PCI, + .local = VIA_PIPC_586B, + .init = pipc_init, + .close = pipc_close, + .reset = pipc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_vt82c596a_device = { - .name = "VIA VT82C596A", + .name = "VIA VT82C596A", .internal_name = "via_vt82c596a", - .flags = DEVICE_PCI, - .local = VIA_PIPC_596A, - .init = pipc_init, - .close = pipc_close, - .reset = pipc_reset, + .flags = DEVICE_PCI, + .local = VIA_PIPC_596A, + .init = pipc_init, + .close = pipc_close, + .reset = pipc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_vt82c596b_device = { - .name = "VIA VT82C596B", + .name = "VIA VT82C596B", .internal_name = "via_vt82c596b", - .flags = DEVICE_PCI, - .local = VIA_PIPC_596B, - .init = pipc_init, - .close = pipc_close, - .reset = pipc_reset, + .flags = DEVICE_PCI, + .local = VIA_PIPC_596B, + .init = pipc_init, + .close = pipc_close, + .reset = pipc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_vt82c686a_device = { - .name = "VIA VT82C686A", + .name = "VIA VT82C686A", .internal_name = "via_vt82c686a", - .flags = DEVICE_PCI, - .local = VIA_PIPC_686A, - .init = pipc_init, - .close = pipc_close, - .reset = pipc_reset, + .flags = DEVICE_PCI, + .local = VIA_PIPC_686A, + .init = pipc_init, + .close = pipc_close, + .reset = pipc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_vt82c686b_device = { - .name = "VIA VT82C686B", + .name = "VIA VT82C686B", .internal_name = "via_vt82c686b", - .flags = DEVICE_PCI, - .local = VIA_PIPC_686B, - .init = pipc_init, - .close = pipc_close, - .reset = pipc_reset, + .flags = DEVICE_PCI, + .local = VIA_PIPC_686B, + .init = pipc_init, + .close = pipc_close, + .reset = pipc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_vt8231_device = { - .name = "VIA VT8231", + .name = "VIA VT8231", .internal_name = "via_vt8231", - .flags = DEVICE_PCI, - .local = VIA_PIPC_8231, - .init = pipc_init, - .close = pipc_close, - .reset = pipc_reset, + .flags = DEVICE_PCI, + .local = VIA_PIPC_8231, + .init = pipc_init, + .close = pipc_close, + .reset = pipc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/via_vt82c49x.c b/src/chipset/via_vt82c49x.c index f951741e7..2555a688c 100644 --- a/src/chipset/via_vt82c49x.c +++ b/src/chipset/via_vt82c49x.c @@ -37,14 +37,13 @@ typedef struct { - uint8_t has_ide, index, - regs[256]; + uint8_t has_ide, index, + regs[256]; - smram_t *smram_smm, *smram_low, - *smram_high; + smram_t *smram_smm, *smram_low, + *smram_high; } vt82c49x_t; - #ifdef ENABLE_VT82C49X_LOG int vt82c49x_do_log = ENABLE_VT82C49X_LOG; static void @@ -53,124 +52,124 @@ vt82c49x_log(const char *fmt, ...) va_list ap; if (vt82c49x_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define vt82c49x_log(fmt, ...) +# define vt82c49x_log(fmt, ...) #endif - static void vt82c49x_recalc(vt82c49x_t *dev) { - int i, relocate; - uint8_t reg, bit; + int i, relocate; + uint8_t reg, bit; uint32_t base, state; uint32_t shadow_bitmap = 0x00000000; relocate = (dev->regs[0x33] >> 2) & 0x03; - shadowbios = 0; + shadowbios = 0; shadowbios_write = 0; for (i = 0; i < 8; i++) { - base = 0xc0000 + (i << 14); - reg = 0x30 + (i >> 2); - bit = (i & 3) << 1; + base = 0xc0000 + (i << 14); + reg = 0x30 + (i >> 2); + bit = (i & 3) << 1; - if ((base >= 0xc0000) && (base <= 0xc7fff)) { - if (dev->regs[0x40] & 0x80) - state = MEM_WRITE_DISABLED; - else if ((dev->regs[reg]) & (1 << bit)) - state = MEM_WRITE_INTERNAL; - else - state = (dev->regs[0x33] & 0x40) ? MEM_WRITE_ROMCS : MEM_WRITE_EXTERNAL; + if ((base >= 0xc0000) && (base <= 0xc7fff)) { + if (dev->regs[0x40] & 0x80) + state = MEM_WRITE_DISABLED; + else if ((dev->regs[reg]) & (1 << bit)) + state = MEM_WRITE_INTERNAL; + else + state = (dev->regs[0x33] & 0x40) ? MEM_WRITE_ROMCS : MEM_WRITE_EXTERNAL; - if ((dev->regs[reg]) & (1 << (bit + 1))) - state |= MEM_READ_INTERNAL; - else - state |= (dev->regs[0x33] & 0x40) ? MEM_READ_ROMCS : MEM_READ_EXTERNAL; - } if ((base >= 0xc8000) && (base <= 0xcffff)) { - if ((dev->regs[reg]) & (1 << bit)) - state = MEM_WRITE_INTERNAL; - else - state = (dev->regs[0x33] & 0x80) ? MEM_WRITE_ROMCS : MEM_WRITE_EXTERNAL; + if ((dev->regs[reg]) & (1 << (bit + 1))) + state |= MEM_READ_INTERNAL; + else + state |= (dev->regs[0x33] & 0x40) ? MEM_READ_ROMCS : MEM_READ_EXTERNAL; + } + if ((base >= 0xc8000) && (base <= 0xcffff)) { + if ((dev->regs[reg]) & (1 << bit)) + state = MEM_WRITE_INTERNAL; + else + state = (dev->regs[0x33] & 0x80) ? MEM_WRITE_ROMCS : MEM_WRITE_EXTERNAL; - if ((dev->regs[reg]) & (1 << (bit + 1))) - state |= MEM_READ_INTERNAL; - else - state |= (dev->regs[0x33] & 0x80) ? MEM_READ_ROMCS : MEM_READ_EXTERNAL; - } else { - state = ((dev->regs[reg]) & (1 << bit)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; - state |= ((dev->regs[reg]) & (1 << (bit + 1))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - } + if ((dev->regs[reg]) & (1 << (bit + 1))) + state |= MEM_READ_INTERNAL; + else + state |= (dev->regs[0x33] & 0x80) ? MEM_READ_ROMCS : MEM_READ_EXTERNAL; + } else { + state = ((dev->regs[reg]) & (1 << bit)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; + state |= ((dev->regs[reg]) & (1 << (bit + 1))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + } - vt82c49x_log("(%02X=%02X, %i) Setting %08X-%08X to: write %sabled, read %sabled\n", - reg, dev->regs[reg], bit, base, base + 0x3fff, - ((dev->regs[reg]) & (1 << bit)) ? "en" : "dis", ((dev->regs[reg]) & (1 << (bit + 1))) ? "en" : "dis"); + vt82c49x_log("(%02X=%02X, %i) Setting %08X-%08X to: write %sabled, read %sabled\n", + reg, dev->regs[reg], bit, base, base + 0x3fff, + ((dev->regs[reg]) & (1 << bit)) ? "en" : "dis", ((dev->regs[reg]) & (1 << (bit + 1))) ? "en" : "dis"); - if ((dev->regs[reg]) & (1 << bit)) - shadow_bitmap |= (1 << i); - if ((dev->regs[reg]) & (1 << (bit + 1))) - shadow_bitmap |= (1 << (i + 16)); + if ((dev->regs[reg]) & (1 << bit)) + shadow_bitmap |= (1 << i); + if ((dev->regs[reg]) & (1 << (bit + 1))) + shadow_bitmap |= (1 << (i + 16)); - mem_set_mem_state_both(base, 0x4000, state); + mem_set_mem_state_both(base, 0x4000, state); } for (i = 0; i < 4; i++) { - base = 0xe0000 + (i << 15); - bit = 6 - (i & 2); + base = 0xe0000 + (i << 15); + bit = 6 - (i & 2); - if ((base >= 0xe0000) && (base <= 0xe7fff)) { - if (dev->regs[0x40] & 0x20) - state = MEM_WRITE_DISABLED; - else if ((dev->regs[0x32]) & (1 << bit)) - state = MEM_WRITE_INTERNAL; - else - state = (dev->regs[0x33] & 0x10) ? MEM_WRITE_ROMCS : MEM_WRITE_EXTERNAL; + if ((base >= 0xe0000) && (base <= 0xe7fff)) { + if (dev->regs[0x40] & 0x20) + state = MEM_WRITE_DISABLED; + else if ((dev->regs[0x32]) & (1 << bit)) + state = MEM_WRITE_INTERNAL; + else + state = (dev->regs[0x33] & 0x10) ? MEM_WRITE_ROMCS : MEM_WRITE_EXTERNAL; - if ((dev->regs[0x32]) & (1 << (bit + 1))) - state |= MEM_READ_INTERNAL; - else - state |= (dev->regs[0x33] & 0x10) ? MEM_READ_ROMCS : MEM_READ_EXTERNAL; - } else if ((base >= 0xe8000) && (base <= 0xeffff)) { - if (dev->regs[0x40] & 0x20) - state = MEM_WRITE_DISABLED; - else if ((dev->regs[0x32]) & (1 << bit)) - state = MEM_WRITE_INTERNAL; - else - state = (dev->regs[0x33] & 0x20) ? MEM_WRITE_ROMCS : MEM_WRITE_EXTERNAL; + if ((dev->regs[0x32]) & (1 << (bit + 1))) + state |= MEM_READ_INTERNAL; + else + state |= (dev->regs[0x33] & 0x10) ? MEM_READ_ROMCS : MEM_READ_EXTERNAL; + } else if ((base >= 0xe8000) && (base <= 0xeffff)) { + if (dev->regs[0x40] & 0x20) + state = MEM_WRITE_DISABLED; + else if ((dev->regs[0x32]) & (1 << bit)) + state = MEM_WRITE_INTERNAL; + else + state = (dev->regs[0x33] & 0x20) ? MEM_WRITE_ROMCS : MEM_WRITE_EXTERNAL; - if ((dev->regs[0x32]) & (1 << (bit + 1))) - state |= MEM_READ_INTERNAL; - else - state |= (dev->regs[0x33] & 0x20) ? MEM_READ_ROMCS : MEM_READ_EXTERNAL; - } else { - if (dev->regs[0x40] & 0x40) - state = MEM_WRITE_DISABLED; - else if ((dev->regs[0x32]) & (1 << bit)) - state = ((dev->regs[0x32]) & (1 << bit)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; + if ((dev->regs[0x32]) & (1 << (bit + 1))) + state |= MEM_READ_INTERNAL; + else + state |= (dev->regs[0x33] & 0x20) ? MEM_READ_ROMCS : MEM_READ_EXTERNAL; + } else { + if (dev->regs[0x40] & 0x40) + state = MEM_WRITE_DISABLED; + else if ((dev->regs[0x32]) & (1 << bit)) + state = ((dev->regs[0x32]) & (1 << bit)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; - state |= ((dev->regs[0x32]) & (1 << (bit + 1))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - } + state |= ((dev->regs[0x32]) & (1 << (bit + 1))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + } - vt82c49x_log("(32=%02X, %i) Setting %08X-%08X to: write %sabled, read %sabled\n", - dev->regs[0x32], bit, base, base + 0x7fff, - ((dev->regs[0x32]) & (1 << bit)) ? "en" : "dis", ((dev->regs[0x32]) & (1 << (bit + 1))) ? "en" : "dis"); + vt82c49x_log("(32=%02X, %i) Setting %08X-%08X to: write %sabled, read %sabled\n", + dev->regs[0x32], bit, base, base + 0x7fff, + ((dev->regs[0x32]) & (1 << bit)) ? "en" : "dis", ((dev->regs[0x32]) & (1 << (bit + 1))) ? "en" : "dis"); - if ((dev->regs[0x32]) & (1 << bit)) { - shadow_bitmap |= (0xf << ((i << 2) + 8)); - shadowbios_write |= 1; - } - if ((dev->regs[0x32]) & (1 << (bit + 1))) { - shadow_bitmap |= (0xf << ((i << 2) + 24)); - shadowbios |= 1; - } + if ((dev->regs[0x32]) & (1 << bit)) { + shadow_bitmap |= (0xf << ((i << 2) + 8)); + shadowbios_write |= 1; + } + if ((dev->regs[0x32]) & (1 << (bit + 1))) { + shadow_bitmap |= (0xf << ((i << 2) + 24)); + shadowbios |= 1; + } - mem_set_mem_state_both(base, 0x8000, state); + mem_set_mem_state_both(base, 0x8000, state); } vt82c49x_log("Shadow bitmap: %08X\n", shadow_bitmap); @@ -178,145 +177,142 @@ vt82c49x_recalc(vt82c49x_t *dev) mem_remap_top(0); switch (relocate) { - case 0x02: - if (!(shadow_bitmap & 0xfff0fff0)) - mem_remap_top(256); - break; - case 0x03: - if (!shadow_bitmap) - mem_remap_top(384); - break; + case 0x02: + if (!(shadow_bitmap & 0xfff0fff0)) + mem_remap_top(256); + break; + case 0x03: + if (!shadow_bitmap) + mem_remap_top(384); + break; } } - static void vt82c49x_write(uint16_t addr, uint8_t val, void *priv) { vt82c49x_t *dev = (vt82c49x_t *) priv; - uint8_t valxor; + uint8_t valxor; switch (addr) { - case 0xa8: - dev->index = val; - break; + case 0xa8: + dev->index = val; + break; - case 0xa9: - valxor = (val ^ dev->regs[dev->index]); - if (dev->index == 0x55) - dev->regs[dev->index] &= ~val; - else - dev->regs[dev->index] = val; + case 0xa9: + valxor = (val ^ dev->regs[dev->index]); + if (dev->index == 0x55) + dev->regs[dev->index] &= ~val; + else + dev->regs[dev->index] = val; - vt82c49x_log("dev->regs[0x%02x] = %02x\n", dev->index, val); + vt82c49x_log("dev->regs[0x%02x] = %02x\n", dev->index, val); - switch(dev->index) { - /* Wait States */ - case 0x03: - cpu_update_waitstates(); - break; + switch (dev->index) { + /* Wait States */ + case 0x03: + cpu_update_waitstates(); + break; - /* Shadow RAM and top of RAM relocation */ - case 0x30: - case 0x31: - case 0x32: - case 0x33: - case 0x40: - vt82c49x_recalc(dev); - break; + /* Shadow RAM and top of RAM relocation */ + case 0x30: + case 0x31: + case 0x32: + case 0x33: + case 0x40: + vt82c49x_recalc(dev); + break; - /* External Cache Enable(Based on the 486-VC-HD BIOS) */ - case 0x50: - cpu_cache_ext_enabled = (val & 0x84); - break; + /* External Cache Enable(Based on the 486-VC-HD BIOS) */ + case 0x50: + cpu_cache_ext_enabled = (val & 0x84); + break; - /* Software SMI */ - case 0x54: - if ((dev->regs[0x5b] & 0x80) && (valxor & 0x01) && (val & 0x01)) { - if (dev->regs[0x5b] & 0x20) - smi_raise(); - else - picint(1 << 15); - dev->regs[0x55] = 0x01; - } - break; + /* Software SMI */ + case 0x54: + if ((dev->regs[0x5b] & 0x80) && (valxor & 0x01) && (val & 0x01)) { + if (dev->regs[0x5b] & 0x20) + smi_raise(); + else + picint(1 << 15); + dev->regs[0x55] = 0x01; + } + break; - /* SMRAM */ - case 0x5b: - smram_disable_all(); + /* SMRAM */ + case 0x5b: + smram_disable_all(); - if (val & 0x80) { - smram_enable(dev->smram_smm, (val & 0x40) ? 0x00060000 : 0x00030000, 0x000a0000, 0x00020000, - 0, (val & 0x10)); - smram_enable(dev->smram_high, 0x000a0000, 0x000a0000, 0x00020000, - (val & 0x08), (val & 0x08)); - smram_enable(dev->smram_low, 0x00030000, 0x000a0000, 0x00020000, - (val & 0x02), 0); - } - break; + if (val & 0x80) { + smram_enable(dev->smram_smm, (val & 0x40) ? 0x00060000 : 0x00030000, 0x000a0000, 0x00020000, + 0, (val & 0x10)); + smram_enable(dev->smram_high, 0x000a0000, 0x000a0000, 0x00020000, + (val & 0x08), (val & 0x08)); + smram_enable(dev->smram_low, 0x00030000, 0x000a0000, 0x00020000, + (val & 0x02), 0); + } + break; - /* Edge/Level IRQ Control */ - case 0x62: case 0x63: - if (dev->index == 0x63) - pic_elcr_write(dev->index, val & 0xde, &pic2); - else { - pic_elcr_write(dev->index, val & 0xf8, &pic); - pic_elcr_set_enabled(val & 0x01); - } - break; + /* Edge/Level IRQ Control */ + case 0x62: + case 0x63: + if (dev->index == 0x63) + pic_elcr_write(dev->index, val & 0xde, &pic2); + else { + pic_elcr_write(dev->index, val & 0xf8, &pic); + pic_elcr_set_enabled(val & 0x01); + } + break; - /* Local Bus IDE Controller */ - case 0x71: - if (dev->has_ide) { - ide_pri_disable(); - ide_set_base(0, (val & 0x40) ? 0x170 : 0x1f0); - ide_set_side(0, (val & 0x40) ? 0x376 : 0x3f6); - if (val & 0x01) - ide_pri_enable(); - vt82c49x_log("VT82C496 IDE now %sabled as %sary\n", (val & 0x01) ? "en": "dis", - (val & 0x40) ? "second" : "prim"); - } - break; - } - break; + /* Local Bus IDE Controller */ + case 0x71: + if (dev->has_ide) { + ide_pri_disable(); + ide_set_base(0, (val & 0x40) ? 0x170 : 0x1f0); + ide_set_side(0, (val & 0x40) ? 0x376 : 0x3f6); + if (val & 0x01) + ide_pri_enable(); + vt82c49x_log("VT82C496 IDE now %sabled as %sary\n", (val & 0x01) ? "en" : "dis", + (val & 0x40) ? "second" : "prim"); + } + break; + } + break; } } - static uint8_t vt82c49x_read(uint16_t addr, void *priv) { - uint8_t ret = 0xff; + uint8_t ret = 0xff; vt82c49x_t *dev = (vt82c49x_t *) priv; switch (addr) { - case 0xa9: - /* Register 64h is jumper readout. */ - if (dev->index == 0x64) - ret = 0xff; - else if (dev->index == 0x63) - ret = pic_elcr_read(dev->index, &pic2) | (dev->regs[dev->index] & 0x01); - else if (dev->index == 0x62) - ret = pic_elcr_read(dev->index, &pic) | (dev->regs[dev->index] & 0x07); - else if (dev->index < 0x80) - ret = dev->regs[dev->index]; - break; + case 0xa9: + /* Register 64h is jumper readout. */ + if (dev->index == 0x64) + ret = 0xff; + else if (dev->index == 0x63) + ret = pic_elcr_read(dev->index, &pic2) | (dev->regs[dev->index] & 0x01); + else if (dev->index == 0x62) + ret = pic_elcr_read(dev->index, &pic) | (dev->regs[dev->index] & 0x07); + else if (dev->index < 0x80) + ret = dev->regs[dev->index]; + break; } return ret; } - static void vt82c49x_reset(void *priv) { uint16_t i; for (i = 0; i < 256; i++) - vt82c49x_write(i, 0x00, priv); + vt82c49x_write(i, 0x00, priv); } - static void vt82c49x_close(void *priv) { @@ -329,21 +325,20 @@ vt82c49x_close(void *priv) free(dev); } - static void * vt82c49x_init(const device_t *info) { vt82c49x_t *dev = (vt82c49x_t *) malloc(sizeof(vt82c49x_t)); memset(dev, 0x00, sizeof(vt82c49x_t)); - dev->smram_smm = smram_add(); - dev->smram_low = smram_add(); + dev->smram_smm = smram_add(); + dev->smram_low = smram_add(); dev->smram_high = smram_add(); dev->has_ide = info->local & 1; if (dev->has_ide) { - device_add(&ide_vlb_2ch_device); - ide_sec_disable(); + device_add(&ide_vlb_2ch_device); + ide_sec_disable(); } device_add(&port_92_device); @@ -359,57 +354,57 @@ vt82c49x_init(const device_t *info) } const device_t via_vt82c49x_device = { - .name = "VIA VT82C49X", + .name = "VIA VT82C49X", .internal_name = "via_vt82c49x", - .flags = 0, - .local = 0, - .init = vt82c49x_init, - .close = vt82c49x_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = vt82c49x_init, + .close = vt82c49x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_vt82c49x_pci_device = { - .name = "VIA VT82C49X PCI", + .name = "VIA VT82C49X PCI", .internal_name = "via_vt82c49x_pci", - .flags = DEVICE_PCI, - .local = 0, - .init = vt82c49x_init, - .close = vt82c49x_close, - .reset = vt82c49x_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = vt82c49x_init, + .close = vt82c49x_close, + .reset = vt82c49x_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_vt82c49x_ide_device = { - .name = "VIA VT82C49X (With IDE)", + .name = "VIA VT82C49X (With IDE)", .internal_name = "via_vt82c49x_ide", - .flags = 0, - .local = 1, - .init = vt82c49x_init, - .close = vt82c49x_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = vt82c49x_init, + .close = vt82c49x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_vt82c49x_pci_ide_device = { - .name = "VIA VT82C49X PCI (With IDE)", + .name = "VIA VT82C49X PCI (With IDE)", .internal_name = "via_vt82c49x_pci_ide", - .flags = DEVICE_PCI, - .local = 1, - .init = vt82c49x_init, - .close = vt82c49x_close, - .reset = vt82c49x_reset, + .flags = DEVICE_PCI, + .local = 1, + .init = vt82c49x_init, + .close = vt82c49x_close, + .reset = vt82c49x_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/via_vt82c505.c b/src/chipset/via_vt82c505.c index 5ce799ab6..c6fed0144 100644 --- a/src/chipset/via_vt82c505.c +++ b/src/chipset/via_vt82c505.c @@ -29,161 +29,163 @@ #include <86box/device.h> #include <86box/chipset.h> - -typedef struct vt82c505_t -{ - uint8_t index; - uint8_t pci_conf[256]; +typedef struct vt82c505_t { + uint8_t index; + uint8_t pci_conf[256]; } vt82c505_t; - static void vt82c505_write(int func, int addr, uint8_t val, void *priv) { - vt82c505_t *dev = (vt82c505_t *) priv; - uint8_t irq; + vt82c505_t *dev = (vt82c505_t *) priv; + uint8_t irq; const uint8_t irq_array[8] = { 0, 5, 9, 10, 11, 14, 15, 0 }; if (func != 0) - return; + return; - switch(addr) { - /* RX00-07h: Mandatory header field */ - case 0x04: - dev->pci_conf[addr] = (dev->pci_conf[addr] & 0xbf) | (val & 0x40); - break; - case 0x07: - dev->pci_conf[addr] &= ~(val & 0x90); - break; + switch (addr) { + /* RX00-07h: Mandatory header field */ + case 0x04: + dev->pci_conf[addr] = (dev->pci_conf[addr] & 0xbf) | (val & 0x40); + break; + case 0x07: + dev->pci_conf[addr] &= ~(val & 0x90); + break; - /* RX80-9F: VT82C505 internal configuration registers */ - case 0x80: - dev->pci_conf[addr] = (dev->pci_conf[addr] & 0x0f) | (val & 0xf0); - break; - case 0x81: case 0x84: case 0x85: case 0x87: - case 0x88: case 0x89: case 0x8a: case 0x8b: - case 0x8c: case 0x8d: case 0x8e: case 0x8f: - case 0x92: case 0x94: - dev->pci_conf[addr] = val; - break; - case 0x82: - dev->pci_conf[addr] = val & 0xdb; - break; - case 0x83: - dev->pci_conf[addr] = val & 0xf9; - break; - case 0x86: - dev->pci_conf[addr] = val & 0xef; - /* Bit 7 switches between the two PCI configuration mechanisms: - 0 = configuration mechanism 1, 1 = configuration mechanism 2 */ - pci_set_pmc(!(val & 0x80)); - break; - case 0x90: - dev->pci_conf[addr] = val; - irq = irq_array[val & 0x07]; - if ((val & 0x08) && (irq != 0)) - pci_set_irq_routing(PCI_INTC, irq); - else - pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED); + /* RX80-9F: VT82C505 internal configuration registers */ + case 0x80: + dev->pci_conf[addr] = (dev->pci_conf[addr] & 0x0f) | (val & 0xf0); + break; + case 0x81: + case 0x84: + case 0x85: + case 0x87: + case 0x88: + case 0x89: + case 0x8a: + case 0x8b: + case 0x8c: + case 0x8d: + case 0x8e: + case 0x8f: + case 0x92: + case 0x94: + dev->pci_conf[addr] = val; + break; + case 0x82: + dev->pci_conf[addr] = val & 0xdb; + break; + case 0x83: + dev->pci_conf[addr] = val & 0xf9; + break; + case 0x86: + dev->pci_conf[addr] = val & 0xef; + /* Bit 7 switches between the two PCI configuration mechanisms: + 0 = configuration mechanism 1, 1 = configuration mechanism 2 */ + pci_set_pmc(!(val & 0x80)); + break; + case 0x90: + dev->pci_conf[addr] = val; + irq = irq_array[val & 0x07]; + if ((val & 0x08) && (irq != 0)) + pci_set_irq_routing(PCI_INTC, irq); + else + pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED); - irq = irq_array[(val & 0x70) >> 4]; - if ((val & 0x80) && (irq != 0)) - pci_set_irq_routing(PCI_INTD, irq); - else - pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED); - break; - case 0x91: - dev->pci_conf[addr] = val; - irq = irq_array[val & 0x07]; - if ((val & 0x08) && (irq != 0)) - pci_set_irq_routing(PCI_INTA, irq); - else - pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED); + irq = irq_array[(val & 0x70) >> 4]; + if ((val & 0x80) && (irq != 0)) + pci_set_irq_routing(PCI_INTD, irq); + else + pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED); + break; + case 0x91: + dev->pci_conf[addr] = val; + irq = irq_array[val & 0x07]; + if ((val & 0x08) && (irq != 0)) + pci_set_irq_routing(PCI_INTA, irq); + else + pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED); - irq = irq_array[(val & 0x70) >> 4]; - if ((val & 0x80) && (irq != 0)) - pci_set_irq_routing(PCI_INTB, irq); - else - pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED); - break; - case 0x93: - dev->pci_conf[addr] = val & 0xe0; - break; + irq = irq_array[(val & 0x70) >> 4]; + if ((val & 0x80) && (irq != 0)) + pci_set_irq_routing(PCI_INTB, irq); + else + pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED); + break; + case 0x93: + dev->pci_conf[addr] = val & 0xe0; + break; } } - static uint8_t vt82c505_read(int func, int addr, void *priv) { vt82c505_t *dev = (vt82c505_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (func != 0) - return ret; + return ret; ret = dev->pci_conf[addr]; return ret; } - static void vt82c505_out(uint16_t addr, uint8_t val, void *priv) { vt82c505_t *dev = (vt82c505_t *) priv; if (addr == 0xa8) - dev->index = val; + dev->index = val; else if ((addr == 0xa9) && (dev->index >= 0x80) && (dev->index <= 0x9f)) - vt82c505_write(0, dev->index, val, priv); + vt82c505_write(0, dev->index, val, priv); } - static uint8_t vt82c505_in(uint16_t addr, void *priv) { vt82c505_t *dev = (vt82c505_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if ((addr == 0xa9) && (dev->index >= 0x80) && (dev->index <= 0x9f)) - ret = vt82c505_read(0, dev->index, priv); + ret = vt82c505_read(0, dev->index, priv); return ret; } - static void vt82c505_reset(void *priv) { vt82c505_t *dev = (vt82c505_t *) malloc(sizeof(vt82c505_t)); - int i; + int i; dev->pci_conf[0x04] = 0x07; dev->pci_conf[0x07] = 0x00; for (i = 0x80; i <= 0x9f; i++) { - switch (i) { - case 0x81: - vt82c505_write(0, i, 0x01, priv); - break; - case 0x84: - vt82c505_write(0, i, 0x03, priv); - break; - case 0x93: - vt82c505_write(0, i, 0x40, priv); - break; - default: - vt82c505_write(0, i, 0x00, priv); - break; - } + switch (i) { + case 0x81: + vt82c505_write(0, i, 0x01, priv); + break; + case 0x84: + vt82c505_write(0, i, 0x03, priv); + break; + case 0x93: + vt82c505_write(0, i, 0x40, priv); + break; + default: + vt82c505_write(0, i, 0x00, priv); + break; + } } pic_reset(); pic_set_pci_flag(1); } - static void vt82c505_close(void *priv) { @@ -192,7 +194,6 @@ vt82c505_close(void *priv) free(dev); } - static void * vt82c505_init(const device_t *info) { @@ -217,15 +218,15 @@ vt82c505_init(const device_t *info) } const device_t via_vt82c505_device = { - .name = "VIA VT82C505", + .name = "VIA VT82C505", .internal_name = "via_vt82c505", - .flags = DEVICE_PCI, - .local = 0, - .init = vt82c505_init, - .close = vt82c505_close, - .reset = vt82c505_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = vt82c505_init, + .close = vt82c505_close, + .reset = vt82c505_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/vl82c480.c b/src/chipset/vl82c480.c index ec4703399..fa5bdce7e 100644 --- a/src/chipset/vl82c480.c +++ b/src/chipset/vl82c480.c @@ -28,148 +28,146 @@ #include <86box/chipset.h> typedef struct { - uint8_t idx, - regs[256]; + uint8_t idx, + regs[256]; } vl82c480_t; - static int vl82c480_shflags(uint8_t access) { int ret = MEM_READ_EXTANY | MEM_WRITE_EXTANY; switch (access) { - case 0x00: - default: - ret = MEM_READ_EXTANY | MEM_WRITE_EXTANY; - break; - case 0x01: - ret = MEM_READ_EXTANY | MEM_WRITE_INTERNAL; - break; - case 0x02: - ret = MEM_READ_INTERNAL | MEM_WRITE_EXTANY; - break; - case 0x03: - ret = MEM_READ_INTERNAL | MEM_WRITE_INTERNAL; - break; + case 0x00: + default: + ret = MEM_READ_EXTANY | MEM_WRITE_EXTANY; + break; + case 0x01: + ret = MEM_READ_EXTANY | MEM_WRITE_INTERNAL; + break; + case 0x02: + ret = MEM_READ_INTERNAL | MEM_WRITE_EXTANY; + break; + case 0x03: + ret = MEM_READ_INTERNAL | MEM_WRITE_INTERNAL; + break; } return ret; } - static void vl82c480_recalc(vl82c480_t *dev) { - int i, j; + int i, j; uint32_t base; - uint8_t access; + uint8_t access; - shadowbios = 0; + shadowbios = 0; shadowbios_write = 0; for (i = 0; i < 6; i++) { for (j = 0; j < 8; j += 2) { - base = 0x000a0000 + (i << 16) + (j << 13); - access = (dev->regs[0x0d + i] >> j) & 3; - mem_set_mem_state(base, 0x4000, vl82c480_shflags(access)); - shadowbios |= ((base >= 0xe0000) && (access & 0x02)); - shadowbios_write |= ((base >= 0xe0000) && (access & 0x01)); - } + base = 0x000a0000 + (i << 16) + (j << 13); + access = (dev->regs[0x0d + i] >> j) & 3; + mem_set_mem_state(base, 0x4000, vl82c480_shflags(access)); + shadowbios |= ((base >= 0xe0000) && (access & 0x02)); + shadowbios_write |= ((base >= 0xe0000) && (access & 0x01)); + } } flushmmucache(); } - static void vl82c480_write(uint16_t addr, uint8_t val, void *p) { - vl82c480_t *dev = (vl82c480_t *)p; + vl82c480_t *dev = (vl82c480_t *) p; switch (addr) { - case 0xec: - dev->idx = val; - break; + case 0xec: + dev->idx = val; + break; - case 0xed: - if (dev->idx >= 0x01 && dev->idx <= 0x24) { - switch (dev->idx) { - default: - dev->regs[dev->idx] = val; - break; - case 0x04: - if (dev->regs[0x00] == 0x98) - dev->regs[dev->idx] = (dev->regs[dev->idx] & 0x08) | (val & 0xf7); - else - dev->regs[dev->idx] = val; - break; - case 0x05: - dev->regs[dev->idx] = (dev->regs[dev->idx] & 0x10) | (val & 0xef); - break; - case 0x07: - dev->regs[dev->idx] = (dev->regs[dev->idx] & 0x40) | (val & 0xbf); - break; - case 0x0d: case 0x0e: case 0x0f: case 0x10: - case 0x11: case 0x12: - dev->regs[dev->idx] = val; - vl82c480_recalc(dev); - break; - } - } - break; + case 0xed: + if (dev->idx >= 0x01 && dev->idx <= 0x24) { + switch (dev->idx) { + default: + dev->regs[dev->idx] = val; + break; + case 0x04: + if (dev->regs[0x00] == 0x98) + dev->regs[dev->idx] = (dev->regs[dev->idx] & 0x08) | (val & 0xf7); + else + dev->regs[dev->idx] = val; + break; + case 0x05: + dev->regs[dev->idx] = (dev->regs[dev->idx] & 0x10) | (val & 0xef); + break; + case 0x07: + dev->regs[dev->idx] = (dev->regs[dev->idx] & 0x40) | (val & 0xbf); + break; + case 0x0d: + case 0x0e: + case 0x0f: + case 0x10: + case 0x11: + case 0x12: + dev->regs[dev->idx] = val; + vl82c480_recalc(dev); + break; + } + } + break; - case 0xee: - if (mem_a20_alt) - outb(0x92, inb(0x92) & ~2); - break; + case 0xee: + if (mem_a20_alt) + outb(0x92, inb(0x92) & ~2); + break; } } - static uint8_t vl82c480_read(uint16_t addr, void *p) { - vl82c480_t *dev = (vl82c480_t *)p; - uint8_t ret = 0xff; + vl82c480_t *dev = (vl82c480_t *) p; + uint8_t ret = 0xff; switch (addr) { - case 0xec: - ret = dev->idx; - break; + case 0xec: + ret = dev->idx; + break; - case 0xed: - ret = dev->regs[dev->idx]; - break; + case 0xed: + ret = dev->regs[dev->idx]; + break; - case 0xee: - if (!mem_a20_alt) - outb(0x92, inb(0x92) | 2); - break; + case 0xee: + if (!mem_a20_alt) + outb(0x92, inb(0x92) | 2); + break; - case 0xef: - softresetx86(); - cpu_set_edx(); - break; + case 0xef: + softresetx86(); + cpu_set_edx(); + break; } return ret; } - static void vl82c480_close(void *p) { - vl82c480_t *dev = (vl82c480_t *)p; + vl82c480_t *dev = (vl82c480_t *) p; free(dev); } - static void * vl82c480_init(const device_t *info) { - vl82c480_t *dev = (vl82c480_t *)malloc(sizeof(vl82c480_t)); + vl82c480_t *dev = (vl82c480_t *) malloc(sizeof(vl82c480_t)); memset(dev, 0, sizeof(vl82c480_t)); dev->regs[0x00] = info->local; @@ -178,10 +176,10 @@ vl82c480_init(const device_t *info) dev->regs[0x03] = 0x88; dev->regs[0x06] = 0x1b; if (info->local == 0x98) - dev->regs[0x07] = 0x21; + dev->regs[0x07] = 0x21; dev->regs[0x08] = 0x38; - io_sethandler(0x00ec, 0x0004, vl82c480_read, NULL, NULL, vl82c480_write, NULL, NULL, dev); + io_sethandler(0x00ec, 0x0004, vl82c480_read, NULL, NULL, vl82c480_write, NULL, NULL, dev); device_add(&port_92_device); @@ -189,29 +187,29 @@ vl82c480_init(const device_t *info) } const device_t vl82c480_device = { - .name = "VLSI VL82c480", + .name = "VLSI VL82c480", .internal_name = "vl82c480", - .flags = 0, - .local = 0x90, - .init = vl82c480_init, - .close = vl82c480_close, - .reset = NULL, + .flags = 0, + .local = 0x90, + .init = vl82c480_init, + .close = vl82c480_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t vl82c486_device = { - .name = "VLSI VL82c486", + .name = "VLSI VL82c486", .internal_name = "vl82c486", - .flags = 0, - .local = 0x98, - .init = vl82c480_init, - .close = vl82c480_close, - .reset = NULL, + .flags = 0, + .local = 0x98, + .init = vl82c480_init, + .close = vl82c480_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/wd76c10.c b/src/chipset/wd76c10.c index 12b7e19a0..c4716e1d8 100644 --- a/src/chipset/wd76c10.c +++ b/src/chipset/wd76c10.c @@ -42,7 +42,7 @@ #include <86box/chipset.h> /* Lock/Unlock Procedures */ -#define LOCK dev->lock +#define LOCK dev->lock #define UNLOCKED !dev->lock #ifdef ENABLE_WD76C10_LOG @@ -52,15 +52,14 @@ wd76c10_log(const char *fmt, ...) { va_list ap; - if (wd76c10_do_log) - { + if (wd76c10_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define wd76c10_log(fmt, ...) +# define wd76c10_log(fmt, ...) #endif typedef struct @@ -77,92 +76,90 @@ typedef struct int lock; - fdc_t *fdc_controller; + fdc_t *fdc_controller; mem_mapping_t *mem_mapping; - serial_t *uart[2]; + serial_t *uart[2]; } wd76c10_t; -static void wd76c10_refresh_control(wd76c10_t *dev) +static void +wd76c10_refresh_control(wd76c10_t *dev) { serial_remove(dev->uart[1]); /* Serial B */ - switch ((dev->refresh_control >> 1) & 7) - { - case 1: - serial_setup(dev->uart[1], 0x3f8, 3); - break; - case 2: - serial_setup(dev->uart[1], 0x2f8, 3); - break; - case 3: - serial_setup(dev->uart[1], 0x3e8, 3); - break; - case 4: - serial_setup(dev->uart[1], 0x2e8, 3); - break; + switch ((dev->refresh_control >> 1) & 7) { + case 1: + serial_setup(dev->uart[1], 0x3f8, 3); + break; + case 2: + serial_setup(dev->uart[1], 0x2f8, 3); + break; + case 3: + serial_setup(dev->uart[1], 0x3e8, 3); + break; + case 4: + serial_setup(dev->uart[1], 0x2e8, 3); + break; } serial_remove(dev->uart[0]); /* Serial A */ - switch ((dev->refresh_control >> 5) & 7) - { - case 1: - serial_setup(dev->uart[0], 0x3f8, 4); - break; - case 2: - serial_setup(dev->uart[0], 0x2f8, 4); - break; - case 3: - serial_setup(dev->uart[0], 0x3e8, 4); - break; - case 4: - serial_setup(dev->uart[0], 0x2e8, 4); - break; + switch ((dev->refresh_control >> 5) & 7) { + case 1: + serial_setup(dev->uart[0], 0x3f8, 4); + break; + case 2: + serial_setup(dev->uart[0], 0x2f8, 4); + break; + case 3: + serial_setup(dev->uart[0], 0x3e8, 4); + break; + case 4: + serial_setup(dev->uart[0], 0x2e8, 4); + break; } lpt1_remove(); /* LPT */ - switch ((dev->refresh_control >> 9) & 3) - { - case 1: - lpt1_init(0x3bc); - lpt1_irq(7); - break; - case 2: - lpt1_init(0x378); - lpt1_irq(7); - break; - case 3: - lpt1_init(0x278); - lpt1_irq(7); - break; + switch ((dev->refresh_control >> 9) & 3) { + case 1: + lpt1_init(0x3bc); + lpt1_irq(7); + break; + case 2: + lpt1_init(0x378); + lpt1_irq(7); + break; + case 3: + lpt1_init(0x278); + lpt1_irq(7); + break; } } -static void wd76c10_split_addr(wd76c10_t *dev) +static void +wd76c10_split_addr(wd76c10_t *dev) { - switch ((dev->split_addr >> 8) & 3) - { - case 1: - if (((dev->shadow_ram >> 8) & 3) == 2) - mem_remap_top(256); - break; - case 2: - if (((dev->shadow_ram >> 8) & 3) == 1) - mem_remap_top(320); - break; - case 3: - if (((dev->shadow_ram >> 8) & 3) == 3) - mem_remap_top(384); - break; + switch ((dev->split_addr >> 8) & 3) { + case 1: + if (((dev->shadow_ram >> 8) & 3) == 2) + mem_remap_top(256); + break; + case 2: + if (((dev->shadow_ram >> 8) & 3) == 1) + mem_remap_top(320); + break; + case 3: + if (((dev->shadow_ram >> 8) & 3) == 3) + mem_remap_top(384); + break; } } -static void wd76c10_disk_chip_select(wd76c10_t *dev) +static void +wd76c10_disk_chip_select(wd76c10_t *dev) { ide_pri_disable(); - if (!(dev->disk_chip_select & 1)) - { + if (!(dev->disk_chip_select & 1)) { ide_set_base(0, !(dev->disk_chip_select & 0x0010) ? 0x1f0 : 0x170); ide_set_side(0, !(dev->disk_chip_select & 0x0010) ? 0x3f6 : 0x376); } @@ -173,259 +170,254 @@ static void wd76c10_disk_chip_select(wd76c10_t *dev) fdc_set_base(dev->fdc_controller, !(dev->disk_chip_select & 0x0010) ? FDC_PRIMARY_ADDR : FDC_SECONDARY_ADDR); } -static void wd76c10_shadow_recalc(wd76c10_t *dev) +static void +wd76c10_shadow_recalc(wd76c10_t *dev) { - switch ((dev->shadow_ram >> 14) & 3) - { - case 0: - mem_set_mem_state_both(0x20000, 0x80000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - break; - case 1: - mem_set_mem_state_both(0x80000, 0x20000, MEM_READ_DISABLED | MEM_WRITE_DISABLED); - break; - case 2: - mem_set_mem_state_both(0x40000, 0x60000, MEM_READ_DISABLED | MEM_WRITE_DISABLED); - break; - case 3: - mem_set_mem_state_both(0x20000, 0x80000, MEM_READ_DISABLED | MEM_WRITE_DISABLED); - break; + switch ((dev->shadow_ram >> 14) & 3) { + case 0: + mem_set_mem_state_both(0x20000, 0x80000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + break; + case 1: + mem_set_mem_state_both(0x80000, 0x20000, MEM_READ_DISABLED | MEM_WRITE_DISABLED); + break; + case 2: + mem_set_mem_state_both(0x40000, 0x60000, MEM_READ_DISABLED | MEM_WRITE_DISABLED); + break; + case 3: + mem_set_mem_state_both(0x20000, 0x80000, MEM_READ_DISABLED | MEM_WRITE_DISABLED); + break; } - switch ((dev->shadow_ram >> 8) & 3) - { - case 0: - mem_set_mem_state_both(0xe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - mem_set_mem_state_both(0xc0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - break; - case 1: - mem_set_mem_state_both(0xf0000, 0x10000, MEM_READ_INTERNAL | (!!(dev->shadow_ram & 0x1000) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL)); - break; - case 2: - mem_set_mem_state_both(0xe0000, 0x20000, MEM_READ_INTERNAL | (!!(dev->shadow_ram & 0x1000) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL)); - break; - case 3: - mem_set_mem_state_both(0x20000, 0x80000, MEM_READ_DISABLED | (!!(dev->shadow_ram & 0x1000) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL)); - break; + switch ((dev->shadow_ram >> 8) & 3) { + case 0: + mem_set_mem_state_both(0xe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + mem_set_mem_state_both(0xc0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + break; + case 1: + mem_set_mem_state_both(0xf0000, 0x10000, MEM_READ_INTERNAL | (!!(dev->shadow_ram & 0x1000) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL)); + break; + case 2: + mem_set_mem_state_both(0xe0000, 0x20000, MEM_READ_INTERNAL | (!!(dev->shadow_ram & 0x1000) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL)); + break; + case 3: + mem_set_mem_state_both(0x20000, 0x80000, MEM_READ_DISABLED | (!!(dev->shadow_ram & 0x1000) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL)); + break; } } static void wd76c10_write(uint16_t addr, uint16_t val, void *priv) { - wd76c10_t *dev = (wd76c10_t *)priv; + wd76c10_t *dev = (wd76c10_t *) priv; - if (UNLOCKED) - { - switch (addr) - { - case 0x1072: - dev->clk_control = val; - break; + if (UNLOCKED) { + switch (addr) { + case 0x1072: + dev->clk_control = val; + break; - case 0x1872: - dev->bus_timing_power_down_ctl = val; - break; + case 0x1872: + dev->bus_timing_power_down_ctl = val; + break; - case 0x2072: - dev->refresh_control = val; - wd76c10_refresh_control(dev); - break; + case 0x2072: + dev->refresh_control = val; + wd76c10_refresh_control(dev); + break; - case 0x2872: - dev->disk_chip_select = val; - wd76c10_disk_chip_select(dev); - break; + case 0x2872: + dev->disk_chip_select = val; + wd76c10_disk_chip_select(dev); + break; - case 0x3072: - dev->prog_chip_sel_addr = val; - break; + case 0x3072: + dev->prog_chip_sel_addr = val; + break; - case 0x3872: - dev->non_page_mode_dram_timing = val; - break; + case 0x3872: + dev->non_page_mode_dram_timing = val; + break; - case 0x4072: - dev->mem_control = val; - break; + case 0x4072: + dev->mem_control = val; + break; - case 0x4872: - dev->bank10staddr = val; - break; + case 0x4872: + dev->bank10staddr = val; + break; - case 0x5072: - dev->bank32staddr = val; - break; + case 0x5072: + dev->bank32staddr = val; + break; - case 0x5872: - dev->split_addr = val; - wd76c10_split_addr(dev); - break; + case 0x5872: + dev->split_addr = val; + wd76c10_split_addr(dev); + break; - case 0x6072: - dev->shadow_ram = val & 0xffbf; - wd76c10_shadow_recalc(dev); - break; + case 0x6072: + dev->shadow_ram = val & 0xffbf; + wd76c10_shadow_recalc(dev); + break; - case 0x6872: - dev->ems_control_low_address_boundry = val & 0xecff; - break; + case 0x6872: + dev->ems_control_low_address_boundry = val & 0xecff; + break; - case 0x7072: - dev->pmc_output = (val >> 8) & 0x00ff; - break; + case 0x7072: + dev->pmc_output = (val >> 8) & 0x00ff; + break; - case 0x7872: - dev->pmc_output = val & 0xff00; - break; + case 0x7872: + dev->pmc_output = val & 0xff00; + break; - case 0x8072: - dev->pmc_timer = val; - break; + case 0x8072: + dev->pmc_timer = val; + break; - case 0x8872: - dev->pmc_input = val; - break; + case 0x8872: + dev->pmc_input = val; + break; - case 0x9072: - dev->nmi_status = val & 0x00fc; - break; + case 0x9072: + dev->nmi_status = val & 0x00fc; + break; - case 0x9872: - dev->diagnostic = val & 0xfdff; - break; + case 0x9872: + dev->diagnostic = val & 0xfdff; + break; - case 0xa072: - dev->delay_line = val; - break; + case 0xa072: + dev->delay_line = val; + break; - case 0xc872: - dev->pmc_interrupt = val & 0xfcfc; - break; + case 0xc872: + dev->pmc_interrupt = val & 0xfcfc; + break; - case 0xf072: - dev->oscillator_40mhz = 0; - break; + case 0xf072: + dev->oscillator_40mhz = 0; + break; - case 0xf472: - dev->oscillator_40mhz = 1; - break; + case 0xf472: + dev->oscillator_40mhz = 1; + break; - case 0xf872: - dev->cache_flush = val; - flushmmucache(); - break; + case 0xf872: + dev->cache_flush = val; + flushmmucache(); + break; } wd76c10_log("WD76C10: dev->regs[%04x] = %04x\n", addr, val); } - switch (addr) - { - case 0xe072: - dev->ems_page_reg_pointer = val & 0x003f; - break; + switch (addr) { + case 0xe072: + dev->ems_page_reg_pointer = val & 0x003f; + break; - case 0xe872: - dev->ems_page_reg = val & 0x8fff; - break; + case 0xe872: + dev->ems_page_reg = val & 0x8fff; + break; - case 0xf073: - dev->lock_reg = val & 0x00ff; - LOCK = !(val & 0x00da); - break; + case 0xf073: + dev->lock_reg = val & 0x00ff; + LOCK = !(val & 0x00da); + break; } } static uint16_t wd76c10_read(uint16_t addr, void *priv) { - wd76c10_t *dev = (wd76c10_t *)priv; + wd76c10_t *dev = (wd76c10_t *) priv; wd76c10_log("WD76C10: R dev->regs[%04x]\n", addr); - switch (addr) - { - case 0x1072: - return dev->clk_control; + switch (addr) { + case 0x1072: + return dev->clk_control; - case 0x1872: - return dev->bus_timing_power_down_ctl; + case 0x1872: + return dev->bus_timing_power_down_ctl; - case 0x2072: - return dev->refresh_control; + case 0x2072: + return dev->refresh_control; - case 0x2872: - return dev->disk_chip_select; + case 0x2872: + return dev->disk_chip_select; - case 0x3072: - return dev->prog_chip_sel_addr; + case 0x3072: + return dev->prog_chip_sel_addr; - case 0x3872: - return dev->non_page_mode_dram_timing; + case 0x3872: + return dev->non_page_mode_dram_timing; - case 0x4072: - return dev->mem_control; + case 0x4072: + return dev->mem_control; - case 0x4872: - return dev->bank10staddr; + case 0x4872: + return dev->bank10staddr; - case 0x5072: - return dev->bank32staddr; + case 0x5072: + return dev->bank32staddr; - case 0x5872: - return dev->split_addr; + case 0x5872: + return dev->split_addr; - case 0x6072: - return dev->shadow_ram; + case 0x6072: + return dev->shadow_ram; - case 0x6872: - return dev->ems_control_low_address_boundry; + case 0x6872: + return dev->ems_control_low_address_boundry; - case 0x7072: - return (dev->pmc_output << 8) & 0xff00; + case 0x7072: + return (dev->pmc_output << 8) & 0xff00; - case 0x7872: - return (dev->pmc_output) & 0xff00; + case 0x7872: + return (dev->pmc_output) & 0xff00; - case 0x8072: - return dev->pmc_timer; + case 0x8072: + return dev->pmc_timer; - case 0x8872: - return dev->pmc_input; + case 0x8872: + return dev->pmc_input; - case 0x9072: - return dev->nmi_status; + case 0x9072: + return dev->nmi_status; - case 0x9872: - return dev->diagnostic; + case 0x9872: + return dev->diagnostic; - case 0xa072: - return dev->delay_line; + case 0xa072: + return dev->delay_line; - case 0xb872: - return (inb(0x040b) << 8) | inb(0x04d6); + case 0xb872: + return (inb(0x040b) << 8) | inb(0x04d6); - case 0xc872: - return dev->pmc_interrupt; + case 0xc872: + return dev->pmc_interrupt; - case 0xd072: - return dev->port_shadow; + case 0xd072: + return dev->port_shadow; - case 0xe072: - return dev->ems_page_reg_pointer; + case 0xe072: + return dev->ems_page_reg_pointer; - case 0xe872: - return dev->ems_page_reg; + case 0xe872: + return dev->ems_page_reg; - case 0xfc72: - return 0x0ff0; + case 0xfc72: + return 0x0ff0; - default: - return 0xffff; + default: + return 0xffff; } } static void wd76c10_close(void *priv) { - wd76c10_t *dev = (wd76c10_t *)priv; + wd76c10_t *dev = (wd76c10_t *) priv; free(dev); } @@ -433,12 +425,12 @@ wd76c10_close(void *priv) static void * wd76c10_init(const device_t *info) { - wd76c10_t *dev = (wd76c10_t *)malloc(sizeof(wd76c10_t)); + wd76c10_t *dev = (wd76c10_t *) malloc(sizeof(wd76c10_t)); memset(dev, 0, sizeof(wd76c10_t)); device_add(&port_92_inv_device); - dev->uart[0] = device_add_inst(&ns16450_device, 1); - dev->uart[1] = device_add_inst(&ns16450_device, 2); + dev->uart[0] = device_add_inst(&ns16450_device, 1); + dev->uart[1] = device_add_inst(&ns16450_device, 2); dev->fdc_controller = device_add(&fdc_at_device); device_add(&ide_isa_device); @@ -536,15 +528,15 @@ wd76c10_init(const device_t *info) } const device_t wd76c10_device = { - .name = "Western Digital WD76C10", + .name = "Western Digital WD76C10", .internal_name = "wd76c10", - .flags = 0, - .local = 0, - .init = wd76c10_init, - .close = wd76c10_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = wd76c10_init, + .close = wd76c10_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; From 9a3cabbe85a07a834c6192ce38feb6366d1e705e Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:13:28 -0400 Subject: [PATCH 357/386] clang-format in src/device/ --- src/device/bugger.c | 281 ++- src/device/cartridge.c | 118 +- src/device/cassette.c | 849 ++++----- src/device/clock_ics9xxx.c | 357 ++-- src/device/hasp.c | 342 ++-- src/device/hwm.c | 4 +- src/device/hwm_gl518sm.c | 249 ++- src/device/hwm_lm75.c | 152 +- src/device/hwm_lm78.c | 954 +++++----- src/device/hwm_vt82c686.c | 185 +- src/device/i2c.c | 261 ++- src/device/i2c_gpio.c | 143 +- src/device/ibm_5161.c | 1 - src/device/isamem.c | 991 +++++----- src/device/isapnp.c | 1317 ++++++------- src/device/isartc.c | 696 ++++--- src/device/keyboard.c | 311 ++-- src/device/keyboard_at.c | 3106 ++++++++++++++++--------------- src/device/keyboard_xt.c | 643 ++++--- src/device/mouse.c | 157 +- src/device/mouse_bus.c | 828 ++++---- src/device/mouse_ps2.c | 359 ++-- src/device/mouse_serial.c | 842 ++++----- src/device/pci_bridge.c | 784 ++++---- src/device/phoenix_486_jumper.c | 62 +- src/device/postcard.c | 83 +- src/device/serial.c | 2 +- src/device/smbus_ali7101.c | 291 ++- src/device/smbus_piix4.c | 438 +++-- 29 files changed, 7451 insertions(+), 7355 deletions(-) diff --git a/src/device/bugger.c b/src/device/bugger.c index bcea70af3..d346f2bd7 100644 --- a/src/device/bugger.c +++ b/src/device/bugger.c @@ -62,76 +62,69 @@ #include <86box/ui.h> #include <86box/bugger.h> - /* BugBugger registers. */ -#define BUG_CTRL 0 -# define CTRL_RLED 0x00 /* write to the RED LED block */ -# define CTRL_GLED 0x01 /* write to the GREEN LED block */ -# define CTRL_SEG1 0x02 /* write to the RIGHT 7SEG displays */ -# define CTRL_SEG2 0x04 /* write to the LEFT 7SEG displays */ -# define CTRL_SPORT 0x20 /* enable the serial port */ -# define CTRL_SPCFG 0x40 /* set up the serial port */ -# define CTRL_INIT 0x80 /* enable and reset the card */ -# define CTRL_RESET 0xff /* this resets the board */ -#define BUG_DATA 1 +#define BUG_CTRL 0 +#define CTRL_RLED 0x00 /* write to the RED LED block */ +#define CTRL_GLED 0x01 /* write to the GREEN LED block */ +#define CTRL_SEG1 0x02 /* write to the RIGHT 7SEG displays */ +#define CTRL_SEG2 0x04 /* write to the LEFT 7SEG displays */ +#define CTRL_SPORT 0x20 /* enable the serial port */ +#define CTRL_SPCFG 0x40 /* set up the serial port */ +#define CTRL_INIT 0x80 /* enable and reset the card */ +#define CTRL_RESET 0xff /* this resets the board */ +#define BUG_DATA 1 +static uint8_t bug_ctrl, /* control register */ + bug_data, /* data register */ + bug_ledr, bug_ledg, /* RED and GREEN LEDs */ + bug_seg1, bug_seg2, /* LEFT and RIGHT 7SEG displays */ + bug_spcfg; /* serial port configuration */ +#define FIFO_LEN 256 +static uint8_t bug_buff[FIFO_LEN], /* serial port data buffer */ + *bug_bptr; +#define UISTR_LEN 24 +static char bug_str[UISTR_LEN]; /* UI output string */ -static uint8_t bug_ctrl, /* control register */ - bug_data, /* data register */ - bug_ledr, bug_ledg, /* RED and GREEN LEDs */ - bug_seg1, bug_seg2, /* LEFT and RIGHT 7SEG displays */ - bug_spcfg; /* serial port configuration */ -# define FIFO_LEN 256 -static uint8_t bug_buff[FIFO_LEN], /* serial port data buffer */ - *bug_bptr; -# define UISTR_LEN 24 -static char bug_str[UISTR_LEN]; /* UI output string */ - - -extern void ui_sb_bugui(char *__str); - +extern void ui_sb_bugui(char *__str); #ifdef ENABLE_BUGGER_LOG int bugger_do_log = ENABLE_BUGGER_LOG; - static void bugger_log(const char *fmt, ...) { va_list ap; if (bugger_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define bugger_log(fmt, ...) +# define bugger_log(fmt, ...) #endif - /* Update the system's UI with the actual Bugger status. */ static void bug_setui(void) { /* Format all current info in a string. */ sprintf(bug_str, "%02X:%02X %c%c%c%c%c%c%c%c-%c%c%c%c%c%c%c%c", - bug_seg2, bug_seg1, - (bug_ledg&0x80)?'G':'g', (bug_ledg&0x40)?'G':'g', - (bug_ledg&0x20)?'G':'g', (bug_ledg&0x10)?'G':'g', - (bug_ledg&0x08)?'G':'g', (bug_ledg&0x04)?'G':'g', - (bug_ledg&0x02)?'G':'g', (bug_ledg&0x01)?'G':'g', - (bug_ledr&0x80)?'R':'r', (bug_ledr&0x40)?'R':'r', - (bug_ledr&0x20)?'R':'r', (bug_ledr&0x10)?'R':'r', - (bug_ledr&0x08)?'R':'r', (bug_ledr&0x04)?'R':'r', - (bug_ledr&0x02)?'R':'r', (bug_ledr&0x01)?'R':'r'); + bug_seg2, bug_seg1, + (bug_ledg & 0x80) ? 'G' : 'g', (bug_ledg & 0x40) ? 'G' : 'g', + (bug_ledg & 0x20) ? 'G' : 'g', (bug_ledg & 0x10) ? 'G' : 'g', + (bug_ledg & 0x08) ? 'G' : 'g', (bug_ledg & 0x04) ? 'G' : 'g', + (bug_ledg & 0x02) ? 'G' : 'g', (bug_ledg & 0x01) ? 'G' : 'g', + (bug_ledr & 0x80) ? 'R' : 'r', (bug_ledr & 0x40) ? 'R' : 'r', + (bug_ledr & 0x20) ? 'R' : 'r', (bug_ledr & 0x10) ? 'R' : 'r', + (bug_ledr & 0x08) ? 'R' : 'r', (bug_ledr & 0x04) ? 'R' : 'r', + (bug_ledr & 0x02) ? 'R' : 'r', (bug_ledr & 0x01) ? 'R' : 'r'); /* Send formatted string to the UI. */ ui_sb_bugui(bug_str); } - /* Flush the serial port. */ static void bug_spflsh(void) @@ -141,7 +134,6 @@ bug_spflsh(void) bug_bptr = bug_buff; } - /* Handle a write to the Serial Port Data register. */ static void bug_wsport(uint8_t val) @@ -152,9 +144,9 @@ bug_wsport(uint8_t val) bug_ctrl &= ~CTRL_SPORT; /* Delay while processing byte.. */ - if (bug_bptr == &bug_buff[FIFO_LEN-1]) { - /* Buffer full, gotta flush. */ - bug_spflsh(); + if (bug_bptr == &bug_buff[FIFO_LEN - 1]) { + /* Buffer full, gotta flush. */ + bug_spflsh(); } /* Write (store) the byte. */ @@ -166,7 +158,6 @@ bug_wsport(uint8_t val) bugger_log("BUGGER- sport %02x\n", val); } - /* Handle a write to the Serial Port Configuration register. */ static void bug_wspcfg(uint8_t val) @@ -176,50 +167,48 @@ bug_wspcfg(uint8_t val) bugger_log("BUGGER- spcfg %02x\n", bug_spcfg); } - /* Handle a write to the control register. */ static void bug_wctrl(uint8_t val) { if (val == CTRL_RESET) { - /* User wants us to reset. */ - bug_ctrl = CTRL_INIT; - bug_spcfg = 0x00; - bug_bptr = NULL; + /* User wants us to reset. */ + bug_ctrl = CTRL_INIT; + bug_spcfg = 0x00; + bug_bptr = NULL; } else { - /* If turning off the serial port, flush it. */ - if ((bug_ctrl & CTRL_SPORT) && !(val & CTRL_SPORT)) - bug_spflsh(); + /* If turning off the serial port, flush it. */ + if ((bug_ctrl & CTRL_SPORT) && !(val & CTRL_SPORT)) + bug_spflsh(); - /* FIXME: did they do this using an XOR of operation bits? --FvK */ + /* FIXME: did they do this using an XOR of operation bits? --FvK */ - if (val & CTRL_SPCFG) { - /* User wants to configure the serial port. */ - bug_ctrl &= ~(CTRL_SPORT|CTRL_SEG2|CTRL_SEG1|CTRL_GLED); - bug_ctrl |= CTRL_SPCFG; - } else if (val & CTRL_SPORT) { - /* User wants to talk to the serial port. */ - bug_ctrl &= ~(CTRL_SPCFG|CTRL_SEG2|CTRL_SEG1|CTRL_GLED); - bug_ctrl |= CTRL_SPORT; - if (bug_bptr == NULL) - bug_bptr = bug_buff; - } else if (val & CTRL_SEG2) { - /* User selected SEG2 (LEFT, Plus only) for output. */ - bug_ctrl &= ~(CTRL_SPCFG|CTRL_SPORT|CTRL_SEG1|CTRL_GLED); - bug_ctrl |= CTRL_SEG2; - } else if (val & CTRL_SEG1) { - /* User selected SEG1 (RIGHT) for output. */ - bug_ctrl &= ~(CTRL_SPCFG|CTRL_SPORT|CTRL_SEG2|CTRL_GLED); - bug_ctrl |= CTRL_SEG1; - } else if (val & CTRL_GLED) { - /* User selected the GREEN LEDs for output. */ - bug_ctrl &= ~(CTRL_SPCFG|CTRL_SPORT|CTRL_SEG2|CTRL_SEG1); - bug_ctrl |= CTRL_GLED; - } else { - /* User selected the RED LEDs for output. */ - bug_ctrl &= - ~(CTRL_SPCFG|CTRL_SPORT|CTRL_SEG2|CTRL_SEG1|CTRL_GLED); - } + if (val & CTRL_SPCFG) { + /* User wants to configure the serial port. */ + bug_ctrl &= ~(CTRL_SPORT | CTRL_SEG2 | CTRL_SEG1 | CTRL_GLED); + bug_ctrl |= CTRL_SPCFG; + } else if (val & CTRL_SPORT) { + /* User wants to talk to the serial port. */ + bug_ctrl &= ~(CTRL_SPCFG | CTRL_SEG2 | CTRL_SEG1 | CTRL_GLED); + bug_ctrl |= CTRL_SPORT; + if (bug_bptr == NULL) + bug_bptr = bug_buff; + } else if (val & CTRL_SEG2) { + /* User selected SEG2 (LEFT, Plus only) for output. */ + bug_ctrl &= ~(CTRL_SPCFG | CTRL_SPORT | CTRL_SEG1 | CTRL_GLED); + bug_ctrl |= CTRL_SEG2; + } else if (val & CTRL_SEG1) { + /* User selected SEG1 (RIGHT) for output. */ + bug_ctrl &= ~(CTRL_SPCFG | CTRL_SPORT | CTRL_SEG2 | CTRL_GLED); + bug_ctrl |= CTRL_SEG1; + } else if (val & CTRL_GLED) { + /* User selected the GREEN LEDs for output. */ + bug_ctrl &= ~(CTRL_SPCFG | CTRL_SPORT | CTRL_SEG2 | CTRL_SEG1); + bug_ctrl |= CTRL_GLED; + } else { + /* User selected the RED LEDs for output. */ + bug_ctrl &= ~(CTRL_SPCFG | CTRL_SPORT | CTRL_SEG2 | CTRL_SEG1 | CTRL_GLED); + } } /* Update the UI with active settings. */ @@ -227,7 +216,6 @@ bug_wctrl(uint8_t val) bug_setui(); } - /* Handle a write to the data register. */ static void bug_wdata(uint8_t val) @@ -235,27 +223,26 @@ bug_wdata(uint8_t val) bug_data = val; if (bug_ctrl & CTRL_SPCFG) - bug_wspcfg(val); - else if (bug_ctrl & CTRL_SPORT) - bug_wsport(val); - else { - if (bug_ctrl & CTRL_SEG2) - bug_seg2 = val; - else if (bug_ctrl & CTRL_SEG1) - bug_seg1 = val; - else if (bug_ctrl & CTRL_GLED) - bug_ledg = val; - else - bug_ledr = val; + bug_wspcfg(val); + else if (bug_ctrl & CTRL_SPORT) + bug_wsport(val); + else { + if (bug_ctrl & CTRL_SEG2) + bug_seg2 = val; + else if (bug_ctrl & CTRL_SEG1) + bug_seg1 = val; + else if (bug_ctrl & CTRL_GLED) + bug_ledg = val; + else + bug_ledr = val; - bugger_log("BUGGER- data %02x\n", bug_data); + bugger_log("BUGGER- data %02x\n", bug_data); } /* Update the UI with active settings. */ bug_setui(); } - /* Reset the ISA BusBugger controller. */ static void bug_reset(void) @@ -264,71 +251,70 @@ bug_reset(void) bug_data = 0x00; /* Clear the RED and GREEN LEDs. */ - bug_ledr = 0x00; bug_ledg = 0x00; + bug_ledr = 0x00; + bug_ledg = 0x00; /* Clear both 7SEG displays. */ - bug_seg1 = 0x00; bug_seg2 = 0x00; + bug_seg1 = 0x00; + bug_seg2 = 0x00; /* Reset the control register (updates UI.) */ bug_wctrl(CTRL_RESET); } - /* Handle a WRITE operation to one of our registers. */ static void bug_write(uint16_t port, uint8_t val, void *priv) { - switch (port-BUGGER_ADDR) { - case BUG_CTRL: /* control register */ - if (val == CTRL_RESET) { - /* Perform a full reset. */ - bug_reset(); - } else if (bug_ctrl & CTRL_INIT) { - /* Only allow writes if initialized. */ - bug_wctrl(val); - } - break; - - case BUG_DATA: /* data register */ - if (bug_ctrl & CTRL_INIT) { - bug_wdata(val); - } - break; + switch (port - BUGGER_ADDR) { + case BUG_CTRL: /* control register */ + if (val == CTRL_RESET) { + /* Perform a full reset. */ + bug_reset(); + } else if (bug_ctrl & CTRL_INIT) { + /* Only allow writes if initialized. */ + bug_wctrl(val); + } + break; + case BUG_DATA: /* data register */ + if (bug_ctrl & CTRL_INIT) { + bug_wdata(val); + } + break; } } - /* Handle a READ operation from one of our registers. */ static uint8_t bug_read(uint16_t port, void *priv) { uint8_t ret = 0xff; - if (bug_ctrl & CTRL_INIT) switch (port-BUGGER_ADDR) { - case BUG_CTRL: /* control register */ - ret = bug_ctrl; - break; + if (bug_ctrl & CTRL_INIT) + switch (port - BUGGER_ADDR) { + case BUG_CTRL: /* control register */ + ret = bug_ctrl; + break; - case BUG_DATA: /* data register */ - if (bug_ctrl & CTRL_SPCFG) { - ret = bug_spcfg; - } else if (bug_ctrl & CTRL_SPORT) { - ret = 0x00; /* input not supported */ - } else { - /* Just read the DIP switch. */ - ret = bug_data; - } - break; + case BUG_DATA: /* data register */ + if (bug_ctrl & CTRL_SPCFG) { + ret = bug_spcfg; + } else if (bug_ctrl & CTRL_SPORT) { + ret = 0x00; /* input not supported */ + } else { + /* Just read the DIP switch. */ + ret = bug_data; + } + break; - default: - break; - } + default: + break; + } - return(ret); + return (ret); } - /* Initialize the ISA BusBugger emulator. */ static void * bug_init(const device_t *info) @@ -339,31 +325,30 @@ bug_init(const device_t *info) bug_reset(); io_sethandler(BUGGER_ADDR, BUGGER_ADDRLEN, - bug_read, NULL, NULL, bug_write, NULL, NULL, NULL); + bug_read, NULL, NULL, bug_write, NULL, NULL, NULL); /* Just so its not NULL. */ - return(&bug_ctrl); + return (&bug_ctrl); } - /* Remove the ISA BusBugger emulator from the system. */ static void bug_close(UNUSED(void *priv)) { io_removehandler(BUGGER_ADDR, BUGGER_ADDRLEN, - bug_read, NULL, NULL, bug_write, NULL, NULL, NULL); + bug_read, NULL, NULL, bug_write, NULL, NULL, NULL); } const device_t bugger_device = { - .name = "ISA/PCI Bus Bugger", + .name = "ISA/PCI Bus Bugger", .internal_name = "bugger", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 0, - .init = bug_init, - .close = bug_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 0, + .init = bug_init, + .close = bug_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/device/cartridge.c b/src/device/cartridge.c index c4bd69cc2..ea043e0f4 100644 --- a/src/device/cartridge.c +++ b/src/device/cartridge.c @@ -29,43 +29,36 @@ #include <86box/machine.h> #include <86box/cartridge.h> - typedef struct { - uint8_t * buf; - uint32_t base; + uint8_t *buf; + uint32_t base; } cart_t; +char cart_fns[2][512]; -char cart_fns[2][512]; - - -static cart_t carts[2]; - -static mem_mapping_t cart_mappings[2]; +static cart_t carts[2]; +static mem_mapping_t cart_mappings[2]; #ifdef ENABLE_CARTRIDGE_LOG int cartridge_do_log = ENABLE_CARTRIDGE_LOG; - static void cartridge_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (cartridge_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (cartridge_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define cartridge_log(fmt, ...) +# define cartridge_log(fmt, ...) #endif - static uint8_t cart_read(uint32_t addr, void *priv) { @@ -74,22 +67,20 @@ cart_read(uint32_t addr, void *priv) return dev->buf[addr - dev->base]; } - static void cart_load_error(int drive, char *fn) { - cartridge_log("Cartridge: could not load '%s'\n",fn); + cartridge_log("Cartridge: could not load '%s'\n", fn); memset(cart_fns[drive], 0, sizeof(cart_fns[drive])); ui_sb_update_icon_state(SB_CARTRIDGE | drive, 1); } - static void cart_image_close(int drive) { if (carts[drive].buf != NULL) { - free(carts[drive].buf); - carts[drive].buf = NULL; + free(carts[drive].buf); + carts[drive].buf = NULL; } carts[drive].base = 0x00000000; @@ -97,11 +88,10 @@ cart_image_close(int drive) mem_mapping_disable(&cart_mappings[drive]); } - static void cart_image_load(int drive, char *fn) { - FILE *f; + FILE *f; uint32_t size; uint32_t base = 0x00000000; @@ -109,32 +99,32 @@ cart_image_load(int drive, char *fn) f = fopen(fn, "rb"); if (fseek(f, 0, SEEK_END) == -1) - fatal("cart_image_load(): Error seeking to the end of the file\n"); + fatal("cart_image_load(): Error seeking to the end of the file\n"); size = ftell(f); if (size < 0x1200) { - cartridge_log("cart_image_load(): File size %i is too small\n", size); - cart_load_error(drive, fn); - return; + cartridge_log("cart_image_load(): File size %i is too small\n", size); + cart_load_error(drive, fn); + return; } if (size & 0x00000fff) { - size -= 0x00000200; - fseek(f, 0x000001ce, SEEK_SET); - (void) !fread(&base, 1, 2, f); - base <<= 4; - fseek(f, 0x00000200, SEEK_SET); - carts[drive].buf = (uint8_t *) malloc(size); - memset(carts[drive].buf, 0x00, size); - (void) !fread(carts[drive].buf, 1, size, f); - fclose(f); + size -= 0x00000200; + fseek(f, 0x000001ce, SEEK_SET); + (void) !fread(&base, 1, 2, f); + base <<= 4; + fseek(f, 0x00000200, SEEK_SET); + carts[drive].buf = (uint8_t *) malloc(size); + memset(carts[drive].buf, 0x00, size); + (void) !fread(carts[drive].buf, 1, size, f); + fclose(f); } else { - base = drive ? 0xe0000 : 0xd0000; - if (size == 32768) - base += 0x8000; - fseek(f, 0x00000000, SEEK_SET); - carts[drive].buf = (uint8_t *) malloc(size); - memset(carts[drive].buf, 0x00, size); - (void) !fread(carts[drive].buf, 1, size, f); - fclose(f); + base = drive ? 0xe0000 : 0xd0000; + if (size == 32768) + base += 0x8000; + fseek(f, 0x00000000, SEEK_SET); + carts[drive].buf = (uint8_t *) malloc(size); + memset(carts[drive].buf, 0x00, size); + (void) !fread(carts[drive].buf, 1, size, f); + fclose(f); } cartridge_log("cart_image_load(): %s at %08X-%08X\n", fn, base, base + size - 1); @@ -144,7 +134,6 @@ cart_image_load(int drive, char *fn) mem_mapping_set_p(&cart_mappings[drive], &(carts[drive])); } - static void cart_load_common(int drive, char *fn, uint8_t hard_reset) { @@ -153,28 +142,26 @@ cart_load_common(int drive, char *fn, uint8_t hard_reset) cartridge_log("Cartridge: loading drive %d with '%s'\n", drive, fn); if (!fn) - return; + return; f = plat_fopen(fn, "rb"); if (f) { - fclose(f); - strcpy(cart_fns[drive], fn); - cart_image_load(drive, cart_fns[drive]); - /* On the real PCjr, inserting a cartridge causes a reset - in order to boot from the cartridge. */ - if (!hard_reset) - resetx86(); + fclose(f); + strcpy(cart_fns[drive], fn); + cart_image_load(drive, cart_fns[drive]); + /* On the real PCjr, inserting a cartridge causes a reset + in order to boot from the cartridge. */ + if (!hard_reset) + resetx86(); } else - cart_load_error(drive, fn); + cart_load_error(drive, fn); } - void cart_load(int drive, char *fn) { cart_load_common(drive, fn, 0); } - void cart_close(int drive) { @@ -185,7 +172,6 @@ cart_close(int drive) ui_sb_update_icon_state(SB_CARTRIDGE | drive, 1); } - void cart_reset(void) { @@ -195,14 +181,14 @@ cart_reset(void) cart_image_close(0); if (!machine_has_cartridge(machine)) - return; + return; for (i = 0; i < 2; i++) { - mem_mapping_add(&cart_mappings[i], 0x000d0000, 0x00002000, - cart_read,NULL,NULL, - NULL,NULL,NULL, - NULL, MEM_MAPPING_EXTERNAL, NULL); - mem_mapping_disable(&cart_mappings[i]); + mem_mapping_add(&cart_mappings[i], 0x000d0000, 0x00002000, + cart_read, NULL, NULL, + NULL, NULL, NULL, + NULL, MEM_MAPPING_EXTERNAL, NULL); + mem_mapping_disable(&cart_mappings[i]); } cart_load_common(0, cart_fns[0], 1); diff --git a/src/device/cassette.c b/src/device/cassette.c index 211909dcb..8d8f15c80 100644 --- a/src/device/cassette.c +++ b/src/device/cassette.c @@ -19,7 +19,6 @@ * Public License for more details. * *****************************************************************************/ - #include #include #include @@ -40,689 +39,691 @@ // #include - #define CAS_CLK 1193182 +pc_cassette_t *cassette; -pc_cassette_t * cassette; +char cassette_fname[512]; +char cassette_mode[512]; +unsigned long cassette_pos, cassette_srate; +int cassette_enable; +int cassette_append, cassette_pcm; +int cassette_ui_writeprot; -char cassette_fname[512]; -char cassette_mode[512]; -unsigned long cassette_pos, cassette_srate; -int cassette_enable; -int cassette_append, cassette_pcm; -int cassette_ui_writeprot; - - -static int cassette_cycles = -1; - - -static void pc_cas_reset (pc_cassette_t *cas); +static int cassette_cycles = -1; +static void pc_cas_reset(pc_cassette_t *cas); #ifdef ENABLE_CASSETTE_LOG int cassette_do_log = ENABLE_CASSETTE_LOG; - static void cassette_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (cassette_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (cassette_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define cassette_log(fmt, ...) +# define cassette_log(fmt, ...) #endif - -void pc_cas_init (pc_cassette_t *cas) +void +pc_cas_init(pc_cassette_t *cas) { - cas->save = 0; - cas->pcm = 0; + cas->save = 0; + cas->pcm = 0; - cas->motor = 0; - ui_sb_update_icon(SB_CASSETTE, 0); + cas->motor = 0; + ui_sb_update_icon(SB_CASSETTE, 0); - cas->position = 0; + cas->position = 0; - cas->position_save = 0; - cas->position_load = 0; + cas->position_save = 0; + cas->position_load = 0; - cas->data_out = 0; - cas->data_inp = 0; + cas->data_out = 0; + cas->data_inp = 0; - cas->pcm_out_vol = 64; - cas->pcm_out_val = 0; + cas->pcm_out_vol = 64; + cas->pcm_out_val = 0; - cas->cas_out_cnt = 0; - cas->cas_out_buf = 0; + cas->cas_out_cnt = 0; + cas->cas_out_buf = 0; - cas->cas_inp_cnt = 0; - cas->cas_inp_buf = 0; - cas->cas_inp_bit = 0; + cas->cas_inp_cnt = 0; + cas->cas_inp_buf = 0; + cas->cas_inp_bit = 0; - cas->clk = 0; + cas->clk = 0; - cas->clk_pcm = 0; + cas->clk_pcm = 0; - cas->clk_out = 0; - cas->clk_inp = 0; + cas->clk_out = 0; + cas->clk_inp = 0; - cas->srate = 44100; + cas->srate = 44100; - cas->close = 0; - cas->fname = NULL; - cas->fp = NULL; + cas->close = 0; + cas->fname = NULL; + cas->fp = NULL; - pc_cas_reset (cas); + pc_cas_reset(cas); } -void pc_cas_free (pc_cassette_t *cas) +void +pc_cas_free(pc_cassette_t *cas) { - free (cas->fname); + free(cas->fname); - if (cas->close) { - fclose (cas->fp); - } + if (cas->close) { + fclose(cas->fp); + } } -pc_cassette_t *pc_cas_new (void) +pc_cassette_t * +pc_cas_new(void) { - pc_cassette_t *cas; + pc_cassette_t *cas; - cas = malloc (sizeof (pc_cassette_t)); + cas = malloc(sizeof(pc_cassette_t)); - if (cas == NULL) { - return (NULL); - } + if (cas == NULL) { + return (NULL); + } - pc_cas_init (cas); + pc_cas_init(cas); - return (cas); + return (cas); } -void pc_cas_del (pc_cassette_t *cas) +void +pc_cas_del(pc_cassette_t *cas) { - if (cas != NULL) { - pc_cas_free (cas); - free (cas); - } + if (cas != NULL) { + pc_cas_free(cas); + free(cas); + } } -int pc_cas_set_fname (pc_cassette_t *cas, const char *fname) +int +pc_cas_set_fname(pc_cassette_t *cas, const char *fname) { - unsigned n; - const char * ext; + unsigned n; + const char *ext; - if (cas->close) - fclose (cas->fp); + if (cas->close) + fclose(cas->fp); - cas->close = 0; - cas->fp = NULL; + cas->close = 0; + cas->fp = NULL; - free (cas->fname); - cas->fname = NULL; + free(cas->fname); + cas->fname = NULL; - cas->position = 0; + cas->position = 0; - cas->position_save = 0; - cas->position_load = 0; + cas->position_save = 0; + cas->position_load = 0; - if (fname == NULL) { - ui_sb_update_icon_state(SB_CASSETTE, 1); - return (0); - } + if (fname == NULL) { + ui_sb_update_icon_state(SB_CASSETTE, 1); + return (0); + } - cas->fp = plat_fopen (fname, "r+b"); + cas->fp = plat_fopen(fname, "r+b"); - if (cas->fp == NULL) - cas->fp = plat_fopen (fname, "w+b"); + if (cas->fp == NULL) + cas->fp = plat_fopen(fname, "w+b"); - if (cas->fp == NULL) { - ui_sb_update_icon_state(SB_CASSETTE, 1); - return (1); - } + if (cas->fp == NULL) { + ui_sb_update_icon_state(SB_CASSETTE, 1); + return (1); + } - cas->close = 1; + cas->close = 1; - pc_cas_append (cas); + pc_cas_append(cas); - cas->position_save = cas->position; + cas->position_save = cas->position; - if (cas->save == 0) - pc_cas_set_position (cas, 0); + if (cas->save == 0) + pc_cas_set_position(cas, 0); - n = strlen (fname); + n = strlen(fname); - cas->fname = malloc ((n + 1) * sizeof(char)); + cas->fname = malloc((n + 1) * sizeof(char)); - if (cas->fname != NULL) - memcpy (cas->fname, fname, (n + 1) * sizeof(char)); + if (cas->fname != NULL) + memcpy(cas->fname, fname, (n + 1) * sizeof(char)); - if (n > 4) { - ext = fname + (n - 4); + if (n > 4) { + ext = fname + (n - 4); - /* Has to be 44.1 kHz, mono, 8-bit. */ - if (stricmp (ext, ".pcm") == 0) - pc_cas_set_pcm (cas, 1); - else if (stricmp (ext, ".raw") == 0) - pc_cas_set_pcm (cas, 1); - else if (stricmp (ext, ".wav") == 0) - pc_cas_set_pcm (cas, 1); - else if (stricmp (ext, ".cas") == 0) - pc_cas_set_pcm (cas, 0); - } + /* Has to be 44.1 kHz, mono, 8-bit. */ + if (stricmp(ext, ".pcm") == 0) + pc_cas_set_pcm(cas, 1); + else if (stricmp(ext, ".raw") == 0) + pc_cas_set_pcm(cas, 1); + else if (stricmp(ext, ".wav") == 0) + pc_cas_set_pcm(cas, 1); + else if (stricmp(ext, ".cas") == 0) + pc_cas_set_pcm(cas, 0); + } - return (0); + return (0); } -static -void pc_cas_reset (pc_cassette_t *cas) +static void +pc_cas_reset(pc_cassette_t *cas) { - unsigned i; + unsigned i; - cas->clk_pcm = 0; + cas->clk_pcm = 0; - cas->clk_out = cas->clk; - cas->clk_inp = 0; + cas->clk_out = cas->clk; + cas->clk_inp = 0; - cas->pcm_out_val = 0; + cas->pcm_out_val = 0; - cas->cas_out_cnt = 0; - cas->cas_out_buf = 0; + cas->cas_out_cnt = 0; + cas->cas_out_buf = 0; - cas->cas_inp_cnt = 0; - cas->cas_inp_buf = 0; - cas->cas_inp_bit = 0; + cas->cas_inp_cnt = 0; + cas->cas_inp_buf = 0; + cas->cas_inp_bit = 0; - for (i = 0; i < 3; i++) { - cas->pcm_inp_fir[i] = 0; - } + for (i = 0; i < 3; i++) { + cas->pcm_inp_fir[i] = 0; + } } -int pc_cas_get_mode (const pc_cassette_t *cas) +int +pc_cas_get_mode(const pc_cassette_t *cas) { - return (cas->save); + return (cas->save); } -void pc_cas_set_mode (pc_cassette_t *cas, int save) +void +pc_cas_set_mode(pc_cassette_t *cas, int save) { - save = (save != 0); + save = (save != 0); - if (cas->save == save) { - return; - } + if (cas->save == save) { + return; + } - if (cas->save) { - cas->position_save = cas->position; - cas->position = cas->position_load; - } - else { - cas->position_load = cas->position; - cas->position = cas->position_save; - } + if (cas->save) { + cas->position_save = cas->position; + cas->position = cas->position_load; + } else { + cas->position_load = cas->position; + cas->position = cas->position_save; + } - cas->save = save; + cas->save = save; - memset(cassette_mode, 0x00, sizeof(cassette_mode)); - if (save) - memcpy(cassette_mode, "save", strlen("save") + 1); - else - memcpy(cassette_mode, "load", strlen("load") + 1); + memset(cassette_mode, 0x00, sizeof(cassette_mode)); + if (save) + memcpy(cassette_mode, "save", strlen("save") + 1); + else + memcpy(cassette_mode, "load", strlen("load") + 1); - if (cas->fp != NULL) { - fflush (cas->fp); + if (cas->fp != NULL) { + fflush(cas->fp); - pc_cas_set_position (cas, cas->position); - } + pc_cas_set_position(cas, cas->position); + } - pc_cas_reset (cas); + pc_cas_reset(cas); } -int pc_cas_get_pcm (const pc_cassette_t *cas) +int +pc_cas_get_pcm(const pc_cassette_t *cas) { - return (cas->pcm); + return (cas->pcm); } -void pc_cas_set_pcm (pc_cassette_t *cas, int pcm) +void +pc_cas_set_pcm(pc_cassette_t *cas, int pcm) { - cas->pcm = (pcm != 0); + cas->pcm = (pcm != 0); - cassette_pcm = (pcm != 0); + cassette_pcm = (pcm != 0); - pc_cas_reset (cas); + pc_cas_reset(cas); } -unsigned long pc_cas_get_srate (const pc_cassette_t *cas) +unsigned long +pc_cas_get_srate(const pc_cassette_t *cas) { - return (cas->srate); + return (cas->srate); } -void pc_cas_set_srate (pc_cassette_t *cas, unsigned long srate) +void +pc_cas_set_srate(pc_cassette_t *cas, unsigned long srate) { - cas->srate = srate; + cas->srate = srate; - pc_cas_reset (cas); + pc_cas_reset(cas); } -void pc_cas_rewind (pc_cassette_t *cas) +void +pc_cas_rewind(pc_cassette_t *cas) { - if (cas->fp != NULL) { - rewind (cas->fp); - cas->position = 0; - } + if (cas->fp != NULL) { + rewind(cas->fp); + cas->position = 0; + } - pc_cas_reset (cas); + pc_cas_reset(cas); } -void pc_cas_append (pc_cassette_t *cas) +void +pc_cas_append(pc_cassette_t *cas) { - if (cas->fp != NULL) { - fseek (cas->fp, 0, SEEK_END); - cas->position = ftell (cas->fp); - } + if (cas->fp != NULL) { + fseek(cas->fp, 0, SEEK_END); + cas->position = ftell(cas->fp); + } - pc_cas_reset (cas); + pc_cas_reset(cas); } -unsigned long pc_cas_get_position (const pc_cassette_t *cas) +unsigned long +pc_cas_get_position(const pc_cassette_t *cas) { - return (cas->position); + return (cas->position); } -int pc_cas_set_position (pc_cassette_t *cas, unsigned long pos) +int +pc_cas_set_position(pc_cassette_t *cas, unsigned long pos) { - if (cas->fp == NULL) { - return (1); - } + if (cas->fp == NULL) { + return (1); + } - if (fseek (cas->fp, pos, SEEK_SET) != 0) { - return (1); - } + if (fseek(cas->fp, pos, SEEK_SET) != 0) { + return (1); + } - cas->position = pos; + cas->position = pos; - pc_cas_reset (cas); + pc_cas_reset(cas); - return (0); + return (0); } -static -void pc_cas_read_bit (pc_cassette_t *cas) +static void +pc_cas_read_bit(pc_cassette_t *cas) { - int val; + int val; - if (cas->cas_inp_cnt == 0) { - if (cas->fp == NULL) { - return; - } + if (cas->cas_inp_cnt == 0) { + if (cas->fp == NULL) { + return; + } - if (feof (cas->fp)) { - return; - } + if (feof(cas->fp)) { + return; + } - val = fgetc (cas->fp); + val = fgetc(cas->fp); - if (val == EOF) { - cassette_log ("cassette EOF at %lu\n", cas->position); - return; - } + if (val == EOF) { + cassette_log("cassette EOF at %lu\n", cas->position); + return; + } - cas->position += 1; + cas->position += 1; - cas->cas_inp_cnt = 8; - cas->cas_inp_buf = val; - } + cas->cas_inp_cnt = 8; + cas->cas_inp_buf = val; + } - cas->cas_inp_bit = ((cas->cas_inp_buf & 0x80) != 0); + cas->cas_inp_bit = ((cas->cas_inp_buf & 0x80) != 0); - cas->cas_inp_buf = (cas->cas_inp_buf << 1) & 0xff; - cas->cas_inp_cnt -= 1; + cas->cas_inp_buf = (cas->cas_inp_buf << 1) & 0xff; + cas->cas_inp_cnt -= 1; } -static -int pc_cas_read_smp (pc_cassette_t *cas) +static int +pc_cas_read_smp(pc_cassette_t *cas) { - int smp, *fir; + int smp, *fir; - if (feof (cas->fp)) { - return (0); - } + if (feof(cas->fp)) { + return (0); + } - smp = fgetc (cas->fp); + smp = fgetc(cas->fp); - if (smp == EOF) { - cassette_log ("cassette EOF at %lu\n", cas->position); - return (0); - } + if (smp == EOF) { + cassette_log("cassette EOF at %lu\n", cas->position); + return (0); + } - cas->position += 1; + cas->position += 1; - fir = cas->pcm_inp_fir; + fir = cas->pcm_inp_fir; - fir[0] = fir[1]; - fir[1] = fir[2]; - fir[2] = (smp & 0x80) ? (smp - 256) : smp; + fir[0] = fir[1]; + fir[1] = fir[2]; + fir[2] = (smp & 0x80) ? (smp - 256) : smp; - smp = (fir[0] + 2 * fir[1] + fir[2]) / 4; + smp = (fir[0] + 2 * fir[1] + fir[2]) / 4; - return (smp); + return (smp); } -static -void pc_cas_write_bit (pc_cassette_t *cas, unsigned char val) +static void +pc_cas_write_bit(pc_cassette_t *cas, unsigned char val) { - if (val && !cassette_ui_writeprot) { - cas->cas_out_buf |= (0x80 >> cas->cas_out_cnt); - } + if (val && !cassette_ui_writeprot) { + cas->cas_out_buf |= (0x80 >> cas->cas_out_cnt); + } - cas->cas_out_cnt += 1; + cas->cas_out_cnt += 1; - if (cas->cas_out_cnt >= 8) { - if (cas->fp != NULL) { - if (!cassette_ui_writeprot) - fputc (cas->cas_out_buf, cas->fp); - cas->position += 1; - } + if (cas->cas_out_cnt >= 8) { + if (cas->fp != NULL) { + if (!cassette_ui_writeprot) + fputc(cas->cas_out_buf, cas->fp); + cas->position += 1; + } - cas->cas_out_buf = 0; - cas->cas_out_cnt = 0; - } + cas->cas_out_buf = 0; + cas->cas_out_cnt = 0; + } } -static -void pc_cas_write_smp (pc_cassette_t *cas, int val) +static void +pc_cas_write_smp(pc_cassette_t *cas, int val) { - unsigned char smp; + unsigned char smp; - if (val < 0) { - smp = (val < -127) ? 0x80 : (val + 256); - } - else { - smp = (val > 127) ? 0x7f : val; - } + if (val < 0) { + smp = (val < -127) ? 0x80 : (val + 256); + } else { + smp = (val > 127) ? 0x7f : val; + } - if (!cassette_ui_writeprot) - fputc (smp, cas->fp); + if (!cassette_ui_writeprot) + fputc(smp, cas->fp); - cas->position += 1; + cas->position += 1; } -void pc_cas_set_motor (pc_cassette_t *cas, unsigned char val) +void +pc_cas_set_motor(pc_cassette_t *cas, unsigned char val) { - unsigned i; + unsigned i; - val = (val != 0); + val = (val != 0); - if (val == cas->motor) { - return; - } + if (val == cas->motor) { + return; + } - if ((val == 0) && cas->save && cas->pcm) { - for (i = 0; i < (cas->srate / 16); i++) { - pc_cas_write_smp (cas, 0); - } - } + if ((val == 0) && cas->save && cas->pcm) { + for (i = 0; i < (cas->srate / 16); i++) { + pc_cas_write_smp(cas, 0); + } + } - cassette_log ("cassette %S at %lu motor %s\n", (cas->fname != NULL) ? cas->fname : "", cas->position, val ? "on" : "off"); + cassette_log("cassette %S at %lu motor %s\n", (cas->fname != NULL) ? cas->fname : "", cas->position, val ? "on" : "off"); - cas->motor = val; + cas->motor = val; - if (cas->fp != NULL) { - fflush (cas->fp); + if (cas->fp != NULL) { + fflush(cas->fp); - pc_cas_set_position (cas, cas->position); - } + pc_cas_set_position(cas, cas->position); + } - pc_cas_reset (cas); + pc_cas_reset(cas); - if (cas->motor) - timer_set_delay_u64(&cas->timer, 8ULL * PITCONST); - else - timer_disable(&cas->timer); + if (cas->motor) + timer_set_delay_u64(&cas->timer, 8ULL * PITCONST); + else + timer_disable(&cas->timer); - ui_sb_update_icon(SB_CASSETTE, !!val); + ui_sb_update_icon(SB_CASSETTE, !!val); } -unsigned char pc_cas_get_inp (const pc_cassette_t *cas) +unsigned char +pc_cas_get_inp(const pc_cassette_t *cas) { - return (cas->data_inp); + return (cas->data_inp); } -void pc_cas_set_out (pc_cassette_t *cas, unsigned char val) +void +pc_cas_set_out(pc_cassette_t *cas, unsigned char val) { - unsigned long clk; + unsigned long clk; - val = (val != 0); + val = (val != 0); - if (cas->motor == 0) { - cas->data_inp = val; - return; - } + if (cas->motor == 0) { + cas->data_inp = val; + return; + } - if (cas->data_out == val) { - return; - } + if (cas->data_out == val) { + return; + } - cas->data_out = val; + cas->data_out = val; - if (cas->pcm) { - cas->pcm_out_val = val ? -cas->pcm_out_vol : cas->pcm_out_vol; - return; - } + if (cas->pcm) { + cas->pcm_out_val = val ? -cas->pcm_out_vol : cas->pcm_out_vol; + return; + } - if (cas->save == 0) { - return; - } + if (cas->save == 0) { + return; + } - if (val == 0) { - return; - } + if (val == 0) { + return; + } - clk = cas->clk - cas->clk_out; - cas->clk_out = cas->clk; + clk = cas->clk - cas->clk_out; + cas->clk_out = cas->clk; - if (clk < (CAS_CLK / 4000)) { - ; - } - else if (clk < ((3 * CAS_CLK) / 4000)) { - pc_cas_write_bit (cas, 0); - } - else if (clk < ((5 * CAS_CLK) / 4000)) { - pc_cas_write_bit (cas, 1); - } + if (clk < (CAS_CLK / 4000)) { + ; + } else if (clk < ((3 * CAS_CLK) / 4000)) { + pc_cas_write_bit(cas, 0); + } else if (clk < ((5 * CAS_CLK) / 4000)) { + pc_cas_write_bit(cas, 1); + } } -void pc_cas_print_state (const pc_cassette_t *cas) +void +pc_cas_print_state(const pc_cassette_t *cas) { - cassette_log ("%s %s %lu %s %lu\n", (cas->fname != NULL) ? cas->fname : "", cas->pcm ? "pcm" : "cas", cas->srate, cas->save ? "save" : "load", cas->position); + cassette_log("%s %s %lu %s %lu\n", (cas->fname != NULL) ? cas->fname : "", cas->pcm ? "pcm" : "cas", cas->srate, cas->save ? "save" : "load", cas->position); } -static -void pc_cas_clock_pcm (pc_cassette_t *cas, unsigned long cnt) +static void +pc_cas_clock_pcm(pc_cassette_t *cas, unsigned long cnt) { - unsigned long i, n; - int v = 0; + unsigned long i, n; + int v = 0; - n = cas->srate * cnt + cas->clk_pcm; + n = cas->srate * cnt + cas->clk_pcm; - cas->clk_pcm = n % CAS_CLK; + cas->clk_pcm = n % CAS_CLK; - n = n / CAS_CLK; + n = n / CAS_CLK; - if (n == 0) { - return; - } + if (n == 0) { + return; + } - if (cas->save) { - for (i = 0; i < n; i++) { - pc_cas_write_smp (cas, cas->pcm_out_val); - } - } - else { - for (i = 0; i < n; i++) { - v = pc_cas_read_smp (cas); - } + if (cas->save) { + for (i = 0; i < n; i++) { + pc_cas_write_smp(cas, cas->pcm_out_val); + } + } else { + for (i = 0; i < n; i++) { + v = pc_cas_read_smp(cas); + } - cas->data_inp = (v < 0) ? 0 : 1; - } + cas->data_inp = (v < 0) ? 0 : 1; + } } -void pc_cas_clock (pc_cassette_t *cas, unsigned long cnt) +void +pc_cas_clock(pc_cassette_t *cas, unsigned long cnt) { - cas->clk += cnt; + cas->clk += cnt; - if (cas->motor == 0) { - return; - } + if (cas->motor == 0) { + return; + } - if (cas->pcm) { - pc_cas_clock_pcm (cas, cnt); - return; - } + if (cas->pcm) { + pc_cas_clock_pcm(cas, cnt); + return; + } - if (cas->save) { - return; - } + if (cas->save) { + return; + } - if (cas->clk_inp > cnt) { - cas->clk_inp -= cnt; - return; - } + if (cas->clk_inp > cnt) { + cas->clk_inp -= cnt; + return; + } - cnt -= cas->clk_inp; + cnt -= cas->clk_inp; - cas->data_inp = !cas->data_inp; + cas->data_inp = !cas->data_inp; - if (cas->data_inp) { - pc_cas_read_bit (cas); - } + if (cas->data_inp) { + pc_cas_read_bit(cas); + } - if (cas->cas_inp_bit) { - cas->clk_inp = CAS_CLK / 2000; - } - else { - cas->clk_inp = CAS_CLK / 4000; - } + if (cas->cas_inp_bit) { + cas->clk_inp = CAS_CLK / 2000; + } else { + cas->clk_inp = CAS_CLK / 4000; + } - if (cas->clk_inp > cnt) { - cas->clk_inp -= cnt; - } + if (cas->clk_inp > cnt) { + cas->clk_inp -= cnt; + } } - -void pc_cas_advance (pc_cassette_t *cas) +void +pc_cas_advance(pc_cassette_t *cas) { int ticks; cpu_s = (CPU *) &cpu_f->cpus[cpu_effective]; if (cas->motor == 0) - return; + return; if (cassette_cycles == -1) - cassette_cycles = cycles; + cassette_cycles = cycles; if (cycles <= cassette_cycles) - ticks = (cassette_cycles - cycles); + ticks = (cassette_cycles - cycles); else - ticks = (cassette_cycles + (cpu_s->rspeed / 100) - cycles); + ticks = (cassette_cycles + (cpu_s->rspeed / 100) - cycles); cassette_cycles = cycles; pc_cas_clock(cas, ticks); } - static void cassette_close(void *p) { if (cassette != NULL) { - free(cassette); - cassette = NULL; + free(cassette); + cassette = NULL; } } - static void cassette_callback(void *p) { pc_cassette_t *cas = (pc_cassette_t *) p; - pc_cas_clock (cas, 8); + pc_cas_clock(cas, 8); if (cas->motor) - ui_sb_update_icon(SB_CASSETTE, 1); + ui_sb_update_icon(SB_CASSETTE, 1); timer_advance_u64(&cas->timer, 8ULL * PITCONST); } - static void * cassette_init(const device_t *info) { - cassette = NULL; + cassette = NULL; - if (cassette_pcm == 1) - cassette_pcm = -1; + if (cassette_pcm == 1) + cassette_pcm = -1; - cassette_log("CASSETTE: file=%s mode=%s pcm=%d srate=%lu pos=%lu append=%d\n", - (cassette_fname != NULL) ? cassette_fname : "", cassette_mode, cassette_pcm, cassette_srate, cassette_pos, cassette_append); + cassette_log("CASSETTE: file=%s mode=%s pcm=%d srate=%lu pos=%lu append=%d\n", + (cassette_fname != NULL) ? cassette_fname : "", cassette_mode, cassette_pcm, cassette_srate, cassette_pos, cassette_append); - cassette = pc_cas_new(); + cassette = pc_cas_new(); - if (cassette == NULL) { - cassette_log("ERROR: *** alloc failed\n"); - return NULL; - } + if (cassette == NULL) { + cassette_log("ERROR: *** alloc failed\n"); + return NULL; + } - if (strlen(cassette_fname) == 0) { - if (pc_cas_set_fname (cassette, NULL)) { - cassette_log("ERROR: *** opening file failed (%s)\n", cassette_fname); - } - } else { - if (pc_cas_set_fname (cassette, cassette_fname)) { - cassette_log("ERROR: *** opening file failed (%s)\n", cassette_fname); - } - } + if (strlen(cassette_fname) == 0) { + if (pc_cas_set_fname(cassette, NULL)) { + cassette_log("ERROR: *** opening file failed (%s)\n", cassette_fname); + } + } else { + if (pc_cas_set_fname(cassette, cassette_fname)) { + cassette_log("ERROR: *** opening file failed (%s)\n", cassette_fname); + } + } - if (strcmp (cassette_mode, "load") == 0) - pc_cas_set_mode (cassette, 0); - else if (strcmp (cassette_mode, "save") == 0) - pc_cas_set_mode (cassette, 1); - else { - cassette_log ("ERROR: *** unknown cassette mode (%s)\n", cassette_mode); - } + if (strcmp(cassette_mode, "load") == 0) + pc_cas_set_mode(cassette, 0); + else if (strcmp(cassette_mode, "save") == 0) + pc_cas_set_mode(cassette, 1); + else { + cassette_log("ERROR: *** unknown cassette mode (%s)\n", cassette_mode); + } - if (cassette_append) - pc_cas_append (cassette); - else - pc_cas_set_position (cassette, cassette_pos); + if (cassette_append) + pc_cas_append(cassette); + else + pc_cas_set_position(cassette, cassette_pos); - if (cassette_pcm >= 0) - pc_cas_set_pcm (cassette, cassette_pcm); + if (cassette_pcm >= 0) + pc_cas_set_pcm(cassette, cassette_pcm); - pc_cas_set_srate (cassette, cassette_srate); + pc_cas_set_srate(cassette, cassette_srate); - timer_add(&cassette->timer, cassette_callback, cassette, 0); + timer_add(&cassette->timer, cassette_callback, cassette, 0); - return cassette; + return cassette; } - const device_t cassette_device = { - .name = "IBM PC/PCjr Cassette Device", + .name = "IBM PC/PCjr Cassette Device", .internal_name = "cassette", - .flags = 0, - .local = 0, - .init = cassette_init, - .close = cassette_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = cassette_init, + .close = cassette_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/device/clock_ics9xxx.c b/src/device/clock_ics9xxx.c index da4de6c43..47d1301ee 100644 --- a/src/device/clock_ics9xxx.c +++ b/src/device/clock_ics9xxx.c @@ -27,78 +27,75 @@ #include "cpu.h" #include <86box/clock.h> - #ifdef ENABLE_ICS9xxx_LOG int ics9xxx_do_log = ENABLE_ICS9xxx_LOG; - static void ics9xxx_log(const char *fmt, ...) { va_list ap; if (ics9xxx_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } -#define ICS9xxx_MODEL(model) [model] = {.name = #model, +# define ICS9xxx_MODEL(model) [model] = { .name = # model, #else -#define ics9xxx_log(fmt, ...) -#define ICS9xxx_MODEL(model) [model] = { +# define ics9xxx_log(fmt, ...) +# define ICS9xxx_MODEL(model) [model] = { #endif -#define ICS9xxx_MODEL_END() }, -#define agp_div ram_mult /* temporarily saves space while neither field matters */ - - +#define ICS9xxx_MODEL_END() \ + } \ + , +#define agp_div ram_mult /* temporarily saves space while neither field matters */ typedef struct { - uint16_t bus: 15; - uint8_t ram_mult: 2; /* change to full float when this becomes useful */ - uint8_t pci_div: 3; + uint16_t bus : 15; + uint8_t ram_mult : 2; /* change to full float when this becomes useful */ + uint8_t pci_div : 3; } ics9xxx_frequency_t; typedef struct { #if defined(ENABLE_ICS9xxx_LOG) || defined(ENABLE_ICS9xxx_DETECT) - const char *name; /* populated by macro */ + const char *name; /* populated by macro */ #endif - uint8_t max_reg: 3; /* largest register index */ - uint8_t regs[7]; /* default registers */ - struct { /* for each hardware frequency select bit [FS0:FS4]: */ - uint8_t normal_reg: 3; /* which register (or -1) for non-inverted input (FSn) */ - uint8_t normal_bit: 3; /* which bit (0-7) for non-inverted input (FSn) */ - uint8_t inv_reg: 3; /* which register (or -1) for inverted input (FSn#) */ - uint8_t inv_bit: 3; /* which bit (0-7) for inverted input (FSn#) */ + uint8_t max_reg : 3; /* largest register index */ + uint8_t regs[7]; /* default registers */ + struct { /* for each hardware frequency select bit [FS0:FS4]: */ + uint8_t normal_reg : 3; /* which register (or -1) for non-inverted input (FSn) */ + uint8_t normal_bit : 3; /* which bit (0-7) for non-inverted input (FSn) */ + uint8_t inv_reg : 3; /* which register (or -1) for inverted input (FSn#) */ + uint8_t inv_bit : 3; /* which bit (0-7) for inverted input (FSn#) */ } fs_regs[5]; - uint8_t normal_bits_fixed: 1; /* set to 1 if the non-inverted bits are straps (hardware select only) */ - struct { /* hardware select bit, which should be cleared for hardware select (latched inputs), or set for programming */ - uint8_t normal_reg: 3; /* which register (or -1) */ - uint8_t normal_bit: 3; /* which bit (0-7) */ + uint8_t normal_bits_fixed : 1; /* set to 1 if the non-inverted bits are straps (hardware select only) */ + struct { /* hardware select bit, which should be cleared for hardware select (latched inputs), or set for programming */ + uint8_t normal_reg : 3; /* which register (or -1) */ + uint8_t normal_bit : 3; /* which bit (0-7) */ } hw_select; - uint8_t frequencies_ref; /* which other model to use the frequency table from (or 0) */ - const ics9xxx_frequency_t *frequencies; /* frequency table, if not using another model's table */ + uint8_t frequencies_ref; /* which other model to use the frequency table from (or 0) */ + const ics9xxx_frequency_t *frequencies; /* frequency table, if not using another model's table */ } ics9xxx_model_t; typedef struct { - uint8_t model_idx; + uint8_t model_idx; ics9xxx_model_t *model; - device_t *dyn_device; + device_t *dyn_device; ics9xxx_frequency_t *frequencies_ptr; - uint8_t regs[7]; - int8_t addr_register: 4; - uint8_t relevant_regs: 7; - uint8_t bus_match: 5; + uint8_t regs[7]; + int8_t addr_register : 4; + uint8_t relevant_regs : 7; + uint8_t bus_match : 5; } ics9xxx_t; - static const ics9xxx_model_t ics9xxx_models[] = { #ifdef ENABLE_ICS9xxx_DETECT ICS9xxx_MODEL(ICS9xxx_xx) - .max_reg = 6 - ICS9xxx_MODEL_END() + .max_reg + = 6 ICS9xxx_MODEL_END() #endif ICS9xxx_MODEL(ICS9150_08) .max_reg = 5, @@ -910,13 +907,11 @@ static const ics9xxx_model_t ics9xxx_models[] = { #endif }; - /* Don't enable the detection device here. Enable it further up near logging. */ #ifdef ENABLE_ICS9xxx_DETECT -static uint16_t detect_bus = 0; -static uint8_t detect_reg = 0; -static uint8_t discarded[ICS9xxx_MAX] = {0}; - +static uint16_t detect_bus = 0; +static uint8_t detect_reg = 0; +static uint8_t discarded[ICS9xxx_MAX] = { 0 }; static void ics9xxx_detect_reset(void *priv) @@ -924,71 +919,69 @@ ics9xxx_detect_reset(void *priv) pclog("Please enter the frequency set in the BIOS (7500 for 75.00 MHz)\nAnswer 0 if unsure or set to auto, I'll ask again next reset.\n"); scanf("%hu", &detect_bus); if ((detect_bus > 0) && (detect_bus < 1000)) - detect_bus *= 100; + detect_bus *= 100; pclog("Frequency interpreted as %d\n", detect_bus); } - static void ics9xxx_detect(ics9xxx_t *dev) { if (!detect_bus) { - pclog("Frequency not entered on this reset, ignoring change.\n"); - return; + pclog("Frequency not entered on this reset, ignoring change.\n"); + return; } if ((detect_reg == 0) && (dev->regs[detect_reg] >= 0xfe)) { - pclog("Register %d set to %02X, probably not it, trying %d instead\n", detect_reg, dev->regs[detect_reg], 3); - detect_reg = 3; - dev->relevant_regs = 1 << detect_reg; - return; + pclog("Register %d set to %02X, probably not it, trying %d instead\n", detect_reg, dev->regs[detect_reg], 3); + detect_reg = 3; + dev->relevant_regs = 1 << detect_reg; + return; } if (!(dev->regs[detect_reg] & 0x40)) - pclog("Bit 3 of register %d is clear, probably in hardware select mode!\n", detect_reg); + pclog("Bit 3 of register %d is clear, probably in hardware select mode!\n", detect_reg); - uint8_t i = 0, matches = 0, val, bitmask; + uint8_t i = 0, matches = 0, val, bitmask; ics9xxx_frequency_t *frequencies_ptr; - uint32_t delta; + uint32_t delta; for (uint8_t j = 0; j < ICS9xxx_MAX; j++) { - if (discarded[j]) - continue; - discarded[j] = 1; + if (discarded[j]) + continue; + discarded[j] = 1; - frequencies_ptr = (ics9xxx_frequency_t *) ics9xxx_models[ics9xxx_models[j].frequencies_ref ? ics9xxx_models[j].frequencies_ref : j].frequencies; - if (!frequencies_ptr) - continue; + frequencies_ptr = (ics9xxx_frequency_t *) ics9xxx_models[ics9xxx_models[j].frequencies_ref ? ics9xxx_models[j].frequencies_ref : j].frequencies; + if (!frequencies_ptr) + continue; - while (frequencies_ptr[i].bus) { - delta = ABS((int32_t) (detect_bus - frequencies_ptr[i].bus)); - if (delta <= 100) { - val = bitmask = 0; - for (uint8_t k = 0; k < sizeof(ics9xxx_models[j].fs_regs) / sizeof(ics9xxx_models[j].fs_regs[0]); k++) { - if (ics9xxx_models[j].fs_regs[k].normal_reg == detect_reg) { - bitmask |= 1 << k; - val |= (1 << k) * !!(dev->regs[detect_reg] & (1 << ics9xxx_models[j].fs_regs[k].normal_bit)); - } - } - if (bitmask && (val == (i & bitmask))) { - matches++; - discarded[j] = 0; - pclog("> Potential match for %s (frequency %d index %d)\n", ics9xxx_models[j].name, frequencies_ptr[i].bus, val); - } - } + while (frequencies_ptr[i].bus) { + delta = ABS((int32_t) (detect_bus - frequencies_ptr[i].bus)); + if (delta <= 100) { + val = bitmask = 0; + for (uint8_t k = 0; k < sizeof(ics9xxx_models[j].fs_regs) / sizeof(ics9xxx_models[j].fs_regs[0]); k++) { + if (ics9xxx_models[j].fs_regs[k].normal_reg == detect_reg) { + bitmask |= 1 << k; + val |= (1 << k) * !!(dev->regs[detect_reg] & (1 << ics9xxx_models[j].fs_regs[k].normal_bit)); + } + } + if (bitmask && (val == (i & bitmask))) { + matches++; + discarded[j] = 0; + pclog("> Potential match for %s (frequency %d index %d)\n", ics9xxx_models[j].name, frequencies_ptr[i].bus, val); + } + } - i++; - } + i++; + } } pclog("Found a total of %d matches for register %d value %02X and bus frequency %d\n", matches, detect_reg, dev->regs[detect_reg], detect_bus); if (matches == 0) { - pclog("Resetting list of discarded models since there were no matches.\n"); - memset(discarded, 0, sizeof(discarded)); + pclog("Resetting list of discarded models since there were no matches.\n"); + memset(discarded, 0, sizeof(discarded)); } } #endif - static uint8_t ics9xxx_start(void *bus, uint8_t addr, uint8_t read, void *priv) { @@ -1001,53 +994,51 @@ ics9xxx_start(void *bus, uint8_t addr, uint8_t read, void *priv) return 1; } - static uint8_t ics9xxx_read(void *bus, uint8_t addr, void *priv) { ics9xxx_t *dev = (ics9xxx_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (dev->addr_register < 0) { - dev->addr_register = -1; - ret = dev->model->max_reg + 1; + dev->addr_register = -1; + ret = dev->model->max_reg + 1; } #if 0 else if ((dev->model_idx == ICS9250_50) && (dev->addr_register == 0)) ret = dev->regs[dev->addr_register] & 0x0b; /* -50 reads back revision ID instead */ #endif else - ret = dev->regs[dev->addr_register]; + ret = dev->regs[dev->addr_register]; #ifdef ENABLE_ICS9xxx_LOG if (dev->addr_register < 0) - ics9xxx_log("ICS9xxx: read(%s) = %02X\n", (dev->addr_register == -1) ? "blocklen" : "command", ret); + ics9xxx_log("ICS9xxx: read(%s) = %02X\n", (dev->addr_register == -1) ? "blocklen" : "command", ret); else - ics9xxx_log("ICS9xxx: read(%x) = %02X\n", dev->addr_register, ret); + ics9xxx_log("ICS9xxx: read(%x) = %02X\n", dev->addr_register, ret); #endif if (dev->addr_register >= dev->model->max_reg) - dev->addr_register = 0; /* roll-over */ + dev->addr_register = 0; /* roll-over */ else - dev->addr_register++; + dev->addr_register++; return ret; } - static void ics9xxx_set(ics9xxx_t *dev, uint8_t val) { /* Get the active mode, which determines what to add to the static frequency bits we were passed. */ uint8_t hw_select = (dev->model->hw_select.normal_reg < 7) && !(dev->regs[dev->model->hw_select.normal_reg] & (1 << dev->model->hw_select.normal_bit)); if (hw_select) { - /* Hardware select mode: add strapped frequency bits. */ - val |= dev->bus_match; + /* Hardware select mode: add strapped frequency bits. */ + val |= dev->bus_match; } else { - /* Programmable mode: add register-defined frequency bits. */ - for (uint8_t i = 0; i < sizeof(dev->model->fs_regs) / sizeof(dev->model->fs_regs[0]); i++) { - if ((dev->model->fs_regs[i].normal_reg < 7) && (dev->regs[dev->model->fs_regs[i].normal_reg] & (1 << dev->model->fs_regs[i].normal_bit))) - val |= 1 << i; - } + /* Programmable mode: add register-defined frequency bits. */ + for (uint8_t i = 0; i < sizeof(dev->model->fs_regs) / sizeof(dev->model->fs_regs[0]); i++) { + if ((dev->model->fs_regs[i].normal_reg < 7) && (dev->regs[dev->model->fs_regs[i].normal_reg] & (1 << dev->model->fs_regs[i].normal_bit))) + val |= 1 << i; + } } uint16_t bus = dev->frequencies_ptr[val].bus; @@ -1057,7 +1048,6 @@ ics9xxx_set(ics9xxx_t *dev, uint8_t val) ics9xxx_log("ICS9xxx: set(%d) = hw=%d bus=%d ram=%d pci=%d\n", val, hw_select, bus, bus * dev->frequencies_ptr[val].ram_mult, pci); } - static uint8_t ics9xxx_write(void *bus, uint8_t addr, uint8_t data, void *priv) { @@ -1065,24 +1055,24 @@ ics9xxx_write(void *bus, uint8_t addr, uint8_t data, void *priv) #ifdef ENABLE_ICS9xxx_LOG if (dev->addr_register < 0) - ics9xxx_log("ICS9xxx: write(%s, %02X)\n", (dev->addr_register == -1) ? "blocklen" : "command", data); + ics9xxx_log("ICS9xxx: write(%s, %02X)\n", (dev->addr_register == -1) ? "blocklen" : "command", data); else - ics9xxx_log("ICS9xxx: write(%x, %02X)\n", dev->addr_register, data); + ics9xxx_log("ICS9xxx: write(%x, %02X)\n", dev->addr_register, data); #endif if (dev->addr_register >= 0) { - /* Preserve fixed bits. */ + /* Preserve fixed bits. */ #ifdef ENABLE_ICS9xxx_DETECT - if (dev->model != ICS9xxx_xx) + if (dev->model != ICS9xxx_xx) #endif - { - for (uint8_t i = 0; i < sizeof(dev->model->fs_regs) / sizeof(dev->model->fs_regs[0]); i++) { - if (dev->model->normal_bits_fixed && (dev->model->fs_regs[i].normal_reg == dev->addr_register)) - data = (dev->regs[dev->addr_register] & (1 << dev->model->fs_regs[i].normal_bit)) | (data & ~(1 << dev->model->fs_regs[i].normal_bit)); - if (dev->model->fs_regs[i].inv_reg == dev->addr_register) - data = (dev->regs[dev->addr_register] & (1 << dev->model->fs_regs[i].inv_bit)) | (data & ~(1 << dev->model->fs_regs[i].inv_bit)); - } - } + { + for (uint8_t i = 0; i < sizeof(dev->model->fs_regs) / sizeof(dev->model->fs_regs[0]); i++) { + if (dev->model->normal_bits_fixed && (dev->model->fs_regs[i].normal_reg == dev->addr_register)) + data = (dev->regs[dev->addr_register] & (1 << dev->model->fs_regs[i].normal_bit)) | (data & ~(1 << dev->model->fs_regs[i].normal_bit)); + if (dev->model->fs_regs[i].inv_reg == dev->addr_register) + data = (dev->regs[dev->addr_register] & (1 << dev->model->fs_regs[i].inv_bit)) | (data & ~(1 << dev->model->fs_regs[i].inv_bit)); + } + } #if 0 switch (dev->addr_register) { @@ -1112,15 +1102,15 @@ ics9xxx_write(void *bus, uint8_t addr, uint8_t data, void *priv) break; } #endif - dev->regs[dev->addr_register] = data; + dev->regs[dev->addr_register] = data; - /* Update frequency if a relevant register was written to. */ - if (dev->relevant_regs & (1 << dev->addr_register)) { - switch (dev->model_idx) { + /* Update frequency if a relevant register was written to. */ + if (dev->relevant_regs & (1 << dev->addr_register)) { + switch (dev->model_idx) { #ifdef ENABLE_ICS9xxx_DETECT - case ICS9xxx_xx: - ics9xxx_detect(dev); - break; + case ICS9xxx_xx: + ics9xxx_detect(dev); + break; #endif #if 0 case ICS9250_10: @@ -1138,44 +1128,44 @@ ics9xxx_write(void *bus, uint8_t addr, uint8_t data, void *priv) ics9xxx_set(dev, ((cpu_busspeed == 100000000) * 0x02) | ((cpu_busspeed > 100000000) * 0x01)); break; #endif - default: - ics9xxx_set(dev, 0x00); - break; - } - } + default: + ics9xxx_set(dev, 0x00); + break; + } + } } if (dev->addr_register >= dev->model->max_reg) - dev->addr_register = 0; /* roll-over */ + dev->addr_register = 0; /* roll-over */ else - dev->addr_register++; + dev->addr_register++; return 1; } - static uint8_t -ics9xxx_find_bus_match(ics9xxx_t *dev, uint32_t bus, uint8_t preset_mask, uint8_t preset) { - uint8_t best_match = 0; +ics9xxx_find_bus_match(ics9xxx_t *dev, uint32_t bus, uint8_t preset_mask, uint8_t preset) +{ + uint8_t best_match = 0; uint32_t delta, best_delta = -1; #ifdef ENABLE_ICS9xxx_DETECT if (dev->model_idx == ICS9xxx_xx) - return 0; + return 0; #endif bus /= 10000; uint8_t i = 0; while (dev->frequencies_ptr[i].bus) { - if ((i & preset_mask) == preset) { - delta = ABS((int32_t) (bus - dev->frequencies_ptr[i].bus)); - if (delta < best_delta) { - best_match = i; - best_delta = delta; - } - } + if ((i & preset_mask) == preset) { + delta = ABS((int32_t) (bus - dev->frequencies_ptr[i].bus)); + if (delta < best_delta) { + best_match = i; + best_delta = delta; + } + } - i++; + i++; } ics9xxx_log("ICS9xxx: find_match(%s, %d) = match=%d bus=%d\n", dev->model->name, bus, best_match, dev->frequencies_ptr[best_match].bus); @@ -1183,15 +1173,14 @@ ics9xxx_find_bus_match(ics9xxx_t *dev, uint32_t bus, uint8_t preset_mask, uint8_ return best_match; } - static void * ics9xxx_init(const device_t *info) { ics9xxx_t *dev = (ics9xxx_t *) malloc(sizeof(ics9xxx_t)); memset(dev, 0, sizeof(ics9xxx_t)); - dev->model_idx = info->local; - dev->model = (ics9xxx_model_t *) &ics9xxx_models[dev->model_idx]; + dev->model_idx = info->local; + dev->model = (ics9xxx_model_t *) &ics9xxx_models[dev->model_idx]; dev->dyn_device = (device_t *) info; memcpy(&dev->regs, &dev->model->regs, dev->model->max_reg + 1); @@ -1200,56 +1189,56 @@ ics9xxx_init(const device_t *info) uint8_t i; #ifdef ENABLE_ICS9xxx_DETECT for (i = ICS9xxx_xx + 1; i < ICS9xxx_MAX; i++) { - if (ics9xxx_models[i].frequencies_ref || !ics9xxx_models[i].name) - continue; - for (uint8_t j = 0; j < i; j++) { - if (ics9xxx_models[j].frequencies_ref || !ics9xxx_models[j].name) - continue; - if (!memcmp(&ics9xxx_models[i].frequencies, &ics9xxx_models[j].frequencies, sizeof(ics9xxx_models[i].frequencies))) - pclog("Optimization warning: %s and %s have duplicate tables\n", ics9xxx_models[j].name, ics9xxx_models[i].name); - } + if (ics9xxx_models[i].frequencies_ref || !ics9xxx_models[i].name) + continue; + for (uint8_t j = 0; j < i; j++) { + if (ics9xxx_models[j].frequencies_ref || !ics9xxx_models[j].name) + continue; + if (!memcmp(&ics9xxx_models[i].frequencies, &ics9xxx_models[j].frequencies, sizeof(ics9xxx_models[i].frequencies))) + pclog("Optimization warning: %s and %s have duplicate tables\n", ics9xxx_models[j].name, ics9xxx_models[i].name); + } } if (dev->model_idx == ICS9xxx_xx) { /* detection device */ - dev->relevant_regs = 1 << 0; /* register 0 matters the most on the detection device */ + dev->relevant_regs = 1 << 0; /* register 0 matters the most on the detection device */ - ics9xxx_detect_reset(dev); + ics9xxx_detect_reset(dev); } else #endif { /* regular device */ - dev->frequencies_ptr = (ics9xxx_frequency_t *) (dev->model->frequencies_ref ? ics9xxx_models[dev->model->frequencies_ref].frequencies : dev->model->frequencies); - if (!dev->frequencies_ptr) - fatal("ICS9xxx: NULL frequency table\n"); + dev->frequencies_ptr = (ics9xxx_frequency_t *) (dev->model->frequencies_ref ? ics9xxx_models[dev->model->frequencies_ref].frequencies : dev->model->frequencies); + if (!dev->frequencies_ptr) + fatal("ICS9xxx: NULL frequency table\n"); - /* Determine which frequency bits cannot be strapped (register only). */ - uint8_t register_only_bits = 0x00; - for (i = 0; i < sizeof(dev->model->fs_regs) / sizeof(dev->model->fs_regs[0]); i++) { - if (!dev->model->normal_bits_fixed && (dev->model->fs_regs[i].normal_reg < 7)) /* mark a normal, programmable bit as relevant */ - dev->relevant_regs |= 1 << dev->model->fs_regs[i].normal_reg; - if ((dev->model->fs_regs[i].normal_reg == 7) && (dev->model->fs_regs[i].inv_reg == 7)) /* mark as register only */ - register_only_bits |= 1 << i; - } + /* Determine which frequency bits cannot be strapped (register only). */ + uint8_t register_only_bits = 0x00; + for (i = 0; i < sizeof(dev->model->fs_regs) / sizeof(dev->model->fs_regs[0]); i++) { + if (!dev->model->normal_bits_fixed && (dev->model->fs_regs[i].normal_reg < 7)) /* mark a normal, programmable bit as relevant */ + dev->relevant_regs |= 1 << dev->model->fs_regs[i].normal_reg; + if ((dev->model->fs_regs[i].normal_reg == 7) && (dev->model->fs_regs[i].inv_reg == 7)) /* mark as register only */ + register_only_bits |= 1 << i; + } - /* Mark the hardware select bit's register as relevant, if there's one. */ - if (dev->model->hw_select.normal_reg < 7) - dev->relevant_regs |= 1 << dev->model->hw_select.normal_reg; + /* Mark the hardware select bit's register as relevant, if there's one. */ + if (dev->model->hw_select.normal_reg < 7) + dev->relevant_regs |= 1 << dev->model->hw_select.normal_reg; - /* Find bus speed match and set default register bits accordingly. */ - dev->bus_match = ics9xxx_find_bus_match(dev, cpu_busspeed, register_only_bits, 0x00); - for (i = 0; i < sizeof(dev->model->fs_regs) / sizeof(dev->model->fs_regs[0]); i++) { - if (dev->model->fs_regs[i].normal_reg < 7) { - if (dev->bus_match & (1 << i)) - dev->regs[dev->model->fs_regs[i].normal_reg] |= 1 << dev->model->fs_regs[i].normal_bit; - else - dev->regs[dev->model->fs_regs[i].normal_reg] &= ~(1 << dev->model->fs_regs[i].normal_bit); - } - if (dev->model->fs_regs[i].inv_reg < 7) { - if (dev->bus_match & (1 << i)) - dev->regs[dev->model->fs_regs[i].inv_reg] &= ~(1 << dev->model->fs_regs[i].inv_bit); - else - dev->regs[dev->model->fs_regs[i].inv_reg] |= 1 << dev->model->fs_regs[i].inv_bit; - } - } + /* Find bus speed match and set default register bits accordingly. */ + dev->bus_match = ics9xxx_find_bus_match(dev, cpu_busspeed, register_only_bits, 0x00); + for (i = 0; i < sizeof(dev->model->fs_regs) / sizeof(dev->model->fs_regs[0]); i++) { + if (dev->model->fs_regs[i].normal_reg < 7) { + if (dev->bus_match & (1 << i)) + dev->regs[dev->model->fs_regs[i].normal_reg] |= 1 << dev->model->fs_regs[i].normal_bit; + else + dev->regs[dev->model->fs_regs[i].normal_reg] &= ~(1 << dev->model->fs_regs[i].normal_bit); + } + if (dev->model->fs_regs[i].inv_reg < 7) { + if (dev->bus_match & (1 << i)) + dev->regs[dev->model->fs_regs[i].inv_reg] &= ~(1 << dev->model->fs_regs[i].inv_bit); + else + dev->regs[dev->model->fs_regs[i].inv_reg] |= 1 << dev->model->fs_regs[i].inv_bit; + } + } } i2c_sethandler(i2c_smbus, 0x69, 1, ics9xxx_start, ics9xxx_read, ics9xxx_write, NULL, dev); @@ -1257,7 +1246,6 @@ ics9xxx_init(const device_t *info) return dev; } - static void ics9xxx_close(void *priv) { @@ -1271,21 +1259,20 @@ ics9xxx_close(void *priv) free(dev); } - device_t * ics9xxx_get(uint8_t model) { device_t *dev = (device_t *) malloc(sizeof(device_t)); memset(dev, 0, sizeof(device_t)); - dev->name = "ICS9xxx-xx Clock Generator"; + dev->name = "ICS9xxx-xx Clock Generator"; dev->local = model; dev->flags = DEVICE_ISA; #ifdef ENABLE_ICS9xxx_DETECT if (model == ICS9xxx_xx) - dev->reset = ics9xxx_detect_reset; + dev->reset = ics9xxx_detect_reset; #endif - dev->init = ics9xxx_init; + dev->init = ics9xxx_init; dev->close = ics9xxx_close; return dev; diff --git a/src/device/hasp.c b/src/device/hasp.c index 299796a6d..7d7d92a53 100644 --- a/src/device/hasp.c +++ b/src/device/hasp.c @@ -30,14 +30,16 @@ #include <86box/lpt.h> #include <86box/device.h> -#define HASP_BYTEARRAY(...) {__VA_ARGS__} -#define HASP_TYPE(type, password_arr, prodinfo_arr) [type] = { \ - .password = (const uint8_t[]) password_arr, \ - .prodinfo = (const uint8_t[]) prodinfo_arr, \ - .password_size = sizeof((uint8_t[]) password_arr), \ - .prodinfo_size = sizeof((uint8_t[]) prodinfo_arr) \ - }, - +#define HASP_BYTEARRAY(...) \ + { \ + __VA_ARGS__ \ + } +#define HASP_TYPE(type, password_arr, prodinfo_arr) [type] = { \ + .password = (const uint8_t[]) password_arr, \ + .prodinfo = (const uint8_t[]) prodinfo_arr, \ + .password_size = sizeof((uint8_t[]) password_arr), \ + .prodinfo_size = sizeof((uint8_t[]) prodinfo_arr) \ +}, enum { HASP_STATE_NONE = 0, @@ -50,30 +52,28 @@ enum { HASP_TYPE_SAVQUEST = 0 }; - typedef struct { const uint8_t *password, *prodinfo; - const uint8_t password_size, prodinfo_size; + const uint8_t password_size, prodinfo_size; } hasp_type_t; typedef struct { - void *lpt; + void *lpt; const hasp_type_t *type; - int index, state, passindex, passmode, prodindex; - uint8_t tmppass[0x29], status; + int index, state, passindex, passmode, prodindex; + uint8_t tmppass[0x29], status; } hasp_t; static const hasp_type_t hasp_types[] = { HASP_TYPE(HASP_TYPE_SAVQUEST, - HASP_BYTEARRAY(0xc3, 0xd9, 0xd3, 0xfb, 0x9d, 0x89, 0xb9, 0xa1, 0xb3, 0xc1, 0xf1, 0xcd, 0xdf, 0x9d), - HASP_BYTEARRAY(0x51, 0x4c, 0x52, 0x4d, 0x53, 0x4e, 0x53, 0x4e, 0x53, 0x49, 0x53, 0x48, 0x53, 0x4b, 0x53, 0x4a, - 0x53, 0x43, 0x53, 0x45, 0x52, 0x46, 0x53, 0x43, 0x53, 0x41, 0xac, 0x40, 0x53, 0xbc, 0x53, 0x42, - 0x53, 0x57, 0x53, 0x5d, 0x52, 0x5e, 0x53, 0x5b, 0x53, 0x59, 0xac, 0x58, 0x53, 0xa4)) + HASP_BYTEARRAY(0xc3, 0xd9, 0xd3, 0xfb, 0x9d, 0x89, 0xb9, 0xa1, 0xb3, 0xc1, 0xf1, 0xcd, 0xdf, 0x9d), + HASP_BYTEARRAY(0x51, 0x4c, 0x52, 0x4d, 0x53, 0x4e, 0x53, 0x4e, 0x53, 0x49, 0x53, 0x48, 0x53, 0x4b, 0x53, 0x4a, + 0x53, 0x43, 0x53, 0x45, 0x52, 0x46, 0x53, 0x43, 0x53, 0x41, 0xac, 0x40, 0x53, 0xbc, 0x53, 0x42, + 0x53, 0x57, 0x53, 0x5d, 0x52, 0x5e, 0x53, 0x5b, 0x53, 0x59, 0xac, 0x58, 0x53, 0xa4)) }; - #ifdef ENABLE_HASP_LOG int hasp_do_log = ENABLE_HASP_LOG; @@ -83,16 +83,15 @@ hasp_log(const char *fmt, ...) va_list ap; if (hasp_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define hasp_log(fmt, ...) +# define hasp_log(fmt, ...) #endif - static void hasp_write_data(uint8_t val, void *priv) { @@ -101,161 +100,188 @@ hasp_write_data(uint8_t val, void *priv) hasp_log("HASP: write_data(%02X)\n", val); switch (dev->index) { - case 0: - if (val == 0xc6) - dev->index++; - else - dev->index = 0; - break; + case 0: + if (val == 0xc6) + dev->index++; + else + dev->index = 0; + break; - case 1: - if (val == 0xc7) - dev->index++; - else - dev->index = 0; - break; + case 1: + if (val == 0xc7) + dev->index++; + else + dev->index = 0; + break; - case 2: - if (val == 0xc6) { - dev->index++; - } else { - dev->index = 0; - dev->state = HASP_STATE_NONE; - } - break; + case 2: + if (val == 0xc6) { + dev->index++; + } else { + dev->index = 0; + dev->state = HASP_STATE_NONE; + } + break; - case 3: - dev->index = 0; - if (val == 0x80) { - dev->state = HASP_STATE_PASSWORD_BEGIN; - dev->passindex = 0; - return; - } - break; + case 3: + dev->index = 0; + if (val == 0x80) { + dev->state = HASP_STATE_PASSWORD_BEGIN; + dev->passindex = 0; + return; + } + break; } dev->status = 0; if (dev->state == HASP_STATE_READ) { - /* different passwords cause different values to be returned - but there are really only two passwords of interest - passmode 2 is used to verify that the dongle is responding correctly */ - if (dev->passmode == 2) { - switch (val) { - case 0x94: case 0x9e: case 0xa4: - case 0xb2: case 0xbe: case 0xd0: - return; + /* different passwords cause different values to be returned + but there are really only two passwords of interest + passmode 2 is used to verify that the dongle is responding correctly */ + if (dev->passmode == 2) { + switch (val) { + case 0x94: + case 0x9e: + case 0xa4: + case 0xb2: + case 0xbe: + case 0xd0: + return; - case 0x8a: case 0x8e: case 0xca: case 0xd2: - case 0xe2: case 0xf0: case 0xfc: - /* someone with access to the actual dongle could dump the true values - I've never seen it so I just determined the relevant bits instead - from the disassembly of the software - some of the keys are verified explicitly, the others implicitly - I guessed the implicit ones with a bit of trial and error */ - dev->status = 0x20; - return; - } - } + case 0x8a: + case 0x8e: + case 0xca: + case 0xd2: + case 0xe2: + case 0xf0: + case 0xfc: + /* someone with access to the actual dongle could dump the true values + I've never seen it so I just determined the relevant bits instead + from the disassembly of the software + some of the keys are verified explicitly, the others implicitly + I guessed the implicit ones with a bit of trial and error */ + dev->status = 0x20; + return; + } + } - switch (val) { - /* in passmode 0, some values remain unknown: 8a, 8e (inconclusive), 94, 96, 9a, a4, b2, be, c4, d2, d4 (inconclusive), e2, ec, f8, fc - this is less of a concern since the contents seem to decrypt correctly */ - case 0x88: - case 0x94: case 0x98: case 0x9c: case 0x9e: - case 0xa0: case 0xa4: case 0xaa: case 0xae: - case 0xb0: case 0xb2: case 0xbc: case 0xbe: - case 0xc2: case 0xc6: case 0xc8: case 0xce: - case 0xd0: case 0xd6: case 0xd8: case 0xdc: - case 0xe0: case 0xe6: case 0xea: case 0xee: - case 0xf2: case 0xf6: - /* again, just the relevant bits instead of the true values */ - dev->status = 0x20; - break; - } + switch (val) { + /* in passmode 0, some values remain unknown: 8a, 8e (inconclusive), 94, 96, 9a, a4, b2, be, c4, d2, d4 (inconclusive), e2, ec, f8, fc + this is less of a concern since the contents seem to decrypt correctly */ + case 0x88: + case 0x94: + case 0x98: + case 0x9c: + case 0x9e: + case 0xa0: + case 0xa4: + case 0xaa: + case 0xae: + case 0xb0: + case 0xb2: + case 0xbc: + case 0xbe: + case 0xc2: + case 0xc6: + case 0xc8: + case 0xce: + case 0xd0: + case 0xd6: + case 0xd8: + case 0xdc: + case 0xe0: + case 0xe6: + case 0xea: + case 0xee: + case 0xf2: + case 0xf6: + /* again, just the relevant bits instead of the true values */ + dev->status = 0x20; + break; + } } else if (dev->state == HASP_STATE_PASSWORD_END) { - if (val & 1) { - if ((dev->passmode == 1) && (val == 0x9d)) - dev->passmode = 2; - dev->state = HASP_STATE_READ; - } else if (dev->passmode == 1) { - dev->tmppass[dev->passindex++] = val; + if (val & 1) { + if ((dev->passmode == 1) && (val == 0x9d)) + dev->passmode = 2; + dev->state = HASP_STATE_READ; + } else if (dev->passmode == 1) { + dev->tmppass[dev->passindex++] = val; - if (dev->passindex == sizeof(dev->tmppass)) { - if ((dev->tmppass[0] == 0x9c) && (dev->tmppass[1] == 0x9e)) { - int i = 2; - dev->prodindex = 0; + if (dev->passindex == sizeof(dev->tmppass)) { + if ((dev->tmppass[0] == 0x9c) && (dev->tmppass[1] == 0x9e)) { + int i = 2; + dev->prodindex = 0; - do { - dev->prodindex = (dev->prodindex << 1) + ((dev->tmppass[i] >> 6) & 1); - } while ((i += 3) < sizeof(dev->tmppass)); + do { + dev->prodindex = (dev->prodindex << 1) + ((dev->tmppass[i] >> 6) & 1); + } while ((i += 3) < sizeof(dev->tmppass)); - dev->prodindex = (dev->prodindex - 0xc08) << 4; + dev->prodindex = (dev->prodindex - 0xc08) << 4; - hasp_log("HASP: Password prodindex = %d\n", dev->prodindex); + hasp_log("HASP: Password prodindex = %d\n", dev->prodindex); - if (dev->prodindex < (0x38 << 4)) - dev->passmode = 3; - } + if (dev->prodindex < (0x38 << 4)) + dev->passmode = 3; + } - dev->state = HASP_STATE_READ; - } - } + dev->state = HASP_STATE_READ; + } + } } else if ((dev->state == HASP_STATE_PASSWORD_BEGIN) && (val & 1)) { - dev->tmppass[dev->passindex++] = val; + dev->tmppass[dev->passindex++] = val; - if (dev->passindex == dev->type->password_size) { - dev->state = HASP_STATE_PASSWORD_END; - dev->passindex = 0; - dev->passmode = (int) !memcmp(dev->tmppass, dev->type->password, dev->type->password_size); - hasp_log("HASP: Password comparison result = %d\n", dev->passmode); - } + if (dev->passindex == dev->type->password_size) { + dev->state = HASP_STATE_PASSWORD_END; + dev->passindex = 0; + dev->passmode = (int) !memcmp(dev->tmppass, dev->type->password, dev->type->password_size); + hasp_log("HASP: Password comparison result = %d\n", dev->passmode); + } } } - static uint8_t hasp_read_status(void *priv) { hasp_t *dev = (hasp_t *) priv; if ((dev->state == HASP_STATE_READ) && (dev->passmode == 3)) { - /* passmode 3 is used to retrieve the product(s) information - it comes in two parts: header and product - the header has this format: - offset range purpose - 00 01 header type - 01 01-05 count of used product slots, must be 2 - 02 01-05 count of unused product slots - this is assumed to be 6-(count of used slots) - but it is not enforced here - however a total of 6 structures will be checked - 03 01-02 unknown - 04 01-46 country code - 05-0f 00 reserved - the used product slots have this format: - (the unused product slots must be entirely zeroes) - 00-01 0001-000a product ID, one must be 6, the other 0a - 02 0001-0003 unknown but must be 0001 - 04 01-05 HASP plug country ID - 05 01-02 unknown but must be 01 - 06 05 unknown - 07-0a any unknown, not used - 0b ff unknown - 0c ff unknown - 0d-0f 00 reserved - the read is performed by accessing an array of 16-bit big-endian values - and returning one bit at a time into bit 5 of the result - the 16-bit value is then XORed with 0x534d and the register index */ + /* passmode 3 is used to retrieve the product(s) information + it comes in two parts: header and product + the header has this format: + offset range purpose + 00 01 header type + 01 01-05 count of used product slots, must be 2 + 02 01-05 count of unused product slots + this is assumed to be 6-(count of used slots) + but it is not enforced here + however a total of 6 structures will be checked + 03 01-02 unknown + 04 01-46 country code + 05-0f 00 reserved + the used product slots have this format: + (the unused product slots must be entirely zeroes) + 00-01 0001-000a product ID, one must be 6, the other 0a + 02 0001-0003 unknown but must be 0001 + 04 01-05 HASP plug country ID + 05 01-02 unknown but must be 01 + 06 05 unknown + 07-0a any unknown, not used + 0b ff unknown + 0c ff unknown + 0d-0f 00 reserved + the read is performed by accessing an array of 16-bit big-endian values + and returning one bit at a time into bit 5 of the result + the 16-bit value is then XORed with 0x534d and the register index */ - if (dev->prodindex <= (dev->type->prodinfo_size * 8)) - dev->status = ((dev->type->prodinfo[(dev->prodindex - 1) >> 3] >> ((8 - dev->prodindex) & 7)) & 1) << 5; /* return defined info */ - else - dev->status = (((0x534d ^ ((dev->prodindex - 1) >> 4)) >> ((16 - dev->prodindex) & 15)) & 1) << 5; /* then just alternate between the two key values */ + if (dev->prodindex <= (dev->type->prodinfo_size * 8)) + dev->status = ((dev->type->prodinfo[(dev->prodindex - 1) >> 3] >> ((8 - dev->prodindex) & 7)) & 1) << 5; /* return defined info */ + else + dev->status = (((0x534d ^ ((dev->prodindex - 1) >> 4)) >> ((16 - dev->prodindex) & 15)) & 1) << 5; /* then just alternate between the two key values */ - hasp_log("HASP: Reading %02X from prodindex %d\n", dev->status, dev->prodindex); + hasp_log("HASP: Reading %02X from prodindex %d\n", dev->status, dev->prodindex); - dev->prodindex++; + dev->prodindex++; } hasp_log("HASP: read_status() = %02X\n", dev->status); @@ -263,7 +289,6 @@ hasp_read_status(void *priv) return dev->status; } - static void * hasp_init(void *lpt, int type) { @@ -272,7 +297,7 @@ hasp_init(void *lpt, int type) hasp_log("HASP: init(%d)\n", type); - dev->lpt = lpt; + dev->lpt = lpt; dev->type = &hasp_types[type]; dev->status = 0x80; @@ -280,14 +305,12 @@ hasp_init(void *lpt, int type) return dev; } - static void * hasp_init_savquest(void *lpt) { return hasp_init(lpt, HASP_TYPE_SAVQUEST); } - static void hasp_close(void *priv) { @@ -298,15 +321,14 @@ hasp_close(void *priv) free(dev); } - const lpt_device_t lpt_hasp_savquest_device = { - .name = "Protection Dongle for Savage Quest", + .name = "Protection Dongle for Savage Quest", .internal_name = "dongle_savquest", - .init = hasp_init_savquest, - .close = hasp_close, - .write_data = hasp_write_data, - .write_ctrl = NULL, - .read_data = NULL, - .read_status = hasp_read_status, - .read_ctrl = NULL + .init = hasp_init_savquest, + .close = hasp_close, + .write_data = hasp_write_data, + .write_ctrl = NULL, + .read_data = NULL, + .read_status = hasp_read_status, + .read_ctrl = NULL }; diff --git a/src/device/hwm.c b/src/device/hwm.c index 83ac74699..5d9950285 100644 --- a/src/device/hwm.c +++ b/src/device/hwm.c @@ -27,10 +27,8 @@ #include <86box/machine.h> #include <86box/hwm.h> - /* Refer to specific hardware monitor implementations for the meaning of hwm_values. */ -hwm_values_t hwm_values; - +hwm_values_t hwm_values; uint16_t hwm_get_vcore() diff --git a/src/device/hwm_gl518sm.c b/src/device/hwm_gl518sm.c index 102026294..99318ae6f 100644 --- a/src/device/hwm_gl518sm.c +++ b/src/device/hwm_gl518sm.c @@ -28,69 +28,62 @@ #include <86box/i2c.h> #include <86box/hwm.h> - -#define CLAMP(a, min, max) (((a) < (min)) ? (min) : (((a) > (max)) ? (max) : (a))) +#define CLAMP(a, min, max) (((a) < (min)) ? (min) : (((a) > (max)) ? (max) : (a))) /* Formulas and factors derived from Linux's gl518sm.c driver. */ -#define GL518SM_RPM_TO_REG(r, d) ((r) ? CLAMP((480000 + (r) * (d) / 2) / (r) * (d), 1, 255) : 0) -#define GL518SM_VOLTAGE_TO_REG(v) ((uint8_t) round((v) / 19.0)) -#define GL518SM_VDD_TO_REG(v) ((uint8_t) (((v) * 4) / 95.0)) - +#define GL518SM_RPM_TO_REG(r, d) ((r) ? CLAMP((480000 + (r) * (d) / 2) / (r) * (d), 1, 255) : 0) +#define GL518SM_VOLTAGE_TO_REG(v) ((uint8_t) round((v) / 19.0)) +#define GL518SM_VDD_TO_REG(v) ((uint8_t) (((v) *4) / 95.0)) typedef struct { - uint32_t local; - hwm_values_t *values; + uint32_t local; + hwm_values_t *values; uint16_t regs[32]; - uint8_t addr_register: 5; + uint8_t addr_register : 5; - uint8_t i2c_addr: 7, i2c_state: 2, i2c_enabled: 1; + uint8_t i2c_addr : 7, i2c_state : 2, i2c_enabled : 1; } gl518sm_t; - -static uint8_t gl518sm_i2c_start(void *bus, uint8_t addr, uint8_t read, void *priv); -static uint8_t gl518sm_i2c_read(void *bus, uint8_t addr, void *priv); -static uint16_t gl518sm_read(gl518sm_t *dev, uint8_t reg); -static uint8_t gl518sm_i2c_write(void *bus, uint8_t addr, uint8_t data, void *priv); -static uint8_t gl518sm_write(gl518sm_t *dev, uint8_t reg, uint16_t val); -static void gl518sm_reset(gl518sm_t *dev); - +static uint8_t gl518sm_i2c_start(void *bus, uint8_t addr, uint8_t read, void *priv); +static uint8_t gl518sm_i2c_read(void *bus, uint8_t addr, void *priv); +static uint16_t gl518sm_read(gl518sm_t *dev, uint8_t reg); +static uint8_t gl518sm_i2c_write(void *bus, uint8_t addr, uint8_t data, void *priv); +static uint8_t gl518sm_write(gl518sm_t *dev, uint8_t reg, uint16_t val); +static void gl518sm_reset(gl518sm_t *dev); #ifdef ENABLE_GL518SM_LOG int gl518sm_do_log = ENABLE_GL518SM_LOG; - static void gl518sm_log(const char *fmt, ...) { va_list ap; if (gl518sm_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define gl518sm_log(fmt, ...) +# define gl518sm_log(fmt, ...) #endif - static void gl518sm_remap(gl518sm_t *dev, uint8_t addr) { gl518sm_log("GL518SM: remapping to SMBus %02Xh\n", addr); if (dev->i2c_enabled) - i2c_removehandler(i2c_smbus, dev->i2c_addr, 1, gl518sm_i2c_start, gl518sm_i2c_read, gl518sm_i2c_write, NULL, dev); + i2c_removehandler(i2c_smbus, dev->i2c_addr, 1, gl518sm_i2c_start, gl518sm_i2c_read, gl518sm_i2c_write, NULL, dev); if (addr < 0x80) - i2c_sethandler(i2c_smbus, addr, 1, gl518sm_i2c_start, gl518sm_i2c_read, gl518sm_i2c_write, NULL, dev); + i2c_sethandler(i2c_smbus, addr, 1, gl518sm_i2c_start, gl518sm_i2c_read, gl518sm_i2c_write, NULL, dev); - dev->i2c_addr = addr & 0x7f; + dev->i2c_addr = addr & 0x7f; dev->i2c_enabled = !(addr & 0x80); } - static uint8_t gl518sm_i2c_start(void *bus, uint8_t addr, uint8_t read, void *priv) { @@ -101,29 +94,27 @@ gl518sm_i2c_start(void *bus, uint8_t addr, uint8_t read, void *priv) return 1; } - static uint8_t gl518sm_i2c_read(void *bus, uint8_t addr, void *priv) { - gl518sm_t *dev = (gl518sm_t *) priv; - uint16_t read = gl518sm_read(dev, dev->addr_register); - uint8_t ret = 0; + gl518sm_t *dev = (gl518sm_t *) priv; + uint16_t read = gl518sm_read(dev, dev->addr_register); + uint8_t ret = 0; if (dev->i2c_state == 0) - dev->i2c_state = 1; + dev->i2c_state = 1; if ((dev->i2c_state == 1) && (dev->addr_register >= 0x07) && (dev->addr_register <= 0x0c)) { /* two-byte registers: read MSB first */ - dev->i2c_state = 2; - ret = read >> 8; + dev->i2c_state = 2; + ret = read >> 8; } else { - ret = read; - dev->addr_register++; + ret = read; + dev->addr_register++; } return ret; } - static uint16_t gl518sm_read(gl518sm_t *dev, uint8_t reg) { @@ -132,34 +123,34 @@ gl518sm_read(gl518sm_t *dev, uint8_t reg) reg &= 0x1f; switch (reg) { - case 0x04: /* temperature */ - ret = (dev->values->temperatures[0] + 119) & 0xff; - break; + case 0x04: /* temperature */ + ret = (dev->values->temperatures[0] + 119) & 0xff; + break; - case 0x07: /* fan speeds */ - ret = GL518SM_RPM_TO_REG(dev->values->fans[0], 1 << ((dev->regs[0x0f] >> 6) & 0x3)) << 8; - ret |= GL518SM_RPM_TO_REG(dev->values->fans[1], 1 << ((dev->regs[0x0f] >> 4) & 0x3)); - break; + case 0x07: /* fan speeds */ + ret = GL518SM_RPM_TO_REG(dev->values->fans[0], 1 << ((dev->regs[0x0f] >> 6) & 0x3)) << 8; + ret |= GL518SM_RPM_TO_REG(dev->values->fans[1], 1 << ((dev->regs[0x0f] >> 4) & 0x3)); + break; - case 0x0d: /* VIN3 */ - ret = GL518SM_VOLTAGE_TO_REG(dev->values->voltages[2]); - break; + case 0x0d: /* VIN3 */ + ret = GL518SM_VOLTAGE_TO_REG(dev->values->voltages[2]); + break; - case 0x13: /* VIN2 */ - ret = GL518SM_VOLTAGE_TO_REG(dev->values->voltages[1]); - break; + case 0x13: /* VIN2 */ + ret = GL518SM_VOLTAGE_TO_REG(dev->values->voltages[1]); + break; - case 0x14: /* VIN1 */ - ret = GL518SM_VOLTAGE_TO_REG(dev->values->voltages[0]); - break; + case 0x14: /* VIN1 */ + ret = GL518SM_VOLTAGE_TO_REG(dev->values->voltages[0]); + break; - case 0x15: /* VDD */ - ret = GL518SM_VDD_TO_REG(dev->values->voltages[3]); - break; + case 0x15: /* VDD */ + ret = GL518SM_VDD_TO_REG(dev->values->voltages[3]); + break; - default: /* other registers */ - ret = dev->regs[reg]; - break; + default: /* other registers */ + ret = dev->regs[reg]; + break; } gl518sm_log("GL518SM: read(%02X) = %04X\n", reg, ret); @@ -167,72 +158,77 @@ gl518sm_read(gl518sm_t *dev, uint8_t reg) return ret; } - static uint8_t gl518sm_i2c_write(void *bus, uint8_t addr, uint8_t data, void *priv) { gl518sm_t *dev = (gl518sm_t *) priv; switch (dev->i2c_state++) { - case 0: - dev->addr_register = data; - break; + case 0: + dev->addr_register = data; + break; - case 1: - gl518sm_write(dev, dev->addr_register, (gl518sm_read(dev, dev->addr_register) & 0xff00) | data); - break; + case 1: + gl518sm_write(dev, dev->addr_register, (gl518sm_read(dev, dev->addr_register) & 0xff00) | data); + break; - case 2: - gl518sm_write(dev, dev->addr_register, (gl518sm_read(dev, dev->addr_register) << 8) | data); - break; + case 2: + gl518sm_write(dev, dev->addr_register, (gl518sm_read(dev, dev->addr_register) << 8) | data); + break; - default: - dev->i2c_state = 3; - return 0; + default: + dev->i2c_state = 3; + return 0; } return 1; } - static uint8_t gl518sm_write(gl518sm_t *dev, uint8_t reg, uint16_t val) { gl518sm_log("GL518SM: write(%02X, %04X)\n", reg, val); switch (reg) { - case 0x00: case 0x01: case 0x04: case 0x07: case 0x0d: case 0x12: case 0x13: case 0x14: case 0x15: - /* read-only registers */ - return 0; + case 0x00: + case 0x01: + case 0x04: + case 0x07: + case 0x0d: + case 0x12: + case 0x13: + case 0x14: + case 0x15: + /* read-only registers */ + return 0; - case 0x0a: - dev->regs[0x13] = val & 0xff; - break; + case 0x0a: + dev->regs[0x13] = val & 0xff; + break; - case 0x03: - dev->regs[reg] = val & 0xfc; + case 0x03: + dev->regs[reg] = val & 0xfc; - if (val & 0x80) /* Init */ - gl518sm_reset(dev); - break; + if (val & 0x80) /* Init */ + gl518sm_reset(dev); + break; - case 0x0f: - dev->regs[reg] = val & 0xf8; - break; + case 0x0f: + dev->regs[reg] = val & 0xf8; + break; - case 0x11: - dev->regs[reg] = val & 0x7f; - break; + case 0x11: + dev->regs[reg] = val & 0x7f; + break; - default: - dev->regs[reg] = val; - break; + default: + dev->regs[reg] = val; + break; } return 1; } - static void gl518sm_reset(gl518sm_t *dev) { @@ -252,7 +248,6 @@ gl518sm_reset(gl518sm_t *dev) gl518sm_remap(dev, dev->i2c_addr | (dev->i2c_enabled ? 0x00 : 0x80)); } - static void gl518sm_close(void *priv) { @@ -263,7 +258,6 @@ gl518sm_close(void *priv) free(dev); } - static void * gl518sm_init(const device_t *info) { @@ -274,19 +268,24 @@ gl518sm_init(const device_t *info) /* Set default values. */ hwm_values_t defaults = { - { /* fan speeds */ - 3000, /* usually Chassis */ - 3000 /* usually CPU */ - }, { /* temperatures */ - 30 /* usually CPU */ - }, { /* voltages */ - hwm_get_vcore(), /* Vcore */ - RESISTOR_DIVIDER(12000, 150, 47), /* +12V (15K/4.7K divider suggested in the datasheet) */ - 3300, /* +3.3V */ - 5000 /* +5V */ - } + { + /* fan speeds */ + 3000, /* usually Chassis */ + 3000 /* usually CPU */ + }, + { + /* temperatures */ + 30 /* usually CPU */ + }, + { + /* voltages */ + hwm_get_vcore(), /* Vcore */ + RESISTOR_DIVIDER(12000, 150, 47), /* +12V (15K/4.7K divider suggested in the datasheet) */ + 3300, /* +3.3V */ + 5000 /* +5V */ + } }; - hwm_values = defaults; + hwm_values = defaults; dev->values = &hwm_values; gl518sm_reset(dev); @@ -297,30 +296,30 @@ gl518sm_init(const device_t *info) /* GL518SM on SMBus address 2Ch */ const device_t gl518sm_2c_device = { - .name = "Genesys Logic GL518SM Hardware Monitor", + .name = "Genesys Logic GL518SM Hardware Monitor", .internal_name = "gl518sm_2c", - .flags = DEVICE_ISA, - .local = 0x2c, - .init = gl518sm_init, - .close = gl518sm_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0x2c, + .init = gl518sm_init, + .close = gl518sm_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; /* GL518SM on SMBus address 2Dh */ const device_t gl518sm_2d_device = { - .name = "Genesys Logic GL518SM Hardware Monitor", + .name = "Genesys Logic GL518SM Hardware Monitor", .internal_name = "gl518sm_2d", - .flags = DEVICE_ISA, - .local = 0x2d, - .init = gl518sm_init, - .close = gl518sm_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0x2d, + .init = gl518sm_init, + .close = gl518sm_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/device/hwm_lm75.c b/src/device/hwm_lm75.c index b169d8e9e..bf0c0a77a 100644 --- a/src/device/hwm_lm75.c +++ b/src/device/hwm_lm75.c @@ -26,30 +26,26 @@ #include <86box/i2c.h> #include <86box/hwm.h> - -#define LM75_TEMP_TO_REG(t) ((t) << 8) - +#define LM75_TEMP_TO_REG(t) ((t) << 8) #ifdef ENABLE_LM75_LOG int lm75_do_log = ENABLE_LM75_LOG; - static void lm75_log(const char *fmt, ...) { va_list ap; if (lm75_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define lm75_log(fmt, ...) +# define lm75_log(fmt, ...) #endif - static uint8_t lm75_i2c_start(void *bus, uint8_t addr, uint8_t read, void *priv) { @@ -60,25 +56,23 @@ lm75_i2c_start(void *bus, uint8_t addr, uint8_t read, void *priv) return 1; } - uint8_t lm75_read(lm75_t *dev, uint8_t reg) { uint8_t ret; if ((reg & 0x7) == 0x0) /* temperature high byte */ - ret = LM75_TEMP_TO_REG(dev->values->temperatures[dev->local >> 8]) >> 8; + ret = LM75_TEMP_TO_REG(dev->values->temperatures[dev->local >> 8]) >> 8; else if ((reg & 0x7) == 0x1) /* temperature low byte */ - ret = LM75_TEMP_TO_REG(dev->values->temperatures[dev->local >> 8]); + ret = LM75_TEMP_TO_REG(dev->values->temperatures[dev->local >> 8]); else - ret = dev->regs[reg & 0x7]; + ret = dev->regs[reg & 0x7]; lm75_log("LM75: read(%02X) = %02X\n", reg, ret); return ret; } - static uint8_t lm75_i2c_read(void *bus, uint8_t addr, void *priv) { @@ -86,39 +80,38 @@ lm75_i2c_read(void *bus, uint8_t addr, void *priv) uint8_t ret = 0; if (dev->i2c_state == 0) - dev->i2c_state = 1; + dev->i2c_state = 1; /* The AS99127F hardware monitor uses its primary LM75 device's address to access some of its proprietary registers. Pass this operation on to the main monitor code, if necessary. */ if ((dev->addr_register & 0x80) && dev->as99127f) { - ret = lm78_as99127f_read(dev->as99127f, dev->addr_register); + ret = lm78_as99127f_read(dev->as99127f, dev->addr_register); } else { - switch (dev->addr_register & 0x3) { - case 0x0: /* temperature */ - ret = lm75_read(dev, (dev->i2c_state == 1) ? 0x0 : 0x1); - break; + switch (dev->addr_register & 0x3) { + case 0x0: /* temperature */ + ret = lm75_read(dev, (dev->i2c_state == 1) ? 0x0 : 0x1); + break; - case 0x1: /* configuration */ - ret = lm75_read(dev, 0x2); - break; + case 0x1: /* configuration */ + ret = lm75_read(dev, 0x2); + break; - case 0x2: /* Thyst */ - ret = lm75_read(dev, (dev->i2c_state == 1) ? 0x3 : 0x4); - break; - case 0x3: /* Tos */ - ret = lm75_read(dev, (dev->i2c_state == 1) ? 0x5 : 0x6); - break; - } + case 0x2: /* Thyst */ + ret = lm75_read(dev, (dev->i2c_state == 1) ? 0x3 : 0x4); + break; + case 0x3: /* Tos */ + ret = lm75_read(dev, (dev->i2c_state == 1) ? 0x5 : 0x6); + break; + } } if (dev->i2c_state < 2) - dev->i2c_state++; + dev->i2c_state++; return ret; } - uint8_t lm75_write(lm75_t *dev, uint8_t reg, uint8_t val) { @@ -127,77 +120,74 @@ lm75_write(lm75_t *dev, uint8_t reg, uint8_t val) uint8_t reg_idx = (reg & 0x7); if ((reg_idx <= 0x1) || (reg_idx == 0x7)) - return 0; /* read-only registers */ + return 0; /* read-only registers */ dev->regs[reg_idx] = val; return 1; } - static uint8_t lm75_i2c_write(void *bus, uint8_t addr, uint8_t data, void *priv) { lm75_t *dev = (lm75_t *) priv; if ((dev->i2c_state > 2) || ((dev->i2c_state == 2) && ((dev->addr_register & 0x3) == 0x1))) { - return 0; + return 0; } else if (dev->i2c_state == 0) { - dev->i2c_state = 1; - /* Linux lm75.c driver relies on the address register not changing if bit 2 is set. */ - if (((dev->addr_register & 0x80) && dev->as99127f) || !(data & 0x04)) - dev->addr_register = data; - return 1; + dev->i2c_state = 1; + /* Linux lm75.c driver relies on the address register not changing if bit 2 is set. */ + if (((dev->addr_register & 0x80) && dev->as99127f) || !(data & 0x04)) + dev->addr_register = data; + return 1; } /* The AS99127F hardware monitor uses its primary LM75 device's address to access some of its proprietary registers. Pass this operation on to the main monitor code, if necessary. */ if ((dev->addr_register & 0x80) && dev->as99127f) { - return lm78_as99127f_write(dev->as99127f, dev->addr_register, data); + return lm78_as99127f_write(dev->as99127f, dev->addr_register, data); } else { - switch (dev->addr_register & 0x3) { - case 0x0: /* temperature */ - lm75_write(dev, (dev->i2c_state == 1) ? 0x0 : 0x1, data); - break; + switch (dev->addr_register & 0x3) { + case 0x0: /* temperature */ + lm75_write(dev, (dev->i2c_state == 1) ? 0x0 : 0x1, data); + break; - case 0x1: /* configuration */ - lm75_write(dev, 0x2, data); - break; + case 0x1: /* configuration */ + lm75_write(dev, 0x2, data); + break; - case 0x2: /* Thyst */ - lm75_write(dev, (dev->i2c_state == 1) ? 0x3 : 0x4, data); - break; + case 0x2: /* Thyst */ + lm75_write(dev, (dev->i2c_state == 1) ? 0x3 : 0x4, data); + break; - case 0x3: /* Tos */ - lm75_write(dev, (dev->i2c_state == 1) ? 0x5 : 0x6, data); - break; - } + case 0x3: /* Tos */ + lm75_write(dev, (dev->i2c_state == 1) ? 0x5 : 0x6, data); + break; + } } if (dev->i2c_state == 1) - dev->i2c_state = 2; + dev->i2c_state = 2; return 1; } - void lm75_remap(lm75_t *dev, uint8_t addr) { lm75_log("LM75: remapping to SMBus %02Xh\n", addr); if (dev->i2c_enabled) - i2c_removehandler(i2c_smbus, dev->i2c_addr, 1, lm75_i2c_start, lm75_i2c_read, lm75_i2c_write, NULL, dev); + i2c_removehandler(i2c_smbus, dev->i2c_addr, 1, lm75_i2c_start, lm75_i2c_read, lm75_i2c_write, NULL, dev); if (addr < 0x80) - i2c_sethandler(i2c_smbus, addr, 1, lm75_i2c_start, lm75_i2c_read, lm75_i2c_write, NULL, dev); + i2c_sethandler(i2c_smbus, addr, 1, lm75_i2c_start, lm75_i2c_read, lm75_i2c_write, NULL, dev); - dev->i2c_addr = addr & 0x7f; + dev->i2c_addr = addr & 0x7f; dev->i2c_enabled = !(addr & 0x80); } - static void lm75_reset(lm75_t *dev) { @@ -207,7 +197,6 @@ lm75_reset(lm75_t *dev) lm75_remap(dev, dev->i2c_addr | (dev->i2c_enabled ? 0x00 : 0x80)); } - static void lm75_close(void *priv) { @@ -218,7 +207,6 @@ lm75_close(void *priv) free(dev); } - static void * lm75_init(const device_t *info) { @@ -229,10 +217,10 @@ lm75_init(const device_t *info) /* Set default value. */ if (dev->local) - hwm_values.temperatures[dev->local >> 8] = 30; + hwm_values.temperatures[dev->local >> 8] = 30; dev->values = &hwm_values; - dev->i2c_addr = dev->local & 0x7f; + dev->i2c_addr = dev->local & 0x7f; dev->i2c_enabled = 1; lm75_reset(dev); @@ -240,35 +228,33 @@ lm75_init(const device_t *info) return dev; } - /* LM75 on SMBus address 4Ah, reporting temperatures[1]. */ const device_t lm75_1_4a_device = { - .name = "National Semiconductor LM75 Temperature Sensor", + .name = "National Semiconductor LM75 Temperature Sensor", .internal_name = "lm75_1_4a", - .flags = DEVICE_ISA, - .local = 0x14a, - .init = lm75_init, - .close = lm75_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0x14a, + .init = lm75_init, + .close = lm75_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; - /* LM75 secondary/tertiary temperature sensors built into the Winbond W83781D family. Not to be used stand-alone. */ const device_t lm75_w83781d_device = { - .name = "Winbond W83781D Secondary Temperature Sensor", + .name = "Winbond W83781D Secondary Temperature Sensor", .internal_name = "lm75_w83781d", - .flags = DEVICE_ISA, - .local = 0, - .init = lm75_init, - .close = lm75_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = lm75_init, + .close = lm75_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/device/hwm_lm78.c b/src/device/hwm_lm78.c index 03e4bb477..f446053d7 100644 --- a/src/device/hwm_lm78.c +++ b/src/device/hwm_lm78.c @@ -31,95 +31,88 @@ #include <86box/i2c.h> #include <86box/hwm.h> +#define LM78_I2C 0x010000 +#define LM78_W83781D 0x020000 +#define LM78_AS99127F_REV1 0x040000 +#define LM78_AS99127F_REV2 0x080000 +#define LM78_W83782D 0x100000 +#define LM78_P5A 0x200000 +#define LM78_AS99127F (LM78_AS99127F_REV1 | LM78_AS99127F_REV2) /* mask covering both _REV1 and _REV2 */ +#define LM78_WINBOND (LM78_W83781D | LM78_AS99127F | LM78_W83782D) /* mask covering all Winbond variants */ +#define LM78_WINBOND_VENDOR_ID ((dev->local & LM78_AS99127F_REV1) ? 0x12c3 : 0x5ca3) +#define LM78_WINBOND_BANK (dev->regs[0x4e] & 0x07) -#define LM78_I2C 0x010000 -#define LM78_W83781D 0x020000 -#define LM78_AS99127F_REV1 0x040000 -#define LM78_AS99127F_REV2 0x080000 -#define LM78_W83782D 0x100000 -#define LM78_P5A 0x200000 -#define LM78_AS99127F (LM78_AS99127F_REV1 | LM78_AS99127F_REV2) /* mask covering both _REV1 and _REV2 */ -#define LM78_WINBOND (LM78_W83781D | LM78_AS99127F | LM78_W83782D) /* mask covering all Winbond variants */ -#define LM78_WINBOND_VENDOR_ID ((dev->local & LM78_AS99127F_REV1) ? 0x12c3 : 0x5ca3) -#define LM78_WINBOND_BANK (dev->regs[0x4e] & 0x07) - -#define CLAMP(a, min, max) (((a) < (min)) ? (min) : (((a) > (max)) ? (max) : (a))) -#define LM78_RPM_TO_REG(r, d) ((r) ? CLAMP(1350000 / (r * d), 1, 255) : 0) -#define LM78_VOLTAGE_TO_REG(v) ((v) >> 4) -#define LM78_NEG_VOLTAGE(v, r) (v * (604.0 / ((double) r))) /* negative voltage formula from the W83781D datasheet */ -#define LM78_NEG_VOLTAGE2(v, r) (((3600 + v) * (((double) r) / (((double) r) + 56.0))) - v) /* negative voltage formula from the W83782D datasheet */ - +#define CLAMP(a, min, max) (((a) < (min)) ? (min) : (((a) > (max)) ? (max) : (a))) +#define LM78_RPM_TO_REG(r, d) ((r) ? CLAMP(1350000 / (r * d), 1, 255) : 0) +#define LM78_VOLTAGE_TO_REG(v) ((v) >> 4) +#define LM78_NEG_VOLTAGE(v, r) (v * (604.0 / ((double) r))) /* negative voltage formula from the W83781D datasheet */ +#define LM78_NEG_VOLTAGE2(v, r) (((3600 + v) * (((double) r) / (((double) r) + 56.0))) - v) /* negative voltage formula from the W83782D datasheet */ typedef struct { - uint32_t local; + uint32_t local; hwm_values_t *values; - device_t *lm75[2]; - pc_timer_t reset_timer; + device_t *lm75[2]; + pc_timer_t reset_timer; - uint8_t regs[256]; + uint8_t regs[256]; union { - struct { - uint8_t regs[2][16]; - } w83782d; - struct { - uint8_t regs[3][128]; + struct { + uint8_t regs[2][16]; + } w83782d; + struct { + uint8_t regs[3][128]; - uint8_t nvram[1024], nvram_i2c_state: 2, nvram_updated: 1; - uint16_t nvram_addr_register: 10; - int8_t nvram_block_len: 6; + uint8_t nvram[1024], nvram_i2c_state : 2, nvram_updated : 1; + uint16_t nvram_addr_register : 10; + int8_t nvram_block_len : 6; - uint8_t security_i2c_state: 1, security_addr_register: 7; - } as99127f; + uint8_t security_i2c_state : 1, security_addr_register : 7; + } as99127f; }; - uint8_t addr_register, data_register; + uint8_t addr_register, data_register; - uint8_t i2c_addr: 7, i2c_state: 1, i2c_enabled: 1; + uint8_t i2c_addr : 7, i2c_state : 1, i2c_enabled : 1; } lm78_t; - -static void lm78_remap(lm78_t *dev, uint8_t addr); - +static void lm78_remap(lm78_t *dev, uint8_t addr); #ifdef ENABLE_LM78_LOG int lm78_do_log = ENABLE_LM78_LOG; - static void lm78_log(const char *fmt, ...) { va_list ap; if (lm78_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define lm78_log(fmt, ...) +# define lm78_log(fmt, ...) #endif - void lm78_nvram(lm78_t *dev, uint8_t save) { - size_t l = strlen(machine_get_internal_name_ex(machine)) + 14; - char *nvr_path = (char *) malloc(l); + size_t l = strlen(machine_get_internal_name_ex(machine)) + 14; + char *nvr_path = (char *) malloc(l); sprintf(nvr_path, "%s_as99127f.nvr", machine_get_internal_name_ex(machine)); FILE *f = nvr_fopen(nvr_path, save ? "wb" : "rb"); if (f) { - if (save) - fwrite(&dev->as99127f.nvram, sizeof(dev->as99127f.nvram), 1, f); - else - (void) !fread(&dev->as99127f.nvram, sizeof(dev->as99127f.nvram), 1, f); - fclose(f); + if (save) + fwrite(&dev->as99127f.nvram, sizeof(dev->as99127f.nvram), 1, f); + else + (void) !fread(&dev->as99127f.nvram, sizeof(dev->as99127f.nvram), 1, f); + fclose(f); } free(nvr_path); } - static uint8_t lm78_nvram_start(void *bus, uint8_t addr, uint8_t read, void *priv) { @@ -130,7 +123,6 @@ lm78_nvram_start(void *bus, uint8_t addr, uint8_t read, void *priv) return 1; } - static uint8_t lm78_nvram_read(void *bus, uint8_t addr, void *priv) { @@ -138,72 +130,70 @@ lm78_nvram_read(void *bus, uint8_t addr, void *priv) uint8_t ret = 0xff; switch (dev->as99127f.nvram_i2c_state) { - case 0: - dev->as99127f.nvram_i2c_state = 1; - /* fall-through */ + case 0: + dev->as99127f.nvram_i2c_state = 1; + /* fall-through */ - case 1: - ret = dev->as99127f.regs[0][0x0b] & 0x3f; - lm78_log("LM78: nvram_read(blocklen) = %02X\n", ret); - break; + case 1: + ret = dev->as99127f.regs[0][0x0b] & 0x3f; + lm78_log("LM78: nvram_read(blocklen) = %02X\n", ret); + break; - case 2: - ret = dev->as99127f.nvram[dev->as99127f.nvram_addr_register]; - lm78_log("LM78: nvram_read(%03X) = %02X\n", dev->as99127f.nvram_addr_register, ret); + case 2: + ret = dev->as99127f.nvram[dev->as99127f.nvram_addr_register]; + lm78_log("LM78: nvram_read(%03X) = %02X\n", dev->as99127f.nvram_addr_register, ret); - dev->as99127f.nvram_addr_register++; - break; + dev->as99127f.nvram_addr_register++; + break; - default: - lm78_log("LM78: nvram_read(unknown) = %02X\n", ret); - break; + default: + lm78_log("LM78: nvram_read(unknown) = %02X\n", ret); + break; } if (dev->as99127f.nvram_i2c_state < 2) - dev->as99127f.nvram_i2c_state++; + dev->as99127f.nvram_i2c_state++; return ret; } - static uint8_t lm78_nvram_write(void *bus, uint8_t addr, uint8_t val, void *priv) { lm78_t *dev = (lm78_t *) priv; switch (dev->as99127f.nvram_i2c_state) { - case 0: - lm78_log("LM78: nvram_write(address, %02X)\n", val); - dev->as99127f.nvram_addr_register = (addr << 8) | val; - break; + case 0: + lm78_log("LM78: nvram_write(address, %02X)\n", val); + dev->as99127f.nvram_addr_register = (addr << 8) | val; + break; - case 1: - lm78_log("LM78: nvram_write(blocklen, %02X)\n", val); - dev->as99127f.nvram_block_len = val & 0x3f; - if (dev->as99127f.nvram_block_len <= 0) - dev->as99127f.nvram_i2c_state = 3; - break; + case 1: + lm78_log("LM78: nvram_write(blocklen, %02X)\n", val); + dev->as99127f.nvram_block_len = val & 0x3f; + if (dev->as99127f.nvram_block_len <= 0) + dev->as99127f.nvram_i2c_state = 3; + break; - case 2: - lm78_log("LM78: nvram_write(%03X, %02X)\n", dev->as99127f.nvram_addr_register, val); - dev->as99127f.nvram[dev->as99127f.nvram_addr_register++] = val; - dev->as99127f.nvram_updated = 1; - if (--dev->as99127f.nvram_block_len <= 0) - dev->as99127f.nvram_i2c_state = 3; - break; + case 2: + lm78_log("LM78: nvram_write(%03X, %02X)\n", dev->as99127f.nvram_addr_register, val); + dev->as99127f.nvram[dev->as99127f.nvram_addr_register++] = val; + dev->as99127f.nvram_updated = 1; + if (--dev->as99127f.nvram_block_len <= 0) + dev->as99127f.nvram_i2c_state = 3; + break; - default: - lm78_log("LM78: nvram_write(unknown, %02X)\n", val); - break; + default: + lm78_log("LM78: nvram_write(unknown, %02X)\n", val); + break; } if (dev->as99127f.nvram_i2c_state < 2) - dev->as99127f.nvram_i2c_state++; + dev->as99127f.nvram_i2c_state++; return dev->as99127f.nvram_i2c_state < 3; } - static uint8_t lm78_security_start(void *bus, uint8_t addr, uint8_t read, void *priv) { @@ -214,7 +204,6 @@ lm78_security_start(void *bus, uint8_t addr, uint8_t read, void *priv) return 1; } - static uint8_t lm78_security_read(void *bus, uint8_t addr, void *priv) { @@ -223,33 +212,35 @@ lm78_security_read(void *bus, uint8_t addr, void *priv) return dev->as99127f.regs[2][dev->as99127f.security_addr_register++]; } - static uint8_t lm78_security_write(void *bus, uint8_t addr, uint8_t val, void *priv) { lm78_t *dev = (lm78_t *) priv; if (dev->as99127f.security_i2c_state == 0) { - dev->as99127f.security_i2c_state = 1; - dev->as99127f.security_addr_register = val; + dev->as99127f.security_i2c_state = 1; + dev->as99127f.security_addr_register = val; } else { - switch (dev->as99127f.security_addr_register) { - case 0xe0: case 0xe4: case 0xe5: case 0xe6: case 0xe7: - /* read-only registers */ - return 1; - } + switch (dev->as99127f.security_addr_register) { + case 0xe0: + case 0xe4: + case 0xe5: + case 0xe6: + case 0xe7: + /* read-only registers */ + return 1; + } - dev->as99127f.regs[2][dev->as99127f.security_addr_register++] = val; + dev->as99127f.regs[2][dev->as99127f.security_addr_register++] = val; } return 1; } - static void lm78_reset(void *priv) { - lm78_t *dev = (lm78_t *) priv; + lm78_t *dev = (lm78_t *) priv; uint8_t initialization = dev->regs[0x40] & 0x80; memset(dev->regs, 0, 256); @@ -259,72 +250,71 @@ lm78_reset(void *priv) dev->regs[0x46] = 0x40; dev->regs[0x47] = 0x50; if (dev->local & LM78_I2C) { - if (!initialization) { /* don't reset main I2C address if the reset was triggered by the INITIALIZATION bit */ - if (dev->local & LM78_P5A) - dev->i2c_addr = 0x77; - else - dev->i2c_addr = 0x2d; - dev->i2c_enabled = 1; - } - dev->regs[0x48] = dev->i2c_addr; - if (dev->local & LM78_WINBOND) - dev->regs[0x4a] = 0x01; + if (!initialization) { /* don't reset main I2C address if the reset was triggered by the INITIALIZATION bit */ + if (dev->local & LM78_P5A) + dev->i2c_addr = 0x77; + else + dev->i2c_addr = 0x2d; + dev->i2c_enabled = 1; + } + dev->regs[0x48] = dev->i2c_addr; + if (dev->local & LM78_WINBOND) + dev->regs[0x4a] = 0x01; } else { - dev->regs[0x48] = 0x00; - if (dev->local & LM78_WINBOND) - dev->regs[0x4a] = 0x88; + dev->regs[0x48] = 0x00; + if (dev->local & LM78_WINBOND) + dev->regs[0x4a] = 0x88; } if (dev->local & LM78_WINBOND) { - dev->regs[0x49] = 0x02; - dev->regs[0x4b] = 0x44; - dev->regs[0x4c] = 0x01; - dev->regs[0x4d] = 0x15; - dev->regs[0x4e] = 0x80; - dev->regs[0x4f] = LM78_WINBOND_VENDOR_ID >> 8; - dev->regs[0x57] = 0x80; + dev->regs[0x49] = 0x02; + dev->regs[0x4b] = 0x44; + dev->regs[0x4c] = 0x01; + dev->regs[0x4d] = 0x15; + dev->regs[0x4e] = 0x80; + dev->regs[0x4f] = LM78_WINBOND_VENDOR_ID >> 8; + dev->regs[0x57] = 0x80; - if (dev->local & LM78_AS99127F) { - dev->regs[0x49] = 0x20; - dev->regs[0x4c] = 0x00; - dev->regs[0x56] = 0xff; - dev->regs[0x57] = 0xff; - dev->regs[0x58] = 0x31; - dev->regs[0x59] = 0x8f; - dev->regs[0x5a] = 0x8f; - dev->regs[0x5b] = 0x2a; - dev->regs[0x5c] = 0xe0; - dev->regs[0x5d] = 0x48; - dev->regs[0x5e] = 0xe2; - dev->regs[0x5f] = 0x1f; + if (dev->local & LM78_AS99127F) { + dev->regs[0x49] = 0x20; + dev->regs[0x4c] = 0x00; + dev->regs[0x56] = 0xff; + dev->regs[0x57] = 0xff; + dev->regs[0x58] = 0x31; + dev->regs[0x59] = 0x8f; + dev->regs[0x5a] = 0x8f; + dev->regs[0x5b] = 0x2a; + dev->regs[0x5c] = 0xe0; + dev->regs[0x5d] = 0x48; + dev->regs[0x5e] = 0xe2; + dev->regs[0x5f] = 0x1f; - dev->as99127f.regs[0][0x02] = 0xff; - dev->as99127f.regs[0][0x03] = 0xff; - dev->as99127f.regs[0][0x08] = 0xff; - dev->as99127f.regs[0][0x09] = 0xff; - dev->as99127f.regs[0][0x0b] = 0x01; + dev->as99127f.regs[0][0x02] = 0xff; + dev->as99127f.regs[0][0x03] = 0xff; + dev->as99127f.regs[0][0x08] = 0xff; + dev->as99127f.regs[0][0x09] = 0xff; + dev->as99127f.regs[0][0x0b] = 0x01; - /* regs[1] and regs[2] start at 0x80 */ - dev->as99127f.regs[1][0x00] = 0x88; - dev->as99127f.regs[1][0x01] = 0x10; - dev->as99127f.regs[1][0x03] = 0x02; /* GPO, but things break if GPO16 isn't set */ - dev->as99127f.regs[1][0x04] = 0x01; - dev->as99127f.regs[1][0x05] = 0x1f; - lm78_as99127f_write(dev, 0x06, 0x2f); + /* regs[1] and regs[2] start at 0x80 */ + dev->as99127f.regs[1][0x00] = 0x88; + dev->as99127f.regs[1][0x01] = 0x10; + dev->as99127f.regs[1][0x03] = 0x02; /* GPO, but things break if GPO16 isn't set */ + dev->as99127f.regs[1][0x04] = 0x01; + dev->as99127f.regs[1][0x05] = 0x1f; + lm78_as99127f_write(dev, 0x06, 0x2f); - dev->as99127f.regs[2][0x60] = 0xf0; - } else if (dev->local & LM78_W83781D) { - dev->regs[0x58] = 0x10; - } else if (dev->local & LM78_W83782D) { - dev->regs[0x58] = 0x30; - } + dev->as99127f.regs[2][0x60] = 0xf0; + } else if (dev->local & LM78_W83781D) { + dev->regs[0x58] = 0x10; + } else if (dev->local & LM78_W83782D) { + dev->regs[0x58] = 0x30; + } } else { - dev->regs[0x49] = 0x40; + dev->regs[0x49] = 0x40; } lm78_remap(dev, dev->i2c_addr | (dev->i2c_enabled ? 0x00 : 0x80)); } - static uint8_t lm78_i2c_start(void *bus, uint8_t addr, uint8_t read, void *priv) { @@ -335,7 +325,6 @@ lm78_i2c_start(void *bus, uint8_t addr, uint8_t read, void *priv) return 1; } - static uint8_t lm78_read(lm78_t *dev, uint8_t reg, uint8_t bank) { @@ -343,41 +332,41 @@ lm78_read(lm78_t *dev, uint8_t reg, uint8_t bank) lm75_t *lm75; if ((dev->local & LM78_AS99127F) && (bank == 3) && (reg != 0x4e)) { - /* AS99127F additional registers */ - if (!((dev->local & LM78_AS99127F_REV2) && ((reg == 0x80) || (reg == 0x81)))) - ret = dev->as99127f.regs[0][reg & 0x7f]; + /* AS99127F additional registers */ + if (!((dev->local & LM78_AS99127F_REV2) && ((reg == 0x80) || (reg == 0x81)))) + ret = dev->as99127f.regs[0][reg & 0x7f]; } else if (bankswitched && ((bank == 1) || (bank == 2))) { - /* LM75 registers */ - lm75 = device_get_priv(dev->lm75[bank - 1]); - if (lm75) - ret = lm75_read(lm75, reg); + /* LM75 registers */ + lm75 = device_get_priv(dev->lm75[bank - 1]); + if (lm75) + ret = lm75_read(lm75, reg); } else if (bankswitched && ((bank == 4) || (bank == 5) || (bank == 6))) { - /* W83782D additional registers */ - if (dev->local & LM78_W83782D) { - if ((bank == 5) && ((reg == 0x50) || (reg == 0x51))) /* voltages */ - ret = LM78_VOLTAGE_TO_REG(dev->values->voltages[7 + (reg & 1)]); - else if (bank < 6) - ret = dev->w83782d.regs[bank - 4][reg & 0x0f]; - } + /* W83782D additional registers */ + if (dev->local & LM78_W83782D) { + if ((bank == 5) && ((reg == 0x50) || (reg == 0x51))) /* voltages */ + ret = LM78_VOLTAGE_TO_REG(dev->values->voltages[7 + (reg & 1)]); + else if (bank < 6) + ret = dev->w83782d.regs[bank - 4][reg & 0x0f]; + } } else { - /* regular registers */ - if ((reg >= 0x60) && (reg <= 0x94)) /* read auto-increment value RAM registers from their non-auto-increment locations */ - masked_reg = reg & 0x3f; - if ((masked_reg >= 0x20) && (masked_reg <= 0x26)) /* voltages */ - ret = LM78_VOLTAGE_TO_REG(dev->values->voltages[reg & 7]); - else if ((dev->local & LM78_AS99127F) && (masked_reg <= 0x05)) /* AS99127F additional voltages */ - ret = LM78_VOLTAGE_TO_REG(dev->values->voltages[7 + masked_reg]); - else if (masked_reg == 0x27) /* temperature */ - ret = dev->values->temperatures[0]; - else if ((masked_reg >= 0x28) && (masked_reg <= 0x2a)) { /* fan speeds */ - ret = (dev->regs[((reg & 3) == 2) ? 0x4b : 0x47] >> ((reg & 3) ? 6 : 4)) & 0x03; /* bits [1:0] */ - if (dev->local & LM78_W83782D) - ret |= (dev->regs[0x5d] >> (3 + (reg & 3))) & 0x04; /* bit 2 */ - ret = LM78_RPM_TO_REG(dev->values->fans[reg & 3], 1 << ret); - } else if ((reg == 0x4f) && (dev->local & LM78_WINBOND)) /* two-byte vendor ID register */ - ret = (dev->regs[0x4e] & 0x80) ? (uint8_t) (LM78_WINBOND_VENDOR_ID >> 8) : (uint8_t) LM78_WINBOND_VENDOR_ID; - else - ret = dev->regs[masked_reg]; + /* regular registers */ + if ((reg >= 0x60) && (reg <= 0x94)) /* read auto-increment value RAM registers from their non-auto-increment locations */ + masked_reg = reg & 0x3f; + if ((masked_reg >= 0x20) && (masked_reg <= 0x26)) /* voltages */ + ret = LM78_VOLTAGE_TO_REG(dev->values->voltages[reg & 7]); + else if ((dev->local & LM78_AS99127F) && (masked_reg <= 0x05)) /* AS99127F additional voltages */ + ret = LM78_VOLTAGE_TO_REG(dev->values->voltages[7 + masked_reg]); + else if (masked_reg == 0x27) /* temperature */ + ret = dev->values->temperatures[0]; + else if ((masked_reg >= 0x28) && (masked_reg <= 0x2a)) { /* fan speeds */ + ret = (dev->regs[((reg & 3) == 2) ? 0x4b : 0x47] >> ((reg & 3) ? 6 : 4)) & 0x03; /* bits [1:0] */ + if (dev->local & LM78_W83782D) + ret |= (dev->regs[0x5d] >> (3 + (reg & 3))) & 0x04; /* bit 2 */ + ret = LM78_RPM_TO_REG(dev->values->fans[reg & 3], 1 << ret); + } else if ((reg == 0x4f) && (dev->local & LM78_WINBOND)) /* two-byte vendor ID register */ + ret = (dev->regs[0x4e] & 0x80) ? (uint8_t) (LM78_WINBOND_VENDOR_ID >> 8) : (uint8_t) LM78_WINBOND_VENDOR_ID; + else + ret = dev->regs[masked_reg]; } lm78_log("LM78: read(%02X, %d) = %02X\n", reg, bank, ret); @@ -385,7 +374,6 @@ lm78_read(lm78_t *dev, uint8_t reg, uint8_t bank) return ret; } - static uint8_t lm78_isa_read(uint16_t port, void *priv) { @@ -393,31 +381,27 @@ lm78_isa_read(uint16_t port, void *priv) uint8_t ret = 0xff; switch (port & 0x7) { - case 0x5: - ret = dev->addr_register & 0x7f; - break; + case 0x5: + ret = dev->addr_register & 0x7f; + break; - case 0x6: - ret = lm78_read(dev, dev->addr_register, LM78_WINBOND_BANK); + case 0x6: + ret = lm78_read(dev, dev->addr_register, LM78_WINBOND_BANK); - if (((LM78_WINBOND_BANK == 0) && - ((dev->addr_register == 0x41) || (dev->addr_register == 0x43) || (dev->addr_register == 0x45) || (dev->addr_register == 0x56) || - ((dev->addr_register >= 0x60) && (dev->addr_register < 0x94)))) || - ((dev->local & LM78_W83782D) && (LM78_WINBOND_BANK == 5) && (dev->addr_register >= 0x50) && (dev->addr_register < 0x58))) { - /* auto-increment registers */ - dev->addr_register++; - } - break; + if (((LM78_WINBOND_BANK == 0) && ((dev->addr_register == 0x41) || (dev->addr_register == 0x43) || (dev->addr_register == 0x45) || (dev->addr_register == 0x56) || ((dev->addr_register >= 0x60) && (dev->addr_register < 0x94)))) || ((dev->local & LM78_W83782D) && (LM78_WINBOND_BANK == 5) && (dev->addr_register >= 0x50) && (dev->addr_register < 0x58))) { + /* auto-increment registers */ + dev->addr_register++; + } + break; - default: - lm78_log("LM78: Read from unknown ISA port %d\n", port & 0x7); - break; + default: + lm78_log("LM78: Read from unknown ISA port %d\n", port & 0x7); + break; } return ret; } - static uint8_t lm78_i2c_read(void *bus, uint8_t addr, void *priv) { @@ -426,7 +410,6 @@ lm78_i2c_read(void *bus, uint8_t addr, void *priv) return lm78_read(dev, dev->addr_register++, LM78_WINBOND_BANK); } - uint8_t lm78_as99127f_read(void *priv, uint8_t reg) { @@ -438,7 +421,6 @@ lm78_as99127f_read(void *priv, uint8_t reg) return ret; } - static uint8_t lm78_write(lm78_t *dev, uint8_t reg, uint8_t val, uint8_t bank) { @@ -447,174 +429,232 @@ lm78_write(lm78_t *dev, uint8_t reg, uint8_t val, uint8_t bank) lm78_log("LM78: write(%02X, %d, %02X)\n", reg, bank, val); if ((dev->local & LM78_AS99127F) && (bank == 3) && (reg != 0x4e)) { - /* AS99127F additional registers */ - reg &= 0x7f; - switch (reg) { - case 0x00: case 0x01: case 0x04: case 0x05: case 0x06: case 0x07: - /* read-only registers */ - return 0; + /* AS99127F additional registers */ + reg &= 0x7f; + switch (reg) { + case 0x00: + case 0x01: + case 0x04: + case 0x05: + case 0x06: + case 0x07: + /* read-only registers */ + return 0; - case 0x20: - val &= 0x7f; - break; - } + case 0x20: + val &= 0x7f; + break; + } - dev->as99127f.regs[0][reg] = val; - return 1; + dev->as99127f.regs[0][reg] = val; + return 1; } else if ((reg & 0xf8) == 0x50) { - if ((bank == 1) || (bank == 2)) { - /* LM75 registers */ - lm75 = device_get_priv(dev->lm75[bank - 1]); - if (lm75) - return lm75_write(lm75, reg, val); - return 1; - } else if (dev->local & LM78_W83782D) { - /* W83782D additional registers */ - if (bank == 4) { - switch (reg) { - case 0x50: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57: - case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5d: case 0x5e: case 0x5f: - /* read-only registers */ - return 0; - } + if ((bank == 1) || (bank == 2)) { + /* LM75 registers */ + lm75 = device_get_priv(dev->lm75[bank - 1]); + if (lm75) + return lm75_write(lm75, reg, val); + return 1; + } else if (dev->local & LM78_W83782D) { + /* W83782D additional registers */ + if (bank == 4) { + switch (reg) { + case 0x50: + case 0x52: + case 0x53: + case 0x54: + case 0x55: + case 0x56: + case 0x57: + case 0x58: + case 0x59: + case 0x5a: + case 0x5b: + case 0x5d: + case 0x5e: + case 0x5f: + /* read-only registers */ + return 0; + } - dev->w83782d.regs[0][reg & 0x0f] = val; - return 1; - } else if (bank == 5) { - switch (reg) { - case 0x50: case 0x51: case 0x52: case 0x53: case 0x58: case 0x59: case 0x5a: - case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f: - /* read-only registers */ - return 0; - } + dev->w83782d.regs[0][reg & 0x0f] = val; + return 1; + } else if (bank == 5) { + switch (reg) { + case 0x50: + case 0x51: + case 0x52: + case 0x53: + case 0x58: + case 0x59: + case 0x5a: + case 0x5b: + case 0x5c: + case 0x5d: + case 0x5e: + case 0x5f: + /* read-only registers */ + return 0; + } - dev->w83782d.regs[1][reg & 0x0f] = val; - return 1; - } else if (bank == 6) { - return 0; - } - } + dev->w83782d.regs[1][reg & 0x0f] = val; + return 1; + } else if (bank == 6) { + return 0; + } + } } /* regular registers */ switch (reg) { - case 0x41: case 0x42: case 0x4f: case 0x58: - case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: case 0x28: case 0x29: case 0x2a: - case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67: case 0x68: case 0x69: case 0x6a: - case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: - case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: - /* read-only registers */ - return 0; + case 0x41: + case 0x42: + case 0x4f: + case 0x58: + case 0x20: + case 0x21: + case 0x22: + case 0x23: + case 0x24: + case 0x25: + case 0x26: + case 0x27: + case 0x28: + case 0x29: + case 0x2a: + case 0x60: + case 0x61: + case 0x62: + case 0x63: + case 0x64: + case 0x65: + case 0x66: + case 0x67: + case 0x68: + case 0x69: + case 0x6a: + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x04: + case 0x05: + case 0x80: + case 0x81: + case 0x82: + case 0x83: + case 0x84: + case 0x85: + /* read-only registers */ + return 0; - case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: - /* Winbond-only registers */ - if (!(dev->local & LM78_WINBOND)) - return 0; - break; + case 0x4a: + case 0x4b: + case 0x4c: + case 0x4d: + case 0x4e: + /* Winbond-only registers */ + if (!(dev->local & LM78_WINBOND)) + return 0; + break; } if ((reg >= 0x60) && (reg <= 0x94)) /* write auto-increment value RAM registers to their non-auto-increment locations */ - reg &= 0x3f; - uint8_t prev = dev->regs[reg]; + reg &= 0x3f; + uint8_t prev = dev->regs[reg]; dev->regs[reg] = val; switch (reg) { - case 0x40: - if (val & 0x80) /* INITIALIZATION bit resets all registers except main I2C address */ - lm78_reset(dev); - break; + case 0x40: + if (val & 0x80) /* INITIALIZATION bit resets all registers except main I2C address */ + lm78_reset(dev); + break; - case 0x48: - /* set main I2C address */ - if (dev->local & LM78_I2C) - lm78_remap(dev, dev->regs[0x48] & 0x7f); - break; + case 0x48: + /* set main I2C address */ + if (dev->local & LM78_I2C) + lm78_remap(dev, dev->regs[0x48] & 0x7f); + break; - case 0x49: - if (!(dev->local & LM78_WINBOND)) { - if (val & 0x20) /* Chip Reset bit (LM78 only) resets all registers */ - lm78_reset(dev); - else - dev->regs[0x49] = 0x40; - } else { - dev->regs[0x49] &= 0x01; - } - break; + case 0x49: + if (!(dev->local & LM78_WINBOND)) { + if (val & 0x20) /* Chip Reset bit (LM78 only) resets all registers */ + lm78_reset(dev); + else + dev->regs[0x49] = 0x40; + } else { + dev->regs[0x49] &= 0x01; + } + break; - case 0x4a: - /* set LM75 I2C addresses (Winbond only) */ - if (dev->local & LM78_I2C) { - for (uint8_t i = 0; i <= 1; i++) { - lm75 = device_get_priv(dev->lm75[i]); - if (!lm75) - continue; - if (val & (0x08 * (0x10 * i))) /* DIS_T2 and DIS_T3 bit disable those interfaces */ - lm75_remap(lm75, 0x80); - else - lm75_remap(lm75, 0x48 + ((val >> (i * 4)) & 0x7)); - } - } - break; + case 0x4a: + /* set LM75 I2C addresses (Winbond only) */ + if (dev->local & LM78_I2C) { + for (uint8_t i = 0; i <= 1; i++) { + lm75 = device_get_priv(dev->lm75[i]); + if (!lm75) + continue; + if (val & (0x08 * (0x10 * i))) /* DIS_T2 and DIS_T3 bit disable those interfaces */ + lm75_remap(lm75, 0x80); + else + lm75_remap(lm75, 0x48 + ((val >> (i * 4)) & 0x7)); + } + } + break; - case 0x5c: - /* enable/disable AS99127F NVRAM */ - if (dev->local & LM78_AS99127F) { - if (prev & 0x01) - i2c_removehandler(i2c_smbus, (prev & 0xf8) >> 1, 4, lm78_nvram_start, lm78_nvram_read, lm78_nvram_write, NULL, dev); - if (val & 0x01) - i2c_sethandler(i2c_smbus, (val & 0xf8) >> 1, 4, lm78_nvram_start, lm78_nvram_read, lm78_nvram_write, NULL, dev); - } - break; + case 0x5c: + /* enable/disable AS99127F NVRAM */ + if (dev->local & LM78_AS99127F) { + if (prev & 0x01) + i2c_removehandler(i2c_smbus, (prev & 0xf8) >> 1, 4, lm78_nvram_start, lm78_nvram_read, lm78_nvram_write, NULL, dev); + if (val & 0x01) + i2c_sethandler(i2c_smbus, (val & 0xf8) >> 1, 4, lm78_nvram_start, lm78_nvram_read, lm78_nvram_write, NULL, dev); + } + break; } return 1; } - static void lm78_isa_write(uint16_t port, uint8_t val, void *priv) { lm78_t *dev = (lm78_t *) priv; switch (port & 0x7) { - case 0x5: - dev->addr_register = val & 0x7f; - break; + case 0x5: + dev->addr_register = val & 0x7f; + break; - case 0x6: - lm78_write(dev, dev->addr_register, val, LM78_WINBOND_BANK); + case 0x6: + lm78_write(dev, dev->addr_register, val, LM78_WINBOND_BANK); - if (((LM78_WINBOND_BANK == 0) && - ((dev->addr_register == 0x41) || (dev->addr_register == 0x43) || (dev->addr_register == 0x45) || (dev->addr_register == 0x56) || - ((dev->addr_register >= 0x60) && (dev->addr_register < 0x94)))) || - ((dev->local & LM78_W83782D) && (LM78_WINBOND_BANK == 5) && (dev->addr_register >= 0x50) && (dev->addr_register < 0x58))) { - /* auto-increment registers */ - dev->addr_register++; - } - break; + if (((LM78_WINBOND_BANK == 0) && ((dev->addr_register == 0x41) || (dev->addr_register == 0x43) || (dev->addr_register == 0x45) || (dev->addr_register == 0x56) || ((dev->addr_register >= 0x60) && (dev->addr_register < 0x94)))) || ((dev->local & LM78_W83782D) && (LM78_WINBOND_BANK == 5) && (dev->addr_register >= 0x50) && (dev->addr_register < 0x58))) { + /* auto-increment registers */ + dev->addr_register++; + } + break; - default: - lm78_log("LM78: Write %02X to unknown ISA port %d\n", val, port & 0x7); - break; + default: + lm78_log("LM78: Write %02X to unknown ISA port %d\n", val, port & 0x7); + break; } } - static uint8_t lm78_i2c_write(void *bus, uint8_t addr, uint8_t val, void *priv) { lm78_t *dev = (lm78_t *) priv; if (dev->i2c_state == 0) { - dev->i2c_state = 1; - dev->addr_register = val; + dev->i2c_state = 1; + dev->addr_register = val; } else - lm78_write(dev, dev->addr_register++, val, LM78_WINBOND_BANK); + lm78_write(dev, dev->addr_register++, val, LM78_WINBOND_BANK); return 1; } - uint8_t lm78_as99127f_write(void *priv, uint8_t reg, uint8_t val) { @@ -623,75 +663,73 @@ lm78_as99127f_write(void *priv, uint8_t reg, uint8_t val) lm78_log("LM78: write(%02X, AS99127F, %02X)\n", reg, val); reg &= 0x7f; - uint8_t prev = dev->as99127f.regs[1][reg]; + uint8_t prev = dev->as99127f.regs[1][reg]; dev->as99127f.regs[1][reg] = val; switch (reg) { - case 0x01: - if (val & 0x40) { - dev->as99127f.regs[1][0x00] = 0x88; - dev->as99127f.regs[1][0x01] &= 0xe0; - dev->as99127f.regs[1][0x03] &= 0xf7; - dev->as99127f.regs[1][0x07] &= 0xfe; - } - if (!(val & 0x10)) { /* CUV4X-LS */ - lm78_log("LM78: Reset requested through AS99127F CLKRST\n"); - timer_set_delay_u64(&dev->reset_timer, 300000 * TIMER_USEC); - } - break; + case 0x01: + if (val & 0x40) { + dev->as99127f.regs[1][0x00] = 0x88; + dev->as99127f.regs[1][0x01] &= 0xe0; + dev->as99127f.regs[1][0x03] &= 0xf7; + dev->as99127f.regs[1][0x07] &= 0xfe; + } + if (!(val & 0x10)) { /* CUV4X-LS */ + lm78_log("LM78: Reset requested through AS99127F CLKRST\n"); + timer_set_delay_u64(&dev->reset_timer, 300000 * TIMER_USEC); + } + break; - case 0x06: - /* security device I2C address */ - i2c_removehandler(i2c_smbus, prev & 0x7f, 1, lm78_security_start, lm78_security_read, lm78_security_write, NULL, dev); - i2c_sethandler(i2c_smbus, val & 0x7f, 1, lm78_security_start, lm78_security_read, lm78_security_write, NULL, dev); - break; + case 0x06: + /* security device I2C address */ + i2c_removehandler(i2c_smbus, prev & 0x7f, 1, lm78_security_start, lm78_security_read, lm78_security_write, NULL, dev); + i2c_sethandler(i2c_smbus, val & 0x7f, 1, lm78_security_start, lm78_security_read, lm78_security_write, NULL, dev); + break; - case 0x07: - if (val & 0x01) { /* other AS99127F boards */ - lm78_log("LM78: Reset requested through AS99127F GPO15\n"); - resetx86(); - } - break; + case 0x07: + if (val & 0x01) { /* other AS99127F boards */ + lm78_log("LM78: Reset requested through AS99127F GPO15\n"); + resetx86(); + } + break; } return 1; } - static void lm78_reset_timer(void *priv) { pc_reset_hard(); } - static void lm78_remap(lm78_t *dev, uint8_t addr) { lm75_t *lm75; - if (!(dev->local & LM78_I2C)) return; + if (!(dev->local & LM78_I2C)) + return; lm78_log("LM78: remapping to SMBus %02Xh\n", addr); if (dev->i2c_enabled) - i2c_removehandler(i2c_smbus, dev->i2c_addr, 1, lm78_i2c_start, lm78_i2c_read, lm78_i2c_write, NULL, dev); + i2c_removehandler(i2c_smbus, dev->i2c_addr, 1, lm78_i2c_start, lm78_i2c_read, lm78_i2c_write, NULL, dev); if (addr < 0x80) - i2c_sethandler(i2c_smbus, addr, 1, lm78_i2c_start, lm78_i2c_read, lm78_i2c_write, NULL, dev); + i2c_sethandler(i2c_smbus, addr, 1, lm78_i2c_start, lm78_i2c_read, lm78_i2c_write, NULL, dev); - dev->i2c_addr = addr & 0x7f; + dev->i2c_addr = addr & 0x7f; dev->i2c_enabled = !(addr & 0x80); if (dev->local & LM78_AS99127F) { - /* Store our handle on the primary LM75 device to ensure reads/writes - to the AS99127F's proprietary registers are passed through to this side. */ - if ((lm75 = device_get_priv(dev->lm75[0]))) - lm75->as99127f = dev; + /* Store our handle on the primary LM75 device to ensure reads/writes + to the AS99127F's proprietary registers are passed through to this side. */ + if ((lm75 = device_get_priv(dev->lm75[0]))) + lm75->as99127f = dev; } } - static void lm78_close(void *priv) { @@ -699,15 +737,14 @@ lm78_close(void *priv) uint16_t isa_io = dev->local & 0xffff; if (isa_io) - io_removehandler(isa_io, 8, lm78_isa_read, NULL, NULL, lm78_isa_write, NULL, NULL, dev); + io_removehandler(isa_io, 8, lm78_isa_read, NULL, NULL, lm78_isa_write, NULL, NULL, dev); if (dev->as99127f.nvram_updated) - lm78_nvram(dev, 1); + lm78_nvram(dev, 1); free(dev); } - static void * lm78_init(const device_t *info) { @@ -718,158 +755,163 @@ lm78_init(const device_t *info) /* Set global default values. */ hwm_values_t defaults = { - { /* fan speeds */ - 3000, /* usually Chassis, sometimes CPU */ - 3000, /* usually CPU, sometimes Chassis */ - 3000 /* usually PSU, sometimes Chassis */ - }, { /* temperatures */ - 30, /* usually Board, sometimes Chassis */ - 30, /* Winbond only: usually CPU, sometimes Probe */ - 30 /* Winbond only: usually CPU when not the one above */ - }, { /* voltages */ - hwm_get_vcore(), /* Vcore */ - 0, /* sometimes Vtt, Vio or second CPU */ - 3300, /* +3.3V */ - RESISTOR_DIVIDER(5000, 11, 16), /* +5V (divider values bruteforced) */ - RESISTOR_DIVIDER(12000, 28, 10), /* +12V (28K/10K divider suggested in the W83781D datasheet) */ - LM78_NEG_VOLTAGE(12000, 2100), /* -12V */ - LM78_NEG_VOLTAGE(5000, 909), /* -5V */ - RESISTOR_DIVIDER(5000, 51, 75), /* W83782D/AS99127F only: +5VSB (5.1K/7.5K divider suggested in the datasheet) */ - 3000, /* W83782D/AS99127F only: Vbat */ - 2500, /* AS99127F only: +2.5V */ - 1500, /* AS99127F only: +1.5V */ - 3000, /* AS99127F only: NVRAM */ - 3300 /* AS99127F only: +3.3VSB */ - } + { + /* fan speeds */ + 3000, /* usually Chassis, sometimes CPU */ + 3000, /* usually CPU, sometimes Chassis */ + 3000 /* usually PSU, sometimes Chassis */ + }, + { + /* temperatures */ + 30, /* usually Board, sometimes Chassis */ + 30, /* Winbond only: usually CPU, sometimes Probe */ + 30 /* Winbond only: usually CPU when not the one above */ + }, + { + /* voltages */ + hwm_get_vcore(), /* Vcore */ + 0, /* sometimes Vtt, Vio or second CPU */ + 3300, /* +3.3V */ + RESISTOR_DIVIDER(5000, 11, 16), /* +5V (divider values bruteforced) */ + RESISTOR_DIVIDER(12000, 28, 10), /* +12V (28K/10K divider suggested in the W83781D datasheet) */ + LM78_NEG_VOLTAGE(12000, 2100), /* -12V */ + LM78_NEG_VOLTAGE(5000, 909), /* -5V */ + RESISTOR_DIVIDER(5000, 51, 75), /* W83782D/AS99127F only: +5VSB (5.1K/7.5K divider suggested in the datasheet) */ + 3000, /* W83782D/AS99127F only: Vbat */ + 2500, /* AS99127F only: +2.5V */ + 1500, /* AS99127F only: +1.5V */ + 3000, /* AS99127F only: NVRAM */ + 3300 /* AS99127F only: +3.3VSB */ + } }; /* Set chip-specific default values. */ if (dev->local & LM78_AS99127F) { - /* AS99127F: different -12V Rin value (bruteforced) */ - defaults.voltages[5] = LM78_NEG_VOLTAGE(12000, 2400); + /* AS99127F: different -12V Rin value (bruteforced) */ + defaults.voltages[5] = LM78_NEG_VOLTAGE(12000, 2400); - timer_add(&dev->reset_timer, lm78_reset_timer, dev, 0); + timer_add(&dev->reset_timer, lm78_reset_timer, dev, 0); - lm78_nvram(dev, 0); + lm78_nvram(dev, 0); } else if (dev->local & LM78_W83782D) { - /* W83782D: different negative voltage formula */ - defaults.voltages[5] = LM78_NEG_VOLTAGE2(12000, 232); - defaults.voltages[6] = LM78_NEG_VOLTAGE2(5000, 120); + /* W83782D: different negative voltage formula */ + defaults.voltages[5] = LM78_NEG_VOLTAGE2(12000, 232); + defaults.voltages[6] = LM78_NEG_VOLTAGE2(5000, 120); } - hwm_values = defaults; + hwm_values = defaults; dev->values = &hwm_values; /* Initialize secondary/tertiary LM75 sensors on Winbond. */ for (uint8_t i = 0; i <= 1; i++) { - if (dev->local & LM78_WINBOND) { - dev->lm75[i] = (device_t *) malloc(sizeof(device_t)); - memcpy(dev->lm75[i], &lm75_w83781d_device, sizeof(device_t)); - dev->lm75[i]->local = (i + 1) << 8; - if (dev->local & LM78_I2C) - dev->lm75[i]->local |= 0x48 + i; - device_add(dev->lm75[i]); - } else { - dev->lm75[i] = NULL; - } + if (dev->local & LM78_WINBOND) { + dev->lm75[i] = (device_t *) malloc(sizeof(device_t)); + memcpy(dev->lm75[i], &lm75_w83781d_device, sizeof(device_t)); + dev->lm75[i]->local = (i + 1) << 8; + if (dev->local & LM78_I2C) + dev->lm75[i]->local |= 0x48 + i; + device_add(dev->lm75[i]); + } else { + dev->lm75[i] = NULL; + } } lm78_reset(dev); uint16_t isa_io = dev->local & 0xffff; if (isa_io) - io_sethandler(isa_io, 8, lm78_isa_read, NULL, NULL, lm78_isa_write, NULL, NULL, dev); + io_sethandler(isa_io, 8, lm78_isa_read, NULL, NULL, lm78_isa_write, NULL, NULL, dev); return dev; } /* National Semiconductor LM78 on ISA and SMBus. */ const device_t lm78_device = { - .name = "National Semiconductor LM78 Hardware Monitor", + .name = "National Semiconductor LM78 Hardware Monitor", .internal_name = "lm78", - .flags = DEVICE_ISA, - .local = 0x290 | LM78_I2C, - .init = lm78_init, - .close = lm78_close, - .reset = lm78_reset, + .flags = DEVICE_ISA, + .local = 0x290 | LM78_I2C, + .init = lm78_init, + .close = lm78_close, + .reset = lm78_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; /* Winbond W83781D on ISA and SMBus. */ const device_t w83781d_device = { - .name = "Winbond W83781D Hardware Monitor", + .name = "Winbond W83781D Hardware Monitor", .internal_name = "w83781d", - .flags = DEVICE_ISA, - .local = 0x290 | LM78_I2C | LM78_W83781D, - .init = lm78_init, - .close = lm78_close, - .reset = lm78_reset, + .flags = DEVICE_ISA, + .local = 0x290 | LM78_I2C | LM78_W83781D, + .init = lm78_init, + .close = lm78_close, + .reset = lm78_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; /* Winbond W83781D on ISA and SMBus. */ const device_t w83781d_p5a_device = { - .name = "Winbond W83781D Hardware Monitor (ASUS P5A)", + .name = "Winbond W83781D Hardware Monitor (ASUS P5A)", .internal_name = "w83781d_p5a", - .flags = DEVICE_ISA, - .local = 0x290 | LM78_I2C | LM78_W83781D | LM78_P5A, - .init = lm78_init, - .close = lm78_close, - .reset = lm78_reset, + .flags = DEVICE_ISA, + .local = 0x290 | LM78_I2C | LM78_W83781D | LM78_P5A, + .init = lm78_init, + .close = lm78_close, + .reset = lm78_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; /* The AS99127F is an ASIC manufactured by Holtek for ASUS, containing an I2C-only W83781D clone with additional voltages, GPIOs and fan control. */ const device_t as99127f_device = { - .name = "ASUS AS99127F Rev. 1 Hardware Monitor", + .name = "ASUS AS99127F Rev. 1 Hardware Monitor", .internal_name = "as99137f", - .flags = DEVICE_ISA, - .local = LM78_I2C | LM78_AS99127F_REV1, - .init = lm78_init, - .close = lm78_close, - .reset = lm78_reset, + .flags = DEVICE_ISA, + .local = LM78_I2C | LM78_AS99127F_REV1, + .init = lm78_init, + .close = lm78_close, + .reset = lm78_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; /* Rev. 2 is manufactured by Winbond and differs only in GPI registers. */ const device_t as99127f_rev2_device = { - .name = "ASUS AS99127F Rev. 2 Hardware Monitor", + .name = "ASUS AS99127F Rev. 2 Hardware Monitor", .internal_name = "as99127f_rev2", - .flags = DEVICE_ISA, - .local = LM78_I2C | LM78_AS99127F_REV2, - .init = lm78_init, - .close = lm78_close, - .reset = lm78_reset, + .flags = DEVICE_ISA, + .local = LM78_I2C | LM78_AS99127F_REV2, + .init = lm78_init, + .close = lm78_close, + .reset = lm78_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; /* Winbond W83782D on ISA and SMBus. */ const device_t w83782d_device = { - .name = "Winbond W83782D Hardware Monitor", + .name = "Winbond W83782D Hardware Monitor", .internal_name = "w83783d", - .flags = DEVICE_ISA, - .local = 0x290 | LM78_I2C | LM78_W83782D, - .init = lm78_init, - .close = lm78_close, - .reset = lm78_reset, + .flags = DEVICE_ISA, + .local = 0x290 | LM78_I2C | LM78_W83782D, + .init = lm78_init, + .close = lm78_close, + .reset = lm78_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/device/hwm_vt82c686.c b/src/device/hwm_vt82c686.c index 83e67b66e..88603e10a 100644 --- a/src/device/hwm_vt82c686.c +++ b/src/device/hwm_vt82c686.c @@ -26,94 +26,98 @@ #include <86box/io.h> #include <86box/hwm.h> - -#define CLAMP(a, min, max) (((a) < (min)) ? (min) : (((a) > (max)) ? (max) : (a))) +#define CLAMP(a, min, max) (((a) < (min)) ? (min) : (((a) > (max)) ? (max) : (a))) /* Formulas and factors derived from Linux's via686a.c driver. */ -#define VT82C686_RPM_TO_REG(r, d) ((r) ? CLAMP(1350000 / (r * d), 1, 255) : 0) -#define VT82C686_TEMP_TO_REG(t) (-1.160370e-10*(t*t*t*t*t*t) + 3.193693e-08*(t*t*t*t*t) - 1.464447e-06*(t*t*t*t) - 2.525453e-04*(t*t*t) + 1.424593e-02*(t*t) + 2.148941e+00*t + 7.275808e+01) -#define VT82C686_VOLTAGE_TO_REG(v, f) CLAMP((((v) * (2.628 / (f))) - 120.5) / 25, 0, 255) - +#define VT82C686_RPM_TO_REG(r, d) ((r) ? CLAMP(1350000 / (r * d), 1, 255) : 0) +#define VT82C686_TEMP_TO_REG(t) (-1.160370e-10 * (t * t * t * t * t * t) + 3.193693e-08 * (t * t * t * t * t) - 1.464447e-06 * (t * t * t * t) - 2.525453e-04 * (t * t * t) + 1.424593e-02 * (t * t) + 2.148941e+00 * t + 7.275808e+01) +#define VT82C686_VOLTAGE_TO_REG(v, f) CLAMP((((v) * (2.628 / (f))) - 120.5) / 25, 0, 255) typedef struct { hwm_values_t *values; - uint8_t enable; - uint16_t io_base; - uint8_t regs[128]; + uint8_t enable; + uint16_t io_base; + uint8_t regs[128]; } vt82c686_t; +static double voltage_factors[5] = { 1.25, 1.25, 1.67, 2.6, 6.3 }; -static double voltage_factors[5] = {1.25, 1.25, 1.67, 2.6, 6.3}; - - -static void vt82c686_reset(vt82c686_t *dev, uint8_t initialization); - +static void vt82c686_reset(vt82c686_t *dev, uint8_t initialization); static uint8_t vt82c686_read(uint16_t addr, void *priv) { vt82c686_t *dev = (vt82c686_t *) priv; - uint8_t ret; + uint8_t ret; addr -= dev->io_base; switch (addr) { - case 0x00 ... 0x0f: case 0x50 ... 0x7f: /* undefined registers */ - /* Real 686B returns the contents of 0x40. */ - ret = dev->regs[0x40]; - break; + case 0x00 ... 0x0f: + case 0x50 ... 0x7f: /* undefined registers */ + /* Real 686B returns the contents of 0x40. */ + ret = dev->regs[0x40]; + break; - case 0x1f: case 0x20: case 0x21: /* temperatures */ - ret = VT82C686_TEMP_TO_REG(dev->values->temperatures[(addr == 0x1f) ? 2 : (addr & 1)]); - break; + case 0x1f: + case 0x20: + case 0x21: /* temperatures */ + ret = VT82C686_TEMP_TO_REG(dev->values->temperatures[(addr == 0x1f) ? 2 : (addr & 1)]); + break; - case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: /* voltages */ - ret = VT82C686_VOLTAGE_TO_REG(dev->values->voltages[addr - 0x22], voltage_factors[addr - 0x22]); - break; + case 0x22: + case 0x23: + case 0x24: + case 0x25: + case 0x26: /* voltages */ + ret = VT82C686_VOLTAGE_TO_REG(dev->values->voltages[addr - 0x22], voltage_factors[addr - 0x22]); + break; - case 0x29: case 0x2a: /* fan speeds */ - ret = VT82C686_RPM_TO_REG(dev->values->fans[addr - 0x29], 1 << ((dev->regs[0x47] >> ((addr == 0x29) ? 4 : 6)) & 0x3)); - break; + case 0x29: + case 0x2a: /* fan speeds */ + ret = VT82C686_RPM_TO_REG(dev->values->fans[addr - 0x29], 1 << ((dev->regs[0x47] >> ((addr == 0x29) ? 4 : 6)) & 0x3)); + break; - default: /* other registers */ - ret = dev->regs[addr]; - break; + default: /* other registers */ + ret = dev->regs[addr]; + break; } return ret; } - static void vt82c686_write(uint16_t port, uint8_t val, void *priv) { vt82c686_t *dev = (vt82c686_t *) priv; - uint8_t reg = port & 0x7f; + uint8_t reg = port & 0x7f; switch (reg) { - case 0x00 ... 0x0f: - case 0x3f: case 0x41: case 0x42: case 0x4a: - case 0x4c ... 0x7f: - /* Read-only registers. */ - return; + case 0x00 ... 0x0f: + case 0x3f: + case 0x41: + case 0x42: + case 0x4a: + case 0x4c ... 0x7f: + /* Read-only registers. */ + return; - case 0x40: - /* Reset if requested. */ - if (val & 0x80) { - vt82c686_reset(dev, 1); - return; - } - break; + case 0x40: + /* Reset if requested. */ + if (val & 0x80) { + vt82c686_reset(dev, 1); + return; + } + break; - case 0x48: - val &= 0x7f; - break; + case 0x48: + val &= 0x7f; + break; } dev->regs[reg] = val; } - /* Writes to hardware monitor-related configuration space registers of the VT82C686 power management function are sent here by via_pipc.c */ void @@ -122,31 +126,30 @@ vt82c686_hwm_write(uint8_t addr, uint8_t val, void *priv) vt82c686_t *dev = (vt82c686_t *) priv; if (dev->io_base) - io_removehandler(dev->io_base, 128, - vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev); + io_removehandler(dev->io_base, 128, + vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev); switch (addr) { - case 0x70: - dev->io_base &= 0xff00; - dev->io_base |= val & 0x80; - break; + case 0x70: + dev->io_base &= 0xff00; + dev->io_base |= val & 0x80; + break; - case 0x71: - dev->io_base &= 0x00ff; - dev->io_base |= val << 8; - break; + case 0x71: + dev->io_base &= 0x00ff; + dev->io_base |= val << 8; + break; - case 0x74: - dev->enable = val & 0x01; - break; + case 0x74: + dev->enable = val & 0x01; + break; } if (dev->enable && dev->io_base) - io_sethandler(dev->io_base, 128, - vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev); + io_sethandler(dev->io_base, 128, + vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev); } - static void vt82c686_reset(vt82c686_t *dev, uint8_t initialization) { @@ -159,10 +162,9 @@ vt82c686_reset(vt82c686_t *dev, uint8_t initialization) dev->regs[0x4b] = 0x15; if (!initialization) - vt82c686_hwm_write(0x74, 0x00, dev); + vt82c686_hwm_write(0x74, 0x00, dev); } - static void vt82c686_close(void *priv) { @@ -171,7 +173,6 @@ vt82c686_close(void *priv) free(dev); } - static void * vt82c686_init(const device_t *info) { @@ -181,22 +182,24 @@ vt82c686_init(const device_t *info) /* Set default values. Since this hardware monitor has a complex voltage factor system, the values struct contains voltage values *before* applying their respective factors. */ hwm_values_t defaults = { - { /* fan speeds */ - 3000, /* usually CPU */ - 3000 /* usually Chassis */ - }, { /* temperatures */ - 30, /* usually CPU */ - 30, /* usually System */ - 30 - }, { /* voltages */ - hwm_get_vcore(), /* Vcore */ - 2500, /* +2.5V */ - 3300, /* +3.3V */ - 5000, /* +5V */ - 12000 /* +12V */ - } +// clang-format on + { /* fan speeds */ + 3000, /* usually CPU */ + 3000 /* usually Chassis */ + }, { /* temperatures */ + 30, /* usually CPU */ + 30, /* usually System */ + 30 + }, { /* voltages */ + hwm_get_vcore(), /* Vcore */ + 2500, /* +2.5V */ + 3300, /* +3.3V */ + 5000, /* +5V */ + 12000 /* +12V */ + } +// clang-format on }; - hwm_values = defaults; + hwm_values = defaults; dev->values = &hwm_values; vt82c686_reset(dev, 0); @@ -205,15 +208,15 @@ vt82c686_init(const device_t *info) } const device_t via_vt82c686_hwm_device = { - .name = "VIA VT82C686 Integrated Hardware Monitor", + .name = "VIA VT82C686 Integrated Hardware Monitor", .internal_name = "via_vt82c686_hwm", - .flags = DEVICE_ISA, - .local = 0, - .init = vt82c686_init, - .close = vt82c686_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = vt82c686_init, + .close = vt82c686_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/device/i2c.c b/src/device/i2c.c index ac0e5ee83..79586a9ed 100644 --- a/src/device/i2c.c +++ b/src/device/i2c.c @@ -24,51 +24,45 @@ #include <86box/86box.h> #include <86box/i2c.h> - -#define NADDRS 128 /* I2C supports 128 addresses */ +#define NADDRS 128 /* I2C supports 128 addresses */ #define MAX(a, b) ((a) > (b) ? (a) : (b)) - typedef struct _i2c_ { - uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv); - uint8_t (*read)(void *bus, uint8_t addr, void *priv); - uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv); - void (*stop)(void *bus, uint8_t addr, void *priv); + uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv); + uint8_t (*read)(void *bus, uint8_t addr, void *priv); + uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv); + void (*stop)(void *bus, uint8_t addr, void *priv); - void *priv; + void *priv; struct _i2c_ *prev, *next; } i2c_t; typedef struct { - char *name; + char *name; i2c_t *devices[NADDRS], *last[NADDRS]; } i2c_bus_t; - void *i2c_smbus; - #ifdef ENABLE_I2C_LOG int i2c_do_log = ENABLE_I2C_LOG; - static void i2c_log(const char *fmt, ...) { va_list ap; if (i2c_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define i2c_log(fmt, ...) +# define i2c_log(fmt, ...) #endif - void * i2c_addbus(char *name) { @@ -80,235 +74,226 @@ i2c_addbus(char *name) return bus; } - void i2c_removebus(void *bus_handle) { - int c; - i2c_t *p, *q; + int c; + i2c_t *p, *q; i2c_bus_t *bus = (i2c_bus_t *) bus_handle; if (!bus_handle) - return; + return; for (c = 0; c < NADDRS; c++) { - p = bus->devices[c]; - if (!p) - continue; - while(p) { - q = p->next; - free(p); - p = q; - } + p = bus->devices[c]; + if (!p) + continue; + while (p) { + q = p->next; + free(p); + p = q; + } } free(bus); } - char * i2c_getbusname(void *bus_handle) { i2c_bus_t *bus = (i2c_bus_t *) bus_handle; if (!bus_handle) - return(NULL); + return (NULL); - return(bus->name); + return (bus->name); } - void i2c_sethandler(void *bus_handle, uint8_t base, int size, - uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv), - uint8_t (*read)(void *bus, uint8_t addr, void *priv), - uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv), - void (*stop)(void *bus, uint8_t addr, void *priv), - void *priv) + uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv), + uint8_t (*read)(void *bus, uint8_t addr, void *priv), + uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv), + void (*stop)(void *bus, uint8_t addr, void *priv), + void *priv) { - int c; - i2c_t *p, *q = NULL; + int c; + i2c_t *p, *q = NULL; i2c_bus_t *bus = (i2c_bus_t *) bus_handle; if (!bus_handle || ((base + size) > NADDRS)) - return; + return; for (c = 0; c < size; c++) { - p = bus->last[base + c]; - q = (i2c_t *) malloc(sizeof(i2c_t)); - memset(q, 0, sizeof(i2c_t)); - if (p) { - p->next = q; - q->prev = p; - } else { - bus->devices[base + c] = q; - q->prev = NULL; - } + p = bus->last[base + c]; + q = (i2c_t *) malloc(sizeof(i2c_t)); + memset(q, 0, sizeof(i2c_t)); + if (p) { + p->next = q; + q->prev = p; + } else { + bus->devices[base + c] = q; + q->prev = NULL; + } - q->start = start; - q->read = read; - q->write = write; - q->stop = stop; + q->start = start; + q->read = read; + q->write = write; + q->stop = stop; - q->priv = priv; - q->next = NULL; + q->priv = priv; + q->next = NULL; - bus->last[base + c] = q; + bus->last[base + c] = q; } } - void i2c_removehandler(void *bus_handle, uint8_t base, int size, - uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv), - uint8_t (*read)(void *bus, uint8_t addr, void *priv), - uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv), - void (*stop)(void *bus, uint8_t addr, void *priv), - void *priv) + uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv), + uint8_t (*read)(void *bus, uint8_t addr, void *priv), + uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv), + void (*stop)(void *bus, uint8_t addr, void *priv), + void *priv) { - int c; - i2c_t *p, *q; + int c; + i2c_t *p, *q; i2c_bus_t *bus = (i2c_bus_t *) bus_handle; if (!bus_handle || ((base + size) > NADDRS)) - return; + return; for (c = 0; c < size; c++) { - p = bus->devices[base + c]; - if (!p) - continue; - while(p) { - q = p->next; - if ((p->start == start) && (p->read == read) && (p->write == write) && (p->stop == stop) && (p->priv == priv)) { - if (p->prev) - p->prev->next = p->next; - else - bus->devices[base + c] = p->next; - if (p->next) - p->next->prev = p->prev; - else - bus->last[base + c] = p->prev; - free(p); - p = NULL; - break; - } - p = q; - } + p = bus->devices[base + c]; + if (!p) + continue; + while (p) { + q = p->next; + if ((p->start == start) && (p->read == read) && (p->write == write) && (p->stop == stop) && (p->priv == priv)) { + if (p->prev) + p->prev->next = p->next; + else + bus->devices[base + c] = p->next; + if (p->next) + p->next->prev = p->prev; + else + bus->last[base + c] = p->prev; + free(p); + p = NULL; + break; + } + p = q; + } } } - void i2c_handler(int set, void *bus_handle, uint8_t base, int size, - uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv), - uint8_t (*read)(void *bus, uint8_t addr, void *priv), - uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv), - void (*stop)(void *bus, uint8_t addr, void *priv), - void *priv) + uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv), + uint8_t (*read)(void *bus, uint8_t addr, void *priv), + uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv), + void (*stop)(void *bus, uint8_t addr, void *priv), + void *priv) { if (set) - i2c_sethandler(bus_handle, base, size, start, read, write, stop, priv); + i2c_sethandler(bus_handle, base, size, start, read, write, stop, priv); else - i2c_removehandler(bus_handle, base, size, start, read, write, stop, priv); + i2c_removehandler(bus_handle, base, size, start, read, write, stop, priv); } - uint8_t i2c_start(void *bus_handle, uint8_t addr, uint8_t read) { - uint8_t ret = 0; + uint8_t ret = 0; i2c_bus_t *bus = (i2c_bus_t *) bus_handle; - i2c_t *p; + i2c_t *p; if (!bus) - return(ret); + return (ret); p = bus->devices[addr]; if (p) { - while(p) { - if (p->start) { - ret |= p->start(bus_handle, addr, read, p->priv); - } - p = p->next; - } + while (p) { + if (p->start) { + ret |= p->start(bus_handle, addr, read, p->priv); + } + p = p->next; + } } i2c_log("I2C %s: start(%02X) = %d\n", bus->name, addr, ret); - return(ret); + return (ret); } - uint8_t i2c_read(void *bus_handle, uint8_t addr) { - uint8_t ret = 0; + uint8_t ret = 0; i2c_bus_t *bus = (i2c_bus_t *) bus_handle; - i2c_t *p; + i2c_t *p; if (!bus) - return(ret); + return (ret); p = bus->devices[addr]; if (p) { - while(p) { - if (p->read) { - ret = p->read(bus_handle, addr, p->priv); - break; - } - p = p->next; - } + while (p) { + if (p->read) { + ret = p->read(bus_handle, addr, p->priv); + break; + } + p = p->next; + } } i2c_log("I2C %s: read(%02X) = %02X\n", bus->name, addr, ret); - return(ret); + return (ret); } - uint8_t i2c_write(void *bus_handle, uint8_t addr, uint8_t data) { - uint8_t ret = 0; - i2c_t *p; + uint8_t ret = 0; + i2c_t *p; i2c_bus_t *bus = (i2c_bus_t *) bus_handle; if (!bus) - return(ret); + return (ret); p = bus->devices[addr]; if (p) { - while(p) { - if (p->write) { - ret |= p->write(bus_handle, addr, data, p->priv); - } - p = p->next; - } + while (p) { + if (p->write) { + ret |= p->write(bus_handle, addr, data, p->priv); + } + p = p->next; + } } i2c_log("I2C %s: write(%02X, %02X) = %d\n", bus->name, addr, data, ret); - return(ret); + return (ret); } - void i2c_stop(void *bus_handle, uint8_t addr) { i2c_bus_t *bus = (i2c_bus_t *) bus_handle; - i2c_t *p; + i2c_t *p; if (!bus) - return; + return; p = bus->devices[addr]; if (p) { - while(p) { - if (p->stop) { - p->stop(bus_handle, addr, p->priv); - } - p = p->next; - } + while (p) { + if (p->stop) { + p->stop(bus_handle, addr, p->priv); + } + p = p->next; + } } i2c_log("I2C %s: stop(%02X)\n", bus->name, addr); diff --git a/src/device/i2c_gpio.c b/src/device/i2c_gpio.c index e3902baaa..e2af6d1de 100644 --- a/src/device/i2c_gpio.c +++ b/src/device/i2c_gpio.c @@ -24,35 +24,31 @@ #include <86box/86box.h> #include <86box/i2c.h> - typedef struct { - char *bus_name; - void *i2c; - uint8_t prev_scl, prev_sda, slave_sda, started, - slave_addr_received, slave_addr, slave_read, pos, byte; + char *bus_name; + void *i2c; + uint8_t prev_scl, prev_sda, slave_sda, started, + slave_addr_received, slave_addr, slave_read, pos, byte; } i2c_gpio_t; - #ifdef ENABLE_I2C_GPIO_LOG int i2c_gpio_do_log = ENABLE_I2C_GPIO_LOG; - static void i2c_gpio_log(int level, const char *fmt, ...) { va_list ap; if (i2c_gpio_do_log >= level) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define i2c_gpio_log(fmt, ...) +# define i2c_gpio_log(fmt, ...) #endif - void * i2c_gpio_init(char *bus_name) { @@ -62,14 +58,13 @@ i2c_gpio_init(char *bus_name) i2c_gpio_log(1, "I2C GPIO %s: init()\n", bus_name); dev->bus_name = bus_name; - dev->i2c = i2c_addbus(dev->bus_name); + dev->i2c = i2c_addbus(dev->bus_name); dev->prev_scl = dev->prev_sda = dev->slave_sda = 1; - dev->slave_addr = 0xff; + dev->slave_addr = 0xff; return dev; } - void i2c_gpio_close(void *dev_handle) { @@ -82,7 +77,6 @@ i2c_gpio_close(void *dev_handle) free(dev); } - void i2c_gpio_set(void *dev_handle, uint8_t scl, uint8_t sda) { @@ -91,80 +85,79 @@ i2c_gpio_set(void *dev_handle, uint8_t scl, uint8_t sda) i2c_gpio_log(3, "I2C GPIO %s: write scl=%d->%d sda=%d->%d read=%d\n", dev->bus_name, dev->prev_scl, scl, dev->prev_sda, sda, dev->slave_read); if (dev->prev_scl && scl) { - if (dev->prev_sda && !sda) { - i2c_gpio_log(2, "I2C GPIO %s: Start condition\n", dev->bus_name); - dev->started = 1; - dev->pos = 0; - dev->slave_addr = 0xff; - dev->slave_read = 2; /* start with address transfer */ - dev->slave_sda = 1; - } else if (!dev->prev_sda && sda) { - i2c_gpio_log(2, "I2C GPIO %s: Stop condition\n", dev->bus_name); - dev->started = 0; - if (dev->slave_addr != 0xff) - i2c_stop(dev->i2c, dev->slave_addr); - dev->slave_addr = 0xff; - dev->slave_sda = 1; - } + if (dev->prev_sda && !sda) { + i2c_gpio_log(2, "I2C GPIO %s: Start condition\n", dev->bus_name); + dev->started = 1; + dev->pos = 0; + dev->slave_addr = 0xff; + dev->slave_read = 2; /* start with address transfer */ + dev->slave_sda = 1; + } else if (!dev->prev_sda && sda) { + i2c_gpio_log(2, "I2C GPIO %s: Stop condition\n", dev->bus_name); + dev->started = 0; + if (dev->slave_addr != 0xff) + i2c_stop(dev->i2c, dev->slave_addr); + dev->slave_addr = 0xff; + dev->slave_sda = 1; + } } else if (!dev->prev_scl && scl && dev->started) { - if (dev->pos++ < 8) { - if (dev->slave_read == 1) { - dev->slave_sda = !!(dev->byte & 0x80); - dev->byte <<= 1; - } else { - dev->byte <<= 1; - dev->byte |= sda; - } + if (dev->pos++ < 8) { + if (dev->slave_read == 1) { + dev->slave_sda = !!(dev->byte & 0x80); + dev->byte <<= 1; + } else { + dev->byte <<= 1; + dev->byte |= sda; + } - i2c_gpio_log(2, "I2C GPIO %s: Bit %d = %d\n", dev->bus_name, 8 - dev->pos, (dev->slave_read == 1) ? dev->slave_sda : sda); - } + i2c_gpio_log(2, "I2C GPIO %s: Bit %d = %d\n", dev->bus_name, 8 - dev->pos, (dev->slave_read == 1) ? dev->slave_sda : sda); + } - if (dev->pos == 8) { - i2c_gpio_log(2, "I2C GPIO %s: Byte = %02X\n", dev->bus_name, dev->byte); + if (dev->pos == 8) { + i2c_gpio_log(2, "I2C GPIO %s: Byte = %02X\n", dev->bus_name, dev->byte); - /* (N)ACKing here instead of at the 9th bit may sound odd, but is required by the Matrox Mystique Windows drivers. */ - switch (dev->slave_read) { - case 2: /* address transfer */ - dev->slave_addr = dev->byte >> 1; - dev->slave_read = dev->byte & 1; + /* (N)ACKing here instead of at the 9th bit may sound odd, but is required by the Matrox Mystique Windows drivers. */ + switch (dev->slave_read) { + case 2: /* address transfer */ + dev->slave_addr = dev->byte >> 1; + dev->slave_read = dev->byte & 1; - /* slave ACKs? */ - dev->slave_sda = !i2c_start(dev->i2c, dev->slave_addr, dev->slave_read); - i2c_gpio_log(2, "I2C GPIO %s: Slave %02X %s %sACK\n", dev->bus_name, dev->slave_addr, dev->slave_read ? "read" : "write", dev->slave_sda ? "N" : ""); + /* slave ACKs? */ + dev->slave_sda = !i2c_start(dev->i2c, dev->slave_addr, dev->slave_read); + i2c_gpio_log(2, "I2C GPIO %s: Slave %02X %s %sACK\n", dev->bus_name, dev->slave_addr, dev->slave_read ? "read" : "write", dev->slave_sda ? "N" : ""); - if (!dev->slave_sda && dev->slave_read) /* read first byte on an ACKed read transfer */ - dev->byte = i2c_read(dev->i2c, dev->slave_addr); + if (!dev->slave_sda && dev->slave_read) /* read first byte on an ACKed read transfer */ + dev->byte = i2c_read(dev->i2c, dev->slave_addr); - dev->slave_read |= 0x80; /* slave_read was overwritten; stop the master ACK read logic from running at the 9th bit if we're reading */ - break; + dev->slave_read |= 0x80; /* slave_read was overwritten; stop the master ACK read logic from running at the 9th bit if we're reading */ + break; - case 0: /* write transfer */ - dev->slave_sda = !i2c_write(dev->i2c, dev->slave_addr, dev->byte); - i2c_gpio_log(2, "I2C GPIO %s: Write %02X %sACK\n", dev->bus_name, dev->byte, dev->slave_sda ? "N" : ""); - break; - } - } else if (dev->pos == 9) { - switch (dev->slave_read) { - case 1: /* read transfer (unless we're in an address transfer) */ - if (!sda) /* master ACKs? */ - dev->byte = i2c_read(dev->i2c, dev->slave_addr); - i2c_gpio_log(2, "I2C GPIO %s: Read %02X %sACK\n", dev->bus_name, dev->byte, sda ? "N" : ""); - break; + case 0: /* write transfer */ + dev->slave_sda = !i2c_write(dev->i2c, dev->slave_addr, dev->byte); + i2c_gpio_log(2, "I2C GPIO %s: Write %02X %sACK\n", dev->bus_name, dev->byte, dev->slave_sda ? "N" : ""); + break; + } + } else if (dev->pos == 9) { + switch (dev->slave_read) { + case 1: /* read transfer (unless we're in an address transfer) */ + if (!sda) /* master ACKs? */ + dev->byte = i2c_read(dev->i2c, dev->slave_addr); + i2c_gpio_log(2, "I2C GPIO %s: Read %02X %sACK\n", dev->bus_name, dev->byte, sda ? "N" : ""); + break; - default: - dev->slave_read &= 1; /* if we're in an address transfer, clear it */ - } - dev->pos = 0; /* start over */ - } + default: + dev->slave_read &= 1; /* if we're in an address transfer, clear it */ + } + dev->pos = 0; /* start over */ + } } else if (dev->prev_scl && !scl && (dev->pos != 8)) { /* keep (N)ACK computed at the 8th bit when transitioning to the 9th bit */ - dev->slave_sda = 1; + dev->slave_sda = 1; } dev->prev_scl = scl; dev->prev_sda = sda; } - uint8_t i2c_gpio_get_scl(void *dev_handle) { @@ -172,7 +165,6 @@ i2c_gpio_get_scl(void *dev_handle) return dev->prev_scl; } - uint8_t i2c_gpio_get_sda(void *dev_handle) { @@ -181,7 +173,6 @@ i2c_gpio_get_sda(void *dev_handle) return dev->prev_sda && dev->slave_sda; } - void * i2c_gpio_get_bus(void *dev_handle) { diff --git a/src/device/ibm_5161.c b/src/device/ibm_5161.c index 9e47199b7..d2ba5cac0 100644 --- a/src/device/ibm_5161.c +++ b/src/device/ibm_5161.c @@ -29,7 +29,6 @@ #include <86box/port_92.h> #include <86box/machine.h> - typedef struct { uint8_t regs[8]; diff --git a/src/device/isamem.c b/src/device/isamem.c index 4fd3e6ab2..512289716 100644 --- a/src/device/isamem.c +++ b/src/device/isamem.c @@ -86,249 +86,242 @@ #include "cpu.h" -#define ISAMEM_IBMXT_CARD 0 -#define ISAMEM_GENXT_CARD 1 -#define ISAMEM_RAMCARD_CARD 2 +#define ISAMEM_IBMXT_CARD 0 +#define ISAMEM_GENXT_CARD 1 +#define ISAMEM_RAMCARD_CARD 2 #define ISAMEM_SYSTEMCARD_CARD 3 -#define ISAMEM_IBMAT_CARD 4 -#define ISAMEM_GENAT_CARD 5 -#define ISAMEM_P5PAK_CARD 6 -#define ISAMEM_A6PAK_CARD 7 -#define ISAMEM_EMS5150_CARD 8 -#define ISAMEM_EV159_CARD 10 -#define ISAMEM_RAMPAGEXT_CARD 11 +#define ISAMEM_IBMAT_CARD 4 +#define ISAMEM_GENAT_CARD 5 +#define ISAMEM_P5PAK_CARD 6 +#define ISAMEM_A6PAK_CARD 7 +#define ISAMEM_EMS5150_CARD 8 +#define ISAMEM_EV159_CARD 10 +#define ISAMEM_RAMPAGEXT_CARD 11 #define ISAMEM_ABOVEBOARD_CARD 12 -#define ISAMEM_BRAT_CARD 13 +#define ISAMEM_BRAT_CARD 13 -#define ISAMEM_DEBUG 0 +#define ISAMEM_DEBUG 0 -#define RAM_TOPMEM (640 << 10) /* end of low memory */ -#define RAM_UMAMEM (384 << 10) /* upper memory block */ -#define RAM_EXTMEM (1024 << 10) /* start of high memory */ +#define RAM_TOPMEM (640 << 10) /* end of low memory */ +#define RAM_UMAMEM (384 << 10) /* upper memory block */ +#define RAM_EXTMEM (1024 << 10) /* start of high memory */ -#define EMS_MAXSIZE (2048 << 10) /* max EMS memory size */ -#define EMS_PGSIZE (16 << 10) /* one page is this big */ -#define EMS_MAXPAGE 4 /* number of viewport pages */ +#define EMS_MAXSIZE (2048 << 10) /* max EMS memory size */ +#define EMS_PGSIZE (16 << 10) /* one page is this big */ +#define EMS_MAXPAGE 4 /* number of viewport pages */ -#define EXTRAM_CONVENTIONAL 0 -#define EXTRAM_HIGH 1 -#define EXTRAM_XMS 2 +#define EXTRAM_CONVENTIONAL 0 +#define EXTRAM_HIGH 1 +#define EXTRAM_XMS 2 typedef struct { - int8_t enabled; /* 1=ENABLED */ - uint8_t page; /* page# in EMS RAM */ - uint8_t frame; /* (varies with board) */ - char pad; - uint8_t *addr; /* start addr in EMS RAM */ - mem_mapping_t mapping; /* mapping entry for page */ + int8_t enabled; /* 1=ENABLED */ + uint8_t page; /* page# in EMS RAM */ + uint8_t frame; /* (varies with board) */ + char pad; + uint8_t *addr; /* start addr in EMS RAM */ + mem_mapping_t mapping; /* mapping entry for page */ } emsreg_t; typedef struct { - uint32_t base; - uint8_t *ptr; + uint32_t base; + uint8_t *ptr; } ext_ram_t; typedef struct { - const char *name; - uint8_t board : 6, /* board type */ - reserved : 2; + const char *name; + uint8_t board : 6, /* board type */ + reserved : 2; - uint8_t flags; -#define FLAG_CONFIG 0x01 /* card is configured */ -#define FLAG_WIDE 0x10 /* card uses 16b mode */ -#define FLAG_FAST 0x20 /* fast (<= 120ns) chips */ -#define FLAG_EMS 0x40 /* card has EMS mode enabled */ + uint8_t flags; +#define FLAG_CONFIG 0x01 /* card is configured */ +#define FLAG_WIDE 0x10 /* card uses 16b mode */ +#define FLAG_FAST 0x20 /* fast (<= 120ns) chips */ +#define FLAG_EMS 0x40 /* card has EMS mode enabled */ - uint16_t total_size; /* configured size in KB */ - uint32_t base_addr, /* configured I/O address */ - start_addr, /* configured memory start */ - frame_addr; /* configured frame address */ + uint16_t total_size; /* configured size in KB */ + uint32_t base_addr, /* configured I/O address */ + start_addr, /* configured memory start */ + frame_addr; /* configured frame address */ - uint16_t ems_size, /* EMS size in KB */ - ems_pages; /* EMS size in pages */ - uint32_t ems_start; /* start of EMS in RAM */ + uint16_t ems_size, /* EMS size in KB */ + ems_pages; /* EMS size in pages */ + uint32_t ems_start; /* start of EMS in RAM */ - uint8_t *ram; /* allocated RAM buffer */ + uint8_t *ram; /* allocated RAM buffer */ - ext_ram_t ext_ram[3]; /* structures for the mappings */ + ext_ram_t ext_ram[3]; /* structures for the mappings */ - mem_mapping_t low_mapping; /* mapping for low mem */ - mem_mapping_t high_mapping; /* mapping for high mem */ + mem_mapping_t low_mapping; /* mapping for low mem */ + mem_mapping_t high_mapping; /* mapping for high mem */ - emsreg_t ems[EMS_MAXPAGE]; /* EMS controller registers */ + emsreg_t ems[EMS_MAXPAGE]; /* EMS controller registers */ } memdev_t; #ifdef ENABLE_ISAMEM_LOG int isamem_do_log = ENABLE_ISAMEM_LOG; - static void isamem_log(const char *fmt, ...) { va_list ap; if (isamem_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define isamem_log(fmt, ...) +# define isamem_log(fmt, ...) #endif - /* Why this convoluted setup with the mem_dev stuff when it's much simpler to just pass the exec pointer as p as well, and then just use that. */ /* Read one byte from onboard RAM. */ static uint8_t ram_readb(uint32_t addr, void *priv) { - ext_ram_t *dev = (ext_ram_t *)priv; - uint8_t ret = 0xff; + ext_ram_t *dev = (ext_ram_t *) priv; + uint8_t ret = 0xff; /* Grab the data. */ - ret = *(uint8_t *)(dev->ptr + (addr - dev->base)); + ret = *(uint8_t *) (dev->ptr + (addr - dev->base)); - return(ret); + return (ret); } - /* Read one word from onboard RAM. */ static uint16_t ram_readw(uint32_t addr, void *priv) { - ext_ram_t *dev = (ext_ram_t *)priv; - uint16_t ret = 0xffff; + ext_ram_t *dev = (ext_ram_t *) priv; + uint16_t ret = 0xffff; /* Grab the data. */ - ret = *(uint16_t *)(dev->ptr + (addr - dev->base)); + ret = *(uint16_t *) (dev->ptr + (addr - dev->base)); - return(ret); + return (ret); } - /* Write one byte to onboard RAM. */ static void ram_writeb(uint32_t addr, uint8_t val, void *priv) { - ext_ram_t *dev = (ext_ram_t *)priv; + ext_ram_t *dev = (ext_ram_t *) priv; /* Write the data. */ - *(uint8_t *)(dev->ptr + (addr - dev->base)) = val; + *(uint8_t *) (dev->ptr + (addr - dev->base)) = val; } - /* Write one word to onboard RAM. */ static void ram_writew(uint32_t addr, uint16_t val, void *priv) { - ext_ram_t *dev = (ext_ram_t *)priv; + ext_ram_t *dev = (ext_ram_t *) priv; /* Write the data. */ - *(uint16_t *)(dev->ptr + (addr - dev->base)) = val; + *(uint16_t *) (dev->ptr + (addr - dev->base)) = val; } - /* Read one byte from onboard paged RAM. */ static uint8_t ems_readb(uint32_t addr, void *priv) { - memdev_t *dev = (memdev_t *)priv; - uint8_t ret = 0xff; + memdev_t *dev = (memdev_t *) priv; + uint8_t ret = 0xff; /* Grab the data. */ - ret = *(uint8_t *)(dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)); + ret = *(uint8_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)); #if ISAMEM_DEBUG - if ((addr % 4096)==0) isamem_log("EMS readb(%06x) = %02x\n",addr-dev&0x3fff,ret); + if ((addr % 4096) == 0) + isamem_log("EMS readb(%06x) = %02x\n", addr - dev & 0x3fff, ret); #endif - return(ret); + return (ret); } - /* Read one word from onboard paged RAM. */ static uint16_t ems_readw(uint32_t addr, void *priv) { - memdev_t *dev = (memdev_t *)priv; - uint16_t ret = 0xffff; + memdev_t *dev = (memdev_t *) priv; + uint16_t ret = 0xffff; /* Grab the data. */ - ret = *(uint16_t *)(dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)); + ret = *(uint16_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)); #if ISAMEM_DEBUG - if ((addr % 4096)==0) isamem_log("EMS readw(%06x) = %04x\n",addr-dev&0x3fff,ret); + if ((addr % 4096) == 0) + isamem_log("EMS readw(%06x) = %04x\n", addr - dev & 0x3fff, ret); #endif - return(ret); + return (ret); } - /* Write one byte to onboard paged RAM. */ static void ems_writeb(uint32_t addr, uint8_t val, void *priv) { - memdev_t *dev = (memdev_t *)priv; + memdev_t *dev = (memdev_t *) priv; /* Write the data. */ #if ISAMEM_DEBUG - if ((addr % 4096)==0) isamem_log("EMS writeb(%06x, %02x)\n",addr-dev&0x3fff,val); + if ((addr % 4096) == 0) + isamem_log("EMS writeb(%06x, %02x)\n", addr - dev & 0x3fff, val); #endif - *(uint8_t *)(dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)) = val; + *(uint8_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)) = val; } - /* Write one word to onboard paged RAM. */ static void ems_writew(uint32_t addr, uint16_t val, void *priv) { - memdev_t *dev = (memdev_t *)priv; + memdev_t *dev = (memdev_t *) priv; /* Write the data. */ #if ISAMEM_DEBUG - if ((addr % 4096)==0) isamem_log("EMS writew(%06x, %04x)\n",addr&0x3fff,val); + if ((addr % 4096) == 0) + isamem_log("EMS writew(%06x, %04x)\n", addr & 0x3fff, val); #endif - *(uint16_t *)(dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)) = val; + *(uint16_t *) (dev->ems[((addr & 0xffff) >> 14)].addr + (addr & 0x3fff)) = val; } - /* Handle a READ operation from one of our registers. */ static uint8_t ems_read(uint16_t port, void *priv) { - memdev_t *dev = (memdev_t *)priv; - uint8_t ret = 0xff; - int vpage; + memdev_t *dev = (memdev_t *) priv; + uint8_t ret = 0xff; + int vpage; /* Get the viewport page number. */ vpage = (port / EMS_PGSIZE); port &= (EMS_PGSIZE - 1); - switch(port - dev->base_addr) { - case 0x0000: /* page number register */ - ret = dev->ems[vpage].page; - if (dev->ems[vpage].enabled) - ret |= 0x80; - break; + switch (port - dev->base_addr) { + case 0x0000: /* page number register */ + ret = dev->ems[vpage].page; + if (dev->ems[vpage].enabled) + ret |= 0x80; + break; - case 0x0001: /* W/O */ - break; + case 0x0001: /* W/O */ + break; } #if ISAMEM_DEBUG isamem_log("ISAMEM: read(%04x) = %02x)\n", port, ret); #endif - return(ret); + return (ret); } - /* Handle a WRITE operation to one of our registers. */ static void ems_write(uint16_t port, uint8_t val, void *priv) { - memdev_t *dev = (memdev_t *)priv; - int vpage; + memdev_t *dev = (memdev_t *) priv; + int vpage; /* Get the viewport page number. */ vpage = (port / EMS_PGSIZE); @@ -338,136 +331,135 @@ ems_write(uint16_t port, uint8_t val, void *priv) isamem_log("ISAMEM: write(%04x, %02x) page=%d\n", port, val, vpage); #endif - switch(port - dev->base_addr) { - case 0x0000: /* page mapping registers */ - /* Set the page number. */ - dev->ems[vpage].enabled = (val & 0x80); - dev->ems[vpage].page = (val & 0x7f); + switch (port - dev->base_addr) { + case 0x0000: /* page mapping registers */ + /* Set the page number. */ + dev->ems[vpage].enabled = (val & 0x80); + dev->ems[vpage].page = (val & 0x7f); - /* Make sure we can do that.. */ - if (dev->flags & FLAG_CONFIG) { - if (dev->ems[vpage].page < dev->ems_pages) { - /* Pre-calculate the page address in EMS RAM. */ - dev->ems[vpage].addr = dev->ram + dev->ems_start + ((val & 0x7f) * EMS_PGSIZE); - } else { - /* That page does not exist. */ - dev->ems[vpage].enabled = 0; - } + /* Make sure we can do that.. */ + if (dev->flags & FLAG_CONFIG) { + if (dev->ems[vpage].page < dev->ems_pages) { + /* Pre-calculate the page address in EMS RAM. */ + dev->ems[vpage].addr = dev->ram + dev->ems_start + ((val & 0x7f) * EMS_PGSIZE); + } else { + /* That page does not exist. */ + dev->ems[vpage].enabled = 0; + } - if (dev->ems[vpage].enabled) { - /* Update the EMS RAM address for this page. */ - mem_mapping_set_exec(&dev->ems[vpage].mapping, - dev->ems[vpage].addr); + if (dev->ems[vpage].enabled) { + /* Update the EMS RAM address for this page. */ + mem_mapping_set_exec(&dev->ems[vpage].mapping, + dev->ems[vpage].addr); - /* Enable this page. */ - mem_mapping_enable(&dev->ems[vpage].mapping); - } else { - /* Disable this page. */ - mem_mapping_disable(&dev->ems[vpage].mapping); - } - } - break; + /* Enable this page. */ + mem_mapping_enable(&dev->ems[vpage].mapping); + } else { + /* Disable this page. */ + mem_mapping_disable(&dev->ems[vpage].mapping); + } + } + break; - case 0x0001: /* page frame registers */ - /* - * The EV-159 EMM driver configures the frame address - * by setting bits in these registers. The information - * in their manual is unclear, but here is what was - * found out by repeatedly changing EMM's config: - * - * 00 04 08 Address - * ----------------- - * 80 c0 e0 C0000 - * 80 c0 e0 C4000 - * 80 c0 e0 C8000 - * 80 c0 e0 CC000 - * 80 c0 e0 D0000 - * 80 c0 e0 D4000 - * 80 c0 e0 D8000 - * 80 c0 e0 DC000 - * 80 c0 e0 E0000 - */ -isamem_log("EMS: write(%02x) to register 1 !\n"); - dev->ems[vpage].frame = val; - if (val) - dev->flags |= FLAG_CONFIG; - break; + case 0x0001: /* page frame registers */ + /* + * The EV-159 EMM driver configures the frame address + * by setting bits in these registers. The information + * in their manual is unclear, but here is what was + * found out by repeatedly changing EMM's config: + * + * 00 04 08 Address + * ----------------- + * 80 c0 e0 C0000 + * 80 c0 e0 C4000 + * 80 c0 e0 C8000 + * 80 c0 e0 CC000 + * 80 c0 e0 D0000 + * 80 c0 e0 D4000 + * 80 c0 e0 D8000 + * 80 c0 e0 DC000 + * 80 c0 e0 E0000 + */ + isamem_log("EMS: write(%02x) to register 1 !\n"); + dev->ems[vpage].frame = val; + if (val) + dev->flags |= FLAG_CONFIG; + break; } } - /* Initialize the device for use. */ static void * isamem_init(const device_t *info) { memdev_t *dev; - uint32_t k, t; - uint32_t addr; - uint32_t tot; - uint8_t *ptr; - int i; + uint32_t k, t; + uint32_t addr; + uint32_t tot; + uint8_t *ptr; + int i; /* Find our device and create an instance. */ - dev = (memdev_t *)malloc(sizeof(memdev_t)); + dev = (memdev_t *) malloc(sizeof(memdev_t)); memset(dev, 0x00, sizeof(memdev_t)); - dev->name = info->name; + dev->name = info->name; dev->board = info->local; /* Do per-board initialization. */ tot = 0; - switch(dev->board) { - case ISAMEM_IBMXT_CARD: /* IBM PC/XT Memory Expansion Card */ - case ISAMEM_GENXT_CARD: /* Generic PC/XT Memory Expansion Card */ - case ISAMEM_RAMCARD_CARD: /* Microsoft RAMCard for IBM PC */ - case ISAMEM_SYSTEMCARD_CARD: /* Microsoft SystemCard */ - case ISAMEM_P5PAK_CARD: /* Paradise Systems 5-PAK */ - case ISAMEM_A6PAK_CARD: /* AST SixPakPlus */ - dev->total_size = device_get_config_int("size"); - dev->start_addr = device_get_config_int("start"); - tot = dev->total_size; - break; + switch (dev->board) { + case ISAMEM_IBMXT_CARD: /* IBM PC/XT Memory Expansion Card */ + case ISAMEM_GENXT_CARD: /* Generic PC/XT Memory Expansion Card */ + case ISAMEM_RAMCARD_CARD: /* Microsoft RAMCard for IBM PC */ + case ISAMEM_SYSTEMCARD_CARD: /* Microsoft SystemCard */ + case ISAMEM_P5PAK_CARD: /* Paradise Systems 5-PAK */ + case ISAMEM_A6PAK_CARD: /* AST SixPakPlus */ + dev->total_size = device_get_config_int("size"); + dev->start_addr = device_get_config_int("start"); + tot = dev->total_size; + break; - case ISAMEM_IBMAT_CARD: /* IBM PC/AT Memory Expansion Card */ - case ISAMEM_GENAT_CARD: /* Generic PC/AT Memory Expansion Card */ - dev->total_size = device_get_config_int("size"); - dev->start_addr = device_get_config_int("start"); - tot = dev->total_size; - dev->flags |= FLAG_WIDE; - break; + case ISAMEM_IBMAT_CARD: /* IBM PC/AT Memory Expansion Card */ + case ISAMEM_GENAT_CARD: /* Generic PC/AT Memory Expansion Card */ + dev->total_size = device_get_config_int("size"); + dev->start_addr = device_get_config_int("start"); + tot = dev->total_size; + dev->flags |= FLAG_WIDE; + break; - case ISAMEM_EMS5150_CARD: /* Micro Mainframe EMS-5150(T) */ - dev->base_addr = device_get_config_hex16("base"); - dev->total_size = device_get_config_int("size"); - dev->frame_addr = 0xD0000; - dev->flags |= (FLAG_EMS | FLAG_CONFIG); - break; + case ISAMEM_EMS5150_CARD: /* Micro Mainframe EMS-5150(T) */ + dev->base_addr = device_get_config_hex16("base"); + dev->total_size = device_get_config_int("size"); + dev->frame_addr = 0xD0000; + dev->flags |= (FLAG_EMS | FLAG_CONFIG); + break; - case ISAMEM_EV159_CARD: /* Everex EV-159 RAM 3000 */ - dev->base_addr = device_get_config_hex16("base"); - dev->total_size = device_get_config_int("size"); - dev->start_addr = device_get_config_int("start"); - tot = device_get_config_int("length"); - if (!!device_get_config_int("width")) - dev->flags |= FLAG_WIDE; - if (!!device_get_config_int("speed")) - dev->flags |= FLAG_FAST; - if (!!device_get_config_int("ems")) - dev->flags |= FLAG_EMS; -dev->frame_addr = 0xE0000; - break; + case ISAMEM_EV159_CARD: /* Everex EV-159 RAM 3000 */ + dev->base_addr = device_get_config_hex16("base"); + dev->total_size = device_get_config_int("size"); + dev->start_addr = device_get_config_int("start"); + tot = device_get_config_int("length"); + if (!!device_get_config_int("width")) + dev->flags |= FLAG_WIDE; + if (!!device_get_config_int("speed")) + dev->flags |= FLAG_FAST; + if (!!device_get_config_int("ems")) + dev->flags |= FLAG_EMS; + dev->frame_addr = 0xE0000; + break; - case ISAMEM_RAMPAGEXT_CARD: /* AST RAMpage/XT */ - case ISAMEM_ABOVEBOARD_CARD: /* Intel AboveBoard */ - case ISAMEM_BRAT_CARD: /* BocaRAM/AT */ - dev->base_addr = device_get_config_hex16("base"); - dev->total_size = device_get_config_int("size"); - dev->start_addr = device_get_config_int("start"); - dev->frame_addr = device_get_config_hex20("frame"); - if (!!device_get_config_int("width")) - dev->flags |= FLAG_WIDE; - if (!!device_get_config_int("speed")) - dev->flags |= FLAG_FAST; - break; + case ISAMEM_RAMPAGEXT_CARD: /* AST RAMpage/XT */ + case ISAMEM_ABOVEBOARD_CARD: /* Intel AboveBoard */ + case ISAMEM_BRAT_CARD: /* BocaRAM/AT */ + dev->base_addr = device_get_config_hex16("base"); + dev->total_size = device_get_config_int("size"); + dev->start_addr = device_get_config_int("start"); + dev->frame_addr = device_get_config_hex20("frame"); + if (!!device_get_config_int("width")) + dev->flags |= FLAG_WIDE; + if (!!device_get_config_int("speed")) + dev->flags |= FLAG_FAST; + break; } /* Fix up the memory start address. */ @@ -476,20 +468,22 @@ dev->frame_addr = 0xE0000; /* Say hello! */ isamem_log("ISAMEM: %s (%iKB", info->name, dev->total_size); if (tot && (dev->total_size != tot)) - isamem_log(", %iKB for RAM", tot); - if (dev->flags & FLAG_FAST) isamem_log(", FAST"); - if (dev->flags & FLAG_WIDE) isamem_log(", 16BIT"); + isamem_log(", %iKB for RAM", tot); + if (dev->flags & FLAG_FAST) + isamem_log(", FAST"); + if (dev->flags & FLAG_WIDE) + isamem_log(", 16BIT"); isamem_log(")\n"); /* Force (back to) 8-bit bus if needed. */ if ((!is286) && (dev->flags & FLAG_WIDE)) { - isamem_log("ISAMEM: not AT+ system, forcing 8-bit mode!\n"); - dev->flags &= ~FLAG_WIDE; + isamem_log("ISAMEM: not AT+ system, forcing 8-bit mode!\n"); + dev->flags &= ~FLAG_WIDE; } /* Allocate and initialize our RAM. */ - k = dev->total_size << 10; - dev->ram = (uint8_t *)malloc(k); + k = dev->total_size << 10; + dev->ram = (uint8_t *) malloc(k); memset(dev->ram, 0x00, k); ptr = dev->ram; @@ -501,82 +495,82 @@ dev->frame_addr = 0xE0000; tot <<= 10; addr = dev->start_addr; if (addr > 0 && tot > 0) { - /* Adjust K for the RAM we will use. */ - k -= tot; + /* Adjust K for the RAM we will use. */ + k -= tot; - /* - * First, see if we have to expand the conventional - * (low) memory area. This can extend up to 640KB, - * so check this first. - */ - t = (addr < RAM_TOPMEM) ? RAM_TOPMEM - addr : 0; - if (t > 0) { - /* - * We need T bytes to extend that area. - * - * If the board doesn't have that much, grab - * as much as we can. - */ - if (t > tot) - t = tot; - isamem_log("ISAMEM: RAM at %05iKB (%iKB)\n", addr>>10, t>>10); + /* + * First, see if we have to expand the conventional + * (low) memory area. This can extend up to 640KB, + * so check this first. + */ + t = (addr < RAM_TOPMEM) ? RAM_TOPMEM - addr : 0; + if (t > 0) { + /* + * We need T bytes to extend that area. + * + * If the board doesn't have that much, grab + * as much as we can. + */ + if (t > tot) + t = tot; + isamem_log("ISAMEM: RAM at %05iKB (%iKB)\n", addr >> 10, t >> 10); - dev->ext_ram[EXTRAM_CONVENTIONAL].ptr = ptr; - dev->ext_ram[EXTRAM_CONVENTIONAL].base = addr; + dev->ext_ram[EXTRAM_CONVENTIONAL].ptr = ptr; + dev->ext_ram[EXTRAM_CONVENTIONAL].base = addr; - /* Create, initialize and enable the low-memory mapping. */ - mem_mapping_add(&dev->low_mapping, addr, t, - ram_readb, - (dev->flags&FLAG_WIDE) ? ram_readw : NULL, - NULL, - ram_writeb, - (dev->flags&FLAG_WIDE) ? ram_writew : NULL, - NULL, - ptr, MEM_MAPPING_EXTERNAL, &dev->ext_ram[EXTRAM_CONVENTIONAL]); + /* Create, initialize and enable the low-memory mapping. */ + mem_mapping_add(&dev->low_mapping, addr, t, + ram_readb, + (dev->flags & FLAG_WIDE) ? ram_readw : NULL, + NULL, + ram_writeb, + (dev->flags & FLAG_WIDE) ? ram_writew : NULL, + NULL, + ptr, MEM_MAPPING_EXTERNAL, &dev->ext_ram[EXTRAM_CONVENTIONAL]); - /* Tell the memory system this is external RAM. */ - mem_set_mem_state(addr, t, - MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); + /* Tell the memory system this is external RAM. */ + mem_set_mem_state(addr, t, + MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); - /* Update pointers. */ - ptr += t; - tot -= t; - addr += t; - } + /* Update pointers. */ + ptr += t; + tot -= t; + addr += t; + } - /* Skip to high memory if needed. */ - if ((addr == RAM_TOPMEM) && (tot >= RAM_UMAMEM)) { - /* - * We have more RAM available, but we are at the - * top of conventional RAM. So, the next 384K are - * skipped, and placed into different mappings so - * they can be re-mapped later. - */ - t = RAM_UMAMEM; /* 384KB */ + /* Skip to high memory if needed. */ + if ((addr == RAM_TOPMEM) && (tot >= RAM_UMAMEM)) { + /* + * We have more RAM available, but we are at the + * top of conventional RAM. So, the next 384K are + * skipped, and placed into different mappings so + * they can be re-mapped later. + */ + t = RAM_UMAMEM; /* 384KB */ - isamem_log("ISAMEM: RAM at %05iKB (%iKB)\n", addr>>10, t>>10); + isamem_log("ISAMEM: RAM at %05iKB (%iKB)\n", addr >> 10, t >> 10); - dev->ext_ram[EXTRAM_HIGH].ptr = ptr; - dev->ext_ram[EXTRAM_HIGH].base = addr + tot; + dev->ext_ram[EXTRAM_HIGH].ptr = ptr; + dev->ext_ram[EXTRAM_HIGH].base = addr + tot; - /* Update and enable the remap. */ - mem_mapping_set(&ram_remapped_mapping, - addr + tot, t, - ram_readb, ram_readw, NULL, - ram_writeb, ram_writew, NULL, - ptr, MEM_MAPPING_EXTERNAL, - &dev->ext_ram[EXTRAM_HIGH]); - mem_mapping_disable(&ram_remapped_mapping); + /* Update and enable the remap. */ + mem_mapping_set(&ram_remapped_mapping, + addr + tot, t, + ram_readb, ram_readw, NULL, + ram_writeb, ram_writew, NULL, + ptr, MEM_MAPPING_EXTERNAL, + &dev->ext_ram[EXTRAM_HIGH]); + mem_mapping_disable(&ram_remapped_mapping); - /* Tell the memory system this is external RAM. */ - mem_set_mem_state(addr + tot, t, - MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); + /* Tell the memory system this is external RAM. */ + mem_set_mem_state(addr + tot, t, + MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); - /* Update pointers. */ - ptr += t; - tot -= t; - addr += t; - } + /* Update pointers. */ + ptr += t; + tot -= t; + addr += t; + } } /* @@ -587,101 +581,99 @@ dev->frame_addr = 0xE0000; * protected mode. */ if (is286 && addr > 0 && tot > 0) { - t = tot; - isamem_log("ISAMEM: RAM at %05iKB (%iKB)\n", addr>>10, t>>10); + t = tot; + isamem_log("ISAMEM: RAM at %05iKB (%iKB)\n", addr >> 10, t >> 10); - dev->ext_ram[EXTRAM_XMS].ptr = ptr; - dev->ext_ram[EXTRAM_XMS].base = addr; + dev->ext_ram[EXTRAM_XMS].ptr = ptr; + dev->ext_ram[EXTRAM_XMS].base = addr; - /* Create, initialize and enable the high-memory mapping. */ - mem_mapping_add(&dev->high_mapping, addr, t, - ram_readb, ram_readw, NULL, - ram_writeb, ram_writew, NULL, - ptr, MEM_MAPPING_EXTERNAL, &dev->ext_ram[EXTRAM_XMS]); + /* Create, initialize and enable the high-memory mapping. */ + mem_mapping_add(&dev->high_mapping, addr, t, + ram_readb, ram_readw, NULL, + ram_writeb, ram_writew, NULL, + ptr, MEM_MAPPING_EXTERNAL, &dev->ext_ram[EXTRAM_XMS]); - /* Tell the memory system this is external RAM. */ - mem_set_mem_state(addr, t, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); + /* Tell the memory system this is external RAM. */ + mem_set_mem_state(addr, t, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); - /* Update pointers. */ - ptr += t; - tot -= t; - addr += t; + /* Update pointers. */ + ptr += t; + tot -= t; + addr += t; } isa_mem_size += dev->total_size - (k >> 10); /* If EMS is enabled, use the remainder for EMS. */ if (dev->flags & FLAG_EMS) { - /* EMS 3.2 cannot have more than 2048KB per board. */ - t = k; - if (t > EMS_MAXSIZE) - t = EMS_MAXSIZE; + /* EMS 3.2 cannot have more than 2048KB per board. */ + t = k; + if (t > EMS_MAXSIZE) + t = EMS_MAXSIZE; - /* Set up where EMS begins in local RAM, and how much we have. */ - dev->ems_start = ptr - dev->ram; - dev->ems_size = t >> 10; - dev->ems_pages = t / EMS_PGSIZE; - isamem_log("ISAMEM: EMS enabled, I/O=%04XH, %iKB (%i pages)", - dev->base_addr, dev->ems_size, dev->ems_pages); - if (dev->frame_addr > 0) - isamem_log(", Frame=%05XH", dev->frame_addr); - isamem_log("\n"); + /* Set up where EMS begins in local RAM, and how much we have. */ + dev->ems_start = ptr - dev->ram; + dev->ems_size = t >> 10; + dev->ems_pages = t / EMS_PGSIZE; + isamem_log("ISAMEM: EMS enabled, I/O=%04XH, %iKB (%i pages)", + dev->base_addr, dev->ems_size, dev->ems_pages); + if (dev->frame_addr > 0) + isamem_log(", Frame=%05XH", dev->frame_addr); + isamem_log("\n"); - /* - * For each supported page (we can have a maximum of 4), - * create, initialize and disable the mappings, and set - * up the I/O control handler. - */ - for (i = 0; i < EMS_MAXPAGE; i++) { - /* Create and initialize a page mapping. */ - mem_mapping_add(&dev->ems[i].mapping, - dev->frame_addr + (EMS_PGSIZE*i), EMS_PGSIZE, - ems_readb, - (dev->flags&FLAG_WIDE) ? ems_readw : NULL, - NULL, - ems_writeb, - (dev->flags&FLAG_WIDE) ? ems_writew : NULL, - NULL, - ptr, MEM_MAPPING_EXTERNAL, - dev); + /* + * For each supported page (we can have a maximum of 4), + * create, initialize and disable the mappings, and set + * up the I/O control handler. + */ + for (i = 0; i < EMS_MAXPAGE; i++) { + /* Create and initialize a page mapping. */ + mem_mapping_add(&dev->ems[i].mapping, + dev->frame_addr + (EMS_PGSIZE * i), EMS_PGSIZE, + ems_readb, + (dev->flags & FLAG_WIDE) ? ems_readw : NULL, + NULL, + ems_writeb, + (dev->flags & FLAG_WIDE) ? ems_writew : NULL, + NULL, + ptr, MEM_MAPPING_EXTERNAL, + dev); - /* For now, disable it. */ - mem_mapping_disable(&dev->ems[i].mapping); + /* For now, disable it. */ + mem_mapping_disable(&dev->ems[i].mapping); - /* Set up an I/O port handler. */ - io_sethandler(dev->base_addr + (EMS_PGSIZE*i), 2, - ems_read,NULL,NULL, ems_write,NULL,NULL, dev); - } + /* Set up an I/O port handler. */ + io_sethandler(dev->base_addr + (EMS_PGSIZE * i), 2, + ems_read, NULL, NULL, ems_write, NULL, NULL, dev); + } } /* Let them know our device instance. */ - return((void *) dev); + return ((void *) dev); } - /* Remove the device from the system. */ static void isamem_close(void *priv) { - memdev_t *dev = (memdev_t *)priv; - int i; + memdev_t *dev = (memdev_t *) priv; + int i; if (dev->flags & FLAG_EMS) { - for (i = 0; i < EMS_MAXPAGE; i++) { - io_removehandler(dev->base_addr + (EMS_PGSIZE*i), 2, - ems_read,NULL,NULL, ems_write,NULL,NULL, dev); - - } + for (i = 0; i < EMS_MAXPAGE; i++) { + io_removehandler(dev->base_addr + (EMS_PGSIZE * i), 2, + ems_read, NULL, NULL, ems_write, NULL, NULL, dev); + } } if (dev->ram != NULL) - free(dev->ram); + free(dev->ram); free(dev); } static const device_config_t ibmxt_config[] = { -// clang-format off + // clang-format off { .name = "size", .description = "Memory Size", @@ -711,25 +703,25 @@ static const device_config_t ibmxt_config[] = { .selection = { { 0 } } }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_t ibmxt_device = { - .name = "IBM PC/XT Memory Expansion", + .name = "IBM PC/XT Memory Expansion", .internal_name = "ibmxt", - .flags = DEVICE_ISA, - .local = ISAMEM_IBMXT_CARD, - .init = isamem_init, - .close = isamem_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISAMEM_IBMXT_CARD, + .init = isamem_init, + .close = isamem_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ibmxt_config + .force_redraw = NULL, + .config = ibmxt_config }; static const device_config_t genericxt_config[] = { -// clang-format off + // clang-format off { .name = "size", .description = "Memory Size", @@ -759,25 +751,25 @@ static const device_config_t genericxt_config[] = { .selection = { { 0 } } }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_t genericxt_device = { - .name = "Generic PC/XT Memory Expansion", + .name = "Generic PC/XT Memory Expansion", .internal_name = "genericxt", - .flags = DEVICE_ISA, - .local = ISAMEM_GENXT_CARD, - .init = isamem_init, - .close = isamem_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISAMEM_GENXT_CARD, + .init = isamem_init, + .close = isamem_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = genericxt_config + .force_redraw = NULL, + .config = genericxt_config }; static const device_config_t msramcard_config[] = { -// clang-format off + // clang-format off { .name = "size", .description = "Memory Size", @@ -807,25 +799,25 @@ static const device_config_t msramcard_config[] = { .selection = { { 0 } } }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_t msramcard_device = { - .name = "Microsoft RAMCard for IBM PC", + .name = "Microsoft RAMCard for IBM PC", .internal_name = "msramcard", - .flags = DEVICE_ISA, - .local = ISAMEM_RAMCARD_CARD, - .init = isamem_init, - .close = isamem_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISAMEM_RAMCARD_CARD, + .init = isamem_init, + .close = isamem_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = msramcard_config + .force_redraw = NULL, + .config = msramcard_config }; static const device_config_t mssystemcard_config[] = { -// clang-format off + // clang-format off { .name = "size", .description = "Memory Size", @@ -855,25 +847,25 @@ static const device_config_t mssystemcard_config[] = { .selection = { { 0 } } }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_t mssystemcard_device = { - .name = "Microsoft SystemCard", + .name = "Microsoft SystemCard", .internal_name = "mssystemcard", - .flags = DEVICE_ISA, - .local = ISAMEM_SYSTEMCARD_CARD, - .init = isamem_init, - .close = isamem_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISAMEM_SYSTEMCARD_CARD, + .init = isamem_init, + .close = isamem_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = mssystemcard_config + .force_redraw = NULL, + .config = mssystemcard_config }; static const device_config_t ibmat_config[] = { -// clang-format off + // clang-format off { .name = "size", .description = "Memory Size", @@ -903,25 +895,25 @@ static const device_config_t ibmat_config[] = { .selection = { { 0 } } }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_t ibmat_device = { - .name = "IBM PC/AT Memory Expansion", + .name = "IBM PC/AT Memory Expansion", .internal_name = "ibmat", - .flags = DEVICE_ISA, - .local = ISAMEM_IBMAT_CARD, - .init = isamem_init, - .close = isamem_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISAMEM_IBMAT_CARD, + .init = isamem_init, + .close = isamem_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ibmat_config + .force_redraw = NULL, + .config = ibmat_config }; static const device_config_t genericat_config[] = { -// clang-format off + // clang-format off { .name = "size", .description = "Memory Size", @@ -951,25 +943,25 @@ static const device_config_t genericat_config[] = { .selection = { { 0 } } }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_t genericat_device = { - .name = "Generic PC/AT Memory Expansion", + .name = "Generic PC/AT Memory Expansion", .internal_name = "genericat", - .flags = DEVICE_ISA, - .local = ISAMEM_GENAT_CARD, - .init = isamem_init, - .close = isamem_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISAMEM_GENAT_CARD, + .init = isamem_init, + .close = isamem_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = genericat_config + .force_redraw = NULL, + .config = genericat_config }; static const device_config_t p5pak_config[] = { -// clang-format off + // clang-format off { .name = "size", .description = "Memory Size", @@ -999,26 +991,25 @@ static const device_config_t p5pak_config[] = { .selection = { { 0 } } }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_t p5pak_device = { - .name = "Paradise Systems 5-PAK", + .name = "Paradise Systems 5-PAK", .internal_name = "p5pak", - .flags = DEVICE_ISA, - .local = ISAMEM_P5PAK_CARD, - .init = isamem_init, - .close = isamem_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISAMEM_P5PAK_CARD, + .init = isamem_init, + .close = isamem_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = p5pak_config + .force_redraw = NULL, + .config = p5pak_config }; - static const device_config_t a6pak_config[] = { -// clang-format off + // clang-format off { .name = "size", .description = "Memory Size", @@ -1048,25 +1039,25 @@ static const device_config_t a6pak_config[] = { .selection = { { 0 } } }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_t a6pak_device = { - .name = "AST SixPakPlus", + .name = "AST SixPakPlus", .internal_name = "a6pak", - .flags = DEVICE_ISA, - .local = ISAMEM_A6PAK_CARD, - .init = isamem_init, - .close = isamem_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISAMEM_A6PAK_CARD, + .init = isamem_init, + .close = isamem_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = a6pak_config + .force_redraw = NULL, + .config = a6pak_config }; static const device_config_t ems5150_config[] = { -// clang-format off + // clang-format off { .name = "size", .description = "Memory Size", @@ -1099,25 +1090,25 @@ static const device_config_t ems5150_config[] = { }, }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_t ems5150_device = { - .name = "Micro Mainframe EMS-5150(T)", + .name = "Micro Mainframe EMS-5150(T)", .internal_name = "ems5150", - .flags = DEVICE_ISA, - .local = ISAMEM_EMS5150_CARD, - .init = isamem_init, - .close = isamem_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISAMEM_EMS5150_CARD, + .init = isamem_init, + .close = isamem_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ems5150_config + .force_redraw = NULL, + .config = ems5150_config }; static const device_config_t ev159_config[] = { -// clang-format off + // clang-format off { .name = "size", .description = "Memory Size", @@ -1222,26 +1213,26 @@ static const device_config_t ev159_config[] = { }, }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_t ev159_device = { - .name = "Everex EV-159 RAM 3000 Deluxe", + .name = "Everex EV-159 RAM 3000 Deluxe", .internal_name = "ev159", - .flags = DEVICE_ISA, - .local = ISAMEM_EV159_CARD, - .init = isamem_init, - .close = isamem_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISAMEM_EV159_CARD, + .init = isamem_init, + .close = isamem_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ev159_config + .force_redraw = NULL, + .config = ev159_config }; #if defined(DEV_BRANCH) && defined(USE_ISAMEM_BRAT) static const device_config_t brat_config[] = { -// clang-format off + // clang-format off { .name = "base", .description = "Address", @@ -1316,27 +1307,27 @@ static const device_config_t brat_config[] = { .selection = { { 0 } } }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_t brat_device = { - .name = "BocaRAM/AT", + .name = "BocaRAM/AT", .internal_name = "brat", - .flags = DEVICE_ISA, - .local = ISAMEM_BRAT_CARD, - .init = isamem_init, - .close = isamem_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISAMEM_BRAT_CARD, + .init = isamem_init, + .close = isamem_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = brat_config + .force_redraw = NULL, + .config = brat_config }; #endif #if defined(DEV_BRANCH) && defined(USE_ISAMEM_RAMPAGE) static const device_config_t rampage_config[] = { -// clang-format off + // clang-format off { .name = "base", .description = "Address", @@ -1415,27 +1406,27 @@ static const device_config_t rampage_config[] = { .selection = { { 0 } } }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_t rampage_device = { - .name = "AST RAMpage/XT", + .name = "AST RAMpage/XT", .internal_name = "rampage", - .flags = DEVICE_ISA, - .local = ISAMEM_RAMPAGEXT_CARD, - .init = isamem_init, - .close = isamem_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISAMEM_RAMPAGEXT_CARD, + .init = isamem_init, + .close = isamem_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = rampage_config + .force_redraw = NULL, + .config = rampage_config }; #endif #if defined(DEV_BRANCH) && defined(USE_ISAMEM_IAB) static const device_config_t iab_config[] = { -// clang-format off + // clang-format off { .name = "base", .description = "Address", @@ -1514,42 +1505,42 @@ static const device_config_t iab_config[] = { .selection = { { 0 } } }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_t iab_device = { - .name = "Intel AboveBoard", + .name = "Intel AboveBoard", .internal_name = "iab", - .flags = DEVICE_ISA, - .local = ISAMEM_ABOVEBOARD_CARD, - .init = isamem_init, - .close = isamem_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISAMEM_ABOVEBOARD_CARD, + .init = isamem_init, + .close = isamem_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = iab_config + .force_redraw = NULL, + .config = iab_config }; #endif static const device_t isa_none_device = { - .name = "None", + .name = "None", .internal_name = "none", - .flags = 0, - .local = 0, - .init = NULL, - .close = NULL, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = NULL, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; static const struct { - const device_t *dev; + const device_t *dev; } boards[] = { -// clang-format off + // clang-format off { &isa_none_device }, { &ibmxt_device }, { &genericxt_device }, @@ -1571,7 +1562,7 @@ static const struct { { &iab_device }, #endif { NULL } -// clang-format on + // clang-format on }; void @@ -1583,20 +1574,22 @@ isamem_reset(void) isa_mem_size = 0; for (i = 0; i < ISAMEM_MAX; i++) { - k = isamem_type[i]; - if (k == 0) continue; + k = isamem_type[i]; + if (k == 0) + continue; - /* Add the instance to the system. */ - device_add_inst(boards[k].dev, i + 1); + /* Add the instance to the system. */ + device_add_inst(boards[k].dev, i + 1); } } const char * isamem_get_name(int board) { - if (boards[board].dev == NULL) return(NULL); + if (boards[board].dev == NULL) + return (NULL); - return(boards[board].dev->name); + return (boards[board].dev->name); } const char * @@ -1611,18 +1604,18 @@ isamem_get_from_internal_name(const char *s) int c = 0; while (boards[c].dev != NULL) { - if (! strcmp(boards[c].dev->internal_name, s)) - return(c); - c++; + if (!strcmp(boards[c].dev->internal_name, s)) + return (c); + c++; } /* Not found. */ - return(0); + return (0); } const device_t * isamem_get_device(int board) { - /* Add the instance to the system. */ +/* Add the instance to the system. */ return boards[board].dev; } diff --git a/src/device/isapnp.c b/src/device/isapnp.c index 669a45eec..b2392b6a3 100644 --- a/src/device/isapnp.c +++ b/src/device/isapnp.c @@ -27,53 +27,50 @@ #include <86box/io.h> #include <86box/isapnp.h> +#define CHECK_CURRENT_LD() \ + if (!dev->current_ld) { \ + isapnp_log("ISAPnP: No logical device selected\n"); \ + break; \ + } -#define CHECK_CURRENT_LD() if (!dev->current_ld) { \ - isapnp_log("ISAPnP: No logical device selected\n"); \ - break; \ - } +#define CHECK_CURRENT_CARD() \ + if (1) { \ + card = dev->first_card; \ + while (card) { \ + if (card->enable && (card->state == PNP_STATE_CONFIG)) \ + break; \ + card = card->next; \ + } \ + if (!card) { \ + isapnp_log("ISAPnP: No card in CONFIG state\n"); \ + break; \ + } \ + } -#define CHECK_CURRENT_CARD() if (1) { \ - card = dev->first_card; \ - while (card) { \ - if (card->enable && (card->state == PNP_STATE_CONFIG)) \ - break; \ - card = card->next; \ - } \ - if (!card) { \ - isapnp_log("ISAPnP: No card in CONFIG state\n"); \ - break; \ - } \ - } - - -static const uint8_t pnp_init_key[32] = { 0x6A, 0xB5, 0xDA, 0xED, 0xF6, 0xFB, 0x7D, 0xBE, - 0xDF, 0x6F, 0x37, 0x1B, 0x0D, 0x86, 0xC3, 0x61, - 0xB0, 0x58, 0x2C, 0x16, 0x8B, 0x45, 0xA2, 0xD1, - 0xE8, 0x74, 0x3A, 0x9D, 0xCE, 0xE7, 0x73, 0x39 }; +static const uint8_t pnp_init_key[32] = { 0x6A, 0xB5, 0xDA, 0xED, 0xF6, 0xFB, 0x7D, 0xBE, + 0xDF, 0x6F, 0x37, 0x1B, 0x0D, 0x86, 0xC3, 0x61, + 0xB0, 0x58, 0x2C, 0x16, 0x8B, 0x45, 0xA2, 0xD1, + 0xE8, 0x74, 0x3A, 0x9D, 0xCE, 0xE7, 0x73, 0x39 }; static const device_t isapnp_device; - #ifdef ENABLE_ISAPNP_LOG int isapnp_do_log = ENABLE_ISAPNP_LOG; - static void isapnp_log(const char *fmt, ...) { va_list ap; if (isapnp_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define isapnp_log(fmt, ...) +# define isapnp_log(fmt, ...) #endif - enum { PNP_STATE_WAIT_FOR_KEY = 0, PNP_STATE_CONFIG, @@ -82,140 +79,137 @@ enum { }; typedef struct _isapnp_device_ { - uint8_t number; - uint8_t regs[256]; - uint8_t mem_upperlimit, irq_types, io_16bit, io_len[8]; + uint8_t number; + uint8_t regs[256]; + uint8_t mem_upperlimit, irq_types, io_16bit, io_len[8]; const isapnp_device_config_t *defaults; struct _isapnp_device_ *next; } isapnp_device_t; typedef struct _isapnp_card_ { - uint8_t enable, state, csn, id_checksum, serial_read, serial_read_pair, serial_read_pos, *rom; - uint16_t rom_pos, rom_size; - void *priv; + uint8_t enable, state, csn, id_checksum, serial_read, serial_read_pair, serial_read_pos, *rom; + uint16_t rom_pos, rom_size; + void *priv; /* ISAPnP memory and I/O addresses are awkwardly big endian, so we populate this structure whenever something on some device changes, and pass it on instead. */ isapnp_device_config_t config; - void (*config_changed)(uint8_t ld, isapnp_device_config_t *config, void *priv); - void (*csn_changed)(uint8_t csn, void *priv); - uint8_t (*read_vendor_reg)(uint8_t ld, uint8_t reg, void *priv); - void (*write_vendor_reg)(uint8_t ld, uint8_t reg, uint8_t val, void *priv); + void (*config_changed)(uint8_t ld, isapnp_device_config_t *config, void *priv); + void (*csn_changed)(uint8_t csn, void *priv); + uint8_t (*read_vendor_reg)(uint8_t ld, uint8_t reg, void *priv); + void (*write_vendor_reg)(uint8_t ld, uint8_t reg, uint8_t val, void *priv); - isapnp_device_t *first_ld; + isapnp_device_t *first_ld; struct _isapnp_card_ *next; } isapnp_card_t; typedef struct { - uint8_t reg, key_pos: 5; - uint16_t read_data_addr; + uint8_t reg, key_pos : 5; + uint16_t read_data_addr; - isapnp_card_t *first_card, *isolated_card, *current_ld_card; + isapnp_card_t *first_card, *isolated_card, *current_ld_card; isapnp_device_t *current_ld; } isapnp_t; - static void isapnp_device_config_changed(isapnp_card_t *card, isapnp_device_t *ld) { /* Ignore card if it hasn't signed up for configuration changes. */ if (!card->config_changed) - return; + return; /* Populate config structure, performing endianness conversion as needed. */ card->config.activate = ld->regs[0x30] & 0x01; uint8_t i, reg_base; for (i = 0; i < 4; i++) { - reg_base = 0x40 + (8 * i); - card->config.mem[i].base = (ld->regs[reg_base] << 16) | (ld->regs[reg_base + 1] << 8); - card->config.mem[i].size = (ld->regs[reg_base + 3] << 16) | (ld->regs[reg_base + 4] << 8); - if (ld->regs[reg_base + 2] & 0x01) /* upper limit */ - card->config.mem[i].size -= card->config.mem[i].base; + reg_base = 0x40 + (8 * i); + card->config.mem[i].base = (ld->regs[reg_base] << 16) | (ld->regs[reg_base + 1] << 8); + card->config.mem[i].size = (ld->regs[reg_base + 3] << 16) | (ld->regs[reg_base + 4] << 8); + if (ld->regs[reg_base + 2] & 0x01) /* upper limit */ + card->config.mem[i].size -= card->config.mem[i].base; } for (i = 0; i < 4; i++) { - reg_base = (i == 0) ? 0x76 : (0x80 + (16 * i)); - card->config.mem32[i].base = (ld->regs[reg_base] << 24) | (ld->regs[reg_base + 1] << 16) | (ld->regs[reg_base + 2] << 8) | ld->regs[reg_base + 3]; - card->config.mem32[i].size = (ld->regs[reg_base + 5] << 24) | (ld->regs[reg_base + 6] << 16) | (ld->regs[reg_base + 7] << 8) | ld->regs[reg_base + 8]; - if (ld->regs[reg_base + 4] & 0x01) /* upper limit */ - card->config.mem32[i].size -= card->config.mem32[i].base; + reg_base = (i == 0) ? 0x76 : (0x80 + (16 * i)); + card->config.mem32[i].base = (ld->regs[reg_base] << 24) | (ld->regs[reg_base + 1] << 16) | (ld->regs[reg_base + 2] << 8) | ld->regs[reg_base + 3]; + card->config.mem32[i].size = (ld->regs[reg_base + 5] << 24) | (ld->regs[reg_base + 6] << 16) | (ld->regs[reg_base + 7] << 8) | ld->regs[reg_base + 8]; + if (ld->regs[reg_base + 4] & 0x01) /* upper limit */ + card->config.mem32[i].size -= card->config.mem32[i].base; } for (i = 0; i < 8; i++) { - reg_base = 0x60 + (2 * i); - if (ld->regs[0x31] & 0x02) - card->config.io[i].base = 0; /* let us handle I/O range check reads */ - else - card->config.io[i].base = (ld->regs[reg_base] << 8) | ld->regs[reg_base + 1]; + reg_base = 0x60 + (2 * i); + if (ld->regs[0x31] & 0x02) + card->config.io[i].base = 0; /* let us handle I/O range check reads */ + else + card->config.io[i].base = (ld->regs[reg_base] << 8) | ld->regs[reg_base + 1]; } for (i = 0; i < 2; i++) { - reg_base = 0x70 + (2 * i); - card->config.irq[i].irq = ld->regs[reg_base]; - card->config.irq[i].level = ld->regs[reg_base + 1] & 0x02; - card->config.irq[i].type = ld->regs[reg_base + 1] & 0x01; + reg_base = 0x70 + (2 * i); + card->config.irq[i].irq = ld->regs[reg_base]; + card->config.irq[i].level = ld->regs[reg_base + 1] & 0x02; + card->config.irq[i].type = ld->regs[reg_base + 1] & 0x01; } for (i = 0; i < 2; i++) { - reg_base = 0x74 + i; - card->config.dma[i].dma = ld->regs[reg_base]; + reg_base = 0x74 + i; + card->config.dma[i].dma = ld->regs[reg_base]; } /* Signal the configuration change. */ card->config_changed(ld->number, &card->config, card->priv); } - static void isapnp_reset_ld_config(isapnp_device_t *ld) { /* Do nothing if there's no default configuration for this device. */ const isapnp_device_config_t *config = ld->defaults; if (!config) - return; + return; /* Populate configuration registers. */ ld->regs[0x30] = !!config->activate; - uint8_t i, reg_base; + uint8_t i, reg_base; uint32_t size; for (i = 0; i < 4; i++) { - reg_base = 0x40 + (8 * i); - ld->regs[reg_base] = config->mem[i].base >> 16; - ld->regs[reg_base + 1] = config->mem[i].base >> 8; - size = config->mem[i].size; - if (ld->regs[reg_base + 2] & 0x01) /* upper limit */ - size += config->mem[i].base; - ld->regs[reg_base + 3] = size >> 16; - ld->regs[reg_base + 4] = size >> 8; + reg_base = 0x40 + (8 * i); + ld->regs[reg_base] = config->mem[i].base >> 16; + ld->regs[reg_base + 1] = config->mem[i].base >> 8; + size = config->mem[i].size; + if (ld->regs[reg_base + 2] & 0x01) /* upper limit */ + size += config->mem[i].base; + ld->regs[reg_base + 3] = size >> 16; + ld->regs[reg_base + 4] = size >> 8; } for (i = 0; i < 4; i++) { - reg_base = (i == 0) ? 0x76 : (0x80 + (16 * i)); - ld->regs[reg_base] = config->mem32[i].base >> 24; - ld->regs[reg_base + 1] = config->mem32[i].base >> 16; - ld->regs[reg_base + 2] = config->mem32[i].base >> 8; - ld->regs[reg_base + 3] = config->mem32[i].base; - size = config->mem32[i].size; - if (ld->regs[reg_base + 4] & 0x01) /* upper limit */ - size += config->mem32[i].base; - ld->regs[reg_base + 5] = size >> 24; - ld->regs[reg_base + 6] = size >> 16; - ld->regs[reg_base + 7] = size >> 8; - ld->regs[reg_base + 8] = size; + reg_base = (i == 0) ? 0x76 : (0x80 + (16 * i)); + ld->regs[reg_base] = config->mem32[i].base >> 24; + ld->regs[reg_base + 1] = config->mem32[i].base >> 16; + ld->regs[reg_base + 2] = config->mem32[i].base >> 8; + ld->regs[reg_base + 3] = config->mem32[i].base; + size = config->mem32[i].size; + if (ld->regs[reg_base + 4] & 0x01) /* upper limit */ + size += config->mem32[i].base; + ld->regs[reg_base + 5] = size >> 24; + ld->regs[reg_base + 6] = size >> 16; + ld->regs[reg_base + 7] = size >> 8; + ld->regs[reg_base + 8] = size; } for (i = 0; i < 8; i++) { - reg_base = 0x60 + (2 * i); - ld->regs[reg_base] = config->io[i].base >> 8; - ld->regs[reg_base + 1] = config->io[i].base; + reg_base = 0x60 + (2 * i); + ld->regs[reg_base] = config->io[i].base >> 8; + ld->regs[reg_base + 1] = config->io[i].base; } for (i = 0; i < 2; i++) { - reg_base = 0x70 + (2 * i); - ld->regs[reg_base] = config->irq[i].irq; - ld->regs[reg_base + 1] = (!!config->irq[i].level << 1) | !!config->irq[i].type; + reg_base = 0x70 + (2 * i); + ld->regs[reg_base] = config->irq[i].irq; + ld->regs[reg_base + 1] = (!!config->irq[i].level << 1) | !!config->irq[i].type; } for (i = 0; i < 2; i++) { - reg_base = 0x74 + i; - ld->regs[reg_base] = config->dma[i].dma; + reg_base = 0x74 + i; + ld->regs[reg_base] = config->dma[i].dma; } } - static void isapnp_reset_ld_regs(isapnp_device_t *ld) { @@ -227,28 +221,27 @@ isapnp_reset_ld_regs(isapnp_device_t *ld) /* Set the upper limit bit on memory ranges which require it. */ uint8_t i; for (i = 0; i < 4; i++) - ld->regs[0x42 + (8 * i)] |= !!(ld->mem_upperlimit & (1 << i)); + ld->regs[0x42 + (8 * i)] |= !!(ld->mem_upperlimit & (1 << i)); ld->regs[0x7a] |= !!(ld->mem_upperlimit & (1 << 4)); for (i = 1; i < 4; i++) - ld->regs[0x84 + (16 * i)] |= !!(ld->mem_upperlimit & (1 << (4 + i))); + ld->regs[0x84 + (16 * i)] |= !!(ld->mem_upperlimit & (1 << (4 + i))); /* Set the default IRQ type bits. */ for (i = 0; i < 2; i++) { - if (ld->irq_types & (0x1 << (4 * i))) - ld->regs[0x70 + (2 * i)] = 0x02; - else if (ld->irq_types & (0x2 << (4 * i))) - ld->regs[0x70 + (2 * i)] = 0x00; - else if (ld->irq_types & (0x4 << (4 * i))) - ld->regs[0x70 + (2 * i)] = 0x03; - else if (ld->irq_types & (0x8 << (4 * i))) - ld->regs[0x70 + (2 * i)] = 0x01; + if (ld->irq_types & (0x1 << (4 * i))) + ld->regs[0x70 + (2 * i)] = 0x02; + else if (ld->irq_types & (0x2 << (4 * i))) + ld->regs[0x70 + (2 * i)] = 0x00; + else if (ld->irq_types & (0x4 << (4 * i))) + ld->regs[0x70 + (2 * i)] = 0x03; + else if (ld->irq_types & (0x8 << (4 * i))) + ld->regs[0x70 + (2 * i)] = 0x01; } /* Reset configuration registers to match the default configuration. */ isapnp_reset_ld_config(ld); } - static uint8_t isapnp_read_rangecheck(uint16_t addr, void *priv) { @@ -256,119 +249,147 @@ isapnp_read_rangecheck(uint16_t addr, void *priv) return (dev->regs[0x31] & 0x01) ? 0x55 : 0xaa; } - static uint8_t isapnp_read_data(uint16_t addr, void *priv) { - isapnp_t *dev = (isapnp_t *) priv; - uint8_t ret = 0xff, bit, next_shift; + isapnp_t *dev = (isapnp_t *) priv; + uint8_t ret = 0xff, bit, next_shift; isapnp_card_t *card; switch (dev->reg) { - case 0x01: /* Serial Isolation */ - card = dev->first_card; - while (card) { - if (card->enable && card->rom && (card->state == PNP_STATE_ISOLATION)) - break; - card = card->next; - } - dev->isolated_card = card; + case 0x01: /* Serial Isolation */ + card = dev->first_card; + while (card) { + if (card->enable && card->rom && (card->state == PNP_STATE_ISOLATION)) + break; + card = card->next; + } + dev->isolated_card = card; - if (card) { - if (card->serial_read_pair) { /* second byte (aa/00) */ - card->serial_read <<= 1; - if (!card->serial_read_pos) - card->rom_pos = 0x09; - } else { /* first byte (55/00) */ - if (card->serial_read_pos < 64) { /* reading 64-bit vendor/serial */ - bit = (card->rom[card->serial_read_pos >> 3] >> (card->serial_read_pos & 0x7)) & 0x01; - next_shift = (!!(card->id_checksum & 0x02) ^ !!(card->id_checksum & 0x01) ^ bit) & 0x01; - card->id_checksum >>= 1; - card->id_checksum |= (next_shift << 7); - } else { /* reading 8-bit checksum */ - if (card->serial_read_pos == 64) /* populate ID checksum in ROM */ - card->rom[0x08] = card->id_checksum; - bit = (card->id_checksum >> (card->serial_read_pos & 0x7)) & 0x01; - } - isapnp_log("ISAPnP: Read bit %d of byte %02X (%02X) = %d\n", card->serial_read_pos & 0x7, card->serial_read_pos >> 3, card->rom[card->serial_read_pos >> 3], bit); - card->serial_read = bit ? 0x55 : 0x00; - card->serial_read_pos = (card->serial_read_pos + 1) % 72; - } - card->serial_read_pair ^= 1; - ret = card->serial_read; - } + if (card) { + if (card->serial_read_pair) { /* second byte (aa/00) */ + card->serial_read <<= 1; + if (!card->serial_read_pos) + card->rom_pos = 0x09; + } else { /* first byte (55/00) */ + if (card->serial_read_pos < 64) { /* reading 64-bit vendor/serial */ + bit = (card->rom[card->serial_read_pos >> 3] >> (card->serial_read_pos & 0x7)) & 0x01; + next_shift = (!!(card->id_checksum & 0x02) ^ !!(card->id_checksum & 0x01) ^ bit) & 0x01; + card->id_checksum >>= 1; + card->id_checksum |= (next_shift << 7); + } else { /* reading 8-bit checksum */ + if (card->serial_read_pos == 64) /* populate ID checksum in ROM */ + card->rom[0x08] = card->id_checksum; + bit = (card->id_checksum >> (card->serial_read_pos & 0x7)) & 0x01; + } + isapnp_log("ISAPnP: Read bit %d of byte %02X (%02X) = %d\n", card->serial_read_pos & 0x7, card->serial_read_pos >> 3, card->rom[card->serial_read_pos >> 3], bit); + card->serial_read = bit ? 0x55 : 0x00; + card->serial_read_pos = (card->serial_read_pos + 1) % 72; + } + card->serial_read_pair ^= 1; + ret = card->serial_read; + } - break; + break; - case 0x04: /* Resource Data */ - CHECK_CURRENT_CARD(); + case 0x04: /* Resource Data */ + CHECK_CURRENT_CARD(); - isapnp_log("ISAPnP: Read resource data index %02X (%02X) from CSN %02X\n", card->rom_pos, card->rom[card->rom_pos], card->csn); - if (card->rom_pos >= card->rom_size) - ret = 0xff; - else - ret = card->rom[card->rom_pos++]; + isapnp_log("ISAPnP: Read resource data index %02X (%02X) from CSN %02X\n", card->rom_pos, card->rom[card->rom_pos], card->csn); + if (card->rom_pos >= card->rom_size) + ret = 0xff; + else + ret = card->rom[card->rom_pos++]; - break; + break; - case 0x05: /* Status */ - ret = 0x00; - CHECK_CURRENT_CARD(); + case 0x05: /* Status */ + ret = 0x00; + CHECK_CURRENT_CARD(); - isapnp_log("ISAPnP: Query status for CSN %02X\n", card->csn); - ret = 0x01; + isapnp_log("ISAPnP: Query status for CSN %02X\n", card->csn); + ret = 0x01; - break; + break; - case 0x06: /* Card Select Number */ - ret = 0x00; - CHECK_CURRENT_CARD(); + case 0x06: /* Card Select Number */ + ret = 0x00; + CHECK_CURRENT_CARD(); - isapnp_log("ISAPnP: Query CSN %02X\n", card->csn); - ret = card->csn; + isapnp_log("ISAPnP: Query CSN %02X\n", card->csn); + ret = card->csn; - break; + break; - case 0x07: /* Logical Device Number */ - ret = 0x00; - CHECK_CURRENT_LD(); + case 0x07: /* Logical Device Number */ + ret = 0x00; + CHECK_CURRENT_LD(); - isapnp_log("ISAPnP: Query LDN for CSN %02X device %02X\n", dev->current_ld_card->csn, dev->current_ld->number); - ret = dev->current_ld->number; + isapnp_log("ISAPnP: Query LDN for CSN %02X device %02X\n", dev->current_ld_card->csn, dev->current_ld->number); + ret = dev->current_ld->number; - break; + break; - case 0x20: case 0x21: case 0x22: case 0x23: - case 0x24: case 0x25: case 0x26: case 0x27: - case 0x28: case 0x29: case 0x2a: case 0x2b: - case 0x2c: case 0x2d: case 0x2e: case 0x2f: - CHECK_CURRENT_CARD(); + case 0x20: + case 0x21: + case 0x22: + case 0x23: + case 0x24: + case 0x25: + case 0x26: + case 0x27: + case 0x28: + case 0x29: + case 0x2a: + case 0x2b: + case 0x2c: + case 0x2d: + case 0x2e: + case 0x2f: + CHECK_CURRENT_CARD(); - isapnp_log("ISAPnP: Read vendor-defined register %02X from CSN %02X\n", dev->reg, card->csn); + isapnp_log("ISAPnP: Read vendor-defined register %02X from CSN %02X\n", dev->reg, card->csn); - if (card->read_vendor_reg) - ret = card->read_vendor_reg(0, dev->reg, card->priv); - break; + if (card->read_vendor_reg) + ret = card->read_vendor_reg(0, dev->reg, card->priv); + break; - case 0x38: case 0x39: case 0x3a: case 0x3b: - case 0x3c: case 0x3d: case 0x3e: case 0x3f: - case 0xf0: case 0xf1: case 0xf2: case 0xf3: - case 0xf4: case 0xf5: case 0xf6: case 0xf7: - case 0xf8: case 0xf9: case 0xfa: case 0xfb: - case 0xfc: case 0xfd: case 0xfe: - CHECK_CURRENT_LD(); - isapnp_log("ISAPnP: Read vendor-defined register %02X from CSN %02X device %02X\n", dev->reg, dev->current_ld_card->csn, dev->current_ld->number); - if (dev->current_ld_card->read_vendor_reg) - ret = dev->current_ld_card->read_vendor_reg(dev->current_ld->number, dev->reg, dev->current_ld_card->priv); - break; + case 0x38: + case 0x39: + case 0x3a: + case 0x3b: + case 0x3c: + case 0x3d: + case 0x3e: + case 0x3f: + case 0xf0: + case 0xf1: + case 0xf2: + case 0xf3: + case 0xf4: + case 0xf5: + case 0xf6: + case 0xf7: + case 0xf8: + case 0xf9: + case 0xfa: + case 0xfb: + case 0xfc: + case 0xfd: + case 0xfe: + CHECK_CURRENT_LD(); + isapnp_log("ISAPnP: Read vendor-defined register %02X from CSN %02X device %02X\n", dev->reg, dev->current_ld_card->csn, dev->current_ld->number); + if (dev->current_ld_card->read_vendor_reg) + ret = dev->current_ld_card->read_vendor_reg(dev->current_ld->number, dev->reg, dev->current_ld_card->priv); + break; - default: - if (dev->reg >= 0x30) { - CHECK_CURRENT_LD(); - isapnp_log("ISAPnP: Read register %02X from CSN %02X device %02X\n", dev->reg, dev->current_ld_card->csn, dev->current_ld->number); - ret = dev->current_ld->regs[dev->reg]; - } - break; + default: + if (dev->reg >= 0x30) { + CHECK_CURRENT_LD(); + isapnp_log("ISAPnP: Read register %02X from CSN %02X device %02X\n", dev->reg, dev->current_ld_card->csn, dev->current_ld->number); + ret = dev->current_ld->regs[dev->reg]; + } + break; } isapnp_log("ISAPnP: read_data(%02X) = %02X\n", dev->reg, ret); @@ -376,255 +397,294 @@ isapnp_read_data(uint16_t addr, void *priv) return ret; } - static void isapnp_set_read_data(uint16_t addr, isapnp_t *dev) { /* Remove existing READ_DATA port if set. */ if (dev->read_data_addr) { - io_removehandler(dev->read_data_addr, 1, isapnp_read_data, NULL, NULL, NULL, NULL, NULL, dev); - dev->read_data_addr = 0; + io_removehandler(dev->read_data_addr, 1, isapnp_read_data, NULL, NULL, NULL, NULL, NULL, dev); + dev->read_data_addr = 0; } /* Set new READ_DATA port if within range. */ if ((addr >= 0x203) && (addr <= 0x3ff)) { - dev->read_data_addr = addr; - io_sethandler(dev->read_data_addr, 1, isapnp_read_data, NULL, NULL, NULL, NULL, NULL, dev); + dev->read_data_addr = addr; + io_sethandler(dev->read_data_addr, 1, isapnp_read_data, NULL, NULL, NULL, NULL, NULL, dev); } } - static void isapnp_write_addr(uint16_t addr, uint8_t val, void *priv) { - isapnp_t *dev = (isapnp_t *) priv; + isapnp_t *dev = (isapnp_t *) priv; isapnp_card_t *card = dev->first_card; isapnp_log("ISAPnP: write_addr(%02X)\n", val); if (!card) /* don't do anything if we have no PnP cards */ - return; + return; dev->reg = val; if (card->state == PNP_STATE_WAIT_FOR_KEY) { /* checking only the first card should be fine */ - /* Check written value against LFSR key. */ - if (val == pnp_init_key[dev->key_pos]) { - dev->key_pos++; - if (!dev->key_pos) { - isapnp_log("ISAPnP: Key unlocked, putting cards to SLEEP\n"); - while (card) { - if (card->enable && (card->enable != ISAPNP_CARD_NO_KEY) && (card->state == PNP_STATE_WAIT_FOR_KEY)) - card->state = PNP_STATE_SLEEP; - card = card->next; - } - } - } else { - dev->key_pos = 0; - } + /* Check written value against LFSR key. */ + if (val == pnp_init_key[dev->key_pos]) { + dev->key_pos++; + if (!dev->key_pos) { + isapnp_log("ISAPnP: Key unlocked, putting cards to SLEEP\n"); + while (card) { + if (card->enable && (card->enable != ISAPNP_CARD_NO_KEY) && (card->state == PNP_STATE_WAIT_FOR_KEY)) + card->state = PNP_STATE_SLEEP; + card = card->next; + } + } + } else { + dev->key_pos = 0; + } } } - static void isapnp_write_data(uint16_t addr, uint8_t val, void *priv) { - isapnp_t *dev = (isapnp_t *) priv; - isapnp_card_t *card; + isapnp_t *dev = (isapnp_t *) priv; + isapnp_card_t *card; isapnp_device_t *ld; - uint16_t io_addr, reset_cards = 0; + uint16_t io_addr, reset_cards = 0; isapnp_log("ISAPnP: write_data(%02X)\n", val); switch (dev->reg) { - case 0x00: /* Set RD_DATA Port */ - isapnp_set_read_data((val << 2) | 3, dev); - isapnp_log("ISAPnP: Read data port set to %04X\n", dev->read_data_addr); - break; + case 0x00: /* Set RD_DATA Port */ + isapnp_set_read_data((val << 2) | 3, dev); + isapnp_log("ISAPnP: Read data port set to %04X\n", dev->read_data_addr); + break; - case 0x02: /* Config Control */ - if (val & 0x01) { - isapnp_log("ISAPnP: Reset\n"); + case 0x02: /* Config Control */ + if (val & 0x01) { + isapnp_log("ISAPnP: Reset\n"); - card = dev->first_card; - while (card) { - ld = card->first_ld; - while (ld) { - if (card->state != PNP_STATE_WAIT_FOR_KEY) { - isapnp_reset_ld_regs(ld); - isapnp_device_config_changed(card, ld); - reset_cards++; - } - ld = ld->next; - } - card = card->next; - } + card = dev->first_card; + while (card) { + ld = card->first_ld; + while (ld) { + if (card->state != PNP_STATE_WAIT_FOR_KEY) { + isapnp_reset_ld_regs(ld); + isapnp_device_config_changed(card, ld); + reset_cards++; + } + ld = ld->next; + } + card = card->next; + } - if (reset_cards != 0) { - dev->current_ld = NULL; - dev->current_ld_card = NULL; - dev->isolated_card = NULL; - } - } - if (val & 0x02) { - isapnp_log("ISAPnP: Return to WAIT_FOR_KEY\n"); - card = dev->first_card; - while (card) { - card->state = PNP_STATE_WAIT_FOR_KEY; - card = card->next; - } - } - if (val & 0x04) { - isapnp_log("ISAPnP: Reset CSN\n"); - card = dev->first_card; - while (card) { - isapnp_set_csn(card, 0); - card = card->next; - } - } - break; + if (reset_cards != 0) { + dev->current_ld = NULL; + dev->current_ld_card = NULL; + dev->isolated_card = NULL; + } + } + if (val & 0x02) { + isapnp_log("ISAPnP: Return to WAIT_FOR_KEY\n"); + card = dev->first_card; + while (card) { + card->state = PNP_STATE_WAIT_FOR_KEY; + card = card->next; + } + } + if (val & 0x04) { + isapnp_log("ISAPnP: Reset CSN\n"); + card = dev->first_card; + while (card) { + isapnp_set_csn(card, 0); + card = card->next; + } + } + break; - case 0x03: /* Wake[CSN] */ - isapnp_log("ISAPnP: Wake[%02X]\n", val); - card = dev->first_card; - while (card) { - if (card->csn == val) { - card->rom_pos = 0; - card->id_checksum = pnp_init_key[0]; - if (card->state == PNP_STATE_SLEEP) - card->state = (val == 0) ? PNP_STATE_ISOLATION : PNP_STATE_CONFIG; - } else { - card->state = PNP_STATE_SLEEP; - } + case 0x03: /* Wake[CSN] */ + isapnp_log("ISAPnP: Wake[%02X]\n", val); + card = dev->first_card; + while (card) { + if (card->csn == val) { + card->rom_pos = 0; + card->id_checksum = pnp_init_key[0]; + if (card->state == PNP_STATE_SLEEP) + card->state = (val == 0) ? PNP_STATE_ISOLATION : PNP_STATE_CONFIG; + } else { + card->state = PNP_STATE_SLEEP; + } - card = card->next; - } - break; + card = card->next; + } + break; - case 0x06: /* Card Select Number */ - if (dev->isolated_card) { - isapnp_log("ISAPnP: Set CSN %02X\n", val); - isapnp_set_csn(dev->isolated_card, val); - dev->isolated_card->state = PNP_STATE_CONFIG; - dev->isolated_card = NULL; - } else { - isapnp_log("ISAPnP: Set CSN %02X but no card is isolated\n", val); - } - break; + case 0x06: /* Card Select Number */ + if (dev->isolated_card) { + isapnp_log("ISAPnP: Set CSN %02X\n", val); + isapnp_set_csn(dev->isolated_card, val); + dev->isolated_card->state = PNP_STATE_CONFIG; + dev->isolated_card = NULL; + } else { + isapnp_log("ISAPnP: Set CSN %02X but no card is isolated\n", val); + } + break; - case 0x07: /* Logical Device Number */ - CHECK_CURRENT_CARD(); + case 0x07: /* Logical Device Number */ + CHECK_CURRENT_CARD(); - ld = card->first_ld; - while (ld) { - if (ld->number == val) { - isapnp_log("ISAPnP: Select CSN %02X device %02X\n", card->csn, val); - dev->current_ld_card = card; - dev->current_ld = ld; - break; - } - ld = ld->next; - } + ld = card->first_ld; + while (ld) { + if (ld->number == val) { + isapnp_log("ISAPnP: Select CSN %02X device %02X\n", card->csn, val); + dev->current_ld_card = card; + dev->current_ld = ld; + break; + } + ld = ld->next; + } - if (!ld) - isapnp_log("ISAPnP: CSN %02X has no device %02X\n", card->csn, val); + if (!ld) + isapnp_log("ISAPnP: CSN %02X has no device %02X\n", card->csn, val); - break; + break; - case 0x30: /* Activate */ - CHECK_CURRENT_LD(); + case 0x30: /* Activate */ + CHECK_CURRENT_LD(); - isapnp_log("ISAPnP: %sctivate CSN %02X device %02X\n", (val & 0x01) ? "A" : "Dea", dev->current_ld_card->csn, dev->current_ld->number); + isapnp_log("ISAPnP: %sctivate CSN %02X device %02X\n", (val & 0x01) ? "A" : "Dea", dev->current_ld_card->csn, dev->current_ld->number); - dev->current_ld->regs[dev->reg] = val & 0x01; - isapnp_device_config_changed(dev->current_ld_card, dev->current_ld); + dev->current_ld->regs[dev->reg] = val & 0x01; + isapnp_device_config_changed(dev->current_ld_card, dev->current_ld); - break; + break; - case 0x31: /* I/O Range Check */ - CHECK_CURRENT_LD(); + case 0x31: /* I/O Range Check */ + CHECK_CURRENT_LD(); - for (uint8_t i = 0; i < 8; i++) { - if (!dev->current_ld->io_len[i]) - continue; + for (uint8_t i = 0; i < 8; i++) { + if (!dev->current_ld->io_len[i]) + continue; - io_addr = (dev->current_ld->regs[0x60 + (2 * i)] << 8) | dev->current_ld->regs[0x61 + (2 * i)]; - if (dev->current_ld->regs[dev->reg] & 0x02) - io_removehandler(io_addr, dev->current_ld->io_len[i], isapnp_read_rangecheck, NULL, NULL, NULL, NULL, NULL, dev->current_ld); - if (val & 0x02) - io_sethandler(io_addr, dev->current_ld->io_len[i], isapnp_read_rangecheck, NULL, NULL, NULL, NULL, NULL, dev->current_ld); - } + io_addr = (dev->current_ld->regs[0x60 + (2 * i)] << 8) | dev->current_ld->regs[0x61 + (2 * i)]; + if (dev->current_ld->regs[dev->reg] & 0x02) + io_removehandler(io_addr, dev->current_ld->io_len[i], isapnp_read_rangecheck, NULL, NULL, NULL, NULL, NULL, dev->current_ld); + if (val & 0x02) + io_sethandler(io_addr, dev->current_ld->io_len[i], isapnp_read_rangecheck, NULL, NULL, NULL, NULL, NULL, dev->current_ld); + } - dev->current_ld->regs[dev->reg] = val & 0x03; - isapnp_device_config_changed(dev->current_ld_card, dev->current_ld); + dev->current_ld->regs[dev->reg] = val & 0x03; + isapnp_device_config_changed(dev->current_ld_card, dev->current_ld); - break; + break; - case 0x20: case 0x21: case 0x22: case 0x23: - case 0x24: case 0x25: case 0x26: case 0x27: - case 0x28: case 0x29: case 0x2a: case 0x2b: - case 0x2c: case 0x2d: case 0x2e: case 0x2f: - CHECK_CURRENT_CARD(); + case 0x20: + case 0x21: + case 0x22: + case 0x23: + case 0x24: + case 0x25: + case 0x26: + case 0x27: + case 0x28: + case 0x29: + case 0x2a: + case 0x2b: + case 0x2c: + case 0x2d: + case 0x2e: + case 0x2f: + CHECK_CURRENT_CARD(); - isapnp_log("ISAPnP: Write %02X to vendor-defined register %02X on CSN %02X\n", val, dev->reg, card->csn); + isapnp_log("ISAPnP: Write %02X to vendor-defined register %02X on CSN %02X\n", val, dev->reg, card->csn); - if (card->write_vendor_reg) - card->write_vendor_reg(0, dev->reg, val, card->priv); - break; + if (card->write_vendor_reg) + card->write_vendor_reg(0, dev->reg, val, card->priv); + break; - case 0x38: case 0x39: case 0x3a: case 0x3b: - case 0x3c: case 0x3d: case 0x3e: case 0x3f: - case 0xf0: case 0xf1: case 0xf2: case 0xf3: - case 0xf4: case 0xf5: case 0xf6: case 0xf7: - case 0xf8: case 0xf9: case 0xfa: case 0xfb: - case 0xfc: case 0xfd: case 0xfe: - CHECK_CURRENT_LD(); - isapnp_log("ISAPnP: Write %02X to vendor-defined register %02X on CSN %02X device %02X\n", val, dev->reg, dev->current_ld_card->csn, dev->current_ld->number); - if (dev->current_ld_card->write_vendor_reg) - dev->current_ld_card->write_vendor_reg(dev->current_ld->number, dev->reg, val, dev->current_ld_card->priv); - break; + case 0x38: + case 0x39: + case 0x3a: + case 0x3b: + case 0x3c: + case 0x3d: + case 0x3e: + case 0x3f: + case 0xf0: + case 0xf1: + case 0xf2: + case 0xf3: + case 0xf4: + case 0xf5: + case 0xf6: + case 0xf7: + case 0xf8: + case 0xf9: + case 0xfa: + case 0xfb: + case 0xfc: + case 0xfd: + case 0xfe: + CHECK_CURRENT_LD(); + isapnp_log("ISAPnP: Write %02X to vendor-defined register %02X on CSN %02X device %02X\n", val, dev->reg, dev->current_ld_card->csn, dev->current_ld->number); + if (dev->current_ld_card->write_vendor_reg) + dev->current_ld_card->write_vendor_reg(dev->current_ld->number, dev->reg, val, dev->current_ld_card->priv); + break; - default: - if (dev->reg >= 0x40) { - CHECK_CURRENT_LD(); - isapnp_log("ISAPnP: Write %02X to register %02X on CSN %02X device %02X\n", val, dev->reg, dev->current_ld_card->csn, dev->current_ld->number); + default: + if (dev->reg >= 0x40) { + CHECK_CURRENT_LD(); + isapnp_log("ISAPnP: Write %02X to register %02X on CSN %02X device %02X\n", val, dev->reg, dev->current_ld_card->csn, dev->current_ld->number); - switch (dev->reg) { - case 0x42: case 0x4a: case 0x52: case 0x5a: - case 0x7a: case 0x84: case 0x94: case 0xa4: - /* Read-only memory range length / upper limit bit. */ - val = (val & 0xfe) | (dev->current_ld->regs[dev->reg] & 0x01); - break; + switch (dev->reg) { + case 0x42: + case 0x4a: + case 0x52: + case 0x5a: + case 0x7a: + case 0x84: + case 0x94: + case 0xa4: + /* Read-only memory range length / upper limit bit. */ + val = (val & 0xfe) | (dev->current_ld->regs[dev->reg] & 0x01); + break; - case 0x60: case 0x62: case 0x64: case 0x66: case 0x68: case 0x6a: case 0x6c: case 0x6e: - /* Discard upper address bits if this I/O range can only decode 10-bit. */ - if (!(dev->current_ld->io_16bit & (1 << ((dev->reg >> 1) & 0x07)))) - val &= 0x03; - break; + case 0x60: + case 0x62: + case 0x64: + case 0x66: + case 0x68: + case 0x6a: + case 0x6c: + case 0x6e: + /* Discard upper address bits if this I/O range can only decode 10-bit. */ + if (!(dev->current_ld->io_16bit & (1 << ((dev->reg >> 1) & 0x07)))) + val &= 0x03; + break; - case 0x71: case 0x73: - /* Limit IRQ types to supported ones. */ - if ((val & 0x01) && !(dev->current_ld->irq_types & ((dev->reg == 0x71) ? 0x0c : 0xc0))) /* level, not supported = force edge */ - val &= ~0x01; - else if (!(val & 0x01) && !(dev->current_ld->irq_types & ((dev->reg == 0x71) ? 0x03 : 0x30))) /* edge, not supported = force level */ - val |= 0x01; + case 0x71: + case 0x73: + /* Limit IRQ types to supported ones. */ + if ((val & 0x01) && !(dev->current_ld->irq_types & ((dev->reg == 0x71) ? 0x0c : 0xc0))) /* level, not supported = force edge */ + val &= ~0x01; + else if (!(val & 0x01) && !(dev->current_ld->irq_types & ((dev->reg == 0x71) ? 0x03 : 0x30))) /* edge, not supported = force level */ + val |= 0x01; - if ((val & 0x02) && !(dev->current_ld->irq_types & ((dev->reg == 0x71) ? 0x05 : 0x50))) /* high, not supported = force low */ - val &= ~0x02; - else if (!(val & 0x02) && !(dev->current_ld->irq_types & ((dev->reg == 0x71) ? 0x0a : 0xa0))) /* low, not supported = force high */ - val |= 0x02; + if ((val & 0x02) && !(dev->current_ld->irq_types & ((dev->reg == 0x71) ? 0x05 : 0x50))) /* high, not supported = force low */ + val &= ~0x02; + else if (!(val & 0x02) && !(dev->current_ld->irq_types & ((dev->reg == 0x71) ? 0x0a : 0xa0))) /* low, not supported = force high */ + val |= 0x02; - break; - } + break; + } - dev->current_ld->regs[dev->reg] = val; - isapnp_device_config_changed(dev->current_ld_card, dev->current_ld); - } - break; + dev->current_ld->regs[dev->reg] = val; + isapnp_device_config_changed(dev->current_ld_card, dev->current_ld); + } + break; } } - static void * isapnp_init(const device_t *info) { @@ -637,25 +697,24 @@ isapnp_init(const device_t *info) return dev; } - static void isapnp_close(void *priv) { - isapnp_t *dev = (isapnp_t *) priv; - isapnp_card_t *card = dev->first_card, *next_card; + isapnp_t *dev = (isapnp_t *) priv; + isapnp_card_t *card = dev->first_card, *next_card; isapnp_device_t *ld, *next_ld; while (card) { - ld = card->first_ld; - while (ld) { - next_ld = ld->next; - free(ld); - ld = next_ld; - } + ld = card->first_ld; + while (ld) { + next_ld = ld->next; + free(ld); + ld = next_ld; + } - next_card = card->next; - free(card); - card = next_card; + next_card = card->next; + free(card); + card = next_card; } io_removehandler(0x279, 1, NULL, NULL, NULL, isapnp_write_addr, NULL, NULL, dev); @@ -664,51 +723,49 @@ isapnp_close(void *priv) free(dev); } - void * isapnp_add_card(uint8_t *rom, uint16_t rom_size, - void (*config_changed)(uint8_t ld, isapnp_device_config_t *config, void *priv), - void (*csn_changed)(uint8_t csn, void *priv), - uint8_t (*read_vendor_reg)(uint8_t ld, uint8_t reg, void *priv), - void (*write_vendor_reg)(uint8_t ld, uint8_t reg, uint8_t val, void *priv), - void *priv) + void (*config_changed)(uint8_t ld, isapnp_device_config_t *config, void *priv), + void (*csn_changed)(uint8_t csn, void *priv), + uint8_t (*read_vendor_reg)(uint8_t ld, uint8_t reg, void *priv), + void (*write_vendor_reg)(uint8_t ld, uint8_t reg, uint8_t val, void *priv), + void *priv) { isapnp_t *dev = (isapnp_t *) device_get_priv(&isapnp_device); if (!dev) - dev = (isapnp_t *) device_add(&isapnp_device); + dev = (isapnp_t *) device_add(&isapnp_device); isapnp_card_t *card = (isapnp_card_t *) malloc(sizeof(isapnp_card_t)); memset(card, 0, sizeof(isapnp_card_t)); - card->enable = 1; - card->priv = priv; - card->config_changed = config_changed; - card->csn_changed = csn_changed; - card->read_vendor_reg = read_vendor_reg; + card->enable = 1; + card->priv = priv; + card->config_changed = config_changed; + card->csn_changed = csn_changed; + card->read_vendor_reg = read_vendor_reg; card->write_vendor_reg = write_vendor_reg; if (!dev->first_card) { - dev->first_card = card; + dev->first_card = card; } else { - isapnp_card_t *prev_card = dev->first_card; - while (prev_card->next) - prev_card = prev_card->next; - prev_card->next = card; + isapnp_card_t *prev_card = dev->first_card; + while (prev_card->next) + prev_card = prev_card->next; + prev_card->next = card; } if (rom && rom_size) - isapnp_update_card_rom(card, rom, rom_size); + isapnp_update_card_rom(card, rom, rom_size); return card; } - void isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size) { isapnp_card_t *card = (isapnp_card_t *) priv; - card->rom = rom; - card->rom_size = rom_size; + card->rom = rom; + card->rom_size = rom_size; /* Parse resources in ROM to allocate logical devices, and determine the state of read-only register bits. */ @@ -716,10 +773,10 @@ isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size) uint16_t vendor = (card->rom[0] << 8) | card->rom[1]; isapnp_log("ISAPnP: Parsing ROM resources for card %c%c%c%02X%02X (serial %08X)\n", '@' + ((vendor >> 10) & 0x1f), '@' + ((vendor >> 5) & 0x1f), '@' + (vendor & 0x1f), card->rom[2], card->rom[3], (card->rom[7] << 24) | (card->rom[6] << 16) | (card->rom[5] << 8) | card->rom[4]); #endif - uint16_t i = 9, j; - uint8_t existing = 0, ldn = 0, res, in_df = 0; - uint8_t irq = 0, io = 0, mem_range = 0, mem_range_32 = 0, irq_df = 0, io_df = 0, mem_range_df = 0, mem_range_32_df = 0; - uint32_t len; + uint16_t i = 9, j; + uint8_t existing = 0, ldn = 0, res, in_df = 0; + uint8_t irq = 0, io = 0, mem_range = 0, mem_range_32 = 0, irq_df = 0, io_df = 0, mem_range_df = 0, mem_range_32_df = 0; + uint32_t len; isapnp_device_t *ld = NULL, *prev_ld = NULL; /* Check if this is an existing card which already has logical devices. @@ -729,276 +786,274 @@ isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size) /* Iterate through ROM resources. */ while (i < card->rom_size) { - if (card->rom[i] & 0x80) { /* large resource */ - res = card->rom[i] & 0x7f; - len = (card->rom[i + 2] << 8) | card->rom[i + 1]; + if (card->rom[i] & 0x80) { /* large resource */ + res = card->rom[i] & 0x7f; + len = (card->rom[i + 2] << 8) | card->rom[i + 1]; - switch (res) { - case 0x01: /* memory range */ - case 0x05: /* 32-bit memory range */ - if (res == 0x01) { - if (!ld) { - isapnp_log("ISAPnP: >>%s Memory descriptor with no logical device\n", in_df ? ">" : ""); - break; - } + switch (res) { + case 0x01: /* memory range */ + case 0x05: /* 32-bit memory range */ + if (res == 0x01) { + if (!ld) { + isapnp_log("ISAPnP: >>%s Memory descriptor with no logical device\n", in_df ? ">" : ""); + break; + } - if (mem_range > 3) { - isapnp_log("ISAPnP: >>%s Memory descriptor overflow (%d)\n", in_df ? ">" : "", mem_range++); - break; - } + if (mem_range > 3) { + isapnp_log("ISAPnP: >>%s Memory descriptor overflow (%d)\n", in_df ? ">" : "", mem_range++); + break; + } - isapnp_log("ISAPnP: >>%s Memory range %d uses upper limit = ", in_df ? ">" : "", mem_range); - res = 1 << mem_range; - mem_range++; - } else { - if (!ld) { - isapnp_log("ISAPnP: >>%s 32-bit memory descriptor with no logical device\n", in_df ? ">" : ""); - break; - } + isapnp_log("ISAPnP: >>%s Memory range %d uses upper limit = ", in_df ? ">" : "", mem_range); + res = 1 << mem_range; + mem_range++; + } else { + if (!ld) { + isapnp_log("ISAPnP: >>%s 32-bit memory descriptor with no logical device\n", in_df ? ">" : ""); + break; + } - if (mem_range_32 > 3) { - isapnp_log("ISAPnP: >>%s 32-bit memory descriptor overflow (%d)\n", in_df ? ">" : "", mem_range_32++); - break; - } + if (mem_range_32 > 3) { + isapnp_log("ISAPnP: >>%s 32-bit memory descriptor overflow (%d)\n", in_df ? ">" : "", mem_range_32++); + break; + } - isapnp_log("ISAPnP: >>%s 32-bit memory range %d uses upper limit = ", in_df ? ">" : "", mem_range_32); - res = 1 << (4 + mem_range_32); - mem_range_32++; - } + isapnp_log("ISAPnP: >>%s 32-bit memory range %d uses upper limit = ", in_df ? ">" : "", mem_range_32); + res = 1 << (4 + mem_range_32); + mem_range_32++; + } - if (card->rom[i + 3] & 0x4) { - isapnp_log("yes\n"); - ld->mem_upperlimit |= res; - } else { - isapnp_log("no\n"); - ld->mem_upperlimit &= ~res; - } + if (card->rom[i + 3] & 0x4) { + isapnp_log("yes\n"); + ld->mem_upperlimit |= res; + } else { + isapnp_log("no\n"); + ld->mem_upperlimit &= ~res; + } - break; + break; #ifdef ENABLE_ISAPNP_LOG - case 0x02: /* ANSI identifier */ - res = card->rom[i + 3 + len]; - card->rom[i + 3 + len] = '\0'; - isapnp_log("ISAPnP: >%s ANSI identifier: \"%s\"\n", ldn ? ">" : "", &card->rom[i + 3]); - card->rom[i + 3 + len] = res; - break; + case 0x02: /* ANSI identifier */ + res = card->rom[i + 3 + len]; + card->rom[i + 3 + len] = '\0'; + isapnp_log("ISAPnP: >%s ANSI identifier: \"%s\"\n", ldn ? ">" : "", &card->rom[i + 3]); + card->rom[i + 3 + len] = res; + break; - default: - isapnp_log("ISAPnP: >%s%s Large resource %02X (length %d)\n", ldn ? ">" : "", in_df ? ">" : "", res, (card->rom[i + 2] << 8) | card->rom[i + 1]); - break; + default: + isapnp_log("ISAPnP: >%s%s Large resource %02X (length %d)\n", ldn ? ">" : "", in_df ? ">" : "", res, (card->rom[i + 2] << 8) | card->rom[i + 1]); + break; #endif - } + } - i += 3; /* header */ - } else { /* small resource */ - res = (card->rom[i] >> 3) & 0x0f; - len = card->rom[i] & 0x07; + i += 3; /* header */ + } else { /* small resource */ + res = (card->rom[i] >> 3) & 0x0f; + len = card->rom[i] & 0x07; - switch (res) { - case 0x02: + switch (res) { + case 0x02: #ifdef ENABLE_ISAPNP_LOG - vendor = (card->rom[i + 1] << 8) | card->rom[i + 2]; - isapnp_log("ISAPnP: > Logical device %02X: %c%c%c%02X%02X\n", ldn, '@' + ((vendor >> 10) & 0x1f), '@' + ((vendor >> 5) & 0x1f), '@' + (vendor & 0x1f), card->rom[i + 3], card->rom[i + 4]); + vendor = (card->rom[i + 1] << 8) | card->rom[i + 2]; + isapnp_log("ISAPnP: > Logical device %02X: %c%c%c%02X%02X\n", ldn, '@' + ((vendor >> 10) & 0x1f), '@' + ((vendor >> 5) & 0x1f), '@' + (vendor & 0x1f), card->rom[i + 3], card->rom[i + 4]); #endif - /* We're done with the previous logical device. */ - if (ld && !existing) - isapnp_reset_ld_regs(ld); + /* We're done with the previous logical device. */ + if (ld && !existing) + isapnp_reset_ld_regs(ld); - /* Look for an existing logical device with this number, - and create one if none exist. */ - if (existing) { - ld = card->first_ld; - while (ld && (ld->number != ldn)) - ld = ld->next; - } - if (ld && (ld->number == ldn)) { - /* Reset some logical device state. */ - ld->mem_upperlimit = ld->io_16bit = ld->irq_types = 0; - memset(ld->io_len, 0, sizeof(ld->io_len)); - } else { - /* Create logical device. */ - ld = (isapnp_device_t *) malloc(sizeof(isapnp_device_t)); - memset(ld, 0, sizeof(isapnp_device_t)); + /* Look for an existing logical device with this number, + and create one if none exist. */ + if (existing) { + ld = card->first_ld; + while (ld && (ld->number != ldn)) + ld = ld->next; + } + if (ld && (ld->number == ldn)) { + /* Reset some logical device state. */ + ld->mem_upperlimit = ld->io_16bit = ld->irq_types = 0; + memset(ld->io_len, 0, sizeof(ld->io_len)); + } else { + /* Create logical device. */ + ld = (isapnp_device_t *) malloc(sizeof(isapnp_device_t)); + memset(ld, 0, sizeof(isapnp_device_t)); - /* Add to end of list. */ - prev_ld = card->first_ld; - if (prev_ld) { - while (prev_ld->next) - prev_ld = prev_ld->next; - prev_ld->next = ld; - } else { - card->first_ld = ld; - } - } + /* Add to end of list. */ + prev_ld = card->first_ld; + if (prev_ld) { + while (prev_ld->next) + prev_ld = prev_ld->next; + prev_ld->next = ld; + } else { + card->first_ld = ld; + } + } - /* Set and increment logical device number. */ - ld->number = ldn++; + /* Set and increment logical device number. */ + ld->number = ldn++; - /* Start the position counts over. */ - irq = io = mem_range = mem_range_32 = irq_df = io_df = mem_range_df = mem_range_32_df = 0; + /* Start the position counts over. */ + irq = io = mem_range = mem_range_32 = irq_df = io_df = mem_range_df = mem_range_32_df = 0; - break; + break; #ifdef ENABLE_ISAPNP_LOG - case 0x03: /* compatible device ID */ - if (!ld) { - isapnp_log("ISAPnP: >> Compatible device ID with no logical device\n"); - break; - } + case 0x03: /* compatible device ID */ + if (!ld) { + isapnp_log("ISAPnP: >> Compatible device ID with no logical device\n"); + break; + } - vendor = (card->rom[i + 1] << 8) | card->rom[i + 2]; - isapnp_log("ISAPnP: >> Compatible device ID: %c%c%c%02X%02X\n", '@' + ((vendor >> 10) & 0x1f), '@' + ((vendor >> 5) & 0x1f), '@' + (vendor & 0x1f), card->rom[i + 3], card->rom[i + 4]); - break; + vendor = (card->rom[i + 1] << 8) | card->rom[i + 2]; + isapnp_log("ISAPnP: >> Compatible device ID: %c%c%c%02X%02X\n", '@' + ((vendor >> 10) & 0x1f), '@' + ((vendor >> 5) & 0x1f), '@' + (vendor & 0x1f), card->rom[i + 3], card->rom[i + 4]); + break; #endif - case 0x04: /* IRQ */ - if (!ld) { - isapnp_log("ISAPnP: >>%s IRQ descriptor with no logical device\n", in_df ? ">" : ""); - break; - } + case 0x04: /* IRQ */ + if (!ld) { + isapnp_log("ISAPnP: >>%s IRQ descriptor with no logical device\n", in_df ? ">" : ""); + break; + } - if (irq > 1) { - isapnp_log("ISAPnP: >>%s IRQ descriptor overflow (%d)\n", in_df ? ">" : "", irq++); - break; - } + if (irq > 1) { + isapnp_log("ISAPnP: >>%s IRQ descriptor overflow (%d)\n", in_df ? ">" : "", irq++); + break; + } - if (len == 2) /* default */ - res = 0x01; /* high true edge sensitive */ - else /* specific */ - res = card->rom[i + 3] & 0x0f; + if (len == 2) /* default */ + res = 0x01; /* high true edge sensitive */ + else /* specific */ + res = card->rom[i + 3] & 0x0f; - isapnp_log("ISAPnP: >>%s IRQ index %d interrupt types = %01X\n", in_df ? ">" : "", irq, res); + isapnp_log("ISAPnP: >>%s IRQ index %d interrupt types = %01X\n", in_df ? ">" : "", irq, res); - ld->irq_types &= ~(0x0f << (4 * irq)); - ld->irq_types |= res << (4 * irq); + ld->irq_types &= ~(0x0f << (4 * irq)); + ld->irq_types |= res << (4 * irq); - irq++; + irq++; - break; + break; - case 0x06: /* start dependent function */ - if (!ld) { - isapnp_log("ISAPnP: >> Start dependent function with no logical device\n"); - break; - } + case 0x06: /* start dependent function */ + if (!ld) { + isapnp_log("ISAPnP: >> Start dependent function with no logical device\n"); + break; + } - isapnp_log("ISAPnP: >> Start dependent function: %s\n", (((len == 0) || (card->rom[i + 1] == 1)) ? "acceptable" : ((card->rom[i + 1] == 0) ? "good" : ((card->rom[i + 1] == 2) ? "sub-optimal" : "unknown priority")))); + isapnp_log("ISAPnP: >> Start dependent function: %s\n", (((len == 0) || (card->rom[i + 1] == 1)) ? "acceptable" : ((card->rom[i + 1] == 0) ? "good" : ((card->rom[i + 1] == 2) ? "sub-optimal" : "unknown priority")))); - if (in_df) { - /* We're in a dependent function and this is the next one starting. - Walk positions back to the saved values. */ - irq = irq_df; - io = io_df; - mem_range = mem_range_df; - mem_range_32 = mem_range_32_df; - } else { - /* Save current positions to restore at the next DF. */ - irq_df = irq; - io_df = io; - mem_range_df = mem_range; - mem_range_32_df = mem_range_32; - in_df = 1; - } + if (in_df) { + /* We're in a dependent function and this is the next one starting. + Walk positions back to the saved values. */ + irq = irq_df; + io = io_df; + mem_range = mem_range_df; + mem_range_32 = mem_range_32_df; + } else { + /* Save current positions to restore at the next DF. */ + irq_df = irq; + io_df = io; + mem_range_df = mem_range; + mem_range_32_df = mem_range_32; + in_df = 1; + } - break; + break; - case 0x07: /* end dependent function */ - isapnp_log("ISAPnP: >> End dependent function\n"); - in_df = 0; - break; + case 0x07: /* end dependent function */ + isapnp_log("ISAPnP: >> End dependent function\n"); + in_df = 0; + break; - case 0x08: /* I/O port */ - if (!ld) { - isapnp_log("ISAPnP: >>%s I/O descriptor with no logical device\n", in_df ? ">" : ""); - break; - } + case 0x08: /* I/O port */ + if (!ld) { + isapnp_log("ISAPnP: >>%s I/O descriptor with no logical device\n", in_df ? ">" : ""); + break; + } - if (io > 7) { - isapnp_log("ISAPnP: >>%s I/O descriptor overflow (%d)\n", in_df ? ">" : "", io++); - break; - } + if (io > 7) { + isapnp_log("ISAPnP: >>%s I/O descriptor overflow (%d)\n", in_df ? ">" : "", io++); + break; + } - isapnp_log("ISAPnP: >>%s I/O range %d %d-bit decode, %d ports\n", in_df ? ">" : "", io, (card->rom[i + 1] & 0x01) ? 16 : 10, card->rom[i + 7]); + isapnp_log("ISAPnP: >>%s I/O range %d %d-bit decode, %d ports\n", in_df ? ">" : "", io, (card->rom[i + 1] & 0x01) ? 16 : 10, card->rom[i + 7]); - if (card->rom[i + 1] & 0x01) - ld->io_16bit |= 1 << io; - else - ld->io_16bit &= ~(1 << io); + if (card->rom[i + 1] & 0x01) + ld->io_16bit |= 1 << io; + else + ld->io_16bit &= ~(1 << io); - if (card->rom[i + 7] > ld->io_len[io]) - ld->io_len[io] = card->rom[i + 7]; + if (card->rom[i + 7] > ld->io_len[io]) + ld->io_len[io] = card->rom[i + 7]; - io++; + io++; - break; + break; - case 0x0f: /* end tag */ - /* Calculate checksum. */ - res = 0x00; - for (j = 9; j <= i; j++) - res += card->rom[j]; - card->rom[i + 1] = -res; + case 0x0f: /* end tag */ + /* Calculate checksum. */ + res = 0x00; + for (j = 9; j <= i; j++) + res += card->rom[j]; + card->rom[i + 1] = -res; - isapnp_log("ISAPnP: End card resources (checksum %02X)\n", card->rom[i + 1]); + isapnp_log("ISAPnP: End card resources (checksum %02X)\n", card->rom[i + 1]); - /* Stop parsing here. */ - card->rom_size = i + 2; - break; + /* Stop parsing here. */ + card->rom_size = i + 2; + break; #ifdef ENABLE_ISAPNP_LOG - default: - isapnp_log("ISAPnP: >%s%s Small resource %02X (length %d)\n", ldn ? ">" : "", in_df ? ">" : "", res, card->rom[i] & 0x07); - break; + default: + isapnp_log("ISAPnP: >%s%s Small resource %02X (length %d)\n", ldn ? ">" : "", in_df ? ">" : "", res, card->rom[i] & 0x07); + break; #endif - } + } - i++; /* header */ - } - i += len; /* specified length */ + i++; /* header */ + } + i += len; /* specified length */ } /* We're done with the last logical device. */ if (ld && !existing) - isapnp_reset_ld_regs(ld); + isapnp_reset_ld_regs(ld); } - void isapnp_enable_card(void *priv, uint8_t enable) { isapnp_t *dev = (isapnp_t *) device_get_priv(&isapnp_device); if (!dev) - return; + return; /* Look for a matching card. */ isapnp_card_t *card = dev->first_card; while (card) { - if (card == priv) { - /* Enable or disable the card. */ - if (!!enable ^ !!card->enable) - card->state = (enable == ISAPNP_CARD_FORCE_CONFIG) ? PNP_STATE_CONFIG : PNP_STATE_WAIT_FOR_KEY; - card->enable = enable; + if (card == priv) { + /* Enable or disable the card. */ + if (!!enable ^ !!card->enable) + card->state = (enable == ISAPNP_CARD_FORCE_CONFIG) ? PNP_STATE_CONFIG : PNP_STATE_WAIT_FOR_KEY; + card->enable = enable; - /* Invalidate other references if we're disabling this card. */ - if (!card->enable) { - if (dev->isolated_card == card) - dev->isolated_card = NULL; - if (dev->current_ld_card == card) { - dev->current_ld = NULL; - dev->current_ld_card = NULL; - } - } + /* Invalidate other references if we're disabling this card. */ + if (!card->enable) { + if (dev->isolated_card == card) + dev->isolated_card = NULL; + if (dev->current_ld_card == card) { + dev->current_ld = NULL; + dev->current_ld_card = NULL; + } + } - break; - } + break; + } - card = card->next; + card = card->next; } } - void isapnp_set_csn(void *priv, uint8_t csn) { @@ -1006,65 +1061,61 @@ isapnp_set_csn(void *priv, uint8_t csn) card->csn = csn; if (card->csn_changed) - card->csn_changed(card->csn, card->priv); + card->csn_changed(card->csn, card->priv); } - void isapnp_set_device_defaults(void *priv, uint8_t ldn, const isapnp_device_config_t *config) { - isapnp_card_t *card = (isapnp_card_t *) priv; - isapnp_device_t *ld = card->first_ld; + isapnp_card_t *card = (isapnp_card_t *) priv; + isapnp_device_t *ld = card->first_ld; /* Look for a logical device with this number. */ while (ld && (ld->number != ldn)) - ld = ld->next; + ld = ld->next; if (!ld) /* none found */ - return; + return; ld->defaults = config; } - void isapnp_reset_card(void *priv) { - isapnp_card_t *card = (isapnp_card_t *) priv; - isapnp_device_t *ld = card->first_ld; + isapnp_card_t *card = (isapnp_card_t *) priv; + isapnp_device_t *ld = card->first_ld; /* Reset all logical devices. */ while (ld) { - /* Reset the logical device's configuration. */ - isapnp_reset_ld_config(ld); - isapnp_device_config_changed(card, ld); + /* Reset the logical device's configuration. */ + isapnp_reset_ld_config(ld); + isapnp_device_config_changed(card, ld); - ld = ld->next; + ld = ld->next; } } - void isapnp_reset_device(void *priv, uint8_t ldn) { - isapnp_card_t *card = (isapnp_card_t *) priv; - isapnp_device_t *ld = card->first_ld; + isapnp_card_t *card = (isapnp_card_t *) priv; + isapnp_device_t *ld = card->first_ld; /* Look for a logical device with this number. */ while (ld && (ld->number != ldn)) - ld = ld->next; + ld = ld->next; if (!ld) /* none found */ - return; + return; /* Reset the logical device's configuration. */ isapnp_reset_ld_config(ld); isapnp_device_config_changed(card, ld); } - static const device_t isapnp_device = { - .name = "ISA Plug and Play", + .name = "ISA Plug and Play", .internal_name = "isapnp", .flags = 0, .local = 0, diff --git a/src/device/isartc.c b/src/device/isartc.c index dc9557e3e..b2f268569 100644 --- a/src/device/isartc.c +++ b/src/device/isartc.c @@ -63,7 +63,7 @@ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + */ #include #include #include @@ -82,108 +82,101 @@ #include <86box/pic.h> #include <86box/isartc.h> +#define ISARTC_EV170 0 +#define ISARTC_DTK 1 +#define ISARTC_P5PAK 2 +#define ISARTC_A6PAK 3 -#define ISARTC_EV170 0 -#define ISARTC_DTK 1 -#define ISARTC_P5PAK 2 -#define ISARTC_A6PAK 3 - -#define ISARTC_DEBUG 0 - +#define ISARTC_DEBUG 0 typedef struct { - const char *name; /* board name */ - uint8_t board; /* board type */ + const char *name; /* board name */ + uint8_t board; /* board type */ - uint8_t flags; /* various flags */ -#define FLAG_YEAR80 0x01 /* YEAR byte is base-80 */ -#define FLAG_YEARBCD 0x02 /* YEAR byte is in BCD */ + uint8_t flags; /* various flags */ +#define FLAG_YEAR80 0x01 /* YEAR byte is base-80 */ +#define FLAG_YEARBCD 0x02 /* YEAR byte is in BCD */ - int8_t irq; /* configured IRQ channel */ - int8_t base_addrsz; - uint32_t base_addr; /* configured I/O address */ + int8_t irq; /* configured IRQ channel */ + int8_t base_addrsz; + uint32_t base_addr; /* configured I/O address */ /* Fields for the specific driver. */ - void (*f_wr)(uint16_t, uint8_t, void *); - uint8_t (*f_rd)(uint16_t, void *); - int8_t year; /* register for YEAR value */ - char pad[3]; + void (*f_wr)(uint16_t, uint8_t, void *); + uint8_t (*f_rd)(uint16_t, void *); + int8_t year; /* register for YEAR value */ + char pad[3]; - nvr_t nvr; /* RTC/NVR */ + nvr_t nvr; /* RTC/NVR */ } rtcdev_t; - /************************************************************************ * * * Driver for the NatSemi MM58167 chip. * * * ************************************************************************/ -#define MM67_REGS 32 +#define MM67_REGS 32 /* Define the RTC chip registers - see datasheet, pg4. */ -#define MM67_MSEC 0 /* milliseconds */ -#define MM67_HUNTEN 1 /* hundredths/tenths of seconds */ -#define MM67_SEC 2 /* seconds */ -#define MM67_MIN 3 /* minutes */ -#define MM67_HOUR 4 /* hours */ -#define MM67_DOW 5 /* day of the week */ -#define MM67_DOM 6 /* day of the month */ -#define MM67_MON 7 /* month */ -#define MM67_AL_MSEC 8 /* milliseconds */ -#define MM67_AL_HUNTEN 9 /* hundredths/tenths of seconds */ -#define MM67_AL_SEC 10 /* seconds */ -#define MM67_AL_MIN 11 /* minutes */ -#define MM67_AL_HOUR 12 /* hours */ -#define MM67_AL_DOW 13 /* day of the week */ -#define MM67_AL_DOM 14 /* day of the month */ -#define MM67_AL_MON 15 /* month */ -# define MM67_AL_DONTCARE 0xc0 /* always match in compare */ -#define MM67_ISTAT 16 /* IRQ status */ -#define MM67_ICTRL 17 /* IRQ control */ -# define MM67INT_COMPARE 0x01 /* Compare */ -# define MM67INT_TENTH 0x02 /* Tenth */ -# define MM67INT_SEC 0x04 /* Second */ -# define MM67INT_MIN 0x08 /* Minute */ -# define MM67INT_HOUR 0x10 /* Hour */ -# define MM67INT_DAY 0x20 /* Day */ -# define MM67INT_WEEK 0x40 /* Week */ -# define MM67INT_MON 0x80 /* Month */ -#define MM67_RSTCTR 18 /* reset counters */ -#define MM67_RSTRAM 19 /* reset RAM */ -#define MM67_STATUS 20 /* status bit */ -#define MM67_GOCMD 21 /* GO Command */ -#define MM67_STBYIRQ 22 /* standby IRQ */ -#define MM67_TEST 31 /* test mode */ +#define MM67_MSEC 0 /* milliseconds */ +#define MM67_HUNTEN 1 /* hundredths/tenths of seconds */ +#define MM67_SEC 2 /* seconds */ +#define MM67_MIN 3 /* minutes */ +#define MM67_HOUR 4 /* hours */ +#define MM67_DOW 5 /* day of the week */ +#define MM67_DOM 6 /* day of the month */ +#define MM67_MON 7 /* month */ +#define MM67_AL_MSEC 8 /* milliseconds */ +#define MM67_AL_HUNTEN 9 /* hundredths/tenths of seconds */ +#define MM67_AL_SEC 10 /* seconds */ +#define MM67_AL_MIN 11 /* minutes */ +#define MM67_AL_HOUR 12 /* hours */ +#define MM67_AL_DOW 13 /* day of the week */ +#define MM67_AL_DOM 14 /* day of the month */ +#define MM67_AL_MON 15 /* month */ +#define MM67_AL_DONTCARE 0xc0 /* always match in compare */ +#define MM67_ISTAT 16 /* IRQ status */ +#define MM67_ICTRL 17 /* IRQ control */ +#define MM67INT_COMPARE 0x01 /* Compare */ +#define MM67INT_TENTH 0x02 /* Tenth */ +#define MM67INT_SEC 0x04 /* Second */ +#define MM67INT_MIN 0x08 /* Minute */ +#define MM67INT_HOUR 0x10 /* Hour */ +#define MM67INT_DAY 0x20 /* Day */ +#define MM67INT_WEEK 0x40 /* Week */ +#define MM67INT_MON 0x80 /* Month */ +#define MM67_RSTCTR 18 /* reset counters */ +#define MM67_RSTRAM 19 /* reset RAM */ +#define MM67_STATUS 20 /* status bit */ +#define MM67_GOCMD 21 /* GO Command */ +#define MM67_STBYIRQ 22 /* standby IRQ */ +#define MM67_TEST 31 /* test mode */ #ifdef ENABLE_ISARTC_LOG int isartc_do_log = ENABLE_ISARTC_LOG; - static void isartc_log(const char *fmt, ...) { va_list ap; if (isartc_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define isartc_log(fmt, ...) +# define isartc_log(fmt, ...) #endif - /* Check if the current time matches a set alarm time. */ static int8_t mm67_chkalrm(nvr_t *nvr, int8_t addr) { - return((nvr->regs[addr-MM67_AL_SEC+MM67_SEC] == nvr->regs[addr]) || - ((nvr->regs[addr] & MM67_AL_DONTCARE) == MM67_AL_DONTCARE)); + return ((nvr->regs[addr - MM67_AL_SEC + MM67_SEC] == nvr->regs[addr]) || ((nvr->regs[addr] & MM67_AL_DONTCARE) == MM67_AL_DONTCARE)); } - /* * This is called every second through the NVR/RTC hook. * @@ -197,160 +190,163 @@ mm67_chkalrm(nvr_t *nvr, int8_t addr) static void mm67_tick(nvr_t *nvr) { - rtcdev_t *dev = (rtcdev_t *)nvr->data; - uint8_t *regs = nvr->regs; - int mon, year, f = 0; + rtcdev_t *dev = (rtcdev_t *) nvr->data; + uint8_t *regs = nvr->regs; + int mon, year, f = 0; /* Update and set interrupt if needed. */ regs[MM67_SEC] = RTC_BCDINC(nvr->regs[MM67_SEC], 1); - if (regs[MM67_ICTRL] & MM67INT_SEC) f = MM67INT_SEC; + if (regs[MM67_ICTRL] & MM67INT_SEC) + f = MM67INT_SEC; /* Roll over? */ if (regs[MM67_SEC] >= RTC_BCD(60)) { - /* Update and set interrupt if needed. */ - regs[MM67_SEC] = RTC_BCD(0); - regs[MM67_MIN] = RTC_BCDINC(regs[MM67_MIN], 1); - if (regs[MM67_ICTRL] & MM67INT_MIN) f = MM67INT_MIN; + /* Update and set interrupt if needed. */ + regs[MM67_SEC] = RTC_BCD(0); + regs[MM67_MIN] = RTC_BCDINC(regs[MM67_MIN], 1); + if (regs[MM67_ICTRL] & MM67INT_MIN) + f = MM67INT_MIN; - /* Roll over? */ - if (regs[MM67_MIN] >= RTC_BCD(60)) { - /* Update and set interrupt if needed. */ - regs[MM67_MIN] = RTC_BCD(0); - regs[MM67_HOUR] = RTC_BCDINC(regs[MM67_HOUR], 1); - if (regs[MM67_ICTRL] & MM67INT_HOUR) f = MM67INT_HOUR; + /* Roll over? */ + if (regs[MM67_MIN] >= RTC_BCD(60)) { + /* Update and set interrupt if needed. */ + regs[MM67_MIN] = RTC_BCD(0); + regs[MM67_HOUR] = RTC_BCDINC(regs[MM67_HOUR], 1); + if (regs[MM67_ICTRL] & MM67INT_HOUR) + f = MM67INT_HOUR; - /* Roll over? */ - if (regs[MM67_HOUR] >= RTC_BCD(24)) { - /* Update and set interrupt if needed. */ - regs[MM67_HOUR] = RTC_BCD(0); - regs[MM67_DOW] = RTC_BCDINC(regs[MM67_DOW], 1); - if (regs[MM67_ICTRL] & MM67INT_DAY) f = MM67INT_DAY; + /* Roll over? */ + if (regs[MM67_HOUR] >= RTC_BCD(24)) { + /* Update and set interrupt if needed. */ + regs[MM67_HOUR] = RTC_BCD(0); + regs[MM67_DOW] = RTC_BCDINC(regs[MM67_DOW], 1); + if (regs[MM67_ICTRL] & MM67INT_DAY) + f = MM67INT_DAY; - /* Roll over? */ - if (regs[MM67_DOW] > RTC_BCD(7)) { - /* Update and set interrupt if needed. */ - regs[MM67_DOW] = RTC_BCD(1); - if (regs[MM67_ICTRL] & MM67INT_WEEK) f = MM67INT_WEEK; - } + /* Roll over? */ + if (regs[MM67_DOW] > RTC_BCD(7)) { + /* Update and set interrupt if needed. */ + regs[MM67_DOW] = RTC_BCD(1); + if (regs[MM67_ICTRL] & MM67INT_WEEK) + f = MM67INT_WEEK; + } - /* Roll over? */ - regs[MM67_DOM] = RTC_BCDINC(regs[MM67_DOM], 1); - mon = RTC_DCB(regs[MM67_MON]); - if (dev->year != -1) { - year = RTC_DCB(regs[dev->year]); - if (dev->flags & FLAG_YEAR80) - year += 80; - } else - year = 80; - year += 1900; - if (RTC_DCB(regs[MM67_DOM]) > nvr_get_days(mon, year)) { - /* Update and set interrupt if needed. */ - regs[MM67_DOM] = RTC_BCD(1); - regs[MM67_MON] = RTC_BCDINC(regs[MM67_MON], 1); - if (regs[MM67_ICTRL] & MM67INT_MON) f = MM67INT_MON; + /* Roll over? */ + regs[MM67_DOM] = RTC_BCDINC(regs[MM67_DOM], 1); + mon = RTC_DCB(regs[MM67_MON]); + if (dev->year != -1) { + year = RTC_DCB(regs[dev->year]); + if (dev->flags & FLAG_YEAR80) + year += 80; + } else + year = 80; + year += 1900; + if (RTC_DCB(regs[MM67_DOM]) > nvr_get_days(mon, year)) { + /* Update and set interrupt if needed. */ + regs[MM67_DOM] = RTC_BCD(1); + regs[MM67_MON] = RTC_BCDINC(regs[MM67_MON], 1); + if (regs[MM67_ICTRL] & MM67INT_MON) + f = MM67INT_MON; - /* Roll over? */ - if (regs[MM67_MON] > RTC_BCD(12)) { - /* Update. */ - regs[MM67_MON] = RTC_BCD(1); - if (dev->year != -1) { - year++; - if (dev->flags & FLAG_YEAR80) - year -= 80; + /* Roll over? */ + if (regs[MM67_MON] > RTC_BCD(12)) { + /* Update. */ + regs[MM67_MON] = RTC_BCD(1); + if (dev->year != -1) { + year++; + if (dev->flags & FLAG_YEAR80) + year -= 80; - if (dev->flags & FLAG_YEARBCD) - regs[dev->year] = RTC_BCD(year % 100); - else - regs[dev->year] = year % 100; - } - } - } - } - } + if (dev->flags & FLAG_YEARBCD) + regs[dev->year] = RTC_BCD(year % 100); + else + regs[dev->year] = year % 100; + } + } + } + } + } } /* Check for programmed alarm interrupt. */ if (regs[MM67_ICTRL] & MM67INT_COMPARE) { - year = 1; - for (mon = MM67_AL_SEC; mon <= MM67_AL_MON; mon++) - if (mon != dev->year) - year &= mm67_chkalrm(nvr, mon); - f = year ? MM67INT_COMPARE : 0x00; + year = 1; + for (mon = MM67_AL_SEC; mon <= MM67_AL_MON; mon++) + if (mon != dev->year) + year &= mm67_chkalrm(nvr, mon); + f = year ? MM67INT_COMPARE : 0x00; } /* Raise the IRQ if needed (and if we have one..) */ if (f != 0) { - regs[MM67_ISTAT] = f; - if (nvr->irq != -1) - picint(1 << nvr->irq); + regs[MM67_ISTAT] = f; + if (nvr->irq != -1) + picint(1 << nvr->irq); } } - /* Get the current NVR time. */ static void mm67_time_get(nvr_t *nvr, struct tm *tm) { - rtcdev_t *dev = (rtcdev_t *)nvr->data; - uint8_t *regs = nvr->regs; + rtcdev_t *dev = (rtcdev_t *) nvr->data; + uint8_t *regs = nvr->regs; /* NVR is in BCD data mode. */ - tm->tm_sec = RTC_DCB(regs[MM67_SEC]); - tm->tm_min = RTC_DCB(regs[MM67_MIN]); + tm->tm_sec = RTC_DCB(regs[MM67_SEC]); + tm->tm_min = RTC_DCB(regs[MM67_MIN]); tm->tm_hour = RTC_DCB(regs[MM67_HOUR]); tm->tm_wday = (RTC_DCB(regs[MM67_DOW]) - 1); tm->tm_mday = RTC_DCB(regs[MM67_DOM]); - tm->tm_mon = (RTC_DCB(regs[MM67_MON]) - 1); + tm->tm_mon = (RTC_DCB(regs[MM67_MON]) - 1); if (dev->year != -1) { - if (dev->flags & FLAG_YEARBCD) - tm->tm_year = RTC_DCB(regs[dev->year]); - else - tm->tm_year = regs[dev->year]; - if (dev->flags & FLAG_YEAR80) - tm->tm_year += 80; + if (dev->flags & FLAG_YEARBCD) + tm->tm_year = RTC_DCB(regs[dev->year]); + else + tm->tm_year = regs[dev->year]; + if (dev->flags & FLAG_YEAR80) + tm->tm_year += 80; #ifdef MM67_CENTURY - tm->tm_year += (regs[MM67_CENTURY] * 100) - 1900; + tm->tm_year += (regs[MM67_CENTURY] * 100) - 1900; #endif #if ISARTC_DEBUG > 1 - isartc_log("ISARTC: get_time: year=%i [%02x]\n", tm->tm_year, regs[dev->year]); + isartc_log("ISARTC: get_time: year=%i [%02x]\n", tm->tm_year, regs[dev->year]); #endif } } - /* Set the current NVR time. */ static void mm67_time_set(nvr_t *nvr, struct tm *tm) { - rtcdev_t *dev = (rtcdev_t *)nvr->data; - uint8_t *regs = nvr->regs; - int year; + rtcdev_t *dev = (rtcdev_t *) nvr->data; + uint8_t *regs = nvr->regs; + int year; /* NVR is in BCD data mode. */ - regs[MM67_SEC] = RTC_BCD(tm->tm_sec); - regs[MM67_MIN] = RTC_BCD(tm->tm_min); + regs[MM67_SEC] = RTC_BCD(tm->tm_sec); + regs[MM67_MIN] = RTC_BCD(tm->tm_min); regs[MM67_HOUR] = RTC_BCD(tm->tm_hour); - regs[MM67_DOW] = RTC_BCD(tm->tm_wday + 1); - regs[MM67_DOM] = RTC_BCD(tm->tm_mday); - regs[MM67_MON] = RTC_BCD(tm->tm_mon + 1); + regs[MM67_DOW] = RTC_BCD(tm->tm_wday + 1); + regs[MM67_DOM] = RTC_BCD(tm->tm_mday); + regs[MM67_MON] = RTC_BCD(tm->tm_mon + 1); if (dev->year != -1) { - year = tm->tm_year; - if (dev->flags & FLAG_YEAR80) - year -= 80; - if (dev->flags & FLAG_YEARBCD) - regs[dev->year] = RTC_BCD(year % 100); - else - regs[dev->year] = year % 100; + year = tm->tm_year; + if (dev->flags & FLAG_YEAR80) + year -= 80; + if (dev->flags & FLAG_YEARBCD) + regs[dev->year] = RTC_BCD(year % 100); + else + regs[dev->year] = year % 100; #ifdef MM67_CENTURY - regs[MM67_CENTURY] = (year + 1900) / 100; + regs[MM67_CENTURY] = (year + 1900) / 100; #endif #if ISARTC_DEBUG > 1 - isartc_log("ISARTC: set_time: [%02x] year=%i (%i)\n", regs[dev->year], year, tm->tm_year); + isartc_log("ISARTC: set_time: [%02x] year=%i (%i)\n", regs[dev->year], year, tm->tm_year); #endif } } - static void mm67_start(nvr_t *nvr) { @@ -358,17 +354,16 @@ mm67_start(nvr_t *nvr) /* Initialize the internal and chip times. */ if (time_sync) { - /* Use the internal clock's time. */ - nvr_time_get(&tm); - mm67_time_set(nvr, &tm); + /* Use the internal clock's time. */ + nvr_time_get(&tm); + mm67_time_set(nvr, &tm); } else { - /* Set the internal clock from the chip time. */ - mm67_time_get(nvr, &tm); - nvr_time_set(&tm); + /* Set the internal clock from the chip time. */ + mm67_time_get(nvr, &tm); + nvr_time_set(&tm); } } - /* Reset the RTC counters to a sane state. */ static void mm67_reset(nvr_t *nvr) @@ -377,116 +372,113 @@ mm67_reset(nvr_t *nvr) /* Initialize the RTC to a known state. */ for (i = MM67_MSEC; i <= MM67_MON; i++) - nvr->regs[i] = RTC_BCD(0); + nvr->regs[i] = RTC_BCD(0); nvr->regs[MM67_DOW] = RTC_BCD(1); nvr->regs[MM67_DOM] = RTC_BCD(1); nvr->regs[MM67_MON] = RTC_BCD(1); } - /* Handle a READ operation from one of our registers. */ static uint8_t mm67_read(uint16_t port, void *priv) { - rtcdev_t *dev = (rtcdev_t *)priv; - int reg = port - dev->base_addr; - uint8_t ret = 0xff; + rtcdev_t *dev = (rtcdev_t *) priv; + int reg = port - dev->base_addr; + uint8_t ret = 0xff; /* This chip is directly mapped on I/O. */ cycles -= ISA_CYCLES(4); - switch(reg) { - case MM67_ISTAT: /* IRQ status (RO) */ - ret = dev->nvr.regs[reg]; - dev->nvr.regs[reg] = 0x00; - if (dev->irq != -1) - picintc(1 << dev->irq); - break; + switch (reg) { + case MM67_ISTAT: /* IRQ status (RO) */ + ret = dev->nvr.regs[reg]; + dev->nvr.regs[reg] = 0x00; + if (dev->irq != -1) + picintc(1 << dev->irq); + break; - default: - ret = dev->nvr.regs[reg]; - break; + default: + ret = dev->nvr.regs[reg]; + break; } -#if ISARTC_DEBUG - isartc_log("ISARTC: read(%04x) = %02x\n", port-dev->base_addr, ret); +#if ISARTC_DEBUG + isartc_log("ISARTC: read(%04x) = %02x\n", port - dev->base_addr, ret); #endif - return(ret); + return (ret); } - /* Handle a WRITE operation to one of our registers. */ static void mm67_write(uint16_t port, uint8_t val, void *priv) { - rtcdev_t *dev = (rtcdev_t *)priv; - int reg = port - dev->base_addr; - int i; + rtcdev_t *dev = (rtcdev_t *) priv; + int reg = port - dev->base_addr; + int i; -#if ISARTC_DEBUG - isartc_log("ISARTC: write(%04x, %02x)\n", port-dev->base_addr, val); +#if ISARTC_DEBUG + isartc_log("ISARTC: write(%04x, %02x)\n", port - dev->base_addr, val); #endif /* This chip is directly mapped on I/O. */ cycles -= ISA_CYCLES(4); - switch(reg) { - case MM67_ISTAT: /* intr status (RO) */ - break; + switch (reg) { + case MM67_ISTAT: /* intr status (RO) */ + break; - case MM67_ICTRL: /* intr control */ - dev->nvr.regs[MM67_ISTAT] = 0x00; - dev->nvr.regs[reg] = val; - break; + case MM67_ICTRL: /* intr control */ + dev->nvr.regs[MM67_ISTAT] = 0x00; + dev->nvr.regs[reg] = val; + break; - case MM67_RSTCTR: - if (val == 0xff) - mm67_reset(&dev->nvr); - break; + case MM67_RSTCTR: + if (val == 0xff) + mm67_reset(&dev->nvr); + break; - case MM67_RSTRAM: - if (val == 0xff) { - for (i = MM67_AL_MSEC; i <= MM67_AL_MON; i++) - dev->nvr.regs[i] = RTC_BCD(0); - dev->nvr.regs[MM67_DOW] = RTC_BCD(1); - dev->nvr.regs[MM67_DOM] = RTC_BCD(1); - dev->nvr.regs[MM67_MON] = RTC_BCD(1); - if (dev->year != -1) { - val = (dev->flags & FLAG_YEAR80) ? 0 : 80; - if (dev->flags & FLAG_YEARBCD) - dev->nvr.regs[dev->year] = RTC_BCD(val); - else - dev->nvr.regs[dev->year] = val; + case MM67_RSTRAM: + if (val == 0xff) { + for (i = MM67_AL_MSEC; i <= MM67_AL_MON; i++) + dev->nvr.regs[i] = RTC_BCD(0); + dev->nvr.regs[MM67_DOW] = RTC_BCD(1); + dev->nvr.regs[MM67_DOM] = RTC_BCD(1); + dev->nvr.regs[MM67_MON] = RTC_BCD(1); + if (dev->year != -1) { + val = (dev->flags & FLAG_YEAR80) ? 0 : 80; + if (dev->flags & FLAG_YEARBCD) + dev->nvr.regs[dev->year] = RTC_BCD(val); + else + dev->nvr.regs[dev->year] = val; #ifdef MM67_CENTURY - dev->nvr.regs[MM67_CENTURY] = 19; + dev->nvr.regs[MM67_CENTURY] = 19; #endif - } - } - break; + } + } + break; - case MM67_STATUS: /* STATUS (RO) */ - break; + case MM67_STATUS: /* STATUS (RO) */ + break; - case MM67_GOCMD: -isartc_log("RTC: write gocmd=%02x\n", val); - break; + case MM67_GOCMD: + isartc_log("RTC: write gocmd=%02x\n", val); + break; - case MM67_STBYIRQ: -isartc_log("RTC: write stby=%02x\n", val); - break; + case MM67_STBYIRQ: + isartc_log("RTC: write stby=%02x\n", val); + break; - case MM67_TEST: -isartc_log("RTC: write test=%02x\n", val); - break; + case MM67_TEST: + isartc_log("RTC: write test=%02x\n", val); + break; - default: - dev->nvr.regs[reg] = val; - break; + default: + dev->nvr.regs[reg] = val; + break; } } - /************************************************************************ * * * Generic code for all supported chips. * @@ -498,102 +490,101 @@ static void * isartc_init(const device_t *info) { rtcdev_t *dev; - int is_at = IS_AT(machine); - is_at = is_at || !strcmp(machine_get_internal_name(), "xi8088"); + int is_at = IS_AT(machine); + is_at = is_at || !strcmp(machine_get_internal_name(), "xi8088"); /* Create a device instance. */ - dev = (rtcdev_t *)malloc(sizeof(rtcdev_t)); + dev = (rtcdev_t *) malloc(sizeof(rtcdev_t)); memset(dev, 0x00, sizeof(rtcdev_t)); - dev->name = info->name; - dev->board = info->local; - dev->irq = -1; - dev->year = -1; + dev->name = info->name; + dev->board = info->local; + dev->irq = -1; + dev->year = -1; dev->nvr.data = dev; dev->nvr.size = 16; /* Do per-board initialization. */ - switch(dev->board) { - case ISARTC_EV170: /* Everex EV-170 Magic I/O */ - dev->flags |= FLAG_YEAR80; - dev->base_addr = device_get_config_hex16("base"); - dev->base_addrsz = 32; - dev->irq = device_get_config_int("irq"); - dev->f_rd = mm67_read; - dev->f_wr = mm67_write; - dev->nvr.reset = mm67_reset; - dev->nvr.start = mm67_start; - dev->nvr.tick = mm67_tick; - dev->year = MM67_AL_DOM; /* year, NON STANDARD */ - break; + switch (dev->board) { + case ISARTC_EV170: /* Everex EV-170 Magic I/O */ + dev->flags |= FLAG_YEAR80; + dev->base_addr = device_get_config_hex16("base"); + dev->base_addrsz = 32; + dev->irq = device_get_config_int("irq"); + dev->f_rd = mm67_read; + dev->f_wr = mm67_write; + dev->nvr.reset = mm67_reset; + dev->nvr.start = mm67_start; + dev->nvr.tick = mm67_tick; + dev->year = MM67_AL_DOM; /* year, NON STANDARD */ + break; - case ISARTC_DTK: /* DTK PII-147 Hexa I/O Plus */ - dev->flags |= FLAG_YEARBCD; - dev->base_addr = device_get_config_hex16("base"); - dev->base_addrsz = 32; - dev->f_rd = mm67_read; - dev->f_wr = mm67_write; - dev->nvr.reset = mm67_reset; - dev->nvr.start = mm67_start; - dev->nvr.tick = mm67_tick; - dev->year = MM67_AL_HUNTEN; /* year, NON STANDARD */ - break; + case ISARTC_DTK: /* DTK PII-147 Hexa I/O Plus */ + dev->flags |= FLAG_YEARBCD; + dev->base_addr = device_get_config_hex16("base"); + dev->base_addrsz = 32; + dev->f_rd = mm67_read; + dev->f_wr = mm67_write; + dev->nvr.reset = mm67_reset; + dev->nvr.start = mm67_start; + dev->nvr.tick = mm67_tick; + dev->year = MM67_AL_HUNTEN; /* year, NON STANDARD */ + break; - case ISARTC_P5PAK: /* Paradise Systems 5PAK */ - case ISARTC_A6PAK: /* AST SixPakPlus */ - dev->flags |= FLAG_YEAR80; - dev->base_addr = 0x02c0; - dev->base_addrsz = 32; - dev->irq = device_get_config_int("irq"); - dev->f_rd = mm67_read; - dev->f_wr = mm67_write; - dev->nvr.reset = mm67_reset; - dev->nvr.start = mm67_start; - dev->nvr.tick = mm67_tick; - dev->year = MM67_AL_DOM; /* year, NON STANDARD */ - break; + case ISARTC_P5PAK: /* Paradise Systems 5PAK */ + case ISARTC_A6PAK: /* AST SixPakPlus */ + dev->flags |= FLAG_YEAR80; + dev->base_addr = 0x02c0; + dev->base_addrsz = 32; + dev->irq = device_get_config_int("irq"); + dev->f_rd = mm67_read; + dev->f_wr = mm67_write; + dev->nvr.reset = mm67_reset; + dev->nvr.start = mm67_start; + dev->nvr.tick = mm67_tick; + dev->year = MM67_AL_DOM; /* year, NON STANDARD */ + break; - default: - break; + default: + break; } /* Say hello! */ isartc_log("ISARTC: %s (I/O=%04XH", info->name, dev->base_addr); if (dev->irq != -1) - isartc_log(", IRQ%i", dev->irq); + isartc_log(", IRQ%i", dev->irq); isartc_log(")\n"); /* Set up an I/O port handler. */ io_sethandler(dev->base_addr, dev->base_addrsz, - dev->f_rd,NULL,NULL, dev->f_wr,NULL,NULL, dev); + dev->f_rd, NULL, NULL, dev->f_wr, NULL, NULL, dev); /* Hook into the NVR backend. */ - dev->nvr.fn = isartc_get_internal_name(isartc_type); + dev->nvr.fn = isartc_get_internal_name(isartc_type); dev->nvr.irq = dev->irq; if (!is_at) - nvr_init(&dev->nvr); + nvr_init(&dev->nvr); /* Let them know our device instance. */ - return((void *)dev); + return ((void *) dev); } - /* Remove the device from the system. */ static void isartc_close(void *priv) { - rtcdev_t *dev = (rtcdev_t *)priv; + rtcdev_t *dev = (rtcdev_t *) priv; io_removehandler(dev->base_addr, dev->base_addrsz, - dev->f_rd,NULL,NULL, dev->f_wr,NULL,NULL, dev); + dev->f_rd, NULL, NULL, dev->f_wr, NULL, NULL, dev); if (dev->nvr.fn != NULL) - free(dev->nvr.fn); + free(dev->nvr.fn); free(dev); } static const device_config_t ev170_config[] = { -// clang-format off + // clang-format off { "base", "Address", CONFIG_HEX16, "", 0x02C0, "", { 0 }, { @@ -613,25 +604,25 @@ static const device_config_t ev170_config[] = { }, }, { "", "", -1 } -// clang-format on + // clang-format on }; static const device_t ev170_device = { - .name = "Everex EV-170 Magic I/O", + .name = "Everex EV-170 Magic I/O", .internal_name = "ev170", - .flags = DEVICE_ISA, - .local = ISARTC_EV170, - .init = isartc_init, - .close = isartc_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISARTC_EV170, + .init = isartc_init, + .close = isartc_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ev170_config + .force_redraw = NULL, + .config = ev170_config }; static const device_config_t pii147_config[] = { -// clang-format off + // clang-format off { "base", "Address", CONFIG_HEX16, "", 0x0240, "", { 0 }, { @@ -641,25 +632,25 @@ static const device_config_t pii147_config[] = { }, }, { "", "", -1 } -// clang-format on + // clang-format on }; static const device_t pii147_device = { - .name = "DTK PII-147 Hexa I/O Plus", + .name = "DTK PII-147 Hexa I/O Plus", .internal_name = "pii147", - .flags = DEVICE_ISA, - .local = ISARTC_DTK, - .init = isartc_init, - .close = isartc_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISARTC_DTK, + .init = isartc_init, + .close = isartc_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = pii147_config + .force_redraw = NULL, + .config = pii147_config }; static const device_config_t p5pak_config[] = { -// clang-format off + // clang-format off { "irq", "IRQ", CONFIG_SELECTION, "", -1, "", { 0 }, { @@ -671,25 +662,25 @@ static const device_config_t p5pak_config[] = { }, }, { "", "", -1 } -// clang-format on + // clang-format on }; static const device_t p5pak_device = { - .name = "Paradise Systems 5-PAK", + .name = "Paradise Systems 5-PAK", .internal_name = "p5pak", - .flags = DEVICE_ISA, - .local = ISARTC_P5PAK, - .init = isartc_init, - .close = isartc_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISARTC_P5PAK, + .init = isartc_init, + .close = isartc_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = p5pak_config + .force_redraw = NULL, + .config = p5pak_config }; static const device_config_t a6pak_config[] = { -// clang-format off + // clang-format off { "irq", "IRQ", CONFIG_SELECTION, "", -1, "", { 0 }, { @@ -701,54 +692,55 @@ static const device_config_t a6pak_config[] = { }, }, { "", "", -1 } -// clang-format on + // clang-format on }; static const device_t a6pak_device = { - .name = "AST SixPakPlus", + .name = "AST SixPakPlus", .internal_name = "a6pak", - .flags = DEVICE_ISA, - .local = ISARTC_A6PAK, - .init = isartc_init, - .close = isartc_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = ISARTC_A6PAK, + .init = isartc_init, + .close = isartc_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = a6pak_config + .force_redraw = NULL, + .config = a6pak_config }; static const device_t isartc_none_device = { - .name = "None", + .name = "None", .internal_name = "none", - .flags = 0, - .local = 0, - .init = NULL, - .close = NULL, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = NULL, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; static const struct { - const device_t *dev; + const device_t *dev; } boards[] = { -// clang-format off + // clang-format off { &isartc_none_device }, { &ev170_device }, { &pii147_device }, { &p5pak_device }, { &a6pak_device }, { NULL }, -// clang-format on + // clang-format on }; void isartc_reset(void) { - if (isartc_type == 0) return; + if (isartc_type == 0) + return; /* Add the device to the system. */ device_add(boards[isartc_type].dev); @@ -760,25 +752,23 @@ isartc_get_internal_name(int board) return device_get_internal_name(boards[board].dev); } - int isartc_get_from_internal_name(char *s) { int c = 0; while (boards[c].dev != NULL) { - if (! strcmp(boards[c].dev->internal_name, s)) - return(c); - c++; + if (!strcmp(boards[c].dev->internal_name, s)) + return (c); + c++; } - /* Not found. */ - return(0); +/* Not found. */ + return (0); } - const device_t * isartc_get_device(int board) { - return(boards[board].dev); + return (boards[board].dev); } diff --git a/src/device/keyboard.c b/src/device/keyboard.c index 7c1581d52..ef3dafb11 100644 --- a/src/device/keyboard.c +++ b/src/device/keyboard.c @@ -28,23 +28,20 @@ #include "cpu.h" +int keyboard_scan; +void (*keyboard_send)(uint16_t val); -int keyboard_scan; -void (*keyboard_send)(uint16_t val); - - -static int recv_key[512]; /* keyboard input buffer */ -static int oldkey[512]; +static int recv_key[512]; /* keyboard input buffer */ +static int oldkey[512]; #if 0 static int keydelay[512]; #endif -static scancode *scan_table; /* scancode table for keyboard */ - -static uint8_t caps_lock = 0; -static uint8_t num_lock = 0; -static uint8_t scroll_lock = 0; -static uint8_t shift = 0; +static scancode *scan_table; /* scancode table for keyboard */ +static uint8_t caps_lock = 0; +static uint8_t num_lock = 0; +static uint8_t scroll_lock = 0; +static uint8_t shift = 0; void keyboard_init(void) @@ -52,82 +49,78 @@ keyboard_init(void) memset(recv_key, 0x00, sizeof(recv_key)); keyboard_scan = 1; - scan_table = NULL; + scan_table = NULL; memset(keyboard_set3_flags, 0x00, sizeof(keyboard_set3_flags)); keyboard_set3_all_repeat = 0; - keyboard_set3_all_break = 0; + keyboard_set3_all_break = 0; } - void keyboard_set_table(const scancode *ptr) { scan_table = (scancode *) ptr; } - static uint8_t fake_shift_needed(uint16_t scan) { - switch(scan) { - case 0x147: - case 0x148: - case 0x149: - case 0x14a: - case 0x14b: - case 0x14d: - case 0x14f: - case 0x150: - case 0x151: - case 0x152: - case 0x153: - return 1; - default: - return 0; + switch (scan) { + case 0x147: + case 0x148: + case 0x149: + case 0x14a: + case 0x14b: + case 0x14d: + case 0x14f: + case 0x150: + case 0x151: + case 0x152: + case 0x153: + return 1; + default: + return 0; } } - void key_process(uint16_t scan, int down) { scancode *codes = scan_table; - int c; + int c; if (!keyboard_scan || (keyboard_send == NULL)) - return; + return; oldkey[scan] = down; - if (down && codes[scan].mk[0] == 0) - return; + if (down && codes[scan].mk[0] == 0) + return; if (!down && codes[scan].brk[0] == 0) - return; + return; /* TODO: The keyboard controller needs to report the AT flag to us here. */ if (is286 && ((keyboard_mode & 3) == 3)) { - if (!keyboard_set3_all_break && !down && !(keyboard_set3_flags[codes[scan].mk[0]] & 2)) - return; + if (!keyboard_set3_all_break && !down && !(keyboard_set3_flags[codes[scan].mk[0]] & 2)) + return; } c = 0; if (down) { - /* Send the special code indicating an opening fake shift might be needed. */ - if (fake_shift_needed(scan)) - keyboard_send(0x100); - while (codes[scan].mk[c] != 0) - keyboard_send(codes[scan].mk[c++]); + /* Send the special code indicating an opening fake shift might be needed. */ + if (fake_shift_needed(scan)) + keyboard_send(0x100); + while (codes[scan].mk[c] != 0) + keyboard_send(codes[scan].mk[c++]); } else { - while (codes[scan].brk[c] != 0) - keyboard_send(codes[scan].brk[c++]); - /* Send the special code indicating a closing fake shift might be needed. */ - if (fake_shift_needed(scan)) - keyboard_send(0x101); + while (codes[scan].brk[c] != 0) + keyboard_send(codes[scan].brk[c++]); + /* Send the special code indicating a closing fake shift might be needed. */ + if (fake_shift_needed(scan)) + keyboard_send(0x101); } } - /* Handle a keystroke event from the UI layer. */ void keyboard_input(int down, uint16_t scan) @@ -135,72 +128,72 @@ keyboard_input(int down, uint16_t scan) /* Translate E0 xx scan codes to 01xx because we use 512-byte arrays for states and scan code sets. */ if ((scan >> 8) == 0xe0) { - scan &= 0x00ff; - scan |= 0x0100; /* extended key code */ + scan &= 0x00ff; + scan |= 0x0100; /* extended key code */ } else if ((scan >> 8) != 0x01) - scan &= 0x00ff; /* we can receive a scan code whose upper byte is 0x01, - this means we're the Win32 version running on windows - that already sends us preprocessed scan codes, which - means we then use the scan code as is, and need to - make sure we do not accidentally strip that upper byte */ + scan &= 0x00ff; /* we can receive a scan code whose upper byte is 0x01, + this means we're the Win32 version running on windows + that already sends us preprocessed scan codes, which + means we then use the scan code as is, and need to + make sure we do not accidentally strip that upper byte */ if (recv_key[scan & 0x1ff] ^ down) { - if (down) { - switch(scan & 0x1ff) { - case 0x01c: /* Left Ctrl */ - shift |= 0x01; - break; - case 0x11c: /* Right Ctrl */ - shift |= 0x10; - break; - case 0x02a: /* Left Shift */ - shift |= 0x02; - break; - case 0x036: /* Right Shift */ - shift |= 0x20; - break; - case 0x038: /* Left Alt */ - shift |= 0x04; - break; - case 0x138: /* Right Alt */ - shift |= 0x40; - break; - } - } else { - switch(scan & 0x1ff) { - case 0x01c: /* Left Ctrl */ - shift &= ~0x01; - break; - case 0x11c: /* Right Ctrl */ - shift &= ~0x10; - break; - case 0x02a: /* Left Shift */ - shift &= ~0x02; - break; - case 0x036: /* Right Shift */ - shift &= ~0x20; - break; - case 0x038: /* Left Alt */ - shift &= ~0x04; - break; - case 0x138: /* Right Alt */ - shift &= ~0x40; - break; - case 0x03a: /* Caps Lock */ - caps_lock ^= 1; - break; - case 0x045: - num_lock ^= 1; - break; - case 0x046: - scroll_lock ^= 1; - break; - } - } + if (down) { + switch (scan & 0x1ff) { + case 0x01c: /* Left Ctrl */ + shift |= 0x01; + break; + case 0x11c: /* Right Ctrl */ + shift |= 0x10; + break; + case 0x02a: /* Left Shift */ + shift |= 0x02; + break; + case 0x036: /* Right Shift */ + shift |= 0x20; + break; + case 0x038: /* Left Alt */ + shift |= 0x04; + break; + case 0x138: /* Right Alt */ + shift |= 0x40; + break; + } + } else { + switch (scan & 0x1ff) { + case 0x01c: /* Left Ctrl */ + shift &= ~0x01; + break; + case 0x11c: /* Right Ctrl */ + shift &= ~0x10; + break; + case 0x02a: /* Left Shift */ + shift &= ~0x02; + break; + case 0x036: /* Right Shift */ + shift &= ~0x20; + break; + case 0x038: /* Left Alt */ + shift &= ~0x04; + break; + case 0x138: /* Right Alt */ + shift &= ~0x40; + break; + case 0x03a: /* Caps Lock */ + caps_lock ^= 1; + break; + case 0x045: + num_lock ^= 1; + break; + case 0x046: + scroll_lock ^= 1; + break; + } + } } /* NOTE: Shouldn't this be some sort of bit shift? An array of 8 unsigned 64-bit integers - should be enough. */ + should be enough. */ /* recv_key[scan >> 6] |= ((uint64_t) down << ((uint64_t) scan & 0x3fLL)); */ /* pclog("Received scan code: %03X (%s)\n", scan & 0x1ff, down ? "down" : "up"); */ @@ -209,7 +202,6 @@ keyboard_input(int down, uint16_t scan) key_process(scan & 0x1ff, down); } - static uint8_t keyboard_do_break(uint16_t scan) { @@ -217,48 +209,42 @@ keyboard_do_break(uint16_t scan) /* TODO: The keyboard controller needs to report the AT flag to us here. */ if (is286 && ((keyboard_mode & 3) == 3)) { - if (!keyboard_set3_all_break && - !recv_key[scan] && - !(keyboard_set3_flags[codes[scan].mk[0]] & 2)) - return 0; - else - return 1; + if (!keyboard_set3_all_break && !recv_key[scan] && !(keyboard_set3_flags[codes[scan].mk[0]] & 2)) + return 0; + else + return 1; } else - return 1; + return 1; } - /* Also called by the emulated keyboard controller to update the states of Caps Lock, Num Lock, and Scroll Lock when receving the "Set keyboard LEDs" command. */ void keyboard_update_states(uint8_t cl, uint8_t nl, uint8_t sl) { - caps_lock = cl; - num_lock = nl; - scroll_lock = sl; + caps_lock = cl; + num_lock = nl; + scroll_lock = sl; } - uint8_t keyboard_get_shift(void) { - return shift; + return shift; } - void keyboard_get_states(uint8_t *cl, uint8_t *nl, uint8_t *sl) { - if (cl) - *cl = caps_lock; - if (nl) - *nl = num_lock; - if (sl) - *sl = scroll_lock; + if (cl) + *cl = caps_lock; + if (nl) + *nl = num_lock; + if (sl) + *sl = scroll_lock; } - /* Called by the UI to update the states of Caps Lock, Num Lock, and Scroll Lock. */ void keyboard_set_states(uint8_t cl, uint8_t nl, uint8_t sl) @@ -268,68 +254,63 @@ keyboard_set_states(uint8_t cl, uint8_t nl, uint8_t sl) int i; if (caps_lock != cl) { - i = 0; - while (codes[0x03a].mk[i] != 0) - keyboard_send(codes[0x03a].mk[i++]); - if (keyboard_do_break(0x03a)) { - i = 0; - while (codes[0x03a].brk[i] != 0) - keyboard_send(codes[0x03a].brk[i++]); - } + i = 0; + while (codes[0x03a].mk[i] != 0) + keyboard_send(codes[0x03a].mk[i++]); + if (keyboard_do_break(0x03a)) { + i = 0; + while (codes[0x03a].brk[i] != 0) + keyboard_send(codes[0x03a].brk[i++]); + } } if (num_lock != nl) { - i = 0; - while (codes[0x045].mk[i] != 0) - keyboard_send(codes[0x045].mk[i++]); - if (keyboard_do_break(0x045)) { - i = 0; - while (codes[0x045].brk[i] != 0) - keyboard_send(codes[0x045].brk[i++]); - } + i = 0; + while (codes[0x045].mk[i] != 0) + keyboard_send(codes[0x045].mk[i++]); + if (keyboard_do_break(0x045)) { + i = 0; + while (codes[0x045].brk[i] != 0) + keyboard_send(codes[0x045].brk[i++]); + } } if (scroll_lock != sl) { - i = 0; - while (codes[0x046].mk[i] != 0) - keyboard_send(codes[0x046].mk[i++]); - if (keyboard_do_break(0x046)) { - i = 0; - while (codes[0x046].brk[i] != 0) - keyboard_send(codes[0x046].brk[i++]); - } + i = 0; + while (codes[0x046].mk[i] != 0) + keyboard_send(codes[0x046].mk[i++]); + if (keyboard_do_break(0x046)) { + i = 0; + while (codes[0x046].brk[i] != 0) + keyboard_send(codes[0x046].brk[i++]); + } } keyboard_update_states(cl, nl, sl); } - int keyboard_recv(uint16_t key) { - return recv_key[key]; + return recv_key[key]; } - /* Do we have Control-Alt-PgDn in the keyboard buffer? */ int keyboard_isfsexit(void) { - return( (recv_key[0x01D] || recv_key[0x11D]) && - (recv_key[0x038] || recv_key[0x138]) && - (recv_key[0x051] || recv_key[0x151]) ); + return ((recv_key[0x01D] || recv_key[0x11D]) && (recv_key[0x038] || recv_key[0x138]) && (recv_key[0x051] || recv_key[0x151])); } - /* Do we have F8-F12 in the keyboard buffer? */ int keyboard_ismsexit(void) { #ifdef _WIN32 /* Windows: F8+F12 */ - return( recv_key[0x042] && recv_key[0x058] ); + return (recv_key[0x042] && recv_key[0x058]); #else /* WxWidgets cannot do two regular keys.. CTRL+END */ - return( (recv_key[0x01D] || recv_key[0x11D]) && (recv_key[0x04F] || recv_key[0x14F]) ); + return ((recv_key[0x01D] || recv_key[0x11D]) && (recv_key[0x04F] || recv_key[0x14F])); #endif } diff --git a/src/device/keyboard_at.c b/src/device/keyboard_at.c index 5d38088ed..e808f9507 100644 --- a/src/device/keyboard_at.c +++ b/src/device/keyboard_at.c @@ -46,136 +46,132 @@ #include <86box/video.h> #include <86box/keyboard.h> +#define STAT_PARITY 0x80 +#define STAT_RTIMEOUT 0x40 +#define STAT_TTIMEOUT 0x20 +#define STAT_MFULL 0x20 +#define STAT_UNLOCKED 0x10 +#define STAT_CD 0x08 +#define STAT_SYSFLAG 0x04 +#define STAT_IFULL 0x02 +#define STAT_OFULL 0x01 -#define STAT_PARITY 0x80 -#define STAT_RTIMEOUT 0x40 -#define STAT_TTIMEOUT 0x20 -#define STAT_MFULL 0x20 -#define STAT_UNLOCKED 0x10 -#define STAT_CD 0x08 -#define STAT_SYSFLAG 0x04 -#define STAT_IFULL 0x02 -#define STAT_OFULL 0x01 +#define RESET_DELAY_TIME (100 * 10) /* 600ms */ -#define RESET_DELAY_TIME (100 * 10) /* 600ms */ +#define CCB_UNUSED 0x80 +#define CCB_TRANSLATE 0x40 +#define CCB_PCMODE 0x20 +#define CCB_ENABLEKBD 0x10 +#define CCB_IGNORELOCK 0x08 +#define CCB_SYSTEM 0x04 +#define CCB_ENABLEMINT 0x02 +#define CCB_ENABLEKINT 0x01 -#define CCB_UNUSED 0x80 -#define CCB_TRANSLATE 0x40 -#define CCB_PCMODE 0x20 -#define CCB_ENABLEKBD 0x10 -#define CCB_IGNORELOCK 0x08 -#define CCB_SYSTEM 0x04 -#define CCB_ENABLEMINT 0x02 -#define CCB_ENABLEKINT 0x01 +#define CCB_MASK 0x68 +#define MODE_MASK 0x6c -#define CCB_MASK 0x68 -#define MODE_MASK 0x6c - -#define KBC_TYPE_ISA 0x00 /* AT ISA-based chips */ -#define KBC_TYPE_PS2_NOREF 0x01 /* PS2 type, no refresh */ -#define KBC_TYPE_PS2_1 0x02 /* PS2 on PS/2, type 1 */ -#define KBC_TYPE_PS2_2 0x03 /* PS2 on PS/2, type 2 */ -#define KBC_TYPE_MASK 0x03 - -#define KBC_VEN_GENERIC 0x00 -#define KBC_VEN_AMI 0x04 -#define KBC_VEN_IBM_MCA 0x08 -#define KBC_VEN_QUADTEL 0x0c -#define KBC_VEN_TOSHIBA 0x10 -#define KBC_VEN_XI8088 0x14 -#define KBC_VEN_IBM_PS1 0x18 -#define KBC_VEN_ACER 0x1c -#define KBC_VEN_INTEL_AMI 0x20 -#define KBC_VEN_OLIVETTI 0x24 -#define KBC_VEN_NCR 0x28 -#define KBC_VEN_SAMSUNG 0x2c -#define KBC_VEN_ALI 0x30 -#define KBC_VEN_MASK 0x3c +#define KBC_TYPE_ISA 0x00 /* AT ISA-based chips */ +#define KBC_TYPE_PS2_NOREF 0x01 /* PS2 type, no refresh */ +#define KBC_TYPE_PS2_1 0x02 /* PS2 on PS/2, type 1 */ +#define KBC_TYPE_PS2_2 0x03 /* PS2 on PS/2, type 2 */ +#define KBC_TYPE_MASK 0x03 +#define KBC_VEN_GENERIC 0x00 +#define KBC_VEN_AMI 0x04 +#define KBC_VEN_IBM_MCA 0x08 +#define KBC_VEN_QUADTEL 0x0c +#define KBC_VEN_TOSHIBA 0x10 +#define KBC_VEN_XI8088 0x14 +#define KBC_VEN_IBM_PS1 0x18 +#define KBC_VEN_ACER 0x1c +#define KBC_VEN_INTEL_AMI 0x20 +#define KBC_VEN_OLIVETTI 0x24 +#define KBC_VEN_NCR 0x28 +#define KBC_VEN_SAMSUNG 0x2c +#define KBC_VEN_ALI 0x30 +#define KBC_VEN_MASK 0x3c typedef struct { - uint8_t command, status, old_status, out, old_out, secr_phase, - mem_addr, input_port, output_port, old_output_port, - key_command, output_locked, ami_stat, want60, - wantirq, key_wantdata, ami_flags, first_write; + uint8_t command, status, old_status, out, old_out, secr_phase, + mem_addr, input_port, output_port, old_output_port, + key_command, output_locked, ami_stat, want60, + wantirq, key_wantdata, ami_flags, first_write; - uint8_t mem[0x100]; + uint8_t mem[0x100]; - int last_irq, old_last_irq, - reset_delay, - out_new, out_delayed; + int last_irq, old_last_irq, + reset_delay, + out_new, out_delayed; - uint32_t flags; + uint32_t flags; - pc_timer_t pulse_cb; + pc_timer_t pulse_cb; - uint8_t (*write60_ven)(void *p, uint8_t val); - uint8_t (*write64_ven)(void *p, uint8_t val); + uint8_t (*write60_ven)(void *p, uint8_t val); + uint8_t (*write64_ven)(void *p, uint8_t val); pc_timer_t send_delay_timer; } atkbd_t; - /* bit 0 = repeat, bit 1 = makes break code? */ -uint8_t keyboard_set3_flags[512]; -uint8_t keyboard_set3_all_repeat; -uint8_t keyboard_set3_all_break; +uint8_t keyboard_set3_flags[512]; +uint8_t keyboard_set3_all_repeat; +uint8_t keyboard_set3_all_break; /* Bits 0 - 1 = scan code set, bit 6 = translate or not. */ -uint8_t keyboard_mode = 0x42; - - -static uint8_t key_ctrl_queue[16]; -static int key_ctrl_queue_start = 0, key_ctrl_queue_end = 0; -static uint8_t key_queue[16]; -static int key_queue_start = 0, key_queue_end = 0; -uint8_t mouse_queue[16]; -int mouse_queue_start = 0, mouse_queue_end = 0; -static uint8_t kbd_last_scan_code; -static void (*mouse_write)(uint8_t val, void *priv) = NULL; -static void *mouse_p = NULL; -static uint8_t sc_or = 0; -static atkbd_t *SavedKbd = NULL; // FIXME: remove!!! --FvK +uint8_t keyboard_mode = 0x42; +static uint8_t key_ctrl_queue[16]; +static int key_ctrl_queue_start = 0, key_ctrl_queue_end = 0; +static uint8_t key_queue[16]; +static int key_queue_start = 0, key_queue_end = 0; +uint8_t mouse_queue[16]; +int mouse_queue_start = 0, mouse_queue_end = 0; +static uint8_t kbd_last_scan_code; +static void (*mouse_write)(uint8_t val, void *priv) = NULL; +static void *mouse_p = NULL; +static uint8_t sc_or = 0; +static atkbd_t *SavedKbd = NULL; // FIXME: remove!!! --FvK /* Non-translated to translated scan codes. */ static const uint8_t nont_to_t[256] = { - 0xff, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 0x3c, 0x58, - 0x64, 0x44, 0x42, 0x40, 0x3e, 0x0f, 0x29, 0x59, - 0x65, 0x38, 0x2a, 0x70, 0x1d, 0x10, 0x02, 0x5a, - 0x66, 0x71, 0x2c, 0x1f, 0x1e, 0x11, 0x03, 0x5b, - 0x67, 0x2e, 0x2d, 0x20, 0x12, 0x05, 0x04, 0x5c, - 0x68, 0x39, 0x2f, 0x21, 0x14, 0x13, 0x06, 0x5d, - 0x69, 0x31, 0x30, 0x23, 0x22, 0x15, 0x07, 0x5e, - 0x6a, 0x72, 0x32, 0x24, 0x16, 0x08, 0x09, 0x5f, - 0x6b, 0x33, 0x25, 0x17, 0x18, 0x0b, 0x0a, 0x60, - 0x6c, 0x34, 0x35, 0x26, 0x27, 0x19, 0x0c, 0x61, - 0x6d, 0x73, 0x28, 0x74, 0x1a, 0x0d, 0x62, 0x6e, - 0x3a, 0x36, 0x1c, 0x1b, 0x75, 0x2b, 0x63, 0x76, - 0x55, 0x56, 0x77, 0x78, 0x79, 0x7a, 0x0e, 0x7b, - 0x7c, 0x4f, 0x7d, 0x4b, 0x47, 0x7e, 0x7f, 0x6f, - 0x52, 0x53, 0x50, 0x4c, 0x4d, 0x48, 0x01, 0x45, - 0x57, 0x4e, 0x51, 0x4a, 0x37, 0x49, 0x46, 0x54, - 0x80, 0x81, 0x82, 0x41, 0x54, 0x85, 0x86, 0x87, - 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, - 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, - 0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, - 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, - 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, - 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, - 0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf, - 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, - 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf, - 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, - 0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf, - 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, - 0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef, - 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, - 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff + 0xff, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 0x3c, 0x58, + 0x64, 0x44, 0x42, 0x40, 0x3e, 0x0f, 0x29, 0x59, + 0x65, 0x38, 0x2a, 0x70, 0x1d, 0x10, 0x02, 0x5a, + 0x66, 0x71, 0x2c, 0x1f, 0x1e, 0x11, 0x03, 0x5b, + 0x67, 0x2e, 0x2d, 0x20, 0x12, 0x05, 0x04, 0x5c, + 0x68, 0x39, 0x2f, 0x21, 0x14, 0x13, 0x06, 0x5d, + 0x69, 0x31, 0x30, 0x23, 0x22, 0x15, 0x07, 0x5e, + 0x6a, 0x72, 0x32, 0x24, 0x16, 0x08, 0x09, 0x5f, + 0x6b, 0x33, 0x25, 0x17, 0x18, 0x0b, 0x0a, 0x60, + 0x6c, 0x34, 0x35, 0x26, 0x27, 0x19, 0x0c, 0x61, + 0x6d, 0x73, 0x28, 0x74, 0x1a, 0x0d, 0x62, 0x6e, + 0x3a, 0x36, 0x1c, 0x1b, 0x75, 0x2b, 0x63, 0x76, + 0x55, 0x56, 0x77, 0x78, 0x79, 0x7a, 0x0e, 0x7b, + 0x7c, 0x4f, 0x7d, 0x4b, 0x47, 0x7e, 0x7f, 0x6f, + 0x52, 0x53, 0x50, 0x4c, 0x4d, 0x48, 0x01, 0x45, + 0x57, 0x4e, 0x51, 0x4a, 0x37, 0x49, 0x46, 0x54, + 0x80, 0x81, 0x82, 0x41, 0x54, 0x85, 0x86, 0x87, + 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, + 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, + 0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, + 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, + 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, + 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, + 0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf, + 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, + 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf, + 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, + 0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf, + 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, + 0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef, + 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, + 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff }; #ifdef USE_SET1 static const scancode scancode_set1[512] = { + // clang-format off { { 0},{ 0} }, { { 0x01,0},{ 0x81,0} }, { { 0x02,0},{ 0x82,0} }, { { 0x03,0},{ 0x83,0} }, /*000*/ { { 0x04,0},{ 0x84,0} }, { { 0x05,0},{ 0x85,0} }, { { 0x06,0},{ 0x86,0} }, { { 0x07,0},{ 0x87,0} }, /*004*/ { { 0x08,0},{ 0x88,0} }, { { 0x09,0},{ 0x89,0} }, { { 0x0a,0},{ 0x8a,0} }, { { 0x0b,0},{ 0x8b,0} }, /*008*/ @@ -303,10 +299,12 @@ static const scancode scancode_set1[512] = { { { 0},{ 0} }, { { 0},{ 0} }, { { 0},{ 0} }, { { 0},{ 0} }, /*1f4*/ { { 0},{ 0} }, { { 0},{ 0} }, { { 0},{ 0} }, { { 0},{ 0} }, /*1f8*/ { { 0},{ 0} }, { { 0},{ 0} }, { {0xe0,0xfe,0},{ 0} }, { {0xe0,0xff,0},{ 0} } /*1fc*/ + // clang-format on }; #endif static const scancode scancode_set2[512] = { + // clang-format off { { 0},{ 0} }, { { 0x76,0},{ 0xF0,0x76,0} }, { { 0x16,0},{ 0xF0,0x16,0} }, { { 0x1E,0},{ 0xF0,0x1E,0} }, /*000*/ { { 0x26,0},{ 0xF0,0x26,0} }, { { 0x25,0},{ 0xF0,0x25,0} }, { { 0x2E,0},{ 0xF0,0x2E,0} }, { { 0x36,0},{ 0xF0,0x36,0} }, /*004*/ { { 0x3D,0},{ 0xF0,0x3D,0} }, { { 0x3E,0},{ 0xF0,0x3E,0} }, { { 0x46,0},{ 0xF0,0x46,0} }, { { 0x45,0},{ 0xF0,0x45,0} }, /*008*/ @@ -434,9 +432,11 @@ static const scancode scancode_set2[512] = { { { 0},{ 0} }, { { 0},{ 0} }, { { 0},{ 0} }, { { 0},{ 0} }, /*1f4*/ { { 0},{ 0} }, { { 0},{ 0} }, { { 0},{ 0} }, { { 0},{ 0} }, /*1f8*/ { { 0},{ 0} }, { { 0},{ 0} }, { {0xe0,0xfe,0},{0xe0,0xF0,0xFE,0} }, { {0xe0,0xff,0},{0xe0,0xF0,0xFF,0} } /*1fc*/ + // clang-format on }; static const scancode scancode_set3[512] = { + // clang-format off { { 0},{ 0} }, { { 0x08,0},{ 0xf0,0x08,0} }, { { 0x16,0},{ 0xf0,0x16,0} }, { { 0x1E,0},{ 0xf0,0x1E,0} }, /*000*/ { { 0x26,0},{ 0xf0,0x26,0} }, { { 0x25,0},{ 0xf0,0x25,0} }, { { 0x2E,0},{ 0xf0,0x2E,0} }, { { 0x36,0},{ 0xf0,0x36,0} }, /*004*/ { { 0x3D,0},{ 0xf0,0x3D,0} }, { { 0x3E,0},{ 0xf0,0x3E,0} }, { { 0x46,0},{ 0xf0,0x46,0} }, { { 0x45,0},{ 0xf0,0x45,0} }, /*008*/ @@ -564,187 +564,175 @@ static const scancode scancode_set3[512] = { { { 0},{ 0} }, { { 0},{ 0} }, { { 0},{ 0} }, { { 0},{ 0} }, /*1f4*/ { { 0},{ 0} }, { { 0},{ 0} }, { { 0},{ 0} }, { { 0},{ 0} }, /*1f8*/ { { 0},{ 0} }, { { 0},{ 0} }, { {0xe0,0xfe,0},{0xe0,0xF0,0xFE,0} }, { {0xe0,0xff,0},{0xe0,0xF0,0xFF,0} } /*1fc*/ + // clang-format on }; - -static void add_data_kbd(uint16_t val); - +static void add_data_kbd(uint16_t val); #ifdef ENABLE_KEYBOARD_AT_LOG int keyboard_at_do_log = ENABLE_KEYBOARD_AT_LOG; - static void kbd_log(const char *fmt, ...) { va_list ap; if (keyboard_at_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define kbd_log(fmt, ...) +# define kbd_log(fmt, ...) #endif - static void set_scancode_map(atkbd_t *dev) { switch (keyboard_mode & 3) { #ifdef USE_SET1 - case 1: - default: - keyboard_set_table(scancode_set1); - break; + case 1: + default: + keyboard_set_table(scancode_set1); + break; #else - default: + default: #endif - case 2: - keyboard_set_table(scancode_set2); - break; + case 2: + keyboard_set_table(scancode_set2); + break; - case 3: - keyboard_set_table(scancode_set3); - break; + case 3: + keyboard_set_table(scancode_set3); + break; } if (keyboard_mode & 0x20) #ifdef USE_SET1 - keyboard_set_table(scancode_set1); + keyboard_set_table(scancode_set1); #else - keyboard_set_table(scancode_set2); + keyboard_set_table(scancode_set2); #endif } - - static void kbc_queue_reset(uint8_t channel) { if (channel == 2) { - mouse_queue_start = mouse_queue_end = 0; - memset(mouse_queue, 0x00, sizeof(mouse_queue)); + mouse_queue_start = mouse_queue_end = 0; + memset(mouse_queue, 0x00, sizeof(mouse_queue)); } else if (channel == 1) { - key_queue_start = key_queue_end = 0; - memset(key_queue, 0x00, sizeof(key_queue)); + key_queue_start = key_queue_end = 0; + memset(key_queue, 0x00, sizeof(key_queue)); } else { - key_ctrl_queue_start = key_ctrl_queue_end = 0; - memset(key_ctrl_queue, 0x00, sizeof(key_ctrl_queue)); + key_ctrl_queue_start = key_ctrl_queue_end = 0; + memset(key_ctrl_queue, 0x00, sizeof(key_ctrl_queue)); } } - static void kbc_queue_add(atkbd_t *dev, uint8_t val, uint8_t channel, uint8_t stat_hi) { uint8_t kbc_ven = dev->flags & KBC_VEN_MASK; if ((kbc_ven == KBC_VEN_AMI) || ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF)) - stat_hi |= ((dev->input_port & 0x80) ? 0x10 : 0x00); + stat_hi |= ((dev->input_port & 0x80) ? 0x10 : 0x00); else - stat_hi |= 0x10; + stat_hi |= 0x10; dev->status = (dev->status & 0x0f) | stat_hi; if (channel == 2) { - kbd_log("ATkbc: mouse_queue[%02X] = %02X;\n", mouse_queue_end, val); - mouse_queue[mouse_queue_end] = val; - mouse_queue_end = (mouse_queue_end + 1) & 0xf; + kbd_log("ATkbc: mouse_queue[%02X] = %02X;\n", mouse_queue_end, val); + mouse_queue[mouse_queue_end] = val; + mouse_queue_end = (mouse_queue_end + 1) & 0xf; } else if (channel == 1) { - kbd_log("ATkbc: key_queue[%02X] = %02X;\n", key_queue_end, val); - key_queue[key_queue_end] = val; - key_queue_end = (key_queue_end + 1) & 0xf; + kbd_log("ATkbc: key_queue[%02X] = %02X;\n", key_queue_end, val); + key_queue[key_queue_end] = val; + key_queue_end = (key_queue_end + 1) & 0xf; } else { - kbd_log("ATkbc: key_ctrl_queue[%02X] = %02X;\n", key_ctrl_queue_end, val); - key_ctrl_queue[key_ctrl_queue_end] = val; - key_ctrl_queue_end = (key_ctrl_queue_end + 1) & 0xf; + kbd_log("ATkbc: key_ctrl_queue[%02X] = %02X;\n", key_ctrl_queue_end, val); + key_ctrl_queue[key_ctrl_queue_end] = val; + key_ctrl_queue_end = (key_ctrl_queue_end + 1) & 0xf; } } - static void add_to_kbc_queue_front(atkbd_t *dev, uint8_t val, uint8_t channel, uint8_t stat_hi) { uint8_t kbc_ven = dev->flags & KBC_VEN_MASK; if ((kbc_ven == KBC_VEN_AMI) || ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF)) - stat_hi |= ((dev->input_port & 0x80) ? 0x10 : 0x00); + stat_hi |= ((dev->input_port & 0x80) ? 0x10 : 0x00); else - stat_hi |= 0x10; + stat_hi |= 0x10; kbd_log("ATkbc: Adding %02X to front...\n", val); dev->wantirq = 0; if (channel == 2) { - if (dev->mem[0] & 0x02) - picint(0x1000); - if (kbc_ven != KBC_VEN_OLIVETTI) - dev->last_irq = 0x1000; + if (dev->mem[0] & 0x02) + picint(0x1000); + if (kbc_ven != KBC_VEN_OLIVETTI) + dev->last_irq = 0x1000; } else { - if (dev->mem[0] & 0x01) - picint(2); - if (kbc_ven != KBC_VEN_OLIVETTI) - dev->last_irq = 2; + if (dev->mem[0] & 0x01) + picint(2); + if (kbc_ven != KBC_VEN_OLIVETTI) + dev->last_irq = 2; } dev->out = val; if (channel == 2) - dev->status = (dev->status & ~STAT_IFULL) | (STAT_OFULL | STAT_MFULL) | stat_hi; + dev->status = (dev->status & ~STAT_IFULL) | (STAT_OFULL | STAT_MFULL) | stat_hi; else - dev->status = (dev->status & ~(STAT_IFULL | STAT_MFULL)) | STAT_OFULL | stat_hi; + dev->status = (dev->status & ~(STAT_IFULL | STAT_MFULL)) | STAT_OFULL | stat_hi; if (kbc_ven == KBC_VEN_OLIVETTI) - dev->last_irq = 0x0000; + dev->last_irq = 0x0000; } - static void add_data_kbd_queue(atkbd_t *dev, int direct, uint8_t val) { if ((!keyboard_scan && !direct) || (dev->reset_delay > 0) || (key_queue_end >= 16)) { - kbd_log("ATkbc: Unable to add to queue, conditions: %i, %i, %i\n", !keyboard_scan, (dev->reset_delay > 0), (key_queue_end >= 16)); - return; + kbd_log("ATkbc: Unable to add to queue, conditions: %i, %i, %i\n", !keyboard_scan, (dev->reset_delay > 0), (key_queue_end >= 16)); + return; } - kbd_log("ATkbc: key_queue[%02X] = %02X;\n", key_queue_end, val); + kbd_log("ATkbc: key_queue[%02X] = %02X;\n", key_queue_end, val); kbc_queue_add(dev, val, 1, 0x00); kbd_last_scan_code = val; } - - static void add_data_kbd_direct(atkbd_t *dev, uint8_t val) { - int xt_mode = (keyboard_mode & 0x20) && ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF); - int translate = (keyboard_mode & 0x40); + int xt_mode = (keyboard_mode & 0x20) && ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF); + int translate = (keyboard_mode & 0x40); uint8_t send; if (dev->reset_delay) - return; + return; translate = translate || (keyboard_mode & 0x40) || xt_mode; translate = translate || ((dev->flags & KBC_TYPE_MASK) == KBC_TYPE_PS2_2); if (translate) - send = nont_to_t[val]; + send = nont_to_t[val]; else - send = val; + send = val; add_data_kbd_queue(dev, 1, send); } - static void add_data_kbd_raw(atkbd_t *dev, uint8_t val) { add_data_kbd_queue(dev, 1, val); } - static void kbd_poll(void *priv) { - atkbd_t *dev = (atkbd_t *)priv; + atkbd_t *dev = (atkbd_t *) priv; #ifdef ENABLE_KEYBOARD_AT_LOG const uint8_t channels[4] = { 1, 2, 0, 0 }; #endif @@ -752,54 +740,53 @@ kbd_poll(void *priv) timer_advance_u64(&dev->send_delay_timer, (100ULL * TIMER_USEC)); if (dev->out_new != -1 && !dev->last_irq) { - dev->wantirq = 0; - if (dev->out_new & 0x100) { - if (dev->mem[0] & 0x02) - picint(0x1000); - kbd_log("ATkbc: %02X coming from channel 2\n"); - dev->out = dev->out_new & 0xff; - dev->out_new = -1; - dev->status = (dev->status & ~STAT_IFULL) | (STAT_OFULL | STAT_MFULL); - dev->last_irq = 0x1000; - } else { - if (dev->mem[0] & 0x01) - picint(2); - kbd_log("ATkbc: %02X coming from channel %i\n", dev->out_new & 0xff, channels[(dev->out_new >> 8) & 0x03]); - dev->out = dev->out_new & 0xff; - dev->out_new = -1; - dev->status = (dev->status & ~(STAT_IFULL | STAT_MFULL)) | STAT_OFULL; - dev->last_irq = 2; - } + dev->wantirq = 0; + if (dev->out_new & 0x100) { + if (dev->mem[0] & 0x02) + picint(0x1000); + kbd_log("ATkbc: %02X coming from channel 2\n"); + dev->out = dev->out_new & 0xff; + dev->out_new = -1; + dev->status = (dev->status & ~STAT_IFULL) | (STAT_OFULL | STAT_MFULL); + dev->last_irq = 0x1000; + } else { + if (dev->mem[0] & 0x01) + picint(2); + kbd_log("ATkbc: %02X coming from channel %i\n", dev->out_new & 0xff, channels[(dev->out_new >> 8) & 0x03]); + dev->out = dev->out_new & 0xff; + dev->out_new = -1; + dev->status = (dev->status & ~(STAT_IFULL | STAT_MFULL)) | STAT_OFULL; + dev->last_irq = 2; + } } - if (dev->out_new == -1 && !(dev->status & STAT_OFULL) && key_ctrl_queue_start != key_ctrl_queue_end) { - kbd_log("ATkbc: %02X on channel 0\n", key_ctrl_queue[key_ctrl_queue_start]); - dev->out_new = key_ctrl_queue[key_ctrl_queue_start] | 0x200; - key_ctrl_queue_start = (key_ctrl_queue_start + 1) & 0xf; + if (dev->out_new == -1 && !(dev->status & STAT_OFULL) && key_ctrl_queue_start != key_ctrl_queue_end) { + kbd_log("ATkbc: %02X on channel 0\n", key_ctrl_queue[key_ctrl_queue_start]); + dev->out_new = key_ctrl_queue[key_ctrl_queue_start] | 0x200; + key_ctrl_queue_start = (key_ctrl_queue_start + 1) & 0xf; } else if (!(dev->status & STAT_OFULL) && dev->out_new == -1 && dev->out_delayed != -1) { - kbd_log("ATkbc: %02X delayed on channel %i\n", dev->out_delayed & 0xff, channels[(dev->out_delayed >> 8) & 0x03]); - dev->out_new = dev->out_delayed; - dev->out_delayed = -1; + kbd_log("ATkbc: %02X delayed on channel %i\n", dev->out_delayed & 0xff, channels[(dev->out_delayed >> 8) & 0x03]); + dev->out_new = dev->out_delayed; + dev->out_delayed = -1; } else if (!(dev->status & STAT_OFULL) && dev->out_new == -1 && mouse_queue_start != mouse_queue_end) { - kbd_log("ATkbc: %02X on channel 2\n", mouse_queue[mouse_queue_start]); - dev->out_new = mouse_queue[mouse_queue_start] | 0x100; - mouse_queue_start = (mouse_queue_start + 1) & 0xf; + kbd_log("ATkbc: %02X on channel 2\n", mouse_queue[mouse_queue_start]); + dev->out_new = mouse_queue[mouse_queue_start] | 0x100; + mouse_queue_start = (mouse_queue_start + 1) & 0xf; } else if (!(dev->status & STAT_OFULL) && dev->out_new == -1 && !(dev->mem[0] & 0x10) && key_queue_start != key_queue_end) { - kbd_log("ATkbc: %02X on channel 1\n", key_queue[key_queue_start]); - dev->out_new = key_queue[key_queue_start]; - key_queue_start = (key_queue_start + 1) & 0xf; + kbd_log("ATkbc: %02X on channel 1\n", key_queue[key_queue_start]); + dev->out_new = key_queue[key_queue_start]; + key_queue_start = (key_queue_start + 1) & 0xf; } if (dev->reset_delay) { - dev->reset_delay--; - if (!dev->reset_delay) { - kbd_log("ATkbc: Sending AA on keyboard reset...\n"); - add_data_kbd_direct(dev, 0xaa); - } + dev->reset_delay--; + if (!dev->reset_delay) { + kbd_log("ATkbc: Sending AA on keyboard reset...\n"); + add_data_kbd_direct(dev, 0xaa); + } } } - static void add_data(atkbd_t *dev, uint8_t val) { @@ -809,56 +796,54 @@ add_data(atkbd_t *dev, uint8_t val) kbc_queue_add(dev, val, 0, 0x00); if (!(dev->out_new & 0x300)) { - dev->out_delayed = dev->out_new; - dev->out_new = -1; + dev->out_delayed = dev->out_new; + dev->out_new = -1; } } - static void add_data_vals(atkbd_t *dev, uint8_t *val, uint8_t len) { - int xt_mode = (keyboard_mode & 0x20) && ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF); + int xt_mode = (keyboard_mode & 0x20) && ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF); int translate = (keyboard_mode & 0x40); int i; uint8_t or = 0; uint8_t send; if (dev->reset_delay) - return; + return; translate = translate || (keyboard_mode & 0x40) || xt_mode; translate = translate || ((dev->flags & KBC_TYPE_MASK) == KBC_TYPE_PS2_2); for (i = 0; i < len; i++) { if (translate) { - if (val[i] == 0xf0) { - or = 0x80; - continue; - } - send = nont_to_t[val[i]] | or; - if (or == 0x80) - or = 0; - } else - send = val[i]; + if (val[i] == 0xf0) { + or = 0x80; + continue; + } + send = nont_to_t[val[i]] | or ; + if (or == 0x80) + or = 0; + } else + send = val[i]; - add_data_kbd_queue(dev, 0, send); + add_data_kbd_queue(dev, 0, send); } } - static void add_data_kbd(uint16_t val) { - atkbd_t *dev = SavedKbd; - int xt_mode = (keyboard_mode & 0x20) && ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF); - int translate = (keyboard_mode & 0x40); - uint8_t fake_shift[4]; - uint8_t num_lock = 0, shift_states = 0; - uint8_t kbc_ven = dev->flags & KBC_VEN_MASK; + atkbd_t *dev = SavedKbd; + int xt_mode = (keyboard_mode & 0x20) && ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF); + int translate = (keyboard_mode & 0x40); + uint8_t fake_shift[4]; + uint8_t num_lock = 0, shift_states = 0; + uint8_t kbc_ven = dev->flags & KBC_VEN_MASK; if (dev->reset_delay) - return; + return; translate = translate || (keyboard_mode & 0x40) || xt_mode; translate = translate || ((dev->flags & KBC_TYPE_MASK) == KBC_TYPE_PS2_2); @@ -868,191 +853,235 @@ add_data_kbd(uint16_t val) /* Allow for scan code translation. */ if (translate && (val == 0xf0)) { - kbd_log("ATkbd: translate is on, F0 prefix detected\n"); - sc_or = 0x80; - return; + kbd_log("ATkbd: translate is on, F0 prefix detected\n"); + sc_or = 0x80; + return; } /* Skip break code if translated make code has bit 7 set. */ if (translate && (sc_or == 0x80) && (val & 0x80)) { - kbd_log("ATkbd: translate is on, skipping scan code: %02X (original: F0 %02X)\n", nont_to_t[val], val); - sc_or = 0; - return; + kbd_log("ATkbd: translate is on, skipping scan code: %02X (original: F0 %02X)\n", nont_to_t[val], val); + sc_or = 0; + return; } /* Test for T3100E 'Fn' key (Right Alt / Right Ctrl) */ - if ((dev != NULL) && (kbc_ven == KBC_VEN_TOSHIBA) && - (keyboard_recv(0xb8) || keyboard_recv(0x9d))) switch (val) { - case 0x4f: t3100e_notify_set(0x01); break; /* End */ - case 0x50: t3100e_notify_set(0x02); break; /* Down */ - case 0x51: t3100e_notify_set(0x03); break; /* PgDn */ - case 0x52: t3100e_notify_set(0x04); break; /* Ins */ - case 0x53: t3100e_notify_set(0x05); break; /* Del */ - case 0x54: t3100e_notify_set(0x06); break; /* SysRQ */ - case 0x45: t3100e_notify_set(0x07); break; /* NumLock */ - case 0x46: t3100e_notify_set(0x08); break; /* ScrLock */ - case 0x47: t3100e_notify_set(0x09); break; /* Home */ - case 0x48: t3100e_notify_set(0x0a); break; /* Up */ - case 0x49: t3100e_notify_set(0x0b); break; /* PgUp */ - case 0x4A: t3100e_notify_set(0x0c); break; /* Keypad -*/ - case 0x4B: t3100e_notify_set(0x0d); break; /* Left */ - case 0x4C: t3100e_notify_set(0x0e); break; /* KP 5 */ - case 0x4D: t3100e_notify_set(0x0f); break; /* Right */ - } + if ((dev != NULL) && (kbc_ven == KBC_VEN_TOSHIBA) && (keyboard_recv(0xb8) || keyboard_recv(0x9d))) + switch (val) { + case 0x4f: + t3100e_notify_set(0x01); + break; /* End */ + case 0x50: + t3100e_notify_set(0x02); + break; /* Down */ + case 0x51: + t3100e_notify_set(0x03); + break; /* PgDn */ + case 0x52: + t3100e_notify_set(0x04); + break; /* Ins */ + case 0x53: + t3100e_notify_set(0x05); + break; /* Del */ + case 0x54: + t3100e_notify_set(0x06); + break; /* SysRQ */ + case 0x45: + t3100e_notify_set(0x07); + break; /* NumLock */ + case 0x46: + t3100e_notify_set(0x08); + break; /* ScrLock */ + case 0x47: + t3100e_notify_set(0x09); + break; /* Home */ + case 0x48: + t3100e_notify_set(0x0a); + break; /* Up */ + case 0x49: + t3100e_notify_set(0x0b); + break; /* PgUp */ + case 0x4A: + t3100e_notify_set(0x0c); + break; /* Keypad -*/ + case 0x4B: + t3100e_notify_set(0x0d); + break; /* Left */ + case 0x4C: + t3100e_notify_set(0x0e); + break; /* KP 5 */ + case 0x4D: + t3100e_notify_set(0x0f); + break; /* Right */ + } kbd_log("ATkbd: translate is %s, ", translate ? "on" : "off"); - switch(val) { - case FAKE_LSHIFT_ON: - kbd_log("fake left shift on, scan code: "); - if (num_lock) { - if (shift_states) { - kbd_log("N/A (one or both shifts on)\n"); - break; - } else { - /* Num lock on and no shifts are pressed, send non-inverted fake shift. */ - switch(keyboard_mode & 0x02) { - case 1: - fake_shift[0] = 0xe0; fake_shift[1] = 0x2a; - add_data_vals(dev, fake_shift, 2); - break; + switch (val) { + case FAKE_LSHIFT_ON: + kbd_log("fake left shift on, scan code: "); + if (num_lock) { + if (shift_states) { + kbd_log("N/A (one or both shifts on)\n"); + break; + } else { + /* Num lock on and no shifts are pressed, send non-inverted fake shift. */ + switch (keyboard_mode & 0x02) { + case 1: + fake_shift[0] = 0xe0; + fake_shift[1] = 0x2a; + add_data_vals(dev, fake_shift, 2); + break; - case 2: - fake_shift[0] = 0xe0; fake_shift[1] = 0x12; - add_data_vals(dev, fake_shift, 2); - break; + case 2: + fake_shift[0] = 0xe0; + fake_shift[1] = 0x12; + add_data_vals(dev, fake_shift, 2); + break; - default: - kbd_log("N/A (scan code set %i)\n", keyboard_mode & 0x02); - break; - } - } - } else { - if (shift_states & STATE_LSHIFT) { - /* Num lock off and left shift pressed. */ - switch(keyboard_mode & 0x02) { - case 1: - fake_shift[0] = 0xe0; fake_shift[1] = 0xaa; - add_data_vals(dev, fake_shift, 2); - break; + default: + kbd_log("N/A (scan code set %i)\n", keyboard_mode & 0x02); + break; + } + } + } else { + if (shift_states & STATE_LSHIFT) { + /* Num lock off and left shift pressed. */ + switch (keyboard_mode & 0x02) { + case 1: + fake_shift[0] = 0xe0; + fake_shift[1] = 0xaa; + add_data_vals(dev, fake_shift, 2); + break; - case 2: - fake_shift[0] = 0xe0; fake_shift[1] = 0xf0; fake_shift[2] = 0x12; - add_data_vals(dev, fake_shift, 3); - break; + case 2: + fake_shift[0] = 0xe0; + fake_shift[1] = 0xf0; + fake_shift[2] = 0x12; + add_data_vals(dev, fake_shift, 3); + break; - default: - kbd_log("N/A (scan code set %i)\n", keyboard_mode & 0x02); - break; - } - } - if (shift_states & STATE_RSHIFT) { - /* Num lock off and right shift pressed. */ - switch(keyboard_mode & 0x02) { - case 1: - fake_shift[0] = 0xe0; fake_shift[1] = 0xb6; - add_data_vals(dev, fake_shift, 2); - break; + default: + kbd_log("N/A (scan code set %i)\n", keyboard_mode & 0x02); + break; + } + } + if (shift_states & STATE_RSHIFT) { + /* Num lock off and right shift pressed. */ + switch (keyboard_mode & 0x02) { + case 1: + fake_shift[0] = 0xe0; + fake_shift[1] = 0xb6; + add_data_vals(dev, fake_shift, 2); + break; - case 2: - fake_shift[0] = 0xe0; fake_shift[1] = 0xf0; fake_shift[2] = 0x59; - add_data_vals(dev, fake_shift, 3); - break; + case 2: + fake_shift[0] = 0xe0; + fake_shift[1] = 0xf0; + fake_shift[2] = 0x59; + add_data_vals(dev, fake_shift, 3); + break; - default: - kbd_log("N/A (scan code set %i)\n", keyboard_mode & 0x02); - break; - } - } - kbd_log(shift_states ? "" : "N/A (both shifts off)\n"); - } - break; + default: + kbd_log("N/A (scan code set %i)\n", keyboard_mode & 0x02); + break; + } + } + kbd_log(shift_states ? "" : "N/A (both shifts off)\n"); + } + break; - case FAKE_LSHIFT_OFF: - kbd_log("fake left shift on, scan code: "); - if (num_lock) { - if (shift_states) { - kbd_log("N/A (one or both shifts on)\n"); - break; - } else { - /* Num lock on and no shifts are pressed, send non-inverted fake shift. */ - switch(keyboard_mode & 0x02) { - case 1: - fake_shift[0] = 0xe0; fake_shift[1] = 0xaa; - add_data_vals(dev, fake_shift, 2); - break; + case FAKE_LSHIFT_OFF: + kbd_log("fake left shift on, scan code: "); + if (num_lock) { + if (shift_states) { + kbd_log("N/A (one or both shifts on)\n"); + break; + } else { + /* Num lock on and no shifts are pressed, send non-inverted fake shift. */ + switch (keyboard_mode & 0x02) { + case 1: + fake_shift[0] = 0xe0; + fake_shift[1] = 0xaa; + add_data_vals(dev, fake_shift, 2); + break; - case 2: - fake_shift[0] = 0xe0; fake_shift[1] = 0xf0; fake_shift[2] = 0x12; - add_data_vals(dev, fake_shift, 3); - break; + case 2: + fake_shift[0] = 0xe0; + fake_shift[1] = 0xf0; + fake_shift[2] = 0x12; + add_data_vals(dev, fake_shift, 3); + break; - default: - kbd_log("N/A (scan code set %i)\n", keyboard_mode & 0x02); - break; - } - } - } else { - if (shift_states & STATE_LSHIFT) { - /* Num lock off and left shift pressed. */ - switch(keyboard_mode & 0x02) { - case 1: - fake_shift[0] = 0xe0; fake_shift[1] = 0x2a; - add_data_vals(dev, fake_shift, 2); - break; + default: + kbd_log("N/A (scan code set %i)\n", keyboard_mode & 0x02); + break; + } + } + } else { + if (shift_states & STATE_LSHIFT) { + /* Num lock off and left shift pressed. */ + switch (keyboard_mode & 0x02) { + case 1: + fake_shift[0] = 0xe0; + fake_shift[1] = 0x2a; + add_data_vals(dev, fake_shift, 2); + break; - case 2: - fake_shift[0] = 0xe0; fake_shift[1] = 0x12; - add_data_vals(dev, fake_shift, 2); - break; + case 2: + fake_shift[0] = 0xe0; + fake_shift[1] = 0x12; + add_data_vals(dev, fake_shift, 2); + break; - default: - kbd_log("N/A (scan code set %i)\n", keyboard_mode & 0x02); - break; - } - } - if (shift_states & STATE_RSHIFT) { - /* Num lock off and right shift pressed. */ - switch(keyboard_mode & 0x02) { - case 1: - fake_shift[0] = 0xe0; fake_shift[1] = 0x36; - add_data_vals(dev, fake_shift, 2); - break; + default: + kbd_log("N/A (scan code set %i)\n", keyboard_mode & 0x02); + break; + } + } + if (shift_states & STATE_RSHIFT) { + /* Num lock off and right shift pressed. */ + switch (keyboard_mode & 0x02) { + case 1: + fake_shift[0] = 0xe0; + fake_shift[1] = 0x36; + add_data_vals(dev, fake_shift, 2); + break; - case 2: - fake_shift[0] = 0xe0; fake_shift[1] = 0x59; - add_data_vals(dev, fake_shift, 2); - break; + case 2: + fake_shift[0] = 0xe0; + fake_shift[1] = 0x59; + add_data_vals(dev, fake_shift, 2); + break; - default: - kbd_log("N/A (scan code set %i)\n", keyboard_mode & 0x02); - break; - } - } - kbd_log(shift_states ? "" : "N/A (both shifts off)\n"); - } - break; + default: + kbd_log("N/A (scan code set %i)\n", keyboard_mode & 0x02); + break; + } + } + kbd_log(shift_states ? "" : "N/A (both shifts off)\n"); + } + break; - default: + default: #ifdef ENABLE_KEYBOARD_AT_LOG - kbd_log("scan code: "); - if (translate) { - kbd_log("%02X (original: ", (nont_to_t[val] | sc_or)); - if (sc_or == 0x80) - kbd_log("F0 "); - kbd_log("%02X)\n", val); - } else - kbd_log("%02X\n", val); + kbd_log("scan code: "); + if (translate) { + kbd_log("%02X (original: ", (nont_to_t[val] | sc_or)); + if (sc_or == 0x80) + kbd_log("F0 "); + kbd_log("%02X)\n", val); + } else + kbd_log("%02X\n", val); #endif - add_data_kbd_queue(dev, 0, translate ? (nont_to_t[val] | sc_or) : val); - break; + add_data_kbd_queue(dev, 0, translate ? (nont_to_t[val] | sc_or) : val); + break; } if (sc_or == 0x80) - sc_or = 0; + sc_or = 0; } - static void write_output(atkbd_t *dev, uint8_t val) { @@ -1061,49 +1090,48 @@ write_output(atkbd_t *dev, uint8_t val) uint8_t kbc_ven = dev->flags & KBC_VEN_MASK; if ((kbc_ven != KBC_VEN_OLIVETTI) && ((kbc_ven == KBC_VEN_AMI) || ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF))) - val |= ((dev->mem[0] << 4) & 0x10); + val |= ((dev->mem[0] << 4) & 0x10); /*IRQ 12*/ if ((old ^ val) & 0x20) { - if (val & 0x20) - picint(1 << 12); - else - picintc(1 << 12); + if (val & 0x20) + picint(1 << 12); + else + picintc(1 << 12); } /*IRQ 1*/ if ((old ^ val) & 0x10) { - if (val & 0x10) - picint(1 << 1); - else - picintc(1 << 1); + if (val & 0x10) + picint(1 << 1); + else + picintc(1 << 1); } if ((old ^ val) & 0x02) { /*A20 enable change*/ - mem_a20_key = val & 0x02; - mem_a20_recalc(); - flushmmucache(); + mem_a20_key = val & 0x02; + mem_a20_recalc(); + flushmmucache(); } /* 0 holds the CPU in the RESET state, 1 releases it. To simplify this, we just do everything on release. */ if ((old ^ val) & 0x01) { /*Reset*/ - if (! (val & 0x01)) { /* Pin 0 selected. */ - /* Pin 0 selected. */ - kbd_log("write_output(): Pulse reset!\n"); - softresetx86(); /*Pulse reset!*/ - cpu_set_edx(); - flushmmucache(); - if (kbc_ven == KBC_VEN_ALI) - smbase = 0x00030000; - } + if (!(val & 0x01)) { /* Pin 0 selected. */ + /* Pin 0 selected. */ + kbd_log("write_output(): Pulse reset!\n"); + softresetx86(); /*Pulse reset!*/ + cpu_set_edx(); + flushmmucache(); + if (kbc_ven == KBC_VEN_ALI) + smbase = 0x00030000; + } } /* Do this here to avoid an infinite reset loop. */ dev->output_port = val; } - static void write_cmd(atkbd_t *dev, uint8_t val) { @@ -1111,35 +1139,34 @@ write_cmd(atkbd_t *dev, uint8_t val) kbd_log("ATkbc: write command byte: %02X (old: %02X)\n", val, dev->mem[0]); if ((val & 1) && (dev->status & STAT_OFULL)) - dev->wantirq = 1; + dev->wantirq = 1; if (!(val & 1) && dev->wantirq) - dev->wantirq = 0; + dev->wantirq = 0; /* PS/2 type 2 keyboard controllers always force the XLAT bit to 0. */ if ((dev->flags & KBC_TYPE_MASK) == KBC_TYPE_PS2_2) { - val &= ~CCB_TRANSLATE; - dev->mem[0] &= ~CCB_TRANSLATE; + val &= ~CCB_TRANSLATE; + dev->mem[0] &= ~CCB_TRANSLATE; } /* Scan code translate ON/OFF. */ keyboard_mode &= 0x93; keyboard_mode |= (val & MODE_MASK); - kbd_log("ATkbc: keyboard interrupt is now %s\n", (val & 0x01) ? "enabled" : "disabled"); + kbd_log("ATkbc: keyboard interrupt is now %s\n", (val & 0x01) ? "enabled" : "disabled"); /* ISA AT keyboard controllers use bit 5 for keyboard mode (1 = PC/XT, 2 = AT); PS/2 (and EISA/PCI) keyboard controllers use it as the PS/2 mouse enable switch. The AMIKEY firmware apparently uses this bit for something else. */ - if ((kbc_ven == KBC_VEN_AMI) || - ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF)) { - keyboard_mode &= ~CCB_PCMODE; + if ((kbc_ven == KBC_VEN_AMI) || ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF)) { + keyboard_mode &= ~CCB_PCMODE; - kbd_log("ATkbc: mouse interrupt is now %s\n", (val & 0x02) ? "enabled" : "disabled"); + kbd_log("ATkbc: mouse interrupt is now %s\n", (val & 0x02) ? "enabled" : "disabled"); } if ((kbc_ven == KBC_VEN_AMI) || ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF)) { - /* Update the output port to mirror the KBD DIS and AUX DIS bits, if active. */ - write_output(dev, dev->output_port); + /* Update the output port to mirror the KBD DIS and AUX DIS bits, if active. */ + write_output(dev, dev->output_port); } kbd_log("Command byte now: %02X (%02X)\n", dev->mem[0], val); @@ -1147,29 +1174,26 @@ write_cmd(atkbd_t *dev, uint8_t val) dev->status = (dev->status & ~STAT_SYSFLAG) | (val & STAT_SYSFLAG); } - static void pulse_output(atkbd_t *dev, uint8_t mask) { if (mask != 0x0f) { - dev->old_output_port = dev->output_port & ~(0xf0 | mask); - kbd_log("pulse_output(): Output port now: %02X\n", dev->output_port & (0xf0 | mask)); - write_output(dev, dev->output_port & (0xf0 | mask)); - timer_set_delay_u64(&dev->pulse_cb, 6ULL * TIMER_USEC); + dev->old_output_port = dev->output_port & ~(0xf0 | mask); + kbd_log("pulse_output(): Output port now: %02X\n", dev->output_port & (0xf0 | mask)); + write_output(dev, dev->output_port & (0xf0 | mask)); + timer_set_delay_u64(&dev->pulse_cb, 6ULL * TIMER_USEC); } } - static void pulse_poll(void *priv) { - atkbd_t *dev = (atkbd_t *)priv; + atkbd_t *dev = (atkbd_t *) priv; kbd_log("pulse_poll(): Output port now: %02X\n", dev->output_port | dev->old_output_port); write_output(dev, dev->output_port | dev->old_output_port); } - static void set_enable_kbd(atkbd_t *dev, uint8_t enable) { @@ -1177,7 +1201,6 @@ set_enable_kbd(atkbd_t *dev, uint8_t enable) dev->mem[0] |= (enable ? 0x00 : 0x10); } - static void set_enable_mouse(atkbd_t *dev, uint8_t enable) { @@ -1185,434 +1208,526 @@ set_enable_mouse(atkbd_t *dev, uint8_t enable) dev->mem[0] |= (enable ? 0x00 : 0x20); } - static uint8_t write64_generic(void *priv, uint8_t val) { - atkbd_t *dev = (atkbd_t *)priv; - uint8_t current_drive, fixed_bits; - uint8_t kbc_ven = 0x0; - kbc_ven = dev->flags & KBC_VEN_MASK; - + atkbd_t *dev = (atkbd_t *) priv; + uint8_t current_drive, fixed_bits; + uint8_t kbc_ven = 0x0; + kbc_ven = dev->flags & KBC_VEN_MASK; switch (val) { - case 0xa4: /* check if password installed */ - if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) { - kbd_log("ATkbc: check if password installed\n"); - add_data(dev, 0xf1); - return 0; - } - break; + case 0xa4: /* check if password installed */ + if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) { + kbd_log("ATkbc: check if password installed\n"); + add_data(dev, 0xf1); + return 0; + } + break; - case 0xa7: /* disable mouse port */ - if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) { - kbd_log("ATkbc: disable mouse port\n"); - set_enable_mouse(dev, 0); - return 0; - } - break; + case 0xa7: /* disable mouse port */ + if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) { + kbd_log("ATkbc: disable mouse port\n"); + set_enable_mouse(dev, 0); + return 0; + } + break; - case 0xa8: /*Enable mouse port*/ - if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) { - kbd_log("ATkbc: enable mouse port\n"); - set_enable_mouse(dev, 1); - return 0; - } - break; + case 0xa8: /*Enable mouse port*/ + if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) { + kbd_log("ATkbc: enable mouse port\n"); + set_enable_mouse(dev, 1); + return 0; + } + break; - case 0xa9: /*Test mouse port*/ - kbd_log("ATkbc: test mouse port\n"); - if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) { - add_data(dev, 0x00); /* no error, this is testing the channel 2 interface */ - return 0; - } - break; + case 0xa9: /*Test mouse port*/ + kbd_log("ATkbc: test mouse port\n"); + if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) { + add_data(dev, 0x00); /* no error, this is testing the channel 2 interface */ + return 0; + } + break; - case 0xaf: /* read keyboard version */ - kbd_log("ATkbc: read keyboard version\n"); - add_data(dev, 0x00); - return 0; + case 0xaf: /* read keyboard version */ + kbd_log("ATkbc: read keyboard version\n"); + add_data(dev, 0x00); + return 0; - case 0xc0: /* read input port */ - kbd_log("ATkbc: read input port\n"); - fixed_bits = 4; - /* The SMM handlers of Intel AMI Pentium BIOS'es expect bit 6 to be set. */ - if (kbc_ven == KBC_VEN_INTEL_AMI) - fixed_bits |= 0x40; - if (kbc_ven == KBC_VEN_IBM_PS1) { - current_drive = fdc_get_current_drive(); - add_to_kbc_queue_front(dev, dev->input_port | fixed_bits | (fdd_is_525(current_drive) ? 0x40 : 0x00), - 0, 0x00); - dev->input_port = ((dev->input_port + 1) & 3) | - (dev->input_port & 0xfc) | - (fdd_is_525(current_drive) ? 0x40 : 0x00); - } else if (kbc_ven == KBC_VEN_NCR) { - /* switch settings - * bit 7: keyboard disable - * bit 6: display type (0 color, 1 mono) - * bit 5: power-on default speed (0 high, 1 low) - * bit 4: sense RAM size (0 unsupported, 1 512k on system board) - * bit 3: coprocessor detect - * bit 2: unused - * bit 1: high/auto speed - * bit 0: dma mode - */ - add_to_kbc_queue_front(dev, (dev->input_port | fixed_bits | (video_is_mda() ? 0x40 : 0x00) | (hasfpu ? 0x08 : 0x00)) & 0xdf, - 0, 0x00); - dev->input_port = ((dev->input_port + 1) & 3) | - (dev->input_port & 0xfc); - } else { - if (((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) && - ((dev->flags & KBC_VEN_MASK) != KBC_VEN_INTEL_AMI)) + case 0xc0: /* read input port */ + kbd_log("ATkbc: read input port\n"); + fixed_bits = 4; + /* The SMM handlers of Intel AMI Pentium BIOS'es expect bit 6 to be set. */ + if (kbc_ven == KBC_VEN_INTEL_AMI) + fixed_bits |= 0x40; + if (kbc_ven == KBC_VEN_IBM_PS1) { + current_drive = fdc_get_current_drive(); + add_to_kbc_queue_front(dev, dev->input_port | fixed_bits | (fdd_is_525(current_drive) ? 0x40 : 0x00), + 0, 0x00); + dev->input_port = ((dev->input_port + 1) & 3) | (dev->input_port & 0xfc) | (fdd_is_525(current_drive) ? 0x40 : 0x00); + } else if (kbc_ven == KBC_VEN_NCR) { + /* switch settings + * bit 7: keyboard disable + * bit 6: display type (0 color, 1 mono) + * bit 5: power-on default speed (0 high, 1 low) + * bit 4: sense RAM size (0 unsupported, 1 512k on system board) + * bit 3: coprocessor detect + * bit 2: unused + * bit 1: high/auto speed + * bit 0: dma mode + */ + add_to_kbc_queue_front(dev, (dev->input_port | fixed_bits | (video_is_mda() ? 0x40 : 0x00) | (hasfpu ? 0x08 : 0x00)) & 0xdf, + 0, 0x00); + dev->input_port = ((dev->input_port + 1) & 3) | (dev->input_port & 0xfc); + } else { + if (((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) && ((dev->flags & KBC_VEN_MASK) != KBC_VEN_INTEL_AMI)) #if 0 add_to_kbc_queue_front(dev, (dev->input_port | fixed_bits) & (((dev->flags & KBC_VEN_MASK) == KBC_VEN_ACER) ? 0xeb : 0xef), 0, 0x00); #else - add_to_kbc_queue_front(dev, ((dev->input_port | fixed_bits) & 0xf0) | (((dev->flags & KBC_VEN_MASK) == KBC_VEN_ACER) ? 0x08 : 0x0c), 0, 0x00); + add_to_kbc_queue_front(dev, ((dev->input_port | fixed_bits) & 0xf0) | (((dev->flags & KBC_VEN_MASK) == KBC_VEN_ACER) ? 0x08 : 0x0c), 0, 0x00); #endif - else - add_to_kbc_queue_front(dev, dev->input_port | fixed_bits, 0, 0x00); - dev->input_port = ((dev->input_port + 1) & 3) | - (dev->input_port & 0xfc); - } - return 0; + else add_to_kbc_queue_front(dev, dev->input_port | fixed_bits, 0, 0x00); + dev->input_port = ((dev->input_port + 1) & 3) | (dev->input_port & 0xfc); + } + return 0; - case 0xd3: /* write mouse output buffer */ - if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) { - kbd_log("ATkbc: write mouse output buffer\n"); - dev->want60 = 1; - return 0; - } - break; + case 0xd3: /* write mouse output buffer */ + if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) { + kbd_log("ATkbc: write mouse output buffer\n"); + dev->want60 = 1; + return 0; + } + break; - case 0xd4: /* write to mouse */ - kbd_log("ATkbc: write to mouse\n"); - dev->want60 = 1; - return 0; + case 0xd4: /* write to mouse */ + kbd_log("ATkbc: write to mouse\n"); + dev->want60 = 1; + return 0; - case 0xf0: case 0xf1: case 0xf2: case 0xf3: - case 0xf4: case 0xf5: case 0xf6: case 0xf7: - case 0xf8: case 0xf9: case 0xfa: case 0xfb: - case 0xfc: case 0xfd: case 0xfe: case 0xff: - kbd_log("ATkbc: pulse %01X\n", val & 0x0f); - pulse_output(dev, val & 0x0f); - return 0; + case 0xf0: + case 0xf1: + case 0xf2: + case 0xf3: + case 0xf4: + case 0xf5: + case 0xf6: + case 0xf7: + case 0xf8: + case 0xf9: + case 0xfa: + case 0xfb: + case 0xfc: + case 0xfd: + case 0xfe: + case 0xff: + kbd_log("ATkbc: pulse %01X\n", val & 0x0f); + pulse_output(dev, val & 0x0f); + return 0; } kbd_log("ATkbc: bad command %02X\n", val); return 1; } - static uint8_t write60_ami(void *priv, uint8_t val) { - atkbd_t *dev = (atkbd_t *)priv; + atkbd_t *dev = (atkbd_t *) priv; - switch(dev->command) { - /* 0x40 - 0x5F are aliases for 0x60-0x7F */ - case 0x40: case 0x41: case 0x42: case 0x43: - case 0x44: case 0x45: case 0x46: case 0x47: - case 0x48: case 0x49: case 0x4a: case 0x4b: - case 0x4c: case 0x4d: case 0x4e: case 0x4f: - case 0x50: case 0x51: case 0x52: case 0x53: - case 0x54: case 0x55: case 0x56: case 0x57: - case 0x58: case 0x59: case 0x5a: case 0x5b: - case 0x5c: case 0x5d: case 0x5e: case 0x5f: - kbd_log("ATkbc: AMI - alias write to %08X\n", dev->command); - dev->mem[dev->command & 0x1f] = val; - if (dev->command == 0x60) - write_cmd(dev, val); - return 0; + switch (dev->command) { + /* 0x40 - 0x5F are aliases for 0x60-0x7F */ + case 0x40: + case 0x41: + case 0x42: + case 0x43: + case 0x44: + case 0x45: + case 0x46: + case 0x47: + case 0x48: + case 0x49: + case 0x4a: + case 0x4b: + case 0x4c: + case 0x4d: + case 0x4e: + case 0x4f: + case 0x50: + case 0x51: + case 0x52: + case 0x53: + case 0x54: + case 0x55: + case 0x56: + case 0x57: + case 0x58: + case 0x59: + case 0x5a: + case 0x5b: + case 0x5c: + case 0x5d: + case 0x5e: + case 0x5f: + kbd_log("ATkbc: AMI - alias write to %08X\n", dev->command); + dev->mem[dev->command & 0x1f] = val; + if (dev->command == 0x60) + write_cmd(dev, val); + return 0; - case 0xaf: /* set extended controller RAM */ - kbd_log("ATkbc: AMI - set extended controller RAM\n"); - if (dev->secr_phase == 1) { - dev->mem_addr = val; - dev->want60 = 1; - dev->secr_phase = 2; - } else if (dev->secr_phase == 2) { - dev->mem[dev->mem_addr] = val; - dev->secr_phase = 0; - } - return 0; + case 0xaf: /* set extended controller RAM */ + kbd_log("ATkbc: AMI - set extended controller RAM\n"); + if (dev->secr_phase == 1) { + dev->mem_addr = val; + dev->want60 = 1; + dev->secr_phase = 2; + } else if (dev->secr_phase == 2) { + dev->mem[dev->mem_addr] = val; + dev->secr_phase = 0; + } + return 0; - case 0xc1: - kbd_log("ATkbc: AMI MegaKey - write %02X to input port\n", val); - dev->input_port = val; - return 0; + case 0xc1: + kbd_log("ATkbc: AMI MegaKey - write %02X to input port\n", val); + dev->input_port = val; + return 0; - case 0xcb: /* set keyboard mode */ - kbd_log("ATkbc: AMI - set keyboard mode\n"); - dev->ami_flags = val; - return 0; + case 0xcb: /* set keyboard mode */ + kbd_log("ATkbc: AMI - set keyboard mode\n"); + dev->ami_flags = val; + return 0; } return 1; } - static uint8_t write64_ami(void *priv, uint8_t val) { - atkbd_t *dev = (atkbd_t *)priv; - uint8_t kbc_ven = dev->flags & KBC_VEN_MASK; + atkbd_t *dev = (atkbd_t *) priv; + uint8_t kbc_ven = dev->flags & KBC_VEN_MASK; switch (val) { - case 0x00: case 0x01: case 0x02: case 0x03: - case 0x04: case 0x05: case 0x06: case 0x07: - case 0x08: case 0x09: case 0x0a: case 0x0b: - case 0x0c: case 0x0d: case 0x0e: case 0x0f: - case 0x10: case 0x11: case 0x12: case 0x13: - case 0x14: case 0x15: case 0x16: case 0x17: - case 0x18: case 0x19: case 0x1a: case 0x1b: - case 0x1c: case 0x1d: case 0x1e: case 0x1f: - kbd_log("ATkbc: AMI - alias read from %08X\n", val); - add_data(dev, dev->mem[val]); - return 0; + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x04: + case 0x05: + case 0x06: + case 0x07: + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: + case 0x10: + case 0x11: + case 0x12: + case 0x13: + case 0x14: + case 0x15: + case 0x16: + case 0x17: + case 0x18: + case 0x19: + case 0x1a: + case 0x1b: + case 0x1c: + case 0x1d: + case 0x1e: + case 0x1f: + kbd_log("ATkbc: AMI - alias read from %08X\n", val); + add_data(dev, dev->mem[val]); + return 0; - case 0x40: case 0x41: case 0x42: case 0x43: - case 0x44: case 0x45: case 0x46: case 0x47: - case 0x48: case 0x49: case 0x4a: case 0x4b: - case 0x4c: case 0x4d: case 0x4e: case 0x4f: - case 0x50: case 0x51: case 0x52: case 0x53: - case 0x54: case 0x55: case 0x56: case 0x57: - case 0x58: case 0x59: case 0x5a: case 0x5b: - case 0x5c: case 0x5d: case 0x5e: case 0x5f: - kbd_log("ATkbc: AMI - alias write to %08X\n", dev->command); - dev->want60 = 1; - return 0; + case 0x40: + case 0x41: + case 0x42: + case 0x43: + case 0x44: + case 0x45: + case 0x46: + case 0x47: + case 0x48: + case 0x49: + case 0x4a: + case 0x4b: + case 0x4c: + case 0x4d: + case 0x4e: + case 0x4f: + case 0x50: + case 0x51: + case 0x52: + case 0x53: + case 0x54: + case 0x55: + case 0x56: + case 0x57: + case 0x58: + case 0x59: + case 0x5a: + case 0x5b: + case 0x5c: + case 0x5d: + case 0x5e: + case 0x5f: + kbd_log("ATkbc: AMI - alias write to %08X\n", dev->command); + dev->want60 = 1; + return 0; - case 0xa0: /* copyright message */ - add_data(dev, 0x28); - add_data(dev, 0x00); - break; + case 0xa0: /* copyright message */ + add_data(dev, 0x28); + add_data(dev, 0x00); + break; - case 0xa1: /* get controller version */ - kbd_log("ATkbc: AMI - get controller version\n"); - if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) { - if (kbc_ven == KBC_VEN_ALI) - add_data(dev, 'F'); - else if ((dev->flags & KBC_VEN_MASK) == KBC_VEN_INTEL_AMI) - add_data(dev, '5'); - else - add_data(dev, 'H'); - } else - add_data(dev, 'F'); - return 0; + case 0xa1: /* get controller version */ + kbd_log("ATkbc: AMI - get controller version\n"); + if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) { + if (kbc_ven == KBC_VEN_ALI) + add_data(dev, 'F'); + else if ((dev->flags & KBC_VEN_MASK) == KBC_VEN_INTEL_AMI) + add_data(dev, '5'); + else + add_data(dev, 'H'); + } else + add_data(dev, 'F'); + return 0; - case 0xa2: /* clear keyboard controller lines P22/P23 */ - if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { - kbd_log("ATkbc: AMI - clear KBC lines P22 and P23\n"); - write_output(dev, dev->output_port & 0xf3); - add_data(dev, 0x00); - return 0; - } - break; + case 0xa2: /* clear keyboard controller lines P22/P23 */ + if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { + kbd_log("ATkbc: AMI - clear KBC lines P22 and P23\n"); + write_output(dev, dev->output_port & 0xf3); + add_data(dev, 0x00); + return 0; + } + break; - case 0xa3: /* set keyboard controller lines P22/P23 */ - if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { - kbd_log("ATkbc: AMI - set KBC lines P22 and P23\n"); - write_output(dev, dev->output_port | 0x0c); - add_data(dev, 0x00); - return 0; - } - break; + case 0xa3: /* set keyboard controller lines P22/P23 */ + if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { + kbd_log("ATkbc: AMI - set KBC lines P22 and P23\n"); + write_output(dev, dev->output_port | 0x0c); + add_data(dev, 0x00); + return 0; + } + break; - case 0xa4: /* write clock = low */ - if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { - kbd_log("ATkbc: AMI - write clock = low\n"); - dev->ami_stat &= 0xfe; - return 0; - } - break; + case 0xa4: /* write clock = low */ + if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { + kbd_log("ATkbc: AMI - write clock = low\n"); + dev->ami_stat &= 0xfe; + return 0; + } + break; - case 0xa5: /* write clock = high */ - if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { - kbd_log("ATkbc: AMI - write clock = high\n"); - dev->ami_stat |= 0x01; - return 0; - } - break; + case 0xa5: /* write clock = high */ + if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { + kbd_log("ATkbc: AMI - write clock = high\n"); + dev->ami_stat |= 0x01; + return 0; + } + break; - case 0xa6: /* read clock */ - if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { - kbd_log("ATkbc: AMI - read clock\n"); - add_to_kbc_queue_front(dev, (dev->ami_stat & 1) ? 0xff : 0x00, 0, 0x00); - return 0; - } - break; + case 0xa6: /* read clock */ + if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { + kbd_log("ATkbc: AMI - read clock\n"); + add_to_kbc_queue_front(dev, (dev->ami_stat & 1) ? 0xff : 0x00, 0, 0x00); + return 0; + } + break; - case 0xa7: /* write cache bad */ - if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { - kbd_log("ATkbc: AMI - write cache bad\n"); - dev->ami_stat &= 0xfd; - return 0; - } - break; + case 0xa7: /* write cache bad */ + if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { + kbd_log("ATkbc: AMI - write cache bad\n"); + dev->ami_stat &= 0xfd; + return 0; + } + break; - case 0xa8: /* write cache good */ - if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { - kbd_log("ATkbc: AMI - write cache good\n"); - dev->ami_stat |= 0x02; - return 0; - } - break; + case 0xa8: /* write cache good */ + if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { + kbd_log("ATkbc: AMI - write cache good\n"); + dev->ami_stat |= 0x02; + return 0; + } + break; - case 0xa9: /* read cache */ - if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { - kbd_log("ATkbc: AMI - read cache\n"); - add_to_kbc_queue_front(dev, (dev->ami_stat & 2) ? 0xff : 0x00, 0, 0x00); - return 0; - } - break; + case 0xa9: /* read cache */ + if ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) { + kbd_log("ATkbc: AMI - read cache\n"); + add_to_kbc_queue_front(dev, (dev->ami_stat & 2) ? 0xff : 0x00, 0, 0x00); + return 0; + } + break; - case 0xaf: /* set extended controller RAM */ - if (kbc_ven == KBC_VEN_ALI) { - kbd_log("ATkbc: Award/ALi/VIA keyboard controller revision\n"); - add_to_kbc_queue_front(dev, 0x43, 0, 0x00); - } else { - kbd_log("ATkbc: set extended controller RAM\n"); - dev->want60 = 1; - dev->secr_phase = 1; - } - return 0; + case 0xaf: /* set extended controller RAM */ + if (kbc_ven == KBC_VEN_ALI) { + kbd_log("ATkbc: Award/ALi/VIA keyboard controller revision\n"); + add_to_kbc_queue_front(dev, 0x43, 0, 0x00); + } else { + kbd_log("ATkbc: set extended controller RAM\n"); + dev->want60 = 1; + dev->secr_phase = 1; + } + return 0; - case 0xb0: case 0xb1: case 0xb2: case 0xb3: - /* set KBC lines P10-P13 (input port bits 0-3) low */ - kbd_log("ATkbc: set KBC lines P10-P13 (input port bits 0-3) low\n"); - if (!(dev->flags & DEVICE_PCI) || (val > 0xb1)) - dev->input_port &= ~(1 << (val & 0x03)); - add_data(dev, 0x00); - return 0; + case 0xb0: + case 0xb1: + case 0xb2: + case 0xb3: + /* set KBC lines P10-P13 (input port bits 0-3) low */ + kbd_log("ATkbc: set KBC lines P10-P13 (input port bits 0-3) low\n"); + if (!(dev->flags & DEVICE_PCI) || (val > 0xb1)) + dev->input_port &= ~(1 << (val & 0x03)); + add_data(dev, 0x00); + return 0; - case 0xb4: case 0xb5: - /* set KBC lines P22-P23 (output port bits 2-3) low */ - kbd_log("ATkbc: set KBC lines P22-P23 (output port bits 2-3) low\n"); - if (! (dev->flags & DEVICE_PCI)) - write_output(dev, dev->output_port & ~(4 << (val & 0x01))); - add_data(dev, 0x00); - return 0; + case 0xb4: + case 0xb5: + /* set KBC lines P22-P23 (output port bits 2-3) low */ + kbd_log("ATkbc: set KBC lines P22-P23 (output port bits 2-3) low\n"); + if (!(dev->flags & DEVICE_PCI)) + write_output(dev, dev->output_port & ~(4 << (val & 0x01))); + add_data(dev, 0x00); + return 0; - case 0xb8: case 0xb9: case 0xba: case 0xbb: - /* set KBC lines P10-P13 (input port bits 0-3) high */ - kbd_log("ATkbc: set KBC lines P10-P13 (input port bits 0-3) high\n"); - if (!(dev->flags & DEVICE_PCI) || (val > 0xb9)) { - dev->input_port |= (1 << (val & 0x03)); - add_data(dev, 0x00); - } - return 0; + case 0xb8: + case 0xb9: + case 0xba: + case 0xbb: + /* set KBC lines P10-P13 (input port bits 0-3) high */ + kbd_log("ATkbc: set KBC lines P10-P13 (input port bits 0-3) high\n"); + if (!(dev->flags & DEVICE_PCI) || (val > 0xb9)) { + dev->input_port |= (1 << (val & 0x03)); + add_data(dev, 0x00); + } + return 0; - case 0xbc: case 0xbd: - /* set KBC lines P22-P23 (output port bits 2-3) high */ - kbd_log("ATkbc: set KBC lines P22-P23 (output port bits 2-3) high\n"); - if (! (dev->flags & DEVICE_PCI)) - write_output(dev, dev->output_port | (4 << (val & 0x01))); - add_data(dev, 0x00); - return 0; + case 0xbc: + case 0xbd: + /* set KBC lines P22-P23 (output port bits 2-3) high */ + kbd_log("ATkbc: set KBC lines P22-P23 (output port bits 2-3) high\n"); + if (!(dev->flags & DEVICE_PCI)) + write_output(dev, dev->output_port | (4 << (val & 0x01))); + add_data(dev, 0x00); + return 0; - case 0xc1: /* write input port */ - kbd_log("ATkbc: AMI MegaKey - write input port\n"); - dev->want60 = 1; - return 0; + case 0xc1: /* write input port */ + kbd_log("ATkbc: AMI MegaKey - write input port\n"); + dev->want60 = 1; + return 0; - case 0xc4: - /* set KBC line P14 low */ - kbd_log("ATkbc: set KBC line P14 (input port bit 4) low\n"); - dev->input_port &= 0xef; - add_data(dev, 0x00); - return 0; - case 0xc5: - /* set KBC line P15 low */ - kbd_log("ATkbc: set KBC line P15 (input port bit 5) low\n"); - dev->input_port &= 0xdf; - add_data(dev, 0x00); - return 0; + case 0xc4: + /* set KBC line P14 low */ + kbd_log("ATkbc: set KBC line P14 (input port bit 4) low\n"); + dev->input_port &= 0xef; + add_data(dev, 0x00); + return 0; + case 0xc5: + /* set KBC line P15 low */ + kbd_log("ATkbc: set KBC line P15 (input port bit 5) low\n"); + dev->input_port &= 0xdf; + add_data(dev, 0x00); + return 0; - case 0xc8: - /* - * unblock KBC lines P22/P23 - * (allow command D1 to change bits 2/3 of the output port) - */ - kbd_log("ATkbc: AMI - unblock KBC lines P22 and P23\n"); - dev->ami_flags &= 0xfb; - return 0; + case 0xc8: + /* + * unblock KBC lines P22/P23 + * (allow command D1 to change bits 2/3 of the output port) + */ + kbd_log("ATkbc: AMI - unblock KBC lines P22 and P23\n"); + dev->ami_flags &= 0xfb; + return 0; - case 0xc9: - /* - * block KBC lines P22/P23 - * (disallow command D1 from changing bits 2/3 of the port) - */ - kbd_log("ATkbc: AMI - block KBC lines P22 and P23\n"); - dev->ami_flags |= 0x04; - return 0; + case 0xc9: + /* + * block KBC lines P22/P23 + * (disallow command D1 from changing bits 2/3 of the port) + */ + kbd_log("ATkbc: AMI - block KBC lines P22 and P23\n"); + dev->ami_flags |= 0x04; + return 0; - case 0xcc: - /* set KBC line P14 high */ - kbd_log("ATkbc: set KBC line P14 (input port bit 4) high\n"); - dev->input_port |= 0x10; - add_data(dev, 0x00); - return 0; - case 0xcd: - /* set KBC line P15 high */ - kbd_log("ATkbc: set KBC line P15 (input port bit 5) high\n"); - dev->input_port |= 0x20; - add_data(dev, 0x00); - return 0; + case 0xcc: + /* set KBC line P14 high */ + kbd_log("ATkbc: set KBC line P14 (input port bit 4) high\n"); + dev->input_port |= 0x10; + add_data(dev, 0x00); + return 0; + case 0xcd: + /* set KBC line P15 high */ + kbd_log("ATkbc: set KBC line P15 (input port bit 5) high\n"); + dev->input_port |= 0x20; + add_data(dev, 0x00); + return 0; - case 0xef: /* ??? - sent by AMI486 */ - kbd_log("ATkbc: ??? - sent by AMI486\n"); - return 0; + case 0xef: /* ??? - sent by AMI486 */ + kbd_log("ATkbc: ??? - sent by AMI486\n"); + return 0; } return write64_generic(dev, val); } - static uint8_t write64_ibm_mca(void *priv, uint8_t val) { - atkbd_t *dev = (atkbd_t *)priv; + atkbd_t *dev = (atkbd_t *) priv; switch (val) { - case 0xc1: /*Copy bits 0 to 3 of input port to status bits 4 to 7*/ - kbd_log("ATkbc: copy bits 0 to 3 of input port to status bits 4 to 7\n"); - dev->status &= 0x0f; - dev->status |= ((((dev->input_port & 0xfc) | 0x84) & 0x0f) << 4); - return 0; + case 0xc1: /*Copy bits 0 to 3 of input port to status bits 4 to 7*/ + kbd_log("ATkbc: copy bits 0 to 3 of input port to status bits 4 to 7\n"); + dev->status &= 0x0f; + dev->status |= ((((dev->input_port & 0xfc) | 0x84) & 0x0f) << 4); + return 0; - case 0xc2: /*Copy bits 4 to 7 of input port to status bits 4 to 7*/ - kbd_log("ATkbc: copy bits 4 to 7 of input port to status bits 4 to 7\n"); - dev->status &= 0x0f; - dev->status |= (((dev->input_port & 0xfc) | 0x84) & 0xf0); - return 0; + case 0xc2: /*Copy bits 4 to 7 of input port to status bits 4 to 7*/ + kbd_log("ATkbc: copy bits 4 to 7 of input port to status bits 4 to 7\n"); + dev->status &= 0x0f; + dev->status |= (((dev->input_port & 0xfc) | 0x84) & 0xf0); + return 0; - case 0xaf: - kbd_log("ATkbc: bad KBC command AF\n"); - return 1; + case 0xaf: + kbd_log("ATkbc: bad KBC command AF\n"); + return 1; - case 0xf0: case 0xf1: case 0xf2: case 0xf3: - case 0xf4: case 0xf5: case 0xf6: case 0xf7: - case 0xf8: case 0xf9: case 0xfa: case 0xfb: - case 0xfc: case 0xfd: case 0xfe: case 0xff: - kbd_log("ATkbc: pulse: %01X\n", (val & 0x03) | 0x0c); - pulse_output(dev, (val & 0x03) | 0x0c); - return 0; + case 0xf0: + case 0xf1: + case 0xf2: + case 0xf3: + case 0xf4: + case 0xf5: + case 0xf6: + case 0xf7: + case 0xf8: + case 0xf9: + case 0xfa: + case 0xfb: + case 0xfc: + case 0xfd: + case 0xfe: + case 0xff: + kbd_log("ATkbc: pulse: %01X\n", (val & 0x03) | 0x0c); + pulse_output(dev, (val & 0x03) | 0x0c); + return 0; } return write64_generic(dev, val); } - static uint8_t write60_quadtel(void *priv, uint8_t val) { - atkbd_t *dev = (atkbd_t *)priv; + atkbd_t *dev = (atkbd_t *) priv; - switch(dev->command) { - case 0xcf: /*??? - sent by MegaPC BIOS*/ - kbd_log("ATkbc: ??? - sent by MegaPC BIOS\n"); - return 0; + switch (dev->command) { + case 0xcf: /*??? - sent by MegaPC BIOS*/ + kbd_log("ATkbc: ??? - sent by MegaPC BIOS\n"); + return 0; } return 1; @@ -1621,607 +1736,672 @@ write60_quadtel(void *priv, uint8_t val) static uint8_t write64_olivetti(void *priv, uint8_t val) { - atkbd_t *dev = (atkbd_t *)priv; + atkbd_t *dev = (atkbd_t *) priv; switch (val) { - case 0x80: /* Olivetti-specific command */ - /* - * bit 7: bus expansion board present (M300) / keyboard unlocked (M290) - * bits 4-6: ??? - * bit 3: fast ram check (if inactive keyboard works erratically) - * bit 2: keyboard fuse present - * bits 0-1: ??? - */ - add_to_kbc_queue_front(dev, (0x0c | ((is386) ? 0x00 : 0x80)) & 0xdf, 0, 0x00); - dev->input_port = ((dev->input_port + 1) & 3) | - (dev->input_port & 0xfc); - return 0; - } - - return write64_generic(dev, val); -} - - -static uint8_t -write64_quadtel(void *priv, uint8_t val) -{ - atkbd_t *dev = (atkbd_t *)priv; - - switch (val) { - case 0xaf: - kbd_log("ATkbc: bad KBC command AF\n"); - return 1; - - case 0xcf: /*??? - sent by MegaPC BIOS*/ - kbd_log("ATkbc: ??? - sent by MegaPC BIOS\n"); - dev->want60 = 1; - return 0; + case 0x80: /* Olivetti-specific command */ + /* + * bit 7: bus expansion board present (M300) / keyboard unlocked (M290) + * bits 4-6: ??? + * bit 3: fast ram check (if inactive keyboard works erratically) + * bit 2: keyboard fuse present + * bits 0-1: ??? + */ + add_to_kbc_queue_front(dev, (0x0c | ((is386) ? 0x00 : 0x80)) & 0xdf, 0, 0x00); + dev->input_port = ((dev->input_port + 1) & 3) | (dev->input_port & 0xfc); + return 0; } return write64_generic(dev, val); } +static uint8_t +write64_quadtel(void *priv, uint8_t val) +{ + atkbd_t *dev = (atkbd_t *) priv; + + switch (val) { + case 0xaf: + kbd_log("ATkbc: bad KBC command AF\n"); + return 1; + + case 0xcf: /*??? - sent by MegaPC BIOS*/ + kbd_log("ATkbc: ??? - sent by MegaPC BIOS\n"); + dev->want60 = 1; + return 0; + } + + return write64_generic(dev, val); +} static uint8_t write60_toshiba(void *priv, uint8_t val) { - atkbd_t *dev = (atkbd_t *)priv; + atkbd_t *dev = (atkbd_t *) priv; - switch(dev->command) { - case 0xb6: /* T3100e - set color/mono switch */ - kbd_log("ATkbc: T3100e - set color/mono switch\n"); - t3100e_mono_set(val); - return 0; + switch (dev->command) { + case 0xb6: /* T3100e - set color/mono switch */ + kbd_log("ATkbc: T3100e - set color/mono switch\n"); + t3100e_mono_set(val); + return 0; } return 1; } - static uint8_t write64_toshiba(void *priv, uint8_t val) { - atkbd_t *dev = (atkbd_t *)priv; + atkbd_t *dev = (atkbd_t *) priv; switch (val) { - case 0xaf: - kbd_log("ATkbc: bad KBC command AF\n"); - return 1; + case 0xaf: + kbd_log("ATkbc: bad KBC command AF\n"); + return 1; - case 0xb0: /* T3100e: Turbo on */ - kbd_log("ATkbc: T3100e: Turbo on\n"); - t3100e_turbo_set(1); - return 0; + case 0xb0: /* T3100e: Turbo on */ + kbd_log("ATkbc: T3100e: Turbo on\n"); + t3100e_turbo_set(1); + return 0; - case 0xb1: /* T3100e: Turbo off */ - kbd_log("ATkbc: T3100e: Turbo off\n"); - t3100e_turbo_set(0); - return 0; + case 0xb1: /* T3100e: Turbo off */ + kbd_log("ATkbc: T3100e: Turbo off\n"); + t3100e_turbo_set(0); + return 0; - case 0xb2: /* T3100e: Select external display */ - kbd_log("ATkbc: T3100e: Select external display\n"); - t3100e_display_set(0x00); - return 0; + case 0xb2: /* T3100e: Select external display */ + kbd_log("ATkbc: T3100e: Select external display\n"); + t3100e_display_set(0x00); + return 0; - case 0xb3: /* T3100e: Select internal display */ - kbd_log("ATkbc: T3100e: Select internal display\n"); - t3100e_display_set(0x01); - return 0; + case 0xb3: /* T3100e: Select internal display */ + kbd_log("ATkbc: T3100e: Select internal display\n"); + t3100e_display_set(0x01); + return 0; - case 0xb4: /* T3100e: Get configuration / status */ - kbd_log("ATkbc: T3100e: Get configuration / status\n"); - add_data(dev, t3100e_config_get()); - return 0; + case 0xb4: /* T3100e: Get configuration / status */ + kbd_log("ATkbc: T3100e: Get configuration / status\n"); + add_data(dev, t3100e_config_get()); + return 0; - case 0xb5: /* T3100e: Get colour / mono byte */ - kbd_log("ATkbc: T3100e: Get colour / mono byte\n"); - add_data(dev, t3100e_mono_get()); - return 0; + case 0xb5: /* T3100e: Get colour / mono byte */ + kbd_log("ATkbc: T3100e: Get colour / mono byte\n"); + add_data(dev, t3100e_mono_get()); + return 0; - case 0xb6: /* T3100e: Set colour / mono byte */ - kbd_log("ATkbc: T3100e: Set colour / mono byte\n"); - dev->want60 = 1; - return 0; + case 0xb6: /* T3100e: Set colour / mono byte */ + kbd_log("ATkbc: T3100e: Set colour / mono byte\n"); + dev->want60 = 1; + return 0; - case 0xb7: /* T3100e: Emulate PS/2 keyboard */ - case 0xb8: /* T3100e: Emulate AT keyboard */ - dev->flags &= ~KBC_TYPE_MASK; - if (val == 0xb7) { - kbd_log("ATkbc: T3100e: Emulate PS/2 keyboard\n"); - dev->flags |= KBC_TYPE_PS2_NOREF; - } else { - kbd_log("ATkbc: T3100e: Emulate AT keyboard\n"); - dev->flags |= KBC_TYPE_ISA; - } - return 0; + case 0xb7: /* T3100e: Emulate PS/2 keyboard */ + case 0xb8: /* T3100e: Emulate AT keyboard */ + dev->flags &= ~KBC_TYPE_MASK; + if (val == 0xb7) { + kbd_log("ATkbc: T3100e: Emulate PS/2 keyboard\n"); + dev->flags |= KBC_TYPE_PS2_NOREF; + } else { + kbd_log("ATkbc: T3100e: Emulate AT keyboard\n"); + dev->flags |= KBC_TYPE_ISA; + } + return 0; - case 0xbb: /* T3100e: Read 'Fn' key. - Return it for right Ctrl and right Alt; on the real - T3100e, these keystrokes could only be generated - using 'Fn'. */ - kbd_log("ATkbc: T3100e: Read 'Fn' key\n"); - if (keyboard_recv(0xb8) || /* Right Alt */ - keyboard_recv(0x9d)) /* Right Ctrl */ - add_data(dev, 0x04); - else add_data(dev, 0x00); - return 0; + case 0xbb: /* T3100e: Read 'Fn' key. + Return it for right Ctrl and right Alt; on the real + T3100e, these keystrokes could only be generated + using 'Fn'. */ + kbd_log("ATkbc: T3100e: Read 'Fn' key\n"); + if (keyboard_recv(0xb8) || /* Right Alt */ + keyboard_recv(0x9d)) /* Right Ctrl */ + add_data(dev, 0x04); + else + add_data(dev, 0x00); + return 0; - case 0xbc: /* T3100e: Reset Fn+Key notification */ - kbd_log("ATkbc: T3100e: Reset Fn+Key notification\n"); - t3100e_notify_set(0x00); - return 0; + case 0xbc: /* T3100e: Reset Fn+Key notification */ + kbd_log("ATkbc: T3100e: Reset Fn+Key notification\n"); + t3100e_notify_set(0x00); + return 0; - case 0xc0: /*Read input port*/ - kbd_log("ATkbc: read input port\n"); - - /* The T3100e returns all bits set except bit 6 which - * is set by t3100e_mono_set() */ - dev->input_port = (t3100e_mono_get() & 1) ? 0xff : 0xbf; - add_data(dev, dev->input_port); - return 0; + case 0xc0: /*Read input port*/ + kbd_log("ATkbc: read input port\n"); + /* The T3100e returns all bits set except bit 6 which + * is set by t3100e_mono_set() */ + dev->input_port = (t3100e_mono_get() & 1) ? 0xff : 0xbf; + add_data(dev, dev->input_port); + return 0; } return write64_generic(dev, val); } - static void kbd_write(uint16_t port, uint8_t val, void *priv) { - atkbd_t *dev = (atkbd_t *)priv; - int i = 0, bad = 1; - uint8_t mask, kbc_ven = dev->flags & KBC_VEN_MASK; + atkbd_t *dev = (atkbd_t *) priv; + int i = 0, bad = 1; + uint8_t mask, kbc_ven = dev->flags & KBC_VEN_MASK; switch (port) { - case 0x60: - dev->status &= ~STAT_CD; - if (dev->want60) { - /* Write data to controller. */ - dev->want60 = 0; + case 0x60: + dev->status &= ~STAT_CD; + if (dev->want60) { + /* Write data to controller. */ + dev->want60 = 0; - switch (dev->command) { - case 0x60: case 0x61: case 0x62: case 0x63: - case 0x64: case 0x65: case 0x66: case 0x67: - case 0x68: case 0x69: case 0x6a: case 0x6b: - case 0x6c: case 0x6d: case 0x6e: case 0x6f: - case 0x70: case 0x71: case 0x72: case 0x73: - case 0x74: case 0x75: case 0x76: case 0x77: - case 0x78: case 0x79: case 0x7a: case 0x7b: - case 0x7c: case 0x7d: case 0x7e: case 0x7f: - dev->mem[dev->command & 0x1f] = val; - if (dev->command == 0x60) - write_cmd(dev, val); - break; + switch (dev->command) { + case 0x60: + case 0x61: + case 0x62: + case 0x63: + case 0x64: + case 0x65: + case 0x66: + case 0x67: + case 0x68: + case 0x69: + case 0x6a: + case 0x6b: + case 0x6c: + case 0x6d: + case 0x6e: + case 0x6f: + case 0x70: + case 0x71: + case 0x72: + case 0x73: + case 0x74: + case 0x75: + case 0x76: + case 0x77: + case 0x78: + case 0x79: + case 0x7a: + case 0x7b: + case 0x7c: + case 0x7d: + case 0x7e: + case 0x7f: + dev->mem[dev->command & 0x1f] = val; + if (dev->command == 0x60) + write_cmd(dev, val); + break; - case 0xd1: /* write output port */ - kbd_log("ATkbc: write output port\n"); - /* Bit 2 of AMI flags is P22-P23 blocked (1 = yes, 0 = no), - discovered by reverse-engineering the AOpeN Vi15G BIOS. */ - if (dev->ami_flags & 0x04) { - /*If keyboard controller lines P22-P23 are blocked, - we force them to remain unchanged.*/ - val &= ~0x0c; - val |= (dev->output_port & 0x0c); - } - write_output(dev, val); - break; + case 0xd1: /* write output port */ + kbd_log("ATkbc: write output port\n"); + /* Bit 2 of AMI flags is P22-P23 blocked (1 = yes, 0 = no), + discovered by reverse-engineering the AOpeN Vi15G BIOS. */ + if (dev->ami_flags & 0x04) { + /*If keyboard controller lines P22-P23 are blocked, + we force them to remain unchanged.*/ + val &= ~0x0c; + val |= (dev->output_port & 0x0c); + } + write_output(dev, val); + break; - case 0xd2: /* write to keyboard output buffer */ - kbd_log("ATkbc: write to keyboard output buffer\n"); - add_to_kbc_queue_front(dev, val, 0, 0x00); - break; + case 0xd2: /* write to keyboard output buffer */ + kbd_log("ATkbc: write to keyboard output buffer\n"); + add_to_kbc_queue_front(dev, val, 0, 0x00); + break; - case 0xd3: /* write to mouse output buffer */ - kbd_log("ATkbc: write to mouse output buffer\n"); - if (mouse_write && ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF)) - keyboard_at_adddata_mouse(val); - break; + case 0xd3: /* write to mouse output buffer */ + kbd_log("ATkbc: write to mouse output buffer\n"); + if (mouse_write && ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF)) + keyboard_at_adddata_mouse(val); + break; - case 0xd4: /* write to mouse */ - kbd_log("ATkbc: write to mouse (%02X)\n", val); + case 0xd4: /* write to mouse */ + kbd_log("ATkbc: write to mouse (%02X)\n", val); - if (val == 0xbb) - break; + if (val == 0xbb) + break; - if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) { - set_enable_mouse(dev, 1); - if (mouse_write) - mouse_write(val, mouse_p); - else - add_to_kbc_queue_front(dev, 0xfe, 2, 0x40); - } - break; + if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) { + set_enable_mouse(dev, 1); + if (mouse_write) + mouse_write(val, mouse_p); + else + add_to_kbc_queue_front(dev, 0xfe, 2, 0x40); + } + break; - default: - /* - * Run the vendor-specific handler - * if we have one. Otherwise, or if - * it returns an error, log a bad - * controller command. - */ - if (dev->write60_ven) - bad = dev->write60_ven(dev, val); + default: + /* + * Run the vendor-specific handler + * if we have one. Otherwise, or if + * it returns an error, log a bad + * controller command. + */ + if (dev->write60_ven) + bad = dev->write60_ven(dev, val); - if (bad) { - kbd_log("ATkbc: bad controller command %02x data %02x\n", dev->command, val); - add_data_kbd(0xfe); - } - } - } else { - /* Write data to keyboard. */ - dev->mem[0] &= ~0x10; + if (bad) { + kbd_log("ATkbc: bad controller command %02x data %02x\n", dev->command, val); + add_data_kbd(0xfe); + } + } + } else { + /* Write data to keyboard. */ + dev->mem[0] &= ~0x10; - if (dev->key_wantdata) { - dev->key_wantdata = 0; + if (dev->key_wantdata) { + dev->key_wantdata = 0; - /* - * Several system BIOSes and OS device drivers - * mess up with this, and repeat the command - * code many times. Fun! - */ - if (val == dev->key_command) { - /* Respond NAK and ignore it. */ - add_data_kbd(0xfe); - dev->key_command = 0x00; - break; - } + /* + * Several system BIOSes and OS device drivers + * mess up with this, and repeat the command + * code many times. Fun! + */ + if (val == dev->key_command) { + /* Respond NAK and ignore it. */ + add_data_kbd(0xfe); + dev->key_command = 0x00; + break; + } - switch (dev->key_command) { - case 0xed: /* set/reset LEDs */ - add_data_kbd_direct(dev, 0xfa); - kbd_log("ATkbd: set LEDs [%02x]\n", val); - break; + switch (dev->key_command) { + case 0xed: /* set/reset LEDs */ + add_data_kbd_direct(dev, 0xfa); + kbd_log("ATkbd: set LEDs [%02x]\n", val); + break; - case 0xf0: /* get/set scancode set */ - add_data_kbd_direct(dev, 0xfa); - if (val == 0) { - kbd_log("Get scan code set: %02X\n", keyboard_mode & 3); - add_data_kbd_direct(dev, keyboard_mode & 3); - } else { - if ((val <= 3) && (val != 1)) { - keyboard_mode &= 0xfc; - keyboard_mode |= (val & 3); - kbd_log("Scan code set now: %02X\n", val); - } - set_scancode_map(dev); - } - break; + case 0xf0: /* get/set scancode set */ + add_data_kbd_direct(dev, 0xfa); + if (val == 0) { + kbd_log("Get scan code set: %02X\n", keyboard_mode & 3); + add_data_kbd_direct(dev, keyboard_mode & 3); + } else { + if ((val <= 3) && (val != 1)) { + keyboard_mode &= 0xfc; + keyboard_mode |= (val & 3); + kbd_log("Scan code set now: %02X\n", val); + } + set_scancode_map(dev); + } + break; - case 0xf3: /* set typematic rate/delay */ - add_data_kbd_direct(dev, 0xfa); - break; + case 0xf3: /* set typematic rate/delay */ + add_data_kbd_direct(dev, 0xfa); + break; - default: - kbd_log("ATkbd: bad keyboard 0060 write %02X command %02X\n", val, dev->key_command); - add_data_kbd_direct(dev, 0xfe); - break; - } + default: + kbd_log("ATkbd: bad keyboard 0060 write %02X command %02X\n", val, dev->key_command); + add_data_kbd_direct(dev, 0xfe); + break; + } - /* Keyboard command is now done. */ - dev->key_command = 0x00; - } else { - /* No keyboard command in progress. */ - dev->key_command = 0x00; + /* Keyboard command is now done. */ + dev->key_command = 0x00; + } else { + /* No keyboard command in progress. */ + dev->key_command = 0x00; - set_enable_kbd(dev, 1); + set_enable_kbd(dev, 1); - switch (val) { - case 0x00: - kbd_log("ATkbd: command 00\n"); - add_data_kbd_direct(dev, 0xfa); - break; + switch (val) { + case 0x00: + kbd_log("ATkbd: command 00\n"); + add_data_kbd_direct(dev, 0xfa); + break; - case 0x05: /*??? - sent by NT 4.0*/ - kbd_log("ATkbd: command 05 (NT 4.0)\n"); - add_data_kbd_direct(dev, 0xfe); - break; + case 0x05: /*??? - sent by NT 4.0*/ + kbd_log("ATkbd: command 05 (NT 4.0)\n"); + add_data_kbd_direct(dev, 0xfe); + break; - /* Sent by Pentium-era AMI BIOS'es.*/ - case 0x71: case 0x82: - kbd_log("ATkbd: Pentium-era AMI BIOS command %02X\n", val); - break; + /* Sent by Pentium-era AMI BIOS'es.*/ + case 0x71: + case 0x82: + kbd_log("ATkbd: Pentium-era AMI BIOS command %02X\n", val); + break; - case 0xed: /* set/reset LEDs */ - kbd_log("ATkbd: set/reset leds\n"); - add_data_kbd_direct(dev, 0xfa); + case 0xed: /* set/reset LEDs */ + kbd_log("ATkbd: set/reset leds\n"); + add_data_kbd_direct(dev, 0xfa); - dev->key_wantdata = 1; - break; + dev->key_wantdata = 1; + break; - case 0xee: /* diagnostic echo */ - kbd_log("ATkbd: ECHO\n"); - add_data_kbd_direct(dev, 0xee); - break; + case 0xee: /* diagnostic echo */ + kbd_log("ATkbd: ECHO\n"); + add_data_kbd_direct(dev, 0xee); + break; - case 0xef: /* NOP (reserved for future use) */ - kbd_log("ATkbd: NOP\n"); - break; + case 0xef: /* NOP (reserved for future use) */ + kbd_log("ATkbd: NOP\n"); + break; - case 0xf0: /* get/set scan code set */ - kbd_log("ATkbd: scan code set\n"); - add_data_kbd_direct(dev, 0xfa); - dev->key_wantdata = 1; - break; + case 0xf0: /* get/set scan code set */ + kbd_log("ATkbd: scan code set\n"); + add_data_kbd_direct(dev, 0xfa); + dev->key_wantdata = 1; + break; - case 0xf2: /* read ID */ - /* Fixed as translation will be done in add_data_kbd(). */ - kbd_log("ATkbd: read keyboard id\n"); - /* TODO: After keyboard type selection is implemented, make this - return the correct keyboard ID for the selected type. */ - add_data_kbd_direct(dev, 0xfa); - add_data_kbd_direct(dev, 0xab); - add_data_kbd_direct(dev, 0x83); - break; + case 0xf2: /* read ID */ + /* Fixed as translation will be done in add_data_kbd(). */ + kbd_log("ATkbd: read keyboard id\n"); + /* TODO: After keyboard type selection is implemented, make this + return the correct keyboard ID for the selected type. */ + add_data_kbd_direct(dev, 0xfa); + add_data_kbd_direct(dev, 0xab); + add_data_kbd_direct(dev, 0x83); + break; - case 0xf3: /* set typematic rate/delay */ - kbd_log("ATkbd: set typematic rate/delay\n"); - add_data_kbd_direct(dev, 0xfa); - dev->key_wantdata = 1; - break; + case 0xf3: /* set typematic rate/delay */ + kbd_log("ATkbd: set typematic rate/delay\n"); + add_data_kbd_direct(dev, 0xfa); + dev->key_wantdata = 1; + break; - case 0xf4: /* enable keyboard */ - kbd_log("ATkbd: enable keyboard\n"); - add_data_kbd_direct(dev, 0xfa); - keyboard_scan = 1; - break; + case 0xf4: /* enable keyboard */ + kbd_log("ATkbd: enable keyboard\n"); + add_data_kbd_direct(dev, 0xfa); + keyboard_scan = 1; + break; - case 0xf5: /* set defaults and disable keyboard */ - case 0xf6: /* set defaults */ - kbd_log("ATkbd: set defaults%s\n", (val == 0xf6) ? "" : " and disable keyboard"); - keyboard_scan = (val == 0xf6); - kbd_log("val = %02X, keyboard_scan = %i, dev->mem[0] = %02X\n", - val, keyboard_scan, dev->mem[0]); - add_data_kbd_direct(dev, 0xfa); + case 0xf5: /* set defaults and disable keyboard */ + case 0xf6: /* set defaults */ + kbd_log("ATkbd: set defaults%s\n", (val == 0xf6) ? "" : " and disable keyboard"); + keyboard_scan = (val == 0xf6); + kbd_log("val = %02X, keyboard_scan = %i, dev->mem[0] = %02X\n", + val, keyboard_scan, dev->mem[0]); + add_data_kbd_direct(dev, 0xfa); - keyboard_set3_all_break = 0; - keyboard_set3_all_repeat = 0; - memset(keyboard_set3_flags, 0, 512); - keyboard_mode = (keyboard_mode & 0xfc) | 0x02; - set_scancode_map(dev); - break; + keyboard_set3_all_break = 0; + keyboard_set3_all_repeat = 0; + memset(keyboard_set3_flags, 0, 512); + keyboard_mode = (keyboard_mode & 0xfc) | 0x02; + set_scancode_map(dev); + break; - case 0xf7: /* set all keys to repeat */ - kbd_log("ATkbd: set all keys to repeat\n"); - add_data_kbd_direct(dev, 0xfa); - keyboard_set3_all_break = 1; - break; + case 0xf7: /* set all keys to repeat */ + kbd_log("ATkbd: set all keys to repeat\n"); + add_data_kbd_direct(dev, 0xfa); + keyboard_set3_all_break = 1; + break; - case 0xf8: /* set all keys to give make/break codes */ - kbd_log("ATkbd: set all keys to give make/break codes\n"); - add_data_kbd_direct(dev, 0xfa); - keyboard_set3_all_break = 1; - break; + case 0xf8: /* set all keys to give make/break codes */ + kbd_log("ATkbd: set all keys to give make/break codes\n"); + add_data_kbd_direct(dev, 0xfa); + keyboard_set3_all_break = 1; + break; - case 0xf9: /* set all keys to give make codes only */ - kbd_log("ATkbd: set all keys to give make codes only\n"); - add_data_kbd_direct(dev, 0xfa); - keyboard_set3_all_break = 0; - break; + case 0xf9: /* set all keys to give make codes only */ + kbd_log("ATkbd: set all keys to give make codes only\n"); + add_data_kbd_direct(dev, 0xfa); + keyboard_set3_all_break = 0; + break; - case 0xfa: /* set all keys to repeat and give make/break codes */ - kbd_log("ATkbd: set all keys to repeat and give make/break codes\n"); - add_data_kbd_direct(dev, 0xfa); - keyboard_set3_all_repeat = 1; - keyboard_set3_all_break = 1; - break; + case 0xfa: /* set all keys to repeat and give make/break codes */ + kbd_log("ATkbd: set all keys to repeat and give make/break codes\n"); + add_data_kbd_direct(dev, 0xfa); + keyboard_set3_all_repeat = 1; + keyboard_set3_all_break = 1; + break; - case 0xfe: /* resend last scan code */ - kbd_log("ATkbd: reset last scan code\n"); - add_data_kbd_raw(dev, kbd_last_scan_code); - break; + case 0xfe: /* resend last scan code */ + kbd_log("ATkbd: reset last scan code\n"); + add_data_kbd_raw(dev, kbd_last_scan_code); + break; - case 0xff: /* reset */ - kbd_log("ATkbd: kbd reset\n"); - kbc_queue_reset(1); - kbd_last_scan_code = 0x00; - add_data_kbd_direct(dev, 0xfa); + case 0xff: /* reset */ + kbd_log("ATkbd: kbd reset\n"); + kbc_queue_reset(1); + kbd_last_scan_code = 0x00; + add_data_kbd_direct(dev, 0xfa); - /* Set scan code set to 2. */ - keyboard_mode = (keyboard_mode & 0xfc) | 0x02; - set_scancode_map(dev); + /* Set scan code set to 2. */ + keyboard_mode = (keyboard_mode & 0xfc) | 0x02; + set_scancode_map(dev); - dev->reset_delay = RESET_DELAY_TIME; - break; + dev->reset_delay = RESET_DELAY_TIME; + break; - default: - kbd_log("ATkbd: bad keyboard command %02X\n", val); - add_data_kbd_direct(dev, 0xfe); - } + default: + kbd_log("ATkbd: bad keyboard command %02X\n", val); + add_data_kbd_direct(dev, 0xfe); + } - /* If command needs data, remember command. */ - if (dev->key_wantdata == 1) - dev->key_command = val; - } - } - break; + /* If command needs data, remember command. */ + if (dev->key_wantdata == 1) + dev->key_command = val; + } + } + break; - case 0x64: - /* Controller command. */ - dev->want60 = 0; - dev->status |= STAT_CD; + case 0x64: + /* Controller command. */ + dev->want60 = 0; + dev->status |= STAT_CD; - switch (val) { - /* Read data from KBC memory. */ - case 0x20: case 0x21: case 0x22: case 0x23: - case 0x24: case 0x25: case 0x26: case 0x27: - case 0x28: case 0x29: case 0x2a: case 0x2b: - case 0x2c: case 0x2d: case 0x2e: case 0x2f: - case 0x30: case 0x31: case 0x32: case 0x33: - case 0x34: case 0x35: case 0x36: case 0x37: - case 0x38: case 0x39: case 0x3a: case 0x3b: - case 0x3c: case 0x3d: case 0x3e: case 0x3f: - add_data(dev, dev->mem[val & 0x1f]); - break; + switch (val) { + /* Read data from KBC memory. */ + case 0x20: + case 0x21: + case 0x22: + case 0x23: + case 0x24: + case 0x25: + case 0x26: + case 0x27: + case 0x28: + case 0x29: + case 0x2a: + case 0x2b: + case 0x2c: + case 0x2d: + case 0x2e: + case 0x2f: + case 0x30: + case 0x31: + case 0x32: + case 0x33: + case 0x34: + case 0x35: + case 0x36: + case 0x37: + case 0x38: + case 0x39: + case 0x3a: + case 0x3b: + case 0x3c: + case 0x3d: + case 0x3e: + case 0x3f: + add_data(dev, dev->mem[val & 0x1f]); + break; - /* Write data to KBC memory. */ - case 0x60: case 0x61: case 0x62: case 0x63: - case 0x64: case 0x65: case 0x66: case 0x67: - case 0x68: case 0x69: case 0x6a: case 0x6b: - case 0x6c: case 0x6d: case 0x6e: case 0x6f: - case 0x70: case 0x71: case 0x72: case 0x73: - case 0x74: case 0x75: case 0x76: case 0x77: - case 0x78: case 0x79: case 0x7a: case 0x7b: - case 0x7c: case 0x7d: case 0x7e: case 0x7f: - dev->want60 = 1; - break; + /* Write data to KBC memory. */ + case 0x60: + case 0x61: + case 0x62: + case 0x63: + case 0x64: + case 0x65: + case 0x66: + case 0x67: + case 0x68: + case 0x69: + case 0x6a: + case 0x6b: + case 0x6c: + case 0x6d: + case 0x6e: + case 0x6f: + case 0x70: + case 0x71: + case 0x72: + case 0x73: + case 0x74: + case 0x75: + case 0x76: + case 0x77: + case 0x78: + case 0x79: + case 0x7a: + case 0x7b: + case 0x7c: + case 0x7d: + case 0x7e: + case 0x7f: + dev->want60 = 1; + break; - case 0xaa: /* self-test */ - kbd_log("ATkbc: self-test\n"); - if ((kbc_ven == KBC_VEN_TOSHIBA) || (kbc_ven == KBC_VEN_SAMSUNG)) - dev->status |= STAT_IFULL; - write_output(dev, ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) ? 0x4b : 0xcf); + case 0xaa: /* self-test */ + kbd_log("ATkbc: self-test\n"); + if ((kbc_ven == KBC_VEN_TOSHIBA) || (kbc_ven == KBC_VEN_SAMSUNG)) + dev->status |= STAT_IFULL; + write_output(dev, ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) ? 0x4b : 0xcf); - /* Always reinitialize all queues - the real hardware pulls keyboard and mouse - clocks high, which stops keyboard scanning. */ - kbd_log("ATkbc: self-test reinitialization\n"); - dev->out_new = dev->out_delayed = -1; - for (i = 0; i < 3; i++) - kbc_queue_reset(i); - kbd_last_scan_code = 0x00; - dev->status &= ~STAT_OFULL; - dev->last_irq = dev->old_last_irq = 0; + /* Always reinitialize all queues - the real hardware pulls keyboard and mouse + clocks high, which stops keyboard scanning. */ + kbd_log("ATkbc: self-test reinitialization\n"); + dev->out_new = dev->out_delayed = -1; + for (i = 0; i < 3; i++) + kbc_queue_reset(i); + kbd_last_scan_code = 0x00; + dev->status &= ~STAT_OFULL; + dev->last_irq = dev->old_last_irq = 0; - if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) - write_cmd(dev, 0x30 | STAT_SYSFLAG); - else - write_cmd(dev, 0x10 | STAT_SYSFLAG); - add_data(dev, 0x55); - break; + if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) + write_cmd(dev, 0x30 | STAT_SYSFLAG); + else + write_cmd(dev, 0x10 | STAT_SYSFLAG); + add_data(dev, 0x55); + break; - case 0xab: /* interface test */ - kbd_log("ATkbc: interface test\n"); - add_data(dev, 0x00); /*no error*/ - break; + case 0xab: /* interface test */ + kbd_log("ATkbc: interface test\n"); + add_data(dev, 0x00); /*no error*/ + break; - case 0xac: /* diagnostic dump */ - kbd_log("ATkbc: diagnostic dump\n"); - for (i = 0; i < 16; i++) - add_data(dev, dev->mem[i]); - add_data(dev, (dev->input_port & 0xf0) | 0x80); - add_data(dev, dev->output_port); - add_data(dev, dev->status); - break; + case 0xac: /* diagnostic dump */ + kbd_log("ATkbc: diagnostic dump\n"); + for (i = 0; i < 16; i++) + add_data(dev, dev->mem[i]); + add_data(dev, (dev->input_port & 0xf0) | 0x80); + add_data(dev, dev->output_port); + add_data(dev, dev->status); + break; - case 0xad: /* disable keyboard */ - kbd_log("ATkbc: disable keyboard\n"); - set_enable_kbd(dev, 0); - break; + case 0xad: /* disable keyboard */ + kbd_log("ATkbc: disable keyboard\n"); + set_enable_kbd(dev, 0); + break; - case 0xae: /* enable keyboard */ - kbd_log("ATkbc: enable keyboard\n"); - set_enable_kbd(dev, 1); - break; + case 0xae: /* enable keyboard */ + kbd_log("ATkbc: enable keyboard\n"); + set_enable_kbd(dev, 1); + break; - case 0xca: /* read keyboard mode */ - kbd_log("ATkbc: AMI - read keyboard mode\n"); - add_data(dev, dev->ami_flags); - break; + case 0xca: /* read keyboard mode */ + kbd_log("ATkbc: AMI - read keyboard mode\n"); + add_data(dev, dev->ami_flags); + break; - case 0xcb: /* set keyboard mode */ - kbd_log("ATkbc: AMI - set keyboard mode\n"); - dev->want60 = 1; - break; + case 0xcb: /* set keyboard mode */ + kbd_log("ATkbc: AMI - set keyboard mode\n"); + dev->want60 = 1; + break; - case 0xd0: /* read output port */ - kbd_log("ATkbc: read output port\n"); - mask = 0xff; - if ((kbc_ven != KBC_VEN_OLIVETTI) && ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) && (dev->mem[0] & 0x10)) - mask &= 0xbf; - add_to_kbc_queue_front(dev, dev->output_port & mask, 0, 0x00); - break; + case 0xd0: /* read output port */ + kbd_log("ATkbc: read output port\n"); + mask = 0xff; + if ((kbc_ven != KBC_VEN_OLIVETTI) && ((dev->flags & KBC_TYPE_MASK) < KBC_TYPE_PS2_NOREF) && (dev->mem[0] & 0x10)) + mask &= 0xbf; + add_to_kbc_queue_front(dev, dev->output_port & mask, 0, 0x00); + break; - case 0xd1: /* write output port */ - kbd_log("ATkbc: write output port\n"); - dev->want60 = 1; - break; + case 0xd1: /* write output port */ + kbd_log("ATkbc: write output port\n"); + dev->want60 = 1; + break; - case 0xd2: /* write keyboard output buffer */ - kbd_log("ATkbc: write keyboard output buffer\n"); - dev->want60 = 1; - break; + case 0xd2: /* write keyboard output buffer */ + kbd_log("ATkbc: write keyboard output buffer\n"); + dev->want60 = 1; + break; - case 0xdd: /* disable A20 address line */ - case 0xdf: /* enable A20 address line */ - kbd_log("ATkbc: %sable A20\n", (val == 0xdd) ? "dis": "en"); - write_output(dev, (dev->output_port & 0xfd) | (val & 0x02)); - break; + case 0xdd: /* disable A20 address line */ + case 0xdf: /* enable A20 address line */ + kbd_log("ATkbc: %sable A20\n", (val == 0xdd) ? "dis" : "en"); + write_output(dev, (dev->output_port & 0xfd) | (val & 0x02)); + break; - case 0xe0: /* read test inputs */ - kbd_log("ATkbc: read test inputs\n"); - add_data(dev, 0x00); - break; + case 0xe0: /* read test inputs */ + kbd_log("ATkbc: read test inputs\n"); + add_data(dev, 0x00); + break; - default: - /* - * Unrecognized controller command. - * - * If we have a vendor-specific handler, run - * that. Otherwise, or if that handler fails, - * log a bad command. - */ - if (dev->write64_ven) - bad = dev->write64_ven(dev, val); + default: + /* + * Unrecognized controller command. + * + * If we have a vendor-specific handler, run + * that. Otherwise, or if that handler fails, + * log a bad command. + */ + if (dev->write64_ven) + bad = dev->write64_ven(dev, val); - kbd_log(bad ? "ATkbc: bad controller command %02X\n" : "", val); - } + kbd_log(bad ? "ATkbc: bad controller command %02X\n" : "", val); + } - /* If the command needs data, remember the command. */ - if (dev->want60) - dev->command = val; - break; + /* If the command needs data, remember the command. */ + if (dev->want60) + dev->command = val; + break; } } - static uint8_t kbd_read(uint16_t port, void *priv) { - atkbd_t *dev = (atkbd_t *)priv; - uint8_t ret = 0xff; - uint8_t kbc_ven = 0x0; - kbc_ven = dev->flags & KBC_VEN_MASK; + atkbd_t *dev = (atkbd_t *) priv; + uint8_t ret = 0xff; + uint8_t kbc_ven = 0x0; + kbc_ven = dev->flags & KBC_VEN_MASK; if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) - cycles -= ISA_CYCLES(8); + cycles -= ISA_CYCLES(8); switch (port) { - case 0x60: - ret = dev->out; - dev->status &= ~STAT_OFULL; - picintc(dev->last_irq); - dev->last_irq = 0; - break; + case 0x60: + ret = dev->out; + dev->status &= ~STAT_OFULL; + picintc(dev->last_irq); + dev->last_irq = 0; + break; - case 0x64: - ret = (dev->status & 0xfb); - if (dev->mem[0] & STAT_SYSFLAG) - ret |= STAT_SYSFLAG; - /* Only clear the transmit timeout flag on non-PS/2 controllers, as on - PS/2 controller, it is the keyboard/mouse output source bit. */ - // dev->status &= ~STAT_RTIMEOUT; - if (((dev->flags & KBC_TYPE_MASK) > KBC_TYPE_PS2_NOREF) && - (kbc_ven != KBC_VEN_IBM_MCA)) - dev->status &= ~STAT_TTIMEOUT; - break; + case 0x64: + ret = (dev->status & 0xfb); + if (dev->mem[0] & STAT_SYSFLAG) + ret |= STAT_SYSFLAG; + /* Only clear the transmit timeout flag on non-PS/2 controllers, as on + PS/2 controller, it is the keyboard/mouse output source bit. */ + // dev->status &= ~STAT_RTIMEOUT; + if (((dev->flags & KBC_TYPE_MASK) > KBC_TYPE_PS2_NOREF) && (kbc_ven != KBC_VEN_IBM_MCA)) + dev->status &= ~STAT_TTIMEOUT; + break; - default: - kbd_log("ATkbc: read(%04x) invalid!\n", port); - break; + default: + kbd_log("ATkbc: read(%04x) invalid!\n", port); + break; } kbd_log((port == 0x61) ? "" : "ATkbc: read(%04X) = %02X\n", port, ret); - return(ret); + return (ret); } - static void kbd_reset(void *priv) { - atkbd_t *dev = (atkbd_t *)priv; - int i; - uint8_t kbc_ven = dev->flags & KBC_VEN_MASK; + atkbd_t *dev = (atkbd_t *) priv; + int i; + uint8_t kbc_ven = dev->flags & KBC_VEN_MASK; dev->first_write = 1; // dev->status = STAT_UNLOCKED | STAT_CD; @@ -2231,14 +2411,14 @@ kbd_reset(void *priv) dev->wantirq = 0; write_output(dev, 0xcf); dev->last_irq = dev->old_last_irq = 0; - dev->secr_phase = 0; - dev->key_wantdata = 0; + dev->secr_phase = 0; + dev->key_wantdata = 0; /* Set up the correct Video Type bits. */ if ((kbc_ven == KBC_VEN_XI8088) || (kbc_ven == KBC_VEN_ACER)) - dev->input_port = video_is_mda() ? 0xb0 : 0xf0; + dev->input_port = video_is_mda() ? 0xb0 : 0xf0; else - dev->input_port = video_is_mda() ? 0xf0 : 0xb0; + dev->input_port = video_is_mda() ? 0xf0 : 0xb0; kbd_log("ATkbc: input port = %02x\n", dev->input_port); keyboard_mode = 0x02 | (dev->mem[0] & CCB_TRANSLATE); @@ -2251,7 +2431,7 @@ kbd_reset(void *priv) dev->out_new = dev->out_delayed = -1; for (i = 0; i < 3; i++) - kbc_queue_reset(i); + kbc_queue_reset(i); kbd_last_scan_code = 0; sc_or = 0; @@ -2264,7 +2444,6 @@ kbd_reset(void *priv) dev->ami_stat |= 0x02; } - /* Reset the AT keyboard - this is needed for the PCI TRC and is done until a better solution is found. */ void @@ -2273,11 +2452,10 @@ keyboard_at_reset(void) kbd_reset(SavedKbd); } - static void kbd_close(void *priv) { - atkbd_t *dev = (atkbd_t *)priv; + atkbd_t *dev = (atkbd_t *) priv; kbd_reset(dev); @@ -2294,13 +2472,12 @@ kbd_close(void *priv) free(dev); } - static void * kbd_init(const device_t *info) { atkbd_t *dev; - dev = (atkbd_t *)malloc(sizeof(atkbd_t)); + dev = (atkbd_t *) malloc(sizeof(atkbd_t)); memset(dev, 0x00, sizeof(atkbd_t)); dev->flags = info->local; @@ -2318,350 +2495,349 @@ kbd_init(const device_t *info) dev->write60_ven = NULL; dev->write64_ven = NULL; - switch(dev->flags & KBC_VEN_MASK) { - case KBC_VEN_ACER: - case KBC_VEN_GENERIC: - case KBC_VEN_NCR: - case KBC_VEN_IBM_PS1: - case KBC_VEN_XI8088: - dev->write64_ven = write64_generic; - break; + switch (dev->flags & KBC_VEN_MASK) { + case KBC_VEN_ACER: + case KBC_VEN_GENERIC: + case KBC_VEN_NCR: + case KBC_VEN_IBM_PS1: + case KBC_VEN_XI8088: + dev->write64_ven = write64_generic; + break; - case KBC_VEN_OLIVETTI: - dev->write64_ven = write64_olivetti; - break; + case KBC_VEN_OLIVETTI: + dev->write64_ven = write64_olivetti; + break; - case KBC_VEN_AMI: - case KBC_VEN_INTEL_AMI: - case KBC_VEN_SAMSUNG: - case KBC_VEN_ALI: - dev->write60_ven = write60_ami; - dev->write64_ven = write64_ami; - break; + case KBC_VEN_AMI: + case KBC_VEN_INTEL_AMI: + case KBC_VEN_SAMSUNG: + case KBC_VEN_ALI: + dev->write60_ven = write60_ami; + dev->write64_ven = write64_ami; + break; - case KBC_VEN_IBM_MCA: - dev->write64_ven = write64_ibm_mca; - break; + case KBC_VEN_IBM_MCA: + dev->write64_ven = write64_ibm_mca; + break; - case KBC_VEN_QUADTEL: - dev->write60_ven = write60_quadtel; - dev->write64_ven = write64_quadtel; - break; + case KBC_VEN_QUADTEL: + dev->write60_ven = write60_quadtel; + dev->write64_ven = write64_quadtel; + break; - case KBC_VEN_TOSHIBA: - dev->write60_ven = write60_toshiba; - dev->write64_ven = write64_toshiba; - break; + case KBC_VEN_TOSHIBA: + dev->write60_ven = write60_toshiba; + dev->write64_ven = write64_toshiba; + break; } /* We need this, sadly. */ SavedKbd = dev; - return(dev); + return (dev); } const device_t keyboard_at_device = { - .name = "PC/AT Keyboard", + .name = "PC/AT Keyboard", .internal_name = "keyboard_at", - .flags = 0, - .local = KBC_TYPE_ISA | KBC_VEN_GENERIC, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBC_TYPE_ISA | KBC_VEN_GENERIC, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_at_ami_device = { - .name = "PC/AT Keyboard (AMI)", + .name = "PC/AT Keyboard (AMI)", .internal_name = "keyboard_at_ami", - .flags = 0, - .local = KBC_TYPE_ISA | KBC_VEN_AMI, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBC_TYPE_ISA | KBC_VEN_AMI, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_at_samsung_device = { - .name = "PC/AT Keyboard (Samsung)", + .name = "PC/AT Keyboard (Samsung)", .internal_name = "keyboard_at_samsung", - .flags = 0, - .local = KBC_TYPE_ISA | KBC_VEN_SAMSUNG, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBC_TYPE_ISA | KBC_VEN_SAMSUNG, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_at_toshiba_device = { - .name = "PC/AT Keyboard (Toshiba)", + .name = "PC/AT Keyboard (Toshiba)", .internal_name = "keyboard_at_toshiba", - .flags = 0, - .local = KBC_TYPE_ISA | KBC_VEN_TOSHIBA, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBC_TYPE_ISA | KBC_VEN_TOSHIBA, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_at_olivetti_device = { - .name = "PC/AT Keyboard (Olivetti)", + .name = "PC/AT Keyboard (Olivetti)", .internal_name = "keyboard_at_olivetti", - .flags = 0, - .local = KBC_TYPE_ISA | KBC_VEN_OLIVETTI, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBC_TYPE_ISA | KBC_VEN_OLIVETTI, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_at_ncr_device = { - .name = "PC/AT Keyboard (NCR)", + .name = "PC/AT Keyboard (NCR)", .internal_name = "keyboard_at_ncr", - .flags = 0, - .local = KBC_TYPE_ISA | KBC_VEN_NCR, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBC_TYPE_ISA | KBC_VEN_NCR, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_ps2_device = { - .name = "PS/2 Keyboard", + .name = "PS/2 Keyboard", .internal_name = "keyboard_ps2", - .flags = 0, - .local = KBC_TYPE_PS2_NOREF | KBC_VEN_GENERIC, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBC_TYPE_PS2_NOREF | KBC_VEN_GENERIC, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_ps2_ps2_device = { - .name = "PS/2 Keyboard", + .name = "PS/2 Keyboard", .internal_name = "keyboard_ps2_ps2", - .flags = 0, - .local = KBC_TYPE_PS2_1 | KBC_VEN_GENERIC, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBC_TYPE_PS2_1 | KBC_VEN_GENERIC, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_ps2_ps1_device = { - .name = "PS/2 Keyboard (IBM PS/1)", + .name = "PS/2 Keyboard (IBM PS/1)", .internal_name = "keyboard_ps2_ps1", - .flags = 0, - .local = KBC_TYPE_PS2_NOREF | KBC_VEN_IBM_PS1, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBC_TYPE_PS2_NOREF | KBC_VEN_IBM_PS1, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_ps2_ps1_pci_device = { - .name = "PS/2 Keyboard (IBM PS/1)", + .name = "PS/2 Keyboard (IBM PS/1)", .internal_name = "keyboard_ps2_ps1_pci", - .flags = DEVICE_PCI, - .local = KBC_TYPE_PS2_NOREF | KBC_VEN_IBM_PS1, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = DEVICE_PCI, + .local = KBC_TYPE_PS2_NOREF | KBC_VEN_IBM_PS1, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_ps2_xi8088_device = { - .name = "PS/2 Keyboard (Xi8088)", + .name = "PS/2 Keyboard (Xi8088)", .internal_name = "keyboard_ps2_xi8088", - .flags = 0, - .local = KBC_TYPE_PS2_1 | KBC_VEN_XI8088, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBC_TYPE_PS2_1 | KBC_VEN_XI8088, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_ps2_ami_device = { - .name = "PS/2 Keyboard (AMI)", + .name = "PS/2 Keyboard (AMI)", .internal_name = "keyboard_ps2_ami", - .flags = 0, - .local = KBC_TYPE_PS2_NOREF | KBC_VEN_AMI, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBC_TYPE_PS2_NOREF | KBC_VEN_AMI, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_ps2_olivetti_device = { - .name = "PS/2 Keyboard (Olivetti)", + .name = "PS/2 Keyboard (Olivetti)", .internal_name = "keyboard_ps2_olivetti", - .flags = 0, - .local = KBC_TYPE_PS2_NOREF | KBC_VEN_OLIVETTI, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBC_TYPE_PS2_NOREF | KBC_VEN_OLIVETTI, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_ps2_mca_device = { - .name = "PS/2 Keyboard", + .name = "PS/2 Keyboard", .internal_name = "keyboard_ps2_mca", - .flags = 0, - .local = KBC_TYPE_PS2_1 | KBC_VEN_IBM_MCA, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBC_TYPE_PS2_1 | KBC_VEN_IBM_MCA, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_ps2_mca_2_device = { - .name = "PS/2 Keyboard", + .name = "PS/2 Keyboard", .internal_name = "keyboard_ps2_mca_2", - .flags = 0, - .local = KBC_TYPE_PS2_2 | KBC_VEN_IBM_MCA, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBC_TYPE_PS2_2 | KBC_VEN_IBM_MCA, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_ps2_quadtel_device = { - .name = "PS/2 Keyboard (Quadtel/MegaPC)", + .name = "PS/2 Keyboard (Quadtel/MegaPC)", .internal_name = "keyboard_ps2_quadtel", - .flags = 0, - .local = KBC_TYPE_PS2_NOREF | KBC_VEN_QUADTEL, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBC_TYPE_PS2_NOREF | KBC_VEN_QUADTEL, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_ps2_pci_device = { - .name = "PS/2 Keyboard", + .name = "PS/2 Keyboard", .internal_name = "keyboard_ps2_pci", - .flags = DEVICE_PCI, - .local = KBC_TYPE_PS2_NOREF | KBC_VEN_GENERIC, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = DEVICE_PCI, + .local = KBC_TYPE_PS2_NOREF | KBC_VEN_GENERIC, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_ps2_ami_pci_device = { - .name = "PS/2 Keyboard (AMI)", + .name = "PS/2 Keyboard (AMI)", .internal_name = "keyboard_ps2_ami_pci", - .flags = DEVICE_PCI, - .local = KBC_TYPE_PS2_NOREF | KBC_VEN_AMI, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = DEVICE_PCI, + .local = KBC_TYPE_PS2_NOREF | KBC_VEN_AMI, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_ps2_ali_pci_device = { - .name = "PS/2 Keyboard (ALi M5123/M1543C)", + .name = "PS/2 Keyboard (ALi M5123/M1543C)", .internal_name = "keyboard_ps2_ali_pci", - .flags = DEVICE_PCI, - .local = KBC_TYPE_PS2_NOREF | KBC_VEN_ALI, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = DEVICE_PCI, + .local = KBC_TYPE_PS2_NOREF | KBC_VEN_ALI, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_ps2_intel_ami_pci_device = { - .name = "PS/2 Keyboard (AMI)", + .name = "PS/2 Keyboard (AMI)", .internal_name = "keyboard_ps2_intel_ami_pci", - .flags = DEVICE_PCI, - .local = KBC_TYPE_PS2_NOREF | KBC_VEN_INTEL_AMI, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = DEVICE_PCI, + .local = KBC_TYPE_PS2_NOREF | KBC_VEN_INTEL_AMI, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_ps2_acer_pci_device = { - .name = "PS/2 Keyboard (Acer 90M002A)", + .name = "PS/2 Keyboard (Acer 90M002A)", .internal_name = "keyboard_ps2_acer_pci", - .flags = DEVICE_PCI, - .local = KBC_TYPE_PS2_NOREF | KBC_VEN_ACER, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = DEVICE_PCI, + .local = KBC_TYPE_PS2_NOREF | KBC_VEN_ACER, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; void keyboard_at_set_mouse(void (*func)(uint8_t val, void *priv), void *priv) { mouse_write = func; - mouse_p = priv; + mouse_p = priv; } - void keyboard_at_adddata_keyboard_raw(uint8_t val) { @@ -2670,7 +2846,6 @@ keyboard_at_adddata_keyboard_raw(uint8_t val) add_data_kbd_queue(dev, 0, val); } - void keyboard_at_adddata_mouse(uint8_t val) { @@ -2679,45 +2854,40 @@ keyboard_at_adddata_mouse(uint8_t val) kbc_queue_add(dev, val, 2, 0x00); } - void keyboard_at_mouse_reset(void) { kbc_queue_reset(2); } - uint8_t keyboard_at_mouse_pos(void) { return ((mouse_queue_end - mouse_queue_start) & 0xf); } - void keyboard_at_set_mouse_scan(uint8_t val) { - atkbd_t *dev = SavedKbd; - uint8_t temp_mouse_scan = val ? 1 : 0; + atkbd_t *dev = SavedKbd; + uint8_t temp_mouse_scan = val ? 1 : 0; if (temp_mouse_scan == !(dev->mem[0] & 0x20)) - return; + return; set_enable_mouse(dev, val ? 1 : 0); kbd_log("ATkbc: mouse scan %sabled via PCI\n", mouse_scan ? "en" : "dis"); } - uint8_t keyboard_at_get_mouse_scan(void) { atkbd_t *dev = SavedKbd; - return((dev->mem[0] & 0x20) ? 0x00 : 0x10); + return ((dev->mem[0] & 0x20) ? 0x00 : 0x10); } - void keyboard_at_set_a20_key(int state) { diff --git a/src/device/keyboard_xt.c b/src/device/keyboard_xt.c index d13bab56d..d3db6a467 100644 --- a/src/device/keyboard_xt.c +++ b/src/device/keyboard_xt.c @@ -45,15 +45,14 @@ #include <86box/video.h> #include <86box/keyboard.h> - -#define STAT_PARITY 0x80 -#define STAT_RTIMEOUT 0x40 -#define STAT_TTIMEOUT 0x20 -#define STAT_LOCK 0x10 -#define STAT_CD 0x08 -#define STAT_SYSFLAG 0x04 -#define STAT_IFULL 0x02 -#define STAT_OFULL 0x01 +#define STAT_PARITY 0x80 +#define STAT_RTIMEOUT 0x40 +#define STAT_TTIMEOUT 0x20 +#define STAT_LOCK 0x10 +#define STAT_CD 0x08 +#define STAT_SYSFLAG 0x04 +#define STAT_IFULL 0x02 +#define STAT_OFULL 0x01 // Keyboard Types #define KBD_TYPE_PC81 0 @@ -79,9 +78,9 @@ typedef struct { pc_timer_t send_delay_timer; } xtkbd_t; - /*XT keyboard has no escape scancodes, and no scancodes beyond 53*/ const scancode scancode_xt[512] = { + // clang-format off { {0}, {0} }, { {0x01, 0}, {0x81, 0} }, { {0x02, 0}, {0x82, 0} }, { {0x03, 0}, {0x83, 0} }, { {0x04, 0}, {0x84, 0} }, { {0x05, 0}, {0x85, 0} }, @@ -338,43 +337,42 @@ const scancode scancode_xt[512] = { { {0}, {0} }, { {0}, {0} }, /*1f8*/ { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} } /*1fc*/ + // clang-format on }; - -static uint8_t key_queue[16]; -static int key_queue_start = 0, - key_queue_end = 0; -static int is_tandy = 0, is_t1x00 = 0, - is_amstrad = 0; - +static uint8_t key_queue[16]; +static int key_queue_start = 0, + key_queue_end = 0; +static int is_tandy = 0, is_t1x00 = 0, + is_amstrad = 0; #ifdef ENABLE_KEYBOARD_XT_LOG int keyboard_xt_do_log = ENABLE_KEYBOARD_XT_LOG; - static void kbd_log(const char *fmt, ...) { va_list ap; if (keyboard_xt_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define kbd_log(fmt, ...) +# define kbd_log(fmt, ...) #endif static uint8_t -get_fdd_switch_settings() { +get_fdd_switch_settings() +{ int i, fdd_count = 0; for (i = 0; i < FDD_NUM; i++) { - if (fdd_get_flags(i)) - fdd_count++; + if (fdd_get_flags(i)) + fdd_count++; } if (!fdd_count) @@ -384,12 +382,13 @@ get_fdd_switch_settings() { } static uint8_t -get_videomode_switch_settings() { +get_videomode_switch_settings() +{ if (video_is_mda()) return 0x30; else if (video_is_cga()) - return 0x20; /* 0x10 would be 40x25 */ + return 0x20; /* 0x10 would be 40x25 */ else return 0x00; } @@ -397,307 +396,304 @@ get_videomode_switch_settings() { static void kbd_poll(void *priv) { - xtkbd_t *kbd = (xtkbd_t *)priv; + xtkbd_t *kbd = (xtkbd_t *) priv; timer_advance_u64(&kbd->send_delay_timer, 1000 * TIMER_USEC); if (!(kbd->pb & 0x40) && (kbd->type != KBD_TYPE_TANDY)) - return; + return; if (kbd->want_irq) { - kbd->want_irq = 0; - kbd->pa = kbd->key_waiting; - kbd->blocked = 1; - picint(2); + kbd->want_irq = 0; + kbd->pa = kbd->key_waiting; + kbd->blocked = 1; + picint(2); #ifdef ENABLE_KEYBOARD_XT_LOG - kbd_log("kbd_poll(): keyboard_xt : take IRQ\n"); + kbd_log("kbd_poll(): keyboard_xt : take IRQ\n"); #endif } if ((key_queue_start != key_queue_end) && !kbd->blocked) { - kbd->key_waiting = key_queue[key_queue_start]; - kbd_log("XTkbd: reading %02X from the key queue at %i\n", - kbd->key_waiting, key_queue_start); - key_queue_start = (key_queue_start + 1) & 0x0f; - kbd->want_irq = 1; + kbd->key_waiting = key_queue[key_queue_start]; + kbd_log("XTkbd: reading %02X from the key queue at %i\n", + kbd->key_waiting, key_queue_start); + key_queue_start = (key_queue_start + 1) & 0x0f; + kbd->want_irq = 1; } } - static void kbd_adddata(uint16_t val) { /* Test for T1000 'Fn' key (Right Alt / Right Ctrl) */ if (is_t1x00) { - if (keyboard_recv(0xb8) || keyboard_recv(0x9d)) { /* 'Fn' pressed */ - t1000_syskey(0x00, 0x04, 0x00); /* Set 'Fn' indicator */ - switch (val) { - case 0x45: /* Num Lock => toggle numpad */ - t1000_syskey(0x00, 0x00, 0x10); break; - case 0x47: /* Home => internal display */ - t1000_syskey(0x40, 0x00, 0x00); break; - case 0x49: /* PgDn => turbo on */ - t1000_syskey(0x80, 0x00, 0x00); break; - case 0x4D: /* Right => toggle LCD font */ - t1000_syskey(0x00, 0x00, 0x20); break; - case 0x4F: /* End => external display */ - t1000_syskey(0x00, 0x40, 0x00); break; - case 0x51: /* PgDn => turbo off */ - t1000_syskey(0x00, 0x80, 0x00); break; - case 0x54: /* SysRQ => toggle window */ - t1000_syskey(0x00, 0x00, 0x08); break; - } - } else - t1000_syskey(0x04, 0x00, 0x00); /* Reset 'Fn' indicator */ + if (keyboard_recv(0xb8) || keyboard_recv(0x9d)) { /* 'Fn' pressed */ + t1000_syskey(0x00, 0x04, 0x00); /* Set 'Fn' indicator */ + switch (val) { + case 0x45: /* Num Lock => toggle numpad */ + t1000_syskey(0x00, 0x00, 0x10); + break; + case 0x47: /* Home => internal display */ + t1000_syskey(0x40, 0x00, 0x00); + break; + case 0x49: /* PgDn => turbo on */ + t1000_syskey(0x80, 0x00, 0x00); + break; + case 0x4D: /* Right => toggle LCD font */ + t1000_syskey(0x00, 0x00, 0x20); + break; + case 0x4F: /* End => external display */ + t1000_syskey(0x00, 0x40, 0x00); + break; + case 0x51: /* PgDn => turbo off */ + t1000_syskey(0x00, 0x80, 0x00); + break; + case 0x54: /* SysRQ => toggle window */ + t1000_syskey(0x00, 0x00, 0x08); + break; + } + } else + t1000_syskey(0x04, 0x00, 0x00); /* Reset 'Fn' indicator */ } key_queue[key_queue_end] = val; kbd_log("XTkbd: %02X added to key queue at %i\n", - val, key_queue_end); + val, key_queue_end); key_queue_end = (key_queue_end + 1) & 0x0f; } - void kbd_adddata_process(uint16_t val, void (*adddata)(uint16_t val)) { uint8_t num_lock = 0, shift_states = 0; if (!adddata) - return; + return; keyboard_get_states(NULL, &num_lock, NULL); shift_states = keyboard_get_shift() & STATE_LSHIFT; if (is_amstrad) - num_lock = !num_lock; + num_lock = !num_lock; /* If NumLock is on, invert the left shift state so we can always check for the the same way flag being set (and with NumLock on that then means it is actually *NOT* set). */ if (num_lock) - shift_states ^= STATE_LSHIFT; + shift_states ^= STATE_LSHIFT; - switch(val) { - case FAKE_LSHIFT_ON: - /* If NumLock is on, fake shifts are sent when shift is *NOT* presed, - if NumLock is off, fake shifts are sent when shift is pressed. */ - if (shift_states) { - /* Send fake shift. */ - adddata(num_lock ? 0x2a : 0xaa); - } - break; - case FAKE_LSHIFT_OFF: - if (shift_states) { - /* Send fake shift. */ - adddata(num_lock ? 0xaa : 0x2a); - } - break; - default: - adddata(val); - break; + switch (val) { + case FAKE_LSHIFT_ON: + /* If NumLock is on, fake shifts are sent when shift is *NOT* presed, + if NumLock is off, fake shifts are sent when shift is pressed. */ + if (shift_states) { + /* Send fake shift. */ + adddata(num_lock ? 0x2a : 0xaa); + } + break; + case FAKE_LSHIFT_OFF: + if (shift_states) { + /* Send fake shift. */ + adddata(num_lock ? 0xaa : 0x2a); + } + break; + default: + adddata(val); + break; } } - static void kbd_adddata_ex(uint16_t val) { kbd_adddata_process(val, kbd_adddata); } - static void kbd_write(uint16_t port, uint8_t val, void *priv) { - xtkbd_t *kbd = (xtkbd_t *)priv; + xtkbd_t *kbd = (xtkbd_t *) priv; switch (port) { - case 0x61: /* Keyboard Control Register (aka Port B) */ - if (!(kbd->pb & 0x40) && (val & 0x40)) { - key_queue_start = key_queue_end = 0; - kbd->want_irq = 0; - kbd->blocked = 0; - kbd_adddata(0xaa); - } - kbd->pb = val; - ppi.pb = val; + case 0x61: /* Keyboard Control Register (aka Port B) */ + if (!(kbd->pb & 0x40) && (val & 0x40)) { + key_queue_start = key_queue_end = 0; + kbd->want_irq = 0; + kbd->blocked = 0; + kbd_adddata(0xaa); + } + kbd->pb = val; + ppi.pb = val; - timer_process(); + timer_process(); - if (((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)) && (cassette != NULL)) - pc_cas_set_motor(cassette, (kbd->pb & 0x08) == 0); + if (((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)) && (cassette != NULL)) + pc_cas_set_motor(cassette, (kbd->pb & 0x08) == 0); - speaker_update(); + speaker_update(); - speaker_gated = val & 1; - speaker_enable = val & 2; + speaker_gated = val & 1; + speaker_enable = val & 2; - if (speaker_enable) - was_speaker_enable = 1; - pit_devs[0].set_gate(pit_devs[0].data, 2, val & 1); + if (speaker_enable) + was_speaker_enable = 1; + pit_devs[0].set_gate(pit_devs[0].data, 2, val & 1); - if (val & 0x80) { - kbd->pa = 0; - kbd->blocked = 0; - picintc(2); - } + if (val & 0x80) { + kbd->pa = 0; + kbd->blocked = 0; + picintc(2); + } #ifdef ENABLE_KEYBOARD_XT_LOG - if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)) - kbd_log("Cassette motor is %s\n", !(val & 0x08) ? "ON" : "OFF"); + if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)) + kbd_log("Cassette motor is %s\n", !(val & 0x08) ? "ON" : "OFF"); #endif - break; + break; #ifdef ENABLE_KEYBOARD_XT_LOG - case 0x62: /* Switch Register (aka Port C) */ - if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)) - kbd_log("Cassette IN is %i\n", !!(val & 0x10)); - break; + case 0x62: /* Switch Register (aka Port C) */ + if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)) + kbd_log("Cassette IN is %i\n", !!(val & 0x10)); + break; #endif } } - static uint8_t kbd_read(uint16_t port, void *priv) { - xtkbd_t *kbd = (xtkbd_t *)priv; - uint8_t ret = 0xff; + xtkbd_t *kbd = (xtkbd_t *) priv; + uint8_t ret = 0xff; switch (port) { - case 0x60: /* Keyboard Data Register (aka Port A) */ - if ((kbd->pb & 0x80) && ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82) - || (kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86) - || (kbd->type == KBD_TYPE_ZENITH))) { - if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)) - ret = (kbd->pd & ~0x02) | (hasfpu ? 0x02 : 0x00); - else if ((kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86)) - ret = 0xff; /* According to Ruud on the PCem forum, this is supposed to return 0xFF on the XT. */ - else if (kbd->type == KBD_TYPE_ZENITH) { - /* Zenith Data Systems Z-151 - * SW1 switch settings: - * bits 6-7: floppy drive number - * bits 4-5: video mode - * bit 2-3: base memory size - * bit 1: fpu enable - * bit 0: fdc enable - */ - ret = get_fdd_switch_settings(); + case 0x60: /* Keyboard Data Register (aka Port A) */ + if ((kbd->pb & 0x80) && ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82) || (kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86) || (kbd->type == KBD_TYPE_ZENITH))) { + if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)) + ret = (kbd->pd & ~0x02) | (hasfpu ? 0x02 : 0x00); + else if ((kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86)) + ret = 0xff; /* According to Ruud on the PCem forum, this is supposed to return 0xFF on the XT. */ + else if (kbd->type == KBD_TYPE_ZENITH) { + /* Zenith Data Systems Z-151 + * SW1 switch settings: + * bits 6-7: floppy drive number + * bits 4-5: video mode + * bit 2-3: base memory size + * bit 1: fpu enable + * bit 0: fdc enable + */ + ret = get_fdd_switch_settings(); - ret |= get_videomode_switch_settings(); + ret |= get_videomode_switch_settings(); - /* Base memory size should always be 64k */ - ret |= 0x0c; + /* Base memory size should always be 64k */ + ret |= 0x0c; - if (hasfpu) - ret |= 0x02; - } - } else - ret = kbd->pa; - break; - - case 0x61: /* Keyboard Control Register (aka Port B) */ - ret = kbd->pb; - break; - - case 0x62: /* Switch Register (aka Port C) */ - if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)) { - if (kbd->pb & 0x04) /* PB2 */ - switch (mem_size + isa_mem_size) { - case 64: - case 48: - case 32: - case 16: - ret = 0x00; - break; - default: - ret = (((mem_size + isa_mem_size) - 64) / 32) & 0x0f; - break; + if (hasfpu) + ret |= 0x02; } - else - ret = (((mem_size + isa_mem_size) - 64) / 32) >> 4; - } else if (kbd->type == KBD_TYPE_OLIVETTI - || kbd->type == KBD_TYPE_ZENITH) { - /* Olivetti M19 or Zenith Data Systems Z-151 */ - if (kbd->pb & 0x04) /* PB2 */ - ret = kbd->pd & 0xbf; - else - ret = kbd->pd >> 4; - } else { - if (kbd->pb & 0x08) /* PB3 */ - ret = kbd->pd >> 4; - else { - /* LaserXT = Always 512k RAM; - LaserXT/3 = Bit 0: set = 512k, clear = 256k. */ + } else + ret = kbd->pa; + break; + + case 0x61: /* Keyboard Control Register (aka Port B) */ + ret = kbd->pb; + break; + + case 0x62: /* Switch Register (aka Port C) */ + if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)) { + if (kbd->pb & 0x04) /* PB2 */ + switch (mem_size + isa_mem_size) { + case 64: + case 48: + case 32: + case 16: + ret = 0x00; + break; + default: + ret = (((mem_size + isa_mem_size) - 64) / 32) & 0x0f; + break; + } + else + ret = (((mem_size + isa_mem_size) - 64) / 32) >> 4; + } else if (kbd->type == KBD_TYPE_OLIVETTI + || kbd->type == KBD_TYPE_ZENITH) { + /* Olivetti M19 or Zenith Data Systems Z-151 */ + if (kbd->pb & 0x04) /* PB2 */ + ret = kbd->pd & 0xbf; + else + ret = kbd->pd >> 4; + } else { + if (kbd->pb & 0x08) /* PB3 */ + ret = kbd->pd >> 4; + else { + /* LaserXT = Always 512k RAM; + LaserXT/3 = Bit 0: set = 512k, clear = 256k. */ #if defined(DEV_BRANCH) && defined(USE_LASERXT) - if (kbd->type == KBD_TYPE_TOSHIBA) - ret = ((mem_size == 512) ? 0x0d : 0x0c) | (hasfpu ? 0x02 : 0x00); - else + if (kbd->type == KBD_TYPE_TOSHIBA) + ret = ((mem_size == 512) ? 0x0d : 0x0c) | (hasfpu ? 0x02 : 0x00); + else #endif - ret = (kbd->pd & 0x0d) | (hasfpu ? 0x02 : 0x00); - } - } - ret |= (ppispeakon ? 0x20 : 0); + ret = (kbd->pd & 0x0d) | (hasfpu ? 0x02 : 0x00); + } + } + ret |= (ppispeakon ? 0x20 : 0); - /* This is needed to avoid error 131 (cassette error). - This is serial read: bit 5 = clock, bit 4 = data, cassette header is 256 x 0xff. */ - if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)) { - if (cassette == NULL) - ret |= (ppispeakon ? 0x10 : 0); - else - ret |= (pc_cas_get_inp(cassette) ? 0x10 : 0); - } + /* This is needed to avoid error 131 (cassette error). + This is serial read: bit 5 = clock, bit 4 = data, cassette header is 256 x 0xff. */ + if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82)) { + if (cassette == NULL) + ret |= (ppispeakon ? 0x10 : 0); + else + ret |= (pc_cas_get_inp(cassette) ? 0x10 : 0); + } - if (kbd->type == KBD_TYPE_TANDY) - ret |= (tandy1k_eeprom_read() ? 0x10 : 0); - break; + if (kbd->type == KBD_TYPE_TANDY) + ret |= (tandy1k_eeprom_read() ? 0x10 : 0); + break; - case 0x63: /* Keyboard Configuration Register (aka Port D) */ - if ((kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86) + case 0x63: /* Keyboard Configuration Register (aka Port D) */ + if ((kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86) || (kbd->type == KBD_TYPE_COMPAQ) || (kbd->type == KBD_TYPE_TOSHIBA)) - ret = kbd->pd; - break; + ret = kbd->pd; + break; } - return(ret); + return (ret); } - static void kbd_reset(void *priv) { - xtkbd_t *kbd = (xtkbd_t *)priv; + xtkbd_t *kbd = (xtkbd_t *) priv; kbd->want_irq = 0; - kbd->blocked = 0; - kbd->pa = 0x00; - kbd->pb = 0x00; + kbd->blocked = 0; + kbd->pa = 0x00; + kbd->pb = 0x00; keyboard_scan = 1; key_queue_start = 0, - key_queue_end = 0; + key_queue_end = 0; } - void keyboard_set_is_amstrad(int ams) { is_amstrad = ams; } - static void * kbd_init(const device_t *info) { xtkbd_t *kbd; - kbd = (xtkbd_t *)malloc(sizeof(xtkbd_t)); + kbd = (xtkbd_t *) malloc(sizeof(xtkbd_t)); memset(kbd, 0x00, sizeof(xtkbd_t)); io_sethandler(0x0060, 4, - kbd_read, NULL, NULL, kbd_write, NULL, NULL, kbd); + kbd_read, NULL, NULL, kbd_write, NULL, NULL, kbd); keyboard_send = kbd_adddata_ex; kbd_reset(kbd); kbd->type = info->local; @@ -707,31 +703,31 @@ kbd_init(const device_t *info) video_reset(gfxcard); if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82) - || (kbd->type == KBD_TYPE_XT82) || (kbd->type <= KBD_TYPE_XT86) - || (kbd->type == KBD_TYPE_COMPAQ) - || (kbd->type == KBD_TYPE_TOSHIBA) - || (kbd->type == KBD_TYPE_OLIVETTI)) { + || (kbd->type == KBD_TYPE_XT82) || (kbd->type <= KBD_TYPE_XT86) + || (kbd->type == KBD_TYPE_COMPAQ) + || (kbd->type == KBD_TYPE_TOSHIBA) + || (kbd->type == KBD_TYPE_OLIVETTI)) { /* DIP switch readout: bit set = OFF, clear = ON. */ if (kbd->type == KBD_TYPE_OLIVETTI) - /* Olivetti M19 - * Jumpers J1, J2 - monitor type. - * 01 - mono (high-res) - * 10 - color (low-res, disables 640x400x2 mode) - * 00 - autoswitching - */ - kbd->pd |= 0x00; - else - /* Switches 7, 8 - floppy drives. */ - kbd->pd = get_fdd_switch_settings(); + /* Olivetti M19 + * Jumpers J1, J2 - monitor type. + * 01 - mono (high-res) + * 10 - color (low-res, disables 640x400x2 mode) + * 00 - autoswitching + */ + kbd->pd |= 0x00; + else + /* Switches 7, 8 - floppy drives. */ + kbd->pd = get_fdd_switch_settings(); /* Siitches 5, 6 - video card type */ - kbd->pd |= get_videomode_switch_settings(); + kbd->pd |= get_videomode_switch_settings(); /* Switches 3, 4 - memory size. */ if ((kbd->type == KBD_TYPE_XT86) - || (kbd->type == KBD_TYPE_COMPAQ) - || (kbd->type == KBD_TYPE_TOSHIBA)) { + || (kbd->type == KBD_TYPE_COMPAQ) + || (kbd->type == KBD_TYPE_TOSHIBA)) { switch (mem_size) { case 256: kbd->pd |= 0x00; @@ -747,9 +743,9 @@ kbd_init(const device_t *info) kbd->pd |= 0x0c; break; } - } else if (kbd->type == KBD_TYPE_XT82) { + } else if (kbd->type == KBD_TYPE_XT82) { switch (mem_size) { - case 64: /* 1x64k */ + case 64: /* 1x64k */ kbd->pd |= 0x00; break; case 128: /* 2x64k */ @@ -763,7 +759,7 @@ kbd_init(const device_t *info) kbd->pd |= 0x0c; break; } - } else if (kbd->type == KBD_TYPE_PC82) { + } else if (kbd->type == KBD_TYPE_PC82) { switch (mem_size) { case 192: /* 3x64k, not supported by stock BIOS due to bugs */ kbd->pd |= 0x08; @@ -793,19 +789,19 @@ kbd_init(const device_t *info) default: kbd->pd |= 0x0c; break; - } - } + } + } /* Switch 2 - 8087 FPU. */ if (hasfpu) kbd->pd |= 0x02; - } else if (kbd-> type == KBD_TYPE_ZENITH) { + } else if (kbd->type == KBD_TYPE_ZENITH) { /* Zenith Data Systems Z-151 - * SW2 switch settings: - * bit 7: monitor frequency - * bits 5-6: autoboot (00-11 resident monitor, 10 hdd, 01 fdd) - * bits 0-4: installed memory - */ + * SW2 switch settings: + * bit 7: monitor frequency + * bits 5-6: autoboot (00-11 resident monitor, 10 hdd, 01 fdd) + * bits 0-4: installed memory + */ kbd->pd = 0x20; switch (mem_size) { case 128: @@ -848,14 +844,13 @@ kbd_init(const device_t *info) is_amstrad = 0; - return(kbd); + return (kbd); } - static void kbd_close(void *priv) { - xtkbd_t *kbd = (xtkbd_t *)priv; + xtkbd_t *kbd = (xtkbd_t *) priv; /* Stop the timer. */ timer_disable(&kbd->send_delay_timer); @@ -866,149 +861,149 @@ kbd_close(void *priv) keyboard_send = NULL; io_removehandler(0x0060, 4, - kbd_read, NULL, NULL, kbd_write, NULL, NULL, kbd); + kbd_read, NULL, NULL, kbd_write, NULL, NULL, kbd); free(kbd); } const device_t keyboard_pc_device = { - .name = "IBM PC Keyboard (1981)", + .name = "IBM PC Keyboard (1981)", .internal_name = "keyboard_pc", - .flags = 0, - .local = KBD_TYPE_PC81, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBD_TYPE_PC81, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_pc82_device = { - .name = "IBM PC Keyboard (1982)", + .name = "IBM PC Keyboard (1982)", .internal_name = "keyboard_pc82", - .flags = 0, - .local = KBD_TYPE_PC82, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBD_TYPE_PC82, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_xt_device = { - .name = "XT (1982) Keyboard", + .name = "XT (1982) Keyboard", .internal_name = "keyboard_xt", - .flags = 0, - .local = KBD_TYPE_XT82, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBD_TYPE_XT82, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_xt86_device = { - .name = "XT (1986) Keyboard", + .name = "XT (1986) Keyboard", .internal_name = "keyboard_xt86", - .flags = 0, - .local = KBD_TYPE_XT86, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBD_TYPE_XT86, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_xt_compaq_device = { - .name = "Compaq Portable Keyboard", + .name = "Compaq Portable Keyboard", .internal_name = "keyboard_xt_compaq", - .flags = 0, - .local = KBD_TYPE_COMPAQ, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBD_TYPE_COMPAQ, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_tandy_device = { - .name = "Tandy 1000 Keyboard", + .name = "Tandy 1000 Keyboard", .internal_name = "keyboard_tandy", - .flags = 0, - .local = KBD_TYPE_TANDY, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBD_TYPE_TANDY, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_xt_t1x00_device = { - .name = "Toshiba T1x00 Keyboard", + .name = "Toshiba T1x00 Keyboard", .internal_name = "keyboard_xt_t1x00", - .flags = 0, - .local = KBD_TYPE_TOSHIBA, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBD_TYPE_TOSHIBA, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; #if defined(DEV_BRANCH) && defined(USE_LASERXT) const device_t keyboard_xt_lxt3_device = { - .name = "VTech Laser XT3 Keyboard", + .name = "VTech Laser XT3 Keyboard", .internal_name = "keyboard_xt_lxt3", - .flags = 0, - .local = KBD_TYPE_VTECH, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBD_TYPE_VTECH, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; #endif const device_t keyboard_xt_olivetti_device = { - .name = "Olivetti XT Keyboard", + .name = "Olivetti XT Keyboard", .internal_name = "keyboard_xt_olivetti", - .flags = 0, - .local = KBD_TYPE_OLIVETTI, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBD_TYPE_OLIVETTI, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t keyboard_xt_zenith_device = { - .name = "Zenith XT Keyboard", + .name = "Zenith XT Keyboard", .internal_name = "keyboard_xt_zenith", - .flags = 0, - .local = KBD_TYPE_ZENITH, - .init = kbd_init, - .close = kbd_close, - .reset = kbd_reset, + .flags = 0, + .local = KBD_TYPE_ZENITH, + .init = kbd_init, + .close = kbd_close, + .reset = kbd_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/device/mouse.c b/src/device/mouse.c index 4fc9b5378..88a068e07 100644 --- a/src/device/mouse.c +++ b/src/device/mouse.c @@ -29,48 +29,46 @@ #include <86box/device.h> #include <86box/mouse.h> - typedef struct { - const device_t *device; + const device_t *device; } mouse_t; - -int mouse_type = 0; -int mouse_x, - mouse_y, - mouse_z, - mouse_buttons; +int mouse_type = 0; +int mouse_x, + mouse_y, + mouse_z, + mouse_buttons; static const device_t mouse_none_device = { - .name = "None", + .name = "None", .internal_name = "none", - .flags = 0, - .local = MOUSE_TYPE_NONE, - .init = NULL, - .close = NULL, - .reset = NULL, + .flags = 0, + .local = MOUSE_TYPE_NONE, + .init = NULL, + .close = NULL, + .reset = NULL, { .poll = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; static const device_t mouse_internal_device = { - .name = "Internal", + .name = "Internal", .internal_name = "internal", - .flags = 0, - .local = MOUSE_TYPE_INTERNAL, - .init = NULL, - .close = NULL, - .reset = NULL, + .flags = 0, + .local = MOUSE_TYPE_INTERNAL, + .init = NULL, + .close = NULL, + .reset = NULL, { .poll = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; static mouse_t mouse_devices[] = { -// clang-format off + // clang-format off { &mouse_none_device }, { &mouse_internal_device }, { &mouse_logibus_device }, @@ -83,87 +81,82 @@ static mouse_t mouse_devices[] = { { &mouse_ltserial_device }, { &mouse_ps2_device }, { NULL } -// clang-format on + // clang-format on }; - -static const device_t *mouse_curr; -static void *mouse_priv; -static int mouse_nbut; -static int (*mouse_dev_poll)(); - +static const device_t *mouse_curr; +static void *mouse_priv; +static int mouse_nbut; +static int (*mouse_dev_poll)(); #ifdef ENABLE_MOUSE_LOG int mouse_do_log = ENABLE_MOUSE_LOG; - static void mouse_log(const char *fmt, ...) { va_list ap; if (mouse_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define mouse_log(fmt, ...) +# define mouse_log(fmt, ...) #endif - /* Initialize the mouse module. */ void mouse_init(void) { /* Initialize local data. */ mouse_x = mouse_y = mouse_z = 0; - mouse_buttons = 0x00; + mouse_buttons = 0x00; - mouse_type = MOUSE_TYPE_NONE; - mouse_curr = NULL; - mouse_priv = NULL; - mouse_nbut = 0; + mouse_type = MOUSE_TYPE_NONE; + mouse_curr = NULL; + mouse_priv = NULL; + mouse_nbut = 0; mouse_dev_poll = NULL; } - void mouse_close(void) { - if (mouse_curr == NULL) return; + if (mouse_curr == NULL) + return; - mouse_curr = NULL; - mouse_priv = NULL; - mouse_nbut = 0; + mouse_curr = NULL; + mouse_priv = NULL; + mouse_nbut = 0; mouse_dev_poll = NULL; } - void mouse_reset(void) { if (mouse_curr != NULL) - return; /* Mouse already initialized. */ + return; /* Mouse already initialized. */ mouse_log("MOUSE: reset(type=%d, '%s')\n", - mouse_type, mouse_devices[mouse_type].device->name); + mouse_type, mouse_devices[mouse_type].device->name); /* Clear local data. */ mouse_x = mouse_y = mouse_z = 0; - mouse_buttons = 0x00; + mouse_buttons = 0x00; /* If no mouse configured, we're done. */ - if (mouse_type == 0) return; + if (mouse_type == 0) + return; mouse_curr = mouse_devices[mouse_type].device; if (mouse_curr != NULL) - mouse_priv = device_add(mouse_curr); + mouse_priv = device_add(mouse_curr); } - /* Callback from the hardware driver. */ void mouse_set_buttons(int buttons) @@ -171,98 +164,92 @@ mouse_set_buttons(int buttons) mouse_nbut = buttons; } - void mouse_process(void) { static int poll_delay = 2; if (mouse_curr == NULL) - return; + return; - if (--poll_delay) return; + if (--poll_delay) + return; mouse_poll(); if ((mouse_dev_poll != NULL) || (mouse_curr->poll != NULL)) { - if (mouse_curr->poll != NULL) - mouse_curr->poll(mouse_x,mouse_y,mouse_z,mouse_buttons, mouse_priv); - else - mouse_dev_poll(mouse_x,mouse_y,mouse_z,mouse_buttons, mouse_priv); + if (mouse_curr->poll != NULL) + mouse_curr->poll(mouse_x, mouse_y, mouse_z, mouse_buttons, mouse_priv); + else + mouse_dev_poll(mouse_x, mouse_y, mouse_z, mouse_buttons, mouse_priv); - /* Reset mouse deltas. */ - mouse_x = mouse_y = mouse_z = 0; + /* Reset mouse deltas. */ + mouse_x = mouse_y = mouse_z = 0; } poll_delay = 2; } - void -mouse_set_poll(int (*func)(int,int,int,int,void *), void *arg) +mouse_set_poll(int (*func)(int, int, int, int, void *), void *arg) { - if (mouse_type != MOUSE_TYPE_INTERNAL) return; + if (mouse_type != MOUSE_TYPE_INTERNAL) + return; mouse_dev_poll = func; - mouse_priv = arg; + mouse_priv = arg; } - char * mouse_get_name(int mouse) { - return((char *)mouse_devices[mouse].device->name); + return ((char *) mouse_devices[mouse].device->name); } - char * mouse_get_internal_name(int mouse) { return device_get_internal_name(mouse_devices[mouse].device); } - int mouse_get_from_internal_name(char *s) { int c = 0; while (mouse_devices[c].device != NULL) { - if (! strcmp((char *)mouse_devices[c].device->internal_name, s)) - return(c); - c++; + if (!strcmp((char *) mouse_devices[c].device->internal_name, s)) + return (c); + c++; } - return(0); + return (0); } - int mouse_has_config(int mouse) { - if (mouse_devices[mouse].device == NULL) return(0); + if (mouse_devices[mouse].device == NULL) + return (0); - return(mouse_devices[mouse].device->config ? 1 : 0); + return (mouse_devices[mouse].device->config ? 1 : 0); } - const device_t * mouse_get_device(int mouse) { - return(mouse_devices[mouse].device); + return (mouse_devices[mouse].device); } - int mouse_get_buttons(void) { - return(mouse_nbut); + return (mouse_nbut); } - /* Return number of MOUSE types we know about. */ int mouse_get_ndev(void) { - return((sizeof(mouse_devices)/sizeof(mouse_t)) - 1); + return ((sizeof(mouse_devices) / sizeof(mouse_t)) - 1); } diff --git a/src/device/mouse_bus.c b/src/device/mouse_bus.c index 2a098a22b..cc9f6ecca 100644 --- a/src/device/mouse_bus.c +++ b/src/device/mouse_bus.c @@ -85,10 +85,10 @@ #define IRQ_MASK ((1 << 5) >> dev->irq) /* MS Inport Bus Mouse Adapter */ -#define INP_PORT_CONTROL 0x0000 -#define INP_PORT_DATA 0x0001 -#define INP_PORT_SIGNATURE 0x0002 -#define INP_PORT_CONFIG 0x0003 +#define INP_PORT_CONTROL 0x0000 +#define INP_PORT_DATA 0x0001 +#define INP_PORT_SIGNATURE 0x0002 +#define INP_PORT_CONFIG 0x0003 #define INP_CTRL_READ_BUTTONS 0x00 #define INP_CTRL_READ_X 0x01 @@ -103,123 +103,119 @@ #define INP_PERIOD_MASK 0x07 /* MS/Logictech Standard Bus Mouse Adapter */ -#define BUSM_PORT_DATA 0x0000 -#define BUSM_PORT_SIGNATURE 0x0001 -#define BUSM_PORT_CONTROL 0x0002 -#define BUSM_PORT_CONFIG 0x0003 +#define BUSM_PORT_DATA 0x0000 +#define BUSM_PORT_SIGNATURE 0x0001 +#define BUSM_PORT_CONTROL 0x0002 +#define BUSM_PORT_CONFIG 0x0003 -#define HOLD_COUNTER (1 << 7) -#define READ_X (0 << 6) -#define READ_Y (1 << 6) -#define READ_LOW (0 << 5) -#define READ_HIGH (1 << 5) -#define DISABLE_IRQ (1 << 4) +#define HOLD_COUNTER (1 << 7) +#define READ_X (0 << 6) +#define READ_Y (1 << 6) +#define READ_LOW (0 << 5) +#define READ_HIGH (1 << 5) +#define DISABLE_IRQ (1 << 4) -#define DEVICE_ACTIVE (1 << 7) +#define DEVICE_ACTIVE (1 << 7) -#define READ_X_LOW (READ_X | READ_LOW) -#define READ_X_HIGH (READ_X | READ_HIGH) -#define READ_Y_LOW (READ_Y | READ_LOW) -#define READ_Y_HIGH (READ_Y | READ_HIGH) +#define READ_X_LOW (READ_X | READ_LOW) +#define READ_X_HIGH (READ_X | READ_HIGH) +#define READ_Y_LOW (READ_Y | READ_LOW) +#define READ_Y_HIGH (READ_Y | READ_HIGH) -#define FLAG_INPORT (1 << 0) -#define FLAG_ENABLED (1 << 1) -#define FLAG_HOLD (1 << 2) -#define FLAG_TIMER_INT (1 << 3) -#define FLAG_DATA_INT (1 << 4) +#define FLAG_INPORT (1 << 0) +#define FLAG_ENABLED (1 << 1) +#define FLAG_HOLD (1 << 2) +#define FLAG_TIMER_INT (1 << 3) +#define FLAG_DATA_INT (1 << 4) static const uint8_t periods[4] = { 30, 50, 100, 200 }; - /* Our mouse device. */ typedef struct mouse { - uint8_t current_b, control_val, - config_val, sig_val, - command_val, pad; + uint8_t current_b, control_val, + config_val, sig_val, + command_val, pad; - int8_t current_x, current_y; + int8_t current_x, current_y; - int base, irq, bn, flags, - mouse_delayed_dx, mouse_delayed_dy, - mouse_buttons, mouse_buttons_last, - toggle_counter, timer_enabled; + int base, irq, bn, flags, + mouse_delayed_dx, mouse_delayed_dy, + mouse_buttons, mouse_buttons_last, + toggle_counter, timer_enabled; - double period; - pc_timer_t timer; /* mouse event timer */ + double period; + pc_timer_t timer; /* mouse event timer */ } mouse_t; - #ifdef ENABLE_MOUSE_BUS_LOG int bm_do_log = ENABLE_MOUSE_BUS_LOG; - static void bm_log(const char *fmt, ...) { va_list ap; if (bm_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define bm_log(fmt, ...) +# define bm_log(fmt, ...) #endif - /* Handle a READ operation from one of our registers. */ static uint8_t lt_read(uint16_t port, void *priv) { - mouse_t *dev = (mouse_t *)priv; - uint8_t value = 0xff; + mouse_t *dev = (mouse_t *) priv; + uint8_t value = 0xff; switch (port & 0x03) { - case BUSM_PORT_DATA: - /* Testing and another source confirm that the buttons are - *ALWAYS* present, so I'm going to change this a bit. */ - switch (dev->control_val & 0x60) { - case READ_X_LOW: - value = dev->current_x & 0x0F; - dev->current_x &= ~0x0F; - break; - case READ_X_HIGH: - value = (dev->current_x >> 4) & 0x0F; - dev->current_x &= ~0xF0; - break; - case READ_Y_LOW: - value = dev->current_y & 0x0F; - dev->current_y &= ~0x0F; - break; - case READ_Y_HIGH: - value = (dev->current_y >> 4) & 0x0F; - dev->current_y &= ~0xF0; - break; - default: - bm_log("ERROR: Reading data port in unsupported mode 0x%02x\n", dev->control_val); - } - value |= ((dev->current_b ^ 7) << 5); - break; - case BUSM_PORT_SIGNATURE: - value = dev->sig_val; - break; - case BUSM_PORT_CONTROL: - value = dev->control_val; - dev->control_val |= 0x0F; - /* If the conditions are right, simulate the flakiness of the correct IRQ bit. */ - if (dev->flags & FLAG_TIMER_INT) - dev->control_val = (dev->control_val & ~IRQ_MASK) | (random_generate() & IRQ_MASK); - break; - case BUSM_PORT_CONFIG: - /* Read from config port returns control_val in the upper 4 bits when enabled, - possibly solid interrupt readout in the lower 4 bits, 0xff when not (at power-up). */ - if (dev->flags & FLAG_ENABLED) - return (dev->control_val | 0x0F) & ~IRQ_MASK; - else - return 0xff; - break; + case BUSM_PORT_DATA: + /* Testing and another source confirm that the buttons are + *ALWAYS* present, so I'm going to change this a bit. */ + switch (dev->control_val & 0x60) { + case READ_X_LOW: + value = dev->current_x & 0x0F; + dev->current_x &= ~0x0F; + break; + case READ_X_HIGH: + value = (dev->current_x >> 4) & 0x0F; + dev->current_x &= ~0xF0; + break; + case READ_Y_LOW: + value = dev->current_y & 0x0F; + dev->current_y &= ~0x0F; + break; + case READ_Y_HIGH: + value = (dev->current_y >> 4) & 0x0F; + dev->current_y &= ~0xF0; + break; + default: + bm_log("ERROR: Reading data port in unsupported mode 0x%02x\n", dev->control_val); + } + value |= ((dev->current_b ^ 7) << 5); + break; + case BUSM_PORT_SIGNATURE: + value = dev->sig_val; + break; + case BUSM_PORT_CONTROL: + value = dev->control_val; + dev->control_val |= 0x0F; + /* If the conditions are right, simulate the flakiness of the correct IRQ bit. */ + if (dev->flags & FLAG_TIMER_INT) + dev->control_val = (dev->control_val & ~IRQ_MASK) | (random_generate() & IRQ_MASK); + break; + case BUSM_PORT_CONFIG: + /* Read from config port returns control_val in the upper 4 bits when enabled, + possibly solid interrupt readout in the lower 4 bits, 0xff when not (at power-up). */ + if (dev->flags & FLAG_ENABLED) + return (dev->control_val | 0x0F) & ~IRQ_MASK; + else + return 0xff; + break; } bm_log("DEBUG: read from address 0x%04x, value = 0x%02x\n", port, value); @@ -227,47 +223,46 @@ lt_read(uint16_t port, void *priv) return value; } - static uint8_t ms_read(uint16_t port, void *priv) { - mouse_t *dev = (mouse_t *)priv; - uint8_t value = 0xff; + mouse_t *dev = (mouse_t *) priv; + uint8_t value = 0xff; switch (port & 0x03) { - case INP_PORT_CONTROL: - value = dev->control_val; - break; - case INP_PORT_DATA: - switch (dev->command_val) { - case INP_CTRL_READ_BUTTONS: - value = dev->current_b; - break; - case INP_CTRL_READ_X: - value = dev->current_x; - dev->current_x = 0; - break; - case INP_CTRL_READ_Y: - value = dev->current_y; - dev->current_y = 0; - break; - case INP_CTRL_COMMAND: - value = dev->control_val; - break; - default: - bm_log("ERROR: Reading data port in unsupported mode 0x%02x\n", dev->control_val); - } - break; - case INP_PORT_SIGNATURE: - if (dev->toggle_counter) - value = 0x12; - else - value = 0xDE; - dev->toggle_counter ^= 1; - break; - case INP_PORT_CONFIG: - bm_log("ERROR: Unsupported read from port 0x%04x\n", port); - break; + case INP_PORT_CONTROL: + value = dev->control_val; + break; + case INP_PORT_DATA: + switch (dev->command_val) { + case INP_CTRL_READ_BUTTONS: + value = dev->current_b; + break; + case INP_CTRL_READ_X: + value = dev->current_x; + dev->current_x = 0; + break; + case INP_CTRL_READ_Y: + value = dev->current_y; + dev->current_y = 0; + break; + case INP_CTRL_COMMAND: + value = dev->control_val; + break; + default: + bm_log("ERROR: Reading data port in unsupported mode 0x%02x\n", dev->control_val); + } + break; + case INP_PORT_SIGNATURE: + if (dev->toggle_counter) + value = 0x12; + else + value = 0xDE; + dev->toggle_counter ^= 1; + break; + case INP_PORT_CONFIG: + bm_log("ERROR: Unsupported read from port 0x%04x\n", port); + break; } bm_log("DEBUG: read from address 0x%04x, value = 0x%02x\n", port, value); @@ -275,426 +270,421 @@ ms_read(uint16_t port, void *priv) return value; } - /* Handle a WRITE operation to one of our registers. */ static void lt_write(uint16_t port, uint8_t val, void *priv) { - mouse_t *dev = (mouse_t *)priv; - uint8_t bit; + mouse_t *dev = (mouse_t *) priv; + uint8_t bit; bm_log("DEBUG: write to address 0x%04x, value = 0x%02x\n", port, val); switch (port & 0x03) { - case BUSM_PORT_DATA: - bm_log("ERROR: Unsupported write to port 0x%04x (value = 0x%02x)\n", port, val); - break; - case BUSM_PORT_SIGNATURE: - dev->sig_val = val; - break; - case BUSM_PORT_CONTROL: - dev->control_val = val | 0x0F; + case BUSM_PORT_DATA: + bm_log("ERROR: Unsupported write to port 0x%04x (value = 0x%02x)\n", port, val); + break; + case BUSM_PORT_SIGNATURE: + dev->sig_val = val; + break; + case BUSM_PORT_CONTROL: + dev->control_val = val | 0x0F; - if (!(val & DISABLE_IRQ)) - dev->flags |= FLAG_TIMER_INT; - else - dev->flags &= ~FLAG_TIMER_INT; + if (!(val & DISABLE_IRQ)) + dev->flags |= FLAG_TIMER_INT; + else + dev->flags &= ~FLAG_TIMER_INT; - if (val & HOLD_COUNTER) - dev->flags |= FLAG_HOLD; - else - dev->flags &= ~FLAG_HOLD; + if (val & HOLD_COUNTER) + dev->flags |= FLAG_HOLD; + else + dev->flags &= ~FLAG_HOLD; - if (dev->irq != -1) - picintc(1 << dev->irq); + if (dev->irq != -1) + picintc(1 << dev->irq); - break; - case BUSM_PORT_CONFIG: - /* - * The original Logitech design was based on using a - * 8255 parallel I/O chip. This chip has to be set up - * for proper operation, and this configuration data - * is what is programmed into this register. - * - * A snippet of code found in the FreeBSD kernel source - * explains the value: - * - * D7 = Mode set flag (1 = active) - * This indicates the mode of operation of D7: - * 1 = Mode set, 0 = Bit set/reset - * D6,D5 = Mode selection (port A) - * 00 = Mode 0 = Basic I/O - * 01 = Mode 1 = Strobed I/O - * 10 = Mode 2 = Bi-dir bus - * D4 = Port A direction (1 = input) - * D3 = Port C (upper 4 bits) direction. (1 = input) - * D2 = Mode selection (port B & C) - * 0 = Mode 0 = Basic I/O - * 1 = Mode 1 = Strobed I/O - * D1 = Port B direction (1 = input) - * D0 = Port C (lower 4 bits) direction. (1 = input) - * - * So 91 means Basic I/O on all 3 ports, Port A is an input - * port, B is an output port, C is split with upper 4 bits - * being an output port and lower 4 bits an input port, and - * enable the sucker. Courtesy Intel 8255 databook. Lars - * - * 1001 1011 9B 1111 Default state - * 1001 0001 91 1001 Driver-initialized state - * The only difference is - port C upper and port B go from - * input to output. - */ - if (val & DEVICE_ACTIVE) { - /* Mode set/reset - enable this */ - dev->config_val = val; - if (dev->timer_enabled) - dev->flags |= (FLAG_ENABLED | FLAG_TIMER_INT); - else - dev->flags |= FLAG_ENABLED; - dev->control_val = 0x0F & ~IRQ_MASK; - } else { - /* Single bit set/reset */ - bit = 1 << ((val >> 1) & 0x07); /* Bits 3-1 specify the target bit */ - if (val & 1) - dev->control_val |= bit; /* Set */ - else - dev->control_val &= ~bit; /* Reset */ - } - break; + break; + case BUSM_PORT_CONFIG: + /* + * The original Logitech design was based on using a + * 8255 parallel I/O chip. This chip has to be set up + * for proper operation, and this configuration data + * is what is programmed into this register. + * + * A snippet of code found in the FreeBSD kernel source + * explains the value: + * + * D7 = Mode set flag (1 = active) + * This indicates the mode of operation of D7: + * 1 = Mode set, 0 = Bit set/reset + * D6,D5 = Mode selection (port A) + * 00 = Mode 0 = Basic I/O + * 01 = Mode 1 = Strobed I/O + * 10 = Mode 2 = Bi-dir bus + * D4 = Port A direction (1 = input) + * D3 = Port C (upper 4 bits) direction. (1 = input) + * D2 = Mode selection (port B & C) + * 0 = Mode 0 = Basic I/O + * 1 = Mode 1 = Strobed I/O + * D1 = Port B direction (1 = input) + * D0 = Port C (lower 4 bits) direction. (1 = input) + * + * So 91 means Basic I/O on all 3 ports, Port A is an input + * port, B is an output port, C is split with upper 4 bits + * being an output port and lower 4 bits an input port, and + * enable the sucker. Courtesy Intel 8255 databook. Lars + * + * 1001 1011 9B 1111 Default state + * 1001 0001 91 1001 Driver-initialized state + * The only difference is - port C upper and port B go from + * input to output. + */ + if (val & DEVICE_ACTIVE) { + /* Mode set/reset - enable this */ + dev->config_val = val; + if (dev->timer_enabled) + dev->flags |= (FLAG_ENABLED | FLAG_TIMER_INT); + else + dev->flags |= FLAG_ENABLED; + dev->control_val = 0x0F & ~IRQ_MASK; + } else { + /* Single bit set/reset */ + bit = 1 << ((val >> 1) & 0x07); /* Bits 3-1 specify the target bit */ + if (val & 1) + dev->control_val |= bit; /* Set */ + else + dev->control_val &= ~bit; /* Reset */ + } + break; } } - /* Handle a WRITE operation to one of our registers. */ static void ms_write(uint16_t port, uint8_t val, void *priv) { - mouse_t *dev = (mouse_t *)priv; + mouse_t *dev = (mouse_t *) priv; bm_log("DEBUG: write to address 0x%04x, value = 0x%02x\n", port, val); switch (port & 0x03) { - case INP_PORT_CONTROL: - /* Bit 7 is reset. */ - if (val & INP_CTRL_RESET) - dev->control_val = 0; + case INP_PORT_CONTROL: + /* Bit 7 is reset. */ + if (val & INP_CTRL_RESET) + dev->control_val = 0; - /* Bits 0-2 are the internal register index. */ - switch(val & 0x07) { - case INP_CTRL_COMMAND: - case INP_CTRL_READ_BUTTONS: - case INP_CTRL_READ_X: - case INP_CTRL_READ_Y: - dev->command_val = val & 0x07; - break; - default: - bm_log("ERROR: Unsupported command written to port 0x%04x (value = 0x%02x)\n", port, val); - } - break; - case INP_PORT_DATA: - if (dev->irq != -1) - picintc(1 << dev->irq); - switch(dev->command_val) { - case INP_CTRL_COMMAND: - if (val & INP_HOLD_COUNTER) - dev->flags |= FLAG_HOLD; - else - dev->flags &= ~FLAG_HOLD; + /* Bits 0-2 are the internal register index. */ + switch (val & 0x07) { + case INP_CTRL_COMMAND: + case INP_CTRL_READ_BUTTONS: + case INP_CTRL_READ_X: + case INP_CTRL_READ_Y: + dev->command_val = val & 0x07; + break; + default: + bm_log("ERROR: Unsupported command written to port 0x%04x (value = 0x%02x)\n", port, val); + } + break; + case INP_PORT_DATA: + if (dev->irq != -1) + picintc(1 << dev->irq); + switch (dev->command_val) { + case INP_CTRL_COMMAND: + if (val & INP_HOLD_COUNTER) + dev->flags |= FLAG_HOLD; + else + dev->flags &= ~FLAG_HOLD; - if (val & INP_ENABLE_TIMER_IRQ) - dev->flags |= FLAG_TIMER_INT; - else - dev->flags &= ~FLAG_TIMER_INT; + if (val & INP_ENABLE_TIMER_IRQ) + dev->flags |= FLAG_TIMER_INT; + else + dev->flags &= ~FLAG_TIMER_INT; - if (val & INP_ENABLE_DATA_IRQ) - dev->flags |= FLAG_DATA_INT; - else - dev->flags &= ~FLAG_DATA_INT; + if (val & INP_ENABLE_DATA_IRQ) + dev->flags |= FLAG_DATA_INT; + else + dev->flags &= ~FLAG_DATA_INT; - switch(val & INP_PERIOD_MASK) { - case 0: - dev->period = 0.0; - timer_disable(&dev->timer); - dev->timer_enabled = 0; - break; + switch (val & INP_PERIOD_MASK) { + case 0: + dev->period = 0.0; + timer_disable(&dev->timer); + dev->timer_enabled = 0; + break; - case 1: - case 2: - case 3: - case 4: - dev->period = (1000000.0 / (double)periods[(val & INP_PERIOD_MASK) - 1]); - dev->timer_enabled = (val & INP_ENABLE_TIMER_IRQ) ? 1 : 0; - timer_disable(&dev->timer); - if (dev->timer_enabled) - timer_set_delay_u64(&dev->timer, (uint64_t) (dev->period * (double)TIMER_USEC)); - bm_log("DEBUG: Timer is now %sabled at period %i\n", (val & INP_ENABLE_TIMER_IRQ) ? "en" : "dis", (int32_t) dev->period); - break; + case 1: + case 2: + case 3: + case 4: + dev->period = (1000000.0 / (double) periods[(val & INP_PERIOD_MASK) - 1]); + dev->timer_enabled = (val & INP_ENABLE_TIMER_IRQ) ? 1 : 0; + timer_disable(&dev->timer); + if (dev->timer_enabled) + timer_set_delay_u64(&dev->timer, (uint64_t) (dev->period * (double) TIMER_USEC)); + bm_log("DEBUG: Timer is now %sabled at period %i\n", (val & INP_ENABLE_TIMER_IRQ) ? "en" : "dis", (int32_t) dev->period); + break; - case 6: - if ((val & INP_ENABLE_TIMER_IRQ) && (dev->irq != -1)) - picint(1 << dev->irq); - dev->control_val &= INP_PERIOD_MASK; - dev->control_val |= (val & ~INP_PERIOD_MASK); - return; - default: - bm_log("ERROR: Unsupported period written to port 0x%04x (value = 0x%02x)\n", port, val); - } + case 6: + if ((val & INP_ENABLE_TIMER_IRQ) && (dev->irq != -1)) + picint(1 << dev->irq); + dev->control_val &= INP_PERIOD_MASK; + dev->control_val |= (val & ~INP_PERIOD_MASK); + return; + default: + bm_log("ERROR: Unsupported period written to port 0x%04x (value = 0x%02x)\n", port, val); + } - dev->control_val = val; + dev->control_val = val; - break; - default: - bm_log("ERROR: Unsupported write to port 0x%04x (value = 0x%02x)\n", port, val); - } - break; - case INP_PORT_SIGNATURE: - case INP_PORT_CONFIG: - bm_log("ERROR: Unsupported write to port 0x%04x (value = 0x%02x)\n", port, val); - break; + break; + default: + bm_log("ERROR: Unsupported write to port 0x%04x (value = 0x%02x)\n", port, val); + } + break; + case INP_PORT_SIGNATURE: + case INP_PORT_CONFIG: + bm_log("ERROR: Unsupported write to port 0x%04x (value = 0x%02x)\n", port, val); + break; } } - /* The emulator calls us with an update on the host mouse device. */ static int bm_poll(int x, int y, int z, int b, void *priv) { - mouse_t *dev = (mouse_t *)priv; - int xor; + mouse_t *dev = (mouse_t *) priv; + int xor ; if (!(dev->flags & FLAG_ENABLED)) - return(1); /* Mouse is disabled, do nothing. */ + return (1); /* Mouse is disabled, do nothing. */ if (!x && !y && !((b ^ dev->mouse_buttons_last) & 0x07)) { - dev->mouse_buttons_last = b; - return(1); /* State has not changed, do nothing. */ + dev->mouse_buttons_last = b; + return (1); /* State has not changed, do nothing. */ } /* Converts button states from MRL to LMR. */ dev->mouse_buttons = (uint8_t) (((b & 1) << 2) | ((b & 2) >> 1)); if (dev->bn == 3) - dev->mouse_buttons |= ((b & 4) >> 1); + dev->mouse_buttons |= ((b & 4) >> 1); if ((dev->flags & FLAG_INPORT) && !dev->timer_enabled) { - /* This is an InPort mouse in data interrupt mode, - so update bits 6-3 here. */ + /* This is an InPort mouse in data interrupt mode, + so update bits 6-3 here. */ - /* If the mouse has moved, set bit 6. */ - if (x || y) - dev->mouse_buttons |= 0x40; + /* If the mouse has moved, set bit 6. */ + if (x || y) + dev->mouse_buttons |= 0x40; - /* Set bits 3-5 according to button state changes. */ - xor = ((dev->current_b ^ dev->mouse_buttons) & 0x07) << 3; - dev->mouse_buttons |= xor; + /* Set bits 3-5 according to button state changes. */ + xor = ((dev->current_b ^ dev->mouse_buttons) & 0x07) << 3; + dev->mouse_buttons |= xor; } dev->mouse_buttons_last = b; /* Clamp x and y to between -128 and 127 (int8_t range). */ - if (x > 127) x = 127; - if (x < -128) x = -128; + if (x > 127) + x = 127; + if (x < -128) + x = -128; - if (y > 127) y = 127; - if (y < -128) y = -128; + if (y > 127) + y = 127; + if (y < -128) + y = -128; if (dev->timer_enabled) { - /* Update delayed coordinates. */ - dev->mouse_delayed_dx += x; - dev->mouse_delayed_dy += y; + /* Update delayed coordinates. */ + dev->mouse_delayed_dx += x; + dev->mouse_delayed_dy += y; } else { - /* If the counters are not frozen, update them. */ - if (!(dev->flags & FLAG_HOLD)) { - dev->current_x = (int8_t) x; - dev->current_y = (int8_t) y; + /* If the counters are not frozen, update them. */ + if (!(dev->flags & FLAG_HOLD)) { + dev->current_x = (int8_t) x; + dev->current_y = (int8_t) y; - dev->current_b = dev->mouse_buttons; - } + dev->current_b = dev->mouse_buttons; + } - /* Send interrupt. */ - if ((dev->flags & FLAG_DATA_INT) && (dev->irq != -1)) { - picint(1 << dev->irq); - bm_log("DEBUG: Data Interrupt Fired...\n"); - } + /* Send interrupt. */ + if ((dev->flags & FLAG_DATA_INT) && (dev->irq != -1)) { + picint(1 << dev->irq); + bm_log("DEBUG: Data Interrupt Fired...\n"); + } } - return(0); + return (0); } - /* The timer calls us on every tick if the mouse is in timer mode (InPort mouse is so configured, MS/Logitech Bus mouse always). */ static void bm_update_data(mouse_t *dev) { int delta_x, delta_y; - int xor; + int xor ; /* If the counters are not frozen, update them. */ if (!(dev->flags & FLAG_HOLD)) { - /* Update the deltas and the delays. */ - if (dev->mouse_delayed_dx > 127) { - delta_x = 127; - dev->mouse_delayed_dx -= 127; - } else if (dev->mouse_delayed_dx < -128) { - delta_x = -128; - dev->mouse_delayed_dx += 128; - } else { - delta_x = dev->mouse_delayed_dx; - dev->mouse_delayed_dx = 0; - } + /* Update the deltas and the delays. */ + if (dev->mouse_delayed_dx > 127) { + delta_x = 127; + dev->mouse_delayed_dx -= 127; + } else if (dev->mouse_delayed_dx < -128) { + delta_x = -128; + dev->mouse_delayed_dx += 128; + } else { + delta_x = dev->mouse_delayed_dx; + dev->mouse_delayed_dx = 0; + } - if (dev->mouse_delayed_dy > 127) { - delta_y = 127; - dev->mouse_delayed_dy -= 127; - } else if (dev->mouse_delayed_dy < -128) { - delta_y = -128; - dev->mouse_delayed_dy += 128; - } else { - delta_y = dev->mouse_delayed_dy; - dev->mouse_delayed_dy = 0; - } + if (dev->mouse_delayed_dy > 127) { + delta_y = 127; + dev->mouse_delayed_dy -= 127; + } else if (dev->mouse_delayed_dy < -128) { + delta_y = -128; + dev->mouse_delayed_dy += 128; + } else { + delta_y = dev->mouse_delayed_dy; + dev->mouse_delayed_dy = 0; + } - dev->current_x = (int8_t) delta_x; - dev->current_y = (int8_t) delta_y; + dev->current_x = (int8_t) delta_x; + dev->current_y = (int8_t) delta_y; } else - delta_x = delta_y = 0; + delta_x = delta_y = 0; if (dev->flags & FLAG_INPORT) { - /* This is an InPort mouse in timer mode, so update current_b always, - and update bits 6-3 (mouse moved and button state changed) here. */ - xor = ((dev->current_b ^ dev->mouse_buttons) & 0x07) << 3; - dev->current_b = (dev->mouse_buttons & 0x87) | xor; - if (delta_x || delta_y) - dev->current_b |= 0x40; + /* This is an InPort mouse in timer mode, so update current_b always, + and update bits 6-3 (mouse moved and button state changed) here. */ + xor = ((dev->current_b ^ dev->mouse_buttons) & 0x07) << 3; + dev->current_b = (dev->mouse_buttons & 0x87) | xor; + if (delta_x || delta_y) + dev->current_b |= 0x40; } else if (!(dev->flags & FLAG_HOLD)) { - /* This is a MS/Logitech Bus Mouse, so only update current_b if the - counters are frozen. */ - dev->current_b = dev->mouse_buttons; + /* This is a MS/Logitech Bus Mouse, so only update current_b if the + counters are frozen. */ + dev->current_b = dev->mouse_buttons; } } - /* Called at the configured period (InPort mouse) or 45 times per second (MS/Logitech Bus mouse). */ static void bm_timer(void *priv) { - mouse_t *dev = (mouse_t *)priv; + mouse_t *dev = (mouse_t *) priv; bm_log("DEBUG: Timer Tick (flags=%08X)...\n", dev->flags); /* The period is configured either via emulator settings (for MS/Logitech Bus mouse) or via software (for InPort mouse). */ - timer_advance_u64(&dev->timer, (uint64_t) (dev->period * (double)TIMER_USEC)); + timer_advance_u64(&dev->timer, (uint64_t) (dev->period * (double) TIMER_USEC)); if ((dev->flags & FLAG_TIMER_INT) && (dev->irq != -1)) { - picint(1 << dev->irq); - bm_log("DEBUG: Timer Interrupt Fired...\n"); + picint(1 << dev->irq); + bm_log("DEBUG: Timer Interrupt Fired...\n"); } bm_update_data(dev); } - /* Release all resources held by the device. */ static void bm_close(void *priv) { - mouse_t *dev = (mouse_t *)priv; + mouse_t *dev = (mouse_t *) priv; if (dev) - free(dev); + free(dev); } - /* Set the mouse's IRQ. */ void mouse_bus_set_irq(void *priv, int irq) { - mouse_t *dev = (mouse_t *)priv; + mouse_t *dev = (mouse_t *) priv; dev->irq = irq; } - /* Initialize the device for use by the user. */ static void * bm_init(const device_t *info) { mouse_t *dev; - int hz; + int hz; - dev = (mouse_t *)malloc(sizeof(mouse_t)); + dev = (mouse_t *) malloc(sizeof(mouse_t)); memset(dev, 0x00, sizeof(mouse_t)); if ((info->local & ~MOUSE_TYPE_ONBOARD) == MOUSE_TYPE_INPORT) - dev->flags = FLAG_INPORT; + dev->flags = FLAG_INPORT; else - dev->flags = 0; + dev->flags = 0; if (info->local & MOUSE_TYPE_ONBOARD) { - dev->base = 0x023c; - dev->irq = -1; - dev->bn = 2; + dev->base = 0x023c; + dev->irq = -1; + dev->bn = 2; } else { - dev->base = device_get_config_hex16("base"); - dev->irq = device_get_config_int("irq"); - dev->bn = device_get_config_int("buttons"); + dev->base = device_get_config_hex16("base"); + dev->irq = device_get_config_int("irq"); + dev->bn = device_get_config_int("buttons"); } mouse_set_buttons(dev->bn); - dev->mouse_delayed_dx = 0; - dev->mouse_delayed_dy = 0; - dev->mouse_buttons = 0; - dev->mouse_buttons_last = 0; - dev->sig_val = 0; /* the signature port value */ - dev->current_x = - dev->current_y = 0; - dev->current_b = 0; - dev->command_val = 0; /* command byte */ - dev->toggle_counter = 0; /* signature byte / IRQ bit toggle */ - dev->period = 0.0; + dev->mouse_delayed_dx = 0; + dev->mouse_delayed_dy = 0; + dev->mouse_buttons = 0; + dev->mouse_buttons_last = 0; + dev->sig_val = 0; /* the signature port value */ + dev->current_x = dev->current_y = 0; + dev->current_b = 0; + dev->command_val = 0; /* command byte */ + dev->toggle_counter = 0; /* signature byte / IRQ bit toggle */ + dev->period = 0.0; timer_add(&dev->timer, bm_timer, dev, 0); if (dev->flags & FLAG_INPORT) { - dev->control_val = 0; /* the control port value */ - dev->flags |= FLAG_ENABLED; + dev->control_val = 0; /* the control port value */ + dev->flags |= FLAG_ENABLED; - io_sethandler(dev->base, 4, - ms_read, NULL, NULL, ms_write, NULL, NULL, dev); + io_sethandler(dev->base, 4, + ms_read, NULL, NULL, ms_write, NULL, NULL, dev); - dev->timer_enabled = 0; + dev->timer_enabled = 0; } else { - dev->control_val = 0x0f; /* the control port value */ - dev->config_val = 0x9b; /* the config port value - 0x9b is the - default state of the 8255: all ports - are set to input */ + dev->control_val = 0x0f; /* the control port value */ + dev->config_val = 0x9b; /* the config port value - 0x9b is the + default state of the 8255: all ports + are set to input */ - hz = device_get_config_int("hz"); - if (hz > 0) - dev->period = (1000000.0 / (double)hz); + hz = device_get_config_int("hz"); + if (hz > 0) + dev->period = (1000000.0 / (double) hz); - io_sethandler(dev->base, 4, - lt_read, NULL, NULL, lt_write, NULL, NULL, dev); + io_sethandler(dev->base, 4, + lt_read, NULL, NULL, lt_write, NULL, NULL, dev); - if (hz > 0) { - timer_set_delay_u64(&dev->timer, (uint64_t) (dev->period * (double)TIMER_USEC)); - dev->timer_enabled = 1; - } else { - dev->flags |= FLAG_DATA_INT; - dev->timer_enabled = 0; - } + if (hz > 0) { + timer_set_delay_u64(&dev->timer, (uint64_t) (dev->period * (double) TIMER_USEC)); + dev->timer_enabled = 1; + } else { + dev->flags |= FLAG_DATA_INT; + dev->timer_enabled = 0; + } } if (dev->flags & FLAG_INPORT) - bm_log("MS Inport BusMouse initialized\n"); + bm_log("MS Inport BusMouse initialized\n"); else - bm_log("Standard MS/Logitech BusMouse initialized\n"); + bm_log("Standard MS/Logitech BusMouse initialized\n"); return dev; } static const device_config_t lt_config[] = { -// clang-format off + // clang-format off { .name = "base", .description = "Address", @@ -758,11 +748,11 @@ static const device_config_t lt_config[] = { } }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_config_t ms_config[] = { -// clang-format off + // clang-format off { .name = "base", .description = "Address", @@ -814,43 +804,43 @@ static const device_config_t ms_config[] = { }; const device_t mouse_logibus_device = { - .name = "Logitech/Microsoft Bus Mouse", + .name = "Logitech/Microsoft Bus Mouse", .internal_name = "logibus", - .flags = DEVICE_ISA, - .local = MOUSE_TYPE_LOGIBUS, - .init = bm_init, - .close = bm_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = MOUSE_TYPE_LOGIBUS, + .init = bm_init, + .close = bm_close, + .reset = NULL, { .poll = bm_poll }, .speed_changed = NULL, - .force_redraw = NULL, - .config = lt_config + .force_redraw = NULL, + .config = lt_config }; const device_t mouse_logibus_onboard_device = { - .name = "Logitech Bus Mouse (On-Board)", + .name = "Logitech Bus Mouse (On-Board)", .internal_name = "logibus_onboard", - .flags = DEVICE_ISA, - .local = MOUSE_TYPE_LOGIBUS | MOUSE_TYPE_ONBOARD, - .init = bm_init, - .close = bm_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = MOUSE_TYPE_LOGIBUS | MOUSE_TYPE_ONBOARD, + .init = bm_init, + .close = bm_close, + .reset = NULL, { .poll = bm_poll }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t mouse_msinport_device = { - .name = "Microsoft Bus Mouse (InPort)", + .name = "Microsoft Bus Mouse (InPort)", .internal_name = "msbus", - .flags = DEVICE_ISA, - .local = MOUSE_TYPE_INPORT, - .init = bm_init, - .close = bm_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = MOUSE_TYPE_INPORT, + .init = bm_init, + .close = bm_close, + .reset = NULL, { .poll = bm_poll }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ms_config + .force_redraw = NULL, + .config = ms_config }; diff --git a/src/device/mouse_ps2.c b/src/device/mouse_ps2.c index cd4225e11..24e8996c4 100644 --- a/src/device/mouse_ps2.c +++ b/src/device/mouse_ps2.c @@ -24,215 +24,205 @@ #include <86box/keyboard.h> #include <86box/mouse.h> - enum { MODE_STREAM, MODE_REMOTE, MODE_ECHO }; - typedef struct { - const char *name; /* name of this device */ - int8_t type; /* type of this device */ + const char *name; /* name of this device */ + int8_t type; /* type of this device */ - int mode; + int mode; - uint8_t flags; - uint8_t resolution; - uint8_t sample_rate; + uint8_t flags; + uint8_t resolution; + uint8_t sample_rate; - uint8_t command; + uint8_t command; - int x, y, z, b; + int x, y, z, b; - uint8_t last_data[6]; + uint8_t last_data[6]; } mouse_t; -#define FLAG_INTELLI 0x80 /* device is IntelliMouse */ -#define FLAG_INTMODE 0x40 /* using Intellimouse mode */ -#define FLAG_SCALED 0x20 /* enable delta scaling */ -#define FLAG_ENABLED 0x10 /* dev is enabled for use */ -#define FLAG_CTRLDAT 0x08 /* ctrl or data mode */ - +#define FLAG_INTELLI 0x80 /* device is IntelliMouse */ +#define FLAG_INTMODE 0x40 /* using Intellimouse mode */ +#define FLAG_SCALED 0x20 /* enable delta scaling */ +#define FLAG_ENABLED 0x10 /* dev is enabled for use */ +#define FLAG_CTRLDAT 0x08 /* ctrl or data mode */ int mouse_scan = 0; - #ifdef ENABLE_MOUSE_PS2_LOG int mouse_ps2_do_log = ENABLE_MOUSE_PS2_LOG; - static void mouse_ps2_log(const char *fmt, ...) { va_list ap; if (mouse_ps2_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define mouse_ps2_log(fmt, ...) +# define mouse_ps2_log(fmt, ...) #endif - void mouse_clear_data(void *priv) { - mouse_t *dev = (mouse_t *)priv; + mouse_t *dev = (mouse_t *) priv; dev->flags &= ~FLAG_CTRLDAT; } - static void ps2_write(uint8_t val, void *priv) { - mouse_t *dev = (mouse_t *)priv; - uint8_t temp; + mouse_t *dev = (mouse_t *) priv; + uint8_t temp; if (dev->flags & FLAG_CTRLDAT) { - dev->flags &= ~FLAG_CTRLDAT; + dev->flags &= ~FLAG_CTRLDAT; - if (val == 0xff) - goto mouse_reset; + if (val == 0xff) + goto mouse_reset; - switch (dev->command) { - case 0xe8: /* set mouse resolution */ - dev->resolution = val; - keyboard_at_adddata_mouse(0xfa); - break; + switch (dev->command) { + case 0xe8: /* set mouse resolution */ + dev->resolution = val; + keyboard_at_adddata_mouse(0xfa); + break; - case 0xf3: /* set sample rate */ - dev->sample_rate = val; - keyboard_at_adddata_mouse(0xfa); /* Command response */ - break; + case 0xf3: /* set sample rate */ + dev->sample_rate = val; + keyboard_at_adddata_mouse(0xfa); /* Command response */ + break; - default: - keyboard_at_adddata_mouse(0xfc); - } + default: + keyboard_at_adddata_mouse(0xfc); + } } else { - dev->command = val; + dev->command = val; - switch (dev->command) { - case 0xe6: /* set scaling to 1:1 */ - dev->flags &= ~FLAG_SCALED; - keyboard_at_adddata_mouse(0xfa); - break; + switch (dev->command) { + case 0xe6: /* set scaling to 1:1 */ + dev->flags &= ~FLAG_SCALED; + keyboard_at_adddata_mouse(0xfa); + break; - case 0xe7: /* set scaling to 2:1 */ - dev->flags |= FLAG_SCALED; - keyboard_at_adddata_mouse(0xfa); - break; + case 0xe7: /* set scaling to 2:1 */ + dev->flags |= FLAG_SCALED; + keyboard_at_adddata_mouse(0xfa); + break; - case 0xe8: /* set mouse resolution */ - dev->flags |= FLAG_CTRLDAT; - keyboard_at_adddata_mouse(0xfa); - break; + case 0xe8: /* set mouse resolution */ + dev->flags |= FLAG_CTRLDAT; + keyboard_at_adddata_mouse(0xfa); + break; - case 0xe9: /* status request */ - keyboard_at_adddata_mouse(0xfa); - temp = (dev->flags & 0x30); - if (mouse_buttons & 0x01) - temp |= 0x01; - if (mouse_buttons & 0x02) - temp |= 0x02; - if (mouse_buttons & 0x04) - temp |= 0x03; - keyboard_at_adddata_mouse(temp); - keyboard_at_adddata_mouse(dev->resolution); - keyboard_at_adddata_mouse(dev->sample_rate); - break; + case 0xe9: /* status request */ + keyboard_at_adddata_mouse(0xfa); + temp = (dev->flags & 0x30); + if (mouse_buttons & 0x01) + temp |= 0x01; + if (mouse_buttons & 0x02) + temp |= 0x02; + if (mouse_buttons & 0x04) + temp |= 0x03; + keyboard_at_adddata_mouse(temp); + keyboard_at_adddata_mouse(dev->resolution); + keyboard_at_adddata_mouse(dev->sample_rate); + break; - case 0xeb: /* Get mouse data */ - keyboard_at_adddata_mouse(0xfa); + case 0xeb: /* Get mouse data */ + keyboard_at_adddata_mouse(0xfa); - temp = 0; - if (dev->x < 0) - temp |= 0x10; - if (dev->y < 0) - temp |= 0x20; - if (mouse_buttons & 1) - temp |= 1; - if (mouse_buttons & 2) - temp |= 2; - if ((mouse_buttons & 4) && (dev->flags & FLAG_INTELLI)) - temp |= 4; - keyboard_at_adddata_mouse(temp); - keyboard_at_adddata_mouse(dev->x & 0xff); - keyboard_at_adddata_mouse(dev->y & 0xff); - if (dev->flags & FLAG_INTMODE) - keyboard_at_adddata_mouse(dev->z); - break; + temp = 0; + if (dev->x < 0) + temp |= 0x10; + if (dev->y < 0) + temp |= 0x20; + if (mouse_buttons & 1) + temp |= 1; + if (mouse_buttons & 2) + temp |= 2; + if ((mouse_buttons & 4) && (dev->flags & FLAG_INTELLI)) + temp |= 4; + keyboard_at_adddata_mouse(temp); + keyboard_at_adddata_mouse(dev->x & 0xff); + keyboard_at_adddata_mouse(dev->y & 0xff); + if (dev->flags & FLAG_INTMODE) + keyboard_at_adddata_mouse(dev->z); + break; - case 0xf2: /* read ID */ - keyboard_at_adddata_mouse(0xfa); - if (dev->flags & FLAG_INTMODE) - keyboard_at_adddata_mouse(0x03); - else - keyboard_at_adddata_mouse(0x00); - break; + case 0xf2: /* read ID */ + keyboard_at_adddata_mouse(0xfa); + if (dev->flags & FLAG_INTMODE) + keyboard_at_adddata_mouse(0x03); + else + keyboard_at_adddata_mouse(0x00); + break; - case 0xf3: /* set command mode */ - dev->flags |= FLAG_CTRLDAT; - keyboard_at_adddata_mouse(0xfa); /* ACK for command byte */ - break; + case 0xf3: /* set command mode */ + dev->flags |= FLAG_CTRLDAT; + keyboard_at_adddata_mouse(0xfa); /* ACK for command byte */ + break; - case 0xf4: /* enable */ - dev->flags |= FLAG_ENABLED; - mouse_scan = 1; - keyboard_at_adddata_mouse(0xfa); - break; + case 0xf4: /* enable */ + dev->flags |= FLAG_ENABLED; + mouse_scan = 1; + keyboard_at_adddata_mouse(0xfa); + break; - case 0xf5: /* disable */ - dev->flags &= ~FLAG_ENABLED; - mouse_scan = 0; - keyboard_at_adddata_mouse(0xfa); - break; + case 0xf5: /* disable */ + dev->flags &= ~FLAG_ENABLED; + mouse_scan = 0; + keyboard_at_adddata_mouse(0xfa); + break; - case 0xf6: /* set defaults */ - case 0xff: /* reset */ + case 0xf6: /* set defaults */ + case 0xff: /* reset */ mouse_reset: - dev->mode = MODE_STREAM; - dev->flags &= 0x88; - mouse_scan = 1; - keyboard_at_mouse_reset(); - keyboard_at_adddata_mouse(0xfa); - if (dev->command == 0xff) { - keyboard_at_adddata_mouse(0xaa); - keyboard_at_adddata_mouse(0x00); - } - break; + dev->mode = MODE_STREAM; + dev->flags &= 0x88; + mouse_scan = 1; + keyboard_at_mouse_reset(); + keyboard_at_adddata_mouse(0xfa); + if (dev->command == 0xff) { + keyboard_at_adddata_mouse(0xaa); + keyboard_at_adddata_mouse(0x00); + } + break; - default: - keyboard_at_adddata_mouse(0xfe); - } + default: + keyboard_at_adddata_mouse(0xfe); + } } if (dev->flags & FLAG_INTELLI) { - for (temp = 0; temp < 5; temp++) - dev->last_data[temp] = dev->last_data[temp + 1]; + for (temp = 0; temp < 5; temp++) + dev->last_data[temp] = dev->last_data[temp + 1]; - dev->last_data[5] = val; + dev->last_data[5] = val; - if (dev->last_data[0] == 0xf3 && dev->last_data[1] == 0xc8 && - dev->last_data[2] == 0xf3 && dev->last_data[3] == 0x64 && - dev->last_data[4] == 0xf3 && dev->last_data[5] == 0x50) - dev->flags |= FLAG_INTMODE; + if (dev->last_data[0] == 0xf3 && dev->last_data[1] == 0xc8 && dev->last_data[2] == 0xf3 && dev->last_data[3] == 0x64 && dev->last_data[4] == 0xf3 && dev->last_data[5] == 0x50) + dev->flags |= FLAG_INTMODE; } } - static int ps2_poll(int x, int y, int z, int b, void *priv) { - mouse_t *dev = (mouse_t *)priv; - uint8_t buff[3] = { 0x08, 0x00, 0x00 }; + mouse_t *dev = (mouse_t *) priv; + uint8_t buff[3] = { 0x08, 0x00, 0x00 }; if (!x && !y && !z && (b == dev->b)) - return(0xff); + return (0xff); #if 0 if (!(dev->flags & FLAG_ENABLED)) @@ -240,50 +230,54 @@ ps2_poll(int x, int y, int z, int b, void *priv) #endif if (!mouse_scan) - return(0xff); + return (0xff); dev->x += x; dev->y -= y; dev->z -= z; - if ((dev->mode == MODE_STREAM) && (dev->flags & FLAG_ENABLED) && - (keyboard_at_mouse_pos() < 13)) { - dev->b = b; + if ((dev->mode == MODE_STREAM) && (dev->flags & FLAG_ENABLED) && (keyboard_at_mouse_pos() < 13)) { + dev->b = b; - if (dev->x > 255) dev->x = 255; - if (dev->x < -256) dev->x = -256; - if (dev->y > 255) dev->y = 255; - if (dev->y < -256) dev->y = -256; - if (dev->z < -8) dev->z = -8; - if (dev->z > 7) dev->z = 7; + if (dev->x > 255) + dev->x = 255; + if (dev->x < -256) + dev->x = -256; + if (dev->y > 255) + dev->y = 255; + if (dev->y < -256) + dev->y = -256; + if (dev->z < -8) + dev->z = -8; + if (dev->z > 7) + dev->z = 7; - if (dev->x < 0) - buff[0] |= 0x10; - if (dev->y < 0) - buff[0] |= 0x20; - if (mouse_buttons & 0x01) - buff[0] |= 0x01; - if (mouse_buttons & 0x02) - buff[0] |= 0x02; - if (dev->flags & FLAG_INTELLI) { - if (mouse_buttons & 0x04) - buff[0] |= 0x04; - } - buff[1] = (dev->x & 0xff); - buff[2] = (dev->y & 0xff); + if (dev->x < 0) + buff[0] |= 0x10; + if (dev->y < 0) + buff[0] |= 0x20; + if (mouse_buttons & 0x01) + buff[0] |= 0x01; + if (mouse_buttons & 0x02) + buff[0] |= 0x02; + if (dev->flags & FLAG_INTELLI) { + if (mouse_buttons & 0x04) + buff[0] |= 0x04; + } + buff[1] = (dev->x & 0xff); + buff[2] = (dev->y & 0xff); - keyboard_at_adddata_mouse(buff[0]); - keyboard_at_adddata_mouse(buff[1]); - keyboard_at_adddata_mouse(buff[2]); - if (dev->flags & FLAG_INTMODE) - keyboard_at_adddata_mouse(dev->z); + keyboard_at_adddata_mouse(buff[0]); + keyboard_at_adddata_mouse(buff[1]); + keyboard_at_adddata_mouse(buff[2]); + if (dev->flags & FLAG_INTMODE) + keyboard_at_adddata_mouse(dev->z); - dev->x = dev->y = dev->z = 0; + dev->x = dev->y = dev->z = 0; } - return(0); + return (0); } - /* * Initialize the device for use by the user. * @@ -293,15 +287,15 @@ void * mouse_ps2_init(const device_t *info) { mouse_t *dev; - int i; + int i; - dev = (mouse_t *)malloc(sizeof(mouse_t)); + dev = (mouse_t *) malloc(sizeof(mouse_t)); memset(dev, 0x00, sizeof(mouse_t)); dev->name = info->name; dev->type = info->local; dev->mode = MODE_STREAM; - i = device_get_config_int("buttons"); + i = device_get_config_int("buttons"); if (i > 2) dev->flags |= FLAG_INTELLI; @@ -314,14 +308,13 @@ mouse_ps2_init(const device_t *info) mouse_set_buttons((dev->flags & FLAG_INTELLI) ? 3 : 2); /* Return our private data to the I/O layer. */ - return(dev); + return (dev); } - static void ps2_close(void *priv) { - mouse_t *dev = (mouse_t *)priv; + mouse_t *dev = (mouse_t *) priv; /* Unhook from the general AT Keyboard driver. */ keyboard_at_set_mouse(NULL, NULL); @@ -330,7 +323,7 @@ ps2_close(void *priv) } static const device_config_t ps2_config[] = { -// clang-format off + // clang-format off { .name = "buttons", .description = "Buttons", @@ -353,15 +346,15 @@ static const device_config_t ps2_config[] = { }; const device_t mouse_ps2_device = { - .name = "Standard PS/2 Mouse", + .name = "Standard PS/2 Mouse", .internal_name = "ps2", - .flags = DEVICE_PS2, - .local = MOUSE_TYPE_PS2, - .init = mouse_ps2_init, - .close = ps2_close, - .reset = NULL, + .flags = DEVICE_PS2, + .local = MOUSE_TYPE_PS2, + .init = mouse_ps2_init, + .close = ps2_close, + .reset = NULL, { .poll = ps2_poll }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ps2_config + .force_redraw = NULL, + .config = ps2_config }; diff --git a/src/device/mouse_serial.c b/src/device/mouse_serial.c index 68b570565..2658a9e49 100644 --- a/src/device/mouse_serial.c +++ b/src/device/mouse_serial.c @@ -27,8 +27,7 @@ #include <86box/serial.h> #include <86box/mouse.h> - -#define SERMOUSE_PORT 0 /* attach to Serial0 */ +#define SERMOUSE_PORT 0 /* attach to Serial0 */ enum { PHASE_IDLE, @@ -46,70 +45,66 @@ enum { REPORT_PHASE_TRANSMIT }; - typedef struct { - const char *name; /* name of this device */ - int8_t type, /* type of this device */ - port; - uint8_t flags, but, /* device flags */ - want_data, - status, format, - prompt, on_change, - id_len, id[255], - data_len, data[5]; - int abs_x, abs_y, - rel_x, rel_y, - rel_z, - oldb, lastb; + const char *name; /* name of this device */ + int8_t type, /* type of this device */ + port; + uint8_t flags, but, /* device flags */ + want_data, + status, format, + prompt, on_change, + id_len, id[255], + data_len, data[5]; + int abs_x, abs_y, + rel_x, rel_y, + rel_z, + oldb, lastb; - int command_pos, command_phase, - report_pos, report_phase, - command_enabled, report_enabled; - double transmit_period, report_period; - pc_timer_t command_timer, report_timer; + int command_pos, command_phase, + report_pos, report_phase, + command_enabled, report_enabled; + double transmit_period, report_period; + pc_timer_t command_timer, report_timer; - serial_t *serial; + serial_t *serial; } mouse_t; -#define FLAG_INPORT 0x80 /* device is MS InPort */ -#define FLAG_3BTN 0x20 /* enable 3-button mode */ -#define FLAG_SCALED 0x10 /* enable delta scaling */ -#define FLAG_INTR 0x04 /* dev can send interrupts */ -#define FLAG_FROZEN 0x02 /* do not update counters */ -#define FLAG_ENABLED 0x01 /* dev is enabled for use */ - +#define FLAG_INPORT 0x80 /* device is MS InPort */ +#define FLAG_3BTN 0x20 /* enable 3-button mode */ +#define FLAG_SCALED 0x10 /* enable delta scaling */ +#define FLAG_INTR 0x04 /* dev can send interrupts */ +#define FLAG_FROZEN 0x02 /* do not update counters */ +#define FLAG_ENABLED 0x01 /* dev is enabled for use */ #ifdef ENABLE_MOUSE_SERIAL_LOG int mouse_serial_do_log = ENABLE_MOUSE_SERIAL_LOG; - static void mouse_serial_log(const char *fmt, ...) { va_list ap; if (mouse_serial_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define mouse_serial_log(fmt, ...) +# define mouse_serial_log(fmt, ...) #endif - static void sermouse_timer_on(mouse_t *dev, double period, int report) { pc_timer_t *timer; - int *enabled; + int *enabled; if (report) { - timer = &dev->report_timer; - enabled = &dev->report_enabled; + timer = &dev->report_timer; + enabled = &dev->report_enabled; } else { - timer = &dev->command_timer; - enabled = &dev->command_enabled; + timer = &dev->command_timer; + enabled = &dev->command_enabled; } timer_on_auto(timer, period); @@ -117,60 +112,58 @@ sermouse_timer_on(mouse_t *dev, double period, int report) *enabled = 1; } - static double sermouse_transmit_period(mouse_t *dev, int bps, int rps) { double dbps = (double) bps; double temp = 0.0; - int word_len; + int word_len; switch (dev->format) { - case 0: - case 1: /* Mouse Systems and Three Byte Packed formats: 8 data, no parity, 2 stop, 1 start */ - word_len = 11; - break; - case 2: /* Hexadecimal format - 8 data, no parity, 1 stop, 1 start - number of stop bits is a guess because - it is not documented anywhere. */ - word_len = 10; - break; - case 3: - case 6: /* Bit Pad One formats: 7 data, even parity, 2 stop, 1 start */ - word_len = 11; - break; - case 5: /* MM Series format: 8 data, odd parity, 1 stop, 1 start */ - word_len = 11; - break; - default: - case 7: /* Microsoft-compatible format: 7 data, no parity, 1 stop, 1 start */ - word_len = 9; - break; + case 0: + case 1: /* Mouse Systems and Three Byte Packed formats: 8 data, no parity, 2 stop, 1 start */ + word_len = 11; + break; + case 2: /* Hexadecimal format - 8 data, no parity, 1 stop, 1 start - number of stop bits is a guess because + it is not documented anywhere. */ + word_len = 10; + break; + case 3: + case 6: /* Bit Pad One formats: 7 data, even parity, 2 stop, 1 start */ + word_len = 11; + break; + case 5: /* MM Series format: 8 data, odd parity, 1 stop, 1 start */ + word_len = 11; + break; + default: + case 7: /* Microsoft-compatible format: 7 data, no parity, 1 stop, 1 start */ + word_len = 9; + break; } if (rps == -1) - temp = (double) word_len; + temp = (double) word_len; else { - temp = (double) rps; - temp = (9600.0 - (temp * 33.0)); - temp /= rps; + temp = (double) rps; + temp = (9600.0 - (temp * 33.0)); + temp /= rps; } temp = (1000000.0 / dbps) * temp; return temp; } - /* Callback from serial driver: RTS was toggled. */ static void sermouse_callback(struct serial_s *serial, void *priv) { - mouse_t *dev = (mouse_t *)priv; + mouse_t *dev = (mouse_t *) priv; /* Start a timer to wake us up in a little while. */ - dev->command_pos = 0; + dev->command_pos = 0; dev->command_phase = PHASE_ID; if (dev->id[0] != 'H') - dev->format = 7; + dev->format = 7; dev->transmit_period = sermouse_transmit_period(dev, 1200, -1); timer_stop(&dev->command_timer); #ifdef USE_NEW_DYNAREC @@ -180,66 +173,62 @@ sermouse_callback(struct serial_s *serial, void *priv) #endif } - static uint8_t sermouse_data_msystems(mouse_t *dev, int x, int y, int b) { dev->data[0] = 0x80; - dev->data[0] |= (b & 0x01) ? 0x00 : 0x04; /* left button */ - dev->data[0] |= (b & 0x02) ? 0x00 : 0x01; /* middle button */ - dev->data[0] |= (b & 0x04) ? 0x00 : 0x02; /* right button */ + dev->data[0] |= (b & 0x01) ? 0x00 : 0x04; /* left button */ + dev->data[0] |= (b & 0x02) ? 0x00 : 0x01; /* middle button */ + dev->data[0] |= (b & 0x04) ? 0x00 : 0x02; /* right button */ dev->data[1] = x; dev->data[2] = -y; - dev->data[3] = x; /* same as byte 1 */ - dev->data[4] = -y; /* same as byte 2 */ + dev->data[3] = x; /* same as byte 1 */ + dev->data[4] = -y; /* same as byte 2 */ return 5; } - static uint8_t sermouse_data_3bp(mouse_t *dev, int x, int y, int b) { - dev->data[0] |= (b & 0x01) ? 0x00 : 0x04; /* left button */ - dev->data[0] |= (b & 0x04) ? 0x00 : 0x02; /* middle button */ - dev->data[0] |= (b & 0x02) ? 0x00 : 0x01; /* right button */ + dev->data[0] |= (b & 0x01) ? 0x00 : 0x04; /* left button */ + dev->data[0] |= (b & 0x04) ? 0x00 : 0x02; /* middle button */ + dev->data[0] |= (b & 0x02) ? 0x00 : 0x01; /* right button */ dev->data[1] = x; dev->data[2] = -y; return 3; } - static uint8_t sermouse_data_mmseries(mouse_t *dev, int x, int y, int b) { if (x < -127) - x = -127; + x = -127; if (y < -127) - y = -127; + y = -127; dev->data[0] = 0x80; if (x >= 0) - dev->data[0] |= 0x10; + dev->data[0] |= 0x10; if (y < 0) - dev->data[0] |= 0x08; - dev->data[0] |= (b & 0x01) ? 0x04 : 0x00; /* left button */ - dev->data[0] |= (b & 0x04) ? 0x02 : 0x00; /* middle button */ - dev->data[0] |= (b & 0x02) ? 0x01 : 0x00; /* right button */ + dev->data[0] |= 0x08; + dev->data[0] |= (b & 0x01) ? 0x04 : 0x00; /* left button */ + dev->data[0] |= (b & 0x04) ? 0x02 : 0x00; /* middle button */ + dev->data[0] |= (b & 0x02) ? 0x01 : 0x00; /* right button */ dev->data[1] = abs(x); dev->data[2] = abs(y); return 3; } - static uint8_t sermouse_data_bp1(mouse_t *dev, int x, int y, int b) { dev->data[0] = 0x80; - dev->data[0] |= (b & 0x01) ? 0x10 : 0x00; /* left button */ - dev->data[0] |= (b & 0x04) ? 0x08 : 0x00; /* middle button */ - dev->data[0] |= (b & 0x02) ? 0x04 : 0x00; /* right button */ + dev->data[0] |= (b & 0x01) ? 0x10 : 0x00; /* left button */ + dev->data[0] |= (b & 0x04) ? 0x08 : 0x00; /* middle button */ + dev->data[0] |= (b & 0x02) ? 0x04 : 0x00; /* right button */ dev->data[1] = (x & 0x3f); dev->data[2] = (x >> 6); dev->data[3] = (y & 0x3f); @@ -248,7 +237,6 @@ sermouse_data_bp1(mouse_t *dev, int x, int y, int b) return 5; } - static uint8_t sermouse_data_ms(mouse_t *dev, int x, int y, int z, int b) { @@ -258,57 +246,55 @@ sermouse_data_ms(mouse_t *dev, int x, int y, int z, int b) dev->data[0] |= (((y >> 6) & 0x03) << 2); dev->data[0] |= ((x >> 6) & 0x03); if (b & 0x01) - dev->data[0] |= 0x20; + dev->data[0] |= 0x20; if (b & 0x02) - dev->data[0] |= 0x10; + dev->data[0] |= 0x10; dev->data[1] = x & 0x3F; dev->data[2] = y & 0x3F; if (dev->but == 3) { - len = 3; - if (dev->type == MOUSE_TYPE_LT3BUTTON) { - if (b & 0x04) { - dev->data[3] = 0x20; - len++; - } - } else { - if ((b ^ dev->oldb) & 0x04) { - /* Microsoft 3-button mice send a fourth byte of 0x00 when the middle button - has changed. */ - dev->data[3] = 0x00; - len++; - } - } + len = 3; + if (dev->type == MOUSE_TYPE_LT3BUTTON) { + if (b & 0x04) { + dev->data[3] = 0x20; + len++; + } + } else { + if ((b ^ dev->oldb) & 0x04) { + /* Microsoft 3-button mice send a fourth byte of 0x00 when the middle button + has changed. */ + dev->data[3] = 0x00; + len++; + } + } } else if (dev->but == 4) { - len = 4; - dev->data[3] = z & 0x0F; - if (b & 0x04) - dev->data[3] |= 0x10; + len = 4; + dev->data[3] = z & 0x0F; + if (b & 0x04) + dev->data[3] |= 0x10; } else - len = 3; + len = 3; return len; } - static uint8_t sermouse_data_hex(mouse_t *dev, int x, int y, int b) { - char ret[6] = { 0, 0, 0, 0, 0, 0 }; + char ret[6] = { 0, 0, 0, 0, 0, 0 }; uint8_t i, but = 0x00; - but |= (b & 0x01) ? 0x04 : 0x00; /* left button */ - but |= (b & 0x04) ? 0x02 : 0x00; /* middle button */ - but |= (b & 0x02) ? 0x01 : 0x00; /* right button */ + but |= (b & 0x01) ? 0x04 : 0x00; /* left button */ + but |= (b & 0x04) ? 0x02 : 0x00; /* middle button */ + but |= (b & 0x02) ? 0x01 : 0x00; /* right button */ sprintf(ret, "%02X%02X%01X", (int8_t) y, (int8_t) x, but & 0x0f); for (i = 0; i < 5; i++) - dev->data[i] = ret[4 - i]; + dev->data[i] = ret[4 - i]; return 5; } - static void sermouse_report(int x, int y, int z, int b, mouse_t *dev) { @@ -318,102 +304,97 @@ sermouse_report(int x, int y, int z, int b, mouse_t *dev) /* If the mouse is 2-button, ignore the middle button. */ if (dev->but == 2) - b &= ~0x04; + b &= ~0x04; switch (dev->format) { - case 0: - len = sermouse_data_msystems(dev, x, y, b); - break; - case 1: - len = sermouse_data_3bp(dev, x, y, b); - break; - case 2: - len = sermouse_data_hex(dev, x, y, b); - break; - case 3: /* Relative */ - len = sermouse_data_bp1(dev, x, y, b); - break; - case 5: - len = sermouse_data_mmseries(dev, x, y, b); - break; - case 6: /* Absolute */ - len = sermouse_data_bp1(dev, dev->abs_x, dev->abs_y, b); - break; - case 7: - len = sermouse_data_ms(dev, x, y, z, b); - break; + case 0: + len = sermouse_data_msystems(dev, x, y, b); + break; + case 1: + len = sermouse_data_3bp(dev, x, y, b); + break; + case 2: + len = sermouse_data_hex(dev, x, y, b); + break; + case 3: /* Relative */ + len = sermouse_data_bp1(dev, x, y, b); + break; + case 5: + len = sermouse_data_mmseries(dev, x, y, b); + break; + case 6: /* Absolute */ + len = sermouse_data_bp1(dev, dev->abs_x, dev->abs_y, b); + break; + case 7: + len = sermouse_data_ms(dev, x, y, z, b); + break; } dev->data_len = len; } - static void sermouse_command_phase_idle(mouse_t *dev) { - dev->command_pos = 0; - dev->command_phase = PHASE_IDLE; + dev->command_pos = 0; + dev->command_phase = PHASE_IDLE; dev->command_enabled = 0; } - static void sermouse_command_pos_check(mouse_t *dev, int len) { if (++dev->command_pos == len) - sermouse_command_phase_idle(dev); + sermouse_command_phase_idle(dev); else - timer_on_auto(&dev->command_timer, dev->transmit_period); + timer_on_auto(&dev->command_timer, dev->transmit_period); } - static uint8_t sermouse_last_button_status(mouse_t *dev) { uint8_t ret = 0x00; if (dev->oldb & 0x01) - ret |= 0x04; + ret |= 0x04; if (dev->oldb & 0x02) - ret |= 0x02; + ret |= 0x02; if (dev->oldb & 0x04) - ret |= 0x01; + ret |= 0x01; return ret; } - static void sermouse_update_delta(mouse_t *dev, int *local, int *global) { int min, max; if (dev->format == 3) { - min = -2048; - max = 2047; + min = -2048; + max = 2047; } else { - min = -128; - max = 127; + min = -128; + max = 127; } if (*global > max) { - *local = max; - *global -= max; + *local = max; + *global -= max; } else if (*global < min) { - *local = min; - *global += -min; + *local = min; + *global += -min; } else { - *local = *global; - *global = 0; + *local = *global; + *global = 0; } } - static uint8_t sermouse_update_data(mouse_t *dev) { uint8_t ret = 0; - int delta_x, delta_y, delta_z; + int delta_x, delta_y, delta_z; /* Update the deltas and the delays. */ sermouse_update_delta(dev, &delta_x, &dev->rel_x); @@ -423,10 +404,10 @@ sermouse_update_data(mouse_t *dev) sermouse_report(delta_x, delta_y, delta_z, dev->oldb, dev); mouse_serial_log("delta_x = %i, delta_y = %i, delta_z = %i, dev->oldb = %02X\n", - delta_x, delta_y, delta_z, dev->oldb); + delta_x, delta_y, delta_z, dev->oldb); if (delta_x || delta_y || delta_z || (dev->oldb != dev->lastb) || !dev->on_change) - ret = 1; + ret = 1; dev->lastb = dev->oldb; @@ -435,167 +416,167 @@ sermouse_update_data(mouse_t *dev) return ret; } - static double sermouse_report_period(mouse_t *dev) { if (dev->report_period == 0) - return dev->transmit_period; + return dev->transmit_period; else - return dev->report_period; + return dev->report_period; } - static void sermouse_report_prepare(mouse_t *dev) { if (sermouse_update_data(dev)) { - /* Start sending data. */ - dev->report_phase = REPORT_PHASE_TRANSMIT; - dev->report_pos = 0; - sermouse_timer_on(dev, dev->transmit_period, 1); + /* Start sending data. */ + dev->report_phase = REPORT_PHASE_TRANSMIT; + dev->report_pos = 0; + sermouse_timer_on(dev, dev->transmit_period, 1); } else { - dev->report_phase = REPORT_PHASE_PREPARE; - sermouse_timer_on(dev, sermouse_report_period(dev), 1); + dev->report_phase = REPORT_PHASE_PREPARE; + sermouse_timer_on(dev, sermouse_report_period(dev), 1); } } - static void sermouse_report_timer(void *priv) { - mouse_t *dev = (mouse_t *)priv; + mouse_t *dev = (mouse_t *) priv; if (dev->report_phase == REPORT_PHASE_PREPARE) - sermouse_report_prepare(dev); + sermouse_report_prepare(dev); else { - /* If using the Mouse Systems format, update data because - the last two bytes are the X and Y delta since bytes 1 - and 2 were transmitted. */ - if (!dev->format && (dev->report_pos == 3)) - sermouse_update_data(dev); - serial_write_fifo(dev->serial, dev->data[dev->report_pos]); - if (++dev->report_pos == dev->data_len) { - if (!dev->report_enabled) - sermouse_report_prepare(dev); - else { - sermouse_timer_on(dev, sermouse_report_period(dev), 1); - dev->report_phase = REPORT_PHASE_PREPARE; - } - } else - sermouse_timer_on(dev, dev->transmit_period, 1); + /* If using the Mouse Systems format, update data because + the last two bytes are the X and Y delta since bytes 1 + and 2 were transmitted. */ + if (!dev->format && (dev->report_pos == 3)) + sermouse_update_data(dev); + serial_write_fifo(dev->serial, dev->data[dev->report_pos]); + if (++dev->report_pos == dev->data_len) { + if (!dev->report_enabled) + sermouse_report_prepare(dev); + else { + sermouse_timer_on(dev, sermouse_report_period(dev), 1); + dev->report_phase = REPORT_PHASE_PREPARE; + } + } else + sermouse_timer_on(dev, dev->transmit_period, 1); } } - /* Callback timer expired, now send our "mouse ID" to the serial port. */ static void sermouse_command_timer(void *priv) { - mouse_t *dev = (mouse_t *)priv; + mouse_t *dev = (mouse_t *) priv; switch (dev->command_phase) { - case PHASE_ID: - serial_write_fifo(dev->serial, dev->id[dev->command_pos]); - sermouse_command_pos_check(dev, dev->id_len); - if ((dev->command_phase == PHASE_IDLE) && (dev->type != MOUSE_TYPE_MSYSTEMS)) { - /* This resets back to Microsoft-compatible mode. */ - dev->report_phase = REPORT_PHASE_PREPARE; - sermouse_report_timer((void *) dev); - } - break; - case PHASE_DATA: - serial_write_fifo(dev->serial, dev->data[dev->command_pos]); - sermouse_command_pos_check(dev, dev->data_len); - break; - case PHASE_STATUS: - serial_write_fifo(dev->serial, dev->status); - sermouse_command_phase_idle(dev); - break; - case PHASE_DIAGNOSTIC: - if (dev->command_pos) - serial_write_fifo(dev->serial, 0x00); - else - serial_write_fifo(dev->serial, sermouse_last_button_status(dev)); - sermouse_command_pos_check(dev, 3); - break; - case PHASE_FORMAT_AND_REVISION: - serial_write_fifo(dev->serial, 0x10 | (dev->format << 1)); - sermouse_command_phase_idle(dev); - break; - case PHASE_BUTTONS: - serial_write_fifo(dev->serial, dev->but); - sermouse_command_phase_idle(dev); - break; - default: - sermouse_command_phase_idle(dev); - break; + case PHASE_ID: + serial_write_fifo(dev->serial, dev->id[dev->command_pos]); + sermouse_command_pos_check(dev, dev->id_len); + if ((dev->command_phase == PHASE_IDLE) && (dev->type != MOUSE_TYPE_MSYSTEMS)) { + /* This resets back to Microsoft-compatible mode. */ + dev->report_phase = REPORT_PHASE_PREPARE; + sermouse_report_timer((void *) dev); + } + break; + case PHASE_DATA: + serial_write_fifo(dev->serial, dev->data[dev->command_pos]); + sermouse_command_pos_check(dev, dev->data_len); + break; + case PHASE_STATUS: + serial_write_fifo(dev->serial, dev->status); + sermouse_command_phase_idle(dev); + break; + case PHASE_DIAGNOSTIC: + if (dev->command_pos) + serial_write_fifo(dev->serial, 0x00); + else + serial_write_fifo(dev->serial, sermouse_last_button_status(dev)); + sermouse_command_pos_check(dev, 3); + break; + case PHASE_FORMAT_AND_REVISION: + serial_write_fifo(dev->serial, 0x10 | (dev->format << 1)); + sermouse_command_phase_idle(dev); + break; + case PHASE_BUTTONS: + serial_write_fifo(dev->serial, dev->but); + sermouse_command_phase_idle(dev); + break; + default: + sermouse_command_phase_idle(dev); + break; } } - static int sermouse_poll(int x, int y, int z, int b, void *priv) { - mouse_t *dev = (mouse_t *)priv; + mouse_t *dev = (mouse_t *) priv; if (!x && !y && !z && (b == dev->oldb)) { - dev->oldb = b; - return(1); + dev->oldb = b; + return (1); } dev->oldb = b; dev->abs_x += x; dev->abs_y += y; if (dev->abs_x < 0) - dev->abs_x = 0; + dev->abs_x = 0; if (dev->abs_x > 4095) - dev->abs_x = 4095; + dev->abs_x = 4095; if (dev->abs_y < 0) - dev->abs_y = 0; + dev->abs_y = 0; if (dev->abs_y > 4095) - dev->abs_y = 4095; + dev->abs_y = 4095; if (dev->format == 3) { - if (x > 2047) x = 2047; - if (y > 2047) y = 2047; - if (x <- 2048) x = -2048; - if (y <- 2048) y = -2048; + if (x > 2047) + x = 2047; + if (y > 2047) + y = 2047; + if (x < -2048) + x = -2048; + if (y < -2048) + y = -2048; } else { - if (x > 127) x = 127; - if (y > 127) y = 127; - if (x <- 128) x = -128; - if (y <- 128) y = -128; + if (x > 127) + x = 127; + if (y > 127) + y = 127; + if (x < -128) + x = -128; + if (y < -128) + y = -128; } dev->rel_x += x; dev->rel_y += y; dev->rel_z += z; - return(0); + return (0); } - static void ltsermouse_prompt_mode(mouse_t *dev, int prompt) { dev->prompt = prompt; dev->status &= 0xBF; if (prompt) - dev->status |= 0x40; + dev->status |= 0x40; } - static void ltsermouse_command_phase(mouse_t *dev, int phase) { - dev->command_pos = 0; + dev->command_pos = 0; dev->command_phase = phase; timer_stop(&dev->command_timer); sermouse_timer_on(dev, dev->transmit_period, 0); } - static void ltsermouse_set_report_period(mouse_t *dev, int rps) { @@ -606,198 +587,197 @@ ltsermouse_set_report_period(mouse_t *dev, int rps) dev->report_phase = REPORT_PHASE_PREPARE; } - static void ltsermouse_write(struct serial_s *serial, void *priv, uint8_t data) { - mouse_t *dev = (mouse_t *)priv; + mouse_t *dev = (mouse_t *) priv; /* Stop reporting when we're processing a command. */ dev->report_phase = REPORT_PHASE_PREPARE; - if (dev->want_data) switch (dev->want_data) { - case 0x2A: - dev->data_len--; - dev->want_data = 0; - switch (data) { - default: - mouse_serial_log("Serial mouse: Invalid period %02X, using 1200 bps\n", data); - /*FALLTHROUGH*/ - case 0x6E: - dev->transmit_period = sermouse_transmit_period(dev, 1200, -1); - break; - case 0x6F: - dev->transmit_period = sermouse_transmit_period(dev, 2400, -1); - break; - case 0x70: - dev->transmit_period = sermouse_transmit_period(dev, 4800, -1); - break; - case 0x71: - dev->transmit_period = sermouse_transmit_period(dev, 9600, -1); - break; - } - break; - } else switch (data) { - case 0x2A: - dev->want_data = data; - dev->data_len = 1; - break; - case 0x44: /* Set prompt mode */ - ltsermouse_prompt_mode(dev, 1); - break; - case 0x50: - if (!dev->prompt) - ltsermouse_prompt_mode(dev, 1); - sermouse_update_data(dev); - ltsermouse_command_phase(dev, PHASE_DATA); - break; - case 0x73: /* Status */ - ltsermouse_command_phase(dev, PHASE_STATUS); - break; - case 0x4A: /* Report Rate Selection commands */ - ltsermouse_set_report_period(dev, 10); - break; - case 0x4B: - ltsermouse_set_report_period(dev, 20); - break; - case 0x4C: - ltsermouse_set_report_period(dev, 35); - break; - case 0x52: - ltsermouse_set_report_period(dev, 50); - break; - case 0x4D: - ltsermouse_set_report_period(dev, 70); - break; - case 0x51: - ltsermouse_set_report_period(dev, 100); - break; - case 0x4E: - ltsermouse_set_report_period(dev, 150); - break; - case 0x4F: - ltsermouse_prompt_mode(dev, 0); - dev->report_period = 0; - timer_stop(&dev->report_timer); - dev->report_phase = REPORT_PHASE_PREPARE; - sermouse_report_timer((void *) dev); - break; - case 0x41: - dev->format = 6; /* Aboslute Bit Pad One Format */ - dev->abs_x = dev->abs_y = 0; - break; - case 0x42: - dev->format = 3; /* Relative Bit Pad One Format */ - break; - case 0x53: - dev->format = 5; /* MM Series Format */ - break; - case 0x54: - dev->format = 1; /* Three Byte Packed Binary Format */ - break; - case 0x55: /* This is the Mouse Systems-compatible format */ - dev->format = 0; /* Five Byte Packed Binary Format */ - break; - case 0x56: - dev->format = 7; /* Microsoft Compatible Format */ - break; - case 0x57: - dev->format = 2; /* Hexadecimal Format */ - break; - case 0x05: - ltsermouse_command_phase(dev, PHASE_DIAGNOSTIC); - break; - case 0x66: - ltsermouse_command_phase(dev, PHASE_FORMAT_AND_REVISION); - break; - case 0x6B: - ltsermouse_command_phase(dev, PHASE_BUTTONS); - break; - } + if (dev->want_data) + switch (dev->want_data) { + case 0x2A: + dev->data_len--; + dev->want_data = 0; + switch (data) { + default: + mouse_serial_log("Serial mouse: Invalid period %02X, using 1200 bps\n", data); + /*FALLTHROUGH*/ + case 0x6E: + dev->transmit_period = sermouse_transmit_period(dev, 1200, -1); + break; + case 0x6F: + dev->transmit_period = sermouse_transmit_period(dev, 2400, -1); + break; + case 0x70: + dev->transmit_period = sermouse_transmit_period(dev, 4800, -1); + break; + case 0x71: + dev->transmit_period = sermouse_transmit_period(dev, 9600, -1); + break; + } + break; + } + else + switch (data) { + case 0x2A: + dev->want_data = data; + dev->data_len = 1; + break; + case 0x44: /* Set prompt mode */ + ltsermouse_prompt_mode(dev, 1); + break; + case 0x50: + if (!dev->prompt) + ltsermouse_prompt_mode(dev, 1); + sermouse_update_data(dev); + ltsermouse_command_phase(dev, PHASE_DATA); + break; + case 0x73: /* Status */ + ltsermouse_command_phase(dev, PHASE_STATUS); + break; + case 0x4A: /* Report Rate Selection commands */ + ltsermouse_set_report_period(dev, 10); + break; + case 0x4B: + ltsermouse_set_report_period(dev, 20); + break; + case 0x4C: + ltsermouse_set_report_period(dev, 35); + break; + case 0x52: + ltsermouse_set_report_period(dev, 50); + break; + case 0x4D: + ltsermouse_set_report_period(dev, 70); + break; + case 0x51: + ltsermouse_set_report_period(dev, 100); + break; + case 0x4E: + ltsermouse_set_report_period(dev, 150); + break; + case 0x4F: + ltsermouse_prompt_mode(dev, 0); + dev->report_period = 0; + timer_stop(&dev->report_timer); + dev->report_phase = REPORT_PHASE_PREPARE; + sermouse_report_timer((void *) dev); + break; + case 0x41: + dev->format = 6; /* Aboslute Bit Pad One Format */ + dev->abs_x = dev->abs_y = 0; + break; + case 0x42: + dev->format = 3; /* Relative Bit Pad One Format */ + break; + case 0x53: + dev->format = 5; /* MM Series Format */ + break; + case 0x54: + dev->format = 1; /* Three Byte Packed Binary Format */ + break; + case 0x55: /* This is the Mouse Systems-compatible format */ + dev->format = 0; /* Five Byte Packed Binary Format */ + break; + case 0x56: + dev->format = 7; /* Microsoft Compatible Format */ + break; + case 0x57: + dev->format = 2; /* Hexadecimal Format */ + break; + case 0x05: + ltsermouse_command_phase(dev, PHASE_DIAGNOSTIC); + break; + case 0x66: + ltsermouse_command_phase(dev, PHASE_FORMAT_AND_REVISION); + break; + case 0x6B: + ltsermouse_command_phase(dev, PHASE_BUTTONS); + break; + } } - static void sermouse_speed_changed(void *priv) { - mouse_t *dev = (mouse_t *)priv; + mouse_t *dev = (mouse_t *) priv; if (dev->report_enabled) { - timer_stop(&dev->report_timer); - if (dev->report_phase == REPORT_PHASE_TRANSMIT) - sermouse_timer_on(dev, dev->transmit_period, 1); - else - sermouse_timer_on(dev, sermouse_report_period(dev), 1); + timer_stop(&dev->report_timer); + if (dev->report_phase == REPORT_PHASE_TRANSMIT) + sermouse_timer_on(dev, dev->transmit_period, 1); + else + sermouse_timer_on(dev, sermouse_report_period(dev), 1); } if (dev->command_enabled) { - timer_stop(&dev->command_timer); - sermouse_timer_on(dev, dev->transmit_period, 0); + timer_stop(&dev->command_timer); + sermouse_timer_on(dev, dev->transmit_period, 0); } } - static void sermouse_close(void *priv) { - mouse_t *dev = (mouse_t *)priv; + mouse_t *dev = (mouse_t *) priv; /* Detach serial port from the mouse. */ if (dev && dev->serial && dev->serial->sd) - memset(dev->serial->sd, 0, sizeof(serial_device_t)); + memset(dev->serial->sd, 0, sizeof(serial_device_t)); free(dev); } - /* Initialize the device for use by the user. */ static void * sermouse_init(const device_t *info) { mouse_t *dev; - dev = (mouse_t *)malloc(sizeof(mouse_t)); + dev = (mouse_t *) malloc(sizeof(mouse_t)); memset(dev, 0x00, sizeof(mouse_t)); dev->name = info->name; - dev->but = device_get_config_int("buttons"); + dev->but = device_get_config_int("buttons"); if (dev->but > 2) - dev->flags |= FLAG_3BTN; + dev->flags |= FLAG_3BTN; if (info->local == MOUSE_TYPE_MSYSTEMS) { - dev->on_change = 1; - dev->format = 0; - dev->type = info->local; - dev->id_len = 1; - dev->id[0] = 'H'; + dev->on_change = 1; + dev->format = 0; + dev->type = info->local; + dev->id_len = 1; + dev->id[0] = 'H'; } else { - dev->on_change = !info->local; - dev->format = 7; - dev->status = 0x0f; - dev->id_len = 1; - dev->id[0] = 'M'; - switch(dev->but) { - case 2: - default: - dev->type = info->local ? MOUSE_TYPE_LOGITECH : MOUSE_TYPE_MICROSOFT; - break; - case 3: - dev->type = info->local ? MOUSE_TYPE_LT3BUTTON : MOUSE_TYPE_MS3BUTTON; - dev->id_len = 2; - dev->id[1] = '3'; - break; - case 4: - dev->type = MOUSE_TYPE_MSWHEEL; - dev->id_len = 6; - dev->id[1] = 'Z'; - dev->id[2] = '@'; - break; - } + dev->on_change = !info->local; + dev->format = 7; + dev->status = 0x0f; + dev->id_len = 1; + dev->id[0] = 'M'; + switch (dev->but) { + case 2: + default: + dev->type = info->local ? MOUSE_TYPE_LOGITECH : MOUSE_TYPE_MICROSOFT; + break; + case 3: + dev->type = info->local ? MOUSE_TYPE_LT3BUTTON : MOUSE_TYPE_MS3BUTTON; + dev->id_len = 2; + dev->id[1] = '3'; + break; + case 4: + dev->type = MOUSE_TYPE_MSWHEEL; + dev->id_len = 6; + dev->id[1] = 'Z'; + dev->id[2] = '@'; + break; + } } dev->transmit_period = sermouse_transmit_period(dev, 1200, -1); /* Default: Continuous reporting = no delay between reports. */ - dev->report_phase = REPORT_PHASE_PREPARE; + dev->report_phase = REPORT_PHASE_PREPARE; dev->report_period = 0; /* Default: Doing nothing - command transmit timer deactivated. */ @@ -807,9 +787,9 @@ sermouse_init(const device_t *info) /* Attach a serial port to the mouse. */ if (info->local) - dev->serial = serial_attach(dev->port, sermouse_callback, ltsermouse_write, dev); + dev->serial = serial_attach(dev->port, sermouse_callback, ltsermouse_write, dev); else - dev->serial = serial_attach(dev->port, sermouse_callback, NULL, dev); + dev->serial = serial_attach(dev->port, sermouse_callback, NULL, dev); mouse_serial_log("%s: port=COM%d\n", dev->name, dev->port + 1); @@ -817,19 +797,19 @@ sermouse_init(const device_t *info) timer_add(&dev->command_timer, sermouse_command_timer, dev, 0); if (info->local == MOUSE_TYPE_MSYSTEMS) { - sermouse_timer_on(dev, dev->transmit_period, 1); - dev->report_enabled = 1; + sermouse_timer_on(dev, dev->transmit_period, 1); + dev->report_enabled = 1; } /* Tell them how many buttons we have. */ mouse_set_buttons((dev->flags & FLAG_3BTN) ? 3 : 2); /* Return our private data to the I/O layer. */ - return(dev); + return (dev); } static const device_config_t mssermouse_config[] = { -// clang-format off + // clang-format off { .name = "port", .description = "Serial Port", @@ -862,11 +842,11 @@ static const device_config_t mssermouse_config[] = { } }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_config_t ltsermouse_config[] = { -// clang-format off + // clang-format off { .name = "port", .description = "Serial Port", @@ -902,43 +882,43 @@ static const device_config_t ltsermouse_config[] = { }; const device_t mouse_mssystems_device = { - .name = "Mouse Systems Serial Mouse", + .name = "Mouse Systems Serial Mouse", .internal_name = "mssystems", - .flags = DEVICE_COM, - .local = MOUSE_TYPE_MSYSTEMS, - .init = sermouse_init, - .close = sermouse_close, - .reset = NULL, + .flags = DEVICE_COM, + .local = MOUSE_TYPE_MSYSTEMS, + .init = sermouse_init, + .close = sermouse_close, + .reset = NULL, { .poll = sermouse_poll }, .speed_changed = sermouse_speed_changed, - .force_redraw = NULL, - .config = mssermouse_config + .force_redraw = NULL, + .config = mssermouse_config }; const device_t mouse_msserial_device = { - .name = "Microsoft Serial Mouse", + .name = "Microsoft Serial Mouse", .internal_name = "msserial", - .flags = DEVICE_COM, - .local = 0, - .init = sermouse_init, - .close = sermouse_close, - .reset = NULL, + .flags = DEVICE_COM, + .local = 0, + .init = sermouse_init, + .close = sermouse_close, + .reset = NULL, { .poll = sermouse_poll }, .speed_changed = sermouse_speed_changed, - .force_redraw = NULL, - .config = mssermouse_config + .force_redraw = NULL, + .config = mssermouse_config }; const device_t mouse_ltserial_device = { - .name = "Logitech Serial Mouse", + .name = "Logitech Serial Mouse", .internal_name = "ltserial", - .flags = DEVICE_COM, - .local = 1, - .init = sermouse_init, - .close = sermouse_close, - .reset = NULL, + .flags = DEVICE_COM, + .local = 1, + .init = sermouse_init, + .close = sermouse_close, + .reset = NULL, { .poll = sermouse_poll }, .speed_changed = sermouse_speed_changed, - .force_redraw = NULL, - .config = ltsermouse_config + .force_redraw = NULL, + .config = ltsermouse_config }; diff --git a/src/device/pci_bridge.c b/src/device/pci_bridge.c index 583b77262..bc0f685d3 100644 --- a/src/device/pci_bridge.c +++ b/src/device/pci_bridge.c @@ -31,55 +31,50 @@ #include <86box/device.h> #include <86box/pci.h> +#define PCI_BRIDGE_DEC_21150 0x10110022 +#define AGP_BRIDGE_ALI_M5243 0x10b95243 +#define AGP_BRIDGE_ALI_M5247 0x10b95247 +#define AGP_BRIDGE_INTEL_440LX 0x80867181 +#define AGP_BRIDGE_INTEL_440BX 0x80867191 +#define AGP_BRIDGE_INTEL_440GX 0x808671a1 +#define AGP_BRIDGE_VIA_597 0x11068597 +#define AGP_BRIDGE_VIA_598 0x11068598 +#define AGP_BRIDGE_VIA_691 0x11068691 +#define AGP_BRIDGE_VIA_8601 0x11068601 -#define PCI_BRIDGE_DEC_21150 0x10110022 -#define AGP_BRIDGE_ALI_M5243 0x10b95243 -#define AGP_BRIDGE_ALI_M5247 0x10b95247 -#define AGP_BRIDGE_INTEL_440LX 0x80867181 -#define AGP_BRIDGE_INTEL_440BX 0x80867191 -#define AGP_BRIDGE_INTEL_440GX 0x808671a1 -#define AGP_BRIDGE_VIA_597 0x11068597 -#define AGP_BRIDGE_VIA_598 0x11068598 -#define AGP_BRIDGE_VIA_691 0x11068691 -#define AGP_BRIDGE_VIA_8601 0x11068601 - -#define AGP_BRIDGE_ALI(x) (((x) >> 16) == 0x10b9) -#define AGP_BRIDGE_INTEL(x) (((x) >> 16) == 0x8086) -#define AGP_BRIDGE_VIA(x) (((x) >> 16) == 0x1106) -#define AGP_BRIDGE(x) ((x) >= AGP_BRIDGE_ALI_M5243) - +#define AGP_BRIDGE_ALI(x) (((x) >> 16) == 0x10b9) +#define AGP_BRIDGE_INTEL(x) (((x) >> 16) == 0x8086) +#define AGP_BRIDGE_VIA(x) (((x) >> 16) == 0x1106) +#define AGP_BRIDGE(x) ((x) >= AGP_BRIDGE_ALI_M5243) typedef struct { - uint32_t local; - uint8_t type, ctl; + uint32_t local; + uint8_t type, ctl; - uint8_t regs[256]; - uint8_t bus_index; - int slot; + uint8_t regs[256]; + uint8_t bus_index; + int slot; } pci_bridge_t; - #ifdef ENABLE_PCI_BRIDGE_LOG int pci_bridge_do_log = ENABLE_PCI_BRIDGE_LOG; - static void pci_bridge_log(const char *fmt, ...) { va_list ap; if (pci_bridge_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define pci_bridge_log(fmt, ...) +# define pci_bridge_log(fmt, ...) #endif - void pci_bridge_set_ctl(void *priv, uint8_t ctl) { @@ -88,7 +83,6 @@ pci_bridge_set_ctl(void *priv, uint8_t ctl) dev->ctl = ctl; } - static void pci_bridge_write(int func, int addr, uint8_t val, void *priv) { @@ -97,266 +91,287 @@ pci_bridge_write(int func, int addr, uint8_t val, void *priv) pci_bridge_log("PCI Bridge %d: write(%d, %02X, %02X)\n", dev->bus_index, func, addr, val); if (func > 0) - return; + return; if ((dev->local == AGP_BRIDGE_ALI_M5247) && (addr >= 0x40)) - return; + return; switch (addr) { - case 0x00: case 0x01: case 0x02: case 0x03: - case 0x06: case 0x08: case 0x09: case 0x0a: - case 0x0b: case 0x0e: case 0x0f: case 0x10: - case 0x11: case 0x12: case 0x13: case 0x14: - case 0x15: case 0x16: case 0x17: case 0x1e: - case 0x34: case 0x3d: case 0x67: case 0xdc: - case 0xdd: case 0xde: case 0xdf: - return; + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x06: + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + case 0x0e: + case 0x0f: + case 0x10: + case 0x11: + case 0x12: + case 0x13: + case 0x14: + case 0x15: + case 0x16: + case 0x17: + case 0x1e: + case 0x34: + case 0x3d: + case 0x67: + case 0xdc: + case 0xdd: + case 0xde: + case 0xdf: + return; - case 0x04: - if (AGP_BRIDGE_INTEL(dev->local)) { - if (dev->local == AGP_BRIDGE_INTEL_440BX) - val &= 0x1f; - } else if (dev->local == AGP_BRIDGE_ALI_M5243) - val |= 0x02; - else if (dev->local == AGP_BRIDGE_ALI_M5247) - val &= 0xc3; - else - val &= 0x67; - break; + case 0x04: + if (AGP_BRIDGE_INTEL(dev->local)) { + if (dev->local == AGP_BRIDGE_INTEL_440BX) + val &= 0x1f; + } else if (dev->local == AGP_BRIDGE_ALI_M5243) + val |= 0x02; + else if (dev->local == AGP_BRIDGE_ALI_M5247) + val &= 0xc3; + else + val &= 0x67; + break; - case 0x05: - if (AGP_BRIDGE_INTEL(dev->local)) - val &= 0x01; - else if (AGP_BRIDGE_ALI(dev->local)) - val &= 0x01; - else - val &= 0x03; - break; + case 0x05: + if (AGP_BRIDGE_INTEL(dev->local)) + val &= 0x01; + else if (AGP_BRIDGE_ALI(dev->local)) + val &= 0x01; + else + val &= 0x03; + break; - case 0x07: - if (dev->local == AGP_BRIDGE_INTEL_440LX) - dev->regs[addr] &= ~(val & 0x40); - else if (dev->local == AGP_BRIDGE_ALI_M5243) - dev->regs[addr] &= ~(val & 0xf8); - else if (dev->local == AGP_BRIDGE_ALI_M5247) - dev->regs[addr] &= ~(val & 0xc0); - return; + case 0x07: + if (dev->local == AGP_BRIDGE_INTEL_440LX) + dev->regs[addr] &= ~(val & 0x40); + else if (dev->local == AGP_BRIDGE_ALI_M5243) + dev->regs[addr] &= ~(val & 0xf8); + else if (dev->local == AGP_BRIDGE_ALI_M5247) + dev->regs[addr] &= ~(val & 0xc0); + return; - case 0x0c: case 0x18: - /* Parent bus number (0x18) is always 0 on AGP bridges. */ - if (AGP_BRIDGE(dev->local)) - return; - break; + case 0x0c: + case 0x18: + /* Parent bus number (0x18) is always 0 on AGP bridges. */ + if (AGP_BRIDGE(dev->local)) + return; + break; - case 0x0d: - if (AGP_BRIDGE_VIA(dev->local)) - return; - else if (AGP_BRIDGE_INTEL(dev->local)) - val &= 0xf8; - else if (AGP_BRIDGE_ALI(dev->local)) - val &= 0xf8; - break; + case 0x0d: + if (AGP_BRIDGE_VIA(dev->local)) + return; + else if (AGP_BRIDGE_INTEL(dev->local)) + val &= 0xf8; + else if (AGP_BRIDGE_ALI(dev->local)) + val &= 0xf8; + break; - case 0x19: - /* Set our bus number. */ - pci_bridge_log("PCI Bridge %d: remapping from bus %02X to %02X\n", dev->bus_index, dev->regs[addr], val); - pci_remap_bus(dev->bus_index, val); - break; + case 0x19: + /* Set our bus number. */ + pci_bridge_log("PCI Bridge %d: remapping from bus %02X to %02X\n", dev->bus_index, dev->regs[addr], val); + pci_remap_bus(dev->bus_index, val); + break; - case 0x1f: - if (AGP_BRIDGE_INTEL(dev->local)) { - if (dev->local == AGP_BRIDGE_INTEL_440LX) - dev->regs[addr] &= ~(val & 0xf1); - else if ((dev->local == AGP_BRIDGE_INTEL_440BX) || - (dev->local == AGP_BRIDGE_INTEL_440GX)) - dev->regs[addr] &= ~(val & 0xf0); - } else if (AGP_BRIDGE_ALI(dev->local)) - dev->regs[addr] &= ~(val & 0xf0); - return; + case 0x1f: + if (AGP_BRIDGE_INTEL(dev->local)) { + if (dev->local == AGP_BRIDGE_INTEL_440LX) + dev->regs[addr] &= ~(val & 0xf1); + else if ((dev->local == AGP_BRIDGE_INTEL_440BX) || (dev->local == AGP_BRIDGE_INTEL_440GX)) + dev->regs[addr] &= ~(val & 0xf0); + } else if (AGP_BRIDGE_ALI(dev->local)) + dev->regs[addr] &= ~(val & 0xf0); + return; - case 0x1c: case 0x1d: case 0x20: case 0x22: - case 0x24: case 0x26: - val &= 0xf0; - break; + case 0x1c: + case 0x1d: + case 0x20: + case 0x22: + case 0x24: + case 0x26: + val &= 0xf0; + break; - case 0x3c: - if (!(dev->ctl & 0x80)) - return; - break; + case 0x3c: + if (!(dev->ctl & 0x80)) + return; + break; - case 0x3e: - if (AGP_BRIDGE_VIA(dev->local)) - val &= 0x0c; - else if (dev->local == AGP_BRIDGE_ALI_M5247) - val &= 0x0f; - else if (dev->local == AGP_BRIDGE_ALI_M5243) - return; - else if (AGP_BRIDGE(dev->local)) { - if ((dev->local == AGP_BRIDGE_INTEL_440BX) || - (dev->local == AGP_BRIDGE_INTEL_440GX)) - val &= 0xed; - else - val &= 0x0f; - } - else if (dev->local == PCI_BRIDGE_DEC_21150) - val &= 0xef; - break; + case 0x3e: + if (AGP_BRIDGE_VIA(dev->local)) + val &= 0x0c; + else if (dev->local == AGP_BRIDGE_ALI_M5247) + val &= 0x0f; + else if (dev->local == AGP_BRIDGE_ALI_M5243) + return; + else if (AGP_BRIDGE(dev->local)) { + if ((dev->local == AGP_BRIDGE_INTEL_440BX) || (dev->local == AGP_BRIDGE_INTEL_440GX)) + val &= 0xed; + else + val &= 0x0f; + } else if (dev->local == PCI_BRIDGE_DEC_21150) + val &= 0xef; + break; - case 0x3f: - if (dev->local == AGP_BRIDGE_INTEL_440LX) { - dev->regs[addr] = ((dev->regs[addr] & 0x04) | (val & 0x02)) & ~(val & 0x04); - return; - } else if (dev->local == AGP_BRIDGE_ALI_M5247) - return; - else if (dev->local == AGP_BRIDGE_ALI_M5243) - val &= 0x06; - else if (AGP_BRIDGE(dev->local)) - return; - else if (dev->local == PCI_BRIDGE_DEC_21150) - val &= 0x0f; - break; + case 0x3f: + if (dev->local == AGP_BRIDGE_INTEL_440LX) { + dev->regs[addr] = ((dev->regs[addr] & 0x04) | (val & 0x02)) & ~(val & 0x04); + return; + } else if (dev->local == AGP_BRIDGE_ALI_M5247) + return; + else if (dev->local == AGP_BRIDGE_ALI_M5243) + val &= 0x06; + else if (AGP_BRIDGE(dev->local)) + return; + else if (dev->local == PCI_BRIDGE_DEC_21150) + val &= 0x0f; + break; - case 0x40: - if (dev->local == PCI_BRIDGE_DEC_21150) - val &= 0x32; - break; + case 0x40: + if (dev->local == PCI_BRIDGE_DEC_21150) + val &= 0x32; + break; - case 0x41: - if (AGP_BRIDGE_VIA(dev->local)) - val &= 0x7e; - else if (dev->local == PCI_BRIDGE_DEC_21150) - val &= 0x07; - break; + case 0x41: + if (AGP_BRIDGE_VIA(dev->local)) + val &= 0x7e; + else if (dev->local == PCI_BRIDGE_DEC_21150) + val &= 0x07; + break; - case 0x42: - if (AGP_BRIDGE_VIA(dev->local)) - val &= 0xfe; - break; + case 0x42: + if (AGP_BRIDGE_VIA(dev->local)) + val &= 0xfe; + break; - case 0x43: - if (dev->local == PCI_BRIDGE_DEC_21150) - val &= 0x03; - break; + case 0x43: + if (dev->local == PCI_BRIDGE_DEC_21150) + val &= 0x03; + break; - case 0x64: - if (dev->local == PCI_BRIDGE_DEC_21150) - val &= 0x7e; - break; + case 0x64: + if (dev->local == PCI_BRIDGE_DEC_21150) + val &= 0x7e; + break; - case 0x69: - if (dev->local == PCI_BRIDGE_DEC_21150) - val &= 0x3f; - break; + case 0x69: + if (dev->local == PCI_BRIDGE_DEC_21150) + val &= 0x3f; + break; - case 0x86: - if (AGP_BRIDGE_ALI(dev->local)) - val &= 0x3f; - break; + case 0x86: + if (AGP_BRIDGE_ALI(dev->local)) + val &= 0x3f; + break; - case 0x87: - if (AGP_BRIDGE_ALI(dev->local)) - val &= 0x60; - break; + case 0x87: + if (AGP_BRIDGE_ALI(dev->local)) + val &= 0x60; + break; - case 0x88: - if (AGP_BRIDGE_ALI(dev->local)) - val &= 0x8c; - break; + case 0x88: + if (AGP_BRIDGE_ALI(dev->local)) + val &= 0x8c; + break; - case 0x8b: - if (AGP_BRIDGE_ALI(dev->local)) - val &= 0x0f; - break; + case 0x8b: + if (AGP_BRIDGE_ALI(dev->local)) + val &= 0x0f; + break; - case 0x8c: - if (AGP_BRIDGE_ALI(dev->local)) - val &= 0x83; - break; + case 0x8c: + if (AGP_BRIDGE_ALI(dev->local)) + val &= 0x83; + break; - case 0x8d: - if (AGP_BRIDGE_ALI(dev->local)) - return; - break; + case 0x8d: + if (AGP_BRIDGE_ALI(dev->local)) + return; + break; - case 0xe0: case 0xe1: - if (AGP_BRIDGE_ALI(dev->local)) { - if (!(dev->ctl & 0x20)) - return; - } else - return; - break; + case 0xe0: + case 0xe1: + if (AGP_BRIDGE_ALI(dev->local)) { + if (!(dev->ctl & 0x20)) + return; + } else + return; + break; - case 0xe2: - if (AGP_BRIDGE_ALI(dev->local)) { - if (dev->ctl & 0x20) - val &= 0x3f; - else - return; - } else - return; - break; - case 0xe3: - if (AGP_BRIDGE_ALI(dev->local)) { - if (dev->ctl & 0x20) - val &= 0xfe; - else - return; - } else - return; - break; + case 0xe2: + if (AGP_BRIDGE_ALI(dev->local)) { + if (dev->ctl & 0x20) + val &= 0x3f; + else + return; + } else + return; + break; + case 0xe3: + if (AGP_BRIDGE_ALI(dev->local)) { + if (dev->ctl & 0x20) + val &= 0xfe; + else + return; + } else + return; + break; - case 0xe4: - if (AGP_BRIDGE_ALI(dev->local)) { - if (dev->ctl & 0x20) - val &= 0x03; - else - return; - } - break; - case 0xe5: - if (AGP_BRIDGE_ALI(dev->local)) { - if (!(dev->ctl & 0x20)) - return; - } - break; + case 0xe4: + if (AGP_BRIDGE_ALI(dev->local)) { + if (dev->ctl & 0x20) + val &= 0x03; + else + return; + } + break; + case 0xe5: + if (AGP_BRIDGE_ALI(dev->local)) { + if (!(dev->ctl & 0x20)) + return; + } + break; - case 0xe6: - if (AGP_BRIDGE_ALI(dev->local)) { - if (dev->ctl & 0x20) - val &= 0xc0; - else - return; - } - break; + case 0xe6: + if (AGP_BRIDGE_ALI(dev->local)) { + if (dev->ctl & 0x20) + val &= 0xc0; + else + return; + } + break; - case 0xe7: - if (AGP_BRIDGE_ALI(dev->local)) { - if (!(dev->ctl & 0x20)) - return; - } - break; + case 0xe7: + if (AGP_BRIDGE_ALI(dev->local)) { + if (!(dev->ctl & 0x20)) + return; + } + break; } dev->regs[addr] = val; } - static uint8_t pci_bridge_read(int func, int addr, void *priv) { pci_bridge_t *dev = (pci_bridge_t *) priv; - uint8_t ret; + uint8_t ret; if (func > 0) - ret = 0xff; + ret = 0xff; else - ret = dev->regs[addr]; + ret = dev->regs[addr]; pci_bridge_log("PCI Bridge %d: read(%d, %02X) = %02X\n", dev->bus_index, func, addr, ret); return ret; } - static void pci_bridge_reset(void *priv) { @@ -374,51 +389,51 @@ pci_bridge_reset(void *priv) /* command and status */ switch (dev->local) { - case PCI_BRIDGE_DEC_21150: - dev->regs[0x06] = 0x80; - dev->regs[0x07] = 0x02; - break; + case PCI_BRIDGE_DEC_21150: + dev->regs[0x06] = 0x80; + dev->regs[0x07] = 0x02; + break; - case AGP_BRIDGE_ALI_M5243: - dev->regs[0x04] = 0x06; - dev->regs[0x07] = 0x04; - dev->regs[0x0d] = 0x20; - dev->regs[0x19] = 0x01; - dev->regs[0x1b] = 0x20; - dev->regs[0x34] = 0xe0; - dev->regs[0x89] = 0x20; - dev->regs[0x8a] = 0xa0; - dev->regs[0x8e] = 0x20; - dev->regs[0x8f] = 0x20; - dev->regs[0xe0] = 0x01; - pci_remap_bus(dev->bus_index, 0x01); - break; + case AGP_BRIDGE_ALI_M5243: + dev->regs[0x04] = 0x06; + dev->regs[0x07] = 0x04; + dev->regs[0x0d] = 0x20; + dev->regs[0x19] = 0x01; + dev->regs[0x1b] = 0x20; + dev->regs[0x34] = 0xe0; + dev->regs[0x89] = 0x20; + dev->regs[0x8a] = 0xa0; + dev->regs[0x8e] = 0x20; + dev->regs[0x8f] = 0x20; + dev->regs[0xe0] = 0x01; + pci_remap_bus(dev->bus_index, 0x01); + break; - case AGP_BRIDGE_ALI_M5247: - dev->regs[0x04] = 0x03; - dev->regs[0x08] = 0x01; - break; + case AGP_BRIDGE_ALI_M5247: + dev->regs[0x04] = 0x03; + dev->regs[0x08] = 0x01; + break; - case AGP_BRIDGE_INTEL_440LX: - dev->regs[0x06] = 0xa0; - dev->regs[0x07] = 0x02; - dev->regs[0x08] = 0x03; - break; + case AGP_BRIDGE_INTEL_440LX: + dev->regs[0x06] = 0xa0; + dev->regs[0x07] = 0x02; + dev->regs[0x08] = 0x03; + break; - case AGP_BRIDGE_INTEL_440BX: - case AGP_BRIDGE_INTEL_440GX: - dev->regs[0x06] = 0x20; - dev->regs[0x07] = dev->regs[0x08] = 0x02; - break; + case AGP_BRIDGE_INTEL_440BX: + case AGP_BRIDGE_INTEL_440GX: + dev->regs[0x06] = 0x20; + dev->regs[0x07] = dev->regs[0x08] = 0x02; + break; - case AGP_BRIDGE_VIA_597: - case AGP_BRIDGE_VIA_598: - case AGP_BRIDGE_VIA_691: - case AGP_BRIDGE_VIA_8601: - dev->regs[0x04] = 0x07; - dev->regs[0x06] = 0x20; - dev->regs[0x07] = 0x02; - break; + case AGP_BRIDGE_VIA_597: + case AGP_BRIDGE_VIA_598: + case AGP_BRIDGE_VIA_691: + case AGP_BRIDGE_VIA_8601: + dev->regs[0x04] = 0x07; + dev->regs[0x06] = 0x20; + dev->regs[0x07] = 0x02; + break; } /* class */ @@ -428,34 +443,33 @@ pci_bridge_reset(void *priv) /* IO BARs */ if (AGP_BRIDGE(dev->local)) - dev->regs[0x1c] = 0xf0; + dev->regs[0x1c] = 0xf0; else - dev->regs[0x1c] = dev->regs[0x1d] = 0x01; + dev->regs[0x1c] = dev->regs[0x1d] = 0x01; if (dev->local == AGP_BRIDGE_ALI_M5247) - dev->regs[0x1e] = 0x20; + dev->regs[0x1e] = 0x20; else if (!AGP_BRIDGE_VIA(dev->local)) { - dev->regs[0x1e] = AGP_BRIDGE(dev->local) ? 0xa0 : 0x80; - dev->regs[0x1f] = 0x02; + dev->regs[0x1e] = AGP_BRIDGE(dev->local) ? 0xa0 : 0x80; + dev->regs[0x1f] = 0x02; } /* prefetchable memory limits */ if (AGP_BRIDGE(dev->local)) { - dev->regs[0x20] = dev->regs[0x24] = 0xf0; - dev->regs[0x21] = dev->regs[0x25] = 0xff; + dev->regs[0x20] = dev->regs[0x24] = 0xf0; + dev->regs[0x21] = dev->regs[0x25] = 0xff; } else { - dev->regs[0x24] = dev->regs[0x26] = 0x01; + dev->regs[0x24] = dev->regs[0x26] = 0x01; } /* power management */ if (dev->local == PCI_BRIDGE_DEC_21150) { - dev->regs[0x34] = 0xdc; - dev->regs[0x43] = 0x02; - dev->regs[0xdc] = dev->regs[0xde] = 0x01; + dev->regs[0x34] = 0xdc; + dev->regs[0x43] = 0x02; + dev->regs[0xdc] = dev->regs[0xde] = 0x01; } } - static void * pci_bridge_init(const device_t *info) { @@ -464,7 +478,7 @@ pci_bridge_init(const device_t *info) pci_bridge_t *dev = (pci_bridge_t *) malloc(sizeof(pci_bridge_t)); memset(dev, 0, sizeof(pci_bridge_t)); - dev->local = info->local; + dev->local = info->local; dev->bus_index = pci_register_bus(); pci_bridge_log("PCI Bridge %d: init()\n", dev->bus_index); @@ -473,26 +487,26 @@ pci_bridge_init(const device_t *info) dev->slot = pci_add_card(AGP_BRIDGE(dev->local) ? PCI_ADD_AGPBRIDGE : PCI_ADD_BRIDGE, pci_bridge_read, pci_bridge_write, dev); interrupt_count = sizeof(interrupts); - interrupt_mask = interrupt_count - 1; + interrupt_mask = interrupt_count - 1; if (dev->slot < 32) { - for (i = 0; i < interrupt_count; i++) - interrupts[i] = pci_get_int(dev->slot, PCI_INTA + i); + for (i = 0; i < interrupt_count; i++) + interrupts[i] = pci_get_int(dev->slot, PCI_INTA + i); } pci_bridge_log("PCI Bridge %d: upstream bus %02X slot %02X interrupts %02X %02X %02X %02X\n", dev->bus_index, (dev->slot >> 5) & 0xff, dev->slot & 31, interrupts[0], interrupts[1], interrupts[2], interrupts[3]); if (info->local == PCI_BRIDGE_DEC_21150) - slot_count = 9; /* 9 bus masters */ + slot_count = 9; /* 9 bus masters */ else - slot_count = 1; /* AGP bridges always have 1 slot */ + slot_count = 1; /* AGP bridges always have 1 slot */ for (i = 0; i < slot_count; i++) { - /* Interrupts for bridge slots are assigned in round-robin: ABCD, BCDA, CDAB and so on. */ - pci_bridge_log("PCI Bridge %d: downstream slot %02X interrupts %02X %02X %02X %02X\n", dev->bus_index, i, interrupts[i & interrupt_mask], interrupts[(i + 1) & interrupt_mask], interrupts[(i + 2) & interrupt_mask], interrupts[(i + 3) & interrupt_mask]); - pci_register_bus_slot(dev->bus_index, i, AGP_BRIDGE(dev->local) ? PCI_CARD_AGP : PCI_CARD_NORMAL, - interrupts[i & interrupt_mask], - interrupts[(i + 1) & interrupt_mask], - interrupts[(i + 2) & interrupt_mask], - interrupts[(i + 3) & interrupt_mask]); + /* Interrupts for bridge slots are assigned in round-robin: ABCD, BCDA, CDAB and so on. */ + pci_bridge_log("PCI Bridge %d: downstream slot %02X interrupts %02X %02X %02X %02X\n", dev->bus_index, i, interrupts[i & interrupt_mask], interrupts[(i + 1) & interrupt_mask], interrupts[(i + 2) & interrupt_mask], interrupts[(i + 3) & interrupt_mask]); + pci_register_bus_slot(dev->bus_index, i, AGP_BRIDGE(dev->local) ? PCI_CARD_AGP : PCI_CARD_NORMAL, + interrupts[i & interrupt_mask], + interrupts[(i + 1) & interrupt_mask], + interrupts[(i + 2) & interrupt_mask], + interrupts[(i + 3) & interrupt_mask]); } return dev; @@ -500,143 +514,143 @@ pci_bridge_init(const device_t *info) /* PCI bridges */ const device_t dec21150_device = { - .name = "DEC 21150 PCI Bridge", + .name = "DEC 21150 PCI Bridge", .internal_name = "dec21150", - .flags = DEVICE_PCI, - .local = PCI_BRIDGE_DEC_21150, - .init = pci_bridge_init, - .close = NULL, - .reset = pci_bridge_reset, + .flags = DEVICE_PCI, + .local = PCI_BRIDGE_DEC_21150, + .init = pci_bridge_init, + .close = NULL, + .reset = pci_bridge_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; /* AGP bridges */ const device_t ali5243_agp_device = { - .name = "ALi M5243 AGP Bridge", + .name = "ALi M5243 AGP Bridge", .internal_name = "ali5243_agp", - .flags = DEVICE_PCI, - .local = AGP_BRIDGE_ALI_M5243, - .init = pci_bridge_init, - .close = NULL, - .reset = pci_bridge_reset, + .flags = DEVICE_PCI, + .local = AGP_BRIDGE_ALI_M5243, + .init = pci_bridge_init, + .close = NULL, + .reset = pci_bridge_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; /* AGP bridges */ const device_t ali5247_agp_device = { - .name = "ALi M5247 AGP Bridge", + .name = "ALi M5247 AGP Bridge", .internal_name = "ali5247_agp", - .flags = DEVICE_PCI, - .local = AGP_BRIDGE_ALI_M5247, - .init = pci_bridge_init, - .close = NULL, - .reset = pci_bridge_reset, + .flags = DEVICE_PCI, + .local = AGP_BRIDGE_ALI_M5247, + .init = pci_bridge_init, + .close = NULL, + .reset = pci_bridge_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i440lx_agp_device = { - .name = "Intel 82443LX/EX AGP Bridge", + .name = "Intel 82443LX/EX AGP Bridge", .internal_name = "i440lx_agp", - .flags = DEVICE_PCI, - .local = AGP_BRIDGE_INTEL_440LX, - .init = pci_bridge_init, - .close = NULL, - .reset = pci_bridge_reset, + .flags = DEVICE_PCI, + .local = AGP_BRIDGE_INTEL_440LX, + .init = pci_bridge_init, + .close = NULL, + .reset = pci_bridge_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i440bx_agp_device = { - .name = "Intel 82443BX/ZX AGP Bridge", + .name = "Intel 82443BX/ZX AGP Bridge", .internal_name = "i440bx_agp", - .flags = DEVICE_PCI, - .local = AGP_BRIDGE_INTEL_440BX, - .init = pci_bridge_init, - .close = NULL, - .reset = pci_bridge_reset, + .flags = DEVICE_PCI, + .local = AGP_BRIDGE_INTEL_440BX, + .init = pci_bridge_init, + .close = NULL, + .reset = pci_bridge_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i440gx_agp_device = { - .name = "Intel 82443GX AGP Bridge", + .name = "Intel 82443GX AGP Bridge", .internal_name = "i440gx_agp", - .flags = DEVICE_PCI, - .local = AGP_BRIDGE_INTEL_440GX, - .init = pci_bridge_init, - .close = NULL, - .reset = pci_bridge_reset, + .flags = DEVICE_PCI, + .local = AGP_BRIDGE_INTEL_440GX, + .init = pci_bridge_init, + .close = NULL, + .reset = pci_bridge_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_vp3_agp_device = { - .name = "VIA Apollo VP3 AGP Bridge", + .name = "VIA Apollo VP3 AGP Bridge", .internal_name = "via_vp3_agp", - .flags = DEVICE_PCI, - .local = AGP_BRIDGE_VIA_597, - .init = pci_bridge_init, - .close = NULL, - .reset = pci_bridge_reset, + .flags = DEVICE_PCI, + .local = AGP_BRIDGE_VIA_597, + .init = pci_bridge_init, + .close = NULL, + .reset = pci_bridge_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_mvp3_agp_device = { - .name = "VIA Apollo MVP3 AGP Bridge", + .name = "VIA Apollo MVP3 AGP Bridge", .internal_name = "via_mvp3_agp", - .flags = DEVICE_PCI, - .local = AGP_BRIDGE_VIA_598, - .init = pci_bridge_init, - .close = NULL, - .reset = pci_bridge_reset, + .flags = DEVICE_PCI, + .local = AGP_BRIDGE_VIA_598, + .init = pci_bridge_init, + .close = NULL, + .reset = pci_bridge_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_apro_agp_device = { - .name = "VIA Apollo Pro AGP Bridge", + .name = "VIA Apollo Pro AGP Bridge", .internal_name = "via_apro_agp", - .flags = DEVICE_PCI, - .local = AGP_BRIDGE_VIA_691, - .init = pci_bridge_init, - .close = NULL, - .reset = pci_bridge_reset, + .flags = DEVICE_PCI, + .local = AGP_BRIDGE_VIA_691, + .init = pci_bridge_init, + .close = NULL, + .reset = pci_bridge_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_vt8601_agp_device = { - .name = "VIA Apollo ProMedia AGP Bridge", + .name = "VIA Apollo ProMedia AGP Bridge", .internal_name = "via_vt8601_agp", - .flags = DEVICE_PCI, - .local = AGP_BRIDGE_VIA_8601, - .init = pci_bridge_init, - .close = NULL, - .reset = pci_bridge_reset, + .flags = DEVICE_PCI, + .local = AGP_BRIDGE_VIA_8601, + .init = pci_bridge_init, + .close = NULL, + .reset = pci_bridge_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/device/phoenix_486_jumper.c b/src/device/phoenix_486_jumper.c index 10f37c4ce..a0f6fdedf 100644 --- a/src/device/phoenix_486_jumper.c +++ b/src/device/phoenix_486_jumper.c @@ -11,7 +11,6 @@ * Copyright 2020 Tiseno100 */ - #include #include #include @@ -39,42 +38,38 @@ typedef struct { - uint8_t type, jumper; + uint8_t type, jumper; } phoenix_486_jumper_t; - #ifdef ENABLE_PHOENIX_486_JUMPER_LOG int phoenix_486_jumper_do_log = ENABLE_PHOENIX_486_JUMPER_LOG; - static void phoenix_486_jumper_log(const char *fmt, ...) { va_list ap; if (phoenix_486_jumper_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define phoenix_486_jumper_log(fmt, ...) +# define phoenix_486_jumper_log(fmt, ...) #endif - static void phoenix_486_jumper_write(uint16_t addr, uint8_t val, void *priv) { phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv; phoenix_486_jumper_log("Phoenix 486 Jumper: Write %02x\n", val); if (dev->type == 1) - dev->jumper = val & 0xbf; + dev->jumper = val & 0xbf; else - dev->jumper = val; + dev->jumper = val; } - static uint8_t phoenix_486_jumper_read(uint16_t addr, void *priv) { @@ -83,22 +78,20 @@ phoenix_486_jumper_read(uint16_t addr, void *priv) return dev->jumper; } - static void phoenix_486_jumper_reset(void *priv) { phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv; if (dev->type == 1) - dev->jumper = 0x00; + dev->jumper = 0x00; else { - dev->jumper = 0x9f; - if (gfxcard != 0x01) - dev->jumper |= 0x40; + dev->jumper = 0x9f; + if (gfxcard != 0x01) + dev->jumper |= 0x40; } } - static void phoenix_486_jumper_close(void *priv) { @@ -107,7 +100,6 @@ phoenix_486_jumper_close(void *priv) free(dev); } - static void * phoenix_486_jumper_init(const device_t *info) { @@ -124,29 +116,29 @@ phoenix_486_jumper_init(const device_t *info) } const device_t phoenix_486_jumper_device = { - .name = "Phoenix 486 Jumper Readout", + .name = "Phoenix 486 Jumper Readout", .internal_name = "phoenix_486_jumper", - .flags = 0, - .local = 0, - .init = phoenix_486_jumper_init, - .close = phoenix_486_jumper_close, - .reset = phoenix_486_jumper_reset, + .flags = 0, + .local = 0, + .init = phoenix_486_jumper_init, + .close = phoenix_486_jumper_close, + .reset = phoenix_486_jumper_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t phoenix_486_jumper_pci_device = { - .name = "Phoenix 486 Jumper Readout (PCI machines)", + .name = "Phoenix 486 Jumper Readout (PCI machines)", .internal_name = "phoenix_486_jumper_pci", - .flags = 0, - .local = 1, - .init = phoenix_486_jumper_init, - .close = phoenix_486_jumper_close, - .reset = phoenix_486_jumper_reset, + .flags = 0, + .local = 1, + .init = phoenix_486_jumper_init, + .close = phoenix_486_jumper_close, + .reset = phoenix_486_jumper_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/device/postcard.c b/src/device/postcard.c index 22598613f..e139d8592 100644 --- a/src/device/postcard.c +++ b/src/device/postcard.c @@ -29,58 +29,52 @@ #include <86box/postcard.h> #include "cpu.h" +static uint16_t postcard_port; +static uint8_t postcard_written; +static uint8_t postcard_code, postcard_prev_code; +#define UISTR_LEN 13 +static char postcard_str[UISTR_LEN]; /* UI output string */ -static uint16_t postcard_port; -static uint8_t postcard_written; -static uint8_t postcard_code, postcard_prev_code; -#define UISTR_LEN 13 -static char postcard_str[UISTR_LEN]; /* UI output string */ - - -extern void ui_sb_bugui(char *__str); - +extern void ui_sb_bugui(char *__str); #ifdef ENABLE_POSTCARD_LOG int postcard_do_log = ENABLE_POSTCARD_LOG; - static void postcard_log(const char *fmt, ...) { va_list ap; if (postcard_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else int postcard_do_log = 0; -#define postcard_log(fmt, ...) +# define postcard_log(fmt, ...) #endif - static void postcard_setui(void) { if (!postcard_written) - sprintf(postcard_str, "POST: -- --"); + sprintf(postcard_str, "POST: -- --"); else if (postcard_written == 1) - sprintf(postcard_str, "POST: %02X --", postcard_code); + sprintf(postcard_str, "POST: %02X --", postcard_code); else - sprintf(postcard_str, "POST: %02X %02X", postcard_code, postcard_prev_code); + sprintf(postcard_str, "POST: %02X %02X", postcard_code, postcard_prev_code); ui_sb_bugui(postcard_str); if (postcard_do_log) { - /* log same string sent to the UI */ - postcard_log("[%04X:%08X] %s\n", CS, cpu_state.pc, postcard_str); + /* log same string sent to the UI */ + postcard_log("[%04X:%08X] %s\n", CS, cpu_state.pc, postcard_str); } } - static void postcard_reset(void) { @@ -90,65 +84,64 @@ postcard_reset(void) postcard_setui(); } - static void postcard_write(uint16_t port, uint8_t val, void *priv) { if (postcard_written && (val == postcard_code)) - return; + return; postcard_prev_code = postcard_code; - postcard_code = val; + postcard_code = val; if (postcard_written < 2) - postcard_written++; + postcard_written++; postcard_setui(); } - static void * postcard_init(const device_t *info) { postcard_reset(); if (machine_has_bus(machine, MACHINE_BUS_MCA)) - postcard_port = 0x680; /* MCA machines */ + postcard_port = 0x680; /* MCA machines */ else if (strstr(machines[machine].name, " PS/2 ") || strstr(machine_getname_ex(machine), " PS/1 ")) - postcard_port = 0x190; /* ISA PS/2 machines */ + postcard_port = 0x190; /* ISA PS/2 machines */ else if (strstr(machines[machine].name, " IBM XT ")) - postcard_port = 0x60; /* IBM XT */ + postcard_port = 0x60; /* IBM XT */ else if (strstr(machines[machine].name, " IBM PCjr")) - postcard_port = 0x10; /* IBM PCjr */ + postcard_port = 0x10; /* IBM PCjr */ else if (strstr(machines[machine].name, " Compaq ") && !machine_has_bus(machine, MACHINE_BUS_PCI)) - postcard_port = 0x84; /* ISA Compaq machines */ + postcard_port = 0x84; /* ISA Compaq machines */ else - postcard_port = 0x80; /* AT and clone machines */ + postcard_port = 0x80; /* AT and clone machines */ postcard_log("POST card initializing on port %04Xh\n", postcard_port); - if (postcard_port) io_sethandler(postcard_port, 1, - NULL, NULL, NULL, postcard_write, NULL, NULL, NULL); + if (postcard_port) + io_sethandler(postcard_port, 1, + NULL, NULL, NULL, postcard_write, NULL, NULL, NULL); return postcard_write; } - static void postcard_close(UNUSED(void *priv)) { - if (postcard_port) io_removehandler(postcard_port, 1, - NULL, NULL, NULL, postcard_write, NULL, NULL, NULL); + if (postcard_port) + io_removehandler(postcard_port, 1, + NULL, NULL, NULL, postcard_write, NULL, NULL, NULL); } const device_t postcard_device = { - .name = "POST Card", + .name = "POST Card", .internal_name = "postcard", - .flags = DEVICE_ISA, - .local = 0, - .init = postcard_init, - .close = postcard_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = postcard_init, + .close = postcard_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/device/serial.c b/src/device/serial.c index 67063413f..48f206f84 100644 --- a/src/device/serial.c +++ b/src/device/serial.c @@ -38,7 +38,7 @@ #include <86box/serial.h> #include <86box/mouse.h> -serial_port_t com_ports[SERIAL_MAX]; +serial_port_t com_ports[SERIAL_MAX]; enum { SERIAL_INT_LSR = 1, diff --git a/src/device/smbus_ali7101.c b/src/device/smbus_ali7101.c index c56ecd881..1ac3f1710 100644 --- a/src/device/smbus_ali7101.c +++ b/src/device/smbus_ali7101.c @@ -29,59 +29,56 @@ #include <86box/i2c.h> #include <86box/smbus.h> - #ifdef ENABLE_SMBUS_ALI7101_LOG int smbus_ali7101_do_log = ENABLE_SMBUS_ALI7101_LOG; - static void smbus_ali7101_log(const char *fmt, ...) { va_list ap; if (smbus_ali7101_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define smbus_ali7101_log(fmt, ...) +# define smbus_ali7101_log(fmt, ...) #endif - static uint8_t smbus_ali7101_read(uint16_t addr, void *priv) { smbus_ali7101_t *dev = (smbus_ali7101_t *) priv; - uint8_t ret = 0x00; + uint8_t ret = 0x00; switch (addr - dev->io_base) { - case 0x00: - ret = dev->stat; - break; + case 0x00: + ret = dev->stat; + break; - case 0x03: - ret = dev->addr; - break; + case 0x03: + ret = dev->addr; + break; - case 0x04: - ret = dev->data0; - break; + case 0x04: + ret = dev->data0; + break; - case 0x05: - ret = dev->data1; - break; + case 0x05: + ret = dev->data1; + break; - case 0x06: - ret = dev->data[dev->index++]; - if (dev->index >= SMBUS_ALI7101_BLOCK_DATA_SIZE) - dev->index = 0; - break; + case 0x06: + ret = dev->data[dev->index++]; + if (dev->index >= SMBUS_ALI7101_BLOCK_DATA_SIZE) + dev->index = 0; + break; - case 0x07: - ret = dev->cmd; - break; + case 0x07: + ret = dev->cmd; + break; } smbus_ali7101_log("SMBus ALI7101: read(%02X) = %02x\n", addr, ret); @@ -89,152 +86,150 @@ smbus_ali7101_read(uint16_t addr, void *priv) return ret; } - static void smbus_ali7101_write(uint16_t addr, uint8_t val, void *priv) { smbus_ali7101_t *dev = (smbus_ali7101_t *) priv; - uint8_t smbus_addr, cmd, read, prev_stat; - uint16_t timer_bytes = 0; + uint8_t smbus_addr, cmd, read, prev_stat; + uint16_t timer_bytes = 0; smbus_ali7101_log("SMBus ALI7101: write(%02X, %02X)\n", addr, val); - prev_stat = dev->next_stat; + prev_stat = dev->next_stat; dev->next_stat = 0x04; switch (addr - dev->io_base) { - case 0x00: - dev->stat &= ~(val & 0xf2); - /* Make sure IDLE is set if we're not busy or errored. */ - if (dev->stat == 0x00) - dev->stat = 0x04; - break; + case 0x00: + dev->stat &= ~(val & 0xf2); + /* Make sure IDLE is set if we're not busy or errored. */ + if (dev->stat == 0x00) + dev->stat = 0x04; + break; - case 0x01: - dev->ctl = val & 0xfc; - if (val & 0x04) { /* cancel an in-progress command if KILL is set */ - if (prev_stat) { /* cancel only if a command is in progress */ - timer_disable(&dev->response_timer); - dev->stat = 0x80; /* raise FAILED */ - } - } else if (val & 0x08) { /* T_OUT_CMD */ - if (prev_stat) { /* cancel only if a command is in progress */ - timer_disable(&dev->response_timer); - dev->stat = 0x20; /* raise DEVICE_ERR */ - } - } + case 0x01: + dev->ctl = val & 0xfc; + if (val & 0x04) { /* cancel an in-progress command if KILL is set */ + if (prev_stat) { /* cancel only if a command is in progress */ + timer_disable(&dev->response_timer); + dev->stat = 0x80; /* raise FAILED */ + } + } else if (val & 0x08) { /* T_OUT_CMD */ + if (prev_stat) { /* cancel only if a command is in progress */ + timer_disable(&dev->response_timer); + dev->stat = 0x20; /* raise DEVICE_ERR */ + } + } - if (val & 0x80) - dev->index = 0; - break; + if (val & 0x80) + dev->index = 0; + break; - case 0x02: - /* dispatch command if START is set */ - timer_bytes++; /* address */ + case 0x02: + /* dispatch command if START is set */ + timer_bytes++; /* address */ - smbus_addr = (dev->addr >> 1); - read = dev->addr & 0x01; + smbus_addr = (dev->addr >> 1); + read = dev->addr & 0x01; - cmd = (dev->ctl >> 4) & 0x7; - smbus_ali7101_log("SMBus ALI7101: addr=%02X read=%d protocol=%X cmd=%02X data0=%02X data1=%02X\n", smbus_addr, read, cmd, dev->cmd, dev->data0, dev->data1); + cmd = (dev->ctl >> 4) & 0x7; + smbus_ali7101_log("SMBus ALI7101: addr=%02X read=%d protocol=%X cmd=%02X data0=%02X data1=%02X\n", smbus_addr, read, cmd, dev->cmd, dev->data0, dev->data1); - /* Raise DEV_ERR if no device is at this address, or if the device returned NAK when starting the transfer. */ - if (!i2c_start(i2c_smbus, smbus_addr, read)) { - dev->next_stat = 0x40; - break; - } + /* Raise DEV_ERR if no device is at this address, or if the device returned NAK when starting the transfer. */ + if (!i2c_start(i2c_smbus, smbus_addr, read)) { + dev->next_stat = 0x40; + break; + } - dev->next_stat = 0x10; /* raise INTER (command completed) by default */ + dev->next_stat = 0x10; /* raise INTER (command completed) by default */ - /* Decode the command protocol. */ - switch (cmd) { - case 0x0: /* quick R/W */ - break; + /* Decode the command protocol. */ + switch (cmd) { + case 0x0: /* quick R/W */ + break; - case 0x1: /* byte R/W */ - if (read) /* byte read */ - dev->data0 = i2c_read(i2c_smbus, smbus_addr); - else /* byte write */ - i2c_write(i2c_smbus, smbus_addr, dev->data0); - timer_bytes++; + case 0x1: /* byte R/W */ + if (read) /* byte read */ + dev->data0 = i2c_read(i2c_smbus, smbus_addr); + else /* byte write */ + i2c_write(i2c_smbus, smbus_addr, dev->data0); + timer_bytes++; - break; + break; - case 0x2: /* byte data R/W */ - /* command write */ - i2c_write(i2c_smbus, smbus_addr, dev->cmd); - timer_bytes++; + case 0x2: /* byte data R/W */ + /* command write */ + i2c_write(i2c_smbus, smbus_addr, dev->cmd); + timer_bytes++; - if (read) /* byte read */ - dev->data0 = i2c_read(i2c_smbus, smbus_addr); - else /* byte write */ - i2c_write(i2c_smbus, smbus_addr, dev->data0); - timer_bytes++; + if (read) /* byte read */ + dev->data0 = i2c_read(i2c_smbus, smbus_addr); + else /* byte write */ + i2c_write(i2c_smbus, smbus_addr, dev->data0); + timer_bytes++; - break; + break; - case 0x3: /* word data R/W */ - /* command write */ - i2c_write(i2c_smbus, smbus_addr, dev->cmd); - timer_bytes++; + case 0x3: /* word data R/W */ + /* command write */ + i2c_write(i2c_smbus, smbus_addr, dev->cmd); + timer_bytes++; - if (read) { /* word read */ - dev->data0 = i2c_read(i2c_smbus, smbus_addr); - dev->data1 = i2c_read(i2c_smbus, smbus_addr); - } else { /* word write */ - i2c_write(i2c_smbus, smbus_addr, dev->data0); - i2c_write(i2c_smbus, smbus_addr, dev->data1); - } - timer_bytes += 2; + if (read) { /* word read */ + dev->data0 = i2c_read(i2c_smbus, smbus_addr); + dev->data1 = i2c_read(i2c_smbus, smbus_addr); + } else { /* word write */ + i2c_write(i2c_smbus, smbus_addr, dev->data0); + i2c_write(i2c_smbus, smbus_addr, dev->data1); + } + timer_bytes += 2; - break; + break; - case 0x4: /* block R/W */ - timer_bytes++; /* count the SMBus length byte now */ + case 0x4: /* block R/W */ + timer_bytes++; /* count the SMBus length byte now */ - /* fall-through */ + /* fall-through */ - default: /* unknown */ - dev->next_stat = 0x20; /* raise DEV_ERR */ - timer_bytes = 0; - break; - } + default: /* unknown */ + dev->next_stat = 0x20; /* raise DEV_ERR */ + timer_bytes = 0; + break; + } - /* Finish transfer. */ - i2c_stop(i2c_smbus, smbus_addr); - break; + /* Finish transfer. */ + i2c_stop(i2c_smbus, smbus_addr); + break; - case 0x03: - dev->addr = val; - break; + case 0x03: + dev->addr = val; + break; - case 0x04: - dev->data0 = val; - break; + case 0x04: + dev->data0 = val; + break; - case 0x05: - dev->data1 = val; - break; + case 0x05: + dev->data1 = val; + break; - case 0x06: - dev->data[dev->index++] = val; - if (dev->index >= SMBUS_ALI7101_BLOCK_DATA_SIZE) - dev->index = 0; - break; + case 0x06: + dev->data[dev->index++] = val; + if (dev->index >= SMBUS_ALI7101_BLOCK_DATA_SIZE) + dev->index = 0; + break; - case 0x07: - dev->cmd = val; - break; + case 0x07: + dev->cmd = val; + break; } if (dev->next_stat != 0x04) { /* schedule dispatch of any pending status register update */ - dev->stat = 0x08; /* raise HOST_BUSY while waiting */ - timer_disable(&dev->response_timer); - /* delay = ((half clock for start + half clock for stop) + (bytes * (8 bits + ack))) * 60us period measured on real VIA 686B */ - timer_set_delay_u64(&dev->response_timer, (1 + (timer_bytes * 9)) * 60 * TIMER_USEC); + dev->stat = 0x08; /* raise HOST_BUSY while waiting */ + timer_disable(&dev->response_timer); + /* delay = ((half clock for start + half clock for stop) + (bytes * (8 bits + ack))) * 60us period measured on real VIA 686B */ + timer_set_delay_u64(&dev->response_timer, (1 + (timer_bytes * 9)) * 60 * TIMER_USEC); } } - static void smbus_ali7101_response(void *priv) { @@ -244,21 +239,19 @@ smbus_ali7101_response(void *priv) dev->stat = dev->next_stat; } - void smbus_ali7101_remap(smbus_ali7101_t *dev, uint16_t new_io_base, uint8_t enable) { if (dev->io_base) - io_removehandler(dev->io_base, 0x10, smbus_ali7101_read, NULL, NULL, smbus_ali7101_write, NULL, NULL, dev); + io_removehandler(dev->io_base, 0x10, smbus_ali7101_read, NULL, NULL, smbus_ali7101_write, NULL, NULL, dev); dev->io_base = new_io_base; smbus_ali7101_log("SMBus ALI7101: remap to %04Xh (%sabled)\n", dev->io_base, enable ? "en" : "dis"); if (enable && dev->io_base) - io_sethandler(dev->io_base, 0x10, smbus_ali7101_read, NULL, NULL, smbus_ali7101_write, NULL, NULL, dev); + io_sethandler(dev->io_base, 0x10, smbus_ali7101_read, NULL, NULL, smbus_ali7101_write, NULL, NULL, dev); } - static void smbus_ali7101_reset(void *priv) { @@ -268,7 +261,6 @@ smbus_ali7101_reset(void *priv) dev->stat = 0x04; } - static void * smbus_ali7101_init(const device_t *info) { @@ -276,7 +268,7 @@ smbus_ali7101_init(const device_t *info) memset(dev, 0, sizeof(smbus_ali7101_t)); dev->local = info->local; - dev->stat = 0x04; + dev->stat = 0x04; /* We save the I2C bus handle on dev but use i2c_smbus for all operations because dev and therefore dev->i2c will be invalidated if a device triggers a hard reset. */ i2c_smbus = dev->i2c = i2c_addbus("smbus_ali7101"); @@ -286,29 +278,28 @@ smbus_ali7101_init(const device_t *info) return dev; } - static void smbus_ali7101_close(void *priv) { smbus_ali7101_t *dev = (smbus_ali7101_t *) priv; if (i2c_smbus == dev->i2c) - i2c_smbus = NULL; + i2c_smbus = NULL; i2c_removebus(dev->i2c); free(dev); } const device_t ali7101_smbus_device = { - .name = "ALi M7101-compatible SMBus Host Controller", + .name = "ALi M7101-compatible SMBus Host Controller", .internal_name = "ali7101_smbus", - .flags = DEVICE_AT, - .local = 0, - .init = smbus_ali7101_init, - .close = smbus_ali7101_close, - .reset = smbus_ali7101_reset, + .flags = DEVICE_AT, + .local = 0, + .init = smbus_ali7101_init, + .close = smbus_ali7101_close, + .reset = smbus_ali7101_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/device/smbus_piix4.c b/src/device/smbus_piix4.c index c96a9fa57..607a0e055 100644 --- a/src/device/smbus_piix4.c +++ b/src/device/smbus_piix4.c @@ -31,60 +31,58 @@ #ifdef ENABLE_SMBUS_PIIX4_LOG int smbus_piix4_do_log = ENABLE_SMBUS_PIIX4_LOG; - static void smbus_piix4_log(const char *fmt, ...) { va_list ap; if (smbus_piix4_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define smbus_piix4_log(fmt, ...) +# define smbus_piix4_log(fmt, ...) #endif - static uint8_t smbus_piix4_read(uint16_t addr, void *priv) { smbus_piix4_t *dev = (smbus_piix4_t *) priv; - uint8_t ret = 0x00; + uint8_t ret = 0x00; switch (addr - dev->io_base) { - case 0x00: - ret = dev->stat; - break; + case 0x00: + ret = dev->stat; + break; - case 0x02: - dev->index = 0; /* reading from this resets the block data index */ - ret = dev->ctl; - break; + case 0x02: + dev->index = 0; /* reading from this resets the block data index */ + ret = dev->ctl; + break; - case 0x03: - ret = dev->cmd; - break; + case 0x03: + ret = dev->cmd; + break; - case 0x04: - ret = dev->addr; - break; + case 0x04: + ret = dev->addr; + break; - case 0x05: - ret = dev->data0; - break; + case 0x05: + ret = dev->data0; + break; - case 0x06: - ret = dev->data1; - break; + case 0x06: + ret = dev->data1; + break; - case 0x07: - ret = dev->data[dev->index++]; - if (dev->index >= SMBUS_PIIX4_BLOCK_DATA_SIZE) - dev->index = 0; - break; + case 0x07: + ret = dev->data[dev->index++]; + if (dev->index >= SMBUS_PIIX4_BLOCK_DATA_SIZE) + dev->index = 0; + break; } smbus_piix4_log("SMBus PIIX4: read(%02X) = %02x\n", addr, ret); @@ -92,232 +90,230 @@ smbus_piix4_read(uint16_t addr, void *priv) return ret; } - static void smbus_piix4_write(uint16_t addr, uint8_t val, void *priv) { smbus_piix4_t *dev = (smbus_piix4_t *) priv; - uint8_t smbus_addr, cmd, read, block_len, prev_stat; - uint16_t timer_bytes = 0, i = 0; + uint8_t smbus_addr, cmd, read, block_len, prev_stat; + uint16_t timer_bytes = 0, i = 0; smbus_piix4_log("SMBus PIIX4: write(%02X, %02X)\n", addr, val); - prev_stat = dev->next_stat; + prev_stat = dev->next_stat; dev->next_stat = 0x00; switch (addr - dev->io_base) { - case 0x00: - for (smbus_addr = 0x02; smbus_addr <= 0x10; smbus_addr <<= 1) { /* handle clearable bits */ - if (val & smbus_addr) - dev->stat &= ~smbus_addr; - } - break; + case 0x00: + for (smbus_addr = 0x02; smbus_addr <= 0x10; smbus_addr <<= 1) { /* handle clearable bits */ + if (val & smbus_addr) + dev->stat &= ~smbus_addr; + } + break; - case 0x02: - dev->ctl = val & ((dev->local == SMBUS_VIA) ? 0x3f : 0x1f); - if (val & 0x02) { /* cancel an in-progress command if KILL is set */ - if (prev_stat) { /* cancel only if a command is in progress */ - timer_disable(&dev->response_timer); - dev->stat = 0x10; /* raise FAILED */ - } - } - if (val & 0x40) { /* dispatch command if START is set */ - timer_bytes++; /* address */ + case 0x02: + dev->ctl = val & ((dev->local == SMBUS_VIA) ? 0x3f : 0x1f); + if (val & 0x02) { /* cancel an in-progress command if KILL is set */ + if (prev_stat) { /* cancel only if a command is in progress */ + timer_disable(&dev->response_timer); + dev->stat = 0x10; /* raise FAILED */ + } + } + if (val & 0x40) { /* dispatch command if START is set */ + timer_bytes++; /* address */ - smbus_addr = dev->addr >> 1; - read = dev->addr & 0x01; + smbus_addr = dev->addr >> 1; + read = dev->addr & 0x01; - cmd = (dev->ctl >> 2) & 0xf; - smbus_piix4_log("SMBus PIIX4: addr=%02X read=%d protocol=%X cmd=%02X data0=%02X data1=%02X\n", smbus_addr, read, cmd, dev->cmd, dev->data0, dev->data1); + cmd = (dev->ctl >> 2) & 0xf; + smbus_piix4_log("SMBus PIIX4: addr=%02X read=%d protocol=%X cmd=%02X data0=%02X data1=%02X\n", smbus_addr, read, cmd, dev->cmd, dev->data0, dev->data1); - /* Raise DEV_ERR if no device is at this address, or if the device returned NAK. */ - if (!i2c_start(i2c_smbus, smbus_addr, read)) { - dev->next_stat = 0x04; - break; - } + /* Raise DEV_ERR if no device is at this address, or if the device returned NAK. */ + if (!i2c_start(i2c_smbus, smbus_addr, read)) { + dev->next_stat = 0x04; + break; + } - dev->next_stat = 0x02; /* raise INTER (command completed) by default */ + dev->next_stat = 0x02; /* raise INTER (command completed) by default */ - /* Decode the command protocol. - VIA-specific modes (0x4 and [0x6:0xf]) are undocumented and required real hardware research. */ - switch (cmd) { - case 0x0: /* quick R/W */ - break; + /* Decode the command protocol. + VIA-specific modes (0x4 and [0x6:0xf]) are undocumented and required real hardware research. */ + switch (cmd) { + case 0x0: /* quick R/W */ + break; - case 0x1: /* byte R/W */ - if (read) /* byte read */ - dev->data0 = i2c_read(i2c_smbus, smbus_addr); - else /* byte write */ - i2c_write(i2c_smbus, smbus_addr, dev->data0); - timer_bytes++; + case 0x1: /* byte R/W */ + if (read) /* byte read */ + dev->data0 = i2c_read(i2c_smbus, smbus_addr); + else /* byte write */ + i2c_write(i2c_smbus, smbus_addr, dev->data0); + timer_bytes++; - break; + break; - case 0x2: /* byte data R/W */ - /* command write */ - i2c_write(i2c_smbus, smbus_addr, dev->cmd); - timer_bytes++; + case 0x2: /* byte data R/W */ + /* command write */ + i2c_write(i2c_smbus, smbus_addr, dev->cmd); + timer_bytes++; - if (read) /* byte read */ - dev->data0 = i2c_read(i2c_smbus, smbus_addr); - else /* byte write */ - i2c_write(i2c_smbus, smbus_addr, dev->data0); - timer_bytes++; + if (read) /* byte read */ + dev->data0 = i2c_read(i2c_smbus, smbus_addr); + else /* byte write */ + i2c_write(i2c_smbus, smbus_addr, dev->data0); + timer_bytes++; - break; + break; - case 0x3: /* word data R/W */ - /* command write */ - i2c_write(i2c_smbus, smbus_addr, dev->cmd); - timer_bytes++; + case 0x3: /* word data R/W */ + /* command write */ + i2c_write(i2c_smbus, smbus_addr, dev->cmd); + timer_bytes++; - if (read) { /* word read */ - dev->data0 = i2c_read(i2c_smbus, smbus_addr); - dev->data1 = i2c_read(i2c_smbus, smbus_addr); - } else { /* word write */ - i2c_write(i2c_smbus, smbus_addr, dev->data0); - i2c_write(i2c_smbus, smbus_addr, dev->data1); - } - timer_bytes += 2; + if (read) { /* word read */ + dev->data0 = i2c_read(i2c_smbus, smbus_addr); + dev->data1 = i2c_read(i2c_smbus, smbus_addr); + } else { /* word write */ + i2c_write(i2c_smbus, smbus_addr, dev->data0); + i2c_write(i2c_smbus, smbus_addr, dev->data1); + } + timer_bytes += 2; - break; + break; - case 0x4: /* process call */ - if (dev->local != SMBUS_VIA) /* VIA only */ - goto unknown_protocol; + case 0x4: /* process call */ + if (dev->local != SMBUS_VIA) /* VIA only */ + goto unknown_protocol; - if (!read) { /* command write (only when writing) */ - i2c_write(i2c_smbus, smbus_addr, dev->cmd); - timer_bytes++; - } + if (!read) { /* command write (only when writing) */ + i2c_write(i2c_smbus, smbus_addr, dev->cmd); + timer_bytes++; + } - /* fall-through */ + /* fall-through */ - case 0xc: /* I2C process call */ - if (!read) { /* word write (only when writing) */ - i2c_write(i2c_smbus, smbus_addr, dev->data0); - i2c_write(i2c_smbus, smbus_addr, dev->data1); - timer_bytes += 2; - } + case 0xc: /* I2C process call */ + if (!read) { /* word write (only when writing) */ + i2c_write(i2c_smbus, smbus_addr, dev->data0); + i2c_write(i2c_smbus, smbus_addr, dev->data1); + timer_bytes += 2; + } - /* word read */ - dev->data0 = i2c_read(i2c_smbus, smbus_addr); - dev->data1 = i2c_read(i2c_smbus, smbus_addr); - timer_bytes += 2; + /* word read */ + dev->data0 = i2c_read(i2c_smbus, smbus_addr); + dev->data1 = i2c_read(i2c_smbus, smbus_addr); + timer_bytes += 2; - break; + break; - case 0x5: /* block R/W */ - timer_bytes++; /* count the SMBus length byte now */ + case 0x5: /* block R/W */ + timer_bytes++; /* count the SMBus length byte now */ - /* fall-through */ + /* fall-through */ - case 0xd: /* I2C block R/W */ - i2c_write(i2c_smbus, smbus_addr, dev->cmd); - timer_bytes++; + case 0xd: /* I2C block R/W */ + i2c_write(i2c_smbus, smbus_addr, dev->cmd); + timer_bytes++; - if (read) { - /* block read [data0] (I2C) or [first byte] (SMBus) bytes */ - if (cmd == 0x5) - dev->data0 = i2c_read(i2c_smbus, smbus_addr); - for (i = 0; i < dev->data0; i++) - dev->data[i & SMBUS_PIIX4_BLOCK_DATA_MASK] = i2c_read(i2c_smbus, smbus_addr); - } else { - if (cmd == 0x5) /* send length [data0] as first byte on SMBus */ - i2c_write(i2c_smbus, smbus_addr, dev->data0); - /* block write [data0] bytes */ - for (i = 0; i < dev->data0; i++) { - if (!i2c_write(i2c_smbus, smbus_addr, dev->data[i & SMBUS_PIIX4_BLOCK_DATA_MASK])) - break; - } - } - timer_bytes += i; + if (read) { + /* block read [data0] (I2C) or [first byte] (SMBus) bytes */ + if (cmd == 0x5) + dev->data0 = i2c_read(i2c_smbus, smbus_addr); + for (i = 0; i < dev->data0; i++) + dev->data[i & SMBUS_PIIX4_BLOCK_DATA_MASK] = i2c_read(i2c_smbus, smbus_addr); + } else { + if (cmd == 0x5) /* send length [data0] as first byte on SMBus */ + i2c_write(i2c_smbus, smbus_addr, dev->data0); + /* block write [data0] bytes */ + for (i = 0; i < dev->data0; i++) { + if (!i2c_write(i2c_smbus, smbus_addr, dev->data[i & SMBUS_PIIX4_BLOCK_DATA_MASK])) + break; + } + } + timer_bytes += i; - break; + break; - case 0x6: /* I2C with 10-bit address */ - if (dev->local != SMBUS_VIA) /* VIA only */ - goto unknown_protocol; + case 0x6: /* I2C with 10-bit address */ + if (dev->local != SMBUS_VIA) /* VIA only */ + goto unknown_protocol; - /* command write */ - i2c_write(i2c_smbus, smbus_addr, dev->cmd); - timer_bytes++; + /* command write */ + i2c_write(i2c_smbus, smbus_addr, dev->cmd); + timer_bytes++; - /* fall-through */ + /* fall-through */ - case 0xe: /* I2C with 7-bit address */ - if (!read) { /* word write (only when writing) */ - i2c_write(i2c_smbus, smbus_addr, dev->data0); - i2c_write(i2c_smbus, smbus_addr, dev->data1); - timer_bytes += 2; - } + case 0xe: /* I2C with 7-bit address */ + if (!read) { /* word write (only when writing) */ + i2c_write(i2c_smbus, smbus_addr, dev->data0); + i2c_write(i2c_smbus, smbus_addr, dev->data1); + timer_bytes += 2; + } - /* block read [first byte] bytes */ - block_len = dev->data[0]; - for (i = 0; i < block_len; i++) - dev->data[i & SMBUS_PIIX4_BLOCK_DATA_MASK] = i2c_read(i2c_smbus, smbus_addr); - timer_bytes += i; + /* block read [first byte] bytes */ + block_len = dev->data[0]; + for (i = 0; i < block_len; i++) + dev->data[i & SMBUS_PIIX4_BLOCK_DATA_MASK] = i2c_read(i2c_smbus, smbus_addr); + timer_bytes += i; - break; + break; - case 0xf: /* universal */ - /* block write [data0] bytes */ - for (i = 0; i < dev->data0; i++) { - if (!i2c_write(i2c_smbus, smbus_addr, dev->data[i & SMBUS_PIIX4_BLOCK_DATA_MASK])) - break; /* write NAK behavior is unknown */ - } - timer_bytes += i; + case 0xf: /* universal */ + /* block write [data0] bytes */ + for (i = 0; i < dev->data0; i++) { + if (!i2c_write(i2c_smbus, smbus_addr, dev->data[i & SMBUS_PIIX4_BLOCK_DATA_MASK])) + break; /* write NAK behavior is unknown */ + } + timer_bytes += i; - /* block read [data1] bytes */ - for (i = 0; i < dev->data1; i++) - dev->data[i & SMBUS_PIIX4_BLOCK_DATA_MASK] = i2c_read(i2c_smbus, smbus_addr); - timer_bytes += i; + /* block read [data1] bytes */ + for (i = 0; i < dev->data1; i++) + dev->data[i & SMBUS_PIIX4_BLOCK_DATA_MASK] = i2c_read(i2c_smbus, smbus_addr); + timer_bytes += i; - break; + break; - default: /* unknown */ + default: /* unknown */ unknown_protocol: - dev->next_stat = 0x04; /* raise DEV_ERR */ - timer_bytes = 0; - break; - } + dev->next_stat = 0x04; /* raise DEV_ERR */ + timer_bytes = 0; + break; + } - /* Finish transfer. */ - i2c_stop(i2c_smbus, smbus_addr); - } - break; + /* Finish transfer. */ + i2c_stop(i2c_smbus, smbus_addr); + } + break; - case 0x03: - dev->cmd = val; - break; + case 0x03: + dev->cmd = val; + break; - case 0x04: - dev->addr = val; - break; + case 0x04: + dev->addr = val; + break; - case 0x05: - dev->data0 = val; - break; + case 0x05: + dev->data0 = val; + break; - case 0x06: - dev->data1 = val; - break; + case 0x06: + dev->data1 = val; + break; - case 0x07: - dev->data[dev->index++] = val; - if (dev->index >= SMBUS_PIIX4_BLOCK_DATA_SIZE) - dev->index = 0; - break; + case 0x07: + dev->data[dev->index++] = val; + if (dev->index >= SMBUS_PIIX4_BLOCK_DATA_SIZE) + dev->index = 0; + break; } if (dev->next_stat) { /* schedule dispatch of any pending status register update */ - dev->stat = 0x01; /* raise HOST_BUSY while waiting */ - timer_disable(&dev->response_timer); - /* delay = ((half clock for start + half clock for stop) + (bytes * (8 bits + ack))) * bit period in usecs */ - timer_set_delay_u64(&dev->response_timer, (1 + (timer_bytes * 9)) * dev->bit_period * TIMER_USEC); + dev->stat = 0x01; /* raise HOST_BUSY while waiting */ + timer_disable(&dev->response_timer); + /* delay = ((half clock for start + half clock for stop) + (bytes * (8 bits + ack))) * bit period in usecs */ + timer_set_delay_u64(&dev->response_timer, (1 + (timer_bytes * 9)) * dev->bit_period * TIMER_USEC); } } - static void smbus_piix4_response(void *priv) { @@ -327,21 +323,19 @@ smbus_piix4_response(void *priv) dev->stat = dev->next_stat; } - void smbus_piix4_remap(smbus_piix4_t *dev, uint16_t new_io_base, uint8_t enable) { if (dev->io_base) - io_removehandler(dev->io_base, 0x10, smbus_piix4_read, NULL, NULL, smbus_piix4_write, NULL, NULL, dev); + io_removehandler(dev->io_base, 0x10, smbus_piix4_read, NULL, NULL, smbus_piix4_write, NULL, NULL, dev); dev->io_base = new_io_base; smbus_piix4_log("SMBus PIIX4: remap to %04Xh (%sabled)\n", dev->io_base, enable ? "en" : "dis"); if (enable && dev->io_base) - io_sethandler(dev->io_base, 0x10, smbus_piix4_read, NULL, NULL, smbus_piix4_write, NULL, NULL, dev); + io_sethandler(dev->io_base, 0x10, smbus_piix4_read, NULL, NULL, smbus_piix4_write, NULL, NULL, dev); } - void smbus_piix4_setclock(smbus_piix4_t *dev, int clock) { @@ -351,7 +345,6 @@ smbus_piix4_setclock(smbus_piix4_t *dev, int clock) dev->bit_period = 1000000.0 / dev->clock; } - static void * smbus_piix4_init(const device_t *info) { @@ -370,43 +363,42 @@ smbus_piix4_init(const device_t *info) return dev; } - static void smbus_piix4_close(void *priv) { smbus_piix4_t *dev = (smbus_piix4_t *) priv; if (i2c_smbus == dev->i2c) - i2c_smbus = NULL; + i2c_smbus = NULL; i2c_removebus(dev->i2c); free(dev); } const device_t piix4_smbus_device = { - .name = "PIIX4-compatible SMBus Host Controller", + .name = "PIIX4-compatible SMBus Host Controller", .internal_name = "piix4_smbus", - .flags = DEVICE_AT, - .local = SMBUS_PIIX4, - .init = smbus_piix4_init, - .close = smbus_piix4_close, - .reset = NULL, + .flags = DEVICE_AT, + .local = SMBUS_PIIX4, + .init = smbus_piix4_init, + .close = smbus_piix4_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_smbus_device = { - .name = "VIA VT82C686B SMBus Host Controller", + .name = "VIA VT82C686B SMBus Host Controller", .internal_name = "via_smbus", - .flags = DEVICE_AT, - .local = SMBUS_VIA, - .init = smbus_piix4_init, - .close = smbus_piix4_close, - .reset = NULL, + .flags = DEVICE_AT, + .local = SMBUS_VIA, + .init = smbus_piix4_init, + .close = smbus_piix4_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; From 696f6f7e2fa80443479ff971262552519c38bb87 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:13:50 -0400 Subject: [PATCH 358/386] clang-format in src/disk/ --- src/disk/hdc.c | 90 +- src/disk/hdc_esdi_at.c | 1166 ++++++----- src/disk/hdc_esdi_mca.c | 6 +- src/disk/hdc_ide.c | 3731 +++++++++++++++++------------------ src/disk/hdc_ide_cmd640.c | 538 +++-- src/disk/hdc_ide_cmd646.c | 410 ++-- src/disk/hdc_ide_opti611.c | 192 +- src/disk/hdc_ide_sff8038i.c | 568 +++--- src/disk/hdc_st506_at.c | 902 +++++---- src/disk/hdc_st506_xt.c | 2149 ++++++++++---------- src/disk/hdc_xta.c | 1370 +++++++------ src/disk/hdc_xtide.c | 239 ++- src/disk/hdd.c | 459 ++--- src/disk/hdd_image.c | 914 +++++---- src/disk/hdd_table.c | 3 +- src/disk/mo.c | 2247 ++++++++++----------- src/disk/zip.c | 2470 +++++++++++------------ 17 files changed, 8516 insertions(+), 8938 deletions(-) diff --git a/src/disk/hdc.c b/src/disk/hdc.c index 7ba9a0f1e..0f2bc8599 100644 --- a/src/disk/hdc.c +++ b/src/disk/hdc.c @@ -29,33 +29,30 @@ #include <86box/hdc_ide.h> #include <86box/hdd.h> - -int hdc_current; - +int hdc_current; #ifdef ENABLE_HDC_LOG int hdc_do_log = ENABLE_HDC_LOG; - static void hdc_log(const char *fmt, ...) { va_list ap; if (hdc_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define hdc_log(fmt, ...) +# define hdc_log(fmt, ...) #endif static void * nullhdc_init(const device_t *info) { - return(NULL); + return (NULL); } static void @@ -66,7 +63,7 @@ nullhdc_close(void *priv) static void * inthdc_init(const device_t *info) { - return(NULL); + return (NULL); } static void @@ -75,37 +72,37 @@ inthdc_close(void *priv) } static const device_t hdc_none_device = { - .name = "None", + .name = "None", .internal_name = "none", - .flags = 0, - .local = 0, - .init = nullhdc_init, - .close = nullhdc_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = nullhdc_init, + .close = nullhdc_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; static const device_t hdc_internal_device = { - .name = "Internal", + .name = "Internal", .internal_name = "internal", - .flags = 0, - .local = 0, - .init = inthdc_init, - .close = inthdc_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = inthdc_init, + .close = inthdc_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; static const struct { - const device_t *device; + const device_t *device; } controllers[] = { -// clang-format off + // clang-format off { &hdc_none_device }, { &hdc_internal_device }, { &st506_xt_xebec_device }, @@ -133,7 +130,7 @@ static const struct { { &ide_vlb_device }, { &ide_vlb_2ch_device }, { NULL } -// clang-format on + // clang-format on }; /* Initialize the 'hdc_current' value based on configured HDC name. */ @@ -146,77 +143,72 @@ hdc_init(void) hdd_image_init(); } - /* Reset the HDC, whichever one that is. */ void hdc_reset(void) { hdc_log("HDC: reset(current=%d, internal=%d)\n", - hdc_current, (machines[machine].flags & MACHINE_HDC) ? 1 : 0); + hdc_current, (machines[machine].flags & MACHINE_HDC) ? 1 : 0); /* If we have a valid controller, add its device. */ if (hdc_current > 1) - device_add(controllers[hdc_current].device); + device_add(controllers[hdc_current].device); /* Now, add the tertiary and/or quaternary IDE controllers. */ if (ide_ter_enabled) - device_add(&ide_ter_device); + device_add(&ide_ter_device); if (ide_qua_enabled) - device_add(&ide_qua_device); + device_add(&ide_qua_device); } - char * hdc_get_internal_name(int hdc) { return device_get_internal_name(controllers[hdc].device); } - int hdc_get_from_internal_name(char *s) { int c = 0; while (controllers[c].device != NULL) { - if (!strcmp((char *) controllers[c].device->internal_name, s)) - return c; - c++; + if (!strcmp((char *) controllers[c].device->internal_name, s)) + return c; + c++; } return 0; } - const device_t * hdc_get_device(int hdc) { - return(controllers[hdc].device); + return (controllers[hdc].device); } - int hdc_has_config(int hdc) { const device_t *dev = hdc_get_device(hdc); - if (dev == NULL) return(0); + if (dev == NULL) + return (0); - if (!device_has_config(dev)) return(0); + if (!device_has_config(dev)) + return (0); - return(1); + return (1); } - int hdc_get_flags(int hdc) { - return(controllers[hdc].device->flags); + return (controllers[hdc].device->flags); } - int hdc_available(int hdc) { - return(device_available(controllers[hdc].device)); + return (device_available(controllers[hdc].device)); } diff --git a/src/disk/hdc_esdi_at.c b/src/disk/hdc_esdi_at.c index 59d8308a8..c37d4782a 100644 --- a/src/disk/hdc_esdi_at.c +++ b/src/disk/hdc_esdi_at.c @@ -40,116 +40,108 @@ #include <86box/hdc.h> #include <86box/hdd.h> +#define HDC_TIME 10.0 +#define BIOS_FILE "roms/hdd/esdi_at/62-000279-061.bin" -#define HDC_TIME 10.0 -#define BIOS_FILE "roms/hdd/esdi_at/62-000279-061.bin" +#define STAT_ERR 0x01 +#define STAT_INDEX 0x02 +#define STAT_CORRECTED_DATA 0x04 +#define STAT_DRQ 0x08 /* Data request */ +#define STAT_DSC 0x10 +#define STAT_SEEK_COMPLETE 0x20 +#define STAT_READY 0x40 +#define STAT_BUSY 0x80 -#define STAT_ERR 0x01 -#define STAT_INDEX 0x02 -#define STAT_CORRECTED_DATA 0x04 -#define STAT_DRQ 0x08 /* Data request */ -#define STAT_DSC 0x10 -#define STAT_SEEK_COMPLETE 0x20 -#define STAT_READY 0x40 -#define STAT_BUSY 0x80 - -#define ERR_DAM_NOT_FOUND 0x01 /* Data Address Mark not found */ -#define ERR_TR000 0x02 /* track 0 not found */ -#define ERR_ABRT 0x04 /* command aborted */ -#define ERR_ID_NOT_FOUND 0x10 /* ID not found */ -#define ERR_DATA_CRC 0x40 /* data CRC error */ -#define ERR_BAD_BLOCK 0x80 /* bad block detected */ - -#define CMD_NOP 0x00 -#define CMD_RESTORE 0x10 -#define CMD_READ 0x20 -#define CMD_WRITE 0x30 -#define CMD_VERIFY 0x40 -#define CMD_FORMAT 0x50 -#define CMD_SEEK 0x70 -#define CMD_DIAGNOSE 0x90 -#define CMD_SET_PARAMETERS 0x91 -#define CMD_READ_PARAMETERS 0xec +#define ERR_DAM_NOT_FOUND 0x01 /* Data Address Mark not found */ +#define ERR_TR000 0x02 /* track 0 not found */ +#define ERR_ABRT 0x04 /* command aborted */ +#define ERR_ID_NOT_FOUND 0x10 /* ID not found */ +#define ERR_DATA_CRC 0x40 /* data CRC error */ +#define ERR_BAD_BLOCK 0x80 /* bad block detected */ +#define CMD_NOP 0x00 +#define CMD_RESTORE 0x10 +#define CMD_READ 0x20 +#define CMD_WRITE 0x30 +#define CMD_VERIFY 0x40 +#define CMD_FORMAT 0x50 +#define CMD_SEEK 0x70 +#define CMD_DIAGNOSE 0x90 +#define CMD_SET_PARAMETERS 0x91 +#define CMD_READ_PARAMETERS 0xec typedef struct { - int cfg_spt; - int cfg_hpc; - int current_cylinder; - int real_spt; - int real_hpc; - int real_tracks; - int present; - int hdd_num; + int cfg_spt; + int cfg_hpc; + int current_cylinder; + int real_spt; + int real_hpc; + int real_tracks; + int present; + int hdd_num; } drive_t; typedef struct { - uint8_t status; - uint8_t error; - int secount,sector,cylinder,head,cylprecomp; - uint8_t command; - uint8_t fdisk; - int pos; + uint8_t status; + uint8_t error; + int secount, sector, cylinder, head, cylprecomp; + uint8_t command; + uint8_t fdisk; + int pos; - int drive_sel; - int reset; - uint16_t buffer[256]; - int irqstat; + int drive_sel; + int reset; + uint16_t buffer[256]; + int irqstat; - pc_timer_t callback_timer; + pc_timer_t callback_timer; - drive_t drives[2]; + drive_t drives[2]; - rom_t bios_rom; + rom_t bios_rom; } esdi_t; - -static uint8_t esdi_read(uint16_t port, void *priv); -static void esdi_write(uint16_t port, uint8_t val, void *priv); - +static uint8_t esdi_read(uint16_t port, void *priv); +static void esdi_write(uint16_t port, uint8_t val, void *priv); #ifdef ENABLE_ESDI_AT_LOG int esdi_at_do_log = ENABLE_ESDI_AT_LOG; - static void esdi_at_log(const char *fmt, ...) { va_list ap; if (esdi_at_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define esdi_at_log(fmt, ...) +# define esdi_at_log(fmt, ...) #endif - static __inline void irq_raise(esdi_t *esdi) { if (!(esdi->fdisk & 2)) - picint(1 << 14); + picint(1 << 14); esdi->irqstat = 1; } - static __inline void irq_lower(esdi_t *esdi) { picintc(1 << 14); } - static __inline void irq_update(esdi_t *esdi) { if (esdi->irqstat && !((pic2.irr | pic2.isr) & 0x40) && !(esdi->fdisk & 2)) - picint(1 << 14); + picint(1 << 14); } static void @@ -170,53 +162,50 @@ double esdi_get_xfer_time(esdi_t *esdi, int size) { /* 390.625 us per sector at 10 Mbit/s = 1280 kB/s. */ - return (3125.0 / 8.0) * (double)size; + return (3125.0 / 8.0) * (double) size; } /* Return the sector offset for the current register values. */ static int get_sector(esdi_t *esdi, off64_t *addr) { - drive_t *drive = &esdi->drives[esdi->drive_sel]; - int heads = drive->cfg_hpc; - int sectors = drive->cfg_spt; - int c, h, s, sector; + drive_t *drive = &esdi->drives[esdi->drive_sel]; + int heads = drive->cfg_hpc; + int sectors = drive->cfg_spt; + int c, h, s, sector; if (esdi->head > heads) { - esdi_at_log("esdi_get_sector: past end of configured heads\n"); - return(1); + esdi_at_log("esdi_get_sector: past end of configured heads\n"); + return (1); } - if (esdi->sector >= sectors+1) { - esdi_at_log("esdi_get_sector: past end of configured sectors\n"); - return(1); + if (esdi->sector >= sectors + 1) { + esdi_at_log("esdi_get_sector: past end of configured sectors\n"); + return (1); } sector = esdi->sector ? esdi->sector : 1; - if (drive->cfg_spt==drive->real_spt && drive->cfg_hpc==drive->real_hpc) { - *addr = ((((off64_t) esdi->cylinder * heads) + esdi->head) * - sectors) + (sector - 1); + if (drive->cfg_spt == drive->real_spt && drive->cfg_hpc == drive->real_hpc) { + *addr = ((((off64_t) esdi->cylinder * heads) + esdi->head) * sectors) + (sector - 1); } else { - /* - * When performing translation, the firmware seems to leave 1 - * sector per track inaccessible (spare sector) - */ + /* + * When performing translation, the firmware seems to leave 1 + * sector per track inaccessible (spare sector) + */ - *addr = ((((off64_t) esdi->cylinder * heads) + esdi->head) * - sectors) + (sector - 1); + *addr = ((((off64_t) esdi->cylinder * heads) + esdi->head) * sectors) + (sector - 1); - s = *addr % (drive->real_spt - 1); - h = (*addr / (drive->real_spt - 1)) % drive->real_hpc; - c = (*addr / (drive->real_spt - 1)) / drive->real_hpc; + s = *addr % (drive->real_spt - 1); + h = (*addr / (drive->real_spt - 1)) % drive->real_hpc; + c = (*addr / (drive->real_spt - 1)) / drive->real_hpc; - *addr = ((((off64_t)c * drive->real_hpc) + h) * drive->real_spt) + s; + *addr = ((((off64_t) c * drive->real_hpc) + h) * drive->real_spt) + s; } - return(0); + return (0); } - /* Move to the next sector using CHS addressing. */ static void next_sector(esdi_t *esdi) @@ -225,617 +214,609 @@ next_sector(esdi_t *esdi) esdi->sector++; if (esdi->sector == (drive->cfg_spt + 1)) { - esdi->sector = 1; - if (++esdi->head == drive->cfg_hpc) { - esdi->head = 0; - esdi->cylinder++; - if (drive->current_cylinder < drive->real_tracks) - drive->current_cylinder++; - } + esdi->sector = 1; + if (++esdi->head == drive->cfg_hpc) { + esdi->head = 0; + esdi->cylinder++; + if (drive->current_cylinder < drive->real_tracks) + drive->current_cylinder++; + } } } - static void esdi_writew(uint16_t port, uint16_t val, void *priv) { - esdi_t *esdi = (esdi_t *)priv; + esdi_t *esdi = (esdi_t *) priv; off64_t addr; if (port > 0x01f0) { - esdi_write(port, val & 0xff, priv); - if (port != 0x01f7) - esdi_write(port + 1, (val >> 8) & 0xff, priv); + esdi_write(port, val & 0xff, priv); + if (port != 0x01f7) + esdi_write(port + 1, (val >> 8) & 0xff, priv); } else { - esdi->buffer[esdi->pos >> 1] = val; - esdi->pos += 2; + esdi->buffer[esdi->pos >> 1] = val; + esdi->pos += 2; - if (esdi->pos >= 512) { - esdi->pos = 0; - esdi->status = STAT_BUSY; - get_sector(esdi, &addr); - double seek_time = hdd_timing_write(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); - double xfer_time = esdi_get_xfer_time(esdi, 1); - esdi_set_callback(esdi, seek_time + xfer_time); - } + if (esdi->pos >= 512) { + esdi->pos = 0; + esdi->status = STAT_BUSY; + get_sector(esdi, &addr); + double seek_time = hdd_timing_write(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); + double xfer_time = esdi_get_xfer_time(esdi, 1); + esdi_set_callback(esdi, seek_time + xfer_time); + } } } - static void esdi_write(uint16_t port, uint8_t val, void *priv) { - esdi_t *esdi = (esdi_t *)priv; - double seek_time, xfer_time; + esdi_t *esdi = (esdi_t *) priv; + double seek_time, xfer_time; off64_t addr; esdi_at_log("WD1007 write(%04x, %02x)\n", port, val); switch (port) { - case 0x1f0: /* data */ - esdi_writew(port, val | (val << 8), priv); - return; + case 0x1f0: /* data */ + esdi_writew(port, val | (val << 8), priv); + return; - case 0x1f1: /* write precompensation */ - esdi->cylprecomp = val; - return; + case 0x1f1: /* write precompensation */ + esdi->cylprecomp = val; + return; - case 0x1f2: /* sector count */ - esdi->secount = val; - return; + case 0x1f2: /* sector count */ + esdi->secount = val; + return; - case 0x1f3: /* sector */ - esdi->sector = val; - return; + case 0x1f3: /* sector */ + esdi->sector = val; + return; - case 0x1f4: /* cylinder low */ - esdi->cylinder = (esdi->cylinder & 0xFF00) | val; - return; + case 0x1f4: /* cylinder low */ + esdi->cylinder = (esdi->cylinder & 0xFF00) | val; + return; - case 0x1f5: /* cylinder high */ - esdi->cylinder = (esdi->cylinder & 0xFF) | (val << 8); - return; + case 0x1f5: /* cylinder high */ + esdi->cylinder = (esdi->cylinder & 0xFF) | (val << 8); + return; - case 0x1f6: /* drive/Head */ - esdi->head = val & 0xF; - esdi->drive_sel = (val & 0x10) ? 1 : 0; - if (esdi->drives[esdi->drive_sel].present) - esdi->status = STAT_READY | STAT_DSC; - else - esdi->status = 0; - return; + case 0x1f6: /* drive/Head */ + esdi->head = val & 0xF; + esdi->drive_sel = (val & 0x10) ? 1 : 0; + if (esdi->drives[esdi->drive_sel].present) + esdi->status = STAT_READY | STAT_DSC; + else + esdi->status = 0; + return; - case 0x1f7: /* command register */ - irq_lower(esdi); - esdi->command = val; - esdi->error = 0; + case 0x1f7: /* command register */ + irq_lower(esdi); + esdi->command = val; + esdi->error = 0; - esdi_at_log("WD1007: command %02x\n", val & 0xf0); + esdi_at_log("WD1007: command %02x\n", val & 0xf0); - switch (val & 0xf0) { - case CMD_RESTORE: - esdi->command &= ~0x0f; /*mask off step rate*/ - esdi->status = STAT_BUSY; - esdi_set_callback(esdi, 200 * HDC_TIME); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); - break; + switch (val & 0xf0) { + case CMD_RESTORE: + esdi->command &= ~0x0f; /*mask off step rate*/ + esdi->status = STAT_BUSY; + esdi_set_callback(esdi, 200 * HDC_TIME); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1); + break; - case CMD_SEEK: - esdi->command &= ~0x0f; /*mask off step rate*/ - esdi->status = STAT_BUSY; - get_sector(esdi, &addr); - seek_time = hdd_seek_get_time(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, HDD_OP_SEEK, 0, 0.0); - esdi_set_callback(esdi, seek_time); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); - break; + case CMD_SEEK: + esdi->command &= ~0x0f; /*mask off step rate*/ + esdi->status = STAT_BUSY; + get_sector(esdi, &addr); + seek_time = hdd_seek_get_time(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, HDD_OP_SEEK, 0, 0.0); + esdi_set_callback(esdi, seek_time); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1); + break; - default: - switch (val) { - case CMD_NOP: - esdi->status = STAT_BUSY; - esdi_set_callback(esdi, 200 * HDC_TIME); - break; + default: + switch (val) { + case CMD_NOP: + esdi->status = STAT_BUSY; + esdi_set_callback(esdi, 200 * HDC_TIME); + break; - case CMD_READ: - case CMD_READ+1: - case CMD_READ+2: - case CMD_READ+3: - esdi->command &= ~0x03; - if (val & 0x02) - fatal("Read with ECC\n"); - /*FALLTHROUGH*/ + case CMD_READ: + case CMD_READ + 1: + case CMD_READ + 2: + case CMD_READ + 3: + esdi->command &= ~0x03; + if (val & 0x02) + fatal("Read with ECC\n"); + /*FALLTHROUGH*/ - case 0xa0: - esdi->status = STAT_BUSY; - get_sector(esdi, &addr); - seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); - xfer_time = esdi_get_xfer_time(esdi, 1); - esdi_set_callback(esdi, seek_time + xfer_time); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); - break; + case 0xa0: + esdi->status = STAT_BUSY; + get_sector(esdi, &addr); + seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); + xfer_time = esdi_get_xfer_time(esdi, 1); + esdi_set_callback(esdi, seek_time + xfer_time); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1); + break; - case CMD_WRITE: - case CMD_WRITE+1: - case CMD_WRITE+2: - case CMD_WRITE+3: - esdi->command &= ~0x03; - if (val & 0x02) - fatal("Write with ECC\n"); - esdi->status = STAT_READY | STAT_DRQ | STAT_DSC; - esdi->pos = 0; - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); - break; + case CMD_WRITE: + case CMD_WRITE + 1: + case CMD_WRITE + 2: + case CMD_WRITE + 3: + esdi->command &= ~0x03; + if (val & 0x02) + fatal("Write with ECC\n"); + esdi->status = STAT_READY | STAT_DRQ | STAT_DSC; + esdi->pos = 0; + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1); + break; - case CMD_VERIFY: - case CMD_VERIFY+1: - esdi->command &= ~0x01; - esdi->status = STAT_BUSY; - get_sector(esdi, &addr); - seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); - xfer_time = esdi_get_xfer_time(esdi, 1); - esdi_set_callback(esdi, seek_time + xfer_time); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); - break; + case CMD_VERIFY: + case CMD_VERIFY + 1: + esdi->command &= ~0x01; + esdi->status = STAT_BUSY; + get_sector(esdi, &addr); + seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); + xfer_time = esdi_get_xfer_time(esdi, 1); + esdi_set_callback(esdi, seek_time + xfer_time); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1); + break; - case CMD_FORMAT: - esdi->status = STAT_DRQ; - esdi->pos = 0; - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); - break; + case CMD_FORMAT: + esdi->status = STAT_DRQ; + esdi->pos = 0; + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1); + break; - case CMD_SET_PARAMETERS: /* Initialize Drive Parameters */ - esdi->status = STAT_BUSY; - esdi_set_callback(esdi, 30 * HDC_TIME); - break; + case CMD_SET_PARAMETERS: /* Initialize Drive Parameters */ + esdi->status = STAT_BUSY; + esdi_set_callback(esdi, 30 * HDC_TIME); + break; - case CMD_DIAGNOSE: /* Execute Drive Diagnostics */ - esdi->status = STAT_BUSY; - esdi_set_callback(esdi, 200 * HDC_TIME); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); - break; + case CMD_DIAGNOSE: /* Execute Drive Diagnostics */ + esdi->status = STAT_BUSY; + esdi_set_callback(esdi, 200 * HDC_TIME); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1); + break; - case 0xe0: /*???*/ - case CMD_READ_PARAMETERS: - esdi->status = STAT_BUSY; - esdi_set_callback(esdi, 200 * HDC_TIME); - break; + case 0xe0: /*???*/ + case CMD_READ_PARAMETERS: + esdi->status = STAT_BUSY; + esdi_set_callback(esdi, 200 * HDC_TIME); + break; - default: - esdi_at_log("WD1007: bad command %02X\n", val); - /*FALLTHROUGH*/ - case 0xe8: /*???*/ - esdi->status = STAT_BUSY; - esdi_set_callback(esdi, 200 * HDC_TIME); - break; - } - } - break; + default: + esdi_at_log("WD1007: bad command %02X\n", val); + /*FALLTHROUGH*/ + case 0xe8: /*???*/ + esdi->status = STAT_BUSY; + esdi_set_callback(esdi, 200 * HDC_TIME); + break; + } + } + break; - case 0x3f6: /* Device control */ - if ((esdi->fdisk & 0x04) && !(val & 0x04)) { - esdi_set_callback(esdi, 500 * HDC_TIME); - esdi->reset = 1; - esdi->status = STAT_BUSY; - } + case 0x3f6: /* Device control */ + if ((esdi->fdisk & 0x04) && !(val & 0x04)) { + esdi_set_callback(esdi, 500 * HDC_TIME); + esdi->reset = 1; + esdi->status = STAT_BUSY; + } - if (val & 0x04) { - /* Drive held in reset. */ - esdi_set_callback(esdi, 0); - esdi->status = STAT_BUSY; - } - esdi->fdisk = val; - irq_update(esdi); - break; - } + if (val & 0x04) { + /* Drive held in reset. */ + esdi_set_callback(esdi, 0); + esdi->status = STAT_BUSY; + } + esdi->fdisk = val; + irq_update(esdi); + break; + } } - static uint16_t esdi_readw(uint16_t port, void *priv) { - esdi_t *esdi = (esdi_t *)priv; + esdi_t *esdi = (esdi_t *) priv; uint16_t temp; - off64_t addr; + off64_t addr; if (port > 0x01f0) { - temp = esdi_read(port, priv); - if (port == 0x01f7) - temp |= 0xff00; - else - temp |= (esdi_read(port + 1, priv) << 8); + temp = esdi_read(port, priv); + if (port == 0x01f7) + temp |= 0xff00; + else + temp |= (esdi_read(port + 1, priv) << 8); } else { - temp = esdi->buffer[esdi->pos >> 1]; - esdi->pos += 2; + temp = esdi->buffer[esdi->pos >> 1]; + esdi->pos += 2; - if (esdi->pos >= 512) { - esdi->pos=0; - esdi->status = STAT_READY | STAT_DSC; - if (esdi->command == CMD_READ || esdi->command == 0xa0) { - esdi->secount = (esdi->secount - 1) & 0xff; - if (esdi->secount) { - next_sector(esdi); - esdi->status = STAT_BUSY; - get_sector(esdi, &addr); - double seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); - double xfer_time = esdi_get_xfer_time(esdi, 1); - /* 390.625 us per sector at 10 Mbit/s = 1280 kB/s. */ - esdi_set_callback(esdi, seek_time + xfer_time); - } else - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - } - } + if (esdi->pos >= 512) { + esdi->pos = 0; + esdi->status = STAT_READY | STAT_DSC; + if (esdi->command == CMD_READ || esdi->command == 0xa0) { + esdi->secount = (esdi->secount - 1) & 0xff; + if (esdi->secount) { + next_sector(esdi); + esdi->status = STAT_BUSY; + get_sector(esdi, &addr); + double seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); + double xfer_time = esdi_get_xfer_time(esdi, 1); + /* 390.625 us per sector at 10 Mbit/s = 1280 kB/s. */ + esdi_set_callback(esdi, seek_time + xfer_time); + } else + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + } + } } - return(temp); + return (temp); } - static uint8_t esdi_read(uint16_t port, void *priv) { - esdi_t *esdi = (esdi_t *)priv; + esdi_t *esdi = (esdi_t *) priv; uint8_t temp = 0xff; switch (port) { - case 0x1f0: /* data */ - temp = esdi_readw(port, esdi) & 0xff; - break; + case 0x1f0: /* data */ + temp = esdi_readw(port, esdi) & 0xff; + break; - case 0x1f1: /* error */ - temp = esdi->error; - break; + case 0x1f1: /* error */ + temp = esdi->error; + break; - case 0x1f2: /* sector count */ - temp = esdi->secount; - break; + case 0x1f2: /* sector count */ + temp = esdi->secount; + break; - case 0x1f3: /* sector */ - temp = esdi->sector; - break; + case 0x1f3: /* sector */ + temp = esdi->sector; + break; - case 0x1f4: /* cylinder low */ - temp = (uint8_t) (esdi->cylinder&0xff); - break; + case 0x1f4: /* cylinder low */ + temp = (uint8_t) (esdi->cylinder & 0xff); + break; - case 0x1f5: /* cylinder high */ - temp = (uint8_t) (esdi->cylinder>>8); - break; + case 0x1f5: /* cylinder high */ + temp = (uint8_t) (esdi->cylinder >> 8); + break; - case 0x1f6: /* drive/Head */ - temp = (uint8_t) (esdi->head | (esdi->drive_sel ? 0x10 : 0) | 0xa0); - break; + case 0x1f6: /* drive/Head */ + temp = (uint8_t) (esdi->head | (esdi->drive_sel ? 0x10 : 0) | 0xa0); + break; - case 0x1f7: /* status */ - irq_lower(esdi); - temp = esdi->status; - break; + case 0x1f7: /* status */ + irq_lower(esdi); + temp = esdi->status; + break; } esdi_at_log("WD1007 read(%04x) = %02x\n", port, temp); - return(temp); + return (temp); } - static void esdi_callback(void *priv) { - esdi_t *esdi = (esdi_t *)priv; + esdi_t *esdi = (esdi_t *) priv; drive_t *drive = &esdi->drives[esdi->drive_sel]; - off64_t addr; - double seek_time; + off64_t addr; + double seek_time; if (esdi->reset) { - esdi->status = STAT_READY|STAT_DSC; - esdi->error = 1; - esdi->secount = 1; - esdi->sector = 1; - esdi->head = 0; - esdi->cylinder = 0; - esdi->reset = 0; + esdi->status = STAT_READY | STAT_DSC; + esdi->error = 1; + esdi->secount = 1; + esdi->sector = 1; + esdi->head = 0; + esdi->cylinder = 0; + esdi->reset = 0; - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - return; + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + return; } esdi_at_log("WD1007: command %02x on drive %i\n", esdi->command, esdi->drive_sel); switch (esdi->command) { - case CMD_RESTORE: - if (! drive->present) { - esdi->status = STAT_READY|STAT_ERR|STAT_DSC; - esdi->error = ERR_ABRT; - } else { - drive->current_cylinder = 0; - esdi->status = STAT_READY|STAT_DSC; - } - irq_raise(esdi); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - break; + case CMD_RESTORE: + if (!drive->present) { + esdi->status = STAT_READY | STAT_ERR | STAT_DSC; + esdi->error = ERR_ABRT; + } else { + drive->current_cylinder = 0; + esdi->status = STAT_READY | STAT_DSC; + } + irq_raise(esdi); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; - case CMD_SEEK: - if (! drive->present) { - esdi->status = STAT_READY|STAT_ERR|STAT_DSC; - esdi->error = ERR_ABRT; - } else - esdi->status = STAT_READY|STAT_DSC; - irq_raise(esdi); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - break; + case CMD_SEEK: + if (!drive->present) { + esdi->status = STAT_READY | STAT_ERR | STAT_DSC; + esdi->error = ERR_ABRT; + } else + esdi->status = STAT_READY | STAT_DSC; + irq_raise(esdi); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; - case CMD_READ: - if (! drive->present) { - esdi->status = STAT_READY|STAT_ERR|STAT_DSC; - esdi->error = ERR_ABRT; - irq_raise(esdi); - } else { - if (get_sector(esdi, &addr)) { - esdi->error = ERR_ID_NOT_FOUND; - esdi->status = STAT_READY|STAT_DSC|STAT_ERR; - irq_raise(esdi); - break; - } + case CMD_READ: + if (!drive->present) { + esdi->status = STAT_READY | STAT_ERR | STAT_DSC; + esdi->error = ERR_ABRT; + irq_raise(esdi); + } else { + if (get_sector(esdi, &addr)) { + esdi->error = ERR_ID_NOT_FOUND; + esdi->status = STAT_READY | STAT_DSC | STAT_ERR; + irq_raise(esdi); + break; + } - hdd_image_read(drive->hdd_num, addr, 1, (uint8_t *)esdi->buffer); - esdi->pos = 0; - esdi->status = STAT_DRQ|STAT_READY|STAT_DSC; - irq_raise(esdi); - } - break; + hdd_image_read(drive->hdd_num, addr, 1, (uint8_t *) esdi->buffer); + esdi->pos = 0; + esdi->status = STAT_DRQ | STAT_READY | STAT_DSC; + irq_raise(esdi); + } + break; - case CMD_WRITE: - if (! drive->present) { - esdi->status = STAT_READY|STAT_ERR|STAT_DSC; - esdi->error = ERR_ABRT; - irq_raise(esdi); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - break; - } else { - if (get_sector(esdi, &addr)) { - esdi->error = ERR_ID_NOT_FOUND; - esdi->status = STAT_READY|STAT_DSC|STAT_ERR; - irq_raise(esdi); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - break; - } + case CMD_WRITE: + if (!drive->present) { + esdi->status = STAT_READY | STAT_ERR | STAT_DSC; + esdi->error = ERR_ABRT; + irq_raise(esdi); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; + } else { + if (get_sector(esdi, &addr)) { + esdi->error = ERR_ID_NOT_FOUND; + esdi->status = STAT_READY | STAT_DSC | STAT_ERR; + irq_raise(esdi); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; + } - hdd_image_write(drive->hdd_num, addr, 1, (uint8_t *)esdi->buffer); - irq_raise(esdi); - esdi->secount = (esdi->secount - 1) & 0xff; - if (esdi->secount) { - esdi->status = STAT_DRQ|STAT_READY|STAT_DSC; - esdi->pos = 0; - next_sector(esdi); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); - } else { - esdi->status = STAT_READY|STAT_DSC; - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - } - } - break; + hdd_image_write(drive->hdd_num, addr, 1, (uint8_t *) esdi->buffer); + irq_raise(esdi); + esdi->secount = (esdi->secount - 1) & 0xff; + if (esdi->secount) { + esdi->status = STAT_DRQ | STAT_READY | STAT_DSC; + esdi->pos = 0; + next_sector(esdi); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1); + } else { + esdi->status = STAT_READY | STAT_DSC; + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + } + } + break; - case CMD_VERIFY: - if (! drive->present) { - esdi->status = STAT_READY|STAT_ERR|STAT_DSC; - esdi->error = ERR_ABRT; - irq_raise(esdi); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - break; - } else { - if (get_sector(esdi, &addr)) { - esdi->error = ERR_ID_NOT_FOUND; - esdi->status = STAT_READY|STAT_DSC|STAT_ERR; - irq_raise(esdi); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - break; - } + case CMD_VERIFY: + if (!drive->present) { + esdi->status = STAT_READY | STAT_ERR | STAT_DSC; + esdi->error = ERR_ABRT; + irq_raise(esdi); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; + } else { + if (get_sector(esdi, &addr)) { + esdi->error = ERR_ID_NOT_FOUND; + esdi->status = STAT_READY | STAT_DSC | STAT_ERR; + irq_raise(esdi); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; + } - hdd_image_read(drive->hdd_num, addr, 1, (uint8_t *)esdi->buffer); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 1); - next_sector(esdi); - esdi->secount = (esdi->secount - 1) & 0xff; - if (esdi->secount) { - get_sector(esdi, &addr); - seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); - esdi_set_callback(esdi, seek_time + HDC_TIME); - } else { - esdi->pos = 0; - esdi->status = STAT_READY|STAT_DSC; - irq_raise(esdi); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - } - } - break; + hdd_image_read(drive->hdd_num, addr, 1, (uint8_t *) esdi->buffer); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1); + next_sector(esdi); + esdi->secount = (esdi->secount - 1) & 0xff; + if (esdi->secount) { + get_sector(esdi, &addr); + seek_time = hdd_timing_read(&hdd[esdi->drives[esdi->drive_sel].hdd_num], addr, 1); + esdi_set_callback(esdi, seek_time + HDC_TIME); + } else { + esdi->pos = 0; + esdi->status = STAT_READY | STAT_DSC; + irq_raise(esdi); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + } + } + break; - case CMD_FORMAT: - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - if (! drive->present) { - esdi->status = STAT_READY|STAT_ERR|STAT_DSC; - esdi->error = ERR_ABRT; - irq_raise(esdi); - break; - } else { - if (get_sector(esdi, &addr)) { - esdi->error = ERR_ID_NOT_FOUND; - esdi->status = STAT_READY|STAT_DSC|STAT_ERR; - irq_raise(esdi); - break; - } + case CMD_FORMAT: + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + if (!drive->present) { + esdi->status = STAT_READY | STAT_ERR | STAT_DSC; + esdi->error = ERR_ABRT; + irq_raise(esdi); + break; + } else { + if (get_sector(esdi, &addr)) { + esdi->error = ERR_ID_NOT_FOUND; + esdi->status = STAT_READY | STAT_DSC | STAT_ERR; + irq_raise(esdi); + break; + } - hdd_image_zero(drive->hdd_num, addr, esdi->secount); - esdi->status = STAT_READY|STAT_DSC; - irq_raise(esdi); - } - break; + hdd_image_zero(drive->hdd_num, addr, esdi->secount); + esdi->status = STAT_READY | STAT_DSC; + irq_raise(esdi); + } + break; - case CMD_DIAGNOSE: - /* This is basically controller diagnostics - it resets drive select to 0, - and resets error and status to ready, DSC, and no error detected. */ - esdi->drive_sel = 0; - drive = &esdi->drives[esdi->drive_sel]; + case CMD_DIAGNOSE: + /* This is basically controller diagnostics - it resets drive select to 0, + and resets error and status to ready, DSC, and no error detected. */ + esdi->drive_sel = 0; + drive = &esdi->drives[esdi->drive_sel]; - esdi->error = 1; /*no error detected*/ - esdi->status = STAT_READY|STAT_DSC; - irq_raise(esdi); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - break; + esdi->error = 1; /*no error detected*/ + esdi->status = STAT_READY | STAT_DSC; + irq_raise(esdi); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; - case CMD_SET_PARAMETERS: /* Initialize Drive Parameters */ - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - if (! drive->present) { - esdi->status = STAT_READY|STAT_ERR|STAT_DSC; - esdi->error = ERR_ABRT; - irq_raise(esdi); - } else { - drive->cfg_spt = esdi->secount; - drive->cfg_hpc = esdi->head+1; + case CMD_SET_PARAMETERS: /* Initialize Drive Parameters */ + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + if (!drive->present) { + esdi->status = STAT_READY | STAT_ERR | STAT_DSC; + esdi->error = ERR_ABRT; + irq_raise(esdi); + } else { + drive->cfg_spt = esdi->secount; + drive->cfg_hpc = esdi->head + 1; - esdi_at_log("WD1007: parameters: spt=%i hpc=%i\n", drive->cfg_spt,drive->cfg_hpc); + esdi_at_log("WD1007: parameters: spt=%i hpc=%i\n", drive->cfg_spt, drive->cfg_hpc); - if (! esdi->secount) - fatal("WD1007: secount=0\n"); - esdi->status = STAT_READY|STAT_DSC; - irq_raise(esdi); - } - break; + if (!esdi->secount) + fatal("WD1007: secount=0\n"); + esdi->status = STAT_READY | STAT_DSC; + irq_raise(esdi); + } + break; - case CMD_NOP: - esdi->status = STAT_READY|STAT_ERR|STAT_DSC; - esdi->error = ERR_ABRT; - irq_raise(esdi); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - break; + case CMD_NOP: + esdi->status = STAT_READY | STAT_ERR | STAT_DSC; + esdi->error = ERR_ABRT; + irq_raise(esdi); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; - case 0xe0: - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - if (! drive->present) { - esdi->status = STAT_READY|STAT_ERR|STAT_DSC; - esdi->error = ERR_ABRT; - irq_raise(esdi); - break; - } else { - switch (esdi->cylinder >> 8) { - case 0x31: - esdi->cylinder = drive->real_tracks; - break; + case 0xe0: + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + if (!drive->present) { + esdi->status = STAT_READY | STAT_ERR | STAT_DSC; + esdi->error = ERR_ABRT; + irq_raise(esdi); + break; + } else { + switch (esdi->cylinder >> 8) { + case 0x31: + esdi->cylinder = drive->real_tracks; + break; - case 0x33: - esdi->cylinder = drive->real_hpc; - break; + case 0x33: + esdi->cylinder = drive->real_hpc; + break; - case 0x35: - esdi->cylinder = 0x200; - break; + case 0x35: + esdi->cylinder = 0x200; + break; - case 0x36: - esdi->cylinder = drive->real_spt; - break; + case 0x36: + esdi->cylinder = drive->real_spt; + break; - default: - esdi_at_log("WD1007: bad read config %02x\n", esdi->cylinder >> 8); - } - esdi->status = STAT_READY|STAT_DSC; - irq_raise(esdi); - } - break; + default: + esdi_at_log("WD1007: bad read config %02x\n", esdi->cylinder >> 8); + } + esdi->status = STAT_READY | STAT_DSC; + irq_raise(esdi); + } + break; - case 0xa0: - if (! drive->present) { - esdi->status = STAT_READY|STAT_ERR|STAT_DSC; - esdi->error = ERR_ABRT; - } else { - memset(esdi->buffer, 0x00, 512); - memset(&esdi->buffer[3], 0xff, 512-6); - esdi->pos = 0; - esdi->status = STAT_DRQ|STAT_READY|STAT_DSC; - } - irq_raise(esdi); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - break; + case 0xa0: + if (!drive->present) { + esdi->status = STAT_READY | STAT_ERR | STAT_DSC; + esdi->error = ERR_ABRT; + } else { + memset(esdi->buffer, 0x00, 512); + memset(&esdi->buffer[3], 0xff, 512 - 6); + esdi->pos = 0; + esdi->status = STAT_DRQ | STAT_READY | STAT_DSC; + } + irq_raise(esdi); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; - case CMD_READ_PARAMETERS: - if (! drive->present) { - esdi->status = STAT_READY|STAT_ERR|STAT_DSC; - esdi->error = ERR_ABRT; - irq_raise(esdi); - } else { - memset(esdi->buffer, 0x00, 512); - esdi->buffer[0] = 0x44; /* general configuration */ - esdi->buffer[1] = drive->real_tracks; /* number of non-removable cylinders */ - esdi->buffer[2] = 0; /* number of removable cylinders */ - esdi->buffer[3] = drive->real_hpc; /* number of heads */ - esdi->buffer[4] = 600; /* number of unformatted bytes/sector */ - esdi->buffer[5] = esdi->buffer[4] * drive->real_spt; /* number of unformatted bytes/track */ - esdi->buffer[6] = drive->real_spt; /* number of sectors */ - esdi->buffer[7] = 0; /*minimum bytes in inter-sector gap*/ - esdi->buffer[8] = 0; /* minimum bytes in postamble */ - esdi->buffer[9] = 0; /* number of words of vendor status */ - /* controller info */ - esdi->buffer[20] = 2; /* controller type */ - esdi->buffer[21] = 1; /* sector buffer size, in sectors */ - esdi->buffer[22] = 0; /* ecc bytes appended */ - esdi->buffer[27] = 'W' | ('D' << 8); - esdi->buffer[28] = '1' | ('0' << 8); - esdi->buffer[29] = '0' | ('7' << 8); - esdi->buffer[30] = 'V' | ('-' << 8); - esdi->buffer[31] = 'S' | ('E' << 8); - esdi->buffer[32] = '1'; - esdi->buffer[47] = 0; /* sectors per interrupt */ - esdi->buffer[48] = 0; /* can use double word read/write? */ - esdi->pos = 0; - esdi->status = STAT_DRQ|STAT_READY|STAT_DSC; - irq_raise(esdi); - } - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - break; + case CMD_READ_PARAMETERS: + if (!drive->present) { + esdi->status = STAT_READY | STAT_ERR | STAT_DSC; + esdi->error = ERR_ABRT; + irq_raise(esdi); + } else { + memset(esdi->buffer, 0x00, 512); + esdi->buffer[0] = 0x44; /* general configuration */ + esdi->buffer[1] = drive->real_tracks; /* number of non-removable cylinders */ + esdi->buffer[2] = 0; /* number of removable cylinders */ + esdi->buffer[3] = drive->real_hpc; /* number of heads */ + esdi->buffer[4] = 600; /* number of unformatted bytes/sector */ + esdi->buffer[5] = esdi->buffer[4] * drive->real_spt; /* number of unformatted bytes/track */ + esdi->buffer[6] = drive->real_spt; /* number of sectors */ + esdi->buffer[7] = 0; /*minimum bytes in inter-sector gap*/ + esdi->buffer[8] = 0; /* minimum bytes in postamble */ + esdi->buffer[9] = 0; /* number of words of vendor status */ + /* controller info */ + esdi->buffer[20] = 2; /* controller type */ + esdi->buffer[21] = 1; /* sector buffer size, in sectors */ + esdi->buffer[22] = 0; /* ecc bytes appended */ + esdi->buffer[27] = 'W' | ('D' << 8); + esdi->buffer[28] = '1' | ('0' << 8); + esdi->buffer[29] = '0' | ('7' << 8); + esdi->buffer[30] = 'V' | ('-' << 8); + esdi->buffer[31] = 'S' | ('E' << 8); + esdi->buffer[32] = '1'; + esdi->buffer[47] = 0; /* sectors per interrupt */ + esdi->buffer[48] = 0; /* can use double word read/write? */ + esdi->pos = 0; + esdi->status = STAT_DRQ | STAT_READY | STAT_DSC; + irq_raise(esdi); + } + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; - default: - esdi_at_log("WD1007: callback on unknown command %02x\n", esdi->command); - /*FALLTHROUGH*/ + default: + esdi_at_log("WD1007: callback on unknown command %02x\n", esdi->command); + /*FALLTHROUGH*/ - case 0xe8: - esdi->status = STAT_READY|STAT_ERR|STAT_DSC; - esdi->error = ERR_ABRT; - irq_raise(esdi); - ui_sb_update_icon(SB_HDD|HDD_BUS_ESDI, 0); - break; + case 0xe8: + esdi->status = STAT_READY | STAT_ERR | STAT_DSC; + esdi->error = ERR_ABRT; + irq_raise(esdi); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); + break; } } - static void loadhd(esdi_t *esdi, int hdd_num, int d, const char *fn) { drive_t *drive = &esdi->drives[hdd_num]; - if (! hdd_image_load(d)) { - esdi_at_log("WD1007: drive %d not present!\n", d); - drive->present = 0; - return; + if (!hdd_image_load(d)) { + esdi_at_log("WD1007: drive %d not present!\n", d); + drive->present = 0; + return; } hdd_preset_apply(d); drive->cfg_spt = drive->real_spt = hdd[d].spt; drive->cfg_hpc = drive->real_hpc = hdd[d].hpc; - drive->real_tracks = hdd[d].tracks; - drive->hdd_num = d; - drive->present = 1; + drive->real_tracks = hdd[d].tracks; + drive->hdd_num = d; + drive->present = 1; } - static void esdi_rom_write(uint32_t addr, uint8_t val, void *p) { - rom_t *rom = (rom_t *)p; + rom_t *rom = (rom_t *) p; addr &= rom->mask; if (addr >= 0x1f00 && addr < 0x2000) - rom->rom[addr] = val; + rom->rom[addr] = val; } - static void * wd1007vse1_init(const device_t *info) { @@ -845,52 +826,52 @@ wd1007vse1_init(const device_t *info) memset(esdi, 0x00, sizeof(esdi_t)); c = 0; - for (d=0; d= ESDI_NUM) break; - } + if (++c >= ESDI_NUM) + break; + } } - esdi->status = STAT_READY|STAT_DSC; - esdi->error = 1; + esdi->status = STAT_READY | STAT_DSC; + esdi->error = 1; rom_init(&esdi->bios_rom, - BIOS_FILE, 0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); + BIOS_FILE, 0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); mem_mapping_set_handler(&esdi->bios_rom.mapping, - rom_read, rom_readw, rom_readl, - esdi_rom_write, NULL, NULL); + rom_read, rom_readw, rom_readl, + esdi_rom_write, NULL, NULL); io_sethandler(0x01f0, 1, - esdi_read, esdi_readw, NULL, - esdi_write, esdi_writew, NULL, esdi); + esdi_read, esdi_readw, NULL, + esdi_write, esdi_writew, NULL, esdi); io_sethandler(0x01f1, 7, - esdi_read, esdi_readw, NULL, - esdi_write, esdi_writew, NULL, esdi); + esdi_read, esdi_readw, NULL, + esdi_write, esdi_writew, NULL, esdi); io_sethandler(0x03f6, 1, NULL, NULL, NULL, - esdi_write, NULL, NULL, esdi); + esdi_write, NULL, NULL, esdi); timer_add(&esdi->callback_timer, esdi_callback, esdi, 0); ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); - return(esdi); + return (esdi); } - static void wd1007vse1_close(void *priv) { - esdi_t *esdi = (esdi_t *)priv; + esdi_t *esdi = (esdi_t *) priv; drive_t *drive; - int d; + int d; - for (d=0; d<2; d++) { - drive = &esdi->drives[d]; + for (d = 0; d < 2; d++) { + drive = &esdi->drives[d]; - hdd_image_close(drive->hdd_num); + hdd_image_close(drive->hdd_num); } free(esdi); @@ -898,23 +879,22 @@ wd1007vse1_close(void *priv) ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); } - static int wd1007vse1_available(void) { - return(rom_present(BIOS_FILE)); + return (rom_present(BIOS_FILE)); } const device_t esdi_at_wd1007vse1_device = { - .name = "Western Digital WD1007V-SE1 (ESDI)", + .name = "Western Digital WD1007V-SE1 (ESDI)", .internal_name = "esdi_at", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 0, - .init = wd1007vse1_init, - .close = wd1007vse1_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 0, + .init = wd1007vse1_init, + .close = wd1007vse1_close, + .reset = NULL, { .available = wd1007vse1_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/disk/hdc_esdi_mca.c b/src/disk/hdc_esdi_mca.c index 6f6b77723..e5e96e364 100644 --- a/src/disk/hdc_esdi_mca.c +++ b/src/disk/hdc_esdi_mca.c @@ -243,7 +243,7 @@ static double esdi_mca_get_xfer_time(esdi_t *esdi, int size) { /* 390.625 us per sector at 10 Mbit/s = 1280 kB/s. */ - return (3125.0 / 8.0) * (double)size; + return (3125.0 / 8.0) * (double) size; } static void @@ -352,7 +352,7 @@ esdi_callback(void *priv) esdi_t *dev = (esdi_t *) priv; drive_t *drive; int val; - double cmd_time = 0.0; + double cmd_time = 0.0; esdi_mca_set_callback(dev, 0); @@ -525,7 +525,7 @@ esdi_callback(void *priv) switch (dev->cmd_state) { case 0: - dev->rba = (dev->cmd_data[2] | (dev->cmd_data[3] << 16)) & 0x0fffffff; + dev->rba = (dev->cmd_data[2] | (dev->cmd_data[3] << 16)) & 0x0fffffff; dev->sector_count = dev->cmd_data[1]; if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) { diff --git a/src/disk/hdc_ide.c b/src/disk/hdc_ide.c index b49e2e926..7bf834a37 100644 --- a/src/disk/hdc_ide.c +++ b/src/disk/hdc_ide.c @@ -46,179 +46,173 @@ #include <86box/zip.h> #include <86box/version.h> - /* Bits of 'atastat' */ -#define ERR_STAT 0x01 /* Error */ -#define IDX_STAT 0x02 /* Index */ -#define CORR_STAT 0x04 /* Corrected data */ -#define DRQ_STAT 0x08 /* Data request */ -#define DSC_STAT 0x10 /* Drive seek complete */ -#define SERVICE_STAT 0x10 /* ATAPI service */ -#define DWF_STAT 0x20 /* Drive write fault */ -#define DRDY_STAT 0x40 /* Ready */ -#define BSY_STAT 0x80 /* Busy */ +#define ERR_STAT 0x01 /* Error */ +#define IDX_STAT 0x02 /* Index */ +#define CORR_STAT 0x04 /* Corrected data */ +#define DRQ_STAT 0x08 /* Data request */ +#define DSC_STAT 0x10 /* Drive seek complete */ +#define SERVICE_STAT 0x10 /* ATAPI service */ +#define DWF_STAT 0x20 /* Drive write fault */ +#define DRDY_STAT 0x40 /* Ready */ +#define BSY_STAT 0x80 /* Busy */ /* Bits of 'error' */ -#define AMNF_ERR 0x01 /* Address mark not found */ -#define TK0NF_ERR 0x02 /* Track 0 not found */ -#define ABRT_ERR 0x04 /* Command aborted */ -#define MCR_ERR 0x08 /* Media change request */ -#define IDNF_ERR 0x10 /* Sector ID not found */ -#define MC_ERR 0x20 /* Media change */ -#define UNC_ERR 0x40 /* Uncorrectable data error */ -#define BBK_ERR 0x80 /* Bad block mark detected */ +#define AMNF_ERR 0x01 /* Address mark not found */ +#define TK0NF_ERR 0x02 /* Track 0 not found */ +#define ABRT_ERR 0x04 /* Command aborted */ +#define MCR_ERR 0x08 /* Media change request */ +#define IDNF_ERR 0x10 /* Sector ID not found */ +#define MC_ERR 0x20 /* Media change */ +#define UNC_ERR 0x40 /* Uncorrectable data error */ +#define BBK_ERR 0x80 /* Bad block mark detected */ /* ATA Commands */ -#define WIN_NOP 0x00 -#define WIN_SRST 0x08 /* ATAPI Device Reset */ -#define WIN_RECAL 0x10 -#define WIN_READ 0x20 /* 28-Bit Read */ -#define WIN_READ_NORETRY 0x21 /* 28-Bit Read - no retry */ -#define WIN_WRITE 0x30 /* 28-Bit Write */ -#define WIN_WRITE_NORETRY 0x31 /* 28-Bit Write - no retry */ -#define WIN_VERIFY 0x40 /* 28-Bit Verify */ -#define WIN_VERIFY_ONCE 0x41 /* Added by OBattler - deprected older ATA command, according to the specification I found, it is identical to 0x40 */ -#define WIN_FORMAT 0x50 -#define WIN_SEEK 0x70 -#define WIN_DRIVE_DIAGNOSTICS 0x90 /* Execute Drive Diagnostics */ -#define WIN_SPECIFY 0x91 /* Initialize Drive Parameters */ -#define WIN_PACKETCMD 0xA0 /* Send a packet command. */ -#define WIN_PIDENTIFY 0xA1 /* Identify ATAPI device */ -#define WIN_READ_MULTIPLE 0xC4 -#define WIN_WRITE_MULTIPLE 0xC5 -#define WIN_SET_MULTIPLE_MODE 0xC6 -#define WIN_READ_DMA 0xC8 -#define WIN_READ_DMA_ALT 0xC9 -#define WIN_WRITE_DMA 0xCA -#define WIN_WRITE_DMA_ALT 0xCB -#define WIN_STANDBYNOW1 0xE0 -#define WIN_IDLENOW1 0xE1 -#define WIN_SETIDLE1 0xE3 -#define WIN_CHECKPOWERMODE1 0xE5 -#define WIN_SLEEP1 0xE6 -#define WIN_IDENTIFY 0xEC /* Ask drive to identify itself */ -#define WIN_SET_FEATURES 0xEF -#define WIN_READ_NATIVE_MAX 0xF8 +#define WIN_NOP 0x00 +#define WIN_SRST 0x08 /* ATAPI Device Reset */ +#define WIN_RECAL 0x10 +#define WIN_READ 0x20 /* 28-Bit Read */ +#define WIN_READ_NORETRY 0x21 /* 28-Bit Read - no retry */ +#define WIN_WRITE 0x30 /* 28-Bit Write */ +#define WIN_WRITE_NORETRY 0x31 /* 28-Bit Write - no retry */ +#define WIN_VERIFY 0x40 /* 28-Bit Verify */ +#define WIN_VERIFY_ONCE 0x41 /* Added by OBattler - deprected older ATA command, according to the specification I found, it is identical to 0x40 */ +#define WIN_FORMAT 0x50 +#define WIN_SEEK 0x70 +#define WIN_DRIVE_DIAGNOSTICS 0x90 /* Execute Drive Diagnostics */ +#define WIN_SPECIFY 0x91 /* Initialize Drive Parameters */ +#define WIN_PACKETCMD 0xA0 /* Send a packet command. */ +#define WIN_PIDENTIFY 0xA1 /* Identify ATAPI device */ +#define WIN_READ_MULTIPLE 0xC4 +#define WIN_WRITE_MULTIPLE 0xC5 +#define WIN_SET_MULTIPLE_MODE 0xC6 +#define WIN_READ_DMA 0xC8 +#define WIN_READ_DMA_ALT 0xC9 +#define WIN_WRITE_DMA 0xCA +#define WIN_WRITE_DMA_ALT 0xCB +#define WIN_STANDBYNOW1 0xE0 +#define WIN_IDLENOW1 0xE1 +#define WIN_SETIDLE1 0xE3 +#define WIN_CHECKPOWERMODE1 0xE5 +#define WIN_SLEEP1 0xE6 +#define WIN_IDENTIFY 0xEC /* Ask drive to identify itself */ +#define WIN_SET_FEATURES 0xEF +#define WIN_READ_NATIVE_MAX 0xF8 -#define FEATURE_SET_TRANSFER_MODE 0x03 -#define FEATURE_ENABLE_IRQ_OVERLAPPED 0x5d -#define FEATURE_ENABLE_IRQ_SERVICE 0x5e -#define FEATURE_DISABLE_REVERT 0x66 -#define FEATURE_ENABLE_REVERT 0xcc -#define FEATURE_DISABLE_IRQ_OVERLAPPED 0xdd -#define FEATURE_DISABLE_IRQ_SERVICE 0xde - -#define IDE_TIME 10.0 +#define FEATURE_SET_TRANSFER_MODE 0x03 +#define FEATURE_ENABLE_IRQ_OVERLAPPED 0x5d +#define FEATURE_ENABLE_IRQ_SERVICE 0x5e +#define FEATURE_DISABLE_REVERT 0x66 +#define FEATURE_ENABLE_REVERT 0xcc +#define FEATURE_DISABLE_IRQ_OVERLAPPED 0xdd +#define FEATURE_DISABLE_IRQ_SERVICE 0xde +#define IDE_TIME 10.0 typedef struct { - int bit32, cur_dev, - irq, inited, - diag, force_ata3; - uint16_t base_main, side_main; - pc_timer_t timer; - ide_t *ide[2]; + int bit32, cur_dev, + irq, inited, + diag, force_ata3; + uint16_t base_main, side_main; + pc_timer_t timer; + ide_t *ide[2]; } ide_board_t; typedef struct { - int (*dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv); - void (*set_irq)(int channel, void *priv); - void *priv; + int (*dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv); + void (*set_irq)(int channel, void *priv); + void *priv; } ide_bm_t; -static ide_board_t *ide_boards[4] = { NULL, NULL, NULL, NULL }; -static ide_bm_t *ide_bm[4] = { NULL, NULL, NULL, NULL }; +static ide_board_t *ide_boards[4] = { NULL, NULL, NULL, NULL }; +static ide_bm_t *ide_bm[4] = { NULL, NULL, NULL, NULL }; static uint8_t ide_ter_pnp_rom[] = { - 0x09, 0xf8, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, /* BOX0001, serial 0, dummy checksum (filled in by isapnp_add_card) */ - 0x0a, 0x10, 0x10, /* PnP version 1.0, vendor version 1.0 */ + 0x09, 0xf8, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, /* BOX0001, serial 0, dummy checksum (filled in by isapnp_add_card) */ + 0x0a, 0x10, 0x10, /* PnP version 1.0, vendor version 1.0 */ 0x82, 0x0e, 0x00, 'I', 'D', 'E', ' ', 'C', 'o', 'n', 't', 'r', 'o', 'l', 'l', 'e', 'r', /* ANSI identifier */ - 0x15, 0x09, 0xf8, 0x00, 0x01, 0x00, /* logical device BOX0001 */ - 0x1c, 0x41, 0xd0, 0x06, 0x00, /* compatible device PNP0600 */ - 0x31, 0x00, /* start dependent functions, preferred */ - 0x22, 0x00, 0x04, /* IRQ 10 */ - 0x47, 0x01, 0x68, 0x01, 0x68, 0x01, 0x01, 0x08, /* I/O 0x168, decodes 16-bit, 1-byte alignment, 8 addresses */ - 0x47, 0x01, 0x6e, 0x03, 0x6e, 0x03, 0x01, 0x01, /* I/O 0x36E, decodes 16-bit, 1-byte alignment, 1 address */ - 0x30, /* start dependent functions, acceptable */ - 0x22, 0xb8, 0x1e, /* IRQ 3/4/5/7/9/10/11/12 */ - 0x47, 0x01, 0x68, 0x01, 0x68, 0x01, 0x01, 0x08, /* I/O 0x168, decodes 16-bit, 1-byte alignment, 8 addresses */ - 0x47, 0x01, 0x6e, 0x03, 0x6e, 0x03, 0x01, 0x01, /* I/O 0x36E, decodes 16-bit, 1-byte alignment, 1 address */ - 0x30, /* start dependent functions, acceptable */ - 0x22, 0xb8, 0x1e, /* IRQ 3/4/5/7/9/10/11/12 */ - 0x47, 0x01, 0x00, 0x01, 0xf8, 0xff, 0x08, 0x08, /* I/O 0x100-0xFFF8, decodes 16-bit, 8-byte alignment, 8 addresses */ - 0x47, 0x01, 0x00, 0x01, 0xff, 0xff, 0x01, 0x01, /* I/O 0x100-0xFFFF, decodes 16-bit, 1-byte alignment, 1 address */ - 0x38, /* end dependent functions */ + 0x15, 0x09, 0xf8, 0x00, 0x01, 0x00, /* logical device BOX0001 */ + 0x1c, 0x41, 0xd0, 0x06, 0x00, /* compatible device PNP0600 */ + 0x31, 0x00, /* start dependent functions, preferred */ + 0x22, 0x00, 0x04, /* IRQ 10 */ + 0x47, 0x01, 0x68, 0x01, 0x68, 0x01, 0x01, 0x08, /* I/O 0x168, decodes 16-bit, 1-byte alignment, 8 addresses */ + 0x47, 0x01, 0x6e, 0x03, 0x6e, 0x03, 0x01, 0x01, /* I/O 0x36E, decodes 16-bit, 1-byte alignment, 1 address */ + 0x30, /* start dependent functions, acceptable */ + 0x22, 0xb8, 0x1e, /* IRQ 3/4/5/7/9/10/11/12 */ + 0x47, 0x01, 0x68, 0x01, 0x68, 0x01, 0x01, 0x08, /* I/O 0x168, decodes 16-bit, 1-byte alignment, 8 addresses */ + 0x47, 0x01, 0x6e, 0x03, 0x6e, 0x03, 0x01, 0x01, /* I/O 0x36E, decodes 16-bit, 1-byte alignment, 1 address */ + 0x30, /* start dependent functions, acceptable */ + 0x22, 0xb8, 0x1e, /* IRQ 3/4/5/7/9/10/11/12 */ + 0x47, 0x01, 0x00, 0x01, 0xf8, 0xff, 0x08, 0x08, /* I/O 0x100-0xFFF8, decodes 16-bit, 8-byte alignment, 8 addresses */ + 0x47, 0x01, 0x00, 0x01, 0xff, 0xff, 0x01, 0x01, /* I/O 0x100-0xFFFF, decodes 16-bit, 1-byte alignment, 1 address */ + 0x38, /* end dependent functions */ 0x79, 0x00 /* end tag, dummy checksum (filled in by isapnp_add_card) */ }; static uint8_t ide_qua_pnp_rom[] = { - 0x09, 0xf8, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, /* BOX0001, serial 1, dummy checksum (filled in by isapnp_add_card) */ - 0x0a, 0x10, 0x10, /* PnP version 1.0, vendor version 1.0 */ + 0x09, 0xf8, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, /* BOX0001, serial 1, dummy checksum (filled in by isapnp_add_card) */ + 0x0a, 0x10, 0x10, /* PnP version 1.0, vendor version 1.0 */ 0x82, 0x0e, 0x00, 'I', 'D', 'E', ' ', 'C', 'o', 'n', 't', 'r', 'o', 'l', 'l', 'e', 'r', /* ANSI identifier */ - 0x15, 0x09, 0xf8, 0x00, 0x01, 0x00, /* logical device BOX0001 */ - 0x1c, 0x41, 0xd0, 0x06, 0x00, /* compatible device PNP0600 */ - 0x31, 0x00, /* start dependent functions, preferred */ - 0x22, 0x00, 0x08, /* IRQ 11 */ - 0x47, 0x01, 0xe8, 0x01, 0xe8, 0x01, 0x01, 0x08, /* I/O 0x1E8, decodes 16-bit, 1-byte alignment, 8 addresses */ - 0x47, 0x01, 0xee, 0x03, 0xee, 0x03, 0x01, 0x01, /* I/O 0x3EE, decodes 16-bit, 1-byte alignment, 1 address */ - 0x30, /* start dependent functions, acceptable */ - 0x22, 0xb8, 0x1e, /* IRQ 3/4/5/7/9/10/11/12 */ - 0x47, 0x01, 0xe8, 0x01, 0xe8, 0x01, 0x01, 0x08, /* I/O 0x1E8, decodes 16-bit, 1-byte alignment, 8 addresses */ - 0x47, 0x01, 0xee, 0x03, 0xee, 0x03, 0x01, 0x01, /* I/O 0x3EE, decodes 16-bit, 1-byte alignment, 1 address */ - 0x30, /* start dependent functions, acceptable */ - 0x22, 0xb8, 0x1e, /* IRQ 3/4/5/7/9/10/11/12 */ - 0x47, 0x01, 0x00, 0x01, 0xf8, 0xff, 0x08, 0x08, /* I/O 0x100-0xFFF8, decodes 16-bit, 8-byte alignment, 8 addresses */ - 0x47, 0x01, 0x00, 0x01, 0xff, 0xff, 0x01, 0x01, /* I/O 0x100-0xFFFF, decodes 16-bit, 1-byte alignment, 1 address */ - 0x38, /* end dependent functions */ + 0x15, 0x09, 0xf8, 0x00, 0x01, 0x00, /* logical device BOX0001 */ + 0x1c, 0x41, 0xd0, 0x06, 0x00, /* compatible device PNP0600 */ + 0x31, 0x00, /* start dependent functions, preferred */ + 0x22, 0x00, 0x08, /* IRQ 11 */ + 0x47, 0x01, 0xe8, 0x01, 0xe8, 0x01, 0x01, 0x08, /* I/O 0x1E8, decodes 16-bit, 1-byte alignment, 8 addresses */ + 0x47, 0x01, 0xee, 0x03, 0xee, 0x03, 0x01, 0x01, /* I/O 0x3EE, decodes 16-bit, 1-byte alignment, 1 address */ + 0x30, /* start dependent functions, acceptable */ + 0x22, 0xb8, 0x1e, /* IRQ 3/4/5/7/9/10/11/12 */ + 0x47, 0x01, 0xe8, 0x01, 0xe8, 0x01, 0x01, 0x08, /* I/O 0x1E8, decodes 16-bit, 1-byte alignment, 8 addresses */ + 0x47, 0x01, 0xee, 0x03, 0xee, 0x03, 0x01, 0x01, /* I/O 0x3EE, decodes 16-bit, 1-byte alignment, 1 address */ + 0x30, /* start dependent functions, acceptable */ + 0x22, 0xb8, 0x1e, /* IRQ 3/4/5/7/9/10/11/12 */ + 0x47, 0x01, 0x00, 0x01, 0xf8, 0xff, 0x08, 0x08, /* I/O 0x100-0xFFF8, decodes 16-bit, 8-byte alignment, 8 addresses */ + 0x47, 0x01, 0x00, 0x01, 0xff, 0xff, 0x01, 0x01, /* I/O 0x100-0xFFFF, decodes 16-bit, 1-byte alignment, 1 address */ + 0x38, /* end dependent functions */ 0x79, 0x00 /* end tag, dummy checksum (filled in by isapnp_add_card) */ }; -ide_t *ide_drives[IDE_NUM]; -int ide_ter_enabled = 0, ide_qua_enabled = 0; - -static void ide_atapi_callback(ide_t *ide); -static void ide_callback(void *priv); +ide_t *ide_drives[IDE_NUM]; +int ide_ter_enabled = 0, ide_qua_enabled = 0; +static void ide_atapi_callback(ide_t *ide); +static void ide_callback(void *priv); #ifdef ENABLE_IDE_LOG int ide_do_log = ENABLE_IDE_LOG; - static void ide_log(const char *fmt, ...) { va_list ap; if (ide_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define ide_log(fmt, ...) +# define ide_log(fmt, ...) #endif - uint8_t -getstat(ide_t *ide) { +getstat(ide_t *ide) +{ return ide->atastat; } - ide_t * ide_get_drive(int ch) { if (ch >= 8) - return NULL; + return NULL; return ide_drives[ch]; } - double ide_get_xfer_time(ide_t *ide, int size) { @@ -226,81 +220,80 @@ ide_get_xfer_time(ide_t *ide, int size) /* We assume that 1 MB = 1000000 B in this case, so we have as many B/us as there are MB/s because 1 s = 1000000 us. */ - switch(ide->mdma_mode & 0x300) { - case 0x000: /* PIO */ - switch(ide->mdma_mode & 0xff) { - case 0x01: - period = (10.0 / 3.0); - break; - case 0x02: - period = (20.0 / 3.83); - break; - case 0x04: - period = (25.0 / 3.0); - break; - case 0x08: - period = (100.0 / 9.0); - break; - case 0x10: - period = (50.0 / 3.0); - break; - } - break; - case 0x100: /* Single Word DMA */ - switch(ide->mdma_mode & 0xff) { - case 0x01: - period = (25.0 / 12.0); - break; - case 0x02: - period = (25.0 / 6.0); - break; - case 0x04: - period = (25.0 / 3.0); - break; - } - break; - case 0x200: /* Multiword DMA */ - switch(ide->mdma_mode & 0xff) { - case 0x01: - period = (25.0 / 6.0); - break; - case 0x02: - period = (40.0 / 3.0); - break; - case 0x04: - period = (50.0 / 3.0); - break; - } - break; - case 0x300: /* Ultra DMA */ - switch(ide->mdma_mode & 0xff) { - case 0x01: - period = (50.0 / 3.0); - break; - case 0x02: - period = 25.0; - break; - case 0x04: - period = (100.0 / 3.0); - break; - case 0x08: - period = (400.0 / 9.0); - break; - case 0x10: - period = (200.0 / 3.0); - break; - case 0x20: - period = 100.0; - break; - } - break; + switch (ide->mdma_mode & 0x300) { + case 0x000: /* PIO */ + switch (ide->mdma_mode & 0xff) { + case 0x01: + period = (10.0 / 3.0); + break; + case 0x02: + period = (20.0 / 3.83); + break; + case 0x04: + period = (25.0 / 3.0); + break; + case 0x08: + period = (100.0 / 9.0); + break; + case 0x10: + period = (50.0 / 3.0); + break; + } + break; + case 0x100: /* Single Word DMA */ + switch (ide->mdma_mode & 0xff) { + case 0x01: + period = (25.0 / 12.0); + break; + case 0x02: + period = (25.0 / 6.0); + break; + case 0x04: + period = (25.0 / 3.0); + break; + } + break; + case 0x200: /* Multiword DMA */ + switch (ide->mdma_mode & 0xff) { + case 0x01: + period = (25.0 / 6.0); + break; + case 0x02: + period = (40.0 / 3.0); + break; + case 0x04: + period = (50.0 / 3.0); + break; + } + break; + case 0x300: /* Ultra DMA */ + switch (ide->mdma_mode & 0xff) { + case 0x01: + period = (50.0 / 3.0); + break; + case 0x02: + period = 25.0; + break; + case 0x04: + period = (100.0 / 3.0); + break; + case 0x08: + period = (400.0 / 9.0); + break; + case 0x10: + period = (200.0 / 3.0); + break; + case 0x20: + period = 100.0; + break; + } + break; } - period = (1.0 / period); /* get us for 1 byte */ - return period * ((double) size); /* multiply by bytes to get period for the entire transfer */ + period = (1.0 / period); /* get us for 1 byte */ + return period * ((double) size); /* multiply by bytes to get period for the entire transfer */ } - double ide_atapi_get_period(uint8_t channel) { @@ -309,84 +302,80 @@ ide_atapi_get_period(uint8_t channel) ide_log("ide_atapi_get_period(%i)\n", channel); if (!ide) { - ide_log("Get period failed\n"); - return -1.0; + ide_log("Get period failed\n"); + return -1.0; } return ide_get_xfer_time(ide, 1); } - void ide_irq_raise(ide_t *ide) { if (!ide_boards[ide->board]) - return; + return; /* ide_log("Raising IRQ %i (board %i)\n", ide_boards[ide->board]->irq, ide->board); */ ide_log("IDE %i: IRQ raise\n", ide->board); if (!(ide->fdisk & 2) && ide->selected) { - if (!ide_boards[ide->board]->force_ata3 && ide_bm[ide->board] && ide_bm[ide->board]->set_irq) - ide_bm[ide->board]->set_irq(ide->board | 0x40, ide_bm[ide->board]->priv); - else if (ide_boards[ide->board]->irq != -1) - picint(1 << ide_boards[ide->board]->irq); + if (!ide_boards[ide->board]->force_ata3 && ide_bm[ide->board] && ide_bm[ide->board]->set_irq) + ide_bm[ide->board]->set_irq(ide->board | 0x40, ide_bm[ide->board]->priv); + else if (ide_boards[ide->board]->irq != -1) + picint(1 << ide_boards[ide->board]->irq); } ide->irqstat = 1; ide->service = 1; } - void ide_irq_lower(ide_t *ide) { if (!ide_boards[ide->board]) - return; + return; /* ide_log("Lowering IRQ %i (board %i)\n", ide_boards[ide->board]->irq, ide->board); */ // ide_log("IDE %i: IRQ lower\n", ide->board); if (ide->irqstat && ide->selected) { - if (!ide_boards[ide->board]->force_ata3 && ide_bm[ide->board] && ide_bm[ide->board]->set_irq) - ide_bm[ide->board]->set_irq(ide->board, ide_bm[ide->board]->priv); - else if (ide_boards[ide->board]->irq != -1) - picintc(1 << ide_boards[ide->board]->irq); + if (!ide_boards[ide->board]->force_ata3 && ide_bm[ide->board] && ide_bm[ide->board]->set_irq) + ide_bm[ide->board]->set_irq(ide->board, ide_bm[ide->board]->priv); + else if (ide_boards[ide->board]->irq != -1) + picintc(1 << ide_boards[ide->board]->irq); } ide->irqstat = 0; } - static void ide_irq_update(ide_t *ide) { if (!ide_boards[ide->board]) - return; + return; /* ide_log("Raising IRQ %i (board %i)\n", ide_boards[ide->board]->irq, ide->board); */ if (!(ide->fdisk & 2) && ide->irqstat) { - ide_log("IDE %i: IRQ update raise\n", ide->board); - if (!ide_boards[ide->board]->force_ata3 && ide_bm[ide->board] && ide_bm[ide->board]->set_irq) { - ide_bm[ide->board]->set_irq(ide->board, ide_bm[ide->board]->priv); - ide_bm[ide->board]->set_irq(ide->board | 0x40, ide_bm[ide->board]->priv); - } else if (ide_boards[ide->board]->irq != -1) { - picintc(1 << ide_boards[ide->board]->irq); - picint(1 << ide_boards[ide->board]->irq); - } + ide_log("IDE %i: IRQ update raise\n", ide->board); + if (!ide_boards[ide->board]->force_ata3 && ide_bm[ide->board] && ide_bm[ide->board]->set_irq) { + ide_bm[ide->board]->set_irq(ide->board, ide_bm[ide->board]->priv); + ide_bm[ide->board]->set_irq(ide->board | 0x40, ide_bm[ide->board]->priv); + } else if (ide_boards[ide->board]->irq != -1) { + picintc(1 << ide_boards[ide->board]->irq); + picint(1 << ide_boards[ide->board]->irq); + } } else if ((ide->fdisk & 2) || !ide->irqstat) { - ide_log("IDE %i: IRQ update lower\n", ide->board); - if (!ide_boards[ide->board]->force_ata3 && ide_bm[ide->board] && ide_bm[ide->board]->set_irq) - ide_bm[ide->board]->set_irq(ide->board, ide_bm[ide->board]->priv); - else if (ide_boards[ide->board]->irq != -1) - picintc(1 << ide_boards[ide->board]->irq); + ide_log("IDE %i: IRQ update lower\n", ide->board); + if (!ide_boards[ide->board]->force_ata3 && ide_bm[ide->board] && ide_bm[ide->board]->set_irq) + ide_bm[ide->board]->set_irq(ide->board, ide_bm[ide->board]->priv); + else if (ide_boards[ide->board]->irq != -1) + picintc(1 << ide_boards[ide->board]->irq); } } - /** * Copy a string into a buffer, padding with spaces, and placing characters as * if they were packed into 16-bit values, stored little-endian. @@ -402,15 +391,14 @@ ide_padstr(char *str, const char *src, int len) int i, v; for (i = 0; i < len; i++) { - if (*src != '\0') - v = *src++; - else - v = ' '; - str[i ^ 1] = v; + if (*src != '\0') + v = *src++; + else + v = ' '; + str[i ^ 1] = v; } } - /** * Copy a string into a buffer, padding with spaces. Does not add string * terminator. @@ -420,83 +408,82 @@ ide_padstr(char *str, const char *src, int len) * this length will be padded with spaces. * @param src Source string */ -void ide_padstr8(uint8_t *buf, int buf_size, const char *src) +void +ide_padstr8(uint8_t *buf, int buf_size, const char *src) { int i; for (i = 0; i < buf_size; i++) { - if (*src != '\0') - buf[i] = *src++; - else - buf[i] = ' '; + if (*src != '\0') + buf[i] = *src++; + else + buf[i] = ' '; } } - static int ide_get_max(ide_t *ide, int type) { if (ide->type == IDE_ATAPI) - return ide->get_max(!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL), type); + return ide->get_max(!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL), type); - switch(type) { - case TYPE_PIO: /* PIO */ - if (!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL)) - return 4; + switch (type) { + case TYPE_PIO: /* PIO */ + if (!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL)) + return 4; - return 0; /* Maximum PIO 0 for legacy PIO-only drive. */ - case TYPE_SDMA: /* SDMA */ - if (!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL)) - return 2; + return 0; /* Maximum PIO 0 for legacy PIO-only drive. */ + case TYPE_SDMA: /* SDMA */ + if (!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL)) + return 2; - return -1; - case TYPE_MDMA: /* MDMA */ - if (!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL)) - return 2; + return -1; + case TYPE_MDMA: /* MDMA */ + if (!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL)) + return 2; - return -1; - case TYPE_UDMA: /* UDMA */ - if (!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL)) - return 5; + return -1; + case TYPE_UDMA: /* UDMA */ + if (!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL)) + return 5; - return -1; - default: - fatal("Unknown transfer type: %i\n", type); - return -1; + return -1; + default: + fatal("Unknown transfer type: %i\n", type); + return -1; } } - static int ide_get_timings(ide_t *ide, int type) { if (ide->type == IDE_ATAPI) - return ide->get_timings(!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL), type); + return ide->get_timings(!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL), type); - switch(type) { - case TIMINGS_DMA: - if (!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL)) - return 120; + switch (type) { + case TIMINGS_DMA: + if (!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL)) + return 120; - return 0; - case TIMINGS_PIO: - if (!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL)) - return 120; + return 0; + case TIMINGS_PIO: + if (!ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL)) + return 120; - return 0; - case TIMINGS_PIO_FC: - return 0; - default: - fatal("Unknown transfer type: %i\n", type); - return 0; + return 0; + case TIMINGS_PIO_FC: + return 0; + default: + fatal("Unknown transfer type: %i\n", type); + return 0; } } - /** * Fill in ide->buffer with the output of the "IDENTIFY DEVICE" command */ -static void ide_hd_identify(ide_t *ide) +static void +ide_hd_identify(ide_t *ide) { char device_identify[9] = { '8', '6', 'B', '_', 'H', 'D', '0', '0', 0 }; @@ -509,88 +496,87 @@ static void ide_hd_identify(ide_t *ide) d_spt = ide->spt; if (ide->hpc <= 16) { - /* HPC <= 16, report as needed. */ - d_tracks = ide->tracks; - d_hpc = ide->hpc; + /* HPC <= 16, report as needed. */ + d_tracks = ide->tracks; + d_hpc = ide->hpc; } else { - /* HPC > 16, convert to 16 HPC. */ - d_hpc = 16; - d_tracks = (ide->tracks * ide->hpc) / 16; + /* HPC > 16, convert to 16 HPC. */ + d_hpc = 16; + d_tracks = (ide->tracks * ide->hpc) / 16; } /* Specify default CHS translation */ if (full_size <= 16514064) { - ide->buffer[1] = d_tracks; /* Tracks in default CHS translation. */ - ide->buffer[3] = d_hpc; /* Heads in default CHS translation. */ - ide->buffer[6] = d_spt; /* Heads in default CHS translation. */ + ide->buffer[1] = d_tracks; /* Tracks in default CHS translation. */ + ide->buffer[3] = d_hpc; /* Heads in default CHS translation. */ + ide->buffer[6] = d_spt; /* Heads in default CHS translation. */ } else { - ide->buffer[1] = 16383; /* Tracks in default CHS translation. */ - ide->buffer[3] = 16; /* Heads in default CHS translation. */ - ide->buffer[6] = 63; /* Heads in default CHS translation. */ + ide->buffer[1] = 16383; /* Tracks in default CHS translation. */ + ide->buffer[3] = 16; /* Heads in default CHS translation. */ + ide->buffer[6] = 63; /* Heads in default CHS translation. */ } ide_log("Default CHS translation: %i, %i, %i\n", ide->buffer[1], ide->buffer[3], ide->buffer[6]); - ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */ - ide_padstr((char *) (ide->buffer + 23), EMU_VERSION_EX, 8); /* Firmware */ - ide_padstr((char *) (ide->buffer + 27), device_identify, 40); /* Model */ - ide->buffer[0] = (1 << 6); /*Fixed drive*/ - ide->buffer[20] = 3; /*Buffer type*/ + ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */ + ide_padstr((char *) (ide->buffer + 23), EMU_VERSION_EX, 8); /* Firmware */ + ide_padstr((char *) (ide->buffer + 27), device_identify, 40); /* Model */ + ide->buffer[0] = (1 << 6); /*Fixed drive*/ + ide->buffer[20] = 3; /*Buffer type*/ ide->buffer[21] = hdd[ide->hdd_num].cache.num_segments * hdd[ide->hdd_num].cache.segment_size; /*Buffer size*/ - ide->buffer[50] = 0x4000; /* Capabilities */ + ide->buffer[50] = 0x4000; /* Capabilities */ ide->buffer[59] = ide->blocksize ? (ide->blocksize | 0x100) : 0; if ((ide->tracks >= 1024) || (ide->hpc > 16) || (ide->spt > 63)) { - ide->buffer[49] = (1 << 9); - ide_log("LBA supported\n"); + ide->buffer[49] = (1 << 9); + ide_log("LBA supported\n"); - ide->buffer[60] = full_size & 0xFFFF; /* Total addressable sectors (LBA) */ - ide->buffer[61] = (full_size >> 16) & 0x0FFF; - ide_log("Full size: %" PRIu64 "\n", full_size); + ide->buffer[60] = full_size & 0xFFFF; /* Total addressable sectors (LBA) */ + ide->buffer[61] = (full_size >> 16) & 0x0FFF; + ide_log("Full size: %" PRIu64 "\n", full_size); /* - Bit 0 = The fields reported in words 54-58 are valid; - Bit 1 = The fields reported in words 64-70 are valid; - Bit 2 = The fields reported in word 88 are valid. */ - ide->buffer[53] = 1; + Bit 0 = The fields reported in words 54-58 are valid; + Bit 1 = The fields reported in words 64-70 are valid; + Bit 2 = The fields reported in word 88 are valid. */ + ide->buffer[53] = 1; - if (ide->cfg_spt != 0) { - ide->buffer[54] = (full_size / ide->cfg_hpc) / ide->cfg_spt; - ide->buffer[55] = ide->cfg_hpc; - ide->buffer[56] = ide->cfg_spt; - } else { - if (full_size <= 16514064) { - ide->buffer[54] = d_tracks; - ide->buffer[55] = d_hpc; - ide->buffer[56] = d_spt; - } else { - ide->buffer[54] = 16383; - ide->buffer[55] = 16; - ide->buffer[56] = 63; - } - } + if (ide->cfg_spt != 0) { + ide->buffer[54] = (full_size / ide->cfg_hpc) / ide->cfg_spt; + ide->buffer[55] = ide->cfg_hpc; + ide->buffer[56] = ide->cfg_spt; + } else { + if (full_size <= 16514064) { + ide->buffer[54] = d_tracks; + ide->buffer[55] = d_hpc; + ide->buffer[56] = d_spt; + } else { + ide->buffer[54] = 16383; + ide->buffer[55] = 16; + ide->buffer[56] = 63; + } + } - full_size = ((uint64_t) ide->buffer[54]) * ((uint64_t) ide->buffer[55]) * ((uint64_t) ide->buffer[56]); + full_size = ((uint64_t) ide->buffer[54]) * ((uint64_t) ide->buffer[55]) * ((uint64_t) ide->buffer[56]); - ide->buffer[57] = full_size & 0xFFFF; /* Total addressable sectors (LBA) */ - ide->buffer[58] = (full_size >> 16) & 0x0FFF; + ide->buffer[57] = full_size & 0xFFFF; /* Total addressable sectors (LBA) */ + ide->buffer[58] = (full_size >> 16) & 0x0FFF; - ide_log("Current CHS translation: %i, %i, %i\n", ide->buffer[54], ide->buffer[55], ide->buffer[56]); + ide_log("Current CHS translation: %i, %i, %i\n", ide->buffer[54], ide->buffer[55], ide->buffer[56]); } - ide->buffer[47] = hdd[ide->hdd_num].max_multiple_block | 0x8000; /*Max sectors on multiple transfer command*/ + ide->buffer[47] = hdd[ide->hdd_num].max_multiple_block | 0x8000; /*Max sectors on multiple transfer command*/ if (!ide_boards[ide->board]->force_ata3 && ide_bm[ide->board]) { - ide->buffer[80] = 0x7e; /*ATA-1 to ATA-6 supported*/ - ide->buffer[81] = 0x19; /*ATA-6 revision 3a supported*/ + ide->buffer[80] = 0x7e; /*ATA-1 to ATA-6 supported*/ + ide->buffer[81] = 0x19; /*ATA-6 revision 3a supported*/ } else { - ide->buffer[80] = 0x0e; /*ATA-1 to ATA-3 supported*/ + ide->buffer[80] = 0x0e; /*ATA-1 to ATA-3 supported*/ } } - static void ide_identify(ide_t *ide) { - int d, i, max_pio, max_sdma, max_mdma, max_udma; + int d, i, max_pio, max_sdma, max_mdma, max_udma; ide_t *ide_other = ide_drives[ide->channel ^ 1]; ide_log("IDE IDENTIFY or IDENTIFY PACKET DEVICE on board %i (channel %i)\n", ide->board, ide->channel); @@ -598,90 +584,89 @@ ide_identify(ide_t *ide) memset(ide->buffer, 0, 512); if (ide->type == IDE_ATAPI) - ide->identify(ide, !ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL)); + ide->identify(ide, !ide_boards[ide->board]->force_ata3 && (ide_bm[ide->board] != NULL)); else if (ide->type != IDE_NONE) - ide_hd_identify(ide); + ide_hd_identify(ide); else { - fatal("IDE IDENTIFY or IDENTIFY PACKET DEVICE on non-attached IDE device\n"); - return; + fatal("IDE IDENTIFY or IDENTIFY PACKET DEVICE on non-attached IDE device\n"); + return; } - max_pio = ide_get_max(ide, TYPE_PIO); + max_pio = ide_get_max(ide, TYPE_PIO); max_sdma = ide_get_max(ide, TYPE_SDMA); max_mdma = ide_get_max(ide, TYPE_MDMA); max_udma = ide_get_max(ide, TYPE_UDMA); ide_log("IDE %i: max_pio = %i, max_sdma = %i, max_mdma = %i, max_udma = %i\n", - ide->channel, max_pio, max_sdma, max_mdma, max_udma); + ide->channel, max_pio, max_sdma, max_mdma, max_udma); if (ide_boards[ide->board]->bit32) - ide->buffer[48] |= 1; /*Dword transfers supported*/ + ide->buffer[48] |= 1; /*Dword transfers supported*/ ide->buffer[51] = ide_get_timings(ide, TIMINGS_PIO); ide->buffer[53] &= 0xfff9; ide->buffer[52] = ide->buffer[62] = ide->buffer[63] = ide->buffer[64] = 0x0000; ide->buffer[65] = ide->buffer[66] = ide_get_timings(ide, TIMINGS_DMA); ide->buffer[67] = ide->buffer[68] = 0x0000; - ide->buffer[88] = 0x0000; + ide->buffer[88] = 0x0000; if (max_pio >= 3) { - ide->buffer[53] |= 0x0002; - ide->buffer[67] = ide_get_timings(ide, TIMINGS_PIO); - ide->buffer[68] = ide_get_timings(ide, TIMINGS_PIO_FC); - for (i = 3; i <= max_pio; i++) - ide->buffer[64] |= (1 << (i - 3)); + ide->buffer[53] |= 0x0002; + ide->buffer[67] = ide_get_timings(ide, TIMINGS_PIO); + ide->buffer[68] = ide_get_timings(ide, TIMINGS_PIO_FC); + for (i = 3; i <= max_pio; i++) + ide->buffer[64] |= (1 << (i - 3)); } if (max_sdma != -1) { - for (i = 0; i <= max_sdma; i++) - ide->buffer[62] |= (1 << i); + for (i = 0; i <= max_sdma; i++) + ide->buffer[62] |= (1 << i); } if (max_mdma != -1) { - for (i = 0; i <= max_mdma; i++) - ide->buffer[63] |= (1 << i); + for (i = 0; i <= max_mdma; i++) + ide->buffer[63] |= (1 << i); } if (max_udma != -1) { - ide->buffer[53] |= 0x0004; - for (i = 0; i <= max_udma; i++) - ide->buffer[88] |= (1 << i); - if (max_udma >= 4) - ide->buffer[93] = 0x6000; /* Drive reports 80-conductor cable */ + ide->buffer[53] |= 0x0004; + for (i = 0; i <= max_udma; i++) + ide->buffer[88] |= (1 << i); + if (max_udma >= 4) + ide->buffer[93] = 0x6000; /* Drive reports 80-conductor cable */ - if (ide->channel & 1) - ide->buffer[93] |= 0x0b00; - else { - ide->buffer[93] |= 0x000b; - /* PDIAG- is assered by device 1, so the bit should be 1 if there's a device 1, - so it should be |= 0x001b if device 1 is present. */ - if (ide_other != NULL) - ide->buffer[93] |= 0x0010; - } + if (ide->channel & 1) + ide->buffer[93] |= 0x0b00; + else { + ide->buffer[93] |= 0x000b; + /* PDIAG- is assered by device 1, so the bit should be 1 if there's a device 1, + so it should be |= 0x001b if device 1 is present. */ + if (ide_other != NULL) + ide->buffer[93] |= 0x0010; + } } if ((max_sdma != -1) || (max_mdma != -1) || (max_udma != -1)) { - ide->buffer[49] |= 0x100; /* DMA supported */ - ide->buffer[52] = ide_get_timings(ide, TIMINGS_DMA); + ide->buffer[49] |= 0x100; /* DMA supported */ + ide->buffer[52] = ide_get_timings(ide, TIMINGS_DMA); } if ((max_mdma != -1) || (max_udma != -1)) { - ide->buffer[65] = ide_get_timings(ide, TIMINGS_DMA); - ide->buffer[66] = ide_get_timings(ide, TIMINGS_DMA); + ide->buffer[65] = ide_get_timings(ide, TIMINGS_DMA); + ide->buffer[66] = ide_get_timings(ide, TIMINGS_DMA); } if (ide->mdma_mode != -1) { - d = (ide->mdma_mode & 0xff); - d <<= 8; - if ((ide->mdma_mode & 0x300) == 0x000) { - if ((ide->mdma_mode & 0xff) >= 3) - ide->buffer[64] |= d; - } else if ((ide->mdma_mode & 0x300) == 0x100) - ide->buffer[62] |= d; - else if ((ide->mdma_mode & 0x300) == 0x200) - ide->buffer[63] |= d; - else if ((ide->mdma_mode & 0x300) == 0x300) - ide->buffer[88] |= d; - ide_log("PIDENTIFY DMA Mode: %04X, %04X\n", ide->buffer[62], ide->buffer[63]); + d = (ide->mdma_mode & 0xff); + d <<= 8; + if ((ide->mdma_mode & 0x300) == 0x000) { + if ((ide->mdma_mode & 0xff) >= 3) + ide->buffer[64] |= d; + } else if ((ide->mdma_mode & 0x300) == 0x100) + ide->buffer[62] |= d; + else if ((ide->mdma_mode & 0x300) == 0x200) + ide->buffer[63] |= d; + else if ((ide->mdma_mode & 0x300) == 0x300) + ide->buffer[88] |= d; + ide_log("PIDENTIFY DMA Mode: %04X, %04X\n", ide->buffer[62], ide->buffer[63]); } } - /* * Return the sector offset for the current register values */ @@ -691,19 +676,17 @@ ide_get_sector(ide_t *ide) uint32_t heads, sectors; if (ide->lba) - return (off64_t)ide->lba_addr; + return (off64_t) ide->lba_addr; else { - heads = ide->cfg_hpc; - sectors = ide->cfg_spt; + heads = ide->cfg_hpc; + sectors = ide->cfg_spt; - uint8_t sector = ide->sector ? ide->sector : 1; + uint8_t sector = ide->sector ? ide->sector : 1; - return ((((off64_t) ide->cylinder * heads) + ide->head) * - sectors) + (sector - 1); + return ((((off64_t) ide->cylinder * heads) + ide->head) * sectors) + (sector - 1); } } - /** * Move to the next sector using CHS addressing */ @@ -711,227 +694,218 @@ static void ide_next_sector(ide_t *ide) { if (ide->lba) - ide->lba_addr++; + ide->lba_addr++; else { - ide->sector++; - if (ide->sector == (ide->cfg_spt + 1)) { - ide->sector = 1; - ide->head++; - if (ide->head == ide->cfg_hpc) { - ide->head = 0; - ide->cylinder++; - } - } + ide->sector++; + if (ide->sector == (ide->cfg_spt + 1)) { + ide->sector = 1; + ide->head++; + if (ide->head == ide->cfg_hpc) { + ide->head = 0; + ide->cylinder++; + } + } } } - static void loadhd(ide_t *ide, int d, const char *fn) { - if (! hdd_image_load(d)) { - ide->type = IDE_NONE; - return; + if (!hdd_image_load(d)) { + ide->type = IDE_NONE; + return; } hdd_preset_apply(d); ide->spt = ide->cfg_spt = hdd[d].spt; ide->hpc = ide->cfg_hpc = hdd[d].hpc; - ide->tracks = hdd[d].tracks; - ide->type = IDE_HDD; - ide->hdd_num = d; + ide->tracks = hdd[d].tracks; + ide->type = IDE_HDD; + ide->hdd_num = d; } - void ide_set_signature(ide_t *ide) { - ide->sector=1; - ide->head=0; + ide->sector = 1; + ide->head = 0; if (ide->type == IDE_ATAPI) { - ide->sc->phase = 1; - ide->sc->request_length = 0xEB14; - ide->secount = ide->sc->phase; - ide->cylinder = ide->sc->request_length; + ide->sc->phase = 1; + ide->sc->request_length = 0xEB14; + ide->secount = ide->sc->phase; + ide->cylinder = ide->sc->request_length; } else { - ide->secount = 1; - ide->cylinder = ((ide->type == IDE_HDD) ? 0 : 0xFFFF); - if (ide->type == IDE_HDD) - ide->drive = 0; + ide->secount = 1; + ide->cylinder = ((ide->type == IDE_HDD) ? 0 : 0xFFFF); + if (ide->type == IDE_HDD) + ide->drive = 0; } } - static int ide_set_features(ide_t *ide) { uint8_t features, features_data; - int mode, submode, max; + int mode, submode, max; - features = ide->cylprecomp; + features = ide->cylprecomp; features_data = ide->secount; ide_log("Features code %02X\n", features); ide_log("IDE %02X: Set features: %02X, %02X\n", ide->channel, features, features_data); - switch(features) { - case FEATURE_SET_TRANSFER_MODE: /* Set transfer mode. */ - ide_log("Transfer mode %02X\n", features_data >> 3); + switch (features) { + case FEATURE_SET_TRANSFER_MODE: /* Set transfer mode. */ + ide_log("Transfer mode %02X\n", features_data >> 3); - mode = (features_data >> 3); - submode = features_data & 7; + mode = (features_data >> 3); + submode = features_data & 7; - switch (mode) { - case 0x00: /* PIO default */ - if (submode != 0) - return 0; - max = ide_get_max(ide, TYPE_PIO); - ide->mdma_mode = (1 << max); - ide_log("IDE %02X: Setting DPIO mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode); - break; + switch (mode) { + case 0x00: /* PIO default */ + if (submode != 0) + return 0; + max = ide_get_max(ide, TYPE_PIO); + ide->mdma_mode = (1 << max); + ide_log("IDE %02X: Setting DPIO mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode); + break; - case 0x01: /* PIO mode */ - max = ide_get_max(ide, TYPE_PIO); - if (submode > max) - return 0; - ide->mdma_mode = (1 << submode); - ide_log("IDE %02X: Setting PIO mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode); - break; + case 0x01: /* PIO mode */ + max = ide_get_max(ide, TYPE_PIO); + if (submode > max) + return 0; + ide->mdma_mode = (1 << submode); + ide_log("IDE %02X: Setting PIO mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode); + break; - case 0x02: /* Singleword DMA mode */ - max = ide_get_max(ide, TYPE_SDMA); - if (submode > max) - return 0; - ide->mdma_mode = (1 << submode) | 0x100; - ide_log("IDE %02X: Setting SDMA mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode); - break; + case 0x02: /* Singleword DMA mode */ + max = ide_get_max(ide, TYPE_SDMA); + if (submode > max) + return 0; + ide->mdma_mode = (1 << submode) | 0x100; + ide_log("IDE %02X: Setting SDMA mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode); + break; - case 0x04: /* Multiword DMA mode */ - max = ide_get_max(ide, TYPE_MDMA); - if (submode > max) - return 0; - ide->mdma_mode = (1 << submode) | 0x200; - ide_log("IDE %02X: Setting MDMA mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode); - break; + case 0x04: /* Multiword DMA mode */ + max = ide_get_max(ide, TYPE_MDMA); + if (submode > max) + return 0; + ide->mdma_mode = (1 << submode) | 0x200; + ide_log("IDE %02X: Setting MDMA mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode); + break; - case 0x08: /* Ultra DMA mode */ - max = ide_get_max(ide, TYPE_UDMA); - if (submode > max) - return 0; - ide->mdma_mode = (1 << submode) | 0x300; - ide_log("IDE %02X: Setting UDMA mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode); - break; + case 0x08: /* Ultra DMA mode */ + max = ide_get_max(ide, TYPE_UDMA); + if (submode > max) + return 0; + ide->mdma_mode = (1 << submode) | 0x300; + ide_log("IDE %02X: Setting UDMA mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode); + break; - default: - return 0; - } - break; + default: + return 0; + } + break; - case FEATURE_ENABLE_IRQ_OVERLAPPED: - case FEATURE_ENABLE_IRQ_SERVICE: - case FEATURE_DISABLE_IRQ_OVERLAPPED: - case FEATURE_DISABLE_IRQ_SERVICE: - max = ide_get_max(ide, TYPE_MDMA); - if (max == -1) - return 0; - else - return 1; + case FEATURE_ENABLE_IRQ_OVERLAPPED: + case FEATURE_ENABLE_IRQ_SERVICE: + case FEATURE_DISABLE_IRQ_OVERLAPPED: + case FEATURE_DISABLE_IRQ_SERVICE: + max = ide_get_max(ide, TYPE_MDMA); + if (max == -1) + return 0; + else + return 1; - case FEATURE_DISABLE_REVERT: /* Disable reverting to power on defaults. */ - case FEATURE_ENABLE_REVERT: /* Enable reverting to power on defaults. */ - return 1; + case FEATURE_DISABLE_REVERT: /* Disable reverting to power on defaults. */ + case FEATURE_ENABLE_REVERT: /* Enable reverting to power on defaults. */ + return 1; - default: - return 0; + default: + return 0; } return 1; } - void ide_set_sector(ide_t *ide, int64_t sector_num) { unsigned int cyl, r; if (ide->lba) { - ide->head = (sector_num >> 24); - ide->cylinder = (sector_num >> 8); - ide->sector = (sector_num); + ide->head = (sector_num >> 24); + ide->cylinder = (sector_num >> 8); + ide->sector = (sector_num); } else { - cyl = sector_num / (hdd[ide->hdd_num].hpc * hdd[ide->hdd_num].spt); - r = sector_num % (hdd[ide->hdd_num].hpc * hdd[ide->hdd_num].spt); - ide->cylinder = cyl; - ide->head = ((r / hdd[ide->hdd_num].spt) & 0x0f); - ide->sector = (r % hdd[ide->hdd_num].spt) + 1; + cyl = sector_num / (hdd[ide->hdd_num].hpc * hdd[ide->hdd_num].spt); + r = sector_num % (hdd[ide->hdd_num].hpc * hdd[ide->hdd_num].spt); + ide->cylinder = cyl; + ide->head = ((r / hdd[ide->hdd_num].spt) & 0x0f); + ide->sector = (r % hdd[ide->hdd_num].spt) + 1; } } - static void ide_zero(int d) { ide_t *dev; if (ide_drives[d] == NULL) - ide_drives[d] = (ide_t *) malloc(sizeof(ide_t)); + ide_drives[d] = (ide_t *) malloc(sizeof(ide_t)); memset(ide_drives[d], 0, sizeof(ide_t)); - dev = ide_drives[d]; - dev->channel = d; - dev->type = IDE_NONE; - dev->hdd_num = -1; - dev->atastat = DRDY_STAT | DSC_STAT; - dev->service = 0; - dev->board = d >> 1; - dev->selected = !(d & 1); + dev = ide_drives[d]; + dev->channel = d; + dev->type = IDE_NONE; + dev->hdd_num = -1; + dev->atastat = DRDY_STAT | DSC_STAT; + dev->service = 0; + dev->board = d >> 1; + dev->selected = !(d & 1); ide_boards[dev->board]->ide[d & 1] = dev; timer_add(&dev->timer, ide_callback, dev, 0); } - void ide_allocate_buffer(ide_t *dev) { if (dev->buffer == NULL) - dev->buffer = (uint16_t *) malloc(65536 * sizeof(uint16_t)); + dev->buffer = (uint16_t *) malloc(65536 * sizeof(uint16_t)); memset(dev->buffer, 0, 65536 * sizeof(uint16_t)); } - void ide_atapi_attach(ide_t *ide) { if (ide->type != IDE_NONE) - return; + return; ide->type = IDE_ATAPI; ide_allocate_buffer(ide); ide_set_signature(ide); ide->mdma_mode = (1 << ide->get_max(ide_boards[ide->board]->force_ata3 || !ide_bm[ide->board], TYPE_PIO)); - ide->error = 1; + ide->error = 1; ide->cfg_spt = ide->cfg_hpc = 0; } - void ide_set_callback(ide_t *ide, double callback) { if (!ide) { - ide_log("ide_set_callback(NULL): Set callback failed\n"); - return; + ide_log("ide_set_callback(NULL): Set callback failed\n"); + return; } ide_log("ide_set_callback(%i)\n", ide->channel); if (callback == 0.0) - timer_stop(&ide->timer); + timer_stop(&ide->timer); else - timer_on_auto(&ide->timer, callback); + timer_on_auto(&ide->timer, callback); } - void ide_set_board_callback(uint8_t board, double callback) { @@ -940,120 +914,117 @@ ide_set_board_callback(uint8_t board, double callback) ide_log("ide_set_board_callback(%i)\n", board); if (!dev) { - ide_log("Set board callback failed\n"); - return; + ide_log("Set board callback failed\n"); + return; } if (callback == 0.0) - timer_stop(&dev->timer); + timer_stop(&dev->timer); else - timer_on_auto(&dev->timer, callback); + timer_on_auto(&dev->timer, callback); } - static void ide_atapi_command_bus(ide_t *ide) { - ide->sc->status = BUSY_STAT; - ide->sc->phase = 1; - ide->sc->pos = 0; + ide->sc->status = BUSY_STAT; + ide->sc->phase = 1; + ide->sc->pos = 0; ide->sc->callback = 1.0 * IDE_TIME; ide_set_callback(ide, ide->sc->callback); } - static void ide_atapi_callback(ide_t *ide) { int out, ret = 0; - switch(ide->sc->packet_status) { - case PHASE_IDLE: + switch (ide->sc->packet_status) { + case PHASE_IDLE: #ifdef ENABLE_IDE_LOG - ide_log("PHASE_IDLE\n"); + ide_log("PHASE_IDLE\n"); #endif - ide->sc->pos = 0; - ide->sc->phase = 1; - ide->sc->status = READY_STAT | DRQ_STAT | (ide->sc->status & ERR_STAT); - return; - case PHASE_COMMAND: + ide->sc->pos = 0; + ide->sc->phase = 1; + ide->sc->status = READY_STAT | DRQ_STAT | (ide->sc->status & ERR_STAT); + return; + case PHASE_COMMAND: #ifdef ENABLE_IDE_LOG - ide_log("PHASE_COMMAND\n"); + ide_log("PHASE_COMMAND\n"); #endif - ide->sc->status = BUSY_STAT | (ide->sc->status & ERR_STAT); - if (ide->packet_command) { - ide->packet_command(ide->sc, ide->sc->atapi_cdb); - if ((ide->sc->packet_status == PHASE_COMPLETE) && (ide->sc->callback == 0.0)) - ide_atapi_callback(ide); - } - return; - case PHASE_COMPLETE: + ide->sc->status = BUSY_STAT | (ide->sc->status & ERR_STAT); + if (ide->packet_command) { + ide->packet_command(ide->sc, ide->sc->atapi_cdb); + if ((ide->sc->packet_status == PHASE_COMPLETE) && (ide->sc->callback == 0.0)) + ide_atapi_callback(ide); + } + return; + case PHASE_COMPLETE: #ifdef ENABLE_IDE_LOG - ide_log("PHASE_COMPLETE\n"); + ide_log("PHASE_COMPLETE\n"); #endif - ide->sc->status = READY_STAT; - ide->sc->phase = 3; - ide->sc->packet_status = PHASE_NONE; - ide_irq_raise(ide); - return; - case PHASE_DATA_IN: - case PHASE_DATA_OUT: + ide->sc->status = READY_STAT; + ide->sc->phase = 3; + ide->sc->packet_status = PHASE_NONE; + ide_irq_raise(ide); + return; + case PHASE_DATA_IN: + case PHASE_DATA_OUT: #ifdef ENABLE_IDE_LOG - ide_log("PHASE_DATA_IN or PHASE_DATA_OUT\n"); + ide_log("PHASE_DATA_IN or PHASE_DATA_OUT\n"); #endif - ide->sc->status = READY_STAT | DRQ_STAT | (ide->sc->status & ERR_STAT); - ide->sc->phase = !(ide->sc->packet_status & 0x01) << 1; - ide_irq_raise(ide); - return; - case PHASE_DATA_IN_DMA: - case PHASE_DATA_OUT_DMA: + ide->sc->status = READY_STAT | DRQ_STAT | (ide->sc->status & ERR_STAT); + ide->sc->phase = !(ide->sc->packet_status & 0x01) << 1; + ide_irq_raise(ide); + return; + case PHASE_DATA_IN_DMA: + case PHASE_DATA_OUT_DMA: #ifdef ENABLE_IDE_LOG - ide_log("PHASE_DATA_IN_DMA or PHASE_DATA_OUT_DMA\n"); + ide_log("PHASE_DATA_IN_DMA or PHASE_DATA_OUT_DMA\n"); #endif - out = (ide->sc->packet_status & 0x01); + out = (ide->sc->packet_status & 0x01); - if (!ide_boards[ide->board]->force_ata3 && ide_bm[ide->board] && ide_bm[ide->board]->dma) { - ret = ide_bm[ide->board]->dma(ide->board, - ide->sc->temp_buffer, ide->sc->packet_len, - out, ide_bm[ide->board]->priv); - } else { - /* DMA command without a bus master. */ - if (ide->bus_master_error) - ide->bus_master_error(ide->sc); - return; - } + if (!ide_boards[ide->board]->force_ata3 && ide_bm[ide->board] && ide_bm[ide->board]->dma) { + ret = ide_bm[ide->board]->dma(ide->board, + ide->sc->temp_buffer, ide->sc->packet_len, + out, ide_bm[ide->board]->priv); + } else { + /* DMA command without a bus master. */ + if (ide->bus_master_error) + ide->bus_master_error(ide->sc); + return; + } - if (ret == 0) { - if (ide->bus_master_error) - ide->bus_master_error(ide->sc); - } else if (ret == 1) { - if (out && ide->phase_data_out) - ret = ide->phase_data_out(ide->sc); - else if (!out && ide->command_stop) - ide->command_stop(ide->sc); + if (ret == 0) { + if (ide->bus_master_error) + ide->bus_master_error(ide->sc); + } else if (ret == 1) { + if (out && ide->phase_data_out) + ret = ide->phase_data_out(ide->sc); + else if (!out && ide->command_stop) + ide->command_stop(ide->sc); - if ((ide->sc->packet_status == PHASE_COMPLETE) && (ide->sc->callback == 0.0)) - ide_atapi_callback(ide); - } else if (ret == 2) - ide_atapi_command_bus(ide); + if ((ide->sc->packet_status == PHASE_COMPLETE) && (ide->sc->callback == 0.0)) + ide_atapi_callback(ide); + } else if (ret == 2) + ide_atapi_command_bus(ide); - return; - case PHASE_ERROR: + return; + case PHASE_ERROR: #ifdef ENABLE_IDE_LOG - ide_log("PHASE_ERROR\n"); + ide_log("PHASE_ERROR\n"); #endif - ide->sc->status = READY_STAT | ERR_STAT; - ide->sc->phase = 3; - ide->sc->packet_status = PHASE_NONE; - ide_irq_raise(ide); - return; - default: - ide_log("PHASE_UNKNOWN %02X\n", ide->sc->packet_status); - return; + ide->sc->status = READY_STAT | ERR_STAT; + ide->sc->phase = 3; + ide->sc->packet_status = PHASE_NONE; + ide_irq_raise(ide); + return; + default: + ide_log("PHASE_UNKNOWN %02X\n", ide->sc->packet_status); + return; } } - /* This is the general ATAPI PIO request function. */ static void ide_atapi_pio_request(ide_t *ide, uint8_t out) @@ -1065,42 +1036,41 @@ ide_atapi_pio_request(ide_t *ide, uint8_t out) dev->status = BSY_STAT; if (dev->pos >= dev->packet_len) { - ide_log("%i bytes %s, command done\n", dev->pos, out ? "written" : "read"); + ide_log("%i bytes %s, command done\n", dev->pos, out ? "written" : "read"); - dev->pos = dev->request_pos = 0; - if (out && ide->phase_data_out) - ide->phase_data_out(dev); - else if (!out && ide->command_stop) - ide->command_stop(dev); + dev->pos = dev->request_pos = 0; + if (out && ide->phase_data_out) + ide->phase_data_out(dev); + else if (!out && ide->command_stop) + ide->command_stop(dev); - if ((ide->sc->packet_status == PHASE_COMPLETE) && (ide->sc->callback == 0.0)) - ide_atapi_callback(ide); + if ((ide->sc->packet_status == PHASE_COMPLETE) && (ide->sc->callback == 0.0)) + ide_atapi_callback(ide); } else { - ide_log("%i bytes %s, %i bytes are still left\n", dev->pos, - out ? "written" : "read", dev->packet_len - dev->pos); + ide_log("%i bytes %s, %i bytes are still left\n", dev->pos, + out ? "written" : "read", dev->packet_len - dev->pos); - /* If less than (packet length) bytes are remaining, update packet length - accordingly. */ - if ((dev->packet_len - dev->pos) < (dev->max_transfer_len)) { - dev->max_transfer_len = dev->packet_len - dev->pos; - /* Also update the request length so the host knows how many bytes to transfer. */ - dev->request_length = dev->max_transfer_len; + /* If less than (packet length) bytes are remaining, update packet length + accordingly. */ + if ((dev->packet_len - dev->pos) < (dev->max_transfer_len)) { + dev->max_transfer_len = dev->packet_len - dev->pos; + /* Also update the request length so the host knows how many bytes to transfer. */ + dev->request_length = dev->max_transfer_len; } - ide_log("CD-ROM %i: Packet length %i, request length %i\n", dev->id, dev->packet_len, - dev->max_transfer_len); + ide_log("CD-ROM %i: Packet length %i, request length %i\n", dev->id, dev->packet_len, + dev->max_transfer_len); - dev->packet_status = PHASE_DATA_IN | out; + dev->packet_status = PHASE_DATA_IN | out; - dev->status = BSY_STAT; - dev->phase = 1; - ide_atapi_callback(ide); - ide_set_callback(ide, 0.0); + dev->status = BSY_STAT; + dev->phase = 1; + ide_atapi_callback(ide); + ide_set_callback(ide, 0.0); - dev->request_pos = 0; + dev->request_pos = 0; } } - static uint32_t ide_atapi_packet_read(ide_t *ide, int length) { @@ -1112,10 +1082,10 @@ ide_atapi_packet_read(ide_t *ide, int length) uint32_t temp = 0; if (!dev || !dev->temp_buffer || (dev->packet_status != PHASE_DATA_IN)) - return 0; + return 0; if (dev->packet_status == PHASE_DATA_IN) - ide_log("PHASE_DATA_IN read: %i, %i, %i, %i\n", dev->request_pos, dev->max_transfer_len, dev->pos, dev->packet_len); + ide_log("PHASE_DATA_IN read: %i, %i, %i, %i\n", dev->request_pos, dev->max_transfer_len, dev->pos, dev->packet_len); bufferw = (uint16_t *) dev->temp_buffer; bufferl = (uint32_t *) dev->temp_buffer; @@ -1123,160 +1093,157 @@ ide_atapi_packet_read(ide_t *ide, int length) /* Make sure we return a 0 and don't attempt to read from the buffer if we're transferring bytes beyond it, which can happen when issuing media access commands with an allocated length below minimum request length (which is 1 sector = 2048 bytes). */ - switch(length) { - case 1: - temp = (dev->pos < dev->packet_len) ? dev->temp_buffer[dev->pos] : 0; - dev->pos++; - dev->request_pos++; - break; - case 2: - temp = (dev->pos < dev->packet_len) ? bufferw[dev->pos >> 1] : 0; - dev->pos += 2; - dev->request_pos += 2; - break; - case 4: - temp = (dev->pos < dev->packet_len) ? bufferl[dev->pos >> 2] : 0; - dev->pos += 4; - dev->request_pos += 4; - break; - default: - return 0; + switch (length) { + case 1: + temp = (dev->pos < dev->packet_len) ? dev->temp_buffer[dev->pos] : 0; + dev->pos++; + dev->request_pos++; + break; + case 2: + temp = (dev->pos < dev->packet_len) ? bufferw[dev->pos >> 1] : 0; + dev->pos += 2; + dev->request_pos += 2; + break; + case 4: + temp = (dev->pos < dev->packet_len) ? bufferl[dev->pos >> 2] : 0; + dev->pos += 4; + dev->request_pos += 4; + break; + default: + return 0; } if (dev->packet_status == PHASE_DATA_IN) { - if ((dev->request_pos >= dev->max_transfer_len) || (dev->pos >= dev->packet_len)) { - /* Time for a DRQ. */ - ide_atapi_pio_request(ide, 0); - } - return temp; + if ((dev->request_pos >= dev->max_transfer_len) || (dev->pos >= dev->packet_len)) { + /* Time for a DRQ. */ + ide_atapi_pio_request(ide, 0); + } + return temp; } else - return 0; + return 0; } - static void ide_atapi_packet_write(ide_t *ide, uint32_t val, int length) { scsi_common_t *dev = ide->sc; - uint8_t *bufferb; + uint8_t *bufferb; uint16_t *bufferw; uint32_t *bufferl; if (!dev) - return; + return; if (dev->packet_status == PHASE_IDLE) - bufferb = dev->atapi_cdb; + bufferb = dev->atapi_cdb; else { - if (dev->temp_buffer) - bufferb = dev->temp_buffer; - else - return; + if (dev->temp_buffer) + bufferb = dev->temp_buffer; + else + return; } bufferw = (uint16_t *) bufferb; bufferl = (uint32_t *) bufferb; - switch(length) { - case 1: - bufferb[dev->pos] = val & 0xff; - dev->pos++; - dev->request_pos++; - break; - case 2: - bufferw[dev->pos >> 1] = val & 0xffff; - dev->pos += 2; - dev->request_pos += 2; - break; - case 4: - bufferl[dev->pos >> 2] = val; - dev->pos += 4; - dev->request_pos += 4; - break; - default: - return; + switch (length) { + case 1: + bufferb[dev->pos] = val & 0xff; + dev->pos++; + dev->request_pos++; + break; + case 2: + bufferw[dev->pos >> 1] = val & 0xffff; + dev->pos += 2; + dev->request_pos += 2; + break; + case 4: + bufferl[dev->pos >> 2] = val; + dev->pos += 4; + dev->request_pos += 4; + break; + default: + return; } if (dev->packet_status == PHASE_DATA_OUT) { - if ((dev->request_pos >= dev->max_transfer_len) || (dev->pos >= dev->packet_len)) { - /* Time for a DRQ. */ - ide_atapi_pio_request(ide, 1); - } - return; + if ((dev->request_pos >= dev->max_transfer_len) || (dev->pos >= dev->packet_len)) { + /* Time for a DRQ. */ + ide_atapi_pio_request(ide, 1); + } + return; } else if (dev->packet_status == PHASE_IDLE) { - if (dev->pos >= 12) { - dev->pos = 0; - dev->status = BSY_STAT; - dev->packet_status = PHASE_COMMAND; - ide_atapi_callback(ide); - } - return; + if (dev->pos >= 12) { + dev->pos = 0; + dev->status = BSY_STAT; + dev->packet_status = PHASE_COMMAND; + ide_atapi_callback(ide); + } + return; } } - void ide_write_data(ide_t *ide, uint32_t val, int length) { - uint8_t *idebufferb = (uint8_t *) ide->buffer; + uint8_t *idebufferb = (uint8_t *) ide->buffer; uint16_t *idebufferw = ide->buffer; uint32_t *idebufferl = (uint32_t *) ide->buffer; if (ide->command == WIN_PACKETCMD) { - ide->pos = 0; + ide->pos = 0; - if (ide->type == IDE_ATAPI) - ide_atapi_packet_write(ide, val, length); + if (ide->type == IDE_ATAPI) + ide_atapi_packet_write(ide, val, length); } else { - switch(length) { - case 1: - idebufferb[ide->pos] = val & 0xff; - ide->pos++; - break; - case 2: - idebufferw[ide->pos >> 1] = val & 0xffff; - ide->pos += 2; - break; - case 4: - idebufferl[ide->pos >> 2] = val; - ide->pos += 4; - break; - default: - return; - } + switch (length) { + case 1: + idebufferb[ide->pos] = val & 0xff; + ide->pos++; + break; + case 2: + idebufferw[ide->pos >> 1] = val & 0xffff; + ide->pos += 2; + break; + case 4: + idebufferl[ide->pos >> 2] = val; + ide->pos += 4; + break; + default: + return; + } - if (ide->pos >= 512) { - ide->pos=0; - ide->atastat = BSY_STAT; - double seek_time = hdd_timing_write(&hdd[ide->hdd_num], ide_get_sector(ide), 1); - double xfer_time = ide_get_xfer_time(ide, 512); - double wait_time = seek_time + xfer_time; - if (ide->command == WIN_WRITE_MULTIPLE) { - if ((ide->blockcount+1) >= ide->blocksize || ide->secount == 1) { - ide_set_callback(ide, seek_time + xfer_time + ide->pending_delay); - ide->pending_delay = 0; - } else { - ide->pending_delay += wait_time; - ide_callback(ide); - } - } else { - ide_set_callback(ide, wait_time); - } - } + if (ide->pos >= 512) { + ide->pos = 0; + ide->atastat = BSY_STAT; + double seek_time = hdd_timing_write(&hdd[ide->hdd_num], ide_get_sector(ide), 1); + double xfer_time = ide_get_xfer_time(ide, 512); + double wait_time = seek_time + xfer_time; + if (ide->command == WIN_WRITE_MULTIPLE) { + if ((ide->blockcount + 1) >= ide->blocksize || ide->secount == 1) { + ide_set_callback(ide, seek_time + xfer_time + ide->pending_delay); + ide->pending_delay = 0; + } else { + ide->pending_delay += wait_time; + ide_callback(ide); + } + } else { + ide_set_callback(ide, wait_time); + } + } } } - void ide_writew(uint16_t addr, uint16_t val, void *priv) { ide_board_t *dev = (ide_board_t *) priv; ide_t *ide; - int ch; + int ch; - ch = dev->cur_dev; + ch = dev->cur_dev; ide = ide_drives[ch]; ide_log("ide_writew %04X %04X from %04X(%08X):%08X\n", addr, val, CS, cs, cpu_state.pc); @@ -1284,32 +1251,31 @@ ide_writew(uint16_t addr, uint16_t val, void *priv) addr &= 0x7; if ((ide->type == IDE_NONE) && ((addr == 0x0) || (addr == 0x7))) - return; + return; switch (addr) { - case 0x0: /* Data */ - ide_write_data(ide, val, 2); - break; - case 0x7: - ide_writeb(addr, val & 0xff, priv); - break; - default: - ide_writeb(addr, val & 0xff, priv); - ide_writeb(addr + 1, (val >> 8) & 0xff, priv); - break; + case 0x0: /* Data */ + ide_write_data(ide, val, 2); + break; + case 0x7: + ide_writeb(addr, val & 0xff, priv); + break; + default: + ide_writeb(addr, val & 0xff, priv); + ide_writeb(addr + 1, (val >> 8) & 0xff, priv); + break; } } - static void ide_writel(uint16_t addr, uint32_t val, void *priv) { ide_board_t *dev = (ide_board_t *) priv; ide_t *ide; - int ch; + int ch; - ch = dev->cur_dev; + ch = dev->cur_dev; ide = ide_drives[ch]; ide_log("ide_writel %04X %08X from %04X(%08X):%08X\n", addr, val, CS, cs, cpu_state.pc); @@ -1317,150 +1283,148 @@ ide_writel(uint16_t addr, uint32_t val, void *priv) addr &= 0x7; if ((ide->type == IDE_NONE) && ((addr == 0x0) || (addr == 0x7))) - return; + return; switch (addr) { - case 0x0: /* Data */ - ide_write_data(ide, val & 0xffff, 2); - if (dev->bit32) - ide_write_data(ide, val >> 16, 2); - else - ide_writew(addr + 2, (val >> 16) & 0xffff, priv); - break; - case 0x6: case 0x7: - ide_writew(addr, val & 0xffff, priv); - break; - default: - ide_writew(addr, val & 0xffff, priv); - ide_writew(addr + 2, (val >> 16) & 0xffff, priv); - break; + case 0x0: /* Data */ + ide_write_data(ide, val & 0xffff, 2); + if (dev->bit32) + ide_write_data(ide, val >> 16, 2); + else + ide_writew(addr + 2, (val >> 16) & 0xffff, priv); + break; + case 0x6: + case 0x7: + ide_writew(addr, val & 0xffff, priv); + break; + default: + ide_writew(addr, val & 0xffff, priv); + ide_writew(addr + 2, (val >> 16) & 0xffff, priv); + break; } } - static void dev_reset(ide_t *ide) { ide_set_signature(ide); if ((ide->type == IDE_ATAPI) && ide->stop) - ide->stop(ide->sc); + ide->stop(ide->sc); } - void ide_write_devctl(uint16_t addr, uint8_t val, void *priv) { ide_board_t *dev = (ide_board_t *) priv; - ide_t *ide, *ide_other; - int ch; + ide_t *ide, *ide_other; + int ch; uint8_t old; - ch = dev->cur_dev; - ide = ide_drives[ch]; + ch = dev->cur_dev; + ide = ide_drives[ch]; ide_other = ide_drives[ch ^ 1]; ide_log("ide_write_devctl %04X %02X from %04X(%08X):%08X\n", addr, val, CS, cs, cpu_state.pc); if ((ide->type == IDE_NONE) && (ide_other->type == IDE_NONE)) - return; + return; dev->diag = 0; if ((val & 4) && !(ide->fdisk & 4)) { - /* Reset toggled from 0 to 1, initiate reset procedure. */ - if (ide->type == IDE_ATAPI) - ide->sc->callback = 0.0; - ide_set_callback(ide, 0.0); - ide_set_callback(ide_other, 0.0); + /* Reset toggled from 0 to 1, initiate reset procedure. */ + if (ide->type == IDE_ATAPI) + ide->sc->callback = 0.0; + ide_set_callback(ide, 0.0); + ide_set_callback(ide_other, 0.0); - /* We must set set the status to busy in reset mode or - some 286 and 386 machines error out. */ - if (!(ch & 1)) { - if (ide->type != IDE_NONE) { - ide->atastat = BSY_STAT; - ide->error = 1; - if (ide->type == IDE_ATAPI) { - ide->sc->status = BSY_STAT; - ide->sc->error = 1; - } - } + /* We must set set the status to busy in reset mode or + some 286 and 386 machines error out. */ + if (!(ch & 1)) { + if (ide->type != IDE_NONE) { + ide->atastat = BSY_STAT; + ide->error = 1; + if (ide->type == IDE_ATAPI) { + ide->sc->status = BSY_STAT; + ide->sc->error = 1; + } + } - if (ide_other->type != IDE_NONE) { - ide_other->atastat = BSY_STAT; - ide_other->error = 1; - if (ide_other->type == IDE_ATAPI) { - ide_other->sc->status = BSY_STAT; - ide_other->sc->error = 1; - } - } - } + if (ide_other->type != IDE_NONE) { + ide_other->atastat = BSY_STAT; + ide_other->error = 1; + if (ide_other->type == IDE_ATAPI) { + ide_other->sc->status = BSY_STAT; + ide_other->sc->error = 1; + } + } + } } else if (!(val & 4) && (ide->fdisk & 4)) { - /* Reset toggled from 1 to 0. */ - if (!(ch & 1)) { - /* Currently active device is 0, use the device 0 reset protocol. */ - /* Device 0. */ - dev_reset(ide); - ide->atastat = BSY_STAT; - ide->error = 1; - if (ide->type == IDE_ATAPI) { - ide->sc->status = BSY_STAT; - ide->sc->error = 1; - } + /* Reset toggled from 1 to 0. */ + if (!(ch & 1)) { + /* Currently active device is 0, use the device 0 reset protocol. */ + /* Device 0. */ + dev_reset(ide); + ide->atastat = BSY_STAT; + ide->error = 1; + if (ide->type == IDE_ATAPI) { + ide->sc->status = BSY_STAT; + ide->sc->error = 1; + } - /* Device 1. */ - dev_reset(ide_other); - ide_other->atastat = BSY_STAT; - ide_other->error = 1; - if (ide_other->type == IDE_ATAPI) { - ide_other->sc->status = BSY_STAT; - ide_other->sc->error = 1; - } + /* Device 1. */ + dev_reset(ide_other); + ide_other->atastat = BSY_STAT; + ide_other->error = 1; + if (ide_other->type == IDE_ATAPI) { + ide_other->sc->status = BSY_STAT; + ide_other->sc->error = 1; + } - /* Fire the timer. */ - dev->diag = 0; - ide->reset = 1; - ide_set_callback(ide, 0.0); - ide_set_callback(ide_other, 0.0); - ide_set_board_callback(ide->board, 1000.4); /* 1 ms + 400 ns, per the specification */ - } else { - /* Currently active device is 1, simply reset the status and the active device. */ - dev_reset(ide); - ide->atastat = DRDY_STAT | DSC_STAT; - ide->error = 1; - if (ide->type == IDE_ATAPI) { - ide->sc->status = DRDY_STAT | DSC_STAT; - ide->sc->error = 1; - } - dev->cur_dev &= ~1; - ch = dev->cur_dev; + /* Fire the timer. */ + dev->diag = 0; + ide->reset = 1; + ide_set_callback(ide, 0.0); + ide_set_callback(ide_other, 0.0); + ide_set_board_callback(ide->board, 1000.4); /* 1 ms + 400 ns, per the specification */ + } else { + /* Currently active device is 1, simply reset the status and the active device. */ + dev_reset(ide); + ide->atastat = DRDY_STAT | DSC_STAT; + ide->error = 1; + if (ide->type == IDE_ATAPI) { + ide->sc->status = DRDY_STAT | DSC_STAT; + ide->sc->error = 1; + } + dev->cur_dev &= ~1; + ch = dev->cur_dev; - ide = ide_drives[ch]; - ide->selected = 1; + ide = ide_drives[ch]; + ide->selected = 1; - ide_other = ide_drives[ch ^ 1]; - ide_other->selected = 0; - } + ide_other = ide_drives[ch ^ 1]; + ide_other->selected = 0; + } } - old = ide->fdisk; + old = ide->fdisk; ide->fdisk = ide_other->fdisk = val; if (!(val & 0x02) && (old & 0x02) && ide->irqstat) - ide_irq_update(ide); + ide_irq_update(ide); } - void ide_writeb(uint16_t addr, uint8_t val, void *priv) { ide_board_t *dev = (ide_board_t *) priv; ide_t *ide, *ide_other; - int ch; + int ch; - ch = dev->cur_dev; - ide = ide_drives[ch]; + ch = dev->cur_dev; + ide = ide_drives[ch]; ide_other = ide_drives[ch ^ 1]; ide_log("ide_write %04X %02X from %04X(%08X):%08X\n", addr, val, CS, cs, cpu_state.pc); @@ -1468,565 +1432,559 @@ ide_writeb(uint16_t addr, uint8_t val, void *priv) addr &= 0x7; if ((ide->type == IDE_NONE) && ((addr == 0x0) || (addr == 0x7))) - return; + return; switch (addr) { - case 0x0: /* Data */ - ide_write_data(ide, val | (val << 8), 2); - return; + case 0x0: /* Data */ + ide_write_data(ide, val | (val << 8), 2); + return; - /* Note to self: for ATAPI, bit 0 of this is DMA if set, PIO if clear. */ - case 0x1: /* Features */ - if (ide->type == IDE_ATAPI) { - ide_log("ATAPI transfer mode: %s\n", (val & 1) ? "DMA" : "PIO"); - ide->sc->features = val; - } - ide->cylprecomp = val; + /* Note to self: for ATAPI, bit 0 of this is DMA if set, PIO if clear. */ + case 0x1: /* Features */ + if (ide->type == IDE_ATAPI) { + ide_log("ATAPI transfer mode: %s\n", (val & 1) ? "DMA" : "PIO"); + ide->sc->features = val; + } + ide->cylprecomp = val; - if (ide_other->type == IDE_ATAPI) - ide_other->sc->features = val; - ide_other->cylprecomp = val; - return; + if (ide_other->type == IDE_ATAPI) + ide_other->sc->features = val; + ide_other->cylprecomp = val; + return; - case 0x2: /* Sector count */ - if (ide->type == IDE_ATAPI) { - ide_log("Sector count write: %i\n", val); - ide->sc->phase = val; - } - ide->secount = val; + case 0x2: /* Sector count */ + if (ide->type == IDE_ATAPI) { + ide_log("Sector count write: %i\n", val); + ide->sc->phase = val; + } + ide->secount = val; - if (ide_other->type == IDE_ATAPI) { - ide_log("Other sector count write: %i\n", val); - ide_other->sc->phase = val; - } - ide_other->secount = val; - return; + if (ide_other->type == IDE_ATAPI) { + ide_log("Other sector count write: %i\n", val); + ide_other->sc->phase = val; + } + ide_other->secount = val; + return; - case 0x3: /* Sector */ - ide->sector = val; - ide->lba_addr = (ide->lba_addr & 0xFFFFF00) | val; - ide_other->sector = val; - ide_other->lba_addr = (ide_other->lba_addr & 0xFFFFF00) | val; - return; + case 0x3: /* Sector */ + ide->sector = val; + ide->lba_addr = (ide->lba_addr & 0xFFFFF00) | val; + ide_other->sector = val; + ide_other->lba_addr = (ide_other->lba_addr & 0xFFFFF00) | val; + return; - case 0x4: /* Cylinder low */ - if (ide->type == IDE_ATAPI) { - ide->sc->request_length &= 0xFF00; - ide->sc->request_length |= val; - } - ide->cylinder = (ide->cylinder & 0xFF00) | val; - ide->lba_addr = (ide->lba_addr & 0xFFF00FF) | (val << 8); + case 0x4: /* Cylinder low */ + if (ide->type == IDE_ATAPI) { + ide->sc->request_length &= 0xFF00; + ide->sc->request_length |= val; + } + ide->cylinder = (ide->cylinder & 0xFF00) | val; + ide->lba_addr = (ide->lba_addr & 0xFFF00FF) | (val << 8); - if (ide_other->type == IDE_ATAPI) { - ide_other->sc->request_length &= 0xFF00; - ide_other->sc->request_length |= val; - } - ide_other->cylinder = (ide_other->cylinder & 0xFF00) | val; - ide_other->lba_addr = (ide_other->lba_addr & 0xFFF00FF) | (val << 8); - return; + if (ide_other->type == IDE_ATAPI) { + ide_other->sc->request_length &= 0xFF00; + ide_other->sc->request_length |= val; + } + ide_other->cylinder = (ide_other->cylinder & 0xFF00) | val; + ide_other->lba_addr = (ide_other->lba_addr & 0xFFF00FF) | (val << 8); + return; - case 0x5: /* Cylinder high */ - if (ide->type == IDE_ATAPI) { - ide->sc->request_length &= 0xFF; - ide->sc->request_length |= (val << 8); - } - ide->cylinder = (ide->cylinder & 0xFF) | (val << 8); - ide->lba_addr = (ide->lba_addr & 0xF00FFFF) | (val << 16); + case 0x5: /* Cylinder high */ + if (ide->type == IDE_ATAPI) { + ide->sc->request_length &= 0xFF; + ide->sc->request_length |= (val << 8); + } + ide->cylinder = (ide->cylinder & 0xFF) | (val << 8); + ide->lba_addr = (ide->lba_addr & 0xF00FFFF) | (val << 16); - if (ide_other->type == IDE_ATAPI) { - ide_other->sc->request_length &= 0xFF; - ide_other->sc->request_length |= (val << 8); - } - ide_other->cylinder = (ide_other->cylinder & 0xFF) | (val << 8); - ide_other->lba_addr = (ide_other->lba_addr & 0xF00FFFF) | (val << 16); - return; + if (ide_other->type == IDE_ATAPI) { + ide_other->sc->request_length &= 0xFF; + ide_other->sc->request_length |= (val << 8); + } + ide_other->cylinder = (ide_other->cylinder & 0xFF) | (val << 8); + ide_other->lba_addr = (ide_other->lba_addr & 0xF00FFFF) | (val << 16); + return; - case 0x6: /* Drive/Head */ - if (ch != ((val >> 4) & 1) + (ide->board << 1)) { - ide_boards[ide->board]->cur_dev = ((val >> 4) & 1) + (ide->board << 1); - ch = ide_boards[ide->board]->cur_dev; + case 0x6: /* Drive/Head */ + if (ch != ((val >> 4) & 1) + (ide->board << 1)) { + ide_boards[ide->board]->cur_dev = ((val >> 4) & 1) + (ide->board << 1); + ch = ide_boards[ide->board]->cur_dev; - ide = ide_drives[ch]; - ide->selected = 1; + ide = ide_drives[ch]; + ide->selected = 1; - ide_other = ide_drives[ch ^ 1]; - ide_other->selected = 0; + ide_other = ide_drives[ch ^ 1]; + ide_other->selected = 0; - if (ide->reset || ide_other->reset) { - ide->atastat = ide_other->atastat = DRDY_STAT | DSC_STAT; - ide->error = ide_other->error = 1; - ide->secount = ide_other->secount = 1; - ide->sector = ide_other->sector = 1; - ide->head = ide_other->head = 0; - ide->cylinder = ide_other->cylinder = 0; - ide->reset = ide_other->reset = 0; + if (ide->reset || ide_other->reset) { + ide->atastat = ide_other->atastat = DRDY_STAT | DSC_STAT; + ide->error = ide_other->error = 1; + ide->secount = ide_other->secount = 1; + ide->sector = ide_other->sector = 1; + ide->head = ide_other->head = 0; + ide->cylinder = ide_other->cylinder = 0; + ide->reset = ide_other->reset = 0; - if (ide->type == IDE_ATAPI) { - ide->sc->status = DRDY_STAT | DSC_STAT; - ide->sc->error = 1; - ide->sc->phase = 1; - ide->sc->request_length = 0xEB14; - ide->sc->callback = 0.0; - ide->cylinder = 0xEB14; - } + if (ide->type == IDE_ATAPI) { + ide->sc->status = DRDY_STAT | DSC_STAT; + ide->sc->error = 1; + ide->sc->phase = 1; + ide->sc->request_length = 0xEB14; + ide->sc->callback = 0.0; + ide->cylinder = 0xEB14; + } - if (ide_other->type == IDE_ATAPI) { - ide_other->sc->status = DRDY_STAT | DSC_STAT; - ide_other->sc->error = 1; - ide_other->sc->phase = 1; - ide_other->sc->request_length = 0xEB14; - ide_other->sc->callback = 0.0; - ide_other->cylinder = 0xEB14; - } + if (ide_other->type == IDE_ATAPI) { + ide_other->sc->status = DRDY_STAT | DSC_STAT; + ide_other->sc->error = 1; + ide_other->sc->phase = 1; + ide_other->sc->request_length = 0xEB14; + ide_other->sc->callback = 0.0; + ide_other->cylinder = 0xEB14; + } - ide_set_callback(ide, 0.0); - ide_set_callback(ide_other, 0.0); - ide_set_board_callback(ide->board, 0.0); - return; - } - } + ide_set_callback(ide, 0.0); + ide_set_callback(ide_other, 0.0); + ide_set_board_callback(ide->board, 0.0); + return; + } + } - ide->head = val & 0xF; - ide->lba = val & 0x40; - ide_other->head = val & 0xF; - ide_other->lba = val & 0x40; + ide->head = val & 0xF; + ide->lba = val & 0x40; + ide_other->head = val & 0xF; + ide_other->lba = val & 0x40; - ide->lba_addr = (ide->lba_addr & 0x0FFFFFF) | ((val & 0xF) << 24); - ide_other->lba_addr = (ide_other->lba_addr & 0x0FFFFFF)|((val & 0xF) << 24); + ide->lba_addr = (ide->lba_addr & 0x0FFFFFF) | ((val & 0xF) << 24); + ide_other->lba_addr = (ide_other->lba_addr & 0x0FFFFFF) | ((val & 0xF) << 24); - ide_irq_update(ide); - return; + ide_irq_update(ide); + return; - case 0x7: /* Command register */ - if (ide->type == IDE_NONE) - return; + case 0x7: /* Command register */ + if (ide->type == IDE_NONE) + return; - ide_irq_lower(ide); - ide->command = val; + ide_irq_lower(ide); + ide->command = val; - ide->error = 0; - if (ide->type == IDE_ATAPI) - ide->sc->error = 0; + ide->error = 0; + if (ide->type == IDE_ATAPI) + ide->sc->error = 0; - if (((val >= WIN_RECAL) && (val <= 0x1F)) || ((val >= WIN_SEEK) && (val <= 0x7F))) { - if (ide->type == IDE_ATAPI) - ide->sc->status = DRDY_STAT; - else - ide->atastat = READY_STAT | BSY_STAT; + if (((val >= WIN_RECAL) && (val <= 0x1F)) || ((val >= WIN_SEEK) && (val <= 0x7F))) { + if (ide->type == IDE_ATAPI) + ide->sc->status = DRDY_STAT; + else + ide->atastat = READY_STAT | BSY_STAT; - if (ide->type == IDE_ATAPI) { - ide->sc->callback = 100.0 * IDE_TIME; - ide_set_callback(ide, 100.0 * IDE_TIME); - } else { - double seek_time = hdd_seek_get_time(&hdd[ide->hdd_num], ide_get_sector(ide), HDD_OP_SEEK, 0, 0.0); - ide_set_callback(ide, seek_time); - } - return; - } + if (ide->type == IDE_ATAPI) { + ide->sc->callback = 100.0 * IDE_TIME; + ide_set_callback(ide, 100.0 * IDE_TIME); + } else { + double seek_time = hdd_seek_get_time(&hdd[ide->hdd_num], ide_get_sector(ide), HDD_OP_SEEK, 0, 0.0); + ide_set_callback(ide, seek_time); + } + return; + } - switch (val) { - case WIN_SRST: /* ATAPI Device Reset */ - if (ide->type == IDE_ATAPI) { - ide->sc->status = BSY_STAT; - ide->sc->callback = 100.0 * IDE_TIME; - } else - ide->atastat = DRDY_STAT; + switch (val) { + case WIN_SRST: /* ATAPI Device Reset */ + if (ide->type == IDE_ATAPI) { + ide->sc->status = BSY_STAT; + ide->sc->callback = 100.0 * IDE_TIME; + } else + ide->atastat = DRDY_STAT; - ide_set_callback(ide, 100.0 * IDE_TIME); - return; + ide_set_callback(ide, 100.0 * IDE_TIME); + return; - case WIN_READ_MULTIPLE: - /* Fatal removed in accordance with the official ATAPI reference: - If the Read Multiple command is attempted before the Set Multiple Mode - command has been executed or when Read Multiple commands are - disabled, the Read Multiple operation is rejected with an Aborted Com- - mand error. */ - ide->blockcount = 0; - /*FALLTHROUGH*/ + case WIN_READ_MULTIPLE: + /* Fatal removed in accordance with the official ATAPI reference: + If the Read Multiple command is attempted before the Set Multiple Mode + command has been executed or when Read Multiple commands are + disabled, the Read Multiple operation is rejected with an Aborted Com- + mand error. */ + ide->blockcount = 0; + /*FALLTHROUGH*/ - case WIN_READ: - case WIN_READ_NORETRY: - case WIN_READ_DMA: - case WIN_READ_DMA_ALT: - if (ide->type == IDE_ATAPI) { - ide->sc->status = BSY_STAT; - ide->sc->callback = 200.0 * IDE_TIME; - } else - ide->atastat = BSY_STAT; + case WIN_READ: + case WIN_READ_NORETRY: + case WIN_READ_DMA: + case WIN_READ_DMA_ALT: + if (ide->type == IDE_ATAPI) { + ide->sc->status = BSY_STAT; + ide->sc->callback = 200.0 * IDE_TIME; + } else + ide->atastat = BSY_STAT; - if (ide->type == IDE_HDD) { - ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1); - uint32_t sec_count; - double wait_time; - if ((val == WIN_READ_DMA) || (val == WIN_READ_DMA_ALT)) { - // TODO make DMA timing more accurate - sec_count = ide->secount ? ide->secount : 256; - double seek_time = hdd_timing_read(&hdd[ide->hdd_num], ide_get_sector(ide), sec_count); - double xfer_time = ide_get_xfer_time(ide, 512 * sec_count); - wait_time = seek_time > xfer_time ? seek_time : xfer_time; - } else if (val == WIN_READ_MULTIPLE) { - sec_count = (ide->secount < ide->blocksize) ? ide->secount : ide->blocksize; - double seek_time = hdd_timing_read(&hdd[ide->hdd_num], ide_get_sector(ide), sec_count); - double xfer_time = ide_get_xfer_time(ide, 512 * sec_count); - wait_time = seek_time + xfer_time; - } else { - sec_count = 1; - double seek_time = hdd_timing_read(&hdd[ide->hdd_num], ide_get_sector(ide), sec_count); - double xfer_time = ide_get_xfer_time(ide, 512 * sec_count); - wait_time = seek_time + xfer_time; - } - ide_set_callback(ide, wait_time); - } else - ide_set_callback(ide, 200.0 * IDE_TIME); - ide->do_initial_read = 1; - return; + if (ide->type == IDE_HDD) { + ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1); + uint32_t sec_count; + double wait_time; + if ((val == WIN_READ_DMA) || (val == WIN_READ_DMA_ALT)) { + // TODO make DMA timing more accurate + sec_count = ide->secount ? ide->secount : 256; + double seek_time = hdd_timing_read(&hdd[ide->hdd_num], ide_get_sector(ide), sec_count); + double xfer_time = ide_get_xfer_time(ide, 512 * sec_count); + wait_time = seek_time > xfer_time ? seek_time : xfer_time; + } else if (val == WIN_READ_MULTIPLE) { + sec_count = (ide->secount < ide->blocksize) ? ide->secount : ide->blocksize; + double seek_time = hdd_timing_read(&hdd[ide->hdd_num], ide_get_sector(ide), sec_count); + double xfer_time = ide_get_xfer_time(ide, 512 * sec_count); + wait_time = seek_time + xfer_time; + } else { + sec_count = 1; + double seek_time = hdd_timing_read(&hdd[ide->hdd_num], ide_get_sector(ide), sec_count); + double xfer_time = ide_get_xfer_time(ide, 512 * sec_count); + wait_time = seek_time + xfer_time; + } + ide_set_callback(ide, wait_time); + } else + ide_set_callback(ide, 200.0 * IDE_TIME); + ide->do_initial_read = 1; + return; - case WIN_WRITE_MULTIPLE: - /* Fatal removed for the same reason as for WIN_READ_MULTIPLE. */ - ide->blockcount = 0; - /* Turn on the activity indicator *here* so that it gets turned on - less times. */ - ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1); - /*FALLTHROUGH*/ + case WIN_WRITE_MULTIPLE: + /* Fatal removed for the same reason as for WIN_READ_MULTIPLE. */ + ide->blockcount = 0; + /* Turn on the activity indicator *here* so that it gets turned on + less times. */ + ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1); + /*FALLTHROUGH*/ - case WIN_WRITE: - case WIN_WRITE_NORETRY: - if (ide->type == IDE_ATAPI) { - ide->sc->status = DRQ_STAT | DSC_STAT | DRDY_STAT; - ide->sc->pos = 0; - } else { - ide->atastat = DRQ_STAT | DSC_STAT | DRDY_STAT; - ide->pos=0; - } - return; + case WIN_WRITE: + case WIN_WRITE_NORETRY: + if (ide->type == IDE_ATAPI) { + ide->sc->status = DRQ_STAT | DSC_STAT | DRDY_STAT; + ide->sc->pos = 0; + } else { + ide->atastat = DRQ_STAT | DSC_STAT | DRDY_STAT; + ide->pos = 0; + } + return; - case WIN_WRITE_DMA: - case WIN_WRITE_DMA_ALT: - case WIN_VERIFY: - case WIN_VERIFY_ONCE: - case WIN_IDENTIFY: /* Identify Device */ - case WIN_SET_FEATURES: /* Set Features */ - case WIN_READ_NATIVE_MAX: - if (ide->type == IDE_ATAPI) { - ide->sc->status = BSY_STAT; - ide->sc->callback = 200.0 * IDE_TIME; - } else - ide->atastat = BSY_STAT; + case WIN_WRITE_DMA: + case WIN_WRITE_DMA_ALT: + case WIN_VERIFY: + case WIN_VERIFY_ONCE: + case WIN_IDENTIFY: /* Identify Device */ + case WIN_SET_FEATURES: /* Set Features */ + case WIN_READ_NATIVE_MAX: + if (ide->type == IDE_ATAPI) { + ide->sc->status = BSY_STAT; + ide->sc->callback = 200.0 * IDE_TIME; + } else + ide->atastat = BSY_STAT; - if ((ide->type == IDE_HDD) && - ((val == WIN_WRITE_DMA) || (val == WIN_WRITE_DMA_ALT))) { - uint32_t sec_count = ide->secount ? ide->secount : 256; - double seek_time = hdd_timing_read(&hdd[ide->hdd_num], ide_get_sector(ide), sec_count); - double xfer_time = ide_get_xfer_time(ide, 512 * sec_count); - double wait_time = seek_time > xfer_time ? seek_time : xfer_time; - ide_set_callback(ide, wait_time); - } else if ((ide->type == IDE_HDD) && - ((val == WIN_VERIFY) || (val == WIN_VERIFY_ONCE))) { - double seek_time = hdd_timing_read(&hdd[ide->hdd_num], ide_get_sector(ide), ide->secount); - ide_set_callback(ide, seek_time + ide_get_xfer_time(ide, 2)); - } else if (val == WIN_IDENTIFY) - ide_callback(ide); - else - ide_set_callback(ide, 200.0 * IDE_TIME); - return; + if ((ide->type == IDE_HDD) && ((val == WIN_WRITE_DMA) || (val == WIN_WRITE_DMA_ALT))) { + uint32_t sec_count = ide->secount ? ide->secount : 256; + double seek_time = hdd_timing_read(&hdd[ide->hdd_num], ide_get_sector(ide), sec_count); + double xfer_time = ide_get_xfer_time(ide, 512 * sec_count); + double wait_time = seek_time > xfer_time ? seek_time : xfer_time; + ide_set_callback(ide, wait_time); + } else if ((ide->type == IDE_HDD) && ((val == WIN_VERIFY) || (val == WIN_VERIFY_ONCE))) { + double seek_time = hdd_timing_read(&hdd[ide->hdd_num], ide_get_sector(ide), ide->secount); + ide_set_callback(ide, seek_time + ide_get_xfer_time(ide, 2)); + } else if (val == WIN_IDENTIFY) + ide_callback(ide); + else + ide_set_callback(ide, 200.0 * IDE_TIME); + return; - case WIN_FORMAT: - if (ide->type == IDE_ATAPI) - goto ide_bad_command; - else { - ide->atastat = DRQ_STAT; - ide->pos=0; - } - return; + case WIN_FORMAT: + if (ide->type == IDE_ATAPI) + goto ide_bad_command; + else { + ide->atastat = DRQ_STAT; + ide->pos = 0; + } + return; - case WIN_SPECIFY: /* Initialize Drive Parameters */ - if (ide->type == IDE_ATAPI) { - ide->sc->status = BSY_STAT; - ide->sc->callback = 30.0 * IDE_TIME; - } else - ide->atastat = BSY_STAT; + case WIN_SPECIFY: /* Initialize Drive Parameters */ + if (ide->type == IDE_ATAPI) { + ide->sc->status = BSY_STAT; + ide->sc->callback = 30.0 * IDE_TIME; + } else + ide->atastat = BSY_STAT; - ide_set_callback(ide, 30.0 * IDE_TIME); - return; + ide_set_callback(ide, 30.0 * IDE_TIME); + return; - case WIN_DRIVE_DIAGNOSTICS: /* Execute Drive Diagnostics */ - dev->cur_dev &= ~1; - ide = ide_drives[ch & ~1]; - ide->selected = 1; - ide_other = ide_drives[ch | 1]; - ide_other->selected = 0; + case WIN_DRIVE_DIAGNOSTICS: /* Execute Drive Diagnostics */ + dev->cur_dev &= ~1; + ide = ide_drives[ch & ~1]; + ide->selected = 1; + ide_other = ide_drives[ch | 1]; + ide_other->selected = 0; - /* Device 0. */ - dev_reset(ide); - ide->atastat = BSY_STAT; - ide->error = 1; - if (ide->type == IDE_ATAPI) { - ide->sc->status = BSY_STAT; - ide->sc->error = 1; - } + /* Device 0. */ + dev_reset(ide); + ide->atastat = BSY_STAT; + ide->error = 1; + if (ide->type == IDE_ATAPI) { + ide->sc->status = BSY_STAT; + ide->sc->error = 1; + } - /* Device 1. */ - dev_reset(ide_other); - ide_other->atastat = BSY_STAT; - ide_other->error = 1; - if (ide_other->type == IDE_ATAPI) { - ide_other->sc->status = BSY_STAT; - ide_other->sc->error = 1; - } + /* Device 1. */ + dev_reset(ide_other); + ide_other->atastat = BSY_STAT; + ide_other->error = 1; + if (ide_other->type == IDE_ATAPI) { + ide_other->sc->status = BSY_STAT; + ide_other->sc->error = 1; + } - /* Fire the timer. */ - dev->diag = 1; - ide->reset = 1; - ide_set_callback(ide, 0.0); - ide_set_callback(ide_other, 0.0); - ide_set_board_callback(ide->board, 200.0 * IDE_TIME); - return; + /* Fire the timer. */ + dev->diag = 1; + ide->reset = 1; + ide_set_callback(ide, 0.0); + ide_set_callback(ide_other, 0.0); + ide_set_board_callback(ide->board, 200.0 * IDE_TIME); + return; - case WIN_PIDENTIFY: /* Identify Packet Device */ - case WIN_SET_MULTIPLE_MODE: /* Set Multiple Mode */ - case WIN_NOP: - case WIN_STANDBYNOW1: - case WIN_IDLENOW1: - case WIN_SETIDLE1: /* Idle */ - case WIN_CHECKPOWERMODE1: - case WIN_SLEEP1: - if (ide->type == IDE_ATAPI) - ide->sc->status = BSY_STAT; - else - ide->atastat = BSY_STAT; - ide_callback(ide); - return; + case WIN_PIDENTIFY: /* Identify Packet Device */ + case WIN_SET_MULTIPLE_MODE: /* Set Multiple Mode */ + case WIN_NOP: + case WIN_STANDBYNOW1: + case WIN_IDLENOW1: + case WIN_SETIDLE1: /* Idle */ + case WIN_CHECKPOWERMODE1: + case WIN_SLEEP1: + if (ide->type == IDE_ATAPI) + ide->sc->status = BSY_STAT; + else + ide->atastat = BSY_STAT; + ide_callback(ide); + return; - case WIN_PACKETCMD: /* ATAPI Packet */ - /* Skip the command callback wait, and process immediately. */ - if (ide->type == IDE_ATAPI) { - ide->sc->packet_status = PHASE_IDLE; - ide->sc->pos = 0; - ide->sc->phase = 1; - ide->sc->status = DRDY_STAT | DRQ_STAT; - if (ide->interrupt_drq) - ide_irq_raise(ide); /* Interrupt DRQ, requires IRQ on any DRQ. */ - } else { - ide->atastat = BSY_STAT; - ide_set_callback(ide, 200.0 * IDE_TIME); - ide->pos=0; - } - return; + case WIN_PACKETCMD: /* ATAPI Packet */ + /* Skip the command callback wait, and process immediately. */ + if (ide->type == IDE_ATAPI) { + ide->sc->packet_status = PHASE_IDLE; + ide->sc->pos = 0; + ide->sc->phase = 1; + ide->sc->status = DRDY_STAT | DRQ_STAT; + if (ide->interrupt_drq) + ide_irq_raise(ide); /* Interrupt DRQ, requires IRQ on any DRQ. */ + } else { + ide->atastat = BSY_STAT; + ide_set_callback(ide, 200.0 * IDE_TIME); + ide->pos = 0; + } + return; - case 0xF0: - default: + case 0xF0: + default: ide_bad_command: - if (ide->type == IDE_ATAPI) { - ide->sc->status = DRDY_STAT | ERR_STAT | DSC_STAT; - ide->sc->error = ABRT_ERR; - } else { - ide->atastat = DRDY_STAT | ERR_STAT | DSC_STAT; - ide->error = ABRT_ERR; - } - ide_irq_raise(ide); - return; - } - return; + if (ide->type == IDE_ATAPI) { + ide->sc->status = DRDY_STAT | ERR_STAT | DSC_STAT; + ide->sc->error = ABRT_ERR; + } else { + ide->atastat = DRDY_STAT | ERR_STAT | DSC_STAT; + ide->error = ABRT_ERR; + } + ide_irq_raise(ide); + return; + } + return; } } - static uint32_t ide_read_data(ide_t *ide, int length) { uint32_t temp = 0; if (!ide->buffer) { - switch (length) { - case 1: - return 0xff; - case 2: - return 0xffff; - case 4: - return 0xffffffff; - default: - return 0; - } + switch (length) { + case 1: + return 0xff; + case 2: + return 0xffff; + case 4: + return 0xffffffff; + default: + return 0; + } } - uint8_t *idebufferb = (uint8_t *) ide->buffer; + uint8_t *idebufferb = (uint8_t *) ide->buffer; uint16_t *idebufferw = ide->buffer; uint32_t *idebufferl = (uint32_t *) ide->buffer; if (ide->command == WIN_PACKETCMD) { - ide->pos = 0; - if (ide->type == IDE_ATAPI) - temp = ide_atapi_packet_read(ide, length); - else { - ide_log("Drive not ATAPI (position: %i)\n", ide->pos); - return 0; - } + ide->pos = 0; + if (ide->type == IDE_ATAPI) + temp = ide_atapi_packet_read(ide, length); + else { + ide_log("Drive not ATAPI (position: %i)\n", ide->pos); + return 0; + } } else { - switch (length) { - case 1: - temp = idebufferb[ide->pos]; - ide->pos++; - break; - case 2: - temp = idebufferw[ide->pos >> 1]; - ide->pos += 2; - break; - case 4: - temp = idebufferl[ide->pos >> 2]; - ide->pos += 4; - break; - default: - return 0; - } + switch (length) { + case 1: + temp = idebufferb[ide->pos]; + ide->pos++; + break; + case 2: + temp = idebufferw[ide->pos >> 1]; + ide->pos += 2; + break; + case 4: + temp = idebufferl[ide->pos >> 2]; + ide->pos += 4; + break; + default: + return 0; + } } if ((ide->pos >= 512) && (ide->command != WIN_PACKETCMD)) { - ide->pos = 0; - ide->atastat = DRDY_STAT | DSC_STAT; - if (ide->type == IDE_ATAPI) { - ide->sc->status = DRDY_STAT | DSC_STAT; - ide->sc->packet_status = PHASE_IDLE; - } - if ((ide->command == WIN_READ) || (ide->command == WIN_READ_NORETRY) || (ide->command == WIN_READ_MULTIPLE)) { - ide->secount = (ide->secount - 1) & 0xff; - if (ide->secount) { - ide_next_sector(ide); - ide->atastat = BSY_STAT | READY_STAT | DSC_STAT; - if (ide->command == WIN_READ_MULTIPLE) { - if (!ide->blockcount) { - uint32_t sec_count = (ide->secount < ide->blocksize) ? ide->secount : ide->blocksize; - double seek_time = hdd_timing_read(&hdd[ide->hdd_num], ide_get_sector(ide), sec_count); - double xfer_time = ide_get_xfer_time(ide, 512 * sec_count); - ide_set_callback(ide, seek_time + xfer_time); - } else { - ide_callback(ide); - } - } else { - double seek_time = hdd_timing_read(&hdd[ide->hdd_num], ide_get_sector(ide), 1); - double xfer_time = ide_get_xfer_time(ide, 512); - ide_set_callback(ide, seek_time + xfer_time); - } - } else - ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0); - } + ide->pos = 0; + ide->atastat = DRDY_STAT | DSC_STAT; + if (ide->type == IDE_ATAPI) { + ide->sc->status = DRDY_STAT | DSC_STAT; + ide->sc->packet_status = PHASE_IDLE; + } + if ((ide->command == WIN_READ) || (ide->command == WIN_READ_NORETRY) || (ide->command == WIN_READ_MULTIPLE)) { + ide->secount = (ide->secount - 1) & 0xff; + if (ide->secount) { + ide_next_sector(ide); + ide->atastat = BSY_STAT | READY_STAT | DSC_STAT; + if (ide->command == WIN_READ_MULTIPLE) { + if (!ide->blockcount) { + uint32_t sec_count = (ide->secount < ide->blocksize) ? ide->secount : ide->blocksize; + double seek_time = hdd_timing_read(&hdd[ide->hdd_num], ide_get_sector(ide), sec_count); + double xfer_time = ide_get_xfer_time(ide, 512 * sec_count); + ide_set_callback(ide, seek_time + xfer_time); + } else { + ide_callback(ide); + } + } else { + double seek_time = hdd_timing_read(&hdd[ide->hdd_num], ide_get_sector(ide), 1); + double xfer_time = ide_get_xfer_time(ide, 512); + ide_set_callback(ide, seek_time + xfer_time); + } + } else + ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0); + } } return temp; } - static uint8_t ide_status(ide_t *ide, ide_t *ide_other, int ch) { if ((ide->type == IDE_NONE) && ((ide_other->type == IDE_NONE) || !(ch & 1))) #ifdef STATUS_BIT_7_PULLDOWN - return 0x7F; /* Bit 7 pulled down, all other bits pulled up, per the spec. */ + return 0x7F; /* Bit 7 pulled down, all other bits pulled up, per the spec. */ #else - return 0xFF; + return 0xFF; #endif else if ((ide->type == IDE_NONE) && (ch & 1)) - return 0x00; /* On real hardware, a slave with a present master always returns a status of 0x00. */ + return 0x00; /* On real hardware, a slave with a present master always returns a status of 0x00. */ else if (ide->type == IDE_ATAPI) - return (ide->sc->status & ~DSC_STAT) | (ide->service ? SERVICE_STAT : 0); + return (ide->sc->status & ~DSC_STAT) | (ide->service ? SERVICE_STAT : 0); else - return ide->atastat; + return ide->atastat; } - uint8_t ide_readb(uint16_t addr, void *priv) { ide_board_t *dev = (ide_board_t *) priv; - int ch; + int ch; ide_t *ide; - ch = dev->cur_dev; + ch = dev->cur_dev; ide = ide_drives[ch]; - uint8_t temp = 0xff; + uint8_t temp = 0xff; uint16_t tempw; addr |= 0x90; addr &= 0xFFF7; switch (addr & 0x7) { - case 0x0: /* Data */ - tempw = ide_read_data(ide, 2); - temp = tempw & 0xff; - break; + case 0x0: /* Data */ + tempw = ide_read_data(ide, 2); + temp = tempw & 0xff; + break; - /* For ATAPI: Bits 7-4 = sense key, bit 3 = MCR (media change requested), - Bit 2 = ABRT (aborted command), Bit 1 = EOM (end of media), - and Bit 0 = ILI (illegal length indication). */ - case 0x1: /* Error */ - if (ide->type == IDE_NONE) - temp = 0; - else if (ide->type == IDE_ATAPI) - temp = ide->sc->error; - else - temp = ide->error; - break; + /* For ATAPI: Bits 7-4 = sense key, bit 3 = MCR (media change requested), + Bit 2 = ABRT (aborted command), Bit 1 = EOM (end of media), + and Bit 0 = ILI (illegal length indication). */ + case 0x1: /* Error */ + if (ide->type == IDE_NONE) + temp = 0; + else if (ide->type == IDE_ATAPI) + temp = ide->sc->error; + else + temp = ide->error; + break; - /* For ATAPI: - Bit 0: Command or Data: - Data if clear, Command if set; - Bit 1: I/OB - Direction: - To device if set; - From device if clear. - IO DRQ CoD - 0 1 1 Ready to accept command packet - 1 1 1 Message - ready to send message to host - 1 1 0 Data to host - 0 1 0 Data from host - 1 0 1 Status. */ - case 0x2: /* Sector count */ - if (ide->type == IDE_ATAPI) - temp = ide->sc->phase; - else if (ide->type != IDE_NONE) - temp = ide->secount; - break; + /* For ATAPI: + Bit 0: Command or Data: + Data if clear, Command if set; + Bit 1: I/OB + Direction: + To device if set; + From device if clear. + IO DRQ CoD + 0 1 1 Ready to accept command packet + 1 1 1 Message - ready to send message to host + 1 1 0 Data to host + 0 1 0 Data from host + 1 0 1 Status. */ + case 0x2: /* Sector count */ + if (ide->type == IDE_ATAPI) + temp = ide->sc->phase; + else if (ide->type != IDE_NONE) + temp = ide->secount; + break; - case 0x3: /* Sector */ - if (ide->type != IDE_NONE) - temp = (uint8_t) ide->sector; - break; + case 0x3: /* Sector */ + if (ide->type != IDE_NONE) + temp = (uint8_t) ide->sector; + break; - case 0x4: /* Cylinder low */ - if (ide->type == IDE_NONE) - temp = 0xFF; - else if (ide->type == IDE_ATAPI) - temp = ide->sc->request_length & 0xff; - else - temp = ide->cylinder & 0xff; - break; + case 0x4: /* Cylinder low */ + if (ide->type == IDE_NONE) + temp = 0xFF; + else if (ide->type == IDE_ATAPI) + temp = ide->sc->request_length & 0xff; + else + temp = ide->cylinder & 0xff; + break; - case 0x5: /* Cylinder high */ - if (ide->type == IDE_NONE) - temp = 0xFF; - else if (ide->type == IDE_ATAPI) - temp = ide->sc->request_length >> 8; - else - temp = ide->cylinder >> 8; - break; + case 0x5: /* Cylinder high */ + if (ide->type == IDE_NONE) + temp = 0xFF; + else if (ide->type == IDE_ATAPI) + temp = ide->sc->request_length >> 8; + else + temp = ide->cylinder >> 8; + break; - case 0x6: /* Drive/Head */ - temp = (uint8_t)(ide->head | ((ch & 1) ? 0x10 : 0) | (ide->lba ? 0x40 : 0) | 0xa0); - break; + case 0x6: /* Drive/Head */ + temp = (uint8_t) (ide->head | ((ch & 1) ? 0x10 : 0) | (ide->lba ? 0x40 : 0) | 0xa0); + break; - /* For ATAPI: Bit 5 is DMA ready, but without overlapped or interlaved DMA, it is - DF (drive fault). */ - case 0x7: /* Status */ - ide_irq_lower(ide); - temp = ide_status(ide, ide_drives[ch ^ 1], ch); - break; + /* For ATAPI: Bit 5 is DMA ready, but without overlapped or interlaved DMA, it is + DF (drive fault). */ + case 0x7: /* Status */ + ide_irq_lower(ide); + temp = ide_status(ide, ide_drives[ch ^ 1], ch); + break; } ide_log("ide_readb(%04X, %08X) = %02X\n", addr, priv, temp); return temp; } - uint8_t ide_read_alt_status(uint16_t addr, void *priv) { @@ -2035,9 +1993,9 @@ ide_read_alt_status(uint16_t addr, void *priv) ide_board_t *dev = (ide_board_t *) priv; ide_t *ide; - int ch; + int ch; - ch = dev->cur_dev; + ch = dev->cur_dev; ide = ide_drives[ch]; /* Per the Seagate ATA-3 specification: @@ -2048,7 +2006,6 @@ ide_read_alt_status(uint16_t addr, void *priv) return temp; } - uint16_t ide_readw(uint16_t addr, void *priv) { @@ -2057,28 +2014,27 @@ ide_readw(uint16_t addr, void *priv) ide_board_t *dev = (ide_board_t *) priv; ide_t *ide; - int ch; + int ch; - ch = dev->cur_dev; + ch = dev->cur_dev; ide = ide_drives[ch]; switch (addr & 0x7) { - case 0x0: /* Data */ - temp = ide_read_data(ide, 2); - break; - case 0x7: - temp = ide_readb(addr, priv) | 0xff00; - break; - default: - temp = ide_readb(addr, priv) | (ide_readb(addr + 1, priv) << 8); - break; + case 0x0: /* Data */ + temp = ide_read_data(ide, 2); + break; + case 0x7: + temp = ide_readb(addr, priv) | 0xff00; + break; + default: + temp = ide_readb(addr, priv) | (ide_readb(addr + 1, priv) << 8); + break; } ide_log("ide_readw(%04X, %08X) = %04X\n", addr, priv, temp); return temp; } - static uint32_t ide_readl(uint16_t addr, void *priv) { @@ -2088,75 +2044,73 @@ ide_readl(uint16_t addr, void *priv) ide_board_t *dev = (ide_board_t *) priv; ide_t *ide; - int ch; + int ch; - ch = dev->cur_dev; + ch = dev->cur_dev; ide = ide_drives[ch]; switch (addr & 0x7) { - case 0x0: /* Data */ - temp2 = ide_read_data(ide, 2); - if (dev->bit32) - temp = temp2 | (ide_read_data(ide, 2) << 16); - else - temp = temp2 | (ide_readw(addr + 2, priv) << 16); - break; - case 0x6: case 0x7: - temp = ide_readw(addr, priv) | 0xffff0000; - break; - default: - temp = ide_readw(addr, priv) | (ide_readw(addr + 2, priv) << 16); - break; + case 0x0: /* Data */ + temp2 = ide_read_data(ide, 2); + if (dev->bit32) + temp = temp2 | (ide_read_data(ide, 2) << 16); + else + temp = temp2 | (ide_readw(addr + 2, priv) << 16); + break; + case 0x6: + case 0x7: + temp = ide_readw(addr, priv) | 0xffff0000; + break; + default: + temp = ide_readw(addr, priv) | (ide_readw(addr + 2, priv) << 16); + break; } ide_log("ide_readl(%04X, %08X) = %04X\n", addr, priv, temp); return temp; } - static void ide_board_callback(void *priv) { - ide_board_t *dev = (ide_board_t *) priv; + ide_board_t *dev = (ide_board_t *) priv; #ifdef ENABLE_IDE_LOG - ide_log("CALLBACK RESET\n"); + ide_log("CALLBACK RESET\n"); #endif - dev->ide[0]->atastat = DRDY_STAT | DSC_STAT; - if (dev->ide[0]->type == IDE_ATAPI) - dev->ide[0]->sc->status = DRDY_STAT | DSC_STAT; + dev->ide[0]->atastat = DRDY_STAT | DSC_STAT; + if (dev->ide[0]->type == IDE_ATAPI) + dev->ide[0]->sc->status = DRDY_STAT | DSC_STAT; dev->ide[1]->atastat = DRDY_STAT | DSC_STAT; if (dev->ide[1]->type == IDE_ATAPI) - dev->ide[1]->sc->status = DRDY_STAT | DSC_STAT; + dev->ide[1]->sc->status = DRDY_STAT | DSC_STAT; dev->cur_dev &= ~1; if (dev->diag) { - dev->diag = 0; - ide_irq_raise(dev->ide[0]); + dev->diag = 0; + ide_irq_raise(dev->ide[0]); } } - static void atapi_error_no_ready(ide_t *ide) { ide->command = 0; if (ide->type == IDE_ATAPI) { - ide->sc->status = ERR_STAT | DSC_STAT; - ide->sc->error = ABRT_ERR; - ide->sc->pos = 0; + ide->sc->status = ERR_STAT | DSC_STAT; + ide->sc->error = ABRT_ERR; + ide->sc->pos = 0; } else { - ide->atastat = ERR_STAT | DSC_STAT; - ide->error = ABRT_ERR; - ide->pos = 0; + ide->atastat = ERR_STAT | DSC_STAT; + ide->error = ABRT_ERR; + ide->pos = 0; } ide_irq_raise(ide); } - static void ide_callback(void *priv) { @@ -2166,565 +2120,551 @@ ide_callback(void *priv) ide_log("CALLBACK %02X %i %i\n", ide->command, ide->reset, ide->channel); - if (((ide->command >= WIN_RECAL) && (ide->command <= 0x1F)) || - ((ide->command >= WIN_SEEK) && (ide->command <= 0x7F))) { - if (ide->type != IDE_HDD) { - atapi_error_no_ready(ide); - return; - } - if ((ide->command >= WIN_SEEK) && (ide->command <= 0x7F) && !ide->lba) { - if ((ide->cylinder >= ide->tracks) || (ide->head >= ide->hpc) || - !ide->sector || (ide->sector > ide->spt)) - goto id_not_found; - } - ide->atastat = DRDY_STAT | DSC_STAT; - ide_irq_raise(ide); - return; + if (((ide->command >= WIN_RECAL) && (ide->command <= 0x1F)) || ((ide->command >= WIN_SEEK) && (ide->command <= 0x7F))) { + if (ide->type != IDE_HDD) { + atapi_error_no_ready(ide); + return; + } + if ((ide->command >= WIN_SEEK) && (ide->command <= 0x7F) && !ide->lba) { + if ((ide->cylinder >= ide->tracks) || (ide->head >= ide->hpc) || !ide->sector || (ide->sector > ide->spt)) + goto id_not_found; + } + ide->atastat = DRDY_STAT | DSC_STAT; + ide_irq_raise(ide); + return; } switch (ide->command) { - /* Initialize the Task File Registers as follows: Status = 00h, Error = 01h, Sector Count = 01h, Sector Number = 01h, - Cylinder Low = 14h, Cylinder High =EBh and Drive/Head = 00h. */ + /* Initialize the Task File Registers as follows: Status = 00h, Error = 01h, Sector Count = 01h, Sector Number = 01h, + Cylinder Low = 14h, Cylinder High =EBh and Drive/Head = 00h. */ case WIN_SRST: /*ATAPI Device Reset */ - ide->atastat = DRDY_STAT | DSC_STAT; - ide->error = 1; /*Device passed*/ - ide->secount = 1; - ide->sector = 1; + ide->atastat = DRDY_STAT | DSC_STAT; + ide->error = 1; /*Device passed*/ + ide->secount = 1; + ide->sector = 1; - ide_set_signature(ide); + ide_set_signature(ide); - if (ide->type == IDE_ATAPI) { - ide->sc->status = DRDY_STAT | DSC_STAT; - ide->sc->error = 1; - if (ide->device_reset) - ide->device_reset(ide->sc); - } - ide_irq_raise(ide); - if (ide->type == IDE_ATAPI) - ide->service = 0; - return; + if (ide->type == IDE_ATAPI) { + ide->sc->status = DRDY_STAT | DSC_STAT; + ide->sc->error = 1; + if (ide->device_reset) + ide->device_reset(ide->sc); + } + ide_irq_raise(ide); + if (ide->type == IDE_ATAPI) + ide->service = 0; + return; - case WIN_NOP: - case WIN_STANDBYNOW1: - case WIN_IDLENOW1: - case WIN_SETIDLE1: - if (ide->type == IDE_ATAPI) - ide->sc->status = DRDY_STAT | DSC_STAT; - else - ide->atastat = DRDY_STAT | DSC_STAT; - ide_irq_raise(ide); - return; + case WIN_NOP: + case WIN_STANDBYNOW1: + case WIN_IDLENOW1: + case WIN_SETIDLE1: + if (ide->type == IDE_ATAPI) + ide->sc->status = DRDY_STAT | DSC_STAT; + else + ide->atastat = DRDY_STAT | DSC_STAT; + ide_irq_raise(ide); + return; - case WIN_CHECKPOWERMODE1: - case WIN_SLEEP1: - if (ide->type == IDE_ATAPI) { - ide->sc->phase = 0xFF; - ide->sc->status = DRDY_STAT | DSC_STAT; - } - ide->secount = 0xFF; - ide->atastat = DRDY_STAT | DSC_STAT; - ide_irq_raise(ide); - return; + case WIN_CHECKPOWERMODE1: + case WIN_SLEEP1: + if (ide->type == IDE_ATAPI) { + ide->sc->phase = 0xFF; + ide->sc->status = DRDY_STAT | DSC_STAT; + } + ide->secount = 0xFF; + ide->atastat = DRDY_STAT | DSC_STAT; + ide_irq_raise(ide); + return; - case WIN_READ: - case WIN_READ_NORETRY: - if (ide->type == IDE_ATAPI) { - ide_set_signature(ide); - goto abort_cmd; - } - if (!ide->lba && (ide->cfg_spt == 0)) - goto id_not_found; + case WIN_READ: + case WIN_READ_NORETRY: + if (ide->type == IDE_ATAPI) { + ide_set_signature(ide); + goto abort_cmd; + } + if (!ide->lba && (ide->cfg_spt == 0)) + goto id_not_found; - if (ide->do_initial_read) { - ide->do_initial_read = 0; - ide->sector_pos = 0; - if (ide->secount) - hdd_image_read(ide->hdd_num, ide_get_sector(ide), ide->secount, ide->sector_buffer); - else - hdd_image_read(ide->hdd_num, ide_get_sector(ide), 256, ide->sector_buffer); - } + if (ide->do_initial_read) { + ide->do_initial_read = 0; + ide->sector_pos = 0; + if (ide->secount) + hdd_image_read(ide->hdd_num, ide_get_sector(ide), ide->secount, ide->sector_buffer); + else + hdd_image_read(ide->hdd_num, ide_get_sector(ide), 256, ide->sector_buffer); + } - memcpy(ide->buffer, &ide->sector_buffer[ide->sector_pos*512], 512); + memcpy(ide->buffer, &ide->sector_buffer[ide->sector_pos * 512], 512); - ide->sector_pos++; - ide->pos = 0; + ide->sector_pos++; + ide->pos = 0; - ide->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; + ide->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; - ide_irq_raise(ide); + ide_irq_raise(ide); - ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1); - return; + ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1); + return; - case WIN_READ_DMA: - case WIN_READ_DMA_ALT: - if ((ide->type == IDE_ATAPI) || ide_boards[ide->board]->force_ata3 || !ide_bm[ide->board]) { - ide_log("IDE %i: DMA read aborted (bad device or board)\n", ide->channel); - goto abort_cmd; - } - if (!ide->lba && (ide->cfg_spt == 0)) { - ide_log("IDE %i: DMA read aborted (SPECIFY failed)\n", ide->channel); - goto id_not_found; - } + case WIN_READ_DMA: + case WIN_READ_DMA_ALT: + if ((ide->type == IDE_ATAPI) || ide_boards[ide->board]->force_ata3 || !ide_bm[ide->board]) { + ide_log("IDE %i: DMA read aborted (bad device or board)\n", ide->channel); + goto abort_cmd; + } + if (!ide->lba && (ide->cfg_spt == 0)) { + ide_log("IDE %i: DMA read aborted (SPECIFY failed)\n", ide->channel); + goto id_not_found; + } - ide->sector_pos = 0; - if (ide->secount) - ide->sector_pos = ide->secount; - else - ide->sector_pos = 256; - hdd_image_read(ide->hdd_num, ide_get_sector(ide), ide->sector_pos, ide->sector_buffer); + ide->sector_pos = 0; + if (ide->secount) + ide->sector_pos = ide->secount; + else + ide->sector_pos = 256; + hdd_image_read(ide->hdd_num, ide_get_sector(ide), ide->sector_pos, ide->sector_buffer); - ide->pos=0; + ide->pos = 0; - if (!ide_boards[ide->board]->force_ata3 && ide_bm[ide->board] && ide_bm[ide->board]->dma) { - /* We should not abort - we should simply wait for the host to start DMA. */ - ret = ide_bm[ide->board]->dma(ide->board, - ide->sector_buffer, ide->sector_pos * 512, - 0, ide_bm[ide->board]->priv); - if (ret == 2) { - /* Bus master DMA disabled, simply wait for the host to enable DMA. */ - ide->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; - ide_set_callback(ide, 6.0 * IDE_TIME); - return; - } else if (ret == 1) { - /*DMA successful*/ - ide_log("IDE %i: DMA read successful\n", ide->channel); + if (!ide_boards[ide->board]->force_ata3 && ide_bm[ide->board] && ide_bm[ide->board]->dma) { + /* We should not abort - we should simply wait for the host to start DMA. */ + ret = ide_bm[ide->board]->dma(ide->board, + ide->sector_buffer, ide->sector_pos * 512, + 0, ide_bm[ide->board]->priv); + if (ret == 2) { + /* Bus master DMA disabled, simply wait for the host to enable DMA. */ + ide->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; + ide_set_callback(ide, 6.0 * IDE_TIME); + return; + } else if (ret == 1) { + /*DMA successful*/ + ide_log("IDE %i: DMA read successful\n", ide->channel); - ide->atastat = DRDY_STAT | DSC_STAT; + ide->atastat = DRDY_STAT | DSC_STAT; - ide_irq_raise(ide); - ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0); - } else { - /* Bus master DMAS error, abort the command. */ - ide_log("IDE %i: DMA read aborted (failed)\n", ide->channel); - goto abort_cmd; - } - } else { - ide_log("IDE %i: DMA read aborted (no bus master)\n", ide->channel); - goto abort_cmd; - } - return; + ide_irq_raise(ide); + ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0); + } else { + /* Bus master DMAS error, abort the command. */ + ide_log("IDE %i: DMA read aborted (failed)\n", ide->channel); + goto abort_cmd; + } + } else { + ide_log("IDE %i: DMA read aborted (no bus master)\n", ide->channel); + goto abort_cmd; + } + return; - case WIN_READ_MULTIPLE: - /* According to the official ATA reference: + case WIN_READ_MULTIPLE: + /* According to the official ATA reference: - If the Read Multiple command is attempted before the Set Multiple Mode - command has been executed or when Read Multiple commands are - disabled, the Read Multiple operation is rejected with an Aborted Com- - mand error. */ - if ((ide->type == IDE_ATAPI) || !ide->blocksize) - goto abort_cmd; - if (!ide->lba && (ide->cfg_spt == 0)) - goto id_not_found; + If the Read Multiple command is attempted before the Set Multiple Mode + command has been executed or when Read Multiple commands are + disabled, the Read Multiple operation is rejected with an Aborted Com- + mand error. */ + if ((ide->type == IDE_ATAPI) || !ide->blocksize) + goto abort_cmd; + if (!ide->lba && (ide->cfg_spt == 0)) + goto id_not_found; - if (ide->do_initial_read) { - ide->do_initial_read = 0; - ide->sector_pos = 0; - if (ide->secount) - hdd_image_read(ide->hdd_num, ide_get_sector(ide), ide->secount, ide->sector_buffer); - else - hdd_image_read(ide->hdd_num, ide_get_sector(ide), 256, ide->sector_buffer); - } + if (ide->do_initial_read) { + ide->do_initial_read = 0; + ide->sector_pos = 0; + if (ide->secount) + hdd_image_read(ide->hdd_num, ide_get_sector(ide), ide->secount, ide->sector_buffer); + else + hdd_image_read(ide->hdd_num, ide_get_sector(ide), 256, ide->sector_buffer); + } - memcpy(ide->buffer, &ide->sector_buffer[ide->sector_pos*512], 512); + memcpy(ide->buffer, &ide->sector_buffer[ide->sector_pos * 512], 512); - ide->sector_pos++; - ide->pos=0; + ide->sector_pos++; + ide->pos = 0; - ide->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; - if (!ide->blockcount) - ide_irq_raise(ide); - ide->blockcount++; - if (ide->blockcount >= ide->blocksize) - ide->blockcount = 0; - return; + ide->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; + if (!ide->blockcount) + ide_irq_raise(ide); + ide->blockcount++; + if (ide->blockcount >= ide->blocksize) + ide->blockcount = 0; + return; - case WIN_WRITE: - case WIN_WRITE_NORETRY: - if (ide->type == IDE_ATAPI) - goto abort_cmd; - if (!ide->lba && (ide->cfg_spt == 0)) - goto id_not_found; - hdd_image_write(ide->hdd_num, ide_get_sector(ide), 1, (uint8_t *) ide->buffer); - ide_irq_raise(ide); - ide->secount = (ide->secount - 1) & 0xff; - if (ide->secount) { - ide->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; - ide->pos=0; - ide_next_sector(ide); - ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1); - } else { - ide->atastat = DRDY_STAT | DSC_STAT; - ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0); - } - return; + case WIN_WRITE: + case WIN_WRITE_NORETRY: + if (ide->type == IDE_ATAPI) + goto abort_cmd; + if (!ide->lba && (ide->cfg_spt == 0)) + goto id_not_found; + hdd_image_write(ide->hdd_num, ide_get_sector(ide), 1, (uint8_t *) ide->buffer); + ide_irq_raise(ide); + ide->secount = (ide->secount - 1) & 0xff; + if (ide->secount) { + ide->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; + ide->pos = 0; + ide_next_sector(ide); + ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1); + } else { + ide->atastat = DRDY_STAT | DSC_STAT; + ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0); + } + return; - case WIN_WRITE_DMA: - case WIN_WRITE_DMA_ALT: - if ((ide->type == IDE_ATAPI) || ide_boards[ide->board]->force_ata3 || !ide_bm[ide->board]) { - ide_log("IDE %i: DMA write aborted (bad device type or board)\n", ide->channel); - goto abort_cmd; - } - if (!ide->lba && (ide->cfg_spt == 0)) { - ide_log("IDE %i: DMA write aborted (SPECIFY failed)\n", ide->channel); - goto id_not_found; - } + case WIN_WRITE_DMA: + case WIN_WRITE_DMA_ALT: + if ((ide->type == IDE_ATAPI) || ide_boards[ide->board]->force_ata3 || !ide_bm[ide->board]) { + ide_log("IDE %i: DMA write aborted (bad device type or board)\n", ide->channel); + goto abort_cmd; + } + if (!ide->lba && (ide->cfg_spt == 0)) { + ide_log("IDE %i: DMA write aborted (SPECIFY failed)\n", ide->channel); + goto id_not_found; + } - if (!ide_boards[ide->board]->force_ata3 && ide_bm[ide->board] && ide_bm[ide->board]->dma) { - if (ide->secount) - ide->sector_pos = ide->secount; - else - ide->sector_pos = 256; + if (!ide_boards[ide->board]->force_ata3 && ide_bm[ide->board] && ide_bm[ide->board]->dma) { + if (ide->secount) + ide->sector_pos = ide->secount; + else + ide->sector_pos = 256; - ret = ide_bm[ide->board]->dma(ide->board, - ide->sector_buffer, ide->sector_pos * 512, - 1, ide_bm[ide->board]->priv); + ret = ide_bm[ide->board]->dma(ide->board, + ide->sector_buffer, ide->sector_pos * 512, + 1, ide_bm[ide->board]->priv); - if (ret == 2) { - /* Bus master DMA disabled, simply wait for the host to enable DMA. */ - ide->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; - ide_set_callback(ide, 6.0 * IDE_TIME); - return; - } else if (ret == 1) { - /*DMA successful*/ - ide_log("IDE %i: DMA write successful\n", ide->channel); + if (ret == 2) { + /* Bus master DMA disabled, simply wait for the host to enable DMA. */ + ide->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; + ide_set_callback(ide, 6.0 * IDE_TIME); + return; + } else if (ret == 1) { + /*DMA successful*/ + ide_log("IDE %i: DMA write successful\n", ide->channel); - hdd_image_write(ide->hdd_num, ide_get_sector(ide), ide->sector_pos, ide->sector_buffer); + hdd_image_write(ide->hdd_num, ide_get_sector(ide), ide->sector_pos, ide->sector_buffer); - ide->atastat = DRDY_STAT | DSC_STAT; + ide->atastat = DRDY_STAT | DSC_STAT; - ide_irq_raise(ide); - ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0); - } else { - /* Bus master DMA error, abort the command. */ - ide_log("IDE %i: DMA read aborted (failed)\n", ide->channel); - goto abort_cmd; - } - } else { - ide_log("IDE %i: DMA write aborted (no bus master)\n", ide->channel); - goto abort_cmd; - } + ide_irq_raise(ide); + ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0); + } else { + /* Bus master DMA error, abort the command. */ + ide_log("IDE %i: DMA read aborted (failed)\n", ide->channel); + goto abort_cmd; + } + } else { + ide_log("IDE %i: DMA write aborted (no bus master)\n", ide->channel); + goto abort_cmd; + } - return; + return; - case WIN_WRITE_MULTIPLE: - /* According to the official ATA reference: + case WIN_WRITE_MULTIPLE: + /* According to the official ATA reference: - If the Read Multiple command is attempted before the Set Multiple Mode - command has been executed or when Read Multiple commands are - disabled, the Read Multiple operation is rejected with an Aborted Com- - mand error. */ - if ((ide->type == IDE_ATAPI) || !ide->blocksize) - goto abort_cmd; - if (!ide->lba && (ide->cfg_spt == 0)) - goto id_not_found; - hdd_image_write(ide->hdd_num, ide_get_sector(ide), 1, (uint8_t *) ide->buffer); - ide->blockcount++; - if (ide->blockcount >= ide->blocksize || ide->secount == 1) { - ide->blockcount = 0; - ide_irq_raise(ide); - } - ide->secount = (ide->secount - 1) & 0xff; - if (ide->secount) { - ide->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; - ide->pos=0; - ide_next_sector(ide); - } else { - ide->atastat = DRDY_STAT | DSC_STAT; - ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0); - } - return; + If the Read Multiple command is attempted before the Set Multiple Mode + command has been executed or when Read Multiple commands are + disabled, the Read Multiple operation is rejected with an Aborted Com- + mand error. */ + if ((ide->type == IDE_ATAPI) || !ide->blocksize) + goto abort_cmd; + if (!ide->lba && (ide->cfg_spt == 0)) + goto id_not_found; + hdd_image_write(ide->hdd_num, ide_get_sector(ide), 1, (uint8_t *) ide->buffer); + ide->blockcount++; + if (ide->blockcount >= ide->blocksize || ide->secount == 1) { + ide->blockcount = 0; + ide_irq_raise(ide); + } + ide->secount = (ide->secount - 1) & 0xff; + if (ide->secount) { + ide->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; + ide->pos = 0; + ide_next_sector(ide); + } else { + ide->atastat = DRDY_STAT | DSC_STAT; + ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0); + } + return; - case WIN_VERIFY: - case WIN_VERIFY_ONCE: - if (ide->type == IDE_ATAPI) - goto abort_cmd; - if (!ide->lba && (ide->cfg_spt == 0)) - goto id_not_found; - ide->pos=0; - ide->atastat = DRDY_STAT | DSC_STAT; - ide_irq_raise(ide); - ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1); - return; + case WIN_VERIFY: + case WIN_VERIFY_ONCE: + if (ide->type == IDE_ATAPI) + goto abort_cmd; + if (!ide->lba && (ide->cfg_spt == 0)) + goto id_not_found; + ide->pos = 0; + ide->atastat = DRDY_STAT | DSC_STAT; + ide_irq_raise(ide); + ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1); + return; - case WIN_FORMAT: - if (ide->type == IDE_ATAPI) - goto abort_cmd; - if (!ide->lba && (ide->cfg_spt == 0)) - goto id_not_found; - hdd_image_zero(ide->hdd_num, ide_get_sector(ide), ide->secount); + case WIN_FORMAT: + if (ide->type == IDE_ATAPI) + goto abort_cmd; + if (!ide->lba && (ide->cfg_spt == 0)) + goto id_not_found; + hdd_image_zero(ide->hdd_num, ide_get_sector(ide), ide->secount); - ide->atastat = DRDY_STAT | DSC_STAT; - ide_irq_raise(ide); + ide->atastat = DRDY_STAT | DSC_STAT; + ide_irq_raise(ide); - ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1); - return; + ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1); + return; - case WIN_SPECIFY: /* Initialize Drive Parameters */ - if (ide->type == IDE_ATAPI) - goto abort_cmd; - if (ide->cfg_spt == 0) { - /* Only accept after RESET or DIAG. */ - ide->cfg_spt = ide->secount; - ide->cfg_hpc = ide->head + 1; - } - ide->command = 0x00; - ide->atastat = DRDY_STAT | DSC_STAT; - ide->error = 1; - ide_irq_raise(ide); - return; + case WIN_SPECIFY: /* Initialize Drive Parameters */ + if (ide->type == IDE_ATAPI) + goto abort_cmd; + if (ide->cfg_spt == 0) { + /* Only accept after RESET or DIAG. */ + ide->cfg_spt = ide->secount; + ide->cfg_hpc = ide->head + 1; + } + ide->command = 0x00; + ide->atastat = DRDY_STAT | DSC_STAT; + ide->error = 1; + ide_irq_raise(ide); + return; - case WIN_PIDENTIFY: /* Identify Packet Device */ - if (ide->type == IDE_ATAPI) { - ide_identify(ide); - ide->pos = 0; - ide->sc->phase = 2; - ide->sc->pos = 0; - ide->sc->error = 0; - ide->sc->status = DRQ_STAT | DRDY_STAT | DSC_STAT; - ide_irq_raise(ide); - return; - } - goto abort_cmd; + case WIN_PIDENTIFY: /* Identify Packet Device */ + if (ide->type == IDE_ATAPI) { + ide_identify(ide); + ide->pos = 0; + ide->sc->phase = 2; + ide->sc->pos = 0; + ide->sc->error = 0; + ide->sc->status = DRQ_STAT | DRDY_STAT | DSC_STAT; + ide_irq_raise(ide); + return; + } + goto abort_cmd; - case WIN_SET_MULTIPLE_MODE: - if (ide->type == IDE_ATAPI) - goto abort_cmd; - ide->blocksize = ide->secount; - ide->atastat = DRDY_STAT | DSC_STAT; - ide_irq_raise(ide); - return; + case WIN_SET_MULTIPLE_MODE: + if (ide->type == IDE_ATAPI) + goto abort_cmd; + ide->blocksize = ide->secount; + ide->atastat = DRDY_STAT | DSC_STAT; + ide_irq_raise(ide); + return; - case WIN_SET_FEATURES: - if ((ide->type == IDE_NONE) || !ide_set_features(ide)) - goto abort_cmd; + case WIN_SET_FEATURES: + if ((ide->type == IDE_NONE) || !ide_set_features(ide)) + goto abort_cmd; - if (ide->type == IDE_ATAPI) { - ide->sc->status = DRDY_STAT | DSC_STAT; - ide->sc->pos = 0; - } + if (ide->type == IDE_ATAPI) { + ide->sc->status = DRDY_STAT | DSC_STAT; + ide->sc->pos = 0; + } - ide->atastat = DRDY_STAT | DSC_STAT; - ide_irq_raise(ide); - return; + ide->atastat = DRDY_STAT | DSC_STAT; + ide_irq_raise(ide); + return; - case WIN_READ_NATIVE_MAX: - if (ide->type != IDE_HDD) - goto abort_cmd; - snum = hdd[ide->hdd_num].spt; - snum *= hdd[ide->hdd_num].hpc; - snum *= hdd[ide->hdd_num].tracks; - ide_set_sector(ide, snum - 1); - ide->atastat = DRDY_STAT | DSC_STAT; - ide_irq_raise(ide); - return; + case WIN_READ_NATIVE_MAX: + if (ide->type != IDE_HDD) + goto abort_cmd; + snum = hdd[ide->hdd_num].spt; + snum *= hdd[ide->hdd_num].hpc; + snum *= hdd[ide->hdd_num].tracks; + ide_set_sector(ide, snum - 1); + ide->atastat = DRDY_STAT | DSC_STAT; + ide_irq_raise(ide); + return; - case WIN_IDENTIFY: /* Identify Device */ - if (ide->type != IDE_HDD) { - ide_set_signature(ide); - goto abort_cmd; - } else { - ide_identify(ide); - ide->pos = 0; - ide->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; - ide_irq_raise(ide); - } - return; + case WIN_IDENTIFY: /* Identify Device */ + if (ide->type != IDE_HDD) { + ide_set_signature(ide); + goto abort_cmd; + } else { + ide_identify(ide); + ide->pos = 0; + ide->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; + ide_irq_raise(ide); + } + return; - case WIN_PACKETCMD: /* ATAPI Packet */ - if (ide->type != IDE_ATAPI) - goto abort_cmd; + case WIN_PACKETCMD: /* ATAPI Packet */ + if (ide->type != IDE_ATAPI) + goto abort_cmd; - ide_atapi_callback(ide); - return; + ide_atapi_callback(ide); + return; - case 0xFF: - goto abort_cmd; + case 0xFF: + goto abort_cmd; } abort_cmd: ide->command = 0; if (ide->type == IDE_ATAPI) { - ide->sc->status = DRDY_STAT | ERR_STAT | DSC_STAT; - ide->sc->error = ABRT_ERR; - ide->sc->pos = 0; + ide->sc->status = DRDY_STAT | ERR_STAT | DSC_STAT; + ide->sc->error = ABRT_ERR; + ide->sc->pos = 0; } else { - ide->atastat = DRDY_STAT | ERR_STAT | DSC_STAT; - ide->error = ABRT_ERR; - ide->pos = 0; + ide->atastat = DRDY_STAT | ERR_STAT | DSC_STAT; + ide->error = ABRT_ERR; + ide->pos = 0; } ide_irq_raise(ide); return; id_not_found: ide->atastat = DRDY_STAT | ERR_STAT | DSC_STAT; - ide->error = IDNF_ERR; - ide->pos = 0; + ide->error = IDNF_ERR; + ide->pos = 0; ide_irq_raise(ide); } - uint8_t ide_read_ali_75(void) { - ide_t *ide0, *ide1; - int ch0, ch1; + ide_t *ide0, *ide1; + int ch0, ch1; uint8_t ret = 0x00; - ch0 = ide_boards[0]->cur_dev; - ch1 = ide_boards[1]->cur_dev; + ch0 = ide_boards[0]->cur_dev; + ch1 = ide_boards[1]->cur_dev; ide0 = ide_drives[ch0]; ide1 = ide_drives[ch1]; if (ch1) - ret |= 0x08; + ret |= 0x08; if (ch0) - ret |= 0x04; + ret |= 0x04; if (ide1->irqstat) - ret |= 0x02; + ret |= 0x02; if (ide0->irqstat) - ret |= 0x01; + ret |= 0x01; return ret; } - uint8_t ide_read_ali_76(void) { - ide_t *ide0, *ide1; - int ch0, ch1; + ide_t *ide0, *ide1; + int ch0, ch1; uint8_t ret = 0x00; - ch0 = ide_boards[0]->cur_dev; - ch1 = ide_boards[1]->cur_dev; + ch0 = ide_boards[0]->cur_dev; + ch1 = ide_boards[1]->cur_dev; ide0 = ide_drives[ch0]; ide1 = ide_drives[ch1]; if (ide1->atastat & BSY_STAT) - ret |= 0x40; + ret |= 0x40; if (ide1->atastat & DRQ_STAT) - ret |= 0x20; + ret |= 0x20; if (ide1->atastat & ERR_STAT) - ret |= 0x10; + ret |= 0x10; if (ide0->atastat & BSY_STAT) - ret |= 0x04; + ret |= 0x04; if (ide0->atastat & DRQ_STAT) - ret |= 0x02; + ret |= 0x02; if (ide0->atastat & ERR_STAT) - ret |= 0x01; + ret |= 0x01; return ret; } - void ide_set_handlers(uint8_t board) { if (ide_boards[board] == NULL) - return; + return; if (ide_boards[board]->base_main) { - io_sethandler(ide_boards[board]->base_main, 8, - ide_readb, ide_readw, ide_readl, - ide_writeb, ide_writew, ide_writel, - ide_boards[board]); + io_sethandler(ide_boards[board]->base_main, 8, + ide_readb, ide_readw, ide_readl, + ide_writeb, ide_writew, ide_writel, + ide_boards[board]); } if (ide_boards[board]->side_main) { - io_sethandler(ide_boards[board]->side_main, 1, - ide_read_alt_status, NULL, NULL, - ide_write_devctl, NULL, NULL, - ide_boards[board]); + io_sethandler(ide_boards[board]->side_main, 1, + ide_read_alt_status, NULL, NULL, + ide_write_devctl, NULL, NULL, + ide_boards[board]); } } - void ide_remove_handlers(uint8_t board) { if (ide_boards[board] == NULL) - return; + return; if (ide_boards[board]->base_main) { - io_removehandler(ide_boards[board]->base_main, 8, - ide_readb, ide_readw, ide_readl, - ide_writeb, ide_writew, ide_writel, - ide_boards[board]); + io_removehandler(ide_boards[board]->base_main, 8, + ide_readb, ide_readw, ide_readl, + ide_writeb, ide_writew, ide_writel, + ide_boards[board]); } if (ide_boards[board]->side_main) { - io_removehandler(ide_boards[board]->side_main, 1, - ide_read_alt_status, NULL, NULL, - ide_write_devctl, NULL, NULL, - ide_boards[board]); + io_removehandler(ide_boards[board]->side_main, 1, + ide_read_alt_status, NULL, NULL, + ide_write_devctl, NULL, NULL, + ide_boards[board]); } } - void ide_pri_enable(void) { ide_set_handlers(0); } - void ide_pri_disable(void) { ide_remove_handlers(0); } - void ide_sec_enable(void) { ide_set_handlers(1); } - void ide_sec_disable(void) { ide_remove_handlers(1); } - void ide_set_base(int board, uint16_t port) { ide_log("ide_set_base(%i, %04X)\n", board, port); if (ide_boards[board] == NULL) - return; + return; ide_boards[board]->base_main = port; } - void ide_set_side(int board, uint16_t port) { ide_log("ide_set_side(%i, %04X)\n", board, port); if (ide_boards[board] == NULL) - return; + return; ide_boards[board]->side_main = port; } - static void ide_clear_bus_master(int board) { if (ide_bm[board]) { - free(ide_bm[board]); - ide_bm[board] = NULL; + free(ide_bm[board]); + ide_bm[board] = NULL; } } - /* This so drives can be forced to ATA-3 (no DMA) for machines that hide the on-board PCI IDE controller (eg. Packard Bell PB640 and ASUS P/I-P54TP4XE), breaking DMA drivers unless this is done. */ extern void @@ -2732,23 +2672,22 @@ ide_board_set_force_ata3(int board, int force_ata3) { ide_log("ide_board_set_force_ata3(%i, %i)\n", board, force_ata3); - if ((ide_boards[board] == NULL)|| !ide_boards[board]->inited) - return; + if ((ide_boards[board] == NULL) || !ide_boards[board]->inited) + return; ide_boards[board]->force_ata3 = force_ata3; } - static void ide_board_close(int board) { ide_t *dev; - int c, d; + int c, d; ide_log("ide_board_close(%i)\n", board); - if ((ide_boards[board] == NULL)|| !ide_boards[board]->inited) - return; + if ((ide_boards[board] == NULL) || !ide_boards[board]->inited) + return; ide_log("IDE: Closing board %i...\n", board); @@ -2758,116 +2697,115 @@ ide_board_close(int board) /* Close hard disk image files (if previously open) */ for (d = 0; d < 2; d++) { - c = (board << 1) + d; + c = (board << 1) + d; - ide_boards[board]->ide[d] = NULL; + ide_boards[board]->ide[d] = NULL; - dev = ide_drives[c]; + dev = ide_drives[c]; - if (dev == NULL) - continue; + if (dev == NULL) + continue; - if ((dev->type == IDE_HDD) && (dev->hdd_num != -1)) - hdd_image_close(dev->hdd_num); + if ((dev->type == IDE_HDD) && (dev->hdd_num != -1)) + hdd_image_close(dev->hdd_num); - if (dev->type == IDE_ATAPI) - dev->sc->status = DRDY_STAT | DSC_STAT; + if (dev->type == IDE_ATAPI) + dev->sc->status = DRDY_STAT | DSC_STAT; - if (dev->buffer) { - free(dev->buffer); - dev->buffer = NULL; - } + if (dev->buffer) { + free(dev->buffer); + dev->buffer = NULL; + } - if (dev->sector_buffer) { - free(dev->sector_buffer); - dev->buffer = NULL; - } + if (dev->sector_buffer) { + free(dev->sector_buffer); + dev->buffer = NULL; + } - if (dev) { - free(dev); - ide_drives[c] = NULL; - } + if (dev) { + free(dev); + ide_drives[c] = NULL; + } } free(ide_boards[board]); ide_boards[board] = NULL; } - static void ide_board_setup(int board) { ide_t *dev; - int c, d; - int ch, is_ide, valid_ch; - int min_ch, max_ch; + int c, d; + int ch, is_ide, valid_ch; + int min_ch, max_ch; min_ch = (board << 1); max_ch = min_ch + 1; ide_log("IDE: board %i: loading disks...\n", board); for (d = 0; d < 2; d++) { - c = (board << 1) + d; - ide_zero(c); + c = (board << 1) + d; + ide_zero(c); } c = 0; for (d = 0; d < HDD_NUM; d++) { - is_ide = (hdd[d].bus == HDD_BUS_IDE); - ch = hdd[d].ide_channel; + is_ide = (hdd[d].bus == HDD_BUS_IDE); + ch = hdd[d].ide_channel; - if (board == 4) { - valid_ch = ((ch >= 0) && (ch <= 1)); - ch |= 8; - } else - valid_ch = ((ch >= min_ch) && (ch <= max_ch)); + if (board == 4) { + valid_ch = ((ch >= 0) && (ch <= 1)); + ch |= 8; + } else + valid_ch = ((ch >= min_ch) && (ch <= max_ch)); - if (is_ide && valid_ch) { - ide_log("Found IDE hard disk on channel %i\n", ch); - loadhd(ide_drives[ch], d, hdd[d].fn); - if (ide_drives[ch]->sector_buffer == NULL) - ide_drives[ch]->sector_buffer = (uint8_t *) malloc(256*512); - memset(ide_drives[ch]->sector_buffer, 0, 256*512); - if (++c >= 2) break; - } + if (is_ide && valid_ch) { + ide_log("Found IDE hard disk on channel %i\n", ch); + loadhd(ide_drives[ch], d, hdd[d].fn); + if (ide_drives[ch]->sector_buffer == NULL) + ide_drives[ch]->sector_buffer = (uint8_t *) malloc(256 * 512); + memset(ide_drives[ch]->sector_buffer, 0, 256 * 512); + if (++c >= 2) + break; + } } ide_log("IDE: board %i: done, loaded %d disks.\n", board, c); for (d = 0; d < 2; d++) { - c = (board << 1) + d; - dev = ide_drives[c]; + c = (board << 1) + d; + dev = ide_drives[c]; - if (dev->type == IDE_NONE) - continue; + if (dev->type == IDE_NONE) + continue; - ide_allocate_buffer(dev); + ide_allocate_buffer(dev); - ide_set_signature(dev); + ide_set_signature(dev); - dev->mdma_mode = (1 << ide_get_max(dev, TYPE_PIO)); - dev->error = 1; - if (dev->type != IDE_HDD) - dev->cfg_spt = dev->cfg_hpc = 0; + dev->mdma_mode = (1 << ide_get_max(dev, TYPE_PIO)); + dev->error = 1; + if (dev->type != IDE_HDD) + dev->cfg_spt = dev->cfg_hpc = 0; } } - static void ide_board_init(int board, int irq, int base_main, int side_main, int type) { ide_log("ide_board_init(%i, %i, %04X, %04X, %i)\n", board, irq, base_main, side_main, type); if ((ide_boards[board] != NULL) && ide_boards[board]->inited) - return; + return; ide_log("IDE: Initializing board %i...\n", board); ide_boards[board] = (ide_board_t *) malloc(sizeof(ide_board_t)); memset(ide_boards[board], 0, sizeof(ide_board_t)); - ide_boards[board]->irq = irq; + ide_boards[board]->irq = irq; ide_boards[board]->cur_dev = board << 1; if (type & 6) - ide_boards[board]->bit32 = 1; + ide_boards[board]->bit32 = 1; ide_boards[board]->base_main = base_main; ide_boards[board]->side_main = side_main; ide_set_handlers(board); @@ -2879,60 +2817,57 @@ ide_board_init(int board, int irq, int base_main, int side_main, int type) ide_boards[board]->inited = 1; } - void ide_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv) { intptr_t board = (intptr_t) priv; if (ld) - return; + return; if (ide_boards[board]->base_main || ide_boards[board]->side_main) { - ide_remove_handlers(board); - ide_boards[board]->base_main = ide_boards[board]->side_main = 0; + ide_remove_handlers(board); + ide_boards[board]->base_main = ide_boards[board]->side_main = 0; } ide_boards[board]->irq = -1; if (config->activate) { - ide_boards[board]->base_main = (config->io[0].base != ISAPNP_IO_DISABLED) ? config->io[0].base : 0x0000; - ide_boards[board]->side_main = (config->io[1].base != ISAPNP_IO_DISABLED) ? config->io[1].base : 0x0000; + ide_boards[board]->base_main = (config->io[0].base != ISAPNP_IO_DISABLED) ? config->io[0].base : 0x0000; + ide_boards[board]->side_main = (config->io[1].base != ISAPNP_IO_DISABLED) ? config->io[1].base : 0x0000; - if (ide_boards[board]->base_main && ide_boards[board]->side_main) - ide_set_handlers(board); + if (ide_boards[board]->base_main && ide_boards[board]->side_main) + ide_set_handlers(board); - if (config->irq[0].irq != ISAPNP_IRQ_DISABLED) - ide_boards[board]->irq = config->irq[0].irq; + if (config->irq[0].irq != ISAPNP_IRQ_DISABLED) + ide_boards[board]->irq = config->irq[0].irq; } } - static void * ide_ter_init(const device_t *info) { /* Don't claim this channel again if it was already claimed. */ if (ide_boards[2]) - return(NULL); + return (NULL); int irq; if (info->local) - irq = -2; + irq = -2; else - irq = device_get_config_int("irq"); + irq = device_get_config_int("irq"); if (irq < 0) { - ide_board_init(2, -1, 0, 0, 0); - if (irq == -1) - isapnp_add_card(ide_ter_pnp_rom, sizeof(ide_ter_pnp_rom), ide_pnp_config_changed, NULL, NULL, NULL, (void *) 2); + ide_board_init(2, -1, 0, 0, 0); + if (irq == -1) + isapnp_add_card(ide_ter_pnp_rom, sizeof(ide_ter_pnp_rom), ide_pnp_config_changed, NULL, NULL, NULL, (void *) 2); } else { - ide_board_init(2, irq, 0x168, 0x36e, 0); + ide_board_init(2, irq, 0x168, 0x36e, 0); } - return(ide_boards[2]); + return (ide_boards[2]); } - /* Close a standalone IDE unit. */ static void ide_ter_close(void *priv) @@ -2940,32 +2875,30 @@ ide_ter_close(void *priv) ide_board_close(2); } - static void * ide_qua_init(const device_t *info) { /* Don't claim this channel again if it was already claimed. */ if (ide_boards[3]) - return(NULL); + return (NULL); int irq; if (info->local) - irq = -2; + irq = -2; else - irq = device_get_config_int("irq"); + irq = device_get_config_int("irq"); if (irq < 0) { - ide_board_init(3, -1, 0, 0, 0); - if (irq == -1) - isapnp_add_card(ide_qua_pnp_rom, sizeof(ide_qua_pnp_rom), ide_pnp_config_changed, NULL, NULL, NULL, (void *) 3); + ide_board_init(3, -1, 0, 0, 0); + if (irq == -1) + isapnp_add_card(ide_qua_pnp_rom, sizeof(ide_qua_pnp_rom), ide_pnp_config_changed, NULL, NULL, NULL, (void *) 3); } else { - ide_board_init(3, irq, 0x1e8, 0x3ee, 0); + ide_board_init(3, irq, 0x1e8, 0x3ee, 0); } - return(ide_boards[3]); + return (ide_boards[3]); } - /* Close a standalone IDE unit. */ static void ide_qua_close(void *priv) @@ -2973,7 +2906,6 @@ ide_qua_close(void *priv) ide_board_close(3); } - void * ide_xtide_init(void) { @@ -2982,78 +2914,73 @@ ide_xtide_init(void) return ide_boards[0]; } - void ide_xtide_close(void) { ide_board_close(0); } - void ide_set_bus_master(int board, - int (*dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv), - void (*set_irq)(int channel, void *priv), void *priv) + int (*dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv), + void (*set_irq)(int channel, void *priv), void *priv) { if (ide_bm[board] == NULL) - ide_bm[board] = (ide_bm_t *) malloc(sizeof(ide_bm_t)); + ide_bm[board] = (ide_bm_t *) malloc(sizeof(ide_bm_t)); - ide_bm[board]->dma = dma; + ide_bm[board]->dma = dma; ide_bm[board]->set_irq = set_irq; - ide_bm[board]->priv = priv; + ide_bm[board]->priv = priv; } - static void * ide_init(const device_t *info) { ide_log("Initializing IDE...\n"); - switch(info->local) { - case 0: /* ISA, single-channel */ - case 1: /* ISA, dual-channel */ - case 2: /* VLB, single-channel */ - case 3: /* VLB, dual-channel */ - case 4: /* PCI, single-channel */ - case 5: /* PCI, dual-channel */ - ide_board_init(0, 14, 0x1f0, 0x3f6, info->local); + switch (info->local) { + case 0: /* ISA, single-channel */ + case 1: /* ISA, dual-channel */ + case 2: /* VLB, single-channel */ + case 3: /* VLB, dual-channel */ + case 4: /* PCI, single-channel */ + case 5: /* PCI, dual-channel */ + ide_board_init(0, 14, 0x1f0, 0x3f6, info->local); - if (info->local & 1) - ide_board_init(1, 15, 0x170, 0x376, info->local); - break; + if (info->local & 1) + ide_board_init(1, 15, 0x170, 0x376, info->local); + break; } - return(ide_drives); + return (ide_drives); } - static void ide_drive_reset(int d) { ide_log("Resetting IDE drive %i...\n", d); - ide_drives[d]->channel = d; - ide_drives[d]->atastat = DRDY_STAT | DSC_STAT; - ide_drives[d]->service = 0; - ide_drives[d]->board = d >> 1; + ide_drives[d]->channel = d; + ide_drives[d]->atastat = DRDY_STAT | DSC_STAT; + ide_drives[d]->service = 0; + ide_drives[d]->board = d >> 1; ide_drives[d]->selected = !(d & 1); timer_stop(&ide_drives[d]->timer); if (ide_boards[d >> 1]) { - ide_boards[d >> 1]->cur_dev = d & ~1; - timer_stop(&ide_boards[d >> 1]->timer); + ide_boards[d >> 1]->cur_dev = d & ~1; + timer_stop(&ide_boards[d >> 1]->timer); } ide_set_signature(ide_drives[d]); if (ide_drives[d]->sector_buffer) - memset(ide_drives[d]->sector_buffer, 0, 256*512); + memset(ide_drives[d]->sector_buffer, 0, 256 * 512); if (ide_drives[d]->buffer) - memset(ide_drives[d]->buffer, 0, 65536 * sizeof(uint16_t)); + memset(ide_drives[d]->buffer, 0, 65536 * sizeof(uint16_t)); } - static void ide_board_reset(int board) { @@ -3067,10 +2994,9 @@ ide_board_reset(int board) max = min + 2; for (d = min; d < max; d++) - ide_drive_reset(d); + ide_drive_reset(d); } - /* Reset a standalone IDE unit. */ static void ide_reset(void *p) @@ -3078,13 +3004,12 @@ ide_reset(void *p) ide_log("Resetting IDE...\n"); if (ide_boards[0] != NULL) - ide_board_reset(0); + ide_board_reset(0); if (ide_boards[1] != NULL) - ide_board_reset(1); + ide_board_reset(1); } - /* Close a standalone IDE unit. */ static void ide_close(void *priv) @@ -3092,98 +3017,98 @@ ide_close(void *priv) ide_log("Closing IDE...\n"); if (ide_boards[0] != NULL) { - ide_board_close(0); - ide_boards[0] = NULL; + ide_board_close(0); + ide_boards[0] = NULL; } if (ide_boards[1] != NULL) { - ide_board_close(1); - ide_boards[1] = NULL; + ide_board_close(1); + ide_boards[1] = NULL; } } const device_t ide_isa_device = { - .name = "ISA PC/AT IDE Controller", + .name = "ISA PC/AT IDE Controller", .internal_name = "ide_isa", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 0, - .init = ide_init, - .close = ide_close, - .reset = ide_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 0, + .init = ide_init, + .close = ide_close, + .reset = ide_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ide_isa_2ch_device = { - .name = "ISA PC/AT IDE Controller (Dual-Channel)", + .name = "ISA PC/AT IDE Controller (Dual-Channel)", .internal_name = "ide_isa_2ch", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 1, - .init = ide_init, - .close = ide_close, - .reset = ide_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 1, + .init = ide_init, + .close = ide_close, + .reset = ide_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ide_vlb_device = { - .name = "VLB IDE Controller", + .name = "VLB IDE Controller", .internal_name = "ide_vlb", - .flags = DEVICE_VLB | DEVICE_AT, - .local = 2, - .init = ide_init, - .close = ide_close, - .reset = ide_reset, + .flags = DEVICE_VLB | DEVICE_AT, + .local = 2, + .init = ide_init, + .close = ide_close, + .reset = ide_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ide_vlb_2ch_device = { - .name = "VLB IDE Controller (Dual-Channel)", + .name = "VLB IDE Controller (Dual-Channel)", .internal_name = "ide_vlb_2ch", - .flags = DEVICE_VLB | DEVICE_AT, - .local = 3, - .init = ide_init, - .close = ide_close, - .reset = ide_reset, + .flags = DEVICE_VLB | DEVICE_AT, + .local = 3, + .init = ide_init, + .close = ide_close, + .reset = ide_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ide_pci_device = { - .name = "PCI IDE Controller", + .name = "PCI IDE Controller", .internal_name = "ide_pci", - .flags = DEVICE_PCI | DEVICE_AT, - .local = 4, - .init = ide_init, - .close = ide_close, - .reset = ide_reset, + .flags = DEVICE_PCI | DEVICE_AT, + .local = 4, + .init = ide_init, + .close = ide_close, + .reset = ide_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ide_pci_2ch_device = { - .name = "PCI IDE Controller (Dual-Channel)", + .name = "PCI IDE Controller (Dual-Channel)", .internal_name = "ide_pci_2ch", - .flags = DEVICE_PCI | DEVICE_AT, - .local = 5, - .init = ide_init, - .close = ide_close, - .reset = ide_reset, + .flags = DEVICE_PCI | DEVICE_AT, + .local = 5, + .init = ide_init, + .close = ide_close, + .reset = ide_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; // clang-format off @@ -3241,57 +3166,57 @@ static const device_config_t ide_qua_config[] = { // clang-format on const device_t ide_ter_device = { - .name = "Tertiary IDE Controller", + .name = "Tertiary IDE Controller", .internal_name = "ide_ter", - .flags = DEVICE_AT, - .local = 0, - .init = ide_ter_init, - .close = ide_ter_close, - .reset = NULL, + .flags = DEVICE_AT, + .local = 0, + .init = ide_ter_init, + .close = ide_ter_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ide_ter_config + .force_redraw = NULL, + .config = ide_ter_config }; const device_t ide_ter_pnp_device = { - .name = "Tertiary IDE Controller (Plug and Play only)", + .name = "Tertiary IDE Controller (Plug and Play only)", .internal_name = "ide_ter_pnp", - .flags = DEVICE_AT, - .local = 1, - .init = ide_ter_init, - .close = ide_ter_close, - .reset = NULL, + .flags = DEVICE_AT, + .local = 1, + .init = ide_ter_init, + .close = ide_ter_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ide_qua_device = { - .name = "Quaternary IDE Controller", + .name = "Quaternary IDE Controller", .internal_name = "ide_qua", - .flags = DEVICE_AT, - .local = 0, - .init = ide_qua_init, - .close = ide_qua_close, - .reset = NULL, + .flags = DEVICE_AT, + .local = 0, + .init = ide_qua_init, + .close = ide_qua_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ide_qua_config + .force_redraw = NULL, + .config = ide_qua_config }; const device_t ide_qua_pnp_device = { - .name = "Quaternary IDE Controller (Plug and Play only)", + .name = "Quaternary IDE Controller (Plug and Play only)", .internal_name = "ide_qua_pnp", - .flags = DEVICE_AT, - .local = 1, - .init = ide_qua_init, - .close = ide_qua_close, - .reset = NULL, + .flags = DEVICE_AT, + .local = 1, + .init = ide_qua_init, + .close = ide_qua_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ide_qua_config + .force_redraw = NULL, + .config = ide_qua_config }; diff --git a/src/disk/hdc_ide_cmd640.c b/src/disk/hdc_ide_cmd640.c index 79c6e4f97..4cd323a88 100644 --- a/src/disk/hdc_ide_cmd640.c +++ b/src/disk/hdc_ide_cmd640.c @@ -37,20 +37,17 @@ #include <86box/zip.h> #include <86box/mo.h> - typedef struct { - uint8_t vlb_idx, id, - in_cfg, single_channel, - pci, regs[256]; - uint32_t local; - int slot, irq_mode[2], - irq_pin, irq_line; + uint8_t vlb_idx, id, + in_cfg, single_channel, + pci, regs[256]; + uint32_t local; + int slot, irq_mode[2], + irq_pin, irq_line; } cmd640_t; - -static int next_id = 0; - +static int next_id = 0; #ifdef ENABLE_CMD640_LOG int cmd640_do_log = ENABLE_CMD640_LOG; @@ -59,51 +56,48 @@ cmd640_log(const char *fmt, ...) { va_list ap; - if (cmd640_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + if (cmd640_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define cmd640_log(fmt, ...) +# define cmd640_log(fmt, ...) #endif - void cmd640_set_irq(int channel, void *priv) { cmd640_t *dev = (cmd640_t *) priv; - int irq = !!(channel & 0x40); + int irq = !!(channel & 0x40); if (channel & 0x01) { - if (!(dev->regs[0x57] & 0x10) || (channel & 0x40)) { - dev->regs[0x57] &= ~0x10; - dev->regs[0x57] |= (channel >> 2); - } + if (!(dev->regs[0x57] & 0x10) || (channel & 0x40)) { + dev->regs[0x57] &= ~0x10; + dev->regs[0x57] |= (channel >> 2); + } } else { - if (!(dev->regs[0x50] & 0x04) || (channel & 0x40)) { - dev->regs[0x50] &= ~0x04; - dev->regs[0x50] |= (channel >> 4); - } + if (!(dev->regs[0x50] & 0x04) || (channel & 0x40)) { + dev->regs[0x50] &= ~0x04; + dev->regs[0x50] |= (channel >> 4); + } } channel &= 0x01; if (irq) { - if (dev->irq_mode[channel] == 1) - pci_set_irq(dev->slot, dev->irq_pin); - else - picint(1 << (14 + channel)); + if (dev->irq_mode[channel] == 1) + pci_set_irq(dev->slot, dev->irq_pin); + else + picint(1 << (14 + channel)); } else { - if (dev->irq_mode[channel] == 1) - pci_clear_irq(dev->slot, dev->irq_pin); - else - picintc(1 << (14 + channel)); + if (dev->irq_mode[channel] == 1) + pci_clear_irq(dev->slot, dev->irq_pin); + else + picintc(1 << (14 + channel)); } } - static void cmd640_ide_handlers(cmd640_t *dev) { @@ -112,65 +106,67 @@ cmd640_ide_handlers(cmd640_t *dev) ide_pri_disable(); if ((dev->regs[0x09] & 0x01) && (dev->regs[0x50] & 0x40)) { - main = (dev->regs[0x11] << 8) | (dev->regs[0x10] & 0xf8); - side = ((dev->regs[0x15] << 8) | (dev->regs[0x14] & 0xfc)) + 2; + main = (dev->regs[0x11] << 8) | (dev->regs[0x10] & 0xf8); + side = ((dev->regs[0x15] << 8) | (dev->regs[0x14] & 0xfc)) + 2; } else { - main = 0x1f0; - side = 0x3f6; + main = 0x1f0; + side = 0x3f6; } ide_set_base(0, main); ide_set_side(0, side); if (dev->regs[0x04] & 0x01) - ide_pri_enable(); + ide_pri_enable(); if (dev->single_channel) - return; + return; ide_sec_disable(); if ((dev->regs[0x09] & 0x04) && (dev->regs[0x50] & 0x40)) { - main = (dev->regs[0x19] << 8) | (dev->regs[0x18] & 0xf8); - side = ((dev->regs[0x1d] << 8) | (dev->regs[0x1c] & 0xfc)) + 2; + main = (dev->regs[0x19] << 8) | (dev->regs[0x18] & 0xf8); + side = ((dev->regs[0x1d] << 8) | (dev->regs[0x1c] & 0xfc)) + 2; } else { - main = 0x170; - side = 0x376; + main = 0x170; + side = 0x376; } ide_set_base(1, main); ide_set_side(1, side); if ((dev->regs[0x04] & 0x01) && (dev->regs[0x51] & 0x08)) - ide_sec_enable(); + ide_sec_enable(); } - static void cmd640_common_write(int addr, uint8_t val, cmd640_t *dev) { switch (addr) { - case 0x51: - dev->regs[addr] = val; - cmd640_ide_handlers(dev); - break; - case 0x52: case 0x54: case 0x56: case 0x58: - case 0x59: - dev->regs[addr] = val; - break; - case 0x53: case 0x55: - dev->regs[addr] = val & 0xc0; - break; - case 0x57: - dev->regs[addr] = val & 0xdc; - break; - case 0x5b: /* Undocumented register that Linux attempts to use! */ - dev->regs[addr] = val; - break; + case 0x51: + dev->regs[addr] = val; + cmd640_ide_handlers(dev); + break; + case 0x52: + case 0x54: + case 0x56: + case 0x58: + case 0x59: + dev->regs[addr] = val; + break; + case 0x53: + case 0x55: + dev->regs[addr] = val & 0xc0; + break; + case 0x57: + dev->regs[addr] = val & 0xdc; + break; + case 0x5b: /* Undocumented register that Linux attempts to use! */ + dev->regs[addr] = val; + break; } } - static void cmd640_vlb_write(uint16_t addr, uint8_t val, void *priv) { @@ -179,21 +175,20 @@ cmd640_vlb_write(uint16_t addr, uint8_t val, void *priv) addr &= 0x00ff; switch (addr) { - case 0x0078: - if (dev->in_cfg) - dev->vlb_idx = val; - else if ((dev->regs[0x50] & 0x80) && (val == dev->id)) - dev->in_cfg = 1; - break; - case 0x007c: - cmd640_common_write(dev->vlb_idx, val, dev); - if (dev->regs[0x50] & 0x80) - dev->in_cfg = 0; - break; + case 0x0078: + if (dev->in_cfg) + dev->vlb_idx = val; + else if ((dev->regs[0x50] & 0x80) && (val == dev->id)) + dev->in_cfg = 1; + break; + case 0x007c: + cmd640_common_write(dev->vlb_idx, val, dev); + if (dev->regs[0x50] & 0x80) + dev->in_cfg = 0; + break; } } - static void cmd640_vlb_writew(uint16_t addr, uint16_t val, void *priv) { @@ -201,7 +196,6 @@ cmd640_vlb_writew(uint16_t addr, uint16_t val, void *priv) cmd640_vlb_write(addr + 1, val >> 8, priv); } - static void cmd640_vlb_writel(uint16_t addr, uint32_t val, void *priv) { @@ -209,35 +203,33 @@ cmd640_vlb_writel(uint16_t addr, uint32_t val, void *priv) cmd640_vlb_writew(addr + 2, val >> 16, priv); } - static uint8_t cmd640_vlb_read(uint16_t addr, void *priv) { - uint8_t ret = 0xff; + uint8_t ret = 0xff; cmd640_t *dev = (cmd640_t *) priv; addr &= 0x00ff; switch (addr) { - case 0x0078: - if (dev->in_cfg) - ret = dev->vlb_idx; - break; - case 0x007c: - ret = dev->regs[dev->vlb_idx]; - if (dev->vlb_idx == 0x50) - dev->regs[0x50] &= ~0x04; - else if (dev->vlb_idx == 0x57) - dev->regs[0x57] &= ~0x10; - if (dev->regs[0x50] & 0x80) - dev->in_cfg = 0; - break; + case 0x0078: + if (dev->in_cfg) + ret = dev->vlb_idx; + break; + case 0x007c: + ret = dev->regs[dev->vlb_idx]; + if (dev->vlb_idx == 0x50) + dev->regs[0x50] &= ~0x04; + else if (dev->vlb_idx == 0x57) + dev->regs[0x57] &= ~0x10; + if (dev->regs[0x50] & 0x80) + dev->in_cfg = 0; + break; } return ret; } - static uint16_t cmd640_vlb_readw(uint16_t addr, void *priv) { @@ -249,7 +241,6 @@ cmd640_vlb_readw(uint16_t addr, void *priv) return ret; } - static uint32_t cmd640_vlb_readl(uint16_t addr, void *priv) { @@ -261,7 +252,6 @@ cmd640_vlb_readl(uint16_t addr, void *priv) return ret; } - static void cmd640_pci_write(int func, int addr, uint8_t val, void *priv) { @@ -269,89 +259,89 @@ cmd640_pci_write(int func, int addr, uint8_t val, void *priv) cmd640_log("cmd640_pci_write(%i, %02X, %02X)\n", func, addr, val); - if (func == 0x00) switch (addr) { - case 0x04: - dev->regs[addr] = (val & 0x41); - cmd640_ide_handlers(dev); - break; - case 0x07: - dev->regs[addr] &= ~(val & 0x80); - break; - case 0x09: - if ((dev->regs[addr] & 0x0a) == 0x0a) { - dev->regs[addr] = (dev->regs[addr] & 0x0a) | (val & 0x05); - dev->irq_mode[0] = !!(val & 0x01); - dev->irq_mode[1] = !!(val & 0x04); - cmd640_ide_handlers(dev); - } - break; - case 0x10: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x10] = (val & 0xf8) | 1; - cmd640_ide_handlers(dev); - } - break; - case 0x11: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x11] = val; - cmd640_ide_handlers(dev); - } - break; - case 0x14: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x14] = (val & 0xfc) | 1; - cmd640_ide_handlers(dev); - } - break; - case 0x15: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x15] = val; - cmd640_ide_handlers(dev); - } - break; - case 0x18: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x18] = (val & 0xf8) | 1; - cmd640_ide_handlers(dev); - } - break; - case 0x19: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x19] = val; - cmd640_ide_handlers(dev); - } - break; - case 0x1c: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x1c] = (val & 0xfc) | 1; - cmd640_ide_handlers(dev); - } - break; - case 0x1d: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x1d] = val; - cmd640_ide_handlers(dev); - } - break; - default: - cmd640_common_write(addr, val, dev); - break; - } + if (func == 0x00) + switch (addr) { + case 0x04: + dev->regs[addr] = (val & 0x41); + cmd640_ide_handlers(dev); + break; + case 0x07: + dev->regs[addr] &= ~(val & 0x80); + break; + case 0x09: + if ((dev->regs[addr] & 0x0a) == 0x0a) { + dev->regs[addr] = (dev->regs[addr] & 0x0a) | (val & 0x05); + dev->irq_mode[0] = !!(val & 0x01); + dev->irq_mode[1] = !!(val & 0x04); + cmd640_ide_handlers(dev); + } + break; + case 0x10: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x10] = (val & 0xf8) | 1; + cmd640_ide_handlers(dev); + } + break; + case 0x11: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x11] = val; + cmd640_ide_handlers(dev); + } + break; + case 0x14: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x14] = (val & 0xfc) | 1; + cmd640_ide_handlers(dev); + } + break; + case 0x15: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x15] = val; + cmd640_ide_handlers(dev); + } + break; + case 0x18: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x18] = (val & 0xf8) | 1; + cmd640_ide_handlers(dev); + } + break; + case 0x19: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x19] = val; + cmd640_ide_handlers(dev); + } + break; + case 0x1c: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x1c] = (val & 0xfc) | 1; + cmd640_ide_handlers(dev); + } + break; + case 0x1d: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x1d] = val; + cmd640_ide_handlers(dev); + } + break; + default: + cmd640_common_write(addr, val, dev); + break; + } } - static uint8_t cmd640_pci_read(int func, int addr, void *priv) { cmd640_t *dev = (cmd640_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (func == 0x00) { - ret = dev->regs[addr]; - if (addr == 0x50) - dev->regs[0x50] &= ~0x04; - else if (addr == 0x57) - dev->regs[0x57] &= ~0x10; + ret = dev->regs[addr]; + if (addr == 0x50) + dev->regs[0x50] &= ~0x04; + else if (addr == 0x57) + dev->regs[0x57] &= ~0x10; } cmd640_log("cmd640_pci_read(%i, %02X, %02X)\n", func, addr, ret); @@ -359,84 +349,83 @@ cmd640_pci_read(int func, int addr, void *priv) return ret; } - static void cmd640_reset(void *priv) { cmd640_t *dev = (cmd640_t *) priv; - int i = 0; + int i = 0; for (i = 0; i < CDROM_NUM; i++) { - if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && - (cdrom[i].ide_channel < 4) && cdrom[i].priv) - scsi_cdrom_reset((scsi_common_t *) cdrom[i].priv); + if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && (cdrom[i].ide_channel < 4) && cdrom[i].priv) + scsi_cdrom_reset((scsi_common_t *) cdrom[i].priv); } for (i = 0; i < ZIP_NUM; i++) { - if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && - (zip_drives[i].ide_channel < 4) && zip_drives[i].priv) - zip_reset((scsi_common_t *) zip_drives[i].priv); + if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && (zip_drives[i].ide_channel < 4) && zip_drives[i].priv) + zip_reset((scsi_common_t *) zip_drives[i].priv); + } + for (i = 0; i < MO_NUM; i++) { + if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && (mo_drives[i].ide_channel < 4) && mo_drives[i].priv) + mo_reset((scsi_common_t *) mo_drives[i].priv); } - for (i = 0; i < MO_NUM; i++) { - if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && - (mo_drives[i].ide_channel < 4) && mo_drives[i].priv) - mo_reset((scsi_common_t *) mo_drives[i].priv); - } cmd640_set_irq(0x00, priv); cmd640_set_irq(0x01, priv); memset(dev->regs, 0x00, sizeof(dev->regs)); - dev->regs[0x50] = 0x02; /* Revision 02 */ - dev->regs[0x50] |= (dev->id << 3); /* Device ID: 00 = 60h, 01 = 61h, 10 = 62h, 11 = 63h */ + dev->regs[0x50] = 0x02; /* Revision 02 */ + dev->regs[0x50] |= (dev->id << 3); /* Device ID: 00 = 60h, 01 = 61h, 10 = 62h, 11 = 63h */ dev->regs[0x59] = 0x40; if (dev->pci) { - cmd640_log("dev->local = %08X\n", dev->local); - if ((dev->local & 0xffff) == 0x0a) { - dev->regs[0x50] |= 0x40; /* Enable Base address register R/W; - If 0, they return 0 and are read-only 8 */ - } + cmd640_log("dev->local = %08X\n", dev->local); + if ((dev->local & 0xffff) == 0x0a) { + dev->regs[0x50] |= 0x40; /* Enable Base address register R/W; + If 0, they return 0 and are read-only 8 */ + } - dev->regs[0x00] = 0x95; /* CMD */ - dev->regs[0x01] = 0x10; - dev->regs[0x02] = 0x40; /* PCI-0640B */ - dev->regs[0x03] = 0x06; - dev->regs[0x04] = 0x01; /* Apparently required by the ASUS PCI/I-P5SP4 AND PCI/I-P54SP4 */ - dev->regs[0x07] = 0x02; /* DEVSEL timing: 01 medium */ - dev->regs[0x08] = 0x02; /* Revision 02 */ - dev->regs[0x09] = dev->local; /* Programming interface */ - dev->regs[0x0a] = 0x01; /* IDE controller */ - dev->regs[0x0b] = 0x01; /* Mass storage controller */ + dev->regs[0x00] = 0x95; /* CMD */ + dev->regs[0x01] = 0x10; + dev->regs[0x02] = 0x40; /* PCI-0640B */ + dev->regs[0x03] = 0x06; + dev->regs[0x04] = 0x01; /* Apparently required by the ASUS PCI/I-P5SP4 AND PCI/I-P54SP4 */ + dev->regs[0x07] = 0x02; /* DEVSEL timing: 01 medium */ + dev->regs[0x08] = 0x02; /* Revision 02 */ + dev->regs[0x09] = dev->local; /* Programming interface */ + dev->regs[0x0a] = 0x01; /* IDE controller */ + dev->regs[0x0b] = 0x01; /* Mass storage controller */ - /* Base addresses (1F0, 3F4, 170, 374) */ - if (dev->regs[0x50] & 0x40) { - dev->regs[0x10] = 0xf1; dev->regs[0x11] = 0x01; - dev->regs[0x14] = 0xf5; dev->regs[0x15] = 0x03; - dev->regs[0x18] = 0x71; dev->regs[0x19] = 0x01; - dev->regs[0x1c] = 0x75; dev->regs[0x1d] = 0x03; - } + /* Base addresses (1F0, 3F4, 170, 374) */ + if (dev->regs[0x50] & 0x40) { + dev->regs[0x10] = 0xf1; + dev->regs[0x11] = 0x01; + dev->regs[0x14] = 0xf5; + dev->regs[0x15] = 0x03; + dev->regs[0x18] = 0x71; + dev->regs[0x19] = 0x01; + dev->regs[0x1c] = 0x75; + dev->regs[0x1d] = 0x03; + } - dev->regs[0x3c] = 0x14; /* IRQ 14 */ - dev->regs[0x3d] = 0x01; /* INTA */ + dev->regs[0x3c] = 0x14; /* IRQ 14 */ + dev->regs[0x3d] = 0x01; /* INTA */ - dev->irq_mode[0] = dev->irq_mode[1] = 0; - dev->irq_pin = PCI_INTA; - dev->irq_line = 14; + dev->irq_mode[0] = dev->irq_mode[1] = 0; + dev->irq_pin = PCI_INTA; + dev->irq_line = 14; } else { - if ((dev->local & 0xffff) == 0x0078) - dev->regs[0x50] |= 0x20; /* 0 = 178h, 17Ch; 1 = 078h, 07Ch */ + if ((dev->local & 0xffff) == 0x0078) + dev->regs[0x50] |= 0x20; /* 0 = 178h, 17Ch; 1 = 078h, 07Ch */ - /* If bit 7 is 1, then device ID has to be written on port x78h before - accessing the configuration registers */ - dev->in_cfg = 1; /* Configuration registers are accessible */ + /* If bit 7 is 1, then device ID has to be written on port x78h before + accessing the configuration registers */ + dev->in_cfg = 1; /* Configuration registers are accessible */ } cmd640_ide_handlers(dev); } - static void cmd640_close(void *priv) { @@ -447,7 +436,6 @@ cmd640_close(void *priv) next_id = 0; } - static void * cmd640_init(const device_t *info) { @@ -456,30 +444,30 @@ cmd640_init(const device_t *info) dev->id = next_id | 0x60; - dev->pci = !!(info->flags & DEVICE_PCI); + dev->pci = !!(info->flags & DEVICE_PCI); dev->local = info->local; if (info->flags & DEVICE_PCI) { - device_add(&ide_pci_2ch_device); + device_add(&ide_pci_2ch_device); - dev->slot = pci_add_card(PCI_ADD_IDE, cmd640_pci_read, cmd640_pci_write, dev); + dev->slot = pci_add_card(PCI_ADD_IDE, cmd640_pci_read, cmd640_pci_write, dev); - ide_set_bus_master(0, NULL, cmd640_set_irq, dev); - ide_set_bus_master(1, NULL, cmd640_set_irq, dev); + ide_set_bus_master(0, NULL, cmd640_set_irq, dev); + ide_set_bus_master(1, NULL, cmd640_set_irq, dev); - /* The CMD PCI-0640B IDE controller has no DMA capability, - so set our devices IDE devices to force ATA-3 (no DMA). */ - ide_board_set_force_ata3(0, 1); - ide_board_set_force_ata3(1, 1); + /* The CMD PCI-0640B IDE controller has no DMA capability, + so set our devices IDE devices to force ATA-3 (no DMA). */ + ide_board_set_force_ata3(0, 1); + ide_board_set_force_ata3(1, 1); - // ide_pri_disable(); + // ide_pri_disable(); } else if (info->flags & DEVICE_VLB) { - device_add(&ide_vlb_2ch_device); + device_add(&ide_vlb_2ch_device); - io_sethandler(info->local & 0xffff, 0x0008, - cmd640_vlb_read, cmd640_vlb_readw, cmd640_vlb_readl, - cmd640_vlb_write, cmd640_vlb_writew, cmd640_vlb_writel, - dev); + io_sethandler(info->local & 0xffff, 0x0008, + cmd640_vlb_read, cmd640_vlb_readw, cmd640_vlb_readl, + cmd640_vlb_write, cmd640_vlb_writew, cmd640_vlb_writel, + dev); } dev->single_channel = !!(info->local & 0x20000); @@ -492,71 +480,71 @@ cmd640_init(const device_t *info) } const device_t ide_cmd640_vlb_device = { - .name = "CMD PCI-0640B VLB", + .name = "CMD PCI-0640B VLB", .internal_name = "ide_cmd640_vlb", - .flags = DEVICE_VLB, - .local = 0x0078, - .init = cmd640_init, - .close = cmd640_close, - .reset = cmd640_reset, + .flags = DEVICE_VLB, + .local = 0x0078, + .init = cmd640_init, + .close = cmd640_close, + .reset = cmd640_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ide_cmd640_vlb_178_device = { - .name = "CMD PCI-0640B VLB (Port 178h)", + .name = "CMD PCI-0640B VLB (Port 178h)", .internal_name = "ide_cmd640_vlb_178", - .flags = DEVICE_VLB, - .local = 0x0178, - .init = cmd640_init, - .close = cmd640_close, - .reset = cmd640_reset, + .flags = DEVICE_VLB, + .local = 0x0178, + .init = cmd640_init, + .close = cmd640_close, + .reset = cmd640_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ide_cmd640_pci_device = { - .name = "CMD PCI-0640B PCI", + .name = "CMD PCI-0640B PCI", .internal_name = "ide_cmd640_pci", - .flags = DEVICE_PCI, - .local = 0x0a, - .init = cmd640_init, - .close = cmd640_close, - .reset = cmd640_reset, + .flags = DEVICE_PCI, + .local = 0x0a, + .init = cmd640_init, + .close = cmd640_close, + .reset = cmd640_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ide_cmd640_pci_legacy_only_device = { - .name = "CMD PCI-0640B PCI (Legacy Mode Only)", + .name = "CMD PCI-0640B PCI (Legacy Mode Only)", .internal_name = "ide_cmd640_pci_legacy_only", - .flags = DEVICE_PCI, - .local = 0x00, - .init = cmd640_init, - .close = cmd640_close, - .reset = cmd640_reset, + .flags = DEVICE_PCI, + .local = 0x00, + .init = cmd640_init, + .close = cmd640_close, + .reset = cmd640_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ide_cmd640_pci_single_channel_device = { - .name = "CMD PCI-0640B PCI", + .name = "CMD PCI-0640B PCI", .internal_name = "ide_cmd640_pci_single_channel", - .flags = DEVICE_PCI, - .local = 0x2000a, - .init = cmd640_init, - .close = cmd640_close, - .reset = cmd640_reset, + .flags = DEVICE_PCI, + .local = 0x2000a, + .init = cmd640_init, + .close = cmd640_close, + .reset = cmd640_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/disk/hdc_ide_cmd646.c b/src/disk/hdc_ide_cmd646.c index da721f3b6..d03474af5 100644 --- a/src/disk/hdc_ide_cmd646.c +++ b/src/disk/hdc_ide_cmd646.c @@ -37,18 +37,16 @@ #include <86box/zip.h> #include <86box/mo.h> - typedef struct { - uint8_t vlb_idx, single_channel, - in_cfg, regs[256]; - uint32_t local; - int slot, irq_mode[2], - irq_pin; - sff8038i_t *bm[2]; + uint8_t vlb_idx, single_channel, + in_cfg, regs[256]; + uint32_t local; + int slot, irq_mode[2], + irq_pin; + sff8038i_t *bm[2]; } cmd646_t; - #ifdef ENABLE_CMD646_LOG int cmd646_do_log = ENABLE_CMD646_LOG; static void @@ -56,39 +54,36 @@ cmd646_log(const char *fmt, ...) { va_list ap; - if (cmd646_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + if (cmd646_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define cmd646_log(fmt, ...) +# define cmd646_log(fmt, ...) #endif - static void cmd646_set_irq(int channel, void *priv) { cmd646_t *dev = (cmd646_t *) priv; if (channel & 0x01) { - if (!(dev->regs[0x57] & 0x10) || (channel & 0x40)) { - dev->regs[0x57] &= ~0x10; - dev->regs[0x57] |= (channel >> 2); - } + if (!(dev->regs[0x57] & 0x10) || (channel & 0x40)) { + dev->regs[0x57] &= ~0x10; + dev->regs[0x57] |= (channel >> 2); + } } else { - if (!(dev->regs[0x50] & 0x04) || (channel & 0x40)) { - dev->regs[0x50] &= ~0x04; - dev->regs[0x50] |= (channel >> 4); - } + if (!(dev->regs[0x50] & 0x04) || (channel & 0x40)) { + dev->regs[0x50] &= ~0x04; + dev->regs[0x50] |= (channel >> 4); + } } sff_bus_master_set_irq(channel, dev->bm[channel & 0x01]); } - static int cmd646_bus_master_dma(int channel, uint8_t *data, int transfer_length, int out, void *priv) { @@ -97,63 +92,60 @@ cmd646_bus_master_dma(int channel, uint8_t *data, int transfer_length, int out, return sff_bus_master_dma(channel, data, transfer_length, out, dev->bm[channel & 0x01]); } - static void cmd646_ide_handlers(cmd646_t *dev) { uint16_t main, side; - int irq_mode[2] = { 0, 0 }; + int irq_mode[2] = { 0, 0 }; ide_pri_disable(); if ((dev->regs[0x09] & 0x01) && (dev->regs[0x50] & 0x40)) { - main = (dev->regs[0x11] << 8) | (dev->regs[0x10] & 0xf8); - side = ((dev->regs[0x15] << 8) | (dev->regs[0x14] & 0xfc)) + 2; + main = (dev->regs[0x11] << 8) | (dev->regs[0x10] & 0xf8); + side = ((dev->regs[0x15] << 8) | (dev->regs[0x14] & 0xfc)) + 2; } else { - main = 0x1f0; - side = 0x3f6; + main = 0x1f0; + side = 0x3f6; } ide_set_base(0, main); ide_set_side(0, side); if (dev->regs[0x09] & 0x01) - irq_mode[0] = 1; + irq_mode[0] = 1; sff_set_irq_mode(dev->bm[0], 0, irq_mode[0]); sff_set_irq_mode(dev->bm[0], 1, irq_mode[1]); if (dev->regs[0x04] & 0x01) - ide_pri_enable(); + ide_pri_enable(); if (dev->single_channel) - return; + return; ide_sec_disable(); if ((dev->regs[0x09] & 0x04) && (dev->regs[0x50] & 0x40)) { - main = (dev->regs[0x19] << 8) | (dev->regs[0x18] & 0xf8); - side = ((dev->regs[0x1d] << 8) | (dev->regs[0x1c] & 0xfc)) + 2; + main = (dev->regs[0x19] << 8) | (dev->regs[0x18] & 0xf8); + side = ((dev->regs[0x1d] << 8) | (dev->regs[0x1c] & 0xfc)) + 2; } else { - main = 0x170; - side = 0x376; + main = 0x170; + side = 0x376; } ide_set_base(1, main); ide_set_side(1, side); if (dev->regs[0x09] & 0x04) - irq_mode[1] = 1; + irq_mode[1] = 1; sff_set_irq_mode(dev->bm[1], 0, irq_mode[0]); sff_set_irq_mode(dev->bm[1], 1, irq_mode[1]); if ((dev->regs[0x04] & 0x01) && (dev->regs[0x51] & 0x08)) - ide_sec_enable(); - + ide_sec_enable(); } - static void cmd646_ide_bm_handlers(cmd646_t *dev) { @@ -163,7 +155,6 @@ cmd646_ide_bm_handlers(cmd646_t *dev) sff_bus_master_handler(dev->bm[1], (dev->regs[0x04] & 1), base + 8); } - static void cmd646_pci_write(int func, int addr, uint8_t val, void *priv) { @@ -171,119 +162,124 @@ cmd646_pci_write(int func, int addr, uint8_t val, void *priv) cmd646_log("[%04X:%08X] (%08X) cmd646_pci_write(%i, %02X, %02X)\n", CS, cpu_state.pc, ESI, func, addr, val); - if (func == 0x00) switch (addr) { - case 0x04: - dev->regs[addr] = (val & 0x45); - cmd646_ide_handlers(dev); - break; - case 0x07: - dev->regs[addr] &= ~(val & 0xb1); - break; - case 0x09: - if ((dev->regs[addr] & 0x0a) == 0x0a) { - dev->regs[addr] = (dev->regs[addr] & 0x0a) | (val & 0x05); - dev->irq_mode[0] = !!(val & 0x01); - dev->irq_mode[1] = !!(val & 0x04); - cmd646_ide_handlers(dev); - } - break; - case 0x10: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x10] = (val & 0xf8) | 1; - cmd646_ide_handlers(dev); - } - break; - case 0x11: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x11] = val; - cmd646_ide_handlers(dev); - } - break; - case 0x14: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x14] = (val & 0xfc) | 1; - cmd646_ide_handlers(dev); - } - break; - case 0x15: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x15] = val; - cmd646_ide_handlers(dev); - } - break; - case 0x18: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x18] = (val & 0xf8) | 1; - cmd646_ide_handlers(dev); - } - break; - case 0x19: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x19] = val; - cmd646_ide_handlers(dev); - } - break; - case 0x1c: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x1c] = (val & 0xfc) | 1; - cmd646_ide_handlers(dev); - } - break; - case 0x1d: - if (dev->regs[0x50] & 0x40) { - dev->regs[0x1d] = val; - cmd646_ide_handlers(dev); - } - break; - case 0x20: - dev->regs[0x20] = (val & 0xf0) | 1; - cmd646_ide_bm_handlers(dev); - break; - case 0x21: - dev->regs[0x21] = val; - cmd646_ide_bm_handlers(dev); - break; - case 0x51: - dev->regs[addr] = val & 0xc8; - cmd646_ide_handlers(dev); - break; - case 0x52: case 0x54: case 0x56: case 0x58: - case 0x59: case 0x5b: - dev->regs[addr] = val; - break; - case 0x53: case 0x55: - dev->regs[addr] = val & 0xc0; - break; - case 0x57: - dev->regs[addr] = (dev->regs[addr] & 0x10) | (val & 0xcc); - break; - case 0x70 ... 0x77: - sff_bus_master_write(addr & 0x0f, val, dev->bm[0]); - break; - case 0x78 ... 0x7f: - sff_bus_master_write(addr & 0x0f, val, dev->bm[1]); - break; - } + if (func == 0x00) + switch (addr) { + case 0x04: + dev->regs[addr] = (val & 0x45); + cmd646_ide_handlers(dev); + break; + case 0x07: + dev->regs[addr] &= ~(val & 0xb1); + break; + case 0x09: + if ((dev->regs[addr] & 0x0a) == 0x0a) { + dev->regs[addr] = (dev->regs[addr] & 0x0a) | (val & 0x05); + dev->irq_mode[0] = !!(val & 0x01); + dev->irq_mode[1] = !!(val & 0x04); + cmd646_ide_handlers(dev); + } + break; + case 0x10: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x10] = (val & 0xf8) | 1; + cmd646_ide_handlers(dev); + } + break; + case 0x11: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x11] = val; + cmd646_ide_handlers(dev); + } + break; + case 0x14: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x14] = (val & 0xfc) | 1; + cmd646_ide_handlers(dev); + } + break; + case 0x15: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x15] = val; + cmd646_ide_handlers(dev); + } + break; + case 0x18: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x18] = (val & 0xf8) | 1; + cmd646_ide_handlers(dev); + } + break; + case 0x19: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x19] = val; + cmd646_ide_handlers(dev); + } + break; + case 0x1c: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x1c] = (val & 0xfc) | 1; + cmd646_ide_handlers(dev); + } + break; + case 0x1d: + if (dev->regs[0x50] & 0x40) { + dev->regs[0x1d] = val; + cmd646_ide_handlers(dev); + } + break; + case 0x20: + dev->regs[0x20] = (val & 0xf0) | 1; + cmd646_ide_bm_handlers(dev); + break; + case 0x21: + dev->regs[0x21] = val; + cmd646_ide_bm_handlers(dev); + break; + case 0x51: + dev->regs[addr] = val & 0xc8; + cmd646_ide_handlers(dev); + break; + case 0x52: + case 0x54: + case 0x56: + case 0x58: + case 0x59: + case 0x5b: + dev->regs[addr] = val; + break; + case 0x53: + case 0x55: + dev->regs[addr] = val & 0xc0; + break; + case 0x57: + dev->regs[addr] = (dev->regs[addr] & 0x10) | (val & 0xcc); + break; + case 0x70 ... 0x77: + sff_bus_master_write(addr & 0x0f, val, dev->bm[0]); + break; + case 0x78 ... 0x7f: + sff_bus_master_write(addr & 0x0f, val, dev->bm[1]); + break; + } } - static uint8_t cmd646_pci_read(int func, int addr, void *priv) { cmd646_t *dev = (cmd646_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (func == 0x00) { - ret = dev->regs[addr]; + ret = dev->regs[addr]; - if (addr == 0x50) - dev->regs[0x50] &= ~0x04; - else if (addr == 0x57) - dev->regs[0x57] &= ~0x10; - else if ((addr >= 0x70) && (addr <= 0x77)) - ret = sff_bus_master_read(addr & 0x0f, dev->bm[0]); - else if ((addr >= 0x78) && (addr <= 0x7f)) - ret = sff_bus_master_read(addr & 0x0f, dev->bm[0]); + if (addr == 0x50) + dev->regs[0x50] &= ~0x04; + else if (addr == 0x57) + dev->regs[0x57] &= ~0x10; + else if ((addr >= 0x70) && (addr <= 0x77)) + ret = sff_bus_master_read(addr & 0x0f, dev->bm[0]); + else if ((addr >= 0x78) && (addr <= 0x7f)) + ret = sff_bus_master_read(addr & 0x0f, dev->bm[0]); } cmd646_log("[%04X:%08X] (%08X) cmd646_pci_read(%i, %02X, %02X)\n", CS, cpu_state.pc, ESI, func, addr, ret); @@ -291,77 +287,76 @@ cmd646_pci_read(int func, int addr, void *priv) return ret; } - static void cmd646_reset(void *priv) { cmd646_t *dev = (cmd646_t *) priv; - int i = 0; + int i = 0; for (i = 0; i < CDROM_NUM; i++) { - if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && - (cdrom[i].ide_channel < 4) && cdrom[i].priv) - scsi_cdrom_reset((scsi_common_t *) cdrom[i].priv); + if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && (cdrom[i].ide_channel < 4) && cdrom[i].priv) + scsi_cdrom_reset((scsi_common_t *) cdrom[i].priv); } for (i = 0; i < ZIP_NUM; i++) { - if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && - (zip_drives[i].ide_channel < 4) && zip_drives[i].priv) - zip_reset((scsi_common_t *) zip_drives[i].priv); + if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && (zip_drives[i].ide_channel < 4) && zip_drives[i].priv) + zip_reset((scsi_common_t *) zip_drives[i].priv); + } + for (i = 0; i < MO_NUM; i++) { + if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && (mo_drives[i].ide_channel < 4) && mo_drives[i].priv) + mo_reset((scsi_common_t *) mo_drives[i].priv); } - for (i = 0; i < MO_NUM; i++) { - if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && - (mo_drives[i].ide_channel < 4) && mo_drives[i].priv) - mo_reset((scsi_common_t *) mo_drives[i].priv); - } cmd646_set_irq(0x00, priv); cmd646_set_irq(0x01, priv); memset(dev->regs, 0x00, sizeof(dev->regs)); - dev->regs[0x00] = 0x95; /* CMD */ + dev->regs[0x00] = 0x95; /* CMD */ dev->regs[0x01] = 0x10; - dev->regs[0x02] = 0x46; /* PCI-0646 */ + dev->regs[0x02] = 0x46; /* PCI-0646 */ dev->regs[0x03] = 0x06; dev->regs[0x04] = 0x00; dev->regs[0x06] = 0x80; - dev->regs[0x07] = 0x02; /* DEVSEL timing: 01 medium */ - dev->regs[0x09] = dev->local; /* Programming interface */ - dev->regs[0x0a] = 0x01; /* IDE controller */ - dev->regs[0x0b] = 0x01; /* Mass storage controller */ + dev->regs[0x07] = 0x02; /* DEVSEL timing: 01 medium */ + dev->regs[0x09] = dev->local; /* Programming interface */ + dev->regs[0x0a] = 0x01; /* IDE controller */ + dev->regs[0x0b] = 0x01; /* Mass storage controller */ if ((dev->local & 0xffff) == 0x8a) { - dev->regs[0x50] = 0x40; /* Enable Base address register R/W; - If 0, they return 0 and are read-only 8 */ + dev->regs[0x50] = 0x40; /* Enable Base address register R/W; + If 0, they return 0 and are read-only 8 */ - /* Base addresses (1F0, 3F4, 170, 374) */ - dev->regs[0x10] = 0xf1; dev->regs[0x11] = 0x01; - dev->regs[0x14] = 0xf5; dev->regs[0x15] = 0x03; - dev->regs[0x18] = 0x71; dev->regs[0x19] = 0x01; - dev->regs[0x1c] = 0x75; dev->regs[0x1d] = 0x03; + /* Base addresses (1F0, 3F4, 170, 374) */ + dev->regs[0x10] = 0xf1; + dev->regs[0x11] = 0x01; + dev->regs[0x14] = 0xf5; + dev->regs[0x15] = 0x03; + dev->regs[0x18] = 0x71; + dev->regs[0x19] = 0x01; + dev->regs[0x1c] = 0x75; + dev->regs[0x1d] = 0x03; } dev->regs[0x20] = 0x01; - dev->regs[0x3c] = 0x0e; /* IRQ 14 */ - dev->regs[0x3d] = 0x01; /* INTA */ - dev->regs[0x3e] = 0x02; /* Min_Gnt */ - dev->regs[0x3f] = 0x04; /* Max_Iat */ + dev->regs[0x3c] = 0x0e; /* IRQ 14 */ + dev->regs[0x3d] = 0x01; /* INTA */ + dev->regs[0x3e] = 0x02; /* Min_Gnt */ + dev->regs[0x3f] = 0x04; /* Max_Iat */ if (!dev->single_channel) - dev->regs[0x51] = 0x08; + dev->regs[0x51] = 0x08; dev->regs[0x57] = 0x0c; dev->regs[0x59] = 0x40; dev->irq_mode[0] = dev->irq_mode[1] = 0; - dev->irq_pin = PCI_INTA; + dev->irq_pin = PCI_INTA; cmd646_ide_handlers(dev); cmd646_ide_bm_handlers(dev); } - static void cmd646_close(void *priv) { @@ -370,7 +365,6 @@ cmd646_close(void *priv) free(dev); } - static void * cmd646_init(const device_t *info) { @@ -387,18 +381,18 @@ cmd646_init(const device_t *info) dev->bm[0] = device_add_inst(&sff8038i_device, 1); if (!dev->single_channel) - dev->bm[1] = device_add_inst(&sff8038i_device, 2); + dev->bm[1] = device_add_inst(&sff8038i_device, 2); ide_set_bus_master(0, cmd646_bus_master_dma, cmd646_set_irq, dev); if (!dev->single_channel) - ide_set_bus_master(1, cmd646_bus_master_dma, cmd646_set_irq, dev); + ide_set_bus_master(1, cmd646_bus_master_dma, cmd646_set_irq, dev); sff_set_irq_mode(dev->bm[0], 0, 0); sff_set_irq_mode(dev->bm[0], 1, 0); if (!dev->single_channel) { - sff_set_irq_mode(dev->bm[1], 0, 0); - sff_set_irq_mode(dev->bm[1], 1, 0); + sff_set_irq_mode(dev->bm[1], 0, 0); + sff_set_irq_mode(dev->bm[1], 1, 0); } cmd646_reset(dev); @@ -407,43 +401,43 @@ cmd646_init(const device_t *info) } const device_t ide_cmd646_device = { - .name = "CMD PCI-0646", + .name = "CMD PCI-0646", .internal_name = "ide_cmd646", - .flags = DEVICE_PCI, - .local = 0x8a, - .init = cmd646_init, - .close = cmd646_close, - .reset = cmd646_reset, + .flags = DEVICE_PCI, + .local = 0x8a, + .init = cmd646_init, + .close = cmd646_close, + .reset = cmd646_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ide_cmd646_legacy_only_device = { - .name = "CMD PCI-0646 (Legacy Mode Only)", + .name = "CMD PCI-0646 (Legacy Mode Only)", .internal_name = "ide_cmd646_legacy_only", - .flags = DEVICE_PCI, - .local = 0x80, - .init = cmd646_init, - .close = cmd646_close, - .reset = cmd646_reset, + .flags = DEVICE_PCI, + .local = 0x80, + .init = cmd646_init, + .close = cmd646_close, + .reset = cmd646_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ide_cmd646_single_channel_device = { - .name = "CMD PCI-0646", + .name = "CMD PCI-0646", .internal_name = "ide_cmd646_single_channel", - .flags = DEVICE_PCI, - .local = 0x2008a, - .init = cmd646_init, - .close = cmd646_close, - .reset = cmd646_reset, + .flags = DEVICE_PCI, + .local = 0x2008a, + .init = cmd646_init, + .close = cmd646_close, + .reset = cmd646_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/disk/hdc_ide_opti611.c b/src/disk/hdc_ide_opti611.c index 9a6bd9cd4..d01f422bc 100644 --- a/src/disk/hdc_ide_opti611.c +++ b/src/disk/hdc_ide_opti611.c @@ -29,17 +29,14 @@ #include <86box/hdc.h> #include <86box/hdc_ide.h> - typedef struct { - uint8_t tries, - in_cfg, cfg_locked, - regs[19]; + uint8_t tries, + in_cfg, cfg_locked, + regs[19]; } opti611_t; - -static void opti611_ide_handler(opti611_t *dev); - +static void opti611_ide_handler(opti611_t *dev); static void opti611_cfg_write(uint16_t addr, uint8_t val, void *priv) @@ -49,32 +46,31 @@ opti611_cfg_write(uint16_t addr, uint8_t val, void *priv) addr &= 0x0007; switch (addr) { - case 0x0000: - case 0x0001: - dev->regs[((dev->regs[0x06] & 0x01) << 4) + addr] = val; - break; - case 0x0002: - dev->regs[0x12] = (val & 0xc1) | 0x02; - if (val & 0xc0) { - if (val & 0x40) - dev->cfg_locked = 1; - dev->in_cfg = 0; - opti611_ide_handler(dev); - } - break; - case 0x0003: - dev->regs[0x03] = (val & 0xdf); - break; - case 0x0005: - dev->regs[0x05] = (dev->regs[0x05] & 0x78) | (val & 0x87); - break; - case 0x0006: - dev->regs[0x06] = val; - break; + case 0x0000: + case 0x0001: + dev->regs[((dev->regs[0x06] & 0x01) << 4) + addr] = val; + break; + case 0x0002: + dev->regs[0x12] = (val & 0xc1) | 0x02; + if (val & 0xc0) { + if (val & 0x40) + dev->cfg_locked = 1; + dev->in_cfg = 0; + opti611_ide_handler(dev); + } + break; + case 0x0003: + dev->regs[0x03] = (val & 0xdf); + break; + case 0x0005: + dev->regs[0x05] = (dev->regs[0x05] & 0x78) | (val & 0x87); + break; + case 0x0006: + dev->regs[0x06] = val; + break; } } - static void opti611_cfg_writew(uint16_t addr, uint16_t val, void *priv) { @@ -82,7 +78,6 @@ opti611_cfg_writew(uint16_t addr, uint16_t val, void *priv) opti611_cfg_write(addr + 1, val >> 8, priv); } - static void opti611_cfg_writel(uint16_t addr, uint32_t val, void *priv) { @@ -90,34 +85,35 @@ opti611_cfg_writel(uint16_t addr, uint32_t val, void *priv) opti611_cfg_writew(addr + 2, val >> 16, priv); } - static uint8_t opti611_cfg_read(uint16_t addr, void *priv) { - uint8_t ret = 0xff; + uint8_t ret = 0xff; opti611_t *dev = (opti611_t *) priv; addr &= 0x0007; switch (addr) { - case 0x0000: - case 0x0001: - ret = dev->regs[((dev->regs[0x06] & 0x01) << 4) + addr]; - break; - case 0x0002: - ret = ((!!in_smm) << 7); - if (ret & 0x80) - ret |= (dev->regs[addr] & 0x7f); - break; - case 0x0003: case 0x0004: case 0x0005: case 0x0006: - ret = dev->regs[addr]; - break; + case 0x0000: + case 0x0001: + ret = dev->regs[((dev->regs[0x06] & 0x01) << 4) + addr]; + break; + case 0x0002: + ret = ((!!in_smm) << 7); + if (ret & 0x80) + ret |= (dev->regs[addr] & 0x7f); + break; + case 0x0003: + case 0x0004: + case 0x0005: + case 0x0006: + ret = dev->regs[addr]; + break; } return ret; } - static uint16_t opti611_cfg_readw(uint16_t addr, void *priv) { @@ -129,7 +125,6 @@ opti611_cfg_readw(uint16_t addr, void *priv) return ret; } - static uint32_t opti611_cfg_readl(uint16_t addr, void *priv) { @@ -141,7 +136,6 @@ opti611_cfg_readl(uint16_t addr, void *priv) return ret; } - static void opti611_ide_write(uint16_t addr, uint8_t val, void *priv) { @@ -152,13 +146,12 @@ opti611_ide_write(uint16_t addr, uint8_t val, void *priv) uint8_t smibe = (addr & 0x0003); if (dev->regs[0x03] & 0x02) { - smi_raise(); - dev->regs[0x02] = smia9 | smia2 | smibe; - dev->regs[0x04] = val; + smi_raise(); + dev->regs[0x02] = smia9 | smia2 | smibe; + dev->regs[0x04] = val; } } - static void opti611_ide_writew(uint16_t addr, uint16_t val, void *priv) { @@ -169,13 +162,12 @@ opti611_ide_writew(uint16_t addr, uint16_t val, void *priv) uint8_t smibe = (addr & 0x0002) | 0x0001; if (dev->regs[0x03] & 0x02) { - smi_raise(); - dev->regs[0x02] = smia9 | smia2 | smibe; - dev->regs[0x04] = 0x00; + smi_raise(); + dev->regs[0x02] = smia9 | smia2 | smibe; + dev->regs[0x04] = 0x00; } } - static void opti611_ide_writel(uint16_t addr, uint32_t val, void *priv) { @@ -185,13 +177,12 @@ opti611_ide_writel(uint16_t addr, uint32_t val, void *priv) uint8_t smia2 = (!!(addr & 0x0004)) << 4; if (dev->regs[0x03] & 0x02) { - smi_raise(); - dev->regs[0x02] = smia9 | smia2 | 0x0003; - dev->regs[0x04] = 0x00; + smi_raise(); + dev->regs[0x02] = smia9 | smia2 | 0x0003; + dev->regs[0x04] = 0x00; } } - static uint8_t opti611_ide_read(uint16_t addr, void *priv) { @@ -202,15 +193,14 @@ opti611_ide_read(uint16_t addr, void *priv) uint8_t smibe = (addr & 0x0003); if (dev->regs[0x03] & 0x02) { - smi_raise(); - dev->regs[0x02] = smia9 | smia2 | smibe; - dev->regs[0x04] = 0x00; + smi_raise(); + dev->regs[0x02] = smia9 | smia2 | smibe; + dev->regs[0x04] = 0x00; } return 0xff; } - static uint16_t opti611_ide_readw(uint16_t addr, void *priv) { @@ -221,23 +211,22 @@ opti611_ide_readw(uint16_t addr, void *priv) uint8_t smibe = (addr & 0x0002) | 0x0001; if ((addr & 0x0007) == 0x0001) { - dev->tries = (dev->tries + 1) & 0x01; - if ((dev->tries == 0x00) && !dev->cfg_locked) { - dev->in_cfg = 1; - opti611_ide_handler(dev); - } + dev->tries = (dev->tries + 1) & 0x01; + if ((dev->tries == 0x00) && !dev->cfg_locked) { + dev->in_cfg = 1; + opti611_ide_handler(dev); + } } if (dev->regs[0x03] & 0x02) { - smi_raise(); - dev->regs[0x02] = smia9 | smia2 | smibe; - dev->regs[0x04] = 0x00; + smi_raise(); + dev->regs[0x02] = smia9 | smia2 | smibe; + dev->regs[0x04] = 0x00; } return 0xffff; } - static uint32_t opti611_ide_readl(uint16_t addr, void *priv) { @@ -247,44 +236,42 @@ opti611_ide_readl(uint16_t addr, void *priv) uint8_t smia2 = (!!(addr & 0x0004)) << 4; if (dev->regs[0x03] & 0x02) { - smi_raise(); - dev->regs[0x02] = smia9 | smia2 | 0x0003; - dev->regs[0x04] = 0x00; + smi_raise(); + dev->regs[0x02] = smia9 | smia2 | 0x0003; + dev->regs[0x04] = 0x00; } return 0xffffffff; } - static void opti611_ide_handler(opti611_t *dev) { ide_pri_disable(); io_removehandler(0x01f0, 0x0007, - opti611_ide_read, opti611_ide_readw, opti611_ide_readl, - opti611_ide_write, opti611_ide_writew, opti611_ide_writel, - dev); + opti611_ide_read, opti611_ide_readw, opti611_ide_readl, + opti611_ide_write, opti611_ide_writew, opti611_ide_writel, + dev); io_removehandler(0x01f0, 0x0007, - opti611_cfg_read, opti611_cfg_readw, opti611_cfg_readl, - opti611_cfg_write, opti611_cfg_writew, opti611_cfg_writel, - dev); + opti611_cfg_read, opti611_cfg_readw, opti611_cfg_readl, + opti611_cfg_write, opti611_cfg_writew, opti611_cfg_writel, + dev); if (dev->in_cfg && !dev->cfg_locked) { - io_sethandler(0x01f0, 0x0007, - opti611_cfg_read, opti611_cfg_readw, opti611_cfg_readl, - opti611_cfg_write, opti611_cfg_writew, opti611_cfg_writel, - dev); + io_sethandler(0x01f0, 0x0007, + opti611_cfg_read, opti611_cfg_readw, opti611_cfg_readl, + opti611_cfg_write, opti611_cfg_writew, opti611_cfg_writel, + dev); } else { - if (dev->regs[0x03] & 0x01) - ide_pri_enable(); - io_sethandler(0x01f0, 0x0007, - opti611_ide_read, opti611_ide_readw, opti611_ide_readl, - opti611_ide_write, opti611_ide_writew, opti611_ide_writel, - dev); + if (dev->regs[0x03] & 0x01) + ide_pri_enable(); + io_sethandler(0x01f0, 0x0007, + opti611_ide_read, opti611_ide_readw, opti611_ide_readl, + opti611_ide_write, opti611_ide_writew, opti611_ide_writel, + dev); } } - static void opti611_close(void *priv) { @@ -293,7 +280,6 @@ opti611_close(void *priv) free(dev); } - static void * opti611_init(const device_t *info) { @@ -312,15 +298,15 @@ opti611_init(const device_t *info) } const device_t ide_opti611_vlb_device = { - .name = "OPTi 82C611/82C611A VLB", + .name = "OPTi 82C611/82C611A VLB", .internal_name = "ide_opti611_vlb", - .flags = DEVICE_VLB, - .local = 0, - .init = opti611_init, - .close = opti611_close, - .reset = NULL, + .flags = DEVICE_VLB, + .local = 0, + .init = opti611_init, + .close = opti611_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/disk/hdc_ide_sff8038i.c b/src/disk/hdc_ide_sff8038i.c index f15cc6dcb..5ce71325e 100644 --- a/src/disk/hdc_ide_sff8038i.c +++ b/src/disk/hdc_ide_sff8038i.c @@ -43,75 +43,68 @@ #include <86box/zip.h> #include <86box/mo.h> +static int next_id = 0; -static int next_id = 0; - - -uint8_t sff_bus_master_read(uint16_t port, void *priv); -static uint16_t sff_bus_master_readw(uint16_t port, void *priv); -static uint32_t sff_bus_master_readl(uint16_t port, void *priv); -void sff_bus_master_write(uint16_t port, uint8_t val, void *priv); -static void sff_bus_master_writew(uint16_t port, uint16_t val, void *priv); -static void sff_bus_master_writel(uint16_t port, uint32_t val, void *priv); - +uint8_t sff_bus_master_read(uint16_t port, void *priv); +static uint16_t sff_bus_master_readw(uint16_t port, void *priv); +static uint32_t sff_bus_master_readl(uint16_t port, void *priv); +void sff_bus_master_write(uint16_t port, uint8_t val, void *priv); +static void sff_bus_master_writew(uint16_t port, uint16_t val, void *priv); +static void sff_bus_master_writel(uint16_t port, uint32_t val, void *priv); #ifdef ENABLE_SFF_LOG int sff_do_log = ENABLE_SFF_LOG; - static void sff_log(const char *fmt, ...) { va_list ap; if (sff_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define sff_log(fmt, ...) +# define sff_log(fmt, ...) #endif - void sff_bus_master_handler(sff8038i_t *dev, int enabled, uint16_t base) { if (dev->base != 0x0000) { - io_removehandler(dev->base, 0x08, - sff_bus_master_read, sff_bus_master_readw, sff_bus_master_readl, - sff_bus_master_write, sff_bus_master_writew, sff_bus_master_writel, - dev); + io_removehandler(dev->base, 0x08, + sff_bus_master_read, sff_bus_master_readw, sff_bus_master_readl, + sff_bus_master_write, sff_bus_master_writew, sff_bus_master_writel, + dev); } if (enabled && (base != 0x0000)) { - io_sethandler(base, 0x08, - sff_bus_master_read, sff_bus_master_readw, sff_bus_master_readl, - sff_bus_master_write, sff_bus_master_writew, sff_bus_master_writel, - dev); + io_sethandler(base, 0x08, + sff_bus_master_read, sff_bus_master_readw, sff_bus_master_readl, + sff_bus_master_write, sff_bus_master_writew, sff_bus_master_writel, + dev); } dev->enabled = enabled; - dev->base = base; + dev->base = base; } - static void sff_bus_master_next_addr(sff8038i_t *dev) { - dma_bm_read(dev->ptr_cur, (uint8_t *)&(dev->addr), 4, 4); - dma_bm_read(dev->ptr_cur + 4, (uint8_t *)&(dev->count), 4, 4); + dma_bm_read(dev->ptr_cur, (uint8_t *) &(dev->addr), 4, 4); + dma_bm_read(dev->ptr_cur + 4, (uint8_t *) &(dev->count), 4, 4); sff_log("SFF-8038i Bus master DWORDs: %08X %08X\n", dev->addr, dev->count); dev->eot = dev->count >> 31; dev->count &= 0xfffe; if (!dev->count) - dev->count = 65536; + dev->count = 65536; dev->addr &= 0xfffffffe; dev->ptr_cur += 8; } - void sff_bus_master_write(uint16_t port, uint8_t val, void *priv) { @@ -123,54 +116,53 @@ sff_bus_master_write(uint16_t port, uint8_t val, void *priv) sff_log("SFF-8038i Bus master BYTE write: %04X %02X\n", port, val); switch (port & 7) { - case 0: - sff_log("sff Cmd : val = %02X, old = %02X\n", val, dev->command); - if ((val & 1) && !(dev->command & 1)) { /*Start*/ - sff_log("sff Bus Master start on channel %i\n", channel); - dev->ptr_cur = dev->ptr; - sff_bus_master_next_addr(dev); - dev->status |= 1; - } - if (!(val & 1) && (dev->command & 1)) { /*Stop*/ - sff_log("sff Bus Master stop on channel %i\n", channel); - dev->status &= ~1; - } + case 0: + sff_log("sff Cmd : val = %02X, old = %02X\n", val, dev->command); + if ((val & 1) && !(dev->command & 1)) { /*Start*/ + sff_log("sff Bus Master start on channel %i\n", channel); + dev->ptr_cur = dev->ptr; + sff_bus_master_next_addr(dev); + dev->status |= 1; + } + if (!(val & 1) && (dev->command & 1)) { /*Stop*/ + sff_log("sff Bus Master stop on channel %i\n", channel); + dev->status &= ~1; + } - dev->command = val; - break; - case 1: - dev->dma_mode = val & 0x03; - break; - case 2: - sff_log("sff Status: val = %02X, old = %02X\n", val, dev->status); - dev->status &= 0x07; - dev->status |= (val & 0x60); - if (val & 0x04) - dev->status &= ~0x04; - if (val & 0x02) - dev->status &= ~0x02; - break; - case 4: - dev->ptr = (dev->ptr & 0xffffff00) | (val & 0xfc); - dev->ptr %= (mem_size * 1024); - dev->ptr0 = val; - break; - case 5: - dev->ptr = (dev->ptr & 0xffff00fc) | (val << 8); - dev->ptr %= (mem_size * 1024); - break; - case 6: - dev->ptr = (dev->ptr & 0xff00fffc) | (val << 16); - dev->ptr %= (mem_size * 1024); - break; - case 7: - dev->ptr = (dev->ptr & 0x00fffffc) | (val << 24); - dev->ptr %= (mem_size * 1024); - break; + dev->command = val; + break; + case 1: + dev->dma_mode = val & 0x03; + break; + case 2: + sff_log("sff Status: val = %02X, old = %02X\n", val, dev->status); + dev->status &= 0x07; + dev->status |= (val & 0x60); + if (val & 0x04) + dev->status &= ~0x04; + if (val & 0x02) + dev->status &= ~0x02; + break; + case 4: + dev->ptr = (dev->ptr & 0xffffff00) | (val & 0xfc); + dev->ptr %= (mem_size * 1024); + dev->ptr0 = val; + break; + case 5: + dev->ptr = (dev->ptr & 0xffff00fc) | (val << 8); + dev->ptr %= (mem_size * 1024); + break; + case 6: + dev->ptr = (dev->ptr & 0xff00fffc) | (val << 16); + dev->ptr %= (mem_size * 1024); + break; + case 7: + dev->ptr = (dev->ptr & 0x00fffffc) | (val << 24); + dev->ptr %= (mem_size * 1024); + break; } } - static void sff_bus_master_writew(uint16_t port, uint16_t val, void *priv) { @@ -179,24 +171,23 @@ sff_bus_master_writew(uint16_t port, uint16_t val, void *priv) sff_log("SFF-8038i Bus master WORD write: %04X %04X\n", port, val); switch (port & 7) { - case 0: - case 1: - case 2: - sff_bus_master_write(port, val & 0xff, priv); - break; - case 4: - dev->ptr = (dev->ptr & 0xffff0000) | (val & 0xfffc); - dev->ptr %= (mem_size * 1024); - dev->ptr0 = val & 0xff; - break; - case 6: - dev->ptr = (dev->ptr & 0x0000fffc) | (val << 16); - dev->ptr %= (mem_size * 1024); - break; + case 0: + case 1: + case 2: + sff_bus_master_write(port, val & 0xff, priv); + break; + case 4: + dev->ptr = (dev->ptr & 0xffff0000) | (val & 0xfffc); + dev->ptr %= (mem_size * 1024); + dev->ptr0 = val & 0xff; + break; + case 6: + dev->ptr = (dev->ptr & 0x0000fffc) | (val << 16); + dev->ptr %= (mem_size * 1024); + break; } } - static void sff_bus_master_writel(uint16_t port, uint32_t val, void *priv) { @@ -205,20 +196,19 @@ sff_bus_master_writel(uint16_t port, uint32_t val, void *priv) sff_log("SFF-8038i Bus master DWORD write: %04X %08X\n", port, val); switch (port & 7) { - case 0: - case 1: - case 2: - sff_bus_master_write(port, val & 0xff, priv); - break; - case 4: - dev->ptr = (val & 0xfffffffc); - dev->ptr %= (mem_size * 1024); - dev->ptr0 = val & 0xff; - break; + case 0: + case 1: + case 2: + sff_bus_master_write(port, val & 0xff, priv); + break; + case 4: + dev->ptr = (val & 0xfffffffc); + dev->ptr %= (mem_size * 1024); + dev->ptr0 = val & 0xff; + break; } } - uint8_t sff_bus_master_read(uint16_t port, void *priv) { @@ -227,27 +217,27 @@ sff_bus_master_read(uint16_t port, void *priv) uint8_t ret = 0xff; switch (port & 7) { - case 0: - ret = dev->command; - break; - case 1: - ret = dev->dma_mode & 0x03; - break; - case 2: - ret = dev->status & 0x67; - break; - case 4: - ret = dev->ptr0; - break; - case 5: - ret = dev->ptr >> 8; - break; - case 6: - ret = dev->ptr >> 16; - break; - case 7: - ret = dev->ptr >> 24; - break; + case 0: + ret = dev->command; + break; + case 1: + ret = dev->dma_mode & 0x03; + break; + case 2: + ret = dev->status & 0x67; + break; + case 4: + ret = dev->ptr0; + break; + case 5: + ret = dev->ptr >> 8; + break; + case 6: + ret = dev->ptr >> 16; + break; + case 7: + ret = dev->ptr >> 24; + break; } sff_log("SFF-8038i Bus master BYTE read : %04X %02X\n", port, ret); @@ -255,7 +245,6 @@ sff_bus_master_read(uint16_t port, void *priv) return ret; } - static uint16_t sff_bus_master_readw(uint16_t port, void *priv) { @@ -264,17 +253,17 @@ sff_bus_master_readw(uint16_t port, void *priv) uint16_t ret = 0xffff; switch (port & 7) { - case 0: - case 1: - case 2: - ret = (uint16_t) sff_bus_master_read(port, priv); - break; - case 4: - ret = dev->ptr0 | (dev->ptr & 0xff00); - break; - case 6: - ret = dev->ptr >> 16; - break; + case 0: + case 1: + case 2: + ret = (uint16_t) sff_bus_master_read(port, priv); + break; + case 4: + ret = dev->ptr0 | (dev->ptr & 0xff00); + break; + case 6: + ret = dev->ptr >> 16; + break; } sff_log("SFF-8038i Bus master WORD read : %04X %04X\n", port, ret); @@ -282,7 +271,6 @@ sff_bus_master_readw(uint16_t port, void *priv) return ret; } - static uint32_t sff_bus_master_readl(uint16_t port, void *priv) { @@ -291,14 +279,14 @@ sff_bus_master_readl(uint16_t port, void *priv) uint32_t ret = 0xffffffff; switch (port & 7) { - case 0: - case 1: - case 2: - ret = (uint32_t) sff_bus_master_read(port, priv); - break; - case 4: - ret = dev->ptr0 | (dev->ptr & 0xffffff00); - break; + case 0: + case 1: + case 2: + ret = (uint32_t) sff_bus_master_read(port, priv); + break; + case 4: + ret = dev->ptr0 | (dev->ptr & 0xffffff00); + break; } sff_log("sff Bus master DWORD read : %04X %08X\n", port, ret); @@ -306,7 +294,6 @@ sff_bus_master_readl(uint16_t port, void *priv) return ret; } - int sff_bus_master_dma(int channel, uint8_t *data, int transfer_length, int out, void *priv) { @@ -322,141 +309,138 @@ sff_bus_master_dma(int channel, uint8_t *data, int transfer_length, int out, voi #endif if (!(dev->status & 1)) { - sff_log("DMA disabled\n"); - return 2; /*DMA disabled*/ + sff_log("DMA disabled\n"); + return 2; /*DMA disabled*/ } sff_log("SFF-8038i Bus master %s: %i bytes\n", out ? "write" : "read", transfer_length); while (1) { - if (dev->count <= transfer_length) { - sff_log("%sing %i bytes to %08X\n", sop, dev->count, dev->addr); - if (out) - dma_bm_read(dev->addr, (uint8_t *)(data + buffer_pos), dev->count, 4); - else - dma_bm_write(dev->addr, (uint8_t *)(data + buffer_pos), dev->count, 4); - transfer_length -= dev->count; - buffer_pos += dev->count; - } else { - sff_log("%sing %i bytes to %08X\n", sop, transfer_length, dev->addr); - if (out) - dma_bm_read(dev->addr, (uint8_t *)(data + buffer_pos), transfer_length, 4); - else - dma_bm_write(dev->addr, (uint8_t *)(data + buffer_pos), transfer_length, 4); - /* Increase addr and decrease count so that resumed transfers do not mess up. */ - dev->addr += transfer_length; - dev->count -= transfer_length; - transfer_length = 0; - force_end = 1; - } + if (dev->count <= transfer_length) { + sff_log("%sing %i bytes to %08X\n", sop, dev->count, dev->addr); + if (out) + dma_bm_read(dev->addr, (uint8_t *) (data + buffer_pos), dev->count, 4); + else + dma_bm_write(dev->addr, (uint8_t *) (data + buffer_pos), dev->count, 4); + transfer_length -= dev->count; + buffer_pos += dev->count; + } else { + sff_log("%sing %i bytes to %08X\n", sop, transfer_length, dev->addr); + if (out) + dma_bm_read(dev->addr, (uint8_t *) (data + buffer_pos), transfer_length, 4); + else + dma_bm_write(dev->addr, (uint8_t *) (data + buffer_pos), transfer_length, 4); + /* Increase addr and decrease count so that resumed transfers do not mess up. */ + dev->addr += transfer_length; + dev->count -= transfer_length; + transfer_length = 0; + force_end = 1; + } - if (force_end) { - sff_log("Total transfer length smaller than sum of all blocks, partial block\n"); - dev->status &= ~2; - return 1; /* This block has exhausted the data to transfer and it was smaller than the count, break. */ - } else { - if (!transfer_length && !dev->eot) { - sff_log("Total transfer length smaller than sum of all blocks, full block\n"); - dev->status &= ~2; - return 1; /* We have exhausted the data to transfer but there's more blocks left, break. */ - } else if (transfer_length && dev->eot) { - sff_log("Total transfer length greater than sum of all blocks\n"); - dev->status |= 2; - return 0; /* There is data left to transfer but we have reached EOT - return with error. */ - } else if (dev->eot) { - sff_log("Regular EOT\n"); - dev->status &= ~3; - return 1; /* We have regularly reached EOT - clear status and break. */ - } else { - /* We have more to transfer and there are blocks left, get next block. */ - sff_bus_master_next_addr(dev); - } - } + if (force_end) { + sff_log("Total transfer length smaller than sum of all blocks, partial block\n"); + dev->status &= ~2; + return 1; /* This block has exhausted the data to transfer and it was smaller than the count, break. */ + } else { + if (!transfer_length && !dev->eot) { + sff_log("Total transfer length smaller than sum of all blocks, full block\n"); + dev->status &= ~2; + return 1; /* We have exhausted the data to transfer but there's more blocks left, break. */ + } else if (transfer_length && dev->eot) { + sff_log("Total transfer length greater than sum of all blocks\n"); + dev->status |= 2; + return 0; /* There is data left to transfer but we have reached EOT - return with error. */ + } else if (dev->eot) { + sff_log("Regular EOT\n"); + dev->status &= ~3; + return 1; /* We have regularly reached EOT - clear status and break. */ + } else { + /* We have more to transfer and there are blocks left, get next block. */ + sff_bus_master_next_addr(dev); + } + } } return 1; } - void sff_bus_master_set_irq(int channel, void *priv) { sff8038i_t *dev = (sff8038i_t *) priv; - uint8_t irq = !!(channel & 0x40); + uint8_t irq = !!(channel & 0x40); if (!(dev->status & 0x04) || (channel & 0x40)) { - dev->status &= ~0x04; - dev->status |= (channel >> 4); + dev->status &= ~0x04; + dev->status |= (channel >> 4); } channel &= 0x01; switch (dev->irq_mode[channel]) { - case 0: - default: - /* Legacy IRQ mode. */ - if (irq) - picint(1 << (14 + channel)); - else - picintc(1 << (14 + channel)); - break; - case 1: - /* Native PCI IRQ mode with interrupt pin. */ - if (irq) - pci_set_irq(dev->slot, dev->irq_pin); - else - pci_clear_irq(dev->slot, dev->irq_pin); - break; - case 2: - case 5: - /* MIRQ 0 or 1. */ - if (irq) - pci_set_mirq(dev->irq_mode[channel] & 1, 0); - else - pci_clear_mirq(dev->irq_mode[channel] & 1, 0); - break; - case 3: - /* Native PCI IRQ mode with specified interrupt line. */ - if (irq) - picintlevel(1 << dev->irq_line); - else - picintc(1 << dev->irq_line); - break; - case 4: - /* ALi Aladdin Native PCI INTAJ mode. */ - if (irq) - pci_set_mirq(channel + 2, dev->irq_level[channel]); - else - pci_clear_mirq(channel + 2, dev->irq_level[channel]); - break; + case 0: + default: + /* Legacy IRQ mode. */ + if (irq) + picint(1 << (14 + channel)); + else + picintc(1 << (14 + channel)); + break; + case 1: + /* Native PCI IRQ mode with interrupt pin. */ + if (irq) + pci_set_irq(dev->slot, dev->irq_pin); + else + pci_clear_irq(dev->slot, dev->irq_pin); + break; + case 2: + case 5: + /* MIRQ 0 or 1. */ + if (irq) + pci_set_mirq(dev->irq_mode[channel] & 1, 0); + else + pci_clear_mirq(dev->irq_mode[channel] & 1, 0); + break; + case 3: + /* Native PCI IRQ mode with specified interrupt line. */ + if (irq) + picintlevel(1 << dev->irq_line); + else + picintc(1 << dev->irq_line); + break; + case 4: + /* ALi Aladdin Native PCI INTAJ mode. */ + if (irq) + pci_set_mirq(channel + 2, dev->irq_level[channel]); + else + pci_clear_mirq(channel + 2, dev->irq_level[channel]); + break; } } - void sff_bus_master_reset(sff8038i_t *dev, uint16_t old_base) { if (dev->enabled) { - io_removehandler(old_base, 0x08, - sff_bus_master_read, sff_bus_master_readw, sff_bus_master_readl, - sff_bus_master_write, sff_bus_master_writew, sff_bus_master_writel, - dev); + io_removehandler(old_base, 0x08, + sff_bus_master_read, sff_bus_master_readw, sff_bus_master_readl, + sff_bus_master_write, sff_bus_master_writew, sff_bus_master_writel, + dev); - dev->enabled = 0; + dev->enabled = 0; } dev->command = 0x00; - dev->status = 0x00; + dev->status = 0x00; dev->ptr = dev->ptr_cur = 0x00000000; - dev->addr = 0x00000000; - dev->ptr0 = 0x00; + dev->addr = 0x00000000; + dev->ptr0 = 0x00; dev->count = dev->eot = 0x00000000; ide_pri_disable(); ide_sec_disable(); } - static void sff_reset(void *p) { @@ -467,116 +451,107 @@ sff_reset(void *p) #endif for (i = 0; i < CDROM_NUM; i++) { - if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && - (cdrom[i].ide_channel < 4) && cdrom[i].priv) - scsi_cdrom_reset((scsi_common_t *) cdrom[i].priv); + if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && (cdrom[i].ide_channel < 4) && cdrom[i].priv) + scsi_cdrom_reset((scsi_common_t *) cdrom[i].priv); } for (i = 0; i < ZIP_NUM; i++) { - if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && - (zip_drives[i].ide_channel < 4) && zip_drives[i].priv) - zip_reset((scsi_common_t *) zip_drives[i].priv); + if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && (zip_drives[i].ide_channel < 4) && zip_drives[i].priv) + zip_reset((scsi_common_t *) zip_drives[i].priv); + } + for (i = 0; i < MO_NUM; i++) { + if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && (mo_drives[i].ide_channel < 4) && mo_drives[i].priv) + mo_reset((scsi_common_t *) mo_drives[i].priv); } - for (i = 0; i < MO_NUM; i++) { - if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && - (mo_drives[i].ide_channel < 4) && mo_drives[i].priv) - mo_reset((scsi_common_t *) mo_drives[i].priv); - } sff_bus_master_set_irq(0x00, p); sff_bus_master_set_irq(0x01, p); } - void sff_set_slot(sff8038i_t *dev, int slot) { dev->slot = slot; } - void sff_set_irq_line(sff8038i_t *dev, int irq_line) { dev->irq_line = irq_line; } - void sff_set_irq_level(sff8038i_t *dev, int channel, int irq_level) { dev->irq_level[channel] = 0; } - void sff_set_irq_mode(sff8038i_t *dev, int channel, int irq_mode) { dev->irq_mode[channel] = irq_mode; switch (dev->irq_mode[channel]) { - case 0: - default: - /* Legacy IRQ mode. */ - sff_log("[%08X] Setting channel %i to legacy IRQ %i\n", dev, channel, 14 + channel); - break; - case 1: - /* Native PCI IRQ mode with interrupt pin. */ - sff_log("[%08X] Setting channel %i to native PCI INT%c\n", dev, channel, '@' + dev->irq_pin); - break; - case 2: - case 5: - /* MIRQ 0 or 1. */ - sff_log("[%08X] Setting channel %i to PCI MIRQ%i\n", dev, channel, irq_mode & 1); - break; - case 3: - /* Native PCI IRQ mode with specified interrupt line. */ - sff_log("[%08X] Setting channel %i to native PCI IRQ %i\n", dev, channel, dev->irq_line); - break; - case 4: - /* ALi Aladdin Native PCI INTAJ mode. */ - sff_log("[%08X] Setting channel %i to INT%cJ\n", dev, channel, 'A' + channel); - break; + case 0: + default: + /* Legacy IRQ mode. */ + sff_log("[%08X] Setting channel %i to legacy IRQ %i\n", dev, channel, 14 + channel); + break; + case 1: + /* Native PCI IRQ mode with interrupt pin. */ + sff_log("[%08X] Setting channel %i to native PCI INT%c\n", dev, channel, '@' + dev->irq_pin); + break; + case 2: + case 5: + /* MIRQ 0 or 1. */ + sff_log("[%08X] Setting channel %i to PCI MIRQ%i\n", dev, channel, irq_mode & 1); + break; + case 3: + /* Native PCI IRQ mode with specified interrupt line. */ + sff_log("[%08X] Setting channel %i to native PCI IRQ %i\n", dev, channel, dev->irq_line); + break; + case 4: + /* ALi Aladdin Native PCI INTAJ mode. */ + sff_log("[%08X] Setting channel %i to INT%cJ\n", dev, channel, 'A' + channel); + break; } } - void sff_set_irq_pin(sff8038i_t *dev, int irq_pin) { dev->irq_pin = irq_pin; } - static void sff_close(void *p) { - sff8038i_t *dev = (sff8038i_t *)p; + sff8038i_t *dev = (sff8038i_t *) p; free(dev); next_id--; if (next_id < 0) - next_id = 0; + next_id = 0; } - static void -*sff_init(const device_t *info) + * + sff_init(const device_t *info) { sff8038i_t *dev = (sff8038i_t *) malloc(sizeof(sff8038i_t)); memset(dev, 0, sizeof(sff8038i_t)); /* Make sure to only add IDE once. */ if (next_id == 0) - device_add(&ide_pci_2ch_device); + device_add(&ide_pci_2ch_device); ide_set_bus_master(next_id, sff_bus_master_dma, sff_bus_master_set_irq, dev); - dev->slot = 7; - dev->irq_mode[0] = 0; /* Channel 0 goes to IRQ 14. */ - dev->irq_mode[1] = 2; /* Channel 1 goes to MIRQ0. */ - dev->irq_pin = PCI_INTA; - dev->irq_line = 14; + dev->slot = 7; + dev->irq_mode[0] = 0; /* Channel 0 goes to IRQ 14. */ + dev->irq_mode[1] = 2; /* Channel 1 goes to MIRQ0. */ + dev->irq_pin = PCI_INTA; + dev->irq_line = 14; dev->irq_level[0] = dev->irq_level[1] = 0; next_id++; @@ -584,17 +559,16 @@ static void return dev; } -const device_t sff8038i_device = -{ - .name = "SFF-8038i IDE Bus Master", +const device_t sff8038i_device = { + .name = "SFF-8038i IDE Bus Master", .internal_name = "sff8038i", - .flags = DEVICE_PCI, - .local = 0, - .init = sff_init, - .close = sff_close, - .reset = sff_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = sff_init, + .close = sff_close, + .reset = sff_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/disk/hdc_st506_at.c b/src/disk/hdc_st506_at.c index aff35bc76..1d6b618b5 100644 --- a/src/disk/hdc_st506_at.c +++ b/src/disk/hdc_st506_at.c @@ -39,8 +39,7 @@ #include <86box/hdc.h> #include <86box/hdd.h> - -#define MFM_TIME (TIMER_USEC*10) +#define MFM_TIME (TIMER_USEC * 10) /*Rough estimate - MFM drives spin at 3600 RPM, with 17 sectors per track, meaning (3600/60)*17 = 1020 sectors per second, or 980us per sector. @@ -48,125 +47,115 @@ This is required for OS/2 on slow 286 systems, as the hard drive formatter will crash with 'internal processing error' if write sector interrupts are too close in time*/ -#define SECTOR_TIME (TIMER_USEC * 980) +#define SECTOR_TIME (TIMER_USEC * 980) -#define STAT_ERR 0x01 -#define STAT_INDEX 0x02 -#define STAT_ECC 0x04 -#define STAT_DRQ 0x08 /* data request */ -#define STAT_DSC 0x10 -#define STAT_WRFLT 0x20 -#define STAT_READY 0x40 -#define STAT_BUSY 0x80 +#define STAT_ERR 0x01 +#define STAT_INDEX 0x02 +#define STAT_ECC 0x04 +#define STAT_DRQ 0x08 /* data request */ +#define STAT_DSC 0x10 +#define STAT_WRFLT 0x20 +#define STAT_READY 0x40 +#define STAT_BUSY 0x80 -#define ERR_DAM_NOT_FOUND 0x01 /* Data Address Mark not found */ -#define ERR_TR000 0x02 /* track 0 not found */ -#define ERR_ABRT 0x04 /* command aborted */ -#define ERR_ID_NOT_FOUND 0x10 /* ID not found */ -#define ERR_DATA_CRC 0x40 /* data CRC error */ -#define ERR_BAD_BLOCK 0x80 /* bad block detected */ - -#define CMD_RESTORE 0x10 -#define CMD_READ 0x20 -#define CMD_WRITE 0x30 -#define CMD_VERIFY 0x40 -#define CMD_FORMAT 0x50 -#define CMD_SEEK 0x70 -#define CMD_DIAGNOSE 0x90 -#define CMD_SET_PARAMETERS 0x91 +#define ERR_DAM_NOT_FOUND 0x01 /* Data Address Mark not found */ +#define ERR_TR000 0x02 /* track 0 not found */ +#define ERR_ABRT 0x04 /* command aborted */ +#define ERR_ID_NOT_FOUND 0x10 /* ID not found */ +#define ERR_DATA_CRC 0x40 /* data CRC error */ +#define ERR_BAD_BLOCK 0x80 /* bad block detected */ +#define CMD_RESTORE 0x10 +#define CMD_READ 0x20 +#define CMD_WRITE 0x30 +#define CMD_VERIFY 0x40 +#define CMD_FORMAT 0x50 +#define CMD_SEEK 0x70 +#define CMD_DIAGNOSE 0x90 +#define CMD_SET_PARAMETERS 0x91 typedef struct { - int8_t present, /* drive is present */ - hdd_num, /* drive number in system */ - steprate, /* current servo step rate */ - spt, /* physical #sectors per track */ - hpc, /* physical #heads per cylinder */ - pad; - int16_t tracks; /* physical #tracks per cylinder */ + int8_t present, /* drive is present */ + hdd_num, /* drive number in system */ + steprate, /* current servo step rate */ + spt, /* physical #sectors per track */ + hpc, /* physical #heads per cylinder */ + pad; + int16_t tracks; /* physical #tracks per cylinder */ - int8_t cfg_spt, /* configured #sectors per track */ - cfg_hpc; /* configured #heads per track */ + int8_t cfg_spt, /* configured #sectors per track */ + cfg_hpc; /* configured #heads per track */ - int16_t curcyl; /* current track number */ + int16_t curcyl; /* current track number */ } drive_t; - typedef struct { - uint8_t precomp, /* 1: precomp/error register */ - error, - secount, /* 2: sector count register */ - sector, /* 3: sector number */ - head, /* 6: head number + drive select */ - command, /* 7: command/status */ - status, - fdisk; /* 8: control register */ - uint16_t cylinder; /* 4/5: cylinder LOW and HIGH */ + uint8_t precomp, /* 1: precomp/error register */ + error, + secount, /* 2: sector count register */ + sector, /* 3: sector number */ + head, /* 6: head number + drive select */ + command, /* 7: command/status */ + status, + fdisk; /* 8: control register */ + uint16_t cylinder; /* 4/5: cylinder LOW and HIGH */ - int8_t reset, /* controller in reset */ - irqstat, /* current IRQ status */ - drvsel, /* current selected drive */ - pad; + int8_t reset, /* controller in reset */ + irqstat, /* current IRQ status */ + drvsel, /* current selected drive */ + pad; - int pos; /* offset within data buffer */ - pc_timer_t callback_timer; /* callback delay timer */ + int pos; /* offset within data buffer */ + pc_timer_t callback_timer; /* callback delay timer */ - uint16_t buffer[256]; /* data buffer (16b wide) */ + uint16_t buffer[256]; /* data buffer (16b wide) */ - drive_t drives[MFM_NUM]; /* attached drives */ + drive_t drives[MFM_NUM]; /* attached drives */ } mfm_t; - -static uint8_t mfm_read(uint16_t port, void *priv); -static void mfm_write(uint16_t port, uint8_t val, void *priv); - +static uint8_t mfm_read(uint16_t port, void *priv); +static void mfm_write(uint16_t port, uint8_t val, void *priv); #ifdef ENABLE_ST506_AT_LOG int st506_at_do_log = ENABLE_ST506_AT_LOG; - static void st506_at_log(const char *fmt, ...) { va_list ap; if (st506_at_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define st506_at_log(fmt, ...) +# define st506_at_log(fmt, ...) #endif - static inline void irq_raise(mfm_t *mfm) { if (!(mfm->fdisk & 2)) - picint(1 << 14); + picint(1 << 14); mfm->irqstat = 1; } - static inline void irq_lower(mfm_t *mfm) { picintc(1 << 14); } - - static void irq_update(mfm_t *mfm) { if (mfm->irqstat && !((pic2.irr | pic2.isr) & 0x40) && !(mfm->fdisk & 2)) - picint(1 << 14); + picint(1 << 14); } - /* * Return the sector offset for the current register values. * @@ -184,596 +173,585 @@ get_sector(mfm_t *mfm, off64_t *addr) { drive_t *drive = &mfm->drives[mfm->drvsel]; -/* FIXME: See if this is even needed - if the code is present, IBM AT - diagnostics v2.07 will error with: ERROR 152 - SYSTEM BOARD. */ + /* FIXME: See if this is even needed - if the code is present, IBM AT + diagnostics v2.07 will error with: ERROR 152 - SYSTEM BOARD. */ if (drive->curcyl != mfm->cylinder) { - st506_at_log("WD1003(%d) sector: wrong cylinder\n"); - return(1); + st506_at_log("WD1003(%d) sector: wrong cylinder\n"); + return (1); } if (mfm->head > drive->cfg_hpc) { - st506_at_log("WD1003(%d) get_sector: past end of configured heads\n", - mfm->drvsel); - return(1); + st506_at_log("WD1003(%d) get_sector: past end of configured heads\n", + mfm->drvsel); + return (1); } - if (mfm->sector >= drive->cfg_spt+1) { - st506_at_log("WD1003(%d) get_sector: past end of configured sectors\n", - mfm->drvsel); - return(1); + if (mfm->sector >= drive->cfg_spt + 1) { + st506_at_log("WD1003(%d) get_sector: past end of configured sectors\n", + mfm->drvsel); + return (1); } /* We should check this in the SET_DRIVE_PARAMETERS command! --FvK */ if (mfm->head > drive->hpc) { - st506_at_log("WD1003(%d) get_sector: past end of heads\n", mfm->drvsel); - return(1); + st506_at_log("WD1003(%d) get_sector: past end of heads\n", mfm->drvsel); + return (1); } - if (mfm->sector >= drive->spt+1) { - st506_at_log("WD1003(%d) get_sector: past end of sectors\n", mfm->drvsel); - return(1); + if (mfm->sector >= drive->spt + 1) { + st506_at_log("WD1003(%d) get_sector: past end of sectors\n", mfm->drvsel); + return (1); } - *addr = ((((off64_t) mfm->cylinder * drive->cfg_hpc) + mfm->head) * - drive->cfg_spt) + (mfm->sector - 1); + *addr = ((((off64_t) mfm->cylinder * drive->cfg_hpc) + mfm->head) * drive->cfg_spt) + (mfm->sector - 1); - return(0); + return (0); } - /* Move to the next sector using CHS addressing. */ static void next_sector(mfm_t *mfm) { drive_t *drive = &mfm->drives[mfm->drvsel]; - if (++mfm->sector == (drive->cfg_spt+1)) { - mfm->sector = 1; - if (++mfm->head == drive->cfg_hpc) { - mfm->head = 0; - mfm->cylinder++; - if (drive->curcyl < drive->tracks) - drive->curcyl++; - } + if (++mfm->sector == (drive->cfg_spt + 1)) { + mfm->sector = 1; + if (++mfm->head == drive->cfg_hpc) { + mfm->head = 0; + mfm->cylinder++; + if (drive->curcyl < drive->tracks) + drive->curcyl++; + } } } - static void mfm_cmd(mfm_t *mfm, uint8_t val) { drive_t *drive = &mfm->drives[mfm->drvsel]; - if (! drive->present) { - /* This happens if sofware polls all drives. */ - st506_at_log("WD1003(%d) command %02x on non-present drive\n", - mfm->drvsel, val); - mfm->command = 0xff; - mfm->status = STAT_BUSY; - timer_set_delay_u64(&mfm->callback_timer, 200 * MFM_TIME); - return; + if (!drive->present) { + /* This happens if sofware polls all drives. */ + st506_at_log("WD1003(%d) command %02x on non-present drive\n", + mfm->drvsel, val); + mfm->command = 0xff; + mfm->status = STAT_BUSY; + timer_set_delay_u64(&mfm->callback_timer, 200 * MFM_TIME); + return; } irq_lower(mfm); mfm->command = val; - mfm->error = 0; + mfm->error = 0; switch (val & 0xf0) { - case CMD_RESTORE: - drive->steprate = (val & 0x0f); - st506_at_log("WD1003(%d) restore, step=%d\n", - mfm->drvsel, drive->steprate); - drive->curcyl = 0; - mfm->cylinder = 0; - mfm->status = STAT_READY|STAT_DSC; - mfm->command &= 0xf0; - irq_raise(mfm); - break; + case CMD_RESTORE: + drive->steprate = (val & 0x0f); + st506_at_log("WD1003(%d) restore, step=%d\n", + mfm->drvsel, drive->steprate); + drive->curcyl = 0; + mfm->cylinder = 0; + mfm->status = STAT_READY | STAT_DSC; + mfm->command &= 0xf0; + irq_raise(mfm); + break; - case CMD_SEEK: - drive->steprate = (val & 0x0f); - mfm->command &= 0xf0; - mfm->status = STAT_BUSY; - timer_set_delay_u64(&mfm->callback_timer, 200 * MFM_TIME); - break; + case CMD_SEEK: + drive->steprate = (val & 0x0f); + mfm->command &= 0xf0; + mfm->status = STAT_BUSY; + timer_set_delay_u64(&mfm->callback_timer, 200 * MFM_TIME); + break; - default: - mfm->command = val; - switch (val) { - case CMD_READ: - case CMD_READ+1: - case CMD_READ+2: - case CMD_READ+3: - st506_at_log("WD1003(%d) read, opt=%d\n", - mfm->drvsel, val&0x03); - mfm->command &= 0xfc; - if (val & 2) - fatal("WD1003: READ with ECC\n"); - mfm->status = STAT_BUSY; - timer_set_delay_u64(&mfm->callback_timer, 200 * MFM_TIME); - break; + default: + mfm->command = val; + switch (val) { + case CMD_READ: + case CMD_READ + 1: + case CMD_READ + 2: + case CMD_READ + 3: + st506_at_log("WD1003(%d) read, opt=%d\n", + mfm->drvsel, val & 0x03); + mfm->command &= 0xfc; + if (val & 2) + fatal("WD1003: READ with ECC\n"); + mfm->status = STAT_BUSY; + timer_set_delay_u64(&mfm->callback_timer, 200 * MFM_TIME); + break; - case CMD_WRITE: - case CMD_WRITE+1: - case CMD_WRITE+2: - case CMD_WRITE+3: - st506_at_log("WD1003(%d) write, opt=%d\n", - mfm->drvsel, val & 0x03); - mfm->command &= 0xfc; - if (val & 2) - fatal("WD1003: WRITE with ECC\n"); - mfm->status = STAT_READY|STAT_DRQ|STAT_DSC; - mfm->pos = 0; - break; + case CMD_WRITE: + case CMD_WRITE + 1: + case CMD_WRITE + 2: + case CMD_WRITE + 3: + st506_at_log("WD1003(%d) write, opt=%d\n", + mfm->drvsel, val & 0x03); + mfm->command &= 0xfc; + if (val & 2) + fatal("WD1003: WRITE with ECC\n"); + mfm->status = STAT_READY | STAT_DRQ | STAT_DSC; + mfm->pos = 0; + break; - case CMD_VERIFY: - case CMD_VERIFY+1: - mfm->command &= 0xfe; - mfm->status = STAT_BUSY; - timer_set_delay_u64(&mfm->callback_timer, 200 * MFM_TIME); - break; + case CMD_VERIFY: + case CMD_VERIFY + 1: + mfm->command &= 0xfe; + mfm->status = STAT_BUSY; + timer_set_delay_u64(&mfm->callback_timer, 200 * MFM_TIME); + break; - case CMD_FORMAT: - mfm->status = STAT_DRQ|STAT_BUSY; - mfm->pos = 0; - break; + case CMD_FORMAT: + mfm->status = STAT_DRQ | STAT_BUSY; + mfm->pos = 0; + break; - case CMD_DIAGNOSE: - mfm->status = STAT_BUSY; - timer_set_delay_u64(&mfm->callback_timer, 200 * MFM_TIME); - break; + case CMD_DIAGNOSE: + mfm->status = STAT_BUSY; + timer_set_delay_u64(&mfm->callback_timer, 200 * MFM_TIME); + break; - case CMD_SET_PARAMETERS: - /* - * NOTE: - * - * We currently just set these parameters, and - * never bother to check if they "fit within" - * the actual parameters, as determined by the - * image loader. - * - * The difference in parameters is OK, and - * occurs when the BIOS or operating system - * decides to use a different translation - * scheme, but either way, it SHOULD always - * fit within the actual parameters! - * - * We SHOULD check that here!! --FvK - */ - if (drive->cfg_spt == 0) { - /* Only accept after RESET or DIAG. */ - drive->cfg_spt = mfm->secount; - drive->cfg_hpc = mfm->head+1; - st506_at_log("WD1003(%d) parameters: tracks=%d, spt=%i, hpc=%i\n", - mfm->drvsel, drive->tracks, - drive->cfg_spt, drive->cfg_hpc); - } else { - st506_at_log("WD1003(%d) parameters: tracks=%d,spt=%i,hpc=%i (IGNORED)\n", - mfm->drvsel, drive->tracks, - drive->cfg_spt, drive->cfg_hpc); - } - mfm->command = 0x00; - mfm->status = STAT_READY|STAT_DSC; - mfm->error = 1; - irq_raise(mfm); - break; + case CMD_SET_PARAMETERS: + /* + * NOTE: + * + * We currently just set these parameters, and + * never bother to check if they "fit within" + * the actual parameters, as determined by the + * image loader. + * + * The difference in parameters is OK, and + * occurs when the BIOS or operating system + * decides to use a different translation + * scheme, but either way, it SHOULD always + * fit within the actual parameters! + * + * We SHOULD check that here!! --FvK + */ + if (drive->cfg_spt == 0) { + /* Only accept after RESET or DIAG. */ + drive->cfg_spt = mfm->secount; + drive->cfg_hpc = mfm->head + 1; + st506_at_log("WD1003(%d) parameters: tracks=%d, spt=%i, hpc=%i\n", + mfm->drvsel, drive->tracks, + drive->cfg_spt, drive->cfg_hpc); + } else { + st506_at_log("WD1003(%d) parameters: tracks=%d,spt=%i,hpc=%i (IGNORED)\n", + mfm->drvsel, drive->tracks, + drive->cfg_spt, drive->cfg_hpc); + } + mfm->command = 0x00; + mfm->status = STAT_READY | STAT_DSC; + mfm->error = 1; + irq_raise(mfm); + break; - default: - st506_at_log("WD1003: bad command %02X\n", val); - mfm->status = STAT_BUSY; - timer_set_delay_u64(&mfm->callback_timer, 200 * MFM_TIME); - break; - } + default: + st506_at_log("WD1003: bad command %02X\n", val); + mfm->status = STAT_BUSY; + timer_set_delay_u64(&mfm->callback_timer, 200 * MFM_TIME); + break; + } } } - static void mfm_writew(uint16_t port, uint16_t val, void *priv) { - mfm_t *mfm = (mfm_t *)priv; + mfm_t *mfm = (mfm_t *) priv; if (port > 0x01f0) { - mfm_write(port, val & 0xff, priv); - if (port != 0x01f7) - mfm_write(port + 1, (val >> 8) & 0xff, priv); + mfm_write(port, val & 0xff, priv); + if (port != 0x01f7) + mfm_write(port + 1, (val >> 8) & 0xff, priv); } else { - mfm->buffer[mfm->pos >> 1] = val; - mfm->pos += 2; + mfm->buffer[mfm->pos >> 1] = val; + mfm->pos += 2; - if (mfm->pos >= 512) { - mfm->pos = 0; - mfm->status = STAT_BUSY; - timer_set_delay_u64(&mfm->callback_timer, SECTOR_TIME); - } + if (mfm->pos >= 512) { + mfm->pos = 0; + mfm->status = STAT_BUSY; + timer_set_delay_u64(&mfm->callback_timer, SECTOR_TIME); + } } } - static void mfm_write(uint16_t port, uint8_t val, void *priv) { - mfm_t *mfm = (mfm_t *)priv; + mfm_t *mfm = (mfm_t *) priv; st506_at_log("WD1003 write(%04x, %02x)\n", port, val); switch (port) { - case 0x01f0: /* data */ - mfm_writew(port, val | (val << 8), priv); - return; + case 0x01f0: /* data */ + mfm_writew(port, val | (val << 8), priv); + return; - case 0x01f1: /* write precompenstation */ - mfm->precomp = val; - return; + case 0x01f1: /* write precompenstation */ + mfm->precomp = val; + return; - case 0x01f2: /* sector count */ - mfm->secount = val; - return; + case 0x01f2: /* sector count */ + mfm->secount = val; + return; - case 0x01f3: /* sector */ - mfm->sector = val; - return; + case 0x01f3: /* sector */ + mfm->sector = val; + return; - case 0x01f4: /* cylinder low */ - mfm->cylinder = (mfm->cylinder & 0xff00) | val; - return; + case 0x01f4: /* cylinder low */ + mfm->cylinder = (mfm->cylinder & 0xff00) | val; + return; - case 0x01f5: /* cylinder high */ - mfm->cylinder = (mfm->cylinder & 0xff) | (val << 8); - return; + case 0x01f5: /* cylinder high */ + mfm->cylinder = (mfm->cylinder & 0xff) | (val << 8); + return; - case 0x01f6: /* drive/head */ - mfm->head = val & 0xF; - mfm->drvsel = (val & 0x10) ? 1 : 0; - if (mfm->drives[mfm->drvsel].present) - mfm->status = STAT_READY|STAT_DSC; - else - mfm->status = 0; - return; + case 0x01f6: /* drive/head */ + mfm->head = val & 0xF; + mfm->drvsel = (val & 0x10) ? 1 : 0; + if (mfm->drives[mfm->drvsel].present) + mfm->status = STAT_READY | STAT_DSC; + else + mfm->status = 0; + return; - case 0x01f7: /* command register */ - mfm_cmd(mfm, val); - break; + case 0x01f7: /* command register */ + mfm_cmd(mfm, val); + break; - case 0x03f6: /* device control */ - val &= 0x0f; - if ((mfm->fdisk & 0x04) && !(val & 0x04)) { - timer_set_delay_u64(&mfm->callback_timer, 500 * MFM_TIME); - mfm->reset = 1; - mfm->status = STAT_BUSY; - } + case 0x03f6: /* device control */ + val &= 0x0f; + if ((mfm->fdisk & 0x04) && !(val & 0x04)) { + timer_set_delay_u64(&mfm->callback_timer, 500 * MFM_TIME); + mfm->reset = 1; + mfm->status = STAT_BUSY; + } - if (val & 0x04) { - /* Drive held in reset. */ - timer_disable(&mfm->callback_timer); - mfm->status = STAT_BUSY; - } - mfm->fdisk = val; - irq_update(mfm); - break; + if (val & 0x04) { + /* Drive held in reset. */ + timer_disable(&mfm->callback_timer); + mfm->status = STAT_BUSY; + } + mfm->fdisk = val; + irq_update(mfm); + break; } } - static uint16_t mfm_readw(uint16_t port, void *priv) { - mfm_t *mfm = (mfm_t *)priv; + mfm_t *mfm = (mfm_t *) priv; uint16_t ret; if (port > 0x01f0) { - ret = mfm_read(port, priv); - if (port == 0x01f7) - ret |= 0xff00; - else - ret |= (mfm_read(port + 1, priv) << 8); + ret = mfm_read(port, priv); + if (port == 0x01f7) + ret |= 0xff00; + else + ret |= (mfm_read(port + 1, priv) << 8); } else { - ret = mfm->buffer[mfm->pos >> 1]; - mfm->pos += 2; - if (mfm->pos >= 512) { - mfm->pos = 0; - mfm->status = STAT_READY|STAT_DSC; - if (mfm->command == CMD_READ) { - mfm->secount = (mfm->secount - 1) & 0xff; - if (mfm->secount) { - next_sector(mfm); - mfm->status = STAT_BUSY | STAT_READY | STAT_DSC; - timer_set_delay_u64(&mfm->callback_timer, SECTOR_TIME); - } else - ui_sb_update_icon(SB_HDD|HDD_BUS_MFM, 0); - } - } + ret = mfm->buffer[mfm->pos >> 1]; + mfm->pos += 2; + if (mfm->pos >= 512) { + mfm->pos = 0; + mfm->status = STAT_READY | STAT_DSC; + if (mfm->command == CMD_READ) { + mfm->secount = (mfm->secount - 1) & 0xff; + if (mfm->secount) { + next_sector(mfm); + mfm->status = STAT_BUSY | STAT_READY | STAT_DSC; + timer_set_delay_u64(&mfm->callback_timer, SECTOR_TIME); + } else + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); + } + } } - return(ret); + return (ret); } - static uint8_t mfm_read(uint16_t port, void *priv) { - mfm_t *mfm = (mfm_t *)priv; + mfm_t *mfm = (mfm_t *) priv; uint8_t ret = 0xff; switch (port) { - case 0x01f0: /* data */ - ret = mfm_readw(port, mfm) & 0xff; - break; + case 0x01f0: /* data */ + ret = mfm_readw(port, mfm) & 0xff; + break; - case 0x01f1: /* error */ - ret = mfm->error; - break; + case 0x01f1: /* error */ + ret = mfm->error; + break; - case 0x01f2: /* sector count */ - ret = mfm->secount; - break; + case 0x01f2: /* sector count */ + ret = mfm->secount; + break; - case 0x01f3: /* sector */ - ret = mfm->sector; - break; + case 0x01f3: /* sector */ + ret = mfm->sector; + break; - case 0x01f4: /* CYlinder low */ - ret = (uint8_t)(mfm->cylinder&0xff); - break; + case 0x01f4: /* CYlinder low */ + ret = (uint8_t) (mfm->cylinder & 0xff); + break; - case 0x01f5: /* Cylinder high */ - ret = (uint8_t)(mfm->cylinder>>8); - break; + case 0x01f5: /* Cylinder high */ + ret = (uint8_t) (mfm->cylinder >> 8); + break; - case 0x01f6: /* drive/head */ - ret = (uint8_t)(0xa0 | mfm->head | (mfm->drvsel?0x10:0)); - break; + case 0x01f6: /* drive/head */ + ret = (uint8_t) (0xa0 | mfm->head | (mfm->drvsel ? 0x10 : 0)); + break; - case 0x01f7: /* Status */ - irq_lower(mfm); - ret = mfm->status; - break; + case 0x01f7: /* Status */ + irq_lower(mfm); + ret = mfm->status; + break; - default: - break; + default: + break; } st506_at_log("WD1003 read(%04x) = %02x\n", port, ret); - return(ret); + return (ret); } - static void do_seek(mfm_t *mfm) { drive_t *drive = &mfm->drives[mfm->drvsel]; st506_at_log("WD1003(%d) seek(%d) max=%d\n", - mfm->drvsel,mfm->cylinder,drive->tracks); + mfm->drvsel, mfm->cylinder, drive->tracks); if (mfm->cylinder < drive->tracks) - drive->curcyl = mfm->cylinder; - else - drive->curcyl = drive->tracks-1; + drive->curcyl = mfm->cylinder; + else + drive->curcyl = drive->tracks - 1; } - static void do_callback(void *priv) { - mfm_t *mfm = (mfm_t *)priv; + mfm_t *mfm = (mfm_t *) priv; drive_t *drive = &mfm->drives[mfm->drvsel]; - off64_t addr; + off64_t addr; if (mfm->reset) { - st506_at_log("WD1003(%d) reset\n", mfm->drvsel); + st506_at_log("WD1003(%d) reset\n", mfm->drvsel); - mfm->status = STAT_READY|STAT_DSC; - mfm->error = 1; - mfm->secount = 1; - mfm->sector = 1; - mfm->head = 0; - mfm->cylinder = 0; + mfm->status = STAT_READY | STAT_DSC; + mfm->error = 1; + mfm->secount = 1; + mfm->sector = 1; + mfm->head = 0; + mfm->cylinder = 0; - drive->steprate = 0x0f; /* default steprate */ - drive->cfg_spt = 0; /* need new parameters */ + drive->steprate = 0x0f; /* default steprate */ + drive->cfg_spt = 0; /* need new parameters */ - mfm->reset = 0; + mfm->reset = 0; - ui_sb_update_icon(SB_HDD|HDD_BUS_MFM, 0); + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); - return; + return; } switch (mfm->command) { - case CMD_SEEK: - st506_at_log("WD1003(%d) seek, step=%d\n", - mfm->drvsel, drive->steprate); - do_seek(mfm); - mfm->status = STAT_READY|STAT_DSC; - irq_raise(mfm); - break; + case CMD_SEEK: + st506_at_log("WD1003(%d) seek, step=%d\n", + mfm->drvsel, drive->steprate); + do_seek(mfm); + mfm->status = STAT_READY | STAT_DSC; + irq_raise(mfm); + break; - case CMD_READ: - st506_at_log("WD1003(%d) read(%d,%d,%d)\n", - mfm->drvsel, mfm->cylinder, mfm->head, mfm->sector); - do_seek(mfm); - if (get_sector(mfm, &addr)) { - mfm->error = ERR_ID_NOT_FOUND; - mfm->status = STAT_READY|STAT_DSC|STAT_ERR; - irq_raise(mfm); - break; - } + case CMD_READ: + st506_at_log("WD1003(%d) read(%d,%d,%d)\n", + mfm->drvsel, mfm->cylinder, mfm->head, mfm->sector); + do_seek(mfm); + if (get_sector(mfm, &addr)) { + mfm->error = ERR_ID_NOT_FOUND; + mfm->status = STAT_READY | STAT_DSC | STAT_ERR; + irq_raise(mfm); + break; + } - hdd_image_read(drive->hdd_num, addr, 1, (uint8_t *)mfm->buffer); + hdd_image_read(drive->hdd_num, addr, 1, (uint8_t *) mfm->buffer); - mfm->pos = 0; - mfm->status = STAT_DRQ|STAT_READY|STAT_DSC; - irq_raise(mfm); - ui_sb_update_icon(SB_HDD|HDD_BUS_MFM, 1); - break; + mfm->pos = 0; + mfm->status = STAT_DRQ | STAT_READY | STAT_DSC; + irq_raise(mfm); + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); + break; - case CMD_WRITE: - st506_at_log("WD1003(%d) write(%d,%d,%d)\n", - mfm->drvsel, mfm->cylinder, mfm->head, mfm->sector); - do_seek(mfm); - if (get_sector(mfm, &addr)) { - mfm->error = ERR_ID_NOT_FOUND; - mfm->status = STAT_READY|STAT_DSC|STAT_ERR; - irq_raise(mfm); - break; - } + case CMD_WRITE: + st506_at_log("WD1003(%d) write(%d,%d,%d)\n", + mfm->drvsel, mfm->cylinder, mfm->head, mfm->sector); + do_seek(mfm); + if (get_sector(mfm, &addr)) { + mfm->error = ERR_ID_NOT_FOUND; + mfm->status = STAT_READY | STAT_DSC | STAT_ERR; + irq_raise(mfm); + break; + } - hdd_image_write(drive->hdd_num, addr, 1,(uint8_t *)mfm->buffer); - irq_raise(mfm); - mfm->secount = (mfm->secount - 1) & 0xff; + hdd_image_write(drive->hdd_num, addr, 1, (uint8_t *) mfm->buffer); + irq_raise(mfm); + mfm->secount = (mfm->secount - 1) & 0xff; - mfm->status = STAT_READY|STAT_DSC; - if (mfm->secount) { - /* More sectors to do.. */ - mfm->status |= STAT_DRQ; - mfm->pos = 0; - next_sector(mfm); - ui_sb_update_icon(SB_HDD|HDD_BUS_MFM, 1); - } else - ui_sb_update_icon(SB_HDD|HDD_BUS_MFM, 0); - break; + mfm->status = STAT_READY | STAT_DSC; + if (mfm->secount) { + /* More sectors to do.. */ + mfm->status |= STAT_DRQ; + mfm->pos = 0; + next_sector(mfm); + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); + } else + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); + break; - case CMD_VERIFY: - st506_at_log("WD1003(%d) verify(%d,%d,%d)\n", - mfm->drvsel, mfm->cylinder, mfm->head, mfm->sector); - do_seek(mfm); - mfm->pos = 0; - mfm->status = STAT_READY|STAT_DSC; - irq_raise(mfm); - ui_sb_update_icon(SB_HDD|HDD_BUS_MFM, 1); - break; + case CMD_VERIFY: + st506_at_log("WD1003(%d) verify(%d,%d,%d)\n", + mfm->drvsel, mfm->cylinder, mfm->head, mfm->sector); + do_seek(mfm); + mfm->pos = 0; + mfm->status = STAT_READY | STAT_DSC; + irq_raise(mfm); + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); + break; - case CMD_FORMAT: - st506_at_log("WD1003(%d) format(%d,%d)\n", - mfm->drvsel, mfm->cylinder, mfm->head); - do_seek(mfm); - if (get_sector(mfm, &addr)) { - mfm->error = ERR_ID_NOT_FOUND; - mfm->status = STAT_READY|STAT_DSC|STAT_ERR; - irq_raise(mfm); - break; - } + case CMD_FORMAT: + st506_at_log("WD1003(%d) format(%d,%d)\n", + mfm->drvsel, mfm->cylinder, mfm->head); + do_seek(mfm); + if (get_sector(mfm, &addr)) { + mfm->error = ERR_ID_NOT_FOUND; + mfm->status = STAT_READY | STAT_DSC | STAT_ERR; + irq_raise(mfm); + break; + } - hdd_image_zero(drive->hdd_num, addr, mfm->secount); + hdd_image_zero(drive->hdd_num, addr, mfm->secount); - mfm->status = STAT_READY|STAT_DSC; - irq_raise(mfm); - ui_sb_update_icon(SB_HDD|HDD_BUS_MFM, 1); - break; + mfm->status = STAT_READY | STAT_DSC; + irq_raise(mfm); + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); + break; - case CMD_DIAGNOSE: - st506_at_log("WD1003(%d) diag\n", mfm->drvsel); + case CMD_DIAGNOSE: + st506_at_log("WD1003(%d) diag\n", mfm->drvsel); - /* This is basically controller diagnostics - it resets drive select to 0, - and resets error and status to ready, DSC, and no error detected. */ - mfm->drvsel = 0; - drive = &mfm->drives[mfm->drvsel]; + /* This is basically controller diagnostics - it resets drive select to 0, + and resets error and status to ready, DSC, and no error detected. */ + mfm->drvsel = 0; + drive = &mfm->drives[mfm->drvsel]; - drive->steprate = 0x0f; - mfm->error = 1; - mfm->status = STAT_READY|STAT_DSC; - irq_raise(mfm); - break; + drive->steprate = 0x0f; + mfm->error = 1; + mfm->status = STAT_READY | STAT_DSC; + irq_raise(mfm); + break; - default: - st506_at_log("WD1003(%d) callback on unknown command %02x\n", - mfm->drvsel, mfm->command); - mfm->status = STAT_READY|STAT_ERR|STAT_DSC; - mfm->error = ERR_ABRT; - irq_raise(mfm); - break; + default: + st506_at_log("WD1003(%d) callback on unknown command %02x\n", + mfm->drvsel, mfm->command); + mfm->status = STAT_READY | STAT_ERR | STAT_DSC; + mfm->error = ERR_ABRT; + irq_raise(mfm); + break; } } - static void loadhd(mfm_t *mfm, int c, int d, const char *fn) { drive_t *drive = &mfm->drives[c]; - if (! hdd_image_load(d)) { - drive->present = 0; + if (!hdd_image_load(d)) { + drive->present = 0; - return; + return; } - drive->spt = hdd[d].spt; - drive->hpc = hdd[d].hpc; - drive->tracks = hdd[d].tracks; + drive->spt = hdd[d].spt; + drive->hpc = hdd[d].hpc; + drive->tracks = hdd[d].tracks; drive->hdd_num = d; drive->present = 1; } - static void * mfm_init(const device_t *info) { mfm_t *mfm; - int c, d; + int c, d; st506_at_log("WD1003: ISA MFM/RLL Fixed Disk Adapter initializing ...\n"); mfm = malloc(sizeof(mfm_t)); memset(mfm, 0x00, sizeof(mfm_t)); c = 0; - for (d=0; d= MFM_NUM) break; - } + if (++c >= MFM_NUM) + break; + } } - mfm->status = STAT_READY|STAT_DSC; /* drive is ready */ - mfm->error = 1; /* no errors */ + mfm->status = STAT_READY | STAT_DSC; /* drive is ready */ + mfm->error = 1; /* no errors */ io_sethandler(0x01f0, 1, - mfm_read, mfm_readw, NULL, mfm_write, mfm_writew, NULL, mfm); + mfm_read, mfm_readw, NULL, mfm_write, mfm_writew, NULL, mfm); io_sethandler(0x01f1, 7, - mfm_read, mfm_readw, NULL, mfm_write, mfm_writew, NULL, mfm); + mfm_read, mfm_readw, NULL, mfm_write, mfm_writew, NULL, mfm); io_sethandler(0x03f6, 1, - NULL, NULL, NULL, mfm_write, NULL, NULL, mfm); + NULL, NULL, NULL, mfm_write, NULL, NULL, mfm); timer_add(&mfm->callback_timer, do_callback, mfm, 0); - ui_sb_update_icon(SB_HDD|HDD_BUS_MFM, 0); + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); - return(mfm); + return (mfm); } - static void mfm_close(void *priv) { - mfm_t *mfm = (mfm_t *)priv; - int d; + mfm_t *mfm = (mfm_t *) priv; + int d; - for (d=0; d<2; d++) { - drive_t *drive = &mfm->drives[d]; + for (d = 0; d < 2; d++) { + drive_t *drive = &mfm->drives[d]; - hdd_image_close(drive->hdd_num); + hdd_image_close(drive->hdd_num); } free(mfm); - ui_sb_update_icon(SB_HDD|HDD_BUS_MFM, 0); + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); } const device_t st506_at_wd1003_device = { - .name = "WD1003 AT MFM/RLL Controller", + .name = "WD1003 AT MFM/RLL Controller", .internal_name = "st506_at", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 0, - .init = mfm_init, - .close = mfm_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 0, + .init = mfm_init, + .close = mfm_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/disk/hdc_st506_xt.c b/src/disk/hdc_st506_xt.c index e8c43fdc1..cedeb1220 100644 --- a/src/disk/hdc_st506_xt.c +++ b/src/disk/hdc_st506_xt.c @@ -87,121 +87,118 @@ #include <86box/hdc.h> #include <86box/hdd.h> - -#define XEBEC_BIOS_FILE "roms/hdd/st506/ibm_xebec_62x0822_1985.bin" -#define DTC_BIOS_FILE "roms/hdd/st506/dtc_cxd21a.bin" -#define ST11_BIOS_FILE_OLD "roms/hdd/st506/st11_bios_vers_1.7.bin" -#define ST11_BIOS_FILE_NEW "roms/hdd/st506/st11_bios_vers_2.0.bin" -#define WD1002A_WX1_BIOS_FILE "roms/hdd/st506/wd1002a_wx1-62-000094-032.bin" -#define WD1004A_WX1_BIOS_FILE "roms/hdd/st506/wd1002a_wx1-62-000094-032.bin" +#define XEBEC_BIOS_FILE "roms/hdd/st506/ibm_xebec_62x0822_1985.bin" +#define DTC_BIOS_FILE "roms/hdd/st506/dtc_cxd21a.bin" +#define ST11_BIOS_FILE_OLD "roms/hdd/st506/st11_bios_vers_1.7.bin" +#define ST11_BIOS_FILE_NEW "roms/hdd/st506/st11_bios_vers_2.0.bin" +#define WD1002A_WX1_BIOS_FILE "roms/hdd/st506/wd1002a_wx1-62-000094-032.bin" +#define WD1004A_WX1_BIOS_FILE "roms/hdd/st506/wd1002a_wx1-62-000094-032.bin" /* SuperBIOS was for both the WX1 and 27X, users jumpers readout to determine if to use 26 sectors per track, 26 -> 17 sectors per track translation, or 17 sectors per track. */ -#define WD1002A_27X_BIOS_FILE "roms/hdd/st506/wd1002a_27x-62-000094-032.bin" -#define WD1004_27X_BIOS_FILE "roms/hdd/st506/western_digital_WD1004A-27X.bin" -#define WD1004A_27X_BIOS_FILE "roms/hdd/st506/western_digital_WD1004A-27X.bin" +#define WD1002A_27X_BIOS_FILE "roms/hdd/st506/wd1002a_27x-62-000094-032.bin" +#define WD1004_27X_BIOS_FILE "roms/hdd/st506/western_digital_WD1004A-27X.bin" +#define WD1004A_27X_BIOS_FILE "roms/hdd/st506/western_digital_WD1004A-27X.bin" - -#define ST506_TIME (250 * TIMER_USEC) -#define ST506_TIME_MS (1000 * TIMER_USEC) +#define ST506_TIME (250 * TIMER_USEC) +#define ST506_TIME_MS (1000 * TIMER_USEC) /* MFM and RLL use different sectors/track. */ -#define SECTOR_SIZE 512 -#define MFM_SECTORS 17 -#define RLL_SECTORS 26 - +#define SECTOR_SIZE 512 +#define MFM_SECTORS 17 +#define RLL_SECTORS 26 /* Status register. */ -#define STAT_REQ 0x01 /* controller ready */ -#define STAT_IO 0x02 /* input, data to host */ -#define STAT_CD 0x04 /* command mode (else data) */ -#define STAT_BSY 0x08 /* controller is busy */ -#define STAT_DRQ 0x10 /* controller needs DMA */ -#define STAT_IRQ 0x20 /* interrupt, we have info */ +#define STAT_REQ 0x01 /* controller ready */ +#define STAT_IO 0x02 /* input, data to host */ +#define STAT_CD 0x04 /* command mode (else data) */ +#define STAT_BSY 0x08 /* controller is busy */ +#define STAT_DRQ 0x10 /* controller needs DMA */ +#define STAT_IRQ 0x20 /* interrupt, we have info */ /* DMA/IRQ enable register. */ -#define DMA_ENA 0x01 /* DMA operation enabled */ -#define IRQ_ENA 0x02 /* IRQ operation enabled */ +#define DMA_ENA 0x01 /* DMA operation enabled */ +#define IRQ_ENA 0x02 /* IRQ operation enabled */ /* Error codes in sense report. */ -#define ERR_BV 0x80 -#define ERR_TYPE_MASK 0x30 -#define ERR_TYPE_SHIFT 4 -# define ERR_TYPE_DRIVE 0x00 -# define ERR_TYPE_CONTROLLER 0x01 -# define ERR_TYPE_COMMAND 0x02 -# define ERR_TYPE_MISC 0x03 +#define ERR_BV 0x80 +#define ERR_TYPE_MASK 0x30 +#define ERR_TYPE_SHIFT 4 +#define ERR_TYPE_DRIVE 0x00 +#define ERR_TYPE_CONTROLLER 0x01 +#define ERR_TYPE_COMMAND 0x02 +#define ERR_TYPE_MISC 0x03 /* No, um, errors.. */ -#define ERR_NONE 0x00 +#define ERR_NONE 0x00 /* Group 0: drive errors. */ -#define ERR_NO_SEEK 0x02 /* no seek_complete */ -#define ERR_WR_FAULT 0x03 /* write fault */ -#define ERR_NOT_READY 0x04 /* drive not ready */ -#define ERR_NO_TRACK0 0x06 /* track 0 not found */ -#define ERR_STILL_SEEKING 0x08 /* drive is still seeking */ -#define ERR_NOT_AVAILABLE 0x09 /* drive not available */ +#define ERR_NO_SEEK 0x02 /* no seek_complete */ +#define ERR_WR_FAULT 0x03 /* write fault */ +#define ERR_NOT_READY 0x04 /* drive not ready */ +#define ERR_NO_TRACK0 0x06 /* track 0 not found */ +#define ERR_STILL_SEEKING 0x08 /* drive is still seeking */ +#define ERR_NOT_AVAILABLE 0x09 /* drive not available */ /* Group 1: controller errors. */ -#define ERR_ID_FAULT 0x10 /* could not read ID field */ -#define ERR_UNC_ERR 0x11 /* uncorrectable data */ -#define ERR_SECTOR_ADDR 0x12 /* sector address */ -#define ERR_DATA_ADDR 0x13 /* data mark not found */ -#define ERR_TARGET_SECTOR 0x14 /* target sector not found */ -#define ERR_SEEK_ERROR 0x15 /* seek error- cyl not found */ -#define ERR_CORR_ERR 0x18 /* correctable data */ -#define ERR_BAD_TRACK 0x19 /* track is flagged as bad */ -#define ERR_ALT_TRACK_FLAGGED 0x1c /* alt trk not flagged as alt */ -#define ERR_ALT_TRACK_ACCESS 0x1e /* illegal access to alt trk */ -#define ERR_NO_RECOVERY 0x1f /* recovery mode not avail */ +#define ERR_ID_FAULT 0x10 /* could not read ID field */ +#define ERR_UNC_ERR 0x11 /* uncorrectable data */ +#define ERR_SECTOR_ADDR 0x12 /* sector address */ +#define ERR_DATA_ADDR 0x13 /* data mark not found */ +#define ERR_TARGET_SECTOR 0x14 /* target sector not found */ +#define ERR_SEEK_ERROR 0x15 /* seek error- cyl not found */ +#define ERR_CORR_ERR 0x18 /* correctable data */ +#define ERR_BAD_TRACK 0x19 /* track is flagged as bad */ +#define ERR_ALT_TRACK_FLAGGED 0x1c /* alt trk not flagged as alt */ +#define ERR_ALT_TRACK_ACCESS 0x1e /* illegal access to alt trk */ +#define ERR_NO_RECOVERY 0x1f /* recovery mode not avail */ /* Group 2: command errors. */ -#define ERR_BAD_COMMAND 0x20 /* invalid command */ -#define ERR_ILLEGAL_ADDR 0x21 /* address beyond disk size */ -#define ERR_BAD_PARAMETER 0x22 /* invalid command parameter */ +#define ERR_BAD_COMMAND 0x20 /* invalid command */ +#define ERR_ILLEGAL_ADDR 0x21 /* address beyond disk size */ +#define ERR_BAD_PARAMETER 0x22 /* invalid command parameter */ /* Group 3: misc errors. */ -#define ERR_BAD_RAM 0x30 /* controller has bad RAM */ -#define ERR_BAD_ROM 0x31 /* ROM failed checksum test */ -#define ERR_CRC_FAIL 0x32 /* CRC circuit failed test */ +#define ERR_BAD_RAM 0x30 /* controller has bad RAM */ +#define ERR_BAD_ROM 0x31 /* ROM failed checksum test */ +#define ERR_CRC_FAIL 0x32 /* CRC circuit failed test */ /* Controller commands. */ -#define CMD_TEST_DRIVE_READY 0x00 -#define CMD_RECALIBRATE 0x01 +#define CMD_TEST_DRIVE_READY 0x00 +#define CMD_RECALIBRATE 0x01 /* reserved 0x02 */ -#define CMD_STATUS 0x03 -#define CMD_FORMAT_DRIVE 0x04 -#define CMD_VERIFY 0x05 -#define CMD_FORMAT_TRACK 0x06 -#define CMD_FORMAT_BAD_TRACK 0x07 -#define CMD_READ 0x08 -#define CMD_REASSIGN 0x09 -#define CMD_WRITE 0x0a -#define CMD_SEEK 0x0b -#define CMD_SPECIFY 0x0c -#define CMD_READ_ECC_BURST_LEN 0x0d -#define CMD_READ_BUFFER 0x0e -#define CMD_WRITE_BUFFER 0x0f -#define CMD_ALT_TRACK 0x11 -#define CMD_INQUIRY_ST11 0x12 /* ST-11 BIOS */ -#define CMD_RAM_DIAGNOSTIC 0xe0 +#define CMD_STATUS 0x03 +#define CMD_FORMAT_DRIVE 0x04 +#define CMD_VERIFY 0x05 +#define CMD_FORMAT_TRACK 0x06 +#define CMD_FORMAT_BAD_TRACK 0x07 +#define CMD_READ 0x08 +#define CMD_REASSIGN 0x09 +#define CMD_WRITE 0x0a +#define CMD_SEEK 0x0b +#define CMD_SPECIFY 0x0c +#define CMD_READ_ECC_BURST_LEN 0x0d +#define CMD_READ_BUFFER 0x0e +#define CMD_WRITE_BUFFER 0x0f +#define CMD_ALT_TRACK 0x11 +#define CMD_INQUIRY_ST11 0x12 /* ST-11 BIOS */ +#define CMD_RAM_DIAGNOSTIC 0xe0 /* reserved 0xe1 */ /* reserved 0xe2 */ -#define CMD_DRIVE_DIAGNOSTIC 0xe3 -#define CMD_CTRLR_DIAGNOSTIC 0xe4 -#define CMD_READ_LONG 0xe5 -#define CMD_WRITE_LONG 0xe6 +#define CMD_DRIVE_DIAGNOSTIC 0xe3 +#define CMD_CTRLR_DIAGNOSTIC 0xe4 +#define CMD_READ_LONG 0xe5 +#define CMD_WRITE_LONG 0xe6 -#define CMD_FORMAT_ST11 0xf6 /* ST-11 BIOS */ -#define CMD_GET_GEOMETRY_ST11 0xf8 /* ST-11 BIOS */ -#define CMD_SET_GEOMETRY_ST11 0xfa /* ST-11 BIOS */ -#define CMD_WRITE_GEOMETRY_ST11 0xfc /* ST-11 BIOS 2.0 */ +#define CMD_FORMAT_ST11 0xf6 /* ST-11 BIOS */ +#define CMD_GET_GEOMETRY_ST11 0xf8 /* ST-11 BIOS */ +#define CMD_SET_GEOMETRY_ST11 0xfa /* ST-11 BIOS */ +#define CMD_WRITE_GEOMETRY_ST11 0xfc /* ST-11 BIOS 2.0 */ -#define CMD_GET_DRIVE_PARAMS_DTC 0xfb /* DTC */ -#define CMD_SET_STEP_RATE_DTC 0xfc /* DTC */ -#define CMD_SET_GEOMETRY_DTC 0xfe /* DTC */ -#define CMD_GET_GEOMETRY_DTC 0xff /* DTC */ +#define CMD_GET_DRIVE_PARAMS_DTC 0xfb /* DTC */ +#define CMD_SET_STEP_RATE_DTC 0xfc /* DTC */ +#define CMD_SET_GEOMETRY_DTC 0xfe /* DTC */ +#define CMD_GET_GEOMETRY_DTC 0xff /* DTC */ enum { STATE_IDLE, @@ -215,117 +212,110 @@ enum { STATE_DONE }; - typedef struct { - int8_t present; - uint8_t hdd_num; + int8_t present; + uint8_t hdd_num; - uint8_t interleave; /* default interleave */ - char pad; + uint8_t interleave; /* default interleave */ + char pad; - uint16_t cylinder; /* current cylinder */ + uint16_t cylinder; /* current cylinder */ - uint8_t spt, /* physical parameters */ - hpc; - uint16_t tracks; + uint8_t spt, /* physical parameters */ + hpc; + uint16_t tracks; - uint8_t cfg_spt, /* configured parameters */ - cfg_hpc; - uint16_t cfg_cyl; + uint8_t cfg_spt, /* configured parameters */ + cfg_hpc; + uint16_t cfg_cyl; } drive_t; - typedef struct { - uint8_t type; /* controller type */ + uint8_t type; /* controller type */ - uint8_t spt; /* sectors-per-track for controller */ + uint8_t spt; /* sectors-per-track for controller */ - uint16_t base; /* controller configuration */ - int8_t irq, - dma; - uint8_t switches; - uint8_t misc; - uint8_t nr_err, err_bv, cur_sec, pad; - uint32_t bios_addr, - bios_size, - bios_ram; - rom_t bios_rom; + uint16_t base; /* controller configuration */ + int8_t irq, + dma; + uint8_t switches; + uint8_t misc; + uint8_t nr_err, err_bv, cur_sec, pad; + uint32_t bios_addr, + bios_size, + bios_ram; + rom_t bios_rom; - int state; /* operational data */ - uint8_t irq_dma; - uint8_t error; - uint8_t status; - int8_t cyl_off; /* for ST-11, cylinder0 offset */ - pc_timer_t timer; + int state; /* operational data */ + uint8_t irq_dma; + uint8_t error; + uint8_t status; + int8_t cyl_off; /* for ST-11, cylinder0 offset */ + pc_timer_t timer; - uint8_t command[6]; /* current command request */ - int drive_sel; - int sector, - head, - cylinder, - count; - uint8_t compl; /* current request completion code */ + uint8_t command[6]; /* current command request */ + int drive_sel; + int sector, + head, + cylinder, + count; + uint8_t compl ; /* current request completion code */ - int buff_pos, /* pointers to the RAM buffer */ - buff_cnt; + int buff_pos, /* pointers to the RAM buffer */ + buff_cnt; - drive_t drives[MFM_NUM]; /* the attached drives */ - uint8_t scratch[64]; /* ST-11 scratchpad RAM */ - uint8_t buff[SECTOR_SIZE + 4]; /* sector buffer RAM (+ ECC bytes) */ + drive_t drives[MFM_NUM]; /* the attached drives */ + uint8_t scratch[64]; /* ST-11 scratchpad RAM */ + uint8_t buff[SECTOR_SIZE + 4]; /* sector buffer RAM (+ ECC bytes) */ } hdc_t; - /* Supported drives table for the Xebec controller. */ typedef struct { - uint16_t tracks; - uint8_t hpc; - uint8_t spt; + uint16_t tracks; + uint8_t hpc; + uint8_t spt; } hd_type_t; hd_type_t hd_types[4] = { - { 306, 4, MFM_SECTORS }, /* type 0 */ - { 612, 4, MFM_SECTORS }, /* type 16 */ - { 615, 4, MFM_SECTORS }, /* type 2 */ - { 306, 8, MFM_SECTORS } /* type 13 */ + {306, 4, MFM_SECTORS}, /* type 0 */ + { 612, 4, MFM_SECTORS}, /* type 16 */ + { 615, 4, MFM_SECTORS}, /* type 2 */ + { 306, 8, MFM_SECTORS} /* type 13 */ }; - #ifdef ENABLE_ST506_XT_LOG int st506_xt_do_log = ENABLE_ST506_XT_LOG; - static void st506_xt_log(const char *fmt, ...) { va_list ap; if (st506_xt_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define st506_xt_log(fmt, ...) +# define st506_xt_log(fmt, ...) #endif - static void st506_complete(hdc_t *dev) { dev->status = STAT_REQ | STAT_CD | STAT_IO | STAT_BSY; - dev->state = STATE_COMPLETION_BYTE; + dev->state = STATE_COMPLETION_BYTE; if (dev->irq_dma & DMA_ENA) - dma_set_drq(dev->dma, 0); + dma_set_drq(dev->dma, 0); if (dev->irq_dma & IRQ_ENA) { - dev->status |= STAT_IRQ; - picint(1 << dev->irq); + dev->status |= STAT_IRQ; + picint(1 << dev->irq); } } - static void st506_error(hdc_t *dev, uint8_t err) { @@ -333,21 +323,20 @@ st506_error(hdc_t *dev, uint8_t err) dev->error = err; } - static int get_sector(hdc_t *dev, drive_t *drive, off64_t *addr) { - if (! drive->present) { - /* No need to log this. */ - dev->error = dev->nr_err; - return(0); + if (!drive->present) { + /* No need to log this. */ + dev->error = dev->nr_err; + return (0); } #if 0 if (drive->cylinder != dev->cylinder) { -#ifdef ENABLE_ST506_XT_LOG +# ifdef ENABLE_ST506_XT_LOG st506_xt_log("ST506: get_sector: wrong cylinder\n"); -#endif +# endif dev->error = ERR_ILLEGAL_ADDR; return(0); } @@ -355,46 +344,44 @@ get_sector(hdc_t *dev, drive_t *drive, off64_t *addr) if (dev->head >= drive->cfg_hpc) { #ifdef ENABLE_ST506_XT_LOG - st506_xt_log("ST506: get_sector: past end of configured heads\n"); + st506_xt_log("ST506: get_sector: past end of configured heads\n"); #endif - dev->error = ERR_ILLEGAL_ADDR; - return(0); + dev->error = ERR_ILLEGAL_ADDR; + return (0); } if (dev->sector >= drive->cfg_spt) { #ifdef ENABLE_ST506_XT_LOG - st506_xt_log("ST506: get_sector: past end of configured sectors\n"); + st506_xt_log("ST506: get_sector: past end of configured sectors\n"); #endif - dev->error = ERR_ILLEGAL_ADDR; - return(0); + dev->error = ERR_ILLEGAL_ADDR; + return (0); } - *addr = ((((off64_t)dev->cylinder * drive->cfg_hpc) + dev->head) * drive->cfg_spt) + dev->sector; + *addr = ((((off64_t) dev->cylinder * drive->cfg_hpc) + dev->head) * drive->cfg_spt) + dev->sector; - return(1); + return (1); } - static void next_sector(hdc_t *dev, drive_t *drive) { if (++dev->sector >= drive->cfg_spt) { - dev->sector = 0; - if (++dev->head >= drive->cfg_hpc) { - dev->head = 0; - if (++drive->cylinder >= drive->cfg_cyl) { - /* - * This really is an error, we cannot move - * past the end of the drive, which should - * result in an ERR_ILLEGAL_ADDR. --FvK - */ - drive->cylinder = drive->cfg_cyl - 1; - } else - dev->cylinder++; - } + dev->sector = 0; + if (++dev->head >= drive->cfg_hpc) { + dev->head = 0; + if (++drive->cylinder >= drive->cfg_cyl) { + /* + * This really is an error, we cannot move + * past the end of the drive, which should + * result in an ERR_ILLEGAL_ADDR. --FvK + */ + drive->cylinder = drive->cfg_cyl - 1; + } else + dev->cylinder++; + } } } - /* Extract the CHS info from a command block. */ static int get_chs(hdc_t *dev, drive_t *drive) @@ -404,899 +391,891 @@ get_chs(hdc_t *dev, drive_t *drive) dev->head = dev->command[1] & 0x1f; /* 6 bits are used for the sector number even on the IBM PC controller. */ dev->sector = dev->command[2] & 0x3f; - dev->count = dev->command[4]; + dev->count = dev->command[4]; if (((dev->type == 11) || (dev->type == 12)) && (dev->command[0] >= 0xf0)) - dev->cylinder = 0; + dev->cylinder = 0; else { - dev->cylinder = dev->command[3] | ((dev->command[2] & 0xc0) << 2); - dev->cylinder += dev->cyl_off; /* for ST-11 */ + dev->cylinder = dev->command[3] | ((dev->command[2] & 0xc0) << 2); + dev->cylinder += dev->cyl_off; /* for ST-11 */ } if (dev->cylinder >= drive->cfg_cyl) { - /* - * This really is an error, we cannot move - * past the end of the drive, which should - * result in an ERR_ILLEGAL_ADDR. --FvK - */ - drive->cylinder = drive->cfg_cyl - 1; - return(0); + /* + * This really is an error, we cannot move + * past the end of the drive, which should + * result in an ERR_ILLEGAL_ADDR. --FvK + */ + drive->cylinder = drive->cfg_cyl - 1; + return (0); } drive->cylinder = dev->cylinder; - return(1); + return (1); } - static void st506_callback(void *priv) { - hdc_t *dev = (hdc_t *)priv; + hdc_t *dev = (hdc_t *) priv; drive_t *drive; - off64_t addr; + off64_t addr; uint32_t capac; - int val; + int val; /* Get the drive info. Note that the API supports up to 8 drives! */ dev->drive_sel = (dev->command[1] >> 5) & 0x07; - drive = &dev->drives[dev->drive_sel]; + drive = &dev->drives[dev->drive_sel]; /* Preset the completion byte to "No error" and the selected drive. */ dev->compl = (dev->drive_sel << 5) | ERR_NONE; if (dev->command[0] != 3) - dev->err_bv = 0x00; + dev->err_bv = 0x00; switch (dev->command[0]) { - case CMD_TEST_DRIVE_READY: - st506_xt_log("ST506: TEST_READY(%i) = %i\n", - dev->drive_sel, drive->present); - if (! drive->present) - st506_error(dev, dev->nr_err); - st506_complete(dev); - break; + case CMD_TEST_DRIVE_READY: + st506_xt_log("ST506: TEST_READY(%i) = %i\n", + dev->drive_sel, drive->present); + if (!drive->present) + st506_error(dev, dev->nr_err); + st506_complete(dev); + break; - case CMD_RECALIBRATE: - switch (dev->state) { - case STATE_START_COMMAND: - st506_xt_log("ST506: RECALIBRATE(%i) [%i]\n", - dev->drive_sel, drive->present); - if (! drive->present) { - st506_error(dev, dev->nr_err); - st506_complete(dev); - break; - } + case CMD_RECALIBRATE: + switch (dev->state) { + case STATE_START_COMMAND: + st506_xt_log("ST506: RECALIBRATE(%i) [%i]\n", + dev->drive_sel, drive->present); + if (!drive->present) { + st506_error(dev, dev->nr_err); + st506_complete(dev); + break; + } - /* Wait 20msec. */ - timer_advance_u64(&dev->timer, ST506_TIME_MS * 20); + /* Wait 20msec. */ + timer_advance_u64(&dev->timer, ST506_TIME_MS * 20); - dev->cylinder = dev->cyl_off; - drive->cylinder = dev->cylinder; - dev->state = STATE_DONE; + dev->cylinder = dev->cyl_off; + drive->cylinder = dev->cylinder; + dev->state = STATE_DONE; - break; + break; - case STATE_DONE: - st506_complete(dev); - break; - } - break; + case STATE_DONE: + st506_complete(dev); + break; + } + break; - case CMD_STATUS: - switch (dev->state) { - case STATE_START_COMMAND: + case CMD_STATUS: + switch (dev->state) { + case STATE_START_COMMAND: #ifdef ENABLE_ST506_XT_LOG - st506_xt_log("ST506: STATUS\n"); + st506_xt_log("ST506: STATUS\n"); #endif - dev->buff_pos = 0; - dev->buff_cnt = 4; - dev->buff[0] = dev->err_bv | dev->error; - dev->error = 0; + dev->buff_pos = 0; + dev->buff_cnt = 4; + dev->buff[0] = dev->err_bv | dev->error; + dev->error = 0; - /* Give address of last operation. */ - dev->buff[1] = (dev->drive_sel ? 0x20 : 0) | - dev->head; - dev->buff[2] = ((dev->cylinder & 0x0300) >> 2) | - dev->sector; - dev->buff[3] = (dev->cylinder & 0xff); + /* Give address of last operation. */ + dev->buff[1] = (dev->drive_sel ? 0x20 : 0) | dev->head; + dev->buff[2] = ((dev->cylinder & 0x0300) >> 2) | dev->sector; + dev->buff[3] = (dev->cylinder & 0xff); - dev->status = STAT_BSY | STAT_IO | STAT_REQ; - dev->state = STATE_SEND_DATA; - break; + dev->status = STAT_BSY | STAT_IO | STAT_REQ; + dev->state = STATE_SEND_DATA; + break; - case STATE_SENT_DATA: - st506_complete(dev); - break; - } - break; + case STATE_SENT_DATA: + st506_complete(dev); + break; + } + break; - case CMD_FORMAT_DRIVE: - switch (dev->state) { - case STATE_START_COMMAND: - (void)get_chs(dev, drive); - st506_xt_log("ST506: FORMAT_DRIVE(%i) interleave=%i\n", - dev->drive_sel, dev->command[4]); - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); - timer_advance_u64(&dev->timer, ST506_TIME); - dev->state = STATE_SEND_DATA; - break; + case CMD_FORMAT_DRIVE: + switch (dev->state) { + case STATE_START_COMMAND: + (void) get_chs(dev, drive); + st506_xt_log("ST506: FORMAT_DRIVE(%i) interleave=%i\n", + dev->drive_sel, dev->command[4]); + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); + timer_advance_u64(&dev->timer, ST506_TIME); + dev->state = STATE_SEND_DATA; + break; - case STATE_SEND_DATA: /* wrong, but works */ - if (! get_sector(dev, drive, &addr)) { - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); - st506_error(dev, dev->error); - st506_complete(dev); - return; - } + case STATE_SEND_DATA: /* wrong, but works */ + if (!get_sector(dev, drive, &addr)) { + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); + st506_error(dev, dev->error); + st506_complete(dev); + return; + } - /* FIXME: should be drive->capac, not ->spt */ - capac = (drive->tracks - 1) * drive->hpc * drive->spt; - hdd_image_zero(drive->hdd_num, addr, capac); + /* FIXME: should be drive->capac, not ->spt */ + capac = (drive->tracks - 1) * drive->hpc * drive->spt; + hdd_image_zero(drive->hdd_num, addr, capac); - /* Wait 20msec per cylinder. */ - timer_advance_u64(&dev->timer, ST506_TIME_MS * 20); + /* Wait 20msec per cylinder. */ + timer_advance_u64(&dev->timer, ST506_TIME_MS * 20); - dev->state = STATE_SENT_DATA; - break; + dev->state = STATE_SENT_DATA; + break; - case STATE_SENT_DATA: - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); - st506_complete(dev); - break; - } - break; + case STATE_SENT_DATA: + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); + st506_complete(dev); + break; + } + break; - case CMD_VERIFY: - switch (dev->state) { - case STATE_START_COMMAND: - (void)get_chs(dev, drive); - st506_xt_log("ST506: VERIFY(%i, %i/%i/%i, %i)\n", - dev->drive_sel, dev->cylinder, - dev->head, dev->sector, dev->count); - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); - timer_advance_u64(&dev->timer, ST506_TIME); - dev->state = STATE_SEND_DATA; - break; + case CMD_VERIFY: + switch (dev->state) { + case STATE_START_COMMAND: + (void) get_chs(dev, drive); + st506_xt_log("ST506: VERIFY(%i, %i/%i/%i, %i)\n", + dev->drive_sel, dev->cylinder, + dev->head, dev->sector, dev->count); + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); + timer_advance_u64(&dev->timer, ST506_TIME); + dev->state = STATE_SEND_DATA; + break; - case STATE_SEND_DATA: - if (dev->count-- == 0) { - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); - st506_complete(dev); - } + case STATE_SEND_DATA: + if (dev->count-- == 0) { + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); + st506_complete(dev); + } - if (! get_sector(dev, drive, &addr)) { - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); - st506_error(dev, dev->error); - st506_complete(dev); - return; - } + if (!get_sector(dev, drive, &addr)) { + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); + st506_error(dev, dev->error); + st506_complete(dev); + return; + } - next_sector(dev, drive); + next_sector(dev, drive); - timer_advance_u64(&dev->timer, ST506_TIME); - break; - } - break; + timer_advance_u64(&dev->timer, ST506_TIME); + break; + } + break; - case CMD_FORMAT_ST11: /* This is really "Format cylinder 0" */ - if ((dev->type < 11) || (dev->type > 12)) { - st506_error(dev, ERR_BAD_COMMAND); - st506_complete(dev); - break; - } - case CMD_FORMAT_TRACK: - case CMD_FORMAT_BAD_TRACK: - switch (dev->state) { - case STATE_START_COMMAND: - (void)get_chs(dev, drive); - st506_xt_log("ST506: FORMAT_%sTRACK(%i, %i/%i)\n", - (dev->command[0] == CMD_FORMAT_BAD_TRACK) ? "BAD_" : "", - dev->drive_sel, dev->cylinder, dev->head); - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); - timer_advance_u64(&dev->timer, ST506_TIME); - dev->state = STATE_SEND_DATA; - break; + case CMD_FORMAT_ST11: /* This is really "Format cylinder 0" */ + if ((dev->type < 11) || (dev->type > 12)) { + st506_error(dev, ERR_BAD_COMMAND); + st506_complete(dev); + break; + } + case CMD_FORMAT_TRACK: + case CMD_FORMAT_BAD_TRACK: + switch (dev->state) { + case STATE_START_COMMAND: + (void) get_chs(dev, drive); + st506_xt_log("ST506: FORMAT_%sTRACK(%i, %i/%i)\n", + (dev->command[0] == CMD_FORMAT_BAD_TRACK) ? "BAD_" : "", + dev->drive_sel, dev->cylinder, dev->head); + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); + timer_advance_u64(&dev->timer, ST506_TIME); + dev->state = STATE_SEND_DATA; + break; - case STATE_SEND_DATA: /* wrong, but works */ - if (! get_sector(dev, drive, &addr)) { - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); - st506_error(dev, dev->error); - st506_complete(dev); - return; - } + case STATE_SEND_DATA: /* wrong, but works */ + if (!get_sector(dev, drive, &addr)) { + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); + st506_error(dev, dev->error); + st506_complete(dev); + return; + } - hdd_image_zero(drive->hdd_num, - addr, drive->cfg_spt); + hdd_image_zero(drive->hdd_num, + addr, drive->cfg_spt); - /* Wait 20 msec per cylinder. */ - timer_advance_u64(&dev->timer, ST506_TIME_MS * 20); + /* Wait 20 msec per cylinder. */ + timer_advance_u64(&dev->timer, ST506_TIME_MS * 20); - dev->state = STATE_SENT_DATA; - break; + dev->state = STATE_SENT_DATA; + break; - case STATE_SENT_DATA: - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); - st506_complete(dev); - break; - } - break; + case STATE_SENT_DATA: + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); + st506_complete(dev); + break; + } + break; - case CMD_GET_GEOMETRY_ST11: /* "Get geometry" is really "Read cylinder 0" */ - if ((dev->type < 11) || (dev->type > 12)) { - st506_error(dev, ERR_BAD_COMMAND); - st506_complete(dev); - break; - } - case CMD_READ: + case CMD_GET_GEOMETRY_ST11: /* "Get geometry" is really "Read cylinder 0" */ + if ((dev->type < 11) || (dev->type > 12)) { + st506_error(dev, ERR_BAD_COMMAND); + st506_complete(dev); + break; + } + case CMD_READ: #if 0 case CMD_READ_LONG: #endif - switch (dev->state) { - case STATE_START_COMMAND: - (void)get_chs(dev, drive); - st506_xt_log("ST506: READ%s(%i, %i/%i/%i, %i)\n", - (dev->command[0] == CMD_READ_LONG) ? "_LONG" : "", - dev->drive_sel, dev->cylinder, - dev->head, dev->sector, dev->count); + switch (dev->state) { + case STATE_START_COMMAND: + (void) get_chs(dev, drive); + st506_xt_log("ST506: READ%s(%i, %i/%i/%i, %i)\n", + (dev->command[0] == CMD_READ_LONG) ? "_LONG" : "", + dev->drive_sel, dev->cylinder, + dev->head, dev->sector, dev->count); - if (! get_sector(dev, drive, &addr)) { - st506_error(dev, dev->error); - st506_complete(dev); - return; - } - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); + if (!get_sector(dev, drive, &addr)) { + st506_error(dev, dev->error); + st506_complete(dev); + return; + } + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); - /* Read data from the image. */ - hdd_image_read(drive->hdd_num, addr, 1, - (uint8_t *)dev->buff); + /* Read data from the image. */ + hdd_image_read(drive->hdd_num, addr, 1, + (uint8_t *) dev->buff); - /* Set up the data transfer. */ - dev->buff_pos = 0; - dev->buff_cnt = SECTOR_SIZE; - if (dev->command[0] == CMD_READ_LONG) - dev->buff_cnt += 4; - dev->status = STAT_BSY | STAT_IO | STAT_REQ; - if (dev->irq_dma & DMA_ENA) { - timer_advance_u64(&dev->timer, ST506_TIME); - dma_set_drq(dev->dma, 1); - } - dev->state = STATE_SEND_DATA; - break; + /* Set up the data transfer. */ + dev->buff_pos = 0; + dev->buff_cnt = SECTOR_SIZE; + if (dev->command[0] == CMD_READ_LONG) + dev->buff_cnt += 4; + dev->status = STAT_BSY | STAT_IO | STAT_REQ; + if (dev->irq_dma & DMA_ENA) { + timer_advance_u64(&dev->timer, ST506_TIME); + dma_set_drq(dev->dma, 1); + } + dev->state = STATE_SEND_DATA; + break; - case STATE_SEND_DATA: - for (; dev->buff_pos < dev->buff_cnt; dev->buff_pos++) { - val = dma_channel_write(dev->dma, dev->buff[dev->buff_pos]); - if (val == DMA_NODATA) { + case STATE_SEND_DATA: + for (; dev->buff_pos < dev->buff_cnt; dev->buff_pos++) { + val = dma_channel_write(dev->dma, dev->buff[dev->buff_pos]); + if (val == DMA_NODATA) { #ifdef ENABLE_ST506_XT_LOG - st506_xt_log("ST506: CMD_READ out of data!\n"); + st506_xt_log("ST506: CMD_READ out of data!\n"); #endif - st506_error(dev, ERR_NO_RECOVERY); - st506_complete(dev); - return; - } - } - dma_set_drq(dev->dma, 0); - timer_advance_u64(&dev->timer, ST506_TIME); - dev->state = STATE_SENT_DATA; - break; + st506_error(dev, ERR_NO_RECOVERY); + st506_complete(dev); + return; + } + } + dma_set_drq(dev->dma, 0); + timer_advance_u64(&dev->timer, ST506_TIME); + dev->state = STATE_SENT_DATA; + break; - case STATE_SENT_DATA: - if (--dev->count == 0) { - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); - st506_complete(dev); - break; - } + case STATE_SENT_DATA: + if (--dev->count == 0) { + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); + st506_complete(dev); + break; + } - next_sector(dev, drive); + next_sector(dev, drive); - if (! get_sector(dev, drive, &addr)) { - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); - st506_error(dev, dev->error); - st506_complete(dev); - return; - } + if (!get_sector(dev, drive, &addr)) { + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); + st506_error(dev, dev->error); + st506_complete(dev); + return; + } - /* Read data from the image. */ - hdd_image_read(drive->hdd_num, addr, 1, - (uint8_t *)dev->buff); + /* Read data from the image. */ + hdd_image_read(drive->hdd_num, addr, 1, + (uint8_t *) dev->buff); - /* Set up the data transfer. */ - dev->buff_pos = 0; - dev->buff_cnt = SECTOR_SIZE; - dev->status = STAT_BSY | STAT_IO | STAT_REQ; - if (dev->irq_dma & DMA_ENA) { - timer_advance_u64(&dev->timer, ST506_TIME); - dma_set_drq(dev->dma, 1); - } - dev->state = STATE_SEND_DATA; - break; - } - break; + /* Set up the data transfer. */ + dev->buff_pos = 0; + dev->buff_cnt = SECTOR_SIZE; + dev->status = STAT_BSY | STAT_IO | STAT_REQ; + if (dev->irq_dma & DMA_ENA) { + timer_advance_u64(&dev->timer, ST506_TIME); + dma_set_drq(dev->dma, 1); + } + dev->state = STATE_SEND_DATA; + break; + } + break; - case CMD_SET_GEOMETRY_ST11: /* "Set geometry" is really "Write cylinder 0" */ - if (dev->type == 1) { - /* DTC sends this... */ - st506_complete(dev); - break; - } else if ((dev->type < 11) || (dev->type > 12)) { - st506_error(dev, ERR_BAD_COMMAND); - st506_complete(dev); - break; - } - case CMD_WRITE: + case CMD_SET_GEOMETRY_ST11: /* "Set geometry" is really "Write cylinder 0" */ + if (dev->type == 1) { + /* DTC sends this... */ + st506_complete(dev); + break; + } else if ((dev->type < 11) || (dev->type > 12)) { + st506_error(dev, ERR_BAD_COMMAND); + st506_complete(dev); + break; + } + case CMD_WRITE: #if 0 case CMD_WRITE_LONG: #endif - switch (dev->state) { - case STATE_START_COMMAND: - (void)get_chs(dev, drive); - st506_xt_log("ST506: WRITE%s(%i, %i/%i/%i, %i)\n", - (dev->command[0] == CMD_WRITE_LONG) ? "_LONG" : "", - dev->drive_sel, dev->cylinder, - dev->head, dev->sector, dev->count); + switch (dev->state) { + case STATE_START_COMMAND: + (void) get_chs(dev, drive); + st506_xt_log("ST506: WRITE%s(%i, %i/%i/%i, %i)\n", + (dev->command[0] == CMD_WRITE_LONG) ? "_LONG" : "", + dev->drive_sel, dev->cylinder, + dev->head, dev->sector, dev->count); - if (! get_sector(dev, drive, &addr)) { - st506_error(dev, ERR_BAD_PARAMETER); - st506_complete(dev); - return; - } + if (!get_sector(dev, drive, &addr)) { + st506_error(dev, ERR_BAD_PARAMETER); + st506_complete(dev); + return; + } - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); - /* Set up the data transfer. */ - dev->buff_pos = 0; - dev->buff_cnt = SECTOR_SIZE; - if (dev->command[0] == CMD_WRITE_LONG) - dev->buff_cnt += 4; - dev->status = STAT_BSY | STAT_REQ; - if (dev->irq_dma & DMA_ENA) { - timer_advance_u64(&dev->timer, ST506_TIME); - dma_set_drq(dev->dma, 1); - } - dev->state = STATE_RECEIVE_DATA; - break; + /* Set up the data transfer. */ + dev->buff_pos = 0; + dev->buff_cnt = SECTOR_SIZE; + if (dev->command[0] == CMD_WRITE_LONG) + dev->buff_cnt += 4; + dev->status = STAT_BSY | STAT_REQ; + if (dev->irq_dma & DMA_ENA) { + timer_advance_u64(&dev->timer, ST506_TIME); + dma_set_drq(dev->dma, 1); + } + dev->state = STATE_RECEIVE_DATA; + break; - case STATE_RECEIVE_DATA: - for (; dev->buff_pos < dev->buff_cnt; dev->buff_pos++) { - val = dma_channel_read(dev->dma); - if (val == DMA_NODATA) { + case STATE_RECEIVE_DATA: + for (; dev->buff_pos < dev->buff_cnt; dev->buff_pos++) { + val = dma_channel_read(dev->dma); + if (val == DMA_NODATA) { #ifdef ENABLE_ST506_XT_LOG - st506_xt_log("ST506: CMD_WRITE out of data!\n"); + st506_xt_log("ST506: CMD_WRITE out of data!\n"); #endif - st506_error(dev, ERR_NO_RECOVERY); - st506_complete(dev); - return; - } - dev->buff[dev->buff_pos] = val & 0xff; - } + st506_error(dev, ERR_NO_RECOVERY); + st506_complete(dev); + return; + } + dev->buff[dev->buff_pos] = val & 0xff; + } - dma_set_drq(dev->dma, 0); - timer_advance_u64(&dev->timer, ST506_TIME); - dev->state = STATE_RECEIVED_DATA; - break; + dma_set_drq(dev->dma, 0); + timer_advance_u64(&dev->timer, ST506_TIME); + dev->state = STATE_RECEIVED_DATA; + break; - case STATE_RECEIVED_DATA: - if (! get_sector(dev, drive, &addr)) { - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); - st506_error(dev, dev->error); - st506_complete(dev); - return; - } + case STATE_RECEIVED_DATA: + if (!get_sector(dev, drive, &addr)) { + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); + st506_error(dev, dev->error); + st506_complete(dev); + return; + } - /* Write data to image. */ - hdd_image_write(drive->hdd_num, addr, 1, - (uint8_t *)dev->buff); + /* Write data to image. */ + hdd_image_write(drive->hdd_num, addr, 1, + (uint8_t *) dev->buff); - if (--dev->count == 0) { - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); - st506_complete(dev); - break; - } + if (--dev->count == 0) { + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); + st506_complete(dev); + break; + } - next_sector(dev, drive); + next_sector(dev, drive); - /* Set up the data transfer. */ - dev->buff_pos = 0; - dev->buff_cnt = SECTOR_SIZE; - dev->status = STAT_BSY | STAT_REQ; - if (dev->irq_dma & DMA_ENA) { - timer_advance_u64(&dev->timer, ST506_TIME); - dma_set_drq(dev->dma, 1); - } - dev->state = STATE_RECEIVE_DATA; - break; - } - break; + /* Set up the data transfer. */ + dev->buff_pos = 0; + dev->buff_cnt = SECTOR_SIZE; + dev->status = STAT_BSY | STAT_REQ; + if (dev->irq_dma & DMA_ENA) { + timer_advance_u64(&dev->timer, ST506_TIME); + dma_set_drq(dev->dma, 1); + } + dev->state = STATE_RECEIVE_DATA; + break; + } + break; - case CMD_SEEK: - if (drive->present) { - val = get_chs(dev, drive); - st506_xt_log("ST506: SEEK(%i, %i) [%i]\n", - dev->drive_sel, drive->cylinder, val); - if (! val) - st506_error(dev, ERR_SEEK_ERROR); - } else - st506_error(dev, dev->nr_err); - st506_complete(dev); - break; + case CMD_SEEK: + if (drive->present) { + val = get_chs(dev, drive); + st506_xt_log("ST506: SEEK(%i, %i) [%i]\n", + dev->drive_sel, drive->cylinder, val); + if (!val) + st506_error(dev, ERR_SEEK_ERROR); + } else + st506_error(dev, dev->nr_err); + st506_complete(dev); + break; - case CMD_SPECIFY: - switch (dev->state) { - case STATE_START_COMMAND: - dev->buff_pos = 0; - dev->buff_cnt = 8; - dev->status = STAT_BSY | STAT_REQ; - dev->state = STATE_RECEIVE_DATA; - break; + case CMD_SPECIFY: + switch (dev->state) { + case STATE_START_COMMAND: + dev->buff_pos = 0; + dev->buff_cnt = 8; + dev->status = STAT_BSY | STAT_REQ; + dev->state = STATE_RECEIVE_DATA; + break; - case STATE_RECEIVED_DATA: - drive->cfg_cyl = dev->buff[1] | (dev->buff[0] << 8); - drive->cfg_hpc = dev->buff[2]; - /* For a 615/4/26 we get 666/2/31 geometry. */ - st506_xt_log("ST506: drive%i: cyls=%i, heads=%i\n", - dev->drive_sel, drive->cfg_cyl, drive->cfg_hpc); - st506_complete(dev); - break; - } - break; + case STATE_RECEIVED_DATA: + drive->cfg_cyl = dev->buff[1] | (dev->buff[0] << 8); + drive->cfg_hpc = dev->buff[2]; + /* For a 615/4/26 we get 666/2/31 geometry. */ + st506_xt_log("ST506: drive%i: cyls=%i, heads=%i\n", + dev->drive_sel, drive->cfg_cyl, drive->cfg_hpc); + st506_complete(dev); + break; + } + break; - case CMD_READ_ECC_BURST_LEN: - switch (dev->state) { - case STATE_START_COMMAND: + case CMD_READ_ECC_BURST_LEN: + switch (dev->state) { + case STATE_START_COMMAND: #ifdef ENABLE_ST506_XT_LOG - st506_xt_log("ST506: READ_ECC_BURST_LEN\n"); + st506_xt_log("ST506: READ_ECC_BURST_LEN\n"); #endif - dev->buff_pos = 0; - dev->buff_cnt = 1; - dev->buff[0] = 0; /* 0 bits */ - dev->status = STAT_BSY | STAT_IO | STAT_REQ; - dev->state = STATE_SEND_DATA; - break; + dev->buff_pos = 0; + dev->buff_cnt = 1; + dev->buff[0] = 0; /* 0 bits */ + dev->status = STAT_BSY | STAT_IO | STAT_REQ; + dev->state = STATE_SEND_DATA; + break; - case STATE_SENT_DATA: - st506_complete(dev); - break; - } - break; + case STATE_SENT_DATA: + st506_complete(dev); + break; + } + break; - case CMD_READ_BUFFER: - switch (dev->state) { - case STATE_START_COMMAND: - dev->buff_pos = 0; - dev->buff_cnt = SECTOR_SIZE; - st506_xt_log("ST506: READ_BUFFER (%i)\n", - dev->buff_cnt); + case CMD_READ_BUFFER: + switch (dev->state) { + case STATE_START_COMMAND: + dev->buff_pos = 0; + dev->buff_cnt = SECTOR_SIZE; + st506_xt_log("ST506: READ_BUFFER (%i)\n", + dev->buff_cnt); - dev->status = STAT_BSY | STAT_IO | STAT_REQ; - if (dev->irq_dma & DMA_ENA) { - timer_advance_u64(&dev->timer, ST506_TIME); - dma_set_drq(dev->dma, 1); - } - dev->state = STATE_SEND_DATA; - break; + dev->status = STAT_BSY | STAT_IO | STAT_REQ; + if (dev->irq_dma & DMA_ENA) { + timer_advance_u64(&dev->timer, ST506_TIME); + dma_set_drq(dev->dma, 1); + } + dev->state = STATE_SEND_DATA; + break; - case STATE_SEND_DATA: - for (; dev->buff_pos < dev->buff_cnt; dev->buff_pos++) { - val = dma_channel_write(dev->dma, dev->buff[dev->buff_pos]); - if (val == DMA_NODATA) { + case STATE_SEND_DATA: + for (; dev->buff_pos < dev->buff_cnt; dev->buff_pos++) { + val = dma_channel_write(dev->dma, dev->buff[dev->buff_pos]); + if (val == DMA_NODATA) { #ifdef ENABLE_ST506_XT_LOG - st506_xt_log("ST506: CMD_READ_BUFFER out of data!\n"); + st506_xt_log("ST506: CMD_READ_BUFFER out of data!\n"); #endif - st506_error(dev, ERR_NO_RECOVERY); - st506_complete(dev); - return; - } - } + st506_error(dev, ERR_NO_RECOVERY); + st506_complete(dev); + return; + } + } - dma_set_drq(dev->dma, 0); - timer_advance_u64(&dev->timer, ST506_TIME); - dev->state = STATE_SENT_DATA; - break; + dma_set_drq(dev->dma, 0); + timer_advance_u64(&dev->timer, ST506_TIME); + dev->state = STATE_SENT_DATA; + break; - case STATE_SENT_DATA: - st506_complete(dev); - break; - } - break; + case STATE_SENT_DATA: + st506_complete(dev); + break; + } + break; - case CMD_WRITE_BUFFER: - switch (dev->state) { - case STATE_START_COMMAND: - dev->buff_pos = 0; - dev->buff_cnt = SECTOR_SIZE; - st506_xt_log("ST506: WRITE_BUFFER (%i)\n", - dev->buff_cnt); + case CMD_WRITE_BUFFER: + switch (dev->state) { + case STATE_START_COMMAND: + dev->buff_pos = 0; + dev->buff_cnt = SECTOR_SIZE; + st506_xt_log("ST506: WRITE_BUFFER (%i)\n", + dev->buff_cnt); - dev->status = STAT_BSY | STAT_REQ; - if (dev->irq_dma & DMA_ENA) { - timer_advance_u64(&dev->timer, ST506_TIME); - dma_set_drq(dev->dma, 1); - } - dev->state = STATE_RECEIVE_DATA; - break; + dev->status = STAT_BSY | STAT_REQ; + if (dev->irq_dma & DMA_ENA) { + timer_advance_u64(&dev->timer, ST506_TIME); + dma_set_drq(dev->dma, 1); + } + dev->state = STATE_RECEIVE_DATA; + break; - case STATE_RECEIVE_DATA: - for (; dev->buff_pos < dev->buff_cnt; dev->buff_pos++) { - val = dma_channel_read(dev->dma); - if (val == DMA_NODATA) { + case STATE_RECEIVE_DATA: + for (; dev->buff_pos < dev->buff_cnt; dev->buff_pos++) { + val = dma_channel_read(dev->dma); + if (val == DMA_NODATA) { #ifdef ENABLE_ST506_XT_LOG - st506_xt_log("ST506: CMD_WRITE_BUFFER out of data!\n"); + st506_xt_log("ST506: CMD_WRITE_BUFFER out of data!\n"); #endif - st506_error(dev, ERR_NO_RECOVERY); - st506_complete(dev); - return; - } - dev->buff[dev->buff_pos] = val & 0xff; - } + st506_error(dev, ERR_NO_RECOVERY); + st506_complete(dev); + return; + } + dev->buff[dev->buff_pos] = val & 0xff; + } - dma_set_drq(dev->dma, 0); - timer_advance_u64(&dev->timer, ST506_TIME); - dev->state = STATE_RECEIVED_DATA; - break; + dma_set_drq(dev->dma, 0); + timer_advance_u64(&dev->timer, ST506_TIME); + dev->state = STATE_RECEIVED_DATA; + break; - case STATE_RECEIVED_DATA: - st506_complete(dev); - break; - } - break; + case STATE_RECEIVED_DATA: + st506_complete(dev); + break; + } + break; - case CMD_INQUIRY_ST11: - if (dev->type == 11 || dev->type == 12) switch (dev->state) { - case STATE_START_COMMAND: - st506_xt_log("ST506: INQUIRY (type=%i)\n", dev->type); - dev->buff_pos = 0; - dev->buff_cnt = 2; - dev->buff[0] = 0x80; /* "ST-11" */ - if (dev->spt == 17) - dev->buff[0] |= 0x40; /* MFM */ - dev->buff[1] = dev->misc; /* revision */ - dev->status = STAT_BSY | STAT_IO | STAT_REQ; - dev->state = STATE_SEND_DATA; - break; + case CMD_INQUIRY_ST11: + if (dev->type == 11 || dev->type == 12) + switch (dev->state) { + case STATE_START_COMMAND: + st506_xt_log("ST506: INQUIRY (type=%i)\n", dev->type); + dev->buff_pos = 0; + dev->buff_cnt = 2; + dev->buff[0] = 0x80; /* "ST-11" */ + if (dev->spt == 17) + dev->buff[0] |= 0x40; /* MFM */ + dev->buff[1] = dev->misc; /* revision */ + dev->status = STAT_BSY | STAT_IO | STAT_REQ; + dev->state = STATE_SEND_DATA; + break; - case STATE_SENT_DATA: - st506_complete(dev); - break; - } else { - st506_error(dev, ERR_BAD_COMMAND); - st506_complete(dev); - } - break; + case STATE_SENT_DATA: + st506_complete(dev); + break; + } + else { + st506_error(dev, ERR_BAD_COMMAND); + st506_complete(dev); + } + break; - case CMD_RAM_DIAGNOSTIC: + case CMD_RAM_DIAGNOSTIC: #ifdef ENABLE_ST506_XT_LOG - st506_xt_log("ST506: RAM_DIAG\n"); + st506_xt_log("ST506: RAM_DIAG\n"); #endif - st506_complete(dev); - break; + st506_complete(dev); + break; - case CMD_CTRLR_DIAGNOSTIC: + case CMD_CTRLR_DIAGNOSTIC: #ifdef ENABLE_ST506_XT_LOG - st506_xt_log("ST506: CTRLR_DIAG\n"); + st506_xt_log("ST506: CTRLR_DIAG\n"); #endif - st506_complete(dev); - break; + st506_complete(dev); + break; - case CMD_SET_STEP_RATE_DTC: - if (dev->type == 1) { - /* For DTC, we are done. */ - st506_complete(dev); - } else if (dev->type == 11 || dev->type == 12) { - /* - * For Seagate ST-11, this is WriteGeometry. - * - * This writes the contents of the buffer to track 0. - * - * By the time this command is sent, it will have - * formatted the first track, so it should be good, - * and our sector buffer contains the magic data - * (see above) we need to write to it. - */ - (void)get_chs(dev, drive); - st506_xt_log("ST506: WRITE BUFFER (%i, %i/%i/%i, %i)\n", - dev->drive_sel, dev->cylinder, - dev->head, dev->sector, dev->count); + case CMD_SET_STEP_RATE_DTC: + if (dev->type == 1) { + /* For DTC, we are done. */ + st506_complete(dev); + } else if (dev->type == 11 || dev->type == 12) { + /* + * For Seagate ST-11, this is WriteGeometry. + * + * This writes the contents of the buffer to track 0. + * + * By the time this command is sent, it will have + * formatted the first track, so it should be good, + * and our sector buffer contains the magic data + * (see above) we need to write to it. + */ + (void) get_chs(dev, drive); + st506_xt_log("ST506: WRITE BUFFER (%i, %i/%i/%i, %i)\n", + dev->drive_sel, dev->cylinder, + dev->head, dev->sector, dev->count); - if (! get_sector(dev, drive, &addr)) { - st506_error(dev, ERR_BAD_PARAMETER); - st506_complete(dev); - return; - } + if (!get_sector(dev, drive, &addr)) { + st506_error(dev, ERR_BAD_PARAMETER); + st506_complete(dev); + return; + } - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); - /* Write data to image. */ - hdd_image_write(drive->hdd_num, addr, 1, - (uint8_t *)dev->buff); + /* Write data to image. */ + hdd_image_write(drive->hdd_num, addr, 1, + (uint8_t *) dev->buff); - if (--dev->count == 0) { - ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); - st506_complete(dev); - break; - } + if (--dev->count == 0) { + ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); + st506_complete(dev); + break; + } - next_sector(dev, drive); - timer_advance_u64(&dev->timer, ST506_TIME); - break; - } else { - st506_error(dev, ERR_BAD_COMMAND); - st506_complete(dev); - } - break; + next_sector(dev, drive); + timer_advance_u64(&dev->timer, ST506_TIME); + break; + } else { + st506_error(dev, ERR_BAD_COMMAND); + st506_complete(dev); + } + break; - case CMD_GET_DRIVE_PARAMS_DTC: - switch (dev->state) { - case STATE_START_COMMAND: - dev->buff_pos = 0; - dev->buff_cnt = 4; - memset(dev->buff, 0x00, dev->buff_cnt); - dev->buff[0] = drive->tracks & 0xff; - dev->buff[1] = ((drive->tracks >> 2) & 0xc0) | dev->spt; - dev->buff[2] = drive->hpc - 1; - dev->status = STAT_BSY | STAT_IO | STAT_REQ; - dev->state = STATE_SEND_DATA; - break; + case CMD_GET_DRIVE_PARAMS_DTC: + switch (dev->state) { + case STATE_START_COMMAND: + dev->buff_pos = 0; + dev->buff_cnt = 4; + memset(dev->buff, 0x00, dev->buff_cnt); + dev->buff[0] = drive->tracks & 0xff; + dev->buff[1] = ((drive->tracks >> 2) & 0xc0) | dev->spt; + dev->buff[2] = drive->hpc - 1; + dev->status = STAT_BSY | STAT_IO | STAT_REQ; + dev->state = STATE_SEND_DATA; + break; - case STATE_SENT_DATA: - st506_complete(dev); - break; - } - break; + case STATE_SENT_DATA: + st506_complete(dev); + break; + } + break; - case CMD_SET_GEOMETRY_DTC: - switch (dev->state) { - case STATE_START_COMMAND: - val = dev->command[1] & 0x01; - st506_xt_log("ST506: DTC_GET_GEOMETRY(%i) %i\n", - dev->drive_sel, val); - dev->buff_pos = 0; - dev->buff_cnt = 16; - dev->status = STAT_BSY | STAT_REQ; - dev->state = STATE_RECEIVE_DATA; - break; + case CMD_SET_GEOMETRY_DTC: + switch (dev->state) { + case STATE_START_COMMAND: + val = dev->command[1] & 0x01; + st506_xt_log("ST506: DTC_GET_GEOMETRY(%i) %i\n", + dev->drive_sel, val); + dev->buff_pos = 0; + dev->buff_cnt = 16; + dev->status = STAT_BSY | STAT_REQ; + dev->state = STATE_RECEIVE_DATA; + break; - case STATE_RECEIVED_DATA: - /* FIXME: ignore the results. */ - st506_complete(dev); - break; - } - break; + case STATE_RECEIVED_DATA: + /* FIXME: ignore the results. */ + st506_complete(dev); + break; + } + break; - case CMD_GET_GEOMETRY_DTC: - switch (dev->state) { - case STATE_START_COMMAND: - val = dev->command[1] & 0x01; - st506_xt_log("ST506: DTC_GET_GEOMETRY(%i) %i\n", - dev->drive_sel, val); - dev->buff_pos = 0; - dev->buff_cnt = 16; - memset(dev->buff, 0x00, dev->buff_cnt); - dev->buff[4] = drive->tracks & 0xff; - dev->buff[5] = (drive->tracks >> 8) & 0xff; - dev->buff[10] = drive->hpc; - dev->status = STAT_BSY | STAT_IO | STAT_REQ; - dev->state = STATE_SEND_DATA; - break; + case CMD_GET_GEOMETRY_DTC: + switch (dev->state) { + case STATE_START_COMMAND: + val = dev->command[1] & 0x01; + st506_xt_log("ST506: DTC_GET_GEOMETRY(%i) %i\n", + dev->drive_sel, val); + dev->buff_pos = 0; + dev->buff_cnt = 16; + memset(dev->buff, 0x00, dev->buff_cnt); + dev->buff[4] = drive->tracks & 0xff; + dev->buff[5] = (drive->tracks >> 8) & 0xff; + dev->buff[10] = drive->hpc; + dev->status = STAT_BSY | STAT_IO | STAT_REQ; + dev->state = STATE_SEND_DATA; + break; - case STATE_SENT_DATA: - st506_complete(dev); - break; - } - break; + case STATE_SENT_DATA: + st506_complete(dev); + break; + } + break; - default: - if (dev->command[0] == CMD_WRITE_GEOMETRY_ST11) - fatal("CMD_WRITE_GEOMETRY_ST11\n"); + default: + if (dev->command[0] == CMD_WRITE_GEOMETRY_ST11) + fatal("CMD_WRITE_GEOMETRY_ST11\n"); #ifdef ENABLE_ST506_XT_LOG - st506_xt_log("ST506: unknown command:\n"); + st506_xt_log("ST506: unknown command:\n"); #endif - st506_xt_log("ST506: %02x %02x %02x %02x %02x %02x\n", - dev->command[0], dev->command[1], dev->command[2], - dev->command[3], dev->command[4], dev->command[5]); - st506_error(dev, ERR_BAD_COMMAND); - st506_complete(dev); + st506_xt_log("ST506: %02x %02x %02x %02x %02x %02x\n", + dev->command[0], dev->command[1], dev->command[2], + dev->command[3], dev->command[4], dev->command[5]); + st506_error(dev, ERR_BAD_COMMAND); + st506_complete(dev); } } - /* Read from one of the registers. */ static uint8_t st506_read(uint16_t port, void *priv) { - hdc_t *dev = (hdc_t *)priv; + hdc_t *dev = (hdc_t *) priv; uint8_t ret = 0xff; switch (port & 3) { - case 0: /* read data */ - dev->status &= ~STAT_IRQ; - switch (dev->state) { - case STATE_COMPLETION_BYTE: - ret = dev->compl; - dev->status = 0x00; - dev->state = STATE_IDLE; - break; + case 0: /* read data */ + dev->status &= ~STAT_IRQ; + switch (dev->state) { + case STATE_COMPLETION_BYTE: + ret = dev->compl ; + dev->status = 0x00; + dev->state = STATE_IDLE; + break; - case STATE_SEND_DATA: - ret = dev->buff[dev->buff_pos++]; - if (dev->buff_pos == dev->buff_cnt) { - dev->buff_pos = 0; - dev->buff_cnt = 0; - dev->status = STAT_BSY; - dev->state = STATE_SENT_DATA; - timer_set_delay_u64(&dev->timer, ST506_TIME); - } - break; - } - break; + case STATE_SEND_DATA: + ret = dev->buff[dev->buff_pos++]; + if (dev->buff_pos == dev->buff_cnt) { + dev->buff_pos = 0; + dev->buff_cnt = 0; + dev->status = STAT_BSY; + dev->state = STATE_SENT_DATA; + timer_set_delay_u64(&dev->timer, ST506_TIME); + } + break; + } + break; - case 1: /* read status */ - ret = dev->status; - if ((dev->irq_dma & DMA_ENA) && dma_get_drq(dev->dma)) - ret |= STAT_DRQ; - break; + case 1: /* read status */ + ret = dev->status; + if ((dev->irq_dma & DMA_ENA) && dma_get_drq(dev->dma)) + ret |= STAT_DRQ; + break; - case 2: /* read option jumpers */ - ret = dev->switches; - break; + case 2: /* read option jumpers */ + ret = dev->switches; + break; } st506_xt_log("ST506: read(%04x) = %02x\n", port, ret); - return(ret); + return (ret); } - /* Write to one of the registers. */ static void st506_write(uint16_t port, uint8_t val, void *priv) { - hdc_t *dev = (hdc_t *)priv; + hdc_t *dev = (hdc_t *) priv; st506_xt_log("ST506: write(%04x, %02x)\n", port, val); switch (port & 3) { - case 0: /* write data */ - switch (dev->state) { - case STATE_RECEIVE_COMMAND: /* command data */ - /* Write directly to the command buffer to avoid overwriting - the data buffer. */ - dev->command[dev->buff_pos++] = val; - if (dev->buff_pos == dev->buff_cnt) { - /* We have a new command. */ - dev->buff_pos = 0; - dev->buff_cnt = 0; - dev->status = STAT_BSY; - dev->state = STATE_START_COMMAND; - timer_set_delay_u64(&dev->timer, ST506_TIME); - } - break; + case 0: /* write data */ + switch (dev->state) { + case STATE_RECEIVE_COMMAND: /* command data */ + /* Write directly to the command buffer to avoid overwriting + the data buffer. */ + dev->command[dev->buff_pos++] = val; + if (dev->buff_pos == dev->buff_cnt) { + /* We have a new command. */ + dev->buff_pos = 0; + dev->buff_cnt = 0; + dev->status = STAT_BSY; + dev->state = STATE_START_COMMAND; + timer_set_delay_u64(&dev->timer, ST506_TIME); + } + break; - case STATE_RECEIVE_DATA: /* data */ - dev->buff[dev->buff_pos++] = val; - if (dev->buff_pos == dev->buff_cnt) { - dev->buff_pos = 0; - dev->buff_cnt = 0; - dev->status = STAT_BSY; - dev->state = STATE_RECEIVED_DATA; - timer_set_delay_u64(&dev->timer, ST506_TIME); - } - break; - } - break; + case STATE_RECEIVE_DATA: /* data */ + dev->buff[dev->buff_pos++] = val; + if (dev->buff_pos == dev->buff_cnt) { + dev->buff_pos = 0; + dev->buff_cnt = 0; + dev->status = STAT_BSY; + dev->state = STATE_RECEIVED_DATA; + timer_set_delay_u64(&dev->timer, ST506_TIME); + } + break; + } + break; - case 1: /* controller reset */ - dev->status = 0x00; - break; + case 1: /* controller reset */ + dev->status = 0x00; + break; - case 2: /* generate controller-select-pulse */ - dev->status = STAT_BSY | STAT_CD | STAT_REQ; - dev->buff_pos = 0; - dev->buff_cnt = sizeof(dev->command); - dev->state = STATE_RECEIVE_COMMAND; - break; + case 2: /* generate controller-select-pulse */ + dev->status = STAT_BSY | STAT_CD | STAT_REQ; + dev->buff_pos = 0; + dev->buff_cnt = sizeof(dev->command); + dev->state = STATE_RECEIVE_COMMAND; + break; - case 3: /* DMA/IRQ enable register */ - dev->irq_dma = val; + case 3: /* DMA/IRQ enable register */ + dev->irq_dma = val; - if (!(dev->irq_dma & DMA_ENA)) - dma_set_drq(dev->dma, 0); + if (!(dev->irq_dma & DMA_ENA)) + dma_set_drq(dev->dma, 0); - if (!(dev->irq_dma & IRQ_ENA)) { - dev->status &= ~STAT_IRQ; - picintc(1 << dev->irq); - } - break; + if (!(dev->irq_dma & IRQ_ENA)) { + dev->status &= ~STAT_IRQ; + picintc(1 << dev->irq); + } + break; } } - /* Write to ROM (or scratchpad RAM.) */ static void mem_write(uint32_t addr, uint8_t val, void *priv) { - hdc_t *dev = (hdc_t *)priv; + hdc_t *dev = (hdc_t *) priv; uint32_t ptr, mask = 0; /* Ignore accesses to anything below the configured address, needed because of the emulator's 4k mapping granularity. */ if (addr < dev->bios_addr) - return; + return; addr -= dev->bios_addr; - switch(dev->type) { - case 11: /* ST-11M */ - case 12: /* ST-11R */ - mask = 0x1fff; /* ST-11 decodes RAM on each 8K block */ - break; + switch (dev->type) { + case 11: /* ST-11M */ + case 12: /* ST-11R */ + mask = 0x1fff; /* ST-11 decodes RAM on each 8K block */ + break; - default: - break; + default: + break; } addr &= dev->bios_rom.mask; ptr = (dev->bios_rom.mask & mask) - dev->bios_ram; - if (mask && ((addr & mask) > ptr) && - ((addr & mask) <= (ptr + dev->bios_ram))) - dev->scratch[addr & (dev->bios_ram - 1)] = val; + if (mask && ((addr & mask) > ptr) && ((addr & mask) <= (ptr + dev->bios_ram))) + dev->scratch[addr & (dev->bios_ram - 1)] = val; } - static uint8_t mem_read(uint32_t addr, void *priv) { - hdc_t *dev = (hdc_t *)priv; + hdc_t *dev = (hdc_t *) priv; uint32_t ptr, mask = 0; - uint8_t ret = 0xff; + uint8_t ret = 0xff; /* Ignore accesses to anything below the configured address, needed because of the emulator's 4k mapping granularity. */ if (addr < dev->bios_addr) - return 0xff; + return 0xff; addr -= dev->bios_addr; - switch(dev->type) { - case 0: /* Xebec */ - if (addr >= 0x001000) { + switch (dev->type) { + case 0: /* Xebec */ + if (addr >= 0x001000) { #ifdef ENABLE_ST506_XT_LOG - st506_xt_log("ST506: Xebec ROM access(0x%06lx)\n", addr); + st506_xt_log("ST506: Xebec ROM access(0x%06lx)\n", addr); #endif - return 0xff; - } - break; + return 0xff; + } + break; - case 1: /* DTC */ - default: - if (addr >= 0x002000) { + case 1: /* DTC */ + default: + if (addr >= 0x002000) { #ifdef ENABLE_ST506_XT_LOG - st506_xt_log("ST506: DTC-5150X ROM access(0x%06lx)\n", addr); + st506_xt_log("ST506: DTC-5150X ROM access(0x%06lx)\n", addr); #endif - return 0xff; - } - break; + return 0xff; + } + break; - case 11: /* ST-11M */ - case 12: /* ST-11R */ - mask = 0x1fff; /* ST-11 decodes RAM on each 8K block */ - break; + case 11: /* ST-11M */ + case 12: /* ST-11R */ + mask = 0x1fff; /* ST-11 decodes RAM on each 8K block */ + break; - /* default: - break; */ + /* default: + break; */ } addr = addr & dev->bios_rom.mask; ptr = (dev->bios_rom.mask & mask) - dev->bios_ram; - if (mask && ((addr & mask) > ptr) && - ((addr & mask) <= (ptr + dev->bios_ram))) - ret = dev->scratch[addr & (dev->bios_ram - 1)]; + if (mask && ((addr & mask) > ptr) && ((addr & mask) <= (ptr + dev->bios_ram))) + ret = dev->scratch[addr & (dev->bios_ram - 1)]; else - ret = dev->bios_rom.rom[addr]; + ret = dev->bios_rom.rom[addr]; - return(ret); + return (ret); } - /* * Set up and load the ROM BIOS for this controller. * @@ -1308,208 +1287,204 @@ static void loadrom(hdc_t *dev, const char *fn) { uint32_t size; - FILE *fp; + FILE *fp; if (fn == NULL) { #ifdef ENABLE_ST506_XT_LOG - st506_xt_log("ST506: NULL BIOS ROM file pointer!\n"); + st506_xt_log("ST506: NULL BIOS ROM file pointer!\n"); #endif - return; + return; } if ((fp = rom_fopen((char *) fn, "rb")) == NULL) { - st506_xt_log("ST506: BIOS ROM '%s' not found!\n", fn); - return; + st506_xt_log("ST506: BIOS ROM '%s' not found!\n", fn); + return; } /* Initialize the ROM entry. */ memset(&dev->bios_rom, 0x00, sizeof(rom_t)); /* Manually load and process the ROM image. */ - (void)fseek(fp, 0L, SEEK_END); + (void) fseek(fp, 0L, SEEK_END); size = ftell(fp); - (void)fseek(fp, 0L, SEEK_SET); + (void) fseek(fp, 0L, SEEK_SET); /* Load the ROM data. */ - dev->bios_rom.rom = (uint8_t *)malloc(size); + dev->bios_rom.rom = (uint8_t *) malloc(size); memset(dev->bios_rom.rom, 0xff, size); if (fread(dev->bios_rom.rom, 1, size, fp) != size) - fatal("ST-506 XT loadrom(): Error reading data\n"); - (void)fclose(fp); + fatal("ST-506 XT loadrom(): Error reading data\n"); + (void) fclose(fp); /* Set up an address mask for this memory. */ - dev->bios_size = size; + dev->bios_size = size; dev->bios_rom.mask = (size - 1); /* Map this system into the memory map. */ mem_mapping_add(&dev->bios_rom.mapping, dev->bios_addr, size, - mem_read,NULL,NULL, mem_write,NULL,NULL, - dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, dev); + mem_read, NULL, NULL, mem_write, NULL, NULL, + dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, dev); } - static void loadhd(hdc_t *dev, int c, int d, const char *fn) { drive_t *drive = &dev->drives[c]; - if (! hdd_image_load(d)) { - drive->present = 0; - return; + if (!hdd_image_load(d)) { + drive->present = 0; + return; } /* Make sure we can do this. */ /* Allow 31 sectors per track on RLL controllers, for the ST225R, which is 667/2/31. */ if ((hdd[d].spt != dev->spt) && (hdd[d].spt != 31) && (dev->spt != 26)) { - /* - * Uh-oh, MFM/RLL mismatch. - * - * Although this would be no issue in the code itself, - * most of the BIOSes were hardwired to whatever their - * native SPT setting was, so, do not allow this here. - */ - st506_xt_log("ST506: drive%i: MFM/RLL mismatch (%i/%i)\n", - c, hdd[d].spt, dev->spt); - hdd_image_close(d); - drive->present = 0; - return; + /* + * Uh-oh, MFM/RLL mismatch. + * + * Although this would be no issue in the code itself, + * most of the BIOSes were hardwired to whatever their + * native SPT setting was, so, do not allow this here. + */ + st506_xt_log("ST506: drive%i: MFM/RLL mismatch (%i/%i)\n", + c, hdd[d].spt, dev->spt); + hdd_image_close(d); + drive->present = 0; + return; } - drive->spt = (uint8_t)hdd[d].spt; - drive->hpc = (uint8_t)hdd[d].hpc; - drive->tracks = (uint16_t)hdd[d].tracks; + drive->spt = (uint8_t) hdd[d].spt; + drive->hpc = (uint8_t) hdd[d].hpc; + drive->tracks = (uint16_t) hdd[d].tracks; drive->hdd_num = d; drive->present = 1; } - /* Set the "drive type" switches for the IBM Xebec controller. */ static void set_switches(hdc_t *dev) { drive_t *drive; - int c, d; + int c, d; dev->switches = 0x00; for (d = 0; d < MFM_NUM; d++) { - drive = &dev->drives[d]; + drive = &dev->drives[d]; - if (! drive->present) continue; + if (!drive->present) + continue; - for (c = 0; c < 4; c++) { - if ((drive->spt == hd_types[c].spt) && - (drive->hpc == hd_types[c].hpc) && - (drive->tracks == hd_types[c].tracks)) { - dev->switches |= (c << (d ? 0 : 2)); - break; - } - } + for (c = 0; c < 4; c++) { + if ((drive->spt == hd_types[c].spt) && (drive->hpc == hd_types[c].hpc) && (drive->tracks == hd_types[c].tracks)) { + dev->switches |= (c << (d ? 0 : 2)); + break; + } + } #ifdef ENABLE_ST506_XT_LOG - st506_xt_log("ST506: "); - if (c == 4) - st506_xt_log("*WARNING* drive%i unsupported", d); - else - st506_xt_log("drive%i is type %i", d, c); - st506_xt_log(" (%i/%i/%i)\n", drive->tracks, drive->hpc, drive->spt); + st506_xt_log("ST506: "); + if (c == 4) + st506_xt_log("*WARNING* drive%i unsupported", d); + else + st506_xt_log("drive%i is type %i", d, c); + st506_xt_log(" (%i/%i/%i)\n", drive->tracks, drive->hpc, drive->spt); #endif } } - static void * st506_init(const device_t *info) { - char *fn = NULL; + char *fn = NULL; hdc_t *dev; - int i, c; + int i, c; - dev = (hdc_t *)malloc(sizeof(hdc_t)); + dev = (hdc_t *) malloc(sizeof(hdc_t)); memset(dev, 0x00, sizeof(hdc_t)); dev->type = info->local & 255; /* Set defaults for the controller. */ - dev->spt = MFM_SECTORS; - dev->base = 0x0320; - dev->irq = 5; - dev->dma = 3; + dev->spt = MFM_SECTORS; + dev->base = 0x0320; + dev->irq = 5; + dev->dma = 3; dev->bios_addr = 0xc8000; - dev->nr_err = ERR_NOT_READY; + dev->nr_err = ERR_NOT_READY; - switch(dev->type) { - case 0: /* Xebec (MFM) */ - fn = XEBEC_BIOS_FILE; - break; + switch (dev->type) { + case 0: /* Xebec (MFM) */ + fn = XEBEC_BIOS_FILE; + break; - case 1: /* DTC5150 (MFM) */ - fn = DTC_BIOS_FILE; - dev->switches = 0xff; - break; + case 1: /* DTC5150 (MFM) */ + fn = DTC_BIOS_FILE; + dev->switches = 0xff; + break; - case 12: /* Seagate ST-11R (RLL) */ - dev->spt = RLL_SECTORS; - /*FALLTHROUGH*/ + case 12: /* Seagate ST-11R (RLL) */ + dev->spt = RLL_SECTORS; + /*FALLTHROUGH*/ - case 11: /* Seagate ST-11M (MFM) */ - dev->nr_err = ERR_NOT_AVAILABLE; - dev->switches = 0x01; /* fixed */ - dev->misc = device_get_config_int("revision"); - switch (dev->misc) { - case 5: /* v1.7 */ - fn = ST11_BIOS_FILE_OLD; - break; + case 11: /* Seagate ST-11M (MFM) */ + dev->nr_err = ERR_NOT_AVAILABLE; + dev->switches = 0x01; /* fixed */ + dev->misc = device_get_config_int("revision"); + switch (dev->misc) { + case 5: /* v1.7 */ + fn = ST11_BIOS_FILE_OLD; + break; - case 19: /* v2.0 */ - fn = ST11_BIOS_FILE_NEW; - break; - } - dev->base = device_get_config_hex16("base"); - dev->irq = device_get_config_int("irq"); - dev->bios_addr = device_get_config_hex20("bios_addr"); - dev->bios_ram = 64; /* scratch RAM size */ + case 19: /* v2.0 */ + fn = ST11_BIOS_FILE_NEW; + break; + } + dev->base = device_get_config_hex16("base"); + dev->irq = device_get_config_int("irq"); + dev->bios_addr = device_get_config_hex20("bios_addr"); + dev->bios_ram = 64; /* scratch RAM size */ - /* - * Industrial Madness Alert. - * - * With the ST-11 controller, Seagate decided to act - * like they owned the industry, and reserved the - * first cylinder of a drive for the controller. So, - * when the host accessed cylinder 0, that would be - * the actual cylinder 1 on the drive, and so on. - */ - dev->cyl_off = 1; - break; + /* + * Industrial Madness Alert. + * + * With the ST-11 controller, Seagate decided to act + * like they owned the industry, and reserved the + * first cylinder of a drive for the controller. So, + * when the host accessed cylinder 0, that would be + * the actual cylinder 1 on the drive, and so on. + */ + dev->cyl_off = 1; + break; - case 21: /* Western Digital WD1002A-WX1 (MFM) */ - dev->nr_err = ERR_NOT_AVAILABLE; - fn = WD1002A_WX1_BIOS_FILE; - /* The switches are read in reverse: 0 = closed, 1 = open. - Both open means MFM, 17 sectors per track. */ - dev->switches = 0x30; /* autobios */ - dev->base = device_get_config_hex16("base"); - dev->irq = device_get_config_int("irq"); - if (dev->irq == 2) - dev->switches |= 0x40; - dev->bios_addr = device_get_config_hex20("bios_addr"); - break; + case 21: /* Western Digital WD1002A-WX1 (MFM) */ + dev->nr_err = ERR_NOT_AVAILABLE; + fn = WD1002A_WX1_BIOS_FILE; + /* The switches are read in reverse: 0 = closed, 1 = open. + Both open means MFM, 17 sectors per track. */ + dev->switches = 0x30; /* autobios */ + dev->base = device_get_config_hex16("base"); + dev->irq = device_get_config_int("irq"); + if (dev->irq == 2) + dev->switches |= 0x40; + dev->bios_addr = device_get_config_hex20("bios_addr"); + break; - case 22: /* Western Digital WD1002A-27X (RLL) */ - dev->nr_err = ERR_NOT_AVAILABLE; - fn = WD1002A_27X_BIOS_FILE; - /* The switches are read in reverse: 0 = closed, 1 = open. - Both closed means translate 26 sectors per track to 17, - SW6 closed, SW5 open means 26 sectors per track. */ - dev->switches = device_get_config_int("translate") ? 0x00 : 0x10; /* autobios */ - dev->spt = RLL_SECTORS; - dev->base = device_get_config_hex16("base"); - dev->irq = device_get_config_int("irq"); - if (dev->irq == 2) - dev->switches |= 0x40; - dev->bios_addr = device_get_config_hex20("bios_addr"); - break; + case 22: /* Western Digital WD1002A-27X (RLL) */ + dev->nr_err = ERR_NOT_AVAILABLE; + fn = WD1002A_27X_BIOS_FILE; + /* The switches are read in reverse: 0 = closed, 1 = open. + Both closed means translate 26 sectors per track to 17, + SW6 closed, SW5 open means 26 sectors per track. */ + dev->switches = device_get_config_int("translate") ? 0x00 : 0x10; /* autobios */ + dev->spt = RLL_SECTORS; + dev->base = device_get_config_hex16("base"); + dev->irq = device_get_config_int("irq"); + if (dev->irq == 2) + dev->switches |= 0x40; + dev->bios_addr = device_get_config_hex20("bios_addr"); + break; } /* Load the ROM BIOS. */ @@ -1517,119 +1492,117 @@ st506_init(const device_t *info) /* Set up the I/O region. */ io_sethandler(dev->base, 4, - st506_read,NULL,NULL, st506_write,NULL,NULL, dev); + st506_read, NULL, NULL, st506_write, NULL, NULL, dev); /* Add the timer. */ timer_add(&dev->timer, st506_callback, dev, 0); st506_xt_log("ST506: %s (I/O=%03X, IRQ=%i, DMA=%i, BIOS @0x%06lX, size %lu)\n", - info->name,dev->base,dev->irq,dev->dma, dev->bios_addr,dev->bios_size); + info->name, dev->base, dev->irq, dev->dma, dev->bios_addr, dev->bios_size); /* Load any drives configured for us. */ #ifdef ENABLE_ST506_XT_LOG st506_xt_log("ST506: looking for disks...\n"); #endif for (c = 0, i = 0; i < HDD_NUM; i++) { - if ((hdd[i].bus == HDD_BUS_MFM) && (hdd[i].mfm_channel < MFM_NUM)) { - st506_xt_log("ST506: disk '%s' on channel %i\n", - hdd[i].fn, hdd[i].mfm_channel); - loadhd(dev, hdd[i].mfm_channel, i, hdd[i].fn); + if ((hdd[i].bus == HDD_BUS_MFM) && (hdd[i].mfm_channel < MFM_NUM)) { + st506_xt_log("ST506: disk '%s' on channel %i\n", + hdd[i].fn, hdd[i].mfm_channel); + loadhd(dev, hdd[i].mfm_channel, i, hdd[i].fn); - if (++c > MFM_NUM) break; - } + if (++c > MFM_NUM) + break; + } } st506_xt_log("ST506: %i disks loaded.\n", c); /* For the Xebec, set the switches now. */ if (dev->type == 0) - set_switches(dev); + set_switches(dev); /* Initial "active" drive parameters. */ for (c = 0; c < MFM_NUM; c++) { - dev->drives[c].cfg_cyl = dev->drives[c].tracks; - dev->drives[c].cfg_hpc = dev->drives[c].hpc; - dev->drives[c].cfg_spt = dev->drives[c].spt; + dev->drives[c].cfg_cyl = dev->drives[c].tracks; + dev->drives[c].cfg_hpc = dev->drives[c].hpc; + dev->drives[c].cfg_spt = dev->drives[c].spt; } - return(dev); + return (dev); } - static void st506_close(void *priv) { - hdc_t *dev = (hdc_t *)priv; + hdc_t *dev = (hdc_t *) priv; drive_t *drive; - int d; + int d; for (d = 0; d < MFM_NUM; d++) { - drive = &dev->drives[d]; + drive = &dev->drives[d]; - hdd_image_close(drive->hdd_num); + hdd_image_close(drive->hdd_num); } if (dev->bios_rom.rom != NULL) { - free(dev->bios_rom.rom); - dev->bios_rom.rom = NULL; + free(dev->bios_rom.rom); + dev->bios_rom.rom = NULL; } free(dev); } - static int xebec_available(void) { - return(rom_present(XEBEC_BIOS_FILE)); + return (rom_present(XEBEC_BIOS_FILE)); } - static int dtc5150x_available(void) { - return(rom_present(DTC_BIOS_FILE)); + return (rom_present(DTC_BIOS_FILE)); } static int st11_m_available(void) { - return(rom_present(ST11_BIOS_FILE_OLD) && rom_present(ST11_BIOS_FILE_NEW)); + return (rom_present(ST11_BIOS_FILE_OLD) && rom_present(ST11_BIOS_FILE_NEW)); } static int st11_r_available(void) { - return(rom_present(ST11_BIOS_FILE_OLD) && rom_present(ST11_BIOS_FILE_NEW)); + return (rom_present(ST11_BIOS_FILE_OLD) && rom_present(ST11_BIOS_FILE_NEW)); } static int wd1002a_wx1_available(void) { - return(rom_present(WD1002A_WX1_BIOS_FILE)); + return (rom_present(WD1002A_WX1_BIOS_FILE)); } static int wd1002a_27x_available(void) { - return(rom_present(WD1002A_27X_BIOS_FILE)); + return (rom_present(WD1002A_27X_BIOS_FILE)); } static int wd1004a_wx1_available(void) { - return(rom_present(WD1004A_WX1_BIOS_FILE)); + return (rom_present(WD1004A_WX1_BIOS_FILE)); } static int wd1004_27x_available(void) { - return(rom_present(WD1004_27X_BIOS_FILE)); + return (rom_present(WD1004_27X_BIOS_FILE)); } static int wd1004a_27x_available(void) { - return(rom_present(WD1004A_27X_BIOS_FILE)); + return (rom_present(WD1004A_27X_BIOS_FILE)); } // clang-format off @@ -1939,127 +1912,127 @@ static const device_config_t wd1004_rll_config[] = { // clang-format on const device_t st506_xt_xebec_device = { - .name = "IBM PC Fixed Disk Adapter (MFM)", + .name = "IBM PC Fixed Disk Adapter (MFM)", .internal_name = "st506_xt", - .flags = DEVICE_ISA, - .local = (HDD_BUS_MFM << 8) | 0, - .init = st506_init, - .close = st506_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = (HDD_BUS_MFM << 8) | 0, + .init = st506_init, + .close = st506_close, + .reset = NULL, { .available = xebec_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t st506_xt_dtc5150x_device = { - .name = "DTC 5150X MFM Fixed Disk Adapter", + .name = "DTC 5150X MFM Fixed Disk Adapter", .internal_name = "st506_xt_dtc5150x", - .flags = DEVICE_ISA, - .local = (HDD_BUS_MFM << 8) | 1, - .init = st506_init, - .close = st506_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = (HDD_BUS_MFM << 8) | 1, + .init = st506_init, + .close = st506_close, + .reset = NULL, { .available = dtc5150x_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = dtc_config + .force_redraw = NULL, + .config = dtc_config }; const device_t st506_xt_st11_m_device = { - .name = "ST-11M MFM Fixed Disk Adapter", + .name = "ST-11M MFM Fixed Disk Adapter", .internal_name = "st506_xt_st11_m", - .flags = DEVICE_ISA, - .local = (HDD_BUS_MFM << 8) | 11, - .init = st506_init, - .close = st506_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = (HDD_BUS_MFM << 8) | 11, + .init = st506_init, + .close = st506_close, + .reset = NULL, { .available = st11_m_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = st11_config + .force_redraw = NULL, + .config = st11_config }; const device_t st506_xt_st11_r_device = { - .name = "ST-11R RLL Fixed Disk Adapter", + .name = "ST-11R RLL Fixed Disk Adapter", .internal_name = "st506_xt_st11_r", - .flags = DEVICE_ISA, - .local = (HDD_BUS_MFM << 8) | 12, - .init = st506_init, - .close = st506_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = (HDD_BUS_MFM << 8) | 12, + .init = st506_init, + .close = st506_close, + .reset = NULL, { .available = st11_r_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = st11_config + .force_redraw = NULL, + .config = st11_config }; const device_t st506_xt_wd1002a_wx1_device = { - .name = "WD1002A-WX1 MFM Fixed Disk Adapter", + .name = "WD1002A-WX1 MFM Fixed Disk Adapter", .internal_name = "st506_xt_wd1002a_wx1", - .flags = DEVICE_ISA, - .local = (HDD_BUS_MFM << 8) | 21, - .init = st506_init, - .close = st506_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = (HDD_BUS_MFM << 8) | 21, + .init = st506_init, + .close = st506_close, + .reset = NULL, { .available = wd1002a_wx1_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = wd_config + .force_redraw = NULL, + .config = wd_config }; const device_t st506_xt_wd1002a_27x_device = { - .name = "WD1002A-27X RLL Fixed Disk Adapter", + .name = "WD1002A-27X RLL Fixed Disk Adapter", .internal_name = "st506_xt_wd1002a_27x", - .flags = DEVICE_ISA, - .local = (HDD_BUS_MFM << 8) | 22, - .init = st506_init, - .close = st506_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = (HDD_BUS_MFM << 8) | 22, + .init = st506_init, + .close = st506_close, + .reset = NULL, { .available = wd1002a_27x_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = wd_rll_config + .force_redraw = NULL, + .config = wd_rll_config }; const device_t st506_xt_wd1004a_wx1_device = { - .name = "WD1004A-WX1 MFM Fixed Disk Adapter", + .name = "WD1004A-WX1 MFM Fixed Disk Adapter", .internal_name = "st506_xt_wd1004a_wx1", - .flags = DEVICE_ISA, - .local = (HDD_BUS_MFM << 8) | 21, - .init = st506_init, - .close = st506_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = (HDD_BUS_MFM << 8) | 21, + .init = st506_init, + .close = st506_close, + .reset = NULL, { wd1004a_wx1_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = wd1004a_config + .force_redraw = NULL, + .config = wd1004a_config }; const device_t st506_xt_wd1004_27x_device = { - .name = "WD1004-27X RLL Fixed Disk Adapter", + .name = "WD1004-27X RLL Fixed Disk Adapter", .internal_name = "st506_xt_wd1004_27x", - .flags = DEVICE_ISA, - .local = (HDD_BUS_MFM << 8) | 22, - .init = st506_init, - .close = st506_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = (HDD_BUS_MFM << 8) | 22, + .init = st506_init, + .close = st506_close, + .reset = NULL, { .available = wd1004_27x_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = wd1004_rll_config + .force_redraw = NULL, + .config = wd1004_rll_config }; const device_t st506_xt_wd1004a_27x_device = { - .name = "WD1004a-27X RLL Fixed Disk Adapter", + .name = "WD1004a-27X RLL Fixed Disk Adapter", .internal_name = "st506_xt_wd1004a_27x", - .flags = DEVICE_ISA, - .local = (HDD_BUS_MFM << 8) | 22, - .init = st506_init, - .close = st506_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = (HDD_BUS_MFM << 8) | 22, + .init = st506_init, + .close = st506_close, + .reset = NULL, { .available = wd1004a_27x_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = wd_rll_config + .force_redraw = NULL, + .config = wd_rll_config }; diff --git a/src/disk/hdc_xta.c b/src/disk/hdc_xta.c index 28990bbdb..a0ae17bcb 100644 --- a/src/disk/hdc_xta.c +++ b/src/disk/hdc_xta.c @@ -104,11 +104,9 @@ #include <86box/hdc.h> #include <86box/hdd.h> +#define HDC_TIME (50 * TIMER_USEC) -#define HDC_TIME (50*TIMER_USEC) - -#define WD_BIOS_FILE "roms/hdd/xta/idexywd2.bin" - +#define WD_BIOS_FILE "roms/hdd/xta/idexywd2.bin" enum { STATE_IDLE = 0, @@ -121,237 +119,228 @@ enum { STATE_COMPL }; - /* Command values. */ -#define CMD_TEST_READY 0x00 -#define CMD_RECALIBRATE 0x01 - /* unused 0x02 */ -#define CMD_READ_SENSE 0x03 -#define CMD_FORMAT_DRIVE 0x04 -#define CMD_READ_VERIFY 0x05 -#define CMD_FORMAT_TRACK 0x06 -#define CMD_FORMAT_BAD_TRACK 0x07 -#define CMD_READ_SECTORS 0x08 - /* unused 0x09 */ -#define CMD_WRITE_SECTORS 0x0a -#define CMD_SEEK 0x0b -#define CMD_SET_DRIVE_PARAMS 0x0c -#define CMD_READ_ECC_BURST 0x0d -#define CMD_READ_SECTOR_BUFFER 0x0e -#define CMD_WRITE_SECTOR_BUFFER 0x0f -#define CMD_RAM_DIAGS 0xe0 - /* unused 0xe1 */ - /* unused 0xe2 */ -#define CMD_DRIVE_DIAGS 0xe3 -#define CMD_CTRL_DIAGS 0xe4 -#define CMD_READ_LONG 0xe5 -#define CMD_WRITE_LONG 0xe6 +#define CMD_TEST_READY 0x00 +#define CMD_RECALIBRATE 0x01 +/* unused 0x02 */ +#define CMD_READ_SENSE 0x03 +#define CMD_FORMAT_DRIVE 0x04 +#define CMD_READ_VERIFY 0x05 +#define CMD_FORMAT_TRACK 0x06 +#define CMD_FORMAT_BAD_TRACK 0x07 +#define CMD_READ_SECTORS 0x08 +/* unused 0x09 */ +#define CMD_WRITE_SECTORS 0x0a +#define CMD_SEEK 0x0b +#define CMD_SET_DRIVE_PARAMS 0x0c +#define CMD_READ_ECC_BURST 0x0d +#define CMD_READ_SECTOR_BUFFER 0x0e +#define CMD_WRITE_SECTOR_BUFFER 0x0f +#define CMD_RAM_DIAGS 0xe0 +/* unused 0xe1 */ +/* unused 0xe2 */ +#define CMD_DRIVE_DIAGS 0xe3 +#define CMD_CTRL_DIAGS 0xe4 +#define CMD_READ_LONG 0xe5 +#define CMD_WRITE_LONG 0xe6 /* Status register (reg 1) values. */ -#define STAT_REQ 0x01 /* controller needs data transfer */ -#define STAT_IO 0x02 /* direction of transfer (TO bus) */ -#define STAT_CD 0x04 /* transfer of Command or Data */ -#define STAT_BSY 0x08 /* controller is busy */ -#define STAT_DRQ 0x10 /* DMA requested */ -#define STAT_IRQ 0x20 /* interrupt requested */ -#define STAT_DCB 0x80 /* not seen by driver */ +#define STAT_REQ 0x01 /* controller needs data transfer */ +#define STAT_IO 0x02 /* direction of transfer (TO bus) */ +#define STAT_CD 0x04 /* transfer of Command or Data */ +#define STAT_BSY 0x08 /* controller is busy */ +#define STAT_DRQ 0x10 /* DMA requested */ +#define STAT_IRQ 0x20 /* interrupt requested */ +#define STAT_DCB 0x80 /* not seen by driver */ /* Sense Error codes. */ -#define ERR_NOERROR 0x00 /* no error detected */ -#define ERR_NOINDEX 0x01 /* drive did not detect IDX pulse */ -#define ERR_NOSEEK 0x02 /* drive did not complete SEEK */ -#define ERR_WRFAULT 0x03 /* write fault during last cmd */ -#define ERR_NOTRDY 0x04 /* drive did not go READY after cmd */ -#define ERR_NOTRK000 0x06 /* drive did not see TRK0 signal */ -#define ERR_LONGSEEK 0x08 /* long seek in progress */ -#define ERR_IDREAD 0x10 /* ECC error during ID field */ -#define ERR_DATA 0x11 /* uncorrectable ECC err in data */ -#define ERR_NOMARK 0x12 /* no address mark detected */ -#define ERR_NOSECT 0x14 /* sector not found */ -#define ERR_SEEK 0x15 /* seek error */ -#define ERR_ECCDATA 0x18 /* ECC corrected data */ -#define ERR_BADTRK 0x19 /* bad track detected */ -#define ERR_ILLCMD 0x20 /* invalid command received */ -#define ERR_ILLADDR 0x21 /* invalid disk address received */ -#define ERR_BADRAM 0x30 /* bad RAM in sector data buffer */ -#define ERR_BADROM 0x31 /* bad checksum in ROM test */ -#define ERR_BADECC 0x32 /* ECC polynomial generator bad */ +#define ERR_NOERROR 0x00 /* no error detected */ +#define ERR_NOINDEX 0x01 /* drive did not detect IDX pulse */ +#define ERR_NOSEEK 0x02 /* drive did not complete SEEK */ +#define ERR_WRFAULT 0x03 /* write fault during last cmd */ +#define ERR_NOTRDY 0x04 /* drive did not go READY after cmd */ +#define ERR_NOTRK000 0x06 /* drive did not see TRK0 signal */ +#define ERR_LONGSEEK 0x08 /* long seek in progress */ +#define ERR_IDREAD 0x10 /* ECC error during ID field */ +#define ERR_DATA 0x11 /* uncorrectable ECC err in data */ +#define ERR_NOMARK 0x12 /* no address mark detected */ +#define ERR_NOSECT 0x14 /* sector not found */ +#define ERR_SEEK 0x15 /* seek error */ +#define ERR_ECCDATA 0x18 /* ECC corrected data */ +#define ERR_BADTRK 0x19 /* bad track detected */ +#define ERR_ILLCMD 0x20 /* invalid command received */ +#define ERR_ILLADDR 0x21 /* invalid disk address received */ +#define ERR_BADRAM 0x30 /* bad RAM in sector data buffer */ +#define ERR_BADROM 0x31 /* bad checksum in ROM test */ +#define ERR_BADECC 0x32 /* ECC polynomial generator bad */ /* Completion Byte fields. */ -#define COMP_DRIVE 0x20 -#define COMP_ERR 0x02 - -#define IRQ_ENA 0x02 -#define DMA_ENA 0x01 +#define COMP_DRIVE 0x20 +#define COMP_ERR 0x02 +#define IRQ_ENA 0x02 +#define DMA_ENA 0x01 /* The device control block (6 bytes) */ -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { - uint8_t cmd; /* [7:5] class, [4:0] opcode */ + uint8_t cmd; /* [7:5] class, [4:0] opcode */ - uint8_t head :5, /* [4:0] head number */ - drvsel :1, /* [5] drive select */ - mbz :2; /* [7:6] 00 */ + uint8_t head : 5, /* [4:0] head number */ + drvsel : 1, /* [5] drive select */ + mbz : 2; /* [7:6] 00 */ - uint8_t sector :6, /* [5:0] sector number 0-63 */ - cyl_high :2; /* [7:6] cylinder [9:8] bits */ + uint8_t sector : 6, /* [5:0] sector number 0-63 */ + cyl_high : 2; /* [7:6] cylinder [9:8] bits */ - uint8_t cyl_low; /* [7:0] cylinder [7:0] bits */ + uint8_t cyl_low; /* [7:0] cylinder [7:0] bits */ - uint8_t count; /* [7:0] blk count / interleave */ + uint8_t count; /* [7:0] blk count / interleave */ - uint8_t ctrl; /* [7:0] control field */ + uint8_t ctrl; /* [7:0] control field */ } dcb_t; #pragma pack(pop) /* The (configured) Drive Parameters. */ -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { - uint8_t cyl_high; /* (MSB) number of cylinders */ - uint8_t cyl_low; /* (LSB) number of cylinders */ - uint8_t heads; /* number of heads per cylinder */ - uint8_t rwc_high; /* (MSB) reduced write current cylinder */ - uint8_t rwc_low; /* (LSB) reduced write current cylinder */ - uint8_t wp_high; /* (MSB) write precompensation cylinder */ - uint8_t wp_low; /* (LSB) write precompensation cylinder */ - uint8_t maxecc; /* max ECC data burst length */ + uint8_t cyl_high; /* (MSB) number of cylinders */ + uint8_t cyl_low; /* (LSB) number of cylinders */ + uint8_t heads; /* number of heads per cylinder */ + uint8_t rwc_high; /* (MSB) reduced write current cylinder */ + uint8_t rwc_low; /* (LSB) reduced write current cylinder */ + uint8_t wp_high; /* (MSB) write precompensation cylinder */ + uint8_t wp_low; /* (LSB) write precompensation cylinder */ + uint8_t maxecc; /* max ECC data burst length */ } dprm_t; #pragma pack(pop) /* Define an attached drive. */ typedef struct { - int8_t id, /* drive ID on bus */ - present, /* drive is present */ - hdd_num, /* index to global disk table */ - type; /* drive type ID */ + int8_t id, /* drive ID on bus */ + present, /* drive is present */ + hdd_num, /* index to global disk table */ + type; /* drive type ID */ - uint16_t cur_cyl; /* last known position of heads */ + uint16_t cur_cyl; /* last known position of heads */ - uint8_t spt, /* active drive parameters */ - hpc; - uint16_t tracks; + uint8_t spt, /* active drive parameters */ + hpc; + uint16_t tracks; - uint8_t cfg_spt, /* configured drive parameters */ - cfg_hpc; - uint16_t cfg_tracks; + uint8_t cfg_spt, /* configured drive parameters */ + cfg_hpc; + uint16_t cfg_tracks; } drive_t; - typedef struct { - const char *name; /* controller name */ + const char *name; /* controller name */ - uint16_t base; /* controller base I/O address */ - int8_t irq; /* controller IRQ channel */ - int8_t dma; /* controller DMA channel */ - int8_t type; /* controller type ID */ + uint16_t base; /* controller base I/O address */ + int8_t irq; /* controller IRQ channel */ + int8_t dma; /* controller DMA channel */ + int8_t type; /* controller type ID */ - uint32_t rom_addr; /* address where ROM is */ - rom_t bios_rom; /* descriptor for the BIOS */ + uint32_t rom_addr; /* address where ROM is */ + rom_t bios_rom; /* descriptor for the BIOS */ /* Controller state. */ - int8_t state; /* controller state */ - uint8_t sense; /* current SENSE ERROR value */ - uint8_t status; /* current operational status */ - uint8_t intr; - uint64_t callback; - pc_timer_t timer; + int8_t state; /* controller state */ + uint8_t sense; /* current SENSE ERROR value */ + uint8_t status; /* current operational status */ + uint8_t intr; + uint64_t callback; + pc_timer_t timer; /* Data transfer. */ - int16_t buf_idx, /* buffer index and pointer */ - buf_len; - uint8_t *buf_ptr; + int16_t buf_idx, /* buffer index and pointer */ + buf_len; + uint8_t *buf_ptr; /* Current operation parameters. */ - dcb_t dcb; /* device control block */ - uint16_t track; /* requested track# */ - uint8_t head, /* requested head# */ - sector, /* requested sector# */ - comp; /* operation completion byte */ - int count; /* requested sector count */ + dcb_t dcb; /* device control block */ + uint16_t track; /* requested track# */ + uint8_t head, /* requested head# */ + sector, /* requested sector# */ + comp; /* operation completion byte */ + int count; /* requested sector count */ - drive_t drives[XTA_NUM]; /* the attached drive(s) */ + drive_t drives[XTA_NUM]; /* the attached drive(s) */ - uint8_t data[512]; /* data buffer */ - uint8_t sector_buf[512]; /* sector buffer */ + uint8_t data[512]; /* data buffer */ + uint8_t sector_buf[512]; /* sector buffer */ } hdc_t; - #ifdef ENABLE_XTA_LOG int xta_do_log = ENABLE_XTA_LOG; - static void xta_log(const char *fmt, ...) { va_list ap; if (xta_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define xta_log(fmt, ...) +# define xta_log(fmt, ...) #endif - static void set_intr(hdc_t *dev) { - dev->status = STAT_REQ|STAT_CD|STAT_IO|STAT_BSY; - dev->state = STATE_COMPL; + dev->status = STAT_REQ | STAT_CD | STAT_IO | STAT_BSY; + dev->state = STATE_COMPL; if (dev->intr & IRQ_ENA) { - dev->status |= STAT_IRQ; - picint(1 << dev->irq); + dev->status |= STAT_IRQ; + picint(1 << dev->irq); } } - /* Get the logical (block) address of a CHS triplet. */ static int get_sector(hdc_t *dev, drive_t *drive, off64_t *addr) { if (drive->cur_cyl != dev->track) { - xta_log("%s: get_sector: wrong cylinder %d/%d\n", - dev->name, drive->cur_cyl, dev->track); - dev->sense = ERR_ILLADDR; - return(1); + xta_log("%s: get_sector: wrong cylinder %d/%d\n", + dev->name, drive->cur_cyl, dev->track); + dev->sense = ERR_ILLADDR; + return (1); } if (dev->head >= drive->hpc) { - xta_log("%s: get_sector: past end of heads\n", dev->name); - dev->sense = ERR_ILLADDR; - return(1); + xta_log("%s: get_sector: past end of heads\n", dev->name); + dev->sense = ERR_ILLADDR; + return (1); } if (dev->sector >= drive->spt) { - xta_log("%s: get_sector: past end of sectors\n", dev->name); - dev->sense = ERR_ILLADDR; - return(1); + xta_log("%s: get_sector: past end of sectors\n", dev->name); + dev->sense = ERR_ILLADDR; + return (1); } /* Calculate logical address (block number) of desired sector. */ - *addr = ((((off64_t) dev->track*drive->hpc) + \ - dev->head)*drive->spt) + dev->sector; + *addr = ((((off64_t) dev->track * drive->hpc) + dev->head) * drive->spt) + dev->sector; - return(0); + return (0); } - static void next_sector(hdc_t *dev, drive_t *drive) { if (++dev->sector >= drive->spt) { - dev->sector = 0; - if (++dev->head >= drive->hpc) { - dev->head = 0; - dev->track++; - if (++drive->cur_cyl >= drive->tracks) - drive->cur_cyl = (drive->tracks - 1); - } + dev->sector = 0; + if (++dev->head >= drive->hpc) { + dev->head = 0; + dev->track++; + if (++drive->cur_cyl >= drive->tracks) + drive->cur_cyl = (drive->tracks - 1); + } } } @@ -359,19 +348,18 @@ static void xta_set_callback(hdc_t *dev, uint64_t callback) { if (!dev) { - return; + return; } if (callback) { - dev->callback = callback; - timer_set_delay_u64(&dev->timer, dev->callback); - } else { - dev->callback = 0; - timer_disable(&dev->timer); - } + dev->callback = callback; + timer_set_delay_u64(&dev->timer, dev->callback); + } else { + dev->callback = 0; + timer_disable(&dev->timer); + } } - /* Perform the seek operation. */ static void do_seek(hdc_t *dev, drive_t *drive, int cyl) @@ -379,623 +367,617 @@ do_seek(hdc_t *dev, drive_t *drive, int cyl) dev->track = cyl; if (dev->track >= drive->tracks) - drive->cur_cyl = (drive->tracks - 1); - else - drive->cur_cyl = dev->track; + drive->cur_cyl = (drive->tracks - 1); + else + drive->cur_cyl = dev->track; } - /* Format a track or an entire drive. */ static void do_format(hdc_t *dev, drive_t *drive, dcb_t *dcb) { - int start_cyl, end_cyl; - int start_hd, end_hd; + int start_cyl, end_cyl; + int start_hd, end_hd; off64_t addr; - int h, s; + int h, s; /* Get the parameters from the DCB. */ if (dcb->cmd == CMD_FORMAT_DRIVE) { - start_cyl = 0; - start_hd = 0; - end_cyl = drive->tracks; - end_hd = drive->hpc; + start_cyl = 0; + start_hd = 0; + end_cyl = drive->tracks; + end_hd = drive->hpc; } else { - start_cyl = (dcb->cyl_low | (dcb->cyl_high << 8)); - start_hd = dcb->head; - end_cyl = start_cyl + 1; - end_hd = start_hd + 1; + start_cyl = (dcb->cyl_low | (dcb->cyl_high << 8)); + start_hd = dcb->head; + end_cyl = start_cyl + 1; + end_hd = start_hd + 1; } switch (dev->state) { - case STATE_IDLE: - /* Seek to cylinder. */ - do_seek(dev, drive, start_cyl); - dev->head = dcb->head; - dev->sector = 0; + case STATE_IDLE: + /* Seek to cylinder. */ + do_seek(dev, drive, start_cyl); + dev->head = dcb->head; + dev->sector = 0; - /* Activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 1); + /* Activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 1); do_fmt: - /* - * For now, we don't use the interleave factor (in - * dcb->count), although we should one day use an - * image format that can handle it.. - * - * That said, we have been given a sector_buf of - * data to fill the sectors with, so we will use - * that at least. - */ - for (h = start_hd; h < end_hd; h++) { - for (s = 0; s < drive->spt; s++) { - /* Set the sector we need to write. */ - dev->head = h; - dev->sector = s; + /* + * For now, we don't use the interleave factor (in + * dcb->count), although we should one day use an + * image format that can handle it.. + * + * That said, we have been given a sector_buf of + * data to fill the sectors with, so we will use + * that at least. + */ + for (h = start_hd; h < end_hd; h++) { + for (s = 0; s < drive->spt; s++) { + /* Set the sector we need to write. */ + dev->head = h; + dev->sector = s; - /* Get address of sector to write. */ - if (get_sector(dev, drive, &addr)) break; + /* Get address of sector to write. */ + if (get_sector(dev, drive, &addr)) + break; - /* Write the block to the image. */ - hdd_image_write(drive->hdd_num, addr, 1, - (uint8_t *)dev->sector_buf); - } - } + /* Write the block to the image. */ + hdd_image_write(drive->hdd_num, addr, 1, + (uint8_t *) dev->sector_buf); + } + } - /* One more track done. */ - if (++start_cyl == end_cyl) break; + /* One more track done. */ + if (++start_cyl == end_cyl) + break; - /* This saves us a LOT of code. */ - goto do_fmt; + /* This saves us a LOT of code. */ + goto do_fmt; } /* De-activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 0); + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0); } - /* Execute the DCB we just received. */ static void hdc_callback(void *priv) { - hdc_t *dev = (hdc_t *)priv; - dcb_t *dcb = &dev->dcb; + hdc_t *dev = (hdc_t *) priv; + dcb_t *dcb = &dev->dcb; drive_t *drive; - dprm_t *params; - off64_t addr; - int no_data = 0; - int val; + dprm_t *params; + off64_t addr; + int no_data = 0; + int val; /* Cancel timer. */ xta_set_callback(dev, 0); - drive = &dev->drives[dcb->drvsel]; + drive = &dev->drives[dcb->drvsel]; dev->comp = (dcb->drvsel) ? COMP_DRIVE : 0x00; dev->status |= STAT_DCB; switch (dcb->cmd) { - case CMD_TEST_READY: - if (! drive->present) { - dev->comp |= COMP_ERR; - dev->sense = ERR_NOTRDY; - } - set_intr(dev); - break; + case CMD_TEST_READY: + if (!drive->present) { + dev->comp |= COMP_ERR; + dev->sense = ERR_NOTRDY; + } + set_intr(dev); + break; - case CMD_RECALIBRATE: - if (! drive->present) { - dev->comp |= COMP_ERR; - dev->sense = ERR_NOTRDY; - } else { - dev->track = drive->cur_cyl = 0; - } - set_intr(dev); - break; + case CMD_RECALIBRATE: + if (!drive->present) { + dev->comp |= COMP_ERR; + dev->sense = ERR_NOTRDY; + } else { + dev->track = drive->cur_cyl = 0; + } + set_intr(dev); + break; - case CMD_READ_SENSE: - switch(dev->state) { - case STATE_IDLE: - dev->buf_idx = 0; - dev->buf_len = 4; - dev->buf_ptr = dev->data; - dev->buf_ptr[0] = dev->sense; - dev->buf_ptr[1] = dcb->drvsel ? 0x20 : 0x00; - dev->buf_ptr[2] = (drive->cur_cyl >> 2) | \ - (dev->sector & 0x3f); - dev->buf_ptr[3] = (drive->cur_cyl & 0xff); - dev->sense = ERR_NOERROR; - dev->status |= (STAT_IO | STAT_REQ); - dev->state = STATE_SDATA; - break; + case CMD_READ_SENSE: + switch (dev->state) { + case STATE_IDLE: + dev->buf_idx = 0; + dev->buf_len = 4; + dev->buf_ptr = dev->data; + dev->buf_ptr[0] = dev->sense; + dev->buf_ptr[1] = dcb->drvsel ? 0x20 : 0x00; + dev->buf_ptr[2] = (drive->cur_cyl >> 2) | (dev->sector & 0x3f); + dev->buf_ptr[3] = (drive->cur_cyl & 0xff); + dev->sense = ERR_NOERROR; + dev->status |= (STAT_IO | STAT_REQ); + dev->state = STATE_SDATA; + break; - case STATE_SDONE: - set_intr(dev); - } - break; + case STATE_SDONE: + set_intr(dev); + } + break; - case CMD_READ_VERIFY: - no_data = 1; - /*FALLTHROUGH*/ + case CMD_READ_VERIFY: + no_data = 1; + /*FALLTHROUGH*/ - case CMD_READ_SECTORS: - if (! drive->present) { - dev->comp |= COMP_ERR; - dev->sense = ERR_NOTRDY; - set_intr(dev); - break; - } + case CMD_READ_SECTORS: + if (!drive->present) { + dev->comp |= COMP_ERR; + dev->sense = ERR_NOTRDY; + set_intr(dev); + break; + } - switch (dev->state) { - case STATE_IDLE: - /* Seek to cylinder. */ - do_seek(dev, drive, - (dcb->cyl_low|(dcb->cyl_high<<8))); - dev->head = dcb->head; - dev->sector = dcb->sector; + switch (dev->state) { + case STATE_IDLE: + /* Seek to cylinder. */ + do_seek(dev, drive, + (dcb->cyl_low | (dcb->cyl_high << 8))); + dev->head = dcb->head; + dev->sector = dcb->sector; - /* Get sector count; count=0 means 256. */ - dev->count = (int)dcb->count; - if (dev->count == 0) - dev->count = 256; - dev->buf_len = 512; + /* Get sector count; count=0 means 256. */ + dev->count = (int) dcb->count; + if (dev->count == 0) + dev->count = 256; + dev->buf_len = 512; - dev->state = STATE_SEND; - /*FALLTHROUGH*/ + dev->state = STATE_SEND; + /*FALLTHROUGH*/ - case STATE_SEND: - /* Activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 1); + case STATE_SEND: + /* Activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 1); do_send: - /* Get address of sector to load. */ - if (get_sector(dev, drive, &addr)) { - /* De-activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 0); - dev->comp |= COMP_ERR; - set_intr(dev); - return; - } + /* Get address of sector to load. */ + if (get_sector(dev, drive, &addr)) { + /* De-activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0); + dev->comp |= COMP_ERR; + set_intr(dev); + return; + } - /* Read the block from the image. */ - hdd_image_read(drive->hdd_num, addr, 1, - (uint8_t *)dev->sector_buf); + /* Read the block from the image. */ + hdd_image_read(drive->hdd_num, addr, 1, + (uint8_t *) dev->sector_buf); - /* Ready to transfer the data out. */ - dev->state = STATE_SDATA; - dev->buf_idx = 0; - if (no_data) { - /* Delay a bit, no actual transfer. */ - xta_set_callback(dev, HDC_TIME); - } else { - if (dev->intr & DMA_ENA) { - /* DMA enabled. */ - dev->buf_ptr = dev->sector_buf; - xta_set_callback(dev, HDC_TIME); - } else { - /* Copy from sector to data. */ - memcpy(dev->data, - dev->sector_buf, - dev->buf_len); - dev->buf_ptr = dev->data; + /* Ready to transfer the data out. */ + dev->state = STATE_SDATA; + dev->buf_idx = 0; + if (no_data) { + /* Delay a bit, no actual transfer. */ + xta_set_callback(dev, HDC_TIME); + } else { + if (dev->intr & DMA_ENA) { + /* DMA enabled. */ + dev->buf_ptr = dev->sector_buf; + xta_set_callback(dev, HDC_TIME); + } else { + /* Copy from sector to data. */ + memcpy(dev->data, + dev->sector_buf, + dev->buf_len); + dev->buf_ptr = dev->data; - dev->status |= (STAT_IO | STAT_REQ); - } - } - break; + dev->status |= (STAT_IO | STAT_REQ); + } + } + break; - case STATE_SDATA: - if (! no_data) { - /* Perform DMA. */ - while (dev->buf_idx < dev->buf_len) { - val = dma_channel_write(dev->dma, - *dev->buf_ptr); - if (val == DMA_NODATA) { - xta_log("%s: CMD_READ_SECTORS out of data (idx=%d, len=%d)!\n", dev->name, dev->buf_idx, dev->buf_len); + case STATE_SDATA: + if (!no_data) { + /* Perform DMA. */ + while (dev->buf_idx < dev->buf_len) { + val = dma_channel_write(dev->dma, + *dev->buf_ptr); + if (val == DMA_NODATA) { + xta_log("%s: CMD_READ_SECTORS out of data (idx=%d, len=%d)!\n", dev->name, dev->buf_idx, dev->buf_len); - dev->status |= (STAT_CD | STAT_IO| STAT_REQ); - xta_set_callback(dev, HDC_TIME); - return; - } - dev->buf_ptr++; - dev->buf_idx++; - } - } - xta_set_callback(dev, HDC_TIME); - dev->state = STATE_SDONE; - break; + dev->status |= (STAT_CD | STAT_IO | STAT_REQ); + xta_set_callback(dev, HDC_TIME); + return; + } + dev->buf_ptr++; + dev->buf_idx++; + } + } + xta_set_callback(dev, HDC_TIME); + dev->state = STATE_SDONE; + break; - case STATE_SDONE: - dev->buf_idx = 0; - if (--dev->count == 0) { - /* De-activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 0); + case STATE_SDONE: + dev->buf_idx = 0; + if (--dev->count == 0) { + /* De-activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0); - set_intr(dev); - return; - } + set_intr(dev); + return; + } - /* Addvance to next sector. */ - next_sector(dev, drive); + /* Addvance to next sector. */ + next_sector(dev, drive); - /* This saves us a LOT of code. */ - dev->state = STATE_SEND; - goto do_send; - } - break; + /* This saves us a LOT of code. */ + dev->state = STATE_SEND; + goto do_send; + } + break; - case CMD_WRITE_SECTORS: - if (! drive->present) { - dev->comp |= COMP_ERR; - dev->sense = ERR_NOTRDY; - set_intr(dev); - break; - } + case CMD_WRITE_SECTORS: + if (!drive->present) { + dev->comp |= COMP_ERR; + dev->sense = ERR_NOTRDY; + set_intr(dev); + break; + } - switch (dev->state) { - case STATE_IDLE: - /* Seek to cylinder. */ - do_seek(dev, drive, - (dcb->cyl_low|(dcb->cyl_high<<8))); - dev->head = dcb->head; - dev->sector = dcb->sector; + switch (dev->state) { + case STATE_IDLE: + /* Seek to cylinder. */ + do_seek(dev, drive, + (dcb->cyl_low | (dcb->cyl_high << 8))); + dev->head = dcb->head; + dev->sector = dcb->sector; - /* Get sector count; count=0 means 256. */ - dev->count = (int)dev->dcb.count; - if (dev->count == 0) - dev->count = 256; - dev->buf_len = 512; + /* Get sector count; count=0 means 256. */ + dev->count = (int) dev->dcb.count; + if (dev->count == 0) + dev->count = 256; + dev->buf_len = 512; - dev->state = STATE_RECV; - /*FALLTHROUGH*/ + dev->state = STATE_RECV; + /*FALLTHROUGH*/ - case STATE_RECV: - /* Activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 1); + case STATE_RECV: + /* Activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 1); do_recv: - /* Ready to transfer the data in. */ - dev->state = STATE_RDATA; - dev->buf_idx = 0; - if (dev->intr & DMA_ENA) { - /* DMA enabled. */ - dev->buf_ptr = dev->sector_buf; - xta_set_callback(dev, HDC_TIME); - } else { - /* No DMA, do PIO. */ - dev->buf_ptr = dev->data; - dev->status |= STAT_REQ; - } - break; + /* Ready to transfer the data in. */ + dev->state = STATE_RDATA; + dev->buf_idx = 0; + if (dev->intr & DMA_ENA) { + /* DMA enabled. */ + dev->buf_ptr = dev->sector_buf; + xta_set_callback(dev, HDC_TIME); + } else { + /* No DMA, do PIO. */ + dev->buf_ptr = dev->data; + dev->status |= STAT_REQ; + } + break; - case STATE_RDATA: - if (! no_data) { - /* Perform DMA. */ - dev->status = STAT_BSY; - while (dev->buf_idx < dev->buf_len) { - val = dma_channel_read(dev->dma); - if (val == DMA_NODATA) { - xta_log("%s: CMD_WRITE_SECTORS out of data (idx=%d, len=%d)!\n", dev->name, dev->buf_idx, dev->buf_len); + case STATE_RDATA: + if (!no_data) { + /* Perform DMA. */ + dev->status = STAT_BSY; + while (dev->buf_idx < dev->buf_len) { + val = dma_channel_read(dev->dma); + if (val == DMA_NODATA) { + xta_log("%s: CMD_WRITE_SECTORS out of data (idx=%d, len=%d)!\n", dev->name, dev->buf_idx, dev->buf_len); - xta_log("%s: CMD_WRITE_SECTORS out of data!\n", dev->name); - dev->status |= (STAT_CD | STAT_IO | STAT_REQ); - xta_set_callback(dev, HDC_TIME); - return; - } + xta_log("%s: CMD_WRITE_SECTORS out of data!\n", dev->name); + dev->status |= (STAT_CD | STAT_IO | STAT_REQ); + xta_set_callback(dev, HDC_TIME); + return; + } - dev->buf_ptr[dev->buf_idx] = (val & 0xff); - dev->buf_idx++; - } - dev->state = STATE_RDONE; - xta_set_callback(dev, HDC_TIME); - } - break; + dev->buf_ptr[dev->buf_idx] = (val & 0xff); + dev->buf_idx++; + } + dev->state = STATE_RDONE; + xta_set_callback(dev, HDC_TIME); + } + break; - case STATE_RDONE: - /* Copy from data to sector if PIO. */ - if (! (dev->intr & DMA_ENA)) - memcpy(dev->sector_buf, dev->data, - dev->buf_len); + case STATE_RDONE: + /* Copy from data to sector if PIO. */ + if (!(dev->intr & DMA_ENA)) + memcpy(dev->sector_buf, dev->data, + dev->buf_len); - /* Get address of sector to write. */ - if (get_sector(dev, drive, &addr)) { - /* De-activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 0); + /* Get address of sector to write. */ + if (get_sector(dev, drive, &addr)) { + /* De-activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0); - dev->comp |= COMP_ERR; - set_intr(dev); - return; - } + dev->comp |= COMP_ERR; + set_intr(dev); + return; + } - /* Write the block to the image. */ - hdd_image_write(drive->hdd_num, addr, 1, - (uint8_t *)dev->sector_buf); + /* Write the block to the image. */ + hdd_image_write(drive->hdd_num, addr, 1, + (uint8_t *) dev->sector_buf); - dev->buf_idx = 0; - if (--dev->count == 0) { - /* De-activate the status icon. */ - ui_sb_update_icon(SB_HDD|HDD_BUS_XTA, 0); + dev->buf_idx = 0; + if (--dev->count == 0) { + /* De-activate the status icon. */ + ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0); - set_intr(dev); - return; - } + set_intr(dev); + return; + } - /* Advance to next sector. */ - next_sector(dev, drive); + /* Advance to next sector. */ + next_sector(dev, drive); - /* This saves us a LOT of code. */ - dev->state = STATE_RECV; - goto do_recv; - } - break; + /* This saves us a LOT of code. */ + dev->state = STATE_RECV; + goto do_recv; + } + break; - case CMD_FORMAT_DRIVE: - case CMD_FORMAT_TRACK: - if (drive->present) { - do_format(dev, drive, dcb); - } else { - dev->comp |= COMP_ERR; - dev->sense = ERR_NOTRDY; - } - set_intr(dev); - break; + case CMD_FORMAT_DRIVE: + case CMD_FORMAT_TRACK: + if (drive->present) { + do_format(dev, drive, dcb); + } else { + dev->comp |= COMP_ERR; + dev->sense = ERR_NOTRDY; + } + set_intr(dev); + break; - case CMD_SEEK: - /* Seek to cylinder. */ - val = (dcb->cyl_low | (dcb->cyl_high << 8)); - if (drive->present) { - do_seek(dev, drive, val); - if (val != drive->cur_cyl) { - dev->comp |= COMP_ERR; - dev->sense = ERR_SEEK; - } - } else { - dev->comp |= COMP_ERR; - dev->sense = ERR_NOTRDY; - } - set_intr(dev); - break; + case CMD_SEEK: + /* Seek to cylinder. */ + val = (dcb->cyl_low | (dcb->cyl_high << 8)); + if (drive->present) { + do_seek(dev, drive, val); + if (val != drive->cur_cyl) { + dev->comp |= COMP_ERR; + dev->sense = ERR_SEEK; + } + } else { + dev->comp |= COMP_ERR; + dev->sense = ERR_NOTRDY; + } + set_intr(dev); + break; - case CMD_SET_DRIVE_PARAMS: - switch(dev->state) { - case STATE_IDLE: - dev->state = STATE_RDATA; - dev->buf_idx = 0; - dev->buf_len = sizeof(dprm_t); - dev->buf_ptr = (uint8_t *)dev->data; - dev->status |= STAT_REQ; - break; + case CMD_SET_DRIVE_PARAMS: + switch (dev->state) { + case STATE_IDLE: + dev->state = STATE_RDATA; + dev->buf_idx = 0; + dev->buf_len = sizeof(dprm_t); + dev->buf_ptr = (uint8_t *) dev->data; + dev->status |= STAT_REQ; + break; - case STATE_RDONE: - params = (dprm_t *)dev->data; - drive->tracks = - (params->cyl_high << 8) | params->cyl_low; - drive->hpc = params->heads; - drive->spt = 17 /*hardcoded*/; - dev->status &= ~STAT_REQ; - set_intr(dev); - break; - } - break; + case STATE_RDONE: + params = (dprm_t *) dev->data; + drive->tracks = (params->cyl_high << 8) | params->cyl_low; + drive->hpc = params->heads; + drive->spt = 17 /*hardcoded*/; + dev->status &= ~STAT_REQ; + set_intr(dev); + break; + } + break; - case CMD_WRITE_SECTOR_BUFFER: - switch (dev->state) { - case STATE_IDLE: - dev->buf_idx = 0; - dev->buf_len = 512; - dev->state = STATE_RDATA; - if (dev->intr & DMA_ENA) { - dev->buf_ptr = dev->sector_buf; - xta_set_callback(dev, HDC_TIME); - } else { - dev->buf_ptr = dev->data; - dev->status |= STAT_REQ; - } - break; + case CMD_WRITE_SECTOR_BUFFER: + switch (dev->state) { + case STATE_IDLE: + dev->buf_idx = 0; + dev->buf_len = 512; + dev->state = STATE_RDATA; + if (dev->intr & DMA_ENA) { + dev->buf_ptr = dev->sector_buf; + xta_set_callback(dev, HDC_TIME); + } else { + dev->buf_ptr = dev->data; + dev->status |= STAT_REQ; + } + break; - case STATE_RDATA: - if (dev->intr & DMA_ENA) { - /* Perform DMA. */ - while (dev->buf_idx < dev->buf_len) { - val = dma_channel_read(dev->dma); - if (val == DMA_NODATA) { - xta_log("%s: CMD_WRITE_BUFFER out of data!\n", dev->name); - dev->status |= (STAT_CD | STAT_IO | STAT_REQ); - xta_set_callback(dev, HDC_TIME); - return; - } + case STATE_RDATA: + if (dev->intr & DMA_ENA) { + /* Perform DMA. */ + while (dev->buf_idx < dev->buf_len) { + val = dma_channel_read(dev->dma); + if (val == DMA_NODATA) { + xta_log("%s: CMD_WRITE_BUFFER out of data!\n", dev->name); + dev->status |= (STAT_CD | STAT_IO | STAT_REQ); + xta_set_callback(dev, HDC_TIME); + return; + } - dev->buf_ptr[dev->buf_idx] = (val & 0xff); - dev->buf_idx++; - } - dev->state = STATE_RDONE; - xta_set_callback(dev, HDC_TIME); - } - break; + dev->buf_ptr[dev->buf_idx] = (val & 0xff); + dev->buf_idx++; + } + dev->state = STATE_RDONE; + xta_set_callback(dev, HDC_TIME); + } + break; - case STATE_RDONE: - if (! (dev->intr & DMA_ENA)) - memcpy(dev->sector_buf, - dev->data, dev->buf_len); - set_intr(dev); - break; - } - break; + case STATE_RDONE: + if (!(dev->intr & DMA_ENA)) + memcpy(dev->sector_buf, + dev->data, dev->buf_len); + set_intr(dev); + break; + } + break; - case CMD_RAM_DIAGS: - switch(dev->state) { - case STATE_IDLE: - dev->state = STATE_RDONE; - xta_set_callback(dev, 5 * HDC_TIME); - break; + case CMD_RAM_DIAGS: + switch (dev->state) { + case STATE_IDLE: + dev->state = STATE_RDONE; + xta_set_callback(dev, 5 * HDC_TIME); + break; - case STATE_RDONE: - set_intr(dev); - break; - } - break; + case STATE_RDONE: + set_intr(dev); + break; + } + break; - case CMD_DRIVE_DIAGS: - switch(dev->state) { - case STATE_IDLE: - if (drive->present) { - dev->state = STATE_RDONE; - xta_set_callback(dev, 5 * HDC_TIME); - } else { - dev->comp |= COMP_ERR; - dev->sense = ERR_NOTRDY; - set_intr(dev); - } - break; + case CMD_DRIVE_DIAGS: + switch (dev->state) { + case STATE_IDLE: + if (drive->present) { + dev->state = STATE_RDONE; + xta_set_callback(dev, 5 * HDC_TIME); + } else { + dev->comp |= COMP_ERR; + dev->sense = ERR_NOTRDY; + set_intr(dev); + } + break; - case STATE_RDONE: - set_intr(dev); - break; - } - break; + case STATE_RDONE: + set_intr(dev); + break; + } + break; - case CMD_CTRL_DIAGS: - switch(dev->state) { - case STATE_IDLE: - dev->state = STATE_RDONE; - xta_set_callback(dev, 10 * HDC_TIME); - break; + case CMD_CTRL_DIAGS: + switch (dev->state) { + case STATE_IDLE: + dev->state = STATE_RDONE; + xta_set_callback(dev, 10 * HDC_TIME); + break; - case STATE_RDONE: - set_intr(dev); - break; - } - break; + case STATE_RDONE: + set_intr(dev); + break; + } + break; - default: - xta_log("%s: unknown command - %02x\n", dev->name, dcb->cmd); - dev->comp |= COMP_ERR; - dev->sense = ERR_ILLCMD; - set_intr(dev); + default: + xta_log("%s: unknown command - %02x\n", dev->name, dcb->cmd); + dev->comp |= COMP_ERR; + dev->sense = ERR_ILLCMD; + set_intr(dev); } } - /* Read one of the controller registers. */ static uint8_t hdc_read(uint16_t port, void *priv) { - hdc_t *dev = (hdc_t *)priv; + hdc_t *dev = (hdc_t *) priv; uint8_t ret = 0xff; switch (port & 7) { - case 0: /* DATA register */ - dev->status &= ~STAT_IRQ; + case 0: /* DATA register */ + dev->status &= ~STAT_IRQ; - if (dev->state == STATE_SDATA) { - if (dev->buf_idx > dev->buf_len) { - xta_log("%s: read with empty buffer!\n", - dev->name); - dev->comp |= COMP_ERR; - dev->sense = ERR_ILLCMD; - break; - } + if (dev->state == STATE_SDATA) { + if (dev->buf_idx > dev->buf_len) { + xta_log("%s: read with empty buffer!\n", + dev->name); + dev->comp |= COMP_ERR; + dev->sense = ERR_ILLCMD; + break; + } - ret = dev->buf_ptr[dev->buf_idx]; - if (++dev->buf_idx == dev->buf_len) { - /* All data sent. */ - dev->status &= ~STAT_REQ; - dev->state = STATE_SDONE; - xta_set_callback(dev, HDC_TIME); - } - } else if (dev->state == STATE_COMPL) { -xta_log("DCB=%02X status=%02X comp=%02X\n", dev->dcb.cmd, dev->status, dev->comp); - ret = dev->comp; - dev->status = 0x00; - dev->state = STATE_IDLE; - } - break; + ret = dev->buf_ptr[dev->buf_idx]; + if (++dev->buf_idx == dev->buf_len) { + /* All data sent. */ + dev->status &= ~STAT_REQ; + dev->state = STATE_SDONE; + xta_set_callback(dev, HDC_TIME); + } + } else if (dev->state == STATE_COMPL) { + xta_log("DCB=%02X status=%02X comp=%02X\n", dev->dcb.cmd, dev->status, dev->comp); + ret = dev->comp; + dev->status = 0x00; + dev->state = STATE_IDLE; + } + break; - case 1: /* STATUS register */ - ret = (dev->status & ~STAT_DCB); - break; + case 1: /* STATUS register */ + ret = (dev->status & ~STAT_DCB); + break; - case 2: /* "read option jumpers" */ - ret = 0xff; /* all switches off */ - break; + case 2: /* "read option jumpers" */ + ret = 0xff; /* all switches off */ + break; } - return(ret); + return (ret); } - /* Write to one of the controller registers. */ static void hdc_write(uint16_t port, uint8_t val, void *priv) { - hdc_t *dev = (hdc_t *)priv; + hdc_t *dev = (hdc_t *) priv; switch (port & 7) { - case 0: /* DATA register */ - if (dev->state == STATE_RDATA) { - if (! (dev->status & STAT_REQ)) { - xta_log("%s: not ready for command/data!\n", dev->name); - dev->comp |= COMP_ERR; - dev->sense = ERR_ILLCMD; - break; - } + case 0: /* DATA register */ + if (dev->state == STATE_RDATA) { + if (!(dev->status & STAT_REQ)) { + xta_log("%s: not ready for command/data!\n", dev->name); + dev->comp |= COMP_ERR; + dev->sense = ERR_ILLCMD; + break; + } - if (dev->buf_idx >= dev->buf_len) { - xta_log("%s: write with full buffer!\n", dev->name); - dev->comp |= COMP_ERR; - dev->sense = ERR_ILLCMD; - break; - } + if (dev->buf_idx >= dev->buf_len) { + xta_log("%s: write with full buffer!\n", dev->name); + dev->comp |= COMP_ERR; + dev->sense = ERR_ILLCMD; + break; + } - /* Store the data into the buffer. */ - dev->buf_ptr[dev->buf_idx] = val; - if (++dev->buf_idx == dev->buf_len) { - /* We got all the data we need. */ - dev->status &= ~STAT_REQ; - if (dev->status & STAT_DCB) - dev->state = STATE_RDONE; - else - dev->state = STATE_IDLE; - dev->status &= ~STAT_CD; - xta_set_callback(dev, HDC_TIME); - } - } - break; + /* Store the data into the buffer. */ + dev->buf_ptr[dev->buf_idx] = val; + if (++dev->buf_idx == dev->buf_len) { + /* We got all the data we need. */ + dev->status &= ~STAT_REQ; + if (dev->status & STAT_DCB) + dev->state = STATE_RDONE; + else + dev->state = STATE_IDLE; + dev->status &= ~STAT_CD; + xta_set_callback(dev, HDC_TIME); + } + } + break; - case 1: /* RESET register */ - dev->sense = 0x00; - dev->state = STATE_IDLE; - break; + case 1: /* RESET register */ + dev->sense = 0x00; + dev->state = STATE_IDLE; + break; - case 2: /* "controller-select" */ - /* Reset the DCB buffer. */ - dev->buf_idx = 0; - dev->buf_len = sizeof(dcb_t); - dev->buf_ptr = (uint8_t *)&dev->dcb; - dev->state = STATE_RDATA; - dev->status = (STAT_BSY | STAT_CD | STAT_REQ); - break; + case 2: /* "controller-select" */ + /* Reset the DCB buffer. */ + dev->buf_idx = 0; + dev->buf_len = sizeof(dcb_t); + dev->buf_ptr = (uint8_t *) &dev->dcb; + dev->state = STATE_RDATA; + dev->status = (STAT_BSY | STAT_CD | STAT_REQ); + break; - case 3: /* DMA/IRQ intr register */ -//xta_log("%s: WriteMASK(%02X)\n", dev->name, val); - dev->intr = val; - break; + case 3: /* DMA/IRQ intr register */ + // xta_log("%s: WriteMASK(%02X)\n", dev->name, val); + dev->intr = val; + break; } } - static int xta_available(void) { - return(rom_present(WD_BIOS_FILE)); + return (rom_present(WD_BIOS_FILE)); } - static void * xta_init(const device_t *info) { drive_t *drive; - char *fn = NULL; - hdc_t *dev; - int c, i; - int max = XTA_NUM; + char *fn = NULL; + hdc_t *dev; + int c, i; + int max = XTA_NUM; /* Allocate and initialize device block. */ dev = malloc(sizeof(hdc_t)); @@ -1003,96 +985,96 @@ xta_init(const device_t *info) dev->type = info->local; /* Do per-controller-type setup. */ - switch(dev->type) { - case 0: /* WDXT-150, with BIOS */ - dev->name = "WDXT-150"; - dev->base = device_get_config_hex16("base"); - dev->irq = device_get_config_int("irq"); - dev->rom_addr = device_get_config_hex20("bios_addr"); - dev->dma = 3; - fn = WD_BIOS_FILE; - max = 1; - break; + switch (dev->type) { + case 0: /* WDXT-150, with BIOS */ + dev->name = "WDXT-150"; + dev->base = device_get_config_hex16("base"); + dev->irq = device_get_config_int("irq"); + dev->rom_addr = device_get_config_hex20("bios_addr"); + dev->dma = 3; + fn = WD_BIOS_FILE; + max = 1; + break; - case 1: /* EuroPC */ - dev->name = "HD20"; - dev->base = 0x0320; - dev->irq = 5; - dev->dma = 3; - break; + case 1: /* EuroPC */ + dev->name = "HD20"; + dev->base = 0x0320; + dev->irq = 5; + dev->dma = 3; + break; } xta_log("%s: initializing (I/O=%04X, IRQ=%d, DMA=%d", - dev->name, dev->base, dev->irq, dev->dma); + dev->name, dev->base, dev->irq, dev->dma); if (dev->rom_addr != 0x000000) - xta_log(", BIOS=%06X", dev->rom_addr); + xta_log(", BIOS=%06X", dev->rom_addr); xta_log(")\n"); /* Load any disks for this device class. */ c = 0; for (i = 0; i < HDD_NUM; i++) { - if ((hdd[i].bus == HDD_BUS_XTA) && (hdd[i].xta_channel < max)) { - drive = &dev->drives[hdd[i].xta_channel]; + if ((hdd[i].bus == HDD_BUS_XTA) && (hdd[i].xta_channel < max)) { + drive = &dev->drives[hdd[i].xta_channel]; - if (! hdd_image_load(i)) { - drive->present = 0; - continue; - } - drive->id = c; - drive->hdd_num = i; - drive->present = 1; + if (!hdd_image_load(i)) { + drive->present = 0; + continue; + } + drive->id = c; + drive->hdd_num = i; + drive->present = 1; - /* These are the "hardware" parameters (from the image.) */ - drive->cfg_spt = (uint8_t)(hdd[i].spt & 0xff); - drive->cfg_hpc = (uint8_t)(hdd[i].hpc & 0xff); - drive->cfg_tracks = (uint16_t)hdd[i].tracks; + /* These are the "hardware" parameters (from the image.) */ + drive->cfg_spt = (uint8_t) (hdd[i].spt & 0xff); + drive->cfg_hpc = (uint8_t) (hdd[i].hpc & 0xff); + drive->cfg_tracks = (uint16_t) hdd[i].tracks; - /* Use them as "configured" parameters until overwritten. */ - drive->spt = drive->cfg_spt; - drive->hpc = drive->cfg_hpc; - drive->tracks = drive->cfg_tracks; + /* Use them as "configured" parameters until overwritten. */ + drive->spt = drive->cfg_spt; + drive->hpc = drive->cfg_hpc; + drive->tracks = drive->cfg_tracks; - xta_log("%s: drive%d (cyl=%d,hd=%d,spt=%d), disk %d\n", - dev->name, hdd[i].xta_channel, drive->tracks, - drive->hpc, drive->spt, i); + xta_log("%s: drive%d (cyl=%d,hd=%d,spt=%d), disk %d\n", + dev->name, hdd[i].xta_channel, drive->tracks, + drive->hpc, drive->spt, i); - if (++c > max) break; - } + if (++c > max) + break; + } } /* Enable the I/O block. */ io_sethandler(dev->base, 4, - hdc_read,NULL,NULL, hdc_write,NULL,NULL, dev); + hdc_read, NULL, NULL, hdc_write, NULL, NULL, dev); /* Load BIOS if it has one. */ if (dev->rom_addr != 0x000000) { - rom_init(&dev->bios_rom, fn, - dev->rom_addr, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); - } + rom_init(&dev->bios_rom, fn, + dev->rom_addr, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); + } /* Create a timer for command delays. */ timer_add(&dev->timer, hdc_callback, dev, 0); - return(dev); + return (dev); } - static void xta_close(void *priv) { - hdc_t *dev = (hdc_t *)priv; + hdc_t *dev = (hdc_t *) priv; drive_t *drive; - int d; + int d; /* Remove the I/O handler. */ io_removehandler(dev->base, 4, - hdc_read,NULL,NULL, hdc_write,NULL,NULL, dev); + hdc_read, NULL, NULL, hdc_write, NULL, NULL, dev); /* Close all disks and their images. */ for (d = 0; d < XTA_NUM; d++) { - drive = &dev->drives[d]; + drive = &dev->drives[d]; - hdd_image_close(drive->hdd_num); + hdd_image_close(drive->hdd_num); } /* Release the device. */ @@ -1100,7 +1082,7 @@ xta_close(void *priv) } static const device_config_t wdxt150_config[] = { -// clang-format off + // clang-format off { .name = "base", .description = "Address", diff --git a/src/disk/hdc_xtide.c b/src/disk/hdc_xtide.c index 34805db2b..f623d82f5 100644 --- a/src/disk/hdc_xtide.c +++ b/src/disk/hdc_xtide.c @@ -44,90 +44,85 @@ #include <86box/hdc.h> #include <86box/hdc_ide.h> - -#define ROM_PATH_XT "roms/hdd/xtide/ide_xt.bin" -#define ROM_PATH_AT "roms/hdd/xtide/ide_at.bin" -#define ROM_PATH_PS2 "roms/hdd/xtide/SIDE1V12.BIN" -#define ROM_PATH_PS2AT "roms/hdd/xtide/ide_at_1_1_5.bin" -#define ROM_PATH_AT_386 "roms/hdd/xtide/ide_386.bin" - +#define ROM_PATH_XT "roms/hdd/xtide/ide_xt.bin" +#define ROM_PATH_AT "roms/hdd/xtide/ide_at.bin" +#define ROM_PATH_PS2 "roms/hdd/xtide/SIDE1V12.BIN" +#define ROM_PATH_PS2AT "roms/hdd/xtide/ide_at_1_1_5.bin" +#define ROM_PATH_AT_386 "roms/hdd/xtide/ide_386.bin" typedef struct { - void *ide_board; - uint8_t data_high; - rom_t bios_rom; + void *ide_board; + uint8_t data_high; + rom_t bios_rom; } xtide_t; - static void xtide_write(uint16_t port, uint8_t val, void *priv) { - xtide_t *xtide = (xtide_t *)priv; + xtide_t *xtide = (xtide_t *) priv; switch (port & 0xf) { - case 0x0: - ide_writew(0x0, val | (xtide->data_high << 8), xtide->ide_board); - return; + case 0x0: + ide_writew(0x0, val | (xtide->data_high << 8), xtide->ide_board); + return; - case 0x1: - case 0x2: - case 0x3: - case 0x4: - case 0x5: - case 0x6: - case 0x7: - ide_writeb((port & 0xf), val, xtide->ide_board); - return; + case 0x1: + case 0x2: + case 0x3: + case 0x4: + case 0x5: + case 0x6: + case 0x7: + ide_writeb((port & 0xf), val, xtide->ide_board); + return; - case 0x8: - xtide->data_high = val; - return; + case 0x8: + xtide->data_high = val; + return; - case 0xe: - ide_write_devctl(0x0, val, xtide->ide_board); - return; + case 0xe: + ide_write_devctl(0x0, val, xtide->ide_board); + return; } } - static uint8_t xtide_read(uint16_t port, void *priv) { - xtide_t *xtide = (xtide_t *)priv; + xtide_t *xtide = (xtide_t *) priv; uint16_t tempw = 0xffff; switch (port & 0xf) { - case 0x0: - tempw = ide_readw(0x0, xtide->ide_board); - xtide->data_high = tempw >> 8; - break; + case 0x0: + tempw = ide_readw(0x0, xtide->ide_board); + xtide->data_high = tempw >> 8; + break; - case 0x1: - case 0x2: - case 0x3: - case 0x4: - case 0x5: - case 0x6: - case 0x7: - tempw = ide_readb((port & 0xf), xtide->ide_board); - break; + case 0x1: + case 0x2: + case 0x3: + case 0x4: + case 0x5: + case 0x6: + case 0x7: + tempw = ide_readb((port & 0xf), xtide->ide_board); + break; - case 0x8: - tempw = xtide->data_high; - break; + case 0x8: + tempw = xtide->data_high; + break; - case 0xe: - tempw = ide_read_alt_status(0x0, xtide->ide_board); - break; + case 0xe: + tempw = ide_read_alt_status(0x0, xtide->ide_board); + break; - default: - break; + default: + break; } - return(tempw & 0xff); + return (tempw & 0xff); } - static void * xtide_init(const device_t *info) { @@ -136,25 +131,23 @@ xtide_init(const device_t *info) memset(xtide, 0x00, sizeof(xtide_t)); rom_init(&xtide->bios_rom, ROM_PATH_XT, - 0xc8000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); + 0xc8000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); xtide->ide_board = ide_xtide_init(); io_sethandler(0x0300, 16, - xtide_read, NULL, NULL, - xtide_write, NULL, NULL, xtide); + xtide_read, NULL, NULL, + xtide_write, NULL, NULL, xtide); - return(xtide); + return (xtide); } - static int xtide_available(void) { - return(rom_present(ROM_PATH_XT)); + return (rom_present(ROM_PATH_XT)); } - static void * xtide_at_init(const device_t *info) { @@ -163,33 +156,30 @@ xtide_at_init(const device_t *info) memset(xtide, 0x00, sizeof(xtide_t)); if (info->local == 1) { - rom_init(&xtide->bios_rom, ROM_PATH_AT_386, - 0xc8000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); + rom_init(&xtide->bios_rom, ROM_PATH_AT_386, + 0xc8000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); } else { - rom_init(&xtide->bios_rom, ROM_PATH_AT, - 0xc8000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); + rom_init(&xtide->bios_rom, ROM_PATH_AT, + 0xc8000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); } device_add(&ide_isa_2ch_device); - return(xtide); + return (xtide); } - static int xtide_at_available(void) { - return(rom_present(ROM_PATH_AT)); + return (rom_present(ROM_PATH_AT)); } - static int xtide_at_386_available(void) { - return(rom_present(ROM_PATH_AT_386)); + return (rom_present(ROM_PATH_AT_386)); } - static void * xtide_acculogic_init(const device_t *info) { @@ -198,36 +188,33 @@ xtide_acculogic_init(const device_t *info) memset(xtide, 0x00, sizeof(xtide_t)); rom_init(&xtide->bios_rom, ROM_PATH_PS2, - 0xc8000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); + 0xc8000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); xtide->ide_board = ide_xtide_init(); io_sethandler(0x0360, 16, - xtide_read, NULL, NULL, - xtide_write, NULL, NULL, xtide); + xtide_read, NULL, NULL, + xtide_write, NULL, NULL, xtide); - return(xtide); + return (xtide); } - static int xtide_acculogic_available(void) { - return(rom_present(ROM_PATH_PS2)); + return (rom_present(ROM_PATH_PS2)); } - static void xtide_close(void *priv) { - xtide_t *xtide = (xtide_t *)priv; + xtide_t *xtide = (xtide_t *) priv; free(xtide); ide_xtide_close(); } - static void * xtide_at_ps2_init(const device_t *info) { @@ -236,95 +223,93 @@ xtide_at_ps2_init(const device_t *info) memset(xtide, 0x00, sizeof(xtide_t)); rom_init(&xtide->bios_rom, ROM_PATH_PS2AT, - 0xc8000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); + 0xc8000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); device_add(&ide_isa_2ch_device); - return(xtide); + return (xtide); } - static int xtide_at_ps2_available(void) { - return(rom_present(ROM_PATH_PS2AT)); + return (rom_present(ROM_PATH_PS2AT)); } - static void xtide_at_close(void *priv) { - xtide_t *xtide = (xtide_t *)priv; + xtide_t *xtide = (xtide_t *) priv; free(xtide); } const device_t xtide_device = { - .name = "PC/XT XTIDE", + .name = "PC/XT XTIDE", .internal_name = "xtide", - .flags = DEVICE_ISA, - .local = 0, - .init = xtide_init, - .close = xtide_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = xtide_init, + .close = xtide_close, + .reset = NULL, { .available = xtide_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t xtide_at_device = { - .name = "PC/AT XTIDE", + .name = "PC/AT XTIDE", .internal_name = "xtide_at", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 0, - .init = xtide_at_init, - .close = xtide_at_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 0, + .init = xtide_at_init, + .close = xtide_at_close, + .reset = NULL, { .available = xtide_at_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t xtide_at_386_device = { - .name = "PC/AT XTIDE (386)", + .name = "PC/AT XTIDE (386)", .internal_name = "xtide_at_386", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 1, - .init = xtide_at_init, - .close = xtide_at_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 1, + .init = xtide_at_init, + .close = xtide_at_close, + .reset = NULL, { .available = xtide_at_386_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t xtide_acculogic_device = { - .name = "Acculogic XT IDE", + .name = "Acculogic XT IDE", .internal_name = "xtide_acculogic", - .flags = DEVICE_ISA, - .local = 0, - .init = xtide_acculogic_init, - .close = xtide_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = xtide_acculogic_init, + .close = xtide_close, + .reset = NULL, { .available = xtide_acculogic_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t xtide_at_ps2_device = { - .name = "PS/2 AT XTIDE (1.1.5)", + .name = "PS/2 AT XTIDE (1.1.5)", .internal_name = "xtide_at_ps2", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 0, - .init = xtide_at_ps2_init, - .close = xtide_at_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 0, + .init = xtide_at_ps2_init, + .close = xtide_at_close, + .reset = NULL, { .available = xtide_at_ps2_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/disk/hdd.c b/src/disk/hdd.c index d2f77a1ab..2ba59eb93 100644 --- a/src/disk/hdd.c +++ b/src/disk/hdd.c @@ -31,12 +31,9 @@ #include <86box/video.h> #include "cpu.h" - #define HDD_OVERHEAD_TIME 50.0 - -hard_disk_t hdd[HDD_NUM]; - +hard_disk_t hdd[HDD_NUM]; int hdd_init(void) @@ -44,122 +41,119 @@ hdd_init(void) /* Clear all global data. */ memset(hdd, 0x00, sizeof(hdd)); - return(0); + return (0); } - int hdd_string_to_bus(char *str, int cdrom) { - if (! strcmp(str, "none")) - return(HDD_BUS_DISABLED); + if (!strcmp(str, "none")) + return (HDD_BUS_DISABLED); - if (! strcmp(str, "mfm") || ! strcmp(str, "rll")) { - if (cdrom) { + if (!strcmp(str, "mfm") || !strcmp(str, "rll")) { + if (cdrom) { no_cdrom: - ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2130, (wchar_t *) IDS_4099); - return(0); - } + ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2130, (wchar_t *) IDS_4099); + return (0); + } - return(HDD_BUS_MFM); + return (HDD_BUS_MFM); } /* FIXME: delete 'rll' in a year or so.. --FvK */ if (!strcmp(str, "esdi") || !strcmp(str, "rll")) { - if (cdrom) goto no_cdrom; + if (cdrom) + goto no_cdrom; - return(HDD_BUS_ESDI); + return (HDD_BUS_ESDI); } - if (! strcmp(str, "ide_pio_only")) - return(HDD_BUS_IDE); + if (!strcmp(str, "ide_pio_only")) + return (HDD_BUS_IDE); - if (! strcmp(str, "ide")) - return(HDD_BUS_IDE); + if (!strcmp(str, "ide")) + return (HDD_BUS_IDE); - if (! strcmp(str, "atapi_pio_only")) - return(HDD_BUS_ATAPI); + if (!strcmp(str, "atapi_pio_only")) + return (HDD_BUS_ATAPI); - if (! strcmp(str, "atapi")) - return(HDD_BUS_ATAPI); + if (!strcmp(str, "atapi")) + return (HDD_BUS_ATAPI); - if (! strcmp(str, "eide")) - return(HDD_BUS_IDE); + if (!strcmp(str, "eide")) + return (HDD_BUS_IDE); - if (! strcmp(str, "xta")) - return(HDD_BUS_XTA); + if (!strcmp(str, "xta")) + return (HDD_BUS_XTA); - if (! strcmp(str, "atide")) - return(HDD_BUS_IDE); + if (!strcmp(str, "atide")) + return (HDD_BUS_IDE); - if (! strcmp(str, "ide_pio_and_dma")) - return(HDD_BUS_IDE); + if (!strcmp(str, "ide_pio_and_dma")) + return (HDD_BUS_IDE); - if (! strcmp(str, "atapi_pio_and_dma")) - return(HDD_BUS_ATAPI); + if (!strcmp(str, "atapi_pio_and_dma")) + return (HDD_BUS_ATAPI); - if (! strcmp(str, "scsi")) - return(HDD_BUS_SCSI); + if (!strcmp(str, "scsi")) + return (HDD_BUS_SCSI); - return(0); + return (0); } - char * hdd_bus_to_string(int bus, int cdrom) { char *s = "none"; switch (bus) { - case HDD_BUS_DISABLED: - default: - break; + case HDD_BUS_DISABLED: + default: + break; - case HDD_BUS_MFM: - s = "mfm"; - break; + case HDD_BUS_MFM: + s = "mfm"; + break; - case HDD_BUS_XTA: - s = "xta"; - break; + case HDD_BUS_XTA: + s = "xta"; + break; - case HDD_BUS_ESDI: - s = "esdi"; - break; + case HDD_BUS_ESDI: + s = "esdi"; + break; - case HDD_BUS_IDE: - s = "ide"; - break; + case HDD_BUS_IDE: + s = "ide"; + break; - case HDD_BUS_ATAPI: - s = "atapi"; - break; + case HDD_BUS_ATAPI: + s = "atapi"; + break; - case HDD_BUS_SCSI: - s = "scsi"; - break; + case HDD_BUS_SCSI: + s = "scsi"; + break; } - return(s); + return (s); } - int hdd_is_valid(int c) { if (hdd[c].bus == HDD_BUS_DISABLED) - return(0); + return (0); if (strlen(hdd[c].fn) == 0) - return(0); + return (0); - if ((hdd[c].tracks==0) || (hdd[c].hpc==0) || (hdd[c].spt==0)) - return(0); + if ((hdd[c].tracks == 0) || (hdd[c].hpc == 0) || (hdd[c].spt == 0)) + return (0); - return(1); + return (1); } - double hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_t continuous, double max_seek_time) { @@ -168,121 +162,118 @@ hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_ hdd_zone_t *zone = NULL; for (int i = 0; i < hdd->num_zones; i++) { - zone = &hdd->zones[i]; - if (zone->end_sector >= dst_addr) - break; + zone = &hdd->zones[i]; + if (zone->end_sector >= dst_addr) + break; } - double continuous_times[2][2] = { { hdd->head_switch_usec, hdd->cyl_switch_usec }, - { zone->sector_time_usec, zone->sector_time_usec } }; + double continuous_times[2][2] = { + {hdd->head_switch_usec, hdd->cyl_switch_usec }, + { zone->sector_time_usec, zone->sector_time_usec} + }; double times[2] = { HDD_OVERHEAD_TIME, hdd->avg_rotation_lat_usec }; - uint32_t new_track = zone->start_track + ((dst_addr - zone->start_sector) / zone->sectors_per_track); - uint32_t new_cylinder = new_track / hdd->phy_heads; - uint32_t cylinder_diff = abs((int)hdd->cur_cylinder - (int)new_cylinder); + uint32_t new_track = zone->start_track + ((dst_addr - zone->start_sector) / zone->sectors_per_track); + uint32_t new_cylinder = new_track / hdd->phy_heads; + uint32_t cylinder_diff = abs((int) hdd->cur_cylinder - (int) new_cylinder); bool sequential = dst_addr == hdd->cur_addr + 1; - continuous = continuous && sequential; + continuous = continuous && sequential; double seek_time = 0.0; if (continuous) - seek_time = continuous_times[new_track == hdd->cur_track][!!cylinder_diff]; + seek_time = continuous_times[new_track == hdd->cur_track][!!cylinder_diff]; else { - if (!cylinder_diff) - seek_time = times[operation != HDD_OP_SEEK]; - else { - seek_time = hdd->cyl_switch_usec + (hdd->full_stroke_usec * (double)cylinder_diff / (double)hdd->phy_cyl) + - ((operation != HDD_OP_SEEK) * hdd->avg_rotation_lat_usec); - } + if (!cylinder_diff) + seek_time = times[operation != HDD_OP_SEEK]; + else { + seek_time = hdd->cyl_switch_usec + (hdd->full_stroke_usec * (double) cylinder_diff / (double) hdd->phy_cyl) + ((operation != HDD_OP_SEEK) * hdd->avg_rotation_lat_usec); + } } if (!max_seek_time || seek_time <= max_seek_time) { - hdd->cur_addr = dst_addr; - hdd->cur_track = new_track; - hdd->cur_cylinder = new_cylinder; + hdd->cur_addr = dst_addr; + hdd->cur_track = new_track; + hdd->cur_cylinder = new_cylinder; } return seek_time; } - static void hdd_readahead_update(hard_disk_t *hdd) { uint64_t elapsed_cycles; - double elapsed_us, seek_time; + double elapsed_us, seek_time; uint32_t max_read_ahead, i; uint32_t space_needed; hdd_cache_t *cache = &hdd->cache; if (cache->ra_ongoing) { - hdd_cache_seg_t *segment = &cache->segments[cache->ra_segment]; + hdd_cache_seg_t *segment = &cache->segments[cache->ra_segment]; - elapsed_cycles = tsc - cache->ra_start_time; - elapsed_us = (double)elapsed_cycles / cpuclock * 1000000.0; - /* Do not overwrite data not yet read by host */ - max_read_ahead = (segment->host_addr + cache->segment_size) - segment->ra_addr; + elapsed_cycles = tsc - cache->ra_start_time; + elapsed_us = (double) elapsed_cycles / cpuclock * 1000000.0; + /* Do not overwrite data not yet read by host */ + max_read_ahead = (segment->host_addr + cache->segment_size) - segment->ra_addr; - seek_time = 0.0; + seek_time = 0.0; - for (i = 0; i < max_read_ahead; i++) { - seek_time += hdd_seek_get_time(hdd, segment->ra_addr, HDD_OP_READ, 1, elapsed_us - seek_time); - if (seek_time > elapsed_us) - break; + for (i = 0; i < max_read_ahead; i++) { + seek_time += hdd_seek_get_time(hdd, segment->ra_addr, HDD_OP_READ, 1, elapsed_us - seek_time); + if (seek_time > elapsed_us) + break; - segment->ra_addr++; - } + segment->ra_addr++; + } - if (segment->ra_addr > segment->lba_addr + cache->segment_size) { - space_needed = segment->ra_addr - (segment->lba_addr + cache->segment_size); - segment->lba_addr += space_needed; - } + if (segment->ra_addr > segment->lba_addr + cache->segment_size) { + space_needed = segment->ra_addr - (segment->lba_addr + cache->segment_size); + segment->lba_addr += space_needed; + } } } - static double hdd_writecache_flush(hard_disk_t *hdd) { double seek_time = 0.0; while (hdd->cache.write_pending) { - seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, 0); - hdd->cache.write_addr++; - hdd->cache.write_pending--; + seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, 0); + hdd->cache.write_addr++; + hdd->cache.write_pending--; } return seek_time; } - static void hdd_writecache_update(hard_disk_t *hdd) { uint64_t elapsed_cycles; - double elapsed_us, seek_time; + double elapsed_us, seek_time; if (hdd->cache.write_pending) { - elapsed_cycles = tsc - hdd->cache.write_start_time; - elapsed_us = (double)elapsed_cycles / cpuclock * 1000000.0; - seek_time = 0.0; + elapsed_cycles = tsc - hdd->cache.write_start_time; + elapsed_us = (double) elapsed_cycles / cpuclock * 1000000.0; + seek_time = 0.0; - while (hdd->cache.write_pending) { - seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, elapsed_us - seek_time); - if (seek_time > elapsed_us) - break; + while (hdd->cache.write_pending) { + seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, elapsed_us - seek_time); + if (seek_time > elapsed_us) + break; - hdd->cache.write_addr++; - hdd->cache.write_pending--; - } + hdd->cache.write_addr++; + hdd->cache.write_pending--; + } } } - double hdd_timing_write(hard_disk_t *hdd, uint32_t addr, uint32_t len) { - double seek_time = 0.0; + double seek_time = 0.0; uint32_t flush_needed; if (!hdd->speed_preset) @@ -294,31 +285,30 @@ hdd_timing_write(hard_disk_t *hdd, uint32_t addr, uint32_t len) hdd->cache.ra_ongoing = 0; if (hdd->cache.write_pending && (addr != (hdd->cache.write_addr + hdd->cache.write_pending))) { - /* New request is not sequential to existing cache, need to flush it */ - seek_time += hdd_writecache_flush(hdd); + /* New request is not sequential to existing cache, need to flush it */ + seek_time += hdd_writecache_flush(hdd); } if (!hdd->cache.write_pending) { - /* Cache is empty */ - hdd->cache.write_addr = addr; + /* Cache is empty */ + hdd->cache.write_addr = addr; } hdd->cache.write_pending += len; if (hdd->cache.write_pending > hdd->cache.write_size) { - /* If request is bigger than free cache, flush some data first */ - flush_needed = hdd->cache.write_pending - hdd->cache.write_size; - for (uint32_t i = 0; i < flush_needed; i++) { - seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, 0); - hdd->cache.write_addr++; - } + /* If request is bigger than free cache, flush some data first */ + flush_needed = hdd->cache.write_pending - hdd->cache.write_size; + for (uint32_t i = 0; i < flush_needed; i++) { + seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, 0); + hdd->cache.write_addr++; + } } - hdd->cache.write_start_time = tsc + (uint32_t)(seek_time * cpuclock / 1000000.0); + hdd->cache.write_start_time = tsc + (uint32_t) (seek_time * cpuclock / 1000000.0); return seek_time; } - double hdd_timing_read(hard_disk_t *hdd, uint32_t addr, uint32_t len) { @@ -332,159 +322,145 @@ hdd_timing_read(hard_disk_t *hdd, uint32_t addr, uint32_t len) seek_time += hdd_writecache_flush(hdd); - hdd_cache_t *cache = &hdd->cache; + hdd_cache_t *cache = &hdd->cache; hdd_cache_seg_t *active_seg = &cache->segments[0]; for (uint32_t i = 0; i < cache->num_segments; i++) { - hdd_cache_seg_t *segment = &cache->segments[i]; - if (!segment->valid) { - active_seg = segment; - continue; - } + hdd_cache_seg_t *segment = &cache->segments[i]; + if (!segment->valid) { + active_seg = segment; + continue; + } - if (segment->lba_addr <= addr && (segment->lba_addr + cache->segment_size) >= addr) { - /* Cache HIT */ - segment->host_addr = addr; - active_seg = segment; - if (addr + len > segment->ra_addr) { - uint32_t need_read = (addr + len) - segment->ra_addr; - for (uint32_t j = 0; j < need_read; j++) { - seek_time += hdd_seek_get_time(hdd, segment->ra_addr, HDD_OP_READ, 1, 0.0); - segment->ra_addr++; - } - } - if (addr + len > segment->lba_addr + cache->segment_size) { - /* Need to erase some previously cached data */ - uint32_t space_needed = (addr + len) - (segment->lba_addr + cache->segment_size); - segment->lba_addr += space_needed; - } - goto update_lru; - } else { - if (segment->lru > active_seg->lru) - active_seg = segment; - } + if (segment->lba_addr <= addr && (segment->lba_addr + cache->segment_size) >= addr) { + /* Cache HIT */ + segment->host_addr = addr; + active_seg = segment; + if (addr + len > segment->ra_addr) { + uint32_t need_read = (addr + len) - segment->ra_addr; + for (uint32_t j = 0; j < need_read; j++) { + seek_time += hdd_seek_get_time(hdd, segment->ra_addr, HDD_OP_READ, 1, 0.0); + segment->ra_addr++; + } + } + if (addr + len > segment->lba_addr + cache->segment_size) { + /* Need to erase some previously cached data */ + uint32_t space_needed = (addr + len) - (segment->lba_addr + cache->segment_size); + segment->lba_addr += space_needed; + } + goto update_lru; + } else { + if (segment->lru > active_seg->lru) + active_seg = segment; + } } /* Cache MISS */ - active_seg->lba_addr = addr; - active_seg->valid = 1; + active_seg->lba_addr = addr; + active_seg->valid = 1; active_seg->host_addr = addr; - active_seg->ra_addr = addr; + active_seg->ra_addr = addr; for (uint32_t i = 0; i < len; i++) { - seek_time += hdd_seek_get_time(hdd, active_seg->ra_addr, HDD_OP_READ, i != 0, 0.0); - active_seg->ra_addr++; + seek_time += hdd_seek_get_time(hdd, active_seg->ra_addr, HDD_OP_READ, i != 0, 0.0); + active_seg->ra_addr++; } update_lru: for (uint32_t i = 0; i < cache->num_segments; i++) - cache->segments[i].lru++; + cache->segments[i].lru++; active_seg->lru = 0; - cache->ra_ongoing = 1; - cache->ra_segment = active_seg->id; - cache->ra_start_time = tsc + (uint32_t)(seek_time * cpuclock / 1000000.0); + cache->ra_ongoing = 1; + cache->ra_segment = active_seg->id; + cache->ra_start_time = tsc + (uint32_t) (seek_time * cpuclock / 1000000.0); return seek_time; } - static void hdd_cache_init(hard_disk_t *hdd) { hdd_cache_t *cache = &hdd->cache; - uint32_t i; + uint32_t i; - cache->ra_segment = 0; - cache->ra_ongoing = 0; + cache->ra_segment = 0; + cache->ra_ongoing = 0; cache->ra_start_time = 0; for (i = 0; i < cache->num_segments; i++) { - cache->segments[i].valid = 0; - cache->segments[i].lru = 0; - cache->segments[i].id = i; - cache->segments[i].ra_addr = 0; - cache->segments[i].host_addr = 0; + cache->segments[i].valid = 0; + cache->segments[i].lru = 0; + cache->segments[i].id = i; + cache->segments[i].ra_addr = 0; + cache->segments[i].host_addr = 0; } } - static void hdd_zones_init(hard_disk_t *hdd) { - uint32_t lba = 0, track = 0; - uint32_t i, tracks; - double revolution_usec = 60.0 / (double)hdd->rpm * 1000000.0; + uint32_t lba = 0, track = 0; + uint32_t i, tracks; + double revolution_usec = 60.0 / (double) hdd->rpm * 1000000.0; hdd_zone_t *zone; for (i = 0; i < hdd->num_zones; i++) { - zone = &hdd->zones[i]; - zone->start_sector = lba; - zone->start_track = track; - zone->sector_time_usec = revolution_usec / (double)zone->sectors_per_track; - tracks = zone->cylinders * hdd->phy_heads; - lba += tracks * zone->sectors_per_track; - zone->end_sector = lba - 1; - track += tracks - 1; + zone = &hdd->zones[i]; + zone->start_sector = lba; + zone->start_track = track; + zone->sector_time_usec = revolution_usec / (double) zone->sectors_per_track; + tracks = zone->cylinders * hdd->phy_heads; + lba += tracks * zone->sectors_per_track; + zone->end_sector = lba - 1; + track += tracks - 1; } } - static hdd_preset_t hdd_speed_presets[] = { - { .name = "RAM Disk (max. speed)", .internal_name = "ramdisk", .rcache_num_seg = 16, .rcache_seg_size = 128, .max_multiple = 32 }, + {.name = "RAM Disk (max. speed)", .internal_name = "ramdisk", .rcache_num_seg = 16, .rcache_seg_size = 128, .max_multiple = 32}, - { .name = "[1989] 3500 RPM", .internal_name = "1989_3500rpm", .zones = 1, .avg_spt = 35, .heads = 2, .rpm = 3500, - .full_stroke_ms = 40, .track_seek_ms = 8, .rcache_num_seg = 1, .rcache_seg_size = 16, .max_multiple = 8 }, + { .name = "[1989] 3500 RPM", .internal_name = "1989_3500rpm", .zones = 1, .avg_spt = 35, .heads = 2, .rpm = 3500, .full_stroke_ms = 40, .track_seek_ms = 8, .rcache_num_seg = 1, .rcache_seg_size = 16, .max_multiple = 8 }, - { .name = "[1992] 3600 RPM", .internal_name = "1992_3600rpm", .zones = 1, .avg_spt = 45, .heads = 2, .rpm = 3600, - .full_stroke_ms = 30, .track_seek_ms = 6, .rcache_num_seg = 4, .rcache_seg_size = 16, .max_multiple = 8 }, + { .name = "[1992] 3600 RPM", .internal_name = "1992_3600rpm", .zones = 1, .avg_spt = 45, .heads = 2, .rpm = 3600, .full_stroke_ms = 30, .track_seek_ms = 6, .rcache_num_seg = 4, .rcache_seg_size = 16, .max_multiple = 8 }, - { .name = "[1994] 4500 RPM", .internal_name = "1994_4500rpm", .zones = 8, .avg_spt = 80, .heads = 4, .rpm = 4500, - .full_stroke_ms = 26, .track_seek_ms = 5, .rcache_num_seg = 4, .rcache_seg_size = 32, .max_multiple = 16 }, + { .name = "[1994] 4500 RPM", .internal_name = "1994_4500rpm", .zones = 8, .avg_spt = 80, .heads = 4, .rpm = 4500, .full_stroke_ms = 26, .track_seek_ms = 5, .rcache_num_seg = 4, .rcache_seg_size = 32, .max_multiple = 16 }, - { .name = "[1996] 5400 RPM", .internal_name = "1996_5400rpm", .zones = 16, .avg_spt = 135, .heads = 4, .rpm = 5400, - .full_stroke_ms = 24, .track_seek_ms = 3, .rcache_num_seg = 4, .rcache_seg_size = 64, .max_multiple = 16 }, + { .name = "[1996] 5400 RPM", .internal_name = "1996_5400rpm", .zones = 16, .avg_spt = 135, .heads = 4, .rpm = 5400, .full_stroke_ms = 24, .track_seek_ms = 3, .rcache_num_seg = 4, .rcache_seg_size = 64, .max_multiple = 16 }, - { .name = "[1997] 5400 RPM", .internal_name = "1997_5400rpm", .zones = 16, .avg_spt = 185, .heads = 6, .rpm = 5400, - .full_stroke_ms = 20, .track_seek_ms = 2.5, .rcache_num_seg = 8, .rcache_seg_size = 64, .max_multiple = 32 }, + { .name = "[1997] 5400 RPM", .internal_name = "1997_5400rpm", .zones = 16, .avg_spt = 185, .heads = 6, .rpm = 5400, .full_stroke_ms = 20, .track_seek_ms = 2.5, .rcache_num_seg = 8, .rcache_seg_size = 64, .max_multiple = 32 }, - { .name = "[1998] 5400 RPM", .internal_name = "1998_5400rpm", .zones = 16, .avg_spt = 300, .heads = 8, .rpm = 5400, - .full_stroke_ms = 20, .track_seek_ms = 2, .rcache_num_seg = 8, .rcache_seg_size = 128, .max_multiple = 32 }, + { .name = "[1998] 5400 RPM", .internal_name = "1998_5400rpm", .zones = 16, .avg_spt = 300, .heads = 8, .rpm = 5400, .full_stroke_ms = 20, .track_seek_ms = 2, .rcache_num_seg = 8, .rcache_seg_size = 128, .max_multiple = 32 }, - { .name = "[2000] 7200 RPM", .internal_name = "2000_7200rpm", .zones = 16, .avg_spt = 350, .heads = 6, .rpm = 7200, - .full_stroke_ms = 15, .track_seek_ms = 2, .rcache_num_seg = 16, .rcache_seg_size = 128, .max_multiple = 32 }, + { .name = "[2000] 7200 RPM", .internal_name = "2000_7200rpm", .zones = 16, .avg_spt = 350, .heads = 6, .rpm = 7200, .full_stroke_ms = 15, .track_seek_ms = 2, .rcache_num_seg = 16, .rcache_seg_size = 128, .max_multiple = 32 }, }; - int hdd_preset_get_num() { return sizeof(hdd_speed_presets) / sizeof(hdd_preset_t); } - char * hdd_preset_getname(int preset) { - return (char *)hdd_speed_presets[preset].name; + return (char *) hdd_speed_presets[preset].name; } - char * hdd_preset_get_internal_name(int preset) { - return (char *)hdd_speed_presets[preset].internal_name; + return (char *) hdd_speed_presets[preset].internal_name; } - int hdd_preset_get_from_internal_name(char *s) { int c = 0; for (int i = 0; i < (sizeof(hdd_speed_presets) / sizeof(hdd_preset_t)); i++) { - if (!strcmp((char *)hdd_speed_presets[c].internal_name, s)) + if (!strcmp((char *) hdd_speed_presets[c].internal_name, s)) return c; c++; } @@ -492,18 +468,17 @@ hdd_preset_get_from_internal_name(char *s) return 0; } - void hdd_preset_apply(int hdd_id) { hard_disk_t *hd = &hdd[hdd_id]; - double revolution_usec, zone_percent; - uint32_t disk_sectors, sectors_per_surface, cylinders, cylinders_per_zone; - uint32_t total_sectors = 0, i; - uint32_t spt, zone_sectors; + double revolution_usec, zone_percent; + uint32_t disk_sectors, sectors_per_surface, cylinders, cylinders_per_zone; + uint32_t total_sectors = 0, i; + uint32_t spt, zone_sectors; if (hd->speed_preset >= hdd_preset_get_num()) - hd->speed_preset = 0; + hd->speed_preset = 0; hdd_preset_t *preset = &hdd_speed_presets[hd->speed_preset]; @@ -512,42 +487,42 @@ hdd_preset_apply(int hdd_id) hd->max_multiple_block = preset->max_multiple; if (!hd->speed_preset) - return; + return; hd->phy_heads = preset->heads; - hd->rpm = preset->rpm; + hd->rpm = preset->rpm; - revolution_usec = 60.0 / (double)hd->rpm * 1000000.0; + revolution_usec = 60.0 / (double) hd->rpm * 1000000.0; hd->avg_rotation_lat_usec = revolution_usec / 2; - hd->full_stroke_usec = preset->full_stroke_ms * 1000; - hd->head_switch_usec = preset->track_seek_ms * 1000; - hd->cyl_switch_usec = preset->track_seek_ms * 1000; + hd->full_stroke_usec = preset->full_stroke_ms * 1000; + hd->head_switch_usec = preset->track_seek_ms * 1000; + hd->cyl_switch_usec = preset->track_seek_ms * 1000; hd->cache.write_size = 64; hd->num_zones = preset->zones; - disk_sectors = hd->tracks * hd->hpc * hd->spt; - sectors_per_surface = (uint32_t)ceil((double)disk_sectors / (double)hd->phy_heads); - cylinders = (uint32_t)ceil((double)sectors_per_surface / (double)preset->avg_spt); - hd->phy_cyl = cylinders; - cylinders_per_zone = cylinders / preset->zones; + disk_sectors = hd->tracks * hd->hpc * hd->spt; + sectors_per_surface = (uint32_t) ceil((double) disk_sectors / (double) hd->phy_heads); + cylinders = (uint32_t) ceil((double) sectors_per_surface / (double) preset->avg_spt); + hd->phy_cyl = cylinders; + cylinders_per_zone = cylinders / preset->zones; for (i = 0; i < preset->zones; i++) { - zone_percent = i * 100 / (double)preset->zones; + zone_percent = i * 100 / (double) preset->zones; - if (i < preset->zones - 1) { - /* Function for realistic zone sector density */ - double spt_percent = -0.00341684 * pow(zone_percent, 2) - 0.175811 * zone_percent + 118.48; - spt = (uint32_t)ceil((double)preset->avg_spt * spt_percent / 100); - } else - spt = (uint32_t)ceil((double)(disk_sectors - total_sectors) / (double)(cylinders_per_zone*preset->heads)); + if (i < preset->zones - 1) { + /* Function for realistic zone sector density */ + double spt_percent = -0.00341684 * pow(zone_percent, 2) - 0.175811 * zone_percent + 118.48; + spt = (uint32_t) ceil((double) preset->avg_spt * spt_percent / 100); + } else + spt = (uint32_t) ceil((double) (disk_sectors - total_sectors) / (double) (cylinders_per_zone * preset->heads)); - zone_sectors = spt * cylinders_per_zone * preset->heads; - total_sectors += zone_sectors; + zone_sectors = spt * cylinders_per_zone * preset->heads; + total_sectors += zone_sectors; - hd->zones[i].cylinders = cylinders_per_zone; - hd->zones[i].sectors_per_track = spt; + hd->zones[i].cylinders = cylinders_per_zone; + hd->zones[i].sectors_per_track = spt; } hdd_zones_init(hd); diff --git a/src/disk/hdd_image.c b/src/disk/hdd_image.c index a775ce7c9..7100acdd6 100644 --- a/src/disk/hdd_image.c +++ b/src/disk/hdd_image.c @@ -41,647 +41,613 @@ typedef struct { - FILE *file; /* Used for HDD_IMAGE_RAW, HDD_IMAGE_HDI, and HDD_IMAGE_HDX. */ - MVHDMeta* vhd; /* Used for HDD_IMAGE_VHD. */ - uint32_t base; - uint32_t pos, last_sector; - uint8_t type; /* HDD_IMAGE_RAW, HDD_IMAGE_HDI, HDD_IMAGE_HDX, or HDD_IMAGE_VHD */ - uint8_t loaded; + FILE *file; /* Used for HDD_IMAGE_RAW, HDD_IMAGE_HDI, and HDD_IMAGE_HDX. */ + MVHDMeta *vhd; /* Used for HDD_IMAGE_VHD. */ + uint32_t base; + uint32_t pos, last_sector; + uint8_t type; /* HDD_IMAGE_RAW, HDD_IMAGE_HDI, HDD_IMAGE_HDX, or HDD_IMAGE_VHD */ + uint8_t loaded; } hdd_image_t; - hdd_image_t hdd_images[HDD_NUM]; -static char empty_sector[512]; +static char empty_sector[512]; static char *empty_sector_1mb; #ifdef ENABLE_HDD_IMAGE_LOG int hdd_image_do_log = ENABLE_HDD_IMAGE_LOG; - static void hdd_image_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (hdd_image_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (hdd_image_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define hdd_image_log(fmt, ...) +# define hdd_image_log(fmt, ...) #endif int image_is_hdi(const char *s) { - if (! strcasecmp(path_get_extension((char *) s), "HDI")) - return 1; - else - return 0; + if (!strcasecmp(path_get_extension((char *) s), "HDI")) + return 1; + else + return 0; } - int image_is_hdx(const char *s, int check_signature) { - FILE *f; - uint64_t filelen; - uint64_t signature; + FILE *f; + uint64_t filelen; + uint64_t signature; - if (! strcasecmp(path_get_extension((char *) s), "HDX")) { - if (check_signature) { - f = plat_fopen(s, "rb"); - if (!f) - return 0; - if (fseeko64(f, 0, SEEK_END)) - fatal("image_is_hdx(): Error while seeking"); - filelen = ftello64(f); - if (fseeko64(f, 0, SEEK_SET)) - fatal("image_is_hdx(): Error while seeking"); - if (filelen < 44) { - if (f != NULL) - fclose(f); - return 0; - } - if (fread(&signature, 1, 8, f) != 8) - fatal("image_is_hdx(): Error reading signature\n"); - fclose(f); - if (signature == 0xD778A82044445459ll) - return 1; - else - return 0; - } else - return 1; - } else - return 0; + if (!strcasecmp(path_get_extension((char *) s), "HDX")) { + if (check_signature) { + f = plat_fopen(s, "rb"); + if (!f) + return 0; + if (fseeko64(f, 0, SEEK_END)) + fatal("image_is_hdx(): Error while seeking"); + filelen = ftello64(f); + if (fseeko64(f, 0, SEEK_SET)) + fatal("image_is_hdx(): Error while seeking"); + if (filelen < 44) { + if (f != NULL) + fclose(f); + return 0; + } + if (fread(&signature, 1, 8, f) != 8) + fatal("image_is_hdx(): Error reading signature\n"); + fclose(f); + if (signature == 0xD778A82044445459ll) + return 1; + else + return 0; + } else + return 1; + } else + return 0; } - int image_is_vhd(const char *s, int check_signature) { - FILE* f; + FILE *f; - if (! strcasecmp(path_get_extension((char *) s), "VHD")) { - if (check_signature) { - f = plat_fopen(s, "rb"); - if (!f) - return 0; + if (!strcasecmp(path_get_extension((char *) s), "VHD")) { + if (check_signature) { + f = plat_fopen(s, "rb"); + if (!f) + return 0; - bool is_vhd = mvhd_file_is_vhd(f); - fclose(f); - return is_vhd ? 1 : 0; - } else - return 1; - } else - return 0; + bool is_vhd = mvhd_file_is_vhd(f); + fclose(f); + return is_vhd ? 1 : 0; + } else + return 1; + } else + return 0; } void hdd_image_calc_chs(uint32_t *c, uint32_t *h, uint32_t *s, uint32_t size) { - /* Calculate the geometry from size (in MB), using the algorithm provided in - "Virtual Hard Disk Image Format Specification, Appendix: CHS Calculation" */ - uint64_t ts = ((uint64_t) size) << 11LL; - uint32_t spt, heads, cyl, cth; - if (ts > 65535 * 16 * 255) - ts = 65535 * 16 * 255; + /* Calculate the geometry from size (in MB), using the algorithm provided in + "Virtual Hard Disk Image Format Specification, Appendix: CHS Calculation" */ + uint64_t ts = ((uint64_t) size) << 11LL; + uint32_t spt, heads, cyl, cth; + if (ts > 65535 * 16 * 255) + ts = 65535 * 16 * 255; - if (ts >= 65535 * 16 * 63) { - spt = 255; - heads = 16; - cth = (uint32_t) (ts / spt); - } else { - spt = 17; - cth = (uint32_t) (ts / spt); - heads = (cth +1023) / 1024; - if (heads < 4) - heads = 4; - if ((cth >= (heads * 1024)) || (heads > 16)) { - spt = 31; - heads = 16; - cth = (uint32_t) (ts / spt); - } - if (cth >= (heads * 1024)) { - spt = 63; - heads = 16; - cth = (uint32_t) (ts / spt); - } - } - cyl = cth / heads; - *c = cyl; - *h = heads; - *s = spt; + if (ts >= 65535 * 16 * 63) { + spt = 255; + heads = 16; + cth = (uint32_t) (ts / spt); + } else { + spt = 17; + cth = (uint32_t) (ts / spt); + heads = (cth + 1023) / 1024; + if (heads < 4) + heads = 4; + if ((cth >= (heads * 1024)) || (heads > 16)) { + spt = 31; + heads = 16; + cth = (uint32_t) (ts / spt); + } + if (cth >= (heads * 1024)) { + spt = 63; + heads = 16; + cth = (uint32_t) (ts / spt); + } + } + cyl = cth / heads; + *c = cyl; + *h = heads; + *s = spt; } - static int prepare_new_hard_disk(uint8_t id, uint64_t full_size) { - uint64_t target_size = (full_size + hdd_images[id].base) - ftello64(hdd_images[id].file); + uint64_t target_size = (full_size + hdd_images[id].base) - ftello64(hdd_images[id].file); - uint32_t size; - uint32_t t, i; + uint32_t size; + uint32_t t, i; - t = (uint32_t) (target_size >> 20); /* Amount of 1 MB blocks. */ - size = (uint32_t) (target_size & 0xfffff); /* 1 MB mask. */ + t = (uint32_t) (target_size >> 20); /* Amount of 1 MB blocks. */ + size = (uint32_t) (target_size & 0xfffff); /* 1 MB mask. */ - empty_sector_1mb = (char *) malloc(1048576); - memset(empty_sector_1mb, 0, 1048576); + empty_sector_1mb = (char *) malloc(1048576); + memset(empty_sector_1mb, 0, 1048576); - /* Temporarily switch off suppression of seen messages so that the - progress gets displayed. */ - pclog_toggle_suppr(); - pclog("Writing image sectors: ["); + /* Temporarily switch off suppression of seen messages so that the + progress gets displayed. */ + pclog_toggle_suppr(); + pclog("Writing image sectors: ["); - /* First, write all the 1 MB blocks. */ - if (t > 0) { - for (i = 0; i < t; i++) { - fseek(hdd_images[id].file, 0, SEEK_END); - fwrite(empty_sector_1mb, 1, 1048576, hdd_images[id].file); - pclog("#"); - } - } + /* First, write all the 1 MB blocks. */ + if (t > 0) { + for (i = 0; i < t; i++) { + fseek(hdd_images[id].file, 0, SEEK_END); + fwrite(empty_sector_1mb, 1, 1048576, hdd_images[id].file); + pclog("#"); + } + } - /* Then, write the remainder. */ - if (size > 0) { - fseek(hdd_images[id].file, 0, SEEK_END); - fwrite(empty_sector_1mb, 1, size, hdd_images[id].file); - pclog("#"); - } - pclog("]\n"); - /* Switch the suppression of seen messages back on. */ - pclog_toggle_suppr(); + /* Then, write the remainder. */ + if (size > 0) { + fseek(hdd_images[id].file, 0, SEEK_END); + fwrite(empty_sector_1mb, 1, size, hdd_images[id].file); + pclog("#"); + } + pclog("]\n"); + /* Switch the suppression of seen messages back on. */ + pclog_toggle_suppr(); - free(empty_sector_1mb); + free(empty_sector_1mb); - hdd_images[id].last_sector = (uint32_t) (full_size >> 9) - 1; + hdd_images[id].last_sector = (uint32_t) (full_size >> 9) - 1; - hdd_images[id].loaded = 1; + hdd_images[id].loaded = 1; - return 1; + return 1; } - void hdd_image_init(void) { - int i; + int i; - for (i = 0; i < HDD_NUM; i++) - memset(&hdd_images[i], 0, sizeof(hdd_image_t)); + for (i = 0; i < HDD_NUM; i++) + memset(&hdd_images[i], 0, sizeof(hdd_image_t)); } int hdd_image_load(int id) { - uint32_t sector_size = 512; - uint32_t zero = 0; - uint64_t signature = 0xD778A82044445459ll; - uint64_t full_size = 0; - uint64_t spt = 0, hpc = 0, tracks = 0; - int c, ret; - uint64_t s = 0; - char *fn = hdd[id].fn; - int is_hdx[2] = { 0, 0 }; - int is_vhd[2] = { 0, 0 }; - int vhd_error = 0; + uint32_t sector_size = 512; + uint32_t zero = 0; + uint64_t signature = 0xD778A82044445459ll; + uint64_t full_size = 0; + uint64_t spt = 0, hpc = 0, tracks = 0; + int c, ret; + uint64_t s = 0; + char *fn = hdd[id].fn; + int is_hdx[2] = { 0, 0 }; + int is_vhd[2] = { 0, 0 }; + int vhd_error = 0; - memset(empty_sector, 0, sizeof(empty_sector)); - if (fn) { - path_normalize(fn); - } + memset(empty_sector, 0, sizeof(empty_sector)); + if (fn) { + path_normalize(fn); + } + hdd_images[id].base = 0; - hdd_images[id].base = 0; + if (hdd_images[id].loaded) { + if (hdd_images[id].file) { + fclose(hdd_images[id].file); + hdd_images[id].file = NULL; + } else if (hdd_images[id].vhd) { + mvhd_close(hdd_images[id].vhd); + hdd_images[id].vhd = NULL; + } + hdd_images[id].loaded = 0; + } - if (hdd_images[id].loaded) { - if (hdd_images[id].file) { - fclose(hdd_images[id].file); - hdd_images[id].file = NULL; - } - else if (hdd_images[id].vhd) { - mvhd_close(hdd_images[id].vhd); - hdd_images[id].vhd = NULL; - } - hdd_images[id].loaded = 0; - } + is_hdx[0] = image_is_hdx(fn, 0); + is_hdx[1] = image_is_hdx(fn, 1); - is_hdx[0] = image_is_hdx(fn, 0); - is_hdx[1] = image_is_hdx(fn, 1); + is_vhd[0] = image_is_vhd(fn, 0); + is_vhd[1] = image_is_vhd(fn, 1); - is_vhd[0] = image_is_vhd(fn, 0); - is_vhd[1] = image_is_vhd(fn, 1); + hdd_images[id].pos = 0; - hdd_images[id].pos = 0; + /* Try to open existing hard disk image */ + if (fn[0] == '.') { + hdd_image_log("File name starts with .\n"); + memset(hdd[id].fn, 0, sizeof(hdd[id].fn)); + return 0; + } + hdd_images[id].file = plat_fopen(fn, "rb+"); + if (hdd_images[id].file == NULL) { + /* Failed to open existing hard disk image */ + if (errno == ENOENT) { + /* Failed because it does not exist, + so try to create new file */ + if (hdd[id].wp) { + hdd_image_log("A write-protected image must exist\n"); + memset(hdd[id].fn, 0, sizeof(hdd[id].fn)); + return 0; + } - /* Try to open existing hard disk image */ - if (fn[0] == '.') { - hdd_image_log("File name starts with .\n"); - memset(hdd[id].fn, 0, sizeof(hdd[id].fn)); - return 0; - } - hdd_images[id].file = plat_fopen(fn, "rb+"); - if (hdd_images[id].file == NULL) { - /* Failed to open existing hard disk image */ - if (errno == ENOENT) { - /* Failed because it does not exist, - so try to create new file */ - if (hdd[id].wp) { - hdd_image_log("A write-protected image must exist\n"); - memset(hdd[id].fn, 0, sizeof(hdd[id].fn)); - return 0; - } + hdd_images[id].file = plat_fopen(fn, "wb+"); + if (hdd_images[id].file == NULL) { + hdd_image_log("Unable to open image\n"); + memset(hdd[id].fn, 0, sizeof(hdd[id].fn)); + return 0; + } else { + if (image_is_hdi(fn)) { + full_size = ((uint64_t) hdd[id].spt) * ((uint64_t) hdd[id].hpc) * ((uint64_t) hdd[id].tracks) << 9LL; + hdd_images[id].base = 0x1000; + fwrite(&zero, 1, 4, hdd_images[id].file); + fwrite(&zero, 1, 4, hdd_images[id].file); + fwrite(&(hdd_images[id].base), 1, 4, hdd_images[id].file); + fwrite(&full_size, 1, 4, hdd_images[id].file); + fwrite(§or_size, 1, 4, hdd_images[id].file); + fwrite(&(hdd[id].spt), 1, 4, hdd_images[id].file); + fwrite(&(hdd[id].hpc), 1, 4, hdd_images[id].file); + fwrite(&(hdd[id].tracks), 1, 4, hdd_images[id].file); + for (c = 0; c < 0x3f8; c++) + fwrite(&zero, 1, 4, hdd_images[id].file); + hdd_images[id].type = HDD_IMAGE_HDI; + } else if (is_hdx[0]) { + full_size = ((uint64_t) hdd[id].spt) * ((uint64_t) hdd[id].hpc) * ((uint64_t) hdd[id].tracks) << 9LL; + hdd_images[id].base = 0x28; + fwrite(&signature, 1, 8, hdd_images[id].file); + fwrite(&full_size, 1, 8, hdd_images[id].file); + fwrite(§or_size, 1, 4, hdd_images[id].file); + fwrite(&(hdd[id].spt), 1, 4, hdd_images[id].file); + fwrite(&(hdd[id].hpc), 1, 4, hdd_images[id].file); + fwrite(&(hdd[id].tracks), 1, 4, hdd_images[id].file); + fwrite(&zero, 1, 4, hdd_images[id].file); + fwrite(&zero, 1, 4, hdd_images[id].file); + hdd_images[id].type = HDD_IMAGE_HDX; + } else if (is_vhd[0]) { + fclose(hdd_images[id].file); + MVHDGeom geometry; + geometry.cyl = hdd[id].tracks; + geometry.heads = hdd[id].hpc; + geometry.spt = hdd[id].spt; + full_size = ((uint64_t) hdd[id].spt) * ((uint64_t) hdd[id].hpc) * ((uint64_t) hdd[id].tracks) << 9LL; + hdd_images[id].last_sector = (full_size >> 9LL) - 1; - hdd_images[id].file = plat_fopen(fn, "wb+"); - if (hdd_images[id].file == NULL) { - hdd_image_log("Unable to open image\n"); - memset(hdd[id].fn, 0, sizeof(hdd[id].fn)); - return 0; - } else { - if (image_is_hdi(fn)) { - full_size = ((uint64_t) hdd[id].spt) * - ((uint64_t) hdd[id].hpc) * - ((uint64_t) hdd[id].tracks) << 9LL; - hdd_images[id].base = 0x1000; - fwrite(&zero, 1, 4, hdd_images[id].file); - fwrite(&zero, 1, 4, hdd_images[id].file); - fwrite(&(hdd_images[id].base), 1, 4, hdd_images[id].file); - fwrite(&full_size, 1, 4, hdd_images[id].file); - fwrite(§or_size, 1, 4, hdd_images[id].file); - fwrite(&(hdd[id].spt), 1, 4, hdd_images[id].file); - fwrite(&(hdd[id].hpc), 1, 4, hdd_images[id].file); - fwrite(&(hdd[id].tracks), 1, 4, hdd_images[id].file); - for (c = 0; c < 0x3f8; c++) - fwrite(&zero, 1, 4, hdd_images[id].file); - hdd_images[id].type = HDD_IMAGE_HDI; - } else if (is_hdx[0]) { - full_size = ((uint64_t) hdd[id].spt) * - ((uint64_t) hdd[id].hpc) * - ((uint64_t) hdd[id].tracks) << 9LL; - hdd_images[id].base = 0x28; - fwrite(&signature, 1, 8, hdd_images[id].file); - fwrite(&full_size, 1, 8, hdd_images[id].file); - fwrite(§or_size, 1, 4, hdd_images[id].file); - fwrite(&(hdd[id].spt), 1, 4, hdd_images[id].file); - fwrite(&(hdd[id].hpc), 1, 4, hdd_images[id].file); - fwrite(&(hdd[id].tracks), 1, 4, hdd_images[id].file); - fwrite(&zero, 1, 4, hdd_images[id].file); - fwrite(&zero, 1, 4, hdd_images[id].file); - hdd_images[id].type = HDD_IMAGE_HDX; - } else if (is_vhd[0]) { - fclose(hdd_images[id].file); - MVHDGeom geometry; - geometry.cyl = hdd[id].tracks; - geometry.heads = hdd[id].hpc; - geometry.spt = hdd[id].spt; - full_size = ((uint64_t) hdd[id].spt) * - ((uint64_t) hdd[id].hpc) * - ((uint64_t) hdd[id].tracks) << 9LL; - hdd_images[id].last_sector = (full_size >> 9LL) - 1; + hdd_images[id].vhd = mvhd_create_fixed(fn, geometry, &vhd_error, NULL); + if (hdd_images[id].vhd == NULL) + fatal("hdd_image_load(): VHD: Could not create VHD : %s\n", mvhd_strerr(vhd_error)); - hdd_images[id].vhd = mvhd_create_fixed(fn, geometry, &vhd_error, NULL); - if (hdd_images[id].vhd == NULL) - fatal("hdd_image_load(): VHD: Could not create VHD : %s\n", mvhd_strerr(vhd_error)); + hdd_images[id].type = HDD_IMAGE_VHD; + return 1; + } else { + hdd_images[id].type = HDD_IMAGE_RAW; + } + hdd_images[id].last_sector = 0; + } - hdd_images[id].type = HDD_IMAGE_VHD; - return 1; - } else { - hdd_images[id].type = HDD_IMAGE_RAW; - } - hdd_images[id].last_sector = 0; - } + s = full_size = ((uint64_t) hdd[id].spt) * ((uint64_t) hdd[id].hpc) * ((uint64_t) hdd[id].tracks) << 9LL; - s = full_size = ((uint64_t) hdd[id].spt) * - ((uint64_t) hdd[id].hpc) * - ((uint64_t) hdd[id].tracks) << 9LL; + ret = prepare_new_hard_disk(id, full_size); + return ret; + } else { + /* Failed for another reason */ + hdd_image_log("Failed for another reason\n"); + memset(hdd[id].fn, 0, sizeof(hdd[id].fn)); + return 0; + } + } else { + if (image_is_hdi(fn)) { + if (fseeko64(hdd_images[id].file, 0x8, SEEK_SET) == -1) + fatal("hdd_image_load(): HDI: Error seeking to offset 0x8\n"); + if (fread(&(hdd_images[id].base), 1, 4, hdd_images[id].file) != 4) + fatal("hdd_image_load(): HDI: Error reading base offset\n"); + if (fseeko64(hdd_images[id].file, 0xC, SEEK_SET) == -1) + fatal("hdd_image_load(): HDI: Error seeking to offest 0xC\n"); + full_size = 0LL; + if (fread(&full_size, 1, 4, hdd_images[id].file) != 4) + fatal("hdd_image_load(): HDI: Error reading full size\n"); + if (fseeko64(hdd_images[id].file, 0x10, SEEK_SET) == -1) + fatal("hdd_image_load(): HDI: Error seeking to offset 0x10\n"); + if (fread(§or_size, 1, 4, hdd_images[id].file) != 4) + fatal("hdd_image_load(): HDI: Error reading sector size\n"); + if (sector_size != 512) { + /* Sector size is not 512 */ + hdd_image_log("HDI: Sector size is not 512\n"); + fclose(hdd_images[id].file); + hdd_images[id].file = NULL; + memset(hdd[id].fn, 0, sizeof(hdd[id].fn)); + return 0; + } + if (fread(&spt, 1, 4, hdd_images[id].file) != 4) + fatal("hdd_image_load(): HDI: Error reading sectors per track\n"); + if (fread(&hpc, 1, 4, hdd_images[id].file) != 4) + fatal("hdd_image_load(): HDI: Error reading heads per cylinder\n"); + if (fread(&tracks, 1, 4, hdd_images[id].file) != 4) + fatal("hdd_image_load(): HDI: Error reading number of tracks\n"); + hdd[id].spt = spt; + hdd[id].hpc = hpc; + hdd[id].tracks = tracks; + hdd_images[id].type = HDD_IMAGE_HDI; + } else if (is_hdx[1]) { + hdd_images[id].base = 0x28; + if (fseeko64(hdd_images[id].file, 8, SEEK_SET) == -1) + fatal("hdd_image_load(): HDX: Error seeking to offset 0x8\n"); + if (fread(&full_size, 1, 8, hdd_images[id].file) != 8) + fatal("hdd_image_load(): HDX: Error reading full size\n"); + if (fseeko64(hdd_images[id].file, 0x10, SEEK_SET) == -1) + fatal("hdd_image_load(): HDX: Error seeking to offset 0x10\n"); + if (fread(§or_size, 1, 4, hdd_images[id].file) != 4) + fatal("hdd_image_load(): HDX: Error reading sector size\n"); + if (sector_size != 512) { + /* Sector size is not 512 */ + hdd_image_log("HDX: Sector size is not 512\n"); + fclose(hdd_images[id].file); + hdd_images[id].file = NULL; + memset(hdd[id].fn, 0, sizeof(hdd[id].fn)); + return 0; + } + if (fread(&spt, 1, 4, hdd_images[id].file) != 4) + fatal("hdd_image_load(): HDI: Error reading sectors per track\n"); + if (fread(&hpc, 1, 4, hdd_images[id].file) != 4) + fatal("hdd_image_load(): HDI: Error reading heads per cylinder\n"); + if (fread(&tracks, 1, 4, hdd_images[id].file) != 4) + fatal("hdd_image_load(): HDX: Error reading number of tracks\n"); + hdd[id].spt = spt; + hdd[id].hpc = hpc; + hdd[id].tracks = tracks; + hdd_images[id].type = HDD_IMAGE_HDX; + } else if (is_vhd[1]) { + fclose(hdd_images[id].file); + hdd_images[id].file = NULL; + hdd_images[id].vhd = mvhd_open(fn, (bool) 0, &vhd_error); + if (hdd_images[id].vhd == NULL) { + if (vhd_error == MVHD_ERR_FILE) + fatal("hdd_image_load(): VHD: Error opening VHD file '%s': %s\n", fn, strerror(mvhd_errno)); + else + fatal("hdd_image_load(): VHD: Error opening VHD file '%s': %s\n", fn, mvhd_strerr(vhd_error)); + } else if (vhd_error == MVHD_ERR_TIMESTAMP) { + fatal("hdd_image_load(): VHD: Parent/child timestamp mismatch for VHD file '%s'\n", fn); + } - ret = prepare_new_hard_disk(id, full_size); - return ret; - } else { - /* Failed for another reason */ - hdd_image_log("Failed for another reason\n"); - memset(hdd[id].fn, 0, sizeof(hdd[id].fn)); - return 0; - } - } else { - if (image_is_hdi(fn)) { - if (fseeko64(hdd_images[id].file, 0x8, SEEK_SET) == -1) - fatal("hdd_image_load(): HDI: Error seeking to offset 0x8\n"); - if (fread(&(hdd_images[id].base), 1, 4, hdd_images[id].file) != 4) - fatal("hdd_image_load(): HDI: Error reading base offset\n"); - if (fseeko64(hdd_images[id].file, 0xC, SEEK_SET) == -1) - fatal("hdd_image_load(): HDI: Error seeking to offest 0xC\n"); - full_size = 0LL; - if (fread(&full_size, 1, 4, hdd_images[id].file) != 4) - fatal("hdd_image_load(): HDI: Error reading full size\n"); - if (fseeko64(hdd_images[id].file, 0x10, SEEK_SET) == -1) - fatal("hdd_image_load(): HDI: Error seeking to offset 0x10\n"); - if (fread(§or_size, 1, 4, hdd_images[id].file) != 4) - fatal("hdd_image_load(): HDI: Error reading sector size\n"); - if (sector_size != 512) { - /* Sector size is not 512 */ - hdd_image_log("HDI: Sector size is not 512\n"); - fclose(hdd_images[id].file); - hdd_images[id].file = NULL; - memset(hdd[id].fn, 0, sizeof(hdd[id].fn)); - return 0; - } - if (fread(&spt, 1, 4, hdd_images[id].file) != 4) - fatal("hdd_image_load(): HDI: Error reading sectors per track\n"); - if (fread(&hpc, 1, 4, hdd_images[id].file) != 4) - fatal("hdd_image_load(): HDI: Error reading heads per cylinder\n"); - if (fread(&tracks, 1, 4, hdd_images[id].file) != 4) - fatal("hdd_image_load(): HDI: Error reading number of tracks\n"); - hdd[id].spt = spt; - hdd[id].hpc = hpc; - hdd[id].tracks = tracks; - hdd_images[id].type = HDD_IMAGE_HDI; - } else if (is_hdx[1]) { - hdd_images[id].base = 0x28; - if (fseeko64(hdd_images[id].file, 8, SEEK_SET) == -1) - fatal("hdd_image_load(): HDX: Error seeking to offset 0x8\n"); - if (fread(&full_size, 1, 8, hdd_images[id].file) != 8) - fatal("hdd_image_load(): HDX: Error reading full size\n"); - if (fseeko64(hdd_images[id].file, 0x10, SEEK_SET) == -1) - fatal("hdd_image_load(): HDX: Error seeking to offset 0x10\n"); - if (fread(§or_size, 1, 4, hdd_images[id].file) != 4) - fatal("hdd_image_load(): HDX: Error reading sector size\n"); - if (sector_size != 512) { - /* Sector size is not 512 */ - hdd_image_log("HDX: Sector size is not 512\n"); - fclose(hdd_images[id].file); - hdd_images[id].file = NULL; - memset(hdd[id].fn, 0, sizeof(hdd[id].fn)); - return 0; - } - if (fread(&spt, 1, 4, hdd_images[id].file) != 4) - fatal("hdd_image_load(): HDI: Error reading sectors per track\n"); - if (fread(&hpc, 1, 4, hdd_images[id].file) != 4) - fatal("hdd_image_load(): HDI: Error reading heads per cylinder\n"); - if (fread(&tracks, 1, 4, hdd_images[id].file) != 4) - fatal("hdd_image_load(): HDX: Error reading number of tracks\n"); - hdd[id].spt = spt; - hdd[id].hpc = hpc; - hdd[id].tracks = tracks; - hdd_images[id].type = HDD_IMAGE_HDX; - } else if (is_vhd[1]) { - fclose(hdd_images[id].file); - hdd_images[id].file = NULL; - hdd_images[id].vhd = mvhd_open(fn, (bool)0, &vhd_error); - if (hdd_images[id].vhd == NULL) { - if (vhd_error == MVHD_ERR_FILE) - fatal("hdd_image_load(): VHD: Error opening VHD file '%s': %s\n", fn, strerror(mvhd_errno)); - else - fatal("hdd_image_load(): VHD: Error opening VHD file '%s': %s\n", fn, mvhd_strerr(vhd_error)); - } - else if (vhd_error == MVHD_ERR_TIMESTAMP) { - fatal("hdd_image_load(): VHD: Parent/child timestamp mismatch for VHD file '%s'\n", fn); - } + hdd[id].tracks = hdd_images[id].vhd->footer.geom.cyl; + hdd[id].hpc = hdd_images[id].vhd->footer.geom.heads; + hdd[id].spt = hdd_images[id].vhd->footer.geom.spt; + full_size = ((uint64_t) hdd[id].spt) * ((uint64_t) hdd[id].hpc) * ((uint64_t) hdd[id].tracks) << 9LL; + hdd_images[id].type = HDD_IMAGE_VHD; + /* If we're here, this means there is a valid VHD footer in the + image, which means that by definition, all valid sectors + are there. */ + hdd_images[id].last_sector = (uint32_t) (full_size >> 9) - 1; + hdd_images[id].loaded = 1; + return 1; + } else { + full_size = ((uint64_t) hdd[id].spt) * ((uint64_t) hdd[id].hpc) * ((uint64_t) hdd[id].tracks) << 9LL; + hdd_images[id].type = HDD_IMAGE_RAW; + } + } - hdd[id].tracks = hdd_images[id].vhd->footer.geom.cyl; - hdd[id].hpc = hdd_images[id].vhd->footer.geom.heads; - hdd[id].spt = hdd_images[id].vhd->footer.geom.spt; - full_size = ((uint64_t) hdd[id].spt) * - ((uint64_t) hdd[id].hpc) * - ((uint64_t) hdd[id].tracks) << 9LL; - hdd_images[id].type = HDD_IMAGE_VHD; - /* If we're here, this means there is a valid VHD footer in the - image, which means that by definition, all valid sectors - are there. */ - hdd_images[id].last_sector = (uint32_t) (full_size >> 9) - 1; - hdd_images[id].loaded = 1; - return 1; - } else { - full_size = ((uint64_t) hdd[id].spt) * - ((uint64_t) hdd[id].hpc) * - ((uint64_t) hdd[id].tracks) << 9LL; - hdd_images[id].type = HDD_IMAGE_RAW; - } - } + if (fseeko64(hdd_images[id].file, 0, SEEK_END) == -1) + fatal("hdd_image_load(): Error seeking to the end of file\n"); + s = ftello64(hdd_images[id].file); + if (s < (full_size + hdd_images[id].base)) + ret = prepare_new_hard_disk(id, full_size); + else { + hdd_images[id].last_sector = (uint32_t) (full_size >> 9) - 1; + hdd_images[id].loaded = 1; + ret = 1; + } - if (fseeko64(hdd_images[id].file, 0, SEEK_END) == -1) - fatal("hdd_image_load(): Error seeking to the end of file\n"); - s = ftello64(hdd_images[id].file); - if (s < (full_size + hdd_images[id].base)) - ret = prepare_new_hard_disk(id, full_size); - else { - hdd_images[id].last_sector = (uint32_t) (full_size >> 9) - 1; - hdd_images[id].loaded = 1; - ret = 1; - } - - return ret; + return ret; } - void hdd_image_seek(uint8_t id, uint32_t sector) { - off64_t addr = sector; - addr = (uint64_t)sector << 9LL; + off64_t addr = sector; + addr = (uint64_t) sector << 9LL; - hdd_images[id].pos = sector; - if (hdd_images[id].type != HDD_IMAGE_VHD) { - if (fseeko64(hdd_images[id].file, addr + hdd_images[id].base, SEEK_SET) == -1) - fatal("hdd_image_seek(): Error seeking\n"); - } + hdd_images[id].pos = sector; + if (hdd_images[id].type != HDD_IMAGE_VHD) { + if (fseeko64(hdd_images[id].file, addr + hdd_images[id].base, SEEK_SET) == -1) + fatal("hdd_image_seek(): Error seeking\n"); + } } - void hdd_image_read(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer) { - int non_transferred_sectors; - size_t num_read; + int non_transferred_sectors; + size_t num_read; - if (hdd_images[id].type == HDD_IMAGE_VHD) { - non_transferred_sectors = mvhd_read_sectors(hdd_images[id].vhd, sector, count, buffer); - hdd_images[id].pos = sector + count - non_transferred_sectors - 1; - } else { - if (fseeko64(hdd_images[id].file, ((uint64_t)(sector) << 9LL) + hdd_images[id].base, SEEK_SET) == -1) { - fatal("Hard disk image %i: Read error during seek\n", id); - return; - } + if (hdd_images[id].type == HDD_IMAGE_VHD) { + non_transferred_sectors = mvhd_read_sectors(hdd_images[id].vhd, sector, count, buffer); + hdd_images[id].pos = sector + count - non_transferred_sectors - 1; + } else { + if (fseeko64(hdd_images[id].file, ((uint64_t) (sector) << 9LL) + hdd_images[id].base, SEEK_SET) == -1) { + fatal("Hard disk image %i: Read error during seek\n", id); + return; + } - num_read = fread(buffer, 512, count, hdd_images[id].file); - hdd_images[id].pos = sector + num_read; - } + num_read = fread(buffer, 512, count, hdd_images[id].file); + hdd_images[id].pos = sector + num_read; + } } - uint32_t hdd_image_get_last_sector(uint8_t id) { - return hdd_images[id].last_sector; + return hdd_images[id].last_sector; } - uint32_t hdd_sectors(uint8_t id) { - return hdd_image_get_last_sector(id) - 1; + return hdd_image_get_last_sector(id) - 1; } - int hdd_image_read_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer) { - uint32_t transfer_sectors = count; - uint32_t sectors = hdd_sectors(id); + uint32_t transfer_sectors = count; + uint32_t sectors = hdd_sectors(id); - if ((sectors - sector) < transfer_sectors) - transfer_sectors = sectors - sector; + if ((sectors - sector) < transfer_sectors) + transfer_sectors = sectors - sector; - hdd_image_read(id, sector, transfer_sectors, buffer); + hdd_image_read(id, sector, transfer_sectors, buffer); - if (count != transfer_sectors) - return 1; - return 0; + if (count != transfer_sectors) + return 1; + return 0; } - void hdd_image_write(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer) { - int non_transferred_sectors; - size_t num_write; + int non_transferred_sectors; + size_t num_write; - if (hdd_images[id].type == HDD_IMAGE_VHD) { - non_transferred_sectors = mvhd_write_sectors(hdd_images[id].vhd, sector, count, buffer); - hdd_images[id].pos = sector + count - non_transferred_sectors - 1; - } else { - if (fseeko64(hdd_images[id].file, ((uint64_t)(sector) << 9LL) + hdd_images[id].base, SEEK_SET) == -1) { - fatal("Hard disk image %i: Write error during seek\n", id); - return; - } + if (hdd_images[id].type == HDD_IMAGE_VHD) { + non_transferred_sectors = mvhd_write_sectors(hdd_images[id].vhd, sector, count, buffer); + hdd_images[id].pos = sector + count - non_transferred_sectors - 1; + } else { + if (fseeko64(hdd_images[id].file, ((uint64_t) (sector) << 9LL) + hdd_images[id].base, SEEK_SET) == -1) { + fatal("Hard disk image %i: Write error during seek\n", id); + return; + } - num_write = fwrite(buffer, 512, count, hdd_images[id].file); - hdd_images[id].pos = sector + num_write; - } + num_write = fwrite(buffer, 512, count, hdd_images[id].file); + hdd_images[id].pos = sector + num_write; + } } - int hdd_image_write_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer) { - uint32_t transfer_sectors = count; - uint32_t sectors = hdd_sectors(id); + uint32_t transfer_sectors = count; + uint32_t sectors = hdd_sectors(id); - if ((sectors - sector) < transfer_sectors) - transfer_sectors = sectors - sector; + if ((sectors - sector) < transfer_sectors) + transfer_sectors = sectors - sector; - hdd_image_write(id, sector, transfer_sectors, buffer); + hdd_image_write(id, sector, transfer_sectors, buffer); - if (count != transfer_sectors) - return 1; - return 0; + if (count != transfer_sectors) + return 1; + return 0; } - void hdd_image_zero(uint8_t id, uint32_t sector, uint32_t count) { - if (hdd_images[id].type == HDD_IMAGE_VHD) { - int non_transferred_sectors = mvhd_format_sectors(hdd_images[id].vhd, sector, count); - hdd_images[id].pos = sector + count - non_transferred_sectors - 1; - } else { - uint32_t i = 0; + if (hdd_images[id].type == HDD_IMAGE_VHD) { + int non_transferred_sectors = mvhd_format_sectors(hdd_images[id].vhd, sector, count); + hdd_images[id].pos = sector + count - non_transferred_sectors - 1; + } else { + uint32_t i = 0; - memset(empty_sector, 0, 512); + memset(empty_sector, 0, 512); - if (fseeko64(hdd_images[id].file, ((uint64_t)(sector) << 9LL) + hdd_images[id].base, SEEK_SET) == -1) { - fatal("Hard disk image %i: Zero error during seek\n", id); - return; - } + if (fseeko64(hdd_images[id].file, ((uint64_t) (sector) << 9LL) + hdd_images[id].base, SEEK_SET) == -1) { + fatal("Hard disk image %i: Zero error during seek\n", id); + return; + } - for (i = 0; i < count; i++) { - if (feof(hdd_images[id].file)) - break; + for (i = 0; i < count; i++) { + if (feof(hdd_images[id].file)) + break; - hdd_images[id].pos = sector + i; - fwrite(empty_sector, 512, 1, hdd_images[id].file); - } - } + hdd_images[id].pos = sector + i; + fwrite(empty_sector, 512, 1, hdd_images[id].file); + } + } } - int hdd_image_zero_ex(uint8_t id, uint32_t sector, uint32_t count) { - uint32_t transfer_sectors = count; - uint32_t sectors = hdd_sectors(id); + uint32_t transfer_sectors = count; + uint32_t sectors = hdd_sectors(id); - if ((sectors - sector) < transfer_sectors) - transfer_sectors = sectors - sector; + if ((sectors - sector) < transfer_sectors) + transfer_sectors = sectors - sector; - hdd_image_zero(id, sector, transfer_sectors); + hdd_image_zero(id, sector, transfer_sectors); - if (count != transfer_sectors) - return 1; - return 0; + if (count != transfer_sectors) + return 1; + return 0; } - uint32_t hdd_image_get_pos(uint8_t id) { - return hdd_images[id].pos; + return hdd_images[id].pos; } - uint8_t hdd_image_get_type(uint8_t id) { - return hdd_images[id].type; + return hdd_images[id].type; } - void hdd_image_unload(uint8_t id, int fn_preserve) { - if (strlen(hdd[id].fn) == 0) - return; + if (strlen(hdd[id].fn) == 0) + return; - if (hdd_images[id].loaded) { - if (hdd_images[id].file != NULL) { - fclose(hdd_images[id].file); - hdd_images[id].file = NULL; - } else if (hdd_images[id].vhd != NULL) { - mvhd_close(hdd_images[id].vhd); - hdd_images[id].vhd = NULL; - } - hdd_images[id].loaded = 0; - } + if (hdd_images[id].loaded) { + if (hdd_images[id].file != NULL) { + fclose(hdd_images[id].file); + hdd_images[id].file = NULL; + } else if (hdd_images[id].vhd != NULL) { + mvhd_close(hdd_images[id].vhd); + hdd_images[id].vhd = NULL; + } + hdd_images[id].loaded = 0; + } - hdd_images[id].last_sector = -1; + hdd_images[id].last_sector = -1; - memset(hdd[id].prev_fn, 0, sizeof(hdd[id].prev_fn)); - if (fn_preserve) - strcpy(hdd[id].prev_fn, hdd[id].fn); - memset(hdd[id].fn, 0, sizeof(hdd[id].fn)); + memset(hdd[id].prev_fn, 0, sizeof(hdd[id].prev_fn)); + if (fn_preserve) + strcpy(hdd[id].prev_fn, hdd[id].fn); + memset(hdd[id].fn, 0, sizeof(hdd[id].fn)); } - void hdd_image_close(uint8_t id) { - hdd_image_log("hdd_image_close(%i)\n", id); + hdd_image_log("hdd_image_close(%i)\n", id); - if (!hdd_images[id].loaded) - return; + if (!hdd_images[id].loaded) + return; - if (hdd_images[id].file != NULL) { - fclose(hdd_images[id].file); - hdd_images[id].file = NULL; - } else if (hdd_images[id].vhd != NULL) { - mvhd_close(hdd_images[id].vhd); - hdd_images[id].vhd = NULL; - } + if (hdd_images[id].file != NULL) { + fclose(hdd_images[id].file); + hdd_images[id].file = NULL; + } else if (hdd_images[id].vhd != NULL) { + mvhd_close(hdd_images[id].vhd); + hdd_images[id].vhd = NULL; + } - memset(&hdd_images[id], 0, sizeof(hdd_image_t)); - hdd_images[id].loaded = 0; + memset(&hdd_images[id], 0, sizeof(hdd_image_t)); + hdd_images[id].loaded = 0; } diff --git a/src/disk/hdd_table.c b/src/disk/hdd_table.c index a851782f3..ae03e91a8 100644 --- a/src/disk/hdd_table.c +++ b/src/disk/hdd_table.c @@ -25,8 +25,8 @@ #include <86box/86box.h> #include <86box/hdd.h> - unsigned int hdd_table[128][3] = { + // clang-format off { 306, 4, 17 }, /* 0 - 7 */ { 615, 2, 17 }, { 306, 4, 26 }, @@ -170,4 +170,5 @@ unsigned int hdd_table[128][3] = { { 1120, 16, 59 }, { 1054, 16, 63 }, { 0, 0, 0 } +// clang-format on }; diff --git a/src/disk/mo.c b/src/disk/mo.c index 18e49b2d7..fdcb30099 100644 --- a/src/disk/mo.c +++ b/src/disk/mo.c @@ -43,74 +43,72 @@ #include <86box/version.h> #ifdef _WIN32 -#include -#include +# include +# include #else -#include +# include #endif -mo_drive_t mo_drives[MO_NUM]; - +mo_drive_t mo_drives[MO_NUM]; /* Table of all SCSI commands and their flags, needed for the new disc change / not ready handler. */ -const uint8_t mo_command_flags[0x100] = -{ - IMPLEMENTED | CHECK_READY | NONDATA, /* 0x00 */ - IMPLEMENTED | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x01 */ +const uint8_t mo_command_flags[0x100] = { + IMPLEMENTED | CHECK_READY | NONDATA, /* 0x00 */ + IMPLEMENTED | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x01 */ 0, - IMPLEMENTED | ALLOW_UA, /* 0x03 */ - IMPLEMENTED | CHECK_READY | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x04 */ + IMPLEMENTED | ALLOW_UA, /* 0x03 */ + IMPLEMENTED | CHECK_READY | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x04 */ 0, 0, 0, - IMPLEMENTED | CHECK_READY, /* 0x08 */ + IMPLEMENTED | CHECK_READY, /* 0x08 */ 0, - IMPLEMENTED | CHECK_READY, /* 0x0A */ - IMPLEMENTED | CHECK_READY | NONDATA, /* 0x0B */ + IMPLEMENTED | CHECK_READY, /* 0x0A */ + IMPLEMENTED | CHECK_READY | NONDATA, /* 0x0B */ 0, 0, 0, 0, 0, 0, - IMPLEMENTED | ALLOW_UA, /* 0x12 */ - IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x13 */ + IMPLEMENTED | ALLOW_UA, /* 0x12 */ + IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x13 */ 0, - IMPLEMENTED, /* 0x15 */ - IMPLEMENTED | SCSI_ONLY, /* 0x16 */ - IMPLEMENTED | SCSI_ONLY, /* 0x17 */ + IMPLEMENTED, /* 0x15 */ + IMPLEMENTED | SCSI_ONLY, /* 0x16 */ + IMPLEMENTED | SCSI_ONLY, /* 0x17 */ 0, 0, - IMPLEMENTED, /* 0x1A */ - IMPLEMENTED | CHECK_READY, /* 0x1B */ + IMPLEMENTED, /* 0x1A */ + IMPLEMENTED | CHECK_READY, /* 0x1B */ 0, - IMPLEMENTED, /* 0x1D */ - IMPLEMENTED | CHECK_READY, /* 0x1E */ + IMPLEMENTED, /* 0x1D */ + IMPLEMENTED | CHECK_READY, /* 0x1E */ 0, 0, 0, 0, 0, 0, - IMPLEMENTED | CHECK_READY, /* 0x25 */ + IMPLEMENTED | CHECK_READY, /* 0x25 */ 0, 0, - IMPLEMENTED | CHECK_READY, /* 0x28 */ + IMPLEMENTED | CHECK_READY, /* 0x28 */ 0, - IMPLEMENTED | CHECK_READY, /* 0x2A */ - IMPLEMENTED | CHECK_READY | NONDATA, /* 0x2B */ - IMPLEMENTED | CHECK_READY | NONDATA, /* 0x2C */ + IMPLEMENTED | CHECK_READY, /* 0x2A */ + IMPLEMENTED | CHECK_READY | NONDATA, /* 0x2B */ + IMPLEMENTED | CHECK_READY | NONDATA, /* 0x2C */ 0, - IMPLEMENTED | CHECK_READY, /* 0x2E */ - IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x2F */ + IMPLEMENTED | CHECK_READY, /* 0x2E */ + IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x2F */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - IMPLEMENTED, /* 0x55 */ + IMPLEMENTED, /* 0x55 */ 0, 0, 0, 0, - IMPLEMENTED, /* 0x5A */ + IMPLEMENTED, /* 0x5A */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - IMPLEMENTED | CHECK_READY, /* 0xA8 */ + IMPLEMENTED | CHECK_READY, /* 0xA8 */ 0, - IMPLEMENTED | CHECK_READY, /* 0xAA */ + IMPLEMENTED | CHECK_READY, /* 0xAA */ 0, - IMPLEMENTED | CHECK_READY | NONDATA, /* 0xAC */ + IMPLEMENTED | CHECK_READY | NONDATA, /* 0xAC */ 0, - IMPLEMENTED | CHECK_READY, /* 0xAE */ - IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0xAF */ + IMPLEMENTED | CHECK_READY, /* 0xAE */ + IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0xAF */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -122,8 +120,8 @@ const uint8_t mo_command_flags[0x100] = static uint64_t mo_mode_sense_page_flags = (GPMODEP_ALL_PAGES); - static const mode_sense_pages_t mo_mode_sense_pages_default = + // clang-format off { { { 0, 0 }, { 0, 0 }, @@ -174,8 +172,10 @@ static const mode_sense_pages_t mo_mode_sense_pages_default = { 0, 0 }, { 0, 0 } } }; +// clang-format on static const mode_sense_pages_t mo_mode_sense_pages_default_scsi = + // clang-format off { { { 0, 0 }, { 0, 0 }, @@ -226,9 +226,10 @@ static const mode_sense_pages_t mo_mode_sense_pages_default_scsi = { 0, 0 }, { 0, 0 } } }; - +// clang-format on static const mode_sense_pages_t mo_mode_sense_pages_changeable = + // clang-format off { { { 0, 0 }, { 0, 0 }, @@ -279,326 +280,307 @@ static const mode_sense_pages_t mo_mode_sense_pages_changeable = { 0, 0 }, { 0, 0 } } }; +// clang-format on - -static void mo_command_complete(mo_t *dev); -static void mo_init(mo_t *dev); - +static void mo_command_complete(mo_t *dev); +static void mo_init(mo_t *dev); #ifdef ENABLE_MO_LOG int mo_do_log = ENABLE_MO_LOG; - static void mo_log(const char *fmt, ...) { va_list ap; if (mo_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define mo_log(fmt, ...) +# define mo_log(fmt, ...) #endif - int find_mo_for_channel(uint8_t channel) { uint8_t i = 0; for (i = 0; i < MO_NUM; i++) { - if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && (mo_drives[i].ide_channel == channel)) - return i; + if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && (mo_drives[i].ide_channel == channel)) + return i; } return 0xff; } - static int mo_load_abort(mo_t *dev) { if (dev->drv->f) - fclose(dev->drv->f); - dev->drv->f = NULL; + fclose(dev->drv->f); + dev->drv->f = NULL; dev->drv->medium_size = 0; dev->drv->sector_size = 0; - mo_eject(dev->id); /* Make sure the host OS knows we've rejected (and ejected) the image. */ + mo_eject(dev->id); /* Make sure the host OS knows we've rejected (and ejected) the image. */ return 0; } - int image_is_mdi(const char *s) { - if (! strcasecmp(path_get_extension((char *) s), "MDI")) - return 1; + if (!strcasecmp(path_get_extension((char *) s), "MDI")) + return 1; else - return 0; + return 0; } - int mo_load(mo_t *dev, char *fn) { - int is_mdi; - uint32_t size = 0; + int is_mdi; + uint32_t size = 0; unsigned int i, found = 0; is_mdi = image_is_mdi(fn); dev->drv->f = plat_fopen(fn, dev->drv->read_only ? "rb" : "rb+"); if (!dev->drv->f) { - if (!dev->drv->read_only) { - dev->drv->f = plat_fopen(fn, "rb"); - if (dev->drv->f) - dev->drv->read_only = 1; - else - return mo_load_abort(dev); - } else - return mo_load_abort(dev); + if (!dev->drv->read_only) { + dev->drv->f = plat_fopen(fn, "rb"); + if (dev->drv->f) + dev->drv->read_only = 1; + else + return mo_load_abort(dev); + } else + return mo_load_abort(dev); } fseek(dev->drv->f, 0, SEEK_END); size = (uint32_t) ftell(dev->drv->f); if (is_mdi) { - /* This is a MDI image. */ - size -= 0x1000LL; - dev->drv->base = 0x1000; + /* This is a MDI image. */ + size -= 0x1000LL; + dev->drv->base = 0x1000; } for (i = 0; i < KNOWN_MO_TYPES; i++) { - if (size == (mo_types[i].sectors * mo_types[i].bytes_per_sector)) { - found = 1; - dev->drv->medium_size = mo_types[i].sectors; - dev->drv->sector_size = mo_types[i].bytes_per_sector; - break; - } + if (size == (mo_types[i].sectors * mo_types[i].bytes_per_sector)) { + found = 1; + dev->drv->medium_size = mo_types[i].sectors; + dev->drv->sector_size = mo_types[i].bytes_per_sector; + break; + } } if (!found) - return mo_load_abort(dev); + return mo_load_abort(dev); if (fseek(dev->drv->f, dev->drv->base, SEEK_SET) == -1) - fatal("mo_load(): Error seeking to the beginning of the file\n"); + fatal("mo_load(): Error seeking to the beginning of the file\n"); strncpy(dev->drv->image_path, fn, sizeof(dev->drv->image_path) - 1); return 1; } - void mo_disk_reload(mo_t *dev) { int ret = 0; if (strlen(dev->drv->prev_image_path) == 0) - return; + return; else - ret = mo_load(dev, dev->drv->prev_image_path); + ret = mo_load(dev, dev->drv->prev_image_path); if (ret) - dev->unit_attention = 1; + dev->unit_attention = 1; } - void mo_disk_unload(mo_t *dev) { if (dev->drv->f) { - fclose(dev->drv->f); - dev->drv->f = NULL; + fclose(dev->drv->f); + dev->drv->f = NULL; } } - void mo_disk_close(mo_t *dev) { if (dev->drv->f) { - mo_disk_unload(dev); + mo_disk_unload(dev); - memcpy(dev->drv->prev_image_path, dev->drv->image_path, sizeof(dev->drv->prev_image_path)); - memset(dev->drv->image_path, 0, sizeof(dev->drv->image_path)); + memcpy(dev->drv->prev_image_path, dev->drv->image_path, sizeof(dev->drv->prev_image_path)); + memset(dev->drv->image_path, 0, sizeof(dev->drv->image_path)); - dev->drv->medium_size = 0; + dev->drv->medium_size = 0; } } - static void mo_set_callback(mo_t *dev) { if (dev->drv->bus_type != MO_BUS_SCSI) - ide_set_callback(ide_drives[dev->drv->ide_channel], dev->callback); + ide_set_callback(ide_drives[dev->drv->ide_channel], dev->callback); } - static void mo_init(mo_t *dev) { if (dev->id >= MO_NUM) - return; + return; dev->requested_blocks = 1; - dev->sense[0] = 0xf0; - dev->sense[7] = 10; - dev->drv->bus_mode = 0; + dev->sense[0] = 0xf0; + dev->sense[7] = 10; + dev->drv->bus_mode = 0; if (dev->drv->bus_type >= MO_BUS_ATAPI) - dev->drv->bus_mode |= 2; + dev->drv->bus_mode |= 2; if (dev->drv->bus_type < MO_BUS_SCSI) - dev->drv->bus_mode |= 1; + dev->drv->bus_mode |= 1; mo_log("MO %i: Bus type %i, bus mode %i\n", dev->id, dev->drv->bus_type, dev->drv->bus_mode); if (dev->drv->bus_type < MO_BUS_SCSI) { - dev->phase = 1; - dev->request_length = 0xEB14; + dev->phase = 1; + dev->request_length = 0xEB14; } - dev->status = READY_STAT | DSC_STAT; - dev->pos = 0; + dev->status = READY_STAT | DSC_STAT; + dev->pos = 0; dev->packet_status = PHASE_NONE; mo_sense_key = mo_asc = mo_ascq = dev->unit_attention = 0; } - static int mo_supports_pio(mo_t *dev) { return (dev->drv->bus_mode & 1); } - static int mo_supports_dma(mo_t *dev) { return (dev->drv->bus_mode & 2); } - /* Returns: 0 for none, 1 for PIO, 2 for DMA. */ static int mo_current_mode(mo_t *dev) { if (!mo_supports_pio(dev) && !mo_supports_dma(dev)) - return 0; + return 0; if (mo_supports_pio(dev) && !mo_supports_dma(dev)) { - mo_log("MO %i: Drive does not support DMA, setting to PIO\n", dev->id); - return 1; + mo_log("MO %i: Drive does not support DMA, setting to PIO\n", dev->id); + return 1; } if (!mo_supports_pio(dev) && mo_supports_dma(dev)) - return 2; + return 2; if (mo_supports_pio(dev) && mo_supports_dma(dev)) { - mo_log("MO %i: Drive supports both, setting to %s\n", dev->id, (dev->features & 1) ? "DMA" : "PIO"); - return (dev->features & 1) ? 2 : 1; + mo_log("MO %i: Drive supports both, setting to %s\n", dev->id, (dev->features & 1) ? "DMA" : "PIO"); + return (dev->features & 1) ? 2 : 1; } return 0; } - /* Translates ATAPI phase (DRQ, I/O, C/D) to SCSI phase (MSG, C/D, I/O). */ int mo_atapi_phase_to_scsi(mo_t *dev) { if (dev->status & 8) { - switch (dev->phase & 3) { - case 0: - return 0; - case 1: - return 2; - case 2: - return 1; - case 3: - return 7; - } + switch (dev->phase & 3) { + case 0: + return 0; + case 1: + return 2; + case 2: + return 1; + case 3: + return 7; + } } else { - if ((dev->phase & 3) == 3) - return 3; - else - return 4; + if ((dev->phase & 3) == 3) + return 3; + else + return 4; } return 0; } - static void mo_mode_sense_load(mo_t *dev) { FILE *f; - char file_name[512]; + char file_name[512]; memset(&dev->ms_pages_saved, 0, sizeof(mode_sense_pages_t)); if (mo_drives[dev->id].bus_type == MO_BUS_SCSI) - memcpy(&dev->ms_pages_saved, &mo_mode_sense_pages_default_scsi, sizeof(mode_sense_pages_t)); + memcpy(&dev->ms_pages_saved, &mo_mode_sense_pages_default_scsi, sizeof(mode_sense_pages_t)); else - memcpy(&dev->ms_pages_saved, &mo_mode_sense_pages_default, sizeof(mode_sense_pages_t)); + memcpy(&dev->ms_pages_saved, &mo_mode_sense_pages_default, sizeof(mode_sense_pages_t)); memset(file_name, 0, 512); if (dev->drv->bus_type == MO_BUS_SCSI) - sprintf(file_name, "scsi_mo_%02i_mode_sense_bin", dev->id); + sprintf(file_name, "scsi_mo_%02i_mode_sense_bin", dev->id); else - sprintf(file_name, "mo_%02i_mode_sense_bin", dev->id); + sprintf(file_name, "mo_%02i_mode_sense_bin", dev->id); f = plat_fopen(nvr_path(file_name), "rb"); if (f) { - /* Nothing to read, not used by MO. */ - fclose(f); + /* Nothing to read, not used by MO. */ + fclose(f); } } - static void mo_mode_sense_save(mo_t *dev) { FILE *f; - char file_name[512]; + char file_name[512]; memset(file_name, 0, 512); if (dev->drv->bus_type == MO_BUS_SCSI) - sprintf(file_name, "scsi_mo_%02i_mode_sense_bin", dev->id); + sprintf(file_name, "scsi_mo_%02i_mode_sense_bin", dev->id); else - sprintf(file_name, "mo_%02i_mode_sense_bin", dev->id); + sprintf(file_name, "mo_%02i_mode_sense_bin", dev->id); f = plat_fopen(nvr_path(file_name), "wb"); if (f) { - /* Nothing to write, not used by MO. */ - fclose(f); + /* Nothing to write, not used by MO. */ + fclose(f); } } - /*SCSI Mode Sense 6/10*/ static uint8_t mo_mode_sense_read(mo_t *dev, uint8_t page_control, uint8_t page, uint8_t pos) { switch (page_control) { - case 0: - case 3: - return dev->ms_pages_saved.pages[page][pos]; - break; - case 1: - return mo_mode_sense_pages_changeable.pages[page][pos]; - break; - case 2: - if (dev->drv->bus_type == MO_BUS_SCSI) - return mo_mode_sense_pages_default_scsi.pages[page][pos]; - else - return mo_mode_sense_pages_default.pages[page][pos]; - break; + case 0: + case 3: + return dev->ms_pages_saved.pages[page][pos]; + break; + case 1: + return mo_mode_sense_pages_changeable.pages[page][pos]; + break; + case 2: + if (dev->drv->bus_type == MO_BUS_SCSI) + return mo_mode_sense_pages_default_scsi.pages[page][pos]; + else + return mo_mode_sense_pages_default.pages[page][pos]; + break; } return 0; } - static uint32_t mo_mode_sense(mo_t *dev, uint8_t *buf, uint32_t pos, uint8_t page, uint8_t block_descriptor_len) { uint64_t pf; - uint8_t page_control = (page >> 6) & 3; + uint8_t page_control = (page >> 6) & 3; pf = mo_mode_sense_page_flags; @@ -610,33 +592,32 @@ mo_mode_sense(mo_t *dev, uint8_t *buf, uint32_t pos, uint8_t page, uint8_t block page &= 0x3f; if (block_descriptor_len) { - buf[pos++] = ((dev->drv->medium_size >> 24) & 0xff); - buf[pos++] = ((dev->drv->medium_size >> 16) & 0xff); - buf[pos++] = ((dev->drv->medium_size >> 8) & 0xff); - buf[pos++] = ( dev->drv->medium_size & 0xff); - buf[pos++] = 0; /* Reserved. */ - buf[pos++] = 0; - buf[pos++] = ((dev->drv->sector_size >> 8) & 0xff); - buf[pos++] = ( dev->drv->sector_size & 0xff); + buf[pos++] = ((dev->drv->medium_size >> 24) & 0xff); + buf[pos++] = ((dev->drv->medium_size >> 16) & 0xff); + buf[pos++] = ((dev->drv->medium_size >> 8) & 0xff); + buf[pos++] = (dev->drv->medium_size & 0xff); + buf[pos++] = 0; /* Reserved. */ + buf[pos++] = 0; + buf[pos++] = ((dev->drv->sector_size >> 8) & 0xff); + buf[pos++] = (dev->drv->sector_size & 0xff); } for (i = 0; i < 0x40; i++) { if ((page == GPMODE_ALL_PAGES) || (page == i)) { - if (pf & (1LL << ((uint64_t) page))) { - buf[pos++] = mo_mode_sense_read(dev, page_control, i, 0); - msplen = mo_mode_sense_read(dev, page_control, i, 1); - buf[pos++] = msplen; - mo_log("MO %i: MODE SENSE: Page [%02X] length %i\n", dev->id, i, msplen); - for (j = 0; j < msplen; j++) - buf[pos++] = mo_mode_sense_read(dev, page_control, i, 2 + j); - } - } + if (pf & (1LL << ((uint64_t) page))) { + buf[pos++] = mo_mode_sense_read(dev, page_control, i, 0); + msplen = mo_mode_sense_read(dev, page_control, i, 1); + buf[pos++] = msplen; + mo_log("MO %i: MODE SENSE: Page [%02X] length %i\n", dev->id, i, msplen); + for (j = 0; j < msplen; j++) + buf[pos++] = mo_mode_sense_read(dev, page_control, i, 2 + j); + } + } } return pos; } - static void mo_update_request_length(mo_t *dev, int len, int block_len) { @@ -646,99 +627,96 @@ mo_update_request_length(mo_t *dev, int len, int block_len) /* For media access commands, make sure the requested DRQ length matches the block length. */ switch (dev->current_cdb[0]) { - case 0x08: - case 0x0a: - case 0x28: - case 0x2a: - case 0xa8: - case 0xaa: - /* Round it to the nearest 2048 bytes. */ - dev->max_transfer_len = (dev->max_transfer_len >> 9) << 9; + case 0x08: + case 0x0a: + case 0x28: + case 0x2a: + case 0xa8: + case 0xaa: + /* Round it to the nearest 2048 bytes. */ + dev->max_transfer_len = (dev->max_transfer_len >> 9) << 9; - /* Make sure total length is not bigger than sum of the lengths of - all the requested blocks. */ - bt = (dev->requested_blocks * block_len); - if (len > bt) - len = bt; + /* Make sure total length is not bigger than sum of the lengths of + all the requested blocks. */ + bt = (dev->requested_blocks * block_len); + if (len > bt) + len = bt; - min_len = block_len; + min_len = block_len; - if (len <= block_len) { - /* Total length is less or equal to block length. */ - if (dev->max_transfer_len < block_len) { - /* Transfer a minimum of (block size) bytes. */ - dev->max_transfer_len = block_len; - dev->packet_len = block_len; - break; - } - } - /*FALLTHROUGH*/ - default: - dev->packet_len = len; - break; + if (len <= block_len) { + /* Total length is less or equal to block length. */ + if (dev->max_transfer_len < block_len) { + /* Transfer a minimum of (block size) bytes. */ + dev->max_transfer_len = block_len; + dev->packet_len = block_len; + break; + } + } + /*FALLTHROUGH*/ + default: + dev->packet_len = len; + break; } /* If the DRQ length is odd, and the total remaining length is bigger, make sure it's even. */ if ((dev->max_transfer_len & 1) && (dev->max_transfer_len < len)) - dev->max_transfer_len &= 0xfffe; + dev->max_transfer_len &= 0xfffe; /* If the DRQ length is smaller or equal in size to the total remaining length, set it to that. */ if (!dev->max_transfer_len) - dev->max_transfer_len = 65534; + dev->max_transfer_len = 65534; if ((len <= dev->max_transfer_len) && (len >= min_len)) - dev->request_length = dev->max_transfer_len = len; + dev->request_length = dev->max_transfer_len = len; else if (len > dev->max_transfer_len) - dev->request_length = dev->max_transfer_len; + dev->request_length = dev->max_transfer_len; return; } - static double mo_bus_speed(mo_t *dev) { double ret = -1.0; if (dev && dev->drv && (dev->drv->bus_type == MO_BUS_SCSI)) { - dev->callback = -1.0; /* Speed depends on SCSI controller */ - return 0.0; + dev->callback = -1.0; /* Speed depends on SCSI controller */ + return 0.0; } else { - if (dev && dev->drv) - ret = ide_atapi_get_period(dev->drv->ide_channel); - if (ret == -1.0) { - if (dev) - dev->callback = -1.0; - return 0.0; - } else - return ret * 1000000.0; + if (dev && dev->drv) + ret = ide_atapi_get_period(dev->drv->ide_channel); + if (ret == -1.0) { + if (dev) + dev->callback = -1.0; + return 0.0; + } else + return ret * 1000000.0; } } - static void mo_command_common(mo_t *dev) { double bytes_per_second, period; dev->status = BUSY_STAT; - dev->phase = 1; - dev->pos = 0; + dev->phase = 1; + dev->pos = 0; if (dev->packet_status == PHASE_COMPLETE) - dev->callback = 0.0; + dev->callback = 0.0; else { - if (dev->drv->bus_type == MO_BUS_SCSI) { - dev->callback = -1.0; /* Speed depends on SCSI controller */ - return; - } else - bytes_per_second = mo_bus_speed(dev); + if (dev->drv->bus_type == MO_BUS_SCSI) { + dev->callback = -1.0; /* Speed depends on SCSI controller */ + return; + } else + bytes_per_second = mo_bus_speed(dev); - period = 1000000.0 / bytes_per_second; - dev->callback = period * (double) (dev->packet_len); + period = 1000000.0 / bytes_per_second; + dev->callback = period * (double) (dev->packet_len); } mo_set_callback(dev); } - static void mo_command_complete(mo_t *dev) { @@ -747,7 +725,6 @@ mo_command_complete(mo_t *dev) mo_command_common(dev); } - static void mo_command_read(mo_t *dev) { @@ -755,7 +732,6 @@ mo_command_read(mo_t *dev) mo_command_common(dev); } - static void mo_command_read_dma(mo_t *dev) { @@ -763,7 +739,6 @@ mo_command_read_dma(mo_t *dev) mo_command_common(dev); } - static void mo_command_write(mo_t *dev) { @@ -771,7 +746,6 @@ mo_command_write(mo_t *dev) mo_command_common(dev); } - static void mo_command_write_dma(mo_t *dev) { @@ -779,7 +753,6 @@ mo_command_write_dma(mo_t *dev) mo_command_common(dev); } - /* id = Current MO device ID; len = Total transfer length; block_len = Length of a single block (why does it matter?!); @@ -789,116 +762,109 @@ static void mo_data_command_finish(mo_t *dev, int len, int block_len, int alloc_len, int direction) { mo_log("MO %i: Finishing command (%02X): %i, %i, %i, %i, %i\n", - dev->id, dev->current_cdb[0], len, block_len, alloc_len, direction, dev->request_length); + dev->id, dev->current_cdb[0], len, block_len, alloc_len, direction, dev->request_length); dev->pos = 0; if (alloc_len >= 0) { - if (alloc_len < len) - len = alloc_len; + if (alloc_len < len) + len = alloc_len; } if ((len == 0) || (mo_current_mode(dev) == 0)) { - if (dev->drv->bus_type != MO_BUS_SCSI) - dev->packet_len = 0; + if (dev->drv->bus_type != MO_BUS_SCSI) + dev->packet_len = 0; - mo_command_complete(dev); + mo_command_complete(dev); } else { - if (mo_current_mode(dev) == 2) { - if (dev->drv->bus_type != MO_BUS_SCSI) - dev->packet_len = alloc_len; + if (mo_current_mode(dev) == 2) { + if (dev->drv->bus_type != MO_BUS_SCSI) + dev->packet_len = alloc_len; - if (direction == 0) - mo_command_read_dma(dev); - else - mo_command_write_dma(dev); - } else { - mo_update_request_length(dev, len, block_len); - if (direction == 0) - mo_command_read(dev); - else - mo_command_write(dev); - } + if (direction == 0) + mo_command_read_dma(dev); + else + mo_command_write_dma(dev); + } else { + mo_update_request_length(dev, len, block_len); + if (direction == 0) + mo_command_read(dev); + else + mo_command_write(dev); + } } mo_log("MO %i: Status: %i, cylinder %i, packet length: %i, position: %i, phase: %i\n", - dev->id, dev->packet_status, dev->request_length, dev->packet_len, dev->pos, dev->phase); + dev->id, dev->packet_status, dev->request_length, dev->packet_len, dev->pos, dev->phase); } - static void mo_sense_clear(mo_t *dev, int command) { mo_sense_key = mo_asc = mo_ascq = 0; } - static void mo_set_phase(mo_t *dev, uint8_t phase) { uint8_t scsi_bus = (dev->drv->scsi_device_id >> 4) & 0x0f; - uint8_t scsi_id = dev->drv->scsi_device_id & 0x0f; + uint8_t scsi_id = dev->drv->scsi_device_id & 0x0f; if (dev->drv->bus_type != MO_BUS_SCSI) - return; + return; scsi_devices[scsi_bus][scsi_id].phase = phase; } - static void mo_cmd_error(mo_t *dev) { mo_set_phase(dev, SCSI_PHASE_STATUS); dev->error = ((mo_sense_key & 0xf) << 4) | ABRT_ERR; if (dev->unit_attention) - dev->error |= MCR_ERR; - dev->status = READY_STAT | ERR_STAT; - dev->phase = 3; - dev->pos = 0; + dev->error |= MCR_ERR; + dev->status = READY_STAT | ERR_STAT; + dev->phase = 3; + dev->pos = 0; dev->packet_status = PHASE_ERROR; - dev->callback = 50.0 * MO_TIME; + dev->callback = 50.0 * MO_TIME; mo_set_callback(dev); ui_sb_update_icon(SB_MO | dev->id, 0); mo_log("MO %i: [%02X] ERROR: %02X/%02X/%02X\n", dev->id, dev->current_cdb[0], mo_sense_key, mo_asc, mo_ascq); } - static void mo_unit_attention(mo_t *dev) { mo_set_phase(dev, SCSI_PHASE_STATUS); dev->error = (SENSE_UNIT_ATTENTION << 4) | ABRT_ERR; if (dev->unit_attention) - dev->error |= MCR_ERR; - dev->status = READY_STAT | ERR_STAT; - dev->phase = 3; - dev->pos = 0; + dev->error |= MCR_ERR; + dev->status = READY_STAT | ERR_STAT; + dev->phase = 3; + dev->pos = 0; dev->packet_status = PHASE_ERROR; - dev->callback = 50.0 * MO_TIME; + dev->callback = 50.0 * MO_TIME; mo_set_callback(dev); ui_sb_update_icon(SB_MO | dev->id, 0); mo_log("MO %i: UNIT ATTENTION\n", dev->id); } - static void mo_buf_alloc(mo_t *dev, uint32_t len) { mo_log("MO %i: Allocated buffer length: %i\n", dev->id, len); if (!dev->buffer) - dev->buffer = (uint8_t *) malloc(len); + dev->buffer = (uint8_t *) malloc(len); } - static void mo_buf_free(mo_t *dev) { if (dev->buffer) { - mo_log("MO %i: Freeing buffer...\n", dev->id); - free(dev->buffer); - dev->buffer = NULL; + mo_log("MO %i: Freeing buffer...\n", dev->id); + free(dev->buffer); + dev->buffer = NULL; } } - static void mo_bus_master_error(scsi_common_t *sc) { @@ -909,79 +875,71 @@ mo_bus_master_error(scsi_common_t *sc) mo_cmd_error(dev); } - static void mo_not_ready(mo_t *dev) { mo_sense_key = SENSE_NOT_READY; - mo_asc = ASC_MEDIUM_NOT_PRESENT; - mo_ascq = 0; + mo_asc = ASC_MEDIUM_NOT_PRESENT; + mo_ascq = 0; mo_cmd_error(dev); } - static void mo_write_protected(mo_t *dev) { mo_sense_key = SENSE_UNIT_ATTENTION; - mo_asc = ASC_WRITE_PROTECTED; - mo_ascq = 0; + mo_asc = ASC_WRITE_PROTECTED; + mo_ascq = 0; mo_cmd_error(dev); } - static void mo_invalid_lun(mo_t *dev) { mo_sense_key = SENSE_ILLEGAL_REQUEST; - mo_asc = ASC_INV_LUN; - mo_ascq = 0; + mo_asc = ASC_INV_LUN; + mo_ascq = 0; mo_cmd_error(dev); } - static void mo_illegal_opcode(mo_t *dev) { mo_sense_key = SENSE_ILLEGAL_REQUEST; - mo_asc = ASC_ILLEGAL_OPCODE; - mo_ascq = 0; + mo_asc = ASC_ILLEGAL_OPCODE; + mo_ascq = 0; mo_cmd_error(dev); } - static void mo_lba_out_of_range(mo_t *dev) { mo_sense_key = SENSE_ILLEGAL_REQUEST; - mo_asc = ASC_LBA_OUT_OF_RANGE; - mo_ascq = 0; + mo_asc = ASC_LBA_OUT_OF_RANGE; + mo_ascq = 0; mo_cmd_error(dev); } - static void mo_invalid_field(mo_t *dev) { mo_sense_key = SENSE_ILLEGAL_REQUEST; - mo_asc = ASC_INV_FIELD_IN_CMD_PACKET; - mo_ascq = 0; + mo_asc = ASC_INV_FIELD_IN_CMD_PACKET; + mo_ascq = 0; mo_cmd_error(dev); dev->status = 0x53; } - static void mo_invalid_field_pl(mo_t *dev) { mo_sense_key = SENSE_ILLEGAL_REQUEST; - mo_asc = ASC_INV_FIELD_IN_PARAMETER_LIST; - mo_ascq = 0; + mo_asc = ASC_INV_FIELD_IN_PARAMETER_LIST; + mo_ascq = 0; mo_cmd_error(dev); dev->status = 0x53; } - static int mo_blocks(mo_t *dev, int32_t *len, int first_batch, int out) { @@ -989,34 +947,34 @@ mo_blocks(mo_t *dev, int32_t *len, int first_batch, int out) int i; if (!dev->sector_len) { - mo_command_complete(dev); - return -1; + mo_command_complete(dev); + return -1; } mo_log("%sing %i blocks starting from %i...\n", out ? "Writ" : "Read", dev->requested_blocks, dev->sector_pos); if (dev->sector_pos >= dev->drv->medium_size) { - mo_log("MO %i: Trying to %s beyond the end of disk\n", dev->id, out ? "write" : "read"); - mo_lba_out_of_range(dev); - return 0; + mo_log("MO %i: Trying to %s beyond the end of disk\n", dev->id, out ? "write" : "read"); + mo_lba_out_of_range(dev); + return 0; } *len = dev->requested_blocks * dev->drv->sector_size; for (i = 0; i < dev->requested_blocks; i++) { - if (fseek(dev->drv->f, dev->drv->base + (dev->sector_pos * dev->drv->sector_size) + (i * dev->drv->sector_size), SEEK_SET) == 1) - break; + if (fseek(dev->drv->f, dev->drv->base + (dev->sector_pos * dev->drv->sector_size) + (i * dev->drv->sector_size), SEEK_SET) == 1) + break; - if (feof(dev->drv->f)) - break; + if (feof(dev->drv->f)) + break; - if (out) { - if (fwrite(dev->buffer + (i * dev->drv->sector_size), 1, dev->drv->sector_size, dev->drv->f) != dev->drv->sector_size) - fatal("mo_blocks(): Error writing data\n"); - } else { - if (fread(dev->buffer + (i * dev->drv->sector_size), 1, dev->drv->sector_size, dev->drv->f) != dev->drv->sector_size) - fatal("mo_blocks(): Error reading data\n"); - } + if (out) { + if (fwrite(dev->buffer + (i * dev->drv->sector_size), 1, dev->drv->sector_size, dev->drv->f) != dev->drv->sector_size) + fatal("mo_blocks(): Error writing data\n"); + } else { + if (fread(dev->buffer + (i * dev->drv->sector_size), 1, dev->drv->sector_size, dev->drv->f) != dev->drv->sector_size) + fatal("mo_blocks(): Error reading data\n"); + } } mo_log("%s %i bytes of blocks...\n", out ? "Written" : "Read", *len); @@ -1027,7 +985,6 @@ mo_blocks(mo_t *dev, int32_t *len, int first_batch, int out) return 1; } - void mo_insert(mo_t *dev) { @@ -1038,8 +995,8 @@ void mo_format(mo_t *dev) { long size; - int ret; - int fd; + int ret; + int fd; mo_log("MO %i: Formatting media...\n", dev->id); @@ -1047,57 +1004,57 @@ mo_format(mo_t *dev) size = ftell(dev->drv->f); #ifdef _WIN32 - HANDLE fh; + HANDLE fh; LARGE_INTEGER liSize; fd = _fileno(dev->drv->f); - fh = (HANDLE)_get_osfhandle(fd); + fh = (HANDLE) _get_osfhandle(fd); liSize.QuadPart = 0; - ret = (int)SetFilePointerEx(fh, liSize, NULL, FILE_BEGIN); + ret = (int) SetFilePointerEx(fh, liSize, NULL, FILE_BEGIN); - if(!ret) { - mo_log("MO %i: Failed seek to start of image file\n", dev->id); - return; + if (!ret) { + mo_log("MO %i: Failed seek to start of image file\n", dev->id); + return; } - ret = (int)SetEndOfFile(fh); + ret = (int) SetEndOfFile(fh); - if(!ret) { - mo_log("MO %i: Failed to truncate image file to 0\n", dev->id); - return; + if (!ret) { + mo_log("MO %i: Failed to truncate image file to 0\n", dev->id); + return; } liSize.QuadPart = size; - ret = (int)SetFilePointerEx(fh, liSize, NULL, FILE_BEGIN); + ret = (int) SetFilePointerEx(fh, liSize, NULL, FILE_BEGIN); - if(!ret) { - mo_log("MO %i: Failed seek to end of image file\n", dev->id); - return; + if (!ret) { + mo_log("MO %i: Failed seek to end of image file\n", dev->id); + return; } - ret = (int)SetEndOfFile(fh); + ret = (int) SetEndOfFile(fh); - if(!ret) { - mo_log("MO %i: Failed to truncate image file to %llu\n", dev->id, size); - return; + if (!ret) { + mo_log("MO %i: Failed to truncate image file to %llu\n", dev->id, size); + return; } #else fd = fileno(dev->drv->f); ret = ftruncate(fd, 0); - if(ret) { - mo_log("MO %i: Failed to truncate image file to 0\n", dev->id); - return; + if (ret) { + mo_log("MO %i: Failed to truncate image file to 0\n", dev->id); + return; } ret = ftruncate(fd, size); - if(ret) { - mo_log("MO %i: Failed to truncate image file to %llu", dev->id, size); - return; + if (ret) { + mo_log("MO %i: Failed to truncate image file to %llu", dev->id, size); + return; } #endif } @@ -1107,17 +1064,17 @@ mo_erase(mo_t *dev) { int i; - if (! dev->sector_len) { - mo_command_complete(dev); - return -1; + if (!dev->sector_len) { + mo_command_complete(dev); + return -1; } mo_log("MO %i: Erasing %i blocks starting from %i...\n", dev->id, dev->sector_len, dev->sector_pos); if (dev->sector_pos >= dev->drv->medium_size) { - mo_log("MO %i: Trying to erase beyond the end of disk\n", dev->id); - mo_lba_out_of_range(dev); - return 0; + mo_log("MO %i: Trying to erase beyond the end of disk\n", dev->id); + mo_lba_out_of_range(dev); + return 0; } mo_buf_alloc(dev, dev->drv->sector_size); @@ -1126,10 +1083,10 @@ mo_erase(mo_t *dev) fseek(dev->drv->f, dev->drv->base + (dev->sector_pos * dev->drv->sector_size), SEEK_SET); for (i = 0; i < dev->requested_blocks; i++) { - if (feof(dev->drv->f)) - break; + if (feof(dev->drv->f)) + break; - fwrite(dev->buffer, 1, dev->drv->sector_size, dev->drv->f); + fwrite(dev->buffer, 1, dev->drv->sector_size, dev->drv->f); } mo_log("MO %i: Erased %i bytes of blocks...\n", dev->id, i * dev->drv->sector_size); @@ -1145,42 +1102,41 @@ void mo_sense_code_ok(mo_t *dev) { mo_sense_key = SENSE_NONE; - mo_asc = 0; - mo_ascq = 0; + mo_asc = 0; + mo_ascq = 0; } - static int mo_pre_execution_check(mo_t *dev, uint8_t *cdb) { int ready = 0; if (dev->drv->bus_type == MO_BUS_SCSI) { - if ((cdb[0] != GPCMD_REQUEST_SENSE) && (dev->cur_lun == SCSI_LUN_USE_CDB) && (cdb[1] & 0xe0)) { - mo_log("MO %i: Attempting to execute a unknown command targeted at SCSI LUN %i\n", dev->id, ((dev->request_length >> 5) & 7)); - mo_invalid_lun(dev); - return 0; - } + if ((cdb[0] != GPCMD_REQUEST_SENSE) && (dev->cur_lun == SCSI_LUN_USE_CDB) && (cdb[1] & 0xe0)) { + mo_log("MO %i: Attempting to execute a unknown command targeted at SCSI LUN %i\n", dev->id, ((dev->request_length >> 5) & 7)); + mo_invalid_lun(dev); + return 0; + } } if (!(mo_command_flags[cdb[0]] & IMPLEMENTED)) { - mo_log("MO %i: Attempting to execute unknown command %02X over %s\n", dev->id, cdb[0], - (dev->drv->bus_type == MO_BUS_SCSI) ? "SCSI" : "ATAPI"); + mo_log("MO %i: Attempting to execute unknown command %02X over %s\n", dev->id, cdb[0], + (dev->drv->bus_type == MO_BUS_SCSI) ? "SCSI" : "ATAPI"); - mo_illegal_opcode(dev); - return 0; + mo_illegal_opcode(dev); + return 0; } if ((dev->drv->bus_type < MO_BUS_SCSI) && (mo_command_flags[cdb[0]] & SCSI_ONLY)) { - mo_log("MO %i: Attempting to execute SCSI-only command %02X over ATAPI\n", dev->id, cdb[0]); - mo_illegal_opcode(dev); - return 0; + mo_log("MO %i: Attempting to execute SCSI-only command %02X over ATAPI\n", dev->id, cdb[0]); + mo_illegal_opcode(dev); + return 0; } if ((dev->drv->bus_type == MO_BUS_SCSI) && (mo_command_flags[cdb[0]] & ATAPI_ONLY)) { - mo_log("MO %i: Attempting to execute ATAPI-only command %02X over SCSI\n", dev->id, cdb[0]); - mo_illegal_opcode(dev); - return 0; + mo_log("MO %i: Attempting to execute ATAPI-only command %02X over SCSI\n", dev->id, cdb[0]); + mo_illegal_opcode(dev); + return 0; } ready = (dev->drv->f != NULL); @@ -1189,36 +1145,36 @@ mo_pre_execution_check(mo_t *dev, uint8_t *cdb) UNIT ATTENTION condition present, as we only use it to mark disc changes. */ if (!ready && dev->unit_attention) - dev->unit_attention = 0; + dev->unit_attention = 0; /* If the UNIT ATTENTION condition is set and the command does not allow execution under it, error out and report the condition. */ if (dev->unit_attention == 1) { - /* Only increment the unit attention phase if the command can not pass through it. */ - if (!(mo_command_flags[cdb[0]] & ALLOW_UA)) { - /* mo_log("MO %i: Unit attention now 2\n", dev->id); */ - dev->unit_attention = 2; - mo_log("MO %i: UNIT ATTENTION: Command %02X not allowed to pass through\n", dev->id, cdb[0]); - mo_unit_attention(dev); - return 0; - } + /* Only increment the unit attention phase if the command can not pass through it. */ + if (!(mo_command_flags[cdb[0]] & ALLOW_UA)) { + /* mo_log("MO %i: Unit attention now 2\n", dev->id); */ + dev->unit_attention = 2; + mo_log("MO %i: UNIT ATTENTION: Command %02X not allowed to pass through\n", dev->id, cdb[0]); + mo_unit_attention(dev); + return 0; + } } else if (dev->unit_attention == 2) { - if (cdb[0] != GPCMD_REQUEST_SENSE) { - /* mo_log("MO %i: Unit attention now 0\n", dev->id); */ - dev->unit_attention = 0; - } + if (cdb[0] != GPCMD_REQUEST_SENSE) { + /* mo_log("MO %i: Unit attention now 0\n", dev->id); */ + dev->unit_attention = 0; + } } /* Unless the command is REQUEST SENSE, clear the sense. This will *NOT* the UNIT ATTENTION condition if it's set. */ if (cdb[0] != GPCMD_REQUEST_SENSE) - mo_sense_clear(dev, cdb[0]); + mo_sense_clear(dev, cdb[0]); /* Next it's time for NOT READY. */ if ((mo_command_flags[cdb[0]] & CHECK_READY) && !ready) { - mo_log("MO %i: Not ready (%02X)\n", dev->id, cdb[0]); - mo_not_ready(dev); - return 0; + mo_log("MO %i: Not ready (%02X)\n", dev->id, cdb[0]); + mo_not_ready(dev); + return 0; } mo_log("MO %i: Continuing with command %02X\n", dev->id, cdb[0]); @@ -1226,15 +1182,13 @@ mo_pre_execution_check(mo_t *dev, uint8_t *cdb) return 1; } - static void mo_seek(mo_t *dev, uint32_t pos) { /* mo_log("MO %i: Seek %08X\n", dev->id, pos); */ - dev->sector_pos = pos; + dev->sector_pos = pos; } - static void mo_rezero(mo_t *dev) { @@ -1242,73 +1196,70 @@ mo_rezero(mo_t *dev) mo_seek(dev, 0); } - void mo_reset(scsi_common_t *sc) { mo_t *dev = (mo_t *) sc; mo_rezero(dev); - dev->status = 0; + dev->status = 0; dev->callback = 0.0; mo_set_callback(dev); - dev->phase = 1; + dev->phase = 1; dev->request_length = 0xEB14; - dev->packet_status = PHASE_NONE; + dev->packet_status = PHASE_NONE; dev->unit_attention = 0; - dev->cur_lun = SCSI_LUN_USE_CDB; + dev->cur_lun = SCSI_LUN_USE_CDB; } - static void mo_request_sense(mo_t *dev, uint8_t *buffer, uint8_t alloc_length, int desc) { /*Will return 18 bytes of 0*/ if (alloc_length != 0) { - memset(buffer, 0, alloc_length); - if (!desc) - memcpy(buffer, dev->sense, alloc_length); - else { - buffer[1] = mo_sense_key; - buffer[2] = mo_asc; - buffer[3] = mo_ascq; - } + memset(buffer, 0, alloc_length); + if (!desc) + memcpy(buffer, dev->sense, alloc_length); + else { + buffer[1] = mo_sense_key; + buffer[2] = mo_asc; + buffer[3] = mo_ascq; + } } buffer[0] = desc ? 0x72 : 0x70; if (dev->unit_attention && (mo_sense_key == 0)) { - buffer[desc ? 1 : 2] = SENSE_UNIT_ATTENTION; - buffer[desc ? 2 : 12] = ASC_MEDIUM_MAY_HAVE_CHANGED; - buffer[desc ? 3 : 13] = 0; + buffer[desc ? 1 : 2] = SENSE_UNIT_ATTENTION; + buffer[desc ? 2 : 12] = ASC_MEDIUM_MAY_HAVE_CHANGED; + buffer[desc ? 3 : 13] = 0; } mo_log("MO %i: Reporting sense: %02X %02X %02X\n", dev->id, buffer[2], buffer[12], buffer[13]); if (buffer[desc ? 1 : 2] == SENSE_UNIT_ATTENTION) { - /* If the last remaining sense is unit attention, clear - that condition. */ - dev->unit_attention = 0; + /* If the last remaining sense is unit attention, clear + that condition. */ + dev->unit_attention = 0; } /* Clear the sense stuff as per the spec. */ mo_sense_clear(dev, GPCMD_REQUEST_SENSE); } - static void mo_request_sense_for_scsi(scsi_common_t *sc, uint8_t *buffer, uint8_t alloc_length) { - mo_t *dev = (mo_t *) sc; - int ready = 0; + mo_t *dev = (mo_t *) sc; + int ready = 0; ready = (dev->drv->f != NULL); if (!ready && dev->unit_attention) { - /* If the drive is not ready, there is no reason to keep the - UNIT ATTENTION condition present, as we only use it to mark - disc changes. */ - dev->unit_attention = 0; + /* If the drive is not ready, there is no reason to keep the + UNIT ATTENTION condition present, as we only use it to mark + disc changes. */ + dev->unit_attention = 0; } /* Do *NOT* advance the unit attention phase. */ @@ -1316,48 +1267,46 @@ mo_request_sense_for_scsi(scsi_common_t *sc, uint8_t *buffer, uint8_t alloc_leng mo_request_sense(dev, buffer, alloc_length, 0); } - static void mo_set_buf_len(mo_t *dev, int32_t *BufLen, int32_t *src_len) { if (dev->drv->bus_type == MO_BUS_SCSI) { - if (*BufLen == -1) - *BufLen = *src_len; - else { - *BufLen = MIN(*src_len, *BufLen); - *src_len = *BufLen; - } - mo_log("MO %i: Actual transfer length: %i\n", dev->id, *BufLen); + if (*BufLen == -1) + *BufLen = *src_len; + else { + *BufLen = MIN(*src_len, *BufLen); + *src_len = *BufLen; + } + mo_log("MO %i: Actual transfer length: %i\n", dev->id, *BufLen); } } - static void mo_command(scsi_common_t *sc, uint8_t *cdb) { - mo_t *dev = (mo_t *) sc; - int pos = 0, block_desc = 0; - int ret; - int32_t len, max_len; - int32_t alloc_length; - int size_idx, idx = 0; + mo_t *dev = (mo_t *) sc; + int pos = 0, block_desc = 0; + int ret; + int32_t len, max_len; + int32_t alloc_length; + int size_idx, idx = 0; unsigned preamble_len; - char device_identify[9] = { '8', '6', 'B', '_', 'M', 'O', '0', '0', 0 }; - int32_t blen = 0; + char device_identify[9] = { '8', '6', 'B', '_', 'M', 'O', '0', '0', 0 }; + int32_t blen = 0; int32_t *BufLen; uint32_t previous_pos = 0; - uint8_t scsi_bus = (dev->drv->scsi_device_id >> 4) & 0x0f; - uint8_t scsi_id = dev->drv->scsi_device_id & 0x0f; + uint8_t scsi_bus = (dev->drv->scsi_device_id >> 4) & 0x0f; + uint8_t scsi_id = dev->drv->scsi_device_id & 0x0f; if (dev->drv->bus_type == MO_BUS_SCSI) { - BufLen = &scsi_devices[scsi_bus][scsi_id].buffer_length; - dev->status &= ~ERR_STAT; + BufLen = &scsi_devices[scsi_bus][scsi_id].buffer_length; + dev->status &= ~ERR_STAT; } else { - BufLen = &blen; - dev->error = 0; + BufLen = &blen; + dev->error = 0; } - dev->packet_len = 0; + dev->packet_len = 0; dev->request_pos = 0; device_identify[7] = dev->id + 0x30; @@ -1365,13 +1314,13 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) memcpy(dev->current_cdb, cdb, 12); if (cdb[0] != 0) { - mo_log("MO %i: Command 0x%02X, Sense Key %02X, Asc %02X, Ascq %02X, Unit attention: %i\n", - dev->id, cdb[0], mo_sense_key, mo_asc, mo_ascq, dev->unit_attention); - mo_log("MO %i: Request length: %04X\n", dev->id, dev->request_length); + mo_log("MO %i: Command 0x%02X, Sense Key %02X, Asc %02X, Ascq %02X, Unit attention: %i\n", + dev->id, cdb[0], mo_sense_key, mo_asc, mo_ascq, dev->unit_attention); + mo_log("MO %i: Request length: %04X\n", dev->id, dev->request_length); - mo_log("MO %i: CDB: %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", dev->id, - cdb[0], cdb[1], cdb[2], cdb[3], cdb[4], cdb[5], cdb[6], cdb[7], - cdb[8], cdb[9], cdb[10], cdb[11]); + mo_log("MO %i: CDB: %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", dev->id, + cdb[0], cdb[1], cdb[2], cdb[3], cdb[4], cdb[5], cdb[6], cdb[7], + cdb[8], cdb[9], cdb[10], cdb[11]); } dev->sector_len = 0; @@ -1380,516 +1329,516 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) /* This handles the Not Ready/Unit Attention check if it has to be handled at this point. */ if (mo_pre_execution_check(dev, cdb) == 0) - return; + return; switch (cdb[0]) { - case GPCMD_SEND_DIAGNOSTIC: - if (!(cdb[1] & (1 << 2))) { - mo_invalid_field(dev); - return; - } - /*FALLTHROUGH*/ - case GPCMD_SCSI_RESERVE: - case GPCMD_SCSI_RELEASE: - case GPCMD_TEST_UNIT_READY: - mo_set_phase(dev, SCSI_PHASE_STATUS); - mo_command_complete(dev); - break; - - case GPCMD_FORMAT_UNIT: - if (dev->drv->read_only) { - mo_write_protected(dev); - return; - } - - mo_format(dev); - mo_set_phase(dev, SCSI_PHASE_STATUS); - mo_command_complete(dev); - break; - - case GPCMD_REZERO_UNIT: - dev->sector_pos = dev->sector_len = 0; - mo_seek(dev, 0); - mo_set_phase(dev, SCSI_PHASE_STATUS); - break; - - case GPCMD_REQUEST_SENSE: - /* If there's a unit attention condition and there's a buffered not ready, a standalone REQUEST SENSE - should forget about the not ready, and report unit attention straight away. */ - mo_set_phase(dev, SCSI_PHASE_DATA_IN); - max_len = cdb[4]; - - if (!max_len) { - mo_set_phase(dev, SCSI_PHASE_STATUS); - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * MO_TIME; - mo_set_callback(dev); - break; - } - - mo_buf_alloc(dev, 256); - mo_set_buf_len(dev, BufLen, &max_len); - len = (cdb[1] & 1) ? 8 : 18; - mo_request_sense(dev, dev->buffer, max_len, cdb[1] & 1); - mo_data_command_finish(dev, len, len, cdb[4], 0); - break; - - case GPCMD_MECHANISM_STATUS: - mo_set_phase(dev, SCSI_PHASE_DATA_IN); - len = (cdb[8] << 8) | cdb[9]; - - mo_buf_alloc(dev, 8); - mo_set_buf_len(dev, BufLen, &len); - - memset(dev->buffer, 0, 8); - dev->buffer[5] = 1; - - mo_data_command_finish(dev, 8, 8, len, 0); - break; - - case GPCMD_READ_6: - case GPCMD_READ_10: - case GPCMD_READ_12: - mo_set_phase(dev, SCSI_PHASE_DATA_IN); - alloc_length = dev->drv->sector_size; - - switch(cdb[0]) { - case GPCMD_READ_6: - dev->sector_len = cdb[4]; - dev->sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]); - if (dev->sector_len == 0) - dev->sector_len = 256; - mo_log("MO %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); - break; - case GPCMD_READ_10: - dev->sector_len = (cdb[7] << 8) | cdb[8]; - dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - mo_log("MO %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); - break; - case GPCMD_READ_12: - dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); - dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); - mo_log("MO %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); - break; - } - - if (!dev->sector_len) { - mo_set_phase(dev, SCSI_PHASE_STATUS); - /* mo_log("MO %i: All done - callback set\n", dev->id); */ - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * MO_TIME; - mo_set_callback(dev); - break; - } - - max_len = dev->sector_len; - dev->requested_blocks = max_len; /* If we're reading all blocks in one go for DMA, why not also for PIO, it should NOT - matter anyway, this step should be identical and only the way the read dat is - transferred to the host should be different. */ - - dev->packet_len = max_len * alloc_length; - mo_buf_alloc(dev, dev->packet_len); - - ret = mo_blocks(dev, &alloc_length, 1, 0); - if (ret <= 0) { - mo_set_phase(dev, SCSI_PHASE_STATUS); - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * MO_TIME; - mo_set_callback(dev); - mo_buf_free(dev); - return; - } - - dev->requested_blocks = max_len; - dev->packet_len = alloc_length; - - mo_set_buf_len(dev, BufLen, (int32_t *) &dev->packet_len); - - mo_data_command_finish(dev, alloc_length, dev->drv->sector_size, alloc_length, 0); - - if (dev->packet_status != PHASE_COMPLETE) - ui_sb_update_icon(SB_MO | dev->id, 1); - else - ui_sb_update_icon(SB_MO | dev->id, 0); - return; - - case GPCMD_VERIFY_6: - case GPCMD_VERIFY_10: - case GPCMD_VERIFY_12: - /* Data and blank verification cannot be set at the same time */ - if ((cdb[1] & 2) && (cdb[1] & 4)) { - mo_invalid_field(dev); - return; - } - if (!(cdb[1] & 2) || (cdb[1] & 4)) { - mo_set_phase(dev, SCSI_PHASE_STATUS); - mo_command_complete(dev); - break; - } - /*TODO: Implement*/ - mo_invalid_field(dev); - return; - - case GPCMD_WRITE_6: - case GPCMD_WRITE_10: - case GPCMD_WRITE_AND_VERIFY_10: - case GPCMD_WRITE_12: - case GPCMD_WRITE_AND_VERIFY_12: - mo_set_phase(dev, SCSI_PHASE_DATA_OUT); - alloc_length = dev->drv->sector_size; - - if (dev->drv->read_only) { - mo_write_protected(dev); - return; - } - - switch (cdb[0]) { - case GPCMD_VERIFY_6: - case GPCMD_WRITE_6: - dev->sector_len = cdb[4]; - if (dev->sector_len == 0) - dev->sector_len = 256; /* For READ (6) and WRITE (6), a length of 0 indicates a transfer of 256 sector. */ - dev->sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]); - break; - case GPCMD_VERIFY_10: - case GPCMD_WRITE_10: - case GPCMD_WRITE_AND_VERIFY_10: - dev->sector_len = (cdb[7] << 8) | cdb[8]; - dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - mo_log("MO %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); - break; - case GPCMD_VERIFY_12: - case GPCMD_WRITE_12: - case GPCMD_WRITE_AND_VERIFY_12: - dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); - dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); - break; - } - - if ((dev->sector_pos >= dev->drv->medium_size)/* || - ((dev->sector_pos + dev->sector_len - 1) >= dev->drv->medium_size)*/) { - mo_lba_out_of_range(dev); - return; - } - - if (!dev->sector_len) { - mo_set_phase(dev, SCSI_PHASE_STATUS); - /* mo_log("MO %i: All done - callback set\n", dev->id); */ - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * MO_TIME; - mo_set_callback(dev); - break; - } - - max_len = dev->sector_len; - dev->requested_blocks = max_len; /* If we're writing all blocks in one go for DMA, why not also for PIO, it should NOT - matter anyway, this step should be identical and only the way the read dat is - transferred to the host should be different. */ - - dev->packet_len = max_len * alloc_length; - mo_buf_alloc(dev, dev->packet_len); - - dev->requested_blocks = max_len; - dev->packet_len = max_len << 9; - - mo_set_buf_len(dev, BufLen, (int32_t *) &dev->packet_len); - - mo_data_command_finish(dev, dev->packet_len, dev->drv->sector_size, dev->packet_len, 1); - - if (dev->packet_status != PHASE_COMPLETE) - ui_sb_update_icon(SB_MO | dev->id, 1); - else - ui_sb_update_icon(SB_MO | dev->id, 0); - return; - - case GPCMD_MODE_SENSE_6: - case GPCMD_MODE_SENSE_10: - mo_set_phase(dev, SCSI_PHASE_DATA_IN); - - if (dev->drv->bus_type == MO_BUS_SCSI) - block_desc = ((cdb[1] >> 3) & 1) ? 0 : 1; - else - block_desc = 0; - - if (cdb[0] == GPCMD_MODE_SENSE_6) { - len = cdb[4]; - mo_buf_alloc(dev, 256); - } else { - len = (cdb[8] | (cdb[7] << 8)); - mo_buf_alloc(dev, 65536); - } - - if (!(mo_mode_sense_page_flags & (1LL << (uint64_t) (cdb[2] & 0x3f)))) { - mo_invalid_field(dev); - mo_buf_free(dev); - return; - } - - memset(dev->buffer, 0, len); - alloc_length = len; - - if (cdb[0] == GPCMD_MODE_SENSE_6) { - len = mo_mode_sense(dev, dev->buffer, 4, cdb[2], block_desc); - len = MIN(len, alloc_length); - dev->buffer[0] = len - 1; - dev->buffer[1] = 0; - if (block_desc) - dev->buffer[3] = 8; - } else { - len = mo_mode_sense(dev, dev->buffer, 8, cdb[2], block_desc); - len = MIN(len, alloc_length); - dev->buffer[0]=(len - 2) >> 8; - dev->buffer[1]=(len - 2) & 255; - dev->buffer[2] = 0; - if (block_desc) { - dev->buffer[6] = 0; - dev->buffer[7] = 8; - } - } - - mo_set_buf_len(dev, BufLen, &len); - - mo_log("MO %i: Reading mode page: %02X...\n", dev->id, cdb[2]); - - mo_data_command_finish(dev, len, len, alloc_length, 0); - return; - - case GPCMD_MODE_SELECT_6: - case GPCMD_MODE_SELECT_10: - mo_set_phase(dev, SCSI_PHASE_DATA_OUT); - - if (cdb[0] == GPCMD_MODE_SELECT_6) { - len = cdb[4]; - mo_buf_alloc(dev, 256); - } else { - len = (cdb[7] << 8) | cdb[8]; - mo_buf_alloc(dev, 65536); - } - - mo_set_buf_len(dev, BufLen, &len); - - dev->total_length = len; - dev->do_page_save = cdb[1] & 1; - - mo_data_command_finish(dev, len, len, len, 1); - return; - - case GPCMD_START_STOP_UNIT: - mo_set_phase(dev, SCSI_PHASE_STATUS); - - switch(cdb[4] & 3) { - case 0: /* Stop the disk. */ - break; - case 1: /* Start the disk and read the TOC. */ - break; - case 2: /* Eject the disk if possible. */ - mo_eject(dev->id); - break; - case 3: /* Load the disk (close tray). */ - mo_reload(dev->id); - break; - } - - mo_command_complete(dev); - break; - - case GPCMD_INQUIRY: - mo_set_phase(dev, SCSI_PHASE_DATA_IN); - - max_len = cdb[3]; - max_len <<= 8; - max_len |= cdb[4]; - - mo_buf_alloc(dev, 65536); - - if (cdb[1] & 1) { - preamble_len = 4; - size_idx = 3; - - dev->buffer[idx++] = 7; /*Optical disk*/ - dev->buffer[idx++] = cdb[2]; - dev->buffer[idx++] = 0; - - idx++; - - switch (cdb[2]) { - case 0x00: - dev->buffer[idx++] = 0x00; - dev->buffer[idx++] = 0x80; - break; - case 0x80: /*Unit serial number page*/ - dev->buffer[idx++] = strlen("VCM!10") + 1; - ide_padstr8(dev->buffer + idx, 20, "VCM!10"); /* Serial */ - idx += strlen("VCM!10"); - break; - default: - mo_log("INQUIRY: Invalid page: %02X\n", cdb[2]); - mo_invalid_field(dev); - mo_buf_free(dev); - return; - } - } else { - preamble_len = 5; - size_idx = 4; - - memset(dev->buffer, 0, 8); - if (cdb[1] & 0xe0) - dev->buffer[0] = 0x60; /*No physical device on this LUN*/ - else - dev->buffer[0] = 0x07; /*Optical disk*/ - dev->buffer[1] = 0x80; /*Removable*/ - dev->buffer[2] = (dev->drv->bus_type == MO_BUS_SCSI) ? 0x02 : 0x00; /*SCSI-2 compliant*/ - dev->buffer[3] = (dev->drv->bus_type == MO_BUS_SCSI) ? 0x02 : 0x21; - // dev->buffer[4] = 31; - dev->buffer[4] = 0; - if (dev->drv->bus_type == MO_BUS_SCSI) { - dev->buffer[6] = 1; /* 16-bit transfers supported */ - dev->buffer[7] = 0x20; /* Wide bus supported */ - } - dev->buffer[7] |= 0x02; - - if (dev->drv->type > 0) { - ide_padstr8(dev->buffer + 8, 8, mo_drive_types[dev->drv->type].vendor); /* Vendor */ - ide_padstr8(dev->buffer + 16, 16, mo_drive_types[dev->drv->type].model); /* Product */ - ide_padstr8(dev->buffer + 32, 4, mo_drive_types[dev->drv->type].revision); /* Revision */ - } else { - ide_padstr8(dev->buffer + 8, 8, EMU_NAME); /* Vendor */ - ide_padstr8(dev->buffer + 16, 16, device_identify); /* Product */ - ide_padstr8(dev->buffer + 32, 4, EMU_VERSION_EX); /* Revision */ - } - idx = 36; - - if (max_len == 96) { - dev->buffer[4] = 91; - idx = 96; - } else if (max_len == 128) { - dev->buffer[4] = 0x75; - idx = 128; - } - } - - dev->buffer[size_idx] = idx - preamble_len; - len=idx; - - len = MIN(len, max_len); - mo_set_buf_len(dev, BufLen, &len); - - mo_data_command_finish(dev, len, len, max_len, 0); - break; - - case GPCMD_PREVENT_REMOVAL: - mo_set_phase(dev, SCSI_PHASE_STATUS); - mo_command_complete(dev); - break; - - case GPCMD_SEEK_6: - case GPCMD_SEEK_10: - mo_set_phase(dev, SCSI_PHASE_STATUS); - - switch(cdb[0]) { - case GPCMD_SEEK_6: - pos = (cdb[2] << 8) | cdb[3]; - break; - case GPCMD_SEEK_10: - pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - break; - } - mo_seek(dev, pos); - mo_command_complete(dev); - break; - - case GPCMD_READ_CDROM_CAPACITY: - mo_set_phase(dev, SCSI_PHASE_DATA_IN); - - mo_buf_alloc(dev, 8); - - max_len = dev->drv->medium_size - 1; /* IMPORTANT: What's returned is the last LBA block. */ - memset(dev->buffer, 0, 8); - dev->buffer[0] = (max_len >> 24) & 0xff; - dev->buffer[1] = (max_len >> 16) & 0xff; - dev->buffer[2] = (max_len >> 8) & 0xff; - dev->buffer[3] = max_len & 0xff; - dev->buffer[6] = (dev->drv->sector_size >> 8) & 0xff; - dev->buffer[7] = dev->drv->sector_size & 0xff; - len = 8; - - mo_set_buf_len(dev, BufLen, &len); - - mo_data_command_finish(dev, len, len, len, 0); - break; - - case GPCMD_ERASE_10: - case GPCMD_ERASE_12: - /*Relative address*/ - if ((cdb[1] & 1)) - previous_pos = dev->sector_pos; - - switch (cdb[0]) { - case GPCMD_ERASE_10: - dev->sector_len = (cdb[7] << 8) | cdb[8]; - break; - case GPCMD_ERASE_12: - dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); - break; - } - - /*Erase all remaining sectors*/ - if ((cdb[1] & 4)) { - /* Cannot have a sector number when erase all*/ - if (dev->sector_len) { - mo_invalid_field(dev); - return; - } - mo_format(dev); - mo_set_phase(dev, SCSI_PHASE_STATUS); - mo_command_complete(dev); - break; - } - - switch (cdb[0]) { - case GPCMD_ERASE_10: - dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - break; - case GPCMD_ERASE_12: - dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); - break; - } - - dev->sector_pos += previous_pos; - - mo_erase(dev); - mo_set_phase(dev, SCSI_PHASE_STATUS); - mo_command_complete(dev); - break; - - /*Never seen media that supports generations but it's interesting to know if any implementation calls this commmand*/ - case GPCMD_READ_GENERATION: - mo_set_phase(dev, SCSI_PHASE_DATA_IN); - - mo_buf_alloc(dev, 4); - len = 4; - - dev->buffer[0] = 0; - dev->buffer[1] = 0; - dev->buffer[2] = 0; - dev->buffer[3] = 0; - - mo_set_buf_len(dev, BufLen, &len); - mo_data_command_finish(dev, len, len, len, 0); - break; - - default: - mo_illegal_opcode(dev); - break; + case GPCMD_SEND_DIAGNOSTIC: + if (!(cdb[1] & (1 << 2))) { + mo_invalid_field(dev); + return; + } + /*FALLTHROUGH*/ + case GPCMD_SCSI_RESERVE: + case GPCMD_SCSI_RELEASE: + case GPCMD_TEST_UNIT_READY: + mo_set_phase(dev, SCSI_PHASE_STATUS); + mo_command_complete(dev); + break; + + case GPCMD_FORMAT_UNIT: + if (dev->drv->read_only) { + mo_write_protected(dev); + return; + } + + mo_format(dev); + mo_set_phase(dev, SCSI_PHASE_STATUS); + mo_command_complete(dev); + break; + + case GPCMD_REZERO_UNIT: + dev->sector_pos = dev->sector_len = 0; + mo_seek(dev, 0); + mo_set_phase(dev, SCSI_PHASE_STATUS); + break; + + case GPCMD_REQUEST_SENSE: + /* If there's a unit attention condition and there's a buffered not ready, a standalone REQUEST SENSE + should forget about the not ready, and report unit attention straight away. */ + mo_set_phase(dev, SCSI_PHASE_DATA_IN); + max_len = cdb[4]; + + if (!max_len) { + mo_set_phase(dev, SCSI_PHASE_STATUS); + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * MO_TIME; + mo_set_callback(dev); + break; + } + + mo_buf_alloc(dev, 256); + mo_set_buf_len(dev, BufLen, &max_len); + len = (cdb[1] & 1) ? 8 : 18; + mo_request_sense(dev, dev->buffer, max_len, cdb[1] & 1); + mo_data_command_finish(dev, len, len, cdb[4], 0); + break; + + case GPCMD_MECHANISM_STATUS: + mo_set_phase(dev, SCSI_PHASE_DATA_IN); + len = (cdb[8] << 8) | cdb[9]; + + mo_buf_alloc(dev, 8); + mo_set_buf_len(dev, BufLen, &len); + + memset(dev->buffer, 0, 8); + dev->buffer[5] = 1; + + mo_data_command_finish(dev, 8, 8, len, 0); + break; + + case GPCMD_READ_6: + case GPCMD_READ_10: + case GPCMD_READ_12: + mo_set_phase(dev, SCSI_PHASE_DATA_IN); + alloc_length = dev->drv->sector_size; + + switch (cdb[0]) { + case GPCMD_READ_6: + dev->sector_len = cdb[4]; + dev->sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]); + if (dev->sector_len == 0) + dev->sector_len = 256; + mo_log("MO %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); + break; + case GPCMD_READ_10: + dev->sector_len = (cdb[7] << 8) | cdb[8]; + dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + mo_log("MO %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); + break; + case GPCMD_READ_12: + dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); + dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); + mo_log("MO %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); + break; + } + + if (!dev->sector_len) { + mo_set_phase(dev, SCSI_PHASE_STATUS); + /* mo_log("MO %i: All done - callback set\n", dev->id); */ + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * MO_TIME; + mo_set_callback(dev); + break; + } + + max_len = dev->sector_len; + dev->requested_blocks = max_len; /* If we're reading all blocks in one go for DMA, why not also for PIO, it should NOT + matter anyway, this step should be identical and only the way the read dat is + transferred to the host should be different. */ + + dev->packet_len = max_len * alloc_length; + mo_buf_alloc(dev, dev->packet_len); + + ret = mo_blocks(dev, &alloc_length, 1, 0); + if (ret <= 0) { + mo_set_phase(dev, SCSI_PHASE_STATUS); + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * MO_TIME; + mo_set_callback(dev); + mo_buf_free(dev); + return; + } + + dev->requested_blocks = max_len; + dev->packet_len = alloc_length; + + mo_set_buf_len(dev, BufLen, (int32_t *) &dev->packet_len); + + mo_data_command_finish(dev, alloc_length, dev->drv->sector_size, alloc_length, 0); + + if (dev->packet_status != PHASE_COMPLETE) + ui_sb_update_icon(SB_MO | dev->id, 1); + else + ui_sb_update_icon(SB_MO | dev->id, 0); + return; + + case GPCMD_VERIFY_6: + case GPCMD_VERIFY_10: + case GPCMD_VERIFY_12: + /* Data and blank verification cannot be set at the same time */ + if ((cdb[1] & 2) && (cdb[1] & 4)) { + mo_invalid_field(dev); + return; + } + if (!(cdb[1] & 2) || (cdb[1] & 4)) { + mo_set_phase(dev, SCSI_PHASE_STATUS); + mo_command_complete(dev); + break; + } + /*TODO: Implement*/ + mo_invalid_field(dev); + return; + + case GPCMD_WRITE_6: + case GPCMD_WRITE_10: + case GPCMD_WRITE_AND_VERIFY_10: + case GPCMD_WRITE_12: + case GPCMD_WRITE_AND_VERIFY_12: + mo_set_phase(dev, SCSI_PHASE_DATA_OUT); + alloc_length = dev->drv->sector_size; + + if (dev->drv->read_only) { + mo_write_protected(dev); + return; + } + + switch (cdb[0]) { + case GPCMD_VERIFY_6: + case GPCMD_WRITE_6: + dev->sector_len = cdb[4]; + if (dev->sector_len == 0) + dev->sector_len = 256; /* For READ (6) and WRITE (6), a length of 0 indicates a transfer of 256 sector. */ + dev->sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]); + break; + case GPCMD_VERIFY_10: + case GPCMD_WRITE_10: + case GPCMD_WRITE_AND_VERIFY_10: + dev->sector_len = (cdb[7] << 8) | cdb[8]; + dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + mo_log("MO %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); + break; + case GPCMD_VERIFY_12: + case GPCMD_WRITE_12: + case GPCMD_WRITE_AND_VERIFY_12: + dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); + dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); + break; + } + + if ((dev->sector_pos >= dev->drv->medium_size) /* || + ((dev->sector_pos + dev->sector_len - 1) >= dev->drv->medium_size)*/ + ) { + mo_lba_out_of_range(dev); + return; + } + + if (!dev->sector_len) { + mo_set_phase(dev, SCSI_PHASE_STATUS); + /* mo_log("MO %i: All done - callback set\n", dev->id); */ + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * MO_TIME; + mo_set_callback(dev); + break; + } + + max_len = dev->sector_len; + dev->requested_blocks = max_len; /* If we're writing all blocks in one go for DMA, why not also for PIO, it should NOT + matter anyway, this step should be identical and only the way the read dat is + transferred to the host should be different. */ + + dev->packet_len = max_len * alloc_length; + mo_buf_alloc(dev, dev->packet_len); + + dev->requested_blocks = max_len; + dev->packet_len = max_len << 9; + + mo_set_buf_len(dev, BufLen, (int32_t *) &dev->packet_len); + + mo_data_command_finish(dev, dev->packet_len, dev->drv->sector_size, dev->packet_len, 1); + + if (dev->packet_status != PHASE_COMPLETE) + ui_sb_update_icon(SB_MO | dev->id, 1); + else + ui_sb_update_icon(SB_MO | dev->id, 0); + return; + + case GPCMD_MODE_SENSE_6: + case GPCMD_MODE_SENSE_10: + mo_set_phase(dev, SCSI_PHASE_DATA_IN); + + if (dev->drv->bus_type == MO_BUS_SCSI) + block_desc = ((cdb[1] >> 3) & 1) ? 0 : 1; + else + block_desc = 0; + + if (cdb[0] == GPCMD_MODE_SENSE_6) { + len = cdb[4]; + mo_buf_alloc(dev, 256); + } else { + len = (cdb[8] | (cdb[7] << 8)); + mo_buf_alloc(dev, 65536); + } + + if (!(mo_mode_sense_page_flags & (1LL << (uint64_t) (cdb[2] & 0x3f)))) { + mo_invalid_field(dev); + mo_buf_free(dev); + return; + } + + memset(dev->buffer, 0, len); + alloc_length = len; + + if (cdb[0] == GPCMD_MODE_SENSE_6) { + len = mo_mode_sense(dev, dev->buffer, 4, cdb[2], block_desc); + len = MIN(len, alloc_length); + dev->buffer[0] = len - 1; + dev->buffer[1] = 0; + if (block_desc) + dev->buffer[3] = 8; + } else { + len = mo_mode_sense(dev, dev->buffer, 8, cdb[2], block_desc); + len = MIN(len, alloc_length); + dev->buffer[0] = (len - 2) >> 8; + dev->buffer[1] = (len - 2) & 255; + dev->buffer[2] = 0; + if (block_desc) { + dev->buffer[6] = 0; + dev->buffer[7] = 8; + } + } + + mo_set_buf_len(dev, BufLen, &len); + + mo_log("MO %i: Reading mode page: %02X...\n", dev->id, cdb[2]); + + mo_data_command_finish(dev, len, len, alloc_length, 0); + return; + + case GPCMD_MODE_SELECT_6: + case GPCMD_MODE_SELECT_10: + mo_set_phase(dev, SCSI_PHASE_DATA_OUT); + + if (cdb[0] == GPCMD_MODE_SELECT_6) { + len = cdb[4]; + mo_buf_alloc(dev, 256); + } else { + len = (cdb[7] << 8) | cdb[8]; + mo_buf_alloc(dev, 65536); + } + + mo_set_buf_len(dev, BufLen, &len); + + dev->total_length = len; + dev->do_page_save = cdb[1] & 1; + + mo_data_command_finish(dev, len, len, len, 1); + return; + + case GPCMD_START_STOP_UNIT: + mo_set_phase(dev, SCSI_PHASE_STATUS); + + switch (cdb[4] & 3) { + case 0: /* Stop the disk. */ + break; + case 1: /* Start the disk and read the TOC. */ + break; + case 2: /* Eject the disk if possible. */ + mo_eject(dev->id); + break; + case 3: /* Load the disk (close tray). */ + mo_reload(dev->id); + break; + } + + mo_command_complete(dev); + break; + + case GPCMD_INQUIRY: + mo_set_phase(dev, SCSI_PHASE_DATA_IN); + + max_len = cdb[3]; + max_len <<= 8; + max_len |= cdb[4]; + + mo_buf_alloc(dev, 65536); + + if (cdb[1] & 1) { + preamble_len = 4; + size_idx = 3; + + dev->buffer[idx++] = 7; /*Optical disk*/ + dev->buffer[idx++] = cdb[2]; + dev->buffer[idx++] = 0; + + idx++; + + switch (cdb[2]) { + case 0x00: + dev->buffer[idx++] = 0x00; + dev->buffer[idx++] = 0x80; + break; + case 0x80: /*Unit serial number page*/ + dev->buffer[idx++] = strlen("VCM!10") + 1; + ide_padstr8(dev->buffer + idx, 20, "VCM!10"); /* Serial */ + idx += strlen("VCM!10"); + break; + default: + mo_log("INQUIRY: Invalid page: %02X\n", cdb[2]); + mo_invalid_field(dev); + mo_buf_free(dev); + return; + } + } else { + preamble_len = 5; + size_idx = 4; + + memset(dev->buffer, 0, 8); + if (cdb[1] & 0xe0) + dev->buffer[0] = 0x60; /*No physical device on this LUN*/ + else + dev->buffer[0] = 0x07; /*Optical disk*/ + dev->buffer[1] = 0x80; /*Removable*/ + dev->buffer[2] = (dev->drv->bus_type == MO_BUS_SCSI) ? 0x02 : 0x00; /*SCSI-2 compliant*/ + dev->buffer[3] = (dev->drv->bus_type == MO_BUS_SCSI) ? 0x02 : 0x21; + // dev->buffer[4] = 31; + dev->buffer[4] = 0; + if (dev->drv->bus_type == MO_BUS_SCSI) { + dev->buffer[6] = 1; /* 16-bit transfers supported */ + dev->buffer[7] = 0x20; /* Wide bus supported */ + } + dev->buffer[7] |= 0x02; + + if (dev->drv->type > 0) { + ide_padstr8(dev->buffer + 8, 8, mo_drive_types[dev->drv->type].vendor); /* Vendor */ + ide_padstr8(dev->buffer + 16, 16, mo_drive_types[dev->drv->type].model); /* Product */ + ide_padstr8(dev->buffer + 32, 4, mo_drive_types[dev->drv->type].revision); /* Revision */ + } else { + ide_padstr8(dev->buffer + 8, 8, EMU_NAME); /* Vendor */ + ide_padstr8(dev->buffer + 16, 16, device_identify); /* Product */ + ide_padstr8(dev->buffer + 32, 4, EMU_VERSION_EX); /* Revision */ + } + idx = 36; + + if (max_len == 96) { + dev->buffer[4] = 91; + idx = 96; + } else if (max_len == 128) { + dev->buffer[4] = 0x75; + idx = 128; + } + } + + dev->buffer[size_idx] = idx - preamble_len; + len = idx; + + len = MIN(len, max_len); + mo_set_buf_len(dev, BufLen, &len); + + mo_data_command_finish(dev, len, len, max_len, 0); + break; + + case GPCMD_PREVENT_REMOVAL: + mo_set_phase(dev, SCSI_PHASE_STATUS); + mo_command_complete(dev); + break; + + case GPCMD_SEEK_6: + case GPCMD_SEEK_10: + mo_set_phase(dev, SCSI_PHASE_STATUS); + + switch (cdb[0]) { + case GPCMD_SEEK_6: + pos = (cdb[2] << 8) | cdb[3]; + break; + case GPCMD_SEEK_10: + pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + break; + } + mo_seek(dev, pos); + mo_command_complete(dev); + break; + + case GPCMD_READ_CDROM_CAPACITY: + mo_set_phase(dev, SCSI_PHASE_DATA_IN); + + mo_buf_alloc(dev, 8); + + max_len = dev->drv->medium_size - 1; /* IMPORTANT: What's returned is the last LBA block. */ + memset(dev->buffer, 0, 8); + dev->buffer[0] = (max_len >> 24) & 0xff; + dev->buffer[1] = (max_len >> 16) & 0xff; + dev->buffer[2] = (max_len >> 8) & 0xff; + dev->buffer[3] = max_len & 0xff; + dev->buffer[6] = (dev->drv->sector_size >> 8) & 0xff; + dev->buffer[7] = dev->drv->sector_size & 0xff; + len = 8; + + mo_set_buf_len(dev, BufLen, &len); + + mo_data_command_finish(dev, len, len, len, 0); + break; + + case GPCMD_ERASE_10: + case GPCMD_ERASE_12: + /*Relative address*/ + if ((cdb[1] & 1)) + previous_pos = dev->sector_pos; + + switch (cdb[0]) { + case GPCMD_ERASE_10: + dev->sector_len = (cdb[7] << 8) | cdb[8]; + break; + case GPCMD_ERASE_12: + dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); + break; + } + + /*Erase all remaining sectors*/ + if ((cdb[1] & 4)) { + /* Cannot have a sector number when erase all*/ + if (dev->sector_len) { + mo_invalid_field(dev); + return; + } + mo_format(dev); + mo_set_phase(dev, SCSI_PHASE_STATUS); + mo_command_complete(dev); + break; + } + + switch (cdb[0]) { + case GPCMD_ERASE_10: + dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + break; + case GPCMD_ERASE_12: + dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); + break; + } + + dev->sector_pos += previous_pos; + + mo_erase(dev); + mo_set_phase(dev, SCSI_PHASE_STATUS); + mo_command_complete(dev); + break; + + /*Never seen media that supports generations but it's interesting to know if any implementation calls this commmand*/ + case GPCMD_READ_GENERATION: + mo_set_phase(dev, SCSI_PHASE_DATA_IN); + + mo_buf_alloc(dev, 4); + len = 4; + + dev->buffer[0] = 0; + dev->buffer[1] = 0; + dev->buffer[2] = 0; + dev->buffer[3] = 0; + + mo_set_buf_len(dev, BufLen, &len); + mo_data_command_finish(dev, len, len, len, 0); + break; + + default: + mo_illegal_opcode(dev); + break; } /* mo_log("MO %i: Phase: %02X, request length: %i\n", dev->id, dev->phase, dev->request_length); */ if (mo_atapi_phase_to_scsi(dev) == SCSI_PHASE_STATUS) - mo_buf_free(dev); + mo_buf_free(dev); } - static void mo_command_stop(scsi_common_t *sc) { @@ -1899,7 +1848,6 @@ mo_command_stop(scsi_common_t *sc) mo_buf_free(dev); } - /* The command second phase function, needed for Mode Select. */ static uint8_t mo_phase_data_out(scsi_common_t *sc) @@ -1918,99 +1866,98 @@ mo_phase_data_out(scsi_common_t *sc) int len = 0; - switch(dev->current_cdb[0]) { - case GPCMD_VERIFY_6: - case GPCMD_VERIFY_10: - case GPCMD_VERIFY_12: - break; - case GPCMD_WRITE_6: - case GPCMD_WRITE_10: - case GPCMD_WRITE_AND_VERIFY_10: - case GPCMD_WRITE_12: - case GPCMD_WRITE_AND_VERIFY_12: - if (dev->requested_blocks > 0) - mo_blocks(dev, &len, 1, 1); - break; - case GPCMD_MODE_SELECT_6: - case GPCMD_MODE_SELECT_10: - if (dev->current_cdb[0] == GPCMD_MODE_SELECT_10) { - hdr_len = 8; - param_list_len = dev->current_cdb[7]; - param_list_len <<= 8; - param_list_len |= dev->current_cdb[8]; - } else { - hdr_len = 4; - param_list_len = dev->current_cdb[4]; - } + switch (dev->current_cdb[0]) { + case GPCMD_VERIFY_6: + case GPCMD_VERIFY_10: + case GPCMD_VERIFY_12: + break; + case GPCMD_WRITE_6: + case GPCMD_WRITE_10: + case GPCMD_WRITE_AND_VERIFY_10: + case GPCMD_WRITE_12: + case GPCMD_WRITE_AND_VERIFY_12: + if (dev->requested_blocks > 0) + mo_blocks(dev, &len, 1, 1); + break; + case GPCMD_MODE_SELECT_6: + case GPCMD_MODE_SELECT_10: + if (dev->current_cdb[0] == GPCMD_MODE_SELECT_10) { + hdr_len = 8; + param_list_len = dev->current_cdb[7]; + param_list_len <<= 8; + param_list_len |= dev->current_cdb[8]; + } else { + hdr_len = 4; + param_list_len = dev->current_cdb[4]; + } - if (dev->drv->bus_type == MO_BUS_SCSI) { - if (dev->current_cdb[0] == GPCMD_MODE_SELECT_6) { - block_desc_len = dev->buffer[2]; - block_desc_len <<= 8; - block_desc_len |= dev->buffer[3]; - } else { - block_desc_len = dev->buffer[6]; - block_desc_len <<= 8; - block_desc_len |= dev->buffer[7]; - } - } else - block_desc_len = 0; + if (dev->drv->bus_type == MO_BUS_SCSI) { + if (dev->current_cdb[0] == GPCMD_MODE_SELECT_6) { + block_desc_len = dev->buffer[2]; + block_desc_len <<= 8; + block_desc_len |= dev->buffer[3]; + } else { + block_desc_len = dev->buffer[6]; + block_desc_len <<= 8; + block_desc_len |= dev->buffer[7]; + } + } else + block_desc_len = 0; - pos = hdr_len + block_desc_len; + pos = hdr_len + block_desc_len; - while(1) { - if (pos >= param_list_len) { - mo_log("MO %i: Buffer has only block descriptor\n", dev->id); - break; - } + while (1) { + if (pos >= param_list_len) { + mo_log("MO %i: Buffer has only block descriptor\n", dev->id); + break; + } - page = dev->buffer[pos] & 0x3F; - page_len = dev->buffer[pos + 1]; + page = dev->buffer[pos] & 0x3F; + page_len = dev->buffer[pos + 1]; - pos += 2; + pos += 2; - if (!(mo_mode_sense_page_flags & (1LL << ((uint64_t) page)))) - error |= 1; - else { - for (i = 0; i < page_len; i++) { - ch = mo_mode_sense_pages_changeable.pages[page][i + 2]; - val = dev->buffer[pos + i]; - old_val = dev->ms_pages_saved.pages[page][i + 2]; - if (val != old_val) { - if (ch) - dev->ms_pages_saved.pages[page][i + 2] = val; - else - error |= 1; - } - } - } + if (!(mo_mode_sense_page_flags & (1LL << ((uint64_t) page)))) + error |= 1; + else { + for (i = 0; i < page_len; i++) { + ch = mo_mode_sense_pages_changeable.pages[page][i + 2]; + val = dev->buffer[pos + i]; + old_val = dev->ms_pages_saved.pages[page][i + 2]; + if (val != old_val) { + if (ch) + dev->ms_pages_saved.pages[page][i + 2] = val; + else + error |= 1; + } + } + } - pos += page_len; + pos += page_len; - if (dev->drv->bus_type == MO_BUS_SCSI) - val = mo_mode_sense_pages_default_scsi.pages[page][0] & 0x80; - else - val = mo_mode_sense_pages_default.pages[page][0] & 0x80; - if (dev->do_page_save && val) - mo_mode_sense_save(dev); + if (dev->drv->bus_type == MO_BUS_SCSI) + val = mo_mode_sense_pages_default_scsi.pages[page][0] & 0x80; + else + val = mo_mode_sense_pages_default.pages[page][0] & 0x80; + if (dev->do_page_save && val) + mo_mode_sense_save(dev); - if (pos >= dev->total_length) - break; - } + if (pos >= dev->total_length) + break; + } - if (error) { - mo_buf_free(dev); - mo_invalid_field_pl(dev); - return 0; - } - break; + if (error) { + mo_buf_free(dev); + mo_invalid_field_pl(dev); + return 0; + } + break; } mo_command_stop((scsi_common_t *) dev); return 1; } - /* Peform a master init on the entire module. */ void mo_global_init(void) @@ -2019,50 +1966,48 @@ mo_global_init(void) memset(mo_drives, 0x00, sizeof(mo_drives)); } - static int mo_get_max(int ide_has_dma, int type) { int ret; - switch(type) { - case TYPE_PIO: - ret = ide_has_dma ? 3 : 0; - break; - case TYPE_SDMA: - default: - ret = -1; - break; - case TYPE_MDMA: - ret = ide_has_dma ? 1 : -1; - break; - case TYPE_UDMA: - ret = ide_has_dma ? 5 : -1; - break; + switch (type) { + case TYPE_PIO: + ret = ide_has_dma ? 3 : 0; + break; + case TYPE_SDMA: + default: + ret = -1; + break; + case TYPE_MDMA: + ret = ide_has_dma ? 1 : -1; + break; + case TYPE_UDMA: + ret = ide_has_dma ? 5 : -1; + break; } return ret; } - static int mo_get_timings(int ide_has_dma, int type) { int ret; - switch(type) { - case TIMINGS_DMA: - ret = ide_has_dma ? 0x96 : 0; - break; - case TIMINGS_PIO: - ret = ide_has_dma ? 0xb4 : 0; - break; - case TIMINGS_PIO_FC: - ret = ide_has_dma ? 0xb4 : 0; - break; - default: - ret = 0; - break; + switch (type) { + case TIMINGS_DMA: + ret = ide_has_dma ? 0x96 : 0; + break; + case TIMINGS_PIO: + ret = ide_has_dma ? 0xb4 : 0; + break; + case TIMINGS_PIO_FC: + ret = ide_has_dma ? 0xb4 : 0; + break; + default: + ret = 0; + break; } return ret; @@ -2073,166 +2018,162 @@ mo_do_identify(ide_t *ide, int ide_has_dma) { char model[40]; - mo_t* mo = (mo_t*) ide->sc; + mo_t *mo = (mo_t *) ide->sc; memset(model, 0, 40); if (mo_drives[mo->id].type > 0) { - snprintf(model, 40, "%s %s", mo_drive_types[mo_drives[mo->id].type].vendor, mo_drive_types[mo_drives[mo->id].type].model); - ide_padstr((char *) (ide->buffer + 23), mo_drive_types[mo_drives[mo->id].type].revision, 8); /* Firmware */ - ide_padstr((char *) (ide->buffer + 27), model, 40); /* Model */ + snprintf(model, 40, "%s %s", mo_drive_types[mo_drives[mo->id].type].vendor, mo_drive_types[mo_drives[mo->id].type].model); + ide_padstr((char *) (ide->buffer + 23), mo_drive_types[mo_drives[mo->id].type].revision, 8); /* Firmware */ + ide_padstr((char *) (ide->buffer + 27), model, 40); /* Model */ } else { - snprintf(model, 40, "%s %s%02i", EMU_NAME, "86B_MO", mo->id); - ide_padstr((char *) (ide->buffer + 23), EMU_VERSION_EX, 8); /* Firmware */ - ide_padstr((char *) (ide->buffer + 27), model, 40); /* Model */ + snprintf(model, 40, "%s %s%02i", EMU_NAME, "86B_MO", mo->id); + ide_padstr((char *) (ide->buffer + 23), EMU_VERSION_EX, 8); /* Firmware */ + ide_padstr((char *) (ide->buffer + 27), model, 40); /* Model */ } if (ide_has_dma) { - ide->buffer[80] = 0x70; /*Supported ATA versions : ATA/ATAPI-4 ATA/ATAPI-6*/ - ide->buffer[81] = 0x19; /*Maximum ATA revision supported : ATA/ATAPI-6 T13 1410D revision 3a*/ + ide->buffer[80] = 0x70; /*Supported ATA versions : ATA/ATAPI-4 ATA/ATAPI-6*/ + ide->buffer[81] = 0x19; /*Maximum ATA revision supported : ATA/ATAPI-6 T13 1410D revision 3a*/ } } - static void mo_identify(ide_t *ide, int ide_has_dma) { - ide->buffer[0] = 0x8000 | (0 << 8) | 0x80 | (1 << 5); /* ATAPI device, direct-access device, removable media, interrupt DRQ */ - ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */ - ide->buffer[49] = 0x200; /* LBA supported */ - ide->buffer[126] = 0xfffe; /* Interpret zero byte count limit as maximum length */ + ide->buffer[0] = 0x8000 | (0 << 8) | 0x80 | (1 << 5); /* ATAPI device, direct-access device, removable media, interrupt DRQ */ + ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */ + ide->buffer[49] = 0x200; /* LBA supported */ + ide->buffer[126] = 0xfffe; /* Interpret zero byte count limit as maximum length */ mo_do_identify(ide, ide_has_dma); } - static void mo_drive_reset(int c) { - mo_t *dev; + mo_t *dev; scsi_device_t *sd; - ide_t *id; - uint8_t scsi_bus = (mo_drives[c].scsi_device_id >> 4) & 0x0f; - uint8_t scsi_id = mo_drives[c].scsi_device_id & 0x0f; + ide_t *id; + uint8_t scsi_bus = (mo_drives[c].scsi_device_id >> 4) & 0x0f; + uint8_t scsi_id = mo_drives[c].scsi_device_id & 0x0f; if (!mo_drives[c].priv) { - mo_drives[c].priv = (mo_t *) malloc(sizeof(mo_t)); - memset(mo_drives[c].priv, 0, sizeof(mo_t)); + mo_drives[c].priv = (mo_t *) malloc(sizeof(mo_t)); + memset(mo_drives[c].priv, 0, sizeof(mo_t)); } dev = (mo_t *) mo_drives[c].priv; - dev->id = c; + dev->id = c; dev->cur_lun = SCSI_LUN_USE_CDB; if (mo_drives[c].bus_type == MO_BUS_SCSI) { - /* SCSI MO, attach to the SCSI bus. */ - sd = &scsi_devices[scsi_bus][scsi_id]; + /* SCSI MO, attach to the SCSI bus. */ + sd = &scsi_devices[scsi_bus][scsi_id]; - sd->sc = (scsi_common_t *) dev; - sd->command = mo_command; - sd->request_sense = mo_request_sense_for_scsi; - sd->reset = mo_reset; - sd->phase_data_out = mo_phase_data_out; - sd->command_stop = mo_command_stop; - sd->type = SCSI_REMOVABLE_DISK; + sd->sc = (scsi_common_t *) dev; + sd->command = mo_command; + sd->request_sense = mo_request_sense_for_scsi; + sd->reset = mo_reset; + sd->phase_data_out = mo_phase_data_out; + sd->command_stop = mo_command_stop; + sd->type = SCSI_REMOVABLE_DISK; } else if (mo_drives[c].bus_type == MO_BUS_ATAPI) { - /* ATAPI MO, attach to the IDE bus. */ - id = ide_get_drive(mo_drives[c].ide_channel); - /* If the IDE channel is initialized, we attach to it, - otherwise, we do nothing - it's going to be a drive - that's not attached to anything. */ - if (id) { - id->sc = (scsi_common_t *) dev; - id->get_max = mo_get_max; - id->get_timings = mo_get_timings; - id->identify = mo_identify; - id->stop = NULL; - id->packet_command = mo_command; - id->device_reset = mo_reset; - id->phase_data_out = mo_phase_data_out; - id->command_stop = mo_command_stop; - id->bus_master_error = mo_bus_master_error; - id->interrupt_drq = 1; + /* ATAPI MO, attach to the IDE bus. */ + id = ide_get_drive(mo_drives[c].ide_channel); + /* If the IDE channel is initialized, we attach to it, + otherwise, we do nothing - it's going to be a drive + that's not attached to anything. */ + if (id) { + id->sc = (scsi_common_t *) dev; + id->get_max = mo_get_max; + id->get_timings = mo_get_timings; + id->identify = mo_identify; + id->stop = NULL; + id->packet_command = mo_command; + id->device_reset = mo_reset; + id->phase_data_out = mo_phase_data_out; + id->command_stop = mo_command_stop; + id->bus_master_error = mo_bus_master_error; + id->interrupt_drq = 1; - ide_atapi_attach(id); - } + ide_atapi_attach(id); + } } } - void mo_hard_reset(void) { - mo_t *dev; - int c; + mo_t *dev; + int c; uint8_t scsi_id, scsi_bus; for (c = 0; c < MO_NUM; c++) { - if ((mo_drives[c].bus_type == MO_BUS_ATAPI) || (mo_drives[c].bus_type == MO_BUS_SCSI)) { - mo_log("MO hard_reset drive=%d\n", c); + if ((mo_drives[c].bus_type == MO_BUS_ATAPI) || (mo_drives[c].bus_type == MO_BUS_SCSI)) { + mo_log("MO hard_reset drive=%d\n", c); - if (mo_drives[c].bus_type == MO_BUS_SCSI) { - scsi_bus = (mo_drives[c].scsi_device_id >> 4) & 0x0f; - scsi_id = mo_drives[c].scsi_device_id & 0x0f; + if (mo_drives[c].bus_type == MO_BUS_SCSI) { + scsi_bus = (mo_drives[c].scsi_device_id >> 4) & 0x0f; + scsi_id = mo_drives[c].scsi_device_id & 0x0f; - /* Make sure to ignore any SCSI MO drive that has an out of range SCSI Bus. */ - if (scsi_bus >= SCSI_BUS_MAX) - continue; + /* Make sure to ignore any SCSI MO drive that has an out of range SCSI Bus. */ + if (scsi_bus >= SCSI_BUS_MAX) + continue; - /* Make sure to ignore any SCSI MO drive that has an out of range ID. */ - if (scsi_id >= SCSI_ID_MAX) - continue; - } + /* Make sure to ignore any SCSI MO drive that has an out of range ID. */ + if (scsi_id >= SCSI_ID_MAX) + continue; + } - /* Make sure to ignore any ATAPI MO drive that has an out of range IDE channel. */ - if ((mo_drives[c].bus_type == MO_BUS_ATAPI) && (mo_drives[c].ide_channel > 7)) - continue; + /* Make sure to ignore any ATAPI MO drive that has an out of range IDE channel. */ + if ((mo_drives[c].bus_type == MO_BUS_ATAPI) && (mo_drives[c].ide_channel > 7)) + continue; - mo_drive_reset(c); + mo_drive_reset(c); - dev = (mo_t *) mo_drives[c].priv; + dev = (mo_t *) mo_drives[c].priv; - dev->id = c; - dev->drv = &mo_drives[c]; + dev->id = c; + dev->drv = &mo_drives[c]; - mo_init(dev); + mo_init(dev); - if (strlen(mo_drives[c].image_path)) - mo_load(dev, mo_drives[c].image_path); + if (strlen(mo_drives[c].image_path)) + mo_load(dev, mo_drives[c].image_path); - mo_mode_sense_load(dev); + mo_mode_sense_load(dev); - if (mo_drives[c].bus_type == MO_BUS_SCSI) - mo_log("SCSI MO drive %i attached to SCSI ID %i\n", c, mo_drives[c].scsi_device_id); - else if (mo_drives[c].bus_type == MO_BUS_ATAPI) - mo_log("ATAPI MO drive %i attached to IDE channel %i\n", c, mo_drives[c].ide_channel); - } + if (mo_drives[c].bus_type == MO_BUS_SCSI) + mo_log("SCSI MO drive %i attached to SCSI ID %i\n", c, mo_drives[c].scsi_device_id); + else if (mo_drives[c].bus_type == MO_BUS_ATAPI) + mo_log("ATAPI MO drive %i attached to IDE channel %i\n", c, mo_drives[c].ide_channel); + } } } - void mo_close(void) { - mo_t *dev; - int c; + mo_t *dev; + int c; uint8_t scsi_id, scsi_bus; for (c = 0; c < MO_NUM; c++) { - if (mo_drives[c].bus_type == MO_BUS_SCSI) { - scsi_bus = (mo_drives[c].scsi_device_id >> 4) & 0x0f; - scsi_id = mo_drives[c].scsi_device_id & 0x0f; + if (mo_drives[c].bus_type == MO_BUS_SCSI) { + scsi_bus = (mo_drives[c].scsi_device_id >> 4) & 0x0f; + scsi_id = mo_drives[c].scsi_device_id & 0x0f; - memset(&scsi_devices[scsi_bus][scsi_id], 0x00, sizeof(scsi_device_t)); - } + memset(&scsi_devices[scsi_bus][scsi_id], 0x00, sizeof(scsi_device_t)); + } - dev = (mo_t *) mo_drives[c].priv; + dev = (mo_t *) mo_drives[c].priv; - if (dev) { - mo_disk_unload(dev); + if (dev) { + mo_disk_unload(dev); - free(dev); - mo_drives[c].priv = NULL; - } + free(dev); + mo_drives[c].priv = NULL; + } } } diff --git a/src/disk/zip.c b/src/disk/zip.c index a4e124fee..4c2492c1b 100644 --- a/src/disk/zip.c +++ b/src/disk/zip.c @@ -36,74 +36,71 @@ #include <86box/hdc_ide.h> #include <86box/zip.h> - -zip_drive_t zip_drives[ZIP_NUM]; - +zip_drive_t zip_drives[ZIP_NUM]; /* Table of all SCSI commands and their flags, needed for the new disc change / not ready handler. */ -const uint8_t zip_command_flags[0x100] = -{ - IMPLEMENTED | CHECK_READY | NONDATA, /* 0x00 */ - IMPLEMENTED | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x01 */ +const uint8_t zip_command_flags[0x100] = { + IMPLEMENTED | CHECK_READY | NONDATA, /* 0x00 */ + IMPLEMENTED | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x01 */ 0, - IMPLEMENTED | ALLOW_UA, /* 0x03 */ - IMPLEMENTED | CHECK_READY | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x04 */ + IMPLEMENTED | ALLOW_UA, /* 0x03 */ + IMPLEMENTED | CHECK_READY | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x04 */ 0, - IMPLEMENTED, /* 0x06 */ + IMPLEMENTED, /* 0x06 */ 0, - IMPLEMENTED | CHECK_READY, /* 0x08 */ + IMPLEMENTED | CHECK_READY, /* 0x08 */ 0, - IMPLEMENTED | CHECK_READY, /* 0x0A */ - IMPLEMENTED | CHECK_READY | NONDATA, /* 0x0B */ - IMPLEMENTED, /* 0x0C */ - IMPLEMENTED | ATAPI_ONLY, /* 0x0D */ + IMPLEMENTED | CHECK_READY, /* 0x0A */ + IMPLEMENTED | CHECK_READY | NONDATA, /* 0x0B */ + IMPLEMENTED, /* 0x0C */ + IMPLEMENTED | ATAPI_ONLY, /* 0x0D */ 0, 0, 0, 0, - IMPLEMENTED | ALLOW_UA, /* 0x12 */ - IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x13 */ + IMPLEMENTED | ALLOW_UA, /* 0x12 */ + IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x13 */ 0, - IMPLEMENTED, /* 0x15 */ - IMPLEMENTED | SCSI_ONLY, /* 0x16 */ - IMPLEMENTED | SCSI_ONLY, /* 0x17 */ + IMPLEMENTED, /* 0x15 */ + IMPLEMENTED | SCSI_ONLY, /* 0x16 */ + IMPLEMENTED | SCSI_ONLY, /* 0x17 */ 0, 0, - IMPLEMENTED, /* 0x1A */ - IMPLEMENTED | CHECK_READY, /* 0x1B */ + IMPLEMENTED, /* 0x1A */ + IMPLEMENTED | CHECK_READY, /* 0x1B */ 0, - IMPLEMENTED, /* 0x1D */ - IMPLEMENTED | CHECK_READY, /* 0x1E */ + IMPLEMENTED, /* 0x1D */ + IMPLEMENTED | CHECK_READY, /* 0x1E */ 0, 0, 0, 0, - IMPLEMENTED | ATAPI_ONLY, /* 0x23 */ + IMPLEMENTED | ATAPI_ONLY, /* 0x23 */ 0, - IMPLEMENTED | CHECK_READY, /* 0x25 */ + IMPLEMENTED | CHECK_READY, /* 0x25 */ 0, 0, - IMPLEMENTED | CHECK_READY, /* 0x28 */ + IMPLEMENTED | CHECK_READY, /* 0x28 */ 0, - IMPLEMENTED | CHECK_READY, /* 0x2A */ - IMPLEMENTED | CHECK_READY | NONDATA, /* 0x2B */ + IMPLEMENTED | CHECK_READY, /* 0x2A */ + IMPLEMENTED | CHECK_READY | NONDATA, /* 0x2B */ 0, 0, - IMPLEMENTED | CHECK_READY, /* 0x2E */ - IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x2F */ + IMPLEMENTED | CHECK_READY, /* 0x2E */ + IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x2F */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - IMPLEMENTED | CHECK_READY, /* 0x41 */ + IMPLEMENTED | CHECK_READY, /* 0x41 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - IMPLEMENTED, /* 0x55 */ + IMPLEMENTED, /* 0x55 */ 0, 0, 0, 0, - IMPLEMENTED, /* 0x5A */ + IMPLEMENTED, /* 0x5A */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - IMPLEMENTED | CHECK_READY, /* 0xA8 */ + IMPLEMENTED | CHECK_READY, /* 0xA8 */ 0, - IMPLEMENTED | CHECK_READY, /* 0xAA */ + IMPLEMENTED | CHECK_READY, /* 0xAA */ 0, 0, 0, - IMPLEMENTED | CHECK_READY, /* 0xAE */ - IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0xAF */ + IMPLEMENTED | CHECK_READY, /* 0xAE */ + IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0xAF */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - IMPLEMENTED, /* 0xBD */ + IMPLEMENTED, /* 0xBD */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -111,18 +108,11 @@ const uint8_t zip_command_flags[0x100] = 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; -static uint64_t zip_mode_sense_page_flags = (GPMODEP_R_W_ERROR_PAGE | - GPMODEP_DISCONNECT_PAGE | - GPMODEP_IOMEGA_PAGE | - GPMODEP_ALL_PAGES); -static uint64_t zip_250_mode_sense_page_flags = (GPMODEP_R_W_ERROR_PAGE | - GPMODEP_FLEXIBLE_DISK_PAGE | - GPMODEP_CACHING_PAGE | - GPMODEP_IOMEGA_PAGE | - GPMODEP_ALL_PAGES); - +static uint64_t zip_mode_sense_page_flags = (GPMODEP_R_W_ERROR_PAGE | GPMODEP_DISCONNECT_PAGE | GPMODEP_IOMEGA_PAGE | GPMODEP_ALL_PAGES); +static uint64_t zip_250_mode_sense_page_flags = (GPMODEP_R_W_ERROR_PAGE | GPMODEP_FLEXIBLE_DISK_PAGE | GPMODEP_CACHING_PAGE | GPMODEP_IOMEGA_PAGE | GPMODEP_ALL_PAGES); static const mode_sense_pages_t zip_mode_sense_pages_default = + // clang-format off { { { 0, 0 }, { GPMODE_R_W_ERROR_PAGE, 0x0a, 0xc8, 22, 0, 0, 0, 0, 90, 0, 0x50, 0x20 }, @@ -173,8 +163,10 @@ static const mode_sense_pages_t zip_mode_sense_pages_default = { 0, 0 }, { GPMODE_IOMEGA_PAGE, 0x04, 0x5c, 0x0f, 0xff, 0x0f } } }; +// clang-format on static const mode_sense_pages_t zip_250_mode_sense_pages_default = + // clang-format off { { { 0, 0 }, { GPMODE_R_W_ERROR_PAGE, 0x06, 0xc8, 0x64, 0, 0, 0, 0 }, @@ -224,8 +216,10 @@ static const mode_sense_pages_t zip_250_mode_sense_pages_default = { 0, 0 }, { GPMODE_IOMEGA_PAGE, 0x04, 0x5c, 0x0f, 0x3c, 0x0f } } }; +// clang-format on static const mode_sense_pages_t zip_mode_sense_pages_default_scsi = + // clang-format off { { { 0, 0 }, { GPMODE_R_W_ERROR_PAGE, 0x0a, 0xc8, 22, 0, 0, 0, 0, 90, 0, 0x50, 0x20 }, @@ -276,8 +270,10 @@ static const mode_sense_pages_t zip_mode_sense_pages_default_scsi = { 0, 0 }, { GPMODE_IOMEGA_PAGE, 0x04, 0x5c, 0x0f, 0xff, 0x0f } } }; +// clang-format on static const mode_sense_pages_t zip_250_mode_sense_pages_default_scsi = + // clang-format off { { { 0, 0 }, { GPMODE_R_W_ERROR_PAGE, 0x06, 0xc8, 0x64, 0, 0, 0, 0 }, @@ -328,8 +324,10 @@ static const mode_sense_pages_t zip_250_mode_sense_pages_default_scsi = { 0, 0 }, { GPMODE_IOMEGA_PAGE, 0x04, 0x5c, 0x0f, 0x3c, 0x0f } } }; +// clang-format on static const mode_sense_pages_t zip_mode_sense_pages_changeable = + // clang-format off { { { 0, 0 }, @@ -381,8 +379,10 @@ static const mode_sense_pages_t zip_mode_sense_pages_changeable = { 0, 0 }, { GPMODE_IOMEGA_PAGE, 0x04, 0xff, 0xff, 0xff, 0xff } } }; +// clang-format on static const mode_sense_pages_t zip_250_mode_sense_pages_changeable = + // clang-format off { { { 0, 0 }, { GPMODE_R_W_ERROR_PAGE, 0x06, 0xFF, 0xFF, 0, 0, 0, 0 }, @@ -433,57 +433,52 @@ static const mode_sense_pages_t zip_250_mode_sense_pages_changeable = { 0, 0 }, { GPMODE_IOMEGA_PAGE, 0x04, 0xff, 0xff, 0xff, 0xff } } }; +// clang-format on - -static void zip_command_complete(zip_t *dev); -static void zip_init(zip_t *dev); - +static void zip_command_complete(zip_t *dev); +static void zip_init(zip_t *dev); #ifdef ENABLE_ZIP_LOG int zip_do_log = ENABLE_ZIP_LOG; - static void zip_log(const char *fmt, ...) { va_list ap; if (zip_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define zip_log(fmt, ...) +# define zip_log(fmt, ...) #endif - int find_zip_for_channel(uint8_t channel) { uint8_t i = 0; for (i = 0; i < ZIP_NUM; i++) { - if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && (zip_drives[i].ide_channel == channel)) - return i; + if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && (zip_drives[i].ide_channel == channel)) + return i; } return 0xff; } - static int zip_load_abort(zip_t *dev) { if (dev->drv->f) - fclose(dev->drv->f); - dev->drv->f = NULL; + fclose(dev->drv->f); + dev->drv->f = NULL; dev->drv->medium_size = 0; - zip_eject(dev->id); /* Make sure the host OS knows we've rejected (and ejected) the image. */ + zip_eject(dev->id); /* Make sure the host OS knows we've rejected (and ejected) the image. */ return 0; } - int zip_load(zip_t *dev, char *fn) { @@ -491,284 +486,271 @@ zip_load(zip_t *dev, char *fn) dev->drv->f = plat_fopen(fn, dev->drv->read_only ? "rb" : "rb+"); if (!dev->drv->f) { - if (!dev->drv->read_only) { - dev->drv->f = plat_fopen(fn, "rb"); - if (dev->drv->f) - dev->drv->read_only = 1; - else - return zip_load_abort(dev); - } else - return zip_load_abort(dev); + if (!dev->drv->read_only) { + dev->drv->f = plat_fopen(fn, "rb"); + if (dev->drv->f) + dev->drv->read_only = 1; + else + return zip_load_abort(dev); + } else + return zip_load_abort(dev); } fseek(dev->drv->f, 0, SEEK_END); size = ftell(dev->drv->f); if ((size == ((ZIP_250_SECTORS << 9) + 0x1000)) || (size == ((ZIP_SECTORS << 9) + 0x1000))) { - /* This is a ZDI image. */ - size -= 0x1000; - dev->drv->base = 0x1000; + /* This is a ZDI image. */ + size -= 0x1000; + dev->drv->base = 0x1000; } else - dev->drv->base = 0; + dev->drv->base = 0; if (dev->drv->is_250) { - if ((size != (ZIP_250_SECTORS << 9)) && (size != (ZIP_SECTORS << 9))) { - zip_log("File is incorrect size for a ZIP image\nMust be exactly %i or %i bytes\n", - ZIP_250_SECTORS << 9, ZIP_SECTORS << 9); - return zip_load_abort(dev); - } + if ((size != (ZIP_250_SECTORS << 9)) && (size != (ZIP_SECTORS << 9))) { + zip_log("File is incorrect size for a ZIP image\nMust be exactly %i or %i bytes\n", + ZIP_250_SECTORS << 9, ZIP_SECTORS << 9); + return zip_load_abort(dev); + } } else { - if (size != (ZIP_SECTORS << 9)) { - zip_log("File is incorrect size for a ZIP image\nMust be exactly %i bytes\n", - ZIP_SECTORS << 9); - return zip_load_abort(dev); - } + if (size != (ZIP_SECTORS << 9)) { + zip_log("File is incorrect size for a ZIP image\nMust be exactly %i bytes\n", + ZIP_SECTORS << 9); + return zip_load_abort(dev); + } } dev->drv->medium_size = size >> 9; if (fseek(dev->drv->f, dev->drv->base, SEEK_SET) == -1) - fatal("zip_load(): Error seeking to the beginning of the file\n"); + fatal("zip_load(): Error seeking to the beginning of the file\n"); strncpy(dev->drv->image_path, fn, sizeof(dev->drv->image_path) - 1); return 1; } - void zip_disk_reload(zip_t *dev) { int ret = 0; if (strlen(dev->drv->prev_image_path) == 0) - return; + return; else - ret = zip_load(dev, dev->drv->prev_image_path); + ret = zip_load(dev, dev->drv->prev_image_path); if (ret) - dev->unit_attention = 1; + dev->unit_attention = 1; } - void zip_disk_unload(zip_t *dev) { if (dev->drv->f) { - fclose(dev->drv->f); - dev->drv->f = NULL; + fclose(dev->drv->f); + dev->drv->f = NULL; } } - void zip_disk_close(zip_t *dev) { if (dev->drv->f) { - zip_disk_unload(dev); + zip_disk_unload(dev); - memcpy(dev->drv->prev_image_path, dev->drv->image_path, sizeof(dev->drv->prev_image_path)); - memset(dev->drv->image_path, 0, sizeof(dev->drv->image_path)); + memcpy(dev->drv->prev_image_path, dev->drv->image_path, sizeof(dev->drv->prev_image_path)); + memset(dev->drv->image_path, 0, sizeof(dev->drv->image_path)); - dev->drv->medium_size = 0; + dev->drv->medium_size = 0; } } - static void zip_set_callback(zip_t *dev) { if (dev->drv->bus_type != ZIP_BUS_SCSI) - ide_set_callback(ide_drives[dev->drv->ide_channel], dev->callback); + ide_set_callback(ide_drives[dev->drv->ide_channel], dev->callback); } - static void zip_init(zip_t *dev) { if (dev->id >= ZIP_NUM) - return; + return; dev->requested_blocks = 1; - dev->sense[0] = 0xf0; - dev->sense[7] = 10; - dev->drv->bus_mode = 0; + dev->sense[0] = 0xf0; + dev->sense[7] = 10; + dev->drv->bus_mode = 0; if (dev->drv->bus_type >= ZIP_BUS_ATAPI) - dev->drv->bus_mode |= 2; + dev->drv->bus_mode |= 2; if (dev->drv->bus_type < ZIP_BUS_SCSI) - dev->drv->bus_mode |= 1; + dev->drv->bus_mode |= 1; zip_log("ZIP %i: Bus type %i, bus mode %i\n", dev->id, dev->drv->bus_type, dev->drv->bus_mode); if (dev->drv->bus_type < ZIP_BUS_SCSI) { - dev->phase = 1; - dev->request_length = 0xEB14; + dev->phase = 1; + dev->request_length = 0xEB14; } - dev->status = READY_STAT | DSC_STAT; - dev->pos = 0; + dev->status = READY_STAT | DSC_STAT; + dev->pos = 0; dev->packet_status = PHASE_NONE; zip_sense_key = zip_asc = zip_ascq = dev->unit_attention = 0; } - static int zip_supports_pio(zip_t *dev) { return (dev->drv->bus_mode & 1); } - static int zip_supports_dma(zip_t *dev) { return (dev->drv->bus_mode & 2); } - /* Returns: 0 for none, 1 for PIO, 2 for DMA. */ static int zip_current_mode(zip_t *dev) { if (!zip_supports_pio(dev) && !zip_supports_dma(dev)) - return 0; + return 0; if (zip_supports_pio(dev) && !zip_supports_dma(dev)) { - zip_log("ZIP %i: Drive does not support DMA, setting to PIO\n", dev->id); - return 1; + zip_log("ZIP %i: Drive does not support DMA, setting to PIO\n", dev->id); + return 1; } if (!zip_supports_pio(dev) && zip_supports_dma(dev)) - return 2; + return 2; if (zip_supports_pio(dev) && zip_supports_dma(dev)) { - zip_log("ZIP %i: Drive supports both, setting to %s\n", dev->id, (dev->features & 1) ? "DMA" : "PIO"); - return (dev->features & 1) ? 2 : 1; + zip_log("ZIP %i: Drive supports both, setting to %s\n", dev->id, (dev->features & 1) ? "DMA" : "PIO"); + return (dev->features & 1) ? 2 : 1; } return 0; } - /* Translates ATAPI phase (DRQ, I/O, C/D) to SCSI phase (MSG, C/D, I/O). */ int zip_atapi_phase_to_scsi(zip_t *dev) { if (dev->status & 8) { - switch (dev->phase & 3) { - case 0: - return 0; - case 1: - return 2; - case 2: - return 1; - case 3: - return 7; - } + switch (dev->phase & 3) { + case 0: + return 0; + case 1: + return 2; + case 2: + return 1; + case 3: + return 7; + } } else { - if ((dev->phase & 3) == 3) - return 3; - else - return 4; + if ((dev->phase & 3) == 3) + return 3; + else + return 4; } return 0; } - static void zip_mode_sense_load(zip_t *dev) { FILE *f; - char file_name[512]; + char file_name[512]; memset(&dev->ms_pages_saved, 0, sizeof(mode_sense_pages_t)); if (dev->drv->is_250) { - if (zip_drives[dev->id].bus_type == ZIP_BUS_SCSI) - memcpy(&dev->ms_pages_saved, &zip_250_mode_sense_pages_default_scsi, sizeof(mode_sense_pages_t)); - else - memcpy(&dev->ms_pages_saved, &zip_250_mode_sense_pages_default, sizeof(mode_sense_pages_t)); + if (zip_drives[dev->id].bus_type == ZIP_BUS_SCSI) + memcpy(&dev->ms_pages_saved, &zip_250_mode_sense_pages_default_scsi, sizeof(mode_sense_pages_t)); + else + memcpy(&dev->ms_pages_saved, &zip_250_mode_sense_pages_default, sizeof(mode_sense_pages_t)); } else { - if (zip_drives[dev->id].bus_type == ZIP_BUS_SCSI) - memcpy(&dev->ms_pages_saved, &zip_mode_sense_pages_default_scsi, sizeof(mode_sense_pages_t)); - else - memcpy(&dev->ms_pages_saved, &zip_mode_sense_pages_default, sizeof(mode_sense_pages_t)); + if (zip_drives[dev->id].bus_type == ZIP_BUS_SCSI) + memcpy(&dev->ms_pages_saved, &zip_mode_sense_pages_default_scsi, sizeof(mode_sense_pages_t)); + else + memcpy(&dev->ms_pages_saved, &zip_mode_sense_pages_default, sizeof(mode_sense_pages_t)); } memset(file_name, 0, 512); if (dev->drv->bus_type == ZIP_BUS_SCSI) - sprintf(file_name, "scsi_zip_%02i_mode_sense_bin", dev->id); + sprintf(file_name, "scsi_zip_%02i_mode_sense_bin", dev->id); else - sprintf(file_name, "zip_%02i_mode_sense_bin", dev->id); + sprintf(file_name, "zip_%02i_mode_sense_bin", dev->id); f = plat_fopen(nvr_path(file_name), "rb"); if (f) { - /* Nothing to read, not used by ZIP. */ - fclose(f); + /* Nothing to read, not used by ZIP. */ + fclose(f); } } - static void zip_mode_sense_save(zip_t *dev) { FILE *f; - char file_name[512]; + char file_name[512]; memset(file_name, 0, 512); if (dev->drv->bus_type == ZIP_BUS_SCSI) - sprintf(file_name, "scsi_zip_%02i_mode_sense_bin", dev->id); + sprintf(file_name, "scsi_zip_%02i_mode_sense_bin", dev->id); else - sprintf(file_name, "zip_%02i_mode_sense_bin", dev->id); + sprintf(file_name, "zip_%02i_mode_sense_bin", dev->id); f = plat_fopen(nvr_path(file_name), "wb"); if (f) { - /* Nothing to write, not used by ZIP. */ - fclose(f); + /* Nothing to write, not used by ZIP. */ + fclose(f); } } - /*SCSI Mode Sense 6/10*/ static uint8_t zip_mode_sense_read(zip_t *dev, uint8_t page_control, uint8_t page, uint8_t pos) { switch (page_control) { - case 0: - case 3: - if (dev->drv->is_250 && (page == 5) && (pos == 9) && (dev->drv->medium_size == ZIP_SECTORS)) - return 0x60; - return dev->ms_pages_saved.pages[page][pos]; - break; - case 1: - if (dev->drv->is_250) - return zip_250_mode_sense_pages_changeable.pages[page][pos]; - else - return zip_mode_sense_pages_changeable.pages[page][pos]; - break; - case 2: - if (dev->drv->is_250) { - if ((page == 5) && (pos == 9) && (dev->drv->medium_size == ZIP_SECTORS)) - return 0x60; - if (dev->drv->bus_type == ZIP_BUS_SCSI) - return zip_250_mode_sense_pages_default_scsi.pages[page][pos]; - else - return zip_250_mode_sense_pages_default.pages[page][pos]; - } else { - if (dev->drv->bus_type == ZIP_BUS_SCSI) - return zip_mode_sense_pages_default_scsi.pages[page][pos]; - else - return zip_mode_sense_pages_default.pages[page][pos]; - } - break; + case 0: + case 3: + if (dev->drv->is_250 && (page == 5) && (pos == 9) && (dev->drv->medium_size == ZIP_SECTORS)) + return 0x60; + return dev->ms_pages_saved.pages[page][pos]; + break; + case 1: + if (dev->drv->is_250) + return zip_250_mode_sense_pages_changeable.pages[page][pos]; + else + return zip_mode_sense_pages_changeable.pages[page][pos]; + break; + case 2: + if (dev->drv->is_250) { + if ((page == 5) && (pos == 9) && (dev->drv->medium_size == ZIP_SECTORS)) + return 0x60; + if (dev->drv->bus_type == ZIP_BUS_SCSI) + return zip_250_mode_sense_pages_default_scsi.pages[page][pos]; + else + return zip_250_mode_sense_pages_default.pages[page][pos]; + } else { + if (dev->drv->bus_type == ZIP_BUS_SCSI) + return zip_mode_sense_pages_default_scsi.pages[page][pos]; + else + return zip_mode_sense_pages_default.pages[page][pos]; + } + break; } return 0; } - static uint32_t zip_mode_sense(zip_t *dev, uint8_t *buf, uint32_t pos, uint8_t page, uint8_t block_descriptor_len) { uint64_t pf; - uint8_t page_control = (page >> 6) & 3; + uint8_t page_control = (page >> 6) & 3; if (dev->drv->is_250) - pf = zip_250_mode_sense_page_flags; + pf = zip_250_mode_sense_page_flags; else - pf = zip_mode_sense_page_flags; + pf = zip_mode_sense_page_flags; int i = 0; int j = 0; @@ -778,33 +760,32 @@ zip_mode_sense(zip_t *dev, uint8_t *buf, uint32_t pos, uint8_t page, uint8_t blo page &= 0x3f; if (block_descriptor_len) { - buf[pos++] = ((dev->drv->medium_size >> 24) & 0xff); - buf[pos++] = ((dev->drv->medium_size >> 16) & 0xff); - buf[pos++] = ((dev->drv->medium_size >> 8) & 0xff); - buf[pos++] = ( dev->drv->medium_size & 0xff); - buf[pos++] = 0; /* Reserved. */ - buf[pos++] = 0; /* Block length (0x200 = 512 bytes). */ - buf[pos++] = 2; - buf[pos++] = 0; + buf[pos++] = ((dev->drv->medium_size >> 24) & 0xff); + buf[pos++] = ((dev->drv->medium_size >> 16) & 0xff); + buf[pos++] = ((dev->drv->medium_size >> 8) & 0xff); + buf[pos++] = (dev->drv->medium_size & 0xff); + buf[pos++] = 0; /* Reserved. */ + buf[pos++] = 0; /* Block length (0x200 = 512 bytes). */ + buf[pos++] = 2; + buf[pos++] = 0; } for (i = 0; i < 0x40; i++) { if ((page == GPMODE_ALL_PAGES) || (page == i)) { - if (pf & (1LL << ((uint64_t) page))) { - buf[pos++] = zip_mode_sense_read(dev, page_control, i, 0); - msplen = zip_mode_sense_read(dev, page_control, i, 1); - buf[pos++] = msplen; - zip_log("ZIP %i: MODE SENSE: Page [%02X] length %i\n", dev->id, i, msplen); - for (j = 0; j < msplen; j++) - buf[pos++] = zip_mode_sense_read(dev, page_control, i, 2 + j); - } - } + if (pf & (1LL << ((uint64_t) page))) { + buf[pos++] = zip_mode_sense_read(dev, page_control, i, 0); + msplen = zip_mode_sense_read(dev, page_control, i, 1); + buf[pos++] = msplen; + zip_log("ZIP %i: MODE SENSE: Page [%02X] length %i\n", dev->id, i, msplen); + for (j = 0; j < msplen; j++) + buf[pos++] = zip_mode_sense_read(dev, page_control, i, 2 + j); + } + } } return pos; } - static void zip_update_request_length(zip_t *dev, int len, int block_len) { @@ -814,99 +795,96 @@ zip_update_request_length(zip_t *dev, int len, int block_len) /* For media access commands, make sure the requested DRQ length matches the block length. */ switch (dev->current_cdb[0]) { - case 0x08: - case 0x0a: - case 0x28: - case 0x2a: - case 0xa8: - case 0xaa: - /* Round it to the nearest 2048 bytes. */ - dev->max_transfer_len = (dev->max_transfer_len >> 9) << 9; + case 0x08: + case 0x0a: + case 0x28: + case 0x2a: + case 0xa8: + case 0xaa: + /* Round it to the nearest 2048 bytes. */ + dev->max_transfer_len = (dev->max_transfer_len >> 9) << 9; - /* Make sure total length is not bigger than sum of the lengths of - all the requested blocks. */ - bt = (dev->requested_blocks * block_len); - if (len > bt) - len = bt; + /* Make sure total length is not bigger than sum of the lengths of + all the requested blocks. */ + bt = (dev->requested_blocks * block_len); + if (len > bt) + len = bt; - min_len = block_len; + min_len = block_len; - if (len <= block_len) { - /* Total length is less or equal to block length. */ - if (dev->max_transfer_len < block_len) { - /* Transfer a minimum of (block size) bytes. */ - dev->max_transfer_len = block_len; - dev->packet_len = block_len; - break; - } - } - /*FALLTHROUGH*/ - default: - dev->packet_len = len; - break; + if (len <= block_len) { + /* Total length is less or equal to block length. */ + if (dev->max_transfer_len < block_len) { + /* Transfer a minimum of (block size) bytes. */ + dev->max_transfer_len = block_len; + dev->packet_len = block_len; + break; + } + } + /*FALLTHROUGH*/ + default: + dev->packet_len = len; + break; } /* If the DRQ length is odd, and the total remaining length is bigger, make sure it's even. */ if ((dev->max_transfer_len & 1) && (dev->max_transfer_len < len)) - dev->max_transfer_len &= 0xfffe; + dev->max_transfer_len &= 0xfffe; /* If the DRQ length is smaller or equal in size to the total remaining length, set it to that. */ if (!dev->max_transfer_len) - dev->max_transfer_len = 65534; + dev->max_transfer_len = 65534; if ((len <= dev->max_transfer_len) && (len >= min_len)) - dev->request_length = dev->max_transfer_len = len; + dev->request_length = dev->max_transfer_len = len; else if (len > dev->max_transfer_len) - dev->request_length = dev->max_transfer_len; + dev->request_length = dev->max_transfer_len; return; } - static double zip_bus_speed(zip_t *dev) { double ret = -1.0; if (dev && dev->drv && (dev->drv->bus_type == ZIP_BUS_SCSI)) { - dev->callback = -1.0; /* Speed depends on SCSI controller */ - return 0.0; + dev->callback = -1.0; /* Speed depends on SCSI controller */ + return 0.0; } else { - if (dev && dev->drv) - ret = ide_atapi_get_period(dev->drv->ide_channel); - if (ret == -1.0) { - if (dev) - dev->callback = -1.0; - return 0.0; - } else - return ret * 1000000.0; + if (dev && dev->drv) + ret = ide_atapi_get_period(dev->drv->ide_channel); + if (ret == -1.0) { + if (dev) + dev->callback = -1.0; + return 0.0; + } else + return ret * 1000000.0; } } - static void zip_command_common(zip_t *dev) { double bytes_per_second, period; dev->status = BUSY_STAT; - dev->phase = 1; - dev->pos = 0; + dev->phase = 1; + dev->pos = 0; if (dev->packet_status == PHASE_COMPLETE) - dev->callback = 0.0; + dev->callback = 0.0; else { - if (dev->drv->bus_type == ZIP_BUS_SCSI) { - dev->callback = -1.0; /* Speed depends on SCSI controller */ - return; - } else - bytes_per_second = zip_bus_speed(dev); + if (dev->drv->bus_type == ZIP_BUS_SCSI) { + dev->callback = -1.0; /* Speed depends on SCSI controller */ + return; + } else + bytes_per_second = zip_bus_speed(dev); - period = 1000000.0 / bytes_per_second; - dev->callback = period * (double) (dev->packet_len); + period = 1000000.0 / bytes_per_second; + dev->callback = period * (double) (dev->packet_len); } zip_set_callback(dev); } - static void zip_command_complete(zip_t *dev) { @@ -915,7 +893,6 @@ zip_command_complete(zip_t *dev) zip_command_common(dev); } - static void zip_command_read(zip_t *dev) { @@ -923,7 +900,6 @@ zip_command_read(zip_t *dev) zip_command_common(dev); } - static void zip_command_read_dma(zip_t *dev) { @@ -931,7 +907,6 @@ zip_command_read_dma(zip_t *dev) zip_command_common(dev); } - static void zip_command_write(zip_t *dev) { @@ -939,7 +914,6 @@ zip_command_write(zip_t *dev) zip_command_common(dev); } - static void zip_command_write_dma(zip_t *dev) { @@ -947,7 +921,6 @@ zip_command_write_dma(zip_t *dev) zip_command_common(dev); } - /* id = Current ZIP device ID; len = Total transfer length; block_len = Length of a single block (why does it matter?!); @@ -957,116 +930,109 @@ static void zip_data_command_finish(zip_t *dev, int len, int block_len, int alloc_len, int direction) { zip_log("ZIP %i: Finishing command (%02X): %i, %i, %i, %i, %i\n", - dev->id, dev->current_cdb[0], len, block_len, alloc_len, direction, dev->request_length); + dev->id, dev->current_cdb[0], len, block_len, alloc_len, direction, dev->request_length); dev->pos = 0; if (alloc_len >= 0) { - if (alloc_len < len) - len = alloc_len; + if (alloc_len < len) + len = alloc_len; } if ((len == 0) || (zip_current_mode(dev) == 0)) { - if (dev->drv->bus_type != ZIP_BUS_SCSI) - dev->packet_len = 0; + if (dev->drv->bus_type != ZIP_BUS_SCSI) + dev->packet_len = 0; - zip_command_complete(dev); + zip_command_complete(dev); } else { - if (zip_current_mode(dev) == 2) { - if (dev->drv->bus_type != ZIP_BUS_SCSI) - dev->packet_len = alloc_len; + if (zip_current_mode(dev) == 2) { + if (dev->drv->bus_type != ZIP_BUS_SCSI) + dev->packet_len = alloc_len; - if (direction == 0) - zip_command_read_dma(dev); - else - zip_command_write_dma(dev); - } else { - zip_update_request_length(dev, len, block_len); - if (direction == 0) - zip_command_read(dev); - else - zip_command_write(dev); - } + if (direction == 0) + zip_command_read_dma(dev); + else + zip_command_write_dma(dev); + } else { + zip_update_request_length(dev, len, block_len); + if (direction == 0) + zip_command_read(dev); + else + zip_command_write(dev); + } } zip_log("ZIP %i: Status: %i, cylinder %i, packet length: %i, position: %i, phase: %i\n", - dev->id, dev->packet_status, dev->request_length, dev->packet_len, dev->pos, dev->phase); + dev->id, dev->packet_status, dev->request_length, dev->packet_len, dev->pos, dev->phase); } - static void zip_sense_clear(zip_t *dev, int command) { zip_sense_key = zip_asc = zip_ascq = 0; } - static void zip_set_phase(zip_t *dev, uint8_t phase) { uint8_t scsi_bus = (dev->drv->scsi_device_id >> 4) & 0x0f; - uint8_t scsi_id = dev->drv->scsi_device_id & 0x0f; + uint8_t scsi_id = dev->drv->scsi_device_id & 0x0f; if (dev->drv->bus_type != ZIP_BUS_SCSI) - return; + return; scsi_devices[scsi_bus][scsi_id].phase = phase; } - static void zip_cmd_error(zip_t *dev) { zip_set_phase(dev, SCSI_PHASE_STATUS); dev->error = ((zip_sense_key & 0xf) << 4) | ABRT_ERR; if (dev->unit_attention) - dev->error |= MCR_ERR; - dev->status = READY_STAT | ERR_STAT; - dev->phase = 3; - dev->pos = 0; + dev->error |= MCR_ERR; + dev->status = READY_STAT | ERR_STAT; + dev->phase = 3; + dev->pos = 0; dev->packet_status = PHASE_ERROR; - dev->callback = 50.0 * ZIP_TIME; + dev->callback = 50.0 * ZIP_TIME; zip_set_callback(dev); ui_sb_update_icon(SB_ZIP | dev->id, 0); zip_log("ZIP %i: [%02X] ERROR: %02X/%02X/%02X\n", dev->id, dev->current_cdb[0], zip_sense_key, zip_asc, zip_ascq); } - static void zip_unit_attention(zip_t *dev) { zip_set_phase(dev, SCSI_PHASE_STATUS); dev->error = (SENSE_UNIT_ATTENTION << 4) | ABRT_ERR; if (dev->unit_attention) - dev->error |= MCR_ERR; - dev->status = READY_STAT | ERR_STAT; - dev->phase = 3; - dev->pos = 0; + dev->error |= MCR_ERR; + dev->status = READY_STAT | ERR_STAT; + dev->phase = 3; + dev->pos = 0; dev->packet_status = PHASE_ERROR; - dev->callback = 50.0 * ZIP_TIME; + dev->callback = 50.0 * ZIP_TIME; zip_set_callback(dev); ui_sb_update_icon(SB_ZIP | dev->id, 0); zip_log("ZIP %i: UNIT ATTENTION\n", dev->id); } - static void zip_buf_alloc(zip_t *dev, uint32_t len) { zip_log("ZIP %i: Allocated buffer length: %i\n", dev->id, len); if (!dev->buffer) - dev->buffer = (uint8_t *) malloc(len); + dev->buffer = (uint8_t *) malloc(len); } - static void zip_buf_free(zip_t *dev) { if (dev->buffer) { - zip_log("ZIP %i: Freeing buffer...\n", dev->id); - free(dev->buffer); - dev->buffer = NULL; + zip_log("ZIP %i: Freeing buffer...\n", dev->id); + free(dev->buffer); + dev->buffer = NULL; } } - static void zip_bus_master_error(scsi_common_t *sc) { @@ -1077,89 +1043,80 @@ zip_bus_master_error(scsi_common_t *sc) zip_cmd_error(dev); } - static void zip_not_ready(zip_t *dev) { zip_sense_key = SENSE_NOT_READY; - zip_asc = ASC_MEDIUM_NOT_PRESENT; - zip_ascq = 0; + zip_asc = ASC_MEDIUM_NOT_PRESENT; + zip_ascq = 0; zip_cmd_error(dev); } - static void zip_write_protected(zip_t *dev) { zip_sense_key = SENSE_UNIT_ATTENTION; - zip_asc = ASC_WRITE_PROTECTED; - zip_ascq = 0; + zip_asc = ASC_WRITE_PROTECTED; + zip_ascq = 0; zip_cmd_error(dev); } - static void zip_invalid_lun(zip_t *dev) { zip_sense_key = SENSE_ILLEGAL_REQUEST; - zip_asc = ASC_INV_LUN; - zip_ascq = 0; + zip_asc = ASC_INV_LUN; + zip_ascq = 0; zip_cmd_error(dev); } - static void zip_illegal_opcode(zip_t *dev) { zip_sense_key = SENSE_ILLEGAL_REQUEST; - zip_asc = ASC_ILLEGAL_OPCODE; - zip_ascq = 0; + zip_asc = ASC_ILLEGAL_OPCODE; + zip_ascq = 0; zip_cmd_error(dev); } - static void zip_lba_out_of_range(zip_t *dev) { zip_sense_key = SENSE_ILLEGAL_REQUEST; - zip_asc = ASC_LBA_OUT_OF_RANGE; - zip_ascq = 0; + zip_asc = ASC_LBA_OUT_OF_RANGE; + zip_ascq = 0; zip_cmd_error(dev); } - static void zip_invalid_field(zip_t *dev) { zip_sense_key = SENSE_ILLEGAL_REQUEST; - zip_asc = ASC_INV_FIELD_IN_CMD_PACKET; - zip_ascq = 0; + zip_asc = ASC_INV_FIELD_IN_CMD_PACKET; + zip_ascq = 0; zip_cmd_error(dev); dev->status = 0x53; } - static void zip_invalid_field_pl(zip_t *dev) { zip_sense_key = SENSE_ILLEGAL_REQUEST; - zip_asc = ASC_INV_FIELD_IN_PARAMETER_LIST; - zip_ascq = 0; + zip_asc = ASC_INV_FIELD_IN_PARAMETER_LIST; + zip_ascq = 0; zip_cmd_error(dev); dev->status = 0x53; } - static void zip_data_phase_error(zip_t *dev) { zip_sense_key = SENSE_ILLEGAL_REQUEST; - zip_asc = ASC_DATA_PHASE_ERROR; - zip_ascq = 0; + zip_asc = ASC_DATA_PHASE_ERROR; + zip_ascq = 0; zip_cmd_error(dev); } - static int zip_blocks(zip_t *dev, int32_t *len, int first_batch, int out) { @@ -1167,34 +1124,34 @@ zip_blocks(zip_t *dev, int32_t *len, int first_batch, int out) int i; if (!dev->sector_len) { - zip_command_complete(dev); - return -1; + zip_command_complete(dev); + return -1; } zip_log("%sing %i blocks starting from %i...\n", out ? "Writ" : "Read", dev->requested_blocks, dev->sector_pos); if (dev->sector_pos >= dev->drv->medium_size) { - zip_log("ZIP %i: Trying to %s beyond the end of disk\n", dev->id, out ? "write" : "read"); - zip_lba_out_of_range(dev); - return 0; + zip_log("ZIP %i: Trying to %s beyond the end of disk\n", dev->id, out ? "write" : "read"); + zip_lba_out_of_range(dev); + return 0; } *len = dev->requested_blocks << 9; for (i = 0; i < dev->requested_blocks; i++) { - if (fseek(dev->drv->f, dev->drv->base + (dev->sector_pos << 9) + (i << 9), SEEK_SET) == 1) - break; + if (fseek(dev->drv->f, dev->drv->base + (dev->sector_pos << 9) + (i << 9), SEEK_SET) == 1) + break; - if (feof(dev->drv->f)) - break; + if (feof(dev->drv->f)) + break; - if (out) { - if (fwrite(dev->buffer + (i << 9), 1, 512, dev->drv->f) != 512) - fatal("zip_blocks(): Error writing data\n"); - } else { - if (fread(dev->buffer + (i << 9), 1, 512, dev->drv->f) != 512) - fatal("zip_blocks(): Error reading data\n"); - } + if (out) { + if (fwrite(dev->buffer + (i << 9), 1, 512, dev->drv->f) != 512) + fatal("zip_blocks(): Error writing data\n"); + } else { + if (fread(dev->buffer + (i << 9), 1, 512, dev->drv->f) != 512) + fatal("zip_blocks(): Error reading data\n"); + } } zip_log("%s %i bytes of blocks...\n", out ? "Written" : "Read", *len); @@ -1205,55 +1162,52 @@ zip_blocks(zip_t *dev, int32_t *len, int first_batch, int out) return 1; } - void zip_insert(zip_t *dev) { dev->unit_attention = 1; } - /*SCSI Sense Initialization*/ void zip_sense_code_ok(zip_t *dev) { zip_sense_key = SENSE_NONE; - zip_asc = 0; - zip_ascq = 0; + zip_asc = 0; + zip_ascq = 0; } - static int zip_pre_execution_check(zip_t *dev, uint8_t *cdb) { int ready = 0; if (dev->drv->bus_type == ZIP_BUS_SCSI) { - if ((cdb[0] != GPCMD_REQUEST_SENSE) && (dev->cur_lun == SCSI_LUN_USE_CDB) && (cdb[1] & 0xe0)) { - zip_log("ZIP %i: Attempting to execute a unknown command targeted at SCSI LUN %i\n", dev->id, ((dev->request_length >> 5) & 7)); - zip_invalid_lun(dev); - return 0; - } + if ((cdb[0] != GPCMD_REQUEST_SENSE) && (dev->cur_lun == SCSI_LUN_USE_CDB) && (cdb[1] & 0xe0)) { + zip_log("ZIP %i: Attempting to execute a unknown command targeted at SCSI LUN %i\n", dev->id, ((dev->request_length >> 5) & 7)); + zip_invalid_lun(dev); + return 0; + } } if (!(zip_command_flags[cdb[0]] & IMPLEMENTED)) { - zip_log("ZIP %i: Attempting to execute unknown command %02X over %s\n", dev->id, cdb[0], - (dev->drv->bus_type == ZIP_BUS_SCSI) ? "SCSI" : "ATAPI"); + zip_log("ZIP %i: Attempting to execute unknown command %02X over %s\n", dev->id, cdb[0], + (dev->drv->bus_type == ZIP_BUS_SCSI) ? "SCSI" : "ATAPI"); - zip_illegal_opcode(dev); - return 0; + zip_illegal_opcode(dev); + return 0; } if ((dev->drv->bus_type < ZIP_BUS_SCSI) && (zip_command_flags[cdb[0]] & SCSI_ONLY)) { - zip_log("ZIP %i: Attempting to execute SCSI-only command %02X over ATAPI\n", dev->id, cdb[0]); - zip_illegal_opcode(dev); - return 0; + zip_log("ZIP %i: Attempting to execute SCSI-only command %02X over ATAPI\n", dev->id, cdb[0]); + zip_illegal_opcode(dev); + return 0; } if ((dev->drv->bus_type == ZIP_BUS_SCSI) && (zip_command_flags[cdb[0]] & ATAPI_ONLY)) { - zip_log("ZIP %i: Attempting to execute ATAPI-only command %02X over SCSI\n", dev->id, cdb[0]); - zip_illegal_opcode(dev); - return 0; + zip_log("ZIP %i: Attempting to execute ATAPI-only command %02X over SCSI\n", dev->id, cdb[0]); + zip_illegal_opcode(dev); + return 0; } ready = (dev->drv->f != NULL); @@ -1262,36 +1216,36 @@ zip_pre_execution_check(zip_t *dev, uint8_t *cdb) UNIT ATTENTION condition present, as we only use it to mark disc changes. */ if (!ready && dev->unit_attention) - dev->unit_attention = 0; + dev->unit_attention = 0; /* If the UNIT ATTENTION condition is set and the command does not allow execution under it, error out and report the condition. */ if (dev->unit_attention == 1) { - /* Only increment the unit attention phase if the command can not pass through it. */ - if (!(zip_command_flags[cdb[0]] & ALLOW_UA)) { - /* zip_log("ZIP %i: Unit attention now 2\n", dev->id); */ - dev->unit_attention = 2; - zip_log("ZIP %i: UNIT ATTENTION: Command %02X not allowed to pass through\n", dev->id, cdb[0]); - zip_unit_attention(dev); - return 0; - } + /* Only increment the unit attention phase if the command can not pass through it. */ + if (!(zip_command_flags[cdb[0]] & ALLOW_UA)) { + /* zip_log("ZIP %i: Unit attention now 2\n", dev->id); */ + dev->unit_attention = 2; + zip_log("ZIP %i: UNIT ATTENTION: Command %02X not allowed to pass through\n", dev->id, cdb[0]); + zip_unit_attention(dev); + return 0; + } } else if (dev->unit_attention == 2) { - if (cdb[0] != GPCMD_REQUEST_SENSE) { - /* zip_log("ZIP %i: Unit attention now 0\n", dev->id); */ - dev->unit_attention = 0; - } + if (cdb[0] != GPCMD_REQUEST_SENSE) { + /* zip_log("ZIP %i: Unit attention now 0\n", dev->id); */ + dev->unit_attention = 0; + } } /* Unless the command is REQUEST SENSE, clear the sense. This will *NOT* the UNIT ATTENTION condition if it's set. */ if (cdb[0] != GPCMD_REQUEST_SENSE) - zip_sense_clear(dev, cdb[0]); + zip_sense_clear(dev, cdb[0]); /* Next it's time for NOT READY. */ if ((zip_command_flags[cdb[0]] & CHECK_READY) && !ready) { - zip_log("ZIP %i: Not ready (%02X)\n", dev->id, cdb[0]); - zip_not_ready(dev); - return 0; + zip_log("ZIP %i: Not ready (%02X)\n", dev->id, cdb[0]); + zip_not_ready(dev); + return 0; } zip_log("ZIP %i: Continuing with command %02X\n", dev->id, cdb[0]); @@ -1299,15 +1253,13 @@ zip_pre_execution_check(zip_t *dev, uint8_t *cdb) return 1; } - static void zip_seek(zip_t *dev, uint32_t pos) { /* zip_log("ZIP %i: Seek %08X\n", dev->id, pos); */ - dev->sector_pos = pos; + dev->sector_pos = pos; } - static void zip_rezero(zip_t *dev) { @@ -1315,73 +1267,70 @@ zip_rezero(zip_t *dev) zip_seek(dev, 0); } - void zip_reset(scsi_common_t *sc) { zip_t *dev = (zip_t *) sc; zip_rezero(dev); - dev->status = 0; + dev->status = 0; dev->callback = 0.0; zip_set_callback(dev); - dev->phase = 1; + dev->phase = 1; dev->request_length = 0xEB14; - dev->packet_status = PHASE_NONE; + dev->packet_status = PHASE_NONE; dev->unit_attention = 0; - dev->cur_lun = SCSI_LUN_USE_CDB; + dev->cur_lun = SCSI_LUN_USE_CDB; } - static void zip_request_sense(zip_t *dev, uint8_t *buffer, uint8_t alloc_length, int desc) { /*Will return 18 bytes of 0*/ if (alloc_length != 0) { - memset(buffer, 0, alloc_length); - if (!desc) - memcpy(buffer, dev->sense, alloc_length); - else { - buffer[1] = zip_sense_key; - buffer[2] = zip_asc; - buffer[3] = zip_ascq; - } + memset(buffer, 0, alloc_length); + if (!desc) + memcpy(buffer, dev->sense, alloc_length); + else { + buffer[1] = zip_sense_key; + buffer[2] = zip_asc; + buffer[3] = zip_ascq; + } } buffer[0] = desc ? 0x72 : 0x70; if (dev->unit_attention && (zip_sense_key == 0)) { - buffer[desc ? 1 : 2] = SENSE_UNIT_ATTENTION; - buffer[desc ? 2 : 12] = ASC_MEDIUM_MAY_HAVE_CHANGED; - buffer[desc ? 3 : 13] = 0; + buffer[desc ? 1 : 2] = SENSE_UNIT_ATTENTION; + buffer[desc ? 2 : 12] = ASC_MEDIUM_MAY_HAVE_CHANGED; + buffer[desc ? 3 : 13] = 0; } zip_log("ZIP %i: Reporting sense: %02X %02X %02X\n", dev->id, buffer[2], buffer[12], buffer[13]); if (buffer[desc ? 1 : 2] == SENSE_UNIT_ATTENTION) { - /* If the last remaining sense is unit attention, clear - that condition. */ - dev->unit_attention = 0; + /* If the last remaining sense is unit attention, clear + that condition. */ + dev->unit_attention = 0; } /* Clear the sense stuff as per the spec. */ zip_sense_clear(dev, GPCMD_REQUEST_SENSE); } - static void zip_request_sense_for_scsi(scsi_common_t *sc, uint8_t *buffer, uint8_t alloc_length) { - zip_t *dev = (zip_t *) sc; - int ready = 0; + zip_t *dev = (zip_t *) sc; + int ready = 0; ready = (dev->drv->f != NULL); if (!ready && dev->unit_attention) { - /* If the drive is not ready, there is no reason to keep the - UNIT ATTENTION condition present, as we only use it to mark - disc changes. */ - dev->unit_attention = 0; + /* If the drive is not ready, there is no reason to keep the + UNIT ATTENTION condition present, as we only use it to mark + disc changes. */ + dev->unit_attention = 0; } /* Do *NOT* advance the unit attention phase. */ @@ -1389,59 +1338,57 @@ zip_request_sense_for_scsi(scsi_common_t *sc, uint8_t *buffer, uint8_t alloc_len zip_request_sense(dev, buffer, alloc_length, 0); } - static void zip_set_buf_len(zip_t *dev, int32_t *BufLen, int32_t *src_len) { if (dev->drv->bus_type == ZIP_BUS_SCSI) { - if (*BufLen == -1) - *BufLen = *src_len; - else { - *BufLen = MIN(*src_len, *BufLen); - *src_len = *BufLen; - } - zip_log("ZIP %i: Actual transfer length: %i\n", dev->id, *BufLen); + if (*BufLen == -1) + *BufLen = *src_len; + else { + *BufLen = MIN(*src_len, *BufLen); + *src_len = *BufLen; + } + zip_log("ZIP %i: Actual transfer length: %i\n", dev->id, *BufLen); } } - static void zip_command(scsi_common_t *sc, uint8_t *cdb) { - zip_t *dev = (zip_t *) sc; - int pos = 0, block_desc = 0; - int ret; - int32_t len, max_len; - int32_t alloc_length; + zip_t *dev = (zip_t *) sc; + int pos = 0, block_desc = 0; + int ret; + int32_t len, max_len; + int32_t alloc_length; uint32_t i = 0; - int size_idx, idx = 0; + int size_idx, idx = 0; unsigned preamble_len; - int32_t blen = 0; + int32_t blen = 0; int32_t *BufLen; - uint8_t scsi_bus = (dev->drv->scsi_device_id >> 4) & 0x0f; - uint8_t scsi_id = dev->drv->scsi_device_id & 0x0f; + uint8_t scsi_bus = (dev->drv->scsi_device_id >> 4) & 0x0f; + uint8_t scsi_id = dev->drv->scsi_device_id & 0x0f; if (dev->drv->bus_type == ZIP_BUS_SCSI) { - BufLen = &scsi_devices[scsi_bus][scsi_id].buffer_length; - dev->status &= ~ERR_STAT; + BufLen = &scsi_devices[scsi_bus][scsi_id].buffer_length; + dev->status &= ~ERR_STAT; } else { - BufLen = &blen; - dev->error = 0; + BufLen = &blen; + dev->error = 0; } - dev->packet_len = 0; + dev->packet_len = 0; dev->request_pos = 0; memcpy(dev->current_cdb, cdb, 12); if (cdb[0] != 0) { - zip_log("ZIP %i: Command 0x%02X, Sense Key %02X, Asc %02X, Ascq %02X, Unit attention: %i\n", - dev->id, cdb[0], zip_sense_key, zip_asc, zip_ascq, dev->unit_attention); - zip_log("ZIP %i: Request length: %04X\n", dev->id, dev->request_length); + zip_log("ZIP %i: Command 0x%02X, Sense Key %02X, Asc %02X, Ascq %02X, Unit attention: %i\n", + dev->id, cdb[0], zip_sense_key, zip_asc, zip_ascq, dev->unit_attention); + zip_log("ZIP %i: Request length: %04X\n", dev->id, dev->request_length); - zip_log("ZIP %i: CDB: %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", dev->id, - cdb[0], cdb[1], cdb[2], cdb[3], cdb[4], cdb[5], cdb[6], cdb[7], - cdb[8], cdb[9], cdb[10], cdb[11]); + zip_log("ZIP %i: CDB: %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", dev->id, + cdb[0], cdb[1], cdb[2], cdb[3], cdb[4], cdb[5], cdb[6], cdb[7], + cdb[8], cdb[9], cdb[10], cdb[11]); } dev->sector_len = 0; @@ -1450,626 +1397,627 @@ zip_command(scsi_common_t *sc, uint8_t *cdb) /* This handles the Not Ready/Unit Attention check if it has to be handled at this point. */ if (zip_pre_execution_check(dev, cdb) == 0) - return; + return; switch (cdb[0]) { - case GPCMD_SEND_DIAGNOSTIC: - if (!(cdb[1] & (1 << 2))) { - zip_invalid_field(dev); - return; - } - /*FALLTHROUGH*/ - case GPCMD_SCSI_RESERVE: - case GPCMD_SCSI_RELEASE: - case GPCMD_TEST_UNIT_READY: - zip_set_phase(dev, SCSI_PHASE_STATUS); - zip_command_complete(dev); - break; - - case GPCMD_FORMAT_UNIT: - if (dev->drv->read_only) { - zip_write_protected(dev); - return; - } - - zip_set_phase(dev, SCSI_PHASE_STATUS); - zip_command_complete(dev); - break; - - case GPCMD_IOMEGA_SENSE: - zip_set_phase(dev, SCSI_PHASE_DATA_IN); - max_len = cdb[4]; - zip_buf_alloc(dev, 256); - zip_set_buf_len(dev, BufLen, &max_len); - memset(dev->buffer, 0, 256); - if (cdb[2] == 1) { - /* This page is related to disk health status - setting - this page to 0 makes disk health read as "marginal". */ - dev->buffer[0] = 0x58; - dev->buffer[1] = 0x00; - for (i = 0x00; i < 0x58; i++) - dev->buffer[i + 0x02] = 0xff; - } else if (cdb[2] == 2) { - dev->buffer[0] = 0x3d; - dev->buffer[1] = 0x00; - for (i = 0x00; i < 0x13; i++) - dev->buffer[i + 0x02] = 0x00; - dev->buffer[0x15] = 0x00; - if (dev->drv->read_only) - dev->buffer[0x15] |= 0x02; - for (i = 0x00; i < 0x27; i++) - dev->buffer[i + 0x16] = 0x00; - } else { - zip_invalid_field(dev); - zip_buf_free(dev); - return; - } - zip_data_command_finish(dev, 18, 18, cdb[4], 0); - break; - - case GPCMD_REZERO_UNIT: - dev->sector_pos = dev->sector_len = 0; - zip_seek(dev, 0); - zip_set_phase(dev, SCSI_PHASE_STATUS); - break; - - case GPCMD_REQUEST_SENSE: - /* If there's a unit attention condition and there's a buffered not ready, a standalone REQUEST SENSE - should forget about the not ready, and report unit attention straight away. */ - zip_set_phase(dev, SCSI_PHASE_DATA_IN); - max_len = cdb[4]; - - if (!max_len) { - zip_set_phase(dev, SCSI_PHASE_STATUS); - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * ZIP_TIME; - zip_set_callback(dev); - break; - } - - zip_buf_alloc(dev, 256); - zip_set_buf_len(dev, BufLen, &max_len); - len = (cdb[1] & 1) ? 8 : 18; - zip_request_sense(dev, dev->buffer, max_len, cdb[1] & 1); - zip_data_command_finish(dev, len, len, cdb[4], 0); - break; - - case GPCMD_MECHANISM_STATUS: - zip_set_phase(dev, SCSI_PHASE_DATA_IN); - len = (cdb[8] << 8) | cdb[9]; - - zip_buf_alloc(dev, 8); - zip_set_buf_len(dev, BufLen, &len); - - memset(dev->buffer, 0, 8); - dev->buffer[5] = 1; - - zip_data_command_finish(dev, 8, 8, len, 0); - break; - - case GPCMD_READ_6: - case GPCMD_READ_10: - case GPCMD_READ_12: - zip_set_phase(dev, SCSI_PHASE_DATA_IN); - alloc_length = 512; - - switch(cdb[0]) { - case GPCMD_READ_6: - dev->sector_len = cdb[4]; - dev->sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]); - zip_log("ZIP %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); - break; - case GPCMD_READ_10: - dev->sector_len = (cdb[7] << 8) | cdb[8]; - dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - zip_log("ZIP %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); - break; - case GPCMD_READ_12: - dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); - dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); - break; - } - - if (!dev->sector_len) { - zip_set_phase(dev, SCSI_PHASE_STATUS); - /* zip_log("ZIP %i: All done - callback set\n", dev->id); */ - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * ZIP_TIME; - zip_set_callback(dev); - break; - } - - max_len = dev->sector_len; - dev->requested_blocks = max_len; /* If we're reading all blocks in one go for DMA, why not also for PIO, it should NOT - matter anyway, this step should be identical and only the way the read dat is - transferred to the host should be different. */ - - dev->packet_len = max_len * alloc_length; - zip_buf_alloc(dev, dev->packet_len); - - ret = zip_blocks(dev, &alloc_length, 1, 0); - if (ret <= 0) { - zip_set_phase(dev, SCSI_PHASE_STATUS); - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * ZIP_TIME; - zip_set_callback(dev); - zip_buf_free(dev); - return; - } - - dev->requested_blocks = max_len; - dev->packet_len = alloc_length; - - zip_set_buf_len(dev, BufLen, (int32_t *) &dev->packet_len); - - zip_data_command_finish(dev, alloc_length, 512, alloc_length, 0); - - if (dev->packet_status != PHASE_COMPLETE) - ui_sb_update_icon(SB_ZIP | dev->id, 1); - else - ui_sb_update_icon(SB_ZIP | dev->id, 0); - return; - - case GPCMD_VERIFY_6: - case GPCMD_VERIFY_10: - case GPCMD_VERIFY_12: - if (!(cdb[1] & 2)) { - zip_set_phase(dev, SCSI_PHASE_STATUS); - zip_command_complete(dev); - break; - } - case GPCMD_WRITE_6: - case GPCMD_WRITE_10: - case GPCMD_WRITE_AND_VERIFY_10: - case GPCMD_WRITE_12: - case GPCMD_WRITE_AND_VERIFY_12: - zip_set_phase(dev, SCSI_PHASE_DATA_OUT); - alloc_length = 512; - - if (dev->drv->read_only) { - zip_write_protected(dev); - return; - } - - switch(cdb[0]) { - case GPCMD_VERIFY_6: - case GPCMD_WRITE_6: - dev->sector_len = cdb[4]; - if (dev->sector_len == 0) - dev->sector_len = 256; /* For READ (6) and WRITE (6), a length of 0 indicates a transfer of 256 sector. */ - dev->sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]); - break; - case GPCMD_VERIFY_10: - case GPCMD_WRITE_10: - case GPCMD_WRITE_AND_VERIFY_10: - dev->sector_len = (cdb[7] << 8) | cdb[8]; - dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - zip_log("ZIP %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); - break; - case GPCMD_VERIFY_12: - case GPCMD_WRITE_12: - case GPCMD_WRITE_AND_VERIFY_12: - dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); - dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); - break; - } - - if ((dev->sector_pos >= dev->drv->medium_size)/* || - ((dev->sector_pos + dev->sector_len - 1) >= dev->drv->medium_size)*/) { - zip_lba_out_of_range(dev); - return; - } - - if (!dev->sector_len) { - zip_set_phase(dev, SCSI_PHASE_STATUS); - /* zip_log("ZIP %i: All done - callback set\n", dev->id); */ - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * ZIP_TIME; - zip_set_callback(dev); - break; - } - - max_len = dev->sector_len; - dev->requested_blocks = max_len; /* If we're writing all blocks in one go for DMA, why not also for PIO, it should NOT - matter anyway, this step should be identical and only the way the read dat is - transferred to the host should be different. */ - - dev->packet_len = max_len * alloc_length; - zip_buf_alloc(dev, dev->packet_len); - - dev->requested_blocks = max_len; - dev->packet_len = max_len << 9; - - zip_set_buf_len(dev, BufLen, (int32_t *) &dev->packet_len); - - zip_data_command_finish(dev, dev->packet_len, 512, dev->packet_len, 1); - - if (dev->packet_status != PHASE_COMPLETE) - ui_sb_update_icon(SB_ZIP | dev->id, 1); - else - ui_sb_update_icon(SB_ZIP | dev->id, 0); - return; - - case GPCMD_WRITE_SAME_10: - alloc_length = 512; - - if ((cdb[1] & 6) == 6) { - zip_invalid_field(dev); - return; - } - - if (dev->drv->read_only) { - zip_write_protected(dev); - return; - } - - dev->sector_len = (cdb[7] << 8) | cdb[8]; - dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - - if ((dev->sector_pos >= dev->drv->medium_size)/* || - ((dev->sector_pos + dev->sector_len - 1) >= dev->drv->medium_size)*/) { - zip_lba_out_of_range(dev); - return; - } - - if (!dev->sector_len) { - zip_set_phase(dev, SCSI_PHASE_STATUS); - /* zip_log("ZIP %i: All done - callback set\n", dev->id); */ - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * ZIP_TIME; - zip_set_callback(dev); - break; - } - - zip_buf_alloc(dev, alloc_length); - zip_set_buf_len(dev, BufLen, (int32_t *) &dev->packet_len); - - max_len = 1; - dev->requested_blocks = 1; - - dev->packet_len = alloc_length; - - zip_set_phase(dev, SCSI_PHASE_DATA_OUT); - - zip_data_command_finish(dev, 512, 512, alloc_length, 1); - - if (dev->packet_status != PHASE_COMPLETE) - ui_sb_update_icon(SB_ZIP | dev->id, 1); - else - ui_sb_update_icon(SB_ZIP | dev->id, 0); - return; - - case GPCMD_MODE_SENSE_6: - case GPCMD_MODE_SENSE_10: - zip_set_phase(dev, SCSI_PHASE_DATA_IN); - - if (dev->drv->bus_type == ZIP_BUS_SCSI) - block_desc = ((cdb[1] >> 3) & 1) ? 0 : 1; - else - block_desc = 0; - - if (cdb[0] == GPCMD_MODE_SENSE_6) { - len = cdb[4]; - zip_buf_alloc(dev, 256); - } else { - len = (cdb[8] | (cdb[7] << 8)); - zip_buf_alloc(dev, 65536); - } - - if (!(zip_mode_sense_page_flags & (1LL << (uint64_t) (cdb[2] & 0x3f)))) { - zip_invalid_field(dev); - zip_buf_free(dev); - return; - } - - memset(dev->buffer, 0, len); - alloc_length = len; - - if (cdb[0] == GPCMD_MODE_SENSE_6) { - len = zip_mode_sense(dev, dev->buffer, 4, cdb[2], block_desc); - len = MIN(len, alloc_length); - dev->buffer[0] = len - 1; - dev->buffer[1] = 0; - if (block_desc) - dev->buffer[3] = 8; - } else { - len = zip_mode_sense(dev, dev->buffer, 8, cdb[2], block_desc); - len = MIN(len, alloc_length); - dev->buffer[0]=(len - 2) >> 8; - dev->buffer[1]=(len - 2) & 255; - dev->buffer[2] = 0; - if (block_desc) { - dev->buffer[6] = 0; - dev->buffer[7] = 8; - } - } - - zip_set_buf_len(dev, BufLen, &len); - - zip_log("ZIP %i: Reading mode page: %02X...\n", dev->id, cdb[2]); - - zip_data_command_finish(dev, len, len, alloc_length, 0); - return; - - case GPCMD_MODE_SELECT_6: - case GPCMD_MODE_SELECT_10: - zip_set_phase(dev, SCSI_PHASE_DATA_OUT); - - if (cdb[0] == GPCMD_MODE_SELECT_6) { - len = cdb[4]; - zip_buf_alloc(dev, 256); - } else { - len = (cdb[7] << 8) | cdb[8]; - zip_buf_alloc(dev, 65536); - } - - zip_set_buf_len(dev, BufLen, &len); - - dev->total_length = len; - dev->do_page_save = cdb[1] & 1; - - zip_data_command_finish(dev, len, len, len, 1); - return; - - case GPCMD_START_STOP_UNIT: - zip_set_phase(dev, SCSI_PHASE_STATUS); - - switch(cdb[4] & 3) { - case 0: /* Stop the disc. */ - zip_eject(dev->id); /* The Iomega Windows 9x drivers require this. */ - break; - case 1: /* Start the disc and read the TOC. */ - break; - case 2: /* Eject the disc if possible. */ - /* zip_eject(dev->id); */ - break; - case 3: /* Load the disc (close tray). */ - zip_reload(dev->id); - break; - } - - zip_command_complete(dev); - break; - - case GPCMD_INQUIRY: - zip_set_phase(dev, SCSI_PHASE_DATA_IN); - - max_len = cdb[3]; - max_len <<= 8; - max_len |= cdb[4]; - - zip_buf_alloc(dev, 65536); - - if (cdb[1] & 1) { - preamble_len = 4; - size_idx = 3; - - dev->buffer[idx++] = 0; - dev->buffer[idx++] = cdb[2]; - dev->buffer[idx++] = 0; - - idx++; - - switch (cdb[2]) { - case 0x00: - dev->buffer[idx++] = 0x00; - dev->buffer[idx++] = 0x83; - break; - case 0x83: - if (idx + 24 > max_len) { - zip_data_phase_error(dev); - zip_buf_free(dev); - return; - } - - dev->buffer[idx++] = 0x02; - dev->buffer[idx++] = 0x00; - dev->buffer[idx++] = 0x00; - dev->buffer[idx++] = 20; - ide_padstr8(dev->buffer + idx, 20, "53R141"); /* Serial */ - idx += 20; - - if (idx + 72 > cdb[4]) - goto atapi_out; - dev->buffer[idx++] = 0x02; - dev->buffer[idx++] = 0x01; - dev->buffer[idx++] = 0x00; - dev->buffer[idx++] = 68; - ide_padstr8(dev->buffer + idx, 8, "IOMEGA "); /* Vendor */ - idx += 8; - if (dev->drv->is_250) - ide_padstr8(dev->buffer + idx, 40, "ZIP 250 "); /* Product */ - else - ide_padstr8(dev->buffer + idx, 40, "ZIP 100 "); /* Product */ - idx += 40; - ide_padstr8(dev->buffer + idx, 20, "53R141"); /* Product */ - idx += 20; - break; - default: - zip_log("INQUIRY: Invalid page: %02X\n", cdb[2]); - zip_invalid_field(dev); - zip_buf_free(dev); - return; - } - } else { - preamble_len = 5; - size_idx = 4; - - memset(dev->buffer, 0, 8); - if (cdb[1] & 0xe0) - dev->buffer[0] = 0x60; /*No physical device on this LUN*/ - else - dev->buffer[0] = 0x00; /*Hard disk*/ - dev->buffer[1] = 0x80; /*Removable*/ - dev->buffer[2] = (dev->drv->bus_type == ZIP_BUS_SCSI) ? 0x02 : 0x00; /*SCSI-2 compliant*/ - dev->buffer[3] = (dev->drv->bus_type == ZIP_BUS_SCSI) ? 0x02 : 0x21; - // dev->buffer[4] = 31; - dev->buffer[4] = 0; - if (dev->drv->bus_type == ZIP_BUS_SCSI) { - dev->buffer[6] = 1; /* 16-bit transfers supported */ - dev->buffer[7] = 0x20; /* Wide bus supported */ - } - dev->buffer[7] |= 0x02; - - ide_padstr8(dev->buffer + 8, 8, "IOMEGA "); /* Vendor */ - if (dev->drv->is_250) { - ide_padstr8(dev->buffer + 16, 16, "ZIP 250 "); /* Product */ - ide_padstr8(dev->buffer + 32, 4, "42.S"); /* Revision */ - if (max_len >= 44) - ide_padstr8(dev->buffer + 36, 8, "08/08/01"); /* Date? */ - if (max_len >= 122) - ide_padstr8(dev->buffer + 96, 26, "(c) Copyright IOMEGA 2000 "); /* Copyright string */ - } else { - ide_padstr8(dev->buffer + 16, 16, "ZIP 100 "); /* Product */ - ide_padstr8(dev->buffer + 32, 4, "E.08"); /* Revision */ - } - idx = 36; - - if (max_len == 96) { - dev->buffer[4] = 91; - idx = 96; - } else if (max_len == 128) { - dev->buffer[4] = 0x75; - idx = 128; - } - } + case GPCMD_SEND_DIAGNOSTIC: + if (!(cdb[1] & (1 << 2))) { + zip_invalid_field(dev); + return; + } + /*FALLTHROUGH*/ + case GPCMD_SCSI_RESERVE: + case GPCMD_SCSI_RELEASE: + case GPCMD_TEST_UNIT_READY: + zip_set_phase(dev, SCSI_PHASE_STATUS); + zip_command_complete(dev); + break; + + case GPCMD_FORMAT_UNIT: + if (dev->drv->read_only) { + zip_write_protected(dev); + return; + } + + zip_set_phase(dev, SCSI_PHASE_STATUS); + zip_command_complete(dev); + break; + + case GPCMD_IOMEGA_SENSE: + zip_set_phase(dev, SCSI_PHASE_DATA_IN); + max_len = cdb[4]; + zip_buf_alloc(dev, 256); + zip_set_buf_len(dev, BufLen, &max_len); + memset(dev->buffer, 0, 256); + if (cdb[2] == 1) { + /* This page is related to disk health status - setting + this page to 0 makes disk health read as "marginal". */ + dev->buffer[0] = 0x58; + dev->buffer[1] = 0x00; + for (i = 0x00; i < 0x58; i++) + dev->buffer[i + 0x02] = 0xff; + } else if (cdb[2] == 2) { + dev->buffer[0] = 0x3d; + dev->buffer[1] = 0x00; + for (i = 0x00; i < 0x13; i++) + dev->buffer[i + 0x02] = 0x00; + dev->buffer[0x15] = 0x00; + if (dev->drv->read_only) + dev->buffer[0x15] |= 0x02; + for (i = 0x00; i < 0x27; i++) + dev->buffer[i + 0x16] = 0x00; + } else { + zip_invalid_field(dev); + zip_buf_free(dev); + return; + } + zip_data_command_finish(dev, 18, 18, cdb[4], 0); + break; + + case GPCMD_REZERO_UNIT: + dev->sector_pos = dev->sector_len = 0; + zip_seek(dev, 0); + zip_set_phase(dev, SCSI_PHASE_STATUS); + break; + + case GPCMD_REQUEST_SENSE: + /* If there's a unit attention condition and there's a buffered not ready, a standalone REQUEST SENSE + should forget about the not ready, and report unit attention straight away. */ + zip_set_phase(dev, SCSI_PHASE_DATA_IN); + max_len = cdb[4]; + + if (!max_len) { + zip_set_phase(dev, SCSI_PHASE_STATUS); + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * ZIP_TIME; + zip_set_callback(dev); + break; + } + + zip_buf_alloc(dev, 256); + zip_set_buf_len(dev, BufLen, &max_len); + len = (cdb[1] & 1) ? 8 : 18; + zip_request_sense(dev, dev->buffer, max_len, cdb[1] & 1); + zip_data_command_finish(dev, len, len, cdb[4], 0); + break; + + case GPCMD_MECHANISM_STATUS: + zip_set_phase(dev, SCSI_PHASE_DATA_IN); + len = (cdb[8] << 8) | cdb[9]; + + zip_buf_alloc(dev, 8); + zip_set_buf_len(dev, BufLen, &len); + + memset(dev->buffer, 0, 8); + dev->buffer[5] = 1; + + zip_data_command_finish(dev, 8, 8, len, 0); + break; + + case GPCMD_READ_6: + case GPCMD_READ_10: + case GPCMD_READ_12: + zip_set_phase(dev, SCSI_PHASE_DATA_IN); + alloc_length = 512; + + switch (cdb[0]) { + case GPCMD_READ_6: + dev->sector_len = cdb[4]; + dev->sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]); + zip_log("ZIP %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); + break; + case GPCMD_READ_10: + dev->sector_len = (cdb[7] << 8) | cdb[8]; + dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + zip_log("ZIP %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); + break; + case GPCMD_READ_12: + dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); + dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); + break; + } + + if (!dev->sector_len) { + zip_set_phase(dev, SCSI_PHASE_STATUS); + /* zip_log("ZIP %i: All done - callback set\n", dev->id); */ + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * ZIP_TIME; + zip_set_callback(dev); + break; + } + + max_len = dev->sector_len; + dev->requested_blocks = max_len; /* If we're reading all blocks in one go for DMA, why not also for PIO, it should NOT + matter anyway, this step should be identical and only the way the read dat is + transferred to the host should be different. */ + + dev->packet_len = max_len * alloc_length; + zip_buf_alloc(dev, dev->packet_len); + + ret = zip_blocks(dev, &alloc_length, 1, 0); + if (ret <= 0) { + zip_set_phase(dev, SCSI_PHASE_STATUS); + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * ZIP_TIME; + zip_set_callback(dev); + zip_buf_free(dev); + return; + } + + dev->requested_blocks = max_len; + dev->packet_len = alloc_length; + + zip_set_buf_len(dev, BufLen, (int32_t *) &dev->packet_len); + + zip_data_command_finish(dev, alloc_length, 512, alloc_length, 0); + + if (dev->packet_status != PHASE_COMPLETE) + ui_sb_update_icon(SB_ZIP | dev->id, 1); + else + ui_sb_update_icon(SB_ZIP | dev->id, 0); + return; + + case GPCMD_VERIFY_6: + case GPCMD_VERIFY_10: + case GPCMD_VERIFY_12: + if (!(cdb[1] & 2)) { + zip_set_phase(dev, SCSI_PHASE_STATUS); + zip_command_complete(dev); + break; + } + case GPCMD_WRITE_6: + case GPCMD_WRITE_10: + case GPCMD_WRITE_AND_VERIFY_10: + case GPCMD_WRITE_12: + case GPCMD_WRITE_AND_VERIFY_12: + zip_set_phase(dev, SCSI_PHASE_DATA_OUT); + alloc_length = 512; + + if (dev->drv->read_only) { + zip_write_protected(dev); + return; + } + + switch (cdb[0]) { + case GPCMD_VERIFY_6: + case GPCMD_WRITE_6: + dev->sector_len = cdb[4]; + if (dev->sector_len == 0) + dev->sector_len = 256; /* For READ (6) and WRITE (6), a length of 0 indicates a transfer of 256 sector. */ + dev->sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]); + break; + case GPCMD_VERIFY_10: + case GPCMD_WRITE_10: + case GPCMD_WRITE_AND_VERIFY_10: + dev->sector_len = (cdb[7] << 8) | cdb[8]; + dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + zip_log("ZIP %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); + break; + case GPCMD_VERIFY_12: + case GPCMD_WRITE_12: + case GPCMD_WRITE_AND_VERIFY_12: + dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); + dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); + break; + } + + if ((dev->sector_pos >= dev->drv->medium_size) /* || + ((dev->sector_pos + dev->sector_len - 1) >= dev->drv->medium_size)*/ + ) { + zip_lba_out_of_range(dev); + return; + } + + if (!dev->sector_len) { + zip_set_phase(dev, SCSI_PHASE_STATUS); + /* zip_log("ZIP %i: All done - callback set\n", dev->id); */ + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * ZIP_TIME; + zip_set_callback(dev); + break; + } + + max_len = dev->sector_len; + dev->requested_blocks = max_len; /* If we're writing all blocks in one go for DMA, why not also for PIO, it should NOT + matter anyway, this step should be identical and only the way the read dat is + transferred to the host should be different. */ + + dev->packet_len = max_len * alloc_length; + zip_buf_alloc(dev, dev->packet_len); + + dev->requested_blocks = max_len; + dev->packet_len = max_len << 9; + + zip_set_buf_len(dev, BufLen, (int32_t *) &dev->packet_len); + + zip_data_command_finish(dev, dev->packet_len, 512, dev->packet_len, 1); + + if (dev->packet_status != PHASE_COMPLETE) + ui_sb_update_icon(SB_ZIP | dev->id, 1); + else + ui_sb_update_icon(SB_ZIP | dev->id, 0); + return; + + case GPCMD_WRITE_SAME_10: + alloc_length = 512; + + if ((cdb[1] & 6) == 6) { + zip_invalid_field(dev); + return; + } + + if (dev->drv->read_only) { + zip_write_protected(dev); + return; + } + + dev->sector_len = (cdb[7] << 8) | cdb[8]; + dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + + if ((dev->sector_pos >= dev->drv->medium_size) /* || + ((dev->sector_pos + dev->sector_len - 1) >= dev->drv->medium_size)*/ + ) { + zip_lba_out_of_range(dev); + return; + } + + if (!dev->sector_len) { + zip_set_phase(dev, SCSI_PHASE_STATUS); + /* zip_log("ZIP %i: All done - callback set\n", dev->id); */ + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * ZIP_TIME; + zip_set_callback(dev); + break; + } + + zip_buf_alloc(dev, alloc_length); + zip_set_buf_len(dev, BufLen, (int32_t *) &dev->packet_len); + + max_len = 1; + dev->requested_blocks = 1; + + dev->packet_len = alloc_length; + + zip_set_phase(dev, SCSI_PHASE_DATA_OUT); + + zip_data_command_finish(dev, 512, 512, alloc_length, 1); + + if (dev->packet_status != PHASE_COMPLETE) + ui_sb_update_icon(SB_ZIP | dev->id, 1); + else + ui_sb_update_icon(SB_ZIP | dev->id, 0); + return; + + case GPCMD_MODE_SENSE_6: + case GPCMD_MODE_SENSE_10: + zip_set_phase(dev, SCSI_PHASE_DATA_IN); + + if (dev->drv->bus_type == ZIP_BUS_SCSI) + block_desc = ((cdb[1] >> 3) & 1) ? 0 : 1; + else + block_desc = 0; + + if (cdb[0] == GPCMD_MODE_SENSE_6) { + len = cdb[4]; + zip_buf_alloc(dev, 256); + } else { + len = (cdb[8] | (cdb[7] << 8)); + zip_buf_alloc(dev, 65536); + } + + if (!(zip_mode_sense_page_flags & (1LL << (uint64_t) (cdb[2] & 0x3f)))) { + zip_invalid_field(dev); + zip_buf_free(dev); + return; + } + + memset(dev->buffer, 0, len); + alloc_length = len; + + if (cdb[0] == GPCMD_MODE_SENSE_6) { + len = zip_mode_sense(dev, dev->buffer, 4, cdb[2], block_desc); + len = MIN(len, alloc_length); + dev->buffer[0] = len - 1; + dev->buffer[1] = 0; + if (block_desc) + dev->buffer[3] = 8; + } else { + len = zip_mode_sense(dev, dev->buffer, 8, cdb[2], block_desc); + len = MIN(len, alloc_length); + dev->buffer[0] = (len - 2) >> 8; + dev->buffer[1] = (len - 2) & 255; + dev->buffer[2] = 0; + if (block_desc) { + dev->buffer[6] = 0; + dev->buffer[7] = 8; + } + } + + zip_set_buf_len(dev, BufLen, &len); + + zip_log("ZIP %i: Reading mode page: %02X...\n", dev->id, cdb[2]); + + zip_data_command_finish(dev, len, len, alloc_length, 0); + return; + + case GPCMD_MODE_SELECT_6: + case GPCMD_MODE_SELECT_10: + zip_set_phase(dev, SCSI_PHASE_DATA_OUT); + + if (cdb[0] == GPCMD_MODE_SELECT_6) { + len = cdb[4]; + zip_buf_alloc(dev, 256); + } else { + len = (cdb[7] << 8) | cdb[8]; + zip_buf_alloc(dev, 65536); + } + + zip_set_buf_len(dev, BufLen, &len); + + dev->total_length = len; + dev->do_page_save = cdb[1] & 1; + + zip_data_command_finish(dev, len, len, len, 1); + return; + + case GPCMD_START_STOP_UNIT: + zip_set_phase(dev, SCSI_PHASE_STATUS); + + switch (cdb[4] & 3) { + case 0: /* Stop the disc. */ + zip_eject(dev->id); /* The Iomega Windows 9x drivers require this. */ + break; + case 1: /* Start the disc and read the TOC. */ + break; + case 2: /* Eject the disc if possible. */ + /* zip_eject(dev->id); */ + break; + case 3: /* Load the disc (close tray). */ + zip_reload(dev->id); + break; + } + + zip_command_complete(dev); + break; + + case GPCMD_INQUIRY: + zip_set_phase(dev, SCSI_PHASE_DATA_IN); + + max_len = cdb[3]; + max_len <<= 8; + max_len |= cdb[4]; + + zip_buf_alloc(dev, 65536); + + if (cdb[1] & 1) { + preamble_len = 4; + size_idx = 3; + + dev->buffer[idx++] = 0; + dev->buffer[idx++] = cdb[2]; + dev->buffer[idx++] = 0; + + idx++; + + switch (cdb[2]) { + case 0x00: + dev->buffer[idx++] = 0x00; + dev->buffer[idx++] = 0x83; + break; + case 0x83: + if (idx + 24 > max_len) { + zip_data_phase_error(dev); + zip_buf_free(dev); + return; + } + + dev->buffer[idx++] = 0x02; + dev->buffer[idx++] = 0x00; + dev->buffer[idx++] = 0x00; + dev->buffer[idx++] = 20; + ide_padstr8(dev->buffer + idx, 20, "53R141"); /* Serial */ + idx += 20; + + if (idx + 72 > cdb[4]) + goto atapi_out; + dev->buffer[idx++] = 0x02; + dev->buffer[idx++] = 0x01; + dev->buffer[idx++] = 0x00; + dev->buffer[idx++] = 68; + ide_padstr8(dev->buffer + idx, 8, "IOMEGA "); /* Vendor */ + idx += 8; + if (dev->drv->is_250) + ide_padstr8(dev->buffer + idx, 40, "ZIP 250 "); /* Product */ + else + ide_padstr8(dev->buffer + idx, 40, "ZIP 100 "); /* Product */ + idx += 40; + ide_padstr8(dev->buffer + idx, 20, "53R141"); /* Product */ + idx += 20; + break; + default: + zip_log("INQUIRY: Invalid page: %02X\n", cdb[2]); + zip_invalid_field(dev); + zip_buf_free(dev); + return; + } + } else { + preamble_len = 5; + size_idx = 4; + + memset(dev->buffer, 0, 8); + if (cdb[1] & 0xe0) + dev->buffer[0] = 0x60; /*No physical device on this LUN*/ + else + dev->buffer[0] = 0x00; /*Hard disk*/ + dev->buffer[1] = 0x80; /*Removable*/ + dev->buffer[2] = (dev->drv->bus_type == ZIP_BUS_SCSI) ? 0x02 : 0x00; /*SCSI-2 compliant*/ + dev->buffer[3] = (dev->drv->bus_type == ZIP_BUS_SCSI) ? 0x02 : 0x21; + // dev->buffer[4] = 31; + dev->buffer[4] = 0; + if (dev->drv->bus_type == ZIP_BUS_SCSI) { + dev->buffer[6] = 1; /* 16-bit transfers supported */ + dev->buffer[7] = 0x20; /* Wide bus supported */ + } + dev->buffer[7] |= 0x02; + + ide_padstr8(dev->buffer + 8, 8, "IOMEGA "); /* Vendor */ + if (dev->drv->is_250) { + ide_padstr8(dev->buffer + 16, 16, "ZIP 250 "); /* Product */ + ide_padstr8(dev->buffer + 32, 4, "42.S"); /* Revision */ + if (max_len >= 44) + ide_padstr8(dev->buffer + 36, 8, "08/08/01"); /* Date? */ + if (max_len >= 122) + ide_padstr8(dev->buffer + 96, 26, "(c) Copyright IOMEGA 2000 "); /* Copyright string */ + } else { + ide_padstr8(dev->buffer + 16, 16, "ZIP 100 "); /* Product */ + ide_padstr8(dev->buffer + 32, 4, "E.08"); /* Revision */ + } + idx = 36; + + if (max_len == 96) { + dev->buffer[4] = 91; + idx = 96; + } else if (max_len == 128) { + dev->buffer[4] = 0x75; + idx = 128; + } + } atapi_out: - dev->buffer[size_idx] = idx - preamble_len; - len=idx; + dev->buffer[size_idx] = idx - preamble_len; + len = idx; - len = MIN(len, max_len); - zip_set_buf_len(dev, BufLen, &len); + len = MIN(len, max_len); + zip_set_buf_len(dev, BufLen, &len); - zip_data_command_finish(dev, len, len, max_len, 0); - break; + zip_data_command_finish(dev, len, len, max_len, 0); + break; - case GPCMD_PREVENT_REMOVAL: - zip_set_phase(dev, SCSI_PHASE_STATUS); - zip_command_complete(dev); - break; + case GPCMD_PREVENT_REMOVAL: + zip_set_phase(dev, SCSI_PHASE_STATUS); + zip_command_complete(dev); + break; - case GPCMD_SEEK_6: - case GPCMD_SEEK_10: - zip_set_phase(dev, SCSI_PHASE_STATUS); + case GPCMD_SEEK_6: + case GPCMD_SEEK_10: + zip_set_phase(dev, SCSI_PHASE_STATUS); - switch(cdb[0]) { - case GPCMD_SEEK_6: - pos = (cdb[2] << 8) | cdb[3]; - break; - case GPCMD_SEEK_10: - pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - break; - } - zip_seek(dev, pos); - zip_command_complete(dev); - break; + switch (cdb[0]) { + case GPCMD_SEEK_6: + pos = (cdb[2] << 8) | cdb[3]; + break; + case GPCMD_SEEK_10: + pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + break; + } + zip_seek(dev, pos); + zip_command_complete(dev); + break; - case GPCMD_READ_CDROM_CAPACITY: - zip_set_phase(dev, SCSI_PHASE_DATA_IN); + case GPCMD_READ_CDROM_CAPACITY: + zip_set_phase(dev, SCSI_PHASE_DATA_IN); - zip_buf_alloc(dev, 8); + zip_buf_alloc(dev, 8); - max_len = dev->drv->medium_size - 1; /* IMPORTANT: What's returned is the last LBA block. */ - memset(dev->buffer, 0, 8); - dev->buffer[0] = (max_len >> 24) & 0xff; - dev->buffer[1] = (max_len >> 16) & 0xff; - dev->buffer[2] = (max_len >> 8) & 0xff; - dev->buffer[3] = max_len & 0xff; - dev->buffer[6] = 2; /* 512 = 0x0200 */ - len = 8; + max_len = dev->drv->medium_size - 1; /* IMPORTANT: What's returned is the last LBA block. */ + memset(dev->buffer, 0, 8); + dev->buffer[0] = (max_len >> 24) & 0xff; + dev->buffer[1] = (max_len >> 16) & 0xff; + dev->buffer[2] = (max_len >> 8) & 0xff; + dev->buffer[3] = max_len & 0xff; + dev->buffer[6] = 2; /* 512 = 0x0200 */ + len = 8; - zip_set_buf_len(dev, BufLen, &len); + zip_set_buf_len(dev, BufLen, &len); - zip_data_command_finish(dev, len, len, len, 0); - break; + zip_data_command_finish(dev, len, len, len, 0); + break; - case GPCMD_IOMEGA_EJECT: - zip_set_phase(dev, SCSI_PHASE_STATUS); - zip_eject(dev->id); - zip_command_complete(dev); - break; + case GPCMD_IOMEGA_EJECT: + zip_set_phase(dev, SCSI_PHASE_STATUS); + zip_eject(dev->id); + zip_command_complete(dev); + break; - case GPCMD_READ_FORMAT_CAPACITIES: - len = (cdb[7] << 8) | cdb[8]; + case GPCMD_READ_FORMAT_CAPACITIES: + len = (cdb[7] << 8) | cdb[8]; - zip_buf_alloc(dev, len); - memset(dev->buffer, 0, len); + zip_buf_alloc(dev, len); + memset(dev->buffer, 0, len); - pos = 0; + pos = 0; - /* List header */ - dev->buffer[pos++] = 0; - dev->buffer[pos++] = 0; - dev->buffer[pos++] = 0; - if (dev->drv->f != NULL) - dev->buffer[pos++] = 16; - else - dev->buffer[pos++] = 8; + /* List header */ + dev->buffer[pos++] = 0; + dev->buffer[pos++] = 0; + dev->buffer[pos++] = 0; + if (dev->drv->f != NULL) + dev->buffer[pos++] = 16; + else + dev->buffer[pos++] = 8; - /* Current/Maximum capacity header */ - if (dev->drv->is_250) { - /* ZIP 250 also supports ZIP 100 media, so if the medium is inserted, - we return the inserted medium's size, otherwise, the ZIP 250 size. */ - if (dev->drv->f != NULL) { - dev->buffer[pos++] = (dev->drv->medium_size >> 24) & 0xff; - dev->buffer[pos++] = (dev->drv->medium_size >> 16) & 0xff; - dev->buffer[pos++] = (dev->drv->medium_size >> 8) & 0xff; - dev->buffer[pos++] = dev->drv->medium_size & 0xff; - dev->buffer[pos++] = 2; /* Current medium capacity */ - } else { - dev->buffer[pos++] = (ZIP_250_SECTORS >> 24) & 0xff; - dev->buffer[pos++] = (ZIP_250_SECTORS >> 16) & 0xff; - dev->buffer[pos++] = (ZIP_250_SECTORS >> 8) & 0xff; - dev->buffer[pos++] = ZIP_250_SECTORS & 0xff; - dev->buffer[pos++] = 3; /* Maximum medium capacity */ - } - } else { - /* ZIP 100 only supports ZIP 100 media as well, so we always return - the ZIP 100 size. */ - dev->buffer[pos++] = (ZIP_SECTORS >> 24) & 0xff; - dev->buffer[pos++] = (ZIP_SECTORS >> 16) & 0xff; - dev->buffer[pos++] = (ZIP_SECTORS >> 8) & 0xff; - dev->buffer[pos++] = ZIP_SECTORS & 0xff; - if (dev->drv->f != NULL) - dev->buffer[pos++] = 2; - else - dev->buffer[pos++] = 3; - } + /* Current/Maximum capacity header */ + if (dev->drv->is_250) { + /* ZIP 250 also supports ZIP 100 media, so if the medium is inserted, + we return the inserted medium's size, otherwise, the ZIP 250 size. */ + if (dev->drv->f != NULL) { + dev->buffer[pos++] = (dev->drv->medium_size >> 24) & 0xff; + dev->buffer[pos++] = (dev->drv->medium_size >> 16) & 0xff; + dev->buffer[pos++] = (dev->drv->medium_size >> 8) & 0xff; + dev->buffer[pos++] = dev->drv->medium_size & 0xff; + dev->buffer[pos++] = 2; /* Current medium capacity */ + } else { + dev->buffer[pos++] = (ZIP_250_SECTORS >> 24) & 0xff; + dev->buffer[pos++] = (ZIP_250_SECTORS >> 16) & 0xff; + dev->buffer[pos++] = (ZIP_250_SECTORS >> 8) & 0xff; + dev->buffer[pos++] = ZIP_250_SECTORS & 0xff; + dev->buffer[pos++] = 3; /* Maximum medium capacity */ + } + } else { + /* ZIP 100 only supports ZIP 100 media as well, so we always return + the ZIP 100 size. */ + dev->buffer[pos++] = (ZIP_SECTORS >> 24) & 0xff; + dev->buffer[pos++] = (ZIP_SECTORS >> 16) & 0xff; + dev->buffer[pos++] = (ZIP_SECTORS >> 8) & 0xff; + dev->buffer[pos++] = ZIP_SECTORS & 0xff; + if (dev->drv->f != NULL) + dev->buffer[pos++] = 2; + else + dev->buffer[pos++] = 3; + } - dev->buffer[pos++] = 512 >> 16; - dev->buffer[pos++] = 512 >> 8; - dev->buffer[pos++] = 512 & 0xff; + dev->buffer[pos++] = 512 >> 16; + dev->buffer[pos++] = 512 >> 8; + dev->buffer[pos++] = 512 & 0xff; - if (dev->drv->f != NULL) { - /* Formattable capacity descriptor */ - dev->buffer[pos++] = (dev->drv->medium_size >> 24) & 0xff; - dev->buffer[pos++] = (dev->drv->medium_size >> 16) & 0xff; - dev->buffer[pos++] = (dev->drv->medium_size >> 8) & 0xff; - dev->buffer[pos++] = dev->drv->medium_size & 0xff; - dev->buffer[pos++] = 0; - dev->buffer[pos++] = 512 >> 16; - dev->buffer[pos++] = 512 >> 8; - dev->buffer[pos++] = 512 & 0xff; - } + if (dev->drv->f != NULL) { + /* Formattable capacity descriptor */ + dev->buffer[pos++] = (dev->drv->medium_size >> 24) & 0xff; + dev->buffer[pos++] = (dev->drv->medium_size >> 16) & 0xff; + dev->buffer[pos++] = (dev->drv->medium_size >> 8) & 0xff; + dev->buffer[pos++] = dev->drv->medium_size & 0xff; + dev->buffer[pos++] = 0; + dev->buffer[pos++] = 512 >> 16; + dev->buffer[pos++] = 512 >> 8; + dev->buffer[pos++] = 512 & 0xff; + } - zip_set_buf_len(dev, BufLen, &len); + zip_set_buf_len(dev, BufLen, &len); - zip_data_command_finish(dev, len, len, len, 0); - break; + zip_data_command_finish(dev, len, len, len, 0); + break; - default: - zip_illegal_opcode(dev); - break; + default: + zip_illegal_opcode(dev); + break; } /* zip_log("ZIP %i: Phase: %02X, request length: %i\n", dev->id, dev->phase, dev->request_length); */ if (zip_atapi_phase_to_scsi(dev) == SCSI_PHASE_STATUS) - zip_buf_free(dev); + zip_buf_free(dev); } - static void zip_command_stop(scsi_common_t *sc) { @@ -2079,7 +2027,6 @@ zip_command_stop(scsi_common_t *sc) zip_buf_free(dev); } - /* The command second phase function, needed for Mode Select. */ static uint8_t zip_phase_data_out(scsi_common_t *sc) @@ -2101,131 +2048,130 @@ zip_phase_data_out(scsi_common_t *sc) int len = 0; - switch(dev->current_cdb[0]) { - case GPCMD_VERIFY_6: - case GPCMD_VERIFY_10: - case GPCMD_VERIFY_12: - break; - case GPCMD_WRITE_6: - case GPCMD_WRITE_10: - case GPCMD_WRITE_AND_VERIFY_10: - case GPCMD_WRITE_12: - case GPCMD_WRITE_AND_VERIFY_12: - if (dev->requested_blocks > 0) - zip_blocks(dev, &len, 1, 1); - break; - case GPCMD_WRITE_SAME_10: - if (!dev->current_cdb[7] && !dev->current_cdb[8]) { - last_to_write = (dev->drv->medium_size - 1); - } else - last_to_write = dev->sector_pos + dev->sector_len - 1; + switch (dev->current_cdb[0]) { + case GPCMD_VERIFY_6: + case GPCMD_VERIFY_10: + case GPCMD_VERIFY_12: + break; + case GPCMD_WRITE_6: + case GPCMD_WRITE_10: + case GPCMD_WRITE_AND_VERIFY_10: + case GPCMD_WRITE_12: + case GPCMD_WRITE_AND_VERIFY_12: + if (dev->requested_blocks > 0) + zip_blocks(dev, &len, 1, 1); + break; + case GPCMD_WRITE_SAME_10: + if (!dev->current_cdb[7] && !dev->current_cdb[8]) { + last_to_write = (dev->drv->medium_size - 1); + } else + last_to_write = dev->sector_pos + dev->sector_len - 1; - for (i = dev->sector_pos; i <= last_to_write; i++) { - if (dev->current_cdb[1] & 2) { - dev->buffer[0] = (i >> 24) & 0xff; - dev->buffer[1] = (i >> 16) & 0xff; - dev->buffer[2] = (i >> 8) & 0xff; - dev->buffer[3] = i & 0xff; - } else if (dev->current_cdb[1] & 4) { - /* CHS are 96,1,2048 (ZIP 100) and 239,1,2048 (ZIP 250) */ - s = (i % 2048); - h = ((i - s) / 2048) % 1; - c = ((i - s) / 2048) / 1; - dev->buffer[0] = (c >> 16) & 0xff; - dev->buffer[1] = (c >> 8) & 0xff; - dev->buffer[2] = c & 0xff; - dev->buffer[3] = h & 0xff; - dev->buffer[4] = (s >> 24) & 0xff; - dev->buffer[5] = (s >> 16) & 0xff; - dev->buffer[6] = (s >> 8) & 0xff; - dev->buffer[7] = s & 0xff; - } - if (fseek(dev->drv->f, dev->drv->base + (i << 9), SEEK_SET) == -1) - fatal("zip_phase_data_out(): Error seeking\n"); - if (fwrite(dev->buffer, 1, 512, dev->drv->f) != 512) - fatal("zip_phase_data_out(): Error writing data\n"); - } - break; - case GPCMD_MODE_SELECT_6: - case GPCMD_MODE_SELECT_10: - if (dev->current_cdb[0] == GPCMD_MODE_SELECT_10) { - hdr_len = 8; - param_list_len = dev->current_cdb[7]; - param_list_len <<= 8; - param_list_len |= dev->current_cdb[8]; - } else { - hdr_len = 4; - param_list_len = dev->current_cdb[4]; - } + for (i = dev->sector_pos; i <= last_to_write; i++) { + if (dev->current_cdb[1] & 2) { + dev->buffer[0] = (i >> 24) & 0xff; + dev->buffer[1] = (i >> 16) & 0xff; + dev->buffer[2] = (i >> 8) & 0xff; + dev->buffer[3] = i & 0xff; + } else if (dev->current_cdb[1] & 4) { + /* CHS are 96,1,2048 (ZIP 100) and 239,1,2048 (ZIP 250) */ + s = (i % 2048); + h = ((i - s) / 2048) % 1; + c = ((i - s) / 2048) / 1; + dev->buffer[0] = (c >> 16) & 0xff; + dev->buffer[1] = (c >> 8) & 0xff; + dev->buffer[2] = c & 0xff; + dev->buffer[3] = h & 0xff; + dev->buffer[4] = (s >> 24) & 0xff; + dev->buffer[5] = (s >> 16) & 0xff; + dev->buffer[6] = (s >> 8) & 0xff; + dev->buffer[7] = s & 0xff; + } + if (fseek(dev->drv->f, dev->drv->base + (i << 9), SEEK_SET) == -1) + fatal("zip_phase_data_out(): Error seeking\n"); + if (fwrite(dev->buffer, 1, 512, dev->drv->f) != 512) + fatal("zip_phase_data_out(): Error writing data\n"); + } + break; + case GPCMD_MODE_SELECT_6: + case GPCMD_MODE_SELECT_10: + if (dev->current_cdb[0] == GPCMD_MODE_SELECT_10) { + hdr_len = 8; + param_list_len = dev->current_cdb[7]; + param_list_len <<= 8; + param_list_len |= dev->current_cdb[8]; + } else { + hdr_len = 4; + param_list_len = dev->current_cdb[4]; + } - if (dev->drv->bus_type == ZIP_BUS_SCSI) { - if (dev->current_cdb[0] == GPCMD_MODE_SELECT_6) { - block_desc_len = dev->buffer[2]; - block_desc_len <<= 8; - block_desc_len |= dev->buffer[3]; - } else { - block_desc_len = dev->buffer[6]; - block_desc_len <<= 8; - block_desc_len |= dev->buffer[7]; - } - } else - block_desc_len = 0; + if (dev->drv->bus_type == ZIP_BUS_SCSI) { + if (dev->current_cdb[0] == GPCMD_MODE_SELECT_6) { + block_desc_len = dev->buffer[2]; + block_desc_len <<= 8; + block_desc_len |= dev->buffer[3]; + } else { + block_desc_len = dev->buffer[6]; + block_desc_len <<= 8; + block_desc_len |= dev->buffer[7]; + } + } else + block_desc_len = 0; - pos = hdr_len + block_desc_len; + pos = hdr_len + block_desc_len; - while(1) { - if (pos >= param_list_len) { - zip_log("ZIP %i: Buffer has only block descriptor\n", dev->id); - break; - } + while (1) { + if (pos >= param_list_len) { + zip_log("ZIP %i: Buffer has only block descriptor\n", dev->id); + break; + } - page = dev->buffer[pos] & 0x3F; - page_len = dev->buffer[pos + 1]; + page = dev->buffer[pos] & 0x3F; + page_len = dev->buffer[pos + 1]; - pos += 2; + pos += 2; - if (!(zip_mode_sense_page_flags & (1LL << ((uint64_t) page)))) - error |= 1; - else { - for (i = 0; i < page_len; i++) { - ch = zip_mode_sense_pages_changeable.pages[page][i + 2]; - val = dev->buffer[pos + i]; - old_val = dev->ms_pages_saved.pages[page][i + 2]; - if (val != old_val) { - if (ch) - dev->ms_pages_saved.pages[page][i + 2] = val; - else - error |= 1; - } - } - } + if (!(zip_mode_sense_page_flags & (1LL << ((uint64_t) page)))) + error |= 1; + else { + for (i = 0; i < page_len; i++) { + ch = zip_mode_sense_pages_changeable.pages[page][i + 2]; + val = dev->buffer[pos + i]; + old_val = dev->ms_pages_saved.pages[page][i + 2]; + if (val != old_val) { + if (ch) + dev->ms_pages_saved.pages[page][i + 2] = val; + else + error |= 1; + } + } + } - pos += page_len; + pos += page_len; - if (dev->drv->bus_type == ZIP_BUS_SCSI) - val = zip_mode_sense_pages_default_scsi.pages[page][0] & 0x80; - else - val = zip_mode_sense_pages_default.pages[page][0] & 0x80; - if (dev->do_page_save && val) - zip_mode_sense_save(dev); + if (dev->drv->bus_type == ZIP_BUS_SCSI) + val = zip_mode_sense_pages_default_scsi.pages[page][0] & 0x80; + else + val = zip_mode_sense_pages_default.pages[page][0] & 0x80; + if (dev->do_page_save && val) + zip_mode_sense_save(dev); - if (pos >= dev->total_length) - break; - } + if (pos >= dev->total_length) + break; + } - if (error) { - zip_buf_free(dev); - zip_invalid_field_pl(dev); - return 0; - } - break; + if (error) { + zip_buf_free(dev); + zip_invalid_field_pl(dev); + return 0; + } + break; } zip_command_stop((scsi_common_t *) dev); return 1; } - /* Peform a master init on the entire module. */ void zip_global_init(void) @@ -2234,77 +2180,72 @@ zip_global_init(void) memset(zip_drives, 0x00, sizeof(zip_drives)); } - static int zip_get_max(int ide_has_dma, int type) { int ret; - switch(type) { - case TYPE_PIO: - ret = ide_has_dma ? 3 : 0; - break; - case TYPE_SDMA: - default: - ret = -1; - break; - case TYPE_MDMA: - ret = ide_has_dma ? 1 : -1; - break; - case TYPE_UDMA: - ret = ide_has_dma ? 5 : -1; - break; + switch (type) { + case TYPE_PIO: + ret = ide_has_dma ? 3 : 0; + break; + case TYPE_SDMA: + default: + ret = -1; + break; + case TYPE_MDMA: + ret = ide_has_dma ? 1 : -1; + break; + case TYPE_UDMA: + ret = ide_has_dma ? 5 : -1; + break; } return ret; } - static int zip_get_timings(int ide_has_dma, int type) { int ret; - switch(type) { - case TIMINGS_DMA: - ret = ide_has_dma ? 0x96 : 0; - break; - case TIMINGS_PIO: - ret = ide_has_dma ? 0xb4 : 0; - break; - case TIMINGS_PIO_FC: - ret = ide_has_dma ? 0xb4 : 0; - break; - default: - ret = 0; - break; + switch (type) { + case TIMINGS_DMA: + ret = ide_has_dma ? 0x96 : 0; + break; + case TIMINGS_PIO: + ret = ide_has_dma ? 0xb4 : 0; + break; + case TIMINGS_PIO_FC: + ret = ide_has_dma ? 0xb4 : 0; + break; + default: + ret = 0; + break; } return ret; } - static void zip_100_identify(ide_t *ide) { - ide_padstr((char *) (ide->buffer + 23), "E.08", 8); /* Firmware */ + ide_padstr((char *) (ide->buffer + 23), "E.08", 8); /* Firmware */ ide_padstr((char *) (ide->buffer + 27), "IOMEGA ZIP 100 ATAPI", 40); /* Model */ } - static void zip_250_identify(ide_t *ide, int ide_has_dma) { - ide_padstr((char *) (ide->buffer + 23), "42.S", 8); /* Firmware */ + ide_padstr((char *) (ide->buffer + 23), "42.S", 8); /* Firmware */ ide_padstr((char *) (ide->buffer + 27), "IOMEGA ZIP 250 ATAPI", 40); /* Model */ if (ide_has_dma) { - ide->buffer[80] = 0x70; /*Supported ATA versions : ATA/ATAPI-4 ATA/ATAPI-6*/ - ide->buffer[81] = 0x19; /*Maximum ATA revision supported : ATA/ATAPI-6 T13 1410D revision 3a*/ + ide->buffer[80] = 0x70; /*Supported ATA versions : ATA/ATAPI-4 ATA/ATAPI-6*/ + ide->buffer[81] = 0x19; /*Maximum ATA revision supported : ATA/ATAPI-6 T13 1410D revision 3a*/ } } - static void zip_identify(ide_t *ide, int ide_has_dma) { @@ -2318,144 +2259,141 @@ zip_identify(ide_t *ide, int ide_has_dma) as a LS-120. */ ide->buffer[0] = 0x8000 | (0 << 8) | 0x80 | (1 << 5); ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */ - ide->buffer[49] = 0x200; /* LBA supported */ - ide->buffer[126] = 0xfffe; /* Interpret zero byte count limit as maximum length */ + ide->buffer[49] = 0x200; /* LBA supported */ + ide->buffer[126] = 0xfffe; /* Interpret zero byte count limit as maximum length */ if (zip_drives[zip->id].is_250) - zip_250_identify(ide, ide_has_dma); + zip_250_identify(ide, ide_has_dma); else - zip_100_identify(ide); + zip_100_identify(ide); } - static void zip_drive_reset(int c) { - zip_t *dev; + zip_t *dev; scsi_device_t *sd; - ide_t *id; - uint8_t scsi_bus = (zip_drives[c].scsi_device_id >> 4) & 0x0f; - uint8_t scsi_id = zip_drives[c].scsi_device_id & 0x0f; + ide_t *id; + uint8_t scsi_bus = (zip_drives[c].scsi_device_id >> 4) & 0x0f; + uint8_t scsi_id = zip_drives[c].scsi_device_id & 0x0f; if (!zip_drives[c].priv) { - zip_drives[c].priv = (zip_t *) malloc(sizeof(zip_t)); - memset(zip_drives[c].priv, 0, sizeof(zip_t)); + zip_drives[c].priv = (zip_t *) malloc(sizeof(zip_t)); + memset(zip_drives[c].priv, 0, sizeof(zip_t)); } dev = (zip_t *) zip_drives[c].priv; - dev->id = c; + dev->id = c; dev->cur_lun = SCSI_LUN_USE_CDB; if (zip_drives[c].bus_type == ZIP_BUS_SCSI) { - /* SCSI ZIP, attach to the SCSI bus. */ - sd = &scsi_devices[scsi_bus][scsi_id]; + /* SCSI ZIP, attach to the SCSI bus. */ + sd = &scsi_devices[scsi_bus][scsi_id]; - sd->sc = (scsi_common_t *) dev; - sd->command = zip_command; - sd->request_sense = zip_request_sense_for_scsi; - sd->reset = zip_reset; - sd->phase_data_out = zip_phase_data_out; - sd->command_stop = zip_command_stop; - sd->type = SCSI_REMOVABLE_DISK; + sd->sc = (scsi_common_t *) dev; + sd->command = zip_command; + sd->request_sense = zip_request_sense_for_scsi; + sd->reset = zip_reset; + sd->phase_data_out = zip_phase_data_out; + sd->command_stop = zip_command_stop; + sd->type = SCSI_REMOVABLE_DISK; } else if (zip_drives[c].bus_type == ZIP_BUS_ATAPI) { - /* ATAPI CD-ROM, attach to the IDE bus. */ - id = ide_get_drive(zip_drives[c].ide_channel); - /* If the IDE channel is initialized, we attach to it, - otherwise, we do nothing - it's going to be a drive - that's not attached to anything. */ - if (id) { - id->sc = (scsi_common_t *) dev; - id->get_max = zip_get_max; - id->get_timings = zip_get_timings; - id->identify = zip_identify; - id->stop = NULL; - id->packet_command = zip_command; - id->device_reset = zip_reset; - id->phase_data_out = zip_phase_data_out; - id->command_stop = zip_command_stop; - id->bus_master_error = zip_bus_master_error; - id->interrupt_drq = 1; + /* ATAPI CD-ROM, attach to the IDE bus. */ + id = ide_get_drive(zip_drives[c].ide_channel); + /* If the IDE channel is initialized, we attach to it, + otherwise, we do nothing - it's going to be a drive + that's not attached to anything. */ + if (id) { + id->sc = (scsi_common_t *) dev; + id->get_max = zip_get_max; + id->get_timings = zip_get_timings; + id->identify = zip_identify; + id->stop = NULL; + id->packet_command = zip_command; + id->device_reset = zip_reset; + id->phase_data_out = zip_phase_data_out; + id->command_stop = zip_command_stop; + id->bus_master_error = zip_bus_master_error; + id->interrupt_drq = 1; - ide_atapi_attach(id); - } + ide_atapi_attach(id); + } } } - void zip_hard_reset(void) { - zip_t *dev; - int c; + zip_t *dev; + int c; uint8_t scsi_id, scsi_bus; for (c = 0; c < ZIP_NUM; c++) { - if ((zip_drives[c].bus_type == ZIP_BUS_ATAPI) || (zip_drives[c].bus_type == ZIP_BUS_SCSI)) { - zip_log("ZIP hard_reset drive=%d\n", c); + if ((zip_drives[c].bus_type == ZIP_BUS_ATAPI) || (zip_drives[c].bus_type == ZIP_BUS_SCSI)) { + zip_log("ZIP hard_reset drive=%d\n", c); - if (zip_drives[c].bus_type == ZIP_BUS_SCSI) { - scsi_bus = (zip_drives[c].scsi_device_id >> 4) & 0x0f; - scsi_id = zip_drives[c].scsi_device_id & 0x0f; + if (zip_drives[c].bus_type == ZIP_BUS_SCSI) { + scsi_bus = (zip_drives[c].scsi_device_id >> 4) & 0x0f; + scsi_id = zip_drives[c].scsi_device_id & 0x0f; - /* Make sure to ignore any SCSI ZIP drive that has an out of range SCSI bus. */ - if (scsi_bus >= SCSI_BUS_MAX) - continue; + /* Make sure to ignore any SCSI ZIP drive that has an out of range SCSI bus. */ + if (scsi_bus >= SCSI_BUS_MAX) + continue; - /* Make sure to ignore any SCSI ZIP drive that has an out of range ID. */ - if (scsi_id >= SCSI_ID_MAX) - continue; - } + /* Make sure to ignore any SCSI ZIP drive that has an out of range ID. */ + if (scsi_id >= SCSI_ID_MAX) + continue; + } - /* Make sure to ignore any ATAPI ZIP drive that has an out of range IDE channel. */ - if ((zip_drives[c].bus_type == ZIP_BUS_ATAPI) && (zip_drives[c].ide_channel > 7)) - continue; + /* Make sure to ignore any ATAPI ZIP drive that has an out of range IDE channel. */ + if ((zip_drives[c].bus_type == ZIP_BUS_ATAPI) && (zip_drives[c].ide_channel > 7)) + continue; - zip_drive_reset(c); + zip_drive_reset(c); - dev = (zip_t *) zip_drives[c].priv; + dev = (zip_t *) zip_drives[c].priv; - dev->id = c; - dev->drv = &zip_drives[c]; + dev->id = c; + dev->drv = &zip_drives[c]; - zip_init(dev); + zip_init(dev); - if (strlen(zip_drives[c].image_path)) - zip_load(dev, zip_drives[c].image_path); + if (strlen(zip_drives[c].image_path)) + zip_load(dev, zip_drives[c].image_path); - zip_mode_sense_load(dev); + zip_mode_sense_load(dev); - if (zip_drives[c].bus_type == ZIP_BUS_SCSI) - zip_log("SCSI ZIP drive %i attached to SCSI ID %i\n", c, zip_drives[c].scsi_device_id); - else if (zip_drives[c].bus_type == ZIP_BUS_ATAPI) - zip_log("ATAPI ZIP drive %i attached to IDE channel %i\n", c, zip_drives[c].ide_channel); - } + if (zip_drives[c].bus_type == ZIP_BUS_SCSI) + zip_log("SCSI ZIP drive %i attached to SCSI ID %i\n", c, zip_drives[c].scsi_device_id); + else if (zip_drives[c].bus_type == ZIP_BUS_ATAPI) + zip_log("ATAPI ZIP drive %i attached to IDE channel %i\n", c, zip_drives[c].ide_channel); + } } } - void zip_close(void) { - zip_t *dev; - int c; + zip_t *dev; + int c; uint8_t scsi_bus, scsi_id; for (c = 0; c < ZIP_NUM; c++) { - if (zip_drives[c].bus_type == ZIP_BUS_SCSI) { - scsi_bus = (zip_drives[c].scsi_device_id >> 4) & 0x0f; - scsi_id = zip_drives[c].scsi_device_id & 0x0f; + if (zip_drives[c].bus_type == ZIP_BUS_SCSI) { + scsi_bus = (zip_drives[c].scsi_device_id >> 4) & 0x0f; + scsi_id = zip_drives[c].scsi_device_id & 0x0f; - memset(&scsi_devices[scsi_bus][scsi_id], 0x00, sizeof(scsi_device_t)); - } + memset(&scsi_devices[scsi_bus][scsi_id], 0x00, sizeof(scsi_device_t)); + } - dev = (zip_t *) zip_drives[c].priv; + dev = (zip_t *) zip_drives[c].priv; - if (dev) { - zip_disk_unload(dev); + if (dev) { + zip_disk_unload(dev); - free(dev); - zip_drives[c].priv = NULL; - } + free(dev); + zip_drives[c].priv = NULL; + } } } From 58d86a073941b59c0922d4222ebccc0408eb6da5 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:14:15 -0400 Subject: [PATCH 359/386] clang-format in src/floppy/ --- src/floppy/fdc.c | 3116 +++++++++++++-------------- src/floppy/fdc_magitronic.c | 45 +- src/floppy/fdc_pii15xb.c | 50 +- src/floppy/fdd.c | 397 ++-- src/floppy/fdd_86f.c | 4047 +++++++++++++++++------------------ src/floppy/fdd_common.c | 89 +- src/floppy/fdd_fdi.c | 312 ++- src/floppy/fdd_imd.c | 1145 +++++----- src/floppy/fdd_json.c | 748 ++++--- src/floppy/fdd_mfm.c | 395 ++-- src/floppy/fdi2raw.c | 2978 +++++++++++++------------- 11 files changed, 6570 insertions(+), 6752 deletions(-) diff --git a/src/floppy/fdc.c b/src/floppy/fdc.c index a1165f14b..f88971e83 100644 --- a/src/floppy/fdc.c +++ b/src/floppy/fdc.c @@ -37,318 +37,286 @@ #include <86box/fdc.h> #include <86box/fdc_ext.h> - extern uint64_t motoron[FDD_NUM]; - const uint8_t command_has_drivesel[32] = { - 0, 0, - 1, /* READ TRACK */ - 0, - 1, /* SENSE DRIVE STATUS */ - 1, /* WRITE DATA */ - 1, /* READ DATA */ - 1, /* RECALIBRATE */ - 0, - 1, /* WRITE DELETED DATA */ - 1, /* READ ID */ - 0, - 1, /* READ DELETED DATA */ - 1, /* FORMAT TRACK */ - 0, - 1, /* SEEK, RELATIVE SEEK */ - 0, - 1, /* SCAN EQUAL */ - 0, 0, 0, 0, - 1, /* VERIFY */ - 0, 0, - 1, /* SCAN LOW OR EQUAL */ - 0, 0, 0, - 1, /* SCAN HIGH OR EQUAL */ - 0, 0 + 0, 0, + 1, /* READ TRACK */ + 0, + 1, /* SENSE DRIVE STATUS */ + 1, /* WRITE DATA */ + 1, /* READ DATA */ + 1, /* RECALIBRATE */ + 0, + 1, /* WRITE DELETED DATA */ + 1, /* READ ID */ + 0, + 1, /* READ DELETED DATA */ + 1, /* FORMAT TRACK */ + 0, + 1, /* SEEK, RELATIVE SEEK */ + 0, + 1, /* SCAN EQUAL */ + 0, 0, 0, 0, + 1, /* VERIFY */ + 0, 0, + 1, /* SCAN LOW OR EQUAL */ + 0, 0, 0, + 1, /* SCAN HIGH OR EQUAL */ + 0, 0 }; - static uint8_t current_drive = 0; static void fdc_callback(void *priv); -int lastbyte=0; +int lastbyte = 0; int floppymodified[4]; int floppyrate[4]; - int fdc_type = 0; #ifdef ENABLE_FDC_LOG int fdc_do_log = ENABLE_FDC_LOG; - static void fdc_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (fdc_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (fdc_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define fdc_log(fmt, ...) +# define fdc_log(fmt, ...) #endif - const device_t fdc_internal_device = { - .name = "Internal", + .name = "Internal", .internal_name = "internal", - .flags = 0, - .local = 0, - .init = NULL, - .close = NULL, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = NULL, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; - typedef const struct { - const device_t *device; + const device_t *device; } fdc_cards_t; /* All emulated machines have at least one integrated FDC controller */ static fdc_cards_t fdc_cards[] = { -// clang-format off + // clang-format off { &fdc_internal_device }, { &fdc_b215_device }, { &fdc_pii151b_device }, { &fdc_pii158b_device }, { NULL } -// clang-format on + // clang-format on }; - int fdc_card_available(int card) { if (fdc_cards[card].device) - return(device_available(fdc_cards[card].device)); + return (device_available(fdc_cards[card].device)); - return(1); + return (1); } - const device_t * fdc_card_getdevice(int card) { - return(fdc_cards[card].device); + return (fdc_cards[card].device); } - int fdc_card_has_config(int card) { - if (! fdc_cards[card].device) return(0); + if (!fdc_cards[card].device) + return (0); - return(device_has_config(fdc_cards[card].device) ? 1 : 0); + return (device_has_config(fdc_cards[card].device) ? 1 : 0); } - char * fdc_card_get_internal_name(int card) { return device_get_internal_name(fdc_cards[card].device); } - int fdc_card_get_from_internal_name(char *s) { int c = 0; while (fdc_cards[c].device != NULL) { - if (!strcmp((char *) fdc_cards[c].device->internal_name, s)) - return(c); - c++; + if (!strcmp((char *) fdc_cards[c].device->internal_name, s)) + return (c); + c++; } - return(0); + return (0); } - void fdc_card_init(void) { if (!fdc_cards[fdc_type].device) - return; + return; device_add(fdc_cards[fdc_type].device); } - uint8_t fdc_get_current_drive(void) { return current_drive; } - void fdc_ctrl_reset(void *p) { fdc_t *fdc = (fdc_t *) p; fdc->stat = 0x80; - fdc->pnum = fdc->ptot=0; - fdc->st0 = 0; - fdc->lock = 0; - fdc->head = 0; - fdc->step = 0; + fdc->pnum = fdc->ptot = 0; + fdc->st0 = 0; + fdc->lock = 0; + fdc->head = 0; + fdc->step = 0; if (!(fdc->flags & FDC_FLAG_AT)) - fdc->rate = 2; + fdc->rate = 2; } - sector_id_t fdc_get_read_track_sector(fdc_t *fdc) { return fdc->read_track_sector; } - int fdc_get_compare_condition(fdc_t *fdc) { switch (fdc->interrupt) { - case 0x11: - default: - return 0; - case 0x19: - return 1; - case 0x1D: - return 2; + case 0x11: + default: + return 0; + case 0x19: + return 1; + case 0x1D: + return 2; } } - int fdc_is_deleted(fdc_t *fdc) { return fdc->deleted & 1; } - int fdc_is_sk(fdc_t *fdc) { return (fdc->deleted & 0x20) ? 1 : 0; } - void fdc_set_wrong_am(fdc_t *fdc) { fdc->wrong_am = 1; } - int fdc_get_drive(fdc_t *fdc) { return fdc->drive; } - -int fdc_get_bitcell_period(fdc_t *fdc); -int fdc_get_bit_rate(fdc_t *fdc); -static void fdc_rate(fdc_t *fdc, int drive); - +int fdc_get_bitcell_period(fdc_t *fdc); +int fdc_get_bit_rate(fdc_t *fdc); +static void fdc_rate(fdc_t *fdc, int drive); int fdc_get_perp(fdc_t *fdc) { if (!(fdc->flags & FDC_FLAG_AT) || (fdc->flags & FDC_FLAG_PCJR)) - return 0; + return 0; return fdc->perp; } - int fdc_get_gap2(fdc_t *fdc, int drive) { int auto_gap2 = 22; if (!(fdc->flags & FDC_FLAG_AT) || (fdc->flags & FDC_FLAG_PCJR)) - return 22; + return 22; if (fdc->perp & 3) - return ((fdc->perp & 3) == 3) ? 41 : 22; + return ((fdc->perp & 3) == 3) ? 41 : 22; else { - auto_gap2 = (fdc_get_bit_rate(fdc) >= 3) ? 41 : 22; - return (fdc->perp & (4 << drive)) ? auto_gap2 : 22; + auto_gap2 = (fdc_get_bit_rate(fdc) >= 3) ? 41 : 22; + return (fdc->perp & (4 << drive)) ? auto_gap2 : 22; } } - int fdc_get_format_n(fdc_t *fdc) { return fdc->format_n; } - int fdc_is_mfm(fdc_t *fdc) { return fdc->mfm ? 1 : 0; } - void fdc_request_next_sector_id(fdc_t *fdc) { if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) - fdc->stat = 0xf0; + fdc->stat = 0xf0; else { - dma_set_drq(fdc->dma_ch, 1); - fdc->stat = 0xd0; + dma_set_drq(fdc->dma_ch, 1); + fdc->stat = 0xd0; } } - void fdc_stop_id_request(fdc_t *fdc) { fdc->stat &= 0x7f; } - int fdc_get_gap(fdc_t *fdc) { return fdc->gap; } - int fdc_get_dtl(fdc_t *fdc) { return fdc->dtl; } - int fdc_get_format_sectors(fdc_t *fdc) { return fdc->format_sectors; } - static void fdc_reset_fifo_buf(fdc_t *fdc) { @@ -356,17 +324,15 @@ fdc_reset_fifo_buf(fdc_t *fdc) fdc->fifobufpos = 0; } - static void fdc_fifo_buf_advance(fdc_t *fdc) { if (fdc->fifobufpos == fdc->tfifo) - fdc->fifobufpos = 0; + fdc->fifobufpos = 0; else - fdc->fifobufpos++; + fdc->fifobufpos++; } - static void fdc_fifo_buf_write(fdc_t *fdc, uint8_t val) { @@ -374,35 +340,32 @@ fdc_fifo_buf_write(fdc_t *fdc, uint8_t val) fdc_fifo_buf_advance(fdc); } - static int fdc_fifo_buf_read(fdc_t *fdc) { int temp = fdc->fifobuf[fdc->fifobufpos]; fdc_fifo_buf_advance(fdc); if (!fdc->fifobufpos) - fdc->data_ready = 0; + fdc->data_ready = 0; return temp; } - -static -void fdc_int(fdc_t *fdc, int set_fintr) +static void +fdc_int(fdc_t *fdc, int set_fintr) { int ienable = 0; if (!(fdc->flags & FDC_FLAG_PCJR)) - ienable = !!(fdc->dor & 8); + ienable = !!(fdc->dor & 8); if (ienable) - picint(1 << fdc->irq); + picint(1 << fdc->irq); if (set_fintr) - fdc->fintr = 1; + fdc->fintr = 1; fdc_log("fdc_int(%i): fdc->fintr = %i\n", set_fintr, fdc->fintr); } - static void fdc_watchdog_poll(void *priv) { @@ -410,14 +373,13 @@ fdc_watchdog_poll(void *priv) fdc->watchdog_count--; if (fdc->watchdog_count) - timer_advance_u64(&fdc->watchdog_timer, 1000 * TIMER_USEC); + timer_advance_u64(&fdc->watchdog_timer, 1000 * TIMER_USEC); else { - if (fdc->dor & 0x20) - picint(1 << fdc->irq); + if (fdc->dor & 0x20) + picint(1 << fdc->irq); } } - /* fdc->rwc per Winbond W83877F datasheet: 0 = normal; 1 = 500 kbps, 360 rpm; @@ -437,14 +399,12 @@ fdc_update_rates(fdc_t *fdc) fdc_rate(fdc, 3); } - void fdc_update_max_track(fdc_t *fdc, int max_track) { fdc->max_track = max_track; } - void fdc_update_enh_mode(fdc_t *fdc, int enh_mode) { @@ -452,14 +412,12 @@ fdc_update_enh_mode(fdc_t *fdc, int enh_mode) fdc_update_rates(fdc); } - int fdc_get_rwc(fdc_t *fdc, int drive) { return fdc->rwc[drive]; } - void fdc_update_rwc(fdc_t *fdc, int drive, int rwc) { @@ -468,21 +426,18 @@ fdc_update_rwc(fdc_t *fdc, int drive, int rwc) fdc_rate(fdc, drive); } - int fdc_get_boot_drive(fdc_t *fdc) { return fdc->boot_drive; } - void fdc_update_boot_drive(fdc_t *fdc, int boot_drive) { fdc->boot_drive = boot_drive; } - void fdc_update_densel_polarity(fdc_t *fdc, int densel_polarity) { @@ -491,14 +446,12 @@ fdc_update_densel_polarity(fdc_t *fdc, int densel_polarity) fdc_update_rates(fdc); } - uint8_t fdc_get_densel_polarity(fdc_t *fdc) { return fdc->densel_polarity; } - void fdc_update_densel_force(fdc_t *fdc, int densel_force) { @@ -507,7 +460,6 @@ fdc_update_densel_force(fdc_t *fdc, int densel_force) fdc_update_rates(fdc); } - void fdc_update_drvrate(fdc_t *fdc, int drive, int drvrate) { @@ -516,120 +468,115 @@ fdc_update_drvrate(fdc_t *fdc, int drive, int drvrate) fdc_rate(fdc, drive); } - void fdc_update_drv2en(fdc_t *fdc, int drv2en) { fdc->drv2en = drv2en; } - void fdc_update_rate(fdc_t *fdc, int drive) { if (((fdc->rwc[drive] == 1) || (fdc->rwc[drive] == 2)) && fdc->enh_mode) - fdc->bit_rate = 500; + fdc->bit_rate = 500; else if ((fdc->rwc[drive] == 3) && fdc->enh_mode) - fdc->bit_rate = 250; - else switch (fdc->rate) { - case 0: /*High density*/ - fdc->bit_rate = 500; - break; - case 1: /*Double density (360 rpm)*/ - switch(fdc->drvrate[drive]) { - case 0: - fdc->bit_rate = 300; - break; - case 1: - fdc->bit_rate = 500; - break; - case 2: - fdc->bit_rate = 2000; - break; - } - break; - case 2: /*Double density*/ - fdc->bit_rate = 250; - break; - case 3: /*Extended density*/ - fdc->bit_rate = 1000; - break; - } + fdc->bit_rate = 250; + else + switch (fdc->rate) { + case 0: /*High density*/ + fdc->bit_rate = 500; + break; + case 1: /*Double density (360 rpm)*/ + switch (fdc->drvrate[drive]) { + case 0: + fdc->bit_rate = 300; + break; + case 1: + fdc->bit_rate = 500; + break; + case 2: + fdc->bit_rate = 2000; + break; + } + break; + case 2: /*Double density*/ + fdc->bit_rate = 250; + break; + case 3: /*Extended density*/ + fdc->bit_rate = 1000; + break; + } fdc->bitcell_period = (1000000 / fdc->bit_rate) * 2; /*Bitcell period in ns*/ } - int fdc_get_bit_rate(fdc_t *fdc) { - switch(fdc->bit_rate) { - case 500: - return 0; - case 300: - return 1; - case 2000: - return 1 | 4; - case 250: - return 2; - case 1000: - return 3; - default: - return 2; + switch (fdc->bit_rate) { + case 500: + return 0; + case 300: + return 1; + case 2000: + return 1 | 4; + case 250: + return 2; + case 1000: + return 3; + default: + return 2; } return 2; } - int fdc_get_bitcell_period(fdc_t *fdc) { return fdc->bitcell_period; } - static int fdc_get_densel(fdc_t *fdc, int drive) { if (fdc->enh_mode) { - switch (fdc->rwc[drive]) { - case 1: - case 3: - return 0; - case 2: - return 1; - } + switch (fdc->rwc[drive]) { + case 1: + case 3: + return 0; + case 2: + return 1; + } } if (!(fdc->flags & FDC_FLAG_NSC)) { - switch (fdc->densel_force) { - case 2: - return 1; - case 3: - return 0; - } + switch (fdc->densel_force) { + case 2: + return 1; + case 3: + return 0; + } } else { - switch (fdc->densel_force) { - case 0: - return 0; - case 1: - return 1; - } + switch (fdc->densel_force) { + case 0: + return 0; + case 1: + return 1; + } } switch (fdc->rate) { - case 0: - case 3: - return fdc->densel_polarity ? 1 : 0; - case 1: - case 2: - return fdc->densel_polarity ? 0 : 1; + case 0: + case 3: + return fdc->densel_polarity ? 1 : 0; + case 1: + case 2: + return fdc->densel_polarity ? 0 : 1; } return 0; } - static void fdc_rate(fdc_t *fdc, int drive) { @@ -640,17 +587,15 @@ fdc_rate(fdc_t *fdc, int drive) fdc_log("FDD %c: [%i] Densel: %i\n", 0x41 + drive, fdc->enh_mode, fdc_get_densel(fdc, drive)); } - int real_drive(fdc_t *fdc, int drive) { if (drive < 2) - return drive ^ fdc->swap; + return drive ^ fdc->swap; else - return drive; + return drive; } - void fdc_seek(fdc_t *fdc, int drive, int params) { @@ -658,16 +603,14 @@ fdc_seek(fdc_t *fdc, int drive, int params) fdc->stat |= (1 << fdc->drive); } - static void fdc_bad_command(fdc_t *fdc) { - fdc->stat = 0x10; + fdc->stat = 0x10; fdc->interrupt = 0xfc; timer_set_delay_u64(&fdc->timer, 100 * TIMER_USEC); } - static void fdc_io_command_phase1(fdc_t *fdc, int out) { @@ -686,58 +629,57 @@ fdc_io_command_phase1(fdc_t *fdc, int out) fdc_rate(fdc, fdc->drive); fdc->head = fdc->params[2]; fdd_set_head(real_drive(fdc, fdc->drive), (fdc->params[0] & 4) ? 1 : 0); - fdc->sector=fdc->params[3]; + fdc->sector = fdc->params[3]; fdc->eot[fdc->drive] = fdc->params[5]; - fdc->gap = fdc->params[6]; - fdc->dtl = fdc->params[7]; - fdc->rw_track = fdc->params[1]; + fdc->gap = fdc->params[6]; + fdc->dtl = fdc->params[7]; + fdc->rw_track = fdc->params[1]; if (fdc->config & 0x40) { - if (fdc->rw_track != fdc->pcn[fdc->params[0] & 3]) { - fdc_seek(fdc, fdc->drive, ((int) fdc->rw_track) - ((int) fdc->pcn[fdc->params[0] & 3])); - fdc->pcn[fdc->params[0] & 3] = fdc->rw_track; - } + if (fdc->rw_track != fdc->pcn[fdc->params[0] & 3]) { + fdc_seek(fdc, fdc->drive, ((int) fdc->rw_track) - ((int) fdc->pcn[fdc->params[0] & 3])); + fdc->pcn[fdc->params[0] & 3] = fdc->rw_track; + } } ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 1); fdc->stat = out ? 0x90 : 0x50; if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) - fdc->stat |= 0x20; + fdc->stat |= 0x20; else - dma_set_drq(fdc->dma_ch, 1); + dma_set_drq(fdc->dma_ch, 1); if (out) - fdc->pos = 0; + fdc->pos = 0; else - fdc->inread = 1; + fdc->inread = 1; } - static void fdc_sis(fdc_t *fdc) { int drive_num; - fdc->stat = (fdc->stat & 0xf) | 0xd0; + fdc->stat = (fdc->stat & 0xf) | 0xd0; if (fdc->reset_stat) { - drive_num = real_drive(fdc, 4 - fdc->reset_stat); - if ((drive_num < FDD_NUM) && fdd_get_flags(drive_num)) { - fdd_stop(drive_num); - fdd_set_head(drive_num, 0); - fdc->res[9] = 0xc0 | (4 - fdc->reset_stat) | (fdd_get_head(drive_num) ? 4 : 0); - } else - fdc->res[9] = 0xc0 | (4 - fdc->reset_stat); + drive_num = real_drive(fdc, 4 - fdc->reset_stat); + if ((drive_num < FDD_NUM) && fdd_get_flags(drive_num)) { + fdd_stop(drive_num); + fdd_set_head(drive_num, 0); + fdc->res[9] = 0xc0 | (4 - fdc->reset_stat) | (fdd_get_head(drive_num) ? 4 : 0); + } else + fdc->res[9] = 0xc0 | (4 - fdc->reset_stat); - fdc->reset_stat--; + fdc->reset_stat--; } else { - if (fdc->fintr) { - fdc->res[9] = (fdc->st0 & ~0x04) | (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0); - fdc->fintr = 0; - } else { - fdc->res[10] = 0x80; - fdc->paramstogo = 1; - return; - } + if (fdc->fintr) { + fdc->res[9] = (fdc->st0 & ~0x04) | (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0); + fdc->fintr = 0; + } else { + fdc->res[10] = 0x80; + fdc->paramstogo = 1; + return; + } } fdc->res[10] = fdc->pcn[fdc->res[9] & 3]; @@ -746,7 +688,6 @@ fdc_sis(fdc_t *fdc) fdc->paramstogo = 2; } - static void fdc_write(uint16_t addr, uint8_t val, void *priv) { @@ -758,708 +699,701 @@ fdc_write(uint16_t addr, uint8_t val, void *priv) cycles -= ISA_CYCLES(8); - switch (addr&7) { - case 0: - return; - case 1: - return; - case 2: /*DOR*/ - if (fdc->flags & FDC_FLAG_PCJR) { - if ((fdc->dor & 0x40) && !(val & 0x40)) { - timer_set_delay_u64(&fdc->watchdog_timer, 1000 * TIMER_USEC); - fdc->watchdog_count = 1000; - picintc(1 << fdc->irq); - } - if ((val & 0x80) && !(fdc->dor & 0x80)) { - timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC); - fdc->interrupt = -1; - ui_sb_update_icon(SB_FLOPPY | 0, 0); - fdc_ctrl_reset(fdc); - fdd_changed[0] = 1; - } - if (!fdd_get_flags(0)) - val &= 0xfe; - fdd_set_motor_enable(0, val & 0x01); - fdc->st0 &= ~0x07; - fdc->st0 |= (fdd_get_head(0) ? 4 : 0); + switch (addr & 7) { + case 0: + return; + case 1: + return; + case 2: /*DOR*/ + if (fdc->flags & FDC_FLAG_PCJR) { + if ((fdc->dor & 0x40) && !(val & 0x40)) { + timer_set_delay_u64(&fdc->watchdog_timer, 1000 * TIMER_USEC); + fdc->watchdog_count = 1000; + picintc(1 << fdc->irq); + } + if ((val & 0x80) && !(fdc->dor & 0x80)) { + timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC); + fdc->interrupt = -1; + ui_sb_update_icon(SB_FLOPPY | 0, 0); + fdc_ctrl_reset(fdc); + fdd_changed[0] = 1; + } + if (!fdd_get_flags(0)) + val &= 0xfe; + fdd_set_motor_enable(0, val & 0x01); + fdc->st0 &= ~0x07; + fdc->st0 |= (fdd_get_head(0) ? 4 : 0); + } else { + if (!(val & 8) && (fdc->dor & 8)) { + fdc->tc = 1; + fdc_int(fdc, 1); + } + if (!(val & 4)) { + fdd_stop(real_drive(fdc, val & 3)); + fdc->stat = 0x00; + fdc->pnum = fdc->ptot = 0; + } + if ((val & 4) && !(fdc->dor & 4)) { + timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC); + fdc->interrupt = -1; + fdc->perp &= 0xfc; + + for (i = 0; i < FDD_NUM; i++) + ui_sb_update_icon(SB_FLOPPY | i, 0); + + fdc_ctrl_reset(fdc); + } + /* We can now simplify this since each motor now spins separately. */ + for (i = 0; i < FDD_NUM; i++) { + drive_num = real_drive(fdc, i); + if ((!fdd_get_flags(drive_num)) || (drive_num >= FDD_NUM)) + val &= ~(0x10 << drive_num); + else + fdd_set_motor_enable(i, (val & (0x10 << drive_num))); + } + drive_num = real_drive(fdc, val & 0x03); + current_drive = drive_num; + fdc->st0 = (fdc->st0 & 0xf8) | (val & 0x03) | (fdd_get_head(drive_num) ? 4 : 0); + } + fdc->dor = val; + return; + case 3: /* TDR */ + if (fdc->enh_mode) { + drive = real_drive(fdc, fdc->dor & 3); + fdc_update_rwc(fdc, drive, (val & 0x30) >> 4); + } + return; + case 4: + if (val & 0x80) { + timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC); + fdc->interrupt = -1; + fdc->perp &= 0xfc; + fdc_ctrl_reset(fdc); + } + return; + case 5: /*Command register*/ + if ((fdc->stat & 0xf0) == 0xb0) { + if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->fifo) { + fdc->dat = val; + fdc->stat &= ~0x80; } else { - if (!(val & 8) && (fdc->dor & 8)) { - fdc->tc = 1; - fdc_int(fdc, 1); - } - if (!(val&4)) { - fdd_stop(real_drive(fdc, val & 3)); - fdc->stat = 0x00; - fdc->pnum = fdc->ptot = 0; - } - if ((val&4) && !(fdc->dor&4)) { - timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC); - fdc->interrupt = -1; - fdc->perp &= 0xfc; + fdc_fifo_buf_write(fdc, val); + if (fdc->fifobufpos == 0) + fdc->stat &= ~0x80; + } + break; + } + if (fdc->pnum == fdc->ptot) { + if ((fdc->stat & 0xf0) != 0x80) { + /* If bit 4 of the MSR is set, or the MSR is 0x00, + the fdc_t is NOT in the command phase, therefore + do NOT accept commands. */ + return; + } - for (i = 0; i < FDD_NUM; i++) - ui_sb_update_icon(SB_FLOPPY | i, 0); + fdc->stat &= 0xf; - fdc_ctrl_reset(fdc); - } - /* We can now simplify this since each motor now spins separately. */ - for (i = 0; i < FDD_NUM; i++) { - drive_num = real_drive(fdc, i); - if ((!fdd_get_flags(drive_num)) || (drive_num >= FDD_NUM)) - val &= ~(0x10 << drive_num); - else - fdd_set_motor_enable(i, (val & (0x10 << drive_num))); - } - drive_num = real_drive(fdc, val & 0x03); - current_drive = drive_num; - fdc->st0 = (fdc->st0 & 0xf8) | (val & 0x03) | (fdd_get_head(drive_num) ? 4 : 0); - } - fdc->dor = val; - return; - case 3: /* TDR */ - if (fdc->enh_mode) { - drive = real_drive(fdc, fdc->dor & 3); - fdc_update_rwc(fdc, drive, (val & 0x30) >> 4); - } - return; - case 4: - if (val & 0x80) { - timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC); - fdc->interrupt = -1; - fdc->perp &= 0xfc; - fdc_ctrl_reset(fdc); - } - return; - case 5: /*Command register*/ - if ((fdc->stat & 0xf0) == 0xb0) { - if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->fifo) { - fdc->dat = val; - fdc->stat &= ~0x80; - } else { - fdc_fifo_buf_write(fdc, val); - if (fdc->fifobufpos == 0) - fdc->stat &= ~0x80; - } - break; - } - if (fdc->pnum == fdc->ptot) { - if ((fdc->stat & 0xf0) != 0x80) { - /* If bit 4 of the MSR is set, or the MSR is 0x00, - the fdc_t is NOT in the command phase, therefore - do NOT accept commands. */ - return; - } + fdc->tc = 0; + fdc->data_ready = 0; - fdc->stat &= 0xf; + fdc->command = val; + fdc->stat |= 0x10; + fdc_log("Starting FDC command %02X\n", fdc->command); + fdc->error = 0; - fdc->tc = 0; - fdc->data_ready = 0; + if (((fdc->command & 0x1f) == 0x02) || ((fdc->command & 0x1f) == 0x05) || ((fdc->command & 0x1f) == 0x06) || ((fdc->command & 0x1f) == 0x0a) || ((fdc->command & 0x1f) == 0x0c) || ((fdc->command & 0x1f) == 0x0d) || ((fdc->command & 0x1f) == 0x11) || ((fdc->command & 0x1f) == 0x16) || ((fdc->command & 0x1f) == 0x19) || ((fdc->command & 0x1f) == 0x1d)) + fdc->processed_cmd = fdc->command & 0x1f; + else + fdc->processed_cmd = fdc->command; - fdc->command = val; - fdc->stat |= 0x10; - fdc_log("Starting FDC command %02X\n",fdc->command); - fdc->error = 0; + switch (fdc->processed_cmd) { + case 0x01: /*Mode*/ + if (fdc->flags & FDC_FLAG_NSC) { + fdc->pnum = 0; + fdc->ptot = 4; + fdc->stat |= 0x90; + fdc->pos = 0; + fdc->format_state = 0; + } else + fdc_bad_command(fdc); + break; + case 0x02: /*Read track*/ + fdc->satisfying_sectors = 0; + fdc->sc = 0; + fdc->wrong_am = 0; + fdc->pnum = 0; + fdc->ptot = 8; + fdc->stat |= 0x90; + fdc->pos = 0; + fdc->mfm = (fdc->command & 0x40) ? 1 : 0; + break; + case 0x03: /*Specify*/ + fdc->pnum = 0; + fdc->ptot = 2; + fdc->stat |= 0x90; + break; + case 0x04: /*Sense drive status*/ + fdc->pnum = 0; + fdc->ptot = 1; + fdc->stat |= 0x90; + break; + case 0x05: /*Write data*/ + case 0x09: /*Write deleted data*/ + fdc->satisfying_sectors = 0; + fdc->sc = 0; + fdc->wrong_am = 0; + fdc->deleted = ((fdc->command & 0x1F) == 9) ? 1 : 0; + fdc->pnum = 0; + fdc->ptot = 8; + fdc->stat |= 0x90; + fdc->pos = 0; + fdc->mfm = (fdc->command & 0x40) ? 1 : 0; + break; + case 0x06: /*Read data*/ + case 0x0c: /*Read deleted data*/ + case 0x11: /*Scan equal*/ + case 0x19: /*Scan low or equal*/ + case 0x16: /*Verify*/ + case 0x1d: /*Scan high or equal*/ + fdc->satisfying_sectors = 0; + fdc->sc = 0; + fdc->wrong_am = 0; + fdc->deleted = ((fdc->command & 0x1F) == 0xC) ? 1 : 0; + if ((fdc->command & 0x1F) == 0x16) + fdc->deleted = 2; + fdc->deleted |= (fdc->command & 0x20); + fdc->pnum = 0; + fdc->ptot = 8; + fdc->stat |= 0x90; + fdc->pos = 0; + fdc->mfm = (fdc->command & 0x40) ? 1 : 0; + break; + case 0x17: /*Powerdown mode*/ + if (!(fdc->flags & FDC_FLAG_ALI)) { + fdc_bad_command(fdc); + break; + } + /*FALLTHROUGH*/ + case 0x07: /*Recalibrate*/ + fdc->pnum = 0; + fdc->ptot = 1; + fdc->stat |= 0x90; + break; + case 0x08: /*Sense interrupt status*/ + fdc_log("fdc->fintr = %i, fdc->reset_stat = %i\n", fdc->fintr, fdc->reset_stat); + fdc->lastdrive = fdc->drive; + fdc->pos = 0; + fdc_sis(fdc); + break; + case 0x0a: /*Read sector ID*/ + fdc->pnum = 0; + fdc->ptot = 1; + fdc->stat |= 0x90; + fdc->pos = 0; + fdc->mfm = (fdc->command & 0x40) ? 1 : 0; + break; + case 0x0d: /*Format track*/ + fdc->pnum = 0; + fdc->ptot = 5; + fdc->stat |= 0x90; + fdc->pos = 0; + fdc->mfm = (fdc->command & 0x40) ? 1 : 0; + fdc->format_state = 0; + break; + case 0x0e: /*Dump registers*/ + fdc->lastdrive = fdc->drive; + fdc->interrupt = 0x0e; + fdc->pos = 0; + fdc_callback(fdc); + break; + case 0x0f: /*Seek*/ + fdc->pnum = 0; + fdc->ptot = 2; + fdc->stat |= 0x90; + break; + case 0x18: /*NSC*/ + if (!(fdc->flags & FDC_FLAG_NSC)) { + fdc_bad_command(fdc); + break; + } + /*FALLTHROUGH*/ + case 0x10: /*Get version*/ + case 0x14: /*Unlock*/ + case 0x94: /*Lock*/ + fdc->lastdrive = fdc->drive; + fdc->interrupt = fdc->command; + fdc->pos = 0; + fdc_callback(fdc); + break; + case 0x12: /*Set perpendicular mode*/ + if ((fdc->flags & FDC_FLAG_AT) && !(fdc->flags & FDC_FLAG_PCJR)) { + fdc->pnum = 0; + fdc->ptot = 1; + fdc->stat |= 0x90; + fdc->pos = 0; + } else + fdc_bad_command(fdc); + break; + case 0x13: /*Configure*/ + fdc->pnum = 0; + fdc->ptot = 3; + fdc->stat |= 0x90; + fdc->pos = 0; + break; + default: + fdc_bad_command(fdc); + break; + } + } else { + fdc->stat = 0x10 | (fdc->stat & 0xf); + fdc->params[fdc->pnum++] = val; + if (fdc->pnum == 1) { + if (command_has_drivesel[fdc->command & 0x1F]) { + if (fdc->flags & FDC_FLAG_PCJR) + fdc->drive = 0; + else + fdc->drive = fdc->dor & 3; + fdc->rw_drive = fdc->params[0] & 3; + if (((fdc->command & 0x1F) == 7) || ((fdc->command & 0x1F) == 15)) + fdc->stat |= (1 << real_drive(fdc, fdc->drive)); + } + } + if (fdc->pnum == fdc->ptot) { + fdc_log("Got all params %02X\n", fdc->command); + fdc->interrupt = fdc->processed_cmd; + fdc->reset_stat = 0; + /* Disable timer if enabled. */ + timer_disable(&fdc->timer); + /* Start timer if needed at this point. */ + switch (fdc->interrupt & 0x1f) { + case 0x02: /* Read a track */ + case 0x03: /* Specify */ + case 0x0a: /* Read sector ID */ + case 0x05: /* Write data */ + case 0x06: /* Read data */ + case 0x09: /* Write deleted data */ + case 0x0c: /* Read deleted data */ + case 0x11: /* Scan equal */ + case 0x12: /* Perpendicular mode */ + case 0x16: /* Verify */ + case 0x19: /* Scan low or equal */ + case 0x1d: /* Scan high or equal */ + /* Do nothing. */ + break; + case 0x07: /* Recalibrate */ + case 0x0f: /* Seek */ + if (fdc->flags & FDC_FLAG_PCJR) + timer_set_delay_u64(&fdc->timer, 1000 * TIMER_USEC); + else + timer_set_delay_u64(&fdc->timer, 256 * TIMER_USEC); + break; + default: + timer_set_delay_u64(&fdc->timer, 256 * TIMER_USEC); + break; + } + /* Process the firt phase of the command. */ + switch (fdc->processed_cmd) { + case 0x02: /* Read a track */ + fdc_io_command_phase1(fdc, 0); + fdc->read_track_sector.id.c = fdc->params[1]; + fdc->read_track_sector.id.h = fdc->params[2]; + fdc->read_track_sector.id.r = 1; + fdc->read_track_sector.id.n = fdc->params[4]; + if ((fdc->head & 0x01) && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) { + fdc_noidam(fdc); + return; + } + fdd_readsector(real_drive(fdc, fdc->drive), SECTOR_FIRST, fdc->params[1], fdc->head, fdc->rate, fdc->params[4]); + break; + case 0x03: /* Specify */ + fdc->stat = 0x80; + fdc->specify[0] = fdc->params[0]; + fdc->specify[1] = fdc->params[1]; + fdc->dma = (fdc->specify[1] & 1) ^ 1; + if (!fdc->dma) + dma_set_drq(fdc->dma_ch, 0); + break; + case 0x04: /*Sense drive status*/ + fdd_set_head(real_drive(fdc, fdc->drive), (fdc->params[0] & 4) ? 1 : 0); + break; + case 0x05: /* Write data */ + case 0x09: /* Write deleted data */ + fdc_io_command_phase1(fdc, 1); + if ((fdc->head & 0x01) && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) { + fdc_noidam(fdc); + return; + } + fdd_writesector(real_drive(fdc, fdc->drive), fdc->sector, fdc->params[1], fdc->head, fdc->rate, fdc->params[4]); + break; + case 0x11: /* Scan equal */ + case 0x19: /* Scan low or equal */ + case 0x1d: /* Scan high or equal */ + fdc_io_command_phase1(fdc, 1); + if ((fdc->head & 0x01) && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) { + fdc_noidam(fdc); + return; + } + fdd_comparesector(real_drive(fdc, fdc->drive), fdc->sector, fdc->params[1], fdc->head, fdc->rate, fdc->params[4]); + break; + case 0x16: /* Verify */ + if (fdc->params[0] & 0x80) + fdc->sc = fdc->params[7]; + /*FALLTHROUGH*/ + case 0x06: /* Read data */ + case 0x0c: /* Read deleted data */ + fdc_io_command_phase1(fdc, 0); + fdc_log("Reading sector (drive %i) (%i) (%i %i %i %i) (%i %i %i)\n", fdc->drive, fdc->params[0], fdc->params[1], fdc->params[2], fdc->params[3], fdc->params[4], fdc->params[5], fdc->params[6], fdc->params[7]); + if ((fdc->head & 0x01) && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) { + fdc_noidam(fdc); + return; + } + if (((dma_mode(2) & 0x0C) == 0x00) && !(fdc->flags & FDC_FLAG_PCJR) && fdc->dma) { + /* DMA is in verify mode, treat this like a VERIFY command. */ + fdc_log("Verify-mode read!\n"); + fdc->tc = 1; + fdc->deleted |= 2; + } + fdd_readsector(real_drive(fdc, fdc->drive), fdc->sector, fdc->params[1], fdc->head, fdc->rate, fdc->params[4]); + break; - if (((fdc->command & 0x1f) == 0x02) || ((fdc->command & 0x1f) == 0x05) || - ((fdc->command & 0x1f) == 0x06) || ((fdc->command & 0x1f) == 0x0a) || - ((fdc->command & 0x1f) == 0x0c) || ((fdc->command & 0x1f) == 0x0d) || - ((fdc->command & 0x1f) == 0x11) || ((fdc->command & 0x1f) == 0x16) || - ((fdc->command & 0x1f) == 0x19) || ((fdc->command & 0x1f) == 0x1d)) - fdc->processed_cmd = fdc->command & 0x1f; - else - fdc->processed_cmd = fdc->command; - - switch (fdc->processed_cmd) { - case 0x01: /*Mode*/ - if (fdc->flags & FDC_FLAG_NSC) { - fdc->pnum = 0; - fdc->ptot = 4; - fdc->stat |= 0x90; - fdc->pos = 0; - fdc->format_state = 0; - } else - fdc_bad_command(fdc); - break; - case 0x02: /*Read track*/ - fdc->satisfying_sectors = 0; - fdc->sc = 0; - fdc->wrong_am = 0; - fdc->pnum = 0; - fdc->ptot = 8; - fdc->stat |= 0x90; - fdc->pos = 0; - fdc->mfm = (fdc->command & 0x40) ? 1:0; - break; - case 0x03: /*Specify*/ - fdc->pnum = 0; - fdc->ptot = 2; - fdc->stat |= 0x90; - break; - case 0x04: /*Sense drive status*/ - fdc->pnum = 0; - fdc->ptot = 1; - fdc->stat |= 0x90; - break; - case 0x05: /*Write data*/ - case 0x09: /*Write deleted data*/ - fdc->satisfying_sectors = 0; - fdc->sc = 0; - fdc->wrong_am = 0; - fdc->deleted = ((fdc->command&0x1F) == 9) ? 1 : 0; - fdc->pnum = 0; - fdc->ptot = 8; - fdc->stat |= 0x90; - fdc->pos = 0; - fdc->mfm = (fdc->command & 0x40) ? 1 : 0; - break; - case 0x06: /*Read data*/ - case 0x0c: /*Read deleted data*/ - case 0x11: /*Scan equal*/ - case 0x19: /*Scan low or equal*/ - case 0x16: /*Verify*/ - case 0x1d: /*Scan high or equal*/ - fdc->satisfying_sectors = 0; - fdc->sc = 0; - fdc->wrong_am = 0; - fdc->deleted = ((fdc->command&0x1F) == 0xC) ? 1 : 0; - if ((fdc->command&0x1F) == 0x16) fdc->deleted = 2; - fdc->deleted |= (fdc->command & 0x20); - fdc->pnum = 0; - fdc->ptot = 8; - fdc->stat |= 0x90; - fdc->pos = 0; - fdc->mfm = (fdc->command&0x40)?1:0; - break; - case 0x17: /*Powerdown mode*/ - if (!(fdc->flags & FDC_FLAG_ALI)) { - fdc_bad_command(fdc); - break; - } - /*FALLTHROUGH*/ - case 0x07: /*Recalibrate*/ - fdc->pnum=0; - fdc->ptot=1; - fdc->stat |= 0x90; - break; - case 0x08: /*Sense interrupt status*/ - fdc_log("fdc->fintr = %i, fdc->reset_stat = %i\n", fdc->fintr, fdc->reset_stat); - fdc->lastdrive = fdc->drive; - fdc->pos = 0; - fdc_sis(fdc); - break; - case 0x0a: /*Read sector ID*/ - fdc->pnum = 0; - fdc->ptot = 1; - fdc->stat |= 0x90; - fdc->pos = 0; - fdc->mfm = (fdc->command & 0x40) ? 1 : 0; - break; - case 0x0d: /*Format track*/ - fdc->pnum = 0; - fdc->ptot = 5; - fdc->stat |= 0x90; - fdc->pos = 0; - fdc->mfm = (fdc->command & 0x40) ? 1:0; - fdc->format_state = 0; - break; - case 0x0e: /*Dump registers*/ - fdc->lastdrive = fdc->drive; - fdc->interrupt = 0x0e; - fdc->pos = 0; - fdc_callback(fdc); - break; - case 0x0f: /*Seek*/ - fdc->pnum = 0; - fdc->ptot = 2; - fdc->stat |= 0x90; - break; - case 0x18: /*NSC*/ - if (!(fdc->flags & FDC_FLAG_NSC)) { - fdc_bad_command(fdc); - break; - } - /*FALLTHROUGH*/ - case 0x10: /*Get version*/ - case 0x14: /*Unlock*/ - case 0x94: /*Lock*/ - fdc->lastdrive = fdc->drive; - fdc->interrupt = fdc->command; - fdc->pos = 0; - fdc_callback(fdc); - break; - case 0x12: /*Set perpendicular mode*/ - if ((fdc->flags & FDC_FLAG_AT) && !(fdc->flags & FDC_FLAG_PCJR)) { - fdc->pnum=0; - fdc->ptot=1; - fdc->stat |= 0x90; - fdc->pos=0; - } else - fdc_bad_command(fdc); - break; - case 0x13: /*Configure*/ - fdc->pnum=0; - fdc->ptot=3; - fdc->stat |= 0x90; - fdc->pos=0; - break; - default: - fdc_bad_command(fdc); - break; - } - } else { - fdc->stat = 0x10 | (fdc->stat & 0xf); - fdc->params[fdc->pnum++]=val; - if (fdc->pnum == 1) { - if (command_has_drivesel[fdc->command & 0x1F]) { - if (fdc->flags & FDC_FLAG_PCJR) - fdc->drive = 0; - else - fdc->drive = fdc->dor & 3; - fdc->rw_drive = fdc->params[0] & 3; - if (((fdc->command & 0x1F) == 7) || ((fdc->command & 0x1F) == 15)) - fdc->stat |= (1 << real_drive(fdc, fdc->drive)); - } - } - if (fdc->pnum == fdc->ptot) { - fdc_log("Got all params %02X\n", fdc->command); - fdc->interrupt = fdc->processed_cmd; - fdc->reset_stat = 0; - /* Disable timer if enabled. */ - timer_disable(&fdc->timer); - /* Start timer if needed at this point. */ - switch (fdc->interrupt & 0x1f) { - case 0x02: /* Read a track */ - case 0x03: /* Specify */ - case 0x0a: /* Read sector ID */ - case 0x05: /* Write data */ - case 0x06: /* Read data */ - case 0x09: /* Write deleted data */ - case 0x0c: /* Read deleted data */ - case 0x11: /* Scan equal */ - case 0x12: /* Perpendicular mode */ - case 0x16: /* Verify */ - case 0x19: /* Scan low or equal */ - case 0x1d: /* Scan high or equal */ - /* Do nothing. */ - break; - case 0x07: /* Recalibrate */ - case 0x0f: /* Seek */ - if (fdc->flags & FDC_FLAG_PCJR) - timer_set_delay_u64(&fdc->timer, 1000 * TIMER_USEC); - else - timer_set_delay_u64(&fdc->timer, 256 * TIMER_USEC); - break; - default: - timer_set_delay_u64(&fdc->timer, 256 * TIMER_USEC); - break; - } - /* Process the firt phase of the command. */ - switch (fdc->processed_cmd) { - case 0x02: /* Read a track */ - fdc_io_command_phase1(fdc, 0); - fdc->read_track_sector.id.c = fdc->params[1]; - fdc->read_track_sector.id.h = fdc->params[2]; - fdc->read_track_sector.id.r = 1; - fdc->read_track_sector.id.n = fdc->params[4]; - if ((fdc->head & 0x01) && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) { - fdc_noidam(fdc); - return; - } - fdd_readsector(real_drive(fdc, fdc->drive), SECTOR_FIRST, fdc->params[1], fdc->head, fdc->rate, fdc->params[4]); - break; - case 0x03: /* Specify */ - fdc->stat = 0x80; - fdc->specify[0] = fdc->params[0]; - fdc->specify[1] = fdc->params[1]; - fdc->dma = (fdc->specify[1] & 1) ^ 1; - if (!fdc->dma) - dma_set_drq(fdc->dma_ch, 0); - break; - case 0x04: /*Sense drive status*/ - fdd_set_head(real_drive(fdc, fdc->drive), (fdc->params[0] & 4) ? 1 : 0); - break; - case 0x05: /* Write data */ - case 0x09: /* Write deleted data */ - fdc_io_command_phase1(fdc, 1); - if ((fdc->head & 0x01) && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) { - fdc_noidam(fdc); - return; - } - fdd_writesector(real_drive(fdc, fdc->drive), fdc->sector, fdc->params[1], fdc->head, fdc->rate, fdc->params[4]); - break; - case 0x11: /* Scan equal */ - case 0x19: /* Scan low or equal */ - case 0x1d: /* Scan high or equal */ - fdc_io_command_phase1(fdc, 1); - if ((fdc->head & 0x01) && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) { - fdc_noidam(fdc); - return; - } - fdd_comparesector(real_drive(fdc, fdc->drive), fdc->sector, fdc->params[1], fdc->head, fdc->rate, fdc->params[4]); - break; - case 0x16: /* Verify */ - if (fdc->params[0] & 0x80) - fdc->sc = fdc->params[7]; - /*FALLTHROUGH*/ - case 0x06: /* Read data */ - case 0x0c: /* Read deleted data */ - fdc_io_command_phase1(fdc, 0); - fdc_log("Reading sector (drive %i) (%i) (%i %i %i %i) (%i %i %i)\n", fdc->drive, fdc->params[0], fdc->params[1], fdc->params[2], fdc->params[3], fdc->params[4], fdc->params[5], fdc->params[6], fdc->params[7]); - if ((fdc->head & 0x01) && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) { - fdc_noidam(fdc); - return; - } - if (((dma_mode(2) & 0x0C) == 0x00) && !(fdc->flags & FDC_FLAG_PCJR) && fdc->dma) { - /* DMA is in verify mode, treat this like a VERIFY command. */ - fdc_log("Verify-mode read!\n"); - fdc->tc = 1; - fdc->deleted |= 2; - } - fdd_readsector(real_drive(fdc, fdc->drive), fdc->sector, fdc->params[1], fdc->head, fdc->rate, fdc->params[4]); - break; - - case 0x07: /* Recalibrate */ - fdc->rw_drive = fdc->params[0] & 3; - fdc->stat = (1 << real_drive(fdc, fdc->drive)); - if (!(fdc->flags & FDC_FLAG_PCJR)) - fdc->stat |= 0x80; - fdc->st0 = fdc->params[0] & 3; - fdc->st0 |= fdd_get_head(real_drive(fdc, fdc->drive)) ? 0x04 : 0x00; - fdc->st0 |= 0x80; - drive_num = real_drive(fdc, fdc->drive); - /* Three conditions under which the command should fail. */ - if ((drive_num >= FDD_NUM) || !fdd_get_flags(drive_num) || !motoron[drive_num] || fdd_track0(drive_num)) { - fdc_log("Failed recalibrate\n"); - if ((drive_num >= FDD_NUM) || !fdd_get_flags(drive_num) || !motoron[drive_num]) - fdc->st0 = 0x70 | (fdc->params[0] & 3); - else - fdc->st0 = 0x20 | (fdc->params[0] & 3); - fdc->pcn[fdc->params[0] & 3] = 0; - if (fdc->flags & FDC_FLAG_PCJR) { - fdc->fintr = 1; - fdc->interrupt = -4; - } else { - timer_disable(&fdc->timer); - fdc->interrupt = -3; - fdc_callback(fdc); - } - break; - } - if ((real_drive(fdc, fdc->drive) != 1) || fdc->drv2en) - fdc_seek(fdc, fdc->drive, -fdc->max_track); - fdc_log("Recalibrating...\n"); - fdc->seek_dir = fdc->step = 1; - break; - case 0x0a: /* Read sector ID */ - fdc_rate(fdc, fdc->drive); - fdc->head = (fdc->params[0] & 4) ? 1 : 0; - fdd_set_head(real_drive(fdc, fdc->drive), (fdc->params[0] & 4) ? 1 : 0); - if ((real_drive(fdc, fdc->drive) != 1) || fdc->drv2en) { - fdd_readaddress(real_drive(fdc, fdc->drive), fdc->head, fdc->rate); - if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) - fdc->stat = 0x70; - else - fdc->stat = 0x50; - } - else - fdc_noidam(fdc); - break; - case 0x0d: /* Format */ - fdc_rate(fdc, fdc->drive); - fdc->head = (fdc->params[0] & 4) ? 1 : 0; - fdd_set_head(real_drive(fdc, fdc->drive), (fdc->params[0] & 4) ? 1 : 0); - fdc->gap = fdc->params[3]; - fdc->format_sectors = fdc->params[2]; - fdc->format_n = fdc->params[1]; - fdc->format_state = 1; - fdc->pos = 0; - fdc->stat = 0x10; - break; - case 0x0f: /* Seek */ - fdc->rw_drive = fdc->params[0] & 3; - fdc->stat = (1 << fdc->drive); - if (!(fdc->flags & FDC_FLAG_PCJR)) - fdc->stat |= 0x80; - /* fdc->head = (fdc->params[0] & 4) ? 1 : 0; */ - fdc->head = 0; /* TODO: See if this is correct. */ - fdc->st0 = fdc->params[0] & 0x03; - fdc->st0 |= (fdc->params[0] & 4); - fdc->st0 |= 0x80; - fdd_set_head(real_drive(fdc, fdc->drive), (fdc->params[0] & 4) ? 1 : 0); - drive_num = real_drive(fdc, fdc->drive); - /* Three conditions under which the command should fail. */ - if (!fdd_get_flags(drive_num) || (drive_num >= FDD_NUM) || !motoron[drive_num]) { - /* Yes, failed SEEK's still report success, unlike failed RECALIBRATE's. */ - fdc->st0 = 0x20 | (fdc->params[0] & 3); - if (fdc->command & 0x80) { - if (fdc->command & 0x40) - fdc->pcn[fdc->params[0] & 3] += fdc->params[1]; - else - fdc->pcn[fdc->params[0] & 3] -= fdc->params[1]; - } else - fdc->pcn[fdc->params[0] & 3] = fdc->params[1]; - if (fdc->flags & FDC_FLAG_PCJR) { - fdc->fintr = 1; - fdc->interrupt = -4; - } else { - timer_disable(&fdc->timer); - fdc->interrupt = -3; - fdc_callback(fdc); - } - break; - } - if (fdc->command & 0x80) { - if (fdc->params[1]) { - if (fdc->command & 0x40) { - /* Relative seek inwards. */ - fdc->seek_dir = 0; - fdc_seek(fdc, fdc->drive, fdc->params[1]); - fdc->pcn[fdc->params[0] & 3] += fdc->params[1]; - } else { - /* Relative seek outwards. */ - fdc->seek_dir = 1; - fdc_seek(fdc, fdc->drive, -fdc->params[1]); - fdc->pcn[fdc->params[0] & 3] -= fdc->params[1]; - } - fdc->step = 1; - } else { - fdc->st0 = 0x20 | (fdc->params[0] & 3); - if (fdc->flags & FDC_FLAG_PCJR) { - fdc->fintr = 1; - fdc->interrupt = -4; - } else { - timer_disable(&fdc->timer); - fdc->interrupt = -3; - fdc_callback(fdc); - } - break; - } - } else { - fdc_log("Seeking to track %i (PCN = %i)...\n", fdc->params[1], fdc->pcn[fdc->params[0] & 3]); - if ((fdc->params[1] - fdc->pcn[fdc->params[0] & 3]) == 0) { - fdc_log("Failed seek\n"); - fdc->st0 = 0x20 | (fdc->params[0] & 3); - if (fdc->flags & FDC_FLAG_PCJR) { - fdc->fintr = 1; - fdc->interrupt = -4; - } else { - timer_disable(&fdc->timer); - fdc->interrupt = -3; - fdc_callback(fdc); - } - break; - } - if (fdc->params[1] > fdc->pcn[fdc->params[0] & 3]) - fdc->seek_dir = 0; - else - fdc->seek_dir = 1; - fdc_seek(fdc, fdc->drive, fdc->params[1] - fdc->pcn[fdc->params[0] & 3]); - fdc->pcn[fdc->params[0] & 3] = fdc->params[1]; - fdc->step = 1; - } - break; - case 0x12: /* Perpendicular mode */ - fdc->stat = 0x80; - if (fdc->params[0] & 0x80) - fdc->perp = fdc->params[0] & 0x3f; - else { - fdc->perp &= 0xfc; - fdc->perp |= (fdc->params[0] & 0x03); - } - return; - } - } else - fdc->stat = 0x90 | (fdc->stat & 0xf); - } - return; - case 7: - if (!(fdc->flags & FDC_FLAG_TOSHIBA) && !(fdc->flags & FDC_FLAG_AT) && !(fdc->flags & FDC_FLAG_UMC)) - return; - fdc->rate = val & 0x03; - if (fdc->flags & FDC_FLAG_PS1) - fdc->noprec = !!(val & 0x04); - return; + case 0x07: /* Recalibrate */ + fdc->rw_drive = fdc->params[0] & 3; + fdc->stat = (1 << real_drive(fdc, fdc->drive)); + if (!(fdc->flags & FDC_FLAG_PCJR)) + fdc->stat |= 0x80; + fdc->st0 = fdc->params[0] & 3; + fdc->st0 |= fdd_get_head(real_drive(fdc, fdc->drive)) ? 0x04 : 0x00; + fdc->st0 |= 0x80; + drive_num = real_drive(fdc, fdc->drive); + /* Three conditions under which the command should fail. */ + if ((drive_num >= FDD_NUM) || !fdd_get_flags(drive_num) || !motoron[drive_num] || fdd_track0(drive_num)) { + fdc_log("Failed recalibrate\n"); + if ((drive_num >= FDD_NUM) || !fdd_get_flags(drive_num) || !motoron[drive_num]) + fdc->st0 = 0x70 | (fdc->params[0] & 3); + else + fdc->st0 = 0x20 | (fdc->params[0] & 3); + fdc->pcn[fdc->params[0] & 3] = 0; + if (fdc->flags & FDC_FLAG_PCJR) { + fdc->fintr = 1; + fdc->interrupt = -4; + } else { + timer_disable(&fdc->timer); + fdc->interrupt = -3; + fdc_callback(fdc); + } + break; + } + if ((real_drive(fdc, fdc->drive) != 1) || fdc->drv2en) + fdc_seek(fdc, fdc->drive, -fdc->max_track); + fdc_log("Recalibrating...\n"); + fdc->seek_dir = fdc->step = 1; + break; + case 0x0a: /* Read sector ID */ + fdc_rate(fdc, fdc->drive); + fdc->head = (fdc->params[0] & 4) ? 1 : 0; + fdd_set_head(real_drive(fdc, fdc->drive), (fdc->params[0] & 4) ? 1 : 0); + if ((real_drive(fdc, fdc->drive) != 1) || fdc->drv2en) { + fdd_readaddress(real_drive(fdc, fdc->drive), fdc->head, fdc->rate); + if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) + fdc->stat = 0x70; + else + fdc->stat = 0x50; + } else + fdc_noidam(fdc); + break; + case 0x0d: /* Format */ + fdc_rate(fdc, fdc->drive); + fdc->head = (fdc->params[0] & 4) ? 1 : 0; + fdd_set_head(real_drive(fdc, fdc->drive), (fdc->params[0] & 4) ? 1 : 0); + fdc->gap = fdc->params[3]; + fdc->format_sectors = fdc->params[2]; + fdc->format_n = fdc->params[1]; + fdc->format_state = 1; + fdc->pos = 0; + fdc->stat = 0x10; + break; + case 0x0f: /* Seek */ + fdc->rw_drive = fdc->params[0] & 3; + fdc->stat = (1 << fdc->drive); + if (!(fdc->flags & FDC_FLAG_PCJR)) + fdc->stat |= 0x80; + /* fdc->head = (fdc->params[0] & 4) ? 1 : 0; */ + fdc->head = 0; /* TODO: See if this is correct. */ + fdc->st0 = fdc->params[0] & 0x03; + fdc->st0 |= (fdc->params[0] & 4); + fdc->st0 |= 0x80; + fdd_set_head(real_drive(fdc, fdc->drive), (fdc->params[0] & 4) ? 1 : 0); + drive_num = real_drive(fdc, fdc->drive); + /* Three conditions under which the command should fail. */ + if (!fdd_get_flags(drive_num) || (drive_num >= FDD_NUM) || !motoron[drive_num]) { + /* Yes, failed SEEK's still report success, unlike failed RECALIBRATE's. */ + fdc->st0 = 0x20 | (fdc->params[0] & 3); + if (fdc->command & 0x80) { + if (fdc->command & 0x40) + fdc->pcn[fdc->params[0] & 3] += fdc->params[1]; + else + fdc->pcn[fdc->params[0] & 3] -= fdc->params[1]; + } else + fdc->pcn[fdc->params[0] & 3] = fdc->params[1]; + if (fdc->flags & FDC_FLAG_PCJR) { + fdc->fintr = 1; + fdc->interrupt = -4; + } else { + timer_disable(&fdc->timer); + fdc->interrupt = -3; + fdc_callback(fdc); + } + break; + } + if (fdc->command & 0x80) { + if (fdc->params[1]) { + if (fdc->command & 0x40) { + /* Relative seek inwards. */ + fdc->seek_dir = 0; + fdc_seek(fdc, fdc->drive, fdc->params[1]); + fdc->pcn[fdc->params[0] & 3] += fdc->params[1]; + } else { + /* Relative seek outwards. */ + fdc->seek_dir = 1; + fdc_seek(fdc, fdc->drive, -fdc->params[1]); + fdc->pcn[fdc->params[0] & 3] -= fdc->params[1]; + } + fdc->step = 1; + } else { + fdc->st0 = 0x20 | (fdc->params[0] & 3); + if (fdc->flags & FDC_FLAG_PCJR) { + fdc->fintr = 1; + fdc->interrupt = -4; + } else { + timer_disable(&fdc->timer); + fdc->interrupt = -3; + fdc_callback(fdc); + } + break; + } + } else { + fdc_log("Seeking to track %i (PCN = %i)...\n", fdc->params[1], fdc->pcn[fdc->params[0] & 3]); + if ((fdc->params[1] - fdc->pcn[fdc->params[0] & 3]) == 0) { + fdc_log("Failed seek\n"); + fdc->st0 = 0x20 | (fdc->params[0] & 3); + if (fdc->flags & FDC_FLAG_PCJR) { + fdc->fintr = 1; + fdc->interrupt = -4; + } else { + timer_disable(&fdc->timer); + fdc->interrupt = -3; + fdc_callback(fdc); + } + break; + } + if (fdc->params[1] > fdc->pcn[fdc->params[0] & 3]) + fdc->seek_dir = 0; + else + fdc->seek_dir = 1; + fdc_seek(fdc, fdc->drive, fdc->params[1] - fdc->pcn[fdc->params[0] & 3]); + fdc->pcn[fdc->params[0] & 3] = fdc->params[1]; + fdc->step = 1; + } + break; + case 0x12: /* Perpendicular mode */ + fdc->stat = 0x80; + if (fdc->params[0] & 0x80) + fdc->perp = fdc->params[0] & 0x3f; + else { + fdc->perp &= 0xfc; + fdc->perp |= (fdc->params[0] & 0x03); + } + return; + } + } else + fdc->stat = 0x90 | (fdc->stat & 0xf); + } + return; + case 7: + if (!(fdc->flags & FDC_FLAG_TOSHIBA) && !(fdc->flags & FDC_FLAG_AT) && !(fdc->flags & FDC_FLAG_UMC)) + return; + fdc->rate = val & 0x03; + if (fdc->flags & FDC_FLAG_PS1) + fdc->noprec = !!(val & 0x04); + return; } } - uint8_t fdc_read(uint16_t addr, void *priv) { - fdc_t *fdc = (fdc_t *) priv; + fdc_t *fdc = (fdc_t *) priv; uint8_t ret; - int drive; + int drive; cycles -= ISA_CYCLES(8); switch (addr & 7) { - case 0: /* STA */ - if (fdc->flags & FDC_FLAG_PS1) { - drive = real_drive(fdc, fdc->dor & 3); - ret = 0x00; - /* TODO: - Bit 2: INDEX (best return always 0 as it goes by very fast) - */ - if (fdc->seek_dir) /* nDIRECTION */ - ret |= 0x01; - if (writeprot[drive]) /* WRITEPROT */ - ret |= 0x02; - if (!fdd_get_head(drive)) /* nHDSEL */ - ret |= 0x08; - if (fdd_track0(drive)) /* TRK0 */ - ret |= 0x10; - if (fdc->step) /* STEP */ - ret |= 0x20; - if (dma_get_drq(fdc->dma_ch)) /* DRQ */ - ret |= 0x40; - if (fdc->fintr || fdc->reset_stat) /* INTR */ - ret |= 0x80; - } else - ret = 0xff; - break; - case 1: /* STB */ - if (fdc->flags & FDC_FLAG_PS1) { - drive = real_drive(fdc, fdc->dor & 3); - ret = 0x00; - /* -Drive 2 Installed */ - if (!fdd_get_type(1)) - ret |= 0x80; - /* -Drive Select 1,0 */ - switch (drive) { - case 0: - ret |= 0x43; - break; - case 1: - ret |= 0x23; - break; - case 2: - ret |= 0x62; - break; - case 3: - ret |= 0x61; - break; - } - } else { - if (is486 || !fdc->enable_3f1) - ret = 0xff; - else{ - if(fdc->flags & FDC_FLAG_UMC) - { - drive = real_drive(fdc, fdc->dor & 1); - ret = !fdd_is_dd(drive) ? ((fdc->dor & 1) ? 2 : 1) : 0; - } - else { - ret = 0x70; + case 0: /* STA */ + if (fdc->flags & FDC_FLAG_PS1) { + drive = real_drive(fdc, fdc->dor & 3); + ret = 0x00; + /* TODO: + Bit 2: INDEX (best return always 0 as it goes by very fast) + */ + if (fdc->seek_dir) /* nDIRECTION */ + ret |= 0x01; + if (writeprot[drive]) /* WRITEPROT */ + ret |= 0x02; + if (!fdd_get_head(drive)) /* nHDSEL */ + ret |= 0x08; + if (fdd_track0(drive)) /* TRK0 */ + ret |= 0x10; + if (fdc->step) /* STEP */ + ret |= 0x20; + if (dma_get_drq(fdc->dma_ch)) /* DRQ */ + ret |= 0x40; + if (fdc->fintr || fdc->reset_stat) /* INTR */ + ret |= 0x80; + } else + ret = 0xff; + break; + case 1: /* STB */ + if (fdc->flags & FDC_FLAG_PS1) { + drive = real_drive(fdc, fdc->dor & 3); + ret = 0x00; + /* -Drive 2 Installed */ + if (!fdd_get_type(1)) + ret |= 0x80; + /* -Drive Select 1,0 */ + switch (drive) { + case 0: + ret |= 0x43; + break; + case 1: + ret |= 0x23; + break; + case 2: + ret |= 0x62; + break; + case 3: + ret |= 0x61; + break; + } + } else { + if (is486 || !fdc->enable_3f1) + ret = 0xff; + else { + if (fdc->flags & FDC_FLAG_UMC) { + drive = real_drive(fdc, fdc->dor & 1); + ret = !fdd_is_dd(drive) ? ((fdc->dor & 1) ? 2 : 1) : 0; + } else { + ret = 0x70; - drive = real_drive(fdc, fdc->dor & 3); + drive = real_drive(fdc, fdc->dor & 3); - if (drive) - ret &= ~0x40; - else - ret &= ~0x20; + if (drive) + ret &= ~0x40; + else + ret &= ~0x20; - if (fdc->dor & 0x10) - ret |= 1; - if (fdc->dor & 0x20) - ret |= 2; - } - } - } - break; - case 2: - ret = fdc->dor; - break; - case 3: - drive = real_drive(fdc, fdc->dor & 3); - if (fdc->flags & FDC_FLAG_PS1) { - /* PS/1 Model 2121 seems return drive type in port - * 0x3f3, despite the 82077AA fdc_t not implementing - * this. This is presumably implemented outside the - * fdc_t on one of the motherboard's support chips. - * - * Confirmed: 00=1.44M 3.5 - * 10=2.88M 3.5 - * 20=1.2M 5.25 - * 30=1.2M 5.25 - * - * as reported by Configur.exe. - */ - if (fdd_is_525(drive)) - ret = 0x20; - else if (fdd_is_ed(drive)) - ret = 0x10; - else - ret = 0x00; - } else if (!fdc->enh_mode) - ret = 0x20; - else - ret = fdc->rwc[drive] << 4; - break; - case 4: /*Status*/ - ret = fdc->stat; - break; - case 5: /*Data*/ - if ((fdc->stat & 0xf0) == 0xf0) { - fdc->stat &= ~0x80; - if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->fifo) { - fdc->data_ready = 0; - ret = fdc->dat; - } else - ret = fdc_fifo_buf_read(fdc); - break; - } - fdc->stat &= ~0x80; - if (fdc->paramstogo) { - fdc_log("%i parameters to go\n", fdc->paramstogo); - fdc->paramstogo--; - ret = fdc->res[10 - fdc->paramstogo]; - if (!fdc->paramstogo) - fdc->stat = 0x80; - else - fdc->stat |= 0xC0; - } else { - if (lastbyte) - fdc->stat = 0x80; - lastbyte = 0; - ret = fdc->dat; - fdc->data_ready = 0; - } - fdc->stat &= 0xf0; - break; - case 7: /*Disk change*/ - drive = real_drive(fdc, fdc->dor & 3); + if (fdc->dor & 0x10) + ret |= 1; + if (fdc->dor & 0x20) + ret |= 2; + } + } + } + break; + case 2: + ret = fdc->dor; + break; + case 3: + drive = real_drive(fdc, fdc->dor & 3); + if (fdc->flags & FDC_FLAG_PS1) { + /* PS/1 Model 2121 seems return drive type in port + * 0x3f3, despite the 82077AA fdc_t not implementing + * this. This is presumably implemented outside the + * fdc_t on one of the motherboard's support chips. + * + * Confirmed: 00=1.44M 3.5 + * 10=2.88M 3.5 + * 20=1.2M 5.25 + * 30=1.2M 5.25 + * + * as reported by Configur.exe. + */ + if (fdd_is_525(drive)) + ret = 0x20; + else if (fdd_is_ed(drive)) + ret = 0x10; + else + ret = 0x00; + } else if (!fdc->enh_mode) + ret = 0x20; + else + ret = fdc->rwc[drive] << 4; + break; + case 4: /*Status*/ + ret = fdc->stat; + break; + case 5: /*Data*/ + if ((fdc->stat & 0xf0) == 0xf0) { + fdc->stat &= ~0x80; + if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->fifo) { + fdc->data_ready = 0; + ret = fdc->dat; + } else + ret = fdc_fifo_buf_read(fdc); + break; + } + fdc->stat &= ~0x80; + if (fdc->paramstogo) { + fdc_log("%i parameters to go\n", fdc->paramstogo); + fdc->paramstogo--; + ret = fdc->res[10 - fdc->paramstogo]; + if (!fdc->paramstogo) + fdc->stat = 0x80; + else + fdc->stat |= 0xC0; + } else { + if (lastbyte) + fdc->stat = 0x80; + lastbyte = 0; + ret = fdc->dat; + fdc->data_ready = 0; + } + fdc->stat &= 0xf0; + break; + case 7: /*Disk change*/ + drive = real_drive(fdc, fdc->dor & 3); - if (fdc->flags & FDC_FLAG_PS1) { - if (fdc->dor & (0x10 << drive)) { - ret = (fdd_changed[drive] || drive_empty[drive]) ? 0x00 : 0x80; - ret |= (fdc->dor & 0x08); - ret |= (fdc->noprec << 2); - ret |= (fdc->rate & 0x03); - } else - ret = 0x00; - } else { - if (fdc->dor & (0x10 << drive)) { - if ((drive == 1) && (fdc->flags & FDC_FLAG_TOSHIBA)) - ret = 0x00; - else - ret = (fdd_changed[drive] || drive_empty[drive]) ? 0x80 : 0x00; - } else - ret = 0x00; - if (fdc->flags & FDC_FLAG_DISKCHG_ACTLOW) /*PC2086/3086 seem to reverse this bit*/ - ret ^= 0x80; + if (fdc->flags & FDC_FLAG_PS1) { + if (fdc->dor & (0x10 << drive)) { + ret = (fdd_changed[drive] || drive_empty[drive]) ? 0x00 : 0x80; + ret |= (fdc->dor & 0x08); + ret |= (fdc->noprec << 2); + ret |= (fdc->rate & 0x03); + } else + ret = 0x00; + } else { + if (fdc->dor & (0x10 << drive)) { + if ((drive == 1) && (fdc->flags & FDC_FLAG_TOSHIBA)) + ret = 0x00; + else + ret = (fdd_changed[drive] || drive_empty[drive]) ? 0x80 : 0x00; + } else + ret = 0x00; + if (fdc->flags & FDC_FLAG_DISKCHG_ACTLOW) /*PC2086/3086 seem to reverse this bit*/ + ret ^= 0x80; - /* 0 = ????, 1 = Ext. FDD off, 2 = Ext. FDD = FDD A, 3 = Ext. FDD = FDD B */ - if (fdc->flags & FDC_FLAG_TOSHIBA) { - ret |= (3 << 5); - ret |= 0x01; - } else - ret |= 0x7F; - } + /* 0 = ????, 1 = Ext. FDD off, 2 = Ext. FDD = FDD A, 3 = Ext. FDD = FDD B */ + if (fdc->flags & FDC_FLAG_TOSHIBA) { + ret |= (3 << 5); + ret |= 0x01; + } else + ret |= 0x7F; + } - fdc->step = 0; - break; - default: - ret = 0xFF; + fdc->step = 0; + break; + default: + ret = 0xFF; } // fdc_log("Read FDC %04X %02X\n", addr, ret); fdc_log("[%04X:%08X] Read FDC %04X %02X [%i:%02X]\n", CS, cpu_state.pc, addr, ret, drive, fdc->dor & (0x10 << drive)); @@ -1471,69 +1405,67 @@ fdc_poll_common_finish(fdc_t *fdc, int compare, int st5) { fdc_int(fdc, 1); if (!(fdc->flags & FDC_FLAG_PS1)) - fdc->fintr = 0; + fdc->fintr = 0; fdc->stat = 0xD0; fdc->st0 = fdc->res[4] = (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0) | fdc->rw_drive; - fdc->res[5] = st5; - fdc->res[6] = 0; + fdc->res[5] = st5; + fdc->res[6] = 0; if (fdc->error) { - fdc->error = 0; + fdc->error = 0; fdc->st0 |= 0x40; - fdc->res[4] |= 0x40; - fdc->res[5] |= fdc->st5; - fdc->res[6] |= fdc->st6; + fdc->res[4] |= 0x40; + fdc->res[5] |= fdc->st5; + fdc->res[6] |= fdc->st6; } if (fdc->wrong_am) { - fdc->res[6] |= 0x40; - fdc->wrong_am = 0; + fdc->res[6] |= 0x40; + fdc->wrong_am = 0; } if (compare == 1) { - if (!fdc->satisfying_sectors) - fdc->res[6] |= 4; - else if (fdc->satisfying_sectors == (fdc->params[5] << ((fdc->command & 80) ? 1 : 0))) - fdc->res[6] |= 8; + if (!fdc->satisfying_sectors) + fdc->res[6] |= 4; + else if (fdc->satisfying_sectors == (fdc->params[5] << ((fdc->command & 80) ? 1 : 0))) + fdc->res[6] |= 8; } else if (compare == 2) { - if (fdc->satisfying_sectors & 1) - fdc->res[5] |= 0x20; - if (fdc->satisfying_sectors & 2) { - fdc->res[5] |= 0x20; - fdc->res[6] |= 0x20; - } - if (fdc->satisfying_sectors & 4) - fdc->res[5] |= 0x04; - if (fdc->satisfying_sectors & 8) { - fdc->res[5] |= 0x04; - fdc->res[6] |= 0x02; - } - if (fdc->satisfying_sectors & 0x10) { - fdc->res[5] |= 0x04; - fdc->res[6] |= 0x10; - } + if (fdc->satisfying_sectors & 1) + fdc->res[5] |= 0x20; + if (fdc->satisfying_sectors & 2) { + fdc->res[5] |= 0x20; + fdc->res[6] |= 0x20; + } + if (fdc->satisfying_sectors & 4) + fdc->res[5] |= 0x04; + if (fdc->satisfying_sectors & 8) { + fdc->res[5] |= 0x04; + fdc->res[6] |= 0x02; + } + if (fdc->satisfying_sectors & 0x10) { + fdc->res[5] |= 0x04; + fdc->res[6] |= 0x10; + } } - fdc->res[7]=fdc->rw_track; - fdc->res[8]=fdc->head; - fdc->res[9]=fdc->sector; - fdc->res[10]=fdc->params[4]; - fdc_log("Read/write finish (%02X %02X %02X %02X %02X %02X %02X)\n" , fdc->res[4], fdc->res[5], fdc->res[6], fdc->res[7], fdc->res[8], fdc->res[9], fdc->res[10]); + fdc->res[7] = fdc->rw_track; + fdc->res[8] = fdc->head; + fdc->res[9] = fdc->sector; + fdc->res[10] = fdc->params[4]; + fdc_log("Read/write finish (%02X %02X %02X %02X %02X %02X %02X)\n", fdc->res[4], fdc->res[5], fdc->res[6], fdc->res[7], fdc->res[8], fdc->res[9], fdc->res[10]); ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 0); fdc->paramstogo = 7; dma_set_drq(fdc->dma_ch, 0); } - static void fdc_poll_readwrite_finish(fdc_t *fdc, int compare) { if ((fdc->interrupt == 5) || (fdc->interrupt == 9)) - fdd_do_writeback(real_drive(fdc, fdc->drive)); + fdd_do_writeback(real_drive(fdc, fdc->drive)); - fdc->inread = 0; + fdc->inread = 0; fdc->interrupt = -2; fdc_poll_common_finish(fdc, compare, 0); } - static void fdc_no_dma_end(fdc_t *fdc, int compare) { @@ -1542,298 +1474,296 @@ fdc_no_dma_end(fdc_t *fdc, int compare) fdc_poll_common_finish(fdc, compare, 0x80); } - static void fdc_callback(void *priv) { - fdc_t *fdc = (fdc_t *) priv; - int compare = 0; - int drive_num = 0; - int old_sector = 0; + fdc_t *fdc = (fdc_t *) priv; + int compare = 0; + int drive_num = 0; + int old_sector = 0; fdc_log("fdc_callback(): %i\n", fdc->interrupt); switch (fdc->interrupt) { - case -3: /*End of command with interrupt*/ - case -4: /*Recalibrate/seek interrupt (PCjr only)*/ - fdc_int(fdc, fdc->interrupt & 1); - fdc->stat = (fdc->stat & 0xf) | 0x80; - return; - case -2: /*End of command*/ - fdc->stat = (fdc->stat & 0xf) | 0x80; - return; - case -1: /*Reset*/ - fdc_int(fdc, 1); - fdc->fintr = 0; - memset(fdc->pcn, 0, 4 * sizeof(int)); - fdc->reset_stat = 4; - return; - case 0x01: /* Mode */ - fdc->stat=0x80; - fdc->densel_force = (fdc->params[2] & 0xC0) >> 6; - return; - case 0x02: /* Read track */ - ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 1); - fdc->eot[fdc->drive]--; - fdc->read_track_sector.id.r++; - if (!fdc->eot[fdc->drive] || fdc->tc) { - fdc_poll_readwrite_finish(fdc, 2); - return; - } else { - fdd_readsector(real_drive(fdc, fdc->drive), SECTOR_NEXT, fdc->rw_track, fdc->head, fdc->rate, fdc->params[4]); - if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) - fdc->stat = 0x70; - else { - dma_set_drq(fdc->dma_ch, 1); - fdc->stat = 0x50; - } - } - fdc->inread = 1; - return; - case 0x04: /* Sense drive status */ - fdc->res[10] = (fdc->params[0] & 7) | 0x20; - if (fdd_is_double_sided(real_drive(fdc, fdc->drive))) - fdc->res[10] |= 0x08; - if ((real_drive(fdc, fdc->drive) != 1) || fdc->drv2en) { - if (fdd_track0(real_drive(fdc, fdc->drive))) - fdc->res[10] |= 0x10; - } - if (writeprot[fdc->drive]) - fdc->res[10] |= 0x40; + case -3: /*End of command with interrupt*/ + case -4: /*Recalibrate/seek interrupt (PCjr only)*/ + fdc_int(fdc, fdc->interrupt & 1); + fdc->stat = (fdc->stat & 0xf) | 0x80; + return; + case -2: /*End of command*/ + fdc->stat = (fdc->stat & 0xf) | 0x80; + return; + case -1: /*Reset*/ + fdc_int(fdc, 1); + fdc->fintr = 0; + memset(fdc->pcn, 0, 4 * sizeof(int)); + fdc->reset_stat = 4; + return; + case 0x01: /* Mode */ + fdc->stat = 0x80; + fdc->densel_force = (fdc->params[2] & 0xC0) >> 6; + return; + case 0x02: /* Read track */ + ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 1); + fdc->eot[fdc->drive]--; + fdc->read_track_sector.id.r++; + if (!fdc->eot[fdc->drive] || fdc->tc) { + fdc_poll_readwrite_finish(fdc, 2); + return; + } else { + fdd_readsector(real_drive(fdc, fdc->drive), SECTOR_NEXT, fdc->rw_track, fdc->head, fdc->rate, fdc->params[4]); + if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) + fdc->stat = 0x70; + else { + dma_set_drq(fdc->dma_ch, 1); + fdc->stat = 0x50; + } + } + fdc->inread = 1; + return; + case 0x04: /* Sense drive status */ + fdc->res[10] = (fdc->params[0] & 7) | 0x20; + if (fdd_is_double_sided(real_drive(fdc, fdc->drive))) + fdc->res[10] |= 0x08; + if ((real_drive(fdc, fdc->drive) != 1) || fdc->drv2en) { + if (fdd_track0(real_drive(fdc, fdc->drive))) + fdc->res[10] |= 0x10; + } + if (writeprot[fdc->drive]) + fdc->res[10] |= 0x40; - fdc->stat = (fdc->stat & 0xf) | 0xd0; - fdc->paramstogo = 1; - fdc->interrupt = 0; - return; - case 0x05: /* Write data */ - case 0x09: /* Write deleted data */ - case 0x06: /* Read data */ - case 0x0c: /* Read deleted data */ - case 0x11: /* Scan equal */ - case 0x19: /* Scan low or equal */ - case 0x1c: /* Verify */ - case 0x1d: /* Scan high or equal */ - if ((fdc->interrupt == 0x11) || (fdc->interrupt == 0x19) || (fdc->interrupt == 0x1D)) - compare = 1; - else - compare = 0; - if ((fdc->interrupt == 6) || (fdc->interrupt == 0xC)) { - if (fdc->wrong_am && !(fdc->deleted & 0x20)) { - /* Mismatching data address mark and no skip, set TC. */ - fdc->tc = 1; - } - } - old_sector = fdc->sector; - if (fdc->tc) { - /* This is needed so that the correct results are returned - in case of TC. */ - if (fdc->sector == fdc->params[5]) { - if (!(fdc->command & 0x80)) { - fdc->rw_track++; - fdc->sector = 1; - } else { - if (fdc->head) - fdc->rw_track++; + fdc->stat = (fdc->stat & 0xf) | 0xd0; + fdc->paramstogo = 1; + fdc->interrupt = 0; + return; + case 0x05: /* Write data */ + case 0x09: /* Write deleted data */ + case 0x06: /* Read data */ + case 0x0c: /* Read deleted data */ + case 0x11: /* Scan equal */ + case 0x19: /* Scan low or equal */ + case 0x1c: /* Verify */ + case 0x1d: /* Scan high or equal */ + if ((fdc->interrupt == 0x11) || (fdc->interrupt == 0x19) || (fdc->interrupt == 0x1D)) + compare = 1; + else + compare = 0; + if ((fdc->interrupt == 6) || (fdc->interrupt == 0xC)) { + if (fdc->wrong_am && !(fdc->deleted & 0x20)) { + /* Mismatching data address mark and no skip, set TC. */ + fdc->tc = 1; + } + } + old_sector = fdc->sector; + if (fdc->tc) { + /* This is needed so that the correct results are returned + in case of TC. */ + if (fdc->sector == fdc->params[5]) { + if (!(fdc->command & 0x80)) { + fdc->rw_track++; + fdc->sector = 1; + } else { + if (fdc->head) + fdc->rw_track++; - fdc->head ^= 1; - fdd_set_head(real_drive(fdc, fdc->drive), fdc->head); - fdc->sector = 1; - } - } else - fdc->sector++; - fdc_poll_readwrite_finish(fdc, compare); - return; - } - if ((fdc->interrupt == 0x16) && (fdc->params[0] & 0x80)) { - /* VERIFY command, EC set */ - fdc->sc--; - if (!fdc->sc) { - fdc->sector++; - fdc_poll_readwrite_finish(fdc, 0); - return; - } - /* The rest is processed normally per MT flag and EOT. */ - } else if ((fdc->interrupt == 0x16) && !(fdc->params[0] & 0x80)) { - /* VERIFY command, EC clear */ - if ((fdc->sector == old_sector) && (fdc->head == (fdc->command & 0x80) ? 1 : 0)) { - fdc->sector++; - fdc_poll_readwrite_finish(fdc, 0); - return; - } - } - if (fdc->sector == fdc->params[5]) { - /* Reached end of track, MT bit is clear */ - if (!(fdc->command & 0x80)) { - fdc->rw_track++; - fdc->sector = 1; - if (!(fdc->flags & FDC_FLAG_PCJR) && fdc->dma && (old_sector == 255)) - fdc_no_dma_end(fdc, compare); - else - fdc_poll_readwrite_finish(fdc, compare); - return; - } - /* Reached end of track, MT bit is set, head is 1 */ - if (fdd_get_head(real_drive(fdc, fdc->drive)) == 1) { - fdc->rw_track++; - fdc->sector = 1; - fdc->head &= 0xFE; - fdd_set_head(real_drive(fdc, fdc->drive), 0); - if (!(fdc->flags & FDC_FLAG_PCJR) && fdc->dma && (old_sector == 255)) - fdc_no_dma_end(fdc, compare); - else - fdc_poll_readwrite_finish(fdc, compare); - return; - } - if ((fdd_get_head(real_drive(fdc, fdc->drive)) == 0)) { - fdc->sector = 1; - fdc->head |= 1; - fdd_set_head(real_drive(fdc, fdc->drive), 1); - if (!fdd_is_double_sided(real_drive(fdc, fdc->drive))) { - fdc_noidam(fdc); - return; - } - } - } else if (fdc->sector < fdc->params[5]) - fdc->sector++; - ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 1); - switch (fdc->interrupt) { - case 5: - case 9: - fdd_writesector(real_drive(fdc, fdc->drive), fdc->sector, fdc->rw_track, fdc->head, fdc->rate, fdc->params[4]); - if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) - fdc->stat = 0xb0; - else { - dma_set_drq(fdc->dma_ch, 1); - fdc->stat = 0x90; - } - break; - case 6: - case 0xC: - case 0x16: - fdd_readsector(real_drive(fdc, fdc->drive), fdc->sector, fdc->rw_track, fdc->head, fdc->rate, fdc->params[4]); - if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) - fdc->stat = 0x70; - else { - dma_set_drq(fdc->dma_ch, 1); - fdc->stat = 0x50; - } - break; - case 0x11: - case 0x19: - case 0x1D: - fdd_comparesector(real_drive(fdc, fdc->drive), fdc->sector, fdc->rw_track, fdc->head, fdc->rate, fdc->params[4]); - if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) - fdc->stat = 0xb0; - else { - dma_set_drq(fdc->dma_ch, 1); - fdc->stat = 0x90; - } - break; - } - fdc->inread = 1; - return; - case 0x07: /* Recalibrate */ - fdc->pcn[fdc->params[0] & 3] = 0; - drive_num = real_drive(fdc, fdc->rw_drive); - fdc->st0 = 0x20 | (fdc->params[0] & 3); - if (!fdd_track0(drive_num)) - fdc->st0 |= 0x50; - if (fdc->flags & FDC_FLAG_PCJR) { - fdc->fintr = 1; - fdc->interrupt = -4; - } else - fdc->interrupt = -3; - timer_set_delay_u64(&fdc->timer, 2048 * TIMER_USEC); - fdc->stat = 0x80 | (1 << fdc->rw_drive); - return; - case 0x0d: /*Format track*/ - if (fdc->format_state == 1) { - fdc->format_state = 2; - timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC); - } else if (fdc->format_state == 2) { - fdd_format(real_drive(fdc, fdc->drive), fdc->head, fdc->rate, fdc->params[4]); - fdc->format_state = 3; - } else { - fdc->interrupt = -2; - fdc_int(fdc, 1); - if (!(fdc->flags & FDC_FLAG_PS1)) - fdc->fintr = 0; - fdc->stat = 0xD0; - fdc->st0 = fdc->res[4] = (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0) | fdc->drive; - fdc->res[5] = fdc->res[6] = 0; - fdc->res[7] = fdc->format_sector_id.id.c; - fdc->res[8] = fdc->format_sector_id.id.h; - fdc->res[9] = fdc->format_sector_id.id.r; - fdc->res[10] = fdc->format_sector_id.id.n; - fdc->paramstogo = 7; - fdc->format_state = 0; - return; - } - return; - case 0x0e: /*Dump registers*/ - fdc->stat = (fdc->stat & 0xf) | 0xd0; - fdc->res[1] = fdc->pcn[0]; - fdc->res[2] = fdc->pcn[1]; - fdc->res[3] = fdc->pcn[2]; - fdc->res[4] = fdc->pcn[3]; - fdc->res[5] = fdc->specify[0]; - fdc->res[6] = fdc->specify[1]; - fdc->res[7] = fdc->eot[fdc->drive]; - fdc->res[8] = (fdc->perp & 0x7f) | ((fdc->lock) ? 0x80 : 0); - fdc->res[9] = fdc->config; - fdc->res[10] = fdc->pretrk; - fdc->paramstogo = 10; - fdc->interrupt = 0; - return; - case 0x0f: /*Seek*/ - fdc->st0 = 0x20 | (fdc->params[0] & 3); - fdc->stat = 0x80 | (1 << fdc->rw_drive); - if (fdc->flags & FDC_FLAG_PCJR) { - fdc->fintr = 1; - fdc->interrupt = -4; - timer_set_delay_u64(&fdc->timer, 1024 * TIMER_USEC); - } else { - fdc->interrupt = -3; - fdc_callback(fdc); - } - return; - case 0x10: /*Version*/ - case 0x18: /*NSC*/ - fdc->stat = (fdc->stat & 0xf) | 0xd0; - fdc->res[10] = (fdc->interrupt & 0x08) ? 0x73 : 0x90; - fdc->paramstogo = 1; - fdc->interrupt = 0; - return; - case 0x17: /*Powerdown mode*/ - fdc->stat = (fdc->stat & 0xf) | 0xd0; - fdc->res[10] = fdc->params[0]; - fdc->paramstogo = 1; - fdc->interrupt = 0; - return; - case 0x13: /*Configure*/ - fdc->config = fdc->params[1]; - fdc->pretrk = fdc->params[2]; - fdc->fifo = (fdc->params[1] & 0x20) ? 0 : 1; - fdc->tfifo = (fdc->params[1] & 0xF); - fdc->stat = 0x80; - return; - case 0x14: /*Unlock*/ - case 0x94: /*Lock*/ - fdc->lock = (fdc->interrupt & 0x80) ? 1 : 0; - fdc->stat = (fdc->stat & 0xf) | 0xd0; - fdc->res[10] = (fdc->interrupt & 0x80) ? 0x10 : 0x00; - fdc->paramstogo = 1; - fdc->interrupt = 0; - return; - case 0xfc: /*Invalid*/ - fdc->dat = fdc->st0 = 0x80; - fdc->stat = (fdc->stat & 0xf) | 0xd0; - fdc->res[10] = fdc->st0; - fdc->paramstogo = 1; - fdc->interrupt = 0; - return; + fdc->head ^= 1; + fdd_set_head(real_drive(fdc, fdc->drive), fdc->head); + fdc->sector = 1; + } + } else + fdc->sector++; + fdc_poll_readwrite_finish(fdc, compare); + return; + } + if ((fdc->interrupt == 0x16) && (fdc->params[0] & 0x80)) { + /* VERIFY command, EC set */ + fdc->sc--; + if (!fdc->sc) { + fdc->sector++; + fdc_poll_readwrite_finish(fdc, 0); + return; + } + /* The rest is processed normally per MT flag and EOT. */ + } else if ((fdc->interrupt == 0x16) && !(fdc->params[0] & 0x80)) { + /* VERIFY command, EC clear */ + if ((fdc->sector == old_sector) && (fdc->head == (fdc->command & 0x80) ? 1 : 0)) { + fdc->sector++; + fdc_poll_readwrite_finish(fdc, 0); + return; + } + } + if (fdc->sector == fdc->params[5]) { + /* Reached end of track, MT bit is clear */ + if (!(fdc->command & 0x80)) { + fdc->rw_track++; + fdc->sector = 1; + if (!(fdc->flags & FDC_FLAG_PCJR) && fdc->dma && (old_sector == 255)) + fdc_no_dma_end(fdc, compare); + else + fdc_poll_readwrite_finish(fdc, compare); + return; + } + /* Reached end of track, MT bit is set, head is 1 */ + if (fdd_get_head(real_drive(fdc, fdc->drive)) == 1) { + fdc->rw_track++; + fdc->sector = 1; + fdc->head &= 0xFE; + fdd_set_head(real_drive(fdc, fdc->drive), 0); + if (!(fdc->flags & FDC_FLAG_PCJR) && fdc->dma && (old_sector == 255)) + fdc_no_dma_end(fdc, compare); + else + fdc_poll_readwrite_finish(fdc, compare); + return; + } + if ((fdd_get_head(real_drive(fdc, fdc->drive)) == 0)) { + fdc->sector = 1; + fdc->head |= 1; + fdd_set_head(real_drive(fdc, fdc->drive), 1); + if (!fdd_is_double_sided(real_drive(fdc, fdc->drive))) { + fdc_noidam(fdc); + return; + } + } + } else if (fdc->sector < fdc->params[5]) + fdc->sector++; + ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 1); + switch (fdc->interrupt) { + case 5: + case 9: + fdd_writesector(real_drive(fdc, fdc->drive), fdc->sector, fdc->rw_track, fdc->head, fdc->rate, fdc->params[4]); + if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) + fdc->stat = 0xb0; + else { + dma_set_drq(fdc->dma_ch, 1); + fdc->stat = 0x90; + } + break; + case 6: + case 0xC: + case 0x16: + fdd_readsector(real_drive(fdc, fdc->drive), fdc->sector, fdc->rw_track, fdc->head, fdc->rate, fdc->params[4]); + if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) + fdc->stat = 0x70; + else { + dma_set_drq(fdc->dma_ch, 1); + fdc->stat = 0x50; + } + break; + case 0x11: + case 0x19: + case 0x1D: + fdd_comparesector(real_drive(fdc, fdc->drive), fdc->sector, fdc->rw_track, fdc->head, fdc->rate, fdc->params[4]); + if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) + fdc->stat = 0xb0; + else { + dma_set_drq(fdc->dma_ch, 1); + fdc->stat = 0x90; + } + break; + } + fdc->inread = 1; + return; + case 0x07: /* Recalibrate */ + fdc->pcn[fdc->params[0] & 3] = 0; + drive_num = real_drive(fdc, fdc->rw_drive); + fdc->st0 = 0x20 | (fdc->params[0] & 3); + if (!fdd_track0(drive_num)) + fdc->st0 |= 0x50; + if (fdc->flags & FDC_FLAG_PCJR) { + fdc->fintr = 1; + fdc->interrupt = -4; + } else + fdc->interrupt = -3; + timer_set_delay_u64(&fdc->timer, 2048 * TIMER_USEC); + fdc->stat = 0x80 | (1 << fdc->rw_drive); + return; + case 0x0d: /*Format track*/ + if (fdc->format_state == 1) { + fdc->format_state = 2; + timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC); + } else if (fdc->format_state == 2) { + fdd_format(real_drive(fdc, fdc->drive), fdc->head, fdc->rate, fdc->params[4]); + fdc->format_state = 3; + } else { + fdc->interrupt = -2; + fdc_int(fdc, 1); + if (!(fdc->flags & FDC_FLAG_PS1)) + fdc->fintr = 0; + fdc->stat = 0xD0; + fdc->st0 = fdc->res[4] = (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0) | fdc->drive; + fdc->res[5] = fdc->res[6] = 0; + fdc->res[7] = fdc->format_sector_id.id.c; + fdc->res[8] = fdc->format_sector_id.id.h; + fdc->res[9] = fdc->format_sector_id.id.r; + fdc->res[10] = fdc->format_sector_id.id.n; + fdc->paramstogo = 7; + fdc->format_state = 0; + return; + } + return; + case 0x0e: /*Dump registers*/ + fdc->stat = (fdc->stat & 0xf) | 0xd0; + fdc->res[1] = fdc->pcn[0]; + fdc->res[2] = fdc->pcn[1]; + fdc->res[3] = fdc->pcn[2]; + fdc->res[4] = fdc->pcn[3]; + fdc->res[5] = fdc->specify[0]; + fdc->res[6] = fdc->specify[1]; + fdc->res[7] = fdc->eot[fdc->drive]; + fdc->res[8] = (fdc->perp & 0x7f) | ((fdc->lock) ? 0x80 : 0); + fdc->res[9] = fdc->config; + fdc->res[10] = fdc->pretrk; + fdc->paramstogo = 10; + fdc->interrupt = 0; + return; + case 0x0f: /*Seek*/ + fdc->st0 = 0x20 | (fdc->params[0] & 3); + fdc->stat = 0x80 | (1 << fdc->rw_drive); + if (fdc->flags & FDC_FLAG_PCJR) { + fdc->fintr = 1; + fdc->interrupt = -4; + timer_set_delay_u64(&fdc->timer, 1024 * TIMER_USEC); + } else { + fdc->interrupt = -3; + fdc_callback(fdc); + } + return; + case 0x10: /*Version*/ + case 0x18: /*NSC*/ + fdc->stat = (fdc->stat & 0xf) | 0xd0; + fdc->res[10] = (fdc->interrupt & 0x08) ? 0x73 : 0x90; + fdc->paramstogo = 1; + fdc->interrupt = 0; + return; + case 0x17: /*Powerdown mode*/ + fdc->stat = (fdc->stat & 0xf) | 0xd0; + fdc->res[10] = fdc->params[0]; + fdc->paramstogo = 1; + fdc->interrupt = 0; + return; + case 0x13: /*Configure*/ + fdc->config = fdc->params[1]; + fdc->pretrk = fdc->params[2]; + fdc->fifo = (fdc->params[1] & 0x20) ? 0 : 1; + fdc->tfifo = (fdc->params[1] & 0xF); + fdc->stat = 0x80; + return; + case 0x14: /*Unlock*/ + case 0x94: /*Lock*/ + fdc->lock = (fdc->interrupt & 0x80) ? 1 : 0; + fdc->stat = (fdc->stat & 0xf) | 0xd0; + fdc->res[10] = (fdc->interrupt & 0x80) ? 0x10 : 0x00; + fdc->paramstogo = 1; + fdc->interrupt = 0; + return; + case 0xfc: /*Invalid*/ + fdc->dat = fdc->st0 = 0x80; + fdc->stat = (fdc->stat & 0xf) | 0xd0; + fdc->res[10] = fdc->st0; + fdc->paramstogo = 1; + fdc->interrupt = 0; + return; } } - void fdc_error(fdc_t *fdc, int st5, int st6) { @@ -1843,83 +1773,82 @@ fdc_error(fdc_t *fdc, int st5, int st6) fdc_int(fdc, 1); if (!(fdc->flags & FDC_FLAG_PS1)) - fdc->fintr = 0; + fdc->fintr = 0; fdc->stat = 0xD0; fdc->st0 = fdc->res[4] = 0x40 | (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0) | fdc->rw_drive; if (fdc->head && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) - fdc->st0 |= 0x08; + fdc->st0 |= 0x08; fdc->res[5] = st5; fdc->res[6] = st6; fdc_log("FDC Error: %02X %02X %02X\n", fdc->res[4], fdc->res[5], fdc->res[6]); - switch(fdc->interrupt) { - case 0x02: - case 0x05: - case 0x06: - case 0x09: - case 0x0C: - case 0x11: - case 0x16: - case 0x19: - case 0x1D: - fdc->res[7]=fdc->rw_track; - fdc->res[8]=fdc->head; - fdc->res[9]=fdc->sector; - fdc->res[10]=fdc->params[4]; - break; - default: - fdc->res[7]=0; - fdc->res[8]=0; - fdc->res[9]=0; - fdc->res[10]=0; - break; + switch (fdc->interrupt) { + case 0x02: + case 0x05: + case 0x06: + case 0x09: + case 0x0C: + case 0x11: + case 0x16: + case 0x19: + case 0x1D: + fdc->res[7] = fdc->rw_track; + fdc->res[8] = fdc->head; + fdc->res[9] = fdc->sector; + fdc->res[10] = fdc->params[4]; + break; + default: + fdc->res[7] = 0; + fdc->res[8] = 0; + fdc->res[9] = 0; + fdc->res[10] = 0; + break; } ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 0); fdc->paramstogo = 7; #else - switch(fdc->interrupt) { - case 0x02: - case 0x05: - case 0x06: - case 0x09: - case 0x0C: - case 0x11: - case 0x16: - case 0x19: - case 0x1D: - fdc->error = 1; - fdc->st5 = st5; - fdc->st6 = st6; - fdc->tc = 1; - fdc->stat = 0x10; - fdc_callback(fdc); - break; - default: - timer_disable(&fdc->timer); + switch (fdc->interrupt) { + case 0x02: + case 0x05: + case 0x06: + case 0x09: + case 0x0C: + case 0x11: + case 0x16: + case 0x19: + case 0x1D: + fdc->error = 1; + fdc->st5 = st5; + fdc->st6 = st6; + fdc->tc = 1; + fdc->stat = 0x10; + fdc_callback(fdc); + break; + default: + timer_disable(&fdc->timer); - fdc_int(fdc, 1); - if (!(fdc->flags & FDC_FLAG_PS1)) - fdc->fintr = 0; - fdc->stat = 0xD0; - fdc->st0 = fdc->res[4] = 0x40 | (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0) | fdc->rw_drive; - if (fdc->head && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) - fdc->st0 |= 0x08; - fdc->res[5] = st5; - fdc->res[6] = st6; - fdc_log("FDC Error: %02X %02X %02X\n", fdc->res[4], fdc->res[5], fdc->res[6]); + fdc_int(fdc, 1); + if (!(fdc->flags & FDC_FLAG_PS1)) + fdc->fintr = 0; + fdc->stat = 0xD0; + fdc->st0 = fdc->res[4] = 0x40 | (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0) | fdc->rw_drive; + if (fdc->head && !fdd_is_double_sided(real_drive(fdc, fdc->drive))) + fdc->st0 |= 0x08; + fdc->res[5] = st5; + fdc->res[6] = st6; + fdc_log("FDC Error: %02X %02X %02X\n", fdc->res[4], fdc->res[5], fdc->res[6]); - fdc->res[7]=0; - fdc->res[8]=0; - fdc->res[9]=0; - fdc->res[10]=0; + fdc->res[7] = 0; + fdc->res[8] = 0; + fdc->res[9] = 0; + fdc->res[10] = 0; - ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 0); - fdc->paramstogo = 7; - break; + ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 0); + fdc->paramstogo = 7; + break; } #endif } - void fdc_overrun(fdc_t *fdc) { @@ -1928,14 +1857,12 @@ fdc_overrun(fdc_t *fdc) fdc_error(fdc, 0x10, 0); } - int fdc_is_verify(fdc_t *fdc) { return (fdc->deleted & 2) ? 1 : 0; } - int fdc_data(fdc_t *fdc, uint8_t data, int last) { @@ -1943,89 +1870,87 @@ fdc_data(fdc_t *fdc, uint8_t data, int last) int n; if (fdc->deleted & 2) { - /* We're in a VERIFY command, so return with 0. */ - return 0; + /* We're in a VERIFY command, so return with 0. */ + return 0; } if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) { - if (fdc->tc) - return 0; + if (fdc->tc) + return 0; - if (fdc->data_ready) { - fdc_overrun(fdc); - return -1; - } + if (fdc->data_ready) { + fdc_overrun(fdc); + return -1; + } - if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->fifo || (fdc->tfifo < 1)) { - fdc->dat = data; - fdc->data_ready = 1; - fdc->stat = 0xf0; - } else { - /* FIFO enabled */ - fdc_fifo_buf_write(fdc, data); - if (fdc->fifobufpos == 0) { - /* We have wrapped around, means FIFO is over */ - fdc->data_ready = 1; - fdc->stat = 0xf0; - } - } + if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->fifo || (fdc->tfifo < 1)) { + fdc->dat = data; + fdc->data_ready = 1; + fdc->stat = 0xf0; + } else { + /* FIFO enabled */ + fdc_fifo_buf_write(fdc, data); + if (fdc->fifobufpos == 0) { + /* We have wrapped around, means FIFO is over */ + fdc->data_ready = 1; + fdc->stat = 0xf0; + } + } } else { - if (fdc->tc) - return -1; + if (fdc->tc) + return -1; - if (!fdc->fifo || (fdc->tfifo < 1)) { - fdc->data_ready = 1; - fdc->stat = 0xd0; - dma_set_drq(fdc->dma_ch, 1); + if (!fdc->fifo || (fdc->tfifo < 1)) { + fdc->data_ready = 1; + fdc->stat = 0xd0; + dma_set_drq(fdc->dma_ch, 1); - fdc->fifobufpos = 0; + fdc->fifobufpos = 0; - result = dma_channel_write(fdc->dma_ch, data); + result = dma_channel_write(fdc->dma_ch, data); - if (result & DMA_OVER) { - dma_set_drq(fdc->dma_ch, 0); - fdc->tc = 1; - return -1; - } - dma_set_drq(fdc->dma_ch, 0); - } else { - /* FIFO enabled */ - fdc_fifo_buf_write(fdc, data); - if (last || (fdc->fifobufpos == 0)) { - /* We have wrapped around, means FIFO is over */ - fdc->data_ready = 1; - fdc->stat = 0xd0; - dma_set_drq(fdc->dma_ch, 1); + if (result & DMA_OVER) { + dma_set_drq(fdc->dma_ch, 0); + fdc->tc = 1; + return -1; + } + dma_set_drq(fdc->dma_ch, 0); + } else { + /* FIFO enabled */ + fdc_fifo_buf_write(fdc, data); + if (last || (fdc->fifobufpos == 0)) { + /* We have wrapped around, means FIFO is over */ + fdc->data_ready = 1; + fdc->stat = 0xd0; + dma_set_drq(fdc->dma_ch, 1); - n = (fdc->fifobufpos > 0) ? (fdc->fifobufpos - 1) : fdc->tfifo; - if (fdc->fifobufpos > 0) - fdc->fifobufpos = 0; + n = (fdc->fifobufpos > 0) ? (fdc->fifobufpos - 1) : fdc->tfifo; + if (fdc->fifobufpos > 0) + fdc->fifobufpos = 0; - for (i = 0; i <= n; i++) { - result = dma_channel_write(fdc->dma_ch, fdc->fifobuf[i]); + for (i = 0; i <= n; i++) { + result = dma_channel_write(fdc->dma_ch, fdc->fifobuf[i]); - if (result & DMA_OVER) { - dma_set_drq(fdc->dma_ch, 0); - fdc->tc = 1; - return -1; - } - } - dma_set_drq(fdc->dma_ch, 0); - } - } + if (result & DMA_OVER) { + dma_set_drq(fdc->dma_ch, 0); + fdc->tc = 1; + return -1; + } + } + dma_set_drq(fdc->dma_ch, 0); + } + } } return 0; } - void fdc_finishread(fdc_t *fdc) { fdc->inread = 0; } - void fdc_track_finishread(fdc_t *fdc, int condition) { @@ -2035,27 +1960,24 @@ fdc_track_finishread(fdc_t *fdc, int condition) fdc_callback(fdc); } - void fdc_sector_finishcompare(fdc_t *fdc, int satisfying) { fdc->stat = 0x10; if (satisfying) - fdc->satisfying_sectors++; + fdc->satisfying_sectors++; fdc->inread = 0; fdc_callback(fdc); } - void fdc_sector_finishread(fdc_t *fdc) { - fdc->stat = 0x10; + fdc->stat = 0x10; fdc->inread = 0; fdc_callback(fdc); } - /* There is no sector ID. */ void fdc_noidam(fdc_t *fdc) @@ -2063,264 +1985,247 @@ fdc_noidam(fdc_t *fdc) fdc_error(fdc, 1, 0); } - /* Sector ID's are there, but there is no sector. */ -void fdc_nosector(fdc_t *fdc) +void +fdc_nosector(fdc_t *fdc) { fdc_error(fdc, 4, 0); } - /* There is no sector data. */ -void fdc_nodataam(fdc_t *fdc) +void +fdc_nodataam(fdc_t *fdc) { fdc_error(fdc, 1, 1); } - /* Abnormal termination with both status 1 and 2 set to 0, used when abnormally terminating the fdc_t FORMAT TRACK command. */ -void fdc_cannotformat(fdc_t *fdc) +void +fdc_cannotformat(fdc_t *fdc) { fdc_error(fdc, 0, 0); } - void fdc_datacrcerror(fdc_t *fdc) { fdc_error(fdc, 0x20, 0x20); } - void fdc_headercrcerror(fdc_t *fdc) { fdc_error(fdc, 0x20, 0); } - void fdc_wrongcylinder(fdc_t *fdc) { fdc_error(fdc, 4, 0x10); } - void fdc_badcylinder(fdc_t *fdc) { fdc_error(fdc, 4, 0x02); } - void fdc_writeprotect(fdc_t *fdc) { fdc_error(fdc, 0x02, 0); } - -int fdc_getdata(fdc_t *fdc, int last) +int +fdc_getdata(fdc_t *fdc, int last) { int i, data = 0; if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) { - if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->fifo || (fdc->tfifo < 1)) { - data = fdc->dat; + if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->fifo || (fdc->tfifo < 1)) { + data = fdc->dat; - if (!last) - fdc->stat = 0xb0; - } else { - data = fdc_fifo_buf_read(fdc); + if (!last) + fdc->stat = 0xb0; + } else { + data = fdc_fifo_buf_read(fdc); - if (!last && (fdc->fifobufpos == 0)) - fdc->stat = 0xb0; - } + if (!last && (fdc->fifobufpos == 0)) + fdc->stat = 0xb0; + } } else { - if (!fdc->fifo || (fdc->tfifo < 1)) { - data = dma_channel_read(fdc->dma_ch); - dma_set_drq(fdc->dma_ch, 0); + if (!fdc->fifo || (fdc->tfifo < 1)) { + data = dma_channel_read(fdc->dma_ch); + dma_set_drq(fdc->dma_ch, 0); - if (data & DMA_OVER) - fdc->tc = 1; + if (data & DMA_OVER) + fdc->tc = 1; - if (!last) { - fdc->stat = 0x90; - dma_set_drq(fdc->dma_ch, 1); - } - } else { - if (fdc->fifobufpos == 0) { - for (i = 0; i <= fdc->tfifo; i++) { - data = dma_channel_read(fdc->dma_ch); - fdc->fifobuf[i] = data; + if (!last) { + fdc->stat = 0x90; + dma_set_drq(fdc->dma_ch, 1); + } + } else { + if (fdc->fifobufpos == 0) { + for (i = 0; i <= fdc->tfifo; i++) { + data = dma_channel_read(fdc->dma_ch); + fdc->fifobuf[i] = data; - if (data & DMA_OVER) { - dma_set_drq(fdc->dma_ch, 0); - fdc->tc = 1; - break; - } - } - dma_set_drq(fdc->dma_ch, 0); - } + if (data & DMA_OVER) { + dma_set_drq(fdc->dma_ch, 0); + fdc->tc = 1; + break; + } + } + dma_set_drq(fdc->dma_ch, 0); + } - data = fdc_fifo_buf_read(fdc); + data = fdc_fifo_buf_read(fdc); - if (!last && (fdc->fifobufpos == 0)) { - dma_set_drq(fdc->dma_ch, 1); - fdc->stat = 0x90; - } - } + if (!last && (fdc->fifobufpos == 0)) { + dma_set_drq(fdc->dma_ch, 1); + fdc->stat = 0x90; + } + } } return data & 0xff; } - void fdc_sectorid(fdc_t *fdc, uint8_t track, uint8_t side, uint8_t sector, uint8_t size, uint8_t crc1, uint8_t crc2) { fdc_int(fdc, 1); fdc->stat = 0xD0; fdc->st0 = fdc->res[4] = (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0) | fdc->drive; - fdc->res[5] = 0; - fdc->res[6] = 0; - fdc->res[7] = track; - fdc->res[8] = side; - fdc->res[9] = sector; - fdc->res[10] = size; + fdc->res[5] = 0; + fdc->res[6] = 0; + fdc->res[7] = track; + fdc->res[8] = side; + fdc->res[9] = sector; + fdc->res[10] = size; ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 0); fdc->paramstogo = 7; dma_set_drq(fdc->dma_ch, 0); } - uint8_t fdc_get_swwp(fdc_t *fdc) { return fdc->swwp; } - void fdc_set_swwp(fdc_t *fdc, uint8_t swwp) { fdc->swwp = swwp; } - uint8_t fdc_get_diswr(fdc_t *fdc) { if (!fdc) - return 0; + return 0; return fdc->disable_write; } - void fdc_set_diswr(fdc_t *fdc, uint8_t diswr) { fdc->disable_write = diswr; } - uint8_t fdc_get_swap(fdc_t *fdc) { return fdc->swap; } - void fdc_set_swap(fdc_t *fdc, uint8_t swap) { fdc->swap = swap; } - void fdc_set_irq(fdc_t *fdc, int irq) { fdc->irq = irq; } - void fdc_set_dma_ch(fdc_t *fdc, int dma_ch) { fdc->dma_ch = dma_ch; } - void fdc_set_base(fdc_t *fdc, int base) { int super_io = (fdc->flags & FDC_FLAG_SUPERIO); - if (fdc->flags & FDC_FLAG_NSC) { - io_sethandler(base + 2, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); - io_sethandler(base + 4, 0x0002, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); - io_sethandler(base + 7, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); - } else { - if ((fdc->flags & FDC_FLAG_AT) || (fdc->flags & FDC_FLAG_AMSTRAD)) { - io_sethandler(base + (super_io ? 2 : 0), super_io ? 0x0004 : 0x0006, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); - io_sethandler(base + 7, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + if (fdc->flags & FDC_FLAG_NSC) { + io_sethandler(base + 2, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + io_sethandler(base + 4, 0x0002, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + io_sethandler(base + 7, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); } else { - if (fdc->flags & FDC_FLAG_PCJR) - io_sethandler(base, 0x0010, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); - else { - if(fdc->flags & FDC_FLAG_UMC) - io_sethandler(base + 0x0001, 0x0001, fdc_read, NULL, NULL, NULL, NULL, NULL, fdc); - io_sethandler(base + 0x0002, 0x0001, NULL, NULL, NULL, fdc_write, NULL, NULL, fdc); - io_sethandler(base + 0x0004, 0x0001, fdc_read, NULL, NULL, NULL, NULL, NULL, fdc); - io_sethandler(base + 0x0005, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); - if ((fdc->flags & FDC_FLAG_TOSHIBA) || (fdc->flags & FDC_FLAG_UMC)) - io_sethandler(base + 0x0007, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); - } + if ((fdc->flags & FDC_FLAG_AT) || (fdc->flags & FDC_FLAG_AMSTRAD)) { + io_sethandler(base + (super_io ? 2 : 0), super_io ? 0x0004 : 0x0006, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + io_sethandler(base + 7, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + } else { + if (fdc->flags & FDC_FLAG_PCJR) + io_sethandler(base, 0x0010, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + else { + if (fdc->flags & FDC_FLAG_UMC) + io_sethandler(base + 0x0001, 0x0001, fdc_read, NULL, NULL, NULL, NULL, NULL, fdc); + io_sethandler(base + 0x0002, 0x0001, NULL, NULL, NULL, fdc_write, NULL, NULL, fdc); + io_sethandler(base + 0x0004, 0x0001, fdc_read, NULL, NULL, NULL, NULL, NULL, fdc); + io_sethandler(base + 0x0005, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + if ((fdc->flags & FDC_FLAG_TOSHIBA) || (fdc->flags & FDC_FLAG_UMC)) + io_sethandler(base + 0x0007, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + } + } } - } fdc->base_address = base; fdc_log("FDC Base address set%s (%04X)\n", super_io ? " for Super I/O" : "", fdc->base_address); } - void fdc_remove(fdc_t *fdc) { int super_io = (fdc->flags & FDC_FLAG_SUPERIO); fdc_log("FDC Removed (%04X)\n", fdc->base_address); - if (fdc->flags & FDC_FLAG_NSC) { - io_removehandler(fdc->base_address + 2, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); - io_removehandler(fdc->base_address + 4, 0x0002, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); - io_removehandler(fdc->base_address + 7, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); - } else { - if ((fdc->flags & FDC_FLAG_AT) || (fdc->flags & FDC_FLAG_AMSTRAD)) { - io_removehandler(fdc->base_address + (super_io ? 2 : 0), super_io ? 0x0004 : 0x0006, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); - io_removehandler(fdc->base_address + 7, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + if (fdc->flags & FDC_FLAG_NSC) { + io_removehandler(fdc->base_address + 2, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + io_removehandler(fdc->base_address + 4, 0x0002, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + io_removehandler(fdc->base_address + 7, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); } else { - if (fdc->flags & FDC_FLAG_PCJR) - io_removehandler(fdc->base_address, 0x0010, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); - else { - if(fdc->flags & FDC_FLAG_UMC) - io_removehandler(fdc->base_address + 0x0001, 0x0001, fdc_read, NULL, NULL, NULL, NULL, NULL, fdc); - io_removehandler(fdc->base_address + 0x0002, 0x0001, NULL, NULL, NULL, fdc_write, NULL, NULL, fdc); - io_removehandler(fdc->base_address + 0x0004, 0x0001, fdc_read, NULL, NULL, NULL, NULL, NULL, fdc); - io_removehandler(fdc->base_address + 0x0005, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); - if ((fdc->flags & FDC_FLAG_TOSHIBA) || (fdc->flags & FDC_FLAG_UMC)) - io_removehandler(fdc->base_address + 0x0007, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); - } + if ((fdc->flags & FDC_FLAG_AT) || (fdc->flags & FDC_FLAG_AMSTRAD)) { + io_removehandler(fdc->base_address + (super_io ? 2 : 0), super_io ? 0x0004 : 0x0006, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + io_removehandler(fdc->base_address + 7, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + } else { + if (fdc->flags & FDC_FLAG_PCJR) + io_removehandler(fdc->base_address, 0x0010, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + else { + if (fdc->flags & FDC_FLAG_UMC) + io_removehandler(fdc->base_address + 0x0001, 0x0001, fdc_read, NULL, NULL, NULL, NULL, NULL, fdc); + io_removehandler(fdc->base_address + 0x0002, 0x0001, NULL, NULL, NULL, fdc_write, NULL, NULL, fdc); + io_removehandler(fdc->base_address + 0x0004, 0x0001, fdc_read, NULL, NULL, NULL, NULL, NULL, fdc); + io_removehandler(fdc->base_address + 0x0005, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + if ((fdc->flags & FDC_FLAG_TOSHIBA) || (fdc->flags & FDC_FLAG_UMC)) + io_removehandler(fdc->base_address + 0x0007, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, fdc); + } + } } } -} - void fdc_reset(void *priv) { - int i = 0; + int i = 0; uint8_t default_rwc; fdc_t *fdc = (fdc_t *) priv; @@ -2331,13 +2236,13 @@ fdc_reset(void *priv) fdc_update_enh_mode(fdc, 0); if (fdc->flags & FDC_FLAG_PS1) - fdc_update_densel_polarity(fdc, 0); + fdc_update_densel_polarity(fdc, 0); else - fdc_update_densel_polarity(fdc, 1); + fdc_update_densel_polarity(fdc, 1); if (fdc->flags & FDC_FLAG_NSC) - fdc_update_densel_force(fdc, 3); + fdc_update_densel_force(fdc, 3); else - fdc_update_densel_force(fdc, 0); + fdc_update_densel_force(fdc, 0); fdc_update_rwc(fdc, 0, default_rwc); fdc_update_rwc(fdc, 1, default_rwc); fdc_update_rwc(fdc, 2, default_rwc); @@ -2349,20 +2254,20 @@ fdc_reset(void *priv) fdc_update_drv2en(fdc, 1); fdc_update_rates(fdc); - fdc->fifo = 0; + fdc->fifo = 0; fdc->tfifo = 1; if (fdc->flags & FDC_FLAG_PCJR) { - fdc->dma = 0; - fdc->specify[1] = 1; + fdc->dma = 0; + fdc->specify[1] = 1; } else { - fdc->dma = 1; - fdc->specify[1] = 0; + fdc->dma = 1; + fdc->specify[1] = 0; } fdc->config = 0x20; fdc->pretrk = 0; - fdc->swwp = 0; + fdc->swwp = 0; fdc->disable_write = 0; fdc_ctrl_reset(fdc); @@ -2375,10 +2280,9 @@ fdc_reset(void *priv) current_drive = 0; for (i = 0; i < FDD_NUM; i++) - ui_sb_update_icon(SB_FLOPPY | i, 0); + ui_sb_update_icon(SB_FLOPPY | i, 0); } - static void fdc_close(void *priv) { @@ -2392,7 +2296,6 @@ fdc_close(void *priv) free(fdc); } - static void * fdc_init(const device_t *info) { @@ -2404,9 +2307,9 @@ fdc_init(const device_t *info) fdc->irq = FDC_PRIMARY_IRQ; if (fdc->flags & FDC_FLAG_PCJR) - timer_add(&fdc->watchdog_timer, fdc_watchdog_poll, fdc, 0); + timer_add(&fdc->watchdog_timer, fdc_watchdog_poll, fdc, 0); else - fdc->dma_ch = FDC_PRIMARY_DMA; + fdc->dma_ch = FDC_PRIMARY_DMA; fdc_log("FDC added: %04X (flags: %08X)\n", fdc->base_address, fdc->flags); @@ -2424,7 +2327,6 @@ fdc_init(const device_t *info) return fdc; } - void fdc_3f1_enable(fdc_t *fdc, int enable) { @@ -2432,197 +2334,197 @@ fdc_3f1_enable(fdc_t *fdc, int enable) } const device_t fdc_xt_device = { - .name = "PC/XT Floppy Drive Controller", + .name = "PC/XT Floppy Drive Controller", .internal_name = "fdc_xt", - .flags = 0, - .local = 0, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, + .flags = 0, + .local = 0, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc_xt_t1x00_device = { - .name = "PC/XT Floppy Drive Controller (Toshiba)", + .name = "PC/XT Floppy Drive Controller (Toshiba)", .internal_name = "fdc_xt_t1x00", - .flags = 0, - .local = FDC_FLAG_TOSHIBA, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, + .flags = 0, + .local = FDC_FLAG_TOSHIBA, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc_xt_amstrad_device = { - .name = "PC/XT Floppy Drive Controller (Amstrad)", + .name = "PC/XT Floppy Drive Controller (Amstrad)", .internal_name = "fdc_xt_amstrad", - .flags = 0, - .local = FDC_FLAG_DISKCHG_ACTLOW | FDC_FLAG_AMSTRAD, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, + .flags = 0, + .local = FDC_FLAG_DISKCHG_ACTLOW | FDC_FLAG_AMSTRAD, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc_xt_tandy_device = { - .name = "PC/XT Floppy Drive Controller (Tandy)", + .name = "PC/XT Floppy Drive Controller (Tandy)", .internal_name = "fdc_xt_tandy", - .flags = 0, - .local = FDC_FLAG_AMSTRAD, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, + .flags = 0, + .local = FDC_FLAG_AMSTRAD, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc_pcjr_device = { - .name = "PCjr Floppy Drive Controller", + .name = "PCjr Floppy Drive Controller", .internal_name = "fdc_pcjr", - .flags = 0, - .local = FDC_FLAG_PCJR, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, + .flags = 0, + .local = FDC_FLAG_PCJR, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc_at_device = { - .name = "PC/AT Floppy Drive Controller", + .name = "PC/AT Floppy Drive Controller", .internal_name = "fdc_at", - .flags = 0, - .local = FDC_FLAG_AT, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, + .flags = 0, + .local = FDC_FLAG_AT, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc_at_actlow_device = { - .name = "PC/AT Floppy Drive Controller (Active low)", + .name = "PC/AT Floppy Drive Controller (Active low)", .internal_name = "fdc_at_actlow", - .flags = 0, - .local = FDC_FLAG_DISKCHG_ACTLOW | FDC_FLAG_AT, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, + .flags = 0, + .local = FDC_FLAG_DISKCHG_ACTLOW | FDC_FLAG_AT, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc_at_ps1_device = { - .name = "PC/AT Floppy Drive Controller (PS/1, PS/2 ISA)", + .name = "PC/AT Floppy Drive Controller (PS/1, PS/2 ISA)", .internal_name = "fdc_at_ps1", - .flags = 0, - .local = FDC_FLAG_DISKCHG_ACTLOW | FDC_FLAG_AT | FDC_FLAG_PS1, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, + .flags = 0, + .local = FDC_FLAG_DISKCHG_ACTLOW | FDC_FLAG_AT | FDC_FLAG_PS1, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc_at_smc_device = { - .name = "PC/AT Floppy Drive Controller (SM(s)C FDC37Cxxx)", + .name = "PC/AT Floppy Drive Controller (SM(s)C FDC37Cxxx)", .internal_name = "fdc_at_smc", - .flags = 0, - .local = FDC_FLAG_AT | FDC_FLAG_SUPERIO, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, + .flags = 0, + .local = FDC_FLAG_AT | FDC_FLAG_SUPERIO, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc_at_ali_device = { - .name = "PC/AT Floppy Drive Controller (ALi M512x/M1543C)", + .name = "PC/AT Floppy Drive Controller (ALi M512x/M1543C)", .internal_name = "fdc_at_ali", - .flags = 0, - .local = FDC_FLAG_AT | FDC_FLAG_SUPERIO | FDC_FLAG_ALI, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, + .flags = 0, + .local = FDC_FLAG_AT | FDC_FLAG_SUPERIO | FDC_FLAG_ALI, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc_at_winbond_device = { - .name = "PC/AT Floppy Drive Controller (Winbond W83x77F)", + .name = "PC/AT Floppy Drive Controller (Winbond W83x77F)", .internal_name = "fdc_at_winbond", - .flags = 0, - .local = FDC_FLAG_AT | FDC_FLAG_SUPERIO | FDC_FLAG_START_RWC_1 | FDC_FLAG_MORE_TRACKS, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, + .flags = 0, + .local = FDC_FLAG_AT | FDC_FLAG_SUPERIO | FDC_FLAG_START_RWC_1 | FDC_FLAG_MORE_TRACKS, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc_at_nsc_device = { - .name = "PC/AT Floppy Drive Controller (NSC PC8730x)", + .name = "PC/AT Floppy Drive Controller (NSC PC8730x)", .internal_name = "fdc_at_nsc", - .flags = 0, - .local = FDC_FLAG_AT | FDC_FLAG_MORE_TRACKS | FDC_FLAG_NSC, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, + .flags = 0, + .local = FDC_FLAG_AT | FDC_FLAG_MORE_TRACKS | FDC_FLAG_NSC, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc_dp8473_device = { - .name = "NS DP8473 Floppy Drive Controller", + .name = "NS DP8473 Floppy Drive Controller", .internal_name = "fdc_dp8473", - .flags = 0, - .local = FDC_FLAG_AT | FDC_FLAG_NSC, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, + .flags = 0, + .local = FDC_FLAG_AT | FDC_FLAG_NSC, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc_um8398_device = { - .name = "UMC UM8398 Floppy Drive Controller", + .name = "UMC UM8398 Floppy Drive Controller", .internal_name = "fdc_um8398", - .flags = 0, - .local = FDC_FLAG_UMC, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, + .flags = 0, + .local = FDC_FLAG_UMC, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/floppy/fdc_magitronic.c b/src/floppy/fdc_magitronic.c index 2250c9a4b..8b3c2b325 100644 --- a/src/floppy/fdc_magitronic.c +++ b/src/floppy/fdc_magitronic.c @@ -31,20 +31,20 @@ #include <86box/fdc.h> #include <86box/fdc_ext.h> -#define ROM_B215 "roms/floppy/magitronic/Magitronic B215 - BIOS ROM.bin" -#define ROM_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff) +#define ROM_B215 "roms/floppy/magitronic/Magitronic B215 - BIOS ROM.bin" +#define ROM_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff) -#define DRIVE_SELECT (int)(real_drive(dev->fdc_controller, i)) +#define DRIVE_SELECT (int) (real_drive(dev->fdc_controller, i)) typedef struct { fdc_t *fdc_controller; - rom_t rom; + rom_t rom; } b215_t; static uint8_t b215_read(uint16_t addr, void *priv) { - b215_t *dev = (b215_t *)priv; + b215_t *dev = (b215_t *) priv; /* Register 3F0h @@ -59,19 +59,15 @@ b215_read(uint16_t addr, void *priv) */ int drive_spec[2]; - for (int i = 0; i <= 1; i++) - { - if (fdd_is_525(DRIVE_SELECT)) - { + for (int i = 0; i <= 1; i++) { + if (fdd_is_525(DRIVE_SELECT)) { if (!fdd_is_dd(DRIVE_SELECT)) drive_spec[i] = 1; else if (fdd_doublestep_40(DRIVE_SELECT)) drive_spec[i] = 2; else drive_spec[i] = 0; - } - else - { + } else { if (fdd_is_dd(DRIVE_SELECT) && !fdd_is_double_sided(DRIVE_SELECT)) drive_spec[i] = 0; else if (fdd_is_dd(DRIVE_SELECT) && fdd_is_double_sided(DRIVE_SELECT)) @@ -87,7 +83,7 @@ b215_read(uint16_t addr, void *priv) static void b215_close(void *priv) { - b215_t *dev = (b215_t *)priv; + b215_t *dev = (b215_t *) priv; free(dev); } @@ -95,7 +91,7 @@ b215_close(void *priv) static void * b215_init(const device_t *info) { - b215_t *dev = (b215_t *)malloc(sizeof(b215_t)); + b215_t *dev = (b215_t *) malloc(sizeof(b215_t)); memset(dev, 0, sizeof(b215_t)); rom_init(&dev->rom, ROM_B215, ROM_ADDR, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); @@ -106,13 +102,14 @@ b215_init(const device_t *info) return dev; } -static int b215_available(void) +static int +b215_available(void) { return rom_present(ROM_B215); } static const device_config_t b215_config[] = { -// clang-format off + // clang-format off { .name = "bios_addr", .description = "BIOS Address:", @@ -132,15 +129,15 @@ static const device_config_t b215_config[] = { }; const device_t fdc_b215_device = { - .name = "Magitronic B215", + .name = "Magitronic B215", .internal_name = "b215", - .flags = DEVICE_ISA, - .local = 0, - .init = b215_init, - .close = b215_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = b215_init, + .close = b215_close, + .reset = NULL, { .available = b215_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = b215_config + .force_redraw = NULL, + .config = b215_config }; diff --git a/src/floppy/fdc_pii15xb.c b/src/floppy/fdc_pii15xb.c index 42b72885f..cd1650c7a 100644 --- a/src/floppy/fdc_pii15xb.c +++ b/src/floppy/fdc_pii15xb.c @@ -76,9 +76,9 @@ MiniMicro 4 also won't work with the XT FDC which the Zilog claims to be. #include <86box/fdc.h> #include <86box/fdc_ext.h> -#define DTK_VARIANT ((info->local == 158) ? ROM_PII_158B : ROM_PII_151B) -#define DTK_CHIP ((info->local == 158) ? &fdc_xt_device : &fdc_dp8473_device) -#define BIOS_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff) +#define DTK_VARIANT ((info->local == 158) ? ROM_PII_158B : ROM_PII_151B) +#define DTK_CHIP ((info->local == 158) ? &fdc_xt_device : &fdc_dp8473_device) +#define BIOS_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff) #define ROM_PII_151B "roms/floppy/dtk/pii-151b.rom" #define ROM_PII_158B "roms/floppy/dtk/pii-158b.rom" @@ -90,7 +90,7 @@ typedef struct static void pii_close(void *priv) { - pii_t *dev = (pii_t *)priv; + pii_t *dev = (pii_t *) priv; free(dev); } @@ -100,7 +100,7 @@ pii_init(const device_t *info) { pii_t *dev; - dev = (pii_t *)malloc(sizeof(pii_t)); + dev = (pii_t *) malloc(sizeof(pii_t)); memset(dev, 0, sizeof(pii_t)); if (BIOS_ADDR != 0) @@ -111,18 +111,20 @@ pii_init(const device_t *info) return dev; } -static int pii_151b_available(void) +static int +pii_151b_available(void) { return rom_present(ROM_PII_151B); } -static int pii_158_available(void) +static int +pii_158_available(void) { return rom_present(ROM_PII_158B); } static const device_config_t pii_config[] = { -// clang-format off + // clang-format off { .name = "bios_addr", .description = "BIOS Address:", @@ -144,29 +146,29 @@ static const device_config_t pii_config[] = { }; const device_t fdc_pii151b_device = { - .name = "DTK PII-151B (MiniMicro) Floppy Drive Controller", + .name = "DTK PII-151B (MiniMicro) Floppy Drive Controller", .internal_name = "dtk_pii151b", - .flags = DEVICE_ISA, - .local = 151, - .init = pii_init, - .close = pii_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 151, + .init = pii_init, + .close = pii_close, + .reset = NULL, { .available = pii_151b_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = pii_config + .force_redraw = NULL, + .config = pii_config }; const device_t fdc_pii158b_device = { - .name = "DTK PII-158B (MiniMicro4) Floppy Drive Controller", + .name = "DTK PII-158B (MiniMicro4) Floppy Drive Controller", .internal_name = "dtk_pii158b", - .flags = DEVICE_ISA, - .local = 158, - .init = pii_init, - .close = pii_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 158, + .init = pii_init, + .close = pii_close, + .reset = NULL, { .available = pii_158_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = pii_config + .force_redraw = NULL, + .config = pii_config }; diff --git a/src/floppy/fdd.c b/src/floppy/fdd.c index 2f3dd4fc9..65b95bb60 100644 --- a/src/floppy/fdd.c +++ b/src/floppy/fdd.c @@ -39,7 +39,6 @@ #include <86box/fdd_td0.h> #include <86box/fdc.h> - /* Flags: Bit 0: 300 rpm supported; Bit 1: 360 rpm supported; @@ -53,18 +52,17 @@ Bit 9: ignore DENSEL; Bit 10: drive is a PS/2 drive; */ -#define FLAG_RPM_300 1 -#define FLAG_RPM_360 2 -#define FLAG_525 4 -#define FLAG_DS 8 -#define FLAG_HOLE0 16 -#define FLAG_HOLE1 32 -#define FLAG_HOLE2 64 -#define FLAG_DOUBLE_STEP 128 -#define FLAG_INVERT_DENSEL 256 -#define FLAG_IGNORE_DENSEL 512 -#define FLAG_PS2 1024 - +#define FLAG_RPM_300 1 +#define FLAG_RPM_360 2 +#define FLAG_525 4 +#define FLAG_DS 8 +#define FLAG_HOLE0 16 +#define FLAG_HOLE1 32 +#define FLAG_HOLE2 64 +#define FLAG_DOUBLE_STEP 128 +#define FLAG_INVERT_DENSEL 256 +#define FLAG_IGNORE_DENSEL 512 +#define FLAG_PS2 1024 typedef struct { int type; @@ -75,28 +73,26 @@ typedef struct { int check_bpb; } fdd_t; +fdd_t fdd[FDD_NUM]; -fdd_t fdd[FDD_NUM]; +char floppyfns[FDD_NUM][512]; -char floppyfns[FDD_NUM][512]; +pc_timer_t fdd_poll_time[FDD_NUM]; -pc_timer_t fdd_poll_time[FDD_NUM]; +static int fdd_notfound = 0, + driveloaders[FDD_NUM]; -static int fdd_notfound = 0, - driveloaders[FDD_NUM]; +int writeprot[FDD_NUM], fwriteprot[FDD_NUM], + fdd_changed[FDD_NUM], ui_writeprot[FDD_NUM] = { 0, 0, 0, 0 }, + drive_empty[FDD_NUM] = { 1, 1, 1, 1 }; -int writeprot[FDD_NUM], fwriteprot[FDD_NUM], - fdd_changed[FDD_NUM], ui_writeprot[FDD_NUM] = {0, 0, 0, 0}, - drive_empty[FDD_NUM] = {1, 1, 1, 1}; +DRIVE drives[FDD_NUM]; -DRIVE drives[FDD_NUM]; +uint64_t motoron[FDD_NUM]; -uint64_t motoron[FDD_NUM]; - -fdc_t *fdd_fdc; - -d86f_handler_t d86f_handler[FDD_NUM]; +fdc_t *fdd_fdc; +d86f_handler_t d86f_handler[FDD_NUM]; static const struct { @@ -104,48 +100,46 @@ static const struct void (*load)(int drive, char *fn); void (*close)(int drive); int size; -} loaders[]= -{ - {"001", img_load, img_close, -1}, - {"002", img_load, img_close, -1}, - {"003", img_load, img_close, -1}, - {"004", img_load, img_close, -1}, - {"005", img_load, img_close, -1}, - {"006", img_load, img_close, -1}, - {"007", img_load, img_close, -1}, - {"008", img_load, img_close, -1}, - {"009", img_load, img_close, -1}, - {"010", img_load, img_close, -1}, - {"12", img_load, img_close, -1}, - {"144", img_load, img_close, -1}, - {"360", img_load, img_close, -1}, - {"720", img_load, img_close, -1}, - {"86F", d86f_load, d86f_close, -1}, - {"BIN", img_load, img_close, -1}, - {"CQ", img_load, img_close, -1}, - {"CQM", img_load, img_close, -1}, - {"DDI", img_load, img_close, -1}, - {"DSK", img_load, img_close, -1}, - {"FDI", fdi_load, fdi_close, -1}, - {"FDF", img_load, img_close, -1}, - {"FLP", img_load, img_close, -1}, - {"HDM", img_load, img_close, -1}, - {"IMA", img_load, img_close, -1}, - {"IMD", imd_load, imd_close, -1}, - {"IMG", img_load, img_close, -1}, - {"JSON", json_load, json_close, -1}, - {"MFM", mfm_load, mfm_close, -1}, - {"TD0", td0_load, td0_close, -1}, - {"VFD", img_load, img_close, -1}, - {"XDF", img_load, img_close, -1}, - {0, 0, 0, 0} +} loaders[] = { + {"001", img_load, img_close, -1}, + { "002", img_load, img_close, -1}, + { "003", img_load, img_close, -1}, + { "004", img_load, img_close, -1}, + { "005", img_load, img_close, -1}, + { "006", img_load, img_close, -1}, + { "007", img_load, img_close, -1}, + { "008", img_load, img_close, -1}, + { "009", img_load, img_close, -1}, + { "010", img_load, img_close, -1}, + { "12", img_load, img_close, -1}, + { "144", img_load, img_close, -1}, + { "360", img_load, img_close, -1}, + { "720", img_load, img_close, -1}, + { "86F", d86f_load, d86f_close, -1}, + { "BIN", img_load, img_close, -1}, + { "CQ", img_load, img_close, -1}, + { "CQM", img_load, img_close, -1}, + { "DDI", img_load, img_close, -1}, + { "DSK", img_load, img_close, -1}, + { "FDI", fdi_load, fdi_close, -1}, + { "FDF", img_load, img_close, -1}, + { "FLP", img_load, img_close, -1}, + { "HDM", img_load, img_close, -1}, + { "IMA", img_load, img_close, -1}, + { "IMD", imd_load, imd_close, -1}, + { "IMG", img_load, img_close, -1}, + { "JSON", json_load, json_close, -1}, + { "MFM", mfm_load, mfm_close, -1}, + { "TD0", td0_load, td0_close, -1}, + { "VFD", img_load, img_close, -1}, + { "XDF", img_load, img_close, -1}, + { 0, 0, 0, 0 } }; - static const struct { - int max_track; - int flags; + int max_track; + int flags; const char *name; const char *internal_name; } drive_types[] = @@ -197,161 +191,148 @@ static const struct } }; - #ifdef ENABLE_FDD_LOG int fdd_do_log = ENABLE_FDD_LOG; - static void fdd_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (fdd_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (fdd_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define fdd_log(fmt, ...) +# define fdd_log(fmt, ...) #endif - char * fdd_getname(int type) { - return (char *)drive_types[type].name; + return (char *) drive_types[type].name; } - char * fdd_get_internal_name(int type) { - return (char *)drive_types[type].internal_name; + return (char *) drive_types[type].internal_name; } - int fdd_get_from_internal_name(char *s) { int c = 0; while (strlen(drive_types[c].internal_name)) { - if (!strcmp((char *)drive_types[c].internal_name, s)) - return c; - c++; + if (!strcmp((char *) drive_types[c].internal_name, s)) + return c; + c++; } return 0; } - /* This is needed for the dump as 86F feature. */ void fdd_do_seek(int drive, int track) { if (drives[drive].seek) - drives[drive].seek(drive, track); + drives[drive].seek(drive, track); } - void fdd_forced_seek(int drive, int track_diff) { fdd[drive].track += track_diff; if (fdd[drive].track < 0) - fdd[drive].track = 0; + fdd[drive].track = 0; if (fdd[drive].track > drive_types[fdd[drive].type].max_track) - fdd[drive].track = drive_types[fdd[drive].type].max_track; + fdd[drive].track = drive_types[fdd[drive].type].max_track; fdd_do_seek(drive, fdd[drive].track); } - void fdd_seek(int drive, int track_diff) { if (!track_diff) - return; + return; fdd[drive].track += track_diff; if (fdd[drive].track < 0) - fdd[drive].track = 0; + fdd[drive].track = 0; if (fdd[drive].track > drive_types[fdd[drive].type].max_track) - fdd[drive].track = drive_types[fdd[drive].type].max_track; + fdd[drive].track = drive_types[fdd[drive].type].max_track; fdd_changed[drive] = 0; fdd_do_seek(drive, fdd[drive].track); } - int fdd_track0(int drive) { /* If drive is disabled, TRK0 never gets set. */ - if (!drive_types[fdd[drive].type].max_track) return 0; + if (!drive_types[fdd[drive].type].max_track) + return 0; return !fdd[drive].track; } - int fdd_current_track(int drive) { return fdd[drive].track; } - void fdd_set_densel(int densel) { int i = 0; for (i = 0; i < FDD_NUM; i++) { - if (drive_types[fdd[i].type].flags & FLAG_INVERT_DENSEL) - fdd[i].densel = densel ^ 1; - else - fdd[i].densel = densel; + if (drive_types[fdd[i].type].flags & FLAG_INVERT_DENSEL) + fdd[i].densel = densel ^ 1; + else + fdd[i].densel = densel; } } - int fdd_getrpm(int drive) { int densel = 0; int hole; - hole = fdd_hole(drive); + hole = fdd_hole(drive); densel = fdd[drive].densel; if (drive_types[fdd[drive].type].flags & FLAG_INVERT_DENSEL) - densel ^= 1; + densel ^= 1; if (!(drive_types[fdd[drive].type].flags & FLAG_RPM_360)) - return 300; + return 300; if (!(drive_types[fdd[drive].type].flags & FLAG_RPM_300)) - return 360; + return 360; if (drive_types[fdd[drive].type].flags & FLAG_525) - return densel ? 360 : 300; + return densel ? 360 : 300; else { - /* fdd_hole(drive) returns 0 for double density media, 1 for high density, and 2 for extended density. */ - if (hole == 1) - return densel ? 300 : 360; - else - return 300; + /* fdd_hole(drive) returns 0 for double density media, 1 for high density, and 2 for extended density. */ + if (hole == 1) + return densel ? 300 : 360; + else + return 300; } } - int fdd_can_read_medium(int drive) { @@ -362,351 +343,322 @@ fdd_can_read_medium(int drive) return !!(drive_types[fdd[drive].type].flags & hole); } - int fdd_doublestep_40(int drive) { return !!(drive_types[fdd[drive].type].flags & FLAG_DOUBLE_STEP); } - void fdd_set_type(int drive, int type) { - int old_type = fdd[drive].type; + int old_type = fdd[drive].type; fdd[drive].type = type; if ((drive_types[old_type].flags ^ drive_types[type].flags) & FLAG_INVERT_DENSEL) - fdd[drive].densel ^= 1; + fdd[drive].densel ^= 1; } - int fdd_get_type(int drive) { return fdd[drive].type; } - int fdd_get_flags(int drive) { return drive_types[fdd[drive].type].flags; } - int fdd_is_525(int drive) { return drive_types[fdd[drive].type].flags & FLAG_525; } - int fdd_is_dd(int drive) { return (drive_types[fdd[drive].type].flags & 0x70) == 0x10; } - int fdd_is_ed(int drive) { return drive_types[fdd[drive].type].flags & FLAG_HOLE2; } - int fdd_is_double_sided(int drive) { return drive_types[fdd[drive].type].flags & FLAG_DS; } - void fdd_set_head(int drive, int head) { if (head && !fdd_is_double_sided(drive)) - fdd[drive].head = 0; + fdd[drive].head = 0; else - fdd[drive].head = head; + fdd[drive].head = head; } - int fdd_get_head(int drive) { if (!fdd_is_double_sided(drive)) - return 0; + return 0; return fdd[drive].head; } - void fdd_set_turbo(int drive, int turbo) { fdd[drive].turbo = turbo; } - int fdd_get_turbo(int drive) { return fdd[drive].turbo; } - -void fdd_set_check_bpb(int drive, int check_bpb) +void +fdd_set_check_bpb(int drive, int check_bpb) { fdd[drive].check_bpb = check_bpb; } - int fdd_get_check_bpb(int drive) { return fdd[drive].check_bpb; } - int fdd_get_densel(int drive) { return fdd[drive].densel; } - void fdd_load(int drive, char *fn) { - int c = 0, size; + int c = 0, size; char *p; FILE *f; fdd_log("FDD: loading drive %d with '%s'\n", drive, fn); if (!fn) - return; + return; p = path_get_extension(fn); if (!p) - return; + return; f = plat_fopen(fn, "rb"); if (f) { - if (fseek(f, -1, SEEK_END) == -1) - fatal("fdd_load(): Error seeking to the end of the file\n"); - size = ftell(f) + 1; - fclose(f); - while (loaders[c].ext) { - if (!strcasecmp(p, (char *) loaders[c].ext) && (size == loaders[c].size || loaders[c].size == -1)) { - driveloaders[drive] = c; - if (floppyfns[drive] != fn) strcpy(floppyfns[drive], fn); - d86f_setup(drive); - loaders[c].load(drive, floppyfns[drive]); - drive_empty[drive] = 0; - fdd_forced_seek(drive, 0); - fdd_changed[drive] = 1; - return; - } - c++; - } + if (fseek(f, -1, SEEK_END) == -1) + fatal("fdd_load(): Error seeking to the end of the file\n"); + size = ftell(f) + 1; + fclose(f); + while (loaders[c].ext) { + if (!strcasecmp(p, (char *) loaders[c].ext) && (size == loaders[c].size || loaders[c].size == -1)) { + driveloaders[drive] = c; + if (floppyfns[drive] != fn) + strcpy(floppyfns[drive], fn); + d86f_setup(drive); + loaders[c].load(drive, floppyfns[drive]); + drive_empty[drive] = 0; + fdd_forced_seek(drive, 0); + fdd_changed[drive] = 1; + return; + } + c++; + } } - fdd_log("FDD: could not load '%s' %s\n",fn,p); + fdd_log("FDD: could not load '%s' %s\n", fn, p); drive_empty[drive] = 1; fdd_set_head(drive, 0); memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); ui_sb_update_icon_state(SB_FLOPPY | drive, 1); } - void fdd_close(int drive) { fdd_log("FDD: closing drive %d\n", drive); - d86f_stop(drive); /* Call this first of all to make sure the 86F poll is back to idle state. */ + d86f_stop(drive); /* Call this first of all to make sure the 86F poll is back to idle state. */ if (loaders[driveloaders[drive]].close) - loaders[driveloaders[drive]].close(drive); + loaders[driveloaders[drive]].close(drive); drive_empty[drive] = 1; fdd_set_head(drive, 0); - floppyfns[drive][0] = 0; - drives[drive].hole = NULL; - drives[drive].poll = NULL; - drives[drive].seek = NULL; - drives[drive].readsector = NULL; - drives[drive].writesector = NULL; + floppyfns[drive][0] = 0; + drives[drive].hole = NULL; + drives[drive].poll = NULL; + drives[drive].seek = NULL; + drives[drive].readsector = NULL; + drives[drive].writesector = NULL; drives[drive].comparesector = NULL; - drives[drive].readaddress = NULL; - drives[drive].format = NULL; - drives[drive].byteperiod = NULL; - drives[drive].stop = NULL; + drives[drive].readaddress = NULL; + drives[drive].format = NULL; + drives[drive].byteperiod = NULL; + drives[drive].stop = NULL; d86f_destroy(drive); ui_sb_update_icon_state(SB_FLOPPY | drive, 1); } - int fdd_hole(int drive) { if (drives[drive].hole) - return drives[drive].hole(drive); + return drives[drive].hole(drive); else - return 0; + return 0; } - static __inline uint64_t fdd_byteperiod(int drive) { if (!fdd_get_turbo(drive) && drives[drive].byteperiod) - return drives[drive].byteperiod(drive); + return drives[drive].byteperiod(drive); else - return 32ULL * TIMER_USEC; + return 32ULL * TIMER_USEC; } - void fdd_set_motor_enable(int drive, int motor_enable) { /* I think here is where spin-up and spin-down should be implemented. */ if (motor_enable && !motoron[drive]) - timer_set_delay_u64(&fdd_poll_time[drive], fdd_byteperiod(drive)); + timer_set_delay_u64(&fdd_poll_time[drive], fdd_byteperiod(drive)); else if (!motor_enable) - timer_disable(&fdd_poll_time[drive]); + timer_disable(&fdd_poll_time[drive]); motoron[drive] = motor_enable; } - static void fdd_poll(void *priv) { - int drive; + int drive; DRIVE *drv = (DRIVE *) priv; drive = drv->id; if (drive >= FDD_NUM) - fatal("Attempting to poll floppy drive %i that is not supposed to be there\n", drive); + fatal("Attempting to poll floppy drive %i that is not supposed to be there\n", drive); timer_advance_u64(&fdd_poll_time[drive], fdd_byteperiod(drive)); if (drv->poll) - drv->poll(drive); + drv->poll(drive); if (fdd_notfound) { - fdd_notfound--; - if (!fdd_notfound) - fdc_noidam(fdd_fdc); + fdd_notfound--; + if (!fdd_notfound) + fdc_noidam(fdd_fdc); } } - int fdd_get_bitcell_period(int rate) { int bit_rate = 250; switch (rate) { - case 0: /*High density*/ - bit_rate = 500; - break; - case 1: /*Double density (360 rpm)*/ - bit_rate = 300; - break; - case 2: /*Double density*/ - bit_rate = 250; - break; - case 3: /*Extended density*/ - bit_rate = 1000; - break; + case 0: /*High density*/ + bit_rate = 500; + break; + case 1: /*Double density (360 rpm)*/ + bit_rate = 300; + break; + case 2: /*Double density*/ + bit_rate = 250; + break; + case 3: /*Extended density*/ + bit_rate = 1000; + break; } - return 1000000 / bit_rate*2; /*Bitcell period in ns*/ + return 1000000 / bit_rate * 2; /*Bitcell period in ns*/ } - void fdd_reset(void) { int i; for (i = 0; i < FDD_NUM; i++) { - drives[i].id = i; - timer_add(&(fdd_poll_time[i]), fdd_poll, &drives[i], 0); + drives[i].id = i; + timer_add(&(fdd_poll_time[i]), fdd_poll, &drives[i], 0); } } - void fdd_readsector(int drive, int sector, int track, int side, int density, int sector_size) { if (drives[drive].readsector) - drives[drive].readsector(drive, sector, track, side, density, sector_size); + drives[drive].readsector(drive, sector, track, side, density, sector_size); else - fdd_notfound = 1000; + fdd_notfound = 1000; } - void fdd_writesector(int drive, int sector, int track, int side, int density, int sector_size) { if (drives[drive].writesector) - drives[drive].writesector(drive, sector, track, side, density, sector_size); + drives[drive].writesector(drive, sector, track, side, density, sector_size); else - fdd_notfound = 1000; + fdd_notfound = 1000; } - void fdd_comparesector(int drive, int sector, int track, int side, int density, int sector_size) { if (drives[drive].comparesector) - drives[drive].comparesector(drive, sector, track, side, density, sector_size); + drives[drive].comparesector(drive, sector, track, side, density, sector_size); else - fdd_notfound = 1000; + fdd_notfound = 1000; } - void fdd_readaddress(int drive, int side, int density) { if (drives[drive].readaddress) - drives[drive].readaddress(drive, side, density); + drives[drive].readaddress(drive, side, density); } - void fdd_format(int drive, int side, int density, uint8_t fill) { if (drives[drive].format) - drives[drive].format(drive, side, density, fill); + drives[drive].format(drive, side, density, fill); else - fdd_notfound = 1000; + fdd_notfound = 1000; } - void fdd_stop(int drive) { if (drives[drive].stop) - drives[drive].stop(drive); + drives[drive].stop(drive); } - void fdd_set_fdc(void *fdc) { fdd_fdc = (fdc_t *) fdc; } - void fdd_init(void) { int i; for (i = 0; i < FDD_NUM; i++) { - drives[i].poll = 0; - drives[i].seek = 0; - drives[i].readsector = 0; + drives[i].poll = 0; + drives[i].seek = 0; + drives[i].readsector = 0; } img_init(); @@ -720,7 +672,6 @@ fdd_init(void) } } - void fdd_do_writeback(int drive) { diff --git a/src/floppy/fdd_86f.c b/src/floppy/fdd_86f.c index 2be0b86db..1a7609737 100644 --- a/src/floppy/fdd_86f.c +++ b/src/floppy/fdd_86f.c @@ -37,10 +37,9 @@ #include <86box/fdc.h> #include <86box/fdd_86f.h> #ifdef D86F_COMPRESS -#include +# include #endif - /* * Let's give this some more logic: * @@ -54,54 +53,54 @@ enum { STATE_SECTOR_NOT_FOUND, /* 1 00 00 ??? */ - STATE_0A_FIND_ID = 0x80, /* READ SECTOR ID */ + STATE_0A_FIND_ID = 0x80, /* READ SECTOR ID */ STATE_0A_READ_ID, /* 1 01 00 ??? */ - STATE_06_FIND_ID = 0xA0, /* READ DATA */ + STATE_06_FIND_ID = 0xA0, /* READ DATA */ STATE_06_READ_ID, STATE_06_FIND_DATA, STATE_06_READ_DATA, /* 1 01 01 ??? */ - STATE_05_FIND_ID = 0xA8, /* WRITE DATA */ + STATE_05_FIND_ID = 0xA8, /* WRITE DATA */ STATE_05_READ_ID, STATE_05_FIND_DATA, STATE_05_WRITE_DATA, /* 1 01 10 ??? */ - STATE_11_FIND_ID = 0xB0, /* SCAN EQUAL,SCAN LOW/EQUAL,SCAN HIGH/EQUAL */ + STATE_11_FIND_ID = 0xB0, /* SCAN EQUAL,SCAN LOW/EQUAL,SCAN HIGH/EQUAL */ STATE_11_READ_ID, STATE_11_FIND_DATA, STATE_11_SCAN_DATA, /* 1 01 11 ??? */ - STATE_16_FIND_ID = 0xB8, /* VERIFY */ + STATE_16_FIND_ID = 0xB8, /* VERIFY */ STATE_16_READ_ID, STATE_16_FIND_DATA, STATE_16_VERIFY_DATA, /* 1 10 00 ??? */ - STATE_0C_FIND_ID = 0xC0, /* READ DELETED DATA */ + STATE_0C_FIND_ID = 0xC0, /* READ DELETED DATA */ STATE_0C_READ_ID, STATE_0C_FIND_DATA, STATE_0C_READ_DATA, /* 1 10 01 ??? */ - STATE_09_FIND_ID = 0xC8, /* WRITE DELETED DATA */ + STATE_09_FIND_ID = 0xC8, /* WRITE DELETED DATA */ STATE_09_READ_ID, STATE_09_FIND_DATA, STATE_09_WRITE_DATA, /* 1 11 00 ??? */ - STATE_02_SPIN_TO_INDEX = 0xE0, /* READ TRACK */ + STATE_02_SPIN_TO_INDEX = 0xE0, /* READ TRACK */ STATE_02_FIND_ID, STATE_02_READ_ID, STATE_02_FIND_DATA, STATE_02_READ_DATA, /* 1 11 01 ??? */ - STATE_0D_SPIN_TO_INDEX = 0xE8, /* FORMAT TRACK */ + STATE_0D_SPIN_TO_INDEX = 0xE8, /* FORMAT TRACK */ STATE_0D_FORMAT_TRACK, }; @@ -126,34 +125,33 @@ enum { FMT_POSTTRK_GAP4 }; - typedef struct { - uint8_t buffer[10]; - uint32_t pos; - uint32_t len; + uint8_t buffer[10]; + uint32_t pos; + uint32_t len; } sliding_buffer_t; typedef struct { - uint32_t bits_obtained; - uint16_t bytes_obtained; - uint16_t sync_marks; - uint32_t sync_pos; + uint32_t bits_obtained; + uint16_t bytes_obtained; + uint16_t sync_marks; + uint32_t sync_pos; } find_t; typedef struct { - unsigned nibble0 :4; - unsigned nibble1 :4; + unsigned nibble0 : 4; + unsigned nibble1 : 4; } split_byte_t; typedef union { - uint8_t byte; + uint8_t byte; split_byte_t nibbles; } decoded_t; typedef struct { - uint8_t c, h, r, n; - uint8_t flags, pad, pad0, pad1; - void *prev; + uint8_t c, h, r, n; + uint8_t flags, pad, pad0, pad1; + void *prev; } sector_t; /* Disk flags: @@ -176,40 +174,39 @@ typedef struct { * specifies the entire bitcell count */ typedef struct { - FILE *f; - uint8_t state, fill, sector_count, format_state, - error_condition, id_found; - uint16_t version, disk_flags, satisfying_bytes, turbo_pos; - uint16_t cur_track; - uint16_t track_encoded_data[2][53048]; - uint16_t *track_surface_data[2]; - uint16_t thin_track_encoded_data[2][2][53048]; - uint16_t *thin_track_surface_data[2][2]; - uint16_t side_flags[2]; - uint16_t preceding_bit[2]; - uint16_t current_byte[2]; - uint16_t current_bit[2]; - uint16_t last_word[2]; + FILE *f; + uint8_t state, fill, sector_count, format_state, + error_condition, id_found; + uint16_t version, disk_flags, satisfying_bytes, turbo_pos; + uint16_t cur_track; + uint16_t track_encoded_data[2][53048]; + uint16_t *track_surface_data[2]; + uint16_t thin_track_encoded_data[2][2][53048]; + uint16_t *thin_track_surface_data[2][2]; + uint16_t side_flags[2]; + uint16_t preceding_bit[2]; + uint16_t current_byte[2]; + uint16_t current_bit[2]; + uint16_t last_word[2]; #ifdef D86F_COMPRESS - int is_compressed; + int is_compressed; #endif - int32_t extra_bit_cells[2]; - uint32_t file_size, index_count, track_pos, datac, - id_pos, dma_over; - uint32_t index_hole_pos[2]; - uint32_t track_offset[512]; - sector_id_t last_sector; - sector_id_t req_sector; - find_t id_find; - find_t data_find; - crc_t calc_crc; - crc_t track_crc; - char original_file_name[2048]; - uint8_t *filebuf, *outbuf; - sector_t *last_side_sector[2]; + int32_t extra_bit_cells[2]; + uint32_t file_size, index_count, track_pos, datac, + id_pos, dma_over; + uint32_t index_hole_pos[2]; + uint32_t track_offset[512]; + sector_id_t last_sector; + sector_id_t req_sector; + find_t id_find; + find_t data_find; + crc_t calc_crc; + crc_t track_crc; + char original_file_name[2048]; + uint8_t *filebuf, *outbuf; + sector_t *last_side_sector[2]; } d86f_t; - static const uint8_t encoded_fm[64] = { 0xaa, 0xab, 0xae, 0xaf, 0xba, 0xbb, 0xbe, 0xbf, 0xea, 0xeb, 0xee, 0xef, 0xfa, 0xfb, 0xfe, 0xff, @@ -231,23 +228,20 @@ static const uint8_t encoded_mfm[64] = { 0x4a, 0x49, 0x44, 0x45, 0x52, 0x51, 0x54, 0x55 }; -static d86f_t *d86f[FDD_NUM]; -static uint16_t CRCTable[256]; -static fdc_t *d86f_fdc; -uint64_t poly = 0x42F0E1EBA9EA3693ll; /* ECMA normal */ - +static d86f_t *d86f[FDD_NUM]; +static uint16_t CRCTable[256]; +static fdc_t *d86f_fdc; +uint64_t poly = 0x42F0E1EBA9EA3693ll; /* ECMA normal */ uint16_t d86f_side_flags(int drive); -int d86f_is_mfm(int drive); -void d86f_writeback(int drive); -uint8_t d86f_poll_read_data(int drive, int side, uint16_t pos); -void d86f_poll_write_data(int drive, int side, uint16_t pos, uint8_t data); -int d86f_format_conditions(int drive); - +int d86f_is_mfm(int drive); +void d86f_writeback(int drive); +uint8_t d86f_poll_read_data(int drive, int side, uint16_t pos); +void d86f_poll_write_data(int drive, int side, uint16_t pos, uint8_t data); +int d86f_format_conditions(int drive); #ifdef ENABLE_D86F_LOG -int d86f_do_log = ENABLE_D86F_LOG; - +int d86f_do_log = ENABLE_D86F_LOG; static void d86f_log(const char *fmt, ...) @@ -255,96 +249,89 @@ d86f_log(const char *fmt, ...) va_list ap; if (d86f_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define d86f_log(fmt, ...) +# define d86f_log(fmt, ...) #endif - static void setup_crc(uint16_t poly) { - int c = 256, bc; + int c = 256, bc; uint16_t temp; - while(c--) { - temp = c << 8; - bc = 8; + while (c--) { + temp = c << 8; + bc = 8; - while (bc--) { - if (temp & 0x8000) - temp = (temp << 1) ^ poly; - else - temp <<= 1; + while (bc--) { + if (temp & 0x8000) + temp = (temp << 1) ^ poly; + else + temp <<= 1; - CRCTable[c] = temp; - } + CRCTable[c] = temp; + } } } - void d86f_destroy_linked_lists(int drive, int side) { - d86f_t *dev = d86f[drive]; + d86f_t *dev = d86f[drive]; sector_t *s, *t; - if (dev == NULL) return; + if (dev == NULL) + return; if (dev->last_side_sector[side]) { - s = dev->last_side_sector[side]; - while (s) { - t = s->prev; - free(s); - s = NULL; - if (! t) - break; - s = t; - } - dev->last_side_sector[side] = NULL; + s = dev->last_side_sector[side]; + while (s) { + t = s->prev; + free(s); + s = NULL; + if (!t) + break; + s = t; + } + dev->last_side_sector[side] = NULL; } } - static int d86f_has_surface_desc(int drive) { return (d86f_handler[drive].disk_flags(drive) & 1); } - int d86f_get_sides(int drive) { return ((d86f_handler[drive].disk_flags(drive) >> 3) & 1) + 1; } - int d86f_get_rpm_mode(int drive) { return (d86f_handler[drive].disk_flags(drive) & 0x60) >> 5; } - int d86f_get_speed_shift_dir(int drive) { return (d86f_handler[drive].disk_flags(drive) & 0x1000) >> 12; } - int d86f_reverse_bytes(int drive) { return (d86f_handler[drive].disk_flags(drive) & 0x800) >> 11; } - uint16_t d86f_disk_flags(int drive) { @@ -353,7 +340,6 @@ d86f_disk_flags(int drive) return dev->disk_flags; } - uint32_t d86f_index_hole_pos(int drive, int side) { @@ -362,56 +348,48 @@ d86f_index_hole_pos(int drive, int side) return dev->index_hole_pos[side]; } - uint32_t null_index_hole_pos(int drive, int side) { return 0; } - uint16_t null_disk_flags(int drive) { return 0x09; } - uint16_t null_side_flags(int drive) { return 0x0A; } - void null_writeback(int drive) { return; } - void null_set_sector(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n) { return; } - void null_write_data(int drive, int side, uint16_t pos, uint8_t data) { return; } - int null_format_conditions(int drive) { return 0; } - int32_t d86f_extra_bit_cells(int drive, int side) { @@ -420,15 +398,13 @@ d86f_extra_bit_cells(int drive, int side) return dev->extra_bit_cells[side]; } - int32_t null_extra_bit_cells(int drive, int side) { return 0; } - -uint16_t* +uint16_t * common_encoded_data(int drive, int side) { d86f_t *dev = d86f[drive]; @@ -436,26 +412,23 @@ common_encoded_data(int drive, int side) return dev->track_encoded_data[side]; } - void common_read_revolution(int drive) { return; } - uint16_t d86f_side_flags(int drive) { d86f_t *dev = d86f[drive]; - int side; + int side; side = fdd_get_head(drive); return dev->side_flags[side]; } - uint16_t d86f_track_flags(int drive) { @@ -467,102 +440,102 @@ d86f_track_flags(int drive) tf &= ~0x67; switch (rr) { - case 0x02: - case 0x21: - /* 1 MB unformatted medium, treat these two as equivalent. */ - switch (dr) { - case 0x06: - /* 5.25" Single-RPM HD drive, treat as 300 kbps, 360 rpm. */ - tf |= 0x21; - break; + case 0x02: + case 0x21: + /* 1 MB unformatted medium, treat these two as equivalent. */ + switch (dr) { + case 0x06: + /* 5.25" Single-RPM HD drive, treat as 300 kbps, 360 rpm. */ + tf |= 0x21; + break; - default: - /* Any other drive, treat as 250 kbps, 300 rpm. */ - tf |= 0x02; - break; - } - break; + default: + /* Any other drive, treat as 250 kbps, 300 rpm. */ + tf |= 0x02; + break; + } + break; - default: - tf |= rr; - break; + default: + tf |= rr; + break; } return tf; } - uint32_t common_get_raw_size(int drive, int side) { - double rate = 0.0; - double rpm, rpm_diff; - double size = 100000.0; - int mfm; - int rm, ssd; + double rate = 0.0; + double rpm, rpm_diff; + double size = 100000.0; + int mfm; + int rm, ssd; uint32_t extra_bc = 0; - mfm = d86f_is_mfm(drive); - rpm = ((d86f_track_flags(drive) & 0xE0) == 0x20) ? 360.0 : 300.0; + mfm = d86f_is_mfm(drive); + rpm = ((d86f_track_flags(drive) & 0xE0) == 0x20) ? 360.0 : 300.0; rpm_diff = 1.0; - rm = d86f_get_rpm_mode(drive); - ssd = d86f_get_speed_shift_dir(drive); + rm = d86f_get_rpm_mode(drive); + ssd = d86f_get_speed_shift_dir(drive); /* 0% speed shift and shift direction 1: special case where extra bit cells are the entire track size. */ if (!rm && ssd) - extra_bc = d86f_handler[drive].extra_bit_cells(drive, side); + extra_bc = d86f_handler[drive].extra_bit_cells(drive, side); if (extra_bc) - return extra_bc; + return extra_bc; switch (rm) { - case 1: - rpm_diff = 1.01; - break; + case 1: + rpm_diff = 1.01; + break; - case 2: - rpm_diff = 1.015; - break; + case 2: + rpm_diff = 1.015; + break; - case 3: - rpm_diff = 1.02; - break; + case 3: + rpm_diff = 1.02; + break; - default: - rpm_diff = 1.0; - break; + default: + rpm_diff = 1.0; + break; } if (ssd) - rpm_diff = 1.0 / rpm_diff; + rpm_diff = 1.0 / rpm_diff; switch (d86f_track_flags(drive) & 7) { - case 0: - rate = 500.0; - break; + case 0: + rate = 500.0; + break; - case 1: - rate = 300.0; - break; + case 1: + rate = 300.0; + break; - case 2: - rate = 250.0; - break; + case 2: + rate = 250.0; + break; - case 3: - rate = 1000.0; - break; + case 3: + rate = 1000.0; + break; - case 5: - rate = 2000.0; - break; + case 5: + rate = 2000.0; + break; - default: - rate = 250.0; - break; + default: + rate = 250.0; + break; } - if (! mfm) rate /= 2.0; + if (!mfm) + rate /= 2.0; size = (size / 250.0) * rate; size = (size * 300.0) / rpm; @@ -575,7 +548,6 @@ common_get_raw_size(int drive, int side) return ((((uint32_t) size) >> 4) << 4) + d86f_handler[drive].extra_bit_cells(drive, side); } - void d86f_set_version(int drive, uint16_t version) { @@ -584,49 +556,47 @@ d86f_set_version(int drive, uint16_t version) dev->version = version; } - void d86f_unregister(int drive) { d86f_t *dev = d86f[drive]; - if (dev == NULL) return; + if (dev == NULL) + return; - d86f_handler[drive].disk_flags = null_disk_flags; - d86f_handler[drive].side_flags = null_side_flags; - d86f_handler[drive].writeback = null_writeback; - d86f_handler[drive].set_sector = null_set_sector; - d86f_handler[drive].write_data = null_write_data; + d86f_handler[drive].disk_flags = null_disk_flags; + d86f_handler[drive].side_flags = null_side_flags; + d86f_handler[drive].writeback = null_writeback; + d86f_handler[drive].set_sector = null_set_sector; + d86f_handler[drive].write_data = null_write_data; d86f_handler[drive].format_conditions = null_format_conditions; - d86f_handler[drive].extra_bit_cells = null_extra_bit_cells; - d86f_handler[drive].encoded_data = common_encoded_data; - d86f_handler[drive].read_revolution = common_read_revolution; - d86f_handler[drive].index_hole_pos = null_index_hole_pos; - d86f_handler[drive].get_raw_size = common_get_raw_size; - d86f_handler[drive].check_crc = 0; + d86f_handler[drive].extra_bit_cells = null_extra_bit_cells; + d86f_handler[drive].encoded_data = common_encoded_data; + d86f_handler[drive].read_revolution = common_read_revolution; + d86f_handler[drive].index_hole_pos = null_index_hole_pos; + d86f_handler[drive].get_raw_size = common_get_raw_size; + d86f_handler[drive].check_crc = 0; - dev->version = 0x0063; /* Proxied formats report as version 0.99. */ + dev->version = 0x0063; /* Proxied formats report as version 0.99. */ } - void d86f_register_86f(int drive) { - d86f_handler[drive].disk_flags = d86f_disk_flags; - d86f_handler[drive].side_flags = d86f_side_flags; - d86f_handler[drive].writeback = d86f_writeback; - d86f_handler[drive].set_sector = null_set_sector; - d86f_handler[drive].write_data = null_write_data; + d86f_handler[drive].disk_flags = d86f_disk_flags; + d86f_handler[drive].side_flags = d86f_side_flags; + d86f_handler[drive].writeback = d86f_writeback; + d86f_handler[drive].set_sector = null_set_sector; + d86f_handler[drive].write_data = null_write_data; d86f_handler[drive].format_conditions = d86f_format_conditions; - d86f_handler[drive].extra_bit_cells = d86f_extra_bit_cells; - d86f_handler[drive].encoded_data = common_encoded_data; - d86f_handler[drive].read_revolution = common_read_revolution; - d86f_handler[drive].index_hole_pos = d86f_index_hole_pos; - d86f_handler[drive].get_raw_size = common_get_raw_size; - d86f_handler[drive].check_crc = 1; + d86f_handler[drive].extra_bit_cells = d86f_extra_bit_cells; + d86f_handler[drive].encoded_data = common_encoded_data; + d86f_handler[drive].read_revolution = common_read_revolution; + d86f_handler[drive].index_hole_pos = d86f_index_hole_pos; + d86f_handler[drive].get_raw_size = common_get_raw_size; + d86f_handler[drive].check_crc = 1; } - int d86f_get_array_size(int drive, int side, int words) { @@ -634,91 +604,91 @@ d86f_get_array_size(int drive, int side, int words) int hole, rm; int ssd; - rm = d86f_get_rpm_mode(drive); - ssd = d86f_get_speed_shift_dir(drive); + rm = d86f_get_rpm_mode(drive); + ssd = d86f_get_speed_shift_dir(drive); hole = (d86f_handler[drive].disk_flags(drive) & 6) >> 1; - if (!rm && ssd) /* Special case - extra bit cells size specifies entire array size. */ - array_size = 0; - else switch (hole) { - case 0: - case 1: - default: - array_size = 12500; - switch (rm) { - case 1: - array_size = ssd ? 12376 : 12625; - break; + if (!rm && ssd) /* Special case - extra bit cells size specifies entire array size. */ + array_size = 0; + else + switch (hole) { + case 0: + case 1: + default: + array_size = 12500; + switch (rm) { + case 1: + array_size = ssd ? 12376 : 12625; + break; - case 2: - array_size = ssd ? 12315 : 12687; - break; + case 2: + array_size = ssd ? 12315 : 12687; + break; - case 3: - array_size = ssd ? 12254 : 12750; - break; + case 3: + array_size = ssd ? 12254 : 12750; + break; - default: - break; - } - break; + default: + break; + } + break; - case 2: - array_size = 25000; - switch (rm) { - case 1: - array_size = ssd ? 24752 : 25250; - break; + case 2: + array_size = 25000; + switch (rm) { + case 1: + array_size = ssd ? 24752 : 25250; + break; - case 2: - array_size = ssd ? 24630 : 25375; - break; + case 2: + array_size = ssd ? 24630 : 25375; + break; - case 3: - array_size = ssd ? 24509 : 25500; - break; + case 3: + array_size = ssd ? 24509 : 25500; + break; - default: - break; - } - break; + default: + break; + } + break; - case 3: - array_size = 50000; - switch (rm) { - case 1: - array_size = ssd ? 49504 : 50500; - break; + case 3: + array_size = 50000; + switch (rm) { + case 1: + array_size = ssd ? 49504 : 50500; + break; - case 2: - array_size = ssd ? 49261 : 50750; - break; + case 2: + array_size = ssd ? 49261 : 50750; + break; - case 3: - array_size = ssd ? 49019 : 51000; - break; + case 3: + array_size = ssd ? 49019 : 51000; + break; - default: - break; - } - break; - } + default: + break; + } + break; + } array_size <<= 4; array_size += d86f_handler[drive].extra_bit_cells(drive, side); if (array_size & 15) - array_size = (array_size >> 4) + 1; + array_size = (array_size >> 4) + 1; else - array_size = (array_size >> 4); + array_size = (array_size >> 4); if (!words) - array_size <<= 1; + array_size <<= 1; return array_size; } - int d86f_valid_bit_rate(int drive) { @@ -727,209 +697,218 @@ d86f_valid_bit_rate(int drive) rate = fdc_get_bit_rate(d86f_fdc); hole = (d86f_handler[drive].disk_flags(drive) & 6) >> 1; switch (hole) { - case 0: /* DD */ - if (!rate && (fdd_get_flags(drive) & 0x10)) return 1; - if ((rate < 1) || (rate > 2)) return 0; - return 1; + case 0: /* DD */ + if (!rate && (fdd_get_flags(drive) & 0x10)) + return 1; + if ((rate < 1) || (rate > 2)) + return 0; + return 1; - case 1: /* HD */ - if (rate != 0) return 0; - return 1; + case 1: /* HD */ + if (rate != 0) + return 0; + return 1; - case 2: /* ED */ - if (rate != 3) return 0; - return 1; + case 2: /* ED */ + if (rate != 3) + return 0; + return 1; - case 3: /* ED with 2000 kbps support */ - if (rate < 3) return 0; - return 1; + case 3: /* ED with 2000 kbps support */ + if (rate < 3) + return 0; + return 1; - default: - break; + default: + break; } return 0; } - int d86f_hole(int drive) { if (((d86f_handler[drive].disk_flags(drive) >> 1) & 3) == 3) - return 2; + return 2; return (d86f_handler[drive].disk_flags(drive) >> 1) & 3; } - uint8_t d86f_get_encoding(int drive) { return (d86f_track_flags(drive) & 0x18) >> 3; } - uint64_t d86f_byteperiod(int drive) { double dusec = (double) TIMER_USEC; - double p = 2.0; + double p = 2.0; switch (d86f_track_flags(drive) & 0x0f) { - case 0x02: /* 125 kbps, FM */ - p = 4.0; - break; - case 0x01: /* 150 kbps, FM */ - p = 20.0 / 6.0; - break; - case 0x0a: /* 250 kbps, MFM */ - case 0x00: /* 250 kbps, FM */ - default: - p = 2.0; - break; - case 0x09: /* 300 kbps, MFM */ - p = 10.0 / 6.0; - break; - case 0x08: /* 500 kbps, MFM */ - p = 1.0; - break; - case 0x0b: /* 1000 kbps, MFM */ - p = 0.5; - break; - case 0x0d: /* 2000 kbps, MFM */ - p = 0.25; - break; + case 0x02: /* 125 kbps, FM */ + p = 4.0; + break; + case 0x01: /* 150 kbps, FM */ + p = 20.0 / 6.0; + break; + case 0x0a: /* 250 kbps, MFM */ + case 0x00: /* 250 kbps, FM */ + default: + p = 2.0; + break; + case 0x09: /* 300 kbps, MFM */ + p = 10.0 / 6.0; + break; + case 0x08: /* 500 kbps, MFM */ + p = 1.0; + break; + case 0x0b: /* 1000 kbps, MFM */ + p = 0.5; + break; + case 0x0d: /* 2000 kbps, MFM */ + p = 0.25; + break; } return (uint64_t) (p * dusec); } - int d86f_is_mfm(int drive) { return ((d86f_track_flags(drive) & 0x18) == 0x08) ? 1 : 0; } - uint32_t d86f_get_data_len(int drive) { - d86f_t *dev = d86f[drive]; + d86f_t *dev = d86f[drive]; uint32_t i, ret = 128; if (dev->req_sector.id.n) - ret = (uint32_t)128 << dev->req_sector.id.n; + ret = (uint32_t) 128 << dev->req_sector.id.n; else if ((i = fdc_get_dtl(d86f_fdc)) < 128) - ret = i; + ret = i; return ret; } - uint32_t d86f_has_extra_bit_cells(int drive) { return (d86f_handler[drive].disk_flags(drive) >> 7) & 1; } - uint32_t d86f_header_size(int drive) { return 8; } - static uint16_t d86f_encode_get_data(uint8_t dat) { uint16_t temp; temp = 0; - if (dat & 0x01) temp |= 1; - if (dat & 0x02) temp |= 4; - if (dat & 0x04) temp |= 16; - if (dat & 0x08) temp |= 64; - if (dat & 0x10) temp |= 256; - if (dat & 0x20) temp |= 1024; - if (dat & 0x40) temp |= 4096; - if (dat & 0x80) temp |= 16384; + if (dat & 0x01) + temp |= 1; + if (dat & 0x02) + temp |= 4; + if (dat & 0x04) + temp |= 16; + if (dat & 0x08) + temp |= 64; + if (dat & 0x10) + temp |= 256; + if (dat & 0x20) + temp |= 1024; + if (dat & 0x40) + temp |= 4096; + if (dat & 0x80) + temp |= 16384; return temp; } - static uint16_t d86f_encode_get_clock(uint8_t dat) { uint16_t temp; temp = 0; - if (dat & 0x01) temp |= 2; - if (dat & 0x02) temp |= 8; - if (dat & 0x40) temp |= 32; - if (dat & 0x08) temp |= 128; - if (dat & 0x10) temp |= 512; - if (dat & 0x20) temp |= 2048; - if (dat & 0x40) temp |= 8192; - if (dat & 0x80) temp |= 32768; + if (dat & 0x01) + temp |= 2; + if (dat & 0x02) + temp |= 8; + if (dat & 0x40) + temp |= 32; + if (dat & 0x08) + temp |= 128; + if (dat & 0x10) + temp |= 512; + if (dat & 0x20) + temp |= 2048; + if (dat & 0x40) + temp |= 8192; + if (dat & 0x80) + temp |= 32768; return temp; } - int d86f_format_conditions(int drive) { return d86f_valid_bit_rate(drive); } - int d86f_wrong_densel(int drive) { int is_3mode = 0; if ((fdd_get_flags(drive) & 7) == 3) - is_3mode = 1; + is_3mode = 1; switch (d86f_hole(drive)) { - case 0: - default: - if (fdd_is_dd(drive)) - return 0; - if (fdd_get_densel(drive)) - return 1; - else - return 0; - break; + case 0: + default: + if (fdd_is_dd(drive)) + return 0; + if (fdd_get_densel(drive)) + return 1; + else + return 0; + break; - case 1: - if (fdd_is_dd(drive)) - return 1; - if (fdd_get_densel(drive)) - return 0; - else { - if (is_3mode) - return 0; - else - return 1; - } - break; + case 1: + if (fdd_is_dd(drive)) + return 1; + if (fdd_get_densel(drive)) + return 0; + else { + if (is_3mode) + return 0; + else + return 1; + } + break; - case 2: - if (fdd_is_dd(drive) || !fdd_is_ed(drive)) - return 1; - if (fdd_get_densel(drive)) - return 0; - else - return 1; - break; + case 2: + if (fdd_is_dd(drive) || !fdd_is_ed(drive)) + return 1; + if (fdd_get_densel(drive)) + return 0; + else + return 1; + break; } } - int d86f_can_format(int drive) { @@ -938,76 +917,74 @@ d86f_can_format(int drive) temp = !writeprot[drive]; temp = temp && !fdc_get_swwp(d86f_fdc); temp = temp && fdd_can_read_medium(real_drive(d86f_fdc, drive)); - temp = temp && d86f_handler[drive].format_conditions(drive); /* Allows proxied formats to add their own extra conditions to formatting. */ + temp = temp && d86f_handler[drive].format_conditions(drive); /* Allows proxied formats to add their own extra conditions to formatting. */ temp = temp && !d86f_wrong_densel(drive); return temp; } - uint16_t d86f_encode_byte(int drive, int sync, decoded_t b, decoded_t prev_b) { - uint8_t encoding = d86f_get_encoding(drive); - uint8_t bits89AB = prev_b.nibbles.nibble0; - uint8_t bits7654 = b.nibbles.nibble1; - uint8_t bits3210 = b.nibbles.nibble0; + uint8_t encoding = d86f_get_encoding(drive); + uint8_t bits89AB = prev_b.nibbles.nibble0; + uint8_t bits7654 = b.nibbles.nibble1; + uint8_t bits3210 = b.nibbles.nibble0; uint16_t encoded_7654, encoded_3210, result; if (encoding > 1) - return 0xffff; + return 0xffff; if (sync) { - result = d86f_encode_get_data(b.byte); - if (encoding) { - switch(b.byte) { - case 0xa1: - return result | d86f_encode_get_clock(0x0a); + result = d86f_encode_get_data(b.byte); + if (encoding) { + switch (b.byte) { + case 0xa1: + return result | d86f_encode_get_clock(0x0a); - case 0xc2: - return result | d86f_encode_get_clock(0x14); + case 0xc2: + return result | d86f_encode_get_clock(0x14); - case 0xf8: - return result | d86f_encode_get_clock(0x03); + case 0xf8: + return result | d86f_encode_get_clock(0x03); - case 0xfb: - case 0xfe: - return result | d86f_encode_get_clock(0x00); + case 0xfb: + case 0xfe: + return result | d86f_encode_get_clock(0x00); - case 0xfc: - return result | d86f_encode_get_clock(0x01); - } - } else { - switch(b.byte) { - case 0xf8: - case 0xfb: - case 0xfe: - return result | d86f_encode_get_clock(0xc7); + case 0xfc: + return result | d86f_encode_get_clock(0x01); + } + } else { + switch (b.byte) { + case 0xf8: + case 0xfb: + case 0xfe: + return result | d86f_encode_get_clock(0xc7); - case 0xfc: - return result | d86f_encode_get_clock(0xd7); - } - } + case 0xfc: + return result | d86f_encode_get_clock(0xd7); + } + } } bits3210 += ((bits7654 & 3) << 4); bits7654 += ((bits89AB & 3) << 4); encoded_3210 = (encoding == 1) ? encoded_mfm[bits3210] : encoded_fm[bits3210]; encoded_7654 = (encoding == 1) ? encoded_mfm[bits7654] : encoded_fm[bits7654]; - result = (encoded_7654 << 8) | encoded_3210; + result = (encoded_7654 << 8) | encoded_3210; return result; } - static int d86f_get_bitcell_period(int drive) { - double rate = 0.0; - int mfm = 0; - int tflags = 0; - double rpm = 0; - double size = 8000.0; + double rate = 0.0; + int mfm = 0; + int tflags = 0; + double rpm = 0; + double size = 8000.0; tflags = d86f_track_flags(drive); @@ -1015,37 +992,36 @@ d86f_get_bitcell_period(int drive) rpm = ((tflags & 0xE0) == 0x20) ? 360.0 : 300.0; switch (tflags & 7) { - case 0: - rate = 500.0; - break; + case 0: + rate = 500.0; + break; - case 1: - rate = 300.0; - break; + case 1: + rate = 300.0; + break; - case 2: - rate = 250.0; - break; + case 2: + rate = 250.0; + break; - case 3: - rate = 1000.0; - break; + case 3: + rate = 1000.0; + break; - case 5: - rate = 2000.0; - break; + case 5: + rate = 2000.0; + break; } - if (! mfm) - rate /= 2.0; + if (!mfm) + rate /= 2.0; size = (size * 250.0) / rate; size = (size * 300.0) / rpm; size = (size * fdd_getrpm(real_drive(d86f_fdc, drive))) / 300.0; - return (int)size; + return (int) size; } - int d86f_can_read_address(int drive) { @@ -1059,11 +1035,10 @@ d86f_can_read_address(int drive) return temp; } - void d86f_get_bit(int drive, int side) { - d86f_t *dev = d86f[drive]; + d86f_t *dev = d86f[drive]; uint32_t track_word; uint32_t track_bit; uint16_t encoded_data; @@ -1077,45 +1052,44 @@ d86f_get_bit(int drive, int side) track_bit = 15 - (dev->track_pos & 15); if (d86f_reverse_bytes(drive)) { - /* Image is in reverse endianness, read the data as is. */ - encoded_data = d86f_handler[drive].encoded_data(drive, side)[track_word]; + /* Image is in reverse endianness, read the data as is. */ + encoded_data = d86f_handler[drive].encoded_data(drive, side)[track_word]; } else { - /* We store the words as big endian, so we need to convert them to little endian when reading. */ - encoded_data = (d86f_handler[drive].encoded_data(drive, side)[track_word] & 0xFF) << 8; - encoded_data |= (d86f_handler[drive].encoded_data(drive, side)[track_word] >> 8); + /* We store the words as big endian, so we need to convert them to little endian when reading. */ + encoded_data = (d86f_handler[drive].encoded_data(drive, side)[track_word] & 0xFF) << 8; + encoded_data |= (d86f_handler[drive].encoded_data(drive, side)[track_word] >> 8); } /* In some cases, misindentification occurs so we need to make sure the surface data array is not not NULL. */ if (d86f_has_surface_desc(drive) && dev->track_surface_data[side]) { - if (d86f_reverse_bytes(drive)) { - surface_data = dev->track_surface_data[side][track_word] & 0xFF; - } else { - surface_data = (dev->track_surface_data[side][track_word] & 0xFF) << 8; - surface_data |= (dev->track_surface_data[side][track_word] >> 8); - } + if (d86f_reverse_bytes(drive)) { + surface_data = dev->track_surface_data[side][track_word] & 0xFF; + } else { + surface_data = (dev->track_surface_data[side][track_word] & 0xFF) << 8; + surface_data |= (dev->track_surface_data[side][track_word] >> 8); + } } current_bit = (encoded_data >> track_bit) & 1; dev->last_word[side] <<= 1; if (d86f_has_surface_desc(drive) && dev->track_surface_data[side]) { - surface_bit = (surface_data >> track_bit) & 1; - if (! surface_bit) - dev->last_word[side] |= current_bit; - else { - /* Bit is either 0 or 1 and is set to fuzzy, we randomly generate it. */ - dev->last_word[side] |= (random_generate() & 1); - } + surface_bit = (surface_data >> track_bit) & 1; + if (!surface_bit) + dev->last_word[side] |= current_bit; + else { + /* Bit is either 0 or 1 and is set to fuzzy, we randomly generate it. */ + dev->last_word[side] |= (random_generate() & 1); + } } else - dev->last_word[side] |= current_bit; + dev->last_word[side] |= current_bit; } - void d86f_put_bit(int drive, int side, int bit) { - d86f_t *dev = d86f[drive]; + d86f_t *dev = d86f[drive]; uint32_t track_word; uint32_t track_bit; uint16_t encoded_data; @@ -1124,7 +1098,7 @@ d86f_put_bit(int drive, int side, int bit) uint16_t surface_bit; if (fdc_get_diswr(d86f_fdc)) - return; + return; track_word = dev->track_pos >> 4; @@ -1132,65 +1106,64 @@ d86f_put_bit(int drive, int side, int bit) track_bit = 15 - (dev->track_pos & 15); if (d86f_reverse_bytes(drive)) { - /* Image is in reverse endianness, read the data as is. */ - encoded_data = d86f_handler[drive].encoded_data(drive, side)[track_word]; + /* Image is in reverse endianness, read the data as is. */ + encoded_data = d86f_handler[drive].encoded_data(drive, side)[track_word]; } else { - /* We store the words as big endian, so we need to convert them to little endian when reading. */ - encoded_data = (d86f_handler[drive].encoded_data(drive, side)[track_word] & 0xFF) << 8; - encoded_data |= (d86f_handler[drive].encoded_data(drive, side)[track_word] >> 8); + /* We store the words as big endian, so we need to convert them to little endian when reading. */ + encoded_data = (d86f_handler[drive].encoded_data(drive, side)[track_word] & 0xFF) << 8; + encoded_data |= (d86f_handler[drive].encoded_data(drive, side)[track_word] >> 8); } if (d86f_has_surface_desc(drive)) { - if (d86f_reverse_bytes(drive)) { - surface_data = dev->track_surface_data[side][track_word] & 0xFF; - } else { - surface_data = (dev->track_surface_data[side][track_word] & 0xFF) << 8; - surface_data |= (dev->track_surface_data[side][track_word] >> 8); - } + if (d86f_reverse_bytes(drive)) { + surface_data = dev->track_surface_data[side][track_word] & 0xFF; + } else { + surface_data = (dev->track_surface_data[side][track_word] & 0xFF) << 8; + surface_data |= (dev->track_surface_data[side][track_word] >> 8); + } } current_bit = (encoded_data >> track_bit) & 1; dev->last_word[side] <<= 1; if (d86f_has_surface_desc(drive)) { - surface_bit = (surface_data >> track_bit) & 1; - if (! surface_bit) { - dev->last_word[side] |= bit; - current_bit = bit; - } else { - if (current_bit) { - /* Bit is 1 and is set to fuzzy, we overwrite it with a non-fuzzy bit. */ - dev->last_word[side] |= bit; - current_bit = bit; - surface_bit = 0; - } - } + surface_bit = (surface_data >> track_bit) & 1; + if (!surface_bit) { + dev->last_word[side] |= bit; + current_bit = bit; + } else { + if (current_bit) { + /* Bit is 1 and is set to fuzzy, we overwrite it with a non-fuzzy bit. */ + dev->last_word[side] |= bit; + current_bit = bit; + surface_bit = 0; + } + } - surface_data &= ~(1 << track_bit); - surface_data |= (surface_bit << track_bit); - if (d86f_reverse_bytes(drive)) { - dev->track_surface_data[side][track_word] = surface_data; - } else { - dev->track_surface_data[side][track_word] = (surface_data & 0xFF) << 8; - dev->track_surface_data[side][track_word] |= (surface_data >> 8); - } + surface_data &= ~(1 << track_bit); + surface_data |= (surface_bit << track_bit); + if (d86f_reverse_bytes(drive)) { + dev->track_surface_data[side][track_word] = surface_data; + } else { + dev->track_surface_data[side][track_word] = (surface_data & 0xFF) << 8; + dev->track_surface_data[side][track_word] |= (surface_data >> 8); + } } else { - dev->last_word[side] |= bit; - current_bit = bit; + dev->last_word[side] |= bit; + current_bit = bit; } encoded_data &= ~(1 << track_bit); encoded_data |= (current_bit << track_bit); if (d86f_reverse_bytes(drive)) { - d86f_handler[drive].encoded_data(drive, side)[track_word] = encoded_data; + d86f_handler[drive].encoded_data(drive, side)[track_word] = encoded_data; } else { - d86f_handler[drive].encoded_data(drive, side)[track_word] = (encoded_data & 0xFF) << 8; - d86f_handler[drive].encoded_data(drive, side)[track_word] |= (encoded_data >> 8); + d86f_handler[drive].encoded_data(drive, side)[track_word] = (encoded_data & 0xFF) << 8; + d86f_handler[drive].encoded_data(drive, side)[track_word] |= (encoded_data >> 8); } } - static uint8_t decodefm(int drive, uint16_t dat) { @@ -1200,42 +1173,46 @@ decodefm(int drive, uint16_t dat) * We write the encoded bytes in big endian, so we * process the two 8-bit halves swapped here. */ - if (dat & 0x0001) temp |= 1; - if (dat & 0x0004) temp |= 2; - if (dat & 0x0010) temp |= 4; - if (dat & 0x0040) temp |= 8; - if (dat & 0x0100) temp |= 16; - if (dat & 0x0400) temp |= 32; - if (dat & 0x1000) temp |= 64; - if (dat & 0x4000) temp |= 128; + if (dat & 0x0001) + temp |= 1; + if (dat & 0x0004) + temp |= 2; + if (dat & 0x0010) + temp |= 4; + if (dat & 0x0040) + temp |= 8; + if (dat & 0x0100) + temp |= 16; + if (dat & 0x0400) + temp |= 32; + if (dat & 0x1000) + temp |= 64; + if (dat & 0x4000) + temp |= 128; return temp; } - void fdd_calccrc(uint8_t byte, crc_t *crc_var) { - crc_var->word = (crc_var->word << 8) ^ - CRCTable[(crc_var->word >> 8)^byte]; + crc_var->word = (crc_var->word << 8) ^ CRCTable[(crc_var->word >> 8) ^ byte]; } - static void d86f_calccrc(d86f_t *dev, uint8_t byte) { fdd_calccrc(byte, &(dev->calc_crc)); } - int d86f_word_is_aligned(int drive, int side, uint32_t base_pos) { - d86f_t *dev = d86f[drive]; + d86f_t *dev = d86f[drive]; uint32_t adjusted_track_pos = dev->track_pos; if (base_pos == 0xFFFFFFFF) - return 0; + return 0; /* * This is very important, it makes sure alignment is detected @@ -1243,15 +1220,14 @@ d86f_word_is_aligned(int drive, int side, uint32_t base_pos) * is not divisible by 16. */ if (adjusted_track_pos < base_pos) - adjusted_track_pos += d86f_handler[drive].get_raw_size(drive, side); + adjusted_track_pos += d86f_handler[drive].get_raw_size(drive, side); if ((adjusted_track_pos & 15) == (base_pos & 15)) - return 1; + return 1; return 0; } - /* State 1: Find sector ID */ void d86f_find_address_mark_fm(int drive, int side, find_t *find, uint16_t req_am, uint16_t other_am, uint16_t wrong_am, uint16_t ignore_other_am) @@ -1261,42 +1237,41 @@ d86f_find_address_mark_fm(int drive, int side, find_t *find, uint16_t req_am, ui d86f_get_bit(drive, side); if (dev->last_word[side] == req_am) { - dev->calc_crc.word = 0xFFFF; - fdd_calccrc(decodefm(drive, dev->last_word[side]), &(dev->calc_crc)); - find->sync_marks = find->bits_obtained = find->bytes_obtained = 0; - find->sync_pos = 0xFFFFFFFF; - dev->preceding_bit[side] = dev->last_word[side] & 1; - dev->state++; - return; + dev->calc_crc.word = 0xFFFF; + fdd_calccrc(decodefm(drive, dev->last_word[side]), &(dev->calc_crc)); + find->sync_marks = find->bits_obtained = find->bytes_obtained = 0; + find->sync_pos = 0xFFFFFFFF; + dev->preceding_bit[side] = dev->last_word[side] & 1; + dev->state++; + return; } if ((wrong_am) && (dev->last_word[side] == wrong_am)) { - dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; - dev->error_condition = 0; - dev->state = STATE_IDLE; - fdc_finishread(d86f_fdc); - fdc_nodataam(d86f_fdc); - return; + dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; + dev->error_condition = 0; + dev->state = STATE_IDLE; + fdc_finishread(d86f_fdc); + fdc_nodataam(d86f_fdc); + return; } if ((ignore_other_am & 2) && (dev->last_word[side] == other_am)) { - dev->calc_crc.word = 0xFFFF; - fdd_calccrc(decodefm(drive, dev->last_word[side]), &(dev->calc_crc)); - find->sync_marks = find->bits_obtained = find->bytes_obtained = 0; - find->sync_pos = 0xFFFFFFFF; - if (ignore_other_am & 1) { - /* Skip mode, let's go back to finding ID. */ - dev->state -= 2; - } else { - /* Not skip mode, process the sector anyway. */ - fdc_set_wrong_am(d86f_fdc); - dev->preceding_bit[side] = dev->last_word[side] & 1; - dev->state++; - } + dev->calc_crc.word = 0xFFFF; + fdd_calccrc(decodefm(drive, dev->last_word[side]), &(dev->calc_crc)); + find->sync_marks = find->bits_obtained = find->bytes_obtained = 0; + find->sync_pos = 0xFFFFFFFF; + if (ignore_other_am & 1) { + /* Skip mode, let's go back to finding ID. */ + dev->state -= 2; + } else { + /* Not skip mode, process the sector anyway. */ + fdc_set_wrong_am(d86f_fdc); + dev->preceding_bit[side] = dev->last_word[side] & 1; + dev->state++; + } } } - /* When writing in FM mode, we find the beginning of the address mark by looking for 352 (22 * 16) set bits (gap fill = 0xFF, 0xFFFF FM-encoded). */ void d86f_write_find_address_mark_fm(int drive, int side, find_t *find) @@ -1306,24 +1281,23 @@ d86f_write_find_address_mark_fm(int drive, int side, find_t *find) d86f_get_bit(drive, side); if (dev->last_word[side] & 1) { - find->sync_marks++; - if (find->sync_marks == 352) { - dev->calc_crc.word = 0xFFFF; - dev->preceding_bit[side] = 1; - find->sync_marks = 0; - dev->state++; - return; - } + find->sync_marks++; + if (find->sync_marks == 352) { + dev->calc_crc.word = 0xFFFF; + dev->preceding_bit[side] = 1; + find->sync_marks = 0; + dev->state++; + return; + } } /* If we hadn't found enough set bits but have found a clear bit, null the counter of set bits. */ if (!(dev->last_word[side] & 1)) { - find->sync_marks = find->bits_obtained = find->bytes_obtained = 0; - find->sync_pos = 0xFFFFFFFF; + find->sync_marks = find->bits_obtained = find->bytes_obtained = 0; + find->sync_pos = 0xFFFFFFFF; } } - void d86f_find_address_mark_mfm(int drive, int side, find_t *find, uint16_t req_am, uint16_t other_am, uint16_t wrong_am, uint16_t ignore_other_am) { @@ -1332,60 +1306,59 @@ d86f_find_address_mark_mfm(int drive, int side, find_t *find, uint16_t req_am, u d86f_get_bit(drive, side); if (dev->last_word[side] == 0x4489) { - find->sync_marks++; - find->sync_pos = dev->track_pos; - return; + find->sync_marks++; + find->sync_pos = dev->track_pos; + return; } if ((wrong_am) && (dev->last_word[side] == wrong_am) && (find->sync_marks >= 3)) { - dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; - dev->error_condition = 0; - dev->state = STATE_IDLE; - fdc_finishread(d86f_fdc); - fdc_nodataam(d86f_fdc); - return; + dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; + dev->error_condition = 0; + dev->state = STATE_IDLE; + fdc_finishread(d86f_fdc); + fdc_nodataam(d86f_fdc); + return; } if ((dev->last_word[side] == req_am) && (find->sync_marks >= 3)) { - if (d86f_word_is_aligned(drive, side, find->sync_pos)) { - dev->calc_crc.word = 0xCDB4; - fdd_calccrc(decodefm(drive, dev->last_word[side]), &(dev->calc_crc)); - find->sync_marks = find->bits_obtained = find->bytes_obtained = 0; - find->sync_pos = 0xFFFFFFFF; - dev->preceding_bit[side] = dev->last_word[side] & 1; - dev->state++; - return; - } + if (d86f_word_is_aligned(drive, side, find->sync_pos)) { + dev->calc_crc.word = 0xCDB4; + fdd_calccrc(decodefm(drive, dev->last_word[side]), &(dev->calc_crc)); + find->sync_marks = find->bits_obtained = find->bytes_obtained = 0; + find->sync_pos = 0xFFFFFFFF; + dev->preceding_bit[side] = dev->last_word[side] & 1; + dev->state++; + return; + } } if ((ignore_other_am & 2) && (dev->last_word[side] == other_am) && (find->sync_marks >= 3)) { - if (d86f_word_is_aligned(drive, side, find->sync_pos)) { - dev->calc_crc.word = 0xCDB4; - fdd_calccrc(decodefm(drive, dev->last_word[side]), &(dev->calc_crc)); - find->sync_marks = find->bits_obtained = find->bytes_obtained = 0; - find->sync_pos = 0xFFFFFFFF; - if (ignore_other_am & 1) { - /* Skip mode, let's go back to finding ID. */ - dev->state -= 2; - } else { - /* Not skip mode, process the sector anyway. */ - fdc_set_wrong_am(d86f_fdc); - dev->preceding_bit[side] = dev->last_word[side] & 1; - dev->state++; - } - return; - } + if (d86f_word_is_aligned(drive, side, find->sync_pos)) { + dev->calc_crc.word = 0xCDB4; + fdd_calccrc(decodefm(drive, dev->last_word[side]), &(dev->calc_crc)); + find->sync_marks = find->bits_obtained = find->bytes_obtained = 0; + find->sync_pos = 0xFFFFFFFF; + if (ignore_other_am & 1) { + /* Skip mode, let's go back to finding ID. */ + dev->state -= 2; + } else { + /* Not skip mode, process the sector anyway. */ + fdc_set_wrong_am(d86f_fdc); + dev->preceding_bit[side] = dev->last_word[side] & 1; + dev->state++; + } + return; + } } if (dev->last_word[side] != 0x4489) { - if (d86f_word_is_aligned(drive, side, find->sync_pos)) { - find->sync_marks = find->bits_obtained = find->bytes_obtained = 0; - find->sync_pos = 0xFFFFFFFF; - } + if (d86f_word_is_aligned(drive, side, find->sync_pos)) { + find->sync_marks = find->bits_obtained = find->bytes_obtained = 0; + find->sync_pos = 0xFFFFFFFF; + } } } - /* When writing in MFM mode, we find the beginning of the address mark by looking for 3 0xA1 sync bytes. */ void d86f_write_find_address_mark_mfm(int drive, int side, find_t *find) @@ -1395,27 +1368,26 @@ d86f_write_find_address_mark_mfm(int drive, int side, find_t *find) d86f_get_bit(drive, side); if (dev->last_word[side] == 0x4489) { - find->sync_marks++; - find->sync_pos = dev->track_pos; - if (find->sync_marks == 3) { - dev->calc_crc.word = 0xCDB4; - dev->preceding_bit[side] = 1; - find->sync_marks = 0; - dev->state++; - return; - } + find->sync_marks++; + find->sync_pos = dev->track_pos; + if (find->sync_marks == 3) { + dev->calc_crc.word = 0xCDB4; + dev->preceding_bit[side] = 1; + find->sync_marks = 0; + dev->state++; + return; + } } /* If we hadn't found enough address mark sync marks, null the counter. */ if (dev->last_word[side] != 0x4489) { - if (d86f_word_is_aligned(drive, side, find->sync_pos)) { - find->sync_marks = find->bits_obtained = find->bytes_obtained = 0; - find->sync_pos = 0xFFFFFFFF; - } + if (d86f_word_is_aligned(drive, side, find->sync_pos)) { + find->sync_marks = find->bits_obtained = find->bytes_obtained = 0; + find->sync_pos = 0xFFFFFFFF; + } } } - /* State 2: Read sector ID and CRC*/ void d86f_read_sector_id(int drive, int side, int match) @@ -1423,69 +1395,69 @@ d86f_read_sector_id(int drive, int side, int match) d86f_t *dev = d86f[drive]; if (dev->id_find.bits_obtained) { - if (! (dev->id_find.bits_obtained & 15)) { - /* We've got a byte. */ - if (dev->id_find.bytes_obtained < 4) { - dev->last_sector.byte_array[dev->id_find.bytes_obtained] = decodefm(drive, dev->last_word[side]); - fdd_calccrc(dev->last_sector.byte_array[dev->id_find.bytes_obtained], &(dev->calc_crc)); - } else if ((dev->id_find.bytes_obtained >= 4) && (dev->id_find.bytes_obtained < 6)) { - dev->track_crc.bytes[(dev->id_find.bytes_obtained & 1) ^ 1] = decodefm(drive, dev->last_word[side]); - } - dev->id_find.bytes_obtained++; + if (!(dev->id_find.bits_obtained & 15)) { + /* We've got a byte. */ + if (dev->id_find.bytes_obtained < 4) { + dev->last_sector.byte_array[dev->id_find.bytes_obtained] = decodefm(drive, dev->last_word[side]); + fdd_calccrc(dev->last_sector.byte_array[dev->id_find.bytes_obtained], &(dev->calc_crc)); + } else if ((dev->id_find.bytes_obtained >= 4) && (dev->id_find.bytes_obtained < 6)) { + dev->track_crc.bytes[(dev->id_find.bytes_obtained & 1) ^ 1] = decodefm(drive, dev->last_word[side]); + } + dev->id_find.bytes_obtained++; - if (dev->id_find.bytes_obtained == 6) { - /* We've got the ID. */ - if ((dev->calc_crc.word != dev->track_crc.word) && (dev->last_sector.dword == dev->req_sector.dword)) { - dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = 0; - d86f_log("86F: ID CRC error: %04X != %04X (%08X)\n", dev->track_crc.word, dev->calc_crc.word, dev->last_sector.dword); - if ((dev->state != STATE_02_READ_ID) && (dev->state != STATE_0A_READ_ID)) { - dev->error_condition = 0; - dev->state = STATE_IDLE; - fdc_finishread(d86f_fdc); - fdc_headercrcerror(d86f_fdc); - } else if (dev->state == STATE_0A_READ_ID) - dev->state--; - else { - dev->error_condition |= 1; /* Mark that there was an ID CRC error. */ - dev->state++; - } - } else if ((dev->calc_crc.word == dev->track_crc.word) && (dev->state == STATE_0A_READ_ID)) { - /* CRC is valid and this is a read sector ID command. */ - dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = dev->error_condition = 0; - fdc_sectorid(d86f_fdc, dev->last_sector.id.c, dev->last_sector.id.h, dev->last_sector.id.r, dev->last_sector.id.n, 0, 0); - dev->state = STATE_IDLE; - } else { - /* CRC is valid. */ - dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = 0; - dev->id_found |= 1; - if ((dev->last_sector.dword == dev->req_sector.dword) || !match) { - d86f_handler[drive].set_sector(drive, side, dev->last_sector.id.c, dev->last_sector.id.h, dev->last_sector.id.r, dev->last_sector.id.n); - if (dev->state == STATE_02_READ_ID) { - /* READ TRACK command, we need some special handling here. */ - /* Code corrected: Only the C, H, and N portions of the sector ID are compared, the R portion (the sector number) is ignored. */ - if ((dev->last_sector.id.c != fdc_get_read_track_sector(d86f_fdc).id.c) || (dev->last_sector.id.h != fdc_get_read_track_sector(d86f_fdc).id.h) || (dev->last_sector.id.n != fdc_get_read_track_sector(d86f_fdc).id.n)) { - dev->error_condition |= 4; /* Mark that the sector ID is not the one expected by the FDC. */ - /* Make sure we use the sector size from the FDC. */ - dev->last_sector.id.n = fdc_get_read_track_sector(d86f_fdc).id.n; - } + if (dev->id_find.bytes_obtained == 6) { + /* We've got the ID. */ + if ((dev->calc_crc.word != dev->track_crc.word) && (dev->last_sector.dword == dev->req_sector.dword)) { + dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = 0; + d86f_log("86F: ID CRC error: %04X != %04X (%08X)\n", dev->track_crc.word, dev->calc_crc.word, dev->last_sector.dword); + if ((dev->state != STATE_02_READ_ID) && (dev->state != STATE_0A_READ_ID)) { + dev->error_condition = 0; + dev->state = STATE_IDLE; + fdc_finishread(d86f_fdc); + fdc_headercrcerror(d86f_fdc); + } else if (dev->state == STATE_0A_READ_ID) + dev->state--; + else { + dev->error_condition |= 1; /* Mark that there was an ID CRC error. */ + dev->state++; + } + } else if ((dev->calc_crc.word == dev->track_crc.word) && (dev->state == STATE_0A_READ_ID)) { + /* CRC is valid and this is a read sector ID command. */ + dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = dev->error_condition = 0; + fdc_sectorid(d86f_fdc, dev->last_sector.id.c, dev->last_sector.id.h, dev->last_sector.id.r, dev->last_sector.id.n, 0, 0); + dev->state = STATE_IDLE; + } else { + /* CRC is valid. */ + dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = 0; + dev->id_found |= 1; + if ((dev->last_sector.dword == dev->req_sector.dword) || !match) { + d86f_handler[drive].set_sector(drive, side, dev->last_sector.id.c, dev->last_sector.id.h, dev->last_sector.id.r, dev->last_sector.id.n); + if (dev->state == STATE_02_READ_ID) { + /* READ TRACK command, we need some special handling here. */ + /* Code corrected: Only the C, H, and N portions of the sector ID are compared, the R portion (the sector number) is ignored. */ + if ((dev->last_sector.id.c != fdc_get_read_track_sector(d86f_fdc).id.c) || (dev->last_sector.id.h != fdc_get_read_track_sector(d86f_fdc).id.h) || (dev->last_sector.id.n != fdc_get_read_track_sector(d86f_fdc).id.n)) { + dev->error_condition |= 4; /* Mark that the sector ID is not the one expected by the FDC. */ + /* Make sure we use the sector size from the FDC. */ + dev->last_sector.id.n = fdc_get_read_track_sector(d86f_fdc).id.n; + } - /* If the two ID's are identical, then we do not need to do anything regarding the sector size. */ - } - dev->state++; - } else { - if (dev->last_sector.id.c != dev->req_sector.id.c) { - if (dev->last_sector.id.c == 0xFF) { - dev->error_condition |= 8; - } else { - dev->error_condition |= 0x10; - } - } + /* If the two ID's are identical, then we do not need to do anything regarding the sector size. */ + } + dev->state++; + } else { + if (dev->last_sector.id.c != dev->req_sector.id.c) { + if (dev->last_sector.id.c == 0xFF) { + dev->error_condition |= 8; + } else { + dev->error_condition |= 0x10; + } + } - dev->state--; - } - } - } - } + dev->state--; + } + } + } + } } d86f_get_bit(drive, side); @@ -1493,135 +1465,131 @@ d86f_read_sector_id(int drive, int side, int match) dev->id_find.bits_obtained++; } - uint8_t d86f_get_data(int drive, int base) { d86f_t *dev = d86f[drive]; - int data, byte_count; + int data, byte_count; if (fdd_get_turbo(drive) && (dev->version == 0x0063)) - byte_count = dev->turbo_pos; + byte_count = dev->turbo_pos; else - byte_count = dev->data_find.bytes_obtained; + byte_count = dev->data_find.bytes_obtained; if (byte_count < (d86f_get_data_len(drive) + base)) { - data = fdc_getdata(d86f_fdc, byte_count == (d86f_get_data_len(drive) + base - 1)); - if ((data & DMA_OVER) || (data == -1)) { - dev->dma_over++; - if (data == -1) - data = 0; - else - data &= 0xff; - } + data = fdc_getdata(d86f_fdc, byte_count == (d86f_get_data_len(drive) + base - 1)); + if ((data & DMA_OVER) || (data == -1)) { + dev->dma_over++; + if (data == -1) + data = 0; + else + data &= 0xff; + } } else { - data = 0; + data = 0; } return data; } - void d86f_compare_byte(int drive, uint8_t received_byte, uint8_t disk_byte) { d86f_t *dev = d86f[drive]; - switch(fdc_get_compare_condition(d86f_fdc)) { - case 0: /* SCAN EQUAL */ - if ((received_byte == disk_byte) || (received_byte == 0xFF)) - dev->satisfying_bytes++; - break; + switch (fdc_get_compare_condition(d86f_fdc)) { + case 0: /* SCAN EQUAL */ + if ((received_byte == disk_byte) || (received_byte == 0xFF)) + dev->satisfying_bytes++; + break; - case 1: /* SCAN LOW OR EQUAL */ - if ((received_byte <= disk_byte) || (received_byte == 0xFF)) - dev->satisfying_bytes++; - break; + case 1: /* SCAN LOW OR EQUAL */ + if ((received_byte <= disk_byte) || (received_byte == 0xFF)) + dev->satisfying_bytes++; + break; - case 2: /* SCAN HIGH OR EQUAL */ - if ((received_byte >= disk_byte) || (received_byte == 0xFF)) - dev->satisfying_bytes++; - break; + case 2: /* SCAN HIGH OR EQUAL */ + if ((received_byte >= disk_byte) || (received_byte == 0xFF)) + dev->satisfying_bytes++; + break; } } - /* State 4: Read sector data and CRC*/ void d86f_read_sector_data(int drive, int side) { - d86f_t *dev = d86f[drive]; - int data = 0; - int recv_data = 0; - int read_status = 0; - uint32_t sector_len = dev->last_sector.id.n; - uint32_t crc_pos = 0; - sector_len = 1 << (7 + sector_len); - crc_pos = sector_len + 2; + d86f_t *dev = d86f[drive]; + int data = 0; + int recv_data = 0; + int read_status = 0; + uint32_t sector_len = dev->last_sector.id.n; + uint32_t crc_pos = 0; + sector_len = 1 << (7 + sector_len); + crc_pos = sector_len + 2; if (dev->data_find.bits_obtained) { - if (!(dev->data_find.bits_obtained & 15)) { - /* We've got a byte. */ - d86f_log("86F: We've got a byte.\n"); - if (dev->data_find.bytes_obtained < sector_len) { - if (d86f_handler[drive].read_data != NULL) - data = d86f_handler[drive].read_data(drive, side, dev->data_find.bytes_obtained); - else { + if (!(dev->data_find.bits_obtained & 15)) { + /* We've got a byte. */ + d86f_log("86F: We've got a byte.\n"); + if (dev->data_find.bytes_obtained < sector_len) { + if (d86f_handler[drive].read_data != NULL) + data = d86f_handler[drive].read_data(drive, side, dev->data_find.bytes_obtained); + else { #ifdef HACK_FOR_DBASE_III - if ((dev->last_sector.id.c == 39) && (dev->last_sector.id.h == 0) && - (dev->last_sector.id.r == 5) && (dev->data_find.bytes_obtained >= 272)) - data = (random_generate() & 0xff); - else + if ((dev->last_sector.id.c == 39) && (dev->last_sector.id.h == 0) && (dev->last_sector.id.r == 5) && (dev->data_find.bytes_obtained >= 272)) + data = (random_generate() & 0xff); + else #endif - data = decodefm(drive, dev->last_word[side]); - } - if (dev->state == STATE_11_SCAN_DATA) { - /* Scan/compare command. */ - recv_data = d86f_get_data(drive, 0); - d86f_compare_byte(drive, recv_data, data); - } else { - if (dev->data_find.bytes_obtained < d86f_get_data_len(drive)) { - if (dev->state != STATE_16_VERIFY_DATA) { - read_status = fdc_data(d86f_fdc, data, dev->data_find.bytes_obtained == (d86f_get_data_len(drive) - 1)); - if (read_status == -1) - dev->dma_over++; - } - } - } - fdd_calccrc(data, &(dev->calc_crc)); - } else if (dev->data_find.bytes_obtained < crc_pos) - dev->track_crc.bytes[(dev->data_find.bytes_obtained - sector_len) ^ 1] = decodefm(drive, dev->last_word[side]); - dev->data_find.bytes_obtained++; + data = decodefm(drive, dev->last_word[side]); + } + if (dev->state == STATE_11_SCAN_DATA) { + /* Scan/compare command. */ + recv_data = d86f_get_data(drive, 0); + d86f_compare_byte(drive, recv_data, data); + } else { + if (dev->data_find.bytes_obtained < d86f_get_data_len(drive)) { + if (dev->state != STATE_16_VERIFY_DATA) { + read_status = fdc_data(d86f_fdc, data, dev->data_find.bytes_obtained == (d86f_get_data_len(drive) - 1)); + if (read_status == -1) + dev->dma_over++; + } + } + } + fdd_calccrc(data, &(dev->calc_crc)); + } else if (dev->data_find.bytes_obtained < crc_pos) + dev->track_crc.bytes[(dev->data_find.bytes_obtained - sector_len) ^ 1] = decodefm(drive, dev->last_word[side]); + dev->data_find.bytes_obtained++; - if (dev->data_find.bytes_obtained == (crc_pos + fdc_get_gap(d86f_fdc))) { - /* We've got the data. */ - if ((dev->calc_crc.word != dev->track_crc.word) && (dev->state != STATE_02_READ_DATA)) { - d86f_log("86F: Data CRC error: %04X != %04X (%08X)\n", dev->track_crc.word, dev->calc_crc.word, dev->last_sector.dword); - dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; - dev->error_condition = 0; - dev->state = STATE_IDLE; - fdc_finishread(d86f_fdc); - fdc_datacrcerror(d86f_fdc); - } else if ((dev->calc_crc.word != dev->track_crc.word) && (dev->state == STATE_02_READ_DATA)) { - dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; - dev->error_condition |= 2; /* Mark that there was a data error. */ - dev->state = STATE_IDLE; - fdc_track_finishread(d86f_fdc, dev->error_condition); - } else { - /* CRC is valid. */ - d86f_log("86F: Data CRC OK: %04X == %04X (%08X)\n", dev->track_crc.word, dev->calc_crc.word, dev->last_sector.dword); - dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; - dev->error_condition = 0; - dev->state = STATE_IDLE; - if (dev->state == STATE_02_READ_DATA) - fdc_track_finishread(d86f_fdc, dev->error_condition); - else if (dev->state == STATE_11_SCAN_DATA) - fdc_sector_finishcompare(d86f_fdc, (dev->satisfying_bytes == ((128 << ((uint32_t) dev->last_sector.id.n)) - 1)) ? 1 : 0); - else - fdc_sector_finishread(d86f_fdc); - } - } - } + if (dev->data_find.bytes_obtained == (crc_pos + fdc_get_gap(d86f_fdc))) { + /* We've got the data. */ + if ((dev->calc_crc.word != dev->track_crc.word) && (dev->state != STATE_02_READ_DATA)) { + d86f_log("86F: Data CRC error: %04X != %04X (%08X)\n", dev->track_crc.word, dev->calc_crc.word, dev->last_sector.dword); + dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; + dev->error_condition = 0; + dev->state = STATE_IDLE; + fdc_finishread(d86f_fdc); + fdc_datacrcerror(d86f_fdc); + } else if ((dev->calc_crc.word != dev->track_crc.word) && (dev->state == STATE_02_READ_DATA)) { + dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; + dev->error_condition |= 2; /* Mark that there was a data error. */ + dev->state = STATE_IDLE; + fdc_track_finishread(d86f_fdc, dev->error_condition); + } else { + /* CRC is valid. */ + d86f_log("86F: Data CRC OK: %04X == %04X (%08X)\n", dev->track_crc.word, dev->calc_crc.word, dev->last_sector.dword); + dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; + dev->error_condition = 0; + dev->state = STATE_IDLE; + if (dev->state == STATE_02_READ_DATA) + fdc_track_finishread(d86f_fdc, dev->error_condition); + else if (dev->state == STATE_11_SCAN_DATA) + fdc_sector_finishcompare(d86f_fdc, (dev->satisfying_bytes == ((128 << ((uint32_t) dev->last_sector.id.n)) - 1)) ? 1 : 0); + else + fdc_sector_finishread(d86f_fdc); + } + } + } } d86f_get_bit(drive, side); @@ -1629,106 +1597,105 @@ d86f_read_sector_data(int drive, int side) dev->data_find.bits_obtained++; } - void d86f_write_sector_data(int drive, int side, int mfm, uint16_t am) { - d86f_t *dev = d86f[drive]; + d86f_t *dev = d86f[drive]; uint16_t bit_pos; uint16_t temp; uint32_t sector_len = dev->last_sector.id.n; - uint32_t crc_pos = 0; - sector_len = (1 << (7 + sector_len)) + 1; - crc_pos = sector_len + 2; + uint32_t crc_pos = 0; + sector_len = (1 << (7 + sector_len)) + 1; + crc_pos = sector_len + 2; - if (! (dev->data_find.bits_obtained & 15)) { - if (dev->data_find.bytes_obtained < crc_pos) { - if (! dev->data_find.bytes_obtained) { - /* We're writing the address mark. */ - dev->current_byte[side] = am; - } else if (dev->data_find.bytes_obtained < sector_len) { - /* We're in the data field of the sector, read byte from FDC and request new byte. */ - dev->current_byte[side] = d86f_get_data(drive, 1); - if (! fdc_get_diswr(d86f_fdc)) - d86f_handler[drive].write_data(drive, side, dev->data_find.bytes_obtained - 1, dev->current_byte[side]); - } else { - /* We're in the data field of the sector, use a CRC byte. */ - dev->current_byte[side] = dev->calc_crc.bytes[(dev->data_find.bytes_obtained & 1)]; - } + if (!(dev->data_find.bits_obtained & 15)) { + if (dev->data_find.bytes_obtained < crc_pos) { + if (!dev->data_find.bytes_obtained) { + /* We're writing the address mark. */ + dev->current_byte[side] = am; + } else if (dev->data_find.bytes_obtained < sector_len) { + /* We're in the data field of the sector, read byte from FDC and request new byte. */ + dev->current_byte[side] = d86f_get_data(drive, 1); + if (!fdc_get_diswr(d86f_fdc)) + d86f_handler[drive].write_data(drive, side, dev->data_find.bytes_obtained - 1, dev->current_byte[side]); + } else { + /* We're in the data field of the sector, use a CRC byte. */ + dev->current_byte[side] = dev->calc_crc.bytes[(dev->data_find.bytes_obtained & 1)]; + } - dev->current_bit[side] = (15 - (dev->data_find.bits_obtained & 15)) >> 1; + dev->current_bit[side] = (15 - (dev->data_find.bits_obtained & 15)) >> 1; - /* Write the bit. */ - temp = (dev->current_byte[side] >> dev->current_bit[side]) & 1; - if ((!temp && !dev->preceding_bit[side]) || !mfm) { - temp |= 2; - } + /* Write the bit. */ + temp = (dev->current_byte[side] >> dev->current_bit[side]) & 1; + if ((!temp && !dev->preceding_bit[side]) || !mfm) { + temp |= 2; + } - /* This is an even bit, so write the clock. */ - if (! dev->data_find.bytes_obtained) { - /* Address mark, write bit directly. */ - d86f_put_bit(drive, side, am >> 15); - } else { - d86f_put_bit(drive, side, temp >> 1); - } + /* This is an even bit, so write the clock. */ + if (!dev->data_find.bytes_obtained) { + /* Address mark, write bit directly. */ + d86f_put_bit(drive, side, am >> 15); + } else { + d86f_put_bit(drive, side, temp >> 1); + } - if (dev->data_find.bytes_obtained < sector_len) { - /* This is a data byte, so CRC it. */ - if (! dev->data_find.bytes_obtained) { - fdd_calccrc(decodefm(drive, am), &(dev->calc_crc)); - } else { - fdd_calccrc(dev->current_byte[side], &(dev->calc_crc)); - } - } - } + if (dev->data_find.bytes_obtained < sector_len) { + /* This is a data byte, so CRC it. */ + if (!dev->data_find.bytes_obtained) { + fdd_calccrc(decodefm(drive, am), &(dev->calc_crc)); + } else { + fdd_calccrc(dev->current_byte[side], &(dev->calc_crc)); + } + } + } } else { - if (dev->data_find.bytes_obtained < crc_pos) { - /* Encode the bit. */ - bit_pos = 15 - (dev->data_find.bits_obtained & 15); - dev->current_bit[side] = bit_pos >> 1; + if (dev->data_find.bytes_obtained < crc_pos) { + /* Encode the bit. */ + bit_pos = 15 - (dev->data_find.bits_obtained & 15); + dev->current_bit[side] = bit_pos >> 1; - temp = (dev->current_byte[side] >> dev->current_bit[side]) & 1; - if ((!temp && !dev->preceding_bit[side]) || !mfm) { - temp |= 2; - } + temp = (dev->current_byte[side] >> dev->current_bit[side]) & 1; + if ((!temp && !dev->preceding_bit[side]) || !mfm) { + temp |= 2; + } - if (! dev->data_find.bytes_obtained) { - /* Address mark, write directly. */ - d86f_put_bit(drive, side, am >> bit_pos); - if (! (bit_pos & 1)) { - dev->preceding_bit[side] = am >> bit_pos; - } - } else { - if (bit_pos & 1) { - /* Clock bit */ - d86f_put_bit(drive, side, temp >> 1); - } else { - /* Data bit */ - d86f_put_bit(drive, side, temp & 1); - dev->preceding_bit[side] = temp & 1; - } - } - } + if (!dev->data_find.bytes_obtained) { + /* Address mark, write directly. */ + d86f_put_bit(drive, side, am >> bit_pos); + if (!(bit_pos & 1)) { + dev->preceding_bit[side] = am >> bit_pos; + } + } else { + if (bit_pos & 1) { + /* Clock bit */ + d86f_put_bit(drive, side, temp >> 1); + } else { + /* Data bit */ + d86f_put_bit(drive, side, temp & 1); + dev->preceding_bit[side] = temp & 1; + } + } + } - if ((dev->data_find.bits_obtained & 15) == 15) { - dev->data_find.bytes_obtained++; + if ((dev->data_find.bits_obtained & 15) == 15) { + dev->data_find.bytes_obtained++; - if (dev->data_find.bytes_obtained == (crc_pos + fdc_get_gap(d86f_fdc))) { - /* We've written the data. */ - dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; - dev->error_condition = 0; - dev->state = STATE_IDLE; - fdc_sector_finishread(d86f_fdc); - return; - } - } + if (dev->data_find.bytes_obtained == (crc_pos + fdc_get_gap(d86f_fdc))) { + /* We've written the data. */ + dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; + dev->error_condition = 0; + dev->state = STATE_IDLE; + fdc_sector_finishread(d86f_fdc); + return; + } + } } dev->data_find.bits_obtained++; } - -void d86f_advance_bit(int drive, int side) +void +d86f_advance_bit(int drive, int side) { d86f_t *dev = d86f[drive]; @@ -1736,14 +1703,13 @@ void d86f_advance_bit(int drive, int side) dev->track_pos %= d86f_handler[drive].get_raw_size(drive, side); if (dev->track_pos == d86f_handler[drive].index_hole_pos(drive, side)) { - d86f_handler[drive].read_revolution(drive); + d86f_handler[drive].read_revolution(drive); - if (dev->state != STATE_IDLE) - dev->index_count++; + if (dev->state != STATE_IDLE) + dev->index_count++; } } - void d86f_advance_word(int drive, int side) { @@ -1753,10 +1719,9 @@ d86f_advance_word(int drive, int side) dev->track_pos %= d86f_handler[drive].get_raw_size(drive, side); if ((dev->track_pos == d86f_handler[drive].index_hole_pos(drive, side)) && (dev->state != STATE_IDLE)) - dev->index_count++; + dev->index_count++; } - void d86f_spin_to_index(int drive, int side) { @@ -1768,68 +1733,67 @@ d86f_spin_to_index(int drive, int side) d86f_advance_bit(drive, side); if (dev->track_pos == d86f_handler[drive].index_hole_pos(drive, side)) { - if (dev->state == STATE_0D_SPIN_TO_INDEX) { - /* When starting format, reset format state to the beginning. */ - dev->preceding_bit[side] = 1; - dev->format_state = FMT_PRETRK_GAP0; - } + if (dev->state == STATE_0D_SPIN_TO_INDEX) { + /* When starting format, reset format state to the beginning. */ + dev->preceding_bit[side] = 1; + dev->format_state = FMT_PRETRK_GAP0; + } - /* This is to make sure both READ TRACK and FORMAT TRACK command don't end prematurely. */ - dev->index_count = 0; - dev->state++; + /* This is to make sure both READ TRACK and FORMAT TRACK command don't end prematurely. */ + dev->index_count = 0; + dev->state++; } } - void d86f_write_direct_common(int drive, int side, uint16_t byte, uint8_t type, uint32_t pos) { - d86f_t *dev = d86f[drive]; - uint16_t encoded_byte = 0, mask_data, mask_surface, mask_hole, mask_fuzzy; + d86f_t *dev = d86f[drive]; + uint16_t encoded_byte = 0, mask_data, mask_surface, mask_hole, mask_fuzzy; decoded_t dbyte, dpbyte; - if (fdc_get_diswr(d86f_fdc)) return; + if (fdc_get_diswr(d86f_fdc)) + return; - dbyte.byte = byte & 0xff; + dbyte.byte = byte & 0xff; dpbyte.byte = dev->preceding_bit[side] & 0xff; if (type == 0) { - /* Byte write. */ - encoded_byte = d86f_encode_byte(drive, 0, dbyte, dpbyte); - if (! d86f_reverse_bytes(drive)) { - mask_data = encoded_byte >> 8; - encoded_byte &= 0xFF; - encoded_byte <<= 8; - encoded_byte |= mask_data; - } + /* Byte write. */ + encoded_byte = d86f_encode_byte(drive, 0, dbyte, dpbyte); + if (!d86f_reverse_bytes(drive)) { + mask_data = encoded_byte >> 8; + encoded_byte &= 0xFF; + encoded_byte <<= 8; + encoded_byte |= mask_data; + } } else { - /* Word write. */ - encoded_byte = byte; - if (d86f_reverse_bytes(drive)) { - mask_data = encoded_byte >> 8; - encoded_byte &= 0xFF; - encoded_byte <<= 8; - encoded_byte |= mask_data; - } + /* Word write. */ + encoded_byte = byte; + if (d86f_reverse_bytes(drive)) { + mask_data = encoded_byte >> 8; + encoded_byte &= 0xFF; + encoded_byte <<= 8; + encoded_byte |= mask_data; + } } dev->preceding_bit[side] = encoded_byte & 1; if (d86f_has_surface_desc(drive)) { - mask_data = dev->track_encoded_data[side][pos] ^= 0xFFFF; - mask_surface = dev->track_surface_data[side][pos]; - mask_hole = (mask_surface & mask_data) ^ 0xFFFF; /* This will retain bits that are both fuzzy and 0, therefore physical holes. */ - encoded_byte &= mask_hole; /* Filter out physical hole bits from the encoded data. */ - mask_data ^= 0xFFFF; /* Invert back so bits 1 are 1 again. */ - mask_fuzzy = (mask_surface & mask_data) ^ 0xFFFF; /* All fuzzy bits are 0. */ - dev->track_surface_data[side][pos] &= mask_fuzzy; /* Remove fuzzy bits (but not hole bits) from the surface mask, making them regular again. */ + mask_data = dev->track_encoded_data[side][pos] ^= 0xFFFF; + mask_surface = dev->track_surface_data[side][pos]; + mask_hole = (mask_surface & mask_data) ^ 0xFFFF; /* This will retain bits that are both fuzzy and 0, therefore physical holes. */ + encoded_byte &= mask_hole; /* Filter out physical hole bits from the encoded data. */ + mask_data ^= 0xFFFF; /* Invert back so bits 1 are 1 again. */ + mask_fuzzy = (mask_surface & mask_data) ^ 0xFFFF; /* All fuzzy bits are 0. */ + dev->track_surface_data[side][pos] &= mask_fuzzy; /* Remove fuzzy bits (but not hole bits) from the surface mask, making them regular again. */ } dev->track_encoded_data[side][pos] = encoded_byte; - dev->last_word[side] = encoded_byte; + dev->last_word[side] = encoded_byte; } - void d86f_write_direct(int drive, int side, uint16_t byte, uint8_t type) { @@ -1838,7 +1802,6 @@ d86f_write_direct(int drive, int side, uint16_t byte, uint8_t type) d86f_write_direct_common(drive, side, byte, type, dev->track_pos >> 4); } - uint16_t endian_swap(uint16_t word) { @@ -1851,29 +1814,27 @@ endian_swap(uint16_t word) return temp; } - void d86f_format_finish(int drive, int side, int mfm, uint16_t sc, uint16_t gap_fill, int do_write) { d86f_t *dev = d86f[drive]; if (mfm && do_write) { - if (do_write && (dev->track_pos == d86f_handler[drive].index_hole_pos(drive, side))) { - d86f_write_direct_common(drive, side, gap_fill, 0, 0); - } + if (do_write && (dev->track_pos == d86f_handler[drive].index_hole_pos(drive, side))) { + d86f_write_direct_common(drive, side, gap_fill, 0, 0); + } } dev->state = STATE_IDLE; if (do_write) - d86f_handler[drive].writeback(drive); + d86f_handler[drive].writeback(drive); dev->error_condition = 0; - dev->datac = 0; + dev->datac = 0; fdc_sector_finishread(d86f_fdc); } - void d86f_format_turbo_finish(int drive, int side, int do_write) { @@ -1882,165 +1843,164 @@ d86f_format_turbo_finish(int drive, int side, int do_write) dev->state = STATE_IDLE; if (do_write) - d86f_handler[drive].writeback(drive); + d86f_handler[drive].writeback(drive); dev->error_condition = 0; - dev->datac = 0; + dev->datac = 0; fdc_sector_finishread(d86f_fdc); } - void d86f_format_track(int drive, int side, int do_write) { - d86f_t *dev = d86f[drive]; - int data; + d86f_t *dev = d86f[drive]; + int data; uint16_t max_len; - int mfm; - uint16_t sc = 0; - uint16_t dtl = 0; - int gap_sizes[4] = { 0, 0, 0, 0 }; - int am_len = 0; - int sync_len = 0; - uint16_t iam_mfm[4] = { 0x2452, 0x2452, 0x2452, 0x5255 }; - uint16_t idam_mfm[4] = { 0x8944, 0x8944, 0x8944, 0x5455 }; + int mfm; + uint16_t sc = 0; + uint16_t dtl = 0; + int gap_sizes[4] = { 0, 0, 0, 0 }; + int am_len = 0; + int sync_len = 0; + uint16_t iam_mfm[4] = { 0x2452, 0x2452, 0x2452, 0x5255 }; + uint16_t idam_mfm[4] = { 0x8944, 0x8944, 0x8944, 0x5455 }; uint16_t dataam_mfm[4] = { 0x8944, 0x8944, 0x8944, 0x4555 }; - uint16_t iam_fm = 0xFAF7; - uint16_t idam_fm = 0x7EF5; - uint16_t dataam_fm = 0x6FF5; - uint16_t gap_fill = 0x4E; + uint16_t iam_fm = 0xFAF7; + uint16_t idam_fm = 0x7EF5; + uint16_t dataam_fm = 0x6FF5; + uint16_t gap_fill = 0x4E; - mfm = d86f_is_mfm(drive); - am_len = mfm ? 4 : 1; + mfm = d86f_is_mfm(drive); + am_len = mfm ? 4 : 1; gap_sizes[0] = mfm ? 80 : 40; gap_sizes[1] = mfm ? 50 : 26; gap_sizes[2] = fdc_get_gap2(d86f_fdc, real_drive(d86f_fdc, drive)); gap_sizes[3] = fdc_get_gap(d86f_fdc); - sync_len = mfm ? 12 : 6; - sc = fdc_get_format_sectors(d86f_fdc); - dtl = 128 << fdc_get_format_n(d86f_fdc); - gap_fill = mfm ? 0x4E : 0xFF; + sync_len = mfm ? 12 : 6; + sc = fdc_get_format_sectors(d86f_fdc); + dtl = 128 << fdc_get_format_n(d86f_fdc); + gap_fill = mfm ? 0x4E : 0xFF; - switch(dev->format_state) { - case FMT_POSTTRK_GAP4: - max_len = 60000; - if (do_write) - d86f_write_direct(drive, side, gap_fill, 0); - break; + switch (dev->format_state) { + case FMT_POSTTRK_GAP4: + max_len = 60000; + if (do_write) + d86f_write_direct(drive, side, gap_fill, 0); + break; - case FMT_PRETRK_GAP0: - max_len = gap_sizes[0]; - if (do_write) - d86f_write_direct(drive, side, gap_fill, 0); - break; + case FMT_PRETRK_GAP0: + max_len = gap_sizes[0]; + if (do_write) + d86f_write_direct(drive, side, gap_fill, 0); + break; - case FMT_SECTOR_ID_SYNC: - max_len = sync_len; - if (dev->datac <= 3) { - data = fdc_getdata(d86f_fdc, 0); - if (data != -1) - data &= 0xff; - if ((data == -1) && (dev->datac < 3)) - data = 0; - d86f_fdc->format_sector_id.byte_array[dev->datac] = data & 0xff; - if (dev->datac == 3) - fdc_stop_id_request(d86f_fdc); - } - /*FALLTHROUGH*/ + case FMT_SECTOR_ID_SYNC: + max_len = sync_len; + if (dev->datac <= 3) { + data = fdc_getdata(d86f_fdc, 0); + if (data != -1) + data &= 0xff; + if ((data == -1) && (dev->datac < 3)) + data = 0; + d86f_fdc->format_sector_id.byte_array[dev->datac] = data & 0xff; + if (dev->datac == 3) + fdc_stop_id_request(d86f_fdc); + } + /*FALLTHROUGH*/ - case FMT_PRETRK_SYNC: - case FMT_SECTOR_DATA_SYNC: - max_len = sync_len; - if (do_write) - d86f_write_direct(drive, side, 0x00, 0); - break; + case FMT_PRETRK_SYNC: + case FMT_SECTOR_DATA_SYNC: + max_len = sync_len; + if (do_write) + d86f_write_direct(drive, side, 0x00, 0); + break; - case FMT_PRETRK_IAM: - max_len = am_len; - if (do_write) { - if (mfm) - d86f_write_direct(drive, side, iam_mfm[dev->datac], 1); - else - d86f_write_direct(drive, side, iam_fm, 1); - } - break; + case FMT_PRETRK_IAM: + max_len = am_len; + if (do_write) { + if (mfm) + d86f_write_direct(drive, side, iam_mfm[dev->datac], 1); + else + d86f_write_direct(drive, side, iam_fm, 1); + } + break; - case FMT_PRETRK_GAP1: - max_len = gap_sizes[1]; - if (do_write) - d86f_write_direct(drive, side, gap_fill, 0); - break; + case FMT_PRETRK_GAP1: + max_len = gap_sizes[1]; + if (do_write) + d86f_write_direct(drive, side, gap_fill, 0); + break; - case FMT_SECTOR_IDAM: - max_len = am_len; - if (mfm) { - if (do_write) - d86f_write_direct(drive, side, idam_mfm[dev->datac], 1); - d86f_calccrc(dev, (dev->datac < 3) ? 0xA1 : 0xFE); - } else { - if (do_write) - d86f_write_direct(drive, side, idam_fm, 1); - d86f_calccrc(dev, 0xFE); - } - break; + case FMT_SECTOR_IDAM: + max_len = am_len; + if (mfm) { + if (do_write) + d86f_write_direct(drive, side, idam_mfm[dev->datac], 1); + d86f_calccrc(dev, (dev->datac < 3) ? 0xA1 : 0xFE); + } else { + if (do_write) + d86f_write_direct(drive, side, idam_fm, 1); + d86f_calccrc(dev, 0xFE); + } + break; - case FMT_SECTOR_ID: - max_len = 4; - if (do_write) { - d86f_write_direct(drive, side, d86f_fdc->format_sector_id.byte_array[dev->datac], 0); - d86f_calccrc(dev, d86f_fdc->format_sector_id.byte_array[dev->datac]); - } else { - if (dev->datac == 3) { - d86f_handler[drive].set_sector(drive, side, d86f_fdc->format_sector_id.id.c, d86f_fdc->format_sector_id.id.h, d86f_fdc->format_sector_id.id.r, d86f_fdc->format_sector_id.id.n); - } - } - break; + case FMT_SECTOR_ID: + max_len = 4; + if (do_write) { + d86f_write_direct(drive, side, d86f_fdc->format_sector_id.byte_array[dev->datac], 0); + d86f_calccrc(dev, d86f_fdc->format_sector_id.byte_array[dev->datac]); + } else { + if (dev->datac == 3) { + d86f_handler[drive].set_sector(drive, side, d86f_fdc->format_sector_id.id.c, d86f_fdc->format_sector_id.id.h, d86f_fdc->format_sector_id.id.r, d86f_fdc->format_sector_id.id.n); + } + } + break; - case FMT_SECTOR_ID_CRC: - case FMT_SECTOR_DATA_CRC: - max_len = 2; - if (do_write) - d86f_write_direct(drive, side, dev->calc_crc.bytes[dev->datac ^ 1], 0); - break; + case FMT_SECTOR_ID_CRC: + case FMT_SECTOR_DATA_CRC: + max_len = 2; + if (do_write) + d86f_write_direct(drive, side, dev->calc_crc.bytes[dev->datac ^ 1], 0); + break; - case FMT_SECTOR_GAP2: - max_len = gap_sizes[2]; - if (do_write) - d86f_write_direct(drive, side, gap_fill, 0); - break; + case FMT_SECTOR_GAP2: + max_len = gap_sizes[2]; + if (do_write) + d86f_write_direct(drive, side, gap_fill, 0); + break; - case FMT_SECTOR_DATAAM: - max_len = am_len; - if (mfm) { - if (do_write) - d86f_write_direct(drive, side, dataam_mfm[dev->datac], 1); - d86f_calccrc(dev, (dev->datac < 3) ? 0xA1 : 0xFB); - } else { - if (do_write) - d86f_write_direct(drive, side, dataam_fm, 1); - d86f_calccrc(dev, 0xFB); - } - break; + case FMT_SECTOR_DATAAM: + max_len = am_len; + if (mfm) { + if (do_write) + d86f_write_direct(drive, side, dataam_mfm[dev->datac], 1); + d86f_calccrc(dev, (dev->datac < 3) ? 0xA1 : 0xFB); + } else { + if (do_write) + d86f_write_direct(drive, side, dataam_fm, 1); + d86f_calccrc(dev, 0xFB); + } + break; - case FMT_SECTOR_DATA: - max_len = dtl; - if (do_write) { - d86f_write_direct(drive, side, dev->fill, 0); - d86f_handler[drive].write_data(drive, side, dev->datac, dev->fill); - } - d86f_calccrc(dev, dev->fill); - break; + case FMT_SECTOR_DATA: + max_len = dtl; + if (do_write) { + d86f_write_direct(drive, side, dev->fill, 0); + d86f_handler[drive].write_data(drive, side, dev->datac, dev->fill); + } + d86f_calccrc(dev, dev->fill); + break; - case FMT_SECTOR_GAP3: - max_len = gap_sizes[3]; - if (do_write) - d86f_write_direct(drive, side, gap_fill, 0); - break; + case FMT_SECTOR_GAP3: + max_len = gap_sizes[3]; + if (do_write) + d86f_write_direct(drive, side, gap_fill, 0); + break; - default: - max_len = 0; - break; + default: + max_len = 0; + break; } dev->datac++; @@ -2048,46 +2008,45 @@ d86f_format_track(int drive, int side, int do_write) d86f_advance_word(drive, side); if ((dev->index_count) && ((dev->format_state < FMT_SECTOR_ID_SYNC) || (dev->format_state > FMT_SECTOR_GAP3))) { - d86f_format_finish(drive, side, mfm, sc, gap_fill, do_write); - return; + d86f_format_finish(drive, side, mfm, sc, gap_fill, do_write); + return; } if (dev->datac >= max_len) { - dev->datac = 0; - dev->format_state++; + dev->datac = 0; + dev->format_state++; - switch (dev->format_state) { - case FMT_SECTOR_ID_SYNC: - fdc_request_next_sector_id(d86f_fdc); - break; + switch (dev->format_state) { + case FMT_SECTOR_ID_SYNC: + fdc_request_next_sector_id(d86f_fdc); + break; - case FMT_SECTOR_IDAM: - case FMT_SECTOR_DATAAM: - dev->calc_crc.word = 0xffff; - break; + case FMT_SECTOR_IDAM: + case FMT_SECTOR_DATAAM: + dev->calc_crc.word = 0xffff; + break; - case FMT_POSTTRK_CHECK: - if (dev->index_count) { - d86f_format_finish(drive, side, mfm, sc, gap_fill, do_write); - return; - } - dev->sector_count++; - if (dev->sector_count < sc) { - /* Sector within allotted amount, change state to SECTOR_ID_SYNC. */ - dev->format_state = FMT_SECTOR_ID_SYNC; - fdc_request_next_sector_id(d86f_fdc); - break; - } else { - dev->format_state = FMT_POSTTRK_GAP4; - dev->sector_count = 0; - break; - } - break; - } + case FMT_POSTTRK_CHECK: + if (dev->index_count) { + d86f_format_finish(drive, side, mfm, sc, gap_fill, do_write); + return; + } + dev->sector_count++; + if (dev->sector_count < sc) { + /* Sector within allotted amount, change state to SECTOR_ID_SYNC. */ + dev->format_state = FMT_SECTOR_ID_SYNC; + fdc_request_next_sector_id(d86f_fdc); + break; + } else { + dev->format_state = FMT_POSTTRK_GAP4; + dev->sector_count = 0; + break; + } + break; + } } } - void d86f_initialize_last_sector_id(int drive, int c, int h, int r, int n) { @@ -2099,92 +2058,89 @@ d86f_initialize_last_sector_id(int drive, int c, int h, int r, int n) dev->last_sector.id.n = n; } - static uint8_t d86f_sector_flags(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n) { - d86f_t *dev = d86f[drive]; + d86f_t *dev = d86f[drive]; sector_t *s, *t; if (dev->last_side_sector[side]) { - s = dev->last_side_sector[side]; - while (s) { - if ((s->c == c) && (s->h == h) && (s->r == r) && (s->n == n)) - return s->flags; - if (! s->prev) - break; - t = s->prev; - s = t; - } + s = dev->last_side_sector[side]; + while (s) { + if ((s->c == c) && (s->h == h) && (s->r == r) && (s->n == n)) + return s->flags; + if (!s->prev) + break; + t = s->prev; + s = t; + } } return 0x00; } - void d86f_turbo_read(int drive, int side) { - d86f_t *dev = d86f[drive]; - uint8_t dat = 0; - int recv_data = 0; - int read_status = 0; - uint8_t flags = d86f_sector_flags(drive, side, dev->req_sector.id.c, dev->req_sector.id.h, dev->req_sector.id.r, dev->req_sector.id.n); + d86f_t *dev = d86f[drive]; + uint8_t dat = 0; + int recv_data = 0; + int read_status = 0; + uint8_t flags = d86f_sector_flags(drive, side, dev->req_sector.id.c, dev->req_sector.id.h, dev->req_sector.id.r, dev->req_sector.id.n); if (d86f_handler[drive].read_data != NULL) - dat = d86f_handler[drive].read_data(drive, side, dev->turbo_pos); + dat = d86f_handler[drive].read_data(drive, side, dev->turbo_pos); else - dat = (random_generate() & 0xff); + dat = (random_generate() & 0xff); if (dev->state == STATE_11_SCAN_DATA) { - /* Scan/compare command. */ - recv_data = d86f_get_data(drive, 0); - d86f_compare_byte(drive, recv_data, dat); + /* Scan/compare command. */ + recv_data = d86f_get_data(drive, 0); + d86f_compare_byte(drive, recv_data, dat); } else { - if (dev->turbo_pos < (128UL << dev->req_sector.id.n)) { - if (dev->state != STATE_16_VERIFY_DATA) { - read_status = fdc_data(d86f_fdc, dat, dev->turbo_pos == ((128UL << dev->req_sector.id.n) - 1)); - if (read_status == -1) - dev->dma_over++; - } - } + if (dev->turbo_pos < (128UL << dev->req_sector.id.n)) { + if (dev->state != STATE_16_VERIFY_DATA) { + read_status = fdc_data(d86f_fdc, dat, dev->turbo_pos == ((128UL << dev->req_sector.id.n) - 1)); + if (read_status == -1) + dev->dma_over++; + } + } } dev->turbo_pos++; if (dev->turbo_pos >= (128UL << dev->req_sector.id.n)) { - dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; - if ((flags & SECTOR_CRC_ERROR) && (dev->state != STATE_02_READ_DATA)) { + dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; + if ((flags & SECTOR_CRC_ERROR) && (dev->state != STATE_02_READ_DATA)) { #ifdef ENABLE_D86F_LOG - d86f_log("86F: Data CRC error in turbo mode (%02X)\n", dev->state); + d86f_log("86F: Data CRC error in turbo mode (%02X)\n", dev->state); #endif - dev->error_condition = 0; - dev->state = STATE_IDLE; - fdc_finishread(d86f_fdc); - fdc_datacrcerror(d86f_fdc); - } else if ((flags & SECTOR_CRC_ERROR) && (dev->state == STATE_02_READ_DATA)) { + dev->error_condition = 0; + dev->state = STATE_IDLE; + fdc_finishread(d86f_fdc); + fdc_datacrcerror(d86f_fdc); + } else if ((flags & SECTOR_CRC_ERROR) && (dev->state == STATE_02_READ_DATA)) { #ifdef ENABLE_D86F_LOG - d86f_log("86F: Data CRC error in turbo mode at READ TRACK command\n"); + d86f_log("86F: Data CRC error in turbo mode at READ TRACK command\n"); #endif - dev->error_condition |= 2; /* Mark that there was a data error. */ - dev->state = STATE_IDLE; - fdc_track_finishread(d86f_fdc, dev->error_condition); - } else { - /* CRC is valid. */ + dev->error_condition |= 2; /* Mark that there was a data error. */ + dev->state = STATE_IDLE; + fdc_track_finishread(d86f_fdc, dev->error_condition); + } else { + /* CRC is valid. */ #ifdef ENABLE_D86F_LOG - d86f_log("86F: Data CRC OK in turbo mode\n"); + d86f_log("86F: Data CRC OK in turbo mode\n"); #endif - dev->error_condition = 0; - dev->state = STATE_IDLE; - if (dev->state == STATE_11_SCAN_DATA) - fdc_sector_finishcompare(d86f_fdc, (dev->satisfying_bytes == ((128 << ((uint32_t) dev->last_sector.id.n)) - 1)) ? 1 : 0); - else - fdc_sector_finishread(d86f_fdc); - } + dev->error_condition = 0; + dev->state = STATE_IDLE; + if (dev->state == STATE_11_SCAN_DATA) + fdc_sector_finishcompare(d86f_fdc, (dev->satisfying_bytes == ((128 << ((uint32_t) dev->last_sector.id.n)) - 1)) ? 1 : 0); + else + fdc_sector_finishread(d86f_fdc); + } } } - void d86f_turbo_write(int drive, int side) { @@ -2197,396 +2153,391 @@ d86f_turbo_write(int drive, int side) dev->turbo_pos++; if (dev->turbo_pos >= (128 << dev->last_sector.id.n)) { - /* We've written the data. */ - dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; - dev->error_condition = 0; - dev->state = STATE_IDLE; - d86f_handler[drive].writeback(drive); - fdc_sector_finishread(d86f_fdc); + /* We've written the data. */ + dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; + dev->error_condition = 0; + dev->state = STATE_IDLE; + d86f_handler[drive].writeback(drive); + fdc_sector_finishread(d86f_fdc); } } - void d86f_turbo_format(int drive, int side, int nop) { - d86f_t *dev = d86f[drive]; - int dat; + d86f_t *dev = d86f[drive]; + int dat; uint16_t sc; uint16_t dtl; - int i; + int i; - sc = fdc_get_format_sectors(d86f_fdc); + sc = fdc_get_format_sectors(d86f_fdc); dtl = 128 << fdc_get_format_n(d86f_fdc); if (dev->datac <= 3) { - dat = fdc_getdata(d86f_fdc, 0); - if (dat != -1) - dat &= 0xff; - if ((dat == -1) && (dev->datac < 3)) - dat = 0; - d86f_fdc->format_sector_id.byte_array[dev->datac] = dat & 0xff; - if (dev->datac == 3) { - fdc_stop_id_request(d86f_fdc); - d86f_handler[drive].set_sector(drive, side, d86f_fdc->format_sector_id.id.c, d86f_fdc->format_sector_id.id.h, d86f_fdc->format_sector_id.id.r, d86f_fdc->format_sector_id.id.n); - } + dat = fdc_getdata(d86f_fdc, 0); + if (dat != -1) + dat &= 0xff; + if ((dat == -1) && (dev->datac < 3)) + dat = 0; + d86f_fdc->format_sector_id.byte_array[dev->datac] = dat & 0xff; + if (dev->datac == 3) { + fdc_stop_id_request(d86f_fdc); + d86f_handler[drive].set_sector(drive, side, d86f_fdc->format_sector_id.id.c, d86f_fdc->format_sector_id.id.h, d86f_fdc->format_sector_id.id.r, d86f_fdc->format_sector_id.id.n); + } } else if (dev->datac == 4) { - if (! nop) { - for (i = 0; i < dtl; i++) - d86f_handler[drive].write_data(drive, side, i, dev->fill); - } + if (!nop) { + for (i = 0; i < dtl; i++) + d86f_handler[drive].write_data(drive, side, i, dev->fill); + } - dev->sector_count++; + dev->sector_count++; } dev->datac++; if (dev->datac == 6) { - dev->datac = 0; + dev->datac = 0; - if (dev->sector_count < sc) { - /* Sector within allotted amount. */ - fdc_request_next_sector_id(d86f_fdc); - } else { - dev->state = STATE_IDLE; - d86f_format_turbo_finish(drive, side, nop); - } + if (dev->sector_count < sc) { + /* Sector within allotted amount. */ + fdc_request_next_sector_id(d86f_fdc); + } else { + dev->state = STATE_IDLE; + d86f_format_turbo_finish(drive, side, nop); + } } } - int d86f_sector_is_present(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n) { - d86f_t *dev = d86f[drive]; + d86f_t *dev = d86f[drive]; sector_t *s, *t; if (dev->last_side_sector[side]) { - s = dev->last_side_sector[side]; - while (s) { - if ((s->c == c) && (s->h == h) && (s->r == r) && (s->n == n)) - return 1; - if (! s->prev) - break; - t = s->prev; - s = t; - } + s = dev->last_side_sector[side]; + while (s) { + if ((s->c == c) && (s->h == h) && (s->r == r) && (s->n == n)) + return 1; + if (!s->prev) + break; + t = s->prev; + s = t; + } } return 0; } - void d86f_turbo_poll(int drive, int side) { d86f_t *dev = d86f[drive]; if ((dev->state != STATE_IDLE) && (dev->state != STATE_SECTOR_NOT_FOUND) && ((dev->state & 0xF8) != 0xE8)) { - if (! d86f_can_read_address(drive)) { - dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = dev->error_condition = 0; - fdc_noidam(d86f_fdc); - dev->state = STATE_IDLE; - return; - } + if (!d86f_can_read_address(drive)) { + dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = dev->error_condition = 0; + fdc_noidam(d86f_fdc); + dev->state = STATE_IDLE; + return; + } } - switch(dev->state) { - case STATE_0D_SPIN_TO_INDEX: - dev->sector_count = 0; - dev->datac = 5; - /*FALLTHROUGH*/ + switch (dev->state) { + case STATE_0D_SPIN_TO_INDEX: + dev->sector_count = 0; + dev->datac = 5; + /*FALLTHROUGH*/ - case STATE_02_SPIN_TO_INDEX: - dev->state++; - return; + case STATE_02_SPIN_TO_INDEX: + dev->state++; + return; - case STATE_02_FIND_ID: - if (! d86f_sector_is_present(drive, side, fdc_get_read_track_sector(d86f_fdc).id.c, fdc_get_read_track_sector(d86f_fdc).id.h, - fdc_get_read_track_sector(d86f_fdc).id.r, fdc_get_read_track_sector(d86f_fdc).id.n)) { - dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = dev->error_condition = 0; - fdc_nosector(d86f_fdc); - dev->state = STATE_IDLE; - return; - } - dev->last_sector.id.c = fdc_get_read_track_sector(d86f_fdc).id.c; - dev->last_sector.id.h = fdc_get_read_track_sector(d86f_fdc).id.h; - dev->last_sector.id.r = fdc_get_read_track_sector(d86f_fdc).id.r; - dev->last_sector.id.n = fdc_get_read_track_sector(d86f_fdc).id.n; - d86f_handler[drive].set_sector(drive, side, dev->last_sector.id.c, dev->last_sector.id.h, dev->last_sector.id.r, dev->last_sector.id.n); - dev->turbo_pos = 0; - dev->state++; - return; + case STATE_02_FIND_ID: + if (!d86f_sector_is_present(drive, side, fdc_get_read_track_sector(d86f_fdc).id.c, fdc_get_read_track_sector(d86f_fdc).id.h, + fdc_get_read_track_sector(d86f_fdc).id.r, fdc_get_read_track_sector(d86f_fdc).id.n)) { + dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = dev->error_condition = 0; + fdc_nosector(d86f_fdc); + dev->state = STATE_IDLE; + return; + } + dev->last_sector.id.c = fdc_get_read_track_sector(d86f_fdc).id.c; + dev->last_sector.id.h = fdc_get_read_track_sector(d86f_fdc).id.h; + dev->last_sector.id.r = fdc_get_read_track_sector(d86f_fdc).id.r; + dev->last_sector.id.n = fdc_get_read_track_sector(d86f_fdc).id.n; + d86f_handler[drive].set_sector(drive, side, dev->last_sector.id.c, dev->last_sector.id.h, dev->last_sector.id.r, dev->last_sector.id.n); + dev->turbo_pos = 0; + dev->state++; + return; - case STATE_05_FIND_ID: - case STATE_09_FIND_ID: - case STATE_06_FIND_ID: - case STATE_0C_FIND_ID: - case STATE_11_FIND_ID: - case STATE_16_FIND_ID: - if (! d86f_sector_is_present(drive, side, dev->req_sector.id.c, dev->req_sector.id.h, dev->req_sector.id.r, dev->req_sector.id.n)) { - dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = dev->error_condition = 0; - fdc_nosector(d86f_fdc); - dev->state = STATE_IDLE; - return; - } else if (d86f_sector_flags(drive, side, dev->req_sector.id.c, dev->req_sector.id.h, dev->req_sector.id.r, dev->req_sector.id.n) & SECTOR_NO_ID) { - dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = dev->error_condition = 0; - fdc_noidam(d86f_fdc); - dev->state = STATE_IDLE; - return; - } - dev->last_sector.id.c = dev->req_sector.id.c; - dev->last_sector.id.h = dev->req_sector.id.h; - dev->last_sector.id.r = dev->req_sector.id.r; - dev->last_sector.id.n = dev->req_sector.id.n; - d86f_handler[drive].set_sector(drive, side, dev->last_sector.id.c, dev->last_sector.id.h, dev->last_sector.id.r, dev->last_sector.id.n); - /*FALLTHROUGH*/ + case STATE_05_FIND_ID: + case STATE_09_FIND_ID: + case STATE_06_FIND_ID: + case STATE_0C_FIND_ID: + case STATE_11_FIND_ID: + case STATE_16_FIND_ID: + if (!d86f_sector_is_present(drive, side, dev->req_sector.id.c, dev->req_sector.id.h, dev->req_sector.id.r, dev->req_sector.id.n)) { + dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = dev->error_condition = 0; + fdc_nosector(d86f_fdc); + dev->state = STATE_IDLE; + return; + } else if (d86f_sector_flags(drive, side, dev->req_sector.id.c, dev->req_sector.id.h, dev->req_sector.id.r, dev->req_sector.id.n) & SECTOR_NO_ID) { + dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = dev->error_condition = 0; + fdc_noidam(d86f_fdc); + dev->state = STATE_IDLE; + return; + } + dev->last_sector.id.c = dev->req_sector.id.c; + dev->last_sector.id.h = dev->req_sector.id.h; + dev->last_sector.id.r = dev->req_sector.id.r; + dev->last_sector.id.n = dev->req_sector.id.n; + d86f_handler[drive].set_sector(drive, side, dev->last_sector.id.c, dev->last_sector.id.h, dev->last_sector.id.r, dev->last_sector.id.n); + /*FALLTHROUGH*/ - case STATE_0A_FIND_ID: - dev->turbo_pos = 0; - dev->state++; - return; + case STATE_0A_FIND_ID: + dev->turbo_pos = 0; + dev->state++; + return; - case STATE_0A_READ_ID: - dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = dev->error_condition = 0; - fdc_sectorid(d86f_fdc, dev->last_sector.id.c, dev->last_sector.id.h, dev->last_sector.id.r, dev->last_sector.id.n, 0, 0); - dev->state = STATE_IDLE; - break; + case STATE_0A_READ_ID: + dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = dev->error_condition = 0; + fdc_sectorid(d86f_fdc, dev->last_sector.id.c, dev->last_sector.id.h, dev->last_sector.id.r, dev->last_sector.id.n, 0, 0); + dev->state = STATE_IDLE; + break; - case STATE_02_READ_ID: - case STATE_05_READ_ID: - case STATE_09_READ_ID: - case STATE_06_READ_ID: - case STATE_0C_READ_ID: - case STATE_11_READ_ID: - case STATE_16_READ_ID: - dev->state++; - break; + case STATE_02_READ_ID: + case STATE_05_READ_ID: + case STATE_09_READ_ID: + case STATE_06_READ_ID: + case STATE_0C_READ_ID: + case STATE_11_READ_ID: + case STATE_16_READ_ID: + dev->state++; + break; - case STATE_02_FIND_DATA: - case STATE_06_FIND_DATA: - case STATE_11_FIND_DATA: - case STATE_16_FIND_DATA: - case STATE_05_FIND_DATA: - case STATE_09_FIND_DATA: - case STATE_0C_FIND_DATA: - dev->state++; - break; + case STATE_02_FIND_DATA: + case STATE_06_FIND_DATA: + case STATE_11_FIND_DATA: + case STATE_16_FIND_DATA: + case STATE_05_FIND_DATA: + case STATE_09_FIND_DATA: + case STATE_0C_FIND_DATA: + dev->state++; + break; - case STATE_02_READ_DATA: - case STATE_06_READ_DATA: - case STATE_0C_READ_DATA: - case STATE_11_SCAN_DATA: - case STATE_16_VERIFY_DATA: - d86f_turbo_read(drive, side); - break; + case STATE_02_READ_DATA: + case STATE_06_READ_DATA: + case STATE_0C_READ_DATA: + case STATE_11_SCAN_DATA: + case STATE_16_VERIFY_DATA: + d86f_turbo_read(drive, side); + break; - case STATE_05_WRITE_DATA: - case STATE_09_WRITE_DATA: - d86f_turbo_write(drive, side); - break; + case STATE_05_WRITE_DATA: + case STATE_09_WRITE_DATA: + d86f_turbo_write(drive, side); + break; - case STATE_0D_FORMAT_TRACK: - d86f_turbo_format(drive, side, (side && (d86f_get_sides(drive) != 2))); - return; + case STATE_0D_FORMAT_TRACK: + d86f_turbo_format(drive, side, (side && (d86f_get_sides(drive) != 2))); + return; - case STATE_IDLE: - case STATE_SECTOR_NOT_FOUND: - default: - break; + case STATE_IDLE: + case STATE_SECTOR_NOT_FOUND: + default: + break; } } - void d86f_poll(int drive) { d86f_t *dev = d86f[drive]; - int mfm, side; + int mfm, side; side = fdd_get_head(drive); - if (! fdd_is_double_sided(drive)) - side = 0; + if (!fdd_is_double_sided(drive)) + side = 0; mfm = fdc_is_mfm(d86f_fdc); if ((dev->state & 0xF8) == 0xE8) { - if (! d86f_can_format(drive)) - dev->state = STATE_SECTOR_NOT_FOUND; + if (!d86f_can_format(drive)) + dev->state = STATE_SECTOR_NOT_FOUND; } if (fdd_get_turbo(drive) && (dev->version == 0x0063)) { - d86f_turbo_poll(drive, side); - return; + d86f_turbo_poll(drive, side); + return; } if ((dev->state != STATE_IDLE) && (dev->state != STATE_SECTOR_NOT_FOUND) && ((dev->state & 0xF8) != 0xE8)) { - if (! d86f_can_read_address(drive)) - dev->state = STATE_SECTOR_NOT_FOUND; + if (!d86f_can_read_address(drive)) + dev->state = STATE_SECTOR_NOT_FOUND; } if ((dev->state != STATE_02_SPIN_TO_INDEX) && (dev->state != STATE_0D_SPIN_TO_INDEX)) - d86f_get_bit(drive, side ^ 1); + d86f_get_bit(drive, side ^ 1); - switch(dev->state) { - case STATE_02_SPIN_TO_INDEX: - case STATE_0D_SPIN_TO_INDEX: - d86f_spin_to_index(drive, side); - return; + switch (dev->state) { + case STATE_02_SPIN_TO_INDEX: + case STATE_0D_SPIN_TO_INDEX: + d86f_spin_to_index(drive, side); + return; - case STATE_02_FIND_ID: - case STATE_05_FIND_ID: - case STATE_09_FIND_ID: - case STATE_06_FIND_ID: - case STATE_0A_FIND_ID: - case STATE_0C_FIND_ID: - case STATE_11_FIND_ID: - case STATE_16_FIND_ID: - if (mfm) - d86f_find_address_mark_mfm(drive, side, &(dev->id_find), 0x5554, 0, 0, 0); - else - d86f_find_address_mark_fm(drive, side, &(dev->id_find), 0xF57E, 0, 0, 0); - break; + case STATE_02_FIND_ID: + case STATE_05_FIND_ID: + case STATE_09_FIND_ID: + case STATE_06_FIND_ID: + case STATE_0A_FIND_ID: + case STATE_0C_FIND_ID: + case STATE_11_FIND_ID: + case STATE_16_FIND_ID: + if (mfm) + d86f_find_address_mark_mfm(drive, side, &(dev->id_find), 0x5554, 0, 0, 0); + else + d86f_find_address_mark_fm(drive, side, &(dev->id_find), 0xF57E, 0, 0, 0); + break; - case STATE_0A_READ_ID: - case STATE_02_READ_ID: - d86f_read_sector_id(drive, side, 0); - break; + case STATE_0A_READ_ID: + case STATE_02_READ_ID: + d86f_read_sector_id(drive, side, 0); + break; - case STATE_05_READ_ID: - case STATE_09_READ_ID: - case STATE_06_READ_ID: - case STATE_0C_READ_ID: - case STATE_11_READ_ID: - case STATE_16_READ_ID: - d86f_read_sector_id(drive, side, 1); - break; + case STATE_05_READ_ID: + case STATE_09_READ_ID: + case STATE_06_READ_ID: + case STATE_0C_READ_ID: + case STATE_11_READ_ID: + case STATE_16_READ_ID: + d86f_read_sector_id(drive, side, 1); + break; - case STATE_02_FIND_DATA: - if (mfm) - d86f_find_address_mark_mfm(drive, side, &(dev->data_find), 0x5545, 0x554A, 0x5554, 2); - else - d86f_find_address_mark_fm(drive, side, &(dev->data_find), 0xF56F, 0xF56A, 0xF57E, 2); - break; + case STATE_02_FIND_DATA: + if (mfm) + d86f_find_address_mark_mfm(drive, side, &(dev->data_find), 0x5545, 0x554A, 0x5554, 2); + else + d86f_find_address_mark_fm(drive, side, &(dev->data_find), 0xF56F, 0xF56A, 0xF57E, 2); + break; - case STATE_06_FIND_DATA: - case STATE_11_FIND_DATA: - case STATE_16_FIND_DATA: - if (mfm) - d86f_find_address_mark_mfm(drive, side, &(dev->data_find), 0x5545, 0x554A, 0x5554, fdc_is_sk(d86f_fdc) | 2); - else - d86f_find_address_mark_fm(drive, side, &(dev->data_find), 0xF56F, 0xF56A, 0xF57E, fdc_is_sk(d86f_fdc) | 2); - break; + case STATE_06_FIND_DATA: + case STATE_11_FIND_DATA: + case STATE_16_FIND_DATA: + if (mfm) + d86f_find_address_mark_mfm(drive, side, &(dev->data_find), 0x5545, 0x554A, 0x5554, fdc_is_sk(d86f_fdc) | 2); + else + d86f_find_address_mark_fm(drive, side, &(dev->data_find), 0xF56F, 0xF56A, 0xF57E, fdc_is_sk(d86f_fdc) | 2); + break; - case STATE_05_FIND_DATA: - case STATE_09_FIND_DATA: - if (mfm) - d86f_write_find_address_mark_mfm(drive, side, &(dev->data_find)); - else - d86f_write_find_address_mark_fm(drive, side, &(dev->data_find)); - break; + case STATE_05_FIND_DATA: + case STATE_09_FIND_DATA: + if (mfm) + d86f_write_find_address_mark_mfm(drive, side, &(dev->data_find)); + else + d86f_write_find_address_mark_fm(drive, side, &(dev->data_find)); + break; - case STATE_0C_FIND_DATA: - if (mfm) - d86f_find_address_mark_mfm(drive, side, &(dev->data_find), 0x554A, 0x5545, 0x5554, fdc_is_sk(d86f_fdc) | 2); - else - d86f_find_address_mark_fm(drive, side, &(dev->data_find), 0xF56A, 0xF56F, 0xF57E, fdc_is_sk(d86f_fdc) | 2); - break; + case STATE_0C_FIND_DATA: + if (mfm) + d86f_find_address_mark_mfm(drive, side, &(dev->data_find), 0x554A, 0x5545, 0x5554, fdc_is_sk(d86f_fdc) | 2); + else + d86f_find_address_mark_fm(drive, side, &(dev->data_find), 0xF56A, 0xF56F, 0xF57E, fdc_is_sk(d86f_fdc) | 2); + break; - case STATE_02_READ_DATA: - case STATE_06_READ_DATA: - case STATE_0C_READ_DATA: - case STATE_11_SCAN_DATA: - case STATE_16_VERIFY_DATA: - d86f_read_sector_data(drive, side); - break; + case STATE_02_READ_DATA: + case STATE_06_READ_DATA: + case STATE_0C_READ_DATA: + case STATE_11_SCAN_DATA: + case STATE_16_VERIFY_DATA: + d86f_read_sector_data(drive, side); + break; - case STATE_05_WRITE_DATA: - if (mfm) - d86f_write_sector_data(drive, side, mfm, 0x5545); - else - d86f_write_sector_data(drive, side, mfm, 0xF56F); - break; + case STATE_05_WRITE_DATA: + if (mfm) + d86f_write_sector_data(drive, side, mfm, 0x5545); + else + d86f_write_sector_data(drive, side, mfm, 0xF56F); + break; - case STATE_09_WRITE_DATA: - if (mfm) - d86f_write_sector_data(drive, side, mfm, 0x554A); - else - d86f_write_sector_data(drive, side, mfm, 0xF56A); - break; + case STATE_09_WRITE_DATA: + if (mfm) + d86f_write_sector_data(drive, side, mfm, 0x554A); + else + d86f_write_sector_data(drive, side, mfm, 0xF56A); + break; - case STATE_0D_FORMAT_TRACK: - if (! (dev->track_pos & 15)) - d86f_format_track(drive, side, (!side || (d86f_get_sides(drive) == 2)) && (dev->version == D86FVER)); - return; + case STATE_0D_FORMAT_TRACK: + if (!(dev->track_pos & 15)) + d86f_format_track(drive, side, (!side || (d86f_get_sides(drive) == 2)) && (dev->version == D86FVER)); + return; - case STATE_IDLE: - case STATE_SECTOR_NOT_FOUND: - default: - d86f_get_bit(drive, side); - break; + case STATE_IDLE: + case STATE_SECTOR_NOT_FOUND: + default: + d86f_get_bit(drive, side); + break; } d86f_advance_bit(drive, side); if (d86f_wrong_densel(drive) && (dev->state != STATE_IDLE)) { - dev->state = STATE_IDLE; - fdc_noidam(d86f_fdc); - return; + dev->state = STATE_IDLE; + fdc_noidam(d86f_fdc); + return; } if ((dev->index_count == 2) && (dev->state != STATE_IDLE)) { - switch(dev->state) { - case STATE_0A_FIND_ID: - case STATE_SECTOR_NOT_FOUND: - dev->state = STATE_IDLE; - fdc_noidam(d86f_fdc); - break; + switch (dev->state) { + case STATE_0A_FIND_ID: + case STATE_SECTOR_NOT_FOUND: + dev->state = STATE_IDLE; + fdc_noidam(d86f_fdc); + break; - case STATE_02_FIND_DATA: - case STATE_06_FIND_DATA: - case STATE_11_FIND_DATA: - case STATE_16_FIND_DATA: - case STATE_05_FIND_DATA: - case STATE_09_FIND_DATA: - case STATE_0C_FIND_DATA: - dev->state = STATE_IDLE; - fdc_nodataam(d86f_fdc); - break; + case STATE_02_FIND_DATA: + case STATE_06_FIND_DATA: + case STATE_11_FIND_DATA: + case STATE_16_FIND_DATA: + case STATE_05_FIND_DATA: + case STATE_09_FIND_DATA: + case STATE_0C_FIND_DATA: + dev->state = STATE_IDLE; + fdc_nodataam(d86f_fdc); + break; - case STATE_02_SPIN_TO_INDEX: - case STATE_02_READ_DATA: - case STATE_05_WRITE_DATA: - case STATE_06_READ_DATA: - case STATE_09_WRITE_DATA: - case STATE_0C_READ_DATA: - case STATE_0D_SPIN_TO_INDEX: - case STATE_0D_FORMAT_TRACK: - case STATE_11_SCAN_DATA: - case STATE_16_VERIFY_DATA: - /* In these states, we should *NEVER* care about how many index pulses there have been. */ - break; + case STATE_02_SPIN_TO_INDEX: + case STATE_02_READ_DATA: + case STATE_05_WRITE_DATA: + case STATE_06_READ_DATA: + case STATE_09_WRITE_DATA: + case STATE_0C_READ_DATA: + case STATE_0D_SPIN_TO_INDEX: + case STATE_0D_FORMAT_TRACK: + case STATE_11_SCAN_DATA: + case STATE_16_VERIFY_DATA: + /* In these states, we should *NEVER* care about how many index pulses there have been. */ + break; - default: - dev->state = STATE_IDLE; - if (dev->id_found) { - if (dev->error_condition & 0x18) { - if ((dev->error_condition & 0x18) == 0x08) - fdc_badcylinder(d86f_fdc); - if ((dev->error_condition & 0x10) == 0x10) - fdc_wrongcylinder(d86f_fdc); - else - fdc_nosector(d86f_fdc); - } else - fdc_nosector(d86f_fdc); - } else - fdc_noidam(d86f_fdc); - break; - } + default: + dev->state = STATE_IDLE; + if (dev->id_found) { + if (dev->error_condition & 0x18) { + if ((dev->error_condition & 0x18) == 0x08) + fdc_badcylinder(d86f_fdc); + if ((dev->error_condition & 0x10) == 0x10) + fdc_wrongcylinder(d86f_fdc); + else + fdc_nosector(d86f_fdc); + } else + fdc_nosector(d86f_fdc); + } else + fdc_noidam(d86f_fdc); + break; + } } } - void d86f_reset_index_hole_pos(int drive, int side) { @@ -2595,102 +2546,100 @@ d86f_reset_index_hole_pos(int drive, int side) dev->index_hole_pos[side] = 0; } - uint16_t d86f_prepare_pretrack(int drive, int side, int iso) { - d86f_t *dev = d86f[drive]; + d86f_t *dev = d86f[drive]; uint16_t i, pos; - int mfm; - int real_gap0_len; - int sync_len; - int real_gap1_len; + int mfm; + int real_gap0_len; + int sync_len; + int real_gap1_len; uint16_t gap_fill; uint32_t raw_size; - uint16_t iam_fm = 0xFAF7; + uint16_t iam_fm = 0xFAF7; uint16_t iam_mfm = 0x5255; - mfm = d86f_is_mfm(drive); + mfm = d86f_is_mfm(drive); real_gap0_len = mfm ? 80 : 40; - sync_len = mfm ? 12 : 6; + sync_len = mfm ? 12 : 6; real_gap1_len = mfm ? 50 : 26; - gap_fill = mfm ? 0x4E : 0xFF; - raw_size = d86f_handler[drive].get_raw_size(drive, side); + gap_fill = mfm ? 0x4E : 0xFF; + raw_size = d86f_handler[drive].get_raw_size(drive, side); if (raw_size & 15) - raw_size = (raw_size >> 4) + 1; + raw_size = (raw_size >> 4) + 1; else - raw_size = (raw_size >> 4); + raw_size = (raw_size >> 4); dev->index_hole_pos[side] = 0; d86f_destroy_linked_lists(drive, side); for (i = 0; i < raw_size; i++) - d86f_write_direct_common(drive, side, gap_fill, 0, i); + d86f_write_direct_common(drive, side, gap_fill, 0, i); pos = 0; - if (! iso) { - for (i = 0; i < real_gap0_len; i++) { - d86f_write_direct_common(drive, side, gap_fill, 0, pos); - pos = (pos + 1) % raw_size; - } - for (i = 0; i < sync_len; i++) { - d86f_write_direct_common(drive, side, 0, 0, pos); - pos = (pos + 1) % raw_size; - } - if (mfm) { - for (i = 0; i < 3; i++) { - d86f_write_direct_common(drive, side, 0x2452, 1, pos); - pos = (pos + 1) % raw_size; - } - } + if (!iso) { + for (i = 0; i < real_gap0_len; i++) { + d86f_write_direct_common(drive, side, gap_fill, 0, pos); + pos = (pos + 1) % raw_size; + } + for (i = 0; i < sync_len; i++) { + d86f_write_direct_common(drive, side, 0, 0, pos); + pos = (pos + 1) % raw_size; + } + if (mfm) { + for (i = 0; i < 3; i++) { + d86f_write_direct_common(drive, side, 0x2452, 1, pos); + pos = (pos + 1) % raw_size; + } + } - d86f_write_direct_common(drive, side, mfm ? iam_mfm : iam_fm, 1, pos); - pos = (pos + 1) % raw_size; + d86f_write_direct_common(drive, side, mfm ? iam_mfm : iam_fm, 1, pos); + pos = (pos + 1) % raw_size; } for (i = 0; i < real_gap1_len; i++) { - d86f_write_direct_common(drive, side, gap_fill, 0, pos); - pos = (pos + 1) % raw_size; + d86f_write_direct_common(drive, side, gap_fill, 0, pos); + pos = (pos + 1) % raw_size; } return pos; } - uint16_t d86f_prepare_sector(int drive, int side, int prev_pos, uint8_t *id_buf, uint8_t *data_buf, int data_len, int gap2, int gap3, int flags) { - d86f_t *dev = d86f[drive]; - uint16_t pos; - int i; + d86f_t *dev = d86f[drive]; + uint16_t pos; + int i; sector_t *s; - int real_gap2_len = gap2; - int real_gap3_len = gap3; - int mfm; - int sync_len; + int real_gap2_len = gap2; + int real_gap3_len = gap3; + int mfm; + int sync_len; uint16_t gap_fill; uint32_t raw_size; - uint16_t idam_fm = 0x7EF5; - uint16_t dataam_fm = 0x6FF5; - uint16_t datadam_fm = 0x6AF5; - uint16_t idam_mfm = 0x5455; - uint16_t dataam_mfm = 0x4555; + uint16_t idam_fm = 0x7EF5; + uint16_t dataam_fm = 0x6FF5; + uint16_t datadam_fm = 0x6AF5; + uint16_t idam_mfm = 0x5455; + uint16_t dataam_mfm = 0x4555; uint16_t datadam_mfm = 0x4A55; if (fdd_get_turbo(drive) && (dev->version == 0x0063)) { - s = (sector_t *) malloc(sizeof(sector_t)); - memset(s, 0, sizeof(sector_t)); - s->c = id_buf[0]; - s->h = id_buf[1]; - s->r = id_buf[2]; - s->n = id_buf[3]; - s->flags = flags; - if (dev->last_side_sector[side]) - s->prev = dev->last_side_sector[side]; - dev->last_side_sector[side] = s; + s = (sector_t *) malloc(sizeof(sector_t)); + memset(s, 0, sizeof(sector_t)); + s->c = id_buf[0]; + s->h = id_buf[1]; + s->r = id_buf[2]; + s->n = id_buf[3]; + s->flags = flags; + if (dev->last_side_sector[side]) + s->prev = dev->last_side_sector[side]; + dev->last_side_sector[side] = s; } mfm = d86f_is_mfm(drive); @@ -2698,85 +2647,84 @@ d86f_prepare_sector(int drive, int side, int prev_pos, uint8_t *id_buf, uint8_t gap_fill = mfm ? 0x4E : 0xFF; raw_size = d86f_handler[drive].get_raw_size(drive, side); if (raw_size & 15) - raw_size = (raw_size >> 4) + 1; + raw_size = (raw_size >> 4) + 1; else - raw_size = (raw_size >> 4); + raw_size = (raw_size >> 4); pos = prev_pos; sync_len = mfm ? 12 : 6; if (!(flags & SECTOR_NO_ID)) { - for (i = 0; i < sync_len; i++) { - d86f_write_direct_common(drive, side, 0, 0, pos); - pos = (pos + 1) % raw_size; - } + for (i = 0; i < sync_len; i++) { + d86f_write_direct_common(drive, side, 0, 0, pos); + pos = (pos + 1) % raw_size; + } - dev->calc_crc.word = 0xffff; - if (mfm) { - for (i = 0; i < 3; i++) { - d86f_write_direct_common(drive, side, 0x8944, 1, pos); - pos = (pos + 1) % raw_size; - d86f_calccrc(dev, 0xA1); - } - } - d86f_write_direct_common(drive, side, mfm ? idam_mfm : idam_fm, 1, pos); - pos = (pos + 1) % raw_size; - d86f_calccrc(dev, 0xFE); - for (i = 0; i < 4; i++) { - d86f_write_direct_common(drive, side, id_buf[i], 0, pos); - pos = (pos + 1) % raw_size; - d86f_calccrc(dev, id_buf[i]); - } - for (i = 1; i >= 0; i--) { - d86f_write_direct_common(drive, side, dev->calc_crc.bytes[i], 0, pos); - pos = (pos + 1) % raw_size; - } - for (i = 0; i < real_gap2_len; i++) { - d86f_write_direct_common(drive, side, gap_fill, 0, pos); - pos = (pos + 1) % raw_size; - } + dev->calc_crc.word = 0xffff; + if (mfm) { + for (i = 0; i < 3; i++) { + d86f_write_direct_common(drive, side, 0x8944, 1, pos); + pos = (pos + 1) % raw_size; + d86f_calccrc(dev, 0xA1); + } + } + d86f_write_direct_common(drive, side, mfm ? idam_mfm : idam_fm, 1, pos); + pos = (pos + 1) % raw_size; + d86f_calccrc(dev, 0xFE); + for (i = 0; i < 4; i++) { + d86f_write_direct_common(drive, side, id_buf[i], 0, pos); + pos = (pos + 1) % raw_size; + d86f_calccrc(dev, id_buf[i]); + } + for (i = 1; i >= 0; i--) { + d86f_write_direct_common(drive, side, dev->calc_crc.bytes[i], 0, pos); + pos = (pos + 1) % raw_size; + } + for (i = 0; i < real_gap2_len; i++) { + d86f_write_direct_common(drive, side, gap_fill, 0, pos); + pos = (pos + 1) % raw_size; + } } if (!(flags & SECTOR_NO_DATA)) { - for (i = 0; i < sync_len; i++) { - d86f_write_direct_common(drive, side, 0, 0, pos); - pos = (pos + 1) % raw_size; - } - dev->calc_crc.word = 0xffff; - if (mfm) { - for (i = 0; i < 3; i++) { - d86f_write_direct_common(drive, side, 0x8944, 1, pos); - pos = (pos + 1) % raw_size; - d86f_calccrc(dev, 0xA1); - } - } - d86f_write_direct_common(drive, side, mfm ? ((flags & SECTOR_DELETED_DATA) ? datadam_mfm : dataam_mfm) : ((flags & SECTOR_DELETED_DATA) ? datadam_fm : dataam_fm), 1, pos); - pos = (pos + 1) % raw_size; - d86f_calccrc(dev, (flags & SECTOR_DELETED_DATA) ? 0xF8 : 0xFB); - if (data_len > 0) { - for (i = 0; i < data_len; i++) { - d86f_write_direct_common(drive, side, data_buf[i], 0, pos); - pos = (pos + 1) % raw_size; - d86f_calccrc(dev, data_buf[i]); - } - if (!(flags & SECTOR_CRC_ERROR)) { - for (i = 1; i >= 0; i--) { - d86f_write_direct_common(drive, side, dev->calc_crc.bytes[i], 0, pos); - pos = (pos + 1) % raw_size; - } - } - for (i = 0; i < real_gap3_len; i++) { - d86f_write_direct_common(drive, side, gap_fill, 0, pos); - pos = (pos + 1) % raw_size; - } - } + for (i = 0; i < sync_len; i++) { + d86f_write_direct_common(drive, side, 0, 0, pos); + pos = (pos + 1) % raw_size; + } + dev->calc_crc.word = 0xffff; + if (mfm) { + for (i = 0; i < 3; i++) { + d86f_write_direct_common(drive, side, 0x8944, 1, pos); + pos = (pos + 1) % raw_size; + d86f_calccrc(dev, 0xA1); + } + } + d86f_write_direct_common(drive, side, mfm ? ((flags & SECTOR_DELETED_DATA) ? datadam_mfm : dataam_mfm) : ((flags & SECTOR_DELETED_DATA) ? datadam_fm : dataam_fm), 1, pos); + pos = (pos + 1) % raw_size; + d86f_calccrc(dev, (flags & SECTOR_DELETED_DATA) ? 0xF8 : 0xFB); + if (data_len > 0) { + for (i = 0; i < data_len; i++) { + d86f_write_direct_common(drive, side, data_buf[i], 0, pos); + pos = (pos + 1) % raw_size; + d86f_calccrc(dev, data_buf[i]); + } + if (!(flags & SECTOR_CRC_ERROR)) { + for (i = 1; i >= 0; i--) { + d86f_write_direct_common(drive, side, dev->calc_crc.bytes[i], 0, pos); + pos = (pos + 1) % raw_size; + } + } + for (i = 0; i < real_gap3_len; i++) { + d86f_write_direct_common(drive, side, gap_fill, 0, pos); + pos = (pos + 1) % raw_size; + } + } } return pos; } - /* * Note on handling of tracks on thick track drives: * @@ -2801,248 +2749,240 @@ d86f_prepare_sector(int drive, int side, int prev_pos, uint8_t *id_buf, uint8_t void d86f_construct_encoded_buffer(int drive, int side) { - d86f_t *dev = d86f[drive]; - uint32_t i = 0; + d86f_t *dev = d86f[drive]; + uint32_t i = 0; /* *_fuzm are fuzzy bit masks, *_holm are hole masks, dst_neim are masks is mask for bits that are neither fuzzy nor holes in both, and src1_d and src2_d are filtered source data. */ - uint16_t src1_fuzm, src2_fuzm, dst_fuzm, src1_holm, src2_holm, dst_holm, dst_neim, src1_d, src2_d; - uint32_t len; - uint16_t *dst = dev->track_encoded_data[side]; - uint16_t *dst_s = dev->track_surface_data[side]; - uint16_t *src1 = dev->thin_track_encoded_data[0][side]; + uint16_t src1_fuzm, src2_fuzm, dst_fuzm, src1_holm, src2_holm, dst_holm, dst_neim, src1_d, src2_d; + uint32_t len; + uint16_t *dst = dev->track_encoded_data[side]; + uint16_t *dst_s = dev->track_surface_data[side]; + uint16_t *src1 = dev->thin_track_encoded_data[0][side]; uint16_t *src1_s = dev->thin_track_surface_data[0][side]; - uint16_t *src2 = dev->thin_track_encoded_data[1][side]; + uint16_t *src2 = dev->thin_track_encoded_data[1][side]; uint16_t *src2_s = dev->thin_track_surface_data[1][side]; - len = d86f_get_array_size(drive, side, 1); + len = d86f_get_array_size(drive, side, 1); for (i = 0; i < len; i++) { - /* The two bits differ. */ - if (d86f_has_surface_desc(drive)) { - /* Source image has surface description data, so we have some more handling to do. */ - src1_fuzm = src1[i] & src1_s[i]; - src2_fuzm = src2[i] & src2_s[i]; - dst_fuzm = src1_fuzm | src2_fuzm; /* The bits that remain set are fuzzy in either one or - the other or both. */ - src1_holm = src1[i] | (src1_s[i] ^ 0xffff); - src2_holm = src2[i] | (src2_s[i] ^ 0xffff); - dst_holm = (src1_holm & src2_holm) ^ 0xffff; /* The bits that remain set are holes in both. */ - dst_neim = (dst_fuzm | dst_holm) ^ 0xffff; /* The bits that remain set are those that are neither - fuzzy nor are holes in both. */ - src1_d = src1[i] & dst_neim; - src2_d = src2[i] & dst_neim; + /* The two bits differ. */ + if (d86f_has_surface_desc(drive)) { + /* Source image has surface description data, so we have some more handling to do. */ + src1_fuzm = src1[i] & src1_s[i]; + src2_fuzm = src2[i] & src2_s[i]; + dst_fuzm = src1_fuzm | src2_fuzm; /* The bits that remain set are fuzzy in either one or + the other or both. */ + src1_holm = src1[i] | (src1_s[i] ^ 0xffff); + src2_holm = src2[i] | (src2_s[i] ^ 0xffff); + dst_holm = (src1_holm & src2_holm) ^ 0xffff; /* The bits that remain set are holes in both. */ + dst_neim = (dst_fuzm | dst_holm) ^ 0xffff; /* The bits that remain set are those that are neither + fuzzy nor are holes in both. */ + src1_d = src1[i] & dst_neim; + src2_d = src2[i] & dst_neim; - dst_s[i] = (dst_neim ^ 0xffff); /* The set bits are those that are either fuzzy or are - holes in both. */ - dst[i] = (src1_d | src2_d); /* Initial data is remaining data from Source 1 and - Source 2. */ - dst[i] |= dst_fuzm; /* Add to it the fuzzy bytes (holes have surface bit set - but data bit clear). */ - } else { - /* No surface data, the handling is much simpler - a simple OR. */ - dst[i] = src1[i] | src2[i]; - dst_s[i] = 0; - } + dst_s[i] = (dst_neim ^ 0xffff); /* The set bits are those that are either fuzzy or are + holes in both. */ + dst[i] = (src1_d | src2_d); /* Initial data is remaining data from Source 1 and + Source 2. */ + dst[i] |= dst_fuzm; /* Add to it the fuzzy bytes (holes have surface bit set + but data bit clear). */ + } else { + /* No surface data, the handling is much simpler - a simple OR. */ + dst[i] = src1[i] | src2[i]; + dst_s[i] = 0; + } } } - /* Decomposition is easier since we at most have to care about the holes. */ void d86f_decompose_encoded_buffer(int drive, int side) { - d86f_t *dev = d86f[drive]; - uint32_t i = 0; - uint16_t temp, temp2; - uint32_t len; - uint16_t *dst = dev->track_encoded_data[side]; - uint16_t *src1 = dev->thin_track_encoded_data[0][side]; + d86f_t *dev = d86f[drive]; + uint32_t i = 0; + uint16_t temp, temp2; + uint32_t len; + uint16_t *dst = dev->track_encoded_data[side]; + uint16_t *src1 = dev->thin_track_encoded_data[0][side]; uint16_t *src1_s = dev->thin_track_surface_data[0][side]; - uint16_t *src2 = dev->thin_track_encoded_data[1][side]; + uint16_t *src2 = dev->thin_track_encoded_data[1][side]; uint16_t *src2_s = dev->thin_track_surface_data[1][side]; - dst = d86f_handler[drive].encoded_data(drive, side); - len = d86f_get_array_size(drive, side, 1); + dst = d86f_handler[drive].encoded_data(drive, side); + len = d86f_get_array_size(drive, side, 1); for (i = 0; i < len; i++) { - if (d86f_has_surface_desc(drive)) { - /* Source image has surface description data, so we have some more handling to do. - We need hole masks for both buffers. Holes have data bit clear and surface bit set. */ - temp = src1[i] & (src1_s[i] ^ 0xffff); - temp2 = src2[i] & (src2_s[i] ^ 0xffff); - src1[i] = dst[i] & temp; - src1_s[i] = temp ^ 0xffff; - src2[i] = dst[i] & temp2; - src2_s[i] = temp2 ^ 0xffff; - } else { - src1[i] = src2[i] = dst[i]; - } + if (d86f_has_surface_desc(drive)) { + /* Source image has surface description data, so we have some more handling to do. + We need hole masks for both buffers. Holes have data bit clear and surface bit set. */ + temp = src1[i] & (src1_s[i] ^ 0xffff); + temp2 = src2[i] & (src2_s[i] ^ 0xffff); + src1[i] = dst[i] & temp; + src1_s[i] = temp ^ 0xffff; + src2[i] = dst[i] & temp2; + src2_s[i] = temp2 ^ 0xffff; + } else { + src1[i] = src2[i] = dst[i]; + } } } - int d86f_track_header_size(int drive) { int temp = 6; if (d86f_has_extra_bit_cells(drive)) - temp += 4; + temp += 4; return temp; } - void d86f_read_track(int drive, int track, int thin_track, int side, uint16_t *da, uint16_t *sa) { - d86f_t *dev = d86f[drive]; - int logical_track = 0; - int array_size = 0; + d86f_t *dev = d86f[drive]; + int logical_track = 0; + int array_size = 0; if (d86f_get_sides(drive) == 2) - logical_track = ((track + thin_track) << 1) + side; - else - logical_track = track + thin_track; + logical_track = ((track + thin_track) << 1) + side; + else + logical_track = track + thin_track; if (dev->track_offset[logical_track]) { - if (! thin_track) { - if (fseek(dev->f, dev->track_offset[logical_track], SEEK_SET) == -1) - fatal("d86f_read_track(): Error seeking to offset dev->track_offset[logical_track]\n"); - if (fread(&(dev->side_flags[side]), 1, 2, dev->f) != 2) - fatal("d86f_read_track(): Error reading side flags\n"); - if (d86f_has_extra_bit_cells(drive)) { - if (fread(&(dev->extra_bit_cells[side]), 1, 4, dev->f) != 4) - fatal("d86f_read_track(): Error reading number of extra bit cells\n"); - /* If RPM shift is 0% and direction is 1, do not adjust extra bit cells, - as that is the whole track length. */ - if (d86f_get_rpm_mode(drive) || !d86f_get_speed_shift_dir(drive)) { - if (dev->extra_bit_cells[side] < -32768) - dev->extra_bit_cells[side] = -32768; - if (dev->extra_bit_cells[side] > 32768) - dev->extra_bit_cells[side] = 32768; - } - } else - dev->extra_bit_cells[side] = 0; - (void) !fread(&(dev->index_hole_pos[side]), 4, 1, dev->f); - } else - fseek(dev->f, dev->track_offset[logical_track] + d86f_track_header_size(drive), SEEK_SET); - array_size = d86f_get_array_size(drive, side, 0); - (void) !fread(da, 1, array_size, dev->f); - if (d86f_has_surface_desc(drive)) - (void) !fread(sa, 1, array_size, dev->f); + if (!thin_track) { + if (fseek(dev->f, dev->track_offset[logical_track], SEEK_SET) == -1) + fatal("d86f_read_track(): Error seeking to offset dev->track_offset[logical_track]\n"); + if (fread(&(dev->side_flags[side]), 1, 2, dev->f) != 2) + fatal("d86f_read_track(): Error reading side flags\n"); + if (d86f_has_extra_bit_cells(drive)) { + if (fread(&(dev->extra_bit_cells[side]), 1, 4, dev->f) != 4) + fatal("d86f_read_track(): Error reading number of extra bit cells\n"); + /* If RPM shift is 0% and direction is 1, do not adjust extra bit cells, + as that is the whole track length. */ + if (d86f_get_rpm_mode(drive) || !d86f_get_speed_shift_dir(drive)) { + if (dev->extra_bit_cells[side] < -32768) + dev->extra_bit_cells[side] = -32768; + if (dev->extra_bit_cells[side] > 32768) + dev->extra_bit_cells[side] = 32768; + } + } else + dev->extra_bit_cells[side] = 0; + (void) !fread(&(dev->index_hole_pos[side]), 4, 1, dev->f); + } else + fseek(dev->f, dev->track_offset[logical_track] + d86f_track_header_size(drive), SEEK_SET); + array_size = d86f_get_array_size(drive, side, 0); + (void) !fread(da, 1, array_size, dev->f); + if (d86f_has_surface_desc(drive)) + (void) !fread(sa, 1, array_size, dev->f); } else { - if (! thin_track) { - switch((dev->disk_flags >> 1) & 3) { - case 0: - default: - dev->side_flags[side] = 0x0A; - break; + if (!thin_track) { + switch ((dev->disk_flags >> 1) & 3) { + case 0: + default: + dev->side_flags[side] = 0x0A; + break; - case 1: - dev->side_flags[side] = 0x00; - break; + case 1: + dev->side_flags[side] = 0x00; + break; - case 2: - case 3: - dev->side_flags[side] = 0x03; - break; - } - dev->extra_bit_cells[side] = 0; - } + case 2: + case 3: + dev->side_flags[side] = 0x03; + break; + } + dev->extra_bit_cells[side] = 0; + } } } - void d86f_zero_track(int drive) { d86f_t *dev = d86f[drive]; - int sides, side; + int sides, side; sides = d86f_get_sides(drive); for (side = 0; side < sides; side++) { - if (d86f_has_surface_desc(drive)) - memset(dev->track_surface_data[side], 0, 106096); - memset(dev->track_encoded_data[side], 0, 106096); + if (d86f_has_surface_desc(drive)) + memset(dev->track_surface_data[side], 0, 106096); + memset(dev->track_encoded_data[side], 0, 106096); } } - void d86f_seek(int drive, int track) { d86f_t *dev = d86f[drive]; - int sides; - int side, thin_track; + int sides; + int side, thin_track; sides = d86f_get_sides(drive); /* If the drive has thick tracks, shift the track number by 1. */ - if (! fdd_doublestep_40(drive)) { - track <<= 1; + if (!fdd_doublestep_40(drive)) { + track <<= 1; - for (thin_track = 0; thin_track < sides; thin_track++) { - for (side = 0; side < sides; side++) { - if (d86f_has_surface_desc(drive)) - memset(dev->thin_track_surface_data[thin_track][side], 0, 106096); - memset(dev->thin_track_encoded_data[thin_track][side], 0, 106096); - } - } + for (thin_track = 0; thin_track < sides; thin_track++) { + for (side = 0; side < sides; side++) { + if (d86f_has_surface_desc(drive)) + memset(dev->thin_track_surface_data[thin_track][side], 0, 106096); + memset(dev->thin_track_encoded_data[thin_track][side], 0, 106096); + } + } } d86f_zero_track(drive); dev->cur_track = track; - if (! fdd_doublestep_40(drive)) { - for (side = 0; side < sides; side++) { - for (thin_track = 0; thin_track < 2; thin_track++) - d86f_read_track(drive, track, thin_track, side, dev->thin_track_encoded_data[thin_track][side], dev->thin_track_surface_data[thin_track][side]); + if (!fdd_doublestep_40(drive)) { + for (side = 0; side < sides; side++) { + for (thin_track = 0; thin_track < 2; thin_track++) + d86f_read_track(drive, track, thin_track, side, dev->thin_track_encoded_data[thin_track][side], dev->thin_track_surface_data[thin_track][side]); - d86f_construct_encoded_buffer(drive, side); - } + d86f_construct_encoded_buffer(drive, side); + } } else { - for (side = 0; side < sides; side++) - d86f_read_track(drive, track, 0, side, dev->track_encoded_data[side], dev->track_surface_data[side]); + for (side = 0; side < sides; side++) + d86f_read_track(drive, track, 0, side, dev->track_encoded_data[side], dev->track_surface_data[side]); } dev->state = STATE_IDLE; } - void d86f_write_track(int drive, FILE **f, int side, uint16_t *da0, uint16_t *sa0) { - uint32_t array_size = d86f_get_array_size(drive, side, 0); - uint16_t side_flags = d86f_handler[drive].side_flags(drive); + uint32_t array_size = d86f_get_array_size(drive, side, 0); + uint16_t side_flags = d86f_handler[drive].side_flags(drive); uint32_t extra_bit_cells = d86f_handler[drive].extra_bit_cells(drive, side); - uint32_t index_hole_pos = d86f_handler[drive].index_hole_pos(drive, side); + uint32_t index_hole_pos = d86f_handler[drive].index_hole_pos(drive, side); fwrite(&side_flags, 1, 2, *f); if (d86f_has_extra_bit_cells(drive)) - fwrite(&extra_bit_cells, 1, 4, *f); + fwrite(&extra_bit_cells, 1, 4, *f); fwrite(&index_hole_pos, 1, 4, *f); fwrite(da0, 1, array_size, *f); if (d86f_has_surface_desc(drive)) - fwrite(sa0, 1, array_size, *f); + fwrite(sa0, 1, array_size, *f); } - int d86f_get_track_table_size(int drive) { int temp = 2048; if (d86f_get_sides(drive) == 1) - temp >>= 1; + temp >>= 1; return temp; } - void d86f_set_cur_track(int drive, int track) { @@ -3051,144 +2991,141 @@ d86f_set_cur_track(int drive, int track) dev->cur_track = track; } - void d86f_write_tracks(int drive, FILE **f, uint32_t *track_table) { - d86f_t *dev = d86f[drive]; - int sides, fdd_side; - int side, thin_track; - int logical_track = 0; + d86f_t *dev = d86f[drive]; + int sides, fdd_side; + int side, thin_track; + int logical_track = 0; uint32_t *tbl; - tbl = dev->track_offset; + tbl = dev->track_offset; fdd_side = fdd_get_head(drive); - sides = d86f_get_sides(drive); + sides = d86f_get_sides(drive); if (track_table != NULL) - tbl = track_table; + tbl = track_table; if (!fdd_doublestep_40(drive)) { - d86f_decompose_encoded_buffer(drive, 0); - if (sides == 2) - d86f_decompose_encoded_buffer(drive, 1); + d86f_decompose_encoded_buffer(drive, 0); + if (sides == 2) + d86f_decompose_encoded_buffer(drive, 1); - for (thin_track = 0; thin_track < 2; thin_track++) { - for (side = 0; side < sides; side++) { - fdd_set_head(drive, side); + for (thin_track = 0; thin_track < 2; thin_track++) { + for (side = 0; side < sides; side++) { + fdd_set_head(drive, side); - if (sides == 2) - logical_track = ((dev->cur_track + thin_track) << 1) + side; - else - logical_track = dev->cur_track + thin_track; + if (sides == 2) + logical_track = ((dev->cur_track + thin_track) << 1) + side; + else + logical_track = dev->cur_track + thin_track; - if (track_table && !tbl[logical_track]) { - fseek(*f, 0, SEEK_END); - tbl[logical_track] = ftell(*f); - } + if (track_table && !tbl[logical_track]) { + fseek(*f, 0, SEEK_END); + tbl[logical_track] = ftell(*f); + } - if (tbl[logical_track]) { - fseek(*f, tbl[logical_track], SEEK_SET); - d86f_write_track(drive, f, side, dev->thin_track_encoded_data[thin_track][side], dev->thin_track_surface_data[thin_track][side]); - } - } - } + if (tbl[logical_track]) { + fseek(*f, tbl[logical_track], SEEK_SET); + d86f_write_track(drive, f, side, dev->thin_track_encoded_data[thin_track][side], dev->thin_track_surface_data[thin_track][side]); + } + } + } } else { - for (side = 0; side < sides; side++) { - fdd_set_head(drive, side); - if (sides == 2) - logical_track = (dev->cur_track << 1) + side; - else - logical_track = dev->cur_track; + for (side = 0; side < sides; side++) { + fdd_set_head(drive, side); + if (sides == 2) + logical_track = (dev->cur_track << 1) + side; + else + logical_track = dev->cur_track; - if (track_table && !tbl[logical_track]) { - fseek(*f, 0, SEEK_END); - tbl[logical_track] = ftell(*f); - } + if (track_table && !tbl[logical_track]) { + fseek(*f, 0, SEEK_END); + tbl[logical_track] = ftell(*f); + } - if (tbl[logical_track]) { - if (fseek(*f, tbl[logical_track], SEEK_SET) == -1) - fatal("d86f_write_tracks(): Error seeking to offset tbl[logical_track]\n"); - d86f_write_track(drive, f, side, d86f_handler[drive].encoded_data(drive, side), dev->track_surface_data[side]); - } - } + if (tbl[logical_track]) { + if (fseek(*f, tbl[logical_track], SEEK_SET) == -1) + fatal("d86f_write_tracks(): Error seeking to offset tbl[logical_track]\n"); + d86f_write_track(drive, f, side, d86f_handler[drive].encoded_data(drive, side), dev->track_surface_data[side]); + } + } } fdd_set_head(drive, fdd_side); } - void d86f_writeback(int drive) { d86f_t *dev = d86f[drive]; uint8_t header[32]; - int header_size, size; + int header_size, size; #ifdef D86F_COMPRESS uint32_t len; - int ret = 0; - FILE *cf; + int ret = 0; + FILE *cf; #endif header_size = d86f_header_size(drive); - if (! dev->f) return; + if (!dev->f) + return; /* First write the track offsets table. */ if (fseek(dev->f, 0, SEEK_SET) == -1) - fatal("86F write_back(): Error seeking to the beginning of the file\n"); + fatal("86F write_back(): Error seeking to the beginning of the file\n"); if (fread(header, 1, header_size, dev->f) != header_size) - fatal("86F write_back(): Error reading header size\n"); + fatal("86F write_back(): Error reading header size\n"); if (fseek(dev->f, 8, SEEK_SET) == -1) - fatal("86F write_back(): Error seeking\n"); + fatal("86F write_back(): Error seeking\n"); size = d86f_get_track_table_size(drive); if (fwrite(dev->track_offset, 1, size, dev->f) != size) - fatal("86F write_back(): Error writing data\n"); + fatal("86F write_back(): Error writing data\n"); d86f_write_tracks(drive, &dev->f, NULL); #ifdef D86F_COMPRESS if (dev->is_compressed) { - /* The image is compressed. */ + /* The image is compressed. */ - /* Open the original, compressed file. */ - cf = plat_fopen(dev->original_file_name, L"wb"); + /* Open the original, compressed file. */ + cf = plat_fopen(dev->original_file_name, L"wb"); - /* Write the header to the original file. */ - fwrite(header, 1, header_size, cf); + /* Write the header to the original file. */ + fwrite(header, 1, header_size, cf); - fseek(dev->f, 0, SEEK_END); - len = ftell(dev->f); - len -= header_size; + fseek(dev->f, 0, SEEK_END); + len = ftell(dev->f); + len -= header_size; - fseek(dev->f, header_size, SEEK_SET); + fseek(dev->f, header_size, SEEK_SET); - /* Compress data from the temporary uncompressed file to the original, compressed file. */ - dev->filebuf = (uint8_t *) malloc(len); - dev->outbuf = (uint8_t *) malloc(len - 1); - fread(dev->filebuf, 1, len, dev->f); - ret = lzf_compress(dev->filebuf, len, dev->outbuf, len - 1); + /* Compress data from the temporary uncompressed file to the original, compressed file. */ + dev->filebuf = (uint8_t *) malloc(len); + dev->outbuf = (uint8_t *) malloc(len - 1); + fread(dev->filebuf, 1, len, dev->f); + ret = lzf_compress(dev->filebuf, len, dev->outbuf, len - 1); - if (! ret) - d86f_log("86F: Error compressing file\n"); + if (!ret) + d86f_log("86F: Error compressing file\n"); - fwrite(dev->outbuf, 1, ret, cf); - free(dev->outbuf); - free(dev->filebuf); + fwrite(dev->outbuf, 1, ret, cf); + free(dev->outbuf); + free(dev->filebuf); } #endif } - void d86f_stop(int drive) { d86f_t *dev = d86f[drive]; if (dev) - dev->state = STATE_IDLE; + dev->state = STATE_IDLE; } - int d86f_common_command(int drive, int sector, int track, int side, int rate, int sector_size) { @@ -3199,258 +3136,250 @@ d86f_common_command(int drive, int sector, int track, int side, int rate, int se dev->req_sector.id.c = track; dev->req_sector.id.h = side; if (sector == SECTOR_FIRST) - dev->req_sector.id.r = 1; + dev->req_sector.id.r = 1; else if (sector == SECTOR_NEXT) - dev->req_sector.id.r++; + dev->req_sector.id.r++; else - dev->req_sector.id.r = sector; + dev->req_sector.id.r = sector; dev->req_sector.id.n = sector_size; if (fdd_get_head(drive) && (d86f_get_sides(drive) == 1)) { - fdc_noidam(d86f_fdc); - dev->state = STATE_IDLE; - dev->index_count = 0; - return 0; + fdc_noidam(d86f_fdc); + dev->state = STATE_IDLE; + dev->index_count = 0; + return 0; } dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = 0; dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; dev->index_count = dev->error_condition = dev->satisfying_bytes = 0; - dev->id_found = 0; - dev->dma_over = 0; + dev->id_found = 0; + dev->dma_over = 0; return 1; } - void d86f_readsector(int drive, int sector, int track, int side, int rate, int sector_size) { d86f_t *dev = d86f[drive]; - int ret = 0; + int ret = 0; ret = d86f_common_command(drive, sector, track, side, rate, sector_size); - if (! ret) - return; + if (!ret) + return; if (sector == SECTOR_FIRST) - dev->state = STATE_02_SPIN_TO_INDEX; + dev->state = STATE_02_SPIN_TO_INDEX; else if (sector == SECTOR_NEXT) - dev->state = STATE_02_FIND_ID; + dev->state = STATE_02_FIND_ID; else - dev->state = fdc_is_deleted(d86f_fdc) ? STATE_0C_FIND_ID : (fdc_is_verify(d86f_fdc) ? STATE_16_FIND_ID : STATE_06_FIND_ID); + dev->state = fdc_is_deleted(d86f_fdc) ? STATE_0C_FIND_ID : (fdc_is_verify(d86f_fdc) ? STATE_16_FIND_ID : STATE_06_FIND_ID); } - void d86f_writesector(int drive, int sector, int track, int side, int rate, int sector_size) { d86f_t *dev = d86f[drive]; - int ret = 0; + int ret = 0; if (writeprot[drive]) { - fdc_writeprotect(d86f_fdc); - dev->state = STATE_IDLE; - dev->index_count = 0; - return; + fdc_writeprotect(d86f_fdc); + dev->state = STATE_IDLE; + dev->index_count = 0; + return; } ret = d86f_common_command(drive, sector, track, side, rate, sector_size); - if (! ret) return; + if (!ret) + return; dev->state = fdc_is_deleted(d86f_fdc) ? STATE_09_FIND_ID : STATE_05_FIND_ID; } - void d86f_comparesector(int drive, int sector, int track, int side, int rate, int sector_size) { d86f_t *dev = d86f[drive]; - int ret = 0; + int ret = 0; ret = d86f_common_command(drive, sector, track, side, rate, sector_size); - if (! ret) return; + if (!ret) + return; dev->state = STATE_11_FIND_ID; } - void d86f_readaddress(int drive, int side, int rate) { d86f_t *dev = d86f[drive]; if (fdd_get_head(drive) && (d86f_get_sides(drive) == 1)) { - fdc_noidam(d86f_fdc); - dev->state = STATE_IDLE; - dev->index_count = 0; - return; + fdc_noidam(d86f_fdc); + dev->state = STATE_IDLE; + dev->index_count = 0; + return; } dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = 0; dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; dev->index_count = dev->error_condition = dev->satisfying_bytes = 0; - dev->id_found = 0; - dev->dma_over = 0; + dev->id_found = 0; + dev->dma_over = 0; dev->state = STATE_0A_FIND_ID; } - void d86f_add_track(int drive, int track, int side) { - d86f_t *dev = d86f[drive]; + d86f_t *dev = d86f[drive]; uint32_t array_size; - int logical_track; + int logical_track; array_size = d86f_get_array_size(drive, side, 0); if (d86f_get_sides(drive) == 2) { - logical_track = (track << 1) + side; + logical_track = (track << 1) + side; } else { - if (side) - return; - logical_track = track; + if (side) + return; + logical_track = track; } - if (! dev->track_offset[logical_track]) { - /* Track is absent from the file, let's add it. */ - dev->track_offset[logical_track] = dev->file_size; + if (!dev->track_offset[logical_track]) { + /* Track is absent from the file, let's add it. */ + dev->track_offset[logical_track] = dev->file_size; - dev->file_size += (array_size + 6); - if (d86f_has_extra_bit_cells(drive)) - dev->file_size += 4; - if (d86f_has_surface_desc(drive)) - dev->file_size += array_size; + dev->file_size += (array_size + 6); + if (d86f_has_extra_bit_cells(drive)) + dev->file_size += 4; + if (d86f_has_surface_desc(drive)) + dev->file_size += array_size; } } - void d86f_common_format(int drive, int side, int rate, uint8_t fill, int proxy) { - d86f_t *dev = d86f[drive]; - uint32_t i = 0; + d86f_t *dev = d86f[drive]; + uint32_t i = 0; uint16_t temp, temp2; uint32_t array_size; if (writeprot[drive]) { - fdc_writeprotect(d86f_fdc); - dev->state = STATE_IDLE; - dev->index_count = 0; - return; + fdc_writeprotect(d86f_fdc); + dev->state = STATE_IDLE; + dev->index_count = 0; + return; } - if (! d86f_can_format(drive)) { - fdc_cannotformat(d86f_fdc); - dev->state = STATE_IDLE; - dev->index_count = 0; - return; + if (!d86f_can_format(drive)) { + fdc_cannotformat(d86f_fdc); + dev->state = STATE_IDLE; + dev->index_count = 0; + return; } if (!side || (d86f_get_sides(drive) == 2)) { - if (! proxy) { - d86f_reset_index_hole_pos(drive, side); + if (!proxy) { + d86f_reset_index_hole_pos(drive, side); - if (dev->cur_track > 256) { - fdc_writeprotect(d86f_fdc); - dev->state = STATE_IDLE; - dev->index_count = 0; - return; - } + if (dev->cur_track > 256) { + fdc_writeprotect(d86f_fdc); + dev->state = STATE_IDLE; + dev->index_count = 0; + return; + } - array_size = d86f_get_array_size(drive, side, 0); + array_size = d86f_get_array_size(drive, side, 0); - if (d86f_has_surface_desc(drive)) { - /* Preserve the physical holes but get rid of the fuzzy bytes. */ - for (i = 0; i < array_size; i++) { - temp = dev->track_encoded_data[side][i] ^ 0xffff; - temp2 = dev->track_surface_data[side][i]; - temp &= temp2; - dev->track_surface_data[side][i] = temp; - } - } + if (d86f_has_surface_desc(drive)) { + /* Preserve the physical holes but get rid of the fuzzy bytes. */ + for (i = 0; i < array_size; i++) { + temp = dev->track_encoded_data[side][i] ^ 0xffff; + temp2 = dev->track_surface_data[side][i]; + temp &= temp2; + dev->track_surface_data[side][i] = temp; + } + } - /* Zero the data buffer. */ - memset(dev->track_encoded_data[side], 0, array_size); + /* Zero the data buffer. */ + memset(dev->track_encoded_data[side], 0, array_size); - d86f_add_track(drive, dev->cur_track, side); - if (! fdd_doublestep_40(drive)) - d86f_add_track(drive, dev->cur_track + 1, side); - } + d86f_add_track(drive, dev->cur_track, side); + if (!fdd_doublestep_40(drive)) + d86f_add_track(drive, dev->cur_track + 1, side); + } } - dev->fill = fill; + dev->fill = fill; - if (! proxy) { - dev->side_flags[side] = 0; - dev->side_flags[side] |= (fdd_getrpm(real_drive(d86f_fdc, drive)) == 360) ? 0x20 : 0; - dev->side_flags[side] |= fdc_get_bit_rate(d86f_fdc); - dev->side_flags[side] |= fdc_is_mfm(d86f_fdc) ? 8 : 0; + if (!proxy) { + dev->side_flags[side] = 0; + dev->side_flags[side] |= (fdd_getrpm(real_drive(d86f_fdc, drive)) == 360) ? 0x20 : 0; + dev->side_flags[side] |= fdc_get_bit_rate(d86f_fdc); + dev->side_flags[side] |= fdc_is_mfm(d86f_fdc) ? 8 : 0; - dev->index_hole_pos[side] = 0; + dev->index_hole_pos[side] = 0; } dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = 0; dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0; dev->index_count = dev->error_condition = dev->satisfying_bytes = dev->sector_count = 0; - dev->dma_over = 0; + dev->dma_over = 0; dev->state = STATE_0D_SPIN_TO_INDEX; } - void d86f_proxy_format(int drive, int side, int rate, uint8_t fill) { d86f_common_format(drive, side, rate, fill, 1); } - void d86f_format(int drive, int side, int rate, uint8_t fill) { d86f_common_format(drive, side, rate, fill, 0); } - void d86f_common_handlers(int drive) { - drives[drive].readsector = d86f_readsector; - drives[drive].writesector = d86f_writesector; - drives[drive].comparesector =d86f_comparesector; - drives[drive].readaddress = d86f_readaddress; - drives[drive].byteperiod = d86f_byteperiod; - drives[drive].poll = d86f_poll; - drives[drive].format = d86f_proxy_format; - drives[drive].stop = d86f_stop; + drives[drive].readsector = d86f_readsector; + drives[drive].writesector = d86f_writesector; + drives[drive].comparesector = d86f_comparesector; + drives[drive].readaddress = d86f_readaddress; + drives[drive].byteperiod = d86f_byteperiod; + drives[drive].poll = d86f_poll; + drives[drive].format = d86f_proxy_format; + drives[drive].stop = d86f_stop; } - int d86f_export(int drive, char *fn) { uint32_t tt[512]; - d86f_t *dev = d86f[drive]; - d86f_t *temp86; - FILE *f; - int tracks = 86; - int i; - int inc = 1; - uint32_t magic = 0x46423638; - uint16_t version = 0x020C; + d86f_t *dev = d86f[drive]; + d86f_t *temp86; + FILE *f; + int tracks = 86; + int i; + int inc = 1; + uint32_t magic = 0x46423638; + uint16_t version = 0x020C; uint16_t disk_flags = d86f_handler[drive].disk_flags(drive); memset(tt, 0, 512 * sizeof(uint32_t)); f = plat_fopen(fn, "wb"); if (!f) - return 0; + return 0; /* Allocate a temporary drive for conversion. */ - temp86 = (d86f_t *)malloc(sizeof(d86f_t)); + temp86 = (d86f_t *) malloc(sizeof(d86f_t)); memcpy(temp86, dev, sizeof(d86f_t)); fwrite(&magic, 4, 1, f); @@ -3462,15 +3391,15 @@ d86f_export(int drive, char *fn) /* In the case of a thick track drive, always increment track by two, since two tracks are going to get output at once. */ if (!fdd_doublestep_40(drive)) - inc = 2; + inc = 2; for (i = 0; i < tracks; i += inc) { - if (inc == 2) - fdd_do_seek(drive, i >> 1); - else - fdd_do_seek(drive, i); - dev->cur_track = i; - d86f_write_tracks(drive, &f, tt); + if (inc == 2) + fdd_do_seek(drive, i >> 1); + else + fdd_do_seek(drive, i); + dev->cur_track = i; + d86f_write_tracks(drive, &f, tt); } fclose(f); @@ -3491,18 +3420,17 @@ d86f_export(int drive, char *fn) return 1; } - void d86f_load(int drive, char *fn) { - d86f_t *dev = d86f[drive]; + d86f_t *dev = d86f[drive]; uint32_t magic = 0; - uint32_t len = 0; - int i = 0, j = 0; + uint32_t len = 0; + int i = 0, j = 0; #ifdef D86F_COMPRESS - char temp_file_name[2048]; + char temp_file_name[2048]; uint16_t temp = 0; - FILE *tf; + FILE *tf; #endif d86f_unregister(drive); @@ -3510,18 +3438,18 @@ d86f_load(int drive, char *fn) writeprot[drive] = 0; dev->f = plat_fopen(fn, "rb+"); - if (! dev->f) { - dev->f = plat_fopen(fn, "rb"); - if (! dev->f) { - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - free(dev); - return; - } - writeprot[drive] = 1; + if (!dev->f) { + dev->f = plat_fopen(fn, "rb"); + if (!dev->f) { + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + free(dev); + return; + } + writeprot[drive] = 1; } if (ui_writeprot[drive]) { - writeprot[drive] = 1; + writeprot[drive] = 1; } fwriteprot[drive] = writeprot[drive]; @@ -3532,54 +3460,54 @@ d86f_load(int drive, char *fn) (void) !fread(&magic, 4, 1, dev->f); if (len < 16) { - /* File is WAY too small, abort. */ - fclose(dev->f); - dev->f = NULL; - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - free(dev); - return; + /* File is WAY too small, abort. */ + fclose(dev->f); + dev->f = NULL; + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + free(dev); + return; } if ((magic != 0x46423638) && (magic != 0x66623638)) { - /* File is not of the valid format, abort. */ - d86f_log("86F: Unrecognized magic bytes: %08X\n", magic); - fclose(dev->f); - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - free(dev); - return; + /* File is not of the valid format, abort. */ + d86f_log("86F: Unrecognized magic bytes: %08X\n", magic); + fclose(dev->f); + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + free(dev); + return; } if (fread(&(dev->version), 1, 2, dev->f) != 2) - fatal("d86f_load(): Error reading format version\n"); + fatal("d86f_load(): Error reading format version\n"); if (dev->version != D86FVER) { - /* File is not of a recognized format version, abort. */ - if (dev->version == 0x0063) { - d86f_log("86F: File has emulator-internal version 0.99, this version is not valid in a file\n"); - } else if ((dev->version >= 0x0100) && (dev->version < D86FVER)) { - d86f_log("86F: No longer supported development file version: %i.%02i\n", dev->version >> 8, dev->version & 0xff); - } else { - d86f_log("86F: Unrecognized file version: %i.%02i\n", dev->version >> 8, dev->version & 0xff); - } - fclose(dev->f); - dev->f = NULL; - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - free(dev); - return; + /* File is not of a recognized format version, abort. */ + if (dev->version == 0x0063) { + d86f_log("86F: File has emulator-internal version 0.99, this version is not valid in a file\n"); + } else if ((dev->version >= 0x0100) && (dev->version < D86FVER)) { + d86f_log("86F: No longer supported development file version: %i.%02i\n", dev->version >> 8, dev->version & 0xff); + } else { + d86f_log("86F: Unrecognized file version: %i.%02i\n", dev->version >> 8, dev->version & 0xff); + } + fclose(dev->f); + dev->f = NULL; + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + free(dev); + return; } else { - d86f_log("86F: Recognized file version: %i.%02i\n", dev->version >> 8, dev->version & 0xff); + d86f_log("86F: Recognized file version: %i.%02i\n", dev->version >> 8, dev->version & 0xff); } (void) !fread(&(dev->disk_flags), 2, 1, dev->f); if (d86f_has_surface_desc(drive)) { - for (i = 0; i < 2; i++) - dev->track_surface_data[i] = (uint16_t *) malloc(53048 * sizeof(uint16_t)); + for (i = 0; i < 2; i++) + dev->track_surface_data[i] = (uint16_t *) malloc(53048 * sizeof(uint16_t)); - for (i = 0; i < 2; i++) { - for (j = 0; j < 2; j++) - dev->thin_track_surface_data[i][j] = (uint16_t *) malloc(53048 * sizeof(uint16_t)); - } + for (i = 0; i < 2; i++) { + for (j = 0; j < 2; j++) + dev->thin_track_surface_data[i][j] = (uint16_t *) malloc(53048 * sizeof(uint16_t)); + } } #ifdef D86F_COMPRESS @@ -3588,12 +3516,12 @@ d86f_load(int drive, char *fn) #else if (len < 51052) { #endif - /* File too small, abort. */ - fclose(dev->f); - dev->f = NULL; - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - free(dev); - return; + /* File too small, abort. */ + fclose(dev->f); + dev->f = NULL; + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + free(dev); + return; } #ifdef DO_CRC64 @@ -3607,111 +3535,111 @@ d86f_load(int drive, char *fn) dev->filebuf = malloc(len); fread(dev->filebuf, 1, len, dev->f); *(uint64_t *) &(dev->filebuf[8]) = 0xffffffffffffffff; - crc64 = (uint64_t) crc64speed(0, dev->filebuf, len); + crc64 = (uint64_t) crc64speed(0, dev->filebuf, len); free(dev->filebuf); if (crc64 != read_crc64) { - d86f_log("86F: CRC64 error\n"); - fclose(dev->f); - dev->f = NULL; - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - free(dev); - return; + d86f_log("86F: CRC64 error\n"); + fclose(dev->f); + dev->f = NULL; + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + free(dev); + return; } #endif #ifdef D86F_COMPRESS if (dev->is_compressed) { - memcpy(temp_file_name, drive ? nvr_path("TEMP$$$1.$$$") : nvr_path("TEMP$$$0.$$$"), 256); - memcpy(dev->original_file_name, fn, strlen(fn) + 1); + memcpy(temp_file_name, drive ? nvr_path("TEMP$$$1.$$$") : nvr_path("TEMP$$$0.$$$"), 256); + memcpy(dev->original_file_name, fn, strlen(fn) + 1); - fclose(dev->f); - dev->f = NULL; + fclose(dev->f); + dev->f = NULL; - dev->f = plat_fopen(temp_file_name, "wb"); - if (! dev->f) { - d86f_log("86F: Unable to create temporary decompressed file\n"); - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - free(dev); - return; - } + dev->f = plat_fopen(temp_file_name, "wb"); + if (!dev->f) { + d86f_log("86F: Unable to create temporary decompressed file\n"); + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + free(dev); + return; + } - tf = plat_fopen(fn, "rb"); + tf = plat_fopen(fn, "rb"); - for (i = 0; i < 8; i++) { - fread(&temp, 1, 2, tf); - fwrite(&temp, 1, 2, dev->f); - } + for (i = 0; i < 8; i++) { + fread(&temp, 1, 2, tf); + fwrite(&temp, 1, 2, dev->f); + } - dev->filebuf = (uint8_t *) malloc(len); - dev->outbuf = (uint8_t *) malloc(67108864); - fread(dev->filebuf, 1, len, tf); - temp = lzf_decompress(dev->filebuf, len, dev->outbuf, 67108864); - if (temp) { - fwrite(dev->outbuf, 1, temp, dev->f); - } - free(dev->outbuf); - free(dev->filebuf); + dev->filebuf = (uint8_t *) malloc(len); + dev->outbuf = (uint8_t *) malloc(67108864); + fread(dev->filebuf, 1, len, tf); + temp = lzf_decompress(dev->filebuf, len, dev->outbuf, 67108864); + if (temp) { + fwrite(dev->outbuf, 1, temp, dev->f); + } + free(dev->outbuf); + free(dev->filebuf); - fclose(tf); - fclose(dev->f); - dev->f = NULL; + fclose(tf); + fclose(dev->f); + dev->f = NULL; - if (! temp) { - d86f_log("86F: Error decompressing file\n"); - plat_remove(temp_file_name); - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - free(dev); - return; - } + if (!temp) { + d86f_log("86F: Error decompressing file\n"); + plat_remove(temp_file_name); + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + free(dev); + return; + } - dev->f = plat_fopen(temp_file_name, "rb+"); + dev->f = plat_fopen(temp_file_name, "rb+"); } #endif if (dev->disk_flags & 0x100) { - /* Zoned disk. */ - d86f_log("86F: Disk is zoned (Apple or Sony)\n"); - fclose(dev->f); - dev->f = NULL; + /* Zoned disk. */ + d86f_log("86F: Disk is zoned (Apple or Sony)\n"); + fclose(dev->f); + dev->f = NULL; #ifdef D86F_COMPRESS - if (dev->is_compressed) - plat_remove(temp_file_name); + if (dev->is_compressed) + plat_remove(temp_file_name); #endif - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - free(dev); - return; + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + free(dev); + return; } if (dev->disk_flags & 0x600) { - /* Zone type is not 0 but the disk is fixed-RPM. */ - d86f_log("86F: Disk is fixed-RPM but zone type is not 0\n"); - fclose(dev->f); - dev->f = NULL; + /* Zone type is not 0 but the disk is fixed-RPM. */ + d86f_log("86F: Disk is fixed-RPM but zone type is not 0\n"); + fclose(dev->f); + dev->f = NULL; #ifdef D86F_COMPRESS - if (dev->is_compressed) - plat_remove(temp_file_name); + if (dev->is_compressed) + plat_remove(temp_file_name); #endif - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - free(dev); - return; + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + free(dev); + return; } if (!writeprot[drive]) { - writeprot[drive] = (dev->disk_flags & 0x10) ? 1 : 0; - fwriteprot[drive] = writeprot[drive]; + writeprot[drive] = (dev->disk_flags & 0x10) ? 1 : 0; + fwriteprot[drive] = writeprot[drive]; } if (writeprot[drive]) { - fclose(dev->f); - dev->f = NULL; + fclose(dev->f); + dev->f = NULL; #ifdef D86F_COMPRESS - if (dev->is_compressed) - dev->f = plat_fopen(temp_file_name, "rb"); - else + if (dev->is_compressed) + dev->f = plat_fopen(temp_file_name, "rb"); + else #endif - dev->f = plat_fopen(fn, "rb"); + dev->f = plat_fopen(fn, "rb"); } /* OK, set the drive data, other code needs it. */ @@ -3721,77 +3649,81 @@ d86f_load(int drive, char *fn) (void) !fread(dev->track_offset, 1, d86f_get_track_table_size(drive), dev->f); - if (! (dev->track_offset[0])) { - /* File has no track 0 side 0, abort. */ - d86f_log("86F: No Track 0 side 0\n"); - fclose(dev->f); - dev->f = NULL; - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - free(dev); - d86f[drive] = NULL; - return; + if (!(dev->track_offset[0])) { + /* File has no track 0 side 0, abort. */ + d86f_log("86F: No Track 0 side 0\n"); + fclose(dev->f); + dev->f = NULL; + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + free(dev); + d86f[drive] = NULL; + return; } if ((d86f_get_sides(drive) == 2) && !(dev->track_offset[1])) { - /* File is 2-sided but has no track 0 side 1, abort. */ - d86f_log("86F: No Track 0 side 1\n"); - fclose(dev->f); - dev->f = NULL; - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - free(dev); - d86f[drive] = NULL; - return; + /* File is 2-sided but has no track 0 side 1, abort. */ + d86f_log("86F: No Track 0 side 1\n"); + fclose(dev->f); + dev->f = NULL; + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + free(dev); + d86f[drive] = NULL; + return; } /* Load track 0 flags as default. */ if (fseek(dev->f, dev->track_offset[0], SEEK_SET) == -1) - fatal("d86f_load(): Track 0: Error seeking to the beginning of the file\n"); + fatal("d86f_load(): Track 0: Error seeking to the beginning of the file\n"); if (fread(&(dev->side_flags[0]), 1, 2, dev->f) != 2) - fatal("d86f_load(): Track 0: Error reading side flags\n"); + fatal("d86f_load(): Track 0: Error reading side flags\n"); if (dev->disk_flags & 0x80) { - if (fread(&(dev->extra_bit_cells[0]), 1, 4, dev->f) != 4) - fatal("d86f_load(): Track 0: Error reading the amount of extra bit cells\n"); - if ((dev->disk_flags & 0x1060) != 0x1000) { - if (dev->extra_bit_cells[0] < -32768) dev->extra_bit_cells[0] = -32768; - if (dev->extra_bit_cells[0] > 32768) dev->extra_bit_cells[0] = 32768; - } + if (fread(&(dev->extra_bit_cells[0]), 1, 4, dev->f) != 4) + fatal("d86f_load(): Track 0: Error reading the amount of extra bit cells\n"); + if ((dev->disk_flags & 0x1060) != 0x1000) { + if (dev->extra_bit_cells[0] < -32768) + dev->extra_bit_cells[0] = -32768; + if (dev->extra_bit_cells[0] > 32768) + dev->extra_bit_cells[0] = 32768; + } } else { - dev->extra_bit_cells[0] = 0; + dev->extra_bit_cells[0] = 0; } if (d86f_get_sides(drive) == 2) { - if (fseek(dev->f, dev->track_offset[1], SEEK_SET) == -1) - fatal("d86f_load(): Track 1: Error seeking to the beginning of the file\n"); - if (fread(&(dev->side_flags[1]), 1, 2, dev->f) != 2) - fatal("d86f_load(): Track 1: Error reading side flags\n"); - if (dev->disk_flags & 0x80) { - if (fread(&(dev->extra_bit_cells[1]), 1, 4, dev->f) != 4) - fatal("d86f_load(): Track 4: Error reading the amount of extra bit cells\n"); - if ((dev->disk_flags & 0x1060) != 0x1000) { - if (dev->extra_bit_cells[1] < -32768) dev->extra_bit_cells[1] = -32768; - if (dev->extra_bit_cells[1] > 32768) dev->extra_bit_cells[1] = 32768; - } - } else { - dev->extra_bit_cells[1] = 0; - } + if (fseek(dev->f, dev->track_offset[1], SEEK_SET) == -1) + fatal("d86f_load(): Track 1: Error seeking to the beginning of the file\n"); + if (fread(&(dev->side_flags[1]), 1, 2, dev->f) != 2) + fatal("d86f_load(): Track 1: Error reading side flags\n"); + if (dev->disk_flags & 0x80) { + if (fread(&(dev->extra_bit_cells[1]), 1, 4, dev->f) != 4) + fatal("d86f_load(): Track 4: Error reading the amount of extra bit cells\n"); + if ((dev->disk_flags & 0x1060) != 0x1000) { + if (dev->extra_bit_cells[1] < -32768) + dev->extra_bit_cells[1] = -32768; + if (dev->extra_bit_cells[1] > 32768) + dev->extra_bit_cells[1] = 32768; + } + } else { + dev->extra_bit_cells[1] = 0; + } } else { - switch ((dev->disk_flags >> 1) >> 3) { - case 0: - default: - dev->side_flags[1] = 0x0a; - break; + switch ((dev->disk_flags >> 1) >> 3) { + case 0: + default: + dev->side_flags[1] = 0x0a; + break; - case 1: - dev->side_flags[1] = 0x00; - break; + case 1: + dev->side_flags[1] = 0x00; + break; - case 2: - case 3: - dev->side_flags[1] = 0x03; - break; - } + case 2: + case 3: + dev->side_flags[1] = 0x03; + break; + } - dev->extra_bit_cells[1] = 0; + dev->extra_bit_cells[1] = 0; } fseek(dev->f, 0, SEEK_END); @@ -3807,15 +3739,14 @@ d86f_load(int drive, char *fn) #ifdef D86F_COMPRESS d86f_log("86F: Disk is %scompressed and does%s have surface description data\n", - dev->is_compressed ? "" : "not ", - d86f_has_surface_desc(drive) ? "" : " not"); + dev->is_compressed ? "" : "not ", + d86f_has_surface_desc(drive) ? "" : " not"); #else d86f_log("86F: Disk does%s have surface description data\n", - d86f_has_surface_desc(drive) ? "" : " not"); + d86f_has_surface_desc(drive) ? "" : " not"); #endif } - void d86f_init(void) { @@ -3824,59 +3755,57 @@ d86f_init(void) setup_crc(0x1021); for (i = 0; i < FDD_NUM; i++) - d86f[i] = NULL; + d86f[i] = NULL; } - void d86f_set_fdc(void *fdc) { d86f_fdc = (fdc_t *) fdc; } - void d86f_close(int drive) { int i, j; - char temp_file_name[2048]; + char temp_file_name[2048]; d86f_t *dev = d86f[drive]; /* Make sure the drive is alive. */ - if (dev == NULL) return; + if (dev == NULL) + return; memcpy(temp_file_name, drive ? nvr_path("TEMP$$$1.$$$") : nvr_path("TEMP$$$0.$$$"), 26); if (d86f_has_surface_desc(drive)) { - for (i = 0; i < 2; i++) { - if (dev->track_surface_data[i]) { - free(dev->track_surface_data[i]); - dev->track_surface_data[i] = NULL; - } - } + for (i = 0; i < 2; i++) { + if (dev->track_surface_data[i]) { + free(dev->track_surface_data[i]); + dev->track_surface_data[i] = NULL; + } + } - for (i = 0; i < 2; i++) { - for (j = 0; j < 2; j++) { - if (dev->thin_track_surface_data[i][j]) { - free(dev->thin_track_surface_data[i][j]); - dev->thin_track_surface_data[i][j] = NULL; - } - } - } + for (i = 0; i < 2; i++) { + for (j = 0; j < 2; j++) { + if (dev->thin_track_surface_data[i][j]) { + free(dev->thin_track_surface_data[i][j]); + dev->thin_track_surface_data[i][j] = NULL; + } + } + } } if (dev->f) { - fclose(dev->f); - dev->f = NULL; + fclose(dev->f); + dev->f = NULL; } #ifdef D86F_COMPRESS if (dev->is_compressed) - plat_remove(temp_file_name); + plat_remove(temp_file_name); #endif } - /* When an FDD is mounted, set up the D86F data structures. */ void d86f_setup(int drive) @@ -3884,7 +3813,7 @@ d86f_setup(int drive) d86f_t *dev; /* Allocate a drive structure. */ - dev = (d86f_t *)malloc(sizeof(d86f_t)); + dev = (d86f_t *) malloc(sizeof(d86f_t)); memset(dev, 0x00, sizeof(d86f_t)); dev->state = STATE_IDLE; @@ -3895,7 +3824,6 @@ d86f_setup(int drive) d86f[drive] = dev; } - /* If an FDD is unmounted, unlink the D86F data structures. */ void d86f_destroy(int drive) @@ -3904,24 +3832,25 @@ d86f_destroy(int drive) d86f_t *dev = d86f[drive]; - if (dev == NULL) return; + if (dev == NULL) + return; if (d86f_has_surface_desc(drive)) { - for (i = 0; i < 2; i++) { - if (dev->track_surface_data[i]) { - free(dev->track_surface_data[i]); - dev->track_surface_data[i] = NULL; - } - } + for (i = 0; i < 2; i++) { + if (dev->track_surface_data[i]) { + free(dev->track_surface_data[i]); + dev->track_surface_data[i] = NULL; + } + } - for (i = 0; i < 2; i++) { - for (j = 0; j < 2; j++) { - if (dev->thin_track_surface_data[i][j]) { - free(dev->thin_track_surface_data[i][j]); - dev->thin_track_surface_data[i][j] = NULL; - } - } - } + for (i = 0; i < 2; i++) { + for (j = 0; j < 2; j++) { + if (dev->thin_track_surface_data[i][j]) { + free(dev->thin_track_surface_data[i][j]); + dev->thin_track_surface_data[i][j] = NULL; + } + } + } } d86f_destroy_linked_lists(drive, 0); diff --git a/src/floppy/fdd_common.c b/src/floppy/fdd_common.c index 4536a8683..97f9393ea 100644 --- a/src/floppy/fdd_common.c +++ b/src/floppy/fdd_common.c @@ -24,7 +24,6 @@ #include <86box/fdd.h> #include <86box/fdd_common.h> - const uint8_t fdd_holes[6] = { 0, 0, 0, 1, 1, 2 }; const uint8_t fdd_rates[6] = { 2, 2, 1, 4, 0, 3 }; @@ -59,11 +58,10 @@ const uint8_t fdd_max_sectors[8][6] = { { 0, 0, 0, 0, 0, 1 } /* 16384 */ }; -const uint8_t fdd_dmf_r[21] = { - 12,2,13,3,14,4,15,5,16,6,17,7,18,8,19,9,20,10,21,11,1 +const uint8_t fdd_dmf_r[21] = { + 12, 2, 13, 3, 14, 4, 15, 5, 16, 6, 17, 7, 18, 8, 19, 9, 20, 10, 21, 11, 1 }; - static const uint8_t fdd_gap3_sizes[5][8][48] = { { { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* [0][0] */ @@ -347,95 +345,90 @@ static const uint8_t fdd_gap3_sizes[5][8][48] = { } }; - int fdd_get_gap3_size(int rate, int size, int sector) { - return(fdd_gap3_sizes[rate][size][sector]); + return (fdd_gap3_sizes[rate][size][sector]); } - uint8_t fdd_sector_size_code(int size) { int ret = 2; - switch(size) { - case 128: - ret = 0; - break; + switch (size) { + case 128: + ret = 0; + break; - case 256: - ret = 1; - break; + case 256: + ret = 1; + break; - case 512: - ret = 2; - break; + case 512: + ret = 2; + break; - case 1024: - ret = 3; - break; + case 1024: + ret = 3; + break; - case 2048: - ret = 4; - break; + case 2048: + ret = 4; + break; - case 4096: - ret = 5; - break; + case 4096: + ret = 5; + break; - case 8192: - ret = 6; - break; + case 8192: + ret = 6; + break; - case 16384: - ret = 7; - break; + case 16384: + ret = 7; + break; - default: - break; + default: + break; } - return(ret); + return (ret); } - int fdd_sector_code_size(uint8_t code) { - return(128 << code); + return (128 << code); } - int fdd_bps_valid(uint16_t bps) { int i; - for (i=0; i<=8; i++) { - if (bps == (128 << i)) { - return 1; - } + for (i = 0; i <= 8; i++) { + if (bps == (128 << i)) { + return 1; + } } - return(0); + return (0); } - int fdd_interleave(int sector, int skew, int spt) { - uint32_t add = (spt & 1); + uint32_t add = (spt & 1); uint32_t adjust = (spt >> 1); uint32_t adjusted_r; uint32_t skewed_i; - skewed_i = (sector + skew) % spt; + skewed_i = (sector + skew) % spt; adjusted_r = (skewed_i >> 1) + 1; if (skewed_i & 1) { - adjusted_r += (adjust + add); + adjusted_r += (adjust + add); } - return(adjusted_r); + return (adjusted_r); } diff --git a/src/floppy/fdd_fdi.c b/src/floppy/fdd_fdi.c index 897fcfcdf..ae5a0140d 100644 --- a/src/floppy/fdd_fdi.c +++ b/src/floppy/fdd_fdi.c @@ -36,73 +36,67 @@ #include <86box/fdc.h> #include - typedef struct { - FILE *f; - FDI *h; + FILE *f; + FDI *h; - int lasttrack; - int sides; - int track; - int tracklen[2][4]; - int trackindex[2][4]; + int lasttrack; + int sides; + int track; + int tracklen[2][4]; + int trackindex[2][4]; - uint8_t track_data[2][4][256*1024]; - uint8_t track_timing[2][4][256*1024]; + uint8_t track_data[2][4][256 * 1024]; + uint8_t track_timing[2][4][256 * 1024]; } fdi_t; - -static fdi_t *fdi[FDD_NUM]; -static fdc_t *fdi_fdc; - +static fdi_t *fdi[FDD_NUM]; +static fdc_t *fdi_fdc; #ifdef ENABLE_FDI_LOG int fdi_do_log = ENABLE_FDI_LOG; - static void fdi_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (fdi_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (fdi_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define fdi_log(fmt, ...) +# define fdi_log(fmt, ...) #endif - static uint16_t disk_flags(int drive) { - fdi_t *dev = fdi[drive]; - uint16_t temp_disk_flags = 0x80; /* We ALWAYS claim to have extra bit cells, even if the actual amount is 0. */ + fdi_t *dev = fdi[drive]; + uint16_t temp_disk_flags = 0x80; /* We ALWAYS claim to have extra bit cells, even if the actual amount is 0. */ switch (fdi2raw_get_bit_rate(dev->h)) { - case 500: - temp_disk_flags |= 2; - break; + case 500: + temp_disk_flags |= 2; + break; - case 300: - case 250: - temp_disk_flags |= 0; - break; + case 300: + case 250: + temp_disk_flags |= 0; + break; - case 1000: - temp_disk_flags |= 4; - break; + case 1000: + temp_disk_flags |= 4; + break; - default: - temp_disk_flags |= 0; + default: + temp_disk_flags |= 0; } if (dev->sides == 2) - temp_disk_flags |= 8; + temp_disk_flags |= 8; /* * Tell the 86F handler that we will handle our @@ -110,39 +104,38 @@ disk_flags(int drive) */ temp_disk_flags |= 0x800; - return(temp_disk_flags); + return (temp_disk_flags); } - static uint16_t side_flags(int drive) { - fdi_t *dev = fdi[drive]; + fdi_t *dev = fdi[drive]; uint16_t temp_side_flags = 0; switch (fdi2raw_get_bit_rate(dev->h)) { - case 500: - temp_side_flags = 0; - break; + case 500: + temp_side_flags = 0; + break; - case 300: - temp_side_flags = 1; - break; + case 300: + temp_side_flags = 1; + break; - case 250: - temp_side_flags = 2; - break; + case 250: + temp_side_flags = 2; + break; - case 1000: - temp_side_flags = 3; - break; + case 1000: + temp_side_flags = 3; + break; - default: - temp_side_flags = 2; + default: + temp_side_flags = 2; } if (fdi2raw_get_rotation(dev->h) == 360) - temp_side_flags |= 0x20; + temp_side_flags |= 0x20; /* * Set the encoding value to match that provided by the FDC. @@ -150,163 +143,158 @@ side_flags(int drive) */ temp_side_flags |= 0x08; - return(temp_side_flags); + return (temp_side_flags); } - static int fdi_density(void) { - if (! fdc_is_mfm(fdi_fdc)) return(0); + if (!fdc_is_mfm(fdi_fdc)) + return (0); switch (fdc_get_bit_rate(fdi_fdc)) { - case 0: - return(2); + case 0: + return (2); - case 1: - return(1); + case 1: + return (1); - case 2: - return(1); + case 2: + return (1); - case 3: - case 5: - return(3); + case 3: + case 5: + return (3); - default: - break; + default: + break; } - return(1); + return (1); } - static int32_t extra_bit_cells(int drive, int side) { - fdi_t *dev = fdi[drive]; - int density = 0; - int raw_size = 0; - int is_300_rpm = 0; + fdi_t *dev = fdi[drive]; + int density = 0; + int raw_size = 0; + int is_300_rpm = 0; density = fdi_density(); is_300_rpm = (fdd_getrpm(drive) == 300); switch (fdc_get_bit_rate(fdi_fdc)) { - case 0: - raw_size = is_300_rpm ? 200000 : 166666; - break; + case 0: + raw_size = is_300_rpm ? 200000 : 166666; + break; - case 1: - raw_size = is_300_rpm ? 120000 : 100000; - break; + case 1: + raw_size = is_300_rpm ? 120000 : 100000; + break; - case 2: - raw_size = is_300_rpm ? 100000 : 83333; - break; + case 2: + raw_size = is_300_rpm ? 100000 : 83333; + break; - case 3: - case 5: - raw_size = is_300_rpm ? 400000 : 333333; - break; + case 3: + case 5: + raw_size = is_300_rpm ? 400000 : 333333; + break; - default: - raw_size = is_300_rpm ? 100000 : 83333; + default: + raw_size = is_300_rpm ? 100000 : 83333; } - return((dev->tracklen[side][density] - raw_size)); + return ((dev->tracklen[side][density] - raw_size)); } - static void read_revolution(int drive) { fdi_t *dev = fdi[drive]; - int c, den, side; - int track = dev->track; + int c, den, side; + int track = dev->track; if (track > dev->lasttrack) { - for (den = 0; den < 4; den++) { - memset(dev->track_data[0][den], 0, 106096); - memset(dev->track_data[1][den], 0, 106096); - dev->tracklen[0][den] = dev->tracklen[1][den] = 100000; - } - return; + for (den = 0; den < 4; den++) { + memset(dev->track_data[0][den], 0, 106096); + memset(dev->track_data[1][den], 0, 106096); + dev->tracklen[0][den] = dev->tracklen[1][den] = 100000; + } + return; } for (den = 0; den < 4; den++) { - for (side = 0; side < dev->sides; side++) { - c = fdi2raw_loadtrack(dev->h, - (uint16_t *)dev->track_data[side][den], - (uint16_t *)dev->track_timing[side][den], - (track * dev->sides) + side, - &dev->tracklen[side][den], - &dev->trackindex[side][den], NULL, den); - if (! c) - memset(dev->track_data[side][den], 0, dev->tracklen[side][den]); - } + for (side = 0; side < dev->sides; side++) { + c = fdi2raw_loadtrack(dev->h, + (uint16_t *) dev->track_data[side][den], + (uint16_t *) dev->track_timing[side][den], + (track * dev->sides) + side, + &dev->tracklen[side][den], + &dev->trackindex[side][den], NULL, den); + if (!c) + memset(dev->track_data[side][den], 0, dev->tracklen[side][den]); + } - if (dev->sides == 1) { - memset(dev->track_data[1][den], 0, 106096); - dev->tracklen[1][den] = 100000; - } + if (dev->sides == 1) { + memset(dev->track_data[1][den], 0, 106096); + dev->tracklen[1][den] = 100000; + } } } - static uint32_t index_hole_pos(int drive, int side) { fdi_t *dev = fdi[drive]; - int density; + int density; density = fdi_density(); - return(dev->trackindex[side][density]); + return (dev->trackindex[side][density]); } - static uint32_t get_raw_size(int drive, int side) { fdi_t *dev = fdi[drive]; - int density; + int density; density = fdi_density(); - return(dev->tracklen[side][density]); + return (dev->tracklen[side][density]); } - static uint16_t * encoded_data(int drive, int side) { - fdi_t *dev = fdi[drive]; - int density = 0; + fdi_t *dev = fdi[drive]; + int density = 0; density = fdi_density(); - return((uint16_t *)dev->track_data[side][density]); + return ((uint16_t *) dev->track_data[side][density]); } - void fdi_seek(int drive, int track) { fdi_t *dev = fdi[drive]; if (fdd_doublestep_40(drive)) { - if (fdi2raw_get_tpi(dev->h) < 2) - track /= 2; + if (fdi2raw_get_tpi(dev->h) < 2) + track /= 2; } d86f_set_cur_track(drive, track); - if (dev->f == NULL) return; + if (dev->f == NULL) + return; if (track < 0) - track = 0; + track = 0; #if 0 if (track > dev->lasttrack) @@ -318,21 +306,20 @@ fdi_seek(int drive, int track) read_revolution(drive); } - void fdi_load(int drive, char *fn) { - char header[26]; + char header[26]; fdi_t *dev; writeprot[drive] = fwriteprot[drive] = 1; /* Allocate a drive block. */ - dev = (fdi_t *)malloc(sizeof(fdi_t)); + dev = (fdi_t *) malloc(sizeof(fdi_t)); if (dev == NULL) { - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - return; + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + return; } memset(dev, 0x00, sizeof(fdi_t)); @@ -341,39 +328,39 @@ fdi_load(int drive, char *fn) dev->f = plat_fopen(fn, "rb"); if (fread(header, 1, 25, dev->f) != 25) - fatal("fdi_load(): Error reading header\n"); + fatal("fdi_load(): Error reading header\n"); if (fseek(dev->f, 0, SEEK_SET) == -1) - fatal("fdi_load(): Error seeking to the beginning of the file\n"); + fatal("fdi_load(): Error seeking to the beginning of the file\n"); header[25] = 0; if (strcmp(header, "Formatted Disk Image file") != 0) { - /* This is a Japanese FDI file. */ - fdi_log("fdi_load(): Japanese FDI file detected, redirecting to IMG loader\n"); - fclose(dev->f); - free(dev); - img_load(drive, fn); - return; + /* This is a Japanese FDI file. */ + fdi_log("fdi_load(): Japanese FDI file detected, redirecting to IMG loader\n"); + fclose(dev->f); + free(dev); + img_load(drive, fn); + return; } /* Set up the drive unit. */ fdi[drive] = dev; - dev->h = fdi2raw_header(dev->f); + dev->h = fdi2raw_header(dev->f); dev->lasttrack = fdi2raw_get_last_track(dev->h); - dev->sides = fdi2raw_get_last_head(dev->h) + 1; + dev->sides = fdi2raw_get_last_head(dev->h) + 1; /* Attach this format to the D86F engine. */ - d86f_handler[drive].disk_flags = disk_flags; - d86f_handler[drive].side_flags = side_flags; - d86f_handler[drive].writeback = null_writeback; - d86f_handler[drive].set_sector = null_set_sector; - d86f_handler[drive].write_data = null_write_data; + d86f_handler[drive].disk_flags = disk_flags; + d86f_handler[drive].side_flags = side_flags; + d86f_handler[drive].writeback = null_writeback; + d86f_handler[drive].set_sector = null_set_sector; + d86f_handler[drive].write_data = null_write_data; d86f_handler[drive].format_conditions = null_format_conditions; - d86f_handler[drive].extra_bit_cells = extra_bit_cells; - d86f_handler[drive].encoded_data = encoded_data; - d86f_handler[drive].read_revolution = read_revolution; - d86f_handler[drive].index_hole_pos = index_hole_pos; - d86f_handler[drive].get_raw_size = get_raw_size; - d86f_handler[drive].check_crc = 1; + d86f_handler[drive].extra_bit_cells = extra_bit_cells; + d86f_handler[drive].encoded_data = encoded_data; + d86f_handler[drive].read_revolution = read_revolution; + d86f_handler[drive].index_hole_pos = index_hole_pos; + d86f_handler[drive].get_raw_size = get_raw_size; + d86f_handler[drive].check_crc = 1; d86f_set_version(drive, D86FVER); d86f_common_handlers(drive); @@ -383,32 +370,31 @@ fdi_load(int drive, char *fn) fdi_log("Loaded as FDI\n"); } - void fdi_close(int drive) { fdi_t *dev = fdi[drive]; - if (dev == NULL) return; + if (dev == NULL) + return; d86f_unregister(drive); drives[drive].seek = NULL; if (dev->h) - fdi2raw_header_free(dev->h); + fdi2raw_header_free(dev->h); if (dev->f) - fclose(dev->f); + fclose(dev->f); /* Release the memory. */ free(dev); fdi[drive] = NULL; } - void fdi_set_fdc(void *fdc) { - fdi_fdc = (fdc_t *)fdc; + fdi_fdc = (fdc_t *) fdc; } diff --git a/src/floppy/fdd_imd.c b/src/floppy/fdd_imd.c index cd76e6204..d193efb7f 100644 --- a/src/floppy/fdd_imd.c +++ b/src/floppy/fdd_imd.c @@ -31,285 +31,283 @@ #include <86box/fdd_imd.h> #include <86box/fdc.h> - typedef struct { - uint8_t is_present; - uint32_t file_offs; - uint8_t params[5]; - uint32_t r_map_offs; - uint32_t c_map_offs; - uint32_t h_map_offs; - uint32_t n_map_offs; - uint32_t data_offs; - uint32_t sector_data_offs[255]; - uint32_t sector_data_size[255]; - uint32_t gap3_len; - uint16_t side_flags; - uint8_t max_sector_size; + uint8_t is_present; + uint32_t file_offs; + uint8_t params[5]; + uint32_t r_map_offs; + uint32_t c_map_offs; + uint32_t h_map_offs; + uint32_t n_map_offs; + uint32_t data_offs; + uint32_t sector_data_offs[255]; + uint32_t sector_data_size[255]; + uint32_t gap3_len; + uint16_t side_flags; + uint8_t max_sector_size; } imd_track_t; typedef struct { - FILE *f; - char *buffer; - uint32_t start_offs; - int track_count, sides; - int track; - uint16_t disk_flags; - int track_width; - imd_track_t tracks[256][2]; - uint16_t current_side_flags[2]; - uint8_t xdf_ordered_pos[256][2]; - uint8_t interleave_ordered_pos[256][2]; - char *current_data[2]; - uint8_t track_buffer[2][25000]; + FILE *f; + char *buffer; + uint32_t start_offs; + int track_count, sides; + int track; + uint16_t disk_flags; + int track_width; + imd_track_t tracks[256][2]; + uint16_t current_side_flags[2]; + uint8_t xdf_ordered_pos[256][2]; + uint8_t interleave_ordered_pos[256][2]; + char *current_data[2]; + uint8_t track_buffer[2][25000]; } imd_t; - -static imd_t *imd[FDD_NUM]; -static fdc_t *imd_fdc; - +static imd_t *imd[FDD_NUM]; +static fdc_t *imd_fdc; #ifdef ENABLE_IMD_LOG int imd_do_log = ENABLE_IMD_LOG; - static void imd_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (imd_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (imd_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define imd_log(fmt, ...) +# define imd_log(fmt, ...) #endif - static uint32_t get_raw_tsize(int side_flags, int slower_rpm) { uint32_t size; - switch(side_flags & 0x27) { - case 0x22: - size = slower_rpm ? 5314 : 5208; - break; + switch (side_flags & 0x27) { + case 0x22: + size = slower_rpm ? 5314 : 5208; + break; - default: - case 0x02: - case 0x21: - size = slower_rpm ? 6375 : 6250; - break; + default: + case 0x02: + case 0x21: + size = slower_rpm ? 6375 : 6250; + break; - case 0x01: - size = slower_rpm ? 7650 : 7500; - break; + case 0x01: + size = slower_rpm ? 7650 : 7500; + break; - case 0x20: - size = slower_rpm ? 10629 : 10416; - break; + case 0x20: + size = slower_rpm ? 10629 : 10416; + break; - case 0x00: - size = slower_rpm ? 12750 : 12500; - break; + case 0x00: + size = slower_rpm ? 12750 : 12500; + break; - case 0x23: - size = slower_rpm ? 21258 : 20833; - break; + case 0x23: + size = slower_rpm ? 21258 : 20833; + break; - case 0x03: - size = slower_rpm ? 25500 : 25000; - break; + case 0x03: + size = slower_rpm ? 25500 : 25000; + break; - case 0x25: - size = slower_rpm ? 42517 : 41666; - break; + case 0x25: + size = slower_rpm ? 42517 : 41666; + break; - case 0x05: - size = slower_rpm ? 51000 : 50000; - break; + case 0x05: + size = slower_rpm ? 51000 : 50000; + break; } - return(size); + return (size); } - static int track_is_xdf(int drive, int side, int track) { - imd_t *dev = imd[drive]; - int i, effective_sectors, xdf_sectors; - int high_sectors, low_sectors; - int max_high_id, expected_high_count, expected_low_count; + imd_t *dev = imd[drive]; + int i, effective_sectors, xdf_sectors; + int high_sectors, low_sectors; + int max_high_id, expected_high_count, expected_low_count; uint8_t *r_map; uint8_t *n_map; effective_sectors = xdf_sectors = high_sectors = low_sectors = 0; for (i = 0; i < 256; i++) - dev->xdf_ordered_pos[i][side] = 0; + dev->xdf_ordered_pos[i][side] = 0; - if (dev->tracks[track][side].params[2] & 0xC0) return(0); + if (dev->tracks[track][side].params[2] & 0xC0) + return (0); - if ((dev->tracks[track][side].params[3] != 16) && - (dev->tracks[track][side].params[3] != 19)) return(0); + if ((dev->tracks[track][side].params[3] != 16) && (dev->tracks[track][side].params[3] != 19)) + return (0); - r_map = (uint8_t *)(dev->buffer + dev->tracks[track][side].r_map_offs); + r_map = (uint8_t *) (dev->buffer + dev->tracks[track][side].r_map_offs); - if (! track) { - if (dev->tracks[track][side].params[4] != 2) return(0); + if (!track) { + if (dev->tracks[track][side].params[4] != 2) + return (0); - if (! side) { - max_high_id = (dev->tracks[track][side].params[3] == 19) ? 0x8B : 0x88; - expected_high_count = (dev->tracks[track][side].params[3] == 19) ? 0x0B : 0x08; - expected_low_count = 8; - } else { - max_high_id = (dev->tracks[track][side].params[3] == 19) ? 0x93 : 0x90; - expected_high_count = (dev->tracks[track][side].params[3] == 19) ? 0x13 : 0x10; - expected_low_count = 0; - } + if (!side) { + max_high_id = (dev->tracks[track][side].params[3] == 19) ? 0x8B : 0x88; + expected_high_count = (dev->tracks[track][side].params[3] == 19) ? 0x0B : 0x08; + expected_low_count = 8; + } else { + max_high_id = (dev->tracks[track][side].params[3] == 19) ? 0x93 : 0x90; + expected_high_count = (dev->tracks[track][side].params[3] == 19) ? 0x13 : 0x10; + expected_low_count = 0; + } - for (i = 0; i < dev->tracks[track][side].params[3]; i++) { - if ((r_map[i] >= 0x81) && (r_map[i] <= max_high_id)) { - high_sectors++; - dev->xdf_ordered_pos[(int) r_map[i]][side] = i; - } - if ((r_map[i] >= 0x01) && (r_map[i] <= 0x08)) { - low_sectors++; - dev->xdf_ordered_pos[(int) r_map[i]][side] = i; - } - if ((high_sectors == expected_high_count) && (low_sectors == expected_low_count)) { - dev->current_side_flags[side] = (dev->tracks[track][side].params[3] == 19) ? 0x08 : 0x28; - return((dev->tracks[track][side].params[3] == 19) ? 2 : 1); - } - } - return(0); + for (i = 0; i < dev->tracks[track][side].params[3]; i++) { + if ((r_map[i] >= 0x81) && (r_map[i] <= max_high_id)) { + high_sectors++; + dev->xdf_ordered_pos[(int) r_map[i]][side] = i; + } + if ((r_map[i] >= 0x01) && (r_map[i] <= 0x08)) { + low_sectors++; + dev->xdf_ordered_pos[(int) r_map[i]][side] = i; + } + if ((high_sectors == expected_high_count) && (low_sectors == expected_low_count)) { + dev->current_side_flags[side] = (dev->tracks[track][side].params[3] == 19) ? 0x08 : 0x28; + return ((dev->tracks[track][side].params[3] == 19) ? 2 : 1); + } + } + return (0); } else { - if (dev->tracks[track][side].params[4] != 0xFF) return(0); + if (dev->tracks[track][side].params[4] != 0xFF) + return (0); - n_map = (uint8_t *) (dev->buffer + dev->tracks[track][side].n_map_offs); + n_map = (uint8_t *) (dev->buffer + dev->tracks[track][side].n_map_offs); - for (i = 0; i < dev->tracks[track][side].params[3]; i++) { - effective_sectors++; - if (!(r_map[i]) && !(n_map[i])) - effective_sectors--; + for (i = 0; i < dev->tracks[track][side].params[3]; i++) { + effective_sectors++; + if (!(r_map[i]) && !(n_map[i])) + effective_sectors--; - if (r_map[i] == (n_map[i] | 0x80)) { - xdf_sectors++; - dev->xdf_ordered_pos[(int) r_map[i]][side] = i; - } - } + if (r_map[i] == (n_map[i] | 0x80)) { + xdf_sectors++; + dev->xdf_ordered_pos[(int) r_map[i]][side] = i; + } + } - if ((effective_sectors == 3) && (xdf_sectors == 3)) { - dev->current_side_flags[side] = 0x28; - return(1); /* 5.25" 2HD XDF */ - } + if ((effective_sectors == 3) && (xdf_sectors == 3)) { + dev->current_side_flags[side] = 0x28; + return (1); /* 5.25" 2HD XDF */ + } - if ((effective_sectors == 4) && (xdf_sectors == 4)) { - dev->current_side_flags[side] = 0x08; - return(2); /* 3.5" 2HD XDF */ - } + if ((effective_sectors == 4) && (xdf_sectors == 4)) { + dev->current_side_flags[side] = 0x08; + return (2); /* 3.5" 2HD XDF */ + } - return(0); + return (0); } - return(0); + return (0); } - static int track_is_interleave(int drive, int side, int track) { imd_t *dev = imd[drive]; - int i, effective_sectors; - char *r_map; - int track_spt; + int i, effective_sectors; + char *r_map; + int track_spt; effective_sectors = 0; for (i = 0; i < 256; i++) - dev->interleave_ordered_pos[i][side] = 0; + dev->interleave_ordered_pos[i][side] = 0; track_spt = dev->tracks[track][side].params[3]; r_map = dev->buffer + dev->tracks[track][side].r_map_offs; - if (dev->tracks[track][side].params[2] & 0xC0) return(0); + if (dev->tracks[track][side].params[2] & 0xC0) + return (0); - if (track_spt != 21) return(0); + if (track_spt != 21) + return (0); - if (dev->tracks[track][side].params[4] != 2) return(0); + if (dev->tracks[track][side].params[4] != 2) + return (0); for (i = 0; i < track_spt; i++) { - if ((r_map[i] >= 1) && (r_map[i] <= track_spt)) { - effective_sectors++; - dev->interleave_ordered_pos[(int) r_map[i]][side] = i; - } + if ((r_map[i] >= 1) && (r_map[i] <= track_spt)) { + effective_sectors++; + dev->interleave_ordered_pos[(int) r_map[i]][side] = i; + } } - if (effective_sectors == track_spt) return(1); + if (effective_sectors == track_spt) + return (1); - return(0); + return (0); } - static void sector_to_buffer(int drive, int track, int side, uint8_t *buffer, int sector, int len) { - imd_t *dev = imd[drive]; - int type = dev->buffer[dev->tracks[track][side].sector_data_offs[sector]]; + imd_t *dev = imd[drive]; + int type = dev->buffer[dev->tracks[track][side].sector_data_offs[sector]]; uint8_t fill_char; if (type == 0) - memset(buffer, 0x00, len); - else { - if (type & 1) - memcpy(buffer, &(dev->buffer[dev->tracks[track][side].sector_data_offs[sector] + 1]), len); - else { - fill_char = dev->buffer[dev->tracks[track][side].sector_data_offs[sector] + 1]; - memset(buffer, fill_char, len); - } + memset(buffer, 0x00, len); + else { + if (type & 1) + memcpy(buffer, &(dev->buffer[dev->tracks[track][side].sector_data_offs[sector] + 1]), len); + else { + fill_char = dev->buffer[dev->tracks[track][side].sector_data_offs[sector] + 1]; + memset(buffer, fill_char, len); + } } } - static void imd_seek(int drive, int track) { uint32_t track_buf_pos[2] = { 0, 0 }; - uint8_t id[4] = { 0, 0, 0, 0 }; - uint8_t type; - imd_t *dev = imd[drive]; - int sector, current_pos; - int side, c = 0, h, n; - int ssize = 512; - int track_rate = 0; - int track_gap2 = 22; - int track_gap3 = 12; - int xdf_type = 0; - int interleave_type = 0; - int is_trackx = 0; - int xdf_spt = 0; - int xdf_sector = 0; - int ordered_pos = 0; - int real_sector = 0; - int actual_sector = 0; - char *c_map = NULL; - char *h_map = NULL; - char *r_map; - char *n_map = NULL; + uint8_t id[4] = { 0, 0, 0, 0 }; + uint8_t type; + imd_t *dev = imd[drive]; + int sector, current_pos; + int side, c = 0, h, n; + int ssize = 512; + int track_rate = 0; + int track_gap2 = 22; + int track_gap3 = 12; + int xdf_type = 0; + int interleave_type = 0; + int is_trackx = 0; + int xdf_spt = 0; + int xdf_sector = 0; + int ordered_pos = 0; + int real_sector = 0; + int actual_sector = 0; + char *c_map = NULL; + char *h_map = NULL; + char *r_map; + char *n_map = NULL; uint8_t *data; - int flags = 0x00; + int flags = 0x00; - if (dev->f == NULL) return; + if (dev->f == NULL) + return; if (!dev->track_width && fdd_doublestep_40(drive)) - track /= 2; + track /= 2; d86f_set_cur_track(drive, track); @@ -326,584 +324,580 @@ imd_seek(int drive, int track) d86f_destroy_linked_lists(drive, 0); d86f_destroy_linked_lists(drive, 1); - d86f_zero_track(drive); + d86f_zero_track(drive); if (track > dev->track_count) - return; + return; for (side = 0; side < dev->sides; side++) { - if (!dev->tracks[track][side].is_present) - continue; + if (!dev->tracks[track][side].is_present) + continue; - track_rate = dev->current_side_flags[side] & 7; - if (!track_rate && (dev->current_side_flags[side] & 0x20)) - track_rate = 4; - if ((dev->current_side_flags[side] & 0x27) == 0x21) - track_rate = 2; + track_rate = dev->current_side_flags[side] & 7; + if (!track_rate && (dev->current_side_flags[side] & 0x20)) + track_rate = 4; + if ((dev->current_side_flags[side] & 0x27) == 0x21) + track_rate = 2; - r_map = dev->buffer + dev->tracks[track][side].r_map_offs; - h = dev->tracks[track][side].params[2]; - if (h & 0x80) - c_map = dev->buffer + dev->tracks[track][side].c_map_offs; - else - c = dev->tracks[track][side].params[1]; + r_map = dev->buffer + dev->tracks[track][side].r_map_offs; + h = dev->tracks[track][side].params[2]; + if (h & 0x80) + c_map = dev->buffer + dev->tracks[track][side].c_map_offs; + else + c = dev->tracks[track][side].params[1]; - if (h & 0x40) - h_map = dev->buffer + dev->tracks[track][side].h_map_offs; + if (h & 0x40) + h_map = dev->buffer + dev->tracks[track][side].h_map_offs; - n = dev->tracks[track][side].params[4]; - if (n == 0xFF) { - n_map = dev->buffer + dev->tracks[track][side].n_map_offs; - track_gap3 = gap3_sizes[track_rate][(int) n_map[0]][dev->tracks[track][side].params[3]]; - } else { - track_gap3 = gap3_sizes[track_rate][n][dev->tracks[track][side].params[3]]; - } + n = dev->tracks[track][side].params[4]; + if (n == 0xFF) { + n_map = dev->buffer + dev->tracks[track][side].n_map_offs; + track_gap3 = gap3_sizes[track_rate][(int) n_map[0]][dev->tracks[track][side].params[3]]; + } else { + track_gap3 = gap3_sizes[track_rate][n][dev->tracks[track][side].params[3]]; + } - if (! track_gap3) - track_gap3 = dev->tracks[track][side].gap3_len; + if (!track_gap3) + track_gap3 = dev->tracks[track][side].gap3_len; - xdf_type = track_is_xdf(drive, side, track); + xdf_type = track_is_xdf(drive, side, track); - interleave_type = track_is_interleave(drive, side, track); + interleave_type = track_is_interleave(drive, side, track); - current_pos = d86f_prepare_pretrack(drive, side, 0); + current_pos = d86f_prepare_pretrack(drive, side, 0); - if (! xdf_type) { - for (sector = 0; sector < dev->tracks[track][side].params[3]; sector++) { - if (interleave_type == 0) { - real_sector = r_map[sector]; - actual_sector = sector; - } else { - real_sector = dmf_r[sector]; - actual_sector = dev->interleave_ordered_pos[real_sector][side]; - } - id[0] = (h & 0x80) ? c_map[actual_sector] : c; - id[1] = (h & 0x40) ? h_map[actual_sector] : (h & 1); - id[2] = real_sector; - id[3] = (n == 0xFF) ? n_map[actual_sector] : n; - data = dev->track_buffer[side] + track_buf_pos[side]; - type = dev->buffer[dev->tracks[track][side].sector_data_offs[actual_sector]]; - type = (type >> 1) & 7; - flags = 0x00; - if ((type == 2) || (type == 4)) - flags |= SECTOR_DELETED_DATA; - if ((type == 3) || (type == 4)) - flags |= SECTOR_CRC_ERROR; + if (!xdf_type) { + for (sector = 0; sector < dev->tracks[track][side].params[3]; sector++) { + if (interleave_type == 0) { + real_sector = r_map[sector]; + actual_sector = sector; + } else { + real_sector = dmf_r[sector]; + actual_sector = dev->interleave_ordered_pos[real_sector][side]; + } + id[0] = (h & 0x80) ? c_map[actual_sector] : c; + id[1] = (h & 0x40) ? h_map[actual_sector] : (h & 1); + id[2] = real_sector; + id[3] = (n == 0xFF) ? n_map[actual_sector] : n; + data = dev->track_buffer[side] + track_buf_pos[side]; + type = dev->buffer[dev->tracks[track][side].sector_data_offs[actual_sector]]; + type = (type >> 1) & 7; + flags = 0x00; + if ((type == 2) || (type == 4)) + flags |= SECTOR_DELETED_DATA; + if ((type == 3) || (type == 4)) + flags |= SECTOR_CRC_ERROR; - if (((flags & 0x02) || (id[3] > dev->tracks[track][side].max_sector_size)) && !fdd_get_turbo(drive)) - ssize = 3; - else - ssize = 128 << ((uint32_t) id[3]); + if (((flags & 0x02) || (id[3] > dev->tracks[track][side].max_sector_size)) && !fdd_get_turbo(drive)) + ssize = 3; + else + ssize = 128 << ((uint32_t) id[3]); - sector_to_buffer(drive, track, side, data, actual_sector, ssize); + sector_to_buffer(drive, track, side, data, actual_sector, ssize); - current_pos = d86f_prepare_sector(drive, side, current_pos, id, data, ssize, 22, track_gap3, flags); - track_buf_pos[side] += ssize; + current_pos = d86f_prepare_sector(drive, side, current_pos, id, data, ssize, 22, track_gap3, flags); + track_buf_pos[side] += ssize; - if (sector == 0) - d86f_initialize_last_sector_id(drive, id[0], id[1], id[2], id[3]); - } - } else { - xdf_type--; - xdf_spt = xdf_physical_sectors[xdf_type][is_trackx]; - for (sector = 0; sector < xdf_spt; sector++) { - xdf_sector = (side * xdf_spt) + sector; - id[0] = track; - id[1] = side; - id[2] = xdf_disk_layout[xdf_type][is_trackx][xdf_sector].id.r; - id[3] = is_trackx ? (id[2] & 7) : 2; - ordered_pos = dev->xdf_ordered_pos[id[2]][side]; + if (sector == 0) + d86f_initialize_last_sector_id(drive, id[0], id[1], id[2], id[3]); + } + } else { + xdf_type--; + xdf_spt = xdf_physical_sectors[xdf_type][is_trackx]; + for (sector = 0; sector < xdf_spt; sector++) { + xdf_sector = (side * xdf_spt) + sector; + id[0] = track; + id[1] = side; + id[2] = xdf_disk_layout[xdf_type][is_trackx][xdf_sector].id.r; + id[3] = is_trackx ? (id[2] & 7) : 2; + ordered_pos = dev->xdf_ordered_pos[id[2]][side]; - data = dev->track_buffer[side] + track_buf_pos[side]; - type = dev->buffer[dev->tracks[track][side].sector_data_offs[ordered_pos]]; - type = ((type - 1) >> 1) & 7; - flags = 0x00; - if (type & 0x01) - flags |= SECTOR_DELETED_DATA; - if (type & 0x02) - flags |= SECTOR_CRC_ERROR; + data = dev->track_buffer[side] + track_buf_pos[side]; + type = dev->buffer[dev->tracks[track][side].sector_data_offs[ordered_pos]]; + type = ((type - 1) >> 1) & 7; + flags = 0x00; + if (type & 0x01) + flags |= SECTOR_DELETED_DATA; + if (type & 0x02) + flags |= SECTOR_CRC_ERROR; - if (((flags & 0x02) || (id[3] > dev->tracks[track][side].max_sector_size)) && !fdd_get_turbo(drive)) - ssize = 3; - else - ssize = 128 << ((uint32_t) id[3]); + if (((flags & 0x02) || (id[3] > dev->tracks[track][side].max_sector_size)) && !fdd_get_turbo(drive)) + ssize = 3; + else + ssize = 128 << ((uint32_t) id[3]); - sector_to_buffer(drive, track, side, data, ordered_pos, ssize); + sector_to_buffer(drive, track, side, data, ordered_pos, ssize); - if (is_trackx) - current_pos = d86f_prepare_sector(drive, side, xdf_trackx_spos[xdf_type][xdf_sector], id, data, ssize, track_gap2, xdf_gap3_sizes[xdf_type][is_trackx], flags); - else - current_pos = d86f_prepare_sector(drive, side, current_pos, id, data, ssize, track_gap2, xdf_gap3_sizes[xdf_type][is_trackx], flags); + if (is_trackx) + current_pos = d86f_prepare_sector(drive, side, xdf_trackx_spos[xdf_type][xdf_sector], id, data, ssize, track_gap2, xdf_gap3_sizes[xdf_type][is_trackx], flags); + else + current_pos = d86f_prepare_sector(drive, side, current_pos, id, data, ssize, track_gap2, xdf_gap3_sizes[xdf_type][is_trackx], flags); - track_buf_pos[side] += ssize; + track_buf_pos[side] += ssize; - if (sector == 0) - d86f_initialize_last_sector_id(drive, id[0], id[1], id[2], id[3]); - } - } + if (sector == 0) + d86f_initialize_last_sector_id(drive, id[0], id[1], id[2], id[3]); + } + } } } - static uint16_t disk_flags(int drive) { imd_t *dev = imd[drive]; - return(dev->disk_flags); + return (dev->disk_flags); } - static uint16_t side_flags(int drive) { - imd_t *dev = imd[drive]; - int side = 0; + imd_t *dev = imd[drive]; + int side = 0; uint16_t sflags = 0; - side = fdd_get_head(drive); + side = fdd_get_head(drive); sflags = dev->current_side_flags[side]; - return(sflags); + return (sflags); } - static void set_sector(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n) { - imd_t *dev = imd[drive]; - int track = dev->track; - int i, sc, sh, sn; - char *c_map = NULL, *h_map = NULL, *r_map = NULL, *n_map = NULL; + imd_t *dev = imd[drive]; + int track = dev->track; + int i, sc, sh, sn; + char *c_map = NULL, *h_map = NULL, *r_map = NULL, *n_map = NULL; uint8_t id[4] = { 0, 0, 0, 0 }; - sc = dev->tracks[track][side].params[1]; - sh = dev->tracks[track][side].params[2]; - sn = dev->tracks[track][side].params[4]; + sc = dev->tracks[track][side].params[1]; + sh = dev->tracks[track][side].params[2]; + sn = dev->tracks[track][side].params[4]; if (sh & 0x80) - c_map = dev->buffer + dev->tracks[track][side].c_map_offs; + c_map = dev->buffer + dev->tracks[track][side].c_map_offs; if (sh & 0x40) - h_map = dev->buffer + dev->tracks[track][side].h_map_offs; + h_map = dev->buffer + dev->tracks[track][side].h_map_offs; r_map = dev->buffer + dev->tracks[track][side].r_map_offs; if (sn == 0xFF) - n_map = dev->buffer + dev->tracks[track][side].n_map_offs; + n_map = dev->buffer + dev->tracks[track][side].n_map_offs; - if (c != dev->track) return; + if (c != dev->track) + return; for (i = 0; i < dev->tracks[track][side].params[3]; i++) { - id[0] = (sh & 0x80) ? c_map[i] : sc; - id[1] = (sh & 0x40) ? h_map[i] : (sh & 1); - id[2] = r_map[i]; - id[3] = (sn == 0xFF) ? n_map[i] : sn; - if ((id[0] == c) && (id[1] == h) && (id[2] == r) && (id[3] == n)) { - dev->current_data[side] = dev->buffer + dev->tracks[track][side].sector_data_offs[i]; - } + id[0] = (sh & 0x80) ? c_map[i] : sc; + id[1] = (sh & 0x40) ? h_map[i] : (sh & 1); + id[2] = r_map[i]; + id[3] = (sn == 0xFF) ? n_map[i] : sn; + if ((id[0] == c) && (id[1] == h) && (id[2] == r) && (id[3] == n)) { + dev->current_data[side] = dev->buffer + dev->tracks[track][side].sector_data_offs[i]; + } } } - static void imd_writeback(int drive) { - imd_t *dev = imd[drive]; - int side; - int track = dev->track; - int i = 0; - char *n_map = 0; - uint8_t h, n, spt; + imd_t *dev = imd[drive]; + int side; + int track = dev->track; + int i = 0; + char *n_map = 0; + uint8_t h, n, spt; uint32_t ssize; - if (writeprot[drive]) return; + if (writeprot[drive]) + return; for (side = 0; side < dev->sides; side++) { - if (dev->tracks[track][side].is_present) { - fseek(dev->f, dev->tracks[track][side].file_offs, SEEK_SET); - h = dev->tracks[track][side].params[2]; - spt = dev->tracks[track][side].params[3]; - n = dev->tracks[track][side].params[4]; - fwrite(dev->tracks[track][side].params, 1, 5, dev->f); + if (dev->tracks[track][side].is_present) { + fseek(dev->f, dev->tracks[track][side].file_offs, SEEK_SET); + h = dev->tracks[track][side].params[2]; + spt = dev->tracks[track][side].params[3]; + n = dev->tracks[track][side].params[4]; + fwrite(dev->tracks[track][side].params, 1, 5, dev->f); - if (h & 0x80) - fwrite(dev->buffer + dev->tracks[track][side].c_map_offs, 1, spt, dev->f); + if (h & 0x80) + fwrite(dev->buffer + dev->tracks[track][side].c_map_offs, 1, spt, dev->f); - if (h & 0x40) - fwrite(dev->buffer + dev->tracks[track][side].h_map_offs, 1, spt, dev->f); + if (h & 0x40) + fwrite(dev->buffer + dev->tracks[track][side].h_map_offs, 1, spt, dev->f); - if (n == 0xFF) { - n_map = dev->buffer + dev->tracks[track][side].n_map_offs; - fwrite(n_map, 1, spt, dev->f); - } - for (i = 0; i < spt; i++) { - ssize = (n == 0xFF) ? n_map[i] : n; - ssize = 128 << ssize; - fwrite(dev->buffer + dev->tracks[track][side].sector_data_offs[i], 1, ssize, dev->f); - } - } + if (n == 0xFF) { + n_map = dev->buffer + dev->tracks[track][side].n_map_offs; + fwrite(n_map, 1, spt, dev->f); + } + for (i = 0; i < spt; i++) { + ssize = (n == 0xFF) ? n_map[i] : n; + ssize = 128 << ssize; + fwrite(dev->buffer + dev->tracks[track][side].sector_data_offs[i], 1, ssize, dev->f); + } + } } } - static uint8_t poll_read_data(int drive, int side, uint16_t pos) { - imd_t *dev = imd[drive]; - int type = dev->current_data[side][0]; + imd_t *dev = imd[drive]; + int type = dev->current_data[side][0]; - if ((type == 0) || (type > 8)) return(0xf6); /* Should never happen. */ + if ((type == 0) || (type > 8)) + return (0xf6); /* Should never happen. */ if (type & 1) - return(dev->current_data[side][pos + 1]); + return (dev->current_data[side][pos + 1]); else - return(dev->current_data[side][1]); + return (dev->current_data[side][1]); } - static void poll_write_data(int drive, int side, uint16_t pos, uint8_t data) { - imd_t *dev = imd[drive]; - int type = dev->current_data[side][0]; + imd_t *dev = imd[drive]; + int type = dev->current_data[side][0]; - if (writeprot[drive]) return; + if (writeprot[drive]) + return; - if ((type & 1) || (type == 0) || (type > 8)) return; /* Should never happen. */ + if ((type & 1) || (type == 0) || (type > 8)) + return; /* Should never happen. */ dev->current_data[side][pos + 1] = data; } - static int format_conditions(int drive) { - imd_t *dev = imd[drive]; - int track = dev->track; - int side, temp; + imd_t *dev = imd[drive]; + int track = dev->track; + int side, temp; side = fdd_get_head(drive); temp = (fdc_get_format_sectors(imd_fdc) == dev->tracks[track][side].params[3]); temp = temp && (fdc_get_format_n(imd_fdc) == dev->tracks[track][side].params[4]); - return(temp); + return (temp); } - void imd_init(void) { memset(imd, 0x00, sizeof(imd)); } - void imd_load(int drive, char *fn) { uint32_t magic = 0; uint32_t fsize = 0; - char *buffer; - char *buffer2; - imd_t *dev; - int i = 0; - int track_spt = 0; - int sector_size = 0; - int track = 0; - int side = 0; - int extra = 0; - uint32_t last_offset = 0; - uint32_t data_size = 512; - uint32_t mfm = 0; - uint32_t pre_sector = 0; - uint32_t track_total = 0; - uint32_t raw_tsize = 0; + char *buffer; + char *buffer2; + imd_t *dev; + int i = 0; + int track_spt = 0; + int sector_size = 0; + int track = 0; + int side = 0; + int extra = 0; + uint32_t last_offset = 0; + uint32_t data_size = 512; + uint32_t mfm = 0; + uint32_t pre_sector = 0; + uint32_t track_total = 0; + uint32_t raw_tsize = 0; uint32_t minimum_gap3 = 0; uint32_t minimum_gap4 = 0; - uint8_t converted_rate; - uint8_t type; - int size_diff, gap_sum; + uint8_t converted_rate; + uint8_t type; + int size_diff, gap_sum; d86f_unregister(drive); writeprot[drive] = 0; /* Allocate a drive block. */ - dev = (imd_t *)malloc(sizeof(imd_t)); + dev = (imd_t *) malloc(sizeof(imd_t)); memset(dev, 0x00, sizeof(imd_t)); dev->f = plat_fopen(fn, "rb+"); if (dev->f == NULL) { - dev->f = plat_fopen(fn, "rb"); - if (dev->f == NULL) { - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - free(dev); - return; - } - writeprot[drive] = 1; + dev->f = plat_fopen(fn, "rb"); + if (dev->f == NULL) { + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + free(dev); + return; + } + writeprot[drive] = 1; } if (ui_writeprot[drive]) - writeprot[drive] = 1; + writeprot[drive] = 1; fwriteprot[drive] = writeprot[drive]; if (fseek(dev->f, 0, SEEK_SET) == -1) - fatal("imd_load(): Error seeking to the beginning of the file\n"); + fatal("imd_load(): Error seeking to the beginning of the file\n"); if (fread(&magic, 1, 4, dev->f) != 4) - fatal("imd_load(): Error reading the magic number\n"); + fatal("imd_load(): Error reading the magic number\n"); if (magic != 0x20444D49) { - imd_log("IMD: Not a valid ImageDisk image\n"); - fclose(dev->f); - free(dev); - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - return; + imd_log("IMD: Not a valid ImageDisk image\n"); + fclose(dev->f); + free(dev); + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + return; } else - imd_log("IMD: Valid ImageDisk image\n"); + imd_log("IMD: Valid ImageDisk image\n"); if (fseek(dev->f, 0, SEEK_END) == -1) - fatal("imd_load(): Error seeking to the end of the file\n"); + fatal("imd_load(): Error seeking to the end of the file\n"); fsize = ftell(dev->f); if (fsize <= 0) { - imd_log("IMD: Too small ImageDisk image\n"); - fclose(dev->f); - free(dev); - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - return; + imd_log("IMD: Too small ImageDisk image\n"); + fclose(dev->f); + free(dev); + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + return; } if (fseek(dev->f, 0, SEEK_SET) == -1) - fatal("imd_load(): Error seeking to the beginning of the file again\n"); + fatal("imd_load(): Error seeking to the beginning of the file again\n"); dev->buffer = malloc(fsize); if (fread(dev->buffer, 1, fsize, dev->f) != fsize) - fatal("imd_load(): Error reading data\n"); + fatal("imd_load(): Error reading data\n"); buffer = dev->buffer; buffer2 = memchr(buffer, 0x1A, fsize); if (buffer2 == NULL) { - imd_log("IMD: No ASCII EOF character\n"); - fclose(dev->f); - free(dev); - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - return; + imd_log("IMD: No ASCII EOF character\n"); + fclose(dev->f); + free(dev); + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + return; } else { - imd_log("IMD: ASCII EOF character found at offset %08X\n", buffer2 - buffer); + imd_log("IMD: ASCII EOF character found at offset %08X\n", buffer2 - buffer); } buffer2++; if ((buffer2 - buffer) == fsize) { - imd_log("IMD: File ends after ASCII EOF character\n"); - fclose(dev->f); - free(dev); - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - return; + imd_log("IMD: File ends after ASCII EOF character\n"); + fclose(dev->f); + free(dev); + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + return; } else { - imd_log("IMD: File continues after ASCII EOF character\n"); + imd_log("IMD: File continues after ASCII EOF character\n"); } - dev->start_offs = (buffer2 - buffer); - dev->disk_flags = 0x00; + dev->start_offs = (buffer2 - buffer); + dev->disk_flags = 0x00; dev->track_count = 0; - dev->sides = 1; + dev->sides = 1; /* Set up the drive unit. */ imd[drive] = dev; - while(1) { - track = buffer2[1]; - side = buffer2[2]; - if (side & 1) - dev->sides = 2; - extra = side & 0xC0; - side &= 0x3F; + while (1) { + track = buffer2[1]; + side = buffer2[2]; + if (side & 1) + dev->sides = 2; + extra = side & 0xC0; + side &= 0x3F; - dev->tracks[track][side].side_flags = (buffer2[0] % 3); - if (! dev->tracks[track][side].side_flags) - dev->disk_flags |= (0x02); - dev->tracks[track][side].side_flags |= (!(buffer2[0] - dev->tracks[track][side].side_flags) ? 0 : 8); - mfm = dev->tracks[track][side].side_flags & 8; - track_total = mfm ? 146 : 73; - pre_sector = mfm ? 60 : 42; + dev->tracks[track][side].side_flags = (buffer2[0] % 3); + if (!dev->tracks[track][side].side_flags) + dev->disk_flags |= (0x02); + dev->tracks[track][side].side_flags |= (!(buffer2[0] - dev->tracks[track][side].side_flags) ? 0 : 8); + mfm = dev->tracks[track][side].side_flags & 8; + track_total = mfm ? 146 : 73; + pre_sector = mfm ? 60 : 42; - track_spt = buffer2[3]; - sector_size = buffer2[4]; - if ((track_spt == 15) && (sector_size == 2)) - dev->tracks[track][side].side_flags |= 0x20; - if ((track_spt == 16) && (sector_size == 2)) - dev->tracks[track][side].side_flags |= 0x20; - if ((track_spt == 17) && (sector_size == 2)) - dev->tracks[track][side].side_flags |= 0x20; - if ((track_spt == 8) && (sector_size == 3)) - dev->tracks[track][side].side_flags |= 0x20; - if ((dev->tracks[track][side].side_flags & 7) == 1) - dev->tracks[track][side].side_flags |= 0x20; - if ((dev->tracks[track][side].side_flags & 0x07) == 0x00) - dev->tracks[track][side].max_sector_size = 6; - else - dev->tracks[track][side].max_sector_size = 5; - if (!mfm) - dev->tracks[track][side].max_sector_size--; - imd_log("Side flags for (%02i)(%01i): %02X\n", track, side, dev->tracks[track][side].side_flags); - dev->tracks[track][side].is_present = 1; - dev->tracks[track][side].file_offs = (buffer2 - buffer); - memcpy(dev->tracks[track][side].params, buffer2, 5); - dev->tracks[track][side].r_map_offs = dev->tracks[track][side].file_offs + 5; - last_offset = dev->tracks[track][side].r_map_offs + track_spt; + track_spt = buffer2[3]; + sector_size = buffer2[4]; + if ((track_spt == 15) && (sector_size == 2)) + dev->tracks[track][side].side_flags |= 0x20; + if ((track_spt == 16) && (sector_size == 2)) + dev->tracks[track][side].side_flags |= 0x20; + if ((track_spt == 17) && (sector_size == 2)) + dev->tracks[track][side].side_flags |= 0x20; + if ((track_spt == 8) && (sector_size == 3)) + dev->tracks[track][side].side_flags |= 0x20; + if ((dev->tracks[track][side].side_flags & 7) == 1) + dev->tracks[track][side].side_flags |= 0x20; + if ((dev->tracks[track][side].side_flags & 0x07) == 0x00) + dev->tracks[track][side].max_sector_size = 6; + else + dev->tracks[track][side].max_sector_size = 5; + if (!mfm) + dev->tracks[track][side].max_sector_size--; + imd_log("Side flags for (%02i)(%01i): %02X\n", track, side, dev->tracks[track][side].side_flags); + dev->tracks[track][side].is_present = 1; + dev->tracks[track][side].file_offs = (buffer2 - buffer); + memcpy(dev->tracks[track][side].params, buffer2, 5); + dev->tracks[track][side].r_map_offs = dev->tracks[track][side].file_offs + 5; + last_offset = dev->tracks[track][side].r_map_offs + track_spt; - if (extra & 0x80) { - dev->tracks[track][side].c_map_offs = last_offset; - last_offset += track_spt; - } + if (extra & 0x80) { + dev->tracks[track][side].c_map_offs = last_offset; + last_offset += track_spt; + } - if (extra & 0x40) { - dev->tracks[track][side].h_map_offs = last_offset; - last_offset += track_spt; - } + if (extra & 0x40) { + dev->tracks[track][side].h_map_offs = last_offset; + last_offset += track_spt; + } - if (track_spt == 0x00) { - dev->tracks[track][side].n_map_offs = last_offset; - buffer2 = buffer + last_offset; - last_offset += track_spt; - dev->tracks[track][side].is_present = 0; - } else if (sector_size == 0xFF) { - dev->tracks[track][side].n_map_offs = last_offset; - buffer2 = buffer + last_offset; - last_offset += track_spt; + if (track_spt == 0x00) { + dev->tracks[track][side].n_map_offs = last_offset; + buffer2 = buffer + last_offset; + last_offset += track_spt; + dev->tracks[track][side].is_present = 0; + } else if (sector_size == 0xFF) { + dev->tracks[track][side].n_map_offs = last_offset; + buffer2 = buffer + last_offset; + last_offset += track_spt; - dev->tracks[track][side].data_offs = last_offset; + dev->tracks[track][side].data_offs = last_offset; - for (i = 0; i < track_spt; i++) { - data_size = buffer2[i]; - data_size = 128 << data_size; - dev->tracks[track][side].sector_data_offs[i] = last_offset; - dev->tracks[track][side].sector_data_size[i] = 1; - if (dev->buffer[dev->tracks[track][side].sector_data_offs[i]] > 0x08) { - /* Invalid sector data type, possibly a malformed HxC IMG image (it outputs data errored - sectors with a variable amount of bytes, against the specification). */ - imd_log("IMD: Invalid sector data type %02X\n", dev->buffer[dev->tracks[track][side].sector_data_offs[i]]); - fclose(dev->f); - free(dev); - imd[drive] = NULL; - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - return; - } - if (buffer[dev->tracks[track][side].sector_data_offs[i]] != 0) - dev->tracks[track][side].sector_data_size[i] += (buffer[dev->tracks[track][side].sector_data_offs[i]] & 1) ? data_size : 1; - last_offset += dev->tracks[track][side].sector_data_size[i]; - if (!(buffer[dev->tracks[track][side].sector_data_offs[i]] & 1)) - fwriteprot[drive] = writeprot[drive] = 1; - type = dev->buffer[dev->tracks[track][side].sector_data_offs[i]]; - if (type != 0x00) { - type = ((type - 1) >> 1) & 7; - if (data_size > (128 << dev->tracks[track][side].max_sector_size)) - track_total += (pre_sector + 3); - else - track_total += (pre_sector + data_size + 2); - } - } - } else { - dev->tracks[track][side].data_offs = last_offset; + for (i = 0; i < track_spt; i++) { + data_size = buffer2[i]; + data_size = 128 << data_size; + dev->tracks[track][side].sector_data_offs[i] = last_offset; + dev->tracks[track][side].sector_data_size[i] = 1; + if (dev->buffer[dev->tracks[track][side].sector_data_offs[i]] > 0x08) { + /* Invalid sector data type, possibly a malformed HxC IMG image (it outputs data errored + sectors with a variable amount of bytes, against the specification). */ + imd_log("IMD: Invalid sector data type %02X\n", dev->buffer[dev->tracks[track][side].sector_data_offs[i]]); + fclose(dev->f); + free(dev); + imd[drive] = NULL; + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + return; + } + if (buffer[dev->tracks[track][side].sector_data_offs[i]] != 0) + dev->tracks[track][side].sector_data_size[i] += (buffer[dev->tracks[track][side].sector_data_offs[i]] & 1) ? data_size : 1; + last_offset += dev->tracks[track][side].sector_data_size[i]; + if (!(buffer[dev->tracks[track][side].sector_data_offs[i]] & 1)) + fwriteprot[drive] = writeprot[drive] = 1; + type = dev->buffer[dev->tracks[track][side].sector_data_offs[i]]; + if (type != 0x00) { + type = ((type - 1) >> 1) & 7; + if (data_size > (128 << dev->tracks[track][side].max_sector_size)) + track_total += (pre_sector + 3); + else + track_total += (pre_sector + data_size + 2); + } + } + } else { + dev->tracks[track][side].data_offs = last_offset; - for (i = 0; i < track_spt; i++) { - data_size = sector_size; - data_size = 128 << data_size; - dev->tracks[track][side].sector_data_offs[i] = last_offset; - dev->tracks[track][side].sector_data_size[i] = 1; - if (dev->buffer[dev->tracks[track][side].sector_data_offs[i]] > 0x08) { - /* Invalid sector data type, possibly a malformed HxC IMG image (it outputs data errored - sectors with a variable amount of bytes, against the specification). */ - imd_log("IMD: Invalid sector data type %02X\n", dev->buffer[dev->tracks[track][side].sector_data_offs[i]]); - fclose(dev->f); - free(dev); - imd[drive] = NULL; - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - return; - } - if (buffer[dev->tracks[track][side].sector_data_offs[i]] != 0) - dev->tracks[track][side].sector_data_size[i] += (buffer[dev->tracks[track][side].sector_data_offs[i]] & 1) ? data_size : 1; - last_offset += dev->tracks[track][side].sector_data_size[i]; - if (!(buffer[dev->tracks[track][side].sector_data_offs[i]] & 1)) - fwriteprot[drive] = writeprot[drive] = 1; - type = dev->buffer[dev->tracks[track][side].sector_data_offs[i]]; - if (type != 0x00) { - type = ((type - 1) >> 1) & 7; - if (data_size > (128 << dev->tracks[track][side].max_sector_size)) - track_total += (pre_sector + 3); - else - track_total += (pre_sector + data_size + 2); - } - } - } + for (i = 0; i < track_spt; i++) { + data_size = sector_size; + data_size = 128 << data_size; + dev->tracks[track][side].sector_data_offs[i] = last_offset; + dev->tracks[track][side].sector_data_size[i] = 1; + if (dev->buffer[dev->tracks[track][side].sector_data_offs[i]] > 0x08) { + /* Invalid sector data type, possibly a malformed HxC IMG image (it outputs data errored + sectors with a variable amount of bytes, against the specification). */ + imd_log("IMD: Invalid sector data type %02X\n", dev->buffer[dev->tracks[track][side].sector_data_offs[i]]); + fclose(dev->f); + free(dev); + imd[drive] = NULL; + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + return; + } + if (buffer[dev->tracks[track][side].sector_data_offs[i]] != 0) + dev->tracks[track][side].sector_data_size[i] += (buffer[dev->tracks[track][side].sector_data_offs[i]] & 1) ? data_size : 1; + last_offset += dev->tracks[track][side].sector_data_size[i]; + if (!(buffer[dev->tracks[track][side].sector_data_offs[i]] & 1)) + fwriteprot[drive] = writeprot[drive] = 1; + type = dev->buffer[dev->tracks[track][side].sector_data_offs[i]]; + if (type != 0x00) { + type = ((type - 1) >> 1) & 7; + if (data_size > (128 << dev->tracks[track][side].max_sector_size)) + track_total += (pre_sector + 3); + else + track_total += (pre_sector + data_size + 2); + } + } + } - buffer2 = buffer + last_offset; + buffer2 = buffer + last_offset; - /* Leaving even GAP4: 80 : 40 */ - /* Leaving only GAP1: 96 : 47 */ - /* Not leaving even GAP1: 146 : 73 */ - raw_tsize = get_raw_tsize(dev->tracks[track][side].side_flags, 0); - minimum_gap3 = 12 * track_spt; + /* Leaving even GAP4: 80 : 40 */ + /* Leaving only GAP1: 96 : 47 */ + /* Not leaving even GAP1: 146 : 73 */ + raw_tsize = get_raw_tsize(dev->tracks[track][side].side_flags, 0); + minimum_gap3 = 12 * track_spt; - if ((dev->tracks[track][side].side_flags == 0x0A) || (dev->tracks[track][side].side_flags == 0x29)) - converted_rate = 2; - else if (dev->tracks[track][side].side_flags == 0x28) - converted_rate = 4; - else - converted_rate = dev->tracks[track][side].side_flags & 0x03; + if ((dev->tracks[track][side].side_flags == 0x0A) || (dev->tracks[track][side].side_flags == 0x29)) + converted_rate = 2; + else if (dev->tracks[track][side].side_flags == 0x28) + converted_rate = 4; + else + converted_rate = dev->tracks[track][side].side_flags & 0x03; - if ((track_spt != 0x00) && (gap3_sizes[converted_rate][sector_size][track_spt] == 0x00)) { - size_diff = raw_tsize - track_total; - gap_sum = minimum_gap3 + minimum_gap4; - if (size_diff < gap_sum) { - /* If we can't fit the sectors with a reasonable minimum gap at perfect RPM, let's try 2% slower. */ - raw_tsize = get_raw_tsize(dev->tracks[track][side].side_flags, 1); - /* Set disk flags so that rotation speed is 2% slower. */ - dev->disk_flags |= (3 << 5); - size_diff = raw_tsize - track_total; - if (size_diff < gap_sum) { - /* If we can't fit the sectors with a reasonable minimum gap even at 2% slower RPM, abort. */ - imd_log("IMD: Unable to fit the %i sectors in a track\n", track_spt); - fclose(dev->f); - free(dev); - imd[drive] = NULL; - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - return; - } - } + if ((track_spt != 0x00) && (gap3_sizes[converted_rate][sector_size][track_spt] == 0x00)) { + size_diff = raw_tsize - track_total; + gap_sum = minimum_gap3 + minimum_gap4; + if (size_diff < gap_sum) { + /* If we can't fit the sectors with a reasonable minimum gap at perfect RPM, let's try 2% slower. */ + raw_tsize = get_raw_tsize(dev->tracks[track][side].side_flags, 1); + /* Set disk flags so that rotation speed is 2% slower. */ + dev->disk_flags |= (3 << 5); + size_diff = raw_tsize - track_total; + if (size_diff < gap_sum) { + /* If we can't fit the sectors with a reasonable minimum gap even at 2% slower RPM, abort. */ + imd_log("IMD: Unable to fit the %i sectors in a track\n", track_spt); + fclose(dev->f); + free(dev); + imd[drive] = NULL; + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + return; + } + } - dev->tracks[track][side].gap3_len = (size_diff - minimum_gap4) / track_spt; - } else if ((track_spt == 0x00) || (gap3_sizes[converted_rate][sector_size][track_spt] != 0x00)) - dev->tracks[track][side].gap3_len = gap3_sizes[converted_rate][sector_size][track_spt]; + dev->tracks[track][side].gap3_len = (size_diff - minimum_gap4) / track_spt; + } else if ((track_spt == 0x00) || (gap3_sizes[converted_rate][sector_size][track_spt] != 0x00)) + dev->tracks[track][side].gap3_len = gap3_sizes[converted_rate][sector_size][track_spt]; - /* imd_log("GAP3 length for (%02i)(%01i): %i bytes\n", track, side, dev->tracks[track][side].gap3_len); */ + /* imd_log("GAP3 length for (%02i)(%01i): %i bytes\n", track, side, dev->tracks[track][side].gap3_len); */ - if (track > dev->track_count) - dev->track_count = track; + if (track > dev->track_count) + dev->track_count = track; - if (last_offset >= fsize) - break; + if (last_offset >= fsize) + break; } /* If more than 43 tracks, then the tracks are thin (96 tpi). */ dev->track_count++; dev->track_width = 0; if (dev->track_count > 43) - dev->track_width = 1; + dev->track_width = 1; /* If 2 sides, mark it as such. */ if (dev->sides == 2) - dev->disk_flags |= 8; + dev->disk_flags |= 8; /* imd_log("%i tracks, %i sides\n", dev->track_count, dev->sides); */ /* Attach this format to the D86F engine. */ - d86f_handler[drive].disk_flags = disk_flags; - d86f_handler[drive].side_flags = side_flags; - d86f_handler[drive].writeback = imd_writeback; - d86f_handler[drive].set_sector = set_sector; - d86f_handler[drive].read_data = poll_read_data; - d86f_handler[drive].write_data = poll_write_data; + d86f_handler[drive].disk_flags = disk_flags; + d86f_handler[drive].side_flags = side_flags; + d86f_handler[drive].writeback = imd_writeback; + d86f_handler[drive].set_sector = set_sector; + d86f_handler[drive].read_data = poll_read_data; + d86f_handler[drive].write_data = poll_write_data; d86f_handler[drive].format_conditions = format_conditions; - d86f_handler[drive].extra_bit_cells = null_extra_bit_cells; - d86f_handler[drive].encoded_data = common_encoded_data; - d86f_handler[drive].read_revolution = common_read_revolution; - d86f_handler[drive].index_hole_pos = null_index_hole_pos; - d86f_handler[drive].get_raw_size = common_get_raw_size; - d86f_handler[drive].check_crc = 1; + d86f_handler[drive].extra_bit_cells = null_extra_bit_cells; + d86f_handler[drive].encoded_data = common_encoded_data; + d86f_handler[drive].read_revolution = common_read_revolution; + d86f_handler[drive].index_hole_pos = null_index_hole_pos; + d86f_handler[drive].get_raw_size = common_get_raw_size; + d86f_handler[drive].check_crc = 1; d86f_set_version(drive, 0x0063); drives[drive].seek = imd_seek; @@ -911,20 +905,20 @@ imd_load(int drive, char *fn) d86f_common_handlers(drive); } - void imd_close(int drive) { imd_t *dev = imd[drive]; - if (dev == NULL) return; + if (dev == NULL) + return; d86f_unregister(drive); if (dev->f != NULL) { - free(dev->buffer); + free(dev->buffer); - fclose(dev->f); + fclose(dev->f); } /* Release the memory. */ @@ -932,7 +926,6 @@ imd_close(int drive) imd[drive] = NULL; } - void imd_set_fdc(void *fdc) { diff --git a/src/floppy/fdd_json.c b/src/floppy/fdd_json.c index 69252e1c8..204490a67 100644 --- a/src/floppy/fdd_json.c +++ b/src/floppy/fdd_json.c @@ -60,350 +60,344 @@ #include <86box/fdd_common.h> #include <86box/fdd_json.h> - -#define NTRACKS 256 -#define NSIDES 2 -#define NSECTORS 256 - +#define NTRACKS 256 +#define NSIDES 2 +#define NSECTORS 256 typedef struct { - uint8_t track, /* ID: track number */ - side, /* side number */ - sector; /* sector number 1.. */ - uint16_t size; /* encoded size of sector */ - uint8_t *data; /* allocated data for it */ + uint8_t track, /* ID: track number */ + side, /* side number */ + sector; /* sector number 1.. */ + uint16_t size; /* encoded size of sector */ + uint8_t *data; /* allocated data for it */ } sector_t; typedef struct { - FILE *f; + FILE *f; /* Geometry. */ - uint8_t tracks, /* number of tracks */ - sides, /* number of sides */ - sectors, /* number of sectors per track */ - spt[NTRACKS][NSIDES]; /* number of sectors per track */ + uint8_t tracks, /* number of tracks */ + sides, /* number of sides */ + sectors, /* number of sectors per track */ + spt[NTRACKS][NSIDES]; /* number of sectors per track */ - uint8_t track, /* current track */ - side, /* current side */ - sector[NSIDES]; /* current sector */ + uint8_t track, /* current track */ + side, /* current side */ + sector[NSIDES]; /* current sector */ - uint8_t dmf; /* disk is DMF format */ - uint8_t interleave; + uint8_t dmf; /* disk is DMF format */ + uint8_t interleave; #if 0 uint8_t skew; #endif - uint8_t gap2_len; - uint8_t gap3_len; - int track_width; + uint8_t gap2_len; + uint8_t gap3_len; + int track_width; - uint16_t disk_flags, /* flags for the entire disk */ - track_flags; /* flags for the current track */ + uint16_t disk_flags, /* flags for the entire disk */ + track_flags; /* flags for the current track */ - uint8_t interleave_ordered[NTRACKS][NSIDES]; + uint8_t interleave_ordered[NTRACKS][NSIDES]; - sector_t sects[NTRACKS][NSIDES][NSECTORS]; + sector_t sects[NTRACKS][NSIDES][NSECTORS]; } json_t; - -static json_t *images[FDD_NUM]; - +static json_t *images[FDD_NUM]; #define ENABLE_JSON_LOG 1 #ifdef ENABLE_JSON_LOG int json_do_log = ENABLE_JSON_LOG; - static void json_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (json_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (json_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define json_log(fmt, ...) +# define json_log(fmt, ...) #endif - static void handle(json_t *dev, char *name, char *str) { sector_t *sec = NULL; - uint32_t l, pat; - uint8_t *p; - char *sp; - int i, s; + uint32_t l, pat; + uint8_t *p; + char *sp; + int i, s; /* Point to the currently selected sector. */ - sec = &dev->sects[dev->track][dev->side][dev->dmf-1]; + sec = &dev->sects[dev->track][dev->side][dev->dmf - 1]; /* If no name given, assume sector is done. */ if (name == NULL) { - /* If no buffer, assume one with 00's. */ - if (sec->data == NULL) { - sec->data = (uint8_t *)malloc(sec->size); - memset(sec->data, 0x00, sec->size); - } + /* If no buffer, assume one with 00's. */ + if (sec->data == NULL) { + sec->data = (uint8_t *) malloc(sec->size); + memset(sec->data, 0x00, sec->size); + } - /* Encode the sector size. */ - sec->size = fdd_sector_size_code(sec->size); + /* Encode the sector size. */ + sec->size = fdd_sector_size_code(sec->size); - /* Set up the rest of the Sector ID. */ - sec->track = dev->track; - sec->side = dev->side; + /* Set up the rest of the Sector ID. */ + sec->track = dev->track; + sec->side = dev->side; - return; + return; } - if (! strcmp(name, "sector")) { - sec->sector = atoi(str); - sec->size = 512; - } else if (! strcmp(name, "length")) { - sec->size = atoi(str); - } else if (! strcmp(name, "pattern")) { - pat = atol(str); + if (!strcmp(name, "sector")) { + sec->sector = atoi(str); + sec->size = 512; + } else if (!strcmp(name, "length")) { + sec->size = atoi(str); + } else if (!strcmp(name, "pattern")) { + pat = atol(str); - if (sec->data == NULL) - sec->data = (uint8_t *)malloc(sec->size); - p = sec->data; - s = (sec->size / sizeof(uint32_t)); - for (i=0; i>= 8; - *p++ = (l & 0x000000ff); - l >>= 8; - *p++ = (l & 0x000000ff); - l >>= 8; - *p++ = (l & 0x000000ff); - } - } else if (! strcmp(name, "data")) { - if (sec->data == NULL) - sec->data = (uint8_t *)malloc(sec->size); - p = sec->data; - while (str && *str) { - sp = strchr(str, ','); - if (sp != NULL) *sp++ = '\0'; - l = atol(str); + if (sec->data == NULL) + sec->data = (uint8_t *) malloc(sec->size); + p = sec->data; + s = (sec->size / sizeof(uint32_t)); + for (i = 0; i < s; i++) { + l = pat; + *p++ = (l & 0x000000ff); + l >>= 8; + *p++ = (l & 0x000000ff); + l >>= 8; + *p++ = (l & 0x000000ff); + l >>= 8; + *p++ = (l & 0x000000ff); + } + } else if (!strcmp(name, "data")) { + if (sec->data == NULL) + sec->data = (uint8_t *) malloc(sec->size); + p = sec->data; + while (str && *str) { + sp = strchr(str, ','); + if (sp != NULL) + *sp++ = '\0'; + l = atol(str); - *p++ = (l & 0x000000ff); - l >>= 8; - *p++ = (l & 0x000000ff); - l >>= 8; - *p++ = (l & 0x000000ff); - l >>= 8; - *p++ = (l & 0x000000ff); + *p++ = (l & 0x000000ff); + l >>= 8; + *p++ = (l & 0x000000ff); + l >>= 8; + *p++ = (l & 0x000000ff); + l >>= 8; + *p++ = (l & 0x000000ff); - str = sp; - } + str = sp; + } } } - static int unexpect(int c, int state, int level) { json_log("JSON: Unexpected '%c' in state %d/%d.\n", c, state, level); - return(-1); + return (-1); } - static int load_image(json_t *dev) { - char buff[4096], name[32]; - int c, i, j, state, level; + char buff[4096], name[32]; + int c, i, j, state, level; char *ptr; if (dev->f == NULL) { - json_log("JSON: no file loaded!\n"); - return(0); + json_log("JSON: no file loaded!\n"); + return (0); } /* Initialize. */ - for (i=0; isects[i][j], 0x00, sizeof(sector_t)); + for (i = 0; i < NTRACKS; i++) { + for (j = 0; j < NSIDES; j++) + memset(dev->sects[i][j], 0x00, sizeof(sector_t)); } - dev->track = dev->side = dev->dmf = 0; /* "dmf" is "sector#" */ + dev->track = dev->side = dev->dmf = 0; /* "dmf" is "sector#" */ /* Now run the state machine. */ - ptr = NULL; + ptr = NULL; level = state = 0; while (state >= 0) { - /* Get a character from the input. */ - c = fgetc(dev->f); - if ((c == EOF) || ferror(dev->f)) { - state = -1; - break; - } + /* Get a character from the input. */ + c = fgetc(dev->f); + if ((c == EOF) || ferror(dev->f)) { + state = -1; + break; + } - /* Process it. */ - switch(state) { - case 0: /* read level header */ - dev->dmf = 1; - if ((c != '[') && (c != '{') && (c != '\r') && (c != '\n')) { - state = unexpect(c, state, level); - } else if (c == '[') { - if (++level == 3) - state++; - } - break; + /* Process it. */ + switch (state) { + case 0: /* read level header */ + dev->dmf = 1; + if ((c != '[') && (c != '{') && (c != '\r') && (c != '\n')) { + state = unexpect(c, state, level); + } else if (c == '[') { + if (++level == 3) + state++; + } + break; - case 1: /* read sector header */ - if (c != '{') - state = unexpect(c, state, level); - else - state++; - break; + case 1: /* read sector header */ + if (c != '{') + state = unexpect(c, state, level); + else + state++; + break; - case 2: /* begin sector data name */ - if (c != '\"') { - state = unexpect(c, state, level); - } else { - ptr = name; - state++; - } - break; + case 2: /* begin sector data name */ + if (c != '\"') { + state = unexpect(c, state, level); + } else { + ptr = name; + state++; + } + break; - case 3: /* read sector data name */ - if (c == '\"') { - *ptr = '\0'; - state++; - } else { - *ptr++ = c; - } - break; + case 3: /* read sector data name */ + if (c == '\"') { + *ptr = '\0'; + state++; + } else { + *ptr++ = c; + } + break; - case 4: /* end of sector data name */ - if (c != ':') { - state = unexpect(c, state, level); - } else { - ptr = buff; - state++; - } - break; + case 4: /* end of sector data name */ + if (c != ':') { + state = unexpect(c, state, level); + } else { + ptr = buff; + state++; + } + break; - case 5: /* read sector value data */ - switch(c) { - case ',': - case '}': - *ptr = '\0'; - handle(dev, name, buff); + case 5: /* read sector value data */ + switch (c) { + case ',': + case '}': + *ptr = '\0'; + handle(dev, name, buff); - if (c == '}') - state = 7; /* done */ - else - state = 2; /* word */ - break; + if (c == '}') + state = 7; /* done */ + else + state = 2; /* word */ + break; - case '[': - state++; - break; + case '[': + state++; + break; - default: - *ptr++ = c; - } - break; + default: + *ptr++ = c; + } + break; - case 6: /* read sector data complex */ - if (c != ']') - *ptr++ = c; - else - state = 5; - break; + case 6: /* read sector data complex */ + if (c != ']') + *ptr++ = c; + else + state = 5; + break; - case 7: /* sector done */ - handle(dev, NULL, NULL); - switch(c) { - case ',': /* next sector */ - dev->dmf++; - state = 1; - break; + case 7: /* sector done */ + handle(dev, NULL, NULL); + switch (c) { + case ',': /* next sector */ + dev->dmf++; + state = 1; + break; - case ']': /* all sectors done */ - if (--level == 0) - state = -1; - else state++; - break; + case ']': /* all sectors done */ + if (--level == 0) + state = -1; + else + state++; + break; - default: - state = unexpect(c, state, level); - } - break; + default: + state = unexpect(c, state, level); + } + break; - case 8: /* side done */ - switch(c) { - case ',': /* next side */ - state = 0; - break; + case 8: /* side done */ + switch (c) { + case ',': /* next side */ + state = 0; + break; - case ']': /* all sides done */ - if (--level == 0) - state = -1; - else state++; - break; + case ']': /* all sides done */ + if (--level == 0) + state = -1; + else + state++; + break; - default: - state = unexpect(c, state, level); - } - dev->spt[dev->track][dev->side] = dev->dmf; - dev->side++; - break; + default: + state = unexpect(c, state, level); + } + dev->spt[dev->track][dev->side] = dev->dmf; + dev->side++; + break; - case 9: /* track done */ - switch(c) { - case ',': /* next track */ - dev->side = 0; - state = 0; - break; + case 9: /* track done */ + switch (c) { + case ',': /* next track */ + dev->side = 0; + state = 0; + break; - case ']': /* all tracks done */ - if (--level == 0) - state = -1; - else state++; - break; - - default: - state = unexpect(c, state, level); - } - dev->track++; - break; - } + case ']': /* all tracks done */ + if (--level == 0) + state = -1; + else + state++; + break; + default: + state = unexpect(c, state, level); + } + dev->track++; + break; + } } /* Save derived values. */ dev->tracks = dev->track; - dev->sides = dev->side; + dev->sides = dev->side; - return(1); + return (1); } - /* Seek the heads to a track, and prepare to read data from that track. */ static void json_seek(int drive, int track) { - uint8_t id[4] = { 0,0,0,0 }; - json_t *dev = images[drive]; - int side, sector; - int rate, gap2, gap3, pos; - int ssize, rsec, asec; + uint8_t id[4] = { 0, 0, 0, 0 }; + json_t *dev = images[drive]; + int side, sector; + int rate, gap2, gap3, pos; + int ssize, rsec, asec; if (dev->f == NULL) { - json_log("JSON: seek: no file loaded!\n"); - return; + json_log("JSON: seek: no file loaded!\n"); + return; } /* Allow for doublestepping tracks. */ - if (! dev->track_width && fdd_doublestep_40(drive)) track /= 2; + if (!dev->track_width && fdd_doublestep_40(drive)) + track /= 2; /* Set the new track. */ dev->track = track; @@ -416,134 +410,127 @@ json_seek(int drive, int track) d86f_destroy_linked_lists(drive, 1); if (track > dev->tracks) { - d86f_zero_track(drive); - return; + d86f_zero_track(drive); + return; } - for (side=0; sidesides; side++) { - /* Get transfer rate for this side. */ - rate = dev->track_flags & 0x07; - if (!rate && (dev->track_flags & 0x20)) rate = 4; + for (side = 0; side < dev->sides; side++) { + /* Get transfer rate for this side. */ + rate = dev->track_flags & 0x07; + if (!rate && (dev->track_flags & 0x20)) + rate = 4; - /* Get correct GAP3 value for this side. */ - gap3 = fdd_get_gap3_size(rate, - dev->sects[track][side][0].size, - dev->spt[track][side]); + /* Get correct GAP3 value for this side. */ + gap3 = fdd_get_gap3_size(rate, + dev->sects[track][side][0].size, + dev->spt[track][side]); - /* Get correct GAP2 value for this side. */ - gap2 = ((dev->track_flags & 0x07) >= 3) ? 41 : 22; + /* Get correct GAP2 value for this side. */ + gap2 = ((dev->track_flags & 0x07) >= 3) ? 41 : 22; - pos = d86f_prepare_pretrack(drive, side, 0); + pos = d86f_prepare_pretrack(drive, side, 0); - for (sector=0; sectorspt[track][side]; sector++) { - rsec = dev->sects[track][side][sector].sector; - asec = sector; + for (sector = 0; sector < dev->spt[track][side]; sector++) { + rsec = dev->sects[track][side][sector].sector; + asec = sector; - id[0] = track; - id[1] = side; - id[2] = rsec; - if (dev->sects[track][side][asec].size > 255) - perror("fdd_json.c: json_seek: sector size too big."); - id[3] = dev->sects[track][side][asec].size & 0xff; - ssize = fdd_sector_code_size(dev->sects[track][side][asec].size & 0xff); + id[0] = track; + id[1] = side; + id[2] = rsec; + if (dev->sects[track][side][asec].size > 255) + perror("fdd_json.c: json_seek: sector size too big."); + id[3] = dev->sects[track][side][asec].size & 0xff; + ssize = fdd_sector_code_size(dev->sects[track][side][asec].size & 0xff); - pos = d86f_prepare_sector( - drive, side, pos, id, - dev->sects[track][side][asec].data, - ssize, gap2, gap3, - 0 /*flags*/ - ); + pos = d86f_prepare_sector( + drive, side, pos, id, + dev->sects[track][side][asec].data, + ssize, gap2, gap3, + 0 /*flags*/ + ); - if (sector == 0) - d86f_initialize_last_sector_id(drive,id[0],id[1],id[2],id[3]); - } + if (sector == 0) + d86f_initialize_last_sector_id(drive, id[0], id[1], id[2], id[3]); + } } } - static uint16_t disk_flags(int drive) { json_t *dev = images[drive]; - return(dev->disk_flags); + return (dev->disk_flags); } - static uint16_t track_flags(int drive) { json_t *dev = images[drive]; - return(dev->track_flags); + return (dev->track_flags); } - static void set_sector(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n) { json_t *dev = images[drive]; - int i; + int i; dev->sector[side] = 0; /* Make sure we are on the desired track. */ - if (c != dev->track) return; + if (c != dev->track) + return; /* Set the desired side. */ dev->side = side; /* Now loop over all sector ID's on this side to find our sector. */ - for (i=0; ispt[c][side]; i++) { - if ((dev->sects[dev->track][side][i].track == c) && - (dev->sects[dev->track][side][i].side == h) && - (dev->sects[dev->track][side][i].sector == r) && - (dev->sects[dev->track][side][i].size == n)) { - dev->sector[side] = i; - } + for (i = 0; i < dev->spt[c][side]; i++) { + if ((dev->sects[dev->track][side][i].track == c) && (dev->sects[dev->track][side][i].side == h) && (dev->sects[dev->track][side][i].sector == r) && (dev->sects[dev->track][side][i].size == n)) { + dev->sector[side] = i; + } } } - static uint8_t poll_read_data(int drive, int side, uint16_t pos) { json_t *dev = images[drive]; uint8_t sec = dev->sector[side]; - return(dev->sects[dev->track][side][sec].data[pos]); + return (dev->sects[dev->track][side][sec].data[pos]); } - void json_init(void) { memset(images, 0x00, sizeof(images)); } - void json_load(int drive, char *fn) { - double bit_rate; - int temp_rate; + double bit_rate; + int temp_rate; sector_t *sec; - json_t *dev; - int i; + json_t *dev; + int i; /* Just in case- remove ourselves from 86F. */ d86f_unregister(drive); /* Allocate a drive block. */ - dev = (json_t *)malloc(sizeof(json_t)); + dev = (json_t *) malloc(sizeof(json_t)); memset(dev, 0x00, sizeof(json_t)); /* Open the image file. */ dev->f = plat_fopen(fn, "rb"); if (dev->f == NULL) { - free(dev); - memset(fn, 0x00, sizeof(char)); - return; + free(dev); + memset(fn, 0x00, sizeof(char)); + return; } /* Our images are always RO. */ @@ -553,17 +540,17 @@ json_load(int drive, char *fn) images[drive] = dev; /* Load all sectors from the image file. */ - if (! load_image(dev)) { - json_log("JSON: failed to initialize\n"); - (void)fclose(dev->f); - free(dev); - images[drive] = NULL; - memset(fn, 0x00, sizeof(char)); - return; + if (!load_image(dev)) { + json_log("JSON: failed to initialize\n"); + (void) fclose(dev->f); + free(dev); + images[drive] = NULL; + memset(fn, 0x00, sizeof(char)); + return; } json_log("JSON(%d): %s (%i tracks, %i sides, %i sectors)\n", - drive, fn, dev->tracks, dev->sides, dev->spt[0][0]); + drive, fn, dev->tracks, dev->sides, dev->spt[0][0]); /* * If the image has more than 43 tracks, then @@ -574,7 +561,7 @@ json_load(int drive, char *fn) /* If the image has 2 sides, mark it as such. */ dev->disk_flags = 0x00; if (dev->sides == 2) - dev->disk_flags |= 0x08; + dev->disk_flags |= 0x08; /* JSON files are always assumed to be MFM-encoded. */ dev->track_flags = 0x08; @@ -585,94 +572,91 @@ json_load(int drive, char *fn) #endif temp_rate = 0xff; - sec = &dev->sects[0][0][0]; - for (i=0; i<6; i++) { - if (dev->spt[0][0] > fdd_max_sectors[sec->size][i]) continue; + sec = &dev->sects[0][0][0]; + for (i = 0; i < 6; i++) { + if (dev->spt[0][0] > fdd_max_sectors[sec->size][i]) + continue; - bit_rate = fdd_bit_rates_300[i]; - temp_rate = fdd_rates[i]; - dev->disk_flags |= (fdd_holes[i] << 1); + bit_rate = fdd_bit_rates_300[i]; + temp_rate = fdd_rates[i]; + dev->disk_flags |= (fdd_holes[i] << 1); - if ((bit_rate == 500.0) && (dev->spt[0][0] == 21) && - (sec->size == 2) && (dev->tracks >= 80) && - (dev->tracks <= 82) && (dev->sides == 2)) { - /* - * This is a DMF floppy, set the flag so - * we know to interleave the sectors. - */ - dev->dmf = 1; - } else { - if ((bit_rate == 500.0) && (dev->spt[0][0] == 22) && - (sec->size == 2) && (dev->tracks >= 80) && - (dev->tracks <= 82) && (dev->sides == 2)) { - /* - * This is marked specially because of the - * track flag (a RPM slow down is needed). - */ - dev->interleave = 2; - } + if ((bit_rate == 500.0) && (dev->spt[0][0] == 21) && (sec->size == 2) && (dev->tracks >= 80) && (dev->tracks <= 82) && (dev->sides == 2)) { + /* + * This is a DMF floppy, set the flag so + * we know to interleave the sectors. + */ + dev->dmf = 1; + } else { + if ((bit_rate == 500.0) && (dev->spt[0][0] == 22) && (sec->size == 2) && (dev->tracks >= 80) && (dev->tracks <= 82) && (dev->sides == 2)) { + /* + * This is marked specially because of the + * track flag (a RPM slow down is needed). + */ + dev->interleave = 2; + } - dev->dmf = 0; - } + dev->dmf = 0; + } - break; + break; } if (temp_rate == 0xff) { - json_log("JSON: invalid image (temp_rate=0xff)\n"); - (void)fclose(dev->f); - dev->f = NULL; - free(dev); - images[drive] = NULL; - memset(fn, 0x00, sizeof(char)); - return; + json_log("JSON: invalid image (temp_rate=0xff)\n"); + (void) fclose(dev->f); + dev->f = NULL; + free(dev); + images[drive] = NULL; + memset(fn, 0x00, sizeof(char)); + return; } if (dev->interleave == 2) { - dev->interleave = 1; - dev->disk_flags |= 0x60; + dev->interleave = 1; + dev->disk_flags |= 0x60; } dev->gap2_len = (temp_rate == 3) ? 41 : 22; if (dev->dmf) - dev->gap3_len = 8; - else - dev->gap3_len = fdd_get_gap3_size(temp_rate,sec->size,dev->spt[0][0]); + dev->gap3_len = 8; + else + dev->gap3_len = fdd_get_gap3_size(temp_rate, sec->size, dev->spt[0][0]); - if (! dev->gap3_len) { - json_log("JSON: image of unknown format was inserted into drive %c:!\n", - 'C'+drive); - (void)fclose(dev->f); - dev->f = NULL; - free(dev); - images[drive] = NULL; - memset(fn, 0x00, sizeof(char)); - return; + if (!dev->gap3_len) { + json_log("JSON: image of unknown format was inserted into drive %c:!\n", + 'C' + drive); + (void) fclose(dev->f); + dev->f = NULL; + free(dev); + images[drive] = NULL; + memset(fn, 0x00, sizeof(char)); + return; } - dev->track_flags |= (temp_rate & 0x03); /* data rate */ + dev->track_flags |= (temp_rate & 0x03); /* data rate */ if (temp_rate & 0x04) - dev->track_flags |= 0x20; /* RPM */ + dev->track_flags |= 0x20; /* RPM */ json_log(" disk_flags: 0x%02x, track_flags: 0x%02x, GAP3 length: %i\n", - dev->disk_flags, dev->track_flags, dev->gap3_len); + dev->disk_flags, dev->track_flags, dev->gap3_len); json_log(" bit rate 300: %.2f, temporary rate: %i, hole: %i, DMF: %i\n", - bit_rate, temp_rate, (dev->disk_flags >> 1), dev->dmf); + bit_rate, temp_rate, (dev->disk_flags >> 1), dev->dmf); /* Set up handlers for 86F layer. */ - d86f_handler[drive].disk_flags = disk_flags; - d86f_handler[drive].side_flags = track_flags; - d86f_handler[drive].writeback = null_writeback; - d86f_handler[drive].set_sector = set_sector; - d86f_handler[drive].read_data = poll_read_data; - d86f_handler[drive].write_data = null_write_data; + d86f_handler[drive].disk_flags = disk_flags; + d86f_handler[drive].side_flags = track_flags; + d86f_handler[drive].writeback = null_writeback; + d86f_handler[drive].set_sector = set_sector; + d86f_handler[drive].read_data = poll_read_data; + d86f_handler[drive].write_data = null_write_data; d86f_handler[drive].format_conditions = null_format_conditions; - d86f_handler[drive].extra_bit_cells = null_extra_bit_cells; - d86f_handler[drive].encoded_data = common_encoded_data; - d86f_handler[drive].read_revolution = common_read_revolution; - d86f_handler[drive].index_hole_pos = null_index_hole_pos; - d86f_handler[drive].get_raw_size = common_get_raw_size; - d86f_handler[drive].check_crc = 1; + d86f_handler[drive].extra_bit_cells = null_extra_bit_cells; + d86f_handler[drive].encoded_data = common_encoded_data; + d86f_handler[drive].read_revolution = common_read_revolution; + d86f_handler[drive].index_hole_pos = null_index_hole_pos; + d86f_handler[drive].get_raw_size = common_get_raw_size; + d86f_handler[drive].check_crc = 1; d86f_set_version(drive, 0x0063); d86f_common_handlers(drive); @@ -680,33 +664,33 @@ json_load(int drive, char *fn) drives[drive].seek = json_seek; } - /* Close the image. */ void json_close(int drive) { json_t *dev = images[drive]; - int t, h, s; + int t, h, s; - if (dev == NULL) return; + if (dev == NULL) + return; /* Unlink image from the system. */ d86f_unregister(drive); /* Release all the sector buffers. */ - for (t=0; t<256; t++) { - for (h=0; h<2; h++) { - memset(dev->sects[t][h], 0x00, sizeof(sector_t)); - for (s=0; s<256; s++) { - if (dev->sects[t][h][s].data != NULL) - free(dev->sects[t][h][s].data); - dev->sects[t][h][s].data = NULL; - } - } + for (t = 0; t < 256; t++) { + for (h = 0; h < 2; h++) { + memset(dev->sects[t][h], 0x00, sizeof(sector_t)); + for (s = 0; s < 256; s++) { + if (dev->sects[t][h][s].data != NULL) + free(dev->sects[t][h][s].data); + dev->sects[t][h][s].data = NULL; + } + } } if (dev->f != NULL) - (void)fclose(dev->f); + (void) fclose(dev->f); /* Release the memory. */ free(dev); diff --git a/src/floppy/fdd_mfm.c b/src/floppy/fdd_mfm.c index a16314ba2..e8a0336ef 100644 --- a/src/floppy/fdd_mfm.c +++ b/src/floppy/fdd_mfm.c @@ -31,177 +31,165 @@ #include <86box/fdd_mfm.h> #include <86box/fdc.h> - -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { - uint8_t hdr_name[7]; + uint8_t hdr_name[7]; - uint16_t tracks_no; - uint8_t sides_no; + uint16_t tracks_no; + uint8_t sides_no; - uint16_t rpm; - uint16_t bit_rate; - uint8_t if_type; + uint16_t rpm; + uint16_t bit_rate; + uint8_t if_type; - uint32_t track_list_offset; + uint32_t track_list_offset; } mfm_header_t; typedef struct { - uint16_t track_no; - uint8_t side_no; - uint32_t track_size; - uint32_t track_offset; + uint16_t track_no; + uint8_t side_no; + uint32_t track_size; + uint32_t track_offset; } mfm_track_t; typedef struct { - uint16_t track_no; - uint8_t side_no; - uint16_t rpm; - uint16_t bit_rate; - uint32_t track_size; - uint32_t track_offset; + uint16_t track_no; + uint8_t side_no; + uint16_t rpm; + uint16_t bit_rate; + uint32_t track_size; + uint32_t track_offset; } mfm_adv_track_t; #pragma pack(pop) typedef struct { - FILE *f; + FILE *f; - mfm_header_t hdr; - mfm_track_t *tracks; - mfm_adv_track_t *adv_tracks; + mfm_header_t hdr; + mfm_track_t *tracks; + mfm_adv_track_t *adv_tracks; - uint16_t disk_flags, pad; - uint16_t side_flags[2]; + uint16_t disk_flags, pad; + uint16_t side_flags[2]; - int br_rounded, rpm_rounded, - total_tracks, cur_track; + int br_rounded, rpm_rounded, + total_tracks, cur_track; - uint8_t track_data[2][256*1024]; + uint8_t track_data[2][256 * 1024]; } mfm_t; - -static mfm_t *mfm[FDD_NUM]; -static fdc_t *mfm_fdc; - +static mfm_t *mfm[FDD_NUM]; +static fdc_t *mfm_fdc; #ifdef ENABLE_MFM_LOG int mfm_do_log = ENABLE_MFM_LOG; - static void mfm_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (mfm_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (mfm_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define mfm_log(fmt, ...) +# define mfm_log(fmt, ...) #endif - static int get_track_index(int drive, int side, int track) { mfm_t *dev = mfm[drive]; - int i, ret = -1; + int i, ret = -1; for (i = 0; i < dev->total_tracks; i++) { - if ((dev->tracks[i].track_no == track) && - (dev->tracks[i].side_no == side)) { - ret = i; - break; - } + if ((dev->tracks[i].track_no == track) && (dev->tracks[i].side_no == side)) { + ret = i; + break; + } } return ret; } - static int get_adv_track_index(int drive, int side, int track) { mfm_t *dev = mfm[drive]; - int i, ret = -1; + int i, ret = -1; for (i = 0; i < dev->total_tracks; i++) { - if ((dev->adv_tracks[i].track_no == track) && - (dev->adv_tracks[i].side_no == side)) { - ret = i; - break; - } + if ((dev->adv_tracks[i].track_no == track) && (dev->adv_tracks[i].side_no == side)) { + ret = i; + break; + } } return ret; } - static void get_adv_track_bitrate(int drive, int side, int track, int *br, int *rpm) { mfm_t *dev = mfm[drive]; - int track_index; + int track_index; double dbr; track_index = get_adv_track_index(drive, side, track); if (track_index == -1) { - *br = 250; - *rpm = 300; + *br = 250; + *rpm = 300; } else { - dbr = round(((double) dev->adv_tracks[track_index].bit_rate) / 50.0) * 50.0; - *br = ((int) dbr); - dbr = round(((double) dev->adv_tracks[track_index].rpm) / 60.0) * 60.0; - *rpm = ((int) dbr); + dbr = round(((double) dev->adv_tracks[track_index].bit_rate) / 50.0) * 50.0; + *br = ((int) dbr); + dbr = round(((double) dev->adv_tracks[track_index].rpm) / 60.0) * 60.0; + *rpm = ((int) dbr); } } - static void set_disk_flags(int drive) { - int br = 250, rpm = 300; - mfm_t *dev = mfm[drive]; - uint16_t temp_disk_flags = 0x1080; /* We ALWAYS claim to have extra bit cells, even if the actual amount is 0; - Bit 12 = 1, bits 6, 5 = 0 - extra bit cells field specifies the entire - amount of bit cells per track. */ + int br = 250, rpm = 300; + mfm_t *dev = mfm[drive]; + uint16_t temp_disk_flags = 0x1080; /* We ALWAYS claim to have extra bit cells, even if the actual amount is 0; + Bit 12 = 1, bits 6, 5 = 0 - extra bit cells field specifies the entire + amount of bit cells per track. */ /* If this is the modified MFM format, get bit rate (and RPM) from track 0 instead. */ if (dev->hdr.if_type & 0x80) - get_adv_track_bitrate(drive, 0, 0, &br, &rpm); + get_adv_track_bitrate(drive, 0, 0, &br, &rpm); else { - br = dev->br_rounded; - rpm = dev->rpm_rounded; + br = dev->br_rounded; + rpm = dev->rpm_rounded; } switch (br) { - case 500: - temp_disk_flags |= 2; - break; + case 500: + temp_disk_flags |= 2; + break; - case 300: - case 250: - default: - temp_disk_flags |= 0; - break; + case 300: + case 250: + default: + temp_disk_flags |= 0; + break; - case 1000: - temp_disk_flags |= 4; - break; + case 1000: + temp_disk_flags |= 4; + break; } if (dev->hdr.sides_no == 2) - temp_disk_flags |= 8; + temp_disk_flags |= 8; dev->disk_flags = temp_disk_flags; } - static uint16_t disk_flags(int drive) { @@ -210,48 +198,47 @@ disk_flags(int drive) return dev->disk_flags; } - static void set_side_flags(int drive, int side) { - mfm_t *dev = mfm[drive]; + mfm_t *dev = mfm[drive]; uint16_t temp_side_flags = 0; - int br = 250, rpm = 300; + int br = 250, rpm = 300; if (dev->hdr.if_type & 0x80) - get_adv_track_bitrate(drive, side, dev->cur_track, &br, &rpm); + get_adv_track_bitrate(drive, side, dev->cur_track, &br, &rpm); else { - br = dev->br_rounded; - rpm = dev->rpm_rounded; + br = dev->br_rounded; + rpm = dev->rpm_rounded; } /* 300 kbps @ 360 rpm = 250 kbps @ 200 rpm */ if ((br == 300) && (rpm == 360)) { - br = 250; - rpm = 300; + br = 250; + rpm = 300; } switch (br) { - case 500: - temp_side_flags = 0; - break; + case 500: + temp_side_flags = 0; + break; - case 300: - temp_side_flags = 1; - break; + case 300: + temp_side_flags = 1; + break; - case 250: - default: - temp_side_flags = 2; - break; + case 250: + default: + temp_side_flags = 2; + break; - case 1000: - temp_side_flags = 3; - break; + case 1000: + temp_side_flags = 3; + break; } if (rpm == 360) - temp_side_flags |= 0x20; + temp_side_flags |= 0x20; /* * Set the encoding value to match that provided by the FDC. @@ -262,112 +249,106 @@ set_side_flags(int drive, int side) dev->side_flags[side] = temp_side_flags; } - static uint16_t side_flags(int drive) { mfm_t *dev = mfm[drive]; - int side; + int side; side = fdd_get_head(drive); return dev->side_flags[side]; } - static uint32_t get_raw_size(int drive, int side) { mfm_t *dev = mfm[drive]; - int track_index, is_300_rpm; - int br = 250, rpm = 300; + int track_index, is_300_rpm; + int br = 250, rpm = 300; if (dev->hdr.if_type & 0x80) { - track_index = get_adv_track_index(drive, side, dev->cur_track); - get_adv_track_bitrate(drive, 0, 0, &br, &rpm); + track_index = get_adv_track_index(drive, side, dev->cur_track); + get_adv_track_bitrate(drive, 0, 0, &br, &rpm); } else { - track_index = get_track_index(drive, side, dev->cur_track); - br = dev->br_rounded; - rpm = dev->rpm_rounded; + track_index = get_track_index(drive, side, dev->cur_track); + br = dev->br_rounded; + rpm = dev->rpm_rounded; } is_300_rpm = (rpm == 300); if (track_index == -1) { - mfm_log("MFM: Unable to find track (%i, %i)\n", dev->cur_track, side); - switch (br) { - case 250: - default: - return is_300_rpm ? 100000 : 83333; - case 300: - return is_300_rpm ? 120000 : 100000; - case 500: - return is_300_rpm ? 200000 : 166666; - case 1000: - return is_300_rpm ? 400000 : 333333; - } + mfm_log("MFM: Unable to find track (%i, %i)\n", dev->cur_track, side); + switch (br) { + case 250: + default: + return is_300_rpm ? 100000 : 83333; + case 300: + return is_300_rpm ? 120000 : 100000; + case 500: + return is_300_rpm ? 200000 : 166666; + case 1000: + return is_300_rpm ? 400000 : 333333; + } } /* Bit 7 on - my extension of the HxC MFM format to output exact bitcell counts for each track instead of rounded byte counts. */ if (dev->hdr.if_type & 0x80) - return dev->adv_tracks[track_index].track_size; + return dev->adv_tracks[track_index].track_size; else - return dev->tracks[track_index].track_size * 8; + return dev->tracks[track_index].track_size * 8; } - static int32_t extra_bit_cells(int drive, int side) { return (int32_t) get_raw_size(drive, side); } - static uint16_t * encoded_data(int drive, int side) { mfm_t *dev = mfm[drive]; - return((uint16_t *)dev->track_data[side]); + return ((uint16_t *) dev->track_data[side]); } - void mfm_read_side(int drive, int side) { mfm_t *dev = mfm[drive]; - int track_index, track_size; - int track_bytes, ret; + int track_index, track_size; + int track_bytes, ret; if (dev->hdr.if_type & 0x80) - track_index = get_adv_track_index(drive, side, dev->cur_track); + track_index = get_adv_track_index(drive, side, dev->cur_track); else - track_index = get_track_index(drive, side, dev->cur_track); + track_index = get_track_index(drive, side, dev->cur_track); - track_size = get_raw_size(drive, side); + track_size = get_raw_size(drive, side); track_bytes = track_size >> 3; if (track_size & 0x07) - track_bytes++; + track_bytes++; if (track_index == -1) - memset(dev->track_data[side], 0x00, track_bytes); + memset(dev->track_data[side], 0x00, track_bytes); else { - if (dev->hdr.if_type & 0x80) - ret = fseek(dev->f, dev->adv_tracks[track_index].track_offset, SEEK_SET); - else - ret = fseek(dev->f, dev->tracks[track_index].track_offset, SEEK_SET); - if (ret == -1) - fatal("mfm_read_side(): Error seeking to the beginning of the file\n"); - if (fread(dev->track_data[side], 1, track_bytes, dev->f) != track_bytes) - fatal("mfm_read_side(): Error reading track bytes\n"); + if (dev->hdr.if_type & 0x80) + ret = fseek(dev->f, dev->adv_tracks[track_index].track_offset, SEEK_SET); + else + ret = fseek(dev->f, dev->tracks[track_index].track_offset, SEEK_SET); + if (ret == -1) + fatal("mfm_read_side(): Error seeking to the beginning of the file\n"); + if (fread(dev->track_data[side], 1, track_bytes, dev->f) != track_bytes) + fatal("mfm_read_side(): Error reading track bytes\n"); } mfm_log("drive = %i, side = %i, dev->cur_track = %i, track_index = %i, track_size = %i\n", - drive, side, dev->cur_track, track_index, track_size); + drive, side, dev->cur_track, track_index, track_size); } - void mfm_seek(int drive, int track) { @@ -376,18 +357,18 @@ mfm_seek(int drive, int track) mfm_log("mfm_seek(%i, %i)\n", drive, track); if (fdd_doublestep_40(drive)) { - if (dev->hdr.tracks_no <= 43) - track /= 2; + if (dev->hdr.tracks_no <= 43) + track /= 2; } dev->cur_track = track; d86f_set_cur_track(drive, track); if (dev->f == NULL) - return; + return; if (track < 0) - track = 0; + track = 0; mfm_read_side(drive, 0); mfm_read_side(drive, 1); @@ -396,25 +377,24 @@ mfm_seek(int drive, int track) set_side_flags(drive, 1); } - void mfm_load(int drive, char *fn) { mfm_t *dev; double dbr; - int i, size; + int i, size; writeprot[drive] = fwriteprot[drive] = 1; /* Allocate a drive block. */ - dev = (mfm_t *)malloc(sizeof(mfm_t)); + dev = (mfm_t *) malloc(sizeof(mfm_t)); memset(dev, 0x00, sizeof(mfm_t)); dev->f = plat_fopen(fn, "rb"); if (dev->f == NULL) { - free(dev); - memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); - return; + free(dev); + memset(floppyfns[drive], 0, sizeof(floppyfns[drive])); + return; } d86f_unregister(drive); @@ -422,20 +402,20 @@ mfm_load(int drive, char *fn) /* Read the header. */ size = sizeof(mfm_header_t); if (fread(&dev->hdr, 1, size, dev->f) != size) - fatal("mfm_load(): Error reading header\n"); + fatal("mfm_load(): Error reading header\n"); /* Calculate tracks * sides, allocate the tracks array, and read it. */ dev->total_tracks = dev->hdr.tracks_no * dev->hdr.sides_no; if (dev->hdr.if_type & 0x80) { - dev->adv_tracks = (mfm_adv_track_t *) malloc(dev->total_tracks * sizeof(mfm_adv_track_t)); - size = dev->total_tracks * sizeof(mfm_adv_track_t); - if (fread(dev->adv_tracks, 1, size, dev->f) != size) - fatal("mfm_load(): Error reading advanced tracks\n"); + dev->adv_tracks = (mfm_adv_track_t *) malloc(dev->total_tracks * sizeof(mfm_adv_track_t)); + size = dev->total_tracks * sizeof(mfm_adv_track_t); + if (fread(dev->adv_tracks, 1, size, dev->f) != size) + fatal("mfm_load(): Error reading advanced tracks\n"); } else { - dev->tracks = (mfm_track_t *) malloc(dev->total_tracks * sizeof(mfm_track_t)); - size = dev->total_tracks * sizeof(mfm_track_t); - if (fread(dev->tracks, 1, size, dev->f) != size) - fatal("mfm_load(): Error reading tracks\n"); + dev->tracks = (mfm_track_t *) malloc(dev->total_tracks * sizeof(mfm_track_t)); + size = dev->total_tracks * sizeof(mfm_track_t); + if (fread(dev->tracks, 1, size, dev->f) != size) + fatal("mfm_load(): Error reading tracks\n"); } /* The chances of finding a HxC MFM image of a single-sided thin track @@ -444,30 +424,30 @@ mfm_load(int drive, char *fn) side and 80+ tracks instead of 2 sides and <= 43 tracks, so if we have detected such an image, convert the track numbers. */ if ((dev->hdr.tracks_no > 43) && (dev->hdr.sides_no == 1)) { - dev->hdr.tracks_no >>= 1; - dev->hdr.sides_no <<= 1; + dev->hdr.tracks_no >>= 1; + dev->hdr.sides_no <<= 1; - for (i = 0; i < dev->total_tracks; i++) { - if (dev->hdr.if_type & 0x80) { - dev->adv_tracks[i].side_no <<= 1; - dev->adv_tracks[i].side_no |= (dev->adv_tracks[i].track_no & 1); - dev->adv_tracks[i].track_no >>= 1; - } else { - dev->tracks[i].side_no <<= 1; - dev->tracks[i].side_no |= (dev->tracks[i].track_no & 1); - dev->tracks[i].track_no >>= 1; - } - } + for (i = 0; i < dev->total_tracks; i++) { + if (dev->hdr.if_type & 0x80) { + dev->adv_tracks[i].side_no <<= 1; + dev->adv_tracks[i].side_no |= (dev->adv_tracks[i].track_no & 1); + dev->adv_tracks[i].track_no >>= 1; + } else { + dev->tracks[i].side_no <<= 1; + dev->tracks[i].side_no |= (dev->tracks[i].track_no & 1); + dev->tracks[i].track_no >>= 1; + } + } } if (!(dev->hdr.if_type & 0x80)) { - dbr = round(((double) dev->hdr.bit_rate) / 50.0) * 50.0; - dev->br_rounded = (int) dbr; - mfm_log("Rounded bit rate: %i kbps\n", dev->br_rounded); + dbr = round(((double) dev->hdr.bit_rate) / 50.0) * 50.0; + dev->br_rounded = (int) dbr; + mfm_log("Rounded bit rate: %i kbps\n", dev->br_rounded); - dbr = round(((double) dev->hdr.rpm) / 60.0) * 60.0; - dev->rpm_rounded = (int) dbr; - mfm_log("Rounded RPM: %i kbps\n", dev->rpm_rounded); + dbr = round(((double) dev->hdr.rpm) / 60.0) * 60.0; + dev->rpm_rounded = (int) dbr; + mfm_log("Rounded RPM: %i kbps\n", dev->rpm_rounded); } /* Set up the drive unit. */ @@ -476,18 +456,18 @@ mfm_load(int drive, char *fn) set_disk_flags(drive); /* Attach this format to the D86F engine. */ - d86f_handler[drive].disk_flags = disk_flags; - d86f_handler[drive].side_flags = side_flags; - d86f_handler[drive].writeback = null_writeback; - d86f_handler[drive].set_sector = null_set_sector; - d86f_handler[drive].write_data = null_write_data; + d86f_handler[drive].disk_flags = disk_flags; + d86f_handler[drive].side_flags = side_flags; + d86f_handler[drive].writeback = null_writeback; + d86f_handler[drive].set_sector = null_set_sector; + d86f_handler[drive].write_data = null_write_data; d86f_handler[drive].format_conditions = null_format_conditions; - d86f_handler[drive].extra_bit_cells = extra_bit_cells; - d86f_handler[drive].encoded_data = encoded_data; - d86f_handler[drive].read_revolution = common_read_revolution; - d86f_handler[drive].index_hole_pos = null_index_hole_pos; - d86f_handler[drive].get_raw_size = get_raw_size; - d86f_handler[drive].check_crc = 1; + d86f_handler[drive].extra_bit_cells = extra_bit_cells; + d86f_handler[drive].encoded_data = encoded_data; + d86f_handler[drive].read_revolution = common_read_revolution; + d86f_handler[drive].index_hole_pos = null_index_hole_pos; + d86f_handler[drive].get_raw_size = get_raw_size; + d86f_handler[drive].check_crc = 1; d86f_set_version(drive, D86FVER); d86f_common_handlers(drive); @@ -497,35 +477,34 @@ mfm_load(int drive, char *fn) mfm_log("Loaded as MFM\n"); } - void mfm_close(int drive) { mfm_t *dev = mfm[drive]; - if (dev == NULL) return; + if (dev == NULL) + return; d86f_unregister(drive); drives[drive].seek = NULL; if (dev->tracks) - free(dev->tracks); + free(dev->tracks); if (dev->adv_tracks) - free(dev->adv_tracks); + free(dev->adv_tracks); if (dev->f) - fclose(dev->f); + fclose(dev->f); /* Release the memory. */ free(dev); mfm[drive] = NULL; } - void mfm_set_fdc(void *fdc) { - mfm_fdc = (fdc_t *)fdc; + mfm_fdc = (fdc_t *) fdc; } diff --git a/src/floppy/fdi2raw.c b/src/floppy/fdi2raw.c index 04c422d21..daebebf98 100644 --- a/src/floppy/fdi2raw.c +++ b/src/floppy/fdi2raw.c @@ -40,311 +40,324 @@ #include <86box/86box.h> #include - #undef DEBUG #define VERBOSE #undef VERBOSE - #ifdef ENABLE_FDI2RAW_LOG int fdi2raw_do_log = ENABLE_FDI2RAW_LOG; - static void fdi2raw_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (fdi2raw_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (fdi2raw_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define fdi2raw_log(fmt, ...) +# define fdi2raw_log(fmt, ...) #endif - #ifdef ENABLE_FDI2RAW_LOG -#ifdef DEBUG -static char *datalog(uae_u8 *src, int len) +# ifdef DEBUG +static char * +datalog(uae_u8 *src, int len) { - static char buf[1000]; - static int offset; - int i = 0, offset2; + static char buf[1000]; + static int offset; + int i = 0, offset2; - offset2 = offset; - buf[offset++]='\''; - while(len--) { - sprintf (buf + offset, "%02.2X", src[i]); - offset += 2; - i++; - if (i > 10) break; - } - buf[offset++]='\''; - buf[offset++] = 0; - if (offset >= 900) offset = 0; - return buf + offset2; + offset2 = offset; + buf[offset++] = '\''; + while (len--) { + sprintf(buf + offset, "%02.2X", src[i]); + offset += 2; + i++; + if (i > 10) + break; + } + buf[offset++] = '\''; + buf[offset++] = 0; + if (offset >= 900) + offset = 0; + return buf + offset2; } -#else -static char *datalog(uae_u8 *src, int len) { return ""; } -#endif +# else +static char * +datalog(uae_u8 *src, int len) +{ + return ""; +} +# endif static int fdi_allocated; #endif #ifdef DEBUG -static void fdi_free (void *p) +static void +fdi_free(void *p) { - int size; - if (!p) - return; - size = ((int*)p)[-1]; - fdi_allocated -= size; - write_log ("%d freed (%d)\n", size, fdi_allocated); - free ((int*)p - 1); + int size; + if (!p) + return; + size = ((int *) p)[-1]; + fdi_allocated -= size; + write_log("%d freed (%d)\n", size, fdi_allocated); + free((int *) p - 1); } -static void *fdi_malloc (int size) +static void * +fdi_malloc(int size) { - void *p = xmalloc (size + sizeof (int)); - ((int*)p)[0] = size; - fdi_allocated += size; - write_log ("%d allocated (%d)\n", size, fdi_allocated); - return (int*)p + 1; + void *p = xmalloc(size + sizeof(int)); + ((int *) p)[0] = size; + fdi_allocated += size; + write_log("%d allocated (%d)\n", size, fdi_allocated); + return (int *) p + 1; } #else -#define fdi_free free -#define fdi_malloc xmalloc +# define fdi_free free +# define fdi_malloc xmalloc #endif -#define MAX_SRC_BUFFER 4194304 -#define MAX_DST_BUFFER 40000 +#define MAX_SRC_BUFFER 4194304 +#define MAX_DST_BUFFER 40000 #define MAX_MFM_SYNC_BUFFER 60000 -#define MAX_TIMING_BUFFER 400000 -#define MAX_TRACKS 166 +#define MAX_TIMING_BUFFER 400000 +#define MAX_TRACKS 166 struct fdi_cache { - uae_u32 *avgp, *minp, *maxp; - uae_u8 *idxp; - int avg_free, idx_free, min_free, max_free; - uae_u32 totalavg, pulses, maxidx, indexoffset; - int weakbits; - int lowlevel; + uae_u32 *avgp, *minp, *maxp; + uae_u8 *idxp; + int avg_free, idx_free, min_free, max_free; + uae_u32 totalavg, pulses, maxidx, indexoffset; + int weakbits; + int lowlevel; }; struct fdi { - uae_u8 *track_src_buffer; - uae_u8 *track_src; - int track_src_len; - uae_u8 *track_dst_buffer; - uae_u8 *track_dst; - uae_u16 *track_dst_buffer_timing; - uae_u8 track_len; - uae_u8 track_type; - int current_track; - int last_track; - int last_head; - int rotation_speed; - int bit_rate; - int disk_type; - int write_protect; - int err; - uae_u8 header[2048]; - int track_offsets[MAX_TRACKS]; - FILE *file; - int out; - int mfmsync_offset; - int *mfmsync_buffer; - /* sector described only */ - int index_offset; - int encoding_type; - /* bit handling */ - int nextdrop; - struct fdi_cache cache[MAX_TRACKS]; + uae_u8 *track_src_buffer; + uae_u8 *track_src; + int track_src_len; + uae_u8 *track_dst_buffer; + uae_u8 *track_dst; + uae_u16 *track_dst_buffer_timing; + uae_u8 track_len; + uae_u8 track_type; + int current_track; + int last_track; + int last_head; + int rotation_speed; + int bit_rate; + int disk_type; + int write_protect; + int err; + uae_u8 header[2048]; + int track_offsets[MAX_TRACKS]; + FILE *file; + int out; + int mfmsync_offset; + int *mfmsync_buffer; + /* sector described only */ + int index_offset; + int encoding_type; + /* bit handling */ + int nextdrop; + struct fdi_cache cache[MAX_TRACKS]; }; -#define get_u32(x) ((((x)[0])<<24)|(((x)[1])<<16)|(((x)[2])<<8)|((x)[3])) -#define get_u24(x) ((((x)[0])<<16)|(((x)[1])<<8)|((x)[2])) -STATIC_INLINE void put_u32 (uae_u8 *d, uae_u32 v) +#define get_u32(x) ((((x)[0]) << 24) | (((x)[1]) << 16) | (((x)[2]) << 8) | ((x)[3])) +#define get_u24(x) ((((x)[0]) << 16) | (((x)[1]) << 8) | ((x)[2])) +STATIC_INLINE void +put_u32(uae_u8 *d, uae_u32 v) { - d[0] = v >> 24; - d[1] = v >> 16; - d[2] = v >> 8; - d[3] = v; + d[0] = v >> 24; + d[1] = v >> 16; + d[2] = v >> 8; + d[3] = v; } struct node { - uae_u16 v; - struct node *left; - struct node *right; + uae_u16 v; + struct node *left; + struct node *right; }; typedef struct node NODE; static uae_u8 temp, temp2; -static uae_u8 *expand_tree (uae_u8 *stream, NODE *node) +static uae_u8 * +expand_tree(uae_u8 *stream, NODE *node) { - if (temp & temp2) { - if (node->left) { - fdi_free (node->left); - node->left = 0; - } - if (node->right) { - fdi_free (node->right); - node->right = 0; - } - temp2 >>= 1; - if (!temp2) { - temp = *stream++; - temp2 = 0x80; - } - return stream; - } else { - uae_u8 *stream_temp; - temp2 >>= 1; - if (!temp2) { - temp = *stream++; - temp2 = 0x80; - } - node->left = fdi_malloc (sizeof (NODE)); - memset (node->left, 0, sizeof (NODE)); - stream_temp = expand_tree (stream, node->left); - node->right = fdi_malloc (sizeof (NODE)); - memset (node->right, 0, sizeof (NODE)); - return expand_tree (stream_temp, node->right); - } + if (temp & temp2) { + if (node->left) { + fdi_free(node->left); + node->left = 0; + } + if (node->right) { + fdi_free(node->right); + node->right = 0; + } + temp2 >>= 1; + if (!temp2) { + temp = *stream++; + temp2 = 0x80; + } + return stream; + } else { + uae_u8 *stream_temp; + temp2 >>= 1; + if (!temp2) { + temp = *stream++; + temp2 = 0x80; + } + node->left = fdi_malloc(sizeof(NODE)); + memset(node->left, 0, sizeof(NODE)); + stream_temp = expand_tree(stream, node->left); + node->right = fdi_malloc(sizeof(NODE)); + memset(node->right, 0, sizeof(NODE)); + return expand_tree(stream_temp, node->right); + } } -static uae_u8 *values_tree8 (uae_u8 *stream, NODE *node) +static uae_u8 * +values_tree8(uae_u8 *stream, NODE *node) { - if (node->left == 0) { - node->v = *stream++; - return stream; - } else { - uae_u8 *stream_temp = values_tree8 (stream, node->left); - return values_tree8 (stream_temp, node->right); - } + if (node->left == 0) { + node->v = *stream++; + return stream; + } else { + uae_u8 *stream_temp = values_tree8(stream, node->left); + return values_tree8(stream_temp, node->right); + } } -static uae_u8 *values_tree16 (uae_u8 *stream, NODE *node) +static uae_u8 * +values_tree16(uae_u8 *stream, NODE *node) { - if (node->left == 0) { - uae_u16 high_8_bits = (*stream++) << 8; - node->v = high_8_bits | (*stream++); - return stream; - } else { - uae_u8 *stream_temp = values_tree16 (stream, node->left); - return values_tree16 (stream_temp, node->right); - } + if (node->left == 0) { + uae_u16 high_8_bits = (*stream++) << 8; + node->v = high_8_bits | (*stream++); + return stream; + } else { + uae_u8 *stream_temp = values_tree16(stream, node->left); + return values_tree16(stream_temp, node->right); + } } -static void free_nodes (NODE *node) +static void +free_nodes(NODE *node) { - if (node) { - free_nodes (node->left); - free_nodes (node->right); - fdi_free (node); - } + if (node) { + free_nodes(node->left); + free_nodes(node->right); + fdi_free(node); + } } -static uae_u32 sign_extend16 (uae_u32 v) +static uae_u32 +sign_extend16(uae_u32 v) { - if (v & 0x8000) - v |= 0xffff0000; - return v; + if (v & 0x8000) + v |= 0xffff0000; + return v; } -static uae_u32 sign_extend8 (uae_u32 v) +static uae_u32 +sign_extend8(uae_u32 v) { - if (v & 0x80) - v |= 0xffffff00; - return v; + if (v & 0x80) + v |= 0xffffff00; + return v; } -static void fdi_decode (uae_u8 *stream, int size, uae_u8 *out) +static void +fdi_decode(uae_u8 *stream, int size, uae_u8 *out) { - int i; - uae_u8 sign_extend, sixteen_bit, sub_stream_shift; - NODE root; - NODE *current_node; + int i; + uae_u8 sign_extend, sixteen_bit, sub_stream_shift; + NODE root; + NODE *current_node; - memset (out, 0, size * 4); - sub_stream_shift = 1; - while (sub_stream_shift) { + memset(out, 0, size * 4); + sub_stream_shift = 1; + while (sub_stream_shift) { - /* sub-stream header decode */ - sign_extend = *stream++; - sub_stream_shift = sign_extend & 0x7f; - sign_extend &= 0x80; - sixteen_bit = (*stream++) & 0x80; + /* sub-stream header decode */ + sign_extend = *stream++; + sub_stream_shift = sign_extend & 0x7f; + sign_extend &= 0x80; + sixteen_bit = (*stream++) & 0x80; - /* huffman tree architecture decode */ - temp = *stream++; - temp2 = 0x80; - stream = expand_tree (stream, &root); - if (temp2 == 0x80) - stream--; + /* huffman tree architecture decode */ + temp = *stream++; + temp2 = 0x80; + stream = expand_tree(stream, &root); + if (temp2 == 0x80) + stream--; - /* huffman output values decode */ - if (sixteen_bit) - stream = values_tree16 (stream, &root); - else - stream = values_tree8 (stream, &root); + /* huffman output values decode */ + if (sixteen_bit) + stream = values_tree16(stream, &root); + else + stream = values_tree8(stream, &root); - /* sub-stream data decode */ - temp2 = 0; - for (i = 0; i < size; i++) { - uae_u32 v; - uae_u8 decode = 1; - current_node = &root; - while (decode) { - if (current_node->left == 0) { - decode = 0; - } else { - temp2 >>= 1; - if (!temp2) { - temp2 = 0x80; - temp = *stream++; - } - if (temp & temp2) - current_node = current_node->right; - else - current_node = current_node->left; - } - } - v = ((uae_u32*)out)[i]; - if (sign_extend) { - if (sixteen_bit) - v |= sign_extend16 (current_node->v) << sub_stream_shift; - else - v |= sign_extend8 (current_node->v) << sub_stream_shift; - } else { - v |= current_node->v << sub_stream_shift; - } - ((uae_u32*)out)[i] = v; - } - free_nodes (root.left); - root.left = 0; - free_nodes (root.right); - root.right = 0; - } + /* sub-stream data decode */ + temp2 = 0; + for (i = 0; i < size; i++) { + uae_u32 v; + uae_u8 decode = 1; + current_node = &root; + while (decode) { + if (current_node->left == 0) { + decode = 0; + } else { + temp2 >>= 1; + if (!temp2) { + temp2 = 0x80; + temp = *stream++; + } + if (temp & temp2) + current_node = current_node->right; + else + current_node = current_node->left; + } + } + v = ((uae_u32 *) out)[i]; + if (sign_extend) { + if (sixteen_bit) + v |= sign_extend16(current_node->v) << sub_stream_shift; + else + v |= sign_extend8(current_node->v) << sub_stream_shift; + } else { + v |= current_node->v << sub_stream_shift; + } + ((uae_u32 *) out)[i] = v; + } + free_nodes(root.left); + root.left = 0; + free_nodes(root.right); + root.right = 0; + } } - -static int decode_raw_track (FDI *fdi) +static int +decode_raw_track(FDI *fdi) { - int size = get_u32(fdi->track_src); - memcpy (fdi->track_dst, fdi->track_src, (size + 7) >> 3); - fdi->track_src += (size + 7) >> 3; - return size; + int size = get_u32(fdi->track_src); + memcpy(fdi->track_dst, fdi->track_src, (size + 7) >> 3); + fdi->track_src += (size + 7) >> 3; + return size; } /* unknown track */ -static void zxx (FDI *fdi) +static void +zxx(FDI *fdi) { - fdi2raw_log("track %d: unknown track type 0x%02.2X\n", fdi->current_track, fdi->track_type); + fdi2raw_log("track %d: unknown track type 0x%02.2X\n", fdi->current_track, fdi->track_type); } /* unsupported track */ #if 0 @@ -354,231 +367,274 @@ static void zyy (FDI *fdi) } #endif /* empty track */ -static void track_empty (FDI *fdi) +static void +track_empty(FDI *fdi) { - return; + return; } /* unknown sector described type */ -static void dxx (FDI *fdi) +static void +dxx(FDI *fdi) { - fdi2raw_log("\ntrack %d: unknown sector described type 0x%02.2X\n", fdi->current_track, fdi->track_type); - fdi->err = 1; + fdi2raw_log("\ntrack %d: unknown sector described type 0x%02.2X\n", fdi->current_track, fdi->track_type); + fdi->err = 1; } /* add position of mfm sync bit */ -static void add_mfm_sync_bit (FDI *fdi) +static void +add_mfm_sync_bit(FDI *fdi) { - if (fdi->nextdrop) { - fdi->nextdrop = 0; - return; - } - fdi->mfmsync_buffer[fdi->mfmsync_offset++] = fdi->out; - if (fdi->out == 0) { - fdi2raw_log("illegal position for mfm sync bit, offset=%d\n",fdi->out); - fdi->err = 1; - } - if (fdi->mfmsync_offset >= MAX_MFM_SYNC_BUFFER) { - fdi->mfmsync_offset = 0; - fdi2raw_log("mfmsync buffer overflow\n"); - fdi->err = 1; - } - fdi->out++; + if (fdi->nextdrop) { + fdi->nextdrop = 0; + return; + } + fdi->mfmsync_buffer[fdi->mfmsync_offset++] = fdi->out; + if (fdi->out == 0) { + fdi2raw_log("illegal position for mfm sync bit, offset=%d\n", fdi->out); + fdi->err = 1; + } + if (fdi->mfmsync_offset >= MAX_MFM_SYNC_BUFFER) { + fdi->mfmsync_offset = 0; + fdi2raw_log("mfmsync buffer overflow\n"); + fdi->err = 1; + } + fdi->out++; } #define BIT_BYTEOFFSET ((fdi->out) >> 3) -#define BIT_BITOFFSET (7-((fdi->out)&7)) +#define BIT_BITOFFSET (7 - ((fdi->out) & 7)) /* add one bit */ -static void bit_add (FDI *fdi, int bit) +static void +bit_add(FDI *fdi, int bit) { - if (fdi->nextdrop) { - fdi->nextdrop = 0; - return; - } - fdi->track_dst[BIT_BYTEOFFSET] &= ~(1 << BIT_BITOFFSET); - if (bit) - fdi->track_dst[BIT_BYTEOFFSET] |= (1 << BIT_BITOFFSET); - fdi->out++; - if (fdi->out >= MAX_DST_BUFFER * 8) { - fdi2raw_log("destination buffer overflow\n"); - fdi->err = 1; - fdi->out = 1; - } + if (fdi->nextdrop) { + fdi->nextdrop = 0; + return; + } + fdi->track_dst[BIT_BYTEOFFSET] &= ~(1 << BIT_BITOFFSET); + if (bit) + fdi->track_dst[BIT_BYTEOFFSET] |= (1 << BIT_BITOFFSET); + fdi->out++; + if (fdi->out >= MAX_DST_BUFFER * 8) { + fdi2raw_log("destination buffer overflow\n"); + fdi->err = 1; + fdi->out = 1; + } } /* add bit and mfm sync bit */ -static void bit_mfm_add (FDI *fdi, int bit) +static void +bit_mfm_add(FDI *fdi, int bit) { - add_mfm_sync_bit (fdi); - bit_add (fdi, bit); + add_mfm_sync_bit(fdi); + bit_add(fdi, bit); } /* remove following bit */ -static void bit_drop_next (FDI *fdi) +static void +bit_drop_next(FDI *fdi) { - if (fdi->nextdrop > 0) { - fdi2raw_log("multiple bit_drop_next() called"); - } else if (fdi->nextdrop < 0) { - fdi->nextdrop = 0; - fdi2raw_log(":DNN:"); - return; - } - fdi2raw_log(":DN:"); - fdi->nextdrop = 1; + if (fdi->nextdrop > 0) { + fdi2raw_log("multiple bit_drop_next() called"); + } else if (fdi->nextdrop < 0) { + fdi->nextdrop = 0; + fdi2raw_log(":DNN:"); + return; + } + fdi2raw_log(":DN:"); + fdi->nextdrop = 1; } /* ignore next bit_drop_next() */ -static void bit_dedrop (FDI *fdi) +static void +bit_dedrop(FDI *fdi) { - if (fdi->nextdrop) { - fdi2raw_log("bit_drop_next called before bit_dedrop"); - } - fdi->nextdrop = -1; - fdi2raw_log(":BDD:"); + if (fdi->nextdrop) { + fdi2raw_log("bit_drop_next called before bit_dedrop"); + } + fdi->nextdrop = -1; + fdi2raw_log(":BDD:"); } /* add one byte */ -static void byte_add (FDI *fdi, uae_u8 v) +static void +byte_add(FDI *fdi, uae_u8 v) { - int i; - for (i = 7; i >= 0; i--) - bit_add (fdi, v & (1 << i)); + int i; + for (i = 7; i >= 0; i--) + bit_add(fdi, v & (1 << i)); } /* add one word */ -static void word_add (FDI *fdi, uae_u16 v) +static void +word_add(FDI *fdi, uae_u16 v) { - byte_add (fdi, (uae_u8)(v >> 8)); - byte_add (fdi, (uae_u8)v); + byte_add(fdi, (uae_u8) (v >> 8)); + byte_add(fdi, (uae_u8) v); } /* add one byte and mfm encode it */ -static void byte_mfm_add (FDI *fdi, uae_u8 v) +static void +byte_mfm_add(FDI *fdi, uae_u8 v) { - int i; - for (i = 7; i >= 0; i--) - bit_mfm_add (fdi, v & (1 << i)); + int i; + for (i = 7; i >= 0; i--) + bit_mfm_add(fdi, v & (1 << i)); } /* add multiple bytes and mfm encode them */ -static void bytes_mfm_add (FDI *fdi, uae_u8 v, int len) +static void +bytes_mfm_add(FDI *fdi, uae_u8 v, int len) { - int i; - for (i = 0; i < len; i++) byte_mfm_add (fdi, v); + int i; + for (i = 0; i < len; i++) + byte_mfm_add(fdi, v); } /* add one mfm encoded word and re-mfm encode it */ -static void word_post_mfm_add (FDI *fdi, uae_u16 v) +static void +word_post_mfm_add(FDI *fdi, uae_u16 v) { - int i; - for (i = 14; i >= 0; i -= 2) - bit_mfm_add (fdi, v & (1 << i)); + int i; + for (i = 14; i >= 0; i -= 2) + bit_mfm_add(fdi, v & (1 << i)); } /* bit 0 */ -static void s00(FDI *fdi) { bit_add (fdi, 0); } -/* bit 1*/ -static void s01(FDI *fdi) { bit_add (fdi, 1); } -/* 4489 */ -static void s02(FDI *fdi) { word_add (fdi, 0x4489); } -/* 5224 */ -static void s03(FDI *fdi) { word_add (fdi, 0x5224); } -/* mfm sync bit */ -static void s04(FDI *fdi) { add_mfm_sync_bit (fdi); } -/* RLE MFM-encoded data */ -static void s08(FDI *fdi) +static void +s00(FDI *fdi) { - int bytes = *fdi->track_src++; - uae_u8 byte = *fdi->track_src++; - if (bytes == 0) bytes = 256; - fdi2raw_log("s08:len=%d,data=%02.2X",bytes,byte); - while(bytes--) byte_add (fdi, byte); + bit_add(fdi, 0); +} +/* bit 1*/ +static void +s01(FDI *fdi) +{ + bit_add(fdi, 1); +} +/* 4489 */ +static void +s02(FDI *fdi) +{ + word_add(fdi, 0x4489); +} +/* 5224 */ +static void +s03(FDI *fdi) +{ + word_add(fdi, 0x5224); +} +/* mfm sync bit */ +static void +s04(FDI *fdi) +{ + add_mfm_sync_bit(fdi); +} +/* RLE MFM-encoded data */ +static void +s08(FDI *fdi) +{ + int bytes = *fdi->track_src++; + uae_u8 byte = *fdi->track_src++; + if (bytes == 0) + bytes = 256; + fdi2raw_log("s08:len=%d,data=%02.2X", bytes, byte); + while (bytes--) + byte_add(fdi, byte); } /* RLE MFM-decoded data */ -static void s09(FDI *fdi) +static void +s09(FDI *fdi) { - int bytes = *fdi->track_src++; - uae_u8 byte = *fdi->track_src++; - if (bytes == 0) bytes = 256; - bit_drop_next (fdi); - fdi2raw_log("s09:len=%d,data=%02.2X",bytes,byte); - while(bytes--) byte_mfm_add (fdi, byte); + int bytes = *fdi->track_src++; + uae_u8 byte = *fdi->track_src++; + if (bytes == 0) + bytes = 256; + bit_drop_next(fdi); + fdi2raw_log("s09:len=%d,data=%02.2X", bytes, byte); + while (bytes--) + byte_mfm_add(fdi, byte); } /* MFM-encoded data */ -static void s0a(FDI *fdi) +static void +s0a(FDI *fdi) { - int i, bits = (fdi->track_src[0] << 8) | fdi->track_src[1]; - uae_u8 b; - fdi->track_src += 2; - fdi2raw_log("s0a:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8)); - while (bits >= 8) { - byte_add (fdi, *fdi->track_src++); - bits -= 8; - } - if (bits > 0) { - i = 7; - b = *fdi->track_src++; - while (bits--) { - bit_add (fdi, b & (1 << i)); - i--; - } - } + int i, bits = (fdi->track_src[0] << 8) | fdi->track_src[1]; + uae_u8 b; + fdi->track_src += 2; + fdi2raw_log("s0a:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8)); + while (bits >= 8) { + byte_add(fdi, *fdi->track_src++); + bits -= 8; + } + if (bits > 0) { + i = 7; + b = *fdi->track_src++; + while (bits--) { + bit_add(fdi, b & (1 << i)); + i--; + } + } } /* MFM-encoded data */ -static void s0b(FDI *fdi) +static void +s0b(FDI *fdi) { - int i, bits = ((fdi->track_src[0] << 8) | fdi->track_src[1]) + 65536; - uae_u8 b; - fdi->track_src += 2; - fdi2raw_log("s0b:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8)); - while (bits >= 8) { - byte_add (fdi, *fdi->track_src++); - bits -= 8; - } - if (bits > 0) { - i = 7; - b = *fdi->track_src++; - while (bits--) { - bit_add (fdi, b & (1 << i)); - i--; - } - } + int i, bits = ((fdi->track_src[0] << 8) | fdi->track_src[1]) + 65536; + uae_u8 b; + fdi->track_src += 2; + fdi2raw_log("s0b:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8)); + while (bits >= 8) { + byte_add(fdi, *fdi->track_src++); + bits -= 8; + } + if (bits > 0) { + i = 7; + b = *fdi->track_src++; + while (bits--) { + bit_add(fdi, b & (1 << i)); + i--; + } + } } /* MFM-decoded data */ -static void s0c(FDI *fdi) +static void +s0c(FDI *fdi) { - int i, bits = (fdi->track_src[0] << 8) | fdi->track_src[1]; - uae_u8 b; - fdi->track_src += 2; - bit_drop_next (fdi); - fdi2raw_log("s0c:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8)); - while (bits >= 8) { - byte_mfm_add (fdi, *fdi->track_src++); - bits -= 8; - } - if (bits > 0) { - i = 7; - b = *fdi->track_src++; - while(bits--) { - bit_mfm_add (fdi, b & (1 << i)); - i--; - } - } + int i, bits = (fdi->track_src[0] << 8) | fdi->track_src[1]; + uae_u8 b; + fdi->track_src += 2; + bit_drop_next(fdi); + fdi2raw_log("s0c:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8)); + while (bits >= 8) { + byte_mfm_add(fdi, *fdi->track_src++); + bits -= 8; + } + if (bits > 0) { + i = 7; + b = *fdi->track_src++; + while (bits--) { + bit_mfm_add(fdi, b & (1 << i)); + i--; + } + } } /* MFM-decoded data */ -static void s0d(FDI *fdi) +static void +s0d(FDI *fdi) { - int i, bits = ((fdi->track_src[0] << 8) | fdi->track_src[1]) + 65536; - uae_u8 b; - fdi->track_src += 2; - bit_drop_next (fdi); - fdi2raw_log("s0d:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8)); - while (bits >= 8) { - byte_mfm_add (fdi, *fdi->track_src++); - bits -= 8; - } - if (bits > 0) { - i = 7; - b = *fdi->track_src++; - while(bits--) { - bit_mfm_add (fdi, b & (1 << i)); - i--; - } - } + int i, bits = ((fdi->track_src[0] << 8) | fdi->track_src[1]) + 65536; + uae_u8 b; + fdi->track_src += 2; + bit_drop_next(fdi); + fdi2raw_log("s0d:bits=%d,data=%s", bits, datalog(fdi->track_src, (bits + 7) / 8)); + while (bits >= 8) { + byte_mfm_add(fdi, *fdi->track_src++); + bits -= 8; + } + if (bits > 0) { + i = 7; + b = *fdi->track_src++; + while (bits--) { + bit_mfm_add(fdi, b & (1 << i)); + i--; + } + } } /* ***** */ @@ -589,32 +645,32 @@ static void s0d(FDI *fdi) /*static void rotateonebit (uae_u8 *start, uae_u8 *end, int shift) { - if (shift == 0) - return; - while (start <= end) { - start[0] <<= shift; - start[0] |= start[1] >> (8 - shift); - start++; - } + if (shift == 0) + return; + while (start <= end) { + start[0] <<= shift; + start[0] |= start[1] >> (8 - shift); + start++; + } }*/ /*static uae_u16 getmfmword (uae_u8 *mbuf) { - uae_u32 v; + uae_u32 v; - v = (mbuf[0] << 8) | (mbuf[1] << 0); - if (check_offset == 0) - return v; - v <<= 8; - v |= mbuf[2]; - v >>= check_offset; - return v; + v = (mbuf[0] << 8) | (mbuf[1] << 0); + if (check_offset == 0) + return v; + v <<= 8; + v |= mbuf[2]; + v >>= check_offset; + return v; }*/ #define MFMMASK 0x55555555 /*static uae_u32 getmfmlong (uae_u8 * mbuf) { - return ((getmfmword (mbuf) << 16) | getmfmword (mbuf + 2)) & MFMMASK; + return ((getmfmword (mbuf) << 16) | getmfmword (mbuf + 2)) & MFMMASK; }*/ #if 0 @@ -640,7 +696,7 @@ static int amiga_check_track (FDI *fdi) for (i = 0; i < (fdi->out + 7) / 8; i++) *mbuf++ = raw[i]; off = fdi->out & 7; -#if 1 +# if 1 if (off > 0) { mbuf--; *mbuf &= ~((1 << (8 - off)) - 1); @@ -651,7 +707,7 @@ static int amiga_check_track (FDI *fdi) j++; i++; } -#endif +# endif mbuf = bigmfmbuf; memset (sectable, 0, sizeof (sectable)); @@ -774,616 +830,661 @@ static int amiga_check_track (FDI *fdi) } #endif -static void amiga_data_raw (FDI *fdi, uae_u8 *secbuf, uae_u8 *crc, int len) +static void +amiga_data_raw(FDI *fdi, uae_u8 *secbuf, uae_u8 *crc, int len) { - int i; - uae_u8 crcbuf[4]; + int i; + uae_u8 crcbuf[4]; - if (!crc) { - memset (crcbuf, 0, 4); - } else { - memcpy (crcbuf, crc ,4); - } - for (i = 0; i < 4; i++) - byte_mfm_add (fdi, crcbuf[i]); - for (i = 0; i < len; i++) - byte_mfm_add (fdi, secbuf[i]); + if (!crc) { + memset(crcbuf, 0, 4); + } else { + memcpy(crcbuf, crc, 4); + } + for (i = 0; i < 4; i++) + byte_mfm_add(fdi, crcbuf[i]); + for (i = 0; i < len; i++) + byte_mfm_add(fdi, secbuf[i]); } -static void amiga_data (FDI *fdi, uae_u8 *secbuf) +static void +amiga_data(FDI *fdi, uae_u8 *secbuf) { - uae_u16 mfmbuf[4 + 512]; - uae_u32 dodd, deven, dck; - int i; + uae_u16 mfmbuf[4 + 512]; + uae_u32 dodd, deven, dck; + int i; - for (i = 0; i < 512; i += 4) { - deven = ((secbuf[i + 0] << 24) | (secbuf[i + 1] << 16) - | (secbuf[i + 2] << 8) | (secbuf[i + 3])); - dodd = deven >> 1; - deven &= 0x55555555; - dodd &= 0x55555555; - mfmbuf[(i >> 1) + 4] = (uae_u16) (dodd >> 16); - mfmbuf[(i >> 1) + 5] = (uae_u16) dodd; - mfmbuf[(i >> 1) + 256 + 4] = (uae_u16) (deven >> 16); - mfmbuf[(i >> 1) + 256 + 5] = (uae_u16) deven; - } - dck = 0; - for (i = 4; i < 4 + 512; i += 2) - dck ^= (mfmbuf[i] << 16) | mfmbuf[i + 1]; - deven = dodd = dck; - dodd >>= 1; - deven &= 0x55555555; - dodd &= 0x55555555; - mfmbuf[0] = (uae_u16) (dodd >> 16); - mfmbuf[1] = (uae_u16) dodd; - mfmbuf[2] = (uae_u16) (deven >> 16); - mfmbuf[3] = (uae_u16) deven; + for (i = 0; i < 512; i += 4) { + deven = ((secbuf[i + 0] << 24) | (secbuf[i + 1] << 16) + | (secbuf[i + 2] << 8) | (secbuf[i + 3])); + dodd = deven >> 1; + deven &= 0x55555555; + dodd &= 0x55555555; + mfmbuf[(i >> 1) + 4] = (uae_u16) (dodd >> 16); + mfmbuf[(i >> 1) + 5] = (uae_u16) dodd; + mfmbuf[(i >> 1) + 256 + 4] = (uae_u16) (deven >> 16); + mfmbuf[(i >> 1) + 256 + 5] = (uae_u16) deven; + } + dck = 0; + for (i = 4; i < 4 + 512; i += 2) + dck ^= (mfmbuf[i] << 16) | mfmbuf[i + 1]; + deven = dodd = dck; + dodd >>= 1; + deven &= 0x55555555; + dodd &= 0x55555555; + mfmbuf[0] = (uae_u16) (dodd >> 16); + mfmbuf[1] = (uae_u16) dodd; + mfmbuf[2] = (uae_u16) (deven >> 16); + mfmbuf[3] = (uae_u16) deven; - for (i = 0; i < 4 + 512; i ++) - word_post_mfm_add (fdi, mfmbuf[i]); + for (i = 0; i < 4 + 512; i++) + word_post_mfm_add(fdi, mfmbuf[i]); } -static void amiga_sector_header (FDI *fdi, uae_u8 *header, uae_u8 *data, int sector, int untilgap) +static void +amiga_sector_header(FDI *fdi, uae_u8 *header, uae_u8 *data, int sector, int untilgap) { - uae_u8 headerbuf[4], databuf[16]; - uae_u32 deven, dodd, hck; - uae_u16 mfmbuf[24]; - int i; + uae_u8 headerbuf[4], databuf[16]; + uae_u32 deven, dodd, hck; + uae_u16 mfmbuf[24]; + int i; - byte_mfm_add (fdi, 0); - byte_mfm_add (fdi, 0); - word_add (fdi, 0x4489); - word_add (fdi, 0x4489); - if (header) { - memcpy (headerbuf, header, 4); - } else { - headerbuf[0] = 0xff; - headerbuf[1] = (uae_u8)fdi->current_track; - headerbuf[2] = (uae_u8)sector; - headerbuf[3] = (uae_u8)untilgap; - } - if (data) - memcpy (databuf, data, 16); - else - memset (databuf, 0, 16); + byte_mfm_add(fdi, 0); + byte_mfm_add(fdi, 0); + word_add(fdi, 0x4489); + word_add(fdi, 0x4489); + if (header) { + memcpy(headerbuf, header, 4); + } else { + headerbuf[0] = 0xff; + headerbuf[1] = (uae_u8) fdi->current_track; + headerbuf[2] = (uae_u8) sector; + headerbuf[3] = (uae_u8) untilgap; + } + if (data) + memcpy(databuf, data, 16); + else + memset(databuf, 0, 16); - deven = ((headerbuf[0] << 24) | (headerbuf[1] << 16) - | (headerbuf[2] << 8) | (headerbuf[3])); - dodd = deven >> 1; - deven &= 0x55555555; - dodd &= 0x55555555; - mfmbuf[0] = (uae_u16) (dodd >> 16); - mfmbuf[1] = (uae_u16) dodd; - mfmbuf[2] = (uae_u16) (deven >> 16); - mfmbuf[3] = (uae_u16) deven; - for (i = 0; i < 16; i += 4) { - deven = ((databuf[i] << 24) | (databuf[i + 1] << 16) - | (databuf[i + 2] << 8) | (databuf[i + 3])); - dodd = deven >> 1; - deven &= 0x55555555; - dodd &= 0x55555555; - mfmbuf[(i >> 1) + 0 + 4] = (uae_u16) (dodd >> 16); - mfmbuf[(i >> 1) + 0 + 5] = (uae_u16) dodd; - mfmbuf[(i >> 1) + 8 + 4] = (uae_u16) (deven >> 16); - mfmbuf[(i >> 1) + 8 + 5] = (uae_u16) deven; - } - hck = 0; - for (i = 0; i < 4 + 16; i += 2) - hck ^= (mfmbuf[i] << 16) | mfmbuf[i + 1]; - deven = dodd = hck; - dodd >>= 1; - deven &= 0x55555555; - dodd &= 0x55555555; - mfmbuf[20] = (uae_u16) (dodd >> 16); - mfmbuf[21] = (uae_u16) dodd; - mfmbuf[22] = (uae_u16) (deven >> 16); - mfmbuf[23] = (uae_u16) deven; + deven = ((headerbuf[0] << 24) | (headerbuf[1] << 16) + | (headerbuf[2] << 8) | (headerbuf[3])); + dodd = deven >> 1; + deven &= 0x55555555; + dodd &= 0x55555555; + mfmbuf[0] = (uae_u16) (dodd >> 16); + mfmbuf[1] = (uae_u16) dodd; + mfmbuf[2] = (uae_u16) (deven >> 16); + mfmbuf[3] = (uae_u16) deven; + for (i = 0; i < 16; i += 4) { + deven = ((databuf[i] << 24) | (databuf[i + 1] << 16) + | (databuf[i + 2] << 8) | (databuf[i + 3])); + dodd = deven >> 1; + deven &= 0x55555555; + dodd &= 0x55555555; + mfmbuf[(i >> 1) + 0 + 4] = (uae_u16) (dodd >> 16); + mfmbuf[(i >> 1) + 0 + 5] = (uae_u16) dodd; + mfmbuf[(i >> 1) + 8 + 4] = (uae_u16) (deven >> 16); + mfmbuf[(i >> 1) + 8 + 5] = (uae_u16) deven; + } + hck = 0; + for (i = 0; i < 4 + 16; i += 2) + hck ^= (mfmbuf[i] << 16) | mfmbuf[i + 1]; + deven = dodd = hck; + dodd >>= 1; + deven &= 0x55555555; + dodd &= 0x55555555; + mfmbuf[20] = (uae_u16) (dodd >> 16); + mfmbuf[21] = (uae_u16) dodd; + mfmbuf[22] = (uae_u16) (deven >> 16); + mfmbuf[23] = (uae_u16) deven; - for (i = 0; i < 4 + 16 + 4; i ++) - word_post_mfm_add (fdi, mfmbuf[i]); + for (i = 0; i < 4 + 16 + 4; i++) + word_post_mfm_add(fdi, mfmbuf[i]); } /* standard super-extended Amiga sector header */ -static void s20(FDI *fdi) +static void +s20(FDI *fdi) { - bit_drop_next (fdi); - fdi2raw_log("s20:header=%s,data=%s", datalog(fdi->track_src, 4), datalog(fdi->track_src + 4, 16)); - amiga_sector_header (fdi, fdi->track_src, fdi->track_src + 4, 0, 0); - fdi->track_src += 4 + 16; + bit_drop_next(fdi); + fdi2raw_log("s20:header=%s,data=%s", datalog(fdi->track_src, 4), datalog(fdi->track_src + 4, 16)); + amiga_sector_header(fdi, fdi->track_src, fdi->track_src + 4, 0, 0); + fdi->track_src += 4 + 16; } /* standard extended Amiga sector header */ -static void s21(FDI *fdi) +static void +s21(FDI *fdi) { - bit_drop_next (fdi); - fdi2raw_log("s21:header=%s", datalog(fdi->track_src, 4)); - amiga_sector_header (fdi, fdi->track_src, 0, 0, 0); - fdi->track_src += 4; + bit_drop_next(fdi); + fdi2raw_log("s21:header=%s", datalog(fdi->track_src, 4)); + amiga_sector_header(fdi, fdi->track_src, 0, 0, 0); + fdi->track_src += 4; } /* standard Amiga sector header */ -static void s22(FDI *fdi) +static void +s22(FDI *fdi) { - bit_drop_next (fdi); - fdi2raw_log("s22:sector=%d,untilgap=%d", fdi->track_src[0], fdi->track_src[1]); - amiga_sector_header (fdi, 0, 0, fdi->track_src[0], fdi->track_src[1]); - fdi->track_src += 2; + bit_drop_next(fdi); + fdi2raw_log("s22:sector=%d,untilgap=%d", fdi->track_src[0], fdi->track_src[1]); + amiga_sector_header(fdi, 0, 0, fdi->track_src[0], fdi->track_src[1]); + fdi->track_src += 2; } /* standard 512-byte, CRC-correct Amiga data */ -static void s23(FDI *fdi) +static void +s23(FDI *fdi) { - fdi2raw_log("s23:data=%s", datalog (fdi->track_src, 512)); - amiga_data (fdi, fdi->track_src); - fdi->track_src += 512; + fdi2raw_log("s23:data=%s", datalog(fdi->track_src, 512)); + amiga_data(fdi, fdi->track_src); + fdi->track_src += 512; } /* not-decoded, 128*2^x-byte, CRC-correct Amiga data */ -static void s24(FDI *fdi) +static void +s24(FDI *fdi) { - int shift = *fdi->track_src++; - fdi2raw_log("s24:shift=%d,data=%s", shift, datalog (fdi->track_src, 128 << shift)); - amiga_data_raw (fdi, fdi->track_src, 0, 128 << shift); - fdi->track_src += 128 << shift; + int shift = *fdi->track_src++; + fdi2raw_log("s24:shift=%d,data=%s", shift, datalog(fdi->track_src, 128 << shift)); + amiga_data_raw(fdi, fdi->track_src, 0, 128 << shift); + fdi->track_src += 128 << shift; } /* not-decoded, 128*2^x-byte, CRC-incorrect Amiga data */ -static void s25(FDI *fdi) +static void +s25(FDI *fdi) { - int shift = *fdi->track_src++; - fdi2raw_log("s25:shift=%d,crc=%s,data=%s", shift, datalog (fdi->track_src, 4), datalog (fdi->track_src + 4, 128 << shift)); - amiga_data_raw (fdi, fdi->track_src + 4, fdi->track_src, 128 << shift); - fdi->track_src += 4 + (128 << shift); + int shift = *fdi->track_src++; + fdi2raw_log("s25:shift=%d,crc=%s,data=%s", shift, datalog(fdi->track_src, 4), datalog(fdi->track_src + 4, 128 << shift)); + amiga_data_raw(fdi, fdi->track_src + 4, fdi->track_src, 128 << shift); + fdi->track_src += 4 + (128 << shift); } /* standard extended Amiga sector */ -static void s26(FDI *fdi) +static void +s26(FDI *fdi) { - s21 (fdi); - fdi2raw_log("s26:data=%s", datalog (fdi->track_src, 512)); - amiga_data (fdi, fdi->track_src); - fdi->track_src += 512; + s21(fdi); + fdi2raw_log("s26:data=%s", datalog(fdi->track_src, 512)); + amiga_data(fdi, fdi->track_src); + fdi->track_src += 512; } /* standard short Amiga sector */ -static void s27(FDI *fdi) +static void +s27(FDI *fdi) { - s22 (fdi); - fdi2raw_log("s27:data=%s", datalog (fdi->track_src, 512)); - amiga_data (fdi, fdi->track_src); - fdi->track_src += 512; + s22(fdi); + fdi2raw_log("s27:data=%s", datalog(fdi->track_src, 512)); + amiga_data(fdi, fdi->track_src); + fdi->track_src += 512; } /* *** */ /* IBM */ /* *** */ -static uae_u16 ibm_crc (uae_u8 byte, int reset) +static uae_u16 +ibm_crc(uae_u8 byte, int reset) { - static uae_u16 crc; - int i; + static uae_u16 crc; + int i; - if (reset) crc = 0xcdb4; - for (i = 0; i < 8; i++) { - if (crc & 0x8000) { - crc <<= 1; - if (!(byte & 0x80)) crc ^= 0x1021; - } else { - crc <<= 1; - if (byte & 0x80) crc ^= 0x1021; - } - byte <<= 1; - } - return crc; + if (reset) + crc = 0xcdb4; + for (i = 0; i < 8; i++) { + if (crc & 0x8000) { + crc <<= 1; + if (!(byte & 0x80)) + crc ^= 0x1021; + } else { + crc <<= 1; + if (byte & 0x80) + crc ^= 0x1021; + } + byte <<= 1; + } + return crc; } -static void ibm_data (FDI *fdi, uae_u8 *data, uae_u8 *crc, int len) +static void +ibm_data(FDI *fdi, uae_u8 *data, uae_u8 *crc, int len) { - int i; - uae_u8 crcbuf[2]; - uae_u16 crcv = 0; + int i; + uae_u8 crcbuf[2]; + uae_u16 crcv = 0; - word_add (fdi, 0x4489); - word_add (fdi, 0x4489); - word_add (fdi, 0x4489); - byte_mfm_add (fdi, 0xfb); - ibm_crc (0xfb, 1); - for (i = 0; i < len; i++) { - byte_mfm_add (fdi, data[i]); - crcv = ibm_crc (data[i], 0); - } - if (!crc) { - crc = crcbuf; - crc[0] = (uae_u8)(crcv >> 8); - crc[1] = (uae_u8)crcv; - } - byte_mfm_add (fdi, crc[0]); - byte_mfm_add (fdi, crc[1]); + word_add(fdi, 0x4489); + word_add(fdi, 0x4489); + word_add(fdi, 0x4489); + byte_mfm_add(fdi, 0xfb); + ibm_crc(0xfb, 1); + for (i = 0; i < len; i++) { + byte_mfm_add(fdi, data[i]); + crcv = ibm_crc(data[i], 0); + } + if (!crc) { + crc = crcbuf; + crc[0] = (uae_u8) (crcv >> 8); + crc[1] = (uae_u8) crcv; + } + byte_mfm_add(fdi, crc[0]); + byte_mfm_add(fdi, crc[1]); } -static void ibm_sector_header (FDI *fdi, uae_u8 *data, uae_u8 *crc, int secnum, int pre) +static void +ibm_sector_header(FDI *fdi, uae_u8 *data, uae_u8 *crc, int secnum, int pre) { - uae_u8 secbuf[5]; - uae_u8 crcbuf[2]; - uae_u16 crcv; - int i; + uae_u8 secbuf[5]; + uae_u8 crcbuf[2]; + uae_u16 crcv; + int i; - if (pre) - bytes_mfm_add (fdi, 0, 12); - word_add (fdi, 0x4489); - word_add (fdi, 0x4489); - word_add (fdi, 0x4489); - secbuf[0] = 0xfe; - if (secnum >= 0) { - secbuf[1] = (uae_u8)(fdi->current_track/2); - secbuf[2] = (uae_u8)(fdi->current_track%2); - secbuf[3] = (uae_u8)secnum; - secbuf[4] = 2; - } else { - memcpy (secbuf + 1, data, 4); - } - ibm_crc (secbuf[0], 1); - ibm_crc (secbuf[1], 0); - ibm_crc (secbuf[2], 0); - ibm_crc (secbuf[3], 0); - crcv = ibm_crc (secbuf[4], 0); - if (crc) { - memcpy (crcbuf, crc, 2); - } else { - crcbuf[0] = (uae_u8)(crcv >> 8); - crcbuf[1] = (uae_u8)crcv; - } - /* data */ - for (i = 0;i < 5; i++) - byte_mfm_add (fdi, secbuf[i]); - /* crc */ - byte_mfm_add (fdi, crcbuf[0]); - byte_mfm_add (fdi, crcbuf[1]); + if (pre) + bytes_mfm_add(fdi, 0, 12); + word_add(fdi, 0x4489); + word_add(fdi, 0x4489); + word_add(fdi, 0x4489); + secbuf[0] = 0xfe; + if (secnum >= 0) { + secbuf[1] = (uae_u8) (fdi->current_track / 2); + secbuf[2] = (uae_u8) (fdi->current_track % 2); + secbuf[3] = (uae_u8) secnum; + secbuf[4] = 2; + } else { + memcpy(secbuf + 1, data, 4); + } + ibm_crc(secbuf[0], 1); + ibm_crc(secbuf[1], 0); + ibm_crc(secbuf[2], 0); + ibm_crc(secbuf[3], 0); + crcv = ibm_crc(secbuf[4], 0); + if (crc) { + memcpy(crcbuf, crc, 2); + } else { + crcbuf[0] = (uae_u8) (crcv >> 8); + crcbuf[1] = (uae_u8) crcv; + } + /* data */ + for (i = 0; i < 5; i++) + byte_mfm_add(fdi, secbuf[i]); + /* crc */ + byte_mfm_add(fdi, crcbuf[0]); + byte_mfm_add(fdi, crcbuf[1]); } /* standard IBM index address mark */ -static void s10(FDI *fdi) +static void +s10(FDI *fdi) { - bit_drop_next (fdi); - bytes_mfm_add (fdi, 0, 12); - word_add (fdi, 0x5224); - word_add (fdi, 0x5224); - word_add (fdi, 0x5224); - byte_mfm_add (fdi, 0xfc); + bit_drop_next(fdi); + bytes_mfm_add(fdi, 0, 12); + word_add(fdi, 0x5224); + word_add(fdi, 0x5224); + word_add(fdi, 0x5224); + byte_mfm_add(fdi, 0xfc); } /* standard IBM pre-gap */ -static void s11(FDI *fdi) +static void +s11(FDI *fdi) { - bit_drop_next (fdi); - bytes_mfm_add (fdi, 0x4e, 78); - bit_dedrop (fdi); - s10 (fdi); - bytes_mfm_add (fdi, 0x4e, 50); + bit_drop_next(fdi); + bytes_mfm_add(fdi, 0x4e, 78); + bit_dedrop(fdi); + s10(fdi); + bytes_mfm_add(fdi, 0x4e, 50); } /* standard ST pre-gap */ -static void s12(FDI *fdi) +static void +s12(FDI *fdi) { - bit_drop_next (fdi); - bytes_mfm_add (fdi, 0x4e, 78); + bit_drop_next(fdi); + bytes_mfm_add(fdi, 0x4e, 78); } /* standard extended IBM sector header */ -static void s13(FDI *fdi) +static void +s13(FDI *fdi) { - bit_drop_next (fdi); - fdi2raw_log("s13:header=%s", datalog (fdi->track_src, 4)); - ibm_sector_header (fdi, fdi->track_src, 0, -1, 1); - fdi->track_src += 4; + bit_drop_next(fdi); + fdi2raw_log("s13:header=%s", datalog(fdi->track_src, 4)); + ibm_sector_header(fdi, fdi->track_src, 0, -1, 1); + fdi->track_src += 4; } /* standard mini-extended IBM sector header */ -static void s14(FDI *fdi) +static void +s14(FDI *fdi) { - fdi2raw_log("s14:header=%s", datalog (fdi->track_src, 4)); - ibm_sector_header (fdi, fdi->track_src, 0, -1, 0); - fdi->track_src += 4; + fdi2raw_log("s14:header=%s", datalog(fdi->track_src, 4)); + ibm_sector_header(fdi, fdi->track_src, 0, -1, 0); + fdi->track_src += 4; } /* standard short IBM sector header */ -static void s15(FDI *fdi) +static void +s15(FDI *fdi) { - bit_drop_next (fdi); - fdi2raw_log("s15:sector=%d", *fdi->track_src); - ibm_sector_header (fdi, 0, 0, *fdi->track_src++, 1); + bit_drop_next(fdi); + fdi2raw_log("s15:sector=%d", *fdi->track_src); + ibm_sector_header(fdi, 0, 0, *fdi->track_src++, 1); } /* standard mini-short IBM sector header */ -static void s16(FDI *fdi) +static void +s16(FDI *fdi) { - fdi2raw_log("s16:track=%d", *fdi->track_src); - ibm_sector_header (fdi, 0, 0, *fdi->track_src++, 0); + fdi2raw_log("s16:track=%d", *fdi->track_src); + ibm_sector_header(fdi, 0, 0, *fdi->track_src++, 0); } /* standard CRC-incorrect mini-extended IBM sector header */ -static void s17(FDI *fdi) +static void +s17(FDI *fdi) { - fdi2raw_log("s17:header=%s,crc=%s", datalog (fdi->track_src, 4), datalog (fdi->track_src + 4, 2)); - ibm_sector_header (fdi, fdi->track_src, fdi->track_src + 4, -1, 0); - fdi->track_src += 4 + 2; + fdi2raw_log("s17:header=%s,crc=%s", datalog(fdi->track_src, 4), datalog(fdi->track_src + 4, 2)); + ibm_sector_header(fdi, fdi->track_src, fdi->track_src + 4, -1, 0); + fdi->track_src += 4 + 2; } /* standard CRC-incorrect mini-short IBM sector header */ -static void s18(FDI *fdi) +static void +s18(FDI *fdi) { - fdi2raw_log("s18:sector=%d,header=%s", *fdi->track_src, datalog (fdi->track_src + 1, 4)); - ibm_sector_header (fdi, 0, fdi->track_src + 1, *fdi->track_src, 0); - fdi->track_src += 1 + 4; + fdi2raw_log("s18:sector=%d,header=%s", *fdi->track_src, datalog(fdi->track_src + 1, 4)); + ibm_sector_header(fdi, 0, fdi->track_src + 1, *fdi->track_src, 0); + fdi->track_src += 1 + 4; } /* standard 512-byte CRC-correct IBM data */ -static void s19(FDI *fdi) +static void +s19(FDI *fdi) { - fdi2raw_log("s19:data=%s", datalog (fdi->track_src , 512)); - ibm_data (fdi, fdi->track_src, 0, 512); - fdi->track_src += 512; + fdi2raw_log("s19:data=%s", datalog(fdi->track_src, 512)); + ibm_data(fdi, fdi->track_src, 0, 512); + fdi->track_src += 512; } /* standard 128*2^x-byte-byte CRC-correct IBM data */ -static void s1a(FDI *fdi) +static void +s1a(FDI *fdi) { - int shift = *fdi->track_src++; - fdi2raw_log("s1a:shift=%d,data=%s", shift, datalog (fdi->track_src , 128 << shift)); - ibm_data (fdi, fdi->track_src, 0, 128 << shift); - fdi->track_src += 128 << shift; + int shift = *fdi->track_src++; + fdi2raw_log("s1a:shift=%d,data=%s", shift, datalog(fdi->track_src, 128 << shift)); + ibm_data(fdi, fdi->track_src, 0, 128 << shift); + fdi->track_src += 128 << shift; } /* standard 128*2^x-byte-byte CRC-incorrect IBM data */ -static void s1b(FDI *fdi) +static void +s1b(FDI *fdi) { - int shift = *fdi->track_src++; - fdi2raw_log("s1b:shift=%d,crc=%s,data=%s", shift, datalog (fdi->track_src + (128 << shift), 2), datalog (fdi->track_src , 128 << shift)); - ibm_data (fdi, fdi->track_src, fdi->track_src + (128 << shift), 128 << shift); - fdi->track_src += (128 << shift) + 2; + int shift = *fdi->track_src++; + fdi2raw_log("s1b:shift=%d,crc=%s,data=%s", shift, datalog(fdi->track_src + (128 << shift), 2), datalog(fdi->track_src, 128 << shift)); + ibm_data(fdi, fdi->track_src, fdi->track_src + (128 << shift), 128 << shift); + fdi->track_src += (128 << shift) + 2; } /* standard extended IBM sector */ -static void s1c(FDI *fdi) +static void +s1c(FDI *fdi) { - int shift = fdi->track_src[3]; - s13 (fdi); - bytes_mfm_add (fdi, 0x4e, 22); - bytes_mfm_add (fdi, 0x00, 12); - ibm_data (fdi, fdi->track_src, 0, 128 << shift); - fdi->track_src += 128 << shift; + int shift = fdi->track_src[3]; + s13(fdi); + bytes_mfm_add(fdi, 0x4e, 22); + bytes_mfm_add(fdi, 0x00, 12); + ibm_data(fdi, fdi->track_src, 0, 128 << shift); + fdi->track_src += 128 << shift; } /* standard short IBM sector */ -static void s1d(FDI *fdi) +static void +s1d(FDI *fdi) { - s15 (fdi); - bytes_mfm_add (fdi, 0x4e, 22); - bytes_mfm_add (fdi, 0x00, 12); - s19 (fdi); + s15(fdi); + bytes_mfm_add(fdi, 0x4e, 22); + bytes_mfm_add(fdi, 0x00, 12); + s19(fdi); } /* end marker */ -static void sff(FDI *fdi) +static void +sff(FDI *fdi) { } -typedef void (*decode_described_track_func)(FDI*); +typedef void (*decode_described_track_func)(FDI *); -static decode_described_track_func decode_sectors_described_track[] = -{ - s00,s01,s02,s03,s04,dxx,dxx,dxx,s08,s09,s0a,s0b,s0c,s0d,dxx,dxx, /* 00-0F */ - s10,s11,s12,s13,s14,s15,s16,s17,s18,s19,s1a,s1b,s1c,s1d,dxx,dxx, /* 10-1F */ - s20,s21,s22,s23,s24,s25,s26,s27,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx, /* 20-2F */ - dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx, /* 30-3F */ - dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx, /* 40-4F */ - dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx, /* 50-5F */ - dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx, /* 60-6F */ - dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx, /* 70-7F */ - dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx, /* 80-8F */ - dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx, /* 90-9F */ - dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx, /* A0-AF */ - dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx, /* B0-BF */ - dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx, /* C0-CF */ - dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx, /* D0-DF */ - dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx, /* E0-EF */ - dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,dxx,sff /* F0-FF */ +static decode_described_track_func decode_sectors_described_track[] = { + s00, s01, s02, s03, s04, dxx, dxx, dxx, s08, s09, s0a, s0b, s0c, s0d, dxx, dxx, /* 00-0F */ + s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s1a, s1b, s1c, s1d, dxx, dxx, /* 10-1F */ + s20, s21, s22, s23, s24, s25, s26, s27, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, /* 20-2F */ + dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, /* 30-3F */ + dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, /* 40-4F */ + dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, /* 50-5F */ + dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, /* 60-6F */ + dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, /* 70-7F */ + dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, /* 80-8F */ + dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, /* 90-9F */ + dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, /* A0-AF */ + dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, /* B0-BF */ + dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, /* C0-CF */ + dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, /* D0-DF */ + dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, /* E0-EF */ + dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, dxx, sff /* F0-FF */ }; -static void track_amiga (struct fdi *fdi, int first_sector, int max_sector) +static void +track_amiga(struct fdi *fdi, int first_sector, int max_sector) { - int i; + int i; - bit_add (fdi, 0); - bit_drop_next (fdi); - for (i = 0; i < max_sector; i++) { - amiga_sector_header (fdi, 0, 0, first_sector, max_sector - i); - amiga_data (fdi, fdi->track_src + first_sector * 512); - first_sector++; - if (first_sector >= max_sector) first_sector = 0; - } - bytes_mfm_add (fdi, 0, 260); /* gap */ + bit_add(fdi, 0); + bit_drop_next(fdi); + for (i = 0; i < max_sector; i++) { + amiga_sector_header(fdi, 0, 0, first_sector, max_sector - i); + amiga_data(fdi, fdi->track_src + first_sector * 512); + first_sector++; + if (first_sector >= max_sector) + first_sector = 0; + } + bytes_mfm_add(fdi, 0, 260); /* gap */ } -static void track_atari_st (struct fdi *fdi, int max_sector) +static void +track_atari_st(struct fdi *fdi, int max_sector) { - int i, gap3 = 0; - uae_u8 *p = fdi->track_src; + int i, gap3 = 0; + uae_u8 *p = fdi->track_src; - switch (max_sector) - { - case 9: - gap3 = 40; - break; - case 10: - gap3 = 24; - break; - } - s15 (fdi); - for (i = 0; i < max_sector; i++) { - byte_mfm_add (fdi, 0x4e); - byte_mfm_add (fdi, 0x4e); - ibm_sector_header (fdi, 0, 0, fdi->current_track, 1); - ibm_data (fdi, p + i * 512, 0, 512); - bytes_mfm_add (fdi, 0x4e, gap3); - } - bytes_mfm_add (fdi, 0x4e, 660 - gap3); - fdi->track_src += fdi->track_len * 256; + switch (max_sector) { + case 9: + gap3 = 40; + break; + case 10: + gap3 = 24; + break; + } + s15(fdi); + for (i = 0; i < max_sector; i++) { + byte_mfm_add(fdi, 0x4e); + byte_mfm_add(fdi, 0x4e); + ibm_sector_header(fdi, 0, 0, fdi->current_track, 1); + ibm_data(fdi, p + i * 512, 0, 512); + bytes_mfm_add(fdi, 0x4e, gap3); + } + bytes_mfm_add(fdi, 0x4e, 660 - gap3); + fdi->track_src += fdi->track_len * 256; } -static void track_pc (struct fdi *fdi, int max_sector) +static void +track_pc(struct fdi *fdi, int max_sector) { - int i, gap3; - uae_u8 *p = fdi->track_src; + int i, gap3; + uae_u8 *p = fdi->track_src; - switch (max_sector) - { - case 8: - gap3 = 116; - break; - case 9: - gap3 = 54; - break; - default: - gap3 = 100; /* fixme */ - break; - } - s11 (fdi); - for (i = 0; i < max_sector; i++) { - byte_mfm_add (fdi, 0x4e); - byte_mfm_add (fdi, 0x4e); - ibm_sector_header (fdi, 0, 0, fdi->current_track, 1); - ibm_data (fdi, p + i * 512, 0, 512); - bytes_mfm_add (fdi, 0x4e, gap3); - } - bytes_mfm_add (fdi, 0x4e, 600 - gap3); - fdi->track_src += fdi->track_len * 256; + switch (max_sector) { + case 8: + gap3 = 116; + break; + case 9: + gap3 = 54; + break; + default: + gap3 = 100; /* fixme */ + break; + } + s11(fdi); + for (i = 0; i < max_sector; i++) { + byte_mfm_add(fdi, 0x4e); + byte_mfm_add(fdi, 0x4e); + ibm_sector_header(fdi, 0, 0, fdi->current_track, 1); + ibm_data(fdi, p + i * 512, 0, 512); + bytes_mfm_add(fdi, 0x4e, gap3); + } + bytes_mfm_add(fdi, 0x4e, 600 - gap3); + fdi->track_src += fdi->track_len * 256; } /* amiga dd */ -static void track_amiga_dd (struct fdi *fdi) +static void +track_amiga_dd(struct fdi *fdi) { - uae_u8 *p = fdi->track_src; - track_amiga (fdi, fdi->track_len >> 4, 11); - fdi->track_src = p + (fdi->track_len & 15) * 512; + uae_u8 *p = fdi->track_src; + track_amiga(fdi, fdi->track_len >> 4, 11); + fdi->track_src = p + (fdi->track_len & 15) * 512; } /* amiga hd */ -static void track_amiga_hd (struct fdi *fdi) +static void +track_amiga_hd(struct fdi *fdi) { - uae_u8 *p = fdi->track_src; - track_amiga (fdi, 0, 22); - fdi->track_src = p + fdi->track_len * 256; + uae_u8 *p = fdi->track_src; + track_amiga(fdi, 0, 22); + fdi->track_src = p + fdi->track_len * 256; } /* atari st 9 sector */ -static void track_atari_st_9 (struct fdi *fdi) +static void +track_atari_st_9(struct fdi *fdi) { - track_atari_st (fdi, 9); + track_atari_st(fdi, 9); } /* atari st 10 sector */ -static void track_atari_st_10 (struct fdi *fdi) +static void +track_atari_st_10(struct fdi *fdi) { - track_atari_st (fdi, 10); + track_atari_st(fdi, 10); } /* pc 8 sector */ -static void track_pc_8 (struct fdi *fdi) +static void +track_pc_8(struct fdi *fdi) { - track_pc (fdi, 8); + track_pc(fdi, 8); } /* pc 9 sector */ -static void track_pc_9 (struct fdi *fdi) +static void +track_pc_9(struct fdi *fdi) { - track_pc (fdi, 9); + track_pc(fdi, 9); } /* pc 15 sector */ -static void track_pc_15 (struct fdi *fdi) +static void +track_pc_15(struct fdi *fdi) { - track_pc (fdi, 15); + track_pc(fdi, 15); } /* pc 18 sector */ -static void track_pc_18 (struct fdi *fdi) +static void +track_pc_18(struct fdi *fdi) { - track_pc (fdi, 18); + track_pc(fdi, 18); } /* pc 36 sector */ -static void track_pc_36 (struct fdi *fdi) +static void +track_pc_36(struct fdi *fdi) { - track_pc (fdi, 36); + track_pc(fdi, 36); } -typedef void (*decode_normal_track_func)(FDI*); +typedef void (*decode_normal_track_func)(FDI *); -static decode_normal_track_func decode_normal_track[] = -{ - track_empty, /* 0 */ - track_amiga_dd, track_amiga_hd, /* 1-2 */ - track_atari_st_9, track_atari_st_10, /* 3-4 */ - track_pc_8, track_pc_9, track_pc_15, track_pc_18, track_pc_36, /* 5-9 */ - zxx,zxx,zxx,zxx,zxx /* A-F */ +static decode_normal_track_func decode_normal_track[] = { + track_empty, /* 0 */ + track_amiga_dd, track_amiga_hd, /* 1-2 */ + track_atari_st_9, track_atari_st_10, /* 3-4 */ + track_pc_8, track_pc_9, track_pc_15, track_pc_18, track_pc_36, /* 5-9 */ + zxx, zxx, zxx, zxx, zxx /* A-F */ }; -static void fix_mfm_sync (FDI *fdi) +static void +fix_mfm_sync(FDI *fdi) { - int i, pos, off1, off2, off3, mask1, mask2, mask3; + int i, pos, off1, off2, off3, mask1, mask2, mask3; - for (i = 0; i < fdi->mfmsync_offset; i++) { - pos = fdi->mfmsync_buffer[i]; - off1 = (pos - 1) >> 3; - off2 = (pos + 1) >> 3; - off3 = pos >> 3; - mask1 = 1 << (7 - ((pos - 1) & 7)); - mask2 = 1 << (7 - ((pos + 1) & 7)); - mask3 = 1 << (7 - (pos & 7)); - if (!(fdi->track_dst[off1] & mask1) && !(fdi->track_dst[off2] & mask2)) - fdi->track_dst[off3] |= mask3; - else - fdi->track_dst[off3] &= ~mask3; - } + for (i = 0; i < fdi->mfmsync_offset; i++) { + pos = fdi->mfmsync_buffer[i]; + off1 = (pos - 1) >> 3; + off2 = (pos + 1) >> 3; + off3 = pos >> 3; + mask1 = 1 << (7 - ((pos - 1) & 7)); + mask2 = 1 << (7 - ((pos + 1) & 7)); + mask3 = 1 << (7 - (pos & 7)); + if (!(fdi->track_dst[off1] & mask1) && !(fdi->track_dst[off2] & mask2)) + fdi->track_dst[off3] |= mask3; + else + fdi->track_dst[off3] &= ~mask3; + } } -static int handle_sectors_described_track (FDI *fdi) +static int +handle_sectors_described_track(FDI *fdi) { #ifdef ENABLE_FDI2RAW_LOG - int oldout; - uae_u8 *start_src = fdi->track_src ; + int oldout; + uae_u8 *start_src = fdi->track_src; #endif - fdi->encoding_type = *fdi->track_src++; - fdi->index_offset = get_u32(fdi->track_src); - fdi->index_offset >>= 8; - fdi->track_src += 3; - fdi2raw_log("sectors_described, index offset: %d\n",fdi->index_offset); + fdi->encoding_type = *fdi->track_src++; + fdi->index_offset = get_u32(fdi->track_src); + fdi->index_offset >>= 8; + fdi->track_src += 3; + fdi2raw_log("sectors_described, index offset: %d\n", fdi->index_offset); - do { - fdi->track_type = *fdi->track_src++; - fdi2raw_log("%06.6X %06.6X %02.2X:",fdi->track_src - start_src + 0x200, fdi->out/8, fdi->track_type); + do { + fdi->track_type = *fdi->track_src++; + fdi2raw_log("%06.6X %06.6X %02.2X:", fdi->track_src - start_src + 0x200, fdi->out / 8, fdi->track_type); #ifdef ENABLE_FDI2RAW_LOG - oldout = fdi->out; + oldout = fdi->out; #endif - decode_sectors_described_track[fdi->track_type](fdi); - fdi2raw_log(" %d\n", fdi->out - oldout); + decode_sectors_described_track[fdi->track_type](fdi); + fdi2raw_log(" %d\n", fdi->out - oldout); #ifdef ENABLE_FDI2RAW_LOG - oldout = fdi->out; + oldout = fdi->out; #endif - if (fdi->out < 0 || fdi->err) { - fdi2raw_log("\nin %d bytes, out %d bits\n", fdi->track_src - fdi->track_src_buffer, fdi->out); - return -1; - } - if (fdi->track_src - fdi->track_src_buffer >= fdi->track_src_len) { - fdi2raw_log("source buffer overrun, previous type: %02.2X\n", fdi->track_type); - return -1; - } - } while (fdi->track_type != 0xff); - fdi2raw_log("\n"); - fix_mfm_sync (fdi); - return fdi->out; + if (fdi->out < 0 || fdi->err) { + fdi2raw_log("\nin %d bytes, out %d bits\n", fdi->track_src - fdi->track_src_buffer, fdi->out); + return -1; + } + if (fdi->track_src - fdi->track_src_buffer >= fdi->track_src_len) { + fdi2raw_log("source buffer overrun, previous type: %02.2X\n", fdi->track_type); + return -1; + } + } while (fdi->track_type != 0xff); + fdi2raw_log("\n"); + fix_mfm_sync(fdi); + return fdi->out; } -static uae_u8 *fdi_decompress (int pulses, uae_u8 *sizep, uae_u8 *src, int *dofree) +static uae_u8 * +fdi_decompress(int pulses, uae_u8 *sizep, uae_u8 *src, int *dofree) { - uae_u32 size = get_u24 (sizep); - uae_u32 *dst2; - int len = size & 0x3fffff; - uae_u8 *dst; - int mode = size >> 22, i; + uae_u32 size = get_u24(sizep); + uae_u32 *dst2; + int len = size & 0x3fffff; + uae_u8 *dst; + int mode = size >> 22, i; - *dofree = 0; - if (mode == 0 && pulses * 2 > len) - mode = 1; - if (mode == 0) { - dst2 = (uae_u32*)src; - dst = src; - for (i = 0; i < pulses; i++) { - *dst2++ = get_u32 (src); - src += 4; - } - } else if (mode == 1) { - dst = fdi_malloc (pulses *4); - *dofree = 1; - fdi_decode (src, pulses, dst); - } else { - dst = 0; - } - return dst; + *dofree = 0; + if (mode == 0 && pulses * 2 > len) + mode = 1; + if (mode == 0) { + dst2 = (uae_u32 *) src; + dst = src; + for (i = 0; i < pulses; i++) { + *dst2++ = get_u32(src); + src += 4; + } + } else if (mode == 1) { + dst = fdi_malloc(pulses * 4); + *dofree = 1; + fdi_decode(src, pulses, dst); + } else { + dst = 0; + } + return dst; } -static void dumpstream(int track, uae_u8 *stream, int len) +static void +dumpstream(int track, uae_u8 *stream, int len) { #if 0 char name[100]; @@ -1398,39 +1499,39 @@ static void dumpstream(int track, uae_u8 *stream, int len) static int bitoffset; -STATIC_INLINE void addbit (uae_u8 *p, int bit) +STATIC_INLINE void +addbit(uae_u8 *p, int bit) { - int off1 = bitoffset / 8; - int off2 = bitoffset % 8; - p[off1] |= bit << (7 - off2); - bitoffset++; + int off1 = bitoffset / 8; + int off2 = bitoffset % 8; + p[off1] |= bit << (7 - off2); + bitoffset++; } - struct pulse_sample { - uint32_t size; - int number_of_bits; + uint32_t size; + int number_of_bits; }; - -#define FDI_MAX_ARRAY 10 /* change this value as you want */ -static int pulse_limitval = 15; /* tolerance of 15% */ +#define FDI_MAX_ARRAY 10 /* change this value as you want */ +static int pulse_limitval = 15; /* tolerance of 15% */ static struct pulse_sample psarray[FDI_MAX_ARRAY]; -static int array_index; -static unsigned long total; -static int totaldiv; +static int array_index; +static unsigned long total; +static int totaldiv; -static void init_array(uint32_t standard_MFM_2_bit_cell_size, int nb_of_bits) +static void +init_array(uint32_t standard_MFM_2_bit_cell_size, int nb_of_bits) { - int i; + int i; - for (i = 0; i < FDI_MAX_ARRAY; i++) { - psarray[i].size = standard_MFM_2_bit_cell_size; /* That is (total track length / 50000) for Amiga double density */ - total += psarray[i].size; - psarray[i].number_of_bits = nb_of_bits; - totaldiv += psarray[i].number_of_bits; - } - array_index = 0; + for (i = 0; i < FDI_MAX_ARRAY; i++) { + psarray[i].size = standard_MFM_2_bit_cell_size; /* That is (total track length / 50000) for Amiga double density */ + total += psarray[i].size; + psarray[i].number_of_bits = nb_of_bits; + totaldiv += psarray[i].number_of_bits; + } + array_index = 0; } #if 0 @@ -1561,651 +1662,652 @@ static void fdi2_decode (FDI *fdi, uint32_t totalavg, uae_u32 *avgp, uae_u32 *mi #else -static void fdi2_decode (FDI *fdi, uint32_t totalavg, uae_u32 *avgp, uae_u32 *minp, uae_u32 *maxp, uae_u8 *idx, int maxidx, int *indexoffsetp, int pulses, int mfm) +static void +fdi2_decode(FDI *fdi, uint32_t totalavg, uae_u32 *avgp, uae_u32 *minp, uae_u32 *maxp, uae_u8 *idx, int maxidx, int *indexoffsetp, int pulses, int mfm) { - uint32_t adjust; - uint32_t adjusted_pulse; - uint32_t standard_MFM_2_bit_cell_size = totalavg / 50000; - uint32_t standard_MFM_8_bit_cell_size = totalavg / 12500; - int real_size, i, j, nexti, eodat, outstep, randval; - int indexoffset = *indexoffsetp; - uae_u8 *d = fdi->track_dst_buffer; - uae_u16 *pt = fdi->track_dst_buffer_timing; - uae_u32 ref_pulse, pulse; - long jitter; + uint32_t adjust; + uint32_t adjusted_pulse; + uint32_t standard_MFM_2_bit_cell_size = totalavg / 50000; + uint32_t standard_MFM_8_bit_cell_size = totalavg / 12500; + int real_size, i, j, nexti, eodat, outstep, randval; + int indexoffset = *indexoffsetp; + uae_u8 *d = fdi->track_dst_buffer; + uae_u16 *pt = fdi->track_dst_buffer_timing; + uae_u32 ref_pulse, pulse; + long jitter; - /* detects a long-enough stable pulse coming just after another stable pulse */ - i = 1; - while ( (i < pulses) && ( (idx[i] < maxidx) - || (idx[i - 1] < maxidx) - || (minp[i] < (standard_MFM_2_bit_cell_size - (standard_MFM_2_bit_cell_size / 4))) ) ) - i++; - if (i == pulses) { - fdi2raw_log("FDI: No stable and long-enough pulse in track.\n"); - return; - } - nexti = i; - eodat = i; - i--; - adjust = 0; - total = 0; - totaldiv = 0; - init_array(standard_MFM_2_bit_cell_size, 1 + mfm); - bitoffset = 0; - ref_pulse = 0; - jitter = 0; - outstep = -1; - while (outstep < 2) { + /* detects a long-enough stable pulse coming just after another stable pulse */ + i = 1; + while ((i < pulses) && ((idx[i] < maxidx) || (idx[i - 1] < maxidx) || (minp[i] < (standard_MFM_2_bit_cell_size - (standard_MFM_2_bit_cell_size / 4))))) + i++; + if (i == pulses) { + fdi2raw_log("FDI: No stable and long-enough pulse in track.\n"); + return; + } + nexti = i; + eodat = i; + i--; + adjust = 0; + total = 0; + totaldiv = 0; + init_array(standard_MFM_2_bit_cell_size, 1 + mfm); + bitoffset = 0; + ref_pulse = 0; + jitter = 0; + outstep = -1; + while (outstep < 2) { - /* calculates the current average bitrate from previous decoded data */ - uae_u32 avg_size = (total << (2 + mfm)) / totaldiv; /* this is the new average size for one MFM bit */ - /* uae_u32 avg_size = (uae_u32)((((float)total)*((float)(mfm+1))*4.0) / ((float)totaldiv)); */ - /* you can try tighter ranges than 25%, or wider ranges. I would probably go for tighter... */ - if ((avg_size < (standard_MFM_8_bit_cell_size - (pulse_limitval * standard_MFM_8_bit_cell_size / 100))) || - (avg_size > (standard_MFM_8_bit_cell_size + (pulse_limitval * standard_MFM_8_bit_cell_size / 100)))) { - avg_size = standard_MFM_8_bit_cell_size; - } - /* this is to prevent the average value from going too far - * from the theoretical value, otherwise it could progressively go to (2 * - * real value), or (real value / 2), etc. */ + /* calculates the current average bitrate from previous decoded data */ + uae_u32 avg_size = (total << (2 + mfm)) / totaldiv; /* this is the new average size for one MFM bit */ + /* uae_u32 avg_size = (uae_u32)((((float)total)*((float)(mfm+1))*4.0) / ((float)totaldiv)); */ + /* you can try tighter ranges than 25%, or wider ranges. I would probably go for tighter... */ + if ((avg_size < (standard_MFM_8_bit_cell_size - (pulse_limitval * standard_MFM_8_bit_cell_size / 100))) || (avg_size > (standard_MFM_8_bit_cell_size + (pulse_limitval * standard_MFM_8_bit_cell_size / 100)))) { + avg_size = standard_MFM_8_bit_cell_size; + } + /* this is to prevent the average value from going too far + * from the theoretical value, otherwise it could progressively go to (2 * + * real value), or (real value / 2), etc. */ - /* gets the next long-enough pulse (this may require more than one pulse) */ - pulse = 0; - while (pulse < ((avg_size / 4) - (avg_size / 16))) { - uae_u32 avg_pulse, min_pulse, max_pulse; - i++; - if (i >= pulses) - i = 0; - if (i == nexti) { - do { - nexti++; - if (nexti >= pulses) - nexti = 0; - } while (idx[nexti] < maxidx); - } - if (idx[i] >= maxidx) { /* stable pulse */ - avg_pulse = avgp[i] - jitter; - min_pulse = minp[i]; - max_pulse = maxp[i]; - if (jitter >= 0) - max_pulse -= jitter; - else - min_pulse -= jitter; - if ((maxp[nexti] - avgp[nexti]) < (avg_pulse - min_pulse)) - min_pulse = avg_pulse - (maxp[nexti] - avgp[nexti]); - if ((avgp[nexti] - minp[nexti]) < (max_pulse - avg_pulse)) - max_pulse = avg_pulse + (avgp[nexti] - minp[nexti]); - if (min_pulse < ref_pulse) - min_pulse = ref_pulse; - randval = rand(); - if (randval < (RAND_MAX / 2)) { - if (randval > (RAND_MAX / 4)) { - if (randval <= (((3LL*RAND_MAX) / 8))) - randval = (2 * randval) - (RAND_MAX /4); - else - randval = (4 * randval) - RAND_MAX; - } - jitter = 0 - (randval * (avg_pulse - min_pulse)) / RAND_MAX; - } else { - randval -= RAND_MAX / 2; - if (randval > (RAND_MAX / 4)) { - if (randval <= (((3LL*RAND_MAX) / 8))) - randval = (2 * randval) - (RAND_MAX /4); - else - randval = (4 * randval) - RAND_MAX; - } - jitter = (randval * (max_pulse - avg_pulse)) / RAND_MAX; - } - avg_pulse += jitter; - if ((avg_pulse < min_pulse) || (avg_pulse > max_pulse)) { - fdi2raw_log("FDI: avg_pulse outside bounds! avg=%u min=%u max=%u\n", avg_pulse, min_pulse, max_pulse); - fdi2raw_log("FDI: avgp=%u (%u) minp=%u (%u) maxp=%u (%u) jitter=%d i=%d ni=%d\n", - avgp[i], avgp[nexti], minp[i], minp[nexti], maxp[i], maxp[nexti], jitter, i, nexti); - } - if (avg_pulse < ref_pulse) - fdi2raw_log("FDI: avg_pulse < ref_pulse! (%u < %u)\n", avg_pulse, ref_pulse); - pulse += avg_pulse - ref_pulse; - ref_pulse = 0; - if (i == eodat) - outstep++; - } else if (rand() <= ((idx[i] * RAND_MAX) / maxidx)) { - avg_pulse = avgp[i]; - min_pulse = minp[i]; - max_pulse = maxp[i]; - randval = rand(); - if (randval < (RAND_MAX / 2)) { - if (randval > (RAND_MAX / 4)) { - if (randval <= (((3LL*RAND_MAX) / 8))) - randval = (2 * randval) - (RAND_MAX /4); - else - randval = (4 * randval) - RAND_MAX; - } - avg_pulse -= (randval * (avg_pulse - min_pulse)) / RAND_MAX; - } else { - randval -= RAND_MAX / 2; - if (randval > (RAND_MAX / 4)) { - if (randval <= (((3LL*RAND_MAX) / 8))) - randval = (2 * randval) - (RAND_MAX /4); - else - randval = (4 * randval) - RAND_MAX; - } - avg_pulse += (randval * (max_pulse - avg_pulse)) / RAND_MAX; - } - if ((avg_pulse > ref_pulse) && (avg_pulse < (avgp[nexti] - jitter))) { - pulse += avg_pulse - ref_pulse; - ref_pulse = avg_pulse; - } - } - if (outstep == 1 && indexoffset == i) - *indexoffsetp = bitoffset; - } + /* gets the next long-enough pulse (this may require more than one pulse) */ + pulse = 0; + while (pulse < ((avg_size / 4) - (avg_size / 16))) { + uae_u32 avg_pulse, min_pulse, max_pulse; + i++; + if (i >= pulses) + i = 0; + if (i == nexti) { + do { + nexti++; + if (nexti >= pulses) + nexti = 0; + } while (idx[nexti] < maxidx); + } + if (idx[i] >= maxidx) { /* stable pulse */ + avg_pulse = avgp[i] - jitter; + min_pulse = minp[i]; + max_pulse = maxp[i]; + if (jitter >= 0) + max_pulse -= jitter; + else + min_pulse -= jitter; + if ((maxp[nexti] - avgp[nexti]) < (avg_pulse - min_pulse)) + min_pulse = avg_pulse - (maxp[nexti] - avgp[nexti]); + if ((avgp[nexti] - minp[nexti]) < (max_pulse - avg_pulse)) + max_pulse = avg_pulse + (avgp[nexti] - minp[nexti]); + if (min_pulse < ref_pulse) + min_pulse = ref_pulse; + randval = rand(); + if (randval < (RAND_MAX / 2)) { + if (randval > (RAND_MAX / 4)) { + if (randval <= (((3LL * RAND_MAX) / 8))) + randval = (2 * randval) - (RAND_MAX / 4); + else + randval = (4 * randval) - RAND_MAX; + } + jitter = 0 - (randval * (avg_pulse - min_pulse)) / RAND_MAX; + } else { + randval -= RAND_MAX / 2; + if (randval > (RAND_MAX / 4)) { + if (randval <= (((3LL * RAND_MAX) / 8))) + randval = (2 * randval) - (RAND_MAX / 4); + else + randval = (4 * randval) - RAND_MAX; + } + jitter = (randval * (max_pulse - avg_pulse)) / RAND_MAX; + } + avg_pulse += jitter; + if ((avg_pulse < min_pulse) || (avg_pulse > max_pulse)) { + fdi2raw_log("FDI: avg_pulse outside bounds! avg=%u min=%u max=%u\n", avg_pulse, min_pulse, max_pulse); + fdi2raw_log("FDI: avgp=%u (%u) minp=%u (%u) maxp=%u (%u) jitter=%d i=%d ni=%d\n", + avgp[i], avgp[nexti], minp[i], minp[nexti], maxp[i], maxp[nexti], jitter, i, nexti); + } + if (avg_pulse < ref_pulse) + fdi2raw_log("FDI: avg_pulse < ref_pulse! (%u < %u)\n", avg_pulse, ref_pulse); + pulse += avg_pulse - ref_pulse; + ref_pulse = 0; + if (i == eodat) + outstep++; + } else if (rand() <= ((idx[i] * RAND_MAX) / maxidx)) { + avg_pulse = avgp[i]; + min_pulse = minp[i]; + max_pulse = maxp[i]; + randval = rand(); + if (randval < (RAND_MAX / 2)) { + if (randval > (RAND_MAX / 4)) { + if (randval <= (((3LL * RAND_MAX) / 8))) + randval = (2 * randval) - (RAND_MAX / 4); + else + randval = (4 * randval) - RAND_MAX; + } + avg_pulse -= (randval * (avg_pulse - min_pulse)) / RAND_MAX; + } else { + randval -= RAND_MAX / 2; + if (randval > (RAND_MAX / 4)) { + if (randval <= (((3LL * RAND_MAX) / 8))) + randval = (2 * randval) - (RAND_MAX / 4); + else + randval = (4 * randval) - RAND_MAX; + } + avg_pulse += (randval * (max_pulse - avg_pulse)) / RAND_MAX; + } + if ((avg_pulse > ref_pulse) && (avg_pulse < (avgp[nexti] - jitter))) { + pulse += avg_pulse - ref_pulse; + ref_pulse = avg_pulse; + } + } + if (outstep == 1 && indexoffset == i) + *indexoffsetp = bitoffset; + } - /* gets the size in bits from the pulse width, considering the current average bitrate */ - adjusted_pulse = pulse; - real_size = 0; - if (mfm) { - while (adjusted_pulse >= avg_size) { - real_size += 4; - adjusted_pulse -= avg_size / 2; - } - adjusted_pulse <<= 3; - while (adjusted_pulse >= ((avg_size * 4) + (avg_size / 4))) { - real_size += 2; - adjusted_pulse -= avg_size * 2; - } - if (adjusted_pulse >= ((avg_size * 3) + (avg_size / 4))) { - if (adjusted_pulse <= ((avg_size * 4) - (avg_size / 4))) { - if ((2 * ((adjusted_pulse >> 2) - adjust)) <= ((2 * avg_size) - (avg_size / 4))) - real_size += 3; - else - real_size += 4; - } else - real_size += 4; - } else { - if (adjusted_pulse > ((avg_size * 3) - (avg_size / 4))) { - real_size += 3; - } else { - if (adjusted_pulse >= ((avg_size * 2) + (avg_size / 4))) { - if ((2 * ((adjusted_pulse >> 2) - adjust)) < (avg_size + (avg_size / 4))) - real_size += 2; - else - real_size += 3; - } else - real_size += 2; - } - } - } else { - while (adjusted_pulse >= (2*avg_size)) - { - real_size+=4; - adjusted_pulse-=avg_size; - } - adjusted_pulse<<=2; - while (adjusted_pulse >= ((avg_size*3)+(avg_size/4))) - { - real_size+=2; - adjusted_pulse-=avg_size*2; - } - if (adjusted_pulse >= ((avg_size*2)+(avg_size/4))) - { - if (adjusted_pulse <= ((avg_size*3)-(avg_size/4))) - { - if (((adjusted_pulse>>1)-adjust) < (avg_size+(avg_size/4))) - real_size+=2; - else - real_size+=3; - } - else - real_size+=3; - } - else - { - if (adjusted_pulse > ((avg_size*2)-(avg_size/4))) - real_size+=2; - else - { - if (adjusted_pulse >= (avg_size+(avg_size/4))) - { - if (((adjusted_pulse>>1)-adjust) <= (avg_size-(avg_size/4))) - real_size++; - else - real_size+=2; - } - else - real_size++; - } - } - } + /* gets the size in bits from the pulse width, considering the current average bitrate */ + adjusted_pulse = pulse; + real_size = 0; + if (mfm) { + while (adjusted_pulse >= avg_size) { + real_size += 4; + adjusted_pulse -= avg_size / 2; + } + adjusted_pulse <<= 3; + while (adjusted_pulse >= ((avg_size * 4) + (avg_size / 4))) { + real_size += 2; + adjusted_pulse -= avg_size * 2; + } + if (adjusted_pulse >= ((avg_size * 3) + (avg_size / 4))) { + if (adjusted_pulse <= ((avg_size * 4) - (avg_size / 4))) { + if ((2 * ((adjusted_pulse >> 2) - adjust)) <= ((2 * avg_size) - (avg_size / 4))) + real_size += 3; + else + real_size += 4; + } else + real_size += 4; + } else { + if (adjusted_pulse > ((avg_size * 3) - (avg_size / 4))) { + real_size += 3; + } else { + if (adjusted_pulse >= ((avg_size * 2) + (avg_size / 4))) { + if ((2 * ((adjusted_pulse >> 2) - adjust)) < (avg_size + (avg_size / 4))) + real_size += 2; + else + real_size += 3; + } else + real_size += 2; + } + } + } else { + while (adjusted_pulse >= (2 * avg_size)) { + real_size += 4; + adjusted_pulse -= avg_size; + } + adjusted_pulse <<= 2; + while (adjusted_pulse >= ((avg_size * 3) + (avg_size / 4))) { + real_size += 2; + adjusted_pulse -= avg_size * 2; + } + if (adjusted_pulse >= ((avg_size * 2) + (avg_size / 4))) { + if (adjusted_pulse <= ((avg_size * 3) - (avg_size / 4))) { + if (((adjusted_pulse >> 1) - adjust) < (avg_size + (avg_size / 4))) + real_size += 2; + else + real_size += 3; + } else + real_size += 3; + } else { + if (adjusted_pulse > ((avg_size * 2) - (avg_size / 4))) + real_size += 2; + else { + if (adjusted_pulse >= (avg_size + (avg_size / 4))) { + if (((adjusted_pulse >> 1) - adjust) <= (avg_size - (avg_size / 4))) + real_size++; + else + real_size += 2; + } else + real_size++; + } + } + } - /* after one pass to correctly initialize the average bitrate, outputs the bits */ - if (outstep == 1) { - for (j = real_size; j > 1; j--) - addbit (d, 0); - addbit (d, 1); - for (j = 0; j < real_size; j++) - *pt++ = (uae_u16)(pulse / real_size); - } + /* after one pass to correctly initialize the average bitrate, outputs the bits */ + if (outstep == 1) { + for (j = real_size; j > 1; j--) + addbit(d, 0); + addbit(d, 1); + for (j = 0; j < real_size; j++) + *pt++ = (uae_u16) (pulse / real_size); + } - /* prepares for the next pulse */ - adjust = ((real_size * avg_size) / (4 << mfm)) - pulse; - total -= psarray[array_index].size; - totaldiv -= psarray[array_index].number_of_bits; - psarray[array_index].size = pulse; - psarray[array_index].number_of_bits = real_size; - total += pulse; - totaldiv += real_size; - array_index++; - if (array_index >= FDI_MAX_ARRAY) - array_index = 0; - } + /* prepares for the next pulse */ + adjust = ((real_size * avg_size) / (4 << mfm)) - pulse; + total -= psarray[array_index].size; + totaldiv -= psarray[array_index].number_of_bits; + psarray[array_index].size = pulse; + psarray[array_index].number_of_bits = real_size; + total += pulse; + totaldiv += real_size; + array_index++; + if (array_index >= FDI_MAX_ARRAY) + array_index = 0; + } - fdi->out = bitoffset; + fdi->out = bitoffset; } #endif -static void fdi2_celltiming (FDI *fdi, uint32_t totalavg, int bitoffset, uae_u16 *out) +static void +fdi2_celltiming(FDI *fdi, uint32_t totalavg, int bitoffset, uae_u16 *out) { - uae_u16 *pt2, *pt; - double avg_bit_len; - int i; + uae_u16 *pt2, *pt; + double avg_bit_len; + int i; - avg_bit_len = (double)totalavg / (double)bitoffset; - pt2 = fdi->track_dst_buffer_timing; - pt = out; - for (i = 0; i < bitoffset / 8; i++) { - double v = (pt2[0] + pt2[1] + pt2[2] + pt2[3] + pt2[4] + pt2[5] + pt2[6] + pt2[7]) / 8.0; - v = 1000.0 * v / avg_bit_len; - *pt++ = (uae_u16)v; - pt2 += 8; - } - *pt++ = out[0]; - *pt = out[0]; + avg_bit_len = (double) totalavg / (double) bitoffset; + pt2 = fdi->track_dst_buffer_timing; + pt = out; + for (i = 0; i < bitoffset / 8; i++) { + double v = (pt2[0] + pt2[1] + pt2[2] + pt2[3] + pt2[4] + pt2[5] + pt2[6] + pt2[7]) / 8.0; + v = 1000.0 * v / avg_bit_len; + *pt++ = (uae_u16) v; + pt2 += 8; + } + *pt++ = out[0]; + *pt = out[0]; } -static int decode_lowlevel_track (FDI *fdi, int track, struct fdi_cache *cache) +static int +decode_lowlevel_track(FDI *fdi, int track, struct fdi_cache *cache) { - uae_u8 *p1; - uae_u32 *p2; - uae_u32 *avgp, *minp = 0, *maxp = 0; - uae_u8 *idxp = 0; - uae_u32 maxidx, totalavg, weakbits; - int i, j, len, pulses, indexoffset; - int avg_free, min_free = 0, max_free = 0, idx_free; - int idx_off1 = 0, idx_off2 = 0, idx_off3 = 0; + uae_u8 *p1; + uae_u32 *p2; + uae_u32 *avgp, *minp = 0, *maxp = 0; + uae_u8 *idxp = 0; + uae_u32 maxidx, totalavg, weakbits; + int i, j, len, pulses, indexoffset; + int avg_free, min_free = 0, max_free = 0, idx_free; + int idx_off1 = 0, idx_off2 = 0, idx_off3 = 0; - p1 = fdi->track_src; - pulses = get_u32 (p1); - if (!pulses) - return -1; - p1 += 4; - len = 12; - avgp = (uae_u32*)fdi_decompress (pulses, p1 + 0, p1 + len, &avg_free); - dumpstream(track, (uae_u8*)avgp, pulses); - len += get_u24 (p1 + 0) & 0x3fffff; - if (!avgp) - return -1; - if (get_u24 (p1 + 3) && get_u24 (p1 + 6)) { - minp = (uae_u32*)fdi_decompress (pulses, p1 + 3, p1 + len, &min_free); - len += get_u24 (p1 + 3) & 0x3fffff; - maxp = (uae_u32*)fdi_decompress (pulses, p1 + 6, p1 + len, &max_free); - len += get_u24 (p1 + 6) & 0x3fffff; - /* Computes the real min and max values */ - for (i = 0; i < pulses; i++) { - maxp[i] = avgp[i] + minp[i] - maxp[i]; - minp[i] = avgp[i] - minp[i]; - } - } else { - minp = avgp; - maxp = avgp; - } - if (get_u24 (p1 + 9)) { - idx_off1 = 0; - idx_off2 = 1; - idx_off3 = 2; - idxp = fdi_decompress (pulses, p1 + 9, p1 + len, &idx_free); - if (idx_free) { - if (idxp[0] == 0 && idxp[1] == 0) { - idx_off1 = 2; - idx_off2 = 3; - } else { - idx_off1 = 1; - idx_off2 = 0; - } - idx_off3 = 4; - } - } else { - idxp = fdi_malloc (pulses * 2); - idx_free = 1; - for (i = 0; i < pulses; i++) { - idxp[i * 2 + 0] = 2; - idxp[i * 2 + 1] = 0; - } - idxp[0] = 1; - idxp[1] = 1; - } + p1 = fdi->track_src; + pulses = get_u32(p1); + if (!pulses) + return -1; + p1 += 4; + len = 12; + avgp = (uae_u32 *) fdi_decompress(pulses, p1 + 0, p1 + len, &avg_free); + dumpstream(track, (uae_u8 *) avgp, pulses); + len += get_u24(p1 + 0) & 0x3fffff; + if (!avgp) + return -1; + if (get_u24(p1 + 3) && get_u24(p1 + 6)) { + minp = (uae_u32 *) fdi_decompress(pulses, p1 + 3, p1 + len, &min_free); + len += get_u24(p1 + 3) & 0x3fffff; + maxp = (uae_u32 *) fdi_decompress(pulses, p1 + 6, p1 + len, &max_free); + len += get_u24(p1 + 6) & 0x3fffff; + /* Computes the real min and max values */ + for (i = 0; i < pulses; i++) { + maxp[i] = avgp[i] + minp[i] - maxp[i]; + minp[i] = avgp[i] - minp[i]; + } + } else { + minp = avgp; + maxp = avgp; + } + if (get_u24(p1 + 9)) { + idx_off1 = 0; + idx_off2 = 1; + idx_off3 = 2; + idxp = fdi_decompress(pulses, p1 + 9, p1 + len, &idx_free); + if (idx_free) { + if (idxp[0] == 0 && idxp[1] == 0) { + idx_off1 = 2; + idx_off2 = 3; + } else { + idx_off1 = 1; + idx_off2 = 0; + } + idx_off3 = 4; + } + } else { + idxp = fdi_malloc(pulses * 2); + idx_free = 1; + for (i = 0; i < pulses; i++) { + idxp[i * 2 + 0] = 2; + idxp[i * 2 + 1] = 0; + } + idxp[0] = 1; + idxp[1] = 1; + } - maxidx = 0; - indexoffset = 0; - p1 = idxp; - for (i = 0; i < pulses; i++) { - if ((uint32_t)p1[idx_off1] + (uint32_t)p1[idx_off2] > maxidx) - maxidx = p1[idx_off1] + p1[idx_off2]; - p1 += idx_off3; - } - p1 = idxp; - for (i = 0; (i < pulses) && (p1[idx_off2] != 0); i++) /* falling edge, replace with idx_off1 for rising edge */ - p1 += idx_off3; - if (i < pulses) { - j = i; - do { - i++; - p1 += idx_off3; - if (i >= pulses) { - i = 0; - p1 = idxp; - } - } while ((i != j) && (p1[idx_off2] == 0)); /* falling edge, replace with idx_off1 for rising edge */ - if (i != j) /* index pulse detected */ - { - while ((i != j) && (p1[idx_off1] > p1[idx_off2])) { /* falling edge, replace with "<" for rising edge */ - i++; - p1 += idx_off3; - if (i >= pulses) { - i = 0; - p1 = idxp; - } - } - if (i != j) - indexoffset = i; /* index position detected */ - } - } - p1 = idxp; - p2 = avgp; - totalavg = 0; - weakbits = 0; - for (i = 0; i < pulses; i++) { - uint32_t sum = p1[idx_off1] + p1[idx_off2]; - if (sum >= maxidx) { - totalavg += *p2; - } else { - weakbits++; - } - p2++; - p1 += idx_off3; - idxp[i] = sum; - } - len = totalavg / 100000; - /* fdi2raw_log("totalavg=%u index=%d (%d) maxidx=%d weakbits=%d len=%d\n", - totalavg, indexoffset, maxidx, weakbits, len); */ - cache->avgp = avgp; - cache->idxp = idxp; - cache->minp = minp; - cache->maxp = maxp; - cache->avg_free = avg_free; - cache->idx_free = idx_free; - cache->min_free = min_free; - cache->max_free = max_free; - cache->totalavg = totalavg; - cache->pulses = pulses; - cache->maxidx = maxidx; - cache->indexoffset = indexoffset; - cache->weakbits = weakbits; - cache->lowlevel = 1; + maxidx = 0; + indexoffset = 0; + p1 = idxp; + for (i = 0; i < pulses; i++) { + if ((uint32_t) p1[idx_off1] + (uint32_t) p1[idx_off2] > maxidx) + maxidx = p1[idx_off1] + p1[idx_off2]; + p1 += idx_off3; + } + p1 = idxp; + for (i = 0; (i < pulses) && (p1[idx_off2] != 0); i++) /* falling edge, replace with idx_off1 for rising edge */ + p1 += idx_off3; + if (i < pulses) { + j = i; + do { + i++; + p1 += idx_off3; + if (i >= pulses) { + i = 0; + p1 = idxp; + } + } while ((i != j) && (p1[idx_off2] == 0)); /* falling edge, replace with idx_off1 for rising edge */ + if (i != j) /* index pulse detected */ + { + while ((i != j) && (p1[idx_off1] > p1[idx_off2])) { /* falling edge, replace with "<" for rising edge */ + i++; + p1 += idx_off3; + if (i >= pulses) { + i = 0; + p1 = idxp; + } + } + if (i != j) + indexoffset = i; /* index position detected */ + } + } + p1 = idxp; + p2 = avgp; + totalavg = 0; + weakbits = 0; + for (i = 0; i < pulses; i++) { + uint32_t sum = p1[idx_off1] + p1[idx_off2]; + if (sum >= maxidx) { + totalavg += *p2; + } else { + weakbits++; + } + p2++; + p1 += idx_off3; + idxp[i] = sum; + } + len = totalavg / 100000; + /* fdi2raw_log("totalavg=%u index=%d (%d) maxidx=%d weakbits=%d len=%d\n", + totalavg, indexoffset, maxidx, weakbits, len); */ + cache->avgp = avgp; + cache->idxp = idxp; + cache->minp = minp; + cache->maxp = maxp; + cache->avg_free = avg_free; + cache->idx_free = idx_free; + cache->min_free = min_free; + cache->max_free = max_free; + cache->totalavg = totalavg; + cache->pulses = pulses; + cache->maxidx = maxidx; + cache->indexoffset = indexoffset; + cache->weakbits = weakbits; + cache->lowlevel = 1; - return 1; + return 1; } -static unsigned char fdiid[]={"Formatted Disk Image file"}; -static int bit_rate_table[16] = { 125,150,250,300,500,1000 }; +static unsigned char fdiid[] = { "Formatted Disk Image file" }; +static int bit_rate_table[16] = { 125, 150, 250, 300, 500, 1000 }; -void fdi2raw_header_free (FDI *fdi) +void +fdi2raw_header_free(FDI *fdi) { - int i; + int i; - fdi_free (fdi->mfmsync_buffer); - fdi_free (fdi->track_src_buffer); - fdi_free (fdi->track_dst_buffer); - fdi_free (fdi->track_dst_buffer_timing); - for (i = 0; i < MAX_TRACKS; i++) { - struct fdi_cache *c = &fdi->cache[i]; - if (c->idx_free) - fdi_free (c->idxp); - if (c->avg_free) - fdi_free (c->avgp); - if (c->min_free) - fdi_free (c->minp); - if (c->max_free) - fdi_free (c->maxp); - } - fdi_free (fdi); - fdi2raw_log("FREE: memory allocated %d\n", fdi_allocated); + fdi_free(fdi->mfmsync_buffer); + fdi_free(fdi->track_src_buffer); + fdi_free(fdi->track_dst_buffer); + fdi_free(fdi->track_dst_buffer_timing); + for (i = 0; i < MAX_TRACKS; i++) { + struct fdi_cache *c = &fdi->cache[i]; + if (c->idx_free) + fdi_free(c->idxp); + if (c->avg_free) + fdi_free(c->avgp); + if (c->min_free) + fdi_free(c->minp); + if (c->max_free) + fdi_free(c->maxp); + } + fdi_free(fdi); + fdi2raw_log("FREE: memory allocated %d\n", fdi_allocated); } -int fdi2raw_get_last_track (FDI *fdi) +int +fdi2raw_get_last_track(FDI *fdi) { - return fdi->last_track; + return fdi->last_track; } -int fdi2raw_get_num_sector (FDI *fdi) +int +fdi2raw_get_num_sector(FDI *fdi) { - if (fdi->header[152] == 0x02) - return 22; - return 11; + if (fdi->header[152] == 0x02) + return 22; + return 11; } -int fdi2raw_get_last_head (FDI *fdi) +int +fdi2raw_get_last_head(FDI *fdi) { - return fdi->last_head; + return fdi->last_head; } -int fdi2raw_get_rotation (FDI *fdi) +int +fdi2raw_get_rotation(FDI *fdi) { - return fdi->rotation_speed; + return fdi->rotation_speed; } -int fdi2raw_get_bit_rate (FDI *fdi) +int +fdi2raw_get_bit_rate(FDI *fdi) { - return fdi->bit_rate; + return fdi->bit_rate; } -int fdi2raw_get_type (FDI *fdi) +int +fdi2raw_get_type(FDI *fdi) { - return fdi->disk_type; + return fdi->disk_type; } -int fdi2raw_get_write_protect (FDI *fdi) +int +fdi2raw_get_write_protect(FDI *fdi) { - return fdi->write_protect; + return fdi->write_protect; } -int fdi2raw_get_tpi (FDI *fdi) +int +fdi2raw_get_tpi(FDI *fdi) { - return fdi->header[148]; + return fdi->header[148]; } -FDI *fdi2raw_header(FILE *f) +FDI * +fdi2raw_header(FILE *f) { - int i, offset, oldseek; - uae_u8 type, size; - FDI *fdi; + int i, offset, oldseek; + uae_u8 type, size; + FDI *fdi; - fdi2raw_log("ALLOC: memory allocated %d\n", fdi_allocated); - fdi = fdi_malloc(sizeof(FDI)); - memset (fdi, 0, sizeof (FDI)); - fdi->file = f; - oldseek = ftell (fdi->file); - if (oldseek == -1) { - fdi_free(fdi); - return NULL; - } - if (fseek (fdi->file, 0, SEEK_SET) == -1) - fatal("fdi2raw_header(): Error seeking to the beginning of the file\n"); - if (fread (fdi->header, 1, 2048, fdi->file) != 2048) - fatal("fdi2raw_header(): Error reading header\n"); - if (fseek (fdi->file, oldseek, SEEK_SET) == -1) - fatal("fdi2raw_header(): Error seeking to offset oldseek\n"); - if (memcmp (fdiid, fdi->header, strlen ((char *)fdiid)) ) { - fdi_free(fdi); - return NULL; - } - if ((fdi->header[140] != 1 && fdi->header[140] != 2) || (fdi->header[141] != 0 && !(fdi->header[140]==2 && fdi->header[141]==1))) { - fdi_free(fdi); - return NULL; - } + fdi2raw_log("ALLOC: memory allocated %d\n", fdi_allocated); + fdi = fdi_malloc(sizeof(FDI)); + memset(fdi, 0, sizeof(FDI)); + fdi->file = f; + oldseek = ftell(fdi->file); + if (oldseek == -1) { + fdi_free(fdi); + return NULL; + } + if (fseek(fdi->file, 0, SEEK_SET) == -1) + fatal("fdi2raw_header(): Error seeking to the beginning of the file\n"); + if (fread(fdi->header, 1, 2048, fdi->file) != 2048) + fatal("fdi2raw_header(): Error reading header\n"); + if (fseek(fdi->file, oldseek, SEEK_SET) == -1) + fatal("fdi2raw_header(): Error seeking to offset oldseek\n"); + if (memcmp(fdiid, fdi->header, strlen((char *) fdiid))) { + fdi_free(fdi); + return NULL; + } + if ((fdi->header[140] != 1 && fdi->header[140] != 2) || (fdi->header[141] != 0 && !(fdi->header[140] == 2 && fdi->header[141] == 1))) { + fdi_free(fdi); + return NULL; + } - fdi->mfmsync_buffer = fdi_malloc (MAX_MFM_SYNC_BUFFER * sizeof(int)); - fdi->track_src_buffer = fdi_malloc (MAX_SRC_BUFFER); - fdi->track_dst_buffer = fdi_malloc (MAX_DST_BUFFER); - fdi->track_dst_buffer_timing = fdi_malloc (MAX_TIMING_BUFFER); + fdi->mfmsync_buffer = fdi_malloc(MAX_MFM_SYNC_BUFFER * sizeof(int)); + fdi->track_src_buffer = fdi_malloc(MAX_SRC_BUFFER); + fdi->track_dst_buffer = fdi_malloc(MAX_DST_BUFFER); + fdi->track_dst_buffer_timing = fdi_malloc(MAX_TIMING_BUFFER); - fdi->last_track = ((fdi->header[142] << 8) + fdi->header[143]) + 1; - fdi->last_track *= fdi->header[144] + 1; - if (fdi->last_track > MAX_TRACKS) - fdi->last_track = MAX_TRACKS; - fdi->last_head = fdi->header[144]; - fdi->disk_type = fdi->header[145]; - fdi->rotation_speed = fdi->header[146] + 128; - fdi->write_protect = fdi->header[147] & 1; - fdi2raw_log("FDI version %d.%d\n", fdi->header[140], fdi->header[141]); - fdi2raw_log("last_track=%d rotation_speed=%d\n",fdi->last_track,fdi->rotation_speed); + fdi->last_track = ((fdi->header[142] << 8) + fdi->header[143]) + 1; + fdi->last_track *= fdi->header[144] + 1; + if (fdi->last_track > MAX_TRACKS) + fdi->last_track = MAX_TRACKS; + fdi->last_head = fdi->header[144]; + fdi->disk_type = fdi->header[145]; + fdi->rotation_speed = fdi->header[146] + 128; + fdi->write_protect = fdi->header[147] & 1; + fdi2raw_log("FDI version %d.%d\n", fdi->header[140], fdi->header[141]); + fdi2raw_log("last_track=%d rotation_speed=%d\n", fdi->last_track, fdi->rotation_speed); - offset = 512; - i = fdi->last_track; - if (i > 180) { - offset += 512; - i -= 180; - while (i > 256) { - offset += 512; - i -= 256; - } - } - for (i = 0; i < fdi->last_track; i++) { - fdi->track_offsets[i] = offset; - type = fdi->header[152 + i * 2]; - size = fdi->header[152 + i * 2 + 1]; - if (type == 1) - offset += (size & 15) * 512; - else if ((type & 0xc0) == 0x80) - offset += (((type & 0x3f) << 8) | size) * 256; - else - offset += size * 256; - } - fdi->track_offsets[i] = offset; + offset = 512; + i = fdi->last_track; + if (i > 180) { + offset += 512; + i -= 180; + while (i > 256) { + offset += 512; + i -= 256; + } + } + for (i = 0; i < fdi->last_track; i++) { + fdi->track_offsets[i] = offset; + type = fdi->header[152 + i * 2]; + size = fdi->header[152 + i * 2 + 1]; + if (type == 1) + offset += (size & 15) * 512; + else if ((type & 0xc0) == 0x80) + offset += (((type & 0x3f) << 8) | size) * 256; + else + offset += size * 256; + } + fdi->track_offsets[i] = offset; - return fdi; + return fdi; } - -int fdi2raw_loadrevolution_2 (FDI *fdi, uae_u16 *mfmbuf, uae_u16 *tracktiming, int track, int *tracklength, int *indexoffsetp, int *multirev, int mfm) +int +fdi2raw_loadrevolution_2(FDI *fdi, uae_u16 *mfmbuf, uae_u16 *tracktiming, int track, int *tracklength, int *indexoffsetp, int *multirev, int mfm) { - struct fdi_cache *cache = &fdi->cache[track]; - int len, i, idx; + struct fdi_cache *cache = &fdi->cache[track]; + int len, i, idx; - memset (fdi->track_dst_buffer, 0, MAX_DST_BUFFER); - idx = cache->indexoffset; - fdi2_decode (fdi, cache->totalavg, - cache->avgp, cache->minp, cache->maxp, cache->idxp, - cache->maxidx, &idx, cache->pulses, mfm); - /* fdi2raw_log("track %d: nbits=%d avg len=%.2f weakbits=%d idx=%d\n", - track, bitoffset, (double)cache->totalavg / bitoffset, cache->weakbits, cache->indexoffset); */ - len = fdi->out; - if (cache->weakbits >= 10 && multirev) - *multirev = 1; - *tracklength = len; + memset(fdi->track_dst_buffer, 0, MAX_DST_BUFFER); + idx = cache->indexoffset; + fdi2_decode(fdi, cache->totalavg, + cache->avgp, cache->minp, cache->maxp, cache->idxp, + cache->maxidx, &idx, cache->pulses, mfm); + /* fdi2raw_log("track %d: nbits=%d avg len=%.2f weakbits=%d idx=%d\n", + track, bitoffset, (double)cache->totalavg / bitoffset, cache->weakbits, cache->indexoffset); */ + len = fdi->out; + if (cache->weakbits >= 10 && multirev) + *multirev = 1; + *tracklength = len; - for (i = 0; i < (len + 15) / (2 * 8); i++) { - uae_u8 *data = fdi->track_dst_buffer + i * 2; - *mfmbuf++ = 256 * *data + *(data + 1); - } - fdi2_celltiming (fdi, cache->totalavg, len, tracktiming); - if (indexoffsetp) - *indexoffsetp = idx; - return 1; + for (i = 0; i < (len + 15) / (2 * 8); i++) { + uae_u8 *data = fdi->track_dst_buffer + i * 2; + *mfmbuf++ = 256 * *data + *(data + 1); + } + fdi2_celltiming(fdi, cache->totalavg, len, tracktiming); + if (indexoffsetp) + *indexoffsetp = idx; + return 1; } -int fdi2raw_loadrevolution (FDI *fdi, uae_u16 *mfmbuf, uae_u16 *tracktiming, int track, int *tracklength, int mfm) +int +fdi2raw_loadrevolution(FDI *fdi, uae_u16 *mfmbuf, uae_u16 *tracktiming, int track, int *tracklength, int mfm) { - return fdi2raw_loadrevolution_2 (fdi, mfmbuf, tracktiming, track, tracklength, 0, 0, mfm); + return fdi2raw_loadrevolution_2(fdi, mfmbuf, tracktiming, track, tracklength, 0, 0, mfm); } -int fdi2raw_loadtrack (FDI *fdi, uae_u16 *mfmbuf, uae_u16 *tracktiming, int track, int *tracklength, int *indexoffsetp, int *multirev, int mfm) +int +fdi2raw_loadtrack(FDI *fdi, uae_u16 *mfmbuf, uae_u16 *tracktiming, int track, int *tracklength, int *indexoffsetp, int *multirev, int mfm) { - uae_u8 *p; - int outlen, i; - struct fdi_cache *cache = &fdi->cache[track]; + uae_u8 *p; + int outlen, i; + struct fdi_cache *cache = &fdi->cache[track]; - if (cache->lowlevel) - return fdi2raw_loadrevolution_2 (fdi, mfmbuf, tracktiming, track, tracklength, indexoffsetp, multirev, mfm); + if (cache->lowlevel) + return fdi2raw_loadrevolution_2(fdi, mfmbuf, tracktiming, track, tracklength, indexoffsetp, multirev, mfm); - fdi->err = 0; - fdi->track_src_len = fdi->track_offsets[track + 1] - fdi->track_offsets[track]; - if (fseek (fdi->file, fdi->track_offsets[track], SEEK_SET) == -1) - fatal("fdi2raw_loadtrack(): Error seeking to the beginning of the file\n"); - if (fread (fdi->track_src_buffer, 1, fdi->track_src_len, fdi->file) != fdi->track_src_len) - fatal("fdi2raw_loadtrack(): Error reading data\n"); - memset (fdi->track_dst_buffer, 0, MAX_DST_BUFFER); - fdi->track_dst_buffer_timing[0] = 0; + fdi->err = 0; + fdi->track_src_len = fdi->track_offsets[track + 1] - fdi->track_offsets[track]; + if (fseek(fdi->file, fdi->track_offsets[track], SEEK_SET) == -1) + fatal("fdi2raw_loadtrack(): Error seeking to the beginning of the file\n"); + if (fread(fdi->track_src_buffer, 1, fdi->track_src_len, fdi->file) != fdi->track_src_len) + fatal("fdi2raw_loadtrack(): Error reading data\n"); + memset(fdi->track_dst_buffer, 0, MAX_DST_BUFFER); + fdi->track_dst_buffer_timing[0] = 0; - fdi->current_track = track; - fdi->track_src = fdi->track_src_buffer; - fdi->track_dst = fdi->track_dst_buffer; - p = fdi->header + 152 + fdi->current_track * 2; - fdi->track_type = *p++; - fdi->track_len = *p++; - fdi->bit_rate = 0; - fdi->out = 0; - fdi->mfmsync_offset = 0; + fdi->current_track = track; + fdi->track_src = fdi->track_src_buffer; + fdi->track_dst = fdi->track_dst_buffer; + p = fdi->header + 152 + fdi->current_track * 2; + fdi->track_type = *p++; + fdi->track_len = *p++; + fdi->bit_rate = 0; + fdi->out = 0; + fdi->mfmsync_offset = 0; - if ((fdi->track_type & 0xf0) == 0xf0 || (fdi->track_type & 0xf0) == 0xe0) - fdi->bit_rate = bit_rate_table[fdi->track_type & 0x0f]; - else - fdi->bit_rate = 250; + if ((fdi->track_type & 0xf0) == 0xf0 || (fdi->track_type & 0xf0) == 0xe0) + fdi->bit_rate = bit_rate_table[fdi->track_type & 0x0f]; + else + fdi->bit_rate = 250; - /* fdi2raw_log("track %d: srclen: %d track_type: %02.2X, bitrate: %d\n", - fdi->current_track, fdi->track_src_len, fdi->track_type, fdi->bit_rate); */ + /* fdi2raw_log("track %d: srclen: %d track_type: %02.2X, bitrate: %d\n", + fdi->current_track, fdi->track_src_len, fdi->track_type, fdi->bit_rate); */ - if ((fdi->track_type & 0xc0) == 0x80) { + if ((fdi->track_type & 0xc0) == 0x80) { - outlen = decode_lowlevel_track (fdi, track, cache); + outlen = decode_lowlevel_track(fdi, track, cache); - } else if ((fdi->track_type & 0xf0) == 0xf0) { + } else if ((fdi->track_type & 0xf0) == 0xf0) { - outlen = decode_raw_track (fdi); + outlen = decode_raw_track(fdi); - } else if ((fdi->track_type & 0xf0) == 0xe0) { + } else if ((fdi->track_type & 0xf0) == 0xe0) { - outlen = handle_sectors_described_track (fdi); + outlen = handle_sectors_described_track(fdi); - } else if ((fdi->track_type & 0xf0)) { + } else if ((fdi->track_type & 0xf0)) { - zxx (fdi); - outlen = -1; + zxx(fdi); + outlen = -1; - } else if (fdi->track_type < 0x0f) { + } else if (fdi->track_type < 0x0f) { - decode_normal_track[fdi->track_type](fdi); - fix_mfm_sync (fdi); - outlen = fdi->out; + decode_normal_track[fdi->track_type](fdi); + fix_mfm_sync(fdi); + outlen = fdi->out; - } else { + } else { - zxx (fdi); - outlen = -1; + zxx(fdi); + outlen = -1; + } - } + if (fdi->err) + return 0; - if (fdi->err) - return 0; - - if (outlen > 0) { - if (cache->lowlevel) - return fdi2raw_loadrevolution_2 (fdi, mfmbuf, tracktiming, track, tracklength, indexoffsetp, multirev, mfm); - *tracklength = fdi->out; - for (i = 0; i < ((*tracklength) + 15) / (2 * 8); i++) { - uae_u8 *data = fdi->track_dst_buffer + i * 2; - *mfmbuf++ = 256 * *data + *(data + 1); - } - } - return outlen; + if (outlen > 0) { + if (cache->lowlevel) + return fdi2raw_loadrevolution_2(fdi, mfmbuf, tracktiming, track, tracklength, indexoffsetp, multirev, mfm); + *tracklength = fdi->out; + for (i = 0; i < ((*tracklength) + 15) / (2 * 8); i++) { + uae_u8 *data = fdi->track_dst_buffer + i * 2; + *mfmbuf++ = 256 * *data + *(data + 1); + } + } + return outlen; } From c520a1e86483bf0174d9ff8238f0ccf137a4a102 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:14:24 -0400 Subject: [PATCH 360/386] clang-format in src/game/ --- src/game/gameport.c | 500 +++++++++++++------------ src/game/joystick_ch_flightstick_pro.c | 123 +++--- src/game/joystick_standard.c | 486 ++++++++++++------------ src/game/joystick_sw_pad.c | 323 ++++++++-------- src/game/joystick_tm_fcs.c | 122 +++--- 5 files changed, 776 insertions(+), 778 deletions(-) diff --git a/src/game/gameport.c b/src/game/gameport.c index 5f845b485..44153eff4 100644 --- a/src/game/gameport.c +++ b/src/game/gameport.c @@ -37,100 +37,100 @@ #include <86box/joystick_tm_fcs.h> typedef struct { - pc_timer_t timer; - int axis_nr; + pc_timer_t timer; + int axis_nr; struct _joystick_instance_ *joystick; } g_axis_t; typedef struct _gameport_ { - uint16_t addr; - uint8_t len; + uint16_t addr; + uint8_t len; struct _joystick_instance_ *joystick; - struct _gameport_ *next; + struct _gameport_ *next; } gameport_t; typedef struct _joystick_instance_ { - uint8_t state; - g_axis_t axis[4]; + uint8_t state; + g_axis_t axis[4]; const joystick_if_t *intf; - void *dat; + void *dat; } joystick_instance_t; -int joystick_type = 0; +int joystick_type = 0; static const joystick_if_t joystick_none = { - .name = "None", + .name = "None", .internal_name = "none", - .init = NULL, - .close = NULL, - .read = NULL, - .write = NULL, - .read_axis = NULL, - .a0_over = NULL, - .axis_count = 0, - .button_count = 0, - .pov_count = 0, + .init = NULL, + .close = NULL, + .read = NULL, + .write = NULL, + .read_axis = NULL, + .a0_over = NULL, + .axis_count = 0, + .button_count = 0, + .pov_count = 0, .max_joysticks = 0, - .axis_names = { NULL }, - .button_names = { NULL }, - .pov_names = { NULL } + .axis_names = { NULL }, + .button_names = { NULL }, + .pov_names = { NULL } }; static const struct { - const joystick_if_t *joystick; + const joystick_if_t *joystick; } joysticks[] = { - { &joystick_none }, - { &joystick_2axis_2button }, - { &joystick_2axis_4button }, - { &joystick_2axis_6button }, - { &joystick_2axis_8button }, - { &joystick_3axis_2button }, - { &joystick_3axis_4button }, - { &joystick_4axis_4button }, + { &joystick_none }, + { &joystick_2axis_2button }, + { &joystick_2axis_4button }, + { &joystick_2axis_6button }, + { &joystick_2axis_8button }, + { &joystick_3axis_2button }, + { &joystick_3axis_4button }, + { &joystick_4axis_4button }, { &joystick_ch_flightstick_pro }, - { &joystick_sw_pad }, - { &joystick_tm_fcs }, - { NULL } + { &joystick_sw_pad }, + { &joystick_tm_fcs }, + { NULL } }; static joystick_instance_t *joystick_instance = NULL; static uint8_t gameport_pnp_rom[] = { - 0x09, 0xf8, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, /* BOX0002, dummy checksum (filled in by isapnp_add_card) */ - 0x0a, 0x10, 0x10, /* PnP version 1.0, vendor version 1.0 */ + 0x09, 0xf8, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, /* BOX0002, dummy checksum (filled in by isapnp_add_card) */ + 0x0a, 0x10, 0x10, /* PnP version 1.0, vendor version 1.0 */ 0x82, 0x09, 0x00, 'G', 'a', 'm', 'e', ' ', 'P', 'o', 'r', 't', /* ANSI identifier */ - 0x15, 0x09, 0xf8, 0x00, 0x02, 0x01, /* logical device BOX0002, can participate in boot */ - 0x1c, 0x41, 0xd0, 0xb0, 0x2f, /* compatible device PNPB02F */ - 0x31, 0x00, /* start dependent functions, preferred */ - 0x47, 0x01, 0x00, 0x02, 0x00, 0x02, 0x08, 0x08, /* I/O 0x200, decodes 16-bit, 8-byte alignment, 8 addresses */ - 0x30, /* start dependent functions, acceptable */ - 0x47, 0x01, 0x08, 0x02, 0x08, 0x02, 0x08, 0x08, /* I/O 0x208, decodes 16-bit, 8-byte alignment, 8 addresses */ - 0x31, 0x02, /* start dependent functions, sub-optimal */ - 0x47, 0x01, 0x00, 0x01, 0xf8, 0xff, 0x08, 0x08, /* I/O 0x100-0xFFF8, decodes 16-bit, 8-byte alignment, 8 addresses */ - 0x38, /* end dependent functions */ + 0x15, 0x09, 0xf8, 0x00, 0x02, 0x01, /* logical device BOX0002, can participate in boot */ + 0x1c, 0x41, 0xd0, 0xb0, 0x2f, /* compatible device PNPB02F */ + 0x31, 0x00, /* start dependent functions, preferred */ + 0x47, 0x01, 0x00, 0x02, 0x00, 0x02, 0x08, 0x08, /* I/O 0x200, decodes 16-bit, 8-byte alignment, 8 addresses */ + 0x30, /* start dependent functions, acceptable */ + 0x47, 0x01, 0x08, 0x02, 0x08, 0x02, 0x08, 0x08, /* I/O 0x208, decodes 16-bit, 8-byte alignment, 8 addresses */ + 0x31, 0x02, /* start dependent functions, sub-optimal */ + 0x47, 0x01, 0x00, 0x01, 0xf8, 0xff, 0x08, 0x08, /* I/O 0x100-0xFFF8, decodes 16-bit, 8-byte alignment, 8 addresses */ + 0x38, /* end dependent functions */ 0x79, 0x00 /* end tag, dummy checksum (filled in by isapnp_add_card) */ }; static const isapnp_device_config_t gameport_pnp_defaults[] = { - { - .activate = 1, - .io = { { .base = 0x200 }, } - } + {.activate = 1, + .io = { + { .base = 0x200 }, + }} }; -const device_t *standalone_gameport_type; -int gameport_instance_id = 0; +const device_t *standalone_gameport_type; +int gameport_instance_id = 0; /* Linked list of active game ports. Only the top port responds to reads or writes, and ports at the standard 200h location are prioritized. */ -static gameport_t *active_gameports = NULL; +static gameport_t *active_gameports = NULL; char * joystick_get_name(int js) { if (!joysticks[js].joystick) - return NULL; + return NULL; return (char *) joysticks[js].joystick->name; } @@ -138,7 +138,7 @@ char * joystick_get_internal_name(int js) { if (joysticks[js].joystick == NULL) - return ""; + return ""; return (char *) joysticks[js].joystick->internal_name; } @@ -149,9 +149,9 @@ joystick_get_from_internal_name(char *s) int c = 0; while (joysticks[c].joystick != NULL) { - if (!strcmp((char *) joysticks[c].joystick->internal_name, s)) - return c; - c++; + if (!strcmp((char *) joysticks[c].joystick->internal_name, s)) + return c; + c++; } return 0; @@ -203,25 +203,25 @@ static void gameport_time(joystick_instance_t *joystick, int nr, int axis) { if (axis == AXIS_NOT_PRESENT) - timer_disable(&joystick->axis[nr].timer); + timer_disable(&joystick->axis[nr].timer); else { - /* Convert axis value to 555 timing. */ - axis += 32768; - axis = (axis * 100) / 65; /* axis now in ohms */ - axis = (axis * 11) / 1000; - timer_set_delay_u64(&joystick->axis[nr].timer, TIMER_USEC * (axis + 24)); /* max = 11.115 ms */ + /* Convert axis value to 555 timing. */ + axis += 32768; + axis = (axis * 100) / 65; /* axis now in ohms */ + axis = (axis * 11) / 1000; + timer_set_delay_u64(&joystick->axis[nr].timer, TIMER_USEC * (axis + 24)); /* max = 11.115 ms */ } } static void gameport_write(uint16_t addr, uint8_t val, void *priv) { - gameport_t *dev = (gameport_t *) priv; + gameport_t *dev = (gameport_t *) priv; joystick_instance_t *joystick = dev->joystick; /* Respond only if a joystick is present and this port is at the top of the active ports list. */ if (!joystick || (active_gameports != dev)) - return; + return; /* Read all axes. */ joystick->state |= 0x0f; @@ -240,12 +240,12 @@ gameport_write(uint16_t addr, uint8_t val, void *priv) static uint8_t gameport_read(uint16_t addr, void *priv) { - gameport_t *dev = (gameport_t *) priv; + gameport_t *dev = (gameport_t *) priv; joystick_instance_t *joystick = dev->joystick; /* Respond only if a joystick is present and this port is at the top of the active ports list. */ if (!joystick || (active_gameports != dev)) - return 0xff; + return 0xff; /* Merge axis state with button state. */ uint8_t ret = joystick->state | joystick->intf->read(joystick->dat); @@ -264,7 +264,7 @@ timer_over(void *priv) /* Notify the joystick when the first axis' period is finished. */ if (axis == &axis->joystick->axis[0]) - axis->joystick->intf->a0_over(axis->joystick->dat); + axis->joystick->intf->a0_over(axis->joystick->dat); } void @@ -272,13 +272,13 @@ gameport_update_joystick_type(void) { /* Add a standalone game port if a joystick is enabled but no other game ports exist. */ if (standalone_gameport_type) - gameport_add(standalone_gameport_type); + gameport_add(standalone_gameport_type); /* Reset the joystick interface. */ if (joystick_instance) { - joystick_instance->intf->close(joystick_instance->dat); - joystick_instance->intf = joysticks[joystick_type].joystick; - joystick_instance->dat = joystick_instance->intf->init(); + joystick_instance->intf->close(joystick_instance->dat); + joystick_instance->intf = joysticks[joystick_type].joystick; + joystick_instance->dat = joystick_instance->intf->init(); } } @@ -288,44 +288,44 @@ gameport_remap(void *priv, uint16_t address) gameport_t *dev = (gameport_t *) priv, *other_dev; if (dev->addr) { - /* Remove this port from the active ports list. */ - if (active_gameports == dev) { - active_gameports = dev->next; - dev->next = NULL; - } else { - other_dev = active_gameports; - while (other_dev) { - if (other_dev->next == dev) { - other_dev->next = dev->next; - dev->next = NULL; - break; - } - other_dev = other_dev->next; - } - } + /* Remove this port from the active ports list. */ + if (active_gameports == dev) { + active_gameports = dev->next; + dev->next = NULL; + } else { + other_dev = active_gameports; + while (other_dev) { + if (other_dev->next == dev) { + other_dev->next = dev->next; + dev->next = NULL; + break; + } + other_dev = other_dev->next; + } + } - io_removehandler(dev->addr, dev->len, - gameport_read, NULL, NULL, gameport_write, NULL, NULL, dev); + io_removehandler(dev->addr, dev->len, + gameport_read, NULL, NULL, gameport_write, NULL, NULL, dev); } dev->addr = address; if (dev->addr) { - /* Add this port to the active ports list. */ - if (!active_gameports || ((dev->addr & 0xfff8) == 0x200)) { - /* No ports have been added yet, or port within 200-207h: add to top. */ - dev->next = active_gameports; - active_gameports = dev; - } else { - /* Port at other addresses: add to bottom. */ - other_dev = active_gameports; - while (other_dev->next) - other_dev = other_dev->next; - other_dev->next = dev; - } + /* Add this port to the active ports list. */ + if (!active_gameports || ((dev->addr & 0xfff8) == 0x200)) { + /* No ports have been added yet, or port within 200-207h: add to top. */ + dev->next = active_gameports; + active_gameports = dev; + } else { + /* Port at other addresses: add to bottom. */ + other_dev = active_gameports; + while (other_dev->next) + other_dev = other_dev->next; + other_dev->next = dev; + } - io_sethandler(dev->addr, dev->len, - gameport_read, NULL, NULL, gameport_write, NULL, NULL, dev); + io_sethandler(dev->addr, dev->len, + gameport_read, NULL, NULL, gameport_write, NULL, NULL, dev); } } @@ -333,7 +333,7 @@ static void gameport_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv) { if (ld > 0) - return; + return; gameport_t *dev = (gameport_t *) priv; @@ -347,7 +347,7 @@ gameport_add(const device_t *gameport_type) /* Prevent a standalone game port from being added later on, unless this is an unused Super I/O game port (no MACHINE_GAMEPORT machine flag). */ if (!(gameport_type->local & GAMEPORT_SIO) || machine_has_flags(machine, MACHINE_GAMEPORT)) - standalone_gameport_type = NULL; + standalone_gameport_type = NULL; /* Add game port device. */ return device_add_inst(gameport_type, gameport_instance_id++); @@ -363,26 +363,26 @@ gameport_init(const device_t *info) /* Allocate global instance. */ if (!joystick_instance && joystick_type) { - joystick_instance = malloc(sizeof(joystick_instance_t)); - memset(joystick_instance, 0x00, sizeof(joystick_instance_t)); + joystick_instance = malloc(sizeof(joystick_instance_t)); + memset(joystick_instance, 0x00, sizeof(joystick_instance_t)); - joystick_instance->axis[0].joystick = joystick_instance; - joystick_instance->axis[1].joystick = joystick_instance; - joystick_instance->axis[2].joystick = joystick_instance; - joystick_instance->axis[3].joystick = joystick_instance; + joystick_instance->axis[0].joystick = joystick_instance; + joystick_instance->axis[1].joystick = joystick_instance; + joystick_instance->axis[2].joystick = joystick_instance; + joystick_instance->axis[3].joystick = joystick_instance; - joystick_instance->axis[0].axis_nr = 0; - joystick_instance->axis[1].axis_nr = 1; - joystick_instance->axis[2].axis_nr = 2; - joystick_instance->axis[3].axis_nr = 3; + joystick_instance->axis[0].axis_nr = 0; + joystick_instance->axis[1].axis_nr = 1; + joystick_instance->axis[2].axis_nr = 2; + joystick_instance->axis[3].axis_nr = 3; - timer_add(&joystick_instance->axis[0].timer, timer_over, &joystick_instance->axis[0], 0); - timer_add(&joystick_instance->axis[1].timer, timer_over, &joystick_instance->axis[1], 0); - timer_add(&joystick_instance->axis[2].timer, timer_over, &joystick_instance->axis[2], 0); - timer_add(&joystick_instance->axis[3].timer, timer_over, &joystick_instance->axis[3], 0); + timer_add(&joystick_instance->axis[0].timer, timer_over, &joystick_instance->axis[0], 0); + timer_add(&joystick_instance->axis[1].timer, timer_over, &joystick_instance->axis[1], 0); + timer_add(&joystick_instance->axis[2].timer, timer_over, &joystick_instance->axis[2], 0); + timer_add(&joystick_instance->axis[3].timer, timer_over, &joystick_instance->axis[3], 0); - joystick_instance->intf = joysticks[joystick_type].joystick; - joystick_instance->dat = joystick_instance->intf->init(); + joystick_instance->intf = joysticks[joystick_type].joystick; + joystick_instance->dat = joystick_instance->intf->init(); } dev->joystick = joystick_instance; @@ -393,7 +393,7 @@ gameport_init(const device_t *info) /* Register ISAPnP if this is a standard game port card. */ if ((info->local & 0xffff) == 0x200) - isapnp_set_device_defaults(isapnp_add_card(gameport_pnp_rom, sizeof(gameport_pnp_rom), gameport_pnp_config_changed, NULL, NULL, NULL, dev), 0, gameport_pnp_defaults); + isapnp_set_device_defaults(isapnp_add_card(gameport_pnp_rom, sizeof(gameport_pnp_rom), gameport_pnp_config_changed, NULL, NULL, NULL, dev), 0, gameport_pnp_defaults); return dev; } @@ -401,14 +401,14 @@ gameport_init(const device_t *info) static void * tmacm_init(const device_t *info) { - uint16_t port = 0x0000; - gameport_t *dev = NULL; + uint16_t port = 0x0000; + gameport_t *dev = NULL; dev = malloc(sizeof(gameport_t)); memset(dev, 0x00, sizeof(gameport_t)); port = device_get_config_hex16("port1_addr"); - switch(port) { + switch (port) { case 0x201: dev = gameport_add(&gameport_201_device); break; @@ -426,7 +426,7 @@ tmacm_init(const device_t *info) } port = device_get_config_hex16("port2_addr"); - switch(port) { + switch (port) { case 0x201: dev = gameport_add(&gameport_209_device); break; @@ -456,156 +456,157 @@ gameport_close(void *priv) /* Free the global instance here, if it wasn't already freed. */ if (joystick_instance) { - joystick_instance->intf->close(joystick_instance->dat); + joystick_instance->intf->close(joystick_instance->dat); - free(joystick_instance); - joystick_instance = NULL; + free(joystick_instance); + joystick_instance = NULL; } free(dev); } const device_t gameport_device = { - .name = "Game port", + .name = "Game port", .internal_name = "gameport", - .flags = 0, - .local = 0x080200, - .init = gameport_init, - .close = gameport_close, - .reset = NULL, + .flags = 0, + .local = 0x080200, + .init = gameport_init, + .close = gameport_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t gameport_201_device = { - .name = "Game port (Port 201h only)", + .name = "Game port (Port 201h only)", .internal_name = "gameport_201", - .flags = 0, - .local = 0x010201, - .init = gameport_init, - .close = gameport_close, - .reset = NULL, + .flags = 0, + .local = 0x010201, + .init = gameport_init, + .close = gameport_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t gameport_203_device = { - .name = "Game port (Port 203h only)", + .name = "Game port (Port 203h only)", .internal_name = "gameport_203", - .flags = 0, - .local = 0x010203, - .init = gameport_init, - .close = gameport_close, - .reset = NULL, + .flags = 0, + .local = 0x010203, + .init = gameport_init, + .close = gameport_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t gameport_205_device = { - .name = "Game port (Port 205h only)", + .name = "Game port (Port 205h only)", .internal_name = "gameport_205", - .flags = 0, - .local = 0x010205, - .init = gameport_init, - .close = gameport_close, - .reset = NULL, + .flags = 0, + .local = 0x010205, + .init = gameport_init, + .close = gameport_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t gameport_207_device = { - .name = "Game port (Port 207h only)", + .name = "Game port (Port 207h only)", .internal_name = "gameport_207", - .flags = 0, - .local = 0x010207, - .init = gameport_init, - .close = gameport_close, - .reset = NULL, + .flags = 0, + .local = 0x010207, + .init = gameport_init, + .close = gameport_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t gameport_208_device = { - .name = "Game port (Port 208h-20fh)", + .name = "Game port (Port 208h-20fh)", .internal_name = "gameport_208", - .flags = 0, - .local = 0x080208, - .init = gameport_init, - .close = gameport_close, - .reset = NULL, + .flags = 0, + .local = 0x080208, + .init = gameport_init, + .close = gameport_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t gameport_209_device = { - .name = "Game port (Port 209h only)", + .name = "Game port (Port 209h only)", .internal_name = "gameport_209", - .flags = 0, - .local = 0x010209, - .init = gameport_init, - .close = gameport_close, - .reset = NULL, + .flags = 0, + .local = 0x010209, + .init = gameport_init, + .close = gameport_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t gameport_20b_device = { - .name = "Game port (Port 20Bh only)", + .name = "Game port (Port 20Bh only)", .internal_name = "gameport_20b", - .flags = 0, - .local = 0x01020B, - .init = gameport_init, - .close = gameport_close, - .reset = NULL, + .flags = 0, + .local = 0x01020B, + .init = gameport_init, + .close = gameport_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t gameport_20d_device = { - .name = "Game port (Port 20Dh only)", + .name = "Game port (Port 20Dh only)", .internal_name = "gameport_20d", - .flags = 0, - .local = 0x01020D, - .init = gameport_init, - .close = gameport_close, - .reset = NULL, + .flags = 0, + .local = 0x01020D, + .init = gameport_init, + .close = gameport_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t gameport_20f_device = { - .name = "Game port (Port 20Fh only)", + .name = "Game port (Port 20Fh only)", .internal_name = "gameport_20f", - .flags = 0, - .local = 0x01020F, - .init = gameport_init, - .close = gameport_close, - .reset = NULL, + .flags = 0, + .local = 0x01020F, + .init = gameport_init, + .close = gameport_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; static const device_config_t tmacm_config[] = { + // clang-format off { .name = "port1_addr", .description = "Port 1 Address", @@ -641,74 +642,75 @@ static const device_config_t tmacm_config[] = { } }, { "", "", -1 } +// clang-format on }; const device_t gameport_tm_acm_device = { - .name = "Game port (ThrustMaster ACM)", + .name = "Game port (ThrustMaster ACM)", .internal_name = "gameport_tmacm", - .flags = DEVICE_ISA, - .local = 0, - .init = tmacm_init, - .close = NULL, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = tmacm_init, + .close = NULL, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = tmacm_config + .force_redraw = NULL, + .config = tmacm_config }; const device_t gameport_pnp_device = { - .name = "Game port (Plug and Play only)", + .name = "Game port (Plug and Play only)", .internal_name = "gameport_pnp", - .flags = 0, - .local = 0x080000, - .init = gameport_init, - .close = gameport_close, - .reset = NULL, + .flags = 0, + .local = 0x080000, + .init = gameport_init, + .close = gameport_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t gameport_pnp_6io_device = { - .name = "Game port (Plug and Play only, 6 I/O ports)", + .name = "Game port (Plug and Play only, 6 I/O ports)", .internal_name = "gameport_pnp_6io", - .flags = 0, - .local = 0x060000, - .init = gameport_init, - .close = gameport_close, - .reset = NULL, + .flags = 0, + .local = 0x060000, + .init = gameport_init, + .close = gameport_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t gameport_sio_device = { - .name = "Game port (Super I/O)", + .name = "Game port (Super I/O)", .internal_name = "gameport_sio", - .flags = 0, - .local = 0x1080000, - .init = gameport_init, - .close = gameport_close, - .reset = NULL, + .flags = 0, + .local = 0x1080000, + .init = gameport_init, + .close = gameport_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t gameport_sio_1io_device = { - .name = "Game port (Super I/O, 1 I/O port)", + .name = "Game port (Super I/O, 1 I/O port)", .internal_name = "gameport_sio", - .flags = 0, - .local = 0x1010000, - .init = gameport_init, - .close = gameport_close, - .reset = NULL, + .flags = 0, + .local = 0x1010000, + .init = gameport_init, + .close = gameport_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/game/joystick_ch_flightstick_pro.c b/src/game/joystick_ch_flightstick_pro.c index 5be3ce50f..4d0830015 100644 --- a/src/game/joystick_ch_flightstick_pro.c +++ b/src/game/joystick_ch_flightstick_pro.c @@ -45,89 +45,90 @@ #include <86box/gameport.h> #include <86box/joystick_standard.h> - -static void *ch_flightstick_pro_init(void) +static void * +ch_flightstick_pro_init(void) { - return NULL; + return NULL; } -static void ch_flightstick_pro_close(void *p) +static void +ch_flightstick_pro_close(void *p) { } -static uint8_t ch_flightstick_pro_read(void *p) +static uint8_t +ch_flightstick_pro_read(void *p) { - uint8_t ret = 0xf0; + uint8_t ret = 0xf0; - if (JOYSTICK_PRESENT(0)) - { - if (joystick_state[0].button[0]) - ret &= ~0x10; - if (joystick_state[0].button[1]) - ret &= ~0x20; - if (joystick_state[0].button[2]) - ret &= ~0x40; - if (joystick_state[0].button[3]) - ret &= ~0x80; - if (joystick_state[0].pov[0] != -1) - { - if (joystick_state[0].pov[0] > 315 || joystick_state[0].pov[0] < 45) - ret &= ~0xf0; - else if (joystick_state[0].pov[0] >= 45 && joystick_state[0].pov[0] < 135) - ret &= ~0xb0; - else if (joystick_state[0].pov[0] >= 135 && joystick_state[0].pov[0] < 225) - ret &= ~0x70; - else if (joystick_state[0].pov[0] >= 225 && joystick_state[0].pov[0] < 315) - ret &= ~0x30; - } + if (JOYSTICK_PRESENT(0)) { + if (joystick_state[0].button[0]) + ret &= ~0x10; + if (joystick_state[0].button[1]) + ret &= ~0x20; + if (joystick_state[0].button[2]) + ret &= ~0x40; + if (joystick_state[0].button[3]) + ret &= ~0x80; + if (joystick_state[0].pov[0] != -1) { + if (joystick_state[0].pov[0] > 315 || joystick_state[0].pov[0] < 45) + ret &= ~0xf0; + else if (joystick_state[0].pov[0] >= 45 && joystick_state[0].pov[0] < 135) + ret &= ~0xb0; + else if (joystick_state[0].pov[0] >= 135 && joystick_state[0].pov[0] < 225) + ret &= ~0x70; + else if (joystick_state[0].pov[0] >= 225 && joystick_state[0].pov[0] < 315) + ret &= ~0x30; } + } - return ret; + return ret; } -static void ch_flightstick_pro_write(void *p) +static void +ch_flightstick_pro_write(void *p) { } -static int ch_flightstick_pro_read_axis(void *p, int axis) +static int +ch_flightstick_pro_read_axis(void *p, int axis) { - if (!JOYSTICK_PRESENT(0)) - return AXIS_NOT_PRESENT; + if (!JOYSTICK_PRESENT(0)) + return AXIS_NOT_PRESENT; - switch (axis) - { - case 0: - return joystick_state[0].axis[0]; - case 1: - return joystick_state[0].axis[1]; - case 2: - return 0; - case 3: - return joystick_state[0].axis[2]; - default: - return 0; - } + switch (axis) { + case 0: + return joystick_state[0].axis[0]; + case 1: + return joystick_state[0].axis[1]; + case 2: + return 0; + case 3: + return joystick_state[0].axis[2]; + default: + return 0; + } } -static void ch_flightstick_pro_a0_over(void *p) +static void +ch_flightstick_pro_a0_over(void *p) { } -const joystick_if_t joystick_ch_flightstick_pro = -{ - .name = "CH Flightstick Pro", +const joystick_if_t joystick_ch_flightstick_pro = { + .name = "CH Flightstick Pro", .internal_name = "ch_flightstick_pro", - .init = ch_flightstick_pro_init, - .close = ch_flightstick_pro_close, - .read = ch_flightstick_pro_read, - .write = ch_flightstick_pro_write, - .read_axis = ch_flightstick_pro_read_axis, - .a0_over = ch_flightstick_pro_a0_over, - .axis_count = 3, - .button_count = 4, - .pov_count = 1, + .init = ch_flightstick_pro_init, + .close = ch_flightstick_pro_close, + .read = ch_flightstick_pro_read, + .write = ch_flightstick_pro_write, + .read_axis = ch_flightstick_pro_read_axis, + .a0_over = ch_flightstick_pro_a0_over, + .axis_count = 3, + .button_count = 4, + .pov_count = 1, .max_joysticks = 1, - .axis_names = { "X axis", "Y axis", "Throttle" }, - .button_names = { "Button 1", "Button 2", "Button 3", "Button 4" }, - .pov_names = { "POV" } + .axis_names = {"X axis", "Y axis", "Throttle" }, + .button_names = { "Button 1", "Button 2", "Button 3", "Button 4" }, + .pov_names = { "POV"} }; diff --git a/src/game/joystick_standard.c b/src/game/joystick_standard.c index ce2a72664..9b3ab8236 100644 --- a/src/game/joystick_standard.c +++ b/src/game/joystick_standard.c @@ -45,319 +45,321 @@ #include <86box/gameport.h> #include <86box/joystick_standard.h> - -static void *joystick_standard_init(void) +static void * +joystick_standard_init(void) { - return NULL; + return NULL; } -static void joystick_standard_close(void *p) +static void +joystick_standard_close(void *p) { } -static uint8_t joystick_standard_read(void *p) +static uint8_t +joystick_standard_read(void *p) { - uint8_t ret = 0xf0; + uint8_t ret = 0xf0; - if (JOYSTICK_PRESENT(0)) - { - if (joystick_state[0].button[0]) - ret &= ~0x10; - if (joystick_state[0].button[1]) - ret &= ~0x20; - } - if (JOYSTICK_PRESENT(1)) - { - if (joystick_state[1].button[0]) - ret &= ~0x40; - if (joystick_state[1].button[1]) - ret &= ~0x80; - } + if (JOYSTICK_PRESENT(0)) { + if (joystick_state[0].button[0]) + ret &= ~0x10; + if (joystick_state[0].button[1]) + ret &= ~0x20; + } + if (JOYSTICK_PRESENT(1)) { + if (joystick_state[1].button[0]) + ret &= ~0x40; + if (joystick_state[1].button[1]) + ret &= ~0x80; + } - return ret; + return ret; } -static uint8_t joystick_standard_read_4button(void *p) +static uint8_t +joystick_standard_read_4button(void *p) { - uint8_t ret = 0xf0; + uint8_t ret = 0xf0; - if (JOYSTICK_PRESENT(0)) - { - if (joystick_state[0].button[0]) - ret &= ~0x10; - if (joystick_state[0].button[1]) - ret &= ~0x20; - if (joystick_state[0].button[2]) - ret &= ~0x40; - if (joystick_state[0].button[3]) - ret &= ~0x80; - } + if (JOYSTICK_PRESENT(0)) { + if (joystick_state[0].button[0]) + ret &= ~0x10; + if (joystick_state[0].button[1]) + ret &= ~0x20; + if (joystick_state[0].button[2]) + ret &= ~0x40; + if (joystick_state[0].button[3]) + ret &= ~0x80; + } - return ret; + return ret; } -static void joystick_standard_write(void *p) +static void +joystick_standard_write(void *p) { } -static int joystick_standard_read_axis(void *p, int axis) +static int +joystick_standard_read_axis(void *p, int axis) { - switch (axis) - { - case 0: - if (!JOYSTICK_PRESENT(0)) - return AXIS_NOT_PRESENT; - return joystick_state[0].axis[0]; - case 1: - if (!JOYSTICK_PRESENT(0)) - return AXIS_NOT_PRESENT; - return joystick_state[0].axis[1]; - case 2: - if (!JOYSTICK_PRESENT(1)) - return AXIS_NOT_PRESENT; - return joystick_state[1].axis[0]; - case 3: - if (!JOYSTICK_PRESENT(1)) - return AXIS_NOT_PRESENT; - return joystick_state[1].axis[1]; - default: - return 0; - } -} - -static int joystick_standard_read_axis_4button(void *p, int axis) -{ - if (!JOYSTICK_PRESENT(0)) + switch (axis) { + case 0: + if (!JOYSTICK_PRESENT(0)) return AXIS_NOT_PRESENT; - - switch (axis) - { - case 0: - return joystick_state[0].axis[0]; - case 1: - return joystick_state[0].axis[1]; - case 2: - return 0; - case 3: - return 0; - default: - return 0; - } -} - -static int joystick_standard_read_axis_3axis(void *p, int axis) -{ - if (!JOYSTICK_PRESENT(0)) + return joystick_state[0].axis[0]; + case 1: + if (!JOYSTICK_PRESENT(0)) return AXIS_NOT_PRESENT; - - switch (axis) - { - case 0: - return joystick_state[0].axis[0]; - case 1: - return joystick_state[0].axis[1]; - case 2: - return joystick_state[0].axis[2]; - case 3: - return 0; + return joystick_state[0].axis[1]; + case 2: + if (!JOYSTICK_PRESENT(1)) + return AXIS_NOT_PRESENT; + return joystick_state[1].axis[0]; + case 3: + if (!JOYSTICK_PRESENT(1)) + return AXIS_NOT_PRESENT; + return joystick_state[1].axis[1]; default: - return 0; - } + return 0; + } } -static int joystick_standard_read_axis_4axis(void *p, int axis) +static int +joystick_standard_read_axis_4button(void *p, int axis) { - if (!JOYSTICK_PRESENT(0)) - return AXIS_NOT_PRESENT; + if (!JOYSTICK_PRESENT(0)) + return AXIS_NOT_PRESENT; - switch (axis) - { - case 0: - return joystick_state[0].axis[0]; - case 1: - return joystick_state[0].axis[1]; - case 2: - return joystick_state[0].axis[2]; - case 3: - return joystick_state[0].axis[3]; + switch (axis) { + case 0: + return joystick_state[0].axis[0]; + case 1: + return joystick_state[0].axis[1]; + case 2: + return 0; + case 3: + return 0; default: - return 0; - } + return 0; + } } -static int joystick_standard_read_axis_6button(void *p, int axis) +static int +joystick_standard_read_axis_3axis(void *p, int axis) { - if (!JOYSTICK_PRESENT(0)) - return AXIS_NOT_PRESENT; + if (!JOYSTICK_PRESENT(0)) + return AXIS_NOT_PRESENT; - switch (axis) - { - case 0: - return joystick_state[0].axis[0]; - case 1: - return joystick_state[0].axis[1]; - case 2: - return joystick_state[0].button[4] ? -32767 : 32768; - case 3: - return joystick_state[0].button[5] ? -32767 : 32768; - default: - return 0; - } + switch (axis) { + case 0: + return joystick_state[0].axis[0]; + case 1: + return joystick_state[0].axis[1]; + case 2: + return joystick_state[0].axis[2]; + case 3: + return 0; + default: + return 0; + } } -static int joystick_standard_read_axis_8button(void *p, int axis) + +static int +joystick_standard_read_axis_4axis(void *p, int axis) { - if (!JOYSTICK_PRESENT(0)) - return AXIS_NOT_PRESENT; + if (!JOYSTICK_PRESENT(0)) + return AXIS_NOT_PRESENT; - switch (axis) - { - case 0: - return joystick_state[0].axis[0]; - case 1: - return joystick_state[0].axis[1]; - case 2: - if (joystick_state[0].button[4]) - return -32767; - if (joystick_state[0].button[6]) - return 32768; - return 0; - case 3: - if (joystick_state[0].button[5]) - return -32767; - if (joystick_state[0].button[7]) - return 32768; - return 0; - default: - return 0; - } + switch (axis) { + case 0: + return joystick_state[0].axis[0]; + case 1: + return joystick_state[0].axis[1]; + case 2: + return joystick_state[0].axis[2]; + case 3: + return joystick_state[0].axis[3]; + default: + return 0; + } } -static void joystick_standard_a0_over(void *p) +static int +joystick_standard_read_axis_6button(void *p, int axis) +{ + if (!JOYSTICK_PRESENT(0)) + return AXIS_NOT_PRESENT; + + switch (axis) { + case 0: + return joystick_state[0].axis[0]; + case 1: + return joystick_state[0].axis[1]; + case 2: + return joystick_state[0].button[4] ? -32767 : 32768; + case 3: + return joystick_state[0].button[5] ? -32767 : 32768; + default: + return 0; + } +} +static int +joystick_standard_read_axis_8button(void *p, int axis) +{ + if (!JOYSTICK_PRESENT(0)) + return AXIS_NOT_PRESENT; + + switch (axis) { + case 0: + return joystick_state[0].axis[0]; + case 1: + return joystick_state[0].axis[1]; + case 2: + if (joystick_state[0].button[4]) + return -32767; + if (joystick_state[0].button[6]) + return 32768; + return 0; + case 3: + if (joystick_state[0].button[5]) + return -32767; + if (joystick_state[0].button[7]) + return 32768; + return 0; + default: + return 0; + } +} + +static void +joystick_standard_a0_over(void *p) { } const joystick_if_t joystick_2axis_2button = { - .name = "2-axis, 2-button joystick(s)", + .name = "2-axis, 2-button joystick(s)", .internal_name = "2axis_2button", - .init = joystick_standard_init, - .close = joystick_standard_close, - .read = joystick_standard_read, - .write = joystick_standard_write, - .read_axis = joystick_standard_read_axis, - .a0_over = joystick_standard_a0_over, - .axis_count = 2, - .button_count = 2, - .pov_count = 0, + .init = joystick_standard_init, + .close = joystick_standard_close, + .read = joystick_standard_read, + .write = joystick_standard_write, + .read_axis = joystick_standard_read_axis, + .a0_over = joystick_standard_a0_over, + .axis_count = 2, + .button_count = 2, + .pov_count = 0, .max_joysticks = 2, - .axis_names = { "X axis", "Y axis" }, - .button_names = { "Button 1", "Button 2" }, - .pov_names = { NULL } + .axis_names = {"X axis", "Y axis" }, + .button_names = { "Button 1", "Button 2" }, + .pov_names = { NULL} }; const joystick_if_t joystick_2axis_4button = { - .name = "2-axis, 4-button joystick", + .name = "2-axis, 4-button joystick", .internal_name = "2axis_4button", - .init = joystick_standard_init, - .close = joystick_standard_close, - .read = joystick_standard_read_4button, - .write = joystick_standard_write, - .read_axis = joystick_standard_read_axis_4button, - .a0_over = joystick_standard_a0_over, - .axis_count = 2, - .button_count = 4, - .pov_count = 0, + .init = joystick_standard_init, + .close = joystick_standard_close, + .read = joystick_standard_read_4button, + .write = joystick_standard_write, + .read_axis = joystick_standard_read_axis_4button, + .a0_over = joystick_standard_a0_over, + .axis_count = 2, + .button_count = 4, + .pov_count = 0, .max_joysticks = 1, - .axis_names = { "X axis", "Y axis" }, - .button_names = { "Button 1", "Button 2", "Button 3", "Button 4" }, - .pov_names = { NULL } + .axis_names = {"X axis", "Y axis" }, + .button_names = { "Button 1", "Button 2", "Button 3", "Button 4" }, + .pov_names = { NULL} }; const joystick_if_t joystick_3axis_2button = { - .name = "3-axis, 2-button joystick", + .name = "3-axis, 2-button joystick", .internal_name = "3axis_2button", - .init = joystick_standard_init, - .close = joystick_standard_close, - .read = joystick_standard_read, - .write = joystick_standard_write, - .read_axis = joystick_standard_read_axis_3axis, - .a0_over = joystick_standard_a0_over, - .axis_count = 3, - .button_count = 2, - .pov_count = 0, + .init = joystick_standard_init, + .close = joystick_standard_close, + .read = joystick_standard_read, + .write = joystick_standard_write, + .read_axis = joystick_standard_read_axis_3axis, + .a0_over = joystick_standard_a0_over, + .axis_count = 3, + .button_count = 2, + .pov_count = 0, .max_joysticks = 1, - .axis_names = { "X axis", "Y axis", "Z axis" }, - .button_names = { "Button 1", "Button 2" }, - .pov_names = { NULL } + .axis_names = {"X axis", "Y axis", "Z axis" }, + .button_names = { "Button 1", "Button 2" }, + .pov_names = { NULL} }; const joystick_if_t joystick_3axis_4button = { - .name = "3-axis, 4-button joystick", + .name = "3-axis, 4-button joystick", .internal_name = "3axis_4button", - .init = joystick_standard_init, - .close = joystick_standard_close, - .read = joystick_standard_read_4button, - .write = joystick_standard_write, - .read_axis = joystick_standard_read_axis_3axis, - .a0_over = joystick_standard_a0_over, - .axis_count = 3, - .button_count = 4, - .pov_count = 0, + .init = joystick_standard_init, + .close = joystick_standard_close, + .read = joystick_standard_read_4button, + .write = joystick_standard_write, + .read_axis = joystick_standard_read_axis_3axis, + .a0_over = joystick_standard_a0_over, + .axis_count = 3, + .button_count = 4, + .pov_count = 0, .max_joysticks = 1, - .axis_names = { "X axis", "Y axis", "Z axis" }, - .button_names = { "Button 1", "Button 2", "Button 3", "Button 4" }, - .pov_names = { NULL } + .axis_names = {"X axis", "Y axis", "Z axis" }, + .button_names = { "Button 1", "Button 2", "Button 3", "Button 4" }, + .pov_names = { NULL} }; const joystick_if_t joystick_4axis_4button = { - .name = "4-axis, 4-button joystick", + .name = "4-axis, 4-button joystick", .internal_name = "4axis_4button", - .init = joystick_standard_init, - .close = joystick_standard_close, - .read = joystick_standard_read_4button, - .write = joystick_standard_write, - .read_axis = joystick_standard_read_axis_4axis, - .a0_over = joystick_standard_a0_over, - .axis_count = 4, - .button_count = 4, - .pov_count = 0, + .init = joystick_standard_init, + .close = joystick_standard_close, + .read = joystick_standard_read_4button, + .write = joystick_standard_write, + .read_axis = joystick_standard_read_axis_4axis, + .a0_over = joystick_standard_a0_over, + .axis_count = 4, + .button_count = 4, + .pov_count = 0, .max_joysticks = 1, - .axis_names = { "X axis", "Y axis", "Z axis", "zX axis" }, - .button_names = { "Button 1", "Button 2", "Button 3", "Button 4" }, - .pov_names = { NULL } + .axis_names = {"X axis", "Y axis", "Z axis", "zX axis" }, + .button_names = { "Button 1", "Button 2", "Button 3", "Button 4" }, + .pov_names = { NULL } }; const joystick_if_t joystick_2axis_6button = { - .name = "2-axis, 6-button joystick", + .name = "2-axis, 6-button joystick", .internal_name = "2axis_6button", - .init = joystick_standard_init, - .close = joystick_standard_close, - .read = joystick_standard_read_4button, - .write = joystick_standard_write, - .read_axis = joystick_standard_read_axis_6button, - .a0_over = joystick_standard_a0_over, - .axis_count = 2, - .button_count = 6, - .pov_count = 0, + .init = joystick_standard_init, + .close = joystick_standard_close, + .read = joystick_standard_read_4button, + .write = joystick_standard_write, + .read_axis = joystick_standard_read_axis_6button, + .a0_over = joystick_standard_a0_over, + .axis_count = 2, + .button_count = 6, + .pov_count = 0, .max_joysticks = 1, - .axis_names = { "X axis", "Y axis" }, - .button_names = { "Button 1", "Button 2", "Button 3", "Button 4", "Button 5", "Button 6" }, - .pov_names = { NULL } + .axis_names = {"X axis", "Y axis" }, + .button_names = { "Button 1", "Button 2", "Button 3", "Button 4", "Button 5", "Button 6" }, + .pov_names = { NULL} }; const joystick_if_t joystick_2axis_8button = { - .name = "2-axis, 8-button joystick", + .name = "2-axis, 8-button joystick", .internal_name = "2axis_8button", - .init = joystick_standard_init, - .close = joystick_standard_close, - .read = joystick_standard_read_4button, - .write = joystick_standard_write, - .read_axis = joystick_standard_read_axis_8button, - .a0_over = joystick_standard_a0_over, - .axis_count = 2, - .button_count = 8, - .pov_count = 0, + .init = joystick_standard_init, + .close = joystick_standard_close, + .read = joystick_standard_read_4button, + .write = joystick_standard_write, + .read_axis = joystick_standard_read_axis_8button, + .a0_over = joystick_standard_a0_over, + .axis_count = 2, + .button_count = 8, + .pov_count = 0, .max_joysticks = 1, - .axis_names = { "X axis", "Y axis" }, - .button_names = { "Button 1", "Button 2", "Button 3", "Button 4", "Button 5", "Button 6", "Button 7", "Button 8" }, - .pov_names = { NULL } + .axis_names = {"X axis", "Y axis" }, + .button_names = { "Button 1", "Button 2", "Button 3", "Button 4", "Button 5", "Button 6", "Button 7", "Button 8" }, + .pov_names = { NULL} }; diff --git a/src/game/joystick_sw_pad.c b/src/game/joystick_sw_pad.c index 718eefbb4..841f7e68d 100644 --- a/src/game/joystick_sw_pad.c +++ b/src/game/joystick_sw_pad.c @@ -66,216 +66,207 @@ #include <86box/gameport.h> #include <86box/joystick_sw_pad.h> - typedef struct { - pc_timer_t poll_timer; - int poll_left; - int poll_clock; - uint64_t poll_data; - int poll_mode; + pc_timer_t poll_timer; + int poll_left; + int poll_clock; + uint64_t poll_data; + int poll_mode; - pc_timer_t trigger_timer; - int data_mode; + pc_timer_t trigger_timer; + int data_mode; } sw_data; -static void sw_timer_over(void *p) +static void +sw_timer_over(void *p) { - sw_data *sw = (sw_data *)p; + sw_data *sw = (sw_data *) p; - sw->poll_clock = !sw->poll_clock; + sw->poll_clock = !sw->poll_clock; - if (sw->poll_clock) - { - sw->poll_data >>= (sw->poll_mode ? 3 : 1); - sw->poll_left--; - } + if (sw->poll_clock) { + sw->poll_data >>= (sw->poll_mode ? 3 : 1); + sw->poll_left--; + } - if (sw->poll_left == 1 && !sw->poll_clock) - timer_advance_u64(&sw->poll_timer, TIMER_USEC * 160); - else if (sw->poll_left) - timer_advance_u64(&sw->poll_timer, TIMER_USEC * 5); - else - timer_disable(&sw->poll_timer); + if (sw->poll_left == 1 && !sw->poll_clock) + timer_advance_u64(&sw->poll_timer, TIMER_USEC * 160); + else if (sw->poll_left) + timer_advance_u64(&sw->poll_timer, TIMER_USEC * 5); + else + timer_disable(&sw->poll_timer); } -static void sw_trigger_timer_over(void *p) +static void +sw_trigger_timer_over(void *p) { - sw_data *sw = (sw_data *)p; + sw_data *sw = (sw_data *) p; - timer_disable(&sw->trigger_timer); + timer_disable(&sw->trigger_timer); } -static int sw_parity(uint16_t data) +static int +sw_parity(uint16_t data) { - int bits_set = 0; + int bits_set = 0; - while (data) - { - bits_set++; - data &= (data - 1); + while (data) { + bits_set++; + data &= (data - 1); + } + + return bits_set & 1; +} + +static void * +sw_init(void) +{ + sw_data *sw = (sw_data *) malloc(sizeof(sw_data)); + memset(sw, 0, sizeof(sw_data)); + + timer_add(&sw->poll_timer, sw_timer_over, sw, 0); + timer_add(&sw->trigger_timer, sw_trigger_timer_over, sw, 0); + + return sw; +} + +static void +sw_close(void *p) +{ + sw_data *sw = (sw_data *) p; + + free(sw); +} + +static uint8_t +sw_read(void *p) +{ + sw_data *sw = (sw_data *) p; + uint8_t temp = 0; + + if (!JOYSTICK_PRESENT(0)) + return 0xff; + + if (timer_is_enabled(&sw->poll_timer)) { + if (sw->poll_clock) + temp |= 0x10; + + if (sw->poll_mode) + temp |= (sw->poll_data & 7) << 5; + else { + temp |= ((sw->poll_data & 1) << 5) | 0xc0; + if (sw->poll_left > 31 && !(sw->poll_left & 1)) + temp &= ~0x80; } + } else + temp |= 0xf0; - return bits_set & 1; + return temp; } -static void *sw_init(void) +static void +sw_write(void *p) { - sw_data *sw = (sw_data *)malloc(sizeof(sw_data)); - memset(sw, 0, sizeof(sw_data)); + sw_data *sw = (sw_data *) p; + int64_t time_since_last = timer_get_remaining_us(&sw->trigger_timer); - timer_add(&sw->poll_timer, sw_timer_over, sw, 0); - timer_add(&sw->trigger_timer, sw_trigger_timer_over, sw, 0); + if (!JOYSTICK_PRESENT(0)) + return; - return sw; -} + timer_process(); -static void sw_close(void *p) -{ - sw_data *sw = (sw_data *)p; + if (!sw->poll_left) { + sw->poll_clock = 1; + timer_set_delay_u64(&sw->poll_timer, TIMER_USEC * 50); - free(sw); -} + if (time_since_last > 9900 && time_since_last < 9940) { + sw->poll_mode = 0; + sw->poll_left = 49; + sw->poll_data = 0x2400ull | (0x1830ull << 15) | (0x19b0ull << 30); + } else { + int c; -static uint8_t sw_read(void *p) -{ - sw_data *sw = (sw_data *)p; - uint8_t temp = 0; + sw->poll_mode = sw->data_mode; + sw->data_mode = !sw->data_mode; - if (!JOYSTICK_PRESENT(0)) - return 0xff; + if (sw->poll_mode) { + sw->poll_left = 1; + sw->poll_data = 7; + } else { + sw->poll_left = 1; + sw->poll_data = 1; + } - if (timer_is_enabled(&sw->poll_timer)) - { - if (sw->poll_clock) - temp |= 0x10; + for (c = 0; c < 4; c++) { + uint16_t data = 0x3fff; + int b; - if (sw->poll_mode) - temp |= (sw->poll_data & 7) << 5; - else - { - temp |= ((sw->poll_data & 1) << 5) | 0xc0; - if (sw->poll_left > 31 && !(sw->poll_left & 1)) - temp &= ~0x80; + if (!JOYSTICK_PRESENT(c)) + break; + + if (joystick_state[c].axis[1] < -16383) + data &= ~1; + if (joystick_state[c].axis[1] > 16383) + data &= ~2; + if (joystick_state[c].axis[0] > 16383) + data &= ~4; + if (joystick_state[c].axis[0] < -16383) + data &= ~8; + + for (b = 0; b < 10; b++) { + if (joystick_state[c].button[b]) + data &= ~(1 << (b + 4)); } + + if (sw_parity(data)) + data |= 0x4000; + + if (sw->poll_mode) { + sw->poll_left += 5; + sw->poll_data |= (data << (c * 15 + 3)); + } else { + sw->poll_left += 15; + sw->poll_data |= (data << (c * 15 + 1)); + } + } } - else - temp |= 0xf0; + } - return temp; + timer_disable(&sw->trigger_timer); } -static void sw_write(void *p) +static int +sw_read_axis(void *p, int axis) { - sw_data *sw = (sw_data *)p; - int64_t time_since_last = timer_get_remaining_us(&sw->trigger_timer); + if (!JOYSTICK_PRESENT(0)) + return AXIS_NOT_PRESENT; - if (!JOYSTICK_PRESENT(0)) - return; - - timer_process(); - - if (!sw->poll_left) - { - sw->poll_clock = 1; - timer_set_delay_u64(&sw->poll_timer, TIMER_USEC * 50); - - if (time_since_last > 9900 && time_since_last < 9940) - { - sw->poll_mode = 0; - sw->poll_left = 49; - sw->poll_data = 0x2400ull | (0x1830ull << 15) | (0x19b0ull << 30); - } - else - { - int c; - - sw->poll_mode = sw->data_mode; - sw->data_mode = !sw->data_mode; - - if (sw->poll_mode) - { - sw->poll_left = 1; - sw->poll_data = 7; - } - else - { - sw->poll_left = 1; - sw->poll_data = 1; - } - - for (c = 0; c < 4; c++) - { - uint16_t data = 0x3fff; - int b; - - if (!JOYSTICK_PRESENT(c)) - break; - - if (joystick_state[c].axis[1] < -16383) - data &= ~1; - if (joystick_state[c].axis[1] > 16383) - data &= ~2; - if (joystick_state[c].axis[0] > 16383) - data &= ~4; - if (joystick_state[c].axis[0] < -16383) - data &= ~8; - - for (b = 0; b < 10; b++) - { - if (joystick_state[c].button[b]) - data &= ~(1 << (b + 4)); - } - - if (sw_parity(data)) - data |= 0x4000; - - if (sw->poll_mode) - { - sw->poll_left += 5; - sw->poll_data |= (data << (c*15 + 3)); - } - else - { - sw->poll_left += 15; - sw->poll_data |= (data << (c*15 + 1)); - } - } - } - } - - timer_disable(&sw->trigger_timer); + return 0; /*No analogue support on Sidewinder game pad*/ } -static int sw_read_axis(void *p, int axis) +static void +sw_a0_over(void *p) { - if (!JOYSTICK_PRESENT(0)) - return AXIS_NOT_PRESENT; + sw_data *sw = (sw_data *) p; - return 0; /*No analogue support on Sidewinder game pad*/ -} - -static void sw_a0_over(void *p) -{ - sw_data *sw = (sw_data *)p; - - timer_set_delay_u64(&sw->trigger_timer, TIMER_USEC * 10000); + timer_set_delay_u64(&sw->trigger_timer, TIMER_USEC * 10000); } const joystick_if_t joystick_sw_pad = { - .name = "Microsoft SideWinder Pad", + .name = "Microsoft SideWinder Pad", .internal_name = "sidewinder_pad", - .init = sw_init, - .close = sw_close, - .read = sw_read, - .write = sw_write, - .read_axis = sw_read_axis, - .a0_over = sw_a0_over, - .axis_count = 2, - .button_count = 10, - .pov_count = 0, + .init = sw_init, + .close = sw_close, + .read = sw_read, + .write = sw_write, + .read_axis = sw_read_axis, + .a0_over = sw_a0_over, + .axis_count = 2, + .button_count = 10, + .pov_count = 0, .max_joysticks = 4, - .axis_names = { "X axis", "Y axis" }, - .button_names = { "A", "B", "C", "X", "Y", "Z", "L", "R", "Start", "M" }, - .pov_names = { NULL } + .axis_names = {"X axis", "Y axis" }, + .button_names = { "A", "B", "C", "X", "Y", "Z", "L", "R", "Start", "M" }, + .pov_names = { NULL} }; diff --git a/src/game/joystick_tm_fcs.c b/src/game/joystick_tm_fcs.c index ee83c5ad2..23683b26b 100644 --- a/src/game/joystick_tm_fcs.c +++ b/src/game/joystick_tm_fcs.c @@ -45,88 +45,90 @@ #include <86box/gameport.h> #include <86box/joystick_standard.h> - -static void *tm_fcs_init(void) +static void * +tm_fcs_init(void) { - return NULL; + return NULL; } -static void tm_fcs_close(void *p) +static void +tm_fcs_close(void *p) { } -static uint8_t tm_fcs_read(void *p) +static uint8_t +tm_fcs_read(void *p) { - uint8_t ret = 0xf0; + uint8_t ret = 0xf0; - if (JOYSTICK_PRESENT(0)) - { - if (joystick_state[0].button[0]) - ret &= ~0x10; - if (joystick_state[0].button[1]) - ret &= ~0x20; - if (joystick_state[0].button[2]) - ret &= ~0x40; - if (joystick_state[0].button[3]) - ret &= ~0x80; - } + if (JOYSTICK_PRESENT(0)) { + if (joystick_state[0].button[0]) + ret &= ~0x10; + if (joystick_state[0].button[1]) + ret &= ~0x20; + if (joystick_state[0].button[2]) + ret &= ~0x40; + if (joystick_state[0].button[3]) + ret &= ~0x80; + } - return ret; + return ret; } -static void tm_fcs_write(void *p) +static void +tm_fcs_write(void *p) { } -static int tm_fcs_read_axis(void *p, int axis) +static int +tm_fcs_read_axis(void *p, int axis) { - if (!JOYSTICK_PRESENT(0)) - return AXIS_NOT_PRESENT; + if (!JOYSTICK_PRESENT(0)) + return AXIS_NOT_PRESENT; - switch (axis) - { - case 0: - return joystick_state[0].axis[0]; - case 1: - return joystick_state[0].axis[1]; - case 2: + switch (axis) { + case 0: + return joystick_state[0].axis[0]; + case 1: + return joystick_state[0].axis[1]; + case 2: + return 0; + case 3: + if (joystick_state[0].pov[0] == -1) + return 32767; + if (joystick_state[0].pov[0] > 315 || joystick_state[0].pov[0] < 45) + return -32768; + if (joystick_state[0].pov[0] >= 45 && joystick_state[0].pov[0] < 135) + return -16384; + if (joystick_state[0].pov[0] >= 135 && joystick_state[0].pov[0] < 225) return 0; - case 3: - if (joystick_state[0].pov[0] == -1) - return 32767; - if (joystick_state[0].pov[0] > 315 || joystick_state[0].pov[0] < 45) - return -32768; - if (joystick_state[0].pov[0] >= 45 && joystick_state[0].pov[0] < 135) - return -16384; - if (joystick_state[0].pov[0] >= 135 && joystick_state[0].pov[0] < 225) - return 0; - if (joystick_state[0].pov[0] >= 225 && joystick_state[0].pov[0] < 315) - return 16384; - return 0; - default: - return 0; - } + if (joystick_state[0].pov[0] >= 225 && joystick_state[0].pov[0] < 315) + return 16384; + return 0; + default: + return 0; + } } -static void tm_fcs_a0_over(void *p) +static void +tm_fcs_a0_over(void *p) { } -const joystick_if_t joystick_tm_fcs = -{ - .name = "Thrustmaster Flight Control System", +const joystick_if_t joystick_tm_fcs = { + .name = "Thrustmaster Flight Control System", .internal_name = "thrustmaster_fcs", - .init = tm_fcs_init, - .close = tm_fcs_close, - .read = tm_fcs_read, - .write = tm_fcs_write, - .read_axis = tm_fcs_read_axis, - .a0_over = tm_fcs_a0_over, - .axis_count = 2, - .button_count = 4, - .pov_count = 1, + .init = tm_fcs_init, + .close = tm_fcs_close, + .read = tm_fcs_read, + .write = tm_fcs_write, + .read_axis = tm_fcs_read_axis, + .a0_over = tm_fcs_a0_over, + .axis_count = 2, + .button_count = 4, + .pov_count = 1, .max_joysticks = 1, - .axis_names = { "X axis", "Y axis" }, - .button_names = { "Button 1", "Button 2", "Button 3", "Button 4" }, - .pov_names = { "POV" } + .axis_names = {"X axis", "Y axis" }, + .button_names = { "Button 1", "Button 2", "Button 3", "Button 4" }, + .pov_names = { "POV"} }; From ae4f9aedaa1883ac68009a1b05177389b41e7d82 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:15:38 -0400 Subject: [PATCH 361/386] clang-format in src/include/86box/ --- src/include/86box/86box.h | 28 +- src/include/86box/acpi.h | 164 ++-- src/include/86box/agpgart.h | 4 +- src/include/86box/apm.h | 18 +- src/include/86box/bugger.h | 12 +- src/include/86box/cartridge.h | 17 +- src/include/86box/cassette.h | 116 ++- src/include/86box/cdrom.h | 184 +++-- src/include/86box/cdrom_image.h | 6 +- src/include/86box/cdrom_image_backend.h | 102 ++- src/include/86box/chipset.h | 233 +++--- src/include/86box/clock.h | 8 +- src/include/86box/ddma.h | 18 +- src/include/86box/device.h | 46 +- src/include/86box/discord.h | 17 +- src/include/86box/dma.h | 105 ++- src/include/86box/fdc.h | 298 ++++--- src/include/86box/fdc_ext.h | 14 +- src/include/86box/fdd.h | 227 +++--- src/include/86box/fdd_86f.h | 142 ++-- src/include/86box/fdd_common.h | 27 +- src/include/86box/fdd_fdi.h | 12 +- src/include/86box/fdd_imd.h | 6 +- src/include/86box/fdd_img.h | 12 +- src/include/86box/fdd_json.h | 12 +- src/include/86box/fdd_mfm.h | 12 +- src/include/86box/fdd_td0.h | 6 +- src/include/86box/fifo8.h | 3 +- src/include/86box/filters.h | 285 +++---- src/include/86box/flash.h | 2 +- src/include/86box/gameport.h | 182 +++-- src/include/86box/hdc.h | 120 ++- src/include/86box/hdc_ide.h | 166 ++-- src/include/86box/hdc_ide_sff8038i.h | 51 +- src/include/86box/hdd.h | 153 ++-- src/include/86box/hwm.h | 67 +- src/include/86box/i2c.h | 77 +- src/include/86box/i82335.h | 2 +- src/include/86box/ibm_5161.h | 2 +- src/include/86box/io.h | 172 ++--- src/include/86box/isamem.h | 20 +- src/include/86box/isapnp.h | 59 +- src/include/86box/isartc.h | 15 +- .../86box/joystick_ch_flightstick_pro.h | 2 +- src/include/86box/joystick_standard.h | 2 +- src/include/86box/joystick_sw_pad.h | 2 +- src/include/86box/joystick_tm_fcs.h | 2 +- src/include/86box/keyboard.h | 293 ++++--- src/include/86box/language.h | 448 ++++++----- src/include/86box/log.h | 32 +- src/include/86box/machine.h | 181 ++--- src/include/86box/machine_status.h | 4 +- src/include/86box/mca.h | 14 +- src/include/86box/mem.h | 591 +++++++------- src/include/86box/mo.h | 174 ++--- src/include/86box/net_3c503.h | 6 +- src/include/86box/net_dp8390.h | 250 +++--- src/include/86box/net_ne2000.h | 29 +- src/include/86box/net_pcnet.h | 27 +- src/include/86box/net_plip.h | 8 +- src/include/86box/net_wd8003.h | 26 +- src/include/86box/network.h | 83 +- src/include/86box/nmi.h | 3 +- src/include/86box/nvr.h | 91 ++- src/include/86box/nvr_ps2.h | 10 +- src/include/86box/path.h | 14 +- src/include/86box/pci.h | 116 ++- src/include/86box/pci_dummy.h | 2 +- src/include/86box/pic.h | 69 +- src/include/86box/pit.h | 111 ++- src/include/86box/pit_fast.h | 2 +- src/include/86box/plat.h | 188 +++-- src/include/86box/plat_dir.h | 61 +- src/include/86box/plat_dynld.h | 14 +- src/include/86box/png_struct.h | 14 +- src/include/86box/port_6x.h | 18 +- src/include/86box/port_92.h | 30 +- src/include/86box/postcard.h | 6 +- src/include/86box/ppi.h | 18 +- src/include/86box/printer.h | 20 +- src/include/86box/prt_devs.h | 8 +- src/include/86box/random.h | 8 +- src/include/86box/resource.h | 724 +++++++++--------- src/include/86box/rom.h | 112 ++- src/include/86box/scsi.h | 24 +- src/include/86box/scsi_aha154x.h | 6 +- src/include/86box/scsi_buslogic.h | 6 +- src/include/86box/scsi_cdrom.h | 40 +- src/include/86box/scsi_device.h | 553 +++++++------ src/include/86box/scsi_disk.h | 30 +- src/include/86box/scsi_ncr5380.h | 4 +- src/include/86box/scsi_ncr53c8xx.h | 5 +- src/include/86box/scsi_pcscsi.h | 4 +- src/include/86box/scsi_spock.h | 4 +- src/include/86box/scsi_x54x.h | 630 +++++++-------- src/include/86box/serial.h | 2 +- src/include/86box/sio.h | 135 ++-- src/include/86box/smbus.h | 55 +- src/include/86box/smram.h | 44 +- src/include/86box/spd.h | 134 ++-- src/include/86box/thread.h | 54 +- src/include/86box/timer.h | 133 ++-- src/include/86box/ui.h | 91 ++- src/include/86box/unix_sdl.h | 20 +- src/include/86box/usb.h | 23 +- src/include/86box/vnc.h | 17 +- src/include/86box/win.h | 2 +- src/include/86box/zip.h | 88 +-- 108 files changed, 4459 insertions(+), 4680 deletions(-) diff --git a/src/include/86box/86box.h b/src/include/86box/86box.h index 4f9ccabed..961930081 100644 --- a/src/include/86box/86box.h +++ b/src/include/86box/86box.h @@ -32,7 +32,7 @@ #define SCREENSHOT_PATH "screenshots" /* Recently used images */ -#define MAX_PREV_IMAGES 4 +#define MAX_PREV_IMAGES 4 #define MAX_IMAGE_PATH_LEN 256 /* Default language 0xFFFF = from system, 0x409 = en-US */ @@ -81,7 +81,7 @@ extern char rom_path[1024]; /* (O) full path to ROMs */ extern char log_path[1024]; /* (O) full path of logfile */ extern char vm_name[1024]; /* (O) display name of the VM */ #ifdef USE_INSTRUMENT -extern uint8_t instru_enabled; +extern uint8_t instru_enabled; extern uint64_t instru_run_ms; #endif @@ -109,7 +109,7 @@ extern int vid_cga_contrast, /* (C) video */ video_framerate, /* (C) video */ gfxcard; /* (C) graphics/video card */ extern char video_shader[512]; /* (C) video */ -extern int bugger_enabled, /* (C) enable ISAbugger */ +extern int bugger_enabled, /* (C) enable ISAbugger */ postcard_enabled, /* (C) enable POST card */ isamem_type[], /* (C) enable ISA mem cards */ isartc_type; /* (C) enable ISA RTC card */ @@ -125,9 +125,9 @@ extern uint32_t isa_mem_size; /* (C) memory size (ISA Memory Cards) */ extern int cpu, /* (C) cpu type */ cpu_use_dynarec, /* (C) cpu uses/needs Dyna */ fpu_type; /* (C) fpu type */ -extern int time_sync; /* (C) enable time sync */ -extern int hdd_format_type; /* (C) hard disk file format */ -extern int confirm_reset, /* (C) enable reset confirmation */ +extern int time_sync; /* (C) enable time sync */ +extern int hdd_format_type; /* (C) hard disk file format */ +extern int confirm_reset, /* (C) enable reset confirmation */ confirm_exit, /* (C) enable exit confirmation */ confirm_save; /* (C) enable save confirmation */ extern int enable_discord; /* (C) enable Discord integration */ @@ -135,15 +135,15 @@ extern int enable_discord; /* (C) enable Discord integration */ extern int is_pentium; /* TODO: Move back to cpu/cpu.h when it's figured out, how to remove that hack from the ET4000/W32p. */ extern int fixed_size_x, fixed_size_y; -extern double mouse_sensitivity; /* (C) Mouse sensitivity scale */ -extern double mouse_x_error, mouse_y_error; /* Mouse error accumulators */ -extern int pit_mode; /* (C) force setting PIT mode */ -extern int fm_driver; /* (C) select FM sound driver */ +extern double mouse_sensitivity; /* (C) Mouse sensitivity scale */ +extern double mouse_x_error, mouse_y_error; /* Mouse error accumulators */ +extern int pit_mode; /* (C) force setting PIT mode */ +extern int fm_driver; /* (C) select FM sound driver */ -extern char exe_path[2048]; /* path (dir) of executable */ -extern char usr_path[1024]; /* path (dir) of user data */ -extern char cfg_path[1024]; /* full path of config file */ -extern int open_dir_usr_path; /* default file open dialog directory of usr_path */ +extern char exe_path[2048]; /* path (dir) of executable */ +extern char usr_path[1024]; /* path (dir) of user data */ +extern char cfg_path[1024]; /* full path of config file */ +extern int open_dir_usr_path; /* default file open dialog directory of usr_path */ #ifndef USE_NEW_DYNAREC extern FILE *stdlog; /* file to log output to */ #endif diff --git a/src/include/86box/acpi.h b/src/include/86box/acpi.h index 94b2cd0fe..6864fa42d 100644 --- a/src/include/86box/acpi.h +++ b/src/include/86box/acpi.h @@ -15,39 +15,38 @@ * Copyright 2020 Miran Grca. */ #ifndef ACPI_H -# define ACPI_H - +#define ACPI_H #ifdef __cplusplus extern "C" { #endif -#define ACPI_TIMER_FREQ 3579545 -#define PM_FREQ ACPI_TIMER_FREQ +#define ACPI_TIMER_FREQ 3579545 +#define PM_FREQ ACPI_TIMER_FREQ -#define RSM_STS (1 << 15) -#define PWRBTN_STS (1 << 8) -#define GBL_STS (1 << 5) -#define BM_STS (1 << 4) -#define TMROF_STS (1 << 0) +#define RSM_STS (1 << 15) +#define PWRBTN_STS (1 << 8) +#define GBL_STS (1 << 5) +#define BM_STS (1 << 4) +#define TMROF_STS (1 << 0) -#define RTC_EN (1 << 10) -#define PWRBTN_EN (1 << 8) -#define GBL_EN (1 << 5) -#define TMROF_EN (1 << 0) +#define RTC_EN (1 << 10) +#define PWRBTN_EN (1 << 8) +#define GBL_EN (1 << 5) +#define TMROF_EN (1 << 0) -#define SCI_EN (1 << 0) -#define SUS_EN (1 << 13) +#define SCI_EN (1 << 0) +#define SUS_EN (1 << 13) -#define SUS_POWER_OFF (1 << 0) -#define SUS_SUSPEND (1 << 1) -#define SUS_NVR (1 << 2) -#define SUS_RESET_CPU (1 << 3) -#define SUS_RESET_CACHE (1 << 4) -#define SUS_RESET_PCI (1 << 5) +#define SUS_POWER_OFF (1 << 0) +#define SUS_SUSPEND (1 << 1) +#define SUS_NVR (1 << 2) +#define SUS_RESET_CPU (1 << 3) +#define SUS_RESET_CACHE (1 << 4) +#define SUS_RESET_PCI (1 << 5) -#define ACPI_ENABLE 0xf1 -#define ACPI_DISABLE 0xf0 +#define ACPI_ENABLE 0xf1 +#define ACPI_DISABLE 0xf0 #define VEN_ALI 0x010b9 #define VEN_INTEL 0x08086 @@ -56,82 +55,77 @@ extern "C" { #define VEN_VIA 0x01106 #define VEN_VIA_596B 0x11106 - typedef struct { - uint8_t acpitst, auxen, auxsts, plvl2, plvl3, - smicmd, gpio_dir, - gpio_val, muxcntrl, ali_soft_smi, - timer32, smireg, - gpireg[3], gporeg[4], - extiotrapsts, extiotrapen; - uint16_t pmsts, pmen, - pmcntrl, gpsts, gpsts1, - gpen, gpen1, gpscien, - gpcntrl, gplvl, gpmux, - gpsel, gpsmien, pscntrl, - gpscists; - int smi_lock, smi_active; - uint32_t pcntrl, p2cntrl, glbsts, - devsts, glben, - glbctl, devctl, - padsts, paden, - gptren, gptimer, - gpo_val, gpi_val, - extsmi_val, pad0; + uint8_t acpitst, auxen, auxsts, plvl2, plvl3, + smicmd, gpio_dir, + gpio_val, muxcntrl, ali_soft_smi, + timer32, smireg, + gpireg[3], gporeg[4], + extiotrapsts, extiotrapen; + uint16_t pmsts, pmen, + pmcntrl, gpsts, gpsts1, + gpen, gpen1, gpscien, + gpcntrl, gplvl, gpmux, + gpsel, gpsmien, pscntrl, + gpscists; + int smi_lock, smi_active; + uint32_t pcntrl, p2cntrl, glbsts, + devsts, glben, + glbctl, devctl, + padsts, paden, + gptren, gptimer, + gpo_val, gpi_val, + extsmi_val, pad0; } acpi_regs_t; - typedef struct { - acpi_regs_t regs; - uint8_t gpireg2_default, pad[3], - gporeg_default[4], - suspend_types[8]; - uint16_t io_base, aux_io_base; - int vendor, - slot, irq_mode, - irq_pin, irq_line, - mirq_is_level; - pc_timer_t timer, resume_timer; - nvr_t *nvr; - apm_t *apm; - void *i2c, - (*trap_update)(void *priv), *trap_priv; + acpi_regs_t regs; + uint8_t gpireg2_default, pad[3], + gporeg_default[4], + suspend_types[8]; + uint16_t io_base, aux_io_base; + int vendor, + slot, irq_mode, + irq_pin, irq_line, + mirq_is_level; + pc_timer_t timer, resume_timer; + nvr_t *nvr; + apm_t *apm; + void *i2c, + (*trap_update)(void *priv), *trap_priv; } acpi_t; - /* Global variables. */ -extern int acpi_rtc_status; - -extern const device_t acpi_ali_device; -extern const device_t acpi_intel_device; -extern const device_t acpi_smc_device; -extern const device_t acpi_via_device; -extern const device_t acpi_via_596b_device; +extern int acpi_rtc_status; +extern const device_t acpi_ali_device; +extern const device_t acpi_intel_device; +extern const device_t acpi_smc_device; +extern const device_t acpi_via_device; +extern const device_t acpi_via_596b_device; /* Functions */ -extern void acpi_update_irq(acpi_t *dev); -extern void acpi_raise_smi(void *priv, int do_smi); -extern void acpi_update_io_mapping(acpi_t *dev, uint32_t base, int chipset_en); -extern void acpi_update_aux_io_mapping(acpi_t *dev, uint32_t base, int chipset_en); -extern void acpi_init_gporeg(acpi_t *dev, uint8_t val0, uint8_t val1, uint8_t val2, uint8_t val3); -extern void acpi_set_timer32(acpi_t *dev, uint8_t timer32); -extern void acpi_set_slot(acpi_t *dev, int slot); -extern void acpi_set_irq_mode(acpi_t *dev, int irq_mode); -extern void acpi_set_irq_pin(acpi_t *dev, int irq_pin); -extern void acpi_set_irq_line(acpi_t *dev, int irq_line); -extern void acpi_set_mirq_is_level(acpi_t *dev, int mirq_is_level); -extern void acpi_set_gpireg2_default(acpi_t *dev, uint8_t gpireg2_default); -extern void acpi_set_nvr(acpi_t *dev, nvr_t *nvr); -extern void acpi_set_trap_update(acpi_t *dev, void (*update)(void *priv), void *priv); -extern uint8_t acpi_ali_soft_smi_status_read(acpi_t *dev); -extern void acpi_ali_soft_smi_status_write(acpi_t *dev, uint8_t soft_smi); +extern void acpi_update_irq(acpi_t *dev); +extern void acpi_raise_smi(void *priv, int do_smi); +extern void acpi_update_io_mapping(acpi_t *dev, uint32_t base, int chipset_en); +extern void acpi_update_aux_io_mapping(acpi_t *dev, uint32_t base, int chipset_en); +extern void acpi_init_gporeg(acpi_t *dev, uint8_t val0, uint8_t val1, uint8_t val2, uint8_t val3); +extern void acpi_set_timer32(acpi_t *dev, uint8_t timer32); +extern void acpi_set_slot(acpi_t *dev, int slot); +extern void acpi_set_irq_mode(acpi_t *dev, int irq_mode); +extern void acpi_set_irq_pin(acpi_t *dev, int irq_pin); +extern void acpi_set_irq_line(acpi_t *dev, int irq_line); +extern void acpi_set_mirq_is_level(acpi_t *dev, int mirq_is_level); +extern void acpi_set_gpireg2_default(acpi_t *dev, uint8_t gpireg2_default); +extern void acpi_set_nvr(acpi_t *dev, nvr_t *nvr); +extern void acpi_set_trap_update(acpi_t *dev, void (*update)(void *priv), void *priv); +extern uint8_t acpi_ali_soft_smi_status_read(acpi_t *dev); +extern void acpi_ali_soft_smi_status_write(acpi_t *dev, uint8_t soft_smi); #ifdef __cplusplus } #endif - -#endif /*ACPI_H*/ +#endif /*ACPI_H*/ diff --git a/src/include/86box/agpgart.h b/src/include/86box/agpgart.h index c6823fc0f..d73e95e86 100644 --- a/src/include/86box/agpgart.h +++ b/src/include/86box/agpgart.h @@ -19,8 +19,8 @@ #define EMU_AGPGART_H typedef struct agpgart_s { - int aperture_enable; - uint32_t aperture_base, aperture_size, aperture_mask, gart_base; + int aperture_enable; + uint32_t aperture_base, aperture_size, aperture_mask, gart_base; mem_mapping_t aperture_mapping; } agpgart_t; diff --git a/src/include/86box/apm.h b/src/include/86box/apm.h index 1fd985951..2676fa198 100644 --- a/src/include/86box/apm.h +++ b/src/include/86box/apm.h @@ -15,8 +15,7 @@ * Copyright 2019 Miran Grca. */ #ifndef APM_H -# define APM_H - +#define APM_H #ifdef __cplusplus extern "C" { @@ -25,23 +24,20 @@ extern "C" { typedef struct { uint8_t cmd, - stat, do_smi; + stat, do_smi; } apm_t; - /* Global variables. */ -extern const device_t apm_device; - -extern const device_t apm_pci_device; -extern const device_t apm_pci_acpi_device; +extern const device_t apm_device; +extern const device_t apm_pci_device; +extern const device_t apm_pci_acpi_device; /* Functions. */ -extern void apm_set_do_smi(apm_t *dev, uint8_t do_smi); +extern void apm_set_do_smi(apm_t *dev, uint8_t do_smi); #ifdef __cplusplus } #endif - -#endif /*APM_H*/ +#endif /*APM_H*/ diff --git a/src/include/86box/bugger.h b/src/include/86box/bugger.h index 985f13d2f..b0a6a5469 100644 --- a/src/include/86box/bugger.h +++ b/src/include/86box/bugger.h @@ -22,13 +22,11 @@ * Copyright 1989-2018 Fred N. van Kempen. */ #ifndef BUGGER_H -# define BUGGER_H - +#define BUGGER_H /* I/O port range used. */ -#define BUGGER_ADDR 0x007a -#define BUGGER_ADDRLEN 4 - +#define BUGGER_ADDR 0x007a +#define BUGGER_ADDRLEN 4 #ifdef __cplusplus extern "C" { @@ -37,12 +35,10 @@ extern "C" { /* Global variables. */ extern const device_t bugger_device; - /* Functions. */ #ifdef __cplusplus } #endif - -#endif /*BUGGER_H*/ +#endif /*BUGGER_H*/ diff --git a/src/include/86box/cartridge.h b/src/include/86box/cartridge.h index 390604e79..c07fe1cfd 100644 --- a/src/include/86box/cartridge.h +++ b/src/include/86box/cartridge.h @@ -15,26 +15,21 @@ * Copyright 2021 Miran Grca. */ #ifndef EMU_CARTRIDGE_H -# define EMU_CARTRIDGE_H - +#define EMU_CARTRIDGE_H #ifdef __cplusplus extern "C" { #endif +extern char cart_fns[2][512]; -extern char cart_fns[2][512]; - - -extern void cart_load(int drive, char *fn); -extern void cart_close(int drive); - -extern void cart_reset(void); +extern void cart_load(int drive, char *fn); +extern void cart_close(int drive); +extern void cart_reset(void); #ifdef __cplusplus } #endif - -#endif /*EMU_CARTRIDGE_H*/ +#endif /*EMU_CARTRIDGE_H*/ diff --git a/src/include/86box/cassette.h b/src/include/86box/cassette.h index 524c5d055..6e6eb646f 100644 --- a/src/include/86box/cassette.h +++ b/src/include/86box/cassette.h @@ -19,155 +19,149 @@ * Public License for more details. * *****************************************************************************/ - #ifndef PCE_IBMPC_CASSETTE_H -# define PCE_IBMPC_CASSETTE_H 1 - +#define PCE_IBMPC_CASSETTE_H 1 #include - typedef struct { - char save; - char pcm; + char save; + char pcm; - unsigned char motor; + unsigned char motor; - unsigned long position; + unsigned long position; - unsigned long position_save; - unsigned long position_load; + unsigned long position_save; + unsigned long position_load; - unsigned char data_out; - unsigned char data_inp; + unsigned char data_out; + unsigned char data_inp; - int pcm_out_vol; - int pcm_out_val; + int pcm_out_vol; + int pcm_out_val; - unsigned cas_out_cnt; - unsigned char cas_out_buf; + unsigned cas_out_cnt; + unsigned char cas_out_buf; - unsigned cas_inp_cnt; - unsigned char cas_inp_buf; - unsigned char cas_inp_bit; + unsigned cas_inp_cnt; + unsigned char cas_inp_buf; + unsigned char cas_inp_bit; - int pcm_inp_fir[3]; + int pcm_inp_fir[3]; - unsigned long clk; + unsigned long clk; - unsigned long clk_pcm; + unsigned long clk_pcm; - unsigned long clk_out; - unsigned long clk_inp; + unsigned long clk_out; + unsigned long clk_inp; - unsigned long srate; + unsigned long srate; - char close; - char *fname; - FILE *fp; - pc_timer_t timer; + char close; + char *fname; + FILE *fp; + pc_timer_t timer; } pc_cassette_t; +void pc_cas_init(pc_cassette_t *cas); +void pc_cas_free(pc_cassette_t *cas); -void pc_cas_init (pc_cassette_t *cas); -void pc_cas_free (pc_cassette_t *cas); - -pc_cassette_t *pc_cas_new (void); -void pc_cas_del (pc_cassette_t *cas); +pc_cassette_t *pc_cas_new(void); +void pc_cas_del(pc_cassette_t *cas); /*!*************************************************************************** * @short Set the cassette file * @return True on error, false otherwise *****************************************************************************/ -int pc_cas_set_fname (pc_cassette_t *cas, const char *fname); +int pc_cas_set_fname(pc_cassette_t *cas, const char *fname); /*!*************************************************************************** * @short Get the cassette mode * @return True if in save mode, false if in load mode *****************************************************************************/ -int pc_cas_get_mode (const pc_cassette_t *cas); +int pc_cas_get_mode(const pc_cassette_t *cas); /*!*************************************************************************** * @short Set the cassette mode * @param save If true set save mode, otherwise set load mode *****************************************************************************/ -void pc_cas_set_mode (pc_cassette_t *cas, int save); +void pc_cas_set_mode(pc_cassette_t *cas, int save); /*!*************************************************************************** * @short Get the cassette pcm mode * @return True if in pcm mode, false if in binary mode *****************************************************************************/ -int pc_cas_get_pcm (const pc_cassette_t *cas); +int pc_cas_get_pcm(const pc_cassette_t *cas); /*!*************************************************************************** * @short Set the cassette pcm mode * @param pcm If true set pcm mode, otherwise set binary mode *****************************************************************************/ -void pc_cas_set_pcm (pc_cassette_t *cas, int pcm); +void pc_cas_set_pcm(pc_cassette_t *cas, int pcm); /*!*************************************************************************** * @short Get the pcm sample rate * @return The sample rate in Hz *****************************************************************************/ -unsigned long pc_cas_get_srate (const pc_cassette_t *cas); +unsigned long pc_cas_get_srate(const pc_cassette_t *cas); /*!*************************************************************************** * @short Set the pcm sample rate * @param pcm The sample rate in Hz *****************************************************************************/ -void pc_cas_set_srate (pc_cassette_t *cas, unsigned long srate); +void pc_cas_set_srate(pc_cassette_t *cas, unsigned long srate); /*!*************************************************************************** * @short Rewind the cassette *****************************************************************************/ -void pc_cas_rewind (pc_cassette_t *cas); +void pc_cas_rewind(pc_cassette_t *cas); /*!*************************************************************************** * @short Fast forward to the end of the cassette *****************************************************************************/ -void pc_cas_append (pc_cassette_t *cas); +void pc_cas_append(pc_cassette_t *cas); /*!*************************************************************************** * @short Get the current load/save position *****************************************************************************/ -unsigned long pc_cas_get_position (const pc_cassette_t *cas); +unsigned long pc_cas_get_position(const pc_cassette_t *cas); /*!*************************************************************************** * @short Set the current load/save position *****************************************************************************/ -int pc_cas_set_position (pc_cassette_t *cas, unsigned long pos); +int pc_cas_set_position(pc_cassette_t *cas, unsigned long pos); /*!*************************************************************************** * @short Set the cassette motor status *****************************************************************************/ -void pc_cas_set_motor (pc_cassette_t *cas, unsigned char val); +void pc_cas_set_motor(pc_cassette_t *cas, unsigned char val); /*!*************************************************************************** * @short Get the current input from the cassette *****************************************************************************/ -unsigned char pc_cas_get_inp (const pc_cassette_t *cas); +unsigned char pc_cas_get_inp(const pc_cassette_t *cas); /*!*************************************************************************** * @short Set the current output to the cassette *****************************************************************************/ -void pc_cas_set_out (pc_cassette_t *cas, unsigned char val); +void pc_cas_set_out(pc_cassette_t *cas, unsigned char val); -void pc_cas_print_state (const pc_cassette_t *cas); +void pc_cas_print_state(const pc_cassette_t *cas); -void pc_cas_clock (pc_cassette_t *cas, unsigned long cnt); -void pc_cas_advance (pc_cassette_t *cas); +void pc_cas_clock(pc_cassette_t *cas, unsigned long cnt); +void pc_cas_advance(pc_cassette_t *cas); +extern pc_cassette_t *cassette; -extern pc_cassette_t * cassette; - -extern char cassette_fname[512]; -extern char cassette_mode[512]; -extern unsigned long cassette_pos, cassette_srate; -extern int cassette_enable; -extern int cassette_append, cassette_pcm; -extern int cassette_ui_writeprot; - -extern const device_t cassette_device; +extern char cassette_fname[512]; +extern char cassette_mode[512]; +extern unsigned long cassette_pos, cassette_srate; +extern int cassette_enable; +extern int cassette_append, cassette_pcm; +extern int cassette_ui_writeprot; +extern const device_t cassette_device; #endif /*PCE_IBMPC_CASSETTE_H*/ diff --git a/src/include/86box/cdrom.h b/src/include/86box/cdrom.h index 4daad5821..cd4eb5442 100644 --- a/src/include/86box/cdrom.h +++ b/src/include/86box/cdrom.h @@ -13,172 +13,166 @@ * Copyright 2016-2019 Miran Grca. */ #ifndef EMU_CDROM_H -# define EMU_CDROM_H +#define EMU_CDROM_H +#define CDROM_NUM 4 -#define CDROM_NUM 4 - -#define CD_STATUS_EMPTY 0 -#define CD_STATUS_DATA_ONLY 1 -#define CD_STATUS_PAUSED 2 -#define CD_STATUS_PLAYING 3 -#define CD_STATUS_STOPPED 4 -#define CD_STATUS_PLAYING_COMPLETED 5 +#define CD_STATUS_EMPTY 0 +#define CD_STATUS_DATA_ONLY 1 +#define CD_STATUS_PAUSED 2 +#define CD_STATUS_PLAYING 3 +#define CD_STATUS_STOPPED 4 +#define CD_STATUS_PLAYING_COMPLETED 5 /* Medium changed flag. */ -#define CD_STATUS_MEDIUM_CHANGED 0x80 +#define CD_STATUS_MEDIUM_CHANGED 0x80 -#define CD_TRACK_AUDIO 0x08 -#define CD_TRACK_MODE2 0x04 +#define CD_TRACK_AUDIO 0x08 +#define CD_TRACK_MODE2 0x04 -#define CD_READ_DATA 0 -#define CD_READ_AUDIO 1 -#define CD_READ_RAW 2 +#define CD_READ_DATA 0 +#define CD_READ_AUDIO 1 +#define CD_READ_RAW 2 -#define CD_TOC_NORMAL 0 -#define CD_TOC_SESSION 1 -#define CD_TOC_RAW 2 +#define CD_TOC_NORMAL 0 +#define CD_TOC_SESSION 1 +#define CD_TOC_RAW 2 -#define CD_IMAGE_HISTORY 4 +#define CD_IMAGE_HISTORY 4 -#define BUF_SIZE 32768 +#define BUF_SIZE 32768 -#define CDROM_IMAGE 200 +#define CDROM_IMAGE 200 /* This is so that if/when this is changed to something else, changing this one define will be enough. */ #define CDROM_EMPTY !dev->host_drive - #ifdef __cplusplus extern "C" { #endif enum { CDROM_BUS_DISABLED = 0, - CDROM_BUS_ATAPI = 5, + CDROM_BUS_ATAPI = 5, CDROM_BUS_SCSI, CDROM_BUS_USB }; - /* To shut up the GCC compilers. */ struct cdrom; - typedef struct { - uint8_t attr, track, - index, - abs_m, abs_s, abs_f, - rel_m, rel_s, rel_f; + uint8_t attr, track, + index, + abs_m, abs_s, abs_f, + rel_m, rel_s, rel_f; } subchannel_t; typedef struct { - int number; - uint8_t attr, m, s, f; + int number; + uint8_t attr, m, s, f; } track_info_t; /* Define the various CD-ROM drive operations (ops). */ typedef struct { - void (*get_tracks)(struct cdrom *dev, int *first, int *last); - void (*get_track_info)(struct cdrom *dev, uint32_t track, int end, track_info_t *ti); - void (*get_subchannel)(struct cdrom *dev, uint32_t lba, subchannel_t *subc); - int (*is_track_pre)(struct cdrom *dev, uint32_t lba); - int (*sector_size)(struct cdrom *dev, uint32_t lba); - int (*read_sector)(struct cdrom *dev, int type, uint8_t *b, uint32_t lba); - int (*track_type)(struct cdrom *dev, uint32_t lba); - void (*exit)(struct cdrom *dev); + void (*get_tracks)(struct cdrom *dev, int *first, int *last); + void (*get_track_info)(struct cdrom *dev, uint32_t track, int end, track_info_t *ti); + void (*get_subchannel)(struct cdrom *dev, uint32_t lba, subchannel_t *subc); + int (*is_track_pre)(struct cdrom *dev, uint32_t lba); + int (*sector_size)(struct cdrom *dev, uint32_t lba); + int (*read_sector)(struct cdrom *dev, int type, uint8_t *b, uint32_t lba); + int (*track_type)(struct cdrom *dev, uint32_t lba); + void (*exit)(struct cdrom *dev); } cdrom_ops_t; typedef struct cdrom { uint8_t id; union { - uint8_t res, res0, /* Reserved for other ID's. */ - res1, - ide_channel, scsi_device_id; + uint8_t res, res0, /* Reserved for other ID's. */ + res1, + ide_channel, scsi_device_id; }; - uint8_t bus_type, /* 0 = ATAPI, 1 = SCSI */ - bus_mode, /* Bit 0 = PIO suported; - Bit 1 = DMA supportd. */ - cd_status, /* Struct variable reserved for - media status. */ - speed, cur_speed; + uint8_t bus_type, /* 0 = ATAPI, 1 = SCSI */ + bus_mode, /* Bit 0 = PIO suported; + Bit 1 = DMA supportd. */ + cd_status, /* Struct variable reserved for + media status. */ + speed, cur_speed; - FILE* img_fp; + FILE *img_fp; void *priv; char image_path[1024], - prev_image_path[1024]; + prev_image_path[1024]; char *image_history[CD_IMAGE_HISTORY]; uint32_t sound_on, cdrom_capacity, - pad, seek_pos, - seek_diff, cd_end; + pad, seek_pos, + seek_diff, cd_end; int host_drive, prev_host_drive, cd_buflen, noplay; - const cdrom_ops_t *ops; + const cdrom_ops_t *ops; - void *image; + void *image; - void (*insert)(void *p); - void (*close)(void *p); - uint32_t (*get_volume)(void *p, int channel); - uint32_t (*get_channel)(void *p, int channel); + void (*insert)(void *p); + void (*close)(void *p); + uint32_t (*get_volume)(void *p, int channel); + uint32_t (*get_channel)(void *p, int channel); int16_t cd_buffer[BUF_SIZE]; } cdrom_t; +extern cdrom_t cdrom[CDROM_NUM]; -extern cdrom_t cdrom[CDROM_NUM]; +extern int cdrom_lba_to_msf_accurate(int lba); +extern double cdrom_seek_time(cdrom_t *dev); +extern void cdrom_stop(cdrom_t *dev); +extern int cdrom_is_pre(cdrom_t *dev, uint32_t lba); +extern int cdrom_audio_callback(cdrom_t *dev, int16_t *output, int len); +extern uint8_t cdrom_audio_play(cdrom_t *dev, uint32_t pos, uint32_t len, int ismsf); +extern uint8_t cdrom_audio_track_search(cdrom_t *dev, uint32_t pos, int type, uint8_t playbit); +extern uint8_t cdrom_toshiba_audio_play(cdrom_t *dev, uint32_t pos, int type); +extern void cdrom_audio_pause_resume(cdrom_t *dev, uint8_t resume); +extern uint8_t cdrom_get_current_subchannel(cdrom_t *dev, uint8_t *b, int msf); +extern uint8_t cdrom_get_current_subcodeq_playstatus(cdrom_t *dev, uint8_t *b); +extern int cdrom_read_toc(cdrom_t *dev, unsigned char *b, int type, + unsigned char start_track, int msf, int max_len); +extern void cdrom_get_track_buffer(cdrom_t *dev, uint8_t *buf); +extern int cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, int sector, int ismsf, + int cdrom_sector_type, int cdrom_sector_flags, int *len); +extern void cdrom_read_disc_info_toc(cdrom_t *dev, unsigned char *b, unsigned char track, int type); -extern int cdrom_lba_to_msf_accurate(int lba); -extern double cdrom_seek_time(cdrom_t *dev); -extern void cdrom_stop(cdrom_t *dev); -extern int cdrom_is_pre(cdrom_t *dev, uint32_t lba); -extern int cdrom_audio_callback(cdrom_t *dev, int16_t *output, int len); -extern uint8_t cdrom_audio_play(cdrom_t *dev, uint32_t pos, uint32_t len, int ismsf); -extern uint8_t cdrom_audio_track_search(cdrom_t *dev, uint32_t pos, int type, uint8_t playbit); -extern uint8_t cdrom_toshiba_audio_play(cdrom_t *dev, uint32_t pos, int type); -extern void cdrom_audio_pause_resume(cdrom_t *dev, uint8_t resume); -extern uint8_t cdrom_get_current_subchannel(cdrom_t *dev, uint8_t *b, int msf); -extern uint8_t cdrom_get_current_subcodeq_playstatus(cdrom_t *dev, uint8_t *b); -extern int cdrom_read_toc(cdrom_t *dev, unsigned char *b, int type, - unsigned char start_track, int msf, int max_len); -extern void cdrom_get_track_buffer(cdrom_t *dev, uint8_t *buf); -extern int cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, int sector, int ismsf, - int cdrom_sector_type, int cdrom_sector_flags, int *len); -extern void cdrom_read_disc_info_toc(cdrom_t *dev, unsigned char *b, unsigned char track, int type); +extern void cdrom_seek(cdrom_t *dev, uint32_t pos); -extern void cdrom_seek(cdrom_t *dev, uint32_t pos); +extern void cdrom_close_handler(uint8_t id); +extern void cdrom_insert(uint8_t id); +extern void cdrom_eject(uint8_t id); +extern void cdrom_reload(uint8_t id); -extern void cdrom_close_handler(uint8_t id); -extern void cdrom_insert(uint8_t id); -extern void cdrom_eject(uint8_t id); -extern void cdrom_reload(uint8_t id); +extern int cdrom_image_open(cdrom_t *dev, const char *fn); +extern void cdrom_image_close(cdrom_t *dev); +extern void cdrom_image_reset(cdrom_t *dev); -extern int cdrom_image_open(cdrom_t *dev, const char *fn); -extern void cdrom_image_close(cdrom_t *dev); -extern void cdrom_image_reset(cdrom_t *dev); +extern void cdrom_update_cdb(uint8_t *cdb, int lba_pos, + int number_of_blocks); -extern void cdrom_update_cdb(uint8_t *cdb, int lba_pos, - int number_of_blocks); +extern int find_cdrom_for_scsi_id(uint8_t scsi_id); -extern int find_cdrom_for_scsi_id(uint8_t scsi_id); - -extern void cdrom_close(void); -extern void cdrom_global_init(void); -extern void cdrom_global_reset(void); -extern void cdrom_hard_reset(void); -extern void scsi_cdrom_drive_reset(int c); +extern void cdrom_close(void); +extern void cdrom_global_init(void); +extern void cdrom_global_reset(void); +extern void cdrom_hard_reset(void); +extern void scsi_cdrom_drive_reset(int c); #ifdef __cplusplus } #endif - -#endif /*EMU_CDROM_H*/ +#endif /*EMU_CDROM_H*/ diff --git a/src/include/86box/cdrom_image.h b/src/include/86box/cdrom_image.h index ea3ca18a8..b43e8cee3 100644 --- a/src/include/86box/cdrom_image.h +++ b/src/include/86box/cdrom_image.h @@ -16,7 +16,7 @@ * Copyright 2016-2022 Miran Grca. */ #ifndef CDROM_IMAGE_H -# define CDROM_IMAGE_H +#define CDROM_IMAGE_H /* this header file lists the functions provided by various platform specific cdrom-ioctl files */ @@ -25,12 +25,12 @@ extern "C" { #endif -extern int image_open(uint8_t id, wchar_t *fn); +extern int image_open(uint8_t id, wchar_t *fn); extern void image_reset(uint8_t id); extern void image_close(uint8_t id); -void update_status_bar_icon_state(int tag, int state); +void update_status_bar_icon_state(int tag, int state); extern void cdrom_set_null_handler(uint8_t id); #ifdef __cplusplus diff --git a/src/include/86box/cdrom_image_backend.h b/src/include/86box/cdrom_image_backend.h index 6fe26d1e3..64bd807b4 100644 --- a/src/include/86box/cdrom_image_backend.h +++ b/src/include/86box/cdrom_image_backend.h @@ -18,76 +18,74 @@ * Copyright 2002-2020 The DOSBox Team. */ #ifndef CDROM_IMAGE_BACKEND_H -# define CDROM_IMAGE_BACKEND_H +#define CDROM_IMAGE_BACKEND_H -#define RAW_SECTOR_SIZE 2352 -#define COOKED_SECTOR_SIZE 2048 +#define RAW_SECTOR_SIZE 2352 +#define COOKED_SECTOR_SIZE 2048 -#define DATA_TRACK 0x14 -#define AUDIO_TRACK 0x10 - -#define CD_FPS 75 -#define FRAMES_TO_MSF(f, M,S,F) { \ - uint64_t value = f; \ - *(F) = (value%CD_FPS) & 0xff; \ - value /= CD_FPS; \ - *(S) = (value%60) & 0xff; \ - value /= 60; \ - *(M) = value & 0xff; \ -} -#define MSF_TO_FRAMES(M, S, F) ((M)*60*CD_FPS+(S)*CD_FPS+(F)) +#define DATA_TRACK 0x14 +#define AUDIO_TRACK 0x10 +#define CD_FPS 75 +#define FRAMES_TO_MSF(f, M, S, F) \ + { \ + uint64_t value = f; \ + *(F) = (value % CD_FPS) & 0xff; \ + value /= CD_FPS; \ + *(S) = (value % 60) & 0xff; \ + value /= 60; \ + *(M) = value & 0xff; \ + } +#define MSF_TO_FRAMES(M, S, F) ((M) *60 * CD_FPS + (S) *CD_FPS + (F)) typedef struct SMSF { - uint16_t min; - uint8_t sec; - uint8_t fr; + uint16_t min; + uint8_t sec; + uint8_t fr; } TMSF; /* Track file struct. */ typedef struct { - int (*read)(void *p, uint8_t *buffer, uint64_t seek, size_t count); - uint64_t (*get_length)(void *p); - void (*close)(void *p); + int (*read)(void *p, uint8_t *buffer, uint64_t seek, size_t count); + uint64_t (*get_length)(void *p); + void (*close)(void *p); - char fn[260]; - FILE *file; + char fn[260]; + FILE *file; } track_file_t; typedef struct { - int number, track_number, attr, sector_size, - mode2, form, pre, pad; - uint64_t start, length, - skip; - track_file_t *file; + int number, track_number, attr, sector_size, + mode2, form, pre, pad; + uint64_t start, length, + skip; + track_file_t *file; } track_t; typedef struct { - int tracks_num; - track_t *tracks; + int tracks_num; + track_t *tracks; } cd_img_t; - /* Binary file functions. */ -extern void cdi_close(cd_img_t *cdi); -extern int cdi_set_device(cd_img_t *cdi, const char *path); -extern int cdi_get_audio_tracks(cd_img_t *cdi, int *st_track, int *end, TMSF *lead_out); -extern int cdi_get_audio_tracks_lba(cd_img_t *cdi, int *st_track, int *end, uint32_t *lead_out); -extern int cdi_get_audio_track_pre(cd_img_t *cdi, int track); -extern int cdi_get_audio_track_info(cd_img_t *cdi, int end, int track, int *track_num, TMSF *start, uint8_t *attr); -extern int cdi_get_audio_track_info_lba(cd_img_t *cdi, int end, int track, int *track_num, uint32_t *start, uint8_t *attr); -extern int cdi_get_track(cd_img_t *cdi, uint32_t sector); -extern int cdi_get_audio_sub(cd_img_t *cdi, uint32_t sector, uint8_t *attr, uint8_t *track, uint8_t *index, TMSF *rel_pos, TMSF *abs_pos); -extern int cdi_read_sector(cd_img_t *cdi, uint8_t *buffer, int raw, uint32_t sector); -extern int cdi_read_sectors(cd_img_t *cdi, uint8_t *buffer, int raw, uint32_t sector, uint32_t num); -extern int cdi_read_sector_sub(cd_img_t *cdi, uint8_t *buffer, uint32_t sector); -extern int cdi_get_sector_size(cd_img_t *cdi, uint32_t sector); -extern int cdi_is_mode2(cd_img_t *cdi, uint32_t sector); -extern int cdi_get_mode2_form(cd_img_t *cdi, uint32_t sector); -extern int cdi_load_iso(cd_img_t *cdi, const char *filename); -extern int cdi_load_cue(cd_img_t *cdi, const char *cuefile); -extern int cdi_has_data_track(cd_img_t *cdi); -extern int cdi_has_audio_track(cd_img_t *cdi); - +extern void cdi_close(cd_img_t *cdi); +extern int cdi_set_device(cd_img_t *cdi, const char *path); +extern int cdi_get_audio_tracks(cd_img_t *cdi, int *st_track, int *end, TMSF *lead_out); +extern int cdi_get_audio_tracks_lba(cd_img_t *cdi, int *st_track, int *end, uint32_t *lead_out); +extern int cdi_get_audio_track_pre(cd_img_t *cdi, int track); +extern int cdi_get_audio_track_info(cd_img_t *cdi, int end, int track, int *track_num, TMSF *start, uint8_t *attr); +extern int cdi_get_audio_track_info_lba(cd_img_t *cdi, int end, int track, int *track_num, uint32_t *start, uint8_t *attr); +extern int cdi_get_track(cd_img_t *cdi, uint32_t sector); +extern int cdi_get_audio_sub(cd_img_t *cdi, uint32_t sector, uint8_t *attr, uint8_t *track, uint8_t *index, TMSF *rel_pos, TMSF *abs_pos); +extern int cdi_read_sector(cd_img_t *cdi, uint8_t *buffer, int raw, uint32_t sector); +extern int cdi_read_sectors(cd_img_t *cdi, uint8_t *buffer, int raw, uint32_t sector, uint32_t num); +extern int cdi_read_sector_sub(cd_img_t *cdi, uint8_t *buffer, uint32_t sector); +extern int cdi_get_sector_size(cd_img_t *cdi, uint32_t sector); +extern int cdi_is_mode2(cd_img_t *cdi, uint32_t sector); +extern int cdi_get_mode2_form(cd_img_t *cdi, uint32_t sector); +extern int cdi_load_iso(cd_img_t *cdi, const char *filename); +extern int cdi_load_cue(cd_img_t *cdi, const char *cuefile); +extern int cdi_has_data_track(cd_img_t *cdi); +extern int cdi_has_audio_track(cd_img_t *cdi); #endif /*CDROM_IMAGE_BACKEND_H*/ diff --git a/src/include/86box/chipset.h b/src/include/86box/chipset.h index cc36578fa..f7ae00f87 100644 --- a/src/include/86box/chipset.h +++ b/src/include/86box/chipset.h @@ -15,161 +15,160 @@ * Copyright 2019,2020 Miran Grca. */ #ifndef EMU_CHIPSET_H -# define EMU_CHIPSET_H - +#define EMU_CHIPSET_H /* ACC */ -extern const device_t acc2168_device; +extern const device_t acc2168_device; /* ALi */ -extern const device_t ali1217_device; -extern const device_t ali1429_device; -extern const device_t ali1429g_device; -extern const device_t ali1489_device; -extern const device_t ali1531_device; -extern const device_t ali1541_device; -extern const device_t ali1543_device; -extern const device_t ali1543c_device; -extern const device_t ali1621_device; -extern const device_t ali6117d_device; +extern const device_t ali1217_device; +extern const device_t ali1429_device; +extern const device_t ali1429g_device; +extern const device_t ali1489_device; +extern const device_t ali1531_device; +extern const device_t ali1541_device; +extern const device_t ali1543_device; +extern const device_t ali1543c_device; +extern const device_t ali1621_device; +extern const device_t ali6117d_device; /* AMD */ -extern const device_t amd640_device; +extern const device_t amd640_device; /* Contaq/Cypress */ -extern const device_t contaq_82c596a_device; -extern const device_t contaq_82c597_device; +extern const device_t contaq_82c596a_device; +extern const device_t contaq_82c597_device; /* C&T */ -extern const device_t ct_82c100_device; -extern const device_t neat_device; -extern const device_t scat_device; -extern const device_t scat_4_device; -extern const device_t scat_sx_device; -extern const device_t cs8230_device; -extern const device_t cs4031_device; +extern const device_t ct_82c100_device; +extern const device_t neat_device; +extern const device_t scat_device; +extern const device_t scat_4_device; +extern const device_t scat_sx_device; +extern const device_t cs8230_device; +extern const device_t cs4031_device; /* G2 */ -extern const device_t gc100_device; -extern const device_t gc100a_device; +extern const device_t gc100_device; +extern const device_t gc100a_device; /* Headland */ -extern const device_t headland_gc10x_device; -extern const device_t headland_gc113_device; -extern const device_t headland_ht18a_device; -extern const device_t headland_ht18b_device; -extern const device_t headland_ht18c_device; -extern const device_t headland_ht21c_d_device; -extern const device_t headland_ht21e_device; +extern const device_t headland_gc10x_device; +extern const device_t headland_gc113_device; +extern const device_t headland_ht18a_device; +extern const device_t headland_ht18b_device; +extern const device_t headland_ht18c_device; +extern const device_t headland_ht21c_d_device; +extern const device_t headland_ht21e_device; /* IMS */ -extern const device_t ims8848_device; +extern const device_t ims8848_device; /* Intel */ -extern const device_t intel_82335_device; -extern const device_t i420ex_device; -extern const device_t i420ex_ide_device; -extern const device_t i420tx_device; -extern const device_t i420zx_device; -extern const device_t i430lx_device; -extern const device_t i430nx_device; -extern const device_t i430fx_device; -extern const device_t i430fx_old_device; -extern const device_t i430fx_rev02_device; -extern const device_t i430hx_device; -extern const device_t i430vx_device; -extern const device_t i430tx_device; -extern const device_t i440fx_device; -extern const device_t i440lx_device; -extern const device_t i440ex_device; -extern const device_t i440bx_device; -extern const device_t i440bx_no_agp_device; -extern const device_t i440gx_device; -extern const device_t i440zx_device; -extern const device_t i450kx_device; +extern const device_t intel_82335_device; +extern const device_t i420ex_device; +extern const device_t i420ex_ide_device; +extern const device_t i420tx_device; +extern const device_t i420zx_device; +extern const device_t i430lx_device; +extern const device_t i430nx_device; +extern const device_t i430fx_device; +extern const device_t i430fx_old_device; +extern const device_t i430fx_rev02_device; +extern const device_t i430hx_device; +extern const device_t i430vx_device; +extern const device_t i430tx_device; +extern const device_t i440fx_device; +extern const device_t i440lx_device; +extern const device_t i440ex_device; +extern const device_t i440bx_device; +extern const device_t i440bx_no_agp_device; +extern const device_t i440gx_device; +extern const device_t i440zx_device; +extern const device_t i450kx_device; -extern const device_t sio_device; -extern const device_t sio_zb_device; +extern const device_t sio_device; +extern const device_t sio_zb_device; -extern const device_t piix_device; -extern const device_t piix_old_device; -extern const device_t piix_rev02_device; -extern const device_t piix3_device; -extern const device_t piix3_ioapic_device; -extern const device_t piix4_device; -extern const device_t piix4e_device; -extern const device_t slc90e66_device; +extern const device_t piix_device; +extern const device_t piix_old_device; +extern const device_t piix_rev02_device; +extern const device_t piix3_device; +extern const device_t piix3_ioapic_device; +extern const device_t piix4_device; +extern const device_t piix4e_device; +extern const device_t slc90e66_device; -extern const device_t ioapic_device; +extern const device_t ioapic_device; /* OPTi */ -extern const device_t opti283_device; -extern const device_t opti291_device; -extern const device_t opti493_device; -extern const device_t opti495_device; -extern const device_t opti802g_device; -extern const device_t opti822_device; -extern const device_t opti895_device; +extern const device_t opti283_device; +extern const device_t opti291_device; +extern const device_t opti493_device; +extern const device_t opti495_device; +extern const device_t opti802g_device; +extern const device_t opti822_device; +extern const device_t opti895_device; -extern const device_t opti5x7_device; +extern const device_t opti5x7_device; /* SiS */ -extern const device_t rabbit_device; -extern const device_t sis_85c401_device; -extern const device_t sis_85c460_device; -extern const device_t sis_85c461_device; -extern const device_t sis_85c471_device; -extern const device_t sis_85c496_device; -extern const device_t sis_85c496_ls486e_device; -extern const device_t sis_85c50x_device; -extern const device_t sis_5511_device; -extern const device_t sis_5571_device; +extern const device_t rabbit_device; +extern const device_t sis_85c401_device; +extern const device_t sis_85c460_device; +extern const device_t sis_85c461_device; +extern const device_t sis_85c471_device; +extern const device_t sis_85c496_device; +extern const device_t sis_85c496_ls486e_device; +extern const device_t sis_85c50x_device; +extern const device_t sis_5511_device; +extern const device_t sis_5571_device; /* ST */ -extern const device_t stpc_client_device; -extern const device_t stpc_consumer2_device; -extern const device_t stpc_elite_device; -extern const device_t stpc_atlas_device; -extern const device_t stpc_serial_device; -extern const device_t stpc_lpt_device; +extern const device_t stpc_client_device; +extern const device_t stpc_consumer2_device; +extern const device_t stpc_elite_device; +extern const device_t stpc_atlas_device; +extern const device_t stpc_serial_device; +extern const device_t stpc_lpt_device; /* UMC */ -extern const device_t umc_8886f_device; -extern const device_t umc_8886af_device; -extern const device_t umc_hb4_device; +extern const device_t umc_8886f_device; +extern const device_t umc_8886af_device; +extern const device_t umc_hb4_device; /* VIA */ -extern const device_t via_vt82c49x_device; -extern const device_t via_vt82c49x_pci_device; -extern const device_t via_vt82c49x_pci_ide_device; -extern const device_t via_vt82c505_device; -extern const device_t via_vpx_device; -extern const device_t via_vp3_device; -extern const device_t via_mvp3_device; -extern const device_t via_apro_device; -extern const device_t via_apro133_device; -extern const device_t via_apro133a_device; -extern const device_t via_vt8601_device; -extern const device_t via_vt82c586b_device; -extern const device_t via_vt82c596a_device; -extern const device_t via_vt82c596b_device; -extern const device_t via_vt82c686a_device; -extern const device_t via_vt82c686b_device; -extern const device_t via_vt8231_device; +extern const device_t via_vt82c49x_device; +extern const device_t via_vt82c49x_pci_device; +extern const device_t via_vt82c49x_pci_ide_device; +extern const device_t via_vt82c505_device; +extern const device_t via_vpx_device; +extern const device_t via_vp3_device; +extern const device_t via_mvp3_device; +extern const device_t via_apro_device; +extern const device_t via_apro133_device; +extern const device_t via_apro133a_device; +extern const device_t via_vt8601_device; +extern const device_t via_vt82c586b_device; +extern const device_t via_vt82c596a_device; +extern const device_t via_vt82c596b_device; +extern const device_t via_vt82c686a_device; +extern const device_t via_vt82c686b_device; +extern const device_t via_vt8231_device; /* VLSI */ -extern const device_t vl82c480_device; -extern const device_t vl82c486_device; -extern const device_t vlsi_scamp_device; +extern const device_t vl82c480_device; +extern const device_t vl82c486_device; +extern const device_t vlsi_scamp_device; /* WD */ -extern const device_t wd76c10_device; +extern const device_t wd76c10_device; /* Miscellaneous Hardware */ -extern const device_t phoenix_486_jumper_device; -extern const device_t phoenix_486_jumper_pci_device; +extern const device_t phoenix_486_jumper_device; +extern const device_t phoenix_486_jumper_pci_device; #if defined(DEV_BRANCH) && defined(USE_OLIVETTI) -extern const device_t olivetti_eva_device; +extern const device_t olivetti_eva_device; #endif -#endif /*EMU_CHIPSET_H*/ +#endif /*EMU_CHIPSET_H*/ diff --git a/src/include/86box/clock.h b/src/include/86box/clock.h index 7d2be9f05..813c21af7 100644 --- a/src/include/86box/clock.h +++ b/src/include/86box/clock.h @@ -15,7 +15,7 @@ * Copyright 2020 RichardG. */ #ifndef EMU_CLOCK_H -# define EMU_CLOCK_H +#define EMU_CLOCK_H /* clock_ics9xxx.c */ enum { @@ -54,9 +54,7 @@ enum { ICS9xxx_MAX }; - /* clock_ics9xxx.c */ -extern device_t *ics9xxx_get(uint8_t model); +extern device_t *ics9xxx_get(uint8_t model); - -#endif /*EMU_CLOCK_H*/ +#endif /*EMU_CLOCK_H*/ diff --git a/src/include/86box/ddma.h b/src/include/86box/ddma.h index 64642f2ae..1f422ab65 100644 --- a/src/include/86box/ddma.h +++ b/src/include/86box/ddma.h @@ -15,8 +15,7 @@ * Copyright 2020 Miran Grca. */ #ifndef DDMA_H -# define DDMA_H - +#define DDMA_H #ifdef __cplusplus extern "C" { @@ -24,26 +23,23 @@ extern "C" { typedef struct { - uint16_t io_base; - int channel, enable; + uint16_t io_base; + int channel, enable; } ddma_channel_t; typedef struct { - ddma_channel_t channels[8]; + ddma_channel_t channels[8]; } ddma_t; - /* Global variables. */ -extern const device_t ddma_device; - +extern const device_t ddma_device; /* Functions. */ -extern void ddma_update_io_mapping(ddma_t *dev, int ch, uint8_t base_l, uint8_t base_h, int enable); +extern void ddma_update_io_mapping(ddma_t *dev, int ch, uint8_t base_l, uint8_t base_h, int enable); #ifdef __cplusplus } #endif - -#endif /*DDMA_H*/ +#endif /*DDMA_H*/ diff --git a/src/include/86box/device.h b/src/include/86box/device.h index 948c4b03b..ee983be4b 100644 --- a/src/include/86box/device.h +++ b/src/include/86box/device.h @@ -54,31 +54,29 @@ #define CONFIG_BIOS 11 enum { - DEVICE_PCJR = 2, /* requires an IBM PCjr */ - DEVICE_AT = 4, /* requires an AT-compatible system */ - DEVICE_PS2 = 8, /* requires a PS/1 or PS/2 system */ - DEVICE_ISA = 0x10, /* requires the ISA bus */ - DEVICE_CBUS = 0x20, /* requires the C-BUS bus */ - DEVICE_MCA = 0x40, /* requires the MCA bus */ - DEVICE_EISA = 0x80, /* requires the EISA bus */ - DEVICE_VLB = 0x100, /* requires the PCI bus */ - DEVICE_PCI = 0x200, /* requires the VLB bus */ - DEVICE_AGP = 0x400, /* requires the AGP bus */ - DEVICE_AC97 = 0x800, /* requires the AC'97 bus */ - DEVICE_COM = 0x1000, /* requires a serial port */ - DEVICE_LPT = 0x2000 /* requires a parallel port */ + DEVICE_PCJR = 2, /* requires an IBM PCjr */ + DEVICE_AT = 4, /* requires an AT-compatible system */ + DEVICE_PS2 = 8, /* requires a PS/1 or PS/2 system */ + DEVICE_ISA = 0x10, /* requires the ISA bus */ + DEVICE_CBUS = 0x20, /* requires the C-BUS bus */ + DEVICE_MCA = 0x40, /* requires the MCA bus */ + DEVICE_EISA = 0x80, /* requires the EISA bus */ + DEVICE_VLB = 0x100, /* requires the PCI bus */ + DEVICE_PCI = 0x200, /* requires the VLB bus */ + DEVICE_AGP = 0x400, /* requires the AGP bus */ + DEVICE_AC97 = 0x800, /* requires the AC'97 bus */ + DEVICE_COM = 0x1000, /* requires a serial port */ + DEVICE_LPT = 0x2000 /* requires a parallel port */ }; - -#define BIOS_NORMAL 0 -#define BIOS_INTERLEAVED 1 -#define BIOS_INTERLEAVED_SINGLEFILE 2 -#define BIOS_INTERLEAVED_QUAD 3 -#define BIOS_INTERLEAVED_QUAD_SINGLEFILE 4 -#define BIOS_INTEL_AMI 5 -#define BIOS_INTERLEAVED_INVERT 8 -#define BIOS_HIGH_BIT_INVERT 16 - +#define BIOS_NORMAL 0 +#define BIOS_INTERLEAVED 1 +#define BIOS_INTERLEAVED_SINGLEFILE 2 +#define BIOS_INTERLEAVED_QUAD 3 +#define BIOS_INTERLEAVED_QUAD_SINGLEFILE 4 +#define BIOS_INTEL_AMI 5 +#define BIOS_INTERLEAVED_INVERT 8 +#define BIOS_HIGH_BIT_INVERT 16 typedef struct { const char *description; @@ -91,7 +89,7 @@ typedef struct { int bios_type; int files_no; uint32_t local, size; - void *dev1, *dev2; + void *dev1, *dev2; const char **files; } device_config_bios_t; diff --git a/src/include/86box/discord.h b/src/include/86box/discord.h index 90621e16d..f04370143 100644 --- a/src/include/86box/discord.h +++ b/src/include/86box/discord.h @@ -15,20 +15,19 @@ * Copyright 2019 David Hrdlička. */ #ifndef WIN_DISCORD_H -# define WIN_DISCORD_H +#define WIN_DISCORD_H #ifdef __cplusplus -extern "C" -{ +extern "C" { #endif -extern int discord_loaded; +extern int discord_loaded; -extern int discord_load(); -extern void discord_init(); -extern void discord_close(); -extern void discord_update_activity(int paused); -extern void discord_run_callbacks(); +extern int discord_load(); +extern void discord_init(); +extern void discord_close(); +extern void discord_update_activity(int paused); +extern void discord_run_callbacks(); #ifdef __cplusplus } diff --git a/src/include/86box/dma.h b/src/include/86box/dma.h index 585d77e95..5e36daee4 100644 --- a/src/include/86box/dma.h +++ b/src/include/86box/dma.h @@ -37,75 +37,70 @@ * USA. */ #ifndef EMU_DMA_H -# define EMU_DMA_H - - -#define DMA_NODATA -1 -#define DMA_OVER 0x10000 -#define DMA_VERIFY 0x20000 +#define EMU_DMA_H +#define DMA_NODATA -1 +#define DMA_OVER 0x10000 +#define DMA_VERIFY 0x20000 typedef struct { - uint8_t m, mode, page, stat, - stat_rq, command, - ps2_mode, arb_level, - sg_command, sg_status, - ptr0, enabled, - ext_mode, page_l, - page_h, pad; - uint16_t cb, io_addr, - base, transfer_mode; - uint32_t ptr, ptr_cur, - addr, - ab, ac; - int cc, wp, - size, count, - eot; + uint8_t m, mode, page, stat, + stat_rq, command, + ps2_mode, arb_level, + sg_command, sg_status, + ptr0, enabled, + ext_mode, page_l, + page_h, pad; + uint16_t cb, io_addr, + base, transfer_mode; + uint32_t ptr, ptr_cur, + addr, + ab, ac; + int cc, wp, + size, count, + eot; } dma_t; +extern dma_t dma[8]; +extern uint8_t dma_e; +extern uint8_t dma_m; -extern dma_t dma[8]; -extern uint8_t dma_e; -extern uint8_t dma_m; +extern void dma_init(void); +extern void dma16_init(void); +extern void ps2_dma_init(void); +extern void dma_reset(void); +extern int dma_mode(int channel); +extern void readdma0(void); +extern int readdma1(void); +extern uint8_t readdma2(void); +extern int readdma3(void); -extern void dma_init(void); -extern void dma16_init(void); -extern void ps2_dma_init(void); -extern void dma_reset(void); -extern int dma_mode(int channel); +extern void writedma2(uint8_t temp); -extern void readdma0(void); -extern int readdma1(void); -extern uint8_t readdma2(void); -extern int readdma3(void); +extern int dma_get_drq(int channel); +extern void dma_set_drq(int channel, int set); -extern void writedma2(uint8_t temp); +extern int dma_channel_read(int channel); +extern int dma_channel_write(int channel, uint16_t val); -extern int dma_get_drq(int channel); -extern void dma_set_drq(int channel, int set); +extern void dma_alias_set(void); +extern void dma_alias_set_piix(void); +extern void dma_alias_remove(void); +extern void dma_alias_remove_piix(void); -extern int dma_channel_read(int channel); -extern int dma_channel_write(int channel, uint16_t val); +extern void dma_bm_read(uint32_t PhysAddress, uint8_t *DataRead, uint32_t TotalSize, int TransferSize); +extern void dma_bm_write(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_t TotalSize, int TransferSize); -extern void dma_alias_set(void); -extern void dma_alias_set_piix(void); -extern void dma_alias_remove(void); -extern void dma_alias_remove_piix(void); +void dma_set_params(uint8_t advanced, uint32_t mask); +void dma_set_mask(uint32_t mask); -extern void dma_bm_read(uint32_t PhysAddress, uint8_t *DataRead, uint32_t TotalSize, int TransferSize); -extern void dma_bm_write(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_t TotalSize, int TransferSize); +void dma_set_at(uint8_t at); -void dma_set_params(uint8_t advanced, uint32_t mask); -void dma_set_mask(uint32_t mask); +void dma_ext_mode_init(void); +void dma_high_page_init(void); -void dma_set_at(uint8_t at); +void dma_remove_sg(void); +void dma_set_sg_base(uint8_t sg_base); -void dma_ext_mode_init(void); -void dma_high_page_init(void); - -void dma_remove_sg(void); -void dma_set_sg_base(uint8_t sg_base); - - -#endif /*EMU_DMA_H*/ +#endif /*EMU_DMA_H*/ diff --git a/src/include/86box/fdc.h b/src/include/86box/fdc.h index fa763b0ef..6f3328da9 100644 --- a/src/include/86box/fdc.h +++ b/src/include/86box/fdc.h @@ -20,186 +20,184 @@ * Copyright 2018-2020 Fred N. van Kempen. */ #ifndef EMU_FDC_H -# define EMU_FDC_H +#define EMU_FDC_H extern int fdc_type; -#define FDC_PRIMARY_ADDR 0x03f0 -#define FDC_PRIMARY_IRQ 6 -#define FDC_PRIMARY_DMA 2 -#define FDC_PRIMARY_PCJR_ADDR 0x00f0 -#define FDC_PRIMARY_PCJR_IRQ 6 -#define FDC_PRIMARY_PCJR_DMA 2 -#define FDC_SECONDARY_ADDR 0x0370 -#define FDC_SECONDARY_IRQ 6 -#define FDC_SECONDARY_DMA 2 -#define FDC_TERTIARY_ADDR 0x0360 -#define FDC_TERTIARY_IRQ 6 -#define FDC_TERTIARY_DMA 2 -#define FDC_QUATERNARY_ADDR 0x03e0 -#define FDC_QUATERNARY_IRQ 6 -#define FDC_QUATERNARY_DMA 2 - -#define FDC_FLAG_PCJR 0x01 /* PCjr */ -#define FDC_FLAG_DISKCHG_ACTLOW 0x02 /* Amstrad, PS/1, PS/2 ISA */ -#define FDC_FLAG_AT 0x04 /* AT+, PS/x */ -#define FDC_FLAG_PS1 0x08 /* PS/1, PS/2 ISA */ -#define FDC_FLAG_SUPERIO 0x10 /* Super I/O chips */ -#define FDC_FLAG_START_RWC_1 0x20 /* W83877F, W83977F */ -#define FDC_FLAG_MORE_TRACKS 0x40 /* W83877F, W83977F, PC87306, PC87309 */ -#define FDC_FLAG_NSC 0x80 /* PC87306, PC87309 */ -#define FDC_FLAG_TOSHIBA 0x100 /* T1000, T1200 */ -#define FDC_FLAG_AMSTRAD 0x200 /* Non-AT Amstrad machines */ -#define FDC_FLAG_UMC 0x400 /* UMC UM8398 */ -#define FDC_FLAG_ALI 0x800 /* ALi M512x / M1543C */ +#define FDC_PRIMARY_ADDR 0x03f0 +#define FDC_PRIMARY_IRQ 6 +#define FDC_PRIMARY_DMA 2 +#define FDC_PRIMARY_PCJR_ADDR 0x00f0 +#define FDC_PRIMARY_PCJR_IRQ 6 +#define FDC_PRIMARY_PCJR_DMA 2 +#define FDC_SECONDARY_ADDR 0x0370 +#define FDC_SECONDARY_IRQ 6 +#define FDC_SECONDARY_DMA 2 +#define FDC_TERTIARY_ADDR 0x0360 +#define FDC_TERTIARY_IRQ 6 +#define FDC_TERTIARY_DMA 2 +#define FDC_QUATERNARY_ADDR 0x03e0 +#define FDC_QUATERNARY_IRQ 6 +#define FDC_QUATERNARY_DMA 2 +#define FDC_FLAG_PCJR 0x01 /* PCjr */ +#define FDC_FLAG_DISKCHG_ACTLOW 0x02 /* Amstrad, PS/1, PS/2 ISA */ +#define FDC_FLAG_AT 0x04 /* AT+, PS/x */ +#define FDC_FLAG_PS1 0x08 /* PS/1, PS/2 ISA */ +#define FDC_FLAG_SUPERIO 0x10 /* Super I/O chips */ +#define FDC_FLAG_START_RWC_1 0x20 /* W83877F, W83977F */ +#define FDC_FLAG_MORE_TRACKS 0x40 /* W83877F, W83977F, PC87306, PC87309 */ +#define FDC_FLAG_NSC 0x80 /* PC87306, PC87309 */ +#define FDC_FLAG_TOSHIBA 0x100 /* T1000, T1200 */ +#define FDC_FLAG_AMSTRAD 0x200 /* Non-AT Amstrad machines */ +#define FDC_FLAG_UMC 0x400 /* UMC UM8398 */ +#define FDC_FLAG_ALI 0x800 /* ALi M512x / M1543C */ typedef struct { - uint8_t dor, stat, command, processed_cmd, dat, st0, swap, dtl; - uint8_t swwp, disable_write, st5, st6, error; - uint8_t params[8], res[11]; - uint8_t specify[2]; - uint8_t config, pretrk; - uint8_t fifobuf[16]; + uint8_t dor, stat, command, processed_cmd, dat, st0, swap, dtl; + uint8_t swwp, disable_write, st5, st6, error; + uint8_t params[8], res[11]; + uint8_t specify[2]; + uint8_t config, pretrk; + uint8_t fifobuf[16]; - uint16_t base_address; + uint16_t base_address; - int head, sector, drive, lastdrive; - int pcn[4], eot[4]; - int rw_track, pos; - int pnum, ptot; - int rate, reset_stat; - int lock, perp; - int format_state, format_n; - int step, seek_dir; - int tc, noprec; + int head, sector, drive, lastdrive; + int pcn[4], eot[4]; + int rw_track, pos; + int pnum, ptot; + int rate, reset_stat; + int lock, perp; + int format_state, format_n; + int step, seek_dir; + int tc, noprec; - int data_ready, inread; - int bitcell_period, enh_mode; - int rwc[4], drvrate[4]; - int boot_drive, dma; - int densel_polarity, densel_force; - int fifo, tfifo; - int fifobufpos, drv2en; + int data_ready, inread; + int bitcell_period, enh_mode; + int rwc[4], drvrate[4]; + int boot_drive, dma; + int densel_polarity, densel_force; + int fifo, tfifo; + int fifobufpos, drv2en; - int gap; - int enable_3f1, format_sectors; - int max_track, mfm; - int deleted, wrong_am; - int sc, satisfying_sectors; - int fintr, rw_drive; + int gap; + int enable_3f1, format_sectors; + int max_track, mfm; + int deleted, wrong_am; + int sc, satisfying_sectors; + int fintr, rw_drive; - int flags, interrupt; + int flags, interrupt; - int irq; /* Should be 6 by default. */ - int dma_ch; /* Should be 2 by default. */ + int irq; /* Should be 6 by default. */ + int dma_ch; /* Should be 2 by default. */ - int bit_rate; /* Should be 250 at start. */ - int paramstogo; + int bit_rate; /* Should be 250 at start. */ + int paramstogo; - sector_id_t read_track_sector, format_sector_id; + sector_id_t read_track_sector, format_sector_id; - uint64_t watchdog_count; + uint64_t watchdog_count; - pc_timer_t timer, watchdog_timer; + pc_timer_t timer, watchdog_timer; } fdc_t; - -extern void fdc_remove(fdc_t *fdc); -extern void fdc_poll(fdc_t *fdc); -extern void fdc_abort(fdc_t *fdc); -extern void fdc_set_dskchg_activelow(fdc_t *fdc); -extern void fdc_3f1_enable(fdc_t *fdc, int enable); -extern int fdc_get_bit_rate(fdc_t *fdc); -extern int fdc_get_bitcell_period(fdc_t *fdc); +extern void fdc_remove(fdc_t *fdc); +extern void fdc_poll(fdc_t *fdc); +extern void fdc_abort(fdc_t *fdc); +extern void fdc_set_dskchg_activelow(fdc_t *fdc); +extern void fdc_3f1_enable(fdc_t *fdc, int enable); +extern int fdc_get_bit_rate(fdc_t *fdc); +extern int fdc_get_bitcell_period(fdc_t *fdc); /* A few functions to communicate between Super I/O chips and the FDC. */ -extern void fdc_update_enh_mode(fdc_t *fdc, int enh_mode); -extern int fdc_get_rwc(fdc_t *fdc, int drive); -extern void fdc_update_rwc(fdc_t *fdc, int drive, int rwc); -extern int fdc_get_boot_drive(fdc_t *fdc); -extern void fdc_update_boot_drive(fdc_t *fdc, int boot_drive); -extern void fdc_update_densel_polarity(fdc_t *fdc, int densel_polarity); -extern uint8_t fdc_get_densel_polarity(fdc_t *fdc); -extern void fdc_update_densel_force(fdc_t *fdc, int densel_force); -extern void fdc_update_drvrate(fdc_t *fdc, int drive, int drvrate); -extern void fdc_update_drv2en(fdc_t *fdc, int drv2en); +extern void fdc_update_enh_mode(fdc_t *fdc, int enh_mode); +extern int fdc_get_rwc(fdc_t *fdc, int drive); +extern void fdc_update_rwc(fdc_t *fdc, int drive, int rwc); +extern int fdc_get_boot_drive(fdc_t *fdc); +extern void fdc_update_boot_drive(fdc_t *fdc, int boot_drive); +extern void fdc_update_densel_polarity(fdc_t *fdc, int densel_polarity); +extern uint8_t fdc_get_densel_polarity(fdc_t *fdc); +extern void fdc_update_densel_force(fdc_t *fdc, int densel_force); +extern void fdc_update_drvrate(fdc_t *fdc, int drive, int drvrate); +extern void fdc_update_drv2en(fdc_t *fdc, int drv2en); -extern void fdc_noidam(fdc_t *fdc); -extern void fdc_nosector(fdc_t *fdc); -extern void fdc_nodataam(fdc_t *fdc); -extern void fdc_cannotformat(fdc_t *fdc); -extern void fdc_wrongcylinder(fdc_t *fdc); -extern void fdc_badcylinder(fdc_t *fdc); -extern void fdc_writeprotect(fdc_t *fdc); -extern void fdc_datacrcerror(fdc_t *fdc); -extern void fdc_headercrcerror(fdc_t *fdc); -extern void fdc_nosector(fdc_t *fdc); +extern void fdc_noidam(fdc_t *fdc); +extern void fdc_nosector(fdc_t *fdc); +extern void fdc_nodataam(fdc_t *fdc); +extern void fdc_cannotformat(fdc_t *fdc); +extern void fdc_wrongcylinder(fdc_t *fdc); +extern void fdc_badcylinder(fdc_t *fdc); +extern void fdc_writeprotect(fdc_t *fdc); +extern void fdc_datacrcerror(fdc_t *fdc); +extern void fdc_headercrcerror(fdc_t *fdc); +extern void fdc_nosector(fdc_t *fdc); -extern int real_drive(fdc_t *fdc, int drive); +extern int real_drive(fdc_t *fdc, int drive); extern sector_id_t fdc_get_read_track_sector(fdc_t *fdc); -extern int fdc_get_compare_condition(fdc_t *fdc); -extern int fdc_is_deleted(fdc_t *fdc); -extern int fdc_is_sk(fdc_t *fdc); -extern void fdc_set_wrong_am(fdc_t *fdc); -extern int fdc_get_drive(fdc_t *fdc); -extern int fdc_get_perp(fdc_t *fdc); -extern int fdc_get_format_n(fdc_t *fdc); -extern int fdc_is_mfm(fdc_t *fdc); -extern double fdc_get_hut(fdc_t *fdc); -extern double fdc_get_hlt(fdc_t *fdc); -extern void fdc_request_next_sector_id(fdc_t *fdc); -extern void fdc_stop_id_request(fdc_t *fdc); -extern int fdc_get_gap(fdc_t *fdc); -extern int fdc_get_gap2(fdc_t *fdc, int drive); -extern int fdc_get_dtl(fdc_t *fdc); -extern int fdc_get_format_sectors(fdc_t *fdc); -extern uint8_t fdc_get_swwp(fdc_t *fdc); -extern void fdc_set_swwp(fdc_t *fdc, uint8_t swwp); -extern uint8_t fdc_get_diswr(fdc_t *fdc); -extern void fdc_set_diswr(fdc_t *fdc, uint8_t diswr); -extern uint8_t fdc_get_swap(fdc_t *fdc); -extern void fdc_set_swap(fdc_t *fdc, uint8_t swap); +extern int fdc_get_compare_condition(fdc_t *fdc); +extern int fdc_is_deleted(fdc_t *fdc); +extern int fdc_is_sk(fdc_t *fdc); +extern void fdc_set_wrong_am(fdc_t *fdc); +extern int fdc_get_drive(fdc_t *fdc); +extern int fdc_get_perp(fdc_t *fdc); +extern int fdc_get_format_n(fdc_t *fdc); +extern int fdc_is_mfm(fdc_t *fdc); +extern double fdc_get_hut(fdc_t *fdc); +extern double fdc_get_hlt(fdc_t *fdc); +extern void fdc_request_next_sector_id(fdc_t *fdc); +extern void fdc_stop_id_request(fdc_t *fdc); +extern int fdc_get_gap(fdc_t *fdc); +extern int fdc_get_gap2(fdc_t *fdc, int drive); +extern int fdc_get_dtl(fdc_t *fdc); +extern int fdc_get_format_sectors(fdc_t *fdc); +extern uint8_t fdc_get_swwp(fdc_t *fdc); +extern void fdc_set_swwp(fdc_t *fdc, uint8_t swwp); +extern uint8_t fdc_get_diswr(fdc_t *fdc); +extern void fdc_set_diswr(fdc_t *fdc, uint8_t diswr); +extern uint8_t fdc_get_swap(fdc_t *fdc); +extern void fdc_set_swap(fdc_t *fdc, uint8_t swap); -extern void fdc_finishcompare(fdc_t *fdc, int satisfying); -extern void fdc_finishread(fdc_t *fdc); -extern void fdc_sector_finishcompare(fdc_t *fdc, int satisfying); -extern void fdc_sector_finishread(fdc_t *fdc); -extern void fdc_track_finishread(fdc_t *fdc, int condition); -extern int fdc_is_verify(fdc_t *fdc); +extern void fdc_finishcompare(fdc_t *fdc, int satisfying); +extern void fdc_finishread(fdc_t *fdc); +extern void fdc_sector_finishcompare(fdc_t *fdc, int satisfying); +extern void fdc_sector_finishread(fdc_t *fdc); +extern void fdc_track_finishread(fdc_t *fdc, int condition); +extern int fdc_is_verify(fdc_t *fdc); -extern void fdc_overrun(fdc_t *fdc); -extern void fdc_set_base(fdc_t *fdc, int base); -extern void fdc_set_irq(fdc_t *fdc, int irq); -extern void fdc_set_dma_ch(fdc_t *fdc, int dma_ch); -extern int fdc_getdata(fdc_t *fdc, int last); -extern int fdc_data(fdc_t *fdc, uint8_t data, int last); +extern void fdc_overrun(fdc_t *fdc); +extern void fdc_set_base(fdc_t *fdc, int base); +extern void fdc_set_irq(fdc_t *fdc, int irq); +extern void fdc_set_dma_ch(fdc_t *fdc, int dma_ch); +extern int fdc_getdata(fdc_t *fdc, int last); +extern int fdc_data(fdc_t *fdc, uint8_t data, int last); -extern void fdc_sectorid(fdc_t *fdc, uint8_t track, uint8_t side, - uint8_t sector, uint8_t size, uint8_t crc1, - uint8_t crc2); +extern void fdc_sectorid(fdc_t *fdc, uint8_t track, uint8_t side, + uint8_t sector, uint8_t size, uint8_t crc1, + uint8_t crc2); -extern uint8_t fdc_read(uint16_t addr, void *priv); -extern void fdc_reset(void *priv); +extern uint8_t fdc_read(uint16_t addr, void *priv); +extern void fdc_reset(void *priv); -extern uint8_t fdc_get_current_drive(void); +extern uint8_t fdc_get_current_drive(void); #ifdef EMU_DEVICE_H -extern const device_t fdc_xt_device; -extern const device_t fdc_xt_t1x00_device; -extern const device_t fdc_xt_tandy_device; -extern const device_t fdc_xt_amstrad_device; -extern const device_t fdc_pcjr_device; -extern const device_t fdc_at_device; -extern const device_t fdc_at_actlow_device; -extern const device_t fdc_at_ps1_device; -extern const device_t fdc_at_smc_device; -extern const device_t fdc_at_ali_device; -extern const device_t fdc_at_winbond_device; -extern const device_t fdc_at_nsc_device; -extern const device_t fdc_dp8473_device; -extern const device_t fdc_um8398_device; +extern const device_t fdc_xt_device; +extern const device_t fdc_xt_t1x00_device; +extern const device_t fdc_xt_tandy_device; +extern const device_t fdc_xt_amstrad_device; +extern const device_t fdc_pcjr_device; +extern const device_t fdc_at_device; +extern const device_t fdc_at_actlow_device; +extern const device_t fdc_at_ps1_device; +extern const device_t fdc_at_smc_device; +extern const device_t fdc_at_ali_device; +extern const device_t fdc_at_winbond_device; +extern const device_t fdc_at_nsc_device; +extern const device_t fdc_dp8473_device; +extern const device_t fdc_um8398_device; #endif -#endif /*EMU_FDC_H*/ +#endif /*EMU_FDC_H*/ diff --git a/src/include/86box/fdc_ext.h b/src/include/86box/fdc_ext.h index c87786dc0..60d93efc6 100644 --- a/src/include/86box/fdc_ext.h +++ b/src/include/86box/fdc_ext.h @@ -20,12 +20,12 @@ * Copyright 2018-2020 Fred N. van Kempen. */ #ifndef EMU_FDC_EXT_H -# define EMU_FDC_EXT_H +#define EMU_FDC_EXT_H extern int fdc_type; /* Controller types. */ -#define FDC_INTERNAL 0 +#define FDC_INTERNAL 0 extern const device_t fdc_b215_device; extern const device_t fdc_pii151b_device; @@ -33,10 +33,10 @@ extern const device_t fdc_pii158b_device; extern void fdc_card_init(void); -extern char *fdc_card_get_internal_name(int card); -extern int fdc_card_get_from_internal_name(char *s); +extern char *fdc_card_get_internal_name(int card); +extern int fdc_card_get_from_internal_name(char *s); extern const device_t *fdc_card_getdevice(int card); -extern int fdc_card_has_config(int card); -extern int fdc_card_available(int card); +extern int fdc_card_has_config(int card); +extern int fdc_card_available(int card); -#endif /*EMU_FDC_H*/ +#endif /*EMU_FDC_H*/ diff --git a/src/include/86box/fdd.h b/src/include/86box/fdd.h index ea0102cbd..525c50d00 100644 --- a/src/include/86box/fdd.h +++ b/src/include/86box/fdd.h @@ -19,178 +19,171 @@ * Copyright 2018 Fred N. van Kempen. */ #ifndef EMU_FDD_H -# define EMU_FDD_H - - -#define FDD_NUM 4 -#define SEEK_RECALIBRATE -999 +#define EMU_FDD_H +#define FDD_NUM 4 +#define SEEK_RECALIBRATE -999 #ifdef __cplusplus extern "C" { #endif -extern int fdd_swap; +extern int fdd_swap; -extern void fdd_set_motor_enable(int drive, int motor_enable); -extern void fdd_do_seek(int drive, int track); -extern void fdd_forced_seek(int drive, int track_diff); -extern void fdd_seek(int drive, int track_diff); -extern int fdd_track0(int drive); -extern int fdd_getrpm(int drive); -extern void fdd_set_densel(int densel); -extern int fdd_can_read_medium(int drive); -extern int fdd_doublestep_40(int drive); -extern int fdd_is_525(int drive); -extern int fdd_is_dd(int drive); -extern int fdd_is_ed(int drive); -extern int fdd_is_double_sided(int drive); -extern void fdd_set_head(int drive, int head); -extern int fdd_get_head(int drive); -extern void fdd_set_turbo(int drive, int turbo); -extern int fdd_get_turbo(int drive); -extern void fdd_set_check_bpb(int drive, int check_bpb); -extern int fdd_get_check_bpb(int drive); +extern void fdd_set_motor_enable(int drive, int motor_enable); +extern void fdd_do_seek(int drive, int track); +extern void fdd_forced_seek(int drive, int track_diff); +extern void fdd_seek(int drive, int track_diff); +extern int fdd_track0(int drive); +extern int fdd_getrpm(int drive); +extern void fdd_set_densel(int densel); +extern int fdd_can_read_medium(int drive); +extern int fdd_doublestep_40(int drive); +extern int fdd_is_525(int drive); +extern int fdd_is_dd(int drive); +extern int fdd_is_ed(int drive); +extern int fdd_is_double_sided(int drive); +extern void fdd_set_head(int drive, int head); +extern int fdd_get_head(int drive); +extern void fdd_set_turbo(int drive, int turbo); +extern int fdd_get_turbo(int drive); +extern void fdd_set_check_bpb(int drive, int check_bpb); +extern int fdd_get_check_bpb(int drive); -extern void fdd_set_type(int drive, int type); -extern int fdd_get_type(int drive); +extern void fdd_set_type(int drive, int type); +extern int fdd_get_type(int drive); -extern int fdd_get_flags(int drive); -extern int fdd_get_densel(int drive); +extern int fdd_get_flags(int drive); +extern int fdd_get_densel(int drive); -extern char *fdd_getname(int type); +extern char *fdd_getname(int type); -extern char *fdd_get_internal_name(int type); -extern int fdd_get_from_internal_name(char *s); - -extern int fdd_current_track(int drive); +extern char *fdd_get_internal_name(int type); +extern int fdd_get_from_internal_name(char *s); +extern int fdd_current_track(int drive); typedef struct { - int id; + int id; - void (*seek)(int drive, int track); - void (*readsector)(int drive, int sector, int track, int side, - int density, int sector_size); - void (*writesector)(int drive, int sector, int track, int side, - int density, int sector_size); - void (*comparesector)(int drive, int sector, int track, int side, - int density, int sector_size); - void (*readaddress)(int drive, int side, int density); - void (*format)(int drive, int side, int density, uint8_t fill); - int (*hole)(int drive); - uint64_t (*byteperiod)(int drive); - void (*stop)(int drive); - void (*poll)(int drive); + void (*seek)(int drive, int track); + void (*readsector)(int drive, int sector, int track, int side, + int density, int sector_size); + void (*writesector)(int drive, int sector, int track, int side, + int density, int sector_size); + void (*comparesector)(int drive, int sector, int track, int side, + int density, int sector_size); + void (*readaddress)(int drive, int side, int density); + void (*format)(int drive, int side, int density, uint8_t fill); + int (*hole)(int drive); + uint64_t (*byteperiod)(int drive); + void (*stop)(int drive); + void (*poll)(int drive); } DRIVE; +extern DRIVE drives[FDD_NUM]; +extern char floppyfns[FDD_NUM][512]; +extern pc_timer_t fdd_poll_time[FDD_NUM]; +extern int ui_writeprot[FDD_NUM]; -extern DRIVE drives[FDD_NUM]; -extern char floppyfns[FDD_NUM][512]; -extern pc_timer_t fdd_poll_time[FDD_NUM]; -extern int ui_writeprot[FDD_NUM]; +extern int curdrive; -extern int curdrive; +extern int fdd_time; +extern int64_t floppytime; -extern int fdd_time; -extern int64_t floppytime; +extern void fdd_load(int drive, char *fn); +extern void fdd_new(int drive, char *fn); +extern void fdd_close(int drive); +extern void fdd_init(void); +extern void fdd_reset(void); +extern void fdd_seek(int drive, int track); +extern void fdd_readsector(int drive, int sector, int track, + int side, int density, int sector_size); +extern void fdd_writesector(int drive, int sector, int track, + int side, int density, int sector_size); +extern void fdd_comparesector(int drive, int sector, int track, + int side, int density, int sector_size); +extern void fdd_readaddress(int drive, int side, int density); +extern void fdd_format(int drive, int side, int density, uint8_t fill); +extern int fdd_hole(int drive); +extern void fdd_stop(int drive); +extern void fdd_do_writeback(int drive); +extern int motorspin; +extern uint64_t motoron[FDD_NUM]; -extern void fdd_load(int drive, char *fn); -extern void fdd_new(int drive, char *fn); -extern void fdd_close(int drive); -extern void fdd_init(void); -extern void fdd_reset(void); -extern void fdd_seek(int drive, int track); -extern void fdd_readsector(int drive, int sector, int track, - int side, int density, int sector_size); -extern void fdd_writesector(int drive, int sector, int track, - int side, int density, int sector_size); -extern void fdd_comparesector(int drive, int sector, int track, - int side, int density, int sector_size); -extern void fdd_readaddress(int drive, int side, int density); -extern void fdd_format(int drive, int side, int density, uint8_t fill); -extern int fdd_hole(int drive); -extern void fdd_stop(int drive); -extern void fdd_do_writeback(int drive); +extern int swwp; +extern int disable_write; -extern int motorspin; -extern uint64_t motoron[FDD_NUM]; +extern int defaultwriteprot; -extern int swwp; -extern int disable_write; - -extern int defaultwriteprot; - -extern int writeprot[FDD_NUM], fwriteprot[FDD_NUM]; -extern int fdd_changed[FDD_NUM]; -extern int drive_empty[FDD_NUM]; +extern int writeprot[FDD_NUM], fwriteprot[FDD_NUM]; +extern int fdd_changed[FDD_NUM]; +extern int drive_empty[FDD_NUM]; /*Used in the Read A Track command. Only valid for fdd_readsector(). */ #define SECTOR_FIRST -2 #define SECTOR_NEXT -1 typedef union { - uint16_t word; - uint8_t bytes[2]; + uint16_t word; + uint8_t bytes[2]; } crc_t; void fdd_calccrc(uint8_t byte, crc_t *crc_var); typedef struct { - uint16_t (*disk_flags)(int drive); - uint16_t (*side_flags)(int drive); - void (*writeback)(int drive); - void (*set_sector)(int drive, int side, uint8_t c, uint8_t h, - uint8_t r, uint8_t n); - uint8_t (*read_data)(int drive, int side, uint16_t pos); - void (*write_data)(int drive, int side, uint16_t pos, - uint8_t data); - int (*format_conditions)(int drive); - int32_t (*extra_bit_cells)(int drive, int side); - uint16_t* (*encoded_data)(int drive, int side); - void (*read_revolution)(int drive); - uint32_t (*index_hole_pos)(int drive, int side); - uint32_t (*get_raw_size)(int drive, int side); + uint16_t (*disk_flags)(int drive); + uint16_t (*side_flags)(int drive); + void (*writeback)(int drive); + void (*set_sector)(int drive, int side, uint8_t c, uint8_t h, + uint8_t r, uint8_t n); + uint8_t (*read_data)(int drive, int side, uint16_t pos); + void (*write_data)(int drive, int side, uint16_t pos, + uint8_t data); + int (*format_conditions)(int drive); + int32_t (*extra_bit_cells)(int drive, int side); + uint16_t *(*encoded_data)(int drive, int side); + void (*read_revolution)(int drive); + uint32_t (*index_hole_pos)(int drive, int side); + uint32_t (*get_raw_size)(int drive, int side); uint8_t check_crc; } d86f_handler_t; -extern const int gap3_sizes[5][8][48]; +extern const int gap3_sizes[5][8][48]; -extern const uint8_t dmf_r[21]; -extern const uint8_t xdf_physical_sectors[2][2]; -extern const uint8_t xdf_gap3_sizes[2][2]; -extern const uint16_t xdf_trackx_spos[2][8]; +extern const uint8_t dmf_r[21]; +extern const uint8_t xdf_physical_sectors[2][2]; +extern const uint8_t xdf_gap3_sizes[2][2]; +extern const uint16_t xdf_trackx_spos[2][8]; typedef struct { - uint8_t h; - uint8_t r; + uint8_t h; + uint8_t r; } xdf_id_t; typedef union { - uint16_t word; - xdf_id_t id; + uint16_t word; + xdf_id_t id; } xdf_sector_t; extern const xdf_sector_t xdf_img_layout[2][2][46]; extern const xdf_sector_t xdf_disk_layout[2][2][38]; - typedef struct { - uint8_t c; - uint8_t h; - uint8_t r; - uint8_t n; + uint8_t c; + uint8_t h; + uint8_t r; + uint8_t n; } sector_id_fields_t; typedef union { - uint32_t dword; - uint8_t byte_array[4]; + uint32_t dword; + uint8_t byte_array[4]; sector_id_fields_t id; } sector_id_t; - void d86f_set_fdc(void *fdc); void fdi_set_fdc(void *fdc); void fdd_set_fdc(void *fdc); @@ -198,10 +191,8 @@ void imd_set_fdc(void *fdc); void img_set_fdc(void *fdc); void mfm_set_fdc(void *fdc); - #ifdef __cplusplus } #endif - -#endif /*EMU_FDD_H*/ +#endif /*EMU_FDD_H*/ diff --git a/src/include/86box/fdd_86f.h b/src/include/86box/fdd_86f.h index da7e7b819..88eeb035f 100644 --- a/src/include/86box/fdd_86f.h +++ b/src/include/86box/fdd_86f.h @@ -17,94 +17,90 @@ * Copyright 2018,2019 Fred N. van Kempen. */ #ifndef EMU_FLOPPY_86F_H -# define EMU_FLOPPY_86F_H +#define EMU_FLOPPY_86F_H - -#define D86FVER 0x020C +#define D86FVER 0x020C /* Thesere were borrowed from TeleDisk. */ -#define SECTOR_DUPLICATED 0x01 -#define SECTOR_CRC_ERROR 0x02 -#define SECTOR_DELETED_DATA 0x04 -#define SECTOR_DATA_SKIPPED 0x10 -#define SECTOR_NO_DATA 0x20 -#define SECTOR_NO_ID 0x40 +#define SECTOR_DUPLICATED 0x01 +#define SECTOR_CRC_ERROR 0x02 +#define SECTOR_DELETED_DATA 0x04 +#define SECTOR_DATA_SKIPPED 0x10 +#define SECTOR_NO_DATA 0x20 +#define SECTOR_NO_ID 0x40 -#define length_gap0 80 -#define length_gap1 50 -#define length_sync 12 -#define length_am 4 -#define length_crc 2 +#define length_gap0 80 +#define length_gap1 50 +#define length_sync 12 +#define length_am 4 +#define length_crc 2 #define IBM #define MFM #ifdef IBM -#define pre_gap1 length_gap0 + length_sync + length_am +# define pre_gap1 length_gap0 + length_sync + length_am #else -#define pre_gap1 0 +# define pre_gap1 0 #endif -#define pre_track pre_gap1 + length_gap1 -#define pre_gap length_sync + length_am + 4 + length_crc -#define pre_data length_sync + length_am -#define post_gap length_crc +#define pre_track pre_gap1 + length_gap1 +#define pre_gap length_sync + length_am + 4 + length_crc +#define pre_data length_sync + length_am +#define post_gap length_crc +extern d86f_handler_t d86f_handler[FDD_NUM]; -extern d86f_handler_t d86f_handler[FDD_NUM]; +extern void d86f_init(void); +extern void d86f_load(int drive, char *fn); +extern void d86f_close(int drive); +extern void d86f_seek(int drive, int track); +extern int d86f_hole(int drive); +extern uint64_t d86f_byteperiod(int drive); +extern void d86f_stop(int drive); +extern void d86f_poll(int drive); +extern int d86f_realtrack(int track, int drive); +extern void d86f_reset(int drive, int side); +extern void d86f_readsector(int drive, int sector, int track, int side, int density, int sector_size); +extern void d86f_writesector(int drive, int sector, int track, int side, int density, int sector_size); +extern void d86f_comparesector(int drive, int sector, int track, int side, int rate, int sector_size); +extern void d86f_readaddress(int drive, int side, int density); +extern void d86f_format(int drive, int side, int density, uint8_t fill); +extern void d86f_prepare_track_layout(int drive, int side); +extern void d86f_set_version(int drive, uint16_t version); +extern uint16_t d86f_side_flags(int drive); +extern uint16_t d86f_track_flags(int drive); +extern void d86f_initialize_last_sector_id(int drive, int c, int h, int r, int n); +extern void d86f_initialize_linked_lists(int drive); +extern void d86f_destroy_linked_lists(int drive, int side); -extern void d86f_init(void); -extern void d86f_load(int drive, char *fn); -extern void d86f_close(int drive); -extern void d86f_seek(int drive, int track); -extern int d86f_hole(int drive); -extern uint64_t d86f_byteperiod(int drive); -extern void d86f_stop(int drive); -extern void d86f_poll(int drive); -extern int d86f_realtrack(int track, int drive); -extern void d86f_reset(int drive, int side); -extern void d86f_readsector(int drive, int sector, int track, int side, int density, int sector_size); -extern void d86f_writesector(int drive, int sector, int track, int side, int density, int sector_size); -extern void d86f_comparesector(int drive, int sector, int track, int side, int rate, int sector_size); -extern void d86f_readaddress(int drive, int side, int density); -extern void d86f_format(int drive, int side, int density, uint8_t fill); +extern uint16_t d86f_prepare_sector(int drive, int side, int prev_pos, uint8_t *id_buf, uint8_t *data_buf, + int data_len, int gap2, int gap3, int flags); +extern void d86f_setup(int drive); +extern void d86f_destroy(int drive); +extern int d86f_export(int drive, char *fn); +extern void d86f_unregister(int drive); +extern void d86f_common_handlers(int drive); +extern void d86f_set_version(int drive, uint16_t version); +extern int d86f_is_40_track(int drive); +extern void d86f_reset_index_hole_pos(int drive, int side); +extern uint16_t d86f_prepare_pretrack(int drive, int side, int iso); +extern void d86f_set_track_pos(int drive, uint32_t track_pos); +extern void d86f_set_cur_track(int drive, int track); +extern void d86f_zero_track(int drive); +extern void d86f_initialize_last_sector_id(int drive, int c, int h, int r, int n); +extern void d86f_initialize_linked_lists(int drive); +extern void d86f_destroy_linked_lists(int drive, int side); -extern void d86f_prepare_track_layout(int drive, int side); -extern void d86f_set_version(int drive, uint16_t version); -extern uint16_t d86f_side_flags(int drive); -extern uint16_t d86f_track_flags(int drive); -extern void d86f_initialize_last_sector_id(int drive, int c, int h, int r, int n); -extern void d86f_initialize_linked_lists(int drive); -extern void d86f_destroy_linked_lists(int drive, int side); +extern uint16_t *common_encoded_data(int drive, int side); +extern void common_read_revolution(int drive); +extern uint32_t common_get_raw_size(int drive, int side); -extern uint16_t d86f_prepare_sector(int drive, int side, int prev_pos, uint8_t *id_buf, uint8_t *data_buf, - int data_len, int gap2, int gap3, int flags); -extern void d86f_setup(int drive); -extern void d86f_destroy(int drive); -extern int d86f_export(int drive, char *fn); -extern void d86f_unregister(int drive); -extern void d86f_common_handlers(int drive); -extern void d86f_set_version(int drive, uint16_t version); -extern int d86f_is_40_track(int drive); -extern void d86f_reset_index_hole_pos(int drive, int side); -extern uint16_t d86f_prepare_pretrack(int drive, int side, int iso); -extern void d86f_set_track_pos(int drive, uint32_t track_pos); -extern void d86f_set_cur_track(int drive, int track); -extern void d86f_zero_track(int drive); -extern void d86f_initialize_last_sector_id(int drive, int c, int h, int r, int n); -extern void d86f_initialize_linked_lists(int drive); -extern void d86f_destroy_linked_lists(int drive, int side); +extern void null_writeback(int drive); +extern void null_write_data(int drive, int side, uint16_t pos, uint8_t data); +extern int null_format_conditions(int drive); +extern int32_t null_extra_bit_cells(int drive, int side); +extern void null_set_sector(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n); +extern uint32_t null_index_hole_pos(int drive, int side); -extern uint16_t *common_encoded_data(int drive, int side); -extern void common_read_revolution(int drive); -extern uint32_t common_get_raw_size(int drive, int side); - -extern void null_writeback(int drive); -extern void null_write_data(int drive, int side, uint16_t pos, uint8_t data); -extern int null_format_conditions(int drive); -extern int32_t null_extra_bit_cells(int drive, int side); -extern void null_set_sector(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n); -extern uint32_t null_index_hole_pos(int drive, int side); - - -#endif /*EMU_FLOPPY_86F_H*/ +#endif /*EMU_FLOPPY_86F_H*/ diff --git a/src/include/86box/fdd_common.h b/src/include/86box/fdd_common.h index e904aaaa6..9c6f8853c 100644 --- a/src/include/86box/fdd_common.h +++ b/src/include/86box/fdd_common.h @@ -15,21 +15,18 @@ * Copyright 2017,2018 Fred N. van Kempen. */ #ifndef FDD_COMMON_H -# define FDD_COMMON_H +#define FDD_COMMON_H +extern const uint8_t fdd_holes[6]; +extern const uint8_t fdd_rates[6]; +extern const double fdd_bit_rates_300[6]; +extern const uint8_t fdd_max_sectors[8][6]; +extern const uint8_t fdd_dmf_r[21]; -extern const uint8_t fdd_holes[6]; -extern const uint8_t fdd_rates[6]; -extern const double fdd_bit_rates_300[6]; -extern const uint8_t fdd_max_sectors[8][6]; -extern const uint8_t fdd_dmf_r[21]; +extern int fdd_get_gap3_size(int rate, int size, int sector); +extern uint8_t fdd_sector_size_code(int size); +extern int fdd_sector_code_size(uint8_t code); +extern int fdd_bps_valid(uint16_t bps); +extern int fdd_interleave(int sector, int skew, int spt); - -extern int fdd_get_gap3_size(int rate, int size, int sector); -extern uint8_t fdd_sector_size_code(int size); -extern int fdd_sector_code_size(uint8_t code); -extern int fdd_bps_valid(uint16_t bps); -extern int fdd_interleave(int sector, int skew, int spt); - - -#endif /*FDD_COMMON_H*/ +#endif /*FDD_COMMON_H*/ diff --git a/src/include/86box/fdd_fdi.h b/src/include/86box/fdd_fdi.h index e6d75c664..b984a8154 100644 --- a/src/include/86box/fdd_fdi.h +++ b/src/include/86box/fdd_fdi.h @@ -20,12 +20,10 @@ * Copyright 2018 Fred N. van Kempen. */ #ifndef EMU_FLOPPY_FDI_H -# define EMU_FLOPPY_FDI_H +#define EMU_FLOPPY_FDI_H +extern void fdi_seek(int drive, int track); +extern void fdi_load(int drive, char *fn); +extern void fdi_close(int drive); -extern void fdi_seek(int drive, int track); -extern void fdi_load(int drive, char *fn); -extern void fdi_close(int drive); - - -#endif /*EMU_FLOPPY_FDI_H*/ +#endif /*EMU_FLOPPY_FDI_H*/ diff --git a/src/include/86box/fdd_imd.h b/src/include/86box/fdd_imd.h index 3c20025d2..806304093 100644 --- a/src/include/86box/fdd_imd.h +++ b/src/include/86box/fdd_imd.h @@ -35,12 +35,10 @@ * USA. */ #ifndef EMU_FLOPPY_IMD_H -# define EMU_FLOPPY_IMD_H - +#define EMU_FLOPPY_IMD_H extern void imd_init(void); extern void imd_load(int drive, char *fn); extern void imd_close(int drive); - -#endif /*EMU_FLOPPY_IMD_H*/ +#endif /*EMU_FLOPPY_IMD_H*/ diff --git a/src/include/86box/fdd_img.h b/src/include/86box/fdd_img.h index bb39fed09..7c36929c3 100644 --- a/src/include/86box/fdd_img.h +++ b/src/include/86box/fdd_img.h @@ -20,12 +20,10 @@ * Copyright 2018 Fred N. van Kempen. */ #ifndef EMU_FLOPPY_IMG_H -# define EMU_FLOPPY_IMG_H +#define EMU_FLOPPY_IMG_H +extern void img_init(void); +extern void img_load(int drive, char *fn); +extern void img_close(int drive); -extern void img_init(void); -extern void img_load(int drive, char *fn); -extern void img_close(int drive); - - -#endif /*EMU_FLOPPY_IMG_H*/ +#endif /*EMU_FLOPPY_IMG_H*/ diff --git a/src/include/86box/fdd_json.h b/src/include/86box/fdd_json.h index 4a62c089b..8924ca96a 100644 --- a/src/include/86box/fdd_json.h +++ b/src/include/86box/fdd_json.h @@ -45,12 +45,10 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef EMU_FLOPPY_JSON_H -# define EMU_FLOPPY_JSON_H +#define EMU_FLOPPY_JSON_H +extern void json_init(void); +extern void json_load(int drive, char *fn); +extern void json_close(int drive); -extern void json_init(void); -extern void json_load(int drive, char *fn); -extern void json_close(int drive); - - -#endif /*EMU_FLOPPY_JSON_H*/ +#endif /*EMU_FLOPPY_JSON_H*/ diff --git a/src/include/86box/fdd_mfm.h b/src/include/86box/fdd_mfm.h index 5fd664b05..36c6e6b8f 100644 --- a/src/include/86box/fdd_mfm.h +++ b/src/include/86box/fdd_mfm.h @@ -15,12 +15,10 @@ * Copyright 2018 Miran Grca. */ #ifndef EMU_FLOPPY_MFM_H -# define EMU_FLOPPY_MFM_H +#define EMU_FLOPPY_MFM_H +extern void mfm_seek(int drive, int track); +extern void mfm_load(int drive, char *fn); +extern void mfm_close(int drive); -extern void mfm_seek(int drive, int track); -extern void mfm_load(int drive, char *fn); -extern void mfm_close(int drive); - - -#endif /*EMU_FLOPPY_MFM_H*/ +#endif /*EMU_FLOPPY_MFM_H*/ diff --git a/src/include/86box/fdd_td0.h b/src/include/86box/fdd_td0.h index 6dd79a8ce..56ff8f3c8 100644 --- a/src/include/86box/fdd_td0.h +++ b/src/include/86box/fdd_td0.h @@ -17,12 +17,10 @@ * Copyright 2017,2018 Fred N. van Kempen. */ #ifndef EMU_FLOPPY_TD0_H -# define EMU_FLOPPY_TD0_H - +#define EMU_FLOPPY_TD0_H extern void td0_init(void); extern void td0_load(int drive, char *fn); extern void td0_close(int drive); - -#endif /*EMU_FLOPPY_TD0_H*/ +#endif /*EMU_FLOPPY_TD0_H*/ diff --git a/src/include/86box/fifo8.h b/src/include/86box/fifo8.h index d1c32fdd7..811f0522f 100644 --- a/src/include/86box/fifo8.h +++ b/src/include/86box/fifo8.h @@ -1,7 +1,6 @@ #ifndef EMU_FIFO8_H #define EMU_FIFO8_H - typedef struct { /* All fields are private */ uint8_t *data; @@ -26,7 +25,7 @@ extern void fifo8_create(Fifo8 *fifo, uint32_t capacity); * @fifo: FIFO to cleanup * * Cleanup a FIFO created with fifo8_create(). Frees memory created for FIFO - *storage. The FIFO is no longer usable after this has been called. + *storage. The FIFO is no longer usable after this has been called. */ extern void fifo8_destroy(Fifo8 *fifo); diff --git a/src/include/86box/filters.h b/src/include/86box/filters.h index 65885d4d7..f93695433 100644 --- a/src/include/86box/filters.h +++ b/src/include/86box/filters.h @@ -1,135 +1,143 @@ #ifndef EMU_FILTERS_H -# define EMU_FILTERS_H +#define EMU_FILTERS_H #define NCoef 2 /* fc=150Hz */ -static inline float adgold_highpass_iir(int i, float NewSample) { - float ACoef[NCoef+1] = { +static inline float +adgold_highpass_iir(int i, float NewSample) +{ + float ACoef[NCoef + 1] = { 0.98657437157334349000, -1.97314874314668700000, 0.98657437157334349000 }; - float BCoef[NCoef+1] = { + float BCoef[NCoef + 1] = { 1.00000000000000000000, -1.97223372919758360000, 0.97261396931534050000 }; - static float y[2][NCoef+1]; /* output samples */ - static float x[2][NCoef+1]; /* input samples */ - int n; + static float y[2][NCoef + 1]; /* output samples */ + static float x[2][NCoef + 1]; /* input samples */ + int n; /* shift the old samples */ - for(n=NCoef; n>0; n--) { - x[i][n] = x[i][n-1]; - y[i][n] = y[i][n-1]; + for (n = NCoef; n > 0; n--) { + x[i][n] = x[i][n - 1]; + y[i][n] = y[i][n - 1]; } /* Calculate the new output */ x[i][0] = NewSample; y[i][0] = ACoef[0] * x[i][0]; - for(n=1; n<=NCoef; n++) + for (n = 1; n <= NCoef; n++) y[i][0] += ACoef[n] * x[i][n] - BCoef[n] * y[i][n]; return y[i][0]; } /* fc=150Hz */ -static inline float adgold_lowpass_iir(int i, float NewSample) { - float ACoef[NCoef+1] = { +static inline float +adgold_lowpass_iir(int i, float NewSample) +{ + float ACoef[NCoef + 1] = { 0.00009159473951071446, 0.00018318947902142891, 0.00009159473951071446 }; - float BCoef[NCoef+1] = { + float BCoef[NCoef + 1] = { 1.00000000000000000000, -1.97223372919526560000, 0.97261396931306277000 }; - static float y[2][NCoef+1]; /* output samples */ - static float x[2][NCoef+1]; /* input samples */ - int n; + static float y[2][NCoef + 1]; /* output samples */ + static float x[2][NCoef + 1]; /* input samples */ + int n; /* shift the old samples */ - for(n=NCoef; n>0; n--) { - x[i][n] = x[i][n-1]; - y[i][n] = y[i][n-1]; + for (n = NCoef; n > 0; n--) { + x[i][n] = x[i][n - 1]; + y[i][n] = y[i][n - 1]; } /* Calculate the new output */ x[i][0] = NewSample; y[i][0] = ACoef[0] * x[i][0]; - for(n=1; n<=NCoef; n++) + for (n = 1; n <= NCoef; n++) y[i][0] += ACoef[n] * x[i][n] - BCoef[n] * y[i][n]; return y[i][0]; } /* fc=56Hz */ -static inline float adgold_pseudo_stereo_iir(float NewSample) { - float ACoef[NCoef+1] = { +static inline float +adgold_pseudo_stereo_iir(float NewSample) +{ + float ACoef[NCoef + 1] = { 0.00001409030866231767, 0.00002818061732463533, 0.00001409030866231767 }; - float BCoef[NCoef+1] = { + float BCoef[NCoef + 1] = { 1.00000000000000000000, -1.98733021473466760000, 0.98738361004063568000 }; - static float y[NCoef+1]; /* output samples */ - static float x[NCoef+1]; /* input samples */ - int n; + static float y[NCoef + 1]; /* output samples */ + static float x[NCoef + 1]; /* input samples */ + int n; /* shift the old samples */ - for(n=NCoef; n>0; n--) { - x[n] = x[n-1]; - y[n] = y[n-1]; + for (n = NCoef; n > 0; n--) { + x[n] = x[n - 1]; + y[n] = y[n - 1]; } /* Calculate the new output */ x[0] = NewSample; y[0] = ACoef[0] * x[0]; - for(n=1; n<=NCoef; n++) + for (n = 1; n <= NCoef; n++) y[0] += ACoef[n] * x[n] - BCoef[n] * y[n]; return y[0]; } /* fc=3.2kHz - probably incorrect */ -static inline float dss_iir(float NewSample) { - float ACoef[NCoef+1] = { +static inline float +dss_iir(float NewSample) +{ + float ACoef[NCoef + 1] = { 0.03356837051492005100, 0.06713674102984010200, 0.03356837051492005100 }; - float BCoef[NCoef+1] = { + float BCoef[NCoef + 1] = { 1.00000000000000000000, -1.41898265221812010000, 0.55326988968868285000 }; - static float y[NCoef+1]; /* output samples */ - static float x[NCoef+1]; /* input samples */ - int n; + static float y[NCoef + 1]; /* output samples */ + static float x[NCoef + 1]; /* input samples */ + int n; /* shift the old samples */ - for(n=NCoef; n>0; n--) { - x[n] = x[n-1]; - y[n] = y[n-1]; + for (n = NCoef; n > 0; n--) { + x[n] = x[n - 1]; + y[n] = y[n - 1]; } /* Calculate the new output */ x[0] = NewSample; y[0] = ACoef[0] * x[0]; - for(n=1; n<=NCoef; n++) + for (n = 1; n <= NCoef; n++) y[0] += ACoef[n] * x[n] - BCoef[n] * y[n]; return y[0]; @@ -138,197 +146,208 @@ static inline float dss_iir(float NewSample) { #undef NCoef #define NCoef 1 /*Basic high pass to remove DC bias. fc=10Hz*/ -static inline float dac_iir(int i, float NewSample) { - float ACoef[NCoef+1] = { +static inline float +dac_iir(int i, float NewSample) +{ + float ACoef[NCoef + 1] = { 0.99901119820285345000, -0.99901119820285345000 }; - float BCoef[NCoef+1] = { + float BCoef[NCoef + 1] = { 1.00000000000000000000, -0.99869185905052738000 }; - static float y[2][NCoef+1]; /* output samples */ - static float x[2][NCoef+1]; /* input samples */ - int n; + static float y[2][NCoef + 1]; /* output samples */ + static float x[2][NCoef + 1]; /* input samples */ + int n; /* shift the old samples */ - for(n=NCoef; n>0; n--) { - x[i][n] = x[i][n-1]; - y[i][n] = y[i][n-1]; + for (n = NCoef; n > 0; n--) { + x[i][n] = x[i][n - 1]; + y[i][n] = y[i][n - 1]; } /* Calculate the new output */ x[i][0] = NewSample; y[i][0] = ACoef[0] * x[i][0]; - for(n=1; n<=NCoef; n++) + for (n = 1; n <= NCoef; n++) y[i][0] += ACoef[n] * x[i][n] - BCoef[n] * y[i][n]; return y[i][0]; } - #undef NCoef #define NCoef 2 /* fc=350Hz */ -static inline double low_iir(int c, int i, double NewSample) { - double ACoef[NCoef+1] = { +static inline double +low_iir(int c, int i, double NewSample) +{ + double ACoef[NCoef + 1] = { 0.00049713569693400649, 0.00099427139386801299, 0.00049713569693400649 }; - double BCoef[NCoef+1] = { + double BCoef[NCoef + 1] = { 1.00000000000000000000, -1.93522955470669530000, 0.93726236021404663000 }; - static double y[2][2][NCoef+1]; /* output samples */ - static double x[2][2][NCoef+1]; /* input samples */ - int n; + static double y[2][2][NCoef + 1]; /* output samples */ + static double x[2][2][NCoef + 1]; /* input samples */ + int n; /* shift the old samples */ - for(n=NCoef; n>0; n--) { - x[c][i][n] = x[c][i][n-1]; - y[c][i][n] = y[c][i][n-1]; + for (n = NCoef; n > 0; n--) { + x[c][i][n] = x[c][i][n - 1]; + y[c][i][n] = y[c][i][n - 1]; } /* Calculate the new output */ x[c][i][0] = NewSample; y[c][i][0] = ACoef[0] * x[c][i][0]; - for(n=1; n<=NCoef; n++) + for (n = 1; n <= NCoef; n++) y[c][i][0] += ACoef[n] * x[c][i][n] - BCoef[n] * y[c][i][n]; return y[c][i][0]; } /* fc=350Hz */ -static inline double low_cut_iir(int c, int i, double NewSample) { - double ACoef[NCoef+1] = { +static inline double +low_cut_iir(int c, int i, double NewSample) +{ + double ACoef[NCoef + 1] = { 0.96839970114733542000, -1.93679940229467080000, 0.96839970114733542000 }; - double BCoef[NCoef+1] = { + double BCoef[NCoef + 1] = { 1.00000000000000000000, -1.93522955471202770000, 0.93726236021916731000 }; - static double y[2][2][NCoef+1]; /* output samples */ - static double x[2][2][NCoef+1]; /* input samples */ - int n; + static double y[2][2][NCoef + 1]; /* output samples */ + static double x[2][2][NCoef + 1]; /* input samples */ + int n; /* shift the old samples */ - for(n=NCoef; n>0; n--) { - x[c][i][n] = x[c][i][n-1]; - y[c][i][n] = y[c][i][n-1]; + for (n = NCoef; n > 0; n--) { + x[c][i][n] = x[c][i][n - 1]; + y[c][i][n] = y[c][i][n - 1]; } /* Calculate the new output */ x[c][i][0] = NewSample; y[c][i][0] = ACoef[0] * x[c][i][0]; - for(n=1; n<=NCoef; n++) + for (n = 1; n <= NCoef; n++) y[c][i][0] += ACoef[n] * x[c][i][n] - BCoef[n] * y[c][i][n]; return y[c][i][0]; } /* fc=3.5kHz */ -static inline double high_iir(int c, int i, double NewSample) { - double ACoef[NCoef+1] = { +static inline double +high_iir(int c, int i, double NewSample) +{ + double ACoef[NCoef + 1] = { 0.72248704753064896000, -1.44497409506129790000, 0.72248704753064896000 }; - double BCoef[NCoef+1] = { + double BCoef[NCoef + 1] = { 1.00000000000000000000, -1.36640781670578510000, 0.52352474706139873000 }; - static double y[2][2][NCoef+1]; /* output samples */ - static double x[2][2][NCoef+1]; /* input samples */ - int n; + static double y[2][2][NCoef + 1]; /* output samples */ + static double x[2][2][NCoef + 1]; /* input samples */ + int n; /* shift the old samples */ - for(n=NCoef; n>0; n--) { - x[c][i][n] = x[c][i][n-1]; - y[c][i][n] = y[c][i][n-1]; + for (n = NCoef; n > 0; n--) { + x[c][i][n] = x[c][i][n - 1]; + y[c][i][n] = y[c][i][n - 1]; } /* Calculate the new output */ x[c][i][0] = NewSample; y[c][i][0] = ACoef[0] * x[c][i][0]; - for(n=1; n<=NCoef; n++) + for (n = 1; n <= NCoef; n++) y[c][i][0] += ACoef[n] * x[c][i][n] - BCoef[n] * y[c][i][n]; return y[c][i][0]; } /* fc=3.5kHz */ -static inline double high_cut_iir(int c, int i, double NewSample) { - double ACoef[NCoef+1] = { +static inline double +high_cut_iir(int c, int i, double NewSample) +{ + double ACoef[NCoef + 1] = { 0.03927726802250377400, 0.07855453604500754700, 0.03927726802250377400 }; - double BCoef[NCoef+1] = { + double BCoef[NCoef + 1] = { 1.00000000000000000000, -1.36640781666419950000, 0.52352474703279628000 }; - static double y[2][2][NCoef+1]; /* output samples */ - static double x[2][2][NCoef+1]; /* input samples */ - int n; + static double y[2][2][NCoef + 1]; /* output samples */ + static double x[2][2][NCoef + 1]; /* input samples */ + int n; /* shift the old samples */ - for(n=NCoef; n>0; n--) { - x[c][i][n] = x[c][i][n-1]; - y[c][i][n] = y[c][i][n-1]; + for (n = NCoef; n > 0; n--) { + x[c][i][n] = x[c][i][n - 1]; + y[c][i][n] = y[c][i][n - 1]; } /* Calculate the new output */ x[c][i][0] = NewSample; y[c][i][0] = ACoef[0] * x[c][i][0]; - for(n=1; n<=NCoef; n++) + for (n = 1; n <= NCoef; n++) y[c][i][0] += ACoef[n] * x[c][i][n] - BCoef[n] * y[c][i][n]; return y[c][i][0]; } /* fc=5.283kHz, gain=-9.477dB, width=0.4845 */ -static inline double deemph_iir(int i, double NewSample) { - double ACoef[NCoef+1] = { +static inline double +deemph_iir(int i, double NewSample) +{ + double ACoef[NCoef + 1] = { 0.46035077886318842566, -0.28440821191249848754, 0.03388877229118691936 }; - double BCoef[NCoef+1] = { + double BCoef[NCoef + 1] = { 1.00000000000000000000, -1.05429146278569141337, 0.26412280202756849290 }; - static double y[2][NCoef+1]; /* output samples */ - static double x[2][NCoef+1]; /* input samples */ - int n; + static double y[2][NCoef + 1]; /* output samples */ + static double x[2][NCoef + 1]; /* input samples */ + int n; /* shift the old samples */ - for(n=NCoef; n>0; n--) { - x[i][n] = x[i][n-1]; - y[i][n] = y[i][n-1]; + for (n = NCoef; n > 0; n--) { + x[i][n] = x[i][n - 1]; + y[i][n] = y[i][n - 1]; } /* Calculate the new output */ x[i][0] = NewSample; y[i][0] = ACoef[0] * x[i][0]; - for(n=1; n<=NCoef; n++) + for (n = 1; n <= NCoef; n++) y[i][0] += ACoef[n] * x[i][n] - BCoef[n] * y[i][n]; return y[i][0]; @@ -338,69 +357,69 @@ static inline double deemph_iir(int i, double NewSample) { #define NCoef 2 /* fc=3.2kHz */ -static inline double sb_iir(int c, int i, double NewSample) { - double ACoef[NCoef+1] = { +static inline double +sb_iir(int c, int i, double NewSample) +{ + double ACoef[NCoef + 1] = { 0.03356837051492005100, 0.06713674102984010200, 0.03356837051492005100 }; - double BCoef[NCoef+1] = { + double BCoef[NCoef + 1] = { 1.00000000000000000000, -1.41898265221812010000, 0.55326988968868285000 }; - static double y[2][2][NCoef+1]; /* output samples */ - static double x[2][2][NCoef+1]; /* input samples */ - int n; + static double y[2][2][NCoef + 1]; /* output samples */ + static double x[2][2][NCoef + 1]; /* input samples */ + int n; /* shift the old samples */ - for(n=NCoef; n>0; n--) { - x[c][i][n] = x[c][i][n-1]; - y[c][i][n] = y[c][i][n-1]; + for (n = NCoef; n > 0; n--) { + x[c][i][n] = x[c][i][n - 1]; + y[c][i][n] = y[c][i][n - 1]; } /* Calculate the new output */ x[c][i][0] = NewSample; y[c][i][0] = ACoef[0] * x[c][i][0]; - for(n=1; n<=NCoef; n++) + for (n = 1; n <= NCoef; n++) y[c][i][0] += ACoef[n] * x[c][i][n] - BCoef[n] * y[c][i][n]; return y[c][i][0]; } - - #undef NCoef -#define NCoef 1 +#define NCoef 1 #define SB16_NCoef 51 extern double low_fir_sb16_coef[2][SB16_NCoef]; -static inline double low_fir_sb16(int c, int i, double NewSample) +static inline double +low_fir_sb16(int c, int i, double NewSample) { - static double x[2][2][SB16_NCoef+1]; //input samples - static int pos[2] = { 0, 0 }; - double out = 0.0; - int n; + static double x[2][2][SB16_NCoef + 1]; // input samples + static int pos[2] = { 0, 0 }; + double out = 0.0; + int n; - /* Calculate the new output */ - x[c][i][pos[c]] = NewSample; + /* Calculate the new output */ + x[c][i][pos[c]] = NewSample; - for (n = 0; n < ((SB16_NCoef+1)-pos[c]) && n < SB16_NCoef; n++) - out += low_fir_sb16_coef[c][n] * x[c][i][n+pos[c]]; - for (; n < SB16_NCoef; n++) - out += low_fir_sb16_coef[c][n] * x[c][i][(n+pos[c]) - (SB16_NCoef+1)]; + for (n = 0; n < ((SB16_NCoef + 1) - pos[c]) && n < SB16_NCoef; n++) + out += low_fir_sb16_coef[c][n] * x[c][i][n + pos[c]]; + for (; n < SB16_NCoef; n++) + out += low_fir_sb16_coef[c][n] * x[c][i][(n + pos[c]) - (SB16_NCoef + 1)]; - if (i == 1) - { - pos[c]++; - if (pos[c] > SB16_NCoef) - pos[c] = 0; - } + if (i == 1) { + pos[c]++; + if (pos[c] > SB16_NCoef) + pos[c] = 0; + } - return out; + return out; } #endif /*EMU_FILTERS_H*/ diff --git a/src/include/86box/flash.h b/src/include/86box/flash.h index 531cc7037..bc672c777 100644 --- a/src/include/86box/flash.h +++ b/src/include/86box/flash.h @@ -15,7 +15,7 @@ */ #ifndef EMU_FLASH_H -# define EMU_FLASH_H +#define EMU_FLASH_H extern const device_t catalyst_flash_device; diff --git a/src/include/86box/gameport.h b/src/include/86box/gameport.h index 65fdee996..07a51edc4 100644 --- a/src/include/86box/gameport.h +++ b/src/include/86box/gameport.h @@ -19,142 +19,138 @@ * Copyright 2021 RichardG. */ #ifndef EMU_GAMEPORT_H -# define EMU_GAMEPORT_H +#define EMU_GAMEPORT_H +#define MAX_PLAT_JOYSTICKS 8 +#define MAX_JOYSTICKS 4 -#define MAX_PLAT_JOYSTICKS 8 -#define MAX_JOYSTICKS 4 +#define POV_X 0x80000000 +#define POV_Y 0x40000000 +#define SLIDER 0x20000000 -#define POV_X 0x80000000 -#define POV_Y 0x40000000 -#define SLIDER 0x20000000 +#define AXIS_NOT_PRESENT -99999 -#define AXIS_NOT_PRESENT -99999 +#define JOYSTICK_PRESENT(n) (joystick_state[n].plat_joystick_nr != 0) -#define JOYSTICK_PRESENT(n) (joystick_state[n].plat_joystick_nr != 0) - -#define GAMEPORT_SIO 0x1000000 +#define GAMEPORT_SIO 0x1000000 typedef struct { - char name[260]; + char name[260]; - int a[8]; - int b[32]; - int p[4]; - int s[2]; + int a[8]; + int b[32]; + int p[4]; + int s[2]; struct { - char name[260]; - int id; - } axis[8]; + char name[260]; + int id; + } axis[8]; struct { - char name[260]; - int id; - } button[32]; + char name[260]; + int id; + } button[32]; struct { - char name[260]; - int id; - } pov[4]; + char name[260]; + int id; + } pov[4]; - struct + struct { - char name[260]; - int id; - } slider[2]; + char name[260]; + int id; + } slider[2]; - int nr_axes; - int nr_buttons; - int nr_povs; - int nr_sliders; + int nr_axes; + int nr_buttons; + int nr_povs; + int nr_sliders; } plat_joystick_t; typedef struct { - int axis[8]; - int button[32]; - int pov[4]; + int axis[8]; + int button[32]; + int pov[4]; - int plat_joystick_nr; - int axis_mapping[8]; - int button_mapping[32]; - int pov_mapping[4][2]; + int plat_joystick_nr; + int axis_mapping[8]; + int button_mapping[32]; + int pov_mapping[4][2]; } joystick_t; typedef struct { const char *name; const char *internal_name; - void *(*init)(void); - void (*close)(void *p); - uint8_t (*read)(void *p); - void (*write)(void *p); - int (*read_axis)(void *p, int axis); - void (*a0_over)(void *p); + void *(*init)(void); + void (*close)(void *p); + uint8_t (*read)(void *p); + void (*write)(void *p); + int (*read_axis)(void *p, int axis); + void (*a0_over)(void *p); - int axis_count, - button_count, - pov_count; - int max_joysticks; - const char *axis_names[8]; - const char *button_names[32]; - const char *pov_names[4]; + int axis_count, + button_count, + pov_count; + int max_joysticks; + const char *axis_names[8]; + const char *button_names[32]; + const char *pov_names[4]; } joystick_if_t; - #ifdef __cplusplus extern "C" { #endif #ifdef EMU_DEVICE_H -extern const device_t gameport_device; -extern const device_t gameport_201_device; -extern const device_t gameport_203_device; -extern const device_t gameport_205_device; -extern const device_t gameport_207_device; -extern const device_t gameport_208_device; -extern const device_t gameport_209_device; -extern const device_t gameport_20b_device; -extern const device_t gameport_20d_device; -extern const device_t gameport_20f_device; -extern const device_t gameport_tm_acm_device; -extern const device_t gameport_pnp_device; -extern const device_t gameport_pnp_6io_device; -extern const device_t gameport_sio_device; -extern const device_t gameport_sio_1io_device; +extern const device_t gameport_device; +extern const device_t gameport_201_device; +extern const device_t gameport_203_device; +extern const device_t gameport_205_device; +extern const device_t gameport_207_device; +extern const device_t gameport_208_device; +extern const device_t gameport_209_device; +extern const device_t gameport_20b_device; +extern const device_t gameport_20d_device; +extern const device_t gameport_20f_device; +extern const device_t gameport_tm_acm_device; +extern const device_t gameport_pnp_device; +extern const device_t gameport_pnp_6io_device; +extern const device_t gameport_sio_device; +extern const device_t gameport_sio_1io_device; -extern const device_t *standalone_gameport_type; +extern const device_t *standalone_gameport_type; #endif -extern int gameport_instance_id; -extern plat_joystick_t plat_joystick_state[MAX_PLAT_JOYSTICKS]; -extern joystick_t joystick_state[MAX_JOYSTICKS]; -extern int joysticks_present; +extern int gameport_instance_id; +extern plat_joystick_t plat_joystick_state[MAX_PLAT_JOYSTICKS]; +extern joystick_t joystick_state[MAX_JOYSTICKS]; +extern int joysticks_present; -extern int joystick_type; +extern int joystick_type; +extern void joystick_init(void); +extern void joystick_close(void); +extern void joystick_process(void); -extern void joystick_init(void); -extern void joystick_close(void); -extern void joystick_process(void); +extern char *joystick_get_name(int js); +extern char *joystick_get_internal_name(int js); +extern int joystick_get_from_internal_name(char *s); +extern int joystick_get_max_joysticks(int js); +extern int joystick_get_axis_count(int js); +extern int joystick_get_button_count(int js); +extern int joystick_get_pov_count(int js); +extern char *joystick_get_axis_name(int js, int id); +extern char *joystick_get_button_name(int js, int id); +extern char *joystick_get_pov_name(int js, int id); -extern char *joystick_get_name(int js); -extern char *joystick_get_internal_name(int js); -extern int joystick_get_from_internal_name(char *s); -extern int joystick_get_max_joysticks(int js); -extern int joystick_get_axis_count(int js); -extern int joystick_get_button_count(int js); -extern int joystick_get_pov_count(int js); -extern char *joystick_get_axis_name(int js, int id); -extern char *joystick_get_button_name(int js, int id); -extern char *joystick_get_pov_name(int js, int id); - -extern void gameport_update_joystick_type(void); -extern void gameport_remap(void *priv, uint16_t address); -extern void *gameport_add(const device_t *gameport_type); +extern void gameport_update_joystick_type(void); +extern void gameport_remap(void *priv, uint16_t address); +extern void *gameport_add(const device_t *gameport_type); #ifdef __cplusplus } #endif - -#endif /*EMU_GAMEPORT_H*/ +#endif /*EMU_GAMEPORT_H*/ diff --git a/src/include/86box/hdc.h b/src/include/86box/hdc.h index 3f8426dea..0c20aaa32 100644 --- a/src/include/86box/hdc.h +++ b/src/include/86box/hdc.h @@ -17,78 +17,74 @@ * Copyright 2017-2020 Fred N. van Kempen. */ #ifndef EMU_HDC_H -# define EMU_HDC_H +#define EMU_HDC_H +#define MFM_NUM 2 /* 2 drives per controller supported */ +#define ESDI_NUM 2 /* 2 drives per controller supported */ +#define XTA_NUM 2 /* 2 drives per controller supported */ +#define IDE_NUM 10 /* 8 drives per AT IDE + 2 for XT IDE */ +#define ATAPI_NUM 8 /* 8 drives per AT IDE */ +#define SCSI_NUM 16 /* theoretically the controller can have at \ + * least 7 devices, with each device being \ + * able to support 8 units, but hey... */ -#define MFM_NUM 2 /* 2 drives per controller supported */ -#define ESDI_NUM 2 /* 2 drives per controller supported */ -#define XTA_NUM 2 /* 2 drives per controller supported */ -#define IDE_NUM 10 /* 8 drives per AT IDE + 2 for XT IDE */ -#define ATAPI_NUM 8 /* 8 drives per AT IDE */ -#define SCSI_NUM 16 /* theoretically the controller can have at - * least 7 devices, with each device being - * able to support 8 units, but hey... */ +extern int hdc_current; -extern int hdc_current; +extern const device_t st506_xt_xebec_device; /* st506_xt_xebec */ +extern const device_t st506_xt_dtc5150x_device; /* st506_xt_dtc */ +extern const device_t st506_xt_st11_m_device; /* st506_xt_st11_m */ +extern const device_t st506_xt_st11_r_device; /* st506_xt_st11_m */ +extern const device_t st506_xt_wd1002a_wx1_device; /* st506_xt_wd1002a_wx1 */ +extern const device_t st506_xt_wd1002a_27x_device; /* st506_xt_wd1002a_27x */ +extern const device_t st506_at_wd1003_device; /* st506_at_wd1003 */ +extern const device_t st506_xt_wd1004a_wx1_device; /* st506_xt_wd1004a_wx1 */ +extern const device_t st506_xt_wd1004_27x_device; /* st506_xt_wd1004_27x */ +extern const device_t st506_xt_wd1004a_27x_device; /* st506_xt_wd1004a_27x */ +extern const device_t esdi_at_wd1007vse1_device; /* esdi_at */ +extern const device_t esdi_ps2_device; /* esdi_mca */ -extern const device_t st506_xt_xebec_device; /* st506_xt_xebec */ -extern const device_t st506_xt_dtc5150x_device; /* st506_xt_dtc */ -extern const device_t st506_xt_st11_m_device; /* st506_xt_st11_m */ -extern const device_t st506_xt_st11_r_device; /* st506_xt_st11_m */ -extern const device_t st506_xt_wd1002a_wx1_device; /* st506_xt_wd1002a_wx1 */ -extern const device_t st506_xt_wd1002a_27x_device; /* st506_xt_wd1002a_27x */ -extern const device_t st506_at_wd1003_device; /* st506_at_wd1003 */ -extern const device_t st506_xt_wd1004a_wx1_device; /* st506_xt_wd1004a_wx1 */ -extern const device_t st506_xt_wd1004_27x_device; /* st506_xt_wd1004_27x */ -extern const device_t st506_xt_wd1004a_27x_device; /* st506_xt_wd1004a_27x */ +extern const device_t ide_isa_device; /* isa_ide */ +extern const device_t ide_isa_2ch_device; /* isa_ide_2ch */ +extern const device_t ide_isa_2ch_opt_device; /* isa_ide_2ch_opt */ +extern const device_t ide_vlb_device; /* vlb_ide */ +extern const device_t ide_vlb_2ch_device; /* vlb_ide_2ch */ +extern const device_t ide_pci_device; /* pci_ide */ +extern const device_t ide_pci_2ch_device; /* pci_ide_2ch */ -extern const device_t esdi_at_wd1007vse1_device; /* esdi_at */ -extern const device_t esdi_ps2_device; /* esdi_mca */ +extern const device_t ide_cmd640_vlb_device; /* CMD PCI-640B VLB */ +extern const device_t ide_cmd640_vlb_178_device; /* CMD PCI-640B VLB (Port 178h) */ +extern const device_t ide_cmd640_pci_device; /* CMD PCI-640B PCI */ +extern const device_t ide_cmd640_pci_legacy_only_device; /* CMD PCI-640B PCI (Legacy Mode Only) */ +extern const device_t ide_cmd640_pci_single_channel_device; /* CMD PCI-640B PCI (Only primary channel) */ +extern const device_t ide_cmd646_device; /* CMD PCI-646 */ +extern const device_t ide_cmd646_legacy_only_device; /* CMD PCI-646 (Legacy Mode Only) */ +extern const device_t ide_cmd646_single_channel_device; /* CMD PCI-646 (Only primary channel) */ -extern const device_t ide_isa_device; /* isa_ide */ -extern const device_t ide_isa_2ch_device; /* isa_ide_2ch */ -extern const device_t ide_isa_2ch_opt_device; /* isa_ide_2ch_opt */ -extern const device_t ide_vlb_device; /* vlb_ide */ -extern const device_t ide_vlb_2ch_device; /* vlb_ide_2ch */ -extern const device_t ide_pci_device; /* pci_ide */ -extern const device_t ide_pci_2ch_device; /* pci_ide_2ch */ +extern const device_t ide_opti611_vlb_device; /* OPTi 82c611/611A VLB */ -extern const device_t ide_cmd640_vlb_device; /* CMD PCI-640B VLB */ -extern const device_t ide_cmd640_vlb_178_device; /* CMD PCI-640B VLB (Port 178h) */ -extern const device_t ide_cmd640_pci_device; /* CMD PCI-640B PCI */ -extern const device_t ide_cmd640_pci_legacy_only_device; /* CMD PCI-640B PCI (Legacy Mode Only) */ -extern const device_t ide_cmd640_pci_single_channel_device; /* CMD PCI-640B PCI (Only primary channel) */ -extern const device_t ide_cmd646_device; /* CMD PCI-646 */ -extern const device_t ide_cmd646_legacy_only_device; /* CMD PCI-646 (Legacy Mode Only) */ -extern const device_t ide_cmd646_single_channel_device; /* CMD PCI-646 (Only primary channel) */ +extern const device_t ide_ter_device; +extern const device_t ide_ter_pnp_device; +extern const device_t ide_qua_device; +extern const device_t ide_qua_pnp_device; -extern const device_t ide_opti611_vlb_device; /* OPTi 82c611/611A VLB */ +extern const device_t xta_wdxt150_device; /* xta_wdxt150 */ +extern const device_t xta_hd20_device; /* EuroPC internal */ -extern const device_t ide_ter_device; -extern const device_t ide_ter_pnp_device; -extern const device_t ide_qua_device; -extern const device_t ide_qua_pnp_device; +extern const device_t xtide_device; /* xtide_xt */ +extern const device_t xtide_at_device; /* xtide_at */ +extern const device_t xtide_at_386_device; /* xtide_at_386 */ +extern const device_t xtide_acculogic_device; /* xtide_ps2 */ +extern const device_t xtide_at_ps2_device; /* xtide_at_ps2 */ -extern const device_t xta_wdxt150_device; /* xta_wdxt150 */ -extern const device_t xta_hd20_device; /* EuroPC internal */ +extern void hdc_init(void); +extern void hdc_reset(void); -extern const device_t xtide_device; /* xtide_xt */ -extern const device_t xtide_at_device; /* xtide_at */ -extern const device_t xtide_at_386_device; /* xtide_at_386 */ -extern const device_t xtide_acculogic_device; /* xtide_ps2 */ -extern const device_t xtide_at_ps2_device; /* xtide_at_ps2 */ +extern char *hdc_get_internal_name(int hdc); +extern int hdc_get_from_internal_name(char *s); +extern int hdc_has_config(int hdc); +extern const device_t *hdc_get_device(int hdc); +extern int hdc_get_flags(int hdc); +extern int hdc_available(int hdc); - -extern void hdc_init(void); -extern void hdc_reset(void); - -extern char *hdc_get_internal_name(int hdc); -extern int hdc_get_from_internal_name(char *s); -extern int hdc_has_config(int hdc); -extern const device_t *hdc_get_device(int hdc); -extern int hdc_get_flags(int hdc); -extern int hdc_available(int hdc); - - -#endif /*EMU_HDC_H*/ +#endif /*EMU_HDC_H*/ diff --git a/src/include/86box/hdc_ide.h b/src/include/86box/hdc_ide.h index 1deb6dd86..da5fe1b32 100644 --- a/src/include/86box/hdc_ide.h +++ b/src/include/86box/hdc_ide.h @@ -17,14 +17,14 @@ * Copyright 2016-2019 Miran Grca. */ #ifndef EMU_IDE_H -# define EMU_IDE_H +#define EMU_IDE_H -#define IDE_BUS_MAX 4 -#define IDE_CHAN_MAX 2 +#define IDE_BUS_MAX 4 +#define IDE_CHAN_MAX 2 #define HDC_PRIMARY_BASE 0x01F0 #define HDC_PRIMARY_SIDE 0x03F6 -#define HDC_PRIMARY_IRQ 14 +#define HDC_PRIMARY_IRQ 14 #define HDC_SECONDARY_BASE 0x0170 #define HDC_SECONDARY_SIDE 0x0376 #define HDC_SECONDARY_IRQ 15 @@ -35,8 +35,7 @@ #define HDC_QUATERNARY_SIDE 0x03EE #define HDC_QUATERNARY_IRQ 11 -enum -{ +enum { IDE_NONE = 0, IDE_HDD, IDE_ATAPI @@ -45,55 +44,55 @@ enum #ifdef SCSI_DEVICE_H typedef struct ide_s { uint8_t selected, - atastat, error, - command, fdisk; + atastat, error, + command, fdisk; int type, board, - irqstat, service, - blocksize, blockcount, - hdd_num, channel, - pos, sector_pos, - lba, - reset, mdma_mode, - do_initial_read; + irqstat, service, + blocksize, blockcount, + hdd_num, channel, + pos, sector_pos, + lba, + reset, mdma_mode, + do_initial_read; uint32_t secount, sector, - cylinder, head, - drive, cylprecomp, - cfg_spt, cfg_hpc, - lba_addr, tracks, - spt, hpc; + cylinder, head, + drive, cylprecomp, + cfg_spt, cfg_hpc, + lba_addr, tracks, + spt, hpc; uint16_t *buffer; - uint8_t *sector_buffer; + uint8_t *sector_buffer; - pc_timer_t timer; + pc_timer_t timer; /* Stuff mostly used by ATAPI */ - scsi_common_t *sc; - int interrupt_drq; - double pending_delay; + scsi_common_t *sc; + int interrupt_drq; + double pending_delay; - int (*get_max)(int ide_has_dma, int type); - int (*get_timings)(int ide_has_dma, int type); - void (*identify)(struct ide_s *ide, int ide_has_dma); - void (*stop)(scsi_common_t *sc); - void (*packet_command)(scsi_common_t *sc, uint8_t *cdb); - void (*device_reset)(scsi_common_t *sc); - uint8_t (*phase_data_out)(scsi_common_t *sc); - void (*command_stop)(scsi_common_t *sc); - void (*bus_master_error)(scsi_common_t *sc); + int (*get_max)(int ide_has_dma, int type); + int (*get_timings)(int ide_has_dma, int type); + void (*identify)(struct ide_s *ide, int ide_has_dma); + void (*stop)(scsi_common_t *sc); + void (*packet_command)(scsi_common_t *sc, uint8_t *cdb); + void (*device_reset)(scsi_common_t *sc); + uint8_t (*phase_data_out)(scsi_common_t *sc); + void (*command_stop)(scsi_common_t *sc); + void (*bus_master_error)(scsi_common_t *sc); } ide_t; -extern ide_t *ide_drives[IDE_NUM]; +extern ide_t *ide_drives[IDE_NUM]; #endif /* Type: - 0 = PIO, - 1 = SDMA, - 2 = MDMA, - 3 = UDMA + 0 = PIO, + 1 = SDMA, + 2 = MDMA, + 3 = UDMA Return: - -1 = Not supported, - Anything else = maximum mode + -1 = Not supported, + Anything else = maximum mode This will eventually be hookable. */ enum { @@ -104,8 +103,8 @@ enum { }; /* Return: - 0 = Not supported, - Anything else = timings + 0 = Not supported, + Anything else = timings This will eventually be hookable. */ enum { @@ -114,66 +113,63 @@ enum { TIMINGS_PIO_FC }; - extern int ide_ter_enabled, ide_qua_enabled; - #ifdef SCSI_DEVICE_H -extern ide_t * ide_get_drive(int ch); -extern void ide_irq_raise(ide_t *ide); -extern void ide_irq_lower(ide_t *ide); -extern void ide_allocate_buffer(ide_t *dev); -extern void ide_atapi_attach(ide_t *dev); +extern ide_t *ide_get_drive(int ch); +extern void ide_irq_raise(ide_t *ide); +extern void ide_irq_lower(ide_t *ide); +extern void ide_allocate_buffer(ide_t *dev); +extern void ide_atapi_attach(ide_t *dev); #endif -extern void * ide_xtide_init(void); -extern void ide_xtide_close(void); +extern void *ide_xtide_init(void); +extern void ide_xtide_close(void); -extern void ide_writew(uint16_t addr, uint16_t val, void *priv); -extern void ide_write_devctl(uint16_t addr, uint8_t val, void *priv); -extern void ide_writeb(uint16_t addr, uint8_t val, void *priv); -extern uint8_t ide_readb(uint16_t addr, void *priv); -extern uint8_t ide_read_alt_status(uint16_t addr, void *priv); -extern uint16_t ide_readw(uint16_t addr, void *priv); +extern void ide_writew(uint16_t addr, uint16_t val, void *priv); +extern void ide_write_devctl(uint16_t addr, uint8_t val, void *priv); +extern void ide_writeb(uint16_t addr, uint8_t val, void *priv); +extern uint8_t ide_readb(uint16_t addr, void *priv); +extern uint8_t ide_read_alt_status(uint16_t addr, void *priv); +extern uint16_t ide_readw(uint16_t addr, void *priv); -extern void ide_set_bus_master(int board, - int (*dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv), - void (*set_irq)(int channel, void *priv), void *priv); +extern void ide_set_bus_master(int board, + int (*dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv), + void (*set_irq)(int channel, void *priv), void *priv); -extern void win_cdrom_eject(uint8_t id); -extern void win_cdrom_reload(uint8_t id); +extern void win_cdrom_eject(uint8_t id); +extern void win_cdrom_reload(uint8_t id); -extern void ide_set_base(int board, uint16_t port); -extern void ide_set_side(int board, uint16_t port); +extern void ide_set_base(int board, uint16_t port); +extern void ide_set_side(int board, uint16_t port); -extern void ide_set_handlers(uint8_t board); -extern void ide_remove_handlers(uint8_t board); +extern void ide_set_handlers(uint8_t board); +extern void ide_remove_handlers(uint8_t board); -extern void ide_pri_enable(void); -extern void ide_pri_disable(void); -extern void ide_sec_enable(void); -extern void ide_sec_disable(void); +extern void ide_pri_enable(void); +extern void ide_pri_disable(void); +extern void ide_sec_enable(void); +extern void ide_sec_disable(void); -extern void ide_board_set_force_ata3(int board, int force_ata3); +extern void ide_board_set_force_ata3(int board, int force_ata3); #ifdef EMU_ISAPNP_H -extern void ide_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv); +extern void ide_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv); #endif -extern double ide_atapi_get_period(uint8_t channel); +extern double ide_atapi_get_period(uint8_t channel); #ifdef SCSI_DEVICE_H -extern void ide_set_callback(ide_t *ide, double callback); +extern void ide_set_callback(ide_t *ide, double callback); #endif -extern void ide_set_board_callback(uint8_t board, double callback); +extern void ide_set_board_callback(uint8_t board, double callback); -extern void ide_padstr(char *str, const char *src, int len); -extern void ide_padstr8(uint8_t *buf, int buf_size, const char *src); +extern void ide_padstr(char *str, const char *src, int len); +extern void ide_padstr8(uint8_t *buf, int buf_size, const char *src); -extern int (*ide_bus_master_dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv); -extern void (*ide_bus_master_set_irq)(int channel, void *priv); -extern void *ide_bus_master_priv[2]; +extern int (*ide_bus_master_dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv); +extern void (*ide_bus_master_set_irq)(int channel, void *priv); +extern void *ide_bus_master_priv[2]; -extern uint8_t ide_read_ali_75(void); -extern uint8_t ide_read_ali_76(void); +extern uint8_t ide_read_ali_75(void); +extern uint8_t ide_read_ali_76(void); - -#endif /*EMU_IDE_H*/ +#endif /*EMU_IDE_H*/ diff --git a/src/include/86box/hdc_ide_sff8038i.h b/src/include/86box/hdc_ide_sff8038i.h index 1c058772c..5533319e1 100644 --- a/src/include/86box/hdc_ide_sff8038i.h +++ b/src/include/86box/hdc_ide_sff8038i.h @@ -17,47 +17,46 @@ */ #ifndef EMU_HDC_IDE_SFF8038I_H -# define EMU_HDC_IDE_SFF8038I_H +#define EMU_HDC_IDE_SFF8038I_H typedef struct { - uint8_t command, status, - ptr0, enabled, - dma_mode, pad, - pad0, pad1; - uint16_t base, pad2; - uint32_t ptr, ptr_cur, - addr; - int count, eot, - slot, - irq_mode[2], irq_level[2], - irq_pin, irq_line; + uint8_t command, status, + ptr0, enabled, + dma_mode, pad, + pad0, pad1; + uint16_t base, pad2; + uint32_t ptr, ptr_cur, + addr; + int count, eot, + slot, + irq_mode[2], irq_level[2], + irq_pin, irq_line; } sff8038i_t; - extern const device_t sff8038i_device; -extern void sff_bus_master_handler(sff8038i_t *dev, int enabled, uint16_t base); +extern void sff_bus_master_handler(sff8038i_t *dev, int enabled, uint16_t base); -extern int sff_bus_master_dma_read(int channel, uint8_t *data, int transfer_length, void *priv); -extern int sff_bus_master_dma_write(int channel, uint8_t *data, int transfer_length, void *priv); +extern int sff_bus_master_dma_read(int channel, uint8_t *data, int transfer_length, void *priv); +extern int sff_bus_master_dma_write(int channel, uint8_t *data, int transfer_length, void *priv); -extern void sff_bus_master_set_irq(int channel, void *priv); +extern void sff_bus_master_set_irq(int channel, void *priv); -extern int sff_bus_master_dma(int channel, uint8_t *data, int transfer_length, int out, void *priv); +extern int sff_bus_master_dma(int channel, uint8_t *data, int transfer_length, int out, void *priv); -extern void sff_bus_master_write(uint16_t port, uint8_t val, void *priv); -extern uint8_t sff_bus_master_read(uint16_t port, void *priv); +extern void sff_bus_master_write(uint16_t port, uint8_t val, void *priv); +extern uint8_t sff_bus_master_read(uint16_t port, void *priv); -extern void sff_bus_master_reset(sff8038i_t *dev, uint16_t old_base); +extern void sff_bus_master_reset(sff8038i_t *dev, uint16_t old_base); -extern void sff_set_slot(sff8038i_t *dev, int slot); +extern void sff_set_slot(sff8038i_t *dev, int slot); -extern void sff_set_irq_line(sff8038i_t *dev, int irq_line); +extern void sff_set_irq_line(sff8038i_t *dev, int irq_line); -extern void sff_set_irq_mode(sff8038i_t *dev, int channel, int irq_mode); -extern void sff_set_irq_pin(sff8038i_t *dev, int irq_pin); +extern void sff_set_irq_mode(sff8038i_t *dev, int channel, int irq_mode); +extern void sff_set_irq_pin(sff8038i_t *dev, int irq_pin); -extern void sff_set_irq_level(sff8038i_t *dev, int channel, int irq_level); +extern void sff_set_irq_level(sff8038i_t *dev, int channel, int irq_level); #endif /*EMU_HDC_IDE_SFF8038I_H*/ diff --git a/src/include/86box/hdd.h b/src/include/86box/hdd.h index a1c552e1e..905a1c294 100644 --- a/src/include/86box/hdd.h +++ b/src/include/86box/hdd.h @@ -16,11 +16,9 @@ * Copyright 2017,2018 Fred N. van Kempen. */ #ifndef EMU_HDD_H -# define EMU_HDD_H - - -#define HDD_NUM 88 /* total of 88 images supported */ +#define EMU_HDD_H +#define HDD_NUM 88 /* total of 88 images supported */ /* Hard Disk bus types. */ #if 0 @@ -78,21 +76,21 @@ enum { HDD_OP_WRITE }; -#define HDD_MAX_ZONES 16 +#define HDD_MAX_ZONES 16 #define HDD_MAX_CACHE_SEG 16 typedef struct { const char *name; const char *internal_name; - uint32_t zones; - uint32_t avg_spt; - uint32_t heads; - uint32_t rpm; - uint32_t rcache_num_seg; - uint32_t rcache_seg_size; - uint32_t max_multiple; - double full_stroke_ms; - double track_seek_ms; + uint32_t zones; + uint32_t avg_spt; + uint32_t heads; + uint32_t rpm; + uint32_t rcache_num_seg; + uint32_t rcache_seg_size; + uint32_t max_multiple; + double full_stroke_ms; + double track_seek_ms; } hdd_preset_t; typedef struct { @@ -100,18 +98,18 @@ typedef struct { uint32_t lba_addr; uint32_t ra_addr; uint32_t host_addr; - uint8_t lru; - uint8_t valid; + uint8_t lru; + uint8_t valid; } hdd_cache_seg_t; typedef struct { // Read cache hdd_cache_seg_t segments[HDD_MAX_CACHE_SEG]; - uint32_t num_segments; - uint32_t segment_size; - uint32_t ra_segment; - uint8_t ra_ongoing; - uint64_t ra_start_time; + uint32_t num_segments; + uint32_t segment_size; + uint32_t ra_segment; + uint8_t ra_ongoing; + uint64_t ra_start_time; // Write cache uint32_t write_addr; @@ -123,7 +121,7 @@ typedef struct { typedef struct { uint32_t cylinders; uint32_t sectors_per_track; - double sector_time_usec; + double sector_time_usec; uint32_t start_sector; uint32_t end_sector; uint32_t start_track; @@ -131,39 +129,39 @@ typedef struct { /* Define the virtual Hard Disk. */ typedef struct { - uint8_t id; + uint8_t id; union { - uint8_t channel; /* Needed for Settings to reduce the number of if's */ + uint8_t channel; /* Needed for Settings to reduce the number of if's */ - uint8_t mfm_channel; /* Should rename and/or unionize */ - uint8_t esdi_channel; - uint8_t xta_channel; - uint8_t ide_channel; - uint8_t scsi_id; + uint8_t mfm_channel; /* Should rename and/or unionize */ + uint8_t esdi_channel; + uint8_t xta_channel; + uint8_t ide_channel; + uint8_t scsi_id; }; - uint8_t bus, - res; /* Reserved for bus mode */ - uint8_t wp; /* Disk has been mounted READ-ONLY */ - uint8_t pad, pad0; + uint8_t bus, + res; /* Reserved for bus mode */ + uint8_t wp; /* Disk has been mounted READ-ONLY */ + uint8_t pad, pad0; - void *priv; + void *priv; - char fn[1024], /* Name of current image file */ - prev_fn[1024]; /* Name of previous image file */ + char fn[1024], /* Name of current image file */ + prev_fn[1024]; /* Name of previous image file */ - uint32_t res0, pad1, - base, - spt, - hpc, /* Physical geometry parameters */ - tracks; + uint32_t res0, pad1, + base, + spt, + hpc, /* Physical geometry parameters */ + tracks; - hdd_zone_t zones[HDD_MAX_ZONES]; - uint32_t num_zones; + hdd_zone_t zones[HDD_MAX_ZONES]; + uint32_t num_zones; hdd_cache_t cache; - uint32_t phy_cyl; - uint32_t phy_heads; - uint32_t rpm; - uint8_t max_multiple_block; + uint32_t phy_cyl; + uint32_t phy_heads; + uint32_t rpm; + uint8_t max_multiple_block; uint32_t cur_cylinder; uint32_t cur_track; @@ -177,42 +175,41 @@ typedef struct { double cyl_switch_usec; } hard_disk_t; +extern hard_disk_t hdd[HDD_NUM]; +extern unsigned int hdd_table[128][3]; -extern hard_disk_t hdd[HDD_NUM]; -extern unsigned int hdd_table[128][3]; +extern int hdd_init(void); +extern int hdd_string_to_bus(char *str, int cdrom); +extern char *hdd_bus_to_string(int bus, int cdrom); +extern int hdd_is_valid(int c); -extern int hdd_init(void); -extern int hdd_string_to_bus(char *str, int cdrom); -extern char *hdd_bus_to_string(int bus, int cdrom); -extern int hdd_is_valid(int c); +extern void hdd_image_init(void); +extern int hdd_image_load(int id); +extern void hdd_image_seek(uint8_t id, uint32_t sector); +extern void hdd_image_read(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer); +extern int hdd_image_read_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer); +extern void hdd_image_write(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer); +extern int hdd_image_write_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer); +extern void hdd_image_zero(uint8_t id, uint32_t sector, uint32_t count); +extern int hdd_image_zero_ex(uint8_t id, uint32_t sector, uint32_t count); +extern uint32_t hdd_image_get_last_sector(uint8_t id); +extern uint32_t hdd_image_get_pos(uint8_t id); +extern uint8_t hdd_image_get_type(uint8_t id); +extern void hdd_image_unload(uint8_t id, int fn_preserve); +extern void hdd_image_close(uint8_t id); +extern void hdd_image_calc_chs(uint32_t *c, uint32_t *h, uint32_t *s, uint32_t size); -extern void hdd_image_init(void); -extern int hdd_image_load(int id); -extern void hdd_image_seek(uint8_t id, uint32_t sector); -extern void hdd_image_read(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer); -extern int hdd_image_read_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer); -extern void hdd_image_write(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer); -extern int hdd_image_write_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer); -extern void hdd_image_zero(uint8_t id, uint32_t sector, uint32_t count); -extern int hdd_image_zero_ex(uint8_t id, uint32_t sector, uint32_t count); -extern uint32_t hdd_image_get_last_sector(uint8_t id); -extern uint32_t hdd_image_get_pos(uint8_t id); -extern uint8_t hdd_image_get_type(uint8_t id); -extern void hdd_image_unload(uint8_t id, int fn_preserve); -extern void hdd_image_close(uint8_t id); -extern void hdd_image_calc_chs(uint32_t *c, uint32_t *h, uint32_t *s, uint32_t size); - -extern int image_is_hdi(const char *s); -extern int image_is_hdx(const char *s, int check_signature); -extern int image_is_vhd(const char *s, int check_signature); +extern int image_is_hdi(const char *s); +extern int image_is_hdx(const char *s, int check_signature); +extern int image_is_vhd(const char *s, int check_signature); extern double hdd_timing_write(hard_disk_t *hdd, uint32_t addr, uint32_t len); extern double hdd_timing_read(hard_disk_t *hdd, uint32_t addr, uint32_t len); extern double hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_t continuous, double max_seek_time); -int hdd_preset_get_num(); -char * hdd_preset_getname(int preset); -extern char *hdd_preset_get_internal_name(int preset); -extern int hdd_preset_get_from_internal_name(char *s); -extern void hdd_preset_apply(int hdd_id); +int hdd_preset_get_num(); +char *hdd_preset_getname(int preset); +extern char *hdd_preset_get_internal_name(int preset); +extern int hdd_preset_get_from_internal_name(char *s); +extern void hdd_preset_apply(int hdd_id); -#endif /*EMU_HDD_H*/ +#endif /*EMU_HDD_H*/ diff --git a/src/include/86box/hwm.h b/src/include/86box/hwm.h index ef5621da6..3ddf71c62 100644 --- a/src/include/86box/hwm.h +++ b/src/include/86box/hwm.h @@ -15,64 +15,59 @@ * Copyright 2020 RichardG. */ #ifndef EMU_HWM_H -# define EMU_HWM_H -# include - +#define EMU_HWM_H +#include #define RESISTOR_DIVIDER(v, r1, r2) (((v) * (r2)) / ((r1) + (r2))) - typedef struct { - uint16_t fans[4]; - uint8_t temperatures[4]; - uint16_t voltages[13]; + uint16_t fans[4]; + uint8_t temperatures[4]; + uint16_t voltages[13]; } hwm_values_t; typedef struct { - uint32_t local; + uint32_t local; hwm_values_t *values; - void *as99127f; + void *as99127f; - uint8_t regs[8]; - uint8_t addr_register; - uint8_t i2c_addr: 7, i2c_state: 2; - uint8_t i2c_enabled: 1; + uint8_t regs[8]; + uint8_t addr_register; + uint8_t i2c_addr : 7, i2c_state : 2; + uint8_t i2c_enabled : 1; } lm75_t; - /* hwm.c */ -extern uint16_t hwm_get_vcore(); +extern uint16_t hwm_get_vcore(); /* hwm_lm75.c */ -extern void lm75_remap(lm75_t *dev, uint8_t addr); -extern uint8_t lm75_read(lm75_t *dev, uint8_t reg); -extern uint8_t lm75_write(lm75_t *dev, uint8_t reg, uint8_t val); +extern void lm75_remap(lm75_t *dev, uint8_t addr); +extern uint8_t lm75_read(lm75_t *dev, uint8_t reg); +extern uint8_t lm75_write(lm75_t *dev, uint8_t reg, uint8_t val); /* hwm_lm78.c */ -extern uint8_t lm78_as99127f_read(void *priv, uint8_t reg); -extern uint8_t lm78_as99127f_write(void *priv, uint8_t reg, uint8_t val); +extern uint8_t lm78_as99127f_read(void *priv, uint8_t reg); +extern uint8_t lm78_as99127f_write(void *priv, uint8_t reg, uint8_t val); /* hwm_vt82c686.c */ -extern void vt82c686_hwm_write(uint8_t addr, uint8_t val, void *priv); - +extern void vt82c686_hwm_write(uint8_t addr, uint8_t val, void *priv); /* Refer to specific hardware monitor implementations for the meaning of hwm_values. */ -extern hwm_values_t hwm_values; +extern hwm_values_t hwm_values; -extern const device_t lm75_1_4a_device; -extern const device_t lm75_w83781d_device; +extern const device_t lm75_1_4a_device; +extern const device_t lm75_w83781d_device; -extern const device_t lm78_device; -extern const device_t w83781d_device; -extern const device_t w83781d_p5a_device; -extern const device_t as99127f_device; -extern const device_t as99127f_rev2_device; -extern const device_t w83782d_device; +extern const device_t lm78_device; +extern const device_t w83781d_device; +extern const device_t w83781d_p5a_device; +extern const device_t as99127f_device; +extern const device_t as99127f_rev2_device; +extern const device_t w83782d_device; -extern const device_t gl518sm_2c_device; -extern const device_t gl518sm_2d_device; +extern const device_t gl518sm_2c_device; +extern const device_t gl518sm_2d_device; -extern const device_t via_vt82c686_hwm_device; +extern const device_t via_vt82c686_hwm_device; - -#endif /*EMU_HWM_H*/ +#endif /*EMU_HWM_H*/ diff --git a/src/include/86box/i2c.h b/src/include/86box/i2c.h index b47754d64..545f2b9ed 100644 --- a/src/include/86box/i2c.h +++ b/src/include/86box/i2c.h @@ -15,56 +15,53 @@ * Copyright 2020 RichardG. */ #ifndef EMU_I2C_H -# define EMU_I2C_H - +#define EMU_I2C_H /* i2c.c */ -extern void *i2c_smbus; - +extern void *i2c_smbus; /* i2c.c */ -extern void *i2c_addbus(char *name); -extern void i2c_removebus(void *bus_handle); -extern char *i2c_getbusname(void *bus_handle); +extern void *i2c_addbus(char *name); +extern void i2c_removebus(void *bus_handle); +extern char *i2c_getbusname(void *bus_handle); -extern void i2c_sethandler(void *bus_handle, uint8_t base, int size, - uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv), - uint8_t (*read)(void *bus, uint8_t addr, void *priv), - uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv), - void (*stop)(void *bus, uint8_t addr, void *priv), - void *priv); +extern void i2c_sethandler(void *bus_handle, uint8_t base, int size, + uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv), + uint8_t (*read)(void *bus, uint8_t addr, void *priv), + uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv), + void (*stop)(void *bus, uint8_t addr, void *priv), + void *priv); -extern void i2c_removehandler(void *bus_handle, uint8_t base, int size, - uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv), - uint8_t (*read)(void *bus, uint8_t addr, void *priv), - uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv), - void (*stop)(void *bus, uint8_t addr, void *priv), - void *priv); +extern void i2c_removehandler(void *bus_handle, uint8_t base, int size, + uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv), + uint8_t (*read)(void *bus, uint8_t addr, void *priv), + uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv), + void (*stop)(void *bus, uint8_t addr, void *priv), + void *priv); -extern void i2c_handler(int set, void *bus_handle, uint8_t base, int size, - uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv), - uint8_t (*read)(void *bus, uint8_t addr, void *priv), - uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv), - void (*stop)(void *bus, uint8_t addr, void *priv), - void *priv); +extern void i2c_handler(int set, void *bus_handle, uint8_t base, int size, + uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv), + uint8_t (*read)(void *bus, uint8_t addr, void *priv), + uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv), + void (*stop)(void *bus, uint8_t addr, void *priv), + void *priv); -extern uint8_t i2c_start(void *bus_handle, uint8_t addr, uint8_t read); -extern uint8_t i2c_read(void *bus_handle, uint8_t addr); -extern uint8_t i2c_write(void *bus_handle, uint8_t addr, uint8_t data); -extern void i2c_stop(void *bus_handle, uint8_t addr); +extern uint8_t i2c_start(void *bus_handle, uint8_t addr, uint8_t read); +extern uint8_t i2c_read(void *bus_handle, uint8_t addr); +extern uint8_t i2c_write(void *bus_handle, uint8_t addr, uint8_t data); +extern void i2c_stop(void *bus_handle, uint8_t addr); /* i2c_eeprom.c */ -extern uint8_t log2i(uint32_t i); -extern void *i2c_eeprom_init(void *i2c, uint8_t addr, uint8_t *data, uint32_t size, uint8_t writable); -extern void i2c_eeprom_close(void *dev_handle); +extern uint8_t log2i(uint32_t i); +extern void *i2c_eeprom_init(void *i2c, uint8_t addr, uint8_t *data, uint32_t size, uint8_t writable); +extern void i2c_eeprom_close(void *dev_handle); /* i2c_gpio.c */ -extern void *i2c_gpio_init(char *bus_name); -extern void i2c_gpio_close(void *dev_handle); -extern void i2c_gpio_set(void *dev_handle, uint8_t scl, uint8_t sda); -extern uint8_t i2c_gpio_get_scl(void *dev_handle); -extern uint8_t i2c_gpio_get_sda(void *dev_handle); -extern void *i2c_gpio_get_bus(); +extern void *i2c_gpio_init(char *bus_name); +extern void i2c_gpio_close(void *dev_handle); +extern void i2c_gpio_set(void *dev_handle, uint8_t scl, uint8_t sda); +extern uint8_t i2c_gpio_get_scl(void *dev_handle); +extern uint8_t i2c_gpio_get_sda(void *dev_handle); +extern void *i2c_gpio_get_bus(); - -#endif /*EMU_I2C_H*/ +#endif /*EMU_I2C_H*/ diff --git a/src/include/86box/i82335.h b/src/include/86box/i82335.h index 705f1b085..709760070 100644 --- a/src/include/86box/i82335.h +++ b/src/include/86box/i82335.h @@ -1,5 +1,5 @@ #ifndef EMU_I82335_H -# define EMU_I82335_H +#define EMU_I82335_H extern void i82335_init(void); diff --git a/src/include/86box/ibm_5161.h b/src/include/86box/ibm_5161.h index 858c18786..711773d6d 100644 --- a/src/include/86box/ibm_5161.h +++ b/src/include/86box/ibm_5161.h @@ -13,7 +13,7 @@ */ #ifndef EMU_IBM_5161_H -# define EMU_IBM_5161_H +#define EMU_IBM_5161_H extern const device_t ibm_5161_device; diff --git a/src/include/86box/io.h b/src/include/86box/io.h index c483819ce..7e7b45912 100644 --- a/src/include/86box/io.h +++ b/src/include/86box/io.h @@ -18,103 +18,101 @@ * Copyright 2016,2017 Miran Grca. */ #ifndef EMU_IO_H -# define EMU_IO_H +#define EMU_IO_H +extern void io_init(void); -extern void io_init(void); +extern void io_sethandler_common(uint16_t base, int size, + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv, int step); -extern void io_sethandler_common(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv, int step); +extern void io_removehandler_common(uint16_t base, int size, + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv, int step); -extern void io_removehandler_common(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv, int step); +extern void io_handler_common(int set, uint16_t base, int size, + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv, int step); -extern void io_handler_common(int set, uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv, int step); +extern void io_sethandler(uint16_t base, int size, + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv); -extern void io_sethandler(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv); +extern void io_removehandler(uint16_t base, int size, + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv); -extern void io_removehandler(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv); +extern void io_handler(int set, uint16_t base, int size, + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv); -extern void io_handler(int set, uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv); +extern void io_sethandler_interleaved(uint16_t base, int size, + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv); -extern void io_sethandler_interleaved(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv); +extern void io_removehandler_interleaved(uint16_t base, int size, + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv); -extern void io_removehandler_interleaved(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv); +extern void io_handler_interleaved(int set, uint16_t base, int size, + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv); -extern void io_handler_interleaved(int set, uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv); +extern uint8_t inb(uint16_t port); +extern void outb(uint16_t port, uint8_t val); +extern uint16_t inw(uint16_t port); +extern void outw(uint16_t port, uint16_t val); +extern uint32_t inl(uint16_t port); +extern void outl(uint16_t port, uint32_t val); -extern uint8_t inb(uint16_t port); -extern void outb(uint16_t port, uint8_t val); -extern uint16_t inw(uint16_t port); -extern void outw(uint16_t port, uint16_t val); -extern uint32_t inl(uint16_t port); -extern void outl(uint16_t port, uint32_t val); +extern void *io_trap_add(void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv), + void *priv); +extern void io_trap_remap(void *handle, int enable, uint16_t addr, uint16_t size); +extern void io_trap_remove(void *handle); -extern void *io_trap_add(void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv), - void *priv); -extern void io_trap_remap(void *handle, int enable, uint16_t addr, uint16_t size); -extern void io_trap_remove(void *handle); - - -#endif /*EMU_IO_H*/ +#endif /*EMU_IO_H*/ diff --git a/src/include/86box/isamem.h b/src/include/86box/isamem.h index b02c27374..917369fb6 100644 --- a/src/include/86box/isamem.h +++ b/src/include/86box/isamem.h @@ -46,11 +46,9 @@ */ #ifndef EMU_ISAMEM_H -# define EMU_ISAMEM_H - - -#define ISAMEM_MAX 4 /* max #cards in system */ +#define EMU_ISAMEM_H +#define ISAMEM_MAX 4 /* max #cards in system */ #ifdef __cplusplus extern "C" { @@ -61,18 +59,16 @@ extern const device_t isamem_device; extern const device_t isamem_brat80_device; extern const device_t isamem_ev159_device; - /* Functions. */ -extern void isamem_reset(void); +extern void isamem_reset(void); -extern const char *isamem_get_name(int t); -extern const char *isamem_get_internal_name(int t); -extern int isamem_get_from_internal_name(const char *s); -extern const device_t *isamem_get_device(int t); +extern const char *isamem_get_name(int t); +extern const char *isamem_get_internal_name(int t); +extern int isamem_get_from_internal_name(const char *s); +extern const device_t *isamem_get_device(int t); #ifdef __cplusplus } #endif - -#endif /*EMU_ISAMEM_H*/ +#endif /*EMU_ISAMEM_H*/ diff --git a/src/include/86box/isapnp.h b/src/include/86box/isapnp.h index 3b2aa1859..abf3eb10d 100644 --- a/src/include/86box/isapnp.h +++ b/src/include/86box/isapnp.h @@ -16,56 +16,51 @@ */ #ifndef EMU_ISAPNP_H -# define EMU_ISAPNP_H -# include - - -#define ISAPNP_MEM_DISABLED 0 -#define ISAPNP_IO_DISABLED 0 -#define ISAPNP_IRQ_DISABLED 0 -#define ISAPNP_DMA_DISABLED 4 +#define EMU_ISAPNP_H +#include +#define ISAPNP_MEM_DISABLED 0 +#define ISAPNP_IO_DISABLED 0 +#define ISAPNP_IRQ_DISABLED 0 +#define ISAPNP_DMA_DISABLED 4 enum { ISAPNP_CARD_DISABLE = 0, - ISAPNP_CARD_ENABLE = 1, + ISAPNP_CARD_ENABLE = 1, ISAPNP_CARD_FORCE_CONFIG, /* cheat code for UMC UM8669F */ - ISAPNP_CARD_NO_KEY /* cheat code for Crystal CS423x */ + ISAPNP_CARD_NO_KEY /* cheat code for Crystal CS423x */ }; - typedef struct { - uint8_t activate; + uint8_t activate; struct { - uint32_t base: 24, size: 24; + uint32_t base : 24, size : 24; } mem[4]; struct { - uint32_t base, size; + uint32_t base, size; } mem32[4]; struct { - uint16_t base; + uint16_t base; } io[8]; struct { - uint8_t irq: 4, level: 1, type: 1; + uint8_t irq : 4, level : 1, type : 1; } irq[2]; struct { - uint8_t dma: 3; + uint8_t dma : 3; } dma[2]; } isapnp_device_config_t; +void *isapnp_add_card(uint8_t *rom, uint16_t rom_size, + void (*config_changed)(uint8_t ld, isapnp_device_config_t *config, void *priv), + void (*csn_changed)(uint8_t csn, void *priv), + uint8_t (*read_vendor_reg)(uint8_t ld, uint8_t reg, void *priv), + void (*write_vendor_reg)(uint8_t ld, uint8_t reg, uint8_t val, void *priv), + void *priv); +void isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size); +void isapnp_enable_card(void *priv, uint8_t enable); +void isapnp_set_csn(void *priv, uint8_t csn); +void isapnp_set_device_defaults(void *priv, uint8_t ldn, const isapnp_device_config_t *config); +void isapnp_reset_card(void *priv); +void isapnp_reset_device(void *priv, uint8_t ld); -void *isapnp_add_card(uint8_t *rom, uint16_t rom_size, - void (*config_changed)(uint8_t ld, isapnp_device_config_t *config, void *priv), - void (*csn_changed)(uint8_t csn, void *priv), - uint8_t (*read_vendor_reg)(uint8_t ld, uint8_t reg, void *priv), - void (*write_vendor_reg)(uint8_t ld, uint8_t reg, uint8_t val, void *priv), - void *priv); -void isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size); -void isapnp_enable_card(void *priv, uint8_t enable); -void isapnp_set_csn(void *priv, uint8_t csn); -void isapnp_set_device_defaults(void *priv, uint8_t ldn, const isapnp_device_config_t *config); -void isapnp_reset_card(void *priv); -void isapnp_reset_device(void *priv, uint8_t ld); - - -#endif /*EMU_ISAPNP_H*/ +#endif /*EMU_ISAPNP_H*/ diff --git a/src/include/86box/isartc.h b/src/include/86box/isartc.h index 391b9f642..d6b7d0d35 100644 --- a/src/include/86box/isartc.h +++ b/src/include/86box/isartc.h @@ -46,8 +46,7 @@ */ #ifndef EMU_ISARTC_H -# define EMU_ISARTC_H - +#define EMU_ISARTC_H #ifdef __cplusplus extern "C" { @@ -55,17 +54,15 @@ extern "C" { /* Global variables. */ - /* Functions. */ -extern void isartc_reset(void); +extern void isartc_reset(void); -extern char *isartc_get_internal_name(int t); -extern int isartc_get_from_internal_name(char *s); -extern const device_t *isartc_get_device(int t); +extern char *isartc_get_internal_name(int t); +extern int isartc_get_from_internal_name(char *s); +extern const device_t *isartc_get_device(int t); #ifdef __cplusplus } #endif - -#endif /*EMU_ISARTC_H*/ +#endif /*EMU_ISARTC_H*/ diff --git a/src/include/86box/joystick_ch_flightstick_pro.h b/src/include/86box/joystick_ch_flightstick_pro.h index bd2984438..5bdedede9 100644 --- a/src/include/86box/joystick_ch_flightstick_pro.h +++ b/src/include/86box/joystick_ch_flightstick_pro.h @@ -36,7 +36,7 @@ */ #ifndef EMU_JOYSTICK_CH_FLIGHTSTICK_PRO_H -# define EMU_JOYSTICK_CH_FLIGHTSTICK_PRO_H +#define EMU_JOYSTICK_CH_FLIGHTSTICK_PRO_H extern const joystick_if_t joystick_ch_flightstick_pro; diff --git a/src/include/86box/joystick_standard.h b/src/include/86box/joystick_standard.h index c60828afb..f26a34dc4 100644 --- a/src/include/86box/joystick_standard.h +++ b/src/include/86box/joystick_standard.h @@ -36,7 +36,7 @@ */ #ifndef EMU_JOYSTICK_STANDARD_H -# define EMU_JOYSTICK_STANDARD_H +#define EMU_JOYSTICK_STANDARD_H extern const joystick_if_t joystick_2axis_2button; extern const joystick_if_t joystick_2axis_4button; diff --git a/src/include/86box/joystick_sw_pad.h b/src/include/86box/joystick_sw_pad.h index daa671028..1f95ab3f9 100644 --- a/src/include/86box/joystick_sw_pad.h +++ b/src/include/86box/joystick_sw_pad.h @@ -36,7 +36,7 @@ */ #ifndef EMU_JOYSTICK_SW_PAD_H -# define EMU_JOYSTICK_SW_PAD_H +#define EMU_JOYSTICK_SW_PAD_H extern const joystick_if_t joystick_sw_pad; diff --git a/src/include/86box/joystick_tm_fcs.h b/src/include/86box/joystick_tm_fcs.h index 78b85e9a0..0d5ae4c4e 100644 --- a/src/include/86box/joystick_tm_fcs.h +++ b/src/include/86box/joystick_tm_fcs.h @@ -36,7 +36,7 @@ */ #ifndef EMU_JOYSTICK_TM_FCS_H -# define EMU_JOYSTICK_TM_FCS_H +#define EMU_JOYSTICK_TM_FCS_H extern const joystick_if_t joystick_tm_fcs; diff --git a/src/include/86box/keyboard.h b/src/include/86box/keyboard.h index 29ea8e5fb..b4252324a 100644 --- a/src/include/86box/keyboard.h +++ b/src/include/86box/keyboard.h @@ -20,199 +20,194 @@ */ #ifndef EMU_KEYBOARD_H -# define EMU_KEYBOARD_H - +#define EMU_KEYBOARD_H typedef struct { - const uint8_t mk[4]; - const uint8_t brk[4]; + const uint8_t mk[4]; + const uint8_t brk[4]; } scancode; +#define STATE_SHIFT_MASK 0x22 +#define STATE_RSHIFT 0x20 +#define STATE_LSHIFT 0x02 -#define STATE_SHIFT_MASK 0x22 -#define STATE_RSHIFT 0x20 -#define STATE_LSHIFT 0x02 - -#define FAKE_LSHIFT_ON 0x100 -#define FAKE_LSHIFT_OFF 0x101 -#define LSHIFT_ON 0x102 -#define LSHIFT_OFF 0x103 -#define RSHIFT_ON 0x104 -#define RSHIFT_OFF 0x105 - +#define FAKE_LSHIFT_ON 0x100 +#define FAKE_LSHIFT_OFF 0x101 +#define LSHIFT_ON 0x102 +#define LSHIFT_OFF 0x103 +#define RSHIFT_ON 0x104 +#define RSHIFT_OFF 0x105 /* KBC #define's */ #define KBC_UNKNOWN 0x0000 /* As yet unknown keyboard */ /* IBM-style controllers */ -#define KBC_IBM_PC_XT 0x0000 /* IBM PC/XT */ -#define KBC_IBM_PCJR 0x0001 /* IBM PCjr */ -#define KBC_IBM_TYPE_1 0x0002 /* IBM AT / PS/2 Type 1 */ -#define KBC_IBM_TYPE_2 0x0003 /* IBM PS/2 Type 2 */ -#define KBC_AMI_ACCESS_METHODS 0x0004 /* Access Methods AMI */ -#define KBC_JU_JET 0x0005 /* Ju-Jet */ +#define KBC_IBM_PC_XT 0x0000 /* IBM PC/XT */ +#define KBC_IBM_PCJR 0x0001 /* IBM PCjr */ +#define KBC_IBM_TYPE_1 0x0002 /* IBM AT / PS/2 Type 1 */ +#define KBC_IBM_TYPE_2 0x0003 /* IBM PS/2 Type 2 */ +#define KBC_AMI_ACCESS_METHODS 0x0004 /* Access Methods AMI */ +#define KBC_JU_JET 0x0005 /* Ju-Jet */ /* OEM proprietary */ -#define KBC_TANDY 0x0011 /* Tandy 1000/1000HX */ -#define KBC_TANDY_SL2 0x0012 /* Tandy 1000SL2 */ -#define KBC_AMSTRAD 0x0013 /* Amstrad */ -#define KBC_OLIVETTI_XT 0x0014 /* Olivetti XT */ -#define KBC_OLIVETTI 0x0015 /* Olivetti AT */ -#define KBC_TOSHIBA 0x0016 /* Toshiba AT */ -#define KBC_COMPAQ 0x0017 /* Compaq */ -#define KBC_NCR 0x0018 /* NCR */ -#define KBC_QUADTEL 0x0019 /* Quadtel */ -#define KBC_SIEMENS 0x001A /* Siemens */ +#define KBC_TANDY 0x0011 /* Tandy 1000/1000HX */ +#define KBC_TANDY_SL2 0x0012 /* Tandy 1000SL2 */ +#define KBC_AMSTRAD 0x0013 /* Amstrad */ +#define KBC_OLIVETTI_XT 0x0014 /* Olivetti XT */ +#define KBC_OLIVETTI 0x0015 /* Olivetti AT */ +#define KBC_TOSHIBA 0x0016 /* Toshiba AT */ +#define KBC_COMPAQ 0x0017 /* Compaq */ +#define KBC_NCR 0x0018 /* NCR */ +#define KBC_QUADTEL 0x0019 /* Quadtel */ +#define KBC_SIEMENS 0x001A /* Siemens */ /* Phoenix MultiKey/42 */ -#define PHOENIX_MK42_105 0x0521 /* Phoenix MultiKey/42 1.05 */ -#define PHOENIX_MK42_129 0x2921 /* Phoenix MultiKey/42 1.29 */ -#define PHOENIX_MK42_138 0x3821 /* Phoenix MultiKey/42 1.38 */ -#define PHOENIX_MK42_140 0x3821 /* Phoenix MultiKey/42 1.40 */ -#define PHOENIX_MKC42_214 0x1422 /* Phoenix MultiKey/C42 2.14 */ -#define PHOENIX_MK42I_416 0x1624 /* Phoenix MultiKey/42i 4.16 */ -#define PHOENIX_MK42I_419 0x1924 /* Phoenix MultiKey/42i 4.19 */ +#define PHOENIX_MK42_105 0x0521 /* Phoenix MultiKey/42 1.05 */ +#define PHOENIX_MK42_129 0x2921 /* Phoenix MultiKey/42 1.29 */ +#define PHOENIX_MK42_138 0x3821 /* Phoenix MultiKey/42 1.38 */ +#define PHOENIX_MK42_140 0x3821 /* Phoenix MultiKey/42 1.40 */ +#define PHOENIX_MKC42_214 0x1422 /* Phoenix MultiKey/C42 2.14 */ +#define PHOENIX_MK42I_416 0x1624 /* Phoenix MultiKey/42i 4.16 */ +#define PHOENIX_MK42I_419 0x1924 /* Phoenix MultiKey/42i 4.19 */ /* AMI 0x3x */ -#define KBC_ACER_V30 0x0030 /* Acer (0xA1 returns nothing, 0xAF returns 0x00) */ -#define KBC_AMI_MEGAKEY_SUPER_IO 0x0035 /* AMI '5' MegaKey 1994 NSC (and SM(S)C?) */ -#define KBC_AMI_8 0x0038 /* AMI '8' */ +#define KBC_ACER_V30 0x0030 /* Acer (0xA1 returns nothing, 0xAF returns 0x00) */ +#define KBC_AMI_MEGAKEY_SUPER_IO 0x0035 /* AMI '5' MegaKey 1994 NSC (and SM(S)C?) */ +#define KBC_AMI_8 0x0038 /* AMI '8' */ /* AMI 0x4x */ -#define KBC_AMI_B 0x0042 /* AMI 'B' */ -#define KBC_AMI_D 0x0044 /* AMI 'D' */ -#define KBC_AMI_E 0x0045 /* AMI 'E' */ -#define KBC_AMIKEY 0x0046 /* AMI 'F'/AMIKEY */ -#define KBC_AMIKEY_2 0x0048 /* AMI 'H'/AMIEY-2 */ -#define KBC_MR 0x004D /* MR 'M' - Temporary classification until we get a dump */ +#define KBC_AMI_B 0x0042 /* AMI 'B' */ +#define KBC_AMI_D 0x0044 /* AMI 'D' */ +#define KBC_AMI_E 0x0045 /* AMI 'E' */ +#define KBC_AMIKEY 0x0046 /* AMI 'F'/AMIKEY */ +#define KBC_AMIKEY_2 0x0048 /* AMI 'H'/AMIEY-2 */ +#define KBC_MR 0x004D /* MR 'M' - Temporary classification until we get a dump */ /* AMI 0x5x */ -#define KBC_AMI_MEGAKEY_1993 0x0050 /* AMI 'P' MegaKey 1993 */ -#define KBC_AMI_MEGAKEY_1994 0x0052 /* AMI 'R' MegaKey 1994 - 0xA0 returns 1993 copyright */ -#define KBC_AMI_TRIGEM 0x005A /* TriGem AMI 'Z' (1990 AMI copyright) */ +#define KBC_AMI_MEGAKEY_1993 0x0050 /* AMI 'P' MegaKey 1993 */ +#define KBC_AMI_MEGAKEY_1994 0x0052 /* AMI 'R' MegaKey 1994 - 0xA0 returns 1993 copyright */ +#define KBC_AMI_TRIGEM 0x005A /* TriGem AMI 'Z' (1990 AMI copyright) */ /* AMI 0x6x */ -#define KBC_TANDON 0x0061 /* Tandon 'a' - Temporary classification until we get a dump */ +#define KBC_TANDON 0x0061 /* Tandon 'a' - Temporary classification until we get a dump */ /* Holtek */ -#define KBC_HT_REGIONAL_6542 0x1046 /* Holtek 'F' (Regional 6542) */ -#define KBC_HT_HT6542B_BESTKEY 0x1048 /* Holtek 'H' (Holtek HT6542B, BestKey) */ +#define KBC_HT_REGIONAL_6542 0x1046 /* Holtek 'F' (Regional 6542) */ +#define KBC_HT_HT6542B_BESTKEY 0x1048 /* Holtek 'H' (Holtek HT6542B, BestKey) */ /* AMI 0x0x clone without command 0xA0 */ -#define KBC_UNK_00 0x2000 /* Unknown 0x00 */ -#define KBC_UNK_01 0x2001 /* Unknown 0x01 */ +#define KBC_UNK_00 0x2000 /* Unknown 0x00 */ +#define KBC_UNK_01 0x2001 /* Unknown 0x01 */ /* AMI 0x3x clone without command 0xA0 */ -#define KBC_UNK_7 0x2037 /* Unknown '7' - Temporary classification until we get a dump */ -#define KBC_UNK_9 0x2037 /* Unknown '9' - Temporary classification until we get a dump */ -#define KBC_JETKEY_NO_VER 0x2038 /* No-version JetKey '8' */ +#define KBC_UNK_7 0x2037 /* Unknown '7' - Temporary classification until we get a dump */ +#define KBC_UNK_9 0x2037 /* Unknown '9' - Temporary classification until we get a dump */ +#define KBC_JETKEY_NO_VER 0x2038 /* No-version JetKey '8' */ /* AMI 0x4x clone without command 0xA0 */ -#define KBC_UNK_A 0x2041 /* Unknown 'A' - Temporary classification until we get a dump */ -#define KBC_JETKEY_5_W83C42 0x2046 /* JetKey 5.0 'F' and Winbond W83C42 */ -#define KBC_UNK_G 0x2047 /* Unknown 'G' - Temporary classification until we get a dump */ -#define KBC_MB_300E_SIS 0x2048 /* MB-300E Non-VIA 'H' and SiS 5582/559x */ -#define KBC_UNK_L 0x204C /* Unknown 'L' - Temporary classification until we get a dump */ +#define KBC_UNK_A 0x2041 /* Unknown 'A' - Temporary classification until we get a dump */ +#define KBC_JETKEY_5_W83C42 0x2046 /* JetKey 5.0 'F' and Winbond W83C42 */ +#define KBC_UNK_G 0x2047 /* Unknown 'G' - Temporary classification until we get a dump */ +#define KBC_MB_300E_SIS 0x2048 /* MB-300E Non-VIA 'H' and SiS 5582/559x */ +#define KBC_UNK_L 0x204C /* Unknown 'L' - Temporary classification until we get a dump */ /* AMI 0x0x clone with command 0xA0 (Get Copyright String) only returning 0x00 */ -#define KBC_VPC_2007 0x3000 /* Microsoft Virtual PC 2007 - everything returns 0x00 */ +#define KBC_VPC_2007 0x3000 /* Microsoft Virtual PC 2007 - everything returns 0x00 */ /* AMI 0x4x clone with command 0xA0 (Get Copyright String) only returning 0x00 */ -#define KBC_ALI_M148X 0x3045 /* ALi M148x 'E'/'U' (0xA1 actually returns 'F' but BIOS shows 'E' or 'U') */ -#define KBC_LANCE_UTRON 0x3046 /* Lance LT38C41 'F', Utron */ +#define KBC_ALI_M148X 0x3045 /* ALi M148x 'E'/'U' (0xA1 actually returns 'F' but BIOS shows 'E' or 'U') */ +#define KBC_LANCE_UTRON 0x3046 /* Lance LT38C41 'F', Utron */ /* AMI 0x5x clone with command 0xA0 (Get Copyright String) only returning 0x00 */ -#define KBC_SARC_6042 0x3055 /* SARC 6042 'U' */ +#define KBC_SARC_6042 0x3055 /* SARC 6042 'U' */ /* Award and clones */ -#define KBC_AWARD 0x4200 /* Award (0xA1 returns 0x00) - Temporary classification until we get - the real 0xAF return */ -#define KBC_VIA_VT82C4XN 0x4246 /* VIA VT82C41N, VT82C4N (0xA1 returns 'F') */ -#define KBC_VIA_VT82C586A 0x4346 /* VIA VT82C586A (0xA1 returns 'F') */ -#define KBC_VIA_VT82C586B 0x4446 /* VIA VT82C586B (0xA1 returns 'F') */ -#define KBC_VIA_VT82C686B 0x4546 /* VIA VT82C686B (0xA1 returns 'F') */ +#define KBC_AWARD 0x4200 /* Award (0xA1 returns 0x00) - Temporary classification until we get \ + the real 0xAF return */ +#define KBC_VIA_VT82C4XN 0x4246 /* VIA VT82C41N, VT82C4N (0xA1 returns 'F') */ +#define KBC_VIA_VT82C586A 0x4346 /* VIA VT82C586A (0xA1 returns 'F') */ +#define KBC_VIA_VT82C586B 0x4446 /* VIA VT82C586B (0xA1 returns 'F') */ +#define KBC_VIA_VT82C686B 0x4546 /* VIA VT82C686B (0xA1 returns 'F') */ /* UMC */ -#define KBC_UMC_UM8886 0x5048 /* UMC UM8886 'H' */ +#define KBC_UMC_UM8886 0x5048 /* UMC UM8886 'H' */ /* IBM-style controllers with inverted P1 video type bit polarity */ -#define KBC_IBM_TYPE_1_XI8088 0x8000 /* Xi8088: IBM Type 1 */ +#define KBC_IBM_TYPE_1_XI8088 0x8000 /* Xi8088: IBM Type 1 */ /* AMI (this is the 0xA1 revision byte) with inverted P1 video type bit polarity */ -#define KBC_ACER_V30_INV 0x8030 /* Acer (0xA1 returns nothing, 0xAF returns 0x00) */ +#define KBC_ACER_V30_INV 0x8030 /* Acer (0xA1 returns nothing, 0xAF returns 0x00) */ /* Holtek with inverted P1 video type bit polarity */ -#define KBC_HT_HT6542B_XI8088 0x9048 /* Xi8088: Holtek 'H' (Holtek HT6542B, BestKey) */ +#define KBC_HT_HT6542B_XI8088 0x9048 /* Xi8088: Holtek 'H' (Holtek HT6542B, BestKey) */ /* Award and clones with inverted P1 video type bit polarity */ -#define KBC_VIA_VT82C4XN_XI8088 0xC246 /* Xi8088: VIA VT82C41N, VT82C4N (0xA1 returns 'F') */ - +#define KBC_VIA_VT82C4XN_XI8088 0xC246 /* Xi8088: VIA VT82C41N, VT82C4N (0xA1 returns 'F') */ #ifdef __cplusplus extern "C" { #endif -extern uint8_t keyboard_mode; -extern int keyboard_scan; +extern uint8_t keyboard_mode; +extern int keyboard_scan; -extern void (*keyboard_send)(uint16_t val); -extern void kbd_adddata_process(uint16_t val, void (*adddata)(uint16_t val)); +extern void (*keyboard_send)(uint16_t val); +extern void kbd_adddata_process(uint16_t val, void (*adddata)(uint16_t val)); -extern const scancode scancode_xt[512]; +extern const scancode scancode_xt[512]; -extern uint8_t keyboard_set3_flags[512]; -extern uint8_t keyboard_set3_all_repeat; -extern uint8_t keyboard_set3_all_break; -extern int mouse_queue_start, mouse_queue_end; -extern int mouse_scan; +extern uint8_t keyboard_set3_flags[512]; +extern uint8_t keyboard_set3_all_repeat; +extern uint8_t keyboard_set3_all_break; +extern int mouse_queue_start, mouse_queue_end; +extern int mouse_scan; #ifdef EMU_DEVICE_H -extern const device_t keyboard_pc_device; -extern const device_t keyboard_pc82_device; -extern const device_t keyboard_xt_device; -extern const device_t keyboard_xt86_device; -extern const device_t keyboard_xt_compaq_device; -extern const device_t keyboard_tandy_device; -#if defined(DEV_BRANCH) && defined(USE_LASERXT) -extern const device_t keyboard_xt_lxt3_device; -#endif -extern const device_t keyboard_xt_olivetti_device; -extern const device_t keyboard_xt_zenith_device; -extern const device_t keyboard_at_device; -extern const device_t keyboard_at_ami_device; -extern const device_t keyboard_at_samsung_device; -extern const device_t keyboard_at_toshiba_device; -extern const device_t keyboard_at_olivetti_device; -extern const device_t keyboard_at_ncr_device; -extern const device_t keyboard_ps2_device; -extern const device_t keyboard_ps2_ps1_device; -extern const device_t keyboard_ps2_ps1_pci_device; -extern const device_t keyboard_ps2_xi8088_device; -extern const device_t keyboard_ps2_ami_device; -extern const device_t keyboard_ps2_olivetti_device; -extern const device_t keyboard_ps2_mca_device; -extern const device_t keyboard_ps2_mca_2_device; -extern const device_t keyboard_ps2_quadtel_device; -extern const device_t keyboard_ps2_pci_device; -extern const device_t keyboard_ps2_ami_pci_device; -extern const device_t keyboard_ps2_intel_ami_pci_device; -extern const device_t keyboard_ps2_acer_pci_device; -extern const device_t keyboard_ps2_ali_pci_device; +extern const device_t keyboard_pc_device; +extern const device_t keyboard_pc82_device; +extern const device_t keyboard_xt_device; +extern const device_t keyboard_xt86_device; +extern const device_t keyboard_xt_compaq_device; +extern const device_t keyboard_tandy_device; +# if defined(DEV_BRANCH) && defined(USE_LASERXT) +extern const device_t keyboard_xt_lxt3_device; +# endif +extern const device_t keyboard_xt_olivetti_device; +extern const device_t keyboard_xt_zenith_device; +extern const device_t keyboard_at_device; +extern const device_t keyboard_at_ami_device; +extern const device_t keyboard_at_samsung_device; +extern const device_t keyboard_at_toshiba_device; +extern const device_t keyboard_at_olivetti_device; +extern const device_t keyboard_at_ncr_device; +extern const device_t keyboard_ps2_device; +extern const device_t keyboard_ps2_ps1_device; +extern const device_t keyboard_ps2_ps1_pci_device; +extern const device_t keyboard_ps2_xi8088_device; +extern const device_t keyboard_ps2_ami_device; +extern const device_t keyboard_ps2_olivetti_device; +extern const device_t keyboard_ps2_mca_device; +extern const device_t keyboard_ps2_mca_2_device; +extern const device_t keyboard_ps2_quadtel_device; +extern const device_t keyboard_ps2_pci_device; +extern const device_t keyboard_ps2_ami_pci_device; +extern const device_t keyboard_ps2_intel_ami_pci_device; +extern const device_t keyboard_ps2_acer_pci_device; +extern const device_t keyboard_ps2_ali_pci_device; #endif -extern void keyboard_init(void); -extern void keyboard_close(void); -extern void keyboard_set_table(const scancode *ptr); -extern void keyboard_poll_host(void); -extern void keyboard_process(void); -extern uint16_t keyboard_convert(int ch); -extern void keyboard_input(int down, uint16_t scan); -extern void keyboard_update_states(uint8_t cl, uint8_t nl, uint8_t sl); -extern uint8_t keyboard_get_shift(void); -extern void keyboard_get_states(uint8_t *cl, uint8_t *nl, uint8_t *sl); -extern void keyboard_set_states(uint8_t cl, uint8_t nl, uint8_t sl); -extern int keyboard_recv(uint16_t key); -extern int keyboard_isfsexit(void); -extern int keyboard_ismsexit(void); -extern void keyboard_set_is_amstrad(int ams); +extern void keyboard_init(void); +extern void keyboard_close(void); +extern void keyboard_set_table(const scancode *ptr); +extern void keyboard_poll_host(void); +extern void keyboard_process(void); +extern uint16_t keyboard_convert(int ch); +extern void keyboard_input(int down, uint16_t scan); +extern void keyboard_update_states(uint8_t cl, uint8_t nl, uint8_t sl); +extern uint8_t keyboard_get_shift(void); +extern void keyboard_get_states(uint8_t *cl, uint8_t *nl, uint8_t *sl); +extern void keyboard_set_states(uint8_t cl, uint8_t nl, uint8_t sl); +extern int keyboard_recv(uint16_t key); +extern int keyboard_isfsexit(void); +extern int keyboard_ismsexit(void); +extern void keyboard_set_is_amstrad(int ams); -extern void keyboard_at_adddata_mouse(uint8_t val); -extern void keyboard_at_adddata_mouse_direct(uint8_t val); -extern void keyboard_at_adddata_mouse_cmd(uint8_t val); -extern void keyboard_at_mouse_reset(void); -extern uint8_t keyboard_at_mouse_pos(void); -extern int keyboard_at_fixed_channel(void); -extern void keyboard_at_set_mouse(void (*mouse_write)(uint8_t val,void *), void *); -extern void keyboard_at_set_a20_key(int state); -extern void keyboard_at_set_mode(int ps2); -extern uint8_t keyboard_at_get_mouse_scan(void); -extern void keyboard_at_set_mouse_scan(uint8_t val); -extern void keyboard_at_reset(void); +extern void keyboard_at_adddata_mouse(uint8_t val); +extern void keyboard_at_adddata_mouse_direct(uint8_t val); +extern void keyboard_at_adddata_mouse_cmd(uint8_t val); +extern void keyboard_at_mouse_reset(void); +extern uint8_t keyboard_at_mouse_pos(void); +extern int keyboard_at_fixed_channel(void); +extern void keyboard_at_set_mouse(void (*mouse_write)(uint8_t val, void *), void *); +extern void keyboard_at_set_a20_key(int state); +extern void keyboard_at_set_mode(int ps2); +extern uint8_t keyboard_at_get_mouse_scan(void); +extern void keyboard_at_set_mouse_scan(uint8_t val); +extern void keyboard_at_reset(void); #ifdef __cplusplus } #endif - -#endif /*EMU_KEYBOARD_H*/ +#endif /*EMU_KEYBOARD_H*/ diff --git a/src/include/86box/language.h b/src/include/86box/language.h index 6090ee611..7ba19e630 100644 --- a/src/include/86box/language.h +++ b/src/include/86box/language.h @@ -18,242 +18,240 @@ */ #ifndef LANG_UAGE_H -# define LANG_UAGE_H - +#define LANG_UAGE_H /* String IDs. */ -#define IDS_STRINGS 2048 // "86Box" -#define IDS_2049 2049 // "Error" -#define IDS_2050 2050 // "Fatal error" -#define IDS_2051 2051 // " - PAUSED" -#define IDS_2052 2052 // "Press Ctrl+Alt+PgDn..." -#define IDS_2053 2053 // "Speed" -#define IDS_2054 2054 // "ZIP %i (%03i): %ls" -#define IDS_2055 2055 // "ZIP images (*.IM?)\0*.IM..." -#define IDS_2056 2056 // "No usable ROM images found!" -#define IDS_2057 2057 // "(empty)" -#define IDS_2058 2058 // "ZIP images (*.IM?)\0*.IM..." -#define IDS_2059 2059 // "(Turbo)" -#define IDS_2060 2060 // "On" -#define IDS_2061 2061 // "Off" -#define IDS_2062 2062 // "All floppy images (*.DSK..." -#define IDS_2063 2063 // "Machine ""%hs"" is not..." -#define IDS_2064 2064 // "Video card ""%hs"" is not..." -#define IDS_2065 2065 // "Machine" -#define IDS_2066 2066 // "Display" -#define IDS_2067 2067 // "Input devices" -#define IDS_2068 2068 // "Sound" -#define IDS_2069 2069 // "Network" -#define IDS_2070 2070 // "Ports (COM & LPT)" -#define IDS_2071 2071 // "Storage controllers" -#define IDS_2072 2072 // "Hard disks" -#define IDS_2073 2073 // "Floppy and CD-ROM drives" -#define IDS_2074 2074 // "Other removable devices" -#define IDS_2075 2075 // "Other peripherals" -#define IDS_2076 2076 // "Surface-based images (*.8.." -#define IDS_2077 2077 // "Click to capture mouse" -#define IDS_2078 2078 // "Press F12-F8 to release mouse" -#define IDS_2079 2079 // "Press F12-F8 or middle button.." -#define IDS_2080 2080 // "Unable to initialize Flui.." -#define IDS_2081 2081 // "Bus" -#define IDS_2082 2082 // "File" -#define IDS_2083 2083 // "C" -#define IDS_2084 2084 // "H" -#define IDS_2085 2085 // "S" -#define IDS_2086 2086 // "MB" -#define IDS_2087 2087 // "Check BPB" -#define IDS_2088 2088 // "KB" -#define IDS_2089 2089 // "Could not initialize the video..." -#define IDS_2090 2090 // "Default" -#define IDS_2091 2091 // "%i Wait state(s)" -#define IDS_2092 2092 // "Type" -#define IDS_2093 2093 // "PCap failed to set up.." -#define IDS_2094 2094 // "No PCap devices found" -#define IDS_2095 2095 // "Invalid PCap device" -#define IDS_2096 2096 // "Standard 2-button joystick(s)" -#define IDS_2097 2097 // "Standard 4-button joystick" -#define IDS_2098 2098 // "Standard 6-button joystick" -#define IDS_2099 2099 // "Standard 8-button joystick" -#define IDS_2100 2100 // "CH Flightstick Pro" -#define IDS_2101 2101 // "Microsoft SideWinder Pad" -#define IDS_2102 2102 // "Thrustmaster Flight Cont.." -#define IDS_2103 2103 // "None" -#define IDS_2104 2104 // "Unable to load keyboard..." -#define IDS_2105 2105 // "Unable to register raw input." -#define IDS_2106 2106 // "%u" -#define IDS_2107 2107 // "%u MB (CHS: %i, %i, %i)" -#define IDS_2108 2108 // "Floppy %i (%s): %ls" -#define IDS_2109 2109 // "All floppy images (*.0??;*.." -#define IDS_2110 2110 // "Unable to initialize Free.." -#define IDS_2111 2111 // "Unable to initialize SDL..." -#define IDS_2112 2112 // "Are you sure you want to..." -#define IDS_2113 2113 // "Are you sure you want to..." -#define IDS_2114 2114 // "Unable to initialize Ghostscript..." -#define IDS_2115 2115 // "MO %i (%03i): %ls" -#define IDS_2116 2116 // "MO images (*.IM?)\0*.IM..." -#define IDS_2117 2117 // "Welcome to 86Box!" -#define IDS_2118 2118 // "Internal controller" -#define IDS_2119 2119 // "Exit" -#define IDS_2120 2120 // "No ROMs found" -#define IDS_2121 2121 // "Do you want to save the settings?" -#define IDS_2122 2122 // "This will hard reset the emulated..." -#define IDS_2123 2123 // "Save" -#define IDS_2124 2124 // "About 86Box" -#define IDS_2125 2125 // "86Box v" EMU_VERSION -#define IDS_2126 2126 // "An emulator of old computers..." -#define IDS_2127 2127 // "OK" -#define IDS_2128 2128 // "Hardware not available" -#define IDS_2129 2129 // "Make sure " LIB_NAME_PCAP "..." -#define IDS_2130 2130 // "Invalid configuration" -#define IDS_2131 2131 // LIB_NAME_FREETYPE " is required..." -#define IDS_2132 2132 // LIB_NAME_GS " is required for... -#define IDS_2133 2133 // LIB_NAME_FLUIDSYNTH " is required..." -#define IDS_2134 2134 // "Entering fullscreen mode" -#define IDS_2135 2135 // "Don't show this message again" -#define IDS_2136 2136 // "Don't exit" -#define IDS_2137 2137 // "Reset" -#define IDS_2138 2138 // "Don't reset" -#define IDS_2139 2139 // "MO images (*.IM?)\0*.IM?..." -#define IDS_2140 2140 // "CD-ROM images (*.ISO;*.CU.." -#define IDS_2141 2141 // "%hs Device Configuration" -#define IDS_2142 2142 // "Monitor in sleep mode" -#define IDS_2143 2143 // "OpenGL Shaders (*.GLSL)..." -#define IDS_2144 2144 // "OpenGL options" -#define IDS_2145 2145 // "You are loading an unsupported..." -#define IDS_2146 2146 // "CPU type filtering based on..." -#define IDS_2147 2147 // "Continue" -#define IDS_2148 2148 // "Cassette: %s" -#define IDS_2149 2149 // "Cassette images (*.PCM;*.RAW;*..." -#define IDS_2150 2150 // "Cartridge %i: %ls" -#define IDS_2151 2151 // "Cartridge images (*.JRC)\0*.JRC\0..." -#define IDS_2152 2152 // "Error initializing renderer" -#define IDS_2153 2153 // "OpenGL (3.0 Core) renderer could not be initialized. Use another renderer." -#define IDS_2154 2154 // "Resume execution" -#define IDS_2155 2155 // "Pause execution" -#define IDS_2156 2156 // "Press Ctrl+Alt+Del" -#define IDS_2157 2157 // "Press Ctrl+Alt+Esc" -#define IDS_2158 2158 // "Hard reset" -#define IDS_2159 2159 // "ACPI shutdown" -#define IDS_2160 2160 // "Settings" +#define IDS_STRINGS 2048 // "86Box" +#define IDS_2049 2049 // "Error" +#define IDS_2050 2050 // "Fatal error" +#define IDS_2051 2051 // " - PAUSED" +#define IDS_2052 2052 // "Press Ctrl+Alt+PgDn..." +#define IDS_2053 2053 // "Speed" +#define IDS_2054 2054 // "ZIP %i (%03i): %ls" +#define IDS_2055 2055 // "ZIP images (*.IM?)\0*.IM..." +#define IDS_2056 2056 // "No usable ROM images found!" +#define IDS_2057 2057 // "(empty)" +#define IDS_2058 2058 // "ZIP images (*.IM?)\0*.IM..." +#define IDS_2059 2059 // "(Turbo)" +#define IDS_2060 2060 // "On" +#define IDS_2061 2061 // "Off" +#define IDS_2062 2062 // "All floppy images (*.DSK..." +#define IDS_2063 2063 // "Machine ""%hs"" is not..." +#define IDS_2064 2064 // "Video card ""%hs"" is not..." +#define IDS_2065 2065 // "Machine" +#define IDS_2066 2066 // "Display" +#define IDS_2067 2067 // "Input devices" +#define IDS_2068 2068 // "Sound" +#define IDS_2069 2069 // "Network" +#define IDS_2070 2070 // "Ports (COM & LPT)" +#define IDS_2071 2071 // "Storage controllers" +#define IDS_2072 2072 // "Hard disks" +#define IDS_2073 2073 // "Floppy and CD-ROM drives" +#define IDS_2074 2074 // "Other removable devices" +#define IDS_2075 2075 // "Other peripherals" +#define IDS_2076 2076 // "Surface-based images (*.8.." +#define IDS_2077 2077 // "Click to capture mouse" +#define IDS_2078 2078 // "Press F12-F8 to release mouse" +#define IDS_2079 2079 // "Press F12-F8 or middle button.." +#define IDS_2080 2080 // "Unable to initialize Flui.." +#define IDS_2081 2081 // "Bus" +#define IDS_2082 2082 // "File" +#define IDS_2083 2083 // "C" +#define IDS_2084 2084 // "H" +#define IDS_2085 2085 // "S" +#define IDS_2086 2086 // "MB" +#define IDS_2087 2087 // "Check BPB" +#define IDS_2088 2088 // "KB" +#define IDS_2089 2089 // "Could not initialize the video..." +#define IDS_2090 2090 // "Default" +#define IDS_2091 2091 // "%i Wait state(s)" +#define IDS_2092 2092 // "Type" +#define IDS_2093 2093 // "PCap failed to set up.." +#define IDS_2094 2094 // "No PCap devices found" +#define IDS_2095 2095 // "Invalid PCap device" +#define IDS_2096 2096 // "Standard 2-button joystick(s)" +#define IDS_2097 2097 // "Standard 4-button joystick" +#define IDS_2098 2098 // "Standard 6-button joystick" +#define IDS_2099 2099 // "Standard 8-button joystick" +#define IDS_2100 2100 // "CH Flightstick Pro" +#define IDS_2101 2101 // "Microsoft SideWinder Pad" +#define IDS_2102 2102 // "Thrustmaster Flight Cont.." +#define IDS_2103 2103 // "None" +#define IDS_2104 2104 // "Unable to load keyboard..." +#define IDS_2105 2105 // "Unable to register raw input." +#define IDS_2106 2106 // "%u" +#define IDS_2107 2107 // "%u MB (CHS: %i, %i, %i)" +#define IDS_2108 2108 // "Floppy %i (%s): %ls" +#define IDS_2109 2109 // "All floppy images (*.0??;*.." +#define IDS_2110 2110 // "Unable to initialize Free.." +#define IDS_2111 2111 // "Unable to initialize SDL..." +#define IDS_2112 2112 // "Are you sure you want to..." +#define IDS_2113 2113 // "Are you sure you want to..." +#define IDS_2114 2114 // "Unable to initialize Ghostscript..." +#define IDS_2115 2115 // "MO %i (%03i): %ls" +#define IDS_2116 2116 // "MO images (*.IM?)\0*.IM..." +#define IDS_2117 2117 // "Welcome to 86Box!" +#define IDS_2118 2118 // "Internal controller" +#define IDS_2119 2119 // "Exit" +#define IDS_2120 2120 // "No ROMs found" +#define IDS_2121 2121 // "Do you want to save the settings?" +#define IDS_2122 2122 // "This will hard reset the emulated..." +#define IDS_2123 2123 // "Save" +#define IDS_2124 2124 // "About 86Box" +#define IDS_2125 2125 // "86Box v" EMU_VERSION +#define IDS_2126 2126 // "An emulator of old computers..." +#define IDS_2127 2127 // "OK" +#define IDS_2128 2128 // "Hardware not available" +#define IDS_2129 2129 // "Make sure " LIB_NAME_PCAP "..." +#define IDS_2130 2130 // "Invalid configuration" +#define IDS_2131 2131 // LIB_NAME_FREETYPE " is required..." +#define IDS_2132 2132 // LIB_NAME_GS " is required for... +#define IDS_2133 2133 // LIB_NAME_FLUIDSYNTH " is required..." +#define IDS_2134 2134 // "Entering fullscreen mode" +#define IDS_2135 2135 // "Don't show this message again" +#define IDS_2136 2136 // "Don't exit" +#define IDS_2137 2137 // "Reset" +#define IDS_2138 2138 // "Don't reset" +#define IDS_2139 2139 // "MO images (*.IM?)\0*.IM?..." +#define IDS_2140 2140 // "CD-ROM images (*.ISO;*.CU.." +#define IDS_2141 2141 // "%hs Device Configuration" +#define IDS_2142 2142 // "Monitor in sleep mode" +#define IDS_2143 2143 // "OpenGL Shaders (*.GLSL)..." +#define IDS_2144 2144 // "OpenGL options" +#define IDS_2145 2145 // "You are loading an unsupported..." +#define IDS_2146 2146 // "CPU type filtering based on..." +#define IDS_2147 2147 // "Continue" +#define IDS_2148 2148 // "Cassette: %s" +#define IDS_2149 2149 // "Cassette images (*.PCM;*.RAW;*..." +#define IDS_2150 2150 // "Cartridge %i: %ls" +#define IDS_2151 2151 // "Cartridge images (*.JRC)\0*.JRC\0..." +#define IDS_2152 2152 // "Error initializing renderer" +#define IDS_2153 2153 // "OpenGL (3.0 Core) renderer could not be initialized. Use another renderer." +#define IDS_2154 2154 // "Resume execution" +#define IDS_2155 2155 // "Pause execution" +#define IDS_2156 2156 // "Press Ctrl+Alt+Del" +#define IDS_2157 2157 // "Press Ctrl+Alt+Esc" +#define IDS_2158 2158 // "Hard reset" +#define IDS_2159 2159 // "ACPI shutdown" +#define IDS_2160 2160 // "Settings" -#define IDS_4096 4096 // "Hard disk (%s)" -#define IDS_4097 4097 // "%01i:%01i" -#define IDS_4098 4098 // "%i" -#define IDS_4099 4099 // "MFM/RLL or ESDI CD-ROM driv.." -#define IDS_4100 4100 // "Custom..." -#define IDS_4101 4101 // "Custom (large)..." -#define IDS_4102 4102 // "Add New Hard Disk" -#define IDS_4103 4103 // "Add Existing Hard Disk" -#define IDS_4104 4104 // "HDI disk images cannot be..." -#define IDS_4105 4105 // "Disk images cannot be larger..." -#define IDS_4106 4106 // "Hard disk images (*.HDI;*.HD.." -#define IDS_4107 4107 // "Unable to open the file for read" -#define IDS_4108 4108 // "Unable to open the file for write" -#define IDS_4109 4109 // "HDI or HDX image with a sect.." -#define IDS_4110 4110 // "USB is not yet supported" -#define IDS_4111 4111 // "Disk image file already exists" -#define IDS_4112 4112 // "Please specify a valid file name." -#define IDS_4113 4113 // "Remember to partition and fo.." -#define IDS_4114 4114 // "Make sure the file exists and..." -#define IDS_4115 4115 // "Make sure the file is being..." -#define IDS_4116 4116 // "Disk image too large" -#define IDS_4117 4117 // "Remember to partition and format..." -#define IDS_4118 4118 // "The selected file will be..." -#define IDS_4119 4119 // "Unsupported disk image" -#define IDS_4120 4120 // "Overwrite" -#define IDS_4121 4121 // "Don't overwrite" -#define IDS_4122 4122 // "Raw image (.img)" -#define IDS_4123 4123 // "HDI image (.hdi)" -#define IDS_4124 4124 // "HDX image (.hdx)" -#define IDS_4125 4125 // "Fixed-size VHD (.vhd)" -#define IDS_4126 4126 // "Dynamic-size VHD (.vhd)" -#define IDS_4127 4127 // "Differencing VHD (.vhd)" -#define IDS_4128 4128 // "Large blocks (2 MB)" -#define IDS_4129 4129 // "Small blocks (512 KB)" -#define IDS_4130 4130 // "VHD files (*.VHD)\0*.VHD\0All..." -#define IDS_4131 4131 // "Select the parent VHD" -#define IDS_4132 4132 // "This could mean that the parent..." -#define IDS_4133 4133 // "Parent and child disk timestamps..." -#define IDS_4134 4134 // "Could not fix VHD timestamp." -#define IDS_4135 4135 // "%01i:%02i" +#define IDS_4096 4096 // "Hard disk (%s)" +#define IDS_4097 4097 // "%01i:%01i" +#define IDS_4098 4098 // "%i" +#define IDS_4099 4099 // "MFM/RLL or ESDI CD-ROM driv.." +#define IDS_4100 4100 // "Custom..." +#define IDS_4101 4101 // "Custom (large)..." +#define IDS_4102 4102 // "Add New Hard Disk" +#define IDS_4103 4103 // "Add Existing Hard Disk" +#define IDS_4104 4104 // "HDI disk images cannot be..." +#define IDS_4105 4105 // "Disk images cannot be larger..." +#define IDS_4106 4106 // "Hard disk images (*.HDI;*.HD.." +#define IDS_4107 4107 // "Unable to open the file for read" +#define IDS_4108 4108 // "Unable to open the file for write" +#define IDS_4109 4109 // "HDI or HDX image with a sect.." +#define IDS_4110 4110 // "USB is not yet supported" +#define IDS_4111 4111 // "Disk image file already exists" +#define IDS_4112 4112 // "Please specify a valid file name." +#define IDS_4113 4113 // "Remember to partition and fo.." +#define IDS_4114 4114 // "Make sure the file exists and..." +#define IDS_4115 4115 // "Make sure the file is being..." +#define IDS_4116 4116 // "Disk image too large" +#define IDS_4117 4117 // "Remember to partition and format..." +#define IDS_4118 4118 // "The selected file will be..." +#define IDS_4119 4119 // "Unsupported disk image" +#define IDS_4120 4120 // "Overwrite" +#define IDS_4121 4121 // "Don't overwrite" +#define IDS_4122 4122 // "Raw image (.img)" +#define IDS_4123 4123 // "HDI image (.hdi)" +#define IDS_4124 4124 // "HDX image (.hdx)" +#define IDS_4125 4125 // "Fixed-size VHD (.vhd)" +#define IDS_4126 4126 // "Dynamic-size VHD (.vhd)" +#define IDS_4127 4127 // "Differencing VHD (.vhd)" +#define IDS_4128 4128 // "Large blocks (2 MB)" +#define IDS_4129 4129 // "Small blocks (512 KB)" +#define IDS_4130 4130 // "VHD files (*.VHD)\0*.VHD\0All..." +#define IDS_4131 4131 // "Select the parent VHD" +#define IDS_4132 4132 // "This could mean that the parent..." +#define IDS_4133 4133 // "Parent and child disk timestamps..." +#define IDS_4134 4134 // "Could not fix VHD timestamp." +#define IDS_4135 4135 // "%01i:%02i" -#define IDS_4352 4352 // "MFM/RLL" -#define IDS_4353 4353 // "XT IDE" -#define IDS_4354 4354 // "ESDI" -#define IDS_4355 4355 // "IDE" -#define IDS_4356 4356 // "ATAPI" -#define IDS_4357 4357 // "SCSI" +#define IDS_4352 4352 // "MFM/RLL" +#define IDS_4353 4353 // "XT IDE" +#define IDS_4354 4354 // "ESDI" +#define IDS_4355 4355 // "IDE" +#define IDS_4356 4356 // "ATAPI" +#define IDS_4357 4357 // "SCSI" -#define IDS_4608 4608 // "MFM/RLL (%01i:%01i)" -#define IDS_4609 4609 // "XT IDE (%01i:%01i)" -#define IDS_4610 4610 // "ESDI (%01i:%01i)" -#define IDS_4611 4611 // "IDE (%01i:%01i)" -#define IDS_4612 4612 // "ATAPI (%01i:%01i)" -#define IDS_4613 4613 // "SCSI (%02i:%02i)" +#define IDS_4608 4608 // "MFM/RLL (%01i:%01i)" +#define IDS_4609 4609 // "XT IDE (%01i:%01i)" +#define IDS_4610 4610 // "ESDI (%01i:%01i)" +#define IDS_4611 4611 // "IDE (%01i:%01i)" +#define IDS_4612 4612 // "ATAPI (%01i:%01i)" +#define IDS_4613 4613 // "SCSI (%02i:%02i)" -#define IDS_5120 5120 // "CD-ROM %i (%s): %s" +#define IDS_5120 5120 // "CD-ROM %i (%s): %s" -#define IDS_5376 5376 // "Disabled" -#define IDS_5377 5377 // -#define IDS_5378 5378 // -#define IDS_5379 5379 // -#define IDS_5380 5380 // -#define IDS_5381 5381 // "ATAPI" -#define IDS_5382 5382 // "SCSI" +#define IDS_5376 5376 // "Disabled" +#define IDS_5377 5377 // +#define IDS_5378 5378 // +#define IDS_5379 5379 // +#define IDS_5380 5380 // +#define IDS_5381 5381 // "ATAPI" +#define IDS_5382 5382 // "SCSI" -#define IDS_5632 5632 // "Disabled" -#define IDS_5633 5633 // -#define IDS_5634 5634 // -#define IDS_5635 5635 // -#define IDS_5636 5636 // -#define IDS_5637 5637 // "ATAPI (%01i:%01i)" -#define IDS_5638 5638 // "SCSI (%02i:%02i)" +#define IDS_5632 5632 // "Disabled" +#define IDS_5633 5633 // +#define IDS_5634 5634 // +#define IDS_5635 5635 // +#define IDS_5636 5636 // +#define IDS_5637 5637 // "ATAPI (%01i:%01i)" +#define IDS_5638 5638 // "SCSI (%02i:%02i)" -#define IDS_5888 5888 // "160 kB" -#define IDS_5889 5889 // "180 kB" -#define IDS_5890 5890 // "320 kB" -#define IDS_5891 5891 // "360 kB" -#define IDS_5892 5892 // "640 kB" -#define IDS_5893 5893 // "720 kB" -#define IDS_5894 5894 // "1.2 MB" -#define IDS_5895 5895 // "1.25 MB" -#define IDS_5896 5896 // "1.44 MB" -#define IDS_5897 5897 // "DMF (cluster 1024)" -#define IDS_5898 5898 // "DMF (cluster 2048)" -#define IDS_5899 5899 // "2.88 MB" -#define IDS_5900 5900 // "ZIP 100" -#define IDS_5901 5901 // "ZIP 250" -#define IDS_5902 5902 // "3.5\" 128 MB (ISO 10090)" -#define IDS_5903 5903 // "3.5\" 230 MB (ISO 13963)" -#define IDS_5904 5904 // "3.5\" 540 MB (ISO 15498)" -#define IDS_5905 5905 // "3.5\" 640 MB (ISO 15498)" -#define IDS_5906 5906 // "3.5\" 1.3 GB (GigaMO)" -#define IDS_5907 5907 // "3.5\" 2.3 GB (GigaMO 2)" -#define IDS_5908 5908 // "5.25\" 600 MB" -#define IDS_5909 5909 // "5.25\" 650 MB" -#define IDS_5910 5910 // "5.25\" 1 GB" -#define IDS_5911 5911 // "5.25\" 1.3 GB" +#define IDS_5888 5888 // "160 kB" +#define IDS_5889 5889 // "180 kB" +#define IDS_5890 5890 // "320 kB" +#define IDS_5891 5891 // "360 kB" +#define IDS_5892 5892 // "640 kB" +#define IDS_5893 5893 // "720 kB" +#define IDS_5894 5894 // "1.2 MB" +#define IDS_5895 5895 // "1.25 MB" +#define IDS_5896 5896 // "1.44 MB" +#define IDS_5897 5897 // "DMF (cluster 1024)" +#define IDS_5898 5898 // "DMF (cluster 2048)" +#define IDS_5899 5899 // "2.88 MB" +#define IDS_5900 5900 // "ZIP 100" +#define IDS_5901 5901 // "ZIP 250" +#define IDS_5902 5902 // "3.5\" 128 MB (ISO 10090)" +#define IDS_5903 5903 // "3.5\" 230 MB (ISO 13963)" +#define IDS_5904 5904 // "3.5\" 540 MB (ISO 15498)" +#define IDS_5905 5905 // "3.5\" 640 MB (ISO 15498)" +#define IDS_5906 5906 // "3.5\" 1.3 GB (GigaMO)" +#define IDS_5907 5907 // "3.5\" 2.3 GB (GigaMO 2)" +#define IDS_5908 5908 // "5.25\" 600 MB" +#define IDS_5909 5909 // "5.25\" 650 MB" +#define IDS_5910 5910 // "5.25\" 1 GB" +#define IDS_5911 5911 // "5.25\" 1.3 GB" -#define IDS_6144 6144 // "Perfect RPM" -#define IDS_6145 6145 // "1%% below perfect RPM" -#define IDS_6146 6146 // "1.5%% below perfect RPM" -#define IDS_6147 6147 // "2%% below perfect RPM" +#define IDS_6144 6144 // "Perfect RPM" +#define IDS_6145 6145 // "1%% below perfect RPM" +#define IDS_6146 6146 // "1.5%% below perfect RPM" +#define IDS_6147 6147 // "2%% below perfect RPM" -#define IDS_7168 7168 // "(System Default)" +#define IDS_7168 7168 // "(System Default)" -#define IDS_LANG_ENUS IDS_7168 +#define IDS_LANG_ENUS IDS_7168 -#define STR_NUM_2048 106 -#define STR_NUM_3072 11 -#define STR_NUM_4096 40 -#define STR_NUM_4352 6 -#define STR_NUM_4608 6 -#define STR_NUM_5120 1 -#define STR_NUM_5376 7 -#define STR_NUM_5632 7 -#define STR_NUM_5888 24 -#define STR_NUM_6144 4 -#define STR_NUM_7168 1 +#define STR_NUM_2048 106 +#define STR_NUM_3072 11 +#define STR_NUM_4096 40 +#define STR_NUM_4352 6 +#define STR_NUM_4608 6 +#define STR_NUM_5120 1 +#define STR_NUM_5376 7 +#define STR_NUM_5632 7 +#define STR_NUM_5888 24 +#define STR_NUM_6144 4 +#define STR_NUM_7168 1 - -#endif /*LANG_UAGE_H*/ +#endif /*LANG_UAGE_H*/ diff --git a/src/include/86box/log.h b/src/include/86box/log.h index 3b4235b2c..b736ef2b6 100644 --- a/src/include/86box/log.h +++ b/src/include/86box/log.h @@ -18,30 +18,30 @@ */ #ifndef EMU_LOG_H -# define EMU_LOG_H +#define EMU_LOG_H #ifndef RELEASE_BUILD -#ifdef __cplusplus +# ifdef __cplusplus extern "C" { -#endif +# endif /* Function prototypes. */ -extern void log_set_suppr_seen(void *priv, int suppr_seen); -extern void log_set_dev_name(void *priv, char *dev_name); -#ifdef HAVE_STDARG_H -extern void log_out(void *priv, const char *fmt, va_list); -extern void log_fatal(void *priv, const char *fmt, ...); -#endif -extern void * log_open(char *dev_name); -extern void log_close(void *priv); +extern void log_set_suppr_seen(void *priv, int suppr_seen); +extern void log_set_dev_name(void *priv, char *dev_name); +# ifdef HAVE_STDARG_H +extern void log_out(void *priv, const char *fmt, va_list); +extern void log_fatal(void *priv, const char *fmt, ...); +# endif +extern void *log_open(char *dev_name); +extern void log_close(void *priv); -#ifdef __cplusplus +# ifdef __cplusplus } -#endif +# endif #else -#define log_fatal(priv, fmt, ...) fatal(fmt, ...) -#endif /*RELEASE_BUILD*/ +# define log_fatal(priv, fmt, ...) fatal(fmt, ...) +#endif /*RELEASE_BUILD*/ -#endif /*EMU_LOG_H*/ +#endif /*EMU_LOG_H*/ diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index 32163142f..d8ec3b5f2 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -23,118 +23,119 @@ #define EMU_MACHINE_H /* Machine feature flags. */ -#define MACHINE_BUS_NONE 0x00000000 /* sys has no bus */ +#define MACHINE_BUS_NONE 0x00000000 /* sys has no bus */ /* Feature flags for BUS'es. */ -#define MACHINE_BUS_ISA 0x00000001 /* sys has ISA bus */ -#define MACHINE_BUS_CARTRIDGE 0x00000002 /* sys has two cartridge bays */ -#define MACHINE_BUS_ISA16 0x00000004 /* sys has ISA16 bus - PC/AT architecture */ -#define MACHINE_BUS_CBUS 0x00000008 /* sys has C-BUS bus */ -#define MACHINE_BUS_PS2 0x00000010 /* system has PS/2 keyboard and mouse ports */ -#define MACHINE_BUS_EISA 0x00000020 /* sys has EISA bus */ -#define MACHINE_BUS_VLB 0x00000040 /* sys has VL bus */ -#define MACHINE_BUS_MCA 0x00000080 /* sys has MCA bus */ -#define MACHINE_BUS_PCI 0x00000100 /* sys has PCI bus */ -#define MACHINE_BUS_PCMCIA 0x00000200 /* sys has PCMCIA bus */ -#define MACHINE_BUS_AGP 0x00000400 /* sys has AGP bus */ -#define MACHINE_BUS_AC97 0x00000800 /* sys has AC97 bus (ACR/AMR/CNR slot) */ +#define MACHINE_BUS_ISA 0x00000001 /* sys has ISA bus */ +#define MACHINE_BUS_CARTRIDGE 0x00000002 /* sys has two cartridge bays */ +#define MACHINE_BUS_ISA16 0x00000004 /* sys has ISA16 bus - PC/AT architecture */ +#define MACHINE_BUS_CBUS 0x00000008 /* sys has C-BUS bus */ +#define MACHINE_BUS_PS2 0x00000010 /* system has PS/2 keyboard and mouse ports */ +#define MACHINE_BUS_EISA 0x00000020 /* sys has EISA bus */ +#define MACHINE_BUS_VLB 0x00000040 /* sys has VL bus */ +#define MACHINE_BUS_MCA 0x00000080 /* sys has MCA bus */ +#define MACHINE_BUS_PCI 0x00000100 /* sys has PCI bus */ +#define MACHINE_BUS_PCMCIA 0x00000200 /* sys has PCMCIA bus */ +#define MACHINE_BUS_AGP 0x00000400 /* sys has AGP bus */ +#define MACHINE_BUS_AC97 0x00000800 /* sys has AC97 bus (ACR/AMR/CNR slot) */ /* Aliases. */ -#define MACHINE_CARTRIDGE (MACHINE_BUS_CARTRIDGE) /* sys has two cartridge bays */ +#define MACHINE_CARTRIDGE (MACHINE_BUS_CARTRIDGE) /* sys has two cartridge bays */ /* Combined flags. */ -#define MACHINE_PC (MACHINE_BUS_ISA) /* sys is PC/XT-compatible (ISA) */ -#define MACHINE_AT (MACHINE_BUS_ISA | MACHINE_BUS_ISA16) /* sys is AT-compatible (ISA + ISA16) */ -#define MACHINE_PC98 (MACHINE_BUS_CBUS) /* sys is NEC PC-98x1 series */ -#define MACHINE_EISA (MACHINE_BUS_EISA | MACHINE_AT) /* sys is AT-compatible with EISA */ -#define MACHINE_VLB (MACHINE_BUS_VLB | MACHINE_AT) /* sys is AT-compatible with VLB */ -#define MACHINE_VLB98 (MACHINE_BUS_VLB | MACHINE_PC98) /* sys is NEC PC-98x1 series with VLB (did that even exist?) */ -#define MACHINE_VLBE (MACHINE_BUS_VLB | MACHINE_EISA) /* sys is AT-compatible with EISA and VLB */ -#define MACHINE_MCA (MACHINE_BUS_MCA) /* sys is MCA */ -#define MACHINE_PCI (MACHINE_BUS_PCI | MACHINE_AT) /* sys is AT-compatible with PCI */ -#define MACHINE_PCI98 (MACHINE_BUS_PCI | MACHINE_PC98) /* sys is NEC PC-98x1 series with PCI */ -#define MACHINE_PCIE (MACHINE_BUS_PCI | MACHINE_EISA) /* sys is AT-compatible with PCI, and EISA */ -#define MACHINE_PCIV (MACHINE_BUS_PCI | MACHINE_VLB) /* sys is AT-compatible with PCI and VLB */ -#define MACHINE_PCIVE (MACHINE_BUS_PCI | MACHINE_VLBE) /* sys is AT-compatible with PCI, VLB, and EISA */ -#define MACHINE_PCMCIA (MACHINE_BUS_PCMCIA | MACHINE_AT) /* sys is AT-compatible laptop with PCMCIA */ -#define MACHINE_AGP (MACHINE_BUS_AGP | MACHINE_PCI) /* sys is AT-compatible with AGP */ -#define MACHINE_AGP98 (MACHINE_BUS_AGP | MACHINE_PCI98) /* sys is NEC PC-98x1 series with AGP (did that even exist?) */ +#define MACHINE_PC (MACHINE_BUS_ISA) /* sys is PC/XT-compatible (ISA) */ +#define MACHINE_AT (MACHINE_BUS_ISA | MACHINE_BUS_ISA16) /* sys is AT-compatible (ISA + ISA16) */ +#define MACHINE_PC98 (MACHINE_BUS_CBUS) /* sys is NEC PC-98x1 series */ +#define MACHINE_EISA (MACHINE_BUS_EISA | MACHINE_AT) /* sys is AT-compatible with EISA */ +#define MACHINE_VLB (MACHINE_BUS_VLB | MACHINE_AT) /* sys is AT-compatible with VLB */ +#define MACHINE_VLB98 (MACHINE_BUS_VLB | MACHINE_PC98) /* sys is NEC PC-98x1 series with VLB (did that even exist?) */ +#define MACHINE_VLBE (MACHINE_BUS_VLB | MACHINE_EISA) /* sys is AT-compatible with EISA and VLB */ +#define MACHINE_MCA (MACHINE_BUS_MCA) /* sys is MCA */ +#define MACHINE_PCI (MACHINE_BUS_PCI | MACHINE_AT) /* sys is AT-compatible with PCI */ +#define MACHINE_PCI98 (MACHINE_BUS_PCI | MACHINE_PC98) /* sys is NEC PC-98x1 series with PCI */ +#define MACHINE_PCIE (MACHINE_BUS_PCI | MACHINE_EISA) /* sys is AT-compatible with PCI, and EISA */ +#define MACHINE_PCIV (MACHINE_BUS_PCI | MACHINE_VLB) /* sys is AT-compatible with PCI and VLB */ +#define MACHINE_PCIVE (MACHINE_BUS_PCI | MACHINE_VLBE) /* sys is AT-compatible with PCI, VLB, and EISA */ +#define MACHINE_PCMCIA (MACHINE_BUS_PCMCIA | MACHINE_AT) /* sys is AT-compatible laptop with PCMCIA */ +#define MACHINE_AGP (MACHINE_BUS_AGP | MACHINE_PCI) /* sys is AT-compatible with AGP */ +#define MACHINE_AGP98 (MACHINE_BUS_AGP | MACHINE_PCI98) /* sys is NEC PC-98x1 series with AGP (did that even exist?) */ -#define MACHINE_PCJR (MACHINE_PC | MACHINE_CARTRIDGE) /* sys is PCjr */ -#define MACHINE_PS2 (MACHINE_AT | MACHINE_BUS_PS2) /* sys is PS/2 */ -#define MACHINE_PS2_MCA (MACHINE_MCA | MACHINE_BUS_PS2) /* sys is MCA PS/2 */ -#define MACHINE_PS2_VLB (MACHINE_VLB | MACHINE_BUS_PS2) /* sys is VLB PS/2 */ -#define MACHINE_PS2_PCI (MACHINE_PCI | MACHINE_BUS_PS2) /* sys is PCI PS/2 */ -#define MACHINE_PS2_PCIV (MACHINE_PCIV | MACHINE_BUS_PS2) /* sys is VLB/PCI PS/2 */ -#define MACHINE_PS2_AGP (MACHINE_AGP | MACHINE_BUS_PS2) /* sys is AGP PS/2 */ -#define MACHINE_PS2_A97 (MACHINE_PS2_AGP | MACHINE_BUS_AC97) /* sys is AGP/AC97 PS/2 */ -#define MACHINE_PS2_NOISA (MACHINE_PS2_AGP & ~MACHINE_AT) /* sys is AGP PS/2 without ISA */ -#define MACHINE_PS2_NOI97 (MACHINE_PS2_A97 & ~MACHINE_AT) /* sys is AGP/AC97 PS/2 without ISA */ +#define MACHINE_PCJR (MACHINE_PC | MACHINE_CARTRIDGE) /* sys is PCjr */ +#define MACHINE_PS2 (MACHINE_AT | MACHINE_BUS_PS2) /* sys is PS/2 */ +#define MACHINE_PS2_MCA (MACHINE_MCA | MACHINE_BUS_PS2) /* sys is MCA PS/2 */ +#define MACHINE_PS2_VLB (MACHINE_VLB | MACHINE_BUS_PS2) /* sys is VLB PS/2 */ +#define MACHINE_PS2_PCI (MACHINE_PCI | MACHINE_BUS_PS2) /* sys is PCI PS/2 */ +#define MACHINE_PS2_PCIV (MACHINE_PCIV | MACHINE_BUS_PS2) /* sys is VLB/PCI PS/2 */ +#define MACHINE_PS2_AGP (MACHINE_AGP | MACHINE_BUS_PS2) /* sys is AGP PS/2 */ +#define MACHINE_PS2_A97 (MACHINE_PS2_AGP | MACHINE_BUS_AC97) /* sys is AGP/AC97 PS/2 */ +#define MACHINE_PS2_NOISA (MACHINE_PS2_AGP & ~MACHINE_AT) /* sys is AGP PS/2 without ISA */ +#define MACHINE_PS2_NOI97 (MACHINE_PS2_A97 & ~MACHINE_AT) /* sys is AGP/AC97 PS/2 without ISA */ /* Feature flags for miscellaneous internal devices. */ -#define MACHINE_FLAGS_NONE 0x00000000 /* sys has no int devices */ -#define MACHINE_VIDEO 0x00000001 /* sys has int video */ -#define MACHINE_VIDEO_ONLY 0x00000002 /* sys has fixed video */ -#define MACHINE_MOUSE 0x00000004 /* sys has int mouse */ -#define MACHINE_FDC 0x00000008 /* sys has int FDC */ -#define MACHINE_LPT_PRI 0x00000010 /* sys has int pri LPT */ -#define MACHINE_LPT_SEC 0x00000020 /* sys has int sec LPT */ -#define MACHINE_UART_PRI 0x00000040 /* sys has int pri UART */ -#define MACHINE_UART_SEC 0x00000080 /* sys has int sec UART */ -#define MACHINE_UART_TER 0x00000100 /* sys has int ter UART */ -#define MACHINE_UART_QUA 0x00000200 /* sys has int qua UART */ -#define MACHINE_GAMEPORT 0x00000400 /* sys has int game port */ -#define MACHINE_SOUND 0x00000800 /* sys has int sound */ -#define MACHINE_NIC 0x00001000 /* sys has int NIC */ -#define MACHINE_MODEM 0x00002000 /* sys has int modem */ +#define MACHINE_FLAGS_NONE 0x00000000 /* sys has no int devices */ +#define MACHINE_VIDEO 0x00000001 /* sys has int video */ +#define MACHINE_VIDEO_ONLY 0x00000002 /* sys has fixed video */ +#define MACHINE_MOUSE 0x00000004 /* sys has int mouse */ +#define MACHINE_FDC 0x00000008 /* sys has int FDC */ +#define MACHINE_LPT_PRI 0x00000010 /* sys has int pri LPT */ +#define MACHINE_LPT_SEC 0x00000020 /* sys has int sec LPT */ +#define MACHINE_UART_PRI 0x00000040 /* sys has int pri UART */ +#define MACHINE_UART_SEC 0x00000080 /* sys has int sec UART */ +#define MACHINE_UART_TER 0x00000100 /* sys has int ter UART */ +#define MACHINE_UART_QUA 0x00000200 /* sys has int qua UART */ +#define MACHINE_GAMEPORT 0x00000400 /* sys has int game port */ +#define MACHINE_SOUND 0x00000800 /* sys has int sound */ +#define MACHINE_NIC 0x00001000 /* sys has int NIC */ +#define MACHINE_MODEM 0x00002000 /* sys has int modem */ /* Feature flags for advanced devices. */ -#define MACHINE_APM 0x00004000 /* sys has APM */ -#define MACHINE_ACPI 0x00008000 /* sys has ACPI */ -#define MACHINE_HWM 0x00010000 /* sys has hw monitor */ +#define MACHINE_APM 0x00004000 /* sys has APM */ +#define MACHINE_ACPI 0x00008000 /* sys has ACPI */ +#define MACHINE_HWM 0x00010000 /* sys has hw monitor */ /* Combined flags. */ -#define MACHINE_VIDEO_FIXED (MACHINE_VIDEO | MACHINE_VIDEO_ONLY) /* sys has fixed int video */ +#define MACHINE_VIDEO_FIXED (MACHINE_VIDEO | MACHINE_VIDEO_ONLY) /* sys has fixed int video */ #define MACHINE_SUPER_IO (MACHINE_FDC | MACHINE_LPT_PRI | MACHINE_UART_PRI | MACHINE_UART_SEC) #define MACHINE_SUPER_IO_GAME (MACHINE_SUPER_IO | MACHINE_GAMEPORT) #define MACHINE_SUPER_IO_DUAL (MACHINE_SUPER_IO | MACHINE_LPT_SEC | MACHINE_UART_TER | MACHINE_UART_QUA) -#define MACHINE_AV (MACHINE_VIDEO | MACHINE_SOUND) /* sys has video and sound */ -#define MACHINE_AG (MACHINE_SOUND | MACHINE_GAMEPORT) /* sys has sound and game port */ +#define MACHINE_AV (MACHINE_VIDEO | MACHINE_SOUND) /* sys has video and sound */ +#define MACHINE_AG (MACHINE_SOUND | MACHINE_GAMEPORT) /* sys has sound and game port */ /* Feature flags for internal storage controllers. */ -#define MACHINE_HDC 0x03FE0000 /* sys has int HDC */ -#define MACHINE_MFM 0x00020000 /* sys has int MFM/RLL */ -#define MACHINE_XTA 0x00040000 /* sys has int XTA */ -#define MACHINE_ESDI 0x00080000 /* sys has int ESDI */ -#define MACHINE_IDE_PRI 0x00100000 /* sys has int pri IDE/ATAPI */ -#define MACHINE_IDE_SEC 0x00200000 /* sys has int sec IDE/ATAPI */ -#define MACHINE_IDE_TER 0x00400000 /* sys has int ter IDE/ATAPI */ -#define MACHINE_IDE_QUA 0x00800000 /* sys has int qua IDE/ATAPI */ -#define MACHINE_SCSI_PRI 0x01000000 /* sys has int pri SCSI */ -#define MACHINE_SCSI_SEC 0x02000000 /* sys has int sec SCSI */ -#define MACHINE_USB_PRI 0x04000000 /* sys has int pri USB */ -#define MACHINE_USB_SEC 0x08000000 /* sys has int sec USB */ +#define MACHINE_HDC 0x03FE0000 /* sys has int HDC */ +#define MACHINE_MFM 0x00020000 /* sys has int MFM/RLL */ +#define MACHINE_XTA 0x00040000 /* sys has int XTA */ +#define MACHINE_ESDI 0x00080000 /* sys has int ESDI */ +#define MACHINE_IDE_PRI 0x00100000 /* sys has int pri IDE/ATAPI */ +#define MACHINE_IDE_SEC 0x00200000 /* sys has int sec IDE/ATAPI */ +#define MACHINE_IDE_TER 0x00400000 /* sys has int ter IDE/ATAPI */ +#define MACHINE_IDE_QUA 0x00800000 /* sys has int qua IDE/ATAPI */ +#define MACHINE_SCSI_PRI 0x01000000 /* sys has int pri SCSI */ +#define MACHINE_SCSI_SEC 0x02000000 /* sys has int sec SCSI */ +#define MACHINE_USB_PRI 0x04000000 /* sys has int pri USB */ +#define MACHINE_USB_SEC 0x08000000 /* sys has int sec USB */ /* Combined flags. */ -#define MACHINE_IDE (MACHINE_IDE_PRI) /* sys has int single IDE/ATAPI - mark as pri IDE/ATAPI */ -#define MACHINE_IDE_DUAL (MACHINE_IDE_PRI | MACHINE_IDE_SEC) /* sys has int dual IDE/ATAPI - mark as both pri and sec IDE/ATAPI */ -#define MACHINE_IDE_DUALTQ (MACHINE_IDE_TER | MACHINE_IDE_QUA) -#define MACHINE_IDE_QUAD (MACHINE_IDE_DUAL | MACHINE_IDE_DUALTQ) /* sys has int quad IDE/ATAPI - mark as dual + both ter and and qua IDE/ATAPI */ -#define MACHINE_SCSI (MACHINE_SCSI_PRI) /* sys has int single SCSI - mark as pri SCSI */ -#define MACHINE_SCSI_DUAL (MACHINE_SCSI_PRI | MACHINE_SCSI_SEC) /* sys has int dual SCSI - mark as both pri and sec SCSI */ -#define MACHINE_USB (MACHINE_USB_PRI) -#define MACHINE_USB_DUAL (MACHINE_USB_PRI | MACHINE_USB_SEC) +#define MACHINE_IDE (MACHINE_IDE_PRI) /* sys has int single IDE/ATAPI - mark as pri IDE/ATAPI */ +#define MACHINE_IDE_DUAL (MACHINE_IDE_PRI | MACHINE_IDE_SEC) /* sys has int dual IDE/ATAPI - mark as both pri and sec IDE/ATAPI */ +#define MACHINE_IDE_DUALTQ (MACHINE_IDE_TER | MACHINE_IDE_QUA) +#define MACHINE_IDE_QUAD (MACHINE_IDE_DUAL | MACHINE_IDE_DUALTQ) /* sys has int quad IDE/ATAPI - mark as dual + both ter and and qua IDE/ATAPI */ +#define MACHINE_SCSI (MACHINE_SCSI_PRI) /* sys has int single SCSI - mark as pri SCSI */ +#define MACHINE_SCSI_DUAL (MACHINE_SCSI_PRI | MACHINE_SCSI_SEC) /* sys has int dual SCSI - mark as both pri and sec SCSI */ +#define MACHINE_USB (MACHINE_USB_PRI) +#define MACHINE_USB_DUAL (MACHINE_USB_PRI | MACHINE_USB_SEC) /* Special combined flags. */ -#define MACHINE_PIIX (MACHINE_IDE_DUAL) -#define MACHINE_PIIX3 (MACHINE_PIIX | MACHINE_USB) +#define MACHINE_PIIX (MACHINE_IDE_DUAL) +#define MACHINE_PIIX3 (MACHINE_PIIX | MACHINE_USB) /* TODO: ACPI flag. */ -#define MACHINE_PIIX4 (MACHINE_PIIX3 | MACHINE_ACPI) +#define MACHINE_PIIX4 (MACHINE_PIIX3 | MACHINE_ACPI) -#define IS_ARCH(m, a) ((machines[m].bus_flags & (a)) ? 1 : 0) -#define IS_AT(m) (((machines[m].bus_flags & (MACHINE_BUS_ISA16 | MACHINE_BUS_EISA | MACHINE_BUS_VLB | MACHINE_BUS_MCA | MACHINE_BUS_PCI | MACHINE_BUS_PCMCIA | MACHINE_BUS_AGP | MACHINE_BUS_AC97)) && !(machines[m].bus_flags & MACHINE_PC98)) ? 1 : 0) +#define IS_ARCH(m, a) ((machines[m].bus_flags & (a)) ? 1 : 0) +#define IS_AT(m) (((machines[m].bus_flags & (MACHINE_BUS_ISA16 | MACHINE_BUS_EISA | MACHINE_BUS_VLB | MACHINE_BUS_MCA | MACHINE_BUS_PCI | MACHINE_BUS_PCMCIA | MACHINE_BUS_AGP | MACHINE_BUS_AC97)) && !(machines[m].bus_flags & MACHINE_PC98)) ? 1 : 0) -#define CPU_BLOCK(...) (const uint8_t[]) {__VA_ARGS__, 0} +#define CPU_BLOCK(...) \ + (const uint8_t[]) { __VA_ARGS__, 0 } #define MACHINE_MULTIPLIER_FIXED -1 -#define CPU_BLOCK_NONE 0 +#define CPU_BLOCK_NONE 0 /* Make sure it's always an invalid value to avoid misdetections. */ #if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64) -#define MACHINE_AVAILABLE 0xffffffffffffffffULL +# define MACHINE_AVAILABLE 0xffffffffffffffffULL #else -#define MACHINE_AVAILABLE 0xffffffff +# define MACHINE_AVAILABLE 0xffffffff #endif enum { diff --git a/src/include/86box/machine_status.h b/src/include/86box/machine_status.h index 31cefdfd4..9e33c293a 100644 --- a/src/include/86box/machine_status.h +++ b/src/include/86box/machine_status.h @@ -20,9 +20,9 @@ typedef struct { dev_status_empty_active_t zip[ZIP_NUM]; dev_status_empty_active_t mo[MO_NUM]; dev_status_empty_active_t cassette; - dev_status_active_t hdd[HDD_BUS_USB]; + dev_status_active_t hdd[HDD_BUS_USB]; dev_status_empty_active_t net[NET_CARD_MAX]; - dev_status_empty_t cartridge[2]; + dev_status_empty_t cartridge[2]; } machine_status_t; extern machine_status_t machine_status; diff --git a/src/include/86box/mca.h b/src/include/86box/mca.h index f41eda9cf..e048a6131 100644 --- a/src/include/86box/mca.h +++ b/src/include/86box/mca.h @@ -1,15 +1,15 @@ #ifndef EMU_MCA_H -# define EMU_MCA_H +#define EMU_MCA_H -extern void mca_init(int nr_cards); -extern void mca_add(uint8_t (*read)(int addr, void *priv), void (*write)(int addr, uint8_t val, void *priv), uint8_t (*feedb)(void *priv), void (*reset)(void *priv), void *priv); -extern void mca_set_index(int index); +extern void mca_init(int nr_cards); +extern void mca_add(uint8_t (*read)(int addr, void *priv), void (*write)(int addr, uint8_t val, void *priv), uint8_t (*feedb)(void *priv), void (*reset)(void *priv), void *priv); +extern void mca_set_index(int index); extern uint8_t mca_read(uint16_t port); extern uint8_t mca_read_index(uint16_t port, int index); -extern void mca_write(uint16_t port, uint8_t val); +extern void mca_write(uint16_t port, uint8_t val); extern uint8_t mca_feedb(void); -extern int mca_get_nr_cards(void); -extern void mca_reset(void); +extern int mca_get_nr_cards(void); +extern void mca_reset(void); extern void ps2_cache_clean(void); diff --git a/src/include/86box/mem.h b/src/include/86box/mem.h index b2ee94d14..7f91eb8a2 100644 --- a/src/include/86box/mem.h +++ b/src/include/86box/mem.h @@ -20,59 +20,58 @@ */ #ifndef EMU_MEM_H -# define EMU_MEM_H - +#define EMU_MEM_H #define MEM_MAP_TO_SHADOW_RAM_MASK 1 #define MEM_MAP_TO_RAM_ADDR_MASK 2 -#define STATE_CPU 0 -#define STATE_BUS 2 +#define STATE_CPU 0 +#define STATE_BUS 2 -#define ACCESS_CPU 1 /* Update CPU non-SMM access. */ -#define ACCESS_CPU_SMM 2 /* Update CPU SMM access. */ -#define ACCESS_BUS 4 /* Update bus access. */ -#define ACCESS_BUS_SMM 8 /* Update bus SMM access. */ -#define ACCESS_NORMAL 5 /* Update CPU and bus non-SMM accesses. */ -#define ACCESS_SMM 10 /* Update CPU and bus SMM accesses. */ -#define ACCESS_CPU_BOTH 3 /* Update CPU non-SMM and SMM accesses. */ -#define ACCESS_BUS_BOTH 12 /* Update bus non-SMM and SMM accesses. */ -#define ACCESS_ALL 15 /* Update all accesses. */ +#define ACCESS_CPU 1 /* Update CPU non-SMM access. */ +#define ACCESS_CPU_SMM 2 /* Update CPU SMM access. */ +#define ACCESS_BUS 4 /* Update bus access. */ +#define ACCESS_BUS_SMM 8 /* Update bus SMM access. */ +#define ACCESS_NORMAL 5 /* Update CPU and bus non-SMM accesses. */ +#define ACCESS_SMM 10 /* Update CPU and bus SMM accesses. */ +#define ACCESS_CPU_BOTH 3 /* Update CPU non-SMM and SMM accesses. */ +#define ACCESS_BUS_BOTH 12 /* Update bus non-SMM and SMM accesses. */ +#define ACCESS_ALL 15 /* Update all accesses. */ -#define ACCESS_INTERNAL 1 -#define ACCESS_ROMCS 2 -#define ACCESS_SMRAM 4 -#define ACCESS_CACHE 8 -#define ACCESS_DISABLED 16 +#define ACCESS_INTERNAL 1 +#define ACCESS_ROMCS 2 +#define ACCESS_SMRAM 4 +#define ACCESS_CACHE 8 +#define ACCESS_DISABLED 16 -#define ACCESS_X_INTERNAL 1 -#define ACCESS_X_ROMCS 2 -#define ACCESS_X_SMRAM 4 -#define ACCESS_X_CACHE 8 -#define ACCESS_X_DISABLED 16 -#define ACCESS_W_INTERNAL 32 -#define ACCESS_W_ROMCS 64 -#define ACCESS_W_SMRAM 128 -#define ACCESS_W_CACHE 256 -#define ACCESS_W_DISABLED 512 -#define ACCESS_R_INTERNAL 1024 -#define ACCESS_R_ROMCS 2048 -#define ACCESS_R_SMRAM 4096 -#define ACCESS_R_CACHE 8192 -#define ACCESS_R_DISABLED 16384 +#define ACCESS_X_INTERNAL 1 +#define ACCESS_X_ROMCS 2 +#define ACCESS_X_SMRAM 4 +#define ACCESS_X_CACHE 8 +#define ACCESS_X_DISABLED 16 +#define ACCESS_W_INTERNAL 32 +#define ACCESS_W_ROMCS 64 +#define ACCESS_W_SMRAM 128 +#define ACCESS_W_CACHE 256 +#define ACCESS_W_DISABLED 512 +#define ACCESS_R_INTERNAL 1024 +#define ACCESS_R_ROMCS 2048 +#define ACCESS_R_SMRAM 4096 +#define ACCESS_R_CACHE 8192 +#define ACCESS_R_DISABLED 16384 -#define ACCESS_EXECUTE 0 -#define ACCESS_READ 1 -#define ACCESS_WRITE 2 +#define ACCESS_EXECUTE 0 +#define ACCESS_READ 1 +#define ACCESS_WRITE 2 -#define ACCESS_SMRAM_OFF 0 -#define ACCESS_SMRAM_X 1 -#define ACCESS_SMRAM_W 2 -#define ACCESS_SMRAM_WX 3 -#define ACCESS_SMRAM_R 4 -#define ACCESS_SMRAM_RX 5 -#define ACCESS_SMRAM_RW 6 -#define ACCESS_SMRAM_RWX 7 +#define ACCESS_SMRAM_OFF 0 +#define ACCESS_SMRAM_X 1 +#define ACCESS_SMRAM_W 2 +#define ACCESS_SMRAM_WX 3 +#define ACCESS_SMRAM_R 4 +#define ACCESS_SMRAM_RX 5 +#define ACCESS_SMRAM_RW 6 +#define ACCESS_SMRAM_RWX 7 /* Conversion #define's - we need these to seamlessly convert the old mem_set_mem_state() calls to the new stuff in order to make this a drop in replacement. @@ -80,144 +79,142 @@ Read here includes execute access since the old code also used read access for execute access, with some exceptions. */ -#define MEM_READ_DISABLED (ACCESS_X_DISABLED | ACCESS_R_DISABLED) -#define MEM_READ_INTERNAL (ACCESS_X_INTERNAL | ACCESS_R_INTERNAL) -#define MEM_READ_EXTERNAL 0 +#define MEM_READ_DISABLED (ACCESS_X_DISABLED | ACCESS_R_DISABLED) +#define MEM_READ_INTERNAL (ACCESS_X_INTERNAL | ACCESS_R_INTERNAL) +#define MEM_READ_EXTERNAL 0 /* These two are going to be identical - on real hardware, chips that don't care about ROMCS#, are not magically disabled. */ -#define MEM_READ_ROMCS (ACCESS_X_ROMCS | ACCESS_R_ROMCS) -#define MEM_READ_EXTANY MEM_READ_ROMCS +#define MEM_READ_ROMCS (ACCESS_X_ROMCS | ACCESS_R_ROMCS) +#define MEM_READ_EXTANY MEM_READ_ROMCS /* Internal execute access, external read access. */ -#define MEM_READ_EXTERNAL_EX 0 -#define MEM_READ_SMRAM (ACCESS_X_SMRAM | ACCESS_R_SMRAM) -#define MEM_READ_CACHE (ACCESS_X_CACHE | ACCESS_R_CACHE) -#define MEM_READ_SMRAM_EX (ACCESS_X_SMRAM) -#define MEM_EXEC_SMRAM MEM_READ_SMRAM_EX -#define MEM_READ_SMRAM_2 (ACCESS_R_SMRAM) +#define MEM_READ_EXTERNAL_EX 0 +#define MEM_READ_SMRAM (ACCESS_X_SMRAM | ACCESS_R_SMRAM) +#define MEM_READ_CACHE (ACCESS_X_CACHE | ACCESS_R_CACHE) +#define MEM_READ_SMRAM_EX (ACCESS_X_SMRAM) +#define MEM_EXEC_SMRAM MEM_READ_SMRAM_EX +#define MEM_READ_SMRAM_2 (ACCESS_R_SMRAM) /* Theese two are going to be identical. */ -#define MEM_READ_DISABLED_EX MEM_READ_DISABLED -#define MEM_READ_MASK 0x7c1f +#define MEM_READ_DISABLED_EX MEM_READ_DISABLED +#define MEM_READ_MASK 0x7c1f -#define MEM_WRITE_DISABLED (ACCESS_W_DISABLED) -#define MEM_WRITE_INTERNAL (ACCESS_W_INTERNAL) -#define MEM_WRITE_EXTERNAL 0 +#define MEM_WRITE_DISABLED (ACCESS_W_DISABLED) +#define MEM_WRITE_INTERNAL (ACCESS_W_INTERNAL) +#define MEM_WRITE_EXTERNAL 0 /* These two are going to be identical - on real hardware, chips that don't care about ROMCS#, are not magically disabled. */ -#define MEM_WRITE_ROMCS (ACCESS_W_ROMCS) -#define MEM_WRITE_EXTANY (ACCESS_W_ROMCS) -#define MEM_WRITE_SMRAM (ACCESS_W_SMRAM) -#define MEM_WRITE_CACHE (ACCESS_W_CACHE) +#define MEM_WRITE_ROMCS (ACCESS_W_ROMCS) +#define MEM_WRITE_EXTANY (ACCESS_W_ROMCS) +#define MEM_WRITE_SMRAM (ACCESS_W_SMRAM) +#define MEM_WRITE_CACHE (ACCESS_W_CACHE) /* Theese two are going to be identical. */ -#define MEM_WRITE_DISABLED_EX MEM_READ_DISABLED -#define MEM_WRITE_MASK 0x03e0 +#define MEM_WRITE_DISABLED_EX MEM_READ_DISABLED +#define MEM_WRITE_MASK 0x03e0 -#define MEM_MAPPING_EXTERNAL 1 /* On external bus (ISA/PCI). */ -#define MEM_MAPPING_INTERNAL 2 /* On internal bus (RAM). */ -#define MEM_MAPPING_ROM_WS 4 /* Executing from ROM may involve additional wait states. */ -#define MEM_MAPPING_IS_ROM 8 /* Responds to ROMCS#. */ -#define MEM_MAPPING_ROM (MEM_MAPPING_ROM_WS | MEM_MAPPING_IS_ROM) -#define MEM_MAPPING_ROMCS 16 /* If it responds to ROMCS#, it requires ROMCS# asserted. */ -#define MEM_MAPPING_SMRAM 32 /* On internal bus (RAM) but SMRAM. */ -#define MEM_MAPPING_CACHE 64 /* Cache or MTRR - please avoid such mappings unless - stricly necessary (eg. for CoreBoot). */ +#define MEM_MAPPING_EXTERNAL 1 /* On external bus (ISA/PCI). */ +#define MEM_MAPPING_INTERNAL 2 /* On internal bus (RAM). */ +#define MEM_MAPPING_ROM_WS 4 /* Executing from ROM may involve additional wait states. */ +#define MEM_MAPPING_IS_ROM 8 /* Responds to ROMCS#. */ +#define MEM_MAPPING_ROM (MEM_MAPPING_ROM_WS | MEM_MAPPING_IS_ROM) +#define MEM_MAPPING_ROMCS 16 /* If it responds to ROMCS#, it requires ROMCS# asserted. */ +#define MEM_MAPPING_SMRAM 32 /* On internal bus (RAM) but SMRAM. */ +#define MEM_MAPPING_CACHE 64 /* Cache or MTRR - please avoid such mappings unless \ + stricly necessary (eg. for CoreBoot). */ /* #define's for memory granularity, currently 4k, less does not work because of internal 4k pages. */ -#define MEM_GRANULARITY_BITS 12 -#define MEM_GRANULARITY_SIZE (1 << MEM_GRANULARITY_BITS) -#define MEM_GRANULARITY_HBOUND (MEM_GRANULARITY_SIZE - 2) -#define MEM_GRANULARITY_QBOUND (MEM_GRANULARITY_SIZE - 4) -#define MEM_GRANULARITY_MASK (MEM_GRANULARITY_SIZE - 1) -#define MEM_GRANULARITY_HMASK ((1 << (MEM_GRANULARITY_BITS - 1)) - 1) -#define MEM_GRANULARITY_QMASK ((1 << (MEM_GRANULARITY_BITS - 2)) - 1) -#define MEM_GRANULARITY_PMASK ((1 << (MEM_GRANULARITY_BITS - 3)) - 1) -#define MEM_MAPPINGS_NO ((0x100000 >> MEM_GRANULARITY_BITS) << 12) -#define MEM_GRANULARITY_PAGE (MEM_GRANULARITY_MASK & ~0xfff) -#define MEM_GRANULARITY_BASE (~MEM_GRANULARITY_MASK) +#define MEM_GRANULARITY_BITS 12 +#define MEM_GRANULARITY_SIZE (1 << MEM_GRANULARITY_BITS) +#define MEM_GRANULARITY_HBOUND (MEM_GRANULARITY_SIZE - 2) +#define MEM_GRANULARITY_QBOUND (MEM_GRANULARITY_SIZE - 4) +#define MEM_GRANULARITY_MASK (MEM_GRANULARITY_SIZE - 1) +#define MEM_GRANULARITY_HMASK ((1 << (MEM_GRANULARITY_BITS - 1)) - 1) +#define MEM_GRANULARITY_QMASK ((1 << (MEM_GRANULARITY_BITS - 2)) - 1) +#define MEM_GRANULARITY_PMASK ((1 << (MEM_GRANULARITY_BITS - 3)) - 1) +#define MEM_MAPPINGS_NO ((0x100000 >> MEM_GRANULARITY_BITS) << 12) +#define MEM_GRANULARITY_PAGE (MEM_GRANULARITY_MASK & ~0xfff) +#define MEM_GRANULARITY_BASE (~MEM_GRANULARITY_MASK) /* Compatibility #defines. */ #define mem_set_state(smm, mode, base, size, access) \ - mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), mode, base, size, access) + mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), mode, base, size, access) #define mem_set_mem_state_common(smm, base, size, access) \ - mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), 0, base, size, access) + mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), 0, base, size, access) #define mem_set_mem_state(base, size, access) \ - mem_set_access(ACCESS_NORMAL, 0, base, size, access) + mem_set_access(ACCESS_NORMAL, 0, base, size, access) #define mem_set_mem_state_smm(base, size, access) \ - mem_set_access(ACCESS_SMM, 0, base, size, access) + mem_set_access(ACCESS_SMM, 0, base, size, access) #define mem_set_mem_state_both(base, size, access) \ - mem_set_access(ACCESS_ALL, 0, base, size, access) + mem_set_access(ACCESS_ALL, 0, base, size, access) #define mem_set_mem_state_cpu_both(base, size, access) \ - mem_set_access(ACCESS_CPU_BOTH, 0, base, size, access) + mem_set_access(ACCESS_CPU_BOTH, 0, base, size, access) #define mem_set_mem_state_bus_both(base, size, access) \ - mem_set_access(ACCESS_BUS_BOTH, 0, base, size, access) + mem_set_access(ACCESS_BUS_BOTH, 0, base, size, access) #define mem_set_mem_state_smram(smm, base, size, is_smram) \ - mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), 1, base, size, is_smram) + mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), 1, base, size, is_smram) #define mem_set_mem_state_smram_ex(smm, base, size, is_smram) \ - mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), 2, base, size, is_smram) + mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), 2, base, size, is_smram) #define mem_set_access_smram_cpu(smm, base, size, is_smram) \ - mem_set_access((smm ? ACCESS_CPU_SMM : ACCESS_CPU), 1, base, size, is_smram) + mem_set_access((smm ? ACCESS_CPU_SMM : ACCESS_CPU), 1, base, size, is_smram) #define mem_set_access_smram_bus(smm, base, size, is_smram) \ - mem_set_access((smm ? ACCESS_BUS_SMM : ACCESS_BUS), 1, base, size, is_smram) + mem_set_access((smm ? ACCESS_BUS_SMM : ACCESS_BUS), 1, base, size, is_smram) #define flushmmucache_cr3 \ - flushmmucache_nopc - + flushmmucache_nopc typedef struct { - uint16_t x :5, - w :5, - r :5, - pad :1; + uint16_t x : 5, + w : 5, + r : 5, + pad : 1; } state_t; typedef union { - uint16_t vals[4]; - state_t states[4]; + uint16_t vals[4]; + state_t states[4]; } mem_state_t; typedef struct _mem_mapping_ { struct _mem_mapping_ *prev, *next; - int enable; + int enable; - uint32_t base; - uint32_t size; + uint32_t base; + uint32_t size; - uint32_t mask; + uint32_t mask; - uint8_t (*read_b)(uint32_t addr, void *priv); - uint16_t (*read_w)(uint32_t addr, void *priv); - uint32_t (*read_l)(uint32_t addr, void *priv); - void (*write_b)(uint32_t addr, uint8_t val, void *priv); - void (*write_w)(uint32_t addr, uint16_t val, void *priv); - void (*write_l)(uint32_t addr, uint32_t val, void *priv); + uint8_t (*read_b)(uint32_t addr, void *priv); + uint16_t (*read_w)(uint32_t addr, void *priv); + uint32_t (*read_l)(uint32_t addr, void *priv); + void (*write_b)(uint32_t addr, uint8_t val, void *priv); + void (*write_w)(uint32_t addr, uint16_t val, void *priv); + void (*write_l)(uint32_t addr, uint32_t val, void *priv); - uint8_t *exec; + uint8_t *exec; - uint32_t flags; + uint32_t flags; /* There is never a needed to pass a pointer to the mapping itself, it is much preferable to prepare a structure with the requires data (usually, the base address and mask) instead. */ - void *p; /* backpointer to device */ + void *p; /* backpointer to device */ } mem_mapping_t; #ifdef USE_NEW_DYNAREC extern uint64_t *byte_dirty_mask; extern uint64_t *byte_code_present_mask; -#define PAGE_BYTE_MASK_SHIFT 6 -#define PAGE_BYTE_MASK_OFFSET_MASK 63 -#define PAGE_BYTE_MASK_MASK 63 +# define PAGE_BYTE_MASK_SHIFT 6 +# define PAGE_BYTE_MASK_OFFSET_MASK 63 +# define PAGE_BYTE_MASK_MASK 63 -#define EVICT_NOT_IN_LIST ((uint32_t)-1) -typedef struct page_t -{ - void (*write_b)(uint32_t addr, uint8_t val, struct page_t *p); - void (*write_w)(uint32_t addr, uint16_t val, struct page_t *p); - void (*write_l)(uint32_t addr, uint32_t val, struct page_t *p); +# define EVICT_NOT_IN_LIST ((uint32_t) -1) +typedef struct page_t { + void (*write_b)(uint32_t addr, uint8_t val, struct page_t *p); + void (*write_w)(uint32_t addr, uint16_t val, struct page_t *p); + void (*write_l)(uint32_t addr, uint32_t val, struct page_t *p); - uint8_t *mem; + uint8_t *mem; - uint16_t block, block_2; + uint16_t block, block_2; /*Head of codeblock tree associated with this page*/ uint16_t head; @@ -240,14 +237,14 @@ void page_remove_from_evict_list(page_t *p); void page_add_to_evict_list(page_t *p); #else typedef struct _page_ { - void (*write_b)(uint32_t addr, uint8_t val, struct _page_ *p); - void (*write_w)(uint32_t addr, uint16_t val, struct _page_ *p); - void (*write_l)(uint32_t addr, uint32_t val, struct _page_ *p); + void (*write_b)(uint32_t addr, uint8_t val, struct _page_ *p); + void (*write_w)(uint32_t addr, uint16_t val, struct _page_ *p); + void (*write_l)(uint32_t addr, uint32_t val, struct _page_ *p); - uint8_t *mem; + uint8_t *mem; - uint64_t code_present_mask[4], - dirty_mask[4]; + uint64_t code_present_mask[4], + dirty_mask[4]; struct codeblock_t *block[4], *block_2[4]; @@ -256,236 +253,232 @@ typedef struct _page_ { } page_t; #endif +extern uint8_t *ram, *ram2; +extern uint32_t rammask; -extern uint8_t *ram, *ram2; -extern uint32_t rammask; +extern uint8_t *rom; +extern uint32_t biosmask, biosaddr; -extern uint8_t *rom; -extern uint32_t biosmask, biosaddr; +extern int readlookup[256]; +extern uintptr_t *readlookup2; +extern uintptr_t old_rl2; +extern uint8_t uncached; +extern int readlnext; +extern int writelookup[256]; +extern uintptr_t *writelookup2; +extern int writelnext; +extern uint32_t ram_mapped_addr[64]; +extern uint8_t page_ff[4096]; -extern int readlookup[256]; -extern uintptr_t * readlookup2; -extern uintptr_t old_rl2; -extern uint8_t uncached; -extern int readlnext; -extern int writelookup[256]; -extern uintptr_t * writelookup2; -extern int writelnext; -extern uint32_t ram_mapped_addr[64]; -extern uint8_t page_ff[4096]; - -extern mem_mapping_t ram_low_mapping, +extern mem_mapping_t ram_low_mapping, #if 1 - ram_mid_mapping, + ram_mid_mapping, #endif - ram_remapped_mapping, - ram_high_mapping, - ram_2gb_mapping, - bios_mapping, - bios_high_mapping; + ram_remapped_mapping, + ram_high_mapping, + ram_2gb_mapping, + bios_mapping, + bios_high_mapping; -extern uint32_t mem_logical_addr; +extern uint32_t mem_logical_addr; -extern page_t *pages, - **page_lookup; +extern page_t *pages, + **page_lookup; -extern uint32_t get_phys_virt, get_phys_phys; +extern uint32_t get_phys_virt, get_phys_phys; -extern int shadowbios, - shadowbios_write; -extern int readlnum, - writelnum; +extern int shadowbios, + shadowbios_write; +extern int readlnum, + writelnum; -extern int memspeed[11]; +extern int memspeed[11]; -extern int mmu_perm; -extern uint8_t high_page; /* if a high (> 4 gb) page was detected */ +extern int mmu_perm; +extern uint8_t high_page; /* if a high (> 4 gb) page was detected */ -extern uint32_t pages_sz; /* #pages in table */ +extern uint32_t pages_sz; /* #pages in table */ -extern int mem_a20_state, - mem_a20_alt, - mem_a20_key; +extern int mem_a20_state, + mem_a20_alt, + mem_a20_key; +extern uint8_t read_mem_b(uint32_t addr); +extern uint16_t read_mem_w(uint32_t addr); +extern void write_mem_b(uint32_t addr, uint8_t val); +extern void write_mem_w(uint32_t addr, uint16_t val); -extern uint8_t read_mem_b(uint32_t addr); -extern uint16_t read_mem_w(uint32_t addr); -extern void write_mem_b(uint32_t addr, uint8_t val); -extern void write_mem_w(uint32_t addr, uint16_t val); +extern uint8_t readmembl(uint32_t addr); +extern void writemembl(uint32_t addr, uint8_t val); +extern uint16_t readmemwl(uint32_t addr); +extern void writememwl(uint32_t addr, uint16_t val); +extern uint32_t readmemll(uint32_t addr); +extern void writememll(uint32_t addr, uint32_t val); +extern uint64_t readmemql(uint32_t addr); +extern void writememql(uint32_t addr, uint64_t val); -extern uint8_t readmembl(uint32_t addr); -extern void writemembl(uint32_t addr, uint8_t val); -extern uint16_t readmemwl(uint32_t addr); -extern void writememwl(uint32_t addr, uint16_t val); -extern uint32_t readmemll(uint32_t addr); -extern void writememll(uint32_t addr, uint32_t val); -extern uint64_t readmemql(uint32_t addr); -extern void writememql(uint32_t addr, uint64_t val); +extern uint8_t readmembl_no_mmut(uint32_t addr, uint32_t a64); +extern void writemembl_no_mmut(uint32_t addr, uint32_t a64, uint8_t val); +extern uint16_t readmemwl_no_mmut(uint32_t addr, uint32_t *a64); +extern void writememwl_no_mmut(uint32_t addr, uint32_t *a64, uint16_t val); +extern uint32_t readmemll_no_mmut(uint32_t addr, uint32_t *a64); +extern void writememll_no_mmut(uint32_t addr, uint32_t *a64, uint32_t val); -extern uint8_t readmembl_no_mmut(uint32_t addr, uint32_t a64); -extern void writemembl_no_mmut(uint32_t addr, uint32_t a64, uint8_t val); -extern uint16_t readmemwl_no_mmut(uint32_t addr, uint32_t *a64); -extern void writememwl_no_mmut(uint32_t addr, uint32_t *a64, uint16_t val); -extern uint32_t readmemll_no_mmut(uint32_t addr, uint32_t *a64); -extern void writememll_no_mmut(uint32_t addr, uint32_t *a64, uint32_t val); +extern void do_mmutranslate(uint32_t addr, uint32_t *a64, int num, int write); -extern void do_mmutranslate(uint32_t addr, uint32_t *a64, int num, int write); +extern uint8_t *getpccache(uint32_t a); +extern uint64_t mmutranslatereal(uint32_t addr, int rw); +extern uint32_t mmutranslatereal32(uint32_t addr, int rw); +extern void addreadlookup(uint32_t virt, uint32_t phys); +extern void addwritelookup(uint32_t virt, uint32_t phys); -extern uint8_t *getpccache(uint32_t a); -extern uint64_t mmutranslatereal(uint32_t addr, int rw); -extern uint32_t mmutranslatereal32(uint32_t addr, int rw); -extern void addreadlookup(uint32_t virt, uint32_t phys); -extern void addwritelookup(uint32_t virt, uint32_t phys); +extern void mem_mapping_set(mem_mapping_t *, + uint32_t base, + uint32_t size, + uint8_t (*read_b)(uint32_t addr, void *p), + uint16_t (*read_w)(uint32_t addr, void *p), + uint32_t (*read_l)(uint32_t addr, void *p), + void (*write_b)(uint32_t addr, uint8_t val, void *p), + void (*write_w)(uint32_t addr, uint16_t val, void *p), + void (*write_l)(uint32_t addr, uint32_t val, void *p), + uint8_t *exec, + uint32_t flags, + void *p); +extern void mem_mapping_add(mem_mapping_t *, + uint32_t base, + uint32_t size, + uint8_t (*read_b)(uint32_t addr, void *p), + uint16_t (*read_w)(uint32_t addr, void *p), + uint32_t (*read_l)(uint32_t addr, void *p), + void (*write_b)(uint32_t addr, uint8_t val, void *p), + void (*write_w)(uint32_t addr, uint16_t val, void *p), + void (*write_l)(uint32_t addr, uint32_t val, void *p), + uint8_t *exec, + uint32_t flags, + void *p); -extern void mem_mapping_set(mem_mapping_t *, - uint32_t base, - uint32_t size, - uint8_t (*read_b)(uint32_t addr, void *p), - uint16_t (*read_w)(uint32_t addr, void *p), - uint32_t (*read_l)(uint32_t addr, void *p), - void (*write_b)(uint32_t addr, uint8_t val, void *p), - void (*write_w)(uint32_t addr, uint16_t val, void *p), - void (*write_l)(uint32_t addr, uint32_t val, void *p), - uint8_t *exec, - uint32_t flags, - void *p); -extern void mem_mapping_add(mem_mapping_t *, - uint32_t base, - uint32_t size, - uint8_t (*read_b)(uint32_t addr, void *p), - uint16_t (*read_w)(uint32_t addr, void *p), - uint32_t (*read_l)(uint32_t addr, void *p), - void (*write_b)(uint32_t addr, uint8_t val, void *p), - void (*write_w)(uint32_t addr, uint16_t val, void *p), - void (*write_l)(uint32_t addr, uint32_t val, void *p), - uint8_t *exec, - uint32_t flags, - void *p); +extern void mem_mapping_set_handler(mem_mapping_t *, + uint8_t (*read_b)(uint32_t addr, void *p), + uint16_t (*read_w)(uint32_t addr, void *p), + uint32_t (*read_l)(uint32_t addr, void *p), + void (*write_b)(uint32_t addr, uint8_t val, void *p), + void (*write_w)(uint32_t addr, uint16_t val, void *p), + void (*write_l)(uint32_t addr, uint32_t val, void *p)); -extern void mem_mapping_set_handler(mem_mapping_t *, - uint8_t (*read_b)(uint32_t addr, void *p), - uint16_t (*read_w)(uint32_t addr, void *p), - uint32_t (*read_l)(uint32_t addr, void *p), - void (*write_b)(uint32_t addr, uint8_t val, void *p), - void (*write_w)(uint32_t addr, uint16_t val, void *p), - void (*write_l)(uint32_t addr, uint32_t val, void *p)); +extern void mem_mapping_set_p(mem_mapping_t *, void *p); -extern void mem_mapping_set_p(mem_mapping_t *, void *p); +extern void mem_mapping_set_addr(mem_mapping_t *, + uint32_t base, uint32_t size); +extern void mem_mapping_set_exec(mem_mapping_t *, uint8_t *exec); +extern void mem_mapping_set_mask(mem_mapping_t *, uint32_t mask); +extern void mem_mapping_disable(mem_mapping_t *); +extern void mem_mapping_enable(mem_mapping_t *); +extern void mem_mapping_recalc(uint64_t base, uint64_t size); -extern void mem_mapping_set_addr(mem_mapping_t *, - uint32_t base, uint32_t size); -extern void mem_mapping_set_exec(mem_mapping_t *, uint8_t *exec); -extern void mem_mapping_set_mask(mem_mapping_t *, uint32_t mask); -extern void mem_mapping_disable(mem_mapping_t *); -extern void mem_mapping_enable(mem_mapping_t *); -extern void mem_mapping_recalc(uint64_t base, uint64_t size); +extern void mem_set_access(uint8_t bitmap, int mode, uint32_t base, uint32_t size, uint16_t access); -extern void mem_set_access(uint8_t bitmap, int mode, uint32_t base, uint32_t size, uint16_t access); +extern uint8_t mem_readb_phys(uint32_t addr); +extern uint16_t mem_readw_phys(uint32_t addr); +extern uint32_t mem_readl_phys(uint32_t addr); +extern void mem_read_phys(void *dest, uint32_t addr, int tranfer_size); +extern void mem_writeb_phys(uint32_t addr, uint8_t val); +extern void mem_writew_phys(uint32_t addr, uint16_t val); +extern void mem_writel_phys(uint32_t addr, uint32_t val); +extern void mem_write_phys(void *src, uint32_t addr, int tranfer_size); -extern uint8_t mem_readb_phys(uint32_t addr); -extern uint16_t mem_readw_phys(uint32_t addr); -extern uint32_t mem_readl_phys(uint32_t addr); -extern void mem_read_phys(void *dest, uint32_t addr, int tranfer_size); -extern void mem_writeb_phys(uint32_t addr, uint8_t val); -extern void mem_writew_phys(uint32_t addr, uint16_t val); -extern void mem_writel_phys(uint32_t addr, uint32_t val); -extern void mem_write_phys(void *src, uint32_t addr, int tranfer_size); +extern uint8_t mem_read_ram(uint32_t addr, void *priv); +extern uint16_t mem_read_ramw(uint32_t addr, void *priv); +extern uint32_t mem_read_raml(uint32_t addr, void *priv); +extern void mem_write_ram(uint32_t addr, uint8_t val, void *priv); +extern void mem_write_ramw(uint32_t addr, uint16_t val, void *priv); +extern void mem_write_raml(uint32_t addr, uint32_t val, void *priv); -extern uint8_t mem_read_ram(uint32_t addr, void *priv); -extern uint16_t mem_read_ramw(uint32_t addr, void *priv); -extern uint32_t mem_read_raml(uint32_t addr, void *priv); -extern void mem_write_ram(uint32_t addr, uint8_t val, void *priv); -extern void mem_write_ramw(uint32_t addr, uint16_t val, void *priv); -extern void mem_write_raml(uint32_t addr, uint32_t val, void *priv); +extern uint8_t mem_read_ram_2gb(uint32_t addr, void *priv); +extern uint16_t mem_read_ram_2gbw(uint32_t addr, void *priv); +extern uint32_t mem_read_ram_2gbl(uint32_t addr, void *priv); +extern void mem_write_ram_2gb(uint32_t addr, uint8_t val, void *priv); +extern void mem_write_ram_2gbw(uint32_t addr, uint16_t val, void *priv); +extern void mem_write_ram_2gbl(uint32_t addr, uint32_t val, void *priv); -extern uint8_t mem_read_ram_2gb(uint32_t addr, void *priv); -extern uint16_t mem_read_ram_2gbw(uint32_t addr, void *priv); -extern uint32_t mem_read_ram_2gbl(uint32_t addr, void *priv); -extern void mem_write_ram_2gb(uint32_t addr, uint8_t val, void *priv); -extern void mem_write_ram_2gbw(uint32_t addr, uint16_t val, void *priv); -extern void mem_write_ram_2gbl(uint32_t addr, uint32_t val, void *priv); +extern int mem_addr_is_ram(uint32_t addr); -extern int mem_addr_is_ram(uint32_t addr); +extern uint64_t mmutranslate_noabrt(uint32_t addr, int rw); -extern uint64_t mmutranslate_noabrt(uint32_t addr, int rw); +extern void mem_invalidate_range(uint32_t start_addr, uint32_t end_addr); -extern void mem_invalidate_range(uint32_t start_addr, uint32_t end_addr); +extern void mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p); +extern void mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p); +extern void mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p); +extern void mem_flush_write_page(uint32_t addr, uint32_t virt); -extern void mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p); -extern void mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p); -extern void mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p); -extern void mem_flush_write_page(uint32_t addr, uint32_t virt); +extern void mem_reset_page_blocks(void); -extern void mem_reset_page_blocks(void); +extern void flushmmucache(void); +extern void flushmmucache_nopc(void); +extern void mmu_invalidate(uint32_t addr); -extern void flushmmucache(void); -extern void flushmmucache_nopc(void); -extern void mmu_invalidate(uint32_t addr); - -extern void mem_a20_init(void); -extern void mem_a20_recalc(void); - -extern void mem_init(void); -extern void mem_close(void); -extern void mem_reset(void); -extern void mem_remap_top(int kb); +extern void mem_a20_init(void); +extern void mem_a20_recalc(void); +extern void mem_init(void); +extern void mem_close(void); +extern void mem_reset(void); +extern void mem_remap_top(int kb); #ifdef EMU_CPU_H -static __inline uint32_t get_phys(uint32_t addr) +static __inline uint32_t +get_phys(uint32_t addr) { uint64_t pa64; if (!((addr ^ get_phys_virt) & ~0xfff)) - return get_phys_phys | (addr & 0xfff); + return get_phys_phys | (addr & 0xfff); get_phys_virt = addr; if (!(cr0 >> 31)) { - get_phys_phys = (addr & rammask) & ~0xfff; - return addr & rammask; + get_phys_phys = (addr & rammask) & ~0xfff; + return addr & rammask; } if (((int) (readlookup2[addr >> 12])) != -1) - get_phys_phys = ((uintptr_t)readlookup2[addr >> 12] + (addr & ~0xfff)) - (uintptr_t)ram; + get_phys_phys = ((uintptr_t) readlookup2[addr >> 12] + (addr & ~0xfff)) - (uintptr_t) ram; else { - pa64 = mmutranslatereal(addr, 0); - if (pa64 > 0xffffffffULL) - get_phys_phys = 0xffffffff; - else - get_phys_phys = (uint32_t) pa64; - get_phys_phys = (get_phys_phys & rammask) & ~0xfff; - if (!cpu_state.abrt && mem_addr_is_ram(get_phys_phys)) - addreadlookup(get_phys_virt, get_phys_phys); + pa64 = mmutranslatereal(addr, 0); + if (pa64 > 0xffffffffULL) + get_phys_phys = 0xffffffff; + else + get_phys_phys = (uint32_t) pa64; + get_phys_phys = (get_phys_phys & rammask) & ~0xfff; + if (!cpu_state.abrt && mem_addr_is_ram(get_phys_phys)) + addreadlookup(get_phys_virt, get_phys_phys); } return get_phys_phys | (addr & 0xfff); } - -static __inline uint32_t get_phys_noabrt(uint32_t addr) +static __inline uint32_t +get_phys_noabrt(uint32_t addr) { uint64_t phys_addr; uint32_t phys_addr32; if (!(cr0 >> 31)) - return addr & rammask; + return addr & rammask; if (((int) (readlookup2[addr >> 12])) != -1) - return ((uintptr_t)readlookup2[addr >> 12] + addr) - (uintptr_t)ram; + return ((uintptr_t) readlookup2[addr >> 12] + addr) - (uintptr_t) ram; - phys_addr = mmutranslate_noabrt(addr, 0); + phys_addr = mmutranslate_noabrt(addr, 0); phys_addr32 = (uint32_t) phys_addr; - if ((phys_addr != 0xffffffffffffffffULL) && (phys_addr <= 0xffffffffULL) && - mem_addr_is_ram(phys_addr32 & rammask)) - addreadlookup(addr, phys_addr32 & rammask); + if ((phys_addr != 0xffffffffffffffffULL) && (phys_addr <= 0xffffffffULL) && mem_addr_is_ram(phys_addr32 & rammask)) + addreadlookup(addr, phys_addr32 & rammask); if (phys_addr > 0xffffffffULL) - phys_addr32 = 0xffffffff; + phys_addr32 = 0xffffffff; return phys_addr32; } #endif - -#endif /*EMU_MEM_H*/ +#endif /*EMU_MEM_H*/ diff --git a/src/include/86box/mo.h b/src/include/86box/mo.h index 7d0eed904..e1ec25c8a 100644 --- a/src/include/86box/mo.h +++ b/src/include/86box/mo.h @@ -19,34 +19,33 @@ */ #ifndef EMU_MO_H -# define EMU_MO_H +#define EMU_MO_H -#define MO_NUM 4 +#define MO_NUM 4 #define BUF_SIZE 32768 -#define MO_TIME 10.0 - +#define MO_TIME 10.0 typedef struct { - uint32_t sectors; - uint16_t bytes_per_sector; + uint32_t sectors; + uint16_t bytes_per_sector; } mo_type_t; #define KNOWN_MO_TYPES 10 static const mo_type_t mo_types[KNOWN_MO_TYPES] = { - // 3.5" standard M.O. disks - { 248826, 512 }, - { 446325, 512 }, - { 1041500, 512 }, - { 310352, 2048 }, - { 605846, 2048 }, - { 1063146, 2048 }, - // 5.25" M.O. disks - {573624, 512 }, - {314568, 1024 }, - {904995, 512 }, - {637041, 1024 }, + // 3.5" standard M.O. disks + {248826, 512 }, + { 446325, 512 }, + { 1041500, 512 }, + { 310352, 2048}, + { 605846, 2048}, + { 1063146, 2048}, + // 5.25" M.O. disks + { 573624, 512 }, + { 314568, 1024}, + { 904995, 512 }, + { 637041, 1024}, }; typedef struct @@ -54,128 +53,125 @@ typedef struct const char vendor[9]; const char model[16]; const char revision[5]; - int8_t supported_media[KNOWN_MO_TYPES]; + int8_t supported_media[KNOWN_MO_TYPES]; } mo_drive_type_t; #define KNOWN_MO_DRIVE_TYPES 22 static const mo_drive_type_t mo_drive_types[KNOWN_MO_DRIVE_TYPES] = { - {"86BOX", "MAGNETO OPTICAL", "1.00",{1, 1, 1, 1, 1, 1, 1, 1, 1, 1}}, - {"FUJITSU", "M2512A", "1314",{1, 1, 0, 0, 0, 0, 0, 0, 0}}, - {"FUJITSU", "M2513-MCC3064SS", "1.00",{1, 1, 1, 1, 0, 0, 0, 0, 0, 0}}, - {"FUJITSU", "MCE3130SS", "0070",{1, 1, 1, 1, 1, 0, 0, 0, 0, 0}}, - {"FUJITSU", "MCF3064SS", "0030",{1, 1, 1, 1, 0, 0, 0, 0, 0, 0}}, - {"FUJITSU", "MCJ3230UB-S", "0040",{1, 1, 1, 1, 1, 1, 0, 0, 0, 0}}, - {"HP", "S6300.65", "1.00",{0, 0, 0, 0, 0, 0, 1, 1, 0, 0}}, - {"HP", "C1716C", "1.00",{0, 0, 0, 0, 0, 0, 1, 1, 0, 1}}, - {"IBM", "0632AAA", "1.00",{0, 0, 0, 0, 0, 0, 1, 1, 0, 0}}, - {"IBM", "0632CHC", "1.00",{0, 0, 0, 0, 0, 0, 1, 1, 0, 1}}, - {"IBM", "0632CHX", "1.00",{0, 0, 0, 0, 0, 0, 1, 1, 0, 1}}, - {"IBM", "MD3125A", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, - {"IBM", "MD3125B", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, - {"IBM", "MTA-3127", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, - {"IBM", "MTA-3230", "1.00",{1, 1, 0, 0, 0, 0, 0, 0, 0, 0}}, - {"MATSHITA", "LF-3000", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, - {"MOST", "RMD-5100", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, - {"RICOH", "RO-5031E", "1.00",{0, 0, 0, 0, 0, 0, 1, 1, 0, 0}}, - {"SONY", "SMO-C301", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, - {"SONY", "SMO-C501", "1.00",{0, 0, 0, 0, 0, 0, 1, 1, 0, 0}}, - {"TEAC", "OD-3000", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, - {"TOSHIBA", "OD-D300", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, + {"86BOX", "MAGNETO OPTICAL", "1.00", { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }}, + { "FUJITSU", "M2512A", "1314", { 1, 1, 0, 0, 0, 0, 0, 0, 0 } }, + { "FUJITSU", "M2513-MCC3064SS", "1.00", { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0 }}, + { "FUJITSU", "MCE3130SS", "0070", { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0 }}, + { "FUJITSU", "MCF3064SS", "0030", { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0 }}, + { "FUJITSU", "MCJ3230UB-S", "0040", { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 }}, + { "HP", "S6300.65", "1.00", { 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }}, + { "HP", "C1716C", "1.00", { 0, 0, 0, 0, 0, 0, 1, 1, 0, 1 }}, + { "IBM", "0632AAA", "1.00", { 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }}, + { "IBM", "0632CHC", "1.00", { 0, 0, 0, 0, 0, 0, 1, 1, 0, 1 }}, + { "IBM", "0632CHX", "1.00", { 0, 0, 0, 0, 0, 0, 1, 1, 0, 1 }}, + { "IBM", "MD3125A", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }}, + { "IBM", "MD3125B", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }}, + { "IBM", "MTA-3127", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }}, + { "IBM", "MTA-3230", "1.00", { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }}, + { "MATSHITA", "LF-3000", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }}, + { "MOST", "RMD-5100", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }}, + { "RICOH", "RO-5031E", "1.00", { 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }}, + { "SONY", "SMO-C301", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }}, + { "SONY", "SMO-C501", "1.00", { 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }}, + { "TEAC", "OD-3000", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }}, + { "TOSHIBA", "OD-D300", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }}, }; enum { MO_BUS_DISABLED = 0, - MO_BUS_ATAPI = 5, + MO_BUS_ATAPI = 5, MO_BUS_SCSI, MO_BUS_USB }; typedef struct { - uint8_t id; + uint8_t id; union { - uint8_t res, res0, /* Reserved for other ID's. */ - res1, - ide_channel, scsi_device_id; + uint8_t res, res0, /* Reserved for other ID's. */ + res1, + ide_channel, scsi_device_id; }; - uint8_t bus_type, /* 0 = ATAPI, 1 = SCSI */ - bus_mode, /* Bit 0 = PIO suported; - Bit 1 = DMA supportd. */ - read_only, /* Struct variable reserved for - media status. */ - pad, pad0; + uint8_t bus_type, /* 0 = ATAPI, 1 = SCSI */ + bus_mode, /* Bit 0 = PIO suported; + Bit 1 = DMA supportd. */ + read_only, /* Struct variable reserved for + media status. */ + pad, pad0; - FILE *f; - void *priv; + FILE *f; + void *priv; - char image_path[1024], - prev_image_path[1024]; + char image_path[1024], + prev_image_path[1024]; - uint32_t type, medium_size, - base; - uint16_t sector_size; + uint32_t type, medium_size, + base; + uint16_t sector_size; } mo_drive_t; typedef struct { - mode_sense_pages_t ms_pages_saved; + mode_sense_pages_t ms_pages_saved; mo_drive_t *drv; uint8_t *buffer, - atapi_cdb[16], - current_cdb[16], - sense[256]; + atapi_cdb[16], + current_cdb[16], + sense[256]; uint8_t status, phase, - error, id, - features, cur_lun, - pad0, pad1; + error, id, + features, cur_lun, + pad0, pad1; uint16_t request_length, max_transfer_len; int requested_blocks, packet_status, - total_length, do_page_save, - unit_attention, request_pos, - old_len, pad3; + total_length, do_page_save, + unit_attention, request_pos, + old_len, pad3; uint32_t sector_pos, sector_len, - packet_len, pos; + packet_len, pos; double callback; } mo_t; - -extern mo_t *mo[MO_NUM]; -extern mo_drive_t mo_drives[MO_NUM]; -extern uint8_t atapi_mo_drives[8]; -extern uint8_t scsi_mo_drives[16]; +extern mo_t *mo[MO_NUM]; +extern mo_drive_t mo_drives[MO_NUM]; +extern uint8_t atapi_mo_drives[8]; +extern uint8_t scsi_mo_drives[16]; #define mo_sense_error dev->sense[0] -#define mo_sense_key dev->sense[2] -#define mo_asc dev->sense[12] -#define mo_ascq dev->sense[13] - +#define mo_sense_key dev->sense[2] +#define mo_asc dev->sense[12] +#define mo_ascq dev->sense[13] #ifdef __cplusplus extern "C" { #endif -extern void mo_disk_close(mo_t *dev); -extern void mo_disk_reload(mo_t *dev); -extern void mo_insert(mo_t *dev); +extern void mo_disk_close(mo_t *dev); +extern void mo_disk_reload(mo_t *dev); +extern void mo_insert(mo_t *dev); -extern void mo_global_init(void); -extern void mo_hard_reset(void); +extern void mo_global_init(void); +extern void mo_hard_reset(void); -extern void mo_reset(scsi_common_t *sc); -extern int mo_load(mo_t *dev, char *fn); -extern void mo_close(); +extern void mo_reset(scsi_common_t *sc); +extern int mo_load(mo_t *dev, char *fn); +extern void mo_close(); #ifdef __cplusplus } #endif - -#endif /*EMU_MO_H*/ +#endif /*EMU_MO_H*/ diff --git a/src/include/86box/net_3c503.h b/src/include/86box/net_3c503.h index 4f3a2b20e..147ae0f05 100644 --- a/src/include/86box/net_3c503.h +++ b/src/include/86box/net_3c503.h @@ -1,6 +1,6 @@ #ifndef NET_3C503_H -# define NET_3C503_H +#define NET_3C503_H -extern const device_t threec503_device; +extern const device_t threec503_device; -#endif /*NET_3C503_H*/ +#endif /*NET_3C503_H*/ diff --git a/src/include/86box/net_dp8390.h b/src/include/86box/net_dp8390.h index 264febc93..7cb91d30a 100644 --- a/src/include/86box/net_dp8390.h +++ b/src/include/86box/net_dp8390.h @@ -18,136 +18,136 @@ */ #ifndef NET_DP8390_H -# define NET_DP8390_H +#define NET_DP8390_H /* Never completely fill the ne2k ring so that we never hit the unclear completely full buffer condition. */ #define DP8390_NEVER_FULL_RING (1) -#define DP8390_DWORD_MEMSIZ (32*1024) -#define DP8390_DWORD_MEMSTART (16*1024) -#define DP8390_DWORD_MEMEND (DP8390_DWORD_MEMSTART+DP8390_DWORD_MEMSIZ) +#define DP8390_DWORD_MEMSIZ (32 * 1024) +#define DP8390_DWORD_MEMSTART (16 * 1024) +#define DP8390_DWORD_MEMEND (DP8390_DWORD_MEMSTART + DP8390_DWORD_MEMSIZ) -#define DP8390_WORD_MEMSIZ (16*1024) -#define DP8390_WORD_MEMSTART (8*1024) -#define DP8390_WORD_MEMEND (DP8390_WORD_MEMSTART+DP8390_WORD_MEMSIZ) +#define DP8390_WORD_MEMSIZ (16 * 1024) +#define DP8390_WORD_MEMSTART (8 * 1024) +#define DP8390_WORD_MEMEND (DP8390_WORD_MEMSTART + DP8390_WORD_MEMSIZ) -#define DP8390_FLAG_EVEN_MAC 0x01 -#define DP8390_FLAG_CHECK_CR 0x02 -#define DP8390_FLAG_CLEAR_IRQ 0x04 +#define DP8390_FLAG_EVEN_MAC 0x01 +#define DP8390_FLAG_CHECK_CR 0x02 +#define DP8390_FLAG_CLEAR_IRQ 0x04 typedef struct { /* Page 0 */ /* Command Register - 00h read/write */ struct CR_t { - int stop; /* STP - Software Reset command */ - int start; /* START - start the NIC */ - int tx_packet; /* TXP - initiate packet transmission */ - uint8_t rdma_cmd; /* RD0,RD1,RD2 - Remote DMA command */ - uint8_t pgsel; /* PS0,PS1 - Page select */ - } CR; + int stop; /* STP - Software Reset command */ + int start; /* START - start the NIC */ + int tx_packet; /* TXP - initiate packet transmission */ + uint8_t rdma_cmd; /* RD0,RD1,RD2 - Remote DMA command */ + uint8_t pgsel; /* PS0,PS1 - Page select */ + } CR; /* Interrupt Status Register - 07h read/write */ struct ISR_t { - int pkt_rx; /* PRX - packet received with no errors */ - int pkt_tx; /* PTX - packet txed with no errors */ - int rx_err; /* RXE - packet rxed with 1 or more errors */ - int tx_err; /* TXE - packet txed " " " " " */ - int overwrite; /* OVW - rx buffer resources exhausted */ - int cnt_oflow; /* CNT - network tally counter MSB's set */ - int rdma_done; /* RDC - remote DMA complete */ - int reset; /* RST - reset status */ - } ISR; + int pkt_rx; /* PRX - packet received with no errors */ + int pkt_tx; /* PTX - packet txed with no errors */ + int rx_err; /* RXE - packet rxed with 1 or more errors */ + int tx_err; /* TXE - packet txed " " " " " */ + int overwrite; /* OVW - rx buffer resources exhausted */ + int cnt_oflow; /* CNT - network tally counter MSB's set */ + int rdma_done; /* RDC - remote DMA complete */ + int reset; /* RST - reset status */ + } ISR; /* Interrupt Mask Register - 0fh write */ struct IMR_t { - int rx_inte; /* PRXE - packet rx interrupt enable */ - int tx_inte; /* PTXE - packet tx interrput enable */ - int rxerr_inte; /* RXEE - rx error interrupt enable */ - int txerr_inte; /* TXEE - tx error interrupt enable */ - int overw_inte; /* OVWE - overwrite warn int enable */ - int cofl_inte; /* CNTE - counter o'flow int enable */ - int rdma_inte; /* RDCE - remote DMA complete int enable */ - int reserved; /* D7 - reserved */ - } IMR; + int rx_inte; /* PRXE - packet rx interrupt enable */ + int tx_inte; /* PTXE - packet tx interrput enable */ + int rxerr_inte; /* RXEE - rx error interrupt enable */ + int txerr_inte; /* TXEE - tx error interrupt enable */ + int overw_inte; /* OVWE - overwrite warn int enable */ + int cofl_inte; /* CNTE - counter o'flow int enable */ + int rdma_inte; /* RDCE - remote DMA complete int enable */ + int reserved; /* D7 - reserved */ + } IMR; /* Data Configuration Register - 0eh write */ struct DCR_t { - int wdsize; /* WTS - 8/16-bit select */ - int endian; /* BOS - byte-order select */ - int longaddr; /* LAS - long-address select */ - int loop; /* LS - loopback select */ - int auto_rx; /* AR - auto-remove rx pkts with remote DMA */ - uint8_t fifo_size; /* FT0,FT1 - fifo threshold */ - } DCR; + int wdsize; /* WTS - 8/16-bit select */ + int endian; /* BOS - byte-order select */ + int longaddr; /* LAS - long-address select */ + int loop; /* LS - loopback select */ + int auto_rx; /* AR - auto-remove rx pkts with remote DMA */ + uint8_t fifo_size; /* FT0,FT1 - fifo threshold */ + } DCR; /* Transmit Configuration Register - 0dh write */ struct TCR_t { - int crc_disable; /* CRC - inhibit tx CRC */ - uint8_t loop_cntl; /* LB0,LB1 - loopback control */ - int ext_stoptx; /* ATD - allow tx disable by external mcast */ - int coll_prio; /* OFST - backoff algorithm select */ - uint8_t reserved; /* D5,D6,D7 - reserved */ - } TCR; + int crc_disable; /* CRC - inhibit tx CRC */ + uint8_t loop_cntl; /* LB0,LB1 - loopback control */ + int ext_stoptx; /* ATD - allow tx disable by external mcast */ + int coll_prio; /* OFST - backoff algorithm select */ + uint8_t reserved; /* D5,D6,D7 - reserved */ + } TCR; /* Transmit Status Register - 04h read */ struct TSR_t { - int tx_ok; /* PTX - tx complete without error */ - int reserved; /* D1 - reserved */ - int collided; /* COL - tx collided >= 1 times */ - int aborted; /* ABT - aborted due to excessive collisions */ - int no_carrier; /* CRS - carrier-sense lost */ - int fifo_ur; /* FU - FIFO underrun */ - int cd_hbeat; /* CDH - no tx cd-heartbeat from transceiver */ - int ow_coll; /* OWC - out-of-window collision */ - } TSR; + int tx_ok; /* PTX - tx complete without error */ + int reserved; /* D1 - reserved */ + int collided; /* COL - tx collided >= 1 times */ + int aborted; /* ABT - aborted due to excessive collisions */ + int no_carrier; /* CRS - carrier-sense lost */ + int fifo_ur; /* FU - FIFO underrun */ + int cd_hbeat; /* CDH - no tx cd-heartbeat from transceiver */ + int ow_coll; /* OWC - out-of-window collision */ + } TSR; /* Receive Configuration Register - 0ch write */ struct RCR_t { - int errors_ok; /* SEP - accept pkts with rx errors */ - int runts_ok; /* AR - accept < 64-byte runts */ - int broadcast; /* AB - accept eth broadcast address */ - int multicast; /* AM - check mcast hash array */ - int promisc; /* PRO - accept all packets */ - int monitor; /* MON - check pkts, but don't rx */ - uint8_t reserved; /* D6,D7 - reserved */ - } RCR; + int errors_ok; /* SEP - accept pkts with rx errors */ + int runts_ok; /* AR - accept < 64-byte runts */ + int broadcast; /* AB - accept eth broadcast address */ + int multicast; /* AM - check mcast hash array */ + int promisc; /* PRO - accept all packets */ + int monitor; /* MON - check pkts, but don't rx */ + uint8_t reserved; /* D6,D7 - reserved */ + } RCR; /* Receive Status Register - 0ch read */ struct RSR_t { - int rx_ok; /* PRX - rx complete without error */ - int bad_crc; /* CRC - Bad CRC detected */ - int bad_falign; /* FAE - frame alignment error */ - int fifo_or; /* FO - FIFO overrun */ - int rx_missed; /* MPA - missed packet error */ - int rx_mbit; /* PHY - unicast or mcast/bcast address match */ - int rx_disabled; /* DIS - set when in monitor mode */ - int deferred; /* DFR - collision active */ - } RSR; + int rx_ok; /* PRX - rx complete without error */ + int bad_crc; /* CRC - Bad CRC detected */ + int bad_falign; /* FAE - frame alignment error */ + int fifo_or; /* FO - FIFO overrun */ + int rx_missed; /* MPA - missed packet error */ + int rx_mbit; /* PHY - unicast or mcast/bcast address match */ + int rx_disabled; /* DIS - set when in monitor mode */ + int deferred; /* DFR - collision active */ + } RSR; - uint16_t local_dma; /* 01,02h read ; current local DMA addr */ - uint8_t page_start; /* 01h write ; page start regr */ - uint8_t page_stop; /* 02h write ; page stop regr */ - uint8_t bound_ptr; /* 03h read/write ; boundary pointer */ - uint8_t tx_page_start; /* 04h write ; transmit page start reg */ - uint8_t num_coll; /* 05h read ; number-of-collisions reg */ - uint16_t tx_bytes; /* 05,06h write ; transmit byte-count reg */ - uint8_t fifo; /* 06h read ; FIFO */ - uint16_t remote_dma; /* 08,09h read ; current remote DMA addr */ - uint16_t remote_start; /* 08,09h write ; remote start address reg */ - uint16_t remote_bytes; /* 0a,0bh write ; remote byte-count reg */ - uint8_t tallycnt_0; /* 0dh read ; tally ctr 0 (frame align errs) */ - uint8_t tallycnt_1; /* 0eh read ; tally ctr 1 (CRC errors) */ - uint8_t tallycnt_2; /* 0fh read ; tally ctr 2 (missed pkt errs) */ + uint16_t local_dma; /* 01,02h read ; current local DMA addr */ + uint8_t page_start; /* 01h write ; page start regr */ + uint8_t page_stop; /* 02h write ; page stop regr */ + uint8_t bound_ptr; /* 03h read/write ; boundary pointer */ + uint8_t tx_page_start; /* 04h write ; transmit page start reg */ + uint8_t num_coll; /* 05h read ; number-of-collisions reg */ + uint16_t tx_bytes; /* 05,06h write ; transmit byte-count reg */ + uint8_t fifo; /* 06h read ; FIFO */ + uint16_t remote_dma; /* 08,09h read ; current remote DMA addr */ + uint16_t remote_start; /* 08,09h write ; remote start address reg */ + uint16_t remote_bytes; /* 0a,0bh write ; remote byte-count reg */ + uint8_t tallycnt_0; /* 0dh read ; tally ctr 0 (frame align errs) */ + uint8_t tallycnt_1; /* 0eh read ; tally ctr 1 (CRC errors) */ + uint8_t tallycnt_2; /* 0fh read ; tally ctr 2 (missed pkt errs) */ /* Page 1 */ /* Command Register 00h (repeated) */ - uint8_t physaddr[6]; /* 01-06h read/write ; MAC address */ - uint8_t curr_page; /* 07h read/write ; current page register */ - uint8_t mchash[8]; /* 08-0fh read/write ; multicast hash array */ + uint8_t physaddr[6]; /* 01-06h read/write ; MAC address */ + uint8_t curr_page; /* 07h read/write ; current page register */ + uint8_t mchash[8]; /* 08-0fh read/write ; multicast hash array */ /* Page 2 - diagnostic use only */ @@ -162,57 +162,55 @@ typedef struct { * Data Configuration Register 0eh read (repeated) * Interrupt Mask Register 0fh read (repeated) */ - uint8_t rempkt_ptr; /* 03h read/write ; rmt next-pkt ptr */ - uint8_t localpkt_ptr; /* 05h read/write ; lcl next-pkt ptr */ - uint16_t address_cnt; /* 06,07h read/write ; address cter */ + uint8_t rempkt_ptr; /* 03h read/write ; rmt next-pkt ptr */ + uint8_t localpkt_ptr; /* 05h read/write ; lcl next-pkt ptr */ + uint16_t address_cnt; /* 06,07h read/write ; address cter */ /* Page 3 - should never be modified. */ /* DP8390 memory */ - uint8_t *mem; /* on-chip packet memory */ + uint8_t *mem; /* on-chip packet memory */ - uint8_t macaddr[32]; /* ASIC ROM'd MAC address, even bytes */ - uint8_t macaddr_size, /* Defaults to 16 but can be 32 */ - flags, /* Flags affecting some behaviors. */ - id0, /* 0x50 for the Realtek NIC's, otherwise - 0xFF. */ - id1; /* 0x70 for the RTL8019AS, 0x43 for the - RTL8029AS, otherwise 0xFF. */ - int mem_size, mem_start, mem_end; + uint8_t macaddr[32]; /* ASIC ROM'd MAC address, even bytes */ + uint8_t macaddr_size, /* Defaults to 16 but can be 32 */ + flags, /* Flags affecting some behaviors. */ + id0, /* 0x50 for the Realtek NIC's, otherwise + 0xFF. */ + id1; /* 0x70 for the RTL8019AS, 0x43 for the + RTL8029AS, otherwise 0xFF. */ + int mem_size, mem_start, mem_end; - int tx_timer_index; - int tx_timer_active; + int tx_timer_index; + int tx_timer_active; - void *priv; + void *priv; netcard_t *card; - void (*interrupt)(void *priv, int set); + void (*interrupt)(void *priv, int set); } dp8390_t; -extern const device_t dp8390_device; -extern int dp3890_inst; +extern const device_t dp8390_device; +extern int dp3890_inst; +extern uint32_t dp8390_chipmem_read(dp8390_t *dev, uint32_t addr, unsigned int len); +extern void dp8390_chipmem_write(dp8390_t *dev, uint32_t addr, uint32_t val, unsigned len); -extern uint32_t dp8390_chipmem_read(dp8390_t *dev, uint32_t addr, unsigned int len); -extern void dp8390_chipmem_write(dp8390_t *dev, uint32_t addr, uint32_t val, unsigned len); +extern uint32_t dp8390_read_cr(dp8390_t *dev); +extern void dp8390_write_cr(dp8390_t *dev, uint32_t val); -extern uint32_t dp8390_read_cr(dp8390_t *dev); -extern void dp8390_write_cr(dp8390_t *dev, uint32_t val); +extern int dp8390_rx(void *priv, uint8_t *buf, int io_len); -extern int dp8390_rx(void *priv, uint8_t *buf, int io_len); - -extern uint32_t dp8390_page0_read(dp8390_t *dev, uint32_t off, unsigned int len); -extern void dp8390_page0_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len); -extern uint32_t dp8390_page1_read(dp8390_t *dev, uint32_t off, unsigned int len); -extern void dp8390_page1_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len); -extern uint32_t dp8390_page2_read(dp8390_t *dev, uint32_t off, unsigned int len); -extern void dp8390_page2_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len); - -extern void dp8390_set_defaults(dp8390_t *dev, uint8_t flags); -extern void dp8390_mem_alloc(dp8390_t *dev, uint32_t start, uint32_t size); -extern void dp8390_set_id(dp8390_t *dev, uint8_t id0, uint8_t id1); -extern void dp8390_reset(dp8390_t *dev); -extern void dp8390_soft_reset(dp8390_t *dev); +extern uint32_t dp8390_page0_read(dp8390_t *dev, uint32_t off, unsigned int len); +extern void dp8390_page0_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len); +extern uint32_t dp8390_page1_read(dp8390_t *dev, uint32_t off, unsigned int len); +extern void dp8390_page1_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len); +extern uint32_t dp8390_page2_read(dp8390_t *dev, uint32_t off, unsigned int len); +extern void dp8390_page2_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len); +extern void dp8390_set_defaults(dp8390_t *dev, uint8_t flags); +extern void dp8390_mem_alloc(dp8390_t *dev, uint32_t start, uint32_t size); +extern void dp8390_set_id(dp8390_t *dev, uint8_t id0, uint8_t id1); +extern void dp8390_reset(dp8390_t *dev); +extern void dp8390_soft_reset(dp8390_t *dev); #endif /*NET_DP8390_H*/ diff --git a/src/include/86box/net_ne2000.h b/src/include/86box/net_ne2000.h index 23870b989..9989c1673 100644 --- a/src/include/86box/net_ne2000.h +++ b/src/include/86box/net_ne2000.h @@ -34,24 +34,21 @@ */ #ifndef NET_NE2000_H -# define NET_NE2000_H - +#define NET_NE2000_H enum { - NE2K_NONE = 0, - NE2K_NE1000 = 1, /* 8-bit ISA NE1000 */ - NE2K_NE2000 = 2, /* 16-bit ISA NE2000 */ - NE2K_ETHERNEXT_MC = 3, /* 16-bit MCA EtherNext/MC */ - NE2K_RTL8019AS = 4, /* 16-bit ISA PnP Realtek 8019AS */ - NE2K_RTL8029AS = 5 /* 32-bit PCI Realtek 8029AS */ + NE2K_NONE = 0, + NE2K_NE1000 = 1, /* 8-bit ISA NE1000 */ + NE2K_NE2000 = 2, /* 16-bit ISA NE2000 */ + NE2K_ETHERNEXT_MC = 3, /* 16-bit MCA EtherNext/MC */ + NE2K_RTL8019AS = 4, /* 16-bit ISA PnP Realtek 8019AS */ + NE2K_RTL8029AS = 5 /* 32-bit PCI Realtek 8029AS */ }; +extern const device_t ne1000_device; +extern const device_t ne2000_device; +extern const device_t ethernext_mc_device; +extern const device_t rtl8019as_device; +extern const device_t rtl8029as_device; -extern const device_t ne1000_device; -extern const device_t ne2000_device; -extern const device_t ethernext_mc_device; -extern const device_t rtl8019as_device; -extern const device_t rtl8029as_device; - - -#endif /*NET_NE2000_H*/ +#endif /*NET_NE2000_H*/ diff --git a/src/include/86box/net_pcnet.h b/src/include/86box/net_pcnet.h index e6ae84eff..f1db74045 100644 --- a/src/include/86box/net_pcnet.h +++ b/src/include/86box/net_pcnet.h @@ -18,24 +18,23 @@ */ #ifndef NET_PCNET_H -# define NET_PCNET_H +#define NET_PCNET_H enum { - DEV_NONE = 0, - DEV_AM79C960 = 1, /* PCnet-ISA (ISA, 10 Mbps, NE2100/NE1500T compatible) */ + DEV_NONE = 0, + DEV_AM79C960 = 1, /* PCnet-ISA (ISA, 10 Mbps, NE2100/NE1500T compatible) */ DEV_AM79C960_EB = 2, /* PCnet-ISA (ISA, 10 Mbps, Racal InterLan EtherBlaster compatible) */ DEV_AM79C960_VLB = 3, /* PCnet-VLB (VLB, 10 Mbps, NE2100/NE1500T compatible) */ - DEV_AM79C961 = 4, /* PCnet-ISA+ (ISA, 10 Mbps, NE2100/NE1500T compatible, Plug and Play) */ - DEV_AM79C970A = 5, /* PCnet-PCI II (PCI, 10 Mbps) */ - DEV_AM79C973 = 6 /* PCnet-FAST III (PCI, 10/100 Mbps) */ + DEV_AM79C961 = 4, /* PCnet-ISA+ (ISA, 10 Mbps, NE2100/NE1500T compatible, Plug and Play) */ + DEV_AM79C970A = 5, /* PCnet-PCI II (PCI, 10 Mbps) */ + DEV_AM79C973 = 6 /* PCnet-FAST III (PCI, 10/100 Mbps) */ }; +extern const device_t pcnet_am79c960_device; +extern const device_t pcnet_am79c960_eb_device; +extern const device_t pcnet_am79c960_vlb_device; +extern const device_t pcnet_am79c961_device; +extern const device_t pcnet_am79c970a_device; +extern const device_t pcnet_am79c973_device; -extern const device_t pcnet_am79c960_device; -extern const device_t pcnet_am79c960_eb_device; -extern const device_t pcnet_am79c960_vlb_device; -extern const device_t pcnet_am79c961_device; -extern const device_t pcnet_am79c970a_device; -extern const device_t pcnet_am79c973_device; - -#endif /*NET_PCNET_H*/ +#endif /*NET_PCNET_H*/ diff --git a/src/include/86box/net_plip.h b/src/include/86box/net_plip.h index 69cb80da0..890de3fd0 100644 --- a/src/include/86box/net_plip.h +++ b/src/include/86box/net_plip.h @@ -15,11 +15,11 @@ */ #ifndef NET_PLIP_H -# define NET_PLIP_H -# include <86box/device.h> -# include <86box/lpt.h> +#define NET_PLIP_H +#include <86box/device.h> +#include <86box/lpt.h> extern const lpt_device_t lpt_plip_device; -extern const device_t plip_device; +extern const device_t plip_device; #endif /*NET_PLIP_H*/ diff --git a/src/include/86box/net_wd8003.h b/src/include/86box/net_wd8003.h index 08bd901fe..ee313c1a9 100644 --- a/src/include/86box/net_wd8003.h +++ b/src/include/86box/net_wd8003.h @@ -42,23 +42,23 @@ */ #ifndef NET_WD8003_H -# define NET_WD8003_H +#define NET_WD8003_H enum { WD_NONE = 0, - WD8003E, /* WD8003E : 8-bit ISA, no interface chip */ - WD8003EB, /* WD8003EB : 8-bit ISA, 5x3 interface chip */ - WD8013EBT, /* WD8013EBT : 16-bit ISA, no interface chip */ - WD8003ETA, /* WD8003ET/A: 16-bit MCA, no interface chip */ - WD8003EA, /* WD8003E/A : 16-bit MCA, 5x3 interface chip */ + WD8003E, /* WD8003E : 8-bit ISA, no interface chip */ + WD8003EB, /* WD8003EB : 8-bit ISA, 5x3 interface chip */ + WD8013EBT, /* WD8013EBT : 16-bit ISA, no interface chip */ + WD8003ETA, /* WD8003ET/A: 16-bit MCA, no interface chip */ + WD8003EA, /* WD8003E/A : 16-bit MCA, 5x3 interface chip */ WD8013EPA }; -extern const device_t wd8003e_device; -extern const device_t wd8003eb_device; -extern const device_t wd8013ebt_device; -extern const device_t wd8003eta_device; -extern const device_t wd8003ea_device; -extern const device_t wd8013epa_device; +extern const device_t wd8003e_device; +extern const device_t wd8003eb_device; +extern const device_t wd8013ebt_device; +extern const device_t wd8003eta_device; +extern const device_t wd8003ea_device; +extern const device_t wd8013epa_device; -#endif /*NET_WD8003_H*/ +#endif /*NET_WD8003_H*/ diff --git a/src/include/86box/network.h b/src/include/86box/network.h index f294bf500..04dbc4b25 100644 --- a/src/include/86box/network.h +++ b/src/include/86box/network.h @@ -46,24 +46,23 @@ */ #ifndef EMU_NETWORK_H -# define EMU_NETWORK_H -# include - +#define EMU_NETWORK_H +#include /* Network provider types. */ -#define NET_TYPE_NONE 0 /* networking disabled */ -#define NET_TYPE_SLIRP 1 /* use the SLiRP port forwarder */ -#define NET_TYPE_PCAP 2 /* use the (Win)Pcap API */ +#define NET_TYPE_NONE 0 /* networking disabled */ +#define NET_TYPE_SLIRP 1 /* use the SLiRP port forwarder */ +#define NET_TYPE_PCAP 2 /* use the (Win)Pcap API */ -#define NET_MAX_FRAME 1518 +#define NET_MAX_FRAME 1518 /* Queue size must be a power of 2 */ -#define NET_QUEUE_LEN 16 +#define NET_QUEUE_LEN 16 #define NET_QUEUE_LEN_MASK (NET_QUEUE_LEN - 1) -#define NET_CARD_MAX 4 -#define NET_HOST_INTF_MAX 64 +#define NET_CARD_MAX 4 +#define NET_HOST_INTF_MAX 64 -#define NET_PERIOD_10M 0.8 -#define NET_PERIOD_100M 0.08 +#define NET_PERIOD_10M 0.8 +#define NET_PERIOD_100M 0.08 enum { NET_LINK_DOWN = (1 << 1), @@ -92,28 +91,27 @@ enum { }; typedef struct { - int device_num; - int net_type; - char host_dev_name[128]; + int device_num; + int net_type; + char host_dev_name[128]; uint32_t link_state; } netcard_conf_t; extern netcard_conf_t net_cards_conf[NET_CARD_MAX]; -extern int net_card_current; +extern int net_card_current; typedef int (*NETRXCB)(void *, uint8_t *, int); typedef int (*NETSETLINKSTATE)(void *, uint32_t link_state); - typedef struct netpkt { - uint8_t *data; - int len; + uint8_t *data; + int len; } netpkt_t; typedef struct { netpkt_t packets[NET_QUEUE_LEN]; - int head; - int tail; + int head; + int tail; } netqueue_t; typedef struct _netcard_t netcard_t; @@ -147,41 +145,39 @@ struct _netcard_t { }; typedef struct { - char device[128]; - char description[128]; + char device[128]; + char description[128]; } netdev_t; - #ifdef __cplusplus extern "C" { #endif /* Global variables. */ -extern int nic_do_log; /* config */ +extern int nic_do_log; /* config */ extern int network_ndev; extern netdev_t network_devs[NET_HOST_INTF_MAX]; - /* Function prototypes. */ -extern void network_init(void); +extern void network_init(void); extern netcard_t *network_attach(void *card_drv, uint8_t *mac, NETRXCB rx, NETSETLINKSTATE set_link_state); -extern void netcard_close(netcard_t *card); -extern void network_close(void); -extern void network_reset(void); -extern int network_available(void); -extern void network_tx(netcard_t *card, uint8_t *, int); +extern void netcard_close(netcard_t *card); +extern void network_close(void); +extern void network_reset(void); +extern int network_available(void); +extern void network_tx(netcard_t *card, uint8_t *, int); -extern int net_pcap_prepare(netdev_t *); +extern int net_pcap_prepare(netdev_t *); -extern void network_connect(int id, int connect); -extern int network_is_connected(int id); -extern int network_dev_available(int); -extern int network_dev_to_id(char *); -extern int network_card_available(int); -extern int network_card_has_config(int); -extern char *network_card_get_internal_name(int); -extern int network_card_get_from_internal_name(char *); -extern const device_t *network_card_getdevice(int); +extern void network_connect(int id, int connect); +extern int network_is_connected(int id); +extern int network_dev_available(int); +extern int network_dev_to_id(char *); +extern int network_card_available(int); +extern int network_card_has_config(int); +extern char *network_card_get_internal_name(int); +extern int network_card_get_from_internal_name(char *); +extern const device_t *network_card_getdevice(int); extern int network_tx_pop(netcard_t *card, netpkt_t *out_pkt); extern int network_tx_popv(netcard_t *card, netpkt_t *pkt_vec, int vec_size); @@ -191,5 +187,4 @@ extern int network_rx_put_pkt(netcard_t *card, netpkt_t *pkt); } #endif - -#endif /*EMU_NETWORK_H*/ +#endif /*EMU_NETWORK_H*/ diff --git a/src/include/86box/nmi.h b/src/include/86box/nmi.h index b2378af93..319d63b6b 100644 --- a/src/include/86box/nmi.h +++ b/src/include/86box/nmi.h @@ -3,13 +3,12 @@ */ #ifndef EMU_NMI_H -# define EMU_NMI_H +#define EMU_NMI_H extern int nmi_mask; extern int nmi; extern int nmi_auto_clear; - extern void nmi_init(void); extern void nmi_write(uint16_t port, uint8_t val, void *p); diff --git a/src/include/86box/nvr.h b/src/include/86box/nvr.h index 1788fc91b..34f11efd4 100644 --- a/src/include/86box/nvr.h +++ b/src/include/86box/nvr.h @@ -48,44 +48,41 @@ */ #ifndef EMU_NVR_H -# define EMU_NVR_H +#define EMU_NVR_H - -#define NVR_MAXSIZE 512 /* max size of NVR data */ +#define NVR_MAXSIZE 512 /* max size of NVR data */ /* Conversion from BCD to Binary and vice versa. */ -#define RTC_BCD(x) (((x) % 10) | (((x) / 10) << 4)) -#define RTC_DCB(x) ((((x) & 0xf0) >> 4) * 10 + ((x) & 0x0f)) -#define RTC_BCDINC(x,y) RTC_BCD(RTC_DCB(x) + y) +#define RTC_BCD(x) (((x) % 10) | (((x) / 10) << 4)) +#define RTC_DCB(x) ((((x) &0xf0) >> 4) * 10 + ((x) &0x0f)) +#define RTC_BCDINC(x, y) RTC_BCD(RTC_DCB(x) + y) /* Time sync options */ -#define TIME_SYNC_DISABLED 0 -#define TIME_SYNC_ENABLED 1 -#define TIME_SYNC_UTC 2 - +#define TIME_SYNC_DISABLED 0 +#define TIME_SYNC_ENABLED 1 +#define TIME_SYNC_UTC 2 /* Define a generic RTC/NVRAM device. */ typedef struct _nvr_ { - char *fn; /* pathname of image file */ - uint16_t size; /* device configuration */ - int8_t irq, is_new; + char *fn; /* pathname of image file */ + uint16_t size; /* device configuration */ + int8_t irq, is_new; - uint8_t onesec_cnt; - pc_timer_t onesec_time; + uint8_t onesec_cnt; + pc_timer_t onesec_time; - void *data; /* local data */ + void *data; /* local data */ /* Hooks to device functions. */ - void (*reset)(struct _nvr_ *); - void (*start)(struct _nvr_ *); - void (*tick)(struct _nvr_ *); - void (*ven_save)(void); + void (*reset)(struct _nvr_ *); + void (*start)(struct _nvr_ *); + void (*tick)(struct _nvr_ *); + void (*ven_save)(void); - uint8_t regs[NVR_MAXSIZE]; /* these are the registers */ + uint8_t regs[NVR_MAXSIZE]; /* these are the registers */ } nvr_t; - -extern int nvr_dosave; +extern int nvr_dosave; #ifdef EMU_DEVICE_H extern const device_t at_nvr_old_device; extern const device_t at_nvr_device; @@ -102,32 +99,30 @@ extern const device_t via_nvr_device; extern const device_t p6rp4_nvr_device; #endif +extern void rtc_tick(void); -extern void rtc_tick(void); +extern void nvr_init(nvr_t *); +extern char *nvr_path(char *str); +extern FILE *nvr_fopen(char *str, char *mode); +extern int nvr_load(void); +extern void nvr_close(void); +extern void nvr_set_ven_save(void (*ven_save)(void)); +extern int nvr_save(void); -extern void nvr_init(nvr_t *); -extern char *nvr_path(char *str); -extern FILE *nvr_fopen(char *str, char *mode); -extern int nvr_load(void); -extern void nvr_close(void); -extern void nvr_set_ven_save(void (*ven_save)(void)); -extern int nvr_save(void); +extern int nvr_is_leap(int year); +extern int nvr_get_days(int month, int year); +extern void nvr_time_sync(); +extern void nvr_time_get(struct tm *); +extern void nvr_time_set(struct tm *); -extern int nvr_is_leap(int year); -extern int nvr_get_days(int month, int year); -extern void nvr_time_sync(); -extern void nvr_time_get(struct tm *); -extern void nvr_time_set(struct tm *); +extern void nvr_reg_write(uint16_t reg, uint8_t val, void *priv); +extern void nvr_at_handler(int set, uint16_t base, nvr_t *nvr); +extern void nvr_at_sec_handler(int set, uint16_t base, nvr_t *nvr); +extern void nvr_read_addr_set(int set, nvr_t *nvr); +extern void nvr_wp_set(int set, int h, nvr_t *nvr); +extern void nvr_via_wp_set(int set, int reg, nvr_t *nvr); +extern void nvr_bank_set(int base, uint8_t bank, nvr_t *nvr); +extern void nvr_lock_set(int base, int size, int lock, nvr_t *nvr); +extern void nvr_irq_set(int irq, nvr_t *nvr); -extern void nvr_reg_write(uint16_t reg, uint8_t val, void *priv); -extern void nvr_at_handler(int set, uint16_t base, nvr_t *nvr); -extern void nvr_at_sec_handler(int set, uint16_t base, nvr_t *nvr); -extern void nvr_read_addr_set(int set, nvr_t *nvr); -extern void nvr_wp_set(int set, int h, nvr_t *nvr); -extern void nvr_via_wp_set(int set, int reg, nvr_t *nvr); -extern void nvr_bank_set(int base, uint8_t bank, nvr_t *nvr); -extern void nvr_lock_set(int base, int size, int lock, nvr_t *nvr); -extern void nvr_irq_set(int irq, nvr_t *nvr); - - -#endif /*EMU_NVR_H*/ +#endif /*EMU_NVR_H*/ diff --git a/src/include/86box/nvr_ps2.h b/src/include/86box/nvr_ps2.h index 0287cdd57..47e2a349c 100644 --- a/src/include/86box/nvr_ps2.h +++ b/src/include/86box/nvr_ps2.h @@ -36,11 +36,9 @@ */ #ifndef EMU_NVRPS2_H -# define EMU_NVRPS2_H +#define EMU_NVRPS2_H +extern const device_t ps2_nvr_device; +extern const device_t ps2_nvr_55ls_device; -extern const device_t ps2_nvr_device; -extern const device_t ps2_nvr_55ls_device; - - -#endif /*EMU_NVRPS2_H*/ +#endif /*EMU_NVRPS2_H*/ diff --git a/src/include/86box/path.h b/src/include/86box/path.h index 85cb0814d..5ef0d9488 100644 --- a/src/include/86box/path.h +++ b/src/include/86box/path.h @@ -1,7 +1,7 @@ -extern void path_get_dirname(char *dest, const char *path); -extern char *path_get_filename(char *s); -extern char *path_get_extension(char *s); -extern void path_append_filename(char *dest, const char *s1, const char *s2); -extern void path_slash(char *path); -extern void path_normalize(char *path); -extern int path_abs(char *path); \ No newline at end of file +extern void path_get_dirname(char *dest, const char *path); +extern char *path_get_filename(char *s); +extern char *path_get_extension(char *s); +extern void path_append_filename(char *dest, const char *s1, const char *s2); +extern void path_slash(char *path); +extern void path_normalize(char *path); +extern int path_abs(char *path); \ No newline at end of file diff --git a/src/include/86box/pci.h b/src/include/86box/pci.h index 7908ea558..230af8993 100644 --- a/src/include/86box/pci.h +++ b/src/include/86box/pci.h @@ -20,39 +20,39 @@ */ #ifndef EMU_PCI_H -# define EMU_PCI_H +#define EMU_PCI_H -#define PCI_REG_COMMAND 0x04 +#define PCI_REG_COMMAND 0x04 -#define PCI_COMMAND_IO 0x01 -#define PCI_COMMAND_MEM 0x02 +#define PCI_COMMAND_IO 0x01 +#define PCI_COMMAND_MEM 0x02 -#define PCI_NO_IRQ_STEERING 0x8000 -#define PCI_CAN_SWITCH_TYPE 0x10000 -#define PCI_NO_BRIDGES 0x20000 +#define PCI_NO_IRQ_STEERING 0x8000 +#define PCI_CAN_SWITCH_TYPE 0x10000 +#define PCI_NO_BRIDGES 0x20000 -#define PCI_CONFIG_TYPE_1 1 -#define PCI_CONFIG_TYPE_2 2 +#define PCI_CONFIG_TYPE_1 1 +#define PCI_CONFIG_TYPE_2 2 #define PCI_CONFIG_TYPE_MASK 0x7fff -#define PCI_INTA 1 -#define PCI_INTB 2 -#define PCI_INTC 3 -#define PCI_INTD 4 +#define PCI_INTA 1 +#define PCI_INTB 2 +#define PCI_INTC 3 +#define PCI_INTD 4 -#define PCI_MIRQ0 0 -#define PCI_MIRQ1 1 -#define PCI_MIRQ2 2 -#define PCI_MIRQ3 3 -#define PCI_MIRQ4 4 -#define PCI_MIRQ5 5 -#define PCI_MIRQ6 6 -#define PCI_MIRQ7 7 +#define PCI_MIRQ0 0 +#define PCI_MIRQ1 1 +#define PCI_MIRQ2 2 +#define PCI_MIRQ3 3 +#define PCI_MIRQ4 4 +#define PCI_MIRQ5 5 +#define PCI_MIRQ6 6 +#define PCI_MIRQ7 7 -#define PCI_IRQ_DISABLED -1 +#define PCI_IRQ_DISABLED -1 -#define PCI_ADD_STRICT 0x80 +#define PCI_ADD_STRICT 0x80 enum { PCI_CARD_NORTHBRIDGE = 0, @@ -61,7 +61,7 @@ enum { PCI_CARD_SOUTHBRIDGE_IDE, PCI_CARD_SOUTHBRIDGE_PMU, PCI_CARD_SOUTHBRIDGE_USB, - PCI_CARD_AGP = 0x0f, + PCI_CARD_AGP = 0x0f, PCI_CARD_NORMAL = 0x10, PCI_CARD_VIDEO, PCI_CARD_SCSI, @@ -78,7 +78,7 @@ enum { PCI_ADD_SOUTHBRIDGE_IDE, PCI_ADD_SOUTHBRIDGE_PMU, PCI_ADD_SOUTHBRIDGE_USB, - PCI_ADD_AGP = 0x0f, + PCI_ADD_AGP = 0x0f, PCI_ADD_NORMAL = 0x10, PCI_ADD_VIDEO, PCI_ADD_SCSI, @@ -90,50 +90,47 @@ enum { typedef union { uint32_t addr; - uint8_t addr_regs[4]; + uint8_t addr_regs[4]; } bar_t; +extern int pci_burst_time, agp_burst_time, + pci_nonburst_time, agp_nonburst_time; -extern int pci_burst_time, agp_burst_time, - pci_nonburst_time, agp_nonburst_time; +extern void pci_set_irq_routing(int pci_int, int irq); +extern void pci_set_irq_level(int pci_int, int level); +extern void pci_enable_mirq(int mirq); +extern void pci_set_mirq_routing(int mirq, int irq); -extern void pci_set_irq_routing(int pci_int, int irq); -extern void pci_set_irq_level(int pci_int, int level); +extern int pci_irq_is_level(int irq); -extern void pci_enable_mirq(int mirq); -extern void pci_set_mirq_routing(int mirq, int irq); +extern void pci_set_mirq(uint8_t mirq, int level); +extern void pci_set_irq(uint8_t card, uint8_t pci_int); +extern void pci_clear_mirq(uint8_t mirq, int level); +extern void pci_clear_irq(uint8_t card, uint8_t pci_int); +extern uint8_t pci_get_int(uint8_t card, uint8_t pci_int); -extern int pci_irq_is_level(int irq); +extern void pci_reset(void); +extern void pci_init(int type); +extern uint8_t pci_register_bus(); +extern void pci_set_pmc(uint8_t pmc); +extern void pci_remap_bus(uint8_t bus_index, uint8_t bus_number); +extern void pci_relocate_slot(int type, int new_slot); +extern void pci_register_slot(int card, int type, + int inta, int intb, int intc, int intd); +extern void pci_register_bus_slot(int bus, int card, int type, + int inta, int intb, int intc, int intd); +extern void pci_close(void); +extern uint8_t pci_add_card(uint8_t add_type, uint8_t (*read)(int func, int addr, void *priv), void (*write)(int func, int addr, uint8_t val, void *priv), void *priv); -extern void pci_set_mirq(uint8_t mirq, int level); -extern void pci_set_irq(uint8_t card, uint8_t pci_int); -extern void pci_clear_mirq(uint8_t mirq, int level); -extern void pci_clear_irq(uint8_t card, uint8_t pci_int); -extern uint8_t pci_get_int(uint8_t card, uint8_t pci_int); +extern void trc_init(void); -extern void pci_reset(void); -extern void pci_init(int type); -extern uint8_t pci_register_bus(); -extern void pci_set_pmc(uint8_t pmc); -extern void pci_remap_bus(uint8_t bus_index, uint8_t bus_number); -extern void pci_relocate_slot(int type, int new_slot); -extern void pci_register_slot(int card, int type, - int inta, int intb, int intc, int intd); -extern void pci_register_bus_slot(int bus, int card, int type, - int inta, int intb, int intc, int intd); -extern void pci_close(void); -extern uint8_t pci_add_card(uint8_t add_type, uint8_t (*read)(int func, int addr, void *priv), void (*write)(int func, int addr, uint8_t val, void *priv), void *priv); +extern uint8_t trc_read(uint16_t port, void *priv); +extern void trc_write(uint16_t port, uint8_t val, void *priv); -extern void trc_init(void); - -extern uint8_t trc_read(uint16_t port, void *priv); -extern void trc_write(uint16_t port, uint8_t val, void *priv); - -extern void pci_bridge_set_ctl(void *priv, uint8_t ctl); - -extern void pci_pic_reset(void); +extern void pci_bridge_set_ctl(void *priv, uint8_t ctl); +extern void pci_pic_reset(void); #ifdef EMU_DEVICE_H extern const device_t dec21150_device; @@ -149,5 +146,4 @@ extern const device_t via_apro_agp_device; extern const device_t via_vt8601_agp_device; #endif - -#endif /*EMU_PCI_H*/ +#endif /*EMU_PCI_H*/ diff --git a/src/include/86box/pci_dummy.h b/src/include/86box/pci_dummy.h index a2ae4b8d0..d221ddd2e 100644 --- a/src/include/86box/pci_dummy.h +++ b/src/include/86box/pci_dummy.h @@ -1,5 +1,5 @@ #ifndef EMU_PCI_DUMMY_H -# define EMU_PCI_DUMMY_H +#define EMU_PCI_DUMMY_H extern void pci_dummy_init(void); diff --git a/src/include/86box/pic.h b/src/include/86box/pic.h index 3720f17d1..d1295be4b 100644 --- a/src/include/86box/pic.h +++ b/src/include/86box/pic.h @@ -17,49 +17,46 @@ */ #ifndef EMU_PIC_H -# define EMU_PIC_H +#define EMU_PIC_H typedef struct pic { - uint8_t icw1, icw2, icw3, icw4, - imr, isr, irr, ocw2, - ocw3, int_pending, is_master, elcr, - state, ack_bytes, priority, special_mask_mode, - auto_eoi_rotate, interrupt, lines, data_bus; - uint32_t at; - struct pic *slaves[8]; + uint8_t icw1, icw2, icw3, icw4, + imr, isr, irr, ocw2, + ocw3, int_pending, is_master, elcr, + state, ack_bytes, priority, special_mask_mode, + auto_eoi_rotate, interrupt, lines, data_bus; + uint32_t at; + struct pic *slaves[8]; } pic_t; +extern pic_t pic, pic2; -extern pic_t pic, pic2; +extern void pic_reset_smi_irq_mask(void); +extern void pic_set_smi_irq_mask(int irq, int set); +extern uint16_t pic_get_smi_irq_status(void); +extern void pic_clear_smi_irq_status(int irq); +extern int pic_elcr_get_enabled(void); +extern void pic_elcr_set_enabled(int enabled); +extern void pic_elcr_io_handler(int set); +extern void pic_elcr_write(uint16_t port, uint8_t val, void *priv); +extern uint8_t pic_elcr_read(uint16_t port, void *priv); -extern void pic_reset_smi_irq_mask(void); -extern void pic_set_smi_irq_mask(int irq, int set); -extern uint16_t pic_get_smi_irq_status(void); -extern void pic_clear_smi_irq_status(int irq); +extern void pic_set_shadow(int sh); +extern void pic_set_pci_flag(int pci); +extern void pic_set_pci(void); +extern void pic_init(void); +extern void pic_init_pcjr(void); +extern void pic2_init(void); +extern void pic_reset(void); -extern int pic_elcr_get_enabled(void); -extern void pic_elcr_set_enabled(int enabled); -extern void pic_elcr_io_handler(int set); -extern void pic_elcr_write(uint16_t port, uint8_t val, void *priv); -extern uint8_t pic_elcr_read(uint16_t port, void *priv); +extern int picint_is_level(int irq); +extern void picint_common(uint16_t num, int level, int set); +extern void picint(uint16_t num); +extern void picintlevel(uint16_t num); +extern void picintc(uint16_t num); +extern int picinterrupt(void); -extern void pic_set_shadow(int sh); -extern void pic_set_pci_flag(int pci); -extern void pic_set_pci(void); -extern void pic_init(void); -extern void pic_init_pcjr(void); -extern void pic2_init(void); -extern void pic_reset(void); +extern uint8_t pic_irq_ack(void); -extern int picint_is_level(int irq); -extern void picint_common(uint16_t num, int level, int set); -extern void picint(uint16_t num); -extern void picintlevel(uint16_t num); -extern void picintc(uint16_t num); -extern int picinterrupt(void); - -extern uint8_t pic_irq_ack(void); - - -#endif /*EMU_PIC_H*/ +#endif /*EMU_PIC_H*/ diff --git a/src/include/86box/pit.h b/src/include/86box/pit.h index 95541014b..f6eb4cc6d 100644 --- a/src/include/86box/pit.h +++ b/src/include/86box/pit.h @@ -16,46 +16,44 @@ */ #ifndef EMU_PIT_H -# define EMU_PIT_H - +#define EMU_PIT_H typedef struct { - uint8_t m, ctrl, - read_status, latch, - s1_det, l_det, - bcd, pad; + uint8_t m, ctrl, + read_status, latch, + s1_det, l_det, + bcd, pad; - uint16_t rl; + uint16_t rl; - int rm, wm, gate, out, - newcount, clock, using_timer, latched, - state, null_count, do_read_status; + int rm, wm, gate, out, + newcount, clock, using_timer, latched, + state, null_count, do_read_status; union { - int count; - struct { - int units :4; - int tens :4; - int hundreds :4; - int thousands :4; - int myriads :4; - }; + int count; + struct { + int units : 4; + int tens : 4; + int hundreds : 4; + int thousands : 4; + int myriads : 4; + }; }; - uint32_t l; + uint32_t l; - void (*load_func)(uint8_t new_m, int new_count); - void (*out_func)(int new_out, int old_out); + void (*load_func)(uint8_t new_m, int new_count); + void (*out_func)(int new_out, int old_out); } ctr_t; - typedef struct PIT { - int flags, clock; - pc_timer_t callback_timer; + int flags, clock; + pc_timer_t callback_timer; - ctr_t counters[3]; + ctr_t counters[3]; - uint8_t ctrl; + uint8_t ctrl; } pit_t; enum { @@ -73,58 +71,55 @@ typedef struct { /* Sets a counter's GATE input. */ void (*set_gate)(void *data, int counter_id, int gate); /* Sets if a counter's CLOCK input is from the timer or not - used by PCjr. */ - void(*set_using_timer)(void *data, int counter_id, int using_timer); + void (*set_using_timer)(void *data, int counter_id, int using_timer); /* Sets a counter's OUT output handler. */ void (*set_out_func)(void *data, int counter_id, void (*func)(int new_out, int old_out)); /* Sets a counter's load count handler. */ - void (*set_load_func)(void *data, int counter_id, void (*func)(uint8_t new_m, int new_count)); + void (*set_load_func)(void *data, int counter_id, void (*func)(uint8_t new_m, int new_count)); void (*ctr_clock)(void *data, int counter_id); void *data; } pit_intf_t; -extern pit_intf_t pit_devs[2]; +extern pit_intf_t pit_devs[2]; extern const pit_intf_t pit_classic_intf; +extern double SYSCLK, PCICLK, AGPCLK; -extern double SYSCLK, PCICLK, AGPCLK; +extern uint64_t PITCONST, ISACONST, + CGACONST, + MDACONST, + HERCCONST, + VGACONST1, + VGACONST2, + RTCCONST; -extern uint64_t PITCONST, ISACONST, - CGACONST, - MDACONST, - HERCCONST, - VGACONST1, - VGACONST2, - RTCCONST; - -extern int refresh_at_enable; +extern int refresh_at_enable; /* Sets a counter's CLOCK input. */ -extern void pit_ctr_set_clock(ctr_t *ctr, int clock); +extern void pit_ctr_set_clock(ctr_t *ctr, int clock); -extern pit_t * pit_common_init(int type, void (*out0)(int new_out, int old_out), void (*out1)(int new_out, int old_out)); -extern pit_t * pit_ps2_init(int type); -extern void pit_reset(pit_t *dev); +extern pit_t *pit_common_init(int type, void (*out0)(int new_out, int old_out), void (*out1)(int new_out, int old_out)); +extern pit_t *pit_ps2_init(int type); +extern void pit_reset(pit_t *dev); -extern void pit_irq0_timer_ps2(int new_out, int old_out); +extern void pit_irq0_timer_ps2(int new_out, int old_out); -extern void pit_refresh_timer_xt(int new_out, int old_out); -extern void pit_refresh_timer_at(int new_out, int old_out); +extern void pit_refresh_timer_xt(int new_out, int old_out); +extern void pit_refresh_timer_at(int new_out, int old_out); -extern void pit_speaker_timer(int new_out, int old_out); +extern void pit_speaker_timer(int new_out, int old_out); -extern void pit_nmi_timer_ps2(int new_out, int old_out); - -extern void pit_set_clock(int clock); -extern void pit_handler(int set, uint16_t base, int size, void *priv); +extern void pit_nmi_timer_ps2(int new_out, int old_out); +extern void pit_set_clock(int clock); +extern void pit_handler(int set, uint16_t base, int size, void *priv); #ifdef EMU_DEVICE_H -extern const device_t i8253_device; -extern const device_t i8254_device; -extern const device_t i8254_sec_device; -extern const device_t i8254_ext_io_device; -extern const device_t i8254_ps2_device; +extern const device_t i8253_device; +extern const device_t i8254_device; +extern const device_t i8254_sec_device; +extern const device_t i8254_ext_io_device; +extern const device_t i8254_ps2_device; #endif - -#endif /*EMU_PIT_H*/ +#endif /*EMU_PIT_H*/ diff --git a/src/include/86box/pit_fast.h b/src/include/86box/pit_fast.h index bc09174fb..317b8f13e 100644 --- a/src/include/86box/pit_fast.h +++ b/src/include/86box/pit_fast.h @@ -69,4 +69,4 @@ extern const device_t i8254_ext_io_fast_device; extern const device_t i8254_ps2_fast_device; #endif -#endif /*EMU_PIT_FAST_H*/ +#endif /*EMU_PIT_FAST_H*/ diff --git a/src/include/86box/plat.h b/src/include/86box/plat.h index 70926fadc..1c17d50bd 100644 --- a/src/include/86box/plat.h +++ b/src/include/86box/plat.h @@ -19,14 +19,14 @@ */ #ifndef EMU_PLAT_H -# define EMU_PLAT_H +#define EMU_PLAT_H #include #include #include "86box/device.h" #include "86box/machine.h" #ifndef GLOBAL -# define GLOBAL extern +# define GLOBAL extern #endif /* String ID numbers. */ @@ -34,142 +34,137 @@ /* The Win32 API uses _wcsicmp. */ #ifdef _WIN32 -# define wcscasecmp _wcsicmp -# define strcasecmp _stricmp +# define wcscasecmp _wcsicmp +# define strcasecmp _stricmp #else /* Declare these functions to avoid warnings. They will redirect to strcasecmp and strncasecmp respectively. */ -extern int stricmp(const char* s1, const char* s2); -extern int strnicmp(const char* s1, const char* s2, size_t n); +extern int stricmp(const char *s1, const char *s2); +extern int strnicmp(const char *s1, const char *s2, size_t n); #endif #if (defined(__HAIKU__) || defined(__unix__) || defined(__APPLE__)) && !defined(__linux__) /* FreeBSD has largefile by default. */ -# define fopen64 fopen -# define fseeko64 fseeko -# define ftello64 ftello -# define off64_t off_t +# define fopen64 fopen +# define fseeko64 fseeko +# define ftello64 ftello +# define off64_t off_t #elif defined(_MSC_VER) //# define fopen64 fopen -# define fseeko64 _fseeki64 -# define ftello64 _ftelli64 -# define off64_t off_t +# define fseeko64 _fseeki64 +# define ftello64 _ftelli64 +# define off64_t off_t #endif - #ifdef _MSC_VER -# define UNUSED(arg) arg +# define UNUSED(arg) arg #else - /* A hack (GCC-specific?) to allow us to ignore unused parameters. */ -# define UNUSED(arg) __attribute__((unused))arg +/* A hack (GCC-specific?) to allow us to ignore unused parameters. */ +# define UNUSED(arg) __attribute__((unused)) arg #endif /* Return the size (in wchar's) of a wchar_t array. */ -#define sizeof_w(x) (sizeof((x)) / sizeof(wchar_t)) - +#define sizeof_w(x) (sizeof((x)) / sizeof(wchar_t)) #ifdef __cplusplus -#include -#define atomic_flag_t std::atomic_flag -#define atomic_bool_t std::atomic_bool +# include +# define atomic_flag_t std::atomic_flag +# define atomic_bool_t std::atomic_bool extern "C" { #else -#include -#define atomic_flag_t atomic_flag -#define atomic_bool_t atomic_bool +# include +# define atomic_flag_t atomic_flag +# define atomic_bool_t atomic_bool #endif /* Global variables residing in the platform module. */ -extern int dopause, /* system is paused */ - mouse_capture; /* mouse is captured in app */ -extern volatile int is_quit; /* system exit requested */ +extern int dopause, /* system is paused */ + mouse_capture; /* mouse is captured in app */ +extern volatile int is_quit; /* system exit requested */ #ifdef MTR_ENABLED extern int tracing_on; #endif -extern uint64_t timer_freq; -extern int infocus; -extern char emu_version[200]; /* version ID string */ -extern int rctrl_is_lalt; -extern int update_icons; +extern uint64_t timer_freq; +extern int infocus; +extern char emu_version[200]; /* version ID string */ +extern int rctrl_is_lalt; +extern int update_icons; -extern int kbd_req_capture, hide_status_bar, hide_tool_bar; +extern int kbd_req_capture, hide_status_bar, hide_tool_bar; /* System-related functions. */ -extern char *fix_exe_path(char *str); -extern FILE *plat_fopen(const char *path, const char *mode); -extern FILE *plat_fopen64(const char *path, const char *mode); -extern void plat_remove(char *path); -extern int plat_getcwd(char *bufp, int max); -extern int plat_chdir(char *path); -extern void plat_tempfile(char *bufp, char *prefix, char *suffix); -extern void plat_get_exe_name(char *s, int size); -extern void plat_init_rom_paths(); -extern int plat_dir_check(char *path); -extern int plat_dir_create(char *path); -extern void *plat_mmap(size_t size, uint8_t executable); -extern void plat_munmap(void *ptr, size_t size); -extern uint64_t plat_timer_read(void); -extern uint32_t plat_get_ticks(void); -extern uint32_t plat_get_micro_ticks(void); -extern void plat_delay_ms(uint32_t count); -extern void plat_pause(int p); -extern void plat_mouse_capture(int on); -extern int plat_vidapi(char *name); -extern char *plat_vidapi_name(int api); -extern int plat_setvid(int api); -extern void plat_vidsize(int x, int y); -extern void plat_setfullscreen(int on); -extern void plat_resize_monitor(int x, int y, int monitor_index); -extern void plat_resize_request(int x, int y, int monitor_index); +extern char *fix_exe_path(char *str); +extern FILE *plat_fopen(const char *path, const char *mode); +extern FILE *plat_fopen64(const char *path, const char *mode); +extern void plat_remove(char *path); +extern int plat_getcwd(char *bufp, int max); +extern int plat_chdir(char *path); +extern void plat_tempfile(char *bufp, char *prefix, char *suffix); +extern void plat_get_exe_name(char *s, int size); +extern void plat_init_rom_paths(); +extern int plat_dir_check(char *path); +extern int plat_dir_create(char *path); +extern void *plat_mmap(size_t size, uint8_t executable); +extern void plat_munmap(void *ptr, size_t size); +extern uint64_t plat_timer_read(void); +extern uint32_t plat_get_ticks(void); +extern uint32_t plat_get_micro_ticks(void); +extern void plat_delay_ms(uint32_t count); +extern void plat_pause(int p); +extern void plat_mouse_capture(int on); +extern int plat_vidapi(char *name); +extern char *plat_vidapi_name(int api); +extern int plat_setvid(int api); +extern void plat_vidsize(int x, int y); +extern void plat_setfullscreen(int on); +extern void plat_resize_monitor(int x, int y, int monitor_index); +extern void plat_resize_request(int x, int y, int monitor_index); extern void plat_resize(int x, int y); -extern void plat_vidapi_enable(int enabled); -extern void plat_vidapi_reload(void); -extern void plat_vid_reload_options(void); -extern uint32_t plat_language_code(char* langcode); -extern void plat_language_code_r(uint32_t lcid, char* outbuf, int len); +extern void plat_vidapi_enable(int enabled); +extern void plat_vidapi_reload(void); +extern void plat_vid_reload_options(void); +extern uint32_t plat_language_code(char *langcode); +extern void plat_language_code_r(uint32_t lcid, char *outbuf, int len); /* Resource management. */ -extern void set_language(uint32_t id); -extern wchar_t *plat_get_string(int id); - +extern void set_language(uint32_t id); +extern wchar_t *plat_get_string(int id); /* Emulator start/stop support functions. */ -extern void do_start(void); -extern void do_stop(void); - +extern void do_start(void); +extern void do_stop(void); /* Power off. */ -extern void plat_power_off(void); - +extern void plat_power_off(void); /* Platform-specific device support. */ -extern void cassette_mount(char *fn, uint8_t wp); -extern void cassette_eject(void); -extern void cartridge_mount(uint8_t id, char *fn, uint8_t wp); -extern void cartridge_eject(uint8_t id); -extern void floppy_mount(uint8_t id, char *fn, uint8_t wp); -extern void floppy_eject(uint8_t id); -extern void cdrom_mount(uint8_t id, char *fn); -extern void plat_cdrom_ui_update(uint8_t id, uint8_t reload); -extern void zip_eject(uint8_t id); -extern void zip_mount(uint8_t id, char *fn, uint8_t wp); -extern void zip_reload(uint8_t id); -extern void mo_eject(uint8_t id); -extern void mo_mount(uint8_t id, char *fn, uint8_t wp); -extern void mo_reload(uint8_t id); -extern int ioctl_open(uint8_t id, char d); -extern void ioctl_reset(uint8_t id); -extern void ioctl_close(uint8_t id); +extern void cassette_mount(char *fn, uint8_t wp); +extern void cassette_eject(void); +extern void cartridge_mount(uint8_t id, char *fn, uint8_t wp); +extern void cartridge_eject(uint8_t id); +extern void floppy_mount(uint8_t id, char *fn, uint8_t wp); +extern void floppy_eject(uint8_t id); +extern void cdrom_mount(uint8_t id, char *fn); +extern void plat_cdrom_ui_update(uint8_t id, uint8_t reload); +extern void zip_eject(uint8_t id); +extern void zip_mount(uint8_t id, char *fn, uint8_t wp); +extern void zip_reload(uint8_t id); +extern void mo_eject(uint8_t id); +extern void mo_mount(uint8_t id, char *fn, uint8_t wp); +extern void mo_reload(uint8_t id); +extern int ioctl_open(uint8_t id, char d); +extern void ioctl_reset(uint8_t id); +extern void ioctl_close(uint8_t id); /* Other stuff. */ -extern void startblit(void); -extern void endblit(void); -extern void take_screenshot(void); +extern void startblit(void); +extern void endblit(void); +extern void take_screenshot(void); /* Conversion between UTF-8 and UTF-16. */ -extern size_t mbstoc16s(uint16_t dst[], const char src[], int len); -extern size_t c16stombs(char dst[], const uint16_t src[], int len); +extern size_t mbstoc16s(uint16_t dst[], const char src[], int len); +extern size_t c16stombs(char dst[], const uint16_t src[], int len); #ifdef MTR_ENABLED extern void init_trace(void); @@ -180,5 +175,4 @@ extern void shutdown_trace(void); } #endif - -#endif /*EMU_PLAT_H*/ +#endif /*EMU_PLAT_H*/ diff --git a/src/include/86box/plat_dir.h b/src/include/86box/plat_dir.h index 46b57ee34..73c33eebf 100644 --- a/src/include/86box/plat_dir.h +++ b/src/include/86box/plat_dir.h @@ -15,58 +15,53 @@ */ #ifndef PLAT_DIR_H -# define PLAT_DIR_H +#define PLAT_DIR_H #ifdef _MAX_FNAME -# define MAXNAMLEN _MAX_FNAME +# define MAXNAMLEN _MAX_FNAME #else -# define MAXNAMLEN 15 +# define MAXNAMLEN 15 #endif -# define MAXDIRLEN 127 - +#define MAXDIRLEN 127 struct dirent { - long d_ino; - unsigned short d_reclen; - unsigned short d_off; + long d_ino; + unsigned short d_reclen; + unsigned short d_off; #ifdef UNICODE - wchar_t d_name[MAXNAMLEN + 1]; + wchar_t d_name[MAXNAMLEN + 1]; #else - char d_name[MAXNAMLEN + 1]; + char d_name[MAXNAMLEN + 1]; #endif }; -#define d_namlen d_reclen - +#define d_namlen d_reclen typedef struct { - short flags; /* internal flags */ - short offset; /* offset of entry into dir */ - long handle; /* open handle to Win32 system */ - short sts; /* last known status code */ - char *dta; /* internal work data */ + short flags; /* internal flags */ + short offset; /* offset of entry into dir */ + long handle; /* open handle to Win32 system */ + short sts; /* last known status code */ + char *dta; /* internal work data */ #ifdef UNICODE - wchar_t dir[MAXDIRLEN+1]; /* open dir */ + wchar_t dir[MAXDIRLEN + 1]; /* open dir */ #else - char dir[MAXDIRLEN+1]; /* open dir */ + char dir[MAXDIRLEN + 1]; /* open dir */ #endif - struct dirent dent; /* actual directory entry */ + struct dirent dent; /* actual directory entry */ } DIR; - /* Directory routine flags. */ -#define DIR_F_LOWER 0x0001 /* force to lowercase */ -#define DIR_F_SANE 0x0002 /* force this to sane path */ -#define DIR_F_ISROOT 0x0010 /* this is the root directory */ - +#define DIR_F_LOWER 0x0001 /* force to lowercase */ +#define DIR_F_SANE 0x0002 /* force this to sane path */ +#define DIR_F_ISROOT 0x0010 /* this is the root directory */ /* Function prototypes. */ -extern DIR *opendir(const char *); -extern struct dirent *readdir(DIR *); -extern long telldir(DIR *); -extern void seekdir(DIR *, long); -extern int closedir(DIR *); +extern DIR *opendir(const char *); +extern struct dirent *readdir(DIR *); +extern long telldir(DIR *); +extern void seekdir(DIR *, long); +extern int closedir(DIR *); -#define rewinddir(dirp) seekdir(dirp, 0L) +#define rewinddir(dirp) seekdir(dirp, 0L) - -#endif /*PLAT_DIR_H*/ +#endif /*PLAT_DIR_H*/ diff --git a/src/include/86box/plat_dynld.h b/src/include/86box/plat_dynld.h index b4be8d09e..6e20f6e27 100644 --- a/src/include/86box/plat_dynld.h +++ b/src/include/86box/plat_dynld.h @@ -15,24 +15,22 @@ */ #ifndef PLAT_DYNLD_H -# define PLAT_DYNLD_H +#define PLAT_DYNLD_H typedef struct { - const char *name; - void *func; + const char *name; + void *func; } dllimp_t; - #ifdef __cplusplus extern "C" { #endif -extern void *dynld_module(const char *, dllimp_t *); -extern void dynld_close(void *); +extern void *dynld_module(const char *, dllimp_t *); +extern void dynld_close(void *); #ifdef __cplusplus } #endif - -#endif /*PLAT_DYNLD_H*/ +#endif /*PLAT_DYNLD_H*/ diff --git a/src/include/86box/png_struct.h b/src/include/86box/png_struct.h index 0bb0e5e1b..1b5d9e851 100644 --- a/src/include/86box/png_struct.h +++ b/src/include/86box/png_struct.h @@ -46,22 +46,20 @@ */ #ifndef EMU_PNG_STRUCT_H -# define EMU_PNG_STRUCT_H - +#define EMU_PNG_STRUCT_H #ifdef __cplusplus extern "C" { #endif -extern int png_write_gray(char *path, int invert, - uint8_t *pix, int16_t w, int16_t h); +extern int png_write_gray(char *path, int invert, + uint8_t *pix, int16_t w, int16_t h); -extern void png_write_rgb(char *fn, - uint8_t *pix, int16_t w, int16_t h, uint16_t pitch, PALETTE palcol); +extern void png_write_rgb(char *fn, + uint8_t *pix, int16_t w, int16_t h, uint16_t pitch, PALETTE palcol); #ifdef __cplusplus } #endif - -#endif /*EMU_PNG_STRUCT_H*/ +#endif /*EMU_PNG_STRUCT_H*/ diff --git a/src/include/86box/port_6x.h b/src/include/86box/port_6x.h index a478e8390..927a15efa 100644 --- a/src/include/86box/port_6x.h +++ b/src/include/86box/port_6x.h @@ -17,22 +17,20 @@ */ #ifndef EMU_PORT_6X_H -# define EMU_PORT_6X_H +#define EMU_PORT_6X_H #ifdef _TIMER_H_ typedef struct { - uint8_t refresh, flags; + uint8_t refresh, flags; - pc_timer_t refresh_timer; + pc_timer_t refresh_timer; } port_6x_t; #endif +extern const device_t port_6x_device; +extern const device_t port_6x_xi8088_device; +extern const device_t port_6x_ps2_device; +extern const device_t port_6x_olivetti_device; -extern const device_t port_6x_device; -extern const device_t port_6x_xi8088_device; -extern const device_t port_6x_ps2_device; -extern const device_t port_6x_olivetti_device; - - -#endif /*EMU_PORT_6X_H*/ +#endif /*EMU_PORT_6X_H*/ diff --git a/src/include/86box/port_92.h b/src/include/86box/port_92.h index 78e0a0002..4d5aa031c 100644 --- a/src/include/86box/port_92.h +++ b/src/include/86box/port_92.h @@ -17,32 +17,28 @@ */ #ifndef EMU_PORT_92_H -# define EMU_PORT_92_H - +#define EMU_PORT_92_H #ifdef _TIMER_H_ typedef struct { - uint8_t reg, flags; + uint8_t reg, flags; - pc_timer_t pulse_timer; + pc_timer_t pulse_timer; - uint64_t pulse_period; + uint64_t pulse_period; } port_92_t; #endif +extern void port_92_set_period(void *priv, uint64_t pulse_period); +extern void port_92_set_features(void *priv, int reset, int a20); -extern void port_92_set_period(void *priv, uint64_t pulse_period); -extern void port_92_set_features(void *priv, int reset, int a20); +extern void port_92_add(void *priv); +extern void port_92_remove(void *priv); -extern void port_92_add(void *priv); -extern void port_92_remove(void *priv); +extern const device_t port_92_device; +extern const device_t port_92_inv_device; +extern const device_t port_92_word_device; +extern const device_t port_92_pci_device; - -extern const device_t port_92_device; -extern const device_t port_92_inv_device; -extern const device_t port_92_word_device; -extern const device_t port_92_pci_device; - - -#endif /*EMU_PORT_92_H*/ +#endif /*EMU_PORT_92_H*/ diff --git a/src/include/86box/postcard.h b/src/include/86box/postcard.h index ee179eb3d..0db2d6187 100644 --- a/src/include/86box/postcard.h +++ b/src/include/86box/postcard.h @@ -16,7 +16,7 @@ */ #ifndef POSTCARD_H -# define POSTCARD_H +#define POSTCARD_H #ifdef __cplusplus extern "C" { @@ -25,12 +25,10 @@ extern "C" { /* Global variables. */ extern const device_t postcard_device; - /* Functions. */ #ifdef __cplusplus } #endif - -#endif /*POSTCARD_H*/ +#endif /*POSTCARD_H*/ diff --git a/src/include/86box/ppi.h b/src/include/86box/ppi.h index a46a407f5..0e12c98f8 100644 --- a/src/include/86box/ppi.h +++ b/src/include/86box/ppi.h @@ -1,18 +1,14 @@ #ifndef EMU_PPI_H -# define EMU_PPI_H - +#define EMU_PPI_H typedef struct PPI { - int s2; - uint8_t pa,pb; + int s2; + uint8_t pa, pb; } PPI; +extern int ppispeakon; +extern PPI ppi; -extern int ppispeakon; -extern PPI ppi; +extern void ppi_reset(void); - -extern void ppi_reset(void); - - -#endif /*EMU_PPI_H*/ +#endif /*EMU_PPI_H*/ diff --git a/src/include/86box/printer.h b/src/include/86box/printer.h index 4cd5e898d..37308e908 100644 --- a/src/include/86box/printer.h +++ b/src/include/86box/printer.h @@ -46,20 +46,18 @@ */ #ifndef PRINTER_H -# define PRINTER_H +#define PRINTER_H -#define FONT_FILE_DOTMATRIX "dotmatrix.ttf" - -#define FONT_FILE_ROMAN "roman.ttf" -#define FONT_FILE_SANSSERIF "sansserif.ttf" -#define FONT_FILE_COURIER "courier.ttf" -#define FONT_FILE_SCRIPT "script.ttf" -#define FONT_FILE_OCRA "ocra.ttf" -#define FONT_FILE_OCRB "ocra.ttf" +#define FONT_FILE_DOTMATRIX "dotmatrix.ttf" +#define FONT_FILE_ROMAN "roman.ttf" +#define FONT_FILE_SANSSERIF "sansserif.ttf" +#define FONT_FILE_COURIER "courier.ttf" +#define FONT_FILE_SCRIPT "script.ttf" +#define FONT_FILE_OCRA "ocra.ttf" +#define FONT_FILE_OCRB "ocra.ttf" extern void select_codepage(uint16_t code, uint16_t *curmap); - -#endif /*PRINTER_H*/ +#endif /*PRINTER_H*/ diff --git a/src/include/86box/prt_devs.h b/src/include/86box/prt_devs.h index e8d56fe24..3d9d6673a 100644 --- a/src/include/86box/prt_devs.h +++ b/src/include/86box/prt_devs.h @@ -1,8 +1,8 @@ #ifndef EMU_PRT_DEVS_H -# define EMU_PRT_DEVS_H +#define EMU_PRT_DEVS_H -extern const lpt_device_t lpt_prt_text_device; -extern const lpt_device_t lpt_prt_escp_device; -extern const lpt_device_t lpt_prt_ps_device; +extern const lpt_device_t lpt_prt_text_device; +extern const lpt_device_t lpt_prt_escp_device; +extern const lpt_device_t lpt_prt_ps_device; #endif /*EMU_PRT_DEVS_H*/ diff --git a/src/include/86box/random.h b/src/include/86box/random.h index bf123375f..089a49c4a 100644 --- a/src/include/86box/random.h +++ b/src/include/86box/random.h @@ -16,9 +16,9 @@ */ #ifndef EMU_RANDOM_H -# define EMU_RANDOM_H +#define EMU_RANDOM_H -extern uint8_t random_generate(void); -extern void random_init(void); +extern uint8_t random_generate(void); +extern void random_init(void); -#endif /*EMU_RANDOM_H*/ +#endif /*EMU_RANDOM_H*/ diff --git a/src/include/86box/resource.h b/src/include/86box/resource.h index a3708eb42..af7fc1c46 100644 --- a/src/include/86box/resource.h +++ b/src/include/86box/resource.h @@ -22,454 +22,452 @@ */ #ifndef WIN_RESOURCE_H -# define WIN_RESOURCE_H +#define WIN_RESOURCE_H /* Dialog IDs. */ -#define DLG_ABOUT 101 /* top-level dialog */ -#define DLG_STATUS 102 /* top-level dialog */ -#define DLG_SND_GAIN 103 /* top-level dialog */ -#define DLG_NEW_FLOPPY 104 /* top-level dialog */ -#define DLG_SPECIFY_DIM 105 /* top-level dialog */ -#define DLG_PREFERENCES 106 /* top-level dialog */ -#define DLG_CONFIG 110 /* top-level dialog */ -#define DLG_CFG_MACHINE 111 /* sub-dialog of config */ -#define DLG_CFG_VIDEO 112 /* sub-dialog of config */ -#define DLG_CFG_INPUT 113 /* sub-dialog of config */ -#define DLG_CFG_SOUND 114 /* sub-dialog of config */ -#define DLG_CFG_NETWORK 115 /* sub-dialog of config */ -#define DLG_CFG_PORTS 116 /* sub-dialog of config */ -#define DLG_CFG_STORAGE 117 /* sub-dialog of config */ -#define DLG_CFG_HARD_DISKS 118 /* sub-dialog of config */ -#define DLG_CFG_HARD_DISKS_ADD 119 /* sub-dialog of config */ -#define DLG_CFG_FLOPPY_AND_CDROM_DRIVES 120 /* sub-dialog of config */ -#define DLG_CFG_OTHER_REMOVABLE_DEVICES 121 /* sub-dialog of config */ -#define DLG_CFG_PERIPHERALS 122 /* sub-dialog of config */ +#define DLG_ABOUT 101 /* top-level dialog */ +#define DLG_STATUS 102 /* top-level dialog */ +#define DLG_SND_GAIN 103 /* top-level dialog */ +#define DLG_NEW_FLOPPY 104 /* top-level dialog */ +#define DLG_SPECIFY_DIM 105 /* top-level dialog */ +#define DLG_PREFERENCES 106 /* top-level dialog */ +#define DLG_CONFIG 110 /* top-level dialog */ +#define DLG_CFG_MACHINE 111 /* sub-dialog of config */ +#define DLG_CFG_VIDEO 112 /* sub-dialog of config */ +#define DLG_CFG_INPUT 113 /* sub-dialog of config */ +#define DLG_CFG_SOUND 114 /* sub-dialog of config */ +#define DLG_CFG_NETWORK 115 /* sub-dialog of config */ +#define DLG_CFG_PORTS 116 /* sub-dialog of config */ +#define DLG_CFG_STORAGE 117 /* sub-dialog of config */ +#define DLG_CFG_HARD_DISKS 118 /* sub-dialog of config */ +#define DLG_CFG_HARD_DISKS_ADD 119 /* sub-dialog of config */ +#define DLG_CFG_FLOPPY_AND_CDROM_DRIVES 120 /* sub-dialog of config */ +#define DLG_CFG_OTHER_REMOVABLE_DEVICES 121 /* sub-dialog of config */ +#define DLG_CFG_PERIPHERALS 122 /* sub-dialog of config */ /* Static text label IDs. */ /* DLG_SND_GAIN */ -#define IDT_GAIN 1700 /* Gain */ +#define IDT_GAIN 1700 /* Gain */ /* DLG_NEW_FLOPPY */ -#define IDT_FLP_FILE_NAME 1701 /* File name: */ -#define IDT_FLP_DISK_SIZE 1702 /* Disk size: */ -#define IDT_FLP_RPM_MODE 1703 /* RPM mode: */ -#define IDT_FLP_PROGRESS 1704 /* Progress: */ +#define IDT_FLP_FILE_NAME 1701 /* File name: */ +#define IDT_FLP_DISK_SIZE 1702 /* Disk size: */ +#define IDT_FLP_RPM_MODE 1703 /* RPM mode: */ +#define IDT_FLP_PROGRESS 1704 /* Progress: */ /* DLG_SPECIFY_DIM */ -#define IDT_WIDTH 1705 /* ??? */ -#define IDT_HEIGHT 1706 /* ??? */ +#define IDT_WIDTH 1705 /* ??? */ +#define IDT_HEIGHT 1706 /* ??? */ /* DLG_CFG_MACHINE */ -#define IDT_MACHINE_TYPE 1707 /* Machine type: */ -#define IDT_MACHINE 1708 /* Machine: */ -#define IDT_CPU_TYPE 1709 /* CPU type: */ -#define IDT_CPU_SPEED 1710 /* CPU speed: */ -#define IDT_FPU 1711 /* FPU: */ -#define IDT_WAIT_STATES 1712 /* Wait states: */ -#define IDT_MB 1713 /* MB == IDC_TEXT_MB */ -#define IDT_MEMORY 1714 /* Memory: */ +#define IDT_MACHINE_TYPE 1707 /* Machine type: */ +#define IDT_MACHINE 1708 /* Machine: */ +#define IDT_CPU_TYPE 1709 /* CPU type: */ +#define IDT_CPU_SPEED 1710 /* CPU speed: */ +#define IDT_FPU 1711 /* FPU: */ +#define IDT_WAIT_STATES 1712 /* Wait states: */ +#define IDT_MB 1713 /* MB == IDC_TEXT_MB */ +#define IDT_MEMORY 1714 /* Memory: */ /* DLG_CFG_VIDEO */ -#define IDT_VIDEO 1715 /* Video: */ +#define IDT_VIDEO 1715 /* Video: */ /* DLG_CFG_INPUT */ -#define IDT_MOUSE 1716 /* Mouse: */ -#define IDT_JOYSTICK 1717 /* Joystick: */ +#define IDT_MOUSE 1716 /* Mouse: */ +#define IDT_JOYSTICK 1717 /* Joystick: */ /* DLG_CFG_SOUND */ -#define IDT_SOUND 1718 /* Sound card: */ -#define IDT_MIDI_OUT 1719 /* MIDI Out Device: */ -#define IDT_MIDI_IN 1720 /* MIDI In Device: */ +#define IDT_SOUND 1718 /* Sound card: */ +#define IDT_MIDI_OUT 1719 /* MIDI Out Device: */ +#define IDT_MIDI_IN 1720 /* MIDI In Device: */ /* DLG_CFG_NETWORK */ -#define IDT_NET_TYPE 1721 /* Network type: */ -#define IDT_PCAP 1722 /* PCap device: */ -#define IDT_NET 1723 /* Network adapter: */ +#define IDT_NET_TYPE 1721 /* Network type: */ +#define IDT_PCAP 1722 /* PCap device: */ +#define IDT_NET 1723 /* Network adapter: */ /* DLG_CFG_PORTS */ -#define IDT_COM1 1724 /* COM1 Device: */ -#define IDT_COM2 1725 /* COM1 Device: */ -#define IDT_COM3 1726 /* COM1 Device: */ -#define IDT_COM4 1727 /* COM1 Device: */ +#define IDT_COM1 1724 /* COM1 Device: */ +#define IDT_COM2 1725 /* COM1 Device: */ +#define IDT_COM3 1726 /* COM1 Device: */ +#define IDT_COM4 1727 /* COM1 Device: */ -#define IDT_LPT1 1728 /* LPT1 Device: */ -#define IDT_LPT2 1729 /* LPT2 Device: */ -#define IDT_LPT3 1730 /* LPT3 Device: */ -#define IDT_LPT4 1731 /* LPT4 Device: */ +#define IDT_LPT1 1728 /* LPT1 Device: */ +#define IDT_LPT2 1729 /* LPT2 Device: */ +#define IDT_LPT3 1730 /* LPT3 Device: */ +#define IDT_LPT4 1731 /* LPT4 Device: */ /* DLG_CFG_STORAGE */ -#define IDT_HDC 1732 /* HD Controller: */ -#define IDT_FDC 1733 /* Ext FD Controller: */ -#define IDT_SCSI_1 1734 /* SCSI Board #1: */ -#define IDT_SCSI_2 1735 /* SCSI Board #2: */ -#define IDT_SCSI_3 1736 /* SCSI Board #3: */ -#define IDT_SCSI_4 1737 /* SCSI Board #4: */ +#define IDT_HDC 1732 /* HD Controller: */ +#define IDT_FDC 1733 /* Ext FD Controller: */ +#define IDT_SCSI_1 1734 /* SCSI Board #1: */ +#define IDT_SCSI_2 1735 /* SCSI Board #2: */ +#define IDT_SCSI_3 1736 /* SCSI Board #3: */ +#define IDT_SCSI_4 1737 /* SCSI Board #4: */ /* DLG_CFG_HARD_DISKS */ -#define IDT_HDD 1738 /* Hard disks: */ -#define IDT_BUS 1739 /* Bus: */ -#define IDT_CHANNEL 1740 /* Channel: */ -#define IDT_ID 1741 /* ID: */ -#define IDT_LUN 1742 /* LUN: */ +#define IDT_HDD 1738 /* Hard disks: */ +#define IDT_BUS 1739 /* Bus: */ +#define IDT_CHANNEL 1740 /* Channel: */ +#define IDT_ID 1741 /* ID: */ +#define IDT_LUN 1742 /* LUN: */ /* DLG_CFG_HARD_DISKS_ADD */ -#define IDT_SECTORS 1743 /* Sectors: */ -#define IDT_HEADS 1744 /* Heads: */ -#define IDT_CYLS 1745 /* Cylinders: */ -#define IDT_SIZE_MB 1746 /* Size (MB): */ -#define IDT_TYPE 1747 /* Type: */ -#define IDT_FILE_NAME 1748 /* File name: */ -#define IDT_IMG_FORMAT 1749 /* Image Format: */ -#define IDT_BLOCK_SIZE 1750 /* Block Size: */ -#define IDT_PROGRESS 1751 /* Progress: */ +#define IDT_SECTORS 1743 /* Sectors: */ +#define IDT_HEADS 1744 /* Heads: */ +#define IDT_CYLS 1745 /* Cylinders: */ +#define IDT_SIZE_MB 1746 /* Size (MB): */ +#define IDT_TYPE 1747 /* Type: */ +#define IDT_FILE_NAME 1748 /* File name: */ +#define IDT_IMG_FORMAT 1749 /* Image Format: */ +#define IDT_BLOCK_SIZE 1750 /* Block Size: */ +#define IDT_PROGRESS 1751 /* Progress: */ /* DLG_CFG_FLOPPY_AND_CDROM_DRIVES */ -#define IDT_FLOPPY_DRIVES 1752 /* Floppy drives: */ -#define IDT_FDD_TYPE 1753 /* Type: */ -#define IDT_CD_DRIVES 1754 /* CD-ROM drives: */ -#define IDT_CD_BUS 1755 /* Bus: */ -#define IDT_CD_ID 1756 /* ID: */ -#define IDT_CD_LUN 1757 /* LUN: */ -#define IDT_CD_CHANNEL 1758 /* Channel: */ -#define IDT_CD_SPEED 1759 /* Speed: */ +#define IDT_FLOPPY_DRIVES 1752 /* Floppy drives: */ +#define IDT_FDD_TYPE 1753 /* Type: */ +#define IDT_CD_DRIVES 1754 /* CD-ROM drives: */ +#define IDT_CD_BUS 1755 /* Bus: */ +#define IDT_CD_ID 1756 /* ID: */ +#define IDT_CD_LUN 1757 /* LUN: */ +#define IDT_CD_CHANNEL 1758 /* Channel: */ +#define IDT_CD_SPEED 1759 /* Speed: */ /* DLG_CFG_OTHER_REMOVABLE_DEVICES */ -#define IDT_MO_DRIVES 1760 /* MO drives: */ -#define IDT_MO_BUS 1761 /* Bus: */ -#define IDT_MO_ID 1762 /* ID: */ -#define IDT_MO_CHANNEL 1763 /* Channel */ -#define IDT_MO_TYPE 1764 /* Type: */ +#define IDT_MO_DRIVES 1760 /* MO drives: */ +#define IDT_MO_BUS 1761 /* Bus: */ +#define IDT_MO_ID 1762 /* ID: */ +#define IDT_MO_CHANNEL 1763 /* Channel */ +#define IDT_MO_TYPE 1764 /* Type: */ -#define IDT_ZIP_DRIVES 1765 /* ZIP drives: */ -#define IDT_ZIP_BUS 1766 /* Bus: */ -#define IDT_ZIP_ID 1767 /* ID: */ -#define IDT_ZIP_LUN 1768 /* LUN: */ -#define IDT_ZIP_CHANNEL 1769 /* Channel: */ +#define IDT_ZIP_DRIVES 1765 /* ZIP drives: */ +#define IDT_ZIP_BUS 1766 /* Bus: */ +#define IDT_ZIP_ID 1767 /* ID: */ +#define IDT_ZIP_LUN 1768 /* LUN: */ +#define IDT_ZIP_CHANNEL 1769 /* Channel: */ /* DLG_CFG_PERIPHERALS */ -#define IDT_ISARTC 1770 /* ISA RTC: */ -#define IDT_ISAMEM_1 1771 /* ISAMEM Board #1: */ -#define IDT_ISAMEM_2 1772 /* ISAMEM Board #2: */ -#define IDT_ISAMEM_3 1773 /* ISAMEM Board #3: */ -#define IDT_ISAMEM_4 1774 /* ISAMEM Board #4: */ +#define IDT_ISARTC 1770 /* ISA RTC: */ +#define IDT_ISAMEM_1 1771 /* ISAMEM Board #1: */ +#define IDT_ISAMEM_2 1772 /* ISAMEM Board #2: */ +#define IDT_ISAMEM_3 1773 /* ISAMEM Board #3: */ +#define IDT_ISAMEM_4 1774 /* ISAMEM Board #4: */ /* * To try to keep these organized, we now group the * constants per dialog, as this allows easy adding * and deleting items. */ -#define IDC_SETTINGSCATLIST 1001 /* generic config */ -#define IDC_CFILE 1002 /* Select File dialog */ -#define IDC_TIME_SYNC 1005 -#define IDC_RADIO_TS_DISABLED 1006 -#define IDC_RADIO_TS_LOCAL 1007 -#define IDC_RADIO_TS_UTC 1008 +#define IDC_SETTINGSCATLIST 1001 /* generic config */ +#define IDC_CFILE 1002 /* Select File dialog */ +#define IDC_TIME_SYNC 1005 +#define IDC_RADIO_TS_DISABLED 1006 +#define IDC_RADIO_TS_LOCAL 1007 +#define IDC_RADIO_TS_UTC 1008 -#define IDC_COMBO_MACHINE_TYPE 1010 -#define IDC_COMBO_MACHINE 1011 /* machine/cpu config */ -#define IDC_CONFIGURE_MACHINE 1012 -#define IDC_COMBO_CPU_TYPE 1013 -#define IDC_COMBO_CPU_SPEED 1014 -#define IDC_COMBO_FPU 1015 -#define IDC_COMBO_WS 1016 +#define IDC_COMBO_MACHINE_TYPE 1010 +#define IDC_COMBO_MACHINE 1011 /* machine/cpu config */ +#define IDC_CONFIGURE_MACHINE 1012 +#define IDC_COMBO_CPU_TYPE 1013 +#define IDC_COMBO_CPU_SPEED 1014 +#define IDC_COMBO_FPU 1015 +#define IDC_COMBO_WS 1016 #ifdef USE_DYNAREC -#define IDC_CHECK_DYNAREC 1017 +# define IDC_CHECK_DYNAREC 1017 #endif -#define IDC_MEMTEXT 1018 -#define IDC_MEMSPIN 1019 -#define IDC_TEXT_MB IDT_MB +#define IDC_MEMTEXT 1018 +#define IDC_MEMSPIN 1019 +#define IDC_TEXT_MB IDT_MB -#define IDC_VIDEO 1020 /* video config */ -#define IDC_COMBO_VIDEO 1021 -#define IDC_CHECK_VOODOO 1022 -#define IDC_BUTTON_VOODOO 1023 -#define IDC_CHECK_IBM8514 1024 -#define IDC_CHECK_XGA 1025 -#define IDC_BUTTON_XGA 1026 +#define IDC_VIDEO 1020 /* video config */ +#define IDC_COMBO_VIDEO 1021 +#define IDC_CHECK_VOODOO 1022 +#define IDC_BUTTON_VOODOO 1023 +#define IDC_CHECK_IBM8514 1024 +#define IDC_CHECK_XGA 1025 +#define IDC_BUTTON_XGA 1026 -#define IDC_INPUT 1030 /* input config */ -#define IDC_COMBO_MOUSE 1031 -#define IDC_COMBO_JOYSTICK 1032 -#define IDC_COMBO_JOY 1033 -#define IDC_CONFIGURE_MOUSE 1034 +#define IDC_INPUT 1030 /* input config */ +#define IDC_COMBO_MOUSE 1031 +#define IDC_COMBO_JOYSTICK 1032 +#define IDC_COMBO_JOY 1033 +#define IDC_CONFIGURE_MOUSE 1034 -#define IDC_SOUND 1040 /* sound config */ -#define IDC_COMBO_SOUND 1041 -#define IDC_CHECK_SSI 1042 -#define IDC_CHECK_CMS 1043 -#define IDC_CHECK_GUS 1044 -#define IDC_COMBO_MIDI_OUT 1045 -#define IDC_CHECK_MPU401 1046 -#define IDC_CONFIGURE_MPU401 1047 -#define IDC_CHECK_FLOAT 1048 -#define IDC_CONFIGURE_GUS 1049 -#define IDC_COMBO_MIDI_IN 1050 -#define IDC_CONFIGURE_CMS 1051 -#define IDC_CONFIGURE_SSI 1052 -#define IDC_FM_DRIVER 1053 -#define IDC_RADIO_FM_DRV_NUKED 1054 -#define IDC_RADIO_FM_DRV_YMFM 1055 +#define IDC_SOUND 1040 /* sound config */ +#define IDC_COMBO_SOUND 1041 +#define IDC_CHECK_SSI 1042 +#define IDC_CHECK_CMS 1043 +#define IDC_CHECK_GUS 1044 +#define IDC_COMBO_MIDI_OUT 1045 +#define IDC_CHECK_MPU401 1046 +#define IDC_CONFIGURE_MPU401 1047 +#define IDC_CHECK_FLOAT 1048 +#define IDC_CONFIGURE_GUS 1049 +#define IDC_COMBO_MIDI_IN 1050 +#define IDC_CONFIGURE_CMS 1051 +#define IDC_CONFIGURE_SSI 1052 +#define IDC_FM_DRIVER 1053 +#define IDC_RADIO_FM_DRV_NUKED 1054 +#define IDC_RADIO_FM_DRV_YMFM 1055 -#define IDC_COMBO_NET_TYPE 1060 /* network config */ -#define IDC_COMBO_PCAP 1061 -#define IDC_COMBO_NET 1062 +#define IDC_COMBO_NET_TYPE 1060 /* network config */ +#define IDC_COMBO_PCAP 1061 +#define IDC_COMBO_NET 1062 -#define IDC_COMBO_LPT1 1070 /* ports config */ -#define IDC_COMBO_LPT2 1071 -#define IDC_COMBO_LPT3 1072 -#define IDC_COMBO_LPT4 1073 -#define IDC_CHECK_SERIAL1 1074 -#define IDC_CHECK_SERIAL2 1075 -#define IDC_CHECK_SERIAL3 1076 -#define IDC_CHECK_SERIAL4 1077 -#define IDC_CHECK_PARALLEL1 1078 -#define IDC_CHECK_PARALLEL2 1079 -#define IDC_CHECK_PARALLEL3 1080 -#define IDC_CHECK_PARALLEL4 1081 +#define IDC_COMBO_LPT1 1070 /* ports config */ +#define IDC_COMBO_LPT2 1071 +#define IDC_COMBO_LPT3 1072 +#define IDC_COMBO_LPT4 1073 +#define IDC_CHECK_SERIAL1 1074 +#define IDC_CHECK_SERIAL2 1075 +#define IDC_CHECK_SERIAL3 1076 +#define IDC_CHECK_SERIAL4 1077 +#define IDC_CHECK_PARALLEL1 1078 +#define IDC_CHECK_PARALLEL2 1079 +#define IDC_CHECK_PARALLEL3 1080 +#define IDC_CHECK_PARALLEL4 1081 -#define IDC_OTHER_PERIPH 1082 /* storage controllers config */ -#define IDC_COMBO_HDC 1083 -#define IDC_CONFIGURE_HDC 1084 -#define IDC_CHECK_IDE_TER 1085 -#define IDC_BUTTON_IDE_TER 1086 -#define IDC_CHECK_IDE_QUA 1087 -#define IDC_BUTTON_IDE_QUA 1088 -#define IDC_GROUP_SCSI 1089 -#define IDC_COMBO_SCSI_1 1090 -#define IDC_COMBO_SCSI_2 1091 -#define IDC_COMBO_SCSI_3 1092 -#define IDC_COMBO_SCSI_4 1093 -#define IDC_CONFIGURE_SCSI_1 1094 -#define IDC_CONFIGURE_SCSI_2 1095 -#define IDC_CONFIGURE_SCSI_3 1096 -#define IDC_CONFIGURE_SCSI_4 1097 -#define IDC_CHECK_CASSETTE 1098 +#define IDC_OTHER_PERIPH 1082 /* storage controllers config */ +#define IDC_COMBO_HDC 1083 +#define IDC_CONFIGURE_HDC 1084 +#define IDC_CHECK_IDE_TER 1085 +#define IDC_BUTTON_IDE_TER 1086 +#define IDC_CHECK_IDE_QUA 1087 +#define IDC_BUTTON_IDE_QUA 1088 +#define IDC_GROUP_SCSI 1089 +#define IDC_COMBO_SCSI_1 1090 +#define IDC_COMBO_SCSI_2 1091 +#define IDC_COMBO_SCSI_3 1092 +#define IDC_COMBO_SCSI_4 1093 +#define IDC_CONFIGURE_SCSI_1 1094 +#define IDC_CONFIGURE_SCSI_2 1095 +#define IDC_CONFIGURE_SCSI_3 1096 +#define IDC_CONFIGURE_SCSI_4 1097 +#define IDC_CHECK_CASSETTE 1098 -#define IDC_HARD_DISKS 1100 /* hard disks config */ -#define IDC_LIST_HARD_DISKS 1101 -#define IDC_BUTTON_HDD_ADD_NEW 1102 -#define IDC_BUTTON_HDD_ADD 1103 -#define IDC_BUTTON_HDD_REMOVE 1104 -#define IDC_COMBO_HD_BUS 1105 -#define IDC_COMBO_HD_CHANNEL 1106 -#define IDC_COMBO_HD_ID 1107 -#define IDC_COMBO_HD_LUN 1108 -#define IDC_COMBO_HD_CHANNEL_IDE 1109 +#define IDC_HARD_DISKS 1100 /* hard disks config */ +#define IDC_LIST_HARD_DISKS 1101 +#define IDC_BUTTON_HDD_ADD_NEW 1102 +#define IDC_BUTTON_HDD_ADD 1103 +#define IDC_BUTTON_HDD_REMOVE 1104 +#define IDC_COMBO_HD_BUS 1105 +#define IDC_COMBO_HD_CHANNEL 1106 +#define IDC_COMBO_HD_ID 1107 +#define IDC_COMBO_HD_LUN 1108 +#define IDC_COMBO_HD_CHANNEL_IDE 1109 -#define IDC_EDIT_HD_FILE_NAME 1110 /* add hard disk dialog */ -#define IDC_EDIT_HD_SPT 1111 -#define IDC_EDIT_HD_HPC 1112 -#define IDC_EDIT_HD_CYL 1113 -#define IDC_EDIT_HD_SIZE 1114 -#define IDC_COMBO_HD_TYPE 1115 -#define IDC_PBAR_IMG_CREATE 1116 -#define IDC_COMBO_HD_IMG_FORMAT 1117 -#define IDC_COMBO_HD_BLOCK_SIZE 1118 +#define IDC_EDIT_HD_FILE_NAME 1110 /* add hard disk dialog */ +#define IDC_EDIT_HD_SPT 1111 +#define IDC_EDIT_HD_HPC 1112 +#define IDC_EDIT_HD_CYL 1113 +#define IDC_EDIT_HD_SIZE 1114 +#define IDC_COMBO_HD_TYPE 1115 +#define IDC_PBAR_IMG_CREATE 1116 +#define IDC_COMBO_HD_IMG_FORMAT 1117 +#define IDC_COMBO_HD_BLOCK_SIZE 1118 -#define IDC_REMOV_DEVICES 1120 /* floppy and cd-rom drives config */ -#define IDC_LIST_FLOPPY_DRIVES 1121 -#define IDC_COMBO_FD_TYPE 1122 -#define IDC_CHECKTURBO 1123 -#define IDC_CHECKBPB 1124 -#define IDC_LIST_CDROM_DRIVES 1125 -#define IDC_COMBO_CD_BUS 1126 -#define IDC_COMBO_CD_ID 1127 -#define IDC_COMBO_CD_LUN 1128 -#define IDC_COMBO_CD_CHANNEL_IDE 1129 +#define IDC_REMOV_DEVICES 1120 /* floppy and cd-rom drives config */ +#define IDC_LIST_FLOPPY_DRIVES 1121 +#define IDC_COMBO_FD_TYPE 1122 +#define IDC_CHECKTURBO 1123 +#define IDC_CHECKBPB 1124 +#define IDC_LIST_CDROM_DRIVES 1125 +#define IDC_COMBO_CD_BUS 1126 +#define IDC_COMBO_CD_ID 1127 +#define IDC_COMBO_CD_LUN 1128 +#define IDC_COMBO_CD_CHANNEL_IDE 1129 -#define IDC_LIST_ZIP_DRIVES 1130 /* other removable devices config */ -#define IDC_COMBO_ZIP_BUS 1131 -#define IDC_COMBO_ZIP_ID 1132 -#define IDC_COMBO_ZIP_LUN 1133 +#define IDC_LIST_ZIP_DRIVES 1130 /* other removable devices config */ +#define IDC_COMBO_ZIP_BUS 1131 +#define IDC_COMBO_ZIP_ID 1132 +#define IDC_COMBO_ZIP_LUN 1133 #define IDC_COMBO_ZIP_CHANNEL_IDE 1134 -#define IDC_CHECK250 1135 -#define IDC_COMBO_CD_SPEED 1136 -#define IDC_LIST_MO_DRIVES 1137 -#define IDC_COMBO_MO_BUS 1138 -#define IDC_COMBO_MO_ID 1139 -#define IDC_COMBO_MO_LUN 1140 -#define IDC_COMBO_MO_CHANNEL_IDE 1141 -#define IDC_COMBO_MO_TYPE 1142 +#define IDC_CHECK250 1135 +#define IDC_COMBO_CD_SPEED 1136 +#define IDC_LIST_MO_DRIVES 1137 +#define IDC_COMBO_MO_BUS 1138 +#define IDC_COMBO_MO_ID 1139 +#define IDC_COMBO_MO_LUN 1140 +#define IDC_COMBO_MO_CHANNEL_IDE 1141 +#define IDC_COMBO_MO_TYPE 1142 -#define IDC_CHECK_BUGGER 1150 /* other periph config */ -#define IDC_CHECK_POSTCARD 1151 -#define IDC_COMBO_ISARTC 1152 -#define IDC_CONFIGURE_ISARTC 1153 -#define IDC_COMBO_FDC 1154 -#define IDC_CONFIGURE_FDC 1155 -#define IDC_GROUP_ISAMEM 1156 -#define IDC_COMBO_ISAMEM_1 1157 -#define IDC_COMBO_ISAMEM_2 1158 -#define IDC_COMBO_ISAMEM_3 1159 -#define IDC_COMBO_ISAMEM_4 1160 -#define IDC_CONFIGURE_ISAMEM_1 1161 -#define IDC_CONFIGURE_ISAMEM_2 1162 -#define IDC_CONFIGURE_ISAMEM_3 1163 -#define IDC_CONFIGURE_ISAMEM_4 1164 +#define IDC_CHECK_BUGGER 1150 /* other periph config */ +#define IDC_CHECK_POSTCARD 1151 +#define IDC_COMBO_ISARTC 1152 +#define IDC_CONFIGURE_ISARTC 1153 +#define IDC_COMBO_FDC 1154 +#define IDC_CONFIGURE_FDC 1155 +#define IDC_GROUP_ISAMEM 1156 +#define IDC_COMBO_ISAMEM_1 1157 +#define IDC_COMBO_ISAMEM_2 1158 +#define IDC_COMBO_ISAMEM_3 1159 +#define IDC_COMBO_ISAMEM_4 1160 +#define IDC_CONFIGURE_ISAMEM_1 1161 +#define IDC_CONFIGURE_ISAMEM_2 1162 +#define IDC_CONFIGURE_ISAMEM_3 1163 +#define IDC_CONFIGURE_ISAMEM_4 1164 -#define IDC_SLIDER_GAIN 1170 /* sound gain dialog */ +#define IDC_SLIDER_GAIN 1170 /* sound gain dialog */ -#define IDC_EDIT_FILE_NAME 1200 /* new floppy image dialog */ -#define IDC_COMBO_DISK_SIZE 1201 -#define IDC_COMBO_RPM_MODE 1202 +#define IDC_EDIT_FILE_NAME 1200 /* new floppy image dialog */ +#define IDC_COMBO_DISK_SIZE 1201 +#define IDC_COMBO_RPM_MODE 1202 -#define IDC_COMBO_LANG 1009 /* change language dialog */ -#define IDC_COMBO_ICON 1010 -#define IDC_CHECKBOX_GLOBAL 1300 -#define IDC_BUTTON_DEFAULT 1302 -#define IDC_BUTTON_DEFICON 1304 +#define IDC_COMBO_LANG 1009 /* change language dialog */ +#define IDC_COMBO_ICON 1010 +#define IDC_CHECKBOX_GLOBAL 1300 +#define IDC_BUTTON_DEFAULT 1302 +#define IDC_BUTTON_DEFICON 1304 /* For the DeviceConfig code, re-do later. */ -#define IDC_CONFIG_BASE 1300 -#define IDC_CONFIGURE_VID 1300 -#define IDC_CONFIGURE_SND 1301 -#define IDC_CONFIGURE_VOODOO 1302 -#define IDC_CONFIGURE_MOD 1303 -#define IDC_CONFIGURE_NET_TYPE 1304 -#define IDC_CONFIGURE_BUSLOGIC 1305 -#define IDC_CONFIGURE_PCAP 1306 -#define IDC_CONFIGURE_NET 1307 -#define IDC_CONFIGURE_MIDI_OUT 1308 -#define IDC_CONFIGURE_MIDI_IN 1309 -#define IDC_JOY1 1310 -#define IDC_JOY2 1311 -#define IDC_JOY3 1312 -#define IDC_JOY4 1313 -#define IDC_HDTYPE 1380 -#define IDC_RENDER 1381 -#define IDC_STATUS 1382 +#define IDC_CONFIG_BASE 1300 +#define IDC_CONFIGURE_VID 1300 +#define IDC_CONFIGURE_SND 1301 +#define IDC_CONFIGURE_VOODOO 1302 +#define IDC_CONFIGURE_MOD 1303 +#define IDC_CONFIGURE_NET_TYPE 1304 +#define IDC_CONFIGURE_BUSLOGIC 1305 +#define IDC_CONFIGURE_PCAP 1306 +#define IDC_CONFIGURE_NET 1307 +#define IDC_CONFIGURE_MIDI_OUT 1308 +#define IDC_CONFIGURE_MIDI_IN 1309 +#define IDC_JOY1 1310 +#define IDC_JOY2 1311 +#define IDC_JOY3 1312 +#define IDC_JOY4 1313 +#define IDC_HDTYPE 1380 +#define IDC_RENDER 1381 +#define IDC_STATUS 1382 -#define IDC_EDIT_WIDTH 1400 /* specify main window dimensions dialog */ -#define IDC_WIDTHSPIN 1401 -#define IDC_EDIT_HEIGHT 1402 -#define IDC_HEIGHTSPIN 1403 -#define IDC_CHECK_LOCK_SIZE 1404 +#define IDC_EDIT_WIDTH 1400 /* specify main window dimensions dialog */ +#define IDC_WIDTHSPIN 1401 +#define IDC_EDIT_HEIGHT 1402 +#define IDC_HEIGHTSPIN 1403 +#define IDC_CHECK_LOCK_SIZE 1404 -#define IDM_ABOUT 40001 -#define IDC_ABOUT_ICON 65535 -#define IDM_ACTION_KBD_REQ_CAPTURE 40010 -#define IDM_ACTION_RCTRL_IS_LALT 40011 -#define IDM_ACTION_SCREENSHOT 40012 -#define IDM_ACTION_HRESET 40013 -#define IDM_ACTION_RESET_CAD 40014 -#define IDM_ACTION_EXIT 40015 -#define IDM_ACTION_CTRL_ALT_ESC 40016 -#define IDM_ACTION_PAUSE 40017 +#define IDM_ABOUT 40001 +#define IDC_ABOUT_ICON 65535 +#define IDM_ACTION_KBD_REQ_CAPTURE 40010 +#define IDM_ACTION_RCTRL_IS_LALT 40011 +#define IDM_ACTION_SCREENSHOT 40012 +#define IDM_ACTION_HRESET 40013 +#define IDM_ACTION_RESET_CAD 40014 +#define IDM_ACTION_EXIT 40015 +#define IDM_ACTION_CTRL_ALT_ESC 40016 +#define IDM_ACTION_PAUSE 40017 #ifdef MTR_ENABLED -#define IDM_ACTION_BEGIN_TRACE 40018 -#define IDM_ACTION_END_TRACE 40019 -#define IDM_ACTION_TRACE 40020 +# define IDM_ACTION_BEGIN_TRACE 40018 +# define IDM_ACTION_END_TRACE 40019 +# define IDM_ACTION_TRACE 40020 #endif -#define IDM_CONFIG 40021 -#define IDM_VID_HIDE_STATUS_BAR 40022 -#define IDM_VID_HIDE_TOOLBAR 40023 -#define IDM_UPDATE_ICONS 40030 -#define IDM_SND_GAIN 40031 -#define IDM_VID_RESIZE 40040 -#define IDM_VID_REMEMBER 40041 -#define IDM_VID_SDL_SW 40050 -#define IDM_VID_SDL_HW 40051 -#define IDM_VID_SDL_OPENGL 40052 -#define IDM_VID_OPENGL_CORE 40053 +#define IDM_CONFIG 40021 +#define IDM_VID_HIDE_STATUS_BAR 40022 +#define IDM_VID_HIDE_TOOLBAR 40023 +#define IDM_UPDATE_ICONS 40030 +#define IDM_SND_GAIN 40031 +#define IDM_VID_RESIZE 40040 +#define IDM_VID_REMEMBER 40041 +#define IDM_VID_SDL_SW 40050 +#define IDM_VID_SDL_HW 40051 +#define IDM_VID_SDL_OPENGL 40052 +#define IDM_VID_OPENGL_CORE 40053 #ifdef USE_VNC -#define IDM_VID_VNC 40054 +# define IDM_VID_VNC 40054 #endif -#define IDM_VID_SCALE_1X 40055 -#define IDM_VID_SCALE_2X 40056 -#define IDM_VID_SCALE_3X 40057 -#define IDM_VID_SCALE_4X 40058 -#define IDM_VID_HIDPI 40059 -#define IDM_VID_FULLSCREEN 40060 -#define IDM_VID_FS_FULL 40061 -#define IDM_VID_FS_43 40062 -#define IDM_VID_FS_KEEPRATIO 40063 -#define IDM_VID_FS_INT 40064 -#define IDM_VID_SPECIFY_DIM 40065 -#define IDM_VID_FORCE43 40066 -#define IDM_VID_OVERSCAN 40067 -#define IDM_VID_INVERT 40069 -#define IDM_VID_CGACON 40070 -#define IDM_VID_GRAYCT_601 40075 -#define IDM_VID_GRAYCT_709 40076 -#define IDM_VID_GRAYCT_AVE 40077 -#define IDM_VID_GRAY_RGB 40080 -#define IDM_VID_GRAY_MONO 40081 -#define IDM_VID_GRAY_AMBER 40082 -#define IDM_VID_GRAY_GREEN 40083 -#define IDM_VID_GRAY_WHITE 40084 -#define IDM_VID_FILTER_NEAREST 40085 -#define IDM_VID_FILTER_LINEAR 40086 +#define IDM_VID_SCALE_1X 40055 +#define IDM_VID_SCALE_2X 40056 +#define IDM_VID_SCALE_3X 40057 +#define IDM_VID_SCALE_4X 40058 +#define IDM_VID_HIDPI 40059 +#define IDM_VID_FULLSCREEN 40060 +#define IDM_VID_FS_FULL 40061 +#define IDM_VID_FS_43 40062 +#define IDM_VID_FS_KEEPRATIO 40063 +#define IDM_VID_FS_INT 40064 +#define IDM_VID_SPECIFY_DIM 40065 +#define IDM_VID_FORCE43 40066 +#define IDM_VID_OVERSCAN 40067 +#define IDM_VID_INVERT 40069 +#define IDM_VID_CGACON 40070 +#define IDM_VID_GRAYCT_601 40075 +#define IDM_VID_GRAYCT_709 40076 +#define IDM_VID_GRAYCT_AVE 40077 +#define IDM_VID_GRAY_RGB 40080 +#define IDM_VID_GRAY_MONO 40081 +#define IDM_VID_GRAY_AMBER 40082 +#define IDM_VID_GRAY_GREEN 40083 +#define IDM_VID_GRAY_WHITE 40084 +#define IDM_VID_FILTER_NEAREST 40085 +#define IDM_VID_FILTER_LINEAR 40086 -#define IDM_MEDIA 40087 -#define IDM_DOCS 40088 +#define IDM_MEDIA 40087 +#define IDM_DOCS 40088 -#define IDM_DISCORD 40090 +#define IDM_DISCORD 40090 -#define IDM_PREFERENCES 40091 +#define IDM_PREFERENCES 40091 -#define IDM_VID_GL_FPS_BLITTER 40100 -#define IDM_VID_GL_FPS_25 40101 -#define IDM_VID_GL_FPS_30 40102 -#define IDM_VID_GL_FPS_50 40103 -#define IDM_VID_GL_FPS_60 40104 -#define IDM_VID_GL_FPS_75 40105 -#define IDM_VID_GL_VSYNC 40106 -#define IDM_VID_GL_SHADER 40107 -#define IDM_VID_GL_NOSHADER 40108 +#define IDM_VID_GL_FPS_BLITTER 40100 +#define IDM_VID_GL_FPS_25 40101 +#define IDM_VID_GL_FPS_30 40102 +#define IDM_VID_GL_FPS_50 40103 +#define IDM_VID_GL_FPS_60 40104 +#define IDM_VID_GL_FPS_75 40105 +#define IDM_VID_GL_VSYNC 40106 +#define IDM_VID_GL_SHADER 40107 +#define IDM_VID_GL_NOSHADER 40108 /* * We need 7 bits for CDROM (2 bits ID and 5 bits for host drive), * and 5 bits for Removable Disks (5 bits for ID), so we use an * 8bit (256 entries) space for these devices. */ -#define IDM_CASSETTE_IMAGE_NEW 0x1200 -#define IDM_CASSETTE_IMAGE_EXISTING 0x1300 -#define IDM_CASSETTE_IMAGE_EXISTING_WP 0x1400 -#define IDM_CASSETTE_RECORD 0x1500 -#define IDM_CASSETTE_PLAY 0x1600 -#define IDM_CASSETTE_REWIND 0x1700 -#define IDM_CASSETTE_FAST_FORWARD 0x1800 -#define IDM_CASSETTE_EJECT 0x1900 +#define IDM_CASSETTE_IMAGE_NEW 0x1200 +#define IDM_CASSETTE_IMAGE_EXISTING 0x1300 +#define IDM_CASSETTE_IMAGE_EXISTING_WP 0x1400 +#define IDM_CASSETTE_RECORD 0x1500 +#define IDM_CASSETTE_PLAY 0x1600 +#define IDM_CASSETTE_REWIND 0x1700 +#define IDM_CASSETTE_FAST_FORWARD 0x1800 +#define IDM_CASSETTE_EJECT 0x1900 -#define IDM_CARTRIDGE_IMAGE 0x2200 -#define IDM_CARTRIDGE_EJECT 0x2300 +#define IDM_CARTRIDGE_IMAGE 0x2200 +#define IDM_CARTRIDGE_EJECT 0x2300 -#define IDM_FLOPPY_IMAGE_NEW 0x3200 -#define IDM_FLOPPY_IMAGE_EXISTING 0x3300 -#define IDM_FLOPPY_IMAGE_EXISTING_WP 0x3400 -#define IDM_FLOPPY_EXPORT_TO_86F 0x3500 -#define IDM_FLOPPY_EJECT 0x3600 +#define IDM_FLOPPY_IMAGE_NEW 0x3200 +#define IDM_FLOPPY_IMAGE_EXISTING 0x3300 +#define IDM_FLOPPY_IMAGE_EXISTING_WP 0x3400 +#define IDM_FLOPPY_EXPORT_TO_86F 0x3500 +#define IDM_FLOPPY_EJECT 0x3600 -#define IDM_CDROM_MUTE 0x4200 -#define IDM_CDROM_EMPTY 0x4300 -#define IDM_CDROM_RELOAD 0x4400 -#define IDM_CDROM_IMAGE 0x4500 -#define IDM_CDROM_HOST_DRIVE 0x4600 +#define IDM_CDROM_MUTE 0x4200 +#define IDM_CDROM_EMPTY 0x4300 +#define IDM_CDROM_RELOAD 0x4400 +#define IDM_CDROM_IMAGE 0x4500 +#define IDM_CDROM_HOST_DRIVE 0x4600 -#define IDM_ZIP_IMAGE_NEW 0x5200 -#define IDM_ZIP_IMAGE_EXISTING 0x5300 -#define IDM_ZIP_IMAGE_EXISTING_WP 0x5400 -#define IDM_ZIP_EJECT 0x5500 -#define IDM_ZIP_RELOAD 0x5600 - -#define IDM_MO_IMAGE_NEW 0x6200 -#define IDM_MO_IMAGE_EXISTING 0x6300 -#define IDM_MO_IMAGE_EXISTING_WP 0x6400 -#define IDM_MO_EJECT 0x6500 -#define IDM_MO_RELOAD 0x6600 +#define IDM_ZIP_IMAGE_NEW 0x5200 +#define IDM_ZIP_IMAGE_EXISTING 0x5300 +#define IDM_ZIP_IMAGE_EXISTING_WP 0x5400 +#define IDM_ZIP_EJECT 0x5500 +#define IDM_ZIP_RELOAD 0x5600 +#define IDM_MO_IMAGE_NEW 0x6200 +#define IDM_MO_IMAGE_EXISTING 0x6300 +#define IDM_MO_IMAGE_EXISTING_WP 0x6400 +#define IDM_MO_EJECT 0x6500 +#define IDM_MO_RELOAD 0x6600 /* Next default values for new objects */ #ifdef APSTUDIO_INVOKED -# ifndef APSTUDIO_READONLY_SYMBOLS -# define _APS_NO_MFC 1 -# define _APS_NEXT_RESOURCE_VALUE 1400 -# define _APS_NEXT_COMMAND_VALUE 55000 -# define _APS_NEXT_CONTROL_VALUE 1800 -# define _APS_NEXT_SYMED_VALUE 200 -# endif +# ifndef APSTUDIO_READONLY_SYMBOLS +# define _APS_NO_MFC 1 +# define _APS_NEXT_RESOURCE_VALUE 1400 +# define _APS_NEXT_COMMAND_VALUE 55000 +# define _APS_NEXT_CONTROL_VALUE 1800 +# define _APS_NEXT_SYMED_VALUE 200 +# endif #endif - -#endif /*WIN_RESOURCE_H*/ +#endif /*WIN_RESOURCE_H*/ diff --git a/src/include/86box/rom.h b/src/include/86box/rom.h index 30c7c0561..8cc85934d 100644 --- a/src/include/86box/rom.h +++ b/src/include/86box/rom.h @@ -15,79 +15,75 @@ */ #ifndef EMU_ROM_H -# define EMU_ROM_H +#define EMU_ROM_H -#define FLAG_INT 1 -#define FLAG_INV 2 -#define FLAG_AUX 4 -#define FLAG_REP 8 - - -#define bios_load_linear(a, b, c, d) bios_load(a, NULL, b, c, d, 0) -#define bios_load_linearr(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_REP) -#define bios_load_aux_linear(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_AUX) -#define bios_load_linear_inverted(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_INV) -#define bios_load_aux_linear_inverted(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_INV | FLAG_AUX) -#define bios_load_interleaved(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT) -#define bios_load_interleavedr(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT | FLAG_REP) -#define bios_load_aux_interleaved(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT | FLAG_AUX) +#define FLAG_INT 1 +#define FLAG_INV 2 +#define FLAG_AUX 4 +#define FLAG_REP 8 +#define bios_load_linear(a, b, c, d) bios_load(a, NULL, b, c, d, 0) +#define bios_load_linearr(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_REP) +#define bios_load_aux_linear(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_AUX) +#define bios_load_linear_inverted(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_INV) +#define bios_load_aux_linear_inverted(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_INV | FLAG_AUX) +#define bios_load_interleaved(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT) +#define bios_load_interleavedr(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT | FLAG_REP) +#define bios_load_aux_interleaved(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT | FLAG_AUX) typedef struct { - uint8_t *rom; - int sz; - uint32_t mask; - mem_mapping_t mapping; + uint8_t *rom; + int sz; + uint32_t mask; + mem_mapping_t mapping; } rom_t; - typedef struct rom_path_t { - char path[1024]; - struct rom_path_t* next; + char path[1024]; + struct rom_path_t *next; } rom_path_t; extern rom_path_t rom_paths; -extern void rom_add_path(const char* path); +extern void rom_add_path(const char *path); -extern uint8_t rom_read(uint32_t addr, void *p); -extern uint16_t rom_readw(uint32_t addr, void *p); -extern uint32_t rom_readl(uint32_t addr, void *p); +extern uint8_t rom_read(uint32_t addr, void *p); +extern uint16_t rom_readw(uint32_t addr, void *p); +extern uint32_t rom_readl(uint32_t addr, void *p); -extern FILE *rom_fopen(char *fn, char *mode); -extern int rom_getfile(char *fn, char *s, int size); -extern int rom_present(char *fn); +extern FILE *rom_fopen(char *fn, char *mode); +extern int rom_getfile(char *fn, char *s, int size); +extern int rom_present(char *fn); -extern int rom_load_linear_oddeven(char *fn, uint32_t addr, int sz, - int off, uint8_t *ptr); -extern int rom_load_linear(char *fn, uint32_t addr, int sz, - int off, uint8_t *ptr); -extern int rom_load_interleaved(char *fnl, char *fnh, uint32_t addr, - int sz, int off, uint8_t *ptr); +extern int rom_load_linear_oddeven(char *fn, uint32_t addr, int sz, + int off, uint8_t *ptr); +extern int rom_load_linear(char *fn, uint32_t addr, int sz, + int off, uint8_t *ptr); +extern int rom_load_interleaved(char *fnl, char *fnh, uint32_t addr, + int sz, int off, uint8_t *ptr); -extern uint8_t bios_read(uint32_t addr, void *priv); -extern uint16_t bios_readw(uint32_t addr, void *priv); -extern uint32_t bios_readl(uint32_t addr, void *priv); +extern uint8_t bios_read(uint32_t addr, void *priv); +extern uint16_t bios_readw(uint32_t addr, void *priv); +extern uint32_t bios_readl(uint32_t addr, void *priv); -extern int bios_load(char *fn1, char *fn2, uint32_t addr, int sz, - int off, int flags); -extern int bios_load_linear_combined(char *fn1, char *fn2, - int sz, int off); -extern int bios_load_linear_combined2(char *fn1, char *fn2, - char *fn3, char *fn4, char *fn5, - int sz, int off); -extern int bios_load_linear_combined2_ex(char *fn1, char *fn2, - char *fn3, char *fn4, char *fn5, - int sz, int off); +extern int bios_load(char *fn1, char *fn2, uint32_t addr, int sz, + int off, int flags); +extern int bios_load_linear_combined(char *fn1, char *fn2, + int sz, int off); +extern int bios_load_linear_combined2(char *fn1, char *fn2, + char *fn3, char *fn4, char *fn5, + int sz, int off); +extern int bios_load_linear_combined2_ex(char *fn1, char *fn2, + char *fn3, char *fn4, char *fn5, + int sz, int off); -extern int rom_init(rom_t *rom, char *fn, uint32_t address, int size, - int mask, int file_offset, uint32_t flags); -extern int rom_init_oddeven(rom_t *rom, char *fn, uint32_t address, int size, - int mask, int file_offset, uint32_t flags); -extern int rom_init_interleaved(rom_t *rom, char *fn_low, - char *fn_high, uint32_t address, - int size, int mask, int file_offset, - uint32_t flags); +extern int rom_init(rom_t *rom, char *fn, uint32_t address, int size, + int mask, int file_offset, uint32_t flags); +extern int rom_init_oddeven(rom_t *rom, char *fn, uint32_t address, int size, + int mask, int file_offset, uint32_t flags); +extern int rom_init_interleaved(rom_t *rom, char *fn_low, + char *fn_high, uint32_t address, + int size, int mask, int file_offset, + uint32_t flags); - -#endif /*EMU_ROM_H*/ +#endif /*EMU_ROM_H*/ diff --git a/src/include/86box/scsi.h b/src/include/86box/scsi.h index b0af25e44..93a7fd010 100644 --- a/src/include/86box/scsi.h +++ b/src/include/86box/scsi.h @@ -19,23 +19,23 @@ * Copyright 2017,2018 Fred N. van Kempen. */ #ifndef EMU_SCSI_H -# define EMU_SCSI_H +#define EMU_SCSI_H /* Configuration. */ -#define SCSI_BUS_MAX 4 /* currently we support up to 4 controllers */ +#define SCSI_BUS_MAX 4 /* currently we support up to 4 controllers */ -#define SCSI_ID_MAX 16 /* 16 on wide buses */ -#define SCSI_LUN_MAX 8 /* always 8 */ +#define SCSI_ID_MAX 16 /* 16 on wide buses */ +#define SCSI_LUN_MAX 8 /* always 8 */ -extern int scsi_card_current[SCSI_BUS_MAX]; +extern int scsi_card_current[SCSI_BUS_MAX]; -extern int scsi_card_available(int card); +extern int scsi_card_available(int card); #ifdef EMU_DEVICE_H -extern const device_t *scsi_card_getdevice(int card); +extern const device_t *scsi_card_getdevice(int card); #endif -extern int scsi_card_has_config(int card); -extern char *scsi_card_get_internal_name(int card); -extern int scsi_card_get_from_internal_name(char *s); -extern void scsi_card_init(void); +extern int scsi_card_has_config(int card); +extern char *scsi_card_get_internal_name(int card); +extern int scsi_card_get_from_internal_name(char *s); +extern void scsi_card_init(void); -#endif /*EMU_SCSI_H*/ +#endif /*EMU_SCSI_H*/ diff --git a/src/include/86box/scsi_aha154x.h b/src/include/86box/scsi_aha154x.h index 6a98d100e..3c8265391 100644 --- a/src/include/86box/scsi_aha154x.h +++ b/src/include/86box/scsi_aha154x.h @@ -1,5 +1,5 @@ #ifndef SCSI_AHA154X_H -# define SCSI_AHA154X_H +#define SCSI_AHA154X_H extern const device_t aha154xa_device; extern const device_t aha154xb_device; @@ -8,6 +8,6 @@ extern const device_t aha154xcf_device; extern const device_t aha154xcp_device; extern const device_t aha1640_device; -extern void aha_device_reset(void *p); +extern void aha_device_reset(void *p); -#endif /*SCSI_AHA154X_H*/ +#endif /*SCSI_AHA154X_H*/ diff --git a/src/include/86box/scsi_buslogic.h b/src/include/86box/scsi_buslogic.h index fa075d964..be865ec57 100644 --- a/src/include/86box/scsi_buslogic.h +++ b/src/include/86box/scsi_buslogic.h @@ -17,7 +17,7 @@ */ #ifndef SCSI_BUSLOGIC_H -# define SCSI_BUSLOGIC_H +#define SCSI_BUSLOGIC_H extern const device_t buslogic_542b_device; extern const device_t buslogic_545s_device; @@ -28,6 +28,6 @@ extern const device_t buslogic_445s_device; extern const device_t buslogic_445c_device; extern const device_t buslogic_958d_pci_device; -extern void BuslogicDeviceReset(void *p); +extern void BuslogicDeviceReset(void *p); -#endif /*SCSI_BUSLOGIC_H*/ +#endif /*SCSI_BUSLOGIC_H*/ diff --git a/src/include/86box/scsi_cdrom.h b/src/include/86box/scsi_cdrom.h index fac93eada..f278a2f42 100644 --- a/src/include/86box/scsi_cdrom.h +++ b/src/include/86box/scsi_cdrom.h @@ -19,8 +19,7 @@ #ifndef EMU_SCSI_CDROM_H #define EMU_SCSI_CDROM_H -#define CDROM_TIME 10.0 - +#define CDROM_TIME 10.0 #ifdef SCSI_DEVICE_H typedef struct { @@ -30,40 +29,37 @@ typedef struct { cdrom_t *drv; uint8_t *buffer, - atapi_cdb[16], - current_cdb[16], - sense[256]; + atapi_cdb[16], + current_cdb[16], + sense[256]; uint8_t status, phase, - error, id, - features, cur_lun, - pad0, pad1; + error, id, + features, cur_lun, + pad0, pad1; uint16_t request_length, max_transfer_len; int requested_blocks, packet_status, - total_length, do_page_save, - unit_attention, request_pos, - old_len, media_status; + total_length, do_page_save, + unit_attention, request_pos, + old_len, media_status; uint32_t sector_pos, sector_len, - packet_len, pos; + packet_len, pos; double callback; } scsi_cdrom_t; #endif - -extern scsi_cdrom_t *scsi_cdrom[CDROM_NUM]; +extern scsi_cdrom_t *scsi_cdrom[CDROM_NUM]; #define scsi_cdrom_sense_error dev->sense[0] -#define scsi_cdrom_sense_key dev->sense[2] -#define scsi_cdrom_asc dev->sense[12] -#define scsi_cdrom_ascq dev->sense[13] -#define scsi_cdrom_drive cdrom_drives[id].host_drive +#define scsi_cdrom_sense_key dev->sense[2] +#define scsi_cdrom_asc dev->sense[12] +#define scsi_cdrom_ascq dev->sense[13] +#define scsi_cdrom_drive cdrom_drives[id].host_drive +extern void scsi_cdrom_reset(scsi_common_t *sc); -extern void scsi_cdrom_reset(scsi_common_t *sc); - - -#endif /*EMU_SCSI_CDROM_H*/ +#endif /*EMU_SCSI_CDROM_H*/ diff --git a/src/include/86box/scsi_device.h b/src/include/86box/scsi_device.h index f1a2a4728..bef94ed96 100644 --- a/src/include/86box/scsi_device.h +++ b/src/include/86box/scsi_device.h @@ -18,202 +18,201 @@ */ #ifndef SCSI_DEVICE_H -# define SCSI_DEVICE_H +#define SCSI_DEVICE_H /* Configuration. */ -#define SCSI_LUN_USE_CDB 0xff +#define SCSI_LUN_USE_CDB 0xff #ifdef WALTJE -#define SCSI_TIME 50.0 +# define SCSI_TIME 50.0 #else -#define SCSI_TIME 500.0 +# define SCSI_TIME 500.0 #endif - /* Bits of 'status' */ -#define ERR_STAT 0x01 -#define DRQ_STAT 0x08 /* Data request */ -#define DSC_STAT 0x10 -#define SERVICE_STAT 0x10 -#define READY_STAT 0x40 -#define BUSY_STAT 0x80 +#define ERR_STAT 0x01 +#define DRQ_STAT 0x08 /* Data request */ +#define DSC_STAT 0x10 +#define SERVICE_STAT 0x10 +#define READY_STAT 0x40 +#define BUSY_STAT 0x80 /* Bits of 'error' */ -#define ABRT_ERR 0x04 /* Command aborted */ -#define MCR_ERR 0x08 /* Media change request */ +#define ABRT_ERR 0x04 /* Command aborted */ +#define MCR_ERR 0x08 /* Media change request */ /* SCSI commands. */ -#define GPCMD_TEST_UNIT_READY 0x00 -#define GPCMD_REZERO_UNIT 0x01 -#define GPCMD_REQUEST_SENSE 0x03 -#define GPCMD_FORMAT_UNIT 0x04 -#define GPCMD_IOMEGA_SENSE 0x06 -#define GPCMD_READ_6 0x08 -#define GPCMD_WRITE_6 0x0a -#define GPCMD_SEEK_6 0x0b -#define GPCMD_IOMEGA_SET_PROTECTION_MODE 0x0c -#define GPCMD_IOMEGA_EJECT 0x0d /* ATAPI only? */ -#define GPCMD_INQUIRY 0x12 -#define GPCMD_VERIFY_6 0x13 -#define GPCMD_MODE_SELECT_6 0x15 -#define GPCMD_SCSI_RESERVE 0x16 -#define GPCMD_SCSI_RELEASE 0x17 -#define GPCMD_MODE_SENSE_6 0x1a -#define GPCMD_START_STOP_UNIT 0x1b -#define GPCMD_SEND_DIAGNOSTIC 0x1d -#define GPCMD_PREVENT_REMOVAL 0x1e -#define GPCMD_READ_FORMAT_CAPACITIES 0x23 -#define GPCMD_READ_CDROM_CAPACITY 0x25 -#define GPCMD_READ_10 0x28 -#define GPCMD_READ_GENERATION 0x29 -#define GPCMD_WRITE_10 0x2a -#define GPCMD_SEEK_10 0x2b -#define GPCMD_ERASE_10 0x2c -#define GPCMD_WRITE_AND_VERIFY_10 0x2e -#define GPCMD_VERIFY_10 0x2f -#define GPCMD_READ_BUFFER 0x3c -#define GPCMD_WRITE_SAME_10 0x41 -#define GPCMD_READ_SUBCHANNEL 0x42 -#define GPCMD_READ_TOC_PMA_ATIP 0x43 -#define GPCMD_READ_HEADER 0x44 -#define GPCMD_PLAY_AUDIO_10 0x45 -#define GPCMD_GET_CONFIGURATION 0x46 -#define GPCMD_PLAY_AUDIO_MSF 0x47 -#define GPCMD_PLAY_AUDIO_TRACK_INDEX 0x48 -#define GPCMD_PLAY_AUDIO_TRACK_RELATIVE_10 0x49 -#define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a -#define GPCMD_PAUSE_RESUME 0x4b -#define GPCMD_STOP_PLAY_SCAN 0x4e -#define GPCMD_READ_DISC_INFORMATION 0x51 -#define GPCMD_READ_TRACK_INFORMATION 0x52 -#define GPCMD_MODE_SELECT_10 0x55 -#define GPCMD_MODE_SENSE_10 0x5a -#define GPCMD_PLAY_AUDIO_12 0xa5 -#define GPCMD_READ_12 0xa8 -#define GPCMD_PLAY_AUDIO_TRACK_RELATIVE_12 0xa9 -#define GPCMD_WRITE_12 0xaa -#define GPCMD_ERASE_12 0xac -#define GPCMD_READ_DVD_STRUCTURE 0xad /* For reading. */ -#define GPCMD_WRITE_AND_VERIFY_12 0xae -#define GPCMD_VERIFY_12 0xaf -#define GPCMD_PLAY_CD_OLD 0xb4 -#define GPCMD_READ_CD_OLD 0xb8 -#define GPCMD_READ_CD_MSF 0xb9 -#define GPCMD_SCAN 0xba -#define GPCMD_SET_SPEED 0xbb -#define GPCMD_PLAY_CD 0xbc -#define GPCMD_MECHANISM_STATUS 0xbd -#define GPCMD_READ_CD 0xbe -#define GPCMD_SEND_DVD_STRUCTURE 0xbf /* This is for writing only, irrelevant to 86Box. */ -#define GPCMD_AUDIO_TRACK_SEARCH 0xc0 /* Toshiba Vendor Unique command */ -#define GPCMD_TOSHIBA_PLAY_AUDIO 0xc1 /* Toshiba Vendor Unique command */ -#define GPCMD_PAUSE_RESUME_ALT 0xc2 -#define GPCMD_STILL 0xc2 /* Toshiba Vendor Unique command */ -#define GPCMD_CADDY_EJECT 0xc4 /* Toshiba Vendor Unique command */ -#define GPCMD_READ_SUBCODEQ_PLAYING_STATUS 0xc6 /* Toshiba Vendor Unique command */ -#define GPCMD_READ_DISC_INFORMATION_TOSHIBA 0xc7 /* Toshiba Vendor Unique command */ -#define GPCMD_SCAN_ALT 0xcd /* Should be equivalent to 0xba */ -#define GPCMD_SET_SPEED_ALT 0xda /* Should be equivalent to 0xbb */ +#define GPCMD_TEST_UNIT_READY 0x00 +#define GPCMD_REZERO_UNIT 0x01 +#define GPCMD_REQUEST_SENSE 0x03 +#define GPCMD_FORMAT_UNIT 0x04 +#define GPCMD_IOMEGA_SENSE 0x06 +#define GPCMD_READ_6 0x08 +#define GPCMD_WRITE_6 0x0a +#define GPCMD_SEEK_6 0x0b +#define GPCMD_IOMEGA_SET_PROTECTION_MODE 0x0c +#define GPCMD_IOMEGA_EJECT 0x0d /* ATAPI only? */ +#define GPCMD_INQUIRY 0x12 +#define GPCMD_VERIFY_6 0x13 +#define GPCMD_MODE_SELECT_6 0x15 +#define GPCMD_SCSI_RESERVE 0x16 +#define GPCMD_SCSI_RELEASE 0x17 +#define GPCMD_MODE_SENSE_6 0x1a +#define GPCMD_START_STOP_UNIT 0x1b +#define GPCMD_SEND_DIAGNOSTIC 0x1d +#define GPCMD_PREVENT_REMOVAL 0x1e +#define GPCMD_READ_FORMAT_CAPACITIES 0x23 +#define GPCMD_READ_CDROM_CAPACITY 0x25 +#define GPCMD_READ_10 0x28 +#define GPCMD_READ_GENERATION 0x29 +#define GPCMD_WRITE_10 0x2a +#define GPCMD_SEEK_10 0x2b +#define GPCMD_ERASE_10 0x2c +#define GPCMD_WRITE_AND_VERIFY_10 0x2e +#define GPCMD_VERIFY_10 0x2f +#define GPCMD_READ_BUFFER 0x3c +#define GPCMD_WRITE_SAME_10 0x41 +#define GPCMD_READ_SUBCHANNEL 0x42 +#define GPCMD_READ_TOC_PMA_ATIP 0x43 +#define GPCMD_READ_HEADER 0x44 +#define GPCMD_PLAY_AUDIO_10 0x45 +#define GPCMD_GET_CONFIGURATION 0x46 +#define GPCMD_PLAY_AUDIO_MSF 0x47 +#define GPCMD_PLAY_AUDIO_TRACK_INDEX 0x48 +#define GPCMD_PLAY_AUDIO_TRACK_RELATIVE_10 0x49 +#define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a +#define GPCMD_PAUSE_RESUME 0x4b +#define GPCMD_STOP_PLAY_SCAN 0x4e +#define GPCMD_READ_DISC_INFORMATION 0x51 +#define GPCMD_READ_TRACK_INFORMATION 0x52 +#define GPCMD_MODE_SELECT_10 0x55 +#define GPCMD_MODE_SENSE_10 0x5a +#define GPCMD_PLAY_AUDIO_12 0xa5 +#define GPCMD_READ_12 0xa8 +#define GPCMD_PLAY_AUDIO_TRACK_RELATIVE_12 0xa9 +#define GPCMD_WRITE_12 0xaa +#define GPCMD_ERASE_12 0xac +#define GPCMD_READ_DVD_STRUCTURE 0xad /* For reading. */ +#define GPCMD_WRITE_AND_VERIFY_12 0xae +#define GPCMD_VERIFY_12 0xaf +#define GPCMD_PLAY_CD_OLD 0xb4 +#define GPCMD_READ_CD_OLD 0xb8 +#define GPCMD_READ_CD_MSF 0xb9 +#define GPCMD_SCAN 0xba +#define GPCMD_SET_SPEED 0xbb +#define GPCMD_PLAY_CD 0xbc +#define GPCMD_MECHANISM_STATUS 0xbd +#define GPCMD_READ_CD 0xbe +#define GPCMD_SEND_DVD_STRUCTURE 0xbf /* This is for writing only, irrelevant to 86Box. */ +#define GPCMD_AUDIO_TRACK_SEARCH 0xc0 /* Toshiba Vendor Unique command */ +#define GPCMD_TOSHIBA_PLAY_AUDIO 0xc1 /* Toshiba Vendor Unique command */ +#define GPCMD_PAUSE_RESUME_ALT 0xc2 +#define GPCMD_STILL 0xc2 /* Toshiba Vendor Unique command */ +#define GPCMD_CADDY_EJECT 0xc4 /* Toshiba Vendor Unique command */ +#define GPCMD_READ_SUBCODEQ_PLAYING_STATUS 0xc6 /* Toshiba Vendor Unique command */ +#define GPCMD_READ_DISC_INFORMATION_TOSHIBA 0xc7 /* Toshiba Vendor Unique command */ +#define GPCMD_SCAN_ALT 0xcd /* Should be equivalent to 0xba */ +#define GPCMD_SET_SPEED_ALT 0xda /* Should be equivalent to 0xbb */ /* Mode page codes for mode sense/set */ -#define GPMODE_R_W_ERROR_PAGE 0x01 -#define GPMODE_DISCONNECT_PAGE 0x02 /* Disconnect/reconnect page */ -#define GPMODE_FORMAT_DEVICE_PAGE 0x03 -#define GPMODE_RIGID_DISK_PAGE 0x04 /* Rigid disk geometry page */ -#define GPMODE_FLEXIBLE_DISK_PAGE 0x05 -#define GPMODE_CACHING_PAGE 0x08 -#define GPMODE_CDROM_PAGE 0x0d -#define GPMODE_CDROM_AUDIO_PAGE 0x0e -#define GPMODE_CAPABILITIES_PAGE 0x2a -#define GPMODE_IOMEGA_PAGE 0x2f -#define GPMODE_UNK_VENDOR_PAGE 0x30 -#define GPMODE_ALL_PAGES 0x3f +#define GPMODE_R_W_ERROR_PAGE 0x01 +#define GPMODE_DISCONNECT_PAGE 0x02 /* Disconnect/reconnect page */ +#define GPMODE_FORMAT_DEVICE_PAGE 0x03 +#define GPMODE_RIGID_DISK_PAGE 0x04 /* Rigid disk geometry page */ +#define GPMODE_FLEXIBLE_DISK_PAGE 0x05 +#define GPMODE_CACHING_PAGE 0x08 +#define GPMODE_CDROM_PAGE 0x0d +#define GPMODE_CDROM_AUDIO_PAGE 0x0e +#define GPMODE_CAPABILITIES_PAGE 0x2a +#define GPMODE_IOMEGA_PAGE 0x2f +#define GPMODE_UNK_VENDOR_PAGE 0x30 +#define GPMODE_ALL_PAGES 0x3f /* Mode page codes for presence */ -#define GPMODEP_R_W_ERROR_PAGE 0x0000000000000002LL -#define GPMODEP_DISCONNECT_PAGE 0x0000000000000004LL -#define GPMODEP_FORMAT_DEVICE_PAGE 0x0000000000000008LL -#define GPMODEP_RIGID_DISK_PAGE 0x0000000000000010LL -#define GPMODEP_FLEXIBLE_DISK_PAGE 0x0000000000000020LL -#define GPMODEP_CACHING_PAGE 0x0000000000000100LL -#define GPMODEP_CDROM_PAGE 0x0000000000002000LL -#define GPMODEP_CDROM_AUDIO_PAGE 0x0000000000004000LL -#define GPMODEP_CAPABILITIES_PAGE 0x0000040000000000LL -#define GPMODEP_IOMEGA_PAGE 0x0000800000000000LL -#define GPMODEP_UNK_VENDOR_PAGE 0x0001000000000000LL -#define GPMODEP_ALL_PAGES 0x8000000000000000LL +#define GPMODEP_R_W_ERROR_PAGE 0x0000000000000002LL +#define GPMODEP_DISCONNECT_PAGE 0x0000000000000004LL +#define GPMODEP_FORMAT_DEVICE_PAGE 0x0000000000000008LL +#define GPMODEP_RIGID_DISK_PAGE 0x0000000000000010LL +#define GPMODEP_FLEXIBLE_DISK_PAGE 0x0000000000000020LL +#define GPMODEP_CACHING_PAGE 0x0000000000000100LL +#define GPMODEP_CDROM_PAGE 0x0000000000002000LL +#define GPMODEP_CDROM_AUDIO_PAGE 0x0000000000004000LL +#define GPMODEP_CAPABILITIES_PAGE 0x0000040000000000LL +#define GPMODEP_IOMEGA_PAGE 0x0000800000000000LL +#define GPMODEP_UNK_VENDOR_PAGE 0x0001000000000000LL +#define GPMODEP_ALL_PAGES 0x8000000000000000LL /* SCSI Status Codes */ -#define SCSI_STATUS_OK 0 -#define SCSI_STATUS_CHECK_CONDITION 2 +#define SCSI_STATUS_OK 0 +#define SCSI_STATUS_CHECK_CONDITION 2 /* SCSI Sense Keys */ -#define SENSE_NONE 0 -#define SENSE_NOT_READY 2 -#define SENSE_ILLEGAL_REQUEST 5 -#define SENSE_UNIT_ATTENTION 6 +#define SENSE_NONE 0 +#define SENSE_NOT_READY 2 +#define SENSE_ILLEGAL_REQUEST 5 +#define SENSE_UNIT_ATTENTION 6 /* SCSI Additional Sense Codes */ -#define ASC_NONE 0x00 -#define ASC_AUDIO_PLAY_OPERATION 0x00 -#define ASC_NOT_READY 0x04 -#define ASC_ILLEGAL_OPCODE 0x20 -#define ASC_LBA_OUT_OF_RANGE 0x21 -#define ASC_INV_FIELD_IN_CMD_PACKET 0x24 -#define ASC_INV_LUN 0x25 -#define ASC_INV_FIELD_IN_PARAMETER_LIST 0x26 -#define ASC_WRITE_PROTECTED 0x27 -#define ASC_MEDIUM_MAY_HAVE_CHANGED 0x28 -#define ASC_CAPACITY_DATA_CHANGED 0x2A -#define ASC_INCOMPATIBLE_FORMAT 0x30 -#define ASC_MEDIUM_NOT_PRESENT 0x3a -#define ASC_DATA_PHASE_ERROR 0x4b -#define ASC_ILLEGAL_MODE_FOR_THIS_TRACK 0x64 +#define ASC_NONE 0x00 +#define ASC_AUDIO_PLAY_OPERATION 0x00 +#define ASC_NOT_READY 0x04 +#define ASC_ILLEGAL_OPCODE 0x20 +#define ASC_LBA_OUT_OF_RANGE 0x21 +#define ASC_INV_FIELD_IN_CMD_PACKET 0x24 +#define ASC_INV_LUN 0x25 +#define ASC_INV_FIELD_IN_PARAMETER_LIST 0x26 +#define ASC_WRITE_PROTECTED 0x27 +#define ASC_MEDIUM_MAY_HAVE_CHANGED 0x28 +#define ASC_CAPACITY_DATA_CHANGED 0x2A +#define ASC_INCOMPATIBLE_FORMAT 0x30 +#define ASC_MEDIUM_NOT_PRESENT 0x3a +#define ASC_DATA_PHASE_ERROR 0x4b +#define ASC_ILLEGAL_MODE_FOR_THIS_TRACK 0x64 -#define ASCQ_NONE 0x00 -#define ASCQ_UNIT_IN_PROCESS_OF_BECOMING_READY 0x01 -#define ASCQ_INITIALIZING_COMMAND_REQUIRED 0x02 -#define ASCQ_CAPACITY_DATA_CHANGED 0x09 -#define ASCQ_AUDIO_PLAY_OPERATION_IN_PROGRESS 0x11 -#define ASCQ_AUDIO_PLAY_OPERATION_PAUSED 0x12 -#define ASCQ_AUDIO_PLAY_OPERATION_COMPLETED 0x13 +#define ASCQ_NONE 0x00 +#define ASCQ_UNIT_IN_PROCESS_OF_BECOMING_READY 0x01 +#define ASCQ_INITIALIZING_COMMAND_REQUIRED 0x02 +#define ASCQ_CAPACITY_DATA_CHANGED 0x09 +#define ASCQ_AUDIO_PLAY_OPERATION_IN_PROGRESS 0x11 +#define ASCQ_AUDIO_PLAY_OPERATION_PAUSED 0x12 +#define ASCQ_AUDIO_PLAY_OPERATION_COMPLETED 0x13 /* Tell RISC OS that we have a 4x CD-ROM drive (600kb/sec data, 706kb/sec raw). Not that it means anything */ -#define CDROM_SPEED 706 /* 0x2C2 */ +#define CDROM_SPEED 706 /* 0x2C2 */ -#define BUFFER_SIZE (256*1024) +#define BUFFER_SIZE (256 * 1024) -#define RW_DELAY (TIMER_USEC * 500) +#define RW_DELAY (TIMER_USEC * 500) /* Some generally useful CD-ROM information */ -#define CD_MINS 75 /* max. minutes per CD */ -#define CD_SECS 60 /* seconds per minute */ -#define CD_FRAMES 75 /* frames per second */ -#define CD_FRAMESIZE 2048 /* bytes per frame, "cooked" mode */ -#define CD_MAX_BYTES (CD_MINS * CD_SECS * CD_FRAMES * CD_FRAMESIZE) -#define CD_MAX_SECTORS (CD_MAX_BYTES / 512) +#define CD_MINS 75 /* max. minutes per CD */ +#define CD_SECS 60 /* seconds per minute */ +#define CD_FRAMES 75 /* frames per second */ +#define CD_FRAMESIZE 2048 /* bytes per frame, "cooked" mode */ +#define CD_MAX_BYTES (CD_MINS * CD_SECS * CD_FRAMES * CD_FRAMESIZE) +#define CD_MAX_SECTORS (CD_MAX_BYTES / 512) /* Event notification classes for GET EVENT STATUS NOTIFICATION */ -#define GESN_NO_EVENTS 0 -#define GESN_OPERATIONAL_CHANGE 1 -#define GESN_POWER_MANAGEMENT 2 -#define GESN_EXTERNAL_REQUEST 3 -#define GESN_MEDIA 4 -#define GESN_MULTIPLE_HOSTS 5 -#define GESN_DEVICE_BUSY 6 +#define GESN_NO_EVENTS 0 +#define GESN_OPERATIONAL_CHANGE 1 +#define GESN_POWER_MANAGEMENT 2 +#define GESN_EXTERNAL_REQUEST 3 +#define GESN_MEDIA 4 +#define GESN_MULTIPLE_HOSTS 5 +#define GESN_DEVICE_BUSY 6 /* Event codes for MEDIA event status notification */ -#define MEC_NO_CHANGE 0 -#define MEC_EJECT_REQUESTED 1 -#define MEC_NEW_MEDIA 2 -#define MEC_MEDIA_REMOVAL 3 /* only for media changers */ -#define MEC_MEDIA_CHANGED 4 /* only for media changers */ -#define MEC_BG_FORMAT_COMPLETED 5 /* MRW or DVD+RW b/g format completed */ -#define MEC_BG_FORMAT_RESTARTED 6 /* MRW or DVD+RW b/g format restarted */ -#define MS_TRAY_OPEN 1 -#define MS_MEDIA_PRESENT 2 +#define MEC_NO_CHANGE 0 +#define MEC_EJECT_REQUESTED 1 +#define MEC_NEW_MEDIA 2 +#define MEC_MEDIA_REMOVAL 3 /* only for media changers */ +#define MEC_MEDIA_CHANGED 4 /* only for media changers */ +#define MEC_BG_FORMAT_COMPLETED 5 /* MRW or DVD+RW b/g format completed */ +#define MEC_BG_FORMAT_RESTARTED 6 /* MRW or DVD+RW b/g format restarted */ +#define MS_TRAY_OPEN 1 +#define MS_MEDIA_PRESENT 2 /* * The MMC values are not IDE specific and might need to be moved @@ -221,85 +220,85 @@ */ /* Profile list from MMC-6 revision 1 table 91 */ -#define MMC_PROFILE_NONE 0x0000 -#define MMC_PROFILE_CD_ROM 0x0008 -#define MMC_PROFILE_CD_R 0x0009 -#define MMC_PROFILE_CD_RW 0x000A -#define MMC_PROFILE_DVD_ROM 0x0010 -#define MMC_PROFILE_DVD_R_SR 0x0011 -#define MMC_PROFILE_DVD_RAM 0x0012 -#define MMC_PROFILE_DVD_RW_RO 0x0013 -#define MMC_PROFILE_DVD_RW_SR 0x0014 -#define MMC_PROFILE_DVD_R_DL_SR 0x0015 -#define MMC_PROFILE_DVD_R_DL_JR 0x0016 -#define MMC_PROFILE_DVD_RW_DL 0x0017 -#define MMC_PROFILE_DVD_DDR 0x0018 -#define MMC_PROFILE_DVD_PLUS_RW 0x001A -#define MMC_PROFILE_DVD_PLUS_R 0x001B -#define MMC_PROFILE_DVD_PLUS_RW_DL 0x002A -#define MMC_PROFILE_DVD_PLUS_R_DL 0x002B -#define MMC_PROFILE_BD_ROM 0x0040 -#define MMC_PROFILE_BD_R_SRM 0x0041 -#define MMC_PROFILE_BD_R_RRM 0x0042 -#define MMC_PROFILE_BD_RE 0x0043 -#define MMC_PROFILE_HDDVD_ROM 0x0050 -#define MMC_PROFILE_HDDVD_R 0x0051 -#define MMC_PROFILE_HDDVD_RAM 0x0052 -#define MMC_PROFILE_HDDVD_RW 0x0053 -#define MMC_PROFILE_HDDVD_R_DL 0x0058 -#define MMC_PROFILE_HDDVD_RW_DL 0x005A -#define MMC_PROFILE_INVALID 0xFFFF +#define MMC_PROFILE_NONE 0x0000 +#define MMC_PROFILE_CD_ROM 0x0008 +#define MMC_PROFILE_CD_R 0x0009 +#define MMC_PROFILE_CD_RW 0x000A +#define MMC_PROFILE_DVD_ROM 0x0010 +#define MMC_PROFILE_DVD_R_SR 0x0011 +#define MMC_PROFILE_DVD_RAM 0x0012 +#define MMC_PROFILE_DVD_RW_RO 0x0013 +#define MMC_PROFILE_DVD_RW_SR 0x0014 +#define MMC_PROFILE_DVD_R_DL_SR 0x0015 +#define MMC_PROFILE_DVD_R_DL_JR 0x0016 +#define MMC_PROFILE_DVD_RW_DL 0x0017 +#define MMC_PROFILE_DVD_DDR 0x0018 +#define MMC_PROFILE_DVD_PLUS_RW 0x001A +#define MMC_PROFILE_DVD_PLUS_R 0x001B +#define MMC_PROFILE_DVD_PLUS_RW_DL 0x002A +#define MMC_PROFILE_DVD_PLUS_R_DL 0x002B +#define MMC_PROFILE_BD_ROM 0x0040 +#define MMC_PROFILE_BD_R_SRM 0x0041 +#define MMC_PROFILE_BD_R_RRM 0x0042 +#define MMC_PROFILE_BD_RE 0x0043 +#define MMC_PROFILE_HDDVD_ROM 0x0050 +#define MMC_PROFILE_HDDVD_R 0x0051 +#define MMC_PROFILE_HDDVD_RAM 0x0052 +#define MMC_PROFILE_HDDVD_RW 0x0053 +#define MMC_PROFILE_HDDVD_R_DL 0x0058 +#define MMC_PROFILE_HDDVD_RW_DL 0x005A +#define MMC_PROFILE_INVALID 0xFFFF -#define SCSI_ONLY 32 -#define ATAPI_ONLY 16 -#define IMPLEMENTED 8 -#define NONDATA 4 -#define CHECK_READY 2 -#define ALLOW_UA 1 +#define SCSI_ONLY 32 +#define ATAPI_ONLY 16 +#define IMPLEMENTED 8 +#define NONDATA 4 +#define CHECK_READY 2 +#define ALLOW_UA 1 -#define MSFtoLBA(m,s,f) ((((m * 60) + s) * 75) + f) +#define MSFtoLBA(m, s, f) ((((m * 60) + s) * 75) + f) -#define MSG_COMMAND_COMPLETE 0x00 +#define MSG_COMMAND_COMPLETE 0x00 -#define BUS_DBP 0x01 -#define BUS_SEL 0x02 -#define BUS_IO 0x04 -#define BUS_CD 0x08 -#define BUS_MSG 0x10 -#define BUS_REQ 0x20 -#define BUS_BSY 0x40 -#define BUS_RST 0x80 -#define BUS_ACK 0x200 -#define BUS_ATN 0x200 -#define BUS_ARB 0x8000 -#define BUS_SETDATA(val) ((uint32_t)val << 16) -#define BUS_GETDATA(val) ((val >> 16) & 0xff) -#define BUS_DATAMASK 0xff0000 +#define BUS_DBP 0x01 +#define BUS_SEL 0x02 +#define BUS_IO 0x04 +#define BUS_CD 0x08 +#define BUS_MSG 0x10 +#define BUS_REQ 0x20 +#define BUS_BSY 0x40 +#define BUS_RST 0x80 +#define BUS_ACK 0x200 +#define BUS_ATN 0x200 +#define BUS_ARB 0x8000 +#define BUS_SETDATA(val) ((uint32_t) val << 16) +#define BUS_GETDATA(val) ((val >> 16) & 0xff) +#define BUS_DATAMASK 0xff0000 -#define BUS_IDLE (1 << 31) +#define BUS_IDLE (1 << 31) -#define PHASE_IDLE 0x00 -#define PHASE_COMMAND 0x01 -#define PHASE_DATA_IN 0x02 -#define PHASE_DATA_OUT 0x03 -#define PHASE_DATA_IN_DMA 0x04 -#define PHASE_DATA_OUT_DMA 0x05 -#define PHASE_COMPLETE 0x06 -#define PHASE_ERROR 0x80 -#define PHASE_NONE 0xff +#define PHASE_IDLE 0x00 +#define PHASE_COMMAND 0x01 +#define PHASE_DATA_IN 0x02 +#define PHASE_DATA_OUT 0x03 +#define PHASE_DATA_IN_DMA 0x04 +#define PHASE_DATA_OUT_DMA 0x05 +#define PHASE_COMPLETE 0x06 +#define PHASE_ERROR 0x80 +#define PHASE_NONE 0xff -#define SCSI_PHASE_DATA_OUT 0 -#define SCSI_PHASE_DATA_IN BUS_IO -#define SCSI_PHASE_COMMAND BUS_CD -#define SCSI_PHASE_STATUS (BUS_CD | BUS_IO) -#define SCSI_PHASE_MESSAGE_OUT (BUS_MSG | BUS_CD) -#define SCSI_PHASE_MESSAGE_IN (BUS_MSG | BUS_CD | BUS_IO) +#define SCSI_PHASE_DATA_OUT 0 +#define SCSI_PHASE_DATA_IN BUS_IO +#define SCSI_PHASE_COMMAND BUS_CD +#define SCSI_PHASE_STATUS (BUS_CD | BUS_IO) +#define SCSI_PHASE_MESSAGE_OUT (BUS_MSG | BUS_CD) +#define SCSI_PHASE_MESSAGE_IN (BUS_MSG | BUS_CD | BUS_IO) -#define MODE_SELECT_PHASE_IDLE 0 -#define MODE_SELECT_PHASE_HEADER 1 -#define MODE_SELECT_PHASE_BLOCK_DESC 2 -#define MODE_SELECT_PHASE_PAGE_HEADER 3 -#define MODE_SELECT_PHASE_PAGE 4 +#define MODE_SELECT_PHASE_IDLE 0 +#define MODE_SELECT_PHASE_HEADER 1 +#define MODE_SELECT_PHASE_BLOCK_DESC 2 +#define MODE_SELECT_PHASE_PAGE_HEADER 3 +#define MODE_SELECT_PHASE_PAGE 4 typedef struct { uint8_t pages[0x40][0x40]; @@ -313,77 +312,77 @@ typedef struct scsi_common_s { void *p; uint8_t *temp_buffer, - atapi_cdb[16], /* This is atapi_cdb in ATAPI-supporting devices, - and pad in SCSI-only devices. */ - current_cdb[16], - sense[256]; + atapi_cdb[16], /* This is atapi_cdb in ATAPI-supporting devices, + and pad in SCSI-only devices. */ + current_cdb[16], + sense[256]; uint8_t status, phase, - error, id, - features, cur_lun, - pad0, pad1; + error, id, + features, cur_lun, + pad0, pad1; uint16_t request_length, max_transfer_len; int requested_blocks, packet_status, - total_length, do_page_save, - unit_attention, request_pos, - old_len, media_status; + total_length, do_page_save, + unit_attention, request_pos, + old_len, media_status; uint32_t sector_pos, sector_len, - packet_len, pos; + packet_len, pos; double callback; } scsi_common_t; typedef struct { - int32_t buffer_length; + int32_t buffer_length; - uint8_t status, phase; - uint16_t type; + uint8_t status, phase; + uint16_t type; scsi_common_t *sc; - void (*command)(scsi_common_t *sc, uint8_t *cdb); - void (*request_sense)(scsi_common_t *sc, uint8_t *buffer, uint8_t alloc_length); - void (*reset)(scsi_common_t *sc); - uint8_t (*phase_data_out)(scsi_common_t *sc); - void (*command_stop)(scsi_common_t *sc); + void (*command)(scsi_common_t *sc, uint8_t *cdb); + void (*request_sense)(scsi_common_t *sc, uint8_t *buffer, uint8_t alloc_length); + void (*reset)(scsi_common_t *sc); + uint8_t (*phase_data_out)(scsi_common_t *sc); + void (*command_stop)(scsi_common_t *sc); } scsi_device_t; /* These are based on the INQUIRY values. */ -#define SCSI_NONE 0x0060 -#define SCSI_FIXED_DISK 0x0000 -#define SCSI_REMOVABLE_DISK 0x8000 +#define SCSI_NONE 0x0060 +#define SCSI_FIXED_DISK 0x0000 +#define SCSI_REMOVABLE_DISK 0x8000 #define SCSI_REMOVABLE_CDROM 0x8005 #ifdef EMU_SCSI_H -extern scsi_device_t scsi_devices[SCSI_BUS_MAX][SCSI_ID_MAX]; +extern scsi_device_t scsi_devices[SCSI_BUS_MAX][SCSI_ID_MAX]; #endif /* EMU_SCSI_H */ -extern int cdrom_add_error_and_subchannel(uint8_t *b, int real_sector_type); -extern int cdrom_LBAtoMSF_accurate(void); +extern int cdrom_add_error_and_subchannel(uint8_t *b, int real_sector_type); +extern int cdrom_LBAtoMSF_accurate(void); -extern int mode_select_init(uint8_t command, uint16_t pl_length, uint8_t do_save); -extern int mode_select_terminate(int force); -extern int mode_select_write(uint8_t val); +extern int mode_select_init(uint8_t command, uint16_t pl_length, uint8_t do_save); +extern int mode_select_terminate(int force); +extern int mode_select_write(uint8_t val); -extern uint8_t *scsi_device_sense(scsi_device_t *dev); -extern double scsi_device_get_callback(scsi_device_t *dev); -extern void scsi_device_request_sense(scsi_device_t *dev, uint8_t *buffer, - uint8_t alloc_length); -extern void scsi_device_reset(scsi_device_t *dev); -extern int scsi_device_present(scsi_device_t *dev); -extern int scsi_device_valid(scsi_device_t *dev); -extern int scsi_device_cdb_length(scsi_device_t *dev); -extern void scsi_device_command_phase0(scsi_device_t *dev, uint8_t *cdb); -extern void scsi_device_command_phase1(scsi_device_t *dev); -extern void scsi_device_command_stop(scsi_device_t *dev); -extern void scsi_device_identify(scsi_device_t *dev, uint8_t lun); -extern void scsi_device_close_all(void); -extern void scsi_device_init(void); +extern uint8_t *scsi_device_sense(scsi_device_t *dev); +extern double scsi_device_get_callback(scsi_device_t *dev); +extern void scsi_device_request_sense(scsi_device_t *dev, uint8_t *buffer, + uint8_t alloc_length); +extern void scsi_device_reset(scsi_device_t *dev); +extern int scsi_device_present(scsi_device_t *dev); +extern int scsi_device_valid(scsi_device_t *dev); +extern int scsi_device_cdb_length(scsi_device_t *dev); +extern void scsi_device_command_phase0(scsi_device_t *dev, uint8_t *cdb); +extern void scsi_device_command_phase1(scsi_device_t *dev); +extern void scsi_device_command_stop(scsi_device_t *dev); +extern void scsi_device_identify(scsi_device_t *dev, uint8_t lun); +extern void scsi_device_close_all(void); +extern void scsi_device_init(void); -extern void scsi_reset(void); -extern uint8_t scsi_get_bus(void); +extern void scsi_reset(void); +extern uint8_t scsi_get_bus(void); -#endif /*SCSI_DEVICE_H*/ +#endif /*SCSI_DEVICE_H*/ diff --git a/src/include/86box/scsi_disk.h b/src/include/86box/scsi_disk.h index bb782a098..94171e7ac 100644 --- a/src/include/86box/scsi_disk.h +++ b/src/include/86box/scsi_disk.h @@ -13,7 +13,7 @@ */ #ifndef SCSI_DISK_H -# define SCSI_DISK_H +#define SCSI_DISK_H typedef struct { mode_sense_pages_t ms_pages_saved; @@ -21,34 +21,32 @@ typedef struct { hard_disk_t *drv; uint8_t *temp_buffer, - pad[16], /* This is atapi_cdb in ATAPI-supporting devices, - and pad in SCSI-only devices. */ - current_cdb[16], - sense[256]; + pad[16], /* This is atapi_cdb in ATAPI-supporting devices, + and pad in SCSI-only devices. */ + current_cdb[16], + sense[256]; uint8_t status, phase, - error, id, - pad0, cur_lun, - pad1, pad2; + error, id, + pad0, cur_lun, + pad1, pad2; uint16_t request_length, pad4; int requested_blocks, packet_status, - total_length, do_page_save, - unit_attention, pad5, - pad6, pad7; + total_length, do_page_save, + unit_attention, pad5, + pad6, pad7; uint32_t sector_pos, sector_len, - packet_len, pos; + packet_len, pos; double callback; } scsi_disk_t; - extern scsi_disk_t *scsi_disk[HDD_NUM]; - -extern void scsi_disk_hard_reset(void); -extern void scsi_disk_close(void); +extern void scsi_disk_hard_reset(void); +extern void scsi_disk_close(void); #endif /*SCSI_DISK_H*/ diff --git a/src/include/86box/scsi_ncr5380.h b/src/include/86box/scsi_ncr5380.h index 5f6ded14b..045e6bbe7 100644 --- a/src/include/86box/scsi_ncr5380.h +++ b/src/include/86box/scsi_ncr5380.h @@ -22,7 +22,7 @@ */ #ifndef SCSI_NCR5380_H -# define SCSI_NCR5380_H +#define SCSI_NCR5380_H extern const device_t scsi_lcs6821n_device; extern const device_t scsi_rt1000b_device; @@ -34,4 +34,4 @@ extern const device_t scsi_ls2000_device; extern const device_t scsi_scsiat_device; #endif -#endif /*SCSI_NCR5380_H*/ +#endif /*SCSI_NCR5380_H*/ diff --git a/src/include/86box/scsi_ncr53c8xx.h b/src/include/86box/scsi_ncr53c8xx.h index ee5dcb58f..37c5a72bf 100644 --- a/src/include/86box/scsi_ncr53c8xx.h +++ b/src/include/86box/scsi_ncr53c8xx.h @@ -23,7 +23,7 @@ */ #ifndef SCSI_NCR53C8XX_H -# define SCSI_NCR53C8XX_H +#define SCSI_NCR53C8XX_H extern const device_t ncr53c810_pci_device; extern const device_t ncr53c810_onboard_pci_device; @@ -33,5 +33,4 @@ extern const device_t ncr53c825a_pci_device; extern const device_t ncr53c860_pci_device; extern const device_t ncr53c875_pci_device; - -#endif /*SCSI_NCR53C8XX_H*/ +#endif /*SCSI_NCR53C8XX_H*/ diff --git a/src/include/86box/scsi_pcscsi.h b/src/include/86box/scsi_pcscsi.h index e188f8f0e..d0b5baf04 100644 --- a/src/include/86box/scsi_pcscsi.h +++ b/src/include/86box/scsi_pcscsi.h @@ -23,9 +23,9 @@ */ #ifndef SCSI_PCSCSI_H -# define SCSI_PCSCSI_H +#define SCSI_PCSCSI_H extern const device_t dc390_pci_device; extern const device_t ncr53c90_mca_device; -#endif /*SCSI_BUSLOGIC_H*/ +#endif /*SCSI_BUSLOGIC_H*/ diff --git a/src/include/86box/scsi_spock.h b/src/include/86box/scsi_spock.h index 7f9c24b78..3dae005db 100644 --- a/src/include/86box/scsi_spock.h +++ b/src/include/86box/scsi_spock.h @@ -19,8 +19,8 @@ */ #ifndef SCSI_SPOCK_H -# define SCSI_SPOCK_H +#define SCSI_SPOCK_H extern const device_t spock_device; -#endif /*SCSI_SPOCK_H*/ +#endif /*SCSI_SPOCK_H*/ diff --git a/src/include/86box/scsi_x54x.h b/src/include/86box/scsi_x54x.h index 468436a34..68a31e651 100644 --- a/src/include/86box/scsi_x54x.h +++ b/src/include/86box/scsi_x54x.h @@ -22,43 +22,40 @@ */ #ifndef SCSI_X54X_H -# define SCSI_X54X_H +#define SCSI_X54X_H -#define SCSI_DELAY_TM 1 /* was 50 */ - - -#define ROM_SIZE 16384 /* one ROM is 16K */ -#define NVR_SIZE 256 /* size of NVR */ +#define SCSI_DELAY_TM 1 /* was 50 */ +#define ROM_SIZE 16384 /* one ROM is 16K */ +#define NVR_SIZE 256 /* size of NVR */ /* EEPROM map and bit definitions. */ -#define EE0_HOSTID 0x07 /* EE(0) [2:0] */ -#define EE0_ALTFLOP 0x80 /* EE(0) [7] FDC at 370h */ -#define EE1_IRQCH 0x07 /* EE(1) [3:0] */ -#define EE1_DMACH 0x70 /* EE(1) [7:4] */ -#define EE2_RMVOK 0x01 /* EE(2) [0] Support removable disks */ -#define EE2_HABIOS 0x02 /* EE(2) [1] HA Bios Space Reserved */ -#define EE2_INT19 0x04 /* EE(2) [2] HA Bios Controls INT19 */ -#define EE2_DYNSCAN 0x08 /* EE(2) [3] Dynamically scan bus */ -#define EE2_TWODRV 0x10 /* EE(2) [4] Allow more than 2 drives */ -#define EE2_SEEKRET 0x20 /* EE(2) [5] Immediate return on seek */ -#define EE2_EXT1G 0x80 /* EE(2) [7] Extended Translation >1GB */ -#define EE3_SPEED 0x00 /* EE(3) [7:0] DMA Speed */ -#define SPEED_33 0xFF -#define SPEED_50 0x00 -#define SPEED_56 0x04 -#define SPEED_67 0x01 -#define SPEED_80 0x02 -#define SPEED_10 0x03 -#define EE4_FLOPTOK 0x80 /* EE(4) [7] Support Flopticals */ -#define EE6_PARITY 0x01 /* EE(6) [0] parity check enable */ -#define EE6_TERM 0x02 /* EE(6) [1] host term enable */ -#define EE6_RSTBUS 0x04 /* EE(6) [2] reset SCSI bus on boot */ -#define EEE_SYNC 0x01 /* EE(E) [0] Enable Sync Negotiation */ -#define EEE_DISCON 0x02 /* EE(E) [1] Enable Disconnection */ -#define EEE_FAST 0x04 /* EE(E) [2] Enable FAST SCSI */ -#define EEE_START 0x08 /* EE(E) [3] Enable Start Unit */ - +#define EE0_HOSTID 0x07 /* EE(0) [2:0] */ +#define EE0_ALTFLOP 0x80 /* EE(0) [7] FDC at 370h */ +#define EE1_IRQCH 0x07 /* EE(1) [3:0] */ +#define EE1_DMACH 0x70 /* EE(1) [7:4] */ +#define EE2_RMVOK 0x01 /* EE(2) [0] Support removable disks */ +#define EE2_HABIOS 0x02 /* EE(2) [1] HA Bios Space Reserved */ +#define EE2_INT19 0x04 /* EE(2) [2] HA Bios Controls INT19 */ +#define EE2_DYNSCAN 0x08 /* EE(2) [3] Dynamically scan bus */ +#define EE2_TWODRV 0x10 /* EE(2) [4] Allow more than 2 drives */ +#define EE2_SEEKRET 0x20 /* EE(2) [5] Immediate return on seek */ +#define EE2_EXT1G 0x80 /* EE(2) [7] Extended Translation >1GB */ +#define EE3_SPEED 0x00 /* EE(3) [7:0] DMA Speed */ +#define SPEED_33 0xFF +#define SPEED_50 0x00 +#define SPEED_56 0x04 +#define SPEED_67 0x01 +#define SPEED_80 0x02 +#define SPEED_10 0x03 +#define EE4_FLOPTOK 0x80 /* EE(4) [7] Support Flopticals */ +#define EE6_PARITY 0x01 /* EE(6) [0] parity check enable */ +#define EE6_TERM 0x02 /* EE(6) [1] host term enable */ +#define EE6_RSTBUS 0x04 /* EE(6) [2] reset SCSI bus on boot */ +#define EEE_SYNC 0x01 /* EE(E) [0] Enable Sync Negotiation */ +#define EEE_DISCON 0x02 /* EE(E) [1] Enable Disconnection */ +#define EEE_FAST 0x04 /* EE(E) [2] Enable FAST SCSI */ +#define EEE_START 0x08 /* EE(E) [3] Enable Start Unit */ /* * Host Adapter I/O ports. @@ -76,66 +73,70 @@ */ /* WRITE CONTROL commands. */ -#define CTRL_HRST 0x80 /* Hard reset */ -#define CTRL_SRST 0x40 /* Soft reset */ -#define CTRL_IRST 0x20 /* interrupt reset */ -#define CTRL_SCRST 0x10 /* SCSI bus reset */ +#define CTRL_HRST 0x80 /* Hard reset */ +#define CTRL_SRST 0x40 /* Soft reset */ +#define CTRL_IRST 0x20 /* interrupt reset */ +#define CTRL_SCRST 0x10 /* SCSI bus reset */ /* READ STATUS. */ -#define STAT_STST 0x80 /* self-test in progress */ -#define STAT_DFAIL 0x40 /* internal diagnostic failure */ -#define STAT_INIT 0x20 /* mailbox initialization required */ -#define STAT_IDLE 0x10 /* HBA is idle */ -#define STAT_CDFULL 0x08 /* Command/Data output port is full */ -#define STAT_DFULL 0x04 /* Data input port is full */ -#define STAT_INVCMD 0x01 /* Invalid command */ +#define STAT_STST 0x80 /* self-test in progress */ +#define STAT_DFAIL 0x40 /* internal diagnostic failure */ +#define STAT_INIT 0x20 /* mailbox initialization required */ +#define STAT_IDLE 0x10 /* HBA is idle */ +#define STAT_CDFULL 0x08 /* Command/Data output port is full */ +#define STAT_DFULL 0x04 /* Data input port is full */ +#define STAT_INVCMD 0x01 /* Invalid command */ /* READ/WRITE DATA. */ -#define CMD_NOP 0x00 /* No operation */ -#define CMD_MBINIT 0x01 /* mailbox initialization */ -#define CMD_START_SCSI 0x02 /* Start SCSI command */ -#define CMD_BIOSCMD 0x03 /* Execute ROM BIOS command */ -#define CMD_INQUIRY 0x04 /* Adapter inquiry */ -#define CMD_EMBOI 0x05 /* enable Mailbox Out Interrupt */ -#define CMD_SELTIMEOUT 0x06 /* Set SEL timeout */ -#define CMD_BUSON_TIME 0x07 /* set bus-On time */ -#define CMD_BUSOFF_TIME 0x08 /* set bus-off time */ -#define CMD_DMASPEED 0x09 /* set ISA DMA speed */ -#define CMD_RETDEVS 0x0A /* return installed devices */ -#define CMD_RETCONF 0x0B /* return configuration data */ -#define CMD_TARGET 0x0C /* set HBA to target mode */ -#define CMD_RETSETUP 0x0D /* return setup data */ -#define CMD_WRITE_CH2 0x1A /* write channel 2 buffer */ -#define CMD_READ_CH2 0x1B /* read channel 2 buffer */ -#define CMD_ECHO 0x1F /* ECHO command data */ -#define CMD_OPTIONS 0x21 /* set adapter options */ +#define CMD_NOP 0x00 /* No operation */ +#define CMD_MBINIT 0x01 /* mailbox initialization */ +#define CMD_START_SCSI 0x02 /* Start SCSI command */ +#define CMD_BIOSCMD 0x03 /* Execute ROM BIOS command */ +#define CMD_INQUIRY 0x04 /* Adapter inquiry */ +#define CMD_EMBOI 0x05 /* enable Mailbox Out Interrupt */ +#define CMD_SELTIMEOUT 0x06 /* Set SEL timeout */ +#define CMD_BUSON_TIME 0x07 /* set bus-On time */ +#define CMD_BUSOFF_TIME 0x08 /* set bus-off time */ +#define CMD_DMASPEED 0x09 /* set ISA DMA speed */ +#define CMD_RETDEVS 0x0A /* return installed devices */ +#define CMD_RETCONF 0x0B /* return configuration data */ +#define CMD_TARGET 0x0C /* set HBA to target mode */ +#define CMD_RETSETUP 0x0D /* return setup data */ +#define CMD_WRITE_CH2 0x1A /* write channel 2 buffer */ +#define CMD_READ_CH2 0x1B /* read channel 2 buffer */ +#define CMD_ECHO 0x1F /* ECHO command data */ +#define CMD_OPTIONS 0x21 /* set adapter options */ /* READ INTERRUPT STATUS. */ -#define INTR_ANY 0x80 /* any interrupt */ -#define INTR_SRCD 0x08 /* SCSI reset detected */ -#define INTR_HACC 0x04 /* HA command complete */ -#define INTR_MBOA 0x02 /* MBO empty */ -#define INTR_MBIF 0x01 /* MBI full */ +#define INTR_ANY 0x80 /* any interrupt */ +#define INTR_SRCD 0x08 /* SCSI reset detected */ +#define INTR_HACC 0x04 /* HA command complete */ +#define INTR_MBOA 0x02 /* MBO empty */ +#define INTR_MBIF 0x01 /* MBI full */ - -#define ADDR_TO_U32(x) (((x).hi<<16)|((x).mid<<8)|((x).lo&0xFF)) -#define U32_TO_ADDR(a,x) do {(a).hi=(x)>>16;(a).mid=(x)>>8;(a).lo=(x)&0xFF;}while(0) +#define ADDR_TO_U32(x) (((x).hi << 16) | ((x).mid << 8) | ((x).lo & 0xFF)) +#define U32_TO_ADDR(a, x) \ + do { \ + (a).hi = (x) >> 16; \ + (a).mid = (x) >> 8; \ + (a).lo = (x) &0xFF; \ + } while (0) /* * Mailbox Definitions. * * Mailbox Out (MBO) command values. */ -#define MBO_FREE 0x00 -#define MBO_START 0x01 -#define MBO_ABORT 0x02 +#define MBO_FREE 0x00 +#define MBO_START 0x01 +#define MBO_ABORT 0x02 /* Mailbox In (MBI) status values. */ -#define MBI_FREE 0x00 -#define MBI_SUCCESS 0x01 -#define MBI_ABORT 0x02 -#define MBI_NOT_FOUND 0x03 -#define MBI_ERROR 0x04 +#define MBI_FREE 0x00 +#define MBI_SUCCESS 0x01 +#define MBI_ABORT 0x02 +#define MBI_NOT_FOUND 0x03 +#define MBI_ERROR 0x04 /* * @@ -146,46 +147,45 @@ * */ /* Byte 0 Command Control Block Operation Code */ -#define SCSI_INITIATOR_COMMAND 0x00 -#define TARGET_MODE_COMMAND 0x01 -#define SCATTER_GATHER_COMMAND 0x02 -#define SCSI_INITIATOR_COMMAND_RES 0x03 -#define SCATTER_GATHER_COMMAND_RES 0x04 -#define BUS_RESET 0x81 +#define SCSI_INITIATOR_COMMAND 0x00 +#define TARGET_MODE_COMMAND 0x01 +#define SCATTER_GATHER_COMMAND 0x02 +#define SCSI_INITIATOR_COMMAND_RES 0x03 +#define SCATTER_GATHER_COMMAND_RES 0x04 +#define BUS_RESET 0x81 /* Byte 1 Address and Direction Control */ -#define CCB_TARGET_ID_SHIFT 0x06 /* CCB Op Code = 00, 02 */ -#define CCB_INITIATOR_ID_SHIFT 0x06 /* CCB Op Code = 01 */ -#define CCB_DATA_XFER_IN 0x01 -#define CCB_DATA_XFER_OUT 0x02 -#define CCB_LUN_MASK 0x07 /* Logical Unit Number */ +#define CCB_TARGET_ID_SHIFT 0x06 /* CCB Op Code = 00, 02 */ +#define CCB_INITIATOR_ID_SHIFT 0x06 /* CCB Op Code = 01 */ +#define CCB_DATA_XFER_IN 0x01 +#define CCB_DATA_XFER_OUT 0x02 +#define CCB_LUN_MASK 0x07 /* Logical Unit Number */ /* Byte 2 SCSI_Command_Length - Length of SCSI CDB Byte 3 Request Sense Allocation Length */ -#define FOURTEEN_BYTES 0x00 /* Request Sense Buffer size */ -#define NO_AUTO_REQUEST_SENSE 0x01 /* No Request Sense Buffer */ +#define FOURTEEN_BYTES 0x00 /* Request Sense Buffer size */ +#define NO_AUTO_REQUEST_SENSE 0x01 /* No Request Sense Buffer */ /* Bytes 4, 5 and 6 Data Length - Data transfer byte count */ /* Bytes 7, 8 and 9 Data Pointer - SGD List or Data Buffer */ /* Bytes 10, 11 and 12 Link Pointer - Next CCB in Linked List */ /* Byte 13 Command Link ID - TBD (I don't know yet) */ /* Byte 14 Host Status - Host Adapter status */ -#define CCB_COMPLETE 0x00 /* CCB completed without error */ -#define CCB_LINKED_COMPLETE 0x0A /* Linked command completed */ -#define CCB_LINKED_COMPLETE_INT 0x0B /* Linked complete with intr */ -#define CCB_SELECTION_TIMEOUT 0x11 /* Set SCSI selection timed out */ -#define CCB_DATA_OVER_UNDER_RUN 0x12 -#define CCB_UNEXPECTED_BUS_FREE 0x13 /* Trg dropped SCSI BSY */ -#define CCB_PHASE_SEQUENCE_FAIL 0x14 /* Trg bus phase sequence fail */ -#define CCB_BAD_MBO_COMMAND 0x15 /* MBO command not 0, 1 or 2 */ -#define CCB_INVALID_OP_CODE 0x16 /* CCB invalid operation code */ -#define CCB_BAD_LINKED_LUN 0x17 /* Linked CCB LUN diff from 1st */ -#define CCB_INVALID_DIRECTION 0x18 /* Invalid target direction */ -#define CCB_DUPLICATE_CCB 0x19 /* Duplicate CCB */ -#define CCB_INVALID_CCB 0x1A /* Invalid CCB - bad parameter */ +#define CCB_COMPLETE 0x00 /* CCB completed without error */ +#define CCB_LINKED_COMPLETE 0x0A /* Linked command completed */ +#define CCB_LINKED_COMPLETE_INT 0x0B /* Linked complete with intr */ +#define CCB_SELECTION_TIMEOUT 0x11 /* Set SCSI selection timed out */ +#define CCB_DATA_OVER_UNDER_RUN 0x12 +#define CCB_UNEXPECTED_BUS_FREE 0x13 /* Trg dropped SCSI BSY */ +#define CCB_PHASE_SEQUENCE_FAIL 0x14 /* Trg bus phase sequence fail */ +#define CCB_BAD_MBO_COMMAND 0x15 /* MBO command not 0, 1 or 2 */ +#define CCB_INVALID_OP_CODE 0x16 /* CCB invalid operation code */ +#define CCB_BAD_LINKED_LUN 0x17 /* Linked CCB LUN diff from 1st */ +#define CCB_INVALID_DIRECTION 0x18 /* Invalid target direction */ +#define CCB_DUPLICATE_CCB 0x19 /* Duplicate CCB */ +#define CCB_INVALID_CCB 0x1A /* Invalid CCB - bad parameter */ -#define lba32_blk(p) ((uint32_t)(p->u.lba.lba0<<24) | (p->u.lba.lba1<<16) | \ - (p->u.lba.lba2<<8) | p->u.lba.lba3) +#define lba32_blk(p) ((uint32_t) (p->u.lba.lba0 << 24) | (p->u.lba.lba1 << 16) | (p->u.lba.lba2 << 8) | p->u.lba.lba3) /* * @@ -193,10 +193,9 @@ * * Adapter limits */ -#define MAX_SG_DESCRIPTORS 32 /* Always make the array 32 elements long, if less are used, that's not an issue. */ +#define MAX_SG_DESCRIPTORS 32 /* Always make the array 32 elements long, if less are used, that's not an issue. */ - -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { uint8_t hi; uint8_t mid; @@ -205,49 +204,49 @@ typedef struct { /* Structure for the INQUIRE_SETUP_INFORMATION reply. */ typedef struct { - uint8_t uOffset :4, - uTransferPeriod :3, - fSynchronous :1; + uint8_t uOffset : 4, + uTransferPeriod : 3, + fSynchronous : 1; } ReplyInquireSetupInformationSynchronousValue; typedef struct { - uint8_t fSynchronousInitiationEnabled :1, - fParityCheckingEnabled :1, - uReserved1 :6; - uint8_t uBusTransferRate; - uint8_t uPreemptTimeOnBus; - uint8_t uTimeOffBus; - uint8_t cMailbox; - addr24 MailboxAddress; + uint8_t fSynchronousInitiationEnabled : 1, + fParityCheckingEnabled : 1, + uReserved1 : 6; + uint8_t uBusTransferRate; + uint8_t uPreemptTimeOnBus; + uint8_t uTimeOffBus; + uint8_t cMailbox; + addr24 MailboxAddress; ReplyInquireSetupInformationSynchronousValue SynchronousValuesId0To7[8]; - uint8_t uDisconnectPermittedId0To7; - uint8_t VendorSpecificData[28]; + uint8_t uDisconnectPermittedId0To7; + uint8_t VendorSpecificData[28]; } ReplyInquireSetupInformation; typedef struct { - uint8_t Count; - addr24 Address; + uint8_t Count; + addr24 Address; } MailboxInit_t; typedef struct { - uint8_t CmdStatus; - addr24 CCBPointer; + uint8_t CmdStatus; + addr24 CCBPointer; } Mailbox_t; typedef struct { - uint32_t CCBPointer; + uint32_t CCBPointer; union { - struct { - uint8_t Reserved[3]; - uint8_t ActionCode; - } out; - struct { - uint8_t HostStatus; - uint8_t TargetStatus; - uint8_t Reserved; - uint8_t CompletionCode; - } in; - } u; + struct { + uint8_t Reserved[3]; + uint8_t ActionCode; + } out; + struct { + uint8_t HostStatus; + uint8_t TargetStatus; + uint8_t Reserved; + uint8_t CompletionCode; + } in; + } u; } Mailbox32_t; /* Byte 15 Target Status @@ -257,258 +256,259 @@ typedef struct { Bytes 18 through 18+n-1, where n=size of CDB Command Descriptor Block */ typedef struct { - uint8_t Opcode; - uint8_t Reserved1 :3, - ControlByte :2, - TagQueued :1, - QueueTag :2; - uint8_t CdbLength; - uint8_t RequestSenseLength; - uint32_t DataLength; - uint32_t DataPointer; - uint8_t Reserved2[2]; - uint8_t HostStatus; - uint8_t TargetStatus; - uint8_t Id; - uint8_t Lun :5, - LegacyTagEnable :1, - LegacyQueueTag :2; - uint8_t Cdb[12]; - uint8_t Reserved3[6]; - uint32_t SensePointer; + uint8_t Opcode; + uint8_t Reserved1 : 3, + ControlByte : 2, + TagQueued : 1, + QueueTag : 2; + uint8_t CdbLength; + uint8_t RequestSenseLength; + uint32_t DataLength; + uint32_t DataPointer; + uint8_t Reserved2[2]; + uint8_t HostStatus; + uint8_t TargetStatus; + uint8_t Id; + uint8_t Lun : 5, + LegacyTagEnable : 1, + LegacyQueueTag : 2; + uint8_t Cdb[12]; + uint8_t Reserved3[6]; + uint32_t SensePointer; } CCB32; typedef struct { - uint8_t Opcode; - uint8_t Lun :3, - ControlByte :2, - Id :3; - uint8_t CdbLength; - uint8_t RequestSenseLength; - addr24 DataLength; - addr24 DataPointer; - addr24 LinkPointer; - uint8_t LinkId; - uint8_t HostStatus; - uint8_t TargetStatus; - uint8_t Reserved[2]; - uint8_t Cdb[12]; + uint8_t Opcode; + uint8_t Lun : 3, + ControlByte : 2, + Id : 3; + uint8_t CdbLength; + uint8_t RequestSenseLength; + addr24 DataLength; + addr24 DataPointer; + addr24 LinkPointer; + uint8_t LinkId; + uint8_t HostStatus; + uint8_t TargetStatus; + uint8_t Reserved[2]; + uint8_t Cdb[12]; } CCB; typedef struct { - uint8_t Opcode; - uint8_t Pad1 :3, - ControlByte :2, - Pad2 :3; - uint8_t CdbLength; - uint8_t RequestSenseLength; - uint8_t Pad3[9]; - uint8_t CompletionCode; /* Only used by the 1542C/CF(/CP?) BIOS mailboxes */ - uint8_t HostStatus; - uint8_t TargetStatus; - uint8_t Pad4[2]; - uint8_t Cdb[12]; + uint8_t Opcode; + uint8_t Pad1 : 3, + ControlByte : 2, + Pad2 : 3; + uint8_t CdbLength; + uint8_t RequestSenseLength; + uint8_t Pad3[9]; + uint8_t CompletionCode; /* Only used by the 1542C/CF(/CP?) BIOS mailboxes */ + uint8_t HostStatus; + uint8_t TargetStatus; + uint8_t Pad4[2]; + uint8_t Cdb[12]; } CCBC; typedef union { - CCB32 new; - CCB old; - CCBC common; + CCB32 new; + CCB old; + CCBC common; } CCBU; typedef struct { - CCBU CmdBlock; - uint8_t *RequestSenseBuffer; - uint32_t CCBPointer; - int Is24bit; - uint8_t TargetID, - LUN, - HostStatus, - TargetStatus, - MailboxCompletionCode; + CCBU CmdBlock; + uint8_t *RequestSenseBuffer; + uint32_t CCBPointer; + int Is24bit; + uint8_t TargetID, + LUN, + HostStatus, + TargetStatus, + MailboxCompletionCode; } Req_t; typedef struct { - uint8_t command; - uint8_t lun:3, - reserved:2, - id:3; - union { - struct { - uint16_t cyl; - uint8_t head; - uint8_t sec; - } chs; - struct { - uint8_t lba0; /* MSB */ - uint8_t lba1; - uint8_t lba2; - uint8_t lba3; /* LSB */ - } lba; - } u; - uint8_t secount; - addr24 dma_address; + uint8_t command; + uint8_t lun : 3, + reserved : 2, + id : 3; + union { + struct { + uint16_t cyl; + uint8_t head; + uint8_t sec; + } chs; + struct { + uint8_t lba0; /* MSB */ + uint8_t lba1; + uint8_t lba2; + uint8_t lba3; /* LSB */ + } lba; + } u; + uint8_t secount; + addr24 dma_address; } BIOSCMD; typedef struct { - uint32_t Segment; - uint32_t SegmentPointer; + uint32_t Segment; + uint32_t SegmentPointer; } SGE32; typedef struct { - addr24 Segment; - addr24 SegmentPointer; + addr24 Segment; + addr24 SegmentPointer; } SGE; #pragma pack(pop) -#define X54X_CDROM_BOOT 1 -#define X54X_32BIT 2 -#define X54X_LBA_BIOS 4 -#define X54X_INT_GEOM_WRITABLE 8 -#define X54X_MBX_24BIT 16 -#define X54X_ISAPNP 32 +#define X54X_CDROM_BOOT 1 +#define X54X_32BIT 2 +#define X54X_LBA_BIOS 4 +#define X54X_INT_GEOM_WRITABLE 8 +#define X54X_MBX_24BIT 16 +#define X54X_ISAPNP 32 typedef struct { /* 32 bytes */ - char vendor[16], /* name of device vendor */ - name[16]; /* name of device */ + char vendor[16], /* name of device vendor */ + name[16]; /* name of device */ /* 24 bytes */ - int8_t type, /* type of device */ - IrqEnabled, Irq, - DmaChannel, - HostID; + int8_t type, /* type of device */ + IrqEnabled, Irq, + DmaChannel, + HostID; - uint8_t callback_phase :4, - callback_sub_phase :4, - scsi_cmd_phase, bus, - sync, - parity, shram_mode, - Geometry, Control, - Command, CmdParam, - BusOnTime, BusOffTime, - ATBusSpeed, setup_info_len, - max_id, pci_slot, - temp_cdb[12]; + uint8_t callback_phase : 4, + callback_sub_phase : 4, + scsi_cmd_phase, bus, + sync, + parity, shram_mode, + Geometry, Control, + Command, CmdParam, + BusOnTime, BusOffTime, + ATBusSpeed, setup_info_len, + max_id, pci_slot, + temp_cdb[12]; - volatile uint8_t /* for multi-threading, keep */ - Status, Interrupt, /* these volatile */ - MailboxIsBIOS, ToRaise, - flags; + volatile uint8_t /* for multi-threading, keep */ + Status, + Interrupt, /* these volatile */ + MailboxIsBIOS, ToRaise, + flags; /* 65928 bytes */ - uint8_t pos_regs[8], /* MCA */ - CmdBuf[128], - DataBuf[65536], - shadow_ram[128], - dma_buffer[128], - cmd_33_buf[4096]; + uint8_t pos_regs[8], /* MCA */ + CmdBuf[128], + DataBuf[65536], + shadow_ram[128], + dma_buffer[128], + cmd_33_buf[4096]; /* 16 bytes */ - char *fw_rev; /* The 4 bytes of the revision command information + 2 extra bytes for BusLogic */ + char *fw_rev; /* The 4 bytes of the revision command information + 2 extra bytes for BusLogic */ - uint8_t *rom1, /* main BIOS image */ - *rom2, /* SCSI-Select image */ - *nvr; /* EEPROM buffer */ + uint8_t *rom1, /* main BIOS image */ + *rom2, /* SCSI-Select image */ + *nvr; /* EEPROM buffer */ /* 6 words = 12 bytes */ - uint16_t DataReply, DataReplyLeft, - rom_ioaddr, /* offset in BIOS of I/O addr */ - rom_shram, /* index to shared RAM */ - rom_shramsz, /* size of shared RAM */ - rom_fwhigh, /* offset in BIOS of ver ID */ - pnp_len, /* length of the PnP ROM */ - pnp_offset, /* offset in the microcode ROM of the PnP ROM */ - cmd_33_len, /* length of the SCSISelect code decompressor program */ - cmd_33_offset; /* offset in the microcode ROM of the SCSISelect code decompressor program */ + uint16_t DataReply, DataReplyLeft, + rom_ioaddr, /* offset in BIOS of I/O addr */ + rom_shram, /* index to shared RAM */ + rom_shramsz, /* size of shared RAM */ + rom_fwhigh, /* offset in BIOS of ver ID */ + pnp_len, /* length of the PnP ROM */ + pnp_offset, /* offset in the microcode ROM of the PnP ROM */ + cmd_33_len, /* length of the SCSISelect code decompressor program */ + cmd_33_offset; /* offset in the microcode ROM of the SCSISelect code decompressor program */ /* 16 + 20 + 52 = 88 bytes */ volatile int - MailboxOutInterrupts, - PendingInterrupt, Lock, - target_data_len, pad0; + MailboxOutInterrupts, + PendingInterrupt, Lock, + target_data_len, pad0; - uint32_t Base, fdc_address, rom_addr, /* address of BIOS ROM */ - CmdParamLeft, Outgoing, - transfer_size; + uint32_t Base, fdc_address, rom_addr, /* address of BIOS ROM */ + CmdParamLeft, Outgoing, + transfer_size; volatile uint32_t - MailboxInit, MailboxCount, - MailboxOutAddr, MailboxOutPosCur, - MailboxInAddr, MailboxInPosCur, - MailboxReq, - BIOSMailboxInit, BIOSMailboxCount, - BIOSMailboxOutAddr, BIOSMailboxOutPosCur, - BIOSMailboxReq, - Residue, card_bus; /* Basically a copy of device flags */ + MailboxInit, + MailboxCount, + MailboxOutAddr, MailboxOutPosCur, + MailboxInAddr, MailboxInPosCur, + MailboxReq, + BIOSMailboxInit, BIOSMailboxCount, + BIOSMailboxOutAddr, BIOSMailboxOutPosCur, + BIOSMailboxReq, + Residue, card_bus; /* Basically a copy of device flags */ /* 8 bytes */ - uint64_t temp_period; + uint64_t temp_period; /* 16 bytes */ - double media_period, ha_bps; /* bytes per second */ + double media_period, ha_bps; /* bytes per second */ /* 8 bytes */ - char *bios_path, /* path to BIOS image file */ - *mcode_path, /* path to microcode image file, needed by the AHA-1542CP */ - *nvr_path; /* path to NVR image file */ + char *bios_path, /* path to BIOS image file */ + *mcode_path, /* path to microcode image file, needed by the AHA-1542CP */ + *nvr_path; /* path to NVR image file */ /* 56 bytes */ /* Pointer to a structure of vendor-specific data that only the vendor-specific code can understand */ - void *ven_data; + void *ven_data; /* Pointer to a function that performs vendor-specific operation during the timer callback */ - void (*ven_callback)(void *p); + void (*ven_callback)(void *p); /* Pointer to a function that executes the second parameter phase of the vendor-specific command */ - void (*ven_cmd_phase1)(void *p); + void (*ven_cmd_phase1)(void *p); /* Pointer to a function that gets the host adapter ID in case it has to be read from a non-standard location */ - uint8_t (*ven_get_host_id)(void *p); + uint8_t (*ven_get_host_id)(void *p); /* Pointer to a function that updates the IRQ in the vendor-specific space */ - uint8_t (*ven_get_irq)(void *p); + uint8_t (*ven_get_irq)(void *p); /* Pointer to a function that updates the DMA channel in the vendor-specific space */ - uint8_t (*ven_get_dma)(void *p); + uint8_t (*ven_get_dma)(void *p); /* Pointer to a function that returns whether command is fast */ - uint8_t (*ven_cmd_is_fast)(void *p); + uint8_t (*ven_cmd_is_fast)(void *p); /* Pointer to a function that executes vendor-specific fast path commands */ - uint8_t (*ven_fast_cmds)(void *p, uint8_t cmd); + uint8_t (*ven_fast_cmds)(void *p, uint8_t cmd); /* Pointer to a function that gets the parameter length for vendor-specific commands */ - uint8_t (*get_ven_param_len)(void *p); + uint8_t (*get_ven_param_len)(void *p); /* Pointer to a function that executes vendor-specific commands and returns whether or not to suppress the IRQ */ - uint8_t (*ven_cmds)(void *p); + uint8_t (*ven_cmds)(void *p); /* Pointer to a function that fills in the vendor-specific setup data */ - void (*get_ven_data)(void *p); + void (*get_ven_data)(void *p); /* Pointer to a function that determines if the mode is aggressive */ - uint8_t (*is_aggressive_mode)(void *p); + uint8_t (*is_aggressive_mode)(void *p); /* Pointer to a function that returns interrupt type (0 = edge, 1 = level) */ - uint8_t (*interrupt_type)(void *p); + uint8_t (*interrupt_type)(void *p); /* Pointer to a function that resets vendor-specific data */ - void (*ven_reset)(void *p); + void (*ven_reset)(void *p); - rom_t bios, /* BIOS memory descriptor */ - uppersck; /* BIOS memory descriptor */ + rom_t bios, /* BIOS memory descriptor */ + uppersck; /* BIOS memory descriptor */ mem_mapping_t mmio_mapping; - pc_timer_t timer, ResetCB; + pc_timer_t timer, ResetCB; - Req_t Req; + Req_t Req; - fdc_t *fdc; + fdc_t *fdc; } x54x_t; - -extern void x54x_reset_ctrl(x54x_t *dev, uint8_t Reset); -extern uint8_t x54x_mbo_process(x54x_t *dev); -extern void x54x_wait_for_poll(void); -extern void x54x_io_set(x54x_t *dev, uint32_t base, uint8_t len); -extern void x54x_io_remove(x54x_t *dev, uint32_t base, uint8_t len); -extern void x54x_mem_init(x54x_t *dev, uint32_t addr); -extern void x54x_mem_enable(x54x_t *dev); -extern void x54x_mem_set_addr(x54x_t *dev, uint32_t base); -extern void x54x_mem_disable(x54x_t *dev); -extern void *x54x_init(const device_t *info); -extern void x54x_close(void *priv); -extern void x54x_device_reset(void *priv); +extern void x54x_reset_ctrl(x54x_t *dev, uint8_t Reset); +extern uint8_t x54x_mbo_process(x54x_t *dev); +extern void x54x_wait_for_poll(void); +extern void x54x_io_set(x54x_t *dev, uint32_t base, uint8_t len); +extern void x54x_io_remove(x54x_t *dev, uint32_t base, uint8_t len); +extern void x54x_mem_init(x54x_t *dev, uint32_t addr); +extern void x54x_mem_enable(x54x_t *dev); +extern void x54x_mem_set_addr(x54x_t *dev, uint32_t base); +extern void x54x_mem_disable(x54x_t *dev); +extern void *x54x_init(const device_t *info); +extern void x54x_close(void *priv); +extern void x54x_device_reset(void *priv); #endif diff --git a/src/include/86box/serial.h b/src/include/86box/serial.h index 9f8bf1b98..87b91a30a 100644 --- a/src/include/86box/serial.h +++ b/src/include/86box/serial.h @@ -78,7 +78,7 @@ typedef struct { uint8_t enabled; } serial_port_t; -extern serial_port_t com_ports[SERIAL_MAX]; +extern serial_port_t com_ports[SERIAL_MAX]; extern serial_t *serial_attach(int port, void (*rcr_callback)(struct serial_s *serial, void *p), diff --git a/src/include/86box/sio.h b/src/include/86box/sio.h index e0cf20fe0..4cd0f9988 100644 --- a/src/include/86box/sio.h +++ b/src/include/86box/sio.h @@ -13,76 +13,75 @@ */ #ifndef EMU_SIO_H -# define EMU_SIO_H +#define EMU_SIO_H -extern void vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv); +extern void vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv); - -extern const device_t acc3221_device; -extern const device_t ali5123_device; -extern const device_t f82c710_device; -extern const device_t f82c606_device; -extern const device_t fdc37c651_device; -extern const device_t fdc37c651_ide_device; -extern const device_t fdc37c661_device; -extern const device_t fdc37c663_device; -extern const device_t fdc37c663_ide_device; -extern const device_t fdc37c665_device; -extern const device_t fdc37c665_ide_device; -extern const device_t fdc37c666_device; -extern const device_t fdc37c67x_device; -extern const device_t fdc37c669_device; -extern const device_t fdc37c669_370_device; -extern const device_t fdc37c931apm_device; -extern const device_t fdc37c931apm_compaq_device; -extern const device_t fdc37c932fr_device; -extern const device_t fdc37c932qf_device; -extern const device_t fdc37c935_device; -extern const device_t fdc37m60x_device; -extern const device_t fdc37m60x_370_device; -extern const device_t it8661f_device; -extern const device_t i82091aa_device; -extern const device_t i82091aa_398_device; -extern const device_t i82091aa_ide_pri_device; -extern const device_t i82091aa_ide_device; -extern const device_t pc87306_device; -extern const device_t pc87307_device; -extern const device_t pc87307_15c_device; -extern const device_t pc87307_both_device; -extern const device_t pc87309_device; -extern const device_t pc87309_15c_device; -extern const device_t pc87310_device; -extern const device_t pc87310_ide_device; -extern const device_t pc87311_device; -extern const device_t pc87311_ide_device; -extern const device_t pc87332_device; -extern const device_t pc87332_398_device; -extern const device_t pc87332_398_ide_device; -extern const device_t pc87332_398_ide_sec_device; -extern const device_t pc87332_398_ide_fdcon_device; -extern const device_t pc97307_device; -extern const device_t prime3b_device; -extern const device_t prime3b_ide_device; -extern const device_t prime3c_device; -extern const device_t prime3c_ide_device; -extern const device_t ps1_m2133_sio; +extern const device_t acc3221_device; +extern const device_t ali5123_device; +extern const device_t f82c710_device; +extern const device_t f82c606_device; +extern const device_t fdc37c651_device; +extern const device_t fdc37c651_ide_device; +extern const device_t fdc37c661_device; +extern const device_t fdc37c663_device; +extern const device_t fdc37c663_ide_device; +extern const device_t fdc37c665_device; +extern const device_t fdc37c665_ide_device; +extern const device_t fdc37c666_device; +extern const device_t fdc37c67x_device; +extern const device_t fdc37c669_device; +extern const device_t fdc37c669_370_device; +extern const device_t fdc37c931apm_device; +extern const device_t fdc37c931apm_compaq_device; +extern const device_t fdc37c932fr_device; +extern const device_t fdc37c932qf_device; +extern const device_t fdc37c935_device; +extern const device_t fdc37m60x_device; +extern const device_t fdc37m60x_370_device; +extern const device_t it8661f_device; +extern const device_t i82091aa_device; +extern const device_t i82091aa_398_device; +extern const device_t i82091aa_ide_pri_device; +extern const device_t i82091aa_ide_device; +extern const device_t pc87306_device; +extern const device_t pc87307_device; +extern const device_t pc87307_15c_device; +extern const device_t pc87307_both_device; +extern const device_t pc87309_device; +extern const device_t pc87309_15c_device; +extern const device_t pc87310_device; +extern const device_t pc87310_ide_device; +extern const device_t pc87311_device; +extern const device_t pc87311_ide_device; +extern const device_t pc87332_device; +extern const device_t pc87332_398_device; +extern const device_t pc87332_398_ide_device; +extern const device_t pc87332_398_ide_sec_device; +extern const device_t pc87332_398_ide_fdcon_device; +extern const device_t pc97307_device; +extern const device_t prime3b_device; +extern const device_t prime3b_ide_device; +extern const device_t prime3c_device; +extern const device_t prime3c_ide_device; +extern const device_t ps1_m2133_sio; #if defined(DEV_BRANCH) && defined(USE_SIO_DETECT) -extern const device_t sio_detect_device; +extern const device_t sio_detect_device; #endif -extern const device_t um8669f_device; -extern const device_t via_vt82c686_sio_device; -extern const device_t w83787f_device; -extern const device_t w83787f_ide_device; -extern const device_t w83787f_ide_en_device; -extern const device_t w83787f_ide_sec_device; -extern const device_t w83877f_device; -extern const device_t w83877f_president_device; -extern const device_t w83877tf_device; -extern const device_t w83877tf_acorp_device; -extern const device_t w83977f_device; -extern const device_t w83977f_370_device; -extern const device_t w83977tf_device; -extern const device_t w83977ef_device; -extern const device_t w83977ef_370_device; +extern const device_t um8669f_device; +extern const device_t via_vt82c686_sio_device; +extern const device_t w83787f_device; +extern const device_t w83787f_ide_device; +extern const device_t w83787f_ide_en_device; +extern const device_t w83787f_ide_sec_device; +extern const device_t w83877f_device; +extern const device_t w83877f_president_device; +extern const device_t w83877tf_device; +extern const device_t w83877tf_acorp_device; +extern const device_t w83977f_device; +extern const device_t w83977f_370_device; +extern const device_t w83977tf_device; +extern const device_t w83977ef_device; +extern const device_t w83977ef_370_device; -#endif /*EMU_SIO_H*/ +#endif /*EMU_SIO_H*/ diff --git a/src/include/86box/smbus.h b/src/include/86box/smbus.h index 2a4d4f0ee..51b10333a 100644 --- a/src/include/86box/smbus.h +++ b/src/include/86box/smbus.h @@ -6,7 +6,7 @@ * * This file is part of the 86Box distribution. * - * Definitions for the SMBus host controllers. + * Definitions for the SMBus host controllers. * * * @@ -16,15 +16,13 @@ */ #ifndef EMU_SMBUS_PIIX4_H -# define EMU_SMBUS_PIIX4_H +#define EMU_SMBUS_PIIX4_H +#define SMBUS_PIIX4_BLOCK_DATA_SIZE 32 +#define SMBUS_PIIX4_BLOCK_DATA_MASK (SMBUS_PIIX4_BLOCK_DATA_SIZE - 1) -#define SMBUS_PIIX4_BLOCK_DATA_SIZE 32 -#define SMBUS_PIIX4_BLOCK_DATA_MASK (SMBUS_PIIX4_BLOCK_DATA_SIZE - 1) - -#define SMBUS_ALI7101_BLOCK_DATA_SIZE 32 -#define SMBUS_ALI7101_BLOCK_DATA_MASK (SMBUS_ALI7101_BLOCK_DATA_SIZE - 1) - +#define SMBUS_ALI7101_BLOCK_DATA_SIZE 32 +#define SMBUS_ALI7101_BLOCK_DATA_MASK (SMBUS_ALI7101_BLOCK_DATA_SIZE - 1) enum { SMBUS_PIIX4 = 0, @@ -32,32 +30,31 @@ enum { }; typedef struct { - uint32_t local; - uint16_t io_base; - int clock; - double bit_period; - uint8_t stat, next_stat, ctl, cmd, addr, - data0, data1, - index, data[SMBUS_PIIX4_BLOCK_DATA_SIZE]; - pc_timer_t response_timer; - void *i2c; + uint32_t local; + uint16_t io_base; + int clock; + double bit_period; + uint8_t stat, next_stat, ctl, cmd, addr, + data0, data1, + index, data[SMBUS_PIIX4_BLOCK_DATA_SIZE]; + pc_timer_t response_timer; + void *i2c; } smbus_piix4_t; typedef struct { - uint32_t local; - uint16_t io_base; - uint8_t stat, next_stat, ctl, cmd, addr, - data0, data1, - index, data[SMBUS_ALI7101_BLOCK_DATA_SIZE]; - pc_timer_t response_timer; - void *i2c; + uint32_t local; + uint16_t io_base; + uint8_t stat, next_stat, ctl, cmd, addr, + data0, data1, + index, data[SMBUS_ALI7101_BLOCK_DATA_SIZE]; + pc_timer_t response_timer; + void *i2c; } smbus_ali7101_t; -extern void smbus_piix4_remap(smbus_piix4_t *dev, uint16_t new_io_base, uint8_t enable); -extern void smbus_piix4_setclock(smbus_piix4_t *dev, int clock); - -extern void smbus_ali7101_remap(smbus_ali7101_t *dev, uint16_t new_io_base, uint8_t enable); +extern void smbus_piix4_remap(smbus_piix4_t *dev, uint16_t new_io_base, uint8_t enable); +extern void smbus_piix4_setclock(smbus_piix4_t *dev, int clock); +extern void smbus_ali7101_remap(smbus_ali7101_t *dev, uint16_t new_io_base, uint8_t enable); #ifdef EMU_DEVICE_H extern const device_t piix4_smbus_device; @@ -66,4 +63,4 @@ extern const device_t via_smbus_device; extern const device_t ali7101_smbus_device; #endif -#endif /*EMU_SMBUS_PIIX4_H*/ +#endif /*EMU_SMBUS_PIIX4_H*/ diff --git a/src/include/86box/smram.h b/src/include/86box/smram.h index 7cc2e1a05..07537a7f6 100644 --- a/src/include/86box/smram.h +++ b/src/include/86box/smram.h @@ -16,50 +16,48 @@ */ #ifndef EMU_SMRAM_H -# define EMU_SMRAM_H +#define EMU_SMRAM_H -typedef struct _smram_ -{ - struct _smram_ *prev, *next; +typedef struct _smram_ { + struct _smram_ *prev, *next; - mem_mapping_t mapping; + mem_mapping_t mapping; - uint32_t host_base, ram_base, - size, - old_host_base, old_size; + uint32_t host_base, ram_base, + size, + old_host_base, old_size; } smram_t; - /* Make a backup copy of host_base and size of all the SMRAM structs, needed so that if the SMRAM mappings change while in SMM, they will be recalculated on return. */ -extern void smram_backup_all(void); +extern void smram_backup_all(void); /* Recalculate any mappings, including the backup if returning from SMM. */ -extern void smram_recalc_all(int ret); +extern void smram_recalc_all(int ret); /* Delete a SMRAM mapping. */ -extern void smram_del(smram_t *smr); +extern void smram_del(smram_t *smr); /* Add a SMRAM mapping. */ extern smram_t *smram_add(void); /* Set memory state in the specified model (normal or SMM) according to the specified flags, separately for bus and CPU. */ -extern void smram_map_ex(int bus, int smm, uint32_t addr, uint32_t size, int is_smram); +extern void smram_map_ex(int bus, int smm, uint32_t addr, uint32_t size, int is_smram); /* Set memory state in the specified model (normal or SMM) according to the specified flags. */ -extern void smram_map(int smm, uint32_t addr, uint32_t size, int is_smram); +extern void smram_map(int smm, uint32_t addr, uint32_t size, int is_smram); /* Disable a specific SMRAM mapping. */ -extern void smram_disable(smram_t *smr); +extern void smram_disable(smram_t *smr); /* Disable all SMRAM mappings. */ -extern void smram_disable_all(void); +extern void smram_disable_all(void); /* Enable SMRAM mappings according to flags for both normal and SMM modes, separately for bus and CPU. */ extern void smram_enable_ex(smram_t *smr, uint32_t host_base, uint32_t ram_base, uint32_t size, - int flags_normal, int flags_normal_bus, int flags_smm, int flags_smm_bus); + int flags_normal, int flags_normal_bus, int flags_smm, int flags_smm_bus); /* Enable SMRAM mappings according to flags for both normal and SMM modes. */ -extern void smram_enable(smram_t *smr, uint32_t host_base, uint32_t ram_base, uint32_t size, - int flags_normal, int flags_smm); +extern void smram_enable(smram_t *smr, uint32_t host_base, uint32_t ram_base, uint32_t size, + int flags_normal, int flags_smm); /* Checks if a SMRAM mapping is enabled or not. */ -extern int smram_enabled(smram_t *smr); +extern int smram_enabled(smram_t *smr); /* Changes the SMRAM state. */ -extern void smram_state_change(smram_t *smr, int smm, int flags); +extern void smram_state_change(smram_t *smr, int smm, int flags); /* Enables or disables the use of a separate SMRAM for addresses below A0000. */ -extern void smram_set_separate_smram(uint8_t set); +extern void smram_set_separate_smram(uint8_t set); -#endif /*EMU_SMRAM_H*/ +#endif /*EMU_SMRAM_H*/ diff --git a/src/include/86box/spd.h b/src/include/86box/spd.h index 76a336d8b..b3d025172 100644 --- a/src/include/86box/spd.h +++ b/src/include/86box/spd.h @@ -16,98 +16,96 @@ */ #ifndef EMU_SPD_H -# define EMU_SPD_H +#define EMU_SPD_H -#define SPD_BASE_ADDR 0x50 -#define SPD_MAX_SLOTS 8 -#define SPD_DATA_SIZE 256 +#define SPD_BASE_ADDR 0x50 +#define SPD_MAX_SLOTS 8 +#define SPD_DATA_SIZE 256 -#define SPD_TYPE_FPM 0x01 -#define SPD_TYPE_EDO 0x02 -#define SPD_TYPE_SDRAM 0x04 +#define SPD_TYPE_FPM 0x01 +#define SPD_TYPE_EDO 0x02 +#define SPD_TYPE_SDRAM 0x04 -#define SPD_MIN_SIZE_EDO 8 -#define SPD_MIN_SIZE_SDRAM 8 +#define SPD_MIN_SIZE_EDO 8 +#define SPD_MIN_SIZE_SDRAM 8 -#define SPD_SIGNAL_LVTTL 0x01 +#define SPD_SIGNAL_LVTTL 0x01 -#define SPD_REFRESH_NORMAL 0x00 -#define SPD_SDR_REFRESH_SELF 0x80 +#define SPD_REFRESH_NORMAL 0x00 +#define SPD_SDR_REFRESH_SELF 0x80 -#define SPD_SDR_BURST_PAGE 0x80 +#define SPD_SDR_BURST_PAGE 0x80 -#define SPD_SDR_ATTR_BUFFERED 0x01 -#define SPD_SDR_ATTR_REGISTERED 0x02 - -#define SPD_SDR_ATTR_EARLY_RAS 0x01 -#define SPD_SDR_ATTR_AUTO_PC 0x02 -#define SPD_SDR_ATTR_PC_ALL 0x04 -#define SPD_SDR_ATTR_W1R_BURST 0x08 -#define SPD_SDR_ATTR_VCC_LOW_5 0x10 -#define SPD_SDR_ATTR_VCC_HI_5 0x20 +#define SPD_SDR_ATTR_BUFFERED 0x01 +#define SPD_SDR_ATTR_REGISTERED 0x02 +#define SPD_SDR_ATTR_EARLY_RAS 0x01 +#define SPD_SDR_ATTR_AUTO_PC 0x02 +#define SPD_SDR_ATTR_PC_ALL 0x04 +#define SPD_SDR_ATTR_W1R_BURST 0x08 +#define SPD_SDR_ATTR_VCC_LOW_5 0x10 +#define SPD_SDR_ATTR_VCC_HI_5 0x20 typedef struct { - uint8_t bytes_used, spd_size, mem_type, - row_bits, col_bits, banks, - data_width_lsb, data_width_msb, - signal_level, trac, tcac, - config, refresh_rate, - dram_width, ecc_width, - reserved[47], - spd_rev, checksum, - mfg_jedec[8], mfg_loc; - char part_no[18]; - uint8_t rev_code[2], - mfg_year, mfg_week, serial[4], mfg_specific[27], - vendor_specific[2], - other_data[127], - checksum2; + uint8_t bytes_used, spd_size, mem_type, + row_bits, col_bits, banks, + data_width_lsb, data_width_msb, + signal_level, trac, tcac, + config, refresh_rate, + dram_width, ecc_width, + reserved[47], + spd_rev, checksum, + mfg_jedec[8], mfg_loc; + char part_no[18]; + uint8_t rev_code[2], + mfg_year, mfg_week, serial[4], mfg_specific[27], + vendor_specific[2], + other_data[127], + checksum2; } spd_edo_t; typedef struct { - uint8_t bytes_used, spd_size, mem_type, - row_bits, col_bits, rows, - data_width_lsb, data_width_msb, - signal_level, tclk, tac, - config, refresh_rate, - sdram_width, ecc_width, - tccd, burst, banks, cas, cslat, we, - mod_attr, dev_attr, - tclk2, tac2, tclk3, tac3, - trp, trrd, trcd, tras, - bank_density, - ca_setup, ca_hold, data_setup, data_hold, - reserved[26], - spd_rev, checksum, - mfg_jedec[8], mfg_loc; - char part_no[18]; - uint8_t rev_code[2], - mfg_year, mfg_week, serial[4], mfg_specific[27], - freq, features, - other_data[127], - checksum2; + uint8_t bytes_used, spd_size, mem_type, + row_bits, col_bits, rows, + data_width_lsb, data_width_msb, + signal_level, tclk, tac, + config, refresh_rate, + sdram_width, ecc_width, + tccd, burst, banks, cas, cslat, we, + mod_attr, dev_attr, + tclk2, tac2, tclk3, tac3, + trp, trrd, trcd, tras, + bank_density, + ca_setup, ca_hold, data_setup, data_hold, + reserved[26], + spd_rev, checksum, + mfg_jedec[8], mfg_loc; + char part_no[18]; + uint8_t rev_code[2], + mfg_year, mfg_week, serial[4], mfg_specific[27], + freq, features, + other_data[127], + checksum2; } spd_sdram_t; typedef struct { - uint8_t slot; - uint16_t size; - uint16_t row1; - uint16_t row2; + uint8_t slot; + uint16_t size; + uint16_t row1; + uint16_t row2; union { - uint8_t data[SPD_DATA_SIZE]; - spd_edo_t edo_data; - spd_sdram_t sdram_data; + uint8_t data[SPD_DATA_SIZE]; + spd_edo_t edo_data; + spd_sdram_t sdram_data; }; - void *eeprom; + void *eeprom; } spd_t; - extern void spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size); extern void spd_write_drbs(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit); extern void spd_write_drbs_with_ext(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit); extern void spd_write_drbs_interleaved(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit); extern void spd_write_drbs_ali1621(uint8_t *regs, uint8_t reg_min, uint8_t reg_max); -#endif /*EMU_SPD_H*/ +#endif /*EMU_SPD_H*/ diff --git a/src/include/86box/thread.h b/src/include/86box/thread.h index a34dbefb5..3f09bf8f9 100644 --- a/src/include/86box/thread.h +++ b/src/include/86box/thread.h @@ -3,23 +3,23 @@ extern "C" { #endif #ifdef __APPLE__ -#define thread_t plat_thread_t -#define event_t plat_event_t -#define mutex_t plat_mutex_t +# define thread_t plat_thread_t +# define event_t plat_event_t +# define mutex_t plat_mutex_t -#define thread_create plat_thread_create -#define thread_wait plat_thread_wait -#define thread_create_event plat_thread_create_event -#define thread_set_event plat_thread_set_event -#define thread_reset_event plat_thread_reset_event -#define thread_wait_event plat_thread_wait_event -#define thread_destroy_event plat_thread_destroy_event +# define thread_create plat_thread_create +# define thread_wait plat_thread_wait +# define thread_create_event plat_thread_create_event +# define thread_set_event plat_thread_set_event +# define thread_reset_event plat_thread_reset_event +# define thread_wait_event plat_thread_wait_event +# define thread_destroy_event plat_thread_destroy_event -#define thread_create_mutex plat_thread_create_mutex -#define thread_create_mutex_with_spin_count plat_thread_create_mutex_with_spin_count -#define thread_close_mutex plat_thread_close_mutex -#define thread_wait_mutex plat_thread_wait_mutex -#define thread_release_mutex plat_thread_release_mutex +# define thread_create_mutex plat_thread_create_mutex +# define thread_create_mutex_with_spin_count plat_thread_create_mutex_with_spin_count +# define thread_close_mutex plat_thread_close_mutex +# define thread_wait_mutex plat_thread_wait_mutex +# define thread_release_mutex plat_thread_release_mutex #endif /* Thread support. */ @@ -27,19 +27,19 @@ typedef void thread_t; typedef void event_t; typedef void mutex_t; -extern thread_t *thread_create(void (*thread_func)(void *param), void *param); -extern int thread_wait(thread_t *arg); -extern event_t *thread_create_event(void); -extern void thread_set_event(event_t *arg); -extern void thread_reset_event(event_t *arg); -extern int thread_wait_event(event_t *arg, int timeout); -extern void thread_destroy_event(event_t *arg); +extern thread_t *thread_create(void (*thread_func)(void *param), void *param); +extern int thread_wait(thread_t *arg); +extern event_t *thread_create_event(void); +extern void thread_set_event(event_t *arg); +extern void thread_reset_event(event_t *arg); +extern int thread_wait_event(event_t *arg, int timeout); +extern void thread_destroy_event(event_t *arg); -extern mutex_t *thread_create_mutex(void); -extern void thread_close_mutex(mutex_t *arg); -extern int thread_test_mutex(mutex_t *arg); -extern int thread_wait_mutex(mutex_t *arg); -extern int thread_release_mutex(mutex_t *mutex); +extern mutex_t *thread_create_mutex(void); +extern void thread_close_mutex(mutex_t *arg); +extern int thread_test_mutex(mutex_t *arg); +extern int thread_wait_mutex(mutex_t *arg); +extern int thread_release_mutex(mutex_t *mutex); #ifdef __cplusplus } diff --git a/src/include/86box/timer.h b/src/include/86box/timer.h index fcccb8494..c9b89788a 100644 --- a/src/include/86box/timer.h +++ b/src/include/86box/timer.h @@ -4,14 +4,13 @@ #include "cpu.h" /* Maximum period, currently 1 second. */ -#define MAX_USEC64 1000000ULL -#define MAX_USEC 1000000.0 +#define MAX_USEC64 1000000ULL +#define MAX_USEC 1000000.0 -#define TIMER_SPLIT 2 -#define TIMER_ENABLED 1 +#define TIMER_SPLIT 2 +#define TIMER_ENABLED 1 - -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { uint32_t frac; @@ -19,13 +18,11 @@ typedef struct } ts_struct_t; #pragma pack(pop) -typedef union -{ - uint64_t ts64; - ts_struct_t ts32; +typedef union { + uint64_t ts64; + ts_struct_t ts32; } ts_t; - /*Timers are based on the CPU Time Stamp Counter. Timer timestamps are in a 32:32 fixed point format, with the integer part compared against the TSC. The fractional part is used when advancing the timestamp to ensure a more accurate @@ -38,22 +35,21 @@ typedef union When a timer callback is called, the timer has been disabled. If the timer is to repeat, the callback must call timer_advance_u64(). This is a change from the old timer API.*/ -typedef struct pc_timer_t -{ +typedef struct pc_timer_t { #ifdef USE_PCEM_TIMER - uint32_t ts_integer; - uint32_t ts_frac; + uint32_t ts_integer; + uint32_t ts_frac; #else - ts_t ts; + ts_t ts; #endif - int flags, pad; /* The flags are defined above. */ - double period; /* This is used for large period timers to count - the microseconds and split the period. */ + int flags, pad; /* The flags are defined above. */ + double period; /* This is used for large period timers to count + the microseconds and split the period. */ - void (*callback)(void *p); - void *p; + void (*callback)(void *p); + void *p; - struct pc_timer_t *prev, *next; + struct pc_timer_t *prev, *next; } pc_timer_t; #ifdef __cplusplus @@ -62,34 +58,33 @@ extern "C" { /*Timestamp of nearest enabled timer. CPU emulation must call timer_process() when TSC matches or exceeds this.*/ -extern uint32_t timer_target; +extern uint32_t timer_target; /*Enable timer, without updating timestamp*/ -extern void timer_enable(pc_timer_t *timer); +extern void timer_enable(pc_timer_t *timer); /*Disable timer*/ -extern void timer_disable(pc_timer_t *timer); +extern void timer_disable(pc_timer_t *timer); /*Process any pending timers*/ -extern void timer_process(void); +extern void timer_process(void); /*Reset timer system*/ -extern void timer_close(void); -extern void timer_init(void); +extern void timer_close(void); +extern void timer_init(void); /*Add new timer. If start_timer is set, timer will be enabled with a zero timestamp - this is useful for permanently enabled timers*/ -extern void timer_add(pc_timer_t *timer, void (*callback)(void *p), void *p, int start_timer); +extern void timer_add(pc_timer_t *timer, void (*callback)(void *p), void *p, int start_timer); /*1us in 32:32 format*/ -extern uint64_t TIMER_USEC; +extern uint64_t TIMER_USEC; /*True if timer a expires before timer b*/ -#define TIMER_LESS_THAN(a, b) ((int64_t)((a)->ts.ts64 - (b)->ts.ts64) <= 0) +#define TIMER_LESS_THAN(a, b) ((int64_t) ((a)->ts.ts64 - (b)->ts.ts64) <= 0) /*True if timer a expires before 32 bit integer timestamp b*/ -#define TIMER_LESS_THAN_VAL(a, b) ((int32_t)((a)->ts.ts32.integer - (b)) <= 0) +#define TIMER_LESS_THAN_VAL(a, b) ((int32_t) ((a)->ts.ts32.integer - (b)) <= 0) /*True if 32 bit integer timestamp a expires before 32 bit integer timestamp b*/ -#define TIMER_VAL_LESS_THAN_VAL(a, b) ((int32_t)((a) - (b)) <= 0) - +#define TIMER_VAL_LESS_THAN_VAL(a, b) ((int32_t) ((a) - (b)) <= 0) /*Advance timer by delay, specified in 32:32 format. This should be used to resume a recurring timer in a callback routine*/ @@ -101,20 +96,18 @@ timer_advance_u64(pc_timer_t *timer, uint64_t delay) timer_enable(timer); } - /*Set a timer to the given delay, specified in 32:32 format. This should be used when starting a timer*/ static __inline void timer_set_delay_u64(pc_timer_t *timer, uint64_t delay) { - timer->ts.ts64 = 0ULL; + timer->ts.ts64 = 0ULL; timer->ts.ts32.integer = tsc; timer->ts.ts64 += delay; timer_enable(timer); } - /*True if timer currently enabled*/ static __inline int timer_is_enabled(pc_timer_t *timer) @@ -122,7 +115,6 @@ timer_is_enabled(pc_timer_t *timer) return !!(timer->flags & TIMER_ENABLED); } - /*Return integer timestamp of timer*/ static __inline uint32_t timer_get_ts_int(pc_timer_t *timer) @@ -130,7 +122,6 @@ timer_get_ts_int(pc_timer_t *timer) return timer->ts.ts32.integer; } - /*Return remaining time before timer expires, in us. If the timer has already expired then return 0*/ static __inline uint32_t @@ -139,17 +130,16 @@ timer_get_remaining_us(pc_timer_t *timer) int64_t remaining; if (timer->flags & TIMER_ENABLED) { - remaining = (int64_t) (timer->ts.ts64 - (uint64_t)(tsc << 32)); + remaining = (int64_t) (timer->ts.ts64 - (uint64_t) (tsc << 32)); - if (remaining < 0) - return 0; - return remaining / TIMER_USEC; + if (remaining < 0) + return 0; + return remaining / TIMER_USEC; } return 0; } - /*Return remaining time before timer expires, in 32:32 timestamp format. If the timer has already expired then return 0*/ static __inline uint64_t @@ -158,17 +148,16 @@ timer_get_remaining_u64(pc_timer_t *timer) int64_t remaining; if (timer->flags & TIMER_ENABLED) { - remaining = (int64_t) (timer->ts.ts64 - (uint64_t)(tsc << 32)); + remaining = (int64_t) (timer->ts.ts64 - (uint64_t) (tsc << 32)); - if (remaining < 0) - return 0; - return remaining; + if (remaining < 0) + return 0; + return remaining; } return 0; } - /*Set timer callback function*/ static __inline void timer_set_callback(pc_timer_t *timer, void (*callback)(void *p)) @@ -176,7 +165,6 @@ timer_set_callback(pc_timer_t *timer, void (*callback)(void *p)) timer->callback = callback; } - /*Set timer private data*/ static __inline void timer_set_p(pc_timer_t *timer, void *p) @@ -184,19 +172,16 @@ timer_set_p(pc_timer_t *timer, void *p) timer->p = p; } - /* The API for big timer periods starts here. */ -extern void timer_stop(pc_timer_t *timer); -extern void timer_advance_ex(pc_timer_t *timer, int start); -extern void timer_on(pc_timer_t *timer, double period, int start); -extern void timer_on_auto(pc_timer_t *timer, double period); +extern void timer_stop(pc_timer_t *timer); +extern void timer_advance_ex(pc_timer_t *timer, int start); +extern void timer_on(pc_timer_t *timer, double period, int start); +extern void timer_on_auto(pc_timer_t *timer, double period); -extern void timer_remove_head(void); - - -extern pc_timer_t * timer_head; -extern int timer_inited; +extern void timer_remove_head(void); +extern pc_timer_t *timer_head; +extern int timer_inited; static __inline void timer_process_inline(void) @@ -204,25 +189,25 @@ timer_process_inline(void) pc_timer_t *timer; if (!timer_head) - return; + return; - while(1) { - timer = timer_head; + while (1) { + timer = timer_head; - if (!TIMER_LESS_THAN_VAL(timer, (uint32_t)tsc)) - break; + if (!TIMER_LESS_THAN_VAL(timer, (uint32_t) tsc)) + break; - timer_head = timer->next; - if (timer_head) - timer_head->prev = NULL; + timer_head = timer->next; + if (timer_head) + timer_head->prev = NULL; - timer->next = timer->prev = NULL; - timer->flags &= ~TIMER_ENABLED; + timer->next = timer->prev = NULL; + timer->flags &= ~TIMER_ENABLED; - if (timer->flags & TIMER_SPLIT) - timer_advance_ex(timer, 0); /* We're splitting a > 1 s period into multiple <= 1 s periods. */ - else if (timer->callback != NULL) /* Make sure it's no NULL, so that we can have a NULL callback when no operation is needed. */ - timer->callback(timer->p); + if (timer->flags & TIMER_SPLIT) + timer_advance_ex(timer, 0); /* We're splitting a > 1 s period into multiple <= 1 s periods. */ + else if (timer->callback != NULL) /* Make sure it's no NULL, so that we can have a NULL callback when no operation is needed. */ + timer->callback(timer->p); } timer_target = timer_head->ts.ts32.integer; diff --git a/src/include/86box/ui.h b/src/include/86box/ui.h index adfb84581..5eb15a08d 100644 --- a/src/include/86box/ui.h +++ b/src/include/86box/ui.h @@ -17,68 +17,67 @@ * Copyright 2017-2019 Fred N. van Kempen. */ #ifndef EMU_UI_H -# define EMU_UI_H +#define EMU_UI_H #ifdef __cplusplus extern "C" { #endif - #ifdef USE_WX -# define RENDER_FPS 30 /* default render speed */ +# define RENDER_FPS 30 /* default render speed */ #endif /* Message Box functions. */ -#define MBX_INFO 1 -#define MBX_ERROR 2 -#define MBX_QUESTION 3 -#define MBX_QUESTION_YN 4 -#define MBX_QUESTION_OK 8 -#define MBX_QMARK 0x10 -#define MBX_WARNING 0x20 -#define MBX_FATAL 0x40 -#define MBX_ANSI 0x80 -#define MBX_LINKS 0x100 -#define MBX_DONTASK 0x200 +#define MBX_INFO 1 +#define MBX_ERROR 2 +#define MBX_QUESTION 3 +#define MBX_QUESTION_YN 4 +#define MBX_QUESTION_OK 8 +#define MBX_QMARK 0x10 +#define MBX_WARNING 0x20 +#define MBX_FATAL 0x40 +#define MBX_ANSI 0x80 +#define MBX_LINKS 0x100 +#define MBX_DONTASK 0x200 -extern int ui_msgbox(int flags, void *message); -extern int ui_msgbox_header(int flags, void *header, void *message); -extern int ui_msgbox_ex(int flags, void *header, void *message, void *btn1, void *btn2, void *btn3); +extern int ui_msgbox(int flags, void *message); +extern int ui_msgbox_header(int flags, void *header, void *message); +extern int ui_msgbox_ex(int flags, void *header, void *message, void *btn1, void *btn2, void *btn3); -extern void ui_check_menu_item(int id, int checked); +extern void ui_check_menu_item(int id, int checked); /* Status Bar functions. */ -#define SB_ICON_WIDTH 24 -#define SB_CASSETTE 0x00 -#define SB_CARTRIDGE 0x10 -#define SB_FLOPPY 0x20 -#define SB_CDROM 0x30 -#define SB_ZIP 0x40 -#define SB_MO 0x50 -#define SB_HDD 0x60 -#define SB_NETWORK 0x70 -#define SB_SOUND 0x80 -#define SB_TEXT 0x90 +#define SB_ICON_WIDTH 24 +#define SB_CASSETTE 0x00 +#define SB_CARTRIDGE 0x10 +#define SB_FLOPPY 0x20 +#define SB_CDROM 0x30 +#define SB_ZIP 0x40 +#define SB_MO 0x50 +#define SB_HDD 0x60 +#define SB_NETWORK 0x70 +#define SB_SOUND 0x80 +#define SB_TEXT 0x90 -extern wchar_t *ui_window_title(wchar_t *s); -extern void ui_status_update(void); -extern void ui_init_monitor(int monitor_index); -extern void ui_deinit_monitor(int monitor_index); -extern int ui_sb_find_part(int tag); -extern void ui_sb_set_ready(int ready); -extern void ui_sb_update_panes(void); -extern void ui_sb_update_text(void); -extern void ui_sb_update_tip(int meaning); -extern void ui_sb_timer_callback(int pane); -extern void ui_sb_update_icon(int tag, int active); -extern void ui_sb_update_icon_state(int tag, int state); -extern void ui_sb_set_text_w(wchar_t *wstr); -extern void ui_sb_set_text(char *str); -extern void ui_sb_bugui(char *str); -extern void ui_sb_mt32lcd(char *str); +extern wchar_t *ui_window_title(wchar_t *s); +extern void ui_status_update(void); +extern void ui_init_monitor(int monitor_index); +extern void ui_deinit_monitor(int monitor_index); +extern int ui_sb_find_part(int tag); +extern void ui_sb_set_ready(int ready); +extern void ui_sb_update_panes(void); +extern void ui_sb_update_text(void); +extern void ui_sb_update_tip(int meaning); +extern void ui_sb_timer_callback(int pane); +extern void ui_sb_update_icon(int tag, int active); +extern void ui_sb_update_icon_state(int tag, int state); +extern void ui_sb_set_text_w(wchar_t *wstr); +extern void ui_sb_set_text(char *str); +extern void ui_sb_bugui(char *str); +extern void ui_sb_mt32lcd(char *str); #ifdef __cplusplus } #endif -#endif /*EMU_UI_H*/ +#endif /*EMU_UI_H*/ diff --git a/src/include/86box/unix_sdl.h b/src/include/86box/unix_sdl.h index 24214ec31..0054ed938 100644 --- a/src/include/86box/unix_sdl.h +++ b/src/include/86box/unix_sdl.h @@ -1,14 +1,14 @@ #ifndef _UNIX_SDL_H -# define _UNIX_SDL_H +#define _UNIX_SDL_H -extern void sdl_close(void); -extern int sdl_inits(); -extern int sdl_inith(); -extern int sdl_initho(); -extern int sdl_pause(void); -extern void sdl_resize(int x, int y); -extern void sdl_enable(int enable); -extern void sdl_set_fs(int fs); -extern void sdl_reload(void); +extern void sdl_close(void); +extern int sdl_inits(); +extern int sdl_inith(); +extern int sdl_initho(); +extern int sdl_pause(void); +extern void sdl_resize(int x, int y); +extern void sdl_enable(int enable); +extern void sdl_set_fs(int fs); +extern void sdl_reload(void); #endif /*_UNIX_SDL_H*/ diff --git a/src/include/86box/usb.h b/src/include/86box/usb.h index 68c1fc88a..893a9f501 100644 --- a/src/include/86box/usb.h +++ b/src/include/86box/usb.h @@ -16,8 +16,7 @@ */ #ifndef USB_H -# define USB_H - +#define USB_H #ifdef __cplusplus extern "C" { @@ -25,24 +24,22 @@ extern "C" { typedef struct { - uint8_t uhci_io[32], ohci_mmio[4096]; - uint16_t uhci_io_base; - int uhci_enable, ohci_enable; - uint32_t ohci_mem_base; - mem_mapping_t ohci_mmio_mapping; + uint8_t uhci_io[32], ohci_mmio[4096]; + uint16_t uhci_io_base; + int uhci_enable, ohci_enable; + uint32_t ohci_mem_base; + mem_mapping_t ohci_mmio_mapping; } usb_t; - /* Global variables. */ -extern const device_t usb_device; - +extern const device_t usb_device; /* Functions. */ -extern void uhci_update_io_mapping(usb_t *dev, uint8_t base_l, uint8_t base_h, int enable); -extern void ohci_update_mem_mapping(usb_t *dev, uint8_t base1, uint8_t base2, uint8_t base3, int enable); +extern void uhci_update_io_mapping(usb_t *dev, uint8_t base_l, uint8_t base_h, int enable); +extern void ohci_update_mem_mapping(usb_t *dev, uint8_t base1, uint8_t base2, uint8_t base3, int enable); #ifdef __cplusplus } #endif -#endif /*USB_H*/ +#endif /*USB_H*/ diff --git a/src/include/86box/vnc.h b/src/include/86box/vnc.h index 1e0ddebba..7b82ce5d1 100644 --- a/src/include/86box/vnc.h +++ b/src/include/86box/vnc.h @@ -16,24 +16,23 @@ */ #ifndef EMU_VNC_H -# define EMU_VNC_H - +#define EMU_VNC_H #ifdef __cplusplus extern "C" { #endif -extern int vnc_init(void *); -extern void vnc_close(void); -extern void vnc_resize(int x, int y); -extern int vnc_pause(void); +extern int vnc_init(void *); +extern void vnc_close(void); +extern void vnc_resize(int x, int y); +extern int vnc_pause(void); -extern void vnc_kbinput(int, int); +extern void vnc_kbinput(int, int); -extern void vnc_take_screenshot(wchar_t *fn); +extern void vnc_take_screenshot(wchar_t *fn); #ifdef __cplusplus } #endif -#endif /*EMU_VNC_H*/ +#endif /*EMU_VNC_H*/ diff --git a/src/include/86box/win.h b/src/include/86box/win.h index 4122bb684..bb92f265b 100644 --- a/src/include/86box/win.h +++ b/src/include/86box/win.h @@ -24,7 +24,7 @@ #define PLAT_WIN_H #ifndef UNICODE -#define UNICODE +# define UNICODE #endif #define BITMAP WINDOWS_BITMAP #if 0 diff --git a/src/include/86box/zip.h b/src/include/86box/zip.h index 722d51d91..46745ff06 100644 --- a/src/include/86box/zip.h +++ b/src/include/86box/zip.h @@ -19,49 +19,47 @@ #ifndef EMU_ZIP_H #define EMU_ZIP_H -#define ZIP_NUM 4 +#define ZIP_NUM 4 -#define BUF_SIZE 32768 +#define BUF_SIZE 32768 -#define ZIP_TIME 10.0 +#define ZIP_TIME 10.0 -#define ZIP_SECTORS (96*2048) +#define ZIP_SECTORS (96 * 2048) #define ZIP_250_SECTORS (489532) - enum { ZIP_BUS_DISABLED = 0, - ZIP_BUS_ATAPI = 5, + ZIP_BUS_ATAPI = 5, ZIP_BUS_SCSI, ZIP_BUS_USB }; - typedef struct { uint8_t id; union { - uint8_t res, res0, /* Reserved for other ID's. */ - res1, - ide_channel, scsi_device_id; + uint8_t res, res0, /* Reserved for other ID's. */ + res1, + ide_channel, scsi_device_id; }; - uint8_t bus_type, /* 0 = ATAPI, 1 = SCSI */ - bus_mode, /* Bit 0 = PIO suported; - Bit 1 = DMA supportd. */ - read_only, /* Struct variable reserved for - media status. */ - pad, pad0; + uint8_t bus_type, /* 0 = ATAPI, 1 = SCSI */ + bus_mode, /* Bit 0 = PIO suported; + Bit 1 = DMA supportd. */ + read_only, /* Struct variable reserved for + media status. */ + pad, pad0; FILE *f; void *priv; char image_path[1024], - prev_image_path[1024]; + prev_image_path[1024]; uint32_t is_250, medium_size, - base; + base; } zip_drive_t; typedef struct { @@ -70,57 +68,55 @@ typedef struct { zip_drive_t *drv; uint8_t *buffer, - atapi_cdb[16], - current_cdb[16], - sense[256]; + atapi_cdb[16], + current_cdb[16], + sense[256]; uint8_t status, phase, - error, id, - features, cur_lun, - pad0, pad1; + error, id, + features, cur_lun, + pad0, pad1; uint16_t request_length, max_transfer_len; int requested_blocks, packet_status, - total_length, do_page_save, - unit_attention, request_pos, - old_len, pad3; + total_length, do_page_save, + unit_attention, request_pos, + old_len, pad3; uint32_t sector_pos, sector_len, - packet_len, pos; + packet_len, pos; double callback; } zip_t; - -extern zip_t *zip[ZIP_NUM]; -extern zip_drive_t zip_drives[ZIP_NUM]; -extern uint8_t atapi_zip_drives[8]; -extern uint8_t scsi_zip_drives[16]; +extern zip_t *zip[ZIP_NUM]; +extern zip_drive_t zip_drives[ZIP_NUM]; +extern uint8_t atapi_zip_drives[8]; +extern uint8_t scsi_zip_drives[16]; #define zip_sense_error dev->sense[0] -#define zip_sense_key dev->sense[2] -#define zip_asc dev->sense[12] -#define zip_ascq dev->sense[13] - +#define zip_sense_key dev->sense[2] +#define zip_asc dev->sense[12] +#define zip_ascq dev->sense[13] #ifdef __cplusplus extern "C" { #endif -extern void zip_disk_close(zip_t *dev); -extern void zip_disk_reload(zip_t *dev); -extern void zip_insert(zip_t *dev); +extern void zip_disk_close(zip_t *dev); +extern void zip_disk_reload(zip_t *dev); +extern void zip_insert(zip_t *dev); -extern void zip_global_init(void); -extern void zip_hard_reset(void); +extern void zip_global_init(void); +extern void zip_hard_reset(void); -extern void zip_reset(scsi_common_t *sc); -extern int zip_load(zip_t *dev, char *fn); -extern void zip_close(); +extern void zip_reset(scsi_common_t *sc); +extern int zip_load(zip_t *dev, char *fn); +extern void zip_close(); #ifdef __cplusplus } #endif -#endif /*EMU_ZIP_H*/ +#endif /*EMU_ZIP_H*/ From 740d7af8d61838e2de11cc2508467a6eac8db361 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:16:00 -0400 Subject: [PATCH 362/386] clang-format in src/win/ --- src/win/win_joystick.cpp | 451 +++++++++++++++----------------- src/win/win_joystick_rawinput.c | 6 +- src/win/win_mouse.c | 2 +- src/win/win_settings.c | 4 +- src/win/win_thread.c | 1 - src/win/win_ui.c | 16 +- 6 files changed, 231 insertions(+), 249 deletions(-) diff --git a/src/win/win_joystick.cpp b/src/win/win_joystick.cpp index a48538eec..30965efcd 100644 --- a/src/win/win_joystick.cpp +++ b/src/win/win_joystick.cpp @@ -30,313 +30,290 @@ #include <86box/gameport.h> #include <86box/win.h> -#define DIDEVTYPE_JOYSTICK 4 - +#define DIDEVTYPE_JOYSTICK 4 plat_joystick_t plat_joystick_state[MAX_PLAT_JOYSTICKS]; -joystick_t joystick_state[MAX_JOYSTICKS]; -int joysticks_present = 0; - - -static LPDIRECTINPUT8 lpdi; -static LPDIRECTINPUTDEVICE8 lpdi_joystick[2] = {NULL, NULL}; -static GUID joystick_guids[MAX_JOYSTICKS]; +joystick_t joystick_state[MAX_JOYSTICKS]; +int joysticks_present = 0; +static LPDIRECTINPUT8 lpdi; +static LPDIRECTINPUTDEVICE8 lpdi_joystick[2] = { NULL, NULL }; +static GUID joystick_guids[MAX_JOYSTICKS]; #ifdef ENABLE_JOYSTICK_LOG int joystick_do_log = ENABLE_JOYSTICK_LOG; - static void joystick_log(const char *fmt, ...) { va_list ap; if (joystick_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define joystick_log(fmt, ...) +# define joystick_log(fmt, ...) #endif - -static BOOL CALLBACK joystick_enum_callback(LPCDIDEVICEINSTANCE lpddi, UNUSED(LPVOID data)) +static BOOL CALLBACK +joystick_enum_callback(LPCDIDEVICEINSTANCE lpddi, UNUSED(LPVOID data)) { - if (joysticks_present >= MAX_JOYSTICKS) - return DIENUM_STOP; + if (joysticks_present >= MAX_JOYSTICKS) + return DIENUM_STOP; - joystick_log("joystick_enum_callback : found joystick %i : %s\n", joysticks_present, lpddi->tszProductName); + joystick_log("joystick_enum_callback : found joystick %i : %s\n", joysticks_present, lpddi->tszProductName); - joystick_guids[joysticks_present++] = lpddi->guidInstance; + joystick_guids[joysticks_present++] = lpddi->guidInstance; - if (joysticks_present >= MAX_JOYSTICKS) - return DIENUM_STOP; + if (joysticks_present >= MAX_JOYSTICKS) + return DIENUM_STOP; - return DIENUM_CONTINUE; + return DIENUM_CONTINUE; } -BOOL CALLBACK DIEnumDeviceObjectsCallback( - LPCDIDEVICEOBJECTINSTANCE lpddoi, - LPVOID pvRef) +BOOL CALLBACK +DIEnumDeviceObjectsCallback( + LPCDIDEVICEOBJECTINSTANCE lpddoi, + LPVOID pvRef) { - plat_joystick_t *state = (plat_joystick_t *)pvRef; + plat_joystick_t *state = (plat_joystick_t *) pvRef; - if (lpddoi->guidType == GUID_XAxis || lpddoi->guidType == GUID_YAxis || lpddoi->guidType == GUID_ZAxis || - lpddoi->guidType == GUID_RxAxis || lpddoi->guidType == GUID_RyAxis || lpddoi->guidType == GUID_RzAxis) - { - if (state->nr_axes < 8) - {memcpy(state->axis[state->nr_axes].name, lpddoi->tszName, strlen(lpddoi->tszName) + 1); - joystick_log("Axis %i : %s %x %x\n", state->nr_axes, state->axis[state->nr_axes].name, lpddoi->dwOfs, lpddoi->dwType); - if (lpddoi->guidType == GUID_XAxis) - state->axis[state->nr_axes].id = 0; - else if (lpddoi->guidType == GUID_YAxis) - state->axis[state->nr_axes].id = 1; - else if (lpddoi->guidType == GUID_ZAxis) - state->axis[state->nr_axes].id = 2; - else if (lpddoi->guidType == GUID_RxAxis) - state->axis[state->nr_axes].id = 3; - else if (lpddoi->guidType == GUID_RyAxis) - state->axis[state->nr_axes].id = 4; - else if (lpddoi->guidType == GUID_RzAxis) - state->axis[state->nr_axes].id = 5; - state->nr_axes++; - } + if (lpddoi->guidType == GUID_XAxis || lpddoi->guidType == GUID_YAxis || lpddoi->guidType == GUID_ZAxis || lpddoi->guidType == GUID_RxAxis || lpddoi->guidType == GUID_RyAxis || lpddoi->guidType == GUID_RzAxis) { + if (state->nr_axes < 8) { + memcpy(state->axis[state->nr_axes].name, lpddoi->tszName, strlen(lpddoi->tszName) + 1); + joystick_log("Axis %i : %s %x %x\n", state->nr_axes, state->axis[state->nr_axes].name, lpddoi->dwOfs, lpddoi->dwType); + if (lpddoi->guidType == GUID_XAxis) + state->axis[state->nr_axes].id = 0; + else if (lpddoi->guidType == GUID_YAxis) + state->axis[state->nr_axes].id = 1; + else if (lpddoi->guidType == GUID_ZAxis) + state->axis[state->nr_axes].id = 2; + else if (lpddoi->guidType == GUID_RxAxis) + state->axis[state->nr_axes].id = 3; + else if (lpddoi->guidType == GUID_RyAxis) + state->axis[state->nr_axes].id = 4; + else if (lpddoi->guidType == GUID_RzAxis) + state->axis[state->nr_axes].id = 5; + state->nr_axes++; } - else if (lpddoi->guidType == GUID_Button) - { - if (state->nr_buttons < 32) - { - memcpy(state->button[state->nr_buttons].name, lpddoi->tszName, strlen(lpddoi->tszName) + 1); - joystick_log("Button %i : %s %x %x\n", state->nr_buttons, state->button[state->nr_buttons].name, lpddoi->dwOfs, lpddoi->dwType); - state->nr_buttons++; - } + } else if (lpddoi->guidType == GUID_Button) { + if (state->nr_buttons < 32) { + memcpy(state->button[state->nr_buttons].name, lpddoi->tszName, strlen(lpddoi->tszName) + 1); + joystick_log("Button %i : %s %x %x\n", state->nr_buttons, state->button[state->nr_buttons].name, lpddoi->dwOfs, lpddoi->dwType); + state->nr_buttons++; } - else if (lpddoi->guidType == GUID_POV) - { - if (state->nr_povs < 4) - { - memcpy(state->pov[state->nr_povs].name, lpddoi->tszName, strlen(lpddoi->tszName) + 1); - joystick_log("POV %i : %s %x %x\n", state->nr_povs, state->pov[state->nr_povs].name, lpddoi->dwOfs, lpddoi->dwType); - state->nr_povs++; - } + } else if (lpddoi->guidType == GUID_POV) { + if (state->nr_povs < 4) { + memcpy(state->pov[state->nr_povs].name, lpddoi->tszName, strlen(lpddoi->tszName) + 1); + joystick_log("POV %i : %s %x %x\n", state->nr_povs, state->pov[state->nr_povs].name, lpddoi->dwOfs, lpddoi->dwType); + state->nr_povs++; } - else if (lpddoi->guidType == GUID_Slider) - { - if (state->nr_sliders < 2) - { - memcpy(state->slider[state->nr_sliders].name, lpddoi->tszName, strlen(lpddoi->tszName) + 1); - state->slider[state->nr_sliders].id = state->nr_sliders | SLIDER; - joystick_log("Slider %i : %s %x %x\n", state->nr_sliders, state->slider[state->nr_sliders].name, lpddoi->dwOfs, lpddoi->dwType); - state->nr_sliders++; - } + } else if (lpddoi->guidType == GUID_Slider) { + if (state->nr_sliders < 2) { + memcpy(state->slider[state->nr_sliders].name, lpddoi->tszName, strlen(lpddoi->tszName) + 1); + state->slider[state->nr_sliders].id = state->nr_sliders | SLIDER; + joystick_log("Slider %i : %s %x %x\n", state->nr_sliders, state->slider[state->nr_sliders].name, lpddoi->dwOfs, lpddoi->dwType); + state->nr_sliders++; } + } - return DIENUM_CONTINUE; + return DIENUM_CONTINUE; } -void joystick_init() +void +joystick_init() { - int c; + int c; - atexit(joystick_close); + atexit(joystick_close); - joysticks_present = 0; + joysticks_present = 0; - if (FAILED(DirectInput8Create(hinstance, DIRECTINPUT_VERSION, IID_IDirectInput8A, (void **) &lpdi, NULL))) - fatal("joystick_init : DirectInputCreate failed\n"); + if (FAILED(DirectInput8Create(hinstance, DIRECTINPUT_VERSION, IID_IDirectInput8A, (void **) &lpdi, NULL))) + fatal("joystick_init : DirectInputCreate failed\n"); - if (FAILED(lpdi->EnumDevices(DIDEVTYPE_JOYSTICK, joystick_enum_callback, NULL, DIEDFL_ATTACHEDONLY))) - fatal("joystick_init : EnumDevices failed\n"); + if (FAILED(lpdi->EnumDevices(DIDEVTYPE_JOYSTICK, joystick_enum_callback, NULL, DIEDFL_ATTACHEDONLY))) + fatal("joystick_init : EnumDevices failed\n"); - joystick_log("joystick_init: joysticks_present=%i\n", joysticks_present); + joystick_log("joystick_init: joysticks_present=%i\n", joysticks_present); - for (c = 0; c < joysticks_present; c++) - { - LPDIRECTINPUTDEVICE8 lpdi_joystick_temp = NULL; - DIPROPRANGE joy_axis_range; - DIDEVICEINSTANCE device_instance; - DIDEVCAPS devcaps; + for (c = 0; c < joysticks_present; c++) { + LPDIRECTINPUTDEVICE8 lpdi_joystick_temp = NULL; + DIPROPRANGE joy_axis_range; + DIDEVICEINSTANCE device_instance; + DIDEVCAPS devcaps; - if (FAILED(lpdi->CreateDevice(joystick_guids[c], &lpdi_joystick_temp, NULL))) - fatal("joystick_init : CreateDevice failed\n"); - if (FAILED(lpdi_joystick_temp->QueryInterface(IID_IDirectInputDevice8, (void **)&lpdi_joystick[c]))) - fatal("joystick_init : CreateDevice failed\n"); - lpdi_joystick_temp->Release(); + if (FAILED(lpdi->CreateDevice(joystick_guids[c], &lpdi_joystick_temp, NULL))) + fatal("joystick_init : CreateDevice failed\n"); + if (FAILED(lpdi_joystick_temp->QueryInterface(IID_IDirectInputDevice8, (void **) &lpdi_joystick[c]))) + fatal("joystick_init : CreateDevice failed\n"); + lpdi_joystick_temp->Release(); - memset(&device_instance, 0, sizeof(device_instance)); - device_instance.dwSize = sizeof(device_instance); - if (FAILED(lpdi_joystick[c]->GetDeviceInfo(&device_instance))) - fatal("joystick_init : GetDeviceInfo failed\n"); - joystick_log("Joystick %i :\n", c); - joystick_log(" tszInstanceName = %s\n", device_instance.tszInstanceName); - joystick_log(" tszProductName = %s\n", device_instance.tszProductName); - memcpy(plat_joystick_state[c].name, device_instance.tszInstanceName, strlen(device_instance.tszInstanceName) + 1); + memset(&device_instance, 0, sizeof(device_instance)); + device_instance.dwSize = sizeof(device_instance); + if (FAILED(lpdi_joystick[c]->GetDeviceInfo(&device_instance))) + fatal("joystick_init : GetDeviceInfo failed\n"); + joystick_log("Joystick %i :\n", c); + joystick_log(" tszInstanceName = %s\n", device_instance.tszInstanceName); + joystick_log(" tszProductName = %s\n", device_instance.tszProductName); + memcpy(plat_joystick_state[c].name, device_instance.tszInstanceName, strlen(device_instance.tszInstanceName) + 1); - memset(&devcaps, 0, sizeof(devcaps)); - devcaps.dwSize = sizeof(devcaps); - if (FAILED(lpdi_joystick[c]->GetCapabilities(&devcaps))) - fatal("joystick_init : GetCapabilities failed\n"); - joystick_log(" Axes = %i\n", devcaps.dwAxes); - joystick_log(" Buttons = %i\n", devcaps.dwButtons); - joystick_log(" POVs = %i\n", devcaps.dwPOVs); + memset(&devcaps, 0, sizeof(devcaps)); + devcaps.dwSize = sizeof(devcaps); + if (FAILED(lpdi_joystick[c]->GetCapabilities(&devcaps))) + fatal("joystick_init : GetCapabilities failed\n"); + joystick_log(" Axes = %i\n", devcaps.dwAxes); + joystick_log(" Buttons = %i\n", devcaps.dwButtons); + joystick_log(" POVs = %i\n", devcaps.dwPOVs); - lpdi_joystick[c]->EnumObjects(DIEnumDeviceObjectsCallback, &plat_joystick_state[c], DIDFT_ALL); + lpdi_joystick[c]->EnumObjects(DIEnumDeviceObjectsCallback, &plat_joystick_state[c], DIDFT_ALL); - if (FAILED(lpdi_joystick[c]->SetCooperativeLevel(hwndMain, DISCL_BACKGROUND | DISCL_NONEXCLUSIVE))) - fatal("joystick_init : SetCooperativeLevel failed\n"); - if (FAILED(lpdi_joystick[c]->SetDataFormat(&c_dfDIJoystick))) - fatal("joystick_init : SetDataFormat failed\n"); + if (FAILED(lpdi_joystick[c]->SetCooperativeLevel(hwndMain, DISCL_BACKGROUND | DISCL_NONEXCLUSIVE))) + fatal("joystick_init : SetCooperativeLevel failed\n"); + if (FAILED(lpdi_joystick[c]->SetDataFormat(&c_dfDIJoystick))) + fatal("joystick_init : SetDataFormat failed\n"); - joy_axis_range.lMin = -32768; - joy_axis_range.lMax = 32767; - joy_axis_range.diph.dwSize = sizeof(DIPROPRANGE); - joy_axis_range.diph.dwHeaderSize = sizeof(DIPROPHEADER); - joy_axis_range.diph.dwHow = DIPH_BYOFFSET; - joy_axis_range.diph.dwObj = DIJOFS_X; - lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); - joy_axis_range.diph.dwObj = DIJOFS_Y; - lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); - joy_axis_range.diph.dwObj = DIJOFS_Z; - lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); - joy_axis_range.diph.dwObj = DIJOFS_RX; - lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); - joy_axis_range.diph.dwObj = DIJOFS_RY; - lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); - joy_axis_range.diph.dwObj = DIJOFS_RZ; - lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); - joy_axis_range.diph.dwObj = DIJOFS_SLIDER(0); - lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); - joy_axis_range.diph.dwObj = DIJOFS_SLIDER(1); - lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); + joy_axis_range.lMin = -32768; + joy_axis_range.lMax = 32767; + joy_axis_range.diph.dwSize = sizeof(DIPROPRANGE); + joy_axis_range.diph.dwHeaderSize = sizeof(DIPROPHEADER); + joy_axis_range.diph.dwHow = DIPH_BYOFFSET; + joy_axis_range.diph.dwObj = DIJOFS_X; + lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); + joy_axis_range.diph.dwObj = DIJOFS_Y; + lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); + joy_axis_range.diph.dwObj = DIJOFS_Z; + lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); + joy_axis_range.diph.dwObj = DIJOFS_RX; + lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); + joy_axis_range.diph.dwObj = DIJOFS_RY; + lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); + joy_axis_range.diph.dwObj = DIJOFS_RZ; + lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); + joy_axis_range.diph.dwObj = DIJOFS_SLIDER(0); + lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); + joy_axis_range.diph.dwObj = DIJOFS_SLIDER(1); + lpdi_joystick[c]->SetProperty(DIPROP_RANGE, &joy_axis_range.diph); - if (FAILED(lpdi_joystick[c]->Acquire())) - fatal("joystick_init : Acquire failed\n"); - } + if (FAILED(lpdi_joystick[c]->Acquire())) + fatal("joystick_init : Acquire failed\n"); + } } -void joystick_close() +void +joystick_close() { - if (lpdi_joystick[1]) - { - lpdi_joystick[1]->Release(); - lpdi_joystick[1] = NULL; - } - if (lpdi_joystick[0]) - { - lpdi_joystick[0]->Release(); - lpdi_joystick[0] = NULL; - } + if (lpdi_joystick[1]) { + lpdi_joystick[1]->Release(); + lpdi_joystick[1] = NULL; + } + if (lpdi_joystick[0]) { + lpdi_joystick[0]->Release(); + lpdi_joystick[0] = NULL; + } } -static int joystick_get_axis(int joystick_nr, int mapping) +static int +joystick_get_axis(int joystick_nr, int mapping) { - if (mapping & POV_X) - { - int pov = plat_joystick_state[joystick_nr].p[mapping & 3]; + if (mapping & POV_X) { + int pov = plat_joystick_state[joystick_nr].p[mapping & 3]; - if (LOWORD(pov) == 0xFFFF) - return 0; - else - return sin((2*M_PI * (double)pov) / 36000.0) * 32767; - } - else if (mapping & POV_Y) - { - int pov = plat_joystick_state[joystick_nr].p[mapping & 3]; - - if (LOWORD(pov) == 0xFFFF) - return 0; - else - return -cos((2*M_PI * (double)pov) / 36000.0) * 32767; - } - else if (mapping & SLIDER) - { - return plat_joystick_state[joystick_nr].s[mapping & 3]; - } + if (LOWORD(pov) == 0xFFFF) + return 0; else - return plat_joystick_state[joystick_nr].a[plat_joystick_state[joystick_nr].axis[mapping].id]; + return sin((2 * M_PI * (double) pov) / 36000.0) * 32767; + } else if (mapping & POV_Y) { + int pov = plat_joystick_state[joystick_nr].p[mapping & 3]; + + if (LOWORD(pov) == 0xFFFF) + return 0; + else + return -cos((2 * M_PI * (double) pov) / 36000.0) * 32767; + } else if (mapping & SLIDER) { + return plat_joystick_state[joystick_nr].s[mapping & 3]; + } else + return plat_joystick_state[joystick_nr].a[plat_joystick_state[joystick_nr].axis[mapping].id]; } -void joystick_process(void) +void +joystick_process(void) { - int c, d; + int c, d; - if (!joystick_type) return; + if (!joystick_type) + return; - for (c = 0; c < joysticks_present; c++) - { - DIJOYSTATE joystate; - int b; + for (c = 0; c < joysticks_present; c++) { + DIJOYSTATE joystate; + int b; - if (FAILED(lpdi_joystick[c]->Poll())) - { - lpdi_joystick[c]->Acquire(); - lpdi_joystick[c]->Poll(); - } - if (FAILED(lpdi_joystick[c]->GetDeviceState(sizeof(DIJOYSTATE), (LPVOID)&joystate))) - { - lpdi_joystick[c]->Acquire(); - lpdi_joystick[c]->Poll(); - lpdi_joystick[c]->GetDeviceState(sizeof(DIJOYSTATE), (LPVOID)&joystate); - } - - plat_joystick_state[c].a[0] = joystate.lX; - plat_joystick_state[c].a[1] = joystate.lY; - plat_joystick_state[c].a[2] = joystate.lZ; - plat_joystick_state[c].a[3] = joystate.lRx; - plat_joystick_state[c].a[4] = joystate.lRy; - plat_joystick_state[c].a[5] = joystate.lRz; - plat_joystick_state[c].s[0] = joystate.rglSlider[0]; - plat_joystick_state[c].s[1] = joystate.rglSlider[1]; - - for (b = 0; b < 16; b++) - plat_joystick_state[c].b[b] = joystate.rgbButtons[b] & 0x80; - - for (b = 0; b < 4; b++) - plat_joystick_state[c].p[b] = joystate.rgdwPOV[b]; -// joystick_log("joystick %i - x=%i y=%i b[0]=%i b[1]=%i %i\n", c, joystick_state[c].x, joystick_state[c].y, joystick_state[c].b[0], joystick_state[c].b[1], joysticks_present); + if (FAILED(lpdi_joystick[c]->Poll())) { + lpdi_joystick[c]->Acquire(); + lpdi_joystick[c]->Poll(); + } + if (FAILED(lpdi_joystick[c]->GetDeviceState(sizeof(DIJOYSTATE), (LPVOID) &joystate))) { + lpdi_joystick[c]->Acquire(); + lpdi_joystick[c]->Poll(); + lpdi_joystick[c]->GetDeviceState(sizeof(DIJOYSTATE), (LPVOID) &joystate); } - for (c = 0; c < joystick_get_max_joysticks(joystick_type); c++) - { - if (joystick_state[c].plat_joystick_nr) - { - int joystick_nr = joystick_state[c].plat_joystick_nr - 1; + plat_joystick_state[c].a[0] = joystate.lX; + plat_joystick_state[c].a[1] = joystate.lY; + plat_joystick_state[c].a[2] = joystate.lZ; + plat_joystick_state[c].a[3] = joystate.lRx; + plat_joystick_state[c].a[4] = joystate.lRy; + plat_joystick_state[c].a[5] = joystate.lRz; + plat_joystick_state[c].s[0] = joystate.rglSlider[0]; + plat_joystick_state[c].s[1] = joystate.rglSlider[1]; - for (d = 0; d < joystick_get_axis_count(joystick_type); d++) - joystick_state[c].axis[d] = joystick_get_axis(joystick_nr, joystick_state[c].axis_mapping[d]); - for (d = 0; d < joystick_get_button_count(joystick_type); d++) - joystick_state[c].button[d] = plat_joystick_state[joystick_nr].b[joystick_state[c].button_mapping[d]]; + for (b = 0; b < 16; b++) + plat_joystick_state[c].b[b] = joystate.rgbButtons[b] & 0x80; - for (d = 0; d < joystick_get_pov_count(joystick_type); d++) - { - int x, y; - double angle, magnitude; + for (b = 0; b < 4; b++) + plat_joystick_state[c].p[b] = joystate.rgdwPOV[b]; + // joystick_log("joystick %i - x=%i y=%i b[0]=%i b[1]=%i %i\n", c, joystick_state[c].x, joystick_state[c].y, joystick_state[c].b[0], joystick_state[c].b[1], joysticks_present); + } - x = joystick_get_axis(joystick_nr, joystick_state[c].pov_mapping[d][0]); - y = joystick_get_axis(joystick_nr, joystick_state[c].pov_mapping[d][1]); + for (c = 0; c < joystick_get_max_joysticks(joystick_type); c++) { + if (joystick_state[c].plat_joystick_nr) { + int joystick_nr = joystick_state[c].plat_joystick_nr - 1; - angle = (atan2((double)y, (double)x) * 360.0) / (2*M_PI); - magnitude = sqrt((double)x*(double)x + (double)y*(double)y); + for (d = 0; d < joystick_get_axis_count(joystick_type); d++) + joystick_state[c].axis[d] = joystick_get_axis(joystick_nr, joystick_state[c].axis_mapping[d]); + for (d = 0; d < joystick_get_button_count(joystick_type); d++) + joystick_state[c].button[d] = plat_joystick_state[joystick_nr].b[joystick_state[c].button_mapping[d]]; - if (magnitude < 16384) - joystick_state[c].pov[d] = -1; - else - joystick_state[c].pov[d] = ((int)angle + 90 + 360) % 360; - } - } + for (d = 0; d < joystick_get_pov_count(joystick_type); d++) { + int x, y; + double angle, magnitude; + + x = joystick_get_axis(joystick_nr, joystick_state[c].pov_mapping[d][0]); + y = joystick_get_axis(joystick_nr, joystick_state[c].pov_mapping[d][1]); + + angle = (atan2((double) y, (double) x) * 360.0) / (2 * M_PI); + magnitude = sqrt((double) x * (double) x + (double) y * (double) y); + + if (magnitude < 16384) + joystick_state[c].pov[d] = -1; else - { - for (d = 0; d < joystick_get_axis_count(joystick_type); d++) - joystick_state[c].axis[d] = 0; - for (d = 0; d < joystick_get_button_count(joystick_type); d++) - joystick_state[c].button[d] = 0; - for (d = 0; d < joystick_get_pov_count(joystick_type); d++) - joystick_state[c].pov[d] = -1; - } + joystick_state[c].pov[d] = ((int) angle + 90 + 360) % 360; + } + } else { + for (d = 0; d < joystick_get_axis_count(joystick_type); d++) + joystick_state[c].axis[d] = 0; + for (d = 0; d < joystick_get_button_count(joystick_type); d++) + joystick_state[c].button[d] = 0; + for (d = 0; d < joystick_get_pov_count(joystick_type); d++) + joystick_state[c].pov[d] = -1; } + } } -void win_joystick_handle(PRAWINPUT raw) {} +void +win_joystick_handle(PRAWINPUT raw) +{ +} diff --git a/src/win/win_joystick_rawinput.c b/src/win/win_joystick_rawinput.c index 86c4bfa87..51aa6c389 100644 --- a/src/win/win_joystick_rawinput.c +++ b/src/win/win_joystick_rawinput.c @@ -219,9 +219,9 @@ end: void joystick_get_device_name(raw_joystick_t *rawjoy, plat_joystick_t *joy, PRID_DEVICE_INFO info) { - UINT size = 0; + UINT size = 0; WCHAR *device_name = NULL; - WCHAR device_desc_wide[200] = { 0 }; + WCHAR device_desc_wide[200] = { 0 }; GetRawInputDeviceInfoW(rawjoy->hdevice, RIDI_DEVICENAME, device_name, &size); device_name = calloc(size, sizeof(WCHAR)); @@ -229,7 +229,7 @@ joystick_get_device_name(raw_joystick_t *rawjoy, plat_joystick_t *joy, PRID_DEVI fatal("joystick_get_capabilities: Failed to get device name.\n"); HANDLE hDevObj = CreateFileW(device_name, GENERIC_READ | GENERIC_WRITE, - FILE_SHARE_READ | FILE_SHARE_WRITE, NULL, OPEN_EXISTING, 0, NULL); + FILE_SHARE_READ | FILE_SHARE_WRITE, NULL, OPEN_EXISTING, 0, NULL); if (hDevObj) { HidD_GetProductString(hDevObj, device_desc_wide, sizeof(WCHAR) * 200); CloseHandle(hDevObj); diff --git a/src/win/win_mouse.c b/src/win/win_mouse.c index dfc0ac691..58f0c2635 100644 --- a/src/win/win_mouse.c +++ b/src/win/win_mouse.c @@ -28,7 +28,7 @@ #include <86box/win.h> int mouse_capture; -double mouse_sensitivity = 1.0; /* Unused. */ +double mouse_sensitivity = 1.0; /* Unused. */ double mouse_x_error = 0.0, mouse_y_error = 0.0; /* Unused. */ typedef struct { diff --git a/src/win/win_settings.c b/src/win/win_settings.c index 365532ead..83a181c42 100644 --- a/src/win/win_settings.c +++ b/src/win/win_settings.c @@ -25,7 +25,7 @@ #include #undef BITMAP #ifdef ENABLE_SETTINGS_LOG -#include +# include #endif #include #include @@ -4323,7 +4323,7 @@ zip_add_locations(HWND hdlg) settings_add_string(hdlg, IDC_COMBO_ZIP_BUS, win_get_string(combo_id_to_string_id(i))); } - for (i = 0; i < (SCSI_BUS_MAX * SCSI_LUN_MAX) ; i++) { + for (i = 0; i < (SCSI_BUS_MAX * SCSI_LUN_MAX); i++) { wsprintf(lptsTemp, plat_get_string(IDS_4135), i >> 4, i & 15); settings_add_string(hdlg, IDC_COMBO_ZIP_ID, (LPARAM) lptsTemp); } diff --git a/src/win/win_thread.c b/src/win/win_thread.c index 746760639..16b984a9c 100644 --- a/src/win/win_thread.c +++ b/src/win/win_thread.c @@ -31,7 +31,6 @@ #include <86box/plat.h> #include <86box/thread.h> - typedef struct { HANDLE handle; } win_event_t; diff --git a/src/win/win_ui.c b/src/win/win_ui.c index 96ad662bd..b8902cf77 100644 --- a/src/win/win_ui.c +++ b/src/win/win_ui.c @@ -39,7 +39,7 @@ #include <86box/timer.h> #include <86box/nvr.h> #include <86box/video.h> -#include <86box/vid_ega.h> // for update_overscan +#include <86box/vid_ega.h> // for update_overscan #include <86box/plat_dynld.h> #include <86box/ui.h> #include <86box/win.h> @@ -1491,8 +1491,8 @@ plat_pause(int p) } if (p) { - if (mouse_capture) - plat_mouse_capture(0); + if (mouse_capture) + plat_mouse_capture(0); wcsncpy(oldtitle, ui_window_title(NULL), sizeof_w(oldtitle) - 1); wcscpy(title, oldtitle); @@ -1568,5 +1568,11 @@ plat_mouse_capture(int on) } } -void ui_init_monitor(int monitor_index) {} -void ui_deinit_monitor(int monitor_index) {} +void +ui_init_monitor(int monitor_index) +{ +} +void +ui_deinit_monitor(int monitor_index) +{ +} From 645732b7bf9da4e1561fdb9e6a6015812ab6bfd3 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:16:40 -0400 Subject: [PATCH 363/386] clang-format in src/sound/ --- src/sound/midi.c | 32 ++++----- src/sound/midi_fluidsynth.c | 18 ++--- src/sound/midi_mt32.c | 85 ++++++++++++----------- src/sound/midi_rtmidi.cpp | 41 ++++++------ src/sound/snd_ac97_codec.c | 130 ++++++++++++++++++------------------ src/sound/snd_ac97_via.c | 16 ++--- src/sound/snd_adlib.c | 32 ++++----- src/sound/snd_adlibgold.c | 54 +++++++-------- src/sound/snd_audiopci.c | 38 +++++------ src/sound/snd_azt2316a.c | 38 +++++------ src/sound/snd_cmi8x38.c | 2 +- src/sound/snd_cms.c | 18 ++--- src/sound/snd_cs423x.c | 4 +- src/sound/snd_lpt_dac.c | 32 ++++----- src/sound/snd_lpt_dss.c | 16 ++--- src/sound/snd_mpu401.c | 42 ++++++------ src/sound/snd_opl.c | 13 ++-- src/sound/snd_opl_nuked.c | 51 +++++++------- src/sound/snd_opl_ymfm.cpp | 128 +++++++++++++++++------------------ src/sound/snd_pas16.c | 18 ++--- src/sound/snd_ps1.c | 16 ++--- src/sound/snd_pssj.c | 50 +++++++------- src/sound/snd_sb.c | 40 +++++------ src/sound/snd_sb_dsp.c | 40 +++++------ src/sound/snd_sn76489.c | 50 +++++++------- src/sound/snd_ssi2001.c | 2 +- src/sound/snd_wss.c | 36 +++++----- 27 files changed, 521 insertions(+), 521 deletions(-) diff --git a/src/sound/midi.c b/src/sound/midi.c index b150c423b..d64c8c268 100644 --- a/src/sound/midi.c +++ b/src/sound/midi.c @@ -72,17 +72,17 @@ typedef struct } MIDI_OUT_DEVICE, MIDI_IN_DEVICE; static const device_t midi_out_none_device = { - .name = "None", + .name = "None", .internal_name = "none", - .flags = 0, - .local = 0, - .init = NULL, - .close = NULL, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = NULL, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; static const MIDI_OUT_DEVICE devices[] = { @@ -105,17 +105,17 @@ static const MIDI_OUT_DEVICE devices[] = { }; static const device_t midi_in_none_device = { - .name = "None", + .name = "None", .internal_name = "none", - .flags = 0, - .local = 0, - .init = NULL, - .close = NULL, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = NULL, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; static const MIDI_IN_DEVICE midi_in_devices[] = { diff --git a/src/sound/midi_fluidsynth.c b/src/sound/midi_fluidsynth.c index 79a2bcad6..ca0d3e866 100644 --- a/src/sound/midi_fluidsynth.c +++ b/src/sound/midi_fluidsynth.c @@ -550,17 +550,17 @@ static const device_config_t fluidsynth_config[] = { }; const device_t fluidsynth_device = { - .name = "FluidSynth", + .name = "FluidSynth", .internal_name = "fluidsynth", - .flags = 0, - .local = 0, - .init = fluidsynth_init, - .close = fluidsynth_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = fluidsynth_init, + .close = fluidsynth_close, + .reset = NULL, { .available = fluidsynth_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = fluidsynth_config + .force_redraw = NULL, + .config = fluidsynth_config }; -#endif /*USE_FLUIDSYNTH*/ +#endif/*USE_FLUIDSYNTH*/ diff --git a/src/sound/midi_mt32.c b/src/sound/midi_mt32.c index 914680010..79590230f 100644 --- a/src/sound/midi_mt32.c +++ b/src/sound/midi_mt32.c @@ -15,21 +15,20 @@ #include <86box/ui.h> #include -#define MT32_OLD_CTRL_ROM "roms/sound/mt32/MT32_CONTROL.ROM" -#define MT32_OLD_PCM_ROM "roms/sound/mt32/MT32_PCM.ROM" -#define MT32_NEW_CTRL_ROM "roms/sound/mt32_new/MT32_CONTROL.ROM" -#define MT32_NEW_PCM_ROM "roms/sound/mt32_new/MT32_PCM.ROM" -#define CM32L_CTRL_ROM "roms/sound/cm32l/CM32L_CONTROL.ROM" -#define CM32L_PCM_ROM "roms/sound/cm32l/CM32L_PCM.ROM" -#define CM32LN_CTRL_ROM "roms/sound/cm32ln/CM32LN_CONTROL.ROM" -#define CM32LN_PCM_ROM "roms/sound/cm32ln/CM32LN_PCM.ROM" +#define MT32_OLD_CTRL_ROM "roms/sound/mt32/MT32_CONTROL.ROM" +#define MT32_OLD_PCM_ROM "roms/sound/mt32/MT32_PCM.ROM" +#define MT32_NEW_CTRL_ROM "roms/sound/mt32_new/MT32_CONTROL.ROM" +#define MT32_NEW_PCM_ROM "roms/sound/mt32_new/MT32_PCM.ROM" +#define CM32L_CTRL_ROM "roms/sound/cm32l/CM32L_CONTROL.ROM" +#define CM32L_PCM_ROM "roms/sound/cm32l/CM32L_PCM.ROM" +#define CM32LN_CTRL_ROM "roms/sound/cm32ln/CM32LN_CONTROL.ROM" +#define CM32LN_PCM_ROM "roms/sound/cm32ln/CM32LN_PCM.ROM" extern void givealbuffer_midi(void *buf, uint32_t size); extern void al_set_midi(int freq, int buf_size); - static mt32emu_report_handler_version get_mt32_report_handler_version(mt32emu_report_handler_i i); -static void display_mt32_message(void *instance_data, const char *message); +static void display_mt32_message(void *instance_data, const char *message); static const mt32emu_report_handler_i_v0 handler_mt32_v0 = { /** Returns the actual interface version ID */ @@ -377,7 +376,7 @@ mt32_close(void *p) } static const device_config_t mt32_config[] = { -// clang-format off + // clang-format off { .name = "output_gain", .description = "Output Gain", @@ -421,57 +420,57 @@ static const device_config_t mt32_config[] = { }; const device_t mt32_old_device = { - .name = "Roland MT-32 Emulation", + .name = "Roland MT-32 Emulation", .internal_name = "mt32", - .flags = 0, - .local = 0, - .init = mt32_old_init, - .close = mt32_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = mt32_old_init, + .close = mt32_close, + .reset = NULL, { .available = mt32_old_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = mt32_config + .force_redraw = NULL, + .config = mt32_config }; const device_t mt32_new_device = { - .name = "Roland MT-32 (New) Emulation", + .name = "Roland MT-32 (New) Emulation", .internal_name = "mt32", - .flags = 0, - .local = 0, - .init = mt32_new_init, - .close = mt32_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = mt32_new_init, + .close = mt32_close, + .reset = NULL, { .available = mt32_new_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = mt32_config + .force_redraw = NULL, + .config = mt32_config }; const device_t cm32l_device = { - .name = "Roland CM-32L Emulation", + .name = "Roland CM-32L Emulation", .internal_name = "cm32l", - .flags = 0, - .local = 0, - .init = cm32l_init, - .close = mt32_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = cm32l_init, + .close = mt32_close, + .reset = NULL, { .available = cm32l_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = mt32_config + .force_redraw = NULL, + .config = mt32_config }; const device_t cm32ln_device = { - .name = "Roland CM-32LN Emulation", + .name = "Roland CM-32LN Emulation", .internal_name = "cm32ln", - .flags = 0, - .local = 0, - .init = cm32ln_init, - .close = mt32_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = cm32ln_init, + .close = mt32_close, + .reset = NULL, { .available = cm32ln_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = mt32_config + .force_redraw = NULL, + .config = mt32_config }; diff --git a/src/sound/midi_rtmidi.cpp b/src/sound/midi_rtmidi.cpp index 16538cf9e..bffd0a8f2 100644 --- a/src/sound/midi_rtmidi.cpp +++ b/src/sound/midi_rtmidi.cpp @@ -28,8 +28,7 @@ #include #include -extern "C" -{ +extern "C" { #include <86box/86box.h> #include <86box/device.h> #include <86box/midi.h> @@ -69,7 +68,7 @@ rtmidi_play_sysex(uint8_t *sysex, unsigned int len) midiout->sendMessage(sysex, len); } -void* +void * rtmidi_output_init(const device_t *info) { midi_device_t *dev = (midi_device_t *) malloc(sizeof(midi_device_t)); @@ -152,7 +151,7 @@ rtmidi_input_callback(double timeStamp, std::vector *message, voi midi_in_msg(message->data(), message->size()); } -void* +void * rtmidi_input_init(const device_t *info) { midi_device_t *dev = (midi_device_t *) malloc(sizeof(midi_device_t)); @@ -273,34 +272,34 @@ static const device_config_t midi_input_config[] = { .default_int = 1 }, { .name = "", .description = "", .type = CONFIG_END } - // clang-format on +// clang-format on }; const device_t rtmidi_output_device = { - .name = SYSTEM_MIDI_NAME, + .name = SYSTEM_MIDI_NAME, .internal_name = SYSTEM_MIDI_INTERNAL_NAME, - .flags = 0, - .local = 0, - .init = rtmidi_output_init, - .close = rtmidi_output_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = rtmidi_output_init, + .close = rtmidi_output_close, + .reset = NULL, { .available = rtmidi_out_get_num_devs }, .speed_changed = NULL, - .force_redraw = NULL, - .config = system_midi_config + .force_redraw = NULL, + .config = system_midi_config }; const device_t rtmidi_input_device = { - .name = MIDI_INPUT_NAME, + .name = MIDI_INPUT_NAME, .internal_name = MIDI_INPUT_INTERNAL_NAME, - .flags = 0, - .local = 0, - .init = rtmidi_input_init, - .close = rtmidi_input_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = rtmidi_input_init, + .close = rtmidi_input_close, + .reset = NULL, { .available = rtmidi_in_get_num_devs }, .speed_changed = NULL, - .force_redraw = NULL, - .config = midi_input_config + .force_redraw = NULL, + .config = midi_input_config }; } diff --git a/src/sound/snd_ac97_codec.c b/src/sound/snd_ac97_codec.c index 348989180..54aabab2e 100644 --- a/src/sound/snd_ac97_codec.c +++ b/src/sound/snd_ac97_codec.c @@ -637,117 +637,117 @@ ac97_codec_get(int model) if ((model >= 0) && (model < (sizeof(ac97_codecs) / sizeof(ac97_codecs[0])))) return ac97_codecs[model].device; else - return &cs4297a_device; /* fallback */ + return &cs4297a_device;/* fallback */ } const device_t ad1881_device = { - .name = "Analog Devices AD1881", + .name = "Analog Devices AD1881", .internal_name = "ad1881", - .flags = DEVICE_AC97, - .local = AC97_CODEC_AD1881, - .init = ac97_codec_init, - .close = ac97_codec_close, - .reset = ac97_codec_reset, + .flags = DEVICE_AC97, + .local = AC97_CODEC_AD1881, + .init = ac97_codec_init, + .close = ac97_codec_close, + .reset = ac97_codec_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ak4540_device = { - .name = "Asahi Kasei AK4540", + .name = "Asahi Kasei AK4540", .internal_name = "ak4540", - .flags = DEVICE_AC97, - .local = AC97_CODEC_AK4540, - .init = ac97_codec_init, - .close = ac97_codec_close, - .reset = ac97_codec_reset, + .flags = DEVICE_AC97, + .local = AC97_CODEC_AK4540, + .init = ac97_codec_init, + .close = ac97_codec_close, + .reset = ac97_codec_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t alc100_device = { - .name = "Avance Logic ALC100", + .name = "Avance Logic ALC100", .internal_name = "alc100", - .flags = DEVICE_AC97, - .local = AC97_CODEC_ALC100, - .init = ac97_codec_init, - .close = ac97_codec_close, - .reset = ac97_codec_reset, + .flags = DEVICE_AC97, + .local = AC97_CODEC_ALC100, + .init = ac97_codec_init, + .close = ac97_codec_close, + .reset = ac97_codec_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t cs4297_device = { - .name = "Crystal CS4297", + .name = "Crystal CS4297", .internal_name = "cs4297", - .flags = DEVICE_AC97, - .local = AC97_CODEC_CS4297, - .init = ac97_codec_init, - .close = ac97_codec_close, - .reset = ac97_codec_reset, + .flags = DEVICE_AC97, + .local = AC97_CODEC_CS4297, + .init = ac97_codec_init, + .close = ac97_codec_close, + .reset = ac97_codec_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t cs4297a_device = { - .name = "Crystal CS4297A", + .name = "Crystal CS4297A", .internal_name = "cs4297a", - .flags = DEVICE_AC97, - .local = AC97_CODEC_CS4297A, - .init = ac97_codec_init, - .close = ac97_codec_close, - .reset = ac97_codec_reset, + .flags = DEVICE_AC97, + .local = AC97_CODEC_CS4297A, + .init = ac97_codec_init, + .close = ac97_codec_close, + .reset = ac97_codec_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t stac9708_device = { - .name = "SigmaTel STAC9708", + .name = "SigmaTel STAC9708", .internal_name = "stac9708", - .flags = DEVICE_AC97, - .local = AC97_CODEC_STAC9708, - .init = ac97_codec_init, - .close = ac97_codec_close, - .reset = ac97_codec_reset, + .flags = DEVICE_AC97, + .local = AC97_CODEC_STAC9708, + .init = ac97_codec_init, + .close = ac97_codec_close, + .reset = ac97_codec_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t stac9721_device = { - .name = "SigmaTel STAC9721", + .name = "SigmaTel STAC9721", .internal_name = "stac9721", - .flags = DEVICE_AC97, - .local = AC97_CODEC_STAC9721, - .init = ac97_codec_init, - .close = ac97_codec_close, - .reset = ac97_codec_reset, + .flags = DEVICE_AC97, + .local = AC97_CODEC_STAC9721, + .init = ac97_codec_init, + .close = ac97_codec_close, + .reset = ac97_codec_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t wm9701a_device = { - .name = "Wolfson WM9701A", + .name = "Wolfson WM9701A", .internal_name = "wm9701a", - .flags = DEVICE_AC97, - .local = AC97_CODEC_WM9701A, - .init = ac97_codec_init, - .close = ac97_codec_close, - .reset = ac97_codec_reset, + .flags = DEVICE_AC97, + .local = AC97_CODEC_WM9701A, + .init = ac97_codec_init, + .close = ac97_codec_close, + .reset = ac97_codec_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sound/snd_ac97_via.c b/src/sound/snd_ac97_via.c index b3dbd30d8..9f83cd3f9 100644 --- a/src/sound/snd_ac97_via.c +++ b/src/sound/snd_ac97_via.c @@ -804,15 +804,15 @@ ac97_via_close(void *priv) } const device_t ac97_via_device = { - .name = "VIA VT82C686 Integrated AC97 Controller", + .name = "VIA VT82C686 Integrated AC97 Controller", .internal_name = "ac97_via", - .flags = DEVICE_PCI, - .local = 0, - .init = ac97_via_init, - .close = ac97_via_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = 0, + .init = ac97_via_init, + .close = ac97_via_close, + .reset = NULL, { .available = NULL }, .speed_changed = ac97_via_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sound/snd_adlib.c b/src/sound/snd_adlib.c index d4bc1e3ca..d0624744f 100644 --- a/src/sound/snd_adlib.c +++ b/src/sound/snd_adlib.c @@ -141,29 +141,29 @@ adlib_close(void *p) } const device_t adlib_device = { - .name = "AdLib", + .name = "AdLib", .internal_name = "adlib", - .flags = DEVICE_ISA, - .local = 0, - .init = adlib_init, - .close = adlib_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = adlib_init, + .close = adlib_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t adlib_mca_device = { - .name = "AdLib (MCA)", + .name = "AdLib (MCA)", .internal_name = "adlib_mca", - .flags = DEVICE_MCA, - .local = 0, - .init = adlib_init, - .close = adlib_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = 0, + .init = adlib_init, + .close = adlib_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sound/snd_adlibgold.c b/src/sound/snd_adlibgold.c index a15174b45..c07bc52e4 100644 --- a/src/sound/snd_adlibgold.c +++ b/src/sound/snd_adlibgold.c @@ -55,7 +55,7 @@ typedef struct adgold_t { int voice_count[2], voice_latch[2]; } adgold_mma; - fm_drv_t opl; + fm_drv_t opl; ym7128_t ym7128; int fm_vol_l, fm_vol_r; @@ -178,11 +178,11 @@ adgold_getsamp_dma(adgold_t *adgold, int channel) return; } adgold->adgold_mma_fifo[channel][adgold->adgold_mma_fifo_end[channel]] = temp; - adgold->adgold_mma_fifo_end[channel] = (adgold->adgold_mma_fifo_end[channel] + 1) & 255; + adgold->adgold_mma_fifo_end[channel] = (adgold->adgold_mma_fifo_end[channel] + 1) & 255; if (adgold->adgold_mma_regs[channel][0xc] & 0x60) { - temp = dma_channel_read(adgold->dma); + temp = dma_channel_read(adgold->dma); adgold->adgold_mma_fifo[channel][adgold->adgold_mma_fifo_end[channel]] = temp; - adgold->adgold_mma_fifo_end[channel] = (adgold->adgold_mma_fifo_end[channel] + 1) & 255; + adgold->adgold_mma_fifo_end[channel] = (adgold->adgold_mma_fifo_end[channel] + 1) & 255; } if (((adgold->adgold_mma_fifo_end[channel] - adgold->adgold_mma_fifo_start[channel]) & 255) >= adgold->adgold_mma_intpos[channel]) { adgold->adgold_mma_status &= ~(0x01 << channel); @@ -339,7 +339,7 @@ adgold_write(uint16_t addr, uint8_t val, void *p) break; /* 7350 Hz*/ } if (val & 0x80) { - adgold->adgold_mma_enable[0] = 0; + adgold->adgold_mma_enable[0] = 0; adgold->adgold_mma_fifo_end[0] = adgold->adgold_mma_fifo_start[0] = 0; adgold->adgold_mma_status &= ~0x01; adgold_update_irq_status(adgold); @@ -352,7 +352,7 @@ adgold_write(uint16_t addr, uint8_t val, void *p) if (adgold->adgold_mma_regs[0][0xc] & 1) { if (adgold->adgold_mma_regs[0][0xc] & 0x80) { - adgold->adgold_mma_enable[1] = 1; + adgold->adgold_mma_enable[1] = 1; adgold->adgold_mma.voice_count[1] = adgold->adgold_mma.voice_latch[1]; while (((adgold->adgold_mma_fifo_end[0] - adgold->adgold_mma_fifo_start[0]) & 255) < 128) { @@ -387,7 +387,7 @@ adgold_write(uint16_t addr, uint8_t val, void *p) case 0xb: if (((adgold->adgold_mma_fifo_end[0] - adgold->adgold_mma_fifo_start[0]) & 255) < 128) { adgold->adgold_mma_fifo[0][adgold->adgold_mma_fifo_end[0]] = val; - adgold->adgold_mma_fifo_end[0] = (adgold->adgold_mma_fifo_end[0] + 1) & 255; + adgold->adgold_mma_fifo_end[0] = (adgold->adgold_mma_fifo_end[0] + 1) & 255; if (((adgold->adgold_mma_fifo_end[0] - adgold->adgold_mma_fifo_start[0]) & 255) >= adgold->adgold_mma_intpos[0]) { adgold->adgold_mma_status &= ~0x01; adgold_update_irq_status(adgold); @@ -821,7 +821,7 @@ adgold_get_buffer(int32_t *buffer, int len, void *p) } adgold->opl.reset_buffer(adgold->opl.priv); - adgold->pos = 0; + adgold->pos = 0; free(adgold_buffer); } @@ -889,8 +889,8 @@ adgold_init(const device_t *info) adgold_t *adgold = malloc(sizeof(adgold_t)); memset(adgold, 0, sizeof(adgold_t)); - adgold->dma = device_get_config_int("dma"); - adgold->irq = device_get_config_int("irq"); + adgold->dma = device_get_config_int("dma"); + adgold->irq = device_get_config_int("irq"); adgold->surround_enabled = device_get_config_int("surround"); adgold->gameport_enabled = device_get_config_int("gameport"); @@ -940,7 +940,7 @@ adgold_init(const device_t *info) fclose(f); } - adgold->adgold_status = 0xf; + adgold->adgold_status = 0xf; adgold->adgold_38x_addr = 0; switch (adgold->irq) { case 3: @@ -958,18 +958,18 @@ adgold_init(const device_t *info) } adgold->adgold_eeprom[0x13] |= (adgold->dma << 3); memcpy(adgold->adgold_38x_regs, adgold->adgold_eeprom, 0x19); - adgold->vol_l = attenuation[adgold->adgold_eeprom[0x04] & 0x3f]; - adgold->vol_r = attenuation[adgold->adgold_eeprom[0x05] & 0x3f]; - adgold->bass = adgold->adgold_eeprom[0x06] & 0xf; - adgold->treble = adgold->adgold_eeprom[0x07] & 0xf; - adgold->fm_vol_l = (int) (int8_t) (adgold->adgold_eeprom[0x09] - 128); - adgold->fm_vol_r = (int) (int8_t) (adgold->adgold_eeprom[0x0a] - 128); + adgold->vol_l = attenuation[adgold->adgold_eeprom[0x04] & 0x3f]; + adgold->vol_r = attenuation[adgold->adgold_eeprom[0x05] & 0x3f]; + adgold->bass = adgold->adgold_eeprom[0x06] & 0xf; + adgold->treble = adgold->adgold_eeprom[0x07] & 0xf; + adgold->fm_vol_l = (int) (int8_t) (adgold->adgold_eeprom[0x09] - 128); + adgold->fm_vol_r = (int) (int8_t) (adgold->adgold_eeprom[0x0a] - 128); adgold->samp_vol_l = (int) (int8_t) (adgold->adgold_eeprom[0x0b] - 128); adgold->samp_vol_r = (int) (int8_t) (adgold->adgold_eeprom[0x0c] - 128); adgold->aux_vol_l = (int) (int8_t) (adgold->adgold_eeprom[0x0d] - 128); adgold->aux_vol_r = (int) (int8_t) (adgold->adgold_eeprom[0x0e] - 128); - adgold->adgold_mma_enable[0] = 0; + adgold->adgold_mma_enable[0] = 0; adgold->adgold_mma_fifo_start[0] = adgold->adgold_mma_fifo_end[0] = 0; /*388/389 are handled by adlib_init*/ @@ -1005,7 +1005,7 @@ adgold_close(void *p) } static const device_config_t adgold_config[] = { -// clang-format off + // clang-format off { .name = "irq", .description = "IRQ", @@ -1080,15 +1080,15 @@ static const device_config_t adgold_config[] = { }; const device_t adgold_device = { - .name = "AdLib Gold", + .name = "AdLib Gold", .internal_name = "adlibgold", - .flags = DEVICE_ISA, - .local = 0, - .init = adgold_init, - .close = adgold_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = adgold_init, + .close = adgold_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = adgold_config + .force_redraw = NULL, + .config = adgold_config }; diff --git a/src/sound/snd_audiopci.c b/src/sound/snd_audiopci.c index 4791be6a0..adc63e33b 100644 --- a/src/sound/snd_audiopci.c +++ b/src/sound/snd_audiopci.c @@ -2053,7 +2053,7 @@ es1371_speed_changed(void *p) } static const device_config_t es1371_config[] = { -// clang-format off + // clang-format off { .name = "codec", .description = "CODEC", @@ -2090,11 +2090,11 @@ static const device_config_t es1371_config[] = { .default_int = 1 }, { .name = "", .description = "", .type = CONFIG_END } -// clang-format on + // clang-format on }; static const device_config_t es1371_onboard_config[] = { -// clang-format off + // clang-format off { .name = "receive_input", .description = "Receive input (MIDI)", @@ -2107,29 +2107,29 @@ static const device_config_t es1371_onboard_config[] = { }; const device_t es1371_device = { - .name = "Ensoniq AudioPCI (ES1371)", + .name = "Ensoniq AudioPCI (ES1371)", .internal_name = "es1371", - .flags = DEVICE_PCI, - .local = 0, - .init = es1371_init, - .close = es1371_close, - .reset = es1371_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = es1371_init, + .close = es1371_close, + .reset = es1371_reset, { .available = NULL }, .speed_changed = es1371_speed_changed, - .force_redraw = NULL, - .config = es1371_config + .force_redraw = NULL, + .config = es1371_config }; const device_t es1371_onboard_device = { - .name = "Ensoniq AudioPCI (ES1371) (On-Board)", + .name = "Ensoniq AudioPCI (ES1371) (On-Board)", .internal_name = "es1371_onboard", - .flags = DEVICE_PCI, - .local = 1, - .init = es1371_init, - .close = es1371_close, - .reset = es1371_reset, + .flags = DEVICE_PCI, + .local = 1, + .init = es1371_init, + .close = es1371_close, + .reset = es1371_reset, { .available = NULL }, .speed_changed = es1371_speed_changed, - .force_redraw = NULL, - .config = es1371_onboard_config + .force_redraw = NULL, + .config = es1371_onboard_config }; diff --git a/src/sound/snd_azt2316a.c b/src/sound/snd_azt2316a.c index 890734450..ad5d0208e 100644 --- a/src/sound/snd_azt2316a.c +++ b/src/sound/snd_azt2316a.c @@ -1227,7 +1227,7 @@ azt_speed_changed(void *p) } static const device_config_t azt1605_config[] = { - // clang-format off + // clang-format off { .name = "codec", .description = "CODEC", @@ -1367,7 +1367,7 @@ static const device_config_t azt1605_config[] = { .default_int = 0 }, { .name = "", .description = "", .type = CONFIG_END } - // clang-format on + // clang-format on }; static const device_config_t azt2316a_config[] = { @@ -1488,33 +1488,33 @@ static const device_config_t azt2316a_config[] = { .default_int = 0 }, { .name = "", .description = "", .type = CONFIG_END } - // clang-format on +// clang-format on }; const device_t azt2316a_device = { - .name = "Aztech Sound Galaxy Pro 16 AB (Washington)", + .name = "Aztech Sound Galaxy Pro 16 AB (Washington)", .internal_name = "azt2316a", - .flags = DEVICE_ISA | DEVICE_AT, - .local = SB_SUBTYPE_CLONE_AZT2316A_0X11, - .init = azt_init, - .close = azt_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = SB_SUBTYPE_CLONE_AZT2316A_0X11, + .init = azt_init, + .close = azt_close, + .reset = NULL, { .available = NULL }, .speed_changed = azt_speed_changed, - .force_redraw = NULL, - .config = azt2316a_config + .force_redraw = NULL, + .config = azt2316a_config }; const device_t azt1605_device = { - .name = "Aztech Sound Galaxy Nova 16 Extra (Clinton)", + .name = "Aztech Sound Galaxy Nova 16 Extra (Clinton)", .internal_name = "azt1605", - .flags = DEVICE_ISA | DEVICE_AT, - .local = SB_SUBTYPE_CLONE_AZT1605_0X0C, - .init = azt_init, - .close = azt_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = SB_SUBTYPE_CLONE_AZT1605_0X0C, + .init = azt_init, + .close = azt_close, + .reset = NULL, { .available = NULL }, .speed_changed = azt_speed_changed, - .force_redraw = NULL, - .config = azt1605_config + .force_redraw = NULL, + .config = azt1605_config }; diff --git a/src/sound/snd_cmi8x38.c b/src/sound/snd_cmi8x38.c index d4a54880b..034fa9bcf 100644 --- a/src/sound/snd_cmi8x38.c +++ b/src/sound/snd_cmi8x38.c @@ -1474,7 +1474,7 @@ static const device_config_t cmi8738_config[] = { .default_int = 1 }, { .name = "", .description = "", .type = CONFIG_END } - // clang-format on +// clang-format on }; const device_t cmi8338_device = { diff --git a/src/sound/snd_cms.c b/src/sound/snd_cms.c index 50b05dd48..2014080c6 100644 --- a/src/sound/snd_cms.c +++ b/src/sound/snd_cms.c @@ -227,19 +227,19 @@ static const device_config_t cms_config[] = { } }, { .name = "", .description = "", .type = CONFIG_END } - // clang-format on +// clang-format on }; const device_t cms_device = { - .name = "Creative Music System / Game Blaster", + .name = "Creative Music System / Game Blaster", .internal_name = "cms", - .flags = DEVICE_ISA, - .local = 0, - .init = cms_init, - .close = cms_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = cms_init, + .close = cms_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = cms_config + .force_redraw = NULL, + .config = cms_config }; diff --git a/src/sound/snd_cs423x.c b/src/sound/snd_cs423x.c index fa9e7f23c..dceabdd08 100644 --- a/src/sound/snd_cs423x.c +++ b/src/sound/snd_cs423x.c @@ -57,7 +57,7 @@ static const uint8_t slam_init_key[32] = { 0x96, 0x35, 0x9A, 0xCD, 0xE6, 0xF3, 0 0xF1, 0xF8, 0x7C, 0x3E, 0x9F, 0x4F, 0x27, 0x13, 0x09, 0x84, 0x42, 0xA1, 0xD0, 0x68, 0x34, 0x1A }; static const uint8_t cs4236b_eeprom[] = { - // clang-format off + // clang-format off /* Chip configuration */ 0x55, 0xbb, /* magic */ 0x00, 0x00, /* length */ @@ -505,7 +505,7 @@ cs423x_get_buffer(int32_t *buffer, int len, void *priv) { cs423x_t *dev = (cs423x_t *) priv; int c, opl_wss = dev->opl_wss; - int32_t *opl_buf = NULL; + int32_t *opl_buf = NULL; /* Output audio from the WSS codec, and also the OPL if we're in charge of it. */ ad1848_update(&dev->ad1848); diff --git a/src/sound/snd_lpt_dac.c b/src/sound/snd_lpt_dac.c index 70e02d847..f3e679a55 100644 --- a/src/sound/snd_lpt_dac.c +++ b/src/sound/snd_lpt_dac.c @@ -109,25 +109,25 @@ dac_close(void *p) } const lpt_device_t lpt_dac_device = { - .name = "LPT DAC / Covox Speech Thing", + .name = "LPT DAC / Covox Speech Thing", .internal_name = "lpt_dac", - .init = dac_init, - .close = dac_close, - .write_data = dac_write_data, - .write_ctrl = dac_write_ctrl, - .read_data = NULL, - .read_status = dac_read_status, - .read_ctrl = NULL + .init = dac_init, + .close = dac_close, + .write_data = dac_write_data, + .write_ctrl = dac_write_ctrl, + .read_data = NULL, + .read_status = dac_read_status, + .read_ctrl = NULL }; const lpt_device_t lpt_dac_stereo_device = { - .name = "Stereo LPT DAC", + .name = "Stereo LPT DAC", .internal_name = "lpt_dac_stereo", - .init = dac_stereo_init, - .close = dac_close, - .write_data = dac_write_data, - .write_ctrl = dac_write_ctrl, - .read_data = NULL, - .read_status = dac_read_status, - .read_ctrl = NULL + .init = dac_stereo_init, + .close = dac_close, + .write_data = dac_write_data, + .write_ctrl = dac_write_ctrl, + .read_data = NULL, + .read_status = dac_read_status, + .read_ctrl = NULL }; diff --git a/src/sound/snd_lpt_dss.c b/src/sound/snd_lpt_dss.c index a855425b2..7990a2a23 100644 --- a/src/sound/snd_lpt_dss.c +++ b/src/sound/snd_lpt_dss.c @@ -132,13 +132,13 @@ dss_close(void *p) } const lpt_device_t dss_device = { - .name = "Disney Sound Source", + .name = "Disney Sound Source", .internal_name = "dss", - .init = dss_init, - .close = dss_close, - .write_data = dss_write_data, - .write_ctrl = dss_write_ctrl, - .read_data = NULL, - .read_status = dss_read_status, - .read_ctrl = NULL + .init = dss_init, + .close = dss_close, + .write_data = dss_write_data, + .write_ctrl = dss_write_ctrl, + .read_data = NULL, + .read_status = dss_read_status, + .read_ctrl = NULL }; diff --git a/src/sound/snd_mpu401.c b/src/sound/snd_mpu401.c index 10ef7b5e0..074a1396f 100644 --- a/src/sound/snd_mpu401.c +++ b/src/sound/snd_mpu401.c @@ -1786,7 +1786,7 @@ mpu401_standalone_init(const device_t *info) base = 0; /* Tell mpu401_init() that this is the MCA variant. */ /* According to @6c0f.adf, the IRQ is supposed to be fixed to 2. This is only true for earlier models. Later ones have selectable IRQ. */ - irq = device_get_config_int("irq"); + irq = device_get_config_int("irq"); } else { base = device_get_config_hex16("base"); irq = device_get_config_int("irq"); @@ -1806,7 +1806,7 @@ mpu401_standalone_close(void *priv) } static const device_config_t mpu401_standalone_config[] = { - // clang-format off + // clang-format off { .name = "base", .description = "MPU-401 Address", @@ -1910,11 +1910,11 @@ static const device_config_t mpu401_standalone_config[] = { .default_int = 1 }, { .name = "", .description = "", .type = CONFIG_END } - // clang-format on + // clang-format on }; static const device_config_t mpu401_standalone_mca_config[] = { - // clang-format off + // clang-format off { .name = "irq", .description = "MPU-401 IRQ", @@ -1958,33 +1958,33 @@ static const device_config_t mpu401_standalone_mca_config[] = { .default_int = 1 }, { .name = "", .description = "", .type = CONFIG_END } - // clang-format on +// clang-format on }; const device_t mpu401_device = { - .name = "Roland MPU-IPC-T", + .name = "Roland MPU-IPC-T", .internal_name = "mpu401", - .flags = DEVICE_ISA, - .local = 0, - .init = mpu401_standalone_init, - .close = mpu401_standalone_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = mpu401_standalone_init, + .close = mpu401_standalone_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = mpu401_standalone_config + .force_redraw = NULL, + .config = mpu401_standalone_config }; const device_t mpu401_mca_device = { - .name = "Roland MPU-IMC", + .name = "Roland MPU-IMC", .internal_name = "mpu401_mca", - .flags = DEVICE_MCA, - .local = 0, - .init = mpu401_standalone_init, - .close = mpu401_standalone_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = 0, + .init = mpu401_standalone_init, + .close = mpu401_standalone_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = mpu401_standalone_mca_config + .force_redraw = NULL, + .config = mpu401_standalone_mca_config }; diff --git a/src/sound/snd_opl.c b/src/sound/snd_opl.c index cce75bf39..409467725 100644 --- a/src/sound/snd_opl.c +++ b/src/sound/snd_opl.c @@ -36,30 +36,31 @@ static uint32_t fm_dev_inst[FM_DRV_MAX][FM_MAX]; uint8_t -fm_driver_get(int chip_id, fm_drv_t *drv) { +fm_driver_get(int chip_id, fm_drv_t *drv) +{ switch (chip_id) { case FM_YM3812: if (fm_driver == FM_DRV_NUKED) { - *drv = nuked_opl_drv; + *drv = nuked_opl_drv; drv->priv = device_add_inst(&ym3812_nuked_device, fm_dev_inst[fm_driver][chip_id]++); } else { - *drv = ymfm_drv; + *drv = ymfm_drv; drv->priv = device_add_inst(&ym3812_ymfm_device, fm_dev_inst[fm_driver][chip_id]++); } break; case FM_YMF262: if (fm_driver == FM_DRV_NUKED) { - *drv = nuked_opl_drv; + *drv = nuked_opl_drv; drv->priv = device_add_inst(&ymf262_nuked_device, fm_dev_inst[fm_driver][chip_id]++); } else { - *drv = ymfm_drv; + *drv = ymfm_drv; drv->priv = device_add_inst(&ymf262_ymfm_device, fm_dev_inst[fm_driver][chip_id]++); } break; case FM_YMF289B: - *drv = ymfm_drv; + *drv = ymfm_drv; drv->priv = device_add_inst(&ymf289b_ymfm_device, fm_dev_inst[fm_driver][chip_id]++); break; diff --git a/src/sound/snd_opl_nuked.c b/src/sound/snd_opl_nuked.c index 8e1a7e774..85d524654 100644 --- a/src/sound/snd_opl_nuked.c +++ b/src/sound/snd_opl_nuked.c @@ -173,7 +173,7 @@ typedef struct chip { typedef struct { nuked_t opl; - int8_t flags, pad; + int8_t flags, pad; uint16_t port; uint8_t status, timer_ctrl; @@ -1355,7 +1355,7 @@ nuked_generate_stream(nuked_t *dev, int32_t *sndptr, uint32_t num) void nuked_init(nuked_t *dev, uint32_t samplerate) { - uint8_t i; + uint8_t i; memset(dev, 0x00, sizeof(nuked_t)); @@ -1456,7 +1456,7 @@ nuked_timer_2(void *priv) static void nuked_drv_set_do_cycles(void *priv, int8_t do_cycles) { - nuked_drv_t *dev = (nuked_drv_t *)priv; + nuked_drv_t *dev = (nuked_drv_t *) priv; if (do_cycles) dev->flags |= FLAG_CYCLES; @@ -1468,7 +1468,7 @@ static void * nuked_drv_init(const device_t *info) { nuked_drv_t *dev = (nuked_drv_t *) calloc(1, sizeof(nuked_drv_t)); - dev->flags = FLAG_CYCLES; + dev->flags = FLAG_CYCLES; if (info->local == FM_YMF262) dev->flags |= FLAG_OPL3; else @@ -1486,14 +1486,14 @@ nuked_drv_init(const device_t *info) static void nuked_drv_close(void *priv) { - nuked_drv_t *dev = (nuked_drv_t *)priv; + nuked_drv_t *dev = (nuked_drv_t *) priv; free(dev); } static int32_t * nuked_drv_update(void *priv) { - nuked_drv_t *dev = (nuked_drv_t *)priv; + nuked_drv_t *dev = (nuked_drv_t *) priv; if (dev->pos >= sound_pos_global) return dev->buffer; @@ -1536,7 +1536,7 @@ nuked_drv_read(uint16_t port, void *priv) static void nuked_drv_write(uint16_t port, uint8_t val, void *priv) { - nuked_drv_t *dev = (nuked_drv_t *)priv; + nuked_drv_t *dev = (nuked_drv_t *) priv; nuked_drv_update(dev); if ((port & 0x0001) == 0x0001) { @@ -1574,38 +1574,39 @@ nuked_drv_write(uint16_t port, uint8_t val, void *priv) } static void -nuked_drv_reset_buffer(void *priv) { - nuked_drv_t *dev = (nuked_drv_t *)priv; +nuked_drv_reset_buffer(void *priv) +{ + nuked_drv_t *dev = (nuked_drv_t *) priv; dev->pos = 0; } const device_t ym3812_nuked_device = { - .name = "Yamaha YM3812 OPL2 (NUKED)", + .name = "Yamaha YM3812 OPL2 (NUKED)", .internal_name = "ym3812_nuked", - .flags = 0, - .local = FM_YM3812, - .init = nuked_drv_init, - .close = nuked_drv_close, - .reset = NULL, + .flags = 0, + .local = FM_YM3812, + .init = nuked_drv_init, + .close = nuked_drv_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ymf262_nuked_device = { - .name = "Yamaha YMF262 OPL3 (NUKED)", + .name = "Yamaha YMF262 OPL3 (NUKED)", .internal_name = "ymf262_nuked", - .flags = 0, - .local = FM_YMF262, - .init = nuked_drv_init, - .close = nuked_drv_close, - .reset = NULL, + .flags = 0, + .local = FM_YMF262, + .init = nuked_drv_init, + .close = nuked_drv_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const fm_drv_t nuked_opl_drv = { diff --git a/src/sound/snd_opl_ymfm.cpp b/src/sound/snd_opl_ymfm.cpp index c5ee107c5..2e58545f6 100644 --- a/src/sound/snd_opl_ymfm.cpp +++ b/src/sound/snd_opl_ymfm.cpp @@ -28,17 +28,18 @@ extern "C" { #include <86box/snd_opl.h> } -#define RSM_FRAC 10 +#define RSM_FRAC 10 enum { FLAG_CYCLES = (1 << 0) }; -class YMFMChipBase -{ +class YMFMChipBase { public: YMFMChipBase(uint32_t clock, fm_type type, uint32_t samplerate) - : m_buf_pos(0), m_flags(0), m_type(type) + : m_buf_pos(0) + , m_flags(0) + , m_type(type) { memset(m_buffer, 0, sizeof(m_buffer)); } @@ -47,30 +48,29 @@ public: { } - fm_type type() const { return m_type; } - int8_t flags() const { return m_flags; } - void set_do_cycles(int8_t do_cycles) { do_cycles ? m_flags |= FLAG_CYCLES : m_flags &= ~FLAG_CYCLES; } - int32_t *buffer() const { return (int32_t *)m_buffer; } - void reset_buffer() { m_buf_pos = 0; } + fm_type type() const { return m_type; } + int8_t flags() const { return m_flags; } + void set_do_cycles(int8_t do_cycles) { do_cycles ? m_flags |= FLAG_CYCLES : m_flags &= ~FLAG_CYCLES; } + int32_t *buffer() const { return (int32_t *) m_buffer; } + void reset_buffer() { m_buf_pos = 0; } virtual uint32_t sample_rate() const = 0; - virtual void write(uint16_t addr, uint8_t data) = 0; - virtual void generate(int32_t *data, uint32_t num_samples) = 0; - virtual void generate_resampled(int32_t *data, uint32_t num_samples) = 0; - virtual int32_t * update() = 0; - virtual uint8_t read(uint16_t addr) = 0; + virtual void write(uint16_t addr, uint8_t data) = 0; + virtual void generate(int32_t *data, uint32_t num_samples) = 0; + virtual void generate_resampled(int32_t *data, uint32_t num_samples) = 0; + virtual int32_t *update() = 0; + virtual uint8_t read(uint16_t addr) = 0; protected: int32_t m_buffer[SOUNDBUFLEN * 2]; - int m_buf_pos; - int8_t m_flags; + int m_buf_pos; + int8_t m_flags; fm_type m_type; }; template -class YMFMChip : public YMFMChipBase, public ymfm::ymfm_interface -{ +class YMFMChip : public YMFMChipBase, public ymfm::ymfm_interface { public: YMFMChip(uint32_t clock, fm_type type, uint32_t samplerate) : YMFMChipBase(clock, type, samplerate) @@ -80,11 +80,11 @@ public: { memset(m_samples, 0, sizeof(m_samples)); memset(m_oldsamples, 0, sizeof(m_oldsamples)); - m_rateratio = (samplerate << RSM_FRAC) / m_chip.sample_rate(m_clock); - m_clock_us = 1000000 / (double) m_clock; + m_rateratio = (samplerate << RSM_FRAC) / m_chip.sample_rate(m_clock); + m_clock_us = 1000000 / (double) m_clock; m_subtract[0] = 80.0; m_subtract[1] = 320.0; - m_type = type; + m_type = type; timer_add(&m_timers[0], YMFMChip::timer1, this, 0); timer_add(&m_timers[1], YMFMChip::timer2, this, 0); @@ -126,7 +126,7 @@ public: } } -virtual void generate_resampled(int32_t *data, uint32_t num_samples) override + virtual void generate_resampled(int32_t *data, uint32_t num_samples) override { for (uint32_t i = 0; i < num_samples; i++) { while (m_samplecnt >= m_rateratio) { @@ -144,11 +144,11 @@ virtual void generate_resampled(int32_t *data, uint32_t num_samples) override } *data++ = ((int32_t) ((m_oldsamples[0] * (m_rateratio - m_samplecnt) - + m_samples[0] * m_samplecnt) - / m_rateratio)); + + m_samples[0] * m_samplecnt) + / m_rateratio)); *data++ = ((int32_t) ((m_oldsamples[1] * (m_rateratio - m_samplecnt) - + m_samples[1] * m_samplecnt) - / m_rateratio)); + + m_samples[1] * m_samplecnt) + / m_rateratio)); m_samplecnt += 1 << RSM_FRAC; } @@ -197,21 +197,20 @@ virtual void generate_resampled(int32_t *data, uint32_t num_samples) override } private: - ChipType m_chip; - uint32_t m_clock; - double m_clock_us, m_subtract[2]; + ChipType m_chip; + uint32_t m_clock; + double m_clock_us, m_subtract[2]; typename ChipType::output_data m_output; - pc_timer_t m_timers[2]; + pc_timer_t m_timers[2]; // Resampling - int32_t m_rateratio; - int32_t m_samplecnt; - int32_t m_oldsamples[2]; - int32_t m_samples[2]; + int32_t m_rateratio; + int32_t m_samplecnt; + int32_t m_oldsamples[2]; + int32_t m_samples[2]; }; -extern "C" -{ +extern "C" { #include #include #include @@ -271,7 +270,7 @@ ymfm_drv_close(void *priv) YMFMChipBase *drv = (YMFMChipBase *) priv; if (drv != NULL) - delete(drv); + delete (drv); } static uint8_t @@ -300,14 +299,16 @@ ymfm_drv_write(uint16_t port, uint8_t val, void *priv) } static int32_t * -ymfm_drv_update(void *priv) { +ymfm_drv_update(void *priv) +{ YMFMChipBase *drv = (YMFMChipBase *) priv; return drv->update(); } static void -ymfm_drv_reset_buffer(void *priv) { +ymfm_drv_reset_buffer(void *priv) +{ YMFMChipBase *drv = (YMFMChipBase *) priv; drv->reset_buffer(); @@ -321,45 +322,45 @@ ymfm_drv_set_do_cycles(void *priv, int8_t do_cycles) } const device_t ym3812_ymfm_device = { - .name = "Yamaha YM3812 OPL2 (YMFM)", + .name = "Yamaha YM3812 OPL2 (YMFM)", .internal_name = "ym3812_ymfm", - .flags = 0, - .local = FM_YM3812, - .init = ymfm_drv_init, - .close = ymfm_drv_close, - .reset = NULL, + .flags = 0, + .local = FM_YM3812, + .init = ymfm_drv_init, + .close = ymfm_drv_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ymf262_ymfm_device = { - .name = "Yamaha YMF262 OPL3 (YMFM)", + .name = "Yamaha YMF262 OPL3 (YMFM)", .internal_name = "ymf262_ymfm", - .flags = 0, - .local = FM_YMF262, - .init = ymfm_drv_init, - .close = ymfm_drv_close, - .reset = NULL, + .flags = 0, + .local = FM_YMF262, + .init = ymfm_drv_init, + .close = ymfm_drv_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ymf289b_ymfm_device = { - .name = "Yamaha YMF289B OPL3-L (YMFM)", + .name = "Yamaha YMF289B OPL3-L (YMFM)", .internal_name = "ymf289b_ymfm", - .flags = 0, - .local = FM_YMF289B, - .init = ymfm_drv_init, - .close = ymfm_drv_close, - .reset = NULL, + .flags = 0, + .local = FM_YMF289B, + .init = ymfm_drv_init, + .close = ymfm_drv_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const fm_drv_t ymfm_drv { @@ -370,5 +371,4 @@ const fm_drv_t ymfm_drv { &ymfm_drv_set_do_cycles, NULL, }; - } diff --git a/src/sound/snd_pas16.c b/src/sound/snd_pas16.c index 0dd35c049..856b29e93 100644 --- a/src/sound/snd_pas16.c +++ b/src/sound/snd_pas16.c @@ -711,7 +711,7 @@ pas16_get_buffer(int32_t *buffer, int len, void *p) buffer[c] += (pas16->pcm_buffer[c & 1][c >> 1] / 2); } - pas16->pos = 0; + pas16->pos = 0; pas16->opl.reset_buffer(pas16->opl.priv); pas16->dsp.pos = 0; } @@ -743,15 +743,15 @@ pas16_close(void *p) } const device_t pas16_device = { - .name = "Pro Audio Spectrum 16", + .name = "Pro Audio Spectrum 16", .internal_name = "pas16", - .flags = DEVICE_ISA, - .local = 0, - .init = pas16_init, - .close = pas16_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = pas16_init, + .close = pas16_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sound/snd_ps1.c b/src/sound/snd_ps1.c index 308d01589..471874d4d 100644 --- a/src/sound/snd_ps1.c +++ b/src/sound/snd_ps1.c @@ -187,15 +187,15 @@ ps1snd_close(void *priv) } const device_t ps1snd_device = { - .name = "IBM PS/1 Audio Card", + .name = "IBM PS/1 Audio Card", .internal_name = "ps1snd", - .flags = 0, - .local = 0, - .init = ps1snd_init, - .close = ps1snd_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = ps1snd_init, + .close = ps1snd_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sound/snd_pssj.c b/src/sound/snd_pssj.c index 41efc4218..e467f3238 100644 --- a/src/sound/snd_pssj.c +++ b/src/sound/snd_pssj.c @@ -237,7 +237,7 @@ pssj_close(void *p) #if defined(DEV_BRANCH) && defined(USE_TANDY_ISA) static const device_config_t pssj_isa_config[] = { -// clang-format off + // clang-format off { .name = "base", .description = "Address", @@ -268,45 +268,45 @@ static const device_config_t pssj_isa_config[] = { #endif const device_t pssj_device = { - .name = "Tandy PSSJ", + .name = "Tandy PSSJ", .internal_name = "pssj", - .flags = 0, - .local = 0, - .init = pssj_init, - .close = pssj_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = pssj_init, + .close = pssj_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t pssj_1e0_device = { - .name = "Tandy PSSJ (port 1e0h)", + .name = "Tandy PSSJ (port 1e0h)", .internal_name = "pssj_1e0", - .flags = 0, - .local = 0, - .init = pssj_1e0_init, - .close = pssj_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = pssj_1e0_init, + .close = pssj_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; #if defined(DEV_BRANCH) && defined(USE_TANDY_ISA) const device_t pssj_isa_device = { - .name = "Tandy PSSJ Clone", + .name = "Tandy PSSJ Clone", .internal_name = "pssj_isa", - .flags = DEVICE_ISA, - .local = 0, - .init = pssj_isa_init, - .close = pssj_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = pssj_isa_init, + .close = pssj_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = pssj_isa_config + .force_redraw = NULL, + .config = pssj_isa_config }; #endif diff --git a/src/sound/snd_sb.c b/src/sound/snd_sb.c index 1431365ad..53b360386 100644 --- a/src/sound/snd_sb.c +++ b/src/sound/snd_sb.c @@ -183,7 +183,7 @@ sb_get_buffer_sb2(int32_t *buffer, int len, void *p) sb_ct1335_mixer_t *mixer = &sb->mixer_sb2; int c; double out_mono = 0.0, out_l = 0.0, out_r = 0.0; - int32_t *opl_buf = NULL; + int32_t *opl_buf = NULL; if (sb->opl_enabled) opl_buf = sb->opl.update(sb->opl.priv); @@ -266,11 +266,11 @@ sb_get_buffer_sbpro(int32_t *buffer, int len, void *p) sb_ct1345_mixer_t *mixer = &sb->mixer_sbpro; int c; double out_l = 0.0, out_r = 0.0; - int32_t *opl_buf = NULL, *opl2_buf = NULL; + int32_t *opl_buf = NULL, *opl2_buf = NULL; if (sb->opl_enabled) { if (sb->dsp.sb_type == SBPRO) { - opl_buf = sb->opl.update(sb->opl.priv); + opl_buf = sb->opl.update(sb->opl.priv); opl2_buf = sb->opl2.update(sb->opl2.priv); } else opl_buf = sb->opl.update(sb->opl.priv); @@ -347,7 +347,7 @@ sb_get_buffer_sb16_awe32(int32_t *buffer, int len, void *p) int32_t in_l, in_r; double out_l = 0.0, out_r = 0.0; double bass_treble; - int32_t *opl_buf = NULL; + int32_t *opl_buf = NULL; if (sb->opl_enabled) opl_buf = sb->opl.update(sb->opl.priv); @@ -1216,8 +1216,8 @@ static void sb_16_reply_mca_write(int port, uint8_t val, void *p) { uint16_t addr, mpu401_addr; - int low_dma, high_dma; - sb_t *sb = (sb_t *) p; + int low_dma, high_dma; + sb_t *sb = (sb_t *) p; if (port < 0x102) return; @@ -1245,21 +1245,21 @@ sb_16_reply_mca_write(int port, uint8_t val, void *p) if (addr) { io_removehandler(addr, 0x0004, - sb->opl.read, NULL, NULL, - sb->opl.write, NULL, NULL, - sb->opl.priv); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_removehandler(addr + 8, 0x0002, - sb->opl.read, NULL, NULL, - sb->opl.write, NULL, NULL, - sb->opl.priv); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_removehandler(0x0388, 0x0004, - sb->opl.read, NULL, NULL, - sb->opl.write, NULL, NULL, - sb->opl.priv); + sb->opl.read, NULL, NULL, + sb->opl.write, NULL, NULL, + sb->opl.priv); io_removehandler(addr + 4, 0x0002, - sb_ct1745_mixer_read, NULL, NULL, - sb_ct1745_mixer_write, NULL, NULL, - sb); + sb_ct1745_mixer_read, NULL, NULL, + sb_ct1745_mixer_write, NULL, NULL, + sb); } /* DSP I/O handler is activated in sb_dsp_setaddr */ @@ -1337,7 +1337,7 @@ sb_16_reply_mca_write(int port, uint8_t val, void *p) break; } - low_dma = sb->pos_regs[3] & 3; + low_dma = sb->pos_regs[3] & 3; high_dma = (sb->pos_regs[3] >> 4) & 7; if (!high_dma) high_dma = low_dma; @@ -1945,7 +1945,7 @@ sb_16_reply_mca_init(const device_t *info) sb_dsp_init(&sb->dsp, SB16, SB_SUBTYPE_DEFAULT, sb); sb_ct1745_mixer_reset(sb); - sb->mixer_enabled = 1; + sb->mixer_enabled = 1; sb->mixer_sb16.output_filter = 1; sound_add_handler(sb_get_buffer_sb16_awe32, sb); sound_set_cd_audio_filter(sb16_awe32_filter_cd_audio, sb); diff --git a/src/sound/snd_sb_dsp.c b/src/sound/snd_sb_dsp.c index c87f45e2f..3832c4485 100644 --- a/src/sound/snd_sb_dsp.c +++ b/src/sound/snd_sb_dsp.c @@ -349,11 +349,11 @@ sb_start_dma(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len) dsp->sb_pausetime = -1; if (dma8) { - dsp->sb_8_length = dsp->sb_8_origlength = len; - dsp->sb_8_format = format; - dsp->sb_8_autoinit = autoinit; - dsp->sb_8_pause = 0; - dsp->sb_8_enable = 1; + dsp->sb_8_length = dsp->sb_8_origlength = len; + dsp->sb_8_format = format; + dsp->sb_8_autoinit = autoinit; + dsp->sb_8_pause = 0; + dsp->sb_8_enable = 1; if (dsp->sb_16_enable && dsp->sb_16_output) dsp->sb_16_enable = 0; @@ -363,11 +363,11 @@ sb_start_dma(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len) dsp->sbleftright = dsp->sbleftright_default; dsp->sbdacpos = 0; } else { - dsp->sb_16_length = dsp->sb_16_origlength = len; - dsp->sb_16_format = format; - dsp->sb_16_autoinit = autoinit; - dsp->sb_16_pause = 0; - dsp->sb_16_enable = 1; + dsp->sb_16_length = dsp->sb_16_origlength = len; + dsp->sb_16_format = format; + dsp->sb_16_autoinit = autoinit; + dsp->sb_16_pause = 0; + dsp->sb_16_enable = 1; if (dsp->sb_8_enable && dsp->sb_8_output) dsp->sb_8_enable = 0; dsp->sb_16_output = 1; @@ -380,22 +380,22 @@ void sb_start_dma_i(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len) { if (dma8) { - dsp->sb_8_length = dsp->sb_8_origlength = len; - dsp->sb_8_format = format; - dsp->sb_8_autoinit = autoinit; - dsp->sb_8_pause = 0; - dsp->sb_8_enable = 1; + dsp->sb_8_length = dsp->sb_8_origlength = len; + dsp->sb_8_format = format; + dsp->sb_8_autoinit = autoinit; + dsp->sb_8_pause = 0; + dsp->sb_8_enable = 1; if (dsp->sb_16_enable && !dsp->sb_16_output) dsp->sb_16_enable = 0; dsp->sb_8_output = 0; if (!timer_is_enabled(&dsp->input_timer)) timer_set_delay_u64(&dsp->input_timer, dsp->sblatchi); } else { - dsp->sb_16_length = dsp->sb_16_origlength = len; - dsp->sb_16_format = format; - dsp->sb_16_autoinit = autoinit; - dsp->sb_16_pause = 0; - dsp->sb_16_enable = 1; + dsp->sb_16_length = dsp->sb_16_origlength = len; + dsp->sb_16_format = format; + dsp->sb_16_autoinit = autoinit; + dsp->sb_16_pause = 0; + dsp->sb_16_enable = 1; if (dsp->sb_8_enable && !dsp->sb_8_output) dsp->sb_8_enable = 0; dsp->sb_16_output = 0; diff --git a/src/sound/snd_sn76489.c b/src/sound/snd_sn76489.c index 125eff4d6..d63b34af6 100644 --- a/src/sound/snd_sn76489.c +++ b/src/sound/snd_sn76489.c @@ -245,7 +245,7 @@ sn76489_device_close(void *p) #if defined(DEV_BRANCH) && defined(USE_TANDY_ISA) static const device_config_t tndy_config[] = { -// clang-format off + // clang-format off { .name = "base", .description = "Address", @@ -276,45 +276,45 @@ static const device_config_t tndy_config[] = { #endif const device_t sn76489_device = { - .name = "TI SN74689 PSG", + .name = "TI SN74689 PSG", .internal_name = "sn76489", - .flags = 0, - .local = 0, - .init = sn76489_device_init, - .close = sn76489_device_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = sn76489_device_init, + .close = sn76489_device_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ncr8496_device = { - .name = "NCR8496 PSG", + .name = "NCR8496 PSG", .internal_name = "ncr8496", - .flags = 0, - .local = 0, - .init = ncr8496_device_init, - .close = sn76489_device_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = ncr8496_device_init, + .close = sn76489_device_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; #if defined(DEV_BRANCH) && defined(USE_TANDY_ISA) const device_t tndy_device = { - .name = "TNDY", + .name = "TNDY", .internal_name = "tndy", - .flags = DEVICE_ISA, - .local = 0, - .init = tndy_device_init, - .close = sn76489_device_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = tndy_device_init, + .close = sn76489_device_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = tndy_config + .force_redraw = NULL, + .config = tndy_config }; #endif diff --git a/src/sound/snd_ssi2001.c b/src/sound/snd_ssi2001.c index 211091dfa..4ce948305 100644 --- a/src/sound/snd_ssi2001.c +++ b/src/sound/snd_ssi2001.c @@ -91,7 +91,7 @@ ssi2001_close(void *p) } static const device_config_t ssi2001_config[] = { -// clang-format off + // clang-format off { .name = "base", .description = "Address", diff --git a/src/sound/snd_wss.c b/src/sound/snd_wss.c index b4859e128..5596868f2 100644 --- a/src/sound/snd_wss.c +++ b/src/sound/snd_wss.c @@ -52,7 +52,7 @@ typedef struct wss_t { uint8_t config; ad1848_t ad1848; - fm_drv_t opl; + fm_drv_t opl; int opl_enabled; uint8_t pos_regs[8]; @@ -227,7 +227,7 @@ wss_speed_changed(void *priv) } static const device_config_t wss_config[] = { -// clang-format off + // clang-format off { .name = "base", .description = "Address", @@ -268,29 +268,29 @@ static const device_config_t wss_config[] = { }; const device_t wss_device = { - .name = "Windows Sound System", + .name = "Windows Sound System", .internal_name = "wss", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 0, - .init = wss_init, - .close = wss_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 0, + .init = wss_init, + .close = wss_close, + .reset = NULL, { .available = NULL }, .speed_changed = wss_speed_changed, - .force_redraw = NULL, - .config = wss_config + .force_redraw = NULL, + .config = wss_config }; const device_t ncr_business_audio_device = { - .name = "NCR Business Audio", + .name = "NCR Business Audio", .internal_name = "ncraudio", - .flags = DEVICE_MCA, - .local = 0, - .init = ncr_audio_init, - .close = wss_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = 0, + .init = ncr_audio_init, + .close = wss_close, + .reset = NULL, { .available = NULL }, .speed_changed = wss_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; From 99893d1175c4184435cc24199b806d59d1b1d182 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:17:00 -0400 Subject: [PATCH 364/386] clang-format in src/sio/ --- src/sio/sio_82091aa.c | 282 ++++++----- src/sio/sio_acc3221.c | 454 +++++++++--------- src/sio/sio_ali5123.c | 494 ++++++++++--------- src/sio/sio_detect.c | 50 +- src/sio/sio_f82c710.c | 349 +++++++------- src/sio/sio_fdc37c669.c | 393 ++++++++------- src/sio/sio_fdc37c67x.c | 602 ++++++++++++----------- src/sio/sio_fdc37c6xx.c | 446 +++++++++-------- src/sio/sio_fdc37c93x.c | 1001 +++++++++++++++++++-------------------- src/sio/sio_fdc37m60x.c | 250 +++++----- src/sio/sio_it8661f.c | 295 ++++++------ src/sio/sio_pc87306.c | 442 +++++++++-------- src/sio/sio_pc87307.c | 561 +++++++++++----------- src/sio/sio_pc87309.c | 432 +++++++++-------- src/sio/sio_pc87310.c | 117 +++-- src/sio/sio_pc87311.c | 236 +++++---- src/sio/sio_pc87332.c | 421 ++++++++-------- src/sio/sio_prime3b.c | 156 +++--- src/sio/sio_prime3c.c | 283 ++++++----- src/sio/sio_um8669f.c | 206 ++++---- src/sio/sio_vt82c686.c | 206 ++++---- src/sio/sio_w83787f.c | 514 ++++++++++---------- src/sio/sio_w83877f.c | 550 +++++++++++---------- src/sio/sio_w83977f.c | 690 ++++++++++++++------------- 24 files changed, 4626 insertions(+), 4804 deletions(-) diff --git a/src/sio/sio_82091aa.c b/src/sio/sio_82091aa.c index 7a60aa7c4..1a7910cab 100644 --- a/src/sio/sio_82091aa.c +++ b/src/sio/sio_82091aa.c @@ -34,25 +34,22 @@ #include <86box/fdc.h> #include <86box/sio.h> - typedef struct { - uint8_t cur_reg, has_ide, - regs[81]; - uint16_t base_address; - fdc_t * fdc; - serial_t * uart[2]; + uint8_t cur_reg, has_ide, + regs[81]; + uint16_t base_address; + fdc_t *fdc; + serial_t *uart[2]; } i82091aa_t; - static void fdc_handler(i82091aa_t *dev) { fdc_remove(dev->fdc); if (dev->regs[0x10] & 0x01) - fdc_set_base(dev->fdc, (dev->regs[0x10] & 0x02) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); + fdc_set_base(dev->fdc, (dev->regs[0x10] & 0x02) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); } - static void lpt1_handler(i82091aa_t *dev) { @@ -61,67 +58,65 @@ lpt1_handler(i82091aa_t *dev) lpt1_remove(); switch ((dev->regs[0x20] >> 1) & 0x03) { - case 0x00: - lpt_port = LPT1_ADDR; - break; - case 1: - lpt_port = LPT2_ADDR; - break; - case 2: - lpt_port = LPT_MDA_ADDR; - break; - case 3: - lpt_port = 0x000; - break; + case 0x00: + lpt_port = LPT1_ADDR; + break; + case 1: + lpt_port = LPT2_ADDR; + break; + case 2: + lpt_port = LPT_MDA_ADDR; + break; + case 3: + lpt_port = 0x000; + break; } if ((dev->regs[0x20] & 0x01) && lpt_port) - lpt1_init(lpt_port); + lpt1_init(lpt_port); lpt1_irq((dev->regs[0x20] & 0x08) ? LPT1_IRQ : LPT2_IRQ); } - static void serial_handler(i82091aa_t *dev, int uart) { - int reg = (0x30 + (uart << 4)); + int reg = (0x30 + (uart << 4)); uint16_t uart_port = COM1_ADDR; serial_remove(dev->uart[uart]); switch ((dev->regs[reg] >> 1) & 0x07) { - case 0x00: - uart_port = COM1_ADDR; - break; - case 0x01: - uart_port = COM2_ADDR; - break; - case 0x02: - uart_port = 0x220; - break; - case 0x03: - uart_port = 0x228; - break; - case 0x04: - uart_port = 0x238; - break; - case 0x05: - uart_port = COM4_ADDR; - break; - case 0x06: - uart_port = 0x338; - break; - case 0x07: - uart_port = COM3_ADDR; - break; + case 0x00: + uart_port = COM1_ADDR; + break; + case 0x01: + uart_port = COM2_ADDR; + break; + case 0x02: + uart_port = 0x220; + break; + case 0x03: + uart_port = 0x228; + break; + case 0x04: + uart_port = 0x238; + break; + case 0x05: + uart_port = COM4_ADDR; + break; + case 0x06: + uart_port = 0x338; + break; + case 0x07: + uart_port = COM3_ADDR; + break; } if (dev->regs[reg] & 0x01) - serial_setup(dev->uart[uart], uart_port, (dev->regs[reg] & 0x10) ? COM1_IRQ : COM2_IRQ); + serial_setup(dev->uart[uart], uart_port, (dev->regs[reg] & 0x10) ? COM1_IRQ : COM2_IRQ); } - static void ide_handler(i82091aa_t *dev) { @@ -131,91 +126,90 @@ ide_handler(i82091aa_t *dev) ide_set_base(board, (dev->regs[0x50] & 0x02) ? 0x170 : 0x1f0); ide_set_side(board, (dev->regs[0x50] & 0x02) ? 0x376 : 0x3f6); if (dev->regs[0x50] & 0x01) - ide_set_handlers(board); + ide_set_handlers(board); } - static void i82091aa_write(uint16_t port, uint8_t val, void *priv) { i82091aa_t *dev = (i82091aa_t *) priv; - uint8_t index, valxor; - uint8_t uart = (dev->cur_reg >> 4) - 0x03; - uint8_t *reg = &(dev->regs[dev->cur_reg]); + uint8_t index, valxor; + uint8_t uart = (dev->cur_reg >> 4) - 0x03; + uint8_t *reg = &(dev->regs[dev->cur_reg]); index = (port & 1) ? 0 : 1; if (index) { - dev->cur_reg = val; - return; + dev->cur_reg = val; + return; } else if (dev->cur_reg < 0x51) - valxor = val ^ *reg; + valxor = val ^ *reg; else if (dev->cur_reg >= 0x51) - return; + return; - switch(dev->cur_reg) { - case 0x02: - *reg = (*reg & 0x78) | (val & 0x01); - break; - case 0x03: - *reg = (val & 0xf8); - break; - case 0x10: - *reg = (val & 0x83); - if (valxor & 0x03) - fdc_handler(dev); - break; - case 0x11: - *reg = (val & 0x0f); - if ((valxor & 0x04) && (val & 0x04)) - fdc_reset(dev->fdc); - break; - case 0x20: - *reg = (val & 0xef); - if (valxor & 0x07) - lpt1_handler(dev); - break; - case 0x21: - *reg = (val & 0x2f); - break; - case 0x30: case 0x40: - *reg = (val & 0x9f); - if (valxor & 0x1f) - serial_handler(dev, uart); - if (valxor & 0x80) - serial_set_clock_src(dev->uart[uart], (val & 0x80) ? 2000000.0 : (24000000.0 / 13.0)); - break; - case 0x31: case 0x41: - *reg = (val & 0x1f); - if ((valxor & 0x04) && (val & 0x04)) - serial_reset_port(dev->uart[uart]); - break; - case 0x50: - *reg = (val & 0x07); - if (dev->has_ide && (valxor & 0x03)) - ide_handler(dev); - break; + switch (dev->cur_reg) { + case 0x02: + *reg = (*reg & 0x78) | (val & 0x01); + break; + case 0x03: + *reg = (val & 0xf8); + break; + case 0x10: + *reg = (val & 0x83); + if (valxor & 0x03) + fdc_handler(dev); + break; + case 0x11: + *reg = (val & 0x0f); + if ((valxor & 0x04) && (val & 0x04)) + fdc_reset(dev->fdc); + break; + case 0x20: + *reg = (val & 0xef); + if (valxor & 0x07) + lpt1_handler(dev); + break; + case 0x21: + *reg = (val & 0x2f); + break; + case 0x30: + case 0x40: + *reg = (val & 0x9f); + if (valxor & 0x1f) + serial_handler(dev, uart); + if (valxor & 0x80) + serial_set_clock_src(dev->uart[uart], (val & 0x80) ? 2000000.0 : (24000000.0 / 13.0)); + break; + case 0x31: + case 0x41: + *reg = (val & 0x1f); + if ((valxor & 0x04) && (val & 0x04)) + serial_reset_port(dev->uart[uart]); + break; + case 0x50: + *reg = (val & 0x07); + if (dev->has_ide && (valxor & 0x03)) + ide_handler(dev); + break; } } - uint8_t i82091aa_read(uint16_t port, void *priv) { i82091aa_t *dev = (i82091aa_t *) priv; - uint8_t ret = 0xff, index; + uint8_t ret = 0xff, index; index = (port & 1) ? 0 : 1; if (index) - ret = dev->cur_reg; + ret = dev->cur_reg; else if (dev->cur_reg < 0x51) - ret = dev->regs[dev->cur_reg]; + ret = dev->regs[dev->cur_reg]; return ret; } - void i82091aa_reset(i82091aa_t *dev) { @@ -224,7 +218,7 @@ i82091aa_reset(i82091aa_t *dev) dev->regs[0x00] = 0xa0; dev->regs[0x10] = 0x01; dev->regs[0x31] = dev->regs[0x41] = 0x02; - dev->regs[0x50] = 0x01; + dev->regs[0x50] = 0x01; fdc_reset(dev->fdc); @@ -236,10 +230,9 @@ i82091aa_reset(i82091aa_t *dev) serial_set_clock_src(dev->uart[1], (24000000.0 / 13.0)); if (dev->has_ide) - ide_handler(dev); + ide_handler(dev); } - static void i82091aa_close(void *priv) { @@ -248,7 +241,6 @@ i82091aa_close(void *priv) free(dev); } - static void * i82091aa_init(const device_t *info) { @@ -267,68 +259,68 @@ i82091aa_init(const device_t *info) dev->regs[0x02] = info->local & 0xff; if (info->local & 0x08) - dev->base_address = (info->local & 0x100) ? 0x0398 : 0x0024; + dev->base_address = (info->local & 0x100) ? 0x0398 : 0x0024; else - dev->base_address = (info->local & 0x100) ? 0x026e : 0x0022; + dev->base_address = (info->local & 0x100) ? 0x026e : 0x0022; io_sethandler(dev->base_address, 0x0002, - i82091aa_read, NULL, NULL, i82091aa_write, NULL, NULL, dev); + i82091aa_read, NULL, NULL, i82091aa_write, NULL, NULL, dev); return dev; } const device_t i82091aa_device = { - .name = "Intel 82091AA Super I/O", + .name = "Intel 82091AA Super I/O", .internal_name = "i82091aa", - .flags = 0, - .local = 0x40, - .init = i82091aa_init, - .close = i82091aa_close, - .reset = NULL, + .flags = 0, + .local = 0x40, + .init = i82091aa_init, + .close = i82091aa_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i82091aa_398_device = { - .name = "Intel 82091AA Super I/O (Port 398h)", + .name = "Intel 82091AA Super I/O (Port 398h)", .internal_name = "i82091aa_398", - .flags = 0, - .local = 0x148, - .init = i82091aa_init, - .close = i82091aa_close, - .reset = NULL, + .flags = 0, + .local = 0x148, + .init = i82091aa_init, + .close = i82091aa_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i82091aa_ide_pri_device = { - .name = "Intel 82091AA Super I/O (With Primary IDE)", + .name = "Intel 82091AA Super I/O (With Primary IDE)", .internal_name = "i82091aa_ide", - .flags = 0, - .local = 0x240, - .init = i82091aa_init, - .close = i82091aa_close, - .reset = NULL, + .flags = 0, + .local = 0x240, + .init = i82091aa_init, + .close = i82091aa_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i82091aa_ide_device = { - .name = "Intel 82091AA Super I/O (With IDE)", + .name = "Intel 82091AA Super I/O (With IDE)", .internal_name = "i82091aa_ide", - .flags = 0, - .local = 0x440, - .init = i82091aa_init, - .close = i82091aa_close, - .reset = NULL, + .flags = 0, + .local = 0x440, + .init = i82091aa_init, + .close = i82091aa_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_acc3221.c b/src/sio/sio_acc3221.c index 313bbbd1a..dd0c247f0 100644 --- a/src/sio/sio_acc3221.c +++ b/src/sio/sio_acc3221.c @@ -32,86 +32,84 @@ #include <86box/fdc.h> #include <86box/sio.h> -typedef struct acc3221_t -{ - int reg_idx; - uint8_t regs[256]; - fdc_t * fdc; - serial_t * uart[2]; +typedef struct acc3221_t { + int reg_idx; + uint8_t regs[256]; + fdc_t *fdc; + serial_t *uart[2]; } acc3221_t; - /* Configuration Register Index, BE (R/W): Bit Function 7 PIRQ 5 polarity. - 1 = active high, default - 0 = active low + 1 = active high, default + 0 = active low 6 PIRQ 7 polarity. - 1 = active high, default - 0 = active low + 1 = active high, default + 0 = active low 5 Primary Parallel Port Extended Mode - 0 = Compatible mode, default - 1 = Extended/Bidirectional mode. + 0 = Compatible mode, default + 1 = Extended/Bidirectional mode. 4 Primary Parallel Port Disable - 1 = Disable, 0 = Enable - Power Up Default is set by pin 120 - (3221-DP)/pin 96 (3221-SP) + 1 = Disable, 0 = Enable + Power Up Default is set by pin 120 + (3221-DP)/pin 96 (3221-SP) 3 Primary Parallel Port Power Down - 1 = Power Down, default = 0 + 1 = Power Down, default = 0 2** Secondary Parallel Port Extended - Mode - 0 = Compatible mode, default - 1 = Extended/Bidirectional mode. + Mode + 0 = Compatible mode, default + 1 = Extended/Bidirectional mode. 1** Secondary Parallel Port Disable - 1 = Disable, 0 = Enable - Power Up Default is set by pin 77 - (3221-DP) + 1 = Disable, 0 = Enable + Power Up Default is set by pin 77 + (3221-DP) 0** Secondary Parallel Port Power Down - 1 = Power Down - 0 = Enable, default + 1 = Power Down + 0 = Enable, default Note: Power Up not applicable to 3221-EP. */ #define REG_BE_LPT1_DISABLE (3 << 3) -#define REG_BE_LPT2_DISABLE (3 << 0) /* 3221-DP/EP only */ +#define REG_BE_LPT2_DISABLE (3 << 0) /* 3221-DP/EP only */ /* Configuration Register Index, BF (R/W): Bit Function 7-0 The 8 most significant address bits of - the primary parallel port (A9-2) - Default 9E (LPT2, at 278-27B) */ + the primary parallel port (A9-2) + Default 9E (LPT2, at 278-27B) */ /* Configuration Register Index, DA (R/W)**: Bit Function 7-0 The 8 most significant address bits of - the secondary parallel port (A9-2) - Default DE (LPT1, at 378-37B) */ + the secondary parallel port (A9-2) + Default DE (LPT1, at 378-37B) */ /* Configuration Register Index, DB (R/W): Bit Function 7 SIRQ4 polarity. - 1 = active high; default - 0 = active low + 1 = active high; default + 0 = active low 6 SIRQ3 polarity. - 1 = active high; default - 0 = active low + 1 = active high; default + 0 = active low 5 SXTAL clock off. 1 = SCLK off, - 0 = SCKL on, default + 0 = SCKL on, default 4 Primary serial port disable - 1 = Disable, 0 = Enable - Power Up default is set by pin 116 - (3221-DP)/pin 93 (3221-SP) + 1 = Disable, 0 = Enable + Power Up default is set by pin 116 + (3221-DP)/pin 93 (3221-SP) 3 Primary serial port power down - 1 = Power down, 0 = Enable - Power Up default is set by pin 116 - (3221-DP)/pin 93 (3221-SP) + 1 = Power down, 0 = Enable + Power Up default is set by pin 116 + (3221-DP)/pin 93 (3221-SP) 2 Reserved 1 Secondary serial port disable - 1 = Disable, 0 = Enable - Power Up default is set by pin 121 - (3221-DP)/pin 97 (3221-SP) + 1 = Disable, 0 = Enable + Power Up default is set by pin 121 + (3221-DP)/pin 97 (3221-SP) 0 Secondary serial port power down - 1 = Power down, 0 = Enable - Power Up default is set by pin 121 - (3221-DP)/pin 97 (3221-SP) + 1 = Power down, 0 = Enable + Power Up default is set by pin 121 + (3221-DP)/pin 97 (3221-SP) Note: Power Up not applicable to 3221-EP. */ #define REG_DB_SERIAL1_DISABLE (3 << 3) #define REG_DB_SERIAL2_DISABLE (3 << 0) @@ -119,56 +117,56 @@ typedef struct acc3221_t /* Configuration Register Index, DC (R/W): Bit Function 7-1 The MSB of the Primary Serial Port - Address (bits A9-3). - Default = 7F (COM1, at 3F8-3FF). + Address (bits A9-3). + Default = 7F (COM1, at 3F8-3FF). 0 When this bit is set to 1, bit A2 of - primary parallel port is decoded. - Default is 0. */ + primary parallel port is decoded. + Default is 0. */ /* Configuration Register Index, DD (R/W): Bit Function 7-1 The MSB of the Secondary Serial Port - Address (bits A9-3). - Default = 5F (COM2, at 2F8-2FF). + Address (bits A9-3). + Default = 5F (COM2, at 2F8-2FF). 0** When this bit is set to 1, bit A2 of - secondary parallel port is decoded. - Default is 0. */ + secondary parallel port is decoded. + Default is 0. */ /* Configuration Register Index, DE (R/W): Bit Function 7-6 SIRQ3 source - b7 b6 - 0 0 Disabled, tri-stated - 0 1 Disabled, tri-stated** - 1 0 Primary serial port - 1 1 Secondary serial port, - default + b7 b6 + 0 0 Disabled, tri-stated + 0 1 Disabled, tri-stated** + 1 0 Primary serial port + 1 1 Secondary serial port, + default 5-4 SIRQ4 source - b5 b4 - 0 0 Disabled, tri-stated - 0 1 Disabled, tri-stated** - 1 0 Primary serial port, - default - 1 1 Secondary serial port + b5 b4 + 0 0 Disabled, tri-stated + 0 1 Disabled, tri-stated** + 1 0 Primary serial port, + default + 1 1 Secondary serial port 3-2** PIRQ7 source - b3 b2 - 0 0 Diabled, tri-stated, - default - 0 1 Primary serial port - 1 0 Primary parallel port - 1 1 Secondary parallel - port + b3 b2 + 0 0 Diabled, tri-stated, + default + 0 1 Primary serial port + 1 0 Primary parallel port + 1 1 Secondary parallel + port Note: Bits 3-2 are reserved in 3221-SP. 1-0 PIRQ5 source - b1 b0 - 0 0 Disabled, tri-stated - 0 1 Secondary serial port - 1 0 Primary parallel port, - default - 1 1 Secondary parallel - port** */ + b1 b0 + 0 0 Disabled, tri-stated + 0 1 Secondary serial port + 1 0 Primary parallel port, + default + 1 1 Secondary parallel + port** */ #define REG_DE_SIRQ3_SOURCE (3 << 6) #define REG_DE_SIRQ3_SERIAL1 (1 << 6) #define REG_DE_SIRQ3_SERIAL2 (3 << 6) @@ -188,29 +186,29 @@ typedef struct acc3221_t Bit Function 7-6 Reserved 5 RTC interface disable - 1 = /RTCCS disabled - 0 = /RTCCS enabled, default + 1 = /RTCCS disabled + 0 = /RTCCS enabled, default 4 Disable Modem Select - 1 = Moden CS disabled, default - 0 = Modem CS enabled + 1 = Moden CS disabled, default + 0 = Modem CS enabled 3-2 - b3 b2 - 1 1 Reserved - 1 0 Modem port address - = 3E8-3EF (default) - 0 1 Modem port address: - 2F8-2FF - 0 0 Modem port address: - 3F8-3FF + b3 b2 + 1 1 Reserved + 1 0 Modem port address + = 3E8-3EF (default) + 0 1 Modem port address: + 2F8-2FF + 0 0 Modem port address: + 3F8-3FF 1-0 - b1 b0 - 1 1 Reserved - 1 0 Mode 2, EISA Mode - 0 1 Mode 1, AT BUS, - 0 0 Mode 0, Two parallel - ports, default */ + b1 b0 + 1 1 Reserved + 1 0 Mode 2, EISA Mode + 0 1 Mode 1, AT BUS, + 0 0 Mode 0, Two parallel + ports, default */ /* Configuration Register Index, FA (R/W)**: Bit Function @@ -227,90 +225,88 @@ typedef struct acc3221_t Bit Function 7 Reserved 6** 0/2 EXG (Read Only) - In mode 1 and mode 2 - operation, when the third - floppy drive is installed, pin - EXTFDD should be pulled - high to enable the third floppy - drive or be pulled low to - disable the third floppy drive. - 1 = Third floppy drive enabled - 0 = Third floppy drive disabled + In mode 1 and mode 2 + operation, when the third + floppy drive is installed, pin + EXTFDD should be pulled + high to enable the third floppy + drive or be pulled low to + disable the third floppy drive. + 1 = Third floppy drive enabled + 0 = Third floppy drive disabled 5** EXTFDD (Read Only) - In mode 1 and mode 2 - operation, when the third - floppy drive is installed and - pin 0/2 EXG is pulled high, - the third floppy drive becomes - the bootable drive (drive 0). - When pi 0/2 EXG is pulled low, - the third floppy drive acts as - drive 2. - 1 = Third floppy drive as drive 0 (bootable) - 0 = Third floppy drive as drive 2 + In mode 1 and mode 2 + operation, when the third + floppy drive is installed and + pin 0/2 EXG is pulled high, + the third floppy drive becomes + the bootable drive (drive 0). + When pi 0/2 EXG is pulled low, + the third floppy drive acts as + drive 2. + 1 = Third floppy drive as drive 0 (bootable) + 0 = Third floppy drive as drive 2 4** MS - In mode 1 and mode 2, t his bit is to - control the output pin MS to support a - special 3 1/2", 1.2M drive. When this - bit is set to high (1), the MS pin sends - a low signal. When this bit is set to - low (0), the MS pin sends a high - signal to support a 3 1/2", 1.2M drive. + In mode 1 and mode 2, t his bit is to + control the output pin MS to support a + special 3 1/2", 1.2M drive. When this + bit is set to high (1), the MS pin sends + a low signal. When this bit is set to + low (0), the MS pin sends a high + signal to support a 3 1/2", 1.2M drive. 3 FDC, Clock disable - 0 = enable, default - 1 = disable + 0 = enable, default + 1 = disable 2 Reserved 1 FDC disable - 0 = enable, 1= disable - Power Upd efault set by pin 117 (3221- - DP)/pin 94 (3221-SP) + 0 = enable, 1= disable + Power Upd efault set by pin 117 (3221- + DP)/pin 94 (3221-SP) 0 FDC address - 0 = Primary, default - 1 = Secondary + 0 = Primary, default + 1 = Secondary Note: Bits 6-4 are reserved in 3221-SP. */ #define REG_FB_FDC_DISABLE (1 << 1) /* Configuration Register Index, FB (R/W)**: Bit Function 7** Disable general chip select 1 - 1 = disable, default - 0 = enable + 1 = disable, default + 0 = enable 6** Disable general chip select 2 - 1 = disable, default - 0 = enable + 1 = disable, default + 0 = enable 5** Enable SA2 decoding for general chip - select 1 - 1 = enable - 0 = disable, default + select 1 + 1 = enable + 0 = disable, default 4** Enable SA2 decoding for general chip - select 2 - 1 = enable - 0 = disable, default + select 2 + 1 = enable + 0 = disable, default 3 Reserved 2 IDE XT selected - 0 = IDE AT interface, default - 1 = IDE XT interface + 0 = IDE AT interface, default + 1 = IDE XT interface 1 IDE disable, 1 = IDE disable - 0 = IDE enable - Power Up default set by pin 13 (3221- - DP)/pin 13 (3221-SP) + 0 = IDE enable + Power Up default set by pin 13 (3221- + DP)/pin 13 (3221-SP) 0 Secondary IDE - 1 = secondary - 0 = primary, default + 1 = secondary + 0 = primary, default Note: Bits 6-4 are reserved in 3221-SP. */ #define REG_FE_IDE_DISABLE (1 << 1) - static void acc3221_lpt_handle(acc3221_t *dev) { lpt1_remove(); if (!(dev->regs[0xbe] & REG_BE_LPT1_DISABLE)) - lpt1_init(dev->regs[0xbf] << 2); + lpt1_init(dev->regs[0xbf] << 2); } - static void acc3221_serial1_handler(acc3221_t *dev) { @@ -319,16 +315,15 @@ acc3221_serial1_handler(acc3221_t *dev) serial_remove(dev->uart[0]); if (!(dev->regs[0xdb] & REG_DB_SERIAL1_DISABLE)) { - com_addr = ((dev->regs[0xdc] & 0xfe) << 2); + com_addr = ((dev->regs[0xdc] & 0xfe) << 2); - if ((dev->regs[0xde] & REG_DE_SIRQ3_SOURCE) == REG_DE_SIRQ3_SERIAL1) - serial_setup(dev->uart[0], com_addr, 3); - else if ((dev->regs[0xde] & REG_DE_SIRQ4_SOURCE) == REG_DE_SIRQ4_SERIAL1) - serial_setup(dev->uart[0], com_addr, 4); + if ((dev->regs[0xde] & REG_DE_SIRQ3_SOURCE) == REG_DE_SIRQ3_SERIAL1) + serial_setup(dev->uart[0], com_addr, 3); + else if ((dev->regs[0xde] & REG_DE_SIRQ4_SOURCE) == REG_DE_SIRQ4_SERIAL1) + serial_setup(dev->uart[0], com_addr, 4); } } - static void acc3221_serial2_handler(acc3221_t *dev) { @@ -337,100 +332,97 @@ acc3221_serial2_handler(acc3221_t *dev) serial_remove(dev->uart[1]); if (!(dev->regs[0xdb] & REG_DB_SERIAL2_DISABLE)) { - com_addr = ((dev->regs[0xdd] & 0xfe) << 2); + com_addr = ((dev->regs[0xdd] & 0xfe) << 2); - if ((dev->regs[0xde] & REG_DE_SIRQ3_SOURCE) == REG_DE_SIRQ3_SERIAL2) - serial_setup(dev->uart[1], com_addr, 3); - else if ((dev->regs[0xde] & REG_DE_SIRQ4_SOURCE) == REG_DE_SIRQ4_SERIAL2) - serial_setup(dev->uart[1], com_addr, 4); - else if ((dev->regs[0xde] & REG_DE_PIRQ5_SOURCE) == REG_DE_PIRQ5_SERIAL2) - serial_setup(dev->uart[1], com_addr, 5); + if ((dev->regs[0xde] & REG_DE_SIRQ3_SOURCE) == REG_DE_SIRQ3_SERIAL2) + serial_setup(dev->uart[1], com_addr, 3); + else if ((dev->regs[0xde] & REG_DE_SIRQ4_SOURCE) == REG_DE_SIRQ4_SERIAL2) + serial_setup(dev->uart[1], com_addr, 4); + else if ((dev->regs[0xde] & REG_DE_PIRQ5_SOURCE) == REG_DE_PIRQ5_SERIAL2) + serial_setup(dev->uart[1], com_addr, 5); } } - static void acc3221_write(uint16_t addr, uint8_t val, void *p) { - acc3221_t *dev = (acc3221_t *)p; - uint8_t old; + acc3221_t *dev = (acc3221_t *) p; + uint8_t old; if (!(addr & 1)) - dev->reg_idx = val; + dev->reg_idx = val; else { - old = dev->regs[dev->reg_idx]; - dev->regs[dev->reg_idx] = val; + old = dev->regs[dev->reg_idx]; + dev->regs[dev->reg_idx] = val; - switch (dev->reg_idx) { - case 0xbe: - if ((old ^ val) & REG_BE_LPT1_DISABLE) - acc3221_lpt_handle(dev); - break; + switch (dev->reg_idx) { + case 0xbe: + if ((old ^ val) & REG_BE_LPT1_DISABLE) + acc3221_lpt_handle(dev); + break; - case 0xbf: - if (old != val) - acc3221_lpt_handle(dev); - break; + case 0xbf: + if (old != val) + acc3221_lpt_handle(dev); + break; - case 0xdb: - if ((old ^ val) & REG_DB_SERIAL2_DISABLE) - acc3221_serial2_handler(dev); - if ((old ^ val) & REG_DB_SERIAL1_DISABLE) - acc3221_serial1_handler(dev); - break; + case 0xdb: + if ((old ^ val) & REG_DB_SERIAL2_DISABLE) + acc3221_serial2_handler(dev); + if ((old ^ val) & REG_DB_SERIAL1_DISABLE) + acc3221_serial1_handler(dev); + break; - case 0xdc: - if (old != val) - acc3221_serial1_handler(dev); - break; + case 0xdc: + if (old != val) + acc3221_serial1_handler(dev); + break; - case 0xdd: - if (old != val) - acc3221_serial2_handler(dev); - break; + case 0xdd: + if (old != val) + acc3221_serial2_handler(dev); + break; - case 0xde: - if ((old ^ val) & (REG_DE_SIRQ3_SOURCE | REG_DE_SIRQ4_SOURCE)) { - acc3221_serial2_handler(dev); - acc3221_serial1_handler(dev); - } - break; + case 0xde: + if ((old ^ val) & (REG_DE_SIRQ3_SOURCE | REG_DE_SIRQ4_SOURCE)) { + acc3221_serial2_handler(dev); + acc3221_serial1_handler(dev); + } + break; - case 0xfb: - if ((old ^ val) & REG_FB_FDC_DISABLE) { - fdc_remove(dev->fdc); - if (!(dev->regs[0xfb] & REG_FB_FDC_DISABLE)) - fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR); - } - break; + case 0xfb: + if ((old ^ val) & REG_FB_FDC_DISABLE) { + fdc_remove(dev->fdc); + if (!(dev->regs[0xfb] & REG_FB_FDC_DISABLE)) + fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR); + } + break; - case 0xfe: - if ((old ^ val) & REG_FE_IDE_DISABLE) { - ide_pri_disable(); - if (!(dev->regs[0xfe] & REG_FE_IDE_DISABLE)) - ide_pri_enable(); - } - break; - } + case 0xfe: + if ((old ^ val) & REG_FE_IDE_DISABLE) { + ide_pri_disable(); + if (!(dev->regs[0xfe] & REG_FE_IDE_DISABLE)) + ide_pri_enable(); + } + break; + } } } - static uint8_t acc3221_read(uint16_t addr, void *p) { - acc3221_t *dev = (acc3221_t *)p; + acc3221_t *dev = (acc3221_t *) p; if (!(addr & 1)) - return dev->reg_idx; + return dev->reg_idx; if (dev->reg_idx < 0xbc) - return 0xff; + return 0xff; return dev->regs[dev->reg_idx]; } - static void acc3221_reset(acc3221_t *dev) { @@ -455,7 +447,6 @@ acc3221_close(void *priv) free(dev); } - static void * acc3221_init(const device_t *info) { @@ -467,24 +458,23 @@ acc3221_init(const device_t *info) dev->uart[0] = device_add_inst(&ns16450_device, 1); dev->uart[1] = device_add_inst(&ns16450_device, 2); - io_sethandler(0x00f2, 0x0002, acc3221_read, NULL, NULL, acc3221_write, NULL, NULL, dev); + io_sethandler(0x00f2, 0x0002, acc3221_read, NULL, NULL, acc3221_write, NULL, NULL, dev); acc3221_reset(dev); return dev; } - const device_t acc3221_device = { - .name = "ACC 3221-SP Super I/O", + .name = "ACC 3221-SP Super I/O", .internal_name = "acc3221", - .flags = 0, - .local = 0, - .init = acc3221_init, - .close = acc3221_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = acc3221_init, + .close = acc3221_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_ali5123.c b/src/sio/sio_ali5123.c index 79d9219ba..5c52bbc88 100644 --- a/src/sio/sio_ali5123.c +++ b/src/sio/sio_ali5123.c @@ -34,25 +34,21 @@ #include "cpu.h" #include <86box/sio.h> - -#define AB_RST 0x80 - +#define AB_RST 0x80 typedef struct { uint8_t chip_id, is_apm, - tries, - regs[48], - ld_regs[13][256]; + tries, + regs[48], + ld_regs[13][256]; int locked, - cur_reg; - fdc_t *fdc; + cur_reg; + fdc_t *fdc; serial_t *uart[3]; } ali5123_t; - -static void ali5123_write(uint16_t port, uint8_t val, void *priv); -static uint8_t ali5123_read(uint16_t port, void *priv); - +static void ali5123_write(uint16_t port, uint8_t val, void *priv); +static uint8_t ali5123_read(uint16_t port, void *priv); static uint16_t make_port(ali5123_t *dev, uint8_t ld) @@ -65,74 +61,71 @@ make_port(ali5123_t *dev, uint8_t ld) return p; } - static void ali5123_fdc_handler(ali5123_t *dev) { - uint16_t ld_port = 0; - uint8_t global_enable = !!(dev->regs[0x22] & (1 << 0)); - uint8_t local_enable = !!dev->ld_regs[0][0x30]; + uint16_t ld_port = 0; + uint8_t global_enable = !!(dev->regs[0x22] & (1 << 0)); + uint8_t local_enable = !!dev->ld_regs[0][0x30]; fdc_remove(dev->fdc); if (global_enable && local_enable) { - ld_port = make_port(dev, 0) & 0xFFF8; - if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) - fdc_set_base(dev->fdc, ld_port); + ld_port = make_port(dev, 0) & 0xFFF8; + if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) + fdc_set_base(dev->fdc, ld_port); } } - static void ali5123_lpt_handler(ali5123_t *dev) { - uint16_t ld_port = 0; - uint8_t global_enable = !!(dev->regs[0x22] & (1 << 3)); - uint8_t local_enable = !!dev->ld_regs[3][0x30]; - uint8_t lpt_irq = dev->ld_regs[3][0x70]; + uint16_t ld_port = 0; + uint8_t global_enable = !!(dev->regs[0x22] & (1 << 3)); + uint8_t local_enable = !!dev->ld_regs[3][0x30]; + uint8_t lpt_irq = dev->ld_regs[3][0x70]; if (lpt_irq > 15) - lpt_irq = 0xff; + lpt_irq = 0xff; lpt1_remove(); if (global_enable && local_enable) { - ld_port = make_port(dev, 3) & 0xFFFC; - if ((ld_port >= 0x0100) && (ld_port <= 0x0FFC)) - lpt1_init(ld_port); + ld_port = make_port(dev, 3) & 0xFFFC; + if ((ld_port >= 0x0100) && (ld_port <= 0x0FFC)) + lpt1_init(ld_port); } lpt1_irq(lpt_irq); } - static void ali5123_serial_handler(ali5123_t *dev, int uart) { - uint16_t ld_port = 0; - uint8_t uart_no = (uart == 2) ? 0x0b : (4 + uart); - uint8_t global_enable = !!(dev->regs[0x22] & (1 << uart_no)); - uint8_t local_enable = !!dev->ld_regs[uart_no][0x30]; - uint8_t mask = (uart == 1) ? 0x04 : 0x05; + uint16_t ld_port = 0; + uint8_t uart_no = (uart == 2) ? 0x0b : (4 + uart); + uint8_t global_enable = !!(dev->regs[0x22] & (1 << uart_no)); + uint8_t local_enable = !!dev->ld_regs[uart_no][0x30]; + uint8_t mask = (uart == 1) ? 0x04 : 0x05; serial_remove(dev->uart[uart]); if (global_enable && local_enable) { - ld_port = make_port(dev, uart_no) & 0xFFF8; - if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) - serial_setup(dev->uart[uart], ld_port, dev->ld_regs[uart_no][0x70]); + ld_port = make_port(dev, uart_no) & 0xFFF8; + if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) + serial_setup(dev->uart[uart], ld_port, dev->ld_regs[uart_no][0x70]); } switch (dev->ld_regs[uart_no][0xf0] & mask) { - case 0x00: - serial_set_clock_src(dev->uart[uart], 1843200.0); - break; - case 0x04: - serial_set_clock_src(dev->uart[uart], 8000000.0); - break; - case 0x01: case 0x05: - serial_set_clock_src(dev->uart[uart], 2000000.0); - break; + case 0x00: + serial_set_clock_src(dev->uart[uart], 1843200.0); + break; + case 0x04: + serial_set_clock_src(dev->uart[uart], 8000000.0); + break; + case 0x01: + case 0x05: + serial_set_clock_src(dev->uart[uart], 2000000.0); + break; } } - static void ali5123_reset(ali5123_t *dev) { @@ -145,7 +138,7 @@ ali5123_reset(ali5123_t *dev) dev->regs[0x2d] = 0x20; for (i = 0; i < 13; i++) - memset(dev->ld_regs[i], 0, 256); + memset(dev->ld_regs[i], 0, 256); /* Logical device 0: FDD */ dev->ld_regs[0][0x60] = 3; @@ -208,227 +201,228 @@ ali5123_reset(ali5123_t *dev) dev->locked = 0; } - static void ali5123_write(uint16_t port, uint8_t val, void *priv) { - ali5123_t *dev = (ali5123_t *) priv; - uint8_t index = (port & 1) ? 0 : 1; - uint8_t valxor = 0x00, keep = 0x00; - uint8_t cur_ld; + ali5123_t *dev = (ali5123_t *) priv; + uint8_t index = (port & 1) ? 0 : 1; + uint8_t valxor = 0x00, keep = 0x00; + uint8_t cur_ld; if (index) { - if (((val == 0x51) && (!dev->tries) && (!dev->locked)) || - ((val == 0x23) && (dev->tries) && (!dev->locked))) { - if (dev->tries) { - dev->locked = 1; - fdc_3f1_enable(dev->fdc, 0); - dev->tries = 0; - } else - dev->tries++; - } else { - if (dev->locked) { - if (val == 0xbb) { - dev->locked = 0; - fdc_3f1_enable(dev->fdc, 1); - return; - } - dev->cur_reg = val; - } else { - if (dev->tries) - dev->tries = 0; - } - } - return; + if (((val == 0x51) && (!dev->tries) && (!dev->locked)) || ((val == 0x23) && (dev->tries) && (!dev->locked))) { + if (dev->tries) { + dev->locked = 1; + fdc_3f1_enable(dev->fdc, 0); + dev->tries = 0; + } else + dev->tries++; + } else { + if (dev->locked) { + if (val == 0xbb) { + dev->locked = 0; + fdc_3f1_enable(dev->fdc, 1); + return; + } + dev->cur_reg = val; + } else { + if (dev->tries) + dev->tries = 0; + } + } + return; } else { - if (dev->locked) { - if (dev->cur_reg < 48) { - valxor = val ^ dev->regs[dev->cur_reg]; - if ((val == 0x1f) || (val == 0x20) || (val == 0x21)) - return; - dev->regs[dev->cur_reg] = val; - } else { - valxor = val ^ dev->ld_regs[dev->regs[7]][dev->cur_reg]; - if (((dev->cur_reg & 0xf0) == 0x70) && (dev->regs[7] < 4)) - return; - /* Block writes to some logical devices. */ - if (dev->regs[7] > 0x0c) - return; - else switch (dev->regs[7]) { - case 0x01: case 0x02: case 0x06: case 0x08: - case 0x09: case 0x0a: - return; - } - dev->ld_regs[dev->regs[7]][dev->cur_reg] = val | keep; - } - } else - return; + if (dev->locked) { + if (dev->cur_reg < 48) { + valxor = val ^ dev->regs[dev->cur_reg]; + if ((val == 0x1f) || (val == 0x20) || (val == 0x21)) + return; + dev->regs[dev->cur_reg] = val; + } else { + valxor = val ^ dev->ld_regs[dev->regs[7]][dev->cur_reg]; + if (((dev->cur_reg & 0xf0) == 0x70) && (dev->regs[7] < 4)) + return; + /* Block writes to some logical devices. */ + if (dev->regs[7] > 0x0c) + return; + else + switch (dev->regs[7]) { + case 0x01: + case 0x02: + case 0x06: + case 0x08: + case 0x09: + case 0x0a: + return; + } + dev->ld_regs[dev->regs[7]][dev->cur_reg] = val | keep; + } + } else + return; } if (dev->cur_reg < 48) { - switch(dev->cur_reg) { - case 0x02: - if (val & 0x01) - ali5123_reset(dev); - dev->regs[0x02] = 0x00; - break; - case 0x22: - if (valxor & 0x01) - ali5123_fdc_handler(dev); - if (valxor & 0x08) - ali5123_lpt_handler(dev); - if (valxor & 0x10) - ali5123_serial_handler(dev, 0); - if (valxor & 0x20) - ali5123_serial_handler(dev, 1); - if (valxor & 0x40) - ali5123_serial_handler(dev, 2); - break; - } + switch (dev->cur_reg) { + case 0x02: + if (val & 0x01) + ali5123_reset(dev); + dev->regs[0x02] = 0x00; + break; + case 0x22: + if (valxor & 0x01) + ali5123_fdc_handler(dev); + if (valxor & 0x08) + ali5123_lpt_handler(dev); + if (valxor & 0x10) + ali5123_serial_handler(dev, 0); + if (valxor & 0x20) + ali5123_serial_handler(dev, 1); + if (valxor & 0x40) + ali5123_serial_handler(dev, 2); + break; + } - return; + return; } cur_ld = dev->regs[7]; if ((dev->regs[7] == 5) && (dev->regs[0x2d] & 0x20)) - cur_ld = 0x0b; + cur_ld = 0x0b; else if ((dev->regs[7] == 0x0b) && (dev->regs[0x2d] & 0x20)) - cur_ld = 5; - switch(cur_ld) { - case 0: - /* FDD */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - if ((dev->cur_reg == 0x30) && (val & 0x01)) - dev->regs[0x22] |= 0x01; - if (valxor) - ali5123_fdc_handler(dev); - break; - case 0xf0: - if (valxor & 0x08) - fdc_update_enh_mode(dev->fdc, !(val & 0x08)); - if (valxor & 0x10) - fdc_set_swap(dev->fdc, (val & 0x10) >> 4); - break; - case 0xf1: - if (valxor & 0xc) - fdc_update_densel_force(dev->fdc, (val & 0xc) >> 2); - break; - case 0xf4: - if (valxor & 0x08) - fdc_update_drvrate(dev->fdc, 0, (val & 0x08) >> 3); - break; - case 0xf5: - if (valxor & 0x08) - fdc_update_drvrate(dev->fdc, 1, (val & 0x08) >> 3); - break; - case 0xf6: - if (valxor & 0x08) - fdc_update_drvrate(dev->fdc, 2, (val & 0x08) >> 3); - break; - case 0xf7: - if (valxor & 0x08) - fdc_update_drvrate(dev->fdc, 3, (val & 0x08) >> 3); - break; - } - break; - case 3: - /* Parallel port */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - case 0x70: - if ((dev->cur_reg == 0x30) && (val & 0x01)) - dev->regs[0x22] |= 0x08; - if (valxor) - ali5123_lpt_handler(dev); - break; - } - break; - case 4: - /* Serial port 1 */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - case 0x70: - case 0xf0: - if ((dev->cur_reg == 0x30) && (val & 0x01)) - dev->regs[0x22] |= 0x10; - if (valxor) - ali5123_serial_handler(dev, 0); - break; - } - break; - case 5: - /* Serial port 2 - HP like module */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - case 0x70: - case 0xf0: - if ((dev->cur_reg == 0x30) && (val & 0x01)) - dev->regs[0x22] |= 0x20; - if (valxor) - ali5123_serial_handler(dev, 1); - break; - } - break; - case 0x0b: - /* Serial port 3 */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - case 0x70: - case 0xf0: - if ((dev->cur_reg == 0x30) && (val & 0x01)) - dev->regs[0x22] |= 0x40; - if (valxor) - ali5123_serial_handler(dev, 2); - break; - } - break; + cur_ld = 5; + switch (cur_ld) { + case 0: + /* FDD */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x01; + if (valxor) + ali5123_fdc_handler(dev); + break; + case 0xf0: + if (valxor & 0x08) + fdc_update_enh_mode(dev->fdc, !(val & 0x08)); + if (valxor & 0x10) + fdc_set_swap(dev->fdc, (val & 0x10) >> 4); + break; + case 0xf1: + if (valxor & 0xc) + fdc_update_densel_force(dev->fdc, (val & 0xc) >> 2); + break; + case 0xf4: + if (valxor & 0x08) + fdc_update_drvrate(dev->fdc, 0, (val & 0x08) >> 3); + break; + case 0xf5: + if (valxor & 0x08) + fdc_update_drvrate(dev->fdc, 1, (val & 0x08) >> 3); + break; + case 0xf6: + if (valxor & 0x08) + fdc_update_drvrate(dev->fdc, 2, (val & 0x08) >> 3); + break; + case 0xf7: + if (valxor & 0x08) + fdc_update_drvrate(dev->fdc, 3, (val & 0x08) >> 3); + break; + } + break; + case 3: + /* Parallel port */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x08; + if (valxor) + ali5123_lpt_handler(dev); + break; + } + break; + case 4: + /* Serial port 1 */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + case 0xf0: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x10; + if (valxor) + ali5123_serial_handler(dev, 0); + break; + } + break; + case 5: + /* Serial port 2 - HP like module */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + case 0xf0: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x20; + if (valxor) + ali5123_serial_handler(dev, 1); + break; + } + break; + case 0x0b: + /* Serial port 3 */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + case 0xf0: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x40; + if (valxor) + ali5123_serial_handler(dev, 2); + break; + } + break; } } - static uint8_t ali5123_read(uint16_t port, void *priv) { - ali5123_t *dev = (ali5123_t *) priv; - uint8_t index = (port & 1) ? 0 : 1; - uint8_t ret = 0xff, cur_ld; + ali5123_t *dev = (ali5123_t *) priv; + uint8_t index = (port & 1) ? 0 : 1; + uint8_t ret = 0xff, cur_ld; if (dev->locked) { - if (index) - ret = dev->cur_reg; - else { - if (dev->cur_reg < 0x30) { - if (dev->cur_reg == 0x20) - ret = dev->chip_id; - else - ret = dev->regs[dev->cur_reg]; - } else { - cur_ld = dev->regs[7]; - if ((dev->regs[7] == 5) && (dev->regs[0x2d] & 0x20)) - cur_ld = 0x0b; - else if ((dev->regs[7] == 0x0b) && (dev->regs[0x2d] & 0x20)) - cur_ld = 5; + if (index) + ret = dev->cur_reg; + else { + if (dev->cur_reg < 0x30) { + if (dev->cur_reg == 0x20) + ret = dev->chip_id; + else + ret = dev->regs[dev->cur_reg]; + } else { + cur_ld = dev->regs[7]; + if ((dev->regs[7] == 5) && (dev->regs[0x2d] & 0x20)) + cur_ld = 0x0b; + else if ((dev->regs[7] == 0x0b) && (dev->regs[0x2d] & 0x20)) + cur_ld = 5; - ret = dev->ld_regs[cur_ld][dev->cur_reg]; - } - } + ret = dev->ld_regs[cur_ld][dev->cur_reg]; + } + } } return ret; } - static void ali5123_close(void *priv) { @@ -437,7 +431,6 @@ ali5123_close(void *priv) free(dev); } - static void * ali5123_init(const device_t *info) { @@ -455,24 +448,23 @@ ali5123_init(const device_t *info) ali5123_reset(dev); io_sethandler(FDC_PRIMARY_ADDR, 0x0002, - ali5123_read, NULL, NULL, ali5123_write, NULL, NULL, dev); + ali5123_read, NULL, NULL, ali5123_write, NULL, NULL, dev); device_add(&keyboard_ps2_ali_pci_device); return dev; } - const device_t ali5123_device = { - .name = "ALi M5123/M1543C Super I/O", + .name = "ALi M5123/M1543C Super I/O", .internal_name = "ali5123", - .flags = 0, - .local = 0x40, - .init = ali5123_init, - .close = ali5123_close, - .reset = NULL, + .flags = 0, + .local = 0x40, + .init = ali5123_init, + .close = ali5123_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_detect.c b/src/sio/sio_detect.c index 2e3302179..871ad1a0a 100644 --- a/src/sio/sio_detect.c +++ b/src/sio/sio_detect.c @@ -27,12 +27,10 @@ #include <86box/fdc.h> #include <86box/sio.h> - typedef struct { uint8_t regs[2]; } sio_detect_t; - static void sio_detect_write(uint16_t port, uint8_t val, void *priv) { @@ -45,7 +43,6 @@ sio_detect_write(uint16_t port, uint8_t val, void *priv) return; } - static uint8_t sio_detect_read(uint16_t port, void *priv) { @@ -56,7 +53,6 @@ sio_detect_read(uint16_t port, void *priv) return 0xff /*dev->regs[port & 1]*/; } - static void sio_detect_close(void *priv) { @@ -65,7 +61,6 @@ sio_detect_close(void *priv) free(dev); } - static void * sio_detect_init(const device_t *info) { @@ -75,48 +70,47 @@ sio_detect_init(const device_t *info) device_add(&fdc_at_smc_device); io_sethandler(0x0022, 0x0006, - sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); + sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); io_sethandler(0x002e, 0x0002, - sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); + sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); io_sethandler(0x0044, 0x0004, - sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); + sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); io_sethandler(0x004e, 0x0002, - sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); + sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); io_sethandler(0x0108, 0x0002, - sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); + sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); io_sethandler(0x015c, 0x0002, - sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); + sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); io_sethandler(0x0250, 0x0003, - sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); + sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); io_sethandler(0x026e, 0x0002, - sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); + sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); io_sethandler(0x0279, 0x0001, - sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); + sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); io_sethandler(FDC_SECONDARY_ADDR, 0x0002, - sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); + sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); io_sethandler(0x0398, 0x0002, - sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); + sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); io_sethandler(0x03e3, 0x0001, - sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); + sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); io_sethandler(FDC_PRIMARY_ADDR, 0x0002, - sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); + sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); io_sethandler(0x0a79, 0x0001, - sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); + sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev); return dev; } - const device_t sio_detect_device = { - .name = "Super I/O Detection Helper", + .name = "Super I/O Detection Helper", .internal_name = "sio_detect", - .flags = 0, - .local = 0, - .init = sio_detect_init, - .close = sio_detect_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = sio_detect_init, + .close = sio_detect_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_f82c710.c b/src/sio/sio_f82c710.c index fadbc76e2..36f6b00a3 100644 --- a/src/sio/sio_f82c710.c +++ b/src/sio/sio_f82c710.c @@ -43,26 +43,23 @@ #include <86box/nvr.h> #include <86box/sio.h> - -typedef struct upc_t -{ - uint32_t local; - int configuration_state; /* state of algorithm to enter configuration mode */ - int configuration_mode; - uint16_t cri_addr; /* cri = configuration index register, addr is even */ - uint16_t cap_addr; /* cap = configuration access port, addr is odd and is cri_addr + 1 */ - uint8_t cri; /* currently indexed register */ - uint8_t last_write; +typedef struct upc_t { + uint32_t local; + int configuration_state; /* state of algorithm to enter configuration mode */ + int configuration_mode; + uint16_t cri_addr; /* cri = configuration index register, addr is even */ + uint16_t cap_addr; /* cap = configuration access port, addr is odd and is cri_addr + 1 */ + uint8_t cri; /* currently indexed register */ + uint8_t last_write; /* these regs are not affected by reset */ - uint8_t regs[15]; /* there are 16 indexes, but there is no need to store the last one which is: R = cri_addr / 4, W = exit config mode */ - fdc_t * fdc; - nvr_t * nvr; - void * gameport; - serial_t * uart[2]; + uint8_t regs[15]; /* there are 16 indexes, but there is no need to store the last one which is: R = cri_addr / 4, W = exit config mode */ + fdc_t *fdc; + nvr_t *nvr; + void *gameport; + serial_t *uart[2]; } upc_t; - static void f82c710_update_ports(upc_t *dev, int set) { @@ -77,40 +74,39 @@ f82c710_update_ports(upc_t *dev, int set) ide_pri_disable(); if (!set) - return; + return; if (dev->regs[0] & 4) { - com_addr = dev->regs[4] * 4; - if (com_addr == COM1_ADDR) - serial_setup(dev->uart[0], com_addr, COM1_IRQ); - else if (com_addr == COM2_ADDR) - serial_setup(dev->uart[1], com_addr, COM2_IRQ); + com_addr = dev->regs[4] * 4; + if (com_addr == COM1_ADDR) + serial_setup(dev->uart[0], com_addr, COM1_IRQ); + else if (com_addr == COM2_ADDR) + serial_setup(dev->uart[1], com_addr, COM2_IRQ); } if (dev->regs[0] & 8) { - lpt_addr = dev->regs[6] * 4; - lpt1_init(lpt_addr); - if ((lpt_addr == LPT1_ADDR) || (lpt_addr == LPT_MDA_ADDR)) - lpt1_irq(LPT1_IRQ); - else if (lpt_addr == LPT2_ADDR) - lpt1_irq(LPT2_IRQ); + lpt_addr = dev->regs[6] * 4; + lpt1_init(lpt_addr); + if ((lpt_addr == LPT1_ADDR) || (lpt_addr == LPT_MDA_ADDR)) + lpt1_irq(LPT1_IRQ); + else if (lpt_addr == LPT2_ADDR) + lpt1_irq(LPT2_IRQ); } if (dev->regs[12] & 0x80) - ide_pri_enable(); + ide_pri_enable(); if (dev->regs[12] & 0x20) - fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR); + fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR); } - static void f82c606_update_ports(upc_t *dev, int set) { uint8_t uart1_int = 0xff; uint8_t uart2_int = 0xff; - uint8_t lpt1_int = 0xff; - int nvr_int = -1; + uint8_t lpt1_int = 0xff; + int nvr_int = -1; serial_remove(dev->uart[0]); serial_remove(dev->uart[1]); @@ -123,51 +119,75 @@ f82c606_update_ports(upc_t *dev, int set) gameport_remap(dev->gameport, 0); if (!set) - return; + return; switch (dev->regs[8] & 0xc0) { - case 0x40: nvr_int = 3; break; - case 0x80: uart1_int = COM2_IRQ; break; - case 0xc0: uart2_int = COM2_IRQ; break; + case 0x40: + nvr_int = 3; + break; + case 0x80: + uart1_int = COM2_IRQ; + break; + case 0xc0: + uart2_int = COM2_IRQ; + break; } switch (dev->regs[8] & 0x30) { - case 0x10: nvr_int = 4; break; - case 0x20: uart1_int = COM1_IRQ; break; - case 0x30: uart2_int = COM1_IRQ; break; + case 0x10: + nvr_int = 4; + break; + case 0x20: + uart1_int = COM1_IRQ; + break; + case 0x30: + uart2_int = COM1_IRQ; + break; } switch (dev->regs[8] & 0x0c) { - case 0x04: nvr_int = 5; break; - case 0x08: uart1_int = 5; break; - case 0x0c: lpt1_int = LPT2_IRQ; break; + case 0x04: + nvr_int = 5; + break; + case 0x08: + uart1_int = 5; + break; + case 0x0c: + lpt1_int = LPT2_IRQ; + break; } switch (dev->regs[8] & 0x03) { - case 0x01: nvr_int = 7; break; - case 0x02: uart2_int = 7; break; - case 0x03: lpt1_int = LPT1_IRQ; break; + case 0x01: + nvr_int = 7; + break; + case 0x02: + uart2_int = 7; + break; + case 0x03: + lpt1_int = LPT1_IRQ; + break; } if (dev->regs[0] & 1) { - gameport_remap(dev->gameport, ((uint16_t) dev->regs[7]) << 2); - pclog("Game port at %04X\n", ((uint16_t) dev->regs[7]) << 2); + gameport_remap(dev->gameport, ((uint16_t) dev->regs[7]) << 2); + pclog("Game port at %04X\n", ((uint16_t) dev->regs[7]) << 2); } if (dev->regs[0] & 2) { - serial_setup(dev->uart[0], ((uint16_t) dev->regs[4]) << 2, uart1_int); - pclog("UART 1 at %04X, IRQ %i\n", ((uint16_t) dev->regs[4]) << 2, uart1_int); + serial_setup(dev->uart[0], ((uint16_t) dev->regs[4]) << 2, uart1_int); + pclog("UART 1 at %04X, IRQ %i\n", ((uint16_t) dev->regs[4]) << 2, uart1_int); } if (dev->regs[0] & 4) { - serial_setup(dev->uart[1], ((uint16_t) dev->regs[5]) << 2, uart2_int); - pclog("UART 2 at %04X, IRQ %i\n", ((uint16_t) dev->regs[5]) << 2, uart2_int); + serial_setup(dev->uart[1], ((uint16_t) dev->regs[5]) << 2, uart2_int); + pclog("UART 2 at %04X, IRQ %i\n", ((uint16_t) dev->regs[5]) << 2, uart2_int); } if (dev->regs[0] & 8) { - lpt1_init(((uint16_t) dev->regs[6]) << 2); - lpt1_irq(lpt1_int); - pclog("LPT1 at %04X, IRQ %i\n", ((uint16_t) dev->regs[6]) << 2, lpt1_int); + lpt1_init(((uint16_t) dev->regs[6]) << 2); + lpt1_irq(lpt1_int); + pclog("LPT1 at %04X, IRQ %i\n", ((uint16_t) dev->regs[6]) << 2, lpt1_int); } nvr_at_handler(1, ((uint16_t) dev->regs[3]) << 2, dev->nvr); @@ -175,97 +195,94 @@ f82c606_update_ports(upc_t *dev, int set) pclog("RTC at %04X, IRQ %i\n", ((uint16_t) dev->regs[3]) << 2, nvr_int); } - static uint8_t f82c710_config_read(uint16_t port, void *priv) { - upc_t *dev = (upc_t *) priv; + upc_t *dev = (upc_t *) priv; uint8_t temp = 0xff; if (dev->configuration_mode) { - if (port == dev->cri_addr) { - temp = dev->cri; - } else if (port == dev->cap_addr) { - if (dev->cri == 0xf) - temp = dev->cri_addr / 4; - else - temp = dev->regs[dev->cri]; - } + if (port == dev->cri_addr) { + temp = dev->cri; + } else if (port == dev->cap_addr) { + if (dev->cri == 0xf) + temp = dev->cri_addr / 4; + else + temp = dev->regs[dev->cri]; + } } return temp; } - static void f82c710_config_write(uint16_t port, uint8_t val, void *priv) { - upc_t *dev = (upc_t *) priv; - int configuration_state_event = 0; + upc_t *dev = (upc_t *) priv; + int configuration_state_event = 0; switch (port) { - case 0x2fa: - if ((dev->configuration_state == 0) && (val != 0x00) && (val != 0xff) && (dev->local == 606)) { - configuration_state_event = 1; - dev->last_write = val; - } else if ((dev->configuration_state == 0) && (val == 0x55) && (dev->local == 710)) - configuration_state_event = 1; - else if (dev->configuration_state == 4) { - if ((val | dev->last_write) == 0xff) { - dev->cri_addr = ((uint16_t) dev->last_write) << 2; - dev->cap_addr = dev->cri_addr + 1; - dev->configuration_mode = 1; - if (dev->local == 606) - f82c606_update_ports(dev, 0); - else if (dev->local == 710) - f82c710_update_ports(dev, 0); - /* TODO: is the value of cri reset here or when exiting configuration mode? */ - io_sethandler(dev->cri_addr, 0x0002, f82c710_config_read, NULL, NULL, f82c710_config_write, NULL, NULL, dev); - } else - dev->configuration_mode = 0; - } - break; - case 0x3fa: - if ((dev->configuration_state == 1) && ((val | dev->last_write) == 0xff) && (dev->local == 606)) - configuration_state_event = 1; - else if ((dev->configuration_state == 1) && (val == 0xaa) && (dev->local == 710)) - configuration_state_event = 1; - else if ((dev->configuration_state == 2) && (val == 0x36)) - configuration_state_event = 1; - else if (dev->configuration_state == 3) { - dev->last_write = val; - configuration_state_event = 1; - } - break; - default: - break; + case 0x2fa: + if ((dev->configuration_state == 0) && (val != 0x00) && (val != 0xff) && (dev->local == 606)) { + configuration_state_event = 1; + dev->last_write = val; + } else if ((dev->configuration_state == 0) && (val == 0x55) && (dev->local == 710)) + configuration_state_event = 1; + else if (dev->configuration_state == 4) { + if ((val | dev->last_write) == 0xff) { + dev->cri_addr = ((uint16_t) dev->last_write) << 2; + dev->cap_addr = dev->cri_addr + 1; + dev->configuration_mode = 1; + if (dev->local == 606) + f82c606_update_ports(dev, 0); + else if (dev->local == 710) + f82c710_update_ports(dev, 0); + /* TODO: is the value of cri reset here or when exiting configuration mode? */ + io_sethandler(dev->cri_addr, 0x0002, f82c710_config_read, NULL, NULL, f82c710_config_write, NULL, NULL, dev); + } else + dev->configuration_mode = 0; + } + break; + case 0x3fa: + if ((dev->configuration_state == 1) && ((val | dev->last_write) == 0xff) && (dev->local == 606)) + configuration_state_event = 1; + else if ((dev->configuration_state == 1) && (val == 0xaa) && (dev->local == 710)) + configuration_state_event = 1; + else if ((dev->configuration_state == 2) && (val == 0x36)) + configuration_state_event = 1; + else if (dev->configuration_state == 3) { + dev->last_write = val; + configuration_state_event = 1; + } + break; + default: + break; } if (dev->configuration_mode) { - if (port == dev->cri_addr) { - dev->cri = val & 0xf; - } else if (port == dev->cap_addr) { - if (dev->cri == 0xf) { - dev->configuration_mode = 0; - io_removehandler(dev->cri_addr, 0x0002, f82c710_config_read, NULL, NULL, f82c710_config_write, NULL, NULL, dev); - /* TODO: any benefit in updating at each register write instead of when exiting config mode? */ - if (dev->local == 606) - f82c606_update_ports(dev, 1); - else if (dev->local == 710) - f82c710_update_ports(dev, 1); - } else - dev->regs[dev->cri] = val; - } + if (port == dev->cri_addr) { + dev->cri = val & 0xf; + } else if (port == dev->cap_addr) { + if (dev->cri == 0xf) { + dev->configuration_mode = 0; + io_removehandler(dev->cri_addr, 0x0002, f82c710_config_read, NULL, NULL, f82c710_config_write, NULL, NULL, dev); + /* TODO: any benefit in updating at each register write instead of when exiting config mode? */ + if (dev->local == 606) + f82c606_update_ports(dev, 1); + else if (dev->local == 710) + f82c710_update_ports(dev, 1); + } else + dev->regs[dev->cri] = val; + } } /* TODO: is the state only reset when accessing 0x2fa and 0x3fa wrongly? */ if ((port == 0x2fa || port == 0x3fa) && configuration_state_event) - dev->configuration_state++; + dev->configuration_state++; else - dev->configuration_state = 0; + dev->configuration_state = 0; } - static void f82c710_reset(void *priv) { @@ -273,40 +290,39 @@ f82c710_reset(void *priv) /* Set power-on defaults. */ if (dev->local == 606) { - dev->regs[0] = 0x00; /* Enable */ - dev->regs[1] = 0x00; /* Configuration Register */ - dev->regs[2] = 0x00; /* Ext Baud Rate Select */ - dev->regs[3] = 0xb0; /* RTC Base */ - dev->regs[4] = 0xfe; /* UART1 Base */ - dev->regs[5] = 0xbe; /* UART2 Base */ - dev->regs[6] = 0x9e; /* Parallel Base */ - dev->regs[7] = 0x80; /* Game Base */ - dev->regs[8] = 0xec; /* Interrupt Select */ + dev->regs[0] = 0x00; /* Enable */ + dev->regs[1] = 0x00; /* Configuration Register */ + dev->regs[2] = 0x00; /* Ext Baud Rate Select */ + dev->regs[3] = 0xb0; /* RTC Base */ + dev->regs[4] = 0xfe; /* UART1 Base */ + dev->regs[5] = 0xbe; /* UART2 Base */ + dev->regs[6] = 0x9e; /* Parallel Base */ + dev->regs[7] = 0x80; /* Game Base */ + dev->regs[8] = 0xec; /* Interrupt Select */ } else if (dev->local == 710) { - dev->regs[0] = 0x0c; - dev->regs[1] = 0x00; - dev->regs[2] = 0x00; - dev->regs[3] = 0x00; - dev->regs[4] = 0xfe; - dev->regs[5] = 0x00; - dev->regs[6] = 0x9e; - dev->regs[7] = 0x00; - dev->regs[8] = 0x00; - dev->regs[9] = 0xb0; - dev->regs[10] = 0x00; - dev->regs[11] = 0x00; - dev->regs[12] = 0xa0; - dev->regs[13] = 0x00; - dev->regs[14] = 0x00; + dev->regs[0] = 0x0c; + dev->regs[1] = 0x00; + dev->regs[2] = 0x00; + dev->regs[3] = 0x00; + dev->regs[4] = 0xfe; + dev->regs[5] = 0x00; + dev->regs[6] = 0x9e; + dev->regs[7] = 0x00; + dev->regs[8] = 0x00; + dev->regs[9] = 0xb0; + dev->regs[10] = 0x00; + dev->regs[11] = 0x00; + dev->regs[12] = 0xa0; + dev->regs[13] = 0x00; + dev->regs[14] = 0x00; } if (dev->local == 606) - f82c606_update_ports(dev, 1); + f82c606_update_ports(dev, 1); else if (dev->local == 710) - f82c710_update_ports(dev, 1); + f82c710_update_ports(dev, 1); } - static void f82c710_close(void *priv) { @@ -315,7 +331,6 @@ f82c710_close(void *priv) free(dev); } - static void * f82c710_init(const device_t *info) { @@ -324,10 +339,10 @@ f82c710_init(const device_t *info) dev->local = info->local; if (dev->local == 606) { - dev->nvr = device_add(&at_nvr_old_device); - dev->gameport = gameport_add(&gameport_sio_device); + dev->nvr = device_add(&at_nvr_old_device); + dev->gameport = gameport_add(&gameport_sio_device); } else if (dev->local == 710) - dev->fdc = device_add(&fdc_at_device); + dev->fdc = device_add(&fdc_at_device); dev->uart[0] = device_add_inst(&ns16450_device, 1); dev->uart[1] = device_add_inst(&ns16450_device, 2); @@ -341,29 +356,29 @@ f82c710_init(const device_t *info) } const device_t f82c606_device = { - .name = "82C606 CHIPSpak Multifunction Controller", + .name = "82C606 CHIPSpak Multifunction Controller", .internal_name = "f82c606", - .flags = 0, - .local = 606, - .init = f82c710_init, - .close = f82c710_close, - .reset = f82c710_reset, + .flags = 0, + .local = 606, + .init = f82c710_init, + .close = f82c710_close, + .reset = f82c710_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t f82c710_device = { - .name = "F82C710 UPC Super I/O", + .name = "F82C710 UPC Super I/O", .internal_name = "f82c710", - .flags = 0, - .local = 710, - .init = f82c710_init, - .close = f82c710_close, - .reset = f82c710_reset, + .flags = 0, + .local = 710, + .init = f82c710_init, + .close = f82c710_close, + .reset = f82c710_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_fdc37c669.c b/src/sio/sio_fdc37c669.c index caa92fad5..81d9647c0 100644 --- a/src/sio/sio_fdc37c669.c +++ b/src/sio/sio_fdc37c669.c @@ -31,217 +31,211 @@ #include <86box/fdc.h> #include <86box/sio.h> - typedef struct { uint8_t id, tries, - regs[42]; + regs[42]; int locked, rw_locked, - cur_reg; - fdc_t *fdc; + cur_reg; + fdc_t *fdc; serial_t *uart[2]; } fdc37c669_t; - -static int next_id = 0; - +static int next_id = 0; static uint16_t make_port(fdc37c669_t *dev, uint8_t reg) { - uint16_t p = 0; + uint16_t p = 0; uint16_t mask = 0; - switch(reg) { - case 0x20: - case 0x21: - case 0x22: - mask = 0xfc; - break; - case 0x23: - mask = 0xff; - break; - case 0x24: - case 0x25: - mask = 0xfe; - break; + switch (reg) { + case 0x20: + case 0x21: + case 0x22: + mask = 0xfc; + break; + case 0x23: + mask = 0xff; + break; + case 0x24: + case 0x25: + mask = 0xfe; + break; } p = ((uint16_t) (dev->regs[reg] & mask)) << 2; if (reg == 0x22) - p |= 6; + p |= 6; return p; } - static void fdc37c669_write(uint16_t port, uint8_t val, void *priv) { - fdc37c669_t *dev = (fdc37c669_t *) priv; - uint8_t index = (port & 1) ? 0 : 1; - uint8_t valxor = 0; - uint8_t max = 42; + fdc37c669_t *dev = (fdc37c669_t *) priv; + uint8_t index = (port & 1) ? 0 : 1; + uint8_t valxor = 0; + uint8_t max = 42; if (index) { - if ((val == 0x55) && !dev->locked) { - if (dev->tries) { - dev->locked = 1; - dev->tries = 0; - } else - dev->tries++; - } else { - if (dev->locked) { - if (val < max) - dev->cur_reg = val; - if (val == 0xaa) - dev->locked = 0; - } else { - if (dev->tries) - dev->tries = 0; - } - } - return; + if ((val == 0x55) && !dev->locked) { + if (dev->tries) { + dev->locked = 1; + dev->tries = 0; + } else + dev->tries++; + } else { + if (dev->locked) { + if (val < max) + dev->cur_reg = val; + if (val == 0xaa) + dev->locked = 0; + } else { + if (dev->tries) + dev->tries = 0; + } + } + return; } else { - if (dev->locked) { - if ((dev->cur_reg < 0x18) && (dev->rw_locked)) - return; - if ((dev->cur_reg >= 0x26) && (dev->cur_reg <= 0x27)) - return; - if (dev->cur_reg == 0x29) - return; - valxor = val ^ dev->regs[dev->cur_reg]; - dev->regs[dev->cur_reg] = val; - } else - return; + if (dev->locked) { + if ((dev->cur_reg < 0x18) && (dev->rw_locked)) + return; + if ((dev->cur_reg >= 0x26) && (dev->cur_reg <= 0x27)) + return; + if (dev->cur_reg == 0x29) + return; + valxor = val ^ dev->regs[dev->cur_reg]; + dev->regs[dev->cur_reg] = val; + } else + return; } - switch(dev->cur_reg) { - case 0: - if (!dev->id && (valxor & 8)) { - fdc_remove(dev->fdc); - if ((dev->regs[0] & 8) && (dev->regs[0x20] & 0xc0)) - fdc_set_base(dev->fdc, make_port(dev, 0x20)); - } - break; - case 1: - if (valxor & 4) { - if (dev->id) { - lpt2_remove(); - if ((dev->regs[1] & 4) && (dev->regs[0x23] >= 0x40)) - lpt2_init(make_port(dev, 0x23)); - } else { - lpt1_remove(); - if ((dev->regs[1] & 4) && (dev->regs[0x23] >= 0x40)) - lpt1_init(make_port(dev, 0x23)); - } - } - if (valxor & 7) - dev->rw_locked = (val & 8) ? 0 : 1; - break; - case 2: - if (valxor & 8) { - serial_remove(dev->uart[0]); - if ((dev->regs[2] & 8) && (dev->regs[0x24] >= 0x40)) - serial_setup(dev->uart[0], make_port(dev, 0x24), (dev->regs[0x28] & 0xf0) >> 4); - } - if (valxor & 0x80) { - serial_remove(dev->uart[1]); - if ((dev->regs[2] & 0x80) && (dev->regs[0x25] >= 0x40)) - serial_setup(dev->uart[1], make_port(dev, 0x25), dev->regs[0x28] & 0x0f); - } - break; - case 3: - if (!dev->id && (valxor & 2)) - fdc_update_enh_mode(dev->fdc, (val & 2) ? 1 : 0); - break; - case 5: - if (!dev->id && (valxor & 0x18)) - fdc_update_densel_force(dev->fdc, (val & 0x18) >> 3); - if (!dev->id && (valxor & 0x20)) - fdc_set_swap(dev->fdc, (val & 0x20) >> 5); - break; - case 0xB: - if (!dev->id && (valxor & 3)) - fdc_update_rwc(dev->fdc, 0, val & 3); - if (!dev->id && (valxor & 0xC)) - fdc_update_rwc(dev->fdc, 1, (val & 0xC) >> 2); - break; - case 0x20: - if (!dev->id && (valxor & 0xfc)) { - fdc_remove(dev->fdc); - if ((dev->regs[0] & 8) && (dev->regs[0x20] & 0xc0)) - fdc_set_base(dev->fdc, make_port(dev, 0x20)); - } - break; - case 0x23: - if (valxor) { - if (dev->id) { - lpt2_remove(); - if ((dev->regs[1] & 4) && (dev->regs[0x23] >= 0x40)) - lpt2_init(make_port(dev, 0x23)); - } else { - lpt1_remove(); - if ((dev->regs[1] & 4) && (dev->regs[0x23] >= 0x40)) - lpt1_init(make_port(dev, 0x23)); - } - } - break; - case 0x24: - if (valxor & 0xfe) { - serial_remove(dev->uart[0]); - if ((dev->regs[2] & 8) && (dev->regs[0x24] >= 0x40)) - serial_setup(dev->uart[0], make_port(dev, 0x24), (dev->regs[0x28] & 0xf0) >> 4); - } - break; - case 0x25: - if (valxor & 0xfe) { - serial_remove(dev->uart[1]); - if ((dev->regs[2] & 0x80) && (dev->regs[0x25] >= 0x40)) - serial_setup(dev->uart[1], make_port(dev, 0x25), dev->regs[0x28] & 0x0f); - } - break; - case 0x27: - if (valxor & 0xf) { - if (dev->id) - lpt2_irq(val & 0xf); - else - lpt1_irq(val & 0xf); - } - break; - case 0x28: - if (valxor & 0xf) { - serial_remove(dev->uart[1]); - if ((dev->regs[2] & 0x80) && (dev->regs[0x25] >= 0x40)) - serial_setup(dev->uart[1], make_port(dev, 0x25), dev->regs[0x28] & 0x0f); - } - if (valxor & 0xf0) { - serial_remove(dev->uart[0]); - if ((dev->regs[2] & 8) && (dev->regs[0x24] >= 0x40)) - serial_setup(dev->uart[0], make_port(dev, 0x24), (dev->regs[0x28] & 0xf0) >> 4); - } - break; + switch (dev->cur_reg) { + case 0: + if (!dev->id && (valxor & 8)) { + fdc_remove(dev->fdc); + if ((dev->regs[0] & 8) && (dev->regs[0x20] & 0xc0)) + fdc_set_base(dev->fdc, make_port(dev, 0x20)); + } + break; + case 1: + if (valxor & 4) { + if (dev->id) { + lpt2_remove(); + if ((dev->regs[1] & 4) && (dev->regs[0x23] >= 0x40)) + lpt2_init(make_port(dev, 0x23)); + } else { + lpt1_remove(); + if ((dev->regs[1] & 4) && (dev->regs[0x23] >= 0x40)) + lpt1_init(make_port(dev, 0x23)); + } + } + if (valxor & 7) + dev->rw_locked = (val & 8) ? 0 : 1; + break; + case 2: + if (valxor & 8) { + serial_remove(dev->uart[0]); + if ((dev->regs[2] & 8) && (dev->regs[0x24] >= 0x40)) + serial_setup(dev->uart[0], make_port(dev, 0x24), (dev->regs[0x28] & 0xf0) >> 4); + } + if (valxor & 0x80) { + serial_remove(dev->uart[1]); + if ((dev->regs[2] & 0x80) && (dev->regs[0x25] >= 0x40)) + serial_setup(dev->uart[1], make_port(dev, 0x25), dev->regs[0x28] & 0x0f); + } + break; + case 3: + if (!dev->id && (valxor & 2)) + fdc_update_enh_mode(dev->fdc, (val & 2) ? 1 : 0); + break; + case 5: + if (!dev->id && (valxor & 0x18)) + fdc_update_densel_force(dev->fdc, (val & 0x18) >> 3); + if (!dev->id && (valxor & 0x20)) + fdc_set_swap(dev->fdc, (val & 0x20) >> 5); + break; + case 0xB: + if (!dev->id && (valxor & 3)) + fdc_update_rwc(dev->fdc, 0, val & 3); + if (!dev->id && (valxor & 0xC)) + fdc_update_rwc(dev->fdc, 1, (val & 0xC) >> 2); + break; + case 0x20: + if (!dev->id && (valxor & 0xfc)) { + fdc_remove(dev->fdc); + if ((dev->regs[0] & 8) && (dev->regs[0x20] & 0xc0)) + fdc_set_base(dev->fdc, make_port(dev, 0x20)); + } + break; + case 0x23: + if (valxor) { + if (dev->id) { + lpt2_remove(); + if ((dev->regs[1] & 4) && (dev->regs[0x23] >= 0x40)) + lpt2_init(make_port(dev, 0x23)); + } else { + lpt1_remove(); + if ((dev->regs[1] & 4) && (dev->regs[0x23] >= 0x40)) + lpt1_init(make_port(dev, 0x23)); + } + } + break; + case 0x24: + if (valxor & 0xfe) { + serial_remove(dev->uart[0]); + if ((dev->regs[2] & 8) && (dev->regs[0x24] >= 0x40)) + serial_setup(dev->uart[0], make_port(dev, 0x24), (dev->regs[0x28] & 0xf0) >> 4); + } + break; + case 0x25: + if (valxor & 0xfe) { + serial_remove(dev->uart[1]); + if ((dev->regs[2] & 0x80) && (dev->regs[0x25] >= 0x40)) + serial_setup(dev->uart[1], make_port(dev, 0x25), dev->regs[0x28] & 0x0f); + } + break; + case 0x27: + if (valxor & 0xf) { + if (dev->id) + lpt2_irq(val & 0xf); + else + lpt1_irq(val & 0xf); + } + break; + case 0x28: + if (valxor & 0xf) { + serial_remove(dev->uart[1]); + if ((dev->regs[2] & 0x80) && (dev->regs[0x25] >= 0x40)) + serial_setup(dev->uart[1], make_port(dev, 0x25), dev->regs[0x28] & 0x0f); + } + if (valxor & 0xf0) { + serial_remove(dev->uart[0]); + if ((dev->regs[2] & 8) && (dev->regs[0x24] >= 0x40)) + serial_setup(dev->uart[0], make_port(dev, 0x24), (dev->regs[0x28] & 0xf0) >> 4); + } + break; } } - static uint8_t fdc37c669_read(uint16_t port, void *priv) { - fdc37c669_t *dev = (fdc37c669_t *) priv; - uint8_t index = (port & 1) ? 0 : 1; - uint8_t ret = 0xff; + fdc37c669_t *dev = (fdc37c669_t *) priv; + uint8_t index = (port & 1) ? 0 : 1; + uint8_t ret = 0xff; if (dev->locked) { - if (index) - ret = dev->cur_reg; - else if ((dev->cur_reg >= 0x18) || !dev->rw_locked) - ret = dev->regs[dev->cur_reg]; + if (index) + ret = dev->cur_reg; + else if ((dev->cur_reg >= 0x18) || !dev->rw_locked) + ret = dev->regs[dev->cur_reg]; } return ret; } - static void fdc37c669_reset(fdc37c669_t *dev) { @@ -259,38 +253,37 @@ fdc37c669_reset(fdc37c669_t *dev) dev->regs[0x06] = 0xff; dev->regs[0x0d] = 0x03; dev->regs[0x0e] = 0x02; - dev->regs[0x1e] = 0x80; /* Gameport controller. */ + dev->regs[0x1e] = 0x80; /* Gameport controller. */ dev->regs[0x20] = (FDC_PRIMARY_ADDR >> 2) & 0xfc; dev->regs[0x21] = (0x1f0 >> 2) & 0xfc; dev->regs[0x22] = ((0x3f6 >> 2) & 0xfc) | 1; if (dev->id == 1) { - dev->regs[0x23] = (LPT2_ADDR >> 2); + dev->regs[0x23] = (LPT2_ADDR >> 2); - lpt2_remove(); - lpt2_init(LPT2_ADDR); + lpt2_remove(); + lpt2_init(LPT2_ADDR); - dev->regs[0x24] = (COM3_ADDR >> 2) & 0xfe; - dev->regs[0x25] = (COM4_ADDR >> 2) & 0xfe; + dev->regs[0x24] = (COM3_ADDR >> 2) & 0xfe; + dev->regs[0x25] = (COM4_ADDR >> 2) & 0xfe; } else { - fdc_reset(dev->fdc); + fdc_reset(dev->fdc); - lpt1_remove(); - lpt1_init(LPT1_ADDR); + lpt1_remove(); + lpt1_init(LPT1_ADDR); - dev->regs[0x23] = (LPT1_ADDR >> 2); + dev->regs[0x23] = (LPT1_ADDR >> 2); - dev->regs[0x24] = (COM1_ADDR >> 2) & 0xfe; - dev->regs[0x25] = (COM2_ADDR >> 2) & 0xfe; + dev->regs[0x24] = (COM1_ADDR >> 2) & 0xfe; + dev->regs[0x25] = (COM2_ADDR >> 2) & 0xfe; } dev->regs[0x26] = (2 << 4) | 3; dev->regs[0x27] = (6 << 4) | (dev->id ? 5 : 7); dev->regs[0x28] = (4 << 4) | 3; - dev->locked = 0; + dev->locked = 0; dev->rw_locked = 0; } - static void fdc37c669_close(void *priv) { @@ -301,7 +294,6 @@ fdc37c669_close(void *priv) free(dev); } - static void * fdc37c669_init(const device_t *info) { @@ -311,13 +303,13 @@ fdc37c669_init(const device_t *info) dev->id = next_id; if (next_id != 1) - dev->fdc = device_add(&fdc_at_smc_device); + dev->fdc = device_add(&fdc_at_smc_device); dev->uart[0] = device_add_inst(&ns16550_device, (next_id << 1) + 1); dev->uart[1] = device_add_inst(&ns16550_device, (next_id << 1) + 2); io_sethandler(info->local ? FDC_SECONDARY_ADDR : (next_id ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR), 0x0002, - fdc37c669_read, NULL, NULL, fdc37c669_write, NULL, NULL, dev); + fdc37c669_read, NULL, NULL, fdc37c669_write, NULL, NULL, dev); fdc37c669_reset(dev); @@ -327,30 +319,29 @@ fdc37c669_init(const device_t *info) } const device_t fdc37c669_device = { - .name = "SMC FDC37C669 Super I/O", + .name = "SMC FDC37C669 Super I/O", .internal_name = "fdc37c669", - .flags = 0, - .local = 0, - .init = fdc37c669_init, - .close = fdc37c669_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = fdc37c669_init, + .close = fdc37c669_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; - const device_t fdc37c669_370_device = { - .name = "SMC FDC37C669 Super I/O (Port 370h)", + .name = "SMC FDC37C669 Super I/O (Port 370h)", .internal_name = "fdc37c669_370", - .flags = 0, - .local = 1, + .flags = 0, + .local = 1, fdc37c669_init, fdc37c669_close, .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_fdc37c67x.c b/src/sio/sio_fdc37c67x.c index 098ffbb44..e728a8ffb 100644 --- a/src/sio/sio_fdc37c67x.c +++ b/src/sio/sio_fdc37c67x.c @@ -33,28 +33,24 @@ #include "cpu.h" #include <86box/sio.h> - -#define AB_RST 0x80 - +#define AB_RST 0x80 typedef struct { uint8_t chip_id, is_apm, - tries, - gpio_regs[2], auxio_reg, - regs[48], - ld_regs[11][256]; - uint16_t gpio_base, /* Set to EA */ - auxio_base, sio_base; + tries, + gpio_regs[2], auxio_reg, + regs[48], + ld_regs[11][256]; + uint16_t gpio_base, /* Set to EA */ + auxio_base, sio_base; int locked, - cur_reg; - fdc_t *fdc; + cur_reg; + fdc_t *fdc; serial_t *uart[2]; } fdc37c67x_t; - -static void fdc37c67x_write(uint16_t port, uint8_t val, void *priv); -static uint8_t fdc37c67x_read(uint16_t port, void *priv); - +static void fdc37c67x_write(uint16_t port, uint8_t val, void *priv); +static uint8_t fdc37c67x_read(uint16_t port, void *priv); static uint16_t make_port(fdc37c67x_t *dev, uint8_t ld) @@ -67,7 +63,6 @@ make_port(fdc37c67x_t *dev, uint8_t ld) return p; } - static uint8_t fdc37c67x_auxio_read(uint16_t port, void *priv) { @@ -76,7 +71,6 @@ fdc37c67x_auxio_read(uint16_t port, void *priv) return dev->auxio_reg; } - static void fdc37c67x_auxio_write(uint16_t port, uint8_t val, void *priv) { @@ -85,100 +79,93 @@ fdc37c67x_auxio_write(uint16_t port, uint8_t val, void *priv) dev->auxio_reg = val; } - static uint8_t fdc37c67x_gpio_read(uint16_t port, void *priv) { fdc37c67x_t *dev = (fdc37c67x_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; ret = dev->gpio_regs[port & 1]; return ret; } - static void fdc37c67x_gpio_write(uint16_t port, uint8_t val, void *priv) { fdc37c67x_t *dev = (fdc37c67x_t *) priv; if (!(port & 1)) - dev->gpio_regs[0] = (dev->gpio_regs[0] & 0xfc) | (val & 0x03); + dev->gpio_regs[0] = (dev->gpio_regs[0] & 0xfc) | (val & 0x03); } - static void fdc37c67x_fdc_handler(fdc37c67x_t *dev) { - uint16_t ld_port = 0; - uint8_t global_enable = !!(dev->regs[0x22] & (1 << 0)); - uint8_t local_enable = !!dev->ld_regs[0][0x30]; + uint16_t ld_port = 0; + uint8_t global_enable = !!(dev->regs[0x22] & (1 << 0)); + uint8_t local_enable = !!dev->ld_regs[0][0x30]; fdc_remove(dev->fdc); if (global_enable && local_enable) { - ld_port = make_port(dev, 0) & 0xFFF8; - if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) - fdc_set_base(dev->fdc, ld_port); + ld_port = make_port(dev, 0) & 0xFFF8; + if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) + fdc_set_base(dev->fdc, ld_port); } } - static void fdc37c67x_lpt_handler(fdc37c67x_t *dev) { - uint16_t ld_port = 0; - uint8_t global_enable = !!(dev->regs[0x22] & (1 << 3)); - uint8_t local_enable = !!dev->ld_regs[3][0x30]; - uint8_t lpt_irq = dev->ld_regs[3][0x70]; + uint16_t ld_port = 0; + uint8_t global_enable = !!(dev->regs[0x22] & (1 << 3)); + uint8_t local_enable = !!dev->ld_regs[3][0x30]; + uint8_t lpt_irq = dev->ld_regs[3][0x70]; if (lpt_irq > 15) - lpt_irq = 0xff; + lpt_irq = 0xff; lpt1_remove(); if (global_enable && local_enable) { - ld_port = make_port(dev, 3) & 0xFFFC; - if ((ld_port >= 0x0100) && (ld_port <= 0x0FFC)) - lpt1_init(ld_port); + ld_port = make_port(dev, 3) & 0xFFFC; + if ((ld_port >= 0x0100) && (ld_port <= 0x0FFC)) + lpt1_init(ld_port); } lpt1_irq(lpt_irq); } - static void fdc37c67x_serial_handler(fdc37c67x_t *dev, int uart) { - uint16_t ld_port = 0; - uint8_t uart_no = 4 + uart; - uint8_t global_enable = !!(dev->regs[0x22] & (1 << uart_no)); - uint8_t local_enable = !!dev->ld_regs[uart_no][0x30]; + uint16_t ld_port = 0; + uint8_t uart_no = 4 + uart; + uint8_t global_enable = !!(dev->regs[0x22] & (1 << uart_no)); + uint8_t local_enable = !!dev->ld_regs[uart_no][0x30]; serial_remove(dev->uart[uart]); if (global_enable && local_enable) { - ld_port = make_port(dev, uart_no) & 0xFFF8; - if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) - serial_setup(dev->uart[uart], ld_port, dev->ld_regs[uart_no][0x70]); + ld_port = make_port(dev, uart_no) & 0xFFF8; + if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) + serial_setup(dev->uart[uart], ld_port, dev->ld_regs[uart_no][0x70]); } } - static void fdc37c67x_auxio_handler(fdc37c67x_t *dev) { - uint16_t ld_port = 0; - uint8_t local_enable = !!dev->ld_regs[8][0x30]; + uint16_t ld_port = 0; + uint8_t local_enable = !!dev->ld_regs[8][0x30]; io_removehandler(dev->auxio_base, 0x0001, - fdc37c67x_auxio_read, NULL, NULL, fdc37c67x_auxio_write, NULL, NULL, dev); + fdc37c67x_auxio_read, NULL, NULL, fdc37c67x_auxio_write, NULL, NULL, dev); if (local_enable) { - dev->auxio_base = ld_port = make_port(dev, 8); - if ((ld_port >= 0x0100) && (ld_port <= 0x0FFF)) - io_sethandler(dev->auxio_base, 0x0001, - fdc37c67x_auxio_read, NULL, NULL, fdc37c67x_auxio_write, NULL, NULL, dev); + dev->auxio_base = ld_port = make_port(dev, 8); + if ((ld_port >= 0x0100) && (ld_port <= 0x0FFF)) + io_sethandler(dev->auxio_base, 0x0001, + fdc37c67x_auxio_read, NULL, NULL, fdc37c67x_auxio_write, NULL, NULL, dev); } } - static void fdc37c67x_sio_handler(fdc37c67x_t *dev) { @@ -195,40 +182,38 @@ fdc37c67x_sio_handler(fdc37c67x_t *dev) #endif } - static void fdc37c67x_gpio_handler(fdc37c67x_t *dev) { uint16_t ld_port = 0; - uint8_t local_enable; + uint8_t local_enable; local_enable = !!(dev->regs[0x03] & 0x80); io_removehandler(dev->gpio_base, 0x0002, - fdc37c67x_gpio_read, NULL, NULL, fdc37c67x_gpio_write, NULL, NULL, dev); + fdc37c67x_gpio_read, NULL, NULL, fdc37c67x_gpio_write, NULL, NULL, dev); if (local_enable) { - switch (dev->regs[0x03] & 0x03) { - case 0: - ld_port = 0xe0; - break; - case 1: - ld_port = 0xe2; - break; - case 2: - ld_port = 0xe4; - break; - case 3: - ld_port = 0xea; /* Default */ - break; - } - dev->gpio_base = ld_port; - if (ld_port > 0x0000) - io_sethandler(dev->gpio_base, 0x0002, - fdc37c67x_gpio_read, NULL, NULL, fdc37c67x_gpio_write, NULL, NULL, dev); + switch (dev->regs[0x03] & 0x03) { + case 0: + ld_port = 0xe0; + break; + case 1: + ld_port = 0xe2; + break; + case 2: + ld_port = 0xe4; + break; + case 3: + ld_port = 0xea; /* Default */ + break; + } + dev->gpio_base = ld_port; + if (ld_port > 0x0000) + io_sethandler(dev->gpio_base, 0x0002, + fdc37c67x_gpio_read, NULL, NULL, fdc37c67x_gpio_write, NULL, NULL, dev); } } - static void fdc37c67x_smi_handler(fdc37c67x_t *dev) { @@ -243,253 +228,251 @@ fdc37c67x_smi_handler(fdc37c67x_t *dev) pic_set_smi_irq_mask(10, dev->ld_regs[8][0xb5] & 0x80); } - static void fdc37c67x_write(uint16_t port, uint8_t val, void *priv) { - fdc37c67x_t *dev = (fdc37c67x_t *) priv; - uint8_t index = (port & 1) ? 0 : 1; - uint8_t valxor = 0x00, keep = 0x00; + fdc37c67x_t *dev = (fdc37c67x_t *) priv; + uint8_t index = (port & 1) ? 0 : 1; + uint8_t valxor = 0x00, keep = 0x00; if (index) { - if ((val == 0x55) && !dev->locked) { - if (dev->tries) { - dev->locked = 1; - fdc_3f1_enable(dev->fdc, 0); - dev->tries = 0; - } else - dev->tries++; - } else { - if (dev->locked) { - if (val == 0xaa) { - dev->locked = 0; - fdc_3f1_enable(dev->fdc, 1); - return; - } - dev->cur_reg = val; - } else { - if (dev->tries) - dev->tries = 0; - } - } - return; + if ((val == 0x55) && !dev->locked) { + if (dev->tries) { + dev->locked = 1; + fdc_3f1_enable(dev->fdc, 0); + dev->tries = 0; + } else + dev->tries++; + } else { + if (dev->locked) { + if (val == 0xaa) { + dev->locked = 0; + fdc_3f1_enable(dev->fdc, 1); + return; + } + dev->cur_reg = val; + } else { + if (dev->tries) + dev->tries = 0; + } + } + return; } else { - if (dev->locked) { - if (dev->cur_reg < 48) { - valxor = val ^ dev->regs[dev->cur_reg]; - if ((val == 0x20) || (val == 0x21)) - return; - dev->regs[dev->cur_reg] = val; - } else { - valxor = val ^ dev->ld_regs[dev->regs[7]][dev->cur_reg]; - if (((dev->cur_reg & 0xF0) == 0x70) && (dev->regs[7] < 4)) - return; - /* Block writes to some logical devices. */ - if (dev->regs[7] > 0x0a) - return; - else switch (dev->regs[7]) { - case 0x01: - case 0x02: - case 0x07: - return; - } - dev->ld_regs[dev->regs[7]][dev->cur_reg] = val | keep; - } - } else - return; + if (dev->locked) { + if (dev->cur_reg < 48) { + valxor = val ^ dev->regs[dev->cur_reg]; + if ((val == 0x20) || (val == 0x21)) + return; + dev->regs[dev->cur_reg] = val; + } else { + valxor = val ^ dev->ld_regs[dev->regs[7]][dev->cur_reg]; + if (((dev->cur_reg & 0xF0) == 0x70) && (dev->regs[7] < 4)) + return; + /* Block writes to some logical devices. */ + if (dev->regs[7] > 0x0a) + return; + else + switch (dev->regs[7]) { + case 0x01: + case 0x02: + case 0x07: + return; + } + dev->ld_regs[dev->regs[7]][dev->cur_reg] = val | keep; + } + } else + return; } if (dev->cur_reg < 48) { - switch(dev->cur_reg) { - case 0x03: - if (valxor & 0x83) - fdc37c67x_gpio_handler(dev); - dev->regs[0x03] &= 0x83; - break; - case 0x22: - if (valxor & 0x01) - fdc37c67x_fdc_handler(dev); - if (valxor & 0x08) - fdc37c67x_lpt_handler(dev); - if (valxor & 0x10) - fdc37c67x_serial_handler(dev, 0); - if (valxor & 0x20) - fdc37c67x_serial_handler(dev, 1); - break; - case 0x26: case 0x27: - fdc37c67x_sio_handler(dev); - } + switch (dev->cur_reg) { + case 0x03: + if (valxor & 0x83) + fdc37c67x_gpio_handler(dev); + dev->regs[0x03] &= 0x83; + break; + case 0x22: + if (valxor & 0x01) + fdc37c67x_fdc_handler(dev); + if (valxor & 0x08) + fdc37c67x_lpt_handler(dev); + if (valxor & 0x10) + fdc37c67x_serial_handler(dev, 0); + if (valxor & 0x20) + fdc37c67x_serial_handler(dev, 1); + break; + case 0x26: + case 0x27: + fdc37c67x_sio_handler(dev); + } - return; + return; } - switch(dev->regs[7]) { - case 0: - /* FDD */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - if ((dev->cur_reg == 0x30) && (val & 0x01)) - dev->regs[0x22] |= 0x01; - if (valxor) - fdc37c67x_fdc_handler(dev); - break; - case 0xF0: - if (valxor & 0x01) - fdc_update_enh_mode(dev->fdc, val & 0x01); - if (valxor & 0x10) - fdc_set_swap(dev->fdc, (val & 0x10) >> 4); - break; - case 0xF1: - if (valxor & 0xC) - fdc_update_densel_force(dev->fdc, (val & 0xc) >> 2); - break; - case 0xF2: - if (valxor & 0xC0) - fdc_update_rwc(dev->fdc, 3, (val & 0xc0) >> 6); - if (valxor & 0x30) - fdc_update_rwc(dev->fdc, 2, (val & 0x30) >> 4); - if (valxor & 0x0C) - fdc_update_rwc(dev->fdc, 1, (val & 0x0c) >> 2); - if (valxor & 0x03) - fdc_update_rwc(dev->fdc, 0, (val & 0x03)); - break; - case 0xF4: - if (valxor & 0x18) - fdc_update_drvrate(dev->fdc, 0, (val & 0x18) >> 3); - break; - case 0xF5: - if (valxor & 0x18) - fdc_update_drvrate(dev->fdc, 1, (val & 0x18) >> 3); - break; - case 0xF6: - if (valxor & 0x18) - fdc_update_drvrate(dev->fdc, 2, (val & 0x18) >> 3); - break; - case 0xF7: - if (valxor & 0x18) - fdc_update_drvrate(dev->fdc, 3, (val & 0x18) >> 3); - break; - } - break; - case 3: - /* Parallel port */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - case 0x70: - if ((dev->cur_reg == 0x30) && (val & 0x01)) - dev->regs[0x22] |= 0x08; - if (valxor) - fdc37c67x_lpt_handler(dev); - if (dev->cur_reg == 0x70) - fdc37c67x_smi_handler(dev); - break; - } - break; - case 4: - /* Serial port 1 */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - case 0x70: - if ((dev->cur_reg == 0x30) && (val & 0x01)) - dev->regs[0x22] |= 0x10; - if (valxor) - fdc37c67x_serial_handler(dev, 0); - if (dev->cur_reg == 0x70) - fdc37c67x_smi_handler(dev); - break; - } - break; - case 5: - /* Serial port 2 */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - case 0x70: - if ((dev->cur_reg == 0x30) && (val & 0x01)) - dev->regs[0x22] |= 0x20; - if (valxor) - fdc37c67x_serial_handler(dev, 1); - if (dev->cur_reg == 0x70) - fdc37c67x_smi_handler(dev); - break; - } - break; - case 8: - /* Auxiliary I/O */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - case 0x70: - if (valxor) - fdc37c67x_auxio_handler(dev); - break; - case 0xb4: - case 0xb5: - fdc37c67x_smi_handler(dev); - break; - } - break; + switch (dev->regs[7]) { + case 0: + /* FDD */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x01; + if (valxor) + fdc37c67x_fdc_handler(dev); + break; + case 0xF0: + if (valxor & 0x01) + fdc_update_enh_mode(dev->fdc, val & 0x01); + if (valxor & 0x10) + fdc_set_swap(dev->fdc, (val & 0x10) >> 4); + break; + case 0xF1: + if (valxor & 0xC) + fdc_update_densel_force(dev->fdc, (val & 0xc) >> 2); + break; + case 0xF2: + if (valxor & 0xC0) + fdc_update_rwc(dev->fdc, 3, (val & 0xc0) >> 6); + if (valxor & 0x30) + fdc_update_rwc(dev->fdc, 2, (val & 0x30) >> 4); + if (valxor & 0x0C) + fdc_update_rwc(dev->fdc, 1, (val & 0x0c) >> 2); + if (valxor & 0x03) + fdc_update_rwc(dev->fdc, 0, (val & 0x03)); + break; + case 0xF4: + if (valxor & 0x18) + fdc_update_drvrate(dev->fdc, 0, (val & 0x18) >> 3); + break; + case 0xF5: + if (valxor & 0x18) + fdc_update_drvrate(dev->fdc, 1, (val & 0x18) >> 3); + break; + case 0xF6: + if (valxor & 0x18) + fdc_update_drvrate(dev->fdc, 2, (val & 0x18) >> 3); + break; + case 0xF7: + if (valxor & 0x18) + fdc_update_drvrate(dev->fdc, 3, (val & 0x18) >> 3); + break; + } + break; + case 3: + /* Parallel port */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x08; + if (valxor) + fdc37c67x_lpt_handler(dev); + if (dev->cur_reg == 0x70) + fdc37c67x_smi_handler(dev); + break; + } + break; + case 4: + /* Serial port 1 */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x10; + if (valxor) + fdc37c67x_serial_handler(dev, 0); + if (dev->cur_reg == 0x70) + fdc37c67x_smi_handler(dev); + break; + } + break; + case 5: + /* Serial port 2 */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x20; + if (valxor) + fdc37c67x_serial_handler(dev, 1); + if (dev->cur_reg == 0x70) + fdc37c67x_smi_handler(dev); + break; + } + break; + case 8: + /* Auxiliary I/O */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + if (valxor) + fdc37c67x_auxio_handler(dev); + break; + case 0xb4: + case 0xb5: + fdc37c67x_smi_handler(dev); + break; + } + break; } } - static uint8_t fdc37c67x_read(uint16_t port, void *priv) { - fdc37c67x_t *dev = (fdc37c67x_t *) priv; - uint8_t index = (port & 1) ? 0 : 1; - uint8_t ret = 0xff; - uint16_t smi_stat = pic_get_smi_irq_status(); - int f_irq = dev->ld_regs[0][0x70]; - int p_irq = dev->ld_regs[3][0x70]; - int s1_irq = dev->ld_regs[4][0x70]; - int s2_irq = dev->ld_regs[5][0x70]; + fdc37c67x_t *dev = (fdc37c67x_t *) priv; + uint8_t index = (port & 1) ? 0 : 1; + uint8_t ret = 0xff; + uint16_t smi_stat = pic_get_smi_irq_status(); + int f_irq = dev->ld_regs[0][0x70]; + int p_irq = dev->ld_regs[3][0x70]; + int s1_irq = dev->ld_regs[4][0x70]; + int s2_irq = dev->ld_regs[5][0x70]; if (dev->locked) { - if (index) - ret = dev->cur_reg; - else { - if (dev->cur_reg < 0x30) { - if (dev->cur_reg == 0x20) - ret = dev->chip_id; - else - ret = dev->regs[dev->cur_reg]; - } else { - if ((dev->regs[7] == 0) && (dev->cur_reg == 0xF2)) { - ret = (fdc_get_rwc(dev->fdc, 0) | (fdc_get_rwc(dev->fdc, 1) << 2) | - (fdc_get_rwc(dev->fdc, 2) << 4) | (fdc_get_rwc(dev->fdc, 3) << 6)); - } else - ret = dev->ld_regs[dev->regs[7]][dev->cur_reg]; + if (index) + ret = dev->cur_reg; + else { + if (dev->cur_reg < 0x30) { + if (dev->cur_reg == 0x20) + ret = dev->chip_id; + else + ret = dev->regs[dev->cur_reg]; + } else { + if ((dev->regs[7] == 0) && (dev->cur_reg == 0xF2)) { + ret = (fdc_get_rwc(dev->fdc, 0) | (fdc_get_rwc(dev->fdc, 1) << 2) | (fdc_get_rwc(dev->fdc, 2) << 4) | (fdc_get_rwc(dev->fdc, 3) << 6)); + } else + ret = dev->ld_regs[dev->regs[7]][dev->cur_reg]; - /* TODO: 8042 P1.2 SMI#. */ - if ((dev->regs[7] == 8) && (dev->cur_reg == 0xb6)) { - ret = dev->ld_regs[dev->regs[7]][dev->cur_reg] & 0xe1; - ret |= ((!!(smi_stat & (1 << p_irq))) << 1); - ret |= ((!!(smi_stat & (1 << s2_irq))) << 2); - ret |= ((!!(smi_stat & (1 << s1_irq))) << 3); - ret |= ((!!(smi_stat & (1 << f_irq))) << 4); - } else if ((dev->regs[7] == 8) && (dev->cur_reg == 0xb7)) { - ret = dev->ld_regs[dev->regs[7]][dev->cur_reg] & 0xec; - ret |= ((!!(smi_stat & (1 << 12))) << 0); - ret |= ((!!(smi_stat & (1 << 1))) << 1); - ret |= ((!!(smi_stat & (1 << 10))) << 4); - } - } - } + /* TODO: 8042 P1.2 SMI#. */ + if ((dev->regs[7] == 8) && (dev->cur_reg == 0xb6)) { + ret = dev->ld_regs[dev->regs[7]][dev->cur_reg] & 0xe1; + ret |= ((!!(smi_stat & (1 << p_irq))) << 1); + ret |= ((!!(smi_stat & (1 << s2_irq))) << 2); + ret |= ((!!(smi_stat & (1 << s1_irq))) << 3); + ret |= ((!!(smi_stat & (1 << f_irq))) << 4); + } else if ((dev->regs[7] == 8) && (dev->cur_reg == 0xb7)) { + ret = dev->ld_regs[dev->regs[7]][dev->cur_reg] & 0xec; + ret |= ((!!(smi_stat & (1 << 12))) << 0); + ret |= ((!!(smi_stat & (1 << 1))) << 1); + ret |= ((!!(smi_stat & (1 << 10))) << 4); + } + } + } } return ret; } - static void fdc37c67x_reset(fdc37c67x_t *dev) { @@ -505,7 +488,7 @@ fdc37c67x_reset(fdc37c67x_t *dev) dev->regs[0x27] = 0x03; for (i = 0; i < 11; i++) - memset(dev->ld_regs[i], 0, 256); + memset(dev->ld_regs[i], 0, 256); /* Logical device 0: FDD */ dev->ld_regs[0][0x30] = 1; @@ -565,7 +548,6 @@ fdc37c67x_reset(fdc37c67x_t *dev) dev->locked = 0; } - static void fdc37c67x_close(void *priv) { @@ -574,7 +556,6 @@ fdc37c67x_close(void *priv) free(dev); } - static void * fdc37c67x_init(const device_t *info) { @@ -595,24 +576,23 @@ fdc37c67x_init(const device_t *info) fdc37c67x_reset(dev); io_sethandler(FDC_SECONDARY_ADDR, 0x0002, - fdc37c67x_read, NULL, NULL, fdc37c67x_write, NULL, NULL, dev); + fdc37c67x_read, NULL, NULL, fdc37c67x_write, NULL, NULL, dev); io_sethandler(FDC_PRIMARY_ADDR, 0x0002, - fdc37c67x_read, NULL, NULL, fdc37c67x_write, NULL, NULL, dev); + fdc37c67x_read, NULL, NULL, fdc37c67x_write, NULL, NULL, dev); return dev; } - const device_t fdc37c67x_device = { - .name = "SMC FDC37C67X Super I/O", + .name = "SMC FDC37C67X Super I/O", .internal_name = "fdc37c67x", - .flags = 0, - .local = 0x40, - .init = fdc37c67x_init, - .close = fdc37c67x_close, - .reset = NULL, + .flags = 0, + .local = 0x40, + .init = fdc37c67x_init, + .close = fdc37c67x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_fdc37c6xx.c b/src/sio/sio_fdc37c6xx.c index 15949c81c..609a51e4b 100644 --- a/src/sio/sio_fdc37c6xx.c +++ b/src/sio/sio_fdc37c6xx.c @@ -35,207 +35,197 @@ #include <86box/fdc.h> #include <86box/sio.h> - typedef struct { uint8_t max_reg, chip_id, - tries, has_ide, - regs[16]; + tries, has_ide, + regs[16]; int cur_reg, - com3_addr, com4_addr; - fdc_t *fdc; + com3_addr, com4_addr; + fdc_t *fdc; serial_t *uart[2]; } fdc37c6xx_t; - static void set_com34_addr(fdc37c6xx_t *dev) { switch (dev->regs[1] & 0x60) { - case 0x00: - dev->com3_addr = 0x338; - dev->com4_addr = 0x238; - break; - case 0x20: - dev->com3_addr = COM3_ADDR; - dev->com4_addr = COM4_ADDR; - break; - case 0x40: - dev->com3_addr = COM3_ADDR; - dev->com4_addr = 0x2e0; - break; - case 0x60: - dev->com3_addr = 0x220; - dev->com4_addr = 0x228; - break; + case 0x00: + dev->com3_addr = 0x338; + dev->com4_addr = 0x238; + break; + case 0x20: + dev->com3_addr = COM3_ADDR; + dev->com4_addr = COM4_ADDR; + break; + case 0x40: + dev->com3_addr = COM3_ADDR; + dev->com4_addr = 0x2e0; + break; + case 0x60: + dev->com3_addr = 0x220; + dev->com4_addr = 0x228; + break; } } - static void set_serial_addr(fdc37c6xx_t *dev, int port) { - uint8_t shift = (port << 2); - double clock_src = 24000000.0 / 13.0; + uint8_t shift = (port << 2); + double clock_src = 24000000.0 / 13.0; if (dev->regs[4] & (1 << (4 + port))) - clock_src = 24000000.0 / 12.0; + clock_src = 24000000.0 / 12.0; serial_remove(dev->uart[port]); if (dev->regs[2] & (4 << shift)) { - switch ((dev->regs[2] >> shift) & 3) { - case 0: - serial_setup(dev->uart[port], COM1_ADDR, COM1_IRQ); - break; - case 1: - serial_setup(dev->uart[port], COM2_ADDR, COM2_IRQ); - break; - case 2: - serial_setup(dev->uart[port], dev->com3_addr, COM3_IRQ); - break; - case 3: - serial_setup(dev->uart[port], dev->com4_addr, COM4_IRQ); - break; - } + switch ((dev->regs[2] >> shift) & 3) { + case 0: + serial_setup(dev->uart[port], COM1_ADDR, COM1_IRQ); + break; + case 1: + serial_setup(dev->uart[port], COM2_ADDR, COM2_IRQ); + break; + case 2: + serial_setup(dev->uart[port], dev->com3_addr, COM3_IRQ); + break; + case 3: + serial_setup(dev->uart[port], dev->com4_addr, COM4_IRQ); + break; + } } serial_set_clock_src(dev->uart[port], clock_src); } - static void lpt1_handler(fdc37c6xx_t *dev) { lpt1_remove(); switch (dev->regs[1] & 3) { - case 1: - lpt1_init(LPT_MDA_ADDR); - lpt1_irq(7); - break; - case 2: - lpt1_init(LPT1_ADDR); - lpt1_irq(7 /*5*/); - break; - case 3: - lpt1_init(LPT2_ADDR); - lpt1_irq(7 /*5*/); - break; + case 1: + lpt1_init(LPT_MDA_ADDR); + lpt1_irq(7); + break; + case 2: + lpt1_init(LPT1_ADDR); + lpt1_irq(7 /*5*/); + break; + case 3: + lpt1_init(LPT2_ADDR); + lpt1_irq(7 /*5*/); + break; } } - static void fdc_handler(fdc37c6xx_t *dev) { fdc_remove(dev->fdc); if (dev->regs[0] & 0x10) - fdc_set_base(dev->fdc, (dev->regs[5] & 0x01) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); + fdc_set_base(dev->fdc, (dev->regs[5] & 0x01) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); } - - static void ide_handler(fdc37c6xx_t *dev) { /* TODO: Make an ide_disable(channel) and ide_enable(channel) so we can simplify this. */ if (dev->has_ide == 2) { - ide_sec_disable(); - ide_set_base(1, (dev->regs[0x05] & 0x02) ? 0x170 : 0x1f0); - ide_set_side(1, (dev->regs[0x05] & 0x02) ? 0x376 : 0x3f6); - if (dev->regs[0x00] & 0x01) - ide_sec_enable(); + ide_sec_disable(); + ide_set_base(1, (dev->regs[0x05] & 0x02) ? 0x170 : 0x1f0); + ide_set_side(1, (dev->regs[0x05] & 0x02) ? 0x376 : 0x3f6); + if (dev->regs[0x00] & 0x01) + ide_sec_enable(); } else if (dev->has_ide == 1) { - ide_pri_disable(); - ide_set_base(0, (dev->regs[0x05] & 0x02) ? 0x170 : 0x1f0); - ide_set_side(0, (dev->regs[0x05] & 0x02) ? 0x376 : 0x3f6); - if (dev->regs[0x00] & 0x01) - ide_pri_enable(); + ide_pri_disable(); + ide_set_base(0, (dev->regs[0x05] & 0x02) ? 0x170 : 0x1f0); + ide_set_side(0, (dev->regs[0x05] & 0x02) ? 0x376 : 0x3f6); + if (dev->regs[0x00] & 0x01) + ide_pri_enable(); } } - static void fdc37c6xx_write(uint16_t port, uint8_t val, void *priv) { - fdc37c6xx_t *dev = (fdc37c6xx_t *) priv; - uint8_t valxor = 0; + fdc37c6xx_t *dev = (fdc37c6xx_t *) priv; + uint8_t valxor = 0; if (dev->tries == 2) { - if (port == FDC_PRIMARY_ADDR) { - if (val == 0xaa) - dev->tries = 0; - else - dev->cur_reg = val; - } else { - if (dev->cur_reg > dev->max_reg) - return; + if (port == FDC_PRIMARY_ADDR) { + if (val == 0xaa) + dev->tries = 0; + else + dev->cur_reg = val; + } else { + if (dev->cur_reg > dev->max_reg) + return; - valxor = val ^ dev->regs[dev->cur_reg]; - dev->regs[dev->cur_reg] = val; + valxor = val ^ dev->regs[dev->cur_reg]; + dev->regs[dev->cur_reg] = val; - switch(dev->cur_reg) { - case 0: - if (dev->has_ide && (valxor & 0x01)) - ide_handler(dev); - if (valxor & 0x10) - fdc_handler(dev); - break; - case 1: - if (valxor & 3) - lpt1_handler(dev); - if (valxor & 0x60) { - set_com34_addr(dev); - set_serial_addr(dev, 0); - set_serial_addr(dev, 1); - } - break; - case 2: - if (valxor & 7) - set_serial_addr(dev, 0); - if (valxor & 0x70) - set_serial_addr(dev, 1); - break; - case 3: - if (valxor & 2) - fdc_update_enh_mode(dev->fdc, (dev->regs[3] & 2) ? 1 : 0); - break; - case 4: - if (valxor & 0x10) - set_serial_addr(dev, 0); - if (valxor & 0x20) - set_serial_addr(dev, 1); - break; - case 5: - if (valxor & 0x01) - fdc_handler(dev); - if (dev->has_ide && (valxor & 0x02)) - ide_handler(dev); - if (valxor & 0x18) - fdc_update_densel_force(dev->fdc, (dev->regs[5] & 0x18) >> 3); - if (valxor & 0x20) - fdc_set_swap(dev->fdc, (dev->regs[5] & 0x20) >> 5); - break; - } - } + switch (dev->cur_reg) { + case 0: + if (dev->has_ide && (valxor & 0x01)) + ide_handler(dev); + if (valxor & 0x10) + fdc_handler(dev); + break; + case 1: + if (valxor & 3) + lpt1_handler(dev); + if (valxor & 0x60) { + set_com34_addr(dev); + set_serial_addr(dev, 0); + set_serial_addr(dev, 1); + } + break; + case 2: + if (valxor & 7) + set_serial_addr(dev, 0); + if (valxor & 0x70) + set_serial_addr(dev, 1); + break; + case 3: + if (valxor & 2) + fdc_update_enh_mode(dev->fdc, (dev->regs[3] & 2) ? 1 : 0); + break; + case 4: + if (valxor & 0x10) + set_serial_addr(dev, 0); + if (valxor & 0x20) + set_serial_addr(dev, 1); + break; + case 5: + if (valxor & 0x01) + fdc_handler(dev); + if (dev->has_ide && (valxor & 0x02)) + ide_handler(dev); + if (valxor & 0x18) + fdc_update_densel_force(dev->fdc, (dev->regs[5] & 0x18) >> 3); + if (valxor & 0x20) + fdc_set_swap(dev->fdc, (dev->regs[5] & 0x20) >> 5); + break; + } + } } else if ((port == FDC_PRIMARY_ADDR) && (val == 0x55)) - dev->tries++; + dev->tries++; } - static uint8_t fdc37c6xx_read(uint16_t port, void *priv) { fdc37c6xx_t *dev = (fdc37c6xx_t *) priv; - uint8_t ret = 0x00; + uint8_t ret = 0x00; if (dev->tries == 2) { - if (port == 0x3f1) - ret = dev->regs[dev->cur_reg]; + if (port == 0x3f1) + ret = dev->regs[dev->cur_reg]; } return ret; } - static void fdc37c6xx_reset(fdc37c6xx_t *dev) { @@ -258,18 +248,20 @@ fdc37c6xx_reset(fdc37c6xx_t *dev) memset(dev->regs, 0, 16); switch (dev->chip_id) { - case 0x63: case 0x65: - dev->max_reg = 0x0f; - dev->regs[0x0] = 0x3b; - break; - case 0x64: case 0x66: - dev->max_reg = 0x0f; - dev->regs[0x0] = 0x2b; - break; - default: - dev->max_reg = (dev->chip_id >= 0x61) ? 0x03 : 0x02; - dev->regs[0x0] = 0x3f; - break; + case 0x63: + case 0x65: + dev->max_reg = 0x0f; + dev->regs[0x0] = 0x3b; + break; + case 0x64: + case 0x66: + dev->max_reg = 0x0f; + dev->regs[0x0] = 0x2b; + break; + default: + dev->max_reg = (dev->chip_id >= 0x61) ? 0x03 : 0x02; + dev->regs[0x0] = 0x3f; + break; } dev->regs[0x1] = 0x9f; @@ -277,12 +269,12 @@ fdc37c6xx_reset(fdc37c6xx_t *dev) dev->regs[0x3] = 0x78; if (dev->chip_id >= 0x63) { - dev->regs[0x6] = 0xff; - dev->regs[0xd] = dev->chip_id; - if (dev->chip_id >= 0x65) - dev->regs[0xe] = 0x02; - else - dev->regs[0xe] = 0x01; + dev->regs[0x6] = 0xff; + dev->regs[0xd] = dev->chip_id; + if (dev->chip_id >= 0x65) + dev->regs[0xe] = 0x02; + else + dev->regs[0xe] = 0x01; } set_serial_addr(dev, 0); @@ -293,10 +285,9 @@ fdc37c6xx_reset(fdc37c6xx_t *dev) fdc_handler(dev); if (dev->has_ide) - ide_handler(dev); + ide_handler(dev); } - static void fdc37c6xx_close(void *priv) { @@ -305,7 +296,6 @@ fdc37c6xx_close(void *priv) free(dev); } - static void * fdc37c6xx_init(const device_t *info) { @@ -318,15 +308,15 @@ fdc37c6xx_init(const device_t *info) dev->has_ide = (info->local >> 8) & 0xff; if (dev->chip_id >= 0x63) { - dev->uart[0] = device_add_inst(&ns16550_device, 1); - dev->uart[1] = device_add_inst(&ns16550_device, 2); + dev->uart[0] = device_add_inst(&ns16550_device, 1); + dev->uart[1] = device_add_inst(&ns16550_device, 2); } else { - dev->uart[0] = device_add_inst(&ns16450_device, 1); - dev->uart[1] = device_add_inst(&ns16450_device, 2); + dev->uart[0] = device_add_inst(&ns16450_device, 1); + dev->uart[1] = device_add_inst(&ns16450_device, 2); } io_sethandler(FDC_PRIMARY_ADDR, 0x0002, - fdc37c6xx_read, NULL, NULL, fdc37c6xx_write, NULL, NULL, dev); + fdc37c6xx_read, NULL, NULL, fdc37c6xx_write, NULL, NULL, dev); fdc37c6xx_reset(dev); @@ -336,127 +326,127 @@ fdc37c6xx_init(const device_t *info) /* The three appear to differ only in the chip ID, if I understood their datasheets correctly. */ const device_t fdc37c651_device = { - .name = "SMC FDC37C651 Super I/O", + .name = "SMC FDC37C651 Super I/O", .internal_name = "fdc37c651", - .flags = 0, - .local = 0x51, - .init = fdc37c6xx_init, - .close = fdc37c6xx_close, - .reset = NULL, + .flags = 0, + .local = 0x51, + .init = fdc37c6xx_init, + .close = fdc37c6xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc37c651_ide_device = { - .name = "SMC FDC37C651 Super I/O (With IDE)", + .name = "SMC FDC37C651 Super I/O (With IDE)", .internal_name = "fdc37c651_ide", - .flags = 0, - .local = 0x151, - .init = fdc37c6xx_init, - .close = fdc37c6xx_close, - .reset = NULL, + .flags = 0, + .local = 0x151, + .init = fdc37c6xx_init, + .close = fdc37c6xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc37c661_device = { - .name = "SMC FDC37C661 Super I/O", + .name = "SMC FDC37C661 Super I/O", .internal_name = "fdc37c661", - .flags = 0, - .local = 0x61, - .init = fdc37c6xx_init, - .close = fdc37c6xx_close, - .reset = NULL, + .flags = 0, + .local = 0x61, + .init = fdc37c6xx_init, + .close = fdc37c6xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc37c661_ide_device = { - .name = "SMC FDC37C661 Super I/O (With IDE)", + .name = "SMC FDC37C661 Super I/O (With IDE)", .internal_name = "fdc37c661_ide", - .flags = 0, - .local = 0x161, - .init = fdc37c6xx_init, - .close = fdc37c6xx_close, - .reset = NULL, + .flags = 0, + .local = 0x161, + .init = fdc37c6xx_init, + .close = fdc37c6xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc37c663_device = { - .name = "SMC FDC37C663 Super I/O", + .name = "SMC FDC37C663 Super I/O", .internal_name = "fdc37c663", - .flags = 0, - .local = 0x63, - .init = fdc37c6xx_init, - .close = fdc37c6xx_close, - .reset = NULL, + .flags = 0, + .local = 0x63, + .init = fdc37c6xx_init, + .close = fdc37c6xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc37c663_ide_device = { - .name = "SMC FDC37C663 Super I/O (With IDE)", + .name = "SMC FDC37C663 Super I/O (With IDE)", .internal_name = "fdc37c663_ide", - .flags = 0, - .local = 0x163, - .init = fdc37c6xx_init, - .close = fdc37c6xx_close, - .reset = NULL, + .flags = 0, + .local = 0x163, + .init = fdc37c6xx_init, + .close = fdc37c6xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc37c665_device = { - .name = "SMC FDC37C665 Super I/O", + .name = "SMC FDC37C665 Super I/O", .internal_name = "fdc37c665", - .flags = 0, - .local = 0x65, - .init = fdc37c6xx_init, - .close = fdc37c6xx_close, - .reset = NULL, + .flags = 0, + .local = 0x65, + .init = fdc37c6xx_init, + .close = fdc37c6xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc37c665_ide_device = { - .name = "SMC FDC37C665 Super I/O (With IDE)", + .name = "SMC FDC37C665 Super I/O (With IDE)", .internal_name = "fdc37c665_ide", - .flags = 0, - .local = 0x265, - .init = fdc37c6xx_init, - .close = fdc37c6xx_close, - .reset = NULL, + .flags = 0, + .local = 0x265, + .init = fdc37c6xx_init, + .close = fdc37c6xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc37c666_device = { - .name = "SMC FDC37C666 Super I/O", + .name = "SMC FDC37C666 Super I/O", .internal_name = "fdc37c666", - .flags = 0, - .local = 0x66, - .init = fdc37c6xx_init, - .close = fdc37c6xx_close, - .reset = NULL, + .flags = 0, + .local = 0x66, + .init = fdc37c6xx_init, + .close = fdc37c6xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_fdc37c93x.c b/src/sio/sio_fdc37c93x.c index b9e9ef767..afc1642a5 100644 --- a/src/sio/sio_fdc37c93x.c +++ b/src/sio/sio_fdc37c93x.c @@ -35,37 +35,34 @@ #include <86box/acpi.h> #include <86box/sio.h> - -#define AB_RST 0x80 - +#define AB_RST 0x80 typedef struct { - uint8_t control; - uint8_t status; - uint8_t own_addr; - uint8_t data; - uint8_t clock; - uint16_t base; + uint8_t control; + uint8_t status; + uint8_t own_addr; + uint8_t data; + uint8_t clock; + uint16_t base; } access_bus_t; typedef struct { uint8_t chip_id, is_apm, - tries, - gpio_regs[2], auxio_reg, - regs[48], - ld_regs[11][256]; - uint16_t gpio_base, /* Set to EA */ - auxio_base, nvr_sec_base; + tries, + gpio_regs[2], auxio_reg, + regs[48], + ld_regs[11][256]; + uint16_t gpio_base, /* Set to EA */ + auxio_base, nvr_sec_base; int locked, - cur_reg; - fdc_t *fdc; - serial_t *uart[2]; + cur_reg; + fdc_t *fdc; + serial_t *uart[2]; access_bus_t *access_bus; - nvr_t *nvr; - acpi_t *acpi; + nvr_t *nvr; + acpi_t *acpi; } fdc37c93x_t; - static uint16_t make_port(fdc37c93x_t *dev, uint8_t ld) { @@ -77,7 +74,6 @@ make_port(fdc37c93x_t *dev, uint8_t ld) return p; } - static uint16_t make_port_sec(fdc37c93x_t *dev, uint8_t ld) { @@ -89,7 +85,6 @@ make_port_sec(fdc37c93x_t *dev, uint8_t ld) return p; } - static uint8_t fdc37c93x_auxio_read(uint16_t port, void *priv) { @@ -98,7 +93,6 @@ fdc37c93x_auxio_read(uint16_t port, void *priv) return dev->auxio_reg; } - static void fdc37c93x_auxio_write(uint16_t port, uint8_t val, void *priv) { @@ -107,83 +101,77 @@ fdc37c93x_auxio_write(uint16_t port, uint8_t val, void *priv) dev->auxio_reg = val; } - static uint8_t fdc37c93x_gpio_read(uint16_t port, void *priv) { fdc37c93x_t *dev = (fdc37c93x_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; ret = dev->gpio_regs[port & 1]; return ret; } - static void fdc37c93x_gpio_write(uint16_t port, uint8_t val, void *priv) { fdc37c93x_t *dev = (fdc37c93x_t *) priv; if (!(port & 1)) - dev->gpio_regs[0] = (dev->gpio_regs[0] & 0xfc) | (val & 0x03); + dev->gpio_regs[0] = (dev->gpio_regs[0] & 0xfc) | (val & 0x03); } - static void fdc37c93x_fdc_handler(fdc37c93x_t *dev) { - uint16_t ld_port = 0; - uint8_t global_enable = !!(dev->regs[0x22] & (1 << 0)); - uint8_t local_enable = !!dev->ld_regs[0][0x30]; + uint16_t ld_port = 0; + uint8_t global_enable = !!(dev->regs[0x22] & (1 << 0)); + uint8_t local_enable = !!dev->ld_regs[0][0x30]; fdc_remove(dev->fdc); if (global_enable && local_enable) { - ld_port = make_port(dev, 0) & 0xFFF8; - if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) - fdc_set_base(dev->fdc, ld_port); + ld_port = make_port(dev, 0) & 0xFFF8; + if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) + fdc_set_base(dev->fdc, ld_port); } } - static void fdc37c93x_lpt_handler(fdc37c93x_t *dev) { - uint16_t ld_port = 0; - uint8_t global_enable = !!(dev->regs[0x22] & (1 << 3)); - uint8_t local_enable = !!dev->ld_regs[3][0x30]; - uint8_t lpt_irq = dev->ld_regs[3][0x70]; + uint16_t ld_port = 0; + uint8_t global_enable = !!(dev->regs[0x22] & (1 << 3)); + uint8_t local_enable = !!dev->ld_regs[3][0x30]; + uint8_t lpt_irq = dev->ld_regs[3][0x70]; if (lpt_irq > 15) - lpt_irq = 0xff; + lpt_irq = 0xff; lpt1_remove(); if (global_enable && local_enable) { - ld_port = make_port(dev, 3) & 0xFFFC; - if ((ld_port >= 0x0100) && (ld_port <= 0x0FFC)) - lpt1_init(ld_port); + ld_port = make_port(dev, 3) & 0xFFFC; + if ((ld_port >= 0x0100) && (ld_port <= 0x0FFC)) + lpt1_init(ld_port); } lpt1_irq(lpt_irq); } - static void fdc37c93x_serial_handler(fdc37c93x_t *dev, int uart) { - uint16_t ld_port = 0; - uint8_t uart_no = 4 + uart; - uint8_t global_enable = !!(dev->regs[0x22] & (1 << uart_no)); - uint8_t local_enable = !!dev->ld_regs[uart_no][0x30]; + uint16_t ld_port = 0; + uint8_t uart_no = 4 + uart; + uint8_t global_enable = !!(dev->regs[0x22] & (1 << uart_no)); + uint8_t local_enable = !!dev->ld_regs[uart_no][0x30]; serial_remove(dev->uart[uart]); if (global_enable && local_enable) { - ld_port = make_port(dev, uart_no) & 0xFFF8; - if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) - serial_setup(dev->uart[uart], ld_port, dev->ld_regs[uart_no][0x70]); + ld_port = make_port(dev, uart_no) & 0xFFF8; + if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) + serial_setup(dev->uart[uart], ld_port, dev->ld_regs[uart_no][0x70]); } } - static void fdc37c93x_nvr_pri_handler(fdc37c93x_t *dev) { @@ -191,498 +179,492 @@ fdc37c93x_nvr_pri_handler(fdc37c93x_t *dev) nvr_at_handler(0, 0x70, dev->nvr); if (local_enable) - nvr_at_handler(1, 0x70, dev->nvr); + nvr_at_handler(1, 0x70, dev->nvr); } - static void fdc37c93x_nvr_sec_handler(fdc37c93x_t *dev) { - uint16_t ld_port = 0; - uint8_t local_enable = !!dev->ld_regs[6][0x30]; + uint16_t ld_port = 0; + uint8_t local_enable = !!dev->ld_regs[6][0x30]; nvr_at_sec_handler(0, dev->nvr_sec_base, dev->nvr); if (local_enable) { - dev->nvr_sec_base = ld_port = make_port_sec(dev, 6) & 0xFFFE; - /* Datasheet erratum: First it says minimum address is 0x0100, but later implies that it's 0x0000 - and that default is 0x0070, same as (unrelocatable) primary NVR. */ - if (ld_port <= 0x0FFE) - nvr_at_sec_handler(1, dev->nvr_sec_base, dev->nvr); + dev->nvr_sec_base = ld_port = make_port_sec(dev, 6) & 0xFFFE; + /* Datasheet erratum: First it says minimum address is 0x0100, but later implies that it's 0x0000 + and that default is 0x0070, same as (unrelocatable) primary NVR. */ + if (ld_port <= 0x0FFE) + nvr_at_sec_handler(1, dev->nvr_sec_base, dev->nvr); } } - static void fdc37c93x_auxio_handler(fdc37c93x_t *dev) { - uint16_t ld_port = 0; - uint8_t local_enable = !!dev->ld_regs[8][0x30]; + uint16_t ld_port = 0; + uint8_t local_enable = !!dev->ld_regs[8][0x30]; io_removehandler(dev->auxio_base, 0x0001, - fdc37c93x_auxio_read, NULL, NULL, fdc37c93x_auxio_write, NULL, NULL, dev); + fdc37c93x_auxio_read, NULL, NULL, fdc37c93x_auxio_write, NULL, NULL, dev); if (local_enable) { - dev->auxio_base = ld_port = make_port(dev, 8); - if ((ld_port >= 0x0100) && (ld_port <= 0x0FFF)) - io_sethandler(dev->auxio_base, 0x0001, - fdc37c93x_auxio_read, NULL, NULL, fdc37c93x_auxio_write, NULL, NULL, dev); + dev->auxio_base = ld_port = make_port(dev, 8); + if ((ld_port >= 0x0100) && (ld_port <= 0x0FFF)) + io_sethandler(dev->auxio_base, 0x0001, + fdc37c93x_auxio_read, NULL, NULL, fdc37c93x_auxio_write, NULL, NULL, dev); } } - static void fdc37c93x_gpio_handler(fdc37c93x_t *dev) { uint16_t ld_port = 0; - uint8_t local_enable; + uint8_t local_enable; local_enable = !!(dev->regs[0x03] & 0x80); io_removehandler(dev->gpio_base, 0x0002, - fdc37c93x_gpio_read, NULL, NULL, fdc37c93x_gpio_write, NULL, NULL, dev); + fdc37c93x_gpio_read, NULL, NULL, fdc37c93x_gpio_write, NULL, NULL, dev); if (local_enable) { - switch (dev->regs[0x03] & 0x03) { - case 0: - ld_port = 0xe0; - break; - case 1: - ld_port = 0xe2; - break; - case 2: - ld_port = 0xe4; - break; - case 3: - ld_port = 0xea; /* Default */ - break; - } - dev->gpio_base = ld_port; - if (ld_port > 0x0000) - io_sethandler(dev->gpio_base, 0x0002, - fdc37c93x_gpio_read, NULL, NULL, fdc37c93x_gpio_write, NULL, NULL, dev); + switch (dev->regs[0x03] & 0x03) { + case 0: + ld_port = 0xe0; + break; + case 1: + ld_port = 0xe2; + break; + case 2: + ld_port = 0xe4; + break; + case 3: + ld_port = 0xea; /* Default */ + break; + } + dev->gpio_base = ld_port; + if (ld_port > 0x0000) + io_sethandler(dev->gpio_base, 0x0002, + fdc37c93x_gpio_read, NULL, NULL, fdc37c93x_gpio_write, NULL, NULL, dev); } } - static uint8_t fdc37c93x_access_bus_read(uint16_t port, void *priv) { access_bus_t *dev = (access_bus_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; - switch(port & 3) { - case 0: - ret = (dev->status & 0xBF); - break; - case 1: - ret = (dev->own_addr & 0x7F); - break; - case 2: - ret = dev->data; - break; - case 3: - ret = (dev->clock & 0x87); - break; + switch (port & 3) { + case 0: + ret = (dev->status & 0xBF); + break; + case 1: + ret = (dev->own_addr & 0x7F); + break; + case 2: + ret = dev->data; + break; + case 3: + ret = (dev->clock & 0x87); + break; } return ret; } - static void fdc37c93x_access_bus_write(uint16_t port, uint8_t val, void *priv) { access_bus_t *dev = (access_bus_t *) priv; - switch(port & 3) { - case 0: - dev->control = (val & 0xCF); - break; - case 1: - dev->own_addr = (val & 0x7F); - break; - case 2: - dev->data = val; - break; - case 3: - dev->clock &= 0x80; - dev->clock |= (val & 0x07); - break; + switch (port & 3) { + case 0: + dev->control = (val & 0xCF); + break; + case 1: + dev->own_addr = (val & 0x7F); + break; + case 2: + dev->data = val; + break; + case 3: + dev->clock &= 0x80; + dev->clock |= (val & 0x07); + break; } } - static void fdc37c93x_access_bus_handler(fdc37c93x_t *dev) { - uint16_t ld_port = 0; - uint8_t global_enable = !!(dev->regs[0x22] & (1 << 6)); - uint8_t local_enable = !!dev->ld_regs[9][0x30]; + uint16_t ld_port = 0; + uint8_t global_enable = !!(dev->regs[0x22] & (1 << 6)); + uint8_t local_enable = !!dev->ld_regs[9][0x30]; io_removehandler(dev->access_bus->base, 0x0004, - fdc37c93x_access_bus_read, NULL, NULL, fdc37c93x_access_bus_write, NULL, NULL, dev->access_bus); + fdc37c93x_access_bus_read, NULL, NULL, fdc37c93x_access_bus_write, NULL, NULL, dev->access_bus); if (global_enable && local_enable) { - dev->access_bus->base = ld_port = make_port(dev, 9); - if ((ld_port >= 0x0100) && (ld_port <= 0x0FFC)) - io_sethandler(dev->access_bus->base, 0x0004, - fdc37c93x_access_bus_read, NULL, NULL, fdc37c93x_access_bus_write, NULL, NULL, dev->access_bus); + dev->access_bus->base = ld_port = make_port(dev, 9); + if ((ld_port >= 0x0100) && (ld_port <= 0x0FFC)) + io_sethandler(dev->access_bus->base, 0x0004, + fdc37c93x_access_bus_read, NULL, NULL, fdc37c93x_access_bus_write, NULL, NULL, dev->access_bus); } } - static void fdc37c93x_acpi_handler(fdc37c93x_t *dev) { - uint16_t ld_port = 0; - uint8_t local_enable = !!dev->ld_regs[0x0a][0x30]; - uint8_t sci_irq = dev->ld_regs[0x0a][0x70]; + uint16_t ld_port = 0; + uint8_t local_enable = !!dev->ld_regs[0x0a][0x30]; + uint8_t sci_irq = dev->ld_regs[0x0a][0x70]; acpi_update_io_mapping(dev->acpi, 0x0000, local_enable); if (local_enable) { - ld_port = make_port(dev, 0x0a) & 0xFFF0; - if ((ld_port >= 0x0100) && (ld_port <= 0x0FF0)) - acpi_update_io_mapping(dev->acpi, ld_port, local_enable); + ld_port = make_port(dev, 0x0a) & 0xFFF0; + if ((ld_port >= 0x0100) && (ld_port <= 0x0FF0)) + acpi_update_io_mapping(dev->acpi, ld_port, local_enable); } acpi_update_aux_io_mapping(dev->acpi, 0x0000, local_enable); if (local_enable) { - ld_port = make_port_sec(dev, 0x0a) & 0xFFF8; - if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) - acpi_update_aux_io_mapping(dev->acpi, ld_port, local_enable); + ld_port = make_port_sec(dev, 0x0a) & 0xFFF8; + if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8)) + acpi_update_aux_io_mapping(dev->acpi, ld_port, local_enable); } acpi_set_irq_line(dev->acpi, sci_irq); } - static void fdc37c93x_write(uint16_t port, uint8_t val, void *priv) { - fdc37c93x_t *dev = (fdc37c93x_t *) priv; - uint8_t index = (port & 1) ? 0 : 1; - uint8_t valxor = 0x00, keep = 0x00; + fdc37c93x_t *dev = (fdc37c93x_t *) priv; + uint8_t index = (port & 1) ? 0 : 1; + uint8_t valxor = 0x00, keep = 0x00; /* Compaq Presario 4500: Unlock at FB, Register at EA, Data at EB, Lock at F9. */ if ((port == 0xea) || (port == 0xf9) || (port == 0xfb)) - index = 1; + index = 1; else if (port == 0xeb) - index = 0; + index = 0; if (index) { - if ((val == 0x55) && !dev->locked) { - if (dev->tries) { - dev->locked = 1; - fdc_3f1_enable(dev->fdc, 0); - dev->tries = 0; - } else - dev->tries++; - } else { - if (dev->locked) { - if (val == 0xaa) { - dev->locked = 0; - fdc_3f1_enable(dev->fdc, 1); - return; - } - dev->cur_reg = val; - } else { - if (dev->tries) - dev->tries = 0; - } - } - return; + if ((val == 0x55) && !dev->locked) { + if (dev->tries) { + dev->locked = 1; + fdc_3f1_enable(dev->fdc, 0); + dev->tries = 0; + } else + dev->tries++; + } else { + if (dev->locked) { + if (val == 0xaa) { + dev->locked = 0; + fdc_3f1_enable(dev->fdc, 1); + return; + } + dev->cur_reg = val; + } else { + if (dev->tries) + dev->tries = 0; + } + } + return; } else { - if (dev->locked) { - if (dev->cur_reg < 48) { - valxor = val ^ dev->regs[dev->cur_reg]; - if ((val == 0x20) || (val == 0x21)) - return; - dev->regs[dev->cur_reg] = val; - } else { - valxor = val ^ dev->ld_regs[dev->regs[7]][dev->cur_reg]; - if (((dev->cur_reg & 0xF0) == 0x70) && (dev->regs[7] < 4)) - return; - /* Block writes to some logical devices. */ - if (dev->regs[7] > 0x0a) - return; - else switch (dev->regs[7]) { - case 0x01: - case 0x02: - case 0x07: - return; - case 0x06: - if (dev->chip_id != 0x30) - return; - /* Bits 0 to 3 of logical device 6 (RTC) register F0h must stay set - once they are set. */ - else if (dev->cur_reg == 0xf0) - keep = dev->ld_regs[dev->regs[7]][dev->cur_reg] & 0x0f; - break; - case 0x09: - /* If we're on the FDC37C935, return as this is not a valid - logical device there. */ - if (!dev->is_apm && (dev->chip_id == 0x02)) - return; - break; - case 0x0a: - /* If we're not on the FDC37C931APM, return as this is not a - valid logical device there. */ - if (!dev->is_apm) - return; - break; - } - dev->ld_regs[dev->regs[7]][dev->cur_reg] = val | keep; - } - } else - return; + if (dev->locked) { + if (dev->cur_reg < 48) { + valxor = val ^ dev->regs[dev->cur_reg]; + if ((val == 0x20) || (val == 0x21)) + return; + dev->regs[dev->cur_reg] = val; + } else { + valxor = val ^ dev->ld_regs[dev->regs[7]][dev->cur_reg]; + if (((dev->cur_reg & 0xF0) == 0x70) && (dev->regs[7] < 4)) + return; + /* Block writes to some logical devices. */ + if (dev->regs[7] > 0x0a) + return; + else + switch (dev->regs[7]) { + case 0x01: + case 0x02: + case 0x07: + return; + case 0x06: + if (dev->chip_id != 0x30) + return; + /* Bits 0 to 3 of logical device 6 (RTC) register F0h must stay set + once they are set. */ + else if (dev->cur_reg == 0xf0) + keep = dev->ld_regs[dev->regs[7]][dev->cur_reg] & 0x0f; + break; + case 0x09: + /* If we're on the FDC37C935, return as this is not a valid + logical device there. */ + if (!dev->is_apm && (dev->chip_id == 0x02)) + return; + break; + case 0x0a: + /* If we're not on the FDC37C931APM, return as this is not a + valid logical device there. */ + if (!dev->is_apm) + return; + break; + } + dev->ld_regs[dev->regs[7]][dev->cur_reg] = val | keep; + } + } else + return; } if (dev->cur_reg < 48) { - switch(dev->cur_reg) { - case 0x03: - if (valxor & 0x83) - fdc37c93x_gpio_handler(dev); - dev->regs[0x03] &= 0x83; - break; - case 0x22: - if (valxor & 0x01) - fdc37c93x_fdc_handler(dev); - if (valxor & 0x08) - fdc37c93x_lpt_handler(dev); - if (valxor & 0x10) - fdc37c93x_serial_handler(dev, 0); - if (valxor & 0x20) - fdc37c93x_serial_handler(dev, 1); - if ((valxor & 0x40) && (dev->chip_id != 0x02)) - fdc37c93x_access_bus_handler(dev); - break; - } + switch (dev->cur_reg) { + case 0x03: + if (valxor & 0x83) + fdc37c93x_gpio_handler(dev); + dev->regs[0x03] &= 0x83; + break; + case 0x22: + if (valxor & 0x01) + fdc37c93x_fdc_handler(dev); + if (valxor & 0x08) + fdc37c93x_lpt_handler(dev); + if (valxor & 0x10) + fdc37c93x_serial_handler(dev, 0); + if (valxor & 0x20) + fdc37c93x_serial_handler(dev, 1); + if ((valxor & 0x40) && (dev->chip_id != 0x02)) + fdc37c93x_access_bus_handler(dev); + break; + } - return; + return; } - switch(dev->regs[7]) { - case 0: - /* FDD */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - if ((dev->cur_reg == 0x30) && (val & 0x01)) - dev->regs[0x22] |= 0x01; - if (valxor) - fdc37c93x_fdc_handler(dev); - break; - case 0xF0: - if (valxor & 0x01) - fdc_update_enh_mode(dev->fdc, val & 0x01); - if (valxor & 0x10) - fdc_set_swap(dev->fdc, (val & 0x10) >> 4); - break; - case 0xF1: - if (valxor & 0xC) - fdc_update_densel_force(dev->fdc, (val & 0xc) >> 2); - break; - case 0xF2: - if (valxor & 0xC0) - fdc_update_rwc(dev->fdc, 3, (val & 0xc0) >> 6); - if (valxor & 0x30) - fdc_update_rwc(dev->fdc, 2, (val & 0x30) >> 4); - if (valxor & 0x0C) - fdc_update_rwc(dev->fdc, 1, (val & 0x0c) >> 2); - if (valxor & 0x03) - fdc_update_rwc(dev->fdc, 0, (val & 0x03)); - break; - case 0xF4: - if (valxor & 0x18) - fdc_update_drvrate(dev->fdc, 0, (val & 0x18) >> 3); - break; - case 0xF5: - if (valxor & 0x18) - fdc_update_drvrate(dev->fdc, 1, (val & 0x18) >> 3); - break; - case 0xF6: - if (valxor & 0x18) - fdc_update_drvrate(dev->fdc, 2, (val & 0x18) >> 3); - break; - case 0xF7: - if (valxor & 0x18) - fdc_update_drvrate(dev->fdc, 3, (val & 0x18) >> 3); - break; - } - break; - case 3: - /* Parallel port */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - case 0x70: - if ((dev->cur_reg == 0x30) && (val & 0x01)) - dev->regs[0x22] |= 0x08; - if (valxor) - fdc37c93x_lpt_handler(dev); - break; - } - break; - case 4: - /* Serial port 1 */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - case 0x70: - if ((dev->cur_reg == 0x30) && (val & 0x01)) - dev->regs[0x22] |= 0x10; - if (valxor) - fdc37c93x_serial_handler(dev, 0); - break; - } - break; - case 5: - /* Serial port 2 */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - case 0x70: - if ((dev->cur_reg == 0x30) && (val & 0x01)) - dev->regs[0x22] |= 0x20; - if (valxor) - fdc37c93x_serial_handler(dev, 1); - break; - } - break; - case 6: - /* RTC/NVR */ - if (dev->chip_id != 0x30) - break; - switch(dev->cur_reg) { - case 0x30: - if (valxor) - fdc37c93x_nvr_pri_handler(dev); - case 0x62: - case 0x63: - if (valxor) - fdc37c93x_nvr_sec_handler(dev); - break; - case 0xf0: - if (valxor) { - nvr_lock_set(0x80, 0x20, !!(dev->ld_regs[6][dev->cur_reg] & 0x01), dev->nvr); - nvr_lock_set(0xa0, 0x20, !!(dev->ld_regs[6][dev->cur_reg] & 0x02), dev->nvr); - nvr_lock_set(0xc0, 0x20, !!(dev->ld_regs[6][dev->cur_reg] & 0x04), dev->nvr); - nvr_lock_set(0xe0, 0x20, !!(dev->ld_regs[6][dev->cur_reg] & 0x08), dev->nvr); - if (dev->ld_regs[6][dev->cur_reg] & 0x80) switch ((dev->ld_regs[6][dev->cur_reg] >> 4) & 0x07) { - case 0x00: - default: - nvr_bank_set(0, 0xff, dev->nvr); - nvr_bank_set(1, 1, dev->nvr); - break; - case 0x01: - nvr_bank_set(0, 0, dev->nvr); - nvr_bank_set(1, 1, dev->nvr); - break; - case 0x02: case 0x04: - nvr_bank_set(0, 0xff, dev->nvr); - nvr_bank_set(1, 0xff, dev->nvr); - break; - case 0x03: case 0x05: - nvr_bank_set(0, 0, dev->nvr); - nvr_bank_set(1, 0xff, dev->nvr); - break; - case 0x06: - nvr_bank_set(0, 0xff, dev->nvr); - nvr_bank_set(1, 2, dev->nvr); - break; - case 0x07: - nvr_bank_set(0, 0, dev->nvr); - nvr_bank_set(1, 2, dev->nvr); - break; - } else { - nvr_bank_set(0, 0, dev->nvr); - nvr_bank_set(1, 0xff, dev->nvr); - } - } - break; - } - break; - case 8: - /* Auxiliary I/O */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - case 0x70: - if (valxor) - fdc37c93x_auxio_handler(dev); - break; - } - break; - case 9: - /* Access bus (FDC37C932FR and FDC37C931APM only) */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - case 0x70: - if ((dev->cur_reg == 0x30) && (val & 0x01)) - dev->regs[0x22] |= 0x40; - if (valxor) - fdc37c93x_access_bus_handler(dev); - break; - } - break; - case 10: - /* Access bus (FDC37C931APM only) */ - switch(dev->cur_reg) { - case 0x30: - case 0x60: - case 0x61: - case 0x62: - case 0x63: - case 0x70: - if (valxor) - fdc37c93x_acpi_handler(dev); - break; - } - break; + switch (dev->regs[7]) { + case 0: + /* FDD */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x01; + if (valxor) + fdc37c93x_fdc_handler(dev); + break; + case 0xF0: + if (valxor & 0x01) + fdc_update_enh_mode(dev->fdc, val & 0x01); + if (valxor & 0x10) + fdc_set_swap(dev->fdc, (val & 0x10) >> 4); + break; + case 0xF1: + if (valxor & 0xC) + fdc_update_densel_force(dev->fdc, (val & 0xc) >> 2); + break; + case 0xF2: + if (valxor & 0xC0) + fdc_update_rwc(dev->fdc, 3, (val & 0xc0) >> 6); + if (valxor & 0x30) + fdc_update_rwc(dev->fdc, 2, (val & 0x30) >> 4); + if (valxor & 0x0C) + fdc_update_rwc(dev->fdc, 1, (val & 0x0c) >> 2); + if (valxor & 0x03) + fdc_update_rwc(dev->fdc, 0, (val & 0x03)); + break; + case 0xF4: + if (valxor & 0x18) + fdc_update_drvrate(dev->fdc, 0, (val & 0x18) >> 3); + break; + case 0xF5: + if (valxor & 0x18) + fdc_update_drvrate(dev->fdc, 1, (val & 0x18) >> 3); + break; + case 0xF6: + if (valxor & 0x18) + fdc_update_drvrate(dev->fdc, 2, (val & 0x18) >> 3); + break; + case 0xF7: + if (valxor & 0x18) + fdc_update_drvrate(dev->fdc, 3, (val & 0x18) >> 3); + break; + } + break; + case 3: + /* Parallel port */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x08; + if (valxor) + fdc37c93x_lpt_handler(dev); + break; + } + break; + case 4: + /* Serial port 1 */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x10; + if (valxor) + fdc37c93x_serial_handler(dev, 0); + break; + } + break; + case 5: + /* Serial port 2 */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x20; + if (valxor) + fdc37c93x_serial_handler(dev, 1); + break; + } + break; + case 6: + /* RTC/NVR */ + if (dev->chip_id != 0x30) + break; + switch (dev->cur_reg) { + case 0x30: + if (valxor) + fdc37c93x_nvr_pri_handler(dev); + case 0x62: + case 0x63: + if (valxor) + fdc37c93x_nvr_sec_handler(dev); + break; + case 0xf0: + if (valxor) { + nvr_lock_set(0x80, 0x20, !!(dev->ld_regs[6][dev->cur_reg] & 0x01), dev->nvr); + nvr_lock_set(0xa0, 0x20, !!(dev->ld_regs[6][dev->cur_reg] & 0x02), dev->nvr); + nvr_lock_set(0xc0, 0x20, !!(dev->ld_regs[6][dev->cur_reg] & 0x04), dev->nvr); + nvr_lock_set(0xe0, 0x20, !!(dev->ld_regs[6][dev->cur_reg] & 0x08), dev->nvr); + if (dev->ld_regs[6][dev->cur_reg] & 0x80) + switch ((dev->ld_regs[6][dev->cur_reg] >> 4) & 0x07) { + case 0x00: + default: + nvr_bank_set(0, 0xff, dev->nvr); + nvr_bank_set(1, 1, dev->nvr); + break; + case 0x01: + nvr_bank_set(0, 0, dev->nvr); + nvr_bank_set(1, 1, dev->nvr); + break; + case 0x02: + case 0x04: + nvr_bank_set(0, 0xff, dev->nvr); + nvr_bank_set(1, 0xff, dev->nvr); + break; + case 0x03: + case 0x05: + nvr_bank_set(0, 0, dev->nvr); + nvr_bank_set(1, 0xff, dev->nvr); + break; + case 0x06: + nvr_bank_set(0, 0xff, dev->nvr); + nvr_bank_set(1, 2, dev->nvr); + break; + case 0x07: + nvr_bank_set(0, 0, dev->nvr); + nvr_bank_set(1, 2, dev->nvr); + break; + } + else { + nvr_bank_set(0, 0, dev->nvr); + nvr_bank_set(1, 0xff, dev->nvr); + } + } + break; + } + break; + case 8: + /* Auxiliary I/O */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + if (valxor) + fdc37c93x_auxio_handler(dev); + break; + } + break; + case 9: + /* Access bus (FDC37C932FR and FDC37C931APM only) */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x70: + if ((dev->cur_reg == 0x30) && (val & 0x01)) + dev->regs[0x22] |= 0x40; + if (valxor) + fdc37c93x_access_bus_handler(dev); + break; + } + break; + case 10: + /* Access bus (FDC37C931APM only) */ + switch (dev->cur_reg) { + case 0x30: + case 0x60: + case 0x61: + case 0x62: + case 0x63: + case 0x70: + if (valxor) + fdc37c93x_acpi_handler(dev); + break; + } + break; } } - static uint8_t fdc37c93x_read(uint16_t port, void *priv) { - fdc37c93x_t *dev = (fdc37c93x_t *) priv; - uint8_t index = (port & 1) ? 0 : 1; - uint8_t ret = 0xff; + fdc37c93x_t *dev = (fdc37c93x_t *) priv; + uint8_t index = (port & 1) ? 0 : 1; + uint8_t ret = 0xff; /* Compaq Presario 4500: Unlock at FB, Register at EA, Data at EB, Lock at F9. */ if ((port == 0xea) || (port == 0xf9) || (port == 0xfb)) - index = 1; + index = 1; else if (port == 0xeb) - index = 0; + index = 0; if (dev->locked) { - if (index) - ret = dev->cur_reg; - else { - if (dev->cur_reg < 0x30) { - if (dev->cur_reg == 0x20) - ret = dev->chip_id; - else - ret = dev->regs[dev->cur_reg]; - } else { - if ((dev->regs[7] == 0) && (dev->cur_reg == 0xF2)) { - ret = (fdc_get_rwc(dev->fdc, 0) | (fdc_get_rwc(dev->fdc, 1) << 2) | - (fdc_get_rwc(dev->fdc, 2) << 4) | (fdc_get_rwc(dev->fdc, 3) << 6)); - } else - ret = dev->ld_regs[dev->regs[7]][dev->cur_reg]; - } - } + if (index) + ret = dev->cur_reg; + else { + if (dev->cur_reg < 0x30) { + if (dev->cur_reg == 0x20) + ret = dev->chip_id; + else + ret = dev->regs[dev->cur_reg]; + } else { + if ((dev->regs[7] == 0) && (dev->cur_reg == 0xF2)) { + ret = (fdc_get_rwc(dev->fdc, 0) | (fdc_get_rwc(dev->fdc, 1) << 2) | (fdc_get_rwc(dev->fdc, 2) << 4) | (fdc_get_rwc(dev->fdc, 3) << 6)); + } else + ret = dev->ld_regs[dev->regs[7]][dev->cur_reg]; + } + } } return ret; } - static void fdc37c93x_reset(fdc37c93x_t *dev) { @@ -699,7 +681,7 @@ fdc37c93x_reset(fdc37c93x_t *dev) dev->regs[0x27] = 0x03; for (i = 0; i < 11; i++) - memset(dev->ld_regs[i], 0, 256); + memset(dev->ld_regs[i], 0, 256); /* Logical device 0: FDD */ dev->ld_regs[0][0x30] = 1; @@ -775,24 +757,23 @@ fdc37c93x_reset(fdc37c93x_t *dev) fdc37c93x_serial_handler(dev, 1); fdc37c93x_auxio_handler(dev); if (dev->is_apm || (dev->chip_id == 0x03)) - fdc37c93x_access_bus_handler(dev); + fdc37c93x_access_bus_handler(dev); if (dev->is_apm) - fdc37c93x_acpi_handler(dev); + fdc37c93x_acpi_handler(dev); fdc_reset(dev->fdc); fdc37c93x_fdc_handler(dev); if (dev->chip_id == 0x30) { - fdc37c93x_nvr_pri_handler(dev); - fdc37c93x_nvr_sec_handler(dev); - nvr_bank_set(0, 0, dev->nvr); - nvr_bank_set(1, 0xff, dev->nvr); + fdc37c93x_nvr_pri_handler(dev); + fdc37c93x_nvr_sec_handler(dev); + nvr_bank_set(0, 0, dev->nvr); + nvr_bank_set(1, 0xff, dev->nvr); } dev->locked = 0; } - static void access_bus_close(void *priv) { @@ -801,7 +782,6 @@ access_bus_close(void *priv) free(dev); } - static void * access_bus_init(const device_t *info) { @@ -811,18 +791,20 @@ access_bus_init(const device_t *info) return dev; } - static const device_t access_bus_device = { "SMC FDC37C932FR ACCESS.bus", "access_bus", 0, 0x03, - access_bus_init, access_bus_close, NULL, - { NULL }, NULL, NULL, + access_bus_init, + access_bus_close, + NULL, + { NULL }, + NULL, + NULL, NULL }; - static void fdc37c93x_close(void *priv) { @@ -831,11 +813,10 @@ fdc37c93x_close(void *priv) free(dev); } - static void * fdc37c93x_init(const device_t *info) { - int is_compaq; + int is_compaq; fdc37c93x_t *dev = (fdc37c93x_t *) malloc(sizeof(fdc37c93x_t)); memset(dev, 0, sizeof(fdc37c93x_t)); @@ -845,38 +826,38 @@ fdc37c93x_init(const device_t *info) dev->uart[1] = device_add_inst(&ns16550_device, 2); dev->chip_id = info->local & 0xff; - dev->is_apm = (info->local >> 8) & 0x01; - is_compaq = (info->local >> 8) & 0x02; + dev->is_apm = (info->local >> 8) & 0x01; + is_compaq = (info->local >> 8) & 0x02; dev->gpio_regs[0] = 0xff; // dev->gpio_regs[1] = (info->local == 0x0030) ? 0xff : 0xfd; dev->gpio_regs[1] = (dev->chip_id == 0x30) ? 0xff : 0xfd; if (dev->chip_id == 0x30) { - dev->nvr = device_add(&at_nvr_device); + dev->nvr = device_add(&at_nvr_device); - nvr_bank_set(0, 0, dev->nvr); - nvr_bank_set(1, 0xff, dev->nvr); + nvr_bank_set(0, 0, dev->nvr); + nvr_bank_set(1, 0xff, dev->nvr); } if (dev->is_apm || (dev->chip_id == 0x03)) - dev->access_bus = device_add(&access_bus_device); + dev->access_bus = device_add(&access_bus_device); if (dev->is_apm) - dev->acpi = device_add(&acpi_smc_device); + dev->acpi = device_add(&acpi_smc_device); if (is_compaq) { - io_sethandler(0x0ea, 0x0002, - fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev); - io_sethandler(0x0f9, 0x0001, - fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev); - io_sethandler(0x0fb, 0x0001, - fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev); + io_sethandler(0x0ea, 0x0002, + fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev); + io_sethandler(0x0f9, 0x0001, + fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev); + io_sethandler(0x0fb, 0x0001, + fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev); } else { - io_sethandler(FDC_SECONDARY_ADDR, 0x0002, - fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev); - io_sethandler(FDC_PRIMARY_ADDR, 0x0002, - fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev); + io_sethandler(FDC_SECONDARY_ADDR, 0x0002, + fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev); + io_sethandler(FDC_PRIMARY_ADDR, 0x0002, + fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev); } fdc37c93x_reset(dev); @@ -885,71 +866,71 @@ fdc37c93x_init(const device_t *info) } const device_t fdc37c931apm_device = { - .name = "SMC FDC37C932QF Super I/O", + .name = "SMC FDC37C932QF Super I/O", .internal_name = "fdc37c931apm", - .flags = 0, - .local = 0x130, /* Share the same ID with the 932QF. */ - .init = fdc37c93x_init, - .close = fdc37c93x_close, - .reset = NULL, + .flags = 0, + .local = 0x130, /* Share the same ID with the 932QF. */ + .init = fdc37c93x_init, + .close = fdc37c93x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc37c931apm_compaq_device = { - .name = "SMC FDC37C932QF Super I/O (Compaq Presario 4500)", + .name = "SMC FDC37C932QF Super I/O (Compaq Presario 4500)", .internal_name = "fdc37c931apm_compaq", - .flags = 0, - .local = 0x330, /* Share the same ID with the 932QF. */ - .init = fdc37c93x_init, - .close = fdc37c93x_close, - .reset = NULL, + .flags = 0, + .local = 0x330, /* Share the same ID with the 932QF. */ + .init = fdc37c93x_init, + .close = fdc37c93x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc37c932fr_device = { - .name = "SMC FDC37C932FR Super I/O", + .name = "SMC FDC37C932FR Super I/O", .internal_name = "fdc37c932fr", - .flags = 0, - .local = 0x03, - .init = fdc37c93x_init, - .close = fdc37c93x_close, - .reset = NULL, + .flags = 0, + .local = 0x03, + .init = fdc37c93x_init, + .close = fdc37c93x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc37c932qf_device = { - .name = "SMC FDC37C932QF Super I/O", + .name = "SMC FDC37C932QF Super I/O", .internal_name = "fdc37c932qf", - .flags = 0, - .local = 0x30, - .init = fdc37c93x_init, - .close = fdc37c93x_close, - .reset = NULL, + .flags = 0, + .local = 0x30, + .init = fdc37c93x_init, + .close = fdc37c93x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc37c935_device = { - .name = "SMC FDC37C935 Super I/O", + .name = "SMC FDC37C935 Super I/O", .internal_name = "fdc37c935", - .flags = 0, - .local = 0x02, - .init = fdc37c93x_init, - .close = fdc37c93x_close, - .reset = NULL, + .flags = 0, + .local = 0x02, + .init = fdc37c93x_init, + .close = fdc37c93x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_fdc37m60x.c b/src/sio/sio_fdc37m60x.c index a4433e582..d74db6207 100644 --- a/src/sio/sio_fdc37m60x.c +++ b/src/sio/sio_fdc37m60x.c @@ -31,23 +31,21 @@ #include <86box/fdc.h> #include <86box/sio.h> -#define SIO_INDEX_PORT dev->sio_index_port -#define INDEX dev->index +#define SIO_INDEX_PORT dev->sio_index_port +#define INDEX dev->index /* Current Logical Device Number */ -#define CURRENT_LOGICAL_DEVICE dev->regs[0x07] +#define CURRENT_LOGICAL_DEVICE dev->regs[0x07] /* Global Device Configuration */ -#define ENABLED(ld) dev->device_regs[ld][0x30] -#define BASE_ADDRESS(ld) ((dev->device_regs[ld][0x60] << 8) | \ - (dev->device_regs[ld][0x61])) -#define IRQ(ld) dev->device_regs[ld][0x70] -#define DMA(ld) dev->device_regs[ld][0x74] +#define ENABLED(ld) dev->device_regs[ld][0x30] +#define BASE_ADDRESS(ld) ((dev->device_regs[ld][0x60] << 8) | (dev->device_regs[ld][0x61])) +#define IRQ(ld) dev->device_regs[ld][0x70] +#define DMA(ld) dev->device_regs[ld][0x74] /* Miscellaneous Chip Functionality */ -#define SOFT_RESET (val & 0x01) -#define POWER_CONTROL dev->regs[0x22] - +#define SOFT_RESET (val & 0x01) +#define POWER_CONTROL dev->regs[0x22] #ifdef ENABLE_FDC37M60X_LOG int fdc37m60x_do_log = ENABLE_FDC37M60X_LOG; @@ -57,117 +55,120 @@ fdc37m60x_log(const char *fmt, ...) { va_list ap; - if (fdc37m60x_do_log) - { + if (fdc37m60x_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define fdc37m60x_log(fmt, ...) +# define fdc37m60x_log(fmt, ...) #endif - typedef struct { - uint8_t index, regs[256], device_regs[10][256], cfg_lock, ide_function; - uint16_t sio_index_port; + uint8_t index, regs[256], device_regs[10][256], cfg_lock, ide_function; + uint16_t sio_index_port; - fdc_t * fdc; - serial_t * uart[2]; + fdc_t *fdc; + serial_t *uart[2]; } fdc37m60x_t; - -static void fdc37m60x_fdc_handler(fdc37m60x_t *dev); -static void fdc37m60x_uart_handler(uint8_t num, fdc37m60x_t *dev); -static void fdc37m60x_lpt_handler(fdc37m60x_t *dev); -static void fdc37m60x_logical_device_handler(fdc37m60x_t *dev); -static void fdc37m60x_reset(void *priv); - +static void fdc37m60x_fdc_handler(fdc37m60x_t *dev); +static void fdc37m60x_uart_handler(uint8_t num, fdc37m60x_t *dev); +static void fdc37m60x_lpt_handler(fdc37m60x_t *dev); +static void fdc37m60x_logical_device_handler(fdc37m60x_t *dev); +static void fdc37m60x_reset(void *priv); static void fdc37m60x_write(uint16_t addr, uint8_t val, void *priv) { - fdc37m60x_t *dev = (fdc37m60x_t *)priv; + fdc37m60x_t *dev = (fdc37m60x_t *) priv; if (addr & 1) { - if (!dev->cfg_lock) { - switch (INDEX) { - /* Global Configuration */ - case 0x02: - dev->regs[INDEX] = val; - if (SOFT_RESET) - fdc37m60x_reset(dev); - break; + if (!dev->cfg_lock) { + switch (INDEX) { + /* Global Configuration */ + case 0x02: + dev->regs[INDEX] = val; + if (SOFT_RESET) + fdc37m60x_reset(dev); + break; - case 0x07: - CURRENT_LOGICAL_DEVICE = val; - break; + case 0x07: + CURRENT_LOGICAL_DEVICE = val; + break; - case 0x22: - POWER_CONTROL = val & 0x3f; - break; + case 0x22: + POWER_CONTROL = val & 0x3f; + break; - case 0x23: - dev->regs[INDEX] = val & 0x3f; - break; + case 0x23: + dev->regs[INDEX] = val & 0x3f; + break; - case 0x24: - dev->regs[INDEX] = val & 0x4e; - break; + case 0x24: + dev->regs[INDEX] = val & 0x4e; + break; - case 0x2b: case 0x2c: case 0x2d: case 0x2e: - case 0x2f: - dev->regs[INDEX] = val; - break; + case 0x2b: + case 0x2c: + case 0x2d: + case 0x2e: + case 0x2f: + dev->regs[INDEX] = val; + break; - /* Device Configuration */ - case 0x30: - case 0x60: case 0x61: - case 0x70: - case 0x74: - case 0xf0: case 0xf1: case 0xf2: case 0xf3: - case 0xf4: case 0xf5: case 0xf6: case 0xf7: - if (CURRENT_LOGICAL_DEVICE <= 0x81) /* Avoid Overflow */ - dev->device_regs[CURRENT_LOGICAL_DEVICE][INDEX] = (INDEX == 0x30) ? (val & 1) : val; - fdc37m60x_logical_device_handler(dev); - break; - } + /* Device Configuration */ + case 0x30: + case 0x60: + case 0x61: + case 0x70: + case 0x74: + case 0xf0: + case 0xf1: + case 0xf2: + case 0xf3: + case 0xf4: + case 0xf5: + case 0xf6: + case 0xf7: + if (CURRENT_LOGICAL_DEVICE <= 0x81) /* Avoid Overflow */ + dev->device_regs[CURRENT_LOGICAL_DEVICE][INDEX] = (INDEX == 0x30) ? (val & 1) : val; + fdc37m60x_logical_device_handler(dev); + break; + } } } else { - /* Enter/Escape Configuration Mode */ - if (val == 0x55) - dev->cfg_lock = 0; - else if (!dev->cfg_lock && (val == 0xaa)) - dev->cfg_lock = 1; - else if (!dev->cfg_lock) - INDEX = val; + /* Enter/Escape Configuration Mode */ + if (val == 0x55) + dev->cfg_lock = 0; + else if (!dev->cfg_lock && (val == 0xaa)) + dev->cfg_lock = 1; + else if (!dev->cfg_lock) + INDEX = val; } } - static uint8_t fdc37m60x_read(uint16_t addr, void *priv) { - fdc37m60x_t *dev = (fdc37m60x_t *)priv; - uint8_t ret = 0xff; + fdc37m60x_t *dev = (fdc37m60x_t *) priv; + uint8_t ret = 0xff; if (addr & 1) - ret = (INDEX >= 0x30) ? dev->device_regs[CURRENT_LOGICAL_DEVICE][INDEX] : dev->regs[INDEX]; + ret = (INDEX >= 0x30) ? dev->device_regs[CURRENT_LOGICAL_DEVICE][INDEX] : dev->regs[INDEX]; return ret; } - static void fdc37m60x_fdc_handler(fdc37m60x_t *dev) { fdc_remove(dev->fdc); - if (ENABLED(0) || (POWER_CONTROL & 0x01)) - { + if (ENABLED(0) || (POWER_CONTROL & 0x01)) { fdc_set_base(dev->fdc, BASE_ADDRESS(0)); fdc_set_irq(dev->fdc, IRQ(0) & 0xf); fdc_set_dma_ch(dev->fdc, DMA(0) & 0x07); @@ -189,70 +190,67 @@ fdc37m60x_fdc_handler(fdc37m60x_t *dev) fdc_update_drvrate(dev->fdc, 3, (dev->device_regs[0][0xf7] & 0x18) >> 3); } - static void fdc37m60x_uart_handler(uint8_t num, fdc37m60x_t *dev) { serial_remove(dev->uart[num & 1]); - if (ENABLED(4 + (num & 1)) || (POWER_CONTROL & (1 << (4 + (num & 1))))) - { + if (ENABLED(4 + (num & 1)) || (POWER_CONTROL & (1 << (4 + (num & 1))))) { serial_setup(dev->uart[num & 1], BASE_ADDRESS(4 + (num & 1)), IRQ(4 + (num & 1)) & 0xf); fdc37m60x_log("SMC60x-UART%d: BASE %04x IRQ %d\n", num & 1, BASE_ADDRESS(4 + (num & 1)), IRQ(4 + (num & 1)) & 0xf); } } - -void fdc37m60x_lpt_handler(fdc37m60x_t *dev) +void +fdc37m60x_lpt_handler(fdc37m60x_t *dev) { lpt1_remove(); if (ENABLED(3) || (POWER_CONTROL & 0x08)) { - lpt1_init(BASE_ADDRESS(3)); - lpt1_irq(IRQ(3) & 0xf); - fdc37m60x_log("SMC60x-LPT: BASE %04x IRQ %d\n", BASE_ADDRESS(3), IRQ(3) & 0xf); + lpt1_init(BASE_ADDRESS(3)); + lpt1_irq(IRQ(3) & 0xf); + fdc37m60x_log("SMC60x-LPT: BASE %04x IRQ %d\n", BASE_ADDRESS(3), IRQ(3) & 0xf); } } - -void fdc37m60x_logical_device_handler(fdc37m60x_t *dev) +void +fdc37m60x_logical_device_handler(fdc37m60x_t *dev) { /* Register 07h: - Device 0: FDC - Device 3: LPT - Device 4: UART1 - Device 5: UART2 + Device 0: FDC + Device 3: LPT + Device 4: UART1 + Device 5: UART2 */ switch (CURRENT_LOGICAL_DEVICE) { - case 0x00: - fdc37m60x_fdc_handler(dev); - break; + case 0x00: + fdc37m60x_fdc_handler(dev); + break; - case 0x03: - fdc37m60x_lpt_handler(dev); - break; + case 0x03: + fdc37m60x_lpt_handler(dev); + break; - case 0x04: - fdc37m60x_uart_handler(0, dev); - break; + case 0x04: + fdc37m60x_uart_handler(0, dev); + break; - case 0x05: - fdc37m60x_uart_handler(1, dev); - break; + case 0x05: + fdc37m60x_uart_handler(1, dev); + break; } } - static void fdc37m60x_reset(void *priv) { fdc37m60x_t *dev = (fdc37m60x_t *) priv; - uint8_t i; + uint8_t i; memset(dev->regs, 0, sizeof(dev->regs)); for (i = 0; i < 10; i++) - memset(dev->device_regs[i], 0, sizeof(dev->device_regs[i])); + memset(dev->device_regs[i], 0, sizeof(dev->device_regs[i])); dev->regs[0x20] = 0x47; dev->regs[0x24] = 0x04; @@ -286,24 +284,22 @@ fdc37m60x_reset(void *priv) fdc37m60x_lpt_handler(dev); } - static void fdc37m60x_close(void *priv) { - fdc37m60x_t *dev = (fdc37m60x_t *)priv; + fdc37m60x_t *dev = (fdc37m60x_t *) priv; free(dev); } - static void * fdc37m60x_init(const device_t *info) { - fdc37m60x_t *dev = (fdc37m60x_t *)malloc(sizeof(fdc37m60x_t)); + fdc37m60x_t *dev = (fdc37m60x_t *) malloc(sizeof(fdc37m60x_t)); memset(dev, 0, sizeof(fdc37m60x_t)); SIO_INDEX_PORT = info->local; - dev->fdc = device_add(&fdc_at_smc_device); + dev->fdc = device_add(&fdc_at_smc_device); dev->uart[0] = device_add_inst(&ns16550_device, 1); dev->uart[1] = device_add_inst(&ns16550_device, 2); @@ -315,29 +311,29 @@ fdc37m60x_init(const device_t *info) } const device_t fdc37m60x_device = { - .name = "SMSC FDC37M60X", + .name = "SMSC FDC37M60X", .internal_name = "fdc37m60x", - .flags = 0, - .local = FDC_PRIMARY_ADDR, - .init = fdc37m60x_init, - .close = fdc37m60x_close, - .reset = NULL, + .flags = 0, + .local = FDC_PRIMARY_ADDR, + .init = fdc37m60x_init, + .close = fdc37m60x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t fdc37m60x_370_device = { - .name = "SMSC FDC37M60X with 10K Pull Up Resistor", + .name = "SMSC FDC37M60X with 10K Pull Up Resistor", .internal_name = "fdc37m60x_370", - .flags = 0, - .local = FDC_SECONDARY_ADDR, - .init = fdc37m60x_init, - .close = fdc37m60x_close, - .reset = NULL, + .flags = 0, + .local = FDC_SECONDARY_ADDR, + .init = fdc37m60x_init, + .close = fdc37m60x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_it8661f.c b/src/sio/sio_it8661f.c index 31109df91..98340aaa5 100644 --- a/src/sio/sio_it8661f.c +++ b/src/sio/sio_it8661f.c @@ -33,250 +33,237 @@ #include <86box/fdd_common.h> #include <86box/sio.h> - #define LDN dev->regs[7] - typedef struct { - fdc_t *fdc_controller; + fdc_t *fdc_controller; serial_t *uart[2]; uint8_t index, regs[256], device_regs[6][256]; - int unlocked, enumerator; + int unlocked, enumerator; } it8661f_t; +static uint8_t mb_pnp_key[32] = { 0x6a, 0xb5, 0xda, 0xed, 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b, 0x0d, 0x86, 0xc3, 0x61, 0xb0, 0x58, 0x2c, 0x16, 0x8b, 0x45, 0xa2, 0xd1, 0xe8, 0x74, 0x3a, 0x9d, 0xce, 0xe7, 0x73, 0x39 }; -static uint8_t mb_pnp_key[32] = {0x6a, 0xb5, 0xda, 0xed, 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b, 0x0d, 0x86, 0xc3, 0x61, 0xb0, 0x58, 0x2c, 0x16, 0x8b, 0x45, 0xa2, 0xd1, 0xe8, 0x74, 0x3a, 0x9d, 0xce, 0xe7, 0x73, 0x39}; - - -static void it8661f_reset(void *priv); - +static void it8661f_reset(void *priv); #ifdef ENABLE_IT8661_LOG int it8661_do_log = ENABLE_IT8661_LOG; - void it8661_log(const char *fmt, ...) { va_list ap; if (it8661_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define it8661_log(fmt, ...) +# define it8661_log(fmt, ...) #endif - static void it8661_fdc(uint16_t addr, uint8_t val, it8661f_t *dev) { fdc_remove(dev->fdc_controller); if (((addr == 0x30) && (val & 1)) || (dev->device_regs[0][0x30] & 1)) { - switch (addr) { - case 0x30: - dev->device_regs[0][addr] = val & 1; - break; + switch (addr) { + case 0x30: + dev->device_regs[0][addr] = val & 1; + break; - case 0x31: - dev->device_regs[0][addr] = val & 3; - if (val & 1) - dev->device_regs[0][addr] |= 0x55; - break; + case 0x31: + dev->device_regs[0][addr] = val & 3; + if (val & 1) + dev->device_regs[0][addr] |= 0x55; + break; - case 0x60: - case 0x61: - dev->device_regs[0][addr] = val & ((addr == 0x61) ? 0xff : 0xf8); - break; + case 0x60: + case 0x61: + dev->device_regs[0][addr] = val & ((addr == 0x61) ? 0xff : 0xf8); + break; - case 0x70: - dev->device_regs[0][addr] = val & 0x0f; - break; + case 0x70: + dev->device_regs[0][addr] = val & 0x0f; + break; - case 0x74: - dev->device_regs[0][addr] = val & 7; - break; + case 0x74: + dev->device_regs[0][addr] = val & 7; + break; - case 0xf0: - dev->device_regs[0][addr] = val & 0x0f; - break; - } + case 0xf0: + dev->device_regs[0][addr] = val & 0x0f; + break; + } - fdc_set_base(dev->fdc_controller, (dev->device_regs[0][0x60] << 8) | (dev->device_regs[0][0x61])); - fdc_set_irq(dev->fdc_controller, dev->device_regs[0][0x70] & 0x0f); - fdc_set_dma_ch(dev->fdc_controller, dev->device_regs[0][0x74] & 7); + fdc_set_base(dev->fdc_controller, (dev->device_regs[0][0x60] << 8) | (dev->device_regs[0][0x61])); + fdc_set_irq(dev->fdc_controller, dev->device_regs[0][0x70] & 0x0f); + fdc_set_dma_ch(dev->fdc_controller, dev->device_regs[0][0x74] & 7); - if (dev->device_regs[0][0xf0] & 1) - fdc_writeprotect(dev->fdc_controller); + if (dev->device_regs[0][0xf0] & 1) + fdc_writeprotect(dev->fdc_controller); it8661_log("ITE 8661-FDC: BASE %04x IRQ %02x\n", (dev->device_regs[0][0x60] << 8) | (dev->device_regs[0][0x61]), - dev->device_regs[0][0x70] & 0x0f); + dev->device_regs[0][0x70] & 0x0f); } } - static void it8661_serial(int uart, uint16_t addr, uint8_t val, it8661f_t *dev) { serial_remove(dev->uart[uart]); if (((addr == 0x30) && (val & 1)) || (dev->device_regs[1 + uart][0x30] & 1)) { - switch (addr) { - case 0x30: - dev->device_regs[1 + uart][addr] = val & 1; - break; + switch (addr) { + case 0x30: + dev->device_regs[1 + uart][addr] = val & 1; + break; - case 0x60: - case 0x61: - dev->device_regs[1 + uart][addr] = val & ((addr == 0x61) ? 0xff : 0xf8); - break; + case 0x60: + case 0x61: + dev->device_regs[1 + uart][addr] = val & ((addr == 0x61) ? 0xff : 0xf8); + break; - case 0x70: - dev->device_regs[1 + uart][addr] = val & 0x0f; - break; + case 0x70: + dev->device_regs[1 + uart][addr] = val & 0x0f; + break; - case 0x74: - dev->device_regs[1 + uart][addr] = val & 7; - break; + case 0x74: + dev->device_regs[1 + uart][addr] = val & 7; + break; - case 0xf0: - dev->device_regs[1 + uart][addr] = val & 3; - break; - } + case 0xf0: + dev->device_regs[1 + uart][addr] = val & 3; + break; + } - serial_setup(dev->uart[uart], (dev->device_regs[1 + uart][0x60] << 8) | (dev->device_regs[1 + uart][0x61]), dev->device_regs[1 + uart][0x70] & 0x0f); + serial_setup(dev->uart[uart], (dev->device_regs[1 + uart][0x60] << 8) | (dev->device_regs[1 + uart][0x61]), dev->device_regs[1 + uart][0x70] & 0x0f); - it8661_log("ITE 8661-UART%01x: BASE %04x IRQ %02x\n", 1 + (LDN % 1), - (dev->device_regs[1 + uart][0x60] << 8) | (dev->device_regs[1 + uart][0x61]), - dev->device_regs[1 + uart][0x70] & 0x0f); + it8661_log("ITE 8661-UART%01x: BASE %04x IRQ %02x\n", 1 + (LDN % 1), + (dev->device_regs[1 + uart][0x60] << 8) | (dev->device_regs[1 + uart][0x61]), + dev->device_regs[1 + uart][0x70] & 0x0f); } } - void it8661_lpt(uint16_t addr, uint8_t val, it8661f_t *dev) { lpt1_remove(); if (((addr == 0x30) && (val & 1)) || (dev->device_regs[3][0x30] & 1)) { - switch (addr) { - case 0x30: - dev->device_regs[3][addr] = val & 1; - break; + switch (addr) { + case 0x30: + dev->device_regs[3][addr] = val & 1; + break; - case 0x60: - case 0x61: - dev->device_regs[3][addr] = val & ((addr == 0x61) ? 0xff : 0xf8); - break; + case 0x60: + case 0x61: + dev->device_regs[3][addr] = val & ((addr == 0x61) ? 0xff : 0xf8); + break; - case 0x70: - dev->device_regs[3][addr] = val & 0x0f; - break; + case 0x70: + dev->device_regs[3][addr] = val & 0x0f; + break; - case 0x74: - dev->device_regs[3][addr] = val & 7; - break; + case 0x74: + dev->device_regs[3][addr] = val & 7; + break; - case 0xf0: - dev->device_regs[3][addr] = val & 3; - break; - } + case 0xf0: + dev->device_regs[3][addr] = val & 3; + break; + } - lpt1_init((dev->device_regs[3][0x60] << 8) | (dev->device_regs[3][0x61])); - lpt1_irq(dev->device_regs[3][0x70] & 0x0f); + lpt1_init((dev->device_regs[3][0x60] << 8) | (dev->device_regs[3][0x61])); + lpt1_irq(dev->device_regs[3][0x70] & 0x0f); - it8661_log("ITE 8661-LPT: BASE %04x IRQ %02x\n", (dev->device_regs[3][0x60] << 8) | (dev->device_regs[3][0x61]), - dev->device_regs[3][0x70] & 0x0f); + it8661_log("ITE 8661-LPT: BASE %04x IRQ %02x\n", (dev->device_regs[3][0x60] << 8) | (dev->device_regs[3][0x61]), + dev->device_regs[3][0x70] & 0x0f); } } - void it8661_ldn(uint16_t addr, uint8_t val, it8661f_t *dev) { switch (LDN) { - case 0: - it8661_fdc(addr, val, dev); - break; - case 1: - case 2: - it8661_serial(LDN & 2, addr, val, dev); - break; - case 3: - it8661_lpt(addr, val, dev); - break; + case 0: + it8661_fdc(addr, val, dev); + break; + case 1: + case 2: + it8661_serial(LDN & 2, addr, val, dev); + break; + case 3: + it8661_lpt(addr, val, dev); + break; } } - static void it8661f_write(uint16_t addr, uint8_t val, void *priv) { - it8661f_t *dev = (it8661f_t *)priv; + it8661f_t *dev = (it8661f_t *) priv; switch (addr) { - case FDC_SECONDARY_ADDR: - if (!dev->unlocked) { - (val == mb_pnp_key[dev->enumerator]) ? dev->enumerator++ : (dev->enumerator = 0); - if (dev->enumerator == 31) { - dev->unlocked = 1; - it8661_log("ITE8661F: Unlocked!\n"); - } - } else - dev->index = val; - break; + case FDC_SECONDARY_ADDR: + if (!dev->unlocked) { + (val == mb_pnp_key[dev->enumerator]) ? dev->enumerator++ : (dev->enumerator = 0); + if (dev->enumerator == 31) { + dev->unlocked = 1; + it8661_log("ITE8661F: Unlocked!\n"); + } + } else + dev->index = val; + break; - case 0x371: - if (dev->unlocked) { - switch (dev->index) { - case 0x02: - dev->regs[dev->index] = val; - if (val & 1) - it8661f_reset(dev); - if (val & 2) - dev->unlocked = 0; - break; - case 0x07: - dev->regs[dev->index] = val; - break; - case 0x22: - dev->regs[dev->index] = val & 0x30; - break; - case 0x23: - dev->regs[dev->index] = val & 0x1f; - break; - default: - it8661_ldn(dev->index, val, dev); - break; - } - } - break; + case 0x371: + if (dev->unlocked) { + switch (dev->index) { + case 0x02: + dev->regs[dev->index] = val; + if (val & 1) + it8661f_reset(dev); + if (val & 2) + dev->unlocked = 0; + break; + case 0x07: + dev->regs[dev->index] = val; + break; + case 0x22: + dev->regs[dev->index] = val & 0x30; + break; + case 0x23: + dev->regs[dev->index] = val & 0x1f; + break; + default: + it8661_ldn(dev->index, val, dev); + break; + } + } + break; } return; } - static uint8_t it8661f_read(uint16_t addr, void *priv) { - it8661f_t *dev = (it8661f_t *)priv; + it8661f_t *dev = (it8661f_t *) priv; it8661_log("IT8661F:\n", addr, dev->regs[dev->index]); return (addr == 0xa79) ? dev->regs[dev->index] : 0xff; } - static void it8661f_reset(void *priv) { - it8661f_t *dev = (it8661f_t *)priv; + it8661f_t *dev = (it8661f_t *) priv; dev->regs[0x20] = 0x86; dev->regs[0x21] = 0x61; @@ -304,20 +291,18 @@ it8661f_reset(void *priv) dev->device_regs[3][0xf0] = 3; } - static void it8661f_close(void *priv) { - it8661f_t *dev = (it8661f_t *)priv; + it8661f_t *dev = (it8661f_t *) priv; free(dev); } - static void * it8661f_init(const device_t *info) { - it8661f_t *dev = (it8661f_t *)malloc(sizeof(it8661f_t)); + it8661f_t *dev = (it8661f_t *) malloc(sizeof(it8661f_t)); memset(dev, 0, sizeof(it8661f_t)); dev->fdc_controller = device_add(&fdc_at_smc_device); @@ -329,22 +314,22 @@ it8661f_init(const device_t *info) io_sethandler(FDC_SECONDARY_ADDR, 0x0002, it8661f_read, NULL, NULL, it8661f_write, NULL, NULL, dev); dev->enumerator = 0; - dev->unlocked = 0; + dev->unlocked = 0; it8661f_reset(dev); return dev; } const device_t it8661f_device = { - .name = "ITE IT8661F", + .name = "ITE IT8661F", .internal_name = "it8661f", - .flags = 0, - .local = 0, - .init = it8661f_init, - .close = it8661f_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = it8661f_init, + .close = it8661f_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_pc87306.c b/src/sio/sio_pc87306.c index 5037768fd..18b9a9357 100644 --- a/src/sio/sio_pc87306.c +++ b/src/sio/sio_pc87306.c @@ -34,17 +34,15 @@ #include <86box/fdc.h> #include <86box/sio.h> - typedef struct { uint8_t tries, - regs[29], gpio[2]; - int cur_reg; - fdc_t *fdc; + regs[29], gpio[2]; + int cur_reg; + fdc_t *fdc; serial_t *uart[2]; - nvr_t *nvr; + nvr_t *nvr; } pc87306_t; - static void pc87306_gpio_write(uint16_t port, uint8_t val, void *priv) { @@ -53,7 +51,6 @@ pc87306_gpio_write(uint16_t port, uint8_t val, void *priv) dev->gpio[port & 1] = val; } - uint8_t pc87306_gpio_read(uint16_t port, void *priv) { @@ -62,298 +59,291 @@ pc87306_gpio_read(uint16_t port, void *priv) return dev->gpio[port & 1]; } - static void pc87306_gpio_remove(pc87306_t *dev) { io_removehandler(dev->regs[0x0f] << 2, 0x0001, - pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, dev); + pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, dev); io_removehandler((dev->regs[0x0f] << 2) + 1, 0x0001, - pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, dev); + pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, dev); } - static void pc87306_gpio_init(pc87306_t *dev) { if ((dev->regs[0x12]) & 0x10) io_sethandler(dev->regs[0x0f] << 2, 0x0001, - pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, dev); + pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, dev); if ((dev->regs[0x12]) & 0x20) io_sethandler((dev->regs[0x0f] << 2) + 1, 0x0001, - pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, dev); + pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, dev); } - static void lpt1_handler(pc87306_t *dev) { - int temp; + int temp; uint16_t lptba, lpt_port = LPT1_ADDR; - uint8_t lpt_irq = LPT2_IRQ; + uint8_t lpt_irq = LPT2_IRQ; - temp = dev->regs[0x01] & 3; + temp = dev->regs[0x01] & 3; lptba = ((uint16_t) dev->regs[0x19]) << 2; switch (temp) { - case 0: - lpt_port = LPT1_ADDR; - lpt_irq = (dev->regs[0x02] & 0x08) ? LPT1_IRQ : LPT2_IRQ; - break; - case 1: - if (dev->regs[0x1b] & 0x40) - lpt_port = lptba; - else - lpt_port = LPT_MDA_ADDR; - lpt_irq = LPT_MDA_IRQ; - break; - case 2: - lpt_port = LPT2_ADDR; - lpt_irq = LPT2_IRQ; - break; - case 3: - lpt_port = 0x000; - lpt_irq = 0xff; - break; + case 0: + lpt_port = LPT1_ADDR; + lpt_irq = (dev->regs[0x02] & 0x08) ? LPT1_IRQ : LPT2_IRQ; + break; + case 1: + if (dev->regs[0x1b] & 0x40) + lpt_port = lptba; + else + lpt_port = LPT_MDA_ADDR; + lpt_irq = LPT_MDA_IRQ; + break; + case 2: + lpt_port = LPT2_ADDR; + lpt_irq = LPT2_IRQ; + break; + case 3: + lpt_port = 0x000; + lpt_irq = 0xff; + break; } if (dev->regs[0x1b] & 0x10) - lpt_irq = (dev->regs[0x1b] & 0x20) ? 7 : 5; + lpt_irq = (dev->regs[0x1b] & 0x20) ? 7 : 5; if (lpt_port) - lpt1_init(lpt_port); + lpt1_init(lpt_port); lpt1_irq(lpt_irq); } - static void serial_handler(pc87306_t *dev, int uart) { - int temp; + int temp; uint8_t fer_irq, pnp1_irq; uint8_t fer_shift, pnp_shift; uint8_t irq; temp = (dev->regs[1] >> (2 << uart)) & 3; - fer_shift = 2 << uart; /* 2 for UART 1, 4 for UART 2 */ - pnp_shift = 2 + (uart << 2); /* 2 for UART 1, 6 for UART 2 */ + fer_shift = 2 << uart; /* 2 for UART 1, 4 for UART 2 */ + pnp_shift = 2 + (uart << 2); /* 2 for UART 1, 6 for UART 2 */ /* 0 = COM1 (IRQ 4), 1 = COM2 (IRQ 3), 2 = COM3 (IRQ 4), 3 = COM4 (IRQ 3) */ - fer_irq = ((dev->regs[1] >> fer_shift) & 1) ? 3 : 4; + fer_irq = ((dev->regs[1] >> fer_shift) & 1) ? 3 : 4; pnp1_irq = ((dev->regs[0x1c] >> pnp_shift) & 1) ? 4 : 3; irq = (dev->regs[0x1c] & 1) ? pnp1_irq : fer_irq; switch (temp) { - case 0: - serial_setup(dev->uart[uart], COM1_ADDR, irq); - break; - case 1: - serial_setup(dev->uart[uart], COM2_ADDR, irq); - break; - case 2: - switch ((dev->regs[1] >> 6) & 3) { - case 0: - serial_setup(dev->uart[uart], COM3_ADDR, irq); - break; - case 1: - serial_setup(dev->uart[uart], 0x338, irq); - break; - case 2: - serial_setup(dev->uart[uart], COM4_ADDR, irq); - break; - case 3: - serial_setup(dev->uart[uart], 0x220, irq); - break; - } - break; - case 3: - switch ((dev->regs[1] >> 6) & 3) { - case 0: - serial_setup(dev->uart[uart], COM4_ADDR, irq); - break; - case 1: - serial_setup(dev->uart[uart], 0x238, irq); - break; - case 2: - serial_setup(dev->uart[uart], 0x2e0, irq); - break; - case 3: - serial_setup(dev->uart[uart], 0x228, irq); - break; - } - break; + case 0: + serial_setup(dev->uart[uart], COM1_ADDR, irq); + break; + case 1: + serial_setup(dev->uart[uart], COM2_ADDR, irq); + break; + case 2: + switch ((dev->regs[1] >> 6) & 3) { + case 0: + serial_setup(dev->uart[uart], COM3_ADDR, irq); + break; + case 1: + serial_setup(dev->uart[uart], 0x338, irq); + break; + case 2: + serial_setup(dev->uart[uart], COM4_ADDR, irq); + break; + case 3: + serial_setup(dev->uart[uart], 0x220, irq); + break; + } + break; + case 3: + switch ((dev->regs[1] >> 6) & 3) { + case 0: + serial_setup(dev->uart[uart], COM4_ADDR, irq); + break; + case 1: + serial_setup(dev->uart[uart], 0x238, irq); + break; + case 2: + serial_setup(dev->uart[uart], 0x2e0, irq); + break; + case 3: + serial_setup(dev->uart[uart], 0x228, irq); + break; + } + break; } } - static void pc87306_write(uint16_t port, uint8_t val, void *priv) { pc87306_t *dev = (pc87306_t *) priv; - uint8_t index, valxor; + uint8_t index, valxor; index = (port & 1) ? 0 : 1; if (index) { - dev->cur_reg = val & 0x1f; - dev->tries = 0; - return; + dev->cur_reg = val & 0x1f; + dev->tries = 0; + return; } else { - if (dev->tries) { - if ((dev->cur_reg == 0) && (val == 8)) - val = 0x4b; - valxor = val ^ dev->regs[dev->cur_reg]; - dev->tries = 0; - if ((dev->cur_reg <= 28) && (dev->cur_reg != 8)) { - if (dev->cur_reg == 0) - val &= 0x5f; - if (((dev->cur_reg == 0x0F) || (dev->cur_reg == 0x12)) && valxor) - pc87306_gpio_remove(dev); - dev->regs[dev->cur_reg] = val; - } else - return; - } else { - dev->tries++; - return; - } + if (dev->tries) { + if ((dev->cur_reg == 0) && (val == 8)) + val = 0x4b; + valxor = val ^ dev->regs[dev->cur_reg]; + dev->tries = 0; + if ((dev->cur_reg <= 28) && (dev->cur_reg != 8)) { + if (dev->cur_reg == 0) + val &= 0x5f; + if (((dev->cur_reg == 0x0F) || (dev->cur_reg == 0x12)) && valxor) + pc87306_gpio_remove(dev); + dev->regs[dev->cur_reg] = val; + } else + return; + } else { + dev->tries++; + return; + } } - switch(dev->cur_reg) { - case 0: - if (valxor & 1) { - lpt1_remove(); - if ((val & 1) && !(dev->regs[2] & 1)) - lpt1_handler(dev); - } - if (valxor & 2) { - serial_remove(dev->uart[0]); - if ((val & 2) && !(dev->regs[2] & 1)) - serial_handler(dev, 0); - } - if (valxor & 4) { - serial_remove(dev->uart[1]); - if ((val & 4) && !(dev->regs[2] & 1)) - serial_handler(dev, 1); - } - if (valxor & 0x28) { - fdc_remove(dev->fdc); - if ((val & 8) && !(dev->regs[2] & 1)) - fdc_set_base(dev->fdc, (val & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); - } - break; - case 1: - if (valxor & 3) { - lpt1_remove(); - if ((dev->regs[0] & 1) && !(dev->regs[2] & 1)) - lpt1_handler(dev); - } - if (valxor & 0xcc) { - serial_remove(dev->uart[0]); - if ((dev->regs[0] & 2) && !(dev->regs[2] & 1)) - serial_handler(dev, 0); - } - if (valxor & 0xf0) { - serial_remove(dev->uart[1]); - if ((dev->regs[0] & 4) && !(dev->regs[2] & 1)) - serial_handler(dev, 1); - } - break; - case 2: - if (valxor & 1) { - lpt1_remove(); - serial_remove(dev->uart[0]); - serial_remove(dev->uart[1]); - fdc_remove(dev->fdc); + switch (dev->cur_reg) { + case 0: + if (valxor & 1) { + lpt1_remove(); + if ((val & 1) && !(dev->regs[2] & 1)) + lpt1_handler(dev); + } + if (valxor & 2) { + serial_remove(dev->uart[0]); + if ((val & 2) && !(dev->regs[2] & 1)) + serial_handler(dev, 0); + } + if (valxor & 4) { + serial_remove(dev->uart[1]); + if ((val & 4) && !(dev->regs[2] & 1)) + serial_handler(dev, 1); + } + if (valxor & 0x28) { + fdc_remove(dev->fdc); + if ((val & 8) && !(dev->regs[2] & 1)) + fdc_set_base(dev->fdc, (val & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); + } + break; + case 1: + if (valxor & 3) { + lpt1_remove(); + if ((dev->regs[0] & 1) && !(dev->regs[2] & 1)) + lpt1_handler(dev); + } + if (valxor & 0xcc) { + serial_remove(dev->uart[0]); + if ((dev->regs[0] & 2) && !(dev->regs[2] & 1)) + serial_handler(dev, 0); + } + if (valxor & 0xf0) { + serial_remove(dev->uart[1]); + if ((dev->regs[0] & 4) && !(dev->regs[2] & 1)) + serial_handler(dev, 1); + } + break; + case 2: + if (valxor & 1) { + lpt1_remove(); + serial_remove(dev->uart[0]); + serial_remove(dev->uart[1]); + fdc_remove(dev->fdc); - if (!(val & 1)) { - if (dev->regs[0] & 1) - lpt1_handler(dev); - if (dev->regs[0] & 2) - serial_handler(dev, 0); - if (dev->regs[0] & 4) - serial_handler(dev, 1); - if (dev->regs[0] & 8) - fdc_set_base(dev->fdc, (dev->regs[0] & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); - } - } - if (valxor & 8) { - lpt1_remove(); - if ((dev->regs[0] & 1) && !(dev->regs[2] & 1)) - lpt1_handler(dev); - } - break; - case 9: - if (valxor & 0x44) { - fdc_update_enh_mode(dev->fdc, (val & 4) ? 1 : 0); - fdc_update_densel_polarity(dev->fdc, (val & 0x40) ? 1 : 0); - } - break; - case 0xF: - if (valxor) - pc87306_gpio_init(dev); - break; - case 0x12: - if (valxor & 0x30) - pc87306_gpio_init(dev); - break; - case 0x19: - if (valxor) { - lpt1_remove(); - if ((dev->regs[0] & 1) && !(dev->regs[2] & 1)) - lpt1_handler(dev); - } - break; - case 0x1B: - if (valxor & 0x70) { - lpt1_remove(); - if (!(val & 0x40)) - dev->regs[0x19] = 0xEF; - if ((dev->regs[0] & 1) && !(dev->regs[2] & 1)) - lpt1_handler(dev); - } - break; - case 0x1C: - if (valxor) { - serial_remove(dev->uart[0]); - serial_remove(dev->uart[1]); + if (!(val & 1)) { + if (dev->regs[0] & 1) + lpt1_handler(dev); + if (dev->regs[0] & 2) + serial_handler(dev, 0); + if (dev->regs[0] & 4) + serial_handler(dev, 1); + if (dev->regs[0] & 8) + fdc_set_base(dev->fdc, (dev->regs[0] & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); + } + } + if (valxor & 8) { + lpt1_remove(); + if ((dev->regs[0] & 1) && !(dev->regs[2] & 1)) + lpt1_handler(dev); + } + break; + case 9: + if (valxor & 0x44) { + fdc_update_enh_mode(dev->fdc, (val & 4) ? 1 : 0); + fdc_update_densel_polarity(dev->fdc, (val & 0x40) ? 1 : 0); + } + break; + case 0xF: + if (valxor) + pc87306_gpio_init(dev); + break; + case 0x12: + if (valxor & 0x30) + pc87306_gpio_init(dev); + break; + case 0x19: + if (valxor) { + lpt1_remove(); + if ((dev->regs[0] & 1) && !(dev->regs[2] & 1)) + lpt1_handler(dev); + } + break; + case 0x1B: + if (valxor & 0x70) { + lpt1_remove(); + if (!(val & 0x40)) + dev->regs[0x19] = 0xEF; + if ((dev->regs[0] & 1) && !(dev->regs[2] & 1)) + lpt1_handler(dev); + } + break; + case 0x1C: + if (valxor) { + serial_remove(dev->uart[0]); + serial_remove(dev->uart[1]); - if ((dev->regs[0] & 2) && !(dev->regs[2] & 1)) - serial_handler(dev, 0); - if ((dev->regs[0] & 4) && !(dev->regs[2] & 1)) - serial_handler(dev, 1); - } - break; + if ((dev->regs[0] & 2) && !(dev->regs[2] & 1)) + serial_handler(dev, 0); + if ((dev->regs[0] & 4) && !(dev->regs[2] & 1)) + serial_handler(dev, 1); + } + break; } } - uint8_t pc87306_read(uint16_t port, void *priv) { pc87306_t *dev = (pc87306_t *) priv; - uint8_t ret = 0xff, index; + uint8_t ret = 0xff, index; index = (port & 1) ? 0 : 1; dev->tries = 0; if (index) - ret = dev->cur_reg & 0x1f; + ret = dev->cur_reg & 0x1f; else { - if (dev->cur_reg == 8) - ret = 0x70; - else if (dev->cur_reg < 28) - ret = dev->regs[dev->cur_reg]; + if (dev->cur_reg == 8) + ret = 0x70; + else if (dev->cur_reg < 28) + ret = dev->regs[dev->cur_reg]; } return ret; } - void pc87306_reset(pc87306_t *dev) { @@ -374,8 +364,8 @@ pc87306_reset(pc87306_t *dev) dev->gpio[1] = 0xfb; /* - 0 = 360 rpm @ 500 kbps for 3.5" - 1 = Default, 300 rpm @ 500,300,250,1000 kbps for 3.5" + 0 = 360 rpm @ 500 kbps for 3.5" + 1 = Default, 300 rpm @ 500,300,250,1000 kbps for 3.5" */ lpt1_remove(); lpt1_handler(dev); @@ -387,7 +377,6 @@ pc87306_reset(pc87306_t *dev) pc87306_gpio_init(dev); } - static void pc87306_close(void *priv) { @@ -396,7 +385,6 @@ pc87306_close(void *priv) free(dev); } - static void * pc87306_init(const device_t *info) { @@ -413,21 +401,21 @@ pc87306_init(const device_t *info) pc87306_reset(dev); io_sethandler(0x02e, 0x0002, - pc87306_read, NULL, NULL, pc87306_write, NULL, NULL, dev); + pc87306_read, NULL, NULL, pc87306_write, NULL, NULL, dev); return dev; } const device_t pc87306_device = { - .name = "National Semiconductor PC87306 Super I/O", + .name = "National Semiconductor PC87306 Super I/O", .internal_name = "pc87306", - .flags = 0, - .local = 0, - .init = pc87306_init, - .close = pc87306_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = pc87306_init, + .close = pc87306_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_pc87307.c b/src/sio/sio_pc87307.c index 91dd1f59d..ecdb13c5b 100644 --- a/src/sio/sio_pc87307.c +++ b/src/sio/sio_pc87307.c @@ -34,70 +34,64 @@ #include <86box/fdc.h> #include <86box/sio.h> - typedef struct { uint8_t id, pm_idx, - regs[48], ld_regs[256][208], - pcregs[16], gpio[2][4], - pm[8]; + regs[48], ld_regs[256][208], + pcregs[16], gpio[2][4], + pm[8]; uint16_t gpio_base, gpio_base2, - pm_base; - int cur_reg; - fdc_t *fdc; + pm_base; + int cur_reg; + fdc_t *fdc; serial_t *uart[2]; } pc87307_t; - -static void fdc_handler(pc87307_t *dev); -static void lpt1_handler(pc87307_t *dev); -static void serial_handler(pc87307_t *dev, int uart); - +static void fdc_handler(pc87307_t *dev); +static void lpt1_handler(pc87307_t *dev); +static void serial_handler(pc87307_t *dev, int uart); static void pc87307_gpio_write(uint16_t port, uint8_t val, void *priv) { - pc87307_t *dev = (pc87307_t *) priv; - uint8_t bank = ((port & 0xfffc) == dev->gpio_base2); + pc87307_t *dev = (pc87307_t *) priv; + uint8_t bank = ((port & 0xfffc) == dev->gpio_base2); dev->gpio[bank][port & 3] = val; } - uint8_t pc87307_gpio_read(uint16_t port, void *priv) { - pc87307_t *dev = (pc87307_t *) priv; - uint8_t pins = 0xff, bank = ((port & 0xfffc) == dev->gpio_base2); - uint8_t mask, ret = dev->gpio[bank][port & 0x0003]; + pc87307_t *dev = (pc87307_t *) priv; + uint8_t pins = 0xff, bank = ((port & 0xfffc) == dev->gpio_base2); + uint8_t mask, ret = dev->gpio[bank][port & 0x0003]; switch (port & 0x0003) { - case 0x0000: - mask = dev->gpio[bank][0x0001]; - ret = (ret & mask) | (pins & ~mask); - break; + case 0x0000: + mask = dev->gpio[bank][0x0001]; + ret = (ret & mask) | (pins & ~mask); + break; } return ret; } - static void pc87307_gpio_remove(pc87307_t *dev) { if (dev->gpio_base != 0xffff) { - io_removehandler(dev->gpio_base, 0x0002, - pc87307_gpio_read, NULL, NULL, pc87307_gpio_write, NULL, NULL, dev); - dev->gpio_base = 0xffff; + io_removehandler(dev->gpio_base, 0x0002, + pc87307_gpio_read, NULL, NULL, pc87307_gpio_write, NULL, NULL, dev); + dev->gpio_base = 0xffff; } if (dev->gpio_base2 != 0xffff) { - io_removehandler(dev->gpio_base2, 0x0002, - pc87307_gpio_read, NULL, NULL, pc87307_gpio_write, NULL, NULL, dev); - dev->gpio_base2 = 0xffff; + io_removehandler(dev->gpio_base2, 0x0002, + pc87307_gpio_read, NULL, NULL, pc87307_gpio_write, NULL, NULL, dev); + dev->gpio_base2 = 0xffff; } } - static void pc87307_gpio_init(pc87307_t *dev, int bank, uint16_t addr) { @@ -106,352 +100,347 @@ pc87307_gpio_init(pc87307_t *dev, int bank, uint16_t addr) *bank_base = addr; io_sethandler(*bank_base, 0x0002, - pc87307_gpio_read, NULL, NULL, pc87307_gpio_write, NULL, NULL, dev); + pc87307_gpio_read, NULL, NULL, pc87307_gpio_write, NULL, NULL, dev); } - static void pc87307_pm_write(uint16_t port, uint8_t val, void *priv) { pc87307_t *dev = (pc87307_t *) priv; if (port & 1) - dev->pm[dev->pm_idx] = val; + dev->pm[dev->pm_idx] = val; else { - dev->pm_idx = val & 0x07; - switch (dev->pm_idx) { - case 0x00: - fdc_handler(dev); - lpt1_handler(dev); - serial_handler(dev, 1); - serial_handler(dev, 0); - break; - } + dev->pm_idx = val & 0x07; + switch (dev->pm_idx) { + case 0x00: + fdc_handler(dev); + lpt1_handler(dev); + serial_handler(dev, 1); + serial_handler(dev, 0); + break; + } } } - uint8_t pc87307_pm_read(uint16_t port, void *priv) { pc87307_t *dev = (pc87307_t *) priv; if (port & 1) - return dev->pm[dev->pm_idx]; + return dev->pm[dev->pm_idx]; else - return dev->pm_idx; + return dev->pm_idx; } - static void pc87307_pm_remove(pc87307_t *dev) { if (dev->pm_base != 0xffff) { - io_removehandler(dev->pm_base, 0x0008, - pc87307_pm_read, NULL, NULL, pc87307_pm_write, NULL, NULL, dev); - dev->pm_base = 0xffff; + io_removehandler(dev->pm_base, 0x0008, + pc87307_pm_read, NULL, NULL, pc87307_pm_write, NULL, NULL, dev); + dev->pm_base = 0xffff; } } - static void pc87307_pm_init(pc87307_t *dev, uint16_t addr) { dev->pm_base = addr; io_sethandler(dev->pm_base, 0x0008, - pc87307_pm_read, NULL, NULL, pc87307_pm_write, NULL, NULL, dev); + pc87307_pm_read, NULL, NULL, pc87307_pm_write, NULL, NULL, dev); } - static void fdc_handler(pc87307_t *dev) { - uint8_t irq, active; + uint8_t irq, active; uint16_t addr; fdc_remove(dev->fdc); active = (dev->ld_regs[0x03][0x00] & 0x01) && (dev->pm[0x00] & 0x08); - addr = ((dev->ld_regs[0x03][0x30] << 8) | dev->ld_regs[0x03][0x31]) - 0x0002; - irq = (dev->ld_regs[0x03][0x40] & 0x0f); + addr = ((dev->ld_regs[0x03][0x30] << 8) | dev->ld_regs[0x03][0x31]) - 0x0002; + irq = (dev->ld_regs[0x03][0x40] & 0x0f); if (active && (addr <= 0xfff8)) { - fdc_set_base(dev->fdc, addr); - fdc_set_irq(dev->fdc, irq); + fdc_set_base(dev->fdc, addr); + fdc_set_irq(dev->fdc, irq); } } - static void lpt1_handler(pc87307_t *dev) { - uint8_t irq, active; + uint8_t irq, active; uint16_t addr; lpt1_remove(); active = (dev->ld_regs[0x04][0x00] & 0x01) && (dev->pm[0x00] & 0x10); - addr = (dev->ld_regs[0x04][0x30] << 8) | dev->ld_regs[0x04][0x31]; - irq = (dev->ld_regs[0x04][0x40] & 0x0f); + addr = (dev->ld_regs[0x04][0x30] << 8) | dev->ld_regs[0x04][0x31]; + irq = (dev->ld_regs[0x04][0x40] & 0x0f); if (active && (addr <= 0xfffc)) { - lpt1_init(addr); - lpt1_irq(irq); + lpt1_init(addr); + lpt1_irq(irq); } } - static void serial_handler(pc87307_t *dev, int uart) { - uint8_t irq, active; + uint8_t irq, active; uint16_t addr; serial_remove(dev->uart[uart]); active = (dev->ld_regs[0x06 - uart][0x00] & 0x01) && (dev->pm[0x00] & (1 << (6 - uart))); - addr = (dev->ld_regs[0x06 - uart][0x30] << 8) | dev->ld_regs[0x06 - uart][0x31]; - irq = (dev->ld_regs[0x06 - uart][0x40] & 0x0f); + addr = (dev->ld_regs[0x06 - uart][0x30] << 8) | dev->ld_regs[0x06 - uart][0x31]; + irq = (dev->ld_regs[0x06 - uart][0x40] & 0x0f); if (active && (addr <= 0xfff8)) - serial_setup(dev->uart[uart], addr, irq); + serial_setup(dev->uart[uart], addr, irq); } - static void gpio_handler(pc87307_t *dev) { - uint8_t active; + uint8_t active; uint16_t addr; pc87307_gpio_remove(dev); active = (dev->ld_regs[0x07][0x00] & 0x01); - addr = (dev->ld_regs[0x07][0x30] << 8) | dev->ld_regs[0x07][0x31]; + addr = (dev->ld_regs[0x07][0x30] << 8) | dev->ld_regs[0x07][0x31]; if (active) - pc87307_gpio_init(dev, 0, addr); + pc87307_gpio_init(dev, 0, addr); addr = (dev->ld_regs[0x07][0x32] << 8) | dev->ld_regs[0x07][0x33]; if (active) - pc87307_gpio_init(dev, 1, addr); + pc87307_gpio_init(dev, 1, addr); } - static void pm_handler(pc87307_t *dev) { - uint8_t active; + uint8_t active; uint16_t addr; pc87307_pm_remove(dev); active = (dev->ld_regs[0x08][0x00] & 0x01); - addr = (dev->ld_regs[0x08][0x30] << 8) | dev->ld_regs[0x08][0x31]; + addr = (dev->ld_regs[0x08][0x30] << 8) | dev->ld_regs[0x08][0x31]; if (active) - pc87307_pm_init(dev, addr); + pc87307_pm_init(dev, addr); } - static void pc87307_write(uint16_t port, uint8_t val, void *priv) { pc87307_t *dev = (pc87307_t *) priv; - uint8_t index; + uint8_t index; index = (port & 1) ? 0 : 1; if (index) { - dev->cur_reg = val; - return; + dev->cur_reg = val; + return; } else { - switch (dev->cur_reg) { - case 0x00: case 0x02: case 0x03: case 0x06: - case 0x07: case 0x21: - dev->regs[dev->cur_reg] = val; - break; - case 0x22: - dev->regs[dev->cur_reg] = val & 0x7f; - break; - case 0x23: - dev->regs[dev->cur_reg] = val & 0x0f; - break; - case 0x24: - dev->pcregs[dev->regs[0x23]] = val; - break; - default: - if (dev->cur_reg >= 0x30) { - if ((dev->regs[0x07] != 0x06) || !(dev->regs[0x21] & 0x10)) - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val; - } - break; - } + switch (dev->cur_reg) { + case 0x00: + case 0x02: + case 0x03: + case 0x06: + case 0x07: + case 0x21: + dev->regs[dev->cur_reg] = val; + break; + case 0x22: + dev->regs[dev->cur_reg] = val & 0x7f; + break; + case 0x23: + dev->regs[dev->cur_reg] = val & 0x0f; + break; + case 0x24: + dev->pcregs[dev->regs[0x23]] = val; + break; + default: + if (dev->cur_reg >= 0x30) { + if ((dev->regs[0x07] != 0x06) || !(dev->regs[0x21] & 0x10)) + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val; + } + break; + } } - switch(dev->cur_reg) { - case 0x30: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x01; - switch (dev->regs[0x07]) { - case 0x03: - fdc_handler(dev); - break; - case 0x04: - lpt1_handler(dev); - break; - case 0x05: - serial_handler(dev, 1); - break; - case 0x06: - serial_handler(dev, 0); - break; - case 0x07: - gpio_handler(dev); - break; - case 0x08: - pm_handler(dev); - break; - } - break; - case 0x60: case 0x62: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x07; - if ((dev->cur_reg == 0x62) && (dev->regs[0x07] != 0x07)) - break; - switch (dev->regs[0x07]) { - case 0x03: - fdc_handler(dev); - break; - case 0x04: - lpt1_handler(dev); - break; - case 0x05: - serial_handler(dev, 1); - break; - case 0x06: - serial_handler(dev, 0); - break; - case 0x07: - gpio_handler(dev); - break; - case 0x08: - pm_handler(dev); - break; - } - break; - case 0x61: - switch (dev->regs[0x07]) { - case 0x00: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xfb; - break; - case 0x03: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = (val & 0xfa) | 0x02; - fdc_handler(dev); - break; - case 0x04: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xfc; - lpt1_handler(dev); - break; - case 0x05: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf8; - serial_handler(dev, 1); - break; - case 0x06: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf8; - serial_handler(dev, 0); - break; - case 0x07: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf8; - gpio_handler(dev); - break; - case 0x08: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xfe; - pm_handler(dev); - break; - } - break; - case 0x63: - if (dev->regs[0x07] == 0x00) - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = (val & 0xfb) | 0x04; - else if (dev->regs[0x07] == 0x07) { - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xfe; - gpio_handler(dev); - } - break; - case 0x70: - case 0x74: case 0x75: - switch (dev->regs[0x07]) { - case 0x03: - fdc_handler(dev); - break; - case 0x04: - lpt1_handler(dev); - break; - case 0x05: - serial_handler(dev, 1); - break; - case 0x06: - serial_handler(dev, 0); - break; - case 0x07: - gpio_handler(dev); - break; - case 0x08: - pm_handler(dev); - break; - } - break; - case 0xf0: - switch (dev->regs[0x07]) { - case 0x00: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xc1; - break; - case 0x03: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xe1; - fdc_update_densel_polarity(dev->fdc, (val & 0x20) ? 1 : 0); - fdc_update_enh_mode(dev->fdc, (val & 0x40) ? 1 : 0); - break; - case 0x04: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf3; - lpt1_handler(dev); - break; - case 0x05: case 0x06: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x87; - break; - } - break; - case 0xf1: - if (dev->regs[0x07] == 0x03) - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x0f; - break; + switch (dev->cur_reg) { + case 0x30: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x01; + switch (dev->regs[0x07]) { + case 0x03: + fdc_handler(dev); + break; + case 0x04: + lpt1_handler(dev); + break; + case 0x05: + serial_handler(dev, 1); + break; + case 0x06: + serial_handler(dev, 0); + break; + case 0x07: + gpio_handler(dev); + break; + case 0x08: + pm_handler(dev); + break; + } + break; + case 0x60: + case 0x62: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x07; + if ((dev->cur_reg == 0x62) && (dev->regs[0x07] != 0x07)) + break; + switch (dev->regs[0x07]) { + case 0x03: + fdc_handler(dev); + break; + case 0x04: + lpt1_handler(dev); + break; + case 0x05: + serial_handler(dev, 1); + break; + case 0x06: + serial_handler(dev, 0); + break; + case 0x07: + gpio_handler(dev); + break; + case 0x08: + pm_handler(dev); + break; + } + break; + case 0x61: + switch (dev->regs[0x07]) { + case 0x00: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xfb; + break; + case 0x03: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = (val & 0xfa) | 0x02; + fdc_handler(dev); + break; + case 0x04: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xfc; + lpt1_handler(dev); + break; + case 0x05: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf8; + serial_handler(dev, 1); + break; + case 0x06: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf8; + serial_handler(dev, 0); + break; + case 0x07: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf8; + gpio_handler(dev); + break; + case 0x08: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xfe; + pm_handler(dev); + break; + } + break; + case 0x63: + if (dev->regs[0x07] == 0x00) + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = (val & 0xfb) | 0x04; + else if (dev->regs[0x07] == 0x07) { + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xfe; + gpio_handler(dev); + } + break; + case 0x70: + case 0x74: + case 0x75: + switch (dev->regs[0x07]) { + case 0x03: + fdc_handler(dev); + break; + case 0x04: + lpt1_handler(dev); + break; + case 0x05: + serial_handler(dev, 1); + break; + case 0x06: + serial_handler(dev, 0); + break; + case 0x07: + gpio_handler(dev); + break; + case 0x08: + pm_handler(dev); + break; + } + break; + case 0xf0: + switch (dev->regs[0x07]) { + case 0x00: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xc1; + break; + case 0x03: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xe1; + fdc_update_densel_polarity(dev->fdc, (val & 0x20) ? 1 : 0); + fdc_update_enh_mode(dev->fdc, (val & 0x40) ? 1 : 0); + break; + case 0x04: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf3; + lpt1_handler(dev); + break; + case 0x05: + case 0x06: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x87; + break; + } + break; + case 0xf1: + if (dev->regs[0x07] == 0x03) + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x0f; + break; } } - uint8_t pc87307_read(uint16_t port, void *priv) { pc87307_t *dev = (pc87307_t *) priv; - uint8_t ret = 0xff, index; + uint8_t ret = 0xff, index; index = (port & 1) ? 0 : 1; if (index) - ret = dev->cur_reg; + ret = dev->cur_reg; else { - if (dev->cur_reg >= 0x30) - ret = dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30]; - else if (dev->cur_reg == 0x24) - ret = dev->pcregs[dev->regs[0x23]]; - else - ret = dev->regs[dev->cur_reg]; + if (dev->cur_reg >= 0x30) + ret = dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30]; + else if (dev->cur_reg == 0x24) + ret = dev->pcregs[dev->regs[0x23]]; + else + ret = dev->regs[dev->cur_reg]; } return ret; } - void pc87307_reset(pc87307_t *dev) { @@ -459,7 +448,7 @@ pc87307_reset(pc87307_t *dev) memset(dev->regs, 0x00, 0x30); for (i = 0; i < 256; i++) - memset(dev->ld_regs[i], 0x00, 0xd0); + memset(dev->ld_regs[i], 0x00, 0xd0); memset(dev->pcregs, 0x00, 0x10); memset(dev->gpio, 0xff, 0x08); memset(dev->pm, 0x00, 0x08); @@ -544,8 +533,8 @@ pc87307_reset(pc87307_t *dev) dev->gpio_base = dev->pm_base = 0xffff; /* - 0 = 360 rpm @ 500 kbps for 3.5" - 1 = Default, 300 rpm @ 500,300,250,1000 kbps for 3.5" + 0 = 360 rpm @ 500 kbps for 3.5" + 1 = Default, 300 rpm @ 500,300,250,1000 kbps for 3.5" */ lpt1_remove(); serial_remove(dev->uart[0]); @@ -553,7 +542,6 @@ pc87307_reset(pc87307_t *dev) fdc_reset(dev->fdc); } - static void pc87307_close(void *priv) { @@ -562,7 +550,6 @@ pc87307_close(void *priv) free(dev); } - static void * pc87307_init(const device_t *info) { @@ -579,69 +566,69 @@ pc87307_init(const device_t *info) pc87307_reset(dev); if (info->local & 0x100) { - io_sethandler(0x02e, 0x0002, - pc87307_read, NULL, NULL, pc87307_write, NULL, NULL, dev); + io_sethandler(0x02e, 0x0002, + pc87307_read, NULL, NULL, pc87307_write, NULL, NULL, dev); } if (info->local & 0x200) { - io_sethandler(0x15c, 0x0002, - pc87307_read, NULL, NULL, pc87307_write, NULL, NULL, dev); + io_sethandler(0x15c, 0x0002, + pc87307_read, NULL, NULL, pc87307_write, NULL, NULL, dev); } return dev; } const device_t pc87307_device = { - .name = "National Semiconductor PC87307 Super I/O", + .name = "National Semiconductor PC87307 Super I/O", .internal_name = "pc87307", - .flags = 0, - .local = 0x1c0, - .init = pc87307_init, - .close = pc87307_close, - .reset = NULL, + .flags = 0, + .local = 0x1c0, + .init = pc87307_init, + .close = pc87307_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t pc87307_15c_device = { - .name = "National Semiconductor PC87307 Super I/O (Port 15Ch)", + .name = "National Semiconductor PC87307 Super I/O (Port 15Ch)", .internal_name = "pc87307_15c", - .flags = 0, - .local = 0x2c0, - .init = pc87307_init, - .close = pc87307_close, - .reset = NULL, + .flags = 0, + .local = 0x2c0, + .init = pc87307_init, + .close = pc87307_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t pc87307_both_device = { - .name = "National Semiconductor PC87307 Super I/O (Ports 2Eh and 15Ch)", + .name = "National Semiconductor PC87307 Super I/O (Ports 2Eh and 15Ch)", .internal_name = "pc87307_both", - .flags = 0, - .local = 0x3c0, - .init = pc87307_init, - .close = pc87307_close, - .reset = NULL, + .flags = 0, + .local = 0x3c0, + .init = pc87307_init, + .close = pc87307_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t pc97307_device = { - .name = "National Semiconductor PC97307 Super I/O", + .name = "National Semiconductor PC97307 Super I/O", .internal_name = "pc97307", - .flags = 0, - .local = 0x1cf, - .init = pc87307_init, - .close = pc87307_close, - .reset = NULL, + .flags = 0, + .local = 0x1cf, + .init = pc87307_init, + .close = pc87307_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_pc87309.c b/src/sio/sio_pc87309.c index bf261a26f..8d7ff7065 100644 --- a/src/sio/sio_pc87309.c +++ b/src/sio/sio_pc87309.c @@ -34,22 +34,19 @@ #include <86box/fdc.h> #include <86box/sio.h> - typedef struct { uint8_t id, pm_idx, - regs[48], ld_regs[256][208], - pm[8]; - uint16_t pm_base; - int cur_reg; - fdc_t *fdc; + regs[48], ld_regs[256][208], + pm[8]; + uint16_t pm_base; + int cur_reg; + fdc_t *fdc; serial_t *uart[2]; } pc87309_t; - -static void fdc_handler(pc87309_t *dev); -static void lpt1_handler(pc87309_t *dev); -static void serial_handler(pc87309_t *dev, int uart); - +static void fdc_handler(pc87309_t *dev); +static void lpt1_handler(pc87309_t *dev); +static void serial_handler(pc87309_t *dev, int uart); static void pc87309_pm_write(uint16_t port, uint8_t val, void *priv) @@ -57,296 +54,293 @@ pc87309_pm_write(uint16_t port, uint8_t val, void *priv) pc87309_t *dev = (pc87309_t *) priv; if (port & 1) { - dev->pm[dev->pm_idx] = val; + dev->pm[dev->pm_idx] = val; - switch (dev->pm_idx) { - case 0x00: - fdc_handler(dev); - lpt1_handler(dev); - serial_handler(dev, 1); - serial_handler(dev, 0); - break; - } + switch (dev->pm_idx) { + case 0x00: + fdc_handler(dev); + lpt1_handler(dev); + serial_handler(dev, 1); + serial_handler(dev, 0); + break; + } } else - dev->pm_idx = val & 0x07; + dev->pm_idx = val & 0x07; } - uint8_t pc87309_pm_read(uint16_t port, void *priv) { pc87309_t *dev = (pc87309_t *) priv; if (port & 1) - return dev->pm[dev->pm_idx]; + return dev->pm[dev->pm_idx]; else - return dev->pm_idx; + return dev->pm_idx; } - static void pc87309_pm_remove(pc87309_t *dev) { if (dev->pm_base != 0xffff) { - io_removehandler(dev->pm_base, 0x0008, - pc87309_pm_read, NULL, NULL, pc87309_pm_write, NULL, NULL, dev); - dev->pm_base = 0xffff; + io_removehandler(dev->pm_base, 0x0008, + pc87309_pm_read, NULL, NULL, pc87309_pm_write, NULL, NULL, dev); + dev->pm_base = 0xffff; } } - static void pc87309_pm_init(pc87309_t *dev, uint16_t addr) { dev->pm_base = addr; io_sethandler(dev->pm_base, 0x0008, - pc87309_pm_read, NULL, NULL, pc87309_pm_write, NULL, NULL, dev); + pc87309_pm_read, NULL, NULL, pc87309_pm_write, NULL, NULL, dev); } - static void fdc_handler(pc87309_t *dev) { - uint8_t irq, active; + uint8_t irq, active; uint16_t addr; fdc_remove(dev->fdc); active = (dev->ld_regs[0x00][0x00] & 0x01) && (dev->pm[0x00] & 0x08); - addr = ((dev->ld_regs[0x00][0x30] << 8) | dev->ld_regs[0x00][0x31]) - 0x0002; - irq = (dev->ld_regs[0x00][0x40] & 0x0f); + addr = ((dev->ld_regs[0x00][0x30] << 8) | dev->ld_regs[0x00][0x31]) - 0x0002; + irq = (dev->ld_regs[0x00][0x40] & 0x0f); if (active) { - fdc_set_base(dev->fdc, addr); - fdc_set_irq(dev->fdc, irq); + fdc_set_base(dev->fdc, addr); + fdc_set_irq(dev->fdc, irq); } } - static void lpt1_handler(pc87309_t *dev) { - uint8_t irq, active; + uint8_t irq, active; uint16_t addr; lpt1_remove(); active = (dev->ld_regs[0x01][0x00] & 0x01) && (dev->pm[0x00] & 0x10); - addr = (dev->ld_regs[0x01][0x30] << 8) | dev->ld_regs[0x01][0x31]; - irq = (dev->ld_regs[0x01][0x40] & 0x0f); + addr = (dev->ld_regs[0x01][0x30] << 8) | dev->ld_regs[0x01][0x31]; + irq = (dev->ld_regs[0x01][0x40] & 0x0f); if (active) { - lpt1_init(addr); - lpt1_irq(irq); + lpt1_init(addr); + lpt1_irq(irq); } } - static void serial_handler(pc87309_t *dev, int uart) { - uint8_t irq, active; + uint8_t irq, active; uint16_t addr; serial_remove(dev->uart[uart]); active = (dev->ld_regs[0x03 - uart][0x00] & 0x01) && (dev->pm[0x00] & (1 << (6 - uart))); - addr = (dev->ld_regs[0x03 - uart][0x30] << 8) | dev->ld_regs[0x03 - uart][0x31]; - irq = (dev->ld_regs[0x03 - uart][0x40] & 0x0f); + addr = (dev->ld_regs[0x03 - uart][0x30] << 8) | dev->ld_regs[0x03 - uart][0x31]; + irq = (dev->ld_regs[0x03 - uart][0x40] & 0x0f); if (active) - serial_setup(dev->uart[uart], addr, irq); + serial_setup(dev->uart[uart], addr, irq); } - static void pm_handler(pc87309_t *dev) { - uint8_t active; + uint8_t active; uint16_t addr; pc87309_pm_remove(dev); active = (dev->ld_regs[0x04][0x00] & 0x01); - addr = (dev->ld_regs[0x04][0x30] << 8) | dev->ld_regs[0x04][0x31]; + addr = (dev->ld_regs[0x04][0x30] << 8) | dev->ld_regs[0x04][0x31]; if (active) - pc87309_pm_init(dev, addr); + pc87309_pm_init(dev, addr); } - static void pc87309_write(uint16_t port, uint8_t val, void *priv) { pc87309_t *dev = (pc87309_t *) priv; - uint8_t index; + uint8_t index; index = (port & 1) ? 0 : 1; if (index) { - dev->cur_reg = val; - return; + dev->cur_reg = val; + return; } else { - switch (dev->cur_reg) { - case 0x00: case 0x02: case 0x03: case 0x06: - case 0x07: case 0x21: - dev->regs[dev->cur_reg] = val; - break; - case 0x22: - dev->regs[dev->cur_reg] = val & 0x7f; - break; - default: - if (dev->cur_reg >= 0x30) { - if ((dev->regs[0x07] != 0x06) || !(dev->regs[0x21] & 0x10)) - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val; - } - break; - } + switch (dev->cur_reg) { + case 0x00: + case 0x02: + case 0x03: + case 0x06: + case 0x07: + case 0x21: + dev->regs[dev->cur_reg] = val; + break; + case 0x22: + dev->regs[dev->cur_reg] = val & 0x7f; + break; + default: + if (dev->cur_reg >= 0x30) { + if ((dev->regs[0x07] != 0x06) || !(dev->regs[0x21] & 0x10)) + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val; + } + break; + } } - switch(dev->cur_reg) { - case 0x30: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x01; - switch (dev->regs[0x07]) { - case 0x00: - fdc_handler(dev); - break; - case 0x01: - lpt1_handler(dev); - break; - case 0x02: - serial_handler(dev, 1); - break; - case 0x03: - serial_handler(dev, 0); - break; - case 0x04: - pm_handler(dev); - break; - } - break; - case 0x60: case 0x62: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x07; - if (dev->cur_reg == 0x62) - break; - switch (dev->regs[0x07]) { - case 0x00: - fdc_handler(dev); - break; - case 0x01: - lpt1_handler(dev); - break; - case 0x02: - serial_handler(dev, 1); - break; - case 0x03: - serial_handler(dev, 0); - break; - case 0x04: - pm_handler(dev); - break; - } - break; - case 0x63: - if (dev->regs[0x07] == 0x06) - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = (val & 0xf8) | 0x04; - break; - case 0x61: - switch (dev->regs[0x07]) { - case 0x00: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = (val & 0xfa) | 0x02; - fdc_handler(dev); - break; - case 0x01: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xfc; - lpt1_handler(dev); - break; - case 0x02: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf8; - serial_handler(dev, 1); - break; - case 0x03: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf8; - serial_handler(dev, 0); - break; - case 0x04: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xfe; - pm_handler(dev); - break; - case 0x06: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf8; - break; - } - break; - case 0x70: - case 0x74: case 0x75: - switch (dev->regs[0x07]) { - case 0x00: - fdc_handler(dev); - break; - case 0x01: - lpt1_handler(dev); - break; - case 0x02: - serial_handler(dev, 1); - break; - case 0x03: - serial_handler(dev, 0); - break; - case 0x04: - pm_handler(dev); - break; - } - break; - case 0xf0: - switch (dev->regs[0x07]) { - case 0x00: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xe1; - fdc_update_densel_polarity(dev->fdc, (val & 0x20) ? 1 : 0); - fdc_update_enh_mode(dev->fdc, (val & 0x40) ? 1 : 0); - break; - case 0x01: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf3; - lpt1_handler(dev); - break; - case 0x02: case 0x03: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x87; - break; - case 0x06: - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xc1; - break; - } - break; - case 0xf1: - if (dev->regs[0x07] == 0x00) - dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x0f; - break; + switch (dev->cur_reg) { + case 0x30: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x01; + switch (dev->regs[0x07]) { + case 0x00: + fdc_handler(dev); + break; + case 0x01: + lpt1_handler(dev); + break; + case 0x02: + serial_handler(dev, 1); + break; + case 0x03: + serial_handler(dev, 0); + break; + case 0x04: + pm_handler(dev); + break; + } + break; + case 0x60: + case 0x62: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x07; + if (dev->cur_reg == 0x62) + break; + switch (dev->regs[0x07]) { + case 0x00: + fdc_handler(dev); + break; + case 0x01: + lpt1_handler(dev); + break; + case 0x02: + serial_handler(dev, 1); + break; + case 0x03: + serial_handler(dev, 0); + break; + case 0x04: + pm_handler(dev); + break; + } + break; + case 0x63: + if (dev->regs[0x07] == 0x06) + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = (val & 0xf8) | 0x04; + break; + case 0x61: + switch (dev->regs[0x07]) { + case 0x00: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = (val & 0xfa) | 0x02; + fdc_handler(dev); + break; + case 0x01: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xfc; + lpt1_handler(dev); + break; + case 0x02: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf8; + serial_handler(dev, 1); + break; + case 0x03: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf8; + serial_handler(dev, 0); + break; + case 0x04: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xfe; + pm_handler(dev); + break; + case 0x06: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf8; + break; + } + break; + case 0x70: + case 0x74: + case 0x75: + switch (dev->regs[0x07]) { + case 0x00: + fdc_handler(dev); + break; + case 0x01: + lpt1_handler(dev); + break; + case 0x02: + serial_handler(dev, 1); + break; + case 0x03: + serial_handler(dev, 0); + break; + case 0x04: + pm_handler(dev); + break; + } + break; + case 0xf0: + switch (dev->regs[0x07]) { + case 0x00: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xe1; + fdc_update_densel_polarity(dev->fdc, (val & 0x20) ? 1 : 0); + fdc_update_enh_mode(dev->fdc, (val & 0x40) ? 1 : 0); + break; + case 0x01: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf3; + lpt1_handler(dev); + break; + case 0x02: + case 0x03: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x87; + break; + case 0x06: + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xc1; + break; + } + break; + case 0xf1: + if (dev->regs[0x07] == 0x00) + dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x0f; + break; } } - uint8_t pc87309_read(uint16_t port, void *priv) { pc87309_t *dev = (pc87309_t *) priv; - uint8_t ret = 0xff, index; + uint8_t ret = 0xff, index; index = (port & 1) ? 0 : 1; if (index) - ret = dev->cur_reg & 0x1f; + ret = dev->cur_reg & 0x1f; else { - if (dev->cur_reg >= 0x30) - ret = dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30]; - else - ret = dev->regs[dev->cur_reg]; + if (dev->cur_reg >= 0x30) + ret = dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30]; + else + ret = dev->regs[dev->cur_reg]; } return ret; } - void pc87309_reset(pc87309_t *dev) { @@ -354,7 +348,7 @@ pc87309_reset(pc87309_t *dev) memset(dev->regs, 0x00, 0x30); for (i = 0; i < 256; i++) - memset(dev->ld_regs[i], 0x00, 0xd0); + memset(dev->ld_regs[i], 0x00, 0xd0); memset(dev->pm, 0x00, 0x08); dev->regs[0x20] = dev->id; @@ -426,8 +420,8 @@ pc87309_reset(pc87309_t *dev) dev->pm_base = 0xffff; /* - 0 = 360 rpm @ 500 kbps for 3.5" - 1 = Default, 300 rpm @ 500,300,250,1000 kbps for 3.5" + 0 = 360 rpm @ 500 kbps for 3.5" + 1 = Default, 300 rpm @ 500,300,250,1000 kbps for 3.5" */ lpt1_remove(); serial_remove(dev->uart[0]); @@ -435,7 +429,6 @@ pc87309_reset(pc87309_t *dev) fdc_reset(dev->fdc); } - static void pc87309_close(void *priv) { @@ -444,7 +437,6 @@ pc87309_close(void *priv) free(dev); } - static void * pc87309_init(const device_t *info) { @@ -461,40 +453,40 @@ pc87309_init(const device_t *info) pc87309_reset(dev); if (info->local & 0x100) { - io_sethandler(0x15c, 0x0002, - pc87309_read, NULL, NULL, pc87309_write, NULL, NULL, dev); + io_sethandler(0x15c, 0x0002, + pc87309_read, NULL, NULL, pc87309_write, NULL, NULL, dev); } else { - io_sethandler(0x02e, 0x0002, - pc87309_read, NULL, NULL, pc87309_write, NULL, NULL, dev); + io_sethandler(0x02e, 0x0002, + pc87309_read, NULL, NULL, pc87309_write, NULL, NULL, dev); } return dev; } const device_t pc87309_device = { - .name = "National Semiconductor PC87309 Super I/O", + .name = "National Semiconductor PC87309 Super I/O", .internal_name = "pc87309", - .flags = 0, - .local = 0xe0, - .init = pc87309_init, - .close = pc87309_close, - .reset = NULL, + .flags = 0, + .local = 0xe0, + .init = pc87309_init, + .close = pc87309_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t pc87309_15c_device = { - .name = "National Semiconductor PC87309 Super I/O (Port 15Ch)", + .name = "National Semiconductor PC87309 Super I/O (Port 15Ch)", .internal_name = "pc87309_15c", - .flags = 0, - .local = 0x1e0, - .init = pc87309_init, - .close = pc87309_close, - .reset = NULL, + .flags = 0, + .local = 0x1e0, + .init = pc87309_init, + .close = pc87309_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_pc87310.c b/src/sio/sio_pc87310.c index 7817fee9d..03cb63958 100644 --- a/src/sio/sio_pc87310.c +++ b/src/sio/sio_pc87310.c @@ -50,31 +50,29 @@ pc87310_log(const char *fmt, ...) { va_list ap; - if (pc87310_do_log) - { + if (pc87310_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define pc87310_log(fmt, ...) +# define pc87310_log(fmt, ...) #endif typedef struct { uint8_t tries, ide_function, - reg; - fdc_t *fdc; + reg; + fdc_t *fdc; serial_t *uart[2]; } pc87310_t; - static void lpt1_handler(pc87310_t *dev) { - int temp; + int temp; uint16_t lpt_port = LPT1_ADDR; - uint8_t lpt_irq = LPT1_IRQ; + uint8_t lpt_irq = LPT1_IRQ; /* bits 0-1: * 00 378h @@ -85,28 +83,27 @@ lpt1_handler(pc87310_t *dev) temp = dev->reg & 3; switch (temp) { - case 0: - lpt_port = LPT1_ADDR; - break; - case 1: - lpt_port = LPT_MDA_ADDR; - break; - case 2: - lpt_port = LPT2_ADDR; - break; - case 3: - lpt_port = 0x000; - lpt_irq = 0xff; - break; + case 0: + lpt_port = LPT1_ADDR; + break; + case 1: + lpt_port = LPT_MDA_ADDR; + break; + case 2: + lpt_port = LPT2_ADDR; + break; + case 3: + lpt_port = 0x000; + lpt_irq = 0xff; + break; } if (lpt_port) - lpt1_init(lpt_port); + lpt1_init(lpt_port); lpt1_irq(lpt_irq); } - static void serial_handler(pc87310_t *dev, int uart) { @@ -117,9 +114,9 @@ serial_handler(pc87310_t *dev, int uart) */ temp = (dev->reg >> (2 + uart)) & 1; - //current serial port is enabled - if (!temp){ - //configure serial port as COM2 + // current serial port is enabled + if (!temp) { + // configure serial port as COM2 if (((dev->reg >> 4) & 1) ^ uart) serial_setup(dev->uart[uart], COM2_ADDR, COM2_IRQ); // configure serial port as COM1 @@ -128,23 +125,22 @@ serial_handler(pc87310_t *dev, int uart) } } - static void pc87310_write(uint16_t port, uint8_t val, void *priv) { pc87310_t *dev = (pc87310_t *) priv; - uint8_t valxor; + uint8_t valxor; // second write to config register - if (dev->tries) { - valxor = val ^ dev->reg; - dev->tries = 0; - dev->reg = val; - // first write to config register + if (dev->tries) { + valxor = val ^ dev->reg; + dev->tries = 0; + dev->reg = val; + // first write to config register } else { - dev->tries++; - return; - } + dev->tries++; + return; + } pc87310_log("SIO: written %01X\n", val); @@ -191,12 +187,11 @@ pc87310_write(uint16_t port, uint8_t val, void *priv) return; } - uint8_t pc87310_read(uint16_t port, void *priv) { pc87310_t *dev = (pc87310_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; dev->tries = 0; @@ -207,15 +202,14 @@ pc87310_read(uint16_t port, void *priv) return ret; } - void pc87310_reset(pc87310_t *dev) { - dev->reg = 0x0; + dev->reg = 0x0; dev->tries = 0; /* - 0 = 360 rpm @ 500 kbps for 3.5" - 1 = Default, 300 rpm @ 500,300,250,1000 kbps for 3.5" + 0 = 360 rpm @ 500 kbps for 3.5" + 1 = Default, 300 rpm @ 500,300,250,1000 kbps for 3.5" */ lpt1_remove(); lpt1_handler(dev); @@ -224,10 +218,9 @@ pc87310_reset(pc87310_t *dev) serial_handler(dev, 0); serial_handler(dev, 1); fdc_reset(dev->fdc); - //ide_pri_enable(); + // ide_pri_enable(); } - static void pc87310_close(void *priv) { @@ -236,7 +229,6 @@ pc87310_close(void *priv) free(dev); } - static void * pc87310_init(const device_t *info) { @@ -257,36 +249,35 @@ pc87310_init(const device_t *info) pc87310_reset(dev); io_sethandler(0x3f3, 0x0001, - pc87310_read, NULL, NULL, pc87310_write, NULL, NULL, dev); - + pc87310_read, NULL, NULL, pc87310_write, NULL, NULL, dev); return dev; } const device_t pc87310_device = { - .name = "National Semiconductor PC87310 Super I/O", + .name = "National Semiconductor PC87310 Super I/O", .internal_name = "pc87310", - .flags = 0, - .local = 0, - .init = pc87310_init, - .close = pc87310_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = pc87310_init, + .close = pc87310_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t pc87310_ide_device = { - .name = "National Semiconductor PC87310 Super I/O with IDE functionality", + .name = "National Semiconductor PC87310 Super I/O with IDE functionality", .internal_name = "pc87310_ide", - .flags = 0, - .local = 1, - .init = pc87310_init, - .close = pc87310_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = pc87310_init, + .close = pc87310_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_pc87311.c b/src/sio/sio_pc87311.c index f52b065df..cb6acb99c 100644 --- a/src/sio/sio_pc87311.c +++ b/src/sio/sio_pc87311.c @@ -33,15 +33,15 @@ #define HAS_IDE_FUNCTIONALITY dev->ide_function /* Basic Functionalities */ -#define FUNCTION_ENABLE dev->regs[0x00] +#define FUNCTION_ENABLE dev->regs[0x00] #define FUNCTION_ADDRESS dev->regs[0x01] -#define POWER_TEST dev->regs[0x02] +#define POWER_TEST dev->regs[0x02] /* Base Addresses */ -#define LPT_BA (FUNCTION_ADDRESS & 0x03) +#define LPT_BA (FUNCTION_ADDRESS & 0x03) #define UART1_BA ((FUNCTION_ADDRESS >> 2) & 0x03) #define UART2_BA ((FUNCTION_ADDRESS >> 4) & 0x03) -#define COM_BA ((FUNCTION_ADDRESS >> 6) & 0x03) +#define COM_BA ((FUNCTION_ADDRESS >> 6) & 0x03) #ifdef ENABLE_PC87311_LOG int pc87311_do_log = ENABLE_PC87311_LOG; @@ -50,22 +50,21 @@ pc87311_log(const char *fmt, ...) { va_list ap; - if (pc87311_do_log) - { + if (pc87311_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define pc87311_log(fmt, ...) +# define pc87311_log(fmt, ...) #endif typedef struct { - uint8_t index, regs[256], cfg_lock, ide_function; - uint16_t base, irq; - fdc_t *fdc_controller; + uint8_t index, regs[256], cfg_lock, ide_function; + uint16_t base, irq; + fdc_t *fdc_controller; serial_t *uart[2]; } pc87311_t; @@ -79,30 +78,28 @@ void pc87311_enable(pc87311_t *dev); static void pc87311_write(uint16_t addr, uint8_t val, void *priv) { - pc87311_t *dev = (pc87311_t *)priv; + pc87311_t *dev = (pc87311_t *) priv; - switch (addr) - { - case 0x398: - case 0x26e: - dev->index = val; - break; + switch (addr) { + case 0x398: + case 0x26e: + dev->index = val; + break; - case 0x399: - case 0x26f: - switch (dev->index) - { - case 0x00: - FUNCTION_ENABLE = val; + case 0x399: + case 0x26f: + switch (dev->index) { + case 0x00: + FUNCTION_ENABLE = val; + break; + case 0x01: + FUNCTION_ADDRESS = val; + break; + case 0x02: + POWER_TEST = val; + break; + } break; - case 0x01: - FUNCTION_ADDRESS = val; - break; - case 0x02: - POWER_TEST = val; - break; - } - break; } pc87311_enable(dev); @@ -111,103 +108,105 @@ pc87311_write(uint16_t addr, uint8_t val, void *priv) static uint8_t pc87311_read(uint16_t addr, void *priv) { - pc87311_t *dev = (pc87311_t *)priv; + pc87311_t *dev = (pc87311_t *) priv; return dev->regs[dev->index]; } -void pc87311_fdc_handler(pc87311_t *dev) +void +pc87311_fdc_handler(pc87311_t *dev) { fdc_remove(dev->fdc_controller); fdc_set_base(dev->fdc_controller, (FUNCTION_ENABLE & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); pc87311_log("PC87311-FDC: BASE %04x\n", (FUNCTION_ENABLE & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); } -uint16_t com3(pc87311_t *dev) +uint16_t +com3(pc87311_t *dev) { - switch (COM_BA) - { - case 0: - return COM3_ADDR; - case 1: - return 0x0338; - case 2: - return COM4_ADDR; - case 3: - return 0x0220; - default: - return COM3_ADDR; + switch (COM_BA) { + case 0: + return COM3_ADDR; + case 1: + return 0x0338; + case 2: + return COM4_ADDR; + case 3: + return 0x0220; + default: + return COM3_ADDR; } } -uint16_t com4(pc87311_t *dev) +uint16_t +com4(pc87311_t *dev) { - switch (COM_BA) - { - case 0: - return COM4_ADDR; - case 1: - return 0x0238; - case 2: - return 0x02e0; - case 3: - return 0x0228; - default: - return COM4_ADDR; + switch (COM_BA) { + case 0: + return COM4_ADDR; + case 1: + return 0x0238; + case 2: + return 0x02e0; + case 3: + return 0x0228; + default: + return COM4_ADDR; } } -void pc87311_uart_handler(uint8_t num, pc87311_t *dev) +void +pc87311_uart_handler(uint8_t num, pc87311_t *dev) { serial_remove(dev->uart[num & 1]); - switch (!(num & 1) ? UART1_BA : UART2_BA) - { - case 0: - dev->base = COM1_ADDR; - dev->irq = COM1_IRQ; - break; - case 1: - dev->base = COM2_ADDR; - dev->irq = COM2_IRQ; - break; - case 2: - dev->base = com3(dev); - dev->irq = COM3_IRQ; - break; - case 3: - dev->base = com4(dev); - dev->irq = COM4_IRQ; - break; + switch (!(num & 1) ? UART1_BA : UART2_BA) { + case 0: + dev->base = COM1_ADDR; + dev->irq = COM1_IRQ; + break; + case 1: + dev->base = COM2_ADDR; + dev->irq = COM2_IRQ; + break; + case 2: + dev->base = com3(dev); + dev->irq = COM3_IRQ; + break; + case 3: + dev->base = com4(dev); + dev->irq = COM4_IRQ; + break; } serial_setup(dev->uart[num & 1], dev->base, dev->irq); pc87311_log("PC87311-UART%01x: BASE %04x IRQ %01x\n", num & 1, dev->base, dev->irq); } -void pc87311_lpt_handler(pc87311_t *dev) +void +pc87311_lpt_handler(pc87311_t *dev) { lpt1_remove(); - switch (LPT_BA) - { - case 0: - dev->base = LPT1_ADDR; - dev->irq = (POWER_TEST & 0x08) ? LPT1_IRQ : LPT2_IRQ; - break; - case 1: - dev->base = LPT_MDA_ADDR; - dev->irq = LPT_MDA_IRQ; - break; - case 2: - dev->base = LPT2_ADDR; - dev->irq = LPT2_IRQ; - break; + switch (LPT_BA) { + case 0: + dev->base = LPT1_ADDR; + dev->irq = (POWER_TEST & 0x08) ? LPT1_IRQ : LPT2_IRQ; + break; + case 1: + dev->base = LPT_MDA_ADDR; + dev->irq = LPT_MDA_IRQ; + break; + case 2: + dev->base = LPT2_ADDR; + dev->irq = LPT2_IRQ; + break; } lpt1_init(dev->base); lpt1_irq(dev->irq); pc87311_log("PC87311-LPT: BASE %04x IRQ %01x\n", dev->base, dev->irq); } -void pc87311_ide_handler(pc87311_t *dev) +void +pc87311_ide_handler(pc87311_t *dev) { ide_pri_disable(); ide_sec_disable(); @@ -216,8 +215,7 @@ void pc87311_ide_handler(pc87311_t *dev) ide_set_side(0, 0x3f6); ide_pri_enable(); - if (FUNCTION_ENABLE & 0x80) - { + if (FUNCTION_ENABLE & 0x80) { ide_set_base(1, 0x170); ide_set_side(1, 0x376); ide_sec_enable(); @@ -225,7 +223,8 @@ void pc87311_ide_handler(pc87311_t *dev) pc87311_log("PC87311-IDE: PRI %01x SEC %01x\n", (FUNCTION_ENABLE >> 6) & 1, (FUNCTION_ENABLE >> 7) & 1); } -void pc87311_enable(pc87311_t *dev) +void +pc87311_enable(pc87311_t *dev) { (FUNCTION_ENABLE & 0x01) ? pc87311_lpt_handler(dev) : lpt1_remove(); (FUNCTION_ENABLE & 0x02) ? pc87311_uart_handler(0, dev) : serial_remove(dev->uart[0]); @@ -233,8 +232,7 @@ void pc87311_enable(pc87311_t *dev) (FUNCTION_ENABLE & 0x08) ? pc87311_fdc_handler(dev) : fdc_remove(dev->fdc_controller); if (FUNCTION_ENABLE & 0x20) pc87311_fdc_handler(dev); - if (HAS_IDE_FUNCTIONALITY) - { + if (HAS_IDE_FUNCTIONALITY) { (FUNCTION_ENABLE & 0x40) ? pc87311_ide_handler(dev) : ide_pri_disable(); (FUNCTION_ADDRESS & 0x80) ? pc87311_ide_handler(dev) : ide_sec_disable(); } @@ -243,7 +241,7 @@ void pc87311_enable(pc87311_t *dev) static void pc87311_close(void *priv) { - pc87311_t *dev = (pc87311_t *)priv; + pc87311_t *dev = (pc87311_t *) priv; free(dev); } @@ -251,15 +249,15 @@ pc87311_close(void *priv) static void * pc87311_init(const device_t *info) { - pc87311_t *dev = (pc87311_t *)malloc(sizeof(pc87311_t)); + pc87311_t *dev = (pc87311_t *) malloc(sizeof(pc87311_t)); memset(dev, 0, sizeof(pc87311_t)); /* Avoid conflicting with machines that make no use of the PC87311 Internal IDE */ HAS_IDE_FUNCTIONALITY = info->local; dev->fdc_controller = device_add(&fdc_at_nsc_device); - dev->uart[0] = device_add_inst(&ns16450_device, 1); - dev->uart[1] = device_add_inst(&ns16450_device, 2); + dev->uart[0] = device_add_inst(&ns16450_device, 1); + dev->uart[1] = device_add_inst(&ns16450_device, 2); if (HAS_IDE_FUNCTIONALITY) device_add(&ide_isa_2ch_device); @@ -273,29 +271,29 @@ pc87311_init(const device_t *info) } const device_t pc87311_device = { - .name = "National Semiconductor PC87311", + .name = "National Semiconductor PC87311", .internal_name = "pc87311", - .flags = 0, - .local = 0, - .init = pc87311_init, - .close = pc87311_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = pc87311_init, + .close = pc87311_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t pc87311_ide_device = { - .name = "National Semiconductor PC87311 with IDE functionality", + .name = "National Semiconductor PC87311 with IDE functionality", .internal_name = "pc87311_ide", - .flags = 0, - .local = 1, - .init = pc87311_init, - .close = pc87311_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = pc87311_init, + .close = pc87311_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_pc87332.c b/src/sio/sio_pc87332.c index a2fd7f0d3..71f7584f4 100644 --- a/src/sio/sio_pc87332.c +++ b/src/sio/sio_pc87332.c @@ -34,51 +34,48 @@ #include <86box/fdc.h> #include <86box/sio.h> - typedef struct { uint8_t tries, has_ide, - fdc_on, regs[15]; - int cur_reg; - fdc_t *fdc; + fdc_on, regs[15]; + int cur_reg; + fdc_t *fdc; serial_t *uart[2]; } pc87332_t; - static void lpt1_handler(pc87332_t *dev) { - int temp; + int temp; uint16_t lpt_port = LPT1_ADDR; - uint8_t lpt_irq = LPT2_IRQ; + uint8_t lpt_irq = LPT2_IRQ; temp = dev->regs[0x01] & 3; switch (temp) { - case 0: - lpt_port = LPT1_ADDR; - lpt_irq = (dev->regs[0x02] & 0x08) ? LPT1_IRQ : LPT2_IRQ; - break; - case 1: - lpt_port = LPT_MDA_ADDR; - lpt_irq = LPT_MDA_IRQ; - break; - case 2: - lpt_port = LPT2_ADDR; - lpt_irq = LPT2_IRQ; - break; - case 3: - lpt_port = 0x000; - lpt_irq = 0xff; - break; + case 0: + lpt_port = LPT1_ADDR; + lpt_irq = (dev->regs[0x02] & 0x08) ? LPT1_IRQ : LPT2_IRQ; + break; + case 1: + lpt_port = LPT_MDA_ADDR; + lpt_irq = LPT_MDA_IRQ; + break; + case 2: + lpt_port = LPT2_ADDR; + lpt_irq = LPT2_IRQ; + break; + case 3: + lpt_port = 0x000; + lpt_irq = 0xff; + break; } if (lpt_port) - lpt1_init(lpt_port); + lpt1_init(lpt_port); lpt1_irq(lpt_irq); } - static void serial_handler(pc87332_t *dev, int uart) { @@ -87,187 +84,183 @@ serial_handler(pc87332_t *dev, int uart) temp = (dev->regs[1] >> (2 << uart)) & 3; switch (temp) { - case 0: - serial_setup(dev->uart[uart], COM1_ADDR, 4); - break; - case 1: - serial_setup(dev->uart[uart], COM2_ADDR, 3); - break; - case 2: - switch ((dev->regs[1] >> 6) & 3) { - case 0: - serial_setup(dev->uart[uart], COM3_ADDR, COM3_IRQ); - break; - case 1: - serial_setup(dev->uart[uart], 0x338, COM3_IRQ); - break; - case 2: - serial_setup(dev->uart[uart], COM4_ADDR, COM3_IRQ); - break; - case 3: - serial_setup(dev->uart[uart], 0x220, COM3_IRQ); - break; - } - break; - case 3: - switch ((dev->regs[1] >> 6) & 3) { - case 0: - serial_setup(dev->uart[uart], COM4_ADDR, COM4_IRQ); - break; - case 1: - serial_setup(dev->uart[uart], 0x238, COM4_IRQ); - break; - case 2: - serial_setup(dev->uart[uart], 0x2e0, COM4_IRQ); - break; - case 3: - serial_setup(dev->uart[uart], 0x228, COM4_IRQ); - break; - } - break; + case 0: + serial_setup(dev->uart[uart], COM1_ADDR, 4); + break; + case 1: + serial_setup(dev->uart[uart], COM2_ADDR, 3); + break; + case 2: + switch ((dev->regs[1] >> 6) & 3) { + case 0: + serial_setup(dev->uart[uart], COM3_ADDR, COM3_IRQ); + break; + case 1: + serial_setup(dev->uart[uart], 0x338, COM3_IRQ); + break; + case 2: + serial_setup(dev->uart[uart], COM4_ADDR, COM3_IRQ); + break; + case 3: + serial_setup(dev->uart[uart], 0x220, COM3_IRQ); + break; + } + break; + case 3: + switch ((dev->regs[1] >> 6) & 3) { + case 0: + serial_setup(dev->uart[uart], COM4_ADDR, COM4_IRQ); + break; + case 1: + serial_setup(dev->uart[uart], 0x238, COM4_IRQ); + break; + case 2: + serial_setup(dev->uart[uart], 0x2e0, COM4_IRQ); + break; + case 3: + serial_setup(dev->uart[uart], 0x228, COM4_IRQ); + break; + } + break; } } - static void ide_handler(pc87332_t *dev) { /* TODO: Make an ide_disable(channel) and ide_enable(channel) so we can simplify this. */ if (dev->has_ide == 2) { - ide_sec_disable(); - ide_set_base(1, (dev->regs[0x00] & 0x80) ? 0x170 : 0x1f0); - ide_set_side(1, (dev->regs[0x00] & 0x80) ? 0x376 : 0x3f6); - if (dev->regs[0x00] & 0x40) - ide_sec_enable(); + ide_sec_disable(); + ide_set_base(1, (dev->regs[0x00] & 0x80) ? 0x170 : 0x1f0); + ide_set_side(1, (dev->regs[0x00] & 0x80) ? 0x376 : 0x3f6); + if (dev->regs[0x00] & 0x40) + ide_sec_enable(); } else if (dev->has_ide == 1) { - ide_pri_disable(); - ide_set_base(0, (dev->regs[0x00] & 0x80) ? 0x170 : 0x1f0); - ide_set_side(0, (dev->regs[0x00] & 0x80) ? 0x376 : 0x3f6); - if (dev->regs[0x00] & 0x40) - ide_pri_enable(); + ide_pri_disable(); + ide_set_base(0, (dev->regs[0x00] & 0x80) ? 0x170 : 0x1f0); + ide_set_side(0, (dev->regs[0x00] & 0x80) ? 0x376 : 0x3f6); + if (dev->regs[0x00] & 0x40) + ide_pri_enable(); } } - static void pc87332_write(uint16_t port, uint8_t val, void *priv) { pc87332_t *dev = (pc87332_t *) priv; - uint8_t index, valxor; + uint8_t index, valxor; index = (port & 1) ? 0 : 1; if (index) { - dev->cur_reg = val & 0x1f; - dev->tries = 0; - return; + dev->cur_reg = val & 0x1f; + dev->tries = 0; + return; } else { - if (dev->tries) { - valxor = val ^ dev->regs[dev->cur_reg]; - dev->tries = 0; - if ((dev->cur_reg <= 14) && (dev->cur_reg != 8)) - dev->regs[dev->cur_reg] = val; - else - return; - } else { - dev->tries++; - return; - } + if (dev->tries) { + valxor = val ^ dev->regs[dev->cur_reg]; + dev->tries = 0; + if ((dev->cur_reg <= 14) && (dev->cur_reg != 8)) + dev->regs[dev->cur_reg] = val; + else + return; + } else { + dev->tries++; + return; + } } - switch(dev->cur_reg) { - case 0: - if (valxor & 1) { - lpt1_remove(); - if ((val & 1) && !(dev->regs[2] & 1)) - lpt1_handler(dev); - } - if (valxor & 2) { - serial_remove(dev->uart[0]); - if ((val & 2) && !(dev->regs[2] & 1)) - serial_handler(dev, 0); - } - if (valxor & 4) { - serial_remove(dev->uart[1]); - if ((val & 4) && !(dev->regs[2] & 1)) - serial_handler(dev, 1); - } - if (valxor & 0x28) { - fdc_remove(dev->fdc); - if ((val & 8) && !(dev->regs[2] & 1)) - fdc_set_base(dev->fdc, (val & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); - } - if (dev->has_ide && (valxor & 0xc0)) - ide_handler(dev); - break; - case 1: - if (valxor & 3) { - lpt1_remove(); - if ((dev->regs[0] & 1) && !(dev->regs[2] & 1)) - lpt1_handler(dev); - } - if (valxor & 0xcc) { - serial_remove(dev->uart[0]); - if ((dev->regs[0] & 2) && !(dev->regs[2] & 1)) - serial_handler(dev, 0); - } - if (valxor & 0xf0) { - serial_remove(dev->uart[1]); - if ((dev->regs[0] & 4) && !(dev->regs[2] & 1)) - serial_handler(dev, 1); - } - break; - case 2: - if (valxor & 1) { - lpt1_remove(); - serial_remove(dev->uart[0]); - serial_remove(dev->uart[1]); - fdc_remove(dev->fdc); + switch (dev->cur_reg) { + case 0: + if (valxor & 1) { + lpt1_remove(); + if ((val & 1) && !(dev->regs[2] & 1)) + lpt1_handler(dev); + } + if (valxor & 2) { + serial_remove(dev->uart[0]); + if ((val & 2) && !(dev->regs[2] & 1)) + serial_handler(dev, 0); + } + if (valxor & 4) { + serial_remove(dev->uart[1]); + if ((val & 4) && !(dev->regs[2] & 1)) + serial_handler(dev, 1); + } + if (valxor & 0x28) { + fdc_remove(dev->fdc); + if ((val & 8) && !(dev->regs[2] & 1)) + fdc_set_base(dev->fdc, (val & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); + } + if (dev->has_ide && (valxor & 0xc0)) + ide_handler(dev); + break; + case 1: + if (valxor & 3) { + lpt1_remove(); + if ((dev->regs[0] & 1) && !(dev->regs[2] & 1)) + lpt1_handler(dev); + } + if (valxor & 0xcc) { + serial_remove(dev->uart[0]); + if ((dev->regs[0] & 2) && !(dev->regs[2] & 1)) + serial_handler(dev, 0); + } + if (valxor & 0xf0) { + serial_remove(dev->uart[1]); + if ((dev->regs[0] & 4) && !(dev->regs[2] & 1)) + serial_handler(dev, 1); + } + break; + case 2: + if (valxor & 1) { + lpt1_remove(); + serial_remove(dev->uart[0]); + serial_remove(dev->uart[1]); + fdc_remove(dev->fdc); - if (!(val & 1)) { - if (dev->regs[0] & 1) - lpt1_handler(dev); - if (dev->regs[0] & 2) - serial_handler(dev, 0); - if (dev->regs[0] & 4) - serial_handler(dev, 1); - if (dev->regs[0] & 8) - fdc_set_base(dev->fdc, (dev->regs[0] & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); - } - } - if (valxor & 8) { - lpt1_remove(); - if ((dev->regs[0] & 1) && !(dev->regs[2] & 1)) - lpt1_handler(dev); - } - break; + if (!(val & 1)) { + if (dev->regs[0] & 1) + lpt1_handler(dev); + if (dev->regs[0] & 2) + serial_handler(dev, 0); + if (dev->regs[0] & 4) + serial_handler(dev, 1); + if (dev->regs[0] & 8) + fdc_set_base(dev->fdc, (dev->regs[0] & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); + } + } + if (valxor & 8) { + lpt1_remove(); + if ((dev->regs[0] & 1) && !(dev->regs[2] & 1)) + lpt1_handler(dev); + } + break; } } - uint8_t pc87332_read(uint16_t port, void *priv) { pc87332_t *dev = (pc87332_t *) priv; - uint8_t ret = 0xff, index; + uint8_t ret = 0xff, index; index = (port & 1) ? 0 : 1; dev->tries = 0; if (index) - ret = dev->cur_reg & 0x1f; + ret = dev->cur_reg & 0x1f; else { - if (dev->cur_reg == 8) - ret = 0x10; - else if (dev->cur_reg < 14) - ret = dev->regs[dev->cur_reg]; + if (dev->cur_reg == 8) + ret = 0x10; + else if (dev->cur_reg < 14) + ret = dev->regs[dev->cur_reg]; } return ret; } - void pc87332_reset(pc87332_t *dev) { @@ -275,15 +268,15 @@ pc87332_reset(pc87332_t *dev) dev->regs[0x00] = dev->fdc_on ? 0x4f : 0x07; if (dev->has_ide == 2) - dev->regs[0x00] |= 0x80; + dev->regs[0x00] |= 0x80; dev->regs[0x01] = 0x10; dev->regs[0x03] = 0x01; dev->regs[0x05] = 0x0D; dev->regs[0x08] = 0x70; /* - 0 = 360 rpm @ 500 kbps for 3.5" - 1 = Default, 300 rpm @ 500,300,250,1000 kbps for 3.5" + 0 = 360 rpm @ 500 kbps for 3.5" + 1 = Default, 300 rpm @ 500,300,250,1000 kbps for 3.5" */ lpt1_remove(); lpt1_handler(dev); @@ -293,13 +286,12 @@ pc87332_reset(pc87332_t *dev) serial_handler(dev, 1); fdc_reset(dev->fdc); if (!dev->fdc_on) - fdc_remove(dev->fdc); + fdc_remove(dev->fdc); if (dev->has_ide) - ide_handler(dev); + ide_handler(dev); } - static void pc87332_close(void *priv) { @@ -308,7 +300,6 @@ pc87332_close(void *priv) free(dev); } - static void * pc87332_init(const device_t *info) { @@ -321,86 +312,86 @@ pc87332_init(const device_t *info) dev->uart[1] = device_add_inst(&ns16550_device, 2); dev->has_ide = (info->local >> 8) & 0xff; - dev->fdc_on = (info->local >> 16) & 0xff; + dev->fdc_on = (info->local >> 16) & 0xff; pc87332_reset(dev); if ((info->local & 0xff) == (0x01)) { - io_sethandler(0x398, 0x0002, - pc87332_read, NULL, NULL, pc87332_write, NULL, NULL, dev); + io_sethandler(0x398, 0x0002, + pc87332_read, NULL, NULL, pc87332_write, NULL, NULL, dev); } else { - io_sethandler(0x02e, 0x0002, - pc87332_read, NULL, NULL, pc87332_write, NULL, NULL, dev); + io_sethandler(0x02e, 0x0002, + pc87332_read, NULL, NULL, pc87332_write, NULL, NULL, dev); } return dev; } const device_t pc87332_device = { - .name = "National Semiconductor PC87332 Super I/O", + .name = "National Semiconductor PC87332 Super I/O", .internal_name = "pc87332", - .flags = 0, - .local = 0x00, - .init = pc87332_init, - .close = pc87332_close, - .reset = NULL, + .flags = 0, + .local = 0x00, + .init = pc87332_init, + .close = pc87332_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t pc87332_398_device = { - .name = "National Semiconductor PC87332 Super I/O (Port 398h)", + .name = "National Semiconductor PC87332 Super I/O (Port 398h)", .internal_name = "pc87332_398", - .flags = 0, - .local = 0x01, - .init = pc87332_init, - .close = pc87332_close, - .reset = NULL, + .flags = 0, + .local = 0x01, + .init = pc87332_init, + .close = pc87332_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t pc87332_398_ide_device = { - .name = "National Semiconductor PC87332 Super I/O (Port 398h) (With IDE)", + .name = "National Semiconductor PC87332 Super I/O (Port 398h) (With IDE)", .internal_name = "pc87332_398_ide", - .flags = 0, - .local = 0x101, - .init = pc87332_init, - .close = pc87332_close, - .reset = NULL, + .flags = 0, + .local = 0x101, + .init = pc87332_init, + .close = pc87332_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t pc87332_398_ide_sec_device = { - .name = "National Semiconductor PC87332 Super I/O (Port 398h) (With Secondary IDE)", + .name = "National Semiconductor PC87332 Super I/O (Port 398h) (With Secondary IDE)", .internal_name = "pc87332_398_ide_sec", - .flags = 0, - .local = 0x201, - .init = pc87332_init, - .close = pc87332_close, - .reset = NULL, + .flags = 0, + .local = 0x201, + .init = pc87332_init, + .close = pc87332_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t pc87332_398_ide_fdcon_device = { - .name = "National Semiconductor PC87332 Super I/O (Port 398h) (With IDE and FDC on)", + .name = "National Semiconductor PC87332 Super I/O (Port 398h) (With IDE and FDC on)", .internal_name = "pc87332_398_ide_fdcon", - .flags = 0, - .local = 0x10101, - .init = pc87332_init, - .close = pc87332_close, - .reset = NULL, + .flags = 0, + .local = 0x10101, + .init = pc87332_init, + .close = pc87332_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_prime3b.c b/src/sio/sio_prime3b.c index ac00106d3..dfbe6d1e8 100644 --- a/src/sio/sio_prime3b.c +++ b/src/sio/sio_prime3b.c @@ -30,9 +30,9 @@ #include <86box/fdc.h> #include <86box/sio.h> -#define FSR dev->regs[0xa0] -#define ASR dev->regs[0xa1] -#define PDR dev->regs[0xa2] +#define FSR dev->regs[0xa0] +#define ASR dev->regs[0xa1] +#define PDR dev->regs[0xa2] #define HAS_IDE_FUNCTIONALITY dev->ide_function #ifdef ENABLE_PRIME3B_LOG @@ -42,23 +42,22 @@ prime3b_log(const char *fmt, ...) { va_list ap; - if (prime3b_do_log) - { + if (prime3b_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define prime3b_log(fmt, ...) +# define prime3b_log(fmt, ...) #endif typedef struct { - uint8_t index, regs[256], cfg_lock, ide_function; + uint8_t index, regs[256], cfg_lock, ide_function; uint16_t com3_addr, com4_addr; - fdc_t *fdc_controller; + fdc_t *fdc_controller; serial_t *uart[2]; } prime3b_t; @@ -73,10 +72,9 @@ void prime3b_powerdown(prime3b_t *dev); static void prime3b_write(uint16_t addr, uint8_t val, void *priv) { - prime3b_t *dev = (prime3b_t *)priv; + prime3b_t *dev = (prime3b_t *) priv; - if (addr == 0x398) - { + if (addr == 0x398) { dev->index = val; /* Enter/Escape Configuration Mode */ @@ -84,50 +82,46 @@ prime3b_write(uint16_t addr, uint8_t val, void *priv) dev->cfg_lock = 0; else if (val == 0xcc) dev->cfg_lock = 1; - } - else if ((addr == 0x399) && !dev->cfg_lock) - { - switch (dev->index) - { - case 0xa0: /* Function Selection Register (FSR) */ - FSR = val; - prime3b_enable(dev); - break; - case 0xa1: /* Address Selection Register (ASR) */ - ASR = val; - prime3b_enable(dev); - break; - case 0xa2: /* Power Down Register (PDR) */ - dev->regs[0xa2] = val; - break; - case 0xa3: /* Test Mode Register (TMR) */ - dev->regs[0xa3] = val; - break; - case 0xa4: /* Miscellaneous Function Register */ - dev->regs[0xa4] = val; - switch ((dev->regs[0xa4] >> 6) & 3) - { - case 0: - dev->com3_addr = COM3_ADDR; - dev->com4_addr = COM4_ADDR; + } else if ((addr == 0x399) && !dev->cfg_lock) { + switch (dev->index) { + case 0xa0: /* Function Selection Register (FSR) */ + FSR = val; + prime3b_enable(dev); break; - case 1: - dev->com3_addr = 0x338; - dev->com4_addr = 0x238; + case 0xa1: /* Address Selection Register (ASR) */ + ASR = val; + prime3b_enable(dev); break; - case 2: - dev->com3_addr = COM4_ADDR; - dev->com4_addr = 0x2e0; + case 0xa2: /* Power Down Register (PDR) */ + dev->regs[0xa2] = val; break; - case 3: - dev->com3_addr = 0x220; - dev->com4_addr = 0x228; + case 0xa3: /* Test Mode Register (TMR) */ + dev->regs[0xa3] = val; + break; + case 0xa4: /* Miscellaneous Function Register */ + dev->regs[0xa4] = val; + switch ((dev->regs[0xa4] >> 6) & 3) { + case 0: + dev->com3_addr = COM3_ADDR; + dev->com4_addr = COM4_ADDR; + break; + case 1: + dev->com3_addr = 0x338; + dev->com4_addr = 0x238; + break; + case 2: + dev->com3_addr = COM4_ADDR; + dev->com4_addr = 0x2e0; + break; + case 3: + dev->com3_addr = 0x220; + dev->com4_addr = 0x228; + break; + } + break; + case 0xa5: /* ECP Register */ + dev->regs[0xa5] = val; break; - } - break; - case 0xa5: /* ECP Register */ - dev->regs[0xa5] = val; - break; } } } @@ -135,12 +129,13 @@ prime3b_write(uint16_t addr, uint8_t val, void *priv) static uint8_t prime3b_read(uint16_t addr, void *priv) { - prime3b_t *dev = (prime3b_t *)priv; + prime3b_t *dev = (prime3b_t *) priv; return dev->regs[dev->index]; } -void prime3b_fdc_handler(prime3b_t *dev) +void +prime3b_fdc_handler(prime3b_t *dev) { uint16_t fdc_base = !(ASR & 0x40) ? FDC_PRIMARY_ADDR : FDC_SECONDARY_ADDR; fdc_remove(dev->fdc_controller); @@ -148,7 +143,8 @@ void prime3b_fdc_handler(prime3b_t *dev) prime3b_log("Prime3B-FDC: Enabled with base %03x\n", fdc_base); } -void prime3b_uart_handler(uint8_t num, prime3b_t *dev) +void +prime3b_uart_handler(uint8_t num, prime3b_t *dev) { uint16_t uart_base; if ((ASR >> (3 + 2 * num)) & 1) @@ -161,7 +157,8 @@ void prime3b_uart_handler(uint8_t num, prime3b_t *dev) prime3b_log("Prime3B-UART%d: Enabled with base %03x\n", num, uart_base); } -void prime3b_lpt_handler(prime3b_t *dev) +void +prime3b_lpt_handler(prime3b_t *dev) { uint16_t lpt_base = (ASR & 2) ? LPT_MDA_ADDR : (!(ASR & 1) ? LPT1_ADDR : LPT2_ADDR); lpt1_remove(); @@ -170,7 +167,8 @@ void prime3b_lpt_handler(prime3b_t *dev) prime3b_log("Prime3B-LPT: Enabled with base %03x\n", lpt_base); } -void prime3b_ide_handler(prime3b_t *dev) +void +prime3b_ide_handler(prime3b_t *dev) { ide_pri_disable(); uint16_t ide_base = !(ASR & 0x80) ? 0x1f0 : 0x170; @@ -180,7 +178,8 @@ void prime3b_ide_handler(prime3b_t *dev) prime3b_log("Prime3B-IDE: Enabled with base %03x and side %03x\n", ide_base, ide_side); } -void prime3b_enable(prime3b_t *dev) +void +prime3b_enable(prime3b_t *dev) { /* Simulate a device enable/disable scenario @@ -205,7 +204,8 @@ void prime3b_enable(prime3b_t *dev) (FSR & 0x20) ? prime3b_ide_handler(dev) : ide_pri_disable(); } -void prime3b_powerdown(prime3b_t *dev) +void +prime3b_powerdown(prime3b_t *dev) { /* Note: It can be done more efficiently for sure */ uint8_t old_base = PDR; @@ -235,7 +235,7 @@ void prime3b_powerdown(prime3b_t *dev) static void prime3b_close(void *priv) { - prime3b_t *dev = (prime3b_t *)priv; + prime3b_t *dev = (prime3b_t *) priv; free(dev); } @@ -243,7 +243,7 @@ prime3b_close(void *priv) static void * prime3b_init(const device_t *info) { - prime3b_t *dev = (prime3b_t *)malloc(sizeof(prime3b_t)); + prime3b_t *dev = (prime3b_t *) malloc(sizeof(prime3b_t)); memset(dev, 0, sizeof(prime3b_t)); /* Avoid conflicting with machines that make no use of the Prime3B Internal IDE */ @@ -252,8 +252,8 @@ prime3b_init(const device_t *info) dev->regs[0xa0] = 3; dev->fdc_controller = device_add(&fdc_at_device); - dev->uart[0] = device_add_inst(&ns16550_device, 1); - dev->uart[1] = device_add_inst(&ns16550_device, 2); + dev->uart[0] = device_add_inst(&ns16550_device, 1); + dev->uart[1] = device_add_inst(&ns16550_device, 2); if (HAS_IDE_FUNCTIONALITY) device_add(&ide_isa_device); @@ -269,29 +269,29 @@ prime3b_init(const device_t *info) } const device_t prime3b_device = { - .name = "Goldstar Prime3B", + .name = "Goldstar Prime3B", .internal_name = "prime3b", - .flags = 0, - .local = 0, - .init = prime3b_init, - .close = prime3b_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = prime3b_init, + .close = prime3b_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t prime3b_ide_device = { - .name = "Goldstar Prime3B with IDE functionality", + .name = "Goldstar Prime3B with IDE functionality", .internal_name = "prime3b_ide", - .flags = 0, - .local = 1, - .init = prime3b_init, - .close = prime3b_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = prime3b_init, + .close = prime3b_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_prime3c.c b/src/sio/sio_prime3c.c index ec350ece2..a19f8f6dc 100644 --- a/src/sio/sio_prime3c.c +++ b/src/sio/sio_prime3c.c @@ -37,25 +37,24 @@ prime3c_log(const char *fmt, ...) { va_list ap; - if (prime3c_do_log) - { + if (prime3c_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define prime3c_log(fmt, ...) +# define prime3c_log(fmt, ...) #endif /* Function Select(Note on prime3c_enable) */ #define FUNCTION_SELECT dev->regs[0xc2] /* Base Address Registers */ -#define FDC_BASE_ADDRESS dev->regs[0xc3] -#define IDE_BASE_ADDRESS dev->regs[0xc4] -#define IDE_SIDE_ADDRESS dev->regs[0xc5] -#define LPT_BASE_ADDRESS dev->regs[0xc6] +#define FDC_BASE_ADDRESS dev->regs[0xc3] +#define IDE_BASE_ADDRESS dev->regs[0xc4] +#define IDE_SIDE_ADDRESS dev->regs[0xc5] +#define LPT_BASE_ADDRESS dev->regs[0xc6] #define UART1_BASE_ADDRESS dev->regs[0xc7] #define UART2_BASE_ADDRESS dev->regs[0xc8] @@ -76,7 +75,7 @@ typedef struct { uint8_t index, regs[256], cfg_lock, ide_function; - fdc_t *fdc_controller; + fdc_t *fdc_controller; serial_t *uart[2]; } prime3c_t; @@ -90,124 +89,121 @@ void prime3c_enable(prime3c_t *dev); static void prime3c_write(uint16_t addr, uint8_t val, void *priv) { - prime3c_t *dev = (prime3c_t *)priv; + prime3c_t *dev = (prime3c_t *) priv; - switch (addr) - { - case 0x398: - dev->index = val; + switch (addr) { + case 0x398: + dev->index = val; - /* Enter/Escape Configuration Mode */ - if (val == 0x33) - dev->cfg_lock = 0; - else if (val == 0x55) - dev->cfg_lock = 1; - break; + /* Enter/Escape Configuration Mode */ + if (val == 0x33) + dev->cfg_lock = 0; + else if (val == 0x55) + dev->cfg_lock = 1; + break; - case 0x399: - if (!dev->cfg_lock) - { - switch (dev->index) - { - case 0xc2: - FUNCTION_SELECT = val & 0xbf; - prime3c_enable(dev); - break; + case 0x399: + if (!dev->cfg_lock) { + switch (dev->index) { + case 0xc2: + FUNCTION_SELECT = val & 0xbf; + prime3c_enable(dev); + break; - case 0xc3: - FDC_BASE_ADDRESS = val & 0xfc; - prime3c_fdc_handler(dev); - break; + case 0xc3: + FDC_BASE_ADDRESS = val & 0xfc; + prime3c_fdc_handler(dev); + break; - case 0xc4: - IDE_BASE_ADDRESS = val & 0xfc; - if (HAS_IDE_FUNCTIONALITY) - prime3c_ide_handler(dev); - break; + case 0xc4: + IDE_BASE_ADDRESS = val & 0xfc; + if (HAS_IDE_FUNCTIONALITY) + prime3c_ide_handler(dev); + break; - case 0xc5: - IDE_SIDE_ADDRESS = (val & 0xfc) | 0x02; - if (HAS_IDE_FUNCTIONALITY) - prime3c_ide_handler(dev); - break; + case 0xc5: + IDE_SIDE_ADDRESS = (val & 0xfc) | 0x02; + if (HAS_IDE_FUNCTIONALITY) + prime3c_ide_handler(dev); + break; - case 0xc6: - LPT_BASE_ADDRESS = val; - break; + case 0xc6: + LPT_BASE_ADDRESS = val; + break; - case 0xc7: - UART1_BASE_ADDRESS = val & 0xfe; - prime3c_uart_handler(0, dev); - break; + case 0xc7: + UART1_BASE_ADDRESS = val & 0xfe; + prime3c_uart_handler(0, dev); + break; - case 0xc8: - UART2_BASE_ADDRESS = val & 0xfe; - prime3c_uart_handler(1, dev); - break; + case 0xc8: + UART2_BASE_ADDRESS = val & 0xfe; + prime3c_uart_handler(1, dev); + break; - case 0xc9: - FDC_LPT_DMA = val; - prime3c_fdc_handler(dev); - break; + case 0xc9: + FDC_LPT_DMA = val; + prime3c_fdc_handler(dev); + break; - case 0xca: - FDC_LPT_IRQ = val; - prime3c_fdc_handler(dev); - prime3c_lpt_handler(dev); - break; + case 0xca: + FDC_LPT_IRQ = val; + prime3c_fdc_handler(dev); + prime3c_lpt_handler(dev); + break; - case 0xcb: - UART_IRQ = val; - prime3c_uart_handler(0, dev); - prime3c_uart_handler(1, dev); - break; + case 0xcb: + UART_IRQ = val; + prime3c_uart_handler(0, dev); + prime3c_uart_handler(1, dev); + break; - case 0xcd: - case 0xce: - dev->regs[dev->index] = val; - break; + case 0xcd: + case 0xce: + dev->regs[dev->index] = val; + break; - case 0xcf: - dev->regs[dev->index] = val & 0x3f; - break; + case 0xcf: + dev->regs[dev->index] = val & 0x3f; + break; - case 0xd0: - dev->regs[dev->index] = val & 0xfc; - break; + case 0xd0: + dev->regs[dev->index] = val & 0xfc; + break; - case 0xd1: - dev->regs[dev->index] = val & 0x3f; - break; + case 0xd1: + dev->regs[dev->index] = val & 0x3f; + break; - case 0xd3: - dev->regs[dev->index] = val & 0x7c; - break; + case 0xd3: + dev->regs[dev->index] = val & 0x7c; + break; - case 0xd5: - case 0xd6: - case 0xd7: - case 0xd8: - dev->regs[dev->index] = val; - break; + case 0xd5: + case 0xd6: + case 0xd7: + case 0xd8: + dev->regs[dev->index] = val; + break; + } } - } - break; + break; } } static uint8_t prime3c_read(uint16_t addr, void *priv) { - prime3c_t *dev = (prime3c_t *)priv; + prime3c_t *dev = (prime3c_t *) priv; return dev->regs[dev->index]; } -void prime3c_fdc_handler(prime3c_t *dev) +void +prime3c_fdc_handler(prime3c_t *dev) { fdc_remove(dev->fdc_controller); - if (FUNCTION_SELECT & 0x10) - { + if (FUNCTION_SELECT & 0x10) { fdc_set_base(dev->fdc_controller, FDC_BASE_ADDRESS << 2); fdc_set_irq(dev->fdc_controller, (FDC_LPT_IRQ >> 4) & 0xf); fdc_set_dma_ch(dev->fdc_controller, (FDC_LPT_DMA >> 4) & 0xf); @@ -216,21 +212,21 @@ void prime3c_fdc_handler(prime3c_t *dev) } } -void prime3c_uart_handler(uint8_t num, prime3c_t *dev) +void +prime3c_uart_handler(uint8_t num, prime3c_t *dev) { serial_remove(dev->uart[num & 1]); - if (FUNCTION_SELECT & (!(num & 1) ? 0x04 : 0x08)) - { + if (FUNCTION_SELECT & (!(num & 1) ? 0x04 : 0x08)) { serial_setup(dev->uart[num & 1], (!(num & 1) ? UART1_BASE_ADDRESS : UART2_BASE_ADDRESS) << 2, (UART_IRQ >> (!(num & 1) ? 4 : 0)) & 0xf); prime3c_log("Prime3C-UART%01x: BASE %04x IRQ %01x\n", num & 1, (!(num & 1) ? UART1_BASE_ADDRESS : UART2_BASE_ADDRESS) << 2, (UART_IRQ >> (!(num & 1) ? 4 : 0)) & 0xf); } } -void prime3c_lpt_handler(prime3c_t *dev) +void +prime3c_lpt_handler(prime3c_t *dev) { lpt1_remove(); - if (!(FUNCTION_SELECT & 0x03)) - { + if (!(FUNCTION_SELECT & 0x03)) { lpt1_init(LPT_BASE_ADDRESS << 2); lpt1_irq(FDC_LPT_IRQ & 0xf); @@ -238,11 +234,11 @@ void prime3c_lpt_handler(prime3c_t *dev) } } -void prime3c_ide_handler(prime3c_t *dev) +void +prime3c_ide_handler(prime3c_t *dev) { ide_pri_disable(); - if (FUNCTION_SELECT & 0x20) - { + if (FUNCTION_SELECT & 0x20) { ide_set_base(0, IDE_BASE_ADDRESS << 2); ide_set_side(0, IDE_SIDE_ADDRESS << 2); ide_pri_enable(); @@ -250,35 +246,36 @@ void prime3c_ide_handler(prime3c_t *dev) } } -void prime3c_enable(prime3c_t *dev) +void +prime3c_enable(prime3c_t *dev) { -/* -Simulate a device enable/disable scenario + /* + Simulate a device enable/disable scenario -Register C2: Function Select -Bit 7: Gameport -Bit 6: Reserved -Bit 5: IDE -Bit 4: FDC -Bit 3: UART 2 -Bit 2: UART 1 -Bit 1/0: PIO (0/0 Unidirectional , 0/1 ECP, 1/0 EPP, 1/1 Disabled) + Register C2: Function Select + Bit 7: Gameport + Bit 6: Reserved + Bit 5: IDE + Bit 4: FDC + Bit 3: UART 2 + Bit 2: UART 1 + Bit 1/0: PIO (0/0 Unidirectional , 0/1 ECP, 1/0 EPP, 1/1 Disabled) -Note: 86Box LPT is simplistic and can't do ECP or EPP. -*/ + Note: 86Box LPT is simplistic and can't do ECP or EPP. + */ -!(FUNCTION_SELECT & 0x03) ? prime3c_lpt_handler(dev) : lpt1_remove(); -(FUNCTION_SELECT & 0x04) ? prime3c_uart_handler(0, dev) : serial_remove(dev->uart[0]); -(FUNCTION_SELECT & 0x08) ? prime3c_uart_handler(1, dev) : serial_remove(dev->uart[1]); -(FUNCTION_SELECT & 0x10) ? prime3c_fdc_handler(dev) : fdc_remove(dev->fdc_controller); -if (HAS_IDE_FUNCTIONALITY) - (FUNCTION_SELECT & 0x20) ? prime3c_ide_handler(dev) : ide_pri_disable(); + !(FUNCTION_SELECT & 0x03) ? prime3c_lpt_handler(dev) : lpt1_remove(); + (FUNCTION_SELECT & 0x04) ? prime3c_uart_handler(0, dev) : serial_remove(dev->uart[0]); + (FUNCTION_SELECT & 0x08) ? prime3c_uart_handler(1, dev) : serial_remove(dev->uart[1]); + (FUNCTION_SELECT & 0x10) ? prime3c_fdc_handler(dev) : fdc_remove(dev->fdc_controller); + if (HAS_IDE_FUNCTIONALITY) + (FUNCTION_SELECT & 0x20) ? prime3c_ide_handler(dev) : ide_pri_disable(); } static void prime3c_close(void *priv) { - prime3c_t *dev = (prime3c_t *)priv; + prime3c_t *dev = (prime3c_t *) priv; free(dev); } @@ -286,7 +283,7 @@ prime3c_close(void *priv) static void * prime3c_init(const device_t *info) { - prime3c_t *dev = (prime3c_t *)malloc(sizeof(prime3c_t)); + prime3c_t *dev = (prime3c_t *) malloc(sizeof(prime3c_t)); memset(dev, 0, sizeof(prime3c_t)); /* Avoid conflicting with machines that make no use of the Prime3C Internal IDE */ @@ -300,8 +297,8 @@ prime3c_init(const device_t *info) dev->regs[0xd5] = 0x3c; dev->fdc_controller = device_add(&fdc_at_device); - dev->uart[0] = device_add_inst(&ns16550_device, 1); - dev->uart[1] = device_add_inst(&ns16550_device, 2); + dev->uart[0] = device_add_inst(&ns16550_device, 1); + dev->uart[1] = device_add_inst(&ns16550_device, 2); if (HAS_IDE_FUNCTIONALITY) device_add(&ide_isa_device); @@ -318,29 +315,29 @@ prime3c_init(const device_t *info) } const device_t prime3c_device = { - .name = "Goldstar Prime3C", + .name = "Goldstar Prime3C", .internal_name = "prime3c", - .flags = 0, - .local = 0, - .init = prime3c_init, - .close = prime3c_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = prime3c_init, + .close = prime3c_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t prime3c_ide_device = { - .name = "Goldstar Prime3C with IDE functionality", + .name = "Goldstar Prime3C with IDE functionality", .internal_name = "prime3c_ide", - .flags = 0, - .local = 1, - .init = prime3c_init, - .close = prime3c_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = prime3c_init, + .close = prime3c_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_um8669f.c b/src/sio/sio_um8669f.c index aece09fe6..954e7c45c 100644 --- a/src/sio/sio_um8669f.c +++ b/src/sio/sio_um8669f.c @@ -38,33 +38,32 @@ #include <86box/sio.h> #include <86box/isapnp.h> - /* This ROM was reconstructed out of many assumptions, some of which based on the IT8671F. */ static uint8_t um8669f_pnp_rom[] = { 0x55, 0xa3, 0x86, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, /* UMC8669, dummy checksum (filled in by isapnp_add_card) */ - 0x0a, 0x10, 0x10, /* PnP version 1.0, vendor version 1.0 */ + 0x0a, 0x10, 0x10, /* PnP version 1.0, vendor version 1.0 */ - 0x15, 0x41, 0xd0, 0x07, 0x00, 0x01, /* logical device PNP0700, can participate in boot */ - 0x22, 0xfa, 0x1f, /* IRQ 1/3/4/5/6/7/8/9/10/11/12 */ - 0x2a, 0x0f, 0x0c, /* DMA 0/1/2/3, compatibility, no count by word, count by byte, is bus master, 8-bit only */ - 0x47, 0x00, 0x00, 0x01, 0xf8, 0x03, 0x08, 0x08, /* I/O 0x100-0x3F8, decodes 10-bit, 8-byte alignment, 8 addresses */ + 0x15, 0x41, 0xd0, 0x07, 0x00, 0x01, /* logical device PNP0700, can participate in boot */ + 0x22, 0xfa, 0x1f, /* IRQ 1/3/4/5/6/7/8/9/10/11/12 */ + 0x2a, 0x0f, 0x0c, /* DMA 0/1/2/3, compatibility, no count by word, count by byte, is bus master, 8-bit only */ + 0x47, 0x00, 0x00, 0x01, 0xf8, 0x03, 0x08, 0x08, /* I/O 0x100-0x3F8, decodes 10-bit, 8-byte alignment, 8 addresses */ - 0x15, 0x41, 0xd0, 0x05, 0x01, 0x01, /* logical device PNP0501, can participate in boot */ - 0x22, 0xfa, 0x1f, /* IRQ 1/3/4/5/6/7/8/9/10/11/12 */ - 0x47, 0x00, 0x00, 0x01, 0xf8, 0x03, 0x08, 0x08, /* I/O 0x100-0x3F8, decodes 10-bit, 8-byte alignment, 8 addresses */ + 0x15, 0x41, 0xd0, 0x05, 0x01, 0x01, /* logical device PNP0501, can participate in boot */ + 0x22, 0xfa, 0x1f, /* IRQ 1/3/4/5/6/7/8/9/10/11/12 */ + 0x47, 0x00, 0x00, 0x01, 0xf8, 0x03, 0x08, 0x08, /* I/O 0x100-0x3F8, decodes 10-bit, 8-byte alignment, 8 addresses */ - 0x15, 0x41, 0xd0, 0x05, 0x01, 0x01, /* logical device PNP0501, can participate in boot */ - 0x22, 0xfa, 0x1f, /* IRQ 1/3/4/5/6/7/8/9/10/11/12 */ - 0x47, 0x00, 0x00, 0x01, 0xf8, 0x03, 0x08, 0x08, /* I/O 0x100-0x3F8, decodes 10-bit, 8-byte alignment, 8 addresses */ + 0x15, 0x41, 0xd0, 0x05, 0x01, 0x01, /* logical device PNP0501, can participate in boot */ + 0x22, 0xfa, 0x1f, /* IRQ 1/3/4/5/6/7/8/9/10/11/12 */ + 0x47, 0x00, 0x00, 0x01, 0xf8, 0x03, 0x08, 0x08, /* I/O 0x100-0x3F8, decodes 10-bit, 8-byte alignment, 8 addresses */ - 0x15, 0x41, 0xd0, 0x04, 0x00, 0x01, /* logical device PNP0400, can participate in boot */ - 0x22, 0xfa, 0x1f, /* IRQ 1/3/4/5/6/7/8/9/10/11/12 */ - 0x47, 0x00, 0x00, 0x01, 0xf8, 0x03, 0x08, 0x08, /* I/O 0x100-0x3F8, decodes 10-bit, 8-byte alignment, 8 addresses */ + 0x15, 0x41, 0xd0, 0x04, 0x00, 0x01, /* logical device PNP0400, can participate in boot */ + 0x22, 0xfa, 0x1f, /* IRQ 1/3/4/5/6/7/8/9/10/11/12 */ + 0x47, 0x00, 0x00, 0x01, 0xf8, 0x03, 0x08, 0x08, /* I/O 0x100-0x3F8, decodes 10-bit, 8-byte alignment, 8 addresses */ 0x15, 0x41, 0xd0, 0xff, 0xff, 0x00, /* logical device PNPFFFF (just a dummy to create a gap in LDNs) */ - 0x15, 0x41, 0xd0, 0xb0, 0x2f, 0x01, /* logical device PNPB02F, can participate in boot */ - 0x47, 0x00, 0x00, 0x01, 0xf8, 0x03, 0x08, 0x08, /* I/O 0x100-0x3F8, decodes 10-bit, 8-byte alignment, 8 addresses */ + 0x15, 0x41, 0xd0, 0xb0, 0x2f, 0x01, /* logical device PNPB02F, can participate in boot */ + 0x47, 0x00, 0x00, 0x01, 0xf8, 0x03, 0x08, 0x08, /* I/O 0x100-0x3F8, decodes 10-bit, 8-byte alignment, 8 addresses */ 0x79, 0x00 /* end tag, dummy checksum (filled in by isapnp_add_card) */ }; @@ -94,106 +93,100 @@ static const isapnp_device_config_t um8669f_pnp_defaults[] = { } }; - #ifdef ENABLE_UM8669F_LOG int um8669f_do_log = ENABLE_UM8669F_LOG; - static void um8669f_log(const char *fmt, ...) { va_list ap; if (um8669f_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define um8669f_log(fmt, ...) +# define um8669f_log(fmt, ...) #endif - -typedef struct um8669f_t -{ - int locked, cur_reg_108; - void *pnp_card; +typedef struct um8669f_t { + int locked, cur_reg_108; + void *pnp_card; isapnp_device_config_t *pnp_config[5]; - uint8_t regs_108[256]; + uint8_t regs_108[256]; - fdc_t *fdc; - serial_t *uart[2]; - void *gameport; + fdc_t *fdc; + serial_t *uart[2]; + void *gameport; } um8669f_t; - static void um8669f_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv) { if (ld > 5) { - um8669f_log("UM8669F: Unknown logical device %d\n", ld); - return; + um8669f_log("UM8669F: Unknown logical device %d\n", ld); + return; } um8669f_t *dev = (um8669f_t *) priv; switch (ld) { - case 0: - fdc_remove(dev->fdc); + case 0: + fdc_remove(dev->fdc); - if (config->activate) { - um8669f_log("UM8669F: FDC enabled at port %04X IRQ %d DMA %d\n", config->io[0].base, config->irq[0].irq, (config->dma[0].dma == ISAPNP_DMA_DISABLED) ? -1 : config->dma[0].dma); + if (config->activate) { + um8669f_log("UM8669F: FDC enabled at port %04X IRQ %d DMA %d\n", config->io[0].base, config->irq[0].irq, (config->dma[0].dma == ISAPNP_DMA_DISABLED) ? -1 : config->dma[0].dma); - if (config->io[0].base != ISAPNP_IO_DISABLED) - fdc_set_base(dev->fdc, config->io[0].base); + if (config->io[0].base != ISAPNP_IO_DISABLED) + fdc_set_base(dev->fdc, config->io[0].base); - fdc_set_irq(dev->fdc, config->irq[0].irq); - fdc_set_dma_ch(dev->fdc, (config->dma[0].dma == ISAPNP_DMA_DISABLED) ? -1 : config->dma[0].dma); - } else { - um8669f_log("UM8669F: FDC disabled\n"); - } + fdc_set_irq(dev->fdc, config->irq[0].irq); + fdc_set_dma_ch(dev->fdc, (config->dma[0].dma == ISAPNP_DMA_DISABLED) ? -1 : config->dma[0].dma); + } else { + um8669f_log("UM8669F: FDC disabled\n"); + } - break; + break; - case 1: - case 2: - serial_remove(dev->uart[ld - 1]); + case 1: + case 2: + serial_remove(dev->uart[ld - 1]); - if (config->activate && (config->io[0].base != ISAPNP_IO_DISABLED)) { - um8669f_log("UM8669F: UART %d enabled at port %04X IRQ %d\n", ld - 1, config->io[0].base, config->irq[0].irq); - serial_setup(dev->uart[ld - 1], config->io[0].base, config->irq[0].irq); - } else { - um8669f_log("UM8669F: UART %d disabled\n", ld - 1); - } + if (config->activate && (config->io[0].base != ISAPNP_IO_DISABLED)) { + um8669f_log("UM8669F: UART %d enabled at port %04X IRQ %d\n", ld - 1, config->io[0].base, config->irq[0].irq); + serial_setup(dev->uart[ld - 1], config->io[0].base, config->irq[0].irq); + } else { + um8669f_log("UM8669F: UART %d disabled\n", ld - 1); + } - break; + break; - case 3: - lpt1_remove(); + case 3: + lpt1_remove(); - if (config->activate && (config->io[0].base != ISAPNP_IO_DISABLED)) { - um8669f_log("UM8669F: LPT enabled at port %04X IRQ %d\n", config->io[0].base, config->irq[0].irq); - lpt1_init(config->io[0].base); - } else { - um8669f_log("UM8669F: LPT disabled\n"); - } + if (config->activate && (config->io[0].base != ISAPNP_IO_DISABLED)) { + um8669f_log("UM8669F: LPT enabled at port %04X IRQ %d\n", config->io[0].base, config->irq[0].irq); + lpt1_init(config->io[0].base); + } else { + um8669f_log("UM8669F: LPT disabled\n"); + } - break; + break; - case 5: - if (config->activate && (config->io[0].base != ISAPNP_IO_DISABLED)) { - um8669f_log("UM8669F: Game port enabled at port %04X\n", config->io[0].base); - gameport_remap(dev->gameport, config->io[0].base); - } else { - um8669f_log("UM8669F: Game port disabled\n"); - gameport_remap(dev->gameport, 0); - } + case 5: + if (config->activate && (config->io[0].base != ISAPNP_IO_DISABLED)) { + um8669f_log("UM8669F: Game port enabled at port %04X\n", config->io[0].base); + gameport_remap(dev->gameport, config->io[0].base); + } else { + um8669f_log("UM8669F: Game port disabled\n"); + gameport_remap(dev->gameport, 0); + } } } - void um8669f_write(uint16_t port, uint8_t val, void *priv) { @@ -202,37 +195,36 @@ um8669f_write(uint16_t port, uint8_t val, void *priv) um8669f_log("UM8669F: write(%04X, %02X)\n", port, val); if (dev->locked) { - if ((port == 0x108) && (val == 0xaa)) - dev->locked = 0; + if ((port == 0x108) && (val == 0xaa)) + dev->locked = 0; } else { - if (port == 0x108) { - if (val == 0x55) - dev->locked = 1; - else - dev->cur_reg_108 = val; - } else { - dev->regs_108[dev->cur_reg_108] = val; + if (port == 0x108) { + if (val == 0x55) + dev->locked = 1; + else + dev->cur_reg_108 = val; + } else { + dev->regs_108[dev->cur_reg_108] = val; - if (dev->cur_reg_108 == 0xc1) { - um8669f_log("UM8669F: ISAPnP %sabled\n", (val & 0x80) ? "en" : "dis"); - isapnp_enable_card(dev->pnp_card, (val & 0x80) ? ISAPNP_CARD_FORCE_CONFIG : ISAPNP_CARD_DISABLE); - } - } + if (dev->cur_reg_108 == 0xc1) { + um8669f_log("UM8669F: ISAPnP %sabled\n", (val & 0x80) ? "en" : "dis"); + isapnp_enable_card(dev->pnp_card, (val & 0x80) ? ISAPNP_CARD_FORCE_CONFIG : ISAPNP_CARD_DISABLE); + } + } } } - uint8_t um8669f_read(uint16_t port, void *priv) { um8669f_t *dev = (um8669f_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (!dev->locked) { - if (port == 0x108) - ret = dev->cur_reg_108; /* ??? */ - else - ret = dev->regs_108[dev->cur_reg_108]; + if (port == 0x108) + ret = dev->cur_reg_108; /* ??? */ + else + ret = dev->regs_108[dev->cur_reg_108]; } um8669f_log("UM8669F: read(%04X) = %02X\n", port, ret); @@ -240,7 +232,6 @@ um8669f_read(uint16_t port, void *priv) return ret; } - void um8669f_reset(um8669f_t *dev) { @@ -261,7 +252,6 @@ um8669f_reset(um8669f_t *dev) isapnp_reset_card(dev->pnp_card); } - static void um8669f_close(void *priv) { @@ -272,7 +262,6 @@ um8669f_close(void *priv) free(dev); } - static void * um8669f_init(const device_t *info) { @@ -283,7 +272,7 @@ um8669f_init(const device_t *info) dev->pnp_card = isapnp_add_card(um8669f_pnp_rom, sizeof(um8669f_pnp_rom), um8669f_pnp_config_changed, NULL, NULL, NULL, dev); for (uint8_t i = 0; i < (sizeof(um8669f_pnp_defaults) / sizeof(isapnp_device_config_t)); i++) - isapnp_set_device_defaults(dev->pnp_card, i, &um8669f_pnp_defaults[i]); + isapnp_set_device_defaults(dev->pnp_card, i, &um8669f_pnp_defaults[i]); dev->fdc = device_add(&fdc_at_smc_device); @@ -293,24 +282,23 @@ um8669f_init(const device_t *info) dev->gameport = gameport_add(&gameport_sio_device); io_sethandler(0x0108, 0x0002, - um8669f_read, NULL, NULL, um8669f_write, NULL, NULL, dev); + um8669f_read, NULL, NULL, um8669f_write, NULL, NULL, dev); um8669f_reset(dev); return dev; } - const device_t um8669f_device = { - .name = "UMC UM8669F Super I/O", + .name = "UMC UM8669F Super I/O", .internal_name = "um8669f", - .flags = 0, - .local = 0, - .init = um8669f_init, - .close = um8669f_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = um8669f_init, + .close = um8669f_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_vt82c686.c b/src/sio/sio_vt82c686.c index 8d242165e..b8047a192 100644 --- a/src/sio/sio_vt82c686.c +++ b/src/sio/sio_vt82c686.c @@ -32,27 +32,24 @@ #include <86box/fdc.h> #include <86box/sio.h> - typedef struct { - uint8_t cur_reg, last_val, regs[25], - fdc_dma, fdc_irq, uart_irq[2], lpt_dma, lpt_irq; - fdc_t *fdc; - serial_t *uart[2]; + uint8_t cur_reg, last_val, regs[25], + fdc_dma, fdc_irq, uart_irq[2], lpt_dma, lpt_irq; + fdc_t *fdc; + serial_t *uart[2]; } vt82c686_t; - static uint8_t get_lpt_length(vt82c686_t *dev) { uint8_t length = 4; /* non-EPP */ if ((dev->regs[0x02] & 0x03) == 0x02) - length = 8; /* EPP */ + length = 8; /* EPP */ return length; } - static void vt82c686_fdc_handler(vt82c686_t *dev) { @@ -61,47 +58,44 @@ vt82c686_fdc_handler(vt82c686_t *dev) fdc_remove(dev->fdc); if (dev->regs[0x02] & 0x10) - fdc_set_base(dev->fdc, io_base); + fdc_set_base(dev->fdc, io_base); fdc_set_dma_ch(dev->fdc, dev->fdc_dma); fdc_set_irq(dev->fdc, dev->fdc_irq); fdc_set_swap(dev->fdc, dev->regs[0x16] & 0x01); } - static void vt82c686_lpt_handler(vt82c686_t *dev) { uint16_t io_mask, io_base = dev->regs[0x06] << 2; - int io_len = get_lpt_length(dev); + int io_len = get_lpt_length(dev); io_base &= (0xff8 | io_len); io_mask = 0x3fc; /* non-EPP */ if (io_len == 8) - io_mask = 0x3f8; /* EPP */ + io_mask = 0x3f8; /* EPP */ lpt1_remove(); if (((dev->regs[0x02] & 0x03) != 0x03) && (io_base >= 0x100) && (io_base <= io_mask)) - lpt1_init(io_base); + lpt1_init(io_base); if (dev->lpt_irq) { - lpt1_irq(dev->lpt_irq); + lpt1_irq(dev->lpt_irq); } else { - lpt1_irq(0xff); + lpt1_irq(0xff); } } - static void vt82c686_serial_handler(vt82c686_t *dev, int uart) { serial_remove(dev->uart[uart]); if (dev->regs[0x02] & (0x04 << uart)) - serial_setup(dev->uart[uart], dev->regs[0x07 + uart] << 2, dev->uart_irq[uart]); + serial_setup(dev->uart[uart], dev->regs[0x07 + uart] << 2, dev->uart_irq[uart]); } - static void vt82c686_write(uint16_t port, uint8_t val, void *priv) { @@ -112,86 +106,87 @@ vt82c686_write(uint16_t port, uint8_t val, void *priv) /* Write current register index on port 0. */ if (!(port & 1)) { - dev->cur_reg = val; - return; + dev->cur_reg = val; + return; } /* NOTE: Registers are [0xE0:0xF8] but we store them as [0x00:0x18]. */ if ((dev->cur_reg < 0xe0) || (dev->cur_reg > 0xf8)) - return; + return; uint8_t reg = dev->cur_reg & 0x1f; /* Read-only registers. */ if ((reg < 0x02) || (reg == 0x0c)) - return; + return; /* Write current register value on port 1. */ dev->regs[reg] = val; /* Update device state. */ switch (reg) { - case 0x02: - dev->regs[reg] &= 0xbf; - vt82c686_lpt_handler(dev); - vt82c686_serial_handler(dev, 0); - vt82c686_serial_handler(dev, 1); - vt82c686_fdc_handler(dev); - break; + case 0x02: + dev->regs[reg] &= 0xbf; + vt82c686_lpt_handler(dev); + vt82c686_serial_handler(dev, 0); + vt82c686_serial_handler(dev, 1); + vt82c686_fdc_handler(dev); + break; - case 0x03: - dev->regs[reg] &= 0xfc; - vt82c686_fdc_handler(dev); - break; + case 0x03: + dev->regs[reg] &= 0xfc; + vt82c686_fdc_handler(dev); + break; - case 0x04: - dev->regs[reg] &= 0xfc; - break; + case 0x04: + dev->regs[reg] &= 0xfc; + break; - case 0x05: - dev->regs[reg] |= 0x03; - break; + case 0x05: + dev->regs[reg] |= 0x03; + break; - case 0x06: - vt82c686_lpt_handler(dev); - break; + case 0x06: + vt82c686_lpt_handler(dev); + break; - case 0x07: case 0x08: - dev->regs[reg] &= 0xfe; - vt82c686_serial_handler(dev, reg == 0x08); - break; + case 0x07: + case 0x08: + dev->regs[reg] &= 0xfe; + vt82c686_serial_handler(dev, reg == 0x08); + break; - case 0x0d: - dev->regs[reg] &= 0x0f; - break; + case 0x0d: + dev->regs[reg] &= 0x0f; + break; - case 0x0f: - dev->regs[reg] &= 0x7f; - break; + case 0x0f: + dev->regs[reg] &= 0x7f; + break; - case 0x10: - dev->regs[reg] &= 0xf4; - break; + case 0x10: + dev->regs[reg] &= 0xf4; + break; - case 0x11: - dev->regs[reg] &= 0x3f; - break; + case 0x11: + dev->regs[reg] &= 0x3f; + break; - case 0x13: - dev->regs[reg] &= 0xfb; - break; + case 0x13: + dev->regs[reg] &= 0xfb; + break; - case 0x14: case 0x17: - dev->regs[reg] &= 0xfe; - break; + case 0x14: + case 0x17: + dev->regs[reg] &= 0xfe; + break; - case 0x16: - dev->regs[reg] &= 0xf7; - vt82c686_fdc_handler(dev); - break; + case 0x16: + dev->regs[reg] &= 0xf7; + vt82c686_fdc_handler(dev); + break; } } - static uint8_t vt82c686_read(uint16_t port, void *priv) { @@ -201,14 +196,13 @@ vt82c686_read(uint16_t port, void *priv) Real 686B echoes the last read/written value when reading from registers outside that range. */ if (!(port & 1)) - dev->last_val = dev->cur_reg; + dev->last_val = dev->cur_reg; else if ((dev->cur_reg >= 0xe0) && (dev->cur_reg <= 0xf8)) - dev->last_val = dev->regs[dev->cur_reg & 0x1f]; + dev->last_val = dev->regs[dev->cur_reg & 0x1f]; return dev->last_val; } - /* Writes to Super I/O-related configuration space registers of the VT82C686 PCI-ISA bridge are sent here by via_pipc.c */ void @@ -217,36 +211,35 @@ vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv) vt82c686_t *dev = (vt82c686_t *) priv; switch (addr) { - case 0x50: - dev->fdc_dma = val & 0x03; - vt82c686_fdc_handler(dev); - dev->lpt_dma = (val >> 2) & 0x03; - vt82c686_lpt_handler(dev); - break; + case 0x50: + dev->fdc_dma = val & 0x03; + vt82c686_fdc_handler(dev); + dev->lpt_dma = (val >> 2) & 0x03; + vt82c686_lpt_handler(dev); + break; - case 0x51: - dev->fdc_irq = val & 0x0f; - vt82c686_fdc_handler(dev); - dev->lpt_irq = val >> 4; - vt82c686_lpt_handler(dev); - break; + case 0x51: + dev->fdc_irq = val & 0x0f; + vt82c686_fdc_handler(dev); + dev->lpt_irq = val >> 4; + vt82c686_lpt_handler(dev); + break; - case 0x52: - dev->uart_irq[0] = val & 0x0f; - vt82c686_serial_handler(dev, 0); - dev->uart_irq[1] = val >> 4; - vt82c686_serial_handler(dev, 1); - break; + case 0x52: + dev->uart_irq[0] = val & 0x0f; + vt82c686_serial_handler(dev, 0); + dev->uart_irq[1] = val >> 4; + vt82c686_serial_handler(dev, 1); + break; - case 0x85: - io_removehandler(FDC_PRIMARY_ADDR, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev); - if (val & 0x02) - io_sethandler(FDC_PRIMARY_ADDR, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev); - break; + case 0x85: + io_removehandler(FDC_PRIMARY_ADDR, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev); + if (val & 0x02) + io_sethandler(FDC_PRIMARY_ADDR, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev); + break; } } - static void vt82c686_reset(vt82c686_t *dev) { @@ -272,7 +265,6 @@ vt82c686_reset(vt82c686_t *dev) vt82c686_sio_write(0x85, 0x00, dev); } - static void vt82c686_close(void *priv) { @@ -281,14 +273,13 @@ vt82c686_close(void *priv) free(dev); } - static void * vt82c686_init(const device_t *info) { vt82c686_t *dev = (vt82c686_t *) malloc(sizeof(vt82c686_t)); memset(dev, 0, sizeof(vt82c686_t)); - dev->fdc = device_add(&fdc_at_smc_device); + dev->fdc = device_add(&fdc_at_smc_device); dev->fdc_dma = 2; dev->uart[0] = device_add_inst(&ns16550_device, 1); @@ -301,17 +292,16 @@ vt82c686_init(const device_t *info) return dev; } - const device_t via_vt82c686_sio_device = { - .name = "VIA VT82C686 Integrated Super I/O", + .name = "VIA VT82C686 Integrated Super I/O", .internal_name = "via_vt82c686_sio", - .flags = 0, - .local = 0, - .init = vt82c686_init, - .close = vt82c686_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = vt82c686_init, + .close = vt82c686_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_w83787f.c b/src/sio/sio_w83787f.c index 393ab5fd9..fd26cde0c 100644 --- a/src/sio/sio_w83787f.c +++ b/src/sio/sio_w83787f.c @@ -44,64 +44,60 @@ w83787_log(const char *fmt, ...) { va_list ap; - if (w83787_do_log) - { + if (w83787_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -#define w83787_log(fmt, ...) +# define w83787_log(fmt, ...) #endif -#define FDDA_TYPE (dev->regs[7] & 3) -#define FDDB_TYPE ((dev->regs[7] >> 2) & 3) -#define FDDC_TYPE ((dev->regs[7] >> 4) & 3) -#define FDDD_TYPE ((dev->regs[7] >> 6) & 3) +#define FDDA_TYPE (dev->regs[7] & 3) +#define FDDB_TYPE ((dev->regs[7] >> 2) & 3) +#define FDDC_TYPE ((dev->regs[7] >> 4) & 3) +#define FDDD_TYPE ((dev->regs[7] >> 6) & 3) -#define FD_BOOT (dev->regs[8] & 3) -#define SWWP ((dev->regs[8] >> 4) & 1) -#define DISFDDWR ((dev->regs[8] >> 5) & 1) +#define FD_BOOT (dev->regs[8] & 3) +#define SWWP ((dev->regs[8] >> 4) & 1) +#define DISFDDWR ((dev->regs[8] >> 5) & 1) -#define EN3MODE ((dev->regs[9] >> 5) & 1) +#define EN3MODE ((dev->regs[9] >> 5) & 1) -#define DRV2EN_NEG (dev->regs[0xB] & 1) /* 0 = drive 2 installed */ -#define INVERTZ ((dev->regs[0xB] >> 1) & 1) /* 0 = invert DENSEL polarity */ -#define IDENT ((dev->regs[0xB] >> 3) & 1) +#define DRV2EN_NEG (dev->regs[0xB] & 1) /* 0 = drive 2 installed */ +#define INVERTZ ((dev->regs[0xB] >> 1) & 1) /* 0 = invert DENSEL polarity */ +#define IDENT ((dev->regs[0xB] >> 3) & 1) -#define HEFERE ((dev->regs[0xC] >> 5) & 1) +#define HEFERE ((dev->regs[0xC] >> 5) & 1) -#define HAS_IDE_FUNCTIONALITY dev->ide_function +#define HAS_IDE_FUNCTIONALITY dev->ide_function typedef struct { - uint8_t tries, regs[42]; + uint8_t tries, regs[42]; uint16_t reg_init; - int locked, rw_locked, - cur_reg, - key, ide_function, - ide_start; - fdc_t *fdc; + int locked, rw_locked, + cur_reg, + key, ide_function, + ide_start; + fdc_t *fdc; serial_t *uart[2]; - void *gameport; + void *gameport; } w83787f_t; - -static void w83787f_write(uint16_t port, uint8_t val, void *priv); -static uint8_t w83787f_read(uint16_t port, void *priv); - +static void w83787f_write(uint16_t port, uint8_t val, void *priv); +static uint8_t w83787f_read(uint16_t port, void *priv); static void w83787f_remap(w83787f_t *dev) { io_removehandler(0x250, 0x0004, - w83787f_read, NULL, NULL, w83787f_write, NULL, NULL, dev); + w83787f_read, NULL, NULL, w83787f_write, NULL, NULL, dev); io_sethandler(0x250, 0x0004, - w83787f_read, NULL, NULL, w83787f_write, NULL, NULL, dev); + w83787f_read, NULL, NULL, w83787f_write, NULL, NULL, dev); dev->key = 0x88 | HEFERE; } - #ifdef FIXME /* FIXME: Implement EPP (and ECP) parallel port modes. */ static uint8_t @@ -110,269 +106,261 @@ get_lpt_length(w83787f_t *dev) uint8_t length = 4; if (dev->regs[9] & 0x80) { - if (dev->regs[0] & 0x04) - length = 8; /* EPP mode. */ - if (dev->regs[0] & 0x08) - length |= 0x80; /* ECP mode. */ + if (dev->regs[0] & 0x04) + length = 8; /* EPP mode. */ + if (dev->regs[0] & 0x08) + length |= 0x80; /* ECP mode. */ } return length; } #endif - static void w83787f_serial_handler(w83787f_t *dev, int uart) { - int urs0 = !!(dev->regs[1] & (1 << uart)); - int urs1 = !!(dev->regs[1] & (4 << uart)); - int urs2 = !!(dev->regs[3] & (8 >> uart)); - int urs, irq = COM1_IRQ; + int urs0 = !!(dev->regs[1] & (1 << uart)); + int urs1 = !!(dev->regs[1] & (4 << uart)); + int urs2 = !!(dev->regs[3] & (8 >> uart)); + int urs, irq = COM1_IRQ; uint16_t addr = COM1_ADDR, enable = 1; urs = (urs1 << 1) | urs0; if (urs2) { - addr = uart ? COM1_ADDR : COM2_ADDR; - irq = uart ? COM1_IRQ : COM2_IRQ; + addr = uart ? COM1_ADDR : COM2_ADDR; + irq = uart ? COM1_IRQ : COM2_IRQ; } else { - switch (urs) { - case 0: - addr = uart ? COM3_ADDR : COM4_ADDR; - irq = uart ? COM3_IRQ : COM4_IRQ; - break; - case 1: - addr = uart ? COM4_ADDR : COM3_ADDR; - irq = uart ? COM4_IRQ : COM3_IRQ; - break; - case 2: - addr = uart ? COM2_ADDR : COM1_ADDR; - irq = uart ? COM2_IRQ : COM1_IRQ; - break; - case 3: - default: - enable = 0; - break; - } + switch (urs) { + case 0: + addr = uart ? COM3_ADDR : COM4_ADDR; + irq = uart ? COM3_IRQ : COM4_IRQ; + break; + case 1: + addr = uart ? COM4_ADDR : COM3_ADDR; + irq = uart ? COM4_IRQ : COM3_IRQ; + break; + case 2: + addr = uart ? COM2_ADDR : COM1_ADDR; + irq = uart ? COM2_IRQ : COM1_IRQ; + break; + case 3: + default: + enable = 0; + break; + } } if (dev->regs[4] & (0x20 >> uart)) - enable = 0; + enable = 0; serial_remove(dev->uart[uart]); if (enable) - serial_setup(dev->uart[uart], addr, irq); + serial_setup(dev->uart[uart], addr, irq); } - static void w83787f_lpt_handler(w83787f_t *dev) { - int ptras = (dev->regs[1] >> 4) & 0x03; - int irq = LPT1_IRQ; + int ptras = (dev->regs[1] >> 4) & 0x03; + int irq = LPT1_IRQ; uint16_t addr = LPT1_ADDR, enable = 1; switch (ptras) { - case 0x00: - addr = LPT_MDA_ADDR; - irq = LPT_MDA_IRQ; - break; - case 0x01: - addr = LPT2_ADDR; - irq = LPT2_IRQ; - break; - case 0x02: - addr = LPT1_ADDR; - irq = LPT1_IRQ; - break; - case 0x03: - default: - enable = 0; - break; + case 0x00: + addr = LPT_MDA_ADDR; + irq = LPT_MDA_IRQ; + break; + case 0x01: + addr = LPT2_ADDR; + irq = LPT2_IRQ; + break; + case 0x02: + addr = LPT1_ADDR; + irq = LPT1_IRQ; + break; + case 0x03: + default: + enable = 0; + break; } if (dev->regs[4] & 0x80) - enable = 0; + enable = 0; lpt1_remove(); if (enable) { - lpt1_init(addr); - lpt1_irq(irq); + lpt1_init(addr); + lpt1_irq(irq); } } - static void w83787f_gameport_handler(w83787f_t *dev) { if (!(dev->regs[3] & 0x40) && !(dev->regs[4] & 0x40)) - gameport_remap(dev->gameport, 0x201); + gameport_remap(dev->gameport, 0x201); else - gameport_remap(dev->gameport, 0); + gameport_remap(dev->gameport, 0); } - static void w83787f_fdc_handler(w83787f_t *dev) { fdc_remove(dev->fdc); if (!(dev->regs[0] & 0x20) && !(dev->regs[6] & 0x08)) - fdc_set_base(dev->fdc, (dev->regs[0] & 0x10) ? FDC_PRIMARY_ADDR : FDC_SECONDARY_ADDR); + fdc_set_base(dev->fdc, (dev->regs[0] & 0x10) ? FDC_PRIMARY_ADDR : FDC_SECONDARY_ADDR); } - static void w83787f_ide_handler(w83787f_t *dev) { if (dev->ide_function & 0x20) { - ide_sec_disable(); - if (!(dev->regs[0] & 0x80)) { - ide_set_base(1, (dev->regs[0] & 0x40) ? 0x1f0 : 0x170); - ide_set_side(1, (dev->regs[0] & 0x40) ? 0x3f6 : 0x376); - ide_sec_enable(); - } + ide_sec_disable(); + if (!(dev->regs[0] & 0x80)) { + ide_set_base(1, (dev->regs[0] & 0x40) ? 0x1f0 : 0x170); + ide_set_side(1, (dev->regs[0] & 0x40) ? 0x3f6 : 0x376); + ide_sec_enable(); + } } else { - ide_pri_disable(); - if (!(dev->regs[0] & 0x80)) { - ide_set_base(0, (dev->regs[0] & 0x40) ? 0x1f0 : 0x170); - ide_set_side(0, (dev->regs[0] & 0x40) ? 0x3f6 : 0x376); - ide_pri_enable(); - } + ide_pri_disable(); + if (!(dev->regs[0] & 0x80)) { + ide_set_base(0, (dev->regs[0] & 0x40) ? 0x1f0 : 0x170); + ide_set_side(0, (dev->regs[0] & 0x40) ? 0x3f6 : 0x376); + ide_pri_enable(); + } } } - static void w83787f_write(uint16_t port, uint8_t val, void *priv) { - w83787f_t *dev = (w83787f_t *) priv; - uint8_t valxor = 0; - uint8_t max = 0x15; + w83787f_t *dev = (w83787f_t *) priv; + uint8_t valxor = 0; + uint8_t max = 0x15; if (port == 0x250) { - if (val == dev->key) - dev->locked = 1; - else - dev->locked = 0; - return; + if (val == dev->key) + dev->locked = 1; + else + dev->locked = 0; + return; } else if (port == 0x251) { - if (val <= max) - dev->cur_reg = val; - return; + if (val <= max) + dev->cur_reg = val; + return; } else { - if (dev->locked) { - if (dev->rw_locked) - return; - if (dev->cur_reg == 6) - val &= 0xF3; - valxor = val ^ dev->regs[dev->cur_reg]; - dev->regs[dev->cur_reg] = val; - } else - return; + if (dev->locked) { + if (dev->rw_locked) + return; + if (dev->cur_reg == 6) + val &= 0xF3; + valxor = val ^ dev->regs[dev->cur_reg]; + dev->regs[dev->cur_reg] = val; + } else + return; } switch (dev->cur_reg) { - case 0: - w83787_log("REG 00: %02X\n", val); - if ((valxor & 0xc0) && (HAS_IDE_FUNCTIONALITY)) - w83787f_ide_handler(dev); - if (valxor & 0x30) - w83787f_fdc_handler(dev); - if (valxor & 0x0c) - w83787f_lpt_handler(dev); - break; - case 1: - if (valxor & 0x80) - fdc_set_swap(dev->fdc, (dev->regs[1] & 0x80) ? 1 : 0); - if (valxor & 0x30) - w83787f_lpt_handler(dev); - if (valxor & 0x0a) - w83787f_serial_handler(dev, 1); - if (valxor & 0x05) - w83787f_serial_handler(dev, 0); - break; - case 3: - if (valxor & 0x80) - w83787f_lpt_handler(dev); - if (valxor & 0x40) - w83787f_gameport_handler(dev); - if (valxor & 0x08) - w83787f_serial_handler(dev, 0); - if (valxor & 0x04) - w83787f_serial_handler(dev, 1); - break; - case 4: - if (valxor & 0x10) - w83787f_serial_handler(dev, 1); - if (valxor & 0x20) - w83787f_serial_handler(dev, 0); - if (valxor & 0x80) - w83787f_lpt_handler(dev); - if (valxor & 0x40) - w83787f_gameport_handler(dev); - break; - case 6: - if (valxor & 0x08) - w83787f_fdc_handler(dev); - break; - case 7: - if (valxor & 0x03) - fdc_update_rwc(dev->fdc, 0, FDDA_TYPE); - if (valxor & 0x0c) - fdc_update_rwc(dev->fdc, 1, FDDB_TYPE); - if (valxor & 0x30) - fdc_update_rwc(dev->fdc, 2, FDDC_TYPE); - if (valxor & 0xc0) - fdc_update_rwc(dev->fdc, 3, FDDD_TYPE); - break; - case 8: - if (valxor & 0x03) - fdc_update_boot_drive(dev->fdc, FD_BOOT); - if (valxor & 0x10) - fdc_set_swwp(dev->fdc, SWWP ? 1 : 0); - if (valxor & 0x20) - fdc_set_diswr(dev->fdc, DISFDDWR ? 1 : 0); - break; - case 9: - if (valxor & 0x20) - fdc_update_enh_mode(dev->fdc, EN3MODE ? 1 : 0); - if (valxor & 0x40) - dev->rw_locked = (val & 0x40) ? 1 : 0; - if (valxor & 0x80) - w83787f_lpt_handler(dev); - break; - case 0xB: - w83787_log("Writing %02X to CRB\n", val); - break; - case 0xC: - if (valxor & 0x20) - w83787f_remap(dev); - break; + case 0: + w83787_log("REG 00: %02X\n", val); + if ((valxor & 0xc0) && (HAS_IDE_FUNCTIONALITY)) + w83787f_ide_handler(dev); + if (valxor & 0x30) + w83787f_fdc_handler(dev); + if (valxor & 0x0c) + w83787f_lpt_handler(dev); + break; + case 1: + if (valxor & 0x80) + fdc_set_swap(dev->fdc, (dev->regs[1] & 0x80) ? 1 : 0); + if (valxor & 0x30) + w83787f_lpt_handler(dev); + if (valxor & 0x0a) + w83787f_serial_handler(dev, 1); + if (valxor & 0x05) + w83787f_serial_handler(dev, 0); + break; + case 3: + if (valxor & 0x80) + w83787f_lpt_handler(dev); + if (valxor & 0x40) + w83787f_gameport_handler(dev); + if (valxor & 0x08) + w83787f_serial_handler(dev, 0); + if (valxor & 0x04) + w83787f_serial_handler(dev, 1); + break; + case 4: + if (valxor & 0x10) + w83787f_serial_handler(dev, 1); + if (valxor & 0x20) + w83787f_serial_handler(dev, 0); + if (valxor & 0x80) + w83787f_lpt_handler(dev); + if (valxor & 0x40) + w83787f_gameport_handler(dev); + break; + case 6: + if (valxor & 0x08) + w83787f_fdc_handler(dev); + break; + case 7: + if (valxor & 0x03) + fdc_update_rwc(dev->fdc, 0, FDDA_TYPE); + if (valxor & 0x0c) + fdc_update_rwc(dev->fdc, 1, FDDB_TYPE); + if (valxor & 0x30) + fdc_update_rwc(dev->fdc, 2, FDDC_TYPE); + if (valxor & 0xc0) + fdc_update_rwc(dev->fdc, 3, FDDD_TYPE); + break; + case 8: + if (valxor & 0x03) + fdc_update_boot_drive(dev->fdc, FD_BOOT); + if (valxor & 0x10) + fdc_set_swwp(dev->fdc, SWWP ? 1 : 0); + if (valxor & 0x20) + fdc_set_diswr(dev->fdc, DISFDDWR ? 1 : 0); + break; + case 9: + if (valxor & 0x20) + fdc_update_enh_mode(dev->fdc, EN3MODE ? 1 : 0); + if (valxor & 0x40) + dev->rw_locked = (val & 0x40) ? 1 : 0; + if (valxor & 0x80) + w83787f_lpt_handler(dev); + break; + case 0xB: + w83787_log("Writing %02X to CRB\n", val); + break; + case 0xC: + if (valxor & 0x20) + w83787f_remap(dev); + break; } } - static uint8_t w83787f_read(uint16_t port, void *priv) { w83787f_t *dev = (w83787f_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (dev->locked) { - if (port == 0x251) - ret = dev->cur_reg; - else if (port == 0x252) { - if (dev->cur_reg == 7) - ret = (fdc_get_rwc(dev->fdc, 0) | (fdc_get_rwc(dev->fdc, 1) << 2)); - else if (!dev->rw_locked) - ret = dev->regs[dev->cur_reg]; - } + if (port == 0x251) + ret = dev->cur_reg; + else if (port == 0x252) { + if (dev->cur_reg == 7) + ret = (fdc_get_rwc(dev->fdc, 0) | (fdc_get_rwc(dev->fdc, 1) << 2)); + else if (!dev->rw_locked) + ret = dev->regs[dev->cur_reg]; + } } return ret; } - static void w83787f_reset(w83787f_t *dev) { @@ -383,27 +371,27 @@ w83787f_reset(w83787f_t *dev) memset(dev->regs, 0, 0x2A); if (HAS_IDE_FUNCTIONALITY) { - if (dev->ide_function & 0x20) { - dev->regs[0x00] = 0x90; - ide_sec_disable(); - ide_set_base(1, 0x170); - ide_set_side(1, 0x376); - } else { - dev->regs[0x00] = 0xd0; - ide_pri_disable(); - ide_set_base(0, 0x1f0); - ide_set_side(0, 0x3f6); - } + if (dev->ide_function & 0x20) { + dev->regs[0x00] = 0x90; + ide_sec_disable(); + ide_set_base(1, 0x170); + ide_set_side(1, 0x376); + } else { + dev->regs[0x00] = 0xd0; + ide_pri_disable(); + ide_set_base(0, 0x1f0); + ide_set_side(0, 0x3f6); + } - if (dev->ide_start) { - dev->regs[0x00] &= 0x7f; - if (dev->ide_function & 0x20) - ide_sec_enable(); - else - ide_pri_enable(); - } + if (dev->ide_start) { + dev->regs[0x00] &= 0x7f; + if (dev->ide_function & 0x20) + ide_sec_enable(); + else + ide_pri_enable(); + } } else - dev->regs[0x00] = 0xd0; + dev->regs[0x00] = 0xd0; fdc_reset(dev->fdc); @@ -426,11 +414,10 @@ w83787f_reset(w83787f_t *dev) w83787f_remap(dev); - dev->locked = 0; + dev->locked = 0; dev->rw_locked = 0; } - static void w83787f_close(void *priv) { @@ -439,7 +426,6 @@ w83787f_close(void *priv) free(dev); } - static void * w83787f_init(const device_t *info) { @@ -456,7 +442,7 @@ w83787f_init(const device_t *info) dev->gameport = gameport_add(&gameport_sio_1io_device); if ((dev->ide_function & 0x30) == 0x10) - device_add(&ide_isa_device); + device_add(&ide_isa_device); dev->ide_start = !!(info->local & 0x40); @@ -467,57 +453,57 @@ w83787f_init(const device_t *info) } const device_t w83787f_device = { - .name = "Winbond W83787F/IF Super I/O", + .name = "Winbond W83787F/IF Super I/O", .internal_name = "w83787f", - .flags = 0, - .local = 0x09, - .init = w83787f_init, - .close = w83787f_close, - .reset = NULL, + .flags = 0, + .local = 0x09, + .init = w83787f_init, + .close = w83787f_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t w83787f_ide_device = { - .name = "Winbond W83787F/IF Super I/O (With IDE)", + .name = "Winbond W83787F/IF Super I/O (With IDE)", .internal_name = "w83787f_ide", - .flags = 0, - .local = 0x19, - .init = w83787f_init, - .close = w83787f_close, - .reset = NULL, + .flags = 0, + .local = 0x19, + .init = w83787f_init, + .close = w83787f_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t w83787f_ide_en_device = { - .name = "Winbond W83787F/IF Super I/O (With IDE Enabled)", + .name = "Winbond W83787F/IF Super I/O (With IDE Enabled)", .internal_name = "w83787f_ide_en", - .flags = 0, - .local = 0x59, - .init = w83787f_init, - .close = w83787f_close, - .reset = NULL, + .flags = 0, + .local = 0x59, + .init = w83787f_init, + .close = w83787f_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t w83787f_ide_sec_device = { - .name = "Winbond W83787F/IF Super I/O (With Secondary IDE)", + .name = "Winbond W83787F/IF Super I/O (With Secondary IDE)", .internal_name = "w83787f_ide_sec", - .flags = 0, - .local = 0x39, - .init = w83787f_init, - .close = w83787f_close, - .reset = NULL, + .flags = 0, + .local = 0x39, + .init = w83787f_init, + .close = w83787f_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_w83877f.c b/src/sio/sio_w83877f.c index 424414e01..28ab95f46 100644 --- a/src/sio/sio_w83877f.c +++ b/src/sio/sio_w83877f.c @@ -34,45 +34,41 @@ #include <86box/fdc.h> #include <86box/sio.h> +#define FDDA_TYPE (dev->regs[7] & 3) +#define FDDB_TYPE ((dev->regs[7] >> 2) & 3) +#define FDDC_TYPE ((dev->regs[7] >> 4) & 3) +#define FDDD_TYPE ((dev->regs[7] >> 6) & 3) -#define FDDA_TYPE (dev->regs[7] & 3) -#define FDDB_TYPE ((dev->regs[7] >> 2) & 3) -#define FDDC_TYPE ((dev->regs[7] >> 4) & 3) -#define FDDD_TYPE ((dev->regs[7] >> 6) & 3) +#define FD_BOOT (dev->regs[8] & 3) +#define SWWP ((dev->regs[8] >> 4) & 1) +#define DISFDDWR ((dev->regs[8] >> 5) & 1) -#define FD_BOOT (dev->regs[8] & 3) -#define SWWP ((dev->regs[8] >> 4) & 1) -#define DISFDDWR ((dev->regs[8] >> 5) & 1) +#define EN3MODE ((dev->regs[9] >> 5) & 1) -#define EN3MODE ((dev->regs[9] >> 5) & 1) +#define DRV2EN_NEG (dev->regs[0xB] & 1) /* 0 = drive 2 installed */ +#define INVERTZ ((dev->regs[0xB] >> 1) & 1) /* 0 = invert DENSEL polarity */ +#define IDENT ((dev->regs[0xB] >> 3) & 1) -#define DRV2EN_NEG (dev->regs[0xB] & 1) /* 0 = drive 2 installed */ -#define INVERTZ ((dev->regs[0xB] >> 1) & 1) /* 0 = invert DENSEL polarity */ -#define IDENT ((dev->regs[0xB] >> 3) & 1) +#define HEFERE ((dev->regs[0xC] >> 5) & 1) -#define HEFERE ((dev->regs[0xC] >> 5) & 1) - -#define HEFRAS (dev->regs[0x16] & 1) - -#define PRTIQS (dev->regs[0x27] & 0x0f) -#define ECPIRQ ((dev->regs[0x27] >> 5) & 0x07) +#define HEFRAS (dev->regs[0x16] & 1) +#define PRTIQS (dev->regs[0x27] & 0x0f) +#define ECPIRQ ((dev->regs[0x27] >> 5) & 0x07) typedef struct { - uint8_t tries, regs[42]; + uint8_t tries, regs[42]; uint16_t reg_init; - int locked, rw_locked, - cur_reg, - base_address, key, - key_times; - fdc_t *fdc; + int locked, rw_locked, + cur_reg, + base_address, key, + key_times; + fdc_t *fdc; serial_t *uart[2]; } w83877f_t; - -static void w83877f_write(uint16_t port, uint8_t val, void *priv); -static uint8_t w83877f_read(uint16_t port, void *priv); - +static void w83877f_write(uint16_t port, uint8_t val, void *priv); +static uint8_t w83877f_read(uint16_t port, void *priv); static void w83877f_remap(w83877f_t *dev) @@ -80,83 +76,83 @@ w83877f_remap(w83877f_t *dev) uint8_t hefras = HEFRAS; io_removehandler(0x250, 0x0002, - w83877f_read, NULL, NULL, w83877f_write, NULL, NULL, dev); + w83877f_read, NULL, NULL, w83877f_write, NULL, NULL, dev); io_removehandler(FDC_PRIMARY_ADDR, 0x0002, - w83877f_read, NULL, NULL, w83877f_write, NULL, NULL, dev); + w83877f_read, NULL, NULL, w83877f_write, NULL, NULL, dev); dev->base_address = (hefras ? FDC_PRIMARY_ADDR : 0x250); io_sethandler(dev->base_address, 0x0002, - w83877f_read, NULL, NULL, w83877f_write, NULL, NULL, dev); + w83877f_read, NULL, NULL, w83877f_write, NULL, NULL, dev); dev->key_times = hefras + 1; - dev->key = (hefras ? 0x86 : 0x88) | HEFERE; + dev->key = (hefras ? 0x86 : 0x88) | HEFERE; } - static uint8_t get_lpt_length(w83877f_t *dev) { uint8_t length = 4; if (dev->regs[9] & 0x80) { - if (dev->regs[0] & 0x04) - length = 8; /* EPP mode. */ - if (dev->regs[0] & 0x08) - length |= 0x80; /* ECP mode. */ + if (dev->regs[0] & 0x04) + length = 8; /* EPP mode. */ + if (dev->regs[0] & 0x08) + length |= 0x80; /* ECP mode. */ } return length; } - static uint16_t make_port(w83877f_t *dev, uint8_t reg) { uint16_t p = 0; - uint8_t l; + uint8_t l; switch (reg) { - case 0x20: - p = ((uint16_t) (dev->regs[reg] & 0xfc)) << 2; - p &= 0xFF0; - if ((p < 0x100) || (p > 0x3F0)) p = 0x3F0; - break; - case 0x23: - l = get_lpt_length(dev); - p = ((uint16_t) (dev->regs[reg] & 0xff)) << 2; - /* 8 ports in EPP mode, 4 in non-EPP mode. */ - if ((l & 0x0f) == 8) - p &= 0x3F8; - else - p &= 0x3FC; - if ((p < 0x100) || (p > 0x3FF)) p = LPT1_ADDR; - /* In ECP mode, A10 is active. */ - if (l & 0x80) - p |= 0x400; - break; - case 0x24: - p = ((uint16_t) (dev->regs[reg] & 0xfe)) << 2; - p &= 0xFF8; - if ((p < 0x100) || (p > 0x3F8)) p = COM1_ADDR; - break; - case 0x25: - p = ((uint16_t) (dev->regs[reg] & 0xfe)) << 2; - p &= 0xFF8; - if ((p < 0x100) || (p > 0x3F8)) p = COM2_ADDR; - break; + case 0x20: + p = ((uint16_t) (dev->regs[reg] & 0xfc)) << 2; + p &= 0xFF0; + if ((p < 0x100) || (p > 0x3F0)) + p = 0x3F0; + break; + case 0x23: + l = get_lpt_length(dev); + p = ((uint16_t) (dev->regs[reg] & 0xff)) << 2; + /* 8 ports in EPP mode, 4 in non-EPP mode. */ + if ((l & 0x0f) == 8) + p &= 0x3F8; + else + p &= 0x3FC; + if ((p < 0x100) || (p > 0x3FF)) + p = LPT1_ADDR; + /* In ECP mode, A10 is active. */ + if (l & 0x80) + p |= 0x400; + break; + case 0x24: + p = ((uint16_t) (dev->regs[reg] & 0xfe)) << 2; + p &= 0xFF8; + if ((p < 0x100) || (p > 0x3F8)) + p = COM1_ADDR; + break; + case 0x25: + p = ((uint16_t) (dev->regs[reg] & 0xfe)) << 2; + p &= 0xFF8; + if ((p < 0x100) || (p > 0x3F8)) + p = COM2_ADDR; + break; } return p; } - static void w83877f_fdc_handler(w83877f_t *dev) { fdc_remove(dev->fdc); if (!(dev->regs[6] & 0x08) && (dev->regs[0x20] & 0xc0)) - fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR); + fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR); } - static void w83877f_lpt_handler(w83877f_t *dev) { @@ -165,230 +161,226 @@ w83877f_lpt_handler(w83877f_t *dev) lpt1_remove(); if (!(dev->regs[4] & 0x80) && (dev->regs[0x23] & 0xc0)) - lpt1_init(make_port(dev, 0x23)); + lpt1_init(make_port(dev, 0x23)); lpt_irq = 0xff; lpt_irq = lpt_irqs[ECPIRQ]; if (lpt_irq == 0) - lpt_irq = PRTIQS; + lpt_irq = PRTIQS; lpt1_irq(lpt_irq); } - static void w83877f_serial_handler(w83877f_t *dev, int uart) { - int reg_mask = uart ? 0x10 : 0x20; - int reg_id = uart ? 0x25 : 0x24; - int irq_mask = uart ? 0x0f : 0xf0; - int irq_shift = uart ? 0 : 4; + int reg_mask = uart ? 0x10 : 0x20; + int reg_id = uart ? 0x25 : 0x24; + int irq_mask = uart ? 0x0f : 0xf0; + int irq_shift = uart ? 0 : 4; double clock_src = 24000000.0 / 13.0; serial_remove(dev->uart[uart]); if (!(dev->regs[4] & reg_mask) && (dev->regs[reg_id] & 0xc0)) - serial_setup(dev->uart[uart], make_port(dev, reg_id), (dev->regs[0x28] & irq_mask) >> irq_shift); + serial_setup(dev->uart[uart], make_port(dev, reg_id), (dev->regs[0x28] & irq_mask) >> irq_shift); if (dev->regs[0x19] & (0x02 >> uart)) { - clock_src = 14769000.0; + clock_src = 14769000.0; } else if (dev->regs[0x03] & (0x02 >> uart)) { - clock_src = 24000000.0 / 12.0; + clock_src = 24000000.0 / 12.0; } else { - clock_src = 24000000.0 / 13.0; + clock_src = 24000000.0 / 13.0; } serial_set_clock_src(dev->uart[uart], clock_src); } - static void w83877f_write(uint16_t port, uint8_t val, void *priv) { - w83877f_t *dev = (w83877f_t *) priv; - uint8_t valxor = 0; - uint8_t max = 0x2A; + w83877f_t *dev = (w83877f_t *) priv; + uint8_t valxor = 0; + uint8_t max = 0x2A; if (port == 0x250) { - if (val == dev->key) - dev->locked = 1; - else - dev->locked = 0; - return; + if (val == dev->key) + dev->locked = 1; + else + dev->locked = 0; + return; } else if (port == 0x251) { - if (val <= max) - dev->cur_reg = val; - return; + if (val <= max) + dev->cur_reg = val; + return; } else if (port == FDC_PRIMARY_ADDR) { - if ((val == dev->key) && !dev->locked) { - if (dev->key_times == 2) { - if (dev->tries) { - dev->locked = 1; - dev->tries = 0; - } else - dev->tries++; - } else { - dev->locked = 1; - dev->tries = 0; - } - } else { - if (dev->locked) { - if (val < max) - dev->cur_reg = val; - if (val == 0xaa) - dev->locked = 0; - } else { - if (dev->tries) - dev->tries = 0; - } - } - return; + if ((val == dev->key) && !dev->locked) { + if (dev->key_times == 2) { + if (dev->tries) { + dev->locked = 1; + dev->tries = 0; + } else + dev->tries++; + } else { + dev->locked = 1; + dev->tries = 0; + } + } else { + if (dev->locked) { + if (val < max) + dev->cur_reg = val; + if (val == 0xaa) + dev->locked = 0; + } else { + if (dev->tries) + dev->tries = 0; + } + } + return; } else if ((port == 0x252) || (port == 0x3f1)) { - if (dev->locked) { - if (dev->rw_locked) - return; - if ((dev->cur_reg >= 0x26) && (dev->cur_reg <= 0x27)) - return; - if (dev->cur_reg == 0x29) - return; - if (dev->cur_reg == 6) - val &= 0xF3; - valxor = val ^ dev->regs[dev->cur_reg]; - dev->regs[dev->cur_reg] = val; - } else - return; + if (dev->locked) { + if (dev->rw_locked) + return; + if ((dev->cur_reg >= 0x26) && (dev->cur_reg <= 0x27)) + return; + if (dev->cur_reg == 0x29) + return; + if (dev->cur_reg == 6) + val &= 0xF3; + valxor = val ^ dev->regs[dev->cur_reg]; + dev->regs[dev->cur_reg] = val; + } else + return; } switch (dev->cur_reg) { - case 0: - if (valxor & 0x0c) - w83877f_lpt_handler(dev); - break; - case 1: - if (valxor & 0x80) - fdc_set_swap(dev->fdc, (dev->regs[1] & 0x80) ? 1 : 0); - break; - case 3: - if (valxor & 0x02) - w83877f_serial_handler(dev, 0); - if (valxor & 0x01) - w83877f_serial_handler(dev, 1); - break; - case 4: - if (valxor & 0x10) - w83877f_serial_handler(dev, 1); - if (valxor & 0x20) - w83877f_serial_handler(dev, 0); - if (valxor & 0x80) - w83877f_lpt_handler(dev); - break; - case 6: - if (valxor & 0x08) - w83877f_fdc_handler(dev); - break; - case 7: - if (valxor & 0x03) - fdc_update_rwc(dev->fdc, 0, FDDA_TYPE); - if (valxor & 0x0c) - fdc_update_rwc(dev->fdc, 1, FDDB_TYPE); - if (valxor & 0x30) - fdc_update_rwc(dev->fdc, 2, FDDC_TYPE); - if (valxor & 0xc0) - fdc_update_rwc(dev->fdc, 3, FDDD_TYPE); - break; - case 8: - if (valxor & 0x03) - fdc_update_boot_drive(dev->fdc, FD_BOOT); - if (valxor & 0x10) - fdc_set_swwp(dev->fdc, SWWP ? 1 : 0); - if (valxor & 0x20) - fdc_set_diswr(dev->fdc, DISFDDWR ? 1 : 0); - break; - case 9: - if (valxor & 0x20) - fdc_update_enh_mode(dev->fdc, EN3MODE ? 1 : 0); - if (valxor & 0x40) - dev->rw_locked = (val & 0x40) ? 1 : 0; - if (valxor & 0x80) - w83877f_lpt_handler(dev); - break; - case 0xB: - if (valxor & 1) - fdc_update_drv2en(dev->fdc, DRV2EN_NEG ? 0 : 1); - if (valxor & 2) - fdc_update_densel_polarity(dev->fdc, INVERTZ ? 1 : 0); - break; - case 0xC: - if (valxor & 0x20) - w83877f_remap(dev); - break; - case 0x16: - if (valxor & 1) - w83877f_remap(dev); - break; - case 0x19: - if (valxor & 0x02) - w83877f_serial_handler(dev, 0); - if (valxor & 0x01) - w83877f_serial_handler(dev, 1); - break; - case 0x20: - if (valxor) - w83877f_fdc_handler(dev); - break; - case 0x23: - if (valxor) - w83877f_lpt_handler(dev); - break; - case 0x24: - if (valxor & 0xfe) - w83877f_serial_handler(dev, 0); - break; - case 0x25: - if (valxor & 0xfe) - w83877f_serial_handler(dev, 1); - break; - case 0x27: - if (valxor & 0xef) - w83877f_lpt_handler(dev); - break; - case 0x28: - if (valxor & 0xf) { - if ((dev->regs[0x28] & 0x0f) == 0) - dev->regs[0x28] |= 0x03; - w83877f_serial_handler(dev, 1); - } - if (valxor & 0xf0) { - if ((dev->regs[0x28] & 0xf0) == 0) - dev->regs[0x28] |= 0x40; - w83877f_serial_handler(dev, 0); - } - break; + case 0: + if (valxor & 0x0c) + w83877f_lpt_handler(dev); + break; + case 1: + if (valxor & 0x80) + fdc_set_swap(dev->fdc, (dev->regs[1] & 0x80) ? 1 : 0); + break; + case 3: + if (valxor & 0x02) + w83877f_serial_handler(dev, 0); + if (valxor & 0x01) + w83877f_serial_handler(dev, 1); + break; + case 4: + if (valxor & 0x10) + w83877f_serial_handler(dev, 1); + if (valxor & 0x20) + w83877f_serial_handler(dev, 0); + if (valxor & 0x80) + w83877f_lpt_handler(dev); + break; + case 6: + if (valxor & 0x08) + w83877f_fdc_handler(dev); + break; + case 7: + if (valxor & 0x03) + fdc_update_rwc(dev->fdc, 0, FDDA_TYPE); + if (valxor & 0x0c) + fdc_update_rwc(dev->fdc, 1, FDDB_TYPE); + if (valxor & 0x30) + fdc_update_rwc(dev->fdc, 2, FDDC_TYPE); + if (valxor & 0xc0) + fdc_update_rwc(dev->fdc, 3, FDDD_TYPE); + break; + case 8: + if (valxor & 0x03) + fdc_update_boot_drive(dev->fdc, FD_BOOT); + if (valxor & 0x10) + fdc_set_swwp(dev->fdc, SWWP ? 1 : 0); + if (valxor & 0x20) + fdc_set_diswr(dev->fdc, DISFDDWR ? 1 : 0); + break; + case 9: + if (valxor & 0x20) + fdc_update_enh_mode(dev->fdc, EN3MODE ? 1 : 0); + if (valxor & 0x40) + dev->rw_locked = (val & 0x40) ? 1 : 0; + if (valxor & 0x80) + w83877f_lpt_handler(dev); + break; + case 0xB: + if (valxor & 1) + fdc_update_drv2en(dev->fdc, DRV2EN_NEG ? 0 : 1); + if (valxor & 2) + fdc_update_densel_polarity(dev->fdc, INVERTZ ? 1 : 0); + break; + case 0xC: + if (valxor & 0x20) + w83877f_remap(dev); + break; + case 0x16: + if (valxor & 1) + w83877f_remap(dev); + break; + case 0x19: + if (valxor & 0x02) + w83877f_serial_handler(dev, 0); + if (valxor & 0x01) + w83877f_serial_handler(dev, 1); + break; + case 0x20: + if (valxor) + w83877f_fdc_handler(dev); + break; + case 0x23: + if (valxor) + w83877f_lpt_handler(dev); + break; + case 0x24: + if (valxor & 0xfe) + w83877f_serial_handler(dev, 0); + break; + case 0x25: + if (valxor & 0xfe) + w83877f_serial_handler(dev, 1); + break; + case 0x27: + if (valxor & 0xef) + w83877f_lpt_handler(dev); + break; + case 0x28: + if (valxor & 0xf) { + if ((dev->regs[0x28] & 0x0f) == 0) + dev->regs[0x28] |= 0x03; + w83877f_serial_handler(dev, 1); + } + if (valxor & 0xf0) { + if ((dev->regs[0x28] & 0xf0) == 0) + dev->regs[0x28] |= 0x40; + w83877f_serial_handler(dev, 0); + } + break; } } - static uint8_t w83877f_read(uint16_t port, void *priv) { w83877f_t *dev = (w83877f_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (dev->locked) { - if ((port == FDC_PRIMARY_ADDR) || (port == 0x251)) - ret = dev->cur_reg; - else if ((port == 0x3f1) || (port == 0x252)) { - if (dev->cur_reg == 7) - ret = (fdc_get_rwc(dev->fdc, 0) | (fdc_get_rwc(dev->fdc, 1) << 2) | (fdc_get_rwc(dev->fdc, 2) << 4) | (fdc_get_rwc(dev->fdc, 3) << 6)); - else if ((dev->cur_reg >= 0x18) || !dev->rw_locked) - ret = dev->regs[dev->cur_reg]; - } + if ((port == FDC_PRIMARY_ADDR) || (port == 0x251)) + ret = dev->cur_reg; + else if ((port == 0x3f1) || (port == 0x252)) { + if (dev->cur_reg == 7) + ret = (fdc_get_rwc(dev->fdc, 0) | (fdc_get_rwc(dev->fdc, 1) << 2) | (fdc_get_rwc(dev->fdc, 2) << 4) | (fdc_get_rwc(dev->fdc, 3) << 6)); + else if ((dev->cur_reg >= 0x18) || !dev->rw_locked) + ret = dev->regs[dev->cur_reg]; + } } return ret; } - static void w83877f_reset(w83877f_t *dev) { @@ -422,16 +414,15 @@ w83877f_reset(w83877f_t *dev) w83877f_serial_handler(dev, 1); dev->base_address = FDC_PRIMARY_ADDR; - dev->key = 0x89; - dev->key_times = 1; + dev->key = 0x89; + dev->key_times = 1; w83877f_remap(dev); - dev->locked = 0; + dev->locked = 0; dev->rw_locked = 0; } - static void w83877f_close(void *priv) { @@ -440,7 +431,6 @@ w83877f_close(void *priv) free(dev); } - static void * w83877f_init(const device_t *info) { @@ -460,57 +450,57 @@ w83877f_init(const device_t *info) } const device_t w83877f_device = { - .name = "Winbond W83877F Super I/O", + .name = "Winbond W83877F Super I/O", .internal_name = "w83877f", - .flags = 0, - .local = 0x0a05, - .init = w83877f_init, - .close = w83877f_close, - .reset = NULL, + .flags = 0, + .local = 0x0a05, + .init = w83877f_init, + .close = w83877f_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t w83877f_president_device = { - .name = "Winbond W83877F Super I/O (President)", + .name = "Winbond W83877F Super I/O (President)", .internal_name = "w83877f_president", - .flags = 0, - .local = 0x0a04, - .init = w83877f_init, - .close = w83877f_close, - .reset = NULL, + .flags = 0, + .local = 0x0a04, + .init = w83877f_init, + .close = w83877f_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t w83877tf_device = { - .name = "Winbond W83877TF Super I/O", + .name = "Winbond W83877TF Super I/O", .internal_name = "w83877tf", - .flags = 0, - .local = 0x0c04, - .init = w83877f_init, - .close = w83877f_close, - .reset = NULL, + .flags = 0, + .local = 0x0c04, + .init = w83877f_init, + .close = w83877f_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t w83877tf_acorp_device = { - .name = "Winbond W83877TF Super I/O", + .name = "Winbond W83877TF Super I/O", .internal_name = "w83877tf_acorp", - .flags = 0, - .local = 0x0c05, - .init = w83877f_init, - .close = w83877f_close, - .reset = NULL, + .flags = 0, + .local = 0x0c05, + .init = w83877f_init, + .close = w83877f_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/sio/sio_w83977f.c b/src/sio/sio_w83977f.c index 370bb8c68..e214f883d 100644 --- a/src/sio/sio_w83977f.c +++ b/src/sio/sio_w83977f.c @@ -34,333 +34,331 @@ #include <86box/fdc.h> #include <86box/sio.h> - -#define HEFRAS (dev->regs[0x26] & 0x40) - +#define HEFRAS (dev->regs[0x26] & 0x40) typedef struct { uint8_t id, tries, - regs[48], - dev_regs[256][208]; + regs[48], + dev_regs[256][208]; int locked, rw_locked, - cur_reg, base_address, - type, hefras; - fdc_t *fdc; + cur_reg, base_address, + type, hefras; + fdc_t *fdc; serial_t *uart[2]; } w83977f_t; +static int next_id = 0; -static int next_id = 0; - - -static void w83977f_write(uint16_t port, uint8_t val, void *priv); -static uint8_t w83977f_read(uint16_t port, void *priv); - +static void w83977f_write(uint16_t port, uint8_t val, void *priv); +static uint8_t w83977f_read(uint16_t port, void *priv); static void w83977f_remap(w83977f_t *dev) { io_removehandler(FDC_PRIMARY_ADDR, 0x0002, - w83977f_read, NULL, NULL, w83977f_write, NULL, NULL, dev); + w83977f_read, NULL, NULL, w83977f_write, NULL, NULL, dev); io_removehandler(FDC_SECONDARY_ADDR, 0x0002, - w83977f_read, NULL, NULL, w83977f_write, NULL, NULL, dev); + w83977f_read, NULL, NULL, w83977f_write, NULL, NULL, dev); dev->base_address = (HEFRAS ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); io_sethandler(dev->base_address, 0x0002, - w83977f_read, NULL, NULL, w83977f_write, NULL, NULL, dev); + w83977f_read, NULL, NULL, w83977f_write, NULL, NULL, dev); } - static uint8_t get_lpt_length(w83977f_t *dev) { uint8_t length = 4; - if (((dev->dev_regs[1][0xc0] & 0x07) != 0x00) && ((dev->dev_regs[1][0xc0] & 0x07) != 0x02) && - ((dev->dev_regs[1][0xc0] & 0x07) != 0x04)) - length = 8; + if (((dev->dev_regs[1][0xc0] & 0x07) != 0x00) && ((dev->dev_regs[1][0xc0] & 0x07) != 0x02) && ((dev->dev_regs[1][0xc0] & 0x07) != 0x04)) + length = 8; return length; } - static void w83977f_fdc_handler(w83977f_t *dev) { uint16_t io_base = (dev->dev_regs[0][0x30] << 8) | dev->dev_regs[0][0x31]; if (dev->id == 1) - return; + return; fdc_remove(dev->fdc); if ((dev->dev_regs[0][0x00] & 0x01) && (dev->regs[0x22] & 0x01) && (io_base >= 0x100) && (io_base <= 0xff8)) - fdc_set_base(dev->fdc, io_base); + fdc_set_base(dev->fdc, io_base); fdc_set_irq(dev->fdc, dev->dev_regs[0][0x40] & 0x0f); } - static void w83977f_lpt_handler(w83977f_t *dev) { uint16_t io_mask, io_base = (dev->dev_regs[1][0x30] << 8) | dev->dev_regs[1][0x31]; - int io_len = get_lpt_length(dev); + int io_len = get_lpt_length(dev); io_base &= (0xff8 | io_len); io_mask = 0xffc; if (io_len == 8) - io_mask = 0xff8; + io_mask = 0xff8; if (dev->id == 1) { - lpt2_remove(); + lpt2_remove(); - if ((dev->dev_regs[1][0x00] & 0x01) && (dev->regs[0x22] & 0x08) && (io_base >= 0x100) && (io_base <= io_mask)) - lpt2_init(io_base); + if ((dev->dev_regs[1][0x00] & 0x01) && (dev->regs[0x22] & 0x08) && (io_base >= 0x100) && (io_base <= io_mask)) + lpt2_init(io_base); - lpt2_irq(dev->dev_regs[1][0x40] & 0x0f); + lpt2_irq(dev->dev_regs[1][0x40] & 0x0f); } else { - lpt1_remove(); + lpt1_remove(); - if ((dev->dev_regs[1][0x00] & 0x01) && (dev->regs[0x22] & 0x08) && (io_base >= 0x100) && (io_base <= io_mask)) - lpt1_init(io_base); + if ((dev->dev_regs[1][0x00] & 0x01) && (dev->regs[0x22] & 0x08) && (io_base >= 0x100) && (io_base <= io_mask)) + lpt1_init(io_base); - lpt1_irq(dev->dev_regs[1][0x40] & 0x0f); + lpt1_irq(dev->dev_regs[1][0x40] & 0x0f); } } - static void w83977f_serial_handler(w83977f_t *dev, int uart) { - uint16_t io_base = (dev->dev_regs[2 + uart][0x30] << 8) | dev->dev_regs[2 + uart][0x31]; - double clock_src = 24000000.0 / 13.0; + uint16_t io_base = (dev->dev_regs[2 + uart][0x30] << 8) | dev->dev_regs[2 + uart][0x31]; + double clock_src = 24000000.0 / 13.0; serial_remove(dev->uart[uart]); if ((dev->dev_regs[2 + uart][0x00] & 0x01) && (dev->regs[0x22] & (0x10 << uart)) && (io_base >= 0x100) && (io_base <= 0xff8)) - serial_setup(dev->uart[uart], io_base, dev->dev_regs[2 + uart][0x40] & 0x0f); + serial_setup(dev->uart[uart], io_base, dev->dev_regs[2 + uart][0x40] & 0x0f); switch (dev->dev_regs[2 + uart][0xc0] & 0x03) { - case 0x00: - clock_src = 24000000.0 / 13.0; - break; - case 0x01: - clock_src = 24000000.0 / 12.0; - break; - case 0x02: - clock_src = 24000000.0 / 1.0; - break; - case 0x03: - clock_src = 24000000.0 / 1.625; - break; + case 0x00: + clock_src = 24000000.0 / 13.0; + break; + case 0x01: + clock_src = 24000000.0 / 12.0; + break; + case 0x02: + clock_src = 24000000.0 / 1.0; + break; + case 0x03: + clock_src = 24000000.0 / 1.625; + break; } serial_set_clock_src(dev->uart[uart], clock_src); } - static void w83977f_write(uint16_t port, uint8_t val, void *priv) { - w83977f_t *dev = (w83977f_t *) priv; - uint8_t index = (port & 1) ? 0 : 1; - uint8_t valxor = 0; - uint8_t ld = dev->regs[7]; + w83977f_t *dev = (w83977f_t *) priv; + uint8_t index = (port & 1) ? 0 : 1; + uint8_t valxor = 0; + uint8_t ld = dev->regs[7]; if (index) { - if ((val == 0x87) && !dev->locked) { - if (dev->tries) { - dev->locked = 1; - dev->tries = 0; - } else - dev->tries++; - } else { - if (dev->locked) { - if (val == 0xaa) - dev->locked = 0; - else - dev->cur_reg = val; - } else { - if (dev->tries) - dev->tries = 0; - } - } - return; + if ((val == 0x87) && !dev->locked) { + if (dev->tries) { + dev->locked = 1; + dev->tries = 0; + } else + dev->tries++; + } else { + if (dev->locked) { + if (val == 0xaa) + dev->locked = 0; + else + dev->cur_reg = val; + } else { + if (dev->tries) + dev->tries = 0; + } + } + return; } else { - if (dev->locked) { - if (dev->rw_locked) - return; - if (dev->cur_reg >= 0x30) { - valxor = val ^ dev->dev_regs[ld][dev->cur_reg - 0x30]; - dev->dev_regs[ld][dev->cur_reg - 0x30] = val; - } else { - valxor = val ^ dev->regs[dev->cur_reg]; - dev->regs[dev->cur_reg] = val; - } - } else - return; + if (dev->locked) { + if (dev->rw_locked) + return; + if (dev->cur_reg >= 0x30) { + valxor = val ^ dev->dev_regs[ld][dev->cur_reg - 0x30]; + dev->dev_regs[ld][dev->cur_reg - 0x30] = val; + } else { + valxor = val ^ dev->regs[dev->cur_reg]; + dev->regs[dev->cur_reg] = val; + } + } else + return; } switch (dev->cur_reg) { - case 0x02: - /* if (valxor & 0x02) - softresetx86(); */ - break; - case 0x22: - if (valxor & 0x20) - w83977f_serial_handler(dev, 1); - if (valxor & 0x10) - w83977f_serial_handler(dev, 0); - if (valxor & 0x08) - w83977f_lpt_handler(dev); - if (valxor & 0x01) - w83977f_fdc_handler(dev); - break; - case 0x26: - if (valxor & 0x40) - w83977f_remap(dev); - if (valxor & 0x20) - dev->rw_locked = (val & 0x20) ? 1 : 0; - break; - case 0x30: - if (valxor & 0x01) switch (ld) { - case 0x00: - w83977f_fdc_handler(dev); - break; - case 0x01: - w83977f_lpt_handler(dev); - break; - case 0x02: case 0x03: - w83977f_serial_handler(dev, ld - 2); - break; - } - break; - case 0x60: case 0x61: - if (valxor & 0xff) switch (ld) { - case 0x00: - w83977f_fdc_handler(dev); - break; - case 0x01: - w83977f_lpt_handler(dev); - break; - case 0x02: case 0x03: - w83977f_serial_handler(dev, ld - 2); - break; - } - break; - case 0x70: - if (valxor & 0x0f) switch (ld) { - case 0x00: - w83977f_fdc_handler(dev); - break; - case 0x01: - w83977f_lpt_handler(dev); - break; - case 0x02: case 0x03: - w83977f_serial_handler(dev, ld - 2); - break; - } - break; - case 0xf0: - switch (ld) { - case 0x00: - if (dev->id == 1) - break; + case 0x02: + /* if (valxor & 0x02) + softresetx86(); */ + break; + case 0x22: + if (valxor & 0x20) + w83977f_serial_handler(dev, 1); + if (valxor & 0x10) + w83977f_serial_handler(dev, 0); + if (valxor & 0x08) + w83977f_lpt_handler(dev); + if (valxor & 0x01) + w83977f_fdc_handler(dev); + break; + case 0x26: + if (valxor & 0x40) + w83977f_remap(dev); + if (valxor & 0x20) + dev->rw_locked = (val & 0x20) ? 1 : 0; + break; + case 0x30: + if (valxor & 0x01) + switch (ld) { + case 0x00: + w83977f_fdc_handler(dev); + break; + case 0x01: + w83977f_lpt_handler(dev); + break; + case 0x02: + case 0x03: + w83977f_serial_handler(dev, ld - 2); + break; + } + break; + case 0x60: + case 0x61: + if (valxor & 0xff) + switch (ld) { + case 0x00: + w83977f_fdc_handler(dev); + break; + case 0x01: + w83977f_lpt_handler(dev); + break; + case 0x02: + case 0x03: + w83977f_serial_handler(dev, ld - 2); + break; + } + break; + case 0x70: + if (valxor & 0x0f) + switch (ld) { + case 0x00: + w83977f_fdc_handler(dev); + break; + case 0x01: + w83977f_lpt_handler(dev); + break; + case 0x02: + case 0x03: + w83977f_serial_handler(dev, ld - 2); + break; + } + break; + case 0xf0: + switch (ld) { + case 0x00: + if (dev->id == 1) + break; - if (!dev->id && (valxor & 0x20)) - fdc_update_drv2en(dev->fdc, (val & 0x20) ? 0 : 1); - if (!dev->id && (valxor & 0x10)) - fdc_set_swap(dev->fdc, (val & 0x10) ? 1 : 0); - if (!dev->id && (valxor & 0x01)) - fdc_update_enh_mode(dev->fdc, (val & 0x01) ? 1 : 0); - break; - case 0x01: - if (valxor & 0x07) - w83977f_lpt_handler(dev); - break; - case 0x02: case 0x03: - if (valxor & 0x03) - w83977f_serial_handler(dev, ld - 2); - break; - } - break; - case 0xf1: - switch (ld) { - case 0x00: - if (dev->id == 1) - break; + if (!dev->id && (valxor & 0x20)) + fdc_update_drv2en(dev->fdc, (val & 0x20) ? 0 : 1); + if (!dev->id && (valxor & 0x10)) + fdc_set_swap(dev->fdc, (val & 0x10) ? 1 : 0); + if (!dev->id && (valxor & 0x01)) + fdc_update_enh_mode(dev->fdc, (val & 0x01) ? 1 : 0); + break; + case 0x01: + if (valxor & 0x07) + w83977f_lpt_handler(dev); + break; + case 0x02: + case 0x03: + if (valxor & 0x03) + w83977f_serial_handler(dev, ld - 2); + break; + } + break; + case 0xf1: + switch (ld) { + case 0x00: + if (dev->id == 1) + break; - if (!dev->id && (valxor & 0xc0)) - fdc_update_boot_drive(dev->fdc, (val & 0xc0) >> 6); - if (!dev->id && (valxor & 0x0c)) - fdc_update_densel_force(dev->fdc, (val & 0x0c) >> 2); - if (!dev->id && (valxor & 0x02)) - fdc_set_diswr(dev->fdc, (val & 0x02) ? 1 : 0); - if (!dev->id && (valxor & 0x01)) - fdc_set_swwp(dev->fdc, (val & 0x01) ? 1 : 0); - break; - } - break; - case 0xf2: - switch (ld) { - case 0x00: - if (dev->id == 1) - break; + if (!dev->id && (valxor & 0xc0)) + fdc_update_boot_drive(dev->fdc, (val & 0xc0) >> 6); + if (!dev->id && (valxor & 0x0c)) + fdc_update_densel_force(dev->fdc, (val & 0x0c) >> 2); + if (!dev->id && (valxor & 0x02)) + fdc_set_diswr(dev->fdc, (val & 0x02) ? 1 : 0); + if (!dev->id && (valxor & 0x01)) + fdc_set_swwp(dev->fdc, (val & 0x01) ? 1 : 0); + break; + } + break; + case 0xf2: + switch (ld) { + case 0x00: + if (dev->id == 1) + break; - if (!dev->id && (valxor & 0xc0)) - fdc_update_rwc(dev->fdc, 3, (val & 0xc0) >> 6); - if (!dev->id && (valxor & 0x30)) - fdc_update_rwc(dev->fdc, 2, (val & 0x30) >> 4); - if (!dev->id && (valxor & 0x0c)) - fdc_update_rwc(dev->fdc, 1, (val & 0x0c) >> 2); - if (!dev->id && (valxor & 0x03)) - fdc_update_rwc(dev->fdc, 0, val & 0x03); - break; - } - break; - case 0xf4: case 0xf5: case 0xf6: case 0xf7: - switch (ld) { - case 0x00: - if (dev->id == 1) - break; + if (!dev->id && (valxor & 0xc0)) + fdc_update_rwc(dev->fdc, 3, (val & 0xc0) >> 6); + if (!dev->id && (valxor & 0x30)) + fdc_update_rwc(dev->fdc, 2, (val & 0x30) >> 4); + if (!dev->id && (valxor & 0x0c)) + fdc_update_rwc(dev->fdc, 1, (val & 0x0c) >> 2); + if (!dev->id && (valxor & 0x03)) + fdc_update_rwc(dev->fdc, 0, val & 0x03); + break; + } + break; + case 0xf4: + case 0xf5: + case 0xf6: + case 0xf7: + switch (ld) { + case 0x00: + if (dev->id == 1) + break; - if (!dev->id && (valxor & 0x18)) - fdc_update_drvrate(dev->fdc, dev->cur_reg & 0x03, (val & 0x18) >> 3); - break; - } - break; + if (!dev->id && (valxor & 0x18)) + fdc_update_drvrate(dev->fdc, dev->cur_reg & 0x03, (val & 0x18) >> 3); + break; + } + break; } } - static uint8_t w83977f_read(uint16_t port, void *priv) { - w83977f_t *dev = (w83977f_t *) priv; - uint8_t ret = 0xff; - uint8_t index = (port & 1) ? 0 : 1; - uint8_t ld = dev->regs[7]; + w83977f_t *dev = (w83977f_t *) priv; + uint8_t ret = 0xff; + uint8_t index = (port & 1) ? 0 : 1; + uint8_t ld = dev->regs[7]; if (dev->locked) { - if (index) - ret = dev->cur_reg; - else { - if (!dev->rw_locked) { - if (!dev->id && ((dev->cur_reg == 0xf2) && (ld == 0x00))) - ret = (fdc_get_rwc(dev->fdc, 0) | (fdc_get_rwc(dev->fdc, 1) << 2) | (fdc_get_rwc(dev->fdc, 2) << 4) | (fdc_get_rwc(dev->fdc, 3) << 6)); - else if (dev->cur_reg >= 0x30) - ret = dev->dev_regs[ld][dev->cur_reg - 0x30]; - else - ret = dev->regs[dev->cur_reg]; - } - } + if (index) + ret = dev->cur_reg; + else { + if (!dev->rw_locked) { + if (!dev->id && ((dev->cur_reg == 0xf2) && (ld == 0x00))) + ret = (fdc_get_rwc(dev->fdc, 0) | (fdc_get_rwc(dev->fdc, 1) << 2) | (fdc_get_rwc(dev->fdc, 2) << 4) | (fdc_get_rwc(dev->fdc, 3) << 6)); + else if (dev->cur_reg >= 0x30) + ret = dev->dev_regs[ld][dev->cur_reg - 0x30]; + else + ret = dev->regs[dev->cur_reg]; + } + } } return ret; } - static void w83977f_reset(w83977f_t *dev) { @@ -368,14 +366,14 @@ w83977f_reset(w83977f_t *dev) memset(dev->regs, 0, 48); for (i = 0; i < 256; i++) - memset(dev->dev_regs[i], 0, 208); + memset(dev->dev_regs[i], 0, 208); if (dev->type < 2) { - dev->regs[0x20] = 0x97; - dev->regs[0x21] = dev->type ? 0x73 : 0x71; + dev->regs[0x20] = 0x97; + dev->regs[0x21] = dev->type ? 0x73 : 0x71; } else { - dev->regs[0x20] = 0x52; - dev->regs[0x21] = 0xf0; + dev->regs[0x20] = 0x52; + dev->regs[0x21] = 0xf0; } dev->regs[0x22] = 0xff; dev->regs[0x24] = dev->type ? 0x84 : 0xa4; @@ -385,137 +383,159 @@ w83977f_reset(w83977f_t *dev) /* Logical Device 0 (FDC) */ dev->dev_regs[0][0x00] = 0x01; if (!dev->type) - dev->dev_regs[0][0x01] = 0x02; + dev->dev_regs[0][0x01] = 0x02; if (next_id == 1) { - dev->dev_regs[0][0x30] = 0x03; dev->dev_regs[0][0x31] = 0x70; + dev->dev_regs[0][0x30] = 0x03; + dev->dev_regs[0][0x31] = 0x70; } else { - dev->dev_regs[0][0x30] = 0x03; dev->dev_regs[0][0x31] = 0xf0; + dev->dev_regs[0][0x30] = 0x03; + dev->dev_regs[0][0x31] = 0xf0; } dev->dev_regs[0][0x40] = 0x06; if (!dev->type) - dev->dev_regs[0][0x41] = 0x02; /* Read-only */ + dev->dev_regs[0][0x41] = 0x02; /* Read-only */ dev->dev_regs[0][0x44] = 0x02; dev->dev_regs[0][0xc0] = 0x0e; /* Logical Device 1 (Parallel Port) */ dev->dev_regs[1][0x00] = 0x01; if (!dev->type) - dev->dev_regs[1][0x01] = 0x02; + dev->dev_regs[1][0x01] = 0x02; if (next_id == 1) { - dev->dev_regs[1][0x30] = 0x02; dev->dev_regs[1][0x31] = 0x78; - dev->dev_regs[1][0x40] = 0x05; + dev->dev_regs[1][0x30] = 0x02; + dev->dev_regs[1][0x31] = 0x78; + dev->dev_regs[1][0x40] = 0x05; } else { - dev->dev_regs[1][0x30] = 0x03; dev->dev_regs[1][0x31] = 0x78; - dev->dev_regs[1][0x40] = 0x07; + dev->dev_regs[1][0x30] = 0x03; + dev->dev_regs[1][0x31] = 0x78; + dev->dev_regs[1][0x40] = 0x07; } if (!dev->type) - dev->dev_regs[1][0x41] = 0x01 /*0x02*/; /* Read-only */ + dev->dev_regs[1][0x41] = 0x01 /*0x02*/; /* Read-only */ dev->dev_regs[1][0x44] = 0x04; - dev->dev_regs[1][0xc0] = 0x3c; /* The datasheet says default is 3f, but also default is printer mode. */ + dev->dev_regs[1][0xc0] = 0x3c; /* The datasheet says default is 3f, but also default is printer mode. */ /* Logical Device 2 (UART A) */ dev->dev_regs[2][0x00] = 0x01; if (!dev->type) - dev->dev_regs[2][0x01] = 0x02; + dev->dev_regs[2][0x01] = 0x02; if (next_id == 1) { - dev->dev_regs[2][0x30] = 0x03; dev->dev_regs[2][0x31] = 0xe8; + dev->dev_regs[2][0x30] = 0x03; + dev->dev_regs[2][0x31] = 0xe8; } else { - dev->dev_regs[2][0x30] = 0x03; dev->dev_regs[2][0x31] = 0xf8; + dev->dev_regs[2][0x30] = 0x03; + dev->dev_regs[2][0x31] = 0xf8; } dev->dev_regs[2][0x40] = 0x04; if (!dev->type) - dev->dev_regs[2][0x41] = 0x02; /* Read-only */ + dev->dev_regs[2][0x41] = 0x02; /* Read-only */ /* Logical Device 3 (UART B) */ dev->dev_regs[3][0x00] = 0x01; if (!dev->type) - dev->dev_regs[3][0x01] = 0x02; + dev->dev_regs[3][0x01] = 0x02; if (next_id == 1) { - dev->dev_regs[3][0x30] = 0x02; dev->dev_regs[3][0x31] = 0xe8; + dev->dev_regs[3][0x30] = 0x02; + dev->dev_regs[3][0x31] = 0xe8; } else { - dev->dev_regs[3][0x30] = 0x02; dev->dev_regs[3][0x31] = 0xf8; + dev->dev_regs[3][0x30] = 0x02; + dev->dev_regs[3][0x31] = 0xf8; } dev->dev_regs[3][0x40] = 0x03; if (!dev->type) - dev->dev_regs[3][0x41] = 0x02; /* Read-only */ + dev->dev_regs[3][0x41] = 0x02; /* Read-only */ /* Logical Device 4 (RTC) */ if (!dev->type) { - dev->dev_regs[4][0x00] = 0x01; - dev->dev_regs[4][0x01] = 0x02; - dev->dev_regs[4][0x30] = 0x00; dev->dev_regs[4][0x31] = 0x70; - dev->dev_regs[4][0x40] = 0x08; - dev->dev_regs[4][0x41] = 0x02; /* Read-only */ + dev->dev_regs[4][0x00] = 0x01; + dev->dev_regs[4][0x01] = 0x02; + dev->dev_regs[4][0x30] = 0x00; + dev->dev_regs[4][0x31] = 0x70; + dev->dev_regs[4][0x40] = 0x08; + dev->dev_regs[4][0x41] = 0x02; /* Read-only */ } /* Logical Device 5 (KBC) */ dev->dev_regs[5][0x00] = 0x01; if (!dev->type) - dev->dev_regs[5][0x01] = 0x02; - dev->dev_regs[5][0x30] = 0x00; dev->dev_regs[5][0x31] = 0x60; - dev->dev_regs[5][0x32] = 0x00; dev->dev_regs[5][0x33] = 0x64; + dev->dev_regs[5][0x01] = 0x02; + dev->dev_regs[5][0x30] = 0x00; + dev->dev_regs[5][0x31] = 0x60; + dev->dev_regs[5][0x32] = 0x00; + dev->dev_regs[5][0x33] = 0x64; dev->dev_regs[5][0x40] = 0x01; if (!dev->type) - dev->dev_regs[5][0x41] = 0x02; /* Read-only */ + dev->dev_regs[5][0x41] = 0x02; /* Read-only */ dev->dev_regs[5][0x42] = 0x0c; if (!dev->type) - dev->dev_regs[5][0x43] = 0x02; /* Read-only? */ + dev->dev_regs[5][0x43] = 0x02; /* Read-only? */ dev->dev_regs[5][0xc0] = dev->type ? 0x83 : 0x40; /* Logical Device 6 (IR) = UART C */ if (!dev->type) { - dev->dev_regs[6][0x01] = 0x02; - dev->dev_regs[6][0x41] = 0x02; /* Read-only */ - dev->dev_regs[6][0x44] = 0x04; - dev->dev_regs[6][0x45] = 0x04; + dev->dev_regs[6][0x01] = 0x02; + dev->dev_regs[6][0x41] = 0x02; /* Read-only */ + dev->dev_regs[6][0x44] = 0x04; + dev->dev_regs[6][0x45] = 0x04; } /* Logical Device 7 (Auxiliary I/O Part I) */ if (!dev->type) - dev->dev_regs[7][0x01] = 0x02; + dev->dev_regs[7][0x01] = 0x02; if (!dev->type) - dev->dev_regs[7][0x41] = 0x02; /* Read-only */ + dev->dev_regs[7][0x41] = 0x02; /* Read-only */ if (!dev->type) - dev->dev_regs[7][0x43] = 0x02; /* Read-only? */ - dev->dev_regs[7][0xb0] = 0x01; dev->dev_regs[7][0xb1] = 0x01; - dev->dev_regs[7][0xb2] = 0x01; dev->dev_regs[7][0xb3] = 0x01; - dev->dev_regs[7][0xb4] = 0x01; dev->dev_regs[7][0xb5] = 0x01; + dev->dev_regs[7][0x43] = 0x02; /* Read-only? */ + dev->dev_regs[7][0xb0] = 0x01; + dev->dev_regs[7][0xb1] = 0x01; + dev->dev_regs[7][0xb2] = 0x01; + dev->dev_regs[7][0xb3] = 0x01; + dev->dev_regs[7][0xb4] = 0x01; + dev->dev_regs[7][0xb5] = 0x01; dev->dev_regs[7][0xb6] = 0x01; if (dev->type) - dev->dev_regs[7][0xb7] = 0x01; + dev->dev_regs[7][0xb7] = 0x01; /* Logical Device 8 (Auxiliary I/O Part II) */ if (!dev->type) - dev->dev_regs[8][0x01] = 0x02; + dev->dev_regs[8][0x01] = 0x02; if (!dev->type) - dev->dev_regs[8][0x41] = 0x02; /* Read-only */ + dev->dev_regs[8][0x41] = 0x02; /* Read-only */ if (!dev->type) - dev->dev_regs[8][0x43] = 0x02; /* Read-only? */ - dev->dev_regs[8][0xb8] = 0x01; dev->dev_regs[8][0xb9] = 0x01; - dev->dev_regs[8][0xba] = 0x01; dev->dev_regs[8][0xbb] = 0x01; - dev->dev_regs[8][0xbc] = 0x01; dev->dev_regs[8][0xbd] = 0x01; - dev->dev_regs[8][0xbe] = 0x01; dev->dev_regs[8][0xbf] = 0x01; + dev->dev_regs[8][0x43] = 0x02; /* Read-only? */ + dev->dev_regs[8][0xb8] = 0x01; + dev->dev_regs[8][0xb9] = 0x01; + dev->dev_regs[8][0xba] = 0x01; + dev->dev_regs[8][0xbb] = 0x01; + dev->dev_regs[8][0xbc] = 0x01; + dev->dev_regs[8][0xbd] = 0x01; + dev->dev_regs[8][0xbe] = 0x01; + dev->dev_regs[8][0xbf] = 0x01; /* Logical Device 9 (Auxiliary I/O Part III) */ if (dev->type) { - dev->dev_regs[9][0xb0] = 0x01; dev->dev_regs[9][0xb1] = 0x01; - dev->dev_regs[9][0xb2] = 0x01; dev->dev_regs[9][0xb3] = 0x01; - dev->dev_regs[9][0xb4] = 0x01; dev->dev_regs[9][0xb5] = 0x01; - dev->dev_regs[9][0xb6] = 0x01; dev->dev_regs[9][0xb7] = 0x01; + dev->dev_regs[9][0xb0] = 0x01; + dev->dev_regs[9][0xb1] = 0x01; + dev->dev_regs[9][0xb2] = 0x01; + dev->dev_regs[9][0xb3] = 0x01; + dev->dev_regs[9][0xb4] = 0x01; + dev->dev_regs[9][0xb5] = 0x01; + dev->dev_regs[9][0xb6] = 0x01; + dev->dev_regs[9][0xb7] = 0x01; - dev->dev_regs[10][0xc0] = 0x8f; + dev->dev_regs[10][0xc0] = 0x8f; } if (dev->id == 1) { - serial_setup(dev->uart[0], COM3_ADDR, COM3_IRQ); - serial_setup(dev->uart[1], COM4_ADDR, COM4_IRQ); + serial_setup(dev->uart[0], COM3_ADDR, COM3_IRQ); + serial_setup(dev->uart[1], COM4_ADDR, COM4_IRQ); } else { - fdc_reset(dev->fdc); + fdc_reset(dev->fdc); - serial_setup(dev->uart[0], COM1_ADDR, COM1_IRQ); - serial_setup(dev->uart[1], COM2_ADDR, COM2_IRQ); + serial_setup(dev->uart[0], COM1_ADDR, COM1_IRQ); + serial_setup(dev->uart[1], COM2_ADDR, COM2_IRQ); - w83977f_fdc_handler(dev); + w83977f_fdc_handler(dev); } w83977f_lpt_handler(dev); @@ -524,11 +544,10 @@ w83977f_reset(w83977f_t *dev) w83977f_remap(dev); - dev->locked = 0; + dev->locked = 0; dev->rw_locked = 0; } - static void w83977f_close(void *priv) { @@ -539,22 +558,21 @@ w83977f_close(void *priv) free(dev); } - static void * w83977f_init(const device_t *info) { w83977f_t *dev = (w83977f_t *) malloc(sizeof(w83977f_t)); memset(dev, 0, sizeof(w83977f_t)); - dev->type = info->local & 0x0f; + dev->type = info->local & 0x0f; dev->hefras = info->local & 0x40; dev->id = next_id; if (next_id == 1) - dev->hefras ^= 0x40; + dev->hefras ^= 0x40; else - dev->fdc = device_add(&fdc_at_smc_device); + dev->fdc = device_add(&fdc_at_smc_device); dev->uart[0] = device_add_inst(&ns16550_device, (next_id << 1) + 1); dev->uart[1] = device_add_inst(&ns16550_device, (next_id << 1) + 2); @@ -567,71 +585,71 @@ w83977f_init(const device_t *info) } const device_t w83977f_device = { - .name = "Winbond W83977F Super I/O", + .name = "Winbond W83977F Super I/O", .internal_name = "w83977f", - .flags = 0, - .local = 0, - .init = w83977f_init, - .close = w83977f_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = w83977f_init, + .close = w83977f_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t w83977f_370_device = { - .name = "Winbond W83977F Super I/O (Port 370h)", + .name = "Winbond W83977F Super I/O (Port 370h)", .internal_name = "w83977f_370", - .flags = 0, - .local = 0x40, - .init = w83977f_init, - .close = w83977f_close, - .reset = NULL, + .flags = 0, + .local = 0x40, + .init = w83977f_init, + .close = w83977f_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t w83977tf_device = { - .name = "Winbond W83977TF Super I/O", + .name = "Winbond W83977TF Super I/O", .internal_name = "w83977tf", - .flags = 0, - .local = 1, - .init = w83977f_init, - .close = w83977f_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = w83977f_init, + .close = w83977f_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t w83977ef_device = { - .name = "Winbond W83977TF Super I/O", + .name = "Winbond W83977TF Super I/O", .internal_name = "w83977ef", - .flags = 0, - .local = 2, - .init = w83977f_init, - .close = w83977f_close, - .reset = NULL, + .flags = 0, + .local = 2, + .init = w83977f_init, + .close = w83977f_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t w83977ef_370_device = { - .name = "Winbond W83977TF Super I/O (Port 370h)", + .name = "Winbond W83977TF Super I/O (Port 370h)", .internal_name = "w83977ef_370", - .flags = 0, - .local = 0x42, - .init = w83977f_init, - .close = w83977f_close, - .reset = NULL, + .flags = 0, + .local = 0x42, + .init = w83977f_init, + .close = w83977f_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; From 97a7459fd4d4131e173499f22af3b7de795a93cd Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:17:15 -0400 Subject: [PATCH 365/386] clang-format in src/scsi/ --- src/scsi/scsi.c | 75 +- src/scsi/scsi_aha154x.c | 1189 ++++++------ src/scsi/scsi_buslogic.c | 2466 ++++++++++++------------ src/scsi/scsi_cdrom.c | 3821 ++++++++++++++++++------------------- src/scsi/scsi_device.c | 105 +- src/scsi/scsi_disk.c | 1516 +++++++-------- src/scsi/scsi_ncr5380.c | 2275 +++++++++++----------- src/scsi/scsi_ncr53c8xx.c | 3328 ++++++++++++++++---------------- src/scsi/scsi_pcscsi.c | 2259 +++++++++++----------- src/scsi/scsi_spock.c | 1468 +++++++------- src/scsi/scsi_x54x.c | 2081 ++++++++++---------- 11 files changed, 10144 insertions(+), 10439 deletions(-) diff --git a/src/scsi/scsi.c b/src/scsi/scsi.c index b6db9e051..5cd4b7287 100644 --- a/src/scsi/scsi.c +++ b/src/scsi/scsi.c @@ -42,37 +42,33 @@ #include <86box/scsi_pcscsi.h> #include <86box/scsi_spock.h> #ifdef WALTJE -# include "scsi_wd33c93.h" +# include "scsi_wd33c93.h" #endif +int scsi_card_current[SCSI_BUS_MAX] = { 0, 0 }; -int scsi_card_current[SCSI_BUS_MAX] = { 0, 0 }; - -static uint8_t next_scsi_bus = 0; - +static uint8_t next_scsi_bus = 0; static const device_t scsi_none_device = { - .name = "None", + .name = "None", .internal_name = "none", - .flags = 0, - .local = 0, - .init = NULL, - .close = NULL, - .reset = NULL, + .flags = 0, + .local = 0, + .init = NULL, + .close = NULL, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; - typedef const struct { - const device_t *device; + const device_t *device; } SCSI_CARD; - static SCSI_CARD scsi_cards[] = { -// clang-format off + // clang-format off { &scsi_none_device, }, { &aha154xa_device, }, { &aha154xb_device, }, @@ -107,79 +103,72 @@ static SCSI_CARD scsi_cards[] = { { &buslogic_445s_device, }, { &buslogic_445c_device, }, { NULL, }, -// clang-format on + // clang-format on }; - void scsi_reset(void) { next_scsi_bus = 0; } - uint8_t scsi_get_bus(void) { uint8_t ret = next_scsi_bus; if (next_scsi_bus >= SCSI_BUS_MAX) - return 0xff; + return 0xff; next_scsi_bus++; return ret; } - int scsi_card_available(int card) { if (scsi_cards[card].device) - return(device_available(scsi_cards[card].device)); + return (device_available(scsi_cards[card].device)); - return(1); + return (1); } - const device_t * scsi_card_getdevice(int card) { - return(scsi_cards[card].device); + return (scsi_cards[card].device); } - int scsi_card_has_config(int card) { - if (! scsi_cards[card].device) return(0); + if (!scsi_cards[card].device) + return (0); - return(device_has_config(scsi_cards[card].device) ? 1 : 0); + return (device_has_config(scsi_cards[card].device) ? 1 : 0); } - char * scsi_card_get_internal_name(int card) { return device_get_internal_name(scsi_cards[card].device); } - int scsi_card_get_from_internal_name(char *s) { int c = 0; while (scsi_cards[c].device != NULL) { - if (!strcmp((char *) scsi_cards[c].device->internal_name, s)) - return(c); - c++; + if (!strcmp((char *) scsi_cards[c].device->internal_name, s)) + return (c); + c++; } - return(0); + return (0); } - void scsi_card_init(void) { @@ -188,16 +177,16 @@ scsi_card_init(void) /* On-board SCSI controllers get the first bus, so if one is present, increase our instance number here. */ if (machine_has_flags(machine, MACHINE_SCSI)) - max--; + max--; - /* Do not initialize any controllers if we have do not have any SCSI +/* Do not initialize any controllers if we have do not have any SCSI bus left. */ if (max > 0) { - for (i = 0; i < max; i++) { - if (!scsi_cards[scsi_card_current[i]].device) - continue; + for (i = 0; i < max; i++) { + if (!scsi_cards[scsi_card_current[i]].device) + continue; - device_add_inst(scsi_cards[scsi_card_current[i]].device, i + 1); - } + device_add_inst(scsi_cards[scsi_card_current[i]].device, i + 1); + } } } diff --git a/src/scsi/scsi_aha154x.c b/src/scsi/scsi_aha154x.c index 36b0964c2..b94759782 100644 --- a/src/scsi/scsi_aha154x.c +++ b/src/scsi/scsi_aha154x.c @@ -44,7 +44,6 @@ #include <86box/scsi_aha154x.h> #include <86box/scsi_x54x.h> - enum { AHA_154xA, AHA_154xB, @@ -54,59 +53,52 @@ enum { AHA_1640 }; +#define CMD_WRITE_EEPROM 0x22 /* UNDOC: Write EEPROM */ +#define CMD_READ_EEPROM 0x23 /* UNDOC: Read EEPROM */ +#define CMD_SHADOW_RAM 0x24 /* UNDOC: BIOS shadow ram */ +#define CMD_BIOS_MBINIT 0x25 /* UNDOC: BIOS mailbox initialization */ +#define CMD_MEMORY_MAP_1 0x26 /* UNDOC: Memory Mapper */ +#define CMD_MEMORY_MAP_2 0x27 /* UNDOC: Memory Mapper */ +#define CMD_EXTBIOS 0x28 /* UNDOC: return extended BIOS info */ +#define CMD_MBENABLE 0x29 /* set mailbox interface enable */ +#define CMD_BIOS_SCSI 0x82 /* start ROM BIOS SCSI command */ - -#define CMD_WRITE_EEPROM 0x22 /* UNDOC: Write EEPROM */ -#define CMD_READ_EEPROM 0x23 /* UNDOC: Read EEPROM */ -#define CMD_SHADOW_RAM 0x24 /* UNDOC: BIOS shadow ram */ -#define CMD_BIOS_MBINIT 0x25 /* UNDOC: BIOS mailbox initialization */ -#define CMD_MEMORY_MAP_1 0x26 /* UNDOC: Memory Mapper */ -#define CMD_MEMORY_MAP_2 0x27 /* UNDOC: Memory Mapper */ -#define CMD_EXTBIOS 0x28 /* UNDOC: return extended BIOS info */ -#define CMD_MBENABLE 0x29 /* set mailbox interface enable */ -#define CMD_BIOS_SCSI 0x82 /* start ROM BIOS SCSI command */ - - -uint16_t aha_ports[] = { +uint16_t aha_ports[] = { 0x0330, 0x0334, 0x0230, 0x0234, 0x0130, 0x0134, 0x0000, 0x0000 }; static uint8_t *aha1542cp_pnp_rom = NULL; - -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { - uint8_t CustomerSignature[20]; - uint8_t uAutoRetry; - uint8_t uBoardSwitches; - uint8_t uChecksum; - uint8_t uUnknown; - addr24 BIOSMailboxAddress; + uint8_t CustomerSignature[20]; + uint8_t uAutoRetry; + uint8_t uBoardSwitches; + uint8_t uChecksum; + uint8_t uUnknown; + addr24 BIOSMailboxAddress; } aha_setup_t; #pragma pack(pop) - #ifdef ENABLE_AHA154X_LOG int aha_do_log = ENABLE_AHA154X_LOG; - static void aha_log(const char *fmt, ...) { va_list ap; if (aha_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define aha_log(fmt, ...) +# define aha_log(fmt, ...) #endif - /* * Write data to the BIOS space. * @@ -120,422 +112,404 @@ aha_log(const char *fmt, ...) static void aha_mem_write(uint32_t addr, uint8_t val, void *priv) { - x54x_t *dev = (x54x_t *)priv; + x54x_t *dev = (x54x_t *) priv; addr &= 0x3fff; if ((addr >= dev->rom_shram) && (dev->shram_mode & 1)) - dev->shadow_ram[addr & (dev->rom_shramsz - 1)] = val; + dev->shadow_ram[addr & (dev->rom_shramsz - 1)] = val; } - static uint8_t aha_mem_read(uint32_t addr, void *priv) { - x54x_t *dev = (x54x_t *)priv; - rom_t *rom = &dev->bios; + x54x_t *dev = (x54x_t *) priv; + rom_t *rom = &dev->bios; addr &= 0x3fff; if ((addr >= dev->rom_shram) && (dev->shram_mode & 2)) - return dev->shadow_ram[addr & (dev->rom_shramsz - 1)]; + return dev->shadow_ram[addr & (dev->rom_shramsz - 1)]; - return(rom->rom[addr]); + return (rom->rom[addr]); } - static uint8_t aha154x_shram(x54x_t *dev, uint8_t cmd) { /* If not supported, give up. */ - if (dev->rom_shram == 0x0000) return(0x04); + if (dev->rom_shram == 0x0000) + return (0x04); /* Bit 0 = Shadow RAM write enable; Bit 1 = Shadow RAM read enable. */ dev->shram_mode = cmd; /* Firmware expects 04 status. */ - return(0x04); + return (0x04); } - static void aha_eeprom_save(x54x_t *dev) { FILE *f; f = nvr_fopen(dev->nvr_path, "wb"); - if (f) - { - fwrite(dev->nvr, 1, NVR_SIZE, f); - fclose(f); - f = NULL; + if (f) { + fwrite(dev->nvr, 1, NVR_SIZE, f); + fclose(f); + f = NULL; } } - static uint8_t -aha154x_eeprom(x54x_t *dev, uint8_t cmd,uint8_t arg,uint8_t len,uint8_t off,uint8_t *bufp) +aha154x_eeprom(x54x_t *dev, uint8_t cmd, uint8_t arg, uint8_t len, uint8_t off, uint8_t *bufp) { uint8_t r = 0xff; - int c; + int c; aha_log("%s: EEPROM cmd=%02x, arg=%02x len=%d, off=%02x\n", - dev->name, cmd, arg, len, off); + dev->name, cmd, arg, len, off); /* Only if we can handle it.. */ - if (dev->nvr == NULL) return(r); + if (dev->nvr == NULL) + return (r); if (cmd == 0x22) { - /* Write data to the EEPROM. */ - for (c = 0; c < len; c++) - dev->nvr[(off + c) & 0xff] = bufp[c]; - r = 0; + /* Write data to the EEPROM. */ + for (c = 0; c < len; c++) + dev->nvr[(off + c) & 0xff] = bufp[c]; + r = 0; - aha_eeprom_save(dev); + aha_eeprom_save(dev); - if (dev->type == AHA_154xCF) { - if (dev->fdc_address > 0) { - fdc_remove(dev->fdc); - fdc_set_base(dev->fdc, (dev->nvr[0] & EE0_ALTFLOP) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); - } - } + if (dev->type == AHA_154xCF) { + if (dev->fdc_address > 0) { + fdc_remove(dev->fdc); + fdc_set_base(dev->fdc, (dev->nvr[0] & EE0_ALTFLOP) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); + } + } } if (cmd == 0x23) { - /* Read data from the EEPROM. */ - for (c = 0; c < len; c++) - bufp[c] = dev->nvr[(off + c) & 0xff]; - r = len; + /* Read data from the EEPROM. */ + for (c = 0; c < len; c++) + bufp[c] = dev->nvr[(off + c) & 0xff]; + r = len; } - return(r); + return (r); } - /* Map either the main or utility (Select) ROM into the memory space. */ static uint8_t aha154x_mmap(x54x_t *dev, uint8_t cmd) { aha_log("%s: MEMORY cmd=%02x\n", dev->name, cmd); - switch(cmd) { - case 0x26: - /* Disable the mapper, so, set ROM1 active. */ - dev->bios.rom = dev->rom1; - break; + switch (cmd) { + case 0x26: + /* Disable the mapper, so, set ROM1 active. */ + dev->bios.rom = dev->rom1; + break; - case 0x27: - /* Enable the mapper, so, set ROM2 active. */ - dev->bios.rom = dev->rom2; - break; + case 0x27: + /* Enable the mapper, so, set ROM2 active. */ + dev->bios.rom = dev->rom2; + break; } - return(0); + return (0); } - static uint8_t aha_get_host_id(void *p) { - x54x_t *dev = (x54x_t *)p; + x54x_t *dev = (x54x_t *) p; return dev->nvr[0] & 0x07; } - static uint8_t aha_get_irq(void *p) { - x54x_t *dev = (x54x_t *)p; + x54x_t *dev = (x54x_t *) p; return (dev->nvr[1] & 0x07) + 9; } - static uint8_t aha_get_dma(void *p) { - x54x_t *dev = (x54x_t *)p; + x54x_t *dev = (x54x_t *) p; return (dev->nvr[1] >> 4) & 0x07; } - static uint8_t aha_cmd_is_fast(void *p) { - x54x_t *dev = (x54x_t *)p; + x54x_t *dev = (x54x_t *) p; if (dev->Command == CMD_BIOS_SCSI) - return 1; + return 1; else - return 0; + return 0; } - static uint8_t aha_fast_cmds(void *p, uint8_t cmd) { - x54x_t *dev = (x54x_t *)p; + x54x_t *dev = (x54x_t *) p; if (cmd == CMD_BIOS_SCSI) { - dev->BIOSMailboxReq++; - return 1; + dev->BIOSMailboxReq++; + return 1; } return 0; } - static uint8_t aha_param_len(void *p) { - x54x_t *dev = (x54x_t *)p; + x54x_t *dev = (x54x_t *) p; switch (dev->Command) { - case CMD_BIOS_MBINIT: - /* Same as 0x01 for AHA. */ - return sizeof(MailboxInit_t); - break; + case CMD_BIOS_MBINIT: + /* Same as 0x01 for AHA. */ + return sizeof(MailboxInit_t); + break; - case CMD_SHADOW_RAM: - return 1; - break; + case CMD_SHADOW_RAM: + return 1; + break; - case CMD_WRITE_EEPROM: - return 35; - break; + case CMD_WRITE_EEPROM: + return 35; + break; - case CMD_READ_EEPROM: - return 3; + case CMD_READ_EEPROM: + return 3; - case CMD_MBENABLE: - return 2; + case CMD_MBENABLE: + return 2; - case 0x39: - return 3; + case 0x39: + return 3; - case 0x40: - return 2; + case 0x40: + return 2; - default: - return 0; + default: + return 0; } } - static uint8_t aha_cmds(void *p) { - x54x_t *dev = (x54x_t *)p; + x54x_t *dev = (x54x_t *) p; MailboxInit_t *mbi; - if (! dev->CmdParamLeft) { - aha_log("Running Operation Code 0x%02X\n", dev->Command); - switch (dev->Command) { - case CMD_WRITE_EEPROM: /* write EEPROM */ - /* Sent by CF BIOS. */ - dev->DataReplyLeft = - aha154x_eeprom(dev, - dev->Command, - dev->CmdBuf[0], - dev->CmdBuf[1], - dev->CmdBuf[2], - &(dev->CmdBuf[3])); - if (dev->DataReplyLeft == 0xff) { - dev->DataReplyLeft = 0; - dev->Status |= STAT_INVCMD; - } - break; + if (!dev->CmdParamLeft) { + aha_log("Running Operation Code 0x%02X\n", dev->Command); + switch (dev->Command) { + case CMD_WRITE_EEPROM: /* write EEPROM */ + /* Sent by CF BIOS. */ + dev->DataReplyLeft = aha154x_eeprom(dev, + dev->Command, + dev->CmdBuf[0], + dev->CmdBuf[1], + dev->CmdBuf[2], + &(dev->CmdBuf[3])); + if (dev->DataReplyLeft == 0xff) { + dev->DataReplyLeft = 0; + dev->Status |= STAT_INVCMD; + } + break; - case CMD_READ_EEPROM: /* read EEPROM */ - /* Sent by CF BIOS. */ - dev->DataReplyLeft = - aha154x_eeprom(dev, - dev->Command, - dev->CmdBuf[0], - dev->CmdBuf[1], - dev->CmdBuf[2], - dev->DataBuf); - if (dev->DataReplyLeft == 0xff) { - dev->DataReplyLeft = 0; - dev->Status |= STAT_INVCMD; - } - break; + case CMD_READ_EEPROM: /* read EEPROM */ + /* Sent by CF BIOS. */ + dev->DataReplyLeft = aha154x_eeprom(dev, + dev->Command, + dev->CmdBuf[0], + dev->CmdBuf[1], + dev->CmdBuf[2], + dev->DataBuf); + if (dev->DataReplyLeft == 0xff) { + dev->DataReplyLeft = 0; + dev->Status |= STAT_INVCMD; + } + break; - case CMD_SHADOW_RAM: /* Shadow RAM */ - /* - * For AHA1542CF, this is the command - * to play with the Shadow RAM. BIOS - * gives us one argument (00,02,03) - * and expects a 0x04 back in the INTR - * register. --FvK - */ - /* dev->Interrupt = aha154x_shram(dev,val); */ - dev->Interrupt = aha154x_shram(dev, dev->CmdBuf[0]); - break; + case CMD_SHADOW_RAM: /* Shadow RAM */ + /* + * For AHA1542CF, this is the command + * to play with the Shadow RAM. BIOS + * gives us one argument (00,02,03) + * and expects a 0x04 back in the INTR + * register. --FvK + */ + /* dev->Interrupt = aha154x_shram(dev,val); */ + dev->Interrupt = aha154x_shram(dev, dev->CmdBuf[0]); + break; - case CMD_BIOS_MBINIT: /* BIOS Mailbox Initialization */ - /* Sent by CF BIOS. */ - dev->flags |= X54X_MBX_24BIT; + case CMD_BIOS_MBINIT: /* BIOS Mailbox Initialization */ + /* Sent by CF BIOS. */ + dev->flags |= X54X_MBX_24BIT; - mbi = (MailboxInit_t *)dev->CmdBuf; + mbi = (MailboxInit_t *) dev->CmdBuf; - dev->BIOSMailboxInit = 1; - dev->BIOSMailboxCount = mbi->Count; - dev->BIOSMailboxOutAddr = ADDR_TO_U32(mbi->Address); + dev->BIOSMailboxInit = 1; + dev->BIOSMailboxCount = mbi->Count; + dev->BIOSMailboxOutAddr = ADDR_TO_U32(mbi->Address); - aha_log("Initialize BIOS Mailbox: MBO=0x%08lx, %d entries at 0x%08lx\n", - dev->BIOSMailboxOutAddr, - mbi->Count, - ADDR_TO_U32(mbi->Address)); + aha_log("Initialize BIOS Mailbox: MBO=0x%08lx, %d entries at 0x%08lx\n", + dev->BIOSMailboxOutAddr, + mbi->Count, + ADDR_TO_U32(mbi->Address)); - dev->Status &= ~STAT_INIT; - dev->DataReplyLeft = 0; - break; + dev->Status &= ~STAT_INIT; + dev->DataReplyLeft = 0; + break; - case CMD_MEMORY_MAP_1: /* AHA memory mapper */ - case CMD_MEMORY_MAP_2: /* AHA memory mapper */ - /* Sent by CF BIOS. */ - dev->DataReplyLeft = - aha154x_mmap(dev, dev->Command); - break; + case CMD_MEMORY_MAP_1: /* AHA memory mapper */ + case CMD_MEMORY_MAP_2: /* AHA memory mapper */ + /* Sent by CF BIOS. */ + dev->DataReplyLeft = aha154x_mmap(dev, dev->Command); + break; - case CMD_EXTBIOS: /* Return extended BIOS information */ - dev->DataBuf[0] = 0x08; - dev->DataBuf[1] = dev->Lock; - dev->DataReplyLeft = 2; - break; + case CMD_EXTBIOS: /* Return extended BIOS information */ + dev->DataBuf[0] = 0x08; + dev->DataBuf[1] = dev->Lock; + dev->DataReplyLeft = 2; + break; - case CMD_MBENABLE: /* Mailbox interface enable Command */ - dev->DataReplyLeft = 0; - if (dev->CmdBuf[1] == dev->Lock) { - if (dev->CmdBuf[0] & 1) { - dev->Lock = 1; - } else { - dev->Lock = 0; - } - } - break; + case CMD_MBENABLE: /* Mailbox interface enable Command */ + dev->DataReplyLeft = 0; + if (dev->CmdBuf[1] == dev->Lock) { + if (dev->CmdBuf[0] & 1) { + dev->Lock = 1; + } else { + dev->Lock = 0; + } + } + break; - case 0x2C: /* Detect termination status */ - /* Bits 7,6 are termination status and must be 1,0 for the BIOS to work. */ - dev->DataBuf[0] = 0x40; - dev->DataReplyLeft = 1; - break; + case 0x2C: /* Detect termination status */ + /* Bits 7,6 are termination status and must be 1,0 for the BIOS to work. */ + dev->DataBuf[0] = 0x40; + dev->DataReplyLeft = 1; + break; - case 0x2D: /* ???? - Returns two bytes according to the microcode */ - dev->DataBuf[0] = 0x00; - dev->DataBuf[0] = 0x00; - dev->DataReplyLeft = 2; - break; + case 0x2D: /* ???? - Returns two bytes according to the microcode */ + dev->DataBuf[0] = 0x00; + dev->DataBuf[0] = 0x00; + dev->DataReplyLeft = 2; + break; - case 0x33: /* Send the SCSISelect code decompressor program */ - if (dev->cmd_33_len == 0x0000) { - /* If we are on a controller without this command, return invalid command. */ - dev->DataReplyLeft = 0; - dev->Status |= STAT_INVCMD; - break; - } + case 0x33: /* Send the SCSISelect code decompressor program */ + if (dev->cmd_33_len == 0x0000) { + /* If we are on a controller without this command, return invalid command. */ + dev->DataReplyLeft = 0; + dev->Status |= STAT_INVCMD; + break; + } - /* We have to send (decompressor program length + 2 bytes of little endian size). */ - dev->DataReplyLeft = dev->cmd_33_len + 2; - memset(dev->DataBuf, 0x00, dev->DataReplyLeft); - dev->DataBuf[0] = dev->cmd_33_len & 0xff; - dev->DataBuf[1] = (dev->cmd_33_len >> 8) & 0xff; - memcpy(&(dev->DataBuf[2]), dev->cmd_33_buf, dev->cmd_33_len); - break; + /* We have to send (decompressor program length + 2 bytes of little endian size). */ + dev->DataReplyLeft = dev->cmd_33_len + 2; + memset(dev->DataBuf, 0x00, dev->DataReplyLeft); + dev->DataBuf[0] = dev->cmd_33_len & 0xff; + dev->DataBuf[1] = (dev->cmd_33_len >> 8) & 0xff; + memcpy(&(dev->DataBuf[2]), dev->cmd_33_buf, dev->cmd_33_len); + break; - case 0x39: /* Receive 3 bytes: address high, address low, byte to write to that address. */ - /* Since we are not running the actual microcode, just log the received values - (if logging is enabled) and break. */ - aha_log("aha_cmds(): Command 0x39: %02X -> %02X%02X\n", - dev->CmdBuf[2], dev->CmdBuf[0], dev->CmdBuf[1]); - break; + case 0x39: /* Receive 3 bytes: address high, address low, byte to write to that address. */ + /* Since we are not running the actual microcode, just log the received values + (if logging is enabled) and break. */ + aha_log("aha_cmds(): Command 0x39: %02X -> %02X%02X\n", + dev->CmdBuf[2], dev->CmdBuf[0], dev->CmdBuf[1]); + break; - case 0x40: /* Receive 2 bytes: address high, address low, then return one byte from that - address. */ - aha_log("aha_cmds(): Command 0x40: %02X%02X\n", - dev->CmdBuf[0], dev->CmdBuf[1]); - dev->DataReplyLeft = 1; - dev->DataBuf[0] = 0xff; - break; + case 0x40: /* Receive 2 bytes: address high, address low, then return one byte from that + address. */ + aha_log("aha_cmds(): Command 0x40: %02X%02X\n", + dev->CmdBuf[0], dev->CmdBuf[1]); + dev->DataReplyLeft = 1; + dev->DataBuf[0] = 0xff; + break; - default: - dev->DataReplyLeft = 0; - dev->Status |= STAT_INVCMD; - break; - } + default: + dev->DataReplyLeft = 0; + dev->Status |= STAT_INVCMD; + break; + } } return 0; } - static void aha_setup_data(void *p) { - x54x_t *dev = (x54x_t *)p; + x54x_t *dev = (x54x_t *) p; ReplyInquireSetupInformation *ReplyISI; - aha_setup_t *aha_setup; + aha_setup_t *aha_setup; - ReplyISI = (ReplyInquireSetupInformation *)dev->DataBuf; - aha_setup = (aha_setup_t *)ReplyISI->VendorSpecificData; + ReplyISI = (ReplyInquireSetupInformation *) dev->DataBuf; + aha_setup = (aha_setup_t *) ReplyISI->VendorSpecificData; ReplyISI->fSynchronousInitiationEnabled = dev->sync & 1; - ReplyISI->fParityCheckingEnabled = dev->parity & 1; + ReplyISI->fParityCheckingEnabled = dev->parity & 1; U32_TO_ADDR(aha_setup->BIOSMailboxAddress, dev->BIOSMailboxOutAddr); aha_setup->uChecksum = 0xA3; - aha_setup->uUnknown = 0xC2; + aha_setup->uUnknown = 0xC2; } - static void aha_do_bios_mail(x54x_t *dev) { dev->MailboxIsBIOS = 1; if (!dev->BIOSMailboxCount) { - aha_log("aha_do_bios_mail(): No BIOS Mailboxes\n"); - return; + aha_log("aha_do_bios_mail(): No BIOS Mailboxes\n"); + return; } /* Search for a filled mailbox - stop if we have scanned all mailboxes. */ for (dev->BIOSMailboxOutPosCur = 0; dev->BIOSMailboxOutPosCur < dev->BIOSMailboxCount; dev->BIOSMailboxOutPosCur++) { - if (x54x_mbo_process(dev)) - break; + if (x54x_mbo_process(dev)) + break; } } - static void aha_callback(void *p) { - x54x_t *dev = (x54x_t *)p; + x54x_t *dev = (x54x_t *) p; if (dev->BIOSMailboxInit && dev->BIOSMailboxReq) - aha_do_bios_mail(dev); + aha_do_bios_mail(dev); } - static uint8_t aha_mca_read(int port, void *priv) { - x54x_t *dev = (x54x_t *)priv; + x54x_t *dev = (x54x_t *) priv; - return(dev->pos_regs[port & 7]); + return (dev->pos_regs[port & 7]); } - static void aha_mca_write(int port, uint8_t val, void *priv) { - x54x_t *dev = (x54x_t *)priv; + x54x_t *dev = (x54x_t *) priv; /* MCA does not write registers below 0x0100. */ - if (port < 0x0102) return; + if (port < 0x0102) + return; /* Save the MCA register value. */ dev->pos_regs[port & 7] = val; @@ -548,37 +522,39 @@ aha_mca_write(int port, uint8_t val, void *priv) dev->Base |= ((dev->pos_regs[3] & 0xc0) ? 0x34 : 0x30); /* Save the new IRQ and DMA channel values. */ - dev->Irq = (dev->pos_regs[4] & 0x07) + 8; + dev->Irq = (dev->pos_regs[4] & 0x07) + 8; dev->DmaChannel = dev->pos_regs[5] & 0x0f; /* Extract the BIOS ROM address info. */ - if (! (dev->pos_regs[2] & 0x80)) switch(dev->pos_regs[3] & 0x38) { - case 0x38: /* [1]=xx11 1xxx */ - dev->rom_addr = 0xDC000; - break; + if (!(dev->pos_regs[2] & 0x80)) + switch (dev->pos_regs[3] & 0x38) { + case 0x38: /* [1]=xx11 1xxx */ + dev->rom_addr = 0xDC000; + break; - case 0x30: /* [1]=xx11 0xxx */ - dev->rom_addr = 0xD8000; - break; + case 0x30: /* [1]=xx11 0xxx */ + dev->rom_addr = 0xD8000; + break; - case 0x28: /* [1]=xx10 1xxx */ - dev->rom_addr = 0xD4000; - break; + case 0x28: /* [1]=xx10 1xxx */ + dev->rom_addr = 0xD4000; + break; - case 0x20: /* [1]=xx10 0xxx */ - dev->rom_addr = 0xD0000; - break; + case 0x20: /* [1]=xx10 0xxx */ + dev->rom_addr = 0xD0000; + break; - case 0x18: /* [1]=xx01 1xxx */ - dev->rom_addr = 0xCC000; - break; + case 0x18: /* [1]=xx01 1xxx */ + dev->rom_addr = 0xCC000; + break; - case 0x10: /* [1]=xx01 0xxx */ - dev->rom_addr = 0xC8000; - break; - } else { - /* Disabled. */ - dev->rom_addr = 0x000000; + case 0x10: /* [1]=xx01 0xxx */ + dev->rom_addr = 0xC8000; + break; + } + else { + /* Disabled. */ + dev->rom_addr = 0x000000; } /* @@ -595,7 +571,7 @@ aha_mca_write(int port, uint8_t val, void *priv) * * SCSI Parity is pos[2]=xxx1xxxx. */ - dev->sync = (dev->pos_regs[4] >> 3) & 1; + dev->sync = (dev->pos_regs[4] >> 3) & 1; dev->parity = (dev->pos_regs[4] >> 4) & 1; /* @@ -609,122 +585,120 @@ aha_mca_write(int port, uint8_t val, void *priv) /* Initialize the device if fully configured. */ if (dev->pos_regs[2] & 0x01) { - /* Card enabled; register (new) I/O handler. */ - x54x_io_set(dev, dev->Base, 4); + /* Card enabled; register (new) I/O handler. */ + x54x_io_set(dev, dev->Base, 4); - /* Reset the device. */ - x54x_reset_ctrl(dev, CTRL_HRST); + /* Reset the device. */ + x54x_reset_ctrl(dev, CTRL_HRST); - /* Enable or disable the BIOS ROM. */ - if (dev->rom_addr != 0x000000) { - mem_mapping_enable(&dev->bios.mapping); - mem_mapping_set_addr(&dev->bios.mapping, dev->rom_addr, ROM_SIZE); - } + /* Enable or disable the BIOS ROM. */ + if (dev->rom_addr != 0x000000) { + mem_mapping_enable(&dev->bios.mapping); + mem_mapping_set_addr(&dev->bios.mapping, dev->rom_addr, ROM_SIZE); + } - /* Say hello. */ - aha_log("AHA-1640: I/O=%04x, IRQ=%d, DMA=%d, BIOS @%05X, HOST ID %i\n", - dev->Base, dev->Irq, dev->DmaChannel, dev->rom_addr, dev->HostID); + /* Say hello. */ + aha_log("AHA-1640: I/O=%04x, IRQ=%d, DMA=%d, BIOS @%05X, HOST ID %i\n", + dev->Base, dev->Irq, dev->DmaChannel, dev->rom_addr, dev->HostID); } } - static uint8_t aha_mca_feedb(void *priv) { - x54x_t *dev = (x54x_t *)priv; + x54x_t *dev = (x54x_t *) priv; return (dev->pos_regs[2] & 0x01); } - static void aha_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv) { x54x_t *dev = (x54x_t *) priv; - int i; + int i; switch (ld) { - case 0: - if (dev->Base) { - x54x_io_remove(dev, dev->Base, 4); - dev->Base = 0; - } + case 0: + if (dev->Base) { + x54x_io_remove(dev, dev->Base, 4); + dev->Base = 0; + } - dev->Irq = 0; - dev->DmaChannel = ISAPNP_DMA_DISABLED; - dev->rom_addr = 0; + dev->Irq = 0; + dev->DmaChannel = ISAPNP_DMA_DISABLED; + dev->rom_addr = 0; - mem_mapping_disable(&dev->bios.mapping); + mem_mapping_disable(&dev->bios.mapping); - if (config->activate) { - dev->Base = config->io[0].base; - if (dev->Base != ISAPNP_IO_DISABLED) - x54x_io_set(dev, dev->Base, 4); + if (config->activate) { + dev->Base = config->io[0].base; + if (dev->Base != ISAPNP_IO_DISABLED) + x54x_io_set(dev, dev->Base, 4); - /* - * Patch the ROM BIOS image for stuff Adaptec deliberately - * made hard to understand. Well, maybe not, maybe it was - * their way of handling issues like these at the time.. - * - * Patch 1: emulate the I/O ADDR SW setting by patching a - * byte in the BIOS that indicates the I/O ADDR - * switch setting on the board. - */ - if (dev->rom_ioaddr != 0x0000) { - /* Look up the I/O address in the table. */ - for (i=0; i<8; i++) - if (aha_ports[i] == dev->Base) break; - if (i == 8) { - aha_log("%s: invalid I/O address %04x selected!\n", - dev->name, dev->Base); - return; - } - dev->bios.rom[dev->rom_ioaddr] = (uint8_t)i; - /* Negation of the DIP switches to satify the checksum. */ - dev->bios.rom[dev->rom_ioaddr + 1] = (uint8_t)((i ^ 0xff) + 1); - } + /* + * Patch the ROM BIOS image for stuff Adaptec deliberately + * made hard to understand. Well, maybe not, maybe it was + * their way of handling issues like these at the time.. + * + * Patch 1: emulate the I/O ADDR SW setting by patching a + * byte in the BIOS that indicates the I/O ADDR + * switch setting on the board. + */ + if (dev->rom_ioaddr != 0x0000) { + /* Look up the I/O address in the table. */ + for (i = 0; i < 8; i++) + if (aha_ports[i] == dev->Base) + break; + if (i == 8) { + aha_log("%s: invalid I/O address %04x selected!\n", + dev->name, dev->Base); + return; + } + dev->bios.rom[dev->rom_ioaddr] = (uint8_t) i; + /* Negation of the DIP switches to satify the checksum. */ + dev->bios.rom[dev->rom_ioaddr + 1] = (uint8_t) ((i ^ 0xff) + 1); + } - dev->Irq = config->irq[0].irq; - dev->DmaChannel = config->dma[0].dma; + dev->Irq = config->irq[0].irq; + dev->DmaChannel = config->dma[0].dma; - dev->nvr[1] = (dev->Irq - 9) | (dev->DmaChannel << 4); - aha_eeprom_save(dev); + dev->nvr[1] = (dev->Irq - 9) | (dev->DmaChannel << 4); + aha_eeprom_save(dev); - dev->rom_addr = config->mem[0].base; - if (dev->rom_addr) { - mem_mapping_enable(&dev->bios.mapping); - aha_log("SCSI BIOS set to: %08X-%08X\n", dev->rom_addr, dev->rom_addr + config->mem[0].size - 1); - mem_mapping_set_addr(&dev->bios.mapping, dev->rom_addr, config->mem[0].size); - } - } + dev->rom_addr = config->mem[0].base; + if (dev->rom_addr) { + mem_mapping_enable(&dev->bios.mapping); + aha_log("SCSI BIOS set to: %08X-%08X\n", dev->rom_addr, dev->rom_addr + config->mem[0].size - 1); + mem_mapping_set_addr(&dev->bios.mapping, dev->rom_addr, config->mem[0].size); + } + } - break; + break; #ifdef AHA1542CP_FDC - case 1: - if (dev->fdc_address) { - fdc_remove(dev->fdc); - dev->fdc_address = 0; - } + case 1: + if (dev->fdc_address) { + fdc_remove(dev->fdc); + dev->fdc_address = 0; + } - fdc_set_irq(dev->fdc, 0); - fdc_set_dma_ch(dev->fdc, ISAPNP_DMA_DISABLED); + fdc_set_irq(dev->fdc, 0); + fdc_set_dma_ch(dev->fdc, ISAPNP_DMA_DISABLED); - if (config->activate) { - dev->fdc_address = config->io[0].base; - if (dev->fdc_address != ISAPNP_IO_DISABLED) - fdc_set_base(dev->fdc, dev->fdc_address); + if (config->activate) { + dev->fdc_address = config->io[0].base; + if (dev->fdc_address != ISAPNP_IO_DISABLED) + fdc_set_base(dev->fdc, dev->fdc_address); - fdc_set_irq(dev->fdc, config->irq[0].irq); - fdc_set_dma_ch(dev->fdc, config->dma[0].dma); - } + fdc_set_irq(dev->fdc, config->irq[0].irq); + fdc_set_dma_ch(dev->fdc, config->dma[0].dma); + } - break; + break; #endif } } - /* Initialize the board's ROM BIOS. */ static void aha_setbios(x54x_t *dev) @@ -732,17 +706,18 @@ aha_setbios(x54x_t *dev) uint32_t size; uint32_t mask; uint32_t temp; - FILE *f; - int i; + FILE *f; + int i; /* Only if this device has a BIOS ROM. */ - if (dev->bios_path == NULL) return; + if (dev->bios_path == NULL) + return; /* Open the BIOS image file and make sure it exists. */ aha_log("%s: loading BIOS from '%s'\n", dev->name, dev->bios_path); if ((f = rom_fopen(dev->bios_path, "rb")) == NULL) { - aha_log("%s: BIOS ROM not found!\n", dev->name); - return; + aha_log("%s: BIOS ROM not found!\n", dev->name); + return; } /* @@ -752,45 +727,45 @@ aha_setbios(x54x_t *dev) * this special case, we can't: we may need WRITE access to the * memory later on. */ - (void)fseek(f, 0L, SEEK_END); + (void) fseek(f, 0L, SEEK_END); temp = ftell(f); - (void)fseek(f, 0L, SEEK_SET); + (void) fseek(f, 0L, SEEK_SET); /* Load first chunk of BIOS (which is the main BIOS, aka ROM1.) */ dev->rom1 = malloc(ROM_SIZE); (void) !fread(dev->rom1, ROM_SIZE, 1, f); temp -= ROM_SIZE; if (temp > 0) { - dev->rom2 = malloc(ROM_SIZE); - (void) !fread(dev->rom2, ROM_SIZE, 1, f); - temp -= ROM_SIZE; + dev->rom2 = malloc(ROM_SIZE); + (void) !fread(dev->rom2, ROM_SIZE, 1, f); + temp -= ROM_SIZE; } else { - dev->rom2 = NULL; + dev->rom2 = NULL; } if (temp != 0) { - aha_log("%s: BIOS ROM size invalid!\n", dev->name); - free(dev->rom1); - if (dev->rom2 != NULL) - free(dev->rom2); - (void)fclose(f); - return; + aha_log("%s: BIOS ROM size invalid!\n", dev->name); + free(dev->rom1); + if (dev->rom2 != NULL) + free(dev->rom2); + (void) fclose(f); + return; } temp = ftell(f); if (temp > ROM_SIZE) - temp = ROM_SIZE; - (void)fclose(f); + temp = ROM_SIZE; + (void) fclose(f); /* Adjust BIOS size in chunks of 2K, as per BIOS spec. */ size = 0x10000; if (temp <= 0x8000) - size = 0x8000; + size = 0x8000; if (temp <= 0x4000) - size = 0x4000; + size = 0x4000; if (temp <= 0x2000) - size = 0x2000; + size = 0x2000; mask = (size - 1); aha_log("%s: BIOS at 0x%06lX, size %lu, mask %08lx\n", - dev->name, dev->rom_addr, size, mask); + dev->name, dev->rom_addr, size, mask); /* Initialize the ROM entry for this BIOS. */ memset(&dev->bios, 0x00, sizeof(rom_t)); @@ -803,9 +778,9 @@ aha_setbios(x54x_t *dev) /* Map this system into the memory map. */ mem_mapping_add(&dev->bios.mapping, dev->rom_addr, size, - aha_mem_read, NULL, NULL, /* aha_mem_readw, aha_mem_readl, */ - aha_mem_write, NULL, NULL, - dev->bios.rom, MEM_MAPPING_EXTERNAL, dev); + aha_mem_read, NULL, NULL, /* aha_mem_readw, aha_mem_readl, */ + aha_mem_write, NULL, NULL, + dev->bios.rom, MEM_MAPPING_EXTERNAL, dev); mem_mapping_disable(&dev->bios.mapping); /* @@ -818,37 +793,38 @@ aha_setbios(x54x_t *dev) * switch setting on the board. */ if (dev->rom_ioaddr != 0x0000) { - /* Look up the I/O address in the table. */ - for (i=0; i<8; i++) - if (aha_ports[i] == dev->Base) break; - if (i == 8) { - aha_log("%s: invalid I/O address %04x selected!\n", - dev->name, dev->Base); - return; - } - dev->bios.rom[dev->rom_ioaddr] = (uint8_t)i; - /* Negation of the DIP switches to satify the checksum. */ - dev->bios.rom[dev->rom_ioaddr + 1] = (uint8_t)((i ^ 0xff) + 1); + /* Look up the I/O address in the table. */ + for (i = 0; i < 8; i++) + if (aha_ports[i] == dev->Base) + break; + if (i == 8) { + aha_log("%s: invalid I/O address %04x selected!\n", + dev->name, dev->Base); + return; + } + dev->bios.rom[dev->rom_ioaddr] = (uint8_t) i; + /* Negation of the DIP switches to satify the checksum. */ + dev->bios.rom[dev->rom_ioaddr + 1] = (uint8_t) ((i ^ 0xff) + 1); } } - /* Get the SCSISelect code decompressor program from the microcode rom for the AHA-1542CP. */ static void aha_setmcode(x54x_t *dev) { uint32_t temp; - FILE *f; + FILE *f; /* Only if this device has a BIOS ROM. */ - if (dev->mcode_path == NULL) return; + if (dev->mcode_path == NULL) + return; /* Open the microcode image file and make sure it exists. */ aha_log("%s: loading microcode from '%ls'\n", dev->name, dev->bios_path); if ((f = rom_fopen(dev->mcode_path, "rb")) == NULL) { - aha_log("%s: microcode ROM not found!\n", dev->name); - return; + aha_log("%s: microcode ROM not found!\n", dev->name); + return; } /* @@ -858,20 +834,20 @@ aha_setmcode(x54x_t *dev) * this special case, we can't: we may need WRITE access to the * memory later on. */ - (void)fseek(f, 0L, SEEK_END); + (void) fseek(f, 0L, SEEK_END); temp = ftell(f); - (void)fseek(f, 0L, SEEK_SET); + (void) fseek(f, 0L, SEEK_SET); if (temp < (dev->cmd_33_offset + dev->cmd_33_len - 1)) { - aha_log("%s: microcode ROM size invalid!\n", dev->name); - (void)fclose(f); - return; + aha_log("%s: microcode ROM size invalid!\n", dev->name); + (void) fclose(f); + return; } /* Allocate the buffer and then read the real PnP ROM into it. */ if (aha1542cp_pnp_rom != NULL) { - free(aha1542cp_pnp_rom); - aha1542cp_pnp_rom = NULL; + free(aha1542cp_pnp_rom); + aha1542cp_pnp_rom = NULL; } aha1542cp_pnp_rom = (uint8_t *) malloc(dev->pnp_len + 7); fseek(f, dev->pnp_offset, SEEK_SET); @@ -891,29 +867,27 @@ aha_setmcode(x54x_t *dev) fseek(f, dev->cmd_33_offset, SEEK_SET); (void) !fread(dev->cmd_33_buf, dev->cmd_33_len, 1, f); - (void)fclose(f); + (void) fclose(f); } - static void aha_initnvr(x54x_t *dev) { /* Initialize the on-board EEPROM. */ - dev->nvr[0] = dev->HostID; /* SCSI ID 7 */ + dev->nvr[0] = dev->HostID; /* SCSI ID 7 */ dev->nvr[0] |= (0x10 | 0x20 | 0x40); if (dev->fdc_address == FDC_SECONDARY_ADDR) - dev->nvr[0] |= EE0_ALTFLOP; - dev->nvr[1] = dev->Irq-9; /* IRQ15 */ - dev->nvr[1] |= (dev->DmaChannel<<4); /* DMA6 */ - dev->nvr[2] = (EE2_HABIOS | /* BIOS enabled */ - EE2_DYNSCAN | /* scan bus */ - EE2_EXT1G | EE2_RMVOK); /* Imm return on seek */ - dev->nvr[3] = SPEED_50; /* speed 5.0 MB/s */ - dev->nvr[6] = (EE6_TERM | /* host term enable */ - EE6_RSTBUS); /* reset SCSI bus on boot*/ + dev->nvr[0] |= EE0_ALTFLOP; + dev->nvr[1] = dev->Irq - 9; /* IRQ15 */ + dev->nvr[1] |= (dev->DmaChannel << 4); /* DMA6 */ + dev->nvr[2] = (EE2_HABIOS | /* BIOS enabled */ + EE2_DYNSCAN | /* scan bus */ + EE2_EXT1G | EE2_RMVOK); /* Imm return on seek */ + dev->nvr[3] = SPEED_50; /* speed 5.0 MB/s */ + dev->nvr[6] = (EE6_TERM | /* host term enable */ + EE6_RSTBUS); /* reset SCSI bus on boot*/ } - /* Initialize the board's EEPROM (NVR.) */ static void aha_setnvr(x54x_t *dev) @@ -921,42 +895,41 @@ aha_setnvr(x54x_t *dev) FILE *f; /* Only if this device has an EEPROM. */ - if (dev->nvr_path == NULL) return; + if (dev->nvr_path == NULL) + return; /* Allocate and initialize the EEPROM. */ - dev->nvr = (uint8_t *)malloc(NVR_SIZE); + dev->nvr = (uint8_t *) malloc(NVR_SIZE); memset(dev->nvr, 0x00, NVR_SIZE); f = nvr_fopen(dev->nvr_path, "rb"); if (f) { - if (fread(dev->nvr, 1, NVR_SIZE, f) != NVR_SIZE) - fatal("aha_setnvr(): Error reading data\n"); - fclose(f); - f = NULL; + if (fread(dev->nvr, 1, NVR_SIZE, f) != NVR_SIZE) + fatal("aha_setnvr(): Error reading data\n"); + fclose(f); + f = NULL; } else - aha_initnvr(dev); + aha_initnvr(dev); if (dev->type == AHA_154xCF) { - if (dev->fdc_address > 0) { - fdc_remove(dev->fdc); - fdc_set_base(dev->fdc, (dev->nvr[0] & EE0_ALTFLOP) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); - } + if (dev->fdc_address > 0) { + fdc_remove(dev->fdc); + fdc_set_base(dev->fdc, (dev->nvr[0] & EE0_ALTFLOP) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR); + } } } - void aha1542cp_close(void *priv) { if (aha1542cp_pnp_rom != NULL) { - free(aha1542cp_pnp_rom); - aha1542cp_pnp_rom = NULL; + free(aha1542cp_pnp_rom); + aha1542cp_pnp_rom = NULL; } x54x_close(priv); } - /* General initialization routine for all boards. */ static void * aha_init(const device_t *info) @@ -964,7 +937,7 @@ aha_init(const device_t *info) x54x_t *dev; /* Call common initializer. */ - dev = x54x_init(info); + dev = x54x_init(info); dev->bus = scsi_get_bus(); /* @@ -974,143 +947,141 @@ aha_init(const device_t *info) * and so any info we get here will be overwritten by the * MCA-assigned values later on! */ - dev->Base = device_get_config_hex16("base"); - dev->Irq = device_get_config_int("irq"); + dev->Base = device_get_config_hex16("base"); + dev->Irq = device_get_config_int("irq"); dev->DmaChannel = device_get_config_int("dma"); - dev->rom_addr = device_get_config_hex20("bios_addr"); + dev->rom_addr = device_get_config_hex20("bios_addr"); if (!(dev->card_bus & DEVICE_MCA)) - dev->fdc_address = device_get_config_hex16("fdc_addr"); + dev->fdc_address = device_get_config_hex16("fdc_addr"); else - dev->fdc_address = 0; - dev->HostID = 7; /* default HA ID */ + dev->fdc_address = 0; + dev->HostID = 7; /* default HA ID */ dev->setup_info_len = sizeof(aha_setup_t); - dev->max_id = 7; - dev->flags = 0; + dev->max_id = 7; + dev->flags = 0; - dev->ven_callback = aha_callback; - dev->ven_cmd_is_fast = aha_cmd_is_fast; - dev->ven_fast_cmds = aha_fast_cmds; + dev->ven_callback = aha_callback; + dev->ven_cmd_is_fast = aha_cmd_is_fast; + dev->ven_fast_cmds = aha_fast_cmds; dev->get_ven_param_len = aha_param_len; - dev->ven_cmds = aha_cmds; - dev->get_ven_data = aha_setup_data; + dev->ven_cmds = aha_cmds; + dev->get_ven_data = aha_setup_data; - dev->mcode_path = NULL; - dev->cmd_33_len = 0x0000; + dev->mcode_path = NULL; + dev->cmd_33_len = 0x0000; dev->cmd_33_offset = 0x0000; memset(dev->cmd_33_buf, 0x00, 4096); strcpy(dev->vendor, "Adaptec"); /* Perform per-board initialization. */ - switch(dev->type) { - case AHA_154xA: - strcpy(dev->name, "AHA-154xA"); - dev->fw_rev = "A003"; /* The 3.07 microcode says A006. */ - dev->bios_path = "roms/scsi/adaptec/aha1540a307.bin"; /*Only for port 0x330*/ - /* This is configurable from the configuration for the 154xB, the rest of the controllers read it from the EEPROM. */ - dev->HostID = device_get_config_int("hostid"); - dev->rom_shram = 0x3F80; /* shadow RAM address base */ - dev->rom_shramsz = 128; /* size of shadow RAM */ - dev->ha_bps = 5000000.0; /* normal SCSI */ - break; + switch (dev->type) { + case AHA_154xA: + strcpy(dev->name, "AHA-154xA"); + dev->fw_rev = "A003"; /* The 3.07 microcode says A006. */ + dev->bios_path = "roms/scsi/adaptec/aha1540a307.bin"; /*Only for port 0x330*/ + /* This is configurable from the configuration for the 154xB, the rest of the controllers read it from the EEPROM. */ + dev->HostID = device_get_config_int("hostid"); + dev->rom_shram = 0x3F80; /* shadow RAM address base */ + dev->rom_shramsz = 128; /* size of shadow RAM */ + dev->ha_bps = 5000000.0; /* normal SCSI */ + break; - case AHA_154xB: - strcpy(dev->name, "AHA-154xB"); - switch(dev->Base) { - case 0x0330: - dev->bios_path = - "roms/scsi/adaptec/aha1540b320_330.bin"; - break; + case AHA_154xB: + strcpy(dev->name, "AHA-154xB"); + switch (dev->Base) { + case 0x0330: + dev->bios_path = "roms/scsi/adaptec/aha1540b320_330.bin"; + break; - case 0x0334: - dev->bios_path = - "roms/scsi/adaptec/aha1540b320_334.bin"; - break; - } - dev->fw_rev = "A005"; /* The 3.2 microcode says A012. */ - /* This is configurable from the configuration for the 154xB, the rest of the controllers read it from the EEPROM. */ - dev->HostID = device_get_config_int("hostid"); - dev->rom_shram = 0x3F80; /* shadow RAM address base */ - dev->rom_shramsz = 128; /* size of shadow RAM */ - dev->ha_bps = 5000000.0; /* normal SCSI */ - break; + case 0x0334: + dev->bios_path = "roms/scsi/adaptec/aha1540b320_334.bin"; + break; + } + dev->fw_rev = "A005"; /* The 3.2 microcode says A012. */ + /* This is configurable from the configuration for the 154xB, the rest of the controllers read it from the EEPROM. */ + dev->HostID = device_get_config_int("hostid"); + dev->rom_shram = 0x3F80; /* shadow RAM address base */ + dev->rom_shramsz = 128; /* size of shadow RAM */ + dev->ha_bps = 5000000.0; /* normal SCSI */ + break; - case AHA_154xC: - strcpy(dev->name, "AHA-154xC"); - dev->bios_path = "roms/scsi/adaptec/aha1542c102.bin"; - dev->nvr_path = "aha1542c.nvr"; - dev->fw_rev = "D001"; - dev->rom_shram = 0x3F80; /* shadow RAM address base */ - dev->rom_shramsz = 128; /* size of shadow RAM */ - dev->rom_ioaddr = 0x3F7E; /* [2:0] idx into addr table */ - dev->rom_fwhigh = 0x0022; /* firmware version (hi/lo) */ - dev->ven_get_host_id = aha_get_host_id; /* function to return host ID from EEPROM */ - dev->ven_get_irq = aha_get_irq; /* function to return IRQ from EEPROM */ - dev->ven_get_dma = aha_get_dma; /* function to return DMA channel from EEPROM */ - dev->ha_bps = 5000000.0; /* normal SCSI */ - break; + case AHA_154xC: + strcpy(dev->name, "AHA-154xC"); + dev->bios_path = "roms/scsi/adaptec/aha1542c102.bin"; + dev->nvr_path = "aha1542c.nvr"; + dev->fw_rev = "D001"; + dev->rom_shram = 0x3F80; /* shadow RAM address base */ + dev->rom_shramsz = 128; /* size of shadow RAM */ + dev->rom_ioaddr = 0x3F7E; /* [2:0] idx into addr table */ + dev->rom_fwhigh = 0x0022; /* firmware version (hi/lo) */ + dev->ven_get_host_id = aha_get_host_id; /* function to return host ID from EEPROM */ + dev->ven_get_irq = aha_get_irq; /* function to return IRQ from EEPROM */ + dev->ven_get_dma = aha_get_dma; /* function to return DMA channel from EEPROM */ + dev->ha_bps = 5000000.0; /* normal SCSI */ + break; - case AHA_154xCF: - strcpy(dev->name, "AHA-154xCF"); - dev->bios_path = "roms/scsi/adaptec/aha1542cf211.bin"; - dev->nvr_path = "aha1542cf.nvr"; - dev->fw_rev = "E001"; - dev->rom_shram = 0x3F80; /* shadow RAM address base */ - dev->rom_shramsz = 128; /* size of shadow RAM */ - dev->rom_ioaddr = 0x3F7E; /* [2:0] idx into addr table */ - dev->rom_fwhigh = 0x0022; /* firmware version (hi/lo) */ - dev->flags |= X54X_CDROM_BOOT; - dev->ven_get_host_id = aha_get_host_id; /* function to return host ID from EEPROM */ - dev->ven_get_irq = aha_get_irq; /* function to return IRQ from EEPROM */ - dev->ven_get_dma = aha_get_dma; /* function to return DMA channel from EEPROM */ - dev->ha_bps = 10000000.0; /* fast SCSI */ - if (dev->fdc_address > 0) - dev->fdc = device_add(&fdc_at_device); - break; + case AHA_154xCF: + strcpy(dev->name, "AHA-154xCF"); + dev->bios_path = "roms/scsi/adaptec/aha1542cf211.bin"; + dev->nvr_path = "aha1542cf.nvr"; + dev->fw_rev = "E001"; + dev->rom_shram = 0x3F80; /* shadow RAM address base */ + dev->rom_shramsz = 128; /* size of shadow RAM */ + dev->rom_ioaddr = 0x3F7E; /* [2:0] idx into addr table */ + dev->rom_fwhigh = 0x0022; /* firmware version (hi/lo) */ + dev->flags |= X54X_CDROM_BOOT; + dev->ven_get_host_id = aha_get_host_id; /* function to return host ID from EEPROM */ + dev->ven_get_irq = aha_get_irq; /* function to return IRQ from EEPROM */ + dev->ven_get_dma = aha_get_dma; /* function to return DMA channel from EEPROM */ + dev->ha_bps = 10000000.0; /* fast SCSI */ + if (dev->fdc_address > 0) + dev->fdc = device_add(&fdc_at_device); + break; - case AHA_154xCP: - strcpy(dev->name, "AHA-154xCP"); - dev->bios_path = "roms/scsi/adaptec/aha1542cp102.bin"; - dev->mcode_path = "roms/scsi/adaptec/908301-00_f_mcode_17c9.u12"; - dev->nvr_path = "aha1542cp.nvr"; - dev->fw_rev = "F001"; - dev->rom_shram = 0x3F80; /* shadow RAM address base */ - dev->rom_shramsz = 128; /* size of shadow RAM */ - dev->rom_ioaddr = 0x3F7E; /* [2:0] idx into addr table */ - dev->rom_fwhigh = 0x0055; /* firmware version (hi/lo) */ - dev->flags |= X54X_CDROM_BOOT; - dev->flags |= X54X_ISAPNP; - dev->ven_get_host_id = aha_get_host_id; /* function to return host ID from EEPROM */ - dev->ven_get_irq = aha_get_irq; /* function to return IRQ from EEPROM */ - dev->ven_get_dma = aha_get_dma; /* function to return DMA channel from EEPROM */ - dev->ha_bps = 10000000.0; /* fast SCSI */ - dev->pnp_len = 0x00be; /* length of the PnP ROM */ - dev->pnp_offset = 0x533d; /* offset of the PnP ROM in the microcode ROM */ - dev->cmd_33_len = 0x06dc; /* length of the SCSISelect code expansion routine returned by - SCSI controller command 0x33 */ - dev->cmd_33_offset = 0x7000; /* offset of the SCSISelect code expansion routine in the - microcode ROM */ - aha_setmcode(dev); - if (aha1542cp_pnp_rom) - isapnp_add_card(aha1542cp_pnp_rom, dev->pnp_len + 7, aha_pnp_config_changed, NULL, NULL, NULL, dev); + case AHA_154xCP: + strcpy(dev->name, "AHA-154xCP"); + dev->bios_path = "roms/scsi/adaptec/aha1542cp102.bin"; + dev->mcode_path = "roms/scsi/adaptec/908301-00_f_mcode_17c9.u12"; + dev->nvr_path = "aha1542cp.nvr"; + dev->fw_rev = "F001"; + dev->rom_shram = 0x3F80; /* shadow RAM address base */ + dev->rom_shramsz = 128; /* size of shadow RAM */ + dev->rom_ioaddr = 0x3F7E; /* [2:0] idx into addr table */ + dev->rom_fwhigh = 0x0055; /* firmware version (hi/lo) */ + dev->flags |= X54X_CDROM_BOOT; + dev->flags |= X54X_ISAPNP; + dev->ven_get_host_id = aha_get_host_id; /* function to return host ID from EEPROM */ + dev->ven_get_irq = aha_get_irq; /* function to return IRQ from EEPROM */ + dev->ven_get_dma = aha_get_dma; /* function to return DMA channel from EEPROM */ + dev->ha_bps = 10000000.0; /* fast SCSI */ + dev->pnp_len = 0x00be; /* length of the PnP ROM */ + dev->pnp_offset = 0x533d; /* offset of the PnP ROM in the microcode ROM */ + dev->cmd_33_len = 0x06dc; /* length of the SCSISelect code expansion routine returned by + SCSI controller command 0x33 */ + dev->cmd_33_offset = 0x7000; /* offset of the SCSISelect code expansion routine in the + microcode ROM */ + aha_setmcode(dev); + if (aha1542cp_pnp_rom) + isapnp_add_card(aha1542cp_pnp_rom, dev->pnp_len + 7, aha_pnp_config_changed, NULL, NULL, NULL, dev); #ifdef AHA1542CP_FDC - dev->fdc = device_add(&fdc_at_device); + dev->fdc = device_add(&fdc_at_device); #endif - break; + break; - case AHA_1640: - strcpy(dev->name, "AHA-1640"); - dev->bios_path = "roms/scsi/adaptec/aha1640.bin"; - dev->fw_rev = "BB01"; + case AHA_1640: + strcpy(dev->name, "AHA-1640"); + dev->bios_path = "roms/scsi/adaptec/aha1640.bin"; + dev->fw_rev = "BB01"; - dev->flags |= X54X_LBA_BIOS; + dev->flags |= X54X_LBA_BIOS; - /* Enable MCA. */ - dev->pos_regs[0] = 0x1F; /* MCA board ID */ - dev->pos_regs[1] = 0x0F; - mca_add(aha_mca_read, aha_mca_write, aha_mca_feedb, NULL, dev); - dev->ha_bps = 5000000.0; /* normal SCSI */ - break; + /* Enable MCA. */ + dev->pos_regs[0] = 0x1F; /* MCA board ID */ + dev->pos_regs[1] = 0x0F; + mca_add(aha_mca_read, aha_mca_write, aha_mca_feedb, NULL, dev); + dev->ha_bps = 5000000.0; /* normal SCSI */ + break; } /* Initialize ROM BIOS if needed. */ @@ -1120,22 +1091,22 @@ aha_init(const device_t *info) aha_setnvr(dev); if (dev->Base != 0) { - /* Initialize the device. */ - x54x_device_reset(dev); + /* Initialize the device. */ + x54x_device_reset(dev); if (!(dev->card_bus & DEVICE_MCA) && !(dev->flags & X54X_ISAPNP)) { - /* Register our address space. */ - x54x_io_set(dev, dev->Base, 4); + /* Register our address space. */ + x54x_io_set(dev, dev->Base, 4); - /* Enable the memory. */ - if (dev->rom_addr != 0x000000) { - mem_mapping_enable(&dev->bios.mapping); - mem_mapping_set_addr(&dev->bios.mapping, dev->rom_addr, ROM_SIZE); - } - } + /* Enable the memory. */ + if (dev->rom_addr != 0x000000) { + mem_mapping_enable(&dev->bios.mapping); + mem_mapping_set_addr(&dev->bios.mapping, dev->rom_addr, ROM_SIZE); + } + } } - return(dev); + return (dev); } // clang-format off @@ -1397,85 +1368,85 @@ static const device_config_t aha_154xcf_config[] = { // clang-format on const device_t aha154xa_device = { - .name = "Adaptec AHA-154xA", + .name = "Adaptec AHA-154xA", .internal_name = "aha154xa", - .flags = DEVICE_ISA | DEVICE_AT, - .local = AHA_154xA, - .init = aha_init, - .close = x54x_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = AHA_154xA, + .init = aha_init, + .close = x54x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = aha_154xb_config + .force_redraw = NULL, + .config = aha_154xb_config }; const device_t aha154xb_device = { - .name = "Adaptec AHA-154xB", + .name = "Adaptec AHA-154xB", .internal_name = "aha154xb", - .flags = DEVICE_ISA | DEVICE_AT, - .local = AHA_154xB, - .init = aha_init, - .close = x54x_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = AHA_154xB, + .init = aha_init, + .close = x54x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = aha_154xb_config + .force_redraw = NULL, + .config = aha_154xb_config }; const device_t aha154xc_device = { - .name = "Adaptec AHA-154xC", + .name = "Adaptec AHA-154xC", .internal_name = "aha154xc", - .flags = DEVICE_ISA | DEVICE_AT, - .local = AHA_154xC, - .init = aha_init, - .close = x54x_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = AHA_154xC, + .init = aha_init, + .close = x54x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = aha_154x_config + .force_redraw = NULL, + .config = aha_154x_config }; const device_t aha154xcf_device = { - .name = "Adaptec AHA-154xCF", + .name = "Adaptec AHA-154xCF", .internal_name = "aha154xcf", - .flags = DEVICE_ISA | DEVICE_AT, - .local = AHA_154xCF, - .init = aha_init, - .close = x54x_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = AHA_154xCF, + .init = aha_init, + .close = x54x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = aha_154xcf_config + .force_redraw = NULL, + .config = aha_154xcf_config }; const device_t aha154xcp_device = { - .name = "Adaptec AHA-154xCP", + .name = "Adaptec AHA-154xCP", .internal_name = "aha154xcp", - .flags = DEVICE_ISA | DEVICE_AT, - .local = AHA_154xCP, - .init = aha_init, - .close = aha1542cp_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = AHA_154xCP, + .init = aha_init, + .close = aha1542cp_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t aha1640_device = { - .name = "Adaptec AHA-1640", + .name = "Adaptec AHA-1640", .internal_name = "aha1640", - .flags = DEVICE_MCA, - .local = AHA_1640, - .init = aha_init, - .close = x54x_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = AHA_1640, + .init = aha_init, + .close = x54x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/scsi/scsi_buslogic.c b/src/scsi/scsi_buslogic.c index 00fda1c89..9a4810412 100644 --- a/src/scsi/scsi_buslogic.c +++ b/src/scsi/scsi_buslogic.c @@ -47,65 +47,64 @@ #include <86box/scsi_device.h> #include <86box/scsi_x54x.h> - /* * Auto SCSI structure which is located * in host adapter RAM and contains several * configuration parameters. */ -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { - uint8_t aInternalSignature[2]; - uint8_t cbInformation; - uint8_t aHostAdaptertype[6]; - uint8_t uReserved1; - uint8_t fFloppyEnabled :1, - fFloppySecondary :1, - fLevelSensitiveInterrupt:1, - uReserved2 :2, - uSystemRAMAreForBIOS :3; - uint8_t uDMAChannel :7, - fDMAAutoConfiguration :1, - uIrqChannel :7, - fIrqAutoConfiguration :1; - uint8_t uDMATransferRate; - uint8_t uSCSIId; - uint8_t uSCSIConfiguration; - uint8_t uBusOnDelay; - uint8_t uBusOffDelay; - uint8_t uBIOSConfiguration; - uint16_t u16DeviceEnabledMask; - uint16_t u16WidePermittedMask; - uint16_t u16FastPermittedMask; - uint16_t u16SynchronousPermittedMask; - uint16_t u16DisconnectPermittedMask; - uint16_t u16SendStartUnitCommandMask; - uint16_t u16IgnoreInBIOSScanMask; - unsigned char uPCIInterruptPin : 2; - unsigned char uHostAdapterIoPortAddress : 2; - uint8_t fRoundRobinScheme : 1; - uint8_t fVesaBusSpeedGreaterThan33MHz : 1; - uint8_t fVesaBurstWrite : 1; - uint8_t fVesaBurstRead : 1; + uint8_t aInternalSignature[2]; + uint8_t cbInformation; + uint8_t aHostAdaptertype[6]; + uint8_t uReserved1; + uint8_t fFloppyEnabled : 1, + fFloppySecondary : 1, + fLevelSensitiveInterrupt : 1, + uReserved2 : 2, + uSystemRAMAreForBIOS : 3; + uint8_t uDMAChannel : 7, + fDMAAutoConfiguration : 1, + uIrqChannel : 7, + fIrqAutoConfiguration : 1; + uint8_t uDMATransferRate; + uint8_t uSCSIId; + uint8_t uSCSIConfiguration; + uint8_t uBusOnDelay; + uint8_t uBusOffDelay; + uint8_t uBIOSConfiguration; + uint16_t u16DeviceEnabledMask; + uint16_t u16WidePermittedMask; + uint16_t u16FastPermittedMask; + uint16_t u16SynchronousPermittedMask; + uint16_t u16DisconnectPermittedMask; + uint16_t u16SendStartUnitCommandMask; + uint16_t u16IgnoreInBIOSScanMask; + unsigned char uPCIInterruptPin : 2; + unsigned char uHostAdapterIoPortAddress : 2; + uint8_t fRoundRobinScheme : 1; + uint8_t fVesaBusSpeedGreaterThan33MHz : 1; + uint8_t fVesaBurstWrite : 1; + uint8_t fVesaBurstRead : 1; uint16_t u16UltraPermittedMask; uint32_t uReserved5; uint8_t uReserved6; uint8_t uAutoSCSIMaximumLUN; - uint8_t fReserved7 : 1; - uint8_t fSCAMDominant : 1; - uint8_t fSCAMenabled : 1; - uint8_t fSCAMLevel2 : 1; - unsigned char uReserved8 : 4; - uint8_t fInt13Extension : 1; - uint8_t fReserved9 : 1; - uint8_t fCDROMBoot : 1; - unsigned char uReserved10 : 2; - uint8_t fMultiBoot : 1; - unsigned char uReserved11 : 2; - unsigned char uBootTargetId : 4; - unsigned char uBootChannel : 4; - uint8_t fForceBusDeviceScanningOrder : 1; - unsigned char uReserved12 : 7; + uint8_t fReserved7 : 1; + uint8_t fSCAMDominant : 1; + uint8_t fSCAMenabled : 1; + uint8_t fSCAMLevel2 : 1; + unsigned char uReserved8 : 4; + uint8_t fInt13Extension : 1; + uint8_t fReserved9 : 1; + uint8_t fCDROMBoot : 1; + unsigned char uReserved10 : 2; + uint8_t fMultiBoot : 1; + unsigned char uReserved11 : 2; + unsigned char uBootTargetId : 4; + unsigned char uBootChannel : 4; + uint8_t fForceBusDeviceScanningOrder : 1; + unsigned char uReserved12 : 7; uint16_t u16NonTaggedToAlternateLunPermittedMask; uint16_t u16RenegotiateSyncAfterCheckConditionMask; uint8_t aReserved14[10]; @@ -115,186 +114,180 @@ typedef struct { #pragma pack(pop) /* The local RAM. */ -#pragma pack(push,1) +#pragma pack(push, 1) typedef union { - uint8_t u8View[256]; /* byte view */ - struct { /* structured view */ - uint8_t u8Bios[64]; /* offset 0 - 63 is for BIOS */ - AutoSCSIRam autoSCSIData; /* Auto SCSI structure */ + uint8_t u8View[256]; /* byte view */ + struct { /* structured view */ + uint8_t u8Bios[64]; /* offset 0 - 63 is for BIOS */ + AutoSCSIRam autoSCSIData; /* Auto SCSI structure */ } structured; } HALocalRAM; #pragma pack(pop) /** Structure for the INQUIRE_SETUP_INFORMATION reply. */ -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { - uint8_t uSignature; - uint8_t uCharacterD; - uint8_t uHostBusType; - uint8_t uWideTransferPermittedId0To7; - uint8_t uWideTransfersActiveId0To7; + uint8_t uSignature; + uint8_t uCharacterD; + uint8_t uHostBusType; + uint8_t uWideTransferPermittedId0To7; + uint8_t uWideTransfersActiveId0To7; ReplyInquireSetupInformationSynchronousValue SynchronousValuesId8To15[8]; - uint8_t uDisconnectPermittedId8To15; - uint8_t uReserved2; - uint8_t uWideTransferPermittedId8To15; - uint8_t uWideTransfersActiveId8To15; + uint8_t uDisconnectPermittedId8To15; + uint8_t uReserved2; + uint8_t uWideTransferPermittedId8To15; + uint8_t uWideTransfersActiveId8To15; } buslogic_setup_t; #pragma pack(pop) /* Structure for the INQUIRE_EXTENDED_SETUP_INFORMATION. */ -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { - uint8_t uBusType; - uint8_t uBiosAddress; - uint16_t u16ScatterGatherLimit; - uint8_t cMailbox; - uint32_t uMailboxAddressBase; - uint8_t uReserved1 :2, - fFastEISA :1, - uReserved2 :3, - fLevelSensitiveInterrupt:1, - uReserved3 :1; - uint8_t aFirmwareRevision[3]; - uint8_t fHostWideSCSI :1, - fHostDifferentialSCSI :1, - fHostSupportsSCAM :1, - fHostUltraSCSI :1, - fHostSmartTermination :1, - uReserved4 :3; + uint8_t uBusType; + uint8_t uBiosAddress; + uint16_t u16ScatterGatherLimit; + uint8_t cMailbox; + uint32_t uMailboxAddressBase; + uint8_t uReserved1 : 2, + fFastEISA : 1, + uReserved2 : 3, + fLevelSensitiveInterrupt : 1, + uReserved3 : 1; + uint8_t aFirmwareRevision[3]; + uint8_t fHostWideSCSI : 1, + fHostDifferentialSCSI : 1, + fHostSupportsSCAM : 1, + fHostUltraSCSI : 1, + fHostSmartTermination : 1, + uReserved4 : 3; } ReplyInquireExtendedSetupInformation; #pragma pack(pop) /* Structure for the INQUIRE_PCI_HOST_ADAPTER_INFORMATION reply. */ -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { - uint8_t IsaIOPort; - uint8_t IRQ; - uint8_t LowByteTerminated :1, - HighByteTerminated :1, - uReserved :2, /* Reserved. */ - JP1 :1, /* Whatever that means. */ - JP2 :1, /* Whatever that means. */ - JP3 :1, /* Whatever that means. */ - InformationIsValid :1; - uint8_t uReserved2; /* Reserved. */ + uint8_t IsaIOPort; + uint8_t IRQ; + uint8_t LowByteTerminated : 1, + HighByteTerminated : 1, + uReserved : 2, /* Reserved. */ + JP1 : 1, /* Whatever that means. */ + JP2 : 1, /* Whatever that means. */ + JP3 : 1, /* Whatever that means. */ + InformationIsValid : 1; + uint8_t uReserved2; /* Reserved. */ } BuslogicPCIInformation_t; #pragma pack(pop) -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { /** Data length. */ - uint32_t DataLength; + uint32_t DataLength; /** Data pointer. */ - uint32_t DataPointer; + uint32_t DataPointer; /** The device the request is sent to. */ - uint8_t TargetId; + uint8_t TargetId; /** The LUN in the device. */ - uint8_t LogicalUnit; + uint8_t LogicalUnit; /** Reserved */ - unsigned char Reserved1 : 3; + unsigned char Reserved1 : 3; /** Data direction for the request. */ - unsigned char DataDirection : 2; + unsigned char DataDirection : 2; /** Reserved */ - unsigned char Reserved2 : 3; + unsigned char Reserved2 : 3; /** Length of the SCSI CDB. */ - uint8_t CDBLength; + uint8_t CDBLength; /** The SCSI CDB. (A CDB can be 12 bytes long.) */ - uint8_t CDB[12]; + uint8_t CDB[12]; } ESCMD; #pragma pack(pop) -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { - uint8_t Count; - uint32_t Address; + uint8_t Count; + uint32_t Address; } MailboxInitExtended_t; #pragma pack(pop) -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { - rom_t bios; - int ExtendedLUNCCBFormat; - int fAggressiveRoundRobinMode; - HALocalRAM LocalRAM; - int PCIBase; - int MMIOBase; - int chip; - int has_bios; - uint32_t bios_addr, - bios_size, - bios_mask; - uint8_t AutoSCSIROM[32768]; - uint8_t SCAMData[65536]; + rom_t bios; + int ExtendedLUNCCBFormat; + int fAggressiveRoundRobinMode; + HALocalRAM LocalRAM; + int PCIBase; + int MMIOBase; + int chip; + int has_bios; + uint32_t bios_addr, + bios_size, + bios_mask; + uint8_t AutoSCSIROM[32768]; + uint8_t SCAMData[65536]; } buslogic_data_t; #pragma pack(pop) - enum { CHIP_BUSLOGIC_ISA_542B_1991_12_14, CHIP_BUSLOGIC_ISA_545S_1992_10_05, CHIP_BUSLOGIC_ISA_542BH_1993_05_23, CHIP_BUSLOGIC_ISA_545C_1994_12_01, - CHIP_BUSLOGIC_VLB_445S_1993_11_16, - CHIP_BUSLOGIC_VLB_445C_1994_12_01, + CHIP_BUSLOGIC_VLB_445S_1993_11_16, + CHIP_BUSLOGIC_VLB_445C_1994_12_01, CHIP_BUSLOGIC_MCA_640A_1993_05_23, - CHIP_BUSLOGIC_PCI_958D_1995_12_30 + CHIP_BUSLOGIC_PCI_958D_1995_12_30 }; - #ifdef ENABLE_BUSLOGIC_LOG int buslogic_do_log = ENABLE_BUSLOGIC_LOG; - static void buslogic_log(const char *fmt, ...) { va_list ap; if (buslogic_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define buslogic_log(fmt, ...) +# define buslogic_log(fmt, ...) #endif - static char * BuslogicGetNVRFileName(buslogic_data_t *bl) { - switch(bl->chip) - { - case CHIP_BUSLOGIC_ISA_542B_1991_12_14: - return "bt542b.nvr"; - case CHIP_BUSLOGIC_ISA_545S_1992_10_05: - return "bt545s.nvr"; - case CHIP_BUSLOGIC_ISA_542BH_1993_05_23: - return "bt542bh.nvr"; - case CHIP_BUSLOGIC_ISA_545C_1994_12_01: - return "bt545c.nvr"; - case CHIP_BUSLOGIC_VLB_445S_1993_11_16: - return "bt445s.nvr"; - case CHIP_BUSLOGIC_VLB_445C_1994_12_01: - return "bt445c.nvr"; - case CHIP_BUSLOGIC_MCA_640A_1993_05_23: - return "bt640a.nvr"; - case CHIP_BUSLOGIC_PCI_958D_1995_12_30: - return "bt958d.nvr"; - default: - fatal("Unrecognized BusLogic chip: %i\n", bl->chip); - return NULL; - } + switch (bl->chip) { + case CHIP_BUSLOGIC_ISA_542B_1991_12_14: + return "bt542b.nvr"; + case CHIP_BUSLOGIC_ISA_545S_1992_10_05: + return "bt545s.nvr"; + case CHIP_BUSLOGIC_ISA_542BH_1993_05_23: + return "bt542bh.nvr"; + case CHIP_BUSLOGIC_ISA_545C_1994_12_01: + return "bt545c.nvr"; + case CHIP_BUSLOGIC_VLB_445S_1993_11_16: + return "bt445s.nvr"; + case CHIP_BUSLOGIC_VLB_445C_1994_12_01: + return "bt445c.nvr"; + case CHIP_BUSLOGIC_MCA_640A_1993_05_23: + return "bt640a.nvr"; + case CHIP_BUSLOGIC_PCI_958D_1995_12_30: + return "bt958d.nvr"; + default: + fatal("Unrecognized BusLogic chip: %i\n", bl->chip); + return NULL; + } } - static void BuslogicAutoSCSIRamSetDefaults(x54x_t *dev, uint8_t safe) { - buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; - HALocalRAM *HALR = &bl->LocalRAM; + buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; + HALocalRAM *HALR = &bl->LocalRAM; memset(&(HALR->structured.autoSCSIData), 0, sizeof(AutoSCSIRam)); @@ -308,290 +301,270 @@ BuslogicAutoSCSIRamSetDefaults(x54x_t *dev, uint8_t safe) HALR->structured.autoSCSIData.aHostAdaptertype[0] = ' '; HALR->structured.autoSCSIData.aHostAdaptertype[5] = ' '; switch (bl->chip) { - case CHIP_BUSLOGIC_ISA_542B_1991_12_14: - memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "542B", 4); - break; - case CHIP_BUSLOGIC_ISA_545S_1992_10_05: - memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "545S", 4); - break; - case CHIP_BUSLOGIC_ISA_542BH_1993_05_23: - memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "542BH", 5); - break; - case CHIP_BUSLOGIC_ISA_545C_1994_12_01: - memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "545C", 4); - break; - case CHIP_BUSLOGIC_VLB_445S_1993_11_16: - memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "445S", 4); - break; - case CHIP_BUSLOGIC_VLB_445C_1994_12_01: - memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "445C", 4); - break; - case CHIP_BUSLOGIC_MCA_640A_1993_05_23: - memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "640A", 4); - break; - case CHIP_BUSLOGIC_PCI_958D_1995_12_30: - memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "958D", 4); - break; + case CHIP_BUSLOGIC_ISA_542B_1991_12_14: + memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "542B", 4); + break; + case CHIP_BUSLOGIC_ISA_545S_1992_10_05: + memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "545S", 4); + break; + case CHIP_BUSLOGIC_ISA_542BH_1993_05_23: + memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "542BH", 5); + break; + case CHIP_BUSLOGIC_ISA_545C_1994_12_01: + memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "545C", 4); + break; + case CHIP_BUSLOGIC_VLB_445S_1993_11_16: + memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "445S", 4); + break; + case CHIP_BUSLOGIC_VLB_445C_1994_12_01: + memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "445C", 4); + break; + case CHIP_BUSLOGIC_MCA_640A_1993_05_23: + memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "640A", 4); + break; + case CHIP_BUSLOGIC_PCI_958D_1995_12_30: + memcpy(&(HALR->structured.autoSCSIData.aHostAdaptertype[1]), "958D", 4); + break; } HALR->structured.autoSCSIData.fLevelSensitiveInterrupt = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 1 : 0; - HALR->structured.autoSCSIData.uSystemRAMAreForBIOS = 6; + HALR->structured.autoSCSIData.uSystemRAMAreForBIOS = 6; if (bl->chip != CHIP_BUSLOGIC_PCI_958D_1995_12_30) { - switch(dev->DmaChannel) { - case 5: - HALR->structured.autoSCSIData.uDMAChannel = 1; - break; - case 6: - HALR->structured.autoSCSIData.uDMAChannel = 2; - break; - case 7: - HALR->structured.autoSCSIData.uDMAChannel = 3; - break; - default: - HALR->structured.autoSCSIData.uDMAChannel = 0; - break; - } + switch (dev->DmaChannel) { + case 5: + HALR->structured.autoSCSIData.uDMAChannel = 1; + break; + case 6: + HALR->structured.autoSCSIData.uDMAChannel = 2; + break; + case 7: + HALR->structured.autoSCSIData.uDMAChannel = 3; + break; + default: + HALR->structured.autoSCSIData.uDMAChannel = 0; + break; + } } HALR->structured.autoSCSIData.fDMAAutoConfiguration = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 0 : 1; if (bl->chip != CHIP_BUSLOGIC_PCI_958D_1995_12_30) { - switch(dev->Irq) { - case 9: - HALR->structured.autoSCSIData.uIrqChannel = 1; - break; - case 10: - HALR->structured.autoSCSIData.uIrqChannel = 2; - break; - case 11: - HALR->structured.autoSCSIData.uIrqChannel = 3; - break; - case 12: - HALR->structured.autoSCSIData.uIrqChannel = 4; - break; - case 14: - HALR->structured.autoSCSIData.uIrqChannel = 5; - break; - case 15: - HALR->structured.autoSCSIData.uIrqChannel = 6; - break; - default: - HALR->structured.autoSCSIData.uIrqChannel = 0; - break; - } + switch (dev->Irq) { + case 9: + HALR->structured.autoSCSIData.uIrqChannel = 1; + break; + case 10: + HALR->structured.autoSCSIData.uIrqChannel = 2; + break; + case 11: + HALR->structured.autoSCSIData.uIrqChannel = 3; + break; + case 12: + HALR->structured.autoSCSIData.uIrqChannel = 4; + break; + case 14: + HALR->structured.autoSCSIData.uIrqChannel = 5; + break; + case 15: + HALR->structured.autoSCSIData.uIrqChannel = 6; + break; + default: + HALR->structured.autoSCSIData.uIrqChannel = 0; + break; + } } HALR->structured.autoSCSIData.fIrqAutoConfiguration = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 0 : 1; HALR->structured.autoSCSIData.uDMATransferRate = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 0 : 1; - HALR->structured.autoSCSIData.uSCSIId = 7; + HALR->structured.autoSCSIData.uSCSIId = 7; HALR->structured.autoSCSIData.uSCSIConfiguration = 0x3F; - HALR->structured.autoSCSIData.uBusOnDelay = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 0 : 7; - HALR->structured.autoSCSIData.uBusOffDelay = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 0 : 4; + HALR->structured.autoSCSIData.uBusOnDelay = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 0 : 7; + HALR->structured.autoSCSIData.uBusOffDelay = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 0 : 4; HALR->structured.autoSCSIData.uBIOSConfiguration = (bl->has_bios) ? 0x33 : 0x32; if (!safe) - HALR->structured.autoSCSIData.uBIOSConfiguration |= 0x04; + HALR->structured.autoSCSIData.uBIOSConfiguration |= 0x04; - HALR->structured.autoSCSIData.u16DeviceEnabledMask = 0xffff; - HALR->structured.autoSCSIData.u16WidePermittedMask = 0xffff; - HALR->structured.autoSCSIData.u16FastPermittedMask = 0xffff; + HALR->structured.autoSCSIData.u16DeviceEnabledMask = 0xffff; + HALR->structured.autoSCSIData.u16WidePermittedMask = 0xffff; + HALR->structured.autoSCSIData.u16FastPermittedMask = 0xffff; HALR->structured.autoSCSIData.u16DisconnectPermittedMask = 0xffff; - HALR->structured.autoSCSIData.uPCIInterruptPin = PCI_INTA; + HALR->structured.autoSCSIData.uPCIInterruptPin = PCI_INTA; HALR->structured.autoSCSIData.fVesaBusSpeedGreaterThan33MHz = 1; HALR->structured.autoSCSIData.uAutoSCSIMaximumLUN = 7; HALR->structured.autoSCSIData.fForceBusDeviceScanningOrder = 1; - HALR->structured.autoSCSIData.fInt13Extension = safe ? 0 : 1; - HALR->structured.autoSCSIData.fCDROMBoot = safe ? 0 : 1; - HALR->structured.autoSCSIData.fMultiBoot = safe ? 0 : 1; - HALR->structured.autoSCSIData.fRoundRobinScheme = safe ? 1 : 0; /* 1 = aggressive, 0 = strict */ + HALR->structured.autoSCSIData.fInt13Extension = safe ? 0 : 1; + HALR->structured.autoSCSIData.fCDROMBoot = safe ? 0 : 1; + HALR->structured.autoSCSIData.fMultiBoot = safe ? 0 : 1; + HALR->structured.autoSCSIData.fRoundRobinScheme = safe ? 1 : 0; /* 1 = aggressive, 0 = strict */ - HALR->structured.autoSCSIData.uHostAdapterIoPortAddress = 2; /* 0 = primary (330h), 1 = secondary (334h), 2 = disable, 3 = reserved */ + HALR->structured.autoSCSIData.uHostAdapterIoPortAddress = 2; /* 0 = primary (330h), 1 = secondary (334h), 2 = disable, 3 = reserved */ } - static void BuslogicInitializeAutoSCSIRam(x54x_t *dev) { - buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; - HALocalRAM *HALR = &bl->LocalRAM; + buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; + HALocalRAM *HALR = &bl->LocalRAM; FILE *f; f = nvr_fopen(BuslogicGetNVRFileName(bl), "rb"); - if (f) - { - if (fread(&(bl->LocalRAM.structured.autoSCSIData), 1, 64, f) != 64) - fatal("BuslogicInitializeAutoSCSIRam(): Error reading data\n"); - fclose(f); - f = NULL; - if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) { - x54x_io_remove(dev, dev->Base, 4); - switch(HALR->structured.autoSCSIData.uHostAdapterIoPortAddress) { - case 0: - dev->Base = 0x330; - break; - case 1: - dev->Base = 0x334; - break; - default: - dev->Base = 0; - break; - } - x54x_io_set(dev, dev->Base, 4); - } - } - else - { - BuslogicAutoSCSIRamSetDefaults(dev, 0); + if (f) { + if (fread(&(bl->LocalRAM.structured.autoSCSIData), 1, 64, f) != 64) + fatal("BuslogicInitializeAutoSCSIRam(): Error reading data\n"); + fclose(f); + f = NULL; + if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) { + x54x_io_remove(dev, dev->Base, 4); + switch (HALR->structured.autoSCSIData.uHostAdapterIoPortAddress) { + case 0: + dev->Base = 0x330; + break; + case 1: + dev->Base = 0x334; + break; + default: + dev->Base = 0; + break; + } + x54x_io_set(dev, dev->Base, 4); + } + } else { + BuslogicAutoSCSIRamSetDefaults(dev, 0); } } - static void buslogic_cmd_phase1(void *p) { - x54x_t *dev = (x54x_t *)p; + x54x_t *dev = (x54x_t *) p; if ((dev->CmdParam == 2) && (dev->Command == 0x90)) { - dev->CmdParamLeft = dev->CmdBuf[1]; + dev->CmdParamLeft = dev->CmdBuf[1]; } if ((dev->CmdParam == 10) && ((dev->Command == 0x97) || (dev->Command == 0xA7))) { - dev->CmdParamLeft = dev->CmdBuf[6]; - dev->CmdParamLeft <<= 8; - dev->CmdParamLeft |= dev->CmdBuf[7]; - dev->CmdParamLeft <<= 8; - dev->CmdParamLeft |= dev->CmdBuf[8]; + dev->CmdParamLeft = dev->CmdBuf[6]; + dev->CmdParamLeft <<= 8; + dev->CmdParamLeft |= dev->CmdBuf[7]; + dev->CmdParamLeft <<= 8; + dev->CmdParamLeft |= dev->CmdBuf[8]; } if ((dev->CmdParam == 4) && (dev->Command == 0xA9)) { - dev->CmdParamLeft = dev->CmdBuf[3]; - dev->CmdParamLeft <<= 8; - dev->CmdParamLeft |= dev->CmdBuf[2]; + dev->CmdParamLeft = dev->CmdBuf[3]; + dev->CmdParamLeft <<= 8; + dev->CmdParamLeft |= dev->CmdBuf[2]; } } - static uint8_t buslogic_get_host_id(void *p) { - x54x_t *dev = (x54x_t *)p; - buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; + x54x_t *dev = (x54x_t *) p; + buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; HALocalRAM *HALR = &bl->LocalRAM; - if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) || - (bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) || - (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) || - (bl->chip == CHIP_BUSLOGIC_VLB_445S_1993_11_16)) - return dev->HostID; + if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) || (bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) || (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) || (bl->chip == CHIP_BUSLOGIC_VLB_445S_1993_11_16)) + return dev->HostID; else - return HALR->structured.autoSCSIData.uSCSIId; + return HALR->structured.autoSCSIData.uSCSIId; } - static uint8_t buslogic_get_irq(void *p) { - x54x_t *dev = (x54x_t *)p; - buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; + x54x_t *dev = (x54x_t *) p; + buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; uint8_t bl_irq[7] = { 0, 9, 10, 11, 12, 14, 15 }; HALocalRAM *HALR = &bl->LocalRAM; - if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) || - (bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) || - (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) || - (bl->chip == CHIP_BUSLOGIC_VLB_445S_1993_11_16) || - (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30)) - return dev->Irq; + if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) || (bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) || (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) || (bl->chip == CHIP_BUSLOGIC_VLB_445S_1993_11_16) || (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30)) + return dev->Irq; else - return bl_irq[HALR->structured.autoSCSIData.uIrqChannel]; + return bl_irq[HALR->structured.autoSCSIData.uIrqChannel]; } - static uint8_t buslogic_get_dma(void *p) { - x54x_t *dev = (x54x_t *)p; - buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; + x54x_t *dev = (x54x_t *) p; + buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; uint8_t bl_dma[4] = { 0, 5, 6, 7 }; HALocalRAM *HALR = &bl->LocalRAM; if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) - return (dev->Base ? 7 : 0); - else if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) || - (bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) || - (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) || - (bl->chip == CHIP_BUSLOGIC_VLB_445S_1993_11_16)) - return dev->DmaChannel; + return (dev->Base ? 7 : 0); + else if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) || (bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) || (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) || (bl->chip == CHIP_BUSLOGIC_VLB_445S_1993_11_16)) + return dev->DmaChannel; else - return bl_dma[HALR->structured.autoSCSIData.uDMAChannel]; + return bl_dma[HALR->structured.autoSCSIData.uDMAChannel]; } - static uint8_t buslogic_param_len(void *p) { - x54x_t *dev = (x54x_t *)p; - buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; + x54x_t *dev = (x54x_t *) p; + buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; switch (dev->Command) { - case 0x21: - return 5; - case 0x25: - case 0x8B: - case 0x8C: - case 0x8D: - case 0x8F: - case 0x92: - case 0x96: - return 1; - case 0x81: - return sizeof(MailboxInitExtended_t); - case 0x83: - return 12; - case 0x90: - case 0x91: - return 2; - case 0x94: - case 0xFB: - return 3; - case 0x93: /* Valid only for VLB */ - return (bl->chip == CHIP_BUSLOGIC_VLB_445C_1994_12_01 || bl->chip == CHIP_BUSLOGIC_VLB_445S_1993_11_16) ? 1 : 0; - case 0x95: /* Valid only for PCI */ - return (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 1 : 0; - case 0x97: /* Valid only for PCI */ - case 0xA7: /* Valid only for PCI */ - return (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 10 : 0; - case 0xA8: /* Valid only for PCI */ - case 0xA9: /* Valid only for PCI */ - return (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 4 : 0; - default: - return 0; + case 0x21: + return 5; + case 0x25: + case 0x8B: + case 0x8C: + case 0x8D: + case 0x8F: + case 0x92: + case 0x96: + return 1; + case 0x81: + return sizeof(MailboxInitExtended_t); + case 0x83: + return 12; + case 0x90: + case 0x91: + return 2; + case 0x94: + case 0xFB: + return 3; + case 0x93: /* Valid only for VLB */ + return (bl->chip == CHIP_BUSLOGIC_VLB_445C_1994_12_01 || bl->chip == CHIP_BUSLOGIC_VLB_445S_1993_11_16) ? 1 : 0; + case 0x95: /* Valid only for PCI */ + return (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 1 : 0; + case 0x97: /* Valid only for PCI */ + case 0xA7: /* Valid only for PCI */ + return (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 10 : 0; + case 0xA8: /* Valid only for PCI */ + case 0xA9: /* Valid only for PCI */ + return (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 4 : 0; + default: + return 0; } } - static void BuslogicSCSIBIOSDMATransfer(x54x_t *dev, ESCMD *ESCSICmd, uint8_t TargetID, int dir, int transfer_size) { - uint32_t DataPointer = ESCSICmd->DataPointer; - int DataLength = ESCSICmd->DataLength; - uint32_t Address; - uint32_t TransferLength; + uint32_t DataPointer = ESCSICmd->DataPointer; + int DataLength = ESCSICmd->DataLength; + uint32_t Address; + uint32_t TransferLength; scsi_device_t *sd = &scsi_devices[dev->bus][TargetID]; if (ESCSICmd->DataDirection == 0x03) { - /* Non-data command. */ - buslogic_log("BuslogicSCSIBIOSDMATransfer(): Non-data control byte\n"); - return; + /* Non-data command. */ + buslogic_log("BuslogicSCSIBIOSDMATransfer(): Non-data control byte\n"); + return; } buslogic_log("BuslogicSCSIBIOSDMATransfer(): BIOS Data Buffer read: length %d, pointer 0x%04X\n", DataLength, DataPointer); @@ -599,39 +572,38 @@ BuslogicSCSIBIOSDMATransfer(x54x_t *dev, ESCMD *ESCSICmd, uint8_t TargetID, int /* If the control byte is 0x00, it means that the transfer direction is set up by the SCSI command without checking its length, so do this procedure for both read/write commands. */ if ((DataLength > 0) && (sd->buffer_length > 0)) { - Address = DataPointer; - TransferLength = MIN(DataLength, sd->buffer_length); + Address = DataPointer; + TransferLength = MIN(DataLength, sd->buffer_length); - if (dir && ((ESCSICmd->DataDirection == CCB_DATA_XFER_OUT) || (ESCSICmd->DataDirection == 0x00))) { - buslogic_log("BusLogic BIOS DMA: Reading %i bytes from %08X\n", TransferLength, Address); - dma_bm_read(Address, (uint8_t *)sd->sc->temp_buffer, TransferLength, transfer_size); - } else if (!dir && ((ESCSICmd->DataDirection == CCB_DATA_XFER_IN) || (ESCSICmd->DataDirection == 0x00))) { - buslogic_log("BusLogic BIOS DMA: Writing %i bytes at %08X\n", TransferLength, Address); - dma_bm_write(Address, (uint8_t *)sd->sc->temp_buffer, TransferLength, transfer_size); - } + if (dir && ((ESCSICmd->DataDirection == CCB_DATA_XFER_OUT) || (ESCSICmd->DataDirection == 0x00))) { + buslogic_log("BusLogic BIOS DMA: Reading %i bytes from %08X\n", TransferLength, Address); + dma_bm_read(Address, (uint8_t *) sd->sc->temp_buffer, TransferLength, transfer_size); + } else if (!dir && ((ESCSICmd->DataDirection == CCB_DATA_XFER_IN) || (ESCSICmd->DataDirection == 0x00))) { + buslogic_log("BusLogic BIOS DMA: Writing %i bytes at %08X\n", TransferLength, Address); + dma_bm_write(Address, (uint8_t *) sd->sc->temp_buffer, TransferLength, transfer_size); + } } } - static void BuslogicSCSIBIOSRequestSetup(x54x_t *dev, uint8_t *CmdBuf, uint8_t *DataInBuf, uint8_t DataReply) { - ESCMD *ESCSICmd = (ESCMD *)CmdBuf; + ESCMD *ESCSICmd = (ESCMD *) CmdBuf; uint32_t i; - uint8_t temp_cdb[12]; - int target_cdb_len = 12; + uint8_t temp_cdb[12]; + int target_cdb_len = 12; #ifdef ENABLE_BUSLOGIC_LOG uint8_t target_id = 0; #endif - int phase; + int phase; scsi_device_t *sd = &scsi_devices[dev->bus][ESCSICmd->TargetId]; DataInBuf[0] = DataInBuf[1] = 0; if ((ESCSICmd->TargetId > 15) || (ESCSICmd->LogicalUnit > 7)) { - DataInBuf[2] = CCB_INVALID_CCB; - DataInBuf[3] = SCSI_STATUS_OK; - return; + DataInBuf[2] = CCB_INVALID_CCB; + DataInBuf[3] = SCSI_STATUS_OK; + return; } buslogic_log("Scanning SCSI Target ID %i\n", ESCSICmd->TargetId); @@ -639,34 +611,35 @@ BuslogicSCSIBIOSRequestSetup(x54x_t *dev, uint8_t *CmdBuf, uint8_t *DataInBuf, u sd->status = SCSI_STATUS_OK; if (!scsi_device_present(sd) || (ESCSICmd->LogicalUnit > 0)) { - buslogic_log("SCSI Target ID %i has no device attached\n", ESCSICmd->TargetId); - DataInBuf[2] = CCB_SELECTION_TIMEOUT; - DataInBuf[3] = SCSI_STATUS_OK; - return; + buslogic_log("SCSI Target ID %i has no device attached\n", ESCSICmd->TargetId); + DataInBuf[2] = CCB_SELECTION_TIMEOUT; + DataInBuf[3] = SCSI_STATUS_OK; + return; } else { - buslogic_log("SCSI Target ID %i detected and working\n", ESCSICmd->TargetId); - scsi_device_identify(sd, ESCSICmd->LogicalUnit); + buslogic_log("SCSI Target ID %i detected and working\n", ESCSICmd->TargetId); + scsi_device_identify(sd, ESCSICmd->LogicalUnit); - buslogic_log("Transfer Control %02X\n", ESCSICmd->DataDirection); - buslogic_log("CDB Length %i\n", ESCSICmd->CDBLength); + buslogic_log("Transfer Control %02X\n", ESCSICmd->DataDirection); + buslogic_log("CDB Length %i\n", ESCSICmd->CDBLength); } target_cdb_len = 12; - if (!scsi_device_valid(sd)) fatal("SCSI target on ID %02i has disappeared\n", ESCSICmd->TargetId); + if (!scsi_device_valid(sd)) + fatal("SCSI target on ID %02i has disappeared\n", ESCSICmd->TargetId); buslogic_log("SCSI target command being executed on: SCSI ID %i, SCSI LUN %i, Target %i\n", ESCSICmd->TargetId, ESCSICmd->LogicalUnit, target_id); buslogic_log("SCSI Cdb[0]=0x%02X\n", ESCSICmd->CDB[0]); for (i = 1; i < ESCSICmd->CDBLength; i++) { - buslogic_log("SCSI Cdb[%i]=%i\n", i, ESCSICmd->CDB[i]); + buslogic_log("SCSI Cdb[%i]=%i\n", i, ESCSICmd->CDB[i]); } memset(temp_cdb, 0, target_cdb_len); if (ESCSICmd->CDBLength <= target_cdb_len) { - memcpy(temp_cdb, ESCSICmd->CDB, ESCSICmd->CDBLength); + memcpy(temp_cdb, ESCSICmd->CDB, ESCSICmd->CDBLength); } else { - memcpy(temp_cdb, ESCSICmd->CDB, target_cdb_len); + memcpy(temp_cdb, ESCSICmd->CDB, target_cdb_len); } sd->buffer_length = ESCSICmd->DataLength; @@ -675,459 +648,444 @@ BuslogicSCSIBIOSRequestSetup(x54x_t *dev, uint8_t *CmdBuf, uint8_t *DataInBuf, u phase = sd->phase; if (phase != SCSI_PHASE_STATUS) { - BuslogicSCSIBIOSDMATransfer(dev, ESCSICmd, ESCSICmd->TargetId, (phase == SCSI_PHASE_DATA_OUT), dev->transfer_size); - scsi_device_command_phase1(sd); + BuslogicSCSIBIOSDMATransfer(dev, ESCSICmd, ESCSICmd->TargetId, (phase == SCSI_PHASE_DATA_OUT), dev->transfer_size); + scsi_device_command_phase1(sd); } buslogic_log("BIOS Request complete\n"); scsi_device_identify(sd, SCSI_LUN_USE_CDB); if (sd->status == SCSI_STATUS_OK) { - DataInBuf[2] = CCB_COMPLETE; - DataInBuf[3] = SCSI_STATUS_OK; + DataInBuf[2] = CCB_COMPLETE; + DataInBuf[3] = SCSI_STATUS_OK; } else if (scsi_devices[dev->bus][ESCSICmd->TargetId].status == SCSI_STATUS_CHECK_CONDITION) { - DataInBuf[2] = CCB_COMPLETE; - DataInBuf[3] = SCSI_STATUS_CHECK_CONDITION; + DataInBuf[2] = CCB_COMPLETE; + DataInBuf[3] = SCSI_STATUS_CHECK_CONDITION; } dev->DataReplyLeft = DataReply; } - static uint8_t buslogic_cmds(void *p) { - x54x_t *dev = (x54x_t *)p; - buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; + x54x_t *dev = (x54x_t *) p; + buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; HALocalRAM *HALR = &bl->LocalRAM; - FILE *f; - uint16_t TargetsPresentMask = 0; - uint32_t Offset; - int i = 0; - MailboxInitExtended_t *MailboxInitE; + FILE *f; + uint16_t TargetsPresentMask = 0; + uint32_t Offset; + int i = 0; + MailboxInitExtended_t *MailboxInitE; ReplyInquireExtendedSetupInformation *ReplyIESI; - BuslogicPCIInformation_t *ReplyPI; - int cCharsToTransfer; + BuslogicPCIInformation_t *ReplyPI; + int cCharsToTransfer; - buslogic_log("Buslogic cmds = 0x%02x\n", dev->Command); + buslogic_log("Buslogic cmds = 0x%02x\n", dev->Command); switch (dev->Command) { - case 0x20: - dev->DataReplyLeft = 0; - x54x_reset_ctrl(dev, 1); - break; - case 0x21: - if (dev->CmdParam == 1) - dev->CmdParamLeft = dev->CmdBuf[0]; - dev->DataReplyLeft = 0; - break; - case 0x23: - memset(dev->DataBuf, 0, 8); - for (i = 8; i < 15; i++) { - dev->DataBuf[i - 8] = 0; - if (scsi_device_present(&scsi_devices[dev->bus][i]) && (i != buslogic_get_host_id(dev))) - dev->DataBuf[i - 8] |= 1; - } - dev->DataReplyLeft = 8; - break; - case 0x24: - for (i = 0; i < 15; i++) { - if (scsi_device_present(&scsi_devices[dev->bus][i]) && (i != buslogic_get_host_id(dev))) - TargetsPresentMask |= (1 << i); - } - dev->DataBuf[0] = TargetsPresentMask & 0xFF; - dev->DataBuf[1] = TargetsPresentMask >> 8; - dev->DataReplyLeft = 2; - break; - case 0x25: - if (dev->CmdBuf[0] == 0) - dev->IrqEnabled = 0; - else - dev->IrqEnabled = 1; - return 1; - case 0x81: - dev->flags &= ~X54X_MBX_24BIT; + case 0x20: + dev->DataReplyLeft = 0; + x54x_reset_ctrl(dev, 1); + break; + case 0x21: + if (dev->CmdParam == 1) + dev->CmdParamLeft = dev->CmdBuf[0]; + dev->DataReplyLeft = 0; + break; + case 0x23: + memset(dev->DataBuf, 0, 8); + for (i = 8; i < 15; i++) { + dev->DataBuf[i - 8] = 0; + if (scsi_device_present(&scsi_devices[dev->bus][i]) && (i != buslogic_get_host_id(dev))) + dev->DataBuf[i - 8] |= 1; + } + dev->DataReplyLeft = 8; + break; + case 0x24: + for (i = 0; i < 15; i++) { + if (scsi_device_present(&scsi_devices[dev->bus][i]) && (i != buslogic_get_host_id(dev))) + TargetsPresentMask |= (1 << i); + } + dev->DataBuf[0] = TargetsPresentMask & 0xFF; + dev->DataBuf[1] = TargetsPresentMask >> 8; + dev->DataReplyLeft = 2; + break; + case 0x25: + if (dev->CmdBuf[0] == 0) + dev->IrqEnabled = 0; + else + dev->IrqEnabled = 1; + return 1; + case 0x81: + dev->flags &= ~X54X_MBX_24BIT; - MailboxInitE = (MailboxInitExtended_t *)dev->CmdBuf; + MailboxInitE = (MailboxInitExtended_t *) dev->CmdBuf; - dev->MailboxInit = 1; - dev->MailboxCount = MailboxInitE->Count; - dev->MailboxOutAddr = MailboxInitE->Address; - dev->MailboxInAddr = MailboxInitE->Address + (dev->MailboxCount * sizeof(Mailbox32_t)); + dev->MailboxInit = 1; + dev->MailboxCount = MailboxInitE->Count; + dev->MailboxOutAddr = MailboxInitE->Address; + dev->MailboxInAddr = MailboxInitE->Address + (dev->MailboxCount * sizeof(Mailbox32_t)); - buslogic_log("Buslogic Extended Initialize Mailbox Command\n"); - buslogic_log("Mailbox Out Address=0x%08X\n", dev->MailboxOutAddr); - buslogic_log("Mailbox In Address=0x%08X\n", dev->MailboxInAddr); - buslogic_log("Initialized Extended Mailbox, %d entries at 0x%08X\n", MailboxInitE->Count, MailboxInitE->Address); + buslogic_log("Buslogic Extended Initialize Mailbox Command\n"); + buslogic_log("Mailbox Out Address=0x%08X\n", dev->MailboxOutAddr); + buslogic_log("Mailbox In Address=0x%08X\n", dev->MailboxInAddr); + buslogic_log("Initialized Extended Mailbox, %d entries at 0x%08X\n", MailboxInitE->Count, MailboxInitE->Address); - dev->Status &= ~STAT_INIT; - dev->DataReplyLeft = 0; - break; - case 0x83: - if (dev->CmdParam == 12) { - dev->CmdParamLeft = dev->CmdBuf[11]; - buslogic_log("Execute SCSI BIOS Command: %u more bytes follow\n", dev->CmdParamLeft); - } else { - buslogic_log("Execute SCSI BIOS Command: received %u bytes\n", dev->CmdBuf[0]); - BuslogicSCSIBIOSRequestSetup(dev, dev->CmdBuf, dev->DataBuf, 4); - } - break; - case 0x84: - dev->DataBuf[0] = dev->fw_rev[4]; - dev->DataReplyLeft = 1; - break; - case 0x85: - if (strlen(dev->fw_rev) == 6) - dev->DataBuf[0] = dev->fw_rev[5]; - else - dev->DataBuf[0] = ' '; - dev->DataReplyLeft = 1; - break; - case 0x86: - if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) { - ReplyPI = (BuslogicPCIInformation_t *) dev->DataBuf; - memset(ReplyPI, 0, sizeof(BuslogicPCIInformation_t)); - ReplyPI->InformationIsValid = 0; - switch(dev->Base) { - case 0x330: - ReplyPI->IsaIOPort = 0; - break; - case 0x334: - ReplyPI->IsaIOPort = 1; - break; - case 0x230: - ReplyPI->IsaIOPort = 2; - break; - case 0x234: - ReplyPI->IsaIOPort = 3; - break; - case 0x130: - ReplyPI->IsaIOPort = 4; - break; - case 0x134: - ReplyPI->IsaIOPort = 5; - break; - default: - ReplyPI->IsaIOPort = 6; - break; - } - ReplyPI->IRQ = dev->Irq; - dev->DataReplyLeft = sizeof(BuslogicPCIInformation_t); - } else { - dev->DataReplyLeft = 0; - dev->Status |= STAT_INVCMD; - } - break; - case 0x8B: - /* The reply length is set by the guest and is found in the first byte of the command buffer. */ - dev->DataReplyLeft = dev->CmdBuf[0]; - memset(dev->DataBuf, 0, dev->DataReplyLeft); - if (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) - i = 5; - else - i = 4; - cCharsToTransfer = MIN(dev->DataReplyLeft, i); + dev->Status &= ~STAT_INIT; + dev->DataReplyLeft = 0; + break; + case 0x83: + if (dev->CmdParam == 12) { + dev->CmdParamLeft = dev->CmdBuf[11]; + buslogic_log("Execute SCSI BIOS Command: %u more bytes follow\n", dev->CmdParamLeft); + } else { + buslogic_log("Execute SCSI BIOS Command: received %u bytes\n", dev->CmdBuf[0]); + BuslogicSCSIBIOSRequestSetup(dev, dev->CmdBuf, dev->DataBuf, 4); + } + break; + case 0x84: + dev->DataBuf[0] = dev->fw_rev[4]; + dev->DataReplyLeft = 1; + break; + case 0x85: + if (strlen(dev->fw_rev) == 6) + dev->DataBuf[0] = dev->fw_rev[5]; + else + dev->DataBuf[0] = ' '; + dev->DataReplyLeft = 1; + break; + case 0x86: + if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) { + ReplyPI = (BuslogicPCIInformation_t *) dev->DataBuf; + memset(ReplyPI, 0, sizeof(BuslogicPCIInformation_t)); + ReplyPI->InformationIsValid = 0; + switch (dev->Base) { + case 0x330: + ReplyPI->IsaIOPort = 0; + break; + case 0x334: + ReplyPI->IsaIOPort = 1; + break; + case 0x230: + ReplyPI->IsaIOPort = 2; + break; + case 0x234: + ReplyPI->IsaIOPort = 3; + break; + case 0x130: + ReplyPI->IsaIOPort = 4; + break; + case 0x134: + ReplyPI->IsaIOPort = 5; + break; + default: + ReplyPI->IsaIOPort = 6; + break; + } + ReplyPI->IRQ = dev->Irq; + dev->DataReplyLeft = sizeof(BuslogicPCIInformation_t); + } else { + dev->DataReplyLeft = 0; + dev->Status |= STAT_INVCMD; + } + break; + case 0x8B: + /* The reply length is set by the guest and is found in the first byte of the command buffer. */ + dev->DataReplyLeft = dev->CmdBuf[0]; + memset(dev->DataBuf, 0, dev->DataReplyLeft); + if (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) + i = 5; + else + i = 4; + cCharsToTransfer = MIN(dev->DataReplyLeft, i); - memcpy(dev->DataBuf, &(bl->LocalRAM.structured.autoSCSIData.aHostAdaptertype[1]), cCharsToTransfer); - break; - case 0x8C: - dev->DataReplyLeft = dev->CmdBuf[0]; - memset(dev->DataBuf, 0, dev->DataReplyLeft); - break; - case 0x8D: - dev->DataReplyLeft = dev->CmdBuf[0]; - ReplyIESI = (ReplyInquireExtendedSetupInformation *)dev->DataBuf; - memset(ReplyIESI, 0, sizeof(ReplyInquireExtendedSetupInformation)); + memcpy(dev->DataBuf, &(bl->LocalRAM.structured.autoSCSIData.aHostAdaptertype[1]), cCharsToTransfer); + break; + case 0x8C: + dev->DataReplyLeft = dev->CmdBuf[0]; + memset(dev->DataBuf, 0, dev->DataReplyLeft); + break; + case 0x8D: + dev->DataReplyLeft = dev->CmdBuf[0]; + ReplyIESI = (ReplyInquireExtendedSetupInformation *) dev->DataBuf; + memset(ReplyIESI, 0, sizeof(ReplyInquireExtendedSetupInformation)); - switch (bl->chip) { - case CHIP_BUSLOGIC_ISA_542B_1991_12_14: - case CHIP_BUSLOGIC_ISA_545S_1992_10_05: - case CHIP_BUSLOGIC_ISA_542BH_1993_05_23: - case CHIP_BUSLOGIC_ISA_545C_1994_12_01: - case CHIP_BUSLOGIC_VLB_445S_1993_11_16: - case CHIP_BUSLOGIC_VLB_445C_1994_12_01: - ReplyIESI->uBusType = 'A'; /* ISA style */ - break; - case CHIP_BUSLOGIC_MCA_640A_1993_05_23: - ReplyIESI->uBusType = 'M'; /* MCA style */ - break; - case CHIP_BUSLOGIC_PCI_958D_1995_12_30: - ReplyIESI->uBusType = 'E'; /* PCI style */ - break; - } - ReplyIESI->uBiosAddress = 0xd8; - ReplyIESI->u16ScatterGatherLimit = 8192; - ReplyIESI->cMailbox = dev->MailboxCount; - ReplyIESI->uMailboxAddressBase = dev->MailboxOutAddr; - ReplyIESI->fHostWideSCSI = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 1 : 0; - if ((bl->chip != CHIP_BUSLOGIC_ISA_542B_1991_12_14) && (bl->chip != CHIP_BUSLOGIC_ISA_545S_1992_10_05) && - (bl->chip != CHIP_BUSLOGIC_ISA_542BH_1993_05_23) && (bl->chip != CHIP_BUSLOGIC_MCA_640A_1993_05_23) && - (bl->chip != CHIP_BUSLOGIC_VLB_445S_1993_11_16)) - ReplyIESI->fLevelSensitiveInterrupt = bl->LocalRAM.structured.autoSCSIData.fLevelSensitiveInterrupt; - if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) - ReplyIESI->fHostUltraSCSI = 1; - memcpy(ReplyIESI->aFirmwareRevision, &(dev->fw_rev[strlen(dev->fw_rev) - 3]), sizeof(ReplyIESI->aFirmwareRevision)); - buslogic_log("Return Extended Setup Information: %d\n", dev->CmdBuf[0]); - break; - case 0x8F: - bl->fAggressiveRoundRobinMode = dev->CmdBuf[0] & 1; - buslogic_log("Aggressive Round Robin Mode = %d\n", bl->fAggressiveRoundRobinMode); - dev->DataReplyLeft = 0; - break; - case 0x90: - buslogic_log("Store Local RAM\n"); - Offset = dev->CmdBuf[0]; - dev->DataReplyLeft = 0; - memcpy(&(bl->LocalRAM.u8View[Offset]), &(dev->CmdBuf[2]), dev->CmdBuf[1]); + switch (bl->chip) { + case CHIP_BUSLOGIC_ISA_542B_1991_12_14: + case CHIP_BUSLOGIC_ISA_545S_1992_10_05: + case CHIP_BUSLOGIC_ISA_542BH_1993_05_23: + case CHIP_BUSLOGIC_ISA_545C_1994_12_01: + case CHIP_BUSLOGIC_VLB_445S_1993_11_16: + case CHIP_BUSLOGIC_VLB_445C_1994_12_01: + ReplyIESI->uBusType = 'A'; /* ISA style */ + break; + case CHIP_BUSLOGIC_MCA_640A_1993_05_23: + ReplyIESI->uBusType = 'M'; /* MCA style */ + break; + case CHIP_BUSLOGIC_PCI_958D_1995_12_30: + ReplyIESI->uBusType = 'E'; /* PCI style */ + break; + } + ReplyIESI->uBiosAddress = 0xd8; + ReplyIESI->u16ScatterGatherLimit = 8192; + ReplyIESI->cMailbox = dev->MailboxCount; + ReplyIESI->uMailboxAddressBase = dev->MailboxOutAddr; + ReplyIESI->fHostWideSCSI = (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) ? 1 : 0; + if ((bl->chip != CHIP_BUSLOGIC_ISA_542B_1991_12_14) && (bl->chip != CHIP_BUSLOGIC_ISA_545S_1992_10_05) && (bl->chip != CHIP_BUSLOGIC_ISA_542BH_1993_05_23) && (bl->chip != CHIP_BUSLOGIC_MCA_640A_1993_05_23) && (bl->chip != CHIP_BUSLOGIC_VLB_445S_1993_11_16)) + ReplyIESI->fLevelSensitiveInterrupt = bl->LocalRAM.structured.autoSCSIData.fLevelSensitiveInterrupt; + if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) + ReplyIESI->fHostUltraSCSI = 1; + memcpy(ReplyIESI->aFirmwareRevision, &(dev->fw_rev[strlen(dev->fw_rev) - 3]), sizeof(ReplyIESI->aFirmwareRevision)); + buslogic_log("Return Extended Setup Information: %d\n", dev->CmdBuf[0]); + break; + case 0x8F: + bl->fAggressiveRoundRobinMode = dev->CmdBuf[0] & 1; + buslogic_log("Aggressive Round Robin Mode = %d\n", bl->fAggressiveRoundRobinMode); + dev->DataReplyLeft = 0; + break; + case 0x90: + buslogic_log("Store Local RAM\n"); + Offset = dev->CmdBuf[0]; + dev->DataReplyLeft = 0; + memcpy(&(bl->LocalRAM.u8View[Offset]), &(dev->CmdBuf[2]), dev->CmdBuf[1]); - dev->DataReply = 0; - break; - case 0x91: - buslogic_log("Fetch Local RAM\n"); - Offset = dev->CmdBuf[0]; - dev->DataReplyLeft = dev->CmdBuf[1]; - memcpy(dev->DataBuf, &(bl->LocalRAM.u8View[Offset]), dev->CmdBuf[1]); + dev->DataReply = 0; + break; + case 0x91: + buslogic_log("Fetch Local RAM\n"); + Offset = dev->CmdBuf[0]; + dev->DataReplyLeft = dev->CmdBuf[1]; + memcpy(dev->DataBuf, &(bl->LocalRAM.u8View[Offset]), dev->CmdBuf[1]); - dev->DataReply = 0; - break; - case 0x93: - if ((bl->chip != CHIP_BUSLOGIC_VLB_445C_1994_12_01) && (bl->chip != CHIP_BUSLOGIC_VLB_445S_1993_11_16)) { - dev->DataReplyLeft = 0; - dev->Status |= STAT_INVCMD; - break; - } - case 0x92: - if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) || - (bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) || - (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) || - (bl->chip == CHIP_BUSLOGIC_MCA_640A_1993_05_23)) { - dev->DataReplyLeft = 0; - dev->Status |= STAT_INVCMD; - break; - } + dev->DataReply = 0; + break; + case 0x93: + if ((bl->chip != CHIP_BUSLOGIC_VLB_445C_1994_12_01) && (bl->chip != CHIP_BUSLOGIC_VLB_445S_1993_11_16)) { + dev->DataReplyLeft = 0; + dev->Status |= STAT_INVCMD; + break; + } + case 0x92: + if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) || (bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) || (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) || (bl->chip == CHIP_BUSLOGIC_MCA_640A_1993_05_23)) { + dev->DataReplyLeft = 0; + dev->Status |= STAT_INVCMD; + break; + } - dev->DataReplyLeft = 0; + dev->DataReplyLeft = 0; - switch (dev->CmdBuf[0]) { - case 0: - case 2: - BuslogicAutoSCSIRamSetDefaults(dev, 0); - break; - case 3: - BuslogicAutoSCSIRamSetDefaults(dev, 3); - break; - case 1: - f = nvr_fopen(BuslogicGetNVRFileName(bl), "wb"); - if (f) { - fwrite(&(bl->LocalRAM.structured.autoSCSIData), 1, 64, f); - fclose(f); - f = NULL; - } - break; - default: - dev->Status |= STAT_INVCMD; - break; - } + switch (dev->CmdBuf[0]) { + case 0: + case 2: + BuslogicAutoSCSIRamSetDefaults(dev, 0); + break; + case 3: + BuslogicAutoSCSIRamSetDefaults(dev, 3); + break; + case 1: + f = nvr_fopen(BuslogicGetNVRFileName(bl), "wb"); + if (f) { + fwrite(&(bl->LocalRAM.structured.autoSCSIData), 1, 64, f); + fclose(f); + f = NULL; + } + break; + default: + dev->Status |= STAT_INVCMD; + break; + } - if ((bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) && !(dev->Status & STAT_INVCMD)) { - x54x_io_remove(dev, dev->Base, 4); - switch(HALR->structured.autoSCSIData.uHostAdapterIoPortAddress) { - case 0: - dev->Base = 0x330; - break; - case 1: - dev->Base = 0x334; - break; - default: - dev->Base = 0; - break; - } - x54x_io_set(dev, dev->Base, 4); - } - break; - case 0x94: - if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) || (bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) || (bl->chip == CHIP_BUSLOGIC_MCA_640A_1993_05_23) || - (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23)) { - dev->DataReplyLeft = 0; - dev->Status |= STAT_INVCMD; - break; - } + if ((bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) && !(dev->Status & STAT_INVCMD)) { + x54x_io_remove(dev, dev->Base, 4); + switch (HALR->structured.autoSCSIData.uHostAdapterIoPortAddress) { + case 0: + dev->Base = 0x330; + break; + case 1: + dev->Base = 0x334; + break; + default: + dev->Base = 0; + break; + } + x54x_io_set(dev, dev->Base, 4); + } + break; + case 0x94: + if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) || (bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) || (bl->chip == CHIP_BUSLOGIC_MCA_640A_1993_05_23) || (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23)) { + dev->DataReplyLeft = 0; + dev->Status |= STAT_INVCMD; + break; + } - if (dev->CmdBuf[0]) { - buslogic_log("Invalid AutoSCSI command mode %x\n", dev->CmdBuf[0]); - dev->DataReplyLeft = 0; - dev->Status |= STAT_INVCMD; - } else { - dev->DataReplyLeft = dev->CmdBuf[2]; - dev->DataReplyLeft <<= 8; - dev->DataReplyLeft |= dev->CmdBuf[1]; - memcpy(dev->DataBuf, bl->AutoSCSIROM, dev->DataReplyLeft); - buslogic_log("Returning AutoSCSI ROM (%04X %04X %04X %04X)\n", dev->DataBuf[0], dev->DataBuf[1], dev->DataBuf[2], dev->DataBuf[3]); - } - break; - case 0x95: - if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) { - if (dev->Base != 0) - x54x_io_remove(dev, dev->Base, 4); - if (dev->CmdBuf[0] < 6) { - dev->Base = ((3 - (dev->CmdBuf[0] >> 1)) << 8) | ((dev->CmdBuf[0] & 1) ? 0x34 : 0x30); - x54x_io_set(dev, dev->Base, 4); - } else - dev->Base = 0; - dev->DataReplyLeft = 0; - return 1; - } else { - dev->DataReplyLeft = 0; - dev->Status |= STAT_INVCMD; - } - break; - case 0x96: - if (dev->CmdBuf[0] == 0) - bl->ExtendedLUNCCBFormat = 0; - else if (dev->CmdBuf[0] == 1) - bl->ExtendedLUNCCBFormat = 1; + if (dev->CmdBuf[0]) { + buslogic_log("Invalid AutoSCSI command mode %x\n", dev->CmdBuf[0]); + dev->DataReplyLeft = 0; + dev->Status |= STAT_INVCMD; + } else { + dev->DataReplyLeft = dev->CmdBuf[2]; + dev->DataReplyLeft <<= 8; + dev->DataReplyLeft |= dev->CmdBuf[1]; + memcpy(dev->DataBuf, bl->AutoSCSIROM, dev->DataReplyLeft); + buslogic_log("Returning AutoSCSI ROM (%04X %04X %04X %04X)\n", dev->DataBuf[0], dev->DataBuf[1], dev->DataBuf[2], dev->DataBuf[3]); + } + break; + case 0x95: + if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) { + if (dev->Base != 0) + x54x_io_remove(dev, dev->Base, 4); + if (dev->CmdBuf[0] < 6) { + dev->Base = ((3 - (dev->CmdBuf[0] >> 1)) << 8) | ((dev->CmdBuf[0] & 1) ? 0x34 : 0x30); + x54x_io_set(dev, dev->Base, 4); + } else + dev->Base = 0; + dev->DataReplyLeft = 0; + return 1; + } else { + dev->DataReplyLeft = 0; + dev->Status |= STAT_INVCMD; + } + break; + case 0x96: + if (dev->CmdBuf[0] == 0) + bl->ExtendedLUNCCBFormat = 0; + else if (dev->CmdBuf[0] == 1) + bl->ExtendedLUNCCBFormat = 1; - dev->DataReplyLeft = 0; - break; - case 0x97: - case 0xA7: - /* TODO: Actually correctly implement this whole SCSI BIOS Flash stuff. */ - dev->DataReplyLeft = 0; - break; - case 0xA8: - if (bl->chip != CHIP_BUSLOGIC_PCI_958D_1995_12_30) { - dev->DataReplyLeft = 0; - dev->Status |= STAT_INVCMD; - break; - } + dev->DataReplyLeft = 0; + break; + case 0x97: + case 0xA7: + /* TODO: Actually correctly implement this whole SCSI BIOS Flash stuff. */ + dev->DataReplyLeft = 0; + break; + case 0xA8: + if (bl->chip != CHIP_BUSLOGIC_PCI_958D_1995_12_30) { + dev->DataReplyLeft = 0; + dev->Status |= STAT_INVCMD; + break; + } - Offset = dev->CmdBuf[1]; - Offset <<= 8; - Offset |= dev->CmdBuf[0]; + Offset = dev->CmdBuf[1]; + Offset <<= 8; + Offset |= dev->CmdBuf[0]; - dev->DataReplyLeft = dev->CmdBuf[3]; - dev->DataReplyLeft <<= 8; - dev->DataReplyLeft |= dev->CmdBuf[2]; + dev->DataReplyLeft = dev->CmdBuf[3]; + dev->DataReplyLeft <<= 8; + dev->DataReplyLeft |= dev->CmdBuf[2]; - memcpy(dev->DataBuf, &(bl->SCAMData[Offset]), dev->DataReplyLeft); + memcpy(dev->DataBuf, &(bl->SCAMData[Offset]), dev->DataReplyLeft); - dev->DataReply = 0; - break; - case 0xA9: - if (bl->chip != CHIP_BUSLOGIC_PCI_958D_1995_12_30) { - dev->DataReplyLeft = 0; - dev->Status |= STAT_INVCMD; - break; - } + dev->DataReply = 0; + break; + case 0xA9: + if (bl->chip != CHIP_BUSLOGIC_PCI_958D_1995_12_30) { + dev->DataReplyLeft = 0; + dev->Status |= STAT_INVCMD; + break; + } - Offset = dev->CmdBuf[1]; - Offset <<= 8; - Offset |= dev->CmdBuf[0]; + Offset = dev->CmdBuf[1]; + Offset <<= 8; + Offset |= dev->CmdBuf[0]; - dev->DataReplyLeft = dev->CmdBuf[3]; - dev->DataReplyLeft <<= 8; - dev->DataReplyLeft |= dev->CmdBuf[2]; + dev->DataReplyLeft = dev->CmdBuf[3]; + dev->DataReplyLeft <<= 8; + dev->DataReplyLeft |= dev->CmdBuf[2]; - memcpy(&(bl->SCAMData[Offset]), &(dev->CmdBuf[4]), dev->DataReplyLeft); - dev->DataReplyLeft = 0; + memcpy(&(bl->SCAMData[Offset]), &(dev->CmdBuf[4]), dev->DataReplyLeft); + dev->DataReplyLeft = 0; - dev->DataReply = 0; - break; - case 0xFB: - dev->DataReplyLeft = dev->CmdBuf[2]; - break; - default: - dev->DataReplyLeft = 0; - dev->Status |= STAT_INVCMD; - break; + dev->DataReply = 0; + break; + case 0xFB: + dev->DataReplyLeft = dev->CmdBuf[2]; + break; + default: + dev->DataReplyLeft = 0; + dev->Status |= STAT_INVCMD; + break; } return 0; } - static void buslogic_setup_data(void *p) { - x54x_t *dev = (x54x_t *)p; + x54x_t *dev = (x54x_t *) p; ReplyInquireSetupInformation *ReplyISI; - buslogic_setup_t *bl_setup; - buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; - HALocalRAM *HALR = &bl->LocalRAM; + buslogic_setup_t *bl_setup; + buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; + HALocalRAM *HALR = &bl->LocalRAM; - ReplyISI = (ReplyInquireSetupInformation *)dev->DataBuf; - bl_setup = (buslogic_setup_t *)ReplyISI->VendorSpecificData; + ReplyISI = (ReplyInquireSetupInformation *) dev->DataBuf; + bl_setup = (buslogic_setup_t *) ReplyISI->VendorSpecificData; ReplyISI->fSynchronousInitiationEnabled = HALR->structured.autoSCSIData.u16SynchronousPermittedMask ? 1 : 0; - ReplyISI->fParityCheckingEnabled = (HALR->structured.autoSCSIData.uSCSIConfiguration & 2) ? 1 : 0; + ReplyISI->fParityCheckingEnabled = (HALR->structured.autoSCSIData.uSCSIConfiguration & 2) ? 1 : 0; bl_setup->uSignature = 'B'; /* The 'D' signature prevents Buslogic's OS/2 drivers from getting too * friendly with Adaptec hardware and upsetting the HBA state. - */ - bl_setup->uCharacterD = 'D'; /* BusLogic model. */ - switch(bl->chip) - { - case CHIP_BUSLOGIC_ISA_542B_1991_12_14: - case CHIP_BUSLOGIC_ISA_545S_1992_10_05: - case CHIP_BUSLOGIC_ISA_542BH_1993_05_23: - case CHIP_BUSLOGIC_ISA_545C_1994_12_01: - bl_setup->uHostBusType = 'A'; - break; - case CHIP_BUSLOGIC_MCA_640A_1993_05_23: - bl_setup->uHostBusType = 'B'; - break; - case CHIP_BUSLOGIC_VLB_445S_1993_11_16: - case CHIP_BUSLOGIC_VLB_445C_1994_12_01: - bl_setup->uHostBusType = 'E'; - break; - case CHIP_BUSLOGIC_PCI_958D_1995_12_30: - bl_setup->uHostBusType = 'F'; - break; + */ + bl_setup->uCharacterD = 'D'; /* BusLogic model. */ + switch (bl->chip) { + case CHIP_BUSLOGIC_ISA_542B_1991_12_14: + case CHIP_BUSLOGIC_ISA_545S_1992_10_05: + case CHIP_BUSLOGIC_ISA_542BH_1993_05_23: + case CHIP_BUSLOGIC_ISA_545C_1994_12_01: + bl_setup->uHostBusType = 'A'; + break; + case CHIP_BUSLOGIC_MCA_640A_1993_05_23: + bl_setup->uHostBusType = 'B'; + break; + case CHIP_BUSLOGIC_VLB_445S_1993_11_16: + case CHIP_BUSLOGIC_VLB_445C_1994_12_01: + bl_setup->uHostBusType = 'E'; + break; + case CHIP_BUSLOGIC_PCI_958D_1995_12_30: + bl_setup->uHostBusType = 'F'; + break; } } - static uint8_t buslogic_is_aggressive_mode(void *p) { - x54x_t *dev = (x54x_t *)p; - buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; + x54x_t *dev = (x54x_t *) p; + buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; - buslogic_log("Buslogic: Aggressive mode = %d\n", bl->fAggressiveRoundRobinMode); + buslogic_log("Buslogic: Aggressive mode = %d\n", bl->fAggressiveRoundRobinMode); return bl->fAggressiveRoundRobinMode; } - static uint8_t buslogic_interrupt_type(void *p) { - x54x_t *dev = (x54x_t *)p; - buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; + x54x_t *dev = (x54x_t *) p; + buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; - if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) || (bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) || (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) || - (bl->chip == CHIP_BUSLOGIC_VLB_445S_1993_11_16) || (bl->chip == CHIP_BUSLOGIC_MCA_640A_1993_05_23)) - return 0; + if ((bl->chip == CHIP_BUSLOGIC_ISA_542B_1991_12_14) || (bl->chip == CHIP_BUSLOGIC_ISA_545S_1992_10_05) || (bl->chip == CHIP_BUSLOGIC_ISA_542BH_1993_05_23) || (bl->chip == CHIP_BUSLOGIC_VLB_445S_1993_11_16) || (bl->chip == CHIP_BUSLOGIC_MCA_640A_1993_05_23)) + return 0; else - return !!bl->LocalRAM.structured.autoSCSIData.fLevelSensitiveInterrupt; + return !!bl->LocalRAM.structured.autoSCSIData.fLevelSensitiveInterrupt; } - static void buslogic_reset(void *p) { - x54x_t *dev = (x54x_t *)p; - buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; + x54x_t *dev = (x54x_t *) p; + buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; bl->ExtendedLUNCCBFormat = 0; } - -uint8_t buslogic_pci_regs[256]; -bar_t buslogic_pci_bar[3]; - +uint8_t buslogic_pci_regs[256]; +bar_t buslogic_pci_bar[3]; static void BuslogicBIOSUpdate(buslogic_data_t *bl) @@ -1135,25 +1093,25 @@ BuslogicBIOSUpdate(buslogic_data_t *bl) int bios_enabled = buslogic_pci_bar[2].addr_regs[0] & 0x01; if (!bl->has_bios) { - return; + return; } /* PCI BIOS stuff, just enable_disable. */ if ((bl->bios_addr > 0) && bios_enabled) { - mem_mapping_enable(&bl->bios.mapping); - mem_mapping_set_addr(&bl->bios.mapping, - bl->bios_addr, bl->bios_size); - buslogic_log("BT-958D: BIOS now at: %06X\n", bl->bios_addr); + mem_mapping_enable(&bl->bios.mapping); + mem_mapping_set_addr(&bl->bios.mapping, + bl->bios_addr, bl->bios_size); + buslogic_log("BT-958D: BIOS now at: %06X\n", bl->bios_addr); } else { - buslogic_log("BT-958D: BIOS disabled\n"); - mem_mapping_disable(&bl->bios.mapping); + buslogic_log("BT-958D: BIOS disabled\n"); + mem_mapping_disable(&bl->bios.mapping); } } static uint8_t BuslogicPCIRead(int func, int addr, void *p) { - x54x_t *dev = (x54x_t *)p; + x54x_t *dev = (x54x_t *) p; #ifdef ENABLE_BUSLOGIC_LOG buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; #endif @@ -1161,218 +1119,219 @@ BuslogicPCIRead(int func, int addr, void *p) buslogic_log("BT-958D: Reading register %02X\n", addr & 0xff); switch (addr) { - case 0x00: - return 0x4b; - case 0x01: - return 0x10; - case 0x02: - return 0x40; - case 0x03: - return 0x10; - case 0x04: - return buslogic_pci_regs[0x04] & 0x03; /*Respond to IO and memory accesses*/ - case 0x05: - return 0; - case 0x07: - return 2; - case 0x08: - return 1; /*Revision ID*/ - case 0x09: - return 0; /*Programming interface*/ - case 0x0A: - return 0; /*Subclass*/ - case 0x0B: - return 1; /*Class code*/ - case 0x0E: - return 0; /*Header type */ - case 0x10: - return (buslogic_pci_bar[0].addr_regs[0] & 0xe0) | 1; /*I/O space*/ - case 0x11: - return buslogic_pci_bar[0].addr_regs[1]; - case 0x12: - return buslogic_pci_bar[0].addr_regs[2]; - case 0x13: - return buslogic_pci_bar[0].addr_regs[3]; - case 0x14: - // return (buslogic_pci_bar[1].addr_regs[0] & 0xe0); /*Memory space*/ - return 0x00; - case 0x15: - return buslogic_pci_bar[1].addr_regs[1] & 0xc0; - case 0x16: - return buslogic_pci_bar[1].addr_regs[2]; - case 0x17: - return buslogic_pci_bar[1].addr_regs[3]; - case 0x2C: - return 0x4b; - case 0x2D: - return 0x10; - case 0x2E: - return 0x40; - case 0x2F: - return 0x10; - case 0x30: /* PCI_ROMBAR */ - buslogic_log("BT-958D: BIOS BAR 00 = %02X\n", buslogic_pci_bar[2].addr_regs[0] & 0x01); - return buslogic_pci_bar[2].addr_regs[0] & 0x01; - case 0x31: /* PCI_ROMBAR 15:11 */ - buslogic_log("BT-958D: BIOS BAR 01 = %02X\n", (buslogic_pci_bar[2].addr_regs[1] & bl->bios_mask)); - return buslogic_pci_bar[2].addr_regs[1]; - break; - case 0x32: /* PCI_ROMBAR 23:16 */ - buslogic_log("BT-958D: BIOS BAR 02 = %02X\n", buslogic_pci_bar[2].addr_regs[2]); - return buslogic_pci_bar[2].addr_regs[2]; - break; - case 0x33: /* PCI_ROMBAR 31:24 */ - buslogic_log("BT-958D: BIOS BAR 03 = %02X\n", buslogic_pci_bar[2].addr_regs[3]); - return buslogic_pci_bar[2].addr_regs[3]; - break; - case 0x3C: - return dev->Irq; - case 0x3D: - return PCI_INTA; + case 0x00: + return 0x4b; + case 0x01: + return 0x10; + case 0x02: + return 0x40; + case 0x03: + return 0x10; + case 0x04: + return buslogic_pci_regs[0x04] & 0x03; /*Respond to IO and memory accesses*/ + case 0x05: + return 0; + case 0x07: + return 2; + case 0x08: + return 1; /*Revision ID*/ + case 0x09: + return 0; /*Programming interface*/ + case 0x0A: + return 0; /*Subclass*/ + case 0x0B: + return 1; /*Class code*/ + case 0x0E: + return 0; /*Header type */ + case 0x10: + return (buslogic_pci_bar[0].addr_regs[0] & 0xe0) | 1; /*I/O space*/ + case 0x11: + return buslogic_pci_bar[0].addr_regs[1]; + case 0x12: + return buslogic_pci_bar[0].addr_regs[2]; + case 0x13: + return buslogic_pci_bar[0].addr_regs[3]; + case 0x14: + // return (buslogic_pci_bar[1].addr_regs[0] & 0xe0); /*Memory space*/ + return 0x00; + case 0x15: + return buslogic_pci_bar[1].addr_regs[1] & 0xc0; + case 0x16: + return buslogic_pci_bar[1].addr_regs[2]; + case 0x17: + return buslogic_pci_bar[1].addr_regs[3]; + case 0x2C: + return 0x4b; + case 0x2D: + return 0x10; + case 0x2E: + return 0x40; + case 0x2F: + return 0x10; + case 0x30: /* PCI_ROMBAR */ + buslogic_log("BT-958D: BIOS BAR 00 = %02X\n", buslogic_pci_bar[2].addr_regs[0] & 0x01); + return buslogic_pci_bar[2].addr_regs[0] & 0x01; + case 0x31: /* PCI_ROMBAR 15:11 */ + buslogic_log("BT-958D: BIOS BAR 01 = %02X\n", (buslogic_pci_bar[2].addr_regs[1] & bl->bios_mask)); + return buslogic_pci_bar[2].addr_regs[1]; + break; + case 0x32: /* PCI_ROMBAR 23:16 */ + buslogic_log("BT-958D: BIOS BAR 02 = %02X\n", buslogic_pci_bar[2].addr_regs[2]); + return buslogic_pci_bar[2].addr_regs[2]; + break; + case 0x33: /* PCI_ROMBAR 31:24 */ + buslogic_log("BT-958D: BIOS BAR 03 = %02X\n", buslogic_pci_bar[2].addr_regs[3]); + return buslogic_pci_bar[2].addr_regs[3]; + break; + case 0x3C: + return dev->Irq; + case 0x3D: + return PCI_INTA; } - return(0); + return (0); } - static void BuslogicPCIWrite(int func, int addr, uint8_t val, void *p) { - x54x_t *dev = (x54x_t *)p; - buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; + x54x_t *dev = (x54x_t *) p; + buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; uint8_t valxor; buslogic_log("BT-958D: Write value %02X to register %02X\n", val, addr & 0xff); switch (addr) { - case 0x04: - valxor = (val & 0x27) ^ buslogic_pci_regs[addr]; - if (valxor & PCI_COMMAND_IO) { - x54x_io_remove(dev, bl->PCIBase, 32); - if ((bl->PCIBase != 0) && (val & PCI_COMMAND_IO)) { - x54x_io_set(dev, bl->PCIBase, 32); - } - } - if (valxor & PCI_COMMAND_MEM) { - x54x_mem_disable(dev); - if ((bl->MMIOBase != 0) && (val & PCI_COMMAND_MEM)) { - x54x_mem_set_addr(dev, bl->MMIOBase); - } - } - buslogic_pci_regs[addr] = val & 0x27; - break; + case 0x04: + valxor = (val & 0x27) ^ buslogic_pci_regs[addr]; + if (valxor & PCI_COMMAND_IO) { + x54x_io_remove(dev, bl->PCIBase, 32); + if ((bl->PCIBase != 0) && (val & PCI_COMMAND_IO)) { + x54x_io_set(dev, bl->PCIBase, 32); + } + } + if (valxor & PCI_COMMAND_MEM) { + x54x_mem_disable(dev); + if ((bl->MMIOBase != 0) && (val & PCI_COMMAND_MEM)) { + x54x_mem_set_addr(dev, bl->MMIOBase); + } + } + buslogic_pci_regs[addr] = val & 0x27; + break; - case 0x10: - val &= 0xe0; - val |= 1; - /*FALLTHROUGH*/ + case 0x10: + val &= 0xe0; + val |= 1; + /*FALLTHROUGH*/ - case 0x11: case 0x12: case 0x13: - /* I/O Base set. */ - /* First, remove the old I/O. */ - x54x_io_remove(dev, bl->PCIBase, 32); - /* Then let's set the PCI regs. */ - buslogic_pci_bar[0].addr_regs[addr & 3] = val; - /* Then let's calculate the new I/O base. */ - bl->PCIBase = buslogic_pci_bar[0].addr & 0xffe0; - /* Log the new base. */ - buslogic_log("BusLogic PCI: New I/O base is %04X\n" , bl->PCIBase); - /* We're done, so get out of the here. */ - if (buslogic_pci_regs[4] & PCI_COMMAND_IO) { - if (bl->PCIBase != 0) { - x54x_io_set(dev, bl->PCIBase, 32); - } - } - return; + case 0x11: + case 0x12: + case 0x13: + /* I/O Base set. */ + /* First, remove the old I/O. */ + x54x_io_remove(dev, bl->PCIBase, 32); + /* Then let's set the PCI regs. */ + buslogic_pci_bar[0].addr_regs[addr & 3] = val; + /* Then let's calculate the new I/O base. */ + bl->PCIBase = buslogic_pci_bar[0].addr & 0xffe0; + /* Log the new base. */ + buslogic_log("BusLogic PCI: New I/O base is %04X\n", bl->PCIBase); + /* We're done, so get out of the here. */ + if (buslogic_pci_regs[4] & PCI_COMMAND_IO) { + if (bl->PCIBase != 0) { + x54x_io_set(dev, bl->PCIBase, 32); + } + } + return; - case 0x14: - val &= 0xe0; - /*FALLTHROUGH*/ + case 0x14: + val &= 0xe0; + /*FALLTHROUGH*/ - case 0x15: case 0x16: case 0x17: - /* MMIO Base set. */ - /* First, remove the old I/O. */ - x54x_mem_disable(dev); - /* Then let's set the PCI regs. */ - buslogic_pci_bar[1].addr_regs[addr & 3] = val; - /* Then let's calculate the new I/O base. */ - // bl->MMIOBase = buslogic_pci_bar[1].addr & 0xffffffe0; - /* Give it a 4 kB alignment as that's this emulator's granularity. */ - buslogic_pci_bar[1].addr &= 0xffffc000; - bl->MMIOBase = buslogic_pci_bar[1].addr & 0xffffc000; - /* Log the new base. */ - buslogic_log("BusLogic PCI: New MMIO base is %04X\n" , bl->MMIOBase); - /* We're done, so get out of the here. */ - if (buslogic_pci_regs[4] & PCI_COMMAND_MEM) { - if (bl->MMIOBase != 0) { - x54x_mem_set_addr(dev, bl->MMIOBase); - } - } - return; + case 0x15: + case 0x16: + case 0x17: + /* MMIO Base set. */ + /* First, remove the old I/O. */ + x54x_mem_disable(dev); + /* Then let's set the PCI regs. */ + buslogic_pci_bar[1].addr_regs[addr & 3] = val; + /* Then let's calculate the new I/O base. */ + // bl->MMIOBase = buslogic_pci_bar[1].addr & 0xffffffe0; + /* Give it a 4 kB alignment as that's this emulator's granularity. */ + buslogic_pci_bar[1].addr &= 0xffffc000; + bl->MMIOBase = buslogic_pci_bar[1].addr & 0xffffc000; + /* Log the new base. */ + buslogic_log("BusLogic PCI: New MMIO base is %04X\n", bl->MMIOBase); + /* We're done, so get out of the here. */ + if (buslogic_pci_regs[4] & PCI_COMMAND_MEM) { + if (bl->MMIOBase != 0) { + x54x_mem_set_addr(dev, bl->MMIOBase); + } + } + return; - case 0x30: /* PCI_ROMBAR */ - case 0x31: /* PCI_ROMBAR */ - case 0x32: /* PCI_ROMBAR */ - case 0x33: /* PCI_ROMBAR */ - buslogic_pci_bar[2].addr_regs[addr & 3] = val; - buslogic_pci_bar[2].addr &= 0xffffc001; - bl->bios_addr = buslogic_pci_bar[2].addr & 0xffffc000; - buslogic_log("BT-958D: BIOS BAR %02X = NOW %02X (%02X)\n", addr & 3, buslogic_pci_bar[2].addr_regs[addr & 3], val); - BuslogicBIOSUpdate(bl); - return; + case 0x30: /* PCI_ROMBAR */ + case 0x31: /* PCI_ROMBAR */ + case 0x32: /* PCI_ROMBAR */ + case 0x33: /* PCI_ROMBAR */ + buslogic_pci_bar[2].addr_regs[addr & 3] = val; + buslogic_pci_bar[2].addr &= 0xffffc001; + bl->bios_addr = buslogic_pci_bar[2].addr & 0xffffc000; + buslogic_log("BT-958D: BIOS BAR %02X = NOW %02X (%02X)\n", addr & 3, buslogic_pci_bar[2].addr_regs[addr & 3], val); + BuslogicBIOSUpdate(bl); + return; - case 0x3C: - buslogic_pci_regs[addr] = val; - if (val != 0xFF) { - buslogic_log("BusLogic IRQ now: %i\n", val); - dev->Irq = val; - } else - dev->Irq = 0; - return; + case 0x3C: + buslogic_pci_regs[addr] = val; + if (val != 0xFF) { + buslogic_log("BusLogic IRQ now: %i\n", val); + dev->Irq = val; + } else + dev->Irq = 0; + return; } } - static void BuslogicInitializeLocalRAM(buslogic_data_t *bl) { memset(bl->LocalRAM.u8View, 0, sizeof(HALocalRAM)); if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) { - bl->LocalRAM.structured.autoSCSIData.fLevelSensitiveInterrupt = 1; + bl->LocalRAM.structured.autoSCSIData.fLevelSensitiveInterrupt = 1; } else { - bl->LocalRAM.structured.autoSCSIData.fLevelSensitiveInterrupt = 0; + bl->LocalRAM.structured.autoSCSIData.fLevelSensitiveInterrupt = 0; } - bl->LocalRAM.structured.autoSCSIData.u16DeviceEnabledMask = ~0; - bl->LocalRAM.structured.autoSCSIData.u16WidePermittedMask = ~0; - bl->LocalRAM.structured.autoSCSIData.u16FastPermittedMask = ~0; + bl->LocalRAM.structured.autoSCSIData.u16DeviceEnabledMask = ~0; + bl->LocalRAM.structured.autoSCSIData.u16WidePermittedMask = ~0; + bl->LocalRAM.structured.autoSCSIData.u16FastPermittedMask = ~0; bl->LocalRAM.structured.autoSCSIData.u16SynchronousPermittedMask = ~0; - bl->LocalRAM.structured.autoSCSIData.u16DisconnectPermittedMask = ~0; - bl->LocalRAM.structured.autoSCSIData.fRoundRobinScheme = 0; - bl->LocalRAM.structured.autoSCSIData.u16UltraPermittedMask = ~0; + bl->LocalRAM.structured.autoSCSIData.u16DisconnectPermittedMask = ~0; + bl->LocalRAM.structured.autoSCSIData.fRoundRobinScheme = 0; + bl->LocalRAM.structured.autoSCSIData.u16UltraPermittedMask = ~0; } - static uint8_t buslogic_mca_read(int port, void *priv) { - x54x_t *dev = (x54x_t *)priv; + x54x_t *dev = (x54x_t *) priv; - return(dev->pos_regs[port & 7]); + return (dev->pos_regs[port & 7]); } - static void buslogic_mca_write(int port, uint8_t val, void *priv) { - x54x_t *dev = (x54x_t *) priv; - buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; + x54x_t *dev = (x54x_t *) priv; + buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; HALocalRAM *HALR = &bl->LocalRAM; /* MCA does not write registers below 0x0100. */ - if (port < 0x0102) return; + if (port < 0x0102) + return; /* Save the MCA register value. */ dev->pos_regs[port & 7] = val; @@ -1382,52 +1341,54 @@ buslogic_mca_write(int port, uint8_t val, void *priv) /* Get the new assigned I/O base address. */ if (dev->pos_regs[3]) { - dev->Base = dev->pos_regs[3] << 8; - dev->Base |= ((dev->pos_regs[2] & 0x10) ? 0x34 : 0x30); + dev->Base = dev->pos_regs[3] << 8; + dev->Base |= ((dev->pos_regs[2] & 0x10) ? 0x34 : 0x30); } else { - dev->Base = 0x0000; + dev->Base = 0x0000; } /* Save the new IRQ and DMA channel values. */ - dev->Irq = ((dev->pos_regs[2] >> 1) & 0x07) + 8; + dev->Irq = ((dev->pos_regs[2] >> 1) & 0x07) + 8; dev->DmaChannel = dev->pos_regs[5] & 0x0f; /* Extract the BIOS ROM address info. */ - if (dev->pos_regs[2] & 0xe0) switch(dev->pos_regs[2] & 0xe0) { - case 0xe0: /* [0]=111x xxxx */ - bl->bios_addr = 0xDC000; - break; + if (dev->pos_regs[2] & 0xe0) + switch (dev->pos_regs[2] & 0xe0) { + case 0xe0: /* [0]=111x xxxx */ + bl->bios_addr = 0xDC000; + break; - case 0x00: /* [0]=000x xxxx */ - bl->bios_addr = 0; - break; + case 0x00: /* [0]=000x xxxx */ + bl->bios_addr = 0; + break; - case 0xc0: /* [0]=110x xxxx */ - bl->bios_addr = 0xD8000; - break; + case 0xc0: /* [0]=110x xxxx */ + bl->bios_addr = 0xD8000; + break; - case 0xa0: /* [0]=101x xxxx */ - bl->bios_addr = 0xD4000; - break; + case 0xa0: /* [0]=101x xxxx */ + bl->bios_addr = 0xD4000; + break; - case 0x80: /* [0]=100x xxxx */ - bl->bios_addr = 0xD0000; - break; + case 0x80: /* [0]=100x xxxx */ + bl->bios_addr = 0xD0000; + break; - case 0x60: /* [0]=011x xxxx */ - bl->bios_addr = 0xCC000; - break; + case 0x60: /* [0]=011x xxxx */ + bl->bios_addr = 0xCC000; + break; - case 0x40: /* [0]=010x xxxx */ - bl->bios_addr = 0xC8000; - break; + case 0x40: /* [0]=010x xxxx */ + bl->bios_addr = 0xC8000; + break; - case 0x20: /* [0]=001x xxxx */ - bl->bios_addr = 0xC4000; - break; - } else { - /* Disabled. */ - bl->bios_addr = 0x000000; + case 0x20: /* [0]=001x xxxx */ + bl->bios_addr = 0xC4000; + break; + } + else { + /* Disabled. */ + bl->bios_addr = 0x000000; } /* @@ -1437,7 +1398,7 @@ buslogic_mca_write(int port, uint8_t val, void *priv) * pos[2]=111xxxxx = 7 * pos[2]=000xxxxx = 0 */ - dev->HostID = (dev->pos_regs[4] >> 5) & 0x07; + dev->HostID = (dev->pos_regs[4] >> 5) & 0x07; HALR->structured.autoSCSIData.uSCSIId = dev->HostID; /* @@ -1458,43 +1419,43 @@ buslogic_mca_write(int port, uint8_t val, void *priv) HALR->structured.autoSCSIData.uBIOSConfiguration &= ~4; HALR->structured.autoSCSIData.uBIOSConfiguration |= (dev->pos_regs[4] & 8) ? 4 : 0; - switch(dev->DmaChannel) { - case 5: - HALR->structured.autoSCSIData.uDMAChannel = 1; - break; - case 6: - HALR->structured.autoSCSIData.uDMAChannel = 2; - break; - case 7: - HALR->structured.autoSCSIData.uDMAChannel = 3; - break; - default: - HALR->structured.autoSCSIData.uDMAChannel = 0; - break; + switch (dev->DmaChannel) { + case 5: + HALR->structured.autoSCSIData.uDMAChannel = 1; + break; + case 6: + HALR->structured.autoSCSIData.uDMAChannel = 2; + break; + case 7: + HALR->structured.autoSCSIData.uDMAChannel = 3; + break; + default: + HALR->structured.autoSCSIData.uDMAChannel = 0; + break; } - switch(dev->Irq) { - case 9: - HALR->structured.autoSCSIData.uIrqChannel = 1; - break; - case 10: - HALR->structured.autoSCSIData.uIrqChannel = 2; - break; - case 11: - HALR->structured.autoSCSIData.uIrqChannel = 3; - break; - case 12: - HALR->structured.autoSCSIData.uIrqChannel = 4; - break; - case 14: - HALR->structured.autoSCSIData.uIrqChannel = 5; - break; - case 15: - HALR->structured.autoSCSIData.uIrqChannel = 6; - break; - default: - HALR->structured.autoSCSIData.uIrqChannel = 0; - break; + switch (dev->Irq) { + case 9: + HALR->structured.autoSCSIData.uIrqChannel = 1; + break; + case 10: + HALR->structured.autoSCSIData.uIrqChannel = 2; + break; + case 11: + HALR->structured.autoSCSIData.uIrqChannel = 3; + break; + case 12: + HALR->structured.autoSCSIData.uIrqChannel = 4; + break; + case 14: + HALR->structured.autoSCSIData.uIrqChannel = 5; + break; + case 15: + HALR->structured.autoSCSIData.uIrqChannel = 6; + break; + default: + HALR->structured.autoSCSIData.uIrqChannel = 0; + break; } /* @@ -1508,39 +1469,37 @@ buslogic_mca_write(int port, uint8_t val, void *priv) /* Initialize the device if fully configured. */ if (dev->pos_regs[2] & 0x01) { - /* Card enabled; register (new) I/O handler. */ - x54x_io_set(dev, dev->Base, 4); + /* Card enabled; register (new) I/O handler. */ + x54x_io_set(dev, dev->Base, 4); - /* Reset the device. */ - x54x_reset_ctrl(dev, CTRL_HRST); + /* Reset the device. */ + x54x_reset_ctrl(dev, CTRL_HRST); - /* Enable or disable the BIOS ROM. */ - if (bl->has_bios && (bl->bios_addr != 0x000000)) { - mem_mapping_enable(&bl->bios.mapping); - mem_mapping_set_addr(&bl->bios.mapping, bl->bios_addr, ROM_SIZE); - } + /* Enable or disable the BIOS ROM. */ + if (bl->has_bios && (bl->bios_addr != 0x000000)) { + mem_mapping_enable(&bl->bios.mapping); + mem_mapping_set_addr(&bl->bios.mapping, bl->bios_addr, ROM_SIZE); + } - /* Say hello. */ - buslogic_log("BT-640A: I/O=%04x, IRQ=%d, DMA=%d, BIOS @%05X, HOST ID %i\n", - dev->Base, dev->Irq, dev->DmaChannel, bl->bios_addr, dev->HostID); + /* Say hello. */ + buslogic_log("BT-640A: I/O=%04x, IRQ=%d, DMA=%d, BIOS @%05X, HOST ID %i\n", + dev->Base, dev->Irq, dev->DmaChannel, bl->bios_addr, dev->HostID); } } - static uint8_t buslogic_mca_feedb(void *priv) { - x54x_t *dev = (x54x_t *)priv; + x54x_t *dev = (x54x_t *) priv; return (dev->pos_regs[2] & 0x01); } - void BuslogicDeviceReset(void *p) { - x54x_t *dev = (x54x_t *) p; - buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; + x54x_t *dev = (x54x_t *) p; + buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data; x54x_device_reset(dev); @@ -1548,26 +1507,25 @@ BuslogicDeviceReset(void *p) BuslogicInitializeAutoSCSIRam(dev); } - static void * buslogic_init(const device_t *info) { - x54x_t *dev; - char *bios_rom_name; - uint16_t bios_rom_size; - uint16_t bios_rom_mask; - uint8_t has_autoscsi_rom; - char *autoscsi_rom_name; - uint16_t autoscsi_rom_size; - uint8_t has_scam_rom; - char *scam_rom_name; - uint16_t scam_rom_size; - FILE *f; + x54x_t *dev; + char *bios_rom_name; + uint16_t bios_rom_size; + uint16_t bios_rom_mask; + uint8_t has_autoscsi_rom; + char *autoscsi_rom_name; + uint16_t autoscsi_rom_size; + uint8_t has_scam_rom; + char *scam_rom_name; + uint16_t scam_rom_size; + FILE *f; buslogic_data_t *bl; - uint32_t bios_rom_addr; + uint32_t bios_rom_addr; /* Call common initializer. */ - dev = x54x_init(info); + dev = x54x_init(info); dev->bus = scsi_get_bus(); dev->ven_data = malloc(sizeof(buslogic_data_t)); @@ -1577,229 +1535,225 @@ buslogic_init(const device_t *info) dev->card_bus = info->flags; if (!(info->flags & DEVICE_MCA) && !(info->flags & DEVICE_PCI)) { - dev->Base = device_get_config_hex16("base"); - dev->Irq = device_get_config_int("irq"); - dev->DmaChannel = device_get_config_int("dma"); + dev->Base = device_get_config_hex16("base"); + dev->Irq = device_get_config_int("irq"); + dev->DmaChannel = device_get_config_int("dma"); + } else if (info->flags & DEVICE_PCI) { + dev->Base = 0; } - else if (info->flags & DEVICE_PCI) { - dev->Base = 0; - } - dev->HostID = 7; /* default HA ID */ + dev->HostID = 7; /* default HA ID */ dev->setup_info_len = sizeof(buslogic_setup_t); - dev->max_id = 7; - dev->flags = X54X_INT_GEOM_WRITABLE; + dev->max_id = 7; + dev->flags = X54X_INT_GEOM_WRITABLE; - bl->chip = info->local; - bl->PCIBase = 0; + bl->chip = info->local; + bl->PCIBase = 0; bl->MMIOBase = 0; if (info->flags & DEVICE_PCI) { - bios_rom_addr = 0xd8000; - bl->has_bios = device_get_config_int("bios"); + bios_rom_addr = 0xd8000; + bl->has_bios = device_get_config_int("bios"); } else if (info->flags & DEVICE_MCA) { - bios_rom_addr = 0xd8000; - bl->has_bios = 1; + bios_rom_addr = 0xd8000; + bl->has_bios = 1; } else { - bios_rom_addr = device_get_config_hex20("bios_addr"); - bl->has_bios = !!bios_rom_addr; + bios_rom_addr = device_get_config_hex20("bios_addr"); + bl->has_bios = !!bios_rom_addr; } - dev->ven_cmd_phase1 = buslogic_cmd_phase1; - dev->ven_get_host_id = buslogic_get_host_id; - dev->ven_get_irq = buslogic_get_irq; - dev->ven_get_dma = buslogic_get_dma; - dev->get_ven_param_len = buslogic_param_len; - dev->ven_cmds = buslogic_cmds; - dev->interrupt_type = buslogic_interrupt_type; + dev->ven_cmd_phase1 = buslogic_cmd_phase1; + dev->ven_get_host_id = buslogic_get_host_id; + dev->ven_get_irq = buslogic_get_irq; + dev->ven_get_dma = buslogic_get_dma; + dev->get_ven_param_len = buslogic_param_len; + dev->ven_cmds = buslogic_cmds; + dev->interrupt_type = buslogic_interrupt_type; dev->is_aggressive_mode = buslogic_is_aggressive_mode; - dev->get_ven_data = buslogic_setup_data; - dev->ven_reset = buslogic_reset; + dev->get_ven_data = buslogic_setup_data; + dev->ven_reset = buslogic_reset; strcpy(dev->vendor, "BusLogic"); bl->fAggressiveRoundRobinMode = 1; - bios_rom_name = NULL; - has_autoscsi_rom = 0; - has_scam_rom = 0; + bios_rom_name = NULL; + has_autoscsi_rom = 0; + has_scam_rom = 0; - switch (bl->chip) { - case CHIP_BUSLOGIC_ISA_542B_1991_12_14: /*Dated December 14th, 1991*/ - strcpy(dev->name, "BT-542B"); - bios_rom_name = "roms/scsi/buslogic/BT-542B_BIOS.ROM"; - bios_rom_size = 0x4000; - bios_rom_mask = 0x3fff; - has_autoscsi_rom = 0; - has_scam_rom = 0; - dev->fw_rev = "AA221"; - dev->ha_bps = 5000000.0; /* normal SCSI */ - dev->max_id = 7; /* narrow SCSI */ - break; - case CHIP_BUSLOGIC_ISA_545S_1992_10_05: /*Dated October 5th, 1992*/ - strcpy(dev->name, "BT-545S"); - bios_rom_name = "roms/scsi/buslogic/BT-545S_BIOS.rom"; - bios_rom_size = 0x4000; - bios_rom_mask = 0x3fff; - has_autoscsi_rom = 0; - has_scam_rom = 0; - dev->fw_rev = "AA331"; - dev->ha_bps = 5000000.0; /* normal SCSI */ - dev->max_id = 7; /* narrow SCSI */ - break; - case CHIP_BUSLOGIC_ISA_542BH_1993_05_23: /*Dated May 23rd, 1993*/ - strcpy(dev->name, "BT-542BH"); - bios_rom_name = "roms/scsi/buslogic/BT-542BH_BIOS.rom"; - bios_rom_size = 0x4000; - bios_rom_mask = 0x3fff; - has_autoscsi_rom = 0; - has_scam_rom = 0; - dev->fw_rev = "AA335"; - dev->ha_bps = 5000000.0; /* normal SCSI */ - dev->max_id = 7; /* narrow SCSI */ - break; - case CHIP_BUSLOGIC_ISA_545C_1994_12_01: /*Dated December 1st, 1994*/ - strcpy(dev->name, "BT-545C"); - bios_rom_name = "roms/scsi/buslogic/BT-545C_BIOS.rom"; - bios_rom_size = 0x4000; - bios_rom_mask = 0x3fff; - has_autoscsi_rom = 1; - autoscsi_rom_name = "roms/scsi/buslogic/BT-545C_AutoSCSI.rom"; - autoscsi_rom_size = 0x4000; - has_scam_rom = 0; - dev->fw_rev = "AA425J"; - dev->ha_bps = 10000000.0; /* fast SCSI */ - dev->max_id = 7; /* narrow SCSI */ - break; - case CHIP_BUSLOGIC_MCA_640A_1993_05_23: /*Dated May 23rd, 1993*/ - strcpy(dev->name, "BT-640A"); - bios_rom_name = "roms/scsi/buslogic/BT-640A_BIOS.rom"; - bios_rom_size = 0x4000; - bios_rom_mask = 0x3fff; - has_autoscsi_rom = 0; - has_scam_rom = 0; - dev->fw_rev = "BA335"; - dev->flags |= X54X_32BIT; - dev->pos_regs[0] = 0x08; /* MCA board ID */ - dev->pos_regs[1] = 0x07; - mca_add(buslogic_mca_read, buslogic_mca_write, buslogic_mca_feedb, NULL, dev); - dev->ha_bps = 5000000.0; /* normal SCSI */ - dev->max_id = 7; /* narrow SCSI */ - break; - case CHIP_BUSLOGIC_VLB_445S_1993_11_16: /*Dated November 16th, 1993*/ - strcpy(dev->name, "BT-445S"); - bios_rom_name = "roms/scsi/buslogic/BT-445S_BIOS.rom"; - bios_rom_size = 0x4000; - bios_rom_mask = 0x3fff; - has_autoscsi_rom = 0; - has_scam_rom = 0; - dev->fw_rev = "AA335"; - dev->flags |= X54X_32BIT; - dev->ha_bps = 5000000.0; /* normal SCSI */ - dev->max_id = 7; /* narrow SCSI */ - break; - case CHIP_BUSLOGIC_VLB_445C_1994_12_01: /*Dated December 1st, 1994*/ - strcpy(dev->name, "BT-445C"); - bios_rom_name = "roms/scsi/buslogic/BT-445C_BIOS.rom"; - bios_rom_size = 0x4000; - bios_rom_mask = 0x3fff; - has_autoscsi_rom = 1; - autoscsi_rom_name = "roms/scsi/buslogic/BT-445C_AutoSCSI.rom"; - autoscsi_rom_size = 0x4000; - has_scam_rom = 0; - dev->fw_rev = "AA425J"; - dev->flags |= X54X_32BIT; - dev->ha_bps = 10000000.0; /* fast SCSI */ - dev->max_id = 7; /* narrow SCSI */ - break; - case CHIP_BUSLOGIC_PCI_958D_1995_12_30: /*Dated December 30th, 1995*/ - strcpy(dev->name, "BT-958D"); - bios_rom_name = "roms/scsi/buslogic/BT-958D_BIOS.rom"; - bios_rom_size = 0x4000; - bios_rom_mask = 0x3fff; - has_autoscsi_rom = 1; - autoscsi_rom_name = "roms/scsi/buslogic/BT-958D_AutoSCSI.rom"; - autoscsi_rom_size = 0x8000; - has_scam_rom = 1; - scam_rom_name = "roms/scsi/buslogic/BT-958D_SCAM.rom"; - scam_rom_size = 0x0200; - dev->fw_rev = "AA507B"; - dev->flags |= (X54X_CDROM_BOOT | X54X_32BIT); - dev->ha_bps = 20000000.0; /* ultra SCSI */ - dev->max_id = 15; /* wide SCSI */ - break; - } + switch (bl->chip) { + case CHIP_BUSLOGIC_ISA_542B_1991_12_14: /*Dated December 14th, 1991*/ + strcpy(dev->name, "BT-542B"); + bios_rom_name = "roms/scsi/buslogic/BT-542B_BIOS.ROM"; + bios_rom_size = 0x4000; + bios_rom_mask = 0x3fff; + has_autoscsi_rom = 0; + has_scam_rom = 0; + dev->fw_rev = "AA221"; + dev->ha_bps = 5000000.0; /* normal SCSI */ + dev->max_id = 7; /* narrow SCSI */ + break; + case CHIP_BUSLOGIC_ISA_545S_1992_10_05: /*Dated October 5th, 1992*/ + strcpy(dev->name, "BT-545S"); + bios_rom_name = "roms/scsi/buslogic/BT-545S_BIOS.rom"; + bios_rom_size = 0x4000; + bios_rom_mask = 0x3fff; + has_autoscsi_rom = 0; + has_scam_rom = 0; + dev->fw_rev = "AA331"; + dev->ha_bps = 5000000.0; /* normal SCSI */ + dev->max_id = 7; /* narrow SCSI */ + break; + case CHIP_BUSLOGIC_ISA_542BH_1993_05_23: /*Dated May 23rd, 1993*/ + strcpy(dev->name, "BT-542BH"); + bios_rom_name = "roms/scsi/buslogic/BT-542BH_BIOS.rom"; + bios_rom_size = 0x4000; + bios_rom_mask = 0x3fff; + has_autoscsi_rom = 0; + has_scam_rom = 0; + dev->fw_rev = "AA335"; + dev->ha_bps = 5000000.0; /* normal SCSI */ + dev->max_id = 7; /* narrow SCSI */ + break; + case CHIP_BUSLOGIC_ISA_545C_1994_12_01: /*Dated December 1st, 1994*/ + strcpy(dev->name, "BT-545C"); + bios_rom_name = "roms/scsi/buslogic/BT-545C_BIOS.rom"; + bios_rom_size = 0x4000; + bios_rom_mask = 0x3fff; + has_autoscsi_rom = 1; + autoscsi_rom_name = "roms/scsi/buslogic/BT-545C_AutoSCSI.rom"; + autoscsi_rom_size = 0x4000; + has_scam_rom = 0; + dev->fw_rev = "AA425J"; + dev->ha_bps = 10000000.0; /* fast SCSI */ + dev->max_id = 7; /* narrow SCSI */ + break; + case CHIP_BUSLOGIC_MCA_640A_1993_05_23: /*Dated May 23rd, 1993*/ + strcpy(dev->name, "BT-640A"); + bios_rom_name = "roms/scsi/buslogic/BT-640A_BIOS.rom"; + bios_rom_size = 0x4000; + bios_rom_mask = 0x3fff; + has_autoscsi_rom = 0; + has_scam_rom = 0; + dev->fw_rev = "BA335"; + dev->flags |= X54X_32BIT; + dev->pos_regs[0] = 0x08; /* MCA board ID */ + dev->pos_regs[1] = 0x07; + mca_add(buslogic_mca_read, buslogic_mca_write, buslogic_mca_feedb, NULL, dev); + dev->ha_bps = 5000000.0; /* normal SCSI */ + dev->max_id = 7; /* narrow SCSI */ + break; + case CHIP_BUSLOGIC_VLB_445S_1993_11_16: /*Dated November 16th, 1993*/ + strcpy(dev->name, "BT-445S"); + bios_rom_name = "roms/scsi/buslogic/BT-445S_BIOS.rom"; + bios_rom_size = 0x4000; + bios_rom_mask = 0x3fff; + has_autoscsi_rom = 0; + has_scam_rom = 0; + dev->fw_rev = "AA335"; + dev->flags |= X54X_32BIT; + dev->ha_bps = 5000000.0; /* normal SCSI */ + dev->max_id = 7; /* narrow SCSI */ + break; + case CHIP_BUSLOGIC_VLB_445C_1994_12_01: /*Dated December 1st, 1994*/ + strcpy(dev->name, "BT-445C"); + bios_rom_name = "roms/scsi/buslogic/BT-445C_BIOS.rom"; + bios_rom_size = 0x4000; + bios_rom_mask = 0x3fff; + has_autoscsi_rom = 1; + autoscsi_rom_name = "roms/scsi/buslogic/BT-445C_AutoSCSI.rom"; + autoscsi_rom_size = 0x4000; + has_scam_rom = 0; + dev->fw_rev = "AA425J"; + dev->flags |= X54X_32BIT; + dev->ha_bps = 10000000.0; /* fast SCSI */ + dev->max_id = 7; /* narrow SCSI */ + break; + case CHIP_BUSLOGIC_PCI_958D_1995_12_30: /*Dated December 30th, 1995*/ + strcpy(dev->name, "BT-958D"); + bios_rom_name = "roms/scsi/buslogic/BT-958D_BIOS.rom"; + bios_rom_size = 0x4000; + bios_rom_mask = 0x3fff; + has_autoscsi_rom = 1; + autoscsi_rom_name = "roms/scsi/buslogic/BT-958D_AutoSCSI.rom"; + autoscsi_rom_size = 0x8000; + has_scam_rom = 1; + scam_rom_name = "roms/scsi/buslogic/BT-958D_SCAM.rom"; + scam_rom_size = 0x0200; + dev->fw_rev = "AA507B"; + dev->flags |= (X54X_CDROM_BOOT | X54X_32BIT); + dev->ha_bps = 20000000.0; /* ultra SCSI */ + dev->max_id = 15; /* wide SCSI */ + break; + } if ((dev->Base != 0) && !(dev->card_bus & DEVICE_MCA) && !(dev->card_bus & DEVICE_PCI)) { - x54x_io_set(dev, dev->Base, 4); + x54x_io_set(dev, dev->Base, 4); } memset(bl->AutoSCSIROM, 0xff, 32768); memset(bl->SCAMData, 0x00, 65536); - if (bl->has_bios) - { - bl->bios_size = bios_rom_size; + if (bl->has_bios) { + bl->bios_size = bios_rom_size; - bl->bios_mask = 0xffffc000; + bl->bios_mask = 0xffffc000; - rom_init(&bl->bios, bios_rom_name, bios_rom_addr, bios_rom_size, bios_rom_mask, 0, MEM_MAPPING_EXTERNAL); + rom_init(&bl->bios, bios_rom_name, bios_rom_addr, bios_rom_size, bios_rom_mask, 0, MEM_MAPPING_EXTERNAL); - if (has_autoscsi_rom) { - f = rom_fopen(autoscsi_rom_name, "rb"); - if (f) { - (void) !fread(bl->AutoSCSIROM, 1, autoscsi_rom_size, f); - fclose(f); - f = NULL; - } - } + if (has_autoscsi_rom) { + f = rom_fopen(autoscsi_rom_name, "rb"); + if (f) { + (void) !fread(bl->AutoSCSIROM, 1, autoscsi_rom_size, f); + fclose(f); + f = NULL; + } + } - if (has_scam_rom) { - f = rom_fopen(scam_rom_name, "rb"); - if (f) { - (void) !fread(bl->SCAMData, 1, scam_rom_size, f); - fclose(f); - f = NULL; - } - } - } - else { - bl->bios_size = 0; + if (has_scam_rom) { + f = rom_fopen(scam_rom_name, "rb"); + if (f) { + (void) !fread(bl->SCAMData, 1, scam_rom_size, f); + fclose(f); + f = NULL; + } + } + } else { + bl->bios_size = 0; - bl->bios_mask = 0; + bl->bios_mask = 0; } if (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30) { - dev->pci_slot = pci_add_card(PCI_ADD_NORMAL, BuslogicPCIRead, BuslogicPCIWrite, dev); + dev->pci_slot = pci_add_card(PCI_ADD_NORMAL, BuslogicPCIRead, BuslogicPCIWrite, dev); - buslogic_pci_bar[0].addr_regs[0] = 1; - buslogic_pci_bar[1].addr_regs[0] = 0; - buslogic_pci_regs[0x04] = 3; + buslogic_pci_bar[0].addr_regs[0] = 1; + buslogic_pci_bar[1].addr_regs[0] = 0; + buslogic_pci_regs[0x04] = 3; - /* Enable our BIOS space in PCI, if needed. */ - if (bl->has_bios) { - buslogic_pci_bar[2].addr = 0xFFFFC000; - } else { - buslogic_pci_bar[2].addr = 0; - } + /* Enable our BIOS space in PCI, if needed. */ + if (bl->has_bios) { + buslogic_pci_bar[2].addr = 0xFFFFC000; + } else { + buslogic_pci_bar[2].addr = 0; + } - x54x_mem_init(dev, 0xfffd0000); - x54x_mem_disable(dev); + x54x_mem_init(dev, 0xfffd0000); + x54x_mem_disable(dev); } if ((bl->chip == CHIP_BUSLOGIC_MCA_640A_1993_05_23) || (bl->chip == CHIP_BUSLOGIC_PCI_958D_1995_12_30)) - mem_mapping_disable(&bl->bios.mapping); + mem_mapping_disable(&bl->bios.mapping); buslogic_log("Buslogic on port 0x%04X\n", dev->Base); x54x_device_reset(dev); - if ((bl->chip != CHIP_BUSLOGIC_ISA_542B_1991_12_14) && (bl->chip != CHIP_BUSLOGIC_ISA_545S_1992_10_05) && (bl->chip != CHIP_BUSLOGIC_ISA_542BH_1993_05_23) && - (bl->chip != CHIP_BUSLOGIC_VLB_445S_1993_11_16) && (bl->chip != CHIP_BUSLOGIC_MCA_640A_1993_05_23)) { - BuslogicInitializeLocalRAM(bl); - BuslogicInitializeAutoSCSIRam(dev); + if ((bl->chip != CHIP_BUSLOGIC_ISA_542B_1991_12_14) && (bl->chip != CHIP_BUSLOGIC_ISA_545S_1992_10_05) && (bl->chip != CHIP_BUSLOGIC_ISA_542BH_1993_05_23) && (bl->chip != CHIP_BUSLOGIC_VLB_445S_1993_11_16) && (bl->chip != CHIP_BUSLOGIC_MCA_640A_1993_05_23)) { + BuslogicInitializeLocalRAM(bl); + BuslogicInitializeAutoSCSIRam(dev); } - return(dev); + return (dev); } // clang-format off @@ -1887,113 +1841,113 @@ static const device_config_t BT958D_Config[] = { // clang-format on const device_t buslogic_542b_device = { - .name = "BusLogic BT-542B ISA", + .name = "BusLogic BT-542B ISA", .internal_name = "bt542b", - .flags = DEVICE_ISA | DEVICE_AT, - .local = CHIP_BUSLOGIC_ISA_542B_1991_12_14, - .init = buslogic_init, - .close = x54x_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = CHIP_BUSLOGIC_ISA_542B_1991_12_14, + .init = buslogic_init, + .close = x54x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = BT_ISA_Config + .force_redraw = NULL, + .config = BT_ISA_Config }; const device_t buslogic_545s_device = { - .name = "BusLogic BT-545S ISA", + .name = "BusLogic BT-545S ISA", .internal_name = "bt545s", - .flags = DEVICE_ISA | DEVICE_AT, - .local = CHIP_BUSLOGIC_ISA_545S_1992_10_05, - .init = buslogic_init, - .close = x54x_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = CHIP_BUSLOGIC_ISA_545S_1992_10_05, + .init = buslogic_init, + .close = x54x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = BT_ISA_Config + .force_redraw = NULL, + .config = BT_ISA_Config }; const device_t buslogic_542bh_device = { - .name = "BusLogic BT-542BH ISA", + .name = "BusLogic BT-542BH ISA", .internal_name = "bt542bh", - .flags = DEVICE_ISA | DEVICE_AT, - .local = CHIP_BUSLOGIC_ISA_542BH_1993_05_23, - .init = buslogic_init, - .close = x54x_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = CHIP_BUSLOGIC_ISA_542BH_1993_05_23, + .init = buslogic_init, + .close = x54x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = BT_ISA_Config + .force_redraw = NULL, + .config = BT_ISA_Config }; const device_t buslogic_545c_device = { - .name = "BusLogic BT-545C ISA", + .name = "BusLogic BT-545C ISA", .internal_name = "bt545c", - .flags = DEVICE_ISA | DEVICE_AT, - .local = CHIP_BUSLOGIC_ISA_545C_1994_12_01, - .init = buslogic_init, - .close = x54x_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = CHIP_BUSLOGIC_ISA_545C_1994_12_01, + .init = buslogic_init, + .close = x54x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = BT_ISA_Config + .force_redraw = NULL, + .config = BT_ISA_Config }; const device_t buslogic_640a_device = { - .name = "BusLogic BT-640A MCA", + .name = "BusLogic BT-640A MCA", .internal_name = "bt640a", - .flags = DEVICE_MCA, - .local = CHIP_BUSLOGIC_MCA_640A_1993_05_23, - .init = buslogic_init, - .close = x54x_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = CHIP_BUSLOGIC_MCA_640A_1993_05_23, + .init = buslogic_init, + .close = x54x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t buslogic_445s_device = { - .name = "BusLogic BT-445S VLB", + .name = "BusLogic BT-445S VLB", .internal_name = "bt445s", - .flags = DEVICE_VLB, - .local = CHIP_BUSLOGIC_VLB_445S_1993_11_16, - .init = buslogic_init, - .close = x54x_close, - .reset = NULL, + .flags = DEVICE_VLB, + .local = CHIP_BUSLOGIC_VLB_445S_1993_11_16, + .init = buslogic_init, + .close = x54x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = BT_ISA_Config + .force_redraw = NULL, + .config = BT_ISA_Config }; const device_t buslogic_445c_device = { - .name = "BusLogic BT-445C VLB", + .name = "BusLogic BT-445C VLB", .internal_name = "bt445c", - .flags = DEVICE_VLB, - .local = CHIP_BUSLOGIC_VLB_445C_1994_12_01, - .init = buslogic_init, - .close = x54x_close, - .reset = NULL, + .flags = DEVICE_VLB, + .local = CHIP_BUSLOGIC_VLB_445C_1994_12_01, + .init = buslogic_init, + .close = x54x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = BT_ISA_Config + .force_redraw = NULL, + .config = BT_ISA_Config }; const device_t buslogic_958d_pci_device = { - .name = "BusLogic BT-958D PCI", + .name = "BusLogic BT-958D PCI", .internal_name = "bt958d", - .flags = DEVICE_PCI, - .local = CHIP_BUSLOGIC_PCI_958D_1995_12_30, - .init = buslogic_init, - .close = x54x_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = CHIP_BUSLOGIC_PCI_958D_1995_12_30, + .init = buslogic_init, + .close = x54x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = BT958D_Config + .force_redraw = NULL, + .config = BT958D_Config }; diff --git a/src/scsi/scsi_cdrom.c b/src/scsi/scsi_cdrom.c index e90e0d773..033a2bf42 100644 --- a/src/scsi/scsi_cdrom.c +++ b/src/scsi/scsi_cdrom.c @@ -39,317 +39,300 @@ #include <86box/scsi_cdrom.h> #include <86box/version.h> - -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { - uint8_t opcode; - uint8_t polled; - uint8_t reserved2[2]; - uint8_t class; - uint8_t reserved3[2]; - uint16_t len; - uint8_t control; + uint8_t opcode; + uint8_t polled; + uint8_t reserved2[2]; + uint8_t class; + uint8_t reserved3[2]; + uint16_t len; + uint8_t control; } gesn_cdb_t; typedef struct { - uint16_t len; - uint8_t notification_class; - uint8_t supported_events; + uint16_t len; + uint8_t notification_class; + uint8_t supported_events; } gesn_event_header_t; #pragma pack(pop) - /* Table of all SCSI commands and their flags, needed for the new disc change / not ready handler. */ -const uint8_t scsi_cdrom_command_flags[0x100] = -{ - IMPLEMENTED | CHECK_READY | NONDATA, /* 0x00 */ - IMPLEMENTED | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x01 */ - 0, /* 0x02 */ - IMPLEMENTED | ALLOW_UA, /* 0x03 */ - 0, 0, 0, 0, /* 0x04-0x07 */ - IMPLEMENTED | CHECK_READY, /* 0x08 */ - 0, 0, /* 0x09-0x0A */ - IMPLEMENTED | CHECK_READY | NONDATA, /* 0x0B */ - 0, 0, 0, 0, 0, 0, /* 0x0C-0x11 */ - IMPLEMENTED | ALLOW_UA, /* 0x12 */ - IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x13 */ - 0, /* 0x14 */ - IMPLEMENTED, /* 0x15 */ - 0, 0, 0, 0, /* 0x16-0x19 */ - IMPLEMENTED, /* 0x1A */ - IMPLEMENTED | CHECK_READY, /* 0x1B */ - 0, 0, /* 0x1C-0x1D */ - IMPLEMENTED | CHECK_READY, /* 0x1E */ - 0, 0, 0, 0, 0, 0, /* 0x1F-0x24 */ - IMPLEMENTED | CHECK_READY, /* 0x25 */ - 0, 0, /* 0x26-0x27 */ - IMPLEMENTED | CHECK_READY, /* 0x28 */ - 0, 0, /* 0x29-0x2A */ - IMPLEMENTED | CHECK_READY | NONDATA, /* 0x2B */ - 0, 0, 0, /* 0x2C-0x2E */ - IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x2F */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x30-0x3F */ - 0, 0, /* 0x40-0x41 */ - IMPLEMENTED | CHECK_READY, /* 0x42 */ - IMPLEMENTED | CHECK_READY, /* 0x43 - Read TOC - can get through UNIT_ATTENTION, per VIDE-CDD.SYS - NOTE: The ATAPI reference says otherwise, but I think this is a question of - interpreting things right - the UNIT ATTENTION condition we have here - is a tradition from not ready to ready, by definition the drive - eventually becomes ready, make the condition go away. */ - IMPLEMENTED | CHECK_READY, /* 0x44 */ - IMPLEMENTED | CHECK_READY, /* 0x45 */ - IMPLEMENTED | ALLOW_UA, /* 0x46 */ - IMPLEMENTED | CHECK_READY, /* 0x47 */ - IMPLEMENTED | CHECK_READY, /* 0x48 */ - IMPLEMENTED | CHECK_READY, /* 0x49 */ - IMPLEMENTED | ALLOW_UA, /* 0x4A */ - IMPLEMENTED | CHECK_READY, /* 0x4B */ - 0, 0, /* 0x4C-0x4D */ - IMPLEMENTED | CHECK_READY, /* 0x4E */ - 0, 0, /* 0x4F-0x50 */ - IMPLEMENTED | CHECK_READY, /* 0x51 */ - IMPLEMENTED | CHECK_READY, /* 0x52 */ - 0, 0, /* 0x53-0x54 */ - IMPLEMENTED, /* 0x55 */ - 0, 0, 0, 0, /* 0x56-0x59 */ - IMPLEMENTED, /* 0x5A */ - 0, 0, 0, 0, 0, /* 0x5B-0x5F */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x60-0x6F */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x70-0x7F */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x80-0x8F */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x90-0x9F */ - 0, 0, 0, 0, 0, /* 0xA0-0xA4 */ - IMPLEMENTED | CHECK_READY, /* 0xA5 */ - 0, 0, /* 0xA6-0xA7 */ - IMPLEMENTED | CHECK_READY, /* 0xA8 */ - IMPLEMENTED | CHECK_READY, /* 0xA9 */ - 0, 0, 0, /* 0xAA-0xAC */ - IMPLEMENTED | CHECK_READY, /* 0xAD */ - 0, /* 0xAE */ - IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0xAF */ - 0, 0, 0, 0, /* 0xB0-0xB3 */ - IMPLEMENTED | CHECK_READY | ATAPI_ONLY, /* 0xB4 */ - 0, 0, 0, /* 0xB5-0xB7 */ - IMPLEMENTED | CHECK_READY | ATAPI_ONLY, /* 0xB8 */ - IMPLEMENTED | CHECK_READY, /* 0xB9 */ - IMPLEMENTED | CHECK_READY, /* 0xBA */ - IMPLEMENTED, /* 0xBB */ - IMPLEMENTED | CHECK_READY, /* 0xBC */ - IMPLEMENTED, /* 0xBD */ - IMPLEMENTED | CHECK_READY, /* 0xBE */ - IMPLEMENTED | CHECK_READY, /* 0xBF */ - IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC0 */ - IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC1 */ - IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC2 */ - 0, /* 0xC3 */ - IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC4 */ - 0, /* 0xC5 */ - IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC6 */ - IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC7 */ - 0, 0, 0, 0, 0, /* 0xC8-0xCC */ - IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xCD */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0xCE-0xD9 */ - IMPLEMENTED | SCSI_ONLY, /* 0xDA */ - 0, 0, 0, 0, 0, /* 0xDB-0xDF */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0xE0-0xEF */ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 /* 0xF0-0xFF */ +const uint8_t scsi_cdrom_command_flags[0x100] = { + IMPLEMENTED | CHECK_READY | NONDATA, /* 0x00 */ + IMPLEMENTED | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x01 */ + 0, /* 0x02 */ + IMPLEMENTED | ALLOW_UA, /* 0x03 */ + 0, 0, 0, 0, /* 0x04-0x07 */ + IMPLEMENTED | CHECK_READY, /* 0x08 */ + 0, 0, /* 0x09-0x0A */ + IMPLEMENTED | CHECK_READY | NONDATA, /* 0x0B */ + 0, 0, 0, 0, 0, 0, /* 0x0C-0x11 */ + IMPLEMENTED | ALLOW_UA, /* 0x12 */ + IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x13 */ + 0, /* 0x14 */ + IMPLEMENTED, /* 0x15 */ + 0, 0, 0, 0, /* 0x16-0x19 */ + IMPLEMENTED, /* 0x1A */ + IMPLEMENTED | CHECK_READY, /* 0x1B */ + 0, 0, /* 0x1C-0x1D */ + IMPLEMENTED | CHECK_READY, /* 0x1E */ + 0, 0, 0, 0, 0, 0, /* 0x1F-0x24 */ + IMPLEMENTED | CHECK_READY, /* 0x25 */ + 0, 0, /* 0x26-0x27 */ + IMPLEMENTED | CHECK_READY, /* 0x28 */ + 0, 0, /* 0x29-0x2A */ + IMPLEMENTED | CHECK_READY | NONDATA, /* 0x2B */ + 0, 0, 0, /* 0x2C-0x2E */ + IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x2F */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x30-0x3F */ + 0, 0, /* 0x40-0x41 */ + IMPLEMENTED | CHECK_READY, /* 0x42 */ + IMPLEMENTED | CHECK_READY, /* 0x43 - Read TOC - can get through UNIT_ATTENTION, per VIDE-CDD.SYS + NOTE: The ATAPI reference says otherwise, but I think this is a question of + interpreting things right - the UNIT ATTENTION condition we have here + is a tradition from not ready to ready, by definition the drive + eventually becomes ready, make the condition go away. */ + IMPLEMENTED | CHECK_READY, /* 0x44 */ + IMPLEMENTED | CHECK_READY, /* 0x45 */ + IMPLEMENTED | ALLOW_UA, /* 0x46 */ + IMPLEMENTED | CHECK_READY, /* 0x47 */ + IMPLEMENTED | CHECK_READY, /* 0x48 */ + IMPLEMENTED | CHECK_READY, /* 0x49 */ + IMPLEMENTED | ALLOW_UA, /* 0x4A */ + IMPLEMENTED | CHECK_READY, /* 0x4B */ + 0, 0, /* 0x4C-0x4D */ + IMPLEMENTED | CHECK_READY, /* 0x4E */ + 0, 0, /* 0x4F-0x50 */ + IMPLEMENTED | CHECK_READY, /* 0x51 */ + IMPLEMENTED | CHECK_READY, /* 0x52 */ + 0, 0, /* 0x53-0x54 */ + IMPLEMENTED, /* 0x55 */ + 0, 0, 0, 0, /* 0x56-0x59 */ + IMPLEMENTED, /* 0x5A */ + 0, 0, 0, 0, 0, /* 0x5B-0x5F */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x60-0x6F */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x70-0x7F */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x80-0x8F */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x90-0x9F */ + 0, 0, 0, 0, 0, /* 0xA0-0xA4 */ + IMPLEMENTED | CHECK_READY, /* 0xA5 */ + 0, 0, /* 0xA6-0xA7 */ + IMPLEMENTED | CHECK_READY, /* 0xA8 */ + IMPLEMENTED | CHECK_READY, /* 0xA9 */ + 0, 0, 0, /* 0xAA-0xAC */ + IMPLEMENTED | CHECK_READY, /* 0xAD */ + 0, /* 0xAE */ + IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0xAF */ + 0, 0, 0, 0, /* 0xB0-0xB3 */ + IMPLEMENTED | CHECK_READY | ATAPI_ONLY, /* 0xB4 */ + 0, 0, 0, /* 0xB5-0xB7 */ + IMPLEMENTED | CHECK_READY | ATAPI_ONLY, /* 0xB8 */ + IMPLEMENTED | CHECK_READY, /* 0xB9 */ + IMPLEMENTED | CHECK_READY, /* 0xBA */ + IMPLEMENTED, /* 0xBB */ + IMPLEMENTED | CHECK_READY, /* 0xBC */ + IMPLEMENTED, /* 0xBD */ + IMPLEMENTED | CHECK_READY, /* 0xBE */ + IMPLEMENTED | CHECK_READY, /* 0xBF */ + IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC0 */ + IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC1 */ + IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC2 */ + 0, /* 0xC3 */ + IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC4 */ + 0, /* 0xC5 */ + IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC6 */ + IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xC7 */ + 0, 0, 0, 0, 0, /* 0xC8-0xCC */ + IMPLEMENTED | CHECK_READY | SCSI_ONLY, /* 0xCD */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0xCE-0xD9 */ + IMPLEMENTED | SCSI_ONLY, /* 0xDA */ + 0, 0, 0, 0, 0, /* 0xDB-0xDF */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0xE0-0xEF */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 /* 0xF0-0xFF */ }; -static uint64_t scsi_cdrom_mode_sense_page_flags = (GPMODEP_R_W_ERROR_PAGE | - GPMODEP_DISCONNECT_PAGE | - GPMODEP_CDROM_PAGE | - GPMODEP_CDROM_AUDIO_PAGE | - (1ULL << 0x0fULL) | - GPMODEP_CAPABILITIES_PAGE | - GPMODEP_ALL_PAGES); +static uint64_t scsi_cdrom_mode_sense_page_flags = (GPMODEP_R_W_ERROR_PAGE | GPMODEP_DISCONNECT_PAGE | GPMODEP_CDROM_PAGE | GPMODEP_CDROM_AUDIO_PAGE | (1ULL << 0x0fULL) | GPMODEP_CAPABILITIES_PAGE | GPMODEP_ALL_PAGES); -static const mode_sense_pages_t scsi_cdrom_mode_sense_pages_default = -{ { - { 0, 0 }, - { GPMODE_R_W_ERROR_PAGE, 6, 0, 5, 0, 0, 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { GPMODE_CDROM_PAGE, 6, 0, 1, 0, 60, 0, 75 }, - { 0x8E, 0xE, 4, 0, 0, 0, 0, 75, 1, 255, 2, 255, 0, 0, 0, 0 }, - { 0x0F, 0x14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 2, 0xC2, 1, 0, 0, 0, 2, 0xC2, 0, 0, 0, 0 } -} }; +static const mode_sense_pages_t scsi_cdrom_mode_sense_pages_default = { + {{ 0, 0 }, + { GPMODE_R_W_ERROR_PAGE, 6, 0, 5, 0, 0, 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { GPMODE_CDROM_PAGE, 6, 0, 1, 0, 60, 0, 75 }, + { 0x8E, 0xE, 4, 0, 0, 0, 0, 75, 1, 255, 2, 255, 0, 0, 0, 0 }, + { 0x0F, 0x14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 2, 0xC2, 1, 0, 0, 0, 2, 0xC2, 0, 0, 0, 0 }} +}; -static const mode_sense_pages_t scsi_cdrom_mode_sense_pages_default_scsi = -{ { - { 0, 0 }, - { GPMODE_R_W_ERROR_PAGE, 6, 0, 5, 0, 0, 0, 0 }, - { GPMODE_DISCONNECT_PAGE, 0x0e, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { GPMODE_CDROM_PAGE, 6, 0, 1, 0, 60, 0, 75 }, - { 0x8E, 0xE, 5, 4, 0,128, 0, 75, 1, 255, 2, 255, 0, 0, 0, 0 }, - { 0x0F, 0x14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 2, 0xC2, 1, 0, 0, 0, 2, 0xC2, 0, 0, 0, 0 } -} }; +static const mode_sense_pages_t scsi_cdrom_mode_sense_pages_default_scsi = { + {{ 0, 0 }, + { GPMODE_R_W_ERROR_PAGE, 6, 0, 5, 0, 0, 0, 0 }, + { GPMODE_DISCONNECT_PAGE, 0x0e, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { GPMODE_CDROM_PAGE, 6, 0, 1, 0, 60, 0, 75 }, + { 0x8E, 0xE, 5, 4, 0, 128, 0, 75, 1, 255, 2, 255, 0, 0, 0, 0 }, + { 0x0F, 0x14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 2, 0xC2, 1, 0, 0, 0, 2, 0xC2, 0, 0, 0, 0 }} +}; -static const mode_sense_pages_t scsi_cdrom_mode_sense_pages_changeable = -{ { - { 0, 0 }, - { GPMODE_R_W_ERROR_PAGE, 6, 0xFF, 0xFF, 0, 0, 0, 0 }, - { GPMODE_DISCONNECT_PAGE, 0x0E, 0xFF, 0, 0, 0, 0, 0, 0, 0, 0xFF, 0xFF, 0, 0, 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { GPMODE_CDROM_PAGE, 6, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }, - { 0x8E, 0xE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }, - { 0x0F, 0x14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { 0, 0 }, - { GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } -} }; +static const mode_sense_pages_t scsi_cdrom_mode_sense_pages_changeable = { + {{ 0, 0 }, + { GPMODE_R_W_ERROR_PAGE, 6, 0xFF, 0xFF, 0, 0, 0, 0 }, + { GPMODE_DISCONNECT_PAGE, 0x0E, 0xFF, 0, 0, 0, 0, 0, 0, 0, 0xFF, 0xFF, 0, 0, 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { GPMODE_CDROM_PAGE, 6, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }, + { 0x8E, 0xE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }, + { 0x0F, 0x14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { 0, 0 }, + { GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }} +}; -static gesn_cdb_t *gesn_cdb; +static gesn_cdb_t *gesn_cdb; static gesn_event_header_t *gesn_event_header; +static void scsi_cdrom_command_complete(scsi_cdrom_t *dev); -static void scsi_cdrom_command_complete(scsi_cdrom_t *dev); - -static void scsi_cdrom_mode_sense_load(scsi_cdrom_t *dev); - -static void scsi_cdrom_init(scsi_cdrom_t *dev); +static void scsi_cdrom_mode_sense_load(scsi_cdrom_t *dev); +static void scsi_cdrom_init(scsi_cdrom_t *dev); #ifdef ENABLE_SCSI_CDROM_LOG int scsi_cdrom_do_log = ENABLE_SCSI_CDROM_LOG; - static void scsi_cdrom_log(const char *format, ...) { va_list ap; if (scsi_cdrom_do_log) { - va_start(ap, format); - pclog_ex(format, ap); - va_end(ap); + va_start(ap, format); + pclog_ex(format, ap); + va_end(ap); } } #else -#define scsi_cdrom_log(format, ...) +# define scsi_cdrom_log(format, ...) #endif - static void scsi_cdrom_set_callback(scsi_cdrom_t *dev) { if (dev && dev->drv && (dev->drv->bus_type != CDROM_BUS_SCSI)) - ide_set_callback(ide_drives[dev->drv->ide_channel], dev->callback); + ide_set_callback(ide_drives[dev->drv->ide_channel], dev->callback); } - static void scsi_cdrom_init(scsi_cdrom_t *dev) { if (!dev) - return; + return; /* Do a reset (which will also rezero it). */ scsi_cdrom_reset((scsi_common_t *) dev); @@ -359,206 +342,197 @@ scsi_cdrom_init(scsi_cdrom_t *dev) dev->drv->bus_mode = 0; if (dev->drv->bus_type >= CDROM_BUS_ATAPI) - dev->drv->bus_mode |= 2; + dev->drv->bus_mode |= 2; if (dev->drv->bus_type < CDROM_BUS_SCSI) - dev->drv->bus_mode |= 1; + dev->drv->bus_mode |= 1; scsi_cdrom_log("CD-ROM %i: Bus type %i, bus mode %i\n", dev->id, dev->drv->bus_type, dev->drv->bus_mode); - dev->sense[0] = 0xf0; - dev->sense[7] = 10; - dev->status = READY_STAT | DSC_STAT; - dev->pos = 0; - dev->packet_status = PHASE_NONE; + dev->sense[0] = 0xf0; + dev->sense[7] = 10; + dev->status = READY_STAT | DSC_STAT; + dev->pos = 0; + dev->packet_status = PHASE_NONE; scsi_cdrom_sense_key = scsi_cdrom_asc = scsi_cdrom_ascq = dev->unit_attention = 0; - dev->drv->cur_speed = dev->drv->speed; + dev->drv->cur_speed = dev->drv->speed; scsi_cdrom_mode_sense_load(dev); } - /* Returns: 0 for none, 1 for PIO, 2 for DMA. */ static int scsi_cdrom_current_mode(scsi_cdrom_t *dev) { if (dev->drv->bus_type == CDROM_BUS_SCSI) - return 2; + return 2; else if (dev->drv->bus_type == CDROM_BUS_ATAPI) { - scsi_cdrom_log("CD-ROM %i: ATAPI drive, setting to %s\n", dev->id, - (dev->features & 1) ? "DMA" : "PIO", - dev->id); - return (dev->features & 1) ? 2 : 1; + scsi_cdrom_log("CD-ROM %i: ATAPI drive, setting to %s\n", dev->id, + (dev->features & 1) ? "DMA" : "PIO", + dev->id); + return (dev->features & 1) ? 2 : 1; } return 0; } - /* Translates ATAPI phase (DRQ, I/O, C/D) to SCSI phase (MSG, C/D, I/O). */ int scsi_cdrom_atapi_phase_to_scsi(scsi_cdrom_t *dev) { if (dev->status & 8) { - switch (dev->phase & 3) { - case 0: - return 0; - case 1: - return 2; - case 2: - return 1; - case 3: - return 7; - } + switch (dev->phase & 3) { + case 0: + return 0; + case 1: + return 2; + case 2: + return 1; + case 3: + return 7; + } } else { - if ((dev->phase & 3) == 3) - return 3; - else - return 4; + if ((dev->phase & 3) == 3) + return 3; + else + return 4; } return 0; } - static uint32_t scsi_cdrom_get_channel(void *p, int channel) { scsi_cdrom_t *dev = (scsi_cdrom_t *) p; if (!dev) - return channel + 1; + return channel + 1; return dev->ms_pages_saved.pages[GPMODE_CDROM_AUDIO_PAGE][channel ? 10 : 8]; } - static uint32_t scsi_cdrom_get_volume(void *p, int channel) { scsi_cdrom_t *dev = (scsi_cdrom_t *) p; if (!dev) - return 255; + return 255; return dev->ms_pages_saved.pages[GPMODE_CDROM_AUDIO_PAGE][channel ? 11 : 9]; } - static void scsi_cdrom_mode_sense_load(scsi_cdrom_t *dev) { FILE *f; - char file_name[512]; + char file_name[512]; memset(&dev->ms_pages_saved, 0, sizeof(mode_sense_pages_t)); if (dev->drv->bus_type == CDROM_BUS_SCSI) - memcpy(&dev->ms_pages_saved, &scsi_cdrom_mode_sense_pages_default_scsi, sizeof(mode_sense_pages_t)); + memcpy(&dev->ms_pages_saved, &scsi_cdrom_mode_sense_pages_default_scsi, sizeof(mode_sense_pages_t)); else - memcpy(&dev->ms_pages_saved, &scsi_cdrom_mode_sense_pages_default, sizeof(mode_sense_pages_t)); + memcpy(&dev->ms_pages_saved, &scsi_cdrom_mode_sense_pages_default, sizeof(mode_sense_pages_t)); memset(file_name, 0, 512); if (dev->drv->bus_type == CDROM_BUS_SCSI) - sprintf(file_name, "scsi_cdrom_%02i_mode_sense_bin", dev->id); + sprintf(file_name, "scsi_cdrom_%02i_mode_sense_bin", dev->id); else - sprintf(file_name, "cdrom_%02i_mode_sense_bin", dev->id); + sprintf(file_name, "cdrom_%02i_mode_sense_bin", dev->id); f = plat_fopen(nvr_path(file_name), "rb"); if (f) { - if (fread(dev->ms_pages_saved.pages[GPMODE_CDROM_AUDIO_PAGE], 1, 0x10, f) != 0x10) - fatal("scsi_cdrom_mode_sense_load(): Error reading data\n"); - fclose(f); + if (fread(dev->ms_pages_saved.pages[GPMODE_CDROM_AUDIO_PAGE], 1, 0x10, f) != 0x10) + fatal("scsi_cdrom_mode_sense_load(): Error reading data\n"); + fclose(f); } } - static void scsi_cdrom_mode_sense_save(scsi_cdrom_t *dev) { FILE *f; - char file_name[512]; + char file_name[512]; memset(file_name, 0, 512); if (dev->drv->bus_type == CDROM_BUS_SCSI) - sprintf(file_name, "scsi_cdrom_%02i_mode_sense_bin", dev->id); + sprintf(file_name, "scsi_cdrom_%02i_mode_sense_bin", dev->id); else - sprintf(file_name, "cdrom_%02i_mode_sense_bin", dev->id); + sprintf(file_name, "cdrom_%02i_mode_sense_bin", dev->id); f = plat_fopen(nvr_path(file_name), "wb"); if (f) { - fwrite(dev->ms_pages_saved.pages[GPMODE_CDROM_AUDIO_PAGE], 1, 0x10, f); - fclose(f); + fwrite(dev->ms_pages_saved.pages[GPMODE_CDROM_AUDIO_PAGE], 1, 0x10, f); + fclose(f); } } - /*SCSI Mode Sense 6/10*/ static uint8_t scsi_cdrom_mode_sense_read(scsi_cdrom_t *dev, uint8_t page_control, uint8_t page, uint8_t pos) { switch (page_control) { - case 0: - case 3: - return dev->ms_pages_saved.pages[page][pos]; - break; - case 1: - return scsi_cdrom_mode_sense_pages_changeable.pages[page][pos]; - break; - case 2: - if (dev->drv->bus_type == CDROM_BUS_SCSI) - return scsi_cdrom_mode_sense_pages_default_scsi.pages[page][pos]; - else - return scsi_cdrom_mode_sense_pages_default.pages[page][pos]; - break; + case 0: + case 3: + return dev->ms_pages_saved.pages[page][pos]; + break; + case 1: + return scsi_cdrom_mode_sense_pages_changeable.pages[page][pos]; + break; + case 2: + if (dev->drv->bus_type == CDROM_BUS_SCSI) + return scsi_cdrom_mode_sense_pages_default_scsi.pages[page][pos]; + else + return scsi_cdrom_mode_sense_pages_default.pages[page][pos]; + break; } return 0; } - static uint32_t scsi_cdrom_mode_sense(scsi_cdrom_t *dev, uint8_t *buf, uint32_t pos, uint8_t page, uint8_t block_descriptor_len) { uint8_t page_control = (page >> 6) & 3; - int i = 0, j = 0; + int i = 0, j = 0; uint8_t msplen; page &= 0x3f; if (block_descriptor_len) { - buf[pos++] = 1; /* Density code. */ - buf[pos++] = 0; /* Number of blocks (0 = all). */ - buf[pos++] = 0; - buf[pos++] = 0; - buf[pos++] = 0; /* Reserved. */ - buf[pos++] = 0; /* Block length (0x800 = 2048 bytes). */ - buf[pos++] = 8; - buf[pos++] = 0; + buf[pos++] = 1; /* Density code. */ + buf[pos++] = 0; /* Number of blocks (0 = all). */ + buf[pos++] = 0; + buf[pos++] = 0; + buf[pos++] = 0; /* Reserved. */ + buf[pos++] = 0; /* Block length (0x800 = 2048 bytes). */ + buf[pos++] = 8; + buf[pos++] = 0; } for (i = 0; i < 0x40; i++) { if ((page == GPMODE_ALL_PAGES) || (page == i)) { - if (scsi_cdrom_mode_sense_page_flags & (1LL << ((uint64_t) (page & 0x3f)))) { - buf[pos++] = scsi_cdrom_mode_sense_read(dev, page_control, i, 0); - msplen = scsi_cdrom_mode_sense_read(dev, page_control, i, 1); - buf[pos++] = msplen; - scsi_cdrom_log("CD-ROM %i: MODE SENSE: Page [%02X] length %i\n", dev->id, i, msplen); - for (j = 0; j < msplen; j++) { - if ((i == GPMODE_CAPABILITIES_PAGE) && (j >= 6) && (j <= 7)) { - if (j & 1) - buf[pos++] = ((dev->drv->speed * 176) & 0xff); - else - buf[pos++] = ((dev->drv->speed * 176) >> 8); - } else if ((i == GPMODE_CAPABILITIES_PAGE) && (j >= 12) && (j <= 13)) { - if (j & 1) - buf[pos++] = ((dev->drv->cur_speed * 176) & 0xff); - else - buf[pos++] = ((dev->drv->cur_speed * 176) >> 8); - } else - buf[pos++] = scsi_cdrom_mode_sense_read(dev, page_control, i, 2 + j); - } - } - } + if (scsi_cdrom_mode_sense_page_flags & (1LL << ((uint64_t) (page & 0x3f)))) { + buf[pos++] = scsi_cdrom_mode_sense_read(dev, page_control, i, 0); + msplen = scsi_cdrom_mode_sense_read(dev, page_control, i, 1); + buf[pos++] = msplen; + scsi_cdrom_log("CD-ROM %i: MODE SENSE: Page [%02X] length %i\n", dev->id, i, msplen); + for (j = 0; j < msplen; j++) { + if ((i == GPMODE_CAPABILITIES_PAGE) && (j >= 6) && (j <= 7)) { + if (j & 1) + buf[pos++] = ((dev->drv->speed * 176) & 0xff); + else + buf[pos++] = ((dev->drv->speed * 176) >> 8); + } else if ((i == GPMODE_CAPABILITIES_PAGE) && (j >= 12) && (j <= 13)) { + if (j & 1) + buf[pos++] = ((dev->drv->cur_speed * 176) & 0xff); + else + buf[pos++] = ((dev->drv->cur_speed * 176) >> 8); + } else + buf[pos++] = scsi_cdrom_mode_sense_read(dev, page_control, i, 2 + j); + } + } + } } return pos; } - static void scsi_cdrom_update_request_length(scsi_cdrom_t *dev, int len, int block_len) { @@ -568,146 +542,143 @@ scsi_cdrom_update_request_length(scsi_cdrom_t *dev, int len, int block_len) /* For media access commands, make sure the requested DRQ length matches the block length. */ switch (dev->current_cdb[0]) { - case 0x08: - case 0x28: - case 0xa8: - /* Round it to the nearest 2048 bytes. */ - dev->max_transfer_len = (dev->max_transfer_len >> 11) << 11; - /* FALLTHROUGH */ + case 0x08: + case 0x28: + case 0xa8: + /* Round it to the nearest 2048 bytes. */ + dev->max_transfer_len = (dev->max_transfer_len >> 11) << 11; + /* FALLTHROUGH */ - case 0xb9: - case 0xbe: - /* Make sure total length is not bigger than sum of the lengths of - all the requested blocks. */ - bt = (dev->requested_blocks * block_len); - if (len > bt) - len = bt; + case 0xb9: + case 0xbe: + /* Make sure total length is not bigger than sum of the lengths of + all the requested blocks. */ + bt = (dev->requested_blocks * block_len); + if (len > bt) + len = bt; - min_len = block_len; + min_len = block_len; - if (len <= block_len) { - /* Total length is less or equal to block length. */ - if (dev->max_transfer_len < block_len) { - /* Transfer a minimum of (block size) bytes. */ - dev->max_transfer_len = block_len; - dev->packet_len = block_len; - break; - } - } - /*FALLTHROUGH*/ - default: - dev->packet_len = len; - break; + if (len <= block_len) { + /* Total length is less or equal to block length. */ + if (dev->max_transfer_len < block_len) { + /* Transfer a minimum of (block size) bytes. */ + dev->max_transfer_len = block_len; + dev->packet_len = block_len; + break; + } + } + /*FALLTHROUGH*/ + default: + dev->packet_len = len; + break; } /* If the DRQ length is odd, and the total remaining length is bigger, make sure it's even. */ if ((dev->max_transfer_len & 1) && (dev->max_transfer_len < len)) - dev->max_transfer_len &= 0xfffe; + dev->max_transfer_len &= 0xfffe; /* If the DRQ length is smaller or equal in size to the total remaining length, set it to that. */ if (!dev->max_transfer_len) - dev->max_transfer_len = 65534; + dev->max_transfer_len = 65534; if ((len <= dev->max_transfer_len) && (len >= min_len)) - dev->request_length = dev->max_transfer_len = len; + dev->request_length = dev->max_transfer_len = len; else if (len > dev->max_transfer_len) - dev->request_length = dev->max_transfer_len; + dev->request_length = dev->max_transfer_len; return; } - static double scsi_cdrom_bus_speed(scsi_cdrom_t *dev) { double ret = -1.0; if (dev && dev->drv && (dev->drv->bus_type == CDROM_BUS_SCSI)) { - dev->callback = -1.0; /* Speed depends on SCSI controller */ - return 0.0; + dev->callback = -1.0; /* Speed depends on SCSI controller */ + return 0.0; } else { - if (dev && dev->drv) - ret = ide_atapi_get_period(dev->drv->ide_channel); - if (ret == -1.0) { - if (dev) - dev->callback = -1.0; - return 0.0; - } else - return ret * 1000000.0; + if (dev && dev->drv) + ret = ide_atapi_get_period(dev->drv->ide_channel); + if (ret == -1.0) { + if (dev) + dev->callback = -1.0; + return 0.0; + } else + return ret * 1000000.0; } } - static void scsi_cdrom_command_common(scsi_cdrom_t *dev) { double bytes_per_second, period; - dev->status = BUSY_STAT; - dev->phase = 1; - dev->pos = 0; + dev->status = BUSY_STAT; + dev->phase = 1; + dev->pos = 0; dev->callback = 0; scsi_cdrom_log("CD-ROM %i: Current speed: %ix\n", dev->id, dev->drv->cur_speed); if (dev->packet_status == PHASE_COMPLETE) - dev->callback = 0; + dev->callback = 0; else { - switch(dev->current_cdb[0]) { - case GPCMD_REZERO_UNIT: - case 0x0b: - case 0x2b: - /* Seek time is in us. */ - period = cdrom_seek_time(dev->drv); - scsi_cdrom_log("CD-ROM %i: Seek period: %" PRIu64 " us\n", - dev->id, (uint64_t) period); - dev->callback += period; - scsi_cdrom_set_callback(dev); - return; - case 0x08: - case 0x28: - case 0xa8: - /* Seek time is in us. */ - period = cdrom_seek_time(dev->drv); - scsi_cdrom_log("CD-ROM %i: Seek period: %" PRIu64 " us\n", - dev->id, (uint64_t) period); - dev->callback += period; - /*FALLTHROUGH*/ - case 0x25: - case 0x42: - case 0x43: - case 0x44: - case 0x51: - case 0x52: - case 0xad: - case 0xb8: - case 0xb9: - case 0xbe: - case 0xc6: - case 0xc7: - if (dev->current_cdb[0] == 0x42) - dev->callback += 40.0; - /* Account for seek time. */ - bytes_per_second = 176.0 * 1024.0; - bytes_per_second *= (double) dev->drv->cur_speed; - break; - default: - bytes_per_second = scsi_cdrom_bus_speed(dev); - if (bytes_per_second == 0.0) { - dev->callback = -1; /* Speed depends on SCSI controller */ - return; - } - break; - } + switch (dev->current_cdb[0]) { + case GPCMD_REZERO_UNIT: + case 0x0b: + case 0x2b: + /* Seek time is in us. */ + period = cdrom_seek_time(dev->drv); + scsi_cdrom_log("CD-ROM %i: Seek period: %" PRIu64 " us\n", + dev->id, (uint64_t) period); + dev->callback += period; + scsi_cdrom_set_callback(dev); + return; + case 0x08: + case 0x28: + case 0xa8: + /* Seek time is in us. */ + period = cdrom_seek_time(dev->drv); + scsi_cdrom_log("CD-ROM %i: Seek period: %" PRIu64 " us\n", + dev->id, (uint64_t) period); + dev->callback += period; + /*FALLTHROUGH*/ + case 0x25: + case 0x42: + case 0x43: + case 0x44: + case 0x51: + case 0x52: + case 0xad: + case 0xb8: + case 0xb9: + case 0xbe: + case 0xc6: + case 0xc7: + if (dev->current_cdb[0] == 0x42) + dev->callback += 40.0; + /* Account for seek time. */ + bytes_per_second = 176.0 * 1024.0; + bytes_per_second *= (double) dev->drv->cur_speed; + break; + default: + bytes_per_second = scsi_cdrom_bus_speed(dev); + if (bytes_per_second == 0.0) { + dev->callback = -1; /* Speed depends on SCSI controller */ + return; + } + break; + } - period = 1000000.0 / bytes_per_second; - scsi_cdrom_log("CD-ROM %i: Byte transfer period: %" PRIu64 " us\n", dev->id, (uint64_t) period); - period = period * (double) (dev->packet_len); - scsi_cdrom_log("CD-ROM %i: Sector transfer period: %" PRIu64 " us\n", dev->id, (uint64_t) period); - dev->callback += period; + period = 1000000.0 / bytes_per_second; + scsi_cdrom_log("CD-ROM %i: Byte transfer period: %" PRIu64 " us\n", dev->id, (uint64_t) period); + period = period * (double) (dev->packet_len); + scsi_cdrom_log("CD-ROM %i: Sector transfer period: %" PRIu64 " us\n", dev->id, (uint64_t) period); + dev->callback += period; } scsi_cdrom_set_callback(dev); } - static void scsi_cdrom_command_complete(scsi_cdrom_t *dev) { @@ -716,7 +687,6 @@ scsi_cdrom_command_complete(scsi_cdrom_t *dev) scsi_cdrom_command_common(dev); } - static void scsi_cdrom_command_read(scsi_cdrom_t *dev) { @@ -724,7 +694,6 @@ scsi_cdrom_command_read(scsi_cdrom_t *dev) scsi_cdrom_command_common(dev); } - static void scsi_cdrom_command_read_dma(scsi_cdrom_t *dev) { @@ -732,7 +701,6 @@ scsi_cdrom_command_read_dma(scsi_cdrom_t *dev) scsi_cdrom_command_common(dev); } - static void scsi_cdrom_command_write(scsi_cdrom_t *dev) { @@ -740,132 +708,125 @@ scsi_cdrom_command_write(scsi_cdrom_t *dev) scsi_cdrom_command_common(dev); } - -static void scsi_cdrom_command_write_dma(scsi_cdrom_t *dev) +static void +scsi_cdrom_command_write_dma(scsi_cdrom_t *dev) { dev->packet_status = PHASE_DATA_OUT_DMA; scsi_cdrom_command_common(dev); } - /* id = Current CD-ROM device ID; len = Total transfer length; block_len = Length of a single block (it matters because media access commands on ATAPI); alloc_len = Allocated transfer length; direction = Transfer direction (0 = read from host, 1 = write to host). */ -static void scsi_cdrom_data_command_finish(scsi_cdrom_t *dev, int len, int block_len, int alloc_len, int direction) +static void +scsi_cdrom_data_command_finish(scsi_cdrom_t *dev, int len, int block_len, int alloc_len, int direction) { scsi_cdrom_log("CD-ROM %i: Finishing command (%02X): %i, %i, %i, %i, %i\n", - dev->id, dev->current_cdb[0], len, block_len, alloc_len, direction, dev->request_length); + dev->id, dev->current_cdb[0], len, block_len, alloc_len, direction, dev->request_length); dev->pos = 0; if (alloc_len >= 0) { - if (alloc_len < len) - len = alloc_len; + if (alloc_len < len) + len = alloc_len; } if ((len == 0) || (scsi_cdrom_current_mode(dev) == 0)) { - if (dev->drv->bus_type != CDROM_BUS_SCSI) - dev->packet_len = 0; + if (dev->drv->bus_type != CDROM_BUS_SCSI) + dev->packet_len = 0; - scsi_cdrom_command_complete(dev); + scsi_cdrom_command_complete(dev); } else { - if (scsi_cdrom_current_mode(dev) == 2) { - if (dev->drv->bus_type != CDROM_BUS_SCSI) - dev->packet_len = alloc_len; + if (scsi_cdrom_current_mode(dev) == 2) { + if (dev->drv->bus_type != CDROM_BUS_SCSI) + dev->packet_len = alloc_len; - if (direction == 0) - scsi_cdrom_command_read_dma(dev); - else - scsi_cdrom_command_write_dma(dev); - } else { - scsi_cdrom_update_request_length(dev, len, block_len); - if (direction == 0) - scsi_cdrom_command_read(dev); - else - scsi_cdrom_command_write(dev); - } + if (direction == 0) + scsi_cdrom_command_read_dma(dev); + else + scsi_cdrom_command_write_dma(dev); + } else { + scsi_cdrom_update_request_length(dev, len, block_len); + if (direction == 0) + scsi_cdrom_command_read(dev); + else + scsi_cdrom_command_write(dev); + } } scsi_cdrom_log("CD-ROM %i: Status: %i, cylinder %i, packet length: %i, position: %i, phase: %i\n", - dev->id, dev->packet_status, dev->request_length, dev->packet_len, dev->pos, dev->phase); + dev->id, dev->packet_status, dev->request_length, dev->packet_len, dev->pos, dev->phase); } - static void scsi_cdrom_sense_clear(scsi_cdrom_t *dev, int command) { scsi_cdrom_sense_key = scsi_cdrom_asc = scsi_cdrom_ascq = 0; } - static void scsi_cdrom_set_phase(scsi_cdrom_t *dev, uint8_t phase) { uint8_t scsi_bus = (dev->drv->scsi_device_id >> 4) & 0x0f; - uint8_t scsi_id = dev->drv->scsi_device_id & 0x0f; + uint8_t scsi_id = dev->drv->scsi_device_id & 0x0f; if (dev->drv->bus_type != CDROM_BUS_SCSI) - return; + return; scsi_devices[scsi_bus][scsi_id].phase = phase; } - static void scsi_cdrom_cmd_error(scsi_cdrom_t *dev) { scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); dev->error = ((scsi_cdrom_sense_key & 0xf) << 4) | ABRT_ERR; if (dev->unit_attention) - dev->error |= MCR_ERR; - dev->status = READY_STAT | ERR_STAT; - dev->phase = 3; - dev->pos = 0; + dev->error |= MCR_ERR; + dev->status = READY_STAT | ERR_STAT; + dev->phase = 3; + dev->pos = 0; dev->packet_status = PHASE_ERROR; - dev->callback = 50.0 * CDROM_TIME; + dev->callback = 50.0 * CDROM_TIME; scsi_cdrom_set_callback(dev); ui_sb_update_icon(SB_CDROM | dev->id, 0); scsi_cdrom_log("CD-ROM %i: ERROR: %02X/%02X/%02X\n", dev->id, scsi_cdrom_sense_key, scsi_cdrom_asc, scsi_cdrom_ascq); } - static void scsi_cdrom_unit_attention(scsi_cdrom_t *dev) { scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); dev->error = (SENSE_UNIT_ATTENTION << 4) | ABRT_ERR; if (dev->unit_attention) - dev->error |= MCR_ERR; - dev->status = READY_STAT | ERR_STAT; - dev->phase = 3; - dev->pos = 0; + dev->error |= MCR_ERR; + dev->status = READY_STAT | ERR_STAT; + dev->phase = 3; + dev->pos = 0; dev->packet_status = PHASE_ERROR; - dev->callback = 50.0 * CDROM_TIME; + dev->callback = 50.0 * CDROM_TIME; scsi_cdrom_set_callback(dev); ui_sb_update_icon(SB_CDROM | dev->id, 0); scsi_cdrom_log("CD-ROM %i: UNIT ATTENTION\n", dev->id); } - static void scsi_cdrom_buf_alloc(scsi_cdrom_t *dev, uint32_t len) { scsi_cdrom_log("CD-ROM %i: Allocated buffer length: %i\n", dev->id, len); if (!dev->buffer) - dev->buffer = (uint8_t *) malloc(len); + dev->buffer = (uint8_t *) malloc(len); } - static void scsi_cdrom_buf_free(scsi_cdrom_t *dev) { if (dev->buffer) { - scsi_cdrom_log("CD-ROM %i: Freeing buffer...\n", dev->id); - free(dev->buffer); - dev->buffer = NULL; + scsi_cdrom_log("CD-ROM %i: Freeing buffer...\n", dev->id); + free(dev->buffer); + dev->buffer = NULL; } } - static void scsi_cdrom_bus_master_error(scsi_common_t *sc) { @@ -876,123 +837,113 @@ scsi_cdrom_bus_master_error(scsi_common_t *sc) scsi_cdrom_cmd_error(dev); } - static void scsi_cdrom_not_ready(scsi_cdrom_t *dev) { scsi_cdrom_sense_key = SENSE_NOT_READY; - scsi_cdrom_asc = ASC_MEDIUM_NOT_PRESENT; - scsi_cdrom_ascq = 0; + scsi_cdrom_asc = ASC_MEDIUM_NOT_PRESENT; + scsi_cdrom_ascq = 0; scsi_cdrom_cmd_error(dev); } - static void scsi_cdrom_invalid_lun(scsi_cdrom_t *dev) { scsi_cdrom_sense_key = SENSE_ILLEGAL_REQUEST; - scsi_cdrom_asc = ASC_INV_LUN; - scsi_cdrom_ascq = 0; + scsi_cdrom_asc = ASC_INV_LUN; + scsi_cdrom_ascq = 0; scsi_cdrom_cmd_error(dev); } - static void scsi_cdrom_illegal_opcode(scsi_cdrom_t *dev) { scsi_cdrom_sense_key = SENSE_ILLEGAL_REQUEST; - scsi_cdrom_asc = ASC_ILLEGAL_OPCODE; - scsi_cdrom_ascq = 0; + scsi_cdrom_asc = ASC_ILLEGAL_OPCODE; + scsi_cdrom_ascq = 0; scsi_cdrom_cmd_error(dev); } - static void scsi_cdrom_lba_out_of_range(scsi_cdrom_t *dev) { scsi_cdrom_sense_key = SENSE_ILLEGAL_REQUEST; - scsi_cdrom_asc = ASC_LBA_OUT_OF_RANGE; - scsi_cdrom_ascq = 0; + scsi_cdrom_asc = ASC_LBA_OUT_OF_RANGE; + scsi_cdrom_ascq = 0; scsi_cdrom_cmd_error(dev); } - static void scsi_cdrom_invalid_field(scsi_cdrom_t *dev) { scsi_cdrom_sense_key = SENSE_ILLEGAL_REQUEST; - scsi_cdrom_asc = ASC_INV_FIELD_IN_CMD_PACKET; - scsi_cdrom_ascq = 0; + scsi_cdrom_asc = ASC_INV_FIELD_IN_CMD_PACKET; + scsi_cdrom_ascq = 0; scsi_cdrom_cmd_error(dev); dev->status = 0x53; } - static void scsi_cdrom_invalid_field_pl(scsi_cdrom_t *dev) { scsi_cdrom_sense_key = SENSE_ILLEGAL_REQUEST; - scsi_cdrom_asc = ASC_INV_FIELD_IN_PARAMETER_LIST; - scsi_cdrom_ascq = 0; + scsi_cdrom_asc = ASC_INV_FIELD_IN_PARAMETER_LIST; + scsi_cdrom_ascq = 0; scsi_cdrom_cmd_error(dev); dev->status = 0x53; } - static void scsi_cdrom_illegal_mode(scsi_cdrom_t *dev) { scsi_cdrom_sense_key = SENSE_ILLEGAL_REQUEST; - scsi_cdrom_asc = ASC_ILLEGAL_MODE_FOR_THIS_TRACK; - scsi_cdrom_ascq = 0; + scsi_cdrom_asc = ASC_ILLEGAL_MODE_FOR_THIS_TRACK; + scsi_cdrom_ascq = 0; scsi_cdrom_cmd_error(dev); } - static void scsi_cdrom_incompatible_format(scsi_cdrom_t *dev) { scsi_cdrom_sense_key = SENSE_ILLEGAL_REQUEST; - scsi_cdrom_asc = ASC_INCOMPATIBLE_FORMAT; - scsi_cdrom_ascq = 2; + scsi_cdrom_asc = ASC_INCOMPATIBLE_FORMAT; + scsi_cdrom_ascq = 2; scsi_cdrom_cmd_error(dev); } - static void scsi_cdrom_data_phase_error(scsi_cdrom_t *dev) { scsi_cdrom_sense_key = SENSE_ILLEGAL_REQUEST; - scsi_cdrom_asc = ASC_DATA_PHASE_ERROR; - scsi_cdrom_ascq = 0; + scsi_cdrom_asc = ASC_DATA_PHASE_ERROR; + scsi_cdrom_ascq = 0; scsi_cdrom_cmd_error(dev); } - static int scsi_cdrom_read_data(scsi_cdrom_t *dev, int msf, int type, int flags, int32_t *len) { - int ret = 0, data_pos = 0; - int i = 0, temp_len = 0; + int ret = 0, data_pos = 0; + int i = 0, temp_len = 0; uint32_t cdsize = 0; if (dev->drv->cd_status == CD_STATUS_EMPTY) { - scsi_cdrom_not_ready(dev); - return 0; + scsi_cdrom_not_ready(dev); + return 0; } cdsize = dev->drv->cdrom_capacity; if (dev->sector_pos >= cdsize) { - scsi_cdrom_log("CD-ROM %i: Trying to read from beyond the end of disc (%i >= %i)\n", dev->id, - dev->sector_pos, cdsize); - scsi_cdrom_lba_out_of_range(dev); - return -1; + scsi_cdrom_log("CD-ROM %i: Trying to read from beyond the end of disc (%i >= %i)\n", dev->id, + dev->sector_pos, cdsize); + scsi_cdrom_lba_out_of_range(dev); + return -1; } /* FIXME: Temporarily disabled this because the Triones ATAPI DMA driver seems to - always request a 4-sector read but sets the DMA bus master to transfer less - data than that. */ + always request a 4-sector read but sets the DMA bus master to transfer less + data than that. */ #if 0 if ((dev->sector_pos + dev->sector_len - 1) >= cdsize) { scsi_cdrom_log("CD-ROM %i: Trying to read to beyond the end of disc (%i >= %i)\n", dev->id, @@ -1003,27 +954,26 @@ scsi_cdrom_read_data(scsi_cdrom_t *dev, int msf, int type, int flags, int32_t *l #endif dev->old_len = 0; - *len = 0; + *len = 0; for (i = 0; i < dev->requested_blocks; i++) { - ret = cdrom_readsector_raw(dev->drv, dev->buffer + data_pos, - dev->sector_pos + i, msf, type, flags, &temp_len); + ret = cdrom_readsector_raw(dev->drv, dev->buffer + data_pos, + dev->sector_pos + i, msf, type, flags, &temp_len); - data_pos += temp_len; - dev->old_len += temp_len; + data_pos += temp_len; + dev->old_len += temp_len; - *len += temp_len; + *len += temp_len; - if (!ret) { - scsi_cdrom_illegal_mode(dev); - return 0; - } + if (!ret) { + scsi_cdrom_illegal_mode(dev); + return 0; + } } return 1; } - static int scsi_cdrom_read_blocks(scsi_cdrom_t *dev, int32_t *len, int first_batch) { @@ -1031,19 +981,19 @@ scsi_cdrom_read_blocks(scsi_cdrom_t *dev, int32_t *len, int first_batch) int type = 0, flags = 0; if (dev->current_cdb[0] == GPCMD_READ_CD_MSF) - msf = 1; + msf = 1; if ((dev->current_cdb[0] == GPCMD_READ_CD_MSF) || (dev->current_cdb[0] == GPCMD_READ_CD)) { - type = (dev->current_cdb[1] >> 2) & 7; - flags = dev->current_cdb[9] | (((uint32_t) dev->current_cdb[10]) << 8); + type = (dev->current_cdb[1] >> 2) & 7; + flags = dev->current_cdb[9] | (((uint32_t) dev->current_cdb[10]) << 8); } else { - type = 8; - flags = 0x10; + type = 8; + flags = 0x10; } if (!dev->sector_len) { - scsi_cdrom_command_complete(dev); - return -1; + scsi_cdrom_command_complete(dev); + return -1; } scsi_cdrom_log("Reading %i blocks starting from %i...\n", dev->requested_blocks, dev->sector_pos); @@ -1053,12 +1003,12 @@ scsi_cdrom_read_blocks(scsi_cdrom_t *dev, int32_t *len, int first_batch) scsi_cdrom_log("Read %i bytes of blocks...\n", *len); if (ret == -1) - return 0; + return 0; else if (!ret || ((dev->old_len != *len) && !first_batch)) { - if ((dev->old_len != *len) && !first_batch) - scsi_cdrom_illegal_mode(dev); + if ((dev->old_len != *len) && !first_batch) + scsi_cdrom_illegal_mode(dev); - return 0; + return 0; } dev->sector_pos += dev->requested_blocks; @@ -1067,131 +1017,129 @@ scsi_cdrom_read_blocks(scsi_cdrom_t *dev, int32_t *len, int first_batch) return 1; } - /*SCSI Read DVD Structure*/ static int scsi_cdrom_read_dvd_structure(scsi_cdrom_t *dev, int format, const uint8_t *packet, uint8_t *buf) { - int layer = packet[6]; + int layer = packet[6]; uint64_t total_sectors = 0; switch (format) { - case 0x00: /* Physical format information */ - if (dev->drv->cd_status == CD_STATUS_EMPTY) { - scsi_cdrom_not_ready(dev); - return 0; - } + case 0x00: /* Physical format information */ + if (dev->drv->cd_status == CD_STATUS_EMPTY) { + scsi_cdrom_not_ready(dev); + return 0; + } - total_sectors = (uint64_t) dev->drv->cdrom_capacity; + total_sectors = (uint64_t) dev->drv->cdrom_capacity; - if (layer != 0) { - scsi_cdrom_invalid_field(dev); - return 0; - } + if (layer != 0) { + scsi_cdrom_invalid_field(dev); + return 0; + } - total_sectors >>= 2; - if (total_sectors == 0) { - /* return -ASC_MEDIUM_NOT_PRESENT; */ - scsi_cdrom_not_ready(dev); - return 0; - } + total_sectors >>= 2; + if (total_sectors == 0) { + /* return -ASC_MEDIUM_NOT_PRESENT; */ + scsi_cdrom_not_ready(dev); + return 0; + } - buf[4] = 18; /* Length of Layer Information */ - buf[5] = 0; + buf[4] = 18; /* Length of Layer Information */ + buf[5] = 0; - buf[6] = 1; /* DVD-ROM, part version 1 */ - buf[7] = 0xf; /* 120mm disc, minimum rate unspecified */ - buf[8] = 1; /* one layer, read-only (per MMC-2 spec) */ - buf[9] = 0; /* default densities */ + buf[6] = 1; /* DVD-ROM, part version 1 */ + buf[7] = 0xf; /* 120mm disc, minimum rate unspecified */ + buf[8] = 1; /* one layer, read-only (per MMC-2 spec) */ + buf[9] = 0; /* default densities */ - /* FIXME: 0x30000 per spec? */ - buf[10] = 0x00; - buf[11] = 0x03; - buf[12] = buf[13] = 0; /* start sector */ + /* FIXME: 0x30000 per spec? */ + buf[10] = 0x00; + buf[11] = 0x03; + buf[12] = buf[13] = 0; /* start sector */ - buf[14] = 0x00; - buf[15] = (total_sectors >> 16) & 0xff; /* end sector */ - buf[16] = (total_sectors >> 8) & 0xff; - buf[17] = total_sectors & 0xff; + buf[14] = 0x00; + buf[15] = (total_sectors >> 16) & 0xff; /* end sector */ + buf[16] = (total_sectors >> 8) & 0xff; + buf[17] = total_sectors & 0xff; - buf[18] = 0x00; - buf[19] = (total_sectors >> 16) & 0xff; /* l0 end sector */ - buf[20] = (total_sectors >> 8) & 0xff; - buf[21] = total_sectors & 0xff; + buf[18] = 0x00; + buf[19] = (total_sectors >> 16) & 0xff; /* l0 end sector */ + buf[20] = (total_sectors >> 8) & 0xff; + buf[21] = total_sectors & 0xff; - /* 20 bytes of data + 4 byte header */ - return (20 + 4); + /* 20 bytes of data + 4 byte header */ + return (20 + 4); - case 0x01: /* DVD copyright information */ - buf[4] = 0; /* no copyright data */ - buf[5] = 0; /* no region restrictions */ + case 0x01: /* DVD copyright information */ + buf[4] = 0; /* no copyright data */ + buf[5] = 0; /* no region restrictions */ - /* Size of buffer, not including 2 byte size field */ - buf[0] = ((4 + 2) >> 8) & 0xff; - buf[1] = (4 + 2) & 0xff; + /* Size of buffer, not including 2 byte size field */ + buf[0] = ((4 + 2) >> 8) & 0xff; + buf[1] = (4 + 2) & 0xff; - /* 4 byte header + 4 byte data */ - return (4 + 4); + /* 4 byte header + 4 byte data */ + return (4 + 4); - case 0x03: /* BCA information - invalid field for no BCA info */ - scsi_cdrom_invalid_field(dev); - return 0; + case 0x03: /* BCA information - invalid field for no BCA info */ + scsi_cdrom_invalid_field(dev); + return 0; - case 0x04: /* DVD disc manufacturing information */ - /* Size of buffer, not including 2 byte size field */ - buf[0] = ((2048 + 2) >> 8) & 0xff; - buf[1] = (2048 + 2) & 0xff; + case 0x04: /* DVD disc manufacturing information */ + /* Size of buffer, not including 2 byte size field */ + buf[0] = ((2048 + 2) >> 8) & 0xff; + buf[1] = (2048 + 2) & 0xff; - /* 2k data + 4 byte header */ - return (2048 + 4); + /* 2k data + 4 byte header */ + return (2048 + 4); - case 0xff: - /* - * This lists all the command capabilities above. Add new ones - * in order and update the length and buffer return values. - */ + case 0xff: + /* + * This lists all the command capabilities above. Add new ones + * in order and update the length and buffer return values. + */ - buf[4] = 0x00; /* Physical format */ - buf[5] = 0x40; /* Not writable, is readable */ - buf[6] = ((20 + 4) >> 8) & 0xff; - buf[7] = (20 + 4) & 0xff; + buf[4] = 0x00; /* Physical format */ + buf[5] = 0x40; /* Not writable, is readable */ + buf[6] = ((20 + 4) >> 8) & 0xff; + buf[7] = (20 + 4) & 0xff; - buf[8] = 0x01; /* Copyright info */ - buf[9] = 0x40; /* Not writable, is readable */ - buf[10] = ((4 + 4) >> 8) & 0xff; - buf[11] = (4 + 4) & 0xff; + buf[8] = 0x01; /* Copyright info */ + buf[9] = 0x40; /* Not writable, is readable */ + buf[10] = ((4 + 4) >> 8) & 0xff; + buf[11] = (4 + 4) & 0xff; - buf[12] = 0x03; /* BCA info */ - buf[13] = 0x40; /* Not writable, is readable */ - buf[14] = ((188 + 4) >> 8) & 0xff; - buf[15] = (188 + 4) & 0xff; + buf[12] = 0x03; /* BCA info */ + buf[13] = 0x40; /* Not writable, is readable */ + buf[14] = ((188 + 4) >> 8) & 0xff; + buf[15] = (188 + 4) & 0xff; - buf[16] = 0x04; /* Manufacturing info */ - buf[17] = 0x40; /* Not writable, is readable */ - buf[18] = ((2048 + 4) >> 8) & 0xff; - buf[19] = (2048 + 4) & 0xff; + buf[16] = 0x04; /* Manufacturing info */ + buf[17] = 0x40; /* Not writable, is readable */ + buf[18] = ((2048 + 4) >> 8) & 0xff; + buf[19] = (2048 + 4) & 0xff; - /* Size of buffer, not including 2 byte size field */ - buf[6] = ((16 + 2) >> 8) & 0xff; - buf[7] = (16 + 2) & 0xff; + /* Size of buffer, not including 2 byte size field */ + buf[6] = ((16 + 2) >> 8) & 0xff; + buf[7] = (16 + 2) & 0xff; - /* data written + 4 byte header */ - return (16 + 4); + /* data written + 4 byte header */ + return (16 + 4); - default: /* TODO: formats beyond DVD-ROM requires */ - scsi_cdrom_invalid_field(dev); - return 0; + default: /* TODO: formats beyond DVD-ROM requires */ + scsi_cdrom_invalid_field(dev); + return 0; } } - static void scsi_cdrom_insert(void *p) { scsi_cdrom_t *dev = (scsi_cdrom_t *) p; if (!dev) - return; + return; dev->unit_attention = 1; /* Turn off the medium changed status. */ @@ -1199,48 +1147,47 @@ scsi_cdrom_insert(void *p) scsi_cdrom_log("CD-ROM %i: Media insert\n", dev->id); } - static int scsi_cdrom_pre_execution_check(scsi_cdrom_t *dev, uint8_t *cdb) { int ready = 0; if (dev->drv->bus_type == CDROM_BUS_SCSI) { - if ((cdb[0] != GPCMD_REQUEST_SENSE) && (dev->cur_lun == SCSI_LUN_USE_CDB) && (cdb[1] & 0xe0)) { - scsi_cdrom_log("CD-ROM %i: Attempting to execute a unknown command targeted at SCSI LUN %i\n", - dev->id, ((dev->request_length >> 5) & 7)); - scsi_cdrom_invalid_lun(dev); - return 0; - } + if ((cdb[0] != GPCMD_REQUEST_SENSE) && (dev->cur_lun == SCSI_LUN_USE_CDB) && (cdb[1] & 0xe0)) { + scsi_cdrom_log("CD-ROM %i: Attempting to execute a unknown command targeted at SCSI LUN %i\n", + dev->id, ((dev->request_length >> 5) & 7)); + scsi_cdrom_invalid_lun(dev); + return 0; + } } if (!(scsi_cdrom_command_flags[cdb[0]] & IMPLEMENTED)) { - scsi_cdrom_log("CD-ROM %i: Attempting to execute unknown command %02X over %s\n", dev->id, cdb[0], - (dev->drv->bus_type == CDROM_BUS_SCSI) ? "SCSI" : "ATAPI"); + scsi_cdrom_log("CD-ROM %i: Attempting to execute unknown command %02X over %s\n", dev->id, cdb[0], + (dev->drv->bus_type == CDROM_BUS_SCSI) ? "SCSI" : "ATAPI"); - scsi_cdrom_illegal_opcode(dev); - return 0; + scsi_cdrom_illegal_opcode(dev); + return 0; } if ((dev->drv->bus_type < CDROM_BUS_SCSI) && (scsi_cdrom_command_flags[cdb[0]] & SCSI_ONLY)) { - scsi_cdrom_log("CD-ROM %i: Attempting to execute SCSI-only command %02X over ATAPI\n", dev->id, cdb[0]); - scsi_cdrom_illegal_opcode(dev); - return 0; + scsi_cdrom_log("CD-ROM %i: Attempting to execute SCSI-only command %02X over ATAPI\n", dev->id, cdb[0]); + scsi_cdrom_illegal_opcode(dev); + return 0; } if ((dev->drv->bus_type == CDROM_BUS_SCSI) && (scsi_cdrom_command_flags[cdb[0]] & ATAPI_ONLY)) { - scsi_cdrom_log("CD-ROM %i: Attempting to execute ATAPI-only command %02X over SCSI\n", dev->id, cdb[0]); - scsi_cdrom_illegal_opcode(dev); - return 0; + scsi_cdrom_log("CD-ROM %i: Attempting to execute ATAPI-only command %02X over SCSI\n", dev->id, cdb[0]); + scsi_cdrom_illegal_opcode(dev); + return 0; } if ((dev->drv->cd_status == CD_STATUS_PLAYING) || (dev->drv->cd_status == CD_STATUS_PAUSED)) { - ready = 1; - goto skip_ready_check; + ready = 1; + goto skip_ready_check; } if (dev->drv->cd_status & CD_STATUS_MEDIUM_CHANGED) - scsi_cdrom_insert((void *) dev); + scsi_cdrom_insert((void *) dev); ready = (dev->drv->cd_status != CD_STATUS_EMPTY); @@ -1249,42 +1196,42 @@ skip_ready_check: UNIT ATTENTION condition present, as we only use it to mark disc changes. */ if (!ready && dev->unit_attention) - dev->unit_attention = 0; + dev->unit_attention = 0; /* If the UNIT ATTENTION condition is set and the command does not allow execution under it, error out and report the condition. */ if (dev->unit_attention == 1) { - /* Only increment the unit attention phase if the command can not pass through it. */ - if (!(scsi_cdrom_command_flags[cdb[0]] & ALLOW_UA)) { - /* scsi_cdrom_log("CD-ROM %i: Unit attention now 2\n", dev->id); */ - dev->unit_attention++; - scsi_cdrom_log("CD-ROM %i: UNIT ATTENTION: Command %02X not allowed to pass through\n", - dev->id, cdb[0]); - scsi_cdrom_unit_attention(dev); - return 0; - } + /* Only increment the unit attention phase if the command can not pass through it. */ + if (!(scsi_cdrom_command_flags[cdb[0]] & ALLOW_UA)) { + /* scsi_cdrom_log("CD-ROM %i: Unit attention now 2\n", dev->id); */ + dev->unit_attention++; + scsi_cdrom_log("CD-ROM %i: UNIT ATTENTION: Command %02X not allowed to pass through\n", + dev->id, cdb[0]); + scsi_cdrom_unit_attention(dev); + return 0; + } } else if (dev->unit_attention == 2) { - if (cdb[0] != GPCMD_REQUEST_SENSE) { - /* scsi_cdrom_log("CD-ROM %i: Unit attention now 0\n", dev->id); */ - dev->unit_attention = 0; - } + if (cdb[0] != GPCMD_REQUEST_SENSE) { + /* scsi_cdrom_log("CD-ROM %i: Unit attention now 0\n", dev->id); */ + dev->unit_attention = 0; + } } /* Unless the command is REQUEST SENSE, clear the sense. This will *NOT* the UNIT ATTENTION condition if it's set. */ if (cdb[0] != GPCMD_REQUEST_SENSE) - scsi_cdrom_sense_clear(dev, cdb[0]); + scsi_cdrom_sense_clear(dev, cdb[0]); /* Next it's time for NOT READY. */ if (!ready) - dev->media_status = MEC_MEDIA_REMOVAL; + dev->media_status = MEC_MEDIA_REMOVAL; else - dev->media_status = (dev->unit_attention) ? MEC_NEW_MEDIA : MEC_NO_CHANGE; + dev->media_status = (dev->unit_attention) ? MEC_NEW_MEDIA : MEC_NO_CHANGE; if ((scsi_cdrom_command_flags[cdb[0]] & CHECK_READY) && !ready) { - scsi_cdrom_log("CD-ROM %i: Not ready (%02X)\n", dev->id, cdb[0]); - scsi_cdrom_not_ready(dev); - return 0; + scsi_cdrom_log("CD-ROM %i: Not ready (%02X)\n", dev->id, cdb[0]); + scsi_cdrom_not_ready(dev); + return 0; } scsi_cdrom_log("CD-ROM %i: Continuing with command %02X\n", dev->id, cdb[0]); @@ -1292,7 +1239,6 @@ skip_ready_check: return 1; } - static void scsi_cdrom_rezero(scsi_cdrom_t *dev) { @@ -1300,101 +1246,95 @@ scsi_cdrom_rezero(scsi_cdrom_t *dev) cdrom_seek(dev->drv, 0); } - void scsi_cdrom_reset(scsi_common_t *sc) { scsi_cdrom_t *dev = (scsi_cdrom_t *) sc; if (!dev) - return; + return; scsi_cdrom_rezero(dev); - dev->status = 0; + dev->status = 0; dev->callback = 0.0; scsi_cdrom_set_callback(dev); - dev->phase = 1; + dev->phase = 1; dev->request_length = 0xEB14; - dev->packet_status = PHASE_NONE; + dev->packet_status = PHASE_NONE; dev->unit_attention = 0xff; - dev->cur_lun = SCSI_LUN_USE_CDB; + dev->cur_lun = SCSI_LUN_USE_CDB; } - static void scsi_cdrom_request_sense(scsi_cdrom_t *dev, uint8_t *buffer, uint8_t alloc_length) { /*Will return 18 bytes of 0*/ if (alloc_length != 0) { - memset(buffer, 0, alloc_length); - memcpy(buffer, dev->sense, alloc_length); + memset(buffer, 0, alloc_length); + memcpy(buffer, dev->sense, alloc_length); } buffer[0] = 0x70; if ((scsi_cdrom_sense_key > 0) && (dev->drv->cd_status == CD_STATUS_PLAYING_COMPLETED)) { - buffer[2]=SENSE_ILLEGAL_REQUEST; - buffer[12]=ASC_AUDIO_PLAY_OPERATION; - buffer[13]=ASCQ_AUDIO_PLAY_OPERATION_COMPLETED; - } else if ((scsi_cdrom_sense_key == 0) && ((dev->drv->cd_status == CD_STATUS_PAUSED) || - ((dev->drv->cd_status >= CD_STATUS_PLAYING) && (dev->drv->cd_status != CD_STATUS_STOPPED)))) { - buffer[2]=SENSE_ILLEGAL_REQUEST; - buffer[12]=ASC_AUDIO_PLAY_OPERATION; - buffer[13]=(dev->drv->cd_status == CD_STATUS_PLAYING) ? ASCQ_AUDIO_PLAY_OPERATION_IN_PROGRESS : ASCQ_AUDIO_PLAY_OPERATION_PAUSED; + buffer[2] = SENSE_ILLEGAL_REQUEST; + buffer[12] = ASC_AUDIO_PLAY_OPERATION; + buffer[13] = ASCQ_AUDIO_PLAY_OPERATION_COMPLETED; + } else if ((scsi_cdrom_sense_key == 0) && ((dev->drv->cd_status == CD_STATUS_PAUSED) || ((dev->drv->cd_status >= CD_STATUS_PLAYING) && (dev->drv->cd_status != CD_STATUS_STOPPED)))) { + buffer[2] = SENSE_ILLEGAL_REQUEST; + buffer[12] = ASC_AUDIO_PLAY_OPERATION; + buffer[13] = (dev->drv->cd_status == CD_STATUS_PLAYING) ? ASCQ_AUDIO_PLAY_OPERATION_IN_PROGRESS : ASCQ_AUDIO_PLAY_OPERATION_PAUSED; } else if (dev->unit_attention && (scsi_cdrom_sense_key == 0)) { - buffer[2]=SENSE_UNIT_ATTENTION; - buffer[12]=ASC_MEDIUM_MAY_HAVE_CHANGED; - buffer[13]=0; + buffer[2] = SENSE_UNIT_ATTENTION; + buffer[12] = ASC_MEDIUM_MAY_HAVE_CHANGED; + buffer[13] = 0; } scsi_cdrom_log("CD-ROM %i: Reporting sense: %02X %02X %02X\n", dev->id, buffer[2], buffer[12], buffer[13]); if (buffer[2] == SENSE_UNIT_ATTENTION) { - /* If the last remaining sense is unit attention, clear - that condition. */ - dev->unit_attention = 0; + /* If the last remaining sense is unit attention, clear + that condition. */ + dev->unit_attention = 0; } /* Clear the sense stuff as per the spec. */ scsi_cdrom_sense_clear(dev, GPCMD_REQUEST_SENSE); } - void scsi_cdrom_request_sense_for_scsi(scsi_common_t *sc, uint8_t *buffer, uint8_t alloc_length) { scsi_cdrom_t *dev = (scsi_cdrom_t *) sc; if (dev->drv->cd_status & CD_STATUS_MEDIUM_CHANGED) - scsi_cdrom_insert((void *) dev); + scsi_cdrom_insert((void *) dev); if ((dev->drv->cd_status == CD_STATUS_EMPTY) && dev->unit_attention) { - /* If the drive is not ready, there is no reason to keep the - UNIT ATTENTION condition present, as we only use it to mark - disc changes. */ - dev->unit_attention = 0; + /* If the drive is not ready, there is no reason to keep the + UNIT ATTENTION condition present, as we only use it to mark + disc changes. */ + dev->unit_attention = 0; } /* Do *NOT* advance the unit attention phase. */ scsi_cdrom_request_sense(dev, buffer, alloc_length); } - static void scsi_cdrom_set_buf_len(scsi_cdrom_t *dev, int32_t *BufLen, int32_t *src_len) { if (dev->drv->bus_type == CDROM_BUS_SCSI) { - if (*BufLen == -1) - *BufLen = *src_len; - else { - *BufLen = MIN(*src_len, *BufLen); - *src_len = *BufLen; - } - scsi_cdrom_log("CD-ROM %i: Actual transfer length: %i\n", dev->id, *BufLen); + if (*BufLen == -1) + *BufLen = *src_len; + else { + *BufLen = MIN(*src_len, *BufLen); + *src_len = *BufLen; + } + scsi_cdrom_log("CD-ROM %i: Actual transfer length: %i\n", dev->id, *BufLen); } } - static void scsi_cdrom_stop(scsi_common_t *sc) { @@ -1403,40 +1343,39 @@ scsi_cdrom_stop(scsi_common_t *sc) cdrom_stop(dev->drv); } - void scsi_cdrom_command(scsi_common_t *sc, uint8_t *cdb) { scsi_cdrom_t *dev = (scsi_cdrom_t *) sc; - int len, max_len, used_len, alloc_length, msf; - int pos = 0, i= 0, size_idx, idx = 0; - uint32_t feature; - unsigned preamble_len; - int toc_format, block_desc = 0; - int ret, format = 0; - int real_pos, track = 0; - char device_identify[9] = { '8', '6', 'B', '_', 'C', 'D', '0', '0', 0 }; - char device_identify_ex[15] = { '8', '6', 'B', '_', 'C', 'D', '0', '0', ' ', 'v', '1', '.', '0', '0', 0 }; - int32_t blen = 0, *BufLen; - uint8_t *b; - uint32_t profiles[2] = { MMC_PROFILE_CD_ROM, MMC_PROFILE_DVD_ROM }; - uint8_t scsi_bus = (dev->drv->scsi_device_id >> 4) & 0x0f; - uint8_t scsi_id = dev->drv->scsi_device_id & 0x0f; + int len, max_len, used_len, alloc_length, msf; + int pos = 0, i = 0, size_idx, idx = 0; + uint32_t feature; + unsigned preamble_len; + int toc_format, block_desc = 0; + int ret, format = 0; + int real_pos, track = 0; + char device_identify[9] = { '8', '6', 'B', '_', 'C', 'D', '0', '0', 0 }; + char device_identify_ex[15] = { '8', '6', 'B', '_', 'C', 'D', '0', '0', ' ', 'v', '1', '.', '0', '0', 0 }; + int32_t blen = 0, *BufLen; + uint8_t *b; + uint32_t profiles[2] = { MMC_PROFILE_CD_ROM, MMC_PROFILE_DVD_ROM }; + uint8_t scsi_bus = (dev->drv->scsi_device_id >> 4) & 0x0f; + uint8_t scsi_id = dev->drv->scsi_device_id & 0x0f; if (dev->drv->bus_type == CDROM_BUS_SCSI) { - BufLen = &scsi_devices[scsi_bus][scsi_id].buffer_length; - dev->status &= ~ERR_STAT; + BufLen = &scsi_devices[scsi_bus][scsi_id].buffer_length; + dev->status &= ~ERR_STAT; } else { - BufLen = &blen; - dev->error = 0; + BufLen = &blen; + dev->error = 0; } - dev->packet_len = 0; + dev->packet_len = 0; dev->request_pos = 0; device_identify[7] = dev->id + 0x30; - device_identify_ex[7] = dev->id + 0x30; + device_identify_ex[7] = dev->id + 0x30; device_identify_ex[10] = EMU_VERSION_EX[0]; device_identify_ex[12] = EMU_VERSION_EX[2]; device_identify_ex[13] = EMU_VERSION_EX[3]; @@ -1444,1071 +1383,1071 @@ scsi_cdrom_command(scsi_common_t *sc, uint8_t *cdb) memcpy(dev->current_cdb, cdb, 12); if (cdb[0] != 0) { - scsi_cdrom_log("CD-ROM %i: Command 0x%02X, Sense Key %02X, Asc %02X, Ascq %02X, Unit attention: %i\n", - dev->id, cdb[0], scsi_cdrom_sense_key, scsi_cdrom_asc, scsi_cdrom_ascq, dev->unit_attention); - scsi_cdrom_log("CD-ROM %i: Request length: %04X\n", dev->id, dev->request_length); + scsi_cdrom_log("CD-ROM %i: Command 0x%02X, Sense Key %02X, Asc %02X, Ascq %02X, Unit attention: %i\n", + dev->id, cdb[0], scsi_cdrom_sense_key, scsi_cdrom_asc, scsi_cdrom_ascq, dev->unit_attention); + scsi_cdrom_log("CD-ROM %i: Request length: %04X\n", dev->id, dev->request_length); - scsi_cdrom_log("CD-ROM %i: CDB: %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", dev->id, - cdb[0], cdb[1], cdb[2], cdb[3], cdb[4], cdb[5], cdb[6], cdb[7], - cdb[8], cdb[9], cdb[10], cdb[11]); + scsi_cdrom_log("CD-ROM %i: CDB: %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", dev->id, + cdb[0], cdb[1], cdb[2], cdb[3], cdb[4], cdb[5], cdb[6], cdb[7], + cdb[8], cdb[9], cdb[10], cdb[11]); } - msf = cdb[1] & 2; + msf = cdb[1] & 2; dev->sector_len = 0; scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); /* This handles the Not Ready/Unit Attention check if it has to be handled at this point. */ if (scsi_cdrom_pre_execution_check(dev, cdb) == 0) - return; + return; switch (cdb[0]) { - case GPCMD_TEST_UNIT_READY: - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - scsi_cdrom_command_complete(dev); - break; - - case GPCMD_REZERO_UNIT: - scsi_cdrom_stop(sc); - dev->sector_pos = dev->sector_len = 0; - dev->drv->seek_diff = dev->drv->seek_pos; - cdrom_seek(dev->drv, 0); - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - break; - - case GPCMD_REQUEST_SENSE: - /* If there's a unit attention condition and there's a buffered not ready, a standalone REQUEST SENSE - should forget about the not ready, and report unit attention straight away. */ - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - max_len = cdb[4]; - - if (!max_len) { - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * CDROM_TIME; - scsi_cdrom_set_callback(dev); - break; - } - - scsi_cdrom_buf_alloc(dev, 256); - scsi_cdrom_set_buf_len(dev, BufLen, &max_len); - scsi_cdrom_request_sense(dev, dev->buffer, max_len); - scsi_cdrom_data_command_finish(dev, 18, 18, cdb[4], 0); - break; - - case GPCMD_SET_SPEED: - case GPCMD_SET_SPEED_ALT: - dev->drv->cur_speed = (cdb[3] | (cdb[2] << 8)) / 176; - if (dev->drv->cur_speed < 1) - dev->drv->cur_speed = 1; - else if (dev->drv->cur_speed > dev->drv->speed) - dev->drv->cur_speed = dev->drv->speed; - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - scsi_cdrom_command_complete(dev); - break; - - case GPCMD_MECHANISM_STATUS: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - len = (cdb[7] << 16) | (cdb[8] << 8) | cdb[9]; - - scsi_cdrom_buf_alloc(dev, 8); - - scsi_cdrom_set_buf_len(dev, BufLen, &len); - - memset(dev->buffer, 0, 8); - dev->buffer[5] = 1; - - scsi_cdrom_data_command_finish(dev, 8, 8, len, 0); - break; - - case GPCMD_READ_TOC_PMA_ATIP: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - - max_len = cdb[7]; - max_len <<= 8; - max_len |= cdb[8]; - - scsi_cdrom_buf_alloc(dev, 65536); - - toc_format = cdb[2] & 0xf; - - if (toc_format == 0) - toc_format = (cdb[9] >> 6) & 3; - - if (!dev->drv->ops) { - scsi_cdrom_not_ready(dev); - return; - } - - if (toc_format < 3) { - len = cdrom_read_toc(dev->drv, dev->buffer, toc_format, cdb[6], msf, max_len); - if (len == -1) { - /* If the returned length is -1, this means cdrom_read_toc() has encountered an error. */ - scsi_cdrom_invalid_field(dev); - scsi_cdrom_buf_free(dev); - return; - } - } else { - scsi_cdrom_invalid_field(dev); - scsi_cdrom_buf_free(dev); - return; - } - - scsi_cdrom_set_buf_len(dev, BufLen, &len); - - scsi_cdrom_data_command_finish(dev, len, len, len, 0); - /* scsi_cdrom_log("CD-ROM %i: READ_TOC_PMA_ATIP format %02X, length %i (%i)\n", dev->id, - toc_format, ide->cylinder, dev->buffer[1]); */ - return; - - case GPCMD_READ_DISC_INFORMATION_TOSHIBA: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - - scsi_cdrom_buf_alloc(dev, 65536); - - if ((!dev->drv->ops) && ((cdb[1] & 3) == 2)) { - scsi_cdrom_not_ready(dev); - return; - } - - memset(dev->buffer, 0, 4); - - cdrom_read_disc_info_toc(dev->drv, dev->buffer, cdb[2], cdb[1] & 3); - - len = 4; - scsi_cdrom_set_buf_len(dev, BufLen, &len); - - scsi_cdrom_data_command_finish(dev, len, len, len, 0); - return; - - case GPCMD_READ_CD_OLD: - /* IMPORTANT: Convert the command to new read CD - for pass through purposes. */ - dev->current_cdb[0] = 0xbe; - /*FALLTHROUGH*/ - - case GPCMD_READ_6: - case GPCMD_READ_10: - case GPCMD_READ_12: - case GPCMD_READ_CD: - case GPCMD_READ_CD_MSF: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - alloc_length = 2048; - - switch(cdb[0]) { - case GPCMD_READ_6: - dev->sector_len = cdb[4]; - if (dev->sector_len == 0) - dev->sector_len = 256; /* For READ (6) and WRITE (6), a length of 0 indicates a transfer of 256 sector. */ - dev->sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]); - msf = 0; - break; - case GPCMD_READ_10: - dev->sector_len = (cdb[7] << 8) | cdb[8]; - dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - scsi_cdrom_log("CD-ROM %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, - dev->sector_pos); - msf = 0; - break; - case GPCMD_READ_12: - dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); - dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); - scsi_cdrom_log("CD-ROM %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, - dev->sector_pos); - msf = 0; - break; - case GPCMD_READ_CD_MSF: - alloc_length = 2856; - dev->sector_len = MSFtoLBA(cdb[6], cdb[7], cdb[8]); - dev->sector_pos = MSFtoLBA(cdb[3], cdb[4], cdb[5]); - - dev->sector_len -= dev->sector_pos; - dev->sector_len++; - - msf = 1; - - if ((cdb[9] & 0xf8) == 0x08) { - /* 0x08 is an illegal mode */ - scsi_cdrom_invalid_field(dev); - return; - } - - /* If all the flag bits are cleared, then treat it as a non-data command. */ - if ((cdb[9] == 0x00) && ((cdb[10] & 0x07) == 0x00)) - dev->sector_len = 0; - else if ((cdb[9] == 0x00) && ((cdb[10] & 0x07) != 0x00)) { - scsi_cdrom_invalid_field(dev); - return; - } - break; - case GPCMD_READ_CD_OLD: - case GPCMD_READ_CD: - alloc_length = 2856; - dev->sector_len = (cdb[6] << 16) | (cdb[7] << 8) | cdb[8]; - dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - - msf = 0; - - if ((cdb[9] & 0xf8) == 0x08) { - /* 0x08 is an illegal mode */ - scsi_cdrom_invalid_field(dev); - return; - } - - /* If all the flag bits are cleared, then treat it as a non-data command. */ - if ((cdb[9] == 0x00) && ((cdb[10] & 0x07) == 0x00)) - dev->sector_len = 0; - else if ((cdb[9] == 0x00) && ((cdb[10] & 0x07) != 0x00)) { - scsi_cdrom_invalid_field(dev); - return; - } - break; - } - - if (!dev->sector_len) { - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - /* scsi_cdrom_log("CD-ROM %i: All done - callback set\n", dev->id); */ - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * CDROM_TIME; - scsi_cdrom_set_callback(dev); - break; - } - - max_len = dev->sector_len; - dev->requested_blocks = max_len; /* If we're reading all blocks in one go for DMA, why not also for PIO, it should NOT - matter anyway, this step should be identical and only the way the read dat is - transferred to the host should be different. */ - - dev->packet_len = max_len * alloc_length; - scsi_cdrom_buf_alloc(dev, dev->packet_len); - - dev->drv->seek_diff = ABS((int) (pos - dev->sector_pos)); - - ret = scsi_cdrom_read_blocks(dev, &alloc_length, 1); - if (ret <= 0) { - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * CDROM_TIME; - scsi_cdrom_set_callback(dev); - scsi_cdrom_buf_free(dev); - return; - } - - dev->requested_blocks = max_len; - dev->packet_len = alloc_length; - - scsi_cdrom_set_buf_len(dev, BufLen, (int32_t *) &dev->packet_len); - - scsi_cdrom_data_command_finish(dev, alloc_length, alloc_length / dev->requested_blocks, - alloc_length, 0); - - if (dev->packet_status != PHASE_COMPLETE) - ui_sb_update_icon(SB_CDROM | dev->id, 1); - else - ui_sb_update_icon(SB_CDROM | dev->id, 0); - return; - - case GPCMD_READ_HEADER: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - - alloc_length = ((cdb[7] << 8) | cdb[8]); - scsi_cdrom_buf_alloc(dev, 8); - - dev->sector_len = 1; - dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4]<<8) | cdb[5]; - if (msf) - real_pos = cdrom_lba_to_msf_accurate(dev->sector_pos); - else - real_pos = dev->sector_pos; - dev->buffer[0] = 1; /*2048 bytes user data*/ - dev->buffer[1] = dev->buffer[2] = dev->buffer[3] = 0; - dev->buffer[4] = (real_pos >> 24); - dev->buffer[5] = ((real_pos >> 16) & 0xff); - dev->buffer[6] = ((real_pos >> 8) & 0xff); - dev->buffer[7] = real_pos & 0xff; - - len = 8; - len = MIN(len, alloc_length); - - scsi_cdrom_set_buf_len(dev, BufLen, &len); - - scsi_cdrom_data_command_finish(dev, len, len, len, 0); - return; - - case GPCMD_MODE_SENSE_6: - case GPCMD_MODE_SENSE_10: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - - if (dev->drv->bus_type == CDROM_BUS_SCSI) - block_desc = ((cdb[1] >> 3) & 1) ? 0 : 1; - else - block_desc = 0; - - if (cdb[0] == GPCMD_MODE_SENSE_6) { - len = cdb[4]; - scsi_cdrom_buf_alloc(dev, 256); - } else { - len = (cdb[8] | (cdb[7] << 8)); - scsi_cdrom_buf_alloc(dev, 65536); - } - - if (!(scsi_cdrom_mode_sense_page_flags & (1LL << (uint64_t) (cdb[2] & 0x3f)))) { - scsi_cdrom_invalid_field(dev); - scsi_cdrom_buf_free(dev); - return; - } - - memset(dev->buffer, 0, len); - alloc_length = len; - - /* This determines the media type ID to return - this is - a SCSI/ATAPI-specific thing, so it makes the most sense - to keep this here. - Also, the max_len variable is reused as this command - does otherwise not use it, to avoid having to declare - another variable. */ - if (dev->drv->cd_status == CD_STATUS_EMPTY) - max_len = 70; /* No media inserted. */ - else if (dev->drv->cdrom_capacity > 405000) - max_len = 65; /* DVD. */ - else if (dev->drv->cd_status == CD_STATUS_DATA_ONLY) - max_len = 1; /* Data CD. */ - else - max_len = 3; /* Audio or mixed-mode CD. */ - - if (cdb[0] == GPCMD_MODE_SENSE_6) { - len = scsi_cdrom_mode_sense(dev, dev->buffer, 4, cdb[2], block_desc); - len = MIN(len, alloc_length); - dev->buffer[0] = len - 1; - dev->buffer[1] = max_len; - if (block_desc) - dev->buffer[3] = 8; - } else { - len = scsi_cdrom_mode_sense(dev, dev->buffer, 8, cdb[2], block_desc); - len = MIN(len, alloc_length); - dev->buffer[0] = (len - 2) >> 8; - dev->buffer[1] = (len - 2) & 255; - dev->buffer[2] = max_len; - if (block_desc) { - dev->buffer[6] = 0; - dev->buffer[7] = 8; - } - } - - scsi_cdrom_set_buf_len(dev, BufLen, &len); - - scsi_cdrom_log("CD-ROM %i: Reading mode page: %02X...\n", dev->id, cdb[2]); - - scsi_cdrom_data_command_finish(dev, len, len, alloc_length, 0); - return; - - case GPCMD_MODE_SELECT_6: - case GPCMD_MODE_SELECT_10: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_OUT); - - if (cdb[0] == GPCMD_MODE_SELECT_6) { - len = cdb[4]; - scsi_cdrom_buf_alloc(dev, 256); - } else { - len = (cdb[7] << 8) | cdb[8]; - scsi_cdrom_buf_alloc(dev, 65536); - } - - scsi_cdrom_set_buf_len(dev, BufLen, &len); - - dev->total_length = len; - dev->do_page_save = cdb[1] & 1; - - scsi_cdrom_data_command_finish(dev, len, len, len, 1); - return; - - case GPCMD_GET_CONFIGURATION: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - - /* XXX: could result in alignment problems in some architectures */ - feature = (cdb[2] << 8) | cdb[3]; - max_len = (cdb[7] << 8) | cdb[8]; - - /* only feature 0 is supported */ - if ((cdb[2] != 0) || (cdb[3] > 2)) { - scsi_cdrom_invalid_field(dev); - scsi_cdrom_buf_free(dev); - return; - } - - scsi_cdrom_buf_alloc(dev, 65536); - memset(dev->buffer, 0, max_len); - - alloc_length = 0; - b = dev->buffer; - - /* - * the number of sectors from the media tells us which profile - * to use as current. 0 means there is no media - */ - if (dev->drv->cd_status != CD_STATUS_EMPTY) { - len = dev->drv->cdrom_capacity; - if (len > CD_MAX_SECTORS) { - b[6] = (MMC_PROFILE_DVD_ROM >> 8) & 0xff; - b[7] = MMC_PROFILE_DVD_ROM & 0xff; - ret = 1; - } else { - b[6] = (MMC_PROFILE_CD_ROM >> 8) & 0xff; - b[7] = MMC_PROFILE_CD_ROM & 0xff; - ret = 0; - } - } else - ret = 2; - - alloc_length = 8; - b += 8; - - if ((feature == 0) || ((cdb[1] & 3) < 2)) { - b[2] = (0 << 2) | 0x02 | 0x01; /* persistent and current */ - b[3] = 8; - - alloc_length += 4; - b += 4; - - for (i = 0; i < 2; i++) { - b[0] = (profiles[i] >> 8) & 0xff; - b[1] = profiles[i] & 0xff; - - if (ret == i) - b[2] |= 1; - - alloc_length += 4; - b += 4; - } - } - if ((feature == 1) || ((cdb[1] & 3) < 2)) { - b[1] = 1; - b[2] = (2 << 2) | 0x02 | 0x01; /* persistent and current */ - b[3] = 8; - - if (dev->drv->bus_type == CDROM_BUS_SCSI) - b[7] = 1; - else - b[7] = 2; - b[8] = 1; - - alloc_length += 12; - b += 12; - } - if ((feature == 2) || ((cdb[1] & 3) < 2)) { - b[1] = 2; - b[2] = (1 << 2) | 0x02 | 0x01; /* persistent and current */ - b[3] = 4; - - b[4] = 2; - - alloc_length += 8; - b += 8; - } - - dev->buffer[0] = ((alloc_length - 4) >> 24) & 0xff; - dev->buffer[1] = ((alloc_length - 4) >> 16) & 0xff; - dev->buffer[2] = ((alloc_length - 4) >> 8) & 0xff; - dev->buffer[3] = (alloc_length - 4) & 0xff; - - alloc_length = MIN(alloc_length, max_len); - - scsi_cdrom_set_buf_len(dev, BufLen, &alloc_length); - - scsi_cdrom_data_command_finish(dev, alloc_length, alloc_length, alloc_length, 0); - break; - - case GPCMD_GET_EVENT_STATUS_NOTIFICATION: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - - scsi_cdrom_buf_alloc(dev, 8 + sizeof(gesn_event_header_t)); - - gesn_cdb = (void *) cdb; - gesn_event_header = (void *) dev->buffer; - - /* It is fine by the MMC spec to not support async mode operations. */ - if (!(gesn_cdb->polled & 0x01)) { - /* asynchronous mode */ - /* Only polling is supported, asynchronous mode is not. */ - scsi_cdrom_invalid_field(dev); - scsi_cdrom_buf_free(dev); - return; - } - - /* - * These are the supported events. - * - * We currently only support requests of the 'media' type. - * Notification class requests and supported event classes are bitmasks, - * but they are built from the same values as the "notification class" - * field. - */ - gesn_event_header->supported_events = 1 << GESN_MEDIA; - - /* - * We use |= below to set the class field; other bits in this byte - * are reserved now but this is useful to do if we have to use the - * reserved fields later. - */ - gesn_event_header->notification_class = 0; - - /* - * Responses to requests are to be based on request priority. The - * notification_class_request_type enum above specifies the - * priority: upper elements are higher prio than lower ones. - */ - if (gesn_cdb->class & (1 << GESN_MEDIA)) { - gesn_event_header->notification_class |= GESN_MEDIA; - - dev->buffer[4] = dev->media_status; /* Bits 7-4 = Reserved, Bits 4-1 = Media Status */ - dev->buffer[5] = 1; /* Power Status (1 = Active) */ - dev->buffer[6] = 0; - dev->buffer[7] = 0; - used_len = 8; - } else { - gesn_event_header->notification_class = 0x80; /* No event available */ - used_len = sizeof(*gesn_event_header); - } - gesn_event_header->len = used_len - sizeof(*gesn_event_header); - - memmove(dev->buffer, gesn_event_header, 4); - - scsi_cdrom_set_buf_len(dev, BufLen, &used_len); - - scsi_cdrom_data_command_finish(dev, used_len, used_len, used_len, 0); - break; - - case GPCMD_READ_DISC_INFORMATION: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - - max_len = cdb[7]; - max_len <<= 8; - max_len |= cdb[8]; - - scsi_cdrom_buf_alloc(dev, 65536); - - memset(dev->buffer, 0, 34); - memset(dev->buffer, 1, 9); - dev->buffer[0] = 0; - dev->buffer[1] = 32; - dev->buffer[2] = 0xe; /* last session complete, disc finalized */ - dev->buffer[7] = 0x20; /* unrestricted use */ - dev->buffer[8] = 0x00; /* CD-ROM */ - - len=34; - len = MIN(len, max_len); - - scsi_cdrom_set_buf_len(dev, BufLen, &len); - - scsi_cdrom_data_command_finish(dev, len, len, len, 0); - break; - - case GPCMD_READ_TRACK_INFORMATION: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - - max_len = cdb[7]; - max_len <<= 8; - max_len |= cdb[8]; - - scsi_cdrom_buf_alloc(dev, 65536); - - track = ((uint32_t) cdb[2]) << 24; - track |= ((uint32_t) cdb[3]) << 16; - track |= ((uint32_t) cdb[4]) << 8; - track |= (uint32_t) cdb[5]; - - if (((cdb[1] & 0x03) != 1) || (track != 1)) { - scsi_cdrom_invalid_field(dev); - scsi_cdrom_buf_free(dev); - return; - } - - len = 36; - - memset(dev->buffer, 0, 36); - dev->buffer[0] = 0; - dev->buffer[1] = 34; - dev->buffer[2] = 1; /* track number (LSB) */ - dev->buffer[3] = 1; /* session number (LSB) */ - dev->buffer[5] = (0 << 5) | (0 << 4) | (4 << 0); /* not damaged, primary copy, data track */ - dev->buffer[6] = (0 << 7) | (0 << 6) | (0 << 5) | (0 << 6) | (1 << 0); /* not reserved track, not blank, not packet writing, not fixed packet, data mode 1 */ - dev->buffer[7] = (0 << 1) | (0 << 0); /* last recorded address not valid, next recordable address not valid */ - - dev->buffer[24] = ((dev->drv->cdrom_capacity - 1) >> 24) & 0xff; /* track size */ - dev->buffer[25] = ((dev->drv->cdrom_capacity - 1) >> 16) & 0xff; /* track size */ - dev->buffer[26] = ((dev->drv->cdrom_capacity - 1) >> 8) & 0xff; /* track size */ - dev->buffer[27] = (dev->drv->cdrom_capacity - 1) & 0xff; /* track size */ - - if (len > max_len) { - len = max_len; - dev->buffer[0] = ((max_len - 2) >> 8) & 0xff; - dev->buffer[1] = (max_len - 2) & 0xff; - } - - scsi_cdrom_set_buf_len(dev, BufLen, &len); - - scsi_cdrom_data_command_finish(dev, len, len, max_len, 0); - break; - - case GPCMD_AUDIO_TRACK_SEARCH: - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - if ((dev->drv->host_drive < 1) || (dev->drv->cd_status <= CD_STATUS_DATA_ONLY)) { - scsi_cdrom_illegal_mode(dev); - break; - } - pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - ret = cdrom_audio_track_search(dev->drv, pos, cdb[9], cdb[1] & 1); - - if (ret) - scsi_cdrom_command_complete(dev); - else - scsi_cdrom_illegal_mode(dev); - break; - - case GPCMD_TOSHIBA_PLAY_AUDIO: - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - if ((dev->drv->host_drive < 1) || (dev->drv->cd_status <= CD_STATUS_DATA_ONLY)) { - scsi_cdrom_illegal_mode(dev); - break; - } - pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - ret = cdrom_toshiba_audio_play(dev->drv, pos, cdb[9]); - - if (ret) - scsi_cdrom_command_complete(dev); - else - scsi_cdrom_illegal_mode(dev); - break; - - case GPCMD_PLAY_AUDIO_10: - case GPCMD_PLAY_AUDIO_12: - case GPCMD_PLAY_AUDIO_MSF: - case GPCMD_PLAY_AUDIO_TRACK_INDEX: - case GPCMD_PLAY_AUDIO_TRACK_RELATIVE_10: - case GPCMD_PLAY_AUDIO_TRACK_RELATIVE_12: - len = 0; - - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - - switch(cdb[0]) { - case GPCMD_PLAY_AUDIO_10: - msf = 0; - pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - len = (cdb[7] << 8) | cdb[8]; - break; - case GPCMD_PLAY_AUDIO_12: - /* This is apparently deprecated in the ATAPI spec, and apparently - has been since 1995 (!). Hence I'm having to guess most of it. */ - msf = 0; - pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - len = (cdb[6] << 24) | (cdb[7] << 16) | (cdb[8] << 8) | cdb[9]; - break; - case GPCMD_PLAY_AUDIO_MSF: - msf = 1; - pos = (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - len = (cdb[6] << 16) | (cdb[7] << 8) | cdb[8]; - break; - case GPCMD_PLAY_AUDIO_TRACK_INDEX: - msf = 2; - if ((cdb[5] != 1) || (cdb[8] != 1)) { - scsi_cdrom_illegal_mode(dev); - break; - } - pos = cdb[4]; - len = cdb[7]; - break; - case GPCMD_PLAY_AUDIO_TRACK_RELATIVE_10: - msf = 0x100 | cdb[6]; - pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - len = (cdb[7] << 8) | cdb[8]; - break; - case GPCMD_PLAY_AUDIO_TRACK_RELATIVE_12: - msf = 0x100 | cdb[10]; - pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - len = (cdb[6] << 24) | (cdb[7] << 16) | (cdb[8] << 8) | cdb[9]; - break; - } - - if ((dev->drv->host_drive < 1) || (dev->drv->cd_status <= CD_STATUS_DATA_ONLY)) { - scsi_cdrom_illegal_mode(dev); - break; - } - - ret = cdrom_audio_play(dev->drv, pos, len, msf); - - if (ret) - scsi_cdrom_command_complete(dev); - else - scsi_cdrom_illegal_mode(dev); - break; - - case GPCMD_READ_SUBCHANNEL: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - - max_len = cdb[7]; - max_len <<= 8; - max_len |= cdb[8]; - msf = (cdb[1] >> 1) & 1; - - scsi_cdrom_buf_alloc(dev, 32); - - scsi_cdrom_log("CD-ROM %i: Getting page %i (%s)\n", dev->id, cdb[3], msf ? "MSF" : "LBA"); - - if (cdb[3] > 3) { - /* scsi_cdrom_log("CD-ROM %i: Read subchannel check condition %02X\n", dev->id, - cdb[3]); */ - scsi_cdrom_invalid_field(dev); - scsi_cdrom_buf_free(dev); - return; - } - - if (!(cdb[2] & 0x40)) - alloc_length = 4; - else switch(cdb[3]) { - case 0: - /* SCSI-2: Q-type subchannel, ATAPI: reserved */ - alloc_length = (dev->drv->bus_type == CDROM_BUS_SCSI) ? 48 : 4; - break; - case 1: - alloc_length = 16; - break; - default: - alloc_length = 24; - break; - } - - len = alloc_length; - - memset(dev->buffer, 0, 24); - pos = 0; - dev->buffer[pos++] = 0; - dev->buffer[pos++] = 0; /*Audio status*/ - dev->buffer[pos++] = 0; dev->buffer[pos++] = 0; /*Subchannel length*/ - /* Mode 0 = Q subchannel mode, first 16 bytes are indentical to mode 1 (current position), - the rest are stuff like ISRC etc., which can be all zeroes. */ - if (cdb[3] <= 3) { - dev->buffer[pos++] = cdb[3]; /*Format code*/ - - if (alloc_length != 4) { - dev->buffer[1] = cdrom_get_current_subchannel(dev->drv, &dev->buffer[4], msf); - dev->buffer[2] = alloc_length - 4; - } - - switch(dev->drv->cd_status) { - case CD_STATUS_PLAYING: - dev->buffer[1] = 0x11; - break; - case CD_STATUS_PAUSED: - dev->buffer[1] = 0x12; - break; - case CD_STATUS_DATA_ONLY: - dev->buffer[1] = 0x15; - break; - default: - dev->buffer[1] = 0x13; - break; - } - - scsi_cdrom_log("Audio Status = %02x\n", dev->buffer[1]); - } - - len = MIN(len, max_len); - scsi_cdrom_set_buf_len(dev, BufLen, &len); - - scsi_cdrom_data_command_finish(dev, len, len, len, 0); - break; - - case GPCMD_READ_SUBCODEQ_PLAYING_STATUS: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - - alloc_length = cdb[1] & 0x1f; - - scsi_cdrom_buf_alloc(dev, alloc_length); - - if (!dev->drv->ops) { - scsi_cdrom_not_ready(dev); - return; - } - - if (!alloc_length) { - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - scsi_cdrom_log("CD-ROM %i: All done - callback set\n", dev->id); - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * CDROM_TIME; - scsi_cdrom_set_callback(dev); - break; - } - - len = alloc_length; - - memset(dev->buffer, 0, len); - dev->buffer[0] = cdrom_get_current_subcodeq_playstatus(dev->drv, &dev->buffer[1]); - scsi_cdrom_log("Audio Status = %02x\n", dev->buffer[0]); - - scsi_cdrom_set_buf_len(dev, BufLen, &alloc_length); - scsi_cdrom_data_command_finish(dev, len, len, len, 0); - break; - - case GPCMD_READ_DVD_STRUCTURE: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - - alloc_length = (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); - - scsi_cdrom_buf_alloc(dev, alloc_length); - - if ((cdb[7] < 0xc0) && (dev->drv->cdrom_capacity <= CD_MAX_SECTORS)) { - scsi_cdrom_incompatible_format(dev); - scsi_cdrom_buf_free(dev); - return; - } - - memset(dev->buffer, 0, alloc_length); - - if ((cdb[7] <= 0x7f) || (cdb[7] == 0xff)) { - if (cdb[1] == 0) { - ret = scsi_cdrom_read_dvd_structure(dev, format, cdb, dev->buffer); - dev->buffer[0] = (ret >> 8); - dev->buffer[1] = (ret & 0xff); - dev->buffer[2] = dev->buffer[3] = 0x00; - if (ret) { - scsi_cdrom_set_buf_len(dev, BufLen, &alloc_length); - scsi_cdrom_data_command_finish(dev, alloc_length, alloc_length, - alloc_length, 0); - } else - scsi_cdrom_buf_free(dev); - return; - } - } else { - scsi_cdrom_invalid_field(dev); - scsi_cdrom_buf_free(dev); - return; - } - break; - - case GPCMD_START_STOP_UNIT: - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - - switch(cdb[4] & 3) { - case 0: /* Stop the disc. */ - scsi_cdrom_stop(sc); - break; - case 1: /* Start the disc and read the TOC. */ - /* This makes no sense under emulation as this would do - absolutely nothing, so just break. */ - break; - case 2: /* Eject the disc if possible. */ - scsi_cdrom_stop(sc); - cdrom_eject(dev->id); - break; - case 3: /* Load the disc (close tray). */ - cdrom_reload(dev->id); - break; - } - - scsi_cdrom_command_complete(dev); - break; - - case GPCMD_CADDY_EJECT: - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - scsi_cdrom_stop(sc); - cdrom_eject(dev->id); - scsi_cdrom_command_complete(dev); - break; - - case GPCMD_INQUIRY: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - - max_len = cdb[3]; - max_len <<= 8; - max_len |= cdb[4]; - - scsi_cdrom_buf_alloc(dev, 65536); - - if (cdb[1] & 1) { - preamble_len = 4; - size_idx = 3; - - dev->buffer[idx++] = 05; - dev->buffer[idx++] = cdb[2]; - dev->buffer[idx++] = 0; - - idx++; - - switch (cdb[2]) { - case 0x00: - dev->buffer[idx++] = 0x00; - dev->buffer[idx++] = 0x83; - break; - case 0x83: - if (idx + 24 > max_len) { - scsi_cdrom_data_phase_error(dev); - scsi_cdrom_buf_free(dev); - return; - } - - dev->buffer[idx++] = 0x02; - dev->buffer[idx++] = 0x00; - dev->buffer[idx++] = 0x00; - dev->buffer[idx++] = 20; - ide_padstr8(dev->buffer + idx, 20, "53R141"); /* Serial */ - idx += 20; - - if (idx + 72 > cdb[4]) - goto atapi_out; - dev->buffer[idx++] = 0x02; - dev->buffer[idx++] = 0x01; - dev->buffer[idx++] = 0x00; - dev->buffer[idx++] = 68; - if (dev->drv->bus_type == CDROM_BUS_SCSI) - ide_padstr8(dev->buffer + idx, 8, "TOSHIBA"); /* Vendor */ - else - ide_padstr8(dev->buffer + idx, 8, EMU_NAME); /* Vendor */ - idx += 8; - if (dev->drv->bus_type == CDROM_BUS_SCSI) - ide_padstr8(dev->buffer + idx, 40, "XM6201TASUN32XCD1103"); /* Product */ - else - ide_padstr8(dev->buffer + idx, 40, device_identify_ex); /* Product */ - idx += 40; - ide_padstr8(dev->buffer + idx, 20, "53R141"); /* Product */ - idx += 20; - break; - default: - scsi_cdrom_log("INQUIRY: Invalid page: %02X\n", cdb[2]); - scsi_cdrom_invalid_field(dev); - scsi_cdrom_buf_free(dev); - return; - } - } else { - preamble_len = 5; - size_idx = 4; - - memset(dev->buffer, 0, 8); - dev->buffer[0] = 5; /*CD-ROM*/ - dev->buffer[1] = 0x80; /*Removable*/ - - if (dev->drv->bus_type == CDROM_BUS_SCSI) { - dev->buffer[2] = 0x02; - dev->buffer[3] = 0x02; - } - else { - dev->buffer[2] = 0x00; - dev->buffer[3] = 0x21; - } - - dev->buffer[4] = 31; - if (dev->drv->bus_type == CDROM_BUS_SCSI) { - dev->buffer[6] = 1; /* 16-bit transfers supported */ - dev->buffer[7] = 0x20; /* Wide bus supported */ - } - - if (dev->drv->bus_type == CDROM_BUS_SCSI) { - ide_padstr8(dev->buffer + 8, 8, "TOSHIBA"); /* Vendor */ - ide_padstr8(dev->buffer + 16, 16, "XM6201TASUN32XCD"); /* Product */ - ide_padstr8(dev->buffer + 32, 4, "1103"); /* Revision */ - } else { - ide_padstr8(dev->buffer + 8, 8, EMU_NAME); /* Vendor */ - ide_padstr8(dev->buffer + 16, 16, device_identify); /* Product */ - ide_padstr8(dev->buffer + 32, 4, EMU_VERSION_EX); /* Revision */ - } - - idx = 36; - - if (max_len == 96) { - dev->buffer[4] = 91; - idx = 96; - } - } + case GPCMD_TEST_UNIT_READY: + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + scsi_cdrom_command_complete(dev); + break; + + case GPCMD_REZERO_UNIT: + scsi_cdrom_stop(sc); + dev->sector_pos = dev->sector_len = 0; + dev->drv->seek_diff = dev->drv->seek_pos; + cdrom_seek(dev->drv, 0); + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + break; + + case GPCMD_REQUEST_SENSE: + /* If there's a unit attention condition and there's a buffered not ready, a standalone REQUEST SENSE + should forget about the not ready, and report unit attention straight away. */ + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + max_len = cdb[4]; + + if (!max_len) { + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * CDROM_TIME; + scsi_cdrom_set_callback(dev); + break; + } + + scsi_cdrom_buf_alloc(dev, 256); + scsi_cdrom_set_buf_len(dev, BufLen, &max_len); + scsi_cdrom_request_sense(dev, dev->buffer, max_len); + scsi_cdrom_data_command_finish(dev, 18, 18, cdb[4], 0); + break; + + case GPCMD_SET_SPEED: + case GPCMD_SET_SPEED_ALT: + dev->drv->cur_speed = (cdb[3] | (cdb[2] << 8)) / 176; + if (dev->drv->cur_speed < 1) + dev->drv->cur_speed = 1; + else if (dev->drv->cur_speed > dev->drv->speed) + dev->drv->cur_speed = dev->drv->speed; + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + scsi_cdrom_command_complete(dev); + break; + + case GPCMD_MECHANISM_STATUS: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + len = (cdb[7] << 16) | (cdb[8] << 8) | cdb[9]; + + scsi_cdrom_buf_alloc(dev, 8); + + scsi_cdrom_set_buf_len(dev, BufLen, &len); + + memset(dev->buffer, 0, 8); + dev->buffer[5] = 1; + + scsi_cdrom_data_command_finish(dev, 8, 8, len, 0); + break; + + case GPCMD_READ_TOC_PMA_ATIP: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + + max_len = cdb[7]; + max_len <<= 8; + max_len |= cdb[8]; + + scsi_cdrom_buf_alloc(dev, 65536); + + toc_format = cdb[2] & 0xf; + + if (toc_format == 0) + toc_format = (cdb[9] >> 6) & 3; + + if (!dev->drv->ops) { + scsi_cdrom_not_ready(dev); + return; + } + + if (toc_format < 3) { + len = cdrom_read_toc(dev->drv, dev->buffer, toc_format, cdb[6], msf, max_len); + if (len == -1) { + /* If the returned length is -1, this means cdrom_read_toc() has encountered an error. */ + scsi_cdrom_invalid_field(dev); + scsi_cdrom_buf_free(dev); + return; + } + } else { + scsi_cdrom_invalid_field(dev); + scsi_cdrom_buf_free(dev); + return; + } + + scsi_cdrom_set_buf_len(dev, BufLen, &len); + + scsi_cdrom_data_command_finish(dev, len, len, len, 0); + /* scsi_cdrom_log("CD-ROM %i: READ_TOC_PMA_ATIP format %02X, length %i (%i)\n", dev->id, + toc_format, ide->cylinder, dev->buffer[1]); */ + return; + + case GPCMD_READ_DISC_INFORMATION_TOSHIBA: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + + scsi_cdrom_buf_alloc(dev, 65536); + + if ((!dev->drv->ops) && ((cdb[1] & 3) == 2)) { + scsi_cdrom_not_ready(dev); + return; + } + + memset(dev->buffer, 0, 4); + + cdrom_read_disc_info_toc(dev->drv, dev->buffer, cdb[2], cdb[1] & 3); + + len = 4; + scsi_cdrom_set_buf_len(dev, BufLen, &len); + + scsi_cdrom_data_command_finish(dev, len, len, len, 0); + return; + + case GPCMD_READ_CD_OLD: + /* IMPORTANT: Convert the command to new read CD + for pass through purposes. */ + dev->current_cdb[0] = 0xbe; + /*FALLTHROUGH*/ + + case GPCMD_READ_6: + case GPCMD_READ_10: + case GPCMD_READ_12: + case GPCMD_READ_CD: + case GPCMD_READ_CD_MSF: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + alloc_length = 2048; + + switch (cdb[0]) { + case GPCMD_READ_6: + dev->sector_len = cdb[4]; + if (dev->sector_len == 0) + dev->sector_len = 256; /* For READ (6) and WRITE (6), a length of 0 indicates a transfer of 256 sector. */ + dev->sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]); + msf = 0; + break; + case GPCMD_READ_10: + dev->sector_len = (cdb[7] << 8) | cdb[8]; + dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + scsi_cdrom_log("CD-ROM %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, + dev->sector_pos); + msf = 0; + break; + case GPCMD_READ_12: + dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); + dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); + scsi_cdrom_log("CD-ROM %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, + dev->sector_pos); + msf = 0; + break; + case GPCMD_READ_CD_MSF: + alloc_length = 2856; + dev->sector_len = MSFtoLBA(cdb[6], cdb[7], cdb[8]); + dev->sector_pos = MSFtoLBA(cdb[3], cdb[4], cdb[5]); + + dev->sector_len -= dev->sector_pos; + dev->sector_len++; + + msf = 1; + + if ((cdb[9] & 0xf8) == 0x08) { + /* 0x08 is an illegal mode */ + scsi_cdrom_invalid_field(dev); + return; + } + + /* If all the flag bits are cleared, then treat it as a non-data command. */ + if ((cdb[9] == 0x00) && ((cdb[10] & 0x07) == 0x00)) + dev->sector_len = 0; + else if ((cdb[9] == 0x00) && ((cdb[10] & 0x07) != 0x00)) { + scsi_cdrom_invalid_field(dev); + return; + } + break; + case GPCMD_READ_CD_OLD: + case GPCMD_READ_CD: + alloc_length = 2856; + dev->sector_len = (cdb[6] << 16) | (cdb[7] << 8) | cdb[8]; + dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + + msf = 0; + + if ((cdb[9] & 0xf8) == 0x08) { + /* 0x08 is an illegal mode */ + scsi_cdrom_invalid_field(dev); + return; + } + + /* If all the flag bits are cleared, then treat it as a non-data command. */ + if ((cdb[9] == 0x00) && ((cdb[10] & 0x07) == 0x00)) + dev->sector_len = 0; + else if ((cdb[9] == 0x00) && ((cdb[10] & 0x07) != 0x00)) { + scsi_cdrom_invalid_field(dev); + return; + } + break; + } + + if (!dev->sector_len) { + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + /* scsi_cdrom_log("CD-ROM %i: All done - callback set\n", dev->id); */ + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * CDROM_TIME; + scsi_cdrom_set_callback(dev); + break; + } + + max_len = dev->sector_len; + dev->requested_blocks = max_len; /* If we're reading all blocks in one go for DMA, why not also for PIO, it should NOT + matter anyway, this step should be identical and only the way the read dat is + transferred to the host should be different. */ + + dev->packet_len = max_len * alloc_length; + scsi_cdrom_buf_alloc(dev, dev->packet_len); + + dev->drv->seek_diff = ABS((int) (pos - dev->sector_pos)); + + ret = scsi_cdrom_read_blocks(dev, &alloc_length, 1); + if (ret <= 0) { + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * CDROM_TIME; + scsi_cdrom_set_callback(dev); + scsi_cdrom_buf_free(dev); + return; + } + + dev->requested_blocks = max_len; + dev->packet_len = alloc_length; + + scsi_cdrom_set_buf_len(dev, BufLen, (int32_t *) &dev->packet_len); + + scsi_cdrom_data_command_finish(dev, alloc_length, alloc_length / dev->requested_blocks, + alloc_length, 0); + + if (dev->packet_status != PHASE_COMPLETE) + ui_sb_update_icon(SB_CDROM | dev->id, 1); + else + ui_sb_update_icon(SB_CDROM | dev->id, 0); + return; + + case GPCMD_READ_HEADER: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + + alloc_length = ((cdb[7] << 8) | cdb[8]); + scsi_cdrom_buf_alloc(dev, 8); + + dev->sector_len = 1; + dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + if (msf) + real_pos = cdrom_lba_to_msf_accurate(dev->sector_pos); + else + real_pos = dev->sector_pos; + dev->buffer[0] = 1; /*2048 bytes user data*/ + dev->buffer[1] = dev->buffer[2] = dev->buffer[3] = 0; + dev->buffer[4] = (real_pos >> 24); + dev->buffer[5] = ((real_pos >> 16) & 0xff); + dev->buffer[6] = ((real_pos >> 8) & 0xff); + dev->buffer[7] = real_pos & 0xff; + + len = 8; + len = MIN(len, alloc_length); + + scsi_cdrom_set_buf_len(dev, BufLen, &len); + + scsi_cdrom_data_command_finish(dev, len, len, len, 0); + return; + + case GPCMD_MODE_SENSE_6: + case GPCMD_MODE_SENSE_10: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + + if (dev->drv->bus_type == CDROM_BUS_SCSI) + block_desc = ((cdb[1] >> 3) & 1) ? 0 : 1; + else + block_desc = 0; + + if (cdb[0] == GPCMD_MODE_SENSE_6) { + len = cdb[4]; + scsi_cdrom_buf_alloc(dev, 256); + } else { + len = (cdb[8] | (cdb[7] << 8)); + scsi_cdrom_buf_alloc(dev, 65536); + } + + if (!(scsi_cdrom_mode_sense_page_flags & (1LL << (uint64_t) (cdb[2] & 0x3f)))) { + scsi_cdrom_invalid_field(dev); + scsi_cdrom_buf_free(dev); + return; + } + + memset(dev->buffer, 0, len); + alloc_length = len; + + /* This determines the media type ID to return - this is + a SCSI/ATAPI-specific thing, so it makes the most sense + to keep this here. + Also, the max_len variable is reused as this command + does otherwise not use it, to avoid having to declare + another variable. */ + if (dev->drv->cd_status == CD_STATUS_EMPTY) + max_len = 70; /* No media inserted. */ + else if (dev->drv->cdrom_capacity > 405000) + max_len = 65; /* DVD. */ + else if (dev->drv->cd_status == CD_STATUS_DATA_ONLY) + max_len = 1; /* Data CD. */ + else + max_len = 3; /* Audio or mixed-mode CD. */ + + if (cdb[0] == GPCMD_MODE_SENSE_6) { + len = scsi_cdrom_mode_sense(dev, dev->buffer, 4, cdb[2], block_desc); + len = MIN(len, alloc_length); + dev->buffer[0] = len - 1; + dev->buffer[1] = max_len; + if (block_desc) + dev->buffer[3] = 8; + } else { + len = scsi_cdrom_mode_sense(dev, dev->buffer, 8, cdb[2], block_desc); + len = MIN(len, alloc_length); + dev->buffer[0] = (len - 2) >> 8; + dev->buffer[1] = (len - 2) & 255; + dev->buffer[2] = max_len; + if (block_desc) { + dev->buffer[6] = 0; + dev->buffer[7] = 8; + } + } + + scsi_cdrom_set_buf_len(dev, BufLen, &len); + + scsi_cdrom_log("CD-ROM %i: Reading mode page: %02X...\n", dev->id, cdb[2]); + + scsi_cdrom_data_command_finish(dev, len, len, alloc_length, 0); + return; + + case GPCMD_MODE_SELECT_6: + case GPCMD_MODE_SELECT_10: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_OUT); + + if (cdb[0] == GPCMD_MODE_SELECT_6) { + len = cdb[4]; + scsi_cdrom_buf_alloc(dev, 256); + } else { + len = (cdb[7] << 8) | cdb[8]; + scsi_cdrom_buf_alloc(dev, 65536); + } + + scsi_cdrom_set_buf_len(dev, BufLen, &len); + + dev->total_length = len; + dev->do_page_save = cdb[1] & 1; + + scsi_cdrom_data_command_finish(dev, len, len, len, 1); + return; + + case GPCMD_GET_CONFIGURATION: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + + /* XXX: could result in alignment problems in some architectures */ + feature = (cdb[2] << 8) | cdb[3]; + max_len = (cdb[7] << 8) | cdb[8]; + + /* only feature 0 is supported */ + if ((cdb[2] != 0) || (cdb[3] > 2)) { + scsi_cdrom_invalid_field(dev); + scsi_cdrom_buf_free(dev); + return; + } + + scsi_cdrom_buf_alloc(dev, 65536); + memset(dev->buffer, 0, max_len); + + alloc_length = 0; + b = dev->buffer; + + /* + * the number of sectors from the media tells us which profile + * to use as current. 0 means there is no media + */ + if (dev->drv->cd_status != CD_STATUS_EMPTY) { + len = dev->drv->cdrom_capacity; + if (len > CD_MAX_SECTORS) { + b[6] = (MMC_PROFILE_DVD_ROM >> 8) & 0xff; + b[7] = MMC_PROFILE_DVD_ROM & 0xff; + ret = 1; + } else { + b[6] = (MMC_PROFILE_CD_ROM >> 8) & 0xff; + b[7] = MMC_PROFILE_CD_ROM & 0xff; + ret = 0; + } + } else + ret = 2; + + alloc_length = 8; + b += 8; + + if ((feature == 0) || ((cdb[1] & 3) < 2)) { + b[2] = (0 << 2) | 0x02 | 0x01; /* persistent and current */ + b[3] = 8; + + alloc_length += 4; + b += 4; + + for (i = 0; i < 2; i++) { + b[0] = (profiles[i] >> 8) & 0xff; + b[1] = profiles[i] & 0xff; + + if (ret == i) + b[2] |= 1; + + alloc_length += 4; + b += 4; + } + } + if ((feature == 1) || ((cdb[1] & 3) < 2)) { + b[1] = 1; + b[2] = (2 << 2) | 0x02 | 0x01; /* persistent and current */ + b[3] = 8; + + if (dev->drv->bus_type == CDROM_BUS_SCSI) + b[7] = 1; + else + b[7] = 2; + b[8] = 1; + + alloc_length += 12; + b += 12; + } + if ((feature == 2) || ((cdb[1] & 3) < 2)) { + b[1] = 2; + b[2] = (1 << 2) | 0x02 | 0x01; /* persistent and current */ + b[3] = 4; + + b[4] = 2; + + alloc_length += 8; + b += 8; + } + + dev->buffer[0] = ((alloc_length - 4) >> 24) & 0xff; + dev->buffer[1] = ((alloc_length - 4) >> 16) & 0xff; + dev->buffer[2] = ((alloc_length - 4) >> 8) & 0xff; + dev->buffer[3] = (alloc_length - 4) & 0xff; + + alloc_length = MIN(alloc_length, max_len); + + scsi_cdrom_set_buf_len(dev, BufLen, &alloc_length); + + scsi_cdrom_data_command_finish(dev, alloc_length, alloc_length, alloc_length, 0); + break; + + case GPCMD_GET_EVENT_STATUS_NOTIFICATION: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + + scsi_cdrom_buf_alloc(dev, 8 + sizeof(gesn_event_header_t)); + + gesn_cdb = (void *) cdb; + gesn_event_header = (void *) dev->buffer; + + /* It is fine by the MMC spec to not support async mode operations. */ + if (!(gesn_cdb->polled & 0x01)) { + /* asynchronous mode */ + /* Only polling is supported, asynchronous mode is not. */ + scsi_cdrom_invalid_field(dev); + scsi_cdrom_buf_free(dev); + return; + } + + /* + * These are the supported events. + * + * We currently only support requests of the 'media' type. + * Notification class requests and supported event classes are bitmasks, + * but they are built from the same values as the "notification class" + * field. + */ + gesn_event_header->supported_events = 1 << GESN_MEDIA; + + /* + * We use |= below to set the class field; other bits in this byte + * are reserved now but this is useful to do if we have to use the + * reserved fields later. + */ + gesn_event_header->notification_class = 0; + + /* + * Responses to requests are to be based on request priority. The + * notification_class_request_type enum above specifies the + * priority: upper elements are higher prio than lower ones. + */ + if (gesn_cdb->class & (1 << GESN_MEDIA)) { + gesn_event_header->notification_class |= GESN_MEDIA; + + dev->buffer[4] = dev->media_status; /* Bits 7-4 = Reserved, Bits 4-1 = Media Status */ + dev->buffer[5] = 1; /* Power Status (1 = Active) */ + dev->buffer[6] = 0; + dev->buffer[7] = 0; + used_len = 8; + } else { + gesn_event_header->notification_class = 0x80; /* No event available */ + used_len = sizeof(*gesn_event_header); + } + gesn_event_header->len = used_len - sizeof(*gesn_event_header); + + memmove(dev->buffer, gesn_event_header, 4); + + scsi_cdrom_set_buf_len(dev, BufLen, &used_len); + + scsi_cdrom_data_command_finish(dev, used_len, used_len, used_len, 0); + break; + + case GPCMD_READ_DISC_INFORMATION: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + + max_len = cdb[7]; + max_len <<= 8; + max_len |= cdb[8]; + + scsi_cdrom_buf_alloc(dev, 65536); + + memset(dev->buffer, 0, 34); + memset(dev->buffer, 1, 9); + dev->buffer[0] = 0; + dev->buffer[1] = 32; + dev->buffer[2] = 0xe; /* last session complete, disc finalized */ + dev->buffer[7] = 0x20; /* unrestricted use */ + dev->buffer[8] = 0x00; /* CD-ROM */ + + len = 34; + len = MIN(len, max_len); + + scsi_cdrom_set_buf_len(dev, BufLen, &len); + + scsi_cdrom_data_command_finish(dev, len, len, len, 0); + break; + + case GPCMD_READ_TRACK_INFORMATION: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + + max_len = cdb[7]; + max_len <<= 8; + max_len |= cdb[8]; + + scsi_cdrom_buf_alloc(dev, 65536); + + track = ((uint32_t) cdb[2]) << 24; + track |= ((uint32_t) cdb[3]) << 16; + track |= ((uint32_t) cdb[4]) << 8; + track |= (uint32_t) cdb[5]; + + if (((cdb[1] & 0x03) != 1) || (track != 1)) { + scsi_cdrom_invalid_field(dev); + scsi_cdrom_buf_free(dev); + return; + } + + len = 36; + + memset(dev->buffer, 0, 36); + dev->buffer[0] = 0; + dev->buffer[1] = 34; + dev->buffer[2] = 1; /* track number (LSB) */ + dev->buffer[3] = 1; /* session number (LSB) */ + dev->buffer[5] = (0 << 5) | (0 << 4) | (4 << 0); /* not damaged, primary copy, data track */ + dev->buffer[6] = (0 << 7) | (0 << 6) | (0 << 5) | (0 << 6) | (1 << 0); /* not reserved track, not blank, not packet writing, not fixed packet, data mode 1 */ + dev->buffer[7] = (0 << 1) | (0 << 0); /* last recorded address not valid, next recordable address not valid */ + + dev->buffer[24] = ((dev->drv->cdrom_capacity - 1) >> 24) & 0xff; /* track size */ + dev->buffer[25] = ((dev->drv->cdrom_capacity - 1) >> 16) & 0xff; /* track size */ + dev->buffer[26] = ((dev->drv->cdrom_capacity - 1) >> 8) & 0xff; /* track size */ + dev->buffer[27] = (dev->drv->cdrom_capacity - 1) & 0xff; /* track size */ + + if (len > max_len) { + len = max_len; + dev->buffer[0] = ((max_len - 2) >> 8) & 0xff; + dev->buffer[1] = (max_len - 2) & 0xff; + } + + scsi_cdrom_set_buf_len(dev, BufLen, &len); + + scsi_cdrom_data_command_finish(dev, len, len, max_len, 0); + break; + + case GPCMD_AUDIO_TRACK_SEARCH: + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + if ((dev->drv->host_drive < 1) || (dev->drv->cd_status <= CD_STATUS_DATA_ONLY)) { + scsi_cdrom_illegal_mode(dev); + break; + } + pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + ret = cdrom_audio_track_search(dev->drv, pos, cdb[9], cdb[1] & 1); + + if (ret) + scsi_cdrom_command_complete(dev); + else + scsi_cdrom_illegal_mode(dev); + break; + + case GPCMD_TOSHIBA_PLAY_AUDIO: + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + if ((dev->drv->host_drive < 1) || (dev->drv->cd_status <= CD_STATUS_DATA_ONLY)) { + scsi_cdrom_illegal_mode(dev); + break; + } + pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + ret = cdrom_toshiba_audio_play(dev->drv, pos, cdb[9]); + + if (ret) + scsi_cdrom_command_complete(dev); + else + scsi_cdrom_illegal_mode(dev); + break; + + case GPCMD_PLAY_AUDIO_10: + case GPCMD_PLAY_AUDIO_12: + case GPCMD_PLAY_AUDIO_MSF: + case GPCMD_PLAY_AUDIO_TRACK_INDEX: + case GPCMD_PLAY_AUDIO_TRACK_RELATIVE_10: + case GPCMD_PLAY_AUDIO_TRACK_RELATIVE_12: + len = 0; + + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + + switch (cdb[0]) { + case GPCMD_PLAY_AUDIO_10: + msf = 0; + pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + len = (cdb[7] << 8) | cdb[8]; + break; + case GPCMD_PLAY_AUDIO_12: + /* This is apparently deprecated in the ATAPI spec, and apparently + has been since 1995 (!). Hence I'm having to guess most of it. */ + msf = 0; + pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + len = (cdb[6] << 24) | (cdb[7] << 16) | (cdb[8] << 8) | cdb[9]; + break; + case GPCMD_PLAY_AUDIO_MSF: + msf = 1; + pos = (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + len = (cdb[6] << 16) | (cdb[7] << 8) | cdb[8]; + break; + case GPCMD_PLAY_AUDIO_TRACK_INDEX: + msf = 2; + if ((cdb[5] != 1) || (cdb[8] != 1)) { + scsi_cdrom_illegal_mode(dev); + break; + } + pos = cdb[4]; + len = cdb[7]; + break; + case GPCMD_PLAY_AUDIO_TRACK_RELATIVE_10: + msf = 0x100 | cdb[6]; + pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + len = (cdb[7] << 8) | cdb[8]; + break; + case GPCMD_PLAY_AUDIO_TRACK_RELATIVE_12: + msf = 0x100 | cdb[10]; + pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + len = (cdb[6] << 24) | (cdb[7] << 16) | (cdb[8] << 8) | cdb[9]; + break; + } + + if ((dev->drv->host_drive < 1) || (dev->drv->cd_status <= CD_STATUS_DATA_ONLY)) { + scsi_cdrom_illegal_mode(dev); + break; + } + + ret = cdrom_audio_play(dev->drv, pos, len, msf); + + if (ret) + scsi_cdrom_command_complete(dev); + else + scsi_cdrom_illegal_mode(dev); + break; + + case GPCMD_READ_SUBCHANNEL: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + + max_len = cdb[7]; + max_len <<= 8; + max_len |= cdb[8]; + msf = (cdb[1] >> 1) & 1; + + scsi_cdrom_buf_alloc(dev, 32); + + scsi_cdrom_log("CD-ROM %i: Getting page %i (%s)\n", dev->id, cdb[3], msf ? "MSF" : "LBA"); + + if (cdb[3] > 3) { + /* scsi_cdrom_log("CD-ROM %i: Read subchannel check condition %02X\n", dev->id, + cdb[3]); */ + scsi_cdrom_invalid_field(dev); + scsi_cdrom_buf_free(dev); + return; + } + + if (!(cdb[2] & 0x40)) + alloc_length = 4; + else + switch (cdb[3]) { + case 0: + /* SCSI-2: Q-type subchannel, ATAPI: reserved */ + alloc_length = (dev->drv->bus_type == CDROM_BUS_SCSI) ? 48 : 4; + break; + case 1: + alloc_length = 16; + break; + default: + alloc_length = 24; + break; + } + + len = alloc_length; + + memset(dev->buffer, 0, 24); + pos = 0; + dev->buffer[pos++] = 0; + dev->buffer[pos++] = 0; /*Audio status*/ + dev->buffer[pos++] = 0; + dev->buffer[pos++] = 0; /*Subchannel length*/ + /* Mode 0 = Q subchannel mode, first 16 bytes are indentical to mode 1 (current position), + the rest are stuff like ISRC etc., which can be all zeroes. */ + if (cdb[3] <= 3) { + dev->buffer[pos++] = cdb[3]; /*Format code*/ + + if (alloc_length != 4) { + dev->buffer[1] = cdrom_get_current_subchannel(dev->drv, &dev->buffer[4], msf); + dev->buffer[2] = alloc_length - 4; + } + + switch (dev->drv->cd_status) { + case CD_STATUS_PLAYING: + dev->buffer[1] = 0x11; + break; + case CD_STATUS_PAUSED: + dev->buffer[1] = 0x12; + break; + case CD_STATUS_DATA_ONLY: + dev->buffer[1] = 0x15; + break; + default: + dev->buffer[1] = 0x13; + break; + } + + scsi_cdrom_log("Audio Status = %02x\n", dev->buffer[1]); + } + + len = MIN(len, max_len); + scsi_cdrom_set_buf_len(dev, BufLen, &len); + + scsi_cdrom_data_command_finish(dev, len, len, len, 0); + break; + + case GPCMD_READ_SUBCODEQ_PLAYING_STATUS: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + + alloc_length = cdb[1] & 0x1f; + + scsi_cdrom_buf_alloc(dev, alloc_length); + + if (!dev->drv->ops) { + scsi_cdrom_not_ready(dev); + return; + } + + if (!alloc_length) { + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + scsi_cdrom_log("CD-ROM %i: All done - callback set\n", dev->id); + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * CDROM_TIME; + scsi_cdrom_set_callback(dev); + break; + } + + len = alloc_length; + + memset(dev->buffer, 0, len); + dev->buffer[0] = cdrom_get_current_subcodeq_playstatus(dev->drv, &dev->buffer[1]); + scsi_cdrom_log("Audio Status = %02x\n", dev->buffer[0]); + + scsi_cdrom_set_buf_len(dev, BufLen, &alloc_length); + scsi_cdrom_data_command_finish(dev, len, len, len, 0); + break; + + case GPCMD_READ_DVD_STRUCTURE: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + + alloc_length = (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); + + scsi_cdrom_buf_alloc(dev, alloc_length); + + if ((cdb[7] < 0xc0) && (dev->drv->cdrom_capacity <= CD_MAX_SECTORS)) { + scsi_cdrom_incompatible_format(dev); + scsi_cdrom_buf_free(dev); + return; + } + + memset(dev->buffer, 0, alloc_length); + + if ((cdb[7] <= 0x7f) || (cdb[7] == 0xff)) { + if (cdb[1] == 0) { + ret = scsi_cdrom_read_dvd_structure(dev, format, cdb, dev->buffer); + dev->buffer[0] = (ret >> 8); + dev->buffer[1] = (ret & 0xff); + dev->buffer[2] = dev->buffer[3] = 0x00; + if (ret) { + scsi_cdrom_set_buf_len(dev, BufLen, &alloc_length); + scsi_cdrom_data_command_finish(dev, alloc_length, alloc_length, + alloc_length, 0); + } else + scsi_cdrom_buf_free(dev); + return; + } + } else { + scsi_cdrom_invalid_field(dev); + scsi_cdrom_buf_free(dev); + return; + } + break; + + case GPCMD_START_STOP_UNIT: + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + + switch (cdb[4] & 3) { + case 0: /* Stop the disc. */ + scsi_cdrom_stop(sc); + break; + case 1: /* Start the disc and read the TOC. */ + /* This makes no sense under emulation as this would do + absolutely nothing, so just break. */ + break; + case 2: /* Eject the disc if possible. */ + scsi_cdrom_stop(sc); + cdrom_eject(dev->id); + break; + case 3: /* Load the disc (close tray). */ + cdrom_reload(dev->id); + break; + } + + scsi_cdrom_command_complete(dev); + break; + + case GPCMD_CADDY_EJECT: + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + scsi_cdrom_stop(sc); + cdrom_eject(dev->id); + scsi_cdrom_command_complete(dev); + break; + + case GPCMD_INQUIRY: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + + max_len = cdb[3]; + max_len <<= 8; + max_len |= cdb[4]; + + scsi_cdrom_buf_alloc(dev, 65536); + + if (cdb[1] & 1) { + preamble_len = 4; + size_idx = 3; + + dev->buffer[idx++] = 05; + dev->buffer[idx++] = cdb[2]; + dev->buffer[idx++] = 0; + + idx++; + + switch (cdb[2]) { + case 0x00: + dev->buffer[idx++] = 0x00; + dev->buffer[idx++] = 0x83; + break; + case 0x83: + if (idx + 24 > max_len) { + scsi_cdrom_data_phase_error(dev); + scsi_cdrom_buf_free(dev); + return; + } + + dev->buffer[idx++] = 0x02; + dev->buffer[idx++] = 0x00; + dev->buffer[idx++] = 0x00; + dev->buffer[idx++] = 20; + ide_padstr8(dev->buffer + idx, 20, "53R141"); /* Serial */ + idx += 20; + + if (idx + 72 > cdb[4]) + goto atapi_out; + dev->buffer[idx++] = 0x02; + dev->buffer[idx++] = 0x01; + dev->buffer[idx++] = 0x00; + dev->buffer[idx++] = 68; + if (dev->drv->bus_type == CDROM_BUS_SCSI) + ide_padstr8(dev->buffer + idx, 8, "TOSHIBA"); /* Vendor */ + else + ide_padstr8(dev->buffer + idx, 8, EMU_NAME); /* Vendor */ + idx += 8; + if (dev->drv->bus_type == CDROM_BUS_SCSI) + ide_padstr8(dev->buffer + idx, 40, "XM6201TASUN32XCD1103"); /* Product */ + else + ide_padstr8(dev->buffer + idx, 40, device_identify_ex); /* Product */ + idx += 40; + ide_padstr8(dev->buffer + idx, 20, "53R141"); /* Product */ + idx += 20; + break; + default: + scsi_cdrom_log("INQUIRY: Invalid page: %02X\n", cdb[2]); + scsi_cdrom_invalid_field(dev); + scsi_cdrom_buf_free(dev); + return; + } + } else { + preamble_len = 5; + size_idx = 4; + + memset(dev->buffer, 0, 8); + dev->buffer[0] = 5; /*CD-ROM*/ + dev->buffer[1] = 0x80; /*Removable*/ + + if (dev->drv->bus_type == CDROM_BUS_SCSI) { + dev->buffer[2] = 0x02; + dev->buffer[3] = 0x02; + } else { + dev->buffer[2] = 0x00; + dev->buffer[3] = 0x21; + } + + dev->buffer[4] = 31; + if (dev->drv->bus_type == CDROM_BUS_SCSI) { + dev->buffer[6] = 1; /* 16-bit transfers supported */ + dev->buffer[7] = 0x20; /* Wide bus supported */ + } + + if (dev->drv->bus_type == CDROM_BUS_SCSI) { + ide_padstr8(dev->buffer + 8, 8, "TOSHIBA"); /* Vendor */ + ide_padstr8(dev->buffer + 16, 16, "XM6201TASUN32XCD"); /* Product */ + ide_padstr8(dev->buffer + 32, 4, "1103"); /* Revision */ + } else { + ide_padstr8(dev->buffer + 8, 8, EMU_NAME); /* Vendor */ + ide_padstr8(dev->buffer + 16, 16, device_identify); /* Product */ + ide_padstr8(dev->buffer + 32, 4, EMU_VERSION_EX); /* Revision */ + } + + idx = 36; + + if (max_len == 96) { + dev->buffer[4] = 91; + idx = 96; + } + } atapi_out: - dev->buffer[size_idx] = idx - preamble_len; - len=idx; + dev->buffer[size_idx] = idx - preamble_len; + len = idx; - len = MIN(len, max_len); - scsi_cdrom_set_buf_len(dev, BufLen, &len); + len = MIN(len, max_len); + scsi_cdrom_set_buf_len(dev, BufLen, &len); - scsi_cdrom_data_command_finish(dev, len, len, max_len, 0); - break; + scsi_cdrom_data_command_finish(dev, len, len, max_len, 0); + break; - case GPCMD_PREVENT_REMOVAL: - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - scsi_cdrom_command_complete(dev); - break; + case GPCMD_PREVENT_REMOVAL: + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + scsi_cdrom_command_complete(dev); + break; #if 0 case GPCMD_PAUSE_RESUME_ALT: #endif - case GPCMD_PAUSE_RESUME: - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - cdrom_audio_pause_resume(dev->drv, cdb[8] & 0x01); - scsi_cdrom_command_complete(dev); - break; + case GPCMD_PAUSE_RESUME: + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + cdrom_audio_pause_resume(dev->drv, cdb[8] & 0x01); + scsi_cdrom_command_complete(dev); + break; - case GPCMD_STILL: - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - dev->drv->cd_status = CD_STATUS_PAUSED; - scsi_cdrom_command_complete(dev); - break; + case GPCMD_STILL: + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + dev->drv->cd_status = CD_STATUS_PAUSED; + scsi_cdrom_command_complete(dev); + break; - case GPCMD_SEEK_6: - case GPCMD_SEEK_10: - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + case GPCMD_SEEK_6: + case GPCMD_SEEK_10: + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - switch(cdb[0]) { - case GPCMD_SEEK_6: - pos = (cdb[2] << 8) | cdb[3]; - break; - case GPCMD_SEEK_10: - pos = (cdb[2] << 24) | (cdb[3]<<16) | (cdb[4]<<8) | cdb[5]; - break; - } - dev->drv->seek_diff = ABS((int) (pos - dev->drv->seek_pos)); - cdrom_seek(dev->drv, pos); - scsi_cdrom_command_complete(dev); - break; + switch (cdb[0]) { + case GPCMD_SEEK_6: + pos = (cdb[2] << 8) | cdb[3]; + break; + case GPCMD_SEEK_10: + pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + break; + } + dev->drv->seek_diff = ABS((int) (pos - dev->drv->seek_pos)); + cdrom_seek(dev->drv, pos); + scsi_cdrom_command_complete(dev); + break; - case GPCMD_READ_CDROM_CAPACITY: - scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); + case GPCMD_READ_CDROM_CAPACITY: + scsi_cdrom_set_phase(dev, SCSI_PHASE_DATA_IN); - scsi_cdrom_buf_alloc(dev, 8); + scsi_cdrom_buf_alloc(dev, 8); - /* IMPORTANT: What's returned is the last LBA block. */ - memset(dev->buffer, 0, 8); - dev->buffer[0] = ((dev->drv->cdrom_capacity - 1) >> 24) & 0xff; - dev->buffer[1] = ((dev->drv->cdrom_capacity - 1) >> 16) & 0xff; - dev->buffer[2] = ((dev->drv->cdrom_capacity - 1) >> 8) & 0xff; - dev->buffer[3] = (dev->drv->cdrom_capacity - 1) & 0xff; - dev->buffer[6] = 8; - len = 8; + /* IMPORTANT: What's returned is the last LBA block. */ + memset(dev->buffer, 0, 8); + dev->buffer[0] = ((dev->drv->cdrom_capacity - 1) >> 24) & 0xff; + dev->buffer[1] = ((dev->drv->cdrom_capacity - 1) >> 16) & 0xff; + dev->buffer[2] = ((dev->drv->cdrom_capacity - 1) >> 8) & 0xff; + dev->buffer[3] = (dev->drv->cdrom_capacity - 1) & 0xff; + dev->buffer[6] = 8; + len = 8; - scsi_cdrom_set_buf_len(dev, BufLen, &len); + scsi_cdrom_set_buf_len(dev, BufLen, &len); - scsi_cdrom_data_command_finish(dev, len, len, len, 0); - break; + scsi_cdrom_data_command_finish(dev, len, len, len, 0); + break; - case GPCMD_STOP_PLAY_SCAN: - scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); + case GPCMD_STOP_PLAY_SCAN: + scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - if (dev->drv->cd_status <= CD_STATUS_DATA_ONLY) { - scsi_cdrom_illegal_mode(dev); - break; - } + if (dev->drv->cd_status <= CD_STATUS_DATA_ONLY) { + scsi_cdrom_illegal_mode(dev); + break; + } - scsi_cdrom_stop(sc); - scsi_cdrom_command_complete(dev); - break; + scsi_cdrom_stop(sc); + scsi_cdrom_command_complete(dev); + break; - default: - scsi_cdrom_illegal_opcode(dev); - break; + default: + scsi_cdrom_illegal_opcode(dev); + break; } /* scsi_cdrom_log("CD-ROM %i: Phase: %02X, request length: %i\n", dev->phase, dev->request_length); */ if (scsi_cdrom_atapi_phase_to_scsi(dev) == SCSI_PHASE_STATUS) - scsi_cdrom_buf_free(dev); + scsi_cdrom_buf_free(dev); } - static void scsi_cdrom_command_stop(scsi_common_t *sc) { @@ -2518,165 +2457,160 @@ scsi_cdrom_command_stop(scsi_common_t *sc) scsi_cdrom_buf_free(dev); } - /* The command second phase function, needed for Mode Select. */ static uint8_t scsi_cdrom_phase_data_out(scsi_common_t *sc) { scsi_cdrom_t *dev = (scsi_cdrom_t *) sc; - uint16_t block_desc_len, pos; - uint16_t param_list_len; - uint16_t i = 0; + uint16_t block_desc_len, pos; + uint16_t param_list_len; + uint16_t i = 0; uint8_t error = 0; uint8_t page, page_len, hdr_len, val, old_val, ch; - switch(dev->current_cdb[0]) { - case GPCMD_MODE_SELECT_6: - case GPCMD_MODE_SELECT_10: - if (dev->current_cdb[0] == GPCMD_MODE_SELECT_10) { - hdr_len = 8; - param_list_len = dev->current_cdb[7]; - param_list_len <<= 8; - param_list_len |= dev->current_cdb[8]; - } else { - hdr_len = 4; - param_list_len = dev->current_cdb[4]; - } + switch (dev->current_cdb[0]) { + case GPCMD_MODE_SELECT_6: + case GPCMD_MODE_SELECT_10: + if (dev->current_cdb[0] == GPCMD_MODE_SELECT_10) { + hdr_len = 8; + param_list_len = dev->current_cdb[7]; + param_list_len <<= 8; + param_list_len |= dev->current_cdb[8]; + } else { + hdr_len = 4; + param_list_len = dev->current_cdb[4]; + } - if (dev->drv->bus_type == CDROM_BUS_SCSI) { - if (dev->current_cdb[0] == GPCMD_MODE_SELECT_6) { - block_desc_len = dev->buffer[2]; - block_desc_len <<= 8; - block_desc_len |= dev->buffer[3]; - } else { - block_desc_len = dev->buffer[6]; - block_desc_len <<= 8; - block_desc_len |= dev->buffer[7]; - } - } else - block_desc_len = 0; + if (dev->drv->bus_type == CDROM_BUS_SCSI) { + if (dev->current_cdb[0] == GPCMD_MODE_SELECT_6) { + block_desc_len = dev->buffer[2]; + block_desc_len <<= 8; + block_desc_len |= dev->buffer[3]; + } else { + block_desc_len = dev->buffer[6]; + block_desc_len <<= 8; + block_desc_len |= dev->buffer[7]; + } + } else + block_desc_len = 0; - pos = hdr_len + block_desc_len; + pos = hdr_len + block_desc_len; - while(1) { - if (pos >= param_list_len) { - scsi_cdrom_log("CD-ROM %i: Buffer has only block descriptor\n", dev->id); - break; - } + while (1) { + if (pos >= param_list_len) { + scsi_cdrom_log("CD-ROM %i: Buffer has only block descriptor\n", dev->id); + break; + } - page = dev->buffer[pos] & 0x3F; - page_len = dev->buffer[pos + 1]; + page = dev->buffer[pos] & 0x3F; + page_len = dev->buffer[pos + 1]; - pos += 2; + pos += 2; - if (!(scsi_cdrom_mode_sense_page_flags & (1LL << ((uint64_t) page)))) { - scsi_cdrom_log("CD-ROM %i: Unimplemented page %02X\n", dev->id, page); - error |= 1; - } else { - for (i = 0; i < page_len; i++) { - ch = scsi_cdrom_mode_sense_pages_changeable.pages[page][i + 2]; - val = dev->buffer[pos + i]; - old_val = dev->ms_pages_saved.pages[page][i + 2]; - if (val != old_val) { - if (ch) - dev->ms_pages_saved.pages[page][i + 2] = val; - else { - scsi_cdrom_log("CD-ROM %i: Unchangeable value on position %02X on page %02X\n", dev->id, i + 2, page); - error |= 1; - } - } - } - } + if (!(scsi_cdrom_mode_sense_page_flags & (1LL << ((uint64_t) page)))) { + scsi_cdrom_log("CD-ROM %i: Unimplemented page %02X\n", dev->id, page); + error |= 1; + } else { + for (i = 0; i < page_len; i++) { + ch = scsi_cdrom_mode_sense_pages_changeable.pages[page][i + 2]; + val = dev->buffer[pos + i]; + old_val = dev->ms_pages_saved.pages[page][i + 2]; + if (val != old_val) { + if (ch) + dev->ms_pages_saved.pages[page][i + 2] = val; + else { + scsi_cdrom_log("CD-ROM %i: Unchangeable value on position %02X on page %02X\n", dev->id, i + 2, page); + error |= 1; + } + } + } + } - pos += page_len; + pos += page_len; - if (dev->drv->bus_type == CDROM_BUS_SCSI) - val = scsi_cdrom_mode_sense_pages_default_scsi.pages[page][0] & 0x80; - else - val = scsi_cdrom_mode_sense_pages_default.pages[page][0] & 0x80; + if (dev->drv->bus_type == CDROM_BUS_SCSI) + val = scsi_cdrom_mode_sense_pages_default_scsi.pages[page][0] & 0x80; + else + val = scsi_cdrom_mode_sense_pages_default.pages[page][0] & 0x80; - if (dev->do_page_save && val) - scsi_cdrom_mode_sense_save(dev); + if (dev->do_page_save && val) + scsi_cdrom_mode_sense_save(dev); - if (pos >= dev->total_length) - break; - } + if (pos >= dev->total_length) + break; + } - if (error) { - scsi_cdrom_invalid_field_pl(dev); - scsi_cdrom_buf_free(dev); - return 0; - } - break; + if (error) { + scsi_cdrom_invalid_field_pl(dev); + scsi_cdrom_buf_free(dev); + return 0; + } + break; } scsi_cdrom_command_stop((scsi_common_t *) dev); return 1; } - static void scsi_cdrom_close(void *p) { scsi_cdrom_t *dev = (scsi_cdrom_t *) p; if (dev) - free(dev); + free(dev); } - static int scsi_cdrom_get_max(int ide_has_dma, int type) { int ret; - switch(type) { - case TYPE_PIO: - ret = ide_has_dma ? 4 : 0; - break; - case TYPE_SDMA: - ret = ide_has_dma ? 2 : -1; - break; - case TYPE_MDMA: - ret = ide_has_dma ? 2 : -1; - break; - case TYPE_UDMA: - ret = ide_has_dma ? 5 : -1; - break; - default: - ret = -1; - break; + switch (type) { + case TYPE_PIO: + ret = ide_has_dma ? 4 : 0; + break; + case TYPE_SDMA: + ret = ide_has_dma ? 2 : -1; + break; + case TYPE_MDMA: + ret = ide_has_dma ? 2 : -1; + break; + case TYPE_UDMA: + ret = ide_has_dma ? 5 : -1; + break; + default: + ret = -1; + break; } return ret; } - static int scsi_cdrom_get_timings(int ide_has_dma, int type) { int ret; - switch(type) { - case TIMINGS_DMA: - ret = ide_has_dma ? 120 : 0; - break; - case TIMINGS_PIO: - ret = ide_has_dma ? 120 : 0; - break; - case TIMINGS_PIO_FC: - ret = 0; - break; - default: - ret = 0; - break; + switch (type) { + case TIMINGS_DMA: + ret = ide_has_dma ? 120 : 0; + break; + case TIMINGS_PIO: + ret = ide_has_dma ? 120 : 0; + break; + case TIMINGS_PIO_FC: + ret = 0; + break; + default: + ret = 0; + break; } return ret; } - /** * Fill in ide->buffer with the output of the "IDENTIFY PACKET DEVICE" command */ @@ -2693,105 +2627,104 @@ scsi_cdrom_identify(ide_t *ide, int ide_has_dma) scsi_cdrom_log("ATAPI Identify: %s\n", device_identify); #endif - ide->buffer[0] = 0x8000 | (5<<8) | 0x80 | (2<<5); /* ATAPI device, CD-ROM drive, removable media, accelerated DRQ */ - ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */ + ide->buffer[0] = 0x8000 | (5 << 8) | 0x80 | (2 << 5); /* ATAPI device, CD-ROM drive, removable media, accelerated DRQ */ + ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */ #if 0 ide_padstr((char *) (ide->buffer + 23), EMU_VERSION_EX, 8); /* Firmware */ ide_padstr((char *) (ide->buffer + 27), device_identify, 40); /* Model */ #else - ide_padstr((char *) (ide->buffer + 23), "4.20 ", 8); /* Firmware */ + ide_padstr((char *) (ide->buffer + 23), "4.20 ", 8); /* Firmware */ ide_padstr((char *) (ide->buffer + 27), "NEC CD-ROM DRIVE:273 ", 40); /* Model */ #endif - ide->buffer[49] = 0x200; /* LBA supported */ + ide->buffer[49] = 0x200; /* LBA supported */ ide->buffer[126] = 0xfffe; /* Interpret zero byte count limit as maximum length */ if (ide_has_dma) { - ide->buffer[71] = 30; - ide->buffer[72] = 30; - ide->buffer[80] = 0x7e; /*ATA-1 to ATA-6 supported*/ - ide->buffer[81] = 0x19; /*ATA-6 revision 3a supported*/ + ide->buffer[71] = 30; + ide->buffer[72] = 30; + ide->buffer[80] = 0x7e; /*ATA-1 to ATA-6 supported*/ + ide->buffer[81] = 0x19; /*ATA-6 revision 3a supported*/ } } - void scsi_cdrom_drive_reset(int c) { - cdrom_t *drv = &cdrom[c]; - scsi_cdrom_t *dev; + cdrom_t *drv = &cdrom[c]; + scsi_cdrom_t *dev; scsi_device_t *sd; - ide_t *id; - uint8_t scsi_bus = (drv->scsi_device_id >> 4) & 0x0f; - uint8_t scsi_id = drv->scsi_device_id & 0x0f; + ide_t *id; + uint8_t scsi_bus = (drv->scsi_device_id >> 4) & 0x0f; + uint8_t scsi_id = drv->scsi_device_id & 0x0f; if (drv->bus_type == CDROM_BUS_SCSI) { - /* Make sure to ignore any SCSI CD-ROM drive that has an out of range SCSI bus. */ - if (scsi_bus >= SCSI_BUS_MAX) - return; + /* Make sure to ignore any SCSI CD-ROM drive that has an out of range SCSI bus. */ + if (scsi_bus >= SCSI_BUS_MAX) + return; - /* Make sure to ignore any SCSI CD-ROM drive that has an out of range ID. */ - if (scsi_id >= SCSI_ID_MAX) - return; + /* Make sure to ignore any SCSI CD-ROM drive that has an out of range ID. */ + if (scsi_id >= SCSI_ID_MAX) + return; } /* Make sure to ignore any ATAPI CD-ROM drive that has an out of range IDE channel. */ if ((drv->bus_type == CDROM_BUS_ATAPI) && (drv->ide_channel > 7)) - return; + return; if (!drv->priv) { - drv->priv = (scsi_cdrom_t *) malloc(sizeof(scsi_cdrom_t)); - memset(drv->priv, 0, sizeof(scsi_cdrom_t)); + drv->priv = (scsi_cdrom_t *) malloc(sizeof(scsi_cdrom_t)); + memset(drv->priv, 0, sizeof(scsi_cdrom_t)); } dev = (scsi_cdrom_t *) drv->priv; - dev->id = c; + dev->id = c; dev->drv = drv; dev->cur_lun = SCSI_LUN_USE_CDB; - drv->insert = scsi_cdrom_insert; - drv->get_volume = scsi_cdrom_get_volume; + drv->insert = scsi_cdrom_insert; + drv->get_volume = scsi_cdrom_get_volume; drv->get_channel = scsi_cdrom_get_channel; - drv->close = scsi_cdrom_close; + drv->close = scsi_cdrom_close; scsi_cdrom_init(dev); if (drv->bus_type == CDROM_BUS_SCSI) { - /* SCSI CD-ROM, attach to the SCSI bus. */ - sd = &scsi_devices[scsi_bus][scsi_id]; + /* SCSI CD-ROM, attach to the SCSI bus. */ + sd = &scsi_devices[scsi_bus][scsi_id]; - sd->sc = (scsi_common_t *) dev; - sd->command = scsi_cdrom_command; - sd->request_sense = scsi_cdrom_request_sense_for_scsi; - sd->reset = scsi_cdrom_reset; - sd->phase_data_out = scsi_cdrom_phase_data_out; - sd->command_stop = scsi_cdrom_command_stop; - sd->type = SCSI_REMOVABLE_CDROM; + sd->sc = (scsi_common_t *) dev; + sd->command = scsi_cdrom_command; + sd->request_sense = scsi_cdrom_request_sense_for_scsi; + sd->reset = scsi_cdrom_reset; + sd->phase_data_out = scsi_cdrom_phase_data_out; + sd->command_stop = scsi_cdrom_command_stop; + sd->type = SCSI_REMOVABLE_CDROM; - scsi_cdrom_log("SCSI CD-ROM drive %i attached to SCSI ID %i\n", c, cdrom[c].scsi_device_id); + scsi_cdrom_log("SCSI CD-ROM drive %i attached to SCSI ID %i\n", c, cdrom[c].scsi_device_id); } else if (drv->bus_type == CDROM_BUS_ATAPI) { - /* ATAPI CD-ROM, attach to the IDE bus. */ - id = ide_get_drive(drv->ide_channel); - /* If the IDE channel is initialized, we attach to it, - otherwise, we do nothing - it's going to be a drive - that's not attached to anything. */ - if (id) { - id->sc = (scsi_common_t *) dev; - id->get_max = scsi_cdrom_get_max; - id->get_timings = scsi_cdrom_get_timings; - id->identify = scsi_cdrom_identify; - id->stop = scsi_cdrom_stop; - id->packet_command = scsi_cdrom_command; - id->device_reset = scsi_cdrom_reset; - id->phase_data_out = scsi_cdrom_phase_data_out; - id->command_stop = scsi_cdrom_command_stop; - id->bus_master_error = scsi_cdrom_bus_master_error; - id->interrupt_drq = 0; + /* ATAPI CD-ROM, attach to the IDE bus. */ + id = ide_get_drive(drv->ide_channel); + /* If the IDE channel is initialized, we attach to it, + otherwise, we do nothing - it's going to be a drive + that's not attached to anything. */ + if (id) { + id->sc = (scsi_common_t *) dev; + id->get_max = scsi_cdrom_get_max; + id->get_timings = scsi_cdrom_get_timings; + id->identify = scsi_cdrom_identify; + id->stop = scsi_cdrom_stop; + id->packet_command = scsi_cdrom_command; + id->device_reset = scsi_cdrom_reset; + id->phase_data_out = scsi_cdrom_phase_data_out; + id->command_stop = scsi_cdrom_command_stop; + id->bus_master_error = scsi_cdrom_bus_master_error; + id->interrupt_drq = 0; - ide_atapi_attach(id); - } + ide_atapi_attach(id); + } - scsi_cdrom_log("ATAPI CD-ROM drive %i attached to IDE channel %i\n", c, cdrom[c].ide_channel); + scsi_cdrom_log("ATAPI CD-ROM drive %i attached to IDE channel %i\n", c, cdrom[c].ide_channel); } } diff --git a/src/scsi/scsi_device.c b/src/scsi/scsi_device.c index 09e44a914..ad87c7460 100644 --- a/src/scsi/scsi_device.c +++ b/src/scsi/scsi_device.c @@ -26,85 +26,76 @@ #include <86box/scsi.h> #include <86box/scsi_device.h> +scsi_device_t scsi_devices[SCSI_BUS_MAX][SCSI_ID_MAX]; -scsi_device_t scsi_devices[SCSI_BUS_MAX][SCSI_ID_MAX]; - -uint8_t scsi_null_device_sense[18] = { 0x70,0,SENSE_ILLEGAL_REQUEST,0,0,0,0,0,0,0,0,0,ASC_INV_LUN,0,0,0,0,0 }; - +uint8_t scsi_null_device_sense[18] = { 0x70, 0, SENSE_ILLEGAL_REQUEST, 0, 0, 0, 0, 0, 0, 0, 0, 0, ASC_INV_LUN, 0, 0, 0, 0, 0 }; static uint8_t scsi_device_target_command(scsi_device_t *dev, uint8_t *cdb) { if (dev->command) { - dev->command(dev->sc, cdb); + dev->command(dev->sc, cdb); - if (dev->sc->status & ERR_STAT) - return SCSI_STATUS_CHECK_CONDITION; - else - return SCSI_STATUS_OK; + if (dev->sc->status & ERR_STAT) + return SCSI_STATUS_CHECK_CONDITION; + else + return SCSI_STATUS_OK; } else - return SCSI_STATUS_CHECK_CONDITION; + return SCSI_STATUS_CHECK_CONDITION; } - double scsi_device_get_callback(scsi_device_t *dev) { if (dev->sc) - return dev->sc->callback; + return dev->sc->callback; else - return -1.0; + return -1.0; } - uint8_t * scsi_device_sense(scsi_device_t *dev) { if (dev->sc) - return dev->sc->sense; + return dev->sc->sense; else - return scsi_null_device_sense; + return scsi_null_device_sense; } - void scsi_device_request_sense(scsi_device_t *dev, uint8_t *buffer, uint8_t alloc_length) { if (dev->request_sense) - dev->request_sense(dev->sc, buffer, alloc_length); + dev->request_sense(dev->sc, buffer, alloc_length); else - memcpy(buffer, scsi_null_device_sense, alloc_length); + memcpy(buffer, scsi_null_device_sense, alloc_length); } - void scsi_device_reset(scsi_device_t *dev) { if (dev->reset) - dev->reset(dev->sc); + dev->reset(dev->sc); } - int scsi_device_present(scsi_device_t *dev) { if (dev->type == SCSI_NONE) - return 0; + return 0; else - return 1; + return 1; } - int scsi_device_valid(scsi_device_t *dev) { if (dev->sc) - return 1; + return 1; else - return 0; + return 0; } - int scsi_device_cdb_length(scsi_device_t *dev) { @@ -112,95 +103,89 @@ scsi_device_cdb_length(scsi_device_t *dev) return 12; } - void scsi_device_command_phase0(scsi_device_t *dev, uint8_t *cdb) { if (!dev->sc) { - dev->phase = SCSI_PHASE_STATUS; - dev->status = SCSI_STATUS_CHECK_CONDITION; - return; + dev->phase = SCSI_PHASE_STATUS; + dev->status = SCSI_STATUS_CHECK_CONDITION; + return; } /* Finally, execute the SCSI command immediately and get the transfer length. */ - dev->phase = SCSI_PHASE_COMMAND; + dev->phase = SCSI_PHASE_COMMAND; dev->status = scsi_device_target_command(dev, cdb); } - void scsi_device_command_stop(scsi_device_t *dev) { if (dev->command_stop) { - dev->command_stop(dev->sc); - dev->status = SCSI_STATUS_OK; + dev->command_stop(dev->sc); + dev->status = SCSI_STATUS_OK; } } - void scsi_device_command_phase1(scsi_device_t *dev) { if (!dev->sc) - return; + return; /* Call the second phase. */ if (dev->phase == SCSI_PHASE_DATA_OUT) { - if (dev->phase_data_out) - dev->phase_data_out(dev->sc); + if (dev->phase_data_out) + dev->phase_data_out(dev->sc); } else - scsi_device_command_stop(dev); + scsi_device_command_stop(dev); if (dev->sc->status & ERR_STAT) - dev->status = SCSI_STATUS_CHECK_CONDITION; + dev->status = SCSI_STATUS_CHECK_CONDITION; else - dev->status = SCSI_STATUS_OK; + dev->status = SCSI_STATUS_OK; } - /* When LUN is FF, there has been no IDENTIFY message, otherwise there has been one. */ void scsi_device_identify(scsi_device_t *dev, uint8_t lun) { if ((dev == NULL) || (dev->type == SCSI_NONE) || !dev->sc) - return; + return; dev->sc->cur_lun = lun; /* TODO: This should return a value, should IDENTIFY fail due to a - a LUN not supported by the target. */ + a LUN not supported by the target. */ } - void scsi_device_close_all(void) { - int i, j; + int i, j; scsi_device_t *dev; for (i = 0; i < SCSI_BUS_MAX; i++) { - for (j = 0; j < SCSI_ID_MAX; j++) { - dev = &(scsi_devices[i][j]); - if (dev->command_stop && dev->sc) - dev->command_stop(dev->sc); - } + for (j = 0; j < SCSI_ID_MAX; j++) { + dev = &(scsi_devices[i][j]); + if (dev->command_stop && dev->sc) + dev->command_stop(dev->sc); + } } } - void scsi_device_init(void) { - int i, j; + int i, j; scsi_device_t *dev; for (i = 0; i < SCSI_BUS_MAX; i++) { - for (j = 0; j < SCSI_ID_MAX; j++) { - dev = &(scsi_devices[i][j]); + for (j = 0; j < SCSI_ID_MAX; j++) { + dev = &(scsi_devices[i][j]); - memset(dev, 0, sizeof(scsi_device_t)); - dev->type = SCSI_NONE; - } + memset(dev, 0, sizeof(scsi_device_t)); + dev->type = SCSI_NONE; + } } } diff --git a/src/scsi/scsi_disk.c b/src/scsi/scsi_disk.c index 133c23997..ccf35a2c8 100644 --- a/src/scsi/scsi_disk.c +++ b/src/scsi/scsi_disk.c @@ -33,69 +33,67 @@ #include <86box/scsi_disk.h> #include <86box/version.h> - #define scsi_disk_sense_error dev->sense[0] -#define scsi_disk_sense_key dev->sense[2] -#define scsi_disk_asc dev->sense[12] -#define scsi_disk_ascq dev->sense[13] - +#define scsi_disk_sense_key dev->sense[2] +#define scsi_disk_asc dev->sense[12] +#define scsi_disk_ascq dev->sense[13] /* Table of all SCSI commands and their flags, needed for the new disc change / not ready handler. */ const uint8_t scsi_disk_command_flags[0x100] = { - IMPLEMENTED | CHECK_READY | NONDATA, /* 0x00 */ - IMPLEMENTED | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x01 */ + IMPLEMENTED | CHECK_READY | NONDATA, /* 0x00 */ + IMPLEMENTED | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x01 */ 0, - IMPLEMENTED | ALLOW_UA, /* 0x03 */ - IMPLEMENTED | CHECK_READY | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x04 */ + IMPLEMENTED | ALLOW_UA, /* 0x03 */ + IMPLEMENTED | CHECK_READY | ALLOW_UA | NONDATA | SCSI_ONLY, /* 0x04 */ 0, 0, 0, - IMPLEMENTED | CHECK_READY, /* 0x08 */ + IMPLEMENTED | CHECK_READY, /* 0x08 */ 0, - IMPLEMENTED | CHECK_READY, /* 0x0A */ - IMPLEMENTED | CHECK_READY | NONDATA, /* 0x0B */ + IMPLEMENTED | CHECK_READY, /* 0x0A */ + IMPLEMENTED | CHECK_READY | NONDATA, /* 0x0B */ 0, 0, 0, 0, 0, 0, - IMPLEMENTED | ALLOW_UA, /* 0x12 */ - IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x13 */ + IMPLEMENTED | ALLOW_UA, /* 0x12 */ + IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x13 */ 0, - IMPLEMENTED, /* 0x15 */ - IMPLEMENTED | SCSI_ONLY, /* 0x16 */ - IMPLEMENTED | SCSI_ONLY, /* 0x17 */ + IMPLEMENTED, /* 0x15 */ + IMPLEMENTED | SCSI_ONLY, /* 0x16 */ + IMPLEMENTED | SCSI_ONLY, /* 0x17 */ 0, 0, - IMPLEMENTED, /* 0x1A */ + IMPLEMENTED, /* 0x1A */ 0, 0, - IMPLEMENTED, /* 0x1D */ - IMPLEMENTED | CHECK_READY, /* 0x1E */ + IMPLEMENTED, /* 0x1D */ + IMPLEMENTED | CHECK_READY, /* 0x1E */ 0, 0, 0, 0, 0, 0, - IMPLEMENTED | CHECK_READY, /* 0x25 */ + IMPLEMENTED | CHECK_READY, /* 0x25 */ 0, 0, - IMPLEMENTED | CHECK_READY, /* 0x28 */ + IMPLEMENTED | CHECK_READY, /* 0x28 */ 0, - IMPLEMENTED | CHECK_READY, /* 0x2A */ - IMPLEMENTED | CHECK_READY | NONDATA, /* 0x2B */ + IMPLEMENTED | CHECK_READY, /* 0x2A */ + IMPLEMENTED | CHECK_READY | NONDATA, /* 0x2B */ 0, 0, - IMPLEMENTED | CHECK_READY, /* 0x2E */ - IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x2F */ + IMPLEMENTED | CHECK_READY, /* 0x2E */ + IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x2F */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - IMPLEMENTED | CHECK_READY, /* 0x41 */ + IMPLEMENTED | CHECK_READY, /* 0x41 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - IMPLEMENTED, /* 0x55 */ + IMPLEMENTED, /* 0x55 */ 0, 0, 0, 0, - IMPLEMENTED, /* 0x5A */ + IMPLEMENTED, /* 0x5A */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - IMPLEMENTED | CHECK_READY, /* 0xA8 */ + IMPLEMENTED | CHECK_READY, /* 0xA8 */ 0, - IMPLEMENTED | CHECK_READY, /* 0xAA */ + IMPLEMENTED | CHECK_READY, /* 0xAA */ 0, 0, 0, - IMPLEMENTED | CHECK_READY, /* 0xAE */ - IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0xAF */ + IMPLEMENTED | CHECK_READY, /* 0xAE */ + IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0xAF */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - IMPLEMENTED, /* 0xBD */ + IMPLEMENTED, /* 0xBD */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -103,51 +101,44 @@ const uint8_t scsi_disk_command_flags[0x100] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; - -uint64_t scsi_disk_mode_sense_page_flags = (GPMODEP_FORMAT_DEVICE_PAGE | - GPMODEP_RIGID_DISK_PAGE | - GPMODEP_UNK_VENDOR_PAGE | - GPMODEP_ALL_PAGES); +uint64_t scsi_disk_mode_sense_page_flags = (GPMODEP_FORMAT_DEVICE_PAGE | GPMODEP_RIGID_DISK_PAGE | GPMODEP_UNK_VENDOR_PAGE | GPMODEP_ALL_PAGES); /* This should be done in a better way but for time being, it's been done this way so it's not as huge and more readable. */ -static const mode_sense_pages_t scsi_disk_mode_sense_pages_default = -{ { [GPMODE_FORMAT_DEVICE_PAGE] = { GPMODE_FORMAT_DEVICE_PAGE, 0x16, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - [GPMODE_RIGID_DISK_PAGE ] = { GPMODE_RIGID_DISK_PAGE, 0x16, 0, 0x10, 0, 64, 0, 0, 0, 0, 0, 0, 0, 200, 0xff, 0xff, 0xff, 0, 0, 0, 0x15, 0x18, 0, 0 }, - [GPMODE_UNK_VENDOR_PAGE ] = { 0xB0, 0x16, '8', '6', 'B', 'o', 'x', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ' } -} }; - -static const mode_sense_pages_t scsi_disk_mode_sense_pages_changeable = -{ { [GPMODE_FORMAT_DEVICE_PAGE] = { GPMODE_FORMAT_DEVICE_PAGE, 0x16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - [GPMODE_RIGID_DISK_PAGE ] = { GPMODE_RIGID_DISK_PAGE, 0x16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - [GPMODE_UNK_VENDOR_PAGE ] = { 0xB0, 0x16, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF } -} }; +static const mode_sense_pages_t scsi_disk_mode_sense_pages_default = { + {[GPMODE_FORMAT_DEVICE_PAGE] = { GPMODE_FORMAT_DEVICE_PAGE, 0x16, 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + [GPMODE_RIGID_DISK_PAGE] = { GPMODE_RIGID_DISK_PAGE, 0x16, 0, 0x10, 0, 64, 0, 0, 0, 0, 0, 0, 0, 200, 0xff, 0xff, 0xff, 0, 0, 0, 0x15, 0x18, 0, 0 }, + [GPMODE_UNK_VENDOR_PAGE] = { 0xB0, 0x16, '8', '6', 'B', 'o', 'x', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ' }} +}; +static const mode_sense_pages_t scsi_disk_mode_sense_pages_changeable = { + {[GPMODE_FORMAT_DEVICE_PAGE] = { GPMODE_FORMAT_DEVICE_PAGE, 0x16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + [GPMODE_RIGID_DISK_PAGE] = { GPMODE_RIGID_DISK_PAGE, 0x16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + [GPMODE_UNK_VENDOR_PAGE] = { 0xB0, 0x16, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }} +}; #ifdef ENABLE_SCSI_DISK_LOG int scsi_disk_do_log = ENABLE_SCSI_DISK_LOG; - static void scsi_disk_log(const char *fmt, ...) { va_list ap; if (scsi_disk_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define scsi_disk_log(fmt, ...) +# define scsi_disk_log(fmt, ...) #endif - void scsi_disk_mode_sense_load(scsi_disk_t *dev) { FILE *f; - char file_name[512]; + char file_name[512]; memset(&dev->ms_pages_saved, 0, sizeof(mode_sense_pages_t)); memcpy(&dev->ms_pages_saved, &scsi_disk_mode_sense_pages_default, sizeof(mode_sense_pages_t)); @@ -156,91 +147,93 @@ scsi_disk_mode_sense_load(scsi_disk_t *dev) sprintf(file_name, "scsi_disk_%02i_mode_sense.bin", dev->id); f = plat_fopen(nvr_path(file_name), "rb"); if (f) { - if (fread(dev->ms_pages_saved.pages[0x30], 1, 0x18, f) != 0x18) - fatal("scsi_disk_mode_sense_load(): Error reading data\n"); - fclose(f); + if (fread(dev->ms_pages_saved.pages[0x30], 1, 0x18, f) != 0x18) + fatal("scsi_disk_mode_sense_load(): Error reading data\n"); + fclose(f); } } - void scsi_disk_mode_sense_save(scsi_disk_t *dev) { FILE *f; - char file_name[512]; + char file_name[512]; memset(file_name, 0, 512); sprintf(file_name, "scsi_disk_%02i_mode_sense.bin", dev->id); f = plat_fopen(nvr_path(file_name), "wb"); if (f) { - fwrite(dev->ms_pages_saved.pages[0x30], 1, 0x18, f); - fclose(f); + fwrite(dev->ms_pages_saved.pages[0x30], 1, 0x18, f); + fclose(f); } } - /*SCSI Mode Sense 6/10*/ uint8_t scsi_disk_mode_sense_read(scsi_disk_t *dev, uint8_t page_control, uint8_t page, uint8_t pos) { if (page_control == 1) - return scsi_disk_mode_sense_pages_changeable.pages[page][pos]; + return scsi_disk_mode_sense_pages_changeable.pages[page][pos]; - if (page == GPMODE_RIGID_DISK_PAGE) switch (page_control) { - /* Rigid disk geometry page. */ - case 0: - case 2: - case 3: - switch(pos) { - case 0: - case 1: - default: - return scsi_disk_mode_sense_pages_default.pages[page][pos]; - case 2: - case 6: - case 9: - return (dev->drv->tracks >> 16) & 0xff; - case 3: - case 7: - case 10: - return (dev->drv->tracks >> 8) & 0xff; - case 4: - case 8: - case 11: - return dev->drv->tracks & 0xff; - case 5: - return dev->drv->hpc & 0xff; - } - break; - } else if (page == GPMODE_FORMAT_DEVICE_PAGE) switch (page_control) { - /* Format device page. */ - case 0: - case 2: - case 3: - switch(pos) { - case 0: - case 1: - default: - return scsi_disk_mode_sense_pages_default.pages[page][pos]; - /* Actual sectors + the 1 "alternate sector" we report. */ - case 10: - return ((dev->drv->spt + 1) >> 8) & 0xff; - case 11: - return (dev->drv->spt + 1) & 0xff; - } - break; - } else switch (page_control) { - case 0: - case 3: - return dev->ms_pages_saved.pages[page][pos]; - case 2: - return scsi_disk_mode_sense_pages_default.pages[page][pos]; - } + if (page == GPMODE_RIGID_DISK_PAGE) + switch (page_control) { + /* Rigid disk geometry page. */ + case 0: + case 2: + case 3: + switch (pos) { + case 0: + case 1: + default: + return scsi_disk_mode_sense_pages_default.pages[page][pos]; + case 2: + case 6: + case 9: + return (dev->drv->tracks >> 16) & 0xff; + case 3: + case 7: + case 10: + return (dev->drv->tracks >> 8) & 0xff; + case 4: + case 8: + case 11: + return dev->drv->tracks & 0xff; + case 5: + return dev->drv->hpc & 0xff; + } + break; + } + else if (page == GPMODE_FORMAT_DEVICE_PAGE) + switch (page_control) { + /* Format device page. */ + case 0: + case 2: + case 3: + switch (pos) { + case 0: + case 1: + default: + return scsi_disk_mode_sense_pages_default.pages[page][pos]; + /* Actual sectors + the 1 "alternate sector" we report. */ + case 10: + return ((dev->drv->spt + 1) >> 8) & 0xff; + case 11: + return (dev->drv->spt + 1) & 0xff; + } + break; + } + else + switch (page_control) { + case 0: + case 3: + return dev->ms_pages_saved.pages[page][pos]; + case 2: + return scsi_disk_mode_sense_pages_default.pages[page][pos]; + } return 0; } - uint32_t scsi_disk_mode_sense(scsi_disk_t *dev, uint8_t *buf, uint32_t pos, uint8_t page, uint8_t block_descriptor_len) { @@ -254,45 +247,43 @@ scsi_disk_mode_sense(scsi_disk_t *dev, uint8_t *buf, uint32_t pos, uint8_t page, size = hdd_image_get_last_sector(dev->id); if (block_descriptor_len) { - buf[pos++] = 1; /* Density code. */ - buf[pos++] = (size >> 16) & 0xff; /* Number of blocks (0 = all). */ - buf[pos++] = (size >> 8) & 0xff; - buf[pos++] = size & 0xff; - buf[pos++] = 0; /* Reserved. */ - buf[pos++] = 0; /* Block length (0x200 = 512 bytes). */ - buf[pos++] = 2; - buf[pos++] = 0; + buf[pos++] = 1; /* Density code. */ + buf[pos++] = (size >> 16) & 0xff; /* Number of blocks (0 = all). */ + buf[pos++] = (size >> 8) & 0xff; + buf[pos++] = size & 0xff; + buf[pos++] = 0; /* Reserved. */ + buf[pos++] = 0; /* Block length (0x200 = 512 bytes). */ + buf[pos++] = 2; + buf[pos++] = 0; } for (i = 0; i < 0x40; i++) { if ((page == GPMODE_ALL_PAGES) || (page == i)) { - if (scsi_disk_mode_sense_page_flags & (1LL << (uint64_t) page)) { - buf[pos++] = scsi_disk_mode_sense_read(dev, page_control, i, 0); - msplen = scsi_disk_mode_sense_read(dev, page_control, i, 1); - buf[pos++] = msplen; - scsi_disk_log("SCSI HDD %i: MODE SENSE: Page [%02X] length %i\n", dev->id, i, msplen); - for (j = 0; j < msplen; j++) - buf[pos++] = scsi_disk_mode_sense_read(dev, page_control, i, 2 + j); - } - } + if (scsi_disk_mode_sense_page_flags & (1LL << (uint64_t) page)) { + buf[pos++] = scsi_disk_mode_sense_read(dev, page_control, i, 0); + msplen = scsi_disk_mode_sense_read(dev, page_control, i, 1); + buf[pos++] = msplen; + scsi_disk_log("SCSI HDD %i: MODE SENSE: Page [%02X] length %i\n", dev->id, i, msplen); + for (j = 0; j < msplen; j++) + buf[pos++] = scsi_disk_mode_sense_read(dev, page_control, i, 2 + j); + } + } } return pos; } - static void scsi_disk_command_common(scsi_disk_t *dev) { dev->status = BUSY_STAT; - dev->phase = 1; + dev->phase = 1; if (dev->packet_status == PHASE_COMPLETE) - dev->callback = 0.0; + dev->callback = 0.0; else - dev->callback = -1.0; /* Speed depends on SCSI controller */ + dev->callback = -1.0; /* Speed depends on SCSI controller */ } - static void scsi_disk_command_complete(scsi_disk_t *dev) { @@ -301,7 +292,6 @@ scsi_disk_command_complete(scsi_disk_t *dev) scsi_disk_command_common(dev); } - static void scsi_disk_command_read_dma(scsi_disk_t *dev) { @@ -309,7 +299,6 @@ scsi_disk_command_read_dma(scsi_disk_t *dev) scsi_disk_command_common(dev); } - static void scsi_disk_command_write_dma(scsi_disk_t *dev) { @@ -317,151 +306,139 @@ scsi_disk_command_write_dma(scsi_disk_t *dev) scsi_disk_command_common(dev); } - static void scsi_disk_data_command_finish(scsi_disk_t *dev, int len, int block_len, int alloc_len, int direction) { scsi_disk_log("SCSI HD %i: Finishing command (%02X): %i, %i, %i, %i, %i\n", dev->id, - dev->current_cdb[0], len, block_len, alloc_len, direction, dev->request_length); + dev->current_cdb[0], len, block_len, alloc_len, direction, dev->request_length); if (alloc_len >= 0) { - if (alloc_len < len) - len = alloc_len; + if (alloc_len < len) + len = alloc_len; } if (len == 0) - scsi_disk_command_complete(dev); + scsi_disk_command_complete(dev); else { - if (direction == 0) - scsi_disk_command_read_dma(dev); - else - scsi_disk_command_write_dma(dev); + if (direction == 0) + scsi_disk_command_read_dma(dev); + else + scsi_disk_command_write_dma(dev); } } - static void scsi_disk_sense_clear(scsi_disk_t *dev, int command) { scsi_disk_sense_key = scsi_disk_asc = scsi_disk_ascq = 0; } - static void scsi_disk_set_phase(scsi_disk_t *dev, uint8_t phase) { uint8_t scsi_bus = (dev->drv->scsi_id >> 4) & 0x0f; - uint8_t scsi_id = dev->drv->scsi_id & 0x0f; + uint8_t scsi_id = dev->drv->scsi_id & 0x0f; if (dev->drv->bus != HDD_BUS_SCSI) - return; + return; scsi_devices[scsi_bus][scsi_id].phase = phase; } - static void scsi_disk_cmd_error(scsi_disk_t *dev) { scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); - dev->error = ((scsi_disk_sense_key & 0xf) << 4) | ABRT_ERR; - dev->status = READY_STAT | ERR_STAT; - dev->phase = 3; + dev->error = ((scsi_disk_sense_key & 0xf) << 4) | ABRT_ERR; + dev->status = READY_STAT | ERR_STAT; + dev->phase = 3; dev->packet_status = PHASE_ERROR; - dev->callback = 50.0 * SCSI_TIME; + dev->callback = 50.0 * SCSI_TIME; ui_sb_update_icon(SB_HDD | dev->drv->bus, 0); scsi_disk_log("SCSI HD %i: ERROR: %02X/%02X/%02X\n", dev->id, scsi_disk_sense_key, scsi_disk_asc, scsi_disk_ascq); } - static void scsi_disk_invalid_lun(scsi_disk_t *dev) { scsi_disk_sense_key = SENSE_ILLEGAL_REQUEST; - scsi_disk_asc = ASC_INV_LUN; - scsi_disk_ascq = 0; + scsi_disk_asc = ASC_INV_LUN; + scsi_disk_ascq = 0; scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); scsi_disk_cmd_error(dev); } - static void scsi_disk_illegal_opcode(scsi_disk_t *dev) { scsi_disk_sense_key = SENSE_ILLEGAL_REQUEST; - scsi_disk_asc = ASC_ILLEGAL_OPCODE; - scsi_disk_ascq = 0; + scsi_disk_asc = ASC_ILLEGAL_OPCODE; + scsi_disk_ascq = 0; scsi_disk_cmd_error(dev); } - static void scsi_disk_lba_out_of_range(scsi_disk_t *dev) { scsi_disk_sense_key = SENSE_ILLEGAL_REQUEST; - scsi_disk_asc = ASC_LBA_OUT_OF_RANGE; - scsi_disk_ascq = 0; + scsi_disk_asc = ASC_LBA_OUT_OF_RANGE; + scsi_disk_ascq = 0; scsi_disk_cmd_error(dev); } - static void scsi_disk_invalid_field(scsi_disk_t *dev) { scsi_disk_sense_key = SENSE_ILLEGAL_REQUEST; - scsi_disk_asc = ASC_INV_FIELD_IN_CMD_PACKET; - scsi_disk_ascq = 0; + scsi_disk_asc = ASC_INV_FIELD_IN_CMD_PACKET; + scsi_disk_ascq = 0; scsi_disk_cmd_error(dev); dev->status = 0x53; } - static void scsi_disk_invalid_field_pl(scsi_disk_t *dev) { scsi_disk_sense_key = SENSE_ILLEGAL_REQUEST; - scsi_disk_asc = ASC_INV_FIELD_IN_PARAMETER_LIST; - scsi_disk_ascq = 0; + scsi_disk_asc = ASC_INV_FIELD_IN_PARAMETER_LIST; + scsi_disk_ascq = 0; scsi_disk_cmd_error(dev); dev->status = 0x53; } - static void scsi_disk_data_phase_error(scsi_disk_t *dev) { scsi_disk_sense_key = SENSE_ILLEGAL_REQUEST; - scsi_disk_asc = ASC_DATA_PHASE_ERROR; - scsi_disk_ascq = 0; + scsi_disk_asc = ASC_DATA_PHASE_ERROR; + scsi_disk_ascq = 0; scsi_disk_cmd_error(dev); } - static int scsi_disk_pre_execution_check(scsi_disk_t *dev, uint8_t *cdb) { if ((cdb[0] != GPCMD_REQUEST_SENSE) && (dev->cur_lun == SCSI_LUN_USE_CDB) && (cdb[1] & 0xe0)) { - scsi_disk_log("SCSI HD %i: Attempting to execute a unknown command targeted at SCSI LUN %i\n", - dev->id, ((dev->request_length >> 5) & 7)); - scsi_disk_invalid_lun(dev); - return 0; + scsi_disk_log("SCSI HD %i: Attempting to execute a unknown command targeted at SCSI LUN %i\n", + dev->id, ((dev->request_length >> 5) & 7)); + scsi_disk_invalid_lun(dev); + return 0; } if (!(scsi_disk_command_flags[cdb[0]] & IMPLEMENTED)) { - scsi_disk_log("SCSI HD %i: Attempting to execute unknown command %02X\n", dev->id, cdb[0]); - scsi_disk_illegal_opcode(dev); - return 0; + scsi_disk_log("SCSI HD %i: Attempting to execute unknown command %02X\n", dev->id, cdb[0]); + scsi_disk_illegal_opcode(dev); + return 0; } /* Unless the command is REQUEST SENSE, clear the sense. This will *NOT* the UNIT ATTENTION condition if it's set. */ if (cdb[0] != GPCMD_REQUEST_SENSE) - scsi_disk_sense_clear(dev, cdb[0]); + scsi_disk_sense_clear(dev, cdb[0]); scsi_disk_log("SCSI HD %i: Continuing with command\n", dev->id); return 1; } - static void scsi_disk_seek(scsi_disk_t *dev, uint32_t pos) { @@ -469,46 +446,43 @@ scsi_disk_seek(scsi_disk_t *dev, uint32_t pos) hdd_image_seek(dev->id, pos); } - static void scsi_disk_rezero(scsi_disk_t *dev) { if (dev->id == 0xff) - return; + return; dev->sector_pos = dev->sector_len = 0; scsi_disk_seek(dev, 0); } - static void scsi_disk_reset(scsi_common_t *sc) { scsi_disk_t *dev = (scsi_disk_t *) sc; scsi_disk_rezero(dev); - dev->status = 0; - dev->callback = 0.0; + dev->status = 0; + dev->callback = 0.0; dev->packet_status = PHASE_NONE; - dev->cur_lun = SCSI_LUN_USE_CDB; + dev->cur_lun = SCSI_LUN_USE_CDB; } - void scsi_disk_request_sense(scsi_disk_t *dev, uint8_t *buffer, uint8_t alloc_length, int desc) { /*Will return 18 bytes of 0*/ if (alloc_length != 0) { - memset(buffer, 0, alloc_length); - if (!desc) - memcpy(buffer, dev->sense, alloc_length); - else { - buffer[1] = scsi_disk_sense_key; - buffer[2] = scsi_disk_asc; - buffer[3] = scsi_disk_ascq; - } + memset(buffer, 0, alloc_length); + if (!desc) + memcpy(buffer, dev->sense, alloc_length); + else { + buffer[1] = scsi_disk_sense_key; + buffer[2] = scsi_disk_asc; + buffer[3] = scsi_disk_ascq; + } } else - return; + return; buffer[0] = 0x70; @@ -518,7 +492,6 @@ scsi_disk_request_sense(scsi_disk_t *dev, uint8_t *buffer, uint8_t alloc_length, scsi_disk_sense_clear(dev, GPCMD_REQUEST_SENSE); } - static void scsi_disk_request_sense_for_scsi(scsi_common_t *sc, uint8_t *buffer, uint8_t alloc_length) { @@ -527,55 +500,51 @@ scsi_disk_request_sense_for_scsi(scsi_common_t *sc, uint8_t *buffer, uint8_t all scsi_disk_request_sense(dev, buffer, alloc_length, 0); } - static void scsi_disk_set_buf_len(scsi_disk_t *dev, int32_t *BufLen, int32_t *src_len) { if (*BufLen == -1) - *BufLen = *src_len; + *BufLen = *src_len; else { - *BufLen = MIN(*src_len, *BufLen); - *src_len = *BufLen; + *BufLen = MIN(*src_len, *BufLen); + *src_len = *BufLen; } scsi_disk_log("SCSI HD %i: Actual transfer length: %i\n", dev->id, *BufLen); } - static void scsi_disk_buf_alloc(scsi_disk_t *dev, uint32_t len) { scsi_disk_log("SCSI HD %i: Allocated buffer length: %i\n", dev->id, len); if (!dev->temp_buffer) - dev->temp_buffer = (uint8_t *) malloc(len); + dev->temp_buffer = (uint8_t *) malloc(len); } - static void scsi_disk_buf_free(scsi_disk_t *dev) { if (dev->temp_buffer) { - scsi_disk_log("SCSI HD %i: Freeing buffer...\n", dev->id); - free(dev->temp_buffer); - dev->temp_buffer = NULL; + scsi_disk_log("SCSI HD %i: Freeing buffer...\n", dev->id); + free(dev->temp_buffer); + dev->temp_buffer = NULL; } } - static void scsi_disk_command(scsi_common_t *sc, uint8_t *cdb) { scsi_disk_t *dev = (scsi_disk_t *) sc; - int32_t *BufLen; - int32_t len, max_len, alloc_length; - int pos = 0; - int idx = 0; - unsigned size_idx, preamble_len; - uint32_t last_sector = 0; - char device_identify[9] = { '8', '6', 'B', '_', 'H', 'D', '0', '0', 0 }; - char device_identify_ex[15] = { '8', '6', 'B', '_', 'H', 'D', '0', '0', ' ', 'v', '1', '.', '0', '0', 0 }; - int block_desc = 0; - uint8_t scsi_bus = (dev->drv->scsi_id >> 4) & 0x0f; - uint8_t scsi_id = dev->drv->scsi_id & 0x0f; + int32_t *BufLen; + int32_t len, max_len, alloc_length; + int pos = 0; + int idx = 0; + unsigned size_idx, preamble_len; + uint32_t last_sector = 0; + char device_identify[9] = { '8', '6', 'B', '_', 'H', 'D', '0', '0', 0 }; + char device_identify_ex[15] = { '8', '6', 'B', '_', 'H', 'D', '0', '0', ' ', 'v', '1', '.', '0', '0', 0 }; + int block_desc = 0; + uint8_t scsi_bus = (dev->drv->scsi_id >> 4) & 0x0f; + uint8_t scsi_id = dev->drv->scsi_id & 0x0f; BufLen = &scsi_devices[scsi_bus][scsi_id].buffer_length; @@ -587,8 +556,8 @@ scsi_disk_command(scsi_common_t *sc, uint8_t *cdb) device_identify[6] = (dev->id / 10) + 0x30; device_identify[7] = (dev->id % 10) + 0x30; - device_identify_ex[6] = (dev->id / 10) + 0x30; - device_identify_ex[7] = (dev->id % 10) + 0x30; + device_identify_ex[6] = (dev->id / 10) + 0x30; + device_identify_ex[7] = (dev->id % 10) + 0x30; device_identify_ex[10] = EMU_VERSION_EX[0]; device_identify_ex[12] = EMU_VERSION_EX[2]; device_identify_ex[13] = EMU_VERSION_EX[3]; @@ -596,13 +565,13 @@ scsi_disk_command(scsi_common_t *sc, uint8_t *cdb) memcpy(dev->current_cdb, cdb, 12); if (cdb[0] != 0) { - scsi_disk_log("SCSI HD %i: Command 0x%02X, Sense Key %02X, Asc %02X, Ascq %02X\n", - dev->id, cdb[0], scsi_disk_sense_key, scsi_disk_asc, scsi_disk_ascq); - scsi_disk_log("SCSI HD %i: Request length: %04X\n", dev->id, dev->request_length); + scsi_disk_log("SCSI HD %i: Command 0x%02X, Sense Key %02X, Asc %02X, Ascq %02X\n", + dev->id, cdb[0], scsi_disk_sense_key, scsi_disk_asc, scsi_disk_ascq); + scsi_disk_log("SCSI HD %i: Request length: %04X\n", dev->id, dev->request_length); - scsi_disk_log("SCSI HD %i: CDB: %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", dev->id, - cdb[0], cdb[1], cdb[2], cdb[3], cdb[4], cdb[5], cdb[6], cdb[7], - cdb[8], cdb[9], cdb[10], cdb[11]); + scsi_disk_log("SCSI HD %i: CDB: %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n", dev->id, + cdb[0], cdb[1], cdb[2], cdb[3], cdb[4], cdb[5], cdb[6], cdb[7], + cdb[8], cdb[9], cdb[10], cdb[11]); } dev->sector_len = 0; @@ -611,458 +580,458 @@ scsi_disk_command(scsi_common_t *sc, uint8_t *cdb) /* This handles the Not Ready/Unit Attention check if it has to be handled at this point. */ if (scsi_disk_pre_execution_check(dev, cdb) == 0) - return; + return; switch (cdb[0]) { - case GPCMD_SEND_DIAGNOSTIC: - if (!(cdb[1] & (1 << 2))) { - scsi_disk_invalid_field(dev); - return; - } - /*FALLTHROUGH*/ - case GPCMD_SCSI_RESERVE: - case GPCMD_SCSI_RELEASE: - case GPCMD_TEST_UNIT_READY: - case GPCMD_FORMAT_UNIT: - scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); - scsi_disk_command_complete(dev); - break; + case GPCMD_SEND_DIAGNOSTIC: + if (!(cdb[1] & (1 << 2))) { + scsi_disk_invalid_field(dev); + return; + } + /*FALLTHROUGH*/ + case GPCMD_SCSI_RESERVE: + case GPCMD_SCSI_RELEASE: + case GPCMD_TEST_UNIT_READY: + case GPCMD_FORMAT_UNIT: + scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); + scsi_disk_command_complete(dev); + break; - case GPCMD_REZERO_UNIT: - dev->sector_pos = dev->sector_len = 0; - scsi_disk_seek(dev, 0); - scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); - break; + case GPCMD_REZERO_UNIT: + dev->sector_pos = dev->sector_len = 0; + scsi_disk_seek(dev, 0); + scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); + break; - case GPCMD_REQUEST_SENSE: - /* If there's a unit attention condition and there's a buffered not ready, a standalone REQUEST SENSE - should forget about the not ready, and report unit attention straight away. */ - len = cdb[4]; + case GPCMD_REQUEST_SENSE: + /* If there's a unit attention condition and there's a buffered not ready, a standalone REQUEST SENSE + should forget about the not ready, and report unit attention straight away. */ + len = cdb[4]; - if (!len) { - scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * SCSI_TIME; - break; - } + if (!len) { + scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * SCSI_TIME; + break; + } - scsi_disk_buf_alloc(dev, 256); - scsi_disk_set_buf_len(dev, BufLen, &len); + scsi_disk_buf_alloc(dev, 256); + scsi_disk_set_buf_len(dev, BufLen, &len); - if (*BufLen < cdb[4]) - cdb[4] = *BufLen; + if (*BufLen < cdb[4]) + cdb[4] = *BufLen; - len = (cdb[1] & 1) ? 8 : 18; + len = (cdb[1] & 1) ? 8 : 18; - scsi_disk_request_sense(dev, dev->temp_buffer, *BufLen, cdb[1] & 1); - scsi_disk_set_phase(dev, SCSI_PHASE_DATA_IN); - scsi_disk_data_command_finish(dev, len, len, cdb[4], 0); - break; + scsi_disk_request_sense(dev, dev->temp_buffer, *BufLen, cdb[1] & 1); + scsi_disk_set_phase(dev, SCSI_PHASE_DATA_IN); + scsi_disk_data_command_finish(dev, len, len, cdb[4], 0); + break; - case GPCMD_MECHANISM_STATUS: - scsi_disk_set_phase(dev, SCSI_PHASE_DATA_IN); - len = (cdb[8] << 8) | cdb[9]; + case GPCMD_MECHANISM_STATUS: + scsi_disk_set_phase(dev, SCSI_PHASE_DATA_IN); + len = (cdb[8] << 8) | cdb[9]; - scsi_disk_buf_alloc(dev, 8); - scsi_disk_set_buf_len(dev, BufLen, &len); + scsi_disk_buf_alloc(dev, 8); + scsi_disk_set_buf_len(dev, BufLen, &len); - memset(dev->temp_buffer, 0, 8); - dev->temp_buffer[5] = 1; + memset(dev->temp_buffer, 0, 8); + dev->temp_buffer[5] = 1; - scsi_disk_data_command_finish(dev, 8, 8, len, 0); - break; + scsi_disk_data_command_finish(dev, 8, 8, len, 0); + break; - case GPCMD_READ_6: - case GPCMD_READ_10: - case GPCMD_READ_12: - switch(cdb[0]) { - case GPCMD_READ_6: - dev->sector_len = cdb[4]; - if (dev->sector_len == 0) - dev->sector_len = 256; /* For READ (6) and WRITE (6), a length of 0 indicates a transfer of 256 sector. */ - dev->sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]); - break; - case GPCMD_READ_10: - dev->sector_len = (cdb[7] << 8) | cdb[8]; - dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - break; - case GPCMD_READ_12: - dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); - dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); - break; - } + case GPCMD_READ_6: + case GPCMD_READ_10: + case GPCMD_READ_12: + switch (cdb[0]) { + case GPCMD_READ_6: + dev->sector_len = cdb[4]; + if (dev->sector_len == 0) + dev->sector_len = 256; /* For READ (6) and WRITE (6), a length of 0 indicates a transfer of 256 sector. */ + dev->sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]); + break; + case GPCMD_READ_10: + dev->sector_len = (cdb[7] << 8) | cdb[8]; + dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + break; + case GPCMD_READ_12: + dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); + dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); + break; + } - if ((dev->sector_pos > last_sector)/* || ((dev->sector_pos + dev->sector_len - 1) > last_sector)*/) { - scsi_disk_lba_out_of_range(dev); - return; - } + if ((dev->sector_pos > last_sector) /* || ((dev->sector_pos + dev->sector_len - 1) > last_sector)*/) { + scsi_disk_lba_out_of_range(dev); + return; + } - if ((!dev->sector_len) || (*BufLen == 0)) { - scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); - scsi_disk_log("SCSI HD %i: All done - callback set\n", dev); - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * SCSI_TIME; - break; - } + if ((!dev->sector_len) || (*BufLen == 0)) { + scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); + scsi_disk_log("SCSI HD %i: All done - callback set\n", dev); + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * SCSI_TIME; + break; + } - max_len = dev->sector_len; - dev->requested_blocks = max_len; + max_len = dev->sector_len; + dev->requested_blocks = max_len; - alloc_length = dev->packet_len = max_len << 9; - scsi_disk_buf_alloc(dev, dev->packet_len); - scsi_disk_set_buf_len(dev, BufLen, &alloc_length); - scsi_disk_set_phase(dev, SCSI_PHASE_DATA_IN); + alloc_length = dev->packet_len = max_len << 9; + scsi_disk_buf_alloc(dev, dev->packet_len); + scsi_disk_set_buf_len(dev, BufLen, &alloc_length); + scsi_disk_set_phase(dev, SCSI_PHASE_DATA_IN); - if ((dev->requested_blocks > 0) && (*BufLen > 0)) { - if (dev->packet_len > (uint32_t) *BufLen) - hdd_image_read(dev->id, dev->sector_pos, *BufLen >> 9, dev->temp_buffer); - else - hdd_image_read(dev->id, dev->sector_pos, dev->requested_blocks, dev->temp_buffer); - } + if ((dev->requested_blocks > 0) && (*BufLen > 0)) { + if (dev->packet_len > (uint32_t) *BufLen) + hdd_image_read(dev->id, dev->sector_pos, *BufLen >> 9, dev->temp_buffer); + else + hdd_image_read(dev->id, dev->sector_pos, dev->requested_blocks, dev->temp_buffer); + } - if (dev->requested_blocks > 1) - scsi_disk_data_command_finish(dev, alloc_length, alloc_length / dev->requested_blocks, alloc_length, 0); - else - scsi_disk_data_command_finish(dev, alloc_length, alloc_length, alloc_length, 0); + if (dev->requested_blocks > 1) + scsi_disk_data_command_finish(dev, alloc_length, alloc_length / dev->requested_blocks, alloc_length, 0); + else + scsi_disk_data_command_finish(dev, alloc_length, alloc_length, alloc_length, 0); - if (dev->packet_status != PHASE_COMPLETE) - ui_sb_update_icon(SB_HDD | dev->drv->bus, 1); - else - ui_sb_update_icon(SB_HDD | dev->drv->bus, 0); - return; + if (dev->packet_status != PHASE_COMPLETE) + ui_sb_update_icon(SB_HDD | dev->drv->bus, 1); + else + ui_sb_update_icon(SB_HDD | dev->drv->bus, 0); + return; - case GPCMD_VERIFY_6: - case GPCMD_VERIFY_10: - case GPCMD_VERIFY_12: - if (!(cdb[1] & 2)) { - scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); - scsi_disk_command_complete(dev); - break; - } - case GPCMD_WRITE_6: - case GPCMD_WRITE_10: - case GPCMD_WRITE_AND_VERIFY_10: - case GPCMD_WRITE_12: - case GPCMD_WRITE_AND_VERIFY_12: - switch(cdb[0]) - { - case GPCMD_VERIFY_6: - case GPCMD_WRITE_6: - dev->sector_len = cdb[4]; - if (dev->sector_len == 0) - dev->sector_len = 256; /* For READ (6) and WRITE (6), a length of 0 indicates a transfer of 256 sector. */ - dev->sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]); - scsi_disk_log("SCSI HD %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); - break; - case GPCMD_VERIFY_10: - case GPCMD_WRITE_10: - case GPCMD_WRITE_AND_VERIFY_10: - dev->sector_len = (cdb[7] << 8) | cdb[8]; - dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - scsi_disk_log("SCSI HD %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); - break; - case GPCMD_VERIFY_12: - case GPCMD_WRITE_12: - case GPCMD_WRITE_AND_VERIFY_12: - dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); - dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); - break; - } + case GPCMD_VERIFY_6: + case GPCMD_VERIFY_10: + case GPCMD_VERIFY_12: + if (!(cdb[1] & 2)) { + scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); + scsi_disk_command_complete(dev); + break; + } + case GPCMD_WRITE_6: + case GPCMD_WRITE_10: + case GPCMD_WRITE_AND_VERIFY_10: + case GPCMD_WRITE_12: + case GPCMD_WRITE_AND_VERIFY_12: + switch (cdb[0]) { + case GPCMD_VERIFY_6: + case GPCMD_WRITE_6: + dev->sector_len = cdb[4]; + if (dev->sector_len == 0) + dev->sector_len = 256; /* For READ (6) and WRITE (6), a length of 0 indicates a transfer of 256 sector. */ + dev->sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]); + scsi_disk_log("SCSI HD %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); + break; + case GPCMD_VERIFY_10: + case GPCMD_WRITE_10: + case GPCMD_WRITE_AND_VERIFY_10: + dev->sector_len = (cdb[7] << 8) | cdb[8]; + dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + scsi_disk_log("SCSI HD %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); + break; + case GPCMD_VERIFY_12: + case GPCMD_WRITE_12: + case GPCMD_WRITE_AND_VERIFY_12: + dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); + dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); + break; + } - if ((dev->sector_pos > last_sector)/* || - ((dev->sector_pos + dev->sector_len - 1) > last_sector)*/) { - scsi_disk_lba_out_of_range(dev); - return; - } + if ((dev->sector_pos > last_sector) /* || + ((dev->sector_pos + dev->sector_len - 1) > last_sector)*/ + ) { + scsi_disk_lba_out_of_range(dev); + return; + } - if ((!dev->sector_len) || (*BufLen == 0)) { - scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); - scsi_disk_log("SCSI HD %i: All done - callback set\n", dev->id); - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * SCSI_TIME; - break; - } + if ((!dev->sector_len) || (*BufLen == 0)) { + scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); + scsi_disk_log("SCSI HD %i: All done - callback set\n", dev->id); + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * SCSI_TIME; + break; + } - max_len = dev->sector_len; - dev->requested_blocks = max_len; + max_len = dev->sector_len; + dev->requested_blocks = max_len; - alloc_length = dev->packet_len = max_len << 9; - scsi_disk_buf_alloc(dev, dev->packet_len); + alloc_length = dev->packet_len = max_len << 9; + scsi_disk_buf_alloc(dev, dev->packet_len); - scsi_disk_set_buf_len(dev, BufLen, &alloc_length); - scsi_disk_set_phase(dev, SCSI_PHASE_DATA_OUT); + scsi_disk_set_buf_len(dev, BufLen, &alloc_length); + scsi_disk_set_phase(dev, SCSI_PHASE_DATA_OUT); - if (dev->requested_blocks > 1) - scsi_disk_data_command_finish(dev, alloc_length, alloc_length / dev->requested_blocks, alloc_length, 1); - else - scsi_disk_data_command_finish(dev, alloc_length, alloc_length, alloc_length, 1); + if (dev->requested_blocks > 1) + scsi_disk_data_command_finish(dev, alloc_length, alloc_length / dev->requested_blocks, alloc_length, 1); + else + scsi_disk_data_command_finish(dev, alloc_length, alloc_length, alloc_length, 1); - if (dev->packet_status != PHASE_COMPLETE) - ui_sb_update_icon(SB_HDD | dev->drv->bus, 1); - else - ui_sb_update_icon(SB_HDD | dev->drv->bus, 0); - return; + if (dev->packet_status != PHASE_COMPLETE) + ui_sb_update_icon(SB_HDD | dev->drv->bus, 1); + else + ui_sb_update_icon(SB_HDD | dev->drv->bus, 0); + return; - case GPCMD_WRITE_SAME_10: - scsi_disk_set_phase(dev, SCSI_PHASE_DATA_OUT); - alloc_length = 512; + case GPCMD_WRITE_SAME_10: + scsi_disk_set_phase(dev, SCSI_PHASE_DATA_OUT); + alloc_length = 512; - if ((cdb[1] & 6) == 6) { - scsi_disk_invalid_field(dev); - return; - } + if ((cdb[1] & 6) == 6) { + scsi_disk_invalid_field(dev); + return; + } - dev->sector_len = (cdb[7] << 8) | cdb[8]; - dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + dev->sector_len = (cdb[7] << 8) | cdb[8]; + dev->sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; - if ((dev->sector_pos > last_sector)/* || - ((dev->sector_pos + dev->sector_len - 1) > last_sector)*/) { - scsi_disk_lba_out_of_range(dev); - return; - } + if ((dev->sector_pos > last_sector) /* || + ((dev->sector_pos + dev->sector_len - 1) > last_sector)*/ + ) { + scsi_disk_lba_out_of_range(dev); + return; + } - if ((!dev->sector_len) || (*BufLen == 0)) { - scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); - scsi_disk_log("SCSI HD %i: All done - callback set\n", dev->id); - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * SCSI_TIME; - break; - } + if ((!dev->sector_len) || (*BufLen == 0)) { + scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); + scsi_disk_log("SCSI HD %i: All done - callback set\n", dev->id); + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * SCSI_TIME; + break; + } - scsi_disk_buf_alloc(dev, alloc_length); - scsi_disk_set_buf_len(dev, BufLen, &alloc_length); + scsi_disk_buf_alloc(dev, alloc_length); + scsi_disk_set_buf_len(dev, BufLen, &alloc_length); - max_len = 1; - dev->requested_blocks = 1; + max_len = 1; + dev->requested_blocks = 1; - scsi_disk_set_phase(dev, SCSI_PHASE_DATA_OUT); + scsi_disk_set_phase(dev, SCSI_PHASE_DATA_OUT); - scsi_disk_data_command_finish(dev, 512, 512, alloc_length, 1); + scsi_disk_data_command_finish(dev, 512, 512, alloc_length, 1); - if (dev->packet_status != PHASE_COMPLETE) - ui_sb_update_icon(SB_HDD | dev->drv->bus, 1); - else - ui_sb_update_icon(SB_HDD | dev->drv->bus, 0); - return; + if (dev->packet_status != PHASE_COMPLETE) + ui_sb_update_icon(SB_HDD | dev->drv->bus, 1); + else + ui_sb_update_icon(SB_HDD | dev->drv->bus, 0); + return; - case GPCMD_MODE_SENSE_6: - case GPCMD_MODE_SENSE_10: - scsi_disk_set_phase(dev, SCSI_PHASE_DATA_IN); + case GPCMD_MODE_SENSE_6: + case GPCMD_MODE_SENSE_10: + scsi_disk_set_phase(dev, SCSI_PHASE_DATA_IN); - block_desc = ((cdb[1] >> 3) & 1) ? 0 : 1; + block_desc = ((cdb[1] >> 3) & 1) ? 0 : 1; - if (cdb[0] == GPCMD_MODE_SENSE_6) { - len = cdb[4]; - scsi_disk_buf_alloc(dev, 256); - } else { - len = (cdb[8] | (cdb[7] << 8)); - scsi_disk_buf_alloc(dev, 65536); - } + if (cdb[0] == GPCMD_MODE_SENSE_6) { + len = cdb[4]; + scsi_disk_buf_alloc(dev, 256); + } else { + len = (cdb[8] | (cdb[7] << 8)); + scsi_disk_buf_alloc(dev, 65536); + } - memset(dev->temp_buffer, 0, len); - alloc_length = len; + memset(dev->temp_buffer, 0, len); + alloc_length = len; - if (cdb[0] == GPCMD_MODE_SENSE_6) { - len = scsi_disk_mode_sense(dev, dev->temp_buffer, 4, cdb[2], block_desc); - if (len > alloc_length) - len = alloc_length; - dev->temp_buffer[0] = len - 1; - dev->temp_buffer[1] = 0; - if (block_desc) - dev->temp_buffer[3] = 8; - } else { - len = scsi_disk_mode_sense(dev, dev->temp_buffer, 8, cdb[2], block_desc); - if (len > alloc_length) - len = alloc_length; - dev->temp_buffer[0] = (len - 2) >> 8; - dev->temp_buffer[1] = (len - 2) & 255; - dev->temp_buffer[2] = 0; - if (block_desc) { - dev->temp_buffer[6] = 0; - dev->temp_buffer[7] = 8; - } - } + if (cdb[0] == GPCMD_MODE_SENSE_6) { + len = scsi_disk_mode_sense(dev, dev->temp_buffer, 4, cdb[2], block_desc); + if (len > alloc_length) + len = alloc_length; + dev->temp_buffer[0] = len - 1; + dev->temp_buffer[1] = 0; + if (block_desc) + dev->temp_buffer[3] = 8; + } else { + len = scsi_disk_mode_sense(dev, dev->temp_buffer, 8, cdb[2], block_desc); + if (len > alloc_length) + len = alloc_length; + dev->temp_buffer[0] = (len - 2) >> 8; + dev->temp_buffer[1] = (len - 2) & 255; + dev->temp_buffer[2] = 0; + if (block_desc) { + dev->temp_buffer[6] = 0; + dev->temp_buffer[7] = 8; + } + } - if (len > alloc_length) - len = alloc_length; - else if (len < alloc_length) - alloc_length = len; + if (len > alloc_length) + len = alloc_length; + else if (len < alloc_length) + alloc_length = len; - scsi_disk_set_buf_len(dev, BufLen, &alloc_length); - scsi_disk_log("SCSI HDD %i: Reading mode page: %02X...\n", dev->id, cdb[2]); + scsi_disk_set_buf_len(dev, BufLen, &alloc_length); + scsi_disk_log("SCSI HDD %i: Reading mode page: %02X...\n", dev->id, cdb[2]); - scsi_disk_data_command_finish(dev, len, len, alloc_length, 0); - return; + scsi_disk_data_command_finish(dev, len, len, alloc_length, 0); + return; - case GPCMD_MODE_SELECT_6: - case GPCMD_MODE_SELECT_10: - scsi_disk_set_phase(dev, SCSI_PHASE_DATA_OUT); + case GPCMD_MODE_SELECT_6: + case GPCMD_MODE_SELECT_10: + scsi_disk_set_phase(dev, SCSI_PHASE_DATA_OUT); - if (cdb[0] == GPCMD_MODE_SELECT_6) { - len = cdb[4]; - scsi_disk_buf_alloc(dev, 256); - } else { - len = (cdb[7] << 8) | cdb[8]; - scsi_disk_buf_alloc(dev, 65536); - } + if (cdb[0] == GPCMD_MODE_SELECT_6) { + len = cdb[4]; + scsi_disk_buf_alloc(dev, 256); + } else { + len = (cdb[7] << 8) | cdb[8]; + scsi_disk_buf_alloc(dev, 65536); + } - scsi_disk_set_buf_len(dev, BufLen, &len); - dev->total_length = len; - dev->do_page_save = cdb[1] & 1; - scsi_disk_data_command_finish(dev, len, len, len, 1); - return; + scsi_disk_set_buf_len(dev, BufLen, &len); + dev->total_length = len; + dev->do_page_save = cdb[1] & 1; + scsi_disk_data_command_finish(dev, len, len, len, 1); + return; - case GPCMD_INQUIRY: - max_len = cdb[3]; - max_len <<= 8; - max_len |= cdb[4]; + case GPCMD_INQUIRY: + max_len = cdb[3]; + max_len <<= 8; + max_len |= cdb[4]; - if ((!max_len) || (*BufLen == 0)) { - scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); - /* scsi_disk_log("SCSI HD %i: All done - callback set\n", dev->id); */ - dev->packet_status = PHASE_COMPLETE; - dev->callback = 20.0 * SCSI_TIME; - break; - } + if ((!max_len) || (*BufLen == 0)) { + scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); + /* scsi_disk_log("SCSI HD %i: All done - callback set\n", dev->id); */ + dev->packet_status = PHASE_COMPLETE; + dev->callback = 20.0 * SCSI_TIME; + break; + } - scsi_disk_buf_alloc(dev, 65536); + scsi_disk_buf_alloc(dev, 65536); - if (cdb[1] & 1) { - preamble_len = 4; - size_idx = 3; + if (cdb[1] & 1) { + preamble_len = 4; + size_idx = 3; - dev->temp_buffer[idx++] = 05; - dev->temp_buffer[idx++] = cdb[2]; - dev->temp_buffer[idx++] = 0; + dev->temp_buffer[idx++] = 05; + dev->temp_buffer[idx++] = cdb[2]; + dev->temp_buffer[idx++] = 0; - idx++; + idx++; - switch (cdb[2]) { - case 0x00: - dev->temp_buffer[idx++] = 0x00; - dev->temp_buffer[idx++] = 0x83; - break; - case 0x83: - if (idx + 24 > max_len) { - scsi_disk_buf_free(dev); - scsi_disk_data_phase_error(dev); - return; - } + switch (cdb[2]) { + case 0x00: + dev->temp_buffer[idx++] = 0x00; + dev->temp_buffer[idx++] = 0x83; + break; + case 0x83: + if (idx + 24 > max_len) { + scsi_disk_buf_free(dev); + scsi_disk_data_phase_error(dev); + return; + } - dev->temp_buffer[idx++] = 0x02; - dev->temp_buffer[idx++] = 0x00; - dev->temp_buffer[idx++] = 0x00; - dev->temp_buffer[idx++] = 20; - ide_padstr8(dev->temp_buffer + idx, 20, "53R141"); /* Serial */ - idx += 20; + dev->temp_buffer[idx++] = 0x02; + dev->temp_buffer[idx++] = 0x00; + dev->temp_buffer[idx++] = 0x00; + dev->temp_buffer[idx++] = 20; + ide_padstr8(dev->temp_buffer + idx, 20, "53R141"); /* Serial */ + idx += 20; - if (idx + 72 > cdb[4]) - goto atapi_out; - dev->temp_buffer[idx++] = 0x02; - dev->temp_buffer[idx++] = 0x01; - dev->temp_buffer[idx++] = 0x00; - dev->temp_buffer[idx++] = 68; - ide_padstr8(dev->temp_buffer + idx, 8, EMU_NAME); /* Vendor */ - idx += 8; - ide_padstr8(dev->temp_buffer + idx, 40, device_identify_ex); /* Product */ - idx += 40; - ide_padstr8(dev->temp_buffer + idx, 20, "53R141"); /* Product */ - idx += 20; - break; - default: - scsi_disk_log("INQUIRY: Invalid page: %02X\n", cdb[2]); - scsi_disk_invalid_field(dev); - scsi_disk_buf_free(dev); - return; - } - } else { - preamble_len = 5; - size_idx = 4; + if (idx + 72 > cdb[4]) + goto atapi_out; + dev->temp_buffer[idx++] = 0x02; + dev->temp_buffer[idx++] = 0x01; + dev->temp_buffer[idx++] = 0x00; + dev->temp_buffer[idx++] = 68; + ide_padstr8(dev->temp_buffer + idx, 8, EMU_NAME); /* Vendor */ + idx += 8; + ide_padstr8(dev->temp_buffer + idx, 40, device_identify_ex); /* Product */ + idx += 40; + ide_padstr8(dev->temp_buffer + idx, 20, "53R141"); /* Product */ + idx += 20; + break; + default: + scsi_disk_log("INQUIRY: Invalid page: %02X\n", cdb[2]); + scsi_disk_invalid_field(dev); + scsi_disk_buf_free(dev); + return; + } + } else { + preamble_len = 5; + size_idx = 4; - memset(dev->temp_buffer, 0, 8); - dev->temp_buffer[0] = 0; /*SCSI HD*/ - dev->temp_buffer[1] = 0; /*Fixed*/ - dev->temp_buffer[2] = 0x02; /*SCSI-2 compliant*/ - dev->temp_buffer[3] = 0x02; - dev->temp_buffer[4] = 31; - dev->temp_buffer[6] = 1; /* 16-bit transfers supported */ - dev->temp_buffer[7] = 0x20; /* Wide bus supported */ + memset(dev->temp_buffer, 0, 8); + dev->temp_buffer[0] = 0; /*SCSI HD*/ + dev->temp_buffer[1] = 0; /*Fixed*/ + dev->temp_buffer[2] = 0x02; /*SCSI-2 compliant*/ + dev->temp_buffer[3] = 0x02; + dev->temp_buffer[4] = 31; + dev->temp_buffer[6] = 1; /* 16-bit transfers supported */ + dev->temp_buffer[7] = 0x20; /* Wide bus supported */ - ide_padstr8(dev->temp_buffer + 8, 8, EMU_NAME); /* Vendor */ - ide_padstr8(dev->temp_buffer + 16, 16, device_identify); /* Product */ - ide_padstr8(dev->temp_buffer + 32, 4, EMU_VERSION_EX); /* Revision */ - idx = 36; + ide_padstr8(dev->temp_buffer + 8, 8, EMU_NAME); /* Vendor */ + ide_padstr8(dev->temp_buffer + 16, 16, device_identify); /* Product */ + ide_padstr8(dev->temp_buffer + 32, 4, EMU_VERSION_EX); /* Revision */ + idx = 36; - if (max_len == 96) { - dev->temp_buffer[4] = 91; - idx = 96; - } - } + if (max_len == 96) { + dev->temp_buffer[4] = 91; + idx = 96; + } + } atapi_out: - dev->temp_buffer[size_idx] = idx - preamble_len; - len=idx; + dev->temp_buffer[size_idx] = idx - preamble_len; + len = idx; - if (len > max_len) - len = max_len; + if (len > max_len) + len = max_len; - scsi_disk_set_buf_len(dev, BufLen, &len); + scsi_disk_set_buf_len(dev, BufLen, &len); - if (len > *BufLen) - len = *BufLen; + if (len > *BufLen) + len = *BufLen; - scsi_disk_set_phase(dev, SCSI_PHASE_DATA_IN); - scsi_disk_data_command_finish(dev, len, len, max_len, 0); - break; + scsi_disk_set_phase(dev, SCSI_PHASE_DATA_IN); + scsi_disk_data_command_finish(dev, len, len, max_len, 0); + break; - case GPCMD_PREVENT_REMOVAL: - scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); - scsi_disk_command_complete(dev); - break; + case GPCMD_PREVENT_REMOVAL: + scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); + scsi_disk_command_complete(dev); + break; - case GPCMD_SEEK_6: - case GPCMD_SEEK_10: - switch(cdb[0]) { - case GPCMD_SEEK_6: - pos = (cdb[2] << 8) | cdb[3]; - break; - case GPCMD_SEEK_10: - pos = (cdb[2] << 24) | (cdb[3]<<16) | (cdb[4]<<8) | cdb[5]; - break; - } - scsi_disk_seek(dev, pos); + case GPCMD_SEEK_6: + case GPCMD_SEEK_10: + switch (cdb[0]) { + case GPCMD_SEEK_6: + pos = (cdb[2] << 8) | cdb[3]; + break; + case GPCMD_SEEK_10: + pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; + break; + } + scsi_disk_seek(dev, pos); - scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); - scsi_disk_command_complete(dev); - break; + scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); + scsi_disk_command_complete(dev); + break; - case GPCMD_READ_CDROM_CAPACITY: - scsi_disk_buf_alloc(dev, 8); + case GPCMD_READ_CDROM_CAPACITY: + scsi_disk_buf_alloc(dev, 8); - max_len = hdd_image_get_last_sector(dev->id); - memset(dev->temp_buffer, 0, 8); - dev->temp_buffer[0] = (max_len >> 24) & 0xff; - dev->temp_buffer[1] = (max_len >> 16) & 0xff; - dev->temp_buffer[2] = (max_len >> 8) & 0xff; - dev->temp_buffer[3] = max_len & 0xff; - dev->temp_buffer[6] = 2; - len = 8; + max_len = hdd_image_get_last_sector(dev->id); + memset(dev->temp_buffer, 0, 8); + dev->temp_buffer[0] = (max_len >> 24) & 0xff; + dev->temp_buffer[1] = (max_len >> 16) & 0xff; + dev->temp_buffer[2] = (max_len >> 8) & 0xff; + dev->temp_buffer[3] = max_len & 0xff; + dev->temp_buffer[6] = 2; + len = 8; - scsi_disk_set_buf_len(dev, BufLen, &len); + scsi_disk_set_buf_len(dev, BufLen, &len); - scsi_disk_set_phase(dev, SCSI_PHASE_DATA_IN); - scsi_disk_data_command_finish(dev, len, len, len, 0); - break; + scsi_disk_set_phase(dev, SCSI_PHASE_DATA_IN); + scsi_disk_data_command_finish(dev, len, len, len, 0); + break; - default: - scsi_disk_illegal_opcode(dev); - break; + default: + scsi_disk_illegal_opcode(dev); + break; } /* scsi_disk_log("SCSI HD %i: Phase: %02X, request length: %i\n", dev->id, dev->phase, dev->request_length); */ } - static void scsi_disk_command_stop(scsi_common_t *sc) { @@ -1072,233 +1041,230 @@ scsi_disk_command_stop(scsi_common_t *sc) scsi_disk_buf_free(dev); } - static uint8_t scsi_disk_phase_data_out(scsi_common_t *sc) { - scsi_disk_t *dev = (scsi_disk_t *) sc; - uint8_t scsi_bus = (dev->drv->scsi_id >> 4) & 0x0f; - uint8_t scsi_id = dev->drv->scsi_id & 0x0f; - int i; - int32_t *BufLen = &scsi_devices[scsi_bus][scsi_id].buffer_length; - uint32_t last_sector = hdd_image_get_last_sector(dev->id); - uint32_t c, h, s, last_to_write = 0; - uint16_t block_desc_len, pos; - uint16_t param_list_len; - uint8_t hdr_len, val, old_val, ch, error = 0; - uint8_t page, page_len; + scsi_disk_t *dev = (scsi_disk_t *) sc; + uint8_t scsi_bus = (dev->drv->scsi_id >> 4) & 0x0f; + uint8_t scsi_id = dev->drv->scsi_id & 0x0f; + int i; + int32_t *BufLen = &scsi_devices[scsi_bus][scsi_id].buffer_length; + uint32_t last_sector = hdd_image_get_last_sector(dev->id); + uint32_t c, h, s, last_to_write = 0; + uint16_t block_desc_len, pos; + uint16_t param_list_len; + uint8_t hdr_len, val, old_val, ch, error = 0; + uint8_t page, page_len; if (!*BufLen) { - scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); + scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); - return 1; + return 1; } switch (dev->current_cdb[0]) { - case GPCMD_VERIFY_6: - case GPCMD_VERIFY_10: - case GPCMD_VERIFY_12: - break; - case GPCMD_WRITE_6: - case GPCMD_WRITE_10: - case GPCMD_WRITE_AND_VERIFY_10: - case GPCMD_WRITE_12: - case GPCMD_WRITE_AND_VERIFY_12: - if ((dev->requested_blocks > 0) && (*BufLen > 0)) { - if (dev->packet_len > (uint32_t) *BufLen) - hdd_image_write(dev->id, dev->sector_pos, *BufLen >> 9, dev->temp_buffer); - else - hdd_image_write(dev->id, dev->sector_pos, dev->requested_blocks, dev->temp_buffer); - } - break; - case GPCMD_WRITE_SAME_10: - if (!dev->current_cdb[7] && !dev->current_cdb[8]) - last_to_write = last_sector; - else - last_to_write = dev->sector_pos + dev->sector_len - 1; + case GPCMD_VERIFY_6: + case GPCMD_VERIFY_10: + case GPCMD_VERIFY_12: + break; + case GPCMD_WRITE_6: + case GPCMD_WRITE_10: + case GPCMD_WRITE_AND_VERIFY_10: + case GPCMD_WRITE_12: + case GPCMD_WRITE_AND_VERIFY_12: + if ((dev->requested_blocks > 0) && (*BufLen > 0)) { + if (dev->packet_len > (uint32_t) *BufLen) + hdd_image_write(dev->id, dev->sector_pos, *BufLen >> 9, dev->temp_buffer); + else + hdd_image_write(dev->id, dev->sector_pos, dev->requested_blocks, dev->temp_buffer); + } + break; + case GPCMD_WRITE_SAME_10: + if (!dev->current_cdb[7] && !dev->current_cdb[8]) + last_to_write = last_sector; + else + last_to_write = dev->sector_pos + dev->sector_len - 1; - for (i = dev->sector_pos; i <= (int) last_to_write; i++) { - if (dev->current_cdb[1] & 2) { - dev->temp_buffer[0] = (i >> 24) & 0xff; - dev->temp_buffer[1] = (i >> 16) & 0xff; - dev->temp_buffer[2] = (i >> 8) & 0xff; - dev->temp_buffer[3] = i & 0xff; - } else if (dev->current_cdb[1] & 4) { - s = (i % dev->drv->spt); - h = ((i - s) / dev->drv->spt) % dev->drv->hpc; - c = ((i - s) / dev->drv->spt) / dev->drv->hpc; - dev->temp_buffer[0] = (c >> 16) & 0xff; - dev->temp_buffer[1] = (c >> 8) & 0xff; - dev->temp_buffer[2] = c & 0xff; - dev->temp_buffer[3] = h & 0xff; - dev->temp_buffer[4] = (s >> 24) & 0xff; - dev->temp_buffer[5] = (s >> 16) & 0xff; - dev->temp_buffer[6] = (s >> 8) & 0xff; - dev->temp_buffer[7] = s & 0xff; - } - hdd_image_write(dev->id, i, 1, dev->temp_buffer); - } - break; - case GPCMD_MODE_SELECT_6: - case GPCMD_MODE_SELECT_10: - if (dev->current_cdb[0] == GPCMD_MODE_SELECT_10) { - hdr_len = 8; - param_list_len = dev->current_cdb[7]; - param_list_len <<= 8; - param_list_len |= dev->current_cdb[8]; - } else { - hdr_len = 4; - param_list_len = dev->current_cdb[4]; - } + for (i = dev->sector_pos; i <= (int) last_to_write; i++) { + if (dev->current_cdb[1] & 2) { + dev->temp_buffer[0] = (i >> 24) & 0xff; + dev->temp_buffer[1] = (i >> 16) & 0xff; + dev->temp_buffer[2] = (i >> 8) & 0xff; + dev->temp_buffer[3] = i & 0xff; + } else if (dev->current_cdb[1] & 4) { + s = (i % dev->drv->spt); + h = ((i - s) / dev->drv->spt) % dev->drv->hpc; + c = ((i - s) / dev->drv->spt) / dev->drv->hpc; + dev->temp_buffer[0] = (c >> 16) & 0xff; + dev->temp_buffer[1] = (c >> 8) & 0xff; + dev->temp_buffer[2] = c & 0xff; + dev->temp_buffer[3] = h & 0xff; + dev->temp_buffer[4] = (s >> 24) & 0xff; + dev->temp_buffer[5] = (s >> 16) & 0xff; + dev->temp_buffer[6] = (s >> 8) & 0xff; + dev->temp_buffer[7] = s & 0xff; + } + hdd_image_write(dev->id, i, 1, dev->temp_buffer); + } + break; + case GPCMD_MODE_SELECT_6: + case GPCMD_MODE_SELECT_10: + if (dev->current_cdb[0] == GPCMD_MODE_SELECT_10) { + hdr_len = 8; + param_list_len = dev->current_cdb[7]; + param_list_len <<= 8; + param_list_len |= dev->current_cdb[8]; + } else { + hdr_len = 4; + param_list_len = dev->current_cdb[4]; + } - if (dev->current_cdb[0] == GPCMD_MODE_SELECT_6) { - block_desc_len = dev->temp_buffer[2]; - block_desc_len <<= 8; - block_desc_len |= dev->temp_buffer[3]; - } else { - block_desc_len = dev->temp_buffer[6]; - block_desc_len <<= 8; - block_desc_len |= dev->temp_buffer[7]; - } + if (dev->current_cdb[0] == GPCMD_MODE_SELECT_6) { + block_desc_len = dev->temp_buffer[2]; + block_desc_len <<= 8; + block_desc_len |= dev->temp_buffer[3]; + } else { + block_desc_len = dev->temp_buffer[6]; + block_desc_len <<= 8; + block_desc_len |= dev->temp_buffer[7]; + } - pos = hdr_len + block_desc_len; + pos = hdr_len + block_desc_len; - while(1) { - if (pos >= param_list_len) { - scsi_disk_log("SCSI HD %i: Buffer has only block descriptor\n", dev->id); - break; - } + while (1) { + if (pos >= param_list_len) { + scsi_disk_log("SCSI HD %i: Buffer has only block descriptor\n", dev->id); + break; + } - page = dev->temp_buffer[pos] & 0x3F; - page_len = dev->temp_buffer[pos + 1]; + page = dev->temp_buffer[pos] & 0x3F; + page_len = dev->temp_buffer[pos + 1]; - pos += 2; + pos += 2; - if (!(scsi_disk_mode_sense_page_flags & (1LL << ((uint64_t) page)))) - error |= 1; - else { - for (i = 0; i < page_len; i++) { - ch = scsi_disk_mode_sense_pages_changeable.pages[page][i + 2]; - val = dev->temp_buffer[pos + i]; - old_val = dev->ms_pages_saved.pages[page][i + 2]; - if (val != old_val) { - if (ch) - dev->ms_pages_saved.pages[page][i + 2] = val; - else - error |= 1; - } - } - } + if (!(scsi_disk_mode_sense_page_flags & (1LL << ((uint64_t) page)))) + error |= 1; + else { + for (i = 0; i < page_len; i++) { + ch = scsi_disk_mode_sense_pages_changeable.pages[page][i + 2]; + val = dev->temp_buffer[pos + i]; + old_val = dev->ms_pages_saved.pages[page][i + 2]; + if (val != old_val) { + if (ch) + dev->ms_pages_saved.pages[page][i + 2] = val; + else + error |= 1; + } + } + } - pos += page_len; + pos += page_len; - val = scsi_disk_mode_sense_pages_default.pages[page][0] & 0x80; - if (dev->do_page_save && val) - scsi_disk_mode_sense_save(dev); + val = scsi_disk_mode_sense_pages_default.pages[page][0] & 0x80; + if (dev->do_page_save && val) + scsi_disk_mode_sense_save(dev); - if (pos >= dev->total_length) - break; - } + if (pos >= dev->total_length) + break; + } - if (error) { - scsi_disk_buf_free(dev); - scsi_disk_invalid_field_pl(dev); - } - break; - default: - fatal("SCSI HDD %i: Bad Command for phase 2 (%02X)\n", dev->id, dev->current_cdb[0]); - break; + if (error) { + scsi_disk_buf_free(dev); + scsi_disk_invalid_field_pl(dev); + } + break; + default: + fatal("SCSI HDD %i: Bad Command for phase 2 (%02X)\n", dev->id, dev->current_cdb[0]); + break; } scsi_disk_command_stop((scsi_common_t *) dev); return 1; } - void scsi_disk_hard_reset(void) { - int c; - scsi_disk_t *dev; + int c; + scsi_disk_t *dev; scsi_device_t *sd; - uint8_t scsi_bus, scsi_id; + uint8_t scsi_bus, scsi_id; for (c = 0; c < HDD_NUM; c++) { - if (hdd[c].bus == HDD_BUS_SCSI) { - scsi_disk_log("SCSI disk hard_reset drive=%d\n", c); + if (hdd[c].bus == HDD_BUS_SCSI) { + scsi_disk_log("SCSI disk hard_reset drive=%d\n", c); - scsi_bus = (hdd[c].scsi_id >> 4) & 0x0f; - scsi_id = hdd[c].scsi_id & 0x0f; + scsi_bus = (hdd[c].scsi_id >> 4) & 0x0f; + scsi_id = hdd[c].scsi_id & 0x0f; - /* Make sure to ignore any SCSI disk that has an out of range SCSI bus. */ - if (scsi_bus >= SCSI_BUS_MAX) - continue; + /* Make sure to ignore any SCSI disk that has an out of range SCSI bus. */ + if (scsi_bus >= SCSI_BUS_MAX) + continue; - /* Make sure to ignore any SCSI disk that has an out of range ID. */ - if (scsi_id >= SCSI_ID_MAX) - continue; + /* Make sure to ignore any SCSI disk that has an out of range ID. */ + if (scsi_id >= SCSI_ID_MAX) + continue; - /* Make sure to ignore any SCSI disk whose image file name is empty. */ - if (strlen(hdd[c].fn) == 0) - continue; + /* Make sure to ignore any SCSI disk whose image file name is empty. */ + if (strlen(hdd[c].fn) == 0) + continue; - /* Make sure to ignore any SCSI disk whose image fails to load. */ - if (! hdd_image_load(c)) - continue; + /* Make sure to ignore any SCSI disk whose image fails to load. */ + if (!hdd_image_load(c)) + continue; - if (!hdd[c].priv) { - hdd[c].priv = (scsi_disk_t *) malloc(sizeof(scsi_disk_t)); - memset(hdd[c].priv, 0, sizeof(scsi_disk_t)); - } + if (!hdd[c].priv) { + hdd[c].priv = (scsi_disk_t *) malloc(sizeof(scsi_disk_t)); + memset(hdd[c].priv, 0, sizeof(scsi_disk_t)); + } - dev = (scsi_disk_t *) hdd[c].priv; + dev = (scsi_disk_t *) hdd[c].priv; - /* SCSI disk, attach to the SCSI bus. */ - sd = &scsi_devices[scsi_bus][scsi_id]; + /* SCSI disk, attach to the SCSI bus. */ + sd = &scsi_devices[scsi_bus][scsi_id]; - sd->sc = (scsi_common_t *) dev; - sd->command = scsi_disk_command; - sd->request_sense = scsi_disk_request_sense_for_scsi; - sd->reset = scsi_disk_reset; - sd->phase_data_out = scsi_disk_phase_data_out; - sd->command_stop = scsi_disk_command_stop; - sd->type = SCSI_FIXED_DISK; + sd->sc = (scsi_common_t *) dev; + sd->command = scsi_disk_command; + sd->request_sense = scsi_disk_request_sense_for_scsi; + sd->reset = scsi_disk_reset; + sd->phase_data_out = scsi_disk_phase_data_out; + sd->command_stop = scsi_disk_command_stop; + sd->type = SCSI_FIXED_DISK; - dev->id = c; - dev->drv = &hdd[c]; + dev->id = c; + dev->drv = &hdd[c]; - dev->cur_lun = SCSI_LUN_USE_CDB; + dev->cur_lun = SCSI_LUN_USE_CDB; - scsi_disk_mode_sense_load(dev); + scsi_disk_mode_sense_load(dev); - scsi_disk_log("SCSI disk %i attached to SCSI ID %i\n", c, hdd[c].scsi_id); - } + scsi_disk_log("SCSI disk %i attached to SCSI ID %i\n", c, hdd[c].scsi_id); + } } } - void scsi_disk_close(void) { scsi_disk_t *dev; - int c; - uint8_t scsi_bus, scsi_id; + int c; + uint8_t scsi_bus, scsi_id; for (c = 0; c < HDD_NUM; c++) { - if (hdd[c].bus == HDD_BUS_SCSI) { - scsi_bus = (hdd[c].scsi_id >> 4) & 0x0f; - scsi_id = hdd[c].scsi_id & 0x0f; + if (hdd[c].bus == HDD_BUS_SCSI) { + scsi_bus = (hdd[c].scsi_id >> 4) & 0x0f; + scsi_id = hdd[c].scsi_id & 0x0f; - memset(&scsi_devices[scsi_bus][scsi_id], 0x00, sizeof(scsi_device_t)); + memset(&scsi_devices[scsi_bus][scsi_id], 0x00, sizeof(scsi_device_t)); - hdd_image_close(c); + hdd_image_close(c); - dev = hdd[c].priv; + dev = hdd[c].priv; - if (dev) { - free(dev); - hdd[c].priv = NULL; - } - } + if (dev) { + free(dev); + hdd[c].priv = NULL; + } + } } } diff --git a/src/scsi/scsi_ncr5380.c b/src/scsi/scsi_ncr5380.c index 387d650f1..b022d59dd 100644 --- a/src/scsi/scsi_ncr5380.c +++ b/src/scsi/scsi_ncr5380.c @@ -42,160 +42,155 @@ #include <86box/scsi_device.h> #include <86box/scsi_ncr5380.h> +#define LCS6821N_ROM "roms/scsi/ncr5380/Longshine LCS-6821N - BIOS version 1.04.bin" +#define RT1000B_810R_ROM "roms/scsi/ncr5380/Rancho_RT1000_RTBios_version_8.10R.bin" +#define RT1000B_820R_ROM "roms/scsi/ncr5380/RTBIOS82.ROM" +#define T130B_ROM "roms/scsi/ncr5380/trantor_t130b_bios_v2.14.bin" +#define T128_ROM "roms/scsi/ncr5380/trantor_t128_bios_v1.12.bin" +#define COREL_LS2000_ROM "roms/scsi/ncr5380/Corel LS2000 - BIOS ROM - Ver 1.65.bin" -#define LCS6821N_ROM "roms/scsi/ncr5380/Longshine LCS-6821N - BIOS version 1.04.bin" -#define RT1000B_810R_ROM "roms/scsi/ncr5380/Rancho_RT1000_RTBios_version_8.10R.bin" -#define RT1000B_820R_ROM "roms/scsi/ncr5380/RTBIOS82.ROM" -#define T130B_ROM "roms/scsi/ncr5380/trantor_t130b_bios_v2.14.bin" -#define T128_ROM "roms/scsi/ncr5380/trantor_t128_bios_v1.12.bin" -#define COREL_LS2000_ROM "roms/scsi/ncr5380/Corel LS2000 - BIOS ROM - Ver 1.65.bin" +#define NCR_CURDATA 0 /* current SCSI data (read only) */ +#define NCR_OUTDATA 0 /* output data (write only) */ +#define NCR_INITCOMMAND 1 /* initiator command (read/write) */ +#define NCR_MODE 2 /* mode (read/write) */ +#define NCR_TARGETCMD 3 /* target command (read/write) */ +#define NCR_SELENABLE 4 /* select enable (write only) */ +#define NCR_BUSSTATUS 4 /* bus status (read only) */ +#define NCR_STARTDMA 5 /* start DMA send (write only) */ +#define NCR_BUSANDSTAT 5 /* bus and status (read only) */ +#define NCR_DMATARGET 6 /* DMA target (write only) */ +#define NCR_INPUTDATA 6 /* input data (read only) */ +#define NCR_DMAINIRECV 7 /* DMA initiator receive (write only) */ +#define NCR_RESETPARITY 7 /* reset parity/interrupt (read only) */ +#define ICR_DBP 0x01 +#define ICR_ATN 0x02 +#define ICR_SEL 0x04 +#define ICR_BSY 0x08 +#define ICR_ACK 0x10 +#define ICR_ARB_LOST 0x20 +#define ICR_ARB_IN_PROGRESS 0x40 -#define NCR_CURDATA 0 /* current SCSI data (read only) */ -#define NCR_OUTDATA 0 /* output data (write only) */ -#define NCR_INITCOMMAND 1 /* initiator command (read/write) */ -#define NCR_MODE 2 /* mode (read/write) */ -#define NCR_TARGETCMD 3 /* target command (read/write) */ -#define NCR_SELENABLE 4 /* select enable (write only) */ -#define NCR_BUSSTATUS 4 /* bus status (read only) */ -#define NCR_STARTDMA 5 /* start DMA send (write only) */ -#define NCR_BUSANDSTAT 5 /* bus and status (read only) */ -#define NCR_DMATARGET 6 /* DMA target (write only) */ -#define NCR_INPUTDATA 6 /* input data (read only) */ -#define NCR_DMAINIRECV 7 /* DMA initiator receive (write only) */ -#define NCR_RESETPARITY 7 /* reset parity/interrupt (read only) */ +#define MODE_ARBITRATE 0x01 +#define MODE_DMA 0x02 +#define MODE_MONITOR_BUSY 0x04 +#define MODE_ENA_EOP_INT 0x08 -#define ICR_DBP 0x01 -#define ICR_ATN 0x02 -#define ICR_SEL 0x04 -#define ICR_BSY 0x08 -#define ICR_ACK 0x10 -#define ICR_ARB_LOST 0x20 -#define ICR_ARB_IN_PROGRESS 0x40 +#define STATUS_ACK 0x01 +#define STATUS_BUSY_ERROR 0x04 +#define STATUS_PHASE_MATCH 0x08 +#define STATUS_INT 0x10 +#define STATUS_DRQ 0x40 +#define STATUS_END_OF_DMA 0x80 -#define MODE_ARBITRATE 0x01 -#define MODE_DMA 0x02 -#define MODE_MONITOR_BUSY 0x04 -#define MODE_ENA_EOP_INT 0x08 +#define TCR_IO 0x01 +#define TCR_CD 0x02 +#define TCR_MSG 0x04 +#define TCR_REQ 0x08 +#define TCR_LAST_BYTE_SENT 0x80 -#define STATUS_ACK 0x01 -#define STATUS_BUSY_ERROR 0x04 -#define STATUS_PHASE_MATCH 0x08 -#define STATUS_INT 0x10 -#define STATUS_DRQ 0x40 -#define STATUS_END_OF_DMA 0x80 - -#define TCR_IO 0x01 -#define TCR_CD 0x02 -#define TCR_MSG 0x04 -#define TCR_REQ 0x08 -#define TCR_LAST_BYTE_SENT 0x80 - -#define CTRL_DATA_DIR 0x40 -#define STATUS_BUFFER_NOT_READY 0x04 +#define CTRL_DATA_DIR 0x40 +#define STATUS_BUFFER_NOT_READY 0x04 #define STATUS_53C80_ACCESSIBLE 0x80 typedef struct { - uint8_t icr, mode, tcr, data_wait; - uint8_t isr, output_data, target_id, tx_data; - uint8_t msglun; + uint8_t icr, mode, tcr, data_wait; + uint8_t isr, output_data, target_id, tx_data; + uint8_t msglun; - uint8_t command[20]; - uint8_t msgout[4]; - int msgout_pos; - int is_msgout; + uint8_t command[20]; + uint8_t msgout[4]; + int msgout_pos; + int is_msgout; - int dma_mode, cur_bus, bus_in, new_phase; - int state, clear_req, wait_data, wait_complete; - int command_pos, data_pos; + int dma_mode, cur_bus, bus_in, new_phase; + int state, clear_req, wait_data, wait_complete; + int command_pos, data_pos; } ncr_t; typedef struct { - uint8_t ctrl; - uint8_t status; - uint8_t buffer[512]; - uint8_t ext_ram[0x80]; - uint8_t block_count; + uint8_t ctrl; + uint8_t status; + uint8_t buffer[512]; + uint8_t ext_ram[0x80]; + uint8_t block_count; - int block_loaded; - int pos, host_pos; + int block_loaded; + int pos, host_pos; - int bios_enabled; + int bios_enabled; } t128_t; typedef struct { - ncr_t ncr; - t128_t t128; + ncr_t ncr; + t128_t t128; - const char *name; + const char *name; - uint8_t buffer[128]; - uint8_t int_ram[0x40], ext_ram[0x600]; + uint8_t buffer[128]; + uint8_t int_ram[0x40], ext_ram[0x600]; - uint32_t rom_addr; - uint16_t base; + uint32_t rom_addr; + uint16_t base; - int8_t irq; - int8_t type; - int8_t bios_ver; - uint8_t block_count; - uint8_t status_ctrl; - uint8_t bus, pad; + int8_t irq; + int8_t type; + int8_t bios_ver; + uint8_t block_count; + uint8_t status_ctrl; + uint8_t bus, pad; - rom_t bios_rom; + rom_t bios_rom; mem_mapping_t mapping; - int block_count_loaded; + int block_count_loaded; - int buffer_pos; - int buffer_host_pos; + int buffer_pos; + int buffer_host_pos; - int dma_enabled; + int dma_enabled; - pc_timer_t timer; - double period; + pc_timer_t timer; + double period; - int ncr_busy; + int ncr_busy; uint8_t pos_regs[8]; } ncr5380_t; -#define STATE_IDLE 0 -#define STATE_COMMAND 1 -#define STATE_DATAIN 2 -#define STATE_DATAOUT 3 -#define STATE_STATUS 4 -#define STATE_MESSAGEIN 5 -#define STATE_SELECT 6 -#define STATE_MESSAGEOUT 7 -#define STATE_MESSAGE_ID 8 +#define STATE_IDLE 0 +#define STATE_COMMAND 1 +#define STATE_DATAIN 2 +#define STATE_DATAOUT 3 +#define STATE_STATUS 4 +#define STATE_MESSAGEIN 5 +#define STATE_SELECT 6 +#define STATE_MESSAGEOUT 7 +#define STATE_MESSAGE_ID 8 -#define DMA_IDLE 0 -#define DMA_SEND 1 +#define DMA_IDLE 0 +#define DMA_SEND 1 #define DMA_INITIATOR_RECEIVE 2 -static int cmd_len[8] = {6, 10, 10, 6, 16, 12, 6, 6}; - +static int cmd_len[8] = { 6, 10, 10, 6, 16, 12, 6, 6 }; #ifdef ENABLE_NCR5380_LOG int ncr5380_do_log = ENABLE_NCR5380_LOG; - static void ncr_log(const char *fmt, ...) { va_list ap; if (ncr5380_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define ncr_log(fmt, ...) +# define ncr_log(fmt, ...) #endif - #define SET_BUS_STATE(ncr, state) ncr->cur_bus = (ncr->cur_bus & ~(SCSI_PHASE_MESSAGE_IN)) | (state & (SCSI_PHASE_MESSAGE_IN)) static void @@ -211,11 +206,11 @@ static void ncr_irq(ncr5380_t *ncr_dev, ncr_t *ncr, int set_irq) { if (set_irq) { - ncr->isr |= STATUS_INT; - picint(1 << ncr_dev->irq); + ncr->isr |= STATUS_INT; + picint(1 << ncr_dev->irq); } else { - ncr->isr &= ~STATUS_INT; - picintc(1 << ncr_dev->irq); + ncr->isr &= ~STATUS_INT; + picintc(1 << ncr_dev->irq); } } @@ -225,23 +220,24 @@ get_dev_id(uint8_t data) int c; for (c = 0; c < SCSI_ID_MAX; c++) { - if (data & (1 << c)) return(c); + if (data & (1 << c)) + return (c); } - return(-1); + return (-1); } static int getmsglen(uint8_t *msgp, int len) { - uint8_t msg = msgp[0]; - if (msg == 0 || (msg >= 0x02 && msg <= 0x1f) ||msg >= 0x80) - return 1; - if (msg >= 0x20 && msg <= 0x2f) - return 2; - if (len < 2) - return 3; - return msgp[1]; + uint8_t msg = msgp[0]; + if (msg == 0 || (msg >= 0x02 && msg <= 0x1f) || msg >= 0x80) + return 1; + if (msg >= 0x20 && msg <= 0x2f) + return 2; + if (len < 2) + return 3; + return msgp[1]; } static void @@ -253,7 +249,7 @@ ncr_reset(ncr5380_t *ncr_dev, ncr_t *ncr) timer_stop(&ncr_dev->timer); for (int i = 0; i < 8; i++) - scsi_device_reset(&scsi_devices[ncr_dev->bus][i]); + scsi_device_reset(&scsi_devices[ncr_dev->bus][i]); ncr_irq(ncr_dev, ncr, 0); } @@ -264,907 +260,917 @@ ncr_timer_on(ncr5380_t *ncr_dev, ncr_t *ncr, int callback) double p = ncr_dev->period; if (ncr->data_wait & 2) - ncr->data_wait &= ~2; + ncr->data_wait &= ~2; - if (callback) { - if (ncr_dev->type == 3) - p *= 512.0; - else - p *= 128.0; - } + if (callback) { + if (ncr_dev->type == 3) + p *= 512.0; + else + p *= 128.0; + } - p += 1.0; + p += 1.0; - ncr_log("P = %lf, command = %02x, callback = %i, period = %lf, t128 pos = %i\n", p, ncr->command[0], callback, ncr_dev->period, ncr_dev->t128.host_pos); - timer_on_auto(&ncr_dev->timer, p); + ncr_log("P = %lf, command = %02x, callback = %i, period = %lf, t128 pos = %i\n", p, ncr->command[0], callback, ncr_dev->period, ncr_dev->t128.host_pos); + timer_on_auto(&ncr_dev->timer, p); } - static uint32_t get_bus_host(ncr_t *ncr) { uint32_t bus_host = 0; if (ncr->icr & ICR_DBP) - bus_host |= BUS_DBP; + bus_host |= BUS_DBP; if (ncr->icr & ICR_SEL) - bus_host |= BUS_SEL; + bus_host |= BUS_SEL; if (ncr->tcr & TCR_IO) - bus_host |= BUS_IO; + bus_host |= BUS_IO; if (ncr->tcr & TCR_CD) - bus_host |= BUS_CD; + bus_host |= BUS_CD; if (ncr->tcr & TCR_MSG) - bus_host |= BUS_MSG; + bus_host |= BUS_MSG; if (ncr->tcr & TCR_REQ) - bus_host |= BUS_REQ; + bus_host |= BUS_REQ; if (ncr->icr & ICR_BSY) - bus_host |= BUS_BSY; + bus_host |= BUS_BSY; if (ncr->icr & ICR_ATN) - bus_host |= BUS_ATN; + bus_host |= BUS_ATN; if (ncr->icr & ICR_ACK) - bus_host |= BUS_ACK; + bus_host |= BUS_ACK; if (ncr->mode & MODE_ARBITRATE) - bus_host |= BUS_ARB; + bus_host |= BUS_ARB; - return(bus_host | BUS_SETDATA(ncr->output_data)); + return (bus_host | BUS_SETDATA(ncr->output_data)); } - static void ncr_bus_read(ncr5380_t *ncr_dev) { - ncr_t *ncr = &ncr_dev->ncr; + ncr_t *ncr = &ncr_dev->ncr; scsi_device_t *dev; - int phase; + int phase; /*Wait processes to handle bus requests*/ if (ncr->clear_req) { - ncr->clear_req--; - if (!ncr->clear_req) { - ncr_log("Prelude to command data\n"); - SET_BUS_STATE(ncr, ncr->new_phase); - ncr->cur_bus |= BUS_REQ; - } + ncr->clear_req--; + if (!ncr->clear_req) { + ncr_log("Prelude to command data\n"); + SET_BUS_STATE(ncr, ncr->new_phase); + ncr->cur_bus |= BUS_REQ; + } } if (ncr->wait_data) { - ncr->wait_data--; - if (!ncr->wait_data) { - dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; - SET_BUS_STATE(ncr, ncr->new_phase); - phase = (ncr->cur_bus & SCSI_PHASE_MESSAGE_IN); + ncr->wait_data--; + if (!ncr->wait_data) { + dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; + SET_BUS_STATE(ncr, ncr->new_phase); + phase = (ncr->cur_bus & SCSI_PHASE_MESSAGE_IN); - if (phase == SCSI_PHASE_DATA_IN) { - ncr->tx_data = dev->sc->temp_buffer[ncr->data_pos++]; - ncr->state = STATE_DATAIN; - ncr->cur_bus = (ncr->cur_bus & ~BUS_DATAMASK) | BUS_SETDATA(ncr->tx_data) | BUS_DBP; - } else if (phase == SCSI_PHASE_DATA_OUT) { - if (ncr->new_phase & BUS_IDLE) { - ncr->state = STATE_IDLE; - ncr->cur_bus &= ~BUS_BSY; - } else - ncr->state = STATE_DATAOUT; - } else if (phase == SCSI_PHASE_STATUS) { - ncr->cur_bus |= BUS_REQ; - ncr->state = STATE_STATUS; - ncr->cur_bus = (ncr->cur_bus & ~BUS_DATAMASK) | BUS_SETDATA(dev->status) | BUS_DBP; - } else if (phase == SCSI_PHASE_MESSAGE_IN) { - ncr->state = STATE_MESSAGEIN; - ncr->cur_bus = (ncr->cur_bus & ~BUS_DATAMASK) | BUS_SETDATA(0) | BUS_DBP; - } else if (phase == SCSI_PHASE_MESSAGE_OUT) { - ncr->cur_bus |= BUS_REQ; - ncr->state = STATE_MESSAGEOUT; - ncr->cur_bus = (ncr->cur_bus & ~BUS_DATAMASK) | BUS_SETDATA(ncr->target_id >> 5) | BUS_DBP; - } - } + if (phase == SCSI_PHASE_DATA_IN) { + ncr->tx_data = dev->sc->temp_buffer[ncr->data_pos++]; + ncr->state = STATE_DATAIN; + ncr->cur_bus = (ncr->cur_bus & ~BUS_DATAMASK) | BUS_SETDATA(ncr->tx_data) | BUS_DBP; + } else if (phase == SCSI_PHASE_DATA_OUT) { + if (ncr->new_phase & BUS_IDLE) { + ncr->state = STATE_IDLE; + ncr->cur_bus &= ~BUS_BSY; + } else + ncr->state = STATE_DATAOUT; + } else if (phase == SCSI_PHASE_STATUS) { + ncr->cur_bus |= BUS_REQ; + ncr->state = STATE_STATUS; + ncr->cur_bus = (ncr->cur_bus & ~BUS_DATAMASK) | BUS_SETDATA(dev->status) | BUS_DBP; + } else if (phase == SCSI_PHASE_MESSAGE_IN) { + ncr->state = STATE_MESSAGEIN; + ncr->cur_bus = (ncr->cur_bus & ~BUS_DATAMASK) | BUS_SETDATA(0) | BUS_DBP; + } else if (phase == SCSI_PHASE_MESSAGE_OUT) { + ncr->cur_bus |= BUS_REQ; + ncr->state = STATE_MESSAGEOUT; + ncr->cur_bus = (ncr->cur_bus & ~BUS_DATAMASK) | BUS_SETDATA(ncr->target_id >> 5) | BUS_DBP; + } + } } if (ncr->wait_complete) { - ncr->wait_complete--; - if (!ncr->wait_complete) - ncr->cur_bus |= BUS_REQ; + ncr->wait_complete--; + if (!ncr->wait_complete) + ncr->cur_bus |= BUS_REQ; } } - static void ncr_bus_update(void *priv, int bus) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; - ncr_t *ncr = &ncr_dev->ncr; - scsi_device_t *dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; - double p; - uint8_t sel_data; - int msglen; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; + ncr_t *ncr = &ncr_dev->ncr; + scsi_device_t *dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; + double p; + uint8_t sel_data; + int msglen; /*Start the SCSI command layer, which will also make the timings*/ if (bus & BUS_ARB) - ncr->state = STATE_IDLE; + ncr->state = STATE_IDLE; ncr_log("State = %i\n", ncr->state); switch (ncr->state) { - case STATE_IDLE: - ncr->clear_req = ncr->wait_data = ncr->wait_complete = 0; - if ((bus & BUS_SEL) && !(bus & BUS_BSY)) { - ncr_log("Selection phase\n"); - sel_data = BUS_GETDATA(bus); + case STATE_IDLE: + ncr->clear_req = ncr->wait_data = ncr->wait_complete = 0; + if ((bus & BUS_SEL) && !(bus & BUS_BSY)) { + ncr_log("Selection phase\n"); + sel_data = BUS_GETDATA(bus); - ncr->target_id = get_dev_id(sel_data); + ncr->target_id = get_dev_id(sel_data); - ncr_log("Select - target ID = %i\n", ncr->target_id); + ncr_log("Select - target ID = %i\n", ncr->target_id); - /*Once the device has been found and selected, mark it as busy*/ - if ((ncr->target_id != (uint8_t)-1) && scsi_device_present(&scsi_devices[ncr_dev->bus][ncr->target_id])) { - ncr->cur_bus |= BUS_BSY; - ncr->state = STATE_SELECT; - } else { - ncr_log("Device not found at ID %i, Current Bus BSY=%02x\n", ncr->target_id, ncr->cur_bus); - ncr->cur_bus = 0; - } - } - break; - case STATE_SELECT: - if (!(bus & BUS_SEL)) { - if (!(bus & BUS_ATN)) { - if ((ncr->target_id != (uint8_t)-1) && scsi_device_present(&scsi_devices[ncr_dev->bus][ncr->target_id])) { - ncr_log("Device found at ID %i, Current Bus BSY=%02x\n", ncr->target_id, ncr->cur_bus); - ncr->state = STATE_COMMAND; - ncr->cur_bus = BUS_BSY | BUS_REQ; - ncr_log("CurBus BSY|REQ=%02x\n", ncr->cur_bus); - ncr->command_pos = 0; - SET_BUS_STATE(ncr, SCSI_PHASE_COMMAND); - } else { - ncr->state = STATE_IDLE; - ncr->cur_bus = 0; - } - } else { - ncr_log("Set to SCSI Message Out\n"); - ncr->new_phase = SCSI_PHASE_MESSAGE_OUT; - ncr->wait_data = 4; - ncr->msgout_pos = 0; - ncr->is_msgout = 1; - } - } - break; - case STATE_COMMAND: - if ((bus & BUS_ACK) && !(ncr->bus_in & BUS_ACK)) { - /*Write command byte to the output data register*/ - ncr->command[ncr->command_pos++] = BUS_GETDATA(bus); - ncr->clear_req = 3; - ncr->new_phase = ncr->cur_bus & SCSI_PHASE_MESSAGE_IN; - ncr->cur_bus &= ~BUS_REQ; + /*Once the device has been found and selected, mark it as busy*/ + if ((ncr->target_id != (uint8_t) -1) && scsi_device_present(&scsi_devices[ncr_dev->bus][ncr->target_id])) { + ncr->cur_bus |= BUS_BSY; + ncr->state = STATE_SELECT; + } else { + ncr_log("Device not found at ID %i, Current Bus BSY=%02x\n", ncr->target_id, ncr->cur_bus); + ncr->cur_bus = 0; + } + } + break; + case STATE_SELECT: + if (!(bus & BUS_SEL)) { + if (!(bus & BUS_ATN)) { + if ((ncr->target_id != (uint8_t) -1) && scsi_device_present(&scsi_devices[ncr_dev->bus][ncr->target_id])) { + ncr_log("Device found at ID %i, Current Bus BSY=%02x\n", ncr->target_id, ncr->cur_bus); + ncr->state = STATE_COMMAND; + ncr->cur_bus = BUS_BSY | BUS_REQ; + ncr_log("CurBus BSY|REQ=%02x\n", ncr->cur_bus); + ncr->command_pos = 0; + SET_BUS_STATE(ncr, SCSI_PHASE_COMMAND); + } else { + ncr->state = STATE_IDLE; + ncr->cur_bus = 0; + } + } else { + ncr_log("Set to SCSI Message Out\n"); + ncr->new_phase = SCSI_PHASE_MESSAGE_OUT; + ncr->wait_data = 4; + ncr->msgout_pos = 0; + ncr->is_msgout = 1; + } + } + break; + case STATE_COMMAND: + if ((bus & BUS_ACK) && !(ncr->bus_in & BUS_ACK)) { + /*Write command byte to the output data register*/ + ncr->command[ncr->command_pos++] = BUS_GETDATA(bus); + ncr->clear_req = 3; + ncr->new_phase = ncr->cur_bus & SCSI_PHASE_MESSAGE_IN; + ncr->cur_bus &= ~BUS_REQ; - ncr_log("Command pos=%i, output data=%02x\n", ncr->command_pos, BUS_GETDATA(bus)); + ncr_log("Command pos=%i, output data=%02x\n", ncr->command_pos, BUS_GETDATA(bus)); - if (ncr->command_pos == cmd_len[(ncr->command[0] >> 5) & 7]) { - if (ncr->is_msgout) { - ncr->is_msgout = 0; - // ncr->command[1] = (ncr->command[1] & 0x1f) | (ncr->msglun << 5); - } + if (ncr->command_pos == cmd_len[(ncr->command[0] >> 5) & 7]) { + if (ncr->is_msgout) { + ncr->is_msgout = 0; + // ncr->command[1] = (ncr->command[1] & 0x1f) | (ncr->msglun << 5); + } - /*Reset data position to default*/ - ncr->data_pos = 0; + /*Reset data position to default*/ + ncr->data_pos = 0; - dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; + dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; - ncr_log("SCSI Command 0x%02X for ID %d, status code=%02x\n", ncr->command[0], ncr->target_id, dev->status); - dev->buffer_length = -1; - scsi_device_command_phase0(dev, ncr->command); - ncr_log("SCSI ID %i: Command %02X: Buffer Length %i, SCSI Phase %02X\n", ncr->target_id, ncr->command[0], dev->buffer_length, dev->phase); + ncr_log("SCSI Command 0x%02X for ID %d, status code=%02x\n", ncr->command[0], ncr->target_id, dev->status); + dev->buffer_length = -1; + scsi_device_command_phase0(dev, ncr->command); + ncr_log("SCSI ID %i: Command %02X: Buffer Length %i, SCSI Phase %02X\n", ncr->target_id, ncr->command[0], dev->buffer_length, dev->phase); - ncr_dev->period = 1.0; - ncr->wait_data = 4; - ncr->data_wait = 0; + ncr_dev->period = 1.0; + ncr->wait_data = 4; + ncr->data_wait = 0; - if (dev->status == SCSI_STATUS_OK) { - /*If the SCSI phase is Data In or Data Out, allocate the SCSI buffer based on the transfer length of the command*/ - if (dev->buffer_length && (dev->phase == SCSI_PHASE_DATA_IN || dev->phase == SCSI_PHASE_DATA_OUT)) { - p = scsi_device_get_callback(dev); - if (p <= 0.0) { - ncr_dev->period = 0.2; - } else { - ncr_dev->period = p / ((double) dev->buffer_length); - } - ncr->data_wait |= 2; - ncr_log("SCSI ID %i: command 0x%02x for p = %lf, update = %lf, len = %i\n", ncr->target_id, ncr->command[0], p, ncr_dev->period, dev->buffer_length); - } - } - ncr->new_phase = dev->phase; - } - } - break; - case STATE_DATAIN: - dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; - if ((bus & BUS_ACK) && !(ncr->bus_in & BUS_ACK)) { - if (ncr->data_pos >= dev->buffer_length) { - ncr->cur_bus &= ~BUS_REQ; - scsi_device_command_phase1(dev); - ncr->new_phase = SCSI_PHASE_STATUS; - ncr->wait_data = 4; - ncr->wait_complete = 8; - } else { - ncr->tx_data = dev->sc->temp_buffer[ncr->data_pos++]; - ncr->cur_bus = (ncr->cur_bus & ~BUS_DATAMASK) | BUS_SETDATA(ncr->tx_data) | BUS_DBP | BUS_REQ; - if (ncr->data_wait & 2) - ncr->data_wait &= ~2; - if (ncr->dma_mode == DMA_IDLE) { /*If a data in command that is not read 6/10 has been issued*/ - ncr->data_wait |= 1; - ncr_log("DMA mode idle in\n"); - timer_on_auto(&ncr_dev->timer, ncr_dev->period); - } else - ncr->clear_req = 3; - ncr->cur_bus &= ~BUS_REQ; - ncr->new_phase = SCSI_PHASE_DATA_IN; - } - } - break; - case STATE_DATAOUT: - dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; - if ((bus & BUS_ACK) && !(ncr->bus_in & BUS_ACK)) { - dev->sc->temp_buffer[ncr->data_pos++] = BUS_GETDATA(bus); + if (dev->status == SCSI_STATUS_OK) { + /*If the SCSI phase is Data In or Data Out, allocate the SCSI buffer based on the transfer length of the command*/ + if (dev->buffer_length && (dev->phase == SCSI_PHASE_DATA_IN || dev->phase == SCSI_PHASE_DATA_OUT)) { + p = scsi_device_get_callback(dev); + if (p <= 0.0) { + ncr_dev->period = 0.2; + } else { + ncr_dev->period = p / ((double) dev->buffer_length); + } + ncr->data_wait |= 2; + ncr_log("SCSI ID %i: command 0x%02x for p = %lf, update = %lf, len = %i\n", ncr->target_id, ncr->command[0], p, ncr_dev->period, dev->buffer_length); + } + } + ncr->new_phase = dev->phase; + } + } + break; + case STATE_DATAIN: + dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; + if ((bus & BUS_ACK) && !(ncr->bus_in & BUS_ACK)) { + if (ncr->data_pos >= dev->buffer_length) { + ncr->cur_bus &= ~BUS_REQ; + scsi_device_command_phase1(dev); + ncr->new_phase = SCSI_PHASE_STATUS; + ncr->wait_data = 4; + ncr->wait_complete = 8; + } else { + ncr->tx_data = dev->sc->temp_buffer[ncr->data_pos++]; + ncr->cur_bus = (ncr->cur_bus & ~BUS_DATAMASK) | BUS_SETDATA(ncr->tx_data) | BUS_DBP | BUS_REQ; + if (ncr->data_wait & 2) + ncr->data_wait &= ~2; + if (ncr->dma_mode == DMA_IDLE) { /*If a data in command that is not read 6/10 has been issued*/ + ncr->data_wait |= 1; + ncr_log("DMA mode idle in\n"); + timer_on_auto(&ncr_dev->timer, ncr_dev->period); + } else + ncr->clear_req = 3; + ncr->cur_bus &= ~BUS_REQ; + ncr->new_phase = SCSI_PHASE_DATA_IN; + } + } + break; + case STATE_DATAOUT: + dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; + if ((bus & BUS_ACK) && !(ncr->bus_in & BUS_ACK)) { + dev->sc->temp_buffer[ncr->data_pos++] = BUS_GETDATA(bus); - if (ncr->data_pos >= dev->buffer_length) { - ncr->cur_bus &= ~BUS_REQ; - scsi_device_command_phase1(dev); - ncr->new_phase = SCSI_PHASE_STATUS; - ncr->wait_data = 4; - ncr->wait_complete = 8; - } else { - /*More data is to be transferred, place a request*/ - if (ncr->dma_mode == DMA_IDLE) { /*If a data out command that is not write 6/10 has been issued*/ - ncr->data_wait |= 1; - ncr_log("DMA mode idle out\n"); - timer_on_auto(&ncr_dev->timer, ncr_dev->period); - } else { - ncr->clear_req = 3; - } - ncr->cur_bus &= ~BUS_REQ; - ncr_log("CurBus ~REQ_DataOut=%02x\n", ncr->cur_bus); - } - } - break; - case STATE_STATUS: - if ((bus & BUS_ACK) && !(ncr->bus_in & BUS_ACK)) { - /*All transfers done, wait until next transfer*/ - scsi_device_identify(&scsi_devices[ncr_dev->bus][ncr->target_id], SCSI_LUN_USE_CDB); - ncr->cur_bus &= ~BUS_REQ; - ncr->new_phase = SCSI_PHASE_MESSAGE_IN; - ncr->wait_data = 4; - ncr->wait_complete = 8; - } - break; - case STATE_MESSAGEIN: - if ((bus & BUS_ACK) && !(ncr->bus_in & BUS_ACK)) { - ncr->cur_bus &= ~BUS_REQ; - ncr->new_phase = BUS_IDLE; - ncr->wait_data = 4; - } - break; - case STATE_MESSAGEOUT: - ncr_log("Ack on MSGOUT = %02x\n", (bus & BUS_ACK)); - if ((bus & BUS_ACK) && !(ncr->bus_in & BUS_ACK)) { - ncr->msgout[ncr->msgout_pos++] = BUS_GETDATA(bus); - msglen = getmsglen(ncr->msgout, ncr->msgout_pos); - if (ncr->msgout_pos >= msglen) { - if ((ncr->msgout[0] & (0x80 | 0x20)) == 0x80) - ncr->msglun = ncr->msgout[0] & 7; - ncr->cur_bus &= ~BUS_REQ; - ncr->state = STATE_MESSAGE_ID; - } - } - break; - case STATE_MESSAGE_ID: - if ((ncr->target_id != (uint8_t)-1) && scsi_device_present(&scsi_devices[ncr_dev->bus][ncr->target_id])) { - ncr_log("Device found at ID %i on MSGOUT, Current Bus BSY=%02x\n", ncr->target_id, ncr->cur_bus); - scsi_device_identify(&scsi_devices[ncr_dev->bus][ncr->target_id], ncr->msglun); - ncr->state = STATE_COMMAND; - ncr->cur_bus = BUS_BSY | BUS_REQ; - ncr_log("CurBus BSY|REQ=%02x\n", ncr->cur_bus); - ncr->command_pos = 0; - SET_BUS_STATE(ncr, SCSI_PHASE_COMMAND); - } - break; + if (ncr->data_pos >= dev->buffer_length) { + ncr->cur_bus &= ~BUS_REQ; + scsi_device_command_phase1(dev); + ncr->new_phase = SCSI_PHASE_STATUS; + ncr->wait_data = 4; + ncr->wait_complete = 8; + } else { + /*More data is to be transferred, place a request*/ + if (ncr->dma_mode == DMA_IDLE) { /*If a data out command that is not write 6/10 has been issued*/ + ncr->data_wait |= 1; + ncr_log("DMA mode idle out\n"); + timer_on_auto(&ncr_dev->timer, ncr_dev->period); + } else { + ncr->clear_req = 3; + } + ncr->cur_bus &= ~BUS_REQ; + ncr_log("CurBus ~REQ_DataOut=%02x\n", ncr->cur_bus); + } + } + break; + case STATE_STATUS: + if ((bus & BUS_ACK) && !(ncr->bus_in & BUS_ACK)) { + /*All transfers done, wait until next transfer*/ + scsi_device_identify(&scsi_devices[ncr_dev->bus][ncr->target_id], SCSI_LUN_USE_CDB); + ncr->cur_bus &= ~BUS_REQ; + ncr->new_phase = SCSI_PHASE_MESSAGE_IN; + ncr->wait_data = 4; + ncr->wait_complete = 8; + } + break; + case STATE_MESSAGEIN: + if ((bus & BUS_ACK) && !(ncr->bus_in & BUS_ACK)) { + ncr->cur_bus &= ~BUS_REQ; + ncr->new_phase = BUS_IDLE; + ncr->wait_data = 4; + } + break; + case STATE_MESSAGEOUT: + ncr_log("Ack on MSGOUT = %02x\n", (bus & BUS_ACK)); + if ((bus & BUS_ACK) && !(ncr->bus_in & BUS_ACK)) { + ncr->msgout[ncr->msgout_pos++] = BUS_GETDATA(bus); + msglen = getmsglen(ncr->msgout, ncr->msgout_pos); + if (ncr->msgout_pos >= msglen) { + if ((ncr->msgout[0] & (0x80 | 0x20)) == 0x80) + ncr->msglun = ncr->msgout[0] & 7; + ncr->cur_bus &= ~BUS_REQ; + ncr->state = STATE_MESSAGE_ID; + } + } + break; + case STATE_MESSAGE_ID: + if ((ncr->target_id != (uint8_t) -1) && scsi_device_present(&scsi_devices[ncr_dev->bus][ncr->target_id])) { + ncr_log("Device found at ID %i on MSGOUT, Current Bus BSY=%02x\n", ncr->target_id, ncr->cur_bus); + scsi_device_identify(&scsi_devices[ncr_dev->bus][ncr->target_id], ncr->msglun); + ncr->state = STATE_COMMAND; + ncr->cur_bus = BUS_BSY | BUS_REQ; + ncr_log("CurBus BSY|REQ=%02x\n", ncr->cur_bus); + ncr->command_pos = 0; + SET_BUS_STATE(ncr, SCSI_PHASE_COMMAND); + } + break; } ncr->bus_in = bus; } - static void ncr_write(uint16_t port, uint8_t val, void *priv) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; - ncr_t *ncr = &ncr_dev->ncr; - scsi_device_t *dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; - int bus_host = 0; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; + ncr_t *ncr = &ncr_dev->ncr; + scsi_device_t *dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; + int bus_host = 0; - ncr_log("NCR5380 write(%04x,%02x)\n",port & 7,val); + ncr_log("NCR5380 write(%04x,%02x)\n", port & 7, val); switch (port & 7) { - case 0: /* Output data register */ - ncr_log("Write: Output data register, val = %02x\n", val); - ncr->output_data = val; - break; + case 0: /* Output data register */ + ncr_log("Write: Output data register, val = %02x\n", val); + ncr->output_data = val; + break; - case 1: /* Initiator Command Register */ - ncr_log("Write: Initiator command register\n"); - if ((val & 0x80) && !(ncr->icr & 0x80)) { - ncr_log("Resetting the 5380\n"); - ncr_reset(ncr_dev, &ncr_dev->ncr); - } - ncr->icr = val; - break; + case 1: /* Initiator Command Register */ + ncr_log("Write: Initiator command register\n"); + if ((val & 0x80) && !(ncr->icr & 0x80)) { + ncr_log("Resetting the 5380\n"); + ncr_reset(ncr_dev, &ncr_dev->ncr); + } + ncr->icr = val; + break; - case 2: /* Mode register */ - ncr_log("Write: Mode register, val=%02x\n", val & MODE_DMA); - if ((val & MODE_ARBITRATE) && !(ncr->mode & MODE_ARBITRATE)) { - ncr->icr &= ~ICR_ARB_LOST; - ncr->icr |= ICR_ARB_IN_PROGRESS; - } + case 2: /* Mode register */ + ncr_log("Write: Mode register, val=%02x\n", val & MODE_DMA); + if ((val & MODE_ARBITRATE) && !(ncr->mode & MODE_ARBITRATE)) { + ncr->icr &= ~ICR_ARB_LOST; + ncr->icr |= ICR_ARB_IN_PROGRESS; + } - ncr->mode = val; + ncr->mode = val; - if (ncr_dev->type == 3) { - /*Don't stop the timer until it finishes the transfer*/ - if (ncr_dev->t128.block_loaded && (ncr->mode & MODE_DMA)) { - ncr_log("Continuing DMA mode\n"); - ncr_timer_on(ncr_dev, ncr, 0); - } + if (ncr_dev->type == 3) { + /*Don't stop the timer until it finishes the transfer*/ + if (ncr_dev->t128.block_loaded && (ncr->mode & MODE_DMA)) { + ncr_log("Continuing DMA mode\n"); + ncr_timer_on(ncr_dev, ncr, 0); + } - /*When a pseudo-DMA transfer has completed (Send or Initiator Receive), mark it as complete and idle the status*/ - if (!ncr_dev->t128.block_loaded && !(ncr->mode & MODE_DMA)) { - ncr_log("No DMA mode\n"); - ncr->tcr &= ~TCR_LAST_BYTE_SENT; - ncr->isr &= ~STATUS_END_OF_DMA; - ncr->dma_mode = DMA_IDLE; - } - } else { - /*Don't stop the timer until it finishes the transfer*/ - if (ncr_dev->block_count_loaded && (ncr->mode & MODE_DMA) && !timer_is_enabled(&ncr_dev->timer)) { - ncr_log("Continuing DMA mode\n"); - ncr_timer_on(ncr_dev, ncr, 0); - } + /*When a pseudo-DMA transfer has completed (Send or Initiator Receive), mark it as complete and idle the status*/ + if (!ncr_dev->t128.block_loaded && !(ncr->mode & MODE_DMA)) { + ncr_log("No DMA mode\n"); + ncr->tcr &= ~TCR_LAST_BYTE_SENT; + ncr->isr &= ~STATUS_END_OF_DMA; + ncr->dma_mode = DMA_IDLE; + } + } else { + /*Don't stop the timer until it finishes the transfer*/ + if (ncr_dev->block_count_loaded && (ncr->mode & MODE_DMA) && !timer_is_enabled(&ncr_dev->timer)) { + ncr_log("Continuing DMA mode\n"); + ncr_timer_on(ncr_dev, ncr, 0); + } - /*When a pseudo-DMA transfer has completed (Send or Initiator Receive), mark it as complete and idle the status*/ - if (!ncr_dev->block_count_loaded && !(ncr->mode & MODE_DMA)) { - ncr_log("No DMA mode\n"); - ncr->tcr &= ~TCR_LAST_BYTE_SENT; - ncr->isr &= ~STATUS_END_OF_DMA; - ncr->dma_mode = DMA_IDLE; - } - } - break; + /*When a pseudo-DMA transfer has completed (Send or Initiator Receive), mark it as complete and idle the status*/ + if (!ncr_dev->block_count_loaded && !(ncr->mode & MODE_DMA)) { + ncr_log("No DMA mode\n"); + ncr->tcr &= ~TCR_LAST_BYTE_SENT; + ncr->isr &= ~STATUS_END_OF_DMA; + ncr->dma_mode = DMA_IDLE; + } + } + break; - case 3: /* Target Command Register */ - ncr_log("Write: Target Command register\n"); - ncr->tcr = val; - break; + case 3: /* Target Command Register */ + ncr_log("Write: Target Command register\n"); + ncr->tcr = val; + break; - case 4: /* Select Enable Register */ - ncr_log("Write: Select Enable register\n"); - break; + case 4: /* Select Enable Register */ + ncr_log("Write: Select Enable register\n"); + break; - case 5: /* start DMA Send */ - ncr_log("Write: start DMA send register\n"); - /*a Write 6/10 has occurred, start the timer when the block count is loaded*/ - ncr->dma_mode = DMA_SEND; - if (ncr_dev->type == 3) { - if (dev->buffer_length > 0) { - memset(ncr_dev->t128.buffer, 0, MIN(512, dev->buffer_length)); + case 5: /* start DMA Send */ + ncr_log("Write: start DMA send register\n"); + /*a Write 6/10 has occurred, start the timer when the block count is loaded*/ + ncr->dma_mode = DMA_SEND; + if (ncr_dev->type == 3) { + if (dev->buffer_length > 0) { + memset(ncr_dev->t128.buffer, 0, MIN(512, dev->buffer_length)); - ncr_log("DMA send timer start, enabled? = %i\n", timer_is_enabled(&ncr_dev->timer)); - ncr_dev->t128.block_count = dev->buffer_length >> 9; - ncr_dev->t128.block_loaded = 1; + ncr_log("DMA send timer start, enabled? = %i\n", timer_is_enabled(&ncr_dev->timer)); + ncr_dev->t128.block_count = dev->buffer_length >> 9; + ncr_dev->t128.block_loaded = 1; - ncr_dev->t128.host_pos = 0; - ncr_dev->t128.status |= 0x04; - } - } else { - if ((ncr->mode & MODE_DMA) && !timer_is_enabled(&ncr_dev->timer)) { - memset(ncr_dev->buffer, 0, MIN(128, dev->buffer_length)); + ncr_dev->t128.host_pos = 0; + ncr_dev->t128.status |= 0x04; + } + } else { + if ((ncr->mode & MODE_DMA) && !timer_is_enabled(&ncr_dev->timer)) { + memset(ncr_dev->buffer, 0, MIN(128, dev->buffer_length)); - ncr_log("DMA send timer on\n"); - ncr_timer_on(ncr_dev, ncr, 0); - } - } - break; + ncr_log("DMA send timer on\n"); + ncr_timer_on(ncr_dev, ncr, 0); + } + } + break; - case 7: /* start DMA Initiator Receive */ - ncr_log("Write: start DMA initiator receive register, dma? = %02x\n", ncr->mode & MODE_DMA); - /*a Read 6/10 has occurred, start the timer when the block count is loaded*/ - ncr->dma_mode = DMA_INITIATOR_RECEIVE; - if (ncr_dev->type == 3) { - ncr_log("DMA receive timer start, enabled? = %i, cdb[0] = %02x, buflen = %i\n", timer_is_enabled(&ncr_dev->timer), ncr->command[0], dev->buffer_length); - if (dev->buffer_length > 0) { - memset(ncr_dev->t128.buffer, 0, MIN(512, dev->buffer_length)); + case 7: /* start DMA Initiator Receive */ + ncr_log("Write: start DMA initiator receive register, dma? = %02x\n", ncr->mode & MODE_DMA); + /*a Read 6/10 has occurred, start the timer when the block count is loaded*/ + ncr->dma_mode = DMA_INITIATOR_RECEIVE; + if (ncr_dev->type == 3) { + ncr_log("DMA receive timer start, enabled? = %i, cdb[0] = %02x, buflen = %i\n", timer_is_enabled(&ncr_dev->timer), ncr->command[0], dev->buffer_length); + if (dev->buffer_length > 0) { + memset(ncr_dev->t128.buffer, 0, MIN(512, dev->buffer_length)); - ncr_dev->t128.block_count = dev->buffer_length >> 9; + ncr_dev->t128.block_count = dev->buffer_length >> 9; - if (dev->buffer_length < 512) - ncr_dev->t128.block_count = 1; + if (dev->buffer_length < 512) + ncr_dev->t128.block_count = 1; - ncr_dev->t128.block_loaded = 1; + ncr_dev->t128.block_loaded = 1; - ncr_dev->t128.host_pos = MIN(512, dev->buffer_length); - ncr_dev->t128.status |= 0x04; - timer_on_auto(&ncr_dev->timer, 0.02); - } - } else { - if ((ncr->mode & MODE_DMA) && !timer_is_enabled(&ncr_dev->timer)) { - memset(ncr_dev->buffer, 0, MIN(128, dev->buffer_length)); + ncr_dev->t128.host_pos = MIN(512, dev->buffer_length); + ncr_dev->t128.status |= 0x04; + timer_on_auto(&ncr_dev->timer, 0.02); + } + } else { + if ((ncr->mode & MODE_DMA) && !timer_is_enabled(&ncr_dev->timer)) { + memset(ncr_dev->buffer, 0, MIN(128, dev->buffer_length)); - ncr_log("DMA receive timer start\n"); - ncr_timer_on(ncr_dev, ncr, 0); - } - } - break; + ncr_log("DMA receive timer start\n"); + ncr_timer_on(ncr_dev, ncr, 0); + } + } + break; - default: - ncr_log("NCR5380: bad write %04x %02x\n", port, val); - break; + default: + ncr_log("NCR5380: bad write %04x %02x\n", port, val); + break; } if (ncr->dma_mode == DMA_IDLE || ncr_dev->type == 0 || ncr_dev->type >= 3) { - bus_host = get_bus_host(ncr); - ncr_bus_update(priv, bus_host); + bus_host = get_bus_host(ncr); + ncr_bus_update(priv, bus_host); } } - static uint8_t ncr_read(uint16_t port, void *priv) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; - ncr_t *ncr = &ncr_dev->ncr; - uint8_t ret = 0xff; - int bus, bus_state; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; + ncr_t *ncr = &ncr_dev->ncr; + uint8_t ret = 0xff; + int bus, bus_state; switch (port & 7) { - case 0: /* Current SCSI data */ - ncr_log("Read: Current SCSI data register\n"); - if (ncr->icr & ICR_DBP) { - /*Return the data from the output register if on data bus phase from ICR*/ - ncr_log("Data Bus Phase, ret = %02x\n", ncr->output_data); - ret = ncr->output_data; - } else { - /*Return the data from the SCSI bus*/ - ncr_bus_read(ncr_dev); - ncr_log("NCR GetData=%02x\n", BUS_GETDATA(ncr->cur_bus)); - ret = BUS_GETDATA(ncr->cur_bus); - } - break; + case 0: /* Current SCSI data */ + ncr_log("Read: Current SCSI data register\n"); + if (ncr->icr & ICR_DBP) { + /*Return the data from the output register if on data bus phase from ICR*/ + ncr_log("Data Bus Phase, ret = %02x\n", ncr->output_data); + ret = ncr->output_data; + } else { + /*Return the data from the SCSI bus*/ + ncr_bus_read(ncr_dev); + ncr_log("NCR GetData=%02x\n", BUS_GETDATA(ncr->cur_bus)); + ret = BUS_GETDATA(ncr->cur_bus); + } + break; - case 1: /* Initiator Command Register */ - ncr_log("Read: Initiator Command register, NCR ICR Read=%02x\n", ncr->icr); - ret = ncr->icr; - break; + case 1: /* Initiator Command Register */ + ncr_log("Read: Initiator Command register, NCR ICR Read=%02x\n", ncr->icr); + ret = ncr->icr; + break; - case 2: /* Mode register */ - if (((ncr->mode & 0x30) == 0x30) && ((ncr_dev->type == 1) && (ncr_dev->bios_ver == 1))) - ncr->mode = 0; - if (((ncr->mode & 0x20) == 0x20) && (ncr_dev->type == 0)) - ncr->mode = 0; + case 2: /* Mode register */ + if (((ncr->mode & 0x30) == 0x30) && ((ncr_dev->type == 1) && (ncr_dev->bios_ver == 1))) + ncr->mode = 0; + if (((ncr->mode & 0x20) == 0x20) && (ncr_dev->type == 0)) + ncr->mode = 0; - ncr_log("Read: Mode register\n"); - ret = ncr->mode; - break; + ncr_log("Read: Mode register\n"); + ret = ncr->mode; + break; - case 3: /* Target Command Register */ - ncr_log("Read: Target Command register, NCR target stat=%02x\n", ncr->tcr); - ret = ncr->tcr; - break; + case 3: /* Target Command Register */ + ncr_log("Read: Target Command register, NCR target stat=%02x\n", ncr->tcr); + ret = ncr->tcr; + break; - case 4: /* Current SCSI Bus status */ - ncr_log("Read: SCSI bus status register\n"); - ret = 0; - ncr_bus_read(ncr_dev); - ncr_log("NCR cur bus stat=%02x\n", ncr->cur_bus & 0xff); - ret |= (ncr->cur_bus & 0xff); - if ((ncr->icr & ICR_SEL) && ((ncr_dev->type == 1) && (ncr_dev->bios_ver == 1))) - ret |= 0x02; - if ((ncr->icr & ICR_BSY) && ((ncr_dev->type == 1) && (ncr_dev->bios_ver == 1))) - ret |= 0x40; - break; + case 4: /* Current SCSI Bus status */ + ncr_log("Read: SCSI bus status register\n"); + ret = 0; + ncr_bus_read(ncr_dev); + ncr_log("NCR cur bus stat=%02x\n", ncr->cur_bus & 0xff); + ret |= (ncr->cur_bus & 0xff); + if ((ncr->icr & ICR_SEL) && ((ncr_dev->type == 1) && (ncr_dev->bios_ver == 1))) + ret |= 0x02; + if ((ncr->icr & ICR_BSY) && ((ncr_dev->type == 1) && (ncr_dev->bios_ver == 1))) + ret |= 0x40; + break; - case 5: /* Bus and Status register */ - ncr_log("Read: Bus and Status register\n"); - ret = 0; + case 5: /* Bus and Status register */ + ncr_log("Read: Bus and Status register\n"); + ret = 0; - bus = get_bus_host(ncr); - ncr_log("Get host from Interrupt\n"); + bus = get_bus_host(ncr); + ncr_log("Get host from Interrupt\n"); - /*Check if the phase in process matches with TCR's*/ - if ((bus & SCSI_PHASE_MESSAGE_IN) == (ncr->cur_bus & SCSI_PHASE_MESSAGE_IN)) { - ncr_log("Phase match\n"); - ret |= STATUS_PHASE_MATCH; - } + /*Check if the phase in process matches with TCR's*/ + if ((bus & SCSI_PHASE_MESSAGE_IN) == (ncr->cur_bus & SCSI_PHASE_MESSAGE_IN)) { + ncr_log("Phase match\n"); + ret |= STATUS_PHASE_MATCH; + } - ncr_bus_read(ncr_dev); - bus = ncr->cur_bus; + ncr_bus_read(ncr_dev); + bus = ncr->cur_bus; - if ((bus & BUS_ACK) || ((ncr->icr & ICR_ACK) && ((ncr_dev->type == 1) && (ncr_dev->bios_ver == 1)))) - ret |= STATUS_ACK; - if ((bus & BUS_ATN) || ((ncr->icr & ICR_ATN) && ((ncr_dev->type == 1) && (ncr_dev->bios_ver == 1)))) - ret |= 0x02; + if ((bus & BUS_ACK) || ((ncr->icr & ICR_ACK) && ((ncr_dev->type == 1) && (ncr_dev->bios_ver == 1)))) + ret |= STATUS_ACK; + if ((bus & BUS_ATN) || ((ncr->icr & ICR_ATN) && ((ncr_dev->type == 1) && (ncr_dev->bios_ver == 1)))) + ret |= 0x02; - if ((bus & BUS_REQ) && (ncr->mode & MODE_DMA)) { - ncr_log("Entering DMA mode\n"); - ret |= STATUS_DRQ; + if ((bus & BUS_REQ) && (ncr->mode & MODE_DMA)) { + ncr_log("Entering DMA mode\n"); + ret |= STATUS_DRQ; - bus_state = 0; + bus_state = 0; - if (bus & BUS_IO) - bus_state |= TCR_IO; - if (bus & BUS_CD) - bus_state |= TCR_CD; - if (bus & BUS_MSG) - bus_state |= TCR_MSG; - if ((ncr->tcr & 7) != bus_state) { - ncr_irq(ncr_dev, ncr, 1); - ncr_log("IRQ issued\n"); - } - } - if (!(bus & BUS_BSY) && (ncr->mode & MODE_MONITOR_BUSY)) { - ncr_log("Busy error\n"); - ret |= STATUS_BUSY_ERROR; - } - ret |= (ncr->isr & (STATUS_INT | STATUS_END_OF_DMA)); - break; + if (bus & BUS_IO) + bus_state |= TCR_IO; + if (bus & BUS_CD) + bus_state |= TCR_CD; + if (bus & BUS_MSG) + bus_state |= TCR_MSG; + if ((ncr->tcr & 7) != bus_state) { + ncr_irq(ncr_dev, ncr, 1); + ncr_log("IRQ issued\n"); + } + } + if (!(bus & BUS_BSY) && (ncr->mode & MODE_MONITOR_BUSY)) { + ncr_log("Busy error\n"); + ret |= STATUS_BUSY_ERROR; + } + ret |= (ncr->isr & (STATUS_INT | STATUS_END_OF_DMA)); + break; - case 6: - ret = ncr->tx_data; - break; + case 6: + ret = ncr->tx_data; + break; - case 7: /* reset Parity/Interrupt */ - ncr->isr &= ~(STATUS_BUSY_ERROR | 0x20); - ncr_irq(ncr_dev, ncr, 0); - ncr_log("Reset Interrupt\n"); - break; + case 7: /* reset Parity/Interrupt */ + ncr->isr &= ~(STATUS_BUSY_ERROR | 0x20); + ncr_irq(ncr_dev, ncr, 0); + ncr_log("Reset Interrupt\n"); + break; - default: - ncr_log("NCR5380: bad read %04x\n", port); - break; + default: + ncr_log("NCR5380: bad read %04x\n", port); + break; } ncr_log("NCR5380 read(%04x)=%02x\n", port & 7, ret); - return(ret); + return (ret); } - /* Memory-mapped I/O READ handler. */ static uint8_t memio_read(uint32_t addr, void *priv) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; - ncr_t *ncr = &ncr_dev->ncr; - scsi_device_t *dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; - uint8_t ret = 0xff; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; + ncr_t *ncr = &ncr_dev->ncr; + scsi_device_t *dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; + uint8_t ret = 0xff; addr &= 0x3fff; if (addr < 0x2000) - ret = ncr_dev->bios_rom.rom[addr & 0x1fff]; + ret = ncr_dev->bios_rom.rom[addr & 0x1fff]; else if (addr < 0x3800) - ret = 0xff; + ret = 0xff; else if (addr >= 0x3a00) - ret = ncr_dev->ext_ram[addr - 0x3a00]; - else switch (addr & 0x3f80) { - case 0x3800: + ret = ncr_dev->ext_ram[addr - 0x3a00]; + else + switch (addr & 0x3f80) { + case 0x3800: #if ENABLE_NCR5380_LOG - ncr_log("Read intRAM %02x %02x\n", addr & 0x3f, ncr_dev->int_ram[addr & 0x3f]); + ncr_log("Read intRAM %02x %02x\n", addr & 0x3f, ncr_dev->int_ram[addr & 0x3f]); #endif - ret = ncr_dev->int_ram[addr & 0x3f]; - break; + ret = ncr_dev->int_ram[addr & 0x3f]; + break; - case 0x3880: + case 0x3880: #if ENABLE_NCR5380_LOG - ncr_log("Read 53c80 %04x\n", addr); + ncr_log("Read 53c80 %04x\n", addr); #endif - ret = ncr_read(addr, ncr_dev); - break; + ret = ncr_read(addr, ncr_dev); + break; - case 0x3900: - if (ncr_dev->buffer_host_pos >= MIN(128, dev->buffer_length) || !(ncr_dev->status_ctrl & CTRL_DATA_DIR)) { - ret = 0xff; - } else { - ret = ncr_dev->buffer[ncr_dev->buffer_host_pos++]; + case 0x3900: + if (ncr_dev->buffer_host_pos >= MIN(128, dev->buffer_length) || !(ncr_dev->status_ctrl & CTRL_DATA_DIR)) { + ret = 0xff; + } else { + ret = ncr_dev->buffer[ncr_dev->buffer_host_pos++]; - if (ncr_dev->buffer_host_pos == MIN(128, dev->buffer_length)) { - ncr_dev->status_ctrl |= STATUS_BUFFER_NOT_READY; - ncr_log("Transfer busy read, status = %02x\n", ncr_dev->status_ctrl); - } - } - break; + if (ncr_dev->buffer_host_pos == MIN(128, dev->buffer_length)) { + ncr_dev->status_ctrl |= STATUS_BUFFER_NOT_READY; + ncr_log("Transfer busy read, status = %02x\n", ncr_dev->status_ctrl); + } + } + break; - case 0x3980: - switch (addr) { - case 0x3980: /* status */ - ret = ncr_dev->status_ctrl; - ncr_log("NCR status ctrl read=%02x\n", ncr_dev->status_ctrl & STATUS_BUFFER_NOT_READY); - if (!ncr_dev->ncr_busy) - ret |= STATUS_53C80_ACCESSIBLE; - break; + case 0x3980: + switch (addr) { + case 0x3980: /* status */ + ret = ncr_dev->status_ctrl; + ncr_log("NCR status ctrl read=%02x\n", ncr_dev->status_ctrl & STATUS_BUFFER_NOT_READY); + if (!ncr_dev->ncr_busy) + ret |= STATUS_53C80_ACCESSIBLE; + break; - case 0x3981: /* block counter register*/ - ret = ncr_dev->block_count; - break; + case 0x3981: /* block counter register*/ + ret = ncr_dev->block_count; + break; - case 0x3982: /* switch register read */ - ret = 0xff; - break; + case 0x3982: /* switch register read */ + ret = 0xff; + break; - case 0x3983: - ret = 0xff; - break; - } - break; - } + case 0x3983: + ret = 0xff; + break; + } + break; + } #if ENABLE_NCR5380_LOG if (addr >= 0x3880) - ncr_log("memio_read(%08x)=%02x\n", addr, ret); + ncr_log("memio_read(%08x)=%02x\n", addr, ret); #endif - return(ret); + return (ret); } - /* Memory-mapped I/O WRITE handler. */ static void memio_write(uint32_t addr, uint8_t val, void *priv) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; - ncr_t *ncr = &ncr_dev->ncr; - scsi_device_t *dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; + ncr_t *ncr = &ncr_dev->ncr; + scsi_device_t *dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; addr &= 0x3fff; if (addr >= 0x3a00) - ncr_dev->ext_ram[addr - 0x3a00] = val; - else switch (addr & 0x3f80) { - case 0x3800: - ncr_dev->int_ram[addr & 0x3f] = val; - break; + ncr_dev->ext_ram[addr - 0x3a00] = val; + else + switch (addr & 0x3f80) { + case 0x3800: + ncr_dev->int_ram[addr & 0x3f] = val; + break; - case 0x3880: - ncr_write(addr, val, ncr_dev); - break; + case 0x3880: + ncr_write(addr, val, ncr_dev); + break; - case 0x3900: - if (!(ncr_dev->status_ctrl & CTRL_DATA_DIR) && ncr_dev->buffer_host_pos < MIN(128, dev->buffer_length)) { - ncr_dev->buffer[ncr_dev->buffer_host_pos++] = val; + case 0x3900: + if (!(ncr_dev->status_ctrl & CTRL_DATA_DIR) && ncr_dev->buffer_host_pos < MIN(128, dev->buffer_length)) { + ncr_dev->buffer[ncr_dev->buffer_host_pos++] = val; - ncr_log("Write host pos = %i, val = %02x\n", ncr_dev->buffer_host_pos, val); + ncr_log("Write host pos = %i, val = %02x\n", ncr_dev->buffer_host_pos, val); - if (ncr_dev->buffer_host_pos == MIN(128, dev->buffer_length)) { - ncr_dev->status_ctrl |= STATUS_BUFFER_NOT_READY; - ncr_dev->ncr_busy = 1; - } - } - break; + if (ncr_dev->buffer_host_pos == MIN(128, dev->buffer_length)) { + ncr_dev->status_ctrl |= STATUS_BUFFER_NOT_READY; + ncr_dev->ncr_busy = 1; + } + } + break; - case 0x3980: - switch (addr) { - case 0x3980: /* Control */ - if ((val & CTRL_DATA_DIR) && !(ncr_dev->status_ctrl & CTRL_DATA_DIR)) { - ncr_dev->buffer_host_pos = MIN(128, dev->buffer_length); - ncr_dev->status_ctrl |= STATUS_BUFFER_NOT_READY; - } - else if (!(val & CTRL_DATA_DIR) && (ncr_dev->status_ctrl & CTRL_DATA_DIR)) { - ncr_dev->buffer_host_pos = 0; - ncr_dev->status_ctrl &= ~STATUS_BUFFER_NOT_READY; - } - ncr_dev->status_ctrl = (ncr_dev->status_ctrl & 0x87) | (val & 0x78); - break; + case 0x3980: + switch (addr) { + case 0x3980: /* Control */ + if ((val & CTRL_DATA_DIR) && !(ncr_dev->status_ctrl & CTRL_DATA_DIR)) { + ncr_dev->buffer_host_pos = MIN(128, dev->buffer_length); + ncr_dev->status_ctrl |= STATUS_BUFFER_NOT_READY; + } else if (!(val & CTRL_DATA_DIR) && (ncr_dev->status_ctrl & CTRL_DATA_DIR)) { + ncr_dev->buffer_host_pos = 0; + ncr_dev->status_ctrl &= ~STATUS_BUFFER_NOT_READY; + } + ncr_dev->status_ctrl = (ncr_dev->status_ctrl & 0x87) | (val & 0x78); + break; - case 0x3981: /* block counter register */ - ncr_log("Write block counter register: val=%d, dma mode = %i, period = %lf\n", val, ncr->dma_mode, ncr_dev->period); - ncr_dev->block_count = val; - ncr_dev->block_count_loaded = 1; + case 0x3981: /* block counter register */ + ncr_log("Write block counter register: val=%d, dma mode = %i, period = %lf\n", val, ncr->dma_mode, ncr_dev->period); + ncr_dev->block_count = val; + ncr_dev->block_count_loaded = 1; - if (ncr->mode & MODE_DMA) - ncr_timer_on(ncr_dev, ncr, 0); + if (ncr->mode & MODE_DMA) + ncr_timer_on(ncr_dev, ncr, 0); - if (ncr_dev->status_ctrl & CTRL_DATA_DIR) { - ncr_dev->buffer_host_pos = MIN(128, dev->buffer_length); - ncr_dev->status_ctrl |= STATUS_BUFFER_NOT_READY; - } else { - ncr_dev->buffer_host_pos = 0; - ncr_dev->status_ctrl &= ~STATUS_BUFFER_NOT_READY; - } - break; - } - break; - } + if (ncr_dev->status_ctrl & CTRL_DATA_DIR) { + ncr_dev->buffer_host_pos = MIN(128, dev->buffer_length); + ncr_dev->status_ctrl |= STATUS_BUFFER_NOT_READY; + } else { + ncr_dev->buffer_host_pos = 0; + ncr_dev->status_ctrl &= ~STATUS_BUFFER_NOT_READY; + } + break; + } + break; + } } - /* Memory-mapped I/O READ handler for the Trantor T130B. */ static uint8_t t130b_read(uint32_t addr, void *priv) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; - uint8_t ret = 0xff; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; + uint8_t ret = 0xff; addr &= 0x3fff; if (addr < 0x1800) - ret = ncr_dev->bios_rom.rom[addr & 0x1fff]; + ret = ncr_dev->bios_rom.rom[addr & 0x1fff]; else if (addr >= 0x1800 && addr < 0x1880) - ret = ncr_dev->ext_ram[addr & 0x7f]; + ret = ncr_dev->ext_ram[addr & 0x7f]; ncr_log("MEM: Reading %02X from %08X\n", ret, addr); - return(ret); + return (ret); } - /* Memory-mapped I/O WRITE handler for the Trantor T130B. */ static void t130b_write(uint32_t addr, uint8_t val, void *priv) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; addr &= 0x3fff; ncr_log("MEM: Writing %02X to %08X\n", val, addr); if (addr >= 0x1800 && addr < 0x1880) - ncr_dev->ext_ram[addr & 0x7f] = val; + ncr_dev->ext_ram[addr & 0x7f] = val; } - static uint8_t t130b_in(uint16_t port, void *priv) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; - uint8_t ret = 0xff; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; + uint8_t ret = 0xff; switch (port & 0x0f) { - case 0x00: case 0x01: case 0x02: case 0x03: - ret = memio_read((port & 7) | 0x3980, ncr_dev); - break; + case 0x00: + case 0x01: + case 0x02: + case 0x03: + ret = memio_read((port & 7) | 0x3980, ncr_dev); + break; - case 0x04: case 0x05: - ret = memio_read(0x3900, ncr_dev); - break; + case 0x04: + case 0x05: + ret = memio_read(0x3900, ncr_dev); + break; - case 0x08: case 0x09: case 0x0a: case 0x0b: - case 0x0c: case 0x0d: case 0x0e: case 0x0f: - ret = ncr_read(port, ncr_dev); - break; + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: + ret = ncr_read(port, ncr_dev); + break; } ncr_log("I/O: Reading %02X from %04X\n", ret, port); - return(ret); + return (ret); } - static void t130b_out(uint16_t port, uint8_t val, void *priv) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; ncr_log("I/O: Writing %02X to %04X\n", val, port); switch (port & 0x0f) { - case 0x00: case 0x01: case 0x02: case 0x03: - memio_write((port & 7) | 0x3980, val, ncr_dev); - break; + case 0x00: + case 0x01: + case 0x02: + case 0x03: + memio_write((port & 7) | 0x3980, val, ncr_dev); + break; - case 0x04: case 0x05: - memio_write(0x3900, val, ncr_dev); - break; + case 0x04: + case 0x05: + memio_write(0x3900, val, ncr_dev); + break; - case 0x08: case 0x09: case 0x0a: case 0x0b: - case 0x0c: case 0x0d: case 0x0e: case 0x0f: - ncr_write(port, val, ncr_dev); - break; + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: + ncr_write(port, val, ncr_dev); + break; } } static void ncr_dma_send(ncr5380_t *ncr_dev, ncr_t *ncr, scsi_device_t *dev) { - int bus, c = 0; + int bus, c = 0; uint8_t data; if (scsi_device_get_callback(dev) > 0.0) - ncr_timer_on(ncr_dev, ncr, 1); + ncr_timer_on(ncr_dev, ncr, 1); else - ncr_timer_on(ncr_dev, ncr, 0); + ncr_timer_on(ncr_dev, ncr, 0); for (c = 0; c < 10; c++) { - ncr_bus_read(ncr_dev); - if (ncr->cur_bus & BUS_REQ) - break; + ncr_bus_read(ncr_dev); + if (ncr->cur_bus & BUS_REQ) + break; } /* Data ready. */ if (ncr_dev->type == 3) - data = ncr_dev->t128.buffer[ncr_dev->t128.pos]; - else - data = ncr_dev->buffer[ncr_dev->buffer_pos]; + data = ncr_dev->t128.buffer[ncr_dev->t128.pos]; + else + data = ncr_dev->buffer[ncr_dev->buffer_pos]; bus = get_bus_host(ncr) & ~BUS_DATAMASK; bus |= BUS_SETDATA(data); ncr_bus_update(ncr_dev, bus | BUS_ACK); ncr_bus_update(ncr_dev, bus & ~BUS_ACK); - if (ncr_dev->type == 3) { - ncr_dev->t128.pos++; - ncr_log("Buffer pos for writing = %d, data = %02x\n", ncr_dev->t128.pos, data); + if (ncr_dev->type == 3) { + ncr_dev->t128.pos++; + ncr_log("Buffer pos for writing = %d, data = %02x\n", ncr_dev->t128.pos, data); - if (ncr_dev->t128.pos == MIN(512, dev->buffer_length)) { - ncr_dev->t128.pos = 0; - ncr_dev->t128.host_pos = 0; - ncr_dev->t128.status &= ~0x02; - ncr_dev->t128.block_count = (ncr_dev->t128.block_count - 1) & 0xff; - ncr_log("Remaining blocks to be written=%d\n", ncr_dev->t128.block_count); - if (!ncr_dev->t128.block_count) { - ncr_dev->t128.block_loaded = 0; - ncr_log("IO End of write transfer\n"); - ncr->tcr |= TCR_LAST_BYTE_SENT; - ncr->isr |= STATUS_END_OF_DMA; - timer_stop(&ncr_dev->timer); - if (ncr->mode & MODE_ENA_EOP_INT) { - ncr_log("NCR write irq\n"); - ncr_irq(ncr_dev, ncr, 1); - } - } - return; - } - } else { - ncr_dev->buffer_pos++; - ncr_log("Buffer pos for writing = %d\n", ncr_dev->buffer_pos); + if (ncr_dev->t128.pos == MIN(512, dev->buffer_length)) { + ncr_dev->t128.pos = 0; + ncr_dev->t128.host_pos = 0; + ncr_dev->t128.status &= ~0x02; + ncr_dev->t128.block_count = (ncr_dev->t128.block_count - 1) & 0xff; + ncr_log("Remaining blocks to be written=%d\n", ncr_dev->t128.block_count); + if (!ncr_dev->t128.block_count) { + ncr_dev->t128.block_loaded = 0; + ncr_log("IO End of write transfer\n"); + ncr->tcr |= TCR_LAST_BYTE_SENT; + ncr->isr |= STATUS_END_OF_DMA; + timer_stop(&ncr_dev->timer); + if (ncr->mode & MODE_ENA_EOP_INT) { + ncr_log("NCR write irq\n"); + ncr_irq(ncr_dev, ncr, 1); + } + } + return; + } + } else { + ncr_dev->buffer_pos++; + ncr_log("Buffer pos for writing = %d\n", ncr_dev->buffer_pos); - if (ncr_dev->buffer_pos == MIN(128, dev->buffer_length)) { - ncr_dev->buffer_pos = 0; - ncr_dev->buffer_host_pos = 0; - ncr_dev->status_ctrl &= ~STATUS_BUFFER_NOT_READY; - ncr_dev->ncr_busy = 0; - ncr_dev->block_count = (ncr_dev->block_count - 1) & 0xff; - ncr_log("Remaining blocks to be written=%d\n", ncr_dev->block_count); - if (!ncr_dev->block_count) { - ncr_dev->block_count_loaded = 0; - ncr_log("IO End of write transfer\n"); - ncr->tcr |= TCR_LAST_BYTE_SENT; - ncr->isr |= STATUS_END_OF_DMA; - timer_stop(&ncr_dev->timer); - if (ncr->mode & MODE_ENA_EOP_INT) { - ncr_log("NCR write irq\n"); - ncr_irq(ncr_dev, ncr, 1); - } - } - return; - } - } + if (ncr_dev->buffer_pos == MIN(128, dev->buffer_length)) { + ncr_dev->buffer_pos = 0; + ncr_dev->buffer_host_pos = 0; + ncr_dev->status_ctrl &= ~STATUS_BUFFER_NOT_READY; + ncr_dev->ncr_busy = 0; + ncr_dev->block_count = (ncr_dev->block_count - 1) & 0xff; + ncr_log("Remaining blocks to be written=%d\n", ncr_dev->block_count); + if (!ncr_dev->block_count) { + ncr_dev->block_count_loaded = 0; + ncr_log("IO End of write transfer\n"); + ncr->tcr |= TCR_LAST_BYTE_SENT; + ncr->isr |= STATUS_END_OF_DMA; + timer_stop(&ncr_dev->timer); + if (ncr->mode & MODE_ENA_EOP_INT) { + ncr_log("NCR write irq\n"); + ncr_irq(ncr_dev, ncr, 1); + } + } + return; + } + } ncr_dma_send(ncr_dev, ncr, dev); } static void ncr_dma_initiator_receive(ncr5380_t *ncr_dev, ncr_t *ncr, scsi_device_t *dev) { - int bus, c = 0; + int bus, c = 0; uint8_t temp; - if (scsi_device_get_callback(dev) > 0.0) { - ncr_timer_on(ncr_dev, ncr, 1); - } else { - ncr_timer_on(ncr_dev, ncr, 0); - } + if (scsi_device_get_callback(dev) > 0.0) { + ncr_timer_on(ncr_dev, ncr, 1); + } else { + ncr_timer_on(ncr_dev, ncr, 0); + } for (c = 0; c < 10; c++) { - ncr_bus_read(ncr_dev); - if (ncr->cur_bus & BUS_REQ) - break; + ncr_bus_read(ncr_dev); + if (ncr->cur_bus & BUS_REQ) + break; } /* Data ready. */ @@ -1176,282 +1182,282 @@ ncr_dma_initiator_receive(ncr5380_t *ncr_dev, ncr_t *ncr, scsi_device_t *dev) ncr_bus_update(ncr_dev, bus | BUS_ACK); ncr_bus_update(ncr_dev, bus & ~BUS_ACK); - if (ncr_dev->type == 3) { - ncr_dev->t128.buffer[ncr_dev->t128.pos++] = temp; - ncr_log("Buffer pos for reading = %d, temp = %02x\n", ncr_dev->t128.pos, temp); + if (ncr_dev->type == 3) { + ncr_dev->t128.buffer[ncr_dev->t128.pos++] = temp; + ncr_log("Buffer pos for reading = %d, temp = %02x\n", ncr_dev->t128.pos, temp); - if (ncr_dev->t128.pos == MIN(512, dev->buffer_length)) { - ncr_dev->t128.pos = 0; - ncr_dev->t128.host_pos = 0; - ncr_dev->t128.status &= ~0x02; - ncr_dev->t128.block_count = (ncr_dev->t128.block_count - 1) & 0xff; - ncr_log("Remaining blocks to be read=%d, status=%02x, len=%i, cdb[0] = %02x\n", ncr_dev->t128.block_count, ncr_dev->t128.status, dev->buffer_length, ncr->command[0]); - if (!ncr_dev->t128.block_count) { - ncr_dev->t128.block_loaded = 0; - ncr_log("IO End of read transfer\n"); - ncr->isr |= STATUS_END_OF_DMA; - timer_stop(&ncr_dev->timer); - if (ncr->mode & MODE_ENA_EOP_INT) { - ncr_log("NCR read irq\n"); - ncr_irq(ncr_dev, ncr, 1); - } - } - return; - } - } else { - ncr_dev->buffer[ncr_dev->buffer_pos++] = temp; - ncr_log("Buffer pos for reading = %d\n", ncr_dev->buffer_pos); + if (ncr_dev->t128.pos == MIN(512, dev->buffer_length)) { + ncr_dev->t128.pos = 0; + ncr_dev->t128.host_pos = 0; + ncr_dev->t128.status &= ~0x02; + ncr_dev->t128.block_count = (ncr_dev->t128.block_count - 1) & 0xff; + ncr_log("Remaining blocks to be read=%d, status=%02x, len=%i, cdb[0] = %02x\n", ncr_dev->t128.block_count, ncr_dev->t128.status, dev->buffer_length, ncr->command[0]); + if (!ncr_dev->t128.block_count) { + ncr_dev->t128.block_loaded = 0; + ncr_log("IO End of read transfer\n"); + ncr->isr |= STATUS_END_OF_DMA; + timer_stop(&ncr_dev->timer); + if (ncr->mode & MODE_ENA_EOP_INT) { + ncr_log("NCR read irq\n"); + ncr_irq(ncr_dev, ncr, 1); + } + } + return; + } + } else { + ncr_dev->buffer[ncr_dev->buffer_pos++] = temp; + ncr_log("Buffer pos for reading = %d\n", ncr_dev->buffer_pos); - if (ncr_dev->buffer_pos == MIN(128, dev->buffer_length)) { - ncr_dev->buffer_pos = 0; - ncr_dev->buffer_host_pos = 0; - ncr_dev->status_ctrl &= ~STATUS_BUFFER_NOT_READY; - ncr_dev->block_count = (ncr_dev->block_count - 1) & 0xff; - ncr_log("Remaining blocks to be read=%d\n", ncr_dev->block_count); - if (!ncr_dev->block_count) { - ncr_dev->block_count_loaded = 0; - ncr_log("IO End of read transfer\n"); - ncr->isr |= STATUS_END_OF_DMA; - timer_stop(&ncr_dev->timer); - if (ncr->mode & MODE_ENA_EOP_INT) { - ncr_log("NCR read irq\n"); - ncr_irq(ncr_dev, ncr, 1); - } - } - return; - } - } + if (ncr_dev->buffer_pos == MIN(128, dev->buffer_length)) { + ncr_dev->buffer_pos = 0; + ncr_dev->buffer_host_pos = 0; + ncr_dev->status_ctrl &= ~STATUS_BUFFER_NOT_READY; + ncr_dev->block_count = (ncr_dev->block_count - 1) & 0xff; + ncr_log("Remaining blocks to be read=%d\n", ncr_dev->block_count); + if (!ncr_dev->block_count) { + ncr_dev->block_count_loaded = 0; + ncr_log("IO End of read transfer\n"); + ncr->isr |= STATUS_END_OF_DMA; + timer_stop(&ncr_dev->timer); + if (ncr->mode & MODE_ENA_EOP_INT) { + ncr_log("NCR read irq\n"); + ncr_irq(ncr_dev, ncr, 1); + } + } + return; + } + } ncr_dma_initiator_receive(ncr_dev, ncr, dev); } static void ncr_callback(void *priv) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; - ncr_t *ncr = &ncr_dev->ncr; - scsi_device_t *dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; + ncr_t *ncr = &ncr_dev->ncr; + scsi_device_t *dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; - if (ncr_dev->type == 3) { - ncr_log("DMA Callback, load = %i\n", ncr_dev->t128.block_loaded); - if (ncr->dma_mode != DMA_IDLE && (ncr->mode & MODE_DMA) && ncr_dev->t128.block_loaded) { - ncr_log("Timer on! Host POS = %i, status = %02x, DMA mode = %i, Period = %lf\n", ncr_dev->t128.host_pos, ncr_dev->t128.status, ncr->dma_mode, scsi_device_get_callback(dev)); - if (ncr_dev->t128.host_pos == MIN(512, dev->buffer_length) && ncr_dev->t128.block_count) { - ncr_dev->t128.status |= 0x04; - } - ncr_timer_on(ncr_dev, ncr, 0); - } - } else { - ncr_log("DMA mode=%d, status ctrl = %02x\n", ncr->dma_mode, ncr_dev->status_ctrl); - if (ncr->dma_mode != DMA_IDLE && (ncr->mode & MODE_DMA) && ncr_dev->block_count_loaded) { - ncr_timer_on(ncr_dev, ncr, 0); - } - } - - if (ncr->data_wait & 1) { - ncr->clear_req = 3; - ncr->data_wait &= ~1; - if (ncr->dma_mode == DMA_IDLE) { - return; - } + if (ncr_dev->type == 3) { + ncr_log("DMA Callback, load = %i\n", ncr_dev->t128.block_loaded); + if (ncr->dma_mode != DMA_IDLE && (ncr->mode & MODE_DMA) && ncr_dev->t128.block_loaded) { + ncr_log("Timer on! Host POS = %i, status = %02x, DMA mode = %i, Period = %lf\n", ncr_dev->t128.host_pos, ncr_dev->t128.status, ncr->dma_mode, scsi_device_get_callback(dev)); + if (ncr_dev->t128.host_pos == MIN(512, dev->buffer_length) && ncr_dev->t128.block_count) { + ncr_dev->t128.status |= 0x04; + } + ncr_timer_on(ncr_dev, ncr, 0); + } + } else { + ncr_log("DMA mode=%d, status ctrl = %02x\n", ncr->dma_mode, ncr_dev->status_ctrl); + if (ncr->dma_mode != DMA_IDLE && (ncr->mode & MODE_DMA) && ncr_dev->block_count_loaded) { + ncr_timer_on(ncr_dev, ncr, 0); + } } - switch(ncr->dma_mode) { - case DMA_SEND: - if (ncr_dev->type != 3) { - if (ncr_dev->status_ctrl & CTRL_DATA_DIR) { - ncr_log("DMA_SEND with DMA direction set wrong\n"); - break; - } + if (ncr->data_wait & 1) { + ncr->clear_req = 3; + ncr->data_wait &= ~1; + if (ncr->dma_mode == DMA_IDLE) { + return; + } + } - if (!(ncr_dev->status_ctrl & STATUS_BUFFER_NOT_READY)) { - ncr_log("Write buffer status ready\n"); - break; - } + switch (ncr->dma_mode) { + case DMA_SEND: + if (ncr_dev->type != 3) { + if (ncr_dev->status_ctrl & CTRL_DATA_DIR) { + ncr_log("DMA_SEND with DMA direction set wrong\n"); + break; + } - if (!ncr_dev->block_count_loaded) - break; - } else { - if (!(ncr_dev->t128.status & 0x04)) { - ncr_log("Write status busy\n"); - break; - } + if (!(ncr_dev->status_ctrl & STATUS_BUFFER_NOT_READY)) { + ncr_log("Write buffer status ready\n"); + break; + } - if (!ncr_dev->t128.block_loaded) { - ncr_log("Write block not loaded\n"); - break; - } + if (!ncr_dev->block_count_loaded) + break; + } else { + if (!(ncr_dev->t128.status & 0x04)) { + ncr_log("Write status busy\n"); + break; + } - if (ncr_dev->t128.host_pos < MIN(512, dev->buffer_length)) - break; - } - ncr_dma_send(ncr_dev, ncr, dev); - break; + if (!ncr_dev->t128.block_loaded) { + ncr_log("Write block not loaded\n"); + break; + } - case DMA_INITIATOR_RECEIVE: - if (ncr_dev->type != 3) { - if (!(ncr_dev->status_ctrl & CTRL_DATA_DIR)) { - ncr_log("DMA_INITIATOR_RECEIVE with DMA direction set wrong\n"); - break; - } + if (ncr_dev->t128.host_pos < MIN(512, dev->buffer_length)) + break; + } + ncr_dma_send(ncr_dev, ncr, dev); + break; - if (!(ncr_dev->status_ctrl & STATUS_BUFFER_NOT_READY)) { - ncr_log("Read buffer status ready\n"); - break; - } + case DMA_INITIATOR_RECEIVE: + if (ncr_dev->type != 3) { + if (!(ncr_dev->status_ctrl & CTRL_DATA_DIR)) { + ncr_log("DMA_INITIATOR_RECEIVE with DMA direction set wrong\n"); + break; + } - if (!ncr_dev->block_count_loaded) - break; - } else { - if (!(ncr_dev->t128.status & 0x04)) { - ncr_log("Read status busy, block count = %i, host pos = %i\n", ncr_dev->t128.block_count, ncr_dev->t128.host_pos); - break; - } + if (!(ncr_dev->status_ctrl & STATUS_BUFFER_NOT_READY)) { + ncr_log("Read buffer status ready\n"); + break; + } - if (!ncr_dev->t128.block_loaded) { - ncr_log("Read block not loaded\n"); - break; - } + if (!ncr_dev->block_count_loaded) + break; + } else { + if (!(ncr_dev->t128.status & 0x04)) { + ncr_log("Read status busy, block count = %i, host pos = %i\n", ncr_dev->t128.block_count, ncr_dev->t128.host_pos); + break; + } - if (ncr_dev->t128.host_pos < MIN(512, dev->buffer_length)) - break; - } - ncr_dma_initiator_receive(ncr_dev, ncr, dev); - break; + if (!ncr_dev->t128.block_loaded) { + ncr_log("Read block not loaded\n"); + break; + } + + if (ncr_dev->t128.host_pos < MIN(512, dev->buffer_length)) + break; + } + ncr_dma_initiator_receive(ncr_dev, ncr, dev); + break; } ncr_bus_read(ncr_dev); if (!(ncr->cur_bus & BUS_BSY) && (ncr->mode & MODE_MONITOR_BUSY)) { - ncr_log("Updating DMA\n"); - ncr->mode &= ~MODE_DMA; - ncr->dma_mode = DMA_IDLE; - timer_on_auto(&ncr_dev->timer, 10.0); + ncr_log("Updating DMA\n"); + ncr->mode &= ~MODE_DMA; + ncr->dma_mode = DMA_IDLE; + timer_on_auto(&ncr_dev->timer, 10.0); } } static uint8_t t128_read(uint32_t addr, void *priv) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; - ncr_t *ncr = &ncr_dev->ncr; - scsi_device_t *dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; - uint8_t ret = 0xff; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; + ncr_t *ncr = &ncr_dev->ncr; + scsi_device_t *dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; + uint8_t ret = 0xff; addr &= 0x3fff; if (addr >= 0 && addr < 0x1800) - ret = ncr_dev->bios_rom.rom[addr & 0x1fff]; + ret = ncr_dev->bios_rom.rom[addr & 0x1fff]; else if (addr >= 0x1800 && addr < 0x1880) - ret = ncr_dev->t128.ext_ram[addr & 0x7f]; - else if (addr >= 0x1c00 && addr < 0x1c20) { - ret = ncr_dev->t128.ctrl; - } else if (addr >= 0x1c20 && addr < 0x1c40) { - ret = ncr_dev->t128.status; - ncr_log("T128 status read = %02x, cur bus = %02x, req = %02x, dma = %02x\n", ret, ncr->cur_bus, ncr->cur_bus & BUS_REQ, ncr->mode & MODE_DMA); - } else if (addr >= 0x1d00 && addr < 0x1e00) { - if (addr >= 0x1d00 && addr < 0x1d20) - ret = ncr_read(0, ncr_dev); - else if (addr >= 0x1d20 && addr < 0x1d40) - ret = ncr_read(1, ncr_dev); - else if (addr >= 0x1d40 && addr < 0x1d60) - ret = ncr_read(2, ncr_dev); - else if (addr >= 0x1d60 && addr < 0x1d80) - ret = ncr_read(3, ncr_dev); - else if (addr >= 0x1d80 && addr < 0x1da0) - ret = ncr_read(4, ncr_dev); - else if (addr >= 0x1da0 && addr < 0x1dc0) - ret = ncr_read(5, ncr_dev); - else if (addr >= 0x1dc0 && addr < 0x1de0) - ret = ncr_read(6, ncr_dev); - else if (addr >= 0x1de0 && addr < 0x1e00) - ret = ncr_read(7, ncr_dev); - } else if (addr >= 0x1e00 && addr < 0x2000) { - if (ncr_dev->t128.host_pos >= MIN(512, dev->buffer_length) || ncr->dma_mode != DMA_INITIATOR_RECEIVE) { - ret = 0xff; - } else { - ret = ncr_dev->t128.buffer[ncr_dev->t128.host_pos++]; + ret = ncr_dev->t128.ext_ram[addr & 0x7f]; + else if (addr >= 0x1c00 && addr < 0x1c20) { + ret = ncr_dev->t128.ctrl; + } else if (addr >= 0x1c20 && addr < 0x1c40) { + ret = ncr_dev->t128.status; + ncr_log("T128 status read = %02x, cur bus = %02x, req = %02x, dma = %02x\n", ret, ncr->cur_bus, ncr->cur_bus & BUS_REQ, ncr->mode & MODE_DMA); + } else if (addr >= 0x1d00 && addr < 0x1e00) { + if (addr >= 0x1d00 && addr < 0x1d20) + ret = ncr_read(0, ncr_dev); + else if (addr >= 0x1d20 && addr < 0x1d40) + ret = ncr_read(1, ncr_dev); + else if (addr >= 0x1d40 && addr < 0x1d60) + ret = ncr_read(2, ncr_dev); + else if (addr >= 0x1d60 && addr < 0x1d80) + ret = ncr_read(3, ncr_dev); + else if (addr >= 0x1d80 && addr < 0x1da0) + ret = ncr_read(4, ncr_dev); + else if (addr >= 0x1da0 && addr < 0x1dc0) + ret = ncr_read(5, ncr_dev); + else if (addr >= 0x1dc0 && addr < 0x1de0) + ret = ncr_read(6, ncr_dev); + else if (addr >= 0x1de0 && addr < 0x1e00) + ret = ncr_read(7, ncr_dev); + } else if (addr >= 0x1e00 && addr < 0x2000) { + if (ncr_dev->t128.host_pos >= MIN(512, dev->buffer_length) || ncr->dma_mode != DMA_INITIATOR_RECEIVE) { + ret = 0xff; + } else { + ret = ncr_dev->t128.buffer[ncr_dev->t128.host_pos++]; - ncr_log("Read transfer, addr = %i, pos = %i\n", addr & 0x1ff, ncr_dev->t128.host_pos); + ncr_log("Read transfer, addr = %i, pos = %i\n", addr & 0x1ff, ncr_dev->t128.host_pos); - if (ncr_dev->t128.host_pos == MIN(512, dev->buffer_length)) { - ncr_dev->t128.status &= ~0x04; - ncr_log("Transfer busy read, status = %02x, period = %lf\n", ncr_dev->t128.status, ncr_dev->period); - if (ncr_dev->period == 0.2 || ncr_dev->period == 0.02) - timer_on_auto(&ncr_dev->timer, 40.2); - } else if (ncr_dev->t128.host_pos < MIN(512, dev->buffer_length) && scsi_device_get_callback(dev) > 100.0) - cycles += 100; /*Needed to avoid timer de-syncing with transfers.*/ - } - } + if (ncr_dev->t128.host_pos == MIN(512, dev->buffer_length)) { + ncr_dev->t128.status &= ~0x04; + ncr_log("Transfer busy read, status = %02x, period = %lf\n", ncr_dev->t128.status, ncr_dev->period); + if (ncr_dev->period == 0.2 || ncr_dev->period == 0.02) + timer_on_auto(&ncr_dev->timer, 40.2); + } else if (ncr_dev->t128.host_pos < MIN(512, dev->buffer_length) && scsi_device_get_callback(dev) > 100.0) + cycles += 100; /*Needed to avoid timer de-syncing with transfers.*/ + } + } - return(ret); + return (ret); } static void t128_write(uint32_t addr, uint8_t val, void *priv) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; - ncr_t *ncr = &ncr_dev->ncr; - scsi_device_t *dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; + ncr_t *ncr = &ncr_dev->ncr; + scsi_device_t *dev = &scsi_devices[ncr_dev->bus][ncr->target_id]; addr &= 0x3fff; if (addr >= 0x1800 && addr < 0x1880) - ncr_dev->t128.ext_ram[addr & 0x7f] = val; - else if (addr >= 0x1c00 && addr < 0x1c20) { - if ((val & 0x02) && !(ncr_dev->t128.ctrl & 0x02)) { - ncr_dev->t128.status |= 0x02; - ncr_log("Timer fired\n"); - } - ncr_dev->t128.ctrl = val; - ncr_log("T128 ctrl write = %02x\n", val); - } else if (addr >= 0x1d00 && addr < 0x1e00) { - if (addr >= 0x1d00 && addr < 0x1d20) - ncr_write(0, val, ncr_dev); - else if (addr >= 0x1d20 && addr < 0x1d40) - ncr_write(1, val, ncr_dev); - else if (addr >= 0x1d40 && addr < 0x1d60) - ncr_write(2, val, ncr_dev); - else if (addr >= 0x1d60 && addr < 0x1d80) - ncr_write(3, val, ncr_dev); - else if (addr >= 0x1d80 && addr < 0x1da0) - ncr_write(4, val, ncr_dev); - else if (addr >= 0x1da0 && addr < 0x1dc0) - ncr_write(5, val, ncr_dev); - else if (addr >= 0x1dc0 && addr < 0x1de0) - ncr_write(6, val, ncr_dev); - else if (addr >= 0x1de0 && addr < 0x1e00) - ncr_write(7, val, ncr_dev); - } else if (addr >= 0x1e00 && addr < 0x2000) { - if (ncr_dev->t128.host_pos < MIN(512, dev->buffer_length) && ncr->dma_mode == DMA_SEND) { - ncr_dev->t128.buffer[ncr_dev->t128.host_pos] = val; - ncr_dev->t128.host_pos++; + ncr_dev->t128.ext_ram[addr & 0x7f] = val; + else if (addr >= 0x1c00 && addr < 0x1c20) { + if ((val & 0x02) && !(ncr_dev->t128.ctrl & 0x02)) { + ncr_dev->t128.status |= 0x02; + ncr_log("Timer fired\n"); + } + ncr_dev->t128.ctrl = val; + ncr_log("T128 ctrl write = %02x\n", val); + } else if (addr >= 0x1d00 && addr < 0x1e00) { + if (addr >= 0x1d00 && addr < 0x1d20) + ncr_write(0, val, ncr_dev); + else if (addr >= 0x1d20 && addr < 0x1d40) + ncr_write(1, val, ncr_dev); + else if (addr >= 0x1d40 && addr < 0x1d60) + ncr_write(2, val, ncr_dev); + else if (addr >= 0x1d60 && addr < 0x1d80) + ncr_write(3, val, ncr_dev); + else if (addr >= 0x1d80 && addr < 0x1da0) + ncr_write(4, val, ncr_dev); + else if (addr >= 0x1da0 && addr < 0x1dc0) + ncr_write(5, val, ncr_dev); + else if (addr >= 0x1dc0 && addr < 0x1de0) + ncr_write(6, val, ncr_dev); + else if (addr >= 0x1de0 && addr < 0x1e00) + ncr_write(7, val, ncr_dev); + } else if (addr >= 0x1e00 && addr < 0x2000) { + if (ncr_dev->t128.host_pos < MIN(512, dev->buffer_length) && ncr->dma_mode == DMA_SEND) { + ncr_dev->t128.buffer[ncr_dev->t128.host_pos] = val; + ncr_dev->t128.host_pos++; - ncr_log("Write transfer, addr = %i, pos = %i, val = %02x\n", addr & 0x1ff, ncr_dev->t128.host_pos, val); + ncr_log("Write transfer, addr = %i, pos = %i, val = %02x\n", addr & 0x1ff, ncr_dev->t128.host_pos, val); - if (ncr_dev->t128.host_pos == MIN(512, dev->buffer_length)) { - ncr_dev->t128.status &= ~0x04; - ncr_log("Transfer busy write, status = %02x\n", ncr_dev->t128.status); - timer_on_auto(&ncr_dev->timer, 0.02); - } - } else - ncr_log("Write PDMA addr = %i, val = %02x\n", addr & 0x1ff, val); - } + if (ncr_dev->t128.host_pos == MIN(512, dev->buffer_length)) { + ncr_dev->t128.status &= ~0x04; + ncr_log("Transfer busy write, status = %02x\n", ncr_dev->t128.status); + timer_on_auto(&ncr_dev->timer, 0.02); + } + } else + ncr_log("Write PDMA addr = %i, val = %02x\n", addr & 0x1ff, val); + } } static uint8_t rt1000b_mc_read(int port, void *priv) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; - return(ncr_dev->pos_regs[port & 7]); + return (ncr_dev->pos_regs[port & 7]); } - static void rt1000b_mc_write(int port, uint8_t val, void *priv) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; /* MCA does not write registers below 0x0100. */ - if (port < 0x0102) return; + if (port < 0x0102) + return; mem_mapping_disable(&ncr_dev->bios_rom.mapping); mem_mapping_disable(&ncr_dev->mapping); @@ -1489,7 +1495,7 @@ rt1000b_mc_write(int port, uint8_t val, void *priv) static uint8_t rt1000b_mc_feedb(void *priv) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; return ncr_dev->pos_regs[2] & 1; } @@ -1497,8 +1503,8 @@ rt1000b_mc_feedb(void *priv) static void * ncr_init(const device_t *info) { - char *fn = NULL; - char temp[128]; + char *fn = NULL; + char temp[128]; ncr5380_t *ncr_dev; ncr_dev = malloc(sizeof(ncr5380_t)); @@ -1508,173 +1514,170 @@ ncr_init(const device_t *info) ncr_dev->bus = scsi_get_bus(); - switch(ncr_dev->type) { - case 0: /* Longshine LCS6821N */ - ncr_dev->rom_addr = device_get_config_hex20("bios_addr"); - ncr_dev->irq = device_get_config_int("irq"); - rom_init(&ncr_dev->bios_rom, LCS6821N_ROM, - ncr_dev->rom_addr, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); + switch (ncr_dev->type) { + case 0: /* Longshine LCS6821N */ + ncr_dev->rom_addr = device_get_config_hex20("bios_addr"); + ncr_dev->irq = device_get_config_int("irq"); + rom_init(&ncr_dev->bios_rom, LCS6821N_ROM, + ncr_dev->rom_addr, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); - mem_mapping_add(&ncr_dev->mapping, ncr_dev->rom_addr, 0x4000, - memio_read, NULL, NULL, - memio_write, NULL, NULL, - ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev); - break; - - case 1: /* Rancho RT1000B/MC */ - ncr_dev->rom_addr = device_get_config_hex20("bios_addr"); - ncr_dev->irq = device_get_config_int("irq"); - ncr_dev->bios_ver = device_get_config_int("bios_ver"); - if (info->flags & DEVICE_MCA) { - ncr_dev->rom_addr = 0xd8000; - ncr_dev->bios_ver = 1; - } - - if (ncr_dev->bios_ver == 1) - fn = RT1000B_820R_ROM; - else - fn = RT1000B_810R_ROM; - - rom_init(&ncr_dev->bios_rom, fn, - ncr_dev->rom_addr, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); - - if (info->flags & DEVICE_MCA) { - mem_mapping_add(&ncr_dev->mapping, 0, 0, - memio_read, NULL, NULL, - memio_write, NULL, NULL, - ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev); - ncr_dev->pos_regs[0] = 0x8d; - ncr_dev->pos_regs[1] = 0x70; - mca_add(rt1000b_mc_read, rt1000b_mc_write, rt1000b_mc_feedb, NULL, ncr_dev); - } else { mem_mapping_add(&ncr_dev->mapping, ncr_dev->rom_addr, 0x4000, - memio_read, NULL, NULL, - memio_write, NULL, NULL, - ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev); - } - break; + memio_read, NULL, NULL, + memio_write, NULL, NULL, + ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev); + break; - case 2: /* Trantor T130B */ - ncr_dev->rom_addr = device_get_config_hex20("bios_addr"); - ncr_dev->base = device_get_config_hex16("base"); - ncr_dev->irq = device_get_config_int("irq"); + case 1: /* Rancho RT1000B/MC */ + ncr_dev->rom_addr = device_get_config_hex20("bios_addr"); + ncr_dev->irq = device_get_config_int("irq"); + ncr_dev->bios_ver = device_get_config_int("bios_ver"); + if (info->flags & DEVICE_MCA) { + ncr_dev->rom_addr = 0xd8000; + ncr_dev->bios_ver = 1; + } - if (ncr_dev->rom_addr > 0x00000) { - rom_init(&ncr_dev->bios_rom, T130B_ROM, - ncr_dev->rom_addr, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); + if (ncr_dev->bios_ver == 1) + fn = RT1000B_820R_ROM; + else + fn = RT1000B_810R_ROM; - mem_mapping_add(&ncr_dev->mapping, ncr_dev->rom_addr, 0x4000, - t130b_read, NULL, NULL, - t130b_write, NULL, NULL, - ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev); - } + rom_init(&ncr_dev->bios_rom, fn, + ncr_dev->rom_addr, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); - io_sethandler(ncr_dev->base, 16, - t130b_in,NULL,NULL, t130b_out,NULL,NULL, ncr_dev); - break; + if (info->flags & DEVICE_MCA) { + mem_mapping_add(&ncr_dev->mapping, 0, 0, + memio_read, NULL, NULL, + memio_write, NULL, NULL, + ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev); + ncr_dev->pos_regs[0] = 0x8d; + ncr_dev->pos_regs[1] = 0x70; + mca_add(rt1000b_mc_read, rt1000b_mc_write, rt1000b_mc_feedb, NULL, ncr_dev); + } else { + mem_mapping_add(&ncr_dev->mapping, ncr_dev->rom_addr, 0x4000, + memio_read, NULL, NULL, + memio_write, NULL, NULL, + ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev); + } + break; - case 3: /* Trantor T128 */ - ncr_dev->rom_addr = device_get_config_hex20("bios_addr"); - ncr_dev->irq = device_get_config_int("irq"); - ncr_dev->t128.bios_enabled = device_get_config_int("boot"); + case 2: /* Trantor T130B */ + ncr_dev->rom_addr = device_get_config_hex20("bios_addr"); + ncr_dev->base = device_get_config_hex16("base"); + ncr_dev->irq = device_get_config_int("irq"); - if (ncr_dev->t128.bios_enabled) - rom_init(&ncr_dev->bios_rom, T128_ROM, - ncr_dev->rom_addr, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); + if (ncr_dev->rom_addr > 0x00000) { + rom_init(&ncr_dev->bios_rom, T130B_ROM, + ncr_dev->rom_addr, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); - mem_mapping_add(&ncr_dev->mapping, ncr_dev->rom_addr, 0x4000, - t128_read, NULL, NULL, - t128_write, NULL, NULL, - ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev); - break; + mem_mapping_add(&ncr_dev->mapping, ncr_dev->rom_addr, 0x4000, + t130b_read, NULL, NULL, + t130b_write, NULL, NULL, + ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev); + } - case 4: /* Corel LS2000 */ - ncr_dev->rom_addr = device_get_config_hex20("bios_addr"); - ncr_dev->irq = device_get_config_int("irq"); - rom_init(&ncr_dev->bios_rom, COREL_LS2000_ROM, - ncr_dev->rom_addr, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); + io_sethandler(ncr_dev->base, 16, + t130b_in, NULL, NULL, t130b_out, NULL, NULL, ncr_dev); + break; - mem_mapping_add(&ncr_dev->mapping, ncr_dev->rom_addr, 0x4000, - memio_read, NULL, NULL, - memio_write, NULL, NULL, - ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev); - break; + case 3: /* Trantor T128 */ + ncr_dev->rom_addr = device_get_config_hex20("bios_addr"); + ncr_dev->irq = device_get_config_int("irq"); + ncr_dev->t128.bios_enabled = device_get_config_int("boot"); + + if (ncr_dev->t128.bios_enabled) + rom_init(&ncr_dev->bios_rom, T128_ROM, + ncr_dev->rom_addr, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); + + mem_mapping_add(&ncr_dev->mapping, ncr_dev->rom_addr, 0x4000, + t128_read, NULL, NULL, + t128_write, NULL, NULL, + ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev); + break; + + case 4: /* Corel LS2000 */ + ncr_dev->rom_addr = device_get_config_hex20("bios_addr"); + ncr_dev->irq = device_get_config_int("irq"); + rom_init(&ncr_dev->bios_rom, COREL_LS2000_ROM, + ncr_dev->rom_addr, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); + + mem_mapping_add(&ncr_dev->mapping, ncr_dev->rom_addr, 0x4000, + memio_read, NULL, NULL, + memio_write, NULL, NULL, + ncr_dev->bios_rom.rom, MEM_MAPPING_EXTERNAL, ncr_dev); + break; } sprintf(temp, "%s: BIOS=%05X", ncr_dev->name, ncr_dev->rom_addr); if (ncr_dev->base != 0) - sprintf(&temp[strlen(temp)], " I/O=%04x", ncr_dev->base); + sprintf(&temp[strlen(temp)], " I/O=%04x", ncr_dev->base); if (ncr_dev->irq != 0) - sprintf(&temp[strlen(temp)], " IRQ=%d", ncr_dev->irq); + sprintf(&temp[strlen(temp)], " IRQ=%d", ncr_dev->irq); ncr_log("%s\n", temp); ncr_reset(ncr_dev, &ncr_dev->ncr); - if (ncr_dev->type < 3 || ncr_dev->type == 4) { - ncr_dev->status_ctrl = STATUS_BUFFER_NOT_READY; - ncr_dev->buffer_host_pos = 128; - } else { - ncr_dev->t128.status = 0x04; - ncr_dev->t128.host_pos = 512; + if (ncr_dev->type < 3 || ncr_dev->type == 4) { + ncr_dev->status_ctrl = STATUS_BUFFER_NOT_READY; + ncr_dev->buffer_host_pos = 128; + } else { + ncr_dev->t128.status = 0x04; + ncr_dev->t128.host_pos = 512; - if (!ncr_dev->t128.bios_enabled) - ncr_dev->t128.status |= 0x80; - } - timer_add(&ncr_dev->timer, ncr_callback, ncr_dev, 0); + if (!ncr_dev->t128.bios_enabled) + ncr_dev->t128.status |= 0x80; + } + timer_add(&ncr_dev->timer, ncr_callback, ncr_dev, 0); - return(ncr_dev); + return (ncr_dev); } - static void ncr_close(void *priv) { - ncr5380_t *ncr_dev = (ncr5380_t *)priv; + ncr5380_t *ncr_dev = (ncr5380_t *) priv; if (ncr_dev) { - /* Tell the timer to terminate. */ - timer_stop(&ncr_dev->timer); + /* Tell the timer to terminate. */ + timer_stop(&ncr_dev->timer); - free(ncr_dev); - ncr_dev = NULL; + free(ncr_dev); + ncr_dev = NULL; } } - static int lcs6821n_available(void) { - return(rom_present(LCS6821N_ROM)); + return (rom_present(LCS6821N_ROM)); } - static int rt1000b_available(void) { - return(rom_present(RT1000B_820R_ROM) && rom_present(RT1000B_810R_ROM)); + return (rom_present(RT1000B_820R_ROM) && rom_present(RT1000B_810R_ROM)); } static int rt1000b_820_available(void) { - return(rom_present(RT1000B_820R_ROM)); + return (rom_present(RT1000B_820R_ROM)); } static int t130b_available(void) { - return(rom_present(T130B_ROM)); + return (rom_present(T130B_ROM)); } static int t128_available(void) { - return(rom_present(T128_ROM)); + return (rom_present(T128_ROM)); } static int corel_ls2000_available(void) { - return(rom_present(COREL_LS2000_ROM)); + return (rom_present(COREL_LS2000_ROM)); } // clang-format off @@ -1883,85 +1886,85 @@ static const device_config_t t128_config[] = { // clang-format on const device_t scsi_lcs6821n_device = { - .name = "Longshine LCS-6821N", + .name = "Longshine LCS-6821N", .internal_name = "lcs6821n", - .flags = DEVICE_ISA, - .local = 0, - .init = ncr_init, - .close = ncr_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = ncr_init, + .close = ncr_close, + .reset = NULL, { .available = lcs6821n_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ncr5380_mmio_config + .force_redraw = NULL, + .config = ncr5380_mmio_config }; const device_t scsi_rt1000b_device = { - .name = "Rancho RT1000B", + .name = "Rancho RT1000B", .internal_name = "rt1000b", - .flags = DEVICE_ISA, - .local = 1, - .init = ncr_init, - .close = ncr_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 1, + .init = ncr_init, + .close = ncr_close, + .reset = NULL, { .available = rt1000b_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = rancho_config + .force_redraw = NULL, + .config = rancho_config }; const device_t scsi_rt1000mc_device = { - .name = "Rancho RT1000B-MC", + .name = "Rancho RT1000B-MC", .internal_name = "rt1000mc", - .flags = DEVICE_MCA, - .local = 1, - .init = ncr_init, - .close = ncr_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = 1, + .init = ncr_init, + .close = ncr_close, + .reset = NULL, { .available = rt1000b_820_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = rancho_mc_config + .force_redraw = NULL, + .config = rancho_mc_config }; const device_t scsi_t130b_device = { - .name = "Trantor T130B", + .name = "Trantor T130B", .internal_name = "t130b", - .flags = DEVICE_ISA, - .local = 2, - .init = ncr_init, - .close = ncr_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 2, + .init = ncr_init, + .close = ncr_close, + .reset = NULL, { .available = t130b_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = t130b_config + .force_redraw = NULL, + .config = t130b_config }; const device_t scsi_t128_device = { - .name = "Trantor T128", + .name = "Trantor T128", .internal_name = "t128", - .flags = DEVICE_ISA, - .local = 3, - .init = ncr_init, - .close = ncr_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 3, + .init = ncr_init, + .close = ncr_close, + .reset = NULL, { .available = t128_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = t128_config + .force_redraw = NULL, + .config = t128_config }; const device_t scsi_ls2000_device = { - .name = "Corel LS2000", + .name = "Corel LS2000", .internal_name = "ls2000", - .flags = DEVICE_ISA, - .local = 4, - .init = ncr_init, - .close = ncr_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 4, + .init = ncr_init, + .close = ncr_close, + .reset = NULL, { .available = corel_ls2000_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ncr5380_mmio_config + .force_redraw = NULL, + .config = ncr5380_mmio_config }; diff --git a/src/scsi/scsi_ncr53c8xx.c b/src/scsi/scsi_ncr53c8xx.c index 7a9344d62..ba5ccd002 100644 --- a/src/scsi/scsi_ncr53c8xx.c +++ b/src/scsi/scsi_ncr53c8xx.c @@ -45,190 +45,188 @@ #include <86box/scsi_device.h> #include <86box/scsi_ncr53c8xx.h> +#define NCR53C8XX_SDMS3_ROM "roms/scsi/ncr53c8xx/NCR307.BIN" +#define SYM53C8XX_SDMS4_ROM "roms/scsi/ncr53c8xx/8xx_64.rom" -#define NCR53C8XX_SDMS3_ROM "roms/scsi/ncr53c8xx/NCR307.BIN" -#define SYM53C8XX_SDMS4_ROM "roms/scsi/ncr53c8xx/8xx_64.rom" +#define HA_ID 7 -#define HA_ID 7 +#define CHIP_810 0x01 +#define CHIP_820 0x02 +#define CHIP_825 0x03 +#define CHIP_815 0x04 +#define CHIP_810AP 0x05 +#define CHIP_860 0x06 +#define CHIP_895 0x0c +#define CHIP_875 0x0f +#define CHIP_895A 0x12 +#define CHIP_875A 0x13 +#define CHIP_875J 0x8f -#define CHIP_810 0x01 -#define CHIP_820 0x02 -#define CHIP_825 0x03 -#define CHIP_815 0x04 -#define CHIP_810AP 0x05 -#define CHIP_860 0x06 -#define CHIP_895 0x0c -#define CHIP_875 0x0f -#define CHIP_895A 0x12 -#define CHIP_875A 0x13 -#define CHIP_875J 0x8f +#define NCR_SCNTL0_TRG 0x01 +#define NCR_SCNTL0_AAP 0x02 +#define NCR_SCNTL0_EPC 0x08 +#define NCR_SCNTL0_WATN 0x10 +#define NCR_SCNTL0_START 0x20 -#define NCR_SCNTL0_TRG 0x01 -#define NCR_SCNTL0_AAP 0x02 -#define NCR_SCNTL0_EPC 0x08 -#define NCR_SCNTL0_WATN 0x10 -#define NCR_SCNTL0_START 0x20 +#define NCR_SCNTL1_SST 0x01 +#define NCR_SCNTL1_IARB 0x02 +#define NCR_SCNTL1_AESP 0x04 +#define NCR_SCNTL1_RST 0x08 +#define NCR_SCNTL1_CON 0x10 +#define NCR_SCNTL1_DHP 0x20 +#define NCR_SCNTL1_ADB 0x40 +#define NCR_SCNTL1_EXC 0x80 -#define NCR_SCNTL1_SST 0x01 -#define NCR_SCNTL1_IARB 0x02 -#define NCR_SCNTL1_AESP 0x04 -#define NCR_SCNTL1_RST 0x08 -#define NCR_SCNTL1_CON 0x10 -#define NCR_SCNTL1_DHP 0x20 -#define NCR_SCNTL1_ADB 0x40 -#define NCR_SCNTL1_EXC 0x80 +#define NCR_SCNTL2_WSR 0x01 +#define NCR_SCNTL2_VUE0 0x02 +#define NCR_SCNTL2_VUE1 0x04 +#define NCR_SCNTL2_WSS 0x08 +#define NCR_SCNTL2_SLPHBEN 0x10 +#define NCR_SCNTL2_SLPMD 0x20 +#define NCR_SCNTL2_CHM 0x40 +#define NCR_SCNTL2_SDU 0x80 -#define NCR_SCNTL2_WSR 0x01 -#define NCR_SCNTL2_VUE0 0x02 -#define NCR_SCNTL2_VUE1 0x04 -#define NCR_SCNTL2_WSS 0x08 -#define NCR_SCNTL2_SLPHBEN 0x10 -#define NCR_SCNTL2_SLPMD 0x20 -#define NCR_SCNTL2_CHM 0x40 -#define NCR_SCNTL2_SDU 0x80 +#define NCR_ISTAT_DIP 0x01 +#define NCR_ISTAT_SIP 0x02 +#define NCR_ISTAT_INTF 0x04 +#define NCR_ISTAT_CON 0x08 +#define NCR_ISTAT_SEM 0x10 +#define NCR_ISTAT_SIGP 0x20 +#define NCR_ISTAT_SRST 0x40 +#define NCR_ISTAT_ABRT 0x80 -#define NCR_ISTAT_DIP 0x01 -#define NCR_ISTAT_SIP 0x02 -#define NCR_ISTAT_INTF 0x04 -#define NCR_ISTAT_CON 0x08 -#define NCR_ISTAT_SEM 0x10 -#define NCR_ISTAT_SIGP 0x20 -#define NCR_ISTAT_SRST 0x40 -#define NCR_ISTAT_ABRT 0x80 +#define NCR_SSTAT0_SDP0 0x01 +#define NCR_SSTAT0_RST 0x02 +#define NCR_SSTAT0_WOA 0x04 +#define NCR_SSTAT0_LOA 0x08 +#define NCR_SSTAT0_AIP 0x10 +#define NCR_SSTAT0_OLF 0x20 +#define NCR_SSTAT0_ORF 0x40 +#define NCR_SSTAT0_ILF 0x80 -#define NCR_SSTAT0_SDP0 0x01 -#define NCR_SSTAT0_RST 0x02 -#define NCR_SSTAT0_WOA 0x04 -#define NCR_SSTAT0_LOA 0x08 -#define NCR_SSTAT0_AIP 0x10 -#define NCR_SSTAT0_OLF 0x20 -#define NCR_SSTAT0_ORF 0x40 -#define NCR_SSTAT0_ILF 0x80 +#define NCR_SIST0_PAR 0x01 +#define NCR_SIST0_RST 0x02 +#define NCR_SIST0_UDC 0x04 +#define NCR_SIST0_SGE 0x08 +#define NCR_SIST0_RSL 0x10 +#define NCR_SIST0_SEL 0x20 +#define NCR_SIST0_CMP 0x40 +#define NCR_SIST0_MA 0x80 -#define NCR_SIST0_PAR 0x01 -#define NCR_SIST0_RST 0x02 -#define NCR_SIST0_UDC 0x04 -#define NCR_SIST0_SGE 0x08 -#define NCR_SIST0_RSL 0x10 -#define NCR_SIST0_SEL 0x20 -#define NCR_SIST0_CMP 0x40 -#define NCR_SIST0_MA 0x80 +#define NCR_SIST1_HTH 0x01 +#define NCR_SIST1_GEN 0x02 +#define NCR_SIST1_STO 0x04 +#define NCR_SIST1_SBMC 0x10 -#define NCR_SIST1_HTH 0x01 -#define NCR_SIST1_GEN 0x02 -#define NCR_SIST1_STO 0x04 -#define NCR_SIST1_SBMC 0x10 +#define NCR_SOCL_IO 0x01 +#define NCR_SOCL_CD 0x02 +#define NCR_SOCL_MSG 0x04 +#define NCR_SOCL_ATN 0x08 +#define NCR_SOCL_SEL 0x10 +#define NCR_SOCL_BSY 0x20 +#define NCR_SOCL_ACK 0x40 +#define NCR_SOCL_REQ 0x80 -#define NCR_SOCL_IO 0x01 -#define NCR_SOCL_CD 0x02 -#define NCR_SOCL_MSG 0x04 -#define NCR_SOCL_ATN 0x08 -#define NCR_SOCL_SEL 0x10 -#define NCR_SOCL_BSY 0x20 -#define NCR_SOCL_ACK 0x40 -#define NCR_SOCL_REQ 0x80 +#define NCR_DSTAT_IID 0x01 +#define NCR_DSTAT_SIR 0x04 +#define NCR_DSTAT_SSI 0x08 +#define NCR_DSTAT_ABRT 0x10 +#define NCR_DSTAT_BF 0x20 +#define NCR_DSTAT_MDPE 0x40 +#define NCR_DSTAT_DFE 0x80 -#define NCR_DSTAT_IID 0x01 -#define NCR_DSTAT_SIR 0x04 -#define NCR_DSTAT_SSI 0x08 -#define NCR_DSTAT_ABRT 0x10 -#define NCR_DSTAT_BF 0x20 -#define NCR_DSTAT_MDPE 0x40 -#define NCR_DSTAT_DFE 0x80 +#define NCR_DCNTL_COM 0x01 +#define NCR_DCNTL_IRQD 0x02 +#define NCR_DCNTL_STD 0x04 +#define NCR_DCNTL_IRQM 0x08 +#define NCR_DCNTL_SSM 0x10 +#define NCR_DCNTL_PFEN 0x20 +#define NCR_DCNTL_PFF 0x40 +#define NCR_DCNTL_CLSE 0x80 -#define NCR_DCNTL_COM 0x01 -#define NCR_DCNTL_IRQD 0x02 -#define NCR_DCNTL_STD 0x04 -#define NCR_DCNTL_IRQM 0x08 -#define NCR_DCNTL_SSM 0x10 -#define NCR_DCNTL_PFEN 0x20 -#define NCR_DCNTL_PFF 0x40 -#define NCR_DCNTL_CLSE 0x80 +#define NCR_DMODE_MAN 0x01 +#define NCR_DMODE_BOF 0x02 +#define NCR_DMODE_ERMP 0x04 +#define NCR_DMODE_ERL 0x08 +#define NCR_DMODE_DIOM 0x10 +#define NCR_DMODE_SIOM 0x20 -#define NCR_DMODE_MAN 0x01 -#define NCR_DMODE_BOF 0x02 -#define NCR_DMODE_ERMP 0x04 -#define NCR_DMODE_ERL 0x08 -#define NCR_DMODE_DIOM 0x10 -#define NCR_DMODE_SIOM 0x20 +#define NCR_CTEST2_DACK 0x01 +#define NCR_CTEST2_DREQ 0x02 +#define NCR_CTEST2_TEOP 0x04 +#define NCR_CTEST2_PCICIE 0x08 +#define NCR_CTEST2_CM 0x10 +#define NCR_CTEST2_CIO 0x20 +#define NCR_CTEST2_SIGP 0x40 +#define NCR_CTEST2_DDIR 0x80 -#define NCR_CTEST2_DACK 0x01 -#define NCR_CTEST2_DREQ 0x02 -#define NCR_CTEST2_TEOP 0x04 -#define NCR_CTEST2_PCICIE 0x08 -#define NCR_CTEST2_CM 0x10 -#define NCR_CTEST2_CIO 0x20 -#define NCR_CTEST2_SIGP 0x40 -#define NCR_CTEST2_DDIR 0x80 - -#define NCR_CTEST5_BL2 0x04 -#define NCR_CTEST5_DDIR 0x08 -#define NCR_CTEST5_MASR 0x10 -#define NCR_CTEST5_DFSN 0x20 -#define NCR_CTEST5_BBCK 0x40 -#define NCR_CTEST5_ADCK 0x80 +#define NCR_CTEST5_BL2 0x04 +#define NCR_CTEST5_DDIR 0x08 +#define NCR_CTEST5_MASR 0x10 +#define NCR_CTEST5_DFSN 0x20 +#define NCR_CTEST5_BBCK 0x40 +#define NCR_CTEST5_ADCK 0x80 /* Enable Response to Reselection */ -#define NCR_SCID_RRE 0x60 +#define NCR_SCID_RRE 0x60 -#define PHASE_DO 0 -#define PHASE_DI 1 -#define PHASE_CMD 2 -#define PHASE_ST 3 -#define PHASE_MO 6 -#define PHASE_MI 7 -#define PHASE_MASK 7 +#define PHASE_DO 0 +#define PHASE_DI 1 +#define PHASE_CMD 2 +#define PHASE_ST 3 +#define PHASE_MO 6 +#define PHASE_MI 7 +#define PHASE_MASK 7 /* Maximum length of MSG IN data. */ #define NCR_MAX_MSGIN_LEN 8 /* Flag set if this is a tagged command. */ -#define NCR_TAG_VALID (1 << 16) +#define NCR_TAG_VALID (1 << 16) -#define NCR_NVRAM_SIZE 2048 -#define NCR_BUF_SIZE 4096 +#define NCR_NVRAM_SIZE 2048 +#define NCR_BUF_SIZE 4096 typedef struct ncr53c8xx_request { uint32_t tag; uint32_t dma_len; uint8_t *dma_buf; uint32_t pending; - int out; + int out; } ncr53c8xx_request; -typedef enum -{ - SCSI_STATE_SEND_COMMAND, - SCSI_STATE_READ_DATA, - SCSI_STATE_WRITE_DATA, - SCSI_STATE_READ_STATUS, - SCSI_STATE_READ_MESSAGE, - SCSI_STATE_WRITE_MESSAGE +typedef enum { + SCSI_STATE_SEND_COMMAND, + SCSI_STATE_READ_DATA, + SCSI_STATE_WRITE_DATA, + SCSI_STATE_READ_STATUS, + SCSI_STATE_READ_MESSAGE, + SCSI_STATE_WRITE_MESSAGE } scsi_state_t; typedef struct { - char *nvr_path; - uint8_t pci_slot; - uint8_t chip, wide; - int has_bios; - int BIOSBase; - rom_t bios; - int PCIBase; - int MMIOBase; + char *nvr_path; + uint8_t pci_slot; + uint8_t chip, wide; + int has_bios; + int BIOSBase; + rom_t bios; + int PCIBase; + int MMIOBase; mem_mapping_t mmio_mapping; - int RAMBase; + int RAMBase; mem_mapping_t ram_mapping; int carry; /* ??? Should this be an a visible register somewhere? */ int status; /* Action to take at the end of a MSG IN phase. 0 = COMMAND, 1 = disconnect, 2 = DATA OUT, 3 = DATA IN. */ - int msg_action; - int msg_len; + int msg_action; + int msg_len; uint8_t msg[NCR_MAX_MSGIN_LEN]; uint8_t nvram[NCR_NVRAM_SIZE]; /* 24C16 EEPROM (16 Kbit) */ - void *i2c, *eeprom; - uint8_t ram[NCR_BUF_SIZE]; /* NCR 53C875 RAM (4 KB) */ + void *i2c, *eeprom; + uint8_t ram[NCR_BUF_SIZE]; /* NCR 53C875 RAM (4 KB) */ /* 0 if SCRIPTS are running or stopped. * 1 if a Wait Reselect instruction has been issued. * 2 if processing DMA from ncr53c8xx_execute_script. @@ -282,7 +280,7 @@ typedef struct { uint8_t gpcntl; uint8_t last_command; - int command_complete; + int command_complete; ncr53c8xx_request *current; int irq; @@ -296,14 +294,14 @@ typedef struct { uint32_t scratcha, scratchb, scratchc, scratchd; uint32_t scratche, scratchf, scratchg, scratchh; uint32_t scratchi, scratchj; - int last_level; - void *hba_private; + int last_level; + void *hba_private; uint32_t buffer_pos; - int32_t temp_buf_len; + int32_t temp_buf_len; uint8_t sstop; - uint8_t regop; + uint8_t regop; uint32_t adder; uint32_t bios_mask; @@ -317,30 +315,26 @@ typedef struct { #endif } ncr53c8xx_t; - #ifdef ENABLE_NCR53C8XX_LOG int ncr53c8xx_do_log = ENABLE_NCR53C8XX_LOG; - static void ncr53c8xx_log(const char *fmt, ...) { va_list ap; if (ncr53c8xx_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define ncr53c8xx_log(fmt, ...) +# define ncr53c8xx_log(fmt, ...) #endif - -static uint8_t ncr53c8xx_reg_readb(ncr53c8xx_t *dev, uint32_t offset); -static void ncr53c8xx_reg_writeb(ncr53c8xx_t *dev, uint32_t offset, uint8_t val); - +static uint8_t ncr53c8xx_reg_readb(ncr53c8xx_t *dev, uint32_t offset); +static void ncr53c8xx_reg_writeb(ncr53c8xx_t *dev, uint32_t offset, uint8_t val); static __inline int32_t sextract32(uint32_t value, int start, int length) @@ -348,17 +342,15 @@ sextract32(uint32_t value, int start, int length) /* Note that this implementation relies on right shift of signed * integers being an arithmetic shift. */ - return ((int32_t)(value << (32 - length - start))) >> (32 - length); + return ((int32_t) (value << (32 - length - start))) >> (32 - length); } - static __inline int ncr53c8xx_irq_on_rsl(ncr53c8xx_t *dev) { return (dev->sien0 & NCR_SIST0_RSL) && (dev->scid & NCR_SCID_RRE); } - static void ncr53c8xx_soft_reset(ncr53c8xx_t *dev) { @@ -370,152 +362,147 @@ ncr53c8xx_soft_reset(ncr53c8xx_t *dev) dev->carry = 0; dev->msg_action = 0; - dev->msg_len = 0; - dev->waiting = 0; - dev->dsa = 0; - dev->dnad = 0; - dev->dbc = 0; - dev->temp = 0; - dev->scratcha = 0; - dev->scratchb = 0; - dev->scratchc = 0; - dev->scratchd = 0; - dev->scratche = 0; - dev->scratchf = 0; - dev->scratchg = 0; - dev->scratchh = 0; - dev->scratchi = 0; - dev->scratchj = 0; - dev->istat = 0; - dev->dcmd = 0x40; - dev->dstat = NCR_DSTAT_DFE; - dev->dien = 0; - dev->sist0 = 0; - dev->sist1 = 0; - dev->sien0 = 0; - dev->sien1 = 0; - dev->mbox0 = 0; - dev->mbox1 = 0; - dev->dfifo = 0; - dev->ctest2 = NCR_CTEST2_DACK; - dev->ctest3 = 0; - dev->ctest4 = 0; - dev->ctest5 = 0; - dev->dsp = 0; - dev->dsps = 0; - dev->dmode = 0; - dev->dcntl = 0; - dev->scntl0 = 0xc0; - dev->scntl1 = 0; - dev->scntl2 = 0; + dev->msg_len = 0; + dev->waiting = 0; + dev->dsa = 0; + dev->dnad = 0; + dev->dbc = 0; + dev->temp = 0; + dev->scratcha = 0; + dev->scratchb = 0; + dev->scratchc = 0; + dev->scratchd = 0; + dev->scratche = 0; + dev->scratchf = 0; + dev->scratchg = 0; + dev->scratchh = 0; + dev->scratchi = 0; + dev->scratchj = 0; + dev->istat = 0; + dev->dcmd = 0x40; + dev->dstat = NCR_DSTAT_DFE; + dev->dien = 0; + dev->sist0 = 0; + dev->sist1 = 0; + dev->sien0 = 0; + dev->sien1 = 0; + dev->mbox0 = 0; + dev->mbox1 = 0; + dev->dfifo = 0; + dev->ctest2 = NCR_CTEST2_DACK; + dev->ctest3 = 0; + dev->ctest4 = 0; + dev->ctest5 = 0; + dev->dsp = 0; + dev->dsps = 0; + dev->dmode = 0; + dev->dcntl = 0; + dev->scntl0 = 0xc0; + dev->scntl1 = 0; + dev->scntl2 = 0; if (dev->wide) - dev->scntl3 = 8; + dev->scntl3 = 8; else - dev->scntl3 = 0; - dev->sstat0 = 0; - dev->sstat1 = 0; - dev->scid = HA_ID; - dev->sxfer = 0; - dev->socl = 0; - dev->sdid = 0; - dev->ssid = 0; - dev->stest1 = 0; - dev->stest2 = 0; - dev->stest3 = 0; - dev->sidl0 = 0; - dev->sidl1 = 0; - dev->stime0 = 0; - dev->stime0 = 1; - dev->respid0 = 0x80; - dev->respid1 = 0x00; - dev->sbr = 0; + dev->scntl3 = 0; + dev->sstat0 = 0; + dev->sstat1 = 0; + dev->scid = HA_ID; + dev->sxfer = 0; + dev->socl = 0; + dev->sdid = 0; + dev->ssid = 0; + dev->stest1 = 0; + dev->stest2 = 0; + dev->stest3 = 0; + dev->sidl0 = 0; + dev->sidl1 = 0; + dev->stime0 = 0; + dev->stime0 = 1; + dev->respid0 = 0x80; + dev->respid1 = 0x00; + dev->sbr = 0; dev->last_level = 0; - dev->gpreg = 0; - dev->slpar = 0; - dev->sstop = 1; - dev->gpcntl = 0x03; + dev->gpreg = 0; + dev->slpar = 0; + dev->sstop = 1; + dev->gpcntl = 0x03; if (dev->wide) { - /* This *IS* a wide SCSI controller, so reset all SCSI - devices. */ - for (i = 0; i < 16; i++) { + /* This *IS* a wide SCSI controller, so reset all SCSI + devices. */ + for (i = 0; i < 16; i++) { #ifdef USE_WDTR - dev->tr_set[i] = 0; + dev->tr_set[i] = 0; #endif - scsi_device_reset(&scsi_devices[dev->bus][i]); - } + scsi_device_reset(&scsi_devices[dev->bus][i]); + } } else { - /* This is *NOT* a wide SCSI controller, so do not touch - SCSI devices with ID's >= 8. */ - for (i = 0; i < 8; i++) { + /* This is *NOT* a wide SCSI controller, so do not touch + SCSI devices with ID's >= 8. */ + for (i = 0; i < 8; i++) { #ifdef USE_WDTR - dev->tr_set[i] = 0; + dev->tr_set[i] = 0; #endif - scsi_device_reset(&scsi_devices[dev->bus][i]); - } + scsi_device_reset(&scsi_devices[dev->bus][i]); + } } } - static void ncr53c8xx_read(ncr53c8xx_t *dev, uint32_t addr, uint8_t *buf, uint32_t len) { - uint32_t i = 0; + uint32_t i = 0; - ncr53c8xx_log("ncr53c8xx_read(): %08X-%08X, length %i\n", addr, (addr + len - 1), len); + ncr53c8xx_log("ncr53c8xx_read(): %08X-%08X, length %i\n", addr, (addr + len - 1), len); - if (dev->dmode & NCR_DMODE_SIOM) { - ncr53c8xx_log("NCR 810: Reading from I/O address %04X\n", (uint16_t) addr); - for (i = 0; i < len; i++) - buf[i] = inb((uint16_t) (addr + i)); - } else { - ncr53c8xx_log("NCR 810: Reading from memory address %08X\n", addr); - dma_bm_read(addr, buf, len, 4); - } + if (dev->dmode & NCR_DMODE_SIOM) { + ncr53c8xx_log("NCR 810: Reading from I/O address %04X\n", (uint16_t) addr); + for (i = 0; i < len; i++) + buf[i] = inb((uint16_t) (addr + i)); + } else { + ncr53c8xx_log("NCR 810: Reading from memory address %08X\n", addr); + dma_bm_read(addr, buf, len, 4); + } } - static void ncr53c8xx_write(ncr53c8xx_t *dev, uint32_t addr, uint8_t *buf, uint32_t len) { - uint32_t i = 0; + uint32_t i = 0; - ncr53c8xx_log("ncr53c8xx_write(): %08X-%08X, length %i\n", addr, (addr + len - 1), len); + ncr53c8xx_log("ncr53c8xx_write(): %08X-%08X, length %i\n", addr, (addr + len - 1), len); - if (dev->dmode & NCR_DMODE_DIOM) { - ncr53c8xx_log("NCR 810: Writing to I/O address %04X\n", (uint16_t) addr); - for (i = 0; i < len; i++) - outb((uint16_t) (addr + i), buf[i]); - } else { - ncr53c8xx_log("NCR 810: Writing to memory address %08X\n", addr); - dma_bm_write(addr, buf, len, 4); - } + if (dev->dmode & NCR_DMODE_DIOM) { + ncr53c8xx_log("NCR 810: Writing to I/O address %04X\n", (uint16_t) addr); + for (i = 0; i < len; i++) + outb((uint16_t) (addr + i), buf[i]); + } else { + ncr53c8xx_log("NCR 810: Writing to memory address %08X\n", addr); + dma_bm_write(addr, buf, len, 4); + } } - static __inline uint32_t read_dword(ncr53c8xx_t *dev, uint32_t addr) { uint32_t buf; ncr53c8xx_log("Reading the next DWORD from memory (%08X)...\n", addr); - dma_bm_read(addr, (uint8_t *)&buf, 4, 4); + dma_bm_read(addr, (uint8_t *) &buf, 4, 4); return buf; } - -static -void do_irq(ncr53c8xx_t *dev, int level) +static void +do_irq(ncr53c8xx_t *dev, int level) { if (level) { - pci_set_irq(dev->pci_slot, PCI_INTA); - ncr53c8xx_log("Raising IRQ...\n"); + pci_set_irq(dev->pci_slot, PCI_INTA); + ncr53c8xx_log("Raising IRQ...\n"); } else { - pci_clear_irq(dev->pci_slot, PCI_INTA); - ncr53c8xx_log("Lowering IRQ...\n"); + pci_clear_irq(dev->pci_slot, PCI_INTA); + ncr53c8xx_log("Lowering IRQ...\n"); } } - static void ncr53c8xx_update_irq(ncr53c8xx_t *dev) { @@ -546,13 +533,12 @@ ncr53c8xx_update_irq(ncr53c8xx_t *dev) if (level != dev->last_level) { ncr53c8xx_log("Update IRQ level %d dstat %02x sist %02x%02x\n", - level, dev->dstat, dev->sist1, dev->sist0); + level, dev->dstat, dev->sist1, dev->sist0); dev->last_level = level; - do_irq(dev, level); /* Only do something with the IRQ if the new level differs from the previous one. */ + do_irq(dev, level); /* Only do something with the IRQ if the new level differs from the previous one. */ } } - /* Stop SCRIPTS execution and raise a SCSI interrupt. */ static void ncr53c8xx_script_scsi_interrupt(ncr53c8xx_t *dev, int stat0, int stat1) @@ -561,7 +547,7 @@ ncr53c8xx_script_scsi_interrupt(ncr53c8xx_t *dev, int stat0, int stat1) uint32_t mask1; ncr53c8xx_log("SCSI Interrupt 0x%02x%02x prev 0x%02x%02x\n", - stat1, stat0, dev->sist1, dev->sist0); + stat1, stat0, dev->sist1, dev->sist0); dev->sist0 |= stat0; dev->sist1 |= stat1; /* Stop processor on fatal or unmasked interrupt. As a special hack @@ -571,14 +557,13 @@ ncr53c8xx_script_scsi_interrupt(ncr53c8xx_t *dev, int stat0, int stat1) mask1 = dev->sien1 | ~(NCR_SIST1_GEN | NCR_SIST1_HTH); mask1 &= ~NCR_SIST1_STO; if ((dev->sist0 & mask0) || (dev->sist1 & mask1)) { - ncr53c8xx_log("NCR 810: IRQ-mandated stop\n"); - dev->sstop = 1; - timer_stop(&dev->timer); + ncr53c8xx_log("NCR 810: IRQ-mandated stop\n"); + dev->sstop = 1; + timer_stop(&dev->timer); } ncr53c8xx_update_irq(dev); } - /* Stop SCRIPTS execution and raise a DMA interrupt. */ static void ncr53c8xx_script_dma_interrupt(ncr53c8xx_t *dev, int stat) @@ -590,14 +575,12 @@ ncr53c8xx_script_dma_interrupt(ncr53c8xx_t *dev, int stat) timer_stop(&dev->timer); } - static __inline void ncr53c8xx_set_phase(ncr53c8xx_t *dev, int phase) { dev->sstat1 = (dev->sstat1 & ~PHASE_MASK) | phase; } - static void ncr53c8xx_bad_phase(ncr53c8xx_t *dev, int out, int new_phase) { @@ -609,7 +592,6 @@ ncr53c8xx_bad_phase(ncr53c8xx_t *dev, int out, int new_phase) ncr53c8xx_set_phase(dev, new_phase); } - static void ncr53c8xx_disconnect(ncr53c8xx_t *dev) { @@ -619,12 +601,11 @@ ncr53c8xx_disconnect(ncr53c8xx_t *dev) dev->scntl1 &= ~NCR_SCNTL1_CON; dev->sstat1 &= ~PHASE_MASK; - if (dev->dcmd & 0x01) /* Select with ATN */ - dev->sstat1 |= 0x07; + if (dev->dcmd & 0x01) /* Select with ATN */ + dev->sstat1 |= 0x07; scsi_device_identify(sd, SCSI_LUN_USE_CDB); } - static void ncr53c8xx_bad_selection(ncr53c8xx_t *dev, uint32_t id) { @@ -633,51 +614,49 @@ ncr53c8xx_bad_selection(ncr53c8xx_t *dev, uint32_t id) ncr53c8xx_disconnect(dev); } - /* Callback to indicate that the SCSI layer has completed a command. */ static void ncr53c8xx_command_complete(void *priv, uint32_t status) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)priv; - int out; + ncr53c8xx_t *dev = (ncr53c8xx_t *) priv; + int out; out = (dev->sstat1 & PHASE_MASK) == PHASE_DO; - ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: Command complete status=%d\n", dev->current->tag, dev->current_lun, dev->last_command, (int)status); - dev->status = status; + ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: Command complete status=%d\n", dev->current->tag, dev->current_lun, dev->last_command, (int) status); + dev->status = status; dev->command_complete = 2; if (dev->waiting && dev->dbc != 0) { - /* Raise phase mismatch for short transfers. */ - ncr53c8xx_bad_phase(dev, out, PHASE_ST); + /* Raise phase mismatch for short transfers. */ + ncr53c8xx_bad_phase(dev, out, PHASE_ST); } else - ncr53c8xx_set_phase(dev, PHASE_ST); + ncr53c8xx_set_phase(dev, PHASE_ST); dev->sstop = 0; } - static void ncr53c8xx_do_dma(ncr53c8xx_t *dev, int out, uint8_t id) { uint32_t addr, tdbc; - int count; + int count; scsi_device_t *sd = &scsi_devices[dev->bus][id]; if ((!scsi_device_present(sd))) { - ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: Device not present when attempting to do DMA\n", id, dev->current_lun, dev->last_command); - return; + ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: Device not present when attempting to do DMA\n", id, dev->current_lun, dev->last_command); + return; } if (!dev->current->dma_len) { - /* Wait until data is available. */ - ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: DMA no data available\n", id, dev->current_lun, dev->last_command); - return; + /* Wait until data is available. */ + ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: DMA no data available\n", id, dev->current_lun, dev->last_command); + return; } /* Make sure count is never bigger than buffer_length. */ count = tdbc = dev->dbc; if (count > dev->temp_buf_len) - count = dev->temp_buf_len; + count = dev->temp_buf_len; addr = dev->dnad; @@ -686,45 +665,43 @@ ncr53c8xx_do_dma(ncr53c8xx_t *dev, int out, uint8_t id) dev->dbc -= count; if (out) - ncr53c8xx_read(dev, addr, sd->sc->temp_buffer + dev->buffer_pos, count); + ncr53c8xx_read(dev, addr, sd->sc->temp_buffer + dev->buffer_pos, count); else { #ifdef ENABLE_NCR53C8XX_LOG - if (!dev->buffer_pos) - ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: SCSI Command Phase 1 on PHASE_DI\n", id, dev->current_lun, dev->last_command); + if (!dev->buffer_pos) + ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: SCSI Command Phase 1 on PHASE_DI\n", id, dev->current_lun, dev->last_command); #endif - ncr53c8xx_write(dev, addr, sd->sc->temp_buffer + dev->buffer_pos, count); + ncr53c8xx_write(dev, addr, sd->sc->temp_buffer + dev->buffer_pos, count); } dev->temp_buf_len -= count; dev->buffer_pos += count; if (dev->temp_buf_len <= 0) { - scsi_device_command_phase1(&scsi_devices[dev->bus][id]); + scsi_device_command_phase1(&scsi_devices[dev->bus][id]); #ifdef ENABLE_NCR53C8XX_LOG - if (out) - ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: SCSI Command Phase 1 on PHASE_DO\n", id, dev->current_lun, dev->last_command); + if (out) + ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: SCSI Command Phase 1 on PHASE_DO\n", id, dev->current_lun, dev->last_command); #endif - ncr53c8xx_command_complete(dev, sd->status); + ncr53c8xx_command_complete(dev, sd->status); } else { - ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: Resume SCRIPTS\n", id, dev->current_lun, dev->last_command); - dev->sstop = 0; + ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: Resume SCRIPTS\n", id, dev->current_lun, dev->last_command); + dev->sstop = 0; } } - /* Queue a byte for a MSG IN phase. */ static void ncr53c8xx_add_msg_byte(ncr53c8xx_t *dev, uint8_t data) { if (dev->msg_len >= NCR_MAX_MSGIN_LEN) - ncr53c8xx_log("MSG IN data too long\n"); + ncr53c8xx_log("MSG IN data too long\n"); else { - ncr53c8xx_log("MSG IN 0x%02x\n", data); - dev->msg[dev->msg_len++] = data; + ncr53c8xx_log("MSG IN 0x%02x\n", data); + dev->msg[dev->msg_len++] = data; } } - static void ncr53c8xx_timer_on(ncr53c8xx_t *dev, scsi_device_t *sd, double p) { @@ -736,30 +713,29 @@ ncr53c8xx_timer_on(ncr53c8xx_t *dev, scsi_device_t *sd, double p) timer_on_auto(&dev->timer, period + 40.0); } - static int ncr53c8xx_do_command(ncr53c8xx_t *dev, uint8_t id) { scsi_device_t *sd; - uint8_t buf[12]; + uint8_t buf[12]; memset(buf, 0, 12); dma_bm_read(dev->dnad, buf, MIN(12, dev->dbc), 4); if (dev->dbc > 12) { - ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: CDB length %i too big\n", id, dev->current_lun, buf[0], dev->dbc); - dev->dbc = 12; + ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: CDB length %i too big\n", id, dev->current_lun, buf[0], dev->dbc); + dev->dbc = 12; } - dev->sfbr = buf[0]; + dev->sfbr = buf[0]; dev->command_complete = 0; sd = &scsi_devices[dev->bus][id]; if (!scsi_device_present(sd) || (dev->current_lun > 0)) { - ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: Bad Selection\n", id, dev->current_lun, buf[0]); - ncr53c8xx_bad_selection(dev, id); - return 0; + ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: Bad Selection\n", id, dev->current_lun, buf[0]); + ncr53c8xx_bad_selection(dev, id); + return 0; } - dev->current = (ncr53c8xx_request*)malloc(sizeof(ncr53c8xx_request)); + dev->current = (ncr53c8xx_request *) malloc(sizeof(ncr53c8xx_request)); dev->current->tag = id; sd->buffer_length = -1; @@ -769,47 +745,46 @@ ncr53c8xx_do_command(ncr53c8xx_t *dev, uint8_t id) /* Make sure bits 5-7 of the CDB have the correct LUN. */ if ((buf[1] & 0xe0) != (dev->current_lun << 5)) - buf[1] = (buf[1] & 0x1f) | (dev->current_lun << 5); + buf[1] = (buf[1] & 0x1f) | (dev->current_lun << 5); scsi_device_command_phase0(&scsi_devices[dev->bus][dev->current->tag], buf); - dev->hba_private = (void *)dev->current; + dev->hba_private = (void *) dev->current; - dev->waiting = 0; + dev->waiting = 0; dev->buffer_pos = 0; dev->temp_buf_len = sd->buffer_length; if (sd->buffer_length > 0) { - /* This should be set to the underlying device's buffer by command phase 0. */ - dev->current->dma_len = sd->buffer_length; + /* This should be set to the underlying device's buffer by command phase 0. */ + dev->current->dma_len = sd->buffer_length; } if ((sd->phase == SCSI_PHASE_DATA_IN) && (sd->buffer_length > 0)) { - ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: PHASE_DI\n", id, dev->current_lun, buf[0]); - ncr53c8xx_set_phase(dev, PHASE_DI); - ncr53c8xx_timer_on(dev, sd, scsi_device_get_callback(&scsi_devices[dev->bus][dev->current->tag])); - return 1; + ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: PHASE_DI\n", id, dev->current_lun, buf[0]); + ncr53c8xx_set_phase(dev, PHASE_DI); + ncr53c8xx_timer_on(dev, sd, scsi_device_get_callback(&scsi_devices[dev->bus][dev->current->tag])); + return 1; } else if ((sd->phase == SCSI_PHASE_DATA_OUT) && (sd->buffer_length > 0)) { - ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: PHASE_DO\n", id, buf[0]); - ncr53c8xx_set_phase(dev, PHASE_DO); - ncr53c8xx_timer_on(dev, sd, scsi_device_get_callback(&scsi_devices[dev->bus][dev->current->tag])); - return 1; + ncr53c8xx_log("(ID=%02i LUN=%02i) SCSI Command 0x%02x: PHASE_DO\n", id, buf[0]); + ncr53c8xx_set_phase(dev, PHASE_DO); + ncr53c8xx_timer_on(dev, sd, scsi_device_get_callback(&scsi_devices[dev->bus][dev->current->tag])); + return 1; } else { - ncr53c8xx_command_complete(dev, sd->status); - return 0; + ncr53c8xx_command_complete(dev, sd->status); + return 0; } } - static void ncr53c8xx_do_status(ncr53c8xx_t *dev) { uint8_t status; ncr53c8xx_log("Get status len=%d status=%d\n", dev->dbc, dev->status); if (dev->dbc != 1) - ncr53c8xx_log("Bad Status move\n"); - dev->dbc = 1; - status = dev->status; + ncr53c8xx_log("Bad Status move\n"); + dev->dbc = 1; + status = dev->status; dev->sfbr = status; ncr53c8xx_write(dev, dev->dnad, &status, 1); ncr53c8xx_set_phase(dev, PHASE_MI); @@ -817,7 +792,6 @@ ncr53c8xx_do_status(ncr53c8xx_t *dev) ncr53c8xx_add_msg_byte(dev, 0); /* COMMAND COMPLETE */ } - #ifdef USE_WDTR static void ncr53c8xx_do_wdtr(ncr53c8xx_t *dev, int exponent) @@ -825,55 +799,53 @@ ncr53c8xx_do_wdtr(ncr53c8xx_t *dev, int exponent) ncr53c8xx_log("Target-initiated WDTR (%08X)\n", dev); ncr53c8xx_set_phase(dev, PHASE_MI); dev->msg_action = 4; - ncr53c8xx_add_msg_byte(dev, 0x01); /* EXTENDED MESSAGE */ - ncr53c8xx_add_msg_byte(dev, 0x02); /* EXTENDED MESSAGE LENGTH */ - ncr53c8xx_add_msg_byte(dev, 0x03); /* WIDE DATA TRANSFER REQUEST */ - ncr53c8xx_add_msg_byte(dev, exponent); /* TRANSFER WIDTH EXPONENT (16-bit) */ + ncr53c8xx_add_msg_byte(dev, 0x01); /* EXTENDED MESSAGE */ + ncr53c8xx_add_msg_byte(dev, 0x02); /* EXTENDED MESSAGE LENGTH */ + ncr53c8xx_add_msg_byte(dev, 0x03); /* WIDE DATA TRANSFER REQUEST */ + ncr53c8xx_add_msg_byte(dev, exponent); /* TRANSFER WIDTH EXPONENT (16-bit) */ } #endif - static void ncr53c8xx_do_msgin(ncr53c8xx_t *dev) { uint32_t len; ncr53c8xx_log("Message in len=%d/%d\n", dev->dbc, dev->msg_len); dev->sfbr = dev->msg[0]; - len = dev->msg_len; + len = dev->msg_len; if (len > dev->dbc) - len = dev->dbc; + len = dev->dbc; ncr53c8xx_write(dev, dev->dnad, dev->msg, len); /* Linux drivers rely on the last byte being in the SIDL. */ dev->sidl0 = dev->msg[len - 1]; dev->msg_len -= len; if (dev->msg_len) - memmove(dev->msg, dev->msg + len, dev->msg_len); - else { - /* ??? Check if ATN (not yet implemented) is asserted and maybe - switch to PHASE_MO. */ - switch (dev->msg_action) { - case 0: - ncr53c8xx_set_phase(dev, PHASE_CMD); - break; - case 1: - ncr53c8xx_disconnect(dev); - break; - case 2: - ncr53c8xx_set_phase(dev, PHASE_DO); - break; - case 3: - ncr53c8xx_set_phase(dev, PHASE_DI); - break; - case 4: - ncr53c8xx_set_phase(dev, PHASE_MO); - break; - default: - abort(); - } + memmove(dev->msg, dev->msg + len, dev->msg_len); + else { + /* ??? Check if ATN (not yet implemented) is asserted and maybe + switch to PHASE_MO. */ + switch (dev->msg_action) { + case 0: + ncr53c8xx_set_phase(dev, PHASE_CMD); + break; + case 1: + ncr53c8xx_disconnect(dev); + break; + case 2: + ncr53c8xx_set_phase(dev, PHASE_DO); + break; + case 3: + ncr53c8xx_set_phase(dev, PHASE_DI); + break; + case 4: + ncr53c8xx_set_phase(dev, PHASE_MO); + break; + default: + abort(); + } } } - /* Read the next byte during a MSGOUT phase. */ static uint8_t ncr53c8xx_get_msgbyte(ncr53c8xx_t *dev) @@ -885,16 +857,14 @@ ncr53c8xx_get_msgbyte(ncr53c8xx_t *dev) return data; } - /* Skip the next n bytes during a MSGOUT phase. */ static void ncr53c8xx_skip_msgbytes(ncr53c8xx_t *dev, unsigned int n) { dev->dnad += n; - dev->dbc -= n; + dev->dbc -= n; } - static void ncr53c8xx_bad_message(ncr53c8xx_t *dev, uint8_t msg) { @@ -904,12 +874,11 @@ ncr53c8xx_bad_message(ncr53c8xx_t *dev, uint8_t msg) dev->msg_action = 0; } - static void ncr53c8xx_do_msgout(ncr53c8xx_t *dev, uint8_t id) { uint8_t msg; - int len, arg; + int len, arg; #ifdef ENABLE_NCR53C8XX_LOG uint32_t current_tag; #endif @@ -923,120 +892,118 @@ ncr53c8xx_do_msgout(ncr53c8xx_t *dev, uint8_t id) ncr53c8xx_log("MSG out len=%d\n", dev->dbc); while (dev->dbc) { - msg = ncr53c8xx_get_msgbyte(dev); - dev->sfbr = msg; + msg = ncr53c8xx_get_msgbyte(dev); + dev->sfbr = msg; - switch (msg) { - case 0x04: - ncr53c8xx_log("MSG: Disconnect\n"); - ncr53c8xx_disconnect(dev); - break; - case 0x08: - ncr53c8xx_log("MSG: No Operation\n"); - ncr53c8xx_set_phase(dev, PHASE_CMD); - break; - case 0x01: - len = ncr53c8xx_get_msgbyte(dev); - msg = ncr53c8xx_get_msgbyte(dev); - arg = ncr53c8xx_get_msgbyte(dev); - (void) len; /* avoid a warning about unused variable*/ - ncr53c8xx_log("Extended message 0x%x (len %d)\n", msg, len); - switch (msg) { - case 1: - ncr53c8xx_log("SDTR (ignored)\n"); - ncr53c8xx_skip_msgbytes(dev, 1); - break; - case 3: - ncr53c8xx_log("WDTR (ignored)\n"); + switch (msg) { + case 0x04: + ncr53c8xx_log("MSG: Disconnect\n"); + ncr53c8xx_disconnect(dev); + break; + case 0x08: + ncr53c8xx_log("MSG: No Operation\n"); + ncr53c8xx_set_phase(dev, PHASE_CMD); + break; + case 0x01: + len = ncr53c8xx_get_msgbyte(dev); + msg = ncr53c8xx_get_msgbyte(dev); + arg = ncr53c8xx_get_msgbyte(dev); + (void) len; /* avoid a warning about unused variable*/ + ncr53c8xx_log("Extended message 0x%x (len %d)\n", msg, len); + switch (msg) { + case 1: + ncr53c8xx_log("SDTR (ignored)\n"); + ncr53c8xx_skip_msgbytes(dev, 1); + break; + case 3: + ncr53c8xx_log("WDTR (ignored)\n"); #ifdef USE_WDTR - dev->tr_set[dev->sdid] = 1; + dev->tr_set[dev->sdid] = 1; #endif - if (arg > 0x01) { - ncr53c8xx_bad_message(dev, msg); - return; - } - ncr53c8xx_set_phase(dev, PHASE_CMD); - break; - case 5: - ncr53c8xx_log("PPR (ignored)\n"); - ncr53c8xx_skip_msgbytes(dev, 4); - break; - default: - ncr53c8xx_bad_message(dev, msg); - return; - } - break; - case 0x20: /* SIMPLE queue */ - id |= ncr53c8xx_get_msgbyte(dev) | NCR_TAG_VALID; - ncr53c8xx_log("SIMPLE queue tag=0x%x\n", id & 0xff); - break; - case 0x21: /* HEAD of queue */ - ncr53c8xx_log("HEAD queue not implemented\n"); - id |= ncr53c8xx_get_msgbyte(dev) | NCR_TAG_VALID; - break; - case 0x22: /* ORDERED queue */ - ncr53c8xx_log("ORDERED queue not implemented\n"); - id |= ncr53c8xx_get_msgbyte(dev) | NCR_TAG_VALID; - break; - case 0x0d: - /* The ABORT TAG message clears the current I/O process only. */ - ncr53c8xx_log("MSG: Abort Tag\n"); - scsi_device_command_stop(sd); - ncr53c8xx_disconnect(dev); - break; - case 0x0c: - /* BUS DEVICE RESET message, reset wide transfer request. */ + if (arg > 0x01) { + ncr53c8xx_bad_message(dev, msg); + return; + } + ncr53c8xx_set_phase(dev, PHASE_CMD); + break; + case 5: + ncr53c8xx_log("PPR (ignored)\n"); + ncr53c8xx_skip_msgbytes(dev, 4); + break; + default: + ncr53c8xx_bad_message(dev, msg); + return; + } + break; + case 0x20: /* SIMPLE queue */ + id |= ncr53c8xx_get_msgbyte(dev) | NCR_TAG_VALID; + ncr53c8xx_log("SIMPLE queue tag=0x%x\n", id & 0xff); + break; + case 0x21: /* HEAD of queue */ + ncr53c8xx_log("HEAD queue not implemented\n"); + id |= ncr53c8xx_get_msgbyte(dev) | NCR_TAG_VALID; + break; + case 0x22: /* ORDERED queue */ + ncr53c8xx_log("ORDERED queue not implemented\n"); + id |= ncr53c8xx_get_msgbyte(dev) | NCR_TAG_VALID; + break; + case 0x0d: + /* The ABORT TAG message clears the current I/O process only. */ + ncr53c8xx_log("MSG: Abort Tag\n"); + scsi_device_command_stop(sd); + ncr53c8xx_disconnect(dev); + break; + case 0x0c: + /* BUS DEVICE RESET message, reset wide transfer request. */ #ifdef USE_WDTR - dev->tr_set[dev->sdid] = 0; + dev->tr_set[dev->sdid] = 0; #endif - /* FALLTHROUGH */ - case 0x06: - case 0x0e: - /* clear the current I/O process */ - scsi_device_command_stop(sd); - ncr53c8xx_disconnect(dev); - break; - default: - if ((msg & 0x80) == 0) { - ncr53c8xx_bad_message(dev, msg); - return; - } else { - /* 0x80 to 0xff are IDENTIFY messages. */ - ncr53c8xx_log("MSG: Identify\n"); - dev->current_lun = msg & 7; - scsi_device_identify(sd, msg & 7); - ncr53c8xx_log("Select LUN %d\n", dev->current_lun); + /* FALLTHROUGH */ + case 0x06: + case 0x0e: + /* clear the current I/O process */ + scsi_device_command_stop(sd); + ncr53c8xx_disconnect(dev); + break; + default: + if ((msg & 0x80) == 0) { + ncr53c8xx_bad_message(dev, msg); + return; + } else { + /* 0x80 to 0xff are IDENTIFY messages. */ + ncr53c8xx_log("MSG: Identify\n"); + dev->current_lun = msg & 7; + scsi_device_identify(sd, msg & 7); + ncr53c8xx_log("Select LUN %d\n", dev->current_lun); #ifdef USE_WDTR - if ((dev->chip == CHIP_875) && !dev->tr_set[dev->sdid]) - ncr53c8xx_do_wdtr(dev, 0x01); - else + if ((dev->chip == CHIP_875) && !dev->tr_set[dev->sdid]) + ncr53c8xx_do_wdtr(dev, 0x01); + else #endif - ncr53c8xx_set_phase(dev, PHASE_CMD); - } - break; - } + ncr53c8xx_set_phase(dev, PHASE_CMD); + } + break; + } } } - static void ncr53c8xx_memcpy(ncr53c8xx_t *dev, uint32_t dest, uint32_t src, int count) { - int n; + int n; uint8_t buf[NCR_BUF_SIZE]; ncr53c8xx_log("memcpy dest 0x%08x src 0x%08x count %d\n", dest, src, count); while (count) { - n = (count > NCR_BUF_SIZE) ? NCR_BUF_SIZE : count; - ncr53c8xx_read(dev, src, buf, n); - ncr53c8xx_write(dev, dest, buf, n); - src += n; - dest += n; - count -= n; + n = (count > NCR_BUF_SIZE) ? NCR_BUF_SIZE : count; + ncr53c8xx_read(dev, src, buf, n); + ncr53c8xx_write(dev, dest, buf, n); + src += n; + dest += n; + count -= n; } } - static void ncr53c8xx_process_script(ncr53c8xx_t *dev) { @@ -1053,15 +1020,15 @@ again: insn_processed++; insn = read_dword(dev, dev->dsp); if (!insn) { - /* If we receive an empty opcode increment the DSP by 4 bytes - instead of 8 and execute the next opcode at that location */ - dev->dsp += 4; - if (insn_processed < 100) - goto again; - else { - timer_on_auto(&dev->timer, 10.0); - return; - } + /* If we receive an empty opcode increment the DSP by 4 bytes + instead of 8 and execute the next opcode at that location */ + dev->dsp += 4; + if (insn_processed < 100) + goto again; + else { + timer_on_auto(&dev->timer, 10.0); + return; + } } addr = read_dword(dev, dev->dsp + 4); ncr53c8xx_log("SCRIPTS dsp=%08x opcode %08x arg %08x\n", dev->dsp, insn, addr); @@ -1070,357 +1037,357 @@ again: dev->dsp += 8; switch (insn >> 30) { - case 0: /* Block move. */ - ncr53c8xx_log("00: Block move\n"); - if (dev->sist1 & NCR_SIST1_STO) { - ncr53c8xx_log("Delayed select timeout\n"); - dev->sstop = 1; - break; - } - ncr53c8xx_log("Block Move DBC=%d\n", dev->dbc); - dev->dbc = insn & 0xffffff; - ncr53c8xx_log("Block Move DBC=%d now\n", dev->dbc); - /* ??? Set ESA. */ - if (insn & (1 << 29)) { - /* Indirect addressing. */ - /* Should this respect SIOM? */ - addr = read_dword(dev, addr); - ncr53c8xx_log("Indirect Block Move address: %08X\n", addr); - } else if (insn & (1 << 28)) { - /* Table indirect addressing. */ + case 0: /* Block move. */ + ncr53c8xx_log("00: Block move\n"); + if (dev->sist1 & NCR_SIST1_STO) { + ncr53c8xx_log("Delayed select timeout\n"); + dev->sstop = 1; + break; + } + ncr53c8xx_log("Block Move DBC=%d\n", dev->dbc); + dev->dbc = insn & 0xffffff; + ncr53c8xx_log("Block Move DBC=%d now\n", dev->dbc); + /* ??? Set ESA. */ + if (insn & (1 << 29)) { + /* Indirect addressing. */ + /* Should this respect SIOM? */ + addr = read_dword(dev, addr); + ncr53c8xx_log("Indirect Block Move address: %08X\n", addr); + } else if (insn & (1 << 28)) { + /* Table indirect addressing. */ - /* 32-bit Table indirect */ - offset = sextract32(addr, 0, 24); - dma_bm_read(dev->dsa + offset, (uint8_t *)buf, 8, 4); - /* byte count is stored in bits 0:23 only */ - dev->dbc = buf[0] & 0xffffff; - addr = buf[1]; + /* 32-bit Table indirect */ + offset = sextract32(addr, 0, 24); + dma_bm_read(dev->dsa + offset, (uint8_t *) buf, 8, 4); + /* byte count is stored in bits 0:23 only */ + dev->dbc = buf[0] & 0xffffff; + addr = buf[1]; - /* 40-bit DMA, upper addr bits [39:32] stored in first DWORD of - * table, bits [31:24] */ - } - if ((dev->sstat1 & PHASE_MASK) != ((insn >> 24) & 7)) { - ncr53c8xx_log("Wrong phase got %d expected %d\n", - dev->sstat1 & PHASE_MASK, (insn >> 24) & 7); - ncr53c8xx_script_scsi_interrupt(dev, NCR_SIST0_MA, 0); - break; - } - dev->dnad = addr; - switch (dev->sstat1 & 0x7) { - case PHASE_DO: - ncr53c8xx_log("Data Out Phase\n"); - dev->waiting = 0; - ncr53c8xx_do_dma(dev, 1, dev->sdid); - break; - case PHASE_DI: - ncr53c8xx_log("Data In Phase\n"); - dev->waiting = 0; - ncr53c8xx_do_dma(dev, 0, dev->sdid); - break; - case PHASE_CMD: - ncr53c8xx_log("Command Phase\n"); - c = ncr53c8xx_do_command(dev, dev->sdid); + /* 40-bit DMA, upper addr bits [39:32] stored in first DWORD of + * table, bits [31:24] */ + } + if ((dev->sstat1 & PHASE_MASK) != ((insn >> 24) & 7)) { + ncr53c8xx_log("Wrong phase got %d expected %d\n", + dev->sstat1 & PHASE_MASK, (insn >> 24) & 7); + ncr53c8xx_script_scsi_interrupt(dev, NCR_SIST0_MA, 0); + break; + } + dev->dnad = addr; + switch (dev->sstat1 & 0x7) { + case PHASE_DO: + ncr53c8xx_log("Data Out Phase\n"); + dev->waiting = 0; + ncr53c8xx_do_dma(dev, 1, dev->sdid); + break; + case PHASE_DI: + ncr53c8xx_log("Data In Phase\n"); + dev->waiting = 0; + ncr53c8xx_do_dma(dev, 0, dev->sdid); + break; + case PHASE_CMD: + ncr53c8xx_log("Command Phase\n"); + c = ncr53c8xx_do_command(dev, dev->sdid); - if (!c || dev->sstop || dev->waiting || ((dev->sstat1 & 0x7) == PHASE_ST)) - break; + if (!c || dev->sstop || dev->waiting || ((dev->sstat1 & 0x7) == PHASE_ST)) + break; - dev->dfifo = dev->dbc & 0xff; - dev->ctest5 = (dev->ctest5 & 0xfc) | ((dev->dbc >> 8) & 3); + dev->dfifo = dev->dbc & 0xff; + dev->ctest5 = (dev->ctest5 & 0xfc) | ((dev->dbc >> 8) & 3); - if (dev->dcntl & NCR_DCNTL_SSM) - ncr53c8xx_script_dma_interrupt(dev, NCR_DSTAT_SSI); - return; - case PHASE_ST: - ncr53c8xx_log("Status Phase\n"); - ncr53c8xx_do_status(dev); - break; - case PHASE_MO: - ncr53c8xx_log("MSG Out Phase\n"); - ncr53c8xx_do_msgout(dev, dev->sdid); - break; - case PHASE_MI: - ncr53c8xx_log("MSG In Phase\n"); - ncr53c8xx_do_msgin(dev); - break; - default: - ncr53c8xx_log("Unimplemented phase %d\n", dev->sstat1 & PHASE_MASK); - } - dev->dfifo = dev->dbc & 0xff; - dev->ctest5 = (dev->ctest5 & 0xfc) | ((dev->dbc >> 8) & 3); - break; + if (dev->dcntl & NCR_DCNTL_SSM) + ncr53c8xx_script_dma_interrupt(dev, NCR_DSTAT_SSI); + return; + case PHASE_ST: + ncr53c8xx_log("Status Phase\n"); + ncr53c8xx_do_status(dev); + break; + case PHASE_MO: + ncr53c8xx_log("MSG Out Phase\n"); + ncr53c8xx_do_msgout(dev, dev->sdid); + break; + case PHASE_MI: + ncr53c8xx_log("MSG In Phase\n"); + ncr53c8xx_do_msgin(dev); + break; + default: + ncr53c8xx_log("Unimplemented phase %d\n", dev->sstat1 & PHASE_MASK); + } + dev->dfifo = dev->dbc & 0xff; + dev->ctest5 = (dev->ctest5 & 0xfc) | ((dev->dbc >> 8) & 3); + break; - case 1: /* IO or Read/Write instruction. */ - ncr53c8xx_log("01: I/O or Read/Write instruction\n"); - opcode = (insn >> 27) & 7; - if (opcode < 5) { - if (insn & (1 << 25)) - id = read_dword(dev, dev->dsa + sextract32(insn, 0, 24)); - else - id = insn; - id = (id >> 16) & 0xf; - if (insn & (1 << 26)) - addr = dev->dsp + sextract32(addr, 0, 24); - dev->dnad = addr; - switch (opcode) { - case 0: /* Select */ - dev->sdid = id; - if (dev->scntl1 & NCR_SCNTL1_CON) { - ncr53c8xx_log("Already reselected, jumping to alternative address\n"); - dev->dsp = dev->dnad; - break; - } - dev->sstat0 |= NCR_SSTAT0_WOA; - dev->scntl1 &= ~NCR_SCNTL1_IARB; - if (!scsi_device_present(&scsi_devices[dev->bus][id])) { - ncr53c8xx_bad_selection(dev, id); - break; - } - ncr53c8xx_log("Selected target %d%s\n", - id, insn & (1 << 24) ? " ATN" : ""); - dev->scntl1 |= NCR_SCNTL1_CON; - if (insn & (1 << 24)) - dev->socl |= NCR_SOCL_ATN; - ncr53c8xx_set_phase(dev, PHASE_MO); - dev->waiting = 0; - break; - case 1: /* Disconnect */ - ncr53c8xx_log("Wait Disconnect\n"); - dev->scntl1 &= ~NCR_SCNTL1_CON; - break; - case 2: /* Wait Reselect */ - ncr53c8xx_log("Wait Reselect\n"); - if (dev->istat & NCR_ISTAT_SIGP) - dev->dsp = dev->dnad; /* If SIGP is set, this command causes an immediate jump to DNAD. */ - else { - if (!ncr53c8xx_irq_on_rsl(dev)) - dev->waiting = 1; - } - break; - case 3: /* Set */ - ncr53c8xx_log("Set%s%s%s%s\n", insn & (1 << 3) ? " ATN" : "", - insn & (1 << 6) ? " ACK" : "", - insn & (1 << 9) ? " TM" : "", - insn & (1 << 10) ? " CC" : ""); - if (insn & (1 << 3)) { - dev->socl |= NCR_SOCL_ATN; - ncr53c8xx_set_phase(dev, PHASE_MO); - } - if (insn & (1 << 9)) - ncr53c8xx_log("Target mode not implemented\n"); - if (insn & (1 << 10)) - dev->carry = 1; - break; - case 4: /* Clear */ - ncr53c8xx_log("Clear%s%s%s%s\n", insn & (1 << 3) ? " ATN" : "", - insn & (1 << 6) ? " ACK" : "", - insn & (1 << 9) ? " TM" : "", - insn & (1 << 10) ? " CC" : ""); - if (insn & (1 << 3)) - dev->socl &= ~NCR_SOCL_ATN; - if (insn & (1 << 10)) - dev->carry = 0; - break; - } - } else { - reg = ((insn >> 16) & 0x7f) | (insn & 0x80); - data8 = (insn >> 8) & 0xff; - opcode = (insn >> 27) & 7; - operator = (insn >> 24) & 7; - op0 = op1 = 0; - switch (opcode) { - case 5: /* From SFBR */ - op0 = dev->sfbr; - op1 = data8; - break; - case 6: /* To SFBR */ - if (operator) - op0 = ncr53c8xx_reg_readb(dev, reg); - op1 = data8; - break; - case 7: /* Read-modify-write */ - if (operator) - op0 = ncr53c8xx_reg_readb(dev, reg); - if (insn & (1 << 23)) - op1 = dev->sfbr; - else - op1 = data8; - break; - } + case 1: /* IO or Read/Write instruction. */ + ncr53c8xx_log("01: I/O or Read/Write instruction\n"); + opcode = (insn >> 27) & 7; + if (opcode < 5) { + if (insn & (1 << 25)) + id = read_dword(dev, dev->dsa + sextract32(insn, 0, 24)); + else + id = insn; + id = (id >> 16) & 0xf; + if (insn & (1 << 26)) + addr = dev->dsp + sextract32(addr, 0, 24); + dev->dnad = addr; + switch (opcode) { + case 0: /* Select */ + dev->sdid = id; + if (dev->scntl1 & NCR_SCNTL1_CON) { + ncr53c8xx_log("Already reselected, jumping to alternative address\n"); + dev->dsp = dev->dnad; + break; + } + dev->sstat0 |= NCR_SSTAT0_WOA; + dev->scntl1 &= ~NCR_SCNTL1_IARB; + if (!scsi_device_present(&scsi_devices[dev->bus][id])) { + ncr53c8xx_bad_selection(dev, id); + break; + } + ncr53c8xx_log("Selected target %d%s\n", + id, insn & (1 << 24) ? " ATN" : ""); + dev->scntl1 |= NCR_SCNTL1_CON; + if (insn & (1 << 24)) + dev->socl |= NCR_SOCL_ATN; + ncr53c8xx_set_phase(dev, PHASE_MO); + dev->waiting = 0; + break; + case 1: /* Disconnect */ + ncr53c8xx_log("Wait Disconnect\n"); + dev->scntl1 &= ~NCR_SCNTL1_CON; + break; + case 2: /* Wait Reselect */ + ncr53c8xx_log("Wait Reselect\n"); + if (dev->istat & NCR_ISTAT_SIGP) + dev->dsp = dev->dnad; /* If SIGP is set, this command causes an immediate jump to DNAD. */ + else { + if (!ncr53c8xx_irq_on_rsl(dev)) + dev->waiting = 1; + } + break; + case 3: /* Set */ + ncr53c8xx_log("Set%s%s%s%s\n", insn & (1 << 3) ? " ATN" : "", + insn & (1 << 6) ? " ACK" : "", + insn & (1 << 9) ? " TM" : "", + insn & (1 << 10) ? " CC" : ""); + if (insn & (1 << 3)) { + dev->socl |= NCR_SOCL_ATN; + ncr53c8xx_set_phase(dev, PHASE_MO); + } + if (insn & (1 << 9)) + ncr53c8xx_log("Target mode not implemented\n"); + if (insn & (1 << 10)) + dev->carry = 1; + break; + case 4: /* Clear */ + ncr53c8xx_log("Clear%s%s%s%s\n", insn & (1 << 3) ? " ATN" : "", + insn & (1 << 6) ? " ACK" : "", + insn & (1 << 9) ? " TM" : "", + insn & (1 << 10) ? " CC" : ""); + if (insn & (1 << 3)) + dev->socl &= ~NCR_SOCL_ATN; + if (insn & (1 << 10)) + dev->carry = 0; + break; + } + } else { + reg = ((insn >> 16) & 0x7f) | (insn & 0x80); + data8 = (insn >> 8) & 0xff; + opcode = (insn >> 27) & 7; + operator=(insn >> 24) & 7; + op0 = op1 = 0; + switch (opcode) { + case 5: /* From SFBR */ + op0 = dev->sfbr; + op1 = data8; + break; + case 6: /* To SFBR */ + if (operator) + op0 = ncr53c8xx_reg_readb(dev, reg); + op1 = data8; + break; + case 7: /* Read-modify-write */ + if (operator) + op0 = ncr53c8xx_reg_readb(dev, reg); + if (insn & (1 << 23)) + op1 = dev->sfbr; + else + op1 = data8; + break; + } - switch (operator) { - case 0: /* move */ - op0 = op1; - break; - case 1: /* Shift left */ - op1 = op0 >> 7; - op0 = (op0 << 1) | dev->carry; - dev->carry = op1; - break; - case 2: /* OR */ - op0 |= op1; - break; - case 3: /* XOR */ - op0 ^= op1; - break; - case 4: /* AND */ - op0 &= op1; - break; - case 5: /* SHR */ - op1 = op0 & 1; - op0 = (op0 >> 1) | (dev->carry << 7); - dev->carry = op1; - break; - case 6: /* ADD */ - op0 += op1; - dev->carry = op0 < op1; - break; - case 7: /* ADC */ - op0 += op1 + dev->carry; - if (dev->carry) - dev->carry = op0 <= op1; - else - dev->carry = op0 < op1; - break; - } + switch (operator) { + case 0: /* move */ + op0 = op1; + break; + case 1: /* Shift left */ + op1 = op0 >> 7; + op0 = (op0 << 1) | dev->carry; + dev->carry = op1; + break; + case 2: /* OR */ + op0 |= op1; + break; + case 3: /* XOR */ + op0 ^= op1; + break; + case 4: /* AND */ + op0 &= op1; + break; + case 5: /* SHR */ + op1 = op0 & 1; + op0 = (op0 >> 1) | (dev->carry << 7); + dev->carry = op1; + break; + case 6: /* ADD */ + op0 += op1; + dev->carry = op0 < op1; + break; + case 7: /* ADC */ + op0 += op1 + dev->carry; + if (dev->carry) + dev->carry = op0 <= op1; + else + dev->carry = op0 < op1; + break; + } - switch (opcode) { - case 5: /* From SFBR */ - case 7: /* Read-modify-write */ - ncr53c8xx_reg_writeb(dev, reg, op0); - break; - case 6: /* To SFBR */ - dev->sfbr = op0; - break; - } - } - break; + switch (opcode) { + case 5: /* From SFBR */ + case 7: /* Read-modify-write */ + ncr53c8xx_reg_writeb(dev, reg, op0); + break; + case 6: /* To SFBR */ + dev->sfbr = op0; + break; + } + } + break; - case 2: /* Transfer Control. */ - ncr53c8xx_log("02: Transfer Control\n"); - if ((insn & 0x002e0000) == 0) { - ncr53c8xx_log("NOP\n"); - break; - } - if (dev->sist1 & NCR_SIST1_STO) { - ncr53c8xx_log("Delayed select timeout\n"); - dev->sstop = 1; - break; - } - cond = jmp = (insn & (1 << 19)) != 0; - if (cond == jmp && (insn & (1 << 21))) { - ncr53c8xx_log("Compare carry %d\n", dev->carry == jmp); - cond = dev->carry != 0; - } - if (cond == jmp && (insn & (1 << 17))) { - ncr53c8xx_log("Compare phase %d %c= %d\n", (dev->sstat1 & PHASE_MASK), - jmp ? '=' : '!', ((insn >> 24) & 7)); - cond = (dev->sstat1 & PHASE_MASK) == ((insn >> 24) & 7); - } - if (cond == jmp && (insn & (1 << 18))) { - mask = (~insn >> 8) & 0xff; - ncr53c8xx_log("Compare data 0x%x & 0x%x %c= 0x%x\n", dev->sfbr, mask, - jmp ? '=' : '!', insn & mask); - cond = (dev->sfbr & mask) == (insn & mask); - } - if (cond == jmp) { - if (insn & (1 << 23)) { - /* Relative address. */ - addr = dev->dsp + sextract32(addr, 0, 24); - } - switch ((insn >> 27) & 7) { - case 0: /* Jump */ - ncr53c8xx_log("Jump to 0x%08x\n", addr); - dev->adder = addr; - dev->dsp = addr; - break; - case 1: /* Call */ - ncr53c8xx_log("Call 0x%08x\n", addr); - dev->temp = dev->dsp; - dev->dsp = addr; - break; - case 2: /* Return */ - ncr53c8xx_log("Return to 0x%08x\n", dev->temp); - dev->dsp = dev->temp; - break; - case 3: /* Interrupt */ - ncr53c8xx_log("Interrupt 0x%08x\n", dev->dsps); - if ((insn & (1 << 20)) != 0) { - dev->istat |= NCR_ISTAT_INTF; - ncr53c8xx_update_irq(dev); - } else - ncr53c8xx_script_dma_interrupt(dev, NCR_DSTAT_SIR); - break; - default: - ncr53c8xx_log("Illegal transfer control\n"); - ncr53c8xx_script_dma_interrupt(dev, NCR_DSTAT_IID); - break; - } - } else - ncr53c8xx_log("Control condition failed\n"); - break; + case 2: /* Transfer Control. */ + ncr53c8xx_log("02: Transfer Control\n"); + if ((insn & 0x002e0000) == 0) { + ncr53c8xx_log("NOP\n"); + break; + } + if (dev->sist1 & NCR_SIST1_STO) { + ncr53c8xx_log("Delayed select timeout\n"); + dev->sstop = 1; + break; + } + cond = jmp = (insn & (1 << 19)) != 0; + if (cond == jmp && (insn & (1 << 21))) { + ncr53c8xx_log("Compare carry %d\n", dev->carry == jmp); + cond = dev->carry != 0; + } + if (cond == jmp && (insn & (1 << 17))) { + ncr53c8xx_log("Compare phase %d %c= %d\n", (dev->sstat1 & PHASE_MASK), + jmp ? '=' : '!', ((insn >> 24) & 7)); + cond = (dev->sstat1 & PHASE_MASK) == ((insn >> 24) & 7); + } + if (cond == jmp && (insn & (1 << 18))) { + mask = (~insn >> 8) & 0xff; + ncr53c8xx_log("Compare data 0x%x & 0x%x %c= 0x%x\n", dev->sfbr, mask, + jmp ? '=' : '!', insn & mask); + cond = (dev->sfbr & mask) == (insn & mask); + } + if (cond == jmp) { + if (insn & (1 << 23)) { + /* Relative address. */ + addr = dev->dsp + sextract32(addr, 0, 24); + } + switch ((insn >> 27) & 7) { + case 0: /* Jump */ + ncr53c8xx_log("Jump to 0x%08x\n", addr); + dev->adder = addr; + dev->dsp = addr; + break; + case 1: /* Call */ + ncr53c8xx_log("Call 0x%08x\n", addr); + dev->temp = dev->dsp; + dev->dsp = addr; + break; + case 2: /* Return */ + ncr53c8xx_log("Return to 0x%08x\n", dev->temp); + dev->dsp = dev->temp; + break; + case 3: /* Interrupt */ + ncr53c8xx_log("Interrupt 0x%08x\n", dev->dsps); + if ((insn & (1 << 20)) != 0) { + dev->istat |= NCR_ISTAT_INTF; + ncr53c8xx_update_irq(dev); + } else + ncr53c8xx_script_dma_interrupt(dev, NCR_DSTAT_SIR); + break; + default: + ncr53c8xx_log("Illegal transfer control\n"); + ncr53c8xx_script_dma_interrupt(dev, NCR_DSTAT_IID); + break; + } + } else + ncr53c8xx_log("Control condition failed\n"); + break; - case 3: - ncr53c8xx_log("00: Memory move\n"); - if ((insn & (1 << 29)) == 0) { - /* Memory move. */ - /* ??? The docs imply the destination address is loaded into - the TEMP register. However the Linux drivers rely on - the value being presrved. */ - dest = read_dword(dev, dev->dsp); - dev->dsp += 4; - ncr53c8xx_memcpy(dev, dest, addr, insn & 0xffffff); - } else { + case 3: + ncr53c8xx_log("00: Memory move\n"); + if ((insn & (1 << 29)) == 0) { + /* Memory move. */ + /* ??? The docs imply the destination address is loaded into + the TEMP register. However the Linux drivers rely on + the value being presrved. */ + dest = read_dword(dev, dev->dsp); + dev->dsp += 4; + ncr53c8xx_memcpy(dev, dest, addr, insn & 0xffffff); + } else { #ifdef ENABLE_NCR53C8XX_LOG - pp = data; + pp = data; #endif - if (insn & (1 << 28)) - addr = dev->dsa + sextract32(addr, 0, 24); - n = (insn & 7); - reg = (insn >> 16) & 0xff; - if (insn & (1 << 24)) { - dma_bm_read(addr, data, n, 4); - for (i = 0; i < n; i++) - ncr53c8xx_reg_writeb(dev, reg + i, data[i]); - } else { - ncr53c8xx_log("Store reg 0x%x size %d addr 0x%08x\n", reg, n, addr); - for (i = 0; i < n; i++) - data[i] = ncr53c8xx_reg_readb(dev, reg + i); - dma_bm_write(addr, data, n, 4); - } - } - break; + if (insn & (1 << 28)) + addr = dev->dsa + sextract32(addr, 0, 24); + n = (insn & 7); + reg = (insn >> 16) & 0xff; + if (insn & (1 << 24)) { + dma_bm_read(addr, data, n, 4); + for (i = 0; i < n; i++) + ncr53c8xx_reg_writeb(dev, reg + i, data[i]); + } else { + ncr53c8xx_log("Store reg 0x%x size %d addr 0x%08x\n", reg, n, addr); + for (i = 0; i < n; i++) + data[i] = ncr53c8xx_reg_readb(dev, reg + i); + dma_bm_write(addr, data, n, 4); + } + } + break; - default: - ncr53c8xx_log("%02X: Unknown command\n", (uint8_t) (insn >> 30)); + default: + ncr53c8xx_log("%02X: Unknown command\n", (uint8_t) (insn >> 30)); } ncr53c8xx_log("instructions processed %i\n", insn_processed); if (insn_processed > 10000 && !dev->waiting) { - /* Some windows drivers make the device spin waiting for a memory - location to change. If we have been executed a lot of code then - assume this is the case and force an unexpected device disconnect. - This is apparently sufficient to beat the drivers into submission. - */ - ncr53c8xx_log("Some windows drivers make the device spin...\n"); - if (!(dev->sien0 & NCR_SIST0_UDC)) - ncr53c8xx_log("inf. loop with UDC masked\n"); - ncr53c8xx_script_scsi_interrupt(dev, NCR_SIST0_UDC, 0); - ncr53c8xx_disconnect(dev); + /* Some windows drivers make the device spin waiting for a memory + location to change. If we have been executed a lot of code then + assume this is the case and force an unexpected device disconnect. + This is apparently sufficient to beat the drivers into submission. + */ + ncr53c8xx_log("Some windows drivers make the device spin...\n"); + if (!(dev->sien0 & NCR_SIST0_UDC)) + ncr53c8xx_log("inf. loop with UDC masked\n"); + ncr53c8xx_script_scsi_interrupt(dev, NCR_SIST0_UDC, 0); + ncr53c8xx_disconnect(dev); } else if (!dev->sstop && !dev->waiting) { - if (dev->dcntl & NCR_DCNTL_SSM) { - ncr53c8xx_log("NCR 810: SCRIPTS: Single-step mode\n"); - ncr53c8xx_script_dma_interrupt(dev, NCR_DSTAT_SSI); - } else { - ncr53c8xx_log("NCR 810: SCRIPTS: Normal mode\n"); - if (insn_processed < 100) - goto again; - } + if (dev->dcntl & NCR_DCNTL_SSM) { + ncr53c8xx_log("NCR 810: SCRIPTS: Single-step mode\n"); + ncr53c8xx_script_dma_interrupt(dev, NCR_DSTAT_SSI); + } else { + ncr53c8xx_log("NCR 810: SCRIPTS: Normal mode\n"); + if (insn_processed < 100) + goto again; + } } else { - if (dev->sstop) - ncr53c8xx_log("NCR 810: SCRIPTS: Stopped\n"); - if (dev->waiting) - ncr53c8xx_log("NCR 810: SCRIPTS: Waiting\n"); + if (dev->sstop) + ncr53c8xx_log("NCR 810: SCRIPTS: Stopped\n"); + if (dev->waiting) + ncr53c8xx_log("NCR 810: SCRIPTS: Waiting\n"); } timer_on_auto(&dev->timer, 40.0); @@ -1428,7 +1395,6 @@ again: ncr53c8xx_log("SCRIPTS execution stopped\n"); } - static void ncr53c8xx_execute_script(ncr53c8xx_t *dev) { @@ -1436,55 +1402,73 @@ ncr53c8xx_execute_script(ncr53c8xx_t *dev) timer_on_auto(&dev->timer, 40.0); } - static void ncr53c8xx_callback(void *p) { ncr53c8xx_t *dev = (ncr53c8xx_t *) p; if (!dev->sstop) { - if (dev->waiting) - timer_on_auto(&dev->timer, 40.0); - else - ncr53c8xx_process_script(dev); + if (dev->waiting) + timer_on_auto(&dev->timer, 40.0); + else + ncr53c8xx_process_script(dev); } if (dev->sstop) - timer_stop(&dev->timer); + timer_stop(&dev->timer); } - static void ncr53c8xx_eeprom(ncr53c8xx_t *dev, uint8_t save) { FILE *f; - f = nvr_fopen(dev->nvr_path, save ? "wb": "rb"); + f = nvr_fopen(dev->nvr_path, save ? "wb" : "rb"); if (f) { - if (save) - fwrite(&dev->nvram, sizeof(dev->nvram), 1, f); - else - (void) !fread(&dev->nvram, sizeof(dev->nvram), 1, f); - fclose(f); + if (save) + fwrite(&dev->nvram, sizeof(dev->nvram), 1, f); + else + (void) !fread(&dev->nvram, sizeof(dev->nvram), 1, f); + fclose(f); } } - static void ncr53c8xx_reg_writeb(ncr53c8xx_t *dev, uint32_t offset, uint8_t val) { uint8_t tmp = 0; #define CASE_SET_REG24(name, addr) \ - case addr : dev->name &= 0xffffff00; dev->name |= val; break; \ - case addr + 1: dev->name &= 0xffff00ff; dev->name |= val << 8; break; \ - case addr + 2: dev->name &= 0xff00ffff; dev->name |= val << 16; break; + case addr: \ + dev->name &= 0xffffff00; \ + dev->name |= val; \ + break; \ + case addr + 1: \ + dev->name &= 0xffff00ff; \ + dev->name |= val << 8; \ + break; \ + case addr + 2: \ + dev->name &= 0xff00ffff; \ + dev->name |= val << 16; \ + break; #define CASE_SET_REG32(name, addr) \ - case addr : dev->name &= 0xffffff00; dev->name |= val; break; \ - case addr + 1: dev->name &= 0xffff00ff; dev->name |= val << 8; break; \ - case addr + 2: dev->name &= 0xff00ffff; dev->name |= val << 16; break; \ - case addr + 3: dev->name &= 0x00ffffff; dev->name |= val << 24; break; + case addr: \ + dev->name &= 0xffffff00; \ + dev->name |= val; \ + break; \ + case addr + 1: \ + dev->name &= 0xffff00ff; \ + dev->name |= val << 8; \ + break; \ + case addr + 2: \ + dev->name &= 0xff00ffff; \ + dev->name |= val << 16; \ + break; \ + case addr + 3: \ + dev->name &= 0x00ffffff; \ + dev->name |= val << 24; \ + break; #ifdef DEBUG_NCR_REG ncr53c8xx_log("Write reg %02x = %02x\n", offset, val); @@ -1493,493 +1477,507 @@ ncr53c8xx_reg_writeb(ncr53c8xx_t *dev, uint32_t offset, uint8_t val) dev->regop = 1; switch (offset) { - case 0x00: /* SCNTL0 */ - dev->scntl0 = val; - if (val & NCR_SCNTL0_START) { - /* Looks like this (turn on bit 4 of SSTAT0 to mark arbitration in progress) - is enough to make BIOS v4.x happy. */ - ncr53c8xx_log("NCR 810: Selecting SCSI ID %i\n", dev->sdid); - dev->sstat0 |= 0x10; - } - break; - case 0x01: /* SCNTL1 */ - dev->scntl1 = val & ~NCR_SCNTL1_SST; - if (val & NCR_SCNTL1_IARB) { - ncr53c8xx_log("Arbitration lost\n"); - dev->sstat0 |= 0x08; - dev->waiting = 0; - } - if (val & NCR_SCNTL1_RST) { - if (!(dev->sstat0 & NCR_SSTAT0_RST)) { - dev->sstat0 |= NCR_SSTAT0_RST; - ncr53c8xx_script_scsi_interrupt(dev, NCR_SIST0_RST, 0); - } - } else - dev->sstat0 &= ~NCR_SSTAT0_RST; - break; - case 0x02: /* SCNTL2 */ - val &= ~(NCR_SCNTL2_WSR | NCR_SCNTL2_WSS); - dev->scntl2 = val; - break; - case 0x03: /* SCNTL3 */ - dev->scntl3 = val; - break; - case 0x04: /* SCID */ - dev->scid = val; - break; - case 0x05: /* SXFER */ - dev->sxfer = val; - break; - case 0x06: /* SDID */ - if ((dev->ssid & 0x80) && (val & 0xf) != (dev->ssid & 0xf)) - ncr53c8xx_log("Destination ID does not match SSID\n"); - dev->sdid = val & 0xf; - break; - case 0x07: /* GPREG */ - ncr53c8xx_log("NCR 810: GPREG write %02X\n", val); - dev->gpreg = val; - i2c_gpio_set(dev->i2c, (dev->gpreg & 0x02) || ((dev->gpcntl & 0x82) == 0x02), (dev->gpreg & 0x01) || ((dev->gpcntl & 0x41) == 0x01)); - break; - case 0x08: /* SFBR */ - /* The CPU is not allowed to write to this register. However the - SCRIPTS register move instructions are. */ - dev->sfbr = val; - break; - case 0x09: /* SOCL */ - ncr53c8xx_log("NCR 810: SOCL write %02X\n", val); - dev->socl = val; - break; - case 0x0a: case 0x0b: - /* Openserver writes to these readonly registers on startup */ - return; - case 0x0c: case 0x0d: case 0x0e: case 0x0f: - /* Linux writes to these readonly registers on startup. */ - return; - CASE_SET_REG32(dsa, 0x10) - case 0x14: /* ISTAT */ - ncr53c8xx_log("ISTAT write: %02X\n", val); - tmp = dev->istat; - dev->istat = (dev->istat & 0x0f) | (val & 0xf0); - if ((val & NCR_ISTAT_ABRT) && !(val & NCR_ISTAT_SRST)) - ncr53c8xx_script_dma_interrupt(dev, NCR_DSTAT_ABRT); - if (val & NCR_ISTAT_INTF) { - dev->istat &= ~NCR_ISTAT_INTF; - ncr53c8xx_update_irq(dev); - } + case 0x00: /* SCNTL0 */ + dev->scntl0 = val; + if (val & NCR_SCNTL0_START) { + /* Looks like this (turn on bit 4 of SSTAT0 to mark arbitration in progress) + is enough to make BIOS v4.x happy. */ + ncr53c8xx_log("NCR 810: Selecting SCSI ID %i\n", dev->sdid); + dev->sstat0 |= 0x10; + } + break; + case 0x01: /* SCNTL1 */ + dev->scntl1 = val & ~NCR_SCNTL1_SST; + if (val & NCR_SCNTL1_IARB) { + ncr53c8xx_log("Arbitration lost\n"); + dev->sstat0 |= 0x08; + dev->waiting = 0; + } + if (val & NCR_SCNTL1_RST) { + if (!(dev->sstat0 & NCR_SSTAT0_RST)) { + dev->sstat0 |= NCR_SSTAT0_RST; + ncr53c8xx_script_scsi_interrupt(dev, NCR_SIST0_RST, 0); + } + } else + dev->sstat0 &= ~NCR_SSTAT0_RST; + break; + case 0x02: /* SCNTL2 */ + val &= ~(NCR_SCNTL2_WSR | NCR_SCNTL2_WSS); + dev->scntl2 = val; + break; + case 0x03: /* SCNTL3 */ + dev->scntl3 = val; + break; + case 0x04: /* SCID */ + dev->scid = val; + break; + case 0x05: /* SXFER */ + dev->sxfer = val; + break; + case 0x06: /* SDID */ + if ((dev->ssid & 0x80) && (val & 0xf) != (dev->ssid & 0xf)) + ncr53c8xx_log("Destination ID does not match SSID\n"); + dev->sdid = val & 0xf; + break; + case 0x07: /* GPREG */ + ncr53c8xx_log("NCR 810: GPREG write %02X\n", val); + dev->gpreg = val; + i2c_gpio_set(dev->i2c, (dev->gpreg & 0x02) || ((dev->gpcntl & 0x82) == 0x02), (dev->gpreg & 0x01) || ((dev->gpcntl & 0x41) == 0x01)); + break; + case 0x08: /* SFBR */ + /* The CPU is not allowed to write to this register. However the + SCRIPTS register move instructions are. */ + dev->sfbr = val; + break; + case 0x09: /* SOCL */ + ncr53c8xx_log("NCR 810: SOCL write %02X\n", val); + dev->socl = val; + break; + case 0x0a: + case 0x0b: + /* Openserver writes to these readonly registers on startup */ + return; + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: + /* Linux writes to these readonly registers on startup. */ + return; + CASE_SET_REG32(dsa, 0x10) + case 0x14: /* ISTAT */ + ncr53c8xx_log("ISTAT write: %02X\n", val); + tmp = dev->istat; + dev->istat = (dev->istat & 0x0f) | (val & 0xf0); + if ((val & NCR_ISTAT_ABRT) && !(val & NCR_ISTAT_SRST)) + ncr53c8xx_script_dma_interrupt(dev, NCR_DSTAT_ABRT); + if (val & NCR_ISTAT_INTF) { + dev->istat &= ~NCR_ISTAT_INTF; + ncr53c8xx_update_irq(dev); + } - if ((dev->waiting == 1) && (val & NCR_ISTAT_SIGP)) { - ncr53c8xx_log("Woken by SIGP\n"); - dev->waiting = 0; - dev->dsp = dev->dnad; - /* ncr53c8xx_execute_script(dev); */ - } - if ((val & NCR_ISTAT_SRST) && !(tmp & NCR_ISTAT_SRST)) { - ncr53c8xx_soft_reset(dev); - ncr53c8xx_update_irq(dev); - dev->istat = 0; - } - break; - case 0x16: /* MBOX0 */ - dev->mbox0 = val; - break; - case 0x17: /* MBOX1 */ - dev->mbox1 = val; - break; - case 0x18: /* CTEST0 */ - /* nothing to do */ - break; - case 0x19: /* CTEST1 */ - /* nothing to do */ - break; - case 0x1a: /* CTEST2 */ - dev->ctest2 = val & NCR_CTEST2_PCICIE; - break; - case 0x1b: /* CTEST3 */ - dev->ctest3 = val & 0x0f; - break; - CASE_SET_REG32(temp, 0x1c) - case 0x21: /* CTEST4 */ - if (val & 7) - ncr53c8xx_log("Unimplemented CTEST4-FBL 0x%x\n", val); - dev->ctest4 = val; - break; - case 0x22: /* CTEST5 */ - if (val & (NCR_CTEST5_ADCK | NCR_CTEST5_BBCK)) - ncr53c8xx_log("CTEST5 DMA increment not implemented\n"); - dev->ctest5 = val; - break; - CASE_SET_REG24(dbc, 0x24) - CASE_SET_REG32(dnad, 0x28) - case 0x2c: /* DSP[0:7] */ - dev->dsp &= 0xffffff00; - dev->dsp |= val; - break; - case 0x2d: /* DSP[8:15] */ - dev->dsp &= 0xffff00ff; - dev->dsp |= val << 8; - break; - case 0x2e: /* DSP[16:23] */ - dev->dsp &= 0xff00ffff; - dev->dsp |= val << 16; - break; - case 0x2f: /* DSP[24:31] */ - dev->dsp &= 0x00ffffff; - dev->dsp |= val << 24; - if (!(dev->dmode & NCR_DMODE_MAN) && dev->sstop) - ncr53c8xx_execute_script(dev); - break; - CASE_SET_REG32(dsps, 0x30) - CASE_SET_REG32(scratcha, 0x34) - case 0x38: /* DMODE */ - dev->dmode = val; - break; - case 0x39: /* DIEN */ - ncr53c8xx_log("DIEN write: %02X\n", val); - dev->dien = val; - ncr53c8xx_update_irq(dev); - break; - case 0x3a: /* SBR */ - dev->sbr = val; - break; - case 0x3b: /* DCNTL */ - dev->dcntl = val & ~(NCR_DCNTL_PFF | NCR_DCNTL_STD); - if ((val & NCR_DCNTL_STD) && dev->sstop) - ncr53c8xx_execute_script(dev); - break; - case 0x40: /* SIEN0 */ - dev->sien0 = val; - ncr53c8xx_update_irq(dev); - break; - case 0x41: /* SIEN1 */ - dev->sien1 = val; - ncr53c8xx_update_irq(dev); - break; - case 0x47: /* GPCNTL */ - ncr53c8xx_log("GPCNTL write: %02X\n", val); - dev->gpcntl = val; - break; - case 0x48: /* STIME0 */ - dev->stime0 = val; - break; - case 0x49: /* STIME1 */ - if (val & 0xf) { - ncr53c8xx_log("General purpose timer not implemented\n"); - /* ??? Raising the interrupt immediately seems to be sufficient - to keep the FreeBSD driver happy. */ - ncr53c8xx_script_scsi_interrupt(dev, 0, NCR_SIST1_GEN); - } - break; - case 0x4a: /* RESPID0 */ - dev->respid0 = val; - break; - case 0x4b: /* RESPID1 */ - if (dev->wide) - dev->respid1 = val; - break; - case 0x4d: /* STEST1 */ - dev->stest1 = val; - break; - case 0x4e: /* STEST2 */ - if (val & 1) - ncr53c8xx_log("Low level mode not implemented\n"); - dev->stest2 = val; - break; - case 0x4f: /* STEST3 */ - if (val & 0x41) - ncr53c8xx_log("SCSI FIFO test mode not implemented\n"); - dev->stest3 = val; - break; - case 0x54: - case 0x55: - break; - CASE_SET_REG32(scratchb, 0x5c) - CASE_SET_REG32(scratchc, 0x60) - CASE_SET_REG32(scratchd, 0x64) - CASE_SET_REG32(scratche, 0x68) - CASE_SET_REG32(scratchf, 0x6c) - CASE_SET_REG32(scratchg, 0x70) - CASE_SET_REG32(scratchh, 0x74) - CASE_SET_REG32(scratchi, 0x78) - CASE_SET_REG32(scratchj, 0x7c) - default: - ncr53c8xx_log("Unhandled writeb 0x%x = 0x%x\n", offset, val); + if ((dev->waiting == 1) && (val & NCR_ISTAT_SIGP)) { + ncr53c8xx_log("Woken by SIGP\n"); + dev->waiting = 0; + dev->dsp = dev->dnad; + /* ncr53c8xx_execute_script(dev); */ + } + if ((val & NCR_ISTAT_SRST) && !(tmp & NCR_ISTAT_SRST)) { + ncr53c8xx_soft_reset(dev); + ncr53c8xx_update_irq(dev); + dev->istat = 0; + } + break; + case 0x16: /* MBOX0 */ + dev->mbox0 = val; + break; + case 0x17: /* MBOX1 */ + dev->mbox1 = val; + break; + case 0x18: /* CTEST0 */ + /* nothing to do */ + break; + case 0x19: /* CTEST1 */ + /* nothing to do */ + break; + case 0x1a: /* CTEST2 */ + dev->ctest2 = val & NCR_CTEST2_PCICIE; + break; + case 0x1b: /* CTEST3 */ + dev->ctest3 = val & 0x0f; + break; + CASE_SET_REG32(temp, 0x1c) + case 0x21: /* CTEST4 */ + if (val & 7) + ncr53c8xx_log("Unimplemented CTEST4-FBL 0x%x\n", val); + dev->ctest4 = val; + break; + case 0x22: /* CTEST5 */ + if (val & (NCR_CTEST5_ADCK | NCR_CTEST5_BBCK)) + ncr53c8xx_log("CTEST5 DMA increment not implemented\n"); + dev->ctest5 = val; + break; + CASE_SET_REG24(dbc, 0x24) + CASE_SET_REG32(dnad, 0x28) + case 0x2c: /* DSP[0:7] */ + dev->dsp &= 0xffffff00; + dev->dsp |= val; + break; + case 0x2d: /* DSP[8:15] */ + dev->dsp &= 0xffff00ff; + dev->dsp |= val << 8; + break; + case 0x2e: /* DSP[16:23] */ + dev->dsp &= 0xff00ffff; + dev->dsp |= val << 16; + break; + case 0x2f: /* DSP[24:31] */ + dev->dsp &= 0x00ffffff; + dev->dsp |= val << 24; + if (!(dev->dmode & NCR_DMODE_MAN) && dev->sstop) + ncr53c8xx_execute_script(dev); + break; + CASE_SET_REG32(dsps, 0x30) + CASE_SET_REG32(scratcha, 0x34) + case 0x38: /* DMODE */ + dev->dmode = val; + break; + case 0x39: /* DIEN */ + ncr53c8xx_log("DIEN write: %02X\n", val); + dev->dien = val; + ncr53c8xx_update_irq(dev); + break; + case 0x3a: /* SBR */ + dev->sbr = val; + break; + case 0x3b: /* DCNTL */ + dev->dcntl = val & ~(NCR_DCNTL_PFF | NCR_DCNTL_STD); + if ((val & NCR_DCNTL_STD) && dev->sstop) + ncr53c8xx_execute_script(dev); + break; + case 0x40: /* SIEN0 */ + dev->sien0 = val; + ncr53c8xx_update_irq(dev); + break; + case 0x41: /* SIEN1 */ + dev->sien1 = val; + ncr53c8xx_update_irq(dev); + break; + case 0x47: /* GPCNTL */ + ncr53c8xx_log("GPCNTL write: %02X\n", val); + dev->gpcntl = val; + break; + case 0x48: /* STIME0 */ + dev->stime0 = val; + break; + case 0x49: /* STIME1 */ + if (val & 0xf) { + ncr53c8xx_log("General purpose timer not implemented\n"); + /* ??? Raising the interrupt immediately seems to be sufficient + to keep the FreeBSD driver happy. */ + ncr53c8xx_script_scsi_interrupt(dev, 0, NCR_SIST1_GEN); + } + break; + case 0x4a: /* RESPID0 */ + dev->respid0 = val; + break; + case 0x4b: /* RESPID1 */ + if (dev->wide) + dev->respid1 = val; + break; + case 0x4d: /* STEST1 */ + dev->stest1 = val; + break; + case 0x4e: /* STEST2 */ + if (val & 1) + ncr53c8xx_log("Low level mode not implemented\n"); + dev->stest2 = val; + break; + case 0x4f: /* STEST3 */ + if (val & 0x41) + ncr53c8xx_log("SCSI FIFO test mode not implemented\n"); + dev->stest3 = val; + break; + case 0x54: + case 0x55: + break; + CASE_SET_REG32(scratchb, 0x5c) + CASE_SET_REG32(scratchc, 0x60) + CASE_SET_REG32(scratchd, 0x64) + CASE_SET_REG32(scratche, 0x68) + CASE_SET_REG32(scratchf, 0x6c) + CASE_SET_REG32(scratchg, 0x70) + CASE_SET_REG32(scratchh, 0x74) + CASE_SET_REG32(scratchi, 0x78) + CASE_SET_REG32(scratchj, 0x7c) + default: + ncr53c8xx_log("Unhandled writeb 0x%x = 0x%x\n", offset, val); } #undef CASE_SET_REG24 #undef CASE_SET_REG32 } - static uint8_t ncr53c8xx_reg_readb(ncr53c8xx_t *dev, uint32_t offset) { uint8_t tmp; -#define CASE_GET_REG24(name, addr) \ - case addr: return dev->name & 0xff; \ - case addr + 1: return (dev->name >> 8) & 0xff; \ - case addr + 2: return (dev->name >> 16) & 0xff; +#define CASE_GET_REG24(name, addr) \ + case addr: \ + return dev->name & 0xff; \ + case addr + 1: \ + return (dev->name >> 8) & 0xff; \ + case addr + 2: \ + return (dev->name >> 16) & 0xff; -#define CASE_GET_REG32(name, addr) \ - case addr: return dev->name & 0xff; \ - case addr + 1: return (dev->name >> 8) & 0xff; \ - case addr + 2: return (dev->name >> 16) & 0xff; \ - case addr + 3: return (dev->name >> 24) & 0xff; +#define CASE_GET_REG32(name, addr) \ + case addr: \ + return dev->name & 0xff; \ + case addr + 1: \ + return (dev->name >> 8) & 0xff; \ + case addr + 2: \ + return (dev->name >> 16) & 0xff; \ + case addr + 3: \ + return (dev->name >> 24) & 0xff; -#define CASE_GET_REG32_COND(name, addr) \ - case addr: if (dev->wide) \ - return dev->name & 0xff; \ - else \ - return 0x00; \ - case addr + 1: if (dev->wide) \ - return (dev->name >> 8) & 0xff; \ - else \ - return 0x00; \ - case addr + 2: if (dev->wide) \ - return (dev->name >> 16) & 0xff; \ - else \ - return 0x00; \ - case addr + 3: if (dev->wide) \ - return (dev->name >> 24) & 0xff; \ - else \ - return 0x00; +#define CASE_GET_REG32_COND(name, addr) \ + case addr: \ + if (dev->wide) \ + return dev->name & 0xff; \ + else \ + return 0x00; \ + case addr + 1: \ + if (dev->wide) \ + return (dev->name >> 8) & 0xff; \ + else \ + return 0x00; \ + case addr + 2: \ + if (dev->wide) \ + return (dev->name >> 16) & 0xff; \ + else \ + return 0x00; \ + case addr + 3: \ + if (dev->wide) \ + return (dev->name >> 24) & 0xff; \ + else \ + return 0x00; dev->regop = 1; switch (offset) { - case 0x00: /* SCNTL0 */ - ncr53c8xx_log("NCR 810: Read SCNTL0 %02X\n", dev->scntl0); - return dev->scntl0; - case 0x01: /* SCNTL1 */ - ncr53c8xx_log("NCR 810: Read SCNTL1 %02X\n", dev->scntl1); - return dev->scntl1; - case 0x02: /* SCNTL2 */ - ncr53c8xx_log("NCR 810: Read SCNTL2 %02X\n", dev->scntl2); - return dev->scntl2; - case 0x03: /* SCNTL3 */ - ncr53c8xx_log("NCR 810: Read SCNTL3 %02X\n", dev->scntl3); - return dev->scntl3; - case 0x04: /* SCID */ - ncr53c8xx_log("NCR 810: Read SCID %02X\n", dev->scid); - return dev->scid & ~0x40; - case 0x05: /* SXFER */ - ncr53c8xx_log("NCR 810: Read SXFER %02X\n", dev->sxfer); - return dev->sxfer; - case 0x06: /* SDID */ - ncr53c8xx_log("NCR 810: Read SDID %02X\n", dev->sdid); - return dev->sdid; - case 0x07: /* GPREG */ - tmp = (dev->gpreg & (dev->gpcntl ^ 0x1f)) & 0x1f; - if ((dev->gpcntl & 0x41) == 0x01) { - tmp &= 0xfe; - if (i2c_gpio_get_sda(dev->i2c)) - tmp |= 0x01; - } - if ((dev->gpcntl & 0x82) == 0x02) { - tmp &= 0xfd; - if (i2c_gpio_get_scl(dev->i2c)) - tmp |= 0x02; - } + case 0x00: /* SCNTL0 */ + ncr53c8xx_log("NCR 810: Read SCNTL0 %02X\n", dev->scntl0); + return dev->scntl0; + case 0x01: /* SCNTL1 */ + ncr53c8xx_log("NCR 810: Read SCNTL1 %02X\n", dev->scntl1); + return dev->scntl1; + case 0x02: /* SCNTL2 */ + ncr53c8xx_log("NCR 810: Read SCNTL2 %02X\n", dev->scntl2); + return dev->scntl2; + case 0x03: /* SCNTL3 */ + ncr53c8xx_log("NCR 810: Read SCNTL3 %02X\n", dev->scntl3); + return dev->scntl3; + case 0x04: /* SCID */ + ncr53c8xx_log("NCR 810: Read SCID %02X\n", dev->scid); + return dev->scid & ~0x40; + case 0x05: /* SXFER */ + ncr53c8xx_log("NCR 810: Read SXFER %02X\n", dev->sxfer); + return dev->sxfer; + case 0x06: /* SDID */ + ncr53c8xx_log("NCR 810: Read SDID %02X\n", dev->sdid); + return dev->sdid; + case 0x07: /* GPREG */ + tmp = (dev->gpreg & (dev->gpcntl ^ 0x1f)) & 0x1f; + if ((dev->gpcntl & 0x41) == 0x01) { + tmp &= 0xfe; + if (i2c_gpio_get_sda(dev->i2c)) + tmp |= 0x01; + } + if ((dev->gpcntl & 0x82) == 0x02) { + tmp &= 0xfd; + if (i2c_gpio_get_scl(dev->i2c)) + tmp |= 0x02; + } - ncr53c8xx_log("NCR 810: Read GPREG %02X\n", tmp); - return tmp; - case 0x08: /* Revision ID */ - ncr53c8xx_log("NCR 810: Read REVID 00\n"); - return 0x00; - case 0xa: /* SSID */ - ncr53c8xx_log("NCR 810: Read SSID %02X\n", dev->ssid); - return dev->ssid; - case 0xb: /* SBCL */ - /* Bit 7 = REQ (SREQ/ status) - Bit 6 = ACK (SACK/ status) - Bit 5 = BSY (SBSY/ status) - Bit 4 = SEL (SSEL/ status) - Bit 3 = ATN (SATN/ status) - Bit 2 = MSG (SMSG/ status) - Bit 1 = C/D (SC_D/ status) - Bit 0 = I/O (SI_O/ status) */ - tmp = (dev->sstat1 & 7); - ncr53c8xx_log("NCR 810: Read SBCL %02X\n", tmp); - return tmp; /* For now, return the MSG, C/D, and I/O bits from SSTAT1. */ - case 0xc: /* DSTAT */ - tmp = dev->dstat | NCR_DSTAT_DFE; - if ((dev->istat & NCR_ISTAT_INTF) == 0) - dev->dstat = 0; - ncr53c8xx_update_irq(dev); - ncr53c8xx_log("NCR 810: Read DSTAT %02X\n", tmp); - return tmp; - case 0x0d: /* SSTAT0 */ - ncr53c8xx_log("NCR 810: Read SSTAT0 %02X\n", dev->sstat0); - return dev->sstat0; - case 0x0e: /* SSTAT1 */ - ncr53c8xx_log("NCR 810: Read SSTAT1 %02X\n", dev->sstat1); - return dev->sstat1; - case 0x0f: /* SSTAT2 */ - ncr53c8xx_log("NCR 810: Read SSTAT2 %02X\n", dev->scntl1 & NCR_SCNTL1_CON ? 0 : 2); - return dev->scntl1 & NCR_SCNTL1_CON ? 0 : 2; - CASE_GET_REG32(dsa, 0x10) - case 0x14: /* ISTAT */ - ncr53c8xx_log("NCR 810: Read ISTAT %02X\n", dev->istat); - tmp = dev->istat; - return tmp; - case 0x16: /* MBOX0 */ - if (dev->wide) - return 0x00; - ncr53c8xx_log("NCR 810: Read MBOX0 %02X\n", dev->mbox0); - return dev->mbox0; - case 0x17: /* MBOX1 */ - if (dev->wide) - return 0x00; - ncr53c8xx_log("NCR 810: Read MBOX1 %02X\n", dev->mbox1); - return dev->mbox1; - case 0x18: /* CTEST0 */ - ncr53c8xx_log("NCR 810: Read CTEST0 FF\n"); - return 0xff; - case 0x19: /* CTEST1 */ - ncr53c8xx_log("NCR 810: Read CTEST1 F0\n"); - return 0xf0; /* dma fifo empty */ - case 0x1a: /* CTEST2 */ - tmp = dev->ctest2 | NCR_CTEST2_DACK | NCR_CTEST2_CM; - if (dev->istat & NCR_ISTAT_SIGP) { - dev->istat &= ~NCR_ISTAT_SIGP; - tmp |= NCR_CTEST2_SIGP; - } - ncr53c8xx_log("NCR 810: Read CTEST2 %02X\n", tmp); - return tmp; - case 0x1b: /* CTEST3 */ - ncr53c8xx_log("NCR 810: Read CTEST3 %02X\n", - (dev->ctest3 & (0x08 | 0x02 | 0x01)) | ((dev->chip_rev & 0x0f) << 4)); - return (dev->ctest3 & (0x08 | 0x02 | 0x01)) | ((dev->chip_rev & 0x0f) << 4); - CASE_GET_REG32(temp, 0x1c) - case 0x20: /* DFIFO */ - ncr53c8xx_log("NCR 810: Read DFIFO 00\n"); - return 0; - case 0x21: /* CTEST4 */ - ncr53c8xx_log("NCR 810: Read CTEST4 %02X\n", dev->ctest4); - return dev->ctest4; - case 0x22: /* CTEST5 */ - ncr53c8xx_log("NCR 810: Read CTEST5 %02X\n", dev->ctest5); - return dev->ctest5; - case 0x23: /* CTEST6 */ - ncr53c8xx_log("NCR 810: Read CTEST6 00\n"); - return 0; - CASE_GET_REG24(dbc, 0x24) - case 0x27: /* DCMD */ - ncr53c8xx_log("NCR 810: Read DCMD %02X\n", dev->dcmd); - return dev->dcmd; - CASE_GET_REG32(dnad, 0x28) - CASE_GET_REG32(dsp, 0x2c) - CASE_GET_REG32(dsps, 0x30) - CASE_GET_REG32(scratcha, 0x34) - case 0x38: /* DMODE */ - ncr53c8xx_log("NCR 810: Read DMODE %02X\n", dev->dmode); - return dev->dmode; - case 0x39: /* DIEN */ - ncr53c8xx_log("NCR 810: Read DIEN %02X\n", dev->dien); - return dev->dien; - case 0x3a: /* SBR */ - ncr53c8xx_log("NCR 810: Read SBR %02X\n", dev->sbr); - return dev->sbr; - case 0x3b: /* DCNTL */ - ncr53c8xx_log("NCR 810: Read DCNTL %02X\n", dev->dcntl); - return dev->dcntl; - CASE_GET_REG32(adder, 0x3c) /* ADDER Output (Debug of relative jump address) */ - case 0x40: /* SIEN0 */ - ncr53c8xx_log("NCR 810: Read SIEN0 %02X\n", dev->sien0); - return dev->sien0; - case 0x41: /* SIEN1 */ - ncr53c8xx_log("NCR 810: Read SIEN1 %02X\n", dev->sien1); - return dev->sien1; - case 0x42: /* SIST0 */ - tmp = dev->sist0; - dev->sist0 = 0x00; - ncr53c8xx_update_irq(dev); - ncr53c8xx_log("NCR 810: Read SIST0 %02X\n", tmp); - return tmp; - case 0x43: /* SIST1 */ - tmp = dev->sist1; - dev->sist1 = 0x00; - ncr53c8xx_update_irq(dev); - ncr53c8xx_log("NCR 810: Read SIST1 %02X\n", tmp); - return tmp; - case 0x44: /* SLPAR */ - if (!dev->wide) - return 0x00; - ncr53c8xx_log("NCR 810: Read SLPAR %02X\n", dev->stime0); - return dev->slpar; - case 0x45: /* SWIDE */ - if (!dev->wide) - return 0x00; - ncr53c8xx_log("NCR 810: Read SWIDE %02X\n", dev->stime0); - return dev->swide; - case 0x46: /* MACNTL */ - ncr53c8xx_log("NCR 810: Read MACNTL 4F\n"); - return 0x4f; - case 0x47: /* GPCNTL */ - ncr53c8xx_log("NCR 810: Read GPCNTL %02X\n", dev->gpcntl); - return dev->gpcntl; - case 0x48: /* STIME0 */ - ncr53c8xx_log("NCR 810: Read STIME0 %02X\n", dev->stime0); - return dev->stime0; - case 0x4a: /* RESPID0 */ - if (dev->wide) { - ncr53c8xx_log("NCR 810: Read RESPID0 %02X\n", dev->respid0); - } else { - ncr53c8xx_log("NCR 810: Read RESPID %02X\n", dev->respid0); - } - return dev->respid0; - case 0x4b: /* RESPID1 */ - if (!dev->wide) - return 0x00; - ncr53c8xx_log("NCR 810: Read RESPID1 %02X\n", dev->respid1); - return dev->respid1; - case 0x4c: /* STEST0 */ - ncr53c8xx_log("NCR 810: Read STEST0 %02X\n", dev->stest1); - return 0x00; - case 0x4d: /* STEST1 */ - ncr53c8xx_log("NCR 810: Read STEST1 %02X\n", dev->stest1); - return dev->stest1; - case 0x4e: /* STEST2 */ - ncr53c8xx_log("NCR 810: Read STEST2 %02X\n", dev->stest2); - return dev->stest2; - case 0x4f: /* STEST3 */ - ncr53c8xx_log("NCR 810: Read STEST3 %02X\n", dev->stest3); - return dev->stest3; - case 0x50: /* SIDL0 */ - /* This is needed by the linux drivers. We currently only update it - during the MSG IN phase. */ - if (dev->wide) { - ncr53c8xx_log("NCR 810: Read SIDL0 %02X\n", dev->sidl0); - } else { - ncr53c8xx_log("NCR 810: Read SIDL %02X\n", dev->sidl0); - } - return dev->sidl0; - case 0x51: /* SIDL1 */ - if (!dev->wide) - return 0x00; - ncr53c8xx_log("NCR 810: Read SIDL1 %02X\n", dev->sidl1); - return dev->sidl1; - case 0x52: /* STEST4 */ - ncr53c8xx_log("NCR 810: Read STEST4 E0\n"); - return 0xe0; - case 0x58: /* SBDL */ - /* Some drivers peek at the data bus during the MSG IN phase. */ - if ((dev->sstat1 & PHASE_MASK) == PHASE_MI) { - ncr53c8xx_log("NCR 810: Read SBDL %02X\n", dev->msg[0]); - return dev->msg[0]; - } - ncr53c8xx_log("NCR 810: Read SBDL 00\n"); - return 0; - case 0x59: /* SBDL high */ - ncr53c8xx_log("NCR 810: Read SBDLH 00\n"); - return 0; - CASE_GET_REG32(scratchb, 0x5c) - CASE_GET_REG32_COND(scratchc, 0x60) - CASE_GET_REG32_COND(scratchd, 0x64) - CASE_GET_REG32_COND(scratche, 0x68) - CASE_GET_REG32_COND(scratchf, 0x6c) - CASE_GET_REG32_COND(scratchg, 0x70) - CASE_GET_REG32_COND(scratchh, 0x74) - CASE_GET_REG32_COND(scratchi, 0x78) - CASE_GET_REG32_COND(scratchj, 0x7c) + ncr53c8xx_log("NCR 810: Read GPREG %02X\n", tmp); + return tmp; + case 0x08: /* Revision ID */ + ncr53c8xx_log("NCR 810: Read REVID 00\n"); + return 0x00; + case 0xa: /* SSID */ + ncr53c8xx_log("NCR 810: Read SSID %02X\n", dev->ssid); + return dev->ssid; + case 0xb: /* SBCL */ + /* Bit 7 = REQ (SREQ/ status) + Bit 6 = ACK (SACK/ status) + Bit 5 = BSY (SBSY/ status) + Bit 4 = SEL (SSEL/ status) + Bit 3 = ATN (SATN/ status) + Bit 2 = MSG (SMSG/ status) + Bit 1 = C/D (SC_D/ status) + Bit 0 = I/O (SI_O/ status) */ + tmp = (dev->sstat1 & 7); + ncr53c8xx_log("NCR 810: Read SBCL %02X\n", tmp); + return tmp; /* For now, return the MSG, C/D, and I/O bits from SSTAT1. */ + case 0xc: /* DSTAT */ + tmp = dev->dstat | NCR_DSTAT_DFE; + if ((dev->istat & NCR_ISTAT_INTF) == 0) + dev->dstat = 0; + ncr53c8xx_update_irq(dev); + ncr53c8xx_log("NCR 810: Read DSTAT %02X\n", tmp); + return tmp; + case 0x0d: /* SSTAT0 */ + ncr53c8xx_log("NCR 810: Read SSTAT0 %02X\n", dev->sstat0); + return dev->sstat0; + case 0x0e: /* SSTAT1 */ + ncr53c8xx_log("NCR 810: Read SSTAT1 %02X\n", dev->sstat1); + return dev->sstat1; + case 0x0f: /* SSTAT2 */ + ncr53c8xx_log("NCR 810: Read SSTAT2 %02X\n", dev->scntl1 & NCR_SCNTL1_CON ? 0 : 2); + return dev->scntl1 & NCR_SCNTL1_CON ? 0 : 2; + CASE_GET_REG32(dsa, 0x10) + case 0x14: /* ISTAT */ + ncr53c8xx_log("NCR 810: Read ISTAT %02X\n", dev->istat); + tmp = dev->istat; + return tmp; + case 0x16: /* MBOX0 */ + if (dev->wide) + return 0x00; + ncr53c8xx_log("NCR 810: Read MBOX0 %02X\n", dev->mbox0); + return dev->mbox0; + case 0x17: /* MBOX1 */ + if (dev->wide) + return 0x00; + ncr53c8xx_log("NCR 810: Read MBOX1 %02X\n", dev->mbox1); + return dev->mbox1; + case 0x18: /* CTEST0 */ + ncr53c8xx_log("NCR 810: Read CTEST0 FF\n"); + return 0xff; + case 0x19: /* CTEST1 */ + ncr53c8xx_log("NCR 810: Read CTEST1 F0\n"); + return 0xf0; /* dma fifo empty */ + case 0x1a: /* CTEST2 */ + tmp = dev->ctest2 | NCR_CTEST2_DACK | NCR_CTEST2_CM; + if (dev->istat & NCR_ISTAT_SIGP) { + dev->istat &= ~NCR_ISTAT_SIGP; + tmp |= NCR_CTEST2_SIGP; + } + ncr53c8xx_log("NCR 810: Read CTEST2 %02X\n", tmp); + return tmp; + case 0x1b: /* CTEST3 */ + ncr53c8xx_log("NCR 810: Read CTEST3 %02X\n", + (dev->ctest3 & (0x08 | 0x02 | 0x01)) | ((dev->chip_rev & 0x0f) << 4)); + return (dev->ctest3 & (0x08 | 0x02 | 0x01)) | ((dev->chip_rev & 0x0f) << 4); + CASE_GET_REG32(temp, 0x1c) + case 0x20: /* DFIFO */ + ncr53c8xx_log("NCR 810: Read DFIFO 00\n"); + return 0; + case 0x21: /* CTEST4 */ + ncr53c8xx_log("NCR 810: Read CTEST4 %02X\n", dev->ctest4); + return dev->ctest4; + case 0x22: /* CTEST5 */ + ncr53c8xx_log("NCR 810: Read CTEST5 %02X\n", dev->ctest5); + return dev->ctest5; + case 0x23: /* CTEST6 */ + ncr53c8xx_log("NCR 810: Read CTEST6 00\n"); + return 0; + CASE_GET_REG24(dbc, 0x24) + case 0x27: /* DCMD */ + ncr53c8xx_log("NCR 810: Read DCMD %02X\n", dev->dcmd); + return dev->dcmd; + CASE_GET_REG32(dnad, 0x28) + CASE_GET_REG32(dsp, 0x2c) + CASE_GET_REG32(dsps, 0x30) + CASE_GET_REG32(scratcha, 0x34) + case 0x38: /* DMODE */ + ncr53c8xx_log("NCR 810: Read DMODE %02X\n", dev->dmode); + return dev->dmode; + case 0x39: /* DIEN */ + ncr53c8xx_log("NCR 810: Read DIEN %02X\n", dev->dien); + return dev->dien; + case 0x3a: /* SBR */ + ncr53c8xx_log("NCR 810: Read SBR %02X\n", dev->sbr); + return dev->sbr; + case 0x3b: /* DCNTL */ + ncr53c8xx_log("NCR 810: Read DCNTL %02X\n", dev->dcntl); + return dev->dcntl; + CASE_GET_REG32(adder, 0x3c) /* ADDER Output (Debug of relative jump address) */ + case 0x40: /* SIEN0 */ + ncr53c8xx_log("NCR 810: Read SIEN0 %02X\n", dev->sien0); + return dev->sien0; + case 0x41: /* SIEN1 */ + ncr53c8xx_log("NCR 810: Read SIEN1 %02X\n", dev->sien1); + return dev->sien1; + case 0x42: /* SIST0 */ + tmp = dev->sist0; + dev->sist0 = 0x00; + ncr53c8xx_update_irq(dev); + ncr53c8xx_log("NCR 810: Read SIST0 %02X\n", tmp); + return tmp; + case 0x43: /* SIST1 */ + tmp = dev->sist1; + dev->sist1 = 0x00; + ncr53c8xx_update_irq(dev); + ncr53c8xx_log("NCR 810: Read SIST1 %02X\n", tmp); + return tmp; + case 0x44: /* SLPAR */ + if (!dev->wide) + return 0x00; + ncr53c8xx_log("NCR 810: Read SLPAR %02X\n", dev->stime0); + return dev->slpar; + case 0x45: /* SWIDE */ + if (!dev->wide) + return 0x00; + ncr53c8xx_log("NCR 810: Read SWIDE %02X\n", dev->stime0); + return dev->swide; + case 0x46: /* MACNTL */ + ncr53c8xx_log("NCR 810: Read MACNTL 4F\n"); + return 0x4f; + case 0x47: /* GPCNTL */ + ncr53c8xx_log("NCR 810: Read GPCNTL %02X\n", dev->gpcntl); + return dev->gpcntl; + case 0x48: /* STIME0 */ + ncr53c8xx_log("NCR 810: Read STIME0 %02X\n", dev->stime0); + return dev->stime0; + case 0x4a: /* RESPID0 */ + if (dev->wide) { + ncr53c8xx_log("NCR 810: Read RESPID0 %02X\n", dev->respid0); + } else { + ncr53c8xx_log("NCR 810: Read RESPID %02X\n", dev->respid0); + } + return dev->respid0; + case 0x4b: /* RESPID1 */ + if (!dev->wide) + return 0x00; + ncr53c8xx_log("NCR 810: Read RESPID1 %02X\n", dev->respid1); + return dev->respid1; + case 0x4c: /* STEST0 */ + ncr53c8xx_log("NCR 810: Read STEST0 %02X\n", dev->stest1); + return 0x00; + case 0x4d: /* STEST1 */ + ncr53c8xx_log("NCR 810: Read STEST1 %02X\n", dev->stest1); + return dev->stest1; + case 0x4e: /* STEST2 */ + ncr53c8xx_log("NCR 810: Read STEST2 %02X\n", dev->stest2); + return dev->stest2; + case 0x4f: /* STEST3 */ + ncr53c8xx_log("NCR 810: Read STEST3 %02X\n", dev->stest3); + return dev->stest3; + case 0x50: /* SIDL0 */ + /* This is needed by the linux drivers. We currently only update it + during the MSG IN phase. */ + if (dev->wide) { + ncr53c8xx_log("NCR 810: Read SIDL0 %02X\n", dev->sidl0); + } else { + ncr53c8xx_log("NCR 810: Read SIDL %02X\n", dev->sidl0); + } + return dev->sidl0; + case 0x51: /* SIDL1 */ + if (!dev->wide) + return 0x00; + ncr53c8xx_log("NCR 810: Read SIDL1 %02X\n", dev->sidl1); + return dev->sidl1; + case 0x52: /* STEST4 */ + ncr53c8xx_log("NCR 810: Read STEST4 E0\n"); + return 0xe0; + case 0x58: /* SBDL */ + /* Some drivers peek at the data bus during the MSG IN phase. */ + if ((dev->sstat1 & PHASE_MASK) == PHASE_MI) { + ncr53c8xx_log("NCR 810: Read SBDL %02X\n", dev->msg[0]); + return dev->msg[0]; + } + ncr53c8xx_log("NCR 810: Read SBDL 00\n"); + return 0; + case 0x59: /* SBDL high */ + ncr53c8xx_log("NCR 810: Read SBDLH 00\n"); + return 0; + CASE_GET_REG32(scratchb, 0x5c) + CASE_GET_REG32_COND(scratchc, 0x60) + CASE_GET_REG32_COND(scratchd, 0x64) + CASE_GET_REG32_COND(scratche, 0x68) + CASE_GET_REG32_COND(scratchf, 0x6c) + CASE_GET_REG32_COND(scratchg, 0x70) + CASE_GET_REG32_COND(scratchh, 0x74) + CASE_GET_REG32_COND(scratchi, 0x78) + CASE_GET_REG32_COND(scratchj, 0x7c) } ncr53c8xx_log("readb 0x%x\n", offset); return 0; @@ -1988,20 +1986,18 @@ ncr53c8xx_reg_readb(ncr53c8xx_t *dev, uint32_t offset) #undef CASE_GET_REG32 } - static uint8_t ncr53c8xx_io_readb(uint16_t addr, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; return ncr53c8xx_reg_readb(dev, addr & 0xff); } - static uint16_t ncr53c8xx_io_readw(uint16_t addr, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; - uint16_t val; + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; + uint16_t val; addr &= 0xff; val = ncr53c8xx_reg_readb(dev, addr); @@ -2009,12 +2005,11 @@ ncr53c8xx_io_readw(uint16_t addr, void *p) return val; } - static uint32_t ncr53c8xx_io_readl(uint16_t addr, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; - uint32_t val; + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; + uint32_t val; addr &= 0xff; val = ncr53c8xx_reg_readb(dev, addr); @@ -2024,29 +2019,26 @@ ncr53c8xx_io_readl(uint16_t addr, void *p) return val; } - static void ncr53c8xx_io_writeb(uint16_t addr, uint8_t val, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; - ncr53c8xx_reg_writeb(dev, addr & 0xff, val); + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; + ncr53c8xx_reg_writeb(dev, addr & 0xff, val); } - static void ncr53c8xx_io_writew(uint16_t addr, uint16_t val, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; - addr &= 0xff; - ncr53c8xx_reg_writeb(dev, addr, val & 0xff); - ncr53c8xx_reg_writeb(dev, addr + 1, (val >> 8) & 0xff); + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; + addr &= 0xff; + ncr53c8xx_reg_writeb(dev, addr, val & 0xff); + ncr53c8xx_reg_writeb(dev, addr + 1, (val >> 8) & 0xff); } - static void ncr53c8xx_io_writel(uint16_t addr, uint32_t val, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; addr &= 0xff; ncr53c8xx_reg_writeb(dev, addr, val & 0xff); ncr53c8xx_reg_writeb(dev, addr + 1, (val >> 8) & 0xff); @@ -2054,31 +2046,28 @@ ncr53c8xx_io_writel(uint16_t addr, uint32_t val, void *p) ncr53c8xx_reg_writeb(dev, addr + 3, (val >> 24) & 0xff); } - static void ncr53c8xx_mmio_writeb(uint32_t addr, uint8_t val, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; ncr53c8xx_reg_writeb(dev, addr & 0xff, val); } - static void ncr53c8xx_mmio_writew(uint32_t addr, uint16_t val, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; addr &= 0xff; ncr53c8xx_reg_writeb(dev, addr, val & 0xff); ncr53c8xx_reg_writeb(dev, addr + 1, (val >> 8) & 0xff); } - static void ncr53c8xx_mmio_writel(uint32_t addr, uint32_t val, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; addr &= 0xff; ncr53c8xx_reg_writeb(dev, addr, val & 0xff); @@ -2087,21 +2076,19 @@ ncr53c8xx_mmio_writel(uint32_t addr, uint32_t val, void *p) ncr53c8xx_reg_writeb(dev, addr + 3, (val >> 24) & 0xff); } - static uint8_t ncr53c8xx_mmio_readb(uint32_t addr, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; return ncr53c8xx_reg_readb(dev, addr & 0xff); } - static uint16_t ncr53c8xx_mmio_readw(uint32_t addr, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; - uint16_t val; + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; + uint16_t val; addr &= 0xff; val = ncr53c8xx_reg_readb(dev, addr); @@ -2109,12 +2096,11 @@ ncr53c8xx_mmio_readw(uint32_t addr, void *p) return val; } - static uint32_t ncr53c8xx_mmio_readl(uint32_t addr, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; - uint32_t val; + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; + uint32_t val; addr &= 0xff; val = ncr53c8xx_reg_readb(dev, addr); @@ -2125,16 +2111,14 @@ ncr53c8xx_mmio_readl(uint32_t addr, void *p) return val; } - static void ncr53c8xx_ram_writeb(uint32_t addr, uint8_t val, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; dev->ram[addr & 0x0fff] = val; } - static void ncr53c8xx_ram_writew(uint32_t addr, uint16_t val, void *p) { @@ -2142,7 +2126,6 @@ ncr53c8xx_ram_writew(uint32_t addr, uint16_t val, void *p) ncr53c8xx_ram_writeb(addr + 1, (val >> 8) & 0xff, p); } - static void ncr53c8xx_ram_writel(uint32_t addr, uint32_t val, void *p) { @@ -2152,16 +2135,14 @@ ncr53c8xx_ram_writel(uint32_t addr, uint32_t val, void *p) ncr53c8xx_ram_writeb(addr + 3, (val >> 24) & 0xff, p); } - static uint8_t ncr53c8xx_ram_readb(uint32_t addr, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; return dev->ram[addr & 0x0fff]; } - static uint16_t ncr53c8xx_ram_readw(uint32_t addr, void *p) { @@ -2173,7 +2154,6 @@ ncr53c8xx_ram_readw(uint32_t addr, void *p) return val; } - static uint32_t ncr53c8xx_ram_readl(uint32_t addr, void *p) { @@ -2187,326 +2167,321 @@ ncr53c8xx_ram_readl(uint32_t addr, void *p) return val; } - static void ncr53c8xx_io_set(ncr53c8xx_t *dev, uint32_t base, uint16_t len) { ncr53c8xx_log("NCR53c8xx: [PCI] Setting I/O handler at %04X\n", base); io_sethandler(base, len, - ncr53c8xx_io_readb, ncr53c8xx_io_readw, ncr53c8xx_io_readl, - ncr53c8xx_io_writeb, ncr53c8xx_io_writew, ncr53c8xx_io_writel, dev); + ncr53c8xx_io_readb, ncr53c8xx_io_readw, ncr53c8xx_io_readl, + ncr53c8xx_io_writeb, ncr53c8xx_io_writew, ncr53c8xx_io_writel, dev); } - static void ncr53c8xx_io_remove(ncr53c8xx_t *dev, uint32_t base, uint16_t len) { ncr53c8xx_log("NCR53c8xx: Removing I/O handler at %04X\n", base); io_removehandler(base, len, - ncr53c8xx_io_readb, ncr53c8xx_io_readw, ncr53c8xx_io_readl, + ncr53c8xx_io_readb, ncr53c8xx_io_readw, ncr53c8xx_io_readl, ncr53c8xx_io_writeb, ncr53c8xx_io_writew, ncr53c8xx_io_writel, dev); } - static void ncr53c8xx_mem_init(ncr53c8xx_t *dev, uint32_t addr) { mem_mapping_add(&dev->mmio_mapping, addr, 0x100, - ncr53c8xx_mmio_readb, ncr53c8xx_mmio_readw, ncr53c8xx_mmio_readl, - ncr53c8xx_mmio_writeb, ncr53c8xx_mmio_writew, ncr53c8xx_mmio_writel, - NULL, MEM_MAPPING_EXTERNAL, dev); + ncr53c8xx_mmio_readb, ncr53c8xx_mmio_readw, ncr53c8xx_mmio_readl, + ncr53c8xx_mmio_writeb, ncr53c8xx_mmio_writew, ncr53c8xx_mmio_writel, + NULL, MEM_MAPPING_EXTERNAL, dev); } - static void ncr53c8xx_ram_init(ncr53c8xx_t *dev, uint32_t addr) { mem_mapping_add(&dev->ram_mapping, addr, 0x1000, - ncr53c8xx_ram_readb, ncr53c8xx_ram_readw, ncr53c8xx_ram_readl, - ncr53c8xx_ram_writeb, ncr53c8xx_ram_writew, ncr53c8xx_ram_writel, - NULL, MEM_MAPPING_EXTERNAL, dev); + ncr53c8xx_ram_readb, ncr53c8xx_ram_readw, ncr53c8xx_ram_readl, + ncr53c8xx_ram_writeb, ncr53c8xx_ram_writew, ncr53c8xx_ram_writel, + NULL, MEM_MAPPING_EXTERNAL, dev); } - static void ncr53c8xx_mem_set_addr(ncr53c8xx_t *dev, uint32_t base) { mem_mapping_set_addr(&dev->mmio_mapping, base, 0x100); } - static void ncr53c8xx_ram_set_addr(ncr53c8xx_t *dev, uint32_t base) { mem_mapping_set_addr(&dev->ram_mapping, base, 0x1000); } - static void ncr53c8xx_bios_set_addr(ncr53c8xx_t *dev, uint32_t base) { if (dev->has_bios == 2) - mem_mapping_set_addr(&dev->bios.mapping, base, 0x10000); + mem_mapping_set_addr(&dev->bios.mapping, base, 0x10000); else if (dev->has_bios == 1) - mem_mapping_set_addr(&dev->bios.mapping, base, 0x04000); + mem_mapping_set_addr(&dev->bios.mapping, base, 0x04000); } - static void ncr53c8xx_mem_disable(ncr53c8xx_t *dev) { mem_mapping_disable(&dev->mmio_mapping); } - static void ncr53c8xx_ram_disable(ncr53c8xx_t *dev) { mem_mapping_disable(&dev->ram_mapping); } - static void ncr53c8xx_bios_disable(ncr53c8xx_t *dev) { mem_mapping_disable(&dev->bios.mapping); } - -uint8_t ncr53c8xx_pci_regs[256]; -bar_t ncr53c8xx_pci_bar[4]; - +uint8_t ncr53c8xx_pci_regs[256]; +bar_t ncr53c8xx_pci_bar[4]; static uint8_t ncr53c8xx_pci_read(int func, int addr, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; ncr53c8xx_log("NCR53c8xx: Reading register %02X\n", addr & 0xff); if ((addr >= 0x80) && (addr <= 0xFF)) - return ncr53c8xx_reg_readb(dev, addr & 0x7F); + return ncr53c8xx_reg_readb(dev, addr & 0x7F); switch (addr) { - case 0x00: - return 0x00; - case 0x01: - return 0x10; - case 0x02: - return dev->chip; - case 0x03: - return 0x00; - case 0x04: - return ncr53c8xx_pci_regs[0x04] & 0x57; /*Respond to IO and memory accesses*/ - case 0x05: - return ncr53c8xx_pci_regs[0x05] & 0x01; - case 0x07: - return 2; - case 0x08: - return dev->chip_rev; /*Revision ID*/ - case 0x09: - return 0; /*Programming interface*/ - case 0x0A: - return 0; /*devubclass*/ - case 0x0B: - return 1; /*Class code*/ - case 0x0C: - case 0x0D: - return ncr53c8xx_pci_regs[addr]; - case 0x0E: - return 0; /*Header type */ - case 0x10: - return 1; /*I/O space*/ - case 0x11: - return ncr53c8xx_pci_bar[0].addr_regs[1]; - case 0x12: - return ncr53c8xx_pci_bar[0].addr_regs[2]; - case 0x13: - return ncr53c8xx_pci_bar[0].addr_regs[3]; - case 0x14: - return 0; /*Memory space*/ - case 0x15: - return ncr53c8xx_pci_bar[1].addr_regs[1]; - case 0x16: - return ncr53c8xx_pci_bar[1].addr_regs[2]; - case 0x17: - return ncr53c8xx_pci_bar[1].addr_regs[3]; - case 0x18: - return 0; /*Memory space*/ - case 0x19: - if (!dev->wide) - return 0; - return ncr53c8xx_pci_bar[2].addr_regs[1]; - case 0x1A: - if (!dev->wide) - return 0; - return ncr53c8xx_pci_bar[2].addr_regs[2]; - case 0x1B: - if (!dev->wide) - return 0; - return ncr53c8xx_pci_bar[2].addr_regs[3]; - case 0x2C: - return 0x00; - case 0x2D: - if (dev->wide) - return 0; - return 0x10; - case 0x2E: - if (dev->wide) - return 0; - return 0x01; - case 0x2F: - return 0x00; - case 0x30: - return ncr53c8xx_pci_bar[3].addr_regs[0] & 0x01; - case 0x31: - return ncr53c8xx_pci_bar[3].addr_regs[1]; - case 0x32: - return ncr53c8xx_pci_bar[3].addr_regs[2]; - case 0x33: - return ncr53c8xx_pci_bar[3].addr_regs[3]; - case 0x3C: - return dev->irq; - case 0x3D: - return PCI_INTA; - case 0x3E: - return 0x11; - case 0x3F: - return 0x40; + case 0x00: + return 0x00; + case 0x01: + return 0x10; + case 0x02: + return dev->chip; + case 0x03: + return 0x00; + case 0x04: + return ncr53c8xx_pci_regs[0x04] & 0x57; /*Respond to IO and memory accesses*/ + case 0x05: + return ncr53c8xx_pci_regs[0x05] & 0x01; + case 0x07: + return 2; + case 0x08: + return dev->chip_rev; /*Revision ID*/ + case 0x09: + return 0; /*Programming interface*/ + case 0x0A: + return 0; /*devubclass*/ + case 0x0B: + return 1; /*Class code*/ + case 0x0C: + case 0x0D: + return ncr53c8xx_pci_regs[addr]; + case 0x0E: + return 0; /*Header type */ + case 0x10: + return 1; /*I/O space*/ + case 0x11: + return ncr53c8xx_pci_bar[0].addr_regs[1]; + case 0x12: + return ncr53c8xx_pci_bar[0].addr_regs[2]; + case 0x13: + return ncr53c8xx_pci_bar[0].addr_regs[3]; + case 0x14: + return 0; /*Memory space*/ + case 0x15: + return ncr53c8xx_pci_bar[1].addr_regs[1]; + case 0x16: + return ncr53c8xx_pci_bar[1].addr_regs[2]; + case 0x17: + return ncr53c8xx_pci_bar[1].addr_regs[3]; + case 0x18: + return 0; /*Memory space*/ + case 0x19: + if (!dev->wide) + return 0; + return ncr53c8xx_pci_bar[2].addr_regs[1]; + case 0x1A: + if (!dev->wide) + return 0; + return ncr53c8xx_pci_bar[2].addr_regs[2]; + case 0x1B: + if (!dev->wide) + return 0; + return ncr53c8xx_pci_bar[2].addr_regs[3]; + case 0x2C: + return 0x00; + case 0x2D: + if (dev->wide) + return 0; + return 0x10; + case 0x2E: + if (dev->wide) + return 0; + return 0x01; + case 0x2F: + return 0x00; + case 0x30: + return ncr53c8xx_pci_bar[3].addr_regs[0] & 0x01; + case 0x31: + return ncr53c8xx_pci_bar[3].addr_regs[1]; + case 0x32: + return ncr53c8xx_pci_bar[3].addr_regs[2]; + case 0x33: + return ncr53c8xx_pci_bar[3].addr_regs[3]; + case 0x3C: + return dev->irq; + case 0x3D: + return PCI_INTA; + case 0x3E: + return 0x11; + case 0x3F: + return 0x40; } - return(0); + return (0); } - static void ncr53c8xx_pci_write(int func, int addr, uint8_t val, void *p) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)p; - uint8_t valxor; + ncr53c8xx_t *dev = (ncr53c8xx_t *) p; + uint8_t valxor; ncr53c8xx_log("NCR53c8xx: Write value %02X to register %02X\n", val, addr & 0xff); if ((addr >= 0x80) && (addr <= 0xFF)) { - ncr53c8xx_reg_writeb(dev, addr & 0x7F, val); - return; + ncr53c8xx_reg_writeb(dev, addr & 0x7F, val); + return; } - switch (addr) - { - case 0x04: - valxor = (val & 0x57) ^ ncr53c8xx_pci_regs[addr]; - if (valxor & PCI_COMMAND_IO) { - ncr53c8xx_io_remove(dev, dev->PCIBase, 0x0100); - if ((dev->PCIBase != 0) && (val & PCI_COMMAND_IO)) - ncr53c8xx_io_set(dev, dev->PCIBase, 0x0100); - } - if (valxor & PCI_COMMAND_MEM) { - ncr53c8xx_mem_disable(dev); - if ((dev->MMIOBase != 0) && (val & PCI_COMMAND_MEM)) - ncr53c8xx_mem_set_addr(dev, dev->MMIOBase); - if (dev->wide) { - ncr53c8xx_ram_disable(dev); - if ((dev->RAMBase != 0) && (val & PCI_COMMAND_MEM)) - ncr53c8xx_ram_set_addr(dev, dev->RAMBase); - } - } - ncr53c8xx_pci_regs[addr] = val & 0x57; - break; + switch (addr) { + case 0x04: + valxor = (val & 0x57) ^ ncr53c8xx_pci_regs[addr]; + if (valxor & PCI_COMMAND_IO) { + ncr53c8xx_io_remove(dev, dev->PCIBase, 0x0100); + if ((dev->PCIBase != 0) && (val & PCI_COMMAND_IO)) + ncr53c8xx_io_set(dev, dev->PCIBase, 0x0100); + } + if (valxor & PCI_COMMAND_MEM) { + ncr53c8xx_mem_disable(dev); + if ((dev->MMIOBase != 0) && (val & PCI_COMMAND_MEM)) + ncr53c8xx_mem_set_addr(dev, dev->MMIOBase); + if (dev->wide) { + ncr53c8xx_ram_disable(dev); + if ((dev->RAMBase != 0) && (val & PCI_COMMAND_MEM)) + ncr53c8xx_ram_set_addr(dev, dev->RAMBase); + } + } + ncr53c8xx_pci_regs[addr] = val & 0x57; + break; - case 0x05: - ncr53c8xx_pci_regs[addr] = val & 0x01; - break; + case 0x05: + ncr53c8xx_pci_regs[addr] = val & 0x01; + break; - case 0x0C: - case 0x0D: - ncr53c8xx_pci_regs[addr] = val; - break; + case 0x0C: + case 0x0D: + ncr53c8xx_pci_regs[addr] = val; + break; - case 0x10: case 0x11: case 0x12: case 0x13: - /* I/O Base set. */ - /* First, remove the old I/O. */ - ncr53c8xx_io_remove(dev, dev->PCIBase, 0x0100); - /* Then let's set the PCI regs. */ - ncr53c8xx_pci_bar[0].addr_regs[addr & 3] = val; - /* Then let's calculate the new I/O base. */ - ncr53c8xx_pci_bar[0].addr &= 0xff00; - dev->PCIBase = ncr53c8xx_pci_bar[0].addr; - /* Log the new base. */ - ncr53c8xx_log("NCR53c8xx: New I/O base is %04X\n" , dev->PCIBase); - /* We're done, so get out of the here. */ - if (ncr53c8xx_pci_regs[4] & PCI_COMMAND_IO) { - if (dev->PCIBase != 0) { - ncr53c8xx_io_set(dev, dev->PCIBase, 0x0100); - } - } - return; + case 0x10: + case 0x11: + case 0x12: + case 0x13: + /* I/O Base set. */ + /* First, remove the old I/O. */ + ncr53c8xx_io_remove(dev, dev->PCIBase, 0x0100); + /* Then let's set the PCI regs. */ + ncr53c8xx_pci_bar[0].addr_regs[addr & 3] = val; + /* Then let's calculate the new I/O base. */ + ncr53c8xx_pci_bar[0].addr &= 0xff00; + dev->PCIBase = ncr53c8xx_pci_bar[0].addr; + /* Log the new base. */ + ncr53c8xx_log("NCR53c8xx: New I/O base is %04X\n", dev->PCIBase); + /* We're done, so get out of the here. */ + if (ncr53c8xx_pci_regs[4] & PCI_COMMAND_IO) { + if (dev->PCIBase != 0) { + ncr53c8xx_io_set(dev, dev->PCIBase, 0x0100); + } + } + return; - case 0x15: case 0x16: case 0x17: - /* MMIO Base set. */ - /* First, remove the old I/O. */ - ncr53c8xx_mem_disable(dev); - /* Then let's set the PCI regs. */ - ncr53c8xx_pci_bar[1].addr_regs[addr & 3] = val; - /* Then let's calculate the new I/O base. */ - ncr53c8xx_pci_bar[1].addr &= 0xffffc000; - dev->MMIOBase = ncr53c8xx_pci_bar[1].addr & 0xffffc000; - /* Log the new base. */ - ncr53c8xx_log("NCR53c8xx: New MMIO base is %08X\n" , dev->MMIOBase); - /* We're done, so get out of the here. */ - if (ncr53c8xx_pci_regs[4] & PCI_COMMAND_MEM) { - if (dev->MMIOBase != 0) - ncr53c8xx_mem_set_addr(dev, dev->MMIOBase); - } - return; + case 0x15: + case 0x16: + case 0x17: + /* MMIO Base set. */ + /* First, remove the old I/O. */ + ncr53c8xx_mem_disable(dev); + /* Then let's set the PCI regs. */ + ncr53c8xx_pci_bar[1].addr_regs[addr & 3] = val; + /* Then let's calculate the new I/O base. */ + ncr53c8xx_pci_bar[1].addr &= 0xffffc000; + dev->MMIOBase = ncr53c8xx_pci_bar[1].addr & 0xffffc000; + /* Log the new base. */ + ncr53c8xx_log("NCR53c8xx: New MMIO base is %08X\n", dev->MMIOBase); + /* We're done, so get out of the here. */ + if (ncr53c8xx_pci_regs[4] & PCI_COMMAND_MEM) { + if (dev->MMIOBase != 0) + ncr53c8xx_mem_set_addr(dev, dev->MMIOBase); + } + return; - case 0x19: case 0x1A: case 0x1B: - if (!dev->wide) - return; - /* RAM Base set. */ - /* First, remove the old I/O. */ - ncr53c8xx_ram_disable(dev); - /* Then let's set the PCI regs. */ - ncr53c8xx_pci_bar[2].addr_regs[addr & 3] = val; - /* Then let's calculate the new I/O base. */ - ncr53c8xx_pci_bar[2].addr &= 0xfffff000; - dev->RAMBase = ncr53c8xx_pci_bar[2].addr & 0xfffff000; - /* Log the new base. */ - ncr53c8xx_log("NCR53c8xx: New RAM base is %08X\n" , dev->RAMBase); - /* We're done, so get out of the here. */ - if (ncr53c8xx_pci_regs[4] & PCI_COMMAND_MEM) { - if (dev->RAMBase != 0) - ncr53c8xx_ram_set_addr(dev, dev->RAMBase); - } - return; + case 0x19: + case 0x1A: + case 0x1B: + if (!dev->wide) + return; + /* RAM Base set. */ + /* First, remove the old I/O. */ + ncr53c8xx_ram_disable(dev); + /* Then let's set the PCI regs. */ + ncr53c8xx_pci_bar[2].addr_regs[addr & 3] = val; + /* Then let's calculate the new I/O base. */ + ncr53c8xx_pci_bar[2].addr &= 0xfffff000; + dev->RAMBase = ncr53c8xx_pci_bar[2].addr & 0xfffff000; + /* Log the new base. */ + ncr53c8xx_log("NCR53c8xx: New RAM base is %08X\n", dev->RAMBase); + /* We're done, so get out of the here. */ + if (ncr53c8xx_pci_regs[4] & PCI_COMMAND_MEM) { + if (dev->RAMBase != 0) + ncr53c8xx_ram_set_addr(dev, dev->RAMBase); + } + return; - case 0x30: case 0x31: case 0x32: case 0x33: - if (dev->has_bios == 0) - return; - /* BIOS Base set. */ - /* First, remove the old I/O. */ - ncr53c8xx_bios_disable(dev); - /* Then let's set the PCI regs. */ - ncr53c8xx_pci_bar[3].addr_regs[addr & 3] = val; - /* Then let's calculate the new I/O base. */ - ncr53c8xx_pci_bar[3].addr &= (dev->bios_mask | 0x00000001); - dev->BIOSBase = ncr53c8xx_pci_bar[3].addr & dev->bios_mask; - ncr53c8xx_log("BIOS BAR: %08X\n", dev->BIOSBase | ncr53c8xx_pci_bar[3].addr_regs[0]); - /* Log the new base. */ - ncr53c8xx_log("NCR53c8xx: New BIOS base is %08X\n" , dev->BIOSBase); - /* We're done, so get out of the here. */ - if (ncr53c8xx_pci_bar[3].addr_regs[0] & 0x01) - ncr53c8xx_bios_set_addr(dev, dev->BIOSBase); - return; + case 0x30: + case 0x31: + case 0x32: + case 0x33: + if (dev->has_bios == 0) + return; + /* BIOS Base set. */ + /* First, remove the old I/O. */ + ncr53c8xx_bios_disable(dev); + /* Then let's set the PCI regs. */ + ncr53c8xx_pci_bar[3].addr_regs[addr & 3] = val; + /* Then let's calculate the new I/O base. */ + ncr53c8xx_pci_bar[3].addr &= (dev->bios_mask | 0x00000001); + dev->BIOSBase = ncr53c8xx_pci_bar[3].addr & dev->bios_mask; + ncr53c8xx_log("BIOS BAR: %08X\n", dev->BIOSBase | ncr53c8xx_pci_bar[3].addr_regs[0]); + /* Log the new base. */ + ncr53c8xx_log("NCR53c8xx: New BIOS base is %08X\n", dev->BIOSBase); + /* We're done, so get out of the here. */ + if (ncr53c8xx_pci_bar[3].addr_regs[0] & 0x01) + ncr53c8xx_bios_set_addr(dev, dev->BIOSBase); + return; - case 0x3C: - ncr53c8xx_pci_regs[addr] = val; - dev->irq = val; - return; + case 0x3C: + ncr53c8xx_pci_regs[addr] = val; + dev->irq = val; + return; } } - static void * ncr53c8xx_init(const device_t *info) { @@ -2518,72 +2493,72 @@ ncr53c8xx_init(const device_t *info) dev->bus = scsi_get_bus(); dev->chip_rev = 0; - dev->chip = info->local & 0xff; + dev->chip = info->local & 0xff; if ((dev->chip != CHIP_810) && (dev->chip != CHIP_820) && !(info->local & 0x8000)) { - dev->has_bios = device_get_config_int("bios"); + dev->has_bios = device_get_config_int("bios"); - /* We have to auto-patch the BIOS to have the correct PCI Device ID, because for some reason, they all ship with - the PCI Device ID set to that of the NCR 53c825, but for a machine BIOS to load the SCSI BIOS correctly, the - PCI Device ID in the BIOS' PCIR block must match the one returned in the PCI registers. */ - if (dev->has_bios == 2) { - rom_init(&dev->bios, SYM53C8XX_SDMS4_ROM, 0xd0000, 0x10000, 0xffff, 0, MEM_MAPPING_EXTERNAL); - ncr53c8xx_log("BIOS v4.19: Old BIOS CHIP ID: %02X, old BIOS checksum: %02X\n", dev->bios.rom[0x0022], dev->bios.rom[0xffff]); - dev->bios.rom[0xffff] += (dev->bios.rom[0x0022] - dev->chip); - dev->bios.rom[0x0022] = dev->chip; - ncr53c8xx_log("BIOS v4.19: New BIOS CHIP ID: %02X, old BIOS checksum: %02X\n", dev->bios.rom[0x0022], dev->bios.rom[0xffff]); - } else if (dev->has_bios == 1) { - rom_init(&dev->bios, NCR53C8XX_SDMS3_ROM, 0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); - ncr53c8xx_log("BIOS v3.07: Old BIOS CHIP ID: %02X, old BIOS checksum: %02X\n", dev->bios.rom[0x3fcb], dev->bios.rom[0x3fff]); - dev->bios.rom[0x3fff] += (dev->bios.rom[0x3fcb] - dev->chip); - dev->bios.rom[0x3fcb] = dev->chip; - ncr53c8xx_log("BIOS v3.07: New BIOS CHIP ID: %02X, old BIOS checksum: %02X\n", dev->bios.rom[0x3fcb], dev->bios.rom[0x3fff]); - } + /* We have to auto-patch the BIOS to have the correct PCI Device ID, because for some reason, they all ship with + the PCI Device ID set to that of the NCR 53c825, but for a machine BIOS to load the SCSI BIOS correctly, the + PCI Device ID in the BIOS' PCIR block must match the one returned in the PCI registers. */ + if (dev->has_bios == 2) { + rom_init(&dev->bios, SYM53C8XX_SDMS4_ROM, 0xd0000, 0x10000, 0xffff, 0, MEM_MAPPING_EXTERNAL); + ncr53c8xx_log("BIOS v4.19: Old BIOS CHIP ID: %02X, old BIOS checksum: %02X\n", dev->bios.rom[0x0022], dev->bios.rom[0xffff]); + dev->bios.rom[0xffff] += (dev->bios.rom[0x0022] - dev->chip); + dev->bios.rom[0x0022] = dev->chip; + ncr53c8xx_log("BIOS v4.19: New BIOS CHIP ID: %02X, old BIOS checksum: %02X\n", dev->bios.rom[0x0022], dev->bios.rom[0xffff]); + } else if (dev->has_bios == 1) { + rom_init(&dev->bios, NCR53C8XX_SDMS3_ROM, 0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL); + ncr53c8xx_log("BIOS v3.07: Old BIOS CHIP ID: %02X, old BIOS checksum: %02X\n", dev->bios.rom[0x3fcb], dev->bios.rom[0x3fff]); + dev->bios.rom[0x3fff] += (dev->bios.rom[0x3fcb] - dev->chip); + dev->bios.rom[0x3fcb] = dev->chip; + ncr53c8xx_log("BIOS v3.07: New BIOS CHIP ID: %02X, old BIOS checksum: %02X\n", dev->bios.rom[0x3fcb], dev->bios.rom[0x3fff]); + } } else - dev->has_bios = 0; + dev->has_bios = 0; if (info->local & 0x8000) - dev->pci_slot = pci_add_card(PCI_ADD_SCSI, ncr53c8xx_pci_read, ncr53c8xx_pci_write, dev); + dev->pci_slot = pci_add_card(PCI_ADD_SCSI, ncr53c8xx_pci_read, ncr53c8xx_pci_write, dev); else - dev->pci_slot = pci_add_card(PCI_ADD_NORMAL, ncr53c8xx_pci_read, ncr53c8xx_pci_write, dev); + dev->pci_slot = pci_add_card(PCI_ADD_NORMAL, ncr53c8xx_pci_read, ncr53c8xx_pci_write, dev); if (dev->chip == CHIP_875) { - dev->chip_rev = 0x04; - dev->nvr_path = "ncr53c875.nvr"; - dev->wide = 1; + dev->chip_rev = 0x04; + dev->nvr_path = "ncr53c875.nvr"; + dev->wide = 1; } else if (dev->chip == CHIP_860) { - dev->chip_rev = 0x04; - dev->nvr_path = "ncr53c860.nvr"; - dev->wide = 1; + dev->chip_rev = 0x04; + dev->nvr_path = "ncr53c860.nvr"; + dev->wide = 1; } else if (dev->chip == CHIP_820) { - dev->nvr_path = "ncr53c820.nvr"; - dev->wide = 1; + dev->nvr_path = "ncr53c820.nvr"; + dev->wide = 1; } else if (dev->chip == CHIP_825) { - dev->chip_rev = 0x26; - dev->nvr_path = "ncr53c825a.nvr"; - dev->wide = 1; + dev->chip_rev = 0x26; + dev->nvr_path = "ncr53c825a.nvr"; + dev->wide = 1; } else if (dev->chip == CHIP_810) { - dev->nvr_path = "ncr53c810.nvr"; - dev->wide = 0; + dev->nvr_path = "ncr53c810.nvr"; + dev->wide = 0; } else if (dev->chip == CHIP_815) { - dev->chip_rev = 0x04; - dev->nvr_path = "ncr53c815.nvr"; - dev->wide = 0; + dev->chip_rev = 0x04; + dev->nvr_path = "ncr53c815.nvr"; + dev->wide = 0; } ncr53c8xx_pci_bar[0].addr_regs[0] = 1; ncr53c8xx_pci_bar[1].addr_regs[0] = 0; - ncr53c8xx_pci_regs[0x04] = 3; + ncr53c8xx_pci_regs[0x04] = 3; if (dev->has_bios == 2) { - ncr53c8xx_pci_bar[3].addr = 0xffff0000; - dev->bios_mask = 0xffff0000; + ncr53c8xx_pci_bar[3].addr = 0xffff0000; + dev->bios_mask = 0xffff0000; } else if (dev->has_bios == 1) { - ncr53c8xx_pci_bar[3].addr = 0xffffc000; - dev->bios_mask = 0xffffc000; + ncr53c8xx_pci_bar[3].addr = 0xffffc000; + dev->bios_mask = 0xffffc000; } else { - ncr53c8xx_pci_bar[3].addr = 0x00000000; - dev->bios_mask = 0x00000000; + ncr53c8xx_pci_bar[3].addr = 0x00000000; + dev->bios_mask = 0x00000000; } ncr53c8xx_mem_init(dev, 0x0fffff00); @@ -2592,14 +2567,14 @@ ncr53c8xx_init(const device_t *info) ncr53c8xx_pci_bar[2].addr_regs[0] = 0; if (dev->wide) { - ncr53c8xx_ram_init(dev, 0x0ffff000); - ncr53c8xx_ram_disable(dev); + ncr53c8xx_ram_init(dev, 0x0ffff000); + ncr53c8xx_ram_disable(dev); } if (dev->has_bios) - ncr53c8xx_bios_disable(dev); + ncr53c8xx_bios_disable(dev); - dev->i2c = i2c_gpio_init("nvr_ncr53c8xx"); + dev->i2c = i2c_gpio_init("nvr_ncr53c8xx"); dev->eeprom = i2c_eeprom_init(i2c_gpio_get_bus(dev->i2c), 0x50, dev->nvram, sizeof(dev->nvram), 1); /* Load the serial EEPROM. */ @@ -2609,32 +2584,31 @@ ncr53c8xx_init(const device_t *info) timer_add(&dev->timer, ncr53c8xx_callback, dev, 0); - return(dev); + return (dev); } - static void ncr53c8xx_close(void *priv) { - ncr53c8xx_t *dev = (ncr53c8xx_t *)priv; + ncr53c8xx_t *dev = (ncr53c8xx_t *) priv; if (dev) { - if (dev->eeprom) - i2c_eeprom_close(dev->eeprom); + if (dev->eeprom) + i2c_eeprom_close(dev->eeprom); - if (dev->i2c) - i2c_gpio_close(dev->i2c); + if (dev->i2c) + i2c_gpio_close(dev->i2c); - /* Save the serial EEPROM. */ - ncr53c8xx_eeprom(dev, 1); + /* Save the serial EEPROM. */ + ncr53c8xx_eeprom(dev, 1); - free(dev); - dev = NULL; + free(dev); + dev = NULL; } } static const device_config_t ncr53c8xx_pci_config[] = { -// clang-format off + // clang-format off { .name = "bios", .description = "BIOS", @@ -2655,99 +2629,99 @@ static const device_config_t ncr53c8xx_pci_config[] = { }; const device_t ncr53c810_pci_device = { - .name = "NCR 53c810", + .name = "NCR 53c810", .internal_name = "ncr53c810", - .flags = DEVICE_PCI, - .local = CHIP_810, - .init = ncr53c8xx_init, - .close = ncr53c8xx_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = CHIP_810, + .init = ncr53c8xx_init, + .close = ncr53c8xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ncr53c810_onboard_pci_device = { - .name = "NCR 53c810 On-Board", + .name = "NCR 53c810 On-Board", .internal_name = "ncr53c810_onboard", - .flags = DEVICE_PCI, - .local = 0x8001, - .init = ncr53c8xx_init, - .close = ncr53c8xx_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = 0x8001, + .init = ncr53c8xx_init, + .close = ncr53c8xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ncr53c815_pci_device = { - .name = "NCR 53c815", + .name = "NCR 53c815", .internal_name = "ncr53c815", - .flags = DEVICE_PCI, - .local = CHIP_815, - .init = ncr53c8xx_init, - .close = ncr53c8xx_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = CHIP_815, + .init = ncr53c8xx_init, + .close = ncr53c8xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, + .force_redraw = NULL, ncr53c8xx_pci_config }; const device_t ncr53c820_pci_device = { - .name = "NCR 53c820", + .name = "NCR 53c820", .internal_name = "ncr53c820", - .flags = DEVICE_PCI, - .local = CHIP_820, - .init = ncr53c8xx_init, - .close = ncr53c8xx_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = CHIP_820, + .init = ncr53c8xx_init, + .close = ncr53c8xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ncr53c825a_pci_device = { - .name = "NCR 53c825A", + .name = "NCR 53c825A", .internal_name = "ncr53c825a", - .flags = DEVICE_PCI, - .local = CHIP_825, - .init = ncr53c8xx_init, - .close = ncr53c8xx_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = CHIP_825, + .init = ncr53c8xx_init, + .close = ncr53c8xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ncr53c8xx_pci_config + .force_redraw = NULL, + .config = ncr53c8xx_pci_config }; const device_t ncr53c860_pci_device = { - .name = "NCR 53c860", + .name = "NCR 53c860", .internal_name = "ncr53c860", - .flags = DEVICE_PCI, - .local = CHIP_860, - .init = ncr53c8xx_init, - .close = ncr53c8xx_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = CHIP_860, + .init = ncr53c8xx_init, + .close = ncr53c8xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ncr53c8xx_pci_config + .force_redraw = NULL, + .config = ncr53c8xx_pci_config }; const device_t ncr53c875_pci_device = { - .name = "NCR 53c875", + .name = "NCR 53c875", .internal_name = "ncr53c875", - .flags = DEVICE_PCI, - .local = CHIP_875, - .init = ncr53c8xx_init, - .close = ncr53c8xx_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = CHIP_875, + .init = ncr53c8xx_init, + .close = ncr53c8xx_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ncr53c8xx_pci_config + .force_redraw = NULL, + .config = ncr53c8xx_pci_config }; diff --git a/src/scsi/scsi_pcscsi.c b/src/scsi/scsi_pcscsi.c index 3266dc802..109a699d9 100644 --- a/src/scsi/scsi_pcscsi.c +++ b/src/scsi/scsi_pcscsi.c @@ -47,98 +47,98 @@ #include <86box/vid_ati_eeprom.h> #include <86box/fifo8.h> -#define DC390_ROM "roms/scsi/esp_pci/INT13.BIN" +#define DC390_ROM "roms/scsi/esp_pci/INT13.BIN" -#define ESP_REGS 16 -#define ESP_FIFO_SZ 16 -#define ESP_CMDFIFO_SZ 32 +#define ESP_REGS 16 +#define ESP_FIFO_SZ 16 +#define ESP_CMDFIFO_SZ 32 -#define ESP_TCLO 0x0 -#define ESP_TCMID 0x1 -#define ESP_FIFO 0x2 -#define ESP_CMD 0x3 -#define ESP_RSTAT 0x4 -#define ESP_WBUSID 0x4 -#define ESP_RINTR 0x5 -#define ESP_WSEL 0x5 -#define ESP_RSEQ 0x6 -#define ESP_WSYNTP 0x6 -#define ESP_RFLAGS 0x7 -#define ESP_WSYNO 0x7 -#define ESP_CFG1 0x8 -#define ESP_RRES1 0x9 -#define ESP_WCCF 0x9 -#define ESP_RRES2 0xa -#define ESP_WTEST 0xa -#define ESP_CFG2 0xb -#define ESP_CFG3 0xc -#define ESP_RES3 0xd -#define ESP_TCHI 0xe -#define ESP_RES4 0xf +#define ESP_TCLO 0x0 +#define ESP_TCMID 0x1 +#define ESP_FIFO 0x2 +#define ESP_CMD 0x3 +#define ESP_RSTAT 0x4 +#define ESP_WBUSID 0x4 +#define ESP_RINTR 0x5 +#define ESP_WSEL 0x5 +#define ESP_RSEQ 0x6 +#define ESP_WSYNTP 0x6 +#define ESP_RFLAGS 0x7 +#define ESP_WSYNO 0x7 +#define ESP_CFG1 0x8 +#define ESP_RRES1 0x9 +#define ESP_WCCF 0x9 +#define ESP_RRES2 0xa +#define ESP_WTEST 0xa +#define ESP_CFG2 0xb +#define ESP_CFG3 0xc +#define ESP_RES3 0xd +#define ESP_TCHI 0xe +#define ESP_RES4 0xf -#define CMD_DMA 0x80 -#define CMD_CMD 0x7f +#define CMD_DMA 0x80 +#define CMD_CMD 0x7f -#define CMD_NOP 0x00 -#define CMD_FLUSH 0x01 -#define CMD_RESET 0x02 -#define CMD_BUSRESET 0x03 -#define CMD_TI 0x10 -#define CMD_ICCS 0x11 -#define CMD_MSGACC 0x12 -#define CMD_PAD 0x18 -#define CMD_SATN 0x1a -#define CMD_RSTATN 0x1b -#define CMD_SEL 0x41 -#define CMD_SELATN 0x42 -#define CMD_SELATNS 0x43 -#define CMD_ENSEL 0x44 -#define CMD_DISSEL 0x45 +#define CMD_NOP 0x00 +#define CMD_FLUSH 0x01 +#define CMD_RESET 0x02 +#define CMD_BUSRESET 0x03 +#define CMD_TI 0x10 +#define CMD_ICCS 0x11 +#define CMD_MSGACC 0x12 +#define CMD_PAD 0x18 +#define CMD_SATN 0x1a +#define CMD_RSTATN 0x1b +#define CMD_SEL 0x41 +#define CMD_SELATN 0x42 +#define CMD_SELATNS 0x43 +#define CMD_ENSEL 0x44 +#define CMD_DISSEL 0x45 -#define STAT_DO 0x00 -#define STAT_DI 0x01 -#define STAT_CD 0x02 -#define STAT_ST 0x03 -#define STAT_MO 0x06 -#define STAT_MI 0x07 -#define STAT_PIO_MASK 0x06 +#define STAT_DO 0x00 +#define STAT_DI 0x01 +#define STAT_CD 0x02 +#define STAT_ST 0x03 +#define STAT_MO 0x06 +#define STAT_MI 0x07 +#define STAT_PIO_MASK 0x06 -#define STAT_TC 0x10 -#define STAT_PE 0x20 -#define STAT_GE 0x40 -#define STAT_INT 0x80 +#define STAT_TC 0x10 +#define STAT_PE 0x20 +#define STAT_GE 0x40 +#define STAT_INT 0x80 -#define BUSID_DID 0x07 +#define BUSID_DID 0x07 -#define INTR_FC 0x08 -#define INTR_BS 0x10 -#define INTR_DC 0x20 -#define INTR_RST 0x80 +#define INTR_FC 0x08 +#define INTR_BS 0x10 +#define INTR_DC 0x20 +#define INTR_RST 0x80 -#define SEQ_0 0x0 -#define SEQ_MO 0x1 -#define SEQ_CD 0x4 +#define SEQ_0 0x0 +#define SEQ_MO 0x1 +#define SEQ_CD 0x4 -#define CFG1_RESREPT 0x40 +#define CFG1_RESREPT 0x40 -#define TCHI_FAS100A 0x04 -#define TCHI_AM53C974 0x12 +#define TCHI_FAS100A 0x04 +#define TCHI_AM53C974 0x12 -#define DMA_CMD 0x0 -#define DMA_STC 0x1 -#define DMA_SPA 0x2 -#define DMA_WBC 0x3 -#define DMA_WAC 0x4 -#define DMA_STAT 0x5 -#define DMA_SMDLA 0x6 -#define DMA_WMAC 0x7 +#define DMA_CMD 0x0 +#define DMA_STC 0x1 +#define DMA_SPA 0x2 +#define DMA_WBC 0x3 +#define DMA_WAC 0x4 +#define DMA_STAT 0x5 +#define DMA_SMDLA 0x6 +#define DMA_WMAC 0x7 -#define DMA_CMD_MASK 0x03 -#define DMA_CMD_DIAG 0x04 -#define DMA_CMD_MDL 0x10 -#define DMA_CMD_INTE_P 0x20 -#define DMA_CMD_INTE_D 0x40 -#define DMA_CMD_DIR 0x80 +#define DMA_CMD_MASK 0x03 +#define DMA_CMD_DIAG 0x04 +#define DMA_CMD_MDL 0x10 +#define DMA_CMD_INTE_P 0x20 +#define DMA_CMD_INTE_D 0x40 +#define DMA_CMD_DIR 0x80 #define DMA_STAT_PWDN 0x01 #define DMA_STAT_ERROR 0x02 @@ -147,37 +147,37 @@ #define DMA_STAT_SCSIINT 0x10 #define DMA_STAT_BCMBLT 0x20 -#define SBAC_STATUS (1 << 24) -#define SBAC_PABTEN (1 << 25) +#define SBAC_STATUS (1 << 24) +#define SBAC_PABTEN (1 << 25) typedef struct { mem_mapping_t mmio_mapping; - mem_mapping_t ram_mapping; - char *nvr_path; - uint8_t pci_slot; - int has_bios; - int BIOSBase; - int MMIOBase; - rom_t bios; - ati_eeprom_t eeprom; - int PCIBase; + mem_mapping_t ram_mapping; + char *nvr_path; + uint8_t pci_slot; + int has_bios; + int BIOSBase; + int MMIOBase; + rom_t bios; + ati_eeprom_t eeprom; + int PCIBase; - uint8_t rregs[ESP_REGS]; - uint8_t wregs[ESP_REGS]; - int irq; - int tchi_written; + uint8_t rregs[ESP_REGS]; + uint8_t wregs[ESP_REGS]; + int irq; + int tchi_written; uint32_t ti_size; uint32_t status; uint32_t dma; - Fifo8 fifo; - uint8_t bus; - uint8_t id, lun; - Fifo8 cmdfifo; + Fifo8 fifo; + uint8_t bus; + uint8_t id, lun; + Fifo8 cmdfifo; uint32_t do_cmd; - uint8_t cmdfifo_cdb_offset; + uint8_t cmdfifo_cdb_offset; int32_t xfer_counter; - int dma_enabled; + int dma_enabled; uint32_t buffer_pos; uint32_t dma_regs[8]; @@ -187,41 +187,39 @@ typedef struct { pc_timer_t timer; - int mca; - uint16_t Base; - uint8_t HostID, DmaChannel; + int mca; + uint16_t Base; + uint8_t HostID, DmaChannel; - struct - { - uint8_t mode; - uint8_t status; - int pos; - } dma_86c01; + struct + { + uint8_t mode; + uint8_t status; + int pos; + } dma_86c01; - uint8_t pos_regs[8]; + uint8_t pos_regs[8]; } esp_t; #define READ_FROM_DEVICE 1 #define WRITE_TO_DEVICE 0 - #ifdef ENABLE_ESP_LOG int esp_do_log = ENABLE_ESP_LOG; - static void esp_log(const char *fmt, ...) { va_list ap; if (esp_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define esp_log(fmt, ...) +# define esp_log(fmt, ...) #endif static void esp_dma_enable(esp_t *dev, int level); @@ -238,42 +236,42 @@ static void handle_ti(void *priv); static void esp_irq(esp_t *dev, int level) { - if (dev->mca) { - if (level) { - picint(1 << dev->irq); - dev->dma_86c01.status |= 0x01; - esp_log("Raising IRQ...\n"); - } else { - picintc(1 << dev->irq); - dev->dma_86c01.status &= ~0x01; - esp_log("Lowering IRQ...\n"); - } - } else { - if (level) { - pci_set_irq(dev->pci_slot, PCI_INTA); - esp_log("Raising IRQ...\n"); - } else { - pci_clear_irq(dev->pci_slot, PCI_INTA); - esp_log("Lowering IRQ...\n"); - } - } + if (dev->mca) { + if (level) { + picint(1 << dev->irq); + dev->dma_86c01.status |= 0x01; + esp_log("Raising IRQ...\n"); + } else { + picintc(1 << dev->irq); + dev->dma_86c01.status &= ~0x01; + esp_log("Lowering IRQ...\n"); + } + } else { + if (level) { + pci_set_irq(dev->pci_slot, PCI_INTA); + esp_log("Raising IRQ...\n"); + } else { + pci_clear_irq(dev->pci_slot, PCI_INTA); + esp_log("Lowering IRQ...\n"); + } + } } static void esp_raise_irq(esp_t *dev) { - if (!(dev->rregs[ESP_RSTAT] & STAT_INT)) { - dev->rregs[ESP_RSTAT] |= STAT_INT; - esp_irq(dev, 1); + if (!(dev->rregs[ESP_RSTAT] & STAT_INT)) { + dev->rregs[ESP_RSTAT] |= STAT_INT; + esp_irq(dev, 1); } } static void esp_lower_irq(esp_t *dev) { - if (dev->rregs[ESP_RSTAT] & STAT_INT) { - dev->rregs[ESP_RSTAT] &= ~STAT_INT; - esp_irq(dev, 0); + if (dev->rregs[ESP_RSTAT] & STAT_INT) { + dev->rregs[ESP_RSTAT] &= ~STAT_INT; + esp_irq(dev, 0); } } @@ -301,7 +299,7 @@ static uint32_t esp_fifo_pop_buf(Fifo8 *fifo, uint8_t *dest, int maxlen) { const uint8_t *buf; - uint32_t n; + uint32_t n; if (maxlen == 0) { return 0; @@ -330,9 +328,9 @@ esp_get_tc(esp_t *dev) static void esp_set_tc(esp_t *dev, uint32_t dmalen) { - dev->rregs[ESP_TCLO] = dmalen; + dev->rregs[ESP_TCLO] = dmalen; dev->rregs[ESP_TCMID] = dmalen >> 8; - dev->rregs[ESP_TCHI] = dmalen >> 16; + dev->rregs[ESP_TCHI] = dmalen >> 16; } static uint32_t @@ -351,10 +349,10 @@ static void esp_dma_done(esp_t *dev) { dev->rregs[ESP_RSTAT] |= STAT_TC; - dev->rregs[ESP_RINTR] = INTR_BS; - dev->rregs[ESP_RSEQ] = 0; + dev->rregs[ESP_RINTR] = INTR_BS; + dev->rregs[ESP_RSEQ] = 0; dev->rregs[ESP_RFLAGS] = 0; - esp_set_tc(dev, 0); + esp_set_tc(dev, 0); esp_log("ESP DMA Finished\n"); esp_raise_irq(dev); } @@ -362,31 +360,31 @@ esp_dma_done(esp_t *dev) static uint32_t esp_get_cmd(esp_t *dev, uint32_t maxlen) { - uint8_t buf[ESP_CMDFIFO_SZ]; + uint8_t buf[ESP_CMDFIFO_SZ]; uint32_t dmalen, n; dev->id = dev->wregs[ESP_WBUSID] & BUSID_DID; if (dev->dma) { dmalen = MIN(esp_get_tc(dev), maxlen); - esp_log("ESP Get data, dmalen = %d\n", dmalen); - if (dmalen == 0) - return 0; - if (dev->mca) { - dma_set_drq(dev->DmaChannel, 1); - while (dev->dma_86c01.pos < dmalen) { - int val = dma_channel_read(dev->DmaChannel); - buf[dev->dma_86c01.pos++] = val & 0xff; - } - dev->dma_86c01.pos = 0; - dma_set_drq(dev->DmaChannel, 0); - } else { - esp_pci_dma_memory_rw(dev, buf, dmalen, WRITE_TO_DEVICE); - dmalen = MIN(fifo8_num_free(&dev->cmdfifo), dmalen); - fifo8_push_all(&dev->cmdfifo, buf, dmalen); - } + esp_log("ESP Get data, dmalen = %d\n", dmalen); + if (dmalen == 0) + return 0; + if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); + while (dev->dma_86c01.pos < dmalen) { + int val = dma_channel_read(dev->DmaChannel); + buf[dev->dma_86c01.pos++] = val & 0xff; + } + dev->dma_86c01.pos = 0; + dma_set_drq(dev->DmaChannel, 0); + } else { + esp_pci_dma_memory_rw(dev, buf, dmalen, WRITE_TO_DEVICE); + dmalen = MIN(fifo8_num_free(&dev->cmdfifo), dmalen); + fifo8_push_all(&dev->cmdfifo, buf, dmalen); + } } else { dmalen = MIN(fifo8_num_used(&dev->fifo), maxlen); - esp_log("ESP Get command, dmalen = %i\n", dmalen); + esp_log("ESP Get command, dmalen = %i\n", dmalen); if (dmalen == 0) { return 0; } @@ -396,7 +394,7 @@ esp_get_cmd(esp_t *dev, uint32_t maxlen) } dev->ti_size = 0; - fifo8_reset(&dev->fifo); + fifo8_reset(&dev->fifo); dev->rregs[ESP_RINTR] |= INTR_FC; dev->rregs[ESP_RSEQ] = SEQ_CD; @@ -407,129 +405,129 @@ esp_get_cmd(esp_t *dev, uint32_t maxlen) static void esp_do_command_phase(esp_t *dev) { - uint32_t cmdlen; - uint8_t buf[ESP_CMDFIFO_SZ]; + uint32_t cmdlen; + uint8_t buf[ESP_CMDFIFO_SZ]; scsi_device_t *sd; sd = &scsi_devices[dev->bus][dev->id]; - sd->buffer_length = -1; + sd->buffer_length = -1; - cmdlen = fifo8_num_used(&dev->cmdfifo); - if (!cmdlen) - return; + cmdlen = fifo8_num_used(&dev->cmdfifo); + if (!cmdlen) + return; - esp_fifo_pop_buf(&dev->cmdfifo, buf, cmdlen); + esp_fifo_pop_buf(&dev->cmdfifo, buf, cmdlen); - for (int i = 0; i < cmdlen; i++) - esp_log("CDB[%i] = %02x\n", i, buf[i]); + for (int i = 0; i < cmdlen; i++) + esp_log("CDB[%i] = %02x\n", i, buf[i]); scsi_device_command_phase0(sd, buf); - dev->buffer_pos = 0; - dev->ti_size = sd->buffer_length; + dev->buffer_pos = 0; + dev->ti_size = sd->buffer_length; dev->xfer_counter = sd->buffer_length; esp_log("ESP SCSI Command = 0x%02x, ID = %d, LUN = %d, len = %d\n", buf[0], dev->id, dev->lun, sd->buffer_length); - fifo8_reset(&dev->cmdfifo); + fifo8_reset(&dev->cmdfifo); if (sd->buffer_length > 0) { - /* This should be set to the underlying device's buffer by command phase 0. */ - dev->rregs[ESP_RSTAT] = STAT_TC; - dev->rregs[ESP_RSEQ] = SEQ_CD; + /* This should be set to the underlying device's buffer by command phase 0. */ + dev->rregs[ESP_RSTAT] = STAT_TC; + dev->rregs[ESP_RSEQ] = SEQ_CD; - if (sd->phase == SCSI_PHASE_DATA_IN) { - dev->rregs[ESP_RSTAT] |= STAT_DI; - esp_log("ESP Data In\n"); - esp_timer_on(dev, sd, scsi_device_get_callback(sd)); - } else if (sd->phase == SCSI_PHASE_DATA_OUT) { - dev->rregs[ESP_RSTAT] |= STAT_DO; - esp_log("ESP Data Out\n"); - dev->ti_size = -sd->buffer_length; - esp_timer_on(dev, sd, scsi_device_get_callback(sd)); - } - esp_log("ESP SCSI Start reading/writing\n"); - esp_do_dma(dev, sd); + if (sd->phase == SCSI_PHASE_DATA_IN) { + dev->rregs[ESP_RSTAT] |= STAT_DI; + esp_log("ESP Data In\n"); + esp_timer_on(dev, sd, scsi_device_get_callback(sd)); + } else if (sd->phase == SCSI_PHASE_DATA_OUT) { + dev->rregs[ESP_RSTAT] |= STAT_DO; + esp_log("ESP Data Out\n"); + dev->ti_size = -sd->buffer_length; + esp_timer_on(dev, sd, scsi_device_get_callback(sd)); + } + esp_log("ESP SCSI Start reading/writing\n"); + esp_do_dma(dev, sd); } else { - esp_log("ESP SCSI Command with no length\n"); - if (dev->mca) { - if (buf[0] == 0x43) { - dev->rregs[ESP_RSTAT] = STAT_DI | STAT_TC; - dev->rregs[ESP_RSEQ] = SEQ_CD; - esp_do_dma(dev, sd); - } else - esp_command_complete(dev, sd->status); - } else - esp_pci_command_complete(dev, sd->status); + esp_log("ESP SCSI Command with no length\n"); + if (dev->mca) { + if (buf[0] == 0x43) { + dev->rregs[ESP_RSTAT] = STAT_DI | STAT_TC; + dev->rregs[ESP_RSEQ] = SEQ_CD; + esp_do_dma(dev, sd); + } else + esp_command_complete(dev, sd->status); + } else + esp_pci_command_complete(dev, sd->status); } scsi_device_identify(sd, SCSI_LUN_USE_CDB); - dev->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; - esp_raise_irq(dev); + dev->rregs[ESP_RINTR] |= INTR_BS | INTR_FC; + esp_raise_irq(dev); } static void esp_do_message_phase(esp_t *dev) { - int len; - uint8_t message; + int len; + uint8_t message; if (dev->cmdfifo_cdb_offset) { - message = esp_fifo_pop(&dev->cmdfifo); + message = esp_fifo_pop(&dev->cmdfifo); - dev->lun = message & 7; + dev->lun = message & 7; dev->cmdfifo_cdb_offset--; - if (scsi_device_present(&scsi_devices[dev->bus][dev->id]) && (dev->lun > 0)) { - /* We only support LUN 0 */ - esp_log("LUN = %i\n", dev->lun); - dev->rregs[ESP_RSTAT] = 0; - dev->rregs[ESP_RINTR] = INTR_DC; - dev->rregs[ESP_RSEQ] = SEQ_0; - esp_raise_irq(dev); - fifo8_reset(&dev->cmdfifo); - return; - } + if (scsi_device_present(&scsi_devices[dev->bus][dev->id]) && (dev->lun > 0)) { + /* We only support LUN 0 */ + esp_log("LUN = %i\n", dev->lun); + dev->rregs[ESP_RSTAT] = 0; + dev->rregs[ESP_RINTR] = INTR_DC; + dev->rregs[ESP_RSEQ] = SEQ_0; + esp_raise_irq(dev); + fifo8_reset(&dev->cmdfifo); + return; + } - scsi_device_identify(&scsi_devices[dev->bus][dev->id], dev->lun); + scsi_device_identify(&scsi_devices[dev->bus][dev->id], dev->lun); } - esp_log("CDB offset = %i\n", dev->cmdfifo_cdb_offset); + esp_log("CDB offset = %i\n", dev->cmdfifo_cdb_offset); - if (dev->cmdfifo_cdb_offset) { - len = MIN(dev->cmdfifo_cdb_offset, fifo8_num_used(&dev->cmdfifo)); + if (dev->cmdfifo_cdb_offset) { + len = MIN(dev->cmdfifo_cdb_offset, fifo8_num_used(&dev->cmdfifo)); esp_fifo_pop_buf(&dev->cmdfifo, NULL, len); dev->cmdfifo_cdb_offset = 0; - } + } } static void esp_do_cmd(esp_t *dev) { - esp_do_message_phase(dev); - if (dev->cmdfifo_cdb_offset == 0) - esp_do_command_phase(dev); + esp_do_message_phase(dev); + if (dev->cmdfifo_cdb_offset == 0) + esp_do_command_phase(dev); } static void esp_dma_enable(esp_t *dev, int level) { if (level) { - esp_log("ESP DMA Enabled\n"); - dev->dma_enabled = 1; - dev->dma_86c01.status |= 0x02; - if ((dev->rregs[ESP_CMD] & CMD_CMD) != CMD_TI) { - timer_on_auto(&dev->timer, 40.0); - } else { - esp_log("Period = %lf\n", dev->period); - timer_on_auto(&dev->timer, dev->period); - } + esp_log("ESP DMA Enabled\n"); + dev->dma_enabled = 1; + dev->dma_86c01.status |= 0x02; + if ((dev->rregs[ESP_CMD] & CMD_CMD) != CMD_TI) { + timer_on_auto(&dev->timer, 40.0); + } else { + esp_log("Period = %lf\n", dev->period); + timer_on_auto(&dev->timer, dev->period); + } } else { - esp_log("ESP DMA Disabled\n"); - dev->dma_enabled = 0; - dev->dma_86c01.status &= ~0x02; + esp_log("ESP DMA Disabled\n"); + dev->dma_enabled = 0; + dev->dma_86c01.status &= ~0x02; } } @@ -539,11 +537,11 @@ esp_hard_reset(esp_t *dev) memset(dev->rregs, 0, ESP_REGS); memset(dev->wregs, 0, ESP_REGS); dev->tchi_written = 0; - dev->ti_size = 0; + dev->ti_size = 0; fifo8_reset(&dev->fifo); - fifo8_reset(&dev->cmdfifo); - dev->dma = 0; - dev->do_cmd = 0; + fifo8_reset(&dev->cmdfifo); + dev->dma = 0; + dev->do_cmd = 0; dev->rregs[ESP_CFG1] = dev->mca ? dev->HostID : 7; esp_log("ESP Reset\n"); timer_stop(&dev->timer); @@ -557,263 +555,262 @@ esp_do_nodma(esp_t *dev, scsi_device_t *sd) esp_log("ESP SCSI Actual FIFO len = %d\n", dev->xfer_counter); if (dev->do_cmd) { - esp_log("ESP Command on FIFO\n"); - dev->ti_size = 0; + esp_log("ESP Command on FIFO\n"); + dev->ti_size = 0; - if ((dev->rregs[ESP_RSTAT] & 7) == STAT_CD) { - if (dev->cmdfifo_cdb_offset == fifo8_num_used(&dev->cmdfifo)) { - esp_log("CDB offset = %i used return\n", dev->cmdfifo_cdb_offset); - return; - } + if ((dev->rregs[ESP_RSTAT] & 7) == STAT_CD) { + if (dev->cmdfifo_cdb_offset == fifo8_num_used(&dev->cmdfifo)) { + esp_log("CDB offset = %i used return\n", dev->cmdfifo_cdb_offset); + return; + } - dev->do_cmd = 0; - esp_do_cmd(dev); - } else { - dev->cmdfifo_cdb_offset = fifo8_num_used(&dev->cmdfifo);; - esp_log("CDB offset = %i used\n", dev->cmdfifo_cdb_offset); + dev->do_cmd = 0; + esp_do_cmd(dev); + } else { + dev->cmdfifo_cdb_offset = fifo8_num_used(&dev->cmdfifo); + ; + esp_log("CDB offset = %i used\n", dev->cmdfifo_cdb_offset); - dev->rregs[ESP_RSTAT] = STAT_TC | STAT_CD; - dev->rregs[ESP_RSEQ] = SEQ_CD; - dev->rregs[ESP_RINTR] |= INTR_BS; - esp_raise_irq(dev); - } - return; + dev->rregs[ESP_RSTAT] = STAT_TC | STAT_CD; + dev->rregs[ESP_RSEQ] = SEQ_CD; + dev->rregs[ESP_RINTR] |= INTR_BS; + esp_raise_irq(dev); + } + return; } if (dev->xfer_counter == 0) { - /* Wait until data is available. */ - esp_log("(ID=%02i LUN=%02i): FIFO no data available\n", dev->id, dev->lun); - return; + /* Wait until data is available. */ + esp_log("(ID=%02i LUN=%02i): FIFO no data available\n", dev->id, dev->lun); + return; } esp_log("ESP FIFO = %d, buffer length = %d\n", dev->xfer_counter, sd->buffer_length); if (sd->phase == SCSI_PHASE_DATA_IN) { - if (fifo8_is_empty(&dev->fifo)) { - fifo8_push(&dev->fifo, sd->sc->temp_buffer[dev->buffer_pos]); - dev->buffer_pos++; - dev->ti_size--; - dev->xfer_counter--; - } + if (fifo8_is_empty(&dev->fifo)) { + fifo8_push(&dev->fifo, sd->sc->temp_buffer[dev->buffer_pos]); + dev->buffer_pos++; + dev->ti_size--; + dev->xfer_counter--; + } } else if (sd->phase == SCSI_PHASE_DATA_OUT) { count = MIN(fifo8_num_used(&dev->fifo), ESP_FIFO_SZ); esp_fifo_pop_buf(&dev->fifo, sd->sc->temp_buffer + dev->buffer_pos, count); - dev->buffer_pos += count; - dev->ti_size += count; - dev->xfer_counter -= count; + dev->buffer_pos += count; + dev->ti_size += count; + dev->xfer_counter -= count; } esp_log("ESP FIFO Transfer bytes = %d\n", dev->xfer_counter); if (dev->xfer_counter <= 0) { - if (sd->phase == SCSI_PHASE_DATA_OUT) { - if (dev->ti_size < 0) { - esp_log("ESP FIFO Keep writing\n"); - esp_do_nodma(dev, sd); - } else { - esp_log("ESP FIFO Write finished\n"); - scsi_device_command_phase1(sd); - if (dev->mca) { - esp_command_complete(dev, sd->status); - } else - esp_pci_command_complete(dev, sd->status); - } - } else if (sd->phase == SCSI_PHASE_DATA_IN) { - /* If there is still data to be read from the device then - complete the DMA operation immediately. Otherwise defer - until the scsi layer has completed. */ - if (dev->ti_size <= 0) { - esp_log("ESP FIFO Read finished\n"); - scsi_device_command_phase1(sd); - if (dev->mca) { - esp_command_complete(dev, sd->status); - } else - esp_pci_command_complete(dev, sd->status); - } else { - esp_log("ESP FIFO Keep reading\n"); - esp_do_nodma(dev, sd); - } - } + if (sd->phase == SCSI_PHASE_DATA_OUT) { + if (dev->ti_size < 0) { + esp_log("ESP FIFO Keep writing\n"); + esp_do_nodma(dev, sd); + } else { + esp_log("ESP FIFO Write finished\n"); + scsi_device_command_phase1(sd); + if (dev->mca) { + esp_command_complete(dev, sd->status); + } else + esp_pci_command_complete(dev, sd->status); + } + } else if (sd->phase == SCSI_PHASE_DATA_IN) { + /* If there is still data to be read from the device then + complete the DMA operation immediately. Otherwise defer + until the scsi layer has completed. */ + if (dev->ti_size <= 0) { + esp_log("ESP FIFO Read finished\n"); + scsi_device_command_phase1(sd); + if (dev->mca) { + esp_command_complete(dev, sd->status); + } else + esp_pci_command_complete(dev, sd->status); + } else { + esp_log("ESP FIFO Keep reading\n"); + esp_do_nodma(dev, sd); + } + } } else { - /* Partially filled a scsi buffer. Complete immediately. */ - esp_log("ESP SCSI Partially filled the FIFO buffer\n"); - dev->rregs[ESP_RINTR] |= INTR_BS; - esp_raise_irq(dev); + /* Partially filled a scsi buffer. Complete immediately. */ + esp_log("ESP SCSI Partially filled the FIFO buffer\n"); + dev->rregs[ESP_RINTR] |= INTR_BS; + esp_raise_irq(dev); } } - static void esp_do_dma(esp_t *dev, scsi_device_t *sd) { - uint8_t buf[ESP_CMDFIFO_SZ]; + uint8_t buf[ESP_CMDFIFO_SZ]; uint32_t tdbc; - int count; + int count; esp_log("ESP SCSI Actual DMA len = %d\n", esp_get_tc(dev)); if (!scsi_device_present(sd)) { - esp_log("ESP SCSI no devices on ID %d, LUN %d\n", dev->id, dev->lun); + esp_log("ESP SCSI no devices on ID %d, LUN %d\n", dev->id, dev->lun); /* No such drive */ dev->rregs[ESP_RSTAT] = 0; dev->rregs[ESP_RINTR] = INTR_DC; - dev->rregs[ESP_RSEQ] = SEQ_0; - esp_raise_irq(dev); - fifo8_reset(&dev->cmdfifo); - return; + dev->rregs[ESP_RSEQ] = SEQ_0; + esp_raise_irq(dev); + fifo8_reset(&dev->cmdfifo); + return; } else { - esp_log("ESP SCSI device found on ID %d, LUN %d\n", dev->id, dev->lun); + esp_log("ESP SCSI device found on ID %d, LUN %d\n", dev->id, dev->lun); } count = tdbc = esp_get_tc(dev); - if (dev->mca) { /*See the comment in the esp_do_busid_cmd() function.*/ - if (sd->buffer_length < 0) { - if (dev->dma_enabled) - goto done; - else - goto partial; - } - } + if (dev->mca) { /*See the comment in the esp_do_busid_cmd() function.*/ + if (sd->buffer_length < 0) { + if (dev->dma_enabled) + goto done; + else + goto partial; + } + } if (dev->do_cmd) { - esp_log("ESP Command on DMA\n"); - count = MIN(count, fifo8_num_free(&dev->cmdfifo)); - if (dev->mca) { - dma_set_drq(dev->DmaChannel, 1); - while (dev->dma_86c01.pos < count) { - dma_channel_write(dev->DmaChannel, buf[dev->dma_86c01.pos]); - dev->dma_86c01.pos++; - } - dev->dma_86c01.pos = 0; - dma_set_drq(dev->DmaChannel, 0); - } else - esp_pci_dma_memory_rw(dev, buf, count, READ_FROM_DEVICE); - fifo8_push_all(&dev->cmdfifo, buf, count); - dev->ti_size = 0; + esp_log("ESP Command on DMA\n"); + count = MIN(count, fifo8_num_free(&dev->cmdfifo)); + if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); + while (dev->dma_86c01.pos < count) { + dma_channel_write(dev->DmaChannel, buf[dev->dma_86c01.pos]); + dev->dma_86c01.pos++; + } + dev->dma_86c01.pos = 0; + dma_set_drq(dev->DmaChannel, 0); + } else + esp_pci_dma_memory_rw(dev, buf, count, READ_FROM_DEVICE); + fifo8_push_all(&dev->cmdfifo, buf, count); + dev->ti_size = 0; - if ((dev->rregs[ESP_RSTAT] & 7) == STAT_CD) { - if (dev->cmdfifo_cdb_offset == fifo8_num_used(&dev->cmdfifo)) - return; + if ((dev->rregs[ESP_RSTAT] & 7) == STAT_CD) { + if (dev->cmdfifo_cdb_offset == fifo8_num_used(&dev->cmdfifo)) + return; - dev->do_cmd = 0; - esp_do_cmd(dev); - } else { - dev->cmdfifo_cdb_offset = fifo8_num_used(&dev->cmdfifo); + dev->do_cmd = 0; + esp_do_cmd(dev); + } else { + dev->cmdfifo_cdb_offset = fifo8_num_used(&dev->cmdfifo); - dev->rregs[ESP_RSTAT] = STAT_TC | STAT_CD; - dev->rregs[ESP_RSEQ] = SEQ_CD; - dev->rregs[ESP_RINTR] |= INTR_BS; - esp_raise_irq(dev); - } - return; + dev->rregs[ESP_RSTAT] = STAT_TC | STAT_CD; + dev->rregs[ESP_RSEQ] = SEQ_CD; + dev->rregs[ESP_RINTR] |= INTR_BS; + esp_raise_irq(dev); + } + return; } if (dev->xfer_counter == 0) { - /* Wait until data is available. */ - esp_log("(ID=%02i LUN=%02i): DMA no data available\n", dev->id, dev->lun); - return; + /* Wait until data is available. */ + esp_log("(ID=%02i LUN=%02i): DMA no data available\n", dev->id, dev->lun); + return; } esp_log("ESP SCSI dmaleft = %d, async_len = %i, buffer length = %d\n", esp_get_tc(dev), sd->buffer_length); /* Make sure count is never bigger than buffer_length. */ if (count > dev->xfer_counter) - count = dev->xfer_counter; + count = dev->xfer_counter; if (sd->phase == SCSI_PHASE_DATA_IN) { - esp_log("ESP SCSI Read, dma cnt = %i, ti size = %i, positive len = %i\n", esp_get_tc(dev), dev->ti_size, count); - if (dev->mca) { - dma_set_drq(dev->DmaChannel, 1); - while (dev->dma_86c01.pos < count) { - dma_channel_write(dev->DmaChannel, sd->sc->temp_buffer[dev->buffer_pos + dev->dma_86c01.pos]); - esp_log("ESP SCSI DMA read for 53C90: pos = %i, val = %02x\n", dev->dma_86c01.pos, sd->sc->temp_buffer[dev->buffer_pos + dev->dma_86c01.pos]); - dev->dma_86c01.pos++; - } - dev->dma_86c01.pos = 0; - dma_set_drq(dev->DmaChannel, 0); - } else { - esp_pci_dma_memory_rw(dev, sd->sc->temp_buffer + dev->buffer_pos, count, READ_FROM_DEVICE); - } + esp_log("ESP SCSI Read, dma cnt = %i, ti size = %i, positive len = %i\n", esp_get_tc(dev), dev->ti_size, count); + if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); + while (dev->dma_86c01.pos < count) { + dma_channel_write(dev->DmaChannel, sd->sc->temp_buffer[dev->buffer_pos + dev->dma_86c01.pos]); + esp_log("ESP SCSI DMA read for 53C90: pos = %i, val = %02x\n", dev->dma_86c01.pos, sd->sc->temp_buffer[dev->buffer_pos + dev->dma_86c01.pos]); + dev->dma_86c01.pos++; + } + dev->dma_86c01.pos = 0; + dma_set_drq(dev->DmaChannel, 0); + } else { + esp_pci_dma_memory_rw(dev, sd->sc->temp_buffer + dev->buffer_pos, count, READ_FROM_DEVICE); + } } else if (sd->phase == SCSI_PHASE_DATA_OUT) { - esp_log("ESP SCSI Write, negative len = %i, ti size = %i, dma cnt = %i\n", count, -dev->ti_size, esp_get_tc(dev)); - if (dev->mca) { - dma_set_drq(dev->DmaChannel, 1); - while (dev->dma_86c01.pos < count) { - int val = dma_channel_read(dev->DmaChannel); - esp_log("ESP SCSI DMA write for 53C90: pos = %i, val = %02x\n", dev->dma_86c01.pos, val & 0xff); - sd->sc->temp_buffer[dev->buffer_pos + dev->dma_86c01.pos] = val & 0xff; - dev->dma_86c01.pos++; - } - dma_set_drq(dev->DmaChannel, 0); - dev->dma_86c01.pos = 0; - } else - esp_pci_dma_memory_rw(dev, sd->sc->temp_buffer + dev->buffer_pos, count, WRITE_TO_DEVICE); + esp_log("ESP SCSI Write, negative len = %i, ti size = %i, dma cnt = %i\n", count, -dev->ti_size, esp_get_tc(dev)); + if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); + while (dev->dma_86c01.pos < count) { + int val = dma_channel_read(dev->DmaChannel); + esp_log("ESP SCSI DMA write for 53C90: pos = %i, val = %02x\n", dev->dma_86c01.pos, val & 0xff); + sd->sc->temp_buffer[dev->buffer_pos + dev->dma_86c01.pos] = val & 0xff; + dev->dma_86c01.pos++; + } + dma_set_drq(dev->DmaChannel, 0); + dev->dma_86c01.pos = 0; + } else + esp_pci_dma_memory_rw(dev, sd->sc->temp_buffer + dev->buffer_pos, count, WRITE_TO_DEVICE); } - esp_set_tc(dev, esp_get_tc(dev) - count); + esp_set_tc(dev, esp_get_tc(dev) - count); dev->buffer_pos += count; dev->xfer_counter -= count; if (sd->phase == SCSI_PHASE_DATA_IN) { - dev->ti_size -= count; + dev->ti_size -= count; } else if (sd->phase == SCSI_PHASE_DATA_OUT) { - dev->ti_size += count; + dev->ti_size += count; } esp_log("ESP SCSI Transfer bytes = %d\n", dev->xfer_counter); if (dev->xfer_counter <= 0) { - if (sd->phase == SCSI_PHASE_DATA_OUT) { - if (dev->ti_size < 0) { - esp_log("ESP SCSI Keep writing\n"); - esp_do_dma(dev, sd); - } else { - esp_log("ESP SCSI Write finished\n"); - scsi_device_command_phase1(sd); - if (dev->mca) { - esp_command_complete(dev, sd->status); - } else - esp_pci_command_complete(dev, sd->status); - } - } else if (sd->phase == SCSI_PHASE_DATA_IN) { - /* If there is still data to be read from the device then - complete the DMA operation immediately. Otherwise defer - until the scsi layer has completed. */ - if (dev->ti_size <= 0) { + if (sd->phase == SCSI_PHASE_DATA_OUT) { + if (dev->ti_size < 0) { + esp_log("ESP SCSI Keep writing\n"); + esp_do_dma(dev, sd); + } else { + esp_log("ESP SCSI Write finished\n"); + scsi_device_command_phase1(sd); + if (dev->mca) { + esp_command_complete(dev, sd->status); + } else + esp_pci_command_complete(dev, sd->status); + } + } else if (sd->phase == SCSI_PHASE_DATA_IN) { + /* If there is still data to be read from the device then + complete the DMA operation immediately. Otherwise defer + until the scsi layer has completed. */ + if (dev->ti_size <= 0) { done: - esp_log("ESP SCSI Read finished\n"); - scsi_device_command_phase1(sd); - if (dev->mca) { - esp_command_complete(dev, sd->status); - } else - esp_pci_command_complete(dev, sd->status); - } else { - esp_log("ESP SCSI Keep reading\n"); - esp_do_dma(dev, sd); - } - } + esp_log("ESP SCSI Read finished\n"); + scsi_device_command_phase1(sd); + if (dev->mca) { + esp_command_complete(dev, sd->status); + } else + esp_pci_command_complete(dev, sd->status); + } else { + esp_log("ESP SCSI Keep reading\n"); + esp_do_dma(dev, sd); + } + } } else { - /* Partially filled a scsi buffer. Complete immediately. */ + /* Partially filled a scsi buffer. Complete immediately. */ partial: - esp_log("ESP SCSI Partially filled the SCSI buffer\n"); - esp_dma_done(dev); + esp_log("ESP SCSI Partially filled the SCSI buffer\n"); + esp_dma_done(dev); } } - static void esp_report_command_complete(esp_t *dev, uint32_t status) { esp_log("ESP Command complete\n"); - dev->ti_size = 0; - dev->status = status; + dev->ti_size = 0; + dev->status = status; dev->rregs[ESP_RSTAT] = STAT_TC | STAT_ST; - esp_dma_done(dev); + esp_dma_done(dev); } /* Callback to indicate that the SCSI layer has completed a command. */ static void esp_command_complete(void *priv, uint32_t status) { - esp_t *dev = (esp_t *)priv; + esp_t *dev = (esp_t *) priv; esp_report_command_complete(dev, status); } @@ -821,7 +818,7 @@ esp_command_complete(void *priv, uint32_t status) static void esp_pci_command_complete(void *priv, uint32_t status) { - esp_t *dev = (esp_t *)priv; + esp_t *dev = (esp_t *) priv; esp_command_complete(dev, status); dev->dma_regs[DMA_WBC] = 0; @@ -831,121 +828,121 @@ esp_pci_command_complete(void *priv, uint32_t status) static void esp_timer_on(esp_t *dev, scsi_device_t *sd, double p) { - if (dev->mca) { - /* Normal SCSI: 5000000 bytes per second */ - dev->period = (p > 0.0) ? p : (((double) sd->buffer_length) * 0.2); - } else { - /* Fast SCSI: 10000000 bytes per second */ - dev->period = (p > 0.0) ? p : (((double) sd->buffer_length) * 0.1); - } + if (dev->mca) { + /* Normal SCSI: 5000000 bytes per second */ + dev->period = (p > 0.0) ? p : (((double) sd->buffer_length) * 0.2); + } else { + /* Fast SCSI: 10000000 bytes per second */ + dev->period = (p > 0.0) ? p : (((double) sd->buffer_length) * 0.1); + } - timer_on_auto(&dev->timer, dev->period + 40.0); + timer_on_auto(&dev->timer, dev->period + 40.0); } static void handle_ti(void *priv) { - esp_t *dev = (esp_t *)priv; - scsi_device_t *sd = &scsi_devices[dev->bus][dev->id]; + esp_t *dev = (esp_t *) priv; + scsi_device_t *sd = &scsi_devices[dev->bus][dev->id]; if (dev->dma) { - esp_log("ESP Handle TI, do data, minlen = %i\n", esp_get_tc(dev)); - esp_do_dma(dev, sd); + esp_log("ESP Handle TI, do data, minlen = %i\n", esp_get_tc(dev)); + esp_do_dma(dev, sd); } else { - esp_log("ESP Handle TI, do nodma, minlen = %i\n", dev->xfer_counter); - esp_do_nodma(dev, sd); + esp_log("ESP Handle TI, do nodma, minlen = %i\n", dev->xfer_counter); + esp_do_nodma(dev, sd); } } static void handle_s_without_atn(void *priv) { - esp_t *dev = (esp_t *)priv; - int len; + esp_t *dev = (esp_t *) priv; + int len; len = esp_get_cmd(dev, ESP_CMDFIFO_SZ); esp_log("ESP SEL w/o ATN len = %d, id = %d\n", len, dev->id); if (len > 0) { - dev->cmdfifo_cdb_offset = 0; - dev->do_cmd = 0; - esp_do_cmd(dev); + dev->cmdfifo_cdb_offset = 0; + dev->do_cmd = 0; + esp_do_cmd(dev); } else if (len == 0) { - dev->do_cmd = 1; + dev->do_cmd = 1; /* Target present, but no cmd yet - switch to command phase */ - dev->rregs[ESP_RSEQ] = SEQ_CD; + dev->rregs[ESP_RSEQ] = SEQ_CD; dev->rregs[ESP_RSTAT] = STAT_CD; - } + } } static void handle_satn(void *priv) { - esp_t *dev = (esp_t *)priv; - int len; + esp_t *dev = (esp_t *) priv; + int len; len = esp_get_cmd(dev, ESP_CMDFIFO_SZ); esp_log("ESP SEL with ATN len = %d, id = %d\n", len, dev->id); if (len > 0) { - dev->cmdfifo_cdb_offset = 1; - dev->do_cmd = 0; - esp_do_cmd(dev); + dev->cmdfifo_cdb_offset = 1; + dev->do_cmd = 0; + esp_do_cmd(dev); } else if (len == 0) { - dev->do_cmd = 1; - /* Target present, but no cmd yet - switch to command phase */ - dev->rregs[ESP_RSEQ] = SEQ_CD; - dev->rregs[ESP_RSTAT] = STAT_CD; - } + dev->do_cmd = 1; + /* Target present, but no cmd yet - switch to command phase */ + dev->rregs[ESP_RSEQ] = SEQ_CD; + dev->rregs[ESP_RSTAT] = STAT_CD; + } } static void handle_satn_stop(void *priv) { - esp_t *dev = (esp_t *)priv; - int cmdlen; + esp_t *dev = (esp_t *) priv; + int cmdlen; cmdlen = esp_get_cmd(dev, 1); if (cmdlen > 0) { - dev->do_cmd = 1; - dev->cmdfifo_cdb_offset = 1; - dev->rregs[ESP_RSTAT] = STAT_MO; - dev->rregs[ESP_RINTR] = INTR_BS | INTR_FC; - dev->rregs[ESP_RSEQ] = SEQ_MO; - esp_log("ESP SCSI Command len = %d, raising IRQ\n", cmdlen); - esp_raise_irq(dev); + dev->do_cmd = 1; + dev->cmdfifo_cdb_offset = 1; + dev->rregs[ESP_RSTAT] = STAT_MO; + dev->rregs[ESP_RINTR] = INTR_BS | INTR_FC; + dev->rregs[ESP_RSEQ] = SEQ_MO; + esp_log("ESP SCSI Command len = %d, raising IRQ\n", cmdlen); + esp_raise_irq(dev); } else if (cmdlen == 0) { - dev->do_cmd = 1; - /* Target present, switch to message out phase */ - dev->rregs[ESP_RSEQ] = SEQ_MO; - dev->rregs[ESP_RSTAT] = STAT_MO; - } + dev->do_cmd = 1; + /* Target present, switch to message out phase */ + dev->rregs[ESP_RSEQ] = SEQ_MO; + dev->rregs[ESP_RSTAT] = STAT_MO; + } } static void esp_write_response(esp_t *dev) { - uint8_t buf[2]; + uint8_t buf[2]; buf[0] = dev->status; buf[1] = 0; if (dev->dma) { - if (dev->mca) { - dma_set_drq(dev->DmaChannel, 1); - while (dev->dma_86c01.pos < 2) { - int val = dma_channel_read(dev->DmaChannel); - buf[dev->dma_86c01.pos++] = val & 0xff; - } - dev->dma_86c01.pos = 0; - dma_set_drq(dev->DmaChannel, 0); - } else - esp_pci_dma_memory_rw(dev, buf, 2, WRITE_TO_DEVICE); - dev->rregs[ESP_RSTAT] = STAT_TC | STAT_ST; - dev->rregs[ESP_RINTR] = INTR_BS | INTR_FC; - dev->rregs[ESP_RSEQ] = SEQ_CD; + if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); + while (dev->dma_86c01.pos < 2) { + int val = dma_channel_read(dev->DmaChannel); + buf[dev->dma_86c01.pos++] = val & 0xff; + } + dev->dma_86c01.pos = 0; + dma_set_drq(dev->DmaChannel, 0); + } else + esp_pci_dma_memory_rw(dev, buf, 2, WRITE_TO_DEVICE); + dev->rregs[ESP_RSTAT] = STAT_TC | STAT_ST; + dev->rregs[ESP_RINTR] = INTR_BS | INTR_FC; + dev->rregs[ESP_RSEQ] = SEQ_CD; } else { - fifo8_reset(&dev->fifo); - fifo8_push_all(&dev->fifo, buf, 2); - dev->rregs[ESP_RFLAGS] = 2; + fifo8_reset(&dev->fifo); + fifo8_push_all(&dev->fifo, buf, 2); + dev->rregs[ESP_RFLAGS] = 2; } esp_log("ESP SCSI ICCS IRQ\n"); esp_raise_irq(dev); @@ -957,234 +954,231 @@ esp_callback(void *p) esp_t *dev = (esp_t *) p; if (dev->dma_enabled || dev->do_cmd) { - if ((dev->rregs[ESP_CMD] & CMD_CMD) == CMD_TI) { - esp_log("ESP SCSI Handle TI Callback\n"); - handle_ti(dev); - } + if ((dev->rregs[ESP_CMD] & CMD_CMD) == CMD_TI) { + esp_log("ESP SCSI Handle TI Callback\n"); + handle_ti(dev); + } } - esp_log("ESP DMA activated = %d, CMD activated = %d\n", dev->dma_enabled, dev->do_cmd); + esp_log("ESP DMA activated = %d, CMD activated = %d\n", dev->dma_enabled, dev->do_cmd); } static uint32_t esp_reg_read(esp_t *dev, uint32_t saddr) { - uint32_t ret; + uint32_t ret; switch (saddr) { - case ESP_FIFO: - if ((dev->rregs[ESP_RSTAT] & 7) == STAT_DI) { - if (dev->ti_size) { - esp_log("TI size FIFO = %i\n", dev->ti_size); - esp_do_nodma(dev, &scsi_devices[dev->bus][dev->id]); - } else { - /* - * The last byte of a non-DMA transfer has been read out - * of the FIFO so switch to status phase - */ - dev->rregs[ESP_RSTAT] = STAT_TC | STAT_ST; - } - } - - dev->rregs[ESP_FIFO] = esp_fifo_pop(&dev->fifo); - ret = dev->rregs[ESP_FIFO]; - break; - case ESP_RINTR: - /* Clear sequence step, interrupt register and all status bits - except TC */ - ret = dev->rregs[ESP_RINTR]; - dev->rregs[ESP_RINTR] = 0; - dev->rregs[ESP_RSTAT] &= ~STAT_TC; - esp_log("ESP SCSI Clear sequence step\n"); - esp_lower_irq(dev); - esp_log("ESP RINTR read old val = %02x\n", ret); - break; - case ESP_TCHI: - /* Return the unique id if the value has never been written */ - if (!dev->tchi_written && !dev->mca) { - esp_log("ESP TCHI read id 0x12\n"); - ret = TCHI_AM53C974; - } else - ret = dev->rregs[saddr]; - break; - case ESP_RFLAGS: - ret = fifo8_num_used(&dev->fifo); - break; - default: - ret = dev->rregs[saddr]; - break; + case ESP_FIFO: + if ((dev->rregs[ESP_RSTAT] & 7) == STAT_DI) { + if (dev->ti_size) { + esp_log("TI size FIFO = %i\n", dev->ti_size); + esp_do_nodma(dev, &scsi_devices[dev->bus][dev->id]); + } else { + /* + * The last byte of a non-DMA transfer has been read out + * of the FIFO so switch to status phase + */ + dev->rregs[ESP_RSTAT] = STAT_TC | STAT_ST; + } + } + dev->rregs[ESP_FIFO] = esp_fifo_pop(&dev->fifo); + ret = dev->rregs[ESP_FIFO]; + break; + case ESP_RINTR: + /* Clear sequence step, interrupt register and all status bits + except TC */ + ret = dev->rregs[ESP_RINTR]; + dev->rregs[ESP_RINTR] = 0; + dev->rregs[ESP_RSTAT] &= ~STAT_TC; + esp_log("ESP SCSI Clear sequence step\n"); + esp_lower_irq(dev); + esp_log("ESP RINTR read old val = %02x\n", ret); + break; + case ESP_TCHI: + /* Return the unique id if the value has never been written */ + if (!dev->tchi_written && !dev->mca) { + esp_log("ESP TCHI read id 0x12\n"); + ret = TCHI_AM53C974; + } else + ret = dev->rregs[saddr]; + break; + case ESP_RFLAGS: + ret = fifo8_num_used(&dev->fifo); + break; + default: + ret = dev->rregs[saddr]; + break; } esp_log("Read reg %02x = %02x\n", saddr, ret); return ret; } - static void esp_reg_write(esp_t *dev, uint32_t saddr, uint32_t val) { esp_log("Write reg %02x = %02x\n", saddr, val); switch (saddr) { - case ESP_TCHI: - dev->tchi_written = 1; - /* fall through */ - case ESP_TCLO: - case ESP_TCMID: - esp_log("Transfer count regs %02x = %i\n", saddr, val); - dev->rregs[ESP_RSTAT] &= ~STAT_TC; - break; - case ESP_FIFO: - if (dev->do_cmd) { - esp_fifo_push(&dev->cmdfifo, val); - esp_log("ESP CmdVal = %02x\n", val); - /* - * If any unexpected message out/command phase data is - * transferred using non-DMA, raise the interrupt - */ - if (dev->rregs[ESP_CMD] == CMD_TI) { - dev->rregs[ESP_RINTR] |= INTR_BS; - esp_raise_irq(dev); + case ESP_TCHI: + dev->tchi_written = 1; + /* fall through */ + case ESP_TCLO: + case ESP_TCMID: + esp_log("Transfer count regs %02x = %i\n", saddr, val); + dev->rregs[ESP_RSTAT] &= ~STAT_TC; + break; + case ESP_FIFO: + if (dev->do_cmd) { + esp_fifo_push(&dev->cmdfifo, val); + esp_log("ESP CmdVal = %02x\n", val); + /* + * If any unexpected message out/command phase data is + * transferred using non-DMA, raise the interrupt + */ + if (dev->rregs[ESP_CMD] == CMD_TI) { + dev->rregs[ESP_RINTR] |= INTR_BS; + esp_raise_irq(dev); + } + } else { + esp_fifo_push(&dev->fifo, val); + esp_log("ESP fifoval = %02x\n", val); } - } else { - esp_fifo_push(&dev->fifo, val); - esp_log("ESP fifoval = %02x\n", val); - } - break; - case ESP_CMD: - dev->rregs[saddr] = val; + break; + case ESP_CMD: + dev->rregs[saddr] = val; - if (val & CMD_DMA) { - dev->dma = 1; - /* Reload DMA counter. */ - esp_set_tc(dev, esp_get_stc(dev)); - if (dev->mca) - esp_dma_enable(dev, 1); - } else { - dev->dma = 0; - esp_log("ESP Command not for DMA\n"); - if (dev->mca) - esp_dma_enable(dev, 0); - } - esp_log("[%04X:%08X]: ESP Command = %02x, DMA ena1 = %d, DMA ena2 = %d\n", CS, cpu_state.pc, val & (CMD_CMD|CMD_DMA), dev->dma, dev->dma_enabled); - switch (val & CMD_CMD) { - case CMD_NOP: - break; - case CMD_FLUSH: - fifo8_reset(&dev->fifo); - timer_on_auto(&dev->timer, 10.0); - break; - case CMD_RESET: - if (dev->mca) { - esp_lower_irq(dev); - esp_hard_reset(dev); - } else - esp_pci_soft_reset(dev); - break; - case CMD_BUSRESET: - if (!(dev->wregs[ESP_CFG1] & CFG1_RESREPT)) { - dev->rregs[ESP_RINTR] |= INTR_RST; - esp_log("ESP Bus Reset with IRQ\n"); - esp_raise_irq(dev); - } - break; - case CMD_TI: - break; - case CMD_SEL: - handle_s_without_atn(dev); - break; - case CMD_SELATN: - handle_satn(dev); - break; - case CMD_SELATNS: - handle_satn_stop(dev); - break; - case CMD_ICCS: - esp_write_response(dev); - dev->rregs[ESP_RINTR] |= INTR_FC; - dev->rregs[ESP_RSTAT] |= STAT_MI; - break; - case CMD_MSGACC: - dev->rregs[ESP_RINTR] |= INTR_DC; - dev->rregs[ESP_RSEQ] = 0; - dev->rregs[ESP_RFLAGS] = 0; - esp_log("ESP SCSI MSGACC IRQ\n"); - esp_raise_irq(dev); - break; - case CMD_PAD: - dev->rregs[ESP_RSTAT] = STAT_TC; - dev->rregs[ESP_RINTR] |= INTR_FC; - dev->rregs[ESP_RSEQ] = 0; - esp_log("ESP Transfer Pad\n"); - break; - case CMD_SATN: - case CMD_RSTATN: - break; - case CMD_ENSEL: - dev->rregs[ESP_RINTR] = 0; - esp_log("ESP Enable Selection, do cmd = %d\n", dev->do_cmd); - break; - case CMD_DISSEL: - dev->rregs[ESP_RINTR] = 0; - esp_log("ESP Disable Selection\n"); - esp_raise_irq(dev); - break; - } - break; - case ESP_WBUSID: - case ESP_WSEL: - case ESP_WSYNTP: - case ESP_WSYNO: - break; - case ESP_CFG1: - case ESP_CFG2: - case ESP_CFG3: - case ESP_RES3: - case ESP_RES4: - dev->rregs[saddr] = val; - break; - case ESP_WCCF: - case ESP_WTEST: - break; - default: - esp_log("Unhandled writeb 0x%x = 0x%x\n", saddr, val); - break; + if (val & CMD_DMA) { + dev->dma = 1; + /* Reload DMA counter. */ + esp_set_tc(dev, esp_get_stc(dev)); + if (dev->mca) + esp_dma_enable(dev, 1); + } else { + dev->dma = 0; + esp_log("ESP Command not for DMA\n"); + if (dev->mca) + esp_dma_enable(dev, 0); + } + esp_log("[%04X:%08X]: ESP Command = %02x, DMA ena1 = %d, DMA ena2 = %d\n", CS, cpu_state.pc, val & (CMD_CMD | CMD_DMA), dev->dma, dev->dma_enabled); + switch (val & CMD_CMD) { + case CMD_NOP: + break; + case CMD_FLUSH: + fifo8_reset(&dev->fifo); + timer_on_auto(&dev->timer, 10.0); + break; + case CMD_RESET: + if (dev->mca) { + esp_lower_irq(dev); + esp_hard_reset(dev); + } else + esp_pci_soft_reset(dev); + break; + case CMD_BUSRESET: + if (!(dev->wregs[ESP_CFG1] & CFG1_RESREPT)) { + dev->rregs[ESP_RINTR] |= INTR_RST; + esp_log("ESP Bus Reset with IRQ\n"); + esp_raise_irq(dev); + } + break; + case CMD_TI: + break; + case CMD_SEL: + handle_s_without_atn(dev); + break; + case CMD_SELATN: + handle_satn(dev); + break; + case CMD_SELATNS: + handle_satn_stop(dev); + break; + case CMD_ICCS: + esp_write_response(dev); + dev->rregs[ESP_RINTR] |= INTR_FC; + dev->rregs[ESP_RSTAT] |= STAT_MI; + break; + case CMD_MSGACC: + dev->rregs[ESP_RINTR] |= INTR_DC; + dev->rregs[ESP_RSEQ] = 0; + dev->rregs[ESP_RFLAGS] = 0; + esp_log("ESP SCSI MSGACC IRQ\n"); + esp_raise_irq(dev); + break; + case CMD_PAD: + dev->rregs[ESP_RSTAT] = STAT_TC; + dev->rregs[ESP_RINTR] |= INTR_FC; + dev->rregs[ESP_RSEQ] = 0; + esp_log("ESP Transfer Pad\n"); + break; + case CMD_SATN: + case CMD_RSTATN: + break; + case CMD_ENSEL: + dev->rregs[ESP_RINTR] = 0; + esp_log("ESP Enable Selection, do cmd = %d\n", dev->do_cmd); + break; + case CMD_DISSEL: + dev->rregs[ESP_RINTR] = 0; + esp_log("ESP Disable Selection\n"); + esp_raise_irq(dev); + break; + } + break; + case ESP_WBUSID: + case ESP_WSEL: + case ESP_WSYNTP: + case ESP_WSYNO: + break; + case ESP_CFG1: + case ESP_CFG2: + case ESP_CFG3: + case ESP_RES3: + case ESP_RES4: + dev->rregs[saddr] = val; + break; + case ESP_WCCF: + case ESP_WTEST: + break; + default: + esp_log("Unhandled writeb 0x%x = 0x%x\n", saddr, val); + break; } dev->wregs[saddr] = val; } - static void esp_pci_dma_memory_rw(esp_t *dev, uint8_t *buf, uint32_t len, int dir) { int expected_dir; - if (dev->dma_regs[DMA_CMD] & DMA_CMD_DIR) - expected_dir = READ_FROM_DEVICE; - else - expected_dir = WRITE_TO_DEVICE; + if (dev->dma_regs[DMA_CMD] & DMA_CMD_DIR) + expected_dir = READ_FROM_DEVICE; + else + expected_dir = WRITE_TO_DEVICE; - esp_log("ESP DMA WBC = %d, addr = %06x, expected direction = %d, dir = %i\n", dev->dma_regs[DMA_WBC], dev->dma_regs[DMA_SPA], expected_dir, dir); + esp_log("ESP DMA WBC = %d, addr = %06x, expected direction = %d, dir = %i\n", dev->dma_regs[DMA_WBC], dev->dma_regs[DMA_SPA], expected_dir, dir); - if (dir != expected_dir) { - esp_log("ESP unexpected direction\n"); - return; - } + if (dir != expected_dir) { + esp_log("ESP unexpected direction\n"); + return; + } - if (dev->dma_regs[DMA_WBC] < len) - len = dev->dma_regs[DMA_WBC]; + if (dev->dma_regs[DMA_WBC] < len) + len = dev->dma_regs[DMA_WBC]; - if (expected_dir) { - dma_bm_write(dev->dma_regs[DMA_SPA], buf, len, 4); - } else { - dma_bm_read(dev->dma_regs[DMA_SPA], buf, len, 4); - } + if (expected_dir) { + dma_bm_write(dev->dma_regs[DMA_SPA], buf, len, 4); + } else { + dma_bm_read(dev->dma_regs[DMA_SPA], buf, len, 4); + } - /* update status registers */ - dev->dma_regs[DMA_WBC] -= len; - dev->dma_regs[DMA_WAC] += len; - if (dev->dma_regs[DMA_WBC] == 0) - dev->dma_regs[DMA_STAT] |= DMA_STAT_DONE; + /* update status registers */ + dev->dma_regs[DMA_WBC] -= len; + dev->dma_regs[DMA_WAC] += len; + if (dev->dma_regs[DMA_WBC] == 0) + dev->dma_regs[DMA_STAT] |= DMA_STAT_DONE; } static uint32_t @@ -1195,15 +1189,14 @@ esp_pci_dma_read(esp_t *dev, uint16_t saddr) ret = dev->dma_regs[saddr]; if (saddr == DMA_STAT) { - if (dev->rregs[ESP_RSTAT] & STAT_INT) { - ret |= DMA_STAT_SCSIINT; - esp_log("ESP PCI DMA Read SCSI interrupt issued\n"); - } + if (dev->rregs[ESP_RSTAT] & STAT_INT) { + ret |= DMA_STAT_SCSIINT; + esp_log("ESP PCI DMA Read SCSI interrupt issued\n"); + } if (!(dev->sbac & SBAC_STATUS)) { - dev->dma_regs[DMA_STAT] &= ~(DMA_STAT_ERROR | DMA_STAT_ABORT | - DMA_STAT_DONE); - esp_log("ESP PCI DMA Read done cleared\n"); - } + dev->dma_regs[DMA_STAT] &= ~(DMA_STAT_ERROR | DMA_STAT_ABORT | DMA_STAT_DONE); + esp_log("ESP PCI DMA Read done cleared\n"); + } } esp_log("ESP PCI DMA Read regs addr = %04x, temp = %06x\n", saddr, ret); @@ -1216,43 +1209,41 @@ esp_pci_dma_write(esp_t *dev, uint16_t saddr, uint32_t val) uint32_t mask; switch (saddr) { - case DMA_CMD: - dev->dma_regs[saddr] = val; - esp_log("ESP PCI DMA Write CMD = %02x\n", val & DMA_CMD_MASK); - switch (val & DMA_CMD_MASK) { - case 0: /*IDLE*/ - esp_dma_enable(dev, 0); - break; - case 1: /*BLAST*/ - break; - case 2: /*ABORT*/ - scsi_device_command_stop(&scsi_devices[dev->bus][dev->id]); - break; - case 3: /*START*/ - dev->dma_regs[DMA_WBC] = dev->dma_regs[DMA_STC]; - dev->dma_regs[DMA_WAC] = dev->dma_regs[DMA_SPA]; - dev->dma_regs[DMA_WMAC] = dev->dma_regs[DMA_SMDLA]; - dev->dma_regs[DMA_STAT] &= ~(DMA_STAT_BCMBLT | DMA_STAT_SCSIINT | - DMA_STAT_DONE | DMA_STAT_ABORT | - DMA_STAT_ERROR | DMA_STAT_PWDN); - esp_dma_enable(dev, 1); - break; - default: /* can't happen */ - abort(); - } - break; - case DMA_STC: - case DMA_SPA: - case DMA_SMDLA: - dev->dma_regs[saddr] = val; - break; - case DMA_STAT: - if (dev->sbac & SBAC_STATUS) { - /* clear some bits on write */ - mask = DMA_STAT_ERROR | DMA_STAT_ABORT | DMA_STAT_DONE; - dev->dma_regs[DMA_STAT] &= ~(val & mask); - } - break; + case DMA_CMD: + dev->dma_regs[saddr] = val; + esp_log("ESP PCI DMA Write CMD = %02x\n", val & DMA_CMD_MASK); + switch (val & DMA_CMD_MASK) { + case 0: /*IDLE*/ + esp_dma_enable(dev, 0); + break; + case 1: /*BLAST*/ + break; + case 2: /*ABORT*/ + scsi_device_command_stop(&scsi_devices[dev->bus][dev->id]); + break; + case 3: /*START*/ + dev->dma_regs[DMA_WBC] = dev->dma_regs[DMA_STC]; + dev->dma_regs[DMA_WAC] = dev->dma_regs[DMA_SPA]; + dev->dma_regs[DMA_WMAC] = dev->dma_regs[DMA_SMDLA]; + dev->dma_regs[DMA_STAT] &= ~(DMA_STAT_BCMBLT | DMA_STAT_SCSIINT | DMA_STAT_DONE | DMA_STAT_ABORT | DMA_STAT_ERROR | DMA_STAT_PWDN); + esp_dma_enable(dev, 1); + break; + default: /* can't happen */ + abort(); + } + break; + case DMA_STC: + case DMA_SPA: + case DMA_SMDLA: + dev->dma_regs[saddr] = val; + break; + case DMA_STAT: + if (dev->sbac & SBAC_STATUS) { + /* clear some bits on write */ + mask = DMA_STAT_ERROR | DMA_STAT_ABORT | DMA_STAT_DONE; + dev->dma_regs[DMA_STAT] &= ~(val & mask); + } + break; } } @@ -1268,12 +1259,12 @@ esp_pci_hard_reset(esp_t *dev) { esp_hard_reset(dev); dev->dma_regs[DMA_CMD] &= ~(DMA_CMD_DIR | DMA_CMD_INTE_D | DMA_CMD_INTE_P - | DMA_CMD_MDL | DMA_CMD_DIAG | DMA_CMD_MASK); + | DMA_CMD_MDL | DMA_CMD_DIAG | DMA_CMD_MASK); dev->dma_regs[DMA_WBC] &= ~0xffff; dev->dma_regs[DMA_WAC] = 0xffffffff; dev->dma_regs[DMA_STAT] &= ~(DMA_STAT_BCMBLT | DMA_STAT_SCSIINT - | DMA_STAT_DONE | DMA_STAT_ABORT - | DMA_STAT_ERROR); + | DMA_STAT_DONE | DMA_STAT_ABORT + | DMA_STAT_ERROR); dev->dma_regs[DMA_WMAC] = 0xfffffffd; } @@ -1285,24 +1276,24 @@ esp_io_pci_read(esp_t *dev, uint32_t addr, unsigned int size) addr &= 0x7f; if (addr < 0x40) { - /* SCSI core reg */ - ret = esp_reg_read(dev, addr >> 2); + /* SCSI core reg */ + ret = esp_reg_read(dev, addr >> 2); } else if (addr < 0x60) { - /* PCI DMA CCB */ - ret = esp_pci_dma_read(dev, (addr - 0x40) >> 2); - esp_log("ESP PCI DMA CCB read addr = %02x, ret = %02x\n", (addr - 0x40) >> 2, ret); + /* PCI DMA CCB */ + ret = esp_pci_dma_read(dev, (addr - 0x40) >> 2); + esp_log("ESP PCI DMA CCB read addr = %02x, ret = %02x\n", (addr - 0x40) >> 2, ret); } else if (addr == 0x70) { - /* DMA SCSI Bus and control */ - ret = dev->sbac; - esp_log("ESP PCI SBAC read = %02x\n", ret); + /* DMA SCSI Bus and control */ + ret = dev->sbac; + esp_log("ESP PCI SBAC read = %02x\n", ret); } else { - /* Invalid region */ - ret = 0; + /* Invalid region */ + ret = 0; } /* give only requested data */ ret >>= (addr & 3) * 8; - ret &= ~(~(uint64_t)0 << (8 * size)); + ret &= ~(~(uint64_t) 0 << (8 * size)); esp_log("ESP PCI I/O read: addr = %02x, val = %02x\n", addr, ret); return ret; @@ -1312,7 +1303,7 @@ static void esp_io_pci_write(esp_t *dev, uint32_t addr, uint32_t val, unsigned int size) { uint32_t current, mask; - int shift; + int shift; addr &= 0x7f; @@ -1329,7 +1320,7 @@ esp_io_pci_write(esp_t *dev, uint32_t addr, uint32_t val, unsigned int size) } shift = (4 - size) * 8; - mask = (~(uint32_t)0 << shift) >> shift; + mask = (~(uint32_t) 0 << shift) >> shift; shift = ((4 - (addr & 3)) & 3) * 8; val <<= shift; @@ -1341,57 +1332,56 @@ esp_io_pci_write(esp_t *dev, uint32_t addr, uint32_t val, unsigned int size) esp_log("ESP PCI I/O write: addr = %02x, val = %02x\n", addr, val); if (addr < 0x40) { - /* SCSI core reg */ - esp_reg_write(dev, addr >> 2, val); + /* SCSI core reg */ + esp_reg_write(dev, addr >> 2, val); } else if (addr < 0x60) { - /* PCI DMA CCB */ - esp_pci_dma_write(dev, (addr - 0x40) >> 2, val); + /* PCI DMA CCB */ + esp_pci_dma_write(dev, (addr - 0x40) >> 2, val); } else if (addr == 0x70) { - /* DMA SCSI Bus and control */ - dev->sbac = val; + /* DMA SCSI Bus and control */ + dev->sbac = val; } } - static void esp_pci_io_writeb(uint16_t addr, uint8_t val, void *p) { - esp_t *dev = (esp_t *)p; + esp_t *dev = (esp_t *) p; esp_io_pci_write(dev, addr, val, 1); } static void esp_pci_io_writew(uint16_t addr, uint16_t val, void *p) { - esp_t *dev = (esp_t *)p; + esp_t *dev = (esp_t *) p; esp_io_pci_write(dev, addr, val, 2); } static void esp_pci_io_writel(uint16_t addr, uint32_t val, void *p) { - esp_t *dev = (esp_t *)p; + esp_t *dev = (esp_t *) p; esp_io_pci_write(dev, addr, val, 4); } static uint8_t esp_pci_io_readb(uint16_t addr, void *p) { - esp_t *dev = (esp_t *)p; + esp_t *dev = (esp_t *) p; return esp_io_pci_read(dev, addr, 1); } static uint16_t esp_pci_io_readw(uint16_t addr, void *p) { - esp_t *dev = (esp_t *)p; + esp_t *dev = (esp_t *) p; return esp_io_pci_read(dev, addr, 2); } static uint32_t esp_pci_io_readl(uint16_t addr, void *p) { - esp_t *dev = (esp_t *)p; + esp_t *dev = (esp_t *) p; return esp_io_pci_read(dev, addr, 4); } @@ -1400,18 +1390,17 @@ esp_io_set(esp_t *dev, uint32_t base, uint16_t len) { esp_log("ESP: [PCI] Setting I/O handler at %04X\n", base); io_sethandler(base, len, - esp_pci_io_readb, esp_pci_io_readw, esp_pci_io_readl, - esp_pci_io_writeb, esp_pci_io_writew, esp_pci_io_writel, dev); + esp_pci_io_readb, esp_pci_io_readw, esp_pci_io_readl, + esp_pci_io_writeb, esp_pci_io_writew, esp_pci_io_writel, dev); } - static void esp_io_remove(esp_t *dev, uint32_t base, uint16_t len) { esp_log("ESP: [PCI] Removing I/O handler at %04X\n", base); io_removehandler(base, len, - esp_pci_io_readb, esp_pci_io_readw, esp_pci_io_readl, - esp_pci_io_writeb, esp_pci_io_writew, esp_pci_io_writel, dev); + esp_pci_io_readb, esp_pci_io_readw, esp_pci_io_readl, + esp_pci_io_writeb, esp_pci_io_writew, esp_pci_io_writel, dev); } static void @@ -1426,15 +1415,15 @@ esp_bios_disable(esp_t *dev) mem_mapping_disable(&dev->bios.mapping); } -#define EE_ADAPT_SCSI_ID 64 -#define EE_MODE2 65 -#define EE_DELAY 66 -#define EE_TAG_CMD_NUM 67 -#define EE_ADAPT_OPTIONS 68 -#define EE_BOOT_SCSI_ID 69 -#define EE_BOOT_SCSI_LUN 70 -#define EE_CHKSUM1 126 -#define EE_CHKSUM2 127 +#define EE_ADAPT_SCSI_ID 64 +#define EE_MODE2 65 +#define EE_DELAY 66 +#define EE_TAG_CMD_NUM 67 +#define EE_ADAPT_OPTIONS 68 +#define EE_BOOT_SCSI_ID 69 +#define EE_BOOT_SCSI_LUN 70 +#define EE_CHKSUM1 126 +#define EE_CHKSUM2 127 #define EE_ADAPT_OPTION_F6_F8_AT_BOOT 0x01 #define EE_ADAPT_OPTION_BOOT_FROM_CDROM 0x02 @@ -1445,334 +1434,337 @@ esp_bios_disable(esp_t *dev) static void dc390_save_eeprom(esp_t *dev) { - FILE *f = nvr_fopen(dev->nvr_path, "wb"); - if (!f) return; - fwrite(dev->eeprom.data, 1, 128, f); - fclose(f); + FILE *f = nvr_fopen(dev->nvr_path, "wb"); + if (!f) + return; + fwrite(dev->eeprom.data, 1, 128, f); + fclose(f); } static void dc390_write_eeprom(esp_t *dev, int ena, int clk, int dat) { - /*Actual EEPROM is the same as the one used by the ATI cards, the 93cxx series.*/ - ati_eeprom_t *eeprom = &dev->eeprom; - uint8_t tick = eeprom->count; - uint8_t eedo = eeprom->out; - uint16_t address = eeprom->address; - uint8_t command = eeprom->opcode; + /*Actual EEPROM is the same as the one used by the ATI cards, the 93cxx series.*/ + ati_eeprom_t *eeprom = &dev->eeprom; + uint8_t tick = eeprom->count; + uint8_t eedo = eeprom->out; + uint16_t address = eeprom->address; + uint8_t command = eeprom->opcode; - esp_log("EEPROM CS=%02x,SK=%02x,DI=%02x,DO=%02x,tick=%d\n", - ena, clk, dat, eedo, tick); + esp_log("EEPROM CS=%02x,SK=%02x,DI=%02x,DO=%02x,tick=%d\n", + ena, clk, dat, eedo, tick); - if (!eeprom->oldena && ena) { - esp_log("EEPROM Start chip select cycle\n"); - tick = 0; - command = 0; - address = 0; - } else if (eeprom->oldena && !ena) { - if (!eeprom->wp) { - uint8_t subcommand = address >> 4; - if (command == 0 && subcommand == 2) { - esp_log("EEPROM Erase All\n"); - for (address = 0; address < 64; address++) - eeprom->data[address] = 0xffff; - dc390_save_eeprom(dev); - } else if (command == 3) { - esp_log("EEPROM Erase Word\n"); - eeprom->data[address] = 0xffff; - dc390_save_eeprom(dev); - } else if (tick >= 26) { - if (command == 1) { - esp_log("EEPROM Write Word\n"); - eeprom->data[address] &= eeprom->dat; - dc390_save_eeprom(dev); - } else if (command == 0 && subcommand == 1) { - esp_log("EEPROM Write All\n"); - for (address = 0; address < 64; address++) - eeprom->data[address] &= eeprom->dat; - dc390_save_eeprom(dev); - } - } - } - eedo = 1; - esp_log("EEPROM DO read\n"); - } else if (ena && !eeprom->oldclk && clk) { - if (tick == 0) { - if (dat == 0) { - esp_log("EEPROM Got correct 1st start bit, waiting for 2nd start bit (1)\n"); - tick++; - } else { - esp_log("EEPROM Wrong 1st start bit (is 1, should be 0)\n"); - tick = 2; - } - } else if (tick == 1) { - if (dat != 0) { - esp_log("EEPROM Got correct 2nd start bit, getting command + address\n"); - tick++; - } else { - esp_log("EEPROM 1st start bit is longer than needed\n"); - } - } else if (tick < 4) { - tick++; - command <<= 1; - if (dat) - command += 1; - } else if (tick < 10) { - tick++; - address = (address << 1) | dat; - if (tick == 10) { - esp_log("EEPROM command = %02x, address = %02x (val = %04x)\n", command, - address, eeprom->data[address]); - if (command == 2) - eedo = 0; - address = address % 64; - if (command == 0) { - switch (address >> 4) { - case 0: - esp_log("EEPROM Write disable command\n"); - eeprom->wp = 1; - break; - case 1: - esp_log("EEPROM Write all command\n"); - break; - case 2: - esp_log("EEPROM Erase all command\n"); - break; - case 3: - esp_log("EEPROM Write enable command\n"); - eeprom->wp = 0; - break; - } - } else { - esp_log("EEPROM Read, write or erase word\n"); - eeprom->dat = eeprom->data[address]; - } - } - } else if (tick < 26) { - tick++; - if (command == 2) { - esp_log("EEPROM Read Word\n"); - eedo = ((eeprom->dat & 0x8000) != 0); - } - eeprom->dat <<= 1; - eeprom->dat += dat; - } else { - esp_log("EEPROM Additional unneeded tick, not processed\n"); - } - } + if (!eeprom->oldena && ena) { + esp_log("EEPROM Start chip select cycle\n"); + tick = 0; + command = 0; + address = 0; + } else if (eeprom->oldena && !ena) { + if (!eeprom->wp) { + uint8_t subcommand = address >> 4; + if (command == 0 && subcommand == 2) { + esp_log("EEPROM Erase All\n"); + for (address = 0; address < 64; address++) + eeprom->data[address] = 0xffff; + dc390_save_eeprom(dev); + } else if (command == 3) { + esp_log("EEPROM Erase Word\n"); + eeprom->data[address] = 0xffff; + dc390_save_eeprom(dev); + } else if (tick >= 26) { + if (command == 1) { + esp_log("EEPROM Write Word\n"); + eeprom->data[address] &= eeprom->dat; + dc390_save_eeprom(dev); + } else if (command == 0 && subcommand == 1) { + esp_log("EEPROM Write All\n"); + for (address = 0; address < 64; address++) + eeprom->data[address] &= eeprom->dat; + dc390_save_eeprom(dev); + } + } + } + eedo = 1; + esp_log("EEPROM DO read\n"); + } else if (ena && !eeprom->oldclk && clk) { + if (tick == 0) { + if (dat == 0) { + esp_log("EEPROM Got correct 1st start bit, waiting for 2nd start bit (1)\n"); + tick++; + } else { + esp_log("EEPROM Wrong 1st start bit (is 1, should be 0)\n"); + tick = 2; + } + } else if (tick == 1) { + if (dat != 0) { + esp_log("EEPROM Got correct 2nd start bit, getting command + address\n"); + tick++; + } else { + esp_log("EEPROM 1st start bit is longer than needed\n"); + } + } else if (tick < 4) { + tick++; + command <<= 1; + if (dat) + command += 1; + } else if (tick < 10) { + tick++; + address = (address << 1) | dat; + if (tick == 10) { + esp_log("EEPROM command = %02x, address = %02x (val = %04x)\n", command, + address, eeprom->data[address]); + if (command == 2) + eedo = 0; + address = address % 64; + if (command == 0) { + switch (address >> 4) { + case 0: + esp_log("EEPROM Write disable command\n"); + eeprom->wp = 1; + break; + case 1: + esp_log("EEPROM Write all command\n"); + break; + case 2: + esp_log("EEPROM Erase all command\n"); + break; + case 3: + esp_log("EEPROM Write enable command\n"); + eeprom->wp = 0; + break; + } + } else { + esp_log("EEPROM Read, write or erase word\n"); + eeprom->dat = eeprom->data[address]; + } + } + } else if (tick < 26) { + tick++; + if (command == 2) { + esp_log("EEPROM Read Word\n"); + eedo = ((eeprom->dat & 0x8000) != 0); + } + eeprom->dat <<= 1; + eeprom->dat += dat; + } else { + esp_log("EEPROM Additional unneeded tick, not processed\n"); + } + } - eeprom->count = tick; - eeprom->oldena = ena; - eeprom->oldclk = clk; - eeprom->out = eedo; - eeprom->address = address; - eeprom->opcode = command; - esp_log("EEPROM EEDO = %d\n", eeprom->out); + eeprom->count = tick; + eeprom->oldena = ena; + eeprom->oldclk = clk; + eeprom->out = eedo; + eeprom->address = address; + eeprom->opcode = command; + esp_log("EEPROM EEDO = %d\n", eeprom->out); } static void dc390_load_eeprom(esp_t *dev) { ati_eeprom_t *eeprom = &dev->eeprom; - uint8_t *nvr = (uint8_t *)eeprom->data; - int i; - uint16_t checksum = 0; - FILE *f; + uint8_t *nvr = (uint8_t *) eeprom->data; + int i; + uint16_t checksum = 0; + FILE *f; eeprom->out = 1; f = nvr_fopen(dev->nvr_path, "rb"); if (f) { - esp_log("EEPROM Load\n"); - if (fread(nvr, 1, 128, f) != 128) - fatal("dc390_eeprom_load(): Error reading data\n"); - fclose(f); + esp_log("EEPROM Load\n"); + if (fread(nvr, 1, 128, f) != 128) + fatal("dc390_eeprom_load(): Error reading data\n"); + fclose(f); } else { - for (i = 0; i < 16; i++) { - nvr[i * 2] = 0x57; - nvr[i * 2 + 1] = 0x00; - } + for (i = 0; i < 16; i++) { + nvr[i * 2] = 0x57; + nvr[i * 2 + 1] = 0x00; + } - esp_log("EEPROM Defaults\n"); + esp_log("EEPROM Defaults\n"); - nvr[EE_ADAPT_SCSI_ID] = 7; - nvr[EE_MODE2] = 0x0f; - nvr[EE_TAG_CMD_NUM] = 0x04; - nvr[EE_ADAPT_OPTIONS] = EE_ADAPT_OPTION_F6_F8_AT_BOOT | - EE_ADAPT_OPTION_BOOT_FROM_CDROM | - EE_ADAPT_OPTION_INT13; - for (i = 0; i < EE_CHKSUM1; i += 2) { - checksum += ((nvr[i] & 0xff) | (nvr[i + 1] << 8)); - esp_log("Checksum calc = %04x, nvr = %02x\n", checksum, nvr[i]); - } + nvr[EE_ADAPT_SCSI_ID] = 7; + nvr[EE_MODE2] = 0x0f; + nvr[EE_TAG_CMD_NUM] = 0x04; + nvr[EE_ADAPT_OPTIONS] = EE_ADAPT_OPTION_F6_F8_AT_BOOT | EE_ADAPT_OPTION_BOOT_FROM_CDROM | EE_ADAPT_OPTION_INT13; + for (i = 0; i < EE_CHKSUM1; i += 2) { + checksum += ((nvr[i] & 0xff) | (nvr[i + 1] << 8)); + esp_log("Checksum calc = %04x, nvr = %02x\n", checksum, nvr[i]); + } - checksum = 0x1234 - checksum; - nvr[EE_CHKSUM1] = checksum & 0xff; - nvr[EE_CHKSUM2] = checksum >> 8; - esp_log("EEPROM Checksum = %04x\n", checksum); + checksum = 0x1234 - checksum; + nvr[EE_CHKSUM1] = checksum & 0xff; + nvr[EE_CHKSUM2] = checksum >> 8; + esp_log("EEPROM Checksum = %04x\n", checksum); } } -uint8_t esp_pci_regs[256]; -bar_t esp_pci_bar[2]; - +uint8_t esp_pci_regs[256]; +bar_t esp_pci_bar[2]; static uint8_t esp_pci_read(int func, int addr, void *p) { - esp_t *dev = (esp_t *)p; + esp_t *dev = (esp_t *) p; - //esp_log("ESP PCI: Reading register %02X\n", addr & 0xff); + // esp_log("ESP PCI: Reading register %02X\n", addr & 0xff); switch (addr) { - case 0x00: - //esp_log("ESP PCI: Read DO line = %02x\n", dev->eeprom.out); - if (!dev->has_bios) - return 0x22; - else { - if (dev->eeprom.out) - return 0x22; - else { - dev->eeprom.out = 1; - return 2; - } - } - break; - case 0x01: - return 0x10; - case 0x02: - return 0x20; - case 0x03: - return 0x20; - case 0x04: - return esp_pci_regs[0x04] & 3; /*Respond to IO*/ - case 0x07: - return 2; - case 0x08: - return 0; /*Revision ID*/ - case 0x09: - return 0; /*Programming interface*/ - case 0x0A: - return 0; /*devubclass*/ - case 0x0B: - return 1; /*Class code*/ - case 0x0E: - return 0; /*Header type */ - case 0x10: - return 1; /*I/O space*/ - case 0x11: - return esp_pci_bar[0].addr_regs[1]; - case 0x12: - return esp_pci_bar[0].addr_regs[2]; - case 0x13: - return esp_pci_bar[0].addr_regs[3]; - case 0x30: - if (!dev->has_bios) - return 0; - return esp_pci_bar[1].addr_regs[0]; - case 0x31: - if (!dev->has_bios) - return 0; - return esp_pci_bar[1].addr_regs[1]; - case 0x32: - if (!dev->has_bios) - return 0; - return esp_pci_bar[1].addr_regs[2]; - case 0x33: - if (!dev->has_bios) - return 0; - return esp_pci_bar[1].addr_regs[3]; - case 0x3C: - return dev->irq; - case 0x3D: - return PCI_INTA; + case 0x00: + // esp_log("ESP PCI: Read DO line = %02x\n", dev->eeprom.out); + if (!dev->has_bios) + return 0x22; + else { + if (dev->eeprom.out) + return 0x22; + else { + dev->eeprom.out = 1; + return 2; + } + } + break; + case 0x01: + return 0x10; + case 0x02: + return 0x20; + case 0x03: + return 0x20; + case 0x04: + return esp_pci_regs[0x04] & 3; /*Respond to IO*/ + case 0x07: + return 2; + case 0x08: + return 0; /*Revision ID*/ + case 0x09: + return 0; /*Programming interface*/ + case 0x0A: + return 0; /*devubclass*/ + case 0x0B: + return 1; /*Class code*/ + case 0x0E: + return 0; /*Header type */ + case 0x10: + return 1; /*I/O space*/ + case 0x11: + return esp_pci_bar[0].addr_regs[1]; + case 0x12: + return esp_pci_bar[0].addr_regs[2]; + case 0x13: + return esp_pci_bar[0].addr_regs[3]; + case 0x30: + if (!dev->has_bios) + return 0; + return esp_pci_bar[1].addr_regs[0]; + case 0x31: + if (!dev->has_bios) + return 0; + return esp_pci_bar[1].addr_regs[1]; + case 0x32: + if (!dev->has_bios) + return 0; + return esp_pci_bar[1].addr_regs[2]; + case 0x33: + if (!dev->has_bios) + return 0; + return esp_pci_bar[1].addr_regs[3]; + case 0x3C: + return dev->irq; + case 0x3D: + return PCI_INTA; - case 0x40 ... 0x4f: - return esp_pci_regs[addr]; + case 0x40 ... 0x4f: + return esp_pci_regs[addr]; } - return(0); + return (0); } - static void esp_pci_write(int func, int addr, uint8_t val, void *p) { - esp_t *dev = (esp_t *)p; + esp_t *dev = (esp_t *) p; uint8_t valxor; - int eesk; - int eedi; + int eesk; + int eedi; - //esp_log("ESP PCI: Write value %02X to register %02X\n", val, addr); + // esp_log("ESP PCI: Write value %02X to register %02X\n", val, addr); if ((addr >= 0x80) && (addr <= 0xFF)) { - if (addr == 0x80) { - eesk = val & 0x80 ? 1 : 0; - eedi = val & 0x40 ? 1 : 0; - dc390_write_eeprom(dev, 1, eesk, eedi); - } else if (addr == 0xc0) - dc390_write_eeprom(dev, 0, 0, 0); - //esp_log("ESP PCI: Write value %02X to register %02X\n", val, addr); - return; + if (addr == 0x80) { + eesk = val & 0x80 ? 1 : 0; + eedi = val & 0x40 ? 1 : 0; + dc390_write_eeprom(dev, 1, eesk, eedi); + } else if (addr == 0xc0) + dc390_write_eeprom(dev, 0, 0, 0); + // esp_log("ESP PCI: Write value %02X to register %02X\n", val, addr); + return; } switch (addr) { - case 0x04: - valxor = (val & 3) ^ esp_pci_regs[addr]; - if (valxor & PCI_COMMAND_IO) { - esp_io_remove(dev, dev->PCIBase, 0x80); - if ((dev->PCIBase != 0) && (val & PCI_COMMAND_IO)) - esp_io_set(dev, dev->PCIBase, 0x80); - } - esp_pci_regs[addr] = val & 3; - break; + case 0x04: + valxor = (val & 3) ^ esp_pci_regs[addr]; + if (valxor & PCI_COMMAND_IO) { + esp_io_remove(dev, dev->PCIBase, 0x80); + if ((dev->PCIBase != 0) && (val & PCI_COMMAND_IO)) + esp_io_set(dev, dev->PCIBase, 0x80); + } + esp_pci_regs[addr] = val & 3; + break; - case 0x10: case 0x11: case 0x12: case 0x13: - /* I/O Base set. */ - /* First, remove the old I/O. */ - esp_io_remove(dev, dev->PCIBase, 0x80); - /* Then let's set the PCI regs. */ - esp_pci_bar[0].addr_regs[addr & 3] = val; - /* Then let's calculate the new I/O base. */ - esp_pci_bar[0].addr &= 0xff00; - dev->PCIBase = esp_pci_bar[0].addr; - /* Log the new base. */ - //esp_log("ESP PCI: New I/O base is %04X\n" , dev->PCIBase); - /* We're done, so get out of the here. */ - if (esp_pci_regs[4] & PCI_COMMAND_IO) { - if (dev->PCIBase != 0) { - esp_io_set(dev, dev->PCIBase, 0x80); - } - } - return; + case 0x10: + case 0x11: + case 0x12: + case 0x13: + /* I/O Base set. */ + /* First, remove the old I/O. */ + esp_io_remove(dev, dev->PCIBase, 0x80); + /* Then let's set the PCI regs. */ + esp_pci_bar[0].addr_regs[addr & 3] = val; + /* Then let's calculate the new I/O base. */ + esp_pci_bar[0].addr &= 0xff00; + dev->PCIBase = esp_pci_bar[0].addr; + /* Log the new base. */ + // esp_log("ESP PCI: New I/O base is %04X\n" , dev->PCIBase); + /* We're done, so get out of the here. */ + if (esp_pci_regs[4] & PCI_COMMAND_IO) { + if (dev->PCIBase != 0) { + esp_io_set(dev, dev->PCIBase, 0x80); + } + } + return; - case 0x30: case 0x31: case 0x32: case 0x33: - if (!dev->has_bios) - return; - /* BIOS Base set. */ - /* First, remove the old I/O. */ - esp_bios_disable(dev); - /* Then let's set the PCI regs. */ - esp_pci_bar[1].addr_regs[addr & 3] = val; - /* Then let's calculate the new I/O base. */ - esp_pci_bar[1].addr &= 0xfff80001; - dev->BIOSBase = esp_pci_bar[1].addr & 0xfff80000; - /* Log the new base. */ - //esp_log("ESP PCI: New BIOS base is %08X\n" , dev->BIOSBase); - /* We're done, so get out of the here. */ - if (esp_pci_bar[1].addr & 0x00000001) - esp_bios_set_addr(dev, dev->BIOSBase); - return; + case 0x30: + case 0x31: + case 0x32: + case 0x33: + if (!dev->has_bios) + return; + /* BIOS Base set. */ + /* First, remove the old I/O. */ + esp_bios_disable(dev); + /* Then let's set the PCI regs. */ + esp_pci_bar[1].addr_regs[addr & 3] = val; + /* Then let's calculate the new I/O base. */ + esp_pci_bar[1].addr &= 0xfff80001; + dev->BIOSBase = esp_pci_bar[1].addr & 0xfff80000; + /* Log the new base. */ + // esp_log("ESP PCI: New BIOS base is %08X\n" , dev->BIOSBase); + /* We're done, so get out of the here. */ + if (esp_pci_bar[1].addr & 0x00000001) + esp_bios_set_addr(dev, dev->BIOSBase); + return; - case 0x3C: - esp_pci_regs[addr] = val; - dev->irq = val; - esp_log("ESP IRQ now: %i\n", val); - return; + case 0x3C: + esp_pci_regs[addr] = val; + dev->irq = val; + esp_log("ESP IRQ now: %i\n", val); + return; - case 0x40 ... 0x4f: - esp_pci_regs[addr] = val; - return; + case 0x40 ... 0x4f: + esp_pci_regs[addr] = val; + return; } } @@ -1786,152 +1778,152 @@ dc390_init(const device_t *info) dev->bus = scsi_get_bus(); - dev->mca = 0; + dev->mca = 0; fifo8_create(&dev->fifo, ESP_FIFO_SZ); fifo8_create(&dev->cmdfifo, ESP_CMDFIFO_SZ); - dev->PCIBase = 0; + dev->PCIBase = 0; dev->MMIOBase = 0; dev->pci_slot = pci_add_card(PCI_ADD_NORMAL, esp_pci_read, esp_pci_write, dev); esp_pci_bar[0].addr_regs[0] = 1; - esp_pci_regs[0x04] = 3; + esp_pci_regs[0x04] = 3; dev->has_bios = device_get_config_int("bios"); if (dev->has_bios) - rom_init(&dev->bios, DC390_ROM, 0xc8000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + rom_init(&dev->bios, DC390_ROM, 0xc8000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); /* Enable our BIOS space in PCI, if needed. */ if (dev->has_bios) { - esp_pci_bar[1].addr = 0xfff80000; + esp_pci_bar[1].addr = 0xfff80000; } else { - esp_pci_bar[1].addr = 0; + esp_pci_bar[1].addr = 0; } if (dev->has_bios) - esp_bios_disable(dev); + esp_bios_disable(dev); - dev->nvr_path = "dc390.nvr"; + dev->nvr_path = "dc390.nvr"; - /* Load the serial EEPROM. */ - dc390_load_eeprom(dev); + /* Load the serial EEPROM. */ + dc390_load_eeprom(dev); esp_pci_hard_reset(dev); timer_add(&dev->timer, esp_callback, dev, 0); - return(dev); + return (dev); } static uint16_t ncr53c90_in(uint16_t port, void *priv) { - esp_t *dev = (esp_t *)priv; + esp_t *dev = (esp_t *) priv; uint16_t ret = 0; - port &= 0x1f; + port &= 0x1f; - if (port >= 0x10) - ret = esp_reg_read(dev, port - 0x10); - else { - switch (port) { - case 0x02: - ret = dev->dma_86c01.mode; - break; + if (port >= 0x10) + ret = esp_reg_read(dev, port - 0x10); + else { + switch (port) { + case 0x02: + ret = dev->dma_86c01.mode; + break; - case 0x0c: - ret = dev->dma_86c01.status; - break; - } - } + case 0x0c: + ret = dev->dma_86c01.status; + break; + } + } - esp_log("[%04X:%08X]: NCR53c90 DMA read port = %02x, ret = %02x\n", CS, cpu_state.pc, port, ret); + esp_log("[%04X:%08X]: NCR53c90 DMA read port = %02x, ret = %02x\n", CS, cpu_state.pc, port, ret); - return ret; + return ret; } static uint8_t ncr53c90_inb(uint16_t port, void *priv) { - return ncr53c90_in(port, priv); + return ncr53c90_in(port, priv); } static uint16_t ncr53c90_inw(uint16_t port, void *priv) { - return (ncr53c90_in(port, priv) & 0xff) | (ncr53c90_in(port + 1, priv) << 8); + return (ncr53c90_in(port, priv) & 0xff) | (ncr53c90_in(port + 1, priv) << 8); } static void ncr53c90_out(uint16_t port, uint16_t val, void *priv) { - esp_t *dev = (esp_t *)priv; + esp_t *dev = (esp_t *) priv; - port &= 0x1f; + port &= 0x1f; - esp_log("[%04X:%08X]: NCR53c90 DMA write port = %02x, val = %02x\n", CS, cpu_state.pc, port, val); + esp_log("[%04X:%08X]: NCR53c90 DMA write port = %02x, val = %02x\n", CS, cpu_state.pc, port, val); - if (port >= 0x10) - esp_reg_write(dev, port - 0x10, val); - else { - if (port == 0x02) { - dev->dma_86c01.mode = (val & 0x40); - } - } + if (port >= 0x10) + esp_reg_write(dev, port - 0x10, val); + else { + if (port == 0x02) { + dev->dma_86c01.mode = (val & 0x40); + } + } } static void ncr53c90_outb(uint16_t port, uint8_t val, void *priv) { - ncr53c90_out(port, val, priv); + ncr53c90_out(port, val, priv); } static void ncr53c90_outw(uint16_t port, uint16_t val, void *priv) { - ncr53c90_out(port, val & 0xff, priv); - ncr53c90_out(port + 1, val >> 8, priv); + ncr53c90_out(port, val & 0xff, priv); + ncr53c90_out(port + 1, val >> 8, priv); } static uint8_t ncr53c90_mca_read(int port, void *priv) { - esp_t *dev = (esp_t *)priv; + esp_t *dev = (esp_t *) priv; - return(dev->pos_regs[port & 7]); + return (dev->pos_regs[port & 7]); } - static void ncr53c90_mca_write(int port, uint8_t val, void *priv) { - esp_t *dev = (esp_t *)priv; - static const uint16_t ncrmca_iobase[] = { - 0, 0x240, 0x340, 0x400, 0x420, 0x3240, 0x8240, 0xa240 - }; + esp_t *dev = (esp_t *) priv; + static const uint16_t ncrmca_iobase[] = { + 0, 0x240, 0x340, 0x400, 0x420, 0x3240, 0x8240, 0xa240 + }; /* MCA does not write registers below 0x0100. */ - if (port < 0x0102) return; + if (port < 0x0102) + return; /* Save the MCA register value. */ dev->pos_regs[port & 7] = val; /* This is always necessary so that the old handler doesn't remain. */ - if (dev->Base != 0) { - io_removehandler(dev->Base, 0x20, - ncr53c90_inb, ncr53c90_inw, NULL, - ncr53c90_outb, ncr53c90_outw, NULL, dev); - } + if (dev->Base != 0) { + io_removehandler(dev->Base, 0x20, + ncr53c90_inb, ncr53c90_inw, NULL, + ncr53c90_outb, ncr53c90_outw, NULL, dev); + } /* Get the new assigned I/O base address. */ dev->Base = ncrmca_iobase[(dev->pos_regs[2] & 0x0e) >> 1]; /* Save the new IRQ and DMA channel values. */ dev->irq = 3 + (2 * ((dev->pos_regs[2] & 0x30) >> 4)); - if (dev->irq == 9) - dev->irq = 2; + if (dev->irq == 9) + dev->irq = 2; dev->DmaChannel = dev->pos_regs[3] & 0x0f; @@ -1943,31 +1935,29 @@ ncr53c90_mca_write(int port, uint8_t val, void *priv) /* Initialize the device if fully configured. */ if (dev->pos_regs[2] & 0x01) { - if (dev->Base != 0) { - /* Card enabled; register (new) I/O handler. */ - io_sethandler(dev->Base, 0x20, - ncr53c90_inb, ncr53c90_inw, NULL, - ncr53c90_outb, ncr53c90_outw, NULL, dev); + if (dev->Base != 0) { + /* Card enabled; register (new) I/O handler. */ + io_sethandler(dev->Base, 0x20, + ncr53c90_inb, ncr53c90_inw, NULL, + ncr53c90_outb, ncr53c90_outw, NULL, dev); - esp_hard_reset(dev); - } + esp_hard_reset(dev); + } - /* Say hello. */ - esp_log("NCR 53c90: I/O=%04x, IRQ=%d, DMA=%d, HOST ID %i\n", - dev->Base, dev->irq, dev->DmaChannel, dev->HostID); + /* Say hello. */ + esp_log("NCR 53c90: I/O=%04x, IRQ=%d, DMA=%d, HOST ID %i\n", + dev->Base, dev->irq, dev->DmaChannel, dev->HostID); } } - static uint8_t ncr53c90_mca_feedb(void *priv) { - esp_t *dev = (esp_t *)priv; + esp_t *dev = (esp_t *) priv; return (dev->pos_regs[2] & 0x01); } - static void * ncr53c90_mca_init(const device_t *info) { @@ -1978,39 +1968,38 @@ ncr53c90_mca_init(const device_t *info) dev->bus = scsi_get_bus(); - dev->mca = 1; + dev->mca = 1; fifo8_create(&dev->fifo, ESP_FIFO_SZ); fifo8_create(&dev->cmdfifo, ESP_CMDFIFO_SZ); - dev->pos_regs[0] = 0x4d; /* MCA board ID */ - dev->pos_regs[1] = 0x7f; - mca_add(ncr53c90_mca_read, ncr53c90_mca_write, ncr53c90_mca_feedb, NULL, dev); + dev->pos_regs[0] = 0x4d; /* MCA board ID */ + dev->pos_regs[1] = 0x7f; + mca_add(ncr53c90_mca_read, ncr53c90_mca_write, ncr53c90_mca_feedb, NULL, dev); esp_hard_reset(dev); timer_add(&dev->timer, esp_callback, dev, 0); - return(dev); + return (dev); } static void esp_close(void *priv) { - esp_t *dev = (esp_t *)priv; + esp_t *dev = (esp_t *) priv; if (dev) { - fifo8_destroy(&dev->fifo); - fifo8_destroy(&dev->cmdfifo); + fifo8_destroy(&dev->fifo); + fifo8_destroy(&dev->cmdfifo); - free(dev); - dev = NULL; + free(dev); + dev = NULL; } } - static const device_config_t bios_enable_config[] = { -// clang-format off + // clang-format off { .name = "bios", .description = "Enable BIOS", @@ -2023,29 +2012,29 @@ static const device_config_t bios_enable_config[] = { }; const device_t dc390_pci_device = { - .name = "Tekram DC-390 PCI", + .name = "Tekram DC-390 PCI", .internal_name = "dc390", - .flags = DEVICE_PCI, - .local = 0, - .init = dc390_init, - .close = esp_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = 0, + .init = dc390_init, + .close = esp_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = bios_enable_config + .force_redraw = NULL, + .config = bios_enable_config }; const device_t ncr53c90_mca_device = { - .name = "NCR 53c90 MCA", + .name = "NCR 53c90 MCA", .internal_name = "ncr53c90", - .flags = DEVICE_MCA, - .local = 0, - .init = ncr53c90_mca_init, - .close = esp_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = 0, + .init = ncr53c90_mca_init, + .close = esp_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/scsi/scsi_spock.c b/src/scsi/scsi_spock.c index cfcf8e816..799be48d0 100644 --- a/src/scsi/scsi_spock.c +++ b/src/scsi/scsi_spock.c @@ -40,161 +40,160 @@ #include <86box/scsi_device.h> #include <86box/scsi_spock.h> -#define SPOCK_U68_1990_ROM "roms/scsi/ibm/64f4376.bin" -#define SPOCK_U69_1990_ROM "roms/scsi/ibm/64f4377.bin" +#define SPOCK_U68_1990_ROM "roms/scsi/ibm/64f4376.bin" +#define SPOCK_U69_1990_ROM "roms/scsi/ibm/64f4377.bin" -#define SPOCK_U68_1991_ROM "roms/scsi/ibm/92F2244.U68" -#define SPOCK_U69_1991_ROM "roms/scsi/ibm/92F2245.U69" +#define SPOCK_U68_1991_ROM "roms/scsi/ibm/92F2244.U68" +#define SPOCK_U69_1991_ROM "roms/scsi/ibm/92F2245.U69" -#define SPOCK_TIME (20) +#define SPOCK_TIME (20) -typedef enum -{ - SCSI_STATE_IDLE, - SCSI_STATE_SELECT, - SCSI_STATE_SEND_COMMAND, - SCSI_STATE_END_PHASE +typedef enum { + SCSI_STATE_IDLE, + SCSI_STATE_SELECT, + SCSI_STATE_SEND_COMMAND, + SCSI_STATE_END_PHASE } scsi_state_t; -#pragma pack(push,1) +#pragma pack(push, 1) typedef struct { - uint16_t pos; - uint16_t pos1; - uint16_t pos2; - uint16_t pos3; - uint16_t pos4; - uint16_t pos5; - uint16_t pos6; - uint16_t pos7; - uint16_t pos8; + uint16_t pos; + uint16_t pos1; + uint16_t pos2; + uint16_t pos3; + uint16_t pos4; + uint16_t pos5; + uint16_t pos6; + uint16_t pos7; + uint16_t pos8; } get_pos_info_t; typedef struct { - uint16_t scb_status; - uint16_t retry_count; - uint32_t residual_byte_count; - uint32_t sg_list_element_addr; - uint16_t device_dep_status_len; - uint16_t cmd_status; - uint16_t error; - uint16_t reserved; - uint16_t cache_info_status; - uint32_t scb_addr; + uint16_t scb_status; + uint16_t retry_count; + uint32_t residual_byte_count; + uint32_t sg_list_element_addr; + uint16_t device_dep_status_len; + uint16_t cmd_status; + uint16_t error; + uint16_t reserved; + uint16_t cache_info_status; + uint32_t scb_addr; } get_complete_stat_t; typedef struct { - uint32_t sys_buf_addr; - uint32_t sys_buf_byte_count; + uint32_t sys_buf_addr; + uint32_t sys_buf_byte_count; } SGE; typedef struct { - uint16_t command; - uint16_t enable; - uint32_t lba_addr; - SGE sge; - uint32_t term_status_block_addr; - uint32_t scb_chain_addr; - uint16_t block_count; - uint16_t block_length; + uint16_t command; + uint16_t enable; + uint32_t lba_addr; + SGE sge; + uint32_t term_status_block_addr; + uint32_t scb_chain_addr; + uint16_t block_count; + uint16_t block_length; } scb_t; #pragma pack(pop) typedef struct { - rom_t bios_rom; + rom_t bios_rom; - int bios_ver; - int irq, irq_inactive; + int bios_ver; + int irq, irq_inactive; - uint8_t pos_regs[8]; + uint8_t pos_regs[8]; - uint8_t basic_ctrl; - uint32_t command; + uint8_t basic_ctrl; + uint32_t command; - uint8_t attention, - attention_pending; - int attention_wait; + uint8_t attention, + attention_pending; + int attention_wait; - uint8_t cir[4], - cir_pending[4]; + uint8_t cir[4], + cir_pending[4]; - uint8_t irq_status; + uint8_t irq_status; - uint32_t scb_addr; + uint32_t scb_addr; - uint8_t status; + uint8_t status; - get_complete_stat_t get_complete_stat; - get_pos_info_t get_pos_info; + get_complete_stat_t get_complete_stat; + get_pos_info_t get_pos_info; - scb_t scb; - int adapter_reset; - int scb_id; - int adapter_id; + scb_t scb; + int adapter_reset; + int scb_id; + int adapter_id; - int cmd_status; - int cir_status; + int cmd_status; + int cir_status; - uint8_t pacing; + uint8_t pacing; - uint8_t buf[0x600]; + uint8_t buf[0x600]; - struct { - int phys_id; - int lun_id; - } dev_id[SCSI_ID_MAX]; + struct { + int phys_id; + int lun_id; + } dev_id[SCSI_ID_MAX]; - uint8_t last_status, bus; - uint8_t cdb[12]; - int cdb_len; - int cdb_id; - uint32_t data_ptr, data_len; - uint8_t temp_cdb[12]; + uint8_t last_status, bus; + uint8_t cdb[12]; + int cdb_len; + int cdb_id; + uint32_t data_ptr, data_len; + uint8_t temp_cdb[12]; - int irq_requests[SCSI_ID_MAX]; + int irq_requests[SCSI_ID_MAX]; - pc_timer_t callback_timer; + pc_timer_t callback_timer; - int cmd_timer; + int cmd_timer; - int scb_state; - int in_reset; - int in_invalid; + int scb_state; + int in_reset; + int in_invalid; - uint64_t temp_period; - double media_period; + uint64_t temp_period; + double media_period; - scsi_state_t scsi_state; + scsi_state_t scsi_state; } spock_t; -#define CTRL_RESET (1 << 7) -#define CTRL_DMA_ENA (1 << 1) -#define CTRL_IRQ_ENA (1 << 0) +#define CTRL_RESET (1 << 7) +#define CTRL_DMA_ENA (1 << 1) +#define CTRL_IRQ_ENA (1 << 0) -#define STATUS_CMD_FULL (1 << 3) -#define STATUS_CMD_EMPTY (1 << 2) -#define STATUS_IRQ (1 << 1) -#define STATUS_BUSY (1 << 0) +#define STATUS_CMD_FULL (1 << 3) +#define STATUS_CMD_EMPTY (1 << 2) +#define STATUS_IRQ (1 << 1) +#define STATUS_BUSY (1 << 0) -#define ENABLE_PT (1 << 12) +#define ENABLE_PT (1 << 12) -#define CMD_MASK 0xff3f -#define CMD_ASSIGN 0x040e -#define CMD_DEVICE_INQUIRY 0x1c0b -#define CMD_DMA_PACING_CONTROL 0x040d -#define CMD_FEATURE_CONTROL 0x040c -#define CMD_GET_POS_INFO 0x1c0a -#define CMD_INVALID_412 0x0412 -#define CMD_GET_COMPLETE_STATUS 0x1c07 -#define CMD_FORMAT_UNIT 0x1c16 -#define CMD_READ_DATA 0x1c01 -#define CMD_READ_DEVICE_CAPACITY 0x1c09 -#define CMD_REQUEST_SENSE 0x1c08 -#define CMD_RESET 0x0400 -#define CMD_SEND_OTHER_SCSI 0x241f -#define CMD_UNKNOWN_1C10 0x1c10 -#define CMD_UNKNOWN_1C11 0x1c11 -#define CMD_WRITE_DATA 0x1c02 -#define CMD_VERIFY 0x1c03 +#define CMD_MASK 0xff3f +#define CMD_ASSIGN 0x040e +#define CMD_DEVICE_INQUIRY 0x1c0b +#define CMD_DMA_PACING_CONTROL 0x040d +#define CMD_FEATURE_CONTROL 0x040c +#define CMD_GET_POS_INFO 0x1c0a +#define CMD_INVALID_412 0x0412 +#define CMD_GET_COMPLETE_STATUS 0x1c07 +#define CMD_FORMAT_UNIT 0x1c16 +#define CMD_READ_DATA 0x1c01 +#define CMD_READ_DEVICE_CAPACITY 0x1c09 +#define CMD_REQUEST_SENSE 0x1c08 +#define CMD_RESET 0x0400 +#define CMD_SEND_OTHER_SCSI 0x241f +#define CMD_UNKNOWN_1C10 0x1c10 +#define CMD_UNKNOWN_1C11 0x1c11 +#define CMD_WRITE_DATA 0x1c02 +#define CMD_VERIFY 0x1c03 #define IRQ_TYPE_NONE 0x0 #define IRQ_TYPE_SCB_COMPLETE 0x1 @@ -206,244 +205,246 @@ typedef struct { #define IRQ_TYPE_SW_SEQ_ERROR 0xf #define IRQ_TYPE_RESET_COMPLETE 0x10 - #ifdef ENABLE_SPOCK_LOG int spock_do_log = ENABLE_SPOCK_LOG; - static void spock_log(const char *fmt, ...) { va_list ap; if (spock_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define spock_log(fmt, ...) +# define spock_log(fmt, ...) #endif static void spock_rethink_irqs(spock_t *scsi) { - int irq_pending = 0; - int c; + int irq_pending = 0; + int c; - if (!scsi->irq_status) { - for (c = 0; c < SCSI_ID_MAX; c++) { - if (scsi->irq_requests[c] != IRQ_TYPE_NONE) { - /* Found IRQ */ - scsi->irq_status = c | (scsi->irq_requests[c] << 4); - spock_log("Found IRQ: status = %02x\n", scsi->irq_status); - scsi->status |= STATUS_IRQ; - irq_pending = 1; - break; - } - } - } else + if (!scsi->irq_status) { + for (c = 0; c < SCSI_ID_MAX; c++) { + if (scsi->irq_requests[c] != IRQ_TYPE_NONE) { + /* Found IRQ */ + scsi->irq_status = c | (scsi->irq_requests[c] << 4); + spock_log("Found IRQ: status = %02x\n", scsi->irq_status); + scsi->status |= STATUS_IRQ; irq_pending = 1; - - if (scsi->basic_ctrl & CTRL_IRQ_ENA) { - if (irq_pending) { - spock_log("IRQ issued\n"); - scsi->irq_inactive = 0; - picint(1 << scsi->irq); - } else { - /* No IRQs pending, clear IRQ state */ - spock_log("IRQ cleared\n"); - scsi->irq_status = 0; - scsi->irq_inactive = 1; - scsi->status &= ~STATUS_IRQ; - picintc(1 << scsi->irq); - } - } else { - spock_log("IRQ disabled\n"); - picintc(1 << scsi->irq); + break; + } } + } else + irq_pending = 1; + + if (scsi->basic_ctrl & CTRL_IRQ_ENA) { + if (irq_pending) { + spock_log("IRQ issued\n"); + scsi->irq_inactive = 0; + picint(1 << scsi->irq); + } else { + /* No IRQs pending, clear IRQ state */ + spock_log("IRQ cleared\n"); + scsi->irq_status = 0; + scsi->irq_inactive = 1; + scsi->status &= ~STATUS_IRQ; + picintc(1 << scsi->irq); + } + } else { + spock_log("IRQ disabled\n"); + picintc(1 << scsi->irq); + } } static __inline void spock_set_irq(spock_t *scsi, int id, int type) { - spock_log("spock_set_irq id=%i type=%x %02x\n", id, type, scsi->irq_status); - scsi->irq_requests[id] = type; - if (!scsi->irq_status) /* Don't change IRQ status if one is currently being processed */ - spock_rethink_irqs(scsi); + spock_log("spock_set_irq id=%i type=%x %02x\n", id, type, scsi->irq_status); + scsi->irq_requests[id] = type; + if (!scsi->irq_status) /* Don't change IRQ status if one is currently being processed */ + spock_rethink_irqs(scsi); } static __inline void spock_clear_irq(spock_t *scsi, int id) { - spock_log("spock_clear_irq id=%i\n", id); - scsi->irq_requests[id] = IRQ_TYPE_NONE; - spock_rethink_irqs(scsi); + spock_log("spock_clear_irq id=%i\n", id); + scsi->irq_requests[id] = IRQ_TYPE_NONE; + spock_rethink_irqs(scsi); } static void spock_add_to_period(spock_t *scsi, int TransferLength) { - scsi->temp_period += (uint64_t) TransferLength; + scsi->temp_period += (uint64_t) TransferLength; } static void spock_write(uint16_t port, uint8_t val, void *p) { - spock_t *scsi = (spock_t *)p; + spock_t *scsi = (spock_t *) p; - spock_log("spock_write: port=%04x val=%02x %04x:%04x\n", port, val, CS, cpu_state.pc); + spock_log("spock_write: port=%04x val=%02x %04x:%04x\n", port, val, CS, cpu_state.pc); - switch (port & 7) { - case 0: case 1: case 2: case 3: /*Command Interface Register*/ - scsi->cir_pending[port & 3] = val; - if (port & 2) - scsi->cir_status |= 2; - else - scsi->cir_status |= 1; - break; + switch (port & 7) { + case 0: + case 1: + case 2: + case 3: /*Command Interface Register*/ + scsi->cir_pending[port & 3] = val; + if (port & 2) + scsi->cir_status |= 2; + else + scsi->cir_status |= 1; + break; - case 4: /*Attention Register*/ - scsi->attention_pending = val; - scsi->attention_wait = 2; - scsi->status |= STATUS_BUSY; - break; + case 4: /*Attention Register*/ + scsi->attention_pending = val; + scsi->attention_wait = 2; + scsi->status |= STATUS_BUSY; + break; - case 5: /*Basic Control Register*/ - if ((scsi->basic_ctrl & CTRL_RESET) && !(val & CTRL_RESET)) { - spock_log("Spock: SCSI reset and busy\n"); - scsi->in_reset = 1; - scsi->cmd_timer = SPOCK_TIME * 2; - scsi->status |= STATUS_BUSY; - } - scsi->basic_ctrl = val; - spock_rethink_irqs(scsi); - break; - } + case 5: /*Basic Control Register*/ + if ((scsi->basic_ctrl & CTRL_RESET) && !(val & CTRL_RESET)) { + spock_log("Spock: SCSI reset and busy\n"); + scsi->in_reset = 1; + scsi->cmd_timer = SPOCK_TIME * 2; + scsi->status |= STATUS_BUSY; + } + scsi->basic_ctrl = val; + spock_rethink_irqs(scsi); + break; + } } static void spock_writew(uint16_t port, uint16_t val, void *p) { - spock_t *scsi = (spock_t *)p; + spock_t *scsi = (spock_t *) p; - switch (port & 7) { - case 0: /*Command Interface Register*/ - scsi->cir_pending[0] = val & 0xff; - scsi->cir_pending[1] = val >> 8; - scsi->cir_status |= 1; - break; - case 2: /*Command Interface Register*/ - scsi->cir_pending[2] = val & 0xff; - scsi->cir_pending[3] = val >> 8; - scsi->cir_status |= 2; - break; - } + switch (port & 7) { + case 0: /*Command Interface Register*/ + scsi->cir_pending[0] = val & 0xff; + scsi->cir_pending[1] = val >> 8; + scsi->cir_status |= 1; + break; + case 2: /*Command Interface Register*/ + scsi->cir_pending[2] = val & 0xff; + scsi->cir_pending[3] = val >> 8; + scsi->cir_status |= 2; + break; + } - spock_log("spock_writew: port=%04x val=%04x\n", port, val); + spock_log("spock_writew: port=%04x val=%04x\n", port, val); } - static uint8_t spock_read(uint16_t port, void *p) { - spock_t *scsi = (spock_t *)p; - uint8_t temp = 0xff; + spock_t *scsi = (spock_t *) p; + uint8_t temp = 0xff; - switch (port & 7) { - case 0: case 1: case 2: case 3: /*Command Interface Register*/ - temp = scsi->cir_pending[port & 3]; - break; + switch (port & 7) { + case 0: + case 1: + case 2: + case 3: /*Command Interface Register*/ + temp = scsi->cir_pending[port & 3]; + break; - case 4: /*Attention Register*/ - temp = scsi->attention_pending; - break; - case 5: /*Basic Control Register*/ - temp = scsi->basic_ctrl; - break; - case 6: /*IRQ status*/ - temp = scsi->irq_status; - break; - case 7: /*Basic Status Register*/ - temp = scsi->status; - spock_log("Cir Status=%d\n", scsi->cir_status); - if (scsi->cir_status == 0) { - spock_log("Status Cmd Empty\n"); - temp |= STATUS_CMD_EMPTY; - } - else if (scsi->cir_status == 3) { - spock_log("Status Cmd Full\n"); - temp |= STATUS_CMD_FULL; - } - break; - } + case 4: /*Attention Register*/ + temp = scsi->attention_pending; + break; + case 5: /*Basic Control Register*/ + temp = scsi->basic_ctrl; + break; + case 6: /*IRQ status*/ + temp = scsi->irq_status; + break; + case 7: /*Basic Status Register*/ + temp = scsi->status; + spock_log("Cir Status=%d\n", scsi->cir_status); + if (scsi->cir_status == 0) { + spock_log("Status Cmd Empty\n"); + temp |= STATUS_CMD_EMPTY; + } else if (scsi->cir_status == 3) { + spock_log("Status Cmd Full\n"); + temp |= STATUS_CMD_FULL; + } + break; + } - spock_log("spock_read: port=%04x val=%02x %04x(%05x):%04x %02x\n", port, temp, CS, cs, cpu_state.pc, BH); - return temp; + spock_log("spock_read: port=%04x val=%02x %04x(%05x):%04x %02x\n", port, temp, CS, cs, cpu_state.pc, BH); + return temp; } static uint16_t spock_readw(uint16_t port, void *p) { - spock_t *scsi = (spock_t *)p; - uint16_t temp = 0xffff; + spock_t *scsi = (spock_t *) p; + uint16_t temp = 0xffff; - switch (port & 7) { - case 0: /*Command Interface Register*/ - temp = scsi->cir_pending[0] | (scsi->cir_pending[1] << 8); - break; - case 2: /*Command Interface Register*/ - temp = scsi->cir_pending[2] | (scsi->cir_pending[3] << 8); - break; - } + switch (port & 7) { + case 0: /*Command Interface Register*/ + temp = scsi->cir_pending[0] | (scsi->cir_pending[1] << 8); + break; + case 2: /*Command Interface Register*/ + temp = scsi->cir_pending[2] | (scsi->cir_pending[3] << 8); + break; + } - spock_log("spock_readw: port=%04x val=%04x\n", port, temp); - return temp; + spock_log("spock_readw: port=%04x val=%04x\n", port, temp); + return temp; } static void spock_rd_sge(spock_t *scsi, uint32_t Address, SGE *SG) { - dma_bm_read(Address, (uint8_t *)SG, sizeof(SGE), 2); - spock_add_to_period(scsi, sizeof(SGE)); + dma_bm_read(Address, (uint8_t *) SG, sizeof(SGE), 2); + spock_add_to_period(scsi, sizeof(SGE)); } static int spock_get_len(spock_t *scsi, scb_t *scb) { - uint32_t DataToTransfer = 0, i = 0; + uint32_t DataToTransfer = 0, i = 0; - spock_log("Data Buffer write: length %d, pointer 0x%04X\n", - scsi->data_len, scsi->data_ptr); + spock_log("Data Buffer write: length %d, pointer 0x%04X\n", + scsi->data_len, scsi->data_ptr); - if (!scsi->data_len) - return(0); + if (!scsi->data_len) + return (0); - if (scb->enable & ENABLE_PT) { - for (i = 0; i < scsi->data_len; i += 8) { - spock_rd_sge(scsi, scsi->data_ptr + i, &scb->sge); + if (scb->enable & ENABLE_PT) { + for (i = 0; i < scsi->data_len; i += 8) { + spock_rd_sge(scsi, scsi->data_ptr + i, &scb->sge); - DataToTransfer += scb->sge.sys_buf_byte_count; - } - return(DataToTransfer); - } else { - return(scsi->data_len); - } + DataToTransfer += scb->sge.sys_buf_byte_count; + } + return (DataToTransfer); + } else { + return (scsi->data_len); + } } static void spock_process_imm_cmd(spock_t *scsi) { - int i; - int adapter_id, phys_id, lun_id; + int i; + int adapter_id, phys_id, lun_id; switch (scsi->command & CMD_MASK) { case CMD_ASSIGN: adapter_id = (scsi->command >> 16) & 15; - phys_id = (scsi->command >> 20) & 7; - lun_id = (scsi->command >> 24) & 7; - if (adapter_id == 15) { + phys_id = (scsi->command >> 20) & 7; + lun_id = (scsi->command >> 24) & 7; + if (adapter_id == 15) { if (phys_id == 7) /*Device 15 always adapter*/ spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); else /*Can not re-assign device 15 (always adapter)*/ @@ -456,7 +457,7 @@ spock_process_imm_cmd(spock_t *scsi) } else { if (phys_id != scsi->adapter_id) { scsi->dev_id[adapter_id].phys_id = phys_id; - scsi->dev_id[adapter_id].lun_id = lun_id; + scsi->dev_id[adapter_id].lun_id = lun_id; spock_log("Assign: adapter dev=%x scsi ID=%i LUN=%i\n", adapter_id, scsi->dev_id[adapter_id].phys_id, scsi->dev_id[adapter_id].lun_id); spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); } else { /*Can not assign adapter*/ @@ -465,8 +466,8 @@ spock_process_imm_cmd(spock_t *scsi) } } } - break; - case CMD_DMA_PACING_CONTROL: + break; + case CMD_DMA_PACING_CONTROL: scsi->pacing = scsi->cir[2]; spock_log("Pacing control: %i\n", scsi->pacing); spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); @@ -491,7 +492,7 @@ spock_process_imm_cmd(spock_t *scsi) scsi->adapter_reset = 1; scsi->scb_state = 0; - } + } spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_IMM_CMD_COMPLETE); break; @@ -504,17 +505,17 @@ spock_process_imm_cmd(spock_t *scsi) static void spock_execute_cmd(spock_t *scsi, scb_t *scb) { - int c; - int old_scb_state; + int c; + int old_scb_state; - if (scsi->in_reset) { - spock_log("Reset type = %d\n", scsi->in_reset); + if (scsi->in_reset) { + spock_log("Reset type = %d\n", scsi->in_reset); - scsi->status &= ~STATUS_BUSY; - scsi->irq_status = 0; + scsi->status &= ~STATUS_BUSY; + scsi->irq_status = 0; - for (c = 0; c < SCSI_ID_MAX; c++) - spock_clear_irq(scsi, c); + for (c = 0; c < SCSI_ID_MAX; c++) + spock_clear_irq(scsi, c); if (scsi->in_reset == 1) { scsi->basic_ctrl |= CTRL_IRQ_ENA; @@ -522,36 +523,35 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb) } else spock_set_irq(scsi, 0x0f, IRQ_TYPE_RESET_COMPLETE); - /*Reset device mappings*/ - for (c = 0; c < 7; c++) { - scsi->dev_id[c].phys_id = c; - scsi->dev_id[c].lun_id = 0; - } - for (; c < (SCSI_ID_MAX-1); c++) - scsi->dev_id[c].phys_id = -1; + /*Reset device mappings*/ + for (c = 0; c < 7; c++) { + scsi->dev_id[c].phys_id = c; + scsi->dev_id[c].lun_id = 0; + } + for (; c < (SCSI_ID_MAX - 1); c++) + scsi->dev_id[c].phys_id = -1; - scsi->in_reset = 0; - return; - } + scsi->in_reset = 0; + return; + } - if (scsi->in_invalid) { - spock_log("Invalid command\n"); - spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_COMMAND_ERROR); - scsi->in_invalid = 0; - return; - } + if (scsi->in_invalid) { + spock_log("Invalid command\n"); + spock_set_irq(scsi, scsi->attention & 0x0f, IRQ_TYPE_COMMAND_ERROR); + scsi->in_invalid = 0; + return; + } - spock_log("SCB State = %d\n", scsi->scb_state); + spock_log("SCB State = %d\n", scsi->scb_state); - do - { - old_scb_state = scsi->scb_state; + do { + old_scb_state = scsi->scb_state; - switch (scsi->scb_state) { - case 0: /* Idle */ - break; + switch (scsi->scb_state) { + case 0: /* Idle */ + break; - case 1: /* Select */ + case 1: /* Select */ if (scsi->dev_id[scsi->scb_id].phys_id == -1) { uint16_t term_stat_block_addr7 = (0xe << 8) | 0; uint16_t term_stat_block_addr8 = (0xa << 8) | 0; @@ -559,246 +559,246 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb) spock_log("Start failed, SCB ID = %d\n", scsi->scb_id); spock_set_irq(scsi, scsi->scb_id, IRQ_TYPE_COMMAND_FAIL); scsi->scb_state = 0; - dma_bm_write(scb->term_status_block_addr + 0x7*2, (uint8_t *)&term_stat_block_addr7, 2, 2); - dma_bm_write(scb->term_status_block_addr + 0x8*2, (uint8_t *)&term_stat_block_addr8, 2, 2); + dma_bm_write(scb->term_status_block_addr + 0x7 * 2, (uint8_t *) &term_stat_block_addr7, 2, 2); + dma_bm_write(scb->term_status_block_addr + 0x8 * 2, (uint8_t *) &term_stat_block_addr8, 2, 2); break; } - dma_bm_read(scsi->scb_addr, (uint8_t *)&scb->command, 2, 2); - dma_bm_read(scsi->scb_addr + 2, (uint8_t *)&scb->enable, 2, 2); - dma_bm_read(scsi->scb_addr + 4, (uint8_t *)&scb->lba_addr, 4, 2); - dma_bm_read(scsi->scb_addr + 8, (uint8_t *)&scb->sge.sys_buf_addr, 4, 2); - dma_bm_read(scsi->scb_addr + 12, (uint8_t *)&scb->sge.sys_buf_byte_count, 4, 2); - dma_bm_read(scsi->scb_addr + 16, (uint8_t *)&scb->term_status_block_addr, 4, 2); - dma_bm_read(scsi->scb_addr + 20, (uint8_t *)&scb->scb_chain_addr, 4, 2); - dma_bm_read(scsi->scb_addr + 24, (uint8_t *)&scb->block_count, 2, 2); - dma_bm_read(scsi->scb_addr + 26, (uint8_t *)&scb->block_length, 2, 2); + dma_bm_read(scsi->scb_addr, (uint8_t *) &scb->command, 2, 2); + dma_bm_read(scsi->scb_addr + 2, (uint8_t *) &scb->enable, 2, 2); + dma_bm_read(scsi->scb_addr + 4, (uint8_t *) &scb->lba_addr, 4, 2); + dma_bm_read(scsi->scb_addr + 8, (uint8_t *) &scb->sge.sys_buf_addr, 4, 2); + dma_bm_read(scsi->scb_addr + 12, (uint8_t *) &scb->sge.sys_buf_byte_count, 4, 2); + dma_bm_read(scsi->scb_addr + 16, (uint8_t *) &scb->term_status_block_addr, 4, 2); + dma_bm_read(scsi->scb_addr + 20, (uint8_t *) &scb->scb_chain_addr, 4, 2); + dma_bm_read(scsi->scb_addr + 24, (uint8_t *) &scb->block_count, 2, 2); + dma_bm_read(scsi->scb_addr + 26, (uint8_t *) &scb->block_length, 2, 2); - spock_log("SCB : \n" - " Command = %04x\n" - " Enable = %04x\n" - " LBA addr = %08x\n" - " System buffer addr = %08x\n" - " System buffer byte count = %08x\n" - " Terminate status block addr = %08x\n" - " SCB chain address = %08x\n" - " Block count = %04x\n" - " Block length = %04x\n" - " SCB id = %d, Phys id = %d\n", - scb->command, scb->enable, scb->lba_addr, - scb->sge.sys_buf_addr, scb->sge.sys_buf_byte_count, - scb->term_status_block_addr, scb->scb_chain_addr, - scb->block_count, scb->block_length, scsi->scb_id, scsi->dev_id[scsi->scb_id].phys_id); + spock_log("SCB : \n" + " Command = %04x\n" + " Enable = %04x\n" + " LBA addr = %08x\n" + " System buffer addr = %08x\n" + " System buffer byte count = %08x\n" + " Terminate status block addr = %08x\n" + " SCB chain address = %08x\n" + " Block count = %04x\n" + " Block length = %04x\n" + " SCB id = %d, Phys id = %d\n", + scb->command, scb->enable, scb->lba_addr, + scb->sge.sys_buf_addr, scb->sge.sys_buf_byte_count, + scb->term_status_block_addr, scb->scb_chain_addr, + scb->block_count, scb->block_length, scsi->scb_id, scsi->dev_id[scsi->scb_id].phys_id); - switch (scb->command & CMD_MASK) { - case CMD_GET_COMPLETE_STATUS: - { - spock_log("Get Complete Status\n"); - get_complete_stat_t *get_complete_stat = &scsi->get_complete_stat; + switch (scb->command & CMD_MASK) { + case CMD_GET_COMPLETE_STATUS: + { + spock_log("Get Complete Status\n"); + get_complete_stat_t *get_complete_stat = &scsi->get_complete_stat; - get_complete_stat->scb_status = 0x201; - get_complete_stat->retry_count = 0; - get_complete_stat->residual_byte_count = 0; - get_complete_stat->sg_list_element_addr = 0; - get_complete_stat->device_dep_status_len = 0x0c; - get_complete_stat->cmd_status = scsi->cmd_status << 8; - get_complete_stat->error = 0; - get_complete_stat->reserved = 0; - get_complete_stat->cache_info_status = 0; - get_complete_stat->scb_addr = scsi->scb_addr; + get_complete_stat->scb_status = 0x201; + get_complete_stat->retry_count = 0; + get_complete_stat->residual_byte_count = 0; + get_complete_stat->sg_list_element_addr = 0; + get_complete_stat->device_dep_status_len = 0x0c; + get_complete_stat->cmd_status = scsi->cmd_status << 8; + get_complete_stat->error = 0; + get_complete_stat->reserved = 0; + get_complete_stat->cache_info_status = 0; + get_complete_stat->scb_addr = scsi->scb_addr; - dma_bm_write(scb->sge.sys_buf_addr, (uint8_t *)&get_complete_stat->scb_status, 2, 2); - dma_bm_write(scb->sge.sys_buf_addr + 2, (uint8_t *)&get_complete_stat->retry_count, 2, 2); - dma_bm_write(scb->sge.sys_buf_addr + 4, (uint8_t *)&get_complete_stat->residual_byte_count, 4, 2); - dma_bm_write(scb->sge.sys_buf_addr + 8, (uint8_t *)&get_complete_stat->sg_list_element_addr, 4, 2); - dma_bm_write(scb->sge.sys_buf_addr + 12, (uint8_t *)&get_complete_stat->device_dep_status_len, 2, 2); - dma_bm_write(scb->sge.sys_buf_addr + 14, (uint8_t *)&get_complete_stat->cmd_status, 2, 2); - dma_bm_write(scb->sge.sys_buf_addr + 16, (uint8_t *)&get_complete_stat->error, 2, 2); - dma_bm_write(scb->sge.sys_buf_addr + 18, (uint8_t *)&get_complete_stat->reserved, 2, 2); - dma_bm_write(scb->sge.sys_buf_addr + 20, (uint8_t *)&get_complete_stat->cache_info_status, 2, 2); - dma_bm_write(scb->sge.sys_buf_addr + 22, (uint8_t *)&get_complete_stat->scb_addr, 4, 2); - scsi->scb_state = 3; - } - break; + dma_bm_write(scb->sge.sys_buf_addr, (uint8_t *) &get_complete_stat->scb_status, 2, 2); + dma_bm_write(scb->sge.sys_buf_addr + 2, (uint8_t *) &get_complete_stat->retry_count, 2, 2); + dma_bm_write(scb->sge.sys_buf_addr + 4, (uint8_t *) &get_complete_stat->residual_byte_count, 4, 2); + dma_bm_write(scb->sge.sys_buf_addr + 8, (uint8_t *) &get_complete_stat->sg_list_element_addr, 4, 2); + dma_bm_write(scb->sge.sys_buf_addr + 12, (uint8_t *) &get_complete_stat->device_dep_status_len, 2, 2); + dma_bm_write(scb->sge.sys_buf_addr + 14, (uint8_t *) &get_complete_stat->cmd_status, 2, 2); + dma_bm_write(scb->sge.sys_buf_addr + 16, (uint8_t *) &get_complete_stat->error, 2, 2); + dma_bm_write(scb->sge.sys_buf_addr + 18, (uint8_t *) &get_complete_stat->reserved, 2, 2); + dma_bm_write(scb->sge.sys_buf_addr + 20, (uint8_t *) &get_complete_stat->cache_info_status, 2, 2); + dma_bm_write(scb->sge.sys_buf_addr + 22, (uint8_t *) &get_complete_stat->scb_addr, 4, 2); + scsi->scb_state = 3; + } + break; - case CMD_UNKNOWN_1C10: - spock_log("Unknown 1C10\n"); - dma_bm_read(scb->sge.sys_buf_addr, scsi->buf, scb->sge.sys_buf_byte_count, 2); - scsi->scb_state = 3; - break; + case CMD_UNKNOWN_1C10: + spock_log("Unknown 1C10\n"); + dma_bm_read(scb->sge.sys_buf_addr, scsi->buf, scb->sge.sys_buf_byte_count, 2); + scsi->scb_state = 3; + break; - case CMD_UNKNOWN_1C11: - spock_log("Unknown 1C11\n"); - dma_bm_write(scb->sge.sys_buf_addr, scsi->buf, scb->sge.sys_buf_byte_count, 2); - scsi->scb_state = 3; - break; + case CMD_UNKNOWN_1C11: + spock_log("Unknown 1C11\n"); + dma_bm_write(scb->sge.sys_buf_addr, scsi->buf, scb->sge.sys_buf_byte_count, 2); + scsi->scb_state = 3; + break; - case CMD_GET_POS_INFO: - { - spock_log("Get POS Info\n"); - get_pos_info_t *get_pos_info = &scsi->get_pos_info; + case CMD_GET_POS_INFO: + { + spock_log("Get POS Info\n"); + get_pos_info_t *get_pos_info = &scsi->get_pos_info; - get_pos_info->pos = 0x8eff; - get_pos_info->pos1 = scsi->pos_regs[3] | (scsi->pos_regs[2] << 8); - get_pos_info->pos2 = 0x0e | (scsi->pos_regs[4] << 8); - get_pos_info->pos3 = 1 << 12; - get_pos_info->pos4 = (7 << 8) | 8; - get_pos_info->pos5 = (16 << 8) | scsi->pacing; - get_pos_info->pos6 = (30 << 8) | 1; - get_pos_info->pos7 = 0; - get_pos_info->pos8 = 0; + get_pos_info->pos = 0x8eff; + get_pos_info->pos1 = scsi->pos_regs[3] | (scsi->pos_regs[2] << 8); + get_pos_info->pos2 = 0x0e | (scsi->pos_regs[4] << 8); + get_pos_info->pos3 = 1 << 12; + get_pos_info->pos4 = (7 << 8) | 8; + get_pos_info->pos5 = (16 << 8) | scsi->pacing; + get_pos_info->pos6 = (30 << 8) | 1; + get_pos_info->pos7 = 0; + get_pos_info->pos8 = 0; - dma_bm_write(scb->sge.sys_buf_addr, (uint8_t *)&get_pos_info->pos, 2, 2); - dma_bm_write(scb->sge.sys_buf_addr + 2, (uint8_t *)&get_pos_info->pos1, 2, 2); - dma_bm_write(scb->sge.sys_buf_addr + 4, (uint8_t *)&get_pos_info->pos2, 2, 2); - dma_bm_write(scb->sge.sys_buf_addr + 6, (uint8_t *)&get_pos_info->pos3, 2, 2); - dma_bm_write(scb->sge.sys_buf_addr + 8, (uint8_t *)&get_pos_info->pos4, 2, 2); - dma_bm_write(scb->sge.sys_buf_addr + 10, (uint8_t *)&get_pos_info->pos5, 2, 2); - dma_bm_write(scb->sge.sys_buf_addr + 12, (uint8_t *)&get_pos_info->pos6, 2, 2); - dma_bm_write(scb->sge.sys_buf_addr + 14, (uint8_t *)&get_pos_info->pos7, 2, 2); - dma_bm_write(scb->sge.sys_buf_addr + 16, (uint8_t *)&get_pos_info->pos8, 2, 2); - scsi->scb_state = 3; - } - break; + dma_bm_write(scb->sge.sys_buf_addr, (uint8_t *) &get_pos_info->pos, 2, 2); + dma_bm_write(scb->sge.sys_buf_addr + 2, (uint8_t *) &get_pos_info->pos1, 2, 2); + dma_bm_write(scb->sge.sys_buf_addr + 4, (uint8_t *) &get_pos_info->pos2, 2, 2); + dma_bm_write(scb->sge.sys_buf_addr + 6, (uint8_t *) &get_pos_info->pos3, 2, 2); + dma_bm_write(scb->sge.sys_buf_addr + 8, (uint8_t *) &get_pos_info->pos4, 2, 2); + dma_bm_write(scb->sge.sys_buf_addr + 10, (uint8_t *) &get_pos_info->pos5, 2, 2); + dma_bm_write(scb->sge.sys_buf_addr + 12, (uint8_t *) &get_pos_info->pos6, 2, 2); + dma_bm_write(scb->sge.sys_buf_addr + 14, (uint8_t *) &get_pos_info->pos7, 2, 2); + dma_bm_write(scb->sge.sys_buf_addr + 16, (uint8_t *) &get_pos_info->pos8, 2, 2); + scsi->scb_state = 3; + } + break; - case CMD_DEVICE_INQUIRY: - if (scb->command != CMD_DEVICE_INQUIRY) + case CMD_DEVICE_INQUIRY: + if (scb->command != CMD_DEVICE_INQUIRY) scsi->cdb_id = scsi->scb_id; else scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; - spock_log("Device Inquiry, ID=%d\n", scsi->cdb_id); - scsi->cdb[0] = GPCMD_INQUIRY; - scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ - scsi->cdb[2] = 0; /*Page code*/ - scsi->cdb[3] = 0; - scsi->cdb[4] = scb->sge.sys_buf_byte_count; /*Allocation length*/ - scsi->cdb[5] = 0; /*Control*/ - scsi->cdb_len = 6; - scsi->data_ptr = scb->sge.sys_buf_addr; - scsi->data_len = scb->sge.sys_buf_byte_count; - scsi->scsi_state = SCSI_STATE_SELECT; - scsi->scb_state = 2; - return; + spock_log("Device Inquiry, ID=%d\n", scsi->cdb_id); + scsi->cdb[0] = GPCMD_INQUIRY; + scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ + scsi->cdb[2] = 0; /*Page code*/ + scsi->cdb[3] = 0; + scsi->cdb[4] = scb->sge.sys_buf_byte_count; /*Allocation length*/ + scsi->cdb[5] = 0; /*Control*/ + scsi->cdb_len = 6; + scsi->data_ptr = scb->sge.sys_buf_addr; + scsi->data_len = scb->sge.sys_buf_byte_count; + scsi->scsi_state = SCSI_STATE_SELECT; + scsi->scb_state = 2; + return; - case CMD_SEND_OTHER_SCSI: - if (scb->command != CMD_SEND_OTHER_SCSI) + case CMD_SEND_OTHER_SCSI: + if (scb->command != CMD_SEND_OTHER_SCSI) scsi->cdb_id = scsi->scb_id; else scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; - spock_log("Send Other SCSI, SCB ID=%d, PHYS ID=%d, reset=%d\n", scsi->scb_id, scsi->dev_id[scsi->scb_id].phys_id, scsi->adapter_reset); - dma_bm_read(scsi->scb_addr + 0x18, scsi->cdb, 12, 2); - scsi->cdb[1] = (scsi->cdb[1] & 0x1f) | (scsi->dev_id[scsi->scb_id].lun_id << 5); /*Patch correct LUN into command*/ - scsi->cdb_len = (scb->lba_addr & 0xff) ? (scb->lba_addr & 0xff) : 6; - scsi->scsi_state = SCSI_STATE_SELECT; - scsi->scb_state = 2; - return; + spock_log("Send Other SCSI, SCB ID=%d, PHYS ID=%d, reset=%d\n", scsi->scb_id, scsi->dev_id[scsi->scb_id].phys_id, scsi->adapter_reset); + dma_bm_read(scsi->scb_addr + 0x18, scsi->cdb, 12, 2); + scsi->cdb[1] = (scsi->cdb[1] & 0x1f) | (scsi->dev_id[scsi->scb_id].lun_id << 5); /*Patch correct LUN into command*/ + scsi->cdb_len = (scb->lba_addr & 0xff) ? (scb->lba_addr & 0xff) : 6; + scsi->scsi_state = SCSI_STATE_SELECT; + scsi->scb_state = 2; + return; - case CMD_READ_DEVICE_CAPACITY: - if (scb->command != CMD_READ_DEVICE_CAPACITY) + case CMD_READ_DEVICE_CAPACITY: + if (scb->command != CMD_READ_DEVICE_CAPACITY) scsi->cdb_id = scsi->scb_id; else scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; - spock_log("Device Capacity, SCB ID=%d, PHYS ID=%d, reset=%d\n", scsi->scb_id, scsi->dev_id[scsi->scb_id].phys_id, scsi->adapter_reset); - scsi->cdb[0] = GPCMD_READ_CDROM_CAPACITY; - scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ - scsi->cdb[2] = 0; /*LBA*/ - scsi->cdb[3] = 0; - scsi->cdb[4] = 0; - scsi->cdb[5] = 0; - scsi->cdb[6] = 0; /*Reserved*/ - scsi->cdb[7] = 0; - scsi->cdb[8] = 0; - scsi->cdb[9] = 0; /*Control*/ - scsi->cdb_len = 10; - scsi->scsi_state = SCSI_STATE_SELECT; - scsi->scb_state = 2; - return; + spock_log("Device Capacity, SCB ID=%d, PHYS ID=%d, reset=%d\n", scsi->scb_id, scsi->dev_id[scsi->scb_id].phys_id, scsi->adapter_reset); + scsi->cdb[0] = GPCMD_READ_CDROM_CAPACITY; + scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ + scsi->cdb[2] = 0; /*LBA*/ + scsi->cdb[3] = 0; + scsi->cdb[4] = 0; + scsi->cdb[5] = 0; + scsi->cdb[6] = 0; /*Reserved*/ + scsi->cdb[7] = 0; + scsi->cdb[8] = 0; + scsi->cdb[9] = 0; /*Control*/ + scsi->cdb_len = 10; + scsi->scsi_state = SCSI_STATE_SELECT; + scsi->scb_state = 2; + return; - case CMD_READ_DATA: - if (scb->command != CMD_READ_DATA) + case CMD_READ_DATA: + if (scb->command != CMD_READ_DATA) scsi->cdb_id = scsi->scb_id; else scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; - spock_log("Device Read Data, SCB ID=%d, PHYS ID=%d, reset=%d\n", scsi->scb_id, scsi->dev_id[scsi->scb_id].phys_id, scsi->adapter_reset); - scsi->cdb[0] = GPCMD_READ_10; - scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ - scsi->cdb[2] = (scb->lba_addr >> 24) & 0xff; /*LBA*/ - scsi->cdb[3] = (scb->lba_addr >> 16) & 0xff; - scsi->cdb[4] = (scb->lba_addr >> 8) & 0xff; - scsi->cdb[5] = scb->lba_addr & 0xff; - scsi->cdb[6] = 0; /*Reserved*/ - scsi->cdb[7] = (scb->block_count >> 8) & 0xff; - scsi->cdb[8] = scb->block_count & 0xff; - scsi->cdb[9] = 0; /*Control*/ - scsi->cdb_len = 10; - scsi->scsi_state = SCSI_STATE_SELECT; - scsi->scb_state = 2; - return; + spock_log("Device Read Data, SCB ID=%d, PHYS ID=%d, reset=%d\n", scsi->scb_id, scsi->dev_id[scsi->scb_id].phys_id, scsi->adapter_reset); + scsi->cdb[0] = GPCMD_READ_10; + scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ + scsi->cdb[2] = (scb->lba_addr >> 24) & 0xff; /*LBA*/ + scsi->cdb[3] = (scb->lba_addr >> 16) & 0xff; + scsi->cdb[4] = (scb->lba_addr >> 8) & 0xff; + scsi->cdb[5] = scb->lba_addr & 0xff; + scsi->cdb[6] = 0; /*Reserved*/ + scsi->cdb[7] = (scb->block_count >> 8) & 0xff; + scsi->cdb[8] = scb->block_count & 0xff; + scsi->cdb[9] = 0; /*Control*/ + scsi->cdb_len = 10; + scsi->scsi_state = SCSI_STATE_SELECT; + scsi->scb_state = 2; + return; - case CMD_WRITE_DATA: - if (scb->command != CMD_WRITE_DATA) + case CMD_WRITE_DATA: + if (scb->command != CMD_WRITE_DATA) scsi->cdb_id = scsi->scb_id; else scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; - spock_log("Device Write Data\n"); - scsi->cdb[0] = GPCMD_WRITE_10; - scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ - scsi->cdb[2] = (scb->lba_addr >> 24) & 0xff; /*LBA*/ - scsi->cdb[3] = (scb->lba_addr >> 16) & 0xff; - scsi->cdb[4] = (scb->lba_addr >> 8) & 0xff; - scsi->cdb[5] = scb->lba_addr & 0xff; - scsi->cdb[6] = 0; /*Reserved*/ - scsi->cdb[7] = (scb->block_count >> 8) & 0xff; - scsi->cdb[8] = scb->block_count & 0xff; - scsi->cdb[9] = 0; /*Control*/ - scsi->cdb_len = 10; - scsi->scsi_state = SCSI_STATE_SELECT; - scsi->scb_state = 2; - return; + spock_log("Device Write Data\n"); + scsi->cdb[0] = GPCMD_WRITE_10; + scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ + scsi->cdb[2] = (scb->lba_addr >> 24) & 0xff; /*LBA*/ + scsi->cdb[3] = (scb->lba_addr >> 16) & 0xff; + scsi->cdb[4] = (scb->lba_addr >> 8) & 0xff; + scsi->cdb[5] = scb->lba_addr & 0xff; + scsi->cdb[6] = 0; /*Reserved*/ + scsi->cdb[7] = (scb->block_count >> 8) & 0xff; + scsi->cdb[8] = scb->block_count & 0xff; + scsi->cdb[9] = 0; /*Control*/ + scsi->cdb_len = 10; + scsi->scsi_state = SCSI_STATE_SELECT; + scsi->scb_state = 2; + return; - case CMD_VERIFY: - if (scb->command != CMD_VERIFY) + case CMD_VERIFY: + if (scb->command != CMD_VERIFY) scsi->cdb_id = scsi->scb_id; else scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; - spock_log("Device Verify\n"); - scsi->cdb[0] = GPCMD_VERIFY_10; - scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ - scsi->cdb[2] = (scb->lba_addr >> 24) & 0xff; /*LBA*/ - scsi->cdb[3] = (scb->lba_addr >> 16) & 0xff; - scsi->cdb[4] = (scb->lba_addr >> 8) & 0xff; - scsi->cdb[5] = scb->lba_addr & 0xff; - scsi->cdb[6] = 0; /*Reserved*/ - scsi->cdb[7] = (scb->block_count >> 8) & 0xff; - scsi->cdb[8] = scb->block_count & 0xff; - scsi->cdb[9] = 0; /*Control*/ - scsi->cdb_len = 10; - scsi->data_len = 0; - scsi->scsi_state = SCSI_STATE_SELECT; - scsi->scb_state = 2; - return; + spock_log("Device Verify\n"); + scsi->cdb[0] = GPCMD_VERIFY_10; + scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ + scsi->cdb[2] = (scb->lba_addr >> 24) & 0xff; /*LBA*/ + scsi->cdb[3] = (scb->lba_addr >> 16) & 0xff; + scsi->cdb[4] = (scb->lba_addr >> 8) & 0xff; + scsi->cdb[5] = scb->lba_addr & 0xff; + scsi->cdb[6] = 0; /*Reserved*/ + scsi->cdb[7] = (scb->block_count >> 8) & 0xff; + scsi->cdb[8] = scb->block_count & 0xff; + scsi->cdb[9] = 0; /*Control*/ + scsi->cdb_len = 10; + scsi->data_len = 0; + scsi->scsi_state = SCSI_STATE_SELECT; + scsi->scb_state = 2; + return; - case CMD_REQUEST_SENSE: - if (scb->command != CMD_REQUEST_SENSE) + case CMD_REQUEST_SENSE: + if (scb->command != CMD_REQUEST_SENSE) scsi->cdb_id = scsi->scb_id; else scsi->cdb_id = scsi->dev_id[scsi->scb_id].phys_id; - spock_log("Device Request Sense, ID=%d\n", scsi->cdb_id); - scsi->cdb[0] = GPCMD_REQUEST_SENSE; - scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ - scsi->cdb[2] = 0; - scsi->cdb[3] = 0; - scsi->cdb[4] = scb->sge.sys_buf_byte_count; /*Allocation length*/ - scsi->cdb[5] = 0; - scsi->cdb_len = 6; - scsi->scsi_state = SCSI_STATE_SELECT; - scsi->scb_state = 2; - return; - } - break; + spock_log("Device Request Sense, ID=%d\n", scsi->cdb_id); + scsi->cdb[0] = GPCMD_REQUEST_SENSE; + scsi->cdb[1] = scsi->dev_id[scsi->scb_id].lun_id << 5; /*LUN*/ + scsi->cdb[2] = 0; + scsi->cdb[3] = 0; + scsi->cdb[4] = scb->sge.sys_buf_byte_count; /*Allocation length*/ + scsi->cdb[5] = 0; + scsi->cdb_len = 6; + scsi->scsi_state = SCSI_STATE_SELECT; + scsi->scb_state = 2; + return; + } + break; - case 2: /* Wait */ - if (scsi->scsi_state == SCSI_STATE_IDLE) { + case 2: /* Wait */ + if (scsi->scsi_state == SCSI_STATE_IDLE) { if (scsi_device_present(&scsi_devices[scsi->bus][scsi->cdb_id])) { if (scsi->last_status == SCSI_STATUS_OK) { scsi->scb_state = 3; @@ -812,10 +812,10 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb) spock_set_irq(scsi, scsi->scb_id, IRQ_TYPE_COMMAND_FAIL); scsi->scb_state = 0; spock_log("Status Check Condition on device ID %d, reset = %d\n", scsi->scb_id, scsi->adapter_reset); - dma_bm_write(scb->term_status_block_addr + 0x7*2, (uint8_t *)&term_stat_block_addr7, 2, 2); - dma_bm_write(scb->term_status_block_addr + 0x8*2, (uint8_t *)&term_stat_block_addr8, 2, 2); - dma_bm_write(scb->term_status_block_addr + 0xb*2, (uint8_t *)&term_stat_block_addrb, 2, 2); - dma_bm_write(scb->term_status_block_addr + 0xc*2, (uint8_t *)&term_stat_block_addrc, 2, 2); + dma_bm_write(scb->term_status_block_addr + 0x7 * 2, (uint8_t *) &term_stat_block_addr7, 2, 2); + dma_bm_write(scb->term_status_block_addr + 0x8 * 2, (uint8_t *) &term_stat_block_addr8, 2, 2); + dma_bm_write(scb->term_status_block_addr + 0xb * 2, (uint8_t *) &term_stat_block_addrb, 2, 2); + dma_bm_write(scb->term_status_block_addr + 0xc * 2, (uint8_t *) &term_stat_block_addrc, 2, 2); } } else { uint16_t term_stat_block_addr7 = (0xc << 8) | 2; @@ -823,343 +823,343 @@ spock_execute_cmd(spock_t *scsi, scb_t *scb) spock_set_irq(scsi, scsi->scb_id, IRQ_TYPE_COMMAND_FAIL); scsi->scb_state = 0; spock_log("Status Check Condition on device ID %d on no device, reset = %d\n", scsi->scb_id, scsi->adapter_reset); - dma_bm_write(scb->term_status_block_addr + 0x7*2, (uint8_t *)&term_stat_block_addr7, 2, 2); - dma_bm_write(scb->term_status_block_addr + 0x8*2, (uint8_t *)&term_stat_block_addr8, 2, 2); + dma_bm_write(scb->term_status_block_addr + 0x7 * 2, (uint8_t *) &term_stat_block_addr7, 2, 2); + dma_bm_write(scb->term_status_block_addr + 0x8 * 2, (uint8_t *) &term_stat_block_addr8, 2, 2); } - } - break; + } + break; - case 3: /* Complete */ - if (scb->enable & 1) { - scsi->scb_state = 1; - scsi->scb_addr = scb->scb_chain_addr; - spock_log("Next SCB - %08x\n", scsi->scb_addr); - } else { - spock_set_irq(scsi, scsi->scb_id, IRQ_TYPE_SCB_COMPLETE); - scsi->scb_state = 0; - spock_log("Complete SCB\n"); - } - break; - } - } while (scsi->scb_state != old_scb_state); + case 3: /* Complete */ + if (scb->enable & 1) { + scsi->scb_state = 1; + scsi->scb_addr = scb->scb_chain_addr; + spock_log("Next SCB - %08x\n", scsi->scb_addr); + } else { + spock_set_irq(scsi, scsi->scb_id, IRQ_TYPE_SCB_COMPLETE); + scsi->scb_state = 0; + spock_log("Complete SCB\n"); + } + break; + } + } while (scsi->scb_state != old_scb_state); } static void spock_process_scsi(spock_t *scsi, scb_t *scb) { - int c; - double p; - scsi_device_t *sd; + int c; + double p; + scsi_device_t *sd; - switch (scsi->scsi_state) { - case SCSI_STATE_IDLE: - break; + switch (scsi->scsi_state) { + case SCSI_STATE_IDLE: + break; - case SCSI_STATE_SELECT: - spock_log("Selecting ID %d\n", scsi->cdb_id); - if ((scsi->cdb_id != (uint8_t)-1) && scsi_device_present(&scsi_devices[scsi->bus][scsi->cdb_id])) { - scsi->scsi_state = SCSI_STATE_SEND_COMMAND; - spock_log("Device selected at ID %i\n", scsi->cdb_id); - } else { - spock_log("Device selection failed at ID %i\n", scsi->cdb_id); - scsi->scsi_state = SCSI_STATE_IDLE; - if (!scsi->cmd_timer) { - spock_log("Callback to reset\n"); - scsi->cmd_timer = 1; - } - spock_add_to_period(scsi, 1); - } - break; + case SCSI_STATE_SELECT: + spock_log("Selecting ID %d\n", scsi->cdb_id); + if ((scsi->cdb_id != (uint8_t) -1) && scsi_device_present(&scsi_devices[scsi->bus][scsi->cdb_id])) { + scsi->scsi_state = SCSI_STATE_SEND_COMMAND; + spock_log("Device selected at ID %i\n", scsi->cdb_id); + } else { + spock_log("Device selection failed at ID %i\n", scsi->cdb_id); + scsi->scsi_state = SCSI_STATE_IDLE; + if (!scsi->cmd_timer) { + spock_log("Callback to reset\n"); + scsi->cmd_timer = 1; + } + spock_add_to_period(scsi, 1); + } + break; - case SCSI_STATE_SEND_COMMAND: - sd = &scsi_devices[scsi->bus][scsi->cdb_id]; - memset(scsi->temp_cdb, 0x00, 12); + case SCSI_STATE_SEND_COMMAND: + sd = &scsi_devices[scsi->bus][scsi->cdb_id]; + memset(scsi->temp_cdb, 0x00, 12); - if (scsi->cdb_len < 12) { - memcpy(scsi->temp_cdb, scsi->cdb, - scsi->cdb_len); - spock_add_to_period(scsi, scsi->cdb_len); - } else { - memcpy(scsi->temp_cdb, scsi->cdb, - 12); - spock_add_to_period(scsi, 12); - } + if (scsi->cdb_len < 12) { + memcpy(scsi->temp_cdb, scsi->cdb, + scsi->cdb_len); + spock_add_to_period(scsi, scsi->cdb_len); + } else { + memcpy(scsi->temp_cdb, scsi->cdb, + 12); + spock_add_to_period(scsi, 12); + } - scsi->data_ptr = scb->sge.sys_buf_addr; - scsi->data_len = scb->sge.sys_buf_byte_count; + scsi->data_ptr = scb->sge.sys_buf_addr; + scsi->data_len = scb->sge.sys_buf_byte_count; - if (scb->enable & 0x400) - sd->buffer_length = -1; - else - sd->buffer_length = spock_get_len(scsi, scb); + if (scb->enable & 0x400) + sd->buffer_length = -1; + else + sd->buffer_length = spock_get_len(scsi, scb); - scsi_device_command_phase0(sd, scsi->temp_cdb); - spock_log("SCSI ID %i: Current CDB[0] = %02x, LUN = %i, data len = %i, max len = %i, phase val = %02x\n", scsi->cdb_id, scsi->temp_cdb[0], scsi->temp_cdb[1] >> 5, sd->buffer_length, spock_get_len(scsi, scb), sd->phase); + scsi_device_command_phase0(sd, scsi->temp_cdb); + spock_log("SCSI ID %i: Current CDB[0] = %02x, LUN = %i, data len = %i, max len = %i, phase val = %02x\n", scsi->cdb_id, scsi->temp_cdb[0], scsi->temp_cdb[1] >> 5, sd->buffer_length, spock_get_len(scsi, scb), sd->phase); - if (sd->phase != SCSI_PHASE_STATUS && sd->buffer_length > 0) { - p = scsi_device_get_callback(sd); - if (p <= 0.0) - spock_add_to_period(scsi, sd->buffer_length); - else - scsi->media_period += p; + if (sd->phase != SCSI_PHASE_STATUS && sd->buffer_length > 0) { + p = scsi_device_get_callback(sd); + if (p <= 0.0) + spock_add_to_period(scsi, sd->buffer_length); + else + scsi->media_period += p; - if (scb->enable & ENABLE_PT) { - int32_t buflen = sd->buffer_length; - int sg_pos = 0; - uint32_t DataTx = 0; - uint32_t Address; + if (scb->enable & ENABLE_PT) { + int32_t buflen = sd->buffer_length; + int sg_pos = 0; + uint32_t DataTx = 0; + uint32_t Address; - if (scb->sge.sys_buf_byte_count > 0) { - for (c = 0; c < scsi->data_len; c += 8) { - spock_rd_sge(scsi, scsi->data_ptr + c, &scb->sge); + if (scb->sge.sys_buf_byte_count > 0) { + for (c = 0; c < scsi->data_len; c += 8) { + spock_rd_sge(scsi, scsi->data_ptr + c, &scb->sge); - Address = scb->sge.sys_buf_addr; - DataTx = MIN((int) scb->sge.sys_buf_byte_count, buflen); + Address = scb->sge.sys_buf_addr; + DataTx = MIN((int) scb->sge.sys_buf_byte_count, buflen); - if ((sd->phase == SCSI_PHASE_DATA_IN) && DataTx) { - spock_log("Writing S/G segment %i: length %i, pointer %08X\n", c, DataTx, Address); - dma_bm_write(Address, &sd->sc->temp_buffer[sg_pos], DataTx, 2); - } else if ((sd->phase == SCSI_PHASE_DATA_OUT) && DataTx) { - spock_log("Reading S/G segment %i: length %i, pointer %08X\n", c, DataTx, Address); - dma_bm_read(Address, &sd->sc->temp_buffer[sg_pos], DataTx, 2); - } + if ((sd->phase == SCSI_PHASE_DATA_IN) && DataTx) { + spock_log("Writing S/G segment %i: length %i, pointer %08X\n", c, DataTx, Address); + dma_bm_write(Address, &sd->sc->temp_buffer[sg_pos], DataTx, 2); + } else if ((sd->phase == SCSI_PHASE_DATA_OUT) && DataTx) { + spock_log("Reading S/G segment %i: length %i, pointer %08X\n", c, DataTx, Address); + dma_bm_read(Address, &sd->sc->temp_buffer[sg_pos], DataTx, 2); + } - sg_pos += scb->sge.sys_buf_byte_count; - buflen -= scb->sge.sys_buf_byte_count; + sg_pos += scb->sge.sys_buf_byte_count; + buflen -= scb->sge.sys_buf_byte_count; - if (buflen < 0) - buflen = 0; - } - } - } else { - spock_log("Normal Transfer\n"); - if (sd->phase == SCSI_PHASE_DATA_IN) { - dma_bm_write(scsi->data_ptr, sd->sc->temp_buffer, MIN(sd->buffer_length, (int)scsi->data_len), 2); - } else if (sd->phase == SCSI_PHASE_DATA_OUT) - dma_bm_read(scsi->data_ptr, sd->sc->temp_buffer, MIN(sd->buffer_length, (int)scsi->data_len), 2); - } + if (buflen < 0) + buflen = 0; + } + } + } else { + spock_log("Normal Transfer\n"); + if (sd->phase == SCSI_PHASE_DATA_IN) { + dma_bm_write(scsi->data_ptr, sd->sc->temp_buffer, MIN(sd->buffer_length, (int) scsi->data_len), 2); + } else if (sd->phase == SCSI_PHASE_DATA_OUT) + dma_bm_read(scsi->data_ptr, sd->sc->temp_buffer, MIN(sd->buffer_length, (int) scsi->data_len), 2); + } - scsi_device_command_phase1(sd); - } - scsi->last_status = sd->status; - scsi->scsi_state = SCSI_STATE_END_PHASE; - break; + scsi_device_command_phase1(sd); + } + scsi->last_status = sd->status; + scsi->scsi_state = SCSI_STATE_END_PHASE; + break; - case SCSI_STATE_END_PHASE: - scsi->scsi_state = SCSI_STATE_IDLE; + case SCSI_STATE_END_PHASE: + scsi->scsi_state = SCSI_STATE_IDLE; - spock_log("State to idle, cmd timer %d\n", scsi->cmd_timer); - if (!scsi->cmd_timer) { - scsi->cmd_timer = 1; - } - spock_add_to_period(scsi, 1); - break; - } + spock_log("State to idle, cmd timer %d\n", scsi->cmd_timer); + if (!scsi->cmd_timer) { + scsi->cmd_timer = 1; + } + spock_add_to_period(scsi, 1); + break; + } } static void spock_callback(void *priv) { - double period; - spock_t *scsi = (spock_t *)priv; - scb_t *scb = &scsi->scb; + double period; + spock_t *scsi = (spock_t *) priv; + scb_t *scb = &scsi->scb; - scsi->temp_period = 0; - scsi->media_period = 0.0; + scsi->temp_period = 0; + scsi->media_period = 0.0; - if (scsi->cmd_timer) { - scsi->cmd_timer--; - if (!scsi->cmd_timer) { - spock_execute_cmd(scsi, scb); - } - } + if (scsi->cmd_timer) { + scsi->cmd_timer--; + if (!scsi->cmd_timer) { + spock_execute_cmd(scsi, scb); + } + } - if (scsi->attention_wait && - (scsi->scb_state == 0 || (scsi->attention_pending & 0xf0) == 0xe0)) { - scsi->attention_wait--; - if (!scsi->attention_wait) { - scsi->attention = scsi->attention_pending; - scsi->status &= ~STATUS_BUSY; - scsi->cir[0] = scsi->cir_pending[0]; - scsi->cir[1] = scsi->cir_pending[1]; - scsi->cir[2] = scsi->cir_pending[2]; - scsi->cir[3] = scsi->cir_pending[3]; - scsi->cir_status = 0; + if (scsi->attention_wait && (scsi->scb_state == 0 || (scsi->attention_pending & 0xf0) == 0xe0)) { + scsi->attention_wait--; + if (!scsi->attention_wait) { + scsi->attention = scsi->attention_pending; + scsi->status &= ~STATUS_BUSY; + scsi->cir[0] = scsi->cir_pending[0]; + scsi->cir[1] = scsi->cir_pending[1]; + scsi->cir[2] = scsi->cir_pending[2]; + scsi->cir[3] = scsi->cir_pending[3]; + scsi->cir_status = 0; - switch (scsi->attention >> 4) { - case 1: /*Immediate command*/ - scsi->cmd_status = 0x0a; - scsi->command = scsi->cir[0] | (scsi->cir[1] << 8) | (scsi->cir[2] << 16) | (scsi->cir[3] << 24); - switch (scsi->command & CMD_MASK) { - case CMD_ASSIGN: - case CMD_DMA_PACING_CONTROL: - case CMD_FEATURE_CONTROL: - case CMD_INVALID_412: - case CMD_RESET: - spock_process_imm_cmd(scsi); - break; - } - break; + switch (scsi->attention >> 4) { + case 1: /*Immediate command*/ + scsi->cmd_status = 0x0a; + scsi->command = scsi->cir[0] | (scsi->cir[1] << 8) | (scsi->cir[2] << 16) | (scsi->cir[3] << 24); + switch (scsi->command & CMD_MASK) { + case CMD_ASSIGN: + case CMD_DMA_PACING_CONTROL: + case CMD_FEATURE_CONTROL: + case CMD_INVALID_412: + case CMD_RESET: + spock_process_imm_cmd(scsi); + break; + } + break; - case 3: case 4: case 0x0f: /*Start SCB*/ - scsi->cmd_status = 1; - scsi->scb_addr = scsi->cir[0] | (scsi->cir[1] << 8) | (scsi->cir[2] << 16) | (scsi->cir[3] << 24); - scsi->scb_id = scsi->attention & 0x0f; - scsi->cmd_timer = SPOCK_TIME * 2; - spock_log("Start SCB at ID = %d\n", scsi->scb_id); - scsi->scb_state = 1; - break; + case 3: + case 4: + case 0x0f: /*Start SCB*/ + scsi->cmd_status = 1; + scsi->scb_addr = scsi->cir[0] | (scsi->cir[1] << 8) | (scsi->cir[2] << 16) | (scsi->cir[3] << 24); + scsi->scb_id = scsi->attention & 0x0f; + scsi->cmd_timer = SPOCK_TIME * 2; + spock_log("Start SCB at ID = %d\n", scsi->scb_id); + scsi->scb_state = 1; + break; - case 5: /*Invalid*/ - case 0x0a: /*Invalid*/ - scsi->in_invalid = 1; - scsi->cmd_timer = SPOCK_TIME * 2; - break; + case 5: /*Invalid*/ + case 0x0a: /*Invalid*/ + scsi->in_invalid = 1; + scsi->cmd_timer = SPOCK_TIME * 2; + break; - case 0x0e: /*EOI*/ - scsi->irq_status = 0; - spock_clear_irq(scsi, scsi->attention & 0xf); - break; - } - } - } + case 0x0e: /*EOI*/ + scsi->irq_status = 0; + spock_clear_irq(scsi, scsi->attention & 0xf); + break; + } + } + } - spock_process_scsi(scsi, scb); + spock_process_scsi(scsi, scb); - period = 0.2 * ((double) scsi->temp_period); - timer_on(&scsi->callback_timer, (scsi->media_period + period + 10.0), 0); - spock_log("Temporary period: %lf us (%" PRIi64 " periods)\n", scsi->callback_timer.period, scsi->temp_period); + period = 0.2 * ((double) scsi->temp_period); + timer_on(&scsi->callback_timer, (scsi->media_period + period + 10.0), 0); + spock_log("Temporary period: %lf us (%" PRIi64 " periods)\n", scsi->callback_timer.period, scsi->temp_period); } static void spock_mca_write(int port, uint8_t val, void *priv) { - spock_t *scsi = (spock_t *)priv; + spock_t *scsi = (spock_t *) priv; - if (port < 0x102) - return; + if (port < 0x102) + return; - io_removehandler((((scsi->pos_regs[2] >> 1) & 7) * 8) + 0x3540, 0x0008, spock_read, spock_readw, NULL, spock_write, spock_writew, NULL, scsi); - mem_mapping_disable(&scsi->bios_rom.mapping); + io_removehandler((((scsi->pos_regs[2] >> 1) & 7) * 8) + 0x3540, 0x0008, spock_read, spock_readw, NULL, spock_write, spock_writew, NULL, scsi); + mem_mapping_disable(&scsi->bios_rom.mapping); - scsi->pos_regs[port & 7] = val; + scsi->pos_regs[port & 7] = val; - scsi->adapter_id = (scsi->pos_regs[3] & 0xe0) >> 5; + scsi->adapter_id = (scsi->pos_regs[3] & 0xe0) >> 5; - if (scsi->pos_regs[2] & 1) { - io_sethandler((((scsi->pos_regs[2] >> 1) & 7) * 8) + 0x3540, 0x0008, spock_read, spock_readw, NULL, spock_write, spock_writew, NULL, scsi); - if ((scsi->pos_regs[2] >> 4) == 0x0f) - mem_mapping_disable(&scsi->bios_rom.mapping); - else { - mem_mapping_set_addr(&scsi->bios_rom.mapping, ((scsi->pos_regs[2] >> 4) * 0x2000) + 0xc0000, 0x8000); - } + if (scsi->pos_regs[2] & 1) { + io_sethandler((((scsi->pos_regs[2] >> 1) & 7) * 8) + 0x3540, 0x0008, spock_read, spock_readw, NULL, spock_write, spock_writew, NULL, scsi); + if ((scsi->pos_regs[2] >> 4) == 0x0f) + mem_mapping_disable(&scsi->bios_rom.mapping); + else { + mem_mapping_set_addr(&scsi->bios_rom.mapping, ((scsi->pos_regs[2] >> 4) * 0x2000) + 0xc0000, 0x8000); } + } } static uint8_t spock_mca_read(int port, void *priv) { - spock_t *scsi = (spock_t *)priv; + spock_t *scsi = (spock_t *) priv; - return scsi->pos_regs[port & 7]; + return scsi->pos_regs[port & 7]; } static uint8_t spock_mca_feedb(void *priv) { - spock_t *scsi = (spock_t *)priv; + spock_t *scsi = (spock_t *) priv; - return (scsi->pos_regs[2] & 0x01); + return (scsi->pos_regs[2] & 0x01); } static void spock_mca_reset(void *priv) { - spock_t *scsi = (spock_t *)priv; - int i; + spock_t *scsi = (spock_t *) priv; + int i; - scsi->in_reset = 2; - scsi->cmd_timer = SPOCK_TIME * 50; - scsi->status = STATUS_BUSY; - scsi->scsi_state = SCSI_STATE_IDLE; - scsi->scb_state = 0; - scsi->in_invalid = 0; - scsi->attention_wait = 0; - scsi->basic_ctrl = 0; + scsi->in_reset = 2; + scsi->cmd_timer = SPOCK_TIME * 50; + scsi->status = STATUS_BUSY; + scsi->scsi_state = SCSI_STATE_IDLE; + scsi->scb_state = 0; + scsi->in_invalid = 0; + scsi->attention_wait = 0; + scsi->basic_ctrl = 0; - /* Reset all devices on controller reset. */ - for (i = 0; i < 8; i++) - scsi_device_reset(&scsi_devices[scsi->bus][i]); + /* Reset all devices on controller reset. */ + for (i = 0; i < 8; i++) + scsi_device_reset(&scsi_devices[scsi->bus][i]); - scsi->adapter_reset = 0; + scsi->adapter_reset = 0; } static void * spock_init(const device_t *info) { - int c; - spock_t *scsi = malloc(sizeof(spock_t)); - memset(scsi, 0x00, sizeof(spock_t)); + int c; + spock_t *scsi = malloc(sizeof(spock_t)); + memset(scsi, 0x00, sizeof(spock_t)); - scsi->bus = scsi_get_bus(); + scsi->bus = scsi_get_bus(); - scsi->irq = 14; + scsi->irq = 14; - scsi->bios_ver = device_get_config_int("bios_ver"); + scsi->bios_ver = device_get_config_int("bios_ver"); switch (scsi->bios_ver) { - case 1: + case 1: rom_init_interleaved(&scsi->bios_rom, SPOCK_U68_1991_ROM, SPOCK_U69_1991_ROM, - 0xc8000, 0x8000, 0x7fff, 0x4000, MEM_MAPPING_EXTERNAL); + 0xc8000, 0x8000, 0x7fff, 0x4000, MEM_MAPPING_EXTERNAL); break; - case 0: + case 0: rom_init_interleaved(&scsi->bios_rom, SPOCK_U68_1990_ROM, SPOCK_U69_1990_ROM, - 0xc8000, 0x8000, 0x7fff, 0x4000, MEM_MAPPING_EXTERNAL); + 0xc8000, 0x8000, 0x7fff, 0x4000, MEM_MAPPING_EXTERNAL); break; } mem_mapping_disable(&scsi->bios_rom.mapping); scsi->pos_regs[0] = 0xff; scsi->pos_regs[1] = 0x8e; - mca_add(spock_mca_read, spock_mca_write, spock_mca_feedb, spock_mca_reset, scsi); + mca_add(spock_mca_read, spock_mca_write, spock_mca_feedb, spock_mca_reset, scsi); - scsi->in_reset = 2; - scsi->cmd_timer = SPOCK_TIME * 50; - scsi->status = STATUS_BUSY; + scsi->in_reset = 2; + scsi->cmd_timer = SPOCK_TIME * 50; + scsi->status = STATUS_BUSY; - for (c = 0; c < (SCSI_ID_MAX-1); c++) { + for (c = 0; c < (SCSI_ID_MAX - 1); c++) { scsi->dev_id[c].phys_id = -1; } - scsi->dev_id[SCSI_ID_MAX-1].phys_id = scsi->adapter_id; + scsi->dev_id[SCSI_ID_MAX - 1].phys_id = scsi->adapter_id; - timer_add(&scsi->callback_timer, spock_callback, scsi, 1); - scsi->callback_timer.period = 10.0; - timer_set_delay_u64(&scsi->callback_timer, (uint64_t) (scsi->callback_timer.period * ((double) TIMER_USEC))); + timer_add(&scsi->callback_timer, spock_callback, scsi, 1); + scsi->callback_timer.period = 10.0; + timer_set_delay_u64(&scsi->callback_timer, (uint64_t) (scsi->callback_timer.period * ((double) TIMER_USEC))); - return scsi; + return scsi; } static void spock_close(void *p) { - spock_t *scsi = (spock_t *)p; + spock_t *scsi = (spock_t *) p; - if (scsi) { - free(scsi); - scsi = NULL; - } + if (scsi) { + free(scsi); + scsi = NULL; + } } static int spock_available(void) { - return rom_present(SPOCK_U68_1991_ROM) && rom_present(SPOCK_U69_1991_ROM) && - rom_present(SPOCK_U68_1990_ROM) && rom_present(SPOCK_U69_1990_ROM); + return rom_present(SPOCK_U68_1991_ROM) && rom_present(SPOCK_U69_1991_ROM) && rom_present(SPOCK_U68_1990_ROM) && rom_present(SPOCK_U69_1990_ROM); } static const device_config_t spock_rom_config[] = { -// clang-format off + // clang-format off { .name = "bios_ver", .description = "BIOS Version", @@ -1179,15 +1179,15 @@ static const device_config_t spock_rom_config[] = { }; const device_t spock_device = { - .name = "IBM PS/2 SCSI Adapter (Spock)", + .name = "IBM PS/2 SCSI Adapter (Spock)", .internal_name = "spock", - .flags = DEVICE_MCA, - .local = 0, - .init = spock_init, - .close = spock_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = 0, + .init = spock_init, + .close = spock_close, + .reset = NULL, { .available = spock_available }, .speed_changed = NULL, - .force_redraw = NULL, - .config = spock_rom_config + .force_redraw = NULL, + .config = spock_rom_config }; diff --git a/src/scsi/scsi_x54x.c b/src/scsi/scsi_x54x.c index 5cd1f6d8f..08b36585e 100644 --- a/src/scsi/scsi_x54x.c +++ b/src/scsi/scsi_x54x.c @@ -47,33 +47,28 @@ #include <86box/scsi_aha154x.h> #include <86box/scsi_x54x.h> +#define X54X_RESET_DURATION_US UINT64_C(50000) -#define X54X_RESET_DURATION_US UINT64_C(50000) - - -static void x54x_cmd_callback(void *priv); - +static void x54x_cmd_callback(void *priv); #ifdef ENABLE_X54X_LOG int x54x_do_log = ENABLE_X54X_LOG; - static void x54x_log(const char *fmt, ...) { va_list ap; if (x54x_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define x54x_log(fmt, ...) +# define x54x_log(fmt, ...) #endif - static void x54x_irq(x54x_t *dev, int set) { @@ -81,178 +76,173 @@ x54x_irq(x54x_t *dev, int set) int irq; if (dev->ven_get_irq) - irq = dev->ven_get_irq(dev); - else - irq = dev->Irq; + irq = dev->ven_get_irq(dev); + else + irq = dev->Irq; if (dev->card_bus & DEVICE_PCI) { - x54x_log("PCI IRQ: %02X, PCI_INTA\n", dev->pci_slot); + x54x_log("PCI IRQ: %02X, PCI_INTA\n", dev->pci_slot); if (set) - pci_set_irq(dev->pci_slot, PCI_INTA); - else - pci_clear_irq(dev->pci_slot, PCI_INTA); + pci_set_irq(dev->pci_slot, PCI_INTA); + else + pci_clear_irq(dev->pci_slot, PCI_INTA); } else { - x54x_log("%sing IRQ %i\n", set ? "Rais" : "Lower", irq); + x54x_log("%sing IRQ %i\n", set ? "Rais" : "Lower", irq); - if (set) { - if (dev->interrupt_type) - int_type = dev->interrupt_type(dev); + if (set) { + if (dev->interrupt_type) + int_type = dev->interrupt_type(dev); - if (int_type) - picintlevel(1 << irq); - else - picint(1 << irq); - } else - picintc(1 << irq); + if (int_type) + picintlevel(1 << irq); + else + picint(1 << irq); + } else + picintc(1 << irq); } } - static void raise_irq(x54x_t *dev, int suppress, uint8_t Interrupt) { if (Interrupt & (INTR_MBIF | INTR_MBOA)) { - x54x_log("%s: RaiseInterrupt(): Interrupt=%02X %s\n", - dev->name, Interrupt, (! (dev->Interrupt & INTR_HACC)) ? "Immediate" : "Pending"); - if (! (dev->Interrupt & INTR_HACC)) { - dev->Interrupt |= Interrupt; /* Report now. */ - } else { - dev->PendingInterrupt |= Interrupt; /* Report later. */ - } + x54x_log("%s: RaiseInterrupt(): Interrupt=%02X %s\n", + dev->name, Interrupt, (!(dev->Interrupt & INTR_HACC)) ? "Immediate" : "Pending"); + if (!(dev->Interrupt & INTR_HACC)) { + dev->Interrupt |= Interrupt; /* Report now. */ + } else { + dev->PendingInterrupt |= Interrupt; /* Report later. */ + } } else if (Interrupt & INTR_HACC) { - if (dev->Interrupt == 0 || dev->Interrupt == (INTR_ANY | INTR_HACC)) { - x54x_log("%s: RaiseInterrupt(): Interrupt=%02X\n", - dev->name, dev->Interrupt); - } - dev->Interrupt |= Interrupt; + if (dev->Interrupt == 0 || dev->Interrupt == (INTR_ANY | INTR_HACC)) { + x54x_log("%s: RaiseInterrupt(): Interrupt=%02X\n", + dev->name, dev->Interrupt); + } + dev->Interrupt |= Interrupt; } else { - x54x_log("%s: RaiseInterrupt(): Invalid interrupt state!\n", dev->name); + x54x_log("%s: RaiseInterrupt(): Invalid interrupt state!\n", dev->name); } dev->Interrupt |= INTR_ANY; if (dev->IrqEnabled && !suppress) - x54x_irq(dev, 1); + x54x_irq(dev, 1); } - static void clear_irq(x54x_t *dev) { dev->Interrupt = 0; x54x_log("%s: lowering IRQ %i (stat 0x%02x)\n", - dev->name, dev->Irq, dev->Interrupt); + dev->name, dev->Irq, dev->Interrupt); x54x_irq(dev, 0); if (dev->PendingInterrupt) { - x54x_log("%s: Raising Interrupt 0x%02X (Pending)\n", - dev->name, dev->Interrupt); - if (dev->MailboxOutInterrupts || !(dev->Interrupt & INTR_MBOA)) { - raise_irq(dev, 0, dev->PendingInterrupt); - } - dev->PendingInterrupt = 0; + x54x_log("%s: Raising Interrupt 0x%02X (Pending)\n", + dev->name, dev->Interrupt); + if (dev->MailboxOutInterrupts || !(dev->Interrupt & INTR_MBOA)) { + raise_irq(dev, 0, dev->PendingInterrupt); + } + dev->PendingInterrupt = 0; } } - static void target_check(x54x_t *dev, uint8_t id) { - if (! scsi_device_valid(&scsi_devices[dev->bus][id])) - fatal("BIOS INT13 device on ID %02i has disappeared\n", id); + if (!scsi_device_valid(&scsi_devices[dev->bus][id])) + fatal("BIOS INT13 device on ID %02i has disappeared\n", id); } - static uint8_t completion_code(uint8_t *sense) { uint8_t ret = 0xff; switch (sense[12]) { - case ASC_NONE: - ret = 0x00; - break; + case ASC_NONE: + ret = 0x00; + break; - case ASC_ILLEGAL_OPCODE: - case ASC_INV_FIELD_IN_CMD_PACKET: - case ASC_INV_FIELD_IN_PARAMETER_LIST: - case ASC_DATA_PHASE_ERROR: - ret = 0x01; - break; + case ASC_ILLEGAL_OPCODE: + case ASC_INV_FIELD_IN_CMD_PACKET: + case ASC_INV_FIELD_IN_PARAMETER_LIST: + case ASC_DATA_PHASE_ERROR: + ret = 0x01; + break; - case 0x12: - case ASC_LBA_OUT_OF_RANGE: - ret = 0x02; - break; + case 0x12: + case ASC_LBA_OUT_OF_RANGE: + ret = 0x02; + break; - case ASC_WRITE_PROTECTED: - ret = 0x03; - break; + case ASC_WRITE_PROTECTED: + ret = 0x03; + break; - case 0x14: - case 0x16: - ret = 0x04; - break; + case 0x14: + case 0x16: + ret = 0x04; + break; - case ASC_INCOMPATIBLE_FORMAT: - case ASC_ILLEGAL_MODE_FOR_THIS_TRACK: - ret = 0x0c; - break; + case ASC_INCOMPATIBLE_FORMAT: + case ASC_ILLEGAL_MODE_FOR_THIS_TRACK: + ret = 0x0c; + break; - case 0x10: - case 0x11: - ret = 0x10; - break; + case 0x10: + case 0x11: + ret = 0x10; + break; - case 0x17: - case 0x18: - ret = 0x11; - break; + case 0x17: + case 0x18: + ret = 0x11; + break; - case 0x01: - case 0x03: - case 0x05: - case 0x06: - case 0x07: - case 0x08: - case 0x09: - case 0x1B: - case 0x1C: - case 0x1D: - case 0x40: - case 0x41: - case 0x42: - case 0x43: - case 0x44: - case 0x45: - case 0x46: - case 0x47: - case 0x48: - case 0x49: - ret = 0x20; - break; + case 0x01: + case 0x03: + case 0x05: + case 0x06: + case 0x07: + case 0x08: + case 0x09: + case 0x1B: + case 0x1C: + case 0x1D: + case 0x40: + case 0x41: + case 0x42: + case 0x43: + case 0x44: + case 0x45: + case 0x46: + case 0x47: + case 0x48: + case 0x49: + ret = 0x20; + break; - case 0x15: - case 0x02: - ret = 0x40; - break; + case 0x15: + case 0x02: + ret = 0x40; + break; - case 0x25: - ret = 0x80; - break; + case 0x25: + ret = 0x80; + break; - case ASC_NOT_READY: - case ASC_MEDIUM_MAY_HAVE_CHANGED: - case 0x29: - case ASC_CAPACITY_DATA_CHANGED: - case ASC_MEDIUM_NOT_PRESENT: - ret = 0xaa; - break; + case ASC_NOT_READY: + case ASC_MEDIUM_MAY_HAVE_CHANGED: + case 0x29: + case ASC_CAPACITY_DATA_CHANGED: + case ASC_MEDIUM_NOT_PRESENT: + ret = 0xaa; + break; }; - return(ret); + return (ret); } - static uint8_t x54x_bios_scsi_command(scsi_device_t *dev, uint8_t *cdb, uint8_t *buf, int len, uint32_t addr, int transfer_size) { @@ -261,25 +251,25 @@ x54x_bios_scsi_command(scsi_device_t *dev, uint8_t *cdb, uint8_t *buf, int len, scsi_device_command_phase0(dev, cdb); if (dev->phase == SCSI_PHASE_STATUS) - return(completion_code(scsi_device_sense(dev))); + return (completion_code(scsi_device_sense(dev))); if (len > 0) { - if (dev->buffer_length == -1) { - fatal("Buffer length -1 when doing SCSI DMA\n"); - return(0xff); - } + if (dev->buffer_length == -1) { + fatal("Buffer length -1 when doing SCSI DMA\n"); + return (0xff); + } - if (dev->phase == SCSI_PHASE_DATA_IN) { - if (buf) - memcpy(buf, dev->sc->temp_buffer, dev->buffer_length); - else - dma_bm_write(addr, dev->sc->temp_buffer, dev->buffer_length, transfer_size); - } else if (dev->phase == SCSI_PHASE_DATA_OUT) { - if (buf) - memcpy(dev->sc->temp_buffer, buf, dev->buffer_length); - else - dma_bm_read(addr, dev->sc->temp_buffer, dev->buffer_length, transfer_size); - } + if (dev->phase == SCSI_PHASE_DATA_IN) { + if (buf) + memcpy(buf, dev->sc->temp_buffer, dev->buffer_length); + else + dma_bm_write(addr, dev->sc->temp_buffer, dev->buffer_length, transfer_size); + } else if (dev->phase == SCSI_PHASE_DATA_OUT) { + if (buf) + memcpy(dev->sc->temp_buffer, buf, dev->buffer_length); + else + dma_bm_read(addr, dev->sc->temp_buffer, dev->buffer_length, transfer_size); + } } scsi_device_command_phase1(dev); @@ -287,12 +277,11 @@ x54x_bios_scsi_command(scsi_device_t *dev, uint8_t *cdb, uint8_t *buf, int len, return (completion_code(scsi_device_sense(dev))); } - static uint8_t x54x_bios_read_capacity(scsi_device_t *sd, uint8_t *buf, int transfer_size) { uint8_t *cdb; - uint8_t ret; + uint8_t ret; cdb = (uint8_t *) malloc(12); memset(cdb, 0, 12); @@ -303,15 +292,14 @@ x54x_bios_read_capacity(scsi_device_t *sd, uint8_t *buf, int transfer_size) free(cdb); - return(ret); + return (ret); } - static uint8_t x54x_bios_inquiry(scsi_device_t *sd, uint8_t *buf, int transfer_size) { uint8_t *cdb; - uint8_t ret; + uint8_t ret; cdb = (uint8_t *) malloc(12); memset(cdb, 0, 12); @@ -323,234 +311,231 @@ x54x_bios_inquiry(scsi_device_t *sd, uint8_t *buf, int transfer_size) free(cdb); - return(ret); + return (ret); } - static uint8_t x54x_bios_command_08(scsi_device_t *sd, uint8_t *buffer, int transfer_size) { uint8_t *rcbuf; - uint8_t ret; - int i; + uint8_t ret; + int i; memset(buffer, 0x00, 6); rcbuf = (uint8_t *) malloc(8); - ret = x54x_bios_read_capacity(sd, rcbuf, transfer_size); + ret = x54x_bios_read_capacity(sd, rcbuf, transfer_size); if (ret) { - free(rcbuf); - return(ret); - } + free(rcbuf); + return (ret); + } memset(buffer, 0x00, 6); - for (i=0; i<4; i++) - buffer[i] = rcbuf[i]; - for (i=4; i<6; i++) - buffer[i] = rcbuf[(i + 2) ^ 1]; + for (i = 0; i < 4; i++) + buffer[i] = rcbuf[i]; + for (i = 4; i < 6; i++) + buffer[i] = rcbuf[(i + 2) ^ 1]; x54x_log("BIOS Command 0x08: %02X %02X %02X %02X %02X %02X\n", - buffer[0], buffer[1], buffer[2], buffer[3], buffer[4], buffer[5]); + buffer[0], buffer[1], buffer[2], buffer[3], buffer[4], buffer[5]); free(rcbuf); - return(0); + return (0); } - static int x54x_bios_command_15(scsi_device_t *sd, uint8_t *buffer, int transfer_size) { uint8_t *inqbuf, *rcbuf; - uint8_t ret; - int i; + uint8_t ret; + int i; memset(buffer, 0x00, 6); inqbuf = (uint8_t *) malloc(36); - ret = x54x_bios_inquiry(sd, inqbuf, transfer_size); + ret = x54x_bios_inquiry(sd, inqbuf, transfer_size); if (ret) { - free(inqbuf); - return(ret); + free(inqbuf); + return (ret); } buffer[4] = inqbuf[0]; buffer[5] = inqbuf[1]; rcbuf = (uint8_t *) malloc(8); - ret = x54x_bios_read_capacity(sd, rcbuf, transfer_size); + ret = x54x_bios_read_capacity(sd, rcbuf, transfer_size); if (ret) { - free(rcbuf); - free(inqbuf); - return(ret); - } + free(rcbuf); + free(inqbuf); + return (ret); + } for (i = 0; i < 4; i++) - buffer[i] = rcbuf[i]; + buffer[i] = rcbuf[i]; x54x_log("BIOS Command 0x15: %02X %02X %02X %02X %02X %02X\n", - buffer[0], buffer[1], buffer[2], buffer[3], buffer[4], buffer[5]); + buffer[0], buffer[1], buffer[2], buffer[3], buffer[4], buffer[5]); free(rcbuf); free(inqbuf); - return(0); + return (0); } - /* This returns the completion code. */ static uint8_t x54x_bios_command(x54x_t *x54x, uint8_t max_id, BIOSCMD *cmd, int8_t islba) { - const int bios_cmd_to_scsi[18] = { 0, 0, GPCMD_READ_10, GPCMD_WRITE_10, GPCMD_VERIFY_10, 0, 0, - GPCMD_FORMAT_UNIT, 0, 0, 0, 0, GPCMD_SEEK_10, 0, 0, 0, - GPCMD_TEST_UNIT_READY, GPCMD_REZERO_UNIT }; - uint8_t cdb[12] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; - uint8_t *buf; - scsi_device_t *dev = NULL; - uint32_t dma_address = 0; - uint32_t lba; - int sector_len = cmd->secount; - uint8_t ret = 0x00; + const int bios_cmd_to_scsi[18] = { 0, 0, GPCMD_READ_10, GPCMD_WRITE_10, GPCMD_VERIFY_10, 0, 0, + GPCMD_FORMAT_UNIT, 0, 0, 0, 0, GPCMD_SEEK_10, 0, 0, 0, + GPCMD_TEST_UNIT_READY, GPCMD_REZERO_UNIT }; + uint8_t cdb[12] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; + uint8_t *buf; + scsi_device_t *dev = NULL; + uint32_t dma_address = 0; + uint32_t lba; + int sector_len = cmd->secount; + uint8_t ret = 0x00; if (islba) - lba = lba32_blk(cmd); - else - lba = (cmd->u.chs.cyl << 9) + (cmd->u.chs.head << 5) + cmd->u.chs.sec; + lba = lba32_blk(cmd); + else + lba = (cmd->u.chs.cyl << 9) + (cmd->u.chs.head << 5) + cmd->u.chs.sec; x54x_log("BIOS Command = 0x%02X\n", cmd->command); if (cmd->id > max_id) { - x54x_log("BIOS Target ID %i or LUN %i are above maximum\n", - cmd->id, cmd->lun); - ret = 0x80; + x54x_log("BIOS Target ID %i or LUN %i are above maximum\n", + cmd->id, cmd->lun); + ret = 0x80; } if (cmd->lun) { - x54x_log("BIOS Target LUN is not 0\n"); - ret = 0x80; + x54x_log("BIOS Target LUN is not 0\n"); + ret = 0x80; } if (!ret) { - /* Get pointer to selected device. */ - dev = &scsi_devices[x54x->bus][cmd->id]; - dev->buffer_length = 0; + /* Get pointer to selected device. */ + dev = &scsi_devices[x54x->bus][cmd->id]; + dev->buffer_length = 0; - if (! scsi_device_present(dev)) { - x54x_log("BIOS Target ID %i has no device attached\n", cmd->id); - ret = 0x80; - } else { - scsi_device_identify(dev, 0xff); + if (!scsi_device_present(dev)) { + x54x_log("BIOS Target ID %i has no device attached\n", cmd->id); + ret = 0x80; + } else { + scsi_device_identify(dev, 0xff); - if ((dev->type == SCSI_REMOVABLE_CDROM) && !(x54x->flags & X54X_CDROM_BOOT)) { - x54x_log("BIOS Target ID %i is CD-ROM on unsupported BIOS\n", cmd->id); - return(0x80); - } else { - dma_address = ADDR_TO_U32(cmd->dma_address); + if ((dev->type == SCSI_REMOVABLE_CDROM) && !(x54x->flags & X54X_CDROM_BOOT)) { + x54x_log("BIOS Target ID %i is CD-ROM on unsupported BIOS\n", cmd->id); + return (0x80); + } else { + dma_address = ADDR_TO_U32(cmd->dma_address); - x54x_log("BIOS Data Buffer write: length %d, pointer 0x%04X\n", - sector_len, dma_address); - } - } + x54x_log("BIOS Data Buffer write: length %d, pointer 0x%04X\n", + sector_len, dma_address); + } + } } - if (!ret) switch(cmd->command) { - case 0x00: /* Reset Disk System, in practice it's a nop */ - ret = 0x00; - break; + if (!ret) + switch (cmd->command) { + case 0x00: /* Reset Disk System, in practice it's a nop */ + ret = 0x00; + break; - case 0x01: /* Read Status of Last Operation */ - target_check(x54x, cmd->id); + case 0x01: /* Read Status of Last Operation */ + target_check(x54x, cmd->id); - /* - * Assuming 14 bytes because that is the default - * length for SCSI sense, and no command-specific - * indication is given. - */ - if (sector_len > 0) { - x54x_log("BIOS DMA: Reading 14 bytes at %08X\n", - dma_address); - dma_bm_write(dma_address, scsi_device_sense(dev), 14, x54x->transfer_size); - } + /* + * Assuming 14 bytes because that is the default + * length for SCSI sense, and no command-specific + * indication is given. + */ + if (sector_len > 0) { + x54x_log("BIOS DMA: Reading 14 bytes at %08X\n", + dma_address); + dma_bm_write(dma_address, scsi_device_sense(dev), 14, x54x->transfer_size); + } - return(0); - break; + return (0); + break; - case 0x02: /* Read Desired Sectors to Memory */ - case 0x03: /* Write Desired Sectors from Memory */ - case 0x04: /* Verify Desired Sectors */ - case 0x0c: /* Seek */ - target_check(x54x, cmd->id); + case 0x02: /* Read Desired Sectors to Memory */ + case 0x03: /* Write Desired Sectors from Memory */ + case 0x04: /* Verify Desired Sectors */ + case 0x0c: /* Seek */ + target_check(x54x, cmd->id); - cdb[0] = bios_cmd_to_scsi[cmd->command]; - cdb[1] = (cmd->lun & 7) << 5; - cdb[2] = (lba >> 24) & 0xff; - cdb[3] = (lba >> 16) & 0xff; - cdb[4] = (lba >> 8) & 0xff; - cdb[5] = lba & 0xff; - if (cmd->command != 0x0c) - cdb[8] = sector_len; + cdb[0] = bios_cmd_to_scsi[cmd->command]; + cdb[1] = (cmd->lun & 7) << 5; + cdb[2] = (lba >> 24) & 0xff; + cdb[3] = (lba >> 16) & 0xff; + cdb[4] = (lba >> 8) & 0xff; + cdb[5] = lba & 0xff; + if (cmd->command != 0x0c) + cdb[8] = sector_len; - ret = x54x_bios_scsi_command(dev, cdb, NULL, sector_len, dma_address, x54x->transfer_size); - if (cmd->command == 0x0c) - ret = !!ret; - break; + ret = x54x_bios_scsi_command(dev, cdb, NULL, sector_len, dma_address, x54x->transfer_size); + if (cmd->command == 0x0c) + ret = !!ret; + break; - default: - x54x_log("BIOS: Unimplemented command: %02X\n", cmd->command); - case 0x05: /* Format Track, invalid since SCSI has no tracks */ - case 0x0a: /* ???? */ - case 0x0b: /* ???? */ - case 0x12: /* ???? */ - case 0x13: /* ???? */ -//FIXME: add a longer delay here --FvK - ret = 0x01; - break; + default: + x54x_log("BIOS: Unimplemented command: %02X\n", cmd->command); + case 0x05: /* Format Track, invalid since SCSI has no tracks */ + case 0x0a: /* ???? */ + case 0x0b: /* ???? */ + case 0x12: /* ???? */ + case 0x13: /* ???? */ + // FIXME: add a longer delay here --FvK + ret = 0x01; + break; - case 0x06: /* Identify SCSI Devices, in practice it's a nop */ - case 0x09: /* Initialize Drive Pair Characteristics, in practice it's a nop */ - case 0x0d: /* Alternate Disk Reset, in practice it's a nop */ - case 0x0e: /* Read Sector Buffer */ - case 0x0f: /* Write Sector Buffer */ - case 0x14: /* Controller Diagnostic */ -//FIXME: add a longer delay here --FvK - ret = 0x00; - break; + case 0x06: /* Identify SCSI Devices, in practice it's a nop */ + case 0x09: /* Initialize Drive Pair Characteristics, in practice it's a nop */ + case 0x0d: /* Alternate Disk Reset, in practice it's a nop */ + case 0x0e: /* Read Sector Buffer */ + case 0x0f: /* Write Sector Buffer */ + case 0x14: /* Controller Diagnostic */ + // FIXME: add a longer delay here --FvK + ret = 0x00; + break; - case 0x07: /* Format Unit */ - case 0x10: /* Test Drive Ready */ - case 0x11: /* Recalibrate */ - target_check(x54x, cmd->id); + case 0x07: /* Format Unit */ + case 0x10: /* Test Drive Ready */ + case 0x11: /* Recalibrate */ + target_check(x54x, cmd->id); - cdb[0] = bios_cmd_to_scsi[cmd->command]; - cdb[1] = (cmd->lun & 7) << 5; + cdb[0] = bios_cmd_to_scsi[cmd->command]; + cdb[1] = (cmd->lun & 7) << 5; - ret = x54x_bios_scsi_command(dev, cdb, NULL, sector_len, dma_address, x54x->transfer_size); - break; + ret = x54x_bios_scsi_command(dev, cdb, NULL, sector_len, dma_address, x54x->transfer_size); + break; - case 0x08: /* Read Drive Parameters */ - case 0x15: /* Read DASD Type */ - target_check(x54x, cmd->id); + case 0x08: /* Read Drive Parameters */ + case 0x15: /* Read DASD Type */ + target_check(x54x, cmd->id); - dev->buffer_length = 6; + dev->buffer_length = 6; - buf = (uint8_t *) malloc(6); - if (cmd->command == 0x08) - ret = x54x_bios_command_08(dev, buf, x54x->transfer_size); - else - ret = x54x_bios_command_15(dev, buf, x54x->transfer_size); + buf = (uint8_t *) malloc(6); + if (cmd->command == 0x08) + ret = x54x_bios_command_08(dev, buf, x54x->transfer_size); + else + ret = x54x_bios_command_15(dev, buf, x54x->transfer_size); - x54x_log("BIOS DMA: Reading 6 bytes at %08X\n", dma_address); - dma_bm_write(dma_address, buf, 4, x54x->transfer_size); - free(buf); + x54x_log("BIOS DMA: Reading 6 bytes at %08X\n", dma_address); + dma_bm_write(dma_address, buf, 4, x54x->transfer_size); + free(buf); - break; - } + break; + } x54x_log("BIOS Request %02X complete: %02X\n", cmd->command, ret); - return(ret); + return (ret); } - static void x54x_cmd_done(x54x_t *dev, int suppress) { @@ -560,49 +545,46 @@ x54x_cmd_done(x54x_t *dev, int suppress) dev->Status |= STAT_IDLE; if (dev->ven_cmd_is_fast) { - fast = dev->ven_cmd_is_fast(dev); + fast = dev->ven_cmd_is_fast(dev); } if ((dev->Command != CMD_START_SCSI) || fast) { - dev->Status &= ~STAT_DFULL; - x54x_log("%s: Raising IRQ %i\n", dev->name, dev->Irq); - raise_irq(dev, suppress, INTR_HACC); + dev->Status &= ~STAT_DFULL; + x54x_log("%s: Raising IRQ %i\n", dev->name, dev->Irq); + raise_irq(dev, suppress, INTR_HACC); } - dev->Command = 0xff; + dev->Command = 0xff; dev->CmdParam = 0; } - static void x54x_add_to_period(x54x_t *dev, int TransferLength) { dev->temp_period += (uint64_t) TransferLength; } - static void x54x_mbi_setup(x54x_t *dev, uint32_t CCBPointer, CCBU *CmdBlock, - uint8_t HostStatus, uint8_t TargetStatus, uint8_t mbcc) + uint8_t HostStatus, uint8_t TargetStatus, uint8_t mbcc) { Req_t *req = &dev->Req; req->CCBPointer = CCBPointer; memcpy(&(req->CmdBlock), CmdBlock, sizeof(CCB32)); - req->Is24bit = !!(dev->flags & X54X_MBX_24BIT); - req->HostStatus = HostStatus; - req->TargetStatus = TargetStatus; + req->Is24bit = !!(dev->flags & X54X_MBX_24BIT); + req->HostStatus = HostStatus; + req->TargetStatus = TargetStatus; req->MailboxCompletionCode = mbcc; x54x_log("Mailbox in setup\n"); } - static void x54x_ccb(x54x_t *dev) { - Req_t *req = &dev->Req; - uint8_t bytes[4] = { 0, 0, 0, 0}; + Req_t *req = &dev->Req; + uint8_t bytes[4] = { 0, 0, 0, 0 }; /* Rewrite the CCB up to the CDB. */ x54x_log("CCB completion code and statuses rewritten (pointer %08X)\n", req->CCBPointer); @@ -614,341 +596,325 @@ x54x_ccb(x54x_t *dev) x54x_add_to_period(dev, 3); if (dev->MailboxOutInterrupts) - dev->ToRaise = INTR_MBOA | INTR_ANY; - else - dev->ToRaise = 0; + dev->ToRaise = INTR_MBOA | INTR_ANY; + else + dev->ToRaise = 0; } - static void x54x_mbi(x54x_t *dev) { Req_t *req = &dev->Req; -// uint32_t CCBPointer = req->CCBPointer; - addr24 CCBPointer; - CCBU *CmdBlock = &(req->CmdBlock); - uint8_t HostStatus = req->HostStatus; - uint8_t TargetStatus = req->TargetStatus; + // uint32_t CCBPointer = req->CCBPointer; + addr24 CCBPointer; + CCBU *CmdBlock = &(req->CmdBlock); + uint8_t HostStatus = req->HostStatus; + uint8_t TargetStatus = req->TargetStatus; uint32_t MailboxCompletionCode = req->MailboxCompletionCode; uint32_t Incoming; - uint8_t bytes[4] = { 0, 0, 0, 0 }; + uint8_t bytes[4] = { 0, 0, 0, 0 }; Incoming = dev->MailboxInAddr + (dev->MailboxInPosCur * ((dev->flags & X54X_MBX_24BIT) ? sizeof(Mailbox_t) : sizeof(Mailbox32_t))); if (MailboxCompletionCode != MBI_NOT_FOUND) { - CmdBlock->common.HostStatus = HostStatus; - CmdBlock->common.TargetStatus = TargetStatus; + CmdBlock->common.HostStatus = HostStatus; + CmdBlock->common.TargetStatus = TargetStatus; - /* Rewrite the CCB up to the CDB. */ - x54x_log("CCB statuses rewritten (pointer %08X)\n", req->CCBPointer); - dma_bm_read(req->CCBPointer + 0x000C, (uint8_t *) bytes, 4, dev->transfer_size); - bytes[2] = req->HostStatus; - bytes[3] = req->TargetStatus; - dma_bm_write(req->CCBPointer + 0x000C, (uint8_t *) bytes, 4, dev->transfer_size); - x54x_add_to_period(dev, 2); + /* Rewrite the CCB up to the CDB. */ + x54x_log("CCB statuses rewritten (pointer %08X)\n", req->CCBPointer); + dma_bm_read(req->CCBPointer + 0x000C, (uint8_t *) bytes, 4, dev->transfer_size); + bytes[2] = req->HostStatus; + bytes[3] = req->TargetStatus; + dma_bm_write(req->CCBPointer + 0x000C, (uint8_t *) bytes, 4, dev->transfer_size); + x54x_add_to_period(dev, 2); } else { - x54x_log("Mailbox not found!\n"); + x54x_log("Mailbox not found!\n"); } - x54x_log("Host Status 0x%02X, Target Status 0x%02X\n",HostStatus,TargetStatus); + x54x_log("Host Status 0x%02X, Target Status 0x%02X\n", HostStatus, TargetStatus); if (dev->flags & X54X_MBX_24BIT) { - U32_TO_ADDR(CCBPointer, req->CCBPointer); - x54x_log("Mailbox 24-bit: Status=0x%02X, CCB at 0x%04X\n", req->MailboxCompletionCode, CCBPointer); - bytes[0] = req->MailboxCompletionCode; - memcpy(&(bytes[1]), (uint8_t *)&CCBPointer, 3); - dma_bm_write(Incoming, (uint8_t *) bytes, 4, dev->transfer_size); - x54x_add_to_period(dev, 4); - x54x_log("%i bytes of 24-bit mailbox written to: %08X\n", sizeof(Mailbox_t), Incoming); + U32_TO_ADDR(CCBPointer, req->CCBPointer); + x54x_log("Mailbox 24-bit: Status=0x%02X, CCB at 0x%04X\n", req->MailboxCompletionCode, CCBPointer); + bytes[0] = req->MailboxCompletionCode; + memcpy(&(bytes[1]), (uint8_t *) &CCBPointer, 3); + dma_bm_write(Incoming, (uint8_t *) bytes, 4, dev->transfer_size); + x54x_add_to_period(dev, 4); + x54x_log("%i bytes of 24-bit mailbox written to: %08X\n", sizeof(Mailbox_t), Incoming); } else { - x54x_log("Mailbox 32-bit: Status=0x%02X, CCB at 0x%04X\n", req->MailboxCompletionCode, CCBPointer); - dma_bm_write(Incoming, (uint8_t *)&(req->CCBPointer), 4, dev->transfer_size); - dma_bm_read(Incoming + 4, (uint8_t *) bytes, 4, dev->transfer_size); - bytes[0] = req->HostStatus; - bytes[1] = req->TargetStatus; - bytes[3] = req->MailboxCompletionCode; - dma_bm_write(Incoming + 4, (uint8_t *) bytes, 4, dev->transfer_size); - x54x_add_to_period(dev, 7); - x54x_log("%i bytes of 32-bit mailbox written to: %08X\n", sizeof(Mailbox32_t), Incoming); + x54x_log("Mailbox 32-bit: Status=0x%02X, CCB at 0x%04X\n", req->MailboxCompletionCode, CCBPointer); + dma_bm_write(Incoming, (uint8_t *) &(req->CCBPointer), 4, dev->transfer_size); + dma_bm_read(Incoming + 4, (uint8_t *) bytes, 4, dev->transfer_size); + bytes[0] = req->HostStatus; + bytes[1] = req->TargetStatus; + bytes[3] = req->MailboxCompletionCode; + dma_bm_write(Incoming + 4, (uint8_t *) bytes, 4, dev->transfer_size); + x54x_add_to_period(dev, 7); + x54x_log("%i bytes of 32-bit mailbox written to: %08X\n", sizeof(Mailbox32_t), Incoming); } dev->MailboxInPosCur++; if (dev->MailboxInPosCur >= dev->MailboxCount) - dev->MailboxInPosCur = 0; + dev->MailboxInPosCur = 0; dev->ToRaise = INTR_MBIF | INTR_ANY; if (dev->MailboxOutInterrupts) - dev->ToRaise |= INTR_MBOA; + dev->ToRaise |= INTR_MBOA; } - static void x54x_rd_sge(x54x_t *dev, int Is24bit, uint32_t Address, SGE32 *SG) { - SGE SGE24; + SGE SGE24; uint8_t bytes[8]; if (Is24bit) { - if (dev->transfer_size == 4) { - /* 32-bit device, do this to make the transfer divisible by 4 bytes. */ - dma_bm_read(Address, (uint8_t *) bytes, 8, dev->transfer_size); - memcpy((uint8_t *)&SGE24, bytes, sizeof(SGE)); - } else { - /* 16-bit device, special handling not needed. */ - dma_bm_read(Address, (uint8_t *)&SGE24, 8, dev->transfer_size); - } - x54x_add_to_period(dev, sizeof(SGE)); + if (dev->transfer_size == 4) { + /* 32-bit device, do this to make the transfer divisible by 4 bytes. */ + dma_bm_read(Address, (uint8_t *) bytes, 8, dev->transfer_size); + memcpy((uint8_t *) &SGE24, bytes, sizeof(SGE)); + } else { + /* 16-bit device, special handling not needed. */ + dma_bm_read(Address, (uint8_t *) &SGE24, 8, dev->transfer_size); + } + x54x_add_to_period(dev, sizeof(SGE)); - /* Convert the 24-bit entries into 32-bit entries. */ - x54x_log("Read S/G block: %06X, %06X\n", SGE24.Segment, SGE24.SegmentPointer); - SG->Segment = ADDR_TO_U32(SGE24.Segment); - SG->SegmentPointer = ADDR_TO_U32(SGE24.SegmentPointer); + /* Convert the 24-bit entries into 32-bit entries. */ + x54x_log("Read S/G block: %06X, %06X\n", SGE24.Segment, SGE24.SegmentPointer); + SG->Segment = ADDR_TO_U32(SGE24.Segment); + SG->SegmentPointer = ADDR_TO_U32(SGE24.SegmentPointer); } else { - dma_bm_read(Address, (uint8_t *)SG, sizeof(SGE32), dev->transfer_size); - x54x_add_to_period(dev, sizeof(SGE32)); + dma_bm_read(Address, (uint8_t *) SG, sizeof(SGE32), dev->transfer_size); + x54x_add_to_period(dev, sizeof(SGE32)); } } - static int x54x_get_length(x54x_t *dev, Req_t *req, int Is24bit) { uint32_t DataPointer, DataLength; uint32_t SGEntryLength = (Is24bit ? sizeof(SGE) : sizeof(SGE32)); - SGE32 SGBuffer; + SGE32 SGBuffer; uint32_t DataToTransfer = 0, i = 0; if (Is24bit) { - DataPointer = ADDR_TO_U32(req->CmdBlock.old.DataPointer); - DataLength = ADDR_TO_U32(req->CmdBlock.old.DataLength); - x54x_log("Data length: %08X\n", req->CmdBlock.old.DataLength); + DataPointer = ADDR_TO_U32(req->CmdBlock.old.DataPointer); + DataLength = ADDR_TO_U32(req->CmdBlock.old.DataLength); + x54x_log("Data length: %08X\n", req->CmdBlock.old.DataLength); } else { - DataPointer = req->CmdBlock.new.DataPointer; - DataLength = req->CmdBlock.new.DataLength; + DataPointer = req->CmdBlock.new.DataPointer; + DataLength = req->CmdBlock.new.DataLength; } x54x_log("Data Buffer write: length %d, pointer 0x%04X\n", - DataLength, DataPointer); + DataLength, DataPointer); if (!DataLength) - return(0); + return (0); if (req->CmdBlock.common.ControlByte != 0x03) { - if (req->CmdBlock.common.Opcode == SCATTER_GATHER_COMMAND || - req->CmdBlock.common.Opcode == SCATTER_GATHER_COMMAND_RES) { - for (i = 0; i < DataLength; i += SGEntryLength) { - x54x_rd_sge(dev, Is24bit, DataPointer + i, &SGBuffer); + if (req->CmdBlock.common.Opcode == SCATTER_GATHER_COMMAND || req->CmdBlock.common.Opcode == SCATTER_GATHER_COMMAND_RES) { + for (i = 0; i < DataLength; i += SGEntryLength) { + x54x_rd_sge(dev, Is24bit, DataPointer + i, &SGBuffer); - DataToTransfer += SGBuffer.Segment; - } - return(DataToTransfer); - } else if (req->CmdBlock.common.Opcode == SCSI_INITIATOR_COMMAND || - req->CmdBlock.common.Opcode == SCSI_INITIATOR_COMMAND_RES) { - return(DataLength); - } else { - return(0); - } + DataToTransfer += SGBuffer.Segment; + } + return (DataToTransfer); + } else if (req->CmdBlock.common.Opcode == SCSI_INITIATOR_COMMAND || req->CmdBlock.common.Opcode == SCSI_INITIATOR_COMMAND_RES) { + return (DataLength); + } else { + return (0); + } } else { - return(0); + return (0); } } - static void x54x_set_residue(x54x_t *dev, Req_t *req, int32_t TransferLength) { uint32_t Residue = 0; - addr24 Residue24; - int32_t BufLen = scsi_devices[dev->bus][req->TargetID].buffer_length; - uint8_t bytes[4] = { 0, 0, 0, 0 }; + addr24 Residue24; + int32_t BufLen = scsi_devices[dev->bus][req->TargetID].buffer_length; + uint8_t bytes[4] = { 0, 0, 0, 0 }; - if ((req->CmdBlock.common.Opcode == SCSI_INITIATOR_COMMAND_RES) || - (req->CmdBlock.common.Opcode == SCATTER_GATHER_COMMAND_RES)) { + if ((req->CmdBlock.common.Opcode == SCSI_INITIATOR_COMMAND_RES) || (req->CmdBlock.common.Opcode == SCATTER_GATHER_COMMAND_RES)) { - if ((TransferLength > 0) && (req->CmdBlock.common.ControlByte < 0x03)) { - TransferLength -= BufLen; - if (TransferLength > 0) - Residue = TransferLength; - } + if ((TransferLength > 0) && (req->CmdBlock.common.ControlByte < 0x03)) { + TransferLength -= BufLen; + if (TransferLength > 0) + Residue = TransferLength; + } - if (req->Is24bit) { - U32_TO_ADDR(Residue24, Residue); - dma_bm_read(req->CCBPointer + 0x0004, (uint8_t *) bytes, 4, dev->transfer_size); - memcpy((uint8_t *) bytes, (uint8_t *)&Residue24, 3); - dma_bm_write(req->CCBPointer + 0x0004, (uint8_t *) bytes, 4, dev->transfer_size); - x54x_add_to_period(dev, 3); - x54x_log("24-bit Residual data length for reading: %d\n", Residue); - } else { - dma_bm_write(req->CCBPointer + 0x0004, (uint8_t *)&Residue, 4, dev->transfer_size); - x54x_add_to_period(dev, 4); - x54x_log("32-bit Residual data length for reading: %d\n", Residue); - } + if (req->Is24bit) { + U32_TO_ADDR(Residue24, Residue); + dma_bm_read(req->CCBPointer + 0x0004, (uint8_t *) bytes, 4, dev->transfer_size); + memcpy((uint8_t *) bytes, (uint8_t *) &Residue24, 3); + dma_bm_write(req->CCBPointer + 0x0004, (uint8_t *) bytes, 4, dev->transfer_size); + x54x_add_to_period(dev, 3); + x54x_log("24-bit Residual data length for reading: %d\n", Residue); + } else { + dma_bm_write(req->CCBPointer + 0x0004, (uint8_t *) &Residue, 4, dev->transfer_size); + x54x_add_to_period(dev, 4); + x54x_log("32-bit Residual data length for reading: %d\n", Residue); + } } } - static void x54x_buf_dma_transfer(x54x_t *dev, Req_t *req, int Is24bit, int TransferLength, int dir) { uint32_t DataPointer, DataLength; uint32_t SGEntryLength = (Is24bit ? sizeof(SGE) : sizeof(SGE32)); uint32_t Address, i; - int32_t BufLen = scsi_devices[dev->bus][req->TargetID].buffer_length; - uint8_t read_from_host = (dir && ((req->CmdBlock.common.ControlByte == CCB_DATA_XFER_OUT) || (req->CmdBlock.common.ControlByte == 0x00))); - uint8_t write_to_host = (!dir && ((req->CmdBlock.common.ControlByte == CCB_DATA_XFER_IN) || (req->CmdBlock.common.ControlByte == 0x00))); - int sg_pos = 0; - SGE32 SGBuffer; + int32_t BufLen = scsi_devices[dev->bus][req->TargetID].buffer_length; + uint8_t read_from_host = (dir && ((req->CmdBlock.common.ControlByte == CCB_DATA_XFER_OUT) || (req->CmdBlock.common.ControlByte == 0x00))); + uint8_t write_to_host = (!dir && ((req->CmdBlock.common.ControlByte == CCB_DATA_XFER_IN) || (req->CmdBlock.common.ControlByte == 0x00))); + int sg_pos = 0; + SGE32 SGBuffer; uint32_t DataToTransfer = 0; if (Is24bit) { - DataPointer = ADDR_TO_U32(req->CmdBlock.old.DataPointer); - DataLength = ADDR_TO_U32(req->CmdBlock.old.DataLength); + DataPointer = ADDR_TO_U32(req->CmdBlock.old.DataPointer); + DataLength = ADDR_TO_U32(req->CmdBlock.old.DataLength); } else { - DataPointer = req->CmdBlock.new.DataPointer; - DataLength = req->CmdBlock.new.DataLength; + DataPointer = req->CmdBlock.new.DataPointer; + DataLength = req->CmdBlock.new.DataLength; } x54x_log("Data Buffer %s: length %d (%u), pointer 0x%04X\n", - dir ? "write" : "read", BufLen, DataLength, DataPointer); + dir ? "write" : "read", BufLen, DataLength, DataPointer); if ((req->CmdBlock.common.ControlByte != 0x03) && TransferLength && BufLen) { - if ((req->CmdBlock.common.Opcode == SCATTER_GATHER_COMMAND) || - (req->CmdBlock.common.Opcode == SCATTER_GATHER_COMMAND_RES)) { + if ((req->CmdBlock.common.Opcode == SCATTER_GATHER_COMMAND) || (req->CmdBlock.common.Opcode == SCATTER_GATHER_COMMAND_RES)) { - /* If the control byte is 0x00, it means that the transfer direction is set up by the SCSI command without - checking its length, so do this procedure for both no read/write commands. */ - if ((DataLength > 0) && (req->CmdBlock.common.ControlByte < 0x03)) { - for (i = 0; i < DataLength; i += SGEntryLength) { - x54x_rd_sge(dev, Is24bit, DataPointer + i, &SGBuffer); + /* If the control byte is 0x00, it means that the transfer direction is set up by the SCSI command without + checking its length, so do this procedure for both no read/write commands. */ + if ((DataLength > 0) && (req->CmdBlock.common.ControlByte < 0x03)) { + for (i = 0; i < DataLength; i += SGEntryLength) { + x54x_rd_sge(dev, Is24bit, DataPointer + i, &SGBuffer); - Address = SGBuffer.SegmentPointer; - DataToTransfer = MIN((int) SGBuffer.Segment, BufLen); + Address = SGBuffer.SegmentPointer; + DataToTransfer = MIN((int) SGBuffer.Segment, BufLen); - if (read_from_host && DataToTransfer) { - x54x_log("Reading S/G segment %i: length %i, pointer %08X\n", i, DataToTransfer, Address); - dma_bm_read(Address, &(scsi_devices[dev->bus][req->TargetID].sc->temp_buffer[sg_pos]), DataToTransfer, dev->transfer_size); - } - else if (write_to_host && DataToTransfer) { - x54x_log("Writing S/G segment %i: length %i, pointer %08X\n", i, DataToTransfer, Address); - dma_bm_write(Address, &(scsi_devices[dev->bus][req->TargetID].sc->temp_buffer[sg_pos]), DataToTransfer, dev->transfer_size); - } - else - x54x_log("No action on S/G segment %i: length %i, pointer %08X\n", i, DataToTransfer, Address); + if (read_from_host && DataToTransfer) { + x54x_log("Reading S/G segment %i: length %i, pointer %08X\n", i, DataToTransfer, Address); + dma_bm_read(Address, &(scsi_devices[dev->bus][req->TargetID].sc->temp_buffer[sg_pos]), DataToTransfer, dev->transfer_size); + } else if (write_to_host && DataToTransfer) { + x54x_log("Writing S/G segment %i: length %i, pointer %08X\n", i, DataToTransfer, Address); + dma_bm_write(Address, &(scsi_devices[dev->bus][req->TargetID].sc->temp_buffer[sg_pos]), DataToTransfer, dev->transfer_size); + } else + x54x_log("No action on S/G segment %i: length %i, pointer %08X\n", i, DataToTransfer, Address); - sg_pos += SGBuffer.Segment; + sg_pos += SGBuffer.Segment; - BufLen -= SGBuffer.Segment; - if (BufLen < 0) - BufLen = 0; + BufLen -= SGBuffer.Segment; + if (BufLen < 0) + BufLen = 0; - x54x_log("After S/G segment done: %i, %i\n", sg_pos, BufLen); - } - } - } else if ((req->CmdBlock.common.Opcode == SCSI_INITIATOR_COMMAND) || - (req->CmdBlock.common.Opcode == SCSI_INITIATOR_COMMAND_RES)) { - Address = DataPointer; + x54x_log("After S/G segment done: %i, %i\n", sg_pos, BufLen); + } + } + } else if ((req->CmdBlock.common.Opcode == SCSI_INITIATOR_COMMAND) || (req->CmdBlock.common.Opcode == SCSI_INITIATOR_COMMAND_RES)) { + Address = DataPointer; - if ((DataLength > 0) && (BufLen > 0) && (req->CmdBlock.common.ControlByte < 0x03)) { - if (read_from_host) - dma_bm_read(Address, scsi_devices[dev->bus][req->TargetID].sc->temp_buffer, MIN(BufLen, (int) DataLength), dev->transfer_size); - else if (write_to_host) - dma_bm_write(Address, scsi_devices[dev->bus][req->TargetID].sc->temp_buffer, MIN(BufLen, (int) DataLength), dev->transfer_size); - } - } + if ((DataLength > 0) && (BufLen > 0) && (req->CmdBlock.common.ControlByte < 0x03)) { + if (read_from_host) + dma_bm_read(Address, scsi_devices[dev->bus][req->TargetID].sc->temp_buffer, MIN(BufLen, (int) DataLength), dev->transfer_size); + else if (write_to_host) + dma_bm_write(Address, scsi_devices[dev->bus][req->TargetID].sc->temp_buffer, MIN(BufLen, (int) DataLength), dev->transfer_size); + } + } } } - static uint8_t ConvertSenseLength(uint8_t RequestSenseLength) { x54x_log("Unconverted Request Sense length %i\n", RequestSenseLength); if (RequestSenseLength == 0) - RequestSenseLength = 14; + RequestSenseLength = 14; else if (RequestSenseLength == 1) - RequestSenseLength = 0; + RequestSenseLength = 0; x54x_log("Request Sense length %i\n", RequestSenseLength); - return(RequestSenseLength); + return (RequestSenseLength); } - uint32_t SenseBufferPointer(Req_t *req) { uint32_t SenseBufferAddress; if (req->Is24bit) { - SenseBufferAddress = req->CCBPointer; - SenseBufferAddress += req->CmdBlock.common.CdbLength + 18; + SenseBufferAddress = req->CCBPointer; + SenseBufferAddress += req->CmdBlock.common.CdbLength + 18; } else { - SenseBufferAddress = req->CmdBlock.new.SensePointer; + SenseBufferAddress = req->CmdBlock.new.SensePointer; } - return(SenseBufferAddress); + return (SenseBufferAddress); } - static void SenseBufferFree(x54x_t *dev, Req_t *req, int Copy) { - uint8_t SenseLength = ConvertSenseLength(req->CmdBlock.common.RequestSenseLength); + uint8_t SenseLength = ConvertSenseLength(req->CmdBlock.common.RequestSenseLength); uint32_t SenseBufferAddress; - uint8_t temp_sense[256]; + uint8_t temp_sense[256]; if (SenseLength && Copy) { scsi_device_request_sense(&scsi_devices[dev->bus][req->TargetID], temp_sense, SenseLength); - /* - * The sense address, in 32-bit mode, is located in the - * Sense Pointer of the CCB, but in 24-bit mode, it is - * located at the end of the Command Descriptor Block. - */ - SenseBufferAddress = SenseBufferPointer(req); + /* + * The sense address, in 32-bit mode, is located in the + * Sense Pointer of the CCB, but in 24-bit mode, it is + * located at the end of the Command Descriptor Block. + */ + SenseBufferAddress = SenseBufferPointer(req); - x54x_log("Request Sense address: %02X\n", SenseBufferAddress); + x54x_log("Request Sense address: %02X\n", SenseBufferAddress); - x54x_log("SenseBufferFree(): Writing %i bytes at %08X\n", - SenseLength, SenseBufferAddress); - dma_bm_write(SenseBufferAddress, temp_sense, SenseLength, dev->transfer_size); - x54x_add_to_period(dev, SenseLength); - x54x_log("Sense data written to buffer: %02X %02X %02X\n", - temp_sense[2], temp_sense[12], temp_sense[13]); + x54x_log("SenseBufferFree(): Writing %i bytes at %08X\n", + SenseLength, SenseBufferAddress); + dma_bm_write(SenseBufferAddress, temp_sense, SenseLength, dev->transfer_size); + x54x_add_to_period(dev, SenseLength); + x54x_log("Sense data written to buffer: %02X %02X %02X\n", + temp_sense[2], temp_sense[12], temp_sense[13]); } } - static void x54x_scsi_cmd(x54x_t *dev) { - Req_t *req = &dev->Req; - uint8_t bit24 = !!req->Is24bit; - uint32_t i, target_cdb_len = 12; + Req_t *req = &dev->Req; + uint8_t bit24 = !!req->Is24bit; + uint32_t i, target_cdb_len = 12; scsi_device_t *sd; sd = &scsi_devices[dev->bus][req->TargetID]; - target_cdb_len = 12; + target_cdb_len = 12; dev->target_data_len = x54x_get_length(dev, req, bit24); if (!scsi_device_valid(sd)) - fatal("SCSI target on %02i has disappeared\n", req->TargetID); + fatal("SCSI target on %02i has disappeared\n", req->TargetID); x54x_log("dev->target_data_len = %i\n", dev->target_data_len); x54x_log("SCSI command being executed on ID %i, LUN %i\n", req->TargetID, req->LUN); x54x_log("SCSI CDB[0]=0x%02X\n", req->CmdBlock.common.Cdb[0]); - for (i=1; iCmdBlock.common.CdbLength; i++) - x54x_log("SCSI CDB[%i]=%i\n", i, req->CmdBlock.common.Cdb[i]); + for (i = 1; i < req->CmdBlock.common.CdbLength; i++) + x54x_log("SCSI CDB[%i]=%i\n", i, req->CmdBlock.common.Cdb[i]); memset(dev->temp_cdb, 0x00, target_cdb_len); if (req->CmdBlock.common.CdbLength <= target_cdb_len) { - memcpy(dev->temp_cdb, req->CmdBlock.common.Cdb, - req->CmdBlock.common.CdbLength); - x54x_add_to_period(dev, req->CmdBlock.common.CdbLength); + memcpy(dev->temp_cdb, req->CmdBlock.common.Cdb, + req->CmdBlock.common.CdbLength); + x54x_add_to_period(dev, req->CmdBlock.common.CdbLength); } else { - memcpy(dev->temp_cdb, req->CmdBlock.common.Cdb, target_cdb_len); - x54x_add_to_period(dev, target_cdb_len); + memcpy(dev->temp_cdb, req->CmdBlock.common.Cdb, target_cdb_len); + x54x_add_to_period(dev, target_cdb_len); } dev->Residue = 0; @@ -961,86 +927,83 @@ x54x_scsi_cmd(x54x_t *dev) x54x_log("Control byte: %02X\n", (req->CmdBlock.common.ControlByte == 0x03)); if (dev->scsi_cmd_phase == SCSI_PHASE_STATUS) - dev->callback_sub_phase = 3; + dev->callback_sub_phase = 3; else - dev->callback_sub_phase = 2; + dev->callback_sub_phase = 2; x54x_log("scsi_devices[%02i][%02i].Status = %02X\n", dev->bus, req->TargetID, sd->status); } - static void x54x_scsi_cmd_phase1(x54x_t *dev) { - Req_t *req = &dev->Req; - double p; - uint8_t bit24 = !!req->Is24bit; + Req_t *req = &dev->Req; + double p; + uint8_t bit24 = !!req->Is24bit; scsi_device_t *sd; sd = &scsi_devices[dev->bus][req->TargetID]; if (dev->scsi_cmd_phase != SCSI_PHASE_STATUS) { - if ((dev->temp_cdb[0] != 0x03) || (req->CmdBlock.common.ControlByte != 0x03)) { - p = scsi_device_get_callback(sd); - if (p <= 0.0) - x54x_add_to_period(dev, sd->buffer_length); - else - dev->media_period += p; - x54x_buf_dma_transfer(dev, req, bit24, dev->target_data_len, (dev->scsi_cmd_phase == SCSI_PHASE_DATA_OUT)); - scsi_device_command_phase1(sd); - } + if ((dev->temp_cdb[0] != 0x03) || (req->CmdBlock.common.ControlByte != 0x03)) { + p = scsi_device_get_callback(sd); + if (p <= 0.0) + x54x_add_to_period(dev, sd->buffer_length); + else + dev->media_period += p; + x54x_buf_dma_transfer(dev, req, bit24, dev->target_data_len, (dev->scsi_cmd_phase == SCSI_PHASE_DATA_OUT)); + scsi_device_command_phase1(sd); + } } dev->callback_sub_phase = 3; x54x_log("scsi_devices[%02xi][%02i].Status = %02X\n", x54x->bus, req->TargetID, sd->status); } - static void x54x_request_sense(x54x_t *dev) { - Req_t *req = &dev->Req; - uint32_t SenseBufferAddress; + Req_t *req = &dev->Req; + uint32_t SenseBufferAddress; scsi_device_t *sd; sd = &scsi_devices[dev->bus][req->TargetID]; if (dev->scsi_cmd_phase != SCSI_PHASE_STATUS) { - if ((dev->temp_cdb[0] == 0x03) && (req->CmdBlock.common.ControlByte == 0x03)) { - /* Request sense in non-data mode - sense goes to sense buffer. */ - sd->buffer_length = ConvertSenseLength(req->CmdBlock.common.RequestSenseLength); - if ((sd->status != SCSI_STATUS_OK) && (sd->buffer_length > 0)) { - SenseBufferAddress = SenseBufferPointer(req); - dma_bm_write(SenseBufferAddress, scsi_devices[dev->bus][req->TargetID].sc->temp_buffer, sd->buffer_length, dev->transfer_size); - x54x_add_to_period(dev, sd->buffer_length); - } - scsi_device_command_phase1(sd); - } else - SenseBufferFree(dev, req, (sd->status != SCSI_STATUS_OK)); + if ((dev->temp_cdb[0] == 0x03) && (req->CmdBlock.common.ControlByte == 0x03)) { + /* Request sense in non-data mode - sense goes to sense buffer. */ + sd->buffer_length = ConvertSenseLength(req->CmdBlock.common.RequestSenseLength); + if ((sd->status != SCSI_STATUS_OK) && (sd->buffer_length > 0)) { + SenseBufferAddress = SenseBufferPointer(req); + dma_bm_write(SenseBufferAddress, scsi_devices[dev->bus][req->TargetID].sc->temp_buffer, sd->buffer_length, dev->transfer_size); + x54x_add_to_period(dev, sd->buffer_length); + } + scsi_device_command_phase1(sd); + } else + SenseBufferFree(dev, req, (sd->status != SCSI_STATUS_OK)); } else - SenseBufferFree(dev, req, (sd->status != SCSI_STATUS_OK)); + SenseBufferFree(dev, req, (sd->status != SCSI_STATUS_OK)); x54x_set_residue(dev, req, dev->target_data_len); x54x_log("Request complete\n"); if (sd->status == SCSI_STATUS_OK) { - x54x_mbi_setup(dev, req->CCBPointer, &req->CmdBlock, - CCB_COMPLETE, SCSI_STATUS_OK, MBI_SUCCESS); + x54x_mbi_setup(dev, req->CCBPointer, &req->CmdBlock, + CCB_COMPLETE, SCSI_STATUS_OK, MBI_SUCCESS); } else if (sd->status == SCSI_STATUS_CHECK_CONDITION) { - x54x_mbi_setup(dev, req->CCBPointer, &req->CmdBlock, - CCB_COMPLETE, SCSI_STATUS_CHECK_CONDITION, MBI_ERROR); + x54x_mbi_setup(dev, req->CCBPointer, &req->CmdBlock, + CCB_COMPLETE, SCSI_STATUS_CHECK_CONDITION, MBI_ERROR); } dev->callback_sub_phase = 4; x54x_log("scsi_devices[%02i][%02i].Status = %02X\n", dev->bus, req->TargetID, sd->status); } - static void x54x_mbo_free(x54x_t *dev) { - uint8_t CmdStatus = MBO_FREE; + uint8_t CmdStatus = MBO_FREE; uint32_t CodeOffset = 0; CodeOffset = (dev->flags & X54X_MBX_24BIT) ? 0 : 7; @@ -1049,11 +1012,10 @@ x54x_mbo_free(x54x_t *dev) dma_bm_write(dev->Outgoing + CodeOffset, &CmdStatus, 1, dev->transfer_size); } - static void x54x_notify(x54x_t *dev) { - Req_t *req = &dev->Req; + Req_t *req = &dev->Req; scsi_device_t *sd; sd = &scsi_devices[dev->bus][req->TargetID]; @@ -1061,41 +1023,40 @@ x54x_notify(x54x_t *dev) x54x_mbo_free(dev); if (dev->MailboxIsBIOS) - x54x_ccb(dev); + x54x_ccb(dev); else - x54x_mbi(dev); + x54x_mbi(dev); /* Make sure to restore device to non-IDENTIFY'd state as we disconnect. */ if (sd->type != SCSI_NONE) - scsi_device_identify(sd, SCSI_LUN_USE_CDB); + scsi_device_identify(sd, SCSI_LUN_USE_CDB); } - static void x54x_req_setup(x54x_t *dev, uint32_t CCBPointer, Mailbox32_t *Mailbox32) { - Req_t *req = &dev->Req; - uint8_t id, lun; + Req_t *req = &dev->Req; + uint8_t id, lun; scsi_device_t *sd; /* Fetch data from the Command Control Block. */ - dma_bm_read(CCBPointer, (uint8_t *)&req->CmdBlock, sizeof(CCB32), dev->transfer_size); + dma_bm_read(CCBPointer, (uint8_t *) &req->CmdBlock, sizeof(CCB32), dev->transfer_size); x54x_add_to_period(dev, sizeof(CCB32)); - req->Is24bit = !!(dev->flags & X54X_MBX_24BIT); + req->Is24bit = !!(dev->flags & X54X_MBX_24BIT); req->CCBPointer = CCBPointer; - req->TargetID = req->Is24bit ? req->CmdBlock.old.Id : req->CmdBlock.new.Id; - req->LUN = req->Is24bit ? req->CmdBlock.old.Lun : req->CmdBlock.new.Lun; + req->TargetID = req->Is24bit ? req->CmdBlock.old.Id : req->CmdBlock.new.Id; + req->LUN = req->Is24bit ? req->CmdBlock.old.Lun : req->CmdBlock.new.Lun; - id = req->TargetID; - sd = &scsi_devices[dev->bus][id]; + id = req->TargetID; + sd = &scsi_devices[dev->bus][id]; lun = req->LUN; if ((id > dev->max_id) || (lun > 7)) { - x54x_log("SCSI Target ID %i or LUN %i is not valid\n",id,lun); - x54x_mbi_setup(dev, CCBPointer, &req->CmdBlock, - CCB_SELECTION_TIMEOUT, SCSI_STATUS_OK, MBI_ERROR); - dev->callback_sub_phase = 4; - return; + x54x_log("SCSI Target ID %i or LUN %i is not valid\n", id, lun); + x54x_mbi_setup(dev, CCBPointer, &req->CmdBlock, + CCB_SELECTION_TIMEOUT, SCSI_STATUS_OK, MBI_ERROR); + dev->callback_sub_phase = 4; + return; } x54x_log("Scanning SCSI Target ID %i\n", id); @@ -1103,121 +1064,117 @@ x54x_req_setup(x54x_t *dev, uint32_t CCBPointer, Mailbox32_t *Mailbox32) sd->status = SCSI_STATUS_OK; if (!scsi_device_present(sd) || (lun > 0)) { - x54x_log("SCSI Target ID %i and LUN %i have no device attached\n",id,lun); - x54x_mbi_setup(dev, CCBPointer, &req->CmdBlock, - CCB_SELECTION_TIMEOUT, SCSI_STATUS_OK, MBI_ERROR); - dev->callback_sub_phase = 4; + x54x_log("SCSI Target ID %i and LUN %i have no device attached\n", id, lun); + x54x_mbi_setup(dev, CCBPointer, &req->CmdBlock, + CCB_SELECTION_TIMEOUT, SCSI_STATUS_OK, MBI_ERROR); + dev->callback_sub_phase = 4; } else { - x54x_log("SCSI Target ID %i detected and working\n", id); - scsi_device_identify(sd, lun); + x54x_log("SCSI Target ID %i detected and working\n", id); + scsi_device_identify(sd, lun); - x54x_log("Transfer Control %02X\n", req->CmdBlock.common.ControlByte); - x54x_log("CDB Length %i\n", req->CmdBlock.common.CdbLength); - x54x_log("CCB Opcode %x\n", req->CmdBlock.common.Opcode); - if ((req->CmdBlock.common.Opcode > 0x04) && (req->CmdBlock.common.Opcode != 0x81)) { - x54x_log("Invalid opcode: %02X\n", - req->CmdBlock.common.ControlByte); - x54x_mbi_setup(dev, CCBPointer, &req->CmdBlock, CCB_INVALID_OP_CODE, SCSI_STATUS_OK, MBI_ERROR); - dev->callback_sub_phase = 4; - return; - } - if (req->CmdBlock.common.Opcode == 0x81) { - x54x_log("Bus reset opcode\n"); - scsi_device_reset(sd); - x54x_mbi_setup(dev, req->CCBPointer, &req->CmdBlock, - CCB_COMPLETE, SCSI_STATUS_OK, MBI_SUCCESS); - dev->callback_sub_phase = 4; - return; - } + x54x_log("Transfer Control %02X\n", req->CmdBlock.common.ControlByte); + x54x_log("CDB Length %i\n", req->CmdBlock.common.CdbLength); + x54x_log("CCB Opcode %x\n", req->CmdBlock.common.Opcode); + if ((req->CmdBlock.common.Opcode > 0x04) && (req->CmdBlock.common.Opcode != 0x81)) { + x54x_log("Invalid opcode: %02X\n", + req->CmdBlock.common.ControlByte); + x54x_mbi_setup(dev, CCBPointer, &req->CmdBlock, CCB_INVALID_OP_CODE, SCSI_STATUS_OK, MBI_ERROR); + dev->callback_sub_phase = 4; + return; + } + if (req->CmdBlock.common.Opcode == 0x81) { + x54x_log("Bus reset opcode\n"); + scsi_device_reset(sd); + x54x_mbi_setup(dev, req->CCBPointer, &req->CmdBlock, + CCB_COMPLETE, SCSI_STATUS_OK, MBI_SUCCESS); + dev->callback_sub_phase = 4; + return; + } - dev->callback_sub_phase = 1; + dev->callback_sub_phase = 1; } } - static void x54x_req_abort(x54x_t *dev, uint32_t CCBPointer) { CCBU CmdBlock; /* Fetch data from the Command Control Block. */ - dma_bm_read(CCBPointer, (uint8_t *)&CmdBlock, sizeof(CCB32), dev->transfer_size); + dma_bm_read(CCBPointer, (uint8_t *) &CmdBlock, sizeof(CCB32), dev->transfer_size); x54x_add_to_period(dev, sizeof(CCB32)); x54x_mbi_setup(dev, CCBPointer, &CmdBlock, - 0x26, SCSI_STATUS_OK, MBI_NOT_FOUND); + 0x26, SCSI_STATUS_OK, MBI_NOT_FOUND); dev->callback_sub_phase = 4; } - static uint32_t x54x_mbo(x54x_t *dev, Mailbox32_t *Mailbox32) { Mailbox_t MailboxOut; - uint32_t Outgoing; - uint32_t ccbp; - uint32_t Addr; - uint32_t Cur; + uint32_t Outgoing; + uint32_t ccbp; + uint32_t Addr; + uint32_t Cur; if (dev->MailboxIsBIOS) { - Addr = dev->BIOSMailboxOutAddr; - Cur = dev->BIOSMailboxOutPosCur; + Addr = dev->BIOSMailboxOutAddr; + Cur = dev->BIOSMailboxOutPosCur; } else { - Addr = dev->MailboxOutAddr; - Cur = dev->MailboxOutPosCur; + Addr = dev->MailboxOutAddr; + Cur = dev->MailboxOutPosCur; } if (dev->flags & X54X_MBX_24BIT) { - Outgoing = Addr + (Cur * sizeof(Mailbox_t)); - dma_bm_read(Outgoing, (uint8_t *)&MailboxOut, sizeof(Mailbox_t), dev->transfer_size); - x54x_add_to_period(dev, sizeof(Mailbox_t)); + Outgoing = Addr + (Cur * sizeof(Mailbox_t)); + dma_bm_read(Outgoing, (uint8_t *) &MailboxOut, sizeof(Mailbox_t), dev->transfer_size); + x54x_add_to_period(dev, sizeof(Mailbox_t)); - ccbp = *(uint32_t *) &MailboxOut; - Mailbox32->CCBPointer = (ccbp >> 24) | ((ccbp >> 8) & 0xff00) | ((ccbp << 8) & 0xff0000); - Mailbox32->u.out.ActionCode = MailboxOut.CmdStatus; + ccbp = *(uint32_t *) &MailboxOut; + Mailbox32->CCBPointer = (ccbp >> 24) | ((ccbp >> 8) & 0xff00) | ((ccbp << 8) & 0xff0000); + Mailbox32->u.out.ActionCode = MailboxOut.CmdStatus; } else { - Outgoing = Addr + (Cur * sizeof(Mailbox32_t)); + Outgoing = Addr + (Cur * sizeof(Mailbox32_t)); - dma_bm_read(Outgoing, (uint8_t *)Mailbox32, sizeof(Mailbox32_t), dev->transfer_size); - x54x_add_to_period(dev, sizeof(Mailbox32_t)); + dma_bm_read(Outgoing, (uint8_t *) Mailbox32, sizeof(Mailbox32_t), dev->transfer_size); + x54x_add_to_period(dev, sizeof(Mailbox32_t)); } - return(Outgoing); + return (Outgoing); } - uint8_t x54x_mbo_process(x54x_t *dev) { Mailbox32_t mb32; - dev->ToRaise = 0; + dev->ToRaise = 0; dev->Outgoing = x54x_mbo(dev, &mb32); if (mb32.u.out.ActionCode == MBO_START) { - x54x_log("Start Mailbox Command\n"); - x54x_req_setup(dev, mb32.CCBPointer, &mb32); + x54x_log("Start Mailbox Command\n"); + x54x_req_setup(dev, mb32.CCBPointer, &mb32); } else if (!dev->MailboxIsBIOS && (mb32.u.out.ActionCode == MBO_ABORT)) { - x54x_log("Abort Mailbox Command\n"); - x54x_req_abort(dev, mb32.CCBPointer); + x54x_log("Abort Mailbox Command\n"); + x54x_req_abort(dev, mb32.CCBPointer); } /* else { - x54x_log("Invalid action code: %02X\n", mb32.u.out.ActionCode); + x54x_log("Invalid action code: %02X\n", mb32.u.out.ActionCode); } */ if ((mb32.u.out.ActionCode == MBO_START) || (!dev->MailboxIsBIOS && (mb32.u.out.ActionCode == MBO_ABORT))) { - /* We got the mailbox, decrease the number of pending requests. */ - if (dev->MailboxIsBIOS) - dev->BIOSMailboxReq--; - else - dev->MailboxReq--; + /* We got the mailbox, decrease the number of pending requests. */ + if (dev->MailboxIsBIOS) + dev->BIOSMailboxReq--; + else + dev->MailboxReq--; - return(1); + return (1); } - return(0); + return (0); } - static void x54x_do_mail(x54x_t *dev) { @@ -1226,99 +1183,97 @@ x54x_do_mail(x54x_t *dev) dev->MailboxIsBIOS = 0; if (dev->is_aggressive_mode) { - aggressive = dev->is_aggressive_mode(dev); - x54x_log("Processing mailboxes in %s mode...\n", aggressive ? "aggressive" : "strict"); - }/* else { - x54x_log("Defaulting to process mailboxes in %s mode...\n", aggressive ? "aggressive" : "strict"); - }*/ + aggressive = dev->is_aggressive_mode(dev); + x54x_log("Processing mailboxes in %s mode...\n", aggressive ? "aggressive" : "strict"); + } /* else { + x54x_log("Defaulting to process mailboxes in %s mode...\n", aggressive ? "aggressive" : "strict"); + }*/ if (!dev->MailboxCount) { - x54x_log("x54x_do_mail(): No Mailboxes\n"); - return; + x54x_log("x54x_do_mail(): No Mailboxes\n"); + return; } if (aggressive) { - /* Search for a filled mailbox - stop if we have scanned all mailboxes. */ - for (dev->MailboxOutPosCur = 0; dev->MailboxOutPosCur < dev->MailboxCount; dev->MailboxOutPosCur++) { - if (x54x_mbo_process(dev)) - break; - } + /* Search for a filled mailbox - stop if we have scanned all mailboxes. */ + for (dev->MailboxOutPosCur = 0; dev->MailboxOutPosCur < dev->MailboxCount; dev->MailboxOutPosCur++) { + if (x54x_mbo_process(dev)) + break; + } } else { - /* Strict round robin mode - only process the current mailbox and advance the pointer if successful. */ - if (x54x_mbo_process(dev)) { - dev->MailboxOutPosCur++; - dev->MailboxOutPosCur %= dev->MailboxCount; - } + /* Strict round robin mode - only process the current mailbox and advance the pointer if successful. */ + if (x54x_mbo_process(dev)) { + dev->MailboxOutPosCur++; + dev->MailboxOutPosCur %= dev->MailboxCount; + } } } - static void x54x_cmd_done(x54x_t *dev, int suppress); - static void x54x_cmd_callback(void *priv) { - double period; + double period; x54x_t *dev = (x54x_t *) priv; int mailboxes_present, bios_mailboxes_present; - mailboxes_present = (!(dev->Status & STAT_INIT) && dev->MailboxInit && dev->MailboxReq); + mailboxes_present = (!(dev->Status & STAT_INIT) && dev->MailboxInit && dev->MailboxReq); bios_mailboxes_present = (dev->ven_callback && dev->BIOSMailboxInit && dev->BIOSMailboxReq); - dev->temp_period = 0; + dev->temp_period = 0; dev->media_period = 0.0; switch (dev->callback_sub_phase) { - case 0: - /* Sub-phase 0 - Look for mailbox. */ - if ((dev->callback_phase == 0) && mailboxes_present) - x54x_do_mail(dev); - else if ((dev->callback_phase == 1) && bios_mailboxes_present) - dev->ven_callback(dev); + case 0: + /* Sub-phase 0 - Look for mailbox. */ + if ((dev->callback_phase == 0) && mailboxes_present) + x54x_do_mail(dev); + else if ((dev->callback_phase == 1) && bios_mailboxes_present) + dev->ven_callback(dev); - if (dev->ven_callback && (dev->callback_sub_phase == 0)) - dev->callback_phase ^= 1; - break; - case 1: - /* Sub-phase 1 - Do SCSI command phase 0. */ - x54x_log("%s: Callback: Process SCSI request\n", dev->name); - x54x_scsi_cmd(dev); - break; - case 2: - /* Sub-phase 2 - Do SCSI command phase 1. */ - x54x_log("%s: Callback: Process SCSI request\n", dev->name); - x54x_scsi_cmd_phase1(dev); - break; - case 3: - /* Sub-phase 3 - Request sense. */ - x54x_log("%s: Callback: Process SCSI request\n", dev->name); - x54x_request_sense(dev); - break; - case 4: - /* Sub-phase 4 - Notify. */ - x54x_log("%s: Callback: Send incoming mailbox\n", dev->name); - x54x_notify(dev); + if (dev->ven_callback && (dev->callback_sub_phase == 0)) + dev->callback_phase ^= 1; + break; + case 1: + /* Sub-phase 1 - Do SCSI command phase 0. */ + x54x_log("%s: Callback: Process SCSI request\n", dev->name); + x54x_scsi_cmd(dev); + break; + case 2: + /* Sub-phase 2 - Do SCSI command phase 1. */ + x54x_log("%s: Callback: Process SCSI request\n", dev->name); + x54x_scsi_cmd_phase1(dev); + break; + case 3: + /* Sub-phase 3 - Request sense. */ + x54x_log("%s: Callback: Process SCSI request\n", dev->name); + x54x_request_sense(dev); + break; + case 4: + /* Sub-phase 4 - Notify. */ + x54x_log("%s: Callback: Send incoming mailbox\n", dev->name); + x54x_notify(dev); - /* Go back to lookup phase. */ - dev->callback_sub_phase = 0; + /* Go back to lookup phase. */ + dev->callback_sub_phase = 0; - /* Toggle normal/BIOS mailbox - only has an effect if both types of mailboxes - have been initialized. */ - if (dev->ven_callback) - dev->callback_phase ^= 1; + /* Toggle normal/BIOS mailbox - only has an effect if both types of mailboxes + have been initialized. */ + if (dev->ven_callback) + dev->callback_phase ^= 1; - /* Add to period and raise the IRQ if needed. */ - x54x_add_to_period(dev, 1); + /* Add to period and raise the IRQ if needed. */ + x54x_add_to_period(dev, 1); - if (dev->ToRaise) - raise_irq(dev, 0, dev->ToRaise); - break; - default: - x54x_log("Invalid sub-phase: %02X\n", dev->callback_sub_phase); - break; + if (dev->ToRaise) + raise_irq(dev, 0, dev->ToRaise); + break; + default: + x54x_log("Invalid sub-phase: %02X\n", dev->callback_sub_phase); + break; } period = (1000000.0 / dev->ha_bps) * ((double) dev->temp_period); @@ -1326,119 +1281,120 @@ x54x_cmd_callback(void *priv) // x54x_log("Temporary period: %lf us (%" PRIi64 " periods)\n", dev->timer.period, dev->temp_period); } - static uint8_t x54x_in(uint16_t port, void *priv) { - x54x_t *dev = (x54x_t *)priv; + x54x_t *dev = (x54x_t *) priv; uint8_t ret; switch (port & 3) { - case 0: - default: - ret = dev->Status; - break; + case 0: + default: + ret = dev->Status; + break; - case 1: - ret = dev->DataBuf[dev->DataReply]; - if (dev->DataReplyLeft) { - dev->DataReply++; - dev->DataReplyLeft--; - if (! dev->DataReplyLeft) - x54x_cmd_done(dev, 0); - } - break; + case 1: + ret = dev->DataBuf[dev->DataReply]; + if (dev->DataReplyLeft) { + dev->DataReply++; + dev->DataReplyLeft--; + if (!dev->DataReplyLeft) + x54x_cmd_done(dev, 0); + } + break; - case 2: - if (dev->flags & X54X_INT_GEOM_WRITABLE) - ret = dev->Interrupt; - else - ret = dev->Interrupt & ~0x70; - break; + case 2: + if (dev->flags & X54X_INT_GEOM_WRITABLE) + ret = dev->Interrupt; + else + ret = dev->Interrupt & ~0x70; + break; - case 3: - /* Bits according to ASPI4DOS.SYS v3.36: - 0 Not checked - 1 Must be 0 - 2 Must be 0-0-0-1 - 3 Must be 0 - 4 Must be 0-1-0-0 - 5 Must be 0 - 6 Not checked - 7 Not checked - */ - if (dev->flags & X54X_INT_GEOM_WRITABLE) - ret = dev->Geometry; - else { - switch(dev->Geometry) { - case 0: default: ret = 'A'; break; - case 1: ret = 'D'; break; - case 2: ret = 'A'; break; - case 3: ret = 'P'; break; - } - ret ^= 1; - dev->Geometry++; - dev->Geometry &= 0x03; - break; - } - break; + case 3: + /* Bits according to ASPI4DOS.SYS v3.36: + 0 Not checked + 1 Must be 0 + 2 Must be 0-0-0-1 + 3 Must be 0 + 4 Must be 0-1-0-0 + 5 Must be 0 + 6 Not checked + 7 Not checked + */ + if (dev->flags & X54X_INT_GEOM_WRITABLE) + ret = dev->Geometry; + else { + switch (dev->Geometry) { + case 0: + default: + ret = 'A'; + break; + case 1: + ret = 'D'; + break; + case 2: + ret = 'A'; + break; + case 3: + ret = 'P'; + break; + } + ret ^= 1; + dev->Geometry++; + dev->Geometry &= 0x03; + break; + } + break; } #ifdef ENABLE_X54X_LOG if (port == 0x0332) - x54x_log("x54x_in(): %04X, %02X, %08X\n", port, ret, dev->DataReplyLeft); + x54x_log("x54x_in(): %04X, %02X, %08X\n", port, ret, dev->DataReplyLeft); else - x54x_log("x54x_in(): %04X, %02X\n", port, ret); + x54x_log("x54x_in(): %04X, %02X\n", port, ret); #endif - return(ret); + return (ret); } - static uint16_t x54x_inw(uint16_t port, void *priv) { - return((uint16_t) x54x_in(port, priv)); + return ((uint16_t) x54x_in(port, priv)); } - static uint32_t x54x_inl(uint16_t port, void *priv) { - return((uint32_t) x54x_in(port, priv)); + return ((uint32_t) x54x_in(port, priv)); } - static uint8_t x54x_readb(uint32_t port, void *priv) { - return(x54x_in(port & 3, priv)); + return (x54x_in(port & 3, priv)); } - static uint16_t x54x_readw(uint32_t port, void *priv) { - return(x54x_inw(port & 3, priv)); + return (x54x_inw(port & 3, priv)); } - static uint32_t x54x_readl(uint32_t port, void *priv) { - return(x54x_inl(port & 3, priv)); + return (x54x_inl(port & 3, priv)); } - static void x54x_reset_poll(void *priv) { - x54x_t *dev = (x54x_t *)priv; + x54x_t *dev = (x54x_t *) priv; dev->Status = STAT_INIT | STAT_IDLE; } - static void x54x_reset(x54x_t *dev) { @@ -1446,487 +1402,473 @@ x54x_reset(x54x_t *dev) clear_irq(dev); if (dev->flags & X54X_INT_GEOM_WRITABLE) - dev->Geometry = 0x80; + dev->Geometry = 0x80; else - dev->Geometry = 0x00; - dev->callback_phase = 0; + dev->Geometry = 0x00; + dev->callback_phase = 0; dev->callback_sub_phase = 0; timer_stop(&dev->timer); timer_set_delay_u64(&dev->timer, (uint64_t) (dev->timer.period * ((double) TIMER_USEC))); - dev->Command = 0xFF; - dev->CmdParam = 0; + dev->Command = 0xFF; + dev->CmdParam = 0; dev->CmdParamLeft = 0; dev->flags |= X54X_MBX_24BIT; - dev->MailboxInPosCur = 0; + dev->MailboxInPosCur = 0; dev->MailboxOutInterrupts = 0; - dev->PendingInterrupt = 0; - dev->IrqEnabled = 1; - dev->MailboxCount = 0; - dev->MailboxOutPosCur = 0; + dev->PendingInterrupt = 0; + dev->IrqEnabled = 1; + dev->MailboxCount = 0; + dev->MailboxOutPosCur = 0; /* Reset all devices on controller reset. */ for (i = 0; i < 16; i++) - scsi_device_reset(&scsi_devices[dev->bus][i]); + scsi_device_reset(&scsi_devices[dev->bus][i]); if (dev->ven_reset) - dev->ven_reset(dev); + dev->ven_reset(dev); } - void x54x_reset_ctrl(x54x_t *dev, uint8_t Reset) { /* Say hello! */ x54x_log("%s %s (IO=0x%04X, IRQ=%d, DMA=%d, BIOS @%05lX) ID=%d\n", - dev->vendor, dev->name, dev->Base, dev->Irq, dev->DmaChannel, - dev->rom_addr, dev->HostID); + dev->vendor, dev->name, dev->Base, dev->Irq, dev->DmaChannel, + dev->rom_addr, dev->HostID); x54x_reset(dev); if (Reset) { - dev->Status = STAT_STST; - timer_set_delay_u64(&dev->ResetCB, X54X_RESET_DURATION_US * TIMER_USEC); + dev->Status = STAT_STST; + timer_set_delay_u64(&dev->ResetCB, X54X_RESET_DURATION_US * TIMER_USEC); } else - dev->Status = STAT_INIT | STAT_IDLE; + dev->Status = STAT_INIT | STAT_IDLE; } - static void x54x_out(uint16_t port, uint8_t val, void *priv) { ReplyInquireSetupInformation *ReplyISI; - x54x_t *dev = (x54x_t *)priv; - MailboxInit_t *mbi; - int i = 0; - BIOSCMD *cmd; - uint16_t cyl = 0; - int suppress = 0; - uint32_t FIFOBuf; - uint8_t reset; - addr24 Address; - uint8_t host_id = dev->HostID; - uint8_t irq = 0; + x54x_t *dev = (x54x_t *) priv; + MailboxInit_t *mbi; + int i = 0; + BIOSCMD *cmd; + uint16_t cyl = 0; + int suppress = 0; + uint32_t FIFOBuf; + uint8_t reset; + addr24 Address; + uint8_t host_id = dev->HostID; + uint8_t irq = 0; x54x_log("%s: Write Port 0x%02X, Value %02X\n", dev->name, port, val); switch (port & 3) { - case 0: - if ((val & CTRL_HRST) || (val & CTRL_SRST)) { - reset = (val & CTRL_HRST); - x54x_log("Reset completed = %x\n", reset); - x54x_reset_ctrl(dev, reset); - x54x_log("Controller reset\n"); - break; - } + case 0: + if ((val & CTRL_HRST) || (val & CTRL_SRST)) { + reset = (val & CTRL_HRST); + x54x_log("Reset completed = %x\n", reset); + x54x_reset_ctrl(dev, reset); + x54x_log("Controller reset\n"); + break; + } - if (val & CTRL_SCRST) { - /* Reset all devices on SCSI bus reset. */ - for (i = 0; i < 16; i++) - scsi_device_reset(&scsi_devices[dev->bus][i]); - } + if (val & CTRL_SCRST) { + /* Reset all devices on SCSI bus reset. */ + for (i = 0; i < 16; i++) + scsi_device_reset(&scsi_devices[dev->bus][i]); + } - if (val & CTRL_IRST) { - clear_irq(dev); - x54x_log("Interrupt reset\n"); - } - break; + if (val & CTRL_IRST) { + clear_irq(dev); + x54x_log("Interrupt reset\n"); + } + break; - case 1: - /* Fast path for the mailbox execution command. */ - if ((val == CMD_START_SCSI) && (dev->Command == 0xff)) { - dev->MailboxReq++; - x54x_log("Start SCSI command\n"); - return; - } - if (dev->ven_fast_cmds) { - if (dev->Command == 0xff) { - if (dev->ven_fast_cmds(dev, val)) - return; - } - } + case 1: + /* Fast path for the mailbox execution command. */ + if ((val == CMD_START_SCSI) && (dev->Command == 0xff)) { + dev->MailboxReq++; + x54x_log("Start SCSI command\n"); + return; + } + if (dev->ven_fast_cmds) { + if (dev->Command == 0xff) { + if (dev->ven_fast_cmds(dev, val)) + return; + } + } - if (dev->Command == 0xff) { - dev->Command = val; - dev->CmdParam = 0; - dev->CmdParamLeft = 0; + if (dev->Command == 0xff) { + dev->Command = val; + dev->CmdParam = 0; + dev->CmdParamLeft = 0; - dev->Status &= ~(STAT_INVCMD | STAT_IDLE); - x54x_log("%s: Operation Code 0x%02X\n", dev->name, val); - switch (dev->Command) { - case CMD_MBINIT: - dev->CmdParamLeft = sizeof(MailboxInit_t); - break; + dev->Status &= ~(STAT_INVCMD | STAT_IDLE); + x54x_log("%s: Operation Code 0x%02X\n", dev->name, val); + switch (dev->Command) { + case CMD_MBINIT: + dev->CmdParamLeft = sizeof(MailboxInit_t); + break; - case CMD_BIOSCMD: - dev->CmdParamLeft = 10; - break; + case CMD_BIOSCMD: + dev->CmdParamLeft = 10; + break; - case CMD_EMBOI: - case CMD_BUSON_TIME: - case CMD_BUSOFF_TIME: - case CMD_DMASPEED: - case CMD_RETSETUP: - case CMD_ECHO: - case CMD_OPTIONS: - dev->CmdParamLeft = 1; - break; + case CMD_EMBOI: + case CMD_BUSON_TIME: + case CMD_BUSOFF_TIME: + case CMD_DMASPEED: + case CMD_RETSETUP: + case CMD_ECHO: + case CMD_OPTIONS: + dev->CmdParamLeft = 1; + break; - case CMD_SELTIMEOUT: - dev->CmdParamLeft = 4; - break; + case CMD_SELTIMEOUT: + dev->CmdParamLeft = 4; + break; - case CMD_WRITE_CH2: - case CMD_READ_CH2: - dev->CmdParamLeft = 3; - break; + case CMD_WRITE_CH2: + case CMD_READ_CH2: + dev->CmdParamLeft = 3; + break; - default: - if (dev->get_ven_param_len) - dev->CmdParamLeft = dev->get_ven_param_len(dev); - break; - } - } else { - dev->CmdBuf[dev->CmdParam] = val; - dev->CmdParam++; - dev->CmdParamLeft--; + default: + if (dev->get_ven_param_len) + dev->CmdParamLeft = dev->get_ven_param_len(dev); + break; + } + } else { + dev->CmdBuf[dev->CmdParam] = val; + dev->CmdParam++; + dev->CmdParamLeft--; - if (dev->ven_cmd_phase1) - dev->ven_cmd_phase1(dev); - } + if (dev->ven_cmd_phase1) + dev->ven_cmd_phase1(dev); + } - if (! dev->CmdParamLeft) { - x54x_log("Running Operation Code 0x%02X\n", dev->Command); - switch (dev->Command) { - case CMD_NOP: /* No Operation */ - dev->DataReplyLeft = 0; - break; + if (!dev->CmdParamLeft) { + x54x_log("Running Operation Code 0x%02X\n", dev->Command); + switch (dev->Command) { + case CMD_NOP: /* No Operation */ + dev->DataReplyLeft = 0; + break; - case CMD_MBINIT: /* mailbox initialization */ - dev->flags |= X54X_MBX_24BIT; + case CMD_MBINIT: /* mailbox initialization */ + dev->flags |= X54X_MBX_24BIT; - mbi = (MailboxInit_t *)dev->CmdBuf; + mbi = (MailboxInit_t *) dev->CmdBuf; - dev->MailboxInit = 1; - dev->MailboxCount = mbi->Count; - dev->MailboxOutAddr = ADDR_TO_U32(mbi->Address); - dev->MailboxInAddr = dev->MailboxOutAddr + (dev->MailboxCount * sizeof(Mailbox_t)); + dev->MailboxInit = 1; + dev->MailboxCount = mbi->Count; + dev->MailboxOutAddr = ADDR_TO_U32(mbi->Address); + dev->MailboxInAddr = dev->MailboxOutAddr + (dev->MailboxCount * sizeof(Mailbox_t)); - x54x_log("Initialize Mailbox: MBO=0x%08lx, MBI=0x%08lx, %d entries at 0x%08lx\n", - dev->MailboxOutAddr, - dev->MailboxInAddr, - mbi->Count, - ADDR_TO_U32(mbi->Address)); + x54x_log("Initialize Mailbox: MBO=0x%08lx, MBI=0x%08lx, %d entries at 0x%08lx\n", + dev->MailboxOutAddr, + dev->MailboxInAddr, + mbi->Count, + ADDR_TO_U32(mbi->Address)); - dev->Status &= ~STAT_INIT; - dev->DataReplyLeft = 0; - x54x_log("Mailbox init: "); - break; + dev->Status &= ~STAT_INIT; + dev->DataReplyLeft = 0; + x54x_log("Mailbox init: "); + break; - case CMD_BIOSCMD: /* execute BIOS */ - cmd = (BIOSCMD *)dev->CmdBuf; - if (!(dev->flags & X54X_LBA_BIOS)) { - /* 1640 uses LBA. */ - cyl = ((cmd->u.chs.cyl & 0xff) << 8) | ((cmd->u.chs.cyl >> 8) & 0xff); - cmd->u.chs.cyl = cyl; - } - if (dev->flags & X54X_LBA_BIOS) { - /* 1640 uses LBA. */ - x54x_log("BIOS LBA=%06lx (%lu)\n", - lba32_blk(cmd), - lba32_blk(cmd)); - } else { - cmd->u.chs.head &= 0xf; - cmd->u.chs.sec &= 0x1f; - x54x_log("BIOS CHS=%04X/%02X%02X\n", - cmd->u.chs.cyl, - cmd->u.chs.head, - cmd->u.chs.sec); - } - dev->DataBuf[0] = x54x_bios_command(dev, dev->max_id, cmd, !!(dev->flags & X54X_LBA_BIOS)); - x54x_log("BIOS Completion/Status Code %x\n", dev->DataBuf[0]); - dev->DataReplyLeft = 1; - break; + case CMD_BIOSCMD: /* execute BIOS */ + cmd = (BIOSCMD *) dev->CmdBuf; + if (!(dev->flags & X54X_LBA_BIOS)) { + /* 1640 uses LBA. */ + cyl = ((cmd->u.chs.cyl & 0xff) << 8) | ((cmd->u.chs.cyl >> 8) & 0xff); + cmd->u.chs.cyl = cyl; + } + if (dev->flags & X54X_LBA_BIOS) { + /* 1640 uses LBA. */ + x54x_log("BIOS LBA=%06lx (%lu)\n", + lba32_blk(cmd), + lba32_blk(cmd)); + } else { + cmd->u.chs.head &= 0xf; + cmd->u.chs.sec &= 0x1f; + x54x_log("BIOS CHS=%04X/%02X%02X\n", + cmd->u.chs.cyl, + cmd->u.chs.head, + cmd->u.chs.sec); + } + dev->DataBuf[0] = x54x_bios_command(dev, dev->max_id, cmd, !!(dev->flags & X54X_LBA_BIOS)); + x54x_log("BIOS Completion/Status Code %x\n", dev->DataBuf[0]); + dev->DataReplyLeft = 1; + break; - case CMD_INQUIRY: /* Inquiry */ - memcpy(dev->DataBuf, dev->fw_rev, 4); - x54x_log("Adapter inquiry: %c %c %c %c\n", dev->fw_rev[0], dev->fw_rev[1], dev->fw_rev[2], dev->fw_rev[3]); - dev->DataReplyLeft = 4; - break; + case CMD_INQUIRY: /* Inquiry */ + memcpy(dev->DataBuf, dev->fw_rev, 4); + x54x_log("Adapter inquiry: %c %c %c %c\n", dev->fw_rev[0], dev->fw_rev[1], dev->fw_rev[2], dev->fw_rev[3]); + dev->DataReplyLeft = 4; + break; - case CMD_EMBOI: /* enable MBO Interrupt */ - if (dev->CmdBuf[0] <= 1) { - dev->MailboxOutInterrupts = dev->CmdBuf[0]; - x54x_log("Mailbox out interrupts: %s\n", dev->MailboxOutInterrupts ? "ON" : "OFF"); - suppress = 1; - } else { - dev->Status |= STAT_INVCMD; - } - dev->DataReplyLeft = 0; - break; + case CMD_EMBOI: /* enable MBO Interrupt */ + if (dev->CmdBuf[0] <= 1) { + dev->MailboxOutInterrupts = dev->CmdBuf[0]; + x54x_log("Mailbox out interrupts: %s\n", dev->MailboxOutInterrupts ? "ON" : "OFF"); + suppress = 1; + } else { + dev->Status |= STAT_INVCMD; + } + dev->DataReplyLeft = 0; + break; - case CMD_SELTIMEOUT: /* Selection Time-out */ - dev->DataReplyLeft = 0; - break; + case CMD_SELTIMEOUT: /* Selection Time-out */ + dev->DataReplyLeft = 0; + break; - case CMD_BUSON_TIME: /* bus-on time */ - dev->BusOnTime = dev->CmdBuf[0]; - dev->DataReplyLeft = 0; - x54x_log("Bus-on time: %d\n", dev->CmdBuf[0]); - break; + case CMD_BUSON_TIME: /* bus-on time */ + dev->BusOnTime = dev->CmdBuf[0]; + dev->DataReplyLeft = 0; + x54x_log("Bus-on time: %d\n", dev->CmdBuf[0]); + break; - case CMD_BUSOFF_TIME: /* bus-off time */ - dev->BusOffTime = dev->CmdBuf[0]; - dev->DataReplyLeft = 0; - x54x_log("Bus-off time: %d\n", dev->CmdBuf[0]); - break; + case CMD_BUSOFF_TIME: /* bus-off time */ + dev->BusOffTime = dev->CmdBuf[0]; + dev->DataReplyLeft = 0; + x54x_log("Bus-off time: %d\n", dev->CmdBuf[0]); + break; - case CMD_DMASPEED: /* DMA Transfer Rate */ - dev->ATBusSpeed = dev->CmdBuf[0]; - dev->DataReplyLeft = 0; - x54x_log("DMA transfer rate: %02X\n", dev->CmdBuf[0]); - break; + case CMD_DMASPEED: /* DMA Transfer Rate */ + dev->ATBusSpeed = dev->CmdBuf[0]; + dev->DataReplyLeft = 0; + x54x_log("DMA transfer rate: %02X\n", dev->CmdBuf[0]); + break; - case CMD_RETDEVS: /* return Installed Devices */ - memset(dev->DataBuf, 0x00, 8); + case CMD_RETDEVS: /* return Installed Devices */ + memset(dev->DataBuf, 0x00, 8); - if (dev->ven_get_host_id) - host_id = dev->ven_get_host_id(dev); + if (dev->ven_get_host_id) + host_id = dev->ven_get_host_id(dev); - for (i=0; i<8; i++) { - dev->DataBuf[i] = 0x00; + for (i = 0; i < 8; i++) { + dev->DataBuf[i] = 0x00; - /* Skip the HA .. */ - if (i == host_id) continue; + /* Skip the HA .. */ + if (i == host_id) + continue; - /* TODO: Query device for LUN's. */ - if (scsi_device_present(&scsi_devices[dev->bus][i])) - dev->DataBuf[i] |= 1; - } - dev->DataReplyLeft = i; - break; + /* TODO: Query device for LUN's. */ + if (scsi_device_present(&scsi_devices[dev->bus][i])) + dev->DataBuf[i] |= 1; + } + dev->DataReplyLeft = i; + break; - case CMD_RETCONF: /* return Configuration */ - if (dev->ven_get_dma) - dev->DataBuf[0] = (1 << dev->ven_get_dma(dev)); - else - dev->DataBuf[0] = (1 << dev->DmaChannel); + case CMD_RETCONF: /* return Configuration */ + if (dev->ven_get_dma) + dev->DataBuf[0] = (1 << dev->ven_get_dma(dev)); + else + dev->DataBuf[0] = (1 << dev->DmaChannel); - if (dev->ven_get_irq) - irq = dev->ven_get_irq(dev); - else - irq = dev->Irq; + if (dev->ven_get_irq) + irq = dev->ven_get_irq(dev); + else + irq = dev->Irq; - if (irq >= 9) - dev->DataBuf[1]=(1<<(irq-9)); - else - dev->DataBuf[1]=0; - if (dev->ven_get_host_id) - dev->DataBuf[2] = dev->ven_get_host_id(dev); - else - dev->DataBuf[2] = dev->HostID; - x54x_log("Configuration data: %02X %02X %02X\n", dev->DataBuf[0], dev->DataBuf[1], dev->DataBuf[2]); - dev->DataReplyLeft = 3; - break; + if (irq >= 9) + dev->DataBuf[1] = (1 << (irq - 9)); + else + dev->DataBuf[1] = 0; + if (dev->ven_get_host_id) + dev->DataBuf[2] = dev->ven_get_host_id(dev); + else + dev->DataBuf[2] = dev->HostID; + x54x_log("Configuration data: %02X %02X %02X\n", dev->DataBuf[0], dev->DataBuf[1], dev->DataBuf[2]); + dev->DataReplyLeft = 3; + break; - case CMD_RETSETUP: /* return Setup */ - ReplyISI = (ReplyInquireSetupInformation *)dev->DataBuf; - memset(ReplyISI, 0x00, sizeof(ReplyInquireSetupInformation)); + case CMD_RETSETUP: /* return Setup */ + ReplyISI = (ReplyInquireSetupInformation *) dev->DataBuf; + memset(ReplyISI, 0x00, sizeof(ReplyInquireSetupInformation)); - ReplyISI->uBusTransferRate = dev->ATBusSpeed; - ReplyISI->uPreemptTimeOnBus = dev->BusOnTime; - ReplyISI->uTimeOffBus = dev->BusOffTime; - ReplyISI->cMailbox = dev->MailboxCount; - U32_TO_ADDR(ReplyISI->MailboxAddress, dev->MailboxOutAddr); + ReplyISI->uBusTransferRate = dev->ATBusSpeed; + ReplyISI->uPreemptTimeOnBus = dev->BusOnTime; + ReplyISI->uTimeOffBus = dev->BusOffTime; + ReplyISI->cMailbox = dev->MailboxCount; + U32_TO_ADDR(ReplyISI->MailboxAddress, dev->MailboxOutAddr); - if (dev->get_ven_data) - dev->get_ven_data(dev); + if (dev->get_ven_data) + dev->get_ven_data(dev); - dev->DataReplyLeft = dev->CmdBuf[0]; - x54x_log("Return Setup Information: %d (length: %i)\n", dev->CmdBuf[0], sizeof(ReplyInquireSetupInformation)); - break; + dev->DataReplyLeft = dev->CmdBuf[0]; + x54x_log("Return Setup Information: %d (length: %i)\n", dev->CmdBuf[0], sizeof(ReplyInquireSetupInformation)); + break; - case CMD_ECHO: /* ECHO data */ - dev->DataBuf[0] = dev->CmdBuf[0]; - dev->DataReplyLeft = 1; - break; + case CMD_ECHO: /* ECHO data */ + dev->DataBuf[0] = dev->CmdBuf[0]; + dev->DataReplyLeft = 1; + break; - case CMD_WRITE_CH2: /* write channel 2 buffer */ - dev->DataReplyLeft = 0; - Address.hi = dev->CmdBuf[0]; - Address.mid = dev->CmdBuf[1]; - Address.lo = dev->CmdBuf[2]; - FIFOBuf = ADDR_TO_U32(Address); - x54x_log("Adaptec LocalRAM: Reading 64 bytes at %08X\n", FIFOBuf); - dma_bm_read(FIFOBuf, dev->dma_buffer, 64, dev->transfer_size); - break; + case CMD_WRITE_CH2: /* write channel 2 buffer */ + dev->DataReplyLeft = 0; + Address.hi = dev->CmdBuf[0]; + Address.mid = dev->CmdBuf[1]; + Address.lo = dev->CmdBuf[2]; + FIFOBuf = ADDR_TO_U32(Address); + x54x_log("Adaptec LocalRAM: Reading 64 bytes at %08X\n", FIFOBuf); + dma_bm_read(FIFOBuf, dev->dma_buffer, 64, dev->transfer_size); + break; - case CMD_READ_CH2: /* write channel 2 buffer */ - dev->DataReplyLeft = 0; - Address.hi = dev->CmdBuf[0]; - Address.mid = dev->CmdBuf[1]; - Address.lo = dev->CmdBuf[2]; - FIFOBuf = ADDR_TO_U32(Address); - x54x_log("Adaptec LocalRAM: Writing 64 bytes at %08X\n", FIFOBuf); - dma_bm_write(FIFOBuf, dev->dma_buffer, 64, dev->transfer_size); - break; + case CMD_READ_CH2: /* write channel 2 buffer */ + dev->DataReplyLeft = 0; + Address.hi = dev->CmdBuf[0]; + Address.mid = dev->CmdBuf[1]; + Address.lo = dev->CmdBuf[2]; + FIFOBuf = ADDR_TO_U32(Address); + x54x_log("Adaptec LocalRAM: Writing 64 bytes at %08X\n", FIFOBuf); + dma_bm_write(FIFOBuf, dev->dma_buffer, 64, dev->transfer_size); + break; - case CMD_OPTIONS: /* Set adapter options */ - if (dev->CmdParam == 1) - dev->CmdParamLeft = dev->CmdBuf[0]; - dev->DataReplyLeft = 0; - break; + case CMD_OPTIONS: /* Set adapter options */ + if (dev->CmdParam == 1) + dev->CmdParamLeft = dev->CmdBuf[0]; + dev->DataReplyLeft = 0; + break; - default: - if (dev->ven_cmds) - suppress = dev->ven_cmds(dev); - else { - dev->DataReplyLeft = 0; - dev->Status |= STAT_INVCMD; - } - break; - } - } + default: + if (dev->ven_cmds) + suppress = dev->ven_cmds(dev); + else { + dev->DataReplyLeft = 0; + dev->Status |= STAT_INVCMD; + } + break; + } + } - if (dev->DataReplyLeft) - dev->Status |= STAT_DFULL; - else if (!dev->CmdParamLeft) - x54x_cmd_done(dev, suppress); - break; + if (dev->DataReplyLeft) + dev->Status |= STAT_DFULL; + else if (!dev->CmdParamLeft) + x54x_cmd_done(dev, suppress); + break; - case 2: - if (dev->flags & X54X_INT_GEOM_WRITABLE) - dev->Interrupt = val; - break; + case 2: + if (dev->flags & X54X_INT_GEOM_WRITABLE) + dev->Interrupt = val; + break; - case 3: - if (dev->flags & X54X_INT_GEOM_WRITABLE) - dev->Geometry = val; - break; + case 3: + if (dev->flags & X54X_INT_GEOM_WRITABLE) + dev->Geometry = val; + break; } } - static void x54x_outw(uint16_t port, uint16_t val, void *priv) { x54x_out(port, val & 0xFF, priv); } - static void x54x_outl(uint16_t port, uint32_t val, void *priv) { x54x_out(port, val & 0xFF, priv); } - static void x54x_writeb(uint32_t port, uint8_t val, void *priv) { x54x_out(port & 3, val, priv); } - static void x54x_writew(uint32_t port, uint16_t val, void *priv) { x54x_outw(port & 3, val, priv); } - static void x54x_writel(uint32_t port, uint32_t val, void *priv) { x54x_outl(port & 3, val, priv); } - static int x54x_is_32bit(x54x_t *dev) { int bit32 = 0; if (dev->card_bus & DEVICE_PCI) - bit32 = 1; + bit32 = 1; else if ((dev->card_bus & DEVICE_MCA) && (dev->flags & X54X_32BIT)) - bit32 = 1; + bit32 = 1; return bit32; } - void x54x_io_set(x54x_t *dev, uint32_t base, uint8_t len) { if (x54x_is_32bit(dev)) { - x54x_log("x54x: [PCI] Setting I/O handler at %04X\n", base); - io_sethandler(base, len, - x54x_in, x54x_inw, x54x_inl, + x54x_log("x54x: [PCI] Setting I/O handler at %04X\n", base); + io_sethandler(base, len, + x54x_in, x54x_inw, x54x_inl, x54x_out, x54x_outw, x54x_outl, dev); } else { - x54x_log("x54x: [ISA] Setting I/O handler at %04X\n", base); - io_sethandler(base, len, - x54x_in, x54x_inw, NULL, + x54x_log("x54x: [ISA] Setting I/O handler at %04X\n", base); + io_sethandler(base, len, + x54x_in, x54x_inw, NULL, x54x_out, x54x_outw, NULL, dev); } } - void x54x_io_remove(x54x_t *dev, uint32_t base, uint8_t len) { x54x_log("x54x: Removing I/O handler at %04X\n", base); if (x54x_is_32bit(dev)) { - io_removehandler(base, len, - x54x_in, x54x_inw, x54x_inl, - x54x_out, x54x_outw, x54x_outl, dev); + io_removehandler(base, len, + x54x_in, x54x_inw, x54x_inl, + x54x_out, x54x_outw, x54x_outl, dev); } else { - io_removehandler(base, len, - x54x_in, x54x_inw, NULL, - x54x_out, x54x_outw, NULL, dev); + io_removehandler(base, len, + x54x_in, x54x_inw, NULL, + x54x_out, x54x_outw, NULL, dev); } } - void x54x_mem_init(x54x_t *dev, uint32_t addr) { if (x54x_is_32bit(dev)) { - mem_mapping_add(&dev->mmio_mapping, addr, 0x20, - x54x_readb, x54x_readw, x54x_readl, - x54x_writeb, x54x_writew, x54x_writel, - NULL, MEM_MAPPING_EXTERNAL, dev); + mem_mapping_add(&dev->mmio_mapping, addr, 0x20, + x54x_readb, x54x_readw, x54x_readl, + x54x_writeb, x54x_writew, x54x_writel, + NULL, MEM_MAPPING_EXTERNAL, dev); } else { - mem_mapping_add(&dev->mmio_mapping, addr, 0x20, - x54x_readb, x54x_readw, NULL, - x54x_writeb, x54x_writew, NULL, - NULL, MEM_MAPPING_EXTERNAL, dev); + mem_mapping_add(&dev->mmio_mapping, addr, 0x20, + x54x_readb, x54x_readw, NULL, + x54x_writeb, x54x_writew, NULL, + NULL, MEM_MAPPING_EXTERNAL, dev); } } - void x54x_mem_enable(x54x_t *dev) { mem_mapping_enable(&dev->mmio_mapping); } - void x54x_mem_set_addr(x54x_t *dev, uint32_t base) { mem_mapping_set_addr(&dev->mmio_mapping, base, 0x20); } - void x54x_mem_disable(x54x_t *dev) { mem_mapping_disable(&dev->mmio_mapping); } - /* General initialization routine for all boards. */ void * x54x_init(const device_t *info) @@ -1935,11 +1877,12 @@ x54x_init(const device_t *info) /* Allocate control block and set up basic stuff. */ dev = malloc(sizeof(x54x_t)); - if (dev == NULL) return(dev); + if (dev == NULL) + return (dev); memset(dev, 0x00, sizeof(x54x_t)); dev->type = info->local; - dev->card_bus = info->flags; + dev->card_bus = info->flags; dev->callback_phase = 0; timer_add(&dev->ResetCB, x54x_reset_poll, dev, 0); @@ -1947,47 +1890,45 @@ x54x_init(const device_t *info) dev->timer.period = 10.0; timer_set_delay_u64(&dev->timer, (uint64_t) (dev->timer.period * ((double) TIMER_USEC))); - if (x54x_is_32bit(dev)) - dev->transfer_size = 4; - else - dev->transfer_size = 2; + if (x54x_is_32bit(dev)) + dev->transfer_size = 4; + else + dev->transfer_size = 2; - return(dev); + return (dev); } - void x54x_close(void *priv) { - x54x_t *dev = (x54x_t *)priv; + x54x_t *dev = (x54x_t *) priv; if (dev) { - /* Tell the timer to terminate. */ - timer_stop(&dev->timer); + /* Tell the timer to terminate. */ + timer_stop(&dev->timer); - /* Also terminate the reset callback timer. */ - timer_disable(&dev->ResetCB); + /* Also terminate the reset callback timer. */ + timer_disable(&dev->ResetCB); - dev->MailboxInit = dev->BIOSMailboxInit = 0; - dev->MailboxCount = dev->BIOSMailboxCount = 0; - dev->MailboxReq = dev->BIOSMailboxReq = 0; + dev->MailboxInit = dev->BIOSMailboxInit = 0; + dev->MailboxCount = dev->BIOSMailboxCount = 0; + dev->MailboxReq = dev->BIOSMailboxReq = 0; - if (dev->ven_data) - free(dev->ven_data); + if (dev->ven_data) + free(dev->ven_data); - if (dev->nvr != NULL) - free(dev->nvr); + if (dev->nvr != NULL) + free(dev->nvr); - free(dev); - dev = NULL; + free(dev); + dev = NULL; } } - void x54x_device_reset(void *priv) { - x54x_t *dev = (x54x_t *)priv; + x54x_t *dev = (x54x_t *) priv; x54x_reset_ctrl(dev, 1); From d4c4ef6a5ddd6618090921728e561dac0d1d6510 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:17:25 -0400 Subject: [PATCH 366/386] clang-format in src/printer/ --- src/printer/png.c | 199 +-- src/printer/prt_cpmap.c | 921 +++++++------ src/printer/prt_escp.c | 2853 +++++++++++++++++++-------------------- src/printer/prt_ps.c | 252 ++-- src/printer/prt_text.c | 386 +++--- 5 files changed, 2276 insertions(+), 2335 deletions(-) diff --git a/src/printer/png.c b/src/printer/png.c index f23ce0949..ee90bdbae 100644 --- a/src/printer/png.c +++ b/src/printer/png.c @@ -60,209 +60,222 @@ #include <86box/png_struct.h> #ifdef _WIN32 -# define PATH_PNG_DLL "libpng16-16.dll" +# define PATH_PNG_DLL "libpng16-16.dll" #elif defined __APPLE__ -# define PATH_PNG_DLL "libpng16.dylib" +# define PATH_PNG_DLL "libpng16.dylib" #else -# define PATH_PNG_DLL "libpng16.so" +# define PATH_PNG_DLL "libpng16.so" #endif #ifndef PNG_Z_DEFAULT_STRATEGY -#define PNG_Z_DEFAULT_STRATEGY 1 +# define PNG_Z_DEFAULT_STRATEGY 1 #endif -# define PNGFUNC(x) png_ ## x - +#define PNGFUNC(x) png_##x #ifdef ENABLE_ESCP_LOG int png_do_log = ENABLE_ESCP_LOG; - static void png_log(const char *fmt, ...) { va_list ap; if (escp_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define png_log(fmt, ...) +# define png_log(fmt, ...) #endif - static void error_handler(png_structp arg, const char *str) { png_log("PNG: stream 0x%08lx error '%s'\n", arg, str); } - static void warning_handler(png_structp arg, const char *str) { png_log("PNG: stream 0x%08lx warning '%s'\n", arg, str); } - /* Write the given image as an 8-bit GrayScale PNG image file. */ int png_write_gray(char *fn, int inv, uint8_t *pix, int16_t w, int16_t h) { - png_structp png = NULL; - png_infop info = NULL; - png_bytep row; - int16_t x, y; - FILE *fp; + png_structp png = NULL; + png_infop info = NULL; + png_bytep row; + int16_t x, y; + FILE *fp; /* Create the image file. */ fp = plat_fopen(fn, "wb"); if (fp == NULL) { - /* Yes, this looks weird. */ - if (fp == NULL) - png_log("PNG: file %s could not be opened for writing!\n", fn); - else + /* Yes, this looks weird. */ + if (fp == NULL) + png_log("PNG: file %s could not be opened for writing!\n", fn); + else error: - png_log("PNG: fatal error, bailing out, error = %i\n", errno); - if (png != NULL) - PNGFUNC(destroy_write_struct)(&png, &info); - if (fp != NULL) - (void)fclose(fp); - return(0); + png_log("PNG: fatal error, bailing out, error = %i\n", errno); + if (png != NULL) + PNGFUNC(destroy_write_struct) + (&png, &info); + if (fp != NULL) + (void) fclose(fp); + return (0); } /* Initialize PNG stuff. */ png = PNGFUNC(create_write_struct)(PNG_LIBPNG_VER_STRING, NULL, - error_handler, warning_handler); + error_handler, warning_handler); if (png == NULL) { - png_log("PNG: create_write_struct failed!\n"); - goto error; + png_log("PNG: create_write_struct failed!\n"); + goto error; } info = PNGFUNC(create_info_struct)(png); if (info == NULL) { - png_log("PNG: create_info_struct failed!\n"); - goto error; + png_log("PNG: create_info_struct failed!\n"); + goto error; } + PNGFUNC(init_io) + (png, fp); - PNGFUNC(init_io)(png, fp); + PNGFUNC(set_IHDR) + (png, info, w, h, 8, PNG_COLOR_TYPE_GRAY, + PNG_INTERLACE_NONE, PNG_COMPRESSION_TYPE_DEFAULT, + PNG_FILTER_TYPE_DEFAULT); - PNGFUNC(set_IHDR)(png, info, w, h, 8, PNG_COLOR_TYPE_GRAY, - PNG_INTERLACE_NONE, PNG_COMPRESSION_TYPE_DEFAULT, - PNG_FILTER_TYPE_DEFAULT); - - PNGFUNC(write_info)(png, info); + PNGFUNC(write_info) + (png, info); /* Create a buffer for one scanline of pixels. */ - row = (png_bytep)malloc(PNGFUNC(get_rowbytes)(png, info)); + row = (png_bytep) malloc(PNGFUNC(get_rowbytes)(png, info)); /* Process all scanlines in the image. */ for (y = 0; y < h; y++) { - for (x = 0; x < w; x++) { - /* Copy the pixel data. */ - if (inv) - row[x] = 255 - pix[(y * w) + x]; - else - row[x] = pix[(y * w) + x]; - } + for (x = 0; x < w; x++) { + /* Copy the pixel data. */ + if (inv) + row[x] = 255 - pix[(y * w) + x]; + else + row[x] = pix[(y * w) + x]; + } - /* Write image to the file. */ - PNGFUNC(write_rows)(png, &row, 1); + /* Write image to the file. */ + PNGFUNC(write_rows) + (png, &row, 1); } /* No longer need the row buffer. */ free(row); - PNGFUNC(write_end)(png, NULL); + PNGFUNC(write_end) + (png, NULL); - PNGFUNC(destroy_write_struct)(&png, &info); + PNGFUNC(destroy_write_struct) + (&png, &info); /* Clean up. */ - (void)fclose(fp); + (void) fclose(fp); - return(1); + return (1); } - /* Write the given BITMAP-format image as an 8-bit RGBA PNG image file. */ void png_write_rgb(char *fn, uint8_t *pix, int16_t w, int16_t h, uint16_t pitch, PALETTE palcol) { - png_structp png = NULL; - png_infop info = NULL; - png_bytep* rows; - png_color palette[256]; - FILE *fp; - int i; + png_structp png = NULL; + png_infop info = NULL; + png_bytep *rows; + png_color palette[256]; + FILE *fp; + int i; /* Create the image file. */ fp = plat_fopen(fn, "wb"); if (fp == NULL) { - png_log("PNG: File %s could not be opened for writing!\n", fn); + png_log("PNG: File %s could not be opened for writing!\n", fn); error: - if (png != NULL) - PNGFUNC(destroy_write_struct)(&png, &info); - if (fp != NULL) - (void)fclose(fp); - return; + if (png != NULL) + PNGFUNC(destroy_write_struct) + (&png, &info); + if (fp != NULL) + (void) fclose(fp); + return; } /* Initialize PNG stuff. */ png = PNGFUNC(create_write_struct)(PNG_LIBPNG_VER_STRING, NULL, - error_handler, warning_handler); + error_handler, warning_handler); if (png == NULL) { - png_log("PNG: create_write_struct failed!\n"); - goto error; + png_log("PNG: create_write_struct failed!\n"); + goto error; } info = PNGFUNC(create_info_struct)(png); if (info == NULL) { - png_log("PNG: create_info_struct failed!\n"); - goto error; + png_log("PNG: create_info_struct failed!\n"); + goto error; } /* Finalize the initing of png library */ - PNGFUNC(init_io)(png, fp); - PNGFUNC(set_compression_level)(png, 9); + PNGFUNC(init_io) + (png, fp); + PNGFUNC(set_compression_level) + (png, 9); /* set other zlib parameters */ - PNGFUNC(set_compression_mem_level)(png, 8); - PNGFUNC(set_compression_strategy)(png, PNG_Z_DEFAULT_STRATEGY); - PNGFUNC(set_compression_window_bits)(png, 15); - PNGFUNC(set_compression_method)(png, 8); - PNGFUNC(set_compression_buffer_size)(png, 8192); + PNGFUNC(set_compression_mem_level) + (png, 8); + PNGFUNC(set_compression_strategy) + (png, PNG_Z_DEFAULT_STRATEGY); + PNGFUNC(set_compression_window_bits) + (png, 15); + PNGFUNC(set_compression_method) + (png, 8); + PNGFUNC(set_compression_buffer_size) + (png, 8192); - PNGFUNC(set_IHDR)(png, info, w, h, 8, PNG_COLOR_TYPE_PALETTE, - PNG_INTERLACE_NONE, PNG_COMPRESSION_TYPE_DEFAULT, - PNG_FILTER_TYPE_DEFAULT); + PNGFUNC(set_IHDR) + (png, info, w, h, 8, PNG_COLOR_TYPE_PALETTE, + PNG_INTERLACE_NONE, PNG_COMPRESSION_TYPE_DEFAULT, + PNG_FILTER_TYPE_DEFAULT); for (i = 0; i < 256; i++) { - palette[i].red = palcol[i].r; - palette[i].green = palcol[i].g; - palette[i].blue = palcol[i].b; + palette[i].red = palcol[i].r; + palette[i].green = palcol[i].g; + palette[i].blue = palcol[i].b; } - PNGFUNC(set_PLTE)(png, info, palette, 256); + PNGFUNC(set_PLTE) + (png, info, palette, 256); /* Create a buffer for scanlines of pixels. */ - rows = (png_bytep *)malloc(sizeof(png_bytep) * h); + rows = (png_bytep *) malloc(sizeof(png_bytep) * h); for (i = 0; i < h; i++) { - /* Create a buffer for this scanline. */ - rows[i] = (pix + (i * pitch)); + /* Create a buffer for this scanline. */ + rows[i] = (pix + (i * pitch)); } - PNGFUNC(set_rows)(png, info, rows); + PNGFUNC(set_rows) + (png, info, rows); - PNGFUNC(write_png)(png, info, 0, NULL); + PNGFUNC(write_png) + (png, info, 0, NULL); /* Clean up. */ - (void)fclose(fp); + (void) fclose(fp); - PNGFUNC(destroy_write_struct)(&png, &info); + PNGFUNC(destroy_write_struct) + (&png, &info); /* No longer need the row buffers. */ free(rows); diff --git a/src/printer/prt_cpmap.c b/src/printer/prt_cpmap.c index 2c1465878..56a8b8f9a 100644 --- a/src/printer/prt_cpmap.c +++ b/src/printer/prt_cpmap.c @@ -57,503 +57,501 @@ #include <86box/plat.h> #include <86box/printer.h> - static const uint16_t cp437Map[256] = { - 0x0000,0x0001,0x0002,0x0003,0x0004,0x0005,0x0006,0x0007, - 0x0008,0x0009,0x000a,0x000b,0x000c,0x000d,0x000e,0x000f, - 0x0010,0x0011,0x0012,0x0013,0x0014,0x0015,0x0016,0x0017, - 0x0018,0x0019,0x001a,0x001b,0x001c,0x001d,0x001e,0x001f, - 0x0020,0x0021,0x0022,0x0023,0x0024,0x0025,0x0026,0x0027, - 0x0028,0x0029,0x002a,0x002b,0x002c,0x002d,0x002e,0x002f, - 0x0030,0x0031,0x0032,0x0033,0x0034,0x0035,0x0036,0x0037, - 0x0038,0x0039,0x003a,0x003b,0x003c,0x003d,0x003e,0x003f, - 0x0040,0x0041,0x0042,0x0043,0x0044,0x0045,0x0046,0x0047, - 0x0048,0x0049,0x004a,0x004b,0x004c,0x004d,0x004e,0x004f, - 0x0050,0x0051,0x0052,0x0053,0x0054,0x0055,0x0056,0x0057, - 0x0058,0x0059,0x005a,0x005b,0x005c,0x005d,0x005e,0x005f, - 0x0060,0x0061,0x0062,0x0063,0x0064,0x0065,0x0066,0x0067, - 0x0068,0x0069,0x006a,0x006b,0x006c,0x006d,0x006e,0x006f, - 0x0070,0x0071,0x0072,0x0073,0x0074,0x0075,0x0076,0x0077, - 0x0078,0x0079,0x007a,0x007b,0x007c,0x007d,0x007e,0x007f, - 0x00c7,0x00fc,0x00e9,0x00e2,0x00e4,0x00e0,0x00e5,0x00e7, - 0x00ea,0x00eb,0x00e8,0x00ef,0x00ee,0x00ec,0x00c4,0x00c5, - 0x00c9,0x00e6,0x00c6,0x00f4,0x00f6,0x00f2,0x00fb,0x00f9, - 0x00ff,0x00d6,0x00dc,0x00a2,0x00a3,0x00a5,0x20a7,0x0192, - 0x00e1,0x00ed,0x00f3,0x00fa,0x00f1,0x00d1,0x00aa,0x00ba, - 0x00bf,0x2310,0x00ac,0x00bd,0x00bc,0x00a1,0x00ab,0x00bb, - 0x2591,0x2592,0x2593,0x2502,0x2524,0x2561,0x2562,0x2556, - 0x2555,0x2563,0x2551,0x2557,0x255d,0x255c,0x255b,0x2510, - 0x2514,0x2534,0x252c,0x251c,0x2500,0x253c,0x255e,0x255f, - 0x255a,0x2554,0x2569,0x2566,0x2560,0x2550,0x256c,0x2567, - 0x2568,0x2564,0x2565,0x2559,0x2558,0x2552,0x2553,0x256b, - 0x256a,0x2518,0x250c,0x2588,0x2584,0x258c,0x2590,0x2580, - 0x03b1,0x00df,0x0393,0x03c0,0x03a3,0x03c3,0x00b5,0x03c4, - 0x03a6,0x0398,0x03a9,0x03b4,0x221e,0x03c6,0x03b5,0x2229, - 0x2261,0x00b1,0x2265,0x2264,0x2320,0x2321,0x00f7,0x2248, - 0x00b0,0x2219,0x00b7,0x221a,0x207f,0x00b2,0x25a0,0x00a0 + 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, + 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, + 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, + 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f, + 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, + 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f, + 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037, + 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f, + 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, + 0x0048, 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, + 0x0050, 0x0051, 0x0052, 0x0053, 0x0054, 0x0055, 0x0056, 0x0057, + 0x0058, 0x0059, 0x005a, 0x005b, 0x005c, 0x005d, 0x005e, 0x005f, + 0x0060, 0x0061, 0x0062, 0x0063, 0x0064, 0x0065, 0x0066, 0x0067, + 0x0068, 0x0069, 0x006a, 0x006b, 0x006c, 0x006d, 0x006e, 0x006f, + 0x0070, 0x0071, 0x0072, 0x0073, 0x0074, 0x0075, 0x0076, 0x0077, + 0x0078, 0x0079, 0x007a, 0x007b, 0x007c, 0x007d, 0x007e, 0x007f, + 0x00c7, 0x00fc, 0x00e9, 0x00e2, 0x00e4, 0x00e0, 0x00e5, 0x00e7, + 0x00ea, 0x00eb, 0x00e8, 0x00ef, 0x00ee, 0x00ec, 0x00c4, 0x00c5, + 0x00c9, 0x00e6, 0x00c6, 0x00f4, 0x00f6, 0x00f2, 0x00fb, 0x00f9, + 0x00ff, 0x00d6, 0x00dc, 0x00a2, 0x00a3, 0x00a5, 0x20a7, 0x0192, + 0x00e1, 0x00ed, 0x00f3, 0x00fa, 0x00f1, 0x00d1, 0x00aa, 0x00ba, + 0x00bf, 0x2310, 0x00ac, 0x00bd, 0x00bc, 0x00a1, 0x00ab, 0x00bb, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255d, 0x255c, 0x255b, 0x2510, + 0x2514, 0x2534, 0x252c, 0x251c, 0x2500, 0x253c, 0x255e, 0x255f, + 0x255a, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256c, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256b, + 0x256a, 0x2518, 0x250c, 0x2588, 0x2584, 0x258c, 0x2590, 0x2580, + 0x03b1, 0x00df, 0x0393, 0x03c0, 0x03a3, 0x03c3, 0x00b5, 0x03c4, + 0x03a6, 0x0398, 0x03a9, 0x03b4, 0x221e, 0x03c6, 0x03b5, 0x2229, + 0x2261, 0x00b1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00f7, 0x2248, + 0x00b0, 0x2219, 0x00b7, 0x221a, 0x207f, 0x00b2, 0x25a0, 0x00a0 }; static const uint16_t cp737Map[256] = { - 0x0000,0x0001,0x0002,0x0003,0x0004,0x0005,0x0006,0x0007, - 0x0008,0x0009,0x000a,0x000b,0x000c,0x000d,0x000e,0x000f, - 0x0010,0x0011,0x0012,0x0013,0x0014,0x0015,0x0016,0x0017, - 0x0018,0x0019,0x001a,0x001b,0x001c,0x001d,0x001e,0x001f, - 0x0020,0x0021,0x0022,0x0023,0x0024,0x0025,0x0026,0x0027, - 0x0028,0x0029,0x002a,0x002b,0x002c,0x002d,0x002e,0x002f, - 0x0030,0x0031,0x0032,0x0033,0x0034,0x0035,0x0036,0x0037, - 0x0038,0x0039,0x003a,0x003b,0x003c,0x003d,0x003e,0x003f, - 0x0040,0x0041,0x0042,0x0043,0x0044,0x0045,0x0046,0x0047, - 0x0048,0x0049,0x004a,0x004b,0x004c,0x004d,0x004e,0x004f, - 0x0050,0x0051,0x0052,0x0053,0x0054,0x0055,0x0056,0x0057, - 0x0058,0x0059,0x005a,0x005b,0x005c,0x005d,0x005e,0x005f, - 0x0060,0x0061,0x0062,0x0063,0x0064,0x0065,0x0066,0x0067, - 0x0068,0x0069,0x006a,0x006b,0x006c,0x006d,0x006e,0x006f, - 0x0070,0x0071,0x0072,0x0073,0x0074,0x0075,0x0076,0x0077, - 0x0078,0x0079,0x007a,0x007b,0x007c,0x007d,0x007e,0x007f, - 0x0391,0x0392,0x0393,0x0394,0x0395,0x0396,0x0397,0x0398, - 0x0399,0x039a,0x039b,0x039c,0x039d,0x039e,0x039f,0x03a0, - 0x03a1,0x03a3,0x03a4,0x03a5,0x03a6,0x03a7,0x03a8,0x03a9, - 0x03b1,0x03b2,0x03b3,0x03b4,0x03b5,0x03b6,0x03b7,0x03b8, - 0x03b9,0x03ba,0x03bb,0x03bc,0x03bd,0x03be,0x03bf,0x03c0, - 0x03c1,0x03c3,0x03c2,0x03c4,0x03c5,0x03c6,0x03c7,0x03c8, - 0x2591,0x2592,0x2593,0x2502,0x2524,0x2561,0x2562,0x2556, - 0x2555,0x2563,0x2551,0x2557,0x255d,0x255c,0x255b,0x2510, - 0x2514,0x2534,0x252c,0x251c,0x2500,0x253c,0x255e,0x255f, - 0x255a,0x2554,0x2569,0x2566,0x2560,0x2550,0x256c,0x2567, - 0x2568,0x2564,0x2565,0x2559,0x2558,0x2552,0x2553,0x256b, - 0x256a,0x2518,0x250c,0x2588,0x2584,0x258c,0x2590,0x2580, - 0x03c9,0x03ac,0x03ad,0x03ae,0x03ca,0x03af,0x03cc,0x03cd, - 0x03cb,0x03ce,0x0386,0x0388,0x0389,0x038a,0x038c,0x038e, - 0x038f,0x00b1,0x2265,0x2264,0x03aa,0x03ab,0x00f7,0x2248, - 0x00b0,0x2219,0x00b7,0x221a,0x207f,0x00b2,0x25a0,0x00a0 + 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, + 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, + 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, + 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f, + 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, + 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f, + 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037, + 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f, + 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, + 0x0048, 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, + 0x0050, 0x0051, 0x0052, 0x0053, 0x0054, 0x0055, 0x0056, 0x0057, + 0x0058, 0x0059, 0x005a, 0x005b, 0x005c, 0x005d, 0x005e, 0x005f, + 0x0060, 0x0061, 0x0062, 0x0063, 0x0064, 0x0065, 0x0066, 0x0067, + 0x0068, 0x0069, 0x006a, 0x006b, 0x006c, 0x006d, 0x006e, 0x006f, + 0x0070, 0x0071, 0x0072, 0x0073, 0x0074, 0x0075, 0x0076, 0x0077, + 0x0078, 0x0079, 0x007a, 0x007b, 0x007c, 0x007d, 0x007e, 0x007f, + 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398, + 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 0x039e, 0x039f, 0x03a0, + 0x03a1, 0x03a3, 0x03a4, 0x03a5, 0x03a6, 0x03a7, 0x03a8, 0x03a9, + 0x03b1, 0x03b2, 0x03b3, 0x03b4, 0x03b5, 0x03b6, 0x03b7, 0x03b8, + 0x03b9, 0x03ba, 0x03bb, 0x03bc, 0x03bd, 0x03be, 0x03bf, 0x03c0, + 0x03c1, 0x03c3, 0x03c2, 0x03c4, 0x03c5, 0x03c6, 0x03c7, 0x03c8, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255d, 0x255c, 0x255b, 0x2510, + 0x2514, 0x2534, 0x252c, 0x251c, 0x2500, 0x253c, 0x255e, 0x255f, + 0x255a, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256c, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256b, + 0x256a, 0x2518, 0x250c, 0x2588, 0x2584, 0x258c, 0x2590, 0x2580, + 0x03c9, 0x03ac, 0x03ad, 0x03ae, 0x03ca, 0x03af, 0x03cc, 0x03cd, + 0x03cb, 0x03ce, 0x0386, 0x0388, 0x0389, 0x038a, 0x038c, 0x038e, + 0x038f, 0x00b1, 0x2265, 0x2264, 0x03aa, 0x03ab, 0x00f7, 0x2248, + 0x00b0, 0x2219, 0x00b7, 0x221a, 0x207f, 0x00b2, 0x25a0, 0x00a0 }; static const uint16_t cp775Map[256] = { - 0x0000,0x0001,0x0002,0x0003,0x0004,0x0005,0x0006,0x0007, - 0x0008,0x0009,0x000a,0x000b,0x000c,0x000d,0x000e,0x000f, - 0x0010,0x0011,0x0012,0x0013,0x0014,0x0015,0x0016,0x0017, - 0x0018,0x0019,0x001a,0x001b,0x001c,0x001d,0x001e,0x001f, - 0x0020,0x0021,0x0022,0x0023,0x0024,0x0025,0x0026,0x0027, - 0x0028,0x0029,0x002a,0x002b,0x002c,0x002d,0x002e,0x002f, - 0x0030,0x0031,0x0032,0x0033,0x0034,0x0035,0x0036,0x0037, - 0x0038,0x0039,0x003a,0x003b,0x003c,0x003d,0x003e,0x003f, - 0x0040,0x0041,0x0042,0x0043,0x0044,0x0045,0x0046,0x0047, - 0x0048,0x0049,0x004a,0x004b,0x004c,0x004d,0x004e,0x004f, - 0x0050,0x0051,0x0052,0x0053,0x0054,0x0055,0x0056,0x0057, - 0x0058,0x0059,0x005a,0x005b,0x005c,0x005d,0x005e,0x005f, - 0x0060,0x0061,0x0062,0x0063,0x0064,0x0065,0x0066,0x0067, - 0x0068,0x0069,0x006a,0x006b,0x006c,0x006d,0x006e,0x006f, - 0x0070,0x0071,0x0072,0x0073,0x0074,0x0075,0x0076,0x0077, - 0x0078,0x0079,0x007a,0x007b,0x007c,0x007d,0x007e,0x007f, - 0x0106,0x00fc,0x00e9,0x0101,0x00e4,0x0123,0x00e5,0x0107, - 0x0142,0x0113,0x0156,0x0157,0x012b,0x0179,0x00c4,0x00c5, - 0x00c9,0x00e6,0x00c6,0x014d,0x00f6,0x0122,0x00a2,0x015a, - 0x015b,0x00d6,0x00dc,0x00f8,0x00a3,0x00d8,0x00d7,0x00a4, - 0x0100,0x012a,0x00f3,0x017b,0x017c,0x017a,0x201d,0x00a6, - 0x00a9,0x00ae,0x00ac,0x00bd,0x00bc,0x0141,0x00ab,0x00bb, - 0x2591,0x2592,0x2593,0x2502,0x2524,0x0104,0x010c,0x0118, - 0x0116,0x2563,0x2551,0x2557,0x255d,0x012e,0x0160,0x2510, - 0x2514,0x2534,0x252c,0x251c,0x2500,0x253c,0x0172,0x016a, - 0x255a,0x2554,0x2569,0x2566,0x2560,0x2550,0x256c,0x017d, - 0x0105,0x010d,0x0119,0x0117,0x012f,0x0161,0x0173,0x016b, - 0x017e,0x2518,0x250c,0x2588,0x2584,0x258c,0x2590,0x2580, - 0x00d3,0x00df,0x014c,0x0143,0x00f5,0x00d5,0x00b5,0x0144, - 0x0136,0x0137,0x013b,0x013c,0x0146,0x0112,0x0145,0x2019, - 0x00ad,0x00b1,0x201c,0x00be,0x00b6,0x00a7,0x00f7,0x201e, - 0x00b0,0x2219,0x00b7,0x00b9,0x00b3,0x00b2,0x25a0,0x00a0 + 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, + 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, + 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, + 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f, + 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, + 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f, + 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037, + 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f, + 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, + 0x0048, 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, + 0x0050, 0x0051, 0x0052, 0x0053, 0x0054, 0x0055, 0x0056, 0x0057, + 0x0058, 0x0059, 0x005a, 0x005b, 0x005c, 0x005d, 0x005e, 0x005f, + 0x0060, 0x0061, 0x0062, 0x0063, 0x0064, 0x0065, 0x0066, 0x0067, + 0x0068, 0x0069, 0x006a, 0x006b, 0x006c, 0x006d, 0x006e, 0x006f, + 0x0070, 0x0071, 0x0072, 0x0073, 0x0074, 0x0075, 0x0076, 0x0077, + 0x0078, 0x0079, 0x007a, 0x007b, 0x007c, 0x007d, 0x007e, 0x007f, + 0x0106, 0x00fc, 0x00e9, 0x0101, 0x00e4, 0x0123, 0x00e5, 0x0107, + 0x0142, 0x0113, 0x0156, 0x0157, 0x012b, 0x0179, 0x00c4, 0x00c5, + 0x00c9, 0x00e6, 0x00c6, 0x014d, 0x00f6, 0x0122, 0x00a2, 0x015a, + 0x015b, 0x00d6, 0x00dc, 0x00f8, 0x00a3, 0x00d8, 0x00d7, 0x00a4, + 0x0100, 0x012a, 0x00f3, 0x017b, 0x017c, 0x017a, 0x201d, 0x00a6, + 0x00a9, 0x00ae, 0x00ac, 0x00bd, 0x00bc, 0x0141, 0x00ab, 0x00bb, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010c, 0x0118, + 0x0116, 0x2563, 0x2551, 0x2557, 0x255d, 0x012e, 0x0160, 0x2510, + 0x2514, 0x2534, 0x252c, 0x251c, 0x2500, 0x253c, 0x0172, 0x016a, + 0x255a, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256c, 0x017d, + 0x0105, 0x010d, 0x0119, 0x0117, 0x012f, 0x0161, 0x0173, 0x016b, + 0x017e, 0x2518, 0x250c, 0x2588, 0x2584, 0x258c, 0x2590, 0x2580, + 0x00d3, 0x00df, 0x014c, 0x0143, 0x00f5, 0x00d5, 0x00b5, 0x0144, + 0x0136, 0x0137, 0x013b, 0x013c, 0x0146, 0x0112, 0x0145, 0x2019, + 0x00ad, 0x00b1, 0x201c, 0x00be, 0x00b6, 0x00a7, 0x00f7, 0x201e, + 0x00b0, 0x2219, 0x00b7, 0x00b9, 0x00b3, 0x00b2, 0x25a0, 0x00a0 }; static const uint16_t cp850Map[256] = { - 0x0000,0x0001,0x0002,0x0003,0x0004,0x0005,0x0006,0x0007, - 0x0008,0x0009,0x000a,0x000b,0x000c,0x000d,0x000e,0x000f, - 0x0010,0x0011,0x0012,0x0013,0x0014,0x0015,0x0016,0x0017, - 0x0018,0x0019,0x001a,0x001b,0x001c,0x001d,0x001e,0x001f, - 0x0020,0x0021,0x0022,0x0023,0x0024,0x0025,0x0026,0x0027, - 0x0028,0x0029,0x002a,0x002b,0x002c,0x002d,0x002e,0x002f, - 0x0030,0x0031,0x0032,0x0033,0x0034,0x0035,0x0036,0x0037, - 0x0038,0x0039,0x003a,0x003b,0x003c,0x003d,0x003e,0x003f, - 0x0040,0x0041,0x0042,0x0043,0x0044,0x0045,0x0046,0x0047, - 0x0048,0x0049,0x004a,0x004b,0x004c,0x004d,0x004e,0x004f, - 0x0050,0x0051,0x0052,0x0053,0x0054,0x0055,0x0056,0x0057, - 0x0058,0x0059,0x005a,0x005b,0x005c,0x005d,0x005e,0x005f, - 0x0060,0x0061,0x0062,0x0063,0x0064,0x0065,0x0066,0x0067, - 0x0068,0x0069,0x006a,0x006b,0x006c,0x006d,0x006e,0x006f, - 0x0070,0x0071,0x0072,0x0073,0x0074,0x0075,0x0076,0x0077, - 0x0078,0x0079,0x007a,0x007b,0x007c,0x007d,0x007e,0x007f, - 0x00c7,0x00fc,0x00e9,0x00e2,0x00e4,0x00e0,0x00e5,0x00e7, - 0x00ea,0x00eb,0x00e8,0x00ef,0x00ee,0x00ec,0x00c4,0x00c5, - 0x00c9,0x00e6,0x00c6,0x00f4,0x00f6,0x00f2,0x00fb,0x00f9, - 0x00ff,0x00d6,0x00dc,0x00f8,0x00a3,0x00d8,0x00d7,0x0192, - 0x00e1,0x00ed,0x00f3,0x00fa,0x00f1,0x00d1,0x00aa,0x00ba, - 0x00bf,0x00ae,0x00ac,0x00bd,0x00bc,0x00a1,0x00ab,0x00bb, - 0x2591,0x2592,0x2593,0x2502,0x2524,0x00c1,0x00c2,0x00c0, - 0x00a9,0x2563,0x2551,0x2557,0x255d,0x00a2,0x00a5,0x2510, - 0x2514,0x2534,0x252c,0x251c,0x2500,0x253c,0x00e3,0x00c3, - 0x255a,0x2554,0x2569,0x2566,0x2560,0x2550,0x256c,0x00a4, - 0x00f0,0x00d0,0x00ca,0x00cb,0x00c8,0x0131,0x00cd,0x00ce, - 0x00cf,0x2518,0x250c,0x2588,0x2584,0x00a6,0x00cc,0x2580, - 0x00d3,0x00df,0x00d4,0x00d2,0x00f5,0x00d5,0x00b5,0x00fe, - 0x00de,0x00da,0x00db,0x00d9,0x00fd,0x00dd,0x00af,0x00b4, - 0x00ad,0x00b1,0x2017,0x00be,0x00b6,0x00a7,0x00f7,0x00b8, - 0x00b0,0x00a8,0x00b7,0x00b9,0x00b3,0x00b2,0x25a0,0x00a0 + 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, + 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, + 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, + 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f, + 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, + 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f, + 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037, + 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f, + 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, + 0x0048, 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, + 0x0050, 0x0051, 0x0052, 0x0053, 0x0054, 0x0055, 0x0056, 0x0057, + 0x0058, 0x0059, 0x005a, 0x005b, 0x005c, 0x005d, 0x005e, 0x005f, + 0x0060, 0x0061, 0x0062, 0x0063, 0x0064, 0x0065, 0x0066, 0x0067, + 0x0068, 0x0069, 0x006a, 0x006b, 0x006c, 0x006d, 0x006e, 0x006f, + 0x0070, 0x0071, 0x0072, 0x0073, 0x0074, 0x0075, 0x0076, 0x0077, + 0x0078, 0x0079, 0x007a, 0x007b, 0x007c, 0x007d, 0x007e, 0x007f, + 0x00c7, 0x00fc, 0x00e9, 0x00e2, 0x00e4, 0x00e0, 0x00e5, 0x00e7, + 0x00ea, 0x00eb, 0x00e8, 0x00ef, 0x00ee, 0x00ec, 0x00c4, 0x00c5, + 0x00c9, 0x00e6, 0x00c6, 0x00f4, 0x00f6, 0x00f2, 0x00fb, 0x00f9, + 0x00ff, 0x00d6, 0x00dc, 0x00f8, 0x00a3, 0x00d8, 0x00d7, 0x0192, + 0x00e1, 0x00ed, 0x00f3, 0x00fa, 0x00f1, 0x00d1, 0x00aa, 0x00ba, + 0x00bf, 0x00ae, 0x00ac, 0x00bd, 0x00bc, 0x00a1, 0x00ab, 0x00bb, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00c1, 0x00c2, 0x00c0, + 0x00a9, 0x2563, 0x2551, 0x2557, 0x255d, 0x00a2, 0x00a5, 0x2510, + 0x2514, 0x2534, 0x252c, 0x251c, 0x2500, 0x253c, 0x00e3, 0x00c3, + 0x255a, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256c, 0x00a4, + 0x00f0, 0x00d0, 0x00ca, 0x00cb, 0x00c8, 0x0131, 0x00cd, 0x00ce, + 0x00cf, 0x2518, 0x250c, 0x2588, 0x2584, 0x00a6, 0x00cc, 0x2580, + 0x00d3, 0x00df, 0x00d4, 0x00d2, 0x00f5, 0x00d5, 0x00b5, 0x00fe, + 0x00de, 0x00da, 0x00db, 0x00d9, 0x00fd, 0x00dd, 0x00af, 0x00b4, + 0x00ad, 0x00b1, 0x2017, 0x00be, 0x00b6, 0x00a7, 0x00f7, 0x00b8, + 0x00b0, 0x00a8, 0x00b7, 0x00b9, 0x00b3, 0x00b2, 0x25a0, 0x00a0 }; static const uint16_t cp852Map[256] = { - 0x0000,0x0001,0x0002,0x0003,0x0004,0x0005,0x0006,0x0007, - 0x0008,0x0009,0x000a,0x000b,0x000c,0x000d,0x000e,0x000f, - 0x0010,0x0011,0x0012,0x0013,0x0014,0x0015,0x0016,0x0017, - 0x0018,0x0019,0x001a,0x001b,0x001c,0x001d,0x001e,0x001f, - 0x0020,0x0021,0x0022,0x0023,0x0024,0x0025,0x0026,0x0027, - 0x0028,0x0029,0x002a,0x002b,0x002c,0x002d,0x002e,0x002f, - 0x0030,0x0031,0x0032,0x0033,0x0034,0x0035,0x0036,0x0037, - 0x0038,0x0039,0x003a,0x003b,0x003c,0x003d,0x003e,0x003f, - 0x0040,0x0041,0x0042,0x0043,0x0044,0x0045,0x0046,0x0047, - 0x0048,0x0049,0x004a,0x004b,0x004c,0x004d,0x004e,0x004f, - 0x0050,0x0051,0x0052,0x0053,0x0054,0x0055,0x0056,0x0057, - 0x0058,0x0059,0x005a,0x005b,0x005c,0x005d,0x005e,0x005f, - 0x0060,0x0061,0x0062,0x0063,0x0064,0x0065,0x0066,0x0067, - 0x0068,0x0069,0x006a,0x006b,0x006c,0x006d,0x006e,0x006f, - 0x0070,0x0071,0x0072,0x0073,0x0074,0x0075,0x0076,0x0077, - 0x0078,0x0079,0x007a,0x007b,0x007c,0x007d,0x007e,0x007f, - 0x00c7,0x00fc,0x00e9,0x00e2,0x00e4,0x016f,0x0107,0x00e7, - 0x0142,0x00eb,0x0150,0x0151,0x00ee,0x0179,0x00c4,0x0106, - 0x00c9,0x0139,0x013a,0x00f4,0x00f6,0x013d,0x013e,0x015a, - 0x015b,0x00d6,0x00dc,0x0164,0x0165,0x0141,0x00d7,0x010d, - 0x00e1,0x00ed,0x00f3,0x00fa,0x0104,0x0105,0x017d,0x017e, - 0x0118,0x0119,0x00ac,0x017a,0x010c,0x015f,0x00ab,0x00bb, - 0x2591,0x2592,0x2593,0x2502,0x2524,0x00c1,0x00c2,0x011a, - 0x015e,0x2563,0x2551,0x2557,0x255d,0x017b,0x017c,0x2510, - 0x2514,0x2534,0x252c,0x251c,0x2500,0x253c,0x0102,0x0103, - 0x255a,0x2554,0x2569,0x2566,0x2560,0x2550,0x256c,0x00a4, - 0x0111,0x0110,0x010e,0x00cb,0x010f,0x0147,0x00cd,0x00ce, - 0x011b,0x2518,0x250c,0x2588,0x2584,0x0162,0x016e,0x2580, - 0x00d3,0x00df,0x00d4,0x0143,0x0144,0x0148,0x0160,0x0161, - 0x0154,0x00da,0x0155,0x0170,0x00fd,0x00dd,0x0163,0x00b4, - 0x00ad,0x02dd,0x02db,0x02c7,0x02d8,0x00a7,0x00f7,0x00b8, - 0x00b0,0x00a8,0x02d9,0x0171,0x0158,0x0159,0x25a0,0x00a0 + 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, + 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, + 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, + 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f, + 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, + 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f, + 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037, + 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f, + 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, + 0x0048, 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, + 0x0050, 0x0051, 0x0052, 0x0053, 0x0054, 0x0055, 0x0056, 0x0057, + 0x0058, 0x0059, 0x005a, 0x005b, 0x005c, 0x005d, 0x005e, 0x005f, + 0x0060, 0x0061, 0x0062, 0x0063, 0x0064, 0x0065, 0x0066, 0x0067, + 0x0068, 0x0069, 0x006a, 0x006b, 0x006c, 0x006d, 0x006e, 0x006f, + 0x0070, 0x0071, 0x0072, 0x0073, 0x0074, 0x0075, 0x0076, 0x0077, + 0x0078, 0x0079, 0x007a, 0x007b, 0x007c, 0x007d, 0x007e, 0x007f, + 0x00c7, 0x00fc, 0x00e9, 0x00e2, 0x00e4, 0x016f, 0x0107, 0x00e7, + 0x0142, 0x00eb, 0x0150, 0x0151, 0x00ee, 0x0179, 0x00c4, 0x0106, + 0x00c9, 0x0139, 0x013a, 0x00f4, 0x00f6, 0x013d, 0x013e, 0x015a, + 0x015b, 0x00d6, 0x00dc, 0x0164, 0x0165, 0x0141, 0x00d7, 0x010d, + 0x00e1, 0x00ed, 0x00f3, 0x00fa, 0x0104, 0x0105, 0x017d, 0x017e, + 0x0118, 0x0119, 0x00ac, 0x017a, 0x010c, 0x015f, 0x00ab, 0x00bb, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00c1, 0x00c2, 0x011a, + 0x015e, 0x2563, 0x2551, 0x2557, 0x255d, 0x017b, 0x017c, 0x2510, + 0x2514, 0x2534, 0x252c, 0x251c, 0x2500, 0x253c, 0x0102, 0x0103, + 0x255a, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256c, 0x00a4, + 0x0111, 0x0110, 0x010e, 0x00cb, 0x010f, 0x0147, 0x00cd, 0x00ce, + 0x011b, 0x2518, 0x250c, 0x2588, 0x2584, 0x0162, 0x016e, 0x2580, + 0x00d3, 0x00df, 0x00d4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161, + 0x0154, 0x00da, 0x0155, 0x0170, 0x00fd, 0x00dd, 0x0163, 0x00b4, + 0x00ad, 0x02dd, 0x02db, 0x02c7, 0x02d8, 0x00a7, 0x00f7, 0x00b8, + 0x00b0, 0x00a8, 0x02d9, 0x0171, 0x0158, 0x0159, 0x25a0, 0x00a0 }; static const uint16_t cp855Map[256] = { - 0x0000,0x0001,0x0002,0x0003,0x0004,0x0005,0x0006,0x0007, - 0x0008,0x0009,0x000a,0x000b,0x000c,0x000d,0x000e,0x000f, - 0x0010,0x0011,0x0012,0x0013,0x0014,0x0015,0x0016,0x0017, - 0x0018,0x0019,0x001a,0x001b,0x001c,0x001d,0x001e,0x001f, - 0x0020,0x0021,0x0022,0x0023,0x0024,0x0025,0x0026,0x0027, - 0x0028,0x0029,0x002a,0x002b,0x002c,0x002d,0x002e,0x002f, - 0x0030,0x0031,0x0032,0x0033,0x0034,0x0035,0x0036,0x0037, - 0x0038,0x0039,0x003a,0x003b,0x003c,0x003d,0x003e,0x003f, - 0x0040,0x0041,0x0042,0x0043,0x0044,0x0045,0x0046,0x0047, - 0x0048,0x0049,0x004a,0x004b,0x004c,0x004d,0x004e,0x004f, - 0x0050,0x0051,0x0052,0x0053,0x0054,0x0055,0x0056,0x0057, - 0x0058,0x0059,0x005a,0x005b,0x005c,0x005d,0x005e,0x005f, - 0x0060,0x0061,0x0062,0x0063,0x0064,0x0065,0x0066,0x0067, - 0x0068,0x0069,0x006a,0x006b,0x006c,0x006d,0x006e,0x006f, - 0x0070,0x0071,0x0072,0x0073,0x0074,0x0075,0x0076,0x0077, - 0x0078,0x0079,0x007a,0x007b,0x007c,0x007d,0x007e,0x007f, - 0x0452,0x0402,0x0453,0x0403,0x0451,0x0401,0x0454,0x0404, - 0x0455,0x0405,0x0456,0x0406,0x0457,0x0407,0x0458,0x0408, - 0x0459,0x0409,0x045a,0x040a,0x045b,0x040b,0x045c,0x040c, - 0x045e,0x040e,0x045f,0x040f,0x044e,0x042e,0x044a,0x042a, - 0x0430,0x0410,0x0431,0x0411,0x0446,0x0426,0x0434,0x0414, - 0x0435,0x0415,0x0444,0x0424,0x0433,0x0413,0x00ab,0x00bb, - 0x2591,0x2592,0x2593,0x2502,0x2524,0x0445,0x0425,0x0438, - 0x0418,0x2563,0x2551,0x2557,0x255d,0x0439,0x0419,0x2510, - 0x2514,0x2534,0x252c,0x251c,0x2500,0x253c,0x043a,0x041a, - 0x255a,0x2554,0x2569,0x2566,0x2560,0x2550,0x256c,0x00a4, - 0x043b,0x041b,0x043c,0x041c,0x043d,0x041d,0x043e,0x041e, - 0x043f,0x2518,0x250c,0x2588,0x2584,0x041f,0x044f,0x2580, - 0x042f,0x0440,0x0420,0x0441,0x0421,0x0442,0x0422,0x0443, - 0x0423,0x0436,0x0416,0x0432,0x0412,0x044c,0x042c,0x2116, - 0x00ad,0x044b,0x042b,0x0437,0x0417,0x0448,0x0428,0x044d, - 0x042d,0x0449,0x0429,0x0447,0x0427,0x00a7,0x25a0,0x00a0 + 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, + 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, + 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, + 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f, + 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, + 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f, + 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037, + 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f, + 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, + 0x0048, 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, + 0x0050, 0x0051, 0x0052, 0x0053, 0x0054, 0x0055, 0x0056, 0x0057, + 0x0058, 0x0059, 0x005a, 0x005b, 0x005c, 0x005d, 0x005e, 0x005f, + 0x0060, 0x0061, 0x0062, 0x0063, 0x0064, 0x0065, 0x0066, 0x0067, + 0x0068, 0x0069, 0x006a, 0x006b, 0x006c, 0x006d, 0x006e, 0x006f, + 0x0070, 0x0071, 0x0072, 0x0073, 0x0074, 0x0075, 0x0076, 0x0077, + 0x0078, 0x0079, 0x007a, 0x007b, 0x007c, 0x007d, 0x007e, 0x007f, + 0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404, + 0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408, + 0x0459, 0x0409, 0x045a, 0x040a, 0x045b, 0x040b, 0x045c, 0x040c, + 0x045e, 0x040e, 0x045f, 0x040f, 0x044e, 0x042e, 0x044a, 0x042a, + 0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414, + 0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00ab, 0x00bb, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438, + 0x0418, 0x2563, 0x2551, 0x2557, 0x255d, 0x0439, 0x0419, 0x2510, + 0x2514, 0x2534, 0x252c, 0x251c, 0x2500, 0x253c, 0x043a, 0x041a, + 0x255a, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256c, 0x00a4, + 0x043b, 0x041b, 0x043c, 0x041c, 0x043d, 0x041d, 0x043e, 0x041e, + 0x043f, 0x2518, 0x250c, 0x2588, 0x2584, 0x041f, 0x044f, 0x2580, + 0x042f, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443, + 0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044c, 0x042c, 0x2116, + 0x00ad, 0x044b, 0x042b, 0x0437, 0x0417, 0x0448, 0x0428, 0x044d, + 0x042d, 0x0449, 0x0429, 0x0447, 0x0427, 0x00a7, 0x25a0, 0x00a0 }; static const uint16_t cp857Map[256] = { - 0x0000,0x0001,0x0002,0x0003,0x0004,0x0005,0x0006,0x0007, - 0x0008,0x0009,0x000a,0x000b,0x000c,0x000d,0x000e,0x000f, - 0x0010,0x0011,0x0012,0x0013,0x0014,0x0015,0x0016,0x0017, - 0x0018,0x0019,0x001a,0x001b,0x001c,0x001d,0x001e,0x001f, - 0x0020,0x0021,0x0022,0x0023,0x0024,0x0025,0x0026,0x0027, - 0x0028,0x0029,0x002a,0x002b,0x002c,0x002d,0x002e,0x002f, - 0x0030,0x0031,0x0032,0x0033,0x0034,0x0035,0x0036,0x0037, - 0x0038,0x0039,0x003a,0x003b,0x003c,0x003d,0x003e,0x003f, - 0x0040,0x0041,0x0042,0x0043,0x0044,0x0045,0x0046,0x0047, - 0x0048,0x0049,0x004a,0x004b,0x004c,0x004d,0x004e,0x004f, - 0x0050,0x0051,0x0052,0x0053,0x0054,0x0055,0x0056,0x0057, - 0x0058,0x0059,0x005a,0x005b,0x005c,0x005d,0x005e,0x005f, - 0x0060,0x0061,0x0062,0x0063,0x0064,0x0065,0x0066,0x0067, - 0x0068,0x0069,0x006a,0x006b,0x006c,0x006d,0x006e,0x006f, - 0x0070,0x0071,0x0072,0x0073,0x0074,0x0075,0x0076,0x0077, - 0x0078,0x0079,0x007a,0x007b,0x007c,0x007d,0x007e,0x007f, - 0x00c7,0x00fc,0x00e9,0x00e2,0x00e4,0x00e0,0x00e5,0x00e7, - 0x00ea,0x00eb,0x00e8,0x00ef,0x00ee,0x0131,0x00c4,0x00c5, - 0x00c9,0x00e6,0x00c6,0x00f4,0x00f6,0x00f2,0x00fb,0x00f9, - 0x0130,0x00d6,0x00dc,0x00f8,0x00a3,0x00d8,0x015e,0x015f, - 0x00e1,0x00ed,0x00f3,0x00fa,0x00f1,0x00d1,0x011e,0x011f, - 0x00bf,0x00ae,0x00ac,0x00bd,0x00bc,0x00a1,0x00ab,0x00bb, - 0x2591,0x2592,0x2593,0x2502,0x2524,0x00c1,0x00c2,0x00c0, - 0x00a9,0x2563,0x2551,0x2557,0x255d,0x00a2,0x00a5,0x2510, - 0x2514,0x2534,0x252c,0x251c,0x2500,0x253c,0x00e3,0x00c3, - 0x255a,0x2554,0x2569,0x2566,0x2560,0x2550,0x256c,0x00a4, - 0x00ba,0x00aa,0x00ca,0x00cb,0x00c8,0x0000,0x00cd,0x00ce, - 0x00cf,0x2518,0x250c,0x2588,0x2584,0x00a6,0x00cc,0x2580, - 0x00d3,0x00df,0x00d4,0x00d2,0x00f5,0x00d5,0x00b5,0x0000, - 0x00d7,0x00da,0x00db,0x00d9,0x00ec,0x00ff,0x00af,0x00b4, - 0x00ad,0x00b1,0x0000,0x00be,0x00b6,0x00a7,0x00f7,0x00b8, - 0x00b0,0x00a8,0x00b7,0x00b9,0x00b3,0x00b2,0x25a0,0x00a0 + 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, + 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, + 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, + 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f, + 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, + 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f, + 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037, + 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f, + 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, + 0x0048, 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, + 0x0050, 0x0051, 0x0052, 0x0053, 0x0054, 0x0055, 0x0056, 0x0057, + 0x0058, 0x0059, 0x005a, 0x005b, 0x005c, 0x005d, 0x005e, 0x005f, + 0x0060, 0x0061, 0x0062, 0x0063, 0x0064, 0x0065, 0x0066, 0x0067, + 0x0068, 0x0069, 0x006a, 0x006b, 0x006c, 0x006d, 0x006e, 0x006f, + 0x0070, 0x0071, 0x0072, 0x0073, 0x0074, 0x0075, 0x0076, 0x0077, + 0x0078, 0x0079, 0x007a, 0x007b, 0x007c, 0x007d, 0x007e, 0x007f, + 0x00c7, 0x00fc, 0x00e9, 0x00e2, 0x00e4, 0x00e0, 0x00e5, 0x00e7, + 0x00ea, 0x00eb, 0x00e8, 0x00ef, 0x00ee, 0x0131, 0x00c4, 0x00c5, + 0x00c9, 0x00e6, 0x00c6, 0x00f4, 0x00f6, 0x00f2, 0x00fb, 0x00f9, + 0x0130, 0x00d6, 0x00dc, 0x00f8, 0x00a3, 0x00d8, 0x015e, 0x015f, + 0x00e1, 0x00ed, 0x00f3, 0x00fa, 0x00f1, 0x00d1, 0x011e, 0x011f, + 0x00bf, 0x00ae, 0x00ac, 0x00bd, 0x00bc, 0x00a1, 0x00ab, 0x00bb, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00c1, 0x00c2, 0x00c0, + 0x00a9, 0x2563, 0x2551, 0x2557, 0x255d, 0x00a2, 0x00a5, 0x2510, + 0x2514, 0x2534, 0x252c, 0x251c, 0x2500, 0x253c, 0x00e3, 0x00c3, + 0x255a, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256c, 0x00a4, + 0x00ba, 0x00aa, 0x00ca, 0x00cb, 0x00c8, 0x0000, 0x00cd, 0x00ce, + 0x00cf, 0x2518, 0x250c, 0x2588, 0x2584, 0x00a6, 0x00cc, 0x2580, + 0x00d3, 0x00df, 0x00d4, 0x00d2, 0x00f5, 0x00d5, 0x00b5, 0x0000, + 0x00d7, 0x00da, 0x00db, 0x00d9, 0x00ec, 0x00ff, 0x00af, 0x00b4, + 0x00ad, 0x00b1, 0x0000, 0x00be, 0x00b6, 0x00a7, 0x00f7, 0x00b8, + 0x00b0, 0x00a8, 0x00b7, 0x00b9, 0x00b3, 0x00b2, 0x25a0, 0x00a0 }; static const uint16_t cp860Map[256] = { - 0x0000,0x0001,0x0002,0x0003,0x0004,0x0005,0x0006,0x0007, - 0x0008,0x0009,0x000a,0x000b,0x000c,0x000d,0x000e,0x000f, - 0x0010,0x0011,0x0012,0x0013,0x0014,0x0015,0x0016,0x0017, - 0x0018,0x0019,0x001a,0x001b,0x001c,0x001d,0x001e,0x001f, - 0x0020,0x0021,0x0022,0x0023,0x0024,0x0025,0x0026,0x0027, - 0x0028,0x0029,0x002a,0x002b,0x002c,0x002d,0x002e,0x002f, - 0x0030,0x0031,0x0032,0x0033,0x0034,0x0035,0x0036,0x0037, - 0x0038,0x0039,0x003a,0x003b,0x003c,0x003d,0x003e,0x003f, - 0x0040,0x0041,0x0042,0x0043,0x0044,0x0045,0x0046,0x0047, - 0x0048,0x0049,0x004a,0x004b,0x004c,0x004d,0x004e,0x004f, - 0x0050,0x0051,0x0052,0x0053,0x0054,0x0055,0x0056,0x0057, - 0x0058,0x0059,0x005a,0x005b,0x005c,0x005d,0x005e,0x005f, - 0x0060,0x0061,0x0062,0x0063,0x0064,0x0065,0x0066,0x0067, - 0x0068,0x0069,0x006a,0x006b,0x006c,0x006d,0x006e,0x006f, - 0x0070,0x0071,0x0072,0x0073,0x0074,0x0075,0x0076,0x0077, - 0x0078,0x0079,0x007a,0x007b,0x007c,0x007d,0x007e,0x007f, - 0x00c7,0x00fc,0x00e9,0x00e2,0x00e3,0x00e0,0x00c1,0x00e7, - 0x00ea,0x00ca,0x00e8,0x00cd,0x00d4,0x00ec,0x00c3,0x00c2, - 0x00c9,0x00c0,0x00c8,0x00f4,0x00f5,0x00f2,0x00da,0x00f9, - 0x00cc,0x00d5,0x00dc,0x00a2,0x00a3,0x00d9,0x20a7,0x00d3, - 0x00e1,0x00ed,0x00f3,0x00fa,0x00f1,0x00d1,0x00aa,0x00ba, - 0x00bf,0x00d2,0x00ac,0x00bd,0x00bc,0x00a1,0x00ab,0x00bb, - 0x2591,0x2592,0x2593,0x2502,0x2524,0x2561,0x2562,0x2556, - 0x2555,0x2563,0x2551,0x2557,0x255d,0x255c,0x255b,0x2510, - 0x2514,0x2534,0x252c,0x251c,0x2500,0x253c,0x255e,0x255f, - 0x255a,0x2554,0x2569,0x2566,0x2560,0x2550,0x256c,0x2567, - 0x2568,0x2564,0x2565,0x2559,0x2558,0x2552,0x2553,0x256b, - 0x256a,0x2518,0x250c,0x2588,0x2584,0x258c,0x2590,0x2580, - 0x03b1,0x00df,0x0393,0x03c0,0x03a3,0x03c3,0x00b5,0x03c4, - 0x03a6,0x0398,0x03a9,0x03b4,0x221e,0x03c6,0x03b5,0x2229, - 0x2261,0x00b1,0x2265,0x2264,0x2320,0x2321,0x00f7,0x2248, - 0x00b0,0x2219,0x00b7,0x221a,0x207f,0x00b2,0x25a0,0x00a0 + 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, + 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, + 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, + 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f, + 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, + 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f, + 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037, + 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f, + 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, + 0x0048, 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, + 0x0050, 0x0051, 0x0052, 0x0053, 0x0054, 0x0055, 0x0056, 0x0057, + 0x0058, 0x0059, 0x005a, 0x005b, 0x005c, 0x005d, 0x005e, 0x005f, + 0x0060, 0x0061, 0x0062, 0x0063, 0x0064, 0x0065, 0x0066, 0x0067, + 0x0068, 0x0069, 0x006a, 0x006b, 0x006c, 0x006d, 0x006e, 0x006f, + 0x0070, 0x0071, 0x0072, 0x0073, 0x0074, 0x0075, 0x0076, 0x0077, + 0x0078, 0x0079, 0x007a, 0x007b, 0x007c, 0x007d, 0x007e, 0x007f, + 0x00c7, 0x00fc, 0x00e9, 0x00e2, 0x00e3, 0x00e0, 0x00c1, 0x00e7, + 0x00ea, 0x00ca, 0x00e8, 0x00cd, 0x00d4, 0x00ec, 0x00c3, 0x00c2, + 0x00c9, 0x00c0, 0x00c8, 0x00f4, 0x00f5, 0x00f2, 0x00da, 0x00f9, + 0x00cc, 0x00d5, 0x00dc, 0x00a2, 0x00a3, 0x00d9, 0x20a7, 0x00d3, + 0x00e1, 0x00ed, 0x00f3, 0x00fa, 0x00f1, 0x00d1, 0x00aa, 0x00ba, + 0x00bf, 0x00d2, 0x00ac, 0x00bd, 0x00bc, 0x00a1, 0x00ab, 0x00bb, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255d, 0x255c, 0x255b, 0x2510, + 0x2514, 0x2534, 0x252c, 0x251c, 0x2500, 0x253c, 0x255e, 0x255f, + 0x255a, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256c, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256b, + 0x256a, 0x2518, 0x250c, 0x2588, 0x2584, 0x258c, 0x2590, 0x2580, + 0x03b1, 0x00df, 0x0393, 0x03c0, 0x03a3, 0x03c3, 0x00b5, 0x03c4, + 0x03a6, 0x0398, 0x03a9, 0x03b4, 0x221e, 0x03c6, 0x03b5, 0x2229, + 0x2261, 0x00b1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00f7, 0x2248, + 0x00b0, 0x2219, 0x00b7, 0x221a, 0x207f, 0x00b2, 0x25a0, 0x00a0 }; static const uint16_t cp861Map[256] = { - 0x0000,0x0001,0x0002,0x0003,0x0004,0x0005,0x0006,0x0007, - 0x0008,0x0009,0x000a,0x000b,0x000c,0x000d,0x000e,0x000f, - 0x0010,0x0011,0x0012,0x0013,0x0014,0x0015,0x0016,0x0017, - 0x0018,0x0019,0x001a,0x001b,0x001c,0x001d,0x001e,0x001f, - 0x0020,0x0021,0x0022,0x0023,0x0024,0x0025,0x0026,0x0027, - 0x0028,0x0029,0x002a,0x002b,0x002c,0x002d,0x002e,0x002f, - 0x0030,0x0031,0x0032,0x0033,0x0034,0x0035,0x0036,0x0037, - 0x0038,0x0039,0x003a,0x003b,0x003c,0x003d,0x003e,0x003f, - 0x0040,0x0041,0x0042,0x0043,0x0044,0x0045,0x0046,0x0047, - 0x0048,0x0049,0x004a,0x004b,0x004c,0x004d,0x004e,0x004f, - 0x0050,0x0051,0x0052,0x0053,0x0054,0x0055,0x0056,0x0057, - 0x0058,0x0059,0x005a,0x005b,0x005c,0x005d,0x005e,0x005f, - 0x0060,0x0061,0x0062,0x0063,0x0064,0x0065,0x0066,0x0067, - 0x0068,0x0069,0x006a,0x006b,0x006c,0x006d,0x006e,0x006f, - 0x0070,0x0071,0x0072,0x0073,0x0074,0x0075,0x0076,0x0077, - 0x0078,0x0079,0x007a,0x007b,0x007c,0x007d,0x007e,0x007f, - 0x00c7,0x00fc,0x00e9,0x00e2,0x00e4,0x00e0,0x00e5,0x00e7, - 0x00ea,0x00eb,0x00e8,0x00d0,0x00f0,0x00de,0x00c4,0x00c5, - 0x00c9,0x00e6,0x00c6,0x00f4,0x00f6,0x00fe,0x00fb,0x00dd, - 0x00fd,0x00d6,0x00dc,0x00f8,0x00a3,0x00d8,0x20a7,0x0192, - 0x00e1,0x00ed,0x00f3,0x00fa,0x00c1,0x00cd,0x00d3,0x00da, - 0x00bf,0x2310,0x00ac,0x00bd,0x00bc,0x00a1,0x00ab,0x00bb, - 0x2591,0x2592,0x2593,0x2502,0x2524,0x2561,0x2562,0x2556, - 0x2555,0x2563,0x2551,0x2557,0x255d,0x255c,0x255b,0x2510, - 0x2514,0x2534,0x252c,0x251c,0x2500,0x253c,0x255e,0x255f, - 0x255a,0x2554,0x2569,0x2566,0x2560,0x2550,0x256c,0x2567, - 0x2568,0x2564,0x2565,0x2559,0x2558,0x2552,0x2553,0x256b, - 0x256a,0x2518,0x250c,0x2588,0x2584,0x258c,0x2590,0x2580, - 0x03b1,0x00df,0x0393,0x03c0,0x03a3,0x03c3,0x00b5,0x03c4, - 0x03a6,0x0398,0x03a9,0x03b4,0x221e,0x03c6,0x03b5,0x2229, - 0x2261,0x00b1,0x2265,0x2264,0x2320,0x2321,0x00f7,0x2248, - 0x00b0,0x2219,0x00b7,0x221a,0x207f,0x00b2,0x25a0,0x00a0 + 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, + 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, + 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, + 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f, + 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, + 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f, + 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037, + 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f, + 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, + 0x0048, 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, + 0x0050, 0x0051, 0x0052, 0x0053, 0x0054, 0x0055, 0x0056, 0x0057, + 0x0058, 0x0059, 0x005a, 0x005b, 0x005c, 0x005d, 0x005e, 0x005f, + 0x0060, 0x0061, 0x0062, 0x0063, 0x0064, 0x0065, 0x0066, 0x0067, + 0x0068, 0x0069, 0x006a, 0x006b, 0x006c, 0x006d, 0x006e, 0x006f, + 0x0070, 0x0071, 0x0072, 0x0073, 0x0074, 0x0075, 0x0076, 0x0077, + 0x0078, 0x0079, 0x007a, 0x007b, 0x007c, 0x007d, 0x007e, 0x007f, + 0x00c7, 0x00fc, 0x00e9, 0x00e2, 0x00e4, 0x00e0, 0x00e5, 0x00e7, + 0x00ea, 0x00eb, 0x00e8, 0x00d0, 0x00f0, 0x00de, 0x00c4, 0x00c5, + 0x00c9, 0x00e6, 0x00c6, 0x00f4, 0x00f6, 0x00fe, 0x00fb, 0x00dd, + 0x00fd, 0x00d6, 0x00dc, 0x00f8, 0x00a3, 0x00d8, 0x20a7, 0x0192, + 0x00e1, 0x00ed, 0x00f3, 0x00fa, 0x00c1, 0x00cd, 0x00d3, 0x00da, + 0x00bf, 0x2310, 0x00ac, 0x00bd, 0x00bc, 0x00a1, 0x00ab, 0x00bb, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255d, 0x255c, 0x255b, 0x2510, + 0x2514, 0x2534, 0x252c, 0x251c, 0x2500, 0x253c, 0x255e, 0x255f, + 0x255a, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256c, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256b, + 0x256a, 0x2518, 0x250c, 0x2588, 0x2584, 0x258c, 0x2590, 0x2580, + 0x03b1, 0x00df, 0x0393, 0x03c0, 0x03a3, 0x03c3, 0x00b5, 0x03c4, + 0x03a6, 0x0398, 0x03a9, 0x03b4, 0x221e, 0x03c6, 0x03b5, 0x2229, + 0x2261, 0x00b1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00f7, 0x2248, + 0x00b0, 0x2219, 0x00b7, 0x221a, 0x207f, 0x00b2, 0x25a0, 0x00a0 }; static const uint16_t cp862Map[256] = { - 0x0000,0x0001,0x0002,0x0003,0x0004,0x0005,0x0006,0x0007, - 0x0008,0x0009,0x000a,0x000b,0x000c,0x000d,0x000e,0x000f, - 0x0010,0x0011,0x0012,0x0013,0x0014,0x0015,0x0016,0x0017, - 0x0018,0x0019,0x001a,0x001b,0x001c,0x001d,0x001e,0x001f, - 0x0020,0x0021,0x0022,0x0023,0x0024,0x0025,0x0026,0x0027, - 0x0028,0x0029,0x002a,0x002b,0x002c,0x002d,0x002e,0x002f, - 0x0030,0x0031,0x0032,0x0033,0x0034,0x0035,0x0036,0x0037, - 0x0038,0x0039,0x003a,0x003b,0x003c,0x003d,0x003e,0x003f, - 0x0040,0x0041,0x0042,0x0043,0x0044,0x0045,0x0046,0x0047, - 0x0048,0x0049,0x004a,0x004b,0x004c,0x004d,0x004e,0x004f, - 0x0050,0x0051,0x0052,0x0053,0x0054,0x0055,0x0056,0x0057, - 0x0058,0x0059,0x005a,0x005b,0x005c,0x005d,0x005e,0x005f, - 0x0060,0x0061,0x0062,0x0063,0x0064,0x0065,0x0066,0x0067, - 0x0068,0x0069,0x006a,0x006b,0x006c,0x006d,0x006e,0x006f, - 0x0070,0x0071,0x0072,0x0073,0x0074,0x0075,0x0076,0x0077, - 0x0078,0x0079,0x007a,0x007b,0x007c,0x007d,0x007e,0x007f, - 0x05d0,0x05d1,0x05d2,0x05d3,0x05d4,0x05d5,0x05d6,0x05d7, - 0x05d8,0x05d9,0x05da,0x05db,0x05dc,0x05dd,0x05de,0x05df, - 0x05e0,0x05e1,0x05e2,0x05e3,0x05e4,0x05e5,0x05e6,0x05e7, - 0x05e8,0x05e9,0x05ea,0x00a2,0x00a3,0x00a5,0x20a7,0x0192, - 0x00e1,0x00ed,0x00f3,0x00fa,0x00f1,0x00d1,0x00aa,0x00ba, - 0x00bf,0x2310,0x00ac,0x00bd,0x00bc,0x00a1,0x00ab,0x00bb, - 0x2591,0x2592,0x2593,0x2502,0x2524,0x2561,0x2562,0x2556, - 0x2555,0x2563,0x2551,0x2557,0x255d,0x255c,0x255b,0x2510, - 0x2514,0x2534,0x252c,0x251c,0x2500,0x253c,0x255e,0x255f, - 0x255a,0x2554,0x2569,0x2566,0x2560,0x2550,0x256c,0x2567, - 0x2568,0x2564,0x2565,0x2559,0x2558,0x2552,0x2553,0x256b, - 0x256a,0x2518,0x250c,0x2588,0x2584,0x258c,0x2590,0x2580, - 0x03b1,0x00df,0x0393,0x03c0,0x03a3,0x03c3,0x00b5,0x03c4, - 0x03a6,0x0398,0x03a9,0x03b4,0x221e,0x03c6,0x03b5,0x2229, - 0x2261,0x00b1,0x2265,0x2264,0x2320,0x2321,0x00f7,0x2248, - 0x00b0,0x2219,0x00b7,0x221a,0x207f,0x00b2,0x25a0,0x00a0 + 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, + 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, + 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, + 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f, + 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, + 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f, + 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037, + 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f, + 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, + 0x0048, 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, + 0x0050, 0x0051, 0x0052, 0x0053, 0x0054, 0x0055, 0x0056, 0x0057, + 0x0058, 0x0059, 0x005a, 0x005b, 0x005c, 0x005d, 0x005e, 0x005f, + 0x0060, 0x0061, 0x0062, 0x0063, 0x0064, 0x0065, 0x0066, 0x0067, + 0x0068, 0x0069, 0x006a, 0x006b, 0x006c, 0x006d, 0x006e, 0x006f, + 0x0070, 0x0071, 0x0072, 0x0073, 0x0074, 0x0075, 0x0076, 0x0077, + 0x0078, 0x0079, 0x007a, 0x007b, 0x007c, 0x007d, 0x007e, 0x007f, + 0x05d0, 0x05d1, 0x05d2, 0x05d3, 0x05d4, 0x05d5, 0x05d6, 0x05d7, + 0x05d8, 0x05d9, 0x05da, 0x05db, 0x05dc, 0x05dd, 0x05de, 0x05df, + 0x05e0, 0x05e1, 0x05e2, 0x05e3, 0x05e4, 0x05e5, 0x05e6, 0x05e7, + 0x05e8, 0x05e9, 0x05ea, 0x00a2, 0x00a3, 0x00a5, 0x20a7, 0x0192, + 0x00e1, 0x00ed, 0x00f3, 0x00fa, 0x00f1, 0x00d1, 0x00aa, 0x00ba, + 0x00bf, 0x2310, 0x00ac, 0x00bd, 0x00bc, 0x00a1, 0x00ab, 0x00bb, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255d, 0x255c, 0x255b, 0x2510, + 0x2514, 0x2534, 0x252c, 0x251c, 0x2500, 0x253c, 0x255e, 0x255f, + 0x255a, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256c, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256b, + 0x256a, 0x2518, 0x250c, 0x2588, 0x2584, 0x258c, 0x2590, 0x2580, + 0x03b1, 0x00df, 0x0393, 0x03c0, 0x03a3, 0x03c3, 0x00b5, 0x03c4, + 0x03a6, 0x0398, 0x03a9, 0x03b4, 0x221e, 0x03c6, 0x03b5, 0x2229, + 0x2261, 0x00b1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00f7, 0x2248, + 0x00b0, 0x2219, 0x00b7, 0x221a, 0x207f, 0x00b2, 0x25a0, 0x00a0 }; static const uint16_t cp863Map[256] = { - 0x0000,0x0001,0x0002,0x0003,0x0004,0x0005,0x0006,0x0007, - 0x0008,0x0009,0x000a,0x000b,0x000c,0x000d,0x000e,0x000f, - 0x0010,0x0011,0x0012,0x0013,0x0014,0x0015,0x0016,0x0017, - 0x0018,0x0019,0x001a,0x001b,0x001c,0x001d,0x001e,0x001f, - 0x0020,0x0021,0x0022,0x0023,0x0024,0x0025,0x0026,0x0027, - 0x0028,0x0029,0x002a,0x002b,0x002c,0x002d,0x002e,0x002f, - 0x0030,0x0031,0x0032,0x0033,0x0034,0x0035,0x0036,0x0037, - 0x0038,0x0039,0x003a,0x003b,0x003c,0x003d,0x003e,0x003f, - 0x0040,0x0041,0x0042,0x0043,0x0044,0x0045,0x0046,0x0047, - 0x0048,0x0049,0x004a,0x004b,0x004c,0x004d,0x004e,0x004f, - 0x0050,0x0051,0x0052,0x0053,0x0054,0x0055,0x0056,0x0057, - 0x0058,0x0059,0x005a,0x005b,0x005c,0x005d,0x005e,0x005f, - 0x0060,0x0061,0x0062,0x0063,0x0064,0x0065,0x0066,0x0067, - 0x0068,0x0069,0x006a,0x006b,0x006c,0x006d,0x006e,0x006f, - 0x0070,0x0071,0x0072,0x0073,0x0074,0x0075,0x0076,0x0077, - 0x0078,0x0079,0x007a,0x007b,0x007c,0x007d,0x007e,0x007f, - 0x00c7,0x00fc,0x00e9,0x00e2,0x00c2,0x00e0,0x00b6,0x00e7, - 0x00ea,0x00eb,0x00e8,0x00ef,0x00ee,0x2017,0x00c0,0x00a7, - 0x00c9,0x00c8,0x00ca,0x00f4,0x00cb,0x00cf,0x00fb,0x00f9, - 0x00a4,0x00d4,0x00dc,0x00a2,0x00a3,0x00d9,0x00db,0x0192, - 0x00a6,0x00b4,0x00f3,0x00fa,0x00a8,0x00b8,0x00b3,0x00af, - 0x00ce,0x2310,0x00ac,0x00bd,0x00bc,0x00be,0x00ab,0x00bb, - 0x2591,0x2592,0x2593,0x2502,0x2524,0x2561,0x2562,0x2556, - 0x2555,0x2563,0x2551,0x2557,0x255d,0x255c,0x255b,0x2510, - 0x2514,0x2534,0x252c,0x251c,0x2500,0x253c,0x255e,0x255f, - 0x255a,0x2554,0x2569,0x2566,0x2560,0x2550,0x256c,0x2567, - 0x2568,0x2564,0x2565,0x2559,0x2558,0x2552,0x2553,0x256b, - 0x256a,0x2518,0x250c,0x2588,0x2584,0x258c,0x2590,0x2580, - 0x03b1,0x00df,0x0393,0x03c0,0x03a3,0x03c3,0x00b5,0x03c4, - 0x03a6,0x0398,0x03a9,0x03b4,0x221e,0x03c6,0x03b5,0x2229, - 0x2261,0x00b1,0x2265,0x2264,0x2320,0x2321,0x00f7,0x2248, - 0x00b0,0x2219,0x00b7,0x221a,0x207f,0x00b2,0x25a0,0x00a0 + 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, + 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, + 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, + 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f, + 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, + 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f, + 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037, + 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f, + 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, + 0x0048, 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, + 0x0050, 0x0051, 0x0052, 0x0053, 0x0054, 0x0055, 0x0056, 0x0057, + 0x0058, 0x0059, 0x005a, 0x005b, 0x005c, 0x005d, 0x005e, 0x005f, + 0x0060, 0x0061, 0x0062, 0x0063, 0x0064, 0x0065, 0x0066, 0x0067, + 0x0068, 0x0069, 0x006a, 0x006b, 0x006c, 0x006d, 0x006e, 0x006f, + 0x0070, 0x0071, 0x0072, 0x0073, 0x0074, 0x0075, 0x0076, 0x0077, + 0x0078, 0x0079, 0x007a, 0x007b, 0x007c, 0x007d, 0x007e, 0x007f, + 0x00c7, 0x00fc, 0x00e9, 0x00e2, 0x00c2, 0x00e0, 0x00b6, 0x00e7, + 0x00ea, 0x00eb, 0x00e8, 0x00ef, 0x00ee, 0x2017, 0x00c0, 0x00a7, + 0x00c9, 0x00c8, 0x00ca, 0x00f4, 0x00cb, 0x00cf, 0x00fb, 0x00f9, + 0x00a4, 0x00d4, 0x00dc, 0x00a2, 0x00a3, 0x00d9, 0x00db, 0x0192, + 0x00a6, 0x00b4, 0x00f3, 0x00fa, 0x00a8, 0x00b8, 0x00b3, 0x00af, + 0x00ce, 0x2310, 0x00ac, 0x00bd, 0x00bc, 0x00be, 0x00ab, 0x00bb, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255d, 0x255c, 0x255b, 0x2510, + 0x2514, 0x2534, 0x252c, 0x251c, 0x2500, 0x253c, 0x255e, 0x255f, + 0x255a, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256c, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256b, + 0x256a, 0x2518, 0x250c, 0x2588, 0x2584, 0x258c, 0x2590, 0x2580, + 0x03b1, 0x00df, 0x0393, 0x03c0, 0x03a3, 0x03c3, 0x00b5, 0x03c4, + 0x03a6, 0x0398, 0x03a9, 0x03b4, 0x221e, 0x03c6, 0x03b5, 0x2229, + 0x2261, 0x00b1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00f7, 0x2248, + 0x00b0, 0x2219, 0x00b7, 0x221a, 0x207f, 0x00b2, 0x25a0, 0x00a0 }; static const uint16_t cp864Map[256] = { - 0x0000,0x0001,0x0002,0x0003,0x0004,0x0005,0x0006,0x0007, - 0x0008,0x0009,0x000a,0x000b,0x000c,0x000d,0x000e,0x000f, - 0x0010,0x0011,0x0012,0x0013,0x0014,0x0015,0x0016,0x0017, - 0x0018,0x0019,0x001a,0x001b,0x001c,0x001d,0x001e,0x001f, - 0x0020,0x0021,0x0022,0x0023,0x0024,0x066a,0x0026,0x0027, - 0x0028,0x0029,0x002a,0x002b,0x002c,0x002d,0x002e,0x002f, - 0x0030,0x0031,0x0032,0x0033,0x0034,0x0035,0x0036,0x0037, - 0x0038,0x0039,0x003a,0x003b,0x003c,0x003d,0x003e,0x003f, - 0x0040,0x0041,0x0042,0x0043,0x0044,0x0045,0x0046,0x0047, - 0x0048,0x0049,0x004a,0x004b,0x004c,0x004d,0x004e,0x004f, - 0x0050,0x0051,0x0052,0x0053,0x0054,0x0055,0x0056,0x0057, - 0x0058,0x0059,0x005a,0x005b,0x005c,0x005d,0x005e,0x005f, - 0x0060,0x0061,0x0062,0x0063,0x0064,0x0065,0x0066,0x0067, - 0x0068,0x0069,0x006a,0x006b,0x006c,0x006d,0x006e,0x006f, - 0x0070,0x0071,0x0072,0x0073,0x0074,0x0075,0x0076,0x0077, - 0x0078,0x0079,0x007a,0x007b,0x007c,0x007d,0x007e,0x007f, - 0x00b0,0x00b7,0x2219,0x221a,0x2592,0x2500,0x2502,0x253c, - 0x2524,0x252c,0x251c,0x2534,0x2510,0x250c,0x2514,0x2518, - 0x03b2,0x221e,0x03c6,0x00b1,0x00bd,0x00bc,0x2248,0x00ab, - 0x00bb,0xfef7,0xfef8,0x0000,0x0000,0xfefb,0xfefc,0x0000, - 0x00a0,0x00ad,0xfe82,0x00a3,0x00a4,0xfe84,0x0000,0x0000, - 0xfe8e,0xfe8f,0xfe95,0xfe99,0x060c,0xfe9d,0xfea1,0xfea5, - 0x0660,0x0661,0x0662,0x0663,0x0664,0x0665,0x0666,0x0667, - 0x0668,0x0669,0xfed1,0x061b,0xfeb1,0xfeb5,0xfeb9,0x061f, - 0x00a2,0xfe80,0xfe81,0xfe83,0xfe85,0xfeca,0xfe8b,0xfe8d, - 0xfe91,0xfe93,0xfe97,0xfe9b,0xfe9f,0xfea3,0xfea7,0xfea9, - 0xfeab,0xfead,0xfeaf,0xfeb3,0xfeb7,0xfebb,0xfebf,0xfec1, - 0xfec5,0xfecb,0xfecf,0x00a6,0x00ac,0x00f7,0x00d7,0xfec9, - 0x0640,0xfed3,0xfed7,0xfedb,0xfedf,0xfee3,0xfee7,0xfeeb, - 0xfeed,0xfeef,0xfef3,0xfebd,0xfecc,0xfece,0xfecd,0xfee1, - 0xfe7d,0x0651,0xfee5,0xfee9,0xfeec,0xfef0,0xfef2,0xfed0, - 0xfed5,0xfef5,0xfef6,0xfedd,0xfed9,0xfef1,0x25a0,0x00a0 + 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, + 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, + 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, + 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f, + 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x066a, 0x0026, 0x0027, + 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f, + 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037, + 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f, + 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, + 0x0048, 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, + 0x0050, 0x0051, 0x0052, 0x0053, 0x0054, 0x0055, 0x0056, 0x0057, + 0x0058, 0x0059, 0x005a, 0x005b, 0x005c, 0x005d, 0x005e, 0x005f, + 0x0060, 0x0061, 0x0062, 0x0063, 0x0064, 0x0065, 0x0066, 0x0067, + 0x0068, 0x0069, 0x006a, 0x006b, 0x006c, 0x006d, 0x006e, 0x006f, + 0x0070, 0x0071, 0x0072, 0x0073, 0x0074, 0x0075, 0x0076, 0x0077, + 0x0078, 0x0079, 0x007a, 0x007b, 0x007c, 0x007d, 0x007e, 0x007f, + 0x00b0, 0x00b7, 0x2219, 0x221a, 0x2592, 0x2500, 0x2502, 0x253c, + 0x2524, 0x252c, 0x251c, 0x2534, 0x2510, 0x250c, 0x2514, 0x2518, + 0x03b2, 0x221e, 0x03c6, 0x00b1, 0x00bd, 0x00bc, 0x2248, 0x00ab, + 0x00bb, 0xfef7, 0xfef8, 0x0000, 0x0000, 0xfefb, 0xfefc, 0x0000, + 0x00a0, 0x00ad, 0xfe82, 0x00a3, 0x00a4, 0xfe84, 0x0000, 0x0000, + 0xfe8e, 0xfe8f, 0xfe95, 0xfe99, 0x060c, 0xfe9d, 0xfea1, 0xfea5, + 0x0660, 0x0661, 0x0662, 0x0663, 0x0664, 0x0665, 0x0666, 0x0667, + 0x0668, 0x0669, 0xfed1, 0x061b, 0xfeb1, 0xfeb5, 0xfeb9, 0x061f, + 0x00a2, 0xfe80, 0xfe81, 0xfe83, 0xfe85, 0xfeca, 0xfe8b, 0xfe8d, + 0xfe91, 0xfe93, 0xfe97, 0xfe9b, 0xfe9f, 0xfea3, 0xfea7, 0xfea9, + 0xfeab, 0xfead, 0xfeaf, 0xfeb3, 0xfeb7, 0xfebb, 0xfebf, 0xfec1, + 0xfec5, 0xfecb, 0xfecf, 0x00a6, 0x00ac, 0x00f7, 0x00d7, 0xfec9, + 0x0640, 0xfed3, 0xfed7, 0xfedb, 0xfedf, 0xfee3, 0xfee7, 0xfeeb, + 0xfeed, 0xfeef, 0xfef3, 0xfebd, 0xfecc, 0xfece, 0xfecd, 0xfee1, + 0xfe7d, 0x0651, 0xfee5, 0xfee9, 0xfeec, 0xfef0, 0xfef2, 0xfed0, + 0xfed5, 0xfef5, 0xfef6, 0xfedd, 0xfed9, 0xfef1, 0x25a0, 0x00a0 }; static const uint16_t cp865Map[256] = { - 0x0000,0x0001,0x0002,0x0003,0x0004,0x0005,0x0006,0x0007, - 0x0008,0x0009,0x000a,0x000b,0x000c,0x000d,0x000e,0x000f, - 0x0010,0x0011,0x0012,0x0013,0x0014,0x0015,0x0016,0x0017, - 0x0018,0x0019,0x001a,0x001b,0x001c,0x001d,0x001e,0x001f, - 0x0020,0x0021,0x0022,0x0023,0x0024,0x0025,0x0026,0x0027, - 0x0028,0x0029,0x002a,0x002b,0x002c,0x002d,0x002e,0x002f, - 0x0030,0x0031,0x0032,0x0033,0x0034,0x0035,0x0036,0x0037, - 0x0038,0x0039,0x003a,0x003b,0x003c,0x003d,0x003e,0x003f, - 0x0040,0x0041,0x0042,0x0043,0x0044,0x0045,0x0046,0x0047, - 0x0048,0x0049,0x004a,0x004b,0x004c,0x004d,0x004e,0x004f, - 0x0050,0x0051,0x0052,0x0053,0x0054,0x0055,0x0056,0x0057, - 0x0058,0x0059,0x005a,0x005b,0x005c,0x005d,0x005e,0x005f, - 0x0060,0x0061,0x0062,0x0063,0x0064,0x0065,0x0066,0x0067, - 0x0068,0x0069,0x006a,0x006b,0x006c,0x006d,0x006e,0x006f, - 0x0070,0x0071,0x0072,0x0073,0x0074,0x0075,0x0076,0x0077, - 0x0078,0x0079,0x007a,0x007b,0x007c,0x007d,0x007e,0x007f, - 0x00c7,0x00fc,0x00e9,0x00e2,0x00e4,0x00e0,0x00e5,0x00e7, - 0x00ea,0x00eb,0x00e8,0x00ef,0x00ee,0x00ec,0x00c4,0x00c5, - 0x00c9,0x00e6,0x00c6,0x00f4,0x00f6,0x00f2,0x00fb,0x00f9, - 0x00ff,0x00d6,0x00dc,0x00f8,0x00a3,0x00d8,0x20a7,0x0192, - 0x00e1,0x00ed,0x00f3,0x00fa,0x00f1,0x00d1,0x00aa,0x00ba, - 0x00bf,0x2310,0x00ac,0x00bd,0x00bc,0x00a1,0x00ab,0x00a4, - 0x2591,0x2592,0x2593,0x2502,0x2524,0x2561,0x2562,0x2556, - 0x2555,0x2563,0x2551,0x2557,0x255d,0x255c,0x255b,0x2510, - 0x2514,0x2534,0x252c,0x251c,0x2500,0x253c,0x255e,0x255f, - 0x255a,0x2554,0x2569,0x2566,0x2560,0x2550,0x256c,0x2567, - 0x2568,0x2564,0x2565,0x2559,0x2558,0x2552,0x2553,0x256b, - 0x256a,0x2518,0x250c,0x2588,0x2584,0x258c,0x2590,0x2580, - 0x03b1,0x00df,0x0393,0x03c0,0x03a3,0x03c3,0x00b5,0x03c4, - 0x03a6,0x0398,0x03a9,0x03b4,0x221e,0x03c6,0x03b5,0x2229, - 0x2261,0x00b1,0x2265,0x2264,0x2320,0x2321,0x00f7,0x2248, - 0x00b0,0x2219,0x00b7,0x221a,0x207f,0x00b2,0x25a0,0x00a0 + 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, + 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, + 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, + 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f, + 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, + 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f, + 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037, + 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f, + 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, + 0x0048, 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, + 0x0050, 0x0051, 0x0052, 0x0053, 0x0054, 0x0055, 0x0056, 0x0057, + 0x0058, 0x0059, 0x005a, 0x005b, 0x005c, 0x005d, 0x005e, 0x005f, + 0x0060, 0x0061, 0x0062, 0x0063, 0x0064, 0x0065, 0x0066, 0x0067, + 0x0068, 0x0069, 0x006a, 0x006b, 0x006c, 0x006d, 0x006e, 0x006f, + 0x0070, 0x0071, 0x0072, 0x0073, 0x0074, 0x0075, 0x0076, 0x0077, + 0x0078, 0x0079, 0x007a, 0x007b, 0x007c, 0x007d, 0x007e, 0x007f, + 0x00c7, 0x00fc, 0x00e9, 0x00e2, 0x00e4, 0x00e0, 0x00e5, 0x00e7, + 0x00ea, 0x00eb, 0x00e8, 0x00ef, 0x00ee, 0x00ec, 0x00c4, 0x00c5, + 0x00c9, 0x00e6, 0x00c6, 0x00f4, 0x00f6, 0x00f2, 0x00fb, 0x00f9, + 0x00ff, 0x00d6, 0x00dc, 0x00f8, 0x00a3, 0x00d8, 0x20a7, 0x0192, + 0x00e1, 0x00ed, 0x00f3, 0x00fa, 0x00f1, 0x00d1, 0x00aa, 0x00ba, + 0x00bf, 0x2310, 0x00ac, 0x00bd, 0x00bc, 0x00a1, 0x00ab, 0x00a4, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255d, 0x255c, 0x255b, 0x2510, + 0x2514, 0x2534, 0x252c, 0x251c, 0x2500, 0x253c, 0x255e, 0x255f, + 0x255a, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256c, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256b, + 0x256a, 0x2518, 0x250c, 0x2588, 0x2584, 0x258c, 0x2590, 0x2580, + 0x03b1, 0x00df, 0x0393, 0x03c0, 0x03a3, 0x03c3, 0x00b5, 0x03c4, + 0x03a6, 0x0398, 0x03a9, 0x03b4, 0x221e, 0x03c6, 0x03b5, 0x2229, + 0x2261, 0x00b1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00f7, 0x2248, + 0x00b0, 0x2219, 0x00b7, 0x221a, 0x207f, 0x00b2, 0x25a0, 0x00a0 }; static const uint16_t cp866Map[256] = { - 0x0000,0x0001,0x0002,0x0003,0x0004,0x0005,0x0006,0x0007, - 0x0008,0x0009,0x000a,0x000b,0x000c,0x000d,0x000e,0x000f, - 0x0010,0x0011,0x0012,0x0013,0x0014,0x0015,0x0016,0x0017, - 0x0018,0x0019,0x001a,0x001b,0x001c,0x001d,0x001e,0x001f, - 0x0020,0x0021,0x0022,0x0023,0x0024,0x0025,0x0026,0x0027, - 0x0028,0x0029,0x002a,0x002b,0x002c,0x002d,0x002e,0x002f, - 0x0030,0x0031,0x0032,0x0033,0x0034,0x0035,0x0036,0x0037, - 0x0038,0x0039,0x003a,0x003b,0x003c,0x003d,0x003e,0x003f, - 0x0040,0x0041,0x0042,0x0043,0x0044,0x0045,0x0046,0x0047, - 0x0048,0x0049,0x004a,0x004b,0x004c,0x004d,0x004e,0x004f, - 0x0050,0x0051,0x0052,0x0053,0x0054,0x0055,0x0056,0x0057, - 0x0058,0x0059,0x005a,0x005b,0x005c,0x005d,0x005e,0x005f, - 0x0060,0x0061,0x0062,0x0063,0x0064,0x0065,0x0066,0x0067, - 0x0068,0x0069,0x006a,0x006b,0x006c,0x006d,0x006e,0x006f, - 0x0070,0x0071,0x0072,0x0073,0x0074,0x0075,0x0076,0x0077, - 0x0078,0x0079,0x007a,0x007b,0x007c,0x007d,0x007e,0x007f, - 0x0410,0x0411,0x0412,0x0413,0x0414,0x0415,0x0416,0x0417, - 0x0418,0x0419,0x041a,0x041b,0x041c,0x041d,0x041e,0x041f, - 0x0420,0x0421,0x0422,0x0423,0x0424,0x0425,0x0426,0x0427, - 0x0428,0x0429,0x042a,0x042b,0x042c,0x042d,0x042e,0x042f, - 0x0430,0x0431,0x0432,0x0433,0x0434,0x0435,0x0436,0x0437, - 0x0438,0x0439,0x043a,0x043b,0x043c,0x043d,0x043e,0x043f, - 0x2591,0x2592,0x2593,0x2502,0x2524,0x2561,0x2562,0x2556, - 0x2555,0x2563,0x2551,0x2557,0x255d,0x255c,0x255b,0x2510, - 0x2514,0x2534,0x252c,0x251c,0x2500,0x253c,0x255e,0x255f, - 0x255a,0x2554,0x2569,0x2566,0x2560,0x2550,0x256c,0x2567, - 0x2568,0x2564,0x2565,0x2559,0x2558,0x2552,0x2553,0x256b, - 0x256a,0x2518,0x250c,0x2588,0x2584,0x258c,0x2590,0x2580, - 0x0440,0x0441,0x0442,0x0443,0x0444,0x0445,0x0446,0x0447, - 0x0448,0x0449,0x044a,0x044b,0x044c,0x044d,0x044e,0x044f, - 0x0401,0x0451,0x0404,0x0454,0x0407,0x0457,0x040e,0x045e, - 0x00b0,0x2219,0x00b7,0x221a,0x2116,0x00a4,0x25a0,0x00a0 + 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, + 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f, + 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, + 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f, + 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, + 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f, + 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037, + 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f, + 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, + 0x0048, 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, + 0x0050, 0x0051, 0x0052, 0x0053, 0x0054, 0x0055, 0x0056, 0x0057, + 0x0058, 0x0059, 0x005a, 0x005b, 0x005c, 0x005d, 0x005e, 0x005f, + 0x0060, 0x0061, 0x0062, 0x0063, 0x0064, 0x0065, 0x0066, 0x0067, + 0x0068, 0x0069, 0x006a, 0x006b, 0x006c, 0x006d, 0x006e, 0x006f, + 0x0070, 0x0071, 0x0072, 0x0073, 0x0074, 0x0075, 0x0076, 0x0077, + 0x0078, 0x0079, 0x007a, 0x007b, 0x007c, 0x007d, 0x007e, 0x007f, + 0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, + 0x0418, 0x0419, 0x041a, 0x041b, 0x041c, 0x041d, 0x041e, 0x041f, + 0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, + 0x0428, 0x0429, 0x042a, 0x042b, 0x042c, 0x042d, 0x042e, 0x042f, + 0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, + 0x0438, 0x0439, 0x043a, 0x043b, 0x043c, 0x043d, 0x043e, 0x043f, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255d, 0x255c, 0x255b, 0x2510, + 0x2514, 0x2534, 0x252c, 0x251c, 0x2500, 0x253c, 0x255e, 0x255f, + 0x255a, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256c, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256b, + 0x256a, 0x2518, 0x250c, 0x2588, 0x2584, 0x258c, 0x2590, 0x2580, + 0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, + 0x0448, 0x0449, 0x044a, 0x044b, 0x044c, 0x044d, 0x044e, 0x044f, + 0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040e, 0x045e, + 0x00b0, 0x2219, 0x00b7, 0x221a, 0x2116, 0x00a4, 0x25a0, 0x00a0 }; - static const struct { - uint16_t code; - const uint16_t *map; + uint16_t code; + const uint16_t *map; } maps[] = { -// clang-format off + // clang-format off { 437, cp437Map }, { 737, cp737Map }, { 775, cp775Map }, @@ -569,27 +567,26 @@ static const struct { { 865, cp865Map }, { 866, cp866Map }, { -1, NULL } -// clang-format on + // clang-format on }; - /* Select a ASCII->Unicode mapping by CP number */ void select_codepage(uint16_t code, uint16_t *curmap) { - int i = 0; + int i = 0; const uint16_t *map_to_use; map_to_use = maps[0].map; while (maps[i].code != 0) { - if (maps[i].code == code) { - map_to_use = maps[i].map; - break; - } - i++; + if (maps[i].code == code) { + map_to_use = maps[i].map; + break; + } + i++; } for (i = 0; i < 256; i++) - curmap[i] = map_to_use[i]; + curmap[i] = map_to_use[i]; } diff --git a/src/printer/prt_escp.c b/src/printer/prt_escp.c index 013726c06..7281b8dd7 100644 --- a/src/printer/prt_escp.c +++ b/src/printer/prt_escp.c @@ -73,232 +73,223 @@ #include <86box/printer.h> #include <86box/prt_devs.h> - /* Default page values (for now.) */ -#define COLOR_BLACK 7<<5 -#define PAGE_WIDTH 8.5 /* standard U.S. Letter */ -#define PAGE_HEIGHT 11.0 -#define PAGE_LMARGIN 0.0 -#define PAGE_RMARGIN PAGE_WIDTH -#define PAGE_TMARGIN 0.0 -#define PAGE_BMARGIN PAGE_HEIGHT -#define PAGE_DPI 360 -#define PAGE_CPI 10.0 /* standard 10 cpi */ -#define PAGE_LPI 6.0 /* standard 6 lpi */ - +#define COLOR_BLACK 7 << 5 +#define PAGE_WIDTH 8.5 /* standard U.S. Letter */ +#define PAGE_HEIGHT 11.0 +#define PAGE_LMARGIN 0.0 +#define PAGE_RMARGIN PAGE_WIDTH +#define PAGE_TMARGIN 0.0 +#define PAGE_BMARGIN PAGE_HEIGHT +#define PAGE_DPI 360 +#define PAGE_CPI 10.0 /* standard 10 cpi */ +#define PAGE_LPI 6.0 /* standard 6 lpi */ #ifdef _WIN32 -# define PATH_FREETYPE_DLL "freetype.dll" +# define PATH_FREETYPE_DLL "freetype.dll" #elif defined __APPLE__ -# define PATH_FREETYPE_DLL "libfreetype.6.dylib" +# define PATH_FREETYPE_DLL "libfreetype.6.dylib" #else -# define PATH_FREETYPE_DLL "libfreetype.so.6" +# define PATH_FREETYPE_DLL "libfreetype.so.6" #endif - /* FreeType library handles - global so they can be shared. */ -FT_Library ft_lib = NULL; -void *ft_handle = NULL; - -static int (*ft_Init_FreeType)(FT_Library *alibrary); -static int (*ft_Done_Face)(FT_Face face); -static int (*ft_New_Face)(FT_Library library, const char *filepathname, - FT_Long face_index, FT_Face *aface); -static int (*ft_Set_Char_Size)(FT_Face face, FT_F26Dot6 char_width, - FT_F26Dot6 char_height, - FT_UInt horz_resolution, - FT_UInt vert_resolution); -static int (*ft_Set_Transform)(FT_Face face, FT_Matrix *matrix, - FT_Vector *delta); -static int (*ft_Get_Char_Index)(FT_Face face, FT_ULong charcode); -static int (*ft_Load_Glyph)(FT_Face face, FT_UInt glyph_index, - FT_Int32 load_flags); -static int (*ft_Render_Glyph)(FT_GlyphSlot slot, - FT_Render_Mode render_mode); +FT_Library ft_lib = NULL; +void *ft_handle = NULL; +static int (*ft_Init_FreeType)(FT_Library *alibrary); +static int (*ft_Done_Face)(FT_Face face); +static int (*ft_New_Face)(FT_Library library, const char *filepathname, + FT_Long face_index, FT_Face *aface); +static int (*ft_Set_Char_Size)(FT_Face face, FT_F26Dot6 char_width, + FT_F26Dot6 char_height, + FT_UInt horz_resolution, + FT_UInt vert_resolution); +static int (*ft_Set_Transform)(FT_Face face, FT_Matrix *matrix, + FT_Vector *delta); +static int (*ft_Get_Char_Index)(FT_Face face, FT_ULong charcode); +static int (*ft_Load_Glyph)(FT_Face face, FT_UInt glyph_index, + FT_Int32 load_flags); +static int (*ft_Render_Glyph)(FT_GlyphSlot slot, + FT_Render_Mode render_mode); static dllimp_t ft_imports[] = { - { "FT_Init_FreeType", &ft_Init_FreeType }, - { "FT_New_Face", &ft_New_Face }, - { "FT_Done_Face", &ft_Done_Face }, - { "FT_Set_Char_Size", &ft_Set_Char_Size }, - { "FT_Set_Transform", &ft_Set_Transform }, - { "FT_Get_Char_Index", &ft_Get_Char_Index }, - { "FT_Load_Glyph", &ft_Load_Glyph }, - { "FT_Render_Glyph", &ft_Render_Glyph }, - { NULL, NULL } + {"FT_Init_FreeType", &ft_Init_FreeType }, + { "FT_New_Face", &ft_New_Face }, + { "FT_Done_Face", &ft_Done_Face }, + { "FT_Set_Char_Size", &ft_Set_Char_Size }, + { "FT_Set_Transform", &ft_Set_Transform }, + { "FT_Get_Char_Index", &ft_Get_Char_Index}, + { "FT_Load_Glyph", &ft_Load_Glyph }, + { "FT_Render_Glyph", &ft_Render_Glyph }, + { NULL, NULL } }; - /* The fonts. */ -#define FONT_DEFAULT 0 -#define FONT_ROMAN 1 -#define FONT_SANSSERIF 2 -#define FONT_COURIER 3 -#define FONT_SCRIPT 4 -#define FONT_OCRA 5 -#define FONT_OCRB 6 +#define FONT_DEFAULT 0 +#define FONT_ROMAN 1 +#define FONT_SANSSERIF 2 +#define FONT_COURIER 3 +#define FONT_SCRIPT 4 +#define FONT_OCRA 5 +#define FONT_OCRB 6 /* Font styles. */ -#define STYLE_PROP 0x0001 -#define STYLE_CONDENSED 0x0002 -#define STYLE_BOLD 0x0004 -#define STYLE_DOUBLESTRIKE 0x0008 -#define STYLE_DOUBLEWIDTH 0x0010 -#define STYLE_ITALICS 0x0020 -#define STYLE_UNDERLINE 0x0040 -#define STYLE_SUPERSCRIPT 0x0080 -#define STYLE_SUBSCRIPT 0x0100 -#define STYLE_STRIKETHROUGH 0x0200 -#define STYLE_OVERSCORE 0x0400 +#define STYLE_PROP 0x0001 +#define STYLE_CONDENSED 0x0002 +#define STYLE_BOLD 0x0004 +#define STYLE_DOUBLESTRIKE 0x0008 +#define STYLE_DOUBLEWIDTH 0x0010 +#define STYLE_ITALICS 0x0020 +#define STYLE_UNDERLINE 0x0040 +#define STYLE_SUPERSCRIPT 0x0080 +#define STYLE_SUBSCRIPT 0x0100 +#define STYLE_STRIKETHROUGH 0x0200 +#define STYLE_OVERSCORE 0x0400 #define STYLE_DOUBLEWIDTHONELINE 0x0800 -#define STYLE_DOUBLEHEIGHT 0x1000 +#define STYLE_DOUBLEHEIGHT 0x1000 /* Underlining styles. */ -#define SCORE_NONE 0x00 -#define SCORE_SINGLE 0x01 -#define SCORE_DOUBLE 0x02 -#define SCORE_SINGLEBROKEN 0x05 -#define SCORE_DOUBLEBROKEN 0x06 +#define SCORE_NONE 0x00 +#define SCORE_SINGLE 0x01 +#define SCORE_DOUBLE 0x02 +#define SCORE_SINGLEBROKEN 0x05 +#define SCORE_DOUBLEBROKEN 0x06 /* Print quality. */ -#define QUALITY_DRAFT 0x01 -#define QUALITY_LQ 0x02 +#define QUALITY_DRAFT 0x01 +#define QUALITY_LQ 0x02 /* Typefaces. */ -#define TYPEFACE_ROMAN 0 -#define TYPEFACE_SANSSERIF 1 -#define TYPEFACE_COURIER 2 -#define TYPEFACE_PRESTIGE 3 -#define TYPEFACE_SCRIPT 4 -#define TYPEFACE_OCRB 5 -#define TYPEFACE_OCRA 6 -#define TYPEFACE_ORATOR 7 -#define TYPEFACE_ORATORS 8 -#define TYPEFACE_SCRIPTC 9 -#define TYPEFACE_ROMANT 10 -#define TYPEFACE_SANSSERIFH 11 -#define TYPEFACE_SVBUSABA 30 -#define TYPEFACE_SVJITTRA 31 - +#define TYPEFACE_ROMAN 0 +#define TYPEFACE_SANSSERIF 1 +#define TYPEFACE_COURIER 2 +#define TYPEFACE_PRESTIGE 3 +#define TYPEFACE_SCRIPT 4 +#define TYPEFACE_OCRB 5 +#define TYPEFACE_OCRA 6 +#define TYPEFACE_ORATOR 7 +#define TYPEFACE_ORATORS 8 +#define TYPEFACE_SCRIPTC 9 +#define TYPEFACE_ROMANT 10 +#define TYPEFACE_SANSSERIFH 11 +#define TYPEFACE_SVBUSABA 30 +#define TYPEFACE_SVJITTRA 31 /* Some helper macros. */ -#define PARAM16(x) (dev->esc_parms[x+1] * 256 + dev->esc_parms[x]) -#define PIXX ((unsigned)floor(dev->curr_x * dev->dpi + 0.5)) -#define PIXY ((unsigned)floor(dev->curr_y * dev->dpi + 0.5)) - +#define PARAM16(x) (dev->esc_parms[x + 1] * 256 + dev->esc_parms[x]) +#define PIXX ((unsigned) floor(dev->curr_x * dev->dpi + 0.5)) +#define PIXY ((unsigned) floor(dev->curr_y * dev->dpi + 0.5)) typedef struct { - int8_t dirty; /* has the page been printed on? */ - char pad; + int8_t dirty; /* has the page been printed on? */ + char pad; - uint16_t w; /* size and pitch //INFO */ - uint16_t h; - uint16_t pitch; + uint16_t w; /* size and pitch //INFO */ + uint16_t h; + uint16_t pitch; - uint8_t *pixels; /* grayscale pixel data */ + uint8_t *pixels; /* grayscale pixel data */ } psurface_t; - typedef struct { - const char *name; + const char *name; - void *lpt; + void *lpt; - pc_timer_t pulse_timer; - pc_timer_t timeout_timer; + pc_timer_t pulse_timer; + pc_timer_t timeout_timer; - char page_fn[260]; - uint8_t color; + char page_fn[260]; + uint8_t color; /* page data (TODO: make configurable) */ - double page_width, /* all in inches */ - page_height, - left_margin, - top_margin, - right_margin, - bottom_margin; - uint16_t dpi; - double cpi; /* defined chars per inch */ - double lpi; /* defined lines per inch */ + double page_width, /* all in inches */ + page_height, + left_margin, + top_margin, + right_margin, + bottom_margin; + uint16_t dpi; + double cpi; /* defined chars per inch */ + double lpi; /* defined lines per inch */ /* font data */ - double actual_cpi; /* actual cpi as with current font */ - double linespacing; /* in inch */ - double hmi; /* hor. motion index (inch); overrides CPI */ + double actual_cpi; /* actual cpi as with current font */ + double linespacing; /* in inch */ + double hmi; /* hor. motion index (inch); overrides CPI */ /* tabstops */ - double horizontal_tabs[32]; - uint8_t num_horizontal_tabs; - double vertical_tabs[16]; - int8_t num_vertical_tabs; + double horizontal_tabs[32]; + uint8_t num_horizontal_tabs; + double vertical_tabs[16]; + int8_t num_vertical_tabs; /* bit graphics data */ - uint16_t bg_h_density; /* in dpi */ - uint16_t bg_v_density; /* in dpi */ - int8_t bg_adjacent; /* print adjacent pixels (ignored) */ - uint8_t bg_bytes_per_column; - uint16_t bg_remaining_bytes; /* #bytes left before img is complete */ - uint8_t bg_column[6]; /* #bytes of the current and last col */ - uint8_t bg_bytes_read; /* #bytes read so far for current col */ + uint16_t bg_h_density; /* in dpi */ + uint16_t bg_v_density; /* in dpi */ + int8_t bg_adjacent; /* print adjacent pixels (ignored) */ + uint8_t bg_bytes_per_column; + uint16_t bg_remaining_bytes; /* #bytes left before img is complete */ + uint8_t bg_column[6]; /* #bytes of the current and last col */ + uint8_t bg_bytes_read; /* #bytes read so far for current col */ /* handshake data */ - uint8_t data; - uint8_t ack; - uint8_t select; - uint8_t busy; - uint8_t int_pending; - uint8_t error; - uint8_t autofeed; + uint8_t data; + uint8_t ack; + uint8_t select; + uint8_t busy; + uint8_t int_pending; + uint8_t error; + uint8_t autofeed; /* ESC command data */ - int8_t esc_seen; /* set to 1 if an ESC char was seen */ - int8_t fss_seen; - uint16_t esc_pending; /* in which ESC command are we */ - uint8_t esc_parms_req; - uint8_t esc_parms_curr; - uint8_t esc_parms[20]; /* 20 should be enough for everybody */ + int8_t esc_seen; /* set to 1 if an ESC char was seen */ + int8_t fss_seen; + uint16_t esc_pending; /* in which ESC command are we */ + uint8_t esc_parms_req; + uint8_t esc_parms_curr; + uint8_t esc_parms[20]; /* 20 should be enough for everybody */ /* internal page data */ - char fontpath[1024]; - char pagepath[1024]; - psurface_t *page; - double curr_x, curr_y; /* print head position (inch) */ - uint16_t current_font; - FT_Face fontface; - int8_t lq_typeface; - uint16_t font_style; - uint8_t print_quality; - uint8_t font_score; - double extra_intra_space; /* extra spacing between chars (inch) */ + char fontpath[1024]; + char pagepath[1024]; + psurface_t *page; + double curr_x, curr_y; /* print head position (inch) */ + uint16_t current_font; + FT_Face fontface; + int8_t lq_typeface; + uint16_t font_style; + uint8_t print_quality; + uint8_t font_score; + double extra_intra_space; /* extra spacing between chars (inch) */ /* other internal data */ - uint16_t char_tables[4]; /* the character tables for ESC t */ - uint8_t curr_char_table; /* the active char table index */ - uint16_t curr_cpmap[256]; /* current ASCII->Unicode map table */ + uint16_t char_tables[4]; /* the character tables for ESC t */ + uint8_t curr_char_table; /* the active char table index */ + uint16_t curr_cpmap[256]; /* current ASCII->Unicode map table */ - int8_t multipoint_mode; /* multipoint mode, ESC X */ - double multipoint_size; /* size of font, in points */ - double multipoint_cpi; /* chars per inch in multipoint mode */ + int8_t multipoint_mode; /* multipoint mode, ESC X */ + double multipoint_size; /* size of font, in points */ + double multipoint_cpi; /* chars per inch in multipoint mode */ - uint8_t density_k; /* density modes for ESC K/L/Y/Z */ - uint8_t density_l; - uint8_t density_y; - uint8_t density_z; + uint8_t density_k; /* density modes for ESC K/L/Y/Z */ + uint8_t density_l; + uint8_t density_y; + uint8_t density_z; - int8_t print_upper_control; /* ESC 6, ESC 7 */ - int8_t print_everything_count; /* for ESC ( ^ */ + int8_t print_upper_control; /* ESC 6, ESC 7 */ + int8_t print_everything_count; /* for ESC ( ^ */ - double defined_unit; /* internal unit for some ESC/P - * commands. -1 = use default */ + double defined_unit; /* internal unit for some ESC/P + * commands. -1 = use default */ - uint8_t msb; /* MSB mode, -1 = off */ - uint8_t ctrl; + uint8_t msb; /* MSB mode, -1 = off */ + uint8_t ctrl; - PALETTE palcol; + PALETTE palcol; } escp_t; - static void update_font(escp_t *dev); static void @@ -316,87 +307,82 @@ print_bit_graph(escp_t *dev, uint8_t ch); static void new_page(escp_t *dev, int8_t save, int8_t resetx); - /* Codepage table, needed for ESC t ( */ static const uint16_t codepages[15] = { - 0, 437, 932, 850, 851, 853, 855, 860, + 0, 437, 932, 850, 851, 853, 855, 860, 863, 865, 852, 857, 862, 864, 866 }; - /* "patches" to the codepage for the international charsets * these bytes patch the following 12 positions of the char table, in order: * 0x23 0x24 0x40 0x5b 0x5c 0x5d 0x5e 0x60 0x7b 0x7c 0x7d 0x7e * TODO: Implement the missing international charsets */ static const uint16_t intCharSets[15][12] = { - { 0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 0 USA */ - 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e }, + {0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 0 USA */ + 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e}, - { 0x0023, 0x0024, 0x00e0, 0x00ba, 0x00e7, 0x00a7, /* 1 France */ - 0x005e, 0x0060, 0x00e9, 0x00f9, 0x00e8, 0x00a8 }, + { 0x0023, 0x0024, 0x00e0, 0x00ba, 0x00e7, 0x00a7, /* 1 France */ + 0x005e, 0x0060, 0x00e9, 0x00f9, 0x00e8, 0x00a8}, - { 0x0023, 0x0024, 0x00a7, 0x00c4, 0x00d6, 0x00dc, /* 2 Germany */ - 0x005e, 0x0060, 0x00e4, 0x00f6, 0x00fc, 0x00df }, + { 0x0023, 0x0024, 0x00a7, 0x00c4, 0x00d6, 0x00dc, /* 2 Germany */ + 0x005e, 0x0060, 0x00e4, 0x00f6, 0x00fc, 0x00df}, - { 0x00a3, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 3 UK */ - 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e }, + { 0x00a3, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 3 UK */ + 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e}, - { 0x0023, 0x0024, 0x0040, 0x00c6, 0x00d8, 0x00c5, /* 4 Denmark (1) */ - 0x005e, 0x0060, 0x00e6, 0x00f8, 0x00e5, 0x007e }, + { 0x0023, 0x0024, 0x0040, 0x00c6, 0x00d8, 0x00c5, /* 4 Denmark (1) */ + 0x005e, 0x0060, 0x00e6, 0x00f8, 0x00e5, 0x007e}, - { 0x0023, 0x00a4, 0x00c9, 0x00c4, 0x00d6, 0x00c5, /* 5 Sweden */ - 0x00dc, 0x00e9, 0x00e4, 0x00f6, 0x00e5, 0x00fc }, + { 0x0023, 0x00a4, 0x00c9, 0x00c4, 0x00d6, 0x00c5, /* 5 Sweden */ + 0x00dc, 0x00e9, 0x00e4, 0x00f6, 0x00e5, 0x00fc}, - { 0x0023, 0x0024, 0x0040, 0x00ba, 0x005c, 0x00e9, /* 6 Italy */ - 0x005e, 0x00f9, 0x00e0, 0x00f2, 0x00e8, 0x00ec }, + { 0x0023, 0x0024, 0x0040, 0x00ba, 0x005c, 0x00e9, /* 6 Italy */ + 0x005e, 0x00f9, 0x00e0, 0x00f2, 0x00e8, 0x00ec}, - { 0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 7 Spain 1 */ - 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e }, /* TODO */ + { 0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 7 Spain 1 */ + 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e}, /* TODO */ - { 0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 8 Japan (English) */ - 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e }, /* TODO */ + { 0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 8 Japan (English) */ + 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e}, /* TODO */ - { 0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 9 Norway */ - 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e }, /* TODO */ + { 0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 9 Norway */ + 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e}, /* TODO */ - { 0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 10 Denmark (2) */ - 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e }, /* TODO */ + { 0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 10 Denmark (2) */ + 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e}, /* TODO */ - { 0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 11 Spain (2) */ - 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e }, /* TODO */ + { 0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 11 Spain (2) */ + 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e}, /* TODO */ - { 0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 12 Latin America */ - 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e }, /* TODO */ + { 0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 12 Latin America */ + 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e}, /* TODO */ - { 0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 13 Korea */ - 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e }, /* TODO */ + { 0x0023, 0x0024, 0x0040, 0x005b, 0x005c, 0x005d, /* 13 Korea */ + 0x005e, 0x0060, 0x007b, 0x007c, 0x007d, 0x007e}, /* TODO */ - { 0x0023, 0x0024, 0x00a7, 0x00c4, 0x0027, 0x0022, /* 14 Legal */ - 0x00b6, 0x0060, 0x00a9, 0x00ae, 0x2020, 0x2122 } + { 0x0023, 0x0024, 0x00a7, 0x00c4, 0x0027, 0x0022, /* 14 Legal */ + 0x00b6, 0x0060, 0x00a9, 0x00ae, 0x2020, 0x2122} }; - #ifdef ENABLE_ESCP_LOG int escp_do_log = ENABLE_ESCP_LOG; - static void escp_log(const char *fmt, ...) { va_list ap; if (escp_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define escp_log(fmt, ...) +# define escp_log(fmt, ...) #endif - /* Dump the current page into a formatted file. */ static void dump_page(escp_t *dev) @@ -408,111 +394,106 @@ dump_page(escp_t *dev) png_write_rgb(path, dev->page->pixels, dev->page->w, dev->page->h, dev->page->pitch, dev->palcol); } - static void new_page(escp_t *dev, int8_t save, int8_t resetx) { /* Dump the current page if needed. */ if (save && dev->page) - dump_page(dev); + dump_page(dev); if (resetx) - dev->curr_x = dev->left_margin; + dev->curr_x = dev->left_margin; /* Clear page. */ dev->curr_y = dev->top_margin; if (dev->page) { - dev->page->dirty = 0; - memset(dev->page->pixels, 0x00, dev->page->pitch * dev->page->h); + dev->page->dirty = 0; + memset(dev->page->pixels, 0x00, dev->page->pitch * dev->page->h); } /* Make the page's file name. */ plat_tempfile(dev->page_fn, NULL, ".png"); } - static void pulse_timer(void *priv) { escp_t *dev = (escp_t *) priv; if (dev->ack) { - dev->ack = 0; - lpt_irq(dev->lpt, 1); + dev->ack = 0; + lpt_irq(dev->lpt, 1); } timer_disable(&dev->pulse_timer); } - static void timeout_timer(void *priv) { escp_t *dev = (escp_t *) priv; if (dev->page->dirty) - new_page(dev, 1, 1); + new_page(dev, 1, 1); timer_disable(&dev->timeout_timer); } - static void fill_palette(uint8_t redmax, uint8_t greenmax, uint8_t bluemax, uint8_t colorID, escp_t *dev) { uint8_t colormask; - int i; + int i; - float red = (float)redmax / (float)30.9; - float green = (float)greenmax / (float)30.9; - float blue = (float)bluemax / (float)30.9; + float red = (float) redmax / (float) 30.9; + float green = (float) greenmax / (float) 30.9; + float blue = (float) bluemax / (float) 30.9; - colormask = colorID<<=5; + colormask = colorID <<= 5; - for(i = 0; i < 32; i++) { - dev->palcol[i+colormask].r = 255 - (uint8_t)floor(red * (float)i); - dev->palcol[i+colormask].g = 255 - (uint8_t)floor(green * (float)i); - dev->palcol[i+colormask].b = 255 - (uint8_t)floor(blue * (float)i); + for (i = 0; i < 32; i++) { + dev->palcol[i + colormask].r = 255 - (uint8_t) floor(red * (float) i); + dev->palcol[i + colormask].g = 255 - (uint8_t) floor(green * (float) i); + dev->palcol[i + colormask].b = 255 - (uint8_t) floor(blue * (float) i); } } - static void reset_printer(escp_t *dev) { int i; /* TODO: these should be configurable. */ - dev->color = COLOR_BLACK; + dev->color = COLOR_BLACK; dev->curr_x = dev->curr_y = 0.0; - dev->esc_seen = 0; - dev->fss_seen = 0; - dev->esc_pending = 0; + dev->esc_seen = 0; + dev->fss_seen = 0; + dev->esc_pending = 0; dev->esc_parms_req = dev->esc_parms_curr = 0; dev->top_margin = dev->left_margin = 0.0; dev->right_margin = dev->page_width = PAGE_WIDTH; dev->bottom_margin = dev->page_height = PAGE_HEIGHT; - dev->lpi = PAGE_LPI; - dev->linespacing = 1.0 / dev->lpi; - dev->cpi = PAGE_CPI; - dev->curr_char_table = 1; - dev->font_style = 0; - dev->extra_intra_space = 0.0; - dev->print_upper_control = 1; - dev->bg_remaining_bytes = 0; - dev->density_k = 0; - dev->density_l = 1; - dev->density_y = 2; - dev->density_z = 3; - dev->char_tables[0] = 0; /* italics */ + dev->lpi = PAGE_LPI; + dev->linespacing = 1.0 / dev->lpi; + dev->cpi = PAGE_CPI; + dev->curr_char_table = 1; + dev->font_style = 0; + dev->extra_intra_space = 0.0; + dev->print_upper_control = 1; + dev->bg_remaining_bytes = 0; + dev->density_k = 0; + dev->density_l = 1; + dev->density_y = 2; + dev->density_z = 3; + dev->char_tables[0] = 0; /* italics */ dev->char_tables[1] = dev->char_tables[2] = dev->char_tables[3] = 437; /* all other tables use CP437 */ - dev->defined_unit = -1.0; - dev->multipoint_mode = 0; - dev->multipoint_size = 0.0; - dev->multipoint_cpi = 0.0; - dev->hmi = -1; - dev->msb = 255; - dev->print_everything_count = 0; - dev->lq_typeface = TYPEFACE_COURIER; + dev->defined_unit = -1.0; + dev->multipoint_mode = 0; + dev->multipoint_size = 0.0; + dev->multipoint_cpi = 0.0; + dev->hmi = -1; + dev->msb = 255; + dev->print_everything_count = 0; + dev->lq_typeface = TYPEFACE_COURIER; init_codepage(dev, dev->char_tables[dev->curr_char_table]); @@ -521,19 +502,18 @@ reset_printer(escp_t *dev) new_page(dev, 0, 1); for (i = 0; i < 32; i++) - dev->horizontal_tabs[i] = i * 8.0 * (1.0 / dev->cpi); + dev->horizontal_tabs[i] = i * 8.0 * (1.0 / dev->cpi); dev->num_horizontal_tabs = 32; - dev->num_vertical_tabs = -1; + dev->num_vertical_tabs = -1; if (dev->page != NULL) - dev->page->dirty = 0; + dev->page->dirty = 0; escp_log("ESC/P: width=%.1fin,height=%.1fin dpi=%i cpi=%i lpi=%i\n", - dev->page_width, dev->page_height, (int)dev->dpi, - (int)dev->cpi, (int)dev->lpi); + dev->page_width, dev->page_height, (int) dev->dpi, + (int) dev->cpi, (int) dev->lpi); } - static void reset_printer_hard(escp_t *dev) { @@ -543,7 +523,6 @@ reset_printer_hard(escp_t *dev) reset_printer(dev); } - /* Select a ASCII->Unicode mapping by CP number */ static void init_codepage(escp_t *dev, uint16_t num) @@ -552,48 +531,48 @@ init_codepage(escp_t *dev, uint16_t num) select_codepage(num, dev->curr_cpmap); } - static void update_font(escp_t *dev) { - char path[1024]; - char *fn; + char path[1024]; + char *fn; FT_Matrix matrix; - double hpoints = 10.5; - double vpoints = 10.5; + double hpoints = 10.5; + double vpoints = 10.5; /* We need the FreeType library. */ if (ft_lib == NULL) - return; + return; /* Release current font if we have one. */ if (dev->fontface) - ft_Done_Face(dev->fontface); + ft_Done_Face(dev->fontface); if (dev->print_quality == QUALITY_DRAFT) - fn = FONT_FILE_DOTMATRIX; - else switch (dev->lq_typeface) { - case TYPEFACE_ROMAN: - fn = FONT_FILE_ROMAN; - break; - case TYPEFACE_SANSSERIF: - fn = FONT_FILE_SANSSERIF; - break; - case TYPEFACE_COURIER: - fn = FONT_FILE_COURIER; - break; - case TYPEFACE_SCRIPT: - fn = FONT_FILE_SCRIPT; - break; - case TYPEFACE_OCRA: - fn = FONT_FILE_OCRA; - break; - case TYPEFACE_OCRB: - fn = FONT_FILE_OCRB; - break; - default: - fn = FONT_FILE_DOTMATRIX; - } + fn = FONT_FILE_DOTMATRIX; + else + switch (dev->lq_typeface) { + case TYPEFACE_ROMAN: + fn = FONT_FILE_ROMAN; + break; + case TYPEFACE_SANSSERIF: + fn = FONT_FILE_SANSSERIF; + break; + case TYPEFACE_COURIER: + fn = FONT_FILE_COURIER; + break; + case TYPEFACE_SCRIPT: + fn = FONT_FILE_SCRIPT; + break; + case TYPEFACE_OCRA: + fn = FONT_FILE_OCRA; + break; + case TYPEFACE_OCRB: + fn = FONT_FILE_OCRB; + break; + default: + fn = FONT_FILE_DOTMATRIX; + } /* Create a full pathname for the ROM file. */ strcpy(path, dev->fontpath); @@ -604,1009 +583,1002 @@ update_font(escp_t *dev) /* Load the new font. */ if (ft_New_Face(ft_lib, path, 0, &dev->fontface)) { - escp_log("ESC/P: unable to load font '%s'\n", path); - dev->fontface = NULL; + escp_log("ESC/P: unable to load font '%s'\n", path); + dev->fontface = NULL; } if (!dev->multipoint_mode) { - dev->actual_cpi = dev->cpi; + dev->actual_cpi = dev->cpi; - if (!(dev->font_style & STYLE_CONDENSED)) { - hpoints *= 10.0 / dev->cpi; - vpoints *= 10.0 / dev->cpi; - } + if (!(dev->font_style & STYLE_CONDENSED)) { + hpoints *= 10.0 / dev->cpi; + vpoints *= 10.0 / dev->cpi; + } - if (!(dev->font_style & STYLE_PROP)) { - if ((dev->cpi == 10.0) && (dev->font_style & STYLE_CONDENSED)) { - dev->actual_cpi = 17.14; - hpoints *= 10.0 / 17.14; - } + if (!(dev->font_style & STYLE_PROP)) { + if ((dev->cpi == 10.0) && (dev->font_style & STYLE_CONDENSED)) { + dev->actual_cpi = 17.14; + hpoints *= 10.0 / 17.14; + } - if ((dev->cpi == 12) && (dev->font_style & STYLE_CONDENSED)) { - dev->actual_cpi = 20.0; - hpoints *= 10.0 / 20.0; - vpoints *= 10.0 / 12.0; - } - } - else if (dev->font_style & STYLE_CONDENSED) - hpoints /= 2.0; + if ((dev->cpi == 12) && (dev->font_style & STYLE_CONDENSED)) { + dev->actual_cpi = 20.0; + hpoints *= 10.0 / 20.0; + vpoints *= 10.0 / 12.0; + } + } else if (dev->font_style & STYLE_CONDENSED) + hpoints /= 2.0; - if ((dev->font_style & STYLE_DOUBLEWIDTH) || - (dev->font_style & STYLE_DOUBLEWIDTHONELINE)) { - dev->actual_cpi /= 2.0; - hpoints *= 2.0; - } + if ((dev->font_style & STYLE_DOUBLEWIDTH) || (dev->font_style & STYLE_DOUBLEWIDTHONELINE)) { + dev->actual_cpi /= 2.0; + hpoints *= 2.0; + } - if (dev->font_style & STYLE_DOUBLEHEIGHT) - vpoints *= 2.0; + if (dev->font_style & STYLE_DOUBLEHEIGHT) + vpoints *= 2.0; } else { - /* Multipoint mode. */ - dev->actual_cpi = dev->multipoint_cpi; - hpoints = vpoints = dev->multipoint_size; + /* Multipoint mode. */ + dev->actual_cpi = dev->multipoint_cpi; + hpoints = vpoints = dev->multipoint_size; } if ((dev->font_style & STYLE_SUPERSCRIPT) || (dev->font_style & STYLE_SUBSCRIPT)) { - hpoints *= 2.0 / 3.0; - vpoints *= 2.0 / 3.0; - dev->actual_cpi /= 2.0 / 3.0; + hpoints *= 2.0 / 3.0; + vpoints *= 2.0 / 3.0; + dev->actual_cpi /= 2.0 / 3.0; } ft_Set_Char_Size(dev->fontface, - (uint16_t)(hpoints * 64), (uint16_t)(vpoints * 64), - dev->dpi, dev->dpi); + (uint16_t) (hpoints * 64), (uint16_t) (vpoints * 64), + dev->dpi, dev->dpi); - if ((dev->font_style & STYLE_ITALICS) || - (dev->char_tables[dev->curr_char_table] == 0)) { - /* Italics transformation. */ - matrix.xx = 0x10000L; - matrix.xy = (FT_Fixed)(0.20 * 0x10000L); - matrix.yx = 0; - matrix.yy = 0x10000L; - ft_Set_Transform(dev->fontface, &matrix, 0); + if ((dev->font_style & STYLE_ITALICS) || (dev->char_tables[dev->curr_char_table] == 0)) { + /* Italics transformation. */ + matrix.xx = 0x10000L; + matrix.xy = (FT_Fixed) (0.20 * 0x10000L); + matrix.yx = 0; + matrix.yy = 0x10000L; + ft_Set_Transform(dev->fontface, &matrix, 0); } } - /* This is the actual ESC/P interpreter. */ static int process_char(escp_t *dev, uint8_t ch) { - double new_x, new_y; - double move_to; - double unit_size; - double reverse; - double new_top, new_bottom; + double new_x, new_y; + double move_to; + double unit_size; + double reverse; + double new_top, new_bottom; uint16_t rel_move; - int16_t i; + int16_t i; escp_log("Esc_seen=%d, fss_seen=%d\n", dev->esc_seen, dev->fss_seen); /* Determine number of additional command params that are expected. */ if (dev->esc_seen || dev->fss_seen) { - dev->esc_pending = ch; - if (dev->fss_seen) - dev->esc_pending |= 0x800; - dev->esc_seen = dev->fss_seen = 0; - dev->esc_parms_curr = 0; + dev->esc_pending = ch; + if (dev->fss_seen) + dev->esc_pending |= 0x800; + dev->esc_seen = dev->fss_seen = 0; + dev->esc_parms_curr = 0; - escp_log("Command pending=%02x, font path=%s\n", dev->esc_pending, dev->fontpath); - switch (dev->esc_pending) { - case 0x02: // Undocumented - case 0x0a: // Reverse line feed - case 0x0c: // Return to top of current page - case 0x0e: // Select double-width printing (one line) (ESC SO) - case 0x0f: // Select condensed printing (ESC SI) - case 0x23: // Cancel MSB control (ESC #) - case 0x30: // Select 1/8-inch line spacing (ESC 0) - case 0x31: // Select 7/60-inch line spacing - case 0x32: // Select 1/6-inch line spacing (ESC 2) - case 0x34: // Select italic font (ESC 4) - case 0x35: // Cancel italic font (ESC 5) - case 0x36: // Enable printing of upper control codes (ESC 6) - case 0x37: // Enable upper control codes (ESC 7) - case 0x38: // Disable paper-out detector - case 0x39: // Enable paper-out detector - case 0x3c: // Unidirectional mode (one line) (ESC <) - case 0x3d: // Set MSB to 0 (ESC =) - case 0x3e: // Set MSB to 1 (ESC >) - case 0x40: // Initialize printer (ESC @) - case 0x45: // Select bold font (ESC E) - case 0x46: // Cancel bold font (ESC F) - case 0x47: // Select double-strike printing (ESC G) - case 0x48: // Cancel double-strike printing (ESC H) - case 0x4d: // Select 10.5-point, 12-cpi (ESC M) - case 0x4f: // Cancel bottom margin - case 0x50: // Select 10.5-point, 10-cpi (ESC P) - case 0x54: // Cancel superscript/subscript printing (ESC T) - case 0x5e: // Enable printing of all character codes on next character - case 0x67: // Select 10.5-point, 15-cpi (ESC g) + escp_log("Command pending=%02x, font path=%s\n", dev->esc_pending, dev->fontpath); + switch (dev->esc_pending) { + case 0x02: // Undocumented + case 0x0a: // Reverse line feed + case 0x0c: // Return to top of current page + case 0x0e: // Select double-width printing (one line) (ESC SO) + case 0x0f: // Select condensed printing (ESC SI) + case 0x23: // Cancel MSB control (ESC #) + case 0x30: // Select 1/8-inch line spacing (ESC 0) + case 0x31: // Select 7/60-inch line spacing + case 0x32: // Select 1/6-inch line spacing (ESC 2) + case 0x34: // Select italic font (ESC 4) + case 0x35: // Cancel italic font (ESC 5) + case 0x36: // Enable printing of upper control codes (ESC 6) + case 0x37: // Enable upper control codes (ESC 7) + case 0x38: // Disable paper-out detector + case 0x39: // Enable paper-out detector + case 0x3c: // Unidirectional mode (one line) (ESC <) + case 0x3d: // Set MSB to 0 (ESC =) + case 0x3e: // Set MSB to 1 (ESC >) + case 0x40: // Initialize printer (ESC @) + case 0x45: // Select bold font (ESC E) + case 0x46: // Cancel bold font (ESC F) + case 0x47: // Select double-strike printing (ESC G) + case 0x48: // Cancel double-strike printing (ESC H) + case 0x4d: // Select 10.5-point, 12-cpi (ESC M) + case 0x4f: // Cancel bottom margin + case 0x50: // Select 10.5-point, 10-cpi (ESC P) + case 0x54: // Cancel superscript/subscript printing (ESC T) + case 0x5e: // Enable printing of all character codes on next character + case 0x67: // Select 10.5-point, 15-cpi (ESC g) - case 0x834: // Select italic font (FS 4) (= ESC 4) - case 0x835: // Cancel italic font (FS 5) (= ESC 5) - case 0x846: // Select forward feed mode (FS F) - case 0x852: // Select reverse feed mode (FS R) - dev->esc_parms_req = 0; - break; + case 0x834: // Select italic font (FS 4) (= ESC 4) + case 0x835: // Cancel italic font (FS 5) (= ESC 5) + case 0x846: // Select forward feed mode (FS F) + case 0x852: // Select reverse feed mode (FS R) + dev->esc_parms_req = 0; + break; - case 0x19: // Control paper loading/ejecting (ESC EM) - case 0x20: // Set intercharacter space (ESC SP) - case 0x21: // Master select (ESC !) - case 0x2b: // Set n/360-inch line spacing (ESC +) - case 0x2d: // Turn underline on/off (ESC -) - case 0x2f: // Select vertical tab channel (ESC /) - case 0x33: // Set n/180-inch line spacing (ESC 3) - case 0x41: // Set n/60-inch line spacing - case 0x43: // Set page length in lines (ESC C) - case 0x49: // Select character type and print pitch - case 0x4a: // Advance print position vertically (ESC J n) - case 0x4e: // Set bottom margin (ESC N) - case 0x51: // Set right margin (ESC Q) - case 0x52: // Select an international character set (ESC R) - case 0x53: // Select superscript/subscript printing (ESC S) - case 0x55: // Turn unidirectional mode on/off (ESC U) - case 0x57: // Turn double-width printing on/off (ESC W) - case 0x61: // Select justification (ESC a) - case 0x66: // Absolute horizontal tab in columns [conflict] - case 0x68: // Select double or quadruple size - case 0x69: // Immediate print - case 0x6a: // Reverse paper feed - case 0x6b: // Select typeface (ESC k) - case 0x6c: // Set left margin (ESC 1) - case 0x70: // Turn proportional mode on/off (ESC p) - case 0x72: // Select printing color (ESC r) - case 0x73: // Select low-speed mode (ESC s) - case 0x74: // Select character table (ESC t) - case 0x77: // Turn double-height printing on/off (ESC w) - case 0x78: // Select LQ or draft (ESC x) - case 0x7e: // Select/Deselect slash zero (ESC ~) - case 0x832: // Select 1/6-inch line spacing (FS 2) (= ESC 2) - case 0x833: // Set n/360-inch line spacing (FS 3) (= ESC +) - case 0x841: // Set n/60-inch line spacing (FS A) (= ESC A) - case 0x843: // Select LQ type style (FS C) (= ESC k) - case 0x845: // Select character width (FS E) - case 0x849: // Select character table (FS I) (= ESC t) - case 0x853: // Select High Speed/High Density elite pitch (FS S) - case 0x856: // Turn double-height printing on/off (FS V) (= ESC w) - dev->esc_parms_req = 1; - break; + case 0x19: // Control paper loading/ejecting (ESC EM) + case 0x20: // Set intercharacter space (ESC SP) + case 0x21: // Master select (ESC !) + case 0x2b: // Set n/360-inch line spacing (ESC +) + case 0x2d: // Turn underline on/off (ESC -) + case 0x2f: // Select vertical tab channel (ESC /) + case 0x33: // Set n/180-inch line spacing (ESC 3) + case 0x41: // Set n/60-inch line spacing + case 0x43: // Set page length in lines (ESC C) + case 0x49: // Select character type and print pitch + case 0x4a: // Advance print position vertically (ESC J n) + case 0x4e: // Set bottom margin (ESC N) + case 0x51: // Set right margin (ESC Q) + case 0x52: // Select an international character set (ESC R) + case 0x53: // Select superscript/subscript printing (ESC S) + case 0x55: // Turn unidirectional mode on/off (ESC U) + case 0x57: // Turn double-width printing on/off (ESC W) + case 0x61: // Select justification (ESC a) + case 0x66: // Absolute horizontal tab in columns [conflict] + case 0x68: // Select double or quadruple size + case 0x69: // Immediate print + case 0x6a: // Reverse paper feed + case 0x6b: // Select typeface (ESC k) + case 0x6c: // Set left margin (ESC 1) + case 0x70: // Turn proportional mode on/off (ESC p) + case 0x72: // Select printing color (ESC r) + case 0x73: // Select low-speed mode (ESC s) + case 0x74: // Select character table (ESC t) + case 0x77: // Turn double-height printing on/off (ESC w) + case 0x78: // Select LQ or draft (ESC x) + case 0x7e: // Select/Deselect slash zero (ESC ~) + case 0x832: // Select 1/6-inch line spacing (FS 2) (= ESC 2) + case 0x833: // Set n/360-inch line spacing (FS 3) (= ESC +) + case 0x841: // Set n/60-inch line spacing (FS A) (= ESC A) + case 0x843: // Select LQ type style (FS C) (= ESC k) + case 0x845: // Select character width (FS E) + case 0x849: // Select character table (FS I) (= ESC t) + case 0x853: // Select High Speed/High Density elite pitch (FS S) + case 0x856: // Turn double-height printing on/off (FS V) (= ESC w) + dev->esc_parms_req = 1; + break; - case 0x24: // Set absolute horizontal print position (ESC $) - case 0x3f: // Reassign bit-image mode (ESC ?) - case 0x4b: // Select 60-dpi graphics (ESC K) - case 0x4c: // Select 120-dpi graphics (ESC L) - case 0x59: // Select 120-dpi, double-speed graphics (ESC Y) - case 0x5a: // Select 240-dpi graphics (ESC Z) - case 0x5c: // Set relative horizontal print position (ESC \) - case 0x63: // Set horizontal motion index (HMI) (ESC c) - case 0x65: // Set vertical tab stops every n lines (ESC e) - case 0x85a: // Print 24-bit hex-density graphics (FS Z) - dev->esc_parms_req = 2; - break; + case 0x24: // Set absolute horizontal print position (ESC $) + case 0x3f: // Reassign bit-image mode (ESC ?) + case 0x4b: // Select 60-dpi graphics (ESC K) + case 0x4c: // Select 120-dpi graphics (ESC L) + case 0x59: // Select 120-dpi, double-speed graphics (ESC Y) + case 0x5a: // Select 240-dpi graphics (ESC Z) + case 0x5c: // Set relative horizontal print position (ESC \) + case 0x63: // Set horizontal motion index (HMI) (ESC c) + case 0x65: // Set vertical tab stops every n lines (ESC e) + case 0x85a: // Print 24-bit hex-density graphics (FS Z) + dev->esc_parms_req = 2; + break; - case 0x2a: // Select bit image (ESC *) - case 0x58: // Select font by pitch and point (ESC X) - dev->esc_parms_req = 3; - break; + case 0x2a: // Select bit image (ESC *) + case 0x58: // Select font by pitch and point (ESC X) + dev->esc_parms_req = 3; + break; - case 0x5b: // Select character height, width, line spacing - dev->esc_parms_req = 7; - break; + case 0x5b: // Select character height, width, line spacing + dev->esc_parms_req = 7; + break; - case 0x62: // Set vertical tabs in VFU channels (ESC b) - case 0x42: // Set vertical tabs (ESC B) - dev->num_vertical_tabs = 0; - return 1; + case 0x62: // Set vertical tabs in VFU channels (ESC b) + case 0x42: // Set vertical tabs (ESC B) + dev->num_vertical_tabs = 0; + return 1; - case 0x44: // Set horizontal tabs (ESC D) - dev->num_horizontal_tabs = 0; - return 1; + case 0x44: // Set horizontal tabs (ESC D) + dev->num_horizontal_tabs = 0; + return 1; - case 0x25: // Select user-defined set (ESC %) - case 0x26: // Define user-defined characters (ESC &) - case 0x3a: // Copy ROM to RAM (ESC :) - escp_log("ESC/P: User-defined characters not supported (0x%02x).\n", dev->esc_pending); - return 1; + case 0x25: // Select user-defined set (ESC %) + case 0x26: // Define user-defined characters (ESC &) + case 0x3a: // Copy ROM to RAM (ESC :) + escp_log("ESC/P: User-defined characters not supported (0x%02x).\n", dev->esc_pending); + return 1; - case 0x28: // Two bytes sequence - /* return and wait for second ESC byte */ - return 1; + case 0x28: // Two bytes sequence + /* return and wait for second ESC byte */ + return 1; - case 0x2e: - fatal("ESC/P: Print Raster Graphics (2E) command is not implemented.\nTerminating the emulator to avoid endless PNG generation.\n"); - exit(-1); - return 1; + case 0x2e: + fatal("ESC/P: Print Raster Graphics (2E) command is not implemented.\nTerminating the emulator to avoid endless PNG generation.\n"); + exit(-1); + return 1; - default: - escp_log("ESC/P: Unknown command ESC %c (0x%02x). Unable to skip parameters.\n", - dev->esc_pending >= 0x20 ? dev->esc_pending : '?', dev->esc_pending); - dev->esc_parms_req = 0; - dev->esc_pending = 0; - return 1; - } + default: + escp_log("ESC/P: Unknown command ESC %c (0x%02x). Unable to skip parameters.\n", + dev->esc_pending >= 0x20 ? dev->esc_pending : '?', dev->esc_pending); + dev->esc_parms_req = 0; + dev->esc_pending = 0; + return 1; + } - if (dev->esc_parms_req > 0) { - /* return and wait for parameters to appear */ - return 1; - } + if (dev->esc_parms_req > 0) { + /* return and wait for parameters to appear */ + return 1; + } } /* parameter checking for the 2-byte ESC/P2 commands */ if (dev->esc_pending == '(') { - dev->esc_pending = 0x0200 + ch; + dev->esc_pending = 0x0200 + ch; - escp_log("Two-byte command pending=%03x, font path=%s\n", dev->esc_pending, dev->fontpath); - switch (dev->esc_pending) { - case 0x0242: // Bar code setup and print (ESC (B) - case 0x025e: // Print data as characters (ESC (^) - dev->esc_parms_req = 2; - break; + escp_log("Two-byte command pending=%03x, font path=%s\n", dev->esc_pending, dev->fontpath); + switch (dev->esc_pending) { + case 0x0242: // Bar code setup and print (ESC (B) + case 0x025e: // Print data as characters (ESC (^) + dev->esc_parms_req = 2; + break; - case 0x0255: // Set unit (ESC (U) - dev->esc_parms_req = 3; - break; + case 0x0255: // Set unit (ESC (U) + dev->esc_parms_req = 3; + break; - case 0x0243: // Set page length in defined unit (ESC (C) - case 0x0256: // Set absolute vertical print position (ESC (V) - case 0x0276: // Set relative vertical print position (ESC (v) - dev->esc_parms_req = 4; - break; + case 0x0243: // Set page length in defined unit (ESC (C) + case 0x0256: // Set absolute vertical print position (ESC (V) + case 0x0276: // Set relative vertical print position (ESC (v) + dev->esc_parms_req = 4; + break; - case 0x0228: // Assign character table (ESC (t) - case 0x022d: // Select line/score (ESC (-) - dev->esc_parms_req = 5; - break; + case 0x0228: // Assign character table (ESC (t) + case 0x022d: // Select line/score (ESC (-) + dev->esc_parms_req = 5; + break; - case 0x0263: // Set page format (ESC (c) - dev->esc_parms_req = 6; - break; + case 0x0263: // Set page format (ESC (c) + dev->esc_parms_req = 6; + break; - default: - /* ESC ( commands are always followed by a "number of parameters" word parameter */ - dev->esc_parms_req = 2; - dev->esc_pending = 0x101; /* dummy value to be checked later */ - return 1; - } + default: + /* ESC ( commands are always followed by a "number of parameters" word parameter */ + dev->esc_parms_req = 2; + dev->esc_pending = 0x101; /* dummy value to be checked later */ + return 1; + } - /* If we need parameters, return and wait for them to appear. */ - if (dev->esc_parms_req > 0) - return 1; + /* If we need parameters, return and wait for them to appear. */ + if (dev->esc_parms_req > 0) + return 1; } /* Ignore VFU channel setting. */ if (dev->esc_pending == 0x62) { - dev->esc_pending = 0x42; - return 1; + dev->esc_pending = 0x42; + return 1; } /* Collect vertical tabs. */ if (dev->esc_pending == 0x42) { - /* check if we're done */ - if ((ch == 0) || - (dev->num_vertical_tabs > 0 && dev->vertical_tabs[dev->num_vertical_tabs - 1] > (double)ch * dev->linespacing)) { - dev->esc_pending = 0; - } else { - if (dev->num_vertical_tabs >= 0 && dev->num_vertical_tabs < 16) - dev->vertical_tabs[dev->num_vertical_tabs++] = (double)ch * dev->linespacing; - } + /* check if we're done */ + if ((ch == 0) || (dev->num_vertical_tabs > 0 && dev->vertical_tabs[dev->num_vertical_tabs - 1] > (double) ch * dev->linespacing)) { + dev->esc_pending = 0; + } else { + if (dev->num_vertical_tabs >= 0 && dev->num_vertical_tabs < 16) + dev->vertical_tabs[dev->num_vertical_tabs++] = (double) ch * dev->linespacing; + } } /* Collect horizontal tabs. */ if (dev->esc_pending == 0x44) { - /* check if we're done... */ - if ((ch == 0) || - (dev->num_horizontal_tabs > 0 && dev->horizontal_tabs[dev->num_horizontal_tabs - 1] > (double)ch * (1.0 / dev->cpi))) { - dev->esc_pending = 0; - } else { - if (dev->num_horizontal_tabs < 32) - dev->horizontal_tabs[dev->num_horizontal_tabs++] = (double)ch * (1.0 / dev->cpi); - } + /* check if we're done... */ + if ((ch == 0) || (dev->num_horizontal_tabs > 0 && dev->horizontal_tabs[dev->num_horizontal_tabs - 1] > (double) ch * (1.0 / dev->cpi))) { + dev->esc_pending = 0; + } else { + if (dev->num_horizontal_tabs < 32) + dev->horizontal_tabs[dev->num_horizontal_tabs++] = (double) ch * (1.0 / dev->cpi); + } } /* Check if we're still collecting parameters for the current command. */ if (dev->esc_parms_curr < dev->esc_parms_req) { - /* store current parameter */ - dev->esc_parms[dev->esc_parms_curr++] = ch; + /* store current parameter */ + dev->esc_parms[dev->esc_parms_curr++] = ch; - /* do we still need to continue collecting parameters? */ - if (dev->esc_parms_curr < dev->esc_parms_req) - return 1; + /* do we still need to continue collecting parameters? */ + if (dev->esc_parms_curr < dev->esc_parms_req) + return 1; } /* Handle the pending ESC command. */ if (dev->esc_pending != 0) { - switch (dev->esc_pending) { - case 0x02: /* undocumented; ignore */ - break; - - case 0x0e: /* select double-width (one line) (ESC SO) */ - if (! dev->multipoint_mode) { - dev->hmi = -1; - dev->font_style |= STYLE_DOUBLEWIDTHONELINE; - update_font(dev); - } - break; - - case 0x0f: /* select condensed printing (ESC SI) */ - if (! dev->multipoint_mode && (dev->cpi != 15.0)) { - dev->hmi = -1; - dev->font_style |= STYLE_CONDENSED; - update_font(dev); - } - break; - - case 0x19: /* control paper loading/ejecting (ESC EM) */ - /* We are not really loading paper, so most - * commands can be ignored */ - if (dev->esc_parms[0] == 'R') - new_page(dev, 1, 0); - - break; - case 0x20: /* set intercharacter space (ESC SP) */ - if (! dev->multipoint_mode) { - dev->extra_intra_space = (double)dev->esc_parms[0] / (dev->print_quality == QUALITY_DRAFT ? 120.0 : 180.0); - dev->hmi = -1; - update_font(dev); - } - break; - - case 0x21: /* master select (ESC !) */ - dev->cpi = dev->esc_parms[0] & 0x01 ? 12.0 : 10.0; - - /* Reset first seven bits. */ - dev->font_style &= 0xFF80; - if (dev->esc_parms[0] & 0x02) - dev->font_style |= STYLE_PROP; - if (dev->esc_parms[0] & 0x04) - dev->font_style |= STYLE_CONDENSED; - if (dev->esc_parms[0] & 0x08) - dev->font_style |= STYLE_BOLD; - if (dev->esc_parms[0] & 0x10) - dev->font_style |= STYLE_DOUBLESTRIKE; - if (dev->esc_parms[0] & 0x20) - dev->font_style |= STYLE_DOUBLEWIDTH; - if (dev->esc_parms[0] & 0x40) - dev->font_style |= STYLE_ITALICS; - if (dev->esc_parms[0] & 0x80) { - dev->font_score = SCORE_SINGLE; - dev->font_style |= STYLE_UNDERLINE; - } - - dev->hmi = -1; - dev->multipoint_mode = 0; - update_font(dev); - break; - - case 0x23: /* cancel MSB control (ESC #) */ - dev->msb = 255; - break; - - case 0x24: /* set abs horizontal print position (ESC $) */ - unit_size = dev->defined_unit; - if (unit_size < 0) - unit_size = 60.0; - - new_x = dev->left_margin + ((double)PARAM16(0) / unit_size); - if (new_x <= dev->right_margin) - dev->curr_x = new_x; - break; - - case 0x85a: /* Print 24-bit hex-density graphics (FS Z) */ - setup_bit_image(dev, 40, PARAM16(0)); - break; - - case 0x2a: /* select bit image (ESC *) */ - setup_bit_image(dev, dev->esc_parms[0], PARAM16(1)); - break; - - case 0x2b: /* set n/360-inch line spacing (ESC +) */ - case 0x833: /* Set n/360-inch line spacing (FS 3) */ - dev->linespacing = (double)dev->esc_parms[0] / 360.0; - break; - - case 0x2d: /* turn underline on/off (ESC -) */ - if (dev->esc_parms[0] == 0 || dev->esc_parms[0] == '0') - dev->font_style &= ~STYLE_UNDERLINE; - if (dev->esc_parms[0] == 1 || dev->esc_parms[0] == '1') { - dev->font_style |= STYLE_UNDERLINE; - dev->font_score = SCORE_SINGLE; - } - update_font(dev); - break; - - case 0x2f: /* select vertical tab channel (ESC /) */ - /* Ignore */ - break; - - case 0x30: /* select 1/8-inch line spacing (ESC 0) */ - dev->linespacing = 1.0 / 8.0; - break; - - case 0x31: /* select 7/60-inch line spacing */ - dev->linespacing = 7.0 / 60.0; - break; - - case 0x32: /* select 1/6-inch line spacing (ESC 2) */ - dev->linespacing = 1.0 / 6.0; - break; - - case 0x33: /* set n/180-inch line spacing (ESC 3) */ - dev->linespacing = (double)dev->esc_parms[0] / 180.0; - break; - - case 0x34: /* select italic font (ESC 4) */ - dev->font_style |= STYLE_ITALICS; - update_font(dev); - break; - - case 0x35: /* cancel italic font (ESC 5) */ - dev->font_style &= ~STYLE_ITALICS; - update_font(dev); - break; - - case 0x36: /* enable printing of upper control codes (ESC 6) */ - dev->print_upper_control = 1; - break; - - case 0x37: /* enable upper control codes (ESC 7) */ - dev->print_upper_control = 0; - break; - - case 0x3c: /* unidirectional mode (one line) (ESC <) */ - /* We don't have a print head, so just - * ignore this. */ - break; - - case 0x3d: /* set MSB to 0 (ESC =) */ - dev->msb = 0; - break; - - case 0x3e: /* set MSB to 1 (ESC >) */ - dev->msb = 1; - break; - - case 0x3f: /* reassign bit-image mode (ESC ?) */ - if (dev->esc_parms[0] == 'K') - dev->density_k = dev->esc_parms[1]; - if (dev->esc_parms[0] == 'L') - dev->density_l = dev->esc_parms[1]; - if (dev->esc_parms[0] == 'Y') - dev->density_y = dev->esc_parms[1]; - if (dev->esc_parms[0] == 'Z') - dev->density_z = dev->esc_parms[1]; - break; - - case 0x40: /* initialize printer (ESC @) */ - reset_printer(dev); - break; - - case 0x41: /* set n/60-inch line spacing */ - case 0x841: - dev->linespacing = (double)dev->esc_parms[0] / 60.0; - break; - - case 0x43: /* set page length in lines (ESC C) */ - if (dev->esc_parms[0] != 0) { - dev->page_height = dev->bottom_margin = (double)dev->esc_parms[0] * dev->linespacing; - } else { /* == 0 => Set page length in inches */ - dev->esc_parms_req = 1; - dev->esc_parms_curr = 0; - dev->esc_pending = 0x100; /* dummy value for later */ - return 1; - } - break; - - case 0x45: /* select bold font (ESC E) */ - dev->font_style |= STYLE_BOLD; - update_font(dev); - break; - - case 0x46: /* cancel bold font (ESC F) */ - dev->font_style &= ~STYLE_BOLD; - update_font(dev); - break; - - case 0x47: /* select dobule-strike printing (ESC G) */ - dev->font_style |= STYLE_DOUBLESTRIKE; - break; - - case 0x48: /* cancel double-strike printing (ESC H) */ - dev->font_style &= ~STYLE_DOUBLESTRIKE; - break; - - case 0x4a: /* advance print pos vertically (ESC J n) */ - dev->curr_y += (double)((double)dev->esc_parms[0] / 180.0); - if (dev->curr_y > dev->bottom_margin) - new_page(dev, 1, 0); - break; - - case 0x4b: /* select 60-dpi graphics (ESC K) */ - /* TODO: graphics stuff */ - setup_bit_image(dev, dev->density_k, PARAM16(0)); - break; - - case 0x4c: /* select 120-dpi graphics (ESC L) */ - /* TODO: graphics stuff */ - setup_bit_image(dev, dev->density_l, PARAM16(0)); - break; - - case 0x4d: /* select 10.5-point, 12-cpi (ESC M) */ - dev->cpi = 12.0; - dev->hmi = -1; - dev->multipoint_mode = 0; - update_font(dev); - break; - - case 0x4e: /* set bottom margin (ESC N) */ - dev->top_margin = 0.0; - dev->bottom_margin = (double)dev->esc_parms[0] * dev->linespacing; - break; - - case 0x4f: /* cancel bottom (and top) margin */ - dev->top_margin = 0.0; - dev->bottom_margin = dev->page_height; - break; - - case 0x50: /* select 10.5-point, 10-cpi (ESC P) */ - dev->cpi = 10.0; - dev->hmi = -1; - dev->multipoint_mode = 0; - update_font(dev); - break; - - case 0x51: /* set right margin */ - dev->right_margin = ((double)dev->esc_parms[0] - 1.0) / dev->cpi; - break; - - case 0x52: /* select an intl character set (ESC R) */ - if (dev->esc_parms[0] <= 13 || dev->esc_parms[0] == '@') { - if (dev->esc_parms[0] == '@') - dev->esc_parms[0] = 14; - - dev->curr_cpmap[0x23] = intCharSets[dev->esc_parms[0]][0]; - dev->curr_cpmap[0x24] = intCharSets[dev->esc_parms[0]][1]; - dev->curr_cpmap[0x40] = intCharSets[dev->esc_parms[0]][2]; - dev->curr_cpmap[0x5b] = intCharSets[dev->esc_parms[0]][3]; - dev->curr_cpmap[0x5c] = intCharSets[dev->esc_parms[0]][4]; - dev->curr_cpmap[0x5d] = intCharSets[dev->esc_parms[0]][5]; - dev->curr_cpmap[0x5e] = intCharSets[dev->esc_parms[0]][6]; - dev->curr_cpmap[0x60] = intCharSets[dev->esc_parms[0]][7]; - dev->curr_cpmap[0x7b] = intCharSets[dev->esc_parms[0]][8]; - dev->curr_cpmap[0x7c] = intCharSets[dev->esc_parms[0]][9]; - dev->curr_cpmap[0x7d] = intCharSets[dev->esc_parms[0]][10]; - dev->curr_cpmap[0x7e] = intCharSets[dev->esc_parms[0]][11]; - } - break; - - case 0x53: /* select superscript/subscript printing (ESC S) */ - if (dev->esc_parms[0] == 0 || dev->esc_parms[0] == '0') - dev->font_style |= STYLE_SUBSCRIPT; - if (dev->esc_parms[0] == 1 || dev->esc_parms[1] == '1') - dev->font_style |= STYLE_SUPERSCRIPT; - update_font(dev); - break; - - case 0x54: /* cancel superscript/subscript printing (ESC T) */ - dev->font_style &= 0xFFFF - STYLE_SUPERSCRIPT - STYLE_SUBSCRIPT; - update_font(dev); - break; - - case 0x55: /* turn unidirectional mode on/off (ESC U) */ - /* We don't have a print head, so just ignore this. */ - break; - - case 0x57: /* turn double-width printing on/off (ESC W) */ - if (!dev->multipoint_mode) { - dev->hmi = -1; - if (dev->esc_parms[0] == 0 || dev->esc_parms[0] == '0') - dev->font_style &= ~STYLE_DOUBLEWIDTH; - if (dev->esc_parms[0] == 1 || dev->esc_parms[0] == '1') - dev->font_style |= STYLE_DOUBLEWIDTH; - update_font(dev); - } - break; - - case 0x58: /* select font by pitch and point (ESC X) */ - dev->multipoint_mode = 1; - /* Copy currently non-multipoint CPI if no value was set so far. */ - if (dev->multipoint_cpi == 0.0) { - dev->multipoint_cpi= dev->cpi; - } - if (dev->esc_parms[0] > 0) { /* set CPI */ - if (dev->esc_parms[0] == 1) { - /* Proportional spacing. */ - dev->font_style |= STYLE_PROP; - } else if (dev->esc_parms[0] >= 5) - dev->multipoint_cpi = 360.0 / (double)dev->esc_parms[0]; - } - if (dev->multipoint_size == 0.0) - dev->multipoint_size = 10.5; - if (PARAM16(1) > 0) { - /* set points */ - dev->multipoint_size = ((double)PARAM16(1)) / 2.0; - } - update_font(dev); - break; - - case 0x59: /* select 120-dpi, double-speed graphics (ESC Y) */ - /* TODO: graphics stuff */ - setup_bit_image(dev, dev->density_y, PARAM16(0)); - break; - - case 0x5a: /* select 240-dpi graphics (ESC Z) */ - /* TODO: graphics stuff */ - setup_bit_image(dev, dev->density_z, PARAM16(0)); - break; - - case 0x5c: /* set relative horizontal print pos (ESC \) */ - rel_move = PARAM16(0); - unit_size = dev->defined_unit; - if (unit_size < 0) - unit_size = (dev->print_quality == QUALITY_DRAFT ? 120.0 : 180.0); - dev->curr_x += ((double)rel_move / unit_size); - break; - - case 0x61: /* select justification (ESC a) */ - /* Ignore. */ - break; - - case 0x63: /* set horizontal motion index (HMI) (ESC c) */ - dev->hmi = (double)PARAM16(0) / 360.0; - dev->extra_intra_space = 0.0; - break; - - case 0x67: /* select 10.5-point, 15-cpi (ESC g) */ - dev->cpi = 15; - dev->hmi = -1; - dev->multipoint_mode = 0; - update_font(dev); - break; - - case 0x846: // Select forward feed mode (FS F) - set reverse not implemented yet - if (dev->linespacing < 0) - dev->linespacing *= -1; - break; - - case 0x6a: // Reverse paper feed (ESC j) - reverse = (double)PARAM16(0) / (double)216.0; - reverse = dev->curr_y - reverse; - if (reverse < dev->left_margin) - dev->curr_y = dev->left_margin; - else - dev->curr_y = reverse; - break; - - case 0x6b: /* select typeface (ESC k) */ - if (dev->esc_parms[0] <= 11 || dev->esc_parms[0] == 30 || dev->esc_parms[0] == 31) { - dev->lq_typeface = dev->esc_parms[0]; - } - update_font(dev); - break; - - case 0x6c: /* set left margin (ESC 1) */ - dev->left_margin = ((double)dev->esc_parms[0] - 1.0) / dev->cpi; - if (dev->curr_x < dev->left_margin) - dev->curr_x = dev->left_margin; - break; - - case 0x70: /* Turn proportional mode on/off (ESC p) */ - if (dev->esc_parms[0] == 0 || dev->esc_parms[0] == '0') - dev->font_style &= ~STYLE_PROP; - if (dev->esc_parms[0] == 1 || dev->esc_parms[0] == '1') { - dev->font_style |= STYLE_PROP; - dev->print_quality = QUALITY_LQ; - } - dev->multipoint_mode = 0; - dev->hmi = -1; - update_font(dev); - break; - - case 0x72: /* select printing color (ESC r) */ - if (dev->esc_parms[0] == 0 || dev->esc_parms[0] > 6) - dev->color = COLOR_BLACK; - else - dev->color = dev->esc_parms[0] << 5; - break; - - case 0x73: /* select low-speed mode (ESC s) */ - /* Ignore. */ - break; - - case 0x74: /* select character table (ESC t) */ - case 0x849: /* Select character table (FS I) */ - if (dev->esc_parms[0] < 4) { - dev->curr_char_table = dev->esc_parms[0]; - } else if ((dev->esc_parms[0] >= '0') && (dev->esc_parms[0] <= '3')) { - dev->curr_char_table = dev->esc_parms[0] - '0'; - } - init_codepage(dev, dev->char_tables[dev->curr_char_table]); - update_font(dev); - break; - - case 0x77: /* turn double-height printing on/off (ESC w) */ - if (! dev->multipoint_mode) { - if (dev->esc_parms[0] == 0 || dev->esc_parms[0] == '0') - dev->font_style &= ~STYLE_DOUBLEHEIGHT; - if (dev->esc_parms[0] == 1 || dev->esc_parms[0] == '1') - dev->font_style |= STYLE_DOUBLEHEIGHT; - update_font(dev); - } - break; - - case 0x78: /* select LQ or draft (ESC x) */ - if (dev->esc_parms[0] == 0 || dev->esc_parms[0] == '0') { - dev->print_quality = QUALITY_DRAFT; - dev->font_style |= STYLE_CONDENSED; - } - if (dev->esc_parms[0] == 1 || dev->esc_parms[0] == '1') { - dev->print_quality = QUALITY_LQ; - dev->font_style &= ~STYLE_CONDENSED; - } - dev->hmi = -1; - update_font(dev); - break; - - /* Our special command markers. */ - case 0x0100: /* set page length in inches (ESC C NUL) */ - dev->page_height = (double)dev->esc_parms[0]; - dev->bottom_margin = dev->page_height; - dev->top_margin = 0.0; - break; - - case 0x0101: /* skip unsupported ESC ( command */ - dev->esc_parms_req = PARAM16(0); - dev->esc_parms_curr = 0; - break; - - /* Extended ESC ( commands */ - case 0x0228: /* assign character table (ESC (t) */ - case 0x0274: - if (dev->esc_parms[2] < 4 && dev->esc_parms[3] < 16) { - dev->char_tables[dev->esc_parms[2]] = codepages[dev->esc_parms[3]]; - if (dev->esc_parms[2] == dev->curr_char_table) - init_codepage(dev, dev->char_tables[dev->curr_char_table]); - } - break; - - case 0x022d: /* select line/score (ESC (-) */ - dev->font_style &= ~(STYLE_UNDERLINE | STYLE_STRIKETHROUGH | STYLE_OVERSCORE); - dev->font_score = dev->esc_parms[4]; - if (dev->font_score) { - if (dev->esc_parms[3] == 1) - dev->font_style |= STYLE_UNDERLINE; - if (dev->esc_parms[3] == 2) - dev->font_style |= STYLE_STRIKETHROUGH; - if (dev->esc_parms[3] == 3) - dev->font_style |= STYLE_OVERSCORE; - } - update_font(dev); - break; - - case 0x0242: /* bar code setup and print (ESC (B) */ - //ERRLOG("ESC/P: Barcode printing not supported.\n"); - - /* Find out how many bytes to skip. */ - dev->esc_parms_req = PARAM16(0); - dev->esc_parms_curr = 0; - break; - - case 0x0243: /* set page length in defined unit (ESC (C) */ - if (dev->esc_parms[0] && (dev->defined_unit> 0)) { - dev->page_height = dev->bottom_margin = (double)PARAM16(2) * dev->defined_unit; - dev->top_margin = 0.0; - } - break; - - case 0x0255: /* set unit (ESC (U) */ - dev->defined_unit = 3600.0 / (double)dev->esc_parms[2]; - break; - - case 0x0256: /* set abse vertical print pos (ESC (V) */ - unit_size = dev->defined_unit; - if (unit_size < 0) - unit_size = 360.0; - new_y = dev->top_margin + (double)PARAM16(2) * unit_size; - if (new_y > dev->bottom_margin) - new_page(dev, 1, 0); - else - dev->curr_y = new_y; - break; - - case 0x025e: /* print data as characters (ESC (^) */ - dev->print_everything_count = PARAM16(0); - break; - - case 0x0263: /* set page format (ESC (c) */ - if (dev->defined_unit > 0.0) { - new_top = (double)PARAM16(2) * dev->defined_unit; - new_bottom = (double)PARAM16(4) * dev->defined_unit; - if (new_top >= new_bottom) - break; - if (new_top < dev->page_height) - dev->top_margin = new_top; - if (new_bottom < dev->page_height) - dev->bottom_margin = new_bottom; - if (dev->top_margin > dev->curr_y) - dev->curr_y = dev->top_margin; - } - break; - - case 0x0276: /* set relative vertical print pos (ESC (v) */ - { - unit_size = dev->defined_unit; - if (unit_size < 0.0) - unit_size = 360.0; - new_y = dev->curr_y + (double)((int16_t)PARAM16(2)) * unit_size; - if (new_y > dev->top_margin) { - if (new_y > dev->bottom_margin) - new_page(dev, 1, 0); - else - dev->curr_y = new_y; - } - } - break; - - default: - break; - } - - dev->esc_pending = 0; - return 1; + switch (dev->esc_pending) { + case 0x02: /* undocumented; ignore */ + break; + + case 0x0e: /* select double-width (one line) (ESC SO) */ + if (!dev->multipoint_mode) { + dev->hmi = -1; + dev->font_style |= STYLE_DOUBLEWIDTHONELINE; + update_font(dev); + } + break; + + case 0x0f: /* select condensed printing (ESC SI) */ + if (!dev->multipoint_mode && (dev->cpi != 15.0)) { + dev->hmi = -1; + dev->font_style |= STYLE_CONDENSED; + update_font(dev); + } + break; + + case 0x19: /* control paper loading/ejecting (ESC EM) */ + /* We are not really loading paper, so most + * commands can be ignored */ + if (dev->esc_parms[0] == 'R') + new_page(dev, 1, 0); + + break; + case 0x20: /* set intercharacter space (ESC SP) */ + if (!dev->multipoint_mode) { + dev->extra_intra_space = (double) dev->esc_parms[0] / (dev->print_quality == QUALITY_DRAFT ? 120.0 : 180.0); + dev->hmi = -1; + update_font(dev); + } + break; + + case 0x21: /* master select (ESC !) */ + dev->cpi = dev->esc_parms[0] & 0x01 ? 12.0 : 10.0; + + /* Reset first seven bits. */ + dev->font_style &= 0xFF80; + if (dev->esc_parms[0] & 0x02) + dev->font_style |= STYLE_PROP; + if (dev->esc_parms[0] & 0x04) + dev->font_style |= STYLE_CONDENSED; + if (dev->esc_parms[0] & 0x08) + dev->font_style |= STYLE_BOLD; + if (dev->esc_parms[0] & 0x10) + dev->font_style |= STYLE_DOUBLESTRIKE; + if (dev->esc_parms[0] & 0x20) + dev->font_style |= STYLE_DOUBLEWIDTH; + if (dev->esc_parms[0] & 0x40) + dev->font_style |= STYLE_ITALICS; + if (dev->esc_parms[0] & 0x80) { + dev->font_score = SCORE_SINGLE; + dev->font_style |= STYLE_UNDERLINE; + } + + dev->hmi = -1; + dev->multipoint_mode = 0; + update_font(dev); + break; + + case 0x23: /* cancel MSB control (ESC #) */ + dev->msb = 255; + break; + + case 0x24: /* set abs horizontal print position (ESC $) */ + unit_size = dev->defined_unit; + if (unit_size < 0) + unit_size = 60.0; + + new_x = dev->left_margin + ((double) PARAM16(0) / unit_size); + if (new_x <= dev->right_margin) + dev->curr_x = new_x; + break; + + case 0x85a: /* Print 24-bit hex-density graphics (FS Z) */ + setup_bit_image(dev, 40, PARAM16(0)); + break; + + case 0x2a: /* select bit image (ESC *) */ + setup_bit_image(dev, dev->esc_parms[0], PARAM16(1)); + break; + + case 0x2b: /* set n/360-inch line spacing (ESC +) */ + case 0x833: /* Set n/360-inch line spacing (FS 3) */ + dev->linespacing = (double) dev->esc_parms[0] / 360.0; + break; + + case 0x2d: /* turn underline on/off (ESC -) */ + if (dev->esc_parms[0] == 0 || dev->esc_parms[0] == '0') + dev->font_style &= ~STYLE_UNDERLINE; + if (dev->esc_parms[0] == 1 || dev->esc_parms[0] == '1') { + dev->font_style |= STYLE_UNDERLINE; + dev->font_score = SCORE_SINGLE; + } + update_font(dev); + break; + + case 0x2f: /* select vertical tab channel (ESC /) */ + /* Ignore */ + break; + + case 0x30: /* select 1/8-inch line spacing (ESC 0) */ + dev->linespacing = 1.0 / 8.0; + break; + + case 0x31: /* select 7/60-inch line spacing */ + dev->linespacing = 7.0 / 60.0; + break; + + case 0x32: /* select 1/6-inch line spacing (ESC 2) */ + dev->linespacing = 1.0 / 6.0; + break; + + case 0x33: /* set n/180-inch line spacing (ESC 3) */ + dev->linespacing = (double) dev->esc_parms[0] / 180.0; + break; + + case 0x34: /* select italic font (ESC 4) */ + dev->font_style |= STYLE_ITALICS; + update_font(dev); + break; + + case 0x35: /* cancel italic font (ESC 5) */ + dev->font_style &= ~STYLE_ITALICS; + update_font(dev); + break; + + case 0x36: /* enable printing of upper control codes (ESC 6) */ + dev->print_upper_control = 1; + break; + + case 0x37: /* enable upper control codes (ESC 7) */ + dev->print_upper_control = 0; + break; + + case 0x3c: /* unidirectional mode (one line) (ESC <) */ + /* We don't have a print head, so just + * ignore this. */ + break; + + case 0x3d: /* set MSB to 0 (ESC =) */ + dev->msb = 0; + break; + + case 0x3e: /* set MSB to 1 (ESC >) */ + dev->msb = 1; + break; + + case 0x3f: /* reassign bit-image mode (ESC ?) */ + if (dev->esc_parms[0] == 'K') + dev->density_k = dev->esc_parms[1]; + if (dev->esc_parms[0] == 'L') + dev->density_l = dev->esc_parms[1]; + if (dev->esc_parms[0] == 'Y') + dev->density_y = dev->esc_parms[1]; + if (dev->esc_parms[0] == 'Z') + dev->density_z = dev->esc_parms[1]; + break; + + case 0x40: /* initialize printer (ESC @) */ + reset_printer(dev); + break; + + case 0x41: /* set n/60-inch line spacing */ + case 0x841: + dev->linespacing = (double) dev->esc_parms[0] / 60.0; + break; + + case 0x43: /* set page length in lines (ESC C) */ + if (dev->esc_parms[0] != 0) { + dev->page_height = dev->bottom_margin = (double) dev->esc_parms[0] * dev->linespacing; + } else { /* == 0 => Set page length in inches */ + dev->esc_parms_req = 1; + dev->esc_parms_curr = 0; + dev->esc_pending = 0x100; /* dummy value for later */ + return 1; + } + break; + + case 0x45: /* select bold font (ESC E) */ + dev->font_style |= STYLE_BOLD; + update_font(dev); + break; + + case 0x46: /* cancel bold font (ESC F) */ + dev->font_style &= ~STYLE_BOLD; + update_font(dev); + break; + + case 0x47: /* select dobule-strike printing (ESC G) */ + dev->font_style |= STYLE_DOUBLESTRIKE; + break; + + case 0x48: /* cancel double-strike printing (ESC H) */ + dev->font_style &= ~STYLE_DOUBLESTRIKE; + break; + + case 0x4a: /* advance print pos vertically (ESC J n) */ + dev->curr_y += (double) ((double) dev->esc_parms[0] / 180.0); + if (dev->curr_y > dev->bottom_margin) + new_page(dev, 1, 0); + break; + + case 0x4b: /* select 60-dpi graphics (ESC K) */ + /* TODO: graphics stuff */ + setup_bit_image(dev, dev->density_k, PARAM16(0)); + break; + + case 0x4c: /* select 120-dpi graphics (ESC L) */ + /* TODO: graphics stuff */ + setup_bit_image(dev, dev->density_l, PARAM16(0)); + break; + + case 0x4d: /* select 10.5-point, 12-cpi (ESC M) */ + dev->cpi = 12.0; + dev->hmi = -1; + dev->multipoint_mode = 0; + update_font(dev); + break; + + case 0x4e: /* set bottom margin (ESC N) */ + dev->top_margin = 0.0; + dev->bottom_margin = (double) dev->esc_parms[0] * dev->linespacing; + break; + + case 0x4f: /* cancel bottom (and top) margin */ + dev->top_margin = 0.0; + dev->bottom_margin = dev->page_height; + break; + + case 0x50: /* select 10.5-point, 10-cpi (ESC P) */ + dev->cpi = 10.0; + dev->hmi = -1; + dev->multipoint_mode = 0; + update_font(dev); + break; + + case 0x51: /* set right margin */ + dev->right_margin = ((double) dev->esc_parms[0] - 1.0) / dev->cpi; + break; + + case 0x52: /* select an intl character set (ESC R) */ + if (dev->esc_parms[0] <= 13 || dev->esc_parms[0] == '@') { + if (dev->esc_parms[0] == '@') + dev->esc_parms[0] = 14; + + dev->curr_cpmap[0x23] = intCharSets[dev->esc_parms[0]][0]; + dev->curr_cpmap[0x24] = intCharSets[dev->esc_parms[0]][1]; + dev->curr_cpmap[0x40] = intCharSets[dev->esc_parms[0]][2]; + dev->curr_cpmap[0x5b] = intCharSets[dev->esc_parms[0]][3]; + dev->curr_cpmap[0x5c] = intCharSets[dev->esc_parms[0]][4]; + dev->curr_cpmap[0x5d] = intCharSets[dev->esc_parms[0]][5]; + dev->curr_cpmap[0x5e] = intCharSets[dev->esc_parms[0]][6]; + dev->curr_cpmap[0x60] = intCharSets[dev->esc_parms[0]][7]; + dev->curr_cpmap[0x7b] = intCharSets[dev->esc_parms[0]][8]; + dev->curr_cpmap[0x7c] = intCharSets[dev->esc_parms[0]][9]; + dev->curr_cpmap[0x7d] = intCharSets[dev->esc_parms[0]][10]; + dev->curr_cpmap[0x7e] = intCharSets[dev->esc_parms[0]][11]; + } + break; + + case 0x53: /* select superscript/subscript printing (ESC S) */ + if (dev->esc_parms[0] == 0 || dev->esc_parms[0] == '0') + dev->font_style |= STYLE_SUBSCRIPT; + if (dev->esc_parms[0] == 1 || dev->esc_parms[1] == '1') + dev->font_style |= STYLE_SUPERSCRIPT; + update_font(dev); + break; + + case 0x54: /* cancel superscript/subscript printing (ESC T) */ + dev->font_style &= 0xFFFF - STYLE_SUPERSCRIPT - STYLE_SUBSCRIPT; + update_font(dev); + break; + + case 0x55: /* turn unidirectional mode on/off (ESC U) */ + /* We don't have a print head, so just ignore this. */ + break; + + case 0x57: /* turn double-width printing on/off (ESC W) */ + if (!dev->multipoint_mode) { + dev->hmi = -1; + if (dev->esc_parms[0] == 0 || dev->esc_parms[0] == '0') + dev->font_style &= ~STYLE_DOUBLEWIDTH; + if (dev->esc_parms[0] == 1 || dev->esc_parms[0] == '1') + dev->font_style |= STYLE_DOUBLEWIDTH; + update_font(dev); + } + break; + + case 0x58: /* select font by pitch and point (ESC X) */ + dev->multipoint_mode = 1; + /* Copy currently non-multipoint CPI if no value was set so far. */ + if (dev->multipoint_cpi == 0.0) { + dev->multipoint_cpi = dev->cpi; + } + if (dev->esc_parms[0] > 0) { /* set CPI */ + if (dev->esc_parms[0] == 1) { + /* Proportional spacing. */ + dev->font_style |= STYLE_PROP; + } else if (dev->esc_parms[0] >= 5) + dev->multipoint_cpi = 360.0 / (double) dev->esc_parms[0]; + } + if (dev->multipoint_size == 0.0) + dev->multipoint_size = 10.5; + if (PARAM16(1) > 0) { + /* set points */ + dev->multipoint_size = ((double) PARAM16(1)) / 2.0; + } + update_font(dev); + break; + + case 0x59: /* select 120-dpi, double-speed graphics (ESC Y) */ + /* TODO: graphics stuff */ + setup_bit_image(dev, dev->density_y, PARAM16(0)); + break; + + case 0x5a: /* select 240-dpi graphics (ESC Z) */ + /* TODO: graphics stuff */ + setup_bit_image(dev, dev->density_z, PARAM16(0)); + break; + + case 0x5c: /* set relative horizontal print pos (ESC \) */ + rel_move = PARAM16(0); + unit_size = dev->defined_unit; + if (unit_size < 0) + unit_size = (dev->print_quality == QUALITY_DRAFT ? 120.0 : 180.0); + dev->curr_x += ((double) rel_move / unit_size); + break; + + case 0x61: /* select justification (ESC a) */ + /* Ignore. */ + break; + + case 0x63: /* set horizontal motion index (HMI) (ESC c) */ + dev->hmi = (double) PARAM16(0) / 360.0; + dev->extra_intra_space = 0.0; + break; + + case 0x67: /* select 10.5-point, 15-cpi (ESC g) */ + dev->cpi = 15; + dev->hmi = -1; + dev->multipoint_mode = 0; + update_font(dev); + break; + + case 0x846: // Select forward feed mode (FS F) - set reverse not implemented yet + if (dev->linespacing < 0) + dev->linespacing *= -1; + break; + + case 0x6a: // Reverse paper feed (ESC j) + reverse = (double) PARAM16(0) / (double) 216.0; + reverse = dev->curr_y - reverse; + if (reverse < dev->left_margin) + dev->curr_y = dev->left_margin; + else + dev->curr_y = reverse; + break; + + case 0x6b: /* select typeface (ESC k) */ + if (dev->esc_parms[0] <= 11 || dev->esc_parms[0] == 30 || dev->esc_parms[0] == 31) { + dev->lq_typeface = dev->esc_parms[0]; + } + update_font(dev); + break; + + case 0x6c: /* set left margin (ESC 1) */ + dev->left_margin = ((double) dev->esc_parms[0] - 1.0) / dev->cpi; + if (dev->curr_x < dev->left_margin) + dev->curr_x = dev->left_margin; + break; + + case 0x70: /* Turn proportional mode on/off (ESC p) */ + if (dev->esc_parms[0] == 0 || dev->esc_parms[0] == '0') + dev->font_style &= ~STYLE_PROP; + if (dev->esc_parms[0] == 1 || dev->esc_parms[0] == '1') { + dev->font_style |= STYLE_PROP; + dev->print_quality = QUALITY_LQ; + } + dev->multipoint_mode = 0; + dev->hmi = -1; + update_font(dev); + break; + + case 0x72: /* select printing color (ESC r) */ + if (dev->esc_parms[0] == 0 || dev->esc_parms[0] > 6) + dev->color = COLOR_BLACK; + else + dev->color = dev->esc_parms[0] << 5; + break; + + case 0x73: /* select low-speed mode (ESC s) */ + /* Ignore. */ + break; + + case 0x74: /* select character table (ESC t) */ + case 0x849: /* Select character table (FS I) */ + if (dev->esc_parms[0] < 4) { + dev->curr_char_table = dev->esc_parms[0]; + } else if ((dev->esc_parms[0] >= '0') && (dev->esc_parms[0] <= '3')) { + dev->curr_char_table = dev->esc_parms[0] - '0'; + } + init_codepage(dev, dev->char_tables[dev->curr_char_table]); + update_font(dev); + break; + + case 0x77: /* turn double-height printing on/off (ESC w) */ + if (!dev->multipoint_mode) { + if (dev->esc_parms[0] == 0 || dev->esc_parms[0] == '0') + dev->font_style &= ~STYLE_DOUBLEHEIGHT; + if (dev->esc_parms[0] == 1 || dev->esc_parms[0] == '1') + dev->font_style |= STYLE_DOUBLEHEIGHT; + update_font(dev); + } + break; + + case 0x78: /* select LQ or draft (ESC x) */ + if (dev->esc_parms[0] == 0 || dev->esc_parms[0] == '0') { + dev->print_quality = QUALITY_DRAFT; + dev->font_style |= STYLE_CONDENSED; + } + if (dev->esc_parms[0] == 1 || dev->esc_parms[0] == '1') { + dev->print_quality = QUALITY_LQ; + dev->font_style &= ~STYLE_CONDENSED; + } + dev->hmi = -1; + update_font(dev); + break; + + /* Our special command markers. */ + case 0x0100: /* set page length in inches (ESC C NUL) */ + dev->page_height = (double) dev->esc_parms[0]; + dev->bottom_margin = dev->page_height; + dev->top_margin = 0.0; + break; + + case 0x0101: /* skip unsupported ESC ( command */ + dev->esc_parms_req = PARAM16(0); + dev->esc_parms_curr = 0; + break; + + /* Extended ESC ( commands */ + case 0x0228: /* assign character table (ESC (t) */ + case 0x0274: + if (dev->esc_parms[2] < 4 && dev->esc_parms[3] < 16) { + dev->char_tables[dev->esc_parms[2]] = codepages[dev->esc_parms[3]]; + if (dev->esc_parms[2] == dev->curr_char_table) + init_codepage(dev, dev->char_tables[dev->curr_char_table]); + } + break; + + case 0x022d: /* select line/score (ESC (-) */ + dev->font_style &= ~(STYLE_UNDERLINE | STYLE_STRIKETHROUGH | STYLE_OVERSCORE); + dev->font_score = dev->esc_parms[4]; + if (dev->font_score) { + if (dev->esc_parms[3] == 1) + dev->font_style |= STYLE_UNDERLINE; + if (dev->esc_parms[3] == 2) + dev->font_style |= STYLE_STRIKETHROUGH; + if (dev->esc_parms[3] == 3) + dev->font_style |= STYLE_OVERSCORE; + } + update_font(dev); + break; + + case 0x0242: /* bar code setup and print (ESC (B) */ + // ERRLOG("ESC/P: Barcode printing not supported.\n"); + + /* Find out how many bytes to skip. */ + dev->esc_parms_req = PARAM16(0); + dev->esc_parms_curr = 0; + break; + + case 0x0243: /* set page length in defined unit (ESC (C) */ + if (dev->esc_parms[0] && (dev->defined_unit > 0)) { + dev->page_height = dev->bottom_margin = (double) PARAM16(2) * dev->defined_unit; + dev->top_margin = 0.0; + } + break; + + case 0x0255: /* set unit (ESC (U) */ + dev->defined_unit = 3600.0 / (double) dev->esc_parms[2]; + break; + + case 0x0256: /* set abse vertical print pos (ESC (V) */ + unit_size = dev->defined_unit; + if (unit_size < 0) + unit_size = 360.0; + new_y = dev->top_margin + (double) PARAM16(2) * unit_size; + if (new_y > dev->bottom_margin) + new_page(dev, 1, 0); + else + dev->curr_y = new_y; + break; + + case 0x025e: /* print data as characters (ESC (^) */ + dev->print_everything_count = PARAM16(0); + break; + + case 0x0263: /* set page format (ESC (c) */ + if (dev->defined_unit > 0.0) { + new_top = (double) PARAM16(2) * dev->defined_unit; + new_bottom = (double) PARAM16(4) * dev->defined_unit; + if (new_top >= new_bottom) + break; + if (new_top < dev->page_height) + dev->top_margin = new_top; + if (new_bottom < dev->page_height) + dev->bottom_margin = new_bottom; + if (dev->top_margin > dev->curr_y) + dev->curr_y = dev->top_margin; + } + break; + + case 0x0276: /* set relative vertical print pos (ESC (v) */ + { + unit_size = dev->defined_unit; + if (unit_size < 0.0) + unit_size = 360.0; + new_y = dev->curr_y + (double) ((int16_t) PARAM16(2)) * unit_size; + if (new_y > dev->top_margin) { + if (new_y > dev->bottom_margin) + new_page(dev, 1, 0); + else + dev->curr_y = new_y; + } + } + break; + + default: + break; + } + + dev->esc_pending = 0; + return 1; } escp_log("CH=%02x\n", ch); /* Now handle the "regular" control characters. */ switch (ch) { - case 0x00: - return 1; + case 0x00: + return 1; - case 0x07: /* Beeper (BEL) */ - /* TODO: beep? */ - return 1; + case 0x07: /* Beeper (BEL) */ + /* TODO: beep? */ + return 1; - case 0x08: /* Backspace (BS) */ - new_x = dev->curr_x - (1.0 / dev->actual_cpi); - if (dev->hmi > 0) - new_x = dev->curr_x - dev->hmi; - if (new_x >= dev->left_margin) - dev->curr_x = new_x; - return 1; + case 0x08: /* Backspace (BS) */ + new_x = dev->curr_x - (1.0 / dev->actual_cpi); + if (dev->hmi > 0) + new_x = dev->curr_x - dev->hmi; + if (new_x >= dev->left_margin) + dev->curr_x = new_x; + return 1; - case 0x09: /* Tab horizontally (HT) */ - /* Find tab right to current pos. */ - move_to = -1.0; - for (i = 0; i < dev->num_horizontal_tabs; i++) { - if (dev->horizontal_tabs[i] > dev->curr_x) - move_to = dev->horizontal_tabs[i]; - } + case 0x09: /* Tab horizontally (HT) */ + /* Find tab right to current pos. */ + move_to = -1.0; + for (i = 0; i < dev->num_horizontal_tabs; i++) { + if (dev->horizontal_tabs[i] > dev->curr_x) + move_to = dev->horizontal_tabs[i]; + } - /* Nothing found or out of page bounds => Ignore. */ - if (move_to > 0.0 && move_to < dev->right_margin) - dev->curr_x = move_to; + /* Nothing found or out of page bounds => Ignore. */ + if (move_to > 0.0 && move_to < dev->right_margin) + dev->curr_x = move_to; - return 1; + return 1; - case 0x0b: /* Tab vertically (VT) */ - if (dev->num_vertical_tabs == 0) { - /* All tabs cleared? => Act like CR */ - dev->curr_x = dev->left_margin; - } else if (dev->num_vertical_tabs < 0) { - /* No tabs set since reset => Act like LF */ - dev->curr_x = dev->left_margin; - dev->curr_y += dev->linespacing; - if (dev->curr_y > dev->bottom_margin) - new_page(dev, 1, 0); - } else { - /* Find tab below current pos. */ - move_to = -1; - for (i = 0; i < dev->num_vertical_tabs; i++) { - if (dev->vertical_tabs[i] > dev->curr_y) - move_to = dev->vertical_tabs[i]; - } + case 0x0b: /* Tab vertically (VT) */ + if (dev->num_vertical_tabs == 0) { + /* All tabs cleared? => Act like CR */ + dev->curr_x = dev->left_margin; + } else if (dev->num_vertical_tabs < 0) { + /* No tabs set since reset => Act like LF */ + dev->curr_x = dev->left_margin; + dev->curr_y += dev->linespacing; + if (dev->curr_y > dev->bottom_margin) + new_page(dev, 1, 0); + } else { + /* Find tab below current pos. */ + move_to = -1; + for (i = 0; i < dev->num_vertical_tabs; i++) { + if (dev->vertical_tabs[i] > dev->curr_y) + move_to = dev->vertical_tabs[i]; + } - /* Nothing found => Act like FF. */ - if (move_to > dev->bottom_margin || move_to < 0) - new_page(dev, 1, 0); - else - dev->curr_y = move_to; - } + /* Nothing found => Act like FF. */ + if (move_to > dev->bottom_margin || move_to < 0) + new_page(dev, 1, 0); + else + dev->curr_y = move_to; + } - if (dev->font_style & STYLE_DOUBLEWIDTHONELINE) { - dev->font_style &= 0xFFFF - STYLE_DOUBLEWIDTHONELINE; - update_font(dev); - } - return 1; + if (dev->font_style & STYLE_DOUBLEWIDTHONELINE) { + dev->font_style &= 0xFFFF - STYLE_DOUBLEWIDTHONELINE; + update_font(dev); + } + return 1; - case 0x0c: /* Form feed (FF) */ - if (dev->font_style & STYLE_DOUBLEWIDTHONELINE) { - dev->font_style &= ~STYLE_DOUBLEWIDTHONELINE; - update_font(dev); - } - new_page(dev, 1, 1); - return 1; + case 0x0c: /* Form feed (FF) */ + if (dev->font_style & STYLE_DOUBLEWIDTHONELINE) { + dev->font_style &= ~STYLE_DOUBLEWIDTHONELINE; + update_font(dev); + } + new_page(dev, 1, 1); + return 1; - case 0x0d: /* Carriage Return (CR) */ - dev->curr_x = dev->left_margin; - if (!dev->autofeed) - return 1; - /*FALLTHROUGH*/ + case 0x0d: /* Carriage Return (CR) */ + dev->curr_x = dev->left_margin; + if (!dev->autofeed) + return 1; + /*FALLTHROUGH*/ - case 0x0a: /* Line feed */ - if (dev->font_style & STYLE_DOUBLEWIDTHONELINE) { - dev->font_style &= ~STYLE_DOUBLEWIDTHONELINE; - update_font(dev); - } - dev->curr_x = dev->left_margin; - dev->curr_y += dev->linespacing; - if (dev->curr_y > dev->bottom_margin) - new_page(dev, 1, 0); - return 1; + case 0x0a: /* Line feed */ + if (dev->font_style & STYLE_DOUBLEWIDTHONELINE) { + dev->font_style &= ~STYLE_DOUBLEWIDTHONELINE; + update_font(dev); + } + dev->curr_x = dev->left_margin; + dev->curr_y += dev->linespacing; + if (dev->curr_y > dev->bottom_margin) + new_page(dev, 1, 0); + return 1; - case 0x0e: /* select Real64-width printing (one line) (SO) */ - if (! dev->multipoint_mode) { - dev->hmi = -1; - dev->font_style |= STYLE_DOUBLEWIDTHONELINE; - update_font(dev); - } - return 1; + case 0x0e: /* select Real64-width printing (one line) (SO) */ + if (!dev->multipoint_mode) { + dev->hmi = -1; + dev->font_style |= STYLE_DOUBLEWIDTHONELINE; + update_font(dev); + } + return 1; - case 0x0f: /* select condensed printing (SI) */ - if (! dev->multipoint_mode) { - dev->hmi = -1; - dev->font_style |= STYLE_CONDENSED; - update_font(dev); - } - return 1; + case 0x0f: /* select condensed printing (SI) */ + if (!dev->multipoint_mode) { + dev->hmi = -1; + dev->font_style |= STYLE_CONDENSED; + update_font(dev); + } + return 1; - case 0x11: /* select printer (DC1) */ - /* Ignore. */ - return 0; + case 0x11: /* select printer (DC1) */ + /* Ignore. */ + return 0; - case 0x12: /* cancel condensed printing (DC2) */ - dev->hmi = -1; - dev->font_style &= ~STYLE_CONDENSED; - update_font(dev); - return 1; + case 0x12: /* cancel condensed printing (DC2) */ + dev->hmi = -1; + dev->font_style &= ~STYLE_CONDENSED; + update_font(dev); + return 1; - case 0x13: /* deselect printer (DC3) */ - /* Ignore. */ - return 1; + case 0x13: /* deselect printer (DC3) */ + /* Ignore. */ + return 1; - case 0x14: /* cancel double-width printing (one line) (DC4) */ - dev->hmi = -1; - dev->font_style &= ~STYLE_DOUBLEWIDTHONELINE; - update_font(dev); - return 1; + case 0x14: /* cancel double-width printing (one line) (DC4) */ + dev->hmi = -1; + dev->font_style &= ~STYLE_DOUBLEWIDTHONELINE; + update_font(dev); + return 1; - case 0x18: /* cancel line (CAN) */ - return 1; + case 0x18: /* cancel line (CAN) */ + return 1; - case 0x1b: /* ESC */ - dev->esc_seen = 1; - return 1; + case 0x1b: /* ESC */ + dev->esc_seen = 1; + return 1; - case 0x1c: /* FS (IBM commands) */ - dev->fss_seen = 1; - return 1; + case 0x1c: /* FS (IBM commands) */ + dev->fss_seen = 1; + return 1; - default: - return 0; + default: + return 0; } /* This is a printable character -> print it. */ return 0; } - static void handle_char(escp_t *dev, uint8_t ch) { - FT_UInt char_index; + FT_UInt char_index; uint16_t pen_x, pen_y; uint16_t line_start, line_y; - double x_advance; + double x_advance; if (dev->page == NULL) - return; + return; /* MSB mode */ if (dev->msb != 255) { @@ -1617,43 +1589,43 @@ handle_char(escp_t *dev, uint8_t ch) } if (dev->bg_remaining_bytes > 0) { - print_bit_graph(dev, ch); - return; + print_bit_graph(dev, ch); + return; } /* "print everything" mode? aka. ESC ( ^ */ if (dev->print_everything_count > 0) { - escp_log("Print everything count=%d\n", dev->print_everything_count); - /* do not process command char, just continue */ - dev->print_everything_count--; + escp_log("Print everything count=%d\n", dev->print_everything_count); + /* do not process command char, just continue */ + dev->print_everything_count--; } else if (process_char(dev, ch)) { - /* command was processed */ - return; + /* command was processed */ + return; } /* We cannot print if we have no font loaded. */ if (dev->fontface == NULL) - return; + return; if (ch == 0x01) - ch = 0x20; + ch = 0x20; /* ok, so we need to print the character now */ if (ft_lib) { - char_index = ft_Get_Char_Index(dev->fontface, dev->curr_cpmap[ch]); - ft_Load_Glyph(dev->fontface, char_index, FT_LOAD_DEFAULT); - ft_Render_Glyph(dev->fontface->glyph, FT_RENDER_MODE_NORMAL); + char_index = ft_Get_Char_Index(dev->fontface, dev->curr_cpmap[ch]); + ft_Load_Glyph(dev->fontface, char_index, FT_LOAD_DEFAULT); + ft_Render_Glyph(dev->fontface->glyph, FT_RENDER_MODE_NORMAL); } pen_x = PIXX + dev->fontface->glyph->bitmap_left; - pen_y = (uint16_t)(PIXY - dev->fontface->glyph->bitmap_top + dev->fontface->size->metrics.ascender / 64); + pen_y = (uint16_t) (PIXY - dev->fontface->glyph->bitmap_top + dev->fontface->size->metrics.ascender / 64); if (dev->font_style & STYLE_SUBSCRIPT) - pen_y += dev->fontface->glyph->bitmap.rows / 2; + pen_y += dev->fontface->glyph->bitmap.rows / 2; /* mark the page as dirty if anything is drawn */ if ((ch != 0x20) || (dev->font_score != SCORE_NONE)) - dev->page->dirty = 1; + dev->page->dirty = 1; /* draw the glyph */ blit_glyph(dev, pen_x, pen_y, 0); @@ -1661,26 +1633,26 @@ handle_char(escp_t *dev, uint8_t ch) /* doublestrike -> draw glyph a second time, 1px below */ if (dev->font_style & STYLE_DOUBLESTRIKE) { - blit_glyph(dev, pen_x, pen_y + 1, 1); - blit_glyph(dev, pen_x + 1, pen_y + 1, 1); + blit_glyph(dev, pen_x, pen_y + 1, 1); + blit_glyph(dev, pen_x + 1, pen_y + 1, 1); } /* bold -> draw glyph a second time, 1px to the right */ if (dev->font_style & STYLE_BOLD) { - blit_glyph(dev, pen_x + 1, pen_y, 1); - blit_glyph(dev, pen_x + 2, pen_y, 1); - blit_glyph(dev, pen_x + 3, pen_y, 1); + blit_glyph(dev, pen_x + 1, pen_y, 1); + blit_glyph(dev, pen_x + 2, pen_y, 1); + blit_glyph(dev, pen_x + 3, pen_y, 1); } line_start = PIXX; if (dev->font_style & STYLE_PROP) - x_advance = dev->fontface->glyph->advance.x / (dev->dpi * 64.0); + x_advance = dev->fontface->glyph->advance.x / (dev->dpi * 64.0); else { - if (dev->hmi < 0) - x_advance = 1.0 / dev->actual_cpi; - else - x_advance = dev->hmi; + if (dev->hmi < 0) + x_advance = 1.0 / dev->actual_cpi; + else + x_advance = dev->hmi; } x_advance += dev->extra_intra_space; @@ -1688,66 +1660,64 @@ handle_char(escp_t *dev, uint8_t ch) /* Line printing (underline etc.) */ if (dev->font_score != SCORE_NONE && (dev->font_style & (STYLE_UNDERLINE | STYLE_STRIKETHROUGH | STYLE_OVERSCORE))) { - /* Find out where to put the line. */ - line_y = PIXY; + /* Find out where to put the line. */ + line_y = PIXY; - if (dev->font_style & STYLE_UNDERLINE) - line_y = (PIXY + (uint16_t)(dev->fontface->size->metrics.height * 0.9)); - if (dev->font_style & STYLE_STRIKETHROUGH) - line_y = (PIXY + (uint16_t)(dev->fontface->size->metrics.height * 0.45)); - if (dev->font_style & STYLE_OVERSCORE) - line_y = PIXY - ((dev->font_score == SCORE_DOUBLE || dev->font_score == SCORE_DOUBLEBROKEN) ? 5 : 0); + if (dev->font_style & STYLE_UNDERLINE) + line_y = (PIXY + (uint16_t) (dev->fontface->size->metrics.height * 0.9)); + if (dev->font_style & STYLE_STRIKETHROUGH) + line_y = (PIXY + (uint16_t) (dev->fontface->size->metrics.height * 0.45)); + if (dev->font_style & STYLE_OVERSCORE) + line_y = PIXY - ((dev->font_score == SCORE_DOUBLE || dev->font_score == SCORE_DOUBLEBROKEN) ? 5 : 0); - draw_hline(dev, pen_x, PIXX, line_y, dev->font_score == SCORE_SINGLEBROKEN || dev->font_score == SCORE_DOUBLEBROKEN); + draw_hline(dev, pen_x, PIXX, line_y, dev->font_score == SCORE_SINGLEBROKEN || dev->font_score == SCORE_DOUBLEBROKEN); - if (dev->font_score == SCORE_DOUBLE || dev->font_score == SCORE_DOUBLEBROKEN) - draw_hline(dev, line_start, PIXX, line_y + 5, dev->font_score == SCORE_SINGLEBROKEN || dev->font_score == SCORE_DOUBLEBROKEN); + if (dev->font_score == SCORE_DOUBLE || dev->font_score == SCORE_DOUBLEBROKEN) + draw_hline(dev, line_start, PIXX, line_y + 5, dev->font_score == SCORE_SINGLEBROKEN || dev->font_score == SCORE_DOUBLEBROKEN); } if ((dev->curr_x + x_advance) > dev->right_margin) { - dev->curr_x = dev->left_margin; - dev->curr_y += dev->linespacing; - if (dev->curr_y > dev->bottom_margin) - new_page(dev, 1, 0); + dev->curr_x = dev->left_margin; + dev->curr_y += dev->linespacing; + if (dev->curr_y > dev->bottom_margin) + new_page(dev, 1, 0); } } - /* TODO: This can be optimized quite a bit... I'm just too lazy right now ;-) */ static void blit_glyph(escp_t *dev, unsigned destx, unsigned desty, int8_t add) { FT_Bitmap *bitmap = &dev->fontface->glyph->bitmap; - unsigned x, y; - uint8_t src, *dst; + unsigned x, y; + uint8_t src, *dst; /* check if freetype is available */ if (ft_lib == NULL) - return; + return; for (y = 0; y < bitmap->rows; y++) { - for (x = 0; x < bitmap->width; x++) { - src = *(bitmap->buffer + x + y * bitmap->pitch); - /* ignore background, and respect page size */ - if (src > 0 && (destx + x < (unsigned)dev->page->w) && (desty + y < (unsigned)dev->page->h)) { - dst = (uint8_t *)dev->page->pixels + (x + destx) + (y + desty) * dev->page->pitch; - src >>= 3; + for (x = 0; x < bitmap->width; x++) { + src = *(bitmap->buffer + x + y * bitmap->pitch); + /* ignore background, and respect page size */ + if (src > 0 && (destx + x < (unsigned) dev->page->w) && (desty + y < (unsigned) dev->page->h)) { + dst = (uint8_t *) dev->page->pixels + (x + destx) + (y + desty) * dev->page->pitch; + src >>= 3; - if (add) { - if (((*dst) & 0x1f) + src > 31) - *dst |= (dev->color | 0x1f); - else { - *dst += src; - *dst |= dev->color; - } - } else - *dst = src|dev->color; - } - } + if (add) { + if (((*dst) & 0x1f) + src > 31) + *dst |= (dev->color | 0x1f); + else { + *dst += src; + *dst |= dev->color; + } + } else + *dst = src | dev->color; + } + } } } - /* Draw anti-aliased line. */ static void draw_hline(escp_t *dev, unsigned from_x, unsigned to_x, unsigned y, int8_t broken) @@ -1757,146 +1727,144 @@ draw_hline(escp_t *dev, unsigned from_x, unsigned to_x, unsigned y, int8_t broke unsigned x; for (x = from_x; x <= to_x; x++) { - /* Skip parts if broken line or going over the border. */ - if ((!broken || (x % breakmod <= gapstart)) && (x < dev->page->w)) { - if (y > 0 && (y - 1) < dev->page->h) - *((uint8_t*)dev->page->pixels + x + (y - 1) * (unsigned)dev->page->pitch) = 240; - if (y < dev->page->h) - *((uint8_t*)dev->page->pixels + x + y * (unsigned)dev->page->pitch) = !broken ? 255 : 240; - if (y + 1 < dev->page->h) - *((uint8_t*)dev->page->pixels + x + (y + 1) * (unsigned)dev->page->pitch) = 240; - } + /* Skip parts if broken line or going over the border. */ + if ((!broken || (x % breakmod <= gapstart)) && (x < dev->page->w)) { + if (y > 0 && (y - 1) < dev->page->h) + *((uint8_t *) dev->page->pixels + x + (y - 1) * (unsigned) dev->page->pitch) = 240; + if (y < dev->page->h) + *((uint8_t *) dev->page->pixels + x + y * (unsigned) dev->page->pitch) = !broken ? 255 : 240; + if (y + 1 < dev->page->h) + *((uint8_t *) dev->page->pixels + x + (y + 1) * (unsigned) dev->page->pitch) = 240; + } } } - static void setup_bit_image(escp_t *dev, uint8_t density, uint16_t num_columns) { escp_log("Density=%d\n", density); switch (density) { - case 0: - dev->bg_h_density = 60; - dev->bg_v_density = 60; - dev->bg_adjacent = 1; - dev->bg_bytes_per_column = 1; - break; + case 0: + dev->bg_h_density = 60; + dev->bg_v_density = 60; + dev->bg_adjacent = 1; + dev->bg_bytes_per_column = 1; + break; - case 1: - dev->bg_h_density = 120; - dev->bg_v_density = 60; - dev->bg_adjacent = 1; - dev->bg_bytes_per_column = 1; - break; + case 1: + dev->bg_h_density = 120; + dev->bg_v_density = 60; + dev->bg_adjacent = 1; + dev->bg_bytes_per_column = 1; + break; - case 2: - dev->bg_h_density = 120; - dev->bg_v_density = 60; - dev->bg_adjacent = 0; - dev->bg_bytes_per_column = 1; - break; + case 2: + dev->bg_h_density = 120; + dev->bg_v_density = 60; + dev->bg_adjacent = 0; + dev->bg_bytes_per_column = 1; + break; - case 3: - dev->bg_h_density = 60; - dev->bg_v_density = 240; - dev->bg_adjacent = 0; - dev->bg_bytes_per_column = 1; - break; + case 3: + dev->bg_h_density = 60; + dev->bg_v_density = 240; + dev->bg_adjacent = 0; + dev->bg_bytes_per_column = 1; + break; - case 4: - dev->bg_h_density = 80; - dev->bg_v_density = 60; - dev->bg_adjacent = 1; - dev->bg_bytes_per_column = 1; - break; + case 4: + dev->bg_h_density = 80; + dev->bg_v_density = 60; + dev->bg_adjacent = 1; + dev->bg_bytes_per_column = 1; + break; - case 6: - dev->bg_h_density = 90; - dev->bg_v_density = 60; - dev->bg_adjacent = 1; - dev->bg_bytes_per_column = 1; - break; + case 6: + dev->bg_h_density = 90; + dev->bg_v_density = 60; + dev->bg_adjacent = 1; + dev->bg_bytes_per_column = 1; + break; - case 32: - dev->bg_h_density = 60; - dev->bg_v_density = 180; - dev->bg_adjacent = 1; - dev->bg_bytes_per_column = 3; - break; + case 32: + dev->bg_h_density = 60; + dev->bg_v_density = 180; + dev->bg_adjacent = 1; + dev->bg_bytes_per_column = 3; + break; - case 33: - dev->bg_h_density = 120; - dev->bg_v_density = 180; - dev->bg_adjacent = 1; - dev->bg_bytes_per_column = 3; - break; + case 33: + dev->bg_h_density = 120; + dev->bg_v_density = 180; + dev->bg_adjacent = 1; + dev->bg_bytes_per_column = 3; + break; - case 38: - dev->bg_h_density = 90; - dev->bg_v_density = 180; - dev->bg_adjacent = 1; - dev->bg_bytes_per_column = 3; - break; + case 38: + dev->bg_h_density = 90; + dev->bg_v_density = 180; + dev->bg_adjacent = 1; + dev->bg_bytes_per_column = 3; + break; - case 39: - dev->bg_h_density = 180; - dev->bg_v_density = 180; - dev->bg_adjacent = 1; - dev->bg_bytes_per_column = 3; - break; + case 39: + dev->bg_h_density = 180; + dev->bg_v_density = 180; + dev->bg_adjacent = 1; + dev->bg_bytes_per_column = 3; + break; - case 40: - dev->bg_h_density = 360; - dev->bg_v_density = 180; - dev->bg_adjacent = 0; - dev->bg_bytes_per_column = 3; - break; + case 40: + dev->bg_h_density = 360; + dev->bg_v_density = 180; + dev->bg_adjacent = 0; + dev->bg_bytes_per_column = 3; + break; - case 71: - dev->bg_h_density = 180; - dev->bg_v_density = 360; - dev->bg_adjacent = 1; - dev->bg_bytes_per_column = 6; - break; + case 71: + dev->bg_h_density = 180; + dev->bg_v_density = 360; + dev->bg_adjacent = 1; + dev->bg_bytes_per_column = 6; + break; - case 72: - dev->bg_h_density = 360; - dev->bg_v_density = 360; - dev->bg_adjacent = 0; - dev->bg_bytes_per_column = 6; - break; + case 72: + dev->bg_h_density = 360; + dev->bg_v_density = 360; + dev->bg_adjacent = 0; + dev->bg_bytes_per_column = 6; + break; - case 73: - dev->bg_h_density = 360; - dev->bg_v_density = 360; - dev->bg_adjacent = 1; - dev->bg_bytes_per_column = 6; - break; + case 73: + dev->bg_h_density = 360; + dev->bg_v_density = 360; + dev->bg_adjacent = 1; + dev->bg_bytes_per_column = 6; + break; - default: - escp_log("ESC/P: Unsupported bit image density %d.\n", density); - break; + default: + escp_log("ESC/P: Unsupported bit image density %d.\n", density); + break; } dev->bg_remaining_bytes = num_columns * dev->bg_bytes_per_column; - dev->bg_bytes_read = 0; + dev->bg_bytes_read = 0; } - static void print_bit_graph(escp_t *dev, uint8_t ch) { - uint8_t pixel_w; /* width of the "pixel" */ - uint8_t pixel_h; /* height of the "pixel" */ + uint8_t pixel_w; /* width of the "pixel" */ + uint8_t pixel_h; /* height of the "pixel" */ unsigned i, j, xx, yy; - double old_y; + double old_y; dev->bg_column[dev->bg_bytes_read++] = ch; dev->bg_remaining_bytes--; /* Only print after reading a full column. */ if (dev->bg_bytes_read < dev->bg_bytes_per_column) - return; + return; old_y = dev->curr_y; @@ -1904,27 +1872,27 @@ print_bit_graph(escp_t *dev, uint8_t ch) pixel_h = 1; if (dev->bg_adjacent) { - /* if page DPI is bigger than bitgraphics DPI, drawn pixels get "bigger" */ - pixel_w = dev->dpi / dev->bg_h_density > 0 ? dev->dpi / dev->bg_h_density : 1; - pixel_h = dev->dpi / dev->bg_v_density > 0 ? dev->dpi / dev->bg_v_density : 1; + /* if page DPI is bigger than bitgraphics DPI, drawn pixels get "bigger" */ + pixel_w = dev->dpi / dev->bg_h_density > 0 ? dev->dpi / dev->bg_h_density : 1; + pixel_h = dev->dpi / dev->bg_v_density > 0 ? dev->dpi / dev->bg_v_density : 1; } for (i = 0; i < dev->bg_bytes_per_column; i++) { - /* for each byte */ - for (j = 128; j != 0; j >>= 1) { - /* for each bit */ - if (dev->bg_column[i] & j) { - /* draw a "pixel" */ - for (xx = 0; xx < pixel_w; xx++) { - for (yy = 0; yy < pixel_h; yy++) { - if (((PIXX + xx) < (unsigned)dev->page->w) && ((PIXY + yy) < (unsigned)dev->page->h)) - *((uint8_t *)dev->page->pixels + (PIXX + xx) + (PIXY + yy)*dev->page->pitch) |= (dev->color | 0x1f); - } - } - } + /* for each byte */ + for (j = 128; j != 0; j >>= 1) { + /* for each bit */ + if (dev->bg_column[i] & j) { + /* draw a "pixel" */ + for (xx = 0; xx < pixel_w; xx++) { + for (yy = 0; yy < pixel_h; yy++) { + if (((PIXX + xx) < (unsigned) dev->page->w) && ((PIXY + yy) < (unsigned) dev->page->h)) + *((uint8_t *) dev->page->pixels + (PIXX + xx) + (PIXY + yy) * dev->page->pitch) |= (dev->color | 0x1f); + } + } + } - dev->curr_y += 1.0 / (double)dev->bg_v_density; - } + dev->curr_y += 1.0 / (double) dev->bg_v_density; + } } /* Mark page dirty. */ @@ -1939,50 +1907,48 @@ print_bit_graph(escp_t *dev, uint8_t ch) dev->curr_x += 1.0 / dev->bg_h_density; } - static void write_data(uint8_t val, void *priv) { - escp_t *dev = (escp_t *)priv; + escp_t *dev = (escp_t *) priv; if (dev == NULL) - return; + return; dev->data = val; } - static void write_ctrl(uint8_t val, void *priv) { - escp_t *dev = (escp_t *)priv; + escp_t *dev = (escp_t *) priv; if (dev == NULL) - return; + return; - if (val & 0x08) { /* SELECT */ - /* select printer */ - dev->select = 1; + if (val & 0x08) { /* SELECT */ + /* select printer */ + dev->select = 1; } if ((val & 0x04) && !(dev->ctrl & 0x04)) { - /* reset printer */ - dev->select = 0; + /* reset printer */ + dev->select = 0; - reset_printer_hard(dev); + reset_printer_hard(dev); } /* Data is strobed to the parallel printer on the falling edge of the strobe bit. */ if (!(val & 0x01) && (dev->ctrl & 0x01)) { - /* Process incoming character. */ - handle_char(dev, dev->data); + /* Process incoming character. */ + handle_char(dev, dev->data); - /* ACK it, will be read on next READ STATUS. */ - dev->ack = 1; - timer_set_delay_u64(&dev->pulse_timer, ISACONST); + /* ACK it, will be read on next READ STATUS. */ + dev->ack = 1; + timer_set_delay_u64(&dev->pulse_timer, ISACONST); - timer_set_delay_u64(&dev->timeout_timer, 5000000 * TIMER_USEC); + timer_set_delay_u64(&dev->timeout_timer, 5000000 * TIMER_USEC); } dev->ctrl = val; @@ -1990,76 +1956,72 @@ write_ctrl(uint8_t val, void *priv) dev->autofeed = ((val & 0x02) > 0); } - static uint8_t read_data(void *priv) { - escp_t *dev = (escp_t *)priv; + escp_t *dev = (escp_t *) priv; return dev->data; } - static uint8_t read_ctrl(void *priv) { - escp_t *dev = (escp_t *)priv; + escp_t *dev = (escp_t *) priv; return 0xe0 | (dev->autofeed ? 0x02 : 0x00) | (dev->ctrl & 0xfd); } - static uint8_t read_status(void *priv) { - escp_t *dev = (escp_t *)priv; + escp_t *dev = (escp_t *) priv; uint8_t ret = 0x1f; ret |= 0x80; if (!dev->ack) - ret |= 0x40; + ret |= 0x40; - return(ret); + return (ret); } - static void * escp_init(void *lpt) { const char *fn = PATH_FREETYPE_DLL; - escp_t *dev; - int i; + escp_t *dev; + int i; /* Dynamically load FreeType. */ if (ft_handle == NULL) { - ft_handle = dynld_module(fn, ft_imports); - if (ft_handle == NULL) { - ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2110, (wchar_t *) IDS_2131); - return(NULL); - } + ft_handle = dynld_module(fn, ft_imports); + if (ft_handle == NULL) { + ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2110, (wchar_t *) IDS_2131); + return (NULL); + } } /* Initialize FreeType. */ if (ft_lib == NULL) { - if (ft_Init_FreeType(&ft_lib)) { - ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2110, (wchar_t *) IDS_2131); - dynld_close(ft_lib); - ft_lib = NULL; - return(NULL); - } + if (ft_Init_FreeType(&ft_lib)) { + ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2110, (wchar_t *) IDS_2131); + dynld_close(ft_lib); + ft_lib = NULL; + return (NULL); + } } /* Initialize a device instance. */ - dev = (escp_t *)malloc(sizeof(escp_t)); + dev = (escp_t *) malloc(sizeof(escp_t)); memset(dev, 0x00, sizeof(escp_t)); dev->ctrl = 0x04; - dev->lpt = lpt; + dev->lpt = lpt; /* Create a full pathname for the font files. */ - if(strlen(exe_path) >= sizeof(dev->fontpath)) { - free(dev); - return(NULL); + if (strlen(exe_path) >= sizeof(dev->fontpath)) { + free(dev); + return (NULL); } strcpy(dev->fontpath, exe_path); @@ -2068,91 +2030,90 @@ escp_init(void *lpt) /* Create the full path for the page images. */ path_append_filename(dev->pagepath, usr_path, "printer"); - if (! plat_dir_check(dev->pagepath)) + if (!plat_dir_check(dev->pagepath)) plat_dir_create(dev->pagepath); path_slash(dev->pagepath); - dev->page_width = PAGE_WIDTH; + dev->page_width = PAGE_WIDTH; dev->page_height = PAGE_HEIGHT; - dev->dpi = PAGE_DPI; + dev->dpi = PAGE_DPI; /* Create 8-bit grayscale buffer for the page. */ - dev->page = (psurface_t *)malloc(sizeof(psurface_t)); - dev->page->w = (int)(dev->dpi * dev->page_width); - dev->page->h = (int)(dev->dpi * dev->page_height); - dev->page->pitch = dev->page->w; - dev->page->pixels = (uint8_t *)malloc(dev->page->pitch * dev->page->h); + dev->page = (psurface_t *) malloc(sizeof(psurface_t)); + dev->page->w = (int) (dev->dpi * dev->page_width); + dev->page->h = (int) (dev->dpi * dev->page_height); + dev->page->pitch = dev->page->w; + dev->page->pixels = (uint8_t *) malloc(dev->page->pitch * dev->page->h); memset(dev->page->pixels, 0x00, dev->page->pitch * dev->page->h); /* Initialize parameters. */ for (i = 0; i < 32; i++) { - dev->palcol[i].r = 255; - dev->palcol[i].g = 255; - dev->palcol[i].b = 255; + dev->palcol[i].r = 255; + dev->palcol[i].g = 255; + dev->palcol[i].b = 255; } /* 0 = all white needed for logic 000 */ - fill_palette( 0, 0, 0, 1, dev); + fill_palette(0, 0, 0, 1, dev); /* 1 = magenta* 001 */ - fill_palette( 0, 255, 0, 1, dev); + fill_palette(0, 255, 0, 1, dev); /* 2 = cyan* 010 */ - fill_palette(255, 0, 0, 2, dev); + fill_palette(255, 0, 0, 2, dev); /* 3 = "violet" 011 */ - fill_palette(255, 255, 0, 3, dev); + fill_palette(255, 255, 0, 3, dev); /* 4 = yellow* 100 */ - fill_palette( 0, 0, 255, 4, dev); + fill_palette(0, 0, 255, 4, dev); /* 5 = red 101 */ - fill_palette( 0, 255, 255, 5, dev); + fill_palette(0, 255, 255, 5, dev); /* 6 = green 110 */ - fill_palette(255, 0, 255, 6, dev); + fill_palette(255, 0, 255, 6, dev); /* 7 = black 111 */ fill_palette(255, 255, 255, 7, dev); - dev->color = COLOR_BLACK; + dev->color = COLOR_BLACK; dev->fontface = 0; dev->autofeed = 0; reset_printer(dev); escp_log("ESC/P: created a virtual page of dimensions %d x %d pixels.\n", - dev->page->w, dev->page->h); + dev->page->w, dev->page->h); timer_add(&dev->pulse_timer, pulse_timer, dev, 0); timer_add(&dev->timeout_timer, timeout_timer, dev, 0); - return(dev); + return (dev); } - static void escp_close(void *priv) { - escp_t *dev = (escp_t *)priv; + escp_t *dev = (escp_t *) priv; - if (dev == NULL) return; + if (dev == NULL) + return; if (dev->page != NULL) { - /* Print last page if it contains data. */ - if (dev->page->dirty) - dump_page(dev); + /* Print last page if it contains data. */ + if (dev->page->dirty) + dump_page(dev); - if (dev->page->pixels != NULL) - free(dev->page->pixels); - free(dev->page); + if (dev->page->pixels != NULL) + free(dev->page->pixels); + free(dev->page); } free(dev); } - const lpt_device_t lpt_prt_escp_device = { - .name = "Generic ESC/P Dot-Matrix", + .name = "Generic ESC/P Dot-Matrix", .internal_name = "dot_matrix", - .init = escp_init, - .close = escp_close, - .write_data = write_data, - .write_ctrl = write_ctrl, - .read_data = read_data, - .read_status = read_status, - .read_ctrl = read_ctrl + .init = escp_init, + .close = escp_close, + .write_data = write_data, + .write_ctrl = write_ctrl, + .read_data = read_data, + .read_status = read_status, + .read_ctrl = read_ctrl }; diff --git a/src/printer/prt_ps.c b/src/printer/prt_ps.c index 231707897..760bc5e17 100644 --- a/src/printer/prt_ps.c +++ b/src/printer/prt_ps.c @@ -33,75 +33,71 @@ #include <86box/ui.h> #include <86box/prt_devs.h> - #ifdef _WIN32 -# define GSDLLAPI __stdcall +# define GSDLLAPI __stdcall #else -# define GSDLLAPI +# define GSDLLAPI #endif - -#define GS_ARG_ENCODING_UTF8 1 -#define gs_error_Quit -101 +#define GS_ARG_ENCODING_UTF8 1 +#define gs_error_Quit -101 #ifdef _WIN32 -#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)) -# define PATH_GHOSTSCRIPT_DLL "gsdll32.dll" -#else -# define PATH_GHOSTSCRIPT_DLL "gsdll64.dll" -#endif +# if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)) +# define PATH_GHOSTSCRIPT_DLL "gsdll32.dll" +# else +# define PATH_GHOSTSCRIPT_DLL "gsdll64.dll" +# endif #elif defined __APPLE__ -#define PATH_GHOSTSCRIPT_DLL "libgs.dylib" +# define PATH_GHOSTSCRIPT_DLL "libgs.dylib" #else -#define PATH_GHOSTSCRIPT_DLL "libgs.so.9" +# define PATH_GHOSTSCRIPT_DLL "libgs.so.9" #endif -#define POSTSCRIPT_BUFFER_LENGTH 65536 - +#define POSTSCRIPT_BUFFER_LENGTH 65536 typedef struct { - const char *name; + const char *name; - void *lpt; + void *lpt; - pc_timer_t pulse_timer; - pc_timer_t timeout_timer; + pc_timer_t pulse_timer; + pc_timer_t timeout_timer; - char data; - bool ack; - bool select; - bool busy; - bool int_pending; - bool error; - bool autofeed; - uint8_t ctrl; + char data; + bool ack; + bool select; + bool busy; + bool int_pending; + bool error; + bool autofeed; + uint8_t ctrl; - char printer_path[260]; + char printer_path[260]; - char filename[260]; + char filename[260]; - char buffer[POSTSCRIPT_BUFFER_LENGTH]; - size_t buffer_pos; + char buffer[POSTSCRIPT_BUFFER_LENGTH]; + size_t buffer_pos; } ps_t; typedef struct gsapi_revision_s { const char *product; const char *copyright; - long revision; - long revisiondate; + long revision; + long revisiondate; } gsapi_revision_t; - -static int (GSDLLAPI *gsapi_revision)(gsapi_revision_t *pr, int len); -static int (GSDLLAPI *gsapi_new_instance)(void **pinstance, void *caller_handle); -static void (GSDLLAPI *gsapi_delete_instance)(void *instance); -static int (GSDLLAPI *gsapi_set_arg_encoding)(void *instance, int encoding); -static int (GSDLLAPI *gsapi_init_with_args)(void *instance, int argc, char **argv); -static int (GSDLLAPI *gsapi_exit)(void *instance); +static int(GSDLLAPI *gsapi_revision)(gsapi_revision_t *pr, int len); +static int(GSDLLAPI *gsapi_new_instance)(void **pinstance, void *caller_handle); +static void(GSDLLAPI *gsapi_delete_instance)(void *instance); +static int(GSDLLAPI *gsapi_set_arg_encoding)(void *instance, int encoding); +static int(GSDLLAPI *gsapi_init_with_args)(void *instance, int argc, char **argv); +static int(GSDLLAPI *gsapi_exit)(void *instance); static dllimp_t ghostscript_imports[] = { -// clang-format off + // clang-format off { "gsapi_revision", &gsapi_revision }, { "gsapi_new_instance", &gsapi_new_instance }, { "gsapi_delete_instance", &gsapi_delete_instance }, @@ -109,48 +105,45 @@ static dllimp_t ghostscript_imports[] = { { "gsapi_init_with_args", &gsapi_init_with_args }, { "gsapi_exit", &gsapi_exit }, { NULL, NULL } -// clang-format on + // clang-format on }; -static void *ghostscript_handle = NULL; - +static void *ghostscript_handle = NULL; static void reset_ps(ps_t *dev) { if (dev == NULL) - return; + return; dev->ack = false; - dev->buffer[0] = 0; + dev->buffer[0] = 0; dev->buffer_pos = 0; timer_disable(&dev->pulse_timer); timer_disable(&dev->timeout_timer); } - static void pulse_timer(void *priv) { ps_t *dev = (ps_t *) priv; if (dev->ack) { - dev->ack = 0; - lpt_irq(dev->lpt, 1); + dev->ack = 0; + lpt_irq(dev->lpt, 1); } timer_disable(&dev->pulse_timer); } - static int convert_to_pdf(ps_t *dev) { volatile int code; - void *instance = NULL; - char input_fn[1024], output_fn[1024], *gsargv[9]; + void *instance = NULL; + char input_fn[1024], output_fn[1024], *gsargv[9]; strcpy(input_fn, dev->printer_path); path_slash(input_fn); @@ -171,40 +164,39 @@ convert_to_pdf(ps_t *dev) code = gsapi_new_instance(&instance, dev); if (code < 0) - return code; + return code; code = gsapi_set_arg_encoding(instance, GS_ARG_ENCODING_UTF8); if (code == 0) - code = gsapi_init_with_args(instance, 9, gsargv); + code = gsapi_init_with_args(instance, 9, gsargv); if (code == 0 || code == gs_error_Quit) - code = gsapi_exit(instance); + code = gsapi_exit(instance); else - gsapi_exit(instance); + gsapi_exit(instance); gsapi_delete_instance(instance); if (code == 0) - plat_remove(input_fn); + plat_remove(input_fn); else - plat_remove(output_fn); + plat_remove(output_fn); return code; } - static void write_buffer(ps_t *dev, bool finish) { - char path[1024]; + char path[1024]; FILE *fp; if (dev->buffer[0] == 0) - return; + return; if (dev->filename[0] == 0) - plat_tempfile(dev->filename, NULL, ".ps"); + plat_tempfile(dev->filename, NULL, ".ps"); strcpy(path, dev->printer_path); path_slash(path); @@ -212,7 +204,7 @@ write_buffer(ps_t *dev, bool finish) fp = plat_fopen(path, "a"); if (fp == NULL) - return; + return; fseek(fp, 0, SEEK_END); @@ -220,18 +212,17 @@ write_buffer(ps_t *dev, bool finish) fclose(fp); - dev->buffer[0] = 0; + dev->buffer[0] = 0; dev->buffer_pos = 0; if (finish) { - if (ghostscript_handle != NULL) - convert_to_pdf(dev); + if (ghostscript_handle != NULL) + convert_to_pdf(dev); - dev->filename[0] = 0; + dev->filename[0] = 0; } } - static void timeout_timer(void *priv) { @@ -242,133 +233,128 @@ timeout_timer(void *priv) timer_disable(&dev->timeout_timer); } - static void ps_write_data(uint8_t val, void *p) { ps_t *dev = (ps_t *) p; if (dev == NULL) - return; + return; dev->data = (char) val; } - static void process_data(ps_t *dev) { /* Check for non-printable characters */ if ((dev->data < 0x20) || (dev->data == 0x7f)) { - switch (dev->data) { - /* The following characters are considered white-space - by the PostScript specification */ - case '\t': - case '\n': - case '\f': - case '\r': - break; + switch (dev->data) { + /* The following characters are considered white-space + by the PostScript specification */ + case '\t': + case '\n': + case '\f': + case '\r': + break; - /* Same with NUL, except we better change it to a space first */ - case '\0': - dev->data = ' '; - break; + /* Same with NUL, except we better change it to a space first */ + case '\0': + dev->data = ' '; + break; - /* Ctrl+D (0x04) marks the end of the document */ - case '\4': - write_buffer(dev, true); - return; + /* Ctrl+D (0x04) marks the end of the document */ + case '\4': + write_buffer(dev, true); + return; - /* Don't bother with the others */ - default: - return; - } + /* Don't bother with the others */ + default: + return; + } } /* Flush the buffer if we have run to its end */ if (dev->buffer_pos == POSTSCRIPT_BUFFER_LENGTH - 1) - write_buffer(dev, false); + write_buffer(dev, false); dev->buffer[dev->buffer_pos++] = dev->data; - dev->buffer[dev->buffer_pos] = 0; + dev->buffer[dev->buffer_pos] = 0; } - static void ps_write_ctrl(uint8_t val, void *p) { ps_t *dev = (ps_t *) p; if (dev == NULL) - return; + return; dev->autofeed = val & 0x02 ? true : false; if (val & 0x08) - dev->select = true; + dev->select = true; if ((val & 0x04) && !(dev->ctrl & 0x04)) { - /* Reset printer */ - dev->select = false; + /* Reset printer */ + dev->select = false; - reset_ps(dev); + reset_ps(dev); } if (!(val & 0x01) && (dev->ctrl & 0x01)) { - process_data(dev); + process_data(dev); - dev->ack = true; + dev->ack = true; - timer_set_delay_u64(&dev->pulse_timer, ISACONST); - timer_set_delay_u64(&dev->timeout_timer, 5000000 * TIMER_USEC); + timer_set_delay_u64(&dev->pulse_timer, ISACONST); + timer_set_delay_u64(&dev->timeout_timer, 5000000 * TIMER_USEC); } dev->ctrl = val; } - static uint8_t ps_read_status(void *p) { - ps_t *dev = (ps_t *) p; + ps_t *dev = (ps_t *) p; uint8_t ret = 0x9f; if (!dev->ack) - ret |= 0x40; + ret |= 0x40; - return(ret); + return (ret); } - static void * ps_init(void *lpt) { - ps_t *dev; + ps_t *dev; gsapi_revision_t rev; dev = (ps_t *) malloc(sizeof(ps_t)); memset(dev, 0x00, sizeof(ps_t)); dev->ctrl = 0x04; - dev->lpt = lpt; + dev->lpt = lpt; /* Try loading the DLL. */ ghostscript_handle = dynld_module(PATH_GHOSTSCRIPT_DLL, ghostscript_imports); if (ghostscript_handle == NULL) - ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2114, (wchar_t *) IDS_2132); + ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2114, (wchar_t *) IDS_2132); else { - if (gsapi_revision(&rev, sizeof(rev)) == 0) - pclog("Loaded %s, rev %ld (%ld)\n", rev.product, rev.revision, rev.revisiondate); - else { - dynld_close(ghostscript_handle); - ghostscript_handle = NULL; - } + if (gsapi_revision(&rev, sizeof(rev)) == 0) + pclog("Loaded %s, rev %ld (%ld)\n", rev.product, rev.revision, rev.revisiondate); + else { + dynld_close(ghostscript_handle); + ghostscript_handle = NULL; + } } - /* Cache print folder path. */ +/* Cache print folder path. */ memset(dev->printer_path, 0x00, sizeof(dev->printer_path)); path_append_filename(dev->printer_path, usr_path, "printer"); if (!plat_dir_check(dev->printer_path)) - plat_dir_create(dev->printer_path); + plat_dir_create(dev->printer_path); path_slash(dev->printer_path); timer_add(&dev->pulse_timer, pulse_timer, dev, 0); @@ -376,38 +362,36 @@ ps_init(void *lpt) reset_ps(dev); - return(dev); + return (dev); } - static void ps_close(void *p) { ps_t *dev = (ps_t *) p; if (dev == NULL) - return; + return; if (dev->buffer[0] != 0) - write_buffer(dev, true); + write_buffer(dev, true); if (ghostscript_handle != NULL) { - dynld_close(ghostscript_handle); - ghostscript_handle = NULL; + dynld_close(ghostscript_handle); + ghostscript_handle = NULL; } free(dev); } - const lpt_device_t lpt_prt_ps_device = { - .name = "Generic PostScript Printer", + .name = "Generic PostScript Printer", .internal_name = "postscript", - .init = ps_init, - .close = ps_close, - .write_data = ps_write_data, - .write_ctrl = ps_write_ctrl, - .read_data = NULL, - .read_status = ps_read_status, - .read_ctrl = NULL + .init = ps_init, + .close = ps_close, + .write_data = ps_write_data, + .write_ctrl = ps_write_ctrl, + .read_data = NULL, + .read_status = ps_read_status, + .read_ctrl = NULL }; diff --git a/src/printer/prt_text.c b/src/printer/prt_text.c index c57a4fef3..a9c170fa6 100644 --- a/src/printer/prt_text.c +++ b/src/printer/prt_text.c @@ -66,93 +66,88 @@ #include <86box/printer.h> #include <86box/prt_devs.h> - -#define FULL_PAGE 1 /* set if no top/bot margins */ - +#define FULL_PAGE 1 /* set if no top/bot margins */ /* Default page values (for now.) */ -#define PAGE_WIDTH 8.5 /* standard U.S. Letter */ -#define PAGE_HEIGHT 11 -#define PAGE_LMARGIN 0.25 /* 0.25" left and right */ -#define PAGE_RMARGIN 0.25 +#define PAGE_WIDTH 8.5 /* standard U.S. Letter */ +#define PAGE_HEIGHT 11 +#define PAGE_LMARGIN 0.25 /* 0.25" left and right */ +#define PAGE_RMARGIN 0.25 #if FULL_PAGE -# define PAGE_TMARGIN 0 -# define PAGE_BMARGIN 0 +# define PAGE_TMARGIN 0 +# define PAGE_BMARGIN 0 #else -# define PAGE_TMARGIN 0.25 -# define PAGE_BMARGIN 0.25 +# define PAGE_TMARGIN 0.25 +# define PAGE_BMARGIN 0.25 #endif -#define PAGE_CPI 10.0 /* standard 10 cpi */ -#define PAGE_LPI 6.0 /* standard 6 lpi */ - +#define PAGE_CPI 10.0 /* standard 10 cpi */ +#define PAGE_LPI 6.0 /* standard 6 lpi */ typedef struct { - int8_t dirty; /* has the page been printed on? */ - char pad; + int8_t dirty; /* has the page been printed on? */ + char pad; - uint8_t w; /* size //INFO */ - uint8_t h; + uint8_t w; /* size //INFO */ + uint8_t h; - char *chars; /* character data */ + char *chars; /* character data */ } psurface_t; - typedef struct { const char *name; - void * lpt; + void *lpt; /* Output file name. */ - char filename[1024]; + char filename[1024]; /* Printer timeout. */ - pc_timer_t pulse_timer; - pc_timer_t timeout_timer; + pc_timer_t pulse_timer; + pc_timer_t timeout_timer; /* page data (TODO: make configurable) */ - double page_width, /* all in inches */ - page_height, - left_margin, - top_margin, - right_margin, - bot_margin; + double page_width, /* all in inches */ + page_height, + left_margin, + top_margin, + right_margin, + bot_margin; /* internal page data */ - psurface_t *page; - uint8_t max_chars, - max_lines; - uint8_t curr_x, /* print head position (chars) */ - curr_y; + psurface_t *page; + uint8_t max_chars, + max_lines; + uint8_t curr_x, /* print head position (chars) */ + curr_y; /* font data */ - double cpi, /* defined chars per inch */ - lpi; /* defined lines per inch */ + double cpi, /* defined chars per inch */ + lpi; /* defined lines per inch */ /* handshake data */ - uint8_t data; - int8_t ack; - int8_t select; - int8_t busy; - int8_t int_pending; - int8_t error; - int8_t autofeed; - uint8_t ctrl; + uint8_t data; + int8_t ack; + int8_t select; + int8_t busy; + int8_t int_pending; + int8_t error; + int8_t autofeed; + uint8_t ctrl; } prnt_t; - /* Dump the current page into a formatted file. */ static void dump_page(prnt_t *dev) { - char path[1024]; + char path[1024]; uint16_t x, y; - uint8_t ch; - FILE *fp; + uint8_t ch; + FILE *fp; /* Create the full path for this file. */ memset(path, 0x00, sizeof(path)); path_append_filename(path, usr_path, "printer"); - if (! plat_dir_check(path)) + if (!plat_dir_check(path)) plat_dir_create(path); path_slash(path); strcat(path, dev->filename); @@ -160,95 +155,91 @@ dump_page(prnt_t *dev) /* Create the file. */ fp = plat_fopen(path, "a"); if (fp == NULL) { - //ERRLOG("PRNT: unable to create print page '%s'\n", path); - return; + // ERRLOG("PRNT: unable to create print page '%s'\n", path); + return; } fseek(fp, 0, SEEK_END); /* If this is not a new file, add a formfeed first. */ if (ftell(fp) != 0) - fputc('\014', fp); + fputc('\014', fp); for (y = 0; y < dev->curr_y; y++) { - for (x = 0; x < dev->page->w; x++) { - ch = dev->page->chars[(y * dev->page->w) + x]; - if (ch == 0x00) { - /* End of line marker. */ - fputc('\n', fp); - break; - } else { - fputc(ch, fp); - } - } + for (x = 0; x < dev->page->w; x++) { + ch = dev->page->chars[(y * dev->page->w) + x]; + if (ch == 0x00) { + /* End of line marker. */ + fputc('\n', fp); + break; + } else { + fputc(ch, fp); + } + } } /* All done, close the file. */ fclose(fp); } - static void new_page(prnt_t *dev) { /* Dump the current page if needed. */ if (dev->page->dirty) - dump_page(dev); + dump_page(dev); /* Clear page. */ memset(dev->page->chars, 0x00, dev->page->h * dev->page->w); - dev->curr_y = 0; + dev->curr_y = 0; dev->page->dirty = 0; } - static void pulse_timer(void *priv) { prnt_t *dev = (prnt_t *) priv; if (dev->ack) { - dev->ack = 0; - lpt_irq(dev->lpt, 1); + dev->ack = 0; + lpt_irq(dev->lpt, 1); } timer_disable(&dev->pulse_timer); } - static void timeout_timer(void *priv) { prnt_t *dev = (prnt_t *) priv; if (dev->page->dirty) - new_page(dev); + new_page(dev); timer_disable(&dev->timeout_timer); } - static void reset_printer(prnt_t *dev) { /* TODO: these three should be configurable */ - dev->page_width = PAGE_WIDTH; - dev->page_height = PAGE_HEIGHT; - dev->left_margin = PAGE_LMARGIN; + dev->page_width = PAGE_WIDTH; + dev->page_height = PAGE_HEIGHT; + dev->left_margin = PAGE_LMARGIN; dev->right_margin = PAGE_RMARGIN; - dev->top_margin = PAGE_TMARGIN; - dev->bot_margin = PAGE_BMARGIN; - dev->cpi = PAGE_CPI; - dev->lpi = PAGE_LPI; - dev->ack = 0; + dev->top_margin = PAGE_TMARGIN; + dev->bot_margin = PAGE_BMARGIN; + dev->cpi = PAGE_CPI; + dev->lpi = PAGE_LPI; + dev->ack = 0; /* Default page layout. */ dev->max_chars = (int) ((dev->page_width - dev->left_margin - dev->right_margin) * dev->cpi); - dev->max_lines = (int) ((dev->page_height -dev->top_margin - dev->bot_margin) * dev->lpi); + dev->max_lines = (int) ((dev->page_height - dev->top_margin - dev->bot_margin) * dev->lpi); dev->curr_x = dev->curr_y = 0; if (dev->page != NULL) - dev->page->dirty = 0; + dev->page->dirty = 0; /* Create a file for this page. */ plat_tempfile(dev->filename, NULL, ".txt"); @@ -257,240 +248,235 @@ reset_printer(prnt_t *dev) timer_disable(&dev->timeout_timer); } - static int process_char(prnt_t *dev, uint8_t ch) { uint8_t i; switch (ch) { - case 0x07: /* Beeper (BEL) */ - /* TODO: beep? */ - return 1; + case 0x07: /* Beeper (BEL) */ + /* TODO: beep? */ + return 1; - case 0x08: /* Backspace (BS) */ - if (dev->curr_x > 0) - dev->curr_x--; - return 1; + case 0x08: /* Backspace (BS) */ + if (dev->curr_x > 0) + dev->curr_x--; + return 1; - case 0x09: /* Tab horizontally (HT) */ - /* Find tab right to current pos. */ - i = dev->curr_x; - dev->page->chars[(dev->curr_y * dev->page->w) + i++] = ' '; - while ((i < dev->max_chars) && ((i % 8) != 0)) { - dev->page->chars[(dev->curr_y * dev->page->w) + i] = ' '; - i++; - } - dev->curr_x = i; - return 1; + case 0x09: /* Tab horizontally (HT) */ + /* Find tab right to current pos. */ + i = dev->curr_x; + dev->page->chars[(dev->curr_y * dev->page->w) + i++] = ' '; + while ((i < dev->max_chars) && ((i % 8) != 0)) { + dev->page->chars[(dev->curr_y * dev->page->w) + i] = ' '; + i++; + } + dev->curr_x = i; + return 1; - case 0x0b: /* Tab vertically (VT) */ - dev->curr_x = 0; - return 1; + case 0x0b: /* Tab vertically (VT) */ + dev->curr_x = 0; + return 1; - case 0x0c: /* Form feed (FF) */ - new_page(dev); - return 1; + case 0x0c: /* Form feed (FF) */ + new_page(dev); + return 1; - case 0x0d: /* Carriage Return (CR) */ - dev->curr_x = 0; - if (! dev->autofeed) - return 1; - /*FALLTHROUGH*/ + case 0x0d: /* Carriage Return (CR) */ + dev->curr_x = 0; + if (!dev->autofeed) + return 1; + /*FALLTHROUGH*/ - case 0x0a: /* Line feed */ - dev->curr_x = 0; - if (++dev->curr_y >= dev->max_lines) - new_page(dev); - return 1; + case 0x0a: /* Line feed */ + dev->curr_x = 0; + if (++dev->curr_y >= dev->max_lines) + new_page(dev); + return 1; - case 0x0e: /* select wide printing (SO) */ - /* Ignore. */ - return 1; + case 0x0e: /* select wide printing (SO) */ + /* Ignore. */ + return 1; - case 0x0f: /* select condensed printing (SI) */ - /* Ignore. */ - return 1; + case 0x0f: /* select condensed printing (SI) */ + /* Ignore. */ + return 1; - case 0x11: /* select printer (DC1) */ - /* Ignore. */ - return 0; + case 0x11: /* select printer (DC1) */ + /* Ignore. */ + return 0; - case 0x12: /* cancel condensed printing (DC2) */ - /* Ignore. */ - return 1; + case 0x12: /* cancel condensed printing (DC2) */ + /* Ignore. */ + return 1; - case 0x13: /* deselect printer (DC3) */ - /* Ignore. */ - return 1; + case 0x13: /* deselect printer (DC3) */ + /* Ignore. */ + return 1; - case 0x14: /* cancel double-width printing (one line) (DC4) */ - /* Ignore. */ - return 1; + case 0x14: /* cancel double-width printing (one line) (DC4) */ + /* Ignore. */ + return 1; - case 0x18: /* cancel line (CAN) */ - /* Ignore. */ - return 1; + case 0x18: /* cancel line (CAN) */ + /* Ignore. */ + return 1; - case 0x1b: /* ESC */ - /* Ignore. */ - return 1; + case 0x1b: /* ESC */ + /* Ignore. */ + return 1; - default: - break; + default: + break; } /* Just a printable character. */ - return(0); + return (0); } - static void handle_char(prnt_t *dev) { uint8_t ch = dev->data; - if (dev->page == NULL) return; + if (dev->page == NULL) + return; if (process_char(dev, ch) == 1) { - /* Command was processed. */ - return; + /* Command was processed. */ + return; } /* Store character in the page buffer. */ dev->page->chars[(dev->curr_y * dev->page->w) + dev->curr_x] = ch; - dev->page->dirty = 1; + dev->page->dirty = 1; /* Update print head position. */ if (++dev->curr_x >= dev->max_chars) { - dev->curr_x = 0; - if (++dev->curr_y >= dev->max_lines) - new_page(dev); + dev->curr_x = 0; + if (++dev->curr_y >= dev->max_lines) + new_page(dev); } } - static void write_data(uint8_t val, void *priv) { - prnt_t *dev = (prnt_t *)priv; + prnt_t *dev = (prnt_t *) priv; - if (dev == NULL) return; + if (dev == NULL) + return; dev->data = val; } - static void write_ctrl(uint8_t val, void *priv) { - prnt_t *dev = (prnt_t *)priv; + prnt_t *dev = (prnt_t *) priv; - if (dev == NULL) return; + if (dev == NULL) + return; /* set autofeed value */ dev->autofeed = val & 0x02 ? 1 : 0; - if (val & 0x08) { /* SELECT */ - /* select printer */ - dev->select = 1; + if (val & 0x08) { /* SELECT */ + /* select printer */ + dev->select = 1; } if ((val & 0x04) && !(dev->ctrl & 0x04)) { - /* reset printer */ - dev->select = 0; + /* reset printer */ + dev->select = 0; - reset_printer(dev); + reset_printer(dev); } - if (!(val & 0x01) && (dev->ctrl & 0x01)) { /* STROBE */ - /* Process incoming character. */ - handle_char(dev); + if (!(val & 0x01) && (dev->ctrl & 0x01)) { /* STROBE */ + /* Process incoming character. */ + handle_char(dev); - /* ACK it, will be read on next READ STATUS. */ - dev->ack = 1; + /* ACK it, will be read on next READ STATUS. */ + dev->ack = 1; - timer_set_delay_u64(&dev->pulse_timer, ISACONST); - timer_set_delay_u64(&dev->timeout_timer, 5000000 * TIMER_USEC); + timer_set_delay_u64(&dev->pulse_timer, ISACONST); + timer_set_delay_u64(&dev->timeout_timer, 5000000 * TIMER_USEC); } dev->ctrl = val; } - static uint8_t read_status(void *priv) { - prnt_t *dev = (prnt_t *)priv; + prnt_t *dev = (prnt_t *) priv; uint8_t ret = 0x1f; ret |= 0x80; if (!dev->ack) - ret |= 0x40; + ret |= 0x40; - return(ret); + return (ret); } - static void * prnt_init(void *lpt) { prnt_t *dev; /* Initialize a device instance. */ - dev = (prnt_t *)malloc(sizeof(prnt_t)); + dev = (prnt_t *) malloc(sizeof(prnt_t)); memset(dev, 0x00, sizeof(prnt_t)); dev->ctrl = 0x04; - dev->lpt = lpt; + dev->lpt = lpt; /* Initialize parameters. */ reset_printer(dev); /* Create a page buffer. */ - dev->page = (psurface_t *)malloc(sizeof(psurface_t)); - dev->page->w = dev->max_chars; - dev->page->h = dev->max_lines; - dev->page->chars = (char *)malloc(dev->page->w * dev->page->h); + dev->page = (psurface_t *) malloc(sizeof(psurface_t)); + dev->page->w = dev->max_chars; + dev->page->h = dev->max_lines; + dev->page->chars = (char *) malloc(dev->page->w * dev->page->h); memset(dev->page->chars, 0x00, dev->page->w * dev->page->h); timer_add(&dev->pulse_timer, pulse_timer, dev, 0); timer_add(&dev->timeout_timer, timeout_timer, dev, 0); - return(dev); + return (dev); } - static void prnt_close(void *priv) { - prnt_t *dev = (prnt_t *)priv; + prnt_t *dev = (prnt_t *) priv; if (dev == NULL) - return; + return; if (dev->page) { - /* print last page if it contains data */ - if (dev->page->dirty) - dump_page(dev); + /* print last page if it contains data */ + if (dev->page->dirty) + dump_page(dev); - if (dev->page->chars != NULL) - free(dev->page->chars); - free(dev->page); + if (dev->page->chars != NULL) + free(dev->page->chars); + free(dev->page); } free(dev); } - const lpt_device_t lpt_prt_text_device = { - .name = "Generic Text Printer", + .name = "Generic Text Printer", .internal_name = "text_prt", - .init = prnt_init, - .close = prnt_close, - .write_data = write_data, - .write_ctrl = write_ctrl, - .read_data = NULL, - .read_status = read_status, - .read_ctrl = NULL + .init = prnt_init, + .close = prnt_close, + .write_data = write_data, + .write_ctrl = write_ctrl, + .read_data = NULL, + .read_status = read_status, + .read_ctrl = NULL }; From acbe718f1e8e56d6f64563e0b495a9b46f2656c9 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:17:34 -0400 Subject: [PATCH 367/386] clang-format in src/unix/ --- src/unix/macOSXGlue.h | 5 +- src/unix/unix.c | 1053 +++++++++++++++++++--------------------- src/unix/unix_cdrom.c | 76 ++- src/unix/unix_sdl.c | 367 +++++++------- src/unix/unix_thread.c | 91 ++-- 5 files changed, 744 insertions(+), 848 deletions(-) diff --git a/src/unix/macOSXGlue.h b/src/unix/macOSXGlue.h index cd3a880bd..f49402805 100644 --- a/src/unix/macOSXGlue.h +++ b/src/unix/macOSXGlue.h @@ -13,11 +13,10 @@ CF_IMPLICIT_BRIDGING_ENABLED CF_EXTERN_C_BEGIN -void getDefaultROMPath(char*); -int toto(); +void getDefaultROMPath(char *); +int toto(); CF_EXTERN_C_END CF_IMPLICIT_BRIDGING_DISABLED - #endif /* macOSXGlue_h */ diff --git a/src/unix/unix.c b/src/unix/unix.c index 598eb9acc..8d6aaf3d1 100644 --- a/src/unix/unix.c +++ b/src/unix/unix.c @@ -1,6 +1,6 @@ #ifdef __linux__ -#define _FILE_OFFSET_BITS 64 -#define _LARGEFILE64_SOURCE 1 +# define _FILE_OFFSET_BITS 64 +# define _LARGEFILE64_SOURCE 1 #endif #include #include @@ -41,158 +41,154 @@ #include <86box/gdbstub.h> #ifdef __APPLE__ -#include "macOSXGlue.h" +# include "macOSXGlue.h" #endif -static int first_use = 1; -static uint64_t StartingTime; +static int first_use = 1; +static uint64_t StartingTime; static uint64_t Frequency; -int rctrl_is_lalt; -int update_icons; -int kbd_req_capture; -int hide_status_bar; -int hide_tool_bar; -int fixed_size_x = 640; -int fixed_size_y = 480; -extern int title_set; -extern wchar_t sdl_win_title[512]; -plat_joystick_t plat_joystick_state[MAX_PLAT_JOYSTICKS]; -joystick_t joystick_state[MAX_JOYSTICKS]; -int joysticks_present; -SDL_mutex *blitmtx; -SDL_threadID eventthread; -static int exit_event = 0; -static int fullscreen_pending = 0; -uint32_t lang_id = 0x0409, lang_sys = 0x0409; // Multilangual UI variables, for now all set to LCID of en-US -char icon_set[256] = ""; /* name of the iconset to be used */ +int rctrl_is_lalt; +int update_icons; +int kbd_req_capture; +int hide_status_bar; +int hide_tool_bar; +int fixed_size_x = 640; +int fixed_size_y = 480; +extern int title_set; +extern wchar_t sdl_win_title[512]; +plat_joystick_t plat_joystick_state[MAX_PLAT_JOYSTICKS]; +joystick_t joystick_state[MAX_JOYSTICKS]; +int joysticks_present; +SDL_mutex *blitmtx; +SDL_threadID eventthread; +static int exit_event = 0; +static int fullscreen_pending = 0; +uint32_t lang_id = 0x0409, lang_sys = 0x0409; // Multilangual UI variables, for now all set to LCID of en-US +char icon_set[256] = ""; /* name of the iconset to be used */ -static const uint16_t sdl_to_xt[0x200] = -{ - [SDL_SCANCODE_ESCAPE] = 0x01, - [SDL_SCANCODE_1] = 0x02, - [SDL_SCANCODE_2] = 0x03, - [SDL_SCANCODE_3] = 0x04, - [SDL_SCANCODE_4] = 0x05, - [SDL_SCANCODE_5] = 0x06, - [SDL_SCANCODE_6] = 0x07, - [SDL_SCANCODE_7] = 0x08, - [SDL_SCANCODE_8] = 0x09, - [SDL_SCANCODE_9] = 0x0A, - [SDL_SCANCODE_0] = 0x0B, - [SDL_SCANCODE_MINUS] = 0x0C, - [SDL_SCANCODE_EQUALS] = 0x0D, - [SDL_SCANCODE_BACKSPACE] = 0x0E, - [SDL_SCANCODE_TAB] = 0x0F, - [SDL_SCANCODE_Q] = 0x10, - [SDL_SCANCODE_W] = 0x11, - [SDL_SCANCODE_E] = 0x12, - [SDL_SCANCODE_R] = 0x13, - [SDL_SCANCODE_T] = 0x14, - [SDL_SCANCODE_Y] = 0x15, - [SDL_SCANCODE_U] = 0x16, - [SDL_SCANCODE_I] = 0x17, - [SDL_SCANCODE_O] = 0x18, - [SDL_SCANCODE_P] = 0x19, - [SDL_SCANCODE_LEFTBRACKET] = 0x1A, +static const uint16_t sdl_to_xt[0x200] = { + [SDL_SCANCODE_ESCAPE] = 0x01, + [SDL_SCANCODE_1] = 0x02, + [SDL_SCANCODE_2] = 0x03, + [SDL_SCANCODE_3] = 0x04, + [SDL_SCANCODE_4] = 0x05, + [SDL_SCANCODE_5] = 0x06, + [SDL_SCANCODE_6] = 0x07, + [SDL_SCANCODE_7] = 0x08, + [SDL_SCANCODE_8] = 0x09, + [SDL_SCANCODE_9] = 0x0A, + [SDL_SCANCODE_0] = 0x0B, + [SDL_SCANCODE_MINUS] = 0x0C, + [SDL_SCANCODE_EQUALS] = 0x0D, + [SDL_SCANCODE_BACKSPACE] = 0x0E, + [SDL_SCANCODE_TAB] = 0x0F, + [SDL_SCANCODE_Q] = 0x10, + [SDL_SCANCODE_W] = 0x11, + [SDL_SCANCODE_E] = 0x12, + [SDL_SCANCODE_R] = 0x13, + [SDL_SCANCODE_T] = 0x14, + [SDL_SCANCODE_Y] = 0x15, + [SDL_SCANCODE_U] = 0x16, + [SDL_SCANCODE_I] = 0x17, + [SDL_SCANCODE_O] = 0x18, + [SDL_SCANCODE_P] = 0x19, + [SDL_SCANCODE_LEFTBRACKET] = 0x1A, [SDL_SCANCODE_RIGHTBRACKET] = 0x1B, - [SDL_SCANCODE_RETURN] = 0x1C, - [SDL_SCANCODE_LCTRL] = 0x1D, - [SDL_SCANCODE_A] = 0x1E, - [SDL_SCANCODE_S] = 0x1F, - [SDL_SCANCODE_D] = 0x20, - [SDL_SCANCODE_F] = 0x21, - [SDL_SCANCODE_G] = 0x22, - [SDL_SCANCODE_H] = 0x23, - [SDL_SCANCODE_J] = 0x24, - [SDL_SCANCODE_K] = 0x25, - [SDL_SCANCODE_L] = 0x26, - [SDL_SCANCODE_SEMICOLON] = 0x27, - [SDL_SCANCODE_APOSTROPHE] = 0x28, - [SDL_SCANCODE_GRAVE] = 0x29, - [SDL_SCANCODE_LSHIFT] = 0x2A, - [SDL_SCANCODE_BACKSLASH] = 0x2B, - [SDL_SCANCODE_Z] = 0x2C, - [SDL_SCANCODE_X] = 0x2D, - [SDL_SCANCODE_C] = 0x2E, - [SDL_SCANCODE_V] = 0x2F, - [SDL_SCANCODE_B] = 0x30, - [SDL_SCANCODE_N] = 0x31, - [SDL_SCANCODE_M] = 0x32, - [SDL_SCANCODE_COMMA] = 0x33, - [SDL_SCANCODE_PERIOD] = 0x34, - [SDL_SCANCODE_SLASH] = 0x35, - [SDL_SCANCODE_RSHIFT] = 0x36, - [SDL_SCANCODE_KP_MULTIPLY] = 0x37, - [SDL_SCANCODE_LALT] = 0x38, - [SDL_SCANCODE_SPACE] = 0x39, - [SDL_SCANCODE_CAPSLOCK] = 0x3A, - [SDL_SCANCODE_F1] = 0x3B, - [SDL_SCANCODE_F2] = 0x3C, - [SDL_SCANCODE_F3] = 0x3D, - [SDL_SCANCODE_F4] = 0x3E, - [SDL_SCANCODE_F5] = 0x3F, - [SDL_SCANCODE_F6] = 0x40, - [SDL_SCANCODE_F7] = 0x41, - [SDL_SCANCODE_F8] = 0x42, - [SDL_SCANCODE_F9] = 0x43, - [SDL_SCANCODE_F10] = 0x44, + [SDL_SCANCODE_RETURN] = 0x1C, + [SDL_SCANCODE_LCTRL] = 0x1D, + [SDL_SCANCODE_A] = 0x1E, + [SDL_SCANCODE_S] = 0x1F, + [SDL_SCANCODE_D] = 0x20, + [SDL_SCANCODE_F] = 0x21, + [SDL_SCANCODE_G] = 0x22, + [SDL_SCANCODE_H] = 0x23, + [SDL_SCANCODE_J] = 0x24, + [SDL_SCANCODE_K] = 0x25, + [SDL_SCANCODE_L] = 0x26, + [SDL_SCANCODE_SEMICOLON] = 0x27, + [SDL_SCANCODE_APOSTROPHE] = 0x28, + [SDL_SCANCODE_GRAVE] = 0x29, + [SDL_SCANCODE_LSHIFT] = 0x2A, + [SDL_SCANCODE_BACKSLASH] = 0x2B, + [SDL_SCANCODE_Z] = 0x2C, + [SDL_SCANCODE_X] = 0x2D, + [SDL_SCANCODE_C] = 0x2E, + [SDL_SCANCODE_V] = 0x2F, + [SDL_SCANCODE_B] = 0x30, + [SDL_SCANCODE_N] = 0x31, + [SDL_SCANCODE_M] = 0x32, + [SDL_SCANCODE_COMMA] = 0x33, + [SDL_SCANCODE_PERIOD] = 0x34, + [SDL_SCANCODE_SLASH] = 0x35, + [SDL_SCANCODE_RSHIFT] = 0x36, + [SDL_SCANCODE_KP_MULTIPLY] = 0x37, + [SDL_SCANCODE_LALT] = 0x38, + [SDL_SCANCODE_SPACE] = 0x39, + [SDL_SCANCODE_CAPSLOCK] = 0x3A, + [SDL_SCANCODE_F1] = 0x3B, + [SDL_SCANCODE_F2] = 0x3C, + [SDL_SCANCODE_F3] = 0x3D, + [SDL_SCANCODE_F4] = 0x3E, + [SDL_SCANCODE_F5] = 0x3F, + [SDL_SCANCODE_F6] = 0x40, + [SDL_SCANCODE_F7] = 0x41, + [SDL_SCANCODE_F8] = 0x42, + [SDL_SCANCODE_F9] = 0x43, + [SDL_SCANCODE_F10] = 0x44, [SDL_SCANCODE_NUMLOCKCLEAR] = 0x45, - [SDL_SCANCODE_SCROLLLOCK] = 0x46, - [SDL_SCANCODE_HOME] = 0x147, - [SDL_SCANCODE_UP] = 0x148, - [SDL_SCANCODE_PAGEUP] = 0x149, - [SDL_SCANCODE_KP_MINUS] = 0x4A, - [SDL_SCANCODE_LEFT] = 0x14B, - [SDL_SCANCODE_KP_5] = 0x4C, - [SDL_SCANCODE_RIGHT] = 0x14D, - [SDL_SCANCODE_KP_PLUS] = 0x4E, - [SDL_SCANCODE_END] = 0x14F, - [SDL_SCANCODE_DOWN] = 0x150, - [SDL_SCANCODE_PAGEDOWN] = 0x151, - [SDL_SCANCODE_INSERT] = 0x152, - [SDL_SCANCODE_DELETE] = 0x153, - [SDL_SCANCODE_F11] = 0x57, - [SDL_SCANCODE_F12] = 0x58, + [SDL_SCANCODE_SCROLLLOCK] = 0x46, + [SDL_SCANCODE_HOME] = 0x147, + [SDL_SCANCODE_UP] = 0x148, + [SDL_SCANCODE_PAGEUP] = 0x149, + [SDL_SCANCODE_KP_MINUS] = 0x4A, + [SDL_SCANCODE_LEFT] = 0x14B, + [SDL_SCANCODE_KP_5] = 0x4C, + [SDL_SCANCODE_RIGHT] = 0x14D, + [SDL_SCANCODE_KP_PLUS] = 0x4E, + [SDL_SCANCODE_END] = 0x14F, + [SDL_SCANCODE_DOWN] = 0x150, + [SDL_SCANCODE_PAGEDOWN] = 0x151, + [SDL_SCANCODE_INSERT] = 0x152, + [SDL_SCANCODE_DELETE] = 0x153, + [SDL_SCANCODE_F11] = 0x57, + [SDL_SCANCODE_F12] = 0x58, - [SDL_SCANCODE_KP_ENTER] = 0x11c, - [SDL_SCANCODE_RCTRL] = 0x11d, + [SDL_SCANCODE_KP_ENTER] = 0x11c, + [SDL_SCANCODE_RCTRL] = 0x11d, [SDL_SCANCODE_KP_DIVIDE] = 0x135, - [SDL_SCANCODE_RALT] = 0x138, - [SDL_SCANCODE_KP_9] = 0x49, - [SDL_SCANCODE_KP_8] = 0x48, - [SDL_SCANCODE_KP_7] = 0x47, - [SDL_SCANCODE_KP_6] = 0x4D, - [SDL_SCANCODE_KP_4] = 0x4B, - [SDL_SCANCODE_KP_3] = 0x51, - [SDL_SCANCODE_KP_2] = 0x50, - [SDL_SCANCODE_KP_1] = 0x4F, - [SDL_SCANCODE_KP_0] = 0x52, + [SDL_SCANCODE_RALT] = 0x138, + [SDL_SCANCODE_KP_9] = 0x49, + [SDL_SCANCODE_KP_8] = 0x48, + [SDL_SCANCODE_KP_7] = 0x47, + [SDL_SCANCODE_KP_6] = 0x4D, + [SDL_SCANCODE_KP_4] = 0x4B, + [SDL_SCANCODE_KP_3] = 0x51, + [SDL_SCANCODE_KP_2] = 0x50, + [SDL_SCANCODE_KP_1] = 0x4F, + [SDL_SCANCODE_KP_0] = 0x52, [SDL_SCANCODE_KP_PERIOD] = 0x53, - [SDL_SCANCODE_LGUI] = 0x15B, - [SDL_SCANCODE_RGUI] = 0x15C, + [SDL_SCANCODE_LGUI] = 0x15B, + [SDL_SCANCODE_RGUI] = 0x15C, [SDL_SCANCODE_APPLICATION] = 0x15D, [SDL_SCANCODE_PRINTSCREEN] = 0x137 }; -typedef struct sdl_blit_params -{ +typedef struct sdl_blit_params { int x, y, w, h; } sdl_blit_params; -sdl_blit_params params = { 0, 0, 0, 0 }; -int blitreq = 0; +sdl_blit_params params = { 0, 0, 0, 0 }; +int blitreq = 0; -void* dynld_module(const char *name, dllimp_t *table) +void * +dynld_module(const char *name, dllimp_t *table) { - dllimp_t* imp; - void* modhandle = dlopen(name, RTLD_LAZY | RTLD_GLOBAL); - if (modhandle) - { - for (imp = table; imp->name != NULL; imp++) - { - if ((*(void**)imp->func = dlsym(modhandle, imp->name)) == NULL) - { + dllimp_t *imp; + void *modhandle = dlopen(name, RTLD_LAZY | RTLD_GLOBAL); + if (modhandle) { + for (imp = table; imp->name != NULL; imp++) { + if ((*(void **) imp->func = dlsym(modhandle, imp->name)) == NULL) { dlclose(modhandle); return NULL; } @@ -204,16 +200,16 @@ void* dynld_module(const char *name, dllimp_t *table) void plat_tempfile(char *bufp, char *prefix, char *suffix) { - struct tm* calendertime; + struct tm *calendertime; struct timeval t; - time_t curtime; + time_t curtime; if (prefix != NULL) - sprintf(bufp, "%s-", prefix); - else - strcpy(bufp, ""); + sprintf(bufp, "%s-", prefix); + else + strcpy(bufp, ""); gettimeofday(&t, NULL); - curtime = time(NULL); + curtime = time(NULL); calendertime = localtime(&curtime); sprintf(&bufp[strlen(bufp)], "%d%02d%02d-%02d%02d%02d-%03ld%s", calendertime->tm_year, calendertime->tm_mon, calendertime->tm_mday, calendertime->tm_hour, calendertime->tm_min, calendertime->tm_sec, t.tv_usec / 1000, suffix); } @@ -225,20 +221,21 @@ plat_getcwd(char *bufp, int max) } int -plat_chdir(char* str) +plat_chdir(char *str) { return chdir(str); } -void dynld_close(void *handle) +void +dynld_close(void *handle) { - dlclose(handle); + dlclose(handle); } -wchar_t* plat_get_string(int i) +wchar_t * +plat_get_string(int i) { - switch (i) - { + switch (i) { case IDS_2077: return L"Click to capture mouse"; case IDS_2078: @@ -302,7 +299,7 @@ path_abs(char *path) } void -path_normalize(char* path) +path_normalize(char *path) { /* No-op. */ } @@ -310,8 +307,8 @@ path_normalize(char* path) void path_slash(char *path) { - if ((path[strlen(path)-1] != '/')) { - strcat(path, "/"); + if ((path[strlen(path) - 1] != '/')) { + strcat(path, "/"); } path_normalize(path); } @@ -322,22 +319,22 @@ plat_put_backslash(char *s) int c = strlen(s) - 1; if (s[c] != '/') - s[c] = '/'; + s[c] = '/'; } /* Return the last element of a pathname. */ char * plat_get_basename(const char *path) { - int c = (int)strlen(path); + int c = (int) strlen(path); while (c > 0) { - if (path[c] == '/') - return((char *)&path[c + 1]); - c--; + if (path[c] == '/') + return ((char *) &path[c + 1]); + c--; } - return((char *)path); + return ((char *) path); } char * path_get_filename(char *s) @@ -345,33 +342,31 @@ path_get_filename(char *s) int c = strlen(s) - 1; while (c > 0) { - if (s[c] == '/' || s[c] == '\\') - return(&s[c+1]); - c--; + if (s[c] == '/' || s[c] == '\\') + return (&s[c + 1]); + c--; } - return(s); + return (s); } - char * path_get_extension(char *s) { int c = strlen(s) - 1; if (c <= 0) - return(s); + return (s); while (c && s[c] != '.') - c--; + c--; if (!c) - return(&s[strlen(s)]); + return (&s[strlen(s)]); - return(&s[c+1]); + return (&s[c + 1]); } - void path_append_filename(char *dest, const char *s1, const char *s2) { @@ -384,8 +379,7 @@ int plat_dir_check(char *path) { struct stat dummy; - if (stat(path, &dummy) < 0) - { + if (stat(path, &dummy) < 0) { return 0; } return S_ISDIR(dummy.st_mode); @@ -403,7 +397,7 @@ plat_mmap(size_t size, uint8_t executable) #if defined __APPLE__ && defined MAP_JIT void *ret = mmap(0, size, PROT_READ | PROT_WRITE | (executable ? PROT_EXEC : 0), MAP_ANON | MAP_PRIVATE | (executable ? MAP_JIT : 0), -1, 0); #else - void *ret = mmap(0, size, PROT_READ | PROT_WRITE | (executable ? PROT_EXEC : 0), MAP_ANON | MAP_PRIVATE, -1, 0); + void *ret = mmap(0, size, PROT_READ | PROT_WRITE | (executable ? PROT_EXEC : 0), MAP_ANON | MAP_PRIVATE, -1, 0); #endif return (ret < 0) ? NULL : ret; } @@ -425,11 +419,11 @@ plat_get_ticks_common(void) { uint64_t EndingTime, ElapsedMicroseconds; if (first_use) { - Frequency = SDL_GetPerformanceFrequency(); - StartingTime = SDL_GetPerformanceCounter(); - first_use = 0; + Frequency = SDL_GetPerformanceFrequency(); + StartingTime = SDL_GetPerformanceCounter(); + first_use = 0; } - EndingTime = SDL_GetPerformanceCounter(); + EndingTime = SDL_GetPerformanceCounter(); ElapsedMicroseconds = ((EndingTime - StartingTime) * 1000000) / Frequency; return ElapsedMicroseconds; } @@ -437,16 +431,17 @@ plat_get_ticks_common(void) uint32_t plat_get_ticks(void) { - return (uint32_t)(plat_get_ticks_common() / 1000); + return (uint32_t) (plat_get_ticks_common() / 1000); } uint32_t plat_get_micro_ticks(void) { - return (uint32_t)plat_get_ticks_common(); + return (uint32_t) plat_get_ticks_common(); } -void plat_remove(char* path) +void +plat_remove(char *path) { remove(path); } @@ -454,13 +449,11 @@ void plat_remove(char* path) void ui_sb_update_icon_state(int tag, int state) { - } void ui_sb_update_icon(int tag, int active) { - } void @@ -472,54 +465,53 @@ plat_delay_ms(uint32_t count) void ui_sb_update_tip(int arg) { - } void ui_sb_update_panes() { - } void ui_sb_update_text() { - } void path_get_dirname(char *dest, const char *path) { - int c = (int)strlen(path); + int c = (int) strlen(path); char *ptr; - ptr = (char *)path; + ptr = (char *) path; while (c > 0) { - if (path[c] == '/' || path[c] == '\\') { - ptr = (char *)&path[c]; - break; - } - c--; + if (path[c] == '/' || path[c] == '\\') { + ptr = (char *) &path[c]; + break; + } + c--; } /* Copy to destination. */ while (path < ptr) - *dest++ = *path++; + *dest++ = *path++; *dest = '\0'; } volatile int cpu_thread_run = 1; -void ui_sb_set_text_w(wchar_t *wstr) +void +ui_sb_set_text_w(wchar_t *wstr) { - } -int stricmp(const char* s1, const char* s2) +int +stricmp(const char *s1, const char *s2) { return strcasecmp(s1, s2); } -int strnicmp(const char *s1, const char *s2, size_t n) +int +strnicmp(const char *s1, const char *s2, size_t n) { return strncasecmp(s1, s2, n); } @@ -528,55 +520,55 @@ void main_thread(void *param) { uint32_t old_time, new_time; - int drawits, frames; + int drawits, frames; SDL_SetThreadPriority(SDL_THREAD_PRIORITY_HIGH); framecountx = 0; - //title_update = 1; + // title_update = 1; old_time = SDL_GetTicks(); drawits = frames = 0; while (!is_quit && cpu_thread_run) { - /* See if it is time to run a frame of code. */ - new_time = SDL_GetTicks(); + /* See if it is time to run a frame of code. */ + new_time = SDL_GetTicks(); #ifdef USE_GDBSTUB - if (gdbstub_next_asap && (drawits <= 0)) - drawits = 10; - else + if (gdbstub_next_asap && (drawits <= 0)) + drawits = 10; + else #endif - drawits += (new_time - old_time); - old_time = new_time; - if (drawits > 0 && !dopause) { - /* Yes, so do one frame now. */ - drawits -= 10; - if (drawits > 50) - drawits = 0; + drawits += (new_time - old_time); + old_time = new_time; + if (drawits > 0 && !dopause) { + /* Yes, so do one frame now. */ + drawits -= 10; + if (drawits > 50) + drawits = 0; - /* Run a block of code. */ - pc_run(); + /* Run a block of code. */ + pc_run(); - /* Every 200 frames we save the machine status. */ - if (++frames >= 200 && nvr_dosave) { - nvr_save(); - nvr_dosave = 0; - frames = 0; - } - } else /* Just so we dont overload the host OS. */ - SDL_Delay(1); + /* Every 200 frames we save the machine status. */ + if (++frames >= 200 && nvr_dosave) { + nvr_save(); + nvr_dosave = 0; + frames = 0; + } + } else /* Just so we dont overload the host OS. */ + SDL_Delay(1); - /* If needed, handle a screen resize. */ - if (atomic_load(&doresize_monitors[0]) && !video_fullscreen && !is_quit) { - if (vid_resize & 2) - plat_resize(fixed_size_x, fixed_size_y); - else - plat_resize(scrnsz_x, scrnsz_y); - atomic_store(&doresize_monitors[0], 1); - } + /* If needed, handle a screen resize. */ + if (atomic_load(&doresize_monitors[0]) && !video_fullscreen && !is_quit) { + if (vid_resize & 2) + plat_resize(fixed_size_x, fixed_size_y); + else + plat_resize(scrnsz_x, scrnsz_y); + atomic_store(&doresize_monitors[0], 1); + } } is_quit = 1; } -thread_t* thMain = NULL; +thread_t *thMain = NULL; void do_start(void) @@ -595,21 +587,17 @@ do_start(void) void do_stop(void) { - if (SDL_ThreadID() != eventthread) - { + if (SDL_ThreadID() != eventthread) { exit_event = 1; return; } - if (blitreq) - { + if (blitreq) { blitreq = 0; video_blit_complete(); } - while(SDL_TryLockMutex(blitmtx) == SDL_MUTEX_TIMEDOUT) - { - if (blitreq) - { + while (SDL_TryLockMutex(blitmtx) == SDL_MUTEX_TIMEDOUT) { + if (blitreq) { blitreq = 0; video_blit_complete(); } @@ -624,44 +612,49 @@ do_stop(void) thMain = NULL; } -int ui_msgbox(int flags, void *message) +int +ui_msgbox(int flags, void *message) { return ui_msgbox_header(flags, NULL, message); } -int ui_msgbox_header(int flags, void *header, void* message) +int +ui_msgbox_header(int flags, void *header, void *message) { - SDL_MessageBoxData msgdata; + SDL_MessageBoxData msgdata; SDL_MessageBoxButtonData msgbtn; - if (!header) header = (flags & MBX_ANSI) ? "86Box" : L"86Box"; - if (header <= (void*)7168) header = plat_get_string(header); - if (message <= (void*)7168) message = plat_get_string(message); + if (!header) + header = (flags & MBX_ANSI) ? "86Box" : L"86Box"; + if (header <= (void *) 7168) + header = plat_get_string(header); + if (message <= (void *) 7168) + message = plat_get_string(message); msgbtn.buttonid = 1; - msgbtn.text = "OK"; - msgbtn.flags = 0; + msgbtn.text = "OK"; + msgbtn.flags = 0; memset(&msgdata, 0, sizeof(SDL_MessageBoxData)); msgdata.numbuttons = 1; - msgdata.buttons = &msgbtn; - int msgflags = 0; - if (msgflags & MBX_FATAL) msgflags |= SDL_MESSAGEBOX_ERROR; - else if (msgflags & MBX_ERROR || msgflags & MBX_WARNING) msgflags |= SDL_MESSAGEBOX_WARNING; - else msgflags |= SDL_MESSAGEBOX_INFORMATION; + msgdata.buttons = &msgbtn; + int msgflags = 0; + if (msgflags & MBX_FATAL) + msgflags |= SDL_MESSAGEBOX_ERROR; + else if (msgflags & MBX_ERROR || msgflags & MBX_WARNING) + msgflags |= SDL_MESSAGEBOX_WARNING; + else + msgflags |= SDL_MESSAGEBOX_INFORMATION; msgdata.flags = msgflags; - if (flags & MBX_ANSI) - { - int button = 0; - msgdata.title = header; + if (flags & MBX_ANSI) { + int button = 0; + msgdata.title = header; msgdata.message = message; SDL_ShowMessageBox(&msgdata, &button); return button; - } - else - { - int button = 0; - char *res = SDL_iconv_string("UTF-8", sizeof(wchar_t) == 2 ? "UTF-16LE" : "UTF-32LE", (char *)message, wcslen(message) * sizeof(wchar_t) + sizeof(wchar_t)); - char *res2 = SDL_iconv_string("UTF-8", sizeof(wchar_t) == 2 ? "UTF-16LE" : "UTF-32LE", (char *)header, wcslen(header) * sizeof(wchar_t) + sizeof(wchar_t)); + } else { + int button = 0; + char *res = SDL_iconv_string("UTF-8", sizeof(wchar_t) == 2 ? "UTF-16LE" : "UTF-32LE", (char *) message, wcslen(message) * sizeof(wchar_t) + sizeof(wchar_t)); + char *res2 = SDL_iconv_string("UTF-8", sizeof(wchar_t) == 2 ? "UTF-16LE" : "UTF-32LE", (char *) header, wcslen(header) * sizeof(wchar_t) + sizeof(wchar_t)); msgdata.message = res; - msgdata.title = res2; + msgdata.title = res2; SDL_ShowMessageBox(&msgdata, &button); free(res); free(res2); @@ -671,9 +664,10 @@ int ui_msgbox_header(int flags, void *header, void* message) return 0; } -void plat_get_exe_name(char *s, int size) +void +plat_get_exe_name(char *s, int size) { - char* basepath = SDL_GetBasePath(); + char *basepath = SDL_GetBasePath(); snprintf(s, size, "%s%s", basepath, basepath[strlen(basepath) - 1] == '/' ? "86box" : "/86box"); } @@ -691,65 +685,71 @@ plat_power_off(void) cpu_thread_run = 0; } -void ui_sb_bugui(char *str) +void +ui_sb_bugui(char *str) { - } -extern void sdl_blit(int x, int y, int w, int h); +extern void sdl_blit(int x, int y, int w, int h); -typedef struct mouseinputdata -{ +typedef struct mouseinputdata { int deltax, deltay, deltaz; int mousebuttons; } mouseinputdata; -SDL_mutex* mousemutex; +SDL_mutex *mousemutex; static mouseinputdata mousedata; -void mouse_poll() +void +mouse_poll() { SDL_LockMutex(mousemutex); - mouse_x = mousedata.deltax; - mouse_y = mousedata.deltay; - mouse_z = mousedata.deltaz; + mouse_x = mousedata.deltax; + mouse_y = mousedata.deltay; + mouse_z = mousedata.deltaz; mousedata.deltax = mousedata.deltay = mousedata.deltaz = 0; - mouse_buttons = mousedata.mousebuttons; + mouse_buttons = mousedata.mousebuttons; SDL_UnlockMutex(mousemutex); } - int real_sdl_w, real_sdl_h; -void ui_sb_set_ready(int ready) {} -char* xargv[512]; +void +ui_sb_set_ready(int ready) +{ +} +char *xargv[512]; // From musl. -char *local_strsep(char **str, const char *sep) +char * +local_strsep(char **str, const char *sep) { - char *s = *str, *end; - if (!s) return NULL; - end = s + strcspn(s, sep); - if (*end) *end++ = 0; - else end = 0; - *str = end; - return s; + char *s = *str, *end; + if (!s) + return NULL; + end = s + strcspn(s, sep); + if (*end) + *end++ = 0; + else + end = 0; + *str = end; + return s; } void plat_pause(int p) { static wchar_t oldtitle[512]; - wchar_t title[512]; + wchar_t title[512]; if ((p == 0) && (time_sync & TIME_SYNC_ENABLED)) - nvr_time_sync(); + nvr_time_sync(); dopause = p; if (p) { - wcsncpy(oldtitle, ui_window_title(NULL), sizeof_w(oldtitle) - 1); - wcscpy(title, oldtitle); - wcscat(title, L" - PAUSED"); - ui_window_title(title); + wcsncpy(oldtitle, ui_window_title(NULL), sizeof_w(oldtitle) - 1); + wcscpy(title, oldtitle); + wcscat(title, L" - PAUSED"); + ui_window_title(title); } else { - ui_window_title(oldtitle); + ui_window_title(oldtitle); } } @@ -783,9 +783,9 @@ plat_init_rom_paths() rom_add_path(home_rom_path); } if (getenv("XDG_DATA_DIRS")) { - char* xdg_rom_paths = strdup(getenv("XDG_DATA_DIRS")); - char* xdg_rom_paths_orig = xdg_rom_paths; - char* cur_xdg_rom_path = NULL; + char *xdg_rom_paths = strdup(getenv("XDG_DATA_DIRS")); + char *xdg_rom_paths_orig = xdg_rom_paths; + char *cur_xdg_rom_path = NULL; if (xdg_rom_paths) { while (xdg_rom_paths[strlen(xdg_rom_paths) - 1] == ':') { xdg_rom_paths[strlen(xdg_rom_paths) - 1] = '\0'; @@ -804,111 +804,101 @@ plat_init_rom_paths() rom_add_path("/usr/share/86Box/roms/"); } #else - char default_rom_path[1024] = { '\0 '}; + char default_rom_path[1024] = { '\0 ' }; getDefaultROMPath(default_rom_path); rom_add_path(default_rom_path); #endif } -bool process_media_commands_3(uint8_t* id, char* fn, uint8_t* wp, int cmdargc) +bool +process_media_commands_3(uint8_t *id, char *fn, uint8_t *wp, int cmdargc) { bool err = false; - *id = atoi(xargv[1]); - if (xargv[2][0] == '\'' || xargv[2][0] == '"') - { + *id = atoi(xargv[1]); + if (xargv[2][0] == '\'' || xargv[2][0] == '"') { int curarg = 2; - for (curarg = 2; curarg < cmdargc; curarg++) - { - if (strlen(fn) + strlen(xargv[curarg]) >= PATH_MAX) - { + for (curarg = 2; curarg < cmdargc; curarg++) { + if (strlen(fn) + strlen(xargv[curarg]) >= PATH_MAX) { err = true; fprintf(stderr, "Path name too long.\n"); } strcat(fn, xargv[curarg] + (xargv[curarg][0] == '\'' || xargv[curarg][0] == '"')); if (fn[strlen(fn) - 1] == '\'' - || fn[strlen(fn) - 1] == '"') - { - if (curarg + 1 < cmdargc) - { + || fn[strlen(fn) - 1] == '"') { + if (curarg + 1 < cmdargc) { *wp = atoi(xargv[curarg + 1]); } break; } strcat(fn, " "); } - } - else - { - if (strlen(xargv[2]) < PATH_MAX) - { + } else { + if (strlen(xargv[2]) < PATH_MAX) { strcpy(fn, xargv[2]); *wp = atoi(xargv[3]); - } - else - { + } else { fprintf(stderr, "Path name too long.\n"); err = true; } } if (fn[strlen(fn) - 1] == '\'' - || fn[strlen(fn) - 1] == '"') fn[strlen(fn) - 1] = '\0'; + || fn[strlen(fn) - 1] == '"') + fn[strlen(fn) - 1] = '\0'; return err; } -char* (*f_readline)(const char*) = NULL; -int (*f_add_history)(const char *) = NULL; +char *(*f_readline)(const char *) = NULL; +int (*f_add_history)(const char *) = NULL; void (*f_rl_callback_handler_remove)(void) = NULL; #ifdef __APPLE__ -#define LIBEDIT_LIBRARY "libedit.dylib" +# define LIBEDIT_LIBRARY "libedit.dylib" #else -#define LIBEDIT_LIBRARY "libedit.so" +# define LIBEDIT_LIBRARY "libedit.so" #endif -uint32_t timer_onesec(uint32_t interval, void* param) +uint32_t +timer_onesec(uint32_t interval, void *param) { - pc_onesec(); - return interval; + pc_onesec(); + return interval; } -void monitor_thread(void* param) +void +monitor_thread(void *param) { #ifndef USE_CLI - if (isatty(fileno(stdin)) && isatty(fileno(stdout))) - { - char* line = NULL; + if (isatty(fileno(stdin)) && isatty(fileno(stdout))) { + char *line = NULL; size_t n; printf("86Box monitor console.\n"); - while (!exit_event) - { - if (feof(stdin)) break; + while (!exit_event) { + if (feof(stdin)) + break; if (f_readline) line = f_readline("(86Box) "); - else - { + else { printf("(86Box) "); getline(&line, &n, stdin); } - if (line) - { - int cmdargc = 0; - char* linecpy; + if (line) { + int cmdargc = 0; + char *linecpy; line[strcspn(line, "\r\n")] = '\0'; - linecpy = strdup(line); - if (!linecpy) - { + linecpy = strdup(line); + if (!linecpy) { free(line); line = NULL; continue; } - if (f_add_history) f_add_history(line); + if (f_add_history) + f_add_history(line); memset(xargv, 0, sizeof(xargv)); - while(1) - { + while (1) { xargv[cmdargc++] = local_strsep(&linecpy, " "); - if (xargv[cmdargc - 1] == NULL || cmdargc >= 512) break; + if (xargv[cmdargc - 1] == NULL || cmdargc >= 512) + break; } cmdargc--; - if (strncasecmp(xargv[0], "help", 4) == 0) - { + if (strncasecmp(xargv[0], "help", 4) == 0) { printf( "fddload - Load floppy disk image into drive .\n" "cdload - Load CD-ROM image into drive .\n" @@ -924,33 +914,22 @@ void monitor_thread(void* param) "pause - pause the the emulated system.\n" "fullscreen - toggle fullscreen.\n" "exit - exit 86Box.\n"); - } - else if (strncasecmp(xargv[0], "exit", 4) == 0) - { + } else if (strncasecmp(xargv[0], "exit", 4) == 0) { exit_event = 1; - } - else if (strncasecmp(xargv[0], "fullscreen", 10) == 0) - { - video_fullscreen = video_fullscreen ? 0 : 1; + } else if (strncasecmp(xargv[0], "fullscreen", 10) == 0) { + video_fullscreen = video_fullscreen ? 0 : 1; fullscreen_pending = 1; - } - else if (strncasecmp(xargv[0], "pause", 5) == 0) - { + } else if (strncasecmp(xargv[0], "pause", 5) == 0) { plat_pause(dopause ^ 1); printf("%s", dopause ? "Paused.\n" : "Unpaused.\n"); - } - else if (strncasecmp(xargv[0], "hardreset", 9) == 0) - { + } else if (strncasecmp(xargv[0], "hardreset", 9) == 0) { pc_reset_hard(); - } - else if (strncasecmp(xargv[0], "cdload", 6) == 0 && cmdargc >= 3) - { + } else if (strncasecmp(xargv[0], "cdload", 6) == 0 && cmdargc >= 3) { uint8_t id; - bool err = false; - char fn[PATH_MAX]; + bool err = false; + char fn[PATH_MAX]; - if (!xargv[2] || !xargv[1]) - { + if (!xargv[2] || !xargv[1]) { free(line); free(linecpy); line = NULL; @@ -958,149 +937,118 @@ void monitor_thread(void* param) } id = atoi(xargv[1]); memset(fn, 0, sizeof(fn)); - if (xargv[2][0] == '\'' || xargv[2][0] == '"') - { + if (xargv[2][0] == '\'' || xargv[2][0] == '"') { int curarg = 2; - for (curarg = 2; curarg < cmdargc; curarg++) - { - if (strlen(fn) + strlen(xargv[curarg]) >= PATH_MAX) - { + for (curarg = 2; curarg < cmdargc; curarg++) { + if (strlen(fn) + strlen(xargv[curarg]) >= PATH_MAX) { err = true; fprintf(stderr, "Path name too long.\n"); } strcat(fn, xargv[curarg] + (xargv[curarg][0] == '\'' || xargv[curarg][0] == '"')); if (fn[strlen(fn) - 1] == '\'' - || fn[strlen(fn) - 1] == '"') - { + || fn[strlen(fn) - 1] == '"') { break; } strcat(fn, " "); } - } - else - { - if (strlen(xargv[2]) < PATH_MAX) - { + } else { + if (strlen(xargv[2]) < PATH_MAX) { strcpy(fn, xargv[2]); - } - else - { + } else { fprintf(stderr, "Path name too long.\n"); } } - if (!err) - { + if (!err) { if (fn[strlen(fn) - 1] == '\'' - || fn[strlen(fn) - 1] == '"') fn[strlen(fn) - 1] = '\0'; + || fn[strlen(fn) - 1] == '"') + fn[strlen(fn) - 1] = '\0'; printf("Inserting disc into CD-ROM drive %hhu: %s\n", id, fn); cdrom_mount(id, fn); } - } - else if (strncasecmp(xargv[0], "fddeject", 8) == 0 && cmdargc >= 2) - { + } else if (strncasecmp(xargv[0], "fddeject", 8) == 0 && cmdargc >= 2) { floppy_eject(atoi(xargv[1])); - } - else if (strncasecmp(xargv[0], "cdeject", 8) == 0 && cmdargc >= 2) - { + } else if (strncasecmp(xargv[0], "cdeject", 8) == 0 && cmdargc >= 2) { cdrom_mount(atoi(xargv[1]), ""); - } - else if (strncasecmp(xargv[0], "moeject", 8) == 0 && cmdargc >= 2) - { + } else if (strncasecmp(xargv[0], "moeject", 8) == 0 && cmdargc >= 2) { mo_eject(atoi(xargv[1])); - } - else if (strncasecmp(xargv[0], "carteject", 8) == 0 && cmdargc >= 2) - { + } else if (strncasecmp(xargv[0], "carteject", 8) == 0 && cmdargc >= 2) { cartridge_eject(atoi(xargv[1])); - } - else if (strncasecmp(xargv[0], "zipeject", 8) == 0 && cmdargc >= 2) - { + } else if (strncasecmp(xargv[0], "zipeject", 8) == 0 && cmdargc >= 2) { zip_eject(atoi(xargv[1])); - } - else if (strncasecmp(xargv[0], "fddload", 7) == 0 && cmdargc >= 4) - { + } else if (strncasecmp(xargv[0], "fddload", 7) == 0 && cmdargc >= 4) { uint8_t id, wp; - bool err = false; - char fn[PATH_MAX]; + bool err = false; + char fn[PATH_MAX]; memset(fn, 0, sizeof(fn)); - if (!xargv[2] || !xargv[1]) - { + if (!xargv[2] || !xargv[1]) { free(line); free(linecpy); line = NULL; continue; } err = process_media_commands_3(&id, fn, &wp, cmdargc); - if (!err) - { + if (!err) { if (fn[strlen(fn) - 1] == '\'' - || fn[strlen(fn) - 1] == '"') fn[strlen(fn) - 1] = '\0'; + || fn[strlen(fn) - 1] == '"') + fn[strlen(fn) - 1] = '\0'; printf("Inserting disk into floppy drive %c: %s\n", id + 'A', fn); floppy_mount(id, fn, wp); } - } - else if (strncasecmp(xargv[0], "moload", 7) == 0 && cmdargc >= 4) - { + } else if (strncasecmp(xargv[0], "moload", 7) == 0 && cmdargc >= 4) { uint8_t id, wp; - bool err = false; - char fn[PATH_MAX]; + bool err = false; + char fn[PATH_MAX]; memset(fn, 0, sizeof(fn)); - if (!xargv[2] || !xargv[1]) - { + if (!xargv[2] || !xargv[1]) { free(line); free(linecpy); line = NULL; continue; } err = process_media_commands_3(&id, fn, &wp, cmdargc); - if (!err) - { + if (!err) { if (fn[strlen(fn) - 1] == '\'' - || fn[strlen(fn) - 1] == '"') fn[strlen(fn) - 1] = '\0'; + || fn[strlen(fn) - 1] == '"') + fn[strlen(fn) - 1] = '\0'; printf("Inserting into mo drive %hhu: %s\n", id, fn); mo_mount(id, fn, wp); } - } - else if (strncasecmp(xargv[0], "cartload", 7) == 0 && cmdargc >= 4) - { + } else if (strncasecmp(xargv[0], "cartload", 7) == 0 && cmdargc >= 4) { uint8_t id, wp; - bool err = false; - char fn[PATH_MAX]; + bool err = false; + char fn[PATH_MAX]; memset(fn, 0, sizeof(fn)); - if (!xargv[2] || !xargv[1]) - { + if (!xargv[2] || !xargv[1]) { free(line); free(linecpy); line = NULL; continue; } err = process_media_commands_3(&id, fn, &wp, cmdargc); - if (!err) - { + if (!err) { if (fn[strlen(fn) - 1] == '\'' - || fn[strlen(fn) - 1] == '"') fn[strlen(fn) - 1] = '\0'; + || fn[strlen(fn) - 1] == '"') + fn[strlen(fn) - 1] = '\0'; printf("Inserting tape into cartridge holder %hhu: %s\n", id, fn); cartridge_mount(id, fn, wp); } - } - else if (strncasecmp(xargv[0], "zipload", 7) == 0 && cmdargc >= 4) - { + } else if (strncasecmp(xargv[0], "zipload", 7) == 0 && cmdargc >= 4) { uint8_t id, wp; - bool err = false; - char fn[PATH_MAX]; + bool err = false; + char fn[PATH_MAX]; memset(fn, 0, sizeof(fn)); - if (!xargv[2] || !xargv[1]) - { + if (!xargv[2] || !xargv[1]) { free(line); free(linecpy); line = NULL; continue; } err = process_media_commands_3(&id, fn, &wp, cmdargc); - if (!err) - { + if (!err) { if (fn[strlen(fn) - 1] == '\'' - || fn[strlen(fn) - 1] == '"') fn[strlen(fn) - 1] = '\0'; + || fn[strlen(fn) - 1] == '"') + fn[strlen(fn) - 1] = '\0'; printf("Inserting disk into ZIP drive %c: %s\n", id + 'A', fn); zip_mount(id, fn, wp); } @@ -1115,52 +1063,49 @@ void monitor_thread(void* param) } extern int gfxcard_2; -int main(int argc, char** argv) +int +main(int argc, char **argv) { SDL_Event event; - void* libedithandle; + void *libedithandle; SDL_Init(0); pc_init(argc, argv); - if (! pc_init_modules()) { + if (!pc_init_modules()) { ui_msgbox_header(MBX_FATAL, L"No ROMs found.", L"86Box could not find any usable ROM images.\n\nPlease download a ROM set and extract it into the \"roms\" directory."); SDL_Quit(); return 6; } - gfxcard_2 = 0; + gfxcard_2 = 0; eventthread = SDL_ThreadID(); - blitmtx = SDL_CreateMutex(); - if (!blitmtx) - { + blitmtx = SDL_CreateMutex(); + if (!blitmtx) { fprintf(stderr, "Failed to create blit mutex: %s", SDL_GetError()); return -1; } libedithandle = dlopen(LIBEDIT_LIBRARY, RTLD_LOCAL | RTLD_LAZY); - if (libedithandle) - { - f_readline = dlsym(libedithandle, "readline"); + if (libedithandle) { + f_readline = dlsym(libedithandle, "readline"); f_add_history = dlsym(libedithandle, "add_history"); - if (!f_readline) - { + if (!f_readline) { fprintf(stderr, "readline in libedit not found, line editing will be limited.\n"); } f_rl_callback_handler_remove = dlsym(libedithandle, "rl_callback_handler_remove"); - } - else fprintf(stderr, "libedit not found, line editing will be limited.\n"); + } else + fprintf(stderr, "libedit not found, line editing will be limited.\n"); mousemutex = SDL_CreateMutex(); sdl_initho(); - if (start_in_fullscreen) - { + if (start_in_fullscreen) { video_fullscreen = 1; - sdl_set_fs(1); + sdl_set_fs(1); } /* Fire up the machine. */ pc_reset_hard_init(); /* Set the PAUSE mode depending on the renderer. */ - //plat_pause(0); + // plat_pause(0); /* Initialize the rendering window, or fullscreen. */ @@ -1169,84 +1114,73 @@ int main(int argc, char** argv) thread_create(monitor_thread, NULL); #endif SDL_AddTimer(1000, timer_onesec, NULL); - while (!is_quit) - { + while (!is_quit) { static int mouse_inside = 0; - while (SDL_PollEvent(&event)) - { - switch(event.type) - { + while (SDL_PollEvent(&event)) { + switch (event.type) { case SDL_QUIT: exit_event = 1; break; case SDL_MOUSEWHEEL: - { - if (mouse_capture || video_fullscreen) { - if (event.wheel.direction == SDL_MOUSEWHEEL_FLIPPED) - { - event.wheel.x *= -1; - event.wheel.y *= -1; + if (mouse_capture || video_fullscreen) { + if (event.wheel.direction == SDL_MOUSEWHEEL_FLIPPED) { + event.wheel.x *= -1; + event.wheel.y *= -1; + } + SDL_LockMutex(mousemutex); + mousedata.deltaz = event.wheel.y; + SDL_UnlockMutex(mousemutex); } - SDL_LockMutex(mousemutex); - mousedata.deltaz = event.wheel.y; - SDL_UnlockMutex(mousemutex); + break; } - break; - } case SDL_MOUSEMOTION: - { - if (mouse_capture || video_fullscreen) { - SDL_LockMutex(mousemutex); - mousedata.deltax += event.motion.xrel; - mousedata.deltay += event.motion.yrel; - SDL_UnlockMutex(mousemutex); + if (mouse_capture || video_fullscreen) { + SDL_LockMutex(mousemutex); + mousedata.deltax += event.motion.xrel; + mousedata.deltay += event.motion.yrel; + SDL_UnlockMutex(mousemutex); + } + break; } - break; - } case SDL_MOUSEBUTTONDOWN: case SDL_MOUSEBUTTONUP: - { - if ((event.button.button == SDL_BUTTON_LEFT) - && !(mouse_capture || video_fullscreen) - && event.button.state == SDL_RELEASED - && mouse_inside) { - plat_mouse_capture(1); - break; - } - if (mouse_get_buttons() < 3 && event.button.button == SDL_BUTTON_MIDDLE && !video_fullscreen) - { - plat_mouse_capture(0); - break; - } - if (mouse_capture || video_fullscreen) - { - int buttonmask = 0; + if ((event.button.button == SDL_BUTTON_LEFT) + && !(mouse_capture || video_fullscreen) + && event.button.state == SDL_RELEASED + && mouse_inside) { + plat_mouse_capture(1); + break; + } + if (mouse_get_buttons() < 3 && event.button.button == SDL_BUTTON_MIDDLE && !video_fullscreen) { + plat_mouse_capture(0); + break; + } + if (mouse_capture || video_fullscreen) { + int buttonmask = 0; - switch(event.button.button) - { - case SDL_BUTTON_LEFT: - buttonmask = 1; - break; - case SDL_BUTTON_RIGHT: - buttonmask = 2; - break; - case SDL_BUTTON_MIDDLE: - buttonmask = 4; - break; + switch (event.button.button) { + case SDL_BUTTON_LEFT: + buttonmask = 1; + break; + case SDL_BUTTON_RIGHT: + buttonmask = 2; + break; + case SDL_BUTTON_MIDDLE: + buttonmask = 4; + break; + } + SDL_LockMutex(mousemutex); + if (event.button.state == SDL_PRESSED) { + mousedata.mousebuttons |= buttonmask; + } else + mousedata.mousebuttons &= ~buttonmask; + SDL_UnlockMutex(mousemutex); } - SDL_LockMutex(mousemutex); - if (event.button.state == SDL_PRESSED) - { - mousedata.mousebuttons |= buttonmask; - } - else mousedata.mousebuttons &= ~buttonmask; - SDL_UnlockMutex(mousemutex); + break; } - break; - } case SDL_RENDER_DEVICE_RESET: case SDL_RENDER_TARGETS_RESET: { @@ -1256,56 +1190,48 @@ int main(int argc, char** argv) } case SDL_KEYDOWN: case SDL_KEYUP: - { - uint16_t xtkey = 0; - switch(event.key.keysym.scancode) { - default: - xtkey = sdl_to_xt[event.key.keysym.scancode]; - break; + uint16_t xtkey = 0; + switch (event.key.keysym.scancode) { + default: + xtkey = sdl_to_xt[event.key.keysym.scancode]; + break; + } + keyboard_input(event.key.state == SDL_PRESSED, xtkey); } - keyboard_input(event.key.state == SDL_PRESSED, xtkey); - } case SDL_WINDOWEVENT: - { - switch (event.window.event) { - case SDL_WINDOWEVENT_ENTER: - mouse_inside = 1; - break; - case SDL_WINDOWEVENT_LEAVE: - mouse_inside = 0; - break; + switch (event.window.event) { + case SDL_WINDOWEVENT_ENTER: + mouse_inside = 1; + break; + case SDL_WINDOWEVENT_LEAVE: + mouse_inside = 0; + break; + } } - } } - } - if (mouse_capture && keyboard_ismsexit()) - { + } + if (mouse_capture && keyboard_ismsexit()) { plat_mouse_capture(0); } - if (blitreq) - { + if (blitreq) { extern void sdl_blit(int x, int y, int w, int h); sdl_blit(params.x, params.y, params.w, params.h); } - if (title_set) - { + if (title_set) { extern void ui_window_title_real(); ui_window_title_real(); } - if (video_fullscreen && keyboard_isfsexit()) - { + if (video_fullscreen && keyboard_isfsexit()) { sdl_set_fs(0); video_fullscreen = 0; } - if (fullscreen_pending) - { + if (fullscreen_pending) { sdl_set_fs(video_fullscreen); fullscreen_pending = 0; } - if (exit_event) - { + if (exit_event) { do_stop(); break; } @@ -1314,10 +1240,12 @@ int main(int argc, char** argv) SDL_DestroyMutex(blitmtx); SDL_DestroyMutex(mousemutex); SDL_Quit(); - if (f_rl_callback_handler_remove) f_rl_callback_handler_remove(); + if (f_rl_callback_handler_remove) + f_rl_callback_handler_remove(); return 0; } -char* plat_vidapi_name(int i) +char * +plat_vidapi_name(int i) { return "default"; } @@ -1328,9 +1256,9 @@ set_language(uint32_t id) lang_id = id; } - /* Sets up the program language before initialization. */ -uint32_t plat_language_code(char* langcode) +uint32_t +plat_language_code(char *langcode) { /* or maybe not */ return 0; @@ -1338,27 +1266,38 @@ uint32_t plat_language_code(char* langcode) /* Converts back the language code to LCID */ void -plat_language_code_r(uint32_t lcid, char* outbuf, int len) +plat_language_code_r(uint32_t lcid, char *outbuf, int len) { /* or maybe not */ return; } -void joystick_init(void) {} -void joystick_close(void) {} -void joystick_process(void) {} -void startblit() +void +joystick_init(void) +{ +} +void +joystick_close(void) +{ +} +void +joystick_process(void) +{ +} +void +startblit() { SDL_LockMutex(blitmtx); } -void endblit() +void +endblit() { SDL_UnlockMutex(blitmtx); } /* API */ void -ui_sb_mt32lcd(char* str) +ui_sb_mt32lcd(char *str) { } diff --git a/src/unix/unix_cdrom.c b/src/unix/unix_cdrom.c index 9eb3d962a..0419c6018 100644 --- a/src/unix/unix_cdrom.c +++ b/src/unix/unix_cdrom.c @@ -39,8 +39,6 @@ #include <86box/plat.h> #include <86box/ui.h> - - void cassette_mount(char *fn, uint8_t wp) { @@ -49,49 +47,45 @@ cassette_mount(char *fn, uint8_t wp) cassette_ui_writeprot = wp; pc_cas_set_fname(cassette, fn); if (fn != NULL) - memcpy(cassette_fname, fn, MIN(511, strlen(fn))); + memcpy(cassette_fname, fn, MIN(511, strlen(fn))); ui_sb_update_icon_state(SB_CASSETTE, (fn == NULL) ? 1 : 0); - //media_menu_update_cassette(); + // media_menu_update_cassette(); ui_sb_update_tip(SB_CASSETTE); config_save(); } - void cassette_eject(void) { pc_cas_set_fname(cassette, NULL); memset(cassette_fname, 0x00, sizeof(cassette_fname)); ui_sb_update_icon_state(SB_CASSETTE, 1); - //media_menu_update_cassette(); + // media_menu_update_cassette(); ui_sb_update_tip(SB_CASSETTE); config_save(); } - void cartridge_mount(uint8_t id, char *fn, uint8_t wp) { cart_close(id); cart_load(id, fn); ui_sb_update_icon_state(SB_CARTRIDGE | id, strlen(cart_fns[id]) ? 0 : 1); - //media_menu_update_cartridge(id); + // media_menu_update_cartridge(id); ui_sb_update_tip(SB_CARTRIDGE | id); config_save(); } - void cartridge_eject(uint8_t id) { cart_close(id); ui_sb_update_icon_state(SB_CARTRIDGE | id, 1); - //media_menu_update_cartridge(id); + // media_menu_update_cartridge(id); ui_sb_update_tip(SB_CARTRIDGE | id); config_save(); } - void floppy_mount(uint8_t id, char *fn, uint8_t wp) { @@ -99,36 +93,34 @@ floppy_mount(uint8_t id, char *fn, uint8_t wp) ui_writeprot[id] = wp; fdd_load(id, fn); ui_sb_update_icon_state(SB_FLOPPY | id, strlen(floppyfns[id]) ? 0 : 1); - //media_menu_update_floppy(id); + // media_menu_update_floppy(id); ui_sb_update_tip(SB_FLOPPY | id); config_save(); } - void floppy_eject(uint8_t id) { fdd_close(id); ui_sb_update_icon_state(SB_FLOPPY | id, 1); - //media_menu_update_floppy(id); + // media_menu_update_floppy(id); ui_sb_update_tip(SB_FLOPPY | id); config_save(); } - void plat_cdrom_ui_update(uint8_t id, uint8_t reload) { cdrom_t *drv = &cdrom[id]; if (drv->host_drive == 0) { - ui_sb_update_icon_state(SB_CDROM|id, 1); + ui_sb_update_icon_state(SB_CDROM | id, 1); } else { - ui_sb_update_icon_state(SB_CDROM|id, 0); + ui_sb_update_icon_state(SB_CDROM | id, 0); } - //media_menu_update_cdrom(id); - ui_sb_update_tip(SB_CDROM|id); + // media_menu_update_cdrom(id); + ui_sb_update_tip(SB_CDROM | id); } void @@ -137,20 +129,20 @@ cdrom_mount(uint8_t id, char *fn) cdrom[id].prev_host_drive = cdrom[id].host_drive; strcpy(cdrom[id].prev_image_path, cdrom[id].image_path); if (cdrom[id].ops && cdrom[id].ops->exit) - cdrom[id].ops->exit(&(cdrom[id])); + cdrom[id].ops->exit(&(cdrom[id])); cdrom[id].ops = NULL; memset(cdrom[id].image_path, 0, sizeof(cdrom[id].image_path)); cdrom_image_open(&(cdrom[id]), fn); /* Signal media change to the emulated machine. */ if (cdrom[id].insert) - cdrom[id].insert(cdrom[id].priv); + cdrom[id].insert(cdrom[id].priv); cdrom[id].host_drive = (strlen(cdrom[id].image_path) == 0) ? 0 : 200; if (cdrom[id].host_drive == 200) { - ui_sb_update_icon_state(SB_CDROM | id, 0); + ui_sb_update_icon_state(SB_CDROM | id, 0); } else { - ui_sb_update_icon_state(SB_CDROM | id, 1); + ui_sb_update_icon_state(SB_CDROM | id, 1); } - //media_menu_update_cdrom(id); + // media_menu_update_cdrom(id); ui_sb_update_tip(SB_CDROM | id); config_save(); } @@ -162,17 +154,16 @@ mo_eject(uint8_t id) mo_disk_close(dev); if (mo_drives[id].bus_type) { - /* Signal disk change to the emulated machine. */ - mo_insert(dev); + /* Signal disk change to the emulated machine. */ + mo_insert(dev); } ui_sb_update_icon_state(SB_MO | id, 1); - //media_menu_update_mo(id); + // media_menu_update_mo(id); ui_sb_update_tip(SB_MO | id); config_save(); } - void mo_mount(uint8_t id, char *fn, uint8_t wp) { @@ -184,13 +175,12 @@ mo_mount(uint8_t id, char *fn, uint8_t wp) mo_insert(dev); ui_sb_update_icon_state(SB_MO | id, strlen(mo_drives[id].image_path) ? 0 : 1); - //media_menu_update_mo(id); + // media_menu_update_mo(id); ui_sb_update_tip(SB_MO | id); config_save(); } - void mo_reload(uint8_t id) { @@ -198,13 +188,13 @@ mo_reload(uint8_t id) mo_disk_reload(dev); if (strlen(mo_drives[id].image_path) == 0) { - ui_sb_update_icon_state(SB_MO|id, 1); + ui_sb_update_icon_state(SB_MO | id, 1); } else { - ui_sb_update_icon_state(SB_MO|id, 0); + ui_sb_update_icon_state(SB_MO | id, 0); } - //media_menu_update_mo(id); - ui_sb_update_tip(SB_MO|id); + // media_menu_update_mo(id); + ui_sb_update_tip(SB_MO | id); config_save(); } @@ -216,17 +206,16 @@ zip_eject(uint8_t id) zip_disk_close(dev); if (zip_drives[id].bus_type) { - /* Signal disk change to the emulated machine. */ - zip_insert(dev); + /* Signal disk change to the emulated machine. */ + zip_insert(dev); } ui_sb_update_icon_state(SB_ZIP | id, 1); - //media_menu_update_zip(id); + // media_menu_update_zip(id); ui_sb_update_tip(SB_ZIP | id); config_save(); } - void zip_mount(uint8_t id, char *fn, uint8_t wp) { @@ -238,13 +227,12 @@ zip_mount(uint8_t id, char *fn, uint8_t wp) zip_insert(dev); ui_sb_update_icon_state(SB_ZIP | id, strlen(zip_drives[id].image_path) ? 0 : 1); - //media_menu_update_zip(id); + // media_menu_update_zip(id); ui_sb_update_tip(SB_ZIP | id); config_save(); } - void zip_reload(uint8_t id) { @@ -252,13 +240,13 @@ zip_reload(uint8_t id) zip_disk_reload(dev); if (strlen(zip_drives[id].image_path) == 0) { - ui_sb_update_icon_state(SB_ZIP|id, 1); + ui_sb_update_icon_state(SB_ZIP | id, 1); } else { - ui_sb_update_icon_state(SB_ZIP|id, 0); + ui_sb_update_icon_state(SB_ZIP | id, 0); } - //media_menu_update_zip(id); - ui_sb_update_tip(SB_ZIP|id); + // media_menu_update_zip(id); + ui_sb_update_tip(SB_ZIP | id); config_save(); } diff --git a/src/unix/unix_sdl.c b/src/unix/unix_sdl.c index b023299d2..bd2f3937b 100644 --- a/src/unix/unix_sdl.c +++ b/src/unix/unix_sdl.c @@ -18,34 +18,33 @@ #include <86box/version.h> #include <86box/unix_sdl.h> -#define RENDERER_FULL_SCREEN 1 -#define RENDERER_HARDWARE 2 -#define RENDERER_OPENGL 4 +#define RENDERER_FULL_SCREEN 1 +#define RENDERER_HARDWARE 2 +#define RENDERER_OPENGL 4 -typedef struct sdl_blit_params -{ +typedef struct sdl_blit_params { int x, y, w, h; } sdl_blit_params; extern sdl_blit_params params; -extern int blitreq; +extern int blitreq; -SDL_Window *sdl_win = NULL; -SDL_Renderer *sdl_render = NULL; -static SDL_Texture *sdl_tex = NULL; -int sdl_w = SCREEN_RES_X, sdl_h = SCREEN_RES_Y; -static int sdl_fs, sdl_flags = -1; -static int cur_w, cur_h; -static int cur_wx = 0, cur_wy = 0, cur_ww =0, cur_wh = 0; -static volatile int sdl_enabled = 1; -static SDL_mutex* sdl_mutex = NULL; -int mouse_capture; -int title_set = 0; -int resize_pending = 0; -int resize_w = 0; -int resize_h = 0; -double mouse_sensitivity = 1.0; /* Unused. */ -double mouse_x_error = 0.0, mouse_y_error = 0.0; /* Unused. */ -static uint8_t interpixels[17842176]; +SDL_Window *sdl_win = NULL; +SDL_Renderer *sdl_render = NULL; +static SDL_Texture *sdl_tex = NULL; +int sdl_w = SCREEN_RES_X, sdl_h = SCREEN_RES_Y; +static int sdl_fs, sdl_flags = -1; +static int cur_w, cur_h; +static int cur_wx = 0, cur_wy = 0, cur_ww = 0, cur_wh = 0; +static volatile int sdl_enabled = 1; +static SDL_mutex *sdl_mutex = NULL; +int mouse_capture; +int title_set = 0; +int resize_pending = 0; +int resize_w = 0; +int resize_h = 0; +double mouse_sensitivity = 1.0; /* Unused. */ +double mouse_x_error = 0.0, mouse_y_error = 0.0; /* Unused. */ +static uint8_t interpixels[17842176]; extern void RenderImGui(); static void @@ -54,11 +53,11 @@ sdl_integer_scale(double *d, double *g) double ratio; if (*d > *g) { - ratio = floor(*d / *g); - *d = *g * ratio; + ratio = floor(*d / *g); + *d = *g * ratio; } else { - ratio = ceil(*d / *g); - *d = *g / ratio; + ratio = ceil(*d / *g); + *d = *g / ratio; } } @@ -68,66 +67,65 @@ static void sdl_stretch(int *w, int *h, int *x, int *y) { double hw, gw, hh, gh, dx, dy, dw, dh, gsr, hsr; - int real_sdl_w, real_sdl_h; + int real_sdl_w, real_sdl_h; SDL_GL_GetDrawableSize(sdl_win, &real_sdl_w, &real_sdl_h); - hw = (double) real_sdl_w; - hh = (double) real_sdl_h; - gw = (double) *w; - gh = (double) *h; + hw = (double) real_sdl_w; + hh = (double) real_sdl_h; + gw = (double) *w; + gh = (double) *h; hsr = hw / hh; switch (video_fullscreen_scale) { - case FULLSCR_SCALE_FULL: - default: - *w = real_sdl_w; - *h = real_sdl_h; - *x = 0; - *y = 0; - break; - case FULLSCR_SCALE_43: - case FULLSCR_SCALE_KEEPRATIO: - if (video_fullscreen_scale == FULLSCR_SCALE_43) - gsr = 4.0 / 3.0; - else - gsr = gw / gh; - if (gsr <= hsr) { - dw = hh * gsr; - dh = hh; - } else { - dw = hw; - dh = hw / gsr; - } - dx = (hw - dw) / 2.0; - dy = (hh - dh) / 2.0; - *w = (int) dw; - *h = (int) dh; - *x = (int) dx; - *y = (int) dy; - break; - case FULLSCR_SCALE_INT: - gsr = gw / gh; - if (gsr <= hsr) { - dw = hh * gsr; - dh = hh; - } else { - dw = hw; - dh = hw / gsr; - } - sdl_integer_scale(&dw, &gw); - sdl_integer_scale(&dh, &gh); - dx = (hw - dw) / 2.0; - dy = (hh - dh) / 2.0; - *w = (int) dw; - *h = (int) dh; - *x = (int) dx; - *y = (int) dy; - break; + case FULLSCR_SCALE_FULL: + default: + *w = real_sdl_w; + *h = real_sdl_h; + *x = 0; + *y = 0; + break; + case FULLSCR_SCALE_43: + case FULLSCR_SCALE_KEEPRATIO: + if (video_fullscreen_scale == FULLSCR_SCALE_43) + gsr = 4.0 / 3.0; + else + gsr = gw / gh; + if (gsr <= hsr) { + dw = hh * gsr; + dh = hh; + } else { + dw = hw; + dh = hw / gsr; + } + dx = (hw - dw) / 2.0; + dy = (hh - dh) / 2.0; + *w = (int) dw; + *h = (int) dh; + *x = (int) dx; + *y = (int) dy; + break; + case FULLSCR_SCALE_INT: + gsr = gw / gh; + if (gsr <= hsr) { + dw = hh * gsr; + dh = hh; + } else { + dw = hw; + dh = hw / gsr; + } + sdl_integer_scale(&dw, &gw); + sdl_integer_scale(&dh, &gh); + dx = (hw - dw) / 2.0; + dy = (hh - dh) / 2.0; + *w = (int) dw; + *h = (int) dh; + *x = (int) dx; + *y = (int) dy; + break; } } - void sdl_blit_shim(int x, int y, int w, int h, int monitor_index) { @@ -136,9 +134,9 @@ sdl_blit_shim(int x, int y, int w, int h, int monitor_index) params.w = w; params.h = h; if (!(!sdl_enabled || (x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (buffer32 == NULL) || (sdl_render == NULL) || (sdl_tex == NULL)) || (monitor_index >= 1)) - video_copy(interpixels, &(buffer32->line[y][x]), h * 2048 * sizeof(uint32_t)); + video_copy(interpixels, &(buffer32->line[y][x]), h * 2048 * sizeof(uint32_t)); if (screenshots) - video_screenshot(interpixels, 0, 0, 2048); + video_screenshot(interpixels, 0, 0, 2048); blitreq = 1; video_blit_complete_monitor(monitor_index); } @@ -146,30 +144,26 @@ sdl_blit_shim(int x, int y, int w, int h, int monitor_index) void ui_window_title_real(); void -sdl_real_blit(SDL_Rect* r_src) +sdl_real_blit(SDL_Rect *r_src) { SDL_Rect r_dst; - int ret, winx, winy; + int ret, winx, winy; SDL_GL_GetDrawableSize(sdl_win, &winx, &winy); SDL_RenderClear(sdl_render); - r_dst = *r_src; + r_dst = *r_src; r_dst.x = r_dst.y = 0; - if (sdl_fs) - { - sdl_stretch(&r_dst.w, &r_dst.h, &r_dst.x, &r_dst.y); + if (sdl_fs) { + sdl_stretch(&r_dst.w, &r_dst.h, &r_dst.x, &r_dst.y); + } else { + r_dst.w *= ((float) winx / (float) r_dst.w); + r_dst.h *= ((float) winy / (float) r_dst.h); } - else - { - r_dst.w *= ((float)winx / (float) r_dst.w); - r_dst.h *= ((float)winy / (float) r_dst.h); - } - ret = SDL_RenderCopy(sdl_render, sdl_tex, r_src, &r_dst); if (ret) - fprintf(stderr, "SDL: unable to copy texture to renderer (%s)\n", SDL_GetError()); + fprintf(stderr, "SDL: unable to copy texture to renderer (%s)\n", SDL_GetError()); SDL_RenderPresent(sdl_render); } @@ -180,20 +174,20 @@ sdl_blit(int x, int y, int w, int h) SDL_Rect r_src; if (!sdl_enabled || (x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (buffer32 == NULL) || (sdl_render == NULL) || (sdl_tex == NULL)) { - r_src.x = x; - r_src.y = y; - r_src.w = w; - r_src.h = h; - sdl_real_blit(&r_src); - blitreq = 0; - return; + r_src.x = x; + r_src.y = y; + r_src.w = w; + r_src.h = h; + sdl_real_blit(&r_src); + blitreq = 0; + return; } SDL_LockMutex(sdl_mutex); - if (resize_pending) - { - if (!video_fullscreen) sdl_resize(resize_w, resize_h); + if (resize_pending) { + if (!video_fullscreen) + sdl_resize(resize_w, resize_h); resize_pending = 0; } r_src.x = x; @@ -211,27 +205,24 @@ static void sdl_destroy_window(void) { if (sdl_win != NULL) { - if (window_remember) - { - SDL_GetWindowSize(sdl_win, &window_w, &window_h); - if (strncasecmp(SDL_GetCurrentVideoDriver(), "wayland", 7) != 0) - { - SDL_GetWindowPosition(sdl_win, &window_x, &window_y); + if (window_remember) { + SDL_GetWindowSize(sdl_win, &window_w, &window_h); + if (strncasecmp(SDL_GetCurrentVideoDriver(), "wayland", 7) != 0) { + SDL_GetWindowPosition(sdl_win, &window_x, &window_y); + } } - } - SDL_DestroyWindow(sdl_win); - sdl_win = NULL; + SDL_DestroyWindow(sdl_win); + sdl_win = NULL; } } - static void sdl_destroy_texture(void) { /* SDL_DestroyRenderer also automatically destroys all associated textures. */ if (sdl_render != NULL) { - SDL_DestroyRenderer(sdl_render); - sdl_render = NULL; + SDL_DestroyRenderer(sdl_render); + sdl_render = NULL; } } @@ -239,17 +230,17 @@ void sdl_close(void) { if (sdl_mutex != NULL) - SDL_LockMutex(sdl_mutex); + SDL_LockMutex(sdl_mutex); /* Unregister our renderer! */ video_setblit(NULL); if (sdl_enabled) - sdl_enabled = 0; + sdl_enabled = 0; if (sdl_mutex != NULL) { - SDL_DestroyMutex(sdl_mutex); - sdl_mutex = NULL; + SDL_DestroyMutex(sdl_mutex); + sdl_mutex = NULL; } sdl_destroy_texture(); @@ -266,14 +257,14 @@ void sdl_enable(int enable) { if (sdl_flags == -1) - return; + return; SDL_LockMutex(sdl_mutex); sdl_enabled = !!enable; if (enable == 1) { - SDL_SetWindowSize(sdl_win, cur_ww, cur_wh); - sdl_reinit_texture(); + SDL_SetWindowSize(sdl_win, cur_ww, cur_wh); + sdl_reinit_texture(); } SDL_UnlockMutex(sdl_mutex); @@ -282,16 +273,15 @@ sdl_enable(int enable) static void sdl_select_best_hw_driver(void) { - int i; + int i; SDL_RendererInfo renderInfo; - for (i = 0; i < SDL_GetNumRenderDrivers(); ++i) - { - SDL_GetRenderDriverInfo(i, &renderInfo); - if (renderInfo.flags & SDL_RENDERER_ACCELERATED) { - SDL_SetHint(SDL_HINT_RENDER_DRIVER, renderInfo.name); - return; - } + for (i = 0; i < SDL_GetNumRenderDrivers(); ++i) { + SDL_GetRenderDriverInfo(i, &renderInfo); + if (renderInfo.flags & SDL_RENDERER_ACCELERATED) { + SDL_SetHint(SDL_HINT_RENDER_DRIVER, renderInfo.name); + return; + } } } @@ -301,14 +291,13 @@ sdl_reinit_texture() sdl_destroy_texture(); if (sdl_flags & RENDERER_HARDWARE) { - sdl_render = SDL_CreateRenderer(sdl_win, -1, SDL_RENDERER_ACCELERATED); - SDL_SetHint(SDL_HINT_RENDER_SCALE_QUALITY, video_filter_method ? "1" : "0"); + sdl_render = SDL_CreateRenderer(sdl_win, -1, SDL_RENDERER_ACCELERATED); + SDL_SetHint(SDL_HINT_RENDER_SCALE_QUALITY, video_filter_method ? "1" : "0"); } else - sdl_render = SDL_CreateRenderer(sdl_win, -1, SDL_RENDERER_SOFTWARE); + sdl_render = SDL_CreateRenderer(sdl_win, -1, SDL_RENDERER_SOFTWARE); sdl_tex = SDL_CreateTexture(sdl_render, SDL_PIXELFORMAT_ARGB8888, - SDL_TEXTUREACCESS_STREAMING, 2048, 2048); - + SDL_TEXTUREACCESS_STREAMING, 2048, 2048); } void @@ -316,14 +305,14 @@ sdl_set_fs(int fs) { SDL_LockMutex(sdl_mutex); SDL_SetWindowFullscreen(sdl_win, fs ? SDL_WINDOW_FULLSCREEN_DESKTOP : 0); - SDL_SetRelativeMouseMode((SDL_bool)mouse_capture); + SDL_SetRelativeMouseMode((SDL_bool) mouse_capture); sdl_fs = fs; if (fs) - sdl_flags |= RENDERER_FULL_SCREEN; + sdl_flags |= RENDERER_FULL_SCREEN; else - sdl_flags &= ~RENDERER_FULL_SCREEN; + sdl_flags &= ~RENDERER_FULL_SCREEN; sdl_reinit_texture(); SDL_UnlockMutex(sdl_mutex); @@ -335,10 +324,10 @@ sdl_resize(int x, int y) int ww = 0, wh = 0, wx = 0, wy = 0; if (video_fullscreen & 2) - return; + return; if ((x == cur_w) && (y == cur_h)) - return; + return; SDL_LockMutex(sdl_mutex); @@ -363,19 +352,18 @@ sdl_resize(int x, int y) void sdl_reload(void) { - if (sdl_flags & RENDERER_HARDWARE) - { - SDL_LockMutex(sdl_mutex); + if (sdl_flags & RENDERER_HARDWARE) { + SDL_LockMutex(sdl_mutex); - SDL_SetHint(SDL_HINT_RENDER_SCALE_QUALITY, video_filter_method ? "1" : "0"); - sdl_reinit_texture(); + SDL_SetHint(SDL_HINT_RENDER_SCALE_QUALITY, video_filter_method ? "1" : "0"); + sdl_reinit_texture(); - SDL_UnlockMutex(sdl_mutex); - } + SDL_UnlockMutex(sdl_mutex); + } } int -plat_vidapi(char* api) +plat_vidapi(char *api) { return 0; } @@ -383,7 +371,7 @@ plat_vidapi(char* api) static int sdl_init_common(int flags) { - wchar_t temp[128]; + wchar_t temp[128]; SDL_version ver; /* Get and log the version of the DLL we are using. */ @@ -392,30 +380,27 @@ sdl_init_common(int flags) /* Initialize the SDL system. */ if (SDL_Init(SDL_INIT_VIDEO) < 0) { - fprintf(stderr, "SDL: initialization failed (%s)\n", SDL_GetError()); - return(0); + fprintf(stderr, "SDL: initialization failed (%s)\n", SDL_GetError()); + return (0); } if (flags & RENDERER_HARDWARE) { - if (flags & RENDERER_OPENGL) { - SDL_SetHint(SDL_HINT_RENDER_DRIVER, "OpenGL"); - } - else - sdl_select_best_hw_driver(); + if (flags & RENDERER_OPENGL) { + SDL_SetHint(SDL_HINT_RENDER_DRIVER, "OpenGL"); + } else + sdl_select_best_hw_driver(); } sdl_mutex = SDL_CreateMutex(); - sdl_win = SDL_CreateWindow("86Box", strncasecmp(SDL_GetCurrentVideoDriver(), "wayland", 7) != 0 && window_remember ? window_x : SDL_WINDOWPOS_CENTERED, strncasecmp(SDL_GetCurrentVideoDriver(), "wayland", 7) != 0 && window_remember ? window_y : SDL_WINDOWPOS_CENTERED, scrnsz_x, scrnsz_y, SDL_WINDOW_OPENGL | (vid_resize & 1 ? SDL_WINDOW_RESIZABLE : 0)); + sdl_win = SDL_CreateWindow("86Box", strncasecmp(SDL_GetCurrentVideoDriver(), "wayland", 7) != 0 && window_remember ? window_x : SDL_WINDOWPOS_CENTERED, strncasecmp(SDL_GetCurrentVideoDriver(), "wayland", 7) != 0 && window_remember ? window_y : SDL_WINDOWPOS_CENTERED, scrnsz_x, scrnsz_y, SDL_WINDOW_OPENGL | (vid_resize & 1 ? SDL_WINDOW_RESIZABLE : 0)); sdl_set_fs(video_fullscreen); - if (!(video_fullscreen & 1)) - { + if (!(video_fullscreen & 1)) { if (vid_resize & 2) - plat_resize(fixed_size_x, fixed_size_y); + plat_resize(fixed_size_x, fixed_size_y); else - plat_resize(scrnsz_x, scrnsz_y); + plat_resize(scrnsz_x, scrnsz_y); } - if ((vid_resize < 2) && window_remember) - { + if ((vid_resize < 2) && window_remember) { SDL_SetWindowSize(sdl_win, window_w, window_h); } @@ -427,7 +412,7 @@ sdl_init_common(int flags) sdl_enabled = 1; - return(1); + return (1); } int @@ -436,61 +421,58 @@ sdl_inits() return sdl_init_common(0); } - int sdl_inith() { return sdl_init_common(RENDERER_HARDWARE); } - int sdl_initho() { return sdl_init_common(RENDERER_HARDWARE | RENDERER_OPENGL); } - int sdl_pause(void) { - return(0); + return (0); } void plat_mouse_capture(int on) { SDL_LockMutex(sdl_mutex); - SDL_SetRelativeMouseMode((SDL_bool)on); + SDL_SetRelativeMouseMode((SDL_bool) on); mouse_capture = on; SDL_UnlockMutex(sdl_mutex); } -void plat_resize(int w, int h) +void +plat_resize(int w, int h) { SDL_LockMutex(sdl_mutex); - resize_w = w; - resize_h = h; + resize_w = w; + resize_h = h; resize_pending = 1; SDL_UnlockMutex(sdl_mutex); } -wchar_t sdl_win_title[512] = { L'8', L'6', L'B', L'o', L'x', 0 }; -SDL_mutex* titlemtx = NULL; +wchar_t sdl_win_title[512] = { L'8', L'6', L'B', L'o', L'x', 0 }; +SDL_mutex *titlemtx = NULL; -void ui_window_title_real() +void +ui_window_title_real() { - char* res; - if (sizeof(wchar_t) == 1) - { - SDL_SetWindowTitle(sdl_win, (char*)sdl_win_title); + char *res; + if (sizeof(wchar_t) == 1) { + SDL_SetWindowTitle(sdl_win, (char *) sdl_win_title); return; } - res = SDL_iconv_string("UTF-8", sizeof(wchar_t) == 2 ? "UTF-16LE" : "UTF-32LE", (char*)sdl_win_title, wcslen(sdl_win_title) * sizeof(wchar_t) + sizeof(wchar_t)); - if (res) - { + res = SDL_iconv_string("UTF-8", sizeof(wchar_t) == 2 ? "UTF-16LE" : "UTF-32LE", (char *) sdl_win_title, wcslen(sdl_win_title) * sizeof(wchar_t) + sizeof(wchar_t)); + if (res) { SDL_SetWindowTitle(sdl_win, res); - SDL_free((void*)res); + SDL_free((void *) res); } title_set = 0; } @@ -498,9 +480,11 @@ extern SDL_threadID eventthread; /* Only activate threading path on macOS, otherwise it will softlock Xorg. Wayland doesn't seem to have this issue. */ -wchar_t* ui_window_title(wchar_t* str) +wchar_t * +ui_window_title(wchar_t *str) { - if (!str) return sdl_win_title; + if (!str) + return sdl_win_title; #ifdef __APPLE__ if (eventthread == SDL_ThreadID()) #endif @@ -518,10 +502,17 @@ wchar_t* ui_window_title(wchar_t* str) return str; } -void ui_init_monitor(int monitor_index) {} -void ui_deinit_monitor(int monitor_index) {} +void +ui_init_monitor(int monitor_index) +{ +} +void +ui_deinit_monitor(int monitor_index) +{ +} -void plat_resize_request(int w, int h, int monitor_index) +void +plat_resize_request(int w, int h, int monitor_index) { atomic_store((&doresize_monitors[monitor_index]), 1); } diff --git a/src/unix/unix_thread.c b/src/unix/unix_thread.c index 5221d90eb..268545719 100644 --- a/src/unix/unix_thread.c +++ b/src/unix/unix_thread.c @@ -7,30 +7,23 @@ #include <86box/plat.h> #include <86box/thread.h> - -typedef struct event_pthread_t -{ - pthread_cond_t cond; - pthread_mutex_t mutex; - int state; +typedef struct event_pthread_t { + pthread_cond_t cond; + pthread_mutex_t mutex; + int state; } event_pthread_t; - -typedef struct thread_param -{ - void (*thread_rout)(void*); - void * param; +typedef struct thread_param { + void (*thread_rout)(void *); + void *param; } thread_param; - -typedef struct pt_mutex_t -{ - pthread_mutex_t mutex; +typedef struct pt_mutex_t { + pthread_mutex_t mutex; } pt_mutex_t; - void * -thread_run_wrapper(thread_param* arg) +thread_run_wrapper(thread_param *arg) { thread_param localparam = *arg; free(arg); @@ -38,28 +31,25 @@ thread_run_wrapper(thread_param* arg) return NULL; } - thread_t * thread_create(void (*thread_rout)(void *param), void *param) { - pthread_t *thread = malloc(sizeof(pthread_t)); + pthread_t *thread = malloc(sizeof(pthread_t)); thread_param *thrparam = malloc(sizeof(thread_param)); - thrparam->thread_rout = thread_rout; - thrparam->param = param; + thrparam->thread_rout = thread_rout; + thrparam->param = param; - pthread_create(thread, NULL, (void* (*)(void*))thread_run_wrapper, thrparam); + pthread_create(thread, NULL, (void *(*) (void *) ) thread_run_wrapper, thrparam); return thread; } - int thread_wait(thread_t *arg) { - return pthread_join(*(pthread_t*)(arg), NULL); + return pthread_join(*(pthread_t *) (arg), NULL); } - event_t * thread_create_event() { @@ -69,14 +59,13 @@ thread_create_event() pthread_mutex_init(&event->mutex, NULL); event->state = 0; - return (event_t *)event; + return (event_t *) event; } - void thread_set_event(event_t *handle) { - event_pthread_t *event = (event_pthread_t *)handle; + event_pthread_t *event = (event_pthread_t *) handle; pthread_mutex_lock(&event->mutex); event->state = 1; @@ -84,48 +73,45 @@ thread_set_event(event_t *handle) pthread_mutex_unlock(&event->mutex); } - void thread_reset_event(event_t *handle) { - event_pthread_t *event = (event_pthread_t *)handle; + event_pthread_t *event = (event_pthread_t *) handle; pthread_mutex_lock(&event->mutex); event->state = 0; pthread_mutex_unlock(&event->mutex); } - int thread_wait_event(event_t *handle, int timeout) { - event_pthread_t *event = (event_pthread_t *)handle; - struct timespec abstime; + event_pthread_t *event = (event_pthread_t *) handle; + struct timespec abstime; clock_gettime(CLOCK_REALTIME, &abstime); abstime.tv_nsec += (timeout % 1000) * 1000000; abstime.tv_sec += (timeout / 1000); if (abstime.tv_nsec > 1000000000) { - abstime.tv_nsec -= 1000000000; - abstime.tv_sec++; + abstime.tv_nsec -= 1000000000; + abstime.tv_sec++; } pthread_mutex_lock(&event->mutex); if (timeout == -1) { - while (!event->state) - pthread_cond_wait(&event->cond, &event->mutex); + while (!event->state) + pthread_cond_wait(&event->cond, &event->mutex); } else if (!event->state) - pthread_cond_timedwait(&event->cond, &event->mutex, &abstime); + pthread_cond_timedwait(&event->cond, &event->mutex, &abstime); pthread_mutex_unlock(&event->mutex); return 0; } - void thread_destroy_event(event_t *handle) { - event_pthread_t *event = (event_pthread_t *)handle; + event_pthread_t *event = (event_pthread_t *) handle; pthread_cond_destroy(&event->cond); pthread_mutex_destroy(&event->mutex); @@ -133,7 +119,6 @@ thread_destroy_event(event_t *handle) free(event); } - mutex_t * thread_create_mutex(void) { @@ -144,46 +129,40 @@ thread_create_mutex(void) return mutex; } - int thread_wait_mutex(mutex_t *_mutex) { if (_mutex == NULL) - return(0); - pt_mutex_t *mutex = (pt_mutex_t *)_mutex; + return (0); + pt_mutex_t *mutex = (pt_mutex_t *) _mutex; - return - pthread_mutex_lock(&mutex->mutex) != 0; + return pthread_mutex_lock(&mutex->mutex) != 0; } - int thread_test_mutex(mutex_t *_mutex) { if (_mutex == NULL) - return(0); - pt_mutex_t *mutex = (pt_mutex_t *)_mutex; + return (0); + pt_mutex_t *mutex = (pt_mutex_t *) _mutex; - return - pthread_mutex_trylock(&mutex->mutex) != 0; + return pthread_mutex_trylock(&mutex->mutex) != 0; } - int thread_release_mutex(mutex_t *_mutex) { if (_mutex == NULL) - return(0); - pt_mutex_t *mutex = (pt_mutex_t *)_mutex; + return (0); + pt_mutex_t *mutex = (pt_mutex_t *) _mutex; return pthread_mutex_unlock(&mutex->mutex) != 0; } - void thread_close_mutex(mutex_t *_mutex) { - pt_mutex_t *mutex = (pt_mutex_t *)_mutex; + pt_mutex_t *mutex = (pt_mutex_t *) _mutex; pthread_mutex_destroy(&mutex->mutex); From a225c9433b92098746af483309afd0fc462e426b Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:17:41 -0400 Subject: [PATCH 368/386] clang-format in src/video/ --- src/video/agpgart.c | 6 +++--- src/video/video.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/video/agpgart.c b/src/video/agpgart.c index e84a2dd85..0a594a8d3 100644 --- a/src/video/agpgart.c +++ b/src/video/agpgart.c @@ -52,9 +52,9 @@ agpgart_set_aperture(agpgart_t *dev, uint32_t base, uint32_t size, int enable) mem_mapping_disable(&dev->aperture_mapping); /* Set new aperture base address, size, mask and enable. */ - dev->aperture_base = base; - dev->aperture_size = size; - dev->aperture_mask = size - 1; + dev->aperture_base = base; + dev->aperture_size = size; + dev->aperture_mask = size - 1; dev->aperture_enable = enable; /* Enable new aperture mapping if requested. */ diff --git a/src/video/video.c b/src/video/video.c index 37a0fe9fc..2dfe48ab9 100644 --- a/src/video/video.c +++ b/src/video/video.c @@ -1023,7 +1023,7 @@ loadfont_common(FILE *f, int format) fontdat8x12[c][d] = fgetc(f) & 0xff; break; - case 5: /* Toshiba 3100e */ + case 5: /* Toshiba 3100e */ for (d = 0; d < 2048; d += 512) { /* Four languages... */ for (c = d; c < d + 256; c++) { (void) !fread(&fontdatm[c][8], 1, 8, f); From 3fddf4d48866952900a6cffed0996eb10d9e9df5 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:17:57 -0400 Subject: [PATCH 369/386] clang-format in src/machine/ --- src/machine/m_amstrad.c | 2 +- src/machine/m_at_socket7_3v.c | 2 - src/machine/m_xt_t1000_vid.c | 4 +- src/machine/m_xt_xi8088.c | 4 +- src/machine/machine.c | 78 ++++++++++++++++------------------- src/machine/machine_table.c | 2 + 6 files changed, 42 insertions(+), 50 deletions(-) diff --git a/src/machine/m_amstrad.c b/src/machine/m_amstrad.c index eb934ebd1..63efbed50 100644 --- a/src/machine/m_amstrad.c +++ b/src/machine/m_amstrad.c @@ -2292,7 +2292,7 @@ machine_amstrad_init(const machine_t *model, int type) ams = (amstrad_t *) malloc(sizeof(amstrad_t)); memset(ams, 0x00, sizeof(amstrad_t)); - ams->type = type; + ams->type = type; amstrad_latch = 0x80000000; switch (type) { diff --git a/src/machine/m_at_socket7_3v.c b/src/machine/m_at_socket7_3v.c index ef43077b5..2827c43ef 100644 --- a/src/machine/m_at_socket7_3v.c +++ b/src/machine/m_at_socket7_3v.c @@ -506,7 +506,6 @@ machine_at_ap5s_init(const machine_t *model) return ret; } - int machine_at_ms5124_init(const machine_t *model) { @@ -536,7 +535,6 @@ machine_at_ms5124_init(const machine_t *model) return ret; } - int machine_at_vectra54_init(const machine_t *model) { diff --git a/src/machine/m_xt_t1000_vid.c b/src/machine/m_xt_t1000_vid.c index d15a8f1c2..309ec132e 100644 --- a/src/machine/m_xt_t1000_vid.c +++ b/src/machine/m_xt_t1000_vid.c @@ -697,7 +697,7 @@ t1000_speed_changed(void *p) } static const device_config_t t1000_config[] = { - // clang-format off + // clang-format off { .name = "display_language", .description = "Language", @@ -723,7 +723,7 @@ static const device_config_t t1000_config[] = { .default_int = 0 }, { .name = "", .description = "", .type = CONFIG_END } - // clang-format on +// clang-format on }; const device_t t1000_video_device = { diff --git a/src/machine/m_xt_xi8088.c b/src/machine/m_xt_xi8088.c index bbbc1a42c..6d64fe438 100644 --- a/src/machine/m_xt_xi8088.c +++ b/src/machine/m_xt_xi8088.c @@ -86,7 +86,7 @@ xi8088_init(const device_t *info) } static const device_config_t xi8088_config[] = { - // clang-format off + // clang-format off { .name = "turbo_setting", .description = "Turbo", @@ -156,7 +156,7 @@ static const device_config_t xi8088_config[] = { .default_int = 0 }, { .name = "", .description = "", .type = CONFIG_END } - // clang-format on +// clang-format on }; const device_t xi8088_device = { diff --git a/src/machine/machine.c b/src/machine/machine.c index 774b972c2..c2347b107 100644 --- a/src/machine/machine.c +++ b/src/machine/machine.c @@ -42,80 +42,75 @@ #include <86box/machine.h> #include <86box/isamem.h> - int bios_only = 0; int machine; // int AT, PCI; - #ifdef ENABLE_MACHINE_LOG int machine_do_log = ENABLE_MACHINE_LOG; - static void machine_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (machine_do_log) - { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (machine_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define machine_log(fmt, ...) +# define machine_log(fmt, ...) #endif - static int machine_init_ex(int m) { int ret = 0; if (!bios_only) { - machine_log("Initializing as \"%s\"\n", machine_getname()); + machine_log("Initializing as \"%s\"\n", machine_getname()); - is_vpc = 0; - standalone_gameport_type = NULL; - gameport_instance_id = 0; + is_vpc = 0; + standalone_gameport_type = NULL; + gameport_instance_id = 0; - /* Set up the architecture flags. */ - // AT = IS_AT(machine); - // PCI = IS_ARCH(machine, MACHINE_BUS_PCI); + /* Set up the architecture flags. */ + // AT = IS_AT(machine); + // PCI = IS_ARCH(machine, MACHINE_BUS_PCI); - cpu_set(); - pc_speed_changed(); + cpu_set(); + pc_speed_changed(); - /* Reset the memory state. */ - mem_reset(); - smbase = is_am486dxl ? 0x00060000 : 0x00030000; + /* Reset the memory state. */ + mem_reset(); + smbase = is_am486dxl ? 0x00060000 : 0x00030000; - lpt_init(); + lpt_init(); - if (cassette_enable) - device_add(&cassette_device); + if (cassette_enable) + device_add(&cassette_device); - cart_reset(); + cart_reset(); - /* Prepare some video-related things if we're using internal - or no video. */ - video_pre_reset(gfxcard); + /* Prepare some video-related things if we're using internal + or no video. */ + video_pre_reset(gfxcard); - /* Reset any ISA memory cards. */ - isamem_reset(); + /* Reset any ISA memory cards. */ + isamem_reset(); - /* Reset the fast off stuff. */ - cpu_fast_off_reset(); + /* Reset the fast off stuff. */ + cpu_fast_off_reset(); } /* All good, boot the machine! */ if (machines[m].init) - ret = machines[m].init(&machines[m]); + ret = machines[m].init(&machines[m]); if (bios_only || !ret) - return ret; + return ret; if (gfxcard != VID_NONE) { if (ibm8514_enabled) { @@ -132,7 +127,6 @@ machine_init_ex(int m) return ret; } - void machine_init(void) { @@ -140,11 +134,10 @@ machine_init(void) (void) machine_init_ex(machine); } - int machine_available(int m) { - int ret; + int ret; device_t *d = (device_t *) machine_getdevice(m); bios_only = 1; @@ -160,15 +153,14 @@ machine_available(int m) return !!ret; } - void pit_irq0_timer(int new_out, int old_out) { if (new_out && !old_out) - picint(1); + picint(1); if (!new_out) - picintc(1); + picintc(1); } void diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index efd4a4895..f3a56fc98 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -201,6 +201,7 @@ const machine_filter_t machine_chipsets[] = { const machine_t machines[] = { + // clang-format off /* 8088 Machines */ { .name = "[8088] IBM PC (1981)", @@ -11784,6 +11785,7 @@ const machine_t machines[] = { .snd_device = NULL, .net_device = NULL } + // clang-format on }; /* Saved copies - jumpers get applied to these. From 4685da3fcab791d1c82eb1e5b2cccf3f395a340e Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:18:07 -0400 Subject: [PATCH 370/386] clang-format in src/mem/ --- src/mem/catalyst_flash.c | 150 +-- src/mem/i2c_eeprom.c | 70 +- src/mem/intel_flash.c | 703 +++++------ src/mem/mem.c | 2566 ++++++++++++++++++-------------------- src/mem/rom.c | 415 +++--- src/mem/smram.c | 260 ++-- src/mem/spd.c | 669 +++++----- src/mem/sst_flash.c | 597 +++++---- 8 files changed, 2602 insertions(+), 2828 deletions(-) diff --git a/src/mem/catalyst_flash.c b/src/mem/catalyst_flash.c index bfc54e4b4..b49c0671c 100644 --- a/src/mem/catalyst_flash.c +++ b/src/mem/catalyst_flash.c @@ -30,14 +30,11 @@ #include <86box/nvr.h> #include <86box/plat.h> +#define FLAG_WORD 4 +#define FLAG_BXB 2 +#define FLAG_INV_A16 1 -#define FLAG_WORD 4 -#define FLAG_BXB 2 -#define FLAG_INV_A16 1 - - -enum -{ +enum { BLOCK_MAIN1, BLOCK_MAIN2, BLOCK_DATA1, @@ -46,88 +43,80 @@ enum BLOCKS_NUM }; -enum -{ - CMD_SET_READ = 0x00, +enum { + CMD_SET_READ = 0x00, CMD_READ_SIGNATURE = 0x90, - CMD_ERASE = 0x20, - CMD_ERASE_CONFIRM = 0x20, - CMD_ERASE_VERIFY = 0xA0, - CMD_PROGRAM = 0x40, + CMD_ERASE = 0x20, + CMD_ERASE_CONFIRM = 0x20, + CMD_ERASE_VERIFY = 0xA0, + CMD_PROGRAM = 0x40, CMD_PROGRAM_VERIFY = 0xC0, - CMD_RESET = 0xFF + CMD_RESET = 0xFF }; +typedef struct flash_t { + uint8_t command, pad, + pad0, pad1, + *array; -typedef struct flash_t -{ - uint8_t command, pad, - pad0, pad1, - *array; - - mem_mapping_t mapping, mapping_h[2]; + mem_mapping_t mapping, mapping_h[2]; } flash_t; - -static char flash_path[1024]; - +static char flash_path[1024]; static uint8_t flash_read(uint32_t addr, void *p) { flash_t *dev = (flash_t *) p; - uint8_t ret = 0xff; + uint8_t ret = 0xff; addr &= biosmask; switch (dev->command) { - case CMD_ERASE_VERIFY: - case CMD_PROGRAM_VERIFY: - case CMD_RESET: - case CMD_SET_READ: - ret = dev->array[addr]; - break; + case CMD_ERASE_VERIFY: + case CMD_PROGRAM_VERIFY: + case CMD_RESET: + case CMD_SET_READ: + ret = dev->array[addr]; + break; - case CMD_READ_SIGNATURE: - if (addr == 0x00000) - ret = 0x31; /* CATALYST */ - else if (addr == 0x00001) - ret = 0xB4; /* 28F010 */ - break; + case CMD_READ_SIGNATURE: + if (addr == 0x00000) + ret = 0x31; /* CATALYST */ + else if (addr == 0x00001) + ret = 0xB4; /* 28F010 */ + break; } return ret; } - static uint16_t flash_readw(uint32_t addr, void *p) { - flash_t *dev = (flash_t *)p; + flash_t *dev = (flash_t *) p; uint16_t *q; addr &= biosmask; - q = (uint16_t *)&(dev->array[addr]); + q = (uint16_t *) &(dev->array[addr]); return *q; } - static uint32_t flash_readl(uint32_t addr, void *p) { - flash_t *dev = (flash_t *)p; + flash_t *dev = (flash_t *) p; uint32_t *q; addr &= biosmask; - q = (uint32_t *)&(dev->array[addr]); + q = (uint32_t *) &(dev->array[addr]); return *q; } - static void flash_write(uint32_t addr, uint8_t val, void *p) { @@ -136,55 +125,51 @@ flash_write(uint32_t addr, uint8_t val, void *p) addr &= biosmask; switch (dev->command) { - case CMD_ERASE: - if (val == CMD_ERASE_CONFIRM) - memset(dev->array, 0xff, biosmask + 1); - break; + case CMD_ERASE: + if (val == CMD_ERASE_CONFIRM) + memset(dev->array, 0xff, biosmask + 1); + break; - case CMD_PROGRAM: - dev->array[addr] = val; - break; + case CMD_PROGRAM: + dev->array[addr] = val; + break; - default: - dev->command = val; - break; + default: + dev->command = val; + break; } } - static void flash_writew(uint32_t addr, uint16_t val, void *p) { } - static void flash_writel(uint32_t addr, uint32_t val, void *p) { } - static void catalyst_flash_add_mappings(flash_t *dev) { memcpy(dev->array, rom, biosmask + 1); mem_mapping_add(&dev->mapping, 0xe0000, 0x20000, - flash_read, flash_readw, flash_readl, - flash_write, flash_writew, flash_writel, - dev->array, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev); + flash_read, flash_readw, flash_readl, + flash_write, flash_writew, flash_writel, + dev->array, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev); mem_mapping_add(&(dev->mapping_h[0]), 0xfffc0000, 0x20000, - flash_read, flash_readw, flash_readl, - flash_write, flash_writew, flash_writel, - dev->array, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev); + flash_read, flash_readw, flash_readl, + flash_write, flash_writew, flash_writel, + dev->array, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev); mem_mapping_add(&(dev->mapping_h[1]), 0xfffe0000, 0x20000, - flash_read, flash_readw, flash_readl, - flash_write, flash_writew, flash_writel, - dev->array, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev); + flash_read, flash_readw, flash_readl, + flash_write, flash_writew, flash_writel, + dev->array, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev); } - static void catalyst_flash_reset(void *priv) { @@ -193,11 +178,10 @@ catalyst_flash_reset(void *priv) dev->command = CMD_RESET; } - static void * catalyst_flash_init(const device_t *info) { - FILE *f; + FILE *f; flash_t *dev; dev = malloc(sizeof(flash_t)); @@ -217,19 +201,18 @@ catalyst_flash_init(const device_t *info) f = nvr_fopen(flash_path, "rb"); if (f) { - (void) !fread(dev->array, 0x20000, 1, f); - fclose(f); + (void) !fread(dev->array, 0x20000, 1, f); + fclose(f); } return dev; } - static void catalyst_flash_close(void *p) { - FILE *f; - flash_t *dev = (flash_t *)p; + FILE *f; + flash_t *dev = (flash_t *) p; f = nvr_fopen(flash_path, "wb"); fwrite(dev->array, 0x20000, 1, f); @@ -241,17 +224,16 @@ catalyst_flash_close(void *p) free(dev); } - const device_t catalyst_flash_device = { - .name = "Catalyst 28F010-D Flash BIOS", + .name = "Catalyst 28F010-D Flash BIOS", .internal_name = "catalyst_flash", - .flags = DEVICE_PCI, - .local = 0, - .init = catalyst_flash_init, - .close = catalyst_flash_close, - .reset = catalyst_flash_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = catalyst_flash_init, + .close = catalyst_flash_close, + .reset = catalyst_flash_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/mem/i2c_eeprom.c b/src/mem/i2c_eeprom.c index dceac93a5..9a2e2876e 100644 --- a/src/mem/i2c_eeprom.c +++ b/src/mem/i2c_eeprom.c @@ -24,36 +24,32 @@ #include <86box/86box.h> #include <86box/i2c.h> - typedef struct { - void *i2c; - uint8_t addr, *data, writable; + void *i2c; + uint8_t addr, *data, writable; - uint32_t addr_mask, addr_register; - uint8_t addr_len, addr_pos; + uint32_t addr_mask, addr_register; + uint8_t addr_len, addr_pos; } i2c_eeprom_t; - #ifdef ENABLE_I2C_EEPROM_LOG int i2c_eeprom_do_log = ENABLE_I2C_EEPROM_LOG; - static void i2c_eeprom_log(const char *fmt, ...) { va_list ap; if (i2c_eeprom_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define i2c_eeprom_log(fmt, ...) +# define i2c_eeprom_log(fmt, ...) #endif - static uint8_t i2c_eeprom_start(void *bus, uint8_t addr, uint8_t read, void *priv) { @@ -62,19 +58,18 @@ i2c_eeprom_start(void *bus, uint8_t addr, uint8_t read, void *priv) i2c_eeprom_log("I2C EEPROM %s %02X: start()\n", i2c_getbusname(dev->i2c), dev->addr); if (!read) { - dev->addr_pos = 0; - dev->addr_register = (addr << dev->addr_len) & dev->addr_mask; + dev->addr_pos = 0; + dev->addr_register = (addr << dev->addr_len) & dev->addr_mask; } return 1; } - static uint8_t i2c_eeprom_read(void *bus, uint8_t addr, void *priv) { i2c_eeprom_t *dev = (i2c_eeprom_t *) priv; - uint8_t ret = dev->data[dev->addr_register]; + uint8_t ret = dev->data[dev->addr_register]; i2c_eeprom_log("I2C EEPROM %s %02X: read(%06X) = %02X\n", i2c_getbusname(dev->i2c), dev->addr, dev->addr_register, ret); dev->addr_register++; @@ -83,33 +78,31 @@ i2c_eeprom_read(void *bus, uint8_t addr, void *priv) return ret; } - static uint8_t i2c_eeprom_write(void *bus, uint8_t addr, uint8_t data, void *priv) { i2c_eeprom_t *dev = (i2c_eeprom_t *) priv; if (dev->addr_pos < dev->addr_len) { - dev->addr_register <<= 8; - dev->addr_register |= data; - dev->addr_register &= (1 << dev->addr_len) - 1; - dev->addr_register |= addr << dev->addr_len; - dev->addr_register &= dev->addr_mask; - i2c_eeprom_log("I2C EEPROM %s %02X: write(address, %06X)\n", i2c_getbusname(dev->i2c), dev->addr, dev->addr_register); - dev->addr_pos += 8; + dev->addr_register <<= 8; + dev->addr_register |= data; + dev->addr_register &= (1 << dev->addr_len) - 1; + dev->addr_register |= addr << dev->addr_len; + dev->addr_register &= dev->addr_mask; + i2c_eeprom_log("I2C EEPROM %s %02X: write(address, %06X)\n", i2c_getbusname(dev->i2c), dev->addr, dev->addr_register); + dev->addr_pos += 8; } else { - i2c_eeprom_log("I2C EEPROM %s %02X: write(%06X, %02X) = %d\n", i2c_getbusname(dev->i2c), dev->addr, dev->addr_register, data, !!dev->writable); - if (dev->writable) - dev->data[dev->addr_register] = data; - dev->addr_register++; - dev->addr_register &= dev->addr_mask; /* roll-over */ - return dev->writable; + i2c_eeprom_log("I2C EEPROM %s %02X: write(%06X, %02X) = %d\n", i2c_getbusname(dev->i2c), dev->addr, dev->addr_register, data, !!dev->writable); + if (dev->writable) + dev->data[dev->addr_register] = data; + dev->addr_register++; + dev->addr_register &= dev->addr_mask; /* roll-over */ + return dev->writable; } return 1; } - static void i2c_eeprom_stop(void *bus, uint8_t addr, void *priv) { @@ -120,17 +113,15 @@ i2c_eeprom_stop(void *bus, uint8_t addr, void *priv) dev->addr_pos = 0; } - uint8_t log2i(uint32_t i) { uint8_t ret = 0; while ((i >>= 1)) - ret++; + ret++; return ret; } - void * i2c_eeprom_init(void *i2c, uint8_t addr, uint8_t *data, uint32_t size, uint8_t writable) { @@ -140,17 +131,17 @@ i2c_eeprom_init(void *i2c, uint8_t addr, uint8_t *data, uint32_t size, uint8_t w /* Round size up to the next power of 2. */ uint32_t pow_size = 1 << log2i(size); if (pow_size < size) - size = pow_size << 1; + size = pow_size << 1; size &= 0x7fffff; /* address space limit of 8 MB = 7 bits from I2C address + 16 bits */ i2c_eeprom_log("I2C EEPROM %s %02X: init(%d, %d)\n", i2c_getbusname(i2c), addr, size, writable); - dev->i2c = i2c; - dev->addr = addr; - dev->data = data; + dev->i2c = i2c; + dev->addr = addr; + dev->data = data; dev->writable = writable; - dev->addr_len = (size >= 4096) ? 16 : 8; /* use 16-bit addresses on 24C32 and above */ + dev->addr_len = (size >= 4096) ? 16 : 8; /* use 16-bit addresses on 24C32 and above */ dev->addr_mask = size - 1; i2c_sethandler(dev->i2c, dev->addr & ~(dev->addr_mask >> dev->addr_len), (dev->addr_mask >> dev->addr_len) + 1, i2c_eeprom_start, i2c_eeprom_read, i2c_eeprom_write, i2c_eeprom_stop, dev); @@ -158,7 +149,6 @@ i2c_eeprom_init(void *i2c, uint8_t addr, uint8_t *data, uint32_t size, uint8_t w return dev; } - void i2c_eeprom_close(void *dev_handle) { diff --git a/src/mem/intel_flash.c b/src/mem/intel_flash.c index 40a7581d7..bd24f5bcc 100644 --- a/src/mem/intel_flash.c +++ b/src/mem/intel_flash.c @@ -30,14 +30,11 @@ #include <86box/nvr.h> #include <86box/plat.h> +#define FLAG_WORD 4 +#define FLAG_BXB 2 +#define FLAG_INV_A16 1 -#define FLAG_WORD 4 -#define FLAG_BXB 2 -#define FLAG_INV_A16 1 - - -enum -{ +enum { BLOCK_MAIN1, BLOCK_MAIN2, BLOCK_MAIN3, @@ -48,239 +45,231 @@ enum BLOCKS_NUM }; -enum -{ - CMD_READ_ARRAY = 0xff, - CMD_IID = 0x90, - CMD_READ_STATUS = 0x70, - CMD_CLEAR_STATUS = 0x50, - CMD_ERASE_SETUP = 0x20, - CMD_ERASE_CONFIRM = 0xd0, - CMD_ERASE_SUSPEND = 0xb0, - CMD_PROGRAM_SETUP = 0x40, +enum { + CMD_READ_ARRAY = 0xff, + CMD_IID = 0x90, + CMD_READ_STATUS = 0x70, + CMD_CLEAR_STATUS = 0x50, + CMD_ERASE_SETUP = 0x20, + CMD_ERASE_CONFIRM = 0xd0, + CMD_ERASE_SUSPEND = 0xb0, + CMD_PROGRAM_SETUP = 0x40, CMD_PROGRAM_SETUP_ALT = 0x10 }; +typedef struct flash_t { + uint8_t command, status, + pad, flags, + *array; -typedef struct flash_t -{ - uint8_t command, status, - pad, flags, - *array; + uint16_t flash_id, pad16; - uint16_t flash_id, pad16; + uint32_t program_addr, + block_start[BLOCKS_NUM], block_end[BLOCKS_NUM], + block_len[BLOCKS_NUM]; - uint32_t program_addr, - block_start[BLOCKS_NUM], block_end[BLOCKS_NUM], - block_len[BLOCKS_NUM]; - - mem_mapping_t mapping[4], mapping_h[16]; + mem_mapping_t mapping[4], mapping_h[16]; } flash_t; - -static char flash_path[1024]; - +static char flash_path[1024]; static uint8_t flash_read(uint32_t addr, void *p) { flash_t *dev = (flash_t *) p; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (dev->flags & FLAG_INV_A16) - addr ^= 0x10000; + addr ^= 0x10000; addr &= biosmask; switch (dev->command) { - case CMD_READ_ARRAY: - default: - ret = dev->array[addr]; - break; + case CMD_READ_ARRAY: + default: + ret = dev->array[addr]; + break; - case CMD_IID: - if (addr & 1) - ret = dev->flash_id & 0xff; - else - ret = 0x89; - break; + case CMD_IID: + if (addr & 1) + ret = dev->flash_id & 0xff; + else + ret = 0x89; + break; - case CMD_READ_STATUS: - ret = dev->status; - break; + case CMD_READ_STATUS: + ret = dev->status; + break; } return ret; } - static uint16_t flash_readw(uint32_t addr, void *p) { - flash_t *dev = (flash_t *) p; + flash_t *dev = (flash_t *) p; uint16_t *q; - uint16_t ret = 0xffff; + uint16_t ret = 0xffff; if (dev->flags & FLAG_INV_A16) - addr ^= 0x10000; + addr ^= 0x10000; addr &= biosmask; if (dev->flags & FLAG_WORD) - addr &= 0xfffffffe; + addr &= 0xfffffffe; - q = (uint16_t *)&(dev->array[addr]); + q = (uint16_t *) &(dev->array[addr]); ret = *q; - if (dev->flags & FLAG_WORD) switch (dev->command) { - case CMD_READ_ARRAY: - default: - break; + if (dev->flags & FLAG_WORD) + switch (dev->command) { + case CMD_READ_ARRAY: + default: + break; - case CMD_IID: - if (addr & 2) - ret = dev->flash_id; - else - ret = 0x0089; - break; + case CMD_IID: + if (addr & 2) + ret = dev->flash_id; + else + ret = 0x0089; + break; - case CMD_READ_STATUS: - ret = dev->status; - break; - } + case CMD_READ_STATUS: + ret = dev->status; + break; + } return ret; } - static uint32_t flash_readl(uint32_t addr, void *p) { - flash_t *dev = (flash_t *)p; + flash_t *dev = (flash_t *) p; uint32_t *q; if (dev->flags & FLAG_INV_A16) - addr ^= 0x10000; + addr ^= 0x10000; addr &= biosmask; - q = (uint32_t *)&(dev->array[addr]); + q = (uint32_t *) &(dev->array[addr]); return *q; } - static void flash_write(uint32_t addr, uint8_t val, void *p) { flash_t *dev = (flash_t *) p; - int i; + int i; uint32_t bb_mask = biosmask & 0xffffe000; if (biosmask == 0x7ffff) - bb_mask &= 0xffff8000; + bb_mask &= 0xffff8000; else if (biosmask == 0x3ffff) - bb_mask &= 0xffffc000; + bb_mask &= 0xffffc000; if (dev->flags & FLAG_INV_A16) - addr ^= 0x10000; + addr ^= 0x10000; addr &= biosmask; switch (dev->command) { - case CMD_ERASE_SETUP: - if (val == CMD_ERASE_CONFIRM) { - for (i = 0; i < 6; i++) { - if ((i == dev->program_addr) && (addr >= dev->block_start[i]) && (addr <= dev->block_end[i])) - memset(&(dev->array[dev->block_start[i]]), 0xff, dev->block_len[i]); - } + case CMD_ERASE_SETUP: + if (val == CMD_ERASE_CONFIRM) { + for (i = 0; i < 6; i++) { + if ((i == dev->program_addr) && (addr >= dev->block_start[i]) && (addr <= dev->block_end[i])) + memset(&(dev->array[dev->block_start[i]]), 0xff, dev->block_len[i]); + } - dev->status = 0x80; - } - dev->command = CMD_READ_STATUS; - break; + dev->status = 0x80; + } + dev->command = CMD_READ_STATUS; + break; - case CMD_PROGRAM_SETUP: - case CMD_PROGRAM_SETUP_ALT: - if (((addr & bb_mask) != (dev->block_start[6] & bb_mask)) && (addr == dev->program_addr)) - dev->array[addr] = val; - dev->command = CMD_READ_STATUS; - dev->status = 0x80; - break; + case CMD_PROGRAM_SETUP: + case CMD_PROGRAM_SETUP_ALT: + if (((addr & bb_mask) != (dev->block_start[6] & bb_mask)) && (addr == dev->program_addr)) + dev->array[addr] = val; + dev->command = CMD_READ_STATUS; + dev->status = 0x80; + break; - default: - dev->command = val; - switch (val) { - case CMD_CLEAR_STATUS: - dev->status = 0; - break; - case CMD_ERASE_SETUP: - for (i = 0; i < 7; i++) { - if ((addr >= dev->block_start[i]) && (addr <= dev->block_end[i])) - dev->program_addr = i; - } - break; - case CMD_PROGRAM_SETUP: - case CMD_PROGRAM_SETUP_ALT: - dev->program_addr = addr; - break; - } + default: + dev->command = val; + switch (val) { + case CMD_CLEAR_STATUS: + dev->status = 0; + break; + case CMD_ERASE_SETUP: + for (i = 0; i < 7; i++) { + if ((addr >= dev->block_start[i]) && (addr <= dev->block_end[i])) + dev->program_addr = i; + } + break; + case CMD_PROGRAM_SETUP: + case CMD_PROGRAM_SETUP_ALT: + dev->program_addr = addr; + break; + } } } - static void flash_writew(uint32_t addr, uint16_t val, void *p) { flash_t *dev = (flash_t *) p; - int i; + int i; uint32_t bb_mask = biosmask & 0xffffe000; if (biosmask == 0x7ffff) - bb_mask &= 0xffff8000; + bb_mask &= 0xffff8000; else if (biosmask == 0x3ffff) - bb_mask &= 0xffffc000; + bb_mask &= 0xffffc000; if (dev->flags & FLAG_INV_A16) - addr ^= 0x10000; + addr ^= 0x10000; addr &= biosmask; - if (dev->flags & FLAG_WORD) switch (dev->command) { - case CMD_ERASE_SETUP: - if (val == CMD_ERASE_CONFIRM) { - for (i = 0; i < 6; i++) { - if ((i == dev->program_addr) && (addr >= dev->block_start[i]) && (addr <= dev->block_end[i])) - memset(&(dev->array[dev->block_start[i]]), 0xff, dev->block_len[i]); - } + if (dev->flags & FLAG_WORD) + switch (dev->command) { + case CMD_ERASE_SETUP: + if (val == CMD_ERASE_CONFIRM) { + for (i = 0; i < 6; i++) { + if ((i == dev->program_addr) && (addr >= dev->block_start[i]) && (addr <= dev->block_end[i])) + memset(&(dev->array[dev->block_start[i]]), 0xff, dev->block_len[i]); + } - dev->status = 0x80; - } - dev->command = CMD_READ_STATUS; - break; + dev->status = 0x80; + } + dev->command = CMD_READ_STATUS; + break; - case CMD_PROGRAM_SETUP: - case CMD_PROGRAM_SETUP_ALT: - if (((addr & bb_mask) != (dev->block_start[6] & bb_mask)) && (addr == dev->program_addr)) - *(uint16_t *) (&dev->array[addr]) = val; - dev->command = CMD_READ_STATUS; - dev->status = 0x80; - break; + case CMD_PROGRAM_SETUP: + case CMD_PROGRAM_SETUP_ALT: + if (((addr & bb_mask) != (dev->block_start[6] & bb_mask)) && (addr == dev->program_addr)) + *(uint16_t *) (&dev->array[addr]) = val; + dev->command = CMD_READ_STATUS; + dev->status = 0x80; + break; - default: - dev->command = val & 0xff; - switch (val) { - case CMD_CLEAR_STATUS: - dev->status = 0; - break; - case CMD_ERASE_SETUP: - for (i = 0; i < 7; i++) { - if ((addr >= dev->block_start[i]) && (addr <= dev->block_end[i])) - dev->program_addr = i; - } - break; - case CMD_PROGRAM_SETUP: - case CMD_PROGRAM_SETUP_ALT: - dev->program_addr = addr; - break; - } - } + default: + dev->command = val & 0xff; + switch (val) { + case CMD_CLEAR_STATUS: + dev->status = 0; + break; + case CMD_ERASE_SETUP: + for (i = 0; i < 7; i++) { + if ((addr >= dev->block_start[i]) && (addr <= dev->block_end[i])) + dev->program_addr = i; + } + break; + case CMD_PROGRAM_SETUP: + case CMD_PROGRAM_SETUP_ALT: + dev->program_addr = addr; + break; + } + } } - static void flash_writel(uint32_t addr, uint32_t val, void *p) { @@ -290,70 +279,67 @@ flash_writel(uint32_t addr, uint32_t val, void *p) #endif } - static void intel_flash_add_mappings(flash_t *dev) { - int max = 2, i = 0; + int max = 2, i = 0; uint32_t base, fbase; uint32_t sub = 0x20000; if (biosmask == 0x7ffff) { - sub = 0x80000; - max = 8; + sub = 0x80000; + max = 8; } else if (biosmask == 0x3ffff) { - sub = 0x40000; - max = 4; + sub = 0x40000; + max = 4; } for (i = 0; i < max; i++) { - if (biosmask == 0x7ffff) - base = 0x80000 + (i << 16); - else if (biosmask == 0x3ffff) - base = 0xc0000 + (i << 16); - else - base = 0xe0000 + (i << 16); + if (biosmask == 0x7ffff) + base = 0x80000 + (i << 16); + else if (biosmask == 0x3ffff) + base = 0xc0000 + (i << 16); + else + base = 0xe0000 + (i << 16); - fbase = base & biosmask; - if (dev->flags & FLAG_INV_A16) - fbase ^= 0x10000; + fbase = base & biosmask; + if (dev->flags & FLAG_INV_A16) + fbase ^= 0x10000; - memcpy(&dev->array[fbase], &rom[base & biosmask], 0x10000); + memcpy(&dev->array[fbase], &rom[base & biosmask], 0x10000); - if ((max == 2) || (i >= 2)) { - mem_mapping_add(&(dev->mapping[i]), base, 0x10000, - flash_read, flash_readw, flash_readl, - flash_write, flash_writew, flash_writel, - dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev); - } - mem_mapping_add(&(dev->mapping_h[i]), (base | 0xfff00000) - sub, 0x10000, - flash_read, flash_readw, flash_readl, - flash_write, flash_writew, flash_writel, - dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev); - mem_mapping_add(&(dev->mapping_h[i + max]), (base | 0xfff00000), 0x10000, - flash_read, flash_readw, flash_readl, - flash_write, flash_writew, flash_writel, - dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev); + if ((max == 2) || (i >= 2)) { + mem_mapping_add(&(dev->mapping[i]), base, 0x10000, + flash_read, flash_readw, flash_readl, + flash_write, flash_writew, flash_writel, + dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev); + } + mem_mapping_add(&(dev->mapping_h[i]), (base | 0xfff00000) - sub, 0x10000, + flash_read, flash_readw, flash_readl, + flash_write, flash_writew, flash_writel, + dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev); + mem_mapping_add(&(dev->mapping_h[i + max]), (base | 0xfff00000), 0x10000, + flash_read, flash_readw, flash_readl, + flash_write, flash_writew, flash_writel, + dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev); } } - static void intel_flash_reset(void *priv) { flash_t *dev = (flash_t *) priv; dev->command = CMD_READ_ARRAY; - dev->status = 0; + dev->status = 0; } - static void * intel_flash_init(const device_t *info) { - FILE *f; + FILE *f; flash_t *dev; - uint8_t type = info->local & 0xff; + uint8_t type = info->local & 0xff; dev = malloc(sizeof(flash_t)); memset(dev, 0, sizeof(flash_t)); @@ -369,186 +355,185 @@ intel_flash_init(const device_t *info) memset(dev->array, 0xff, biosmask + 1); switch (biosmask) { - case 0x7ffff: - if (dev->flags & FLAG_WORD) - dev->flash_id = (dev->flags & FLAG_BXB) ? 0x4471 : 0x4470; - else - dev->flash_id =(dev->flags & FLAG_BXB) ? 0x8A : 0x89; + case 0x7ffff: + if (dev->flags & FLAG_WORD) + dev->flash_id = (dev->flags & FLAG_BXB) ? 0x4471 : 0x4470; + else + dev->flash_id = (dev->flags & FLAG_BXB) ? 0x8A : 0x89; - /* The block lengths are the same both flash types. */ - dev->block_len[BLOCK_MAIN1] = 0x20000; - dev->block_len[BLOCK_MAIN2] = 0x20000; - dev->block_len[BLOCK_MAIN3] = 0x20000; - dev->block_len[BLOCK_MAIN4] = 0x18000; - dev->block_len[BLOCK_DATA1] = 0x02000; - dev->block_len[BLOCK_DATA2] = 0x02000; - dev->block_len[BLOCK_BOOT] = 0x04000; + /* The block lengths are the same both flash types. */ + dev->block_len[BLOCK_MAIN1] = 0x20000; + dev->block_len[BLOCK_MAIN2] = 0x20000; + dev->block_len[BLOCK_MAIN3] = 0x20000; + dev->block_len[BLOCK_MAIN4] = 0x18000; + dev->block_len[BLOCK_DATA1] = 0x02000; + dev->block_len[BLOCK_DATA2] = 0x02000; + dev->block_len[BLOCK_BOOT] = 0x04000; - if (dev->flags & FLAG_BXB) { /* 28F004BX-T/28F400BX-B */ - dev->block_start[BLOCK_BOOT] = 0x00000; /* MAIN BLOCK 1 */ - dev->block_end[BLOCK_BOOT] = 0x1ffff; - dev->block_start[BLOCK_DATA2] = 0x20000; /* MAIN BLOCK 2 */ - dev->block_end[BLOCK_DATA2] = 0x3ffff; - dev->block_start[BLOCK_DATA1] = 0x40000; /* MAIN BLOCK 3 */ - dev->block_end[BLOCK_DATA1] = 0x5ffff; - dev->block_start[BLOCK_MAIN4] = 0x60000; /* MAIN BLOCK 4 */ - dev->block_end[BLOCK_MAIN4] = 0x77fff; - dev->block_start[BLOCK_MAIN3] = 0x78000; /* DATA AREA 1 BLOCK */ - dev->block_end[BLOCK_MAIN3] = 0x79fff; - dev->block_start[BLOCK_MAIN2] = 0x7a000; /* DATA AREA 2 BLOCK */ - dev->block_end[BLOCK_MAIN2] = 0x7bfff; - dev->block_start[BLOCK_MAIN1] = 0x7c000; /* BOOT BLOCK */ - dev->block_end[BLOCK_MAIN1] = 0x7ffff; - } else { - dev->block_start[BLOCK_MAIN1] = 0x00000; /* MAIN BLOCK 1 */ - dev->block_end[BLOCK_MAIN1] = 0x1ffff; - dev->block_start[BLOCK_MAIN2] = 0x20000; /* MAIN BLOCK 2 */ - dev->block_end[BLOCK_MAIN2] = 0x3ffff; - dev->block_start[BLOCK_MAIN3] = 0x40000; /* MAIN BLOCK 3 */ - dev->block_end[BLOCK_MAIN3] = 0x5ffff; - dev->block_start[BLOCK_MAIN4] = 0x60000; /* MAIN BLOCK 4 */ - dev->block_end[BLOCK_MAIN4] = 0x77fff; - dev->block_start[BLOCK_DATA1] = 0x78000; /* DATA AREA 1 BLOCK */ - dev->block_end[BLOCK_DATA1] = 0x79fff; - dev->block_start[BLOCK_DATA2] = 0x7a000; /* DATA AREA 2 BLOCK */ - dev->block_end[BLOCK_DATA2] = 0x7bfff; - dev->block_start[BLOCK_BOOT] = 0x7c000; /* BOOT BLOCK */ - dev->block_end[BLOCK_BOOT] = 0x7ffff; - } - break; + if (dev->flags & FLAG_BXB) { /* 28F004BX-T/28F400BX-B */ + dev->block_start[BLOCK_BOOT] = 0x00000; /* MAIN BLOCK 1 */ + dev->block_end[BLOCK_BOOT] = 0x1ffff; + dev->block_start[BLOCK_DATA2] = 0x20000; /* MAIN BLOCK 2 */ + dev->block_end[BLOCK_DATA2] = 0x3ffff; + dev->block_start[BLOCK_DATA1] = 0x40000; /* MAIN BLOCK 3 */ + dev->block_end[BLOCK_DATA1] = 0x5ffff; + dev->block_start[BLOCK_MAIN4] = 0x60000; /* MAIN BLOCK 4 */ + dev->block_end[BLOCK_MAIN4] = 0x77fff; + dev->block_start[BLOCK_MAIN3] = 0x78000; /* DATA AREA 1 BLOCK */ + dev->block_end[BLOCK_MAIN3] = 0x79fff; + dev->block_start[BLOCK_MAIN2] = 0x7a000; /* DATA AREA 2 BLOCK */ + dev->block_end[BLOCK_MAIN2] = 0x7bfff; + dev->block_start[BLOCK_MAIN1] = 0x7c000; /* BOOT BLOCK */ + dev->block_end[BLOCK_MAIN1] = 0x7ffff; + } else { + dev->block_start[BLOCK_MAIN1] = 0x00000; /* MAIN BLOCK 1 */ + dev->block_end[BLOCK_MAIN1] = 0x1ffff; + dev->block_start[BLOCK_MAIN2] = 0x20000; /* MAIN BLOCK 2 */ + dev->block_end[BLOCK_MAIN2] = 0x3ffff; + dev->block_start[BLOCK_MAIN3] = 0x40000; /* MAIN BLOCK 3 */ + dev->block_end[BLOCK_MAIN3] = 0x5ffff; + dev->block_start[BLOCK_MAIN4] = 0x60000; /* MAIN BLOCK 4 */ + dev->block_end[BLOCK_MAIN4] = 0x77fff; + dev->block_start[BLOCK_DATA1] = 0x78000; /* DATA AREA 1 BLOCK */ + dev->block_end[BLOCK_DATA1] = 0x79fff; + dev->block_start[BLOCK_DATA2] = 0x7a000; /* DATA AREA 2 BLOCK */ + dev->block_end[BLOCK_DATA2] = 0x7bfff; + dev->block_start[BLOCK_BOOT] = 0x7c000; /* BOOT BLOCK */ + dev->block_end[BLOCK_BOOT] = 0x7ffff; + } + break; - case 0x3ffff: - if (dev->flags & FLAG_WORD) - dev->flash_id = (dev->flags & FLAG_BXB) ? 0x2275 : 0x2274; - else - dev->flash_id = (dev->flags & FLAG_BXB) ? 0x7D : 0x7C; + case 0x3ffff: + if (dev->flags & FLAG_WORD) + dev->flash_id = (dev->flags & FLAG_BXB) ? 0x2275 : 0x2274; + else + dev->flash_id = (dev->flags & FLAG_BXB) ? 0x7D : 0x7C; - /* The block lengths are the same both flash types. */ - dev->block_len[BLOCK_MAIN1] = 0x20000; - dev->block_len[BLOCK_MAIN2] = 0x18000; - dev->block_len[BLOCK_MAIN3] = 0x00000; - dev->block_len[BLOCK_MAIN4] = 0x00000; - dev->block_len[BLOCK_DATA1] = 0x02000; - dev->block_len[BLOCK_DATA2] = 0x02000; - dev->block_len[BLOCK_BOOT] = 0x04000; + /* The block lengths are the same both flash types. */ + dev->block_len[BLOCK_MAIN1] = 0x20000; + dev->block_len[BLOCK_MAIN2] = 0x18000; + dev->block_len[BLOCK_MAIN3] = 0x00000; + dev->block_len[BLOCK_MAIN4] = 0x00000; + dev->block_len[BLOCK_DATA1] = 0x02000; + dev->block_len[BLOCK_DATA2] = 0x02000; + dev->block_len[BLOCK_BOOT] = 0x04000; - if (dev->flags & FLAG_BXB) { /* 28F002BX-B/28F200BX-B */ - dev->block_start[BLOCK_MAIN1] = 0x20000; /* MAIN BLOCK 1 */ - dev->block_end[BLOCK_MAIN1] = 0x3ffff; - dev->block_start[BLOCK_MAIN2] = 0x08000; /* MAIN BLOCK 2 */ - dev->block_end[BLOCK_MAIN2] = 0x1ffff; - dev->block_start[BLOCK_MAIN3] = 0xfffff; /* MAIN BLOCK 3 */ - dev->block_end[BLOCK_MAIN3] = 0xfffff; - dev->block_start[BLOCK_MAIN4] = 0xfffff; /* MAIN BLOCK 4 */ - dev->block_end[BLOCK_MAIN4] = 0xfffff; - dev->block_start[BLOCK_DATA1] = 0x06000; /* DATA AREA 1 BLOCK */ - dev->block_end[BLOCK_DATA1] = 0x07fff; - dev->block_start[BLOCK_DATA2] = 0x04000; /* DATA AREA 2 BLOCK */ - dev->block_end[BLOCK_DATA2] = 0x05fff; - dev->block_start[BLOCK_BOOT] = 0x00000; /* BOOT BLOCK */ - dev->block_end[BLOCK_BOOT] = 0x03fff; - } else { /* 28F002BX-T/28F200BX-T */ - dev->block_start[BLOCK_MAIN1] = 0x00000; /* MAIN BLOCK 1 */ - dev->block_end[BLOCK_MAIN1] = 0x1ffff; - dev->block_start[BLOCK_MAIN2] = 0x20000; /* MAIN BLOCK 2 */ - dev->block_end[BLOCK_MAIN2] = 0x37fff; - dev->block_start[BLOCK_MAIN3] = 0xfffff; /* MAIN BLOCK 3 */ - dev->block_end[BLOCK_MAIN3] = 0xfffff; - dev->block_start[BLOCK_MAIN4] = 0xfffff; /* MAIN BLOCK 4 */ - dev->block_end[BLOCK_MAIN4] = 0xfffff; - dev->block_start[BLOCK_DATA1] = 0x38000; /* DATA AREA 1 BLOCK */ - dev->block_end[BLOCK_DATA1] = 0x39fff; - dev->block_start[BLOCK_DATA2] = 0x3a000; /* DATA AREA 2 BLOCK */ - dev->block_end[BLOCK_DATA2] = 0x3bfff; - dev->block_start[BLOCK_BOOT] = 0x3c000; /* BOOT BLOCK */ - dev->block_end[BLOCK_BOOT] = 0x3ffff; - } - break; + if (dev->flags & FLAG_BXB) { /* 28F002BX-B/28F200BX-B */ + dev->block_start[BLOCK_MAIN1] = 0x20000; /* MAIN BLOCK 1 */ + dev->block_end[BLOCK_MAIN1] = 0x3ffff; + dev->block_start[BLOCK_MAIN2] = 0x08000; /* MAIN BLOCK 2 */ + dev->block_end[BLOCK_MAIN2] = 0x1ffff; + dev->block_start[BLOCK_MAIN3] = 0xfffff; /* MAIN BLOCK 3 */ + dev->block_end[BLOCK_MAIN3] = 0xfffff; + dev->block_start[BLOCK_MAIN4] = 0xfffff; /* MAIN BLOCK 4 */ + dev->block_end[BLOCK_MAIN4] = 0xfffff; + dev->block_start[BLOCK_DATA1] = 0x06000; /* DATA AREA 1 BLOCK */ + dev->block_end[BLOCK_DATA1] = 0x07fff; + dev->block_start[BLOCK_DATA2] = 0x04000; /* DATA AREA 2 BLOCK */ + dev->block_end[BLOCK_DATA2] = 0x05fff; + dev->block_start[BLOCK_BOOT] = 0x00000; /* BOOT BLOCK */ + dev->block_end[BLOCK_BOOT] = 0x03fff; + } else { /* 28F002BX-T/28F200BX-T */ + dev->block_start[BLOCK_MAIN1] = 0x00000; /* MAIN BLOCK 1 */ + dev->block_end[BLOCK_MAIN1] = 0x1ffff; + dev->block_start[BLOCK_MAIN2] = 0x20000; /* MAIN BLOCK 2 */ + dev->block_end[BLOCK_MAIN2] = 0x37fff; + dev->block_start[BLOCK_MAIN3] = 0xfffff; /* MAIN BLOCK 3 */ + dev->block_end[BLOCK_MAIN3] = 0xfffff; + dev->block_start[BLOCK_MAIN4] = 0xfffff; /* MAIN BLOCK 4 */ + dev->block_end[BLOCK_MAIN4] = 0xfffff; + dev->block_start[BLOCK_DATA1] = 0x38000; /* DATA AREA 1 BLOCK */ + dev->block_end[BLOCK_DATA1] = 0x39fff; + dev->block_start[BLOCK_DATA2] = 0x3a000; /* DATA AREA 2 BLOCK */ + dev->block_end[BLOCK_DATA2] = 0x3bfff; + dev->block_start[BLOCK_BOOT] = 0x3c000; /* BOOT BLOCK */ + dev->block_end[BLOCK_BOOT] = 0x3ffff; + } + break; - default: - dev->flash_id = (type & FLAG_BXB) ? 0x95 : 0x94; + default: + dev->flash_id = (type & FLAG_BXB) ? 0x95 : 0x94; - /* The block lengths are the same both flash types. */ - dev->block_len[BLOCK_MAIN1] = 0x1c000; - dev->block_len[BLOCK_MAIN2] = 0x00000; - dev->block_len[BLOCK_MAIN3] = 0x00000; - dev->block_len[BLOCK_MAIN4] = 0x00000; - dev->block_len[BLOCK_DATA1] = 0x01000; - dev->block_len[BLOCK_DATA2] = 0x01000; - dev->block_len[BLOCK_BOOT] = 0x02000; + /* The block lengths are the same both flash types. */ + dev->block_len[BLOCK_MAIN1] = 0x1c000; + dev->block_len[BLOCK_MAIN2] = 0x00000; + dev->block_len[BLOCK_MAIN3] = 0x00000; + dev->block_len[BLOCK_MAIN4] = 0x00000; + dev->block_len[BLOCK_DATA1] = 0x01000; + dev->block_len[BLOCK_DATA2] = 0x01000; + dev->block_len[BLOCK_BOOT] = 0x02000; - if (dev->flags & FLAG_BXB) { /* 28F001BX-B/28F100BX-B */ - dev->block_start[BLOCK_MAIN1] = 0x04000; /* MAIN BLOCK 1 */ - dev->block_end[BLOCK_MAIN1] = 0x1ffff; - dev->block_start[BLOCK_MAIN2] = 0xfffff; /* MAIN BLOCK 2 */ - dev->block_end[BLOCK_MAIN2] = 0xfffff; - dev->block_start[BLOCK_MAIN3] = 0xfffff; /* MAIN BLOCK 3 */ - dev->block_end[BLOCK_MAIN3] = 0xfffff; - dev->block_start[BLOCK_MAIN4] = 0xfffff; /* MAIN BLOCK 4 */ - dev->block_end[BLOCK_MAIN4] = 0xfffff; - dev->block_start[BLOCK_DATA1] = 0x02000; /* DATA AREA 1 BLOCK */ - dev->block_end[BLOCK_DATA1] = 0x02fff; - dev->block_start[BLOCK_DATA2] = 0x03000; /* DATA AREA 2 BLOCK */ - dev->block_end[BLOCK_DATA2] = 0x03fff; - dev->block_start[BLOCK_BOOT] = 0x00000; /* BOOT BLOCK */ - dev->block_end[BLOCK_BOOT] = 0x01fff; - } else { /* 28F001BX-T/28F100BX-T */ - dev->block_start[BLOCK_MAIN1] = 0x00000; /* MAIN BLOCK 1 */ - dev->block_end[BLOCK_MAIN1] = 0x1bfff; - dev->block_start[BLOCK_MAIN2] = 0xfffff; /* MAIN BLOCK 2 */ - dev->block_end[BLOCK_MAIN2] = 0xfffff; - dev->block_start[BLOCK_MAIN3] = 0xfffff; /* MAIN BLOCK 3 */ - dev->block_end[BLOCK_MAIN3] = 0xfffff; - dev->block_start[BLOCK_MAIN4] = 0xfffff; /* MAIN BLOCK 4 */ - dev->block_end[BLOCK_MAIN4] = 0xfffff; - dev->block_start[BLOCK_DATA1] = 0x1c000; /* DATA AREA 1 BLOCK */ - dev->block_end[BLOCK_DATA1] = 0x1cfff; - dev->block_start[BLOCK_DATA2] = 0x1d000; /* DATA AREA 2 BLOCK */ - dev->block_end[BLOCK_DATA2] = 0x1dfff; - dev->block_start[BLOCK_BOOT] = 0x1e000; /* BOOT BLOCK */ - dev->block_end[BLOCK_BOOT] = 0x1ffff; - } - break; + if (dev->flags & FLAG_BXB) { /* 28F001BX-B/28F100BX-B */ + dev->block_start[BLOCK_MAIN1] = 0x04000; /* MAIN BLOCK 1 */ + dev->block_end[BLOCK_MAIN1] = 0x1ffff; + dev->block_start[BLOCK_MAIN2] = 0xfffff; /* MAIN BLOCK 2 */ + dev->block_end[BLOCK_MAIN2] = 0xfffff; + dev->block_start[BLOCK_MAIN3] = 0xfffff; /* MAIN BLOCK 3 */ + dev->block_end[BLOCK_MAIN3] = 0xfffff; + dev->block_start[BLOCK_MAIN4] = 0xfffff; /* MAIN BLOCK 4 */ + dev->block_end[BLOCK_MAIN4] = 0xfffff; + dev->block_start[BLOCK_DATA1] = 0x02000; /* DATA AREA 1 BLOCK */ + dev->block_end[BLOCK_DATA1] = 0x02fff; + dev->block_start[BLOCK_DATA2] = 0x03000; /* DATA AREA 2 BLOCK */ + dev->block_end[BLOCK_DATA2] = 0x03fff; + dev->block_start[BLOCK_BOOT] = 0x00000; /* BOOT BLOCK */ + dev->block_end[BLOCK_BOOT] = 0x01fff; + } else { /* 28F001BX-T/28F100BX-T */ + dev->block_start[BLOCK_MAIN1] = 0x00000; /* MAIN BLOCK 1 */ + dev->block_end[BLOCK_MAIN1] = 0x1bfff; + dev->block_start[BLOCK_MAIN2] = 0xfffff; /* MAIN BLOCK 2 */ + dev->block_end[BLOCK_MAIN2] = 0xfffff; + dev->block_start[BLOCK_MAIN3] = 0xfffff; /* MAIN BLOCK 3 */ + dev->block_end[BLOCK_MAIN3] = 0xfffff; + dev->block_start[BLOCK_MAIN4] = 0xfffff; /* MAIN BLOCK 4 */ + dev->block_end[BLOCK_MAIN4] = 0xfffff; + dev->block_start[BLOCK_DATA1] = 0x1c000; /* DATA AREA 1 BLOCK */ + dev->block_end[BLOCK_DATA1] = 0x1cfff; + dev->block_start[BLOCK_DATA2] = 0x1d000; /* DATA AREA 2 BLOCK */ + dev->block_end[BLOCK_DATA2] = 0x1dfff; + dev->block_start[BLOCK_BOOT] = 0x1e000; /* BOOT BLOCK */ + dev->block_end[BLOCK_BOOT] = 0x1ffff; + } + break; } intel_flash_add_mappings(dev); dev->command = CMD_READ_ARRAY; - dev->status = 0; + dev->status = 0; f = nvr_fopen(flash_path, "rb"); if (f) { - (void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, f); - if (dev->block_len[BLOCK_MAIN2]) - (void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN2]]), dev->block_len[BLOCK_MAIN2], 1, f); - if (dev->block_len[BLOCK_MAIN3]) - (void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN3]]), dev->block_len[BLOCK_MAIN3], 1, f); - if (dev->block_len[BLOCK_MAIN4]) - (void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN4]]), dev->block_len[BLOCK_MAIN4], 1, f); + (void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, f); + if (dev->block_len[BLOCK_MAIN2]) + (void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN2]]), dev->block_len[BLOCK_MAIN2], 1, f); + if (dev->block_len[BLOCK_MAIN3]) + (void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN3]]), dev->block_len[BLOCK_MAIN3], 1, f); + if (dev->block_len[BLOCK_MAIN4]) + (void) !fread(&(dev->array[dev->block_start[BLOCK_MAIN4]]), dev->block_len[BLOCK_MAIN4], 1, f); - (void) !fread(&(dev->array[dev->block_start[BLOCK_DATA1]]), dev->block_len[BLOCK_DATA1], 1, f); - (void) !fread(&(dev->array[dev->block_start[BLOCK_DATA2]]), dev->block_len[BLOCK_DATA2], 1, f); - fclose(f); + (void) !fread(&(dev->array[dev->block_start[BLOCK_DATA1]]), dev->block_len[BLOCK_DATA1], 1, f); + (void) !fread(&(dev->array[dev->block_start[BLOCK_DATA2]]), dev->block_len[BLOCK_DATA2], 1, f); + fclose(f); } return dev; } - static void intel_flash_close(void *p) { - FILE *f; - flash_t *dev = (flash_t *)p; + FILE *f; + flash_t *dev = (flash_t *) p; f = nvr_fopen(flash_path, "wb"); fwrite(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, f); if (dev->block_len[BLOCK_MAIN2]) - fwrite(&(dev->array[dev->block_start[BLOCK_MAIN2]]), dev->block_len[BLOCK_MAIN2], 1, f); + fwrite(&(dev->array[dev->block_start[BLOCK_MAIN2]]), dev->block_len[BLOCK_MAIN2], 1, f); if (dev->block_len[BLOCK_MAIN3]) - fwrite(&(dev->array[dev->block_start[BLOCK_MAIN3]]), dev->block_len[BLOCK_MAIN3], 1, f); + fwrite(&(dev->array[dev->block_start[BLOCK_MAIN3]]), dev->block_len[BLOCK_MAIN3], 1, f); if (dev->block_len[BLOCK_MAIN4]) - fwrite(&(dev->array[dev->block_start[BLOCK_MAIN4]]), dev->block_len[BLOCK_MAIN4], 1, f); + fwrite(&(dev->array[dev->block_start[BLOCK_MAIN4]]), dev->block_len[BLOCK_MAIN4], 1, f); fwrite(&(dev->array[dev->block_start[BLOCK_DATA1]]), dev->block_len[BLOCK_DATA1], 1, f); fwrite(&(dev->array[dev->block_start[BLOCK_DATA2]]), dev->block_len[BLOCK_DATA2], 1, f); @@ -562,43 +547,43 @@ intel_flash_close(void *p) /* For AMI BIOS'es - Intel 28F001BXT with A16 pin inverted. */ const device_t intel_flash_bxt_ami_device = { - .name = "Intel 28F001BXT/28F002BXT/28F004BXT Flash BIOS", + .name = "Intel 28F001BXT/28F002BXT/28F004BXT Flash BIOS", .internal_name = "intel_flash_bxt_ami", - .flags = DEVICE_PCI, - .local = FLAG_INV_A16, - .init = intel_flash_init, - .close = intel_flash_close, - .reset = intel_flash_reset, + .flags = DEVICE_PCI, + .local = FLAG_INV_A16, + .init = intel_flash_init, + .close = intel_flash_close, + .reset = intel_flash_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t intel_flash_bxt_device = { - .name = "Intel 28F001BXT/28F002BXT/28F004BXT Flash BIOS", + .name = "Intel 28F001BXT/28F002BXT/28F004BXT Flash BIOS", .internal_name = "intel_flash_bxt", - .flags = DEVICE_PCI, - .local = 0, - .init = intel_flash_init, - .close = intel_flash_close, - .reset = intel_flash_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = intel_flash_init, + .close = intel_flash_close, + .reset = intel_flash_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t intel_flash_bxb_device = { - .name = "Intel 28F001BXB/28F002BXB/28F004BXB Flash BIOS", + .name = "Intel 28F001BXB/28F002BXB/28F004BXB Flash BIOS", .internal_name = "intel_flash_bxb", - .flags = DEVICE_PCI, - .local = FLAG_BXB, - .init = intel_flash_init, - .close = intel_flash_close, - .reset = intel_flash_reset, + .flags = DEVICE_PCI, + .local = FLAG_BXB, + .init = intel_flash_init, + .close = intel_flash_close, + .reset = intel_flash_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/mem/mem.c b/src/mem/mem.c index bc4e34691..9f292fd0e 100644 --- a/src/mem/mem.c +++ b/src/mem/mem.c @@ -38,125 +38,120 @@ #include <86box/rom.h> #include <86box/gdbstub.h> #ifdef USE_DYNAREC -# include "codegen_public.h" +# include "codegen_public.h" #else -#ifdef USE_NEW_DYNAREC -# define PAGE_MASK_SHIFT 6 -#else -# define PAGE_MASK_INDEX_MASK 3 -# define PAGE_MASK_INDEX_SHIFT 10 -# define PAGE_MASK_SHIFT 4 -#endif -# define PAGE_MASK_MASK 63 +# ifdef USE_NEW_DYNAREC +# define PAGE_MASK_SHIFT 6 +# else +# define PAGE_MASK_INDEX_MASK 3 +# define PAGE_MASK_INDEX_SHIFT 10 +# define PAGE_MASK_SHIFT 4 +# endif +# define PAGE_MASK_MASK 63 #endif #if (!defined(USE_DYNAREC) && defined(USE_NEW_DYNAREC)) -#define BLOCK_PC_INVALID 0xffffffff -#define BLOCK_INVALID 0 +# define BLOCK_PC_INVALID 0xffffffff +# define BLOCK_INVALID 0 #endif +mem_mapping_t ram_low_mapping, /* 0..640K mapping */ + ram_mid_mapping, + ram_remapped_mapping, /* 640..1024K mapping */ + ram_high_mapping, /* 1024K+ mapping */ + ram_2gb_mapping, /* 1024M+ mapping */ + ram_remapped_mapping, + ram_split_mapping, + bios_mapping, + bios_high_mapping; -mem_mapping_t ram_low_mapping, /* 0..640K mapping */ - ram_mid_mapping, - ram_remapped_mapping, /* 640..1024K mapping */ - ram_high_mapping, /* 1024K+ mapping */ - ram_2gb_mapping, /* 1024M+ mapping */ - ram_remapped_mapping, - ram_split_mapping, - bios_mapping, - bios_high_mapping; +page_t *pages, /* RAM page table */ + **page_lookup; /* pagetable lookup */ +uint32_t pages_sz; /* #pages in table */ -page_t *pages, /* RAM page table */ - **page_lookup; /* pagetable lookup */ -uint32_t pages_sz; /* #pages in table */ +uint8_t *ram, *ram2; /* the virtual RAM */ +uint8_t page_ff[4096]; +uint32_t rammask; -uint8_t *ram, *ram2; /* the virtual RAM */ -uint8_t page_ff[4096]; -uint32_t rammask; +uint8_t *rom; /* the virtual ROM */ +uint32_t biosmask, biosaddr; -uint8_t *rom; /* the virtual ROM */ -uint32_t biosmask, biosaddr; +uint32_t pccache; +uint8_t *pccache2; -uint32_t pccache; -uint8_t *pccache2; +int readlnext; +int readlookup[256]; +uintptr_t *readlookup2; +uintptr_t old_rl2; +uint8_t uncached = 0; +int writelnext; +int writelookup[256]; +uintptr_t *writelookup2; -int readlnext; -int readlookup[256]; -uintptr_t *readlookup2; -uintptr_t old_rl2; -uint8_t uncached = 0; -int writelnext; -int writelookup[256]; -uintptr_t *writelookup2; +uint32_t mem_logical_addr; -uint32_t mem_logical_addr; +int shadowbios = 0, + shadowbios_write; +int readlnum = 0, + writelnum = 0; +int cachesize = 256; -int shadowbios = 0, - shadowbios_write; -int readlnum = 0, - writelnum = 0; -int cachesize = 256; +uint32_t get_phys_virt, + get_phys_phys; -uint32_t get_phys_virt, - get_phys_phys; +int mem_a20_key = 0, + mem_a20_alt = 0, + mem_a20_state = 0; -int mem_a20_key = 0, - mem_a20_alt = 0, - mem_a20_state = 0; - -int mmuflush = 0; -int mmu_perm = 4; +int mmuflush = 0; +int mmu_perm = 4; #ifdef USE_NEW_DYNAREC -uint64_t *byte_dirty_mask; -uint64_t *byte_code_present_mask; +uint64_t *byte_dirty_mask; +uint64_t *byte_code_present_mask; -uint32_t purgable_page_list_head = 0; -int purgeable_page_count = 0; +uint32_t purgable_page_list_head = 0; +int purgeable_page_count = 0; #endif -uint8_t high_page = 0; /* if a high (> 4 gb) page was detected */ - +uint8_t high_page = 0; /* if a high (> 4 gb) page was detected */ /* FIXME: re-do this with a 'mem_ops' struct. */ -static uint8_t *page_lookupp; /* pagetable mmu_perm lookup */ -static uint8_t *readlookupp; -static uint8_t *writelookupp; -static mem_mapping_t *base_mapping, *last_mapping; -static mem_mapping_t *read_mapping[MEM_MAPPINGS_NO]; -static mem_mapping_t *write_mapping[MEM_MAPPINGS_NO]; -static mem_mapping_t *read_mapping_bus[MEM_MAPPINGS_NO]; -static mem_mapping_t *write_mapping_bus[MEM_MAPPINGS_NO]; -static uint8_t *_mem_exec[MEM_MAPPINGS_NO]; -static uint8_t ff_pccache[4] = { 0xff, 0xff, 0xff, 0xff }; -static mem_state_t _mem_state[MEM_MAPPINGS_NO]; -static uint32_t remap_start_addr; +static uint8_t *page_lookupp; /* pagetable mmu_perm lookup */ +static uint8_t *readlookupp; +static uint8_t *writelookupp; +static mem_mapping_t *base_mapping, *last_mapping; +static mem_mapping_t *read_mapping[MEM_MAPPINGS_NO]; +static mem_mapping_t *write_mapping[MEM_MAPPINGS_NO]; +static mem_mapping_t *read_mapping_bus[MEM_MAPPINGS_NO]; +static mem_mapping_t *write_mapping_bus[MEM_MAPPINGS_NO]; +static uint8_t *_mem_exec[MEM_MAPPINGS_NO]; +static uint8_t ff_pccache[4] = { 0xff, 0xff, 0xff, 0xff }; +static mem_state_t _mem_state[MEM_MAPPINGS_NO]; +static uint32_t remap_start_addr; #if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)) -static size_t ram_size = 0, ram2_size = 0; +static size_t ram_size = 0, ram2_size = 0; #else -static size_t ram_size = 0; +static size_t ram_size = 0; #endif - #ifdef ENABLE_MEM_LOG int mem_do_log = ENABLE_MEM_LOG; - static void mem_log(const char *fmt, ...) { va_list ap; if (mem_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define mem_log(fmt, ...) +# define mem_log(fmt, ...) #endif - int mem_addr_is_ram(uint32_t addr) { @@ -165,125 +160,119 @@ mem_addr_is_ram(uint32_t addr) return (mapping == &ram_low_mapping) || (mapping == &ram_high_mapping) || (mapping == &ram_mid_mapping) || (mapping == &ram_remapped_mapping); } - void resetreadlookup(void) { int c; /* Initialize the page lookup table. */ - memset(page_lookup, 0x00, (1<<20)*sizeof(page_t *)); + memset(page_lookup, 0x00, (1 << 20) * sizeof(page_t *)); /* Initialize the tables for lower (<= 1024K) RAM. */ for (c = 0; c < 256; c++) { - readlookup[c] = 0xffffffff; - writelookup[c] = 0xffffffff; + readlookup[c] = 0xffffffff; + writelookup[c] = 0xffffffff; } /* Initialize the tables for high (> 1024K) RAM. */ - memset(readlookup2, 0xff, (1<<20)*sizeof(uintptr_t)); - memset(readlookupp, 0x04, (1<<20)*sizeof(uint8_t)); + memset(readlookup2, 0xff, (1 << 20) * sizeof(uintptr_t)); + memset(readlookupp, 0x04, (1 << 20) * sizeof(uint8_t)); - memset(writelookup2, 0xff, (1<<20)*sizeof(uintptr_t)); - memset(writelookupp, 0x04, (1<<20)*sizeof(uint8_t)); + memset(writelookup2, 0xff, (1 << 20) * sizeof(uintptr_t)); + memset(writelookupp, 0x04, (1 << 20) * sizeof(uint8_t)); - readlnext = 0; + readlnext = 0; writelnext = 0; - pccache = 0xffffffff; - high_page = 0; + pccache = 0xffffffff; + high_page = 0; } - void flushmmucache(void) { int c; for (c = 0; c < 256; c++) { - if (readlookup[c] != (int) 0xffffffff) { - readlookup2[readlookup[c]] = LOOKUP_INV; - readlookupp[readlookup[c]] = 4; - readlookup[c] = 0xffffffff; - } - if (writelookup[c] != (int) 0xffffffff) { - page_lookup[writelookup[c]] = NULL; - page_lookupp[writelookup[c]] = 4; - writelookup2[writelookup[c]] = LOOKUP_INV; - writelookupp[writelookup[c]] = 4; - writelookup[c] = 0xffffffff; - } + if (readlookup[c] != (int) 0xffffffff) { + readlookup2[readlookup[c]] = LOOKUP_INV; + readlookupp[readlookup[c]] = 4; + readlookup[c] = 0xffffffff; + } + if (writelookup[c] != (int) 0xffffffff) { + page_lookup[writelookup[c]] = NULL; + page_lookupp[writelookup[c]] = 4; + writelookup2[writelookup[c]] = LOOKUP_INV; + writelookupp[writelookup[c]] = 4; + writelookup[c] = 0xffffffff; + } } mmuflush++; - pccache = (uint32_t)0xffffffff; - pccache2 = (uint8_t *)0xffffffff; + pccache = (uint32_t) 0xffffffff; + pccache2 = (uint8_t *) 0xffffffff; #ifdef USE_DYNAREC codegen_flush(); #endif } - void flushmmucache_nopc(void) { int c; for (c = 0; c < 256; c++) { - if (readlookup[c] != (int) 0xffffffff) { - readlookup2[readlookup[c]] = LOOKUP_INV; - readlookupp[readlookup[c]] = 4; - readlookup[c] = 0xffffffff; - } - if (writelookup[c] != (int) 0xffffffff) { - page_lookup[writelookup[c]] = NULL; - page_lookupp[writelookup[c]] = 4; - writelookup2[writelookup[c]] = LOOKUP_INV; - writelookupp[writelookup[c]] = 4; - writelookup[c] = 0xffffffff; - } + if (readlookup[c] != (int) 0xffffffff) { + readlookup2[readlookup[c]] = LOOKUP_INV; + readlookupp[readlookup[c]] = 4; + readlookup[c] = 0xffffffff; + } + if (writelookup[c] != (int) 0xffffffff) { + page_lookup[writelookup[c]] = NULL; + page_lookupp[writelookup[c]] = 4; + writelookup2[writelookup[c]] = LOOKUP_INV; + writelookupp[writelookup[c]] = 4; + writelookup[c] = 0xffffffff; + } } } - void mem_flush_write_page(uint32_t addr, uint32_t virt) { page_t *page_target = &pages[addr >> 12]; - int c; + int c; #if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)) uint32_t a; #endif for (c = 0; c < 256; c++) { - if (writelookup[c] != (int) 0xffffffff) { + if (writelookup[c] != (int) 0xffffffff) { #if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64) - uintptr_t target = (uintptr_t)&ram[(uintptr_t)(addr & ~0xfff) - (virt & ~0xfff)]; + uintptr_t target = (uintptr_t) &ram[(uintptr_t) (addr & ~0xfff) - (virt & ~0xfff)]; #else - a = (uintptr_t)(addr & ~0xfff) - (virt & ~0xfff); - uintptr_t target; + a = (uintptr_t) (addr & ~0xfff) - (virt & ~0xfff); + uintptr_t target; - if ((addr & ~0xfff) >= (1 << 30)) - target = (uintptr_t)&ram2[a - (1 << 30)]; - else - target = (uintptr_t)&ram[a]; + if ((addr & ~0xfff) >= (1 << 30)) + target = (uintptr_t) &ram2[a - (1 << 30)]; + else + target = (uintptr_t) &ram[a]; #endif - if (writelookup2[writelookup[c]] == target || page_lookup[writelookup[c]] == page_target) { - writelookup2[writelookup[c]] = LOOKUP_INV; - page_lookup[writelookup[c]] = NULL; - writelookup[c] = 0xffffffff; - } - } + if (writelookup2[writelookup[c]] == target || page_lookup[writelookup[c]] == page_target) { + writelookup2[writelookup[c]] = LOOKUP_INV; + page_lookup[writelookup[c]] = NULL; + writelookup[c] = 0xffffffff; + } + } } } - -#define mmutranslate_read(addr) mmutranslatereal(addr,0) -#define mmutranslate_write(addr) mmutranslatereal(addr,1) -#define rammap(x) ((uint32_t *)(_mem_exec[(x) >> MEM_GRANULARITY_BITS]))[((x) >> 2) & MEM_GRANULARITY_QMASK] -#define rammap64(x) ((uint64_t *)(_mem_exec[(x) >> MEM_GRANULARITY_BITS]))[((x) >> 3) & MEM_GRANULARITY_PMASK] - +#define mmutranslate_read(addr) mmutranslatereal(addr, 0) +#define mmutranslate_write(addr) mmutranslatereal(addr, 1) +#define rammap(x) ((uint32_t *) (_mem_exec[(x) >> MEM_GRANULARITY_BITS]))[((x) >> 2) & MEM_GRANULARITY_QMASK] +#define rammap64(x) ((uint64_t *) (_mem_exec[(x) >> MEM_GRANULARITY_BITS]))[((x) >> 3) & MEM_GRANULARITY_PMASK] static __inline uint64_t mmutranslatereal_normal(uint32_t addr, int rw) @@ -292,53 +281,55 @@ mmutranslatereal_normal(uint32_t addr, int rw) uint32_t addr2; if (cpu_state.abrt) - return 0xffffffffffffffffULL; + return 0xffffffffffffffffULL; addr2 = ((cr3 & ~0xfff) + ((addr >> 20) & 0xffc)); temp = temp2 = rammap(addr2); if (!(temp & 1)) { - cr2 = addr; - temp &= 1; - if (CPL == 3) temp |= 4; - if (rw) temp |= 2; - cpu_state.abrt = ABRT_PF; - abrt_error = temp; - return 0xffffffffffffffffULL; + cr2 = addr; + temp &= 1; + if (CPL == 3) + temp |= 4; + if (rw) + temp |= 2; + cpu_state.abrt = ABRT_PF; + abrt_error = temp; + return 0xffffffffffffffffULL; } if ((temp & 0x80) && (cr4 & CR4_PSE)) { - /*4MB page*/ - if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && (((CPL == 3) && !cpl_override) || (is486 && (cr0 & WP_FLAG))))) { - cr2 = addr; - temp &= 1; - if (CPL == 3) - temp |= 4; - if (rw) - temp |= 2; - cpu_state.abrt = ABRT_PF; - abrt_error = temp; + /*4MB page*/ + if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && (((CPL == 3) && !cpl_override) || (is486 && (cr0 & WP_FLAG))))) { + cr2 = addr; + temp &= 1; + if (CPL == 3) + temp |= 4; + if (rw) + temp |= 2; + cpu_state.abrt = ABRT_PF; + abrt_error = temp; - return 0xffffffffffffffffULL; - } + return 0xffffffffffffffffULL; + } - mmu_perm = temp & 4; - rammap(addr2) |= (rw ? 0x60 : 0x20); + mmu_perm = temp & 4; + rammap(addr2) |= (rw ? 0x60 : 0x20); - return (temp & ~0x3fffff) + (addr & 0x3fffff); + return (temp & ~0x3fffff) + (addr & 0x3fffff); } - temp = rammap((temp & ~0xfff) + ((addr >> 10) & 0xffc)); + temp = rammap((temp & ~0xfff) + ((addr >> 10) & 0xffc)); temp3 = temp & temp2; if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || (is486 && (cr0 & WP_FLAG))))) { - cr2 = addr; - temp &= 1; - if (CPL == 3) - temp |= 4; - if (rw) - temp |= 2; - cpu_state.abrt = ABRT_PF; - abrt_error = temp; - return 0xffffffffffffffffULL; + cr2 = addr; + temp &= 1; + if (CPL == 3) + temp |= 4; + if (rw) + temp |= 2; + cpu_state.abrt = ABRT_PF; + abrt_error = temp; + return 0xffffffffffffffffULL; } mmu_perm = temp & 4; @@ -348,7 +339,6 @@ mmutranslatereal_normal(uint32_t addr, int rw) return (uint64_t) ((temp & ~0xfff) + (addr & 0xfff)); } - static __inline uint64_t mmutranslatereal_pae(uint32_t addr, int rw) { @@ -356,64 +346,70 @@ mmutranslatereal_pae(uint32_t addr, int rw) uint64_t addr2, addr3, addr4; if (cpu_state.abrt) - return 0xffffffffffffffffULL; + return 0xffffffffffffffffULL; addr2 = (cr3 & ~0x1f) + ((addr >> 27) & 0x18); temp = temp2 = rammap64(addr2) & 0x000000ffffffffffULL; if (!(temp & 1)) { - cr2 = addr; - temp &= 1; - if (CPL == 3) temp |= 4; - if (rw) temp |= 2; - cpu_state.abrt = ABRT_PF; - abrt_error = temp; - return 0xffffffffffffffffULL; + cr2 = addr; + temp &= 1; + if (CPL == 3) + temp |= 4; + if (rw) + temp |= 2; + cpu_state.abrt = ABRT_PF; + abrt_error = temp; + return 0xffffffffffffffffULL; } addr3 = (temp & ~0xfffULL) + ((addr >> 18) & 0xff8); temp = temp4 = rammap64(addr3) & 0x000000ffffffffffULL; - temp3 = temp & temp2; + temp3 = temp & temp2; if (!(temp & 1)) { - cr2 = addr; - temp &= 1; - if (CPL == 3) temp |= 4; - if (rw) temp |= 2; - cpu_state.abrt = ABRT_PF; - abrt_error = temp; - return 0xffffffffffffffffULL; + cr2 = addr; + temp &= 1; + if (CPL == 3) + temp |= 4; + if (rw) + temp |= 2; + cpu_state.abrt = ABRT_PF; + abrt_error = temp; + return 0xffffffffffffffffULL; } if (temp & 0x80) { - /*2MB page*/ - if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && (((CPL == 3) && !cpl_override) || (cr0 & WP_FLAG)))) { - cr2 = addr; - temp &= 1; - if (CPL == 3) - temp |= 4; - if (rw) - temp |= 2; - cpu_state.abrt = ABRT_PF; - abrt_error = temp; + /*2MB page*/ + if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && (((CPL == 3) && !cpl_override) || (cr0 & WP_FLAG)))) { + cr2 = addr; + temp &= 1; + if (CPL == 3) + temp |= 4; + if (rw) + temp |= 2; + cpu_state.abrt = ABRT_PF; + abrt_error = temp; - return 0xffffffffffffffffULL; - } - mmu_perm = temp & 4; - rammap64(addr3) |= (rw ? 0x60 : 0x20); + return 0xffffffffffffffffULL; + } + mmu_perm = temp & 4; + rammap64(addr3) |= (rw ? 0x60 : 0x20); - return ((temp & ~0x1fffffULL) + (addr & 0x1fffffULL)) & 0x000000ffffffffffULL; + return ((temp & ~0x1fffffULL) + (addr & 0x1fffffULL)) & 0x000000ffffffffffULL; } addr4 = (temp & ~0xfffULL) + ((addr >> 9) & 0xff8); - temp = rammap64(addr4) & 0x000000ffffffffffULL; + temp = rammap64(addr4) & 0x000000ffffffffffULL; temp3 = temp & temp4; if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || (cr0 & WP_FLAG)))) { - cr2 = addr; - temp &= 1; - if (CPL == 3) temp |= 4; - if (rw) temp |= 2; - cpu_state.abrt = ABRT_PF; - abrt_error = temp; - return 0xffffffffffffffffULL; + cr2 = addr; + temp &= 1; + if (CPL == 3) + temp |= 4; + if (rw) + temp |= 2; + cpu_state.abrt = ABRT_PF; + abrt_error = temp; + return 0xffffffffffffffffULL; } mmu_perm = temp & 4; @@ -423,140 +419,133 @@ mmutranslatereal_pae(uint32_t addr, int rw) return ((temp & ~0xfffULL) + ((uint64_t) (addr & 0xfff))) & 0x000000ffffffffffULL; } - uint64_t mmutranslatereal(uint32_t addr, int rw) { /* Fast path to return invalid without any call if an exception has occurred beforehand. */ if (cpu_state.abrt) - return 0xffffffffffffffffULL; + return 0xffffffffffffffffULL; if (cr4 & CR4_PAE) - return mmutranslatereal_pae(addr, rw); + return mmutranslatereal_pae(addr, rw); else - return mmutranslatereal_normal(addr, rw); + return mmutranslatereal_normal(addr, rw); } - /* This is needed because the old recompiler calls this to check for page fault. */ uint32_t mmutranslatereal32(uint32_t addr, int rw) { /* Fast path to return invalid without any call if an exception has occurred beforehand. */ if (cpu_state.abrt) - return (uint32_t) 0xffffffffffffffffULL; + return (uint32_t) 0xffffffffffffffffULL; return (uint32_t) mmutranslatereal(addr, rw); } - static __inline uint64_t mmutranslate_noabrt_normal(uint32_t addr, int rw) { - uint32_t temp,temp2,temp3; + uint32_t temp, temp2, temp3; uint32_t addr2; if (cpu_state.abrt) - return 0xffffffffffffffffULL; + return 0xffffffffffffffffULL; addr2 = ((cr3 & ~0xfff) + ((addr >> 20) & 0xffc)); temp = temp2 = rammap(addr2); - if (! (temp & 1)) - return 0xffffffffffffffffULL; + if (!(temp & 1)) + return 0xffffffffffffffffULL; if ((temp & 0x80) && (cr4 & CR4_PSE)) { - /*4MB page*/ - if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG)))) - return 0xffffffffffffffffULL; + /*4MB page*/ + if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG)))) + return 0xffffffffffffffffULL; - return (temp & ~0x3fffff) + (addr & 0x3fffff); + return (temp & ~0x3fffff) + (addr & 0x3fffff); } - temp = rammap((temp & ~0xfff) + ((addr >> 10) & 0xffc)); + temp = rammap((temp & ~0xfff) + ((addr >> 10) & 0xffc)); temp3 = temp & temp2; if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && ((CPL == 3) || (cr0 & WP_FLAG)))) - return 0xffffffffffffffffULL; + return 0xffffffffffffffffULL; return (uint64_t) ((temp & ~0xfff) + (addr & 0xfff)); } - static __inline uint64_t mmutranslate_noabrt_pae(uint32_t addr, int rw) { - uint64_t temp,temp2,temp3,temp4; - uint64_t addr2,addr3,addr4; + uint64_t temp, temp2, temp3, temp4; + uint64_t addr2, addr3, addr4; if (cpu_state.abrt) - return 0xffffffffffffffffULL; + return 0xffffffffffffffffULL; addr2 = (cr3 & ~0x1f) + ((addr >> 27) & 0x18); temp = temp2 = rammap64(addr2) & 0x000000ffffffffffULL; - if (! (temp & 1)) - return 0xffffffffffffffffULL; + if (!(temp & 1)) + return 0xffffffffffffffffULL; addr3 = (temp & ~0xfffULL) + ((addr >> 18) & 0xff8); temp = temp4 = rammap64(addr3) & 0x000000ffffffffffULL; - temp3 = temp & temp2; + temp3 = temp & temp2; - if (! (temp & 1)) - return 0xffffffffffffffffULL; + if (!(temp & 1)) + return 0xffffffffffffffffULL; if (temp & 0x80) { - /*2MB page*/ - if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG)))) - return 0xffffffffffffffffULL; + /*2MB page*/ + if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG)))) + return 0xffffffffffffffffULL; - return ((temp & ~0x1fffffULL) + (addr & 0x1fffff)) & 0x000000ffffffffffULL; + return ((temp & ~0x1fffffULL) + (addr & 0x1fffff)) & 0x000000ffffffffffULL; } addr4 = (temp & ~0xfffULL) + ((addr >> 9) & 0xff8); - temp = rammap64(addr4) & 0x000000ffffffffffULL;; + temp = rammap64(addr4) & 0x000000ffffffffffULL; + ; temp3 = temp & temp4; - if (!(temp&1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && ((CPL == 3) || (cr0 & WP_FLAG)))) - return 0xffffffffffffffffULL; + if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && ((CPL == 3) || (cr0 & WP_FLAG)))) + return 0xffffffffffffffffULL; return ((temp & ~0xfffULL) + ((uint64_t) (addr & 0xfff))) & 0x000000ffffffffffULL; } - uint64_t mmutranslate_noabrt(uint32_t addr, int rw) { /* Fast path to return invalid without any call if an exception has occurred beforehand. */ if (cpu_state.abrt) - return 0xffffffffffffffffULL; + return 0xffffffffffffffffULL; if (cr4 & CR4_PAE) - return mmutranslate_noabrt_pae(addr, rw); + return mmutranslate_noabrt_pae(addr, rw); else - return mmutranslate_noabrt_normal(addr, rw); + return mmutranslate_noabrt_normal(addr, rw); } - void mmu_invalidate(uint32_t addr) { flushmmucache_cr3(); } - uint8_t mem_addr_range_match(uint32_t addr, uint32_t start, uint32_t len) { if (addr < start) - return 0; - else if (addr >= (start + len)) - return 0; - else - return 1; + return 0; + else if (addr >= (start + len)) + return 0; + else + return 1; } - uint32_t mem_addr_translate(uint32_t addr, uint32_t chunk_start, uint32_t len) { @@ -565,7 +554,6 @@ mem_addr_translate(uint32_t addr, uint32_t chunk_start, uint32_t len) return chunk_start + (addr & mask); } - void addreadlookup(uint32_t virt, uint32_t phys) { @@ -573,35 +561,36 @@ addreadlookup(uint32_t virt, uint32_t phys) uint32_t a; #endif - if (virt == 0xffffffff) return; + if (virt == 0xffffffff) + return; - if (readlookup2[virt>>12] != (uintptr_t) LOOKUP_INV) return; + if (readlookup2[virt >> 12] != (uintptr_t) LOOKUP_INV) + return; if (readlookup[readlnext] != (int) 0xffffffff) { - if ((readlookup[readlnext] == ((es + DI) >> 12)) || (readlookup[readlnext] == ((es + EDI) >> 12))) - uncached = 1; - readlookup2[readlookup[readlnext]] = LOOKUP_INV; + if ((readlookup[readlnext] == ((es + DI) >> 12)) || (readlookup[readlnext] == ((es + EDI) >> 12))) + uncached = 1; + readlookup2[readlookup[readlnext]] = LOOKUP_INV; } #if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64) - readlookup2[virt>>12] = (uintptr_t)&ram[(uintptr_t)(phys & ~0xFFF) - (uintptr_t)(virt & ~0xfff)]; + readlookup2[virt >> 12] = (uintptr_t) &ram[(uintptr_t) (phys & ~0xFFF) - (uintptr_t) (virt & ~0xfff)]; #else - a = ((uint32_t)(phys & ~0xfff) - (uint32_t)(virt & ~0xfff)); + a = ((uint32_t) (phys & ~0xfff) - (uint32_t) (virt & ~0xfff)); if ((phys & ~0xfff) >= (1 << 30)) - readlookup2[virt>>12] = (uintptr_t)&ram2[a - (1 << 30)]; + readlookup2[virt >> 12] = (uintptr_t) &ram2[a - (1 << 30)]; else - readlookup2[virt>>12] = (uintptr_t)&ram[a]; + readlookup2[virt >> 12] = (uintptr_t) &ram[a]; #endif - readlookupp[virt>>12] = mmu_perm; + readlookupp[virt >> 12] = mmu_perm; readlookup[readlnext++] = virt >> 12; - readlnext &= (cachesize-1); + readlnext &= (cachesize - 1); cycles -= 9; } - void addwritelookup(uint32_t virt, uint32_t phys) { @@ -609,43 +598,45 @@ addwritelookup(uint32_t virt, uint32_t phys) uint32_t a; #endif - if (virt == 0xffffffff) return; + if (virt == 0xffffffff) + return; - if (page_lookup[virt >> 12]) return; + if (page_lookup[virt >> 12]) + return; if (writelookup[writelnext] != -1) { - page_lookup[writelookup[writelnext]] = NULL; - writelookup2[writelookup[writelnext]] = LOOKUP_INV; + page_lookup[writelookup[writelnext]] = NULL; + writelookup2[writelookup[writelnext]] = LOOKUP_INV; } #ifdef USE_NEW_DYNAREC -#ifdef USE_DYNAREC +# ifdef USE_DYNAREC if (pages[phys >> 12].block || (phys & ~0xfff) == recomp_page) { -#else +# else if (pages[phys >> 12].block) { -#endif +# endif #else -#ifdef USE_DYNAREC +# ifdef USE_DYNAREC if (pages[phys >> 12].block[0] || pages[phys >> 12].block[1] || pages[phys >> 12].block[2] || pages[phys >> 12].block[3] || (phys & ~0xfff) == recomp_page) { -#else +# else if (pages[phys >> 12].block[0] || pages[phys >> 12].block[1] || pages[phys >> 12].block[2] || pages[phys >> 12].block[3]) { +# endif #endif -#endif - page_lookup[virt >> 12] = &pages[phys >> 12]; - page_lookupp[virt >> 12] = mmu_perm; + page_lookup[virt >> 12] = &pages[phys >> 12]; + page_lookupp[virt >> 12] = mmu_perm; } else { #if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64) - writelookup2[virt>>12] = (uintptr_t)&ram[(uintptr_t)(phys & ~0xFFF) - (uintptr_t)(virt & ~0xfff)]; + writelookup2[virt >> 12] = (uintptr_t) &ram[(uintptr_t) (phys & ~0xFFF) - (uintptr_t) (virt & ~0xfff)]; #else - a = ((uint32_t)(phys & ~0xfff) - (uint32_t)(virt & ~0xfff)); + a = ((uint32_t) (phys & ~0xfff) - (uint32_t) (virt & ~0xfff)); - if ((phys & ~0xfff) >= (1 << 30)) - writelookup2[virt>>12] = (uintptr_t)&ram2[a - (1 << 30)]; - else - writelookup2[virt>>12] = (uintptr_t)&ram[a]; + if ((phys & ~0xfff) >= (1 << 30)) + writelookup2[virt >> 12] = (uintptr_t) &ram2[a - (1 << 30)]; + else + writelookup2[virt >> 12] = (uintptr_t) &ram[a]; #endif } - writelookupp[virt>>12] = mmu_perm; + writelookupp[virt >> 12] = mmu_perm; writelookup[writelnext++] = virt >> 12; writelnext &= (cachesize - 1); @@ -653,7 +644,6 @@ addwritelookup(uint32_t virt, uint32_t phys) cycles -= 9; } - uint8_t * getpccache(uint32_t a) { @@ -663,68 +653,67 @@ getpccache(uint32_t a) a2 = a; if (cr0 >> 31) { - a64 = mmutranslate_read(a64); + a64 = mmutranslate_read(a64); - if (a64 == 0xffffffffffffffffULL) return ram; + if (a64 == 0xffffffffffffffffULL) + return ram; } a64 &= rammask; if (_mem_exec[a64 >> MEM_GRANULARITY_BITS]) { - if (is286) { - if (read_mapping[a64 >> MEM_GRANULARITY_BITS] && (read_mapping[a64 >> MEM_GRANULARITY_BITS]->flags & MEM_MAPPING_ROM_WS)) - cpu_prefetch_cycles = cpu_rom_prefetch_cycles; - else - cpu_prefetch_cycles = cpu_mem_prefetch_cycles; - } + if (is286) { + if (read_mapping[a64 >> MEM_GRANULARITY_BITS] && (read_mapping[a64 >> MEM_GRANULARITY_BITS]->flags & MEM_MAPPING_ROM_WS)) + cpu_prefetch_cycles = cpu_rom_prefetch_cycles; + else + cpu_prefetch_cycles = cpu_mem_prefetch_cycles; + } - return &_mem_exec[a64 >> MEM_GRANULARITY_BITS][(uintptr_t)(a64 & MEM_GRANULARITY_PAGE) - (uintptr_t)(a2 & ~0xfff)]; + return &_mem_exec[a64 >> MEM_GRANULARITY_BITS][(uintptr_t) (a64 & MEM_GRANULARITY_PAGE) - (uintptr_t) (a2 & ~0xfff)]; } mem_log("Bad getpccache %08X%08X\n", (uint32_t) (a64 >> 32), (uint32_t) (a64 & 0xffffffffULL)); - return (uint8_t *)&ff_pccache; + return (uint8_t *) &ff_pccache; } - uint8_t read_mem_b(uint32_t addr) { mem_mapping_t *map; - uint8_t ret = 0xff; - int old_cycles = cycles; + uint8_t ret = 0xff; + int old_cycles = cycles; mem_logical_addr = addr; addr &= rammask; map = read_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->read_b) - ret = map->read_b(addr, map->p); + ret = map->read_b(addr, map->p); resub_cycles(old_cycles); return ret; } - uint16_t read_mem_w(uint32_t addr) { mem_mapping_t *map; - uint16_t ret = 0xffff; - int old_cycles = cycles; + uint16_t ret = 0xffff; + int old_cycles = cycles; mem_logical_addr = addr; addr &= rammask; if (addr & 1) - ret = read_mem_b(addr) | (read_mem_b(addr + 1) << 8); + ret = read_mem_b(addr) | (read_mem_b(addr + 1) << 8); else { - map = read_mapping[addr >> MEM_GRANULARITY_BITS]; + map = read_mapping[addr >> MEM_GRANULARITY_BITS]; - if (map && map->read_w) - ret = map->read_w(addr, map->p); - else if (map && map->read_b) - ret = map->read_b(addr, map->p) | (map->read_b(addr + 1, map->p) << 8); + if (map && map->read_w) + ret = map->read_w(addr, map->p); + else if (map && map->read_b) + ret = map->read_b(addr, map->p) | (map->read_b(addr + 1, map->p) << 8); } resub_cycles(old_cycles); @@ -732,115 +721,110 @@ read_mem_w(uint32_t addr) return ret; } - void write_mem_b(uint32_t addr, uint8_t val) { mem_mapping_t *map; - int old_cycles = cycles; + int old_cycles = cycles; mem_logical_addr = addr; addr &= rammask; map = write_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->write_b) - map->write_b(addr, val, map->p); + map->write_b(addr, val, map->p); resub_cycles(old_cycles); } - void write_mem_w(uint32_t addr, uint16_t val) { mem_mapping_t *map; - int old_cycles = cycles; + int old_cycles = cycles; mem_logical_addr = addr; addr &= rammask; if (addr & 1) { - write_mem_b(addr, val); - write_mem_b(addr + 1, val >> 8); + write_mem_b(addr, val); + write_mem_b(addr + 1, val >> 8); } else { - map = write_mapping[addr >> MEM_GRANULARITY_BITS]; - if (map) { - if (map->write_w) - map->write_w(addr, val, map->p); - else if (map->write_b) { - map->write_b(addr, val, map->p); - map->write_b(addr + 1, val >> 8, map->p); - } - } + map = write_mapping[addr >> MEM_GRANULARITY_BITS]; + if (map) { + if (map->write_w) + map->write_w(addr, val, map->p); + else if (map->write_b) { + map->write_b(addr, val, map->p); + map->write_b(addr + 1, val >> 8, map->p); + } + } } resub_cycles(old_cycles); } - uint8_t readmembl(uint32_t addr) { mem_mapping_t *map; - uint64_t a; + uint64_t a; GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_READ, 1); - addr64 = (uint64_t) addr; + addr64 = (uint64_t) addr; mem_logical_addr = addr; high_page = 0; if (cr0 >> 31) { - a = mmutranslate_read(addr); - addr64 = (uint32_t) a; + a = mmutranslate_read(addr); + addr64 = (uint32_t) a; - if (a > 0xffffffffULL) - return 0xff; + if (a > 0xffffffffULL) + return 0xff; } addr = (uint32_t) (addr64 & rammask); map = read_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->read_b) - return map->read_b(addr, map->p); + return map->read_b(addr, map->p); return 0xff; } - void writemembl(uint32_t addr, uint8_t val) { mem_mapping_t *map; - uint64_t a; + uint64_t a; GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_WRITE, 1); - addr64 = (uint64_t) addr; + addr64 = (uint64_t) addr; mem_logical_addr = addr; high_page = 0; - if (page_lookup[addr>>12] && page_lookup[addr>>12]->write_b) { - page_lookup[addr>>12]->write_b(addr, val, page_lookup[addr>>12]); - return; + if (page_lookup[addr >> 12] && page_lookup[addr >> 12]->write_b) { + page_lookup[addr >> 12]->write_b(addr, val, page_lookup[addr >> 12]); + return; } if (cr0 >> 31) { - a = mmutranslate_write(addr); - addr64 = (uint32_t) a; + a = mmutranslate_write(addr); + addr64 = (uint32_t) a; - if (a > 0xffffffffULL) - return; + if (a > 0xffffffffULL) + return; } addr = (uint32_t) (addr64 & rammask); map = write_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->write_b) - map->write_b(addr, val, map->p); + map->write_b(addr, val, map->p); } - /* Read a byte from memory without MMU translation - result of previous MMU translation passed as value. */ uint8_t readmembl_no_mmut(uint32_t addr, uint32_t a64) @@ -852,21 +836,20 @@ readmembl_no_mmut(uint32_t addr, uint32_t a64) mem_logical_addr = addr; if (cr0 >> 31) { - if (cpu_state.abrt || high_page) - return 0xff; + if (cpu_state.abrt || high_page) + return 0xff; - addr = a64 & rammask; + addr = a64 & rammask; } else - addr &= rammask; + addr &= rammask; map = read_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->read_b) - return map->read_b(addr, map->p); + return map->read_b(addr, map->p); return 0xff; } - /* Write a byte to memory without MMU translation - result of previous MMU translation passed as value. */ void writemembl_no_mmut(uint32_t addr, uint32_t a64, uint8_t val) @@ -878,30 +861,29 @@ writemembl_no_mmut(uint32_t addr, uint32_t a64, uint8_t val) mem_logical_addr = addr; if (page_lookup[addr >> 12] && page_lookup[addr >> 12]->write_b) { - page_lookup[addr >> 12]->write_b(addr, val, page_lookup[addr >> 12]); - return; + page_lookup[addr >> 12]->write_b(addr, val, page_lookup[addr >> 12]); + return; } if (cr0 >> 31) { - if (cpu_state.abrt || high_page) - return; + if (cpu_state.abrt || high_page) + return; - addr = a64 & rammask; + addr = a64 & rammask; } else - addr &= rammask; + addr &= rammask; map = write_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->write_b) - map->write_b(addr, val, map->p); + map->write_b(addr, val, map->p); } - uint16_t readmemwl(uint32_t addr) { mem_mapping_t *map; - int i; - uint64_t a; + int i; + uint64_t a; addr64a[0] = addr; addr64a[1] = addr + 1; @@ -912,58 +894,55 @@ readmemwl(uint32_t addr) high_page = 0; if (addr & 1) { - if (!cpu_cyrix_alignment || (addr & 7) == 7) - cycles -= timing_misaligned; - if ((addr & 0xfff) > 0xffe) { - if (cr0 >> 31) { - for (i = 0; i < 2; i++) { - a = mmutranslate_read(addr + i); - addr64a[i] = (uint32_t) a; + if (!cpu_cyrix_alignment || (addr & 7) == 7) + cycles -= timing_misaligned; + if ((addr & 0xfff) > 0xffe) { + if (cr0 >> 31) { + for (i = 0; i < 2; i++) { + a = mmutranslate_read(addr + i); + addr64a[i] = (uint32_t) a; - if (a > 0xffffffffULL) - return 0xffff; - } - } + if (a > 0xffffffffULL) + return 0xffff; + } + } - return readmembl_no_mmut(addr, addr64a[0]) | - (((uint16_t) readmembl_no_mmut(addr + 1, addr64a[1])) << 8); - } else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { - mmu_perm = readlookupp[addr >> 12]; - return *(uint16_t *)(readlookup2[addr >> 12] + addr); - } + return readmembl_no_mmut(addr, addr64a[0]) | (((uint16_t) readmembl_no_mmut(addr + 1, addr64a[1])) << 8); + } else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { + mmu_perm = readlookupp[addr >> 12]; + return *(uint16_t *) (readlookup2[addr >> 12] + addr); + } } if (cr0 >> 31) { - a = mmutranslate_read(addr); - addr64a[0] = (uint32_t) a; + a = mmutranslate_read(addr); + addr64a[0] = (uint32_t) a; - if (a > 0xffffffffULL) - return 0xffff; + if (a > 0xffffffffULL) + return 0xffff; } else - addr64a[0] = (uint64_t) addr; + addr64a[0] = (uint64_t) addr; addr = addr64a[0] & rammask; map = read_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->read_w) - return map->read_w(addr, map->p); + return map->read_w(addr, map->p); if (map && map->read_b) { - return map->read_b(addr, map->p) | - ((uint16_t) (map->read_b(addr + 1, map->p)) << 8); + return map->read_b(addr, map->p) | ((uint16_t) (map->read_b(addr + 1, map->p)) << 8); } return 0xffff; } - void writememwl(uint32_t addr, uint16_t val) { mem_mapping_t *map; - int i; - uint64_t a; + int i; + uint64_t a; addr64a[0] = addr; addr64a[1] = addr + 1; @@ -974,47 +953,47 @@ writememwl(uint32_t addr, uint16_t val) high_page = 0; if (addr & 1) { - if (!cpu_cyrix_alignment || (addr & 7) == 7) - cycles -= timing_misaligned; - if ((addr & 0xfff) > 0xffe) { - if (cr0 >> 31) { - for (i = 0; i < 2; i++) { - /* Do not translate a page that has a valid lookup, as that is by definition valid - and the whole purpose of the lookup is to avoid repeat identical translations. */ - if (!page_lookup[(addr + i) >> 12] || !page_lookup[(addr + i) >> 12]->write_b) { - a = mmutranslate_write(addr + i); - addr64a[i] = (uint32_t) a; + if (!cpu_cyrix_alignment || (addr & 7) == 7) + cycles -= timing_misaligned; + if ((addr & 0xfff) > 0xffe) { + if (cr0 >> 31) { + for (i = 0; i < 2; i++) { + /* Do not translate a page that has a valid lookup, as that is by definition valid + and the whole purpose of the lookup is to avoid repeat identical translations. */ + if (!page_lookup[(addr + i) >> 12] || !page_lookup[(addr + i) >> 12]->write_b) { + a = mmutranslate_write(addr + i); + addr64a[i] = (uint32_t) a; - if (a > 0xffffffffULL) - return; - } - } - } + if (a > 0xffffffffULL) + return; + } + } + } - /* No need to waste precious CPU host cycles on mmutranslate's that were already done, just pass - their result as a parameter to be used if needed. */ - writemembl_no_mmut(addr, addr64a[0], val); - writemembl_no_mmut(addr + 1, addr64a[1], val >> 8); - return; - } else if (writelookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { - mmu_perm = writelookupp[addr >> 12]; - *(uint16_t *)(writelookup2[addr >> 12] + addr) = val; - return; - } + /* No need to waste precious CPU host cycles on mmutranslate's that were already done, just pass + their result as a parameter to be used if needed. */ + writemembl_no_mmut(addr, addr64a[0], val); + writemembl_no_mmut(addr + 1, addr64a[1], val >> 8); + return; + } else if (writelookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { + mmu_perm = writelookupp[addr >> 12]; + *(uint16_t *) (writelookup2[addr >> 12] + addr) = val; + return; + } } if (page_lookup[addr >> 12] && page_lookup[addr >> 12]->write_w) { - page_lookup[addr >> 12]->write_w(addr, val, page_lookup[addr >> 12]); - mmu_perm = page_lookupp[addr >> 12]; - return; + page_lookup[addr >> 12]->write_w(addr, val, page_lookup[addr >> 12]); + mmu_perm = page_lookupp[addr >> 12]; + return; } if (cr0 >> 31) { - a = mmutranslate_write(addr); - addr64a[0] = (uint32_t) a; + a = mmutranslate_write(addr); + addr64a[0] = (uint32_t) a; - if (a > 0xffffffffULL) - return; + if (a > 0xffffffffULL) + return; } addr = addr64a[0] & rammask; @@ -1022,18 +1001,17 @@ writememwl(uint32_t addr, uint16_t val) map = write_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->write_w) { - map->write_w(addr, val, map->p); - return; + map->write_w(addr, val, map->p); + return; } if (map && map->write_b) { - map->write_b(addr, val, map->p); - map->write_b(addr + 1, val >> 8, map->p); - return; + map->write_b(addr, val, map->p); + map->write_b(addr + 1, val >> 8, map->p); + return; } } - /* Read a word from memory without MMU translation - results of previous MMU translation passed as array. */ uint16_t readmemwl_no_mmut(uint32_t addr, uint32_t *a64) @@ -1045,44 +1023,41 @@ readmemwl_no_mmut(uint32_t addr, uint32_t *a64) mem_logical_addr = addr; if (addr & 1) { - if (!cpu_cyrix_alignment || (addr & 7) == 7) - cycles -= timing_misaligned; - if ((addr & 0xfff) > 0xffe) { - if (cr0 >> 31) { - if (cpu_state.abrt || high_page) - return 0xffff; - } + if (!cpu_cyrix_alignment || (addr & 7) == 7) + cycles -= timing_misaligned; + if ((addr & 0xfff) > 0xffe) { + if (cr0 >> 31) { + if (cpu_state.abrt || high_page) + return 0xffff; + } - return readmembl_no_mmut(addr, a64[0]) | - (((uint16_t) readmembl_no_mmut(addr + 1, a64[1])) << 8); - } else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { - mmu_perm = readlookupp[addr >> 12]; - return *(uint16_t *)(readlookup2[addr >> 12] + addr); - } + return readmembl_no_mmut(addr, a64[0]) | (((uint16_t) readmembl_no_mmut(addr + 1, a64[1])) << 8); + } else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { + mmu_perm = readlookupp[addr >> 12]; + return *(uint16_t *) (readlookup2[addr >> 12] + addr); + } } if (cr0 >> 31) { - if (cpu_state.abrt || high_page) - return 0xffff; + if (cpu_state.abrt || high_page) + return 0xffff; - addr = (uint32_t) (a64[0] & rammask); + addr = (uint32_t) (a64[0] & rammask); } else - addr &= rammask; + addr &= rammask; map = read_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->read_w) - return map->read_w(addr, map->p); + return map->read_w(addr, map->p); if (map && map->read_b) { - return map->read_b(addr, map->p) | - ((uint16_t) (map->read_b(addr + 1, map->p)) << 8); + return map->read_b(addr, map->p) | ((uint16_t) (map->read_b(addr + 1, map->p)) << 8); } return 0xffff; } - /* Write a word to memory without MMU translation - results of previous MMU translation passed as array. */ void writememwl_no_mmut(uint32_t addr, uint32_t *a64, uint16_t val) @@ -1094,62 +1069,61 @@ writememwl_no_mmut(uint32_t addr, uint32_t *a64, uint16_t val) mem_logical_addr = addr; if (addr & 1) { - if (!cpu_cyrix_alignment || (addr & 7) == 7) - cycles -= timing_misaligned; - if ((addr & 0xfff) > 0xffe) { - if (cr0 >> 31) { - if (cpu_state.abrt || high_page) - return; - } + if (!cpu_cyrix_alignment || (addr & 7) == 7) + cycles -= timing_misaligned; + if ((addr & 0xfff) > 0xffe) { + if (cr0 >> 31) { + if (cpu_state.abrt || high_page) + return; + } - writemembl_no_mmut(addr, a64[0], val); - writemembl_no_mmut(addr + 1, a64[1], val >> 8); - return; - } else if (writelookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { - mmu_perm = writelookupp[addr >> 12]; - *(uint16_t *)(writelookup2[addr >> 12] + addr) = val; - return; - } + writemembl_no_mmut(addr, a64[0], val); + writemembl_no_mmut(addr + 1, a64[1], val >> 8); + return; + } else if (writelookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { + mmu_perm = writelookupp[addr >> 12]; + *(uint16_t *) (writelookup2[addr >> 12] + addr) = val; + return; + } } if (page_lookup[addr >> 12] && page_lookup[addr >> 12]->write_w) { - mmu_perm = page_lookupp[addr >> 12]; - page_lookup[addr >> 12]->write_w(addr, val, page_lookup[addr >> 12]); - return; + mmu_perm = page_lookupp[addr >> 12]; + page_lookup[addr >> 12]->write_w(addr, val, page_lookup[addr >> 12]); + return; } if (cr0 >> 31) { - if (cpu_state.abrt || high_page) - return; + if (cpu_state.abrt || high_page) + return; - addr = (uint32_t) (a64[0] & rammask); + addr = (uint32_t) (a64[0] & rammask); } else - addr &= rammask; + addr &= rammask; map = write_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->write_w) { - map->write_w(addr, val, map->p); - return; + map->write_w(addr, val, map->p); + return; } if (map && map->write_b) { - map->write_b(addr, val, map->p); - map->write_b(addr + 1, val >> 8, map->p); - return; + map->write_b(addr, val, map->p); + map->write_b(addr + 1, val >> 8, map->p); + return; } } - uint32_t readmemll(uint32_t addr) { mem_mapping_t *map; - int i; - uint64_t a = 0x0000000000000000ULL; + int i; + uint64_t a = 0x0000000000000000ULL; for (i = 0; i < 4; i++) - addr64a[i] = (uint64_t) (addr + i); + addr64a[i] = (uint64_t) (addr + i); GDBSTUB_MEM_ACCESS_FAST(addr64a, GDBSTUB_MEM_READ, 4); mem_logical_addr = addr; @@ -1157,47 +1131,46 @@ readmemll(uint32_t addr) high_page = 0; if (addr & 3) { - if (!cpu_cyrix_alignment || (addr & 7) > 4) - cycles -= timing_misaligned; - if ((addr & 0xfff) > 0xffc) { - if (cr0 >> 31) { - for (i = 0; i < 4; i++) { - if (i == 0) { - a = mmutranslate_read(addr + i); - addr64a[i] = (uint32_t) a; - } else if (!((addr + i) & 0xfff)) { - a = mmutranslate_read(addr + 3); - addr64a[i] = (uint32_t) a; - if (!cpu_state.abrt) { - a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); - addr64a[i] = (uint32_t) a; - } - } else { - a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); - addr64a[i] = (uint32_t) a; - } + if (!cpu_cyrix_alignment || (addr & 7) > 4) + cycles -= timing_misaligned; + if ((addr & 0xfff) > 0xffc) { + if (cr0 >> 31) { + for (i = 0; i < 4; i++) { + if (i == 0) { + a = mmutranslate_read(addr + i); + addr64a[i] = (uint32_t) a; + } else if (!((addr + i) & 0xfff)) { + a = mmutranslate_read(addr + 3); + addr64a[i] = (uint32_t) a; + if (!cpu_state.abrt) { + a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); + addr64a[i] = (uint32_t) a; + } + } else { + a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); + addr64a[i] = (uint32_t) a; + } - if (a > 0xffffffffULL) - return 0xffff; - } - } + if (a > 0xffffffffULL) + return 0xffff; + } + } - /* No need to waste precious CPU host cycles on mmutranslate's that were already done, just pass - their result as a parameter to be used if needed. */ - return readmemwl_no_mmut(addr, addr64a) | - (((uint32_t) readmemwl_no_mmut(addr + 2, &(addr64a[2]))) << 16); - } else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { - mmu_perm = readlookupp[addr >> 12]; - return *(uint32_t *)(readlookup2[addr >> 12] + addr); - } + /* No need to waste precious CPU host cycles on mmutranslate's that were already done, just pass + their result as a parameter to be used if needed. */ + return readmemwl_no_mmut(addr, addr64a) | (((uint32_t) readmemwl_no_mmut(addr + 2, &(addr64a[2]))) << 16); + } else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { + mmu_perm = readlookupp[addr >> 12]; + return *(uint32_t *) (readlookup2[addr >> 12] + addr); + } } if (cr0 >> 31) { - a = mmutranslate_read(addr); - addr64a[0] = (uint32_t) a; + a = mmutranslate_read(addr); + addr64a[0] = (uint32_t) a; - if (a > 0xffffffffULL) - return 0xffffffff; + if (a > 0xffffffffULL) + return 0xffffffff; } addr = addr64a[0] & rammask; @@ -1205,31 +1178,26 @@ readmemll(uint32_t addr) map = read_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->read_l) - return map->read_l(addr, map->p); + return map->read_l(addr, map->p); if (map && map->read_w) - return map->read_w(addr, map->p) | - ((uint32_t) (map->read_w(addr + 2, map->p)) << 16); + return map->read_w(addr, map->p) | ((uint32_t) (map->read_w(addr + 2, map->p)) << 16); if (map && map->read_b) - return map->read_b(addr, map->p) | - ((uint32_t) (map->read_b(addr + 1, map->p)) << 8) | - ((uint32_t) (map->read_b(addr + 2, map->p)) << 16) | - ((uint32_t) (map->read_b(addr + 3, map->p)) << 24); + return map->read_b(addr, map->p) | ((uint32_t) (map->read_b(addr + 1, map->p)) << 8) | ((uint32_t) (map->read_b(addr + 2, map->p)) << 16) | ((uint32_t) (map->read_b(addr + 3, map->p)) << 24); return 0xffffffff; } - void writememll(uint32_t addr, uint32_t val) { mem_mapping_t *map; - int i; - uint64_t a = 0x0000000000000000ULL; + int i; + uint64_t a = 0x0000000000000000ULL; for (i = 0; i < 4; i++) - addr64a[i] = (uint64_t) (addr + i); + addr64a[i] = (uint64_t) (addr + i); GDBSTUB_MEM_ACCESS_FAST(addr64a, GDBSTUB_MEM_WRITE, 4); mem_logical_addr = addr; @@ -1237,59 +1205,59 @@ writememll(uint32_t addr, uint32_t val) high_page = 0; if (addr & 3) { - if (!cpu_cyrix_alignment || (addr & 7) > 4) - cycles -= timing_misaligned; - if ((addr & 0xfff) > 0xffc) { - if (cr0 >> 31) { - for (i = 0; i < 4; i++) { - /* Do not translate a page that has a valid lookup, as that is by definition valid - and the whole purpose of the lookup is to avoid repeat identical translations. */ - if (!page_lookup[(addr + i) >> 12] || !page_lookup[(addr + i) >> 12]->write_b) { - if (i == 0) { - a = mmutranslate_write(addr + i); - addr64a[i] = (uint32_t) a; - } else if (!((addr + i) & 0xfff)) { - a = mmutranslate_write(addr + 3); - addr64a[i] = (uint32_t) a; - if (!cpu_state.abrt) { - a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); - addr64a[i] = (uint32_t) a; - } - } else { - a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); - addr64a[i] = (uint32_t) a; - } + if (!cpu_cyrix_alignment || (addr & 7) > 4) + cycles -= timing_misaligned; + if ((addr & 0xfff) > 0xffc) { + if (cr0 >> 31) { + for (i = 0; i < 4; i++) { + /* Do not translate a page that has a valid lookup, as that is by definition valid + and the whole purpose of the lookup is to avoid repeat identical translations. */ + if (!page_lookup[(addr + i) >> 12] || !page_lookup[(addr + i) >> 12]->write_b) { + if (i == 0) { + a = mmutranslate_write(addr + i); + addr64a[i] = (uint32_t) a; + } else if (!((addr + i) & 0xfff)) { + a = mmutranslate_write(addr + 3); + addr64a[i] = (uint32_t) a; + if (!cpu_state.abrt) { + a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); + addr64a[i] = (uint32_t) a; + } + } else { + a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); + addr64a[i] = (uint32_t) a; + } - if (a > 0xffffffffULL) - return; - } - } - } + if (a > 0xffffffffULL) + return; + } + } + } - /* No need to waste precious CPU host cycles on mmutranslate's that were already done, just pass - their result as a parameter to be used if needed. */ - writememwl_no_mmut(addr, &(addr64a[0]), val); - writememwl_no_mmut(addr + 2, &(addr64a[2]), val >> 16); - return; - } else if (writelookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { - mmu_perm = writelookupp[addr >> 12]; - *(uint32_t *)(writelookup2[addr >> 12] + addr) = val; - return; - } + /* No need to waste precious CPU host cycles on mmutranslate's that were already done, just pass + their result as a parameter to be used if needed. */ + writememwl_no_mmut(addr, &(addr64a[0]), val); + writememwl_no_mmut(addr + 2, &(addr64a[2]), val >> 16); + return; + } else if (writelookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { + mmu_perm = writelookupp[addr >> 12]; + *(uint32_t *) (writelookup2[addr >> 12] + addr) = val; + return; + } } if (page_lookup[addr >> 12] && page_lookup[addr >> 12]->write_l) { - mmu_perm = page_lookupp[addr >> 12]; - page_lookup[addr >> 12]->write_l(addr, val, page_lookup[addr >> 12]); - return; + mmu_perm = page_lookupp[addr >> 12]; + page_lookup[addr >> 12]->write_l(addr, val, page_lookup[addr >> 12]); + return; } if (cr0 >> 31) { - a = mmutranslate_write(addr); - addr64a[0] = (uint32_t) a; + a = mmutranslate_write(addr); + addr64a[0] = (uint32_t) a; - if (a > 0xffffffffULL) - return; + if (a > 0xffffffffULL) + return; } addr = addr64a[0] & rammask; @@ -1297,24 +1265,23 @@ writememll(uint32_t addr, uint32_t val) map = write_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->write_l) { - map->write_l(addr, val, map->p); - return; + map->write_l(addr, val, map->p); + return; } if (map && map->write_w) { - map->write_w(addr, val, map->p); - map->write_w(addr + 2, val >> 16, map->p); - return; + map->write_w(addr, val, map->p); + map->write_w(addr + 2, val >> 16, map->p); + return; } if (map && map->write_b) { - map->write_b(addr, val, map->p); - map->write_b(addr + 1, val >> 8, map->p); - map->write_b(addr + 2, val >> 16, map->p); - map->write_b(addr + 3, val >> 24, map->p); - return; + map->write_b(addr, val, map->p); + map->write_b(addr + 1, val >> 8, map->p); + map->write_b(addr + 2, val >> 16, map->p); + map->write_b(addr + 3, val >> 24, map->p); + return; } } - /* Read a long from memory without MMU translation - results of previous MMU translation passed as array. */ uint32_t readmemll_no_mmut(uint32_t addr, uint32_t *a64) @@ -1326,49 +1293,43 @@ readmemll_no_mmut(uint32_t addr, uint32_t *a64) mem_logical_addr = addr; if (addr & 3) { - if (!cpu_cyrix_alignment || (addr & 7) > 4) - cycles -= timing_misaligned; - if ((addr & 0xfff) > 0xffc) { - if (cr0 >> 31) { - if (cpu_state.abrt || high_page) - return 0xffffffff; - } + if (!cpu_cyrix_alignment || (addr & 7) > 4) + cycles -= timing_misaligned; + if ((addr & 0xfff) > 0xffc) { + if (cr0 >> 31) { + if (cpu_state.abrt || high_page) + return 0xffffffff; + } - return readmemwl_no_mmut(addr, a64) | - ((uint32_t) (readmemwl_no_mmut(addr + 2, &(a64[2]))) << 16); - } else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { - mmu_perm = readlookupp[addr >> 12]; - return *(uint32_t *)(readlookup2[addr >> 12] + addr); - } + return readmemwl_no_mmut(addr, a64) | ((uint32_t) (readmemwl_no_mmut(addr + 2, &(a64[2]))) << 16); + } else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { + mmu_perm = readlookupp[addr >> 12]; + return *(uint32_t *) (readlookup2[addr >> 12] + addr); + } } if (cr0 >> 31) { - if (cpu_state.abrt || high_page) - return 0xffffffff; + if (cpu_state.abrt || high_page) + return 0xffffffff; - addr = (uint32_t) (a64[0] & rammask); + addr = (uint32_t) (a64[0] & rammask); } else - addr &= rammask; + addr &= rammask; map = read_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->read_l) - return map->read_l(addr, map->p); + return map->read_l(addr, map->p); if (map && map->read_w) - return map->read_w(addr, map->p) | - ((uint32_t) (map->read_w(addr + 2, map->p)) << 16); + return map->read_w(addr, map->p) | ((uint32_t) (map->read_w(addr + 2, map->p)) << 16); if (map && map->read_b) - return map->read_b(addr, map->p) | - ((uint32_t) (map->read_b(addr + 1, map->p)) << 8) | - ((uint32_t) (map->read_b(addr + 2, map->p)) << 16) | - ((uint32_t) (map->read_b(addr + 3, map->p)) << 24); + return map->read_b(addr, map->p) | ((uint32_t) (map->read_b(addr + 1, map->p)) << 8) | ((uint32_t) (map->read_b(addr + 2, map->p)) << 16) | ((uint32_t) (map->read_b(addr + 3, map->p)) << 24); return 0xffffffff; } - /* Write a long to memory without MMU translation - results of previous MMU translation passed as array. */ void writememll_no_mmut(uint32_t addr, uint32_t *a64, uint32_t val) @@ -1380,68 +1341,67 @@ writememll_no_mmut(uint32_t addr, uint32_t *a64, uint32_t val) mem_logical_addr = addr; if (addr & 3) { - if (!cpu_cyrix_alignment || (addr & 7) > 4) - cycles -= timing_misaligned; - if ((addr & 0xfff) > 0xffc) { - if (cr0 >> 31) { - if (cpu_state.abrt || high_page) - return; - } + if (!cpu_cyrix_alignment || (addr & 7) > 4) + cycles -= timing_misaligned; + if ((addr & 0xfff) > 0xffc) { + if (cr0 >> 31) { + if (cpu_state.abrt || high_page) + return; + } - writememwl_no_mmut(addr, &(a64[0]), val); - writememwl_no_mmut(addr + 2, &(a64[2]), val >> 16); - return; - } else if (writelookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { - mmu_perm = writelookupp[addr >> 12]; - *(uint32_t *)(writelookup2[addr >> 12] + addr) = val; - return; - } + writememwl_no_mmut(addr, &(a64[0]), val); + writememwl_no_mmut(addr + 2, &(a64[2]), val >> 16); + return; + } else if (writelookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { + mmu_perm = writelookupp[addr >> 12]; + *(uint32_t *) (writelookup2[addr >> 12] + addr) = val; + return; + } } if (page_lookup[addr >> 12] && page_lookup[addr >> 12]->write_l) { - mmu_perm = page_lookupp[addr >> 12]; - page_lookup[addr >> 12]->write_l(addr, val, page_lookup[addr >> 12]); - return; + mmu_perm = page_lookupp[addr >> 12]; + page_lookup[addr >> 12]->write_l(addr, val, page_lookup[addr >> 12]); + return; } if (cr0 >> 31) { - if (cpu_state.abrt || high_page) - return; + if (cpu_state.abrt || high_page) + return; - addr = (uint32_t) (a64[0] & rammask); + addr = (uint32_t) (a64[0] & rammask); } else - addr &= rammask; + addr &= rammask; map = write_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->write_l) { - map->write_l(addr, val, map->p); - return; + map->write_l(addr, val, map->p); + return; } if (map && map->write_w) { - map->write_w(addr, val, map->p); - map->write_w(addr + 2, val >> 16, map->p); - return; + map->write_w(addr, val, map->p); + map->write_w(addr + 2, val >> 16, map->p); + return; } if (map && map->write_b) { - map->write_b(addr, val, map->p); - map->write_b(addr + 1, val >> 8, map->p); - map->write_b(addr + 2, val >> 16, map->p); - map->write_b(addr + 3, val >> 24, map->p); - return; + map->write_b(addr, val, map->p); + map->write_b(addr + 1, val >> 8, map->p); + map->write_b(addr + 2, val >> 16, map->p); + map->write_b(addr + 3, val >> 24, map->p); + return; } } - uint64_t readmemql(uint32_t addr) { mem_mapping_t *map; - int i; - uint64_t a = 0x0000000000000000ULL; + int i; + uint64_t a = 0x0000000000000000ULL; for (i = 0; i < 8; i++) - addr64a[i] = (uint64_t) (addr + i); + addr64a[i] = (uint64_t) (addr + i); GDBSTUB_MEM_ACCESS_FAST(addr64a, GDBSTUB_MEM_READ, 8); mem_logical_addr = addr; @@ -1449,67 +1409,65 @@ readmemql(uint32_t addr) high_page = 0; if (addr & 7) { - cycles -= timing_misaligned; - if ((addr & 0xfff) > 0xff8) { - if (cr0 >> 31) { - for (i = 0; i < 8; i++) { - if (i == 0) { - a = mmutranslate_read(addr + i); - addr64a[i] = (uint32_t) a; - } else if (!((addr + i) & 0xfff)) { - a = mmutranslate_read(addr + 7); - addr64a[i] = (uint32_t) a; - if (!cpu_state.abrt) { - a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); - addr64a[i] = (uint32_t) a; - } - } else { - a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); - addr64a[i] = (uint32_t) a; - } + cycles -= timing_misaligned; + if ((addr & 0xfff) > 0xff8) { + if (cr0 >> 31) { + for (i = 0; i < 8; i++) { + if (i == 0) { + a = mmutranslate_read(addr + i); + addr64a[i] = (uint32_t) a; + } else if (!((addr + i) & 0xfff)) { + a = mmutranslate_read(addr + 7); + addr64a[i] = (uint32_t) a; + if (!cpu_state.abrt) { + a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); + addr64a[i] = (uint32_t) a; + } + } else { + a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); + addr64a[i] = (uint32_t) a; + } - if (a > 0xffffffffULL) - return 0xffff; - } - } + if (a > 0xffffffffULL) + return 0xffff; + } + } - /* No need to waste precious CPU host cycles on mmutranslate's that were already done, just pass - their result as a parameter to be used if needed. */ - return readmemll_no_mmut(addr, addr64a) | - (((uint64_t) readmemll_no_mmut(addr + 4, &(addr64a[4]))) << 32); - } else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { - mmu_perm = readlookupp[addr >> 12]; - return *(uint64_t *)(readlookup2[addr >> 12] + addr); - } + /* No need to waste precious CPU host cycles on mmutranslate's that were already done, just pass + their result as a parameter to be used if needed. */ + return readmemll_no_mmut(addr, addr64a) | (((uint64_t) readmemll_no_mmut(addr + 4, &(addr64a[4]))) << 32); + } else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { + mmu_perm = readlookupp[addr >> 12]; + return *(uint64_t *) (readlookup2[addr >> 12] + addr); + } } if (cr0 >> 31) { - a = mmutranslate_read(addr); + a = mmutranslate_read(addr); addr64a[0] = (uint32_t) a; - if (a > 0xffffffffULL) - return 0xffffffffffffffffULL; + if (a > 0xffffffffULL) + return 0xffffffffffffffffULL; } addr = addr64a[0] & rammask; map = read_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->read_l) - return map->read_l(addr, map->p) | ((uint64_t)map->read_l(addr + 4, map->p) << 32); + return map->read_l(addr, map->p) | ((uint64_t) map->read_l(addr + 4, map->p) << 32); return readmemll(addr) | ((uint64_t) readmemll(addr + 4) << 32); } - void writememql(uint32_t addr, uint64_t val) { mem_mapping_t *map; - int i; - uint64_t a = 0x0000000000000000ULL; + int i; + uint64_t a = 0x0000000000000000ULL; for (i = 0; i < 8; i++) - addr64a[i] = (uint64_t) (addr + i); + addr64a[i] = (uint64_t) (addr + i); GDBSTUB_MEM_ACCESS_FAST(addr64a, GDBSTUB_MEM_WRITE, 8); mem_logical_addr = addr; @@ -1517,57 +1475,57 @@ writememql(uint32_t addr, uint64_t val) high_page = 0; if (addr & 7) { - cycles -= timing_misaligned; - if ((addr & 0xfff) > 0xff8) { - if (cr0 >> 31) { - for (i = 0; i < 8; i++) { - /* Do not translate a page that has a valid lookup, as that is by definition valid - and the whole purpose of the lookup is to avoid repeat identical translations. */ - if (!page_lookup[(addr + i) >> 12] || !page_lookup[(addr + i) >> 12]->write_b) { - if (i == 0) { - a = mmutranslate_write(addr + i); - addr64a[i] = (uint32_t) a; - } else if (!((addr + i) & 0xfff)) { - a = mmutranslate_write(addr + 7); - addr64a[i] = (uint32_t) a; - if (!cpu_state.abrt) { - a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); - addr64a[i] = (uint32_t) a; - } - } else { - a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); - addr64a[i] = (uint32_t) a; - } + cycles -= timing_misaligned; + if ((addr & 0xfff) > 0xff8) { + if (cr0 >> 31) { + for (i = 0; i < 8; i++) { + /* Do not translate a page that has a valid lookup, as that is by definition valid + and the whole purpose of the lookup is to avoid repeat identical translations. */ + if (!page_lookup[(addr + i) >> 12] || !page_lookup[(addr + i) >> 12]->write_b) { + if (i == 0) { + a = mmutranslate_write(addr + i); + addr64a[i] = (uint32_t) a; + } else if (!((addr + i) & 0xfff)) { + a = mmutranslate_write(addr + 7); + addr64a[i] = (uint32_t) a; + if (!cpu_state.abrt) { + a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); + addr64a[i] = (uint32_t) a; + } + } else { + a = (a & ~0xfffLL) | ((uint64_t) ((addr + i) & 0xfff)); + addr64a[i] = (uint32_t) a; + } - if (addr64a[i] > 0xffffffffULL) - return; - } - } - } + if (addr64a[i] > 0xffffffffULL) + return; + } + } + } - /* No need to waste precious CPU host cycles on mmutranslate's that were already done, just pass - their result as a parameter to be used if needed. */ - writememll_no_mmut(addr, addr64a, val); - writememll_no_mmut(addr + 4, &(addr64a[4]), val >> 32); - return; - } else if (writelookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { - mmu_perm = writelookupp[addr >> 12]; - *(uint64_t *)(writelookup2[addr >> 12] + addr) = val; - return; - } + /* No need to waste precious CPU host cycles on mmutranslate's that were already done, just pass + their result as a parameter to be used if needed. */ + writememll_no_mmut(addr, addr64a, val); + writememll_no_mmut(addr + 4, &(addr64a[4]), val >> 32); + return; + } else if (writelookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) { + mmu_perm = writelookupp[addr >> 12]; + *(uint64_t *) (writelookup2[addr >> 12] + addr) = val; + return; + } } if (page_lookup[addr >> 12] && page_lookup[addr >> 12]->write_l) { - mmu_perm = page_lookupp[addr >> 12]; - page_lookup[addr >> 12]->write_l(addr, val, page_lookup[addr >> 12]); - page_lookup[addr >> 12]->write_l(addr + 4, val >> 32, page_lookup[addr >> 12]); - return; + mmu_perm = page_lookupp[addr >> 12]; + page_lookup[addr >> 12]->write_l(addr, val, page_lookup[addr >> 12]); + page_lookup[addr >> 12]->write_l(addr + 4, val >> 32, page_lookup[addr >> 12]); + return; } if (cr0 >> 31) { - addr64a[0] = mmutranslate_write(addr); - if (addr64a[0] > 0xffffffffULL) - return; + addr64a[0] = mmutranslate_write(addr); + if (addr64a[0] > 0xffffffffULL) + return; } addr = addr64a[0] & rammask; @@ -1575,164 +1533,158 @@ writememql(uint32_t addr, uint64_t val) map = write_mapping[addr >> MEM_GRANULARITY_BITS]; if (map && map->write_l) { - map->write_l(addr, val, map->p); - map->write_l(addr + 4, val >> 32, map->p); - return; + map->write_l(addr, val, map->p); + map->write_l(addr + 4, val >> 32, map->p); + return; } if (map && map->write_w) { - map->write_w(addr, val, map->p); - map->write_w(addr + 2, val >> 16, map->p); - map->write_w(addr + 4, val >> 32, map->p); - map->write_w(addr + 6, val >> 48, map->p); - return; + map->write_w(addr, val, map->p); + map->write_w(addr + 2, val >> 16, map->p); + map->write_w(addr + 4, val >> 32, map->p); + map->write_w(addr + 6, val >> 48, map->p); + return; } if (map && map->write_b) { - map->write_b(addr, val, map->p); - map->write_b(addr + 1, val >> 8, map->p); - map->write_b(addr + 2, val >> 16, map->p); - map->write_b(addr + 3, val >> 24, map->p); - map->write_b(addr + 4, val >> 32, map->p); - map->write_b(addr + 5, val >> 40, map->p); - map->write_b(addr + 6, val >> 48, map->p); - map->write_b(addr + 7, val >> 56, map->p); - return; + map->write_b(addr, val, map->p); + map->write_b(addr + 1, val >> 8, map->p); + map->write_b(addr + 2, val >> 16, map->p); + map->write_b(addr + 3, val >> 24, map->p); + map->write_b(addr + 4, val >> 32, map->p); + map->write_b(addr + 5, val >> 40, map->p); + map->write_b(addr + 6, val >> 48, map->p); + map->write_b(addr + 7, val >> 56, map->p); + return; } } - void do_mmutranslate(uint32_t addr, uint32_t *a64, int num, int write) { - int i, cond = 1; + int i, cond = 1; uint32_t last_addr = addr + (num - 1); - uint64_t a = 0x0000000000000000ULL; + uint64_t a = 0x0000000000000000ULL; for (i = 0; i < num; i++) - a64[i] = (uint64_t) addr; + a64[i] = (uint64_t) addr; for (i = 0; i < num; i++) { - if (cr0 >> 31) { - if (write && ((i == 0) || !(addr & 0xfff))) - cond = (!page_lookup[addr >> 12] || !page_lookup[addr >> 12]->write_b); + if (cr0 >> 31) { + if (write && ((i == 0) || !(addr & 0xfff))) + cond = (!page_lookup[addr >> 12] || !page_lookup[addr >> 12]->write_b); - if (cond) { - /* If we have encountered at least one page fault, mark all subsequent addresses as - having page faulted, prevents false negatives in readmem*l_no_mmut. */ - if ((i > 0) && cpu_state.abrt && !high_page) - a64[i] = a64[i - 1]; - /* If we are on the same page, there is no need to translate again, as we can just - reuse the previous result. */ - else if (i == 0) { - a = mmutranslatereal(addr, write); - a64[i] = (uint32_t) a; + if (cond) { + /* If we have encountered at least one page fault, mark all subsequent addresses as + having page faulted, prevents false negatives in readmem*l_no_mmut. */ + if ((i > 0) && cpu_state.abrt && !high_page) + a64[i] = a64[i - 1]; + /* If we are on the same page, there is no need to translate again, as we can just + reuse the previous result. */ + else if (i == 0) { + a = mmutranslatereal(addr, write); + a64[i] = (uint32_t) a; - high_page = high_page || (!cpu_state.abrt && (a > 0xffffffffULL)); - } else if (!(addr & 0xfff)) { - a = mmutranslatereal(last_addr, write); - a64[i] = (uint32_t) a; + high_page = high_page || (!cpu_state.abrt && (a > 0xffffffffULL)); + } else if (!(addr & 0xfff)) { + a = mmutranslatereal(last_addr, write); + a64[i] = (uint32_t) a; - high_page = high_page || (!cpu_state.abrt && (a64[i] > 0xffffffffULL)); + high_page = high_page || (!cpu_state.abrt && (a64[i] > 0xffffffffULL)); - if (!cpu_state.abrt) { - a = (a & 0xfffffffffffff000ULL) | ((uint64_t) (addr & 0xfff)); - a64[i] = (uint32_t) a; - } - } else { - a = (a & 0xfffffffffffff000ULL) | ((uint64_t) (addr & 0xfff)); - a64[i] = (uint32_t) a; - } - } else - mmu_perm = page_lookupp[addr >> 12]; - } + if (!cpu_state.abrt) { + a = (a & 0xfffffffffffff000ULL) | ((uint64_t) (addr & 0xfff)); + a64[i] = (uint32_t) a; + } + } else { + a = (a & 0xfffffffffffff000ULL) | ((uint64_t) (addr & 0xfff)); + a64[i] = (uint32_t) a; + } + } else + mmu_perm = page_lookupp[addr >> 12]; + } - addr++; + addr++; } } - uint8_t mem_readb_phys(uint32_t addr) { mem_mapping_t *map = read_mapping_bus[addr >> MEM_GRANULARITY_BITS]; - uint8_t ret = 0xff; + uint8_t ret = 0xff; mem_logical_addr = 0xffffffff; if (map) { - if (map->exec) - ret = map->exec[(addr - map->base) & map->mask]; - else if (map->read_b) - ret = map->read_b(addr, map->p); + if (map->exec) + ret = map->exec[(addr - map->base) & map->mask]; + else if (map->read_b) + ret = map->read_b(addr, map->p); } return ret; } - uint16_t mem_readw_phys(uint32_t addr) { mem_mapping_t *map = read_mapping_bus[addr >> MEM_GRANULARITY_BITS]; - uint16_t ret, *p; + uint16_t ret, *p; mem_logical_addr = 0xffffffff; if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_HBOUND) && (map && map->exec)) { - p = (uint16_t *) &(map->exec[(addr - map->base) & map->mask]); - ret = *p; + p = (uint16_t *) &(map->exec[(addr - map->base) & map->mask]); + ret = *p; } else if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_HBOUND) && (map && map->read_w)) - ret = map->read_w(addr, map->p); + ret = map->read_w(addr, map->p); else { - ret = mem_readb_phys(addr + 1) << 8; - ret |= mem_readb_phys(addr); + ret = mem_readb_phys(addr + 1) << 8; + ret |= mem_readb_phys(addr); } return ret; } - uint32_t mem_readl_phys(uint32_t addr) { mem_mapping_t *map = read_mapping_bus[addr >> MEM_GRANULARITY_BITS]; - uint32_t ret, *p; + uint32_t ret, *p; mem_logical_addr = 0xffffffff; if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_QBOUND) && (map && map->exec)) { - p = (uint32_t *) &(map->exec[(addr - map->base) & map->mask]); - ret = *p; + p = (uint32_t *) &(map->exec[(addr - map->base) & map->mask]); + ret = *p; } else if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_QBOUND) && (map && map->read_l)) - ret = map->read_l(addr, map->p); + ret = map->read_l(addr, map->p); else { - ret = mem_readw_phys(addr + 2) << 16; - ret |= mem_readw_phys(addr); + ret = mem_readw_phys(addr + 2) << 16; + ret |= mem_readw_phys(addr); } return ret; } - void mem_read_phys(void *dest, uint32_t addr, int transfer_size) { - uint8_t *pb; + uint8_t *pb; uint16_t *pw; uint32_t *pl; if (transfer_size == 4) { - pl = (uint32_t *) dest; - *pl = mem_readl_phys(addr); + pl = (uint32_t *) dest; + *pl = mem_readl_phys(addr); } else if (transfer_size == 2) { - pw = (uint16_t *) dest; - *pw = mem_readw_phys(addr); + pw = (uint16_t *) dest; + *pw = mem_readw_phys(addr); } else if (transfer_size == 1) { - pb = (uint8_t *) dest; - *pb = mem_readb_phys(addr); + pb = (uint8_t *) dest; + *pb = mem_readb_phys(addr); } } - void mem_writeb_phys(uint32_t addr, uint8_t val) { @@ -1741,125 +1693,118 @@ mem_writeb_phys(uint32_t addr, uint8_t val) mem_logical_addr = 0xffffffff; if (map) { - if (map->exec) - map->exec[(addr - map->base) & map->mask] = val; - else if (map->write_b) - map->write_b(addr, val, map->p); - } + if (map->exec) + map->exec[(addr - map->base) & map->mask] = val; + else if (map->write_b) + map->write_b(addr, val, map->p); + } } - void mem_writew_phys(uint32_t addr, uint16_t val) { mem_mapping_t *map = write_mapping_bus[addr >> MEM_GRANULARITY_BITS]; - uint16_t *p; + uint16_t *p; mem_logical_addr = 0xffffffff; if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_HBOUND) && (map && map->exec)) { - p = (uint16_t *) &(map->exec[(addr - map->base) & map->mask]); - *p = val; + p = (uint16_t *) &(map->exec[(addr - map->base) & map->mask]); + *p = val; } else if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_HBOUND) && (map && map->write_w)) - map->write_w(addr, val, map->p); + map->write_w(addr, val, map->p); else { - mem_writeb_phys(addr, val & 0xff); - mem_writeb_phys(addr + 1, (val >> 8) & 0xff); + mem_writeb_phys(addr, val & 0xff); + mem_writeb_phys(addr + 1, (val >> 8) & 0xff); } } - void mem_writel_phys(uint32_t addr, uint32_t val) { mem_mapping_t *map = write_mapping_bus[addr >> MEM_GRANULARITY_BITS]; - uint32_t *p; + uint32_t *p; mem_logical_addr = 0xffffffff; if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_QBOUND) && (map && map->exec)) { - p = (uint32_t *) &(map->exec[(addr - map->base) & map->mask]); - *p = val; + p = (uint32_t *) &(map->exec[(addr - map->base) & map->mask]); + *p = val; } else if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_QBOUND) && (map && map->write_l)) - map->write_l(addr, val, map->p); + map->write_l(addr, val, map->p); else { - mem_writew_phys(addr, val & 0xffff); - mem_writew_phys(addr + 2, (val >> 16) & 0xffff); + mem_writew_phys(addr, val & 0xffff); + mem_writew_phys(addr + 2, (val >> 16) & 0xffff); } } - void mem_write_phys(void *src, uint32_t addr, int transfer_size) { - uint8_t *pb; + uint8_t *pb; uint16_t *pw; uint32_t *pl; if (transfer_size == 4) { - pl = (uint32_t *) src; - mem_writel_phys(addr, *pl); + pl = (uint32_t *) src; + mem_writel_phys(addr, *pl); } else if (transfer_size == 2) { - pw = (uint16_t *) src; - mem_writew_phys(addr, *pw); + pw = (uint16_t *) src; + mem_writew_phys(addr, *pw); } else if (transfer_size == 1) { - pb = (uint8_t *) src; - mem_writeb_phys(addr, *pb); + pb = (uint8_t *) src; + mem_writeb_phys(addr, *pb); } } - uint8_t mem_read_ram(uint32_t addr, void *priv) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) - mem_log("Read B %02X from %08X\n", ram[addr], addr); + mem_log("Read B %02X from %08X\n", ram[addr], addr); #endif if (is286) - addreadlookup(mem_logical_addr, addr); + addreadlookup(mem_logical_addr, addr); return ram[addr]; } - uint16_t mem_read_ramw(uint32_t addr, void *priv) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) - mem_log("Read W %04X from %08X\n", *(uint16_t *)&ram[addr], addr); + mem_log("Read W %04X from %08X\n", *(uint16_t *) &ram[addr], addr); #endif if (is286) - addreadlookup(mem_logical_addr, addr); + addreadlookup(mem_logical_addr, addr); - return *(uint16_t *)&ram[addr]; + return *(uint16_t *) &ram[addr]; } - uint32_t mem_read_raml(uint32_t addr, void *priv) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) - mem_log("Read L %08X from %08X\n", *(uint32_t *)&ram[addr], addr); + mem_log("Read L %08X from %08X\n", *(uint32_t *) &ram[addr], addr); #endif if (is286) - addreadlookup(mem_logical_addr, addr); + addreadlookup(mem_logical_addr, addr); - return *(uint32_t *)&ram[addr]; + return *(uint32_t *) &ram[addr]; } - uint8_t mem_read_ram_2gb(uint32_t addr, void *priv) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) - mem_log("Read B %02X from %08X\n", ram[addr], addr); + mem_log("Read B %02X from %08X\n", ram[addr], addr); #endif addreadlookup(mem_logical_addr, addr); @@ -1867,161 +1812,153 @@ mem_read_ram_2gb(uint32_t addr, void *priv) return ram2[addr - (1 << 30)]; } - uint16_t mem_read_ram_2gbw(uint32_t addr, void *priv) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) - mem_log("Read W %04X from %08X\n", *(uint16_t *)&ram[addr], addr); + mem_log("Read W %04X from %08X\n", *(uint16_t *) &ram[addr], addr); #endif addreadlookup(mem_logical_addr, addr); - return *(uint16_t *)&ram2[addr - (1 << 30)]; + return *(uint16_t *) &ram2[addr - (1 << 30)]; } - uint32_t mem_read_ram_2gbl(uint32_t addr, void *priv) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) - mem_log("Read L %08X from %08X\n", *(uint32_t *)&ram[addr], addr); + mem_log("Read L %08X from %08X\n", *(uint32_t *) &ram[addr], addr); #endif addreadlookup(mem_logical_addr, addr); - return *(uint32_t *)&ram2[addr - (1 << 30)]; + return *(uint32_t *) &ram2[addr - (1 << 30)]; } - #ifdef USE_NEW_DYNAREC static inline int page_index(page_t *p) { - return ((uintptr_t)p - (uintptr_t)pages) / sizeof(page_t); + return ((uintptr_t) p - (uintptr_t) pages) / sizeof(page_t); } - void page_add_to_evict_list(page_t *p) { pages[purgable_page_list_head].evict_prev = page_index(p); - p->evict_next = purgable_page_list_head; - p->evict_prev = 0; - purgable_page_list_head = pages[purgable_page_list_head].evict_prev; + p->evict_next = purgable_page_list_head; + p->evict_prev = 0; + purgable_page_list_head = pages[purgable_page_list_head].evict_prev; purgeable_page_count++; } - void page_remove_from_evict_list(page_t *p) { if (!page_in_evict_list(p)) - fatal("page_remove_from_evict_list: not in evict list!\n"); + fatal("page_remove_from_evict_list: not in evict list!\n"); if (p->evict_prev) - pages[p->evict_prev].evict_next = p->evict_next; + pages[p->evict_prev].evict_next = p->evict_next; else - purgable_page_list_head = p->evict_next; + purgable_page_list_head = p->evict_next; if (p->evict_next) - pages[p->evict_next].evict_prev = p->evict_prev; + pages[p->evict_next].evict_prev = p->evict_prev; p->evict_prev = EVICT_NOT_IN_LIST; - purgeable_page_count--; + purgeable_page_count--; } - void mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p) { if (p == NULL) - return; + return; -#ifdef USE_DYNAREC +# ifdef USE_DYNAREC if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff]) || codegen_in_recompile) { -#else +# else if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff])) { -#endif - uint64_t mask = (uint64_t)1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); - int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK; - uint64_t byte_mask = (uint64_t)1 << (addr & PAGE_BYTE_MASK_MASK); +# endif + uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); + int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK; + uint64_t byte_mask = (uint64_t) 1 << (addr & PAGE_BYTE_MASK_MASK); - p->mem[addr & 0xfff] = val; - p->dirty_mask |= mask; - if ((p->code_present_mask & mask) && !page_in_evict_list(p)) - page_add_to_evict_list(p); - p->byte_dirty_mask[byte_offset] |= byte_mask; - if ((p->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(p)) - page_add_to_evict_list(p); + p->mem[addr & 0xfff] = val; + p->dirty_mask |= mask; + if ((p->code_present_mask & mask) && !page_in_evict_list(p)) + page_add_to_evict_list(p); + p->byte_dirty_mask[byte_offset] |= byte_mask; + if ((p->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(p)) + page_add_to_evict_list(p); } } - void mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p) { if (p == NULL) - return; + return; -#ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *)&p->mem[addr & 0xfff]) || codegen_in_recompile) { -#else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *)&p->mem[addr & 0xfff])) { -#endif - uint64_t mask = (uint64_t)1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); - int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK; - uint64_t byte_mask = (uint64_t)1 << (addr & PAGE_BYTE_MASK_MASK); +# ifdef USE_DYNAREC + if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) { +# else + if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff])) { +# endif + uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); + int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK; + uint64_t byte_mask = (uint64_t) 1 << (addr & PAGE_BYTE_MASK_MASK); - if ((addr & 0xf) == 0xf) - mask |= (mask << 1); - *(uint16_t *)&p->mem[addr & 0xfff] = val; - p->dirty_mask |= mask; - if ((p->code_present_mask & mask) && !page_in_evict_list(p)) - page_add_to_evict_list(p); - if ((addr & PAGE_BYTE_MASK_MASK) == PAGE_BYTE_MASK_MASK) { - p->byte_dirty_mask[byte_offset+1] |= 1; - if ((p->byte_code_present_mask[byte_offset+1] & 1) && !page_in_evict_list(p)) - page_add_to_evict_list(p); - } else - byte_mask |= (byte_mask << 1); + if ((addr & 0xf) == 0xf) + mask |= (mask << 1); + *(uint16_t *) &p->mem[addr & 0xfff] = val; + p->dirty_mask |= mask; + if ((p->code_present_mask & mask) && !page_in_evict_list(p)) + page_add_to_evict_list(p); + if ((addr & PAGE_BYTE_MASK_MASK) == PAGE_BYTE_MASK_MASK) { + p->byte_dirty_mask[byte_offset + 1] |= 1; + if ((p->byte_code_present_mask[byte_offset + 1] & 1) && !page_in_evict_list(p)) + page_add_to_evict_list(p); + } else + byte_mask |= (byte_mask << 1); - p->byte_dirty_mask[byte_offset] |= byte_mask; + p->byte_dirty_mask[byte_offset] |= byte_mask; - if ((p->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(p)) - page_add_to_evict_list(p); + if ((p->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(p)) + page_add_to_evict_list(p); } } - void mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p) { if (p == NULL) - return; + return; -#ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *)&p->mem[addr & 0xfff]) || codegen_in_recompile) { -#else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *)&p->mem[addr & 0xfff])) { -#endif - uint64_t mask = (uint64_t)1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); - int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK; - uint64_t byte_mask = (uint64_t)0xf << (addr & PAGE_BYTE_MASK_MASK); +# ifdef USE_DYNAREC + if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) { +# else + if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff])) { +# endif + uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); + int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK; + uint64_t byte_mask = (uint64_t) 0xf << (addr & PAGE_BYTE_MASK_MASK); - if ((addr & 0xf) >= 0xd) - mask |= (mask << 1); - *(uint32_t *)&p->mem[addr & 0xfff] = val; - p->dirty_mask |= mask; - p->byte_dirty_mask[byte_offset] |= byte_mask; - if (!page_in_evict_list(p) && ((p->code_present_mask & mask) || (p->byte_code_present_mask[byte_offset] & byte_mask))) - page_add_to_evict_list(p); - if ((addr & PAGE_BYTE_MASK_MASK) > (PAGE_BYTE_MASK_MASK-3)) { - uint32_t byte_mask_2 = 0xf >> (4 - (addr & 3)); + if ((addr & 0xf) >= 0xd) + mask |= (mask << 1); + *(uint32_t *) &p->mem[addr & 0xfff] = val; + p->dirty_mask |= mask; + p->byte_dirty_mask[byte_offset] |= byte_mask; + if (!page_in_evict_list(p) && ((p->code_present_mask & mask) || (p->byte_code_present_mask[byte_offset] & byte_mask))) + page_add_to_evict_list(p); + if ((addr & PAGE_BYTE_MASK_MASK) > (PAGE_BYTE_MASK_MASK - 3)) { + uint32_t byte_mask_2 = 0xf >> (4 - (addr & 3)); - p->byte_dirty_mask[byte_offset+1] |= byte_mask_2; - if ((p->byte_code_present_mask[byte_offset+1] & byte_mask_2) && !page_in_evict_list(p)) - page_add_to_evict_list(p); - } + p->byte_dirty_mask[byte_offset + 1] |= byte_mask_2; + if ((p->byte_code_present_mask[byte_offset + 1] & byte_mask_2) && !page_in_evict_list(p)) + page_add_to_evict_list(p); + } } } #else @@ -2029,175 +1966,163 @@ void mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p) { if (p == NULL) - return; + return; -#ifdef USE_DYNAREC +# ifdef USE_DYNAREC if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff]) || codegen_in_recompile) { -#else +# else if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff])) { -#endif - uint64_t mask = (uint64_t)1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); - p->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; - p->mem[addr & 0xfff] = val; +# endif + uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); + p->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; + p->mem[addr & 0xfff] = val; } } - void mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p) { if (p == NULL) - return; + return; -#ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *)&p->mem[addr & 0xfff]) || codegen_in_recompile) { -#else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *)&p->mem[addr & 0xfff])) { -#endif - uint64_t mask = (uint64_t)1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); - if ((addr & 0xf) == 0xf) - mask |= (mask << 1); - p->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; - *(uint16_t *)&p->mem[addr & 0xfff] = val; +# ifdef USE_DYNAREC + if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) { +# else + if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff])) { +# endif + uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); + if ((addr & 0xf) == 0xf) + mask |= (mask << 1); + p->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; + *(uint16_t *) &p->mem[addr & 0xfff] = val; } } - void mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p) { if (p == NULL) - return; + return; -#ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *)&p->mem[addr & 0xfff]) || codegen_in_recompile) { -#else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *)&p->mem[addr & 0xfff])) { -#endif - uint64_t mask = (uint64_t)1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); - if ((addr & 0xf) >= 0xd) - mask |= (mask << 1); - p->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; - *(uint32_t *)&p->mem[addr & 0xfff] = val; +# ifdef USE_DYNAREC + if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) { +# else + if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff])) { +# endif + uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); + if ((addr & 0xf) >= 0xd) + mask |= (mask << 1); + p->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; + *(uint32_t *) &p->mem[addr & 0xfff] = val; } } #endif - void mem_write_ram(uint32_t addr, uint8_t val, void *priv) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) - mem_log("Write B %02X to %08X\n", val, addr); + mem_log("Write B %02X to %08X\n", val, addr); #endif if (is286) { - addwritelookup(mem_logical_addr, addr); - mem_write_ramb_page(addr, val, &pages[addr >> 12]); + addwritelookup(mem_logical_addr, addr); + mem_write_ramb_page(addr, val, &pages[addr >> 12]); } else - ram[addr] = val; + ram[addr] = val; } - void mem_write_ramw(uint32_t addr, uint16_t val, void *priv) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) - mem_log("Write W %04X to %08X\n", val, addr); + mem_log("Write W %04X to %08X\n", val, addr); #endif if (is286) { - addwritelookup(mem_logical_addr, addr); - mem_write_ramw_page(addr, val, &pages[addr >> 12]); + addwritelookup(mem_logical_addr, addr); + mem_write_ramw_page(addr, val, &pages[addr >> 12]); } else - *(uint16_t *)&ram[addr] = val; + *(uint16_t *) &ram[addr] = val; } - void mem_write_raml(uint32_t addr, uint32_t val, void *priv) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) - mem_log("Write L %08X to %08X\n", val, addr); + mem_log("Write L %08X to %08X\n", val, addr); #endif if (is286) { - addwritelookup(mem_logical_addr, addr); - mem_write_raml_page(addr, val, &pages[addr >> 12]); + addwritelookup(mem_logical_addr, addr); + mem_write_raml_page(addr, val, &pages[addr >> 12]); } else - *(uint32_t *)&ram[addr] = val; + *(uint32_t *) &ram[addr] = val; } - static uint8_t mem_read_remapped(uint32_t addr, void *priv) { addr = 0xA0000 + (addr - remap_start_addr); if (is286) - addreadlookup(mem_logical_addr, addr); + addreadlookup(mem_logical_addr, addr); return ram[addr]; } - static uint16_t mem_read_remappedw(uint32_t addr, void *priv) { addr = 0xA0000 + (addr - remap_start_addr); if (is286) - addreadlookup(mem_logical_addr, addr); - return *(uint16_t *)&ram[addr]; + addreadlookup(mem_logical_addr, addr); + return *(uint16_t *) &ram[addr]; } - static uint32_t mem_read_remappedl(uint32_t addr, void *priv) { addr = 0xA0000 + (addr - remap_start_addr); if (is286) - addreadlookup(mem_logical_addr, addr); - return *(uint32_t *)&ram[addr]; + addreadlookup(mem_logical_addr, addr); + return *(uint32_t *) &ram[addr]; } - static void mem_write_remapped(uint32_t addr, uint8_t val, void *priv) { uint32_t oldaddr = addr; - addr = 0xA0000 + (addr - remap_start_addr); + addr = 0xA0000 + (addr - remap_start_addr); if (is286) { - addwritelookup(mem_logical_addr, addr); - mem_write_ramb_page(addr, val, &pages[oldaddr >> 12]); + addwritelookup(mem_logical_addr, addr); + mem_write_ramb_page(addr, val, &pages[oldaddr >> 12]); } else - ram[addr] = val; + ram[addr] = val; } - static void mem_write_remappedw(uint32_t addr, uint16_t val, void *priv) { uint32_t oldaddr = addr; - addr = 0xA0000 + (addr - remap_start_addr); + addr = 0xA0000 + (addr - remap_start_addr); if (is286) { - addwritelookup(mem_logical_addr, addr); - mem_write_ramw_page(addr, val, &pages[oldaddr >> 12]); + addwritelookup(mem_logical_addr, addr); + mem_write_ramw_page(addr, val, &pages[oldaddr >> 12]); } else - *(uint16_t *)&ram[addr] = val; + *(uint16_t *) &ram[addr] = val; } - static void mem_write_remappedl(uint32_t addr, uint32_t val, void *priv) { uint32_t oldaddr = addr; - addr = 0xA0000 + (addr - remap_start_addr); + addr = 0xA0000 + (addr - remap_start_addr); if (is286) { - addwritelookup(mem_logical_addr, addr); - mem_write_raml_page(addr, val, &pages[oldaddr >> 12]); + addwritelookup(mem_logical_addr, addr); + mem_write_raml_page(addr, val, &pages[oldaddr >> 12]); } else - *(uint32_t *)&ram[addr] = val; + *(uint32_t *) &ram[addr] = val; } - void mem_invalidate_range(uint32_t start_addr, uint32_t end_addr) { @@ -2208,19 +2133,19 @@ mem_invalidate_range(uint32_t start_addr, uint32_t end_addr) end_addr = (end_addr + PAGE_MASK_MASK) & ~PAGE_MASK_MASK; for (; start_addr <= end_addr; start_addr += 0x1000) { - if ((start_addr >> 12) >= pages_sz) - continue; + if ((start_addr >> 12) >= pages_sz) + continue; - p = &pages[start_addr >> 12]; - if (p) { - p->dirty_mask = 0xffffffffffffffffULL; + p = &pages[start_addr >> 12]; + if (p) { + p->dirty_mask = 0xffffffffffffffffULL; - if (p->byte_dirty_mask) - memset(p->byte_dirty_mask, 0xff, 64 * sizeof(uint64_t)); + if (p->byte_dirty_mask) + memset(p->byte_dirty_mask, 0xff, 64 * sizeof(uint64_t)); - if (!page_in_evict_list(p)) - page_add_to_evict_list(p); - } + if (!page_in_evict_list(p)) + page_add_to_evict_list(p); + } } #else uint32_t cur_addr; @@ -2228,130 +2153,120 @@ mem_invalidate_range(uint32_t start_addr, uint32_t end_addr) end_addr = (end_addr + PAGE_MASK_MASK) & ~PAGE_MASK_MASK; for (; start_addr <= end_addr; start_addr += 0x1000) { - /* Do nothing if the pages array is empty or DMA reads/writes to/from PCI device memory addresses - may crash the emulator. */ - cur_addr = (start_addr >> 12); - if (cur_addr < pages_sz) - memset(pages[cur_addr].dirty_mask, 0xff, sizeof(pages[cur_addr].dirty_mask)); + /* Do nothing if the pages array is empty or DMA reads/writes to/from PCI device memory addresses + may crash the emulator. */ + cur_addr = (start_addr >> 12); + if (cur_addr < pages_sz) + memset(pages[cur_addr].dirty_mask, 0xff, sizeof(pages[cur_addr].dirty_mask)); } #endif } - static __inline int mem_mapping_access_allowed(uint32_t flags, uint16_t access) { int ret = 0; if (!(access & ACCESS_DISABLED)) { - if (access & ACCESS_CACHE) - ret = (flags & MEM_MAPPING_CACHE); - else if (access & ACCESS_SMRAM) - ret = (flags & MEM_MAPPING_SMRAM); - else if (!(access & ACCESS_INTERNAL)) { - if (flags & MEM_MAPPING_IS_ROM) { - if (access & ACCESS_ROMCS) - ret = (flags & MEM_MAPPING_ROMCS); - else - ret = !(flags & MEM_MAPPING_ROMCS); - } else - ret = 1; + if (access & ACCESS_CACHE) + ret = (flags & MEM_MAPPING_CACHE); + else if (access & ACCESS_SMRAM) + ret = (flags & MEM_MAPPING_SMRAM); + else if (!(access & ACCESS_INTERNAL)) { + if (flags & MEM_MAPPING_IS_ROM) { + if (access & ACCESS_ROMCS) + ret = (flags & MEM_MAPPING_ROMCS); + else + ret = !(flags & MEM_MAPPING_ROMCS); + } else + ret = 1; - ret = ret && !(flags & MEM_MAPPING_INTERNAL) && !(flags & MEM_MAPPING_SMRAM); - } else - ret = !(flags & MEM_MAPPING_EXTERNAL) && !(flags & MEM_MAPPING_SMRAM); + ret = ret && !(flags & MEM_MAPPING_INTERNAL) && !(flags & MEM_MAPPING_SMRAM); + } else + ret = !(flags & MEM_MAPPING_EXTERNAL) && !(flags & MEM_MAPPING_SMRAM); } else { - /* Still allow SMRAM if access is DISABLED but also has CACHE and/or SMRAM flags set. */ - if (access & ACCESS_CACHE) - ret = (flags & MEM_MAPPING_CACHE); - else if (access & ACCESS_SMRAM) - ret = (flags & MEM_MAPPING_SMRAM); + /* Still allow SMRAM if access is DISABLED but also has CACHE and/or SMRAM flags set. */ + if (access & ACCESS_CACHE) + ret = (flags & MEM_MAPPING_CACHE); + else if (access & ACCESS_SMRAM) + ret = (flags & MEM_MAPPING_SMRAM); } return ret; } - void mem_mapping_recalc(uint64_t base, uint64_t size) { mem_mapping_t *map; - int n; - uint64_t c; + int n; + uint64_t c; if (!size || (base_mapping == NULL)) - return; + return; map = base_mapping; /* Clear out old mappings. */ for (c = base; c < base + size; c += MEM_GRANULARITY_SIZE) { - _mem_exec[c >> MEM_GRANULARITY_BITS] = NULL; - write_mapping[c >> MEM_GRANULARITY_BITS] = NULL; - read_mapping[c >> MEM_GRANULARITY_BITS] = NULL; - write_mapping_bus[c >> MEM_GRANULARITY_BITS] = NULL; - read_mapping_bus[c >> MEM_GRANULARITY_BITS] = NULL; + _mem_exec[c >> MEM_GRANULARITY_BITS] = NULL; + write_mapping[c >> MEM_GRANULARITY_BITS] = NULL; + read_mapping[c >> MEM_GRANULARITY_BITS] = NULL; + write_mapping_bus[c >> MEM_GRANULARITY_BITS] = NULL; + read_mapping_bus[c >> MEM_GRANULARITY_BITS] = NULL; } /* Walk mapping list. */ while (map != NULL) { - /* In range? */ - if (map->enable && (uint64_t)map->base < ((uint64_t)base + (uint64_t)size) && - ((uint64_t)map->base + (uint64_t)map->size) > (uint64_t)base) { - uint64_t start = (map->base < base) ? map->base : base; - uint64_t end = (((uint64_t)map->base + (uint64_t)map->size) < (base + size)) ? - ((uint64_t)map->base + (uint64_t)map->size) : (base + size); - if (start < map->base) - start = map->base; + /* In range? */ + if (map->enable && (uint64_t) map->base < ((uint64_t) base + (uint64_t) size) && ((uint64_t) map->base + (uint64_t) map->size) > (uint64_t) base) { + uint64_t start = (map->base < base) ? map->base : base; + uint64_t end = (((uint64_t) map->base + (uint64_t) map->size) < (base + size)) ? ((uint64_t) map->base + (uint64_t) map->size) : (base + size); + if (start < map->base) + start = map->base; - for (c = start; c < end; c += MEM_GRANULARITY_SIZE) { - /* CPU */ - n = !!in_smm; - if (map->exec && - mem_mapping_access_allowed(map->flags, _mem_state[c >> MEM_GRANULARITY_BITS].states[n].x)) - _mem_exec[c >> MEM_GRANULARITY_BITS] = map->exec + (c - map->base); - if ((map->write_b || map->write_w || map->write_l) && - mem_mapping_access_allowed(map->flags, _mem_state[c >> MEM_GRANULARITY_BITS].states[n].w)) - write_mapping[c >> MEM_GRANULARITY_BITS] = map; - if ((map->read_b || map->read_w || map->read_l) && - mem_mapping_access_allowed(map->flags, _mem_state[c >> MEM_GRANULARITY_BITS].states[n].r)) - read_mapping[c >> MEM_GRANULARITY_BITS] = map; + for (c = start; c < end; c += MEM_GRANULARITY_SIZE) { + /* CPU */ + n = !!in_smm; + if (map->exec && mem_mapping_access_allowed(map->flags, _mem_state[c >> MEM_GRANULARITY_BITS].states[n].x)) + _mem_exec[c >> MEM_GRANULARITY_BITS] = map->exec + (c - map->base); + if ((map->write_b || map->write_w || map->write_l) && mem_mapping_access_allowed(map->flags, _mem_state[c >> MEM_GRANULARITY_BITS].states[n].w)) + write_mapping[c >> MEM_GRANULARITY_BITS] = map; + if ((map->read_b || map->read_w || map->read_l) && mem_mapping_access_allowed(map->flags, _mem_state[c >> MEM_GRANULARITY_BITS].states[n].r)) + read_mapping[c >> MEM_GRANULARITY_BITS] = map; - /* Bus */ - n |= STATE_BUS; - if ((map->write_b || map->write_w || map->write_l) && - mem_mapping_access_allowed(map->flags, _mem_state[c >> MEM_GRANULARITY_BITS].states[n].w)) - write_mapping_bus[c >> MEM_GRANULARITY_BITS] = map; - if ((map->read_b || map->read_w || map->read_l) && - mem_mapping_access_allowed(map->flags, _mem_state[c >> MEM_GRANULARITY_BITS].states[n].r)) - read_mapping_bus[c >> MEM_GRANULARITY_BITS] = map; - } - } - map = map->next; + /* Bus */ + n |= STATE_BUS; + if ((map->write_b || map->write_w || map->write_l) && mem_mapping_access_allowed(map->flags, _mem_state[c >> MEM_GRANULARITY_BITS].states[n].w)) + write_mapping_bus[c >> MEM_GRANULARITY_BITS] = map; + if ((map->read_b || map->read_w || map->read_l) && mem_mapping_access_allowed(map->flags, _mem_state[c >> MEM_GRANULARITY_BITS].states[n].r)) + read_mapping_bus[c >> MEM_GRANULARITY_BITS] = map; + } + } + map = map->next; } flushmmucache_cr3(); } - void mem_mapping_set(mem_mapping_t *map, - uint32_t base, - uint32_t size, - uint8_t (*read_b)(uint32_t addr, void *p), - uint16_t (*read_w)(uint32_t addr, void *p), - uint32_t (*read_l)(uint32_t addr, void *p), - void (*write_b)(uint32_t addr, uint8_t val, void *p), - void (*write_w)(uint32_t addr, uint16_t val, void *p), - void (*write_l)(uint32_t addr, uint32_t val, void *p), - uint8_t *exec, - uint32_t fl, - void *p) + uint32_t base, + uint32_t size, + uint8_t (*read_b)(uint32_t addr, void *p), + uint16_t (*read_w)(uint32_t addr, void *p), + uint32_t (*read_l)(uint32_t addr, void *p), + void (*write_b)(uint32_t addr, uint8_t val, void *p), + void (*write_w)(uint32_t addr, uint16_t val, void *p), + void (*write_l)(uint32_t addr, uint32_t val, void *p), + uint8_t *exec, + uint32_t fl, + void *p) { if (size != 0x00000000) - map->enable = 1; + map->enable = 1; else - map->enable = 0; + map->enable = 0; map->base = base; map->size = size; map->mask = (map->size ? 0xffffffff : 0x00000000); @@ -2369,72 +2284,69 @@ mem_mapping_set(mem_mapping_t *map, /* If the mapping is disabled, there is no need to recalc anything. */ if (size != 0x00000000) - mem_mapping_recalc(map->base, map->size); + mem_mapping_recalc(map->base, map->size); } - void mem_mapping_add(mem_mapping_t *map, - uint32_t base, - uint32_t size, - uint8_t (*read_b)(uint32_t addr, void *p), - uint16_t (*read_w)(uint32_t addr, void *p), - uint32_t (*read_l)(uint32_t addr, void *p), - void (*write_b)(uint32_t addr, uint8_t val, void *p), - void (*write_w)(uint32_t addr, uint16_t val, void *p), - void (*write_l)(uint32_t addr, uint32_t val, void *p), - uint8_t *exec, - uint32_t fl, - void *p) + uint32_t base, + uint32_t size, + uint8_t (*read_b)(uint32_t addr, void *p), + uint16_t (*read_w)(uint32_t addr, void *p), + uint32_t (*read_l)(uint32_t addr, void *p), + void (*write_b)(uint32_t addr, uint8_t val, void *p), + void (*write_w)(uint32_t addr, uint16_t val, void *p), + void (*write_l)(uint32_t addr, uint32_t val, void *p), + uint8_t *exec, + uint32_t fl, + void *p) { /* Do a sanity check */ if ((base_mapping == NULL) && (last_mapping != NULL)) { - fatal("mem_mapping_add(): NULL base mapping with non-NULL last mapping\n"); - return; + fatal("mem_mapping_add(): NULL base mapping with non-NULL last mapping\n"); + return; } else if ((base_mapping != NULL) && (last_mapping == NULL)) { - fatal("mem_mapping_add(): Non-NULL base mapping with NULL last mapping\n"); - return; + fatal("mem_mapping_add(): Non-NULL base mapping with NULL last mapping\n"); + return; } else if ((base_mapping != NULL) && (base_mapping->prev != NULL)) { - fatal("mem_mapping_add(): Base mapping with a preceding mapping\n"); - return; + fatal("mem_mapping_add(): Base mapping with a preceding mapping\n"); + return; } else if ((last_mapping != NULL) && (last_mapping->next != NULL)) { - fatal("mem_mapping_add(): Last mapping with a following mapping\n"); - return; + fatal("mem_mapping_add(): Last mapping with a following mapping\n"); + return; } /* Add mapping to the beginning of the list if necessary.*/ if (base_mapping == NULL) - base_mapping = map; + base_mapping = map; /* Add mapping to the end of the list.*/ if (last_mapping == NULL) - map->prev = NULL; - else { - map->prev = last_mapping; - last_mapping->next = map; + map->prev = NULL; + else { + map->prev = last_mapping; + last_mapping->next = map; } last_mapping = map; mem_mapping_set(map, base, size, read_b, read_w, read_l, - write_b, write_w, write_l, exec, fl, p); + write_b, write_w, write_l, exec, fl, p); } - void mem_mapping_do_recalc(mem_mapping_t *map) { mem_mapping_recalc(map->base, map->size); } - void mem_mapping_set_handler(mem_mapping_t *map, - uint8_t (*read_b)(uint32_t addr, void *p), - uint16_t (*read_w)(uint32_t addr, void *p), - uint32_t (*read_l)(uint32_t addr, void *p), - void (*write_b)(uint32_t addr, uint8_t val, void *p), - void (*write_w)(uint32_t addr, uint16_t val, void *p), - void (*write_l)(uint32_t addr, uint32_t val, void *p)) + uint8_t (*read_b)(uint32_t addr, void *p), + uint16_t (*read_w)(uint32_t addr, void *p), + uint32_t (*read_l)(uint32_t addr, void *p), + void (*write_b)(uint32_t addr, uint8_t val, void *p), + void (*write_w)(uint32_t addr, uint16_t val, void *p), + void (*write_l)(uint32_t addr, uint32_t val, void *p)) { map->read_b = read_b; map->read_w = read_w; @@ -2446,7 +2358,6 @@ mem_mapping_set_handler(mem_mapping_t *map, mem_mapping_recalc(map->base, map->size); } - void mem_mapping_set_addr(mem_mapping_t *map, uint32_t base, uint32_t size) { @@ -2456,13 +2367,12 @@ mem_mapping_set_addr(mem_mapping_t *map, uint32_t base, uint32_t size) /* Set new mapping. */ map->enable = 1; - map->base = base; - map->size = size; + map->base = base; + map->size = size; mem_mapping_recalc(map->base, map->size); } - void mem_mapping_set_exec(mem_mapping_t *map, uint8_t *exec) { @@ -2471,7 +2381,6 @@ mem_mapping_set_exec(mem_mapping_t *map, uint8_t *exec) mem_mapping_recalc(map->base, map->size); } - void mem_mapping_set_mask(mem_mapping_t *map, uint32_t mask) { @@ -2480,14 +2389,12 @@ mem_mapping_set_mask(mem_mapping_t *map, uint32_t mask) mem_mapping_recalc(map->base, map->size); } - void mem_mapping_set_p(mem_mapping_t *map, void *p) { map->p = p; } - void mem_mapping_disable(mem_mapping_t *map) { @@ -2496,7 +2403,6 @@ mem_mapping_disable(mem_mapping_t *map) mem_mapping_recalc(map->base, map->size); } - void mem_mapping_enable(mem_mapping_t *map) { @@ -2505,75 +2411,71 @@ mem_mapping_enable(mem_mapping_t *map) mem_mapping_recalc(map->base, map->size); } - void mem_set_access(uint8_t bitmap, int mode, uint32_t base, uint32_t size, uint16_t access) { - uint32_t c; - uint16_t mask, smstate = 0x0000; - const uint16_t smstates[4] = { 0x0000, (MEM_READ_SMRAM | MEM_WRITE_SMRAM), - MEM_READ_SMRAM_EX, (MEM_READ_DISABLED_EX | MEM_WRITE_DISABLED_EX) }; + uint32_t c; + uint16_t mask, smstate = 0x0000; + const uint16_t smstates[4] = { 0x0000, (MEM_READ_SMRAM | MEM_WRITE_SMRAM), + MEM_READ_SMRAM_EX, (MEM_READ_DISABLED_EX | MEM_WRITE_DISABLED_EX) }; int i; if (mode) - mask = 0x2d6b; + mask = 0x2d6b; else - mask = 0x1084; + mask = 0x1084; if (mode) { - if (mode == 1) - access = !!access; + if (mode == 1) + access = !!access; - if (mode == 3) { - if (access & ACCESS_SMRAM_X) - smstate |= MEM_EXEC_SMRAM; - if (access & ACCESS_SMRAM_R) - smstate |= MEM_READ_SMRAM_2; - if (access & ACCESS_SMRAM_W) - smstate |= MEM_WRITE_SMRAM; - } else - smstate = smstates[access & 0x07]; + if (mode == 3) { + if (access & ACCESS_SMRAM_X) + smstate |= MEM_EXEC_SMRAM; + if (access & ACCESS_SMRAM_R) + smstate |= MEM_READ_SMRAM_2; + if (access & ACCESS_SMRAM_W) + smstate |= MEM_WRITE_SMRAM; + } else + smstate = smstates[access & 0x07]; } else - smstate = access & 0x6f7b; + smstate = access & 0x6f7b; for (c = 0; c < size; c += MEM_GRANULARITY_SIZE) { - for (i = 0; i < 4; i++) { - if (bitmap & (1 << i)) { - _mem_state[(c + base) >> MEM_GRANULARITY_BITS].vals[i] = - (_mem_state[(c + base) >> MEM_GRANULARITY_BITS].vals[i] & mask) | smstate; - } - } + for (i = 0; i < 4; i++) { + if (bitmap & (1 << i)) { + _mem_state[(c + base) >> MEM_GRANULARITY_BITS].vals[i] = (_mem_state[(c + base) >> MEM_GRANULARITY_BITS].vals[i] & mask) | smstate; + } + } #ifdef ENABLE_MEM_LOG - if (((c + base) >= 0xa0000) && ((c + base) <= 0xbffff)) { - mem_log("Set mem state for block at %08X to %04X with bitmap %02X\n", - c + base, smstate, bitmap); - } + if (((c + base) >= 0xa0000) && ((c + base) <= 0xbffff)) { + mem_log("Set mem state for block at %08X to %04X with bitmap %02X\n", + c + base, smstate, bitmap); + } #endif } mem_mapping_recalc(base, size); } - void mem_a20_init(void) { if (is286) { - rammask = cpu_16bitbus ? 0xefffff : 0xffefffff; - if (is6117) - rammask |= 0x03000000; - flushmmucache(); - mem_a20_state = mem_a20_key | mem_a20_alt; + rammask = cpu_16bitbus ? 0xefffff : 0xffefffff; + if (is6117) + rammask |= 0x03000000; + flushmmucache(); + mem_a20_state = mem_a20_key | mem_a20_alt; } else { - rammask = 0xfffff; - flushmmucache(); - mem_a20_key = mem_a20_alt = mem_a20_state = 0; + rammask = 0xfffff; + flushmmucache(); + mem_a20_key = mem_a20_alt = mem_a20_state = 0; } } - /* Close all the memory mappings. */ void mem_close(void) @@ -2581,25 +2483,23 @@ mem_close(void) mem_mapping_t *map = base_mapping, *next; while (map != NULL) { - next = map->next; - map->prev = map->next = NULL; - map = next; + next = map->next; + map->prev = map->next = NULL; + map = next; } base_mapping = last_mapping = 0; } - static void mem_add_ram_mapping(mem_mapping_t *mapping, uint32_t base, uint32_t size) { mem_mapping_add(mapping, base, size, - mem_read_ram,mem_read_ramw,mem_read_raml, - mem_write_ram,mem_write_ramw,mem_write_raml, - ram + base, MEM_MAPPING_INTERNAL, NULL); + mem_read_ram, mem_read_ramw, mem_read_raml, + mem_write_ram, mem_write_ramw, mem_write_raml, + ram + base, MEM_MAPPING_INTERNAL, NULL); } - static void mem_init_ram_mapping(mem_mapping_t *mapping, uint32_t base, uint32_t size) { @@ -2607,7 +2507,6 @@ mem_init_ram_mapping(mem_mapping_t *mapping, uint32_t base, uint32_t size) mem_add_ram_mapping(mapping, base, size); } - /* Reset the memory state. */ void mem_reset(void) @@ -2618,71 +2517,71 @@ mem_reset(void) #ifdef USE_NEW_DYNAREC if (byte_dirty_mask) { - free(byte_dirty_mask); - byte_dirty_mask = NULL; + free(byte_dirty_mask); + byte_dirty_mask = NULL; } if (byte_code_present_mask) { - free(byte_code_present_mask); - byte_code_present_mask = NULL; + free(byte_code_present_mask); + byte_code_present_mask = NULL; } #endif /* Free the old pages array, if necessary. */ if (pages) { - free(pages); - pages = NULL; + free(pages); + pages = NULL; } if (ram != NULL) { - plat_munmap(ram, ram_size); - ram = NULL; - ram_size = 0; + plat_munmap(ram, ram_size); + ram = NULL; + ram_size = 0; } #if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)) if (ram2 != NULL) { - plat_munmap(ram2, ram2_size); - ram2 = NULL; - ram2_size = 0; + plat_munmap(ram2, ram2_size); + ram2 = NULL; + ram2_size = 0; } if (mem_size > 2097152) - mem_size = 2097152; + mem_size = 2097152; #endif m = 1024UL * mem_size; #if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)) if (mem_size > 1048576) { - ram_size = 1 << 30; - ram = (uint8_t *) plat_mmap(ram_size, 0); /* allocate and clear the RAM block of the first 1 GB */ - if (ram == NULL) { - fatal("Failed to allocate primary RAM block. Make sure you have enough RAM available.\n"); - return; - } - memset(ram, 0x00, ram_size); - ram2_size = m - (1 << 30); - ram2 = (uint8_t *) plat_mmap(ram2_size, 0); /* allocate and clear the RAM block above 1 GB */ - if (ram2 == NULL) { - if (config_changed == 2) - fatal(EMU_NAME " must be restarted for the memory amount change to be applied.\n"); - else - fatal("Failed to allocate secondary RAM block. Make sure you have enough RAM available.\n"); - return; - } - memset(ram2, 0x00, ram2_size); + ram_size = 1 << 30; + ram = (uint8_t *) plat_mmap(ram_size, 0); /* allocate and clear the RAM block of the first 1 GB */ + if (ram == NULL) { + fatal("Failed to allocate primary RAM block. Make sure you have enough RAM available.\n"); + return; + } + memset(ram, 0x00, ram_size); + ram2_size = m - (1 << 30); + ram2 = (uint8_t *) plat_mmap(ram2_size, 0); /* allocate and clear the RAM block above 1 GB */ + if (ram2 == NULL) { + if (config_changed == 2) + fatal(EMU_NAME " must be restarted for the memory amount change to be applied.\n"); + else + fatal("Failed to allocate secondary RAM block. Make sure you have enough RAM available.\n"); + return; + } + memset(ram2, 0x00, ram2_size); } else #endif { - ram_size = m; - ram = (uint8_t *) plat_mmap(ram_size, 0); /* allocate and clear the RAM block */ - if (ram == NULL) { - fatal("Failed to allocate RAM block. Make sure you have enough RAM available.\n"); - return; - } - memset(ram, 0x00, ram_size); - if (mem_size > 1048576) - ram2 = &(ram[1 << 30]); + ram_size = m; + ram = (uint8_t *) plat_mmap(ram_size, 0); /* allocate and clear the RAM block */ + if (ram == NULL) { + fatal("Failed to allocate RAM block. Make sure you have enough RAM available.\n"); + return; + } + memset(ram, 0x00, ram_size); + if (mem_size > 1048576) + ram2 = &(ram[1 << 30]); } /* @@ -2691,31 +2590,31 @@ mem_reset(void) * memory amount could have changed. */ if (is286) { - if (cpu_16bitbus) { - /* 80286/386SX; maximum address space is 16MB. */ - m = 4096; - /* ALi M6117; maximum address space is 64MB. */ - if (is6117) - m <<= 2; - } else { - /* 80386DX+; maximum address space is 4GB. */ - m = 1048576; - } + if (cpu_16bitbus) { + /* 80286/386SX; maximum address space is 16MB. */ + m = 4096; + /* ALi M6117; maximum address space is 64MB. */ + if (is6117) + m <<= 2; + } else { + /* 80386DX+; maximum address space is 4GB. */ + m = 1048576; + } } else { - /* 8088/86; maximum address space is 1MB. */ - m = 256; + /* 8088/86; maximum address space is 1MB. */ + m = 256; } /* * Allocate and initialize the (new) page table. */ pages_sz = m; - pages = (page_t *)malloc(m*sizeof(page_t)); + pages = (page_t *) malloc(m * sizeof(page_t)); memset(page_lookup, 0x00, (1 << 20) * sizeof(page_t *)); memset(page_lookupp, 0x04, (1 << 20) * sizeof(uint8_t)); - memset(pages, 0x00, pages_sz*sizeof(page_t)); + memset(pages, 0x00, pages_sz * sizeof(page_t)); #ifdef USE_NEW_DYNAREC byte_dirty_mask = malloc((mem_size * 1024) / 8); @@ -2726,38 +2625,38 @@ mem_reset(void) #endif for (c = 0; c < pages_sz; c++) { - if ((c << 12) >= (mem_size << 10)) - pages[c].mem = page_ff; - else { + if ((c << 12) >= (mem_size << 10)) + pages[c].mem = page_ff; + else { #if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)) - if (mem_size > 1048576) { - if ((c << 12) < (1 << 30)) - pages[c].mem = &ram[c << 12]; - else - pages[c].mem = &ram2[(c << 12) - (1 << 30)]; - } else - pages[c].mem = &ram[c << 12]; + if (mem_size > 1048576) { + if ((c << 12) < (1 << 30)) + pages[c].mem = &ram[c << 12]; + else + pages[c].mem = &ram2[(c << 12) - (1 << 30)]; + } else + pages[c].mem = &ram[c << 12]; #else - pages[c].mem = &ram[c << 12]; + pages[c].mem = &ram[c << 12]; #endif - } - if (c < m) { - pages[c].write_b = mem_write_ramb_page; - pages[c].write_w = mem_write_ramw_page; - pages[c].write_l = mem_write_raml_page; - } + } + if (c < m) { + pages[c].write_b = mem_write_ramb_page; + pages[c].write_w = mem_write_ramw_page; + pages[c].write_l = mem_write_raml_page; + } #ifdef USE_NEW_DYNAREC - pages[c].evict_prev = EVICT_NOT_IN_LIST; - pages[c].byte_dirty_mask = &byte_dirty_mask[c * 64]; - pages[c].byte_code_present_mask = &byte_code_present_mask[c * 64]; + pages[c].evict_prev = EVICT_NOT_IN_LIST; + pages[c].byte_dirty_mask = &byte_dirty_mask[c * 64]; + pages[c].byte_code_present_mask = &byte_code_present_mask[c * 64]; #endif } - memset(_mem_exec, 0x00, sizeof(_mem_exec)); - memset(write_mapping, 0x00, sizeof(write_mapping)); - memset(read_mapping, 0x00, sizeof(read_mapping)); + memset(_mem_exec, 0x00, sizeof(_mem_exec)); + memset(write_mapping, 0x00, sizeof(write_mapping)); + memset(read_mapping, 0x00, sizeof(read_mapping)); memset(write_mapping_bus, 0x00, sizeof(write_mapping_bus)); - memset(read_mapping_bus, 0x00, sizeof(read_mapping_bus)); + memset(read_mapping_bus, 0x00, sizeof(read_mapping_bus)); base_mapping = last_mapping = NULL; @@ -2768,159 +2667,156 @@ mem_reset(void) mem_init_ram_mapping(&ram_low_mapping, 0x000000, (mem_size > 640) ? 0xa0000 : mem_size * 1024); if (mem_size > 1024) { - if (cpu_16bitbus && !is6117 && mem_size > 16256) - mem_init_ram_mapping(&ram_high_mapping, 0x100000, (16256 - 1024) * 1024); - else if (cpu_16bitbus && is6117 && mem_size > 65408) - mem_init_ram_mapping(&ram_high_mapping, 0x100000, (65408 - 1024) * 1024); - else { - if (mem_size > 1048576) { - mem_init_ram_mapping(&ram_high_mapping, 0x100000, (1048576 - 1024) * 1024); + if (cpu_16bitbus && !is6117 && mem_size > 16256) + mem_init_ram_mapping(&ram_high_mapping, 0x100000, (16256 - 1024) * 1024); + else if (cpu_16bitbus && is6117 && mem_size > 65408) + mem_init_ram_mapping(&ram_high_mapping, 0x100000, (65408 - 1024) * 1024); + else { + if (mem_size > 1048576) { + mem_init_ram_mapping(&ram_high_mapping, 0x100000, (1048576 - 1024) * 1024); - mem_set_mem_state_both((1 << 30), (mem_size - 1048576) * 1024, - MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - mem_mapping_add(&ram_2gb_mapping, (1 << 30), - ((mem_size - 1048576) * 1024), - mem_read_ram_2gb,mem_read_ram_2gbw,mem_read_ram_2gbl, - mem_write_ram,mem_write_ramw,mem_write_raml, - ram2, MEM_MAPPING_INTERNAL, NULL); - } else - mem_init_ram_mapping(&ram_high_mapping, 0x100000, (mem_size - 1024) * 1024); - } + mem_set_mem_state_both((1 << 30), (mem_size - 1048576) * 1024, + MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + mem_mapping_add(&ram_2gb_mapping, (1 << 30), + ((mem_size - 1048576) * 1024), + mem_read_ram_2gb, mem_read_ram_2gbw, mem_read_ram_2gbl, + mem_write_ram, mem_write_ramw, mem_write_raml, + ram2, MEM_MAPPING_INTERNAL, NULL); + } else + mem_init_ram_mapping(&ram_high_mapping, 0x100000, (mem_size - 1024) * 1024); + } } if (mem_size > 768) - mem_add_ram_mapping(&ram_mid_mapping, 0xa0000, 0x60000); + mem_add_ram_mapping(&ram_mid_mapping, 0xa0000, 0x60000); mem_mapping_add(&ram_remapped_mapping, mem_size * 1024, 256 * 1024, - mem_read_remapped,mem_read_remappedw,mem_read_remappedl, - mem_write_remapped,mem_write_remappedw,mem_write_remappedl, - ram + 0xa0000, MEM_MAPPING_INTERNAL, NULL); + mem_read_remapped, mem_read_remappedw, mem_read_remappedl, + mem_write_remapped, mem_write_remappedw, mem_write_remappedl, + ram + 0xa0000, MEM_MAPPING_INTERNAL, NULL); mem_mapping_disable(&ram_remapped_mapping); mem_a20_init(); #ifdef USE_NEW_DYNAREC purgable_page_list_head = 0; - purgeable_page_count = 0; + purgeable_page_count = 0; #endif } - void mem_init(void) { /* Perform a one-time init. */ ram = rom = NULL; - ram2 = NULL; - pages = NULL; + ram2 = NULL; + pages = NULL; /* Allocate the lookup tables. */ - page_lookup = (page_t **)malloc((1<<20)*sizeof(page_t *)); - page_lookupp = (uint8_t *)malloc((1<<20)*sizeof(uint8_t)); - readlookup2 = malloc((1<<20)*sizeof(uintptr_t)); - readlookupp = malloc((1<<20)*sizeof(uint8_t)); - writelookup2 = malloc((1<<20)*sizeof(uintptr_t)); - writelookupp = malloc((1<<20)*sizeof(uint8_t)); + page_lookup = (page_t **) malloc((1 << 20) * sizeof(page_t *)); + page_lookupp = (uint8_t *) malloc((1 << 20) * sizeof(uint8_t)); + readlookup2 = malloc((1 << 20) * sizeof(uintptr_t)); + readlookupp = malloc((1 << 20) * sizeof(uint8_t)); + writelookup2 = malloc((1 << 20) * sizeof(uintptr_t)); + writelookupp = malloc((1 << 20) * sizeof(uint8_t)); } - void mem_remap_top(int kb) { - uint32_t c; - uint32_t start = (mem_size >= 1024) ? mem_size : 1024; - int offset, size = mem_size - 640; - int set = 1; + uint32_t c; + uint32_t start = (mem_size >= 1024) ? mem_size : 1024; + int offset, size = mem_size - 640; + int set = 1; static int old_kb = 0; mem_log("MEM: remapping top %iKB (mem=%i)\n", kb, mem_size); - if (mem_size <= 640) return; + if (mem_size <= 640) + return; if (kb == 0) { - kb = old_kb; - set = 0; + kb = old_kb; + set = 0; } else - old_kb = kb; + old_kb = kb; if (size > kb) - size = kb; + size = kb; remap_start_addr = start << 10; for (c = ((start * 1024) >> 12); c < (((start + size) * 1024) >> 12); c++) { - offset = c - ((start * 1024) >> 12); - pages[c].mem = set ? &ram[0xa0000 + (offset << 12)] : page_ff; - pages[c].write_b = set ? mem_write_ramb_page : NULL; - pages[c].write_w = set ? mem_write_ramw_page : NULL; - pages[c].write_l = set ? mem_write_raml_page : NULL; + offset = c - ((start * 1024) >> 12); + pages[c].mem = set ? &ram[0xa0000 + (offset << 12)] : page_ff; + pages[c].write_b = set ? mem_write_ramb_page : NULL; + pages[c].write_w = set ? mem_write_ramw_page : NULL; + pages[c].write_l = set ? mem_write_raml_page : NULL; #ifdef USE_NEW_DYNAREC - pages[c].evict_prev = EVICT_NOT_IN_LIST; - pages[c].byte_dirty_mask = &byte_dirty_mask[offset * 64]; - pages[c].byte_code_present_mask = &byte_code_present_mask[offset * 64]; + pages[c].evict_prev = EVICT_NOT_IN_LIST; + pages[c].byte_dirty_mask = &byte_dirty_mask[offset * 64]; + pages[c].byte_code_present_mask = &byte_code_present_mask[offset * 64]; #endif } - mem_set_mem_state_both(start * 1024, size * 1024, set ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : - (MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL)); + mem_set_mem_state_both(start * 1024, size * 1024, set ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL)); if (set) { - mem_mapping_set_addr(&ram_remapped_mapping, start * 1024, size * 1024); - mem_mapping_set_exec(&ram_remapped_mapping, ram + 0xa0000); + mem_mapping_set_addr(&ram_remapped_mapping, start * 1024, size * 1024); + mem_mapping_set_exec(&ram_remapped_mapping, ram + 0xa0000); } else - mem_mapping_disable(&ram_remapped_mapping); + mem_mapping_disable(&ram_remapped_mapping); flushmmucache(); } - void mem_reset_page_blocks(void) { uint32_t c; - if (pages == NULL) return; + if (pages == NULL) + return; for (c = 0; c < pages_sz; c++) { - pages[c].write_b = mem_write_ramb_page; - pages[c].write_w = mem_write_ramw_page; - pages[c].write_l = mem_write_raml_page; + pages[c].write_b = mem_write_ramb_page; + pages[c].write_w = mem_write_ramw_page; + pages[c].write_l = mem_write_raml_page; #ifdef USE_NEW_DYNAREC - pages[c].block = BLOCK_INVALID; - pages[c].block_2 = BLOCK_INVALID; - pages[c].head = BLOCK_INVALID; + pages[c].block = BLOCK_INVALID; + pages[c].block_2 = BLOCK_INVALID; + pages[c].head = BLOCK_INVALID; #else - pages[c].block[0] = pages[c].block[1] = pages[c].block[2] = pages[c].block[3] = NULL; - pages[c].block_2[0] = pages[c].block_2[1] = pages[c].block_2[2] = pages[c].block_2[3] = NULL; - pages[c].head = NULL; + pages[c].block[0] = pages[c].block[1] = pages[c].block[2] = pages[c].block[3] = NULL; + pages[c].block_2[0] = pages[c].block_2[1] = pages[c].block_2[2] = pages[c].block_2[3] = NULL; + pages[c].head = NULL; #endif } } - void mem_a20_recalc(void) { int state; - if (! is286) { - rammask = 0xfffff; - flushmmucache(); - mem_a20_key = mem_a20_alt = mem_a20_state = 0; + if (!is286) { + rammask = 0xfffff; + flushmmucache(); + mem_a20_key = mem_a20_alt = mem_a20_state = 0; - return; + return; } state = mem_a20_key | mem_a20_alt; if (state && !mem_a20_state) { - rammask = (cpu_16bitbus) ? 0xffffff : 0xffffffff; - if (is6117) - rammask |= 0x03000000; - flushmmucache(); + rammask = (cpu_16bitbus) ? 0xffffff : 0xffffffff; + if (is6117) + rammask |= 0x03000000; + flushmmucache(); } else if (!state && mem_a20_state) { - rammask = (cpu_16bitbus) ? 0xefffff : 0xffefffff; - if (is6117) - rammask |= 0x03000000; - flushmmucache(); + rammask = (cpu_16bitbus) ? 0xefffff : 0xffefffff; + if (is6117) + rammask |= 0x03000000; + flushmmucache(); } mem_a20_state = state; diff --git a/src/mem/rom.c b/src/mem/rom.c index 955e5b85d..a1dbc55a1 100644 --- a/src/mem/rom.c +++ b/src/mem/rom.c @@ -38,35 +38,32 @@ #include <86box/machine.h> #include <86box/m_xt_xi8088.h> - #ifdef ENABLE_ROM_LOG int rom_do_log = ENABLE_ROM_LOG; - static void rom_log(const char *fmt, ...) { va_list ap; if (rom_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define rom_log(fmt, ...) +# define rom_log(fmt, ...) #endif void -rom_add_path(const char* path) +rom_add_path(const char *path) { char cwd[1024] = { 0 }; - rom_path_t* rom_path = &rom_paths; + rom_path_t *rom_path = &rom_paths; - if (rom_paths.path[0] != '\0') - { + if (rom_paths.path[0] != '\0') { // Iterate to the end of the list. while (rom_path->next != NULL) { rom_path = rom_path->next; @@ -77,7 +74,7 @@ rom_add_path(const char* path) } // Save the path, turning it into absolute if needed. - if (!path_abs((char*) path)) { + if (!path_abs((char *) path)) { plat_getcwd(cwd, sizeof(cwd)); path_slash(cwd); snprintf(rom_path->path, sizeof(rom_path->path), "%s%s", cwd, path); @@ -89,13 +86,12 @@ rom_add_path(const char* path) path_slash(rom_path->path); } - FILE * rom_fopen(char *fn, char *mode) { - char temp[1024]; + char temp[1024]; rom_path_t *rom_path; - FILE *fp = NULL; + FILE *fp = NULL; if (strstr(fn, "roms/") == fn) { /* Relative path */ @@ -114,11 +110,10 @@ rom_fopen(char *fn, char *mode) } } - int rom_getfile(char *fn, char *s, int size) { - char temp[1024]; + char temp[1024]; rom_path_t *rom_path; if (strstr(fn, "roms/") == fn) { @@ -144,7 +139,6 @@ rom_getfile(char *fn, char *s, int size) } } - int rom_present(char *fn) { @@ -152,104 +146,99 @@ rom_present(char *fn) f = rom_fopen(fn, "rb"); if (f != NULL) { - (void)fclose(f); - return(1); + (void) fclose(f); + return (1); } - return(0); + return (0); } - uint8_t rom_read(uint32_t addr, void *priv) { - rom_t *rom = (rom_t *)priv; + rom_t *rom = (rom_t *) priv; #ifdef ROM_TRACE - if (rom->mapping.base==ROM_TRACE) - rom_log("ROM: read byte from BIOS at %06lX\n", addr); + if (rom->mapping.base == ROM_TRACE) + rom_log("ROM: read byte from BIOS at %06lX\n", addr); #endif if (addr < rom->mapping.base) - return 0xff; + return 0xff; if (addr >= (rom->mapping.base + rom->sz)) - return 0xff; - return(rom->rom[(addr - rom->mapping.base) & rom->mask]); + return 0xff; + return (rom->rom[(addr - rom->mapping.base) & rom->mask]); } - uint16_t rom_readw(uint32_t addr, void *priv) { - rom_t *rom = (rom_t *)priv; + rom_t *rom = (rom_t *) priv; #ifdef ROM_TRACE - if (rom->mapping.base==ROM_TRACE) - rom_log("ROM: read word from BIOS at %06lX\n", addr); + if (rom->mapping.base == ROM_TRACE) + rom_log("ROM: read word from BIOS at %06lX\n", addr); #endif if (addr < (rom->mapping.base - 1)) - return 0xffff; + return 0xffff; if (addr >= (rom->mapping.base + rom->sz)) - return 0xffff; - return(*(uint16_t *)&rom->rom[(addr - rom->mapping.base) & rom->mask]); + return 0xffff; + return (*(uint16_t *) &rom->rom[(addr - rom->mapping.base) & rom->mask]); } - uint32_t rom_readl(uint32_t addr, void *priv) { - rom_t *rom = (rom_t *)priv; + rom_t *rom = (rom_t *) priv; #ifdef ROM_TRACE - if (rom->mapping.base==ROM_TRACE) - rom_log("ROM: read long from BIOS at %06lX\n", addr); + if (rom->mapping.base == ROM_TRACE) + rom_log("ROM: read long from BIOS at %06lX\n", addr); #endif if (addr < (rom->mapping.base - 3)) - return 0xffffffff; + return 0xffffffff; if (addr >= (rom->mapping.base + rom->sz)) - return 0xffffffff; - return(*(uint32_t *)&rom->rom[(addr - rom->mapping.base) & rom->mask]); + return 0xffffffff; + return (*(uint32_t *) &rom->rom[(addr - rom->mapping.base) & rom->mask]); } - int rom_load_linear_oddeven(char *fn, uint32_t addr, int sz, int off, uint8_t *ptr) { FILE *f = rom_fopen(fn, "rb"); - int i; + int i; if (f == NULL) { - rom_log("ROM: image '%s' not found\n", fn); - return(0); + rom_log("ROM: image '%s' not found\n", fn); + return (0); } /* Make sure we only look at the base-256K offset. */ if (addr >= 0x40000) - addr = 0; + addr = 0; else - addr &= 0x03ffff; + addr &= 0x03ffff; if (ptr != NULL) { - if (fseek(f, off, SEEK_SET) == -1) - fatal("rom_load_linear(): Error seeking to the beginning of the file\n"); - for (i = 0; i < (sz >> 1); i++) { - if (fread(ptr + (addr + (i << 1)), 1, 1, f) != 1) - fatal("rom_load_linear(): Error reading even data\n"); - } - for (i = 0; i < (sz >> 1); i++) { - if (fread(ptr + (addr + (i << 1) + 1), 1, 1, f) != 1) - fatal("rom_load_linear(): Error reading od data\n"); - } + if (fseek(f, off, SEEK_SET) == -1) + fatal("rom_load_linear(): Error seeking to the beginning of the file\n"); + for (i = 0; i < (sz >> 1); i++) { + if (fread(ptr + (addr + (i << 1)), 1, 1, f) != 1) + fatal("rom_load_linear(): Error reading even data\n"); + } + for (i = 0; i < (sz >> 1); i++) { + if (fread(ptr + (addr + (i << 1) + 1), 1, 1, f) != 1) + fatal("rom_load_linear(): Error reading od data\n"); + } } - (void)fclose(f); + (void) fclose(f); - return(1); + return (1); } - /* Load a ROM BIOS from its chips, interleaved mode. */ int rom_load_linear(char *fn, uint32_t addr, int sz, int off, uint8_t *ptr) @@ -257,29 +246,28 @@ rom_load_linear(char *fn, uint32_t addr, int sz, int off, uint8_t *ptr) FILE *f = rom_fopen(fn, "rb"); if (f == NULL) { - rom_log("ROM: image '%s' not found\n", fn); - return(0); + rom_log("ROM: image '%s' not found\n", fn); + return (0); } /* Make sure we only look at the base-256K offset. */ if (addr >= 0x40000) - addr = 0; + addr = 0; else - addr &= 0x03ffff; + addr &= 0x03ffff; if (ptr != NULL) { - if (fseek(f, off, SEEK_SET) == -1) - fatal("rom_load_linear(): Error seeking to the beginning of the file\n"); - if (fread(ptr+addr, 1, sz, f) > sz) - fatal("rom_load_linear(): Error reading data\n"); + if (fseek(f, off, SEEK_SET) == -1) + fatal("rom_load_linear(): Error seeking to the beginning of the file\n"); + if (fread(ptr + addr, 1, sz, f) > sz) + fatal("rom_load_linear(): Error reading data\n"); } - (void)fclose(f); + (void) fclose(f); - return(1); + return (1); } - /* Load a ROM BIOS from its chips, linear mode with high bit flipped. */ int rom_load_linear_inverted(char *fn, uint32_t addr, int sz, int off, uint8_t *ptr) @@ -287,84 +275,80 @@ rom_load_linear_inverted(char *fn, uint32_t addr, int sz, int off, uint8_t *ptr) FILE *f = rom_fopen(fn, "rb"); if (f == NULL) { - rom_log("ROM: image '%s' not found\n", fn); - return(0); + rom_log("ROM: image '%s' not found\n", fn); + return (0); } /* Make sure we only look at the base-256K offset. */ - if (addr >= 0x40000) - { - addr = 0; - } - else - { - addr &= 0x03ffff; + if (addr >= 0x40000) { + addr = 0; + } else { + addr &= 0x03ffff; } - (void)fseek(f, 0, SEEK_END); + (void) fseek(f, 0, SEEK_END); if (ftell(f) < sz) { - (void)fclose(f); - return(0); + (void) fclose(f); + return (0); } if (ptr != NULL) { - if (fseek(f, off, SEEK_SET) == -1) - fatal("rom_load_linear_inverted(): Error seeking to the beginning of the file\n"); - if (fread(ptr+addr+0x10000, 1, sz >> 1, f) > (sz >> 1)) - fatal("rom_load_linear_inverted(): Error reading the upper half of the data\n"); - if (fread(ptr+addr, sz >> 1, 1, f) > (sz >> 1)) - fatal("rom_load_linear_inverted(): Error reading the lower half of the data\n"); + if (fseek(f, off, SEEK_SET) == -1) + fatal("rom_load_linear_inverted(): Error seeking to the beginning of the file\n"); + if (fread(ptr + addr + 0x10000, 1, sz >> 1, f) > (sz >> 1)) + fatal("rom_load_linear_inverted(): Error reading the upper half of the data\n"); + if (fread(ptr + addr, sz >> 1, 1, f) > (sz >> 1)) + fatal("rom_load_linear_inverted(): Error reading the lower half of the data\n"); } - (void)fclose(f); + (void) fclose(f); - return(1); + return (1); } - /* Load a ROM BIOS from its chips, interleaved mode. */ int rom_load_interleaved(char *fnl, char *fnh, uint32_t addr, int sz, int off, uint8_t *ptr) { FILE *fl = rom_fopen(fnl, "rb"); FILE *fh = rom_fopen(fnh, "rb"); - int c; + int c; if (fl == NULL || fh == NULL) { - if (fl == NULL) rom_log("ROM: image '%s' not found\n", fnl); - else (void)fclose(fl); - if (fh == NULL) rom_log("ROM: image '%s' not found\n", fnh); - else (void)fclose(fh); + if (fl == NULL) + rom_log("ROM: image '%s' not found\n", fnl); + else + (void) fclose(fl); + if (fh == NULL) + rom_log("ROM: image '%s' not found\n", fnh); + else + (void) fclose(fh); - return(0); + return (0); } /* Make sure we only look at the base-256K offset. */ - if (addr >= 0x40000) - { - addr = 0; - } - else - { - addr &= 0x03ffff; + if (addr >= 0x40000) { + addr = 0; + } else { + addr &= 0x03ffff; } if (ptr != NULL) { - (void)fseek(fl, off, SEEK_SET); - (void)fseek(fh, off, SEEK_SET); - for (c=0; c 0x4000; 0x4000 -> 0x4000; 0x6000 -> 0x8000 */ if (up && (n % MEM_GRANULARITY_SIZE)) - temp_n += MEM_GRANULARITY_SIZE; + temp_n += MEM_GRANULARITY_SIZE; return temp_n; } - - static uint8_t * rom_reset(uint32_t addr, int sz) { biosaddr = bios_normalize(addr, 0); biosmask = bios_normalize(sz, 1) - 1; if ((biosaddr + biosmask) > 0x000fffff) - biosaddr = 0x000fffff - biosmask; + biosaddr = 0x000fffff - biosmask; rom_log("Load BIOS: %i bytes at %08X-%08X\n", biosmask + 1, biosaddr, biosaddr + biosmask); /* If not done yet, allocate a 128KB buffer for the BIOS ROM. */ if (rom != NULL) { - rom_log("ROM allocated, freeing...\n"); - free(rom); - rom = NULL; + rom_log("ROM allocated, freeing...\n"); + free(rom); + rom = NULL; } rom_log("Allocating ROM...\n"); - rom = (uint8_t *)malloc(biosmask + 1); + rom = (uint8_t *) malloc(biosmask + 1); rom_log("Filling ROM with FF's...\n"); memset(rom, 0xff, biosmask + 1); return rom; } - uint8_t bios_read(uint32_t addr, void *priv) { @@ -413,12 +394,11 @@ bios_read(uint32_t addr, void *priv) addr &= 0x000fffff; if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask))) - ret = rom[addr - biosaddr]; + ret = rom[addr - biosaddr]; return ret; } - uint16_t bios_readw(uint32_t addr, void *priv) { @@ -427,12 +407,11 @@ bios_readw(uint32_t addr, void *priv) addr &= 0x000fffff; if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask))) - ret = *(uint16_t *)&rom[addr - biosaddr]; + ret = *(uint16_t *) &rom[addr - biosaddr]; return ret; } - uint32_t bios_readl(uint32_t addr, void *priv) { @@ -441,113 +420,110 @@ bios_readl(uint32_t addr, void *priv) addr &= 0x000fffff; if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask))) - ret = *(uint32_t *)&rom[addr - biosaddr]; + ret = *(uint32_t *) &rom[addr - biosaddr]; return ret; } - static void bios_add(void) { int temp_cpu_type, temp_cpu_16bitbus = 1; int temp_is286 = 0, temp_is6117 = 0; - if (/*AT && */cpu_s) { - temp_cpu_type = cpu_s->cpu_type; - temp_cpu_16bitbus = (temp_cpu_type == CPU_286 || temp_cpu_type == CPU_386SX || temp_cpu_type == CPU_486SLC || temp_cpu_type == CPU_IBM386SLC || temp_cpu_type == CPU_IBM486SLC ); - temp_is286 = (temp_cpu_type >= CPU_286); - temp_is6117 = !strcmp(cpu_f->manufacturer, "ALi"); + if (/*AT && */ cpu_s) { + temp_cpu_type = cpu_s->cpu_type; + temp_cpu_16bitbus = (temp_cpu_type == CPU_286 || temp_cpu_type == CPU_386SX || temp_cpu_type == CPU_486SLC || temp_cpu_type == CPU_IBM386SLC || temp_cpu_type == CPU_IBM486SLC); + temp_is286 = (temp_cpu_type >= CPU_286); + temp_is6117 = !strcmp(cpu_f->manufacturer, "ALi"); } if (biosmask > 0x1ffff) { - /* 256k+ BIOS'es only have low mappings at E0000-FFFFF. */ - mem_mapping_add(&bios_mapping, 0xe0000, 0x20000, - bios_read,bios_readw,bios_readl, - NULL,NULL,NULL, - &rom[0x20000], MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, 0); + /* 256k+ BIOS'es only have low mappings at E0000-FFFFF. */ + mem_mapping_add(&bios_mapping, 0xe0000, 0x20000, + bios_read, bios_readw, bios_readl, + NULL, NULL, NULL, + &rom[0x20000], MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, 0); - mem_set_mem_state_both(0x0e0000, 0x20000, - MEM_READ_ROMCS | MEM_WRITE_ROMCS); + mem_set_mem_state_both(0x0e0000, 0x20000, + MEM_READ_ROMCS | MEM_WRITE_ROMCS); } else { - mem_mapping_add(&bios_mapping, biosaddr, biosmask + 1, - bios_read,bios_readw,bios_readl, - NULL,NULL,NULL, - rom, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, 0); + mem_mapping_add(&bios_mapping, biosaddr, biosmask + 1, + bios_read, bios_readw, bios_readl, + NULL, NULL, NULL, + rom, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, 0); - mem_set_mem_state_both(biosaddr, biosmask + 1, - MEM_READ_ROMCS | MEM_WRITE_ROMCS); + mem_set_mem_state_both(biosaddr, biosmask + 1, + MEM_READ_ROMCS | MEM_WRITE_ROMCS); } if (temp_is6117) { - mem_mapping_add(&bios_high_mapping, biosaddr | 0x03f00000, biosmask + 1, - bios_read,bios_readw,bios_readl, - NULL,NULL,NULL, - rom, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, 0); + mem_mapping_add(&bios_high_mapping, biosaddr | 0x03f00000, biosmask + 1, + bios_read, bios_readw, bios_readl, + NULL, NULL, NULL, + rom, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, 0); - mem_set_mem_state_both(biosaddr | 0x03f00000, biosmask + 1, - MEM_READ_ROMCS | MEM_WRITE_ROMCS); + mem_set_mem_state_both(biosaddr | 0x03f00000, biosmask + 1, + MEM_READ_ROMCS | MEM_WRITE_ROMCS); } else if (temp_is286) { - mem_mapping_add(&bios_high_mapping, biosaddr | (temp_cpu_16bitbus ? 0x00f00000 : 0xfff00000), biosmask + 1, - bios_read,bios_readw,bios_readl, - NULL,NULL,NULL, - rom, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, 0); + mem_mapping_add(&bios_high_mapping, biosaddr | (temp_cpu_16bitbus ? 0x00f00000 : 0xfff00000), biosmask + 1, + bios_read, bios_readw, bios_readl, + NULL, NULL, NULL, + rom, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, 0); - mem_set_mem_state_both(biosaddr | (temp_cpu_16bitbus ? 0x00f00000 : 0xfff00000), biosmask + 1, - MEM_READ_ROMCS | MEM_WRITE_ROMCS); + mem_set_mem_state_both(biosaddr | (temp_cpu_16bitbus ? 0x00f00000 : 0xfff00000), biosmask + 1, + MEM_READ_ROMCS | MEM_WRITE_ROMCS); } } - /* These four are for loading the BIOS. */ int bios_load(char *fn1, char *fn2, uint32_t addr, int sz, int off, int flags) { - uint8_t ret = 0; + uint8_t ret = 0; uint8_t *ptr = NULL; - int i, old_sz = sz; + int i, old_sz = sz; /* - f0000, 65536 = prepare 64k rom starting at f0000, load 64k bios at 0000 - fe000, 65536 = prepare 64k rom starting at f0000, load 8k bios at e000 - fe000, 49152 = prepare 48k rom starting at f4000, load 8k bios at a000 - fe000, 8192 = prepare 16k rom starting at fc000, load 8k bios at 2000 + f0000, 65536 = prepare 64k rom starting at f0000, load 64k bios at 0000 + fe000, 65536 = prepare 64k rom starting at f0000, load 8k bios at e000 + fe000, 49152 = prepare 48k rom starting at f4000, load 8k bios at a000 + fe000, 8192 = prepare 16k rom starting at fc000, load 8k bios at 2000 */ if (!bios_only) - ptr = (flags & FLAG_AUX) ? rom : rom_reset(addr, sz); + ptr = (flags & FLAG_AUX) ? rom : rom_reset(addr, sz); if (!(flags & FLAG_AUX) && ((addr + sz) > 0x00100000)) - sz = 0x00100000 - addr; + sz = 0x00100000 - addr; #ifdef ENABLE_ROM_LOG if (!bios_only) - rom_log("%sing %i bytes of %sBIOS starting with ptr[%08X] (ptr = %08X)\n", (bios_only) ? "Check" : "Load", sz, (flags & FLAG_AUX) ? "auxiliary " : "", addr - biosaddr, ptr); + rom_log("%sing %i bytes of %sBIOS starting with ptr[%08X] (ptr = %08X)\n", (bios_only) ? "Check" : "Load", sz, (flags & FLAG_AUX) ? "auxiliary " : "", addr - biosaddr, ptr); #endif if (flags & FLAG_INT) - ret = rom_load_interleaved(fn1, fn2, addr - biosaddr, sz, off, ptr); + ret = rom_load_interleaved(fn1, fn2, addr - biosaddr, sz, off, ptr); else { - if (flags & FLAG_INV) - ret = rom_load_linear_inverted(fn1, addr - biosaddr, sz, off, ptr); - else - ret = rom_load_linear(fn1, addr - biosaddr, sz, off, ptr); + if (flags & FLAG_INV) + ret = rom_load_linear_inverted(fn1, addr - biosaddr, sz, off, ptr); + else + ret = rom_load_linear(fn1, addr - biosaddr, sz, off, ptr); } if (!bios_only && (flags & FLAG_REP) && (old_sz >= 65536) && (sz < old_sz)) { - old_sz /= sz; - for (i = 0; i < (old_sz - 1); i++) { - rom_log("Copying ptr[%08X] to ptr[%08X]\n", addr - biosaddr, i * sz); - memcpy(&(ptr[i * sz]), &(ptr[addr - biosaddr]), sz); - } + old_sz /= sz; + for (i = 0; i < (old_sz - 1); i++) { + rom_log("Copying ptr[%08X] to ptr[%08X]\n", addr - biosaddr, i * sz); + memcpy(&(ptr[i * sz]), &(ptr[addr - biosaddr]), sz); + } } if (!bios_only && ret && !(flags & FLAG_AUX)) - bios_add(); + bios_add(); return ret; } - int bios_load_linear_combined(char *fn1, char *fn2, int sz, int off) { @@ -559,7 +535,6 @@ bios_load_linear_combined(char *fn1, char *fn2, int sz, int off) return ret; } - int bios_load_linear_combined2(char *fn1, char *fn2, char *fn3, char *fn4, char *fn5, int sz, int off) { @@ -570,12 +545,11 @@ bios_load_linear_combined2(char *fn1, char *fn2, char *fn3, char *fn4, char *fn5 ret &= bios_load_aux_linear(fn2, 0x000c0000, 65536, off); ret &= bios_load_aux_linear(fn4, 0x000e0000, sz - 196608, off); if (fn5 != NULL) - ret &= bios_load_aux_linear(fn5, 0x000ec000, 16384, 0); + ret &= bios_load_aux_linear(fn5, 0x000ec000, 16384, 0); return ret; } - int bios_load_linear_combined2_ex(char *fn1, char *fn2, char *fn3, char *fn4, char *fn5, int sz, int off) { @@ -586,12 +560,11 @@ bios_load_linear_combined2_ex(char *fn1, char *fn2, char *fn3, char *fn4, char * ret &= bios_load_aux_linear(fn2, 0x000d0000, 65536, off); ret &= bios_load_aux_linear(fn4, 0x000f0000, sz - 196608, off); if (fn5 != NULL) - ret &= bios_load_aux_linear(fn5, 0x000fc000, 16384, 0); + ret &= bios_load_aux_linear(fn5, 0x000fc000, 16384, 0); return ret; } - int rom_init(rom_t *rom, char *fn, uint32_t addr, int sz, int mask, int off, uint32_t flags) { @@ -602,26 +575,25 @@ rom_init(rom_t *rom, char *fn, uint32_t addr, int sz, int mask, int off, uint32_ memset(rom->rom, 0xff, sz); /* Load the image file into the buffer. */ - if (! rom_load_linear(fn, addr, sz, off, rom->rom)) { - /* Nope.. clean up. */ - free(rom->rom); - rom->rom = NULL; - return(-1); + if (!rom_load_linear(fn, addr, sz, off, rom->rom)) { + /* Nope.. clean up. */ + free(rom->rom); + rom->rom = NULL; + return (-1); } - rom->sz = sz; + rom->sz = sz; rom->mask = mask; mem_mapping_add(&rom->mapping, - addr, sz, - rom_read, rom_readw, rom_readl, - NULL, NULL, NULL, - rom->rom, flags | MEM_MAPPING_ROM_WS, rom); + addr, sz, + rom_read, rom_readw, rom_readl, + NULL, NULL, NULL, + rom->rom, flags | MEM_MAPPING_ROM_WS, rom); - return(0); + return (0); } - int rom_init_oddeven(rom_t *rom, char *fn, uint32_t addr, int sz, int mask, int off, uint32_t flags) { @@ -632,26 +604,25 @@ rom_init_oddeven(rom_t *rom, char *fn, uint32_t addr, int sz, int mask, int off, memset(rom->rom, 0xff, sz); /* Load the image file into the buffer. */ - if (! rom_load_linear_oddeven(fn, addr, sz, off, rom->rom)) { - /* Nope.. clean up. */ - free(rom->rom); - rom->rom = NULL; - return(-1); + if (!rom_load_linear_oddeven(fn, addr, sz, off, rom->rom)) { + /* Nope.. clean up. */ + free(rom->rom); + rom->rom = NULL; + return (-1); } - rom->sz = sz; + rom->sz = sz; rom->mask = mask; mem_mapping_add(&rom->mapping, - addr, sz, - rom_read, rom_readw, rom_readl, - NULL, NULL, NULL, - rom->rom, flags | MEM_MAPPING_ROM_WS, rom); + addr, sz, + rom_read, rom_readw, rom_readl, + NULL, NULL, NULL, + rom->rom, flags | MEM_MAPPING_ROM_WS, rom); - return(0); + return (0); } - int rom_init_interleaved(rom_t *rom, char *fnl, char *fnh, uint32_t addr, int sz, int mask, int off, uint32_t flags) { @@ -660,21 +631,21 @@ rom_init_interleaved(rom_t *rom, char *fnl, char *fnh, uint32_t addr, int sz, in memset(rom->rom, 0xff, sz); /* Load the image file into the buffer. */ - if (! rom_load_interleaved(fnl, fnh, addr, sz, off, rom->rom)) { - /* Nope.. clean up. */ - free(rom->rom); - rom->rom = NULL; - return(-1); + if (!rom_load_interleaved(fnl, fnh, addr, sz, off, rom->rom)) { + /* Nope.. clean up. */ + free(rom->rom); + rom->rom = NULL; + return (-1); } - rom->sz = sz; + rom->sz = sz; rom->mask = mask; mem_mapping_add(&rom->mapping, - addr, sz, - rom_read, rom_readw, rom_readl, - NULL, NULL, NULL, - rom->rom, flags | MEM_MAPPING_ROM_WS, rom); + addr, sz, + rom_read, rom_readw, rom_readl, + NULL, NULL, NULL, + rom->rom, flags | MEM_MAPPING_ROM_WS, rom); - return(0); + return (0); } diff --git a/src/mem/smram.c b/src/mem/smram.c index 9333264d9..64f3417aa 100644 --- a/src/mem/smram.c +++ b/src/mem/smram.c @@ -29,117 +29,107 @@ #include <86box/mem.h> #include <86box/smram.h> +static smram_t *base_smram, *last_smram; -static smram_t *base_smram, *last_smram; - -static uint8_t use_separate_smram = 0; -static uint8_t smram[0x40000]; - +static uint8_t use_separate_smram = 0; +static uint8_t smram[0x40000]; #ifdef ENABLE_SMRAM_LOG int smram_do_log = ENABLE_SMRAM_LOG; - static void smram_log(const char *fmt, ...) { va_list ap; if (smram_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define smram_log(fmt, ...) +# define smram_log(fmt, ...) #endif - static uint8_t smram_read(uint32_t addr, void *priv) { - smram_t *dev = (smram_t *) priv; + smram_t *dev = (smram_t *) priv; uint32_t new_addr = addr - dev->host_base + dev->ram_base; if (new_addr >= (1 << 30)) - return mem_read_ram_2gb(new_addr, priv); + return mem_read_ram_2gb(new_addr, priv); else if (!use_separate_smram || (new_addr >= 0xa0000)) - return mem_read_ram(new_addr, priv); + return mem_read_ram(new_addr, priv); else - return dev->mapping.exec[addr - dev->host_base]; + return dev->mapping.exec[addr - dev->host_base]; } - static uint16_t smram_readw(uint32_t addr, void *priv) { - smram_t *dev = (smram_t *) priv; + smram_t *dev = (smram_t *) priv; uint32_t new_addr = addr - dev->host_base + dev->ram_base; if (new_addr >= (1 << 30)) - return mem_read_ram_2gbw(new_addr, priv); + return mem_read_ram_2gbw(new_addr, priv); else if (!use_separate_smram || (new_addr >= 0xa0000)) - return mem_read_ramw(new_addr, priv); + return mem_read_ramw(new_addr, priv); else - return *(uint16_t *) &(dev->mapping.exec[addr - dev->host_base]); + return *(uint16_t *) &(dev->mapping.exec[addr - dev->host_base]); } - static uint32_t smram_readl(uint32_t addr, void *priv) { - smram_t *dev = (smram_t *) priv; + smram_t *dev = (smram_t *) priv; uint32_t new_addr = addr - dev->host_base + dev->ram_base; if (new_addr >= (1 << 30)) - return mem_read_ram_2gbl(new_addr, priv); + return mem_read_ram_2gbl(new_addr, priv); else if (!use_separate_smram || (new_addr >= 0xa0000)) - return mem_read_raml(new_addr, priv); + return mem_read_raml(new_addr, priv); else - return *(uint32_t *) &(dev->mapping.exec[addr - dev->host_base]); + return *(uint32_t *) &(dev->mapping.exec[addr - dev->host_base]); } - static void smram_write(uint32_t addr, uint8_t val, void *priv) { - smram_t *dev = (smram_t *) priv; + smram_t *dev = (smram_t *) priv; uint32_t new_addr = addr - dev->host_base + dev->ram_base; if (!use_separate_smram || (new_addr >= 0xa0000)) - mem_write_ram(new_addr, val, priv); + mem_write_ram(new_addr, val, priv); else - dev->mapping.exec[addr - dev->host_base] = val; + dev->mapping.exec[addr - dev->host_base] = val; } - static void smram_writew(uint32_t addr, uint16_t val, void *priv) { - smram_t *dev = (smram_t *) priv; + smram_t *dev = (smram_t *) priv; uint32_t new_addr = addr - dev->host_base + dev->ram_base; if (!use_separate_smram || (new_addr >= 0xa0000)) - mem_write_ramw(new_addr, val, priv); + mem_write_ramw(new_addr, val, priv); else - *(uint16_t *) &(dev->mapping.exec[addr - dev->host_base]) = val; + *(uint16_t *) &(dev->mapping.exec[addr - dev->host_base]) = val; } - static void smram_writel(uint32_t addr, uint32_t val, void *priv) { - smram_t *dev = (smram_t *) priv; + smram_t *dev = (smram_t *) priv; uint32_t new_addr = addr - dev->host_base + dev->ram_base; if (!use_separate_smram || (new_addr >= 0xa0000)) - mem_write_raml(new_addr, val, priv); + mem_write_raml(new_addr, val, priv); else - *(uint32_t *) &(dev->mapping.exec[addr - dev->host_base]) = val; + *(uint32_t *) &(dev->mapping.exec[addr - dev->host_base]) = val; } - /* Make a backup copy of host_base and size of all the SMRAM structs, needed so that if the SMRAM mappings change while in SMM, they will be recalculated on return. */ void @@ -148,15 +138,14 @@ smram_backup_all(void) smram_t *temp_smram = base_smram, *next; while (temp_smram != NULL) { - temp_smram->old_host_base = temp_smram->host_base; - temp_smram->old_size = temp_smram->size; + temp_smram->old_host_base = temp_smram->host_base; + temp_smram->old_size = temp_smram->size; - next = temp_smram->next; - temp_smram = next; + next = temp_smram->next; + temp_smram = next; } } - /* Recalculate any mappings, including the backup if returning from SMM. */ void smram_recalc_all(int ret) @@ -164,55 +153,54 @@ smram_recalc_all(int ret) smram_t *temp_smram = base_smram, *next; if (base_smram == NULL) - return; + return; if (ret) { - while (temp_smram != NULL) { - if (temp_smram->old_size != 0x00000000) - mem_mapping_recalc(temp_smram->old_host_base, temp_smram->old_size); - temp_smram->old_host_base = temp_smram->old_size = 0x00000000; + while (temp_smram != NULL) { + if (temp_smram->old_size != 0x00000000) + mem_mapping_recalc(temp_smram->old_host_base, temp_smram->old_size); + temp_smram->old_host_base = temp_smram->old_size = 0x00000000; - next = temp_smram->next; - temp_smram = next; - } + next = temp_smram->next; + temp_smram = next; + } } temp_smram = base_smram; while (temp_smram != NULL) { - if (temp_smram->size != 0x00000000) - mem_mapping_recalc(temp_smram->host_base, temp_smram->size); + if (temp_smram->size != 0x00000000) + mem_mapping_recalc(temp_smram->host_base, temp_smram->size); - next = temp_smram->next; - temp_smram = next; + next = temp_smram->next; + temp_smram = next; } flushmmucache(); } - /* Delete a SMRAM mapping. */ void smram_del(smram_t *smr) { /* Do a sanity check */ if ((base_smram == NULL) && (last_smram != NULL)) { - fatal("smram_del(): NULL base SMRAM with non-NULL last SMRAM\n"); - return; + fatal("smram_del(): NULL base SMRAM with non-NULL last SMRAM\n"); + return; } else if ((base_smram != NULL) && (last_smram == NULL)) { - fatal("smram_del(): Non-NULL base SMRAM with NULL last SMRAM\n"); - return; + fatal("smram_del(): Non-NULL base SMRAM with NULL last SMRAM\n"); + return; } else if ((base_smram != NULL) && (base_smram->prev != NULL)) { - fatal("smram_del(): Base SMRAM with a preceding SMRAM\n"); - return; + fatal("smram_del(): Base SMRAM with a preceding SMRAM\n"); + return; } else if ((last_smram != NULL) && (last_smram->next != NULL)) { - fatal("smram_del(): Last SMRAM with a following SMRAM\n"); - return; + fatal("smram_del(): Last SMRAM with a following SMRAM\n"); + return; } if (smr == NULL) { - fatal("smram_del(): Invalid SMRAM mapping\n"); - return; + fatal("smram_del(): Invalid SMRAM mapping\n"); + return; } /* Disable the entry. */ @@ -220,20 +208,19 @@ smram_del(smram_t *smr) /* Zap it from the list. */ if (smr->prev != NULL) - smr->prev->next = smr->next; + smr->prev->next = smr->next; if (smr->next != NULL) - smr->next->prev = smr->prev; + smr->next->prev = smr->prev; /* Check if it's the first or the last mapping. */ if (base_smram == smr) - base_smram = smr->next; + base_smram = smr->next; if (last_smram == smr) - last_smram = smr->prev; + last_smram = smr->prev; free(smr); } - /* Add a SMRAM mapping. */ smram_t * smram_add(void) @@ -242,63 +229,61 @@ smram_add(void) /* Do a sanity check */ if ((base_smram == NULL) && (last_smram != NULL)) { - fatal("smram_add(): NULL base SMRAM with non-NULL last SMRAM\n"); - return NULL; + fatal("smram_add(): NULL base SMRAM with non-NULL last SMRAM\n"); + return NULL; } else if ((base_smram != NULL) && (last_smram == NULL)) { - fatal("smram_add(): Non-NULL base SMRAM with NULL last SMRAM\n"); - return NULL; + fatal("smram_add(): Non-NULL base SMRAM with NULL last SMRAM\n"); + return NULL; } else if ((base_smram != NULL) && (base_smram->prev != NULL)) { - fatal("smram_add(): Base SMRAM with a preceding SMRAM\n"); - return NULL; + fatal("smram_add(): Base SMRAM with a preceding SMRAM\n"); + return NULL; } else if ((last_smram != NULL) && (last_smram->next != NULL)) { - fatal("smram_add(): Last SMRAM with a following SMRAM\n"); - return NULL; + fatal("smram_add(): Last SMRAM with a following SMRAM\n"); + return NULL; } temp_smram = (smram_t *) malloc(sizeof(smram_t)); if (temp_smram == NULL) { - fatal("smram_add(): temp_smram malloc failed\n"); - return NULL; + fatal("smram_add(): temp_smram malloc failed\n"); + return NULL; } memset(temp_smram, 0x00, sizeof(smram_t)); memset(&(temp_smram->mapping), 0x00, sizeof(mem_mapping_t)); /* Add struct to the beginning of the list if necessary.*/ if (base_smram == NULL) - base_smram = temp_smram; + base_smram = temp_smram; /* Add struct to the end of the list.*/ if (last_smram == NULL) - temp_smram->prev = NULL; - else { - temp_smram->prev = last_smram; - last_smram->next = temp_smram; + temp_smram->prev = NULL; + else { + temp_smram->prev = last_smram; + last_smram->next = temp_smram; } last_smram = temp_smram; mem_mapping_add(&(temp_smram->mapping), 0x00000000, 0x00000000, - smram_read,smram_readw,smram_readl, - smram_write,smram_writew,smram_writel, - ram, MEM_MAPPING_SMRAM, temp_smram); + smram_read, smram_readw, smram_readl, + smram_write, smram_writew, smram_writel, + ram, MEM_MAPPING_SMRAM, temp_smram); smram_set_separate_smram(0); return temp_smram; } - /* Set memory state in the specified model (normal or SMM) according to the specified flags, separately for bus and CPU. */ void smram_map_ex(int bus, int smm, uint32_t addr, uint32_t size, int is_smram) { if (bus) - mem_set_access_smram_bus(smm, addr, size, is_smram); + mem_set_access_smram_bus(smm, addr, size, is_smram); else - mem_set_access_smram_cpu(smm, addr, size, is_smram); + mem_set_access_smram_cpu(smm, addr, size, is_smram); } - /* Set memory state in the specified model (normal or SMM) according to the specified flags. */ void smram_map(int smm, uint32_t addr, uint32_t size, int is_smram) @@ -307,28 +292,26 @@ smram_map(int smm, uint32_t addr, uint32_t size, int is_smram) smram_map_ex(1, smm, addr, size, is_smram); } - /* Disable a specific SMRAM mapping. */ void smram_disable(smram_t *smr) { if (smr == NULL) { - fatal("smram_disable(): Invalid SMRAM mapping\n"); - return; + fatal("smram_disable(): Invalid SMRAM mapping\n"); + return; } if (smr->size != 0x00000000) { - smram_map(0, smr->host_base, smr->size, 0); - smram_map(1, smr->host_base, smr->size, 0); + smram_map(0, smr->host_base, smr->size, 0); + smram_map(1, smr->host_base, smr->size, 0); - smr->host_base = smr->ram_base = 0x00000000; - smr->size = 0x00000000; + smr->host_base = smr->ram_base = 0x00000000; + smr->size = 0x00000000; - mem_mapping_disable(&(smr->mapping)); + mem_mapping_disable(&(smr->mapping)); } } - /* Disable all SMRAM mappings. */ void smram_disable_all(void) @@ -336,56 +319,54 @@ smram_disable_all(void) smram_t *temp_smram = base_smram, *next; while (temp_smram != NULL) { - smram_disable(temp_smram); + smram_disable(temp_smram); - next = temp_smram->next; - temp_smram = next; + next = temp_smram->next; + temp_smram = next; } } - /* Enable SMRAM mappings according to flags for both normal and SMM modes, separately for bus and CPU. */ void smram_enable_ex(smram_t *smr, uint32_t host_base, uint32_t ram_base, uint32_t size, - int flags_normal, int flags_normal_bus, int flags_smm, int flags_smm_bus) + int flags_normal, int flags_normal_bus, int flags_smm, int flags_smm_bus) { if (smr == NULL) { - fatal("smram_add(): Invalid SMRAM mapping\n"); - return; + fatal("smram_add(): Invalid SMRAM mapping\n"); + return; } if ((size != 0x00000000) && (flags_normal || flags_smm)) { - smr->host_base = host_base; - smr->ram_base = ram_base, - smr->size = size; + smr->host_base = host_base; + smr->ram_base = ram_base, + smr->size = size; - mem_mapping_set_addr(&(smr->mapping), smr->host_base, smr->size); - if (!use_separate_smram || (smr->ram_base >= 0x000a0000)) { - if (smr->ram_base < (1 << 30)) - mem_mapping_set_exec(&(smr->mapping), ram + smr->ram_base); - else - mem_mapping_set_exec(&(smr->mapping), ram2 + smr->ram_base - (1 << 30)); - } else { - if (smr->ram_base == 0x00030000) - mem_mapping_set_exec(&(smr->mapping), smram); - else if (smr->ram_base == 0x00040000) - mem_mapping_set_exec(&(smr->mapping), smram + 0x10000); - else if (smr->ram_base == 0x00060000) - mem_mapping_set_exec(&(smr->mapping), smram + 0x20000); - else if (smr->ram_base == 0x00070000) - mem_mapping_set_exec(&(smr->mapping), smram + 0x30000); - } + mem_mapping_set_addr(&(smr->mapping), smr->host_base, smr->size); + if (!use_separate_smram || (smr->ram_base >= 0x000a0000)) { + if (smr->ram_base < (1 << 30)) + mem_mapping_set_exec(&(smr->mapping), ram + smr->ram_base); + else + mem_mapping_set_exec(&(smr->mapping), ram2 + smr->ram_base - (1 << 30)); + } else { + if (smr->ram_base == 0x00030000) + mem_mapping_set_exec(&(smr->mapping), smram); + else if (smr->ram_base == 0x00040000) + mem_mapping_set_exec(&(smr->mapping), smram + 0x10000); + else if (smr->ram_base == 0x00060000) + mem_mapping_set_exec(&(smr->mapping), smram + 0x20000); + else if (smr->ram_base == 0x00070000) + mem_mapping_set_exec(&(smr->mapping), smram + 0x30000); + } - smram_map_ex(0, 0, host_base, size, flags_normal); - smram_map_ex(1, 0, host_base, size, flags_normal_bus); - smram_map_ex(0, 1, host_base, size, flags_smm); - smram_map_ex(1, 1, host_base, size, flags_smm_bus); + smram_map_ex(0, 0, host_base, size, flags_normal); + smram_map_ex(1, 0, host_base, size, flags_normal_bus); + smram_map_ex(0, 1, host_base, size, flags_smm); + smram_map_ex(1, 1, host_base, size, flags_smm_bus); } else - smram_disable(smr); + smram_disable(smr); } - /* Enable SMRAM mappings according to flags for both normal and SMM modes. */ void smram_enable(smram_t *smr, uint32_t host_base, uint32_t ram_base, uint32_t size, int flags_normal, int flags_smm) @@ -393,7 +374,6 @@ smram_enable(smram_t *smr, uint32_t host_base, uint32_t ram_base, uint32_t size, smram_enable_ex(smr, host_base, ram_base, size, flags_normal, flags_normal, flags_smm, flags_smm); } - /* Checks if a SMRAM mapping is enabled or not. */ int smram_enabled(smram_t *smr) @@ -401,27 +381,25 @@ smram_enabled(smram_t *smr) int ret = 0; if (smr == NULL) - ret = 0; + ret = 0; else - ret = (smr->size != 0x00000000); + ret = (smr->size != 0x00000000); return ret; } - /* Changes the SMRAM state. */ void smram_state_change(smram_t *smr, int smm, int flags) { if (smr == NULL) { - fatal("smram_tate_change(): Invalid SMRAM mapping\n"); - return; + fatal("smram_tate_change(): Invalid SMRAM mapping\n"); + return; } smram_map(smm, smr->host_base, smr->size, flags); } - void smram_set_separate_smram(uint8_t set) { diff --git a/src/mem/spd.c b/src/mem/spd.c index acc7ced9f..b88508a61 100644 --- a/src/mem/spd.c +++ b/src/mem/spd.c @@ -28,58 +28,52 @@ #include <86box/version.h> #include <86box/machine.h> +#define SPD_ROLLUP(x) ((x) >= 16 ? ((x) -15) : (x)) -#define SPD_ROLLUP(x) ((x) >= 16 ? ((x) - 15) : (x)) - - -int spd_present = 0; -spd_t *spd_modules[SPD_MAX_SLOTS]; +int spd_present = 0; +spd_t *spd_modules[SPD_MAX_SLOTS]; static const device_t spd_device; - #ifdef ENABLE_SPD_LOG int spd_do_log = ENABLE_SPD_LOG; - static void spd_log(const char *fmt, ...) { va_list ap; if (spd_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define spd_log(fmt, ...) +# define spd_log(fmt, ...) #endif - static void spd_close(void *priv) { spd_log("SPD: close()\n"); for (uint8_t i = 0; i < SPD_MAX_SLOTS; i++) { - if (spd_modules[i]) - i2c_eeprom_close(spd_modules[i]->eeprom); + if (spd_modules[i]) + i2c_eeprom_close(spd_modules[i]->eeprom); } spd_present = 0; } - static void * spd_init(const device_t *info) { spd_log("SPD: init()\n"); for (uint8_t i = 0; i < SPD_MAX_SLOTS; i++) { - if (spd_modules[i]) - spd_modules[i]->eeprom = i2c_eeprom_init(i2c_smbus, SPD_BASE_ADDR + i, spd_modules[i]->data, sizeof(spd_modules[i]->data), 0); + if (spd_modules[i]) + spd_modules[i]->eeprom = i2c_eeprom_init(i2c_smbus, SPD_BASE_ADDR + i, spd_modules[i]->data, sizeof(spd_modules[i]->data), 0); } spd_present = 1; @@ -87,7 +81,6 @@ spd_init(const device_t *info) return &spd_modules; } - int comp_ui16_rev(const void *elem1, const void *elem2) { @@ -96,123 +89,120 @@ comp_ui16_rev(const void *elem1, const void *elem2) return ((a > b) ? -1 : ((a < b) ? 1 : 0)); } - void spd_populate(uint16_t *rows, uint8_t slot_count, uint16_t total_size, uint16_t min_module_size, uint16_t max_module_size, uint8_t enable_asym) { - uint8_t row, next_empty_row, split, i; + uint8_t row, next_empty_row, split, i; uint16_t asym; /* Populate rows with modules in power-of-2 capacities. */ memset(rows, 0, SPD_MAX_SLOTS << 1); for (row = 0; row < slot_count && total_size; row++) { - /* populate slot */ - rows[row] = 1 << log2i(MIN(total_size, max_module_size)); - if (total_size >= rows[row]) { - spd_log("SPD: Initial row %d = %d MB\n", row, rows[row]); - total_size -= rows[row]; - } else { - rows[row] = 0; - break; - } + /* populate slot */ + rows[row] = 1 << log2i(MIN(total_size, max_module_size)); + if (total_size >= rows[row]) { + spd_log("SPD: Initial row %d = %d MB\n", row, rows[row]); + total_size -= rows[row]; + } else { + rows[row] = 0; + break; + } } /* Did we populate all the RAM? */ if (total_size) { - /* Work backwards to add the missing RAM as asymmetric modules if possible. */ - if (enable_asym) { - row = slot_count - 1; - do { - asym = (1 << log2i(MIN(total_size, rows[row]))); - if (rows[row] + asym <= max_module_size) { - rows[row] += asym; - total_size -= asym; - } - } while ((row-- > 0) && total_size); - } + /* Work backwards to add the missing RAM as asymmetric modules if possible. */ + if (enable_asym) { + row = slot_count - 1; + do { + asym = (1 << log2i(MIN(total_size, rows[row]))); + if (rows[row] + asym <= max_module_size) { + rows[row] += asym; + total_size -= asym; + } + } while ((row-- > 0) && total_size); + } - if (total_size) /* still not enough */ - spd_log("SPD: Not enough RAM slots (%d) to cover memory (%d MB short)\n", slot_count, total_size); + if (total_size) /* still not enough */ + spd_log("SPD: Not enough RAM slots (%d) to cover memory (%d MB short)\n", slot_count, total_size); } /* Populate empty rows by splitting modules... */ split = (total_size == 0); /* ...if possible. */ while (split) { - /* Look for a module to split. */ - split = 0; - for (row = 0; row < slot_count; row++) { - if ((rows[row] < (min_module_size << 1)) || (rows[row] != (1 << log2i(rows[row])))) - continue; /* no module here, module is too small to be split, or asymmetric module */ + /* Look for a module to split. */ + split = 0; + for (row = 0; row < slot_count; row++) { + if ((rows[row] < (min_module_size << 1)) || (rows[row] != (1 << log2i(rows[row])))) + continue; /* no module here, module is too small to be split, or asymmetric module */ - /* Find next empty row. */ - next_empty_row = 0; - for (i = row + 1; i < slot_count && !next_empty_row; i++) { - if (!rows[i]) - next_empty_row = i; - } - if (!next_empty_row) - break; /* no empty rows left */ + /* Find next empty row. */ + next_empty_row = 0; + for (i = row + 1; i < slot_count && !next_empty_row; i++) { + if (!rows[i]) + next_empty_row = i; + } + if (!next_empty_row) + break; /* no empty rows left */ - /* Split the module into its own row and the next empty row. */ - spd_log("SPD: splitting row %d (%d MB) into %d and %d (%d MB each)\n", row, rows[row], row, next_empty_row, rows[row] >> 1); - rows[row] = rows[next_empty_row] = rows[row] >> 1; - split = 1; - break; - } + /* Split the module into its own row and the next empty row. */ + spd_log("SPD: splitting row %d (%d MB) into %d and %d (%d MB each)\n", row, rows[row], row, next_empty_row, rows[row] >> 1); + rows[row] = rows[next_empty_row] = rows[row] >> 1; + split = 1; + break; + } - /* Sort rows by descending capacity if any were split. */ - if (split) - qsort(rows, slot_count, sizeof(uint16_t), comp_ui16_rev); + /* Sort rows by descending capacity if any were split. */ + if (split) + qsort(rows, slot_count, sizeof(uint16_t), comp_ui16_rev); } } - static int spd_write_part_no(char *part_no, char *type, uint16_t size) { char size_unit; if (size >= 1024) { - size_unit = 'G'; - size >>= 10; + size_unit = 'G'; + size >>= 10; } else { - size_unit = 'M'; + size_unit = 'M'; } return sprintf(part_no, EMU_NAME "-%s-%03d%c", type, size, size_unit); } - void spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size) { - uint8_t slot, slot_count, row, i; - uint16_t min_module_size, rows[SPD_MAX_SLOTS], asym; - spd_edo_t *edo_data; + uint8_t slot, slot_count, row, i; + uint16_t min_module_size, rows[SPD_MAX_SLOTS], asym; + spd_edo_t *edo_data; spd_sdram_t *sdram_data; /* Determine the minimum module size for this RAM type. */ switch (ram_type) { - case SPD_TYPE_FPM: - case SPD_TYPE_EDO: - min_module_size = SPD_MIN_SIZE_EDO; - break; + case SPD_TYPE_FPM: + case SPD_TYPE_EDO: + min_module_size = SPD_MIN_SIZE_EDO; + break; - case SPD_TYPE_SDRAM: - min_module_size = SPD_MIN_SIZE_SDRAM; - break; + case SPD_TYPE_SDRAM: + min_module_size = SPD_MIN_SIZE_SDRAM; + break; - default: - spd_log("SPD: unknown RAM type %02X\n", ram_type); - return; + default: + spd_log("SPD: unknown RAM type %02X\n", ram_type); + return; } /* Count how many slots are enabled. */ slot_count = 0; for (slot = 0; slot < SPD_MAX_SLOTS; slot++) { - rows[slot] = 0; - if (slot_mask & (1 << slot)) - slot_count++; + rows[slot] = 0; + if (slot_mask & (1 << slot)) + slot_count++; } /* Populate rows. */ @@ -221,372 +211,367 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size) /* Register SPD devices and populate their data according to the rows. */ row = 0; for (slot = 0; (slot < SPD_MAX_SLOTS) && rows[row]; slot++) { - if (!(slot_mask & (1 << slot))) - continue; /* slot disabled */ + if (!(slot_mask & (1 << slot))) + continue; /* slot disabled */ - spd_modules[slot] = (spd_t *) malloc(sizeof(spd_t)); - memset(spd_modules[slot], 0, sizeof(spd_t)); - spd_modules[slot]->slot = slot; - spd_modules[slot]->size = rows[row]; + spd_modules[slot] = (spd_t *) malloc(sizeof(spd_t)); + memset(spd_modules[slot], 0, sizeof(spd_t)); + spd_modules[slot]->slot = slot; + spd_modules[slot]->size = rows[row]; - /* Determine the second row size, from which the first row size can be obtained. */ - asym = rows[row] - (1 << log2i(rows[row])); /* separate the powers of 2 */ - if (!asym) /* is the module asymmetric? */ - asym = rows[row] >> 1; /* symmetric, therefore divide by 2 */ + /* Determine the second row size, from which the first row size can be obtained. */ + asym = rows[row] - (1 << log2i(rows[row])); /* separate the powers of 2 */ + if (!asym) /* is the module asymmetric? */ + asym = rows[row] >> 1; /* symmetric, therefore divide by 2 */ - spd_modules[slot]->row1 = rows[row] - asym; - spd_modules[slot]->row2 = asym; + spd_modules[slot]->row1 = rows[row] - asym; + spd_modules[slot]->row2 = asym; - spd_log("SPD: Registering slot %d = row %d = %d MB (%d/%d)\n", slot, row, rows[row], spd_modules[slot]->row1, spd_modules[slot]->row2); + spd_log("SPD: Registering slot %d = row %d = %d MB (%d/%d)\n", slot, row, rows[row], spd_modules[slot]->row1, spd_modules[slot]->row2); - switch (ram_type) { - case SPD_TYPE_FPM: - case SPD_TYPE_EDO: - edo_data = &spd_modules[slot]->edo_data; + switch (ram_type) { + case SPD_TYPE_FPM: + case SPD_TYPE_EDO: + edo_data = &spd_modules[slot]->edo_data; - /* EDO SPD is specified by JEDEC and present in some modules, but - most utilities cannot interpret it correctly. SIV32 at least gets - the module capacities right, so it was used as a reference here. */ - edo_data->bytes_used = 0x80; - edo_data->spd_size = 0x08; - edo_data->mem_type = ram_type; - edo_data->row_bits = SPD_ROLLUP(7 + log2i(spd_modules[slot]->row1)); /* first row */ - edo_data->col_bits = 9; - if (spd_modules[slot]->row1 != spd_modules[slot]->row2) { /* the upper 4 bits of row_bits/col_bits should be 0 on a symmetric module */ - edo_data->row_bits |= SPD_ROLLUP(7 + log2i(spd_modules[slot]->row2)) << 4; /* second row, if different from first */ - edo_data->col_bits |= 9 << 4; /* same as first row, but just in case */ - } - edo_data->banks = 2; - edo_data->data_width_lsb = 64; - edo_data->signal_level = SPD_SIGNAL_LVTTL; - edo_data->trac = 50; - edo_data->tcac = 13; - edo_data->refresh_rate = SPD_REFRESH_NORMAL; - edo_data->dram_width = 8; + /* EDO SPD is specified by JEDEC and present in some modules, but + most utilities cannot interpret it correctly. SIV32 at least gets + the module capacities right, so it was used as a reference here. */ + edo_data->bytes_used = 0x80; + edo_data->spd_size = 0x08; + edo_data->mem_type = ram_type; + edo_data->row_bits = SPD_ROLLUP(7 + log2i(spd_modules[slot]->row1)); /* first row */ + edo_data->col_bits = 9; + if (spd_modules[slot]->row1 != spd_modules[slot]->row2) { /* the upper 4 bits of row_bits/col_bits should be 0 on a symmetric module */ + edo_data->row_bits |= SPD_ROLLUP(7 + log2i(spd_modules[slot]->row2)) << 4; /* second row, if different from first */ + edo_data->col_bits |= 9 << 4; /* same as first row, but just in case */ + } + edo_data->banks = 2; + edo_data->data_width_lsb = 64; + edo_data->signal_level = SPD_SIGNAL_LVTTL; + edo_data->trac = 50; + edo_data->tcac = 13; + edo_data->refresh_rate = SPD_REFRESH_NORMAL; + edo_data->dram_width = 8; - edo_data->spd_rev = 0x12; - for (i = spd_write_part_no(edo_data->part_no, (ram_type == SPD_TYPE_FPM) ? "FPM" : "EDO", rows[row]); - i < sizeof(edo_data->part_no); i++) - edo_data->part_no[i] = ' '; /* part number should be space-padded */ - edo_data->rev_code[0] = BCD8(EMU_VERSION_MAJ); - edo_data->rev_code[1] = BCD8(EMU_VERSION_MIN); - edo_data->mfg_year = 20; - edo_data->mfg_week = 17; + edo_data->spd_rev = 0x12; + for (i = spd_write_part_no(edo_data->part_no, (ram_type == SPD_TYPE_FPM) ? "FPM" : "EDO", rows[row]); + i < sizeof(edo_data->part_no); i++) + edo_data->part_no[i] = ' '; /* part number should be space-padded */ + edo_data->rev_code[0] = BCD8(EMU_VERSION_MAJ); + edo_data->rev_code[1] = BCD8(EMU_VERSION_MIN); + edo_data->mfg_year = 20; + edo_data->mfg_week = 17; - for (i = 0; i < 63; i++) - edo_data->checksum += spd_modules[slot]->data[i]; - for (i = 0; i < 129; i++) - edo_data->checksum2 += spd_modules[slot]->data[i]; - break; + for (i = 0; i < 63; i++) + edo_data->checksum += spd_modules[slot]->data[i]; + for (i = 0; i < 129; i++) + edo_data->checksum2 += spd_modules[slot]->data[i]; + break; - case SPD_TYPE_SDRAM: - sdram_data = &spd_modules[slot]->sdram_data; + case SPD_TYPE_SDRAM: + sdram_data = &spd_modules[slot]->sdram_data; - sdram_data->bytes_used = 0x80; - sdram_data->spd_size = 0x08; - sdram_data->mem_type = ram_type; - sdram_data->row_bits = SPD_ROLLUP(6 + log2i(spd_modules[slot]->row1)); /* first row */ - sdram_data->col_bits = 9; - if (spd_modules[slot]->row1 != spd_modules[slot]->row2) { /* the upper 4 bits of row_bits/col_bits should be 0 on a symmetric module */ - sdram_data->row_bits |= SPD_ROLLUP(6 + log2i(spd_modules[slot]->row2)) << 4; /* second row, if different from first */ - sdram_data->col_bits |= 9 << 4; /* same as first row, but just in case */ - } - sdram_data->rows = 2; - sdram_data->data_width_lsb = 64; - sdram_data->signal_level = SPD_SIGNAL_LVTTL; - sdram_data->tclk = 0x75; /* 7.5 ns = 133.3 MHz */ - sdram_data->tac = 0x10; - sdram_data->refresh_rate = SPD_SDR_REFRESH_SELF | SPD_REFRESH_NORMAL; - sdram_data->sdram_width = 8; - sdram_data->tccd = 1; - sdram_data->burst = SPD_SDR_BURST_PAGE | 1 | 2 | 4 | 8; - sdram_data->banks = 4; - sdram_data->cas = 0x1c; /* CAS 5/4/3 supported */ - sdram_data->cslat = sdram_data->we = 0x7f; - sdram_data->dev_attr = SPD_SDR_ATTR_EARLY_RAS | SPD_SDR_ATTR_AUTO_PC | SPD_SDR_ATTR_PC_ALL | SPD_SDR_ATTR_W1R_BURST; - sdram_data->tclk2 = 0xA0; /* 10 ns = 100 MHz */ - sdram_data->tclk3 = 0xF0; /* 15 ns = 66.7 MHz */ - sdram_data->tac2 = sdram_data->tac3 = 0x10; - sdram_data->trp = sdram_data->trrd = sdram_data->trcd = sdram_data->tras = 1; - if (spd_modules[slot]->row1 != spd_modules[slot]->row2) { - /* Utilities interpret bank_density a bit differently on asymmetric modules. */ - sdram_data->bank_density = 1 << (log2i(spd_modules[slot]->row1 >> 1) - 2); /* first row */ - sdram_data->bank_density |= 1 << (log2i(spd_modules[slot]->row2 >> 1) - 2); /* second row */ - } else { - sdram_data->bank_density = 1 << (log2i(spd_modules[slot]->row1 >> 1) - 1); /* symmetric module = only one bit is set */ - } - sdram_data->ca_setup = sdram_data->data_setup = 0x15; - sdram_data->ca_hold = sdram_data->data_hold = 0x08; + sdram_data->bytes_used = 0x80; + sdram_data->spd_size = 0x08; + sdram_data->mem_type = ram_type; + sdram_data->row_bits = SPD_ROLLUP(6 + log2i(spd_modules[slot]->row1)); /* first row */ + sdram_data->col_bits = 9; + if (spd_modules[slot]->row1 != spd_modules[slot]->row2) { /* the upper 4 bits of row_bits/col_bits should be 0 on a symmetric module */ + sdram_data->row_bits |= SPD_ROLLUP(6 + log2i(spd_modules[slot]->row2)) << 4; /* second row, if different from first */ + sdram_data->col_bits |= 9 << 4; /* same as first row, but just in case */ + } + sdram_data->rows = 2; + sdram_data->data_width_lsb = 64; + sdram_data->signal_level = SPD_SIGNAL_LVTTL; + sdram_data->tclk = 0x75; /* 7.5 ns = 133.3 MHz */ + sdram_data->tac = 0x10; + sdram_data->refresh_rate = SPD_SDR_REFRESH_SELF | SPD_REFRESH_NORMAL; + sdram_data->sdram_width = 8; + sdram_data->tccd = 1; + sdram_data->burst = SPD_SDR_BURST_PAGE | 1 | 2 | 4 | 8; + sdram_data->banks = 4; + sdram_data->cas = 0x1c; /* CAS 5/4/3 supported */ + sdram_data->cslat = sdram_data->we = 0x7f; + sdram_data->dev_attr = SPD_SDR_ATTR_EARLY_RAS | SPD_SDR_ATTR_AUTO_PC | SPD_SDR_ATTR_PC_ALL | SPD_SDR_ATTR_W1R_BURST; + sdram_data->tclk2 = 0xA0; /* 10 ns = 100 MHz */ + sdram_data->tclk3 = 0xF0; /* 15 ns = 66.7 MHz */ + sdram_data->tac2 = sdram_data->tac3 = 0x10; + sdram_data->trp = sdram_data->trrd = sdram_data->trcd = sdram_data->tras = 1; + if (spd_modules[slot]->row1 != spd_modules[slot]->row2) { + /* Utilities interpret bank_density a bit differently on asymmetric modules. */ + sdram_data->bank_density = 1 << (log2i(spd_modules[slot]->row1 >> 1) - 2); /* first row */ + sdram_data->bank_density |= 1 << (log2i(spd_modules[slot]->row2 >> 1) - 2); /* second row */ + } else { + sdram_data->bank_density = 1 << (log2i(spd_modules[slot]->row1 >> 1) - 1); /* symmetric module = only one bit is set */ + } + sdram_data->ca_setup = sdram_data->data_setup = 0x15; + sdram_data->ca_hold = sdram_data->data_hold = 0x08; - sdram_data->spd_rev = 0x12; - for (i = spd_write_part_no(sdram_data->part_no, "SDR", rows[row]); - i < sizeof(sdram_data->part_no); i++) - sdram_data->part_no[i] = ' '; /* part number should be space-padded */ - sdram_data->rev_code[0] = BCD8(EMU_VERSION_MAJ); - sdram_data->rev_code[1] = BCD8(EMU_VERSION_MIN); - sdram_data->mfg_year = 20; - sdram_data->mfg_week = 13; + sdram_data->spd_rev = 0x12; + for (i = spd_write_part_no(sdram_data->part_no, "SDR", rows[row]); + i < sizeof(sdram_data->part_no); i++) + sdram_data->part_no[i] = ' '; /* part number should be space-padded */ + sdram_data->rev_code[0] = BCD8(EMU_VERSION_MAJ); + sdram_data->rev_code[1] = BCD8(EMU_VERSION_MIN); + sdram_data->mfg_year = 20; + sdram_data->mfg_week = 13; - sdram_data->freq = 100; - sdram_data->features = 0xFF; + sdram_data->freq = 100; + sdram_data->features = 0xFF; - for (i = 0; i < 63; i++) - sdram_data->checksum += spd_modules[slot]->data[i]; - for (i = 0; i < 129; i++) - sdram_data->checksum2 += spd_modules[slot]->data[i]; - break; - } + for (i = 0; i < 63; i++) + sdram_data->checksum += spd_modules[slot]->data[i]; + for (i = 0; i < 129; i++) + sdram_data->checksum2 += spd_modules[slot]->data[i]; + break; + } - row++; + row++; } device_add(&spd_device); } - void spd_write_drbs(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit) { - uint8_t row, dimm, drb, apollo = 0; + uint8_t row, dimm, drb, apollo = 0; uint16_t size, rows[SPD_MAX_SLOTS]; /* Special case for VIA Apollo Pro family, which jumps from 5F to 56. */ if (reg_max < reg_min) { - apollo = reg_max; - reg_max = reg_min + 7; + apollo = reg_max; + reg_max = reg_min + 7; } /* No SPD: split SIMMs into pairs as if they were "DIMM"s. */ if (!spd_present) { - dimm = ((reg_max - reg_min) + 1) >> 1; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */ - spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0); + dimm = ((reg_max - reg_min) + 1) >> 1; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */ + spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0); } /* Write DRBs for each row. */ spd_log("SPD: Writing DRBs... regs=[%02X:%02X] unit=%d\n", reg_min, reg_max, drb_unit); for (row = 0; row <= (reg_max - reg_min); row++) { - dimm = (row >> 1); - size = 0; + dimm = (row >> 1); + size = 0; - if (spd_present) { - /* SPD enabled: use SPD info for this slot, if present. */ - if (spd_modules[dimm]) { - if (spd_modules[dimm]->row1 < drb_unit) /* hack within a hack: turn a double-sided DIMM that is too small into a single-sided one */ - size = (row & 1) ? 0 : drb_unit; - else - size = (row & 1) ? spd_modules[dimm]->row2 : spd_modules[dimm]->row1; - } - } else { - /* No SPD: use the values calculated above. */ - size = (rows[dimm] >> 1); - } + if (spd_present) { + /* SPD enabled: use SPD info for this slot, if present. */ + if (spd_modules[dimm]) { + if (spd_modules[dimm]->row1 < drb_unit) /* hack within a hack: turn a double-sided DIMM that is too small into a single-sided one */ + size = (row & 1) ? 0 : drb_unit; + else + size = (row & 1) ? spd_modules[dimm]->row2 : spd_modules[dimm]->row1; + } + } else { + /* No SPD: use the values calculated above. */ + size = (rows[dimm] >> 1); + } - /* Determine the DRB register to write. */ - drb = reg_min + row; - if (apollo && ((drb & 0xf) < 0xa)) - drb = apollo + (drb & 0xf); + /* Determine the DRB register to write. */ + drb = reg_min + row; + if (apollo && ((drb & 0xf) < 0xa)) + drb = apollo + (drb & 0xf); - /* Write DRB register, adding the previous DRB's value. */ - if (row == 0) - regs[drb] = 0; - else if ((apollo) && (drb == apollo)) - regs[drb] = regs[drb | 0xf]; /* 5F comes before 56 */ - else - regs[drb] = regs[drb - 1]; - if (size) - regs[drb] += size / drb_unit; /* this will intentionally overflow on 440GX with 2 GB */ - spd_log("SPD: DRB[%d] = %d MB (%02Xh raw)\n", row, size, regs[drb]); + /* Write DRB register, adding the previous DRB's value. */ + if (row == 0) + regs[drb] = 0; + else if ((apollo) && (drb == apollo)) + regs[drb] = regs[drb | 0xf]; /* 5F comes before 56 */ + else + regs[drb] = regs[drb - 1]; + if (size) + regs[drb] += size / drb_unit; /* this will intentionally overflow on 440GX with 2 GB */ + spd_log("SPD: DRB[%d] = %d MB (%02Xh raw)\n", row, size, regs[drb]); } } - /* Needed for 430LX. */ void spd_write_drbs_with_ext(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit) { - uint8_t row, dimm, drb; + uint8_t row, dimm, drb; uint16_t size, row_val = 0, rows[SPD_MAX_SLOTS]; - int shift; + int shift; /* No SPD: split SIMMs into pairs as if they were "DIMM"s. */ if (!spd_present) { - dimm = ((reg_max - reg_min) + 1) >> 1; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */ - spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0); + dimm = ((reg_max - reg_min) + 1) >> 1; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */ + spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0); } /* Write DRBs for each row. */ spd_log("SPD: Writing DRBs... regs=[%02X:%02X] unit=%d\n", reg_min, reg_max, drb_unit); for (row = 0; row <= (reg_max - reg_min); row++) { - dimm = (row >> 1); - size = 0; + dimm = (row >> 1); + size = 0; - if (spd_present) { - /* SPD enabled: use SPD info for this slot, if present. */ - if (spd_modules[dimm]) { - if (spd_modules[dimm]->row1 < drb_unit) /* hack within a hack: turn a double-sided DIMM that is too small into a single-sided one */ - size = (row & 1) ? 0 : drb_unit; - else - size = (row & 1) ? spd_modules[dimm]->row2 : spd_modules[dimm]->row1; - } - } else { - /* No SPD: use the values calculated above. */ - size = (rows[dimm] >> 1); - } + if (spd_present) { + /* SPD enabled: use SPD info for this slot, if present. */ + if (spd_modules[dimm]) { + if (spd_modules[dimm]->row1 < drb_unit) /* hack within a hack: turn a double-sided DIMM that is too small into a single-sided one */ + size = (row & 1) ? 0 : drb_unit; + else + size = (row & 1) ? spd_modules[dimm]->row2 : spd_modules[dimm]->row1; + } + } else { + /* No SPD: use the values calculated above. */ + size = (rows[dimm] >> 1); + } - /* Determine the DRB register to write. */ - drb = reg_min + row; + /* Determine the DRB register to write. */ + drb = reg_min + row; - /* Write DRB register, adding the previous DRB's value. */ - if (row == 0) - row_val = 0; - if (size) - row_val += size / drb_unit; /* this will intentionally overflow on 440GX with 2 GB */ - regs[drb] = row_val & 0xff; - drb = reg_min + 8 + (row >> 1); - shift = (row & 0x01) << 3; - regs[drb] = (((row_val & 0xfff) >> 8) << shift); - spd_log("SPD: DRB[%d] = %d MB (%02Xh raw)\n", row, size, regs[drb]); + /* Write DRB register, adding the previous DRB's value. */ + if (row == 0) + row_val = 0; + if (size) + row_val += size / drb_unit; /* this will intentionally overflow on 440GX with 2 GB */ + regs[drb] = row_val & 0xff; + drb = reg_min + 8 + (row >> 1); + shift = (row & 0x01) << 3; + regs[drb] = (((row_val & 0xfff) >> 8) << shift); + spd_log("SPD: DRB[%d] = %d MB (%02Xh raw)\n", row, size, regs[drb]); } } - /* Used by ALi M1531 and M1541/2. */ void spd_write_drbs_interleaved(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit) { - uint8_t row, dimm; - uint8_t drb; + uint8_t row, dimm; + uint8_t drb; uint16_t size, size_acc = 0; uint16_t rows[SPD_MAX_SLOTS]; /* No SPD: split SIMMs into pairs as if they were "DIMM"s. */ if (!spd_present) { - dimm = ((reg_max - reg_min) + 1) >> 2; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */ - spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0); + dimm = ((reg_max - reg_min) + 1) >> 2; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */ + spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0); } /* Write DRBs for each row. */ spd_log("SPD: Writing DRBs... regs=[%02X:%02X] unit=%d\n", reg_min, reg_max, drb_unit); for (row = 0; row <= (reg_max - reg_min); row += 2) { - dimm = (row >> 2); - size = 0; + dimm = (row >> 2); + size = 0; - if (spd_present) { - /* SPD enabled: use SPD info for this slot, if present. */ - if (spd_modules[dimm]) { - if (spd_modules[dimm]->row1 < drb_unit) /* hack within a hack: turn a double-sided DIMM that is too small into a single-sided one */ - size = ((row >> 1) & 1) ? 0 : drb_unit; - else - size = ((row >> 1) & 1) ? spd_modules[dimm]->row2 : spd_modules[dimm]->row1; - } - } else { - /* No SPD: use the values calculated above. */ - size = (rows[dimm] >> 1); - } + if (spd_present) { + /* SPD enabled: use SPD info for this slot, if present. */ + if (spd_modules[dimm]) { + if (spd_modules[dimm]->row1 < drb_unit) /* hack within a hack: turn a double-sided DIMM that is too small into a single-sided one */ + size = ((row >> 1) & 1) ? 0 : drb_unit; + else + size = ((row >> 1) & 1) ? spd_modules[dimm]->row2 : spd_modules[dimm]->row1; + } + } else { + /* No SPD: use the values calculated above. */ + size = (rows[dimm] >> 1); + } - /* Determine the DRB register to write. */ - drb = reg_min + row; + /* Determine the DRB register to write. */ + drb = reg_min + row; - /* Calculate previous and new size. */ - if (row == 0) - size_acc = 0; - else - size_acc += (size / drb_unit); + /* Calculate previous and new size. */ + if (row == 0) + size_acc = 0; + else + size_acc += (size / drb_unit); - /* Write DRB register, adding the previous DRB's value. */ - regs[drb] = size_acc & 0xff; - regs[drb + 1] = (regs[drb + 1] & 0xf0) | ((size_acc >> 8) & 0x0f); + /* Write DRB register, adding the previous DRB's value. */ + regs[drb] = size_acc & 0xff; + regs[drb + 1] = (regs[drb + 1] & 0xf0) | ((size_acc >> 8) & 0x0f); - spd_log("SPD: DRB[%d] = %d MB (%02Xh raw)\n", row >> 1, size, regs[drb]); + spd_log("SPD: DRB[%d] = %d MB (%02Xh raw)\n", row >> 1, size, regs[drb]); } } - /* This is needed because the ALi M1621 does this stuff completely differently, as it has DRAM bank registers instead of DRAM row boundary registers. */ void spd_write_drbs_ali1621(uint8_t *regs, uint8_t reg_min, uint8_t reg_max) { - uint8_t dimm, drb; + uint8_t dimm, drb; uint16_t size; uint16_t rows[SPD_MAX_SLOTS]; /* No SPD: split SIMMs into pairs as if they were "DIMM"s. */ if (!spd_present) { - dimm = ((reg_max - reg_min) + 1) >> 2; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */ - spd_populate(rows, dimm, mem_size >> 10, 4, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0); + dimm = ((reg_max - reg_min) + 1) >> 2; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */ + spd_populate(rows, dimm, mem_size >> 10, 4, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0); } /* Write DRBs for each row. */ spd_log("SPD: Writing DRBs... regs=[%02X:%02X] unit=%d\n", reg_min, reg_max, drb_unit); for (dimm = 0; dimm <= ((reg_max - reg_min) >> 2); dimm++) { - size = 0; - drb = reg_min + (dimm << 2); + size = 0; + drb = reg_min + (dimm << 2); - regs[drb] = 0xff; - regs[drb + 1] = 0xff; - regs[drb + 2] = 0x00; - regs[drb + 3] = 0xf0; + regs[drb] = 0xff; + regs[drb + 1] = 0xff; + regs[drb + 2] = 0x00; + regs[drb + 3] = 0xf0; - if (spd_modules[dimm] == NULL) - continue; + if (spd_modules[dimm] == NULL) + continue; - if (spd_present) { - /* SPD enabled: use SPD info for this slot, if present. */ - size = (spd_modules[dimm]->row1 + spd_modules[dimm]->row2) >> 1; - } else { - /* No SPD: use the values calculated above. */ - size = (rows[dimm] >> 1); - } + if (spd_present) { + /* SPD enabled: use SPD info for this slot, if present. */ + size = (spd_modules[dimm]->row1 + spd_modules[dimm]->row2) >> 1; + } else { + /* No SPD: use the values calculated above. */ + size = (rows[dimm] >> 1); + } - if (spd_modules[dimm]->row1) - regs[drb + 3] |= 0x06; + if (spd_modules[dimm]->row1) + regs[drb + 3] |= 0x06; - switch (size) { - case 4: - default: - regs[drb + 2] = 0x00; - break; - case 8: - regs[drb + 2] = 0x10; - break; - case 16: - regs[drb + 2] = 0x20; - break; - case 32: - regs[drb + 2] = 0x30; - break; - case 64: - regs[drb + 2] = 0x40; - break; - case 128: - regs[drb + 2] = 0x50; - break; - case 256: - regs[drb + 2] = 0x60; - break; - } + switch (size) { + case 4: + default: + regs[drb + 2] = 0x00; + break; + case 8: + regs[drb + 2] = 0x10; + break; + case 16: + regs[drb + 2] = 0x20; + break; + case 32: + regs[drb + 2] = 0x30; + break; + case 64: + regs[drb + 2] = 0x40; + break; + case 128: + regs[drb + 2] = 0x50; + break; + case 256: + regs[drb + 2] = 0x60; + break; + } - if (spd_modules[dimm]->row2) { - regs[drb + 3] |= 0x01; - regs[drb + 2] |= 0x80; - } + if (spd_modules[dimm]->row2) { + regs[drb + 3] |= 0x01; + regs[drb + 2] |= 0x80; + } - spd_log("SPD: DIMM %i: %02X %02X %02X %02X\n", regs[drb], regs[drb + 1], regs[drb + 2], regs[drb + 3]); + spd_log("SPD: DIMM %i: %02X %02X %02X %02X\n", regs[drb], regs[drb + 1], regs[drb + 2], regs[drb + 3]); } } - static const device_t spd_device = { - .name = "Serial Presence Detect ROMs", + .name = "Serial Presence Detect ROMs", .internal_name = "spd", - .flags = DEVICE_ISA, - .local = 0, - .init = spd_init, - .close = spd_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = 0, + .init = spd_init, + .close = spd_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/mem/sst_flash.c b/src/mem/sst_flash.c index 9aa0d4345..d94ca501b 100644 --- a/src/mem/sst_flash.c +++ b/src/mem/sst_flash.c @@ -32,62 +32,57 @@ #include <86box/plat.h> #include <86box/m_xt_xi8088.h> +typedef struct sst_t { + uint8_t manufacturer, id, has_bbp, is_39, + page_bytes, sdp, bbp_first_8k, bbp_last_8k; -typedef struct sst_t -{ - uint8_t manufacturer, id, has_bbp, is_39, - page_bytes, sdp, bbp_first_8k, bbp_last_8k; + int command_state, id_mode, + dirty; - int command_state, id_mode, - dirty; + uint32_t size, mask, + page_mask, page_base, + last_addr; - uint32_t size, mask, - page_mask, page_base, - last_addr; + uint8_t page_buffer[128], + page_dirty[128]; + uint8_t *array; - uint8_t page_buffer[128], - page_dirty[128]; - uint8_t *array; + mem_mapping_t mapping[8], mapping_h[8]; - mem_mapping_t mapping[8], mapping_h[8]; - - pc_timer_t page_write_timer; + pc_timer_t page_write_timer; } sst_t; +static char flash_path[1024]; -static char flash_path[1024]; +#define SST_CHIP_ERASE 0x10 /* Both 29 and 39, 6th cycle */ +#define SST_SDP_DISABLE 0x20 /* Only 29, Software data protect disable and write - treat as write */ +#define SST_SECTOR_ERASE 0x30 /* Only 39, 6th cycle */ +#define W_BOOT_BLOCK_PROT 0x40 /* Only W29C020 */ +#define SST_SET_ID_MODE_ALT 0x60 /* Only 29, 6th cycle */ +#define SST_ERASE 0x80 /* Both 29 and 39 */ + /* With data 60h on 6th cycle, it's alt. ID */ +#define SST_SET_ID_MODE 0x90 /* Both 29 and 39 */ +#define SST_BYTE_PROGRAM 0xa0 /* Both 29 and 39 */ +#define SST_CLEAR_ID_MODE 0xf0 /* Both 29 and 39 */ + /* 1st cycle variant only on 39 */ +#define SST 0xbf /* SST Manufacturer's ID */ +#define SST29EE010 0x0700 +#define SST29LE_VE010 0x0800 +#define SST29EE020 0x1000 +#define SST29LE_VE020 0x1200 +#define SST39SF512 0xb400 +#define SST39SF010 0xb500 +#define SST39SF020 0xb600 +#define SST39SF040 0xb700 -#define SST_CHIP_ERASE 0x10 /* Both 29 and 39, 6th cycle */ -#define SST_SDP_DISABLE 0x20 /* Only 29, Software data protect disable and write - treat as write */ -#define SST_SECTOR_ERASE 0x30 /* Only 39, 6th cycle */ -#define W_BOOT_BLOCK_PROT 0x40 /* Only W29C020 */ -#define SST_SET_ID_MODE_ALT 0x60 /* Only 29, 6th cycle */ -#define SST_ERASE 0x80 /* Both 29 and 39 */ - /* With data 60h on 6th cycle, it's alt. ID */ -#define SST_SET_ID_MODE 0x90 /* Both 29 and 39 */ -#define SST_BYTE_PROGRAM 0xa0 /* Both 29 and 39 */ -#define SST_CLEAR_ID_MODE 0xf0 /* Both 29 and 39 */ - /* 1st cycle variant only on 39 */ - -#define SST 0xbf /* SST Manufacturer's ID */ -#define SST29EE010 0x0700 -#define SST29LE_VE010 0x0800 -#define SST29EE020 0x1000 -#define SST29LE_VE020 0x1200 -#define SST39SF512 0xb400 -#define SST39SF010 0xb500 -#define SST39SF020 0xb600 -#define SST39SF040 0xb700 - -#define WINBOND 0xda /* Winbond Manufacturer's ID */ -#define W29C020 0x4500 - -#define SIZE_512K 0x010000 -#define SIZE_1M 0x020000 -#define SIZE_2M 0x040000 -#define SIZE_4M 0x080000 +#define WINBOND 0xda /* Winbond Manufacturer's ID */ +#define W29C020 0x4500 +#define SIZE_512K 0x010000 +#define SIZE_1M 0x020000 +#define SIZE_2M 0x040000 +#define SIZE_4M 0x080000 static void sst_sector_erase(sst_t *dev, uint32_t addr) @@ -95,330 +90,323 @@ sst_sector_erase(sst_t *dev, uint32_t addr) uint32_t base = addr & (dev->mask & ~0xfff); if ((base < 0x2000) && (dev->bbp_first_8k & 0x01)) - return; + return; else if ((base >= (dev->size - 0x2000)) && (dev->bbp_last_8k & 0x01)) - return; + return; memset(&dev->array[base], 0xff, 4096); dev->dirty = 1; } - static void sst_new_command(sst_t *dev, uint32_t addr, uint8_t val) { uint32_t base = 0x00000, size = dev->size; - if (dev->command_state == 5) switch (val) { - case SST_CHIP_ERASE: - if (dev->bbp_first_8k & 0x01) { - base += 0x2000; - size -= 0x2000; - } + if (dev->command_state == 5) + switch (val) { + case SST_CHIP_ERASE: + if (dev->bbp_first_8k & 0x01) { + base += 0x2000; + size -= 0x2000; + } - if (dev->bbp_last_8k & 0x01) - size -= 0x2000; + if (dev->bbp_last_8k & 0x01) + size -= 0x2000; - memset(&(dev->array[base]), 0xff, size); - dev->command_state = 0; - break; + memset(&(dev->array[base]), 0xff, size); + dev->command_state = 0; + break; - case SST_SDP_DISABLE: - if (!dev->is_39) - dev->sdp = 0; - dev->command_state = 0; - break; + case SST_SDP_DISABLE: + if (!dev->is_39) + dev->sdp = 0; + dev->command_state = 0; + break; - case SST_SECTOR_ERASE: - if (dev->is_39) - sst_sector_erase(dev, addr); - dev->command_state = 0; - break; + case SST_SECTOR_ERASE: + if (dev->is_39) + sst_sector_erase(dev, addr); + dev->command_state = 0; + break; - case SST_SET_ID_MODE_ALT: - dev->id_mode = 1; - dev->command_state = 0; - break; + case SST_SET_ID_MODE_ALT: + dev->id_mode = 1; + dev->command_state = 0; + break; - default: - dev->command_state = 0; - break; - } else switch (val) { - case SST_ERASE: - dev->command_state = 3; - break; + default: + dev->command_state = 0; + break; + } + else + switch (val) { + case SST_ERASE: + dev->command_state = 3; + break; - case SST_SET_ID_MODE: - dev->id_mode = 1; - dev->command_state = 0; - break; + case SST_SET_ID_MODE: + dev->id_mode = 1; + dev->command_state = 0; + break; - case SST_BYTE_PROGRAM: - if (!dev->is_39) { - dev->sdp = 1; - memset(dev->page_buffer, 0xff, 128); - memset(dev->page_dirty, 0x00, 128); - dev->page_bytes = 0; - dev->last_addr = 0xffffffff; - timer_on_auto(&dev->page_write_timer, 210.0); - } - dev->command_state = 6; - break; + case SST_BYTE_PROGRAM: + if (!dev->is_39) { + dev->sdp = 1; + memset(dev->page_buffer, 0xff, 128); + memset(dev->page_dirty, 0x00, 128); + dev->page_bytes = 0; + dev->last_addr = 0xffffffff; + timer_on_auto(&dev->page_write_timer, 210.0); + } + dev->command_state = 6; + break; - case W_BOOT_BLOCK_PROT: - dev->command_state = dev->has_bbp ? 8 : 0; - break; + case W_BOOT_BLOCK_PROT: + dev->command_state = dev->has_bbp ? 8 : 0; + break; - case SST_CLEAR_ID_MODE: - dev->id_mode = 0; - dev->command_state = 0; - break; + case SST_CLEAR_ID_MODE: + dev->id_mode = 0; + dev->command_state = 0; + break; - default: - dev->command_state = 0; - break; - } + default: + dev->command_state = 0; + break; + } } - static void sst_page_write(void *priv) { sst_t *dev = (sst_t *) priv; - int i; + int i; if (dev->last_addr != 0xffffffff) { - dev->page_base = dev->last_addr & dev->page_mask; - for (i = 0; i < 128; i++) { - if (dev->page_dirty[i]) { - if (((dev->page_base + i) < 0x2000) && (dev->bbp_first_8k & 0x01)) - continue; - else if (((dev->page_base + i) >= (dev->size - 0x2000)) && (dev->bbp_last_8k & 0x01)) - continue; + dev->page_base = dev->last_addr & dev->page_mask; + for (i = 0; i < 128; i++) { + if (dev->page_dirty[i]) { + if (((dev->page_base + i) < 0x2000) && (dev->bbp_first_8k & 0x01)) + continue; + else if (((dev->page_base + i) >= (dev->size - 0x2000)) && (dev->bbp_last_8k & 0x01)) + continue; - dev->array[dev->page_base + i] = dev->page_buffer[i]; - dev->dirty |= 1; - } - } + dev->array[dev->page_base + i] = dev->page_buffer[i]; + dev->dirty |= 1; + } + } } - dev->page_bytes = 0; + dev->page_bytes = 0; dev->command_state = 0; timer_disable(&dev->page_write_timer); } - static uint8_t sst_read_id(uint32_t addr, void *p) { - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) p; uint8_t ret = 0x00; if ((addr & 0xffff) == 0) - ret = dev->manufacturer; + ret = dev->manufacturer; else if ((addr & 0xffff) == 1) - ret = dev->id; + ret = dev->id; #ifdef UNKNOWN_FLASH else if ((addr & 0xffff) == 0x100) - ret = 0x1c; + ret = 0x1c; else if ((addr & 0xffff) == 0x101) - ret = 0x92; + ret = 0x92; #endif else if (dev->has_bbp) { - if (addr == 0x00002) - ret = dev->bbp_first_8k; - else if (addr == 0x3fff2) - ret = dev->bbp_last_8k; + if (addr == 0x00002) + ret = dev->bbp_first_8k; + else if (addr == 0x3fff2) + ret = dev->bbp_last_8k; } return ret; } - static void sst_buf_write(sst_t *dev, uint32_t addr, uint8_t val) { dev->page_buffer[addr & 0x0000007f] = val; - dev->page_dirty[addr & 0x0000007f] = 1; + dev->page_dirty[addr & 0x0000007f] = 1; dev->page_bytes++; dev->last_addr = addr; if (dev->page_bytes >= 128) { - sst_page_write(dev); + sst_page_write(dev); } else - timer_on_auto(&dev->page_write_timer, 210.0); + timer_on_auto(&dev->page_write_timer, 210.0); } - static void sst_write(uint32_t addr, uint8_t val, void *p) { sst_t *dev = (sst_t *) p; switch (dev->command_state) { - case 0: - case 3: - /* 1st and 4th Bus Write Cycle */ - if ((val == 0xf0) && dev->is_39 && (dev->command_state == 0)) { - if (dev->id_mode) - dev->id_mode = 0; - dev->command_state = 0; - } else if (((addr & 0x7fff) == 0x5555) && (val == 0xaa)) - dev->command_state++; - else { - if (!dev->is_39 && !dev->sdp && (dev->command_state == 0)) { - /* 29 series, software data protection off, start loading the page. */ - memset(dev->page_buffer, 0xff, 128); - memset(dev->page_dirty, 0x00, 128); - dev->page_bytes = 0; - dev->command_state = 7; - sst_buf_write(dev, addr, val); - } else - dev->command_state = 0; - } - break; - case 1: - case 4: - /* 2nd and 5th Bus Write Cycle */ - if (((addr & 0x7fff) == 0x2aaa) && (val == 0x55)) - dev->command_state++; - else - dev->command_state = 0; - break; - case 2: - case 5: - /* 3rd and 6th Bus Write Cycle */ - if ((dev->command_state == 5) && (val == SST_SECTOR_ERASE)) { - /* Sector erase - can be on any address. */ - sst_new_command(dev, addr, val); - } else if ((addr & 0x7fff) == 0x5555) - sst_new_command(dev, addr, val); - else - dev->command_state = 0; - break; - case 6: - /* Page Load Cycle (29) / Data Write Cycle (39SF) */ - if (dev->is_39) { - dev->command_state = 0; + case 0: + case 3: + /* 1st and 4th Bus Write Cycle */ + if ((val == 0xf0) && dev->is_39 && (dev->command_state == 0)) { + if (dev->id_mode) + dev->id_mode = 0; + dev->command_state = 0; + } else if (((addr & 0x7fff) == 0x5555) && (val == 0xaa)) + dev->command_state++; + else { + if (!dev->is_39 && !dev->sdp && (dev->command_state == 0)) { + /* 29 series, software data protection off, start loading the page. */ + memset(dev->page_buffer, 0xff, 128); + memset(dev->page_dirty, 0x00, 128); + dev->page_bytes = 0; + dev->command_state = 7; + sst_buf_write(dev, addr, val); + } else + dev->command_state = 0; + } + break; + case 1: + case 4: + /* 2nd and 5th Bus Write Cycle */ + if (((addr & 0x7fff) == 0x2aaa) && (val == 0x55)) + dev->command_state++; + else + dev->command_state = 0; + break; + case 2: + case 5: + /* 3rd and 6th Bus Write Cycle */ + if ((dev->command_state == 5) && (val == SST_SECTOR_ERASE)) { + /* Sector erase - can be on any address. */ + sst_new_command(dev, addr, val); + } else if ((addr & 0x7fff) == 0x5555) + sst_new_command(dev, addr, val); + else + dev->command_state = 0; + break; + case 6: + /* Page Load Cycle (29) / Data Write Cycle (39SF) */ + if (dev->is_39) { + dev->command_state = 0; - dev->array[addr & dev->mask] = val; - dev->dirty = 1; - } else { - dev->command_state++; - sst_buf_write(dev, addr, val); - } - break; - case 7: - if (!dev->is_39) - sst_buf_write(dev, addr, val); - break; - case 8: - if ((addr == 0x00000) && (val == 0x00)) - dev->bbp_first_8k = 0xff; - else if ((addr == 0x3ffff) && (val == 0xff)) - dev->bbp_last_8k = 0xff; - dev->command_state = 0; - break; + dev->array[addr & dev->mask] = val; + dev->dirty = 1; + } else { + dev->command_state++; + sst_buf_write(dev, addr, val); + } + break; + case 7: + if (!dev->is_39) + sst_buf_write(dev, addr, val); + break; + case 8: + if ((addr == 0x00000) && (val == 0x00)) + dev->bbp_first_8k = 0xff; + else if ((addr == 0x3ffff) && (val == 0xff)) + dev->bbp_last_8k = 0xff; + dev->command_state = 0; + break; } } - static uint8_t sst_read(uint32_t addr, void *p) { - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) p; uint8_t ret = 0xff; addr &= 0x000fffff; if (dev->id_mode) - ret = sst_read_id(addr, p); + ret = sst_read_id(addr, p); else { - if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask))) - ret = dev->array[addr - biosaddr]; + if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask))) + ret = dev->array[addr - biosaddr]; } return ret; } - static uint16_t sst_readw(uint32_t addr, void *p) { - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) p; uint16_t ret = 0xffff; addr &= 0x000fffff; if (dev->id_mode) - ret = sst_read(addr, p) | (sst_read(addr + 1, p) << 8); + ret = sst_read(addr, p) | (sst_read(addr + 1, p) << 8); else { - if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask))) - ret = *(uint16_t *)&dev->array[addr - biosaddr]; + if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask))) + ret = *(uint16_t *) &dev->array[addr - biosaddr]; } return ret; } - static uint32_t sst_readl(uint32_t addr, void *p) { - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) p; uint32_t ret = 0xffffffff; addr &= 0x000fffff; if (dev->id_mode) - ret = sst_readw(addr, p) | (sst_readw(addr + 2, p) << 16); + ret = sst_readw(addr, p) | (sst_readw(addr + 2, p) << 16); else { - if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask))) - ret = *(uint32_t *)&dev->array[addr - biosaddr]; + if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask))) + ret = *(uint32_t *) &dev->array[addr - biosaddr]; } return ret; } - static void sst_add_mappings(sst_t *dev) { - int i = 0, count; + int i = 0, count; uint32_t base, fbase; uint32_t root_base; - count = dev->size >> 16; + count = dev->size >> 16; root_base = 0x100000 - dev->size; for (i = 0; i < count; i++) { - base = root_base + (i << 16); - fbase = base & biosmask; + base = root_base + (i << 16); + fbase = base & biosmask; - memcpy(&dev->array[fbase], &rom[base & biosmask], 0x10000); + memcpy(&dev->array[fbase], &rom[base & biosmask], 0x10000); - if (base >= 0xe0000) { - mem_mapping_add(&(dev->mapping[i]), base, 0x10000, - sst_read, sst_readw, sst_readl, - sst_write, NULL, NULL, - dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev); - } - if (is6117) { - mem_mapping_add(&(dev->mapping_h[i]), (base | 0x3f00000), 0x10000, - sst_read, sst_readw, sst_readl, - sst_write, NULL, NULL, - dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev); - } else { - mem_mapping_add(&(dev->mapping_h[i]), (base | (cpu_16bitbus ? 0xf00000 : 0xfff00000)), 0x10000, - sst_read, sst_readw, sst_readl, - sst_write, NULL, NULL, - dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev); - } + if (base >= 0xe0000) { + mem_mapping_add(&(dev->mapping[i]), base, 0x10000, + sst_read, sst_readw, sst_readl, + sst_write, NULL, NULL, + dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev); + } + if (is6117) { + mem_mapping_add(&(dev->mapping_h[i]), (base | 0x3f00000), 0x10000, + sst_read, sst_readw, sst_readl, + sst_write, NULL, NULL, + dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev); + } else { + mem_mapping_add(&(dev->mapping_h[i]), (base | (cpu_16bitbus ? 0xf00000 : 0xfff00000)), 0x10000, + sst_read, sst_readw, sst_readl, + sst_write, NULL, NULL, + dev->array + fbase, MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, (void *) dev); + } } } - static void * sst_init(const device_t *info) { - FILE *f; + FILE *f; sst_t *dev = malloc(sizeof(sst_t)); memset(dev, 0, sizeof(sst_t)); @@ -431,48 +419,47 @@ sst_init(const device_t *info) memset(dev->array, 0xff, biosmask + 1); dev->manufacturer = info->local & 0xff; - dev->id = (info->local >> 8) & 0xff; - dev->has_bbp = (dev->manufacturer == WINBOND) && ((info->local & 0xff00) >= W29C020); - dev->is_39 = (dev->manufacturer == SST) && ((info->local & 0xff00) >= SST39SF512); + dev->id = (info->local >> 8) & 0xff; + dev->has_bbp = (dev->manufacturer == WINBOND) && ((info->local & 0xff00) >= W29C020); + dev->is_39 = (dev->manufacturer == SST) && ((info->local & 0xff00) >= SST39SF512); dev->size = info->local & 0xffff0000; if ((dev->size == 0x20000) && (strstr(machine_get_internal_name_ex(machine), "xi8088")) && !xi8088_bios_128kb()) - dev->size = 0x10000; + dev->size = 0x10000; - dev->mask = dev->size - 1; - dev->page_mask = dev->mask & 0xffffff80; /* Filter out A0-A6. */ - dev->sdp = 1; + dev->mask = dev->size - 1; + dev->page_mask = dev->mask & 0xffffff80; /* Filter out A0-A6. */ + dev->sdp = 1; dev->bbp_first_8k = dev->bbp_last_8k = 0xfe; sst_add_mappings(dev); f = nvr_fopen(flash_path, "rb"); if (f) { - if (fread(&(dev->array[0x00000]), 1, dev->size, f) != dev->size) - pclog("Less than %i bytes read from the SST Flash ROM file\n", dev->size); - fclose(f); + if (fread(&(dev->array[0x00000]), 1, dev->size, f) != dev->size) + pclog("Less than %i bytes read from the SST Flash ROM file\n", dev->size); + fclose(f); } else - dev->dirty = 1; /* It is by definition dirty on creation. */ + dev->dirty = 1; /* It is by definition dirty on creation. */ if (!dev->is_39) - timer_add(&dev->page_write_timer, sst_page_write, dev, 0); + timer_add(&dev->page_write_timer, sst_page_write, dev, 0); return dev; } - static void sst_close(void *p) { - FILE *f; - sst_t *dev = (sst_t *)p; + FILE *f; + sst_t *dev = (sst_t *) p; if (dev->dirty) { - f = nvr_fopen(flash_path, "wb"); - if (f != NULL) { - fwrite(&(dev->array[0x00000]), dev->size, 1, f); - fclose(f); - } + f = nvr_fopen(flash_path, "wb"); + if (f != NULL) { + fwrite(&(dev->array[0x00000]), dev->size, 1, f); + fclose(f); + } } free(dev->array); @@ -482,85 +469,85 @@ sst_close(void *p) } const device_t sst_flash_29ee010_device = { - .name = "SST 29EE010 Flash BIOS", + .name = "SST 29EE010 Flash BIOS", .internal_name = "sst_flash_29ee010", - .flags = 0, - .local = SST | SST29EE010 | SIZE_1M, - .init = sst_init, - .close = sst_close, - .reset = NULL, + .flags = 0, + .local = SST | SST29EE010 | SIZE_1M, + .init = sst_init, + .close = sst_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t sst_flash_29ee020_device = { - .name = "SST 29EE020 Flash BIOS", + .name = "SST 29EE020 Flash BIOS", .internal_name = "sst_flash_29ee020", - .flags = 0, - .local = SST | SST29EE020 | SIZE_2M, - .init = sst_init, - .close = sst_close, - .reset = NULL, + .flags = 0, + .local = SST | SST29EE020 | SIZE_2M, + .init = sst_init, + .close = sst_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t winbond_flash_w29c020_device = { - .name = "Winbond W29C020 Flash BIOS", + .name = "Winbond W29C020 Flash BIOS", .internal_name = "winbond_flash_w29c020", - .flags = 0, - .local = WINBOND | W29C020 | SIZE_2M, - .init = sst_init, - .close = sst_close, - .reset = NULL, + .flags = 0, + .local = WINBOND | W29C020 | SIZE_2M, + .init = sst_init, + .close = sst_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t sst_flash_39sf010_device = { - .name = "SST 39SF010 Flash BIOS", + .name = "SST 39SF010 Flash BIOS", .internal_name = "sst_flash_39sf010", - .flags = 0, - .local = SST | SST39SF010 | SIZE_1M, - .init = sst_init, - .close = sst_close, - .reset = NULL, + .flags = 0, + .local = SST | SST39SF010 | SIZE_1M, + .init = sst_init, + .close = sst_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t sst_flash_39sf020_device = { - .name = "SST 39SF020 Flash BIOS", + .name = "SST 39SF020 Flash BIOS", .internal_name = "sst_flash_39sf020", - .flags = 0, - .local = SST | SST39SF020 | SIZE_2M, - .init = sst_init, - .close = sst_close, - .reset = NULL, + .flags = 0, + .local = SST | SST39SF020 | SIZE_2M, + .init = sst_init, + .close = sst_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t sst_flash_39sf040_device = { - .name = "SST 39SF040 Flash BIOS", + .name = "SST 39SF040 Flash BIOS", .internal_name = "sst_flash_39sf040", - .flags = 0, - .local = SST | SST39SF040 | SIZE_4M, - .init = sst_init, - .close = sst_close, - .reset = NULL, + .flags = 0, + .local = SST | SST39SF040 | SIZE_4M, + .init = sst_init, + .close = sst_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; From 3c76dbbde5f3be66b9b6845084c2e0782b8d534d Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:18:20 -0400 Subject: [PATCH 371/386] clang-format in src/network/ --- src/network/net_3c503.c | 650 +++++---- src/network/net_dp8390.c | 1144 ++++++++-------- src/network/net_event.c | 16 +- src/network/net_ne2000.c | 1293 +++++++++--------- src/network/net_pcap.c | 190 ++- src/network/net_pcnet.c | 2753 +++++++++++++++++++------------------- src/network/net_plip.c | 471 ++++--- src/network/net_slirp.c | 94 +- src/network/net_wd8003.c | 788 ++++++----- src/network/network.c | 197 ++- src/network/pcap_if.c | 197 ++- 11 files changed, 3768 insertions(+), 4025 deletions(-) diff --git a/src/network/net_3c503.c b/src/network/net_3c503.c index 2e5c97519..5123da265 100644 --- a/src/network/net_3c503.c +++ b/src/network/net_3c503.c @@ -63,131 +63,124 @@ #include <86box/bswap.h> typedef struct { - dp8390_t *dp8390; - mem_mapping_t ram_mapping; - uint32_t base_address; - int base_irq; - uint32_t bios_addr; - uint8_t maclocal[6]; /* configured MAC (local) address */ + dp8390_t *dp8390; + mem_mapping_t ram_mapping; + uint32_t base_address; + int base_irq; + uint32_t bios_addr; + uint8_t maclocal[6]; /* configured MAC (local) address */ struct { - uint8_t pstr; - uint8_t pspr; - uint8_t dqtr; - uint8_t bcfr; - uint8_t pcfr; - uint8_t gacfr; - uint8_t ctrl; - uint8_t streg; - uint8_t idcfr; - uint16_t da; - uint32_t vptr; - uint8_t rfmsb; - uint8_t rflsb; + uint8_t pstr; + uint8_t pspr; + uint8_t dqtr; + uint8_t bcfr; + uint8_t pcfr; + uint8_t gacfr; + uint8_t ctrl; + uint8_t streg; + uint8_t idcfr; + uint16_t da; + uint32_t vptr; + uint8_t rfmsb; + uint8_t rflsb; } regs; int dma_channel; } threec503_t; - #ifdef ENABLE_3COM503_LOG int threec503_do_log = ENABLE_3COM503_LOG; - static void threec503_log(const char *fmt, ...) { va_list ap; if (threec503_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define threec503_log(fmt, ...) +# define threec503_log(fmt, ...) #endif - static void threec503_interrupt(void *priv, int set) { threec503_t *dev = (threec503_t *) priv; switch (dev->base_irq) { - case 2: - dev->regs.idcfr = 0x10; - break; + case 2: + dev->regs.idcfr = 0x10; + break; - case 3: - dev->regs.idcfr = 0x20; - break; + case 3: + dev->regs.idcfr = 0x20; + break; - case 4: - dev->regs.idcfr = 0x40; - break; + case 4: + dev->regs.idcfr = 0x40; + break; - case 5: - dev->regs.idcfr = 0x80; - break; + case 5: + dev->regs.idcfr = 0x80; + break; } if (set) - picint(1 << dev->base_irq); + picint(1 << dev->base_irq); else - picintc(1 << dev->base_irq); + picintc(1 << dev->base_irq); } - static void threec503_ram_write(uint32_t addr, uint8_t val, void *priv) { - threec503_t *dev = (threec503_t *)priv; + threec503_t *dev = (threec503_t *) priv; if ((addr & 0x3fff) >= 0x2000) - return; + return; dev->dp8390->mem[addr & 0x1fff] = val; } - static uint8_t threec503_ram_read(uint32_t addr, void *priv) { - threec503_t *dev = (threec503_t *)priv; + threec503_t *dev = (threec503_t *) priv; if ((addr & 0x3fff) >= 0x2000) - return 0xff; + return 0xff; return dev->dp8390->mem[addr & 0x1fff]; } - static void threec503_set_drq(threec503_t *dev) { switch (dev->dma_channel) { - case 1: - dev->regs.idcfr = 1; - break; + case 1: + dev->regs.idcfr = 1; + break; - case 2: - dev->regs.idcfr = 2; - break; + case 2: + dev->regs.idcfr = 2; + break; - case 3: - dev->regs.idcfr = 4; - break; + case 3: + dev->regs.idcfr = 4; + break; } } - /* reset - restore state to power-up, cancelling all i/o */ static void threec503_reset(void *priv) { - threec503_t *dev = (threec503_t *)priv; + threec503_t *dev = (threec503_t *) priv; #ifdef ENABLE_3COM503_LOG threec503_log("3Com503: reset\n"); @@ -200,374 +193,370 @@ threec503_reset(void *priv) dev->regs.ctrl = 0x0a; } - static uint8_t threec503_nic_lo_read(uint16_t addr, void *priv) { - threec503_t *dev = (threec503_t *)priv; - uint8_t retval = 0; - int off = addr - dev->base_address; + threec503_t *dev = (threec503_t *) priv; + uint8_t retval = 0; + int off = addr - dev->base_address; switch ((dev->regs.ctrl >> 2) & 3) { - case 0x00: - threec503_log("Read offset=%04x\n", off); - if (off == 0x00) - retval = dp8390_read_cr(dev->dp8390); - else switch(dev->dp8390->CR.pgsel) { - case 0x00: - retval = dp8390_page0_read(dev->dp8390, off, 1); - break; + case 0x00: + threec503_log("Read offset=%04x\n", off); + if (off == 0x00) + retval = dp8390_read_cr(dev->dp8390); + else + switch (dev->dp8390->CR.pgsel) { + case 0x00: + retval = dp8390_page0_read(dev->dp8390, off, 1); + break; - case 0x01: - retval = dp8390_page1_read(dev->dp8390, off, 1); - break; + case 0x01: + retval = dp8390_page1_read(dev->dp8390, off, 1); + break; - case 0x02: - retval = dp8390_page2_read(dev->dp8390, off, 1); - break; + case 0x02: + retval = dp8390_page2_read(dev->dp8390, off, 1); + break; - case 0x03: - retval = 0xff; - break; - } - break; + case 0x03: + retval = 0xff; + break; + } + break; - case 0x01: - retval = dev->dp8390->macaddr[off]; - break; + case 0x01: + retval = dev->dp8390->macaddr[off]; + break; - case 0x02: - retval = dev->dp8390->macaddr[off + 0x10]; - break; + case 0x02: + retval = dev->dp8390->macaddr[off + 0x10]; + break; - case 0x03: - retval = 0xff; - break; + case 0x03: + retval = 0xff; + break; } - return(retval); + return (retval); } - static void threec503_nic_lo_write(uint16_t addr, uint8_t val, void *priv) { - threec503_t *dev = (threec503_t *)priv; - int off = addr - dev->base_address; + threec503_t *dev = (threec503_t *) priv; + int off = addr - dev->base_address; switch ((dev->regs.ctrl >> 2) & 3) { - case 0x00: - /* The high 16 bytes of i/o space are for the ne2000 asic - - the low 16 bytes are for the DS8390, with the current - page being selected by the PS0,PS1 registers in the - command register */ - if (off == 0x00) - dp8390_write_cr(dev->dp8390, val); - else switch(dev->dp8390->CR.pgsel) { - case 0x00: - dp8390_page0_write(dev->dp8390, off, val, 1); - break; + case 0x00: + /* The high 16 bytes of i/o space are for the ne2000 asic - + the low 16 bytes are for the DS8390, with the current + page being selected by the PS0,PS1 registers in the + command register */ + if (off == 0x00) + dp8390_write_cr(dev->dp8390, val); + else + switch (dev->dp8390->CR.pgsel) { + case 0x00: + dp8390_page0_write(dev->dp8390, off, val, 1); + break; - case 0x01: - dp8390_page1_write(dev->dp8390, off, val, 1); - break; + case 0x01: + dp8390_page1_write(dev->dp8390, off, val, 1); + break; - case 0x02: - dp8390_page2_write(dev->dp8390, off, val, 1); - break; + case 0x02: + dp8390_page2_write(dev->dp8390, off, val, 1); + break; - case 0x03: - break; - } - break; + case 0x03: + break; + } + break; - case 0x01: - case 0x02: - case 0x03: - break; + case 0x01: + case 0x02: + case 0x03: + break; } threec503_log("3Com503: write addr %x, value %x\n", addr, val); } - static uint8_t threec503_nic_hi_read(uint16_t addr, void *priv) { - threec503_t *dev = (threec503_t *)priv; + threec503_t *dev = (threec503_t *) priv; threec503_log("3Com503: Read GA address=%04x\n", addr); switch (addr & 0x0f) { - case 0x00: - return dev->regs.pstr; + case 0x00: + return dev->regs.pstr; - case 0x01: - return dev->regs.pspr; + case 0x01: + return dev->regs.pspr; - case 0x02: - return dev->regs.dqtr; + case 0x02: + return dev->regs.dqtr; - case 0x03: - switch (dev->base_address) { - default: - case 0x300: - dev->regs.bcfr = 0x80; - break; + case 0x03: + switch (dev->base_address) { + default: + case 0x300: + dev->regs.bcfr = 0x80; + break; - case 0x310: - dev->regs.bcfr = 0x40; - break; + case 0x310: + dev->regs.bcfr = 0x40; + break; - case 0x330: - dev->regs.bcfr = 0x20; - break; + case 0x330: + dev->regs.bcfr = 0x20; + break; - case 0x350: - dev->regs.bcfr = 0x10; - break; + case 0x350: + dev->regs.bcfr = 0x10; + break; - case 0x250: - dev->regs.bcfr = 0x08; - break; + case 0x250: + dev->regs.bcfr = 0x08; + break; - case 0x280: - dev->regs.bcfr = 0x04; - break; + case 0x280: + dev->regs.bcfr = 0x04; + break; - case 0x2a0: - dev->regs.bcfr = 0x02; - break; + case 0x2a0: + dev->regs.bcfr = 0x02; + break; - case 0x2e0: - dev->regs.bcfr = 0x01; - break; - } + case 0x2e0: + dev->regs.bcfr = 0x01; + break; + } - return dev->regs.bcfr; - break; + return dev->regs.bcfr; + break; - case 0x04: - switch (dev->bios_addr) { - case 0xdc000: - dev->regs.pcfr = 0x80; - break; + case 0x04: + switch (dev->bios_addr) { + case 0xdc000: + dev->regs.pcfr = 0x80; + break; - case 0xd8000: - dev->regs.pcfr = 0x40; - break; + case 0xd8000: + dev->regs.pcfr = 0x40; + break; - case 0xcc000: - dev->regs.pcfr = 0x20; - break; + case 0xcc000: + dev->regs.pcfr = 0x20; + break; - case 0xc8000: - dev->regs.pcfr = 0x10; - break; - } + case 0xc8000: + dev->regs.pcfr = 0x10; + break; + } - return dev->regs.pcfr; - break; + return dev->regs.pcfr; + break; - case 0x05: - return dev->regs.gacfr; + case 0x05: + return dev->regs.gacfr; - case 0x06: - return dev->regs.ctrl; + case 0x06: + return dev->regs.ctrl; - case 0x07: - return dev->regs.streg; + case 0x07: + return dev->regs.streg; - case 0x08: - return dev->regs.idcfr; + case 0x08: + return dev->regs.idcfr; - case 0x09: - return (dev->regs.da >> 8); + case 0x09: + return (dev->regs.da >> 8); - case 0x0a: - return (dev->regs.da & 0xff); + case 0x0a: + return (dev->regs.da & 0xff); - case 0x0b: - return (dev->regs.vptr >> 12) & 0xff; + case 0x0b: + return (dev->regs.vptr >> 12) & 0xff; - case 0x0c: - return (dev->regs.vptr >> 4) & 0xff; + case 0x0c: + return (dev->regs.vptr >> 4) & 0xff; - case 0x0d: - return (dev->regs.vptr & 0x0f) << 4; + case 0x0d: + return (dev->regs.vptr & 0x0f) << 4; - case 0x0e: - case 0x0f: - if (!(dev->regs.ctrl & 0x80)) - return 0xff; + case 0x0e: + case 0x0f: + if (!(dev->regs.ctrl & 0x80)) + return 0xff; - threec503_set_drq(dev); + threec503_set_drq(dev); - return dp8390_chipmem_read(dev->dp8390, dev->regs.da++, 1); + return dp8390_chipmem_read(dev->dp8390, dev->regs.da++, 1); } return 0; } - static void threec503_nic_hi_write(uint16_t addr, uint8_t val, void *priv) { - threec503_t *dev = (threec503_t *)priv; + threec503_t *dev = (threec503_t *) priv; threec503_log("3Com503: Write GA address=%04x, val=%04x\n", addr, val); switch (addr & 0x0f) { - case 0x00: - dev->regs.pstr = val; - break; + case 0x00: + dev->regs.pstr = val; + break; - case 0x01: - dev->regs.pspr = val; - break; + case 0x01: + dev->regs.pspr = val; + break; - case 0x02: - dev->regs.dqtr = val; - break; + case 0x02: + dev->regs.dqtr = val; + break; - case 0x05: - if ((dev->regs.gacfr & 0x0f) != (val & 0x0f)) { - switch (val & 0x0f) { - case 0: /*ROM mapping*/ - /* FIXME: Implement this when a BIOS is found/generated. */ - mem_mapping_disable(&dev->ram_mapping); - break; + case 0x05: + if ((dev->regs.gacfr & 0x0f) != (val & 0x0f)) { + switch (val & 0x0f) { + case 0: /*ROM mapping*/ + /* FIXME: Implement this when a BIOS is found/generated. */ + mem_mapping_disable(&dev->ram_mapping); + break; - case 9: /*RAM mapping*/ - mem_mapping_enable(&dev->ram_mapping); - break; + case 9: /*RAM mapping*/ + mem_mapping_enable(&dev->ram_mapping); + break; - default: /*No ROM mapping*/ - mem_mapping_disable(&dev->ram_mapping); - break; - } - } + default: /*No ROM mapping*/ + mem_mapping_disable(&dev->ram_mapping); + break; + } + } - if (!(val & 0x80)) - threec503_interrupt(dev, 1); - else - threec503_interrupt(dev, 0); + if (!(val & 0x80)) + threec503_interrupt(dev, 1); + else + threec503_interrupt(dev, 0); - dev->regs.gacfr = val; - break; + dev->regs.gacfr = val; + break; - case 0x06: - if (val & 1) { - threec503_reset(dev); - dev->dp8390->ISR.reset = 1; - dev->regs.ctrl = 0x0b; - return; - } + case 0x06: + if (val & 1) { + threec503_reset(dev); + dev->dp8390->ISR.reset = 1; + dev->regs.ctrl = 0x0b; + return; + } - if ((val & 0x80) != (dev->regs.ctrl & 0x80)) { - if (val & 0x80) - dev->regs.streg |= 0x88; - else - dev->regs.streg &= ~0x88; - dev->regs.streg &= ~0x10; - } - dev->regs.ctrl = val; - break; + if ((val & 0x80) != (dev->regs.ctrl & 0x80)) { + if (val & 0x80) + dev->regs.streg |= 0x88; + else + dev->regs.streg &= ~0x88; + dev->regs.streg &= ~0x10; + } + dev->regs.ctrl = val; + break; - case 0x08: - switch (val & 0xf0) { - case 0x00: - case 0x10: - case 0x20: - case 0x40: - case 0x80: - dev->regs.idcfr = (dev->regs.idcfr & 0x0f) | (val & 0xf0); - break; + case 0x08: + switch (val & 0xf0) { + case 0x00: + case 0x10: + case 0x20: + case 0x40: + case 0x80: + dev->regs.idcfr = (dev->regs.idcfr & 0x0f) | (val & 0xf0); + break; - default: - threec503_log("Trying to set multiple IRQs: %02x\n", val); - break; - } + default: + threec503_log("Trying to set multiple IRQs: %02x\n", val); + break; + } - switch (val & 0x0f) { - case 0x00: - case 0x01: - case 0x02: - case 0x04: - dev->regs.idcfr = (dev->regs.idcfr & 0xf0) | (val & 0x0f); - break; + switch (val & 0x0f) { + case 0x00: + case 0x01: + case 0x02: + case 0x04: + dev->regs.idcfr = (dev->regs.idcfr & 0xf0) | (val & 0x0f); + break; - case 0x08: - break; + case 0x08: + break; - default: - threec503_log("Trying to set multiple DMA channels: %02x\n", val); - break; - } - break; + default: + threec503_log("Trying to set multiple DMA channels: %02x\n", val); + break; + } + break; - case 0x09: - dev->regs.da = (val << 8) | (dev->regs.da & 0xff); - break; + case 0x09: + dev->regs.da = (val << 8) | (dev->regs.da & 0xff); + break; - case 0x0a: - dev->regs.da = (dev->regs.da & 0xff00) | val; - break; + case 0x0a: + dev->regs.da = (dev->regs.da & 0xff00) | val; + break; - case 0x0b: - dev->regs.vptr = (val << 12) | (dev->regs.vptr & 0xfff); - break; + case 0x0b: + dev->regs.vptr = (val << 12) | (dev->regs.vptr & 0xfff); + break; - case 0x0c: - dev->regs.vptr = (val << 4) | (dev->regs.vptr & 0xff00f); - break; + case 0x0c: + dev->regs.vptr = (val << 4) | (dev->regs.vptr & 0xff00f); + break; - case 0x0d: - dev->regs.vptr = (val << 4) | (dev->regs.vptr & 0xffff0); - break; + case 0x0d: + dev->regs.vptr = (val << 4) | (dev->regs.vptr & 0xffff0); + break; - case 0x0e: - case 0x0f: - if (!(dev->regs.ctrl & 0x80)) - return; + case 0x0e: + case 0x0f: + if (!(dev->regs.ctrl & 0x80)) + return; - threec503_set_drq(dev); + threec503_set_drq(dev); - dp8390_chipmem_write(dev->dp8390, dev->regs.da++, val, 1); - break; + dp8390_chipmem_write(dev->dp8390, dev->regs.da++, val, 1); + break; } } - static void threec503_nic_ioset(threec503_t *dev, uint16_t addr) { io_sethandler(addr, 0x10, - threec503_nic_lo_read, NULL, NULL, - threec503_nic_lo_write, NULL, NULL, dev); + threec503_nic_lo_read, NULL, NULL, + threec503_nic_lo_write, NULL, NULL, dev); - io_sethandler(addr+0x400, 0x10, - threec503_nic_hi_read, NULL, NULL, - threec503_nic_hi_write, NULL, NULL, dev); + io_sethandler(addr + 0x400, 0x10, + threec503_nic_hi_read, NULL, NULL, + threec503_nic_hi_write, NULL, NULL, dev); } - static void * threec503_nic_init(const device_t *info) { - uint32_t mac; + uint32_t mac; threec503_t *dev; dev = malloc(sizeof(threec503_t)); memset(dev, 0x00, sizeof(threec503_t)); - dev->maclocal[0] = 0x02; /* 02:60:8C (3Com OID) */ + dev->maclocal[0] = 0x02; /* 02:60:8C (3Com OID) */ dev->maclocal[1] = 0x60; dev->maclocal[2] = 0x8C; dev->base_address = device_get_config_hex16("base"); - dev->base_irq = device_get_config_int("irq"); - dev->dma_channel = device_get_config_int("dma"); - dev->bios_addr = device_get_config_hex20("bios_addr"); + dev->base_irq = device_get_config_int("irq"); + dev->dma_channel = device_get_config_int("dma"); + dev->bios_addr = device_get_config_hex20("bios_addr"); /* See if we have a local MAC address configured. */ mac = device_get_config_mac("mac", -1); @@ -580,22 +569,22 @@ threec503_nic_init(const device_t *info) /* Set up our BIA. */ if (mac & 0xff000000) { - /* Generate new local MAC. */ - dev->maclocal[3] = random_generate(); - dev->maclocal[4] = random_generate(); - dev->maclocal[5] = random_generate(); - mac = (((int) dev->maclocal[3]) << 16); - mac |= (((int) dev->maclocal[4]) << 8); - mac |= ((int) dev->maclocal[5]); - device_set_config_mac("mac", mac); + /* Generate new local MAC. */ + dev->maclocal[3] = random_generate(); + dev->maclocal[4] = random_generate(); + dev->maclocal[5] = random_generate(); + mac = (((int) dev->maclocal[3]) << 16); + mac |= (((int) dev->maclocal[4]) << 8); + mac |= ((int) dev->maclocal[5]); + device_set_config_mac("mac", mac); } else { - dev->maclocal[3] = (mac>>16) & 0xff; - dev->maclocal[4] = (mac>>8) & 0xff; - dev->maclocal[5] = (mac & 0xff); + dev->maclocal[3] = (mac >> 16) & 0xff; + dev->maclocal[4] = (mac >> 8) & 0xff; + dev->maclocal[5] = (mac & 0xff); } - dev->dp8390 = device_add_inst(&dp8390_device, dp3890_inst++); - dev->dp8390->priv = dev; + dev->dp8390 = device_add_inst(&dp8390_device, dp3890_inst++); + dev->dp8390->priv = dev; dev->dp8390->interrupt = threec503_interrupt; dp8390_set_defaults(dev->dp8390, DP8390_FLAG_CHECK_CR | DP8390_FLAG_CLEAR_IRQ); dp8390_mem_alloc(dev->dp8390, 0x2000, 0x2000); @@ -603,32 +592,31 @@ threec503_nic_init(const device_t *info) memcpy(dev->dp8390->physaddr, dev->maclocal, sizeof(dev->maclocal)); threec503_log("I/O=%04x, IRQ=%d, MAC=%02x:%02x:%02x:%02x:%02x:%02x\n", - dev->base_address, dev->base_irq, - dev->dp8390->physaddr[0], dev->dp8390->physaddr[1], dev->dp8390->physaddr[2], - dev->dp8390->physaddr[3], dev->dp8390->physaddr[4], dev->dp8390->physaddr[5]); + dev->base_address, dev->base_irq, + dev->dp8390->physaddr[0], dev->dp8390->physaddr[1], dev->dp8390->physaddr[2], + dev->dp8390->physaddr[3], dev->dp8390->physaddr[4], dev->dp8390->physaddr[5]); /* Reset the board. */ threec503_reset(dev); /* Map this system into the memory map. */ mem_mapping_add(&dev->ram_mapping, dev->bios_addr, 0x4000, - threec503_ram_read, NULL, NULL, - threec503_ram_write, NULL, NULL, - NULL, MEM_MAPPING_EXTERNAL, dev); + threec503_ram_read, NULL, NULL, + threec503_ram_write, NULL, NULL, + NULL, MEM_MAPPING_EXTERNAL, dev); // mem_mapping_disable(&dev->ram_mapping); - dev->regs.gacfr = 0x09; /* Start with RAM mapping enabled. */ + dev->regs.gacfr = 0x09; /* Start with RAM mapping enabled. */ /* Attach ourselves to the network module. */ dev->dp8390->card = network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL); - return(dev); + return (dev); } - static void threec503_nic_close(void *priv) { - threec503_t *dev = (threec503_t *)priv; + threec503_t *dev = (threec503_t *) priv; #ifdef ENABLE_3COM503_LOG threec503_log("3Com503: closed\n"); @@ -638,7 +626,7 @@ threec503_nic_close(void *priv) } static const device_config_t threec503_config[] = { -// clang-format off + // clang-format off { .name = "base", .description = "Address", diff --git a/src/network/net_dp8390.c b/src/network/net_dp8390.c index ad4345ae6..bc8f79843 100644 --- a/src/network/net_dp8390.c +++ b/src/network/net_dp8390.c @@ -30,10 +30,9 @@ #include <86box/network.h> #include <86box/net_dp8390.h> - -static void dp8390_tx(dp8390_t *dev, uint32_t val); -static int dp8390_rx_common(void *priv, uint8_t *buf, int io_len); -int dp8390_rx(void *priv, uint8_t *buf, int io_len); +static void dp8390_tx(dp8390_t *dev, uint32_t val); +static int dp8390_rx_common(void *priv, uint8_t *buf, int io_len); +int dp8390_rx(void *priv, uint8_t *buf, int io_len); int dp3890_inst = 0; @@ -45,17 +44,16 @@ dp8390_log(const char *fmt, ...) { va_list ap; -// if (dp8390_do_log >= lvl) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); -// } + // if (dp8390_do_log >= lvl) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + // } } #else -#define dp8390_log(lvl, fmt, ...) +# define dp8390_log(lvl, fmt, ...) #endif - /* * Return the 6-bit index into the multicast * table. Stolen unashamedly from FreeBSD's if_ed.c @@ -65,25 +63,24 @@ mcast_index(const void *dst) { #define POLYNOMIAL 0x04c11db6 uint32_t crc = 0xffffffffL; - int carry, i, j; - uint8_t b; - uint8_t *ep = (uint8_t *)dst; + int carry, i, j; + uint8_t b; + uint8_t *ep = (uint8_t *) dst; - for (i=6; --i>=0;) { - b = *ep++; - for (j = 8; --j >= 0;) { - carry = ((crc & 0x80000000L) ? 1 : 0) ^ (b & 0x01); - crc <<= 1; - b >>= 1; - if (carry) - crc = ((crc ^ POLYNOMIAL) | carry); - } + for (i = 6; --i >= 0;) { + b = *ep++; + for (j = 8; --j >= 0;) { + carry = ((crc & 0x80000000L) ? 1 : 0) ^ (b & 0x01); + crc <<= 1; + b >>= 1; + if (carry) + crc = ((crc ^ POLYNOMIAL) | carry); + } } - return(crc >> 26); + return (crc >> 26); #undef POLYNOMIAL } - /* * Access the 32K private RAM. * @@ -96,33 +93,32 @@ mcast_index(const void *dst) uint32_t dp8390_chipmem_read(dp8390_t *dev, uint32_t addr, unsigned int len) { - int i; + int i; uint32_t retval = 0; #ifdef ENABLE_DP8390_LOG if ((len > 1) && (addr & (len - 1))) - dp8390_log("DP8390: unaligned chipmem word read\n"); + dp8390_log("DP8390: unaligned chipmem word read\n"); #endif dp8390_log("DP8390: Chipmem Read Address=%04x\n", addr); /* ROM'd MAC address */ for (i = 0; i < len; i++) { - if ((addr >= dev->mem_start) && (addr < dev->mem_end)) - retval |= (uint32_t) (dev->mem[addr - dev->mem_start]) << (i << 3); - else if (addr < dev->macaddr_size) - retval |= ((uint32_t) dev->macaddr[addr & (dev->macaddr_size - 1)]) << (i << 3); - else { - dp8390_log("DP8390: out-of-bounds chipmem read, %04X\n", addr); - retval |= 0xff << (i << 3); - } - addr++; + if ((addr >= dev->mem_start) && (addr < dev->mem_end)) + retval |= (uint32_t) (dev->mem[addr - dev->mem_start]) << (i << 3); + else if (addr < dev->macaddr_size) + retval |= ((uint32_t) dev->macaddr[addr & (dev->macaddr_size - 1)]) << (i << 3); + else { + dp8390_log("DP8390: out-of-bounds chipmem read, %04X\n", addr); + retval |= 0xff << (i << 3); + } + addr++; } - return(retval); + return (retval); } - void dp8390_chipmem_write(dp8390_t *dev, uint32_t addr, uint32_t val, unsigned len) { @@ -130,41 +126,35 @@ dp8390_chipmem_write(dp8390_t *dev, uint32_t addr, uint32_t val, unsigned len) #ifdef ENABLE_DP8390_LOG if ((len > 1) && (addr & (len - 1))) - dp8390_log("DP8390: unaligned chipmem word write\n"); + dp8390_log("DP8390: unaligned chipmem word write\n"); #endif dp8390_log("DP8390: Chipmem Write Address=%04x\n", addr); for (i = 0; i < len; i++) { - if ((addr < dev->mem_start) || (addr >= dev->mem_end)) { - dp8390_log("DP8390: out-of-bounds chipmem write, %04X\n", addr); - return; - } + if ((addr < dev->mem_start) || (addr >= dev->mem_end)) { + dp8390_log("DP8390: out-of-bounds chipmem write, %04X\n", addr); + return; + } - dev->mem[addr - dev->mem_start] = val & 0xff; - val >>= 8; - addr++; + dev->mem[addr - dev->mem_start] = val & 0xff; + val >>= 8; + addr++; } } - /* Routines for handling reads/writes to the Command Register. */ uint32_t dp8390_read_cr(dp8390_t *dev) { uint32_t retval; - retval = (((dev->CR.pgsel & 0x03) << 6) | - ((dev->CR.rdma_cmd & 0x07) << 3) | - (dev->CR.tx_packet << 2) | - (dev->CR.start << 1) | - (dev->CR.stop)); + retval = (((dev->CR.pgsel & 0x03) << 6) | ((dev->CR.rdma_cmd & 0x07) << 3) | (dev->CR.tx_packet << 2) | (dev->CR.start << 1) | (dev->CR.stop)); dp8390_log("DP8390: read CR returns 0x%02x\n", retval); - return(retval); + return (retval); } - void dp8390_write_cr(dp8390_t *dev, uint32_t val) { @@ -173,17 +163,17 @@ dp8390_write_cr(dp8390_t *dev, uint32_t val) /* Validate remote-DMA */ if ((val & 0x38) == 0x00) { #ifdef ENABLE_DP8390_LOG - dp8390_log("DP8390: CR write - invalid rDMA value 0\n"); + dp8390_log("DP8390: CR write - invalid rDMA value 0\n"); #endif - val |= 0x20; /* dma_cmd == 4 is a safe default */ + val |= 0x20; /* dma_cmd == 4 is a safe default */ } /* Check for s/w reset */ if (val & 0x01) { - dev->ISR.reset = 1; - dev->CR.stop = 1; + dev->ISR.reset = 1; + dev->CR.stop = 1; } else { - dev->CR.stop = 0; + dev->CR.stop = 0; } dev->CR.rdma_cmd = (val & 0x38) >> 3; @@ -191,85 +181,82 @@ dp8390_write_cr(dp8390_t *dev, uint32_t val) /* If start command issued, the RST bit in the ISR */ /* must be cleared */ if ((val & 0x02) && !dev->CR.start) - dev->ISR.reset = 0; + dev->ISR.reset = 0; dev->CR.start = ((val & 0x02) == 0x02); dev->CR.pgsel = (val & 0xc0) >> 6; /* Check for send-packet command */ if (dev->CR.rdma_cmd == 3) { - /* Set up DMA read from receive ring */ - dev->remote_start = dev->remote_dma = dev->bound_ptr * 256; - dev->remote_bytes = (uint16_t) dp8390_chipmem_read(dev, dev->bound_ptr * 256 + 2, 2); - dp8390_log("DP8390: sending buffer #x%x length %d\n", - dev->remote_start, dev->remote_bytes); + /* Set up DMA read from receive ring */ + dev->remote_start = dev->remote_dma = dev->bound_ptr * 256; + dev->remote_bytes = (uint16_t) dp8390_chipmem_read(dev, dev->bound_ptr * 256 + 2, 2); + dp8390_log("DP8390: sending buffer #x%x length %d\n", + dev->remote_start, dev->remote_bytes); } /* Check for start-tx */ if ((val & 0x04) && dev->TCR.loop_cntl) { - if (dev->TCR.loop_cntl) { - dp8390_rx_common(dev, &dev->mem[(dev->tx_page_start * 256) - dev->mem_start], - dev->tx_bytes); - } + if (dev->TCR.loop_cntl) { + dp8390_rx_common(dev, &dev->mem[(dev->tx_page_start * 256) - dev->mem_start], + dev->tx_bytes); + } } else if (val & 0x04) { - if (dev->CR.stop || (!dev->CR.start && (dev->flags & DP8390_FLAG_CHECK_CR))) { - if (dev->tx_bytes == 0) /* njh@bandsman.co.uk */ - return; /* Solaris9 probe */ + if (dev->CR.stop || (!dev->CR.start && (dev->flags & DP8390_FLAG_CHECK_CR))) { + if (dev->tx_bytes == 0) /* njh@bandsman.co.uk */ + return; /* Solaris9 probe */ #ifdef ENABLE_DP8390_LOG - dp8390_log("DP8390: CR write - tx start, dev in reset\n"); + dp8390_log("DP8390: CR write - tx start, dev in reset\n"); #endif - } + } #ifdef ENABLE_DP8390_LOG - if (dev->tx_bytes == 0) - dp8390_log("DP8390: CR write - tx start, tx bytes == 0\n"); + if (dev->tx_bytes == 0) + dp8390_log("DP8390: CR write - tx start, tx bytes == 0\n"); #endif - /* Send the packet to the system driver */ - dev->CR.tx_packet = 1; + /* Send the packet to the system driver */ + dev->CR.tx_packet = 1; - /* TODO: report TX error to the driver ? */ - if (!(dev->card->link_state & NET_LINK_DOWN)) - network_tx(dev->card, &dev->mem[(dev->tx_page_start * 256) - dev->mem_start], dev->tx_bytes); + /* TODO: report TX error to the driver ? */ + if (!(dev->card->link_state & NET_LINK_DOWN)) + network_tx(dev->card, &dev->mem[(dev->tx_page_start * 256) - dev->mem_start], dev->tx_bytes); - /* some more debug */ + /* some more debug */ #ifdef ENABLE_DP8390_LOG - if (dev->tx_timer_active) - dp8390_log("DP8390: CR write, tx timer still active\n"); + if (dev->tx_timer_active) + dp8390_log("DP8390: CR write, tx timer still active\n"); #endif - dp8390_tx(dev, val); + dp8390_tx(dev, val); } /* Linux probes for an interrupt by setting up a remote-DMA read * of 0 bytes with remote-DMA completion interrupts enabled. * Detect this here */ - if ((dev->CR.rdma_cmd == 0x01) && dev->CR.start && - (dev->remote_bytes == 0)) { - dev->ISR.rdma_done = 1; - if (dev->IMR.rdma_inte && dev->interrupt) { - dev->interrupt(dev->priv, 1); - if (dev->flags & DP8390_FLAG_CLEAR_IRQ) - dev->interrupt(dev->priv, 0); - } + if ((dev->CR.rdma_cmd == 0x01) && dev->CR.start && (dev->remote_bytes == 0)) { + dev->ISR.rdma_done = 1; + if (dev->IMR.rdma_inte && dev->interrupt) { + dev->interrupt(dev->priv, 1); + if (dev->flags & DP8390_FLAG_CLEAR_IRQ) + dev->interrupt(dev->priv, 0); + } } } - static void dp8390_tx(dp8390_t *dev, uint32_t val) { dev->CR.tx_packet = 0; - dev->TSR.tx_ok = 1; - dev->ISR.pkt_tx = 1; + dev->TSR.tx_ok = 1; + dev->ISR.pkt_tx = 1; /* Generate an interrupt if not masked */ if (dev->IMR.tx_inte && dev->interrupt) - dev->interrupt(dev->priv, 1); + dev->interrupt(dev->priv, 1); dev->tx_timer_active = 0; } - /* * Called by the platform-specific code when an Ethernet frame * has been received. The destination address is tested to see @@ -279,32 +266,31 @@ dp8390_tx(dp8390_t *dev, uint32_t val) static int dp8390_rx_common(void *priv, uint8_t *buf, int io_len) { - dp8390_t *dev = (dp8390_t *)priv; - static uint8_t bcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff}; - uint8_t pkthdr[4]; - uint8_t *startptr; - int pages, avail; - int idx, nextpage; - int endbytes; + dp8390_t *dev = (dp8390_t *) priv; + static uint8_t bcast_addr[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; + uint8_t pkthdr[4]; + uint8_t *startptr; + int pages, avail; + int idx, nextpage; + int endbytes; if (io_len != 60) - dp8390_log("rx_frame with length %d\n", io_len); + dp8390_log("rx_frame with length %d\n", io_len); if ((dev->CR.stop != 0) || (dev->page_start == 0)) - return 0; + return 0; if (dev->card->link_state & NET_LINK_DOWN) - return 0; + return 0; /* * Add the pkt header + CRC to the length, and work * out how many 256-byte pages the frame would occupy. */ - pages = (io_len + sizeof(pkthdr) + sizeof(uint32_t) + 255)/256; + pages = (io_len + sizeof(pkthdr) + sizeof(uint32_t) + 255) / 256; if (dev->curr_page < dev->bound_ptr) { - avail = dev->bound_ptr - dev->curr_page; + avail = dev->bound_ptr - dev->curr_page; } else { - avail = (dev->page_stop - dev->page_start) - - (dev->curr_page - dev->bound_ptr); + avail = (dev->page_stop - dev->page_start) - (dev->curr_page - dev->bound_ptr); } /* @@ -312,128 +298,125 @@ dp8390_rx_common(void *priv, uint8_t *buf, int io_len) * not attempting to do partial receives. The emulation * to handle this condition seems particularly painful. */ - if ((avail < pages) + if ((avail < pages) #if DP8390_NEVER_FULL_RING - || (avail == pages) + || (avail == pages) #endif - ) { + ) { #ifdef ENABLE_DP8390_LOG - dp8390_log("DP8390: no space\n"); + dp8390_log("DP8390: no space\n"); #endif - return 0; + return 0; } - if ((io_len < 40/*60*/) && !dev->RCR.runts_ok) { + if ((io_len < 40 /*60*/) && !dev->RCR.runts_ok) { #ifdef ENABLE_DP8390_LOG - dp8390_log("DP8390: rejected small packet, length %d\n", io_len); + dp8390_log("DP8390: rejected small packet, length %d\n", io_len); #endif - return 1; + return 1; } /* Some computers don't care... */ if (io_len < 60) - io_len = 60; + io_len = 60; dp8390_log("DP8390: RX %x:%x:%x:%x:%x:%x > %x:%x:%x:%x:%x:%x len %d\n", - buf[6], buf[7], buf[8], buf[9], buf[10], buf[11], - buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], - io_len); + buf[6], buf[7], buf[8], buf[9], buf[10], buf[11], + buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], + io_len); /* Do address filtering if not in promiscuous mode. */ - if (! dev->RCR.promisc) { - /* If this is a broadcast frame.. */ - if (! memcmp(buf, bcast_addr, 6)) { - /* Broadcast not enabled, we're done. */ - if (! dev->RCR.broadcast) { + if (!dev->RCR.promisc) { + /* If this is a broadcast frame.. */ + if (!memcmp(buf, bcast_addr, 6)) { + /* Broadcast not enabled, we're done. */ + if (!dev->RCR.broadcast) { #ifdef ENABLE_DP8390_LOG - dp8390_log("DP8390: RX BC disabled\n"); + dp8390_log("DP8390: RX BC disabled\n"); #endif - return 1; - } - } + return 1; + } + } - /* If this is a multicast frame.. */ - else if (buf[0] & 0x01) { - /* Multicast not enabled, we're done. */ - if (! dev->RCR.multicast) { + /* If this is a multicast frame.. */ + else if (buf[0] & 0x01) { + /* Multicast not enabled, we're done. */ + if (!dev->RCR.multicast) { #ifdef ENABLE_DP8390_LOG - dp8390_log("DP8390: RX MC disabled\n"); + dp8390_log("DP8390: RX MC disabled\n"); #endif - return 1; - } + return 1; + } - /* Are we listening to this multicast address? */ - idx = mcast_index(buf); - if (! (dev->mchash[idx>>3] & (1<<(idx&0x7)))) { + /* Are we listening to this multicast address? */ + idx = mcast_index(buf); + if (!(dev->mchash[idx >> 3] & (1 << (idx & 0x7)))) { #ifdef ENABLE_DP8390_LOG - dp8390_log("DP8390: RX MC not listed\n"); + dp8390_log("DP8390: RX MC not listed\n"); #endif - return 1; - } - } + return 1; + } + } - /* Unicast, must be for us.. */ - else if (memcmp(buf, dev->physaddr, 6)) - return 1; + /* Unicast, must be for us.. */ + else if (memcmp(buf, dev->physaddr, 6)) + return 1; } else { #ifdef ENABLE_DP8390_LOG - dp8390_log("DP8390: RX promiscuous receive\n"); + dp8390_log("DP8390: RX promiscuous receive\n"); #endif } nextpage = dev->curr_page + pages; if (nextpage >= dev->page_stop) - nextpage -= (dev->page_stop - dev->page_start); + nextpage -= (dev->page_stop - dev->page_start); /* Set up packet header. */ - pkthdr[0] = 0x01; /* RXOK - packet is OK */ + pkthdr[0] = 0x01; /* RXOK - packet is OK */ if (buf[0] & 0x01) - pkthdr[0] |= 0x20; /* MULTICAST packet */ - pkthdr[1] = nextpage; /* ptr to next packet */ - pkthdr[2] = (io_len + sizeof(pkthdr))&0xff; /* length-low */ - pkthdr[3] = (io_len + sizeof(pkthdr))>>8; /* length-hi */ + pkthdr[0] |= 0x20; /* MULTICAST packet */ + pkthdr[1] = nextpage; /* ptr to next packet */ + pkthdr[2] = (io_len + sizeof(pkthdr)) & 0xff; /* length-low */ + pkthdr[3] = (io_len + sizeof(pkthdr)) >> 8; /* length-hi */ dp8390_log("DP8390: RX pkthdr [%02x %02x %02x %02x]\n", - pkthdr[0], pkthdr[1], pkthdr[2], pkthdr[3]); + pkthdr[0], pkthdr[1], pkthdr[2], pkthdr[3]); /* Copy into buffer, update curpage, and signal interrupt if config'd */ startptr = &dev->mem[(dev->curr_page * 256) - dev->mem_start]; memcpy(startptr, pkthdr, sizeof(pkthdr)); - if ((nextpage > dev->curr_page) || - ((dev->curr_page + pages) == dev->page_stop)) { - memcpy(startptr+sizeof(pkthdr), buf, io_len); + if ((nextpage > dev->curr_page) || ((dev->curr_page + pages) == dev->page_stop)) { + memcpy(startptr + sizeof(pkthdr), buf, io_len); } else { - endbytes = (dev->page_stop - dev->curr_page) * 256; - memcpy(startptr+sizeof(pkthdr), buf, endbytes-sizeof(pkthdr)); - startptr = &dev->mem[(dev->page_start * 256) - dev->mem_start]; - memcpy(startptr, buf+endbytes-sizeof(pkthdr), io_len-endbytes+8); + endbytes = (dev->page_stop - dev->curr_page) * 256; + memcpy(startptr + sizeof(pkthdr), buf, endbytes - sizeof(pkthdr)); + startptr = &dev->mem[(dev->page_start * 256) - dev->mem_start]; + memcpy(startptr, buf + endbytes - sizeof(pkthdr), io_len - endbytes + 8); } dev->curr_page = nextpage; - dev->RSR.rx_ok = 1; + dev->RSR.rx_ok = 1; dev->RSR.rx_mbit = (buf[0] & 0x01) ? 1 : 0; - dev->ISR.pkt_rx = 1; + dev->ISR.pkt_rx = 1; if (dev->IMR.rx_inte && dev->interrupt) - dev->interrupt(dev->priv, 1); + dev->interrupt(dev->priv, 1); return 1; } - int dp8390_rx(void *priv, uint8_t *buf, int io_len) { - dp8390_t *dev = (dp8390_t *)priv; + dp8390_t *dev = (dp8390_t *) priv; if ((dev->DCR.loop == 0) || (dev->TCR.loop_cntl != 0)) - return 0; + return 0; - return dp8390_rx_common(priv, buf, io_len); + return dp8390_rx_common(priv, buf, io_len); } - /* Handle reads/writes to the 'zeroth' page of the DS8390 register file. */ uint32_t dp8390_page0_read(dp8390_t *dev, uint32_t off, unsigned int len) @@ -441,547 +424,484 @@ dp8390_page0_read(dp8390_t *dev, uint32_t off, unsigned int len) uint8_t retval = 0; if (len > 1) { - /* encountered with win98 hardware probe */ - dp8390_log("DP8390: bad length! Page0 read from register 0x%02x, len=%u\n", - off, len); - return(retval); + /* encountered with win98 hardware probe */ + dp8390_log("DP8390: bad length! Page0 read from register 0x%02x, len=%u\n", + off, len); + return (retval); } - switch(off) { - case 0x01: /* CLDA0 */ - retval = (dev->local_dma & 0xff); - break; + switch (off) { + case 0x01: /* CLDA0 */ + retval = (dev->local_dma & 0xff); + break; - case 0x02: /* CLDA1 */ - retval = (dev->local_dma >> 8); - break; + case 0x02: /* CLDA1 */ + retval = (dev->local_dma >> 8); + break; - case 0x03: /* BNRY */ - retval = dev->bound_ptr; - break; + case 0x03: /* BNRY */ + retval = dev->bound_ptr; + break; - case 0x04: /* TSR */ - retval = ((dev->TSR.ow_coll << 7) | - (dev->TSR.cd_hbeat << 6) | - (dev->TSR.fifo_ur << 5) | - (dev->TSR.no_carrier << 4) | - (dev->TSR.aborted << 3) | - (dev->TSR.collided << 2) | - (dev->TSR.tx_ok)); - break; + case 0x04: /* TSR */ + retval = ((dev->TSR.ow_coll << 7) | (dev->TSR.cd_hbeat << 6) | (dev->TSR.fifo_ur << 5) | (dev->TSR.no_carrier << 4) | (dev->TSR.aborted << 3) | (dev->TSR.collided << 2) | (dev->TSR.tx_ok)); + break; - case 0x05: /* NCR */ - retval = dev->num_coll; - break; + case 0x05: /* NCR */ + retval = dev->num_coll; + break; - case 0x06: /* FIFO */ - /* reading FIFO is only valid in loopback mode */ + case 0x06: /* FIFO */ + /* reading FIFO is only valid in loopback mode */ #ifdef ENABLE_DP8390_LOG - dp8390_log("DP8390: reading FIFO not supported yet\n"); + dp8390_log("DP8390: reading FIFO not supported yet\n"); #endif - retval = dev->fifo; - break; + retval = dev->fifo; + break; - case 0x07: /* ISR */ - retval = ((dev->ISR.reset << 7) | - (dev->ISR.rdma_done << 6) | - (dev->ISR.cnt_oflow << 5) | - (dev->ISR.overwrite << 4) | - (dev->ISR.tx_err << 3) | - (dev->ISR.rx_err << 2) | - (dev->ISR.pkt_tx << 1) | - (dev->ISR.pkt_rx)); - break; + case 0x07: /* ISR */ + retval = ((dev->ISR.reset << 7) | (dev->ISR.rdma_done << 6) | (dev->ISR.cnt_oflow << 5) | (dev->ISR.overwrite << 4) | (dev->ISR.tx_err << 3) | (dev->ISR.rx_err << 2) | (dev->ISR.pkt_tx << 1) | (dev->ISR.pkt_rx)); + break; - case 0x08: /* CRDA0 */ - retval = (dev->remote_dma & 0xff); - break; + case 0x08: /* CRDA0 */ + retval = (dev->remote_dma & 0xff); + break; - case 0x09: /* CRDA1 */ - retval = (dev->remote_dma >> 8); - break; + case 0x09: /* CRDA1 */ + retval = (dev->remote_dma >> 8); + break; - case 0x0a: /* reserved / RTL8029ID0 */ - retval = dev->id0; - break; + case 0x0a: /* reserved / RTL8029ID0 */ + retval = dev->id0; + break; - case 0x0b: /* reserved / RTL8029ID1 */ - retval = dev->id1; - break; + case 0x0b: /* reserved / RTL8029ID1 */ + retval = dev->id1; + break; - case 0x0c: /* RSR */ - retval = ((dev->RSR.deferred << 7) | - (dev->RSR.rx_disabled << 6) | - (dev->RSR.rx_mbit << 5) | - (dev->RSR.rx_missed << 4) | - (dev->RSR.fifo_or << 3) | - (dev->RSR.bad_falign << 2) | - (dev->RSR.bad_crc << 1) | - (dev->RSR.rx_ok)); - break; + case 0x0c: /* RSR */ + retval = ((dev->RSR.deferred << 7) | (dev->RSR.rx_disabled << 6) | (dev->RSR.rx_mbit << 5) | (dev->RSR.rx_missed << 4) | (dev->RSR.fifo_or << 3) | (dev->RSR.bad_falign << 2) | (dev->RSR.bad_crc << 1) | (dev->RSR.rx_ok)); + break; - case 0x0d: /* CNTR0 */ - retval = dev->tallycnt_0; - break; + case 0x0d: /* CNTR0 */ + retval = dev->tallycnt_0; + break; - case 0x0e: /* CNTR1 */ - retval = dev->tallycnt_1; - break; + case 0x0e: /* CNTR1 */ + retval = dev->tallycnt_1; + break; - case 0x0f: /* CNTR2 */ - retval = dev->tallycnt_2; - break; + case 0x0f: /* CNTR2 */ + retval = dev->tallycnt_2; + break; - default: - dp8390_log("DP8390: Page0 register 0x%02x out of range\n", off); - break; + default: + dp8390_log("DP8390: Page0 register 0x%02x out of range\n", off); + break; } dp8390_log("DP8390: Page0 read from register 0x%02x, value=0x%02x\n", off, - retval); + retval); - return(retval); + return (retval); } - void dp8390_page0_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len) { uint8_t val2; dp8390_log("DP839: Page0 write to register 0x%02x, value=0x%02x\n", - off, val); + off, val); - switch(off) { - case 0x01: /* PSTART */ - dev->page_start = val; - dp8390_log("DP8390: Starting RAM address: %04X\n", val << 8); - break; + switch (off) { + case 0x01: /* PSTART */ + dev->page_start = val; + dp8390_log("DP8390: Starting RAM address: %04X\n", val << 8); + break; - case 0x02: /* PSTOP */ - dev->page_stop = val; - dp8390_log("DP8390: Stopping RAM address: %04X\n", val << 8); - break; + case 0x02: /* PSTOP */ + dev->page_stop = val; + dp8390_log("DP8390: Stopping RAM address: %04X\n", val << 8); + break; - case 0x03: /* BNRY */ - dev->bound_ptr = val; - break; + case 0x03: /* BNRY */ + dev->bound_ptr = val; + break; - case 0x04: /* TPSR */ - dev->tx_page_start = val; - break; + case 0x04: /* TPSR */ + dev->tx_page_start = val; + break; - case 0x05: /* TBCR0 */ - /* Clear out low byte and re-insert */ - dev->tx_bytes &= 0xff00; - dev->tx_bytes |= (val & 0xff); - break; + case 0x05: /* TBCR0 */ + /* Clear out low byte and re-insert */ + dev->tx_bytes &= 0xff00; + dev->tx_bytes |= (val & 0xff); + break; - case 0x06: /* TBCR1 */ - /* Clear out high byte and re-insert */ - dev->tx_bytes &= 0x00ff; - dev->tx_bytes |= ((val & 0xff) << 8); - break; + case 0x06: /* TBCR1 */ + /* Clear out high byte and re-insert */ + dev->tx_bytes &= 0x00ff; + dev->tx_bytes |= ((val & 0xff) << 8); + break; - case 0x07: /* ISR */ - val &= 0x7f; /* clear RST bit - status-only bit */ - /* All other values are cleared iff the ISR bit is 1 */ - dev->ISR.pkt_rx &= !((int)((val & 0x01) == 0x01)); - dev->ISR.pkt_tx &= !((int)((val & 0x02) == 0x02)); - dev->ISR.rx_err &= !((int)((val & 0x04) == 0x04)); - dev->ISR.tx_err &= !((int)((val & 0x08) == 0x08)); - dev->ISR.overwrite &= !((int)((val & 0x10) == 0x10)); - dev->ISR.cnt_oflow &= !((int)((val & 0x20) == 0x20)); - dev->ISR.rdma_done &= !((int)((val & 0x40) == 0x40)); - val = ((dev->ISR.rdma_done << 6) | - (dev->ISR.cnt_oflow << 5) | - (dev->ISR.overwrite << 4) | - (dev->ISR.tx_err << 3) | - (dev->ISR.rx_err << 2) | - (dev->ISR.pkt_tx << 1) | - (dev->ISR.pkt_rx)); - val &= ((dev->IMR.rdma_inte << 6) | - (dev->IMR.cofl_inte << 5) | - (dev->IMR.overw_inte << 4) | - (dev->IMR.txerr_inte << 3) | - (dev->IMR.rxerr_inte << 2) | - (dev->IMR.tx_inte << 1) | - (dev->IMR.rx_inte)); - if ((val == 0x00) && dev->interrupt) - dev->interrupt(dev->priv, 0); - break; + case 0x07: /* ISR */ + val &= 0x7f; /* clear RST bit - status-only bit */ + /* All other values are cleared iff the ISR bit is 1 */ + dev->ISR.pkt_rx &= !((int) ((val & 0x01) == 0x01)); + dev->ISR.pkt_tx &= !((int) ((val & 0x02) == 0x02)); + dev->ISR.rx_err &= !((int) ((val & 0x04) == 0x04)); + dev->ISR.tx_err &= !((int) ((val & 0x08) == 0x08)); + dev->ISR.overwrite &= !((int) ((val & 0x10) == 0x10)); + dev->ISR.cnt_oflow &= !((int) ((val & 0x20) == 0x20)); + dev->ISR.rdma_done &= !((int) ((val & 0x40) == 0x40)); + val = ((dev->ISR.rdma_done << 6) | (dev->ISR.cnt_oflow << 5) | (dev->ISR.overwrite << 4) | (dev->ISR.tx_err << 3) | (dev->ISR.rx_err << 2) | (dev->ISR.pkt_tx << 1) | (dev->ISR.pkt_rx)); + val &= ((dev->IMR.rdma_inte << 6) | (dev->IMR.cofl_inte << 5) | (dev->IMR.overw_inte << 4) | (dev->IMR.txerr_inte << 3) | (dev->IMR.rxerr_inte << 2) | (dev->IMR.tx_inte << 1) | (dev->IMR.rx_inte)); + if ((val == 0x00) && dev->interrupt) + dev->interrupt(dev->priv, 0); + break; - case 0x08: /* RSAR0 */ - /* Clear out low byte and re-insert */ - dev->remote_start &= 0xff00; - dev->remote_start |= (val & 0xff); - dev->remote_dma = dev->remote_start; - break; + case 0x08: /* RSAR0 */ + /* Clear out low byte and re-insert */ + dev->remote_start &= 0xff00; + dev->remote_start |= (val & 0xff); + dev->remote_dma = dev->remote_start; + break; - case 0x09: /* RSAR1 */ - /* Clear out high byte and re-insert */ - dev->remote_start &= 0x00ff; - dev->remote_start |= ((val & 0xff) << 8); - dev->remote_dma = dev->remote_start; - break; + case 0x09: /* RSAR1 */ + /* Clear out high byte and re-insert */ + dev->remote_start &= 0x00ff; + dev->remote_start |= ((val & 0xff) << 8); + dev->remote_dma = dev->remote_start; + break; - case 0x0a: /* RBCR0 */ - /* Clear out low byte and re-insert */ - dev->remote_bytes &= 0xff00; - dev->remote_bytes |= (val & 0xff); - break; + case 0x0a: /* RBCR0 */ + /* Clear out low byte and re-insert */ + dev->remote_bytes &= 0xff00; + dev->remote_bytes |= (val & 0xff); + break; - case 0x0b: /* RBCR1 */ - /* Clear out high byte and re-insert */ - dev->remote_bytes &= 0x00ff; - dev->remote_bytes |= ((val & 0xff) << 8); - break; + case 0x0b: /* RBCR1 */ + /* Clear out high byte and re-insert */ + dev->remote_bytes &= 0x00ff; + dev->remote_bytes |= ((val & 0xff) << 8); + break; - case 0x0c: /* RCR */ - /* Check if the reserved bits are set */ + case 0x0c: /* RCR */ + /* Check if the reserved bits are set */ #ifdef ENABLE_DP8390_LOG - if (val & 0xc0) - dp8390_log("DP8390: RCR write, reserved bits set\n"); + if (val & 0xc0) + dp8390_log("DP8390: RCR write, reserved bits set\n"); #endif - /* Set all other bit-fields */ - dev->RCR.errors_ok = ((val & 0x01) == 0x01); - dev->RCR.runts_ok = ((val & 0x02) == 0x02); - dev->RCR.broadcast = ((val & 0x04) == 0x04); - dev->RCR.multicast = ((val & 0x08) == 0x08); - dev->RCR.promisc = ((val & 0x10) == 0x10); - dev->RCR.monitor = ((val & 0x20) == 0x20); + /* Set all other bit-fields */ + dev->RCR.errors_ok = ((val & 0x01) == 0x01); + dev->RCR.runts_ok = ((val & 0x02) == 0x02); + dev->RCR.broadcast = ((val & 0x04) == 0x04); + dev->RCR.multicast = ((val & 0x08) == 0x08); + dev->RCR.promisc = ((val & 0x10) == 0x10); + dev->RCR.monitor = ((val & 0x20) == 0x20); - /* Monitor bit is a little suspicious... */ + /* Monitor bit is a little suspicious... */ #ifdef ENABLE_DP8390_LOG - if (val & 0x20) - dp8390_log("DP8390: RCR write, monitor bit set!\n"); + if (val & 0x20) + dp8390_log("DP8390: RCR write, monitor bit set!\n"); #endif - break; + break; - case 0x0d: /* TCR */ - /* Check reserved bits */ + case 0x0d: /* TCR */ + /* Check reserved bits */ #ifdef ENABLE_DP8390_LOG - if (val & 0xe0) - dp8390_log("DP8390: TCR write, reserved bits set\n"); + if (val & 0xe0) + dp8390_log("DP8390: TCR write, reserved bits set\n"); #endif - /* Test loop mode (not supported) */ - if (val & 0x06) { - dev->TCR.loop_cntl = (val & 0x6) >> 1; - dp8390_log("DP8390: TCR write, loop mode %d not supported\n", - dev->TCR.loop_cntl); - } else - dev->TCR.loop_cntl = 0; + /* Test loop mode (not supported) */ + if (val & 0x06) { + dev->TCR.loop_cntl = (val & 0x6) >> 1; + dp8390_log("DP8390: TCR write, loop mode %d not supported\n", + dev->TCR.loop_cntl); + } else + dev->TCR.loop_cntl = 0; - /* Inhibit-CRC not supported. */ + /* Inhibit-CRC not supported. */ #ifdef ENABLE_DP8390_LOG - if (val & 0x01) - dp8390_log("DP8390: TCR write, inhibit-CRC not supported\n"); + if (val & 0x01) + dp8390_log("DP8390: TCR write, inhibit-CRC not supported\n"); #endif - /* Auto-transmit disable very suspicious */ + /* Auto-transmit disable very suspicious */ #ifdef ENABLE_DP8390_LOG - if (val & 0x08) - dp8390_log("DP8390: TCR write, auto transmit disable not supported\n"); + if (val & 0x08) + dp8390_log("DP8390: TCR write, auto transmit disable not supported\n"); #endif - /* Allow collision-offset to be set, although not used */ - dev->TCR.coll_prio = ((val & 0x08) == 0x08); - break; + /* Allow collision-offset to be set, although not used */ + dev->TCR.coll_prio = ((val & 0x08) == 0x08); + break; - case 0x0e: /* DCR */ - /* the loopback mode is not suppported yet */ + case 0x0e: /* DCR */ + /* the loopback mode is not suppported yet */ #ifdef ENABLE_DP8390_LOG - if (! (val & 0x08)) - dp8390_log("DP8390: DCR write, loopback mode selected\n"); + if (!(val & 0x08)) + dp8390_log("DP8390: DCR write, loopback mode selected\n"); #endif - /* It is questionable to set longaddr and auto_rx, since - * they are not supported on the NE2000. Print a warning - * and continue. */ + /* It is questionable to set longaddr and auto_rx, since + * they are not supported on the NE2000. Print a warning + * and continue. */ #ifdef ENABLE_DP8390_LOG - if (val & 0x04) - dp8390_log("DP8390: DCR write - LAS set ???\n"); - if (val & 0x10) - dp8390_log("DP8390: DCR write - AR set ???\n"); + if (val & 0x04) + dp8390_log("DP8390: DCR write - LAS set ???\n"); + if (val & 0x10) + dp8390_log("DP8390: DCR write - AR set ???\n"); #endif - /* Set other values. */ - dev->DCR.wdsize = ((val & 0x01) == 0x01); - dev->DCR.endian = ((val & 0x02) == 0x02); - dev->DCR.longaddr = ((val & 0x04) == 0x04); /* illegal ? */ - dev->DCR.loop = ((val & 0x08) == 0x08); - dev->DCR.auto_rx = ((val & 0x10) == 0x10); /* also illegal ? */ - dev->DCR.fifo_size = (val & 0x60) >> 5; - break; + /* Set other values. */ + dev->DCR.wdsize = ((val & 0x01) == 0x01); + dev->DCR.endian = ((val & 0x02) == 0x02); + dev->DCR.longaddr = ((val & 0x04) == 0x04); /* illegal ? */ + dev->DCR.loop = ((val & 0x08) == 0x08); + dev->DCR.auto_rx = ((val & 0x10) == 0x10); /* also illegal ? */ + dev->DCR.fifo_size = (val & 0x60) >> 5; + break; - case 0x0f: /* IMR */ - /* Check for reserved bit */ + case 0x0f: /* IMR */ + /* Check for reserved bit */ #ifdef ENABLE_DP8390_LOG - if (val & 0x80) - dp8390_log("DP8390: IMR write, reserved bit set\n"); + if (val & 0x80) + dp8390_log("DP8390: IMR write, reserved bit set\n"); #endif - /* Set other values */ - dev->IMR.rx_inte = ((val & 0x01) == 0x01); - dev->IMR.tx_inte = ((val & 0x02) == 0x02); - dev->IMR.rxerr_inte = ((val & 0x04) == 0x04); - dev->IMR.txerr_inte = ((val & 0x08) == 0x08); - dev->IMR.overw_inte = ((val & 0x10) == 0x10); - dev->IMR.cofl_inte = ((val & 0x20) == 0x20); - dev->IMR.rdma_inte = ((val & 0x40) == 0x40); - val2 = ((dev->ISR.rdma_done << 6) | - (dev->ISR.cnt_oflow << 5) | - (dev->ISR.overwrite << 4) | - (dev->ISR.tx_err << 3) | - (dev->ISR.rx_err << 2) | - (dev->ISR.pkt_tx << 1) | - (dev->ISR.pkt_rx)); - if (dev->interrupt) { - if (((val & val2) & 0x7f) == 0) - dev->interrupt(dev->priv, 0); - else - dev->interrupt(dev->priv, 1); - } - break; + /* Set other values */ + dev->IMR.rx_inte = ((val & 0x01) == 0x01); + dev->IMR.tx_inte = ((val & 0x02) == 0x02); + dev->IMR.rxerr_inte = ((val & 0x04) == 0x04); + dev->IMR.txerr_inte = ((val & 0x08) == 0x08); + dev->IMR.overw_inte = ((val & 0x10) == 0x10); + dev->IMR.cofl_inte = ((val & 0x20) == 0x20); + dev->IMR.rdma_inte = ((val & 0x40) == 0x40); + val2 = ((dev->ISR.rdma_done << 6) | (dev->ISR.cnt_oflow << 5) | (dev->ISR.overwrite << 4) | (dev->ISR.tx_err << 3) | (dev->ISR.rx_err << 2) | (dev->ISR.pkt_tx << 1) | (dev->ISR.pkt_rx)); + if (dev->interrupt) { + if (((val & val2) & 0x7f) == 0) + dev->interrupt(dev->priv, 0); + else + dev->interrupt(dev->priv, 1); + } + break; - default: - dp8390_log("DP8390: Page0 write, bad register 0x%02x\n", off); - break; + default: + dp8390_log("DP8390: Page0 write, bad register 0x%02x\n", off); + break; } } - /* Handle reads/writes to the first page of the DS8390 register file. */ uint32_t dp8390_page1_read(dp8390_t *dev, uint32_t off, unsigned int len) { dp8390_log("DP8390: Page1 read from register 0x%02x, len=%u\n", - off, len); + off, len); - switch(off) { - case 0x01: /* PAR0-5 */ - case 0x02: - case 0x03: - case 0x04: - case 0x05: - case 0x06: - return(dev->physaddr[off - 1]); + switch (off) { + case 0x01: /* PAR0-5 */ + case 0x02: + case 0x03: + case 0x04: + case 0x05: + case 0x06: + return (dev->physaddr[off - 1]); - case 0x07: /* CURR */ - dp8390_log("DP8390: returning current page: 0x%02x\n", - (dev->curr_page)); - return(dev->curr_page); + case 0x07: /* CURR */ + dp8390_log("DP8390: returning current page: 0x%02x\n", + (dev->curr_page)); + return (dev->curr_page); - case 0x08: /* MAR0-7 */ - case 0x09: - case 0x0a: - case 0x0b: - case 0x0c: - case 0x0d: - case 0x0e: - case 0x0f: - return(dev->mchash[off - 8]); + case 0x08: /* MAR0-7 */ + case 0x09: + case 0x0a: + case 0x0b: + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: + return (dev->mchash[off - 8]); - default: - dp8390_log("DP8390: Page1 read register 0x%02x out of range\n", - off); - return(0); + default: + dp8390_log("DP8390: Page1 read register 0x%02x out of range\n", + off); + return (0); } } - void dp8390_page1_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len) { dp8390_log("DP8390: Page1 write to register 0x%02x, len=%u, value=0x%04x\n", - off, len, val); + off, len, val); - switch(off) { - case 0x01: /* PAR0-5 */ - case 0x02: - case 0x03: - case 0x04: - case 0x05: - case 0x06: - dev->physaddr[off - 1] = val; - if (off == 6) - dp8390_log("DP8390: Physical address set to %02x:%02x:%02x:%02x:%02x:%02x\n", - dev->physaddr[0], dev->physaddr[1], - dev->physaddr[2], dev->physaddr[3], - dev->physaddr[4], dev->physaddr[5]); - break; + switch (off) { + case 0x01: /* PAR0-5 */ + case 0x02: + case 0x03: + case 0x04: + case 0x05: + case 0x06: + dev->physaddr[off - 1] = val; + if (off == 6) + dp8390_log("DP8390: Physical address set to %02x:%02x:%02x:%02x:%02x:%02x\n", + dev->physaddr[0], dev->physaddr[1], + dev->physaddr[2], dev->physaddr[3], + dev->physaddr[4], dev->physaddr[5]); + break; - case 0x07: /* CURR */ - dev->curr_page = val; - break; + case 0x07: /* CURR */ + dev->curr_page = val; + break; - case 0x08: /* MAR0-7 */ - case 0x09: - case 0x0a: - case 0x0b: - case 0x0c: - case 0x0d: - case 0x0e: - case 0x0f: - dev->mchash[off - 8] = val; - break; + case 0x08: /* MAR0-7 */ + case 0x09: + case 0x0a: + case 0x0b: + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: + dev->mchash[off - 8] = val; + break; - default: - dp8390_log("DP8390: Page1 write register 0x%02x out of range\n", - off); - break; + default: + dp8390_log("DP8390: Page1 write register 0x%02x out of range\n", + off); + break; } } - /* Handle reads/writes to the second page of the DS8390 register file. */ uint32_t dp8390_page2_read(dp8390_t *dev, uint32_t off, unsigned int len) { dp8390_log("DP8390: Page2 read from register 0x%02x, len=%u\n", - off, len); + off, len); - switch(off) { - case 0x01: /* PSTART */ - return(dev->page_start); + switch (off) { + case 0x01: /* PSTART */ + return (dev->page_start); - case 0x02: /* PSTOP */ - return(dev->page_stop); + case 0x02: /* PSTOP */ + return (dev->page_stop); - case 0x03: /* Remote Next-packet pointer */ - return(dev->rempkt_ptr); + case 0x03: /* Remote Next-packet pointer */ + return (dev->rempkt_ptr); - case 0x04: /* TPSR */ - return(dev->tx_page_start); + case 0x04: /* TPSR */ + return (dev->tx_page_start); - case 0x05: /* Local Next-packet pointer */ - return(dev->localpkt_ptr); + case 0x05: /* Local Next-packet pointer */ + return (dev->localpkt_ptr); - case 0x06: /* Address counter (upper) */ - return(dev->address_cnt >> 8); + case 0x06: /* Address counter (upper) */ + return (dev->address_cnt >> 8); - case 0x07: /* Address counter (lower) */ - return(dev->address_cnt & 0xff); + case 0x07: /* Address counter (lower) */ + return (dev->address_cnt & 0xff); - case 0x08: /* Reserved */ - case 0x09: - case 0x0a: - case 0x0b: - dp8390_log("DP8390: reserved Page2 read - register 0x%02x\n", - off); - return(0xff); + case 0x08: /* Reserved */ + case 0x09: + case 0x0a: + case 0x0b: + dp8390_log("DP8390: reserved Page2 read - register 0x%02x\n", + off); + return (0xff); - case 0x0c: /* RCR */ - return ((dev->RCR.monitor << 5) | - (dev->RCR.promisc << 4) | - (dev->RCR.multicast << 3) | - (dev->RCR.broadcast << 2) | - (dev->RCR.runts_ok << 1) | - (dev->RCR.errors_ok)); + case 0x0c: /* RCR */ + return ((dev->RCR.monitor << 5) | (dev->RCR.promisc << 4) | (dev->RCR.multicast << 3) | (dev->RCR.broadcast << 2) | (dev->RCR.runts_ok << 1) | (dev->RCR.errors_ok)); - case 0x0d: /* TCR */ - return ((dev->TCR.coll_prio << 4) | - (dev->TCR.ext_stoptx << 3) | - ((dev->TCR.loop_cntl & 0x3) << 1) | - (dev->TCR.crc_disable)); + case 0x0d: /* TCR */ + return ((dev->TCR.coll_prio << 4) | (dev->TCR.ext_stoptx << 3) | ((dev->TCR.loop_cntl & 0x3) << 1) | (dev->TCR.crc_disable)); - case 0x0e: /* DCR */ - return (((dev->DCR.fifo_size & 0x3) << 5) | - (dev->DCR.auto_rx << 4) | - (dev->DCR.loop << 3) | - (dev->DCR.longaddr << 2) | - (dev->DCR.endian << 1) | - (dev->DCR.wdsize)); + case 0x0e: /* DCR */ + return (((dev->DCR.fifo_size & 0x3) << 5) | (dev->DCR.auto_rx << 4) | (dev->DCR.loop << 3) | (dev->DCR.longaddr << 2) | (dev->DCR.endian << 1) | (dev->DCR.wdsize)); - case 0x0f: /* IMR */ - return ((dev->IMR.rdma_inte << 6) | - (dev->IMR.cofl_inte << 5) | - (dev->IMR.overw_inte << 4) | - (dev->IMR.txerr_inte << 3) | - (dev->IMR.rxerr_inte << 2) | - (dev->IMR.tx_inte << 1) | - (dev->IMR.rx_inte)); + case 0x0f: /* IMR */ + return ((dev->IMR.rdma_inte << 6) | (dev->IMR.cofl_inte << 5) | (dev->IMR.overw_inte << 4) | (dev->IMR.txerr_inte << 3) | (dev->IMR.rxerr_inte << 2) | (dev->IMR.tx_inte << 1) | (dev->IMR.rx_inte)); - default: - dp8390_log("DP8390: Page2 register 0x%02x out of range\n", - off); - break; + default: + dp8390_log("DP8390: Page2 register 0x%02x out of range\n", + off); + break; } - return(0); + return (0); } - void dp8390_page2_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len) { -/* Maybe all writes here should be BX_PANIC()'d, since they - affect internal operation, but let them through for now - and print a warning. */ + /* Maybe all writes here should be BX_PANIC()'d, since they + affect internal operation, but let them through for now + and print a warning. */ dp8390_log("DP8390: Page2 write to register 0x%02x, len=%u, value=0x%04x\n", - off, len, val); + off, len, val); - switch(off) { - case 0x01: /* CLDA0 */ - /* Clear out low byte and re-insert */ - dev->local_dma &= 0xff00; - dev->local_dma |= (val & 0xff); - break; + switch (off) { + case 0x01: /* CLDA0 */ + /* Clear out low byte and re-insert */ + dev->local_dma &= 0xff00; + dev->local_dma |= (val & 0xff); + break; - case 0x02: /* CLDA1 */ - /* Clear out high byte and re-insert */ - dev->local_dma &= 0x00ff; - dev->local_dma |= ((val & 0xff) << 8); - break; + case 0x02: /* CLDA1 */ + /* Clear out high byte and re-insert */ + dev->local_dma &= 0x00ff; + dev->local_dma |= ((val & 0xff) << 8); + break; - case 0x03: /* Remote Next-pkt pointer */ - dev->rempkt_ptr = val; - break; + case 0x03: /* Remote Next-pkt pointer */ + dev->rempkt_ptr = val; + break; - case 0x04: + case 0x04: #ifdef ENABLE_DP8390_LOG - dp8390_log("DP8390: Page 2 write to reserved register 0x04\n"); + dp8390_log("DP8390: Page 2 write to reserved register 0x04\n"); #endif - break; + break; - case 0x05: /* Local Next-packet pointer */ - dev->localpkt_ptr = val; - break; + case 0x05: /* Local Next-packet pointer */ + dev->localpkt_ptr = val; + break; - case 0x06: /* Address counter (upper) */ - /* Clear out high byte and re-insert */ - dev->address_cnt &= 0x00ff; - dev->address_cnt |= ((val & 0xff) << 8); - break; + case 0x06: /* Address counter (upper) */ + /* Clear out high byte and re-insert */ + dev->address_cnt &= 0x00ff; + dev->address_cnt |= ((val & 0xff) << 8); + break; - case 0x07: /* Address counter (lower) */ - /* Clear out low byte and re-insert */ - dev->address_cnt &= 0xff00; - dev->address_cnt |= (val & 0xff); - break; + case 0x07: /* Address counter (lower) */ + /* Clear out low byte and re-insert */ + dev->address_cnt &= 0xff00; + dev->address_cnt |= (val & 0xff); + break; - case 0x08: - case 0x09: - case 0x0a: - case 0x0b: - case 0x0c: - case 0x0d: - case 0x0e: - case 0x0f: - dp8390_log("DP8390: Page2 write to reserved register 0x%02x\n", - off); - break; + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: + dp8390_log("DP8390: Page2 write to reserved register 0x%02x\n", + off); + break; - default: - dp8390_log("DP8390: Page2 write, illegal register 0x%02x\n", - off); - break; + default: + dp8390_log("DP8390: Page2 write, illegal register 0x%02x\n", + off); + break; } } - void dp8390_set_defaults(dp8390_t *dev, uint8_t flags) { @@ -990,19 +910,17 @@ dp8390_set_defaults(dp8390_t *dev, uint8_t flags) dev->flags = flags; } - void dp8390_mem_alloc(dp8390_t *dev, uint32_t start, uint32_t size) { dev->mem = (uint8_t *) malloc(size * sizeof(uint8_t)); memset(dev->mem, 0, size * sizeof(uint8_t)); dev->mem_start = start; - dev->mem_end = start + size; - dev->mem_size = size; + dev->mem_end = start + size; + dev->mem_size = size; dp8390_log("DP8390: Mapped %i bytes of memory at address %04X in the address space\n", size, start); } - void dp8390_set_id(dp8390_t *dev, uint8_t id0, uint8_t id1) { @@ -1010,27 +928,26 @@ dp8390_set_id(dp8390_t *dev, uint8_t id0, uint8_t id1) dev->id1 = id1; } - void dp8390_reset(dp8390_t *dev) { int i, max, shift = 0; if (dev->flags & DP8390_FLAG_EVEN_MAC) - shift = 1; + shift = 1; max = 16 << shift; /* Initialize the MAC address area by doubling the physical address */ for (i = 0; i < max; i++) { - if (i < (6 << shift)) - dev->macaddr[i] = dev->physaddr[i >> shift]; - else /* Signature */ - dev->macaddr[i] = 0x57; + if (i < (6 << shift)) + dev->macaddr[i] = dev->physaddr[i >> shift]; + else /* Signature */ + dev->macaddr[i] = 0x57; } /* Zero out registers and memory */ - memset(&dev->CR, 0x00, sizeof(dev->CR) ); + memset(&dev->CR, 0x00, sizeof(dev->CR)); memset(&dev->ISR, 0x00, sizeof(dev->ISR)); memset(&dev->IMR, 0x00, sizeof(dev->IMR)); memset(&dev->DCR, 0x00, sizeof(dev->DCR)); @@ -1038,16 +955,16 @@ dp8390_reset(dp8390_t *dev) memset(&dev->TSR, 0x00, sizeof(dev->TSR)); memset(&dev->RSR, 0x00, sizeof(dev->RSR)); dev->tx_timer_active = 0; - dev->local_dma = 0; - dev->page_start = 0; - dev->page_stop = 0; - dev->bound_ptr = 0; - dev->tx_page_start = 0; - dev->num_coll = 0; - dev->tx_bytes = 0; - dev->fifo = 0; - dev->remote_dma = 0; - dev->remote_start = 0; + dev->local_dma = 0; + dev->page_start = 0; + dev->page_stop = 0; + dev->bound_ptr = 0; + dev->tx_page_start = 0; + dev->num_coll = 0; + dev->tx_bytes = 0; + dev->fifo = 0; + dev->remote_dma = 0; + dev->remote_start = 0; dev->remote_bytes = 0; @@ -1070,10 +987,9 @@ dp8390_reset(dp8390_t *dev) dev->DCR.longaddr = 1; if (dev->interrupt) - dev->interrupt(dev->priv, 0); + dev->interrupt(dev->priv, 0); } - void dp8390_soft_reset(dp8390_t *dev) { @@ -1081,7 +997,6 @@ dp8390_soft_reset(dp8390_t *dev) dev->ISR.reset = 1; } - static void * dp8390_init(const device_t *info) { @@ -1100,34 +1015,33 @@ dp8390_init(const device_t *info) return dp8390; } - static void dp8390_close(void *priv) { dp8390_t *dp8390 = (dp8390_t *) priv; if (dp8390) { - if (dp8390->mem) - free(dp8390->mem); + if (dp8390->mem) + free(dp8390->mem); - if (dp8390->card) { - netcard_close(dp8390->card); - } + if (dp8390->card) { + netcard_close(dp8390->card); + } - free(dp8390); + free(dp8390); } } const device_t dp8390_device = { - .name = "DP8390 Network Interface Controller", + .name = "DP8390 Network Interface Controller", .internal_name = "dp8390", - .flags = 0, - .local = 0, - .init = dp8390_init, - .close = dp8390_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = dp8390_init, + .close = dp8390_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/network/net_event.c b/src/network/net_event.c index c0e915c8b..6e68f1fe3 100644 --- a/src/network/net_event.c +++ b/src/network/net_event.c @@ -1,19 +1,19 @@ #ifdef _WIN32 -#define WIN32_LEAN_AND_MEAN -#include +# define WIN32_LEAN_AND_MEAN +# include #else -#include -#include +# include +# include #endif #include <86box/net_event.h> - #ifndef _WIN32 -static void setup_fd(int fd) +static void +setup_fd(int fd) { - fcntl(fd, F_SETFD, FD_CLOEXEC); - fcntl(fd, F_SETFL, O_NONBLOCK); + fcntl(fd, F_SETFD, FD_CLOEXEC); + fcntl(fd, F_SETFL, O_NONBLOCK); } #endif diff --git a/src/network/net_ne2000.c b/src/network/net_ne2000.c index c7f1a0ccb..501c52f3c 100644 --- a/src/network/net_ne2000.c +++ b/src/network/net_ne2000.c @@ -69,63 +69,59 @@ #include <86box/bswap.h> #include <86box/isapnp.h> - /* ROM BIOS file paths. */ -#define ROM_PATH_NE1000 "roms/network/ne1000/ne1000.rom" -#define ROM_PATH_NE2000 "roms/network/ne2000/ne2000.rom" -#define ROM_PATH_RTL8019 "roms/network/rtl8019as/rtl8019as.rom" -#define ROM_PATH_RTL8029 "roms/network/rtl8029as/rtl8029as.rom" +#define ROM_PATH_NE1000 "roms/network/ne1000/ne1000.rom" +#define ROM_PATH_NE2000 "roms/network/ne2000/ne2000.rom" +#define ROM_PATH_RTL8019 "roms/network/rtl8019as/rtl8019as.rom" +#define ROM_PATH_RTL8029 "roms/network/rtl8029as/rtl8029as.rom" /* PCI info. */ -#define PCI_VENDID 0x10ec /* Realtek, Inc */ -#define PCI_DEVID 0x8029 /* RTL8029AS */ -#define PCI_REGSIZE 256 /* size of PCI space */ - +#define PCI_VENDID 0x10ec /* Realtek, Inc */ +#define PCI_DEVID 0x8029 /* RTL8029AS */ +#define PCI_REGSIZE 256 /* size of PCI space */ static uint8_t rtl8019as_pnp_rom[] = { - 0x4a, 0x8c, 0x80, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, /* RTL8019, dummy checksum (filled in by isapnp_add_card) */ - 0x0a, 0x10, 0x10, /* PnP version 1.0, vendor version 1.0 */ + 0x4a, 0x8c, 0x80, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, /* RTL8019, dummy checksum (filled in by isapnp_add_card) */ + 0x0a, 0x10, 0x10, /* PnP version 1.0, vendor version 1.0 */ 0x82, 0x22, 0x00, 'R', 'E', 'A', 'L', 'T', 'E', 'K', ' ', 'P', 'L', 'U', 'G', ' ', '&', ' ', 'P', 'L', 'A', 'Y', ' ', 'E', 'T', 'H', 'E', 'R', 'N', 'E', 'T', ' ', 'C', 'A', 'R', 'D', 0x00, /* ANSI identifier */ - 0x16, 0x4a, 0x8c, 0x80, 0x19, 0x02, 0x00, /* logical device RTL8019 */ - 0x1c, 0x41, 0xd0, 0x80, 0xd6, /* compatible device PNP80D6 */ - 0x47, 0x00, 0x20, 0x02, 0x80, 0x03, 0x20, 0x20, /* I/O 0x220-0x380, decodes 10-bit, 32-byte alignment, 32 addresses */ - 0x23, 0x38, 0x9e, 0x01, /* IRQ 3/4/5/9/10/11/12/15, high true edge sensitive */ + 0x16, 0x4a, 0x8c, 0x80, 0x19, 0x02, 0x00, /* logical device RTL8019 */ + 0x1c, 0x41, 0xd0, 0x80, 0xd6, /* compatible device PNP80D6 */ + 0x47, 0x00, 0x20, 0x02, 0x80, 0x03, 0x20, 0x20, /* I/O 0x220-0x380, decodes 10-bit, 32-byte alignment, 32 addresses */ + 0x23, 0x38, 0x9e, 0x01, /* IRQ 3/4/5/9/10/11/12/15, high true edge sensitive */ 0x79, 0x00 /* end tag, dummy checksum (filled in by isapnp_add_card) */ }; - typedef struct { - dp8390_t *dp8390; - const char *name; - int board; - int is_pci, is_mca, is_8bit; - uint32_t base_address; - int base_irq; - uint32_t bios_addr, - bios_size, - bios_mask; - int card; /* PCI card slot */ - int has_bios, pad; - bar_t pci_bar[2]; - uint8_t pci_regs[PCI_REGSIZE]; - uint8_t eeprom[128]; /* for RTL8029AS */ - rom_t bios_rom; - void *pnp_card; - uint8_t pnp_csnsav; - uint8_t maclocal[6]; /* configured MAC (local) address */ + dp8390_t *dp8390; + const char *name; + int board; + int is_pci, is_mca, is_8bit; + uint32_t base_address; + int base_irq; + uint32_t bios_addr, + bios_size, + bios_mask; + int card; /* PCI card slot */ + int has_bios, pad; + bar_t pci_bar[2]; + uint8_t pci_regs[PCI_REGSIZE]; + uint8_t eeprom[128]; /* for RTL8029AS */ + rom_t bios_rom; + void *pnp_card; + uint8_t pnp_csnsav; + uint8_t maclocal[6]; /* configured MAC (local) address */ /* RTL8019AS/RTL8029AS registers */ - uint8_t config0, config2, config3; - uint8_t _9346cr; - uint32_t pad0; + uint8_t config0, config2, config3; + uint8_t _9346cr; + uint32_t pad0; /* POS registers, MCA boards only */ uint8_t pos_regs[8]; } nic_t; - #ifdef ENABLE_NE2K_LOG int ne2k_do_log = ENABLE_NE2K_LOG; @@ -135,56 +131,52 @@ nelog(int lvl, const char *fmt, ...) va_list ap; if (ne2k_do_log >= lvl) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define nelog(lvl, fmt, ...) +# define nelog(lvl, fmt, ...) #endif - static void nic_interrupt(void *priv, int set) { nic_t *dev = (nic_t *) priv; if (dev->is_pci) { - if (set) - pci_set_irq(dev->card, PCI_INTA); - else - pci_clear_irq(dev->card, PCI_INTA); + if (set) + pci_set_irq(dev->card, PCI_INTA); + else + pci_clear_irq(dev->card, PCI_INTA); } else { - if (set) - picint(1<base_irq); - else - picintc(1<base_irq); - } + if (set) + picint(1 << dev->base_irq); + else + picintc(1 << dev->base_irq); + } } - /* reset - restore state to power-up, cancelling all i/o */ static void nic_reset(void *priv) { - nic_t *dev = (nic_t *)priv; + nic_t *dev = (nic_t *) priv; nelog(1, "%s: reset\n", dev->name); dp8390_reset(dev->dp8390); } - static void nic_soft_reset(void *priv) { - nic_t *dev = (nic_t *)priv; + nic_t *dev = (nic_t *) priv; dp8390_soft_reset(dev->dp8390); } - /* * Access the ASIC I/O space. * @@ -203,246 +195,241 @@ asic_read(nic_t *dev, uint32_t off, unsigned int len) { uint32_t retval = 0; - switch(off) { - case 0x00: /* Data register */ - /* A read remote-DMA command must have been issued, - and the source-address and length registers must - have been initialised. */ - if (len > dev->dp8390->remote_bytes) { - nelog(3, "%s: DMA read underrun iolen=%d remote_bytes=%d\n", - dev->name, len, dev->dp8390->remote_bytes); - } + switch (off) { + case 0x00: /* Data register */ + /* A read remote-DMA command must have been issued, + and the source-address and length registers must + have been initialised. */ + if (len > dev->dp8390->remote_bytes) { + nelog(3, "%s: DMA read underrun iolen=%d remote_bytes=%d\n", + dev->name, len, dev->dp8390->remote_bytes); + } - nelog(3, "%s: DMA read: addr=%4x remote_bytes=%d\n", - dev->name, dev->dp8390->remote_dma,dev->dp8390->remote_bytes); - retval = dp8390_chipmem_read(dev->dp8390, dev->dp8390->remote_dma, len); + nelog(3, "%s: DMA read: addr=%4x remote_bytes=%d\n", + dev->name, dev->dp8390->remote_dma, dev->dp8390->remote_bytes); + retval = dp8390_chipmem_read(dev->dp8390, dev->dp8390->remote_dma, len); - /* The 8390 bumps the address and decreases the byte count - by the selected word size after every access, not by - the amount of data requested by the host (io_len). */ - if (len == 4) { - dev->dp8390->remote_dma += len; - } else { - dev->dp8390->remote_dma += (dev->dp8390->DCR.wdsize + 1); - } + /* The 8390 bumps the address and decreases the byte count + by the selected word size after every access, not by + the amount of data requested by the host (io_len). */ + if (len == 4) { + dev->dp8390->remote_dma += len; + } else { + dev->dp8390->remote_dma += (dev->dp8390->DCR.wdsize + 1); + } - if (dev->dp8390->remote_dma == dev->dp8390->page_stop << 8) { - dev->dp8390->remote_dma = dev->dp8390->page_start << 8; - } + if (dev->dp8390->remote_dma == dev->dp8390->page_stop << 8) { + dev->dp8390->remote_dma = dev->dp8390->page_start << 8; + } - /* keep s.remote_bytes from underflowing */ - if (dev->dp8390->remote_bytes > dev->dp8390->DCR.wdsize) { - if (len == 4) { - dev->dp8390->remote_bytes -= len; - } else { - dev->dp8390->remote_bytes -= (dev->dp8390->DCR.wdsize + 1); - } - } else { - dev->dp8390->remote_bytes = 0; - } + /* keep s.remote_bytes from underflowing */ + if (dev->dp8390->remote_bytes > dev->dp8390->DCR.wdsize) { + if (len == 4) { + dev->dp8390->remote_bytes -= len; + } else { + dev->dp8390->remote_bytes -= (dev->dp8390->DCR.wdsize + 1); + } + } else { + dev->dp8390->remote_bytes = 0; + } - /* If all bytes have been written, signal remote-DMA complete */ - if (dev->dp8390->remote_bytes == 0) { - dev->dp8390->ISR.rdma_done = 1; - if (dev->dp8390->IMR.rdma_inte) - nic_interrupt(dev, 1); - } - break; + /* If all bytes have been written, signal remote-DMA complete */ + if (dev->dp8390->remote_bytes == 0) { + dev->dp8390->ISR.rdma_done = 1; + if (dev->dp8390->IMR.rdma_inte) + nic_interrupt(dev, 1); + } + break; - case 0x0f: /* Reset register */ - nic_soft_reset(dev); - break; + case 0x0f: /* Reset register */ + nic_soft_reset(dev); + break; - default: - nelog(3, "%s: ASIC read invalid address %04x\n", - dev->name, (unsigned)off); - break; + default: + nelog(3, "%s: ASIC read invalid address %04x\n", + dev->name, (unsigned) off); + break; } - return(retval); + return (retval); } static void asic_write(nic_t *dev, uint32_t off, uint32_t val, unsigned len) { nelog(3, "%s: ASIC write addr=0x%02x, value=0x%04x\n", - dev->name, (unsigned)off, (unsigned) val); + dev->name, (unsigned) off, (unsigned) val); - switch(off) { - case 0x00: /* Data register - see asic_read for a description */ - if ((len > 1) && (dev->dp8390->DCR.wdsize == 0)) { - nelog(3, "%s: DMA write length %d on byte mode operation\n", - dev->name, len); - break; - } - if (dev->dp8390->remote_bytes == 0) - nelog(3, "%s: DMA write, byte count 0\n", dev->name); + switch (off) { + case 0x00: /* Data register - see asic_read for a description */ + if ((len > 1) && (dev->dp8390->DCR.wdsize == 0)) { + nelog(3, "%s: DMA write length %d on byte mode operation\n", + dev->name, len); + break; + } + if (dev->dp8390->remote_bytes == 0) + nelog(3, "%s: DMA write, byte count 0\n", dev->name); - dp8390_chipmem_write(dev->dp8390, dev->dp8390->remote_dma, val, len); - if (len == 4) - dev->dp8390->remote_dma += len; - else - dev->dp8390->remote_dma += (dev->dp8390->DCR.wdsize + 1); + dp8390_chipmem_write(dev->dp8390, dev->dp8390->remote_dma, val, len); + if (len == 4) + dev->dp8390->remote_dma += len; + else + dev->dp8390->remote_dma += (dev->dp8390->DCR.wdsize + 1); - if (dev->dp8390->remote_dma == dev->dp8390->page_stop << 8) - dev->dp8390->remote_dma = dev->dp8390->page_start << 8; + if (dev->dp8390->remote_dma == dev->dp8390->page_stop << 8) + dev->dp8390->remote_dma = dev->dp8390->page_start << 8; - if (len == 4) - dev->dp8390->remote_bytes -= len; - else - dev->dp8390->remote_bytes -= (dev->dp8390->DCR.wdsize + 1); + if (len == 4) + dev->dp8390->remote_bytes -= len; + else + dev->dp8390->remote_bytes -= (dev->dp8390->DCR.wdsize + 1); - if (dev->dp8390->remote_bytes > dev->dp8390->mem_size) - dev->dp8390->remote_bytes = 0; + if (dev->dp8390->remote_bytes > dev->dp8390->mem_size) + dev->dp8390->remote_bytes = 0; - /* If all bytes have been written, signal remote-DMA complete */ - if (dev->dp8390->remote_bytes == 0) { - dev->dp8390->ISR.rdma_done = 1; - if (dev->dp8390->IMR.rdma_inte) - nic_interrupt(dev, 1); - } - break; + /* If all bytes have been written, signal remote-DMA complete */ + if (dev->dp8390->remote_bytes == 0) { + dev->dp8390->ISR.rdma_done = 1; + if (dev->dp8390->IMR.rdma_inte) + nic_interrupt(dev, 1); + } + break; - case 0x0f: /* Reset register */ - /* end of reset pulse */ - break; + case 0x0f: /* Reset register */ + /* end of reset pulse */ + break; - default: /* this is invalid, but happens under win95 device detection */ - nelog(3, "%s: ASIC write invalid address %04x, ignoring\n", - dev->name, (unsigned)off); - break; + default: /* this is invalid, but happens under win95 device detection */ + nelog(3, "%s: ASIC write invalid address %04x, ignoring\n", + dev->name, (unsigned) off); + break; } } - /* Writes to this page are illegal. */ static uint32_t page3_read(nic_t *dev, uint32_t off, unsigned int len) { - if (dev->board >= NE2K_RTL8019AS) switch(off) { - case 0x1: /* 9346CR */ - return(dev->_9346cr); + if (dev->board >= NE2K_RTL8019AS) + switch (off) { + case 0x1: /* 9346CR */ + return (dev->_9346cr); - case 0x3: /* CONFIG0 */ - return(0x00); /* Cable not BNC */ + case 0x3: /* CONFIG0 */ + return (0x00); /* Cable not BNC */ - case 0x5: /* CONFIG2 */ - return(dev->config2 & 0xe0); + case 0x5: /* CONFIG2 */ + return (dev->config2 & 0xe0); - case 0x6: /* CONFIG3 */ - return(dev->config3 & 0x46); + case 0x6: /* CONFIG3 */ + return (dev->config3 & 0x46); - case 0x8: /* CSNSAV */ - return((dev->board == NE2K_RTL8019AS) ? dev->pnp_csnsav : 0x00); + case 0x8: /* CSNSAV */ + return ((dev->board == NE2K_RTL8019AS) ? dev->pnp_csnsav : 0x00); - case 0xe: /* 8029ASID0 */ - if (dev->board == NE2K_RTL8029AS) - return(0x29); - break; + case 0xe: /* 8029ASID0 */ + if (dev->board == NE2K_RTL8029AS) + return (0x29); + break; - case 0xf: /* 8029ASID1 */ - if (dev->board == NE2K_RTL8029AS) - return(0x80); - break; + case 0xf: /* 8029ASID1 */ + if (dev->board == NE2K_RTL8029AS) + return (0x80); + break; - default: - break; - } + default: + break; + } nelog(3, "%s: Page3 read register 0x%02x attempted\n", dev->name, off); - return(0x00); + return (0x00); } - static void page3_write(nic_t *dev, uint32_t off, uint32_t val, unsigned len) { if (dev->board >= NE2K_RTL8019AS) { - nelog(3, "%s: Page2 write to register 0x%02x, len=%u, value=0x%04x\n", - dev->name, off, len, val); + nelog(3, "%s: Page2 write to register 0x%02x, len=%u, value=0x%04x\n", + dev->name, off, len, val); - switch(off) { - case 0x01: /* 9346CR */ - dev->_9346cr = (val & 0xfe); - break; + switch (off) { + case 0x01: /* 9346CR */ + dev->_9346cr = (val & 0xfe); + break; - case 0x05: /* CONFIG2 */ - dev->config2 = (val & 0xe0); - break; + case 0x05: /* CONFIG2 */ + dev->config2 = (val & 0xe0); + break; - case 0x06: /* CONFIG3 */ - dev->config3 = (val & 0x46); - break; + case 0x06: /* CONFIG3 */ + dev->config3 = (val & 0x46); + break; - case 0x09: /* HLTCLK */ - break; + case 0x09: /* HLTCLK */ + break; - default: - nelog(3, "%s: Page3 write to reserved register 0x%02x\n", - dev->name, off); - break; - } + default: + nelog(3, "%s: Page3 write to reserved register 0x%02x\n", + dev->name, off); + break; + } } else - nelog(3, "%s: Page3 write register 0x%02x attempted\n", dev->name, off); + nelog(3, "%s: Page3 write register 0x%02x attempted\n", dev->name, off); } - static uint32_t nic_read(nic_t *dev, uint32_t addr, unsigned len) { uint32_t retval = 0; - int off = addr - dev->base_address; + int off = addr - dev->base_address; nelog(3, "%s: read addr %x, len %d\n", dev->name, addr, len); if (off >= 0x10) - retval = asic_read(dev, off - 0x10, len); + retval = asic_read(dev, off - 0x10, len); else if (off == 0x00) - retval = dp8390_read_cr(dev->dp8390); - else switch(dev->dp8390->CR.pgsel) { - case 0x00: - retval = dp8390_page0_read(dev->dp8390, off, len); - break; - case 0x01: - retval = dp8390_page1_read(dev->dp8390, off, len); - break; - case 0x02: - retval = dp8390_page2_read(dev->dp8390, off, len); - break; - case 0x03: - retval = page3_read(dev, off, len); - break; - default: - nelog(3, "%s: unknown value of pgsel in read - %d\n", - dev->name, dev->dp8390->CR.pgsel); - break; - } + retval = dp8390_read_cr(dev->dp8390); + else + switch (dev->dp8390->CR.pgsel) { + case 0x00: + retval = dp8390_page0_read(dev->dp8390, off, len); + break; + case 0x01: + retval = dp8390_page1_read(dev->dp8390, off, len); + break; + case 0x02: + retval = dp8390_page2_read(dev->dp8390, off, len); + break; + case 0x03: + retval = page3_read(dev, off, len); + break; + default: + nelog(3, "%s: unknown value of pgsel in read - %d\n", + dev->name, dev->dp8390->CR.pgsel); + break; + } - return(retval); + return (retval); } - static uint8_t nic_readb(uint16_t addr, void *priv) { - return(nic_read((nic_t *)priv, addr, 1)); + return (nic_read((nic_t *) priv, addr, 1)); } - static uint16_t nic_readw(uint16_t addr, void *priv) { - return(nic_read((nic_t *)priv, addr, 2)); + return (nic_read((nic_t *) priv, addr, 2)); } - static uint32_t nic_readl(uint16_t addr, void *priv) { - return(nic_read((nic_t *)priv, addr, 4)); + return (nic_read((nic_t *) priv, addr, 4)); } - static void nic_write(nic_t *dev, uint32_t addr, uint32_t val, unsigned len) { @@ -455,76 +442,71 @@ nic_write(nic_t *dev, uint32_t addr, uint32_t val, unsigned len) page being selected by the PS0,PS1 registers in the command register */ if (off >= 0x10) - asic_write(dev, off - 0x10, val, len); + asic_write(dev, off - 0x10, val, len); else if (off == 0x00) - dp8390_write_cr(dev->dp8390, val); - else switch(dev->dp8390->CR.pgsel) { - case 0x00: - dp8390_page0_write(dev->dp8390, off, val, len); - break; - case 0x01: - dp8390_page1_write(dev->dp8390, off, val, len); - break; - case 0x02: - dp8390_page2_write(dev->dp8390, off, val, len); - break; - case 0x03: - page3_write(dev, off, val, len); - break; - default: - nelog(3, "%s: unknown value of pgsel in write - %d\n", - dev->name, dev->dp8390->CR.pgsel); - break; - } + dp8390_write_cr(dev->dp8390, val); + else + switch (dev->dp8390->CR.pgsel) { + case 0x00: + dp8390_page0_write(dev->dp8390, off, val, len); + break; + case 0x01: + dp8390_page1_write(dev->dp8390, off, val, len); + break; + case 0x02: + dp8390_page2_write(dev->dp8390, off, val, len); + break; + case 0x03: + page3_write(dev, off, val, len); + break; + default: + nelog(3, "%s: unknown value of pgsel in write - %d\n", + dev->name, dev->dp8390->CR.pgsel); + break; + } } - static void nic_writeb(uint16_t addr, uint8_t val, void *priv) { - nic_write((nic_t *)priv, addr, val, 1); + nic_write((nic_t *) priv, addr, val, 1); } - static void nic_writew(uint16_t addr, uint16_t val, void *priv) { - nic_write((nic_t *)priv, addr, val, 2); + nic_write((nic_t *) priv, addr, val, 2); } - static void nic_writel(uint16_t addr, uint32_t val, void *priv) { - nic_write((nic_t *)priv, addr, val, 4); + nic_write((nic_t *) priv, addr, val, 4); } - -static void nic_ioset(nic_t *dev, uint16_t addr); -static void nic_ioremove(nic_t *dev, uint16_t addr); - +static void nic_ioset(nic_t *dev, uint16_t addr); +static void nic_ioremove(nic_t *dev, uint16_t addr); static void nic_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv) { if (ld) - return; + return; nic_t *dev = (nic_t *) priv; if (dev->base_address) { - nic_ioremove(dev, dev->base_address); - dev->base_address = 0; + nic_ioremove(dev, dev->base_address); + dev->base_address = 0; } dev->base_address = config->io[0].base; - dev->base_irq = config->irq[0].irq; + dev->base_irq = config->irq[0].irq; if (config->activate && (dev->base_address != ISAPNP_IO_DISABLED)) - nic_ioset(dev, dev->base_address); + nic_ioset(dev, dev->base_address); } - static void nic_pnp_csn_changed(uint8_t csn, void *priv) { @@ -533,94 +515,89 @@ nic_pnp_csn_changed(uint8_t csn, void *priv) dev->pnp_csnsav = csn; } - static uint8_t nic_pnp_read_vendor_reg(uint8_t ld, uint8_t reg, void *priv) { if (ld != 0) - return 0x00; + return 0x00; nic_t *dev = (nic_t *) priv; switch (reg) { - case 0xF0: - return dev->config0; + case 0xF0: + return dev->config0; - case 0xF2: - return dev->config2; + case 0xF2: + return dev->config2; - case 0xF3: - return dev->config3; + case 0xF3: + return dev->config3; - case 0xF5: - return dev->pnp_csnsav; + case 0xF5: + return dev->pnp_csnsav; } return 0x00; } - static void nic_pnp_write_vendor_reg(uint8_t ld, uint8_t reg, uint8_t val, void *priv) { nic_t *dev = (nic_t *) priv; if ((ld == 0) && (reg == 0xf6) && (val & 0x04)) { - uint8_t csn = dev->pnp_csnsav; - isapnp_set_csn(dev->pnp_card, 0); - dev->pnp_csnsav = csn; + uint8_t csn = dev->pnp_csnsav; + isapnp_set_csn(dev->pnp_card, 0); + dev->pnp_csnsav = csn; } } - static void nic_ioset(nic_t *dev, uint16_t addr) { if (dev->is_pci) { - io_sethandler(addr, 32, - nic_readb, nic_readw, nic_readl, - nic_writeb, nic_writew, nic_writel, dev); + io_sethandler(addr, 32, + nic_readb, nic_readw, nic_readl, + nic_writeb, nic_writew, nic_writel, dev); } else { - io_sethandler(addr, 16, - nic_readb, NULL, NULL, - nic_writeb, NULL, NULL, dev); - if (dev->is_8bit) { - io_sethandler(addr+16, 16, - nic_readb, NULL, NULL, - nic_writeb, NULL, NULL, dev); - } else { - io_sethandler(addr+16, 16, - nic_readb, nic_readw, NULL, - nic_writeb, nic_writew, NULL, dev); - } + io_sethandler(addr, 16, + nic_readb, NULL, NULL, + nic_writeb, NULL, NULL, dev); + if (dev->is_8bit) { + io_sethandler(addr + 16, 16, + nic_readb, NULL, NULL, + nic_writeb, NULL, NULL, dev); + } else { + io_sethandler(addr + 16, 16, + nic_readb, nic_readw, NULL, + nic_writeb, nic_writew, NULL, dev); + } } } - static void nic_ioremove(nic_t *dev, uint16_t addr) { if (dev->is_pci) { - io_removehandler(addr, 32, - nic_readb, nic_readw, nic_readl, - nic_writeb, nic_writew, nic_writel, dev); + io_removehandler(addr, 32, + nic_readb, nic_readw, nic_readl, + nic_writeb, nic_writew, nic_writel, dev); } else { - io_removehandler(addr, 16, - nic_readb, NULL, NULL, - nic_writeb, NULL, NULL, dev); - if (dev->is_8bit) { - io_removehandler(addr+16, 16, - nic_readb, NULL, NULL, - nic_writeb, NULL, NULL, dev); - } else { - io_removehandler(addr+16, 16, - nic_readb, nic_readw, NULL, - nic_writeb, nic_writew, NULL, dev); - } + io_removehandler(addr, 16, + nic_readb, NULL, NULL, + nic_writeb, NULL, NULL, dev); + if (dev->is_8bit) { + io_removehandler(addr + 16, 16, + nic_readb, NULL, NULL, + nic_writeb, NULL, NULL, dev); + } else { + io_removehandler(addr + 16, 16, + nic_readb, nic_readw, NULL, + nic_writeb, nic_writew, NULL, dev); + } } } - static void nic_update_bios(nic_t *dev) { @@ -628,247 +605,250 @@ nic_update_bios(nic_t *dev) reg_bios_enable = 1; - if (! dev->has_bios) return; + if (!dev->has_bios) + return; if (dev->is_pci) - reg_bios_enable = dev->pci_bar[1].addr_regs[0] & 0x01; + reg_bios_enable = dev->pci_bar[1].addr_regs[0] & 0x01; /* PCI BIOS stuff, just enable_disable. */ if (reg_bios_enable) { - mem_mapping_set_addr(&dev->bios_rom.mapping, - dev->bios_addr, dev->bios_size); - nelog(1, "%s: BIOS now at: %06X\n", dev->name, dev->bios_addr); + mem_mapping_set_addr(&dev->bios_rom.mapping, + dev->bios_addr, dev->bios_size); + nelog(1, "%s: BIOS now at: %06X\n", dev->name, dev->bios_addr); } else { - nelog(1, "%s: BIOS disabled\n", dev->name); - mem_mapping_disable(&dev->bios_rom.mapping); + nelog(1, "%s: BIOS disabled\n", dev->name); + mem_mapping_disable(&dev->bios_rom.mapping); } } - static uint8_t nic_pci_read(int func, int addr, void *priv) { - nic_t *dev = (nic_t *)priv; + nic_t *dev = (nic_t *) priv; uint8_t ret = 0x00; - switch(addr) { - case 0x00: /* PCI_VID_LO */ - case 0x01: /* PCI_VID_HI */ - ret = dev->pci_regs[addr]; - break; + switch (addr) { + case 0x00: /* PCI_VID_LO */ + case 0x01: /* PCI_VID_HI */ + ret = dev->pci_regs[addr]; + break; - case 0x02: /* PCI_DID_LO */ - case 0x03: /* PCI_DID_HI */ - ret = dev->pci_regs[addr]; - break; + case 0x02: /* PCI_DID_LO */ + case 0x03: /* PCI_DID_HI */ + ret = dev->pci_regs[addr]; + break; - case 0x04: /* PCI_COMMAND_LO */ - case 0x05: /* PCI_COMMAND_HI */ - ret = dev->pci_regs[addr]; - break; + case 0x04: /* PCI_COMMAND_LO */ + case 0x05: /* PCI_COMMAND_HI */ + ret = dev->pci_regs[addr]; + break; - case 0x06: /* PCI_STATUS_LO */ - case 0x07: /* PCI_STATUS_HI */ - ret = dev->pci_regs[addr]; - break; + case 0x06: /* PCI_STATUS_LO */ + case 0x07: /* PCI_STATUS_HI */ + ret = dev->pci_regs[addr]; + break; - case 0x08: /* PCI_REVID */ - ret = 0x00; /* Rev. 00 */ - break; - case 0x09: /* PCI_PIFR */ - ret = 0x00; /* Rev. 00 */ - break; + case 0x08: /* PCI_REVID */ + ret = 0x00; /* Rev. 00 */ + break; + case 0x09: /* PCI_PIFR */ + ret = 0x00; /* Rev. 00 */ + break; - case 0x0A: /* PCI_SCR */ - ret = dev->pci_regs[addr]; - break; + case 0x0A: /* PCI_SCR */ + ret = dev->pci_regs[addr]; + break; - case 0x0B: /* PCI_BCR */ - ret = dev->pci_regs[addr]; - break; + case 0x0B: /* PCI_BCR */ + ret = dev->pci_regs[addr]; + break; - case 0x10: /* PCI_BAR 7:5 */ - ret = (dev->pci_bar[0].addr_regs[0] & 0xe0) | 0x01; - break; - case 0x11: /* PCI_BAR 15:8 */ - ret = dev->pci_bar[0].addr_regs[1]; - break; - case 0x12: /* PCI_BAR 23:16 */ - ret = dev->pci_bar[0].addr_regs[2]; - break; - case 0x13: /* PCI_BAR 31:24 */ - ret = dev->pci_bar[0].addr_regs[3]; - break; + case 0x10: /* PCI_BAR 7:5 */ + ret = (dev->pci_bar[0].addr_regs[0] & 0xe0) | 0x01; + break; + case 0x11: /* PCI_BAR 15:8 */ + ret = dev->pci_bar[0].addr_regs[1]; + break; + case 0x12: /* PCI_BAR 23:16 */ + ret = dev->pci_bar[0].addr_regs[2]; + break; + case 0x13: /* PCI_BAR 31:24 */ + ret = dev->pci_bar[0].addr_regs[3]; + break; - case 0x2C: /* PCI_SVID_LO */ - case 0x2D: /* PCI_SVID_HI */ - ret = dev->pci_regs[addr]; - break; + case 0x2C: /* PCI_SVID_LO */ + case 0x2D: /* PCI_SVID_HI */ + ret = dev->pci_regs[addr]; + break; - case 0x2E: /* PCI_SID_LO */ - case 0x2F: /* PCI_SID_HI */ - ret = dev->pci_regs[addr]; - break; + case 0x2E: /* PCI_SID_LO */ + case 0x2F: /* PCI_SID_HI */ + ret = dev->pci_regs[addr]; + break; - case 0x30: /* PCI_ROMBAR */ - ret = dev->pci_bar[1].addr_regs[0] & 0x01; - break; - case 0x31: /* PCI_ROMBAR 15:11 */ - ret = dev->pci_bar[1].addr_regs[1] & 0x80; - break; - case 0x32: /* PCI_ROMBAR 23:16 */ - ret = dev->pci_bar[1].addr_regs[2]; - break; - case 0x33: /* PCI_ROMBAR 31:24 */ - ret = dev->pci_bar[1].addr_regs[3]; - break; + case 0x30: /* PCI_ROMBAR */ + ret = dev->pci_bar[1].addr_regs[0] & 0x01; + break; + case 0x31: /* PCI_ROMBAR 15:11 */ + ret = dev->pci_bar[1].addr_regs[1] & 0x80; + break; + case 0x32: /* PCI_ROMBAR 23:16 */ + ret = dev->pci_bar[1].addr_regs[2]; + break; + case 0x33: /* PCI_ROMBAR 31:24 */ + ret = dev->pci_bar[1].addr_regs[3]; + break; - case 0x3C: /* PCI_ILR */ - ret = dev->pci_regs[addr]; - break; + case 0x3C: /* PCI_ILR */ + ret = dev->pci_regs[addr]; + break; - case 0x3D: /* PCI_IPR */ - ret = dev->pci_regs[addr]; - break; + case 0x3D: /* PCI_IPR */ + ret = dev->pci_regs[addr]; + break; } nelog(2, "%s: PCI_Read(%d, %04x) = %02x\n", dev->name, func, addr, ret); - return(ret); + return (ret); } - static void nic_pci_write(int func, int addr, uint8_t val, void *priv) { - nic_t *dev = (nic_t *)priv; + nic_t *dev = (nic_t *) priv; uint8_t valxor; nelog(2, "%s: PCI_Write(%d, %04x, %02x)\n", dev->name, func, addr, val); - switch(addr) { - case 0x04: /* PCI_COMMAND_LO */ - valxor = (val & 0x03) ^ dev->pci_regs[addr]; - if (valxor & PCI_COMMAND_IO) - { - nic_ioremove(dev, dev->base_address); - if ((dev->base_address != 0) && (val & PCI_COMMAND_IO)) - { - nic_ioset(dev, dev->base_address); - } - } - dev->pci_regs[addr] = val & 0x03; - break; + switch (addr) { + case 0x04: /* PCI_COMMAND_LO */ + valxor = (val & 0x03) ^ dev->pci_regs[addr]; + if (valxor & PCI_COMMAND_IO) { + nic_ioremove(dev, dev->base_address); + if ((dev->base_address != 0) && (val & PCI_COMMAND_IO)) { + nic_ioset(dev, dev->base_address); + } + } + dev->pci_regs[addr] = val & 0x03; + break; - case 0x10: /* PCI_BAR */ - val &= 0xe0; /* 0xe0 acc to RTL DS */ - val |= 0x01; /* re-enable IOIN bit */ - /*FALLTHROUGH*/ + case 0x10: /* PCI_BAR */ + val &= 0xe0; /* 0xe0 acc to RTL DS */ + val |= 0x01; /* re-enable IOIN bit */ + /*FALLTHROUGH*/ - case 0x11: /* PCI_BAR */ - case 0x12: /* PCI_BAR */ - case 0x13: /* PCI_BAR */ - /* Remove old I/O. */ - nic_ioremove(dev, dev->base_address); + case 0x11: /* PCI_BAR */ + case 0x12: /* PCI_BAR */ + case 0x13: /* PCI_BAR */ + /* Remove old I/O. */ + nic_ioremove(dev, dev->base_address); - /* Set new I/O as per PCI request. */ - dev->pci_bar[0].addr_regs[addr & 3] = val; + /* Set new I/O as per PCI request. */ + dev->pci_bar[0].addr_regs[addr & 3] = val; - /* Then let's calculate the new I/O base. */ - dev->base_address = dev->pci_bar[0].addr & 0xffe0; + /* Then let's calculate the new I/O base. */ + dev->base_address = dev->pci_bar[0].addr & 0xffe0; - /* Log the new base. */ - nelog(1, "%s: PCI: new I/O base is %04X\n", - dev->name, dev->base_address); - /* We're done, so get out of the here. */ - if (dev->pci_regs[4] & PCI_COMMAND_IO) - { - if (dev->base_address != 0) - { - nic_ioset(dev, dev->base_address); - } - } - break; + /* Log the new base. */ + nelog(1, "%s: PCI: new I/O base is %04X\n", + dev->name, dev->base_address); + /* We're done, so get out of the here. */ + if (dev->pci_regs[4] & PCI_COMMAND_IO) { + if (dev->base_address != 0) { + nic_ioset(dev, dev->base_address); + } + } + break; - case 0x30: /* PCI_ROMBAR */ - case 0x31: /* PCI_ROMBAR */ - case 0x32: /* PCI_ROMBAR */ - case 0x33: /* PCI_ROMBAR */ - dev->pci_bar[1].addr_regs[addr & 3] = val; - /* dev->pci_bar[1].addr_regs[1] &= dev->bios_mask; */ - dev->pci_bar[1].addr &= 0xffff8001; - dev->bios_addr = dev->pci_bar[1].addr & 0xffff8000; - nic_update_bios(dev); - return; + case 0x30: /* PCI_ROMBAR */ + case 0x31: /* PCI_ROMBAR */ + case 0x32: /* PCI_ROMBAR */ + case 0x33: /* PCI_ROMBAR */ + dev->pci_bar[1].addr_regs[addr & 3] = val; + /* dev->pci_bar[1].addr_regs[1] &= dev->bios_mask; */ + dev->pci_bar[1].addr &= 0xffff8001; + dev->bios_addr = dev->pci_bar[1].addr & 0xffff8000; + nic_update_bios(dev); + return; - case 0x3C: /* PCI_ILR */ - nelog(1, "%s: IRQ now: %i\n", dev->name, val); - dev->base_irq = val; - dev->pci_regs[addr] = dev->base_irq; - return; + case 0x3C: /* PCI_ILR */ + nelog(1, "%s: IRQ now: %i\n", dev->name, val); + dev->base_irq = val; + dev->pci_regs[addr] = dev->base_irq; + return; } } - static void nic_rom_init(nic_t *dev, char *s) { uint32_t temp; - FILE *f; + FILE *f; - if (s == NULL) return; + if (s == NULL) + return; - if (dev->bios_addr == 0) return; + if (dev->bios_addr == 0) + return; if ((f = rom_fopen(s, "rb")) != NULL) { - fseek(f, 0L, SEEK_END); - temp = ftell(f); - fclose(f); - dev->bios_size = 0x10000; - if (temp <= 0x8000) - dev->bios_size = 0x8000; - if (temp <= 0x4000) - dev->bios_size = 0x4000; - if (temp <= 0x2000) - dev->bios_size = 0x2000; - dev->bios_mask = (dev->bios_size >> 8) & 0xff; - dev->bios_mask = (0x100 - dev->bios_mask) & 0xff; + fseek(f, 0L, SEEK_END); + temp = ftell(f); + fclose(f); + dev->bios_size = 0x10000; + if (temp <= 0x8000) + dev->bios_size = 0x8000; + if (temp <= 0x4000) + dev->bios_size = 0x4000; + if (temp <= 0x2000) + dev->bios_size = 0x2000; + dev->bios_mask = (dev->bios_size >> 8) & 0xff; + dev->bios_mask = (0x100 - dev->bios_mask) & 0xff; } else { - dev->bios_addr = 0x00000; - dev->bios_size = 0; - return; + dev->bios_addr = 0x00000; + dev->bios_size = 0; + return; } /* Create a memory mapping for the space. */ rom_init(&dev->bios_rom, s, dev->bios_addr, - dev->bios_size, dev->bios_size-1, 0, MEM_MAPPING_EXTERNAL); + dev->bios_size, dev->bios_size - 1, 0, MEM_MAPPING_EXTERNAL); nelog(1, "%s: BIOS configured at %06lX (size %ld)\n", - dev->name, dev->bios_addr, dev->bios_size); + dev->name, dev->bios_addr, dev->bios_size); } static uint8_t nic_mca_read(int port, void *priv) { - nic_t *dev = (nic_t *)priv; + nic_t *dev = (nic_t *) priv; - return(dev->pos_regs[port & 7]); + return (dev->pos_regs[port & 7]); } -#define MCA_611F_IO_PORTS { 0x300, 0x340, 0x320, 0x360, 0x1300, 0x1340, \ - 0x1320, 0x1360 } +#define MCA_611F_IO_PORTS \ + { \ + 0x300, 0x340, 0x320, 0x360, 0x1300, 0x1340, \ + 0x1320, 0x1360 \ + } -#define MCA_611F_IRQS { 2, 3, 4, 5, 10, 11, 12, 15 } +#define MCA_611F_IRQS \ + { \ + 2, 3, 4, 5, 10, 11, 12, 15 \ + } static void nic_mca_write(int port, uint8_t val, void *priv) { - nic_t *dev = (nic_t *)priv; + nic_t *dev = (nic_t *) priv; uint16_t base[] = MCA_611F_IO_PORTS; - int8_t irq[] = MCA_611F_IRQS; + int8_t irq[] = MCA_611F_IRQS; /* MCA does not write registers below 0x0100. */ - if (port < 0x0102) return; + if (port < 0x0102) + return; /* Save the MCA register value. */ dev->pos_regs[port & 7] = val; @@ -876,14 +856,14 @@ nic_mca_write(int port, uint8_t val, void *priv) nic_ioremove(dev, dev->base_address); /* This is always necessary so that the old handler doesn't remain. */ - /* Get the new assigned I/O base address. */ - dev->base_address = base[(dev->pos_regs[2] & 0xE0) >> 4]; + /* Get the new assigned I/O base address. */ + dev->base_address = base[(dev->pos_regs[2] & 0xE0) >> 4]; - /* Save the new IRQ values. */ - dev->base_irq = irq[(dev->pos_regs[2] & 0xE) >> 1]; + /* Save the new IRQ values. */ + dev->base_irq = irq[(dev->pos_regs[2] & 0xE) >> 1]; - dev->bios_addr = 0x0000; - dev->has_bios = 0; + dev->bios_addr = 0x0000; + dev->has_bios = 0; /* * The PS/2 Model 80 BIOS always enables a card if it finds one, @@ -895,65 +875,61 @@ nic_mca_write(int port, uint8_t val, void *priv) /* Initialize the device if fully configured. */ if (dev->pos_regs[2] & 0x01) { - /* Card enabled; register (new) I/O handler. */ + /* Card enabled; register (new) I/O handler. */ - nic_ioset(dev, dev->base_address); + nic_ioset(dev, dev->base_address); - nic_reset(dev); - - nelog(2, "EtherNext/MC: Port=%04x, IRQ=%d\n", dev->base_address, dev->base_irq); + nic_reset(dev); + nelog(2, "EtherNext/MC: Port=%04x, IRQ=%d\n", dev->base_address, dev->base_irq); } } - static uint8_t nic_mca_feedb(void *priv) { - nic_t *dev = (nic_t *)priv; + nic_t *dev = (nic_t *) priv; return (dev->pos_regs[2] & 0x01); } - static void * nic_init(const device_t *info) { uint32_t mac; - char *rom; - nic_t *dev; + char *rom; + nic_t *dev; dev = malloc(sizeof(nic_t)); memset(dev, 0x00, sizeof(nic_t)); - dev->name = info->name; + dev->name = info->name; dev->board = info->local; - rom = NULL; + rom = NULL; if (dev->board >= NE2K_RTL8019AS) { - dev->base_address = 0x340; - dev->base_irq = 12; - if (dev->board == NE2K_RTL8029AS) { - dev->bios_addr = 0xD0000; - dev->has_bios = device_get_config_int("bios"); - } else { - dev->bios_addr = 0x00000; - dev->has_bios = 0; - } + dev->base_address = 0x340; + dev->base_irq = 12; + if (dev->board == NE2K_RTL8029AS) { + dev->bios_addr = 0xD0000; + dev->has_bios = device_get_config_int("bios"); + } else { + dev->bios_addr = 0x00000; + dev->has_bios = 0; + } } else { - if (dev->board != NE2K_ETHERNEXT_MC) { - dev->base_address = device_get_config_hex16("base"); - dev->base_irq = device_get_config_int("irq"); - if (dev->board == NE2K_NE2000) { - dev->bios_addr = device_get_config_hex20("bios_addr"); - dev->has_bios = !!dev->bios_addr; - } else { - dev->bios_addr = 0x00000; - dev->has_bios = 0; - } - } - else { - mca_add(nic_mca_read, nic_mca_write, nic_mca_feedb, NULL, dev); - } + if (dev->board != NE2K_ETHERNEXT_MC) { + dev->base_address = device_get_config_hex16("base"); + dev->base_irq = device_get_config_int("irq"); + if (dev->board == NE2K_NE2000) { + dev->bios_addr = device_get_config_hex20("bios_addr"); + dev->has_bios = !!dev->bios_addr; + } else { + dev->bios_addr = 0x00000; + dev->has_bios = 0; + } + } else { + mca_add(nic_mca_read, nic_mca_write, nic_mca_feedb, NULL, dev); + } } /* See if we have a local MAC address configured. */ @@ -961,180 +937,171 @@ nic_init(const device_t *info) /* Set up our BIA. */ if (mac & 0xff000000) { - /* Generate new local MAC. */ - dev->maclocal[3] = random_generate(); - dev->maclocal[4] = random_generate(); - dev->maclocal[5] = random_generate(); - mac = (((int) dev->maclocal[3]) << 16); - mac |= (((int) dev->maclocal[4]) << 8); - mac |= ((int) dev->maclocal[5]); - device_set_config_mac("mac", mac); + /* Generate new local MAC. */ + dev->maclocal[3] = random_generate(); + dev->maclocal[4] = random_generate(); + dev->maclocal[5] = random_generate(); + mac = (((int) dev->maclocal[3]) << 16); + mac |= (((int) dev->maclocal[4]) << 8); + mac |= ((int) dev->maclocal[5]); + device_set_config_mac("mac", mac); } else { - dev->maclocal[3] = (mac>>16) & 0xff; - dev->maclocal[4] = (mac>>8) & 0xff; - dev->maclocal[5] = (mac & 0xff); + dev->maclocal[3] = (mac >> 16) & 0xff; + dev->maclocal[4] = (mac >> 8) & 0xff; + dev->maclocal[5] = (mac & 0xff); } - dev->dp8390 = device_add_inst(&dp8390_device, dp3890_inst++); - dev->dp8390->priv = dev; + dev->dp8390 = device_add_inst(&dp8390_device, dp3890_inst++); + dev->dp8390->priv = dev; dev->dp8390->interrupt = nic_interrupt; - switch(dev->board) { - case NE2K_NE1000: - dev->maclocal[0] = 0x00; /* 00:00:D8 (Novell OID) */ - dev->maclocal[1] = 0x00; - dev->maclocal[2] = 0xD8; - dev->is_8bit = 1; - rom = NULL; - dp8390_set_defaults(dev->dp8390, DP8390_FLAG_CHECK_CR | DP8390_FLAG_CLEAR_IRQ); - dp8390_mem_alloc(dev->dp8390, 0x2000, 0x2000); - break; + switch (dev->board) { + case NE2K_NE1000: + dev->maclocal[0] = 0x00; /* 00:00:D8 (Novell OID) */ + dev->maclocal[1] = 0x00; + dev->maclocal[2] = 0xD8; + dev->is_8bit = 1; + rom = NULL; + dp8390_set_defaults(dev->dp8390, DP8390_FLAG_CHECK_CR | DP8390_FLAG_CLEAR_IRQ); + dp8390_mem_alloc(dev->dp8390, 0x2000, 0x2000); + break; - case NE2K_NE2000: - dev->maclocal[0] = 0x00; /* 00:00:D8 (Novell OID) */ - dev->maclocal[1] = 0x00; - dev->maclocal[2] = 0xD8; - rom = ROM_PATH_NE2000; - dp8390_set_defaults(dev->dp8390, DP8390_FLAG_EVEN_MAC | DP8390_FLAG_CHECK_CR | - DP8390_FLAG_CLEAR_IRQ); - dp8390_mem_alloc(dev->dp8390, 0x4000, 0x4000); - break; + case NE2K_NE2000: + dev->maclocal[0] = 0x00; /* 00:00:D8 (Novell OID) */ + dev->maclocal[1] = 0x00; + dev->maclocal[2] = 0xD8; + rom = ROM_PATH_NE2000; + dp8390_set_defaults(dev->dp8390, DP8390_FLAG_EVEN_MAC | DP8390_FLAG_CHECK_CR | DP8390_FLAG_CLEAR_IRQ); + dp8390_mem_alloc(dev->dp8390, 0x4000, 0x4000); + break; - case NE2K_ETHERNEXT_MC: - dev->maclocal[0] = 0x00; /* 00:00:D8 (Networth Inc. OID) */ - dev->maclocal[1] = 0x00; - dev->maclocal[2] = 0x79; - dev->pos_regs[0] = 0x1F; - dev->pos_regs[1] = 0x61; - rom = NULL; - dp8390_set_defaults(dev->dp8390, DP8390_FLAG_EVEN_MAC | DP8390_FLAG_CHECK_CR | - DP8390_FLAG_CLEAR_IRQ); - dp8390_mem_alloc(dev->dp8390, 0x4000, 0x4000); - break; + case NE2K_ETHERNEXT_MC: + dev->maclocal[0] = 0x00; /* 00:00:D8 (Networth Inc. OID) */ + dev->maclocal[1] = 0x00; + dev->maclocal[2] = 0x79; + dev->pos_regs[0] = 0x1F; + dev->pos_regs[1] = 0x61; + rom = NULL; + dp8390_set_defaults(dev->dp8390, DP8390_FLAG_EVEN_MAC | DP8390_FLAG_CHECK_CR | DP8390_FLAG_CLEAR_IRQ); + dp8390_mem_alloc(dev->dp8390, 0x4000, 0x4000); + break; - case NE2K_RTL8019AS: - case NE2K_RTL8029AS: - dev->is_pci = (dev->board == NE2K_RTL8029AS) ? 1 : 0; - dev->maclocal[0] = 0x00; /* 00:E0:4C (Realtek OID) */ - dev->maclocal[1] = 0xE0; - dev->maclocal[2] = 0x4C; - rom = (dev->board == NE2K_RTL8019AS) ? ROM_PATH_RTL8019 : ROM_PATH_RTL8029; - if (dev->is_pci) - dp8390_set_defaults(dev->dp8390, DP8390_FLAG_EVEN_MAC); - else - dp8390_set_defaults(dev->dp8390, DP8390_FLAG_EVEN_MAC | DP8390_FLAG_CLEAR_IRQ); - dp8390_set_id(dev->dp8390, 0x50, (dev->board == NE2K_RTL8019AS) ? 0x70 : 0x43); - dp8390_mem_alloc(dev->dp8390, 0x4000, 0x8000); - break; + case NE2K_RTL8019AS: + case NE2K_RTL8029AS: + dev->is_pci = (dev->board == NE2K_RTL8029AS) ? 1 : 0; + dev->maclocal[0] = 0x00; /* 00:E0:4C (Realtek OID) */ + dev->maclocal[1] = 0xE0; + dev->maclocal[2] = 0x4C; + rom = (dev->board == NE2K_RTL8019AS) ? ROM_PATH_RTL8019 : ROM_PATH_RTL8029; + if (dev->is_pci) + dp8390_set_defaults(dev->dp8390, DP8390_FLAG_EVEN_MAC); + else + dp8390_set_defaults(dev->dp8390, DP8390_FLAG_EVEN_MAC | DP8390_FLAG_CLEAR_IRQ); + dp8390_set_id(dev->dp8390, 0x50, (dev->board == NE2K_RTL8019AS) ? 0x70 : 0x43); + dp8390_mem_alloc(dev->dp8390, 0x4000, 0x8000); + break; } memcpy(dev->dp8390->physaddr, dev->maclocal, sizeof(dev->maclocal)); nelog(2, "%s: I/O=%04x, IRQ=%d, MAC=%02x:%02x:%02x:%02x:%02x:%02x\n", - dev->name, dev->base_address, dev->base_irq, - dev->dp8390->physaddr[0], dev->dp8390->physaddr[1], dev->dp8390->physaddr[2], - dev->dp8390->physaddr[3], dev->dp8390->physaddr[4], dev->dp8390->physaddr[5]); + dev->name, dev->base_address, dev->base_irq, + dev->dp8390->physaddr[0], dev->dp8390->physaddr[1], dev->dp8390->physaddr[2], + dev->dp8390->physaddr[3], dev->dp8390->physaddr[4], dev->dp8390->physaddr[5]); /* * Make this device known to the I/O system. * PnP and PCI devices start with address spaces inactive. */ if (dev->board < NE2K_RTL8019AS && dev->board != NE2K_ETHERNEXT_MC) - nic_ioset(dev, dev->base_address); + nic_ioset(dev, dev->base_address); /* Set up our BIOS ROM space, if any. */ nic_rom_init(dev, rom); if (dev->board >= NE2K_RTL8019AS) { - if (dev->is_pci) { - /* - * Configure the PCI space registers. - * - * We do this here, so the I/O routines are generic. - */ - memset(dev->pci_regs, 0, PCI_REGSIZE); + if (dev->is_pci) { + /* + * Configure the PCI space registers. + * + * We do this here, so the I/O routines are generic. + */ + memset(dev->pci_regs, 0, PCI_REGSIZE); - dev->pci_regs[0x00] = (PCI_VENDID&0xff); - dev->pci_regs[0x01] = (PCI_VENDID>>8); - dev->pci_regs[0x02] = (PCI_DEVID&0xff); - dev->pci_regs[0x03] = (PCI_DEVID>>8); + dev->pci_regs[0x00] = (PCI_VENDID & 0xff); + dev->pci_regs[0x01] = (PCI_VENDID >> 8); + dev->pci_regs[0x02] = (PCI_DEVID & 0xff); + dev->pci_regs[0x03] = (PCI_DEVID >> 8); - dev->pci_regs[0x04] = 0x03; /* IOEN */ - dev->pci_regs[0x05] = 0x00; - dev->pci_regs[0x07] = 0x02; /* DST0, medium devsel */ + dev->pci_regs[0x04] = 0x03; /* IOEN */ + dev->pci_regs[0x05] = 0x00; + dev->pci_regs[0x07] = 0x02; /* DST0, medium devsel */ - dev->pci_regs[0x09] = 0x00; /* PIFR */ + dev->pci_regs[0x09] = 0x00; /* PIFR */ - dev->pci_regs[0x0B] = 0x02; /* BCR: Network Controller */ - dev->pci_regs[0x0A] = 0x00; /* SCR: Ethernet */ + dev->pci_regs[0x0B] = 0x02; /* BCR: Network Controller */ + dev->pci_regs[0x0A] = 0x00; /* SCR: Ethernet */ - dev->pci_regs[0x2C] = (PCI_VENDID&0xff); - dev->pci_regs[0x2D] = (PCI_VENDID>>8); - dev->pci_regs[0x2E] = (PCI_DEVID&0xff); - dev->pci_regs[0x2F] = (PCI_DEVID>>8); + dev->pci_regs[0x2C] = (PCI_VENDID & 0xff); + dev->pci_regs[0x2D] = (PCI_VENDID >> 8); + dev->pci_regs[0x2E] = (PCI_DEVID & 0xff); + dev->pci_regs[0x2F] = (PCI_DEVID >> 8); - dev->pci_regs[0x3D] = PCI_INTA; /* PCI_IPR */ + dev->pci_regs[0x3D] = PCI_INTA; /* PCI_IPR */ - /* Enable our address space in PCI. */ - dev->pci_bar[0].addr_regs[0] = 0x01; + /* Enable our address space in PCI. */ + dev->pci_bar[0].addr_regs[0] = 0x01; - /* Enable our BIOS space in PCI, if needed. */ - if (dev->bios_addr > 0) { - dev->pci_bar[1].addr = 0xFFFF8000; - dev->pci_bar[1].addr_regs[1] = dev->bios_mask; - } else { - dev->pci_bar[1].addr = 0; - dev->bios_size = 0; - } + /* Enable our BIOS space in PCI, if needed. */ + if (dev->bios_addr > 0) { + dev->pci_bar[1].addr = 0xFFFF8000; + dev->pci_bar[1].addr_regs[1] = dev->bios_mask; + } else { + dev->pci_bar[1].addr = 0; + dev->bios_size = 0; + } - mem_mapping_disable(&dev->bios_rom.mapping); + mem_mapping_disable(&dev->bios_rom.mapping); - /* Add device to the PCI bus, keep its slot number. */ - dev->card = pci_add_card(PCI_ADD_NORMAL, - nic_pci_read, nic_pci_write, dev); - } + /* Add device to the PCI bus, keep its slot number. */ + dev->card = pci_add_card(PCI_ADD_NORMAL, + nic_pci_read, nic_pci_write, dev); + } - /* Initialize the RTL8029 EEPROM. */ + /* Initialize the RTL8029 EEPROM. */ memset(dev->eeprom, 0x00, sizeof(dev->eeprom)); - if (dev->board == NE2K_RTL8029AS) { - memcpy(&dev->eeprom[0x02], dev->maclocal, 6); + if (dev->board == NE2K_RTL8029AS) { + memcpy(&dev->eeprom[0x02], dev->maclocal, 6); - dev->eeprom[0x76] = - dev->eeprom[0x7A] = - dev->eeprom[0x7E] = (PCI_DEVID&0xff); - dev->eeprom[0x77] = - dev->eeprom[0x7B] = - dev->eeprom[0x7F] = (PCI_DEVID>>8); - dev->eeprom[0x78] = - dev->eeprom[0x7C] = (PCI_VENDID&0xff); - dev->eeprom[0x79] = - dev->eeprom[0x7D] = (PCI_VENDID>>8); - } else { - memcpy(&dev->eeprom[0x12], rtl8019as_pnp_rom, sizeof(rtl8019as_pnp_rom)); + dev->eeprom[0x76] = dev->eeprom[0x7A] = dev->eeprom[0x7E] = (PCI_DEVID & 0xff); + dev->eeprom[0x77] = dev->eeprom[0x7B] = dev->eeprom[0x7F] = (PCI_DEVID >> 8); + dev->eeprom[0x78] = dev->eeprom[0x7C] = (PCI_VENDID & 0xff); + dev->eeprom[0x79] = dev->eeprom[0x7D] = (PCI_VENDID >> 8); + } else { + memcpy(&dev->eeprom[0x12], rtl8019as_pnp_rom, sizeof(rtl8019as_pnp_rom)); - dev->pnp_card = isapnp_add_card(&dev->eeprom[0x12], sizeof(rtl8019as_pnp_rom), nic_pnp_config_changed, nic_pnp_csn_changed, nic_pnp_read_vendor_reg, nic_pnp_write_vendor_reg, dev); - } + dev->pnp_card = isapnp_add_card(&dev->eeprom[0x12], sizeof(rtl8019as_pnp_rom), nic_pnp_config_changed, nic_pnp_csn_changed, nic_pnp_read_vendor_reg, nic_pnp_write_vendor_reg, dev); + } } if (dev->board != NE2K_ETHERNEXT_MC) - /* Reset the board. */ - nic_reset(dev); + /* Reset the board. */ + nic_reset(dev); /* Attach ourselves to the network module. */ dev->dp8390->card = network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL); nelog(1, "%s: %s attached IO=0x%X IRQ=%d\n", dev->name, - dev->is_pci?"PCI":"ISA", dev->base_address, dev->base_irq); + dev->is_pci ? "PCI" : "ISA", dev->base_address, dev->base_irq); - return(dev); + return (dev); } - static void nic_close(void *priv) { - nic_t *dev = (nic_t *)priv; + nic_t *dev = (nic_t *) priv; nelog(1, "%s: closed\n", dev->name); @@ -1294,71 +1261,71 @@ static const device_config_t mca_mac_config[] = { // clang-format on const device_t ne1000_device = { - .name = "Novell NE1000", + .name = "Novell NE1000", .internal_name = "ne1k", - .flags = DEVICE_ISA, - .local = NE2K_NE1000, - .init = nic_init, - .close = nic_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = NE2K_NE1000, + .init = nic_init, + .close = nic_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ne1000_config + .force_redraw = NULL, + .config = ne1000_config }; const device_t ne2000_device = { - .name = "Novell NE2000", + .name = "Novell NE2000", .internal_name = "ne2k", - .flags = DEVICE_ISA | DEVICE_AT, - .local = NE2K_NE2000, - .init = nic_init, - .close = nic_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = NE2K_NE2000, + .init = nic_init, + .close = nic_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = ne2000_config + .force_redraw = NULL, + .config = ne2000_config }; const device_t ethernext_mc_device = { - .name = "NetWorth EtherNext/MC", + .name = "NetWorth EtherNext/MC", .internal_name = "ethernextmc", - .flags = DEVICE_MCA, - .local = NE2K_ETHERNEXT_MC, - .init = nic_init, - .close = nic_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = NE2K_ETHERNEXT_MC, + .init = nic_init, + .close = nic_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = mca_mac_config + .force_redraw = NULL, + .config = mca_mac_config }; const device_t rtl8019as_device = { - .name = "Realtek RTL8019AS", + .name = "Realtek RTL8019AS", .internal_name = "ne2kpnp", - .flags = DEVICE_ISA | DEVICE_AT, - .local = NE2K_RTL8019AS, - .init = nic_init, - .close = nic_close, - .reset = NULL, + .flags = DEVICE_ISA | DEVICE_AT, + .local = NE2K_RTL8019AS, + .init = nic_init, + .close = nic_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = rtl8019as_config + .force_redraw = NULL, + .config = rtl8019as_config }; const device_t rtl8029as_device = { - .name = "Realtek RTL8029AS", + .name = "Realtek RTL8029AS", .internal_name = "ne2kpci", - .flags = DEVICE_PCI, - .local = NE2K_RTL8029AS, - .init = nic_init, - .close = nic_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = NE2K_RTL8029AS, + .init = nic_init, + .close = nic_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = rtl8029as_config + .force_redraw = NULL, + .config = rtl8029as_config }; diff --git a/src/network/net_pcap.c b/src/network/net_pcap.c index 9aa486316..69dc2ca14 100644 --- a/src/network/net_pcap.c +++ b/src/network/net_pcap.c @@ -52,14 +52,14 @@ #include #include #ifdef _WIN32 -#define WIN32_LEAN_AND_MEAN -#include -#include +# define WIN32_LEAN_AND_MEAN +# include +# include #else -#include -#include -#include -#include +# include +# include +# include +# include #endif #define HAVE_STDARG_H @@ -82,45 +82,45 @@ enum { }; #ifdef __APPLE__ -#include +# include #else -typedef int bpf_int32; +typedef int bpf_int32; typedef unsigned int bpf_u_int32; /* * The instruction data structure. */ struct bpf_insn { - unsigned short code; - unsigned char jt; - unsigned char jf; - bpf_u_int32 k; + unsigned short code; + unsigned char jt; + unsigned char jf; + bpf_u_int32 k; }; /* * Structure for "pcap_compile()", "pcap_setfilter()", etc.. */ struct bpf_program { - unsigned int bf_len; + unsigned int bf_len; struct bpf_insn *bf_insns; }; -typedef struct pcap_if pcap_if_t; +typedef struct pcap_if pcap_if_t; -#define PCAP_ERRBUF_SIZE 256 +# define PCAP_ERRBUF_SIZE 256 struct pcap_pkthdr { - struct timeval ts; - bpf_u_int32 caplen; - bpf_u_int32 len; + struct timeval ts; + bpf_u_int32 caplen; + bpf_u_int32 len; }; struct pcap_if { struct pcap_if *next; - char *name; - char *description; - void *addresses; - bpf_u_int32 flags; + char *name; + char *description; + void *addresses; + bpf_u_int32 flags; }; struct pcap_send_queue { @@ -154,39 +154,39 @@ typedef struct { uint8_t *mac_addr; } net_pcap_params_t; -static volatile void *libpcap_handle; /* handle to WinPcap DLL */ +static volatile void *libpcap_handle; /* handle to WinPcap DLL */ /* Pointers to the real functions. */ -static const char *(*f_pcap_lib_version)(void); -static int (*f_pcap_findalldevs)(pcap_if_t **,char *); -static void (*f_pcap_freealldevs)(void *); -static void *(*f_pcap_open_live)(const char *,int,int,int,char *); -static int (*f_pcap_compile)(void *,void *, const char *,int,bpf_u_int32); -static int (*f_pcap_setfilter)(void *,void *); +static const char *(*f_pcap_lib_version)(void); +static int (*f_pcap_findalldevs)(pcap_if_t **, char *); +static void (*f_pcap_freealldevs)(void *); +static void *(*f_pcap_open_live)(const char *, int, int, int, char *); +static int (*f_pcap_compile)(void *, void *, const char *, int, bpf_u_int32); +static int (*f_pcap_setfilter)(void *, void *); static const unsigned char - *(*f_pcap_next)(void *,void *); -static int (*f_pcap_sendpacket)(void *,const unsigned char *,int); -static void (*f_pcap_close)(void *); -static int (*f_pcap_setnonblock)(void*, int, char*); -static int (*f_pcap_set_immediate_mode)(void *, int); -static int (*f_pcap_set_promisc)(void *, int); -static int (*f_pcap_set_snaplen)(void *, int); -static int (*f_pcap_dispatch)(void *, int, pcap_handler callback, u_char *user); -static void *(*f_pcap_create)(const char *, char*); -static int (*f_pcap_activate)(void *); -static void *(*f_pcap_geterr)(void *); + *(*f_pcap_next)(void *, void *); +static int (*f_pcap_sendpacket)(void *, const unsigned char *, int); +static void (*f_pcap_close)(void *); +static int (*f_pcap_setnonblock)(void *, int, char *); +static int (*f_pcap_set_immediate_mode)(void *, int); +static int (*f_pcap_set_promisc)(void *, int); +static int (*f_pcap_set_snaplen)(void *, int); +static int (*f_pcap_dispatch)(void *, int, pcap_handler callback, u_char *user); +static void *(*f_pcap_create)(const char *, char *); +static int (*f_pcap_activate)(void *); +static void *(*f_pcap_geterr)(void *); #ifdef _WIN32 static HANDLE (*f_pcap_getevent)(void *); -static int (*f_pcap_sendqueue_queue)(void *, void *, void *); -static u_int (*f_pcap_sendqueue_transmit)(void *, void *, int sync); -static void *(*f_pcap_sendqueue_alloc)(u_int memsize); -static void (*f_pcap_sendqueue_destroy)(void *); +static int (*f_pcap_sendqueue_queue)(void *, void *, void *); +static u_int (*f_pcap_sendqueue_transmit)(void *, void *, int sync); +static void *(*f_pcap_sendqueue_alloc)(u_int memsize); +static void (*f_pcap_sendqueue_destroy)(void *); #else -static int (*f_pcap_get_selectable_fd)(void *); +static int (*f_pcap_get_selectable_fd)(void *); #endif static dllimp_t pcap_imports[] = { - { "pcap_lib_version", &f_pcap_lib_version }, + {"pcap_lib_version", &f_pcap_lib_version }, { "pcap_findalldevs", &f_pcap_findalldevs }, { "pcap_freealldevs", &f_pcap_freealldevs }, { "pcap_open_live", &f_pcap_open_live }, @@ -210,7 +210,7 @@ static dllimp_t pcap_imports[] = { { "pcap_sendqueue_alloc", &f_pcap_sendqueue_alloc }, { "pcap_sendqueue_destroy", &f_pcap_sendqueue_destroy }, #else - { "pcap_get_selectable_fd", &f_pcap_get_selectable_fd }, + { "pcap_get_selectable_fd", &f_pcap_get_selectable_fd }, #endif { NULL, NULL }, }; @@ -224,20 +224,19 @@ pcap_log(const char *fmt, ...) va_list ap; if (pcap_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define pcap_log(fmt, ...) +# define pcap_log(fmt, ...) #endif - static void net_pcap_rx_handler(uint8_t *user, const struct pcap_pkthdr *h, const uint8_t *bytes) { - net_pcap_t *pcap = (net_pcap_t*)user; + net_pcap_t *pcap = (net_pcap_t *) user; memcpy(pcap->pkt.data, bytes, h->caplen); pcap->pkt.len = h->caplen; network_rx_put_pkt(pcap->card, &pcap->pkt); @@ -248,15 +247,15 @@ void net_pcap_in(void *pcap, uint8_t *bufp, int len) { if (pcap == NULL) - return; + return; - f_pcap_sendpacket((void *)pcap, bufp, len); + f_pcap_sendpacket((void *) pcap, bufp, len); } void net_pcap_in_available(void *priv) { - net_pcap_t *pcap = (net_pcap_t *)priv; + net_pcap_t *pcap = (net_pcap_t *) priv; net_event_set(&pcap->tx_event); } @@ -264,14 +263,14 @@ net_pcap_in_available(void *priv) static void net_pcap_thread(void *priv) { - net_pcap_t *pcap = (net_pcap_t*)priv; + net_pcap_t *pcap = (net_pcap_t *) priv; pcap_log("PCAP: polling started.\n"); HANDLE events[NET_EVENT_MAX]; events[NET_EVENT_STOP] = net_event_get_handle(&pcap->stop_event); - events[NET_EVENT_TX] = net_event_get_handle(&pcap->tx_event); - events[NET_EVENT_RX] = f_pcap_getevent((void *)pcap->pcap); + events[NET_EVENT_TX] = net_event_get_handle(&pcap->tx_event); + events[NET_EVENT_RX] = f_pcap_getevent((void *) pcap->pcap); bool run = true; @@ -297,7 +296,7 @@ net_pcap_thread(void *priv) break; case NET_EVENT_RX: - f_pcap_dispatch(pcap->pcap, PCAP_PKT_BATCH, net_pcap_rx_handler, (u_char *)pcap); + f_pcap_dispatch(pcap->pcap, PCAP_PKT_BATCH, net_pcap_rx_handler, (u_char *) pcap); break; } } @@ -308,7 +307,7 @@ net_pcap_thread(void *priv) static void net_pcap_thread(void *priv) { - net_pcap_t *pcap = (net_pcap_t*)priv; + net_pcap_t *pcap = (net_pcap_t *) priv; pcap_log("PCAP: polling started.\n"); @@ -341,9 +340,8 @@ net_pcap_thread(void *priv) } if (pfd[NET_EVENT_RX].revents & POLLIN) { - f_pcap_dispatch(pcap->pcap, PCAP_PKT_BATCH, net_pcap_rx_handler, (u_char *)pcap); + f_pcap_dispatch(pcap->pcap, PCAP_PKT_BATCH, net_pcap_rx_handler, (u_char *) pcap); } - } pcap_log("PCAP: polling stopped.\n"); @@ -360,9 +358,9 @@ net_pcap_thread(void *priv) int net_pcap_prepare(netdev_t *list) { - char errbuf[PCAP_ERRBUF_SIZE]; + char errbuf[PCAP_ERRBUF_SIZE]; pcap_if_t *devlist, *dev; - int i = 0; + int i = 0; /* Try loading the DLL. */ #ifdef _WIN32 @@ -374,44 +372,44 @@ net_pcap_prepare(netdev_t *list) #endif if (libpcap_handle == NULL) { pcap_log("PCAP: error loading pcap module\n"); - return(-1); + return (-1); } /* Retrieve the device list from the local machine */ if (f_pcap_findalldevs(&devlist, errbuf) == -1) { - pcap_log("PCAP: error in pcap_findalldevs: %s\n", errbuf); - return(-1); + pcap_log("PCAP: error in pcap_findalldevs: %s\n", errbuf); + return (-1); } - for (dev=devlist; dev!=NULL; dev=dev->next) { - if (i >= (NET_HOST_INTF_MAX - 1)) - break; + for (dev = devlist; dev != NULL; dev = dev->next) { + if (i >= (NET_HOST_INTF_MAX - 1)) + break; - /** - * we initialize the strings to NULL first for strncpy - */ + /** + * we initialize the strings to NULL first for strncpy + */ - memset(list->device, '\0', sizeof(list->device)); - memset(list->description, '\0', sizeof(list->description)); + memset(list->device, '\0', sizeof(list->device)); + memset(list->description, '\0', sizeof(list->description)); - strncpy(list->device, dev->name, sizeof(list->device) - 1); - if (dev->description) { - strncpy(list->description, dev->description, sizeof(list->description) - 1); - } else { - /* if description is NULL, set the name. This allows pcap to display *something* useful under WINE */ - strncpy(list->description, dev->name, sizeof(list->description) - 1); - } + strncpy(list->device, dev->name, sizeof(list->device) - 1); + if (dev->description) { + strncpy(list->description, dev->description, sizeof(list->description) - 1); + } else { + /* if description is NULL, set the name. This allows pcap to display *something* useful under WINE */ + strncpy(list->description, dev->name, sizeof(list->description) - 1); + } - list++; i++; + list++; + i++; } /* Release the memory. */ f_pcap_freealldevs(devlist); - return(i); + return (i); } - /* * Initialize (Win)Pcap for use. * @@ -422,12 +420,12 @@ net_pcap_prepare(netdev_t *list) void * net_pcap_init(const netcard_t *card, const uint8_t *mac_addr, void *priv) { - char errbuf[PCAP_ERRBUF_SIZE]; - char *str; - char filter_exp[255]; + char errbuf[PCAP_ERRBUF_SIZE]; + char *str; + char filter_exp[255]; struct bpf_program fp; - char *intf_name = (char*)priv; + char *intf_name = (char *) priv; /* Did we already load the library? */ if (libpcap_handle == NULL) { @@ -451,7 +449,7 @@ net_pcap_init(const netcard_t *card, const uint8_t *mac_addr, void *priv) pcap_log("PCAP: interface: %s\n", intf_name); net_pcap_t *pcap = calloc(1, sizeof(net_pcap_t)); - pcap->card = (netcard_t *)card; + pcap->card = (netcard_t *) card; memcpy(pcap->mac_addr, mac_addr, sizeof(pcap->mac_addr)); if ((pcap->pcap = f_pcap_create(intf_name, errbuf)) == NULL) { @@ -494,7 +492,7 @@ net_pcap_init(const netcard_t *card, const uint8_t *mac_addr, void *priv) return NULL; } } else { - pcap_log("PCAP: could not compile filter (%s) : %s!\n", filter_exp, f_pcap_geterr((void*)pcap->pcap)); + pcap_log("PCAP: could not compile filter (%s) : %s!\n", filter_exp, f_pcap_geterr((void *) pcap->pcap)); f_pcap_close((void *) pcap->pcap); free(pcap); return NULL; @@ -523,7 +521,7 @@ net_pcap_close(void *priv) if (!priv) return; - net_pcap_t *pcap = (net_pcap_t *)priv; + net_pcap_t *pcap = (net_pcap_t *) priv; pcap_log("PCAP: closing.\n"); @@ -541,10 +539,10 @@ net_pcap_close(void *priv) free(pcap->pkt.data); #ifdef _WIN32 - f_pcap_sendqueue_destroy((void*)pcap->pcap_queue); + f_pcap_sendqueue_destroy((void *) pcap->pcap_queue); #endif /* OK, now shut down Pcap itself. */ - f_pcap_close((void*)pcap->pcap); + f_pcap_close((void *) pcap->pcap); net_event_close(&pcap->tx_event); net_event_close(&pcap->stop_event); diff --git a/src/network/net_pcnet.c b/src/network/net_pcnet.c index 340b056d3..1ee1d1276 100644 --- a/src/network/net_pcnet.c +++ b/src/network/net_pcnet.c @@ -17,9 +17,9 @@ * Copyright 2016-2019 Miran Grca. */ #ifdef _WIN32 -#include +# include #else -#include +# include #endif #include #include @@ -49,104 +49,103 @@ #include <86box/bswap.h> /* PCI info. */ -#define PCI_VENDID 0x1022 /* AMD */ -#define PCI_DEVID 0x2000 /* PCnet-PCI II (Am79c970A) */ -#define PCI_REGSIZE 256 /* size of PCI space */ +#define PCI_VENDID 0x1022 /* AMD */ +#define PCI_DEVID 0x2000 /* PCnet-PCI II (Am79c970A) */ +#define PCI_REGSIZE 256 /* size of PCI space */ #pragma pack(1) -typedef struct RTNETETHERHDR -{ - uint8_t DstMac[6]; - uint8_t SrcMac[6]; +typedef struct RTNETETHERHDR { + uint8_t DstMac[6]; + uint8_t SrcMac[6]; /** Ethernet frame type or frame size, depending on the kind of ethernet. * This is big endian on the wire. */ - uint16_t EtherType; + uint16_t EtherType; } RTNETETHERHDR; #pragma pack() -#define BCR_MAX_RAP 50 -#define MII_MAX_REG 32 -#define CSR_MAX_REG 128 +#define BCR_MAX_RAP 50 +#define MII_MAX_REG 32 +#define CSR_MAX_REG 128 /** Maximum number of times we report a link down to the guest (failure to send frame) */ -#define PCNET_MAX_LINKDOWN_REPORTED 3 +#define PCNET_MAX_LINKDOWN_REPORTED 3 /** Maximum frame size we handle */ -#define MAX_FRAME 1536 +#define MAX_FRAME 1536 /** @name Bus configuration registers * @{ */ -#define BCR_MSRDA 0 -#define BCR_MSWRA 1 -#define BCR_MC 2 -#define BCR_RESERVED3 3 -#define BCR_LNKST 4 -#define BCR_LED1 5 -#define BCR_LED2 6 -#define BCR_LED3 7 -#define BCR_SWCONFIG 8 -#define BCR_FDC 9 +#define BCR_MSRDA 0 +#define BCR_MSWRA 1 +#define BCR_MC 2 +#define BCR_RESERVED3 3 +#define BCR_LNKST 4 +#define BCR_LED1 5 +#define BCR_LED2 6 +#define BCR_LED3 7 +#define BCR_SWCONFIG 8 +#define BCR_FDC 9 /* 10 - 15 = reserved */ -#define BCR_IOBASEL 16 /* Reserved */ -#define BCR_IOBASEU 16 /* Reserved */ -#define BCR_BSBC 18 -#define BCR_EECAS 19 -#define BCR_SWS 20 -#define BCR_INTCON 21 /* Reserved */ -#define BCR_PLAT 22 -#define BCR_PCISVID 23 -#define BCR_PCISID 24 -#define BCR_SRAMSIZ 25 -#define BCR_SRAMB 26 -#define BCR_SRAMIC 27 -#define BCR_EBADDRL 28 -#define BCR_EBADDRU 29 -#define BCR_EBD 30 -#define BCR_STVAL 31 -#define BCR_MIICAS 32 -#define BCR_MIIADDR 33 -#define BCR_MIIMDR 34 -#define BCR_PCIVID 35 -#define BCR_PMC_A 36 -#define BCR_DATA0 37 -#define BCR_DATA1 38 -#define BCR_DATA2 39 -#define BCR_DATA3 40 -#define BCR_DATA4 41 -#define BCR_DATA5 42 -#define BCR_DATA6 43 -#define BCR_DATA7 44 -#define BCR_PMR1 45 -#define BCR_PMR2 46 -#define BCR_PMR3 47 +#define BCR_IOBASEL 16 /* Reserved */ +#define BCR_IOBASEU 16 /* Reserved */ +#define BCR_BSBC 18 +#define BCR_EECAS 19 +#define BCR_SWS 20 +#define BCR_INTCON 21 /* Reserved */ +#define BCR_PLAT 22 +#define BCR_PCISVID 23 +#define BCR_PCISID 24 +#define BCR_SRAMSIZ 25 +#define BCR_SRAMB 26 +#define BCR_SRAMIC 27 +#define BCR_EBADDRL 28 +#define BCR_EBADDRU 29 +#define BCR_EBD 30 +#define BCR_STVAL 31 +#define BCR_MIICAS 32 +#define BCR_MIIADDR 33 +#define BCR_MIIMDR 34 +#define BCR_PCIVID 35 +#define BCR_PMC_A 36 +#define BCR_DATA0 37 +#define BCR_DATA1 38 +#define BCR_DATA2 39 +#define BCR_DATA3 40 +#define BCR_DATA4 41 +#define BCR_DATA5 42 +#define BCR_DATA6 43 +#define BCR_DATA7 44 +#define BCR_PMR1 45 +#define BCR_PMR2 46 +#define BCR_PMR3 47 /** @} */ /** @name Bus configuration sub register accessors. * @{ */ -#define BCR_DWIO(S) !!((S)->aBCR[BCR_BSBC] & 0x0080) -#define BCR_SSIZE32(S) !!((S)->aBCR[BCR_SWS ] & 0x0100) -#define BCR_SWSTYLE(S) ((S)->aBCR[BCR_SWS ] & 0x00FF) +#define BCR_DWIO(S) !!((S)->aBCR[BCR_BSBC] & 0x0080) +#define BCR_SSIZE32(S) !!((S)->aBCR[BCR_SWS] & 0x0100) +#define BCR_SWSTYLE(S) ((S)->aBCR[BCR_SWS] & 0x00FF) /** @} */ /** @name CSR subregister accessors. * @{ */ -#define CSR_INIT(S) !!((S)->aCSR[0] & 0x0001) /**< Init assertion */ -#define CSR_STRT(S) !!((S)->aCSR[0] & 0x0002) /**< Start assertion */ -#define CSR_STOP(S) !!((S)->aCSR[0] & 0x0004) /**< Stop assertion */ -#define CSR_TDMD(S) !!((S)->aCSR[0] & 0x0008) /**< Transmit demand. (perform xmit poll now (readable, settable, not clearable) */ -#define CSR_TXON(S) !!((S)->aCSR[0] & 0x0010) /**< Transmit on (readonly) */ -#define CSR_RXON(S) !!((S)->aCSR[0] & 0x0020) /**< Receive On */ -#define CSR_INEA(S) !!((S)->aCSR[0] & 0x0040) /**< Interrupt Enable */ -#define CSR_LAPPEN(S) !!((S)->aCSR[3] & 0x0020) /**< Look Ahead Packet Processing Enable */ -#define CSR_DXSUFLO(S) !!((S)->aCSR[3] & 0x0040) /**< Disable Transmit Stop on Underflow error */ -#define CSR_ASTRP_RCV(S) !!((S)->aCSR[4] & 0x0400) /**< Auto Strip Receive */ -#define CSR_DPOLL(S) !!((S)->aCSR[4] & 0x1000) /**< Disable Transmit Polling */ -#define CSR_SPND(S) !!((S)->aCSR[5] & 0x0001) /**< Suspend */ -#define CSR_LTINTEN(S) !!((S)->aCSR[5] & 0x4000) /**< Last Transmit Interrupt Enable */ -#define CSR_TOKINTD(S) !!((S)->aCSR[5] & 0x8000) /**< Transmit OK Interrupt Disable */ +#define CSR_INIT(S) !!((S)->aCSR[0] & 0x0001) /**< Init assertion */ +#define CSR_STRT(S) !!((S)->aCSR[0] & 0x0002) /**< Start assertion */ +#define CSR_STOP(S) !!((S)->aCSR[0] & 0x0004) /**< Stop assertion */ +#define CSR_TDMD(S) !!((S)->aCSR[0] & 0x0008) /**< Transmit demand. (perform xmit poll now (readable, settable, not clearable) */ +#define CSR_TXON(S) !!((S)->aCSR[0] & 0x0010) /**< Transmit on (readonly) */ +#define CSR_RXON(S) !!((S)->aCSR[0] & 0x0020) /**< Receive On */ +#define CSR_INEA(S) !!((S)->aCSR[0] & 0x0040) /**< Interrupt Enable */ +#define CSR_LAPPEN(S) !!((S)->aCSR[3] & 0x0020) /**< Look Ahead Packet Processing Enable */ +#define CSR_DXSUFLO(S) !!((S)->aCSR[3] & 0x0040) /**< Disable Transmit Stop on Underflow error */ +#define CSR_ASTRP_RCV(S) !!((S)->aCSR[4] & 0x0400) /**< Auto Strip Receive */ +#define CSR_DPOLL(S) !!((S)->aCSR[4] & 0x1000) /**< Disable Transmit Polling */ +#define CSR_SPND(S) !!((S)->aCSR[5] & 0x0001) /**< Suspend */ +#define CSR_LTINTEN(S) !!((S)->aCSR[5] & 0x4000) /**< Last Transmit Interrupt Enable */ +#define CSR_TOKINTD(S) !!((S)->aCSR[5] & 0x8000) /**< Transmit OK Interrupt Disable */ -#define CSR_STINT !!((S)->aCSR[7] & 0x0800) /**< Software Timer Interrupt */ -#define CSR_STINTE !!((S)->aCSR[7] & 0x0400) /**< Software Timer Interrupt Enable */ +#define CSR_STINT !!((S)->aCSR[7] & 0x0800) /**< Software Timer Interrupt */ +#define CSR_STINTE !!((S)->aCSR[7] & 0x0400) /**< Software Timer Interrupt Enable */ #define CSR_DRX(S) !!((S)->aCSR[15] & 0x0001) /**< Disable Receiver */ #define CSR_DTX(S) !!((S)->aCSR[15] & 0x0002) /**< Disable Transmit */ @@ -157,73 +156,71 @@ typedef struct RTNETETHERHDR /** @name CSR register accessors. * @{ */ -#define CSR_IADR(S) (*(uint32_t*)((S)->aCSR + 1)) /**< Initialization Block Address */ -#define CSR_CRBA(S) (*(uint32_t*)((S)->aCSR + 18)) /**< Current Receive Buffer Address */ -#define CSR_CXBA(S) (*(uint32_t*)((S)->aCSR + 20)) /**< Current Transmit Buffer Address */ -#define CSR_NRBA(S) (*(uint32_t*)((S)->aCSR + 22)) /**< Next Receive Buffer Address */ -#define CSR_BADR(S) (*(uint32_t*)((S)->aCSR + 24)) /**< Base Address of Receive Ring */ -#define CSR_NRDA(S) (*(uint32_t*)((S)->aCSR + 26)) /**< Next Receive Descriptor Address */ -#define CSR_CRDA(S) (*(uint32_t*)((S)->aCSR + 28)) /**< Current Receive Descriptor Address */ -#define CSR_BADX(S) (*(uint32_t*)((S)->aCSR + 30)) /**< Base Address of Transmit Descriptor */ -#define CSR_NXDA(S) (*(uint32_t*)((S)->aCSR + 32)) /**< Next Transmit Descriptor Address */ -#define CSR_CXDA(S) (*(uint32_t*)((S)->aCSR + 34)) /**< Current Transmit Descriptor Address */ -#define CSR_NNRD(S) (*(uint32_t*)((S)->aCSR + 36)) /**< Next Next Receive Descriptor Address */ -#define CSR_NNXD(S) (*(uint32_t*)((S)->aCSR + 38)) /**< Next Next Transmit Descriptor Address */ -#define CSR_CRBC(S) ((S)->aCSR[40]) /**< Current Receive Byte Count */ -#define CSR_CRST(S) ((S)->aCSR[41]) /**< Current Receive Status */ -#define CSR_CXBC(S) ((S)->aCSR[42]) /**< Current Transmit Byte Count */ -#define CSR_CXST(S) ((S)->aCSR[43]) /**< Current transmit status */ -#define CSR_NRBC(S) ((S)->aCSR[44]) /**< Next Receive Byte Count */ -#define CSR_NRST(S) ((S)->aCSR[45]) /**< Next Receive Status */ -#define CSR_POLL(S) ((S)->aCSR[46]) /**< Transmit Poll Time Counter */ -#define CSR_PINT(S) ((S)->aCSR[47]) /**< Transmit Polling Interval */ -#define CSR_PXDA(S) (*(uint32_t*)((S)->aCSR + 60)) /**< Previous Transmit Descriptor Address*/ -#define CSR_PXBC(S) ((S)->aCSR[62]) /**< Previous Transmit Byte Count */ -#define CSR_PXST(S) ((S)->aCSR[63]) /**< Previous Transmit Status */ -#define CSR_NXBA(S) (*(uint32_t*)((S)->aCSR + 64)) /**< Next Transmit Buffer Address */ -#define CSR_NXBC(S) ((S)->aCSR[66]) /**< Next Transmit Byte Count */ -#define CSR_NXST(S) ((S)->aCSR[67]) /**< Next Transmit Status */ -#define CSR_RCVRC(S) ((S)->aCSR[72]) /**< Receive Descriptor Ring Counter */ -#define CSR_XMTRC(S) ((S)->aCSR[74]) /**< Transmit Descriptor Ring Counter */ -#define CSR_RCVRL(S) ((S)->aCSR[76]) /**< Receive Descriptor Ring Length */ -#define CSR_XMTRL(S) ((S)->aCSR[78]) /**< Transmit Descriptor Ring Length */ -#define CSR_MISSC(S) ((S)->aCSR[112]) /**< Missed Frame Count */ +#define CSR_IADR(S) (*(uint32_t *) ((S)->aCSR + 1)) /**< Initialization Block Address */ +#define CSR_CRBA(S) (*(uint32_t *) ((S)->aCSR + 18)) /**< Current Receive Buffer Address */ +#define CSR_CXBA(S) (*(uint32_t *) ((S)->aCSR + 20)) /**< Current Transmit Buffer Address */ +#define CSR_NRBA(S) (*(uint32_t *) ((S)->aCSR + 22)) /**< Next Receive Buffer Address */ +#define CSR_BADR(S) (*(uint32_t *) ((S)->aCSR + 24)) /**< Base Address of Receive Ring */ +#define CSR_NRDA(S) (*(uint32_t *) ((S)->aCSR + 26)) /**< Next Receive Descriptor Address */ +#define CSR_CRDA(S) (*(uint32_t *) ((S)->aCSR + 28)) /**< Current Receive Descriptor Address */ +#define CSR_BADX(S) (*(uint32_t *) ((S)->aCSR + 30)) /**< Base Address of Transmit Descriptor */ +#define CSR_NXDA(S) (*(uint32_t *) ((S)->aCSR + 32)) /**< Next Transmit Descriptor Address */ +#define CSR_CXDA(S) (*(uint32_t *) ((S)->aCSR + 34)) /**< Current Transmit Descriptor Address */ +#define CSR_NNRD(S) (*(uint32_t *) ((S)->aCSR + 36)) /**< Next Next Receive Descriptor Address */ +#define CSR_NNXD(S) (*(uint32_t *) ((S)->aCSR + 38)) /**< Next Next Transmit Descriptor Address */ +#define CSR_CRBC(S) ((S)->aCSR[40]) /**< Current Receive Byte Count */ +#define CSR_CRST(S) ((S)->aCSR[41]) /**< Current Receive Status */ +#define CSR_CXBC(S) ((S)->aCSR[42]) /**< Current Transmit Byte Count */ +#define CSR_CXST(S) ((S)->aCSR[43]) /**< Current transmit status */ +#define CSR_NRBC(S) ((S)->aCSR[44]) /**< Next Receive Byte Count */ +#define CSR_NRST(S) ((S)->aCSR[45]) /**< Next Receive Status */ +#define CSR_POLL(S) ((S)->aCSR[46]) /**< Transmit Poll Time Counter */ +#define CSR_PINT(S) ((S)->aCSR[47]) /**< Transmit Polling Interval */ +#define CSR_PXDA(S) (*(uint32_t *) ((S)->aCSR + 60)) /**< Previous Transmit Descriptor Address*/ +#define CSR_PXBC(S) ((S)->aCSR[62]) /**< Previous Transmit Byte Count */ +#define CSR_PXST(S) ((S)->aCSR[63]) /**< Previous Transmit Status */ +#define CSR_NXBA(S) (*(uint32_t *) ((S)->aCSR + 64)) /**< Next Transmit Buffer Address */ +#define CSR_NXBC(S) ((S)->aCSR[66]) /**< Next Transmit Byte Count */ +#define CSR_NXST(S) ((S)->aCSR[67]) /**< Next Transmit Status */ +#define CSR_RCVRC(S) ((S)->aCSR[72]) /**< Receive Descriptor Ring Counter */ +#define CSR_XMTRC(S) ((S)->aCSR[74]) /**< Transmit Descriptor Ring Counter */ +#define CSR_RCVRL(S) ((S)->aCSR[76]) /**< Receive Descriptor Ring Length */ +#define CSR_XMTRL(S) ((S)->aCSR[78]) /**< Transmit Descriptor Ring Length */ +#define CSR_MISSC(S) ((S)->aCSR[112]) /**< Missed Frame Count */ /** Calculates the full physical address. */ -#define PHYSADDR(S,A) ((A) | (S)->GCUpperPhys) - +#define PHYSADDR(S, A) ((A) | (S)->GCUpperPhys) static const uint8_t am79c961_pnp_rom[] = { - 0x04, 0x96, 0x55, 0xaa, 0x00, 0x00, 0x00, 0x00, 0x00, /* ADV55AA, dummy checksum (filled in by isapnp_add_card) */ - 0x0a, 0x10, 0x00, /* PnP version 1.0, vendor version 0.0 */ + 0x04, 0x96, 0x55, 0xaa, 0x00, 0x00, 0x00, 0x00, 0x00, /* ADV55AA, dummy checksum (filled in by isapnp_add_card) */ + 0x0a, 0x10, 0x00, /* PnP version 1.0, vendor version 0.0 */ 0x82, 0x1c, 0x00, 'A', 'M', 'D', ' ', 'E', 't', 'h', 'e', 'r', 'n', 'e', 't', ' ', 'N', 'e', 't', 'w', 'o', 'r', 'k', ' ', 'A', 'd', 'a', 'p', 't', 'e', 'r', /* ANSI identifier */ - 0x16, 0x04, 0x96, 0x55, 0xaa, 0x00, 0xbd, /* logical device ADV55AA, supports vendor-specific registers 0x38/0x3A/0x3B/0x3C/0x3D/0x3F */ - 0x1c, 0x41, 0xd0, 0x82, 0x8c, /* compatible device PNP828C */ - 0x47, 0x00, 0x00, 0x02, 0xe0, 0x03, 0x20, 0x18, /* I/O 0x200-0x3E0, decodes 10-bit, 32-byte alignment, 24 addresses */ - 0x2a, 0xe8, 0x02, /* DMA 3/5/6/7, compatibility, no count by word, no count by byte, not bus master, 16-bit only */ - 0x23, 0x38, 0x9e, 0x09, /* IRQ 3/4/5/9/10/11/12/15, low true level sensitive, high true edge sensitive */ + 0x16, 0x04, 0x96, 0x55, 0xaa, 0x00, 0xbd, /* logical device ADV55AA, supports vendor-specific registers 0x38/0x3A/0x3B/0x3C/0x3D/0x3F */ + 0x1c, 0x41, 0xd0, 0x82, 0x8c, /* compatible device PNP828C */ + 0x47, 0x00, 0x00, 0x02, 0xe0, 0x03, 0x20, 0x18, /* I/O 0x200-0x3E0, decodes 10-bit, 32-byte alignment, 24 addresses */ + 0x2a, 0xe8, 0x02, /* DMA 3/5/6/7, compatibility, no count by word, no count by byte, not bus master, 16-bit only */ + 0x23, 0x38, 0x9e, 0x09, /* IRQ 3/4/5/9/10/11/12/15, low true level sensitive, high true edge sensitive */ 0x79, 0x00 /* end tag, dummy checksum (filled in by isapnp_add_card) */ }; - typedef struct { - mem_mapping_t mmio_mapping; - const char *name; - int board; - int is_pci, is_vlb, is_isa; - int PCIBase; - int MMIOBase; - uint32_t base_address; - int base_irq; - int dma_channel; - int card; /* PCI card slot */ - int xmit_pos; + mem_mapping_t mmio_mapping; + const char *name; + int board; + int is_pci, is_vlb, is_isa; + int PCIBase; + int MMIOBase; + uint32_t base_address; + int base_irq; + int dma_channel; + int card; /* PCI card slot */ + int xmit_pos; /** Register Address Pointer */ uint32_t u32RAP; /** Internal interrupt service */ - int32_t iISR; + int32_t iISR; /** ??? */ uint32_t u32Lnkst; /** Address of the RX descriptor table (ring). Loaded at init. */ @@ -239,7 +236,7 @@ typedef struct { /** The recv buffer. */ uint8_t abRecvBuf[4096]; /** Size of a RX/TX descriptor (8 or 16 bytes according to SWSTYLE */ - int iLog2DescSize; + int iLog2DescSize; /** Bits 16..23 in 16-bit mode */ uint32_t GCUpperPhys; /** We are waiting/about to start waiting for more receive buffers. */ @@ -258,17 +255,16 @@ typedef struct { /** Number of times we've reported the link down. */ uint32_t cLinkDownReported; /** MS to wait before we enable the link. */ - uint32_t cMsLinkUpDelay; - int transfer_size; - uint8_t maclocal[6]; /* configured MAC (local) address */ + uint32_t cMsLinkUpDelay; + int transfer_size; + uint8_t maclocal[6]; /* configured MAC (local) address */ pc_timer_t timer, timer_soft_int, timer_restore; netcard_t *netcard; } nic_t; /** @todo All structs: big endian? */ -struct INITBLK16 -{ +struct INITBLK16 { uint16_t mode; /**< copied into csr15 */ uint16_t padr1; /**< MAC 0..15 */ uint16_t padr2; /**< MAC 16..32 */ @@ -277,125 +273,121 @@ struct INITBLK16 uint16_t ladrf2; /**< logical address filter 16..31 */ uint16_t ladrf3; /**< logical address filter 32..47 */ uint16_t ladrf4; /**< logical address filter 48..63 */ - uint32_t rdra:24; /**< address of receive descriptor ring */ - uint32_t res1:5; /**< reserved */ - uint32_t rlen:3; /**< number of receive descriptor ring entries */ - uint32_t tdra:24; /**< address of transmit descriptor ring */ - uint32_t res2:5; /**< reserved */ - uint32_t tlen:3; /**< number of transmit descriptor ring entries */ + uint32_t rdra : 24; /**< address of receive descriptor ring */ + uint32_t res1 : 5; /**< reserved */ + uint32_t rlen : 3; /**< number of receive descriptor ring entries */ + uint32_t tdra : 24; /**< address of transmit descriptor ring */ + uint32_t res2 : 5; /**< reserved */ + uint32_t tlen : 3; /**< number of transmit descriptor ring entries */ }; /** bird: I've changed the type for the bitfields. They should only be 16-bit all together. * frank: I've changed the bitfiled types to uint32_t to prevent compiler warnings. */ -struct INITBLK32 -{ - uint16_t mode; /**< copied into csr15 */ - uint16_t res1:4; /**< reserved */ - uint16_t rlen:4; /**< number of receive descriptor ring entries */ - uint16_t res2:4; /**< reserved */ - uint16_t tlen:4; /**< number of transmit descriptor ring entries */ - uint16_t padr1; /**< MAC 0..15 */ - uint16_t padr2; /**< MAC 16..31 */ - uint16_t padr3; /**< MAC 32..47 */ - uint16_t res3; /**< reserved */ - uint16_t ladrf1; /**< logical address filter 0..15 */ - uint16_t ladrf2; /**< logical address filter 16..31 */ - uint16_t ladrf3; /**< logical address filter 32..47 */ - uint16_t ladrf4; /**< logical address filter 48..63 */ - uint32_t rdra; /**< address of receive descriptor ring */ - uint32_t tdra; /**< address of transmit descriptor ring */ +struct INITBLK32 { + uint16_t mode; /**< copied into csr15 */ + uint16_t res1 : 4; /**< reserved */ + uint16_t rlen : 4; /**< number of receive descriptor ring entries */ + uint16_t res2 : 4; /**< reserved */ + uint16_t tlen : 4; /**< number of transmit descriptor ring entries */ + uint16_t padr1; /**< MAC 0..15 */ + uint16_t padr2; /**< MAC 16..31 */ + uint16_t padr3; /**< MAC 32..47 */ + uint16_t res3; /**< reserved */ + uint16_t ladrf1; /**< logical address filter 0..15 */ + uint16_t ladrf2; /**< logical address filter 16..31 */ + uint16_t ladrf3; /**< logical address filter 32..47 */ + uint16_t ladrf4; /**< logical address filter 48..63 */ + uint32_t rdra; /**< address of receive descriptor ring */ + uint32_t tdra; /**< address of transmit descriptor ring */ }; /** Transmit Message Descriptor */ -typedef struct TMD -{ +typedef struct TMD { struct { - uint32_t tbadr; /**< transmit buffer address */ + uint32_t tbadr; /**< transmit buffer address */ } tmd0; struct { - uint32_t bcnt:12; /**< buffer byte count (two's complement) */ - uint32_t ones:4; /**< must be 1111b */ - uint32_t res:7; /**< reserved */ - uint32_t bpe:1; /**< bus parity error */ - uint32_t enp:1; /**< end of packet */ - uint32_t stp:1; /**< start of packet */ - uint32_t def:1; /**< deferred */ - uint32_t one:1; /**< exactly one retry was needed to transmit a frame */ - uint32_t ltint:1; /**< suppress interrupts after successful transmission */ - uint32_t nofcs:1; /**< when set, the state of DXMTFCS is ignored and - transmitter FCS generation is activated. */ - uint32_t err:1; /**< error occurred */ - uint32_t own:1; /**< 0=owned by guest driver, 1=owned by controller */ + uint32_t bcnt : 12; /**< buffer byte count (two's complement) */ + uint32_t ones : 4; /**< must be 1111b */ + uint32_t res : 7; /**< reserved */ + uint32_t bpe : 1; /**< bus parity error */ + uint32_t enp : 1; /**< end of packet */ + uint32_t stp : 1; /**< start of packet */ + uint32_t def : 1; /**< deferred */ + uint32_t one : 1; /**< exactly one retry was needed to transmit a frame */ + uint32_t ltint : 1; /**< suppress interrupts after successful transmission */ + uint32_t nofcs : 1; /**< when set, the state of DXMTFCS is ignored and + transmitter FCS generation is activated. */ + uint32_t err : 1; /**< error occurred */ + uint32_t own : 1; /**< 0=owned by guest driver, 1=owned by controller */ } tmd1; struct { - uint32_t trc:4; /**< transmit retry count */ - uint32_t res:12; /**< reserved */ - uint32_t tdr:10; /**< ??? */ - uint32_t rtry:1; /**< retry error */ - uint32_t lcar:1; /**< loss of carrier */ - uint32_t lcol:1; /**< late collision */ - uint32_t exdef:1; /**< excessive deferral */ - uint32_t uflo:1; /**< underflow error */ - uint32_t buff:1; /**< out of buffers (ENP not found) */ + uint32_t trc : 4; /**< transmit retry count */ + uint32_t res : 12; /**< reserved */ + uint32_t tdr : 10; /**< ??? */ + uint32_t rtry : 1; /**< retry error */ + uint32_t lcar : 1; /**< loss of carrier */ + uint32_t lcol : 1; /**< late collision */ + uint32_t exdef : 1; /**< excessive deferral */ + uint32_t uflo : 1; /**< underflow error */ + uint32_t buff : 1; /**< out of buffers (ENP not found) */ } tmd2; struct { - uint32_t res; /**< reserved for user defined space */ + uint32_t res; /**< reserved for user defined space */ } tmd3; } TMD; /** Receive Message Descriptor */ -typedef struct RMD -{ +typedef struct RMD { struct { - uint32_t rbadr; /**< receive buffer address */ + uint32_t rbadr; /**< receive buffer address */ } rmd0; struct { - uint32_t bcnt:12; /**< buffer byte count (two's complement) */ - uint32_t ones:4; /**< must be 1111b */ - uint32_t res:4; /**< reserved */ - uint32_t bam:1; /**< broadcast address match */ - uint32_t lafm:1; /**< logical filter address match */ - uint32_t pam:1; /**< physical address match */ - uint32_t bpe:1; /**< bus parity error */ - uint32_t enp:1; /**< end of packet */ - uint32_t stp:1; /**< start of packet */ - uint32_t buff:1; /**< buffer error */ - uint32_t crc:1; /**< crc error on incoming frame */ - uint32_t oflo:1; /**< overflow error (lost all or part of incoming frame) */ - uint32_t fram:1; /**< frame error */ - uint32_t err:1; /**< error occurred */ - uint32_t own:1; /**< 0=owned by guest driver, 1=owned by controller */ + uint32_t bcnt : 12; /**< buffer byte count (two's complement) */ + uint32_t ones : 4; /**< must be 1111b */ + uint32_t res : 4; /**< reserved */ + uint32_t bam : 1; /**< broadcast address match */ + uint32_t lafm : 1; /**< logical filter address match */ + uint32_t pam : 1; /**< physical address match */ + uint32_t bpe : 1; /**< bus parity error */ + uint32_t enp : 1; /**< end of packet */ + uint32_t stp : 1; /**< start of packet */ + uint32_t buff : 1; /**< buffer error */ + uint32_t crc : 1; /**< crc error on incoming frame */ + uint32_t oflo : 1; /**< overflow error (lost all or part of incoming frame) */ + uint32_t fram : 1; /**< frame error */ + uint32_t err : 1; /**< error occurred */ + uint32_t own : 1; /**< 0=owned by guest driver, 1=owned by controller */ } rmd1; struct { - uint32_t mcnt:12; /**< message byte count */ - uint32_t zeros:4; /**< 0000b */ - uint32_t rpc:8; /**< receive frame tag */ - uint32_t rcc:8; /**< receive frame tag + reserved */ + uint32_t mcnt : 12; /**< message byte count */ + uint32_t zeros : 4; /**< 0000b */ + uint32_t rpc : 8; /**< receive frame tag */ + uint32_t rcc : 8; /**< receive frame tag + reserved */ } rmd2; struct { - uint32_t res; /**< reserved for user defined space */ + uint32_t res; /**< reserved for user defined space */ } rmd3; } RMD; -static bar_t pcnet_pci_bar[3]; -static uint8_t pcnet_pci_regs[PCI_REGSIZE]; +static bar_t pcnet_pci_bar[3]; +static uint8_t pcnet_pci_regs[PCI_REGSIZE]; static void pcnetAsyncTransmit(nic_t *dev); static void pcnetPollRxTx(nic_t *dev); static void pcnetUpdateIrq(nic_t *dev); -static uint16_t pcnet_bcr_readw(nic_t *dev, uint16_t rap); -static void pcnet_bcr_writew(nic_t *dev, uint16_t rap, uint16_t val); -static void pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val); -static int pcnetCanReceive(nic_t *dev); - +static uint16_t pcnet_bcr_readw(nic_t *dev, uint16_t rap); +static void pcnet_bcr_writew(nic_t *dev, uint16_t rap, uint16_t val); +static void pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val); +static int pcnetCanReceive(nic_t *dev); #ifdef ENABLE_PCNET_LOG int pcnet_do_log = ENABLE_PCNET_LOG; @@ -406,30 +398,29 @@ pcnetlog(int lvl, const char *fmt, ...) va_list ap; if (pcnet_do_log >= lvl) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define pcnetlog(lvl, fmt, ...) +# define pcnetlog(lvl, fmt, ...) #endif - static void pcnet_do_irq(nic_t *dev, int issue) { - if (dev->is_pci) { - if (issue) - pci_set_irq(dev->card, PCI_INTA); - else - pci_clear_irq(dev->card, PCI_INTA); - } else { - if (issue) - picint(1<base_irq); - else - picintc(1<base_irq); - } + if (dev->is_pci) { + if (issue) + pci_set_irq(dev->card, PCI_INTA); + else + pci_clear_irq(dev->card, PCI_INTA); + } else { + if (issue) + picint(1 << dev->base_irq); + else + picintc(1 << dev->base_irq); + } } /** @@ -443,7 +434,6 @@ pcnetIsLinkUp(nic_t *dev) return !dev->fLinkTempDown && dev->fLinkUp; } - /** * Load transmit message descriptor * Make sure we read the own flag first. @@ -456,36 +446,36 @@ pcnetIsLinkUp(nic_t *dev) static __inline int pcnetTmdLoad(nic_t *dev, TMD *tmd, uint32_t addr, int fRetIfNotOwn) { - uint8_t ownbyte, bytes[4] = { 0, 0, 0, 0 }; + uint8_t ownbyte, bytes[4] = { 0, 0, 0, 0 }; uint16_t xda[4]; uint32_t xda32[4]; if (BCR_SWSTYLE(dev) == 0) { - dma_bm_read(addr, (uint8_t *) bytes, 4, dev->transfer_size); - ownbyte = bytes[3]; + dma_bm_read(addr, (uint8_t *) bytes, 4, dev->transfer_size); + ownbyte = bytes[3]; if (!(ownbyte & 0x80) && fRetIfNotOwn) return 0; - dma_bm_read(addr, (uint8_t*)&xda[0], sizeof(xda), dev->transfer_size); - ((uint32_t *)tmd)[0] = (uint32_t)xda[0] | ((uint32_t)(xda[1] & 0x00ff) << 16); - ((uint32_t *)tmd)[1] = (uint32_t)xda[2] | ((uint32_t)(xda[1] & 0xff00) << 16); - ((uint32_t *)tmd)[2] = (uint32_t)xda[3] << 16; - ((uint32_t *)tmd)[3] = 0; + dma_bm_read(addr, (uint8_t *) &xda[0], sizeof(xda), dev->transfer_size); + ((uint32_t *) tmd)[0] = (uint32_t) xda[0] | ((uint32_t) (xda[1] & 0x00ff) << 16); + ((uint32_t *) tmd)[1] = (uint32_t) xda[2] | ((uint32_t) (xda[1] & 0xff00) << 16); + ((uint32_t *) tmd)[2] = (uint32_t) xda[3] << 16; + ((uint32_t *) tmd)[3] = 0; } else if (BCR_SWSTYLE(dev) != 3) { - dma_bm_read(addr + 4, (uint8_t *) bytes, 4, dev->transfer_size); - ownbyte = bytes[3]; + dma_bm_read(addr + 4, (uint8_t *) bytes, 4, dev->transfer_size); + ownbyte = bytes[3]; if (!(ownbyte & 0x80) && fRetIfNotOwn) return 0; - dma_bm_read(addr, (uint8_t*)tmd, 16, dev->transfer_size); + dma_bm_read(addr, (uint8_t *) tmd, 16, dev->transfer_size); } else { - dma_bm_read(addr + 4, (uint8_t *) bytes, 4, dev->transfer_size); - ownbyte = bytes[3]; + dma_bm_read(addr + 4, (uint8_t *) bytes, 4, dev->transfer_size); + ownbyte = bytes[3]; if (!(ownbyte & 0x80) && fRetIfNotOwn) return 0; - dma_bm_read(addr, (uint8_t*)&xda32[0], sizeof(xda32), dev->transfer_size); - ((uint32_t *)tmd)[0] = xda32[2]; - ((uint32_t *)tmd)[1] = xda32[1]; - ((uint32_t *)tmd)[2] = xda32[0]; - ((uint32_t *)tmd)[3] = xda32[3]; + dma_bm_read(addr, (uint8_t *) &xda32[0], sizeof(xda32), dev->transfer_size); + ((uint32_t *) tmd)[0] = xda32[2]; + ((uint32_t *) tmd)[1] = xda32[1]; + ((uint32_t *) tmd)[2] = xda32[0]; + ((uint32_t *) tmd)[3] = xda32[3]; } /* Double check the own bit; guest drivers might be buggy and lock prefixes in the recompiler are ignored by other threads. */ if (tmd->tmd1.own == 1 && !(ownbyte & 0x80)) @@ -496,7 +486,6 @@ pcnetTmdLoad(nic_t *dev, TMD *tmd, uint32_t addr, int fRetIfNotOwn) return !!tmd->tmd1.own; } - /** * Store transmit message descriptor and hand it over to the host (the VM guest). * Make sure that all data are transmitted before we clear the own flag. @@ -508,37 +497,36 @@ pcnetTmdStorePassHost(nic_t *dev, TMD *tmd, uint32_t addr) uint32_t xda32[3]; if (BCR_SWSTYLE(dev) == 0) { - xda[0] = ((uint32_t *)tmd)[0] & 0xffff; - xda[1] = ((((uint32_t *)tmd)[0] >> 16) & 0xff) | ((((uint32_t *)tmd)[1]>>16) & 0xff00); - xda[2] = ((uint32_t *)tmd)[1] & 0xffff; - xda[3] = ((uint32_t *)tmd)[2] >> 16; + xda[0] = ((uint32_t *) tmd)[0] & 0xffff; + xda[1] = ((((uint32_t *) tmd)[0] >> 16) & 0xff) | ((((uint32_t *) tmd)[1] >> 16) & 0xff00); + xda[2] = ((uint32_t *) tmd)[1] & 0xffff; + xda[3] = ((uint32_t *) tmd)[2] >> 16; #if 0 xda[1] |= 0x8000; dma_bm_write(addr, (uint8_t*)&xda[0], sizeof(xda), dev->transfer_size); #endif xda[1] &= ~0x8000; - dma_bm_write(addr, (uint8_t*)&xda[0], sizeof(xda), dev->transfer_size); + dma_bm_write(addr, (uint8_t *) &xda[0], sizeof(xda), dev->transfer_size); } else if (BCR_SWSTYLE(dev) != 3) { #if 0 ((uint32_t*)tmd)[1] |= 0x80000000; dma_bm_write(addr, (uint8_t*)tmd, 12, dev->transfer_size); #endif - ((uint32_t*)tmd)[1] &= ~0x80000000; - dma_bm_write(addr, (uint8_t*)tmd, 12, dev->transfer_size); + ((uint32_t *) tmd)[1] &= ~0x80000000; + dma_bm_write(addr, (uint8_t *) tmd, 12, dev->transfer_size); } else { - xda32[0] = ((uint32_t *)tmd)[2]; - xda32[1] = ((uint32_t *)tmd)[1]; - xda32[2] = ((uint32_t *)tmd)[0]; + xda32[0] = ((uint32_t *) tmd)[2]; + xda32[1] = ((uint32_t *) tmd)[1]; + xda32[2] = ((uint32_t *) tmd)[0]; #if 0 xda32[1] |= 0x80000000; dma_bm_write(addr, (uint8_t*)&xda32[0], sizeof(xda32), dev->transfer_size); #endif xda32[1] &= ~0x80000000; - dma_bm_write(addr, (uint8_t*)&xda32[0], sizeof(xda32), dev->transfer_size); + dma_bm_write(addr, (uint8_t *) &xda32[0], sizeof(xda32), dev->transfer_size); } } - /** * Load receive message descriptor * Make sure we read the own flag first. @@ -551,36 +539,36 @@ pcnetTmdStorePassHost(nic_t *dev, TMD *tmd, uint32_t addr) static __inline int pcnetRmdLoad(nic_t *dev, RMD *rmd, uint32_t addr, int fRetIfNotOwn) { - uint8_t ownbyte, bytes[4] = { 0, 0, 0, 0 }; + uint8_t ownbyte, bytes[4] = { 0, 0, 0, 0 }; uint16_t rda[4]; uint32_t rda32[4]; if (BCR_SWSTYLE(dev) == 0) { dma_bm_read(addr, (uint8_t *) bytes, 4, dev->transfer_size); - ownbyte = bytes[3]; + ownbyte = bytes[3]; if (!(ownbyte & 0x80) && fRetIfNotOwn) return 0; - dma_bm_read(addr, (uint8_t*)&rda[0], sizeof(rda), dev->transfer_size); - ((uint32_t *)rmd)[0] = (uint32_t)rda[0] | ((rda[1] & 0x00ff) << 16); - ((uint32_t *)rmd)[1] = (uint32_t)rda[2] | ((rda[1] & 0xff00) << 16); - ((uint32_t *)rmd)[2] = (uint32_t)rda[3]; - ((uint32_t *)rmd)[3] = 0; + dma_bm_read(addr, (uint8_t *) &rda[0], sizeof(rda), dev->transfer_size); + ((uint32_t *) rmd)[0] = (uint32_t) rda[0] | ((rda[1] & 0x00ff) << 16); + ((uint32_t *) rmd)[1] = (uint32_t) rda[2] | ((rda[1] & 0xff00) << 16); + ((uint32_t *) rmd)[2] = (uint32_t) rda[3]; + ((uint32_t *) rmd)[3] = 0; } else if (BCR_SWSTYLE(dev) != 3) { dma_bm_read(addr + 4, (uint8_t *) bytes, 4, dev->transfer_size); - ownbyte = bytes[3]; + ownbyte = bytes[3]; if (!(ownbyte & 0x80) && fRetIfNotOwn) return 0; - dma_bm_read(addr, (uint8_t*)rmd, 16, dev->transfer_size); + dma_bm_read(addr, (uint8_t *) rmd, 16, dev->transfer_size); } else { dma_bm_read(addr + 4, (uint8_t *) bytes, 4, dev->transfer_size); - ownbyte = bytes[3]; + ownbyte = bytes[3]; if (!(ownbyte & 0x80) && fRetIfNotOwn) return 0; - dma_bm_read(addr, (uint8_t*)&rda32[0], sizeof(rda32), dev->transfer_size); - ((uint32_t *)rmd)[0] = rda32[2]; - ((uint32_t *)rmd)[1] = rda32[1]; - ((uint32_t *)rmd)[2] = rda32[0]; - ((uint32_t *)rmd)[3] = rda32[3]; + dma_bm_read(addr, (uint8_t *) &rda32[0], sizeof(rda32), dev->transfer_size); + ((uint32_t *) rmd)[0] = rda32[2]; + ((uint32_t *) rmd)[1] = rda32[1]; + ((uint32_t *) rmd)[2] = rda32[0]; + ((uint32_t *) rmd)[3] = rda32[3]; } /* Double check the own bit; guest drivers might be buggy and lock prefixes in the recompiler are ignored by other threads. */ if (rmd->rmd1.own == 1 && !(ownbyte & 0x80)) @@ -592,7 +580,6 @@ pcnetRmdLoad(nic_t *dev, RMD *rmd, uint32_t addr, int fRetIfNotOwn) return !!rmd->rmd1.own; } - /** * Store receive message descriptor and hand it over to the host (the VM guest). * Make sure that all data are transmitted before we clear the own flag. @@ -604,52 +591,51 @@ pcnetRmdStorePassHost(nic_t *dev, RMD *rmd, uint32_t addr) uint32_t rda32[3]; if (BCR_SWSTYLE(dev) == 0) { - rda[0] = ((uint32_t *)rmd)[0] & 0xffff; - rda[1] = ((((uint32_t *)rmd)[0]>>16) & 0xff) | ((((uint32_t *)rmd)[1]>>16) & 0xff00); - rda[2] = ((uint32_t *)rmd)[1] & 0xffff; - rda[3] = ((uint32_t *)rmd)[2] & 0xffff; + rda[0] = ((uint32_t *) rmd)[0] & 0xffff; + rda[1] = ((((uint32_t *) rmd)[0] >> 16) & 0xff) | ((((uint32_t *) rmd)[1] >> 16) & 0xff00); + rda[2] = ((uint32_t *) rmd)[1] & 0xffff; + rda[3] = ((uint32_t *) rmd)[2] & 0xffff; #if 0 rda[1] |= 0x8000; dma_bm_write(addr, (uint8_t*)&rda[0], sizeof(rda), dev->transfer_size); #endif rda[1] &= ~0x8000; - dma_bm_write(addr, (uint8_t*)&rda[0], sizeof(rda), dev->transfer_size); + dma_bm_write(addr, (uint8_t *) &rda[0], sizeof(rda), dev->transfer_size); } else if (BCR_SWSTYLE(dev) != 3) { #if 0 ((uint32_t*)rmd)[1] |= 0x80000000; dma_bm_write(addr, (uint8_t*)rmd, 12, dev->transfer_size); #endif - ((uint32_t*)rmd)[1] &= ~0x80000000; - dma_bm_write(addr, (uint8_t*)rmd, 12, dev->transfer_size); + ((uint32_t *) rmd)[1] &= ~0x80000000; + dma_bm_write(addr, (uint8_t *) rmd, 12, dev->transfer_size); } else { - rda32[0] = ((uint32_t *)rmd)[2]; - rda32[1] = ((uint32_t *)rmd)[1]; - rda32[2] = ((uint32_t *)rmd)[0]; + rda32[0] = ((uint32_t *) rmd)[2]; + rda32[1] = ((uint32_t *) rmd)[1]; + rda32[2] = ((uint32_t *) rmd)[0]; #if 0 rda32[1] |= 0x80000000; dma_bm_write(addr, (uint8_t*)&rda32[0], sizeof(rda32), dev->transfer_size); #endif rda32[1] &= ~0x80000000; - dma_bm_write(addr, (uint8_t*)&rda32[0], sizeof(rda32), dev->transfer_size); + dma_bm_write(addr, (uint8_t *) &rda32[0], sizeof(rda32), dev->transfer_size); } } - /** Checks if it's a bad (as in invalid) RMD.*/ -#define IS_RMD_BAD(rmd) ((rmd).rmd1.ones != 15) +#define IS_RMD_BAD(rmd) ((rmd).rmd1.ones != 15) /** The network card is the owner of the RDTE/TDTE, actually it is this driver */ -#define CARD_IS_OWNER(desc) (((desc) & 0x8000)) +#define CARD_IS_OWNER(desc) (((desc) &0x8000)) /** The host is the owner of the RDTE/TDTE -- actually the VM guest. */ -#define HOST_IS_OWNER(desc) (!((desc) & 0x8000)) +#define HOST_IS_OWNER(desc) (!((desc) &0x8000)) #ifndef ETHER_IS_MULTICAST /* Net/Open BSD macro it seems */ -#define ETHER_IS_MULTICAST(a) ((*(uint8_t *)(a)) & 1) +# define ETHER_IS_MULTICAST(a) ((*(uint8_t *) (a)) & 1) #endif #define ETHER_ADDR_LEN ETH_ALEN -#define ETH_ALEN 6 +#define ETH_ALEN 6 #pragma pack(1) struct ether_header /** @todo Use RTNETETHERHDR */ { @@ -659,22 +645,20 @@ struct ether_header /** @todo Use RTNETETHERHDR */ }; #pragma pack() -#define CRC(crc, ch) (crc = (crc >> 8) ^ crctab[(crc ^ (ch)) & 0xff]) +#define CRC(crc, ch) (crc = (crc >> 8) ^ crctab[(crc ^ (ch)) & 0xff]) #define MULTICAST_FILTER_LEN 8 static __inline uint32_t lnc_mchash(const uint8_t *ether_addr) { -#define LNC_POLYNOMIAL 0xEDB88320UL +#define LNC_POLYNOMIAL 0xEDB88320UL uint32_t crc = 0xFFFFFFFF; - int idx, bit; - uint8_t data; + int idx, bit; + uint8_t data; - for (idx = 0; idx < ETHER_ADDR_LEN; idx++) - { - for (data = *ether_addr++, bit = 0; bit < MULTICAST_FILTER_LEN; bit++) - { + for (idx = 0; idx < ETHER_ADDR_LEN; idx++) { + for (data = *ether_addr++, bit = 0; bit < MULTICAST_FILTER_LEN; bit++) { crc = (crc >> 1) ^ (((crc ^ data) & 1) ? LNC_POLYNOMIAL : 0); data >>= 1; } @@ -683,7 +667,7 @@ lnc_mchash(const uint8_t *ether_addr) #undef LNC_POLYNOMIAL } -#define CRC(crc, ch) (crc = (crc >> 8) ^ crctab[(crc ^ (ch)) & 0xff]) +#define CRC(crc, ch) (crc = (crc >> 8) ^ crctab[(crc ^ (ch)) & 0xff]) /* generated using the AUTODIN II polynomial * x^32 + x^26 + x^23 + x^22 + x^16 + @@ -757,48 +741,46 @@ static const uint32_t crctab[256] = 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d, }; - static __inline int padr_match(nic_t *dev, const uint8_t *buf, int size) { - struct ether_header *hdr = (struct ether_header *)buf; - int result; - uint8_t padr[6]; + struct ether_header *hdr = (struct ether_header *) buf; + int result; + uint8_t padr[6]; padr[0] = dev->aCSR[12] & 0xff; padr[1] = dev->aCSR[12] >> 8; padr[2] = dev->aCSR[13] & 0xff; padr[3] = dev->aCSR[13] >> 8; padr[4] = dev->aCSR[14] & 0xff; padr[5] = dev->aCSR[14] >> 8; - result = !CSR_DRCVPA(dev) && !memcmp(hdr->ether_dhost, padr, 6); + result = !CSR_DRCVPA(dev) && !memcmp(hdr->ether_dhost, padr, 6); pcnetlog(3, "%s: packet dhost=%02x:%02x:%02x:%02x:%02x:%02x, " - "padr=%02x:%02x:%02x:%02x:%02x:%02x => %d\n", dev->name, - hdr->ether_dhost[0],hdr->ether_dhost[1],hdr->ether_dhost[2], - hdr->ether_dhost[3],hdr->ether_dhost[4],hdr->ether_dhost[5], - padr[0],padr[1],padr[2],padr[3],padr[4],padr[5], result); + "padr=%02x:%02x:%02x:%02x:%02x:%02x => %d\n", + dev->name, + hdr->ether_dhost[0], hdr->ether_dhost[1], hdr->ether_dhost[2], + hdr->ether_dhost[3], hdr->ether_dhost[4], hdr->ether_dhost[5], + padr[0], padr[1], padr[2], padr[3], padr[4], padr[5], result); return result; } - static __inline int padr_bcast(nic_t *dev, const uint8_t *buf, size_t size) { - static uint8_t aBCAST[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; - struct ether_header *hdr = (struct ether_header *)buf; - int result = !CSR_DRCVBC(dev) && !memcmp(hdr->ether_dhost, aBCAST, 6); + static uint8_t aBCAST[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; + struct ether_header *hdr = (struct ether_header *) buf; + int result = !CSR_DRCVBC(dev) && !memcmp(hdr->ether_dhost, aBCAST, 6); pcnetlog(3, "%s: padr_bcast result=%d\n", dev->name, result); - return result; + return result; } - static int ladr_match(nic_t *dev, const uint8_t *buf, size_t size) { - struct ether_header *hdr = (struct ether_header *)buf; - if ((hdr->ether_dhost[0] & 0x01) && ((uint64_t *)&dev->aCSR[8])[0] != 0LL) { - int index; + struct ether_header *hdr = (struct ether_header *) buf; + if ((hdr->ether_dhost[0] & 0x01) && ((uint64_t *) &dev->aCSR[8])[0] != 0LL) { + int index; uint8_t ladr[8]; ladr[0] = dev->aCSR[8] & 0xff; ladr[1] = dev->aCSR[8] >> 8; @@ -808,13 +790,12 @@ ladr_match(nic_t *dev, const uint8_t *buf, size_t size) ladr[5] = dev->aCSR[10] >> 8; ladr[6] = dev->aCSR[11] & 0xff; ladr[7] = dev->aCSR[11] >> 8; - index = lnc_mchash(hdr->ether_dhost) >> 26; + index = lnc_mchash(hdr->ether_dhost) >> 26; return (ladr[index >> 3] & (1 << (index & 7))); - } + } return 0; } - /** * Get the receive descriptor ring address with a given index. */ @@ -824,7 +805,6 @@ pcnetRdraAddr(nic_t *dev, int idx) return dev->GCRDRA + ((CSR_RCVRL(dev) - idx) << dev->iLog2DescSize); } - /** * Get the transmit descriptor ring address with a given index. */ @@ -834,7 +814,6 @@ pcnetTdraAddr(nic_t *dev, int idx) return dev->GCTDRA + ((CSR_XMTRL(dev) - idx) << dev->iLog2DescSize); } - static void pcnetSoftReset(nic_t *dev) { @@ -845,18 +824,18 @@ pcnetSoftReset(nic_t *dev) dev->GCTDRA = 0; dev->u32RAP = 0; - dev->aCSR[0] = 0x0004; - dev->aCSR[3] = 0x0000; - dev->aCSR[4] = 0x0115; - dev->aCSR[5] = 0x0000; - dev->aCSR[6] = 0x0000; - dev->aCSR[8] = 0; - dev->aCSR[9] = 0; - dev->aCSR[10] = 0; - dev->aCSR[11] = 0; - dev->aCSR[12] = le16_to_cpu(((uint16_t *)&dev->aPROM[0])[0]); - dev->aCSR[13] = le16_to_cpu(((uint16_t *)&dev->aPROM[0])[1]); - dev->aCSR[14] = le16_to_cpu(((uint16_t *)&dev->aPROM[0])[2]); + dev->aCSR[0] = 0x0004; + dev->aCSR[3] = 0x0000; + dev->aCSR[4] = 0x0115; + dev->aCSR[5] = 0x0000; + dev->aCSR[6] = 0x0000; + dev->aCSR[8] = 0; + dev->aCSR[9] = 0; + dev->aCSR[10] = 0; + dev->aCSR[11] = 0; + dev->aCSR[12] = le16_to_cpu(((uint16_t *) &dev->aPROM[0])[0]); + dev->aCSR[13] = le16_to_cpu(((uint16_t *) &dev->aPROM[0])[1]); + dev->aCSR[14] = le16_to_cpu(((uint16_t *) &dev->aPROM[0])[2]); dev->aCSR[15] &= 0x21c4; CSR_RCVRC(dev) = 1; CSR_XMTRC(dev) = 1; @@ -865,21 +844,21 @@ pcnetSoftReset(nic_t *dev) dev->aCSR[80] = 0x1410; switch (dev->board) { - case DEV_AM79C970A: - dev->aCSR[88] = 0x1003; - dev->aCSR[89] = 0x0262; - break; - case DEV_AM79C973: - dev->aCSR[88] = 0x5003; - dev->aCSR[89] = 0x0262; - break; - case DEV_AM79C960: - case DEV_AM79C960_EB: - case DEV_AM79C960_VLB: - case DEV_AM79C961: - dev->aCSR[88] = 0x3003; - dev->aCSR[89] = 0x0262; - break; + case DEV_AM79C970A: + dev->aCSR[88] = 0x1003; + dev->aCSR[89] = 0x0262; + break; + case DEV_AM79C973: + dev->aCSR[88] = 0x5003; + dev->aCSR[89] = 0x0262; + break; + case DEV_AM79C960: + case DEV_AM79C960_EB: + case DEV_AM79C960_VLB: + case DEV_AM79C961: + dev->aCSR[88] = 0x3003; + dev->aCSR[89] = 0x0262; + break; } dev->aCSR[94] = 0x0000; @@ -891,42 +870,39 @@ pcnetSoftReset(nic_t *dev) dev->aCSR[124] = 0x0000; } - static void pcnetUpdateIrq(nic_t *dev) { - int iISR = 0; + int iISR = 0; uint16_t csr0; csr0 = dev->aCSR[0]; csr0 &= ~0x0080; /* clear INTR */ - if (((csr0 & ~dev->aCSR[3]) & 0x5f00) || - (((dev->aCSR[4]>>1) & ~dev->aCSR[4]) & 0x0115) || - (((dev->aCSR[5]>>1) & dev->aCSR[5]) & 0x0048)) { - iISR = !!(csr0 & 0x0040); /* CSR_INEA */ - csr0 |= 0x0080; /* set INTR */ + if (((csr0 & ~dev->aCSR[3]) & 0x5f00) || (((dev->aCSR[4] >> 1) & ~dev->aCSR[4]) & 0x0115) || (((dev->aCSR[5] >> 1) & dev->aCSR[5]) & 0x0048)) { + iISR = !!(csr0 & 0x0040); /* CSR_INEA */ + csr0 |= 0x0080; /* set INTR */ } if (dev->aCSR[4] & 0x0080) { /* UINTCMD */ - dev->aCSR[4] &= ~0x0080; /* clear UINTCMD */ - dev->aCSR[4] |= 0x0040; /* set UINT */ - pcnetlog(2, "%s: user int\n", dev->name); + dev->aCSR[4] &= ~0x0080; /* clear UINTCMD */ + dev->aCSR[4] |= 0x0040; /* set UINT */ + pcnetlog(2, "%s: user int\n", dev->name); } if (dev->aCSR[4] & csr0 & 0x0040 /* CSR_INEA */) { - csr0 |= 0x0080; /* set INTR */ - iISR = 1; + csr0 |= 0x0080; /* set INTR */ + iISR = 1; } - if (((dev->aCSR[5]>>1) & dev->aCSR[5]) & 0x0500) { - iISR = 1; - csr0 |= 0x0080; /* set INTR */ + if (((dev->aCSR[5] >> 1) & dev->aCSR[5]) & 0x0500) { + iISR = 1; + csr0 |= 0x0080; /* set INTR */ } if ((dev->aCSR[7] & 0x0c00) == 0x0c00) /* STINT + STINTE */ - iISR = 1; + iISR = 1; dev->aCSR[0] = csr0; @@ -936,7 +912,6 @@ pcnetUpdateIrq(nic_t *dev) dev->iISR = iISR; } - static void pcnetInit(nic_t *dev) { @@ -945,48 +920,49 @@ pcnetInit(nic_t *dev) /** @todo Documentation says that RCVRL and XMTRL are stored as two's complement! * Software is allowed to write these registers directly. */ -#define PCNET_INIT() do { \ - dma_bm_read(PHYSADDR(dev, CSR_IADR(dev)), \ - (uint8_t *)&initblk, sizeof(initblk), dev->transfer_size); \ - dev->aCSR[15] = le16_to_cpu(initblk.mode); \ - CSR_RCVRL(dev) = (initblk.rlen < 9) ? (1 << initblk.rlen) : 512; \ - CSR_XMTRL(dev) = (initblk.tlen < 9) ? (1 << initblk.tlen) : 512; \ - dev->aCSR[ 6] = (initblk.tlen << 12) | (initblk.rlen << 8); \ - dev->aCSR[ 8] = le16_to_cpu(initblk.ladrf1); \ - dev->aCSR[ 9] = le16_to_cpu(initblk.ladrf2); \ - dev->aCSR[10] = le16_to_cpu(initblk.ladrf3); \ - dev->aCSR[11] = le16_to_cpu(initblk.ladrf4); \ - dev->aCSR[12] = le16_to_cpu(initblk.padr1); \ - dev->aCSR[13] = le16_to_cpu(initblk.padr2); \ - dev->aCSR[14] = le16_to_cpu(initblk.padr3); \ - dev->GCRDRA = PHYSADDR(dev, initblk.rdra); \ - dev->GCTDRA = PHYSADDR(dev, initblk.tdra); \ -} while (0) +#define PCNET_INIT() \ + do { \ + dma_bm_read(PHYSADDR(dev, CSR_IADR(dev)), \ + (uint8_t *) &initblk, sizeof(initblk), dev->transfer_size); \ + dev->aCSR[15] = le16_to_cpu(initblk.mode); \ + CSR_RCVRL(dev) = (initblk.rlen < 9) ? (1 << initblk.rlen) : 512; \ + CSR_XMTRL(dev) = (initblk.tlen < 9) ? (1 << initblk.tlen) : 512; \ + dev->aCSR[6] = (initblk.tlen << 12) | (initblk.rlen << 8); \ + dev->aCSR[8] = le16_to_cpu(initblk.ladrf1); \ + dev->aCSR[9] = le16_to_cpu(initblk.ladrf2); \ + dev->aCSR[10] = le16_to_cpu(initblk.ladrf3); \ + dev->aCSR[11] = le16_to_cpu(initblk.ladrf4); \ + dev->aCSR[12] = le16_to_cpu(initblk.padr1); \ + dev->aCSR[13] = le16_to_cpu(initblk.padr2); \ + dev->aCSR[14] = le16_to_cpu(initblk.padr3); \ + dev->GCRDRA = PHYSADDR(dev, initblk.rdra); \ + dev->GCTDRA = PHYSADDR(dev, initblk.tdra); \ + } while (0) if (BCR_SSIZE32(dev)) { struct INITBLK32 initblk; dev->GCUpperPhys = 0; PCNET_INIT(); pcnetlog(3, "%s: initblk.rlen=%#04x, initblk.tlen=%#04x\n", - dev->name, initblk.rlen, initblk.tlen); + dev->name, initblk.rlen, initblk.tlen); } else { struct INITBLK16 initblk; - dev->GCUpperPhys = (0xff00 & (uint32_t)dev->aCSR[2]) << 16; + dev->GCUpperPhys = (0xff00 & (uint32_t) dev->aCSR[2]) << 16; PCNET_INIT(); pcnetlog(3, "%s: initblk.rlen=%#04x, initblk.tlen=%#04x\n", - dev->name, initblk.rlen, initblk.tlen); + dev->name, initblk.rlen, initblk.tlen); } #undef PCNET_INIT size_t cbRxBuffers = 0; for (i = CSR_RCVRL(dev); i >= 1; i--) { - RMD rmd; + RMD rmd; uint32_t rdaddr = PHYSADDR(dev, pcnetRdraAddr(dev, i)); /* At this time it is not guaranteed that the buffers are already initialized. */ if (pcnetRmdLoad(dev, &rmd, rdaddr, 0)) { - uint32_t cbBuf = 4096U-rmd.rmd1.bcnt; + uint32_t cbBuf = 4096U - rmd.rmd1.bcnt; cbRxBuffers += cbBuf; } } @@ -999,7 +975,7 @@ pcnetInit(nic_t *dev) * usually 1536 bytes and should therefore not run into condition. If they are still * short in RX buffers we notify this condition. */ - dev->fSignalRxMiss = (cbRxBuffers == 0 || cbRxBuffers >= 32*1024); + dev->fSignalRxMiss = (cbRxBuffers == 0 || cbRxBuffers >= 32 * 1024); CSR_RCVRC(dev) = CSR_RCVRL(dev); CSR_XMTRC(dev) = CSR_XMTRL(dev); @@ -1009,20 +985,19 @@ pcnetInit(nic_t *dev) CSR_CXST(dev) = CSR_CXBC(dev) = CSR_NXST(dev) = CSR_NXBC(dev) = 0; pcnetlog(1, "%s: Init: SWSTYLE=%d GCRDRA=%#010x[%d] GCTDRA=%#010x[%d]%s\n", - dev->name, BCR_SWSTYLE(dev), - dev->GCRDRA, CSR_RCVRL(dev), dev->GCTDRA, CSR_XMTRL(dev), - !dev->fSignalRxMiss ? " (CSR0_MISS disabled)" : ""); + dev->name, BCR_SWSTYLE(dev), + dev->GCRDRA, CSR_RCVRL(dev), dev->GCTDRA, CSR_XMTRL(dev), + !dev->fSignalRxMiss ? " (CSR0_MISS disabled)" : ""); if (dev->GCRDRA & (dev->iLog2DescSize - 1)) pcnetlog(1, "%s: Warning: Misaligned RDRA\n", dev->name); if (dev->GCTDRA & (dev->iLog2DescSize - 1)) pcnetlog(1, "%s: Warning: Misaligned TDRA\n", dev->name); - dev->aCSR[0] |= 0x0101; /* Initialization done */ - dev->aCSR[0] &= ~0x0004; /* clear STOP bit */ + dev->aCSR[0] |= 0x0101; /* Initialization done */ + dev->aCSR[0] &= ~0x0004; /* clear STOP bit */ } - /** * Start RX/TX operation. */ @@ -1036,15 +1011,14 @@ pcnetStart(nic_t *dev) CSR_CRBC(dev) = CSR_NRBC(dev) = CSR_CRST(dev) = 0; if (!CSR_DTX(dev)) - dev->aCSR[0] |= 0x0010; /* set TXON */ + dev->aCSR[0] |= 0x0010; /* set TXON */ if (!CSR_DRX(dev)) - dev->aCSR[0] |= 0x0020; /* set RXON */ - dev->aCSR[0] &= ~0x0004; /* clear STOP bit */ - dev->aCSR[0] |= 0x0002; /* STRT */ + dev->aCSR[0] |= 0x0020; /* set RXON */ + dev->aCSR[0] &= ~0x0004; /* clear STOP bit */ + dev->aCSR[0] |= 0x0002; /* STRT */ timer_set_delay_u64(&dev->timer, 2000 * TIMER_USEC); } - /** * Stop RX/TX operation. */ @@ -1058,7 +1032,6 @@ pcnetStop(nic_t *dev) timer_disable(&dev->timer); } - /** * Poll Receive Descriptor Table Entry and cache the results in the appropriate registers. * Note: Once a descriptor belongs to the network card (this driver), it cannot be changed @@ -1075,49 +1048,49 @@ pcnetRdtePoll(nic_t *dev) /* * The current receive message descriptor. */ - RMD rmd; - int i = CSR_RCVRC(dev); - uint32_t addr; + RMD rmd; + int i = CSR_RCVRC(dev); + uint32_t addr; if (i < 1) i = CSR_RCVRL(dev); - addr = pcnetRdraAddr(dev, i); - CSR_CRDA(dev) = CSR_CRBA(dev) = 0; - CSR_CRBC(dev) = CSR_CRST(dev) = 0; - if (!pcnetRmdLoad(dev, &rmd, PHYSADDR(dev, addr), 1)) - return; - if (!IS_RMD_BAD(rmd)) { - CSR_CRDA(dev) = addr; /* Receive Descriptor Address */ - CSR_CRBA(dev) = rmd.rmd0.rbadr; /* Receive Buffer Address */ - CSR_CRBC(dev) = rmd.rmd1.bcnt; /* Receive Byte Count */ - CSR_CRST(dev) = ((uint32_t *)&rmd)[1] >> 16; /* Receive Status */ - } else { - /* This is not problematic since we don't own the descriptor - * We actually do own it, otherwise pcnetRmdLoad would have returned false. - * Don't flood the release log with errors. - */ - if (++dev->uCntBadRMD < 50) - pcnetlog(1, "%s: BAD RMD ENTRIES AT %#010x (i=%d)\n", - dev->name, addr, i); - return; - } + addr = pcnetRdraAddr(dev, i); + CSR_CRDA(dev) = CSR_CRBA(dev) = 0; + CSR_CRBC(dev) = CSR_CRST(dev) = 0; + if (!pcnetRmdLoad(dev, &rmd, PHYSADDR(dev, addr), 1)) + return; + if (!IS_RMD_BAD(rmd)) { + CSR_CRDA(dev) = addr; /* Receive Descriptor Address */ + CSR_CRBA(dev) = rmd.rmd0.rbadr; /* Receive Buffer Address */ + CSR_CRBC(dev) = rmd.rmd1.bcnt; /* Receive Byte Count */ + CSR_CRST(dev) = ((uint32_t *) &rmd)[1] >> 16; /* Receive Status */ + } else { + /* This is not problematic since we don't own the descriptor + * We actually do own it, otherwise pcnetRmdLoad would have returned false. + * Don't flood the release log with errors. + */ + if (++dev->uCntBadRMD < 50) + pcnetlog(1, "%s: BAD RMD ENTRIES AT %#010x (i=%d)\n", + dev->name, addr, i); + return; + } /* * The next descriptor. */ if (--i < 1) i = CSR_RCVRL(dev); - addr = pcnetRdraAddr(dev, i); + addr = pcnetRdraAddr(dev, i); CSR_NRDA(dev) = CSR_NRBA(dev) = 0; - CSR_NRBC(dev) = 0; + CSR_NRBC(dev) = 0; if (!pcnetRmdLoad(dev, &rmd, PHYSADDR(dev, addr), 1)) return; if (!IS_RMD_BAD(rmd)) { CSR_NRDA(dev) = addr; /* Receive Descriptor Address */ CSR_NRBA(dev) = rmd.rmd0.rbadr; /* Receive Buffer Address */ CSR_NRBC(dev) = rmd.rmd1.bcnt; /* Receive Byte Count */ - CSR_NRST(dev) = ((uint32_t *)&rmd)[1] >> 16; /* Receive Status */ + CSR_NRST(dev) = ((uint32_t *) &rmd)[1] >> 16; /* Receive Status */ } else { /* This is not problematic since we don't own the descriptor * We actually do own it, otherwise pcnetRmdLoad would have returned false. @@ -1125,7 +1098,7 @@ pcnetRdtePoll(nic_t *dev) */ if (++dev->uCntBadRMD < 50) pcnetlog(1, "%s: BAD RMD ENTRIES + AT %#010x (i=%d)\n", - dev->name, addr, i); + dev->name, addr, i); return; } @@ -1138,7 +1111,6 @@ pcnetRdtePoll(nic_t *dev) } } - /** * Poll Transmit Descriptor Table Entry * @return true if transmit descriptors available @@ -1154,7 +1126,7 @@ pcnetTdtePoll(nic_t *dev, TMD *tmd) if (tmd->tmd1.ones != 15) { pcnetlog(1, "%s: BAD TMD XDA=%#010x\n", - dev->name, PHYSADDR(dev, cxda)); + dev->name, PHYSADDR(dev, cxda)); return 0; } @@ -1166,7 +1138,7 @@ pcnetTdtePoll(nic_t *dev, TMD *tmd) /* set current transmit descriptor. */ CSR_CXDA(dev) = cxda; CSR_CXBC(dev) = tmd->tmd1.bcnt; - CSR_CXST(dev) = ((uint32_t *)tmd)[1] >> 16; + CSR_CXST(dev) = ((uint32_t *) tmd)[1] >> 16; return CARD_IS_OWNER(CSR_CXST(dev)); } else { /** @todo consistency with previous receive descriptor */ @@ -1176,7 +1148,6 @@ pcnetTdtePoll(nic_t *dev, TMD *tmd) } } - /** * Poll Transmit Descriptor Table Entry * @return true if transmit descriptors available @@ -1184,13 +1155,12 @@ pcnetTdtePoll(nic_t *dev, TMD *tmd) static int pcnetCalcPacketLen(nic_t *dev, int cb) { - TMD tmd; - int cbPacket = cb; - uint32_t iDesc = CSR_XMTRC(dev); + TMD tmd; + int cbPacket = cb; + uint32_t iDesc = CSR_XMTRC(dev); uint32_t iFirstDesc = iDesc; - do - { + do { /* Advance the ring counter */ if (iDesc < 2) iDesc = CSR_XMTRL(dev); @@ -1212,7 +1182,7 @@ pcnetCalcPacketLen(nic_t *dev, int cb) } if (tmd.tmd1.ones != 15) { pcnetlog(1, "%s: BAD TMD XDA=%#010x\n", - dev->name, PHYSADDR(dev, addrDesc)); + dev->name, PHYSADDR(dev, addrDesc)); pcnetlog(3, "%s: pcnetCalcPacketLen: bad TMD, return %u\n", dev->name, cbPacket); return cbPacket; } @@ -1224,27 +1194,26 @@ pcnetCalcPacketLen(nic_t *dev, int cb) return cbPacket; } - /** * Write data into guest receive buffers. */ static int pcnetReceiveNoSync(void *priv, uint8_t *buf, int size) { - nic_t *dev = (nic_t *)priv; - int is_padr = 0, is_bcast = 0, is_ladr = 0; + nic_t *dev = (nic_t *) priv; + int is_padr = 0, is_bcast = 0, is_ladr = 0; uint32_t iRxDesc; - int cbPacket; - uint8_t buf1[60]; + int cbPacket; + uint8_t buf1[60]; if (CSR_DRX(dev) || CSR_STOP(dev) || CSR_SPND(dev) || !size) - return 0; + return 0; /* if too small buffer, then expand it */ if (size < 60) { memcpy(buf1, buf, size); memset(buf1 + size, 0, 60 - size); - buf = buf1; + buf = buf1; size = 60; } @@ -1252,34 +1221,34 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size) * Drop packets if the cable is not connected */ if (!pcnetIsLinkUp(dev)) - return 0; + return 0; dev->fMaybeOutOfSpace = !pcnetCanReceive(dev); if (dev->fMaybeOutOfSpace) return 0; pcnetlog(1, "%s: pcnetReceiveNoSync: RX %x:%x:%x:%x:%x:%x > %x:%x:%x:%x:%x:%x len %d\n", dev->name, - buf[6], buf[7], buf[8], buf[9], buf[10], buf[11], - buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], - size); + buf[6], buf[7], buf[8], buf[9], buf[10], buf[11], + buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], + size); /* * Perform address matching. */ if (CSR_PROM(dev) - || (is_padr = padr_match(dev, buf, size)) + || (is_padr = padr_match(dev, buf, size)) || (is_bcast = padr_bcast(dev, buf, size)) - || (is_ladr = ladr_match(dev, buf, size))) { + || (is_ladr = ladr_match(dev, buf, size))) { - if (HOST_IS_OWNER(CSR_CRST(dev))) - pcnetRdtePoll(dev); + if (HOST_IS_OWNER(CSR_CRST(dev))) + pcnetRdtePoll(dev); if (HOST_IS_OWNER(CSR_CRST(dev))) { /* Not owned by controller. This should not be possible as * we already called pcnetCanReceive(). */ - const unsigned cb = 1 << dev->iLog2DescSize; - uint32_t GCPhys = dev->GCRDRA; - iRxDesc = CSR_RCVRL(dev); + const unsigned cb = 1 << dev->iLog2DescSize; + uint32_t GCPhys = dev->GCRDRA; + iRxDesc = CSR_RCVRL(dev); while (iRxDesc-- > 0) { RMD rmd; @@ -1287,16 +1256,17 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size) GCPhys += cb; } dev->aCSR[0] |= 0x1000; /* Set MISS flag */ - CSR_MISSC(dev)++; - pcnetlog(2, "%s: pcnetReceiveNoSync: packet missed\n", dev->name); + CSR_MISSC(dev) + ++; + pcnetlog(2, "%s: pcnetReceiveNoSync: packet missed\n", dev->name); } else { - RTNETETHERHDR *pEth = (RTNETETHERHDR *)buf; - int fStrip = 0; - size_t len_802_3; - uint8_t *src = &dev->abRecvBuf[8]; - uint32_t crda = CSR_CRDA(dev); - uint32_t next_crda; - RMD rmd, next_rmd; + RTNETETHERHDR *pEth = (RTNETETHERHDR *) buf; + int fStrip = 0; + size_t len_802_3; + uint8_t *src = &dev->abRecvBuf[8]; + uint32_t crda = CSR_CRDA(dev); + uint32_t next_crda; + RMD rmd, next_rmd; /* * Ethernet framing considers these two octets to be @@ -1307,40 +1277,40 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size) * * NB: CSR_ASTRP_RCV bit affects only 802.3 frames! */ - len_802_3 = cpu_to_be16(pEth->EtherType); + len_802_3 = cpu_to_be16(pEth->EtherType); if (len_802_3 < 46 && CSR_ASTRP_RCV(dev)) { - size = MIN(sizeof(RTNETETHERHDR) + len_802_3, size); + size = MIN(sizeof(RTNETETHERHDR) + len_802_3, size); fStrip = 1; } - memcpy(src, buf, size); + memcpy(src, buf, size); if (!fStrip) { /* In loopback mode, Runt Packed Accept is always enabled internally; * don't do any padding because guest may be looping back very short packets. */ - if (!CSR_LOOP(dev)) - while (size < 60) - src[size++] = 0; + if (!CSR_LOOP(dev)) + while (size < 60) + src[size++] = 0; uint32_t fcs = UINT32_MAX; - uint8_t *p = src; + uint8_t *p = src; - while (p != &src[size]) - CRC(fcs, *p++); + while (p != &src[size]) + CRC(fcs, *p++); - /* FCS at the end of the packet */ - ((uint32_t *)&src[size])[0] = htonl(fcs); - size += 4; - } + /* FCS at the end of the packet */ + ((uint32_t *) &src[size])[0] = htonl(fcs); + size += 4; + } - cbPacket = (int)size; + cbPacket = (int) size; pcnetRmdLoad(dev, &rmd, PHYSADDR(dev, crda), 0); /* if (!CSR_LAPPEN(dev)) */ - rmd.rmd1.stp = 1; + rmd.rmd1.stp = 1; - size_t cbBuf = MIN(4096 - rmd.rmd1.bcnt, size); + size_t cbBuf = MIN(4096 - rmd.rmd1.bcnt, size); uint32_t rbadr = PHYSADDR(dev, rmd.rmd0.rbadr); /* save the old value to check if it was changed as long as we didn't @@ -1361,9 +1331,9 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size) /* RX disabled in the meantime? If so, abort RX. */ if (CSR_DRX(dev) || CSR_STOP(dev) || CSR_SPND(dev)) { - pcnetlog(3, "%s: RX disabled 1\n", dev->name); + pcnetlog(3, "%s: RX disabled 1\n", dev->name); return 0; - } + } /* Was the register modified in the meantime? If so, don't touch the * register but still update the RX descriptor. */ @@ -1394,7 +1364,7 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size) crda = next_crda; rmd = next_rmd; - cbBuf = MIN(4096 - (size_t)rmd.rmd1.bcnt, size); + cbBuf = MIN(4096 - (size_t) rmd.rmd1.bcnt, size); uint32_t rbadr2 = PHYSADDR(dev, rmd.rmd0.rbadr); /* We have to leave the critical section here or we risk deadlocking @@ -1404,9 +1374,9 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size) /* RX disabled in the meantime? If so, abort RX. */ if (CSR_DRX(dev) || CSR_STOP(dev) || CSR_SPND(dev)) { - pcnetlog(3, "%s: RX disabled 2\n", dev->name); + pcnetlog(3, "%s: RX disabled 2\n", dev->name); return 0; - } + } /* Was the register modified in the meantime? If so, don't touch the * register but still update the RX descriptor. */ @@ -1416,18 +1386,18 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size) CSR_RCVRC(dev) = iRxDesc; } else { iRxDesc = CSR_RCVRC(dev); - } + } src += cbBuf; size -= cbBuf; } if (size == 0) { - rmd.rmd1.enp = 1; - rmd.rmd1.pam = !CSR_PROM(dev) && is_padr; - rmd.rmd1.lafm = !CSR_PROM(dev) && is_ladr; - rmd.rmd1.bam = !CSR_PROM(dev) && is_bcast; - rmd.rmd2.mcnt = cbPacket; + rmd.rmd1.enp = 1; + rmd.rmd1.pam = !CSR_PROM(dev) && is_padr; + rmd.rmd1.lafm = !CSR_PROM(dev) && is_ladr; + rmd.rmd1.bam = !CSR_PROM(dev) && is_bcast; + rmd.rmd2.mcnt = cbPacket; rmd.rmd2.zeros = 0; } else { pcnetlog(1, "%s: Overflow by %ubytes\n", dev->name, size); @@ -1441,11 +1411,11 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size) dev->aCSR[0] |= 0x0400; pcnetlog(1, "%s: RINT set, RCVRC=%d CRDA=%#010x\n", dev->name, - CSR_RCVRC(dev), PHYSADDR(dev, CSR_CRDA(dev))); + CSR_RCVRC(dev), PHYSADDR(dev, CSR_CRDA(dev))); /* guest driver is owner: force repoll of current and next RDTEs */ CSR_CRST(dev) = 0; - } + } } pcnetUpdateIrq(dev); @@ -1496,7 +1466,7 @@ pcnetAsyncTransmit(nic_t *dev) * Iterate the transmit descriptors. */ unsigned cFlushIrq = 0; - int cMax = 32; + int cMax = 32; do { TMD tmd; if (!pcnetTdtePoll(dev, &tmd)) @@ -1504,8 +1474,7 @@ pcnetAsyncTransmit(nic_t *dev) /* Don't continue sending packets when the link is down. */ if ((!pcnetIsLinkUp(dev) - && dev->cLinkDownReported > PCNET_MAX_LINKDOWN_REPORTED) - ) + && dev->cLinkDownReported > PCNET_MAX_LINKDOWN_REPORTED)) break; pcnetlog(3, "%s: TMDLOAD %#010x\n", dev->name, PHYSADDR(dev, CSR_CXDA(dev))); @@ -1519,60 +1488,60 @@ pcnetAsyncTransmit(nic_t *dev) const int cb = 4096 - tmd.tmd1.bcnt; pcnetlog("%s: pcnetAsyncTransmit: stp&enp: cb=%d xmtrc=%#x\n", dev->name, cb, CSR_XMTRC(dev)); - if ((pcnetIsLinkUp(dev) || fLoopback)) { + if ((pcnetIsLinkUp(dev) || fLoopback)) { - /* From the manual: ``A zero length buffer is acceptable as - * long as it is not the last buffer in a chain (STP = 0 and - * ENP = 1).'' That means that the first buffer might have a - * zero length if it is not the last one in the chain. */ - if (cb <= MAX_FRAME) { - dev->xmit_pos = cb; - dma_bm_read(PHYSADDR(dev, tmd.tmd0.tbadr), dev->abLoopBuf, cb, dev->transfer_size); + /* From the manual: ``A zero length buffer is acceptable as + * long as it is not the last buffer in a chain (STP = 0 and + * ENP = 1).'' That means that the first buffer might have a + * zero length if it is not the last one in the chain. */ + if (cb <= MAX_FRAME) { + dev->xmit_pos = cb; + dma_bm_read(PHYSADDR(dev, tmd.tmd0.tbadr), dev->abLoopBuf, cb, dev->transfer_size); - if (fLoopback) { - if (HOST_IS_OWNER(CSR_CRST(dev))) - pcnetRdtePoll(dev); + if (fLoopback) { + if (HOST_IS_OWNER(CSR_CRST(dev))) + pcnetRdtePoll(dev); - pcnetReceiveNoSync(dev, dev->abLoopBuf, dev->xmit_pos); - } else { - pcnetlog(3, "%s: pcnetAsyncTransmit: transmit loopbuf stp and enp, xmit pos = %d\n", dev->name, dev->xmit_pos); - network_tx(dev->netcard, dev->abLoopBuf, dev->xmit_pos); - } - } else if (cb == 4096) { - /* The Windows NT4 pcnet driver sometimes marks the first - * unused descriptor as owned by us. Ignore that (by - * passing it back). Do not update the ring counter in this - * case (otherwise that driver becomes even more confused, - * which causes transmit to stall for about 10 seconds). - * This is just a workaround, not a final solution. - */ - /* r=frank: IMHO this is the correct implementation. The - * manual says: ``If the OWN bit is set and the buffer - * length is 0, the OWN bit will be cleared. In the C-LANCE - * the buffer length of 0 is interpreted as a 4096-byte - * buffer.'' - */ - /* r=michaln: Perhaps not quite right. The C-LANCE (Am79C90) - * datasheet explains that the old LANCE (Am7990) ignored - * the top four bits next to BCNT and a count of 0 was - * interpreted as 4096. In the C-LANCE, that is still the - * case if the top bits are all ones. If all 16 bits are - * zero, the C-LANCE interprets it as zero-length transmit - * buffer. It's not entirely clear if the later models - * (PCnet-ISA, PCnet-PCI) behave like the C-LANCE or not. - * It is possible that the actual behavior of the C-LANCE - * and later hardware is that the buffer lengths are *16-bit* - * two's complement numbers between 0 and 4096. AMD's drivers - * in fact generally treat the length as a 16-bit quantity. */ - pcnetlog(1, "%s: pcnetAsyncTransmit: illegal 4kb frame -> ignoring\n", dev->name); - pcnetTmdStorePassHost(dev, &tmd, PHYSADDR(dev, CSR_CXDA(dev))); - break; - } else { - pcnetXmitFailTMDGeneric(dev, &tmd); - } - } else { - pcnetXmitFailTMDLinkDown(dev, &tmd); - } + pcnetReceiveNoSync(dev, dev->abLoopBuf, dev->xmit_pos); + } else { + pcnetlog(3, "%s: pcnetAsyncTransmit: transmit loopbuf stp and enp, xmit pos = %d\n", dev->name, dev->xmit_pos); + network_tx(dev->netcard, dev->abLoopBuf, dev->xmit_pos); + } + } else if (cb == 4096) { + /* The Windows NT4 pcnet driver sometimes marks the first + * unused descriptor as owned by us. Ignore that (by + * passing it back). Do not update the ring counter in this + * case (otherwise that driver becomes even more confused, + * which causes transmit to stall for about 10 seconds). + * This is just a workaround, not a final solution. + */ + /* r=frank: IMHO this is the correct implementation. The + * manual says: ``If the OWN bit is set and the buffer + * length is 0, the OWN bit will be cleared. In the C-LANCE + * the buffer length of 0 is interpreted as a 4096-byte + * buffer.'' + */ + /* r=michaln: Perhaps not quite right. The C-LANCE (Am79C90) + * datasheet explains that the old LANCE (Am7990) ignored + * the top four bits next to BCNT and a count of 0 was + * interpreted as 4096. In the C-LANCE, that is still the + * case if the top bits are all ones. If all 16 bits are + * zero, the C-LANCE interprets it as zero-length transmit + * buffer. It's not entirely clear if the later models + * (PCnet-ISA, PCnet-PCI) behave like the C-LANCE or not. + * It is possible that the actual behavior of the C-LANCE + * and later hardware is that the buffer lengths are *16-bit* + * two's complement numbers between 0 and 4096. AMD's drivers + * in fact generally treat the length as a 16-bit quantity. */ + pcnetlog(1, "%s: pcnetAsyncTransmit: illegal 4kb frame -> ignoring\n", dev->name); + pcnetTmdStorePassHost(dev, &tmd, PHYSADDR(dev, CSR_CXDA(dev))); + break; + } else { + pcnetXmitFailTMDGeneric(dev, &tmd); + } + } else { + pcnetXmitFailTMDLinkDown(dev, &tmd); + } /* Write back the TMD and pass it to the host (clear own bit). */ pcnetTmdStorePassHost(dev, &tmd, PHYSADDR(dev, CSR_CXDA(dev))); @@ -1581,8 +1550,9 @@ pcnetAsyncTransmit(nic_t *dev) if (CSR_XMTRC(dev) < 2) { CSR_XMTRC(dev) = CSR_XMTRL(dev); } else { - CSR_XMTRC(dev)--; - } + CSR_XMTRC(dev) + --; + } } else if (tmd.tmd1.stp) { /* * Read TMDs until end-of-packet or tdte poll fails (underflow). @@ -1591,9 +1561,9 @@ pcnetAsyncTransmit(nic_t *dev) * waste time finding out how much space we actually need even if * we could reliably do that on SMP guests. */ - unsigned cb = 4096 - tmd.tmd1.bcnt; - dev->xmit_pos = pcnetCalcPacketLen(dev, cb); - dma_bm_read(PHYSADDR(dev, tmd.tmd0.tbadr), dev->abLoopBuf, cb, dev->transfer_size); + unsigned cb = 4096 - tmd.tmd1.bcnt; + dev->xmit_pos = pcnetCalcPacketLen(dev, cb); + dma_bm_read(PHYSADDR(dev, tmd.tmd0.tbadr), dev->abLoopBuf, cb, dev->transfer_size); for (;;) { /* @@ -1603,7 +1573,8 @@ pcnetAsyncTransmit(nic_t *dev) if (CSR_XMTRC(dev) < 2) CSR_XMTRC(dev) = CSR_XMTRL(dev); else - CSR_XMTRC(dev)--; + CSR_XMTRC(dev) + --; TMD dummy; if (!pcnetTdtePoll(dev, &dummy)) { @@ -1611,13 +1582,13 @@ pcnetAsyncTransmit(nic_t *dev) * Underflow! */ tmd.tmd2.buff = tmd.tmd2.uflo = tmd.tmd1.err = 1; - dev->aCSR[0] |= 0x0200; /* set TINT */ - /* Don't allow the guest to clear TINT before reading it */ - dev->u16CSR0LastSeenByGuest &= ~0x0200; - if (!CSR_DXSUFLO(dev)) /* stop on xmit underflow */ - dev->aCSR[0] &= ~0x0010; /* clear TXON */ + dev->aCSR[0] |= 0x0200; /* set TINT */ + /* Don't allow the guest to clear TINT before reading it */ + dev->u16CSR0LastSeenByGuest &= ~0x0200; + if (!CSR_DXSUFLO(dev)) /* stop on xmit underflow */ + dev->aCSR[0] &= ~0x0010; /* clear TXON */ pcnetTmdStorePassHost(dev, &tmd, GCPhysPrevTmd); - pcnetlog(3,"%s: pcnetAsyncTransmit: Underflow!!!\n", dev->name); + pcnetlog(3, "%s: pcnetAsyncTransmit: Underflow!!!\n", dev->name); break; } @@ -1630,25 +1601,25 @@ pcnetAsyncTransmit(nic_t *dev) pcnetTmdLoad(dev, &tmd, PHYSADDR(dev, CSR_CXDA(dev)), 0); cb = 4096 - tmd.tmd1.bcnt; if (dev->xmit_pos + cb <= MAX_FRAME) { /** @todo this used to be ... + cb < MAX_FRAME. */ - int off = dev->xmit_pos; - dev->xmit_pos = cb + off; - dma_bm_read(PHYSADDR(dev, tmd.tmd0.tbadr), dev->abLoopBuf + off, cb, dev->transfer_size); - } + int off = dev->xmit_pos; + dev->xmit_pos = cb + off; + dma_bm_read(PHYSADDR(dev, tmd.tmd0.tbadr), dev->abLoopBuf + off, cb, dev->transfer_size); + } /* * Done already? */ if (tmd.tmd1.enp) { - if (fLoopback) { - if (HOST_IS_OWNER(CSR_CRST(dev))) - pcnetRdtePoll(dev); + if (fLoopback) { + if (HOST_IS_OWNER(CSR_CRST(dev))) + pcnetRdtePoll(dev); - pcnetlog(3, "%s: pcnetAsyncTransmit: receive loopback enp\n", dev->name); - pcnetReceiveNoSync(dev, dev->abLoopBuf, dev->xmit_pos); - } else { - pcnetlog(3, "%s: pcnetAsyncTransmit: transmit loopbuf enp\n", dev->name); - network_tx(dev->netcard, dev->abLoopBuf, dev->xmit_pos); - } + pcnetlog(3, "%s: pcnetAsyncTransmit: receive loopback enp\n", dev->name); + pcnetReceiveNoSync(dev, dev->abLoopBuf, dev->xmit_pos); + } else { + pcnetlog(3, "%s: pcnetAsyncTransmit: transmit loopbuf enp\n", dev->name); + network_tx(dev->netcard, dev->abLoopBuf, dev->xmit_pos); + } /* Write back the TMD, pass it to the host */ pcnetTmdStorePassHost(dev, &tmd, PHYSADDR(dev, CSR_CXDA(dev))); @@ -1657,40 +1628,40 @@ pcnetAsyncTransmit(nic_t *dev) if (CSR_XMTRC(dev) < 2) CSR_XMTRC(dev) = CSR_XMTRL(dev); else - CSR_XMTRC(dev)--; + CSR_XMTRC(dev) + --; break; } } /* the loop */ } /* Update TDMD, TXSTRT and TINT. */ - dev->aCSR[0] &= ~0x0008; /* clear TDMD */ - dev->aCSR[4] |= 0x0008; /* set TXSTRT */ - dev->xmit_pos = -1; - if (!CSR_TOKINTD(dev) /* Transmit OK Interrupt Disable, no infl. on errors. */ - || (CSR_LTINTEN(dev) && tmd.tmd1.ltint) + dev->aCSR[0] &= ~0x0008; /* clear TDMD */ + dev->aCSR[4] |= 0x0008; /* set TXSTRT */ + dev->xmit_pos = -1; + if (!CSR_TOKINTD(dev) /* Transmit OK Interrupt Disable, no infl. on errors. */ + || (CSR_LTINTEN(dev) && tmd.tmd1.ltint) || tmd.tmd1.err) { - cFlushIrq++; + cFlushIrq++; } if (--cMax == 0) break; - } while (CSR_TXON(dev)); /* transfer on */ + } while (CSR_TXON(dev)); /* transfer on */ if (cFlushIrq) { - dev->aCSR[0] |= 0x0200; /* set TINT */ - /* Don't allow the guest to clear TINT before reading it */ - dev->u16CSR0LastSeenByGuest &= ~0x0200; - pcnetUpdateIrq(dev); + dev->aCSR[0] |= 0x0200; /* set TINT */ + /* Don't allow the guest to clear TINT before reading it */ + dev->u16CSR0LastSeenByGuest &= ~0x0200; + pcnetUpdateIrq(dev); } } - /** * Poll for changes in RX and TX descriptor rings. */ static void pcnetPollRxTx(nic_t *dev) { - if (CSR_RXON(dev)) { + if (CSR_RXON(dev)) { /* * The second case is important for pcnetWaitReceiveAvail(): If CSR_CRST(dev) was * true but pcnetCanReceive() returned false for some other reason we need to check @@ -1704,24 +1675,22 @@ pcnetPollRxTx(nic_t *dev) pcnetAsyncTransmit(dev); } - static void pcnetPollTimer(void *p) { - nic_t *dev = (nic_t *)p; + nic_t *dev = (nic_t *) p; timer_advance_u64(&dev->timer, 2000 * TIMER_USEC); if (CSR_TDMD(dev)) - pcnetAsyncTransmit(dev); + pcnetAsyncTransmit(dev); pcnetUpdateIrq(dev); if (!CSR_STOP(dev) && !CSR_SPND(dev) && (!CSR_DPOLL(dev) || dev->fMaybeOutOfSpace)) - pcnetPollRxTx(dev); + pcnetPollRxTx(dev); } - static void pcnetHardReset(nic_t *dev) { @@ -1733,24 +1702,24 @@ pcnetHardReset(nic_t *dev) /* Many of the BCR values would normally be read from the EEPROM. */ dev->aBCR[BCR_MSRDA] = 0x0005; dev->aBCR[BCR_MSWRA] = 0x0005; - dev->aBCR[BCR_MC] = 0x0002; + dev->aBCR[BCR_MC] = 0x0002; dev->aBCR[BCR_LNKST] = 0x00c0; - dev->aBCR[BCR_LED1] = 0x0084; - dev->aBCR[BCR_LED2] = 0x0088; - dev->aBCR[BCR_LED3] = 0x0090; + dev->aBCR[BCR_LED1] = 0x0084; + dev->aBCR[BCR_LED2] = 0x0088; + dev->aBCR[BCR_LED3] = 0x0090; - dev->aBCR[BCR_FDC] = 0x0000; - dev->aBCR[BCR_BSBC] = 0x9001; + dev->aBCR[BCR_FDC] = 0x0000; + dev->aBCR[BCR_BSBC] = 0x9001; dev->aBCR[BCR_EECAS] = 0x0002; dev->aBCR[BCR_STVAL] = 0xffff; dev->aCSR[58] = dev->aBCR[BCR_SWS] = 0x0200; /* CSR58 is an alias for BCR20 */ - dev->iLog2DescSize = 3; - dev->aBCR[BCR_PLAT] = 0xff06; - dev->aBCR[BCR_MIICAS] = 0x20; /* Auto-negotiation on. */ - dev->aBCR[BCR_MIIADDR] = 0; /* Internal PHY on Am79C973 would be (0x1e << 5) */ - dev->aBCR[BCR_PCIVID] = 0x1022; - dev->aBCR[BCR_PCISID] = 0x0020; - dev->aBCR[BCR_PCISVID] = 0x1022; + dev->iLog2DescSize = 3; + dev->aBCR[BCR_PLAT] = 0xff06; + dev->aBCR[BCR_MIICAS] = 0x20; /* Auto-negotiation on. */ + dev->aBCR[BCR_MIIADDR] = 0; /* Internal PHY on Am79C973 would be (0x1e << 5) */ + dev->aBCR[BCR_PCIVID] = 0x1022; + dev->aBCR[BCR_PCISID] = 0x0020; + dev->aBCR[BCR_PCISVID] = 0x1022; /* Reset the error counter. */ dev->uCntBadRMD = 0; @@ -1758,193 +1727,191 @@ pcnetHardReset(nic_t *dev) pcnetSoftReset(dev); } - static void pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val) { pcnetlog(1, "%s: pcnet_csr_writew: rap=%d val=%#06x\n", dev->name, rap, val); switch (rap) { - case 0: - { - uint16_t csr0 = dev->aCSR[0]; - /* Clear any interrupt flags. - * Don't clear an interrupt flag which was not seen by the guest yet. */ - csr0 &= ~(val & 0x7f00 & dev->u16CSR0LastSeenByGuest); - csr0 = (csr0 & ~0x0040) | (val & 0x0048); - val = (val & 0x007f) | (csr0 & 0x7f00); + case 0: + { + uint16_t csr0 = dev->aCSR[0]; + /* Clear any interrupt flags. + * Don't clear an interrupt flag which was not seen by the guest yet. */ + csr0 &= ~(val & 0x7f00 & dev->u16CSR0LastSeenByGuest); + csr0 = (csr0 & ~0x0040) | (val & 0x0048); + val = (val & 0x007f) | (csr0 & 0x7f00); - /* If STOP, STRT and INIT are set, clear STRT and INIT */ - if ((val & 7) == 7) - val &= ~3; + /* If STOP, STRT and INIT are set, clear STRT and INIT */ + if ((val & 7) == 7) + val &= ~3; - pcnetlog(2, "%s: CSR0 val = %04x, val2 = %04x\n", dev->name, val, dev->aCSR[0]); + pcnetlog(2, "%s: CSR0 val = %04x, val2 = %04x\n", dev->name, val, dev->aCSR[0]); - dev->aCSR[0] = csr0; + dev->aCSR[0] = csr0; - if (!CSR_STOP(dev) && (val & 4)) { - pcnetlog(3, "%s: pcnet_csr_writew(): Stop\n", dev->name); - pcnetStop(dev); - } + if (!CSR_STOP(dev) && (val & 4)) { + pcnetlog(3, "%s: pcnet_csr_writew(): Stop\n", dev->name); + pcnetStop(dev); + } - if (!CSR_INIT(dev) && (val & 1)) { - pcnetlog(3, "%s: pcnet_csr_writew(): Init\n", dev->name); - pcnetInit(dev); - } + if (!CSR_INIT(dev) && (val & 1)) { + pcnetlog(3, "%s: pcnet_csr_writew(): Init\n", dev->name); + pcnetInit(dev); + } - if (!CSR_STRT(dev) && (val & 2)) { - pcnetlog(3, "%s: pcnet_csr_writew(): Start\n", dev->name); - pcnetStart(dev); - } + if (!CSR_STRT(dev) && (val & 2)) { + pcnetlog(3, "%s: pcnet_csr_writew(): Start\n", dev->name); + pcnetStart(dev); + } - if (CSR_TDMD(dev)) { - pcnetlog(3, "%s: pcnet_csr_writew(): Transmit\n", dev->name); - pcnetAsyncTransmit(dev); - } - } - return; + if (CSR_TDMD(dev)) { + pcnetlog(3, "%s: pcnet_csr_writew(): Transmit\n", dev->name); + pcnetAsyncTransmit(dev); + } + } + return; - case 2: /* IADRH */ - if (dev->is_isa) - val &= 0x00ff; /* Upper 8 bits ignored on ISA chips. */ - case 1: /* IADRL */ - case 8: /* LADRF 0..15 */ - case 9: /* LADRF 16..31 */ - case 10: /* LADRF 32..47 */ - case 11: /* LADRF 48..63 */ - case 12: /* PADR 0..15 */ - case 13: /* PADR 16..31 */ - case 14: /* PADR 32..47 */ - case 18: /* CRBAL */ - case 19: /* CRBAU */ - case 20: /* CXBAL */ - case 21: /* CXBAU */ - case 22: /* NRBAL */ - case 23: /* NRBAU */ - case 26: /* NRDAL */ - case 27: /* NRDAU */ - case 28: /* CRDAL */ - case 29: /* CRDAU */ - case 32: /* NXDAL */ - case 33: /* NXDAU */ - case 34: /* CXDAL */ - case 35: /* CXDAU */ - case 36: /* NNRDL */ - case 37: /* NNRDU */ - case 38: /* NNXDL */ - case 39: /* NNXDU */ - case 40: /* CRBCL */ - case 41: /* CRBCU */ - case 42: /* CXBCL */ - case 43: /* CXBCU */ - case 44: /* NRBCL */ - case 45: /* NRBCU */ - case 46: /* POLL */ - case 47: /* POLLINT */ - case 72: /* RCVRC */ - case 74: /* XMTRC */ - case 112: /* MISSC */ - if (CSR_STOP(dev) || CSR_SPND(dev)) - break; - return; - case 3: /* Interrupt Mask and Deferral Control */ - break; - case 4: /* Test and Features Control */ - dev->aCSR[4] &= ~(val & 0x026a); - val &= ~0x026a; - val |= dev->aCSR[4] & 0x026a; - break; - case 5: /* Extended Control and Interrupt 1 */ - dev->aCSR[5] &= ~(val & 0x0a90); - val &= ~0x0a90; - val |= dev->aCSR[5] & 0x0a90; - break; - case 7: /* Extended Control and Interrupt 2 */ - { - uint16_t csr7 = dev->aCSR[7]; - csr7 &= ~0x0400; - csr7 &= ~(val & 0x0800); - csr7 |= (val & 0x0400); - dev->aCSR[7] = csr7; - } - return; - case 15: /* Mode */ - break; - case 16: /* IADRL */ - pcnet_csr_writew(dev,1,val); - return; - case 17: /* IADRH */ - pcnet_csr_writew(dev,2,val); - return; - /* - * 24 and 25 are the Base Address of Receive Descriptor. - * We combine and mirror these in GCRDRA. - */ - case 24: /* BADRL */ - case 25: /* BADRU */ - if (!CSR_STOP(dev) && !CSR_SPND(dev)) { - pcnetlog(3, "%s: WRITE CSR%d, %#06x, ignoring!!\n", dev->name, rap, val); - return; - } - if (rap == 24) - dev->GCRDRA = (dev->GCRDRA & 0xffff0000) | (val & 0x0000ffff); - else - dev->GCRDRA = (dev->GCRDRA & 0x0000ffff) | ((val & 0x0000ffff) << 16); - pcnetlog(3, "%s: WRITE CSR%d, %#06x => GCRDRA=%08x (alt init)\n", dev->name, rap, val, dev->GCRDRA); - if (dev->GCRDRA & (dev->iLog2DescSize - 1)) - pcnetlog(1, "%s: Warning: Misaligned RDRA (GCRDRA=%#010x)\n", dev->name, dev->GCRDRA); - break; - /* - * 30 & 31 are the Base Address of Transmit Descriptor. - * We combine and mirrorthese in GCTDRA. - */ - case 30: /* BADXL */ - case 31: /* BADXU */ - if (!CSR_STOP(dev) && !CSR_SPND(dev)) { - pcnetlog(3, "%s: WRITE CSR%d, %#06x !!\n", dev->name, rap, val); - return; - } - if (rap == 30) - dev->GCTDRA = (dev->GCTDRA & 0xffff0000) | (val & 0x0000ffff); - else - dev->GCTDRA = (dev->GCTDRA & 0x0000ffff) | ((val & 0x0000ffff) << 16); + case 2: /* IADRH */ + if (dev->is_isa) + val &= 0x00ff; /* Upper 8 bits ignored on ISA chips. */ + case 1: /* IADRL */ + case 8: /* LADRF 0..15 */ + case 9: /* LADRF 16..31 */ + case 10: /* LADRF 32..47 */ + case 11: /* LADRF 48..63 */ + case 12: /* PADR 0..15 */ + case 13: /* PADR 16..31 */ + case 14: /* PADR 32..47 */ + case 18: /* CRBAL */ + case 19: /* CRBAU */ + case 20: /* CXBAL */ + case 21: /* CXBAU */ + case 22: /* NRBAL */ + case 23: /* NRBAU */ + case 26: /* NRDAL */ + case 27: /* NRDAU */ + case 28: /* CRDAL */ + case 29: /* CRDAU */ + case 32: /* NXDAL */ + case 33: /* NXDAU */ + case 34: /* CXDAL */ + case 35: /* CXDAU */ + case 36: /* NNRDL */ + case 37: /* NNRDU */ + case 38: /* NNXDL */ + case 39: /* NNXDU */ + case 40: /* CRBCL */ + case 41: /* CRBCU */ + case 42: /* CXBCL */ + case 43: /* CXBCU */ + case 44: /* NRBCL */ + case 45: /* NRBCU */ + case 46: /* POLL */ + case 47: /* POLLINT */ + case 72: /* RCVRC */ + case 74: /* XMTRC */ + case 112: /* MISSC */ + if (CSR_STOP(dev) || CSR_SPND(dev)) + break; + return; + case 3: /* Interrupt Mask and Deferral Control */ + break; + case 4: /* Test and Features Control */ + dev->aCSR[4] &= ~(val & 0x026a); + val &= ~0x026a; + val |= dev->aCSR[4] & 0x026a; + break; + case 5: /* Extended Control and Interrupt 1 */ + dev->aCSR[5] &= ~(val & 0x0a90); + val &= ~0x0a90; + val |= dev->aCSR[5] & 0x0a90; + break; + case 7: /* Extended Control and Interrupt 2 */ + { + uint16_t csr7 = dev->aCSR[7]; + csr7 &= ~0x0400; + csr7 &= ~(val & 0x0800); + csr7 |= (val & 0x0400); + dev->aCSR[7] = csr7; + } + return; + case 15: /* Mode */ + break; + case 16: /* IADRL */ + pcnet_csr_writew(dev, 1, val); + return; + case 17: /* IADRH */ + pcnet_csr_writew(dev, 2, val); + return; + /* + * 24 and 25 are the Base Address of Receive Descriptor. + * We combine and mirror these in GCRDRA. + */ + case 24: /* BADRL */ + case 25: /* BADRU */ + if (!CSR_STOP(dev) && !CSR_SPND(dev)) { + pcnetlog(3, "%s: WRITE CSR%d, %#06x, ignoring!!\n", dev->name, rap, val); + return; + } + if (rap == 24) + dev->GCRDRA = (dev->GCRDRA & 0xffff0000) | (val & 0x0000ffff); + else + dev->GCRDRA = (dev->GCRDRA & 0x0000ffff) | ((val & 0x0000ffff) << 16); + pcnetlog(3, "%s: WRITE CSR%d, %#06x => GCRDRA=%08x (alt init)\n", dev->name, rap, val, dev->GCRDRA); + if (dev->GCRDRA & (dev->iLog2DescSize - 1)) + pcnetlog(1, "%s: Warning: Misaligned RDRA (GCRDRA=%#010x)\n", dev->name, dev->GCRDRA); + break; + /* + * 30 & 31 are the Base Address of Transmit Descriptor. + * We combine and mirrorthese in GCTDRA. + */ + case 30: /* BADXL */ + case 31: /* BADXU */ + if (!CSR_STOP(dev) && !CSR_SPND(dev)) { + pcnetlog(3, "%s: WRITE CSR%d, %#06x !!\n", dev->name, rap, val); + return; + } + if (rap == 30) + dev->GCTDRA = (dev->GCTDRA & 0xffff0000) | (val & 0x0000ffff); + else + dev->GCTDRA = (dev->GCTDRA & 0x0000ffff) | ((val & 0x0000ffff) << 16); - pcnetlog(3, "%s: WRITE CSR%d, %#06x => GCTDRA=%08x (alt init)\n", dev->name, rap, val, dev->GCTDRA); + pcnetlog(3, "%s: WRITE CSR%d, %#06x => GCTDRA=%08x (alt init)\n", dev->name, rap, val, dev->GCTDRA); - if (dev->GCTDRA & (dev->iLog2DescSize - 1)) - pcnetlog(1, "%s: Warning: Misaligned TDRA (GCTDRA=%#010x)\n", dev->name, dev->GCTDRA); - break; - case 58: /* Software Style */ - pcnet_bcr_writew(dev,BCR_SWS,val); - break; - /* - * Registers 76 and 78 aren't stored correctly (see todos), but I'm don't dare - * try fix that right now. So, as a quick hack for 'alt init' I'll just correct them here. - */ - case 76: /* RCVRL */ /** @todo call pcnetUpdateRingHandlers */ - /** @todo receive ring length is stored in two's complement! */ - case 78: /* XMTRL */ /** @todo call pcnetUpdateRingHandlers */ - /** @todo transmit ring length is stored in two's complement! */ - if (!CSR_STOP(dev) && !CSR_SPND(dev)) { - pcnetlog(3, "%s: WRITE CSR%d, %#06x !!\n", dev->name, rap, val); - return; - } - pcnetlog(3, "%s: WRITE CSR%d, %#06x (hacked %#06x) (alt init)\n", dev->name, - rap, val, 1 + ~val); - val = 1 + ~val; + if (dev->GCTDRA & (dev->iLog2DescSize - 1)) + pcnetlog(1, "%s: Warning: Misaligned TDRA (GCTDRA=%#010x)\n", dev->name, dev->GCTDRA); + break; + case 58: /* Software Style */ + pcnet_bcr_writew(dev, BCR_SWS, val); + break; + /* + * Registers 76 and 78 aren't stored correctly (see todos), but I'm don't dare + * try fix that right now. So, as a quick hack for 'alt init' I'll just correct them here. + */ + case 76: /* RCVRL */ /** @todo call pcnetUpdateRingHandlers */ + /** @todo receive ring length is stored in two's complement! */ + case 78: /* XMTRL */ /** @todo call pcnetUpdateRingHandlers */ + /** @todo transmit ring length is stored in two's complement! */ + if (!CSR_STOP(dev) && !CSR_SPND(dev)) { + pcnetlog(3, "%s: WRITE CSR%d, %#06x !!\n", dev->name, rap, val); + return; + } + pcnetlog(3, "%s: WRITE CSR%d, %#06x (hacked %#06x) (alt init)\n", dev->name, + rap, val, 1 + ~val); + val = 1 + ~val; - /* - * HACK ALERT! Set the counter registers too. - */ - dev->aCSR[rap - 4] = val; - break; - default: - return; + /* + * HACK ALERT! Set the counter registers too. + */ + dev->aCSR[rap - 4] = val; + break; + default: + return; } dev->aCSR[rap] = val; } - /** * Encode a 32-bit link speed into a custom 16-bit floating-point value */ @@ -1960,98 +1927,96 @@ pcnetLinkSpd(uint32_t speed) return (exp << 13) | speed; } - static uint16_t pcnet_csr_readw(nic_t *dev, uint16_t rap) { uint16_t val; switch (rap) { - case 0: - pcnetUpdateIrq(dev); - val = dev->aCSR[0]; - val |= (val & 0x7800) ? 0x8000 : 0; - dev->u16CSR0LastSeenByGuest = val; - break; - case 16: - return pcnet_csr_readw(dev,1); - case 17: - return pcnet_csr_readw(dev,2); - case 58: - return pcnet_bcr_readw(dev,BCR_SWS); - case 68: /* Custom register to pass link speed to driver */ - return pcnetLinkSpd(dev->u32LinkSpeed); - default: - val = dev->aCSR[rap]; - break; + case 0: + pcnetUpdateIrq(dev); + val = dev->aCSR[0]; + val |= (val & 0x7800) ? 0x8000 : 0; + dev->u16CSR0LastSeenByGuest = val; + break; + case 16: + return pcnet_csr_readw(dev, 1); + case 17: + return pcnet_csr_readw(dev, 2); + case 58: + return pcnet_bcr_readw(dev, BCR_SWS); + case 68: /* Custom register to pass link speed to driver */ + return pcnetLinkSpd(dev->u32LinkSpeed); + default: + val = dev->aCSR[rap]; + break; } pcnetlog(3, "%s: pcnet_csr_readw rap=%d val=0x%04x\n", dev->name, rap, val); return val; } - static void pcnet_bcr_writew(nic_t *dev, uint16_t rap, uint16_t val) { rap &= 0x7f; pcnetlog(3, "%s: pcnet_bcr_writew rap=%d val=0x%04x\n", dev->name, rap, val); switch (rap) { - case BCR_SWS: - if (!(CSR_STOP(dev) || CSR_SPND(dev))) - return; - val &= ~0x0300; - switch (val & 0x00ff) { - default: - case 0: - val |= 0x0200; /* 16 bit */ - dev->iLog2DescSize = 3; - dev->GCUpperPhys = (0xff00 & dev->aCSR[2]) << 16; - break; - case 1: - val |= 0x0100; /* 32 bit */ - dev->iLog2DescSize = 4; - dev->GCUpperPhys = 0; - break; - case 2: - case 3: - val |= 0x0300; /* 32 bit */ - dev->iLog2DescSize = 4; - dev->GCUpperPhys = 0; - break; - } - dev->aCSR[58] = val; - /* fall through */ - case BCR_LNKST: - case BCR_LED1: - case BCR_LED2: - case BCR_LED3: - case BCR_MC: - case BCR_FDC: - case BCR_BSBC: - case BCR_EECAS: - case BCR_PLAT: - case BCR_MIIADDR: - dev->aBCR[rap] = val; - break; + case BCR_SWS: + if (!(CSR_STOP(dev) || CSR_SPND(dev))) + return; + val &= ~0x0300; + switch (val & 0x00ff) { + default: + case 0: + val |= 0x0200; /* 16 bit */ + dev->iLog2DescSize = 3; + dev->GCUpperPhys = (0xff00 & dev->aCSR[2]) << 16; + break; + case 1: + val |= 0x0100; /* 32 bit */ + dev->iLog2DescSize = 4; + dev->GCUpperPhys = 0; + break; + case 2: + case 3: + val |= 0x0300; /* 32 bit */ + dev->iLog2DescSize = 4; + dev->GCUpperPhys = 0; + break; + } + dev->aCSR[58] = val; + /* fall through */ + case BCR_LNKST: + case BCR_LED1: + case BCR_LED2: + case BCR_LED3: + case BCR_MC: + case BCR_FDC: + case BCR_BSBC: + case BCR_EECAS: + case BCR_PLAT: + case BCR_MIIADDR: + dev->aBCR[rap] = val; + break; - case BCR_MIICAS: - dev->netcard->byte_period = (dev->board == DEV_AM79C973 && (val & 0x28)) ? NET_PERIOD_100M : NET_PERIOD_10M; - dev->aBCR[rap] = val; - break; + case BCR_MIICAS: + dev->netcard->byte_period = (dev->board == DEV_AM79C973 && (val & 0x28)) ? NET_PERIOD_100M : NET_PERIOD_10M; + dev->aBCR[rap] = val; + break; - case BCR_STVAL: - val &= 0xffff; - dev->aBCR[BCR_STVAL] = val; - if (dev->board == DEV_AM79C973) - timer_set_delay_u64(&dev->timer_soft_int, (12.8 * val) * TIMER_USEC); - break; + case BCR_STVAL: + val &= 0xffff; + dev->aBCR[BCR_STVAL] = val; + if (dev->board == DEV_AM79C973) + timer_set_delay_u64(&dev->timer_soft_int, (12.8 * val) * TIMER_USEC); + break; - case BCR_MIIMDR: - dev->aMII[dev->aBCR[BCR_MIIADDR] & 0x1f] = val; - break; + case BCR_MIIMDR: + dev->aMII[dev->aBCR[BCR_MIIADDR] & 0x1f] = val; + break; - default: - break; + default: + break; } } @@ -2059,132 +2024,132 @@ static uint16_t pcnet_mii_readw(nic_t *dev, uint16_t miiaddr) { uint16_t val; - int autoneg, duplex, fast, isolate; + int autoneg, duplex, fast, isolate; /* If the DANAS (BCR32.7) bit is set, the MAC does not do any * auto-negotiation and the PHY must be set up explicitly. DANAS * effectively disables most other BCR32 bits. */ if (dev->aBCR[BCR_MIICAS] & 0x80) { - /* PHY controls auto-negotiation. */ - autoneg = duplex = fast = 1; + /* PHY controls auto-negotiation. */ + autoneg = duplex = fast = 1; } else { - /* BCR32 controls auto-negotiation. */ - autoneg = (dev->aBCR[BCR_MIICAS] & 0x20) != 0; - duplex = (dev->aBCR[BCR_MIICAS] & 0x10) != 0; - fast = (dev->aBCR[BCR_MIICAS] & 0x08) != 0; + /* BCR32 controls auto-negotiation. */ + autoneg = (dev->aBCR[BCR_MIICAS] & 0x20) != 0; + duplex = (dev->aBCR[BCR_MIICAS] & 0x10) != 0; + fast = (dev->aBCR[BCR_MIICAS] & 0x08) != 0; } /* Electrically isolating the PHY mostly disables it. */ isolate = (dev->aMII[0] & 0x400) != 0; switch (miiaddr) { - case 0: - /* MII basic mode control register. */ - val = 0; - if (autoneg) - val |= 0x1000; /* Enable auto negotiation. */ - if (fast) - val |= 0x2000; /* 100 Mbps */ - if (duplex) /* Full duplex forced */ - val |= 0x0100; /* Full duplex */ - if (isolate) /* PHY electrically isolated. */ - val |= 0x0400; /* Isolated */ - break; + case 0: + /* MII basic mode control register. */ + val = 0; + if (autoneg) + val |= 0x1000; /* Enable auto negotiation. */ + if (fast) + val |= 0x2000; /* 100 Mbps */ + if (duplex) /* Full duplex forced */ + val |= 0x0100; /* Full duplex */ + if (isolate) /* PHY electrically isolated. */ + val |= 0x0400; /* Isolated */ + break; - case 1: - /* MII basic mode status register. */ - val = 0x7800 /* Can do 100mbps FD/HD and 10mbps FD/HD. */ - | 0x0040 /* Mgmt frame preamble not required. */ - | 0x0020 /* Auto-negotiation complete. */ - | 0x0008 /* Able to do auto-negotiation. */ - | 0x0004 /* Link up. */ - | 0x0001; /* Extended Capability, i.e. registers 4+ valid. */ - if (!pcnetIsLinkUp(dev) || isolate) { - val &= ~(0x0020 | 0x0004); - dev->cLinkDownReported++; - } - if (!autoneg) { - /* Auto-negotiation disabled. */ - val &= ~(0x0020 | 0x0008); - if (duplex) - val &= ~0x2800; /* Full duplex forced. */ - else - val &= ~0x5000; /* Half duplex forced. */ + case 1: + /* MII basic mode status register. */ + val = 0x7800 /* Can do 100mbps FD/HD and 10mbps FD/HD. */ + | 0x0040 /* Mgmt frame preamble not required. */ + | 0x0020 /* Auto-negotiation complete. */ + | 0x0008 /* Able to do auto-negotiation. */ + | 0x0004 /* Link up. */ + | 0x0001; /* Extended Capability, i.e. registers 4+ valid. */ + if (!pcnetIsLinkUp(dev) || isolate) { + val &= ~(0x0020 | 0x0004); + dev->cLinkDownReported++; + } + if (!autoneg) { + /* Auto-negotiation disabled. */ + val &= ~(0x0020 | 0x0008); + if (duplex) + val &= ~0x2800; /* Full duplex forced. */ + else + val &= ~0x5000; /* Half duplex forced. */ - if (fast) - val &= ~0x1800; /* 100 Mbps forced */ - else - val &= ~0x6000; /* 10 Mbps forced */ - } - break; + if (fast) + val &= ~0x1800; /* 100 Mbps forced */ + else + val &= ~0x6000; /* 10 Mbps forced */ + } + break; - case 2: - /* PHY identifier 1. */ - val = 0x22; /* Am79C874/AC101 PHY */ - break; + case 2: + /* PHY identifier 1. */ + val = 0x22; /* Am79C874/AC101 PHY */ + break; - case 3: - /* PHY identifier 2. */ - val = 0x561b; /* Am79C874/AC101 PHY */ - break; + case 3: + /* PHY identifier 2. */ + val = 0x561b; /* Am79C874/AC101 PHY */ + break; - case 4: - /* Advertisement control register. */ - val = 0x01e0 /* Try 100mbps FD/HD and 10mbps FD/HD. */ - | 0x0001; /* CSMA selector. */ - break; + case 4: + /* Advertisement control register. */ + val = 0x01e0 /* Try 100mbps FD/HD and 10mbps FD/HD. */ + | 0x0001; /* CSMA selector. */ + break; - case 5: - /* Link partner ability register. */ - if (pcnetIsLinkUp(dev) && !isolate) { - val = 0x8000 /* Next page bit. */ - | 0x4000 /* Link partner acked us. */ - | 0x0400 /* Can do flow control. */ - | 0x01e0 /* Can do 100mbps FD/HD and 10mbps FD/HD. */ - | 0x0001; /* Use CSMA selector. */ - } else { - val = 0; - dev->cLinkDownReported++; - } - break; + case 5: + /* Link partner ability register. */ + if (pcnetIsLinkUp(dev) && !isolate) { + val = 0x8000 /* Next page bit. */ + | 0x4000 /* Link partner acked us. */ + | 0x0400 /* Can do flow control. */ + | 0x01e0 /* Can do 100mbps FD/HD and 10mbps FD/HD. */ + | 0x0001; /* Use CSMA selector. */ + } else { + val = 0; + dev->cLinkDownReported++; + } + break; - case 6: - /* Auto negotiation expansion register. */ - if (pcnetIsLinkUp(dev) && !isolate) { - val = 0x0008 /* Link partner supports npage. */ - | 0x0004 /* Enable npage words. */ - | 0x0001; /* Can do N-way auto-negotiation. */ - } else { - val = 0; - dev->cLinkDownReported++; - } - break; + case 6: + /* Auto negotiation expansion register. */ + if (pcnetIsLinkUp(dev) && !isolate) { + val = 0x0008 /* Link partner supports npage. */ + | 0x0004 /* Enable npage words. */ + | 0x0001; /* Can do N-way auto-negotiation. */ + } else { + val = 0; + dev->cLinkDownReported++; + } + break; - case 18: - /* Diagnostic Register (FreeBSD pcn/ac101 driver reads this). */ - if (pcnetIsLinkUp(dev) && !isolate) { - val = 0x1000 /* Receive PLL locked. */ - | 0x0200; /* Signal detected. */ + case 18: + /* Diagnostic Register (FreeBSD pcn/ac101 driver reads this). */ + if (pcnetIsLinkUp(dev) && !isolate) { + val = 0x1000 /* Receive PLL locked. */ + | 0x0200; /* Signal detected. */ - if (autoneg) { - val |= 0x0400 /* 100Mbps rate. */ - | 0x0800; /* Full duplex. */ - } else { - if (fast) - val |= 0x0400; /* 100Mbps rate. */ - if (duplex) - val |= 0x0800; /* Full duplex. */ - } - } else { - val = 0; - dev->cLinkDownReported++; - } - break; + if (autoneg) { + val |= 0x0400 /* 100Mbps rate. */ + | 0x0800; /* Full duplex. */ + } else { + if (fast) + val |= 0x0400; /* 100Mbps rate. */ + if (duplex) + val |= 0x0800; /* Full duplex. */ + } + } else { + val = 0; + dev->cLinkDownReported++; + } + break; - default: - val = 0; - break; + default: + val = 0; + break; } return val; @@ -2196,44 +2161,43 @@ pcnet_bcr_readw(nic_t *dev, uint16_t rap) uint16_t val; rap &= 0x7f; switch (rap) { - case BCR_LNKST: - case BCR_LED1: - case BCR_LED2: - case BCR_LED3: - val = dev->aBCR[rap] & ~0x8000; - if (!(pcnetIsLinkUp(dev))) { - if (rap == 4) - dev->cLinkDownReported++; - val &= ~0x40; - } - val |= (val & 0x017f & dev->u32Lnkst) ? 0x8000 : 0; - break; + case BCR_LNKST: + case BCR_LED1: + case BCR_LED2: + case BCR_LED3: + val = dev->aBCR[rap] & ~0x8000; + if (!(pcnetIsLinkUp(dev))) { + if (rap == 4) + dev->cLinkDownReported++; + val &= ~0x40; + } + val |= (val & 0x017f & dev->u32Lnkst) ? 0x8000 : 0; + break; - case BCR_MIIMDR: - if ((dev->board == DEV_AM79C973) && (((dev->aBCR[BCR_MIIADDR] >> 5) & 0x1f) == 0)) { - uint16_t miiaddr = dev->aBCR[BCR_MIIADDR] & 0x1f; - val = pcnet_mii_readw(dev, miiaddr); - } else - val = 0xffff; - break; + case BCR_MIIMDR: + if ((dev->board == DEV_AM79C973) && (((dev->aBCR[BCR_MIIADDR] >> 5) & 0x1f) == 0)) { + uint16_t miiaddr = dev->aBCR[BCR_MIIADDR] & 0x1f; + val = pcnet_mii_readw(dev, miiaddr); + } else + val = 0xffff; + break; - case BCR_SWCONFIG: - if (dev->board == DEV_AM79C961) - val = ((dev->base_irq & 0x0f) << 4) | (dev->dma_channel & 0x07); - else - val = 0xffff; - break; + case BCR_SWCONFIG: + if (dev->board == DEV_AM79C961) + val = ((dev->base_irq & 0x0f) << 4) | (dev->dma_channel & 0x07); + else + val = 0xffff; + break; - default: - val = rap < BCR_MAX_RAP ? dev->aBCR[rap] : 0; - break; + default: + val = rap < BCR_MAX_RAP ? dev->aBCR[rap] : 0; + break; } pcnetlog(3, "pcnet_bcr_readw rap=%d val=0x%04x\n", rap, val); return val; } - static void pcnet_word_write(nic_t *dev, uint32_t addr, uint16_t val) { @@ -2241,18 +2205,18 @@ pcnet_word_write(nic_t *dev, uint32_t addr, uint16_t val) if (!BCR_DWIO(dev)) { switch (addr & 0x0f) { - case 0x00: /* RDP */ - timer_set_delay_u64(&dev->timer, 2000 * TIMER_USEC); - pcnet_csr_writew(dev, dev->u32RAP, val); - pcnetUpdateIrq(dev); - break; - case 0x02: - dev->u32RAP = val & 0x7f; - break; - case 0x06: - pcnet_bcr_writew(dev, dev->u32RAP, val); - break; - } + case 0x00: /* RDP */ + timer_set_delay_u64(&dev->timer, 2000 * TIMER_USEC); + pcnet_csr_writew(dev, dev->u32RAP, val); + pcnetUpdateIrq(dev); + break; + case 0x02: + dev->u32RAP = val & 0x7f; + break; + case 0x06: + pcnet_bcr_writew(dev, dev->u32RAP, val); + break; + } } } @@ -2262,19 +2226,19 @@ pcnet_byte_read(nic_t *dev, uint32_t addr) uint8_t val = 0xff; if (!BCR_DWIO(dev)) { - switch (addr & 0x0f) { - case 0x04: - pcnetSoftReset(dev); - val = 0; - break; - } + switch (addr & 0x0f) { + case 0x04: + pcnetSoftReset(dev); + val = 0; + break; + } } pcnetUpdateIrq(dev); pcnetlog(3, "%s: pcnet_word_read: addr = %04x, val = %04x, DWIO not set = %04x\n", dev->name, addr & 0x0f, val, !BCR_DWIO(dev)); - return(val); + return (val); } static uint16_t @@ -2283,28 +2247,28 @@ pcnet_word_read(nic_t *dev, uint32_t addr) uint16_t val = 0xffff; if (!BCR_DWIO(dev)) { - switch (addr & 0x0f) { - case 0x00: /* RDP */ - /** @note if we're not polling, then the guest will tell us when to poll by setting TDMD in CSR0 */ - /** Polling is then useless here and possibly expensive. */ - if (!CSR_DPOLL(dev)) - timer_set_delay_u64(&dev->timer, 2000 * TIMER_USEC); + switch (addr & 0x0f) { + case 0x00: /* RDP */ + /** @note if we're not polling, then the guest will tell us when to poll by setting TDMD in CSR0 */ + /** Polling is then useless here and possibly expensive. */ + if (!CSR_DPOLL(dev)) + timer_set_delay_u64(&dev->timer, 2000 * TIMER_USEC); - val = pcnet_csr_readw(dev, dev->u32RAP); - if (dev->u32RAP == 0) - goto skip_update_irq; - break; - case 0x02: - val = dev->u32RAP; - goto skip_update_irq; - case 0x04: - pcnetSoftReset(dev); - val = 0; - break; - case 0x06: - val = pcnet_bcr_readw(dev, dev->u32RAP); - break; - } + val = pcnet_csr_readw(dev, dev->u32RAP); + if (dev->u32RAP == 0) + goto skip_update_irq; + break; + case 0x02: + val = dev->u32RAP; + goto skip_update_irq; + case 0x04: + pcnetSoftReset(dev); + val = 0; + break; + case 0x06: + val = pcnet_bcr_readw(dev, dev->u32RAP); + break; + } } pcnetUpdateIrq(dev); @@ -2312,27 +2276,26 @@ pcnet_word_read(nic_t *dev, uint32_t addr) skip_update_irq: pcnetlog(3, "%s: pcnet_word_read: addr = %04x, val = %04x, DWIO not set = %04x\n", dev->name, addr & 0x0f, val, !BCR_DWIO(dev)); - return(val); + return (val); } - static void pcnet_dword_write(nic_t *dev, uint32_t addr, uint32_t val) { if (BCR_DWIO(dev)) { switch (addr & 0x0f) { - case 0x00: /* RDP */ - timer_set_delay_u64(&dev->timer, 2000 * TIMER_USEC); - pcnet_csr_writew(dev, dev->u32RAP, val & 0xffff); - pcnetUpdateIrq(dev); - break; - case 0x04: - dev->u32RAP = val & 0x7f; - break; - case 0x0c: - pcnet_bcr_writew(dev, dev->u32RAP, val & 0xffff); - break; - } + case 0x00: /* RDP */ + timer_set_delay_u64(&dev->timer, 2000 * TIMER_USEC); + pcnet_csr_writew(dev, dev->u32RAP, val & 0xffff); + pcnetUpdateIrq(dev); + break; + case 0x04: + dev->u32RAP = val & 0x7f; + break; + case 0x0c: + pcnet_bcr_writew(dev, dev->u32RAP, val & 0xffff); + break; + } } else if ((addr & 0x0f) == 0) { /* switch device to dword i/o mode */ pcnet_bcr_writew(dev, BCR_BSBC, pcnet_bcr_readw(dev, BCR_BSBC) | 0x0080); @@ -2340,42 +2303,40 @@ pcnet_dword_write(nic_t *dev, uint32_t addr, uint32_t val) }; } - static uint32_t pcnet_dword_read(nic_t *dev, uint32_t addr) { uint32_t val = 0xffffffff; if (BCR_DWIO(dev)) { - switch (addr & 0x0f) { - case 0x00: /* RDP */ - if (!CSR_DPOLL(dev)) - timer_set_delay_u64(&dev->timer, 2000 * TIMER_USEC); - val = pcnet_csr_readw(dev, dev->u32RAP); - if (dev->u32RAP == 0) - goto skip_update_irq; - break; - case 0x04: - val = dev->u32RAP; - goto skip_update_irq; - case 0x08: - pcnetSoftReset(dev); - val = 0; - break; - case 0x0c: - val = pcnet_bcr_readw(dev, dev->u32RAP); - break; - } + switch (addr & 0x0f) { + case 0x00: /* RDP */ + if (!CSR_DPOLL(dev)) + timer_set_delay_u64(&dev->timer, 2000 * TIMER_USEC); + val = pcnet_csr_readw(dev, dev->u32RAP); + if (dev->u32RAP == 0) + goto skip_update_irq; + break; + case 0x04: + val = dev->u32RAP; + goto skip_update_irq; + case 0x08: + pcnetSoftReset(dev); + val = 0; + break; + case 0x0c: + val = pcnet_bcr_readw(dev, dev->u32RAP); + break; + } } pcnetUpdateIrq(dev); skip_update_irq: pcnetlog(3, "%s: Read Long mode, addr = %08x, val = %08x\n", dev->name, addr, val); - return(val); + return (val); } - static void pcnet_aprom_writeb(nic_t *dev, uint32_t addr, uint32_t val) { @@ -2384,7 +2345,6 @@ pcnet_aprom_writeb(nic_t *dev, uint32_t addr, uint32_t val) dev->aPROM[addr & 0x0f] = val & 0xff; } - static uint32_t pcnet_aprom_readb(nic_t *dev, uint32_t addr) { @@ -2393,7 +2353,6 @@ pcnet_aprom_readb(nic_t *dev, uint32_t addr) return val; } - static void pcnet_write(nic_t *dev, uint32_t addr, uint32_t val, int len) { @@ -2402,379 +2361,363 @@ pcnet_write(nic_t *dev, uint32_t addr, uint32_t val, int len) pcnetlog(3, "%s: write addr %x, val %x, off %x, len %d\n", dev->name, addr, val, off, len); if (off < 0x10) { - if (!BCR_DWIO(dev) && len == 1) - pcnet_aprom_writeb(dev, addr, val); - else if (!BCR_DWIO(dev) && ((addr & 1) == 0) && len == 2) { - pcnet_aprom_writeb(dev, addr, val); - pcnet_aprom_writeb(dev, addr + 1, val >> 8); - } else if (BCR_DWIO(dev) && ((addr & 3) == 0) && len == 4) { - pcnet_aprom_writeb(dev, addr, val); - pcnet_aprom_writeb(dev, addr + 1, val >> 8); - pcnet_aprom_writeb(dev, addr + 2, val >> 16); - pcnet_aprom_writeb(dev, addr + 3, val >> 24); - } + if (!BCR_DWIO(dev) && len == 1) + pcnet_aprom_writeb(dev, addr, val); + else if (!BCR_DWIO(dev) && ((addr & 1) == 0) && len == 2) { + pcnet_aprom_writeb(dev, addr, val); + pcnet_aprom_writeb(dev, addr + 1, val >> 8); + } else if (BCR_DWIO(dev) && ((addr & 3) == 0) && len == 4) { + pcnet_aprom_writeb(dev, addr, val); + pcnet_aprom_writeb(dev, addr + 1, val >> 8); + pcnet_aprom_writeb(dev, addr + 2, val >> 16); + pcnet_aprom_writeb(dev, addr + 3, val >> 24); + } } else { - if (len == 2) - pcnet_word_write(dev, addr, val); - else if (len == 4) - pcnet_dword_write(dev, addr, val); + if (len == 2) + pcnet_word_write(dev, addr, val); + else if (len == 4) + pcnet_dword_write(dev, addr, val); } } - static void pcnet_writeb(uint16_t addr, uint8_t val, void *priv) { - pcnet_write((nic_t *)priv, addr, val, 1); + pcnet_write((nic_t *) priv, addr, val, 1); } - static void pcnet_writew(uint16_t addr, uint16_t val, void *priv) { - pcnet_write((nic_t *)priv, addr, val, 2); + pcnet_write((nic_t *) priv, addr, val, 2); } - static void pcnet_writel(uint16_t addr, uint32_t val, void *priv) { - pcnet_write((nic_t *)priv, addr, val, 4); + pcnet_write((nic_t *) priv, addr, val, 4); } - static uint32_t pcnet_read(nic_t *dev, uint32_t addr, int len) { uint32_t retval = 0xffffffff; - uint16_t off = addr & 0x1f; + uint16_t off = addr & 0x1f; pcnetlog(3, "%s: read addr %x, off %x, len %d\n", dev->name, addr, off, len); if (off < 0x10) { - if (!BCR_DWIO(dev) && len == 1) - retval = pcnet_aprom_readb(dev, addr); - else if (!BCR_DWIO(dev) && ((addr & 1) == 0) && len == 2) - retval = pcnet_aprom_readb(dev, addr) | (pcnet_aprom_readb(dev, addr + 1) << 8); - else if (BCR_DWIO(dev) && ((addr & 3) == 0) && len == 4) { - retval = pcnet_aprom_readb(dev, addr) | (pcnet_aprom_readb(dev, addr + 1) << 8) | - (pcnet_aprom_readb(dev, addr + 2) << 16) | (pcnet_aprom_readb(dev, addr + 3) << 24); - } + if (!BCR_DWIO(dev) && len == 1) + retval = pcnet_aprom_readb(dev, addr); + else if (!BCR_DWIO(dev) && ((addr & 1) == 0) && len == 2) + retval = pcnet_aprom_readb(dev, addr) | (pcnet_aprom_readb(dev, addr + 1) << 8); + else if (BCR_DWIO(dev) && ((addr & 3) == 0) && len == 4) { + retval = pcnet_aprom_readb(dev, addr) | (pcnet_aprom_readb(dev, addr + 1) << 8) | (pcnet_aprom_readb(dev, addr + 2) << 16) | (pcnet_aprom_readb(dev, addr + 3) << 24); + } } else { - if (len == 1) - retval = pcnet_byte_read(dev, addr); - else if (len == 2) - retval = pcnet_word_read(dev, addr); - else if (len == 4) - retval = pcnet_dword_read(dev, addr); + if (len == 1) + retval = pcnet_byte_read(dev, addr); + else if (len == 2) + retval = pcnet_word_read(dev, addr); + else if (len == 4) + retval = pcnet_dword_read(dev, addr); } pcnetlog(3, "%s: value in read - %08x\n", dev->name, retval); - return(retval); + return (retval); } - static uint8_t pcnet_readb(uint16_t addr, void *priv) { - return(pcnet_read((nic_t *)priv, addr, 1)); + return (pcnet_read((nic_t *) priv, addr, 1)); } - static uint16_t pcnet_readw(uint16_t addr, void *priv) { - return(pcnet_read((nic_t *)priv, addr, 2)); + return (pcnet_read((nic_t *) priv, addr, 2)); } - static uint32_t pcnet_readl(uint16_t addr, void *priv) { - return(pcnet_read((nic_t *)priv, addr, 4)); + return (pcnet_read((nic_t *) priv, addr, 4)); } - static void pcnet_mmio_writeb(uint32_t addr, uint8_t val, void *priv) { - pcnet_write((nic_t *)priv, addr, val, 1); + pcnet_write((nic_t *) priv, addr, val, 1); } - static void pcnet_mmio_writew(uint32_t addr, uint16_t val, void *priv) { - pcnet_write((nic_t *)priv, addr, val, 2); + pcnet_write((nic_t *) priv, addr, val, 2); } - static void pcnet_mmio_writel(uint32_t addr, uint32_t val, void *priv) { - pcnet_write((nic_t *)priv, addr, val, 4); + pcnet_write((nic_t *) priv, addr, val, 4); } - static uint8_t pcnet_mmio_readb(uint32_t addr, void *priv) { - return(pcnet_read((nic_t *)priv, addr, 1)); + return (pcnet_read((nic_t *) priv, addr, 1)); } - static uint16_t pcnet_mmio_readw(uint32_t addr, void *priv) { - return(pcnet_read((nic_t *)priv, addr, 2)); + return (pcnet_read((nic_t *) priv, addr, 2)); } - static uint32_t pcnet_mmio_readl(uint32_t addr, void *priv) { - return(pcnet_read((nic_t *)priv, addr, 4)); + return (pcnet_read((nic_t *) priv, addr, 4)); } - static void pcnet_mem_init(nic_t *dev, uint32_t addr) { mem_mapping_add(&dev->mmio_mapping, addr, 32, - pcnet_mmio_readb, pcnet_mmio_readw, pcnet_mmio_readl, - pcnet_mmio_writeb, pcnet_mmio_writew, pcnet_mmio_writel, - NULL, MEM_MAPPING_EXTERNAL, dev); + pcnet_mmio_readb, pcnet_mmio_readw, pcnet_mmio_readl, + pcnet_mmio_writeb, pcnet_mmio_writew, pcnet_mmio_writel, + NULL, MEM_MAPPING_EXTERNAL, dev); } - static void pcnet_mem_set_addr(nic_t *dev, uint32_t base) { mem_mapping_set_addr(&dev->mmio_mapping, base, 32); } - static void pcnet_mem_disable(nic_t *dev) { mem_mapping_disable(&dev->mmio_mapping); } - static void pcnet_ioremove(nic_t *dev, uint16_t addr, int len) { if (dev->is_pci || dev->is_vlb) { - io_removehandler(addr, len, - pcnet_readb, pcnet_readw, pcnet_readl, - pcnet_writeb, pcnet_writew, pcnet_writel, dev); + io_removehandler(addr, len, + pcnet_readb, pcnet_readw, pcnet_readl, + pcnet_writeb, pcnet_writew, pcnet_writel, dev); } else { - io_removehandler(addr, len, - pcnet_readb, pcnet_readw, NULL, - pcnet_writeb, pcnet_writew, NULL, dev); + io_removehandler(addr, len, + pcnet_readb, pcnet_readw, NULL, + pcnet_writeb, pcnet_writew, NULL, dev); } } - static void pcnet_ioset(nic_t *dev, uint16_t addr, int len) { pcnet_ioremove(dev, addr, len); if (dev->is_pci || dev->is_vlb) { - io_sethandler(addr, len, - pcnet_readb, pcnet_readw, pcnet_readl, - pcnet_writeb, pcnet_writew, pcnet_writel, dev); + io_sethandler(addr, len, + pcnet_readb, pcnet_readw, pcnet_readl, + pcnet_writeb, pcnet_writew, pcnet_writel, dev); } else { - io_sethandler(addr, len, - pcnet_readb, pcnet_readw, NULL, - pcnet_writeb, pcnet_writew, NULL, dev); + io_sethandler(addr, len, + pcnet_readb, pcnet_readw, NULL, + pcnet_writeb, pcnet_writew, NULL, dev); } } - static void pcnet_pci_write(int func, int addr, uint8_t val, void *p) { - nic_t *dev = (nic_t *)p; + nic_t *dev = (nic_t *) p; uint8_t valxor; pcnetlog(4, "%s: Write value %02X to register %02X\n", dev->name, val, addr & 0xff); switch (addr) { - case 0x04: - valxor = (val & 0x57) ^ pcnet_pci_regs[addr]; - if (valxor & PCI_COMMAND_IO) { - pcnet_ioremove(dev, dev->PCIBase, 32); - if ((dev->PCIBase != 0) && (val & PCI_COMMAND_IO)) - pcnet_ioset(dev, dev->PCIBase, 32); - } - if (valxor & PCI_COMMAND_MEM) { - pcnet_mem_disable(dev); - if ((dev->MMIOBase != 0) && (val & PCI_COMMAND_MEM)) - pcnet_mem_set_addr(dev, dev->MMIOBase); - } - pcnet_pci_regs[addr] = val & 0x57; - break; + case 0x04: + valxor = (val & 0x57) ^ pcnet_pci_regs[addr]; + if (valxor & PCI_COMMAND_IO) { + pcnet_ioremove(dev, dev->PCIBase, 32); + if ((dev->PCIBase != 0) && (val & PCI_COMMAND_IO)) + pcnet_ioset(dev, dev->PCIBase, 32); + } + if (valxor & PCI_COMMAND_MEM) { + pcnet_mem_disable(dev); + if ((dev->MMIOBase != 0) && (val & PCI_COMMAND_MEM)) + pcnet_mem_set_addr(dev, dev->MMIOBase); + } + pcnet_pci_regs[addr] = val & 0x57; + break; - case 0x05: - pcnet_pci_regs[addr] = val & 0x01; - break; + case 0x05: + pcnet_pci_regs[addr] = val & 0x01; + break; - case 0x0D: - pcnet_pci_regs[addr] = val; - break; + case 0x0D: + pcnet_pci_regs[addr] = val; + break; - case 0x10: case 0x11: case 0x12: case 0x13: - /* I/O Base set. */ - /* First, remove the old I/O. */ - pcnet_ioremove(dev, dev->PCIBase, 32); - /* Then let's set the PCI regs. */ - pcnet_pci_bar[0].addr_regs[addr & 3] = val; - /* Then let's calculate the new I/O base. */ - pcnet_pci_bar[0].addr &= 0xff00; - dev->PCIBase = pcnet_pci_bar[0].addr; - /* Log the new base. */ - pcnetlog(4, "%s: New I/O base is %04X\n" , dev->name, dev->PCIBase); - /* We're done, so get out of the here. */ - if (pcnet_pci_regs[4] & PCI_COMMAND_IO) { - if (dev->PCIBase != 0) - pcnet_ioset(dev, dev->PCIBase, 32); - } - return; + case 0x10: + case 0x11: + case 0x12: + case 0x13: + /* I/O Base set. */ + /* First, remove the old I/O. */ + pcnet_ioremove(dev, dev->PCIBase, 32); + /* Then let's set the PCI regs. */ + pcnet_pci_bar[0].addr_regs[addr & 3] = val; + /* Then let's calculate the new I/O base. */ + pcnet_pci_bar[0].addr &= 0xff00; + dev->PCIBase = pcnet_pci_bar[0].addr; + /* Log the new base. */ + pcnetlog(4, "%s: New I/O base is %04X\n", dev->name, dev->PCIBase); + /* We're done, so get out of the here. */ + if (pcnet_pci_regs[4] & PCI_COMMAND_IO) { + if (dev->PCIBase != 0) + pcnet_ioset(dev, dev->PCIBase, 32); + } + return; - case 0x15: case 0x16: case 0x17: - /* MMIO Base set. */ - /* First, remove the old I/O. */ - pcnet_mem_disable(dev); - /* Then let's set the PCI regs. */ - pcnet_pci_bar[1].addr_regs[addr & 3] = val; - /* Then let's calculate the new I/O base. */ - pcnet_pci_bar[1].addr &= 0xffffc000; - dev->MMIOBase = pcnet_pci_bar[1].addr & 0xffffc000; - /* Log the new base. */ - pcnetlog(4, "%s: New MMIO base is %08X\n" , dev->name, dev->MMIOBase); - /* We're done, so get out of the here. */ - if (pcnet_pci_regs[4] & PCI_COMMAND_MEM) { - if (dev->MMIOBase != 0) - pcnet_mem_set_addr(dev, dev->MMIOBase); - } - return; + case 0x15: + case 0x16: + case 0x17: + /* MMIO Base set. */ + /* First, remove the old I/O. */ + pcnet_mem_disable(dev); + /* Then let's set the PCI regs. */ + pcnet_pci_bar[1].addr_regs[addr & 3] = val; + /* Then let's calculate the new I/O base. */ + pcnet_pci_bar[1].addr &= 0xffffc000; + dev->MMIOBase = pcnet_pci_bar[1].addr & 0xffffc000; + /* Log the new base. */ + pcnetlog(4, "%s: New MMIO base is %08X\n", dev->name, dev->MMIOBase); + /* We're done, so get out of the here. */ + if (pcnet_pci_regs[4] & PCI_COMMAND_MEM) { + if (dev->MMIOBase != 0) + pcnet_mem_set_addr(dev, dev->MMIOBase); + } + return; - case 0x3C: - dev->base_irq = val; - pcnet_pci_regs[addr] = val; - return; + case 0x3C: + dev->base_irq = val; + pcnet_pci_regs[addr] = val; + return; } } - static uint8_t pcnet_pci_read(int func, int addr, void *p) { - nic_t *dev = (nic_t *)p; + nic_t *dev = (nic_t *) p; pcnetlog(4, "%s: Read to register %02X\n", dev->name, addr & 0xff); switch (addr) { - case 0x00: - return 0x22; - case 0x01: - return 0x10; - case 0x02: - return 0x00; - case 0x03: - return 0x20; - case 0x04: - return pcnet_pci_regs[0x04] & 0x57; /*Respond to IO and memory accesses*/ - case 0x05: - return pcnet_pci_regs[0x05] & 0x01; - case 0x06: - return 0x80; - case 0x07: - return 2; - case 0x08: - return (dev->board == DEV_AM79C973) ? 0x40 : 0x10; /*Revision ID*/ - case 0x09: - return 0; /*Programming interface*/ - case 0x0A: - return 0; /*devubclass*/ - case 0x0B: - return 2; /*Class code*/ - case 0x0D: - return pcnet_pci_regs[addr]; - case 0x0E: - return 0; /*Header type */ - case 0x10: - return 1; /*I/O space*/ - case 0x11: - return pcnet_pci_bar[0].addr_regs[1]; - case 0x12: - return pcnet_pci_bar[0].addr_regs[2]; - case 0x13: - return pcnet_pci_bar[0].addr_regs[3]; - case 0x14: - return 0; /*Memory space*/ - case 0x15: - return pcnet_pci_bar[1].addr_regs[1]; - case 0x16: - return pcnet_pci_bar[1].addr_regs[2]; - case 0x17: - return pcnet_pci_bar[1].addr_regs[3]; - case 0x2C: - return 0x22; - case 0x2D: - return 0x10; - case 0x2E: - return 0x00; - case 0x2F: - return 0x20; - case 0x3C: - return dev->base_irq; - case 0x3D: - return PCI_INTA; - case 0x3E: - return 0x06; - case 0x3F: - return 0xff; + case 0x00: + return 0x22; + case 0x01: + return 0x10; + case 0x02: + return 0x00; + case 0x03: + return 0x20; + case 0x04: + return pcnet_pci_regs[0x04] & 0x57; /*Respond to IO and memory accesses*/ + case 0x05: + return pcnet_pci_regs[0x05] & 0x01; + case 0x06: + return 0x80; + case 0x07: + return 2; + case 0x08: + return (dev->board == DEV_AM79C973) ? 0x40 : 0x10; /*Revision ID*/ + case 0x09: + return 0; /*Programming interface*/ + case 0x0A: + return 0; /*devubclass*/ + case 0x0B: + return 2; /*Class code*/ + case 0x0D: + return pcnet_pci_regs[addr]; + case 0x0E: + return 0; /*Header type */ + case 0x10: + return 1; /*I/O space*/ + case 0x11: + return pcnet_pci_bar[0].addr_regs[1]; + case 0x12: + return pcnet_pci_bar[0].addr_regs[2]; + case 0x13: + return pcnet_pci_bar[0].addr_regs[3]; + case 0x14: + return 0; /*Memory space*/ + case 0x15: + return pcnet_pci_bar[1].addr_regs[1]; + case 0x16: + return pcnet_pci_bar[1].addr_regs[2]; + case 0x17: + return pcnet_pci_bar[1].addr_regs[3]; + case 0x2C: + return 0x22; + case 0x2D: + return 0x10; + case 0x2E: + return 0x00; + case 0x2F: + return 0x20; + case 0x3C: + return dev->base_irq; + case 0x3D: + return PCI_INTA; + case 0x3E: + return 0x06; + case 0x3F: + return 0xff; } - return(0); + return (0); } static void pcnet_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv) { if (ld) - return; + return; nic_t *dev = (nic_t *) priv; dev->base_address = 0; - dev->base_irq = 0; - dev->dma_channel = -1; + dev->base_irq = 0; + dev->dma_channel = -1; if (dev->base_address) { - pcnet_ioremove(dev, dev->base_address, 0x20); - dev->base_address = 0; + pcnet_ioremove(dev, dev->base_address, 0x20); + dev->base_address = 0; } if (config->activate) { - dev->base_address = config->io[0].base; - if (dev->base_address != ISAPNP_IO_DISABLED) - pcnet_ioset(dev, dev->base_address, 0x20); + dev->base_address = config->io[0].base; + if (dev->base_address != ISAPNP_IO_DISABLED) + pcnet_ioset(dev, dev->base_address, 0x20); - dev->base_irq = config->irq[0].irq; - dev->dma_channel = config->dma[0].dma; - if (dev->dma_channel == ISAPNP_DMA_DISABLED) - dev->dma_channel = -1; + dev->base_irq = config->irq[0].irq; + dev->dma_channel = config->dma[0].dma; + if (dev->dma_channel == ISAPNP_DMA_DISABLED) + dev->dma_channel = -1; - /* Update PnP register mirrors in ROM. */ - dev->aPROM[32] = dev->base_address >> 8; - dev->aPROM[33] = dev->base_address; - dev->aPROM[34] = dev->base_irq; - dev->aPROM[35] = (config->irq[0].level << 1) | config->irq[0].type; - dev->aPROM[36] = (dev->dma_channel == -1) ? ISAPNP_DMA_DISABLED : dev->dma_channel; + /* Update PnP register mirrors in ROM. */ + dev->aPROM[32] = dev->base_address >> 8; + dev->aPROM[33] = dev->base_address; + dev->aPROM[34] = dev->base_irq; + dev->aPROM[35] = (config->irq[0].level << 1) | config->irq[0].type; + dev->aPROM[36] = (dev->dma_channel == -1) ? ISAPNP_DMA_DISABLED : dev->dma_channel; } } @@ -2784,21 +2727,21 @@ pcnet_pnp_read_vendor_reg(uint8_t ld, uint8_t reg, void *priv) nic_t *dev = (nic_t *) priv; if (!ld && (reg == 0xf0)) - return dev->aPROM[50]; + return dev->aPROM[50]; else - return 0x00; + return 0x00; } static void pcnet_pnp_write_vendor_reg(uint8_t ld, uint8_t reg, uint8_t val, void *priv) { if (ld) - return; + return; nic_t *dev = (nic_t *) priv; if (reg == 0xf0) - dev->aPROM[50] = val & 0x1f; + dev->aPROM[50] = val & 0x1f; } /** @@ -2816,7 +2759,7 @@ static void pcnetTempLinkDown(nic_t *dev) { if (dev->fLinkUp) { - dev->fLinkTempDown = 1; + dev->fLinkTempDown = 1; dev->cLinkDownReported = 0; dev->aCSR[0] |= 0x8000 | 0x2000; /* ERR | CERR (this is probably wrong) */ timer_set_delay_u64(&dev->timer_restore, (dev->cMsLinkUpDelay * 1000) * TIMER_USEC); @@ -2846,7 +2789,7 @@ pcnetCanReceive(nic_t *dev) if (dev->fSignalRxMiss) dev->aCSR[0] |= 0x1000; /* Set MISS flag */ } else - rc = 1; + rc = 1; } return rc; @@ -2895,12 +2838,12 @@ pcnetTimerRestore(void *priv) nic_t *dev = (nic_t *) priv; if (dev->cLinkDownReported <= PCNET_MAX_LINKDOWN_REPORTED) { - timer_advance_u64(&dev->timer_restore, 1500000 * TIMER_USEC); + timer_advance_u64(&dev->timer_restore, 1500000 * TIMER_USEC); } else { - dev->fLinkTempDown = 0; - if (dev->fLinkUp) { - dev->aCSR[0] &= ~(0x8000 | 0x2000); /* ERR | CERR - probably not 100% correct either... */ - } + dev->fLinkTempDown = 0; + if (dev->fLinkUp) { + dev->aCSR[0] &= ~(0x8000 | 0x2000); /* ERR | CERR - probably not 100% correct either... */ + } } } @@ -2908,13 +2851,13 @@ static void * pcnet_init(const device_t *info) { uint32_t mac; - nic_t *dev; - int c; + nic_t *dev; + int c; uint16_t checksum; dev = malloc(sizeof(nic_t)); memset(dev, 0x00, sizeof(nic_t)); - dev->name = info->name; + dev->name = info->name; dev->board = info->local; dev->is_pci = !!(info->flags & DEVICE_PCI); @@ -2922,26 +2865,26 @@ pcnet_init(const device_t *info) dev->is_isa = !!(info->flags & (DEVICE_ISA | DEVICE_AT)); if (dev->is_pci || dev->is_vlb) - dev->transfer_size = 4; + dev->transfer_size = 4; else - dev->transfer_size = 2; + dev->transfer_size = 2; if (dev->is_pci) { - pcnet_mem_init(dev, 0x0fffff00); - pcnet_mem_disable(dev); + pcnet_mem_init(dev, 0x0fffff00); + pcnet_mem_disable(dev); } - dev->fLinkUp = 1; + dev->fLinkUp = 1; dev->cMsLinkUpDelay = 5000; if (dev->board == DEV_AM79C960_EB) { - dev->maclocal[0] = 0x02; /* 02:07:01 (Racal OID) */ - dev->maclocal[1] = 0x07; - dev->maclocal[2] = 0x01; + dev->maclocal[0] = 0x02; /* 02:07:01 (Racal OID) */ + dev->maclocal[1] = 0x07; + dev->maclocal[2] = 0x01; } else { - dev->maclocal[0] = 0x00; /* 00:0C:87 (AMD OID) */ - dev->maclocal[1] = 0x0C; - dev->maclocal[2] = 0x87; + dev->maclocal[0] = 0x00; /* 00:0C:87 (AMD OID) */ + dev->maclocal[1] = 0x0C; + dev->maclocal[2] = 0x87; } /* See if we have a local MAC address configured. */ @@ -2949,18 +2892,18 @@ pcnet_init(const device_t *info) /* Set up our BIA. */ if (mac & 0xff000000) { - /* Generate new local MAC. */ - dev->maclocal[3] = random_generate(); - dev->maclocal[4] = random_generate(); - dev->maclocal[5] = random_generate(); - mac = (((int) dev->maclocal[3]) << 16); - mac |= (((int) dev->maclocal[4]) << 8); - mac |= ((int) dev->maclocal[5]); - device_set_config_mac("mac", mac); + /* Generate new local MAC. */ + dev->maclocal[3] = random_generate(); + dev->maclocal[4] = random_generate(); + dev->maclocal[5] = random_generate(); + mac = (((int) dev->maclocal[3]) << 16); + mac |= (((int) dev->maclocal[4]) << 8); + mac |= ((int) dev->maclocal[5]); + device_set_config_mac("mac", mac); } else { - dev->maclocal[3] = (mac>>16) & 0xff; - dev->maclocal[4] = (mac>>8) & 0xff; - dev->maclocal[5] = (mac & 0xff); + dev->maclocal[3] = (mac >> 16) & 0xff; + dev->maclocal[4] = (mac >> 8) & 0xff; + dev->maclocal[5] = (mac & 0xff); } memcpy(dev->aPROM, dev->maclocal, sizeof(dev->maclocal)); @@ -2974,85 +2917,85 @@ pcnet_init(const device_t *info) /* Hardware ID: must be 11h if compatibility to AMD drivers is desired */ /* 0x00/0xFF=ISA, 0x01=PnP, 0x10=VLB, 0x11=PCI */ if (dev->is_pci) - dev->aPROM[9] = 0x11; + dev->aPROM[9] = 0x11; else if (dev->is_vlb) - dev->aPROM[9] = 0x10; + dev->aPROM[9] = 0x10; else if (dev->board == DEV_AM79C961) - dev->aPROM[9] = 0x01; + dev->aPROM[9] = 0x01; else - dev->aPROM[9] = 0x00; + dev->aPROM[9] = 0x00; /* User programmable space, init with 0 */ dev->aPROM[10] = dev->aPROM[11] = 0x00; if (dev->board == DEV_AM79C960_EB) { dev->aPROM[14] = 0x52; - dev->aPROM[15] = 0x44; /* NI6510 EtherBlaster 'RD' signature. */ + dev->aPROM[15] = 0x44; /* NI6510 EtherBlaster 'RD' signature. */ } else { - /* Must be ASCII W (57h) if compatibility to AMD - driver software is desired */ - dev->aPROM[14] = dev->aPROM[15] = 0x57; + /* Must be ASCII W (57h) if compatibility to AMD + driver software is desired */ + dev->aPROM[14] = dev->aPROM[15] = 0x57; } for (c = 0, checksum = 0; c < 16; c++) - checksum += dev->aPROM[c]; + checksum += dev->aPROM[c]; - *(uint16_t *)&dev->aPROM[12] = cpu_to_le16(checksum); + *(uint16_t *) &dev->aPROM[12] = cpu_to_le16(checksum); /* * Make this device known to the I/O system. * PCI devices start with address spaces inactive. */ if (dev->is_pci) { - /* - * Configure the PCI space registers. - * - * We do this here, so the I/O routines are generic. - */ + /* + * Configure the PCI space registers. + * + * We do this here, so the I/O routines are generic. + */ - /* Enable our address space in PCI. */ - pcnet_pci_bar[0].addr_regs[0] = 1; - pcnet_pci_bar[1].addr_regs[0] = 0; - pcnet_pci_regs[0x04] = 3; + /* Enable our address space in PCI. */ + pcnet_pci_bar[0].addr_regs[0] = 1; + pcnet_pci_bar[1].addr_regs[0] = 0; + pcnet_pci_regs[0x04] = 3; - /* Add device to the PCI bus, keep its slot number. */ - dev->card = pci_add_card(PCI_ADD_NORMAL, - pcnet_pci_read, pcnet_pci_write, dev); + /* Add device to the PCI bus, keep its slot number. */ + dev->card = pci_add_card(PCI_ADD_NORMAL, + pcnet_pci_read, pcnet_pci_write, dev); } else if (dev->board == DEV_AM79C961) { - dev->dma_channel = -1; + dev->dma_channel = -1; - /* Weird secondary checksum. The datasheet isn't clear on what - role it might play with the PnP register mirrors before it. */ - for (c = 0, checksum = 0; c < 54; c++) - checksum += dev->aPROM[c]; + /* Weird secondary checksum. The datasheet isn't clear on what + role it might play with the PnP register mirrors before it. */ + for (c = 0, checksum = 0; c < 54; c++) + checksum += dev->aPROM[c]; - dev->aPROM[51] = checksum; + dev->aPROM[51] = checksum; - memcpy(&dev->aPROM[0x40], am79c961_pnp_rom, sizeof(am79c961_pnp_rom)); - isapnp_add_card(&dev->aPROM[0x40], sizeof(am79c961_pnp_rom), pcnet_pnp_config_changed, NULL, pcnet_pnp_read_vendor_reg, pcnet_pnp_write_vendor_reg, dev); + memcpy(&dev->aPROM[0x40], am79c961_pnp_rom, sizeof(am79c961_pnp_rom)); + isapnp_add_card(&dev->aPROM[0x40], sizeof(am79c961_pnp_rom), pcnet_pnp_config_changed, NULL, pcnet_pnp_read_vendor_reg, pcnet_pnp_write_vendor_reg, dev); } else { - dev->base_address = device_get_config_hex16("base"); - dev->base_irq = device_get_config_int("irq"); - if (dev->is_vlb) - dev->dma_channel = -1; - else - dev->dma_channel = device_get_config_int("dma"); - pcnet_ioset(dev, dev->base_address, 0x20); + dev->base_address = device_get_config_hex16("base"); + dev->base_irq = device_get_config_int("irq"); + if (dev->is_vlb) + dev->dma_channel = -1; + else + dev->dma_channel = device_get_config_int("dma"); + pcnet_ioset(dev, dev->base_address, 0x20); } pcnetlog(2, "%s: I/O=%04x, IRQ=%d, MAC=%02x:%02x:%02x:%02x:%02x:%02x\n", - dev->name, dev->base_address, dev->base_irq, - dev->aPROM[0], dev->aPROM[1], dev->aPROM[2], - dev->aPROM[3], dev->aPROM[4], dev->aPROM[5]); + dev->name, dev->base_address, dev->base_irq, + dev->aPROM[0], dev->aPROM[1], dev->aPROM[2], + dev->aPROM[3], dev->aPROM[4], dev->aPROM[5]); pcnetlog(1, "%s: %s attached IO=0x%X IRQ=%d\n", dev->name, - dev->is_pci?"PCI":"VLB/ISA", dev->base_address, dev->base_irq); + dev->is_pci ? "PCI" : "VLB/ISA", dev->base_address, dev->base_irq); /* Reset the board. */ pcnetHardReset(dev); /* Attach ourselves to the network module. */ - dev->netcard = network_attach(dev, dev->aPROM, pcnetReceiveNoSync, pcnetSetLinkState); + dev->netcard = network_attach(dev, dev->aPROM, pcnetReceiveNoSync, pcnetSetLinkState); dev->netcard->byte_period = (dev->board == DEV_AM79C973) ? NET_PERIOD_100M : NET_PERIOD_10M; timer_add(&dev->timer, pcnetPollTimer, dev, 0); @@ -3062,23 +3005,21 @@ pcnet_init(const device_t *info) timer_add(&dev->timer_restore, pcnetTimerRestore, dev, 0); - return(dev); + return (dev); } - static void pcnet_close(void *priv) { - nic_t *dev = (nic_t *)priv; + nic_t *dev = (nic_t *) priv; pcnetlog(1, "%s: closed\n", dev->name); netcard_close(dev->netcard); if (dev) { - free(dev); - dev = NULL; - + free(dev); + dev = NULL; } } @@ -3198,85 +3139,85 @@ static const device_config_t pcnet_vlb_config[] = { // clang-format on const device_t pcnet_am79c960_device = { - .name = "AMD PCnet-ISA", + .name = "AMD PCnet-ISA", .internal_name = "pcnetisa", - .flags = DEVICE_AT | DEVICE_ISA, - .local = DEV_AM79C960, - .init = pcnet_init, - .close = pcnet_close, - .reset = NULL, + .flags = DEVICE_AT | DEVICE_ISA, + .local = DEV_AM79C960, + .init = pcnet_init, + .close = pcnet_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = pcnet_isa_config + .force_redraw = NULL, + .config = pcnet_isa_config }; const device_t pcnet_am79c960_eb_device = { - .name = "Racal Interlan EtherBlaster", + .name = "Racal Interlan EtherBlaster", .internal_name = "pcnetracal", - .flags = DEVICE_AT | DEVICE_ISA, - .local = DEV_AM79C960_EB, - .init = pcnet_init, - .close = pcnet_close, - .reset = NULL, + .flags = DEVICE_AT | DEVICE_ISA, + .local = DEV_AM79C960_EB, + .init = pcnet_init, + .close = pcnet_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = pcnet_isa_config + .force_redraw = NULL, + .config = pcnet_isa_config }; const device_t pcnet_am79c960_vlb_device = { - .name = "AMD PCnet-VL", + .name = "AMD PCnet-VL", .internal_name = "pcnetvlb", - .flags = DEVICE_VLB, - .local = DEV_AM79C960_VLB, - .init = pcnet_init, - .close = pcnet_close, - .reset = NULL, + .flags = DEVICE_VLB, + .local = DEV_AM79C960_VLB, + .init = pcnet_init, + .close = pcnet_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = pcnet_vlb_config + .force_redraw = NULL, + .config = pcnet_vlb_config }; const device_t pcnet_am79c961_device = { - .name = "AMD PCnet-ISA+", + .name = "AMD PCnet-ISA+", .internal_name = "pcnetisaplus", - .flags = DEVICE_AT | DEVICE_ISA, - .local = DEV_AM79C961, - .init = pcnet_init, - .close = pcnet_close, - .reset = NULL, + .flags = DEVICE_AT | DEVICE_ISA, + .local = DEV_AM79C961, + .init = pcnet_init, + .close = pcnet_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = pcnet_pci_config + .force_redraw = NULL, + .config = pcnet_pci_config }; const device_t pcnet_am79c970a_device = { - .name = "AMD PCnet-PCI II", + .name = "AMD PCnet-PCI II", .internal_name = "pcnetpci", - .flags = DEVICE_PCI, - .local = DEV_AM79C970A, - .init = pcnet_init, - .close = pcnet_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = DEV_AM79C970A, + .init = pcnet_init, + .close = pcnet_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = pcnet_pci_config + .force_redraw = NULL, + .config = pcnet_pci_config }; const device_t pcnet_am79c973_device = { - .name = "AMD PCnet-FAST III", + .name = "AMD PCnet-FAST III", .internal_name = "pcnetfast", - .flags = DEVICE_PCI, - .local = DEV_AM79C973, - .init = pcnet_init, - .close = pcnet_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = DEV_AM79C973, + .init = pcnet_init, + .close = pcnet_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = pcnet_pci_config + .force_redraw = NULL, + .config = pcnet_pci_config }; diff --git a/src/network/net_plip.c b/src/network/net_plip.c index 9372e8022..158e64764 100644 --- a/src/network/net_plip.c +++ b/src/network/net_plip.c @@ -36,9 +36,8 @@ #include <86box/network.h> #include <86box/net_plip.h> - enum { - PLIP_START = 0x00, + PLIP_START = 0x00, PLIP_TX_LEN_LSB_LOW = 0x10, PLIP_TX_LEN_LSB_HIGH, PLIP_TX_LEN_MSB_LOW, @@ -60,26 +59,24 @@ enum { typedef struct { - uint8_t mac[6]; + uint8_t mac[6]; - void *lpt; - pc_timer_t rx_timer; - pc_timer_t timeout_timer; - uint8_t status, ctrl; + void *lpt; + pc_timer_t rx_timer; + pc_timer_t timeout_timer; + uint8_t status, ctrl; - uint8_t state, ack, tx_checksum, tx_checksum_calc, *tx_pkt; - uint16_t tx_len, tx_ptr; + uint8_t state, ack, tx_checksum, tx_checksum_calc, *tx_pkt; + uint16_t tx_len, tx_ptr; - uint8_t *rx_pkt, rx_checksum, rx_return_state; - uint16_t rx_len, rx_ptr; + uint8_t *rx_pkt, rx_checksum, rx_return_state; + uint16_t rx_len, rx_ptr; netcard_t *card; } plip_t; +static void plip_receive_packet(plip_t *dev); -static void plip_receive_packet(plip_t *dev); - -plip_t *instance; - +plip_t *instance; #ifdef ENABLE_PLIP_LOG int plip_do_log = ENABLE_PLIP_LOG; @@ -90,16 +87,15 @@ plip_log(uint8_t lvl, const char *fmt, ...) va_list ap; if (plip_do_log >= lvl) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define plip_log(lvl, fmt, ...) +# define plip_log(lvl, fmt, ...) #endif - static void timeout_timer(void *priv) { @@ -108,22 +104,21 @@ timeout_timer(void *priv) plip_log(1, "PLIP: timeout at state %d status %02X\n", dev->state, dev->status); /* Throw everything out the window. */ - dev->state = PLIP_START; + dev->state = PLIP_START; dev->status = 0x80; if (dev->tx_pkt) { - free(dev->tx_pkt); - dev->tx_pkt = NULL; + free(dev->tx_pkt); + dev->tx_pkt = NULL; } if (dev->rx_pkt) { - free(dev->rx_pkt); - dev->rx_pkt = NULL; + free(dev->rx_pkt); + dev->rx_pkt = NULL; } timer_disable(&dev->timeout_timer); } - static void plip_write_data(uint8_t val, void *priv) { @@ -132,220 +127,219 @@ plip_write_data(uint8_t val, void *priv) plip_log(3, "PLIP: write_data(%02X)\n", val); switch (dev->state) { - case PLIP_START: - if (val == 0x08) { /* D3/ACK wakes us up */ - plip_log(2, "PLIP: ACK wakeup\n"); - dev->state = PLIP_TX_LEN_LSB_LOW; - dev->status = 0x08; - break; - } - return; + case PLIP_START: + if (val == 0x08) { /* D3/ACK wakes us up */ + plip_log(2, "PLIP: ACK wakeup\n"); + dev->state = PLIP_TX_LEN_LSB_LOW; + dev->status = 0x08; + break; + } + return; - case PLIP_TX_LEN_LSB_LOW: - if (!(val & 0x10)) - return; /* D4/BUSY not high yet */ - dev->tx_len = val & 0xf; - plip_log(2, "PLIP: tx_len = %04X (1/4)\n", dev->tx_len); - dev->state = PLIP_TX_LEN_LSB_HIGH; - dev->status &= ~0x88; - break; + case PLIP_TX_LEN_LSB_LOW: + if (!(val & 0x10)) + return; /* D4/BUSY not high yet */ + dev->tx_len = val & 0xf; + plip_log(2, "PLIP: tx_len = %04X (1/4)\n", dev->tx_len); + dev->state = PLIP_TX_LEN_LSB_HIGH; + dev->status &= ~0x88; + break; - case PLIP_TX_LEN_LSB_HIGH: - if (val & 0x10) - return; /* D4/BUSY not low yet */ - dev->tx_len |= (val & 0xf) << 4; - plip_log(2, "PLIP: tx_len = %04X (2/4)\n", dev->tx_len); - dev->state = PLIP_TX_LEN_MSB_LOW; - dev->status |= 0x80; - break; + case PLIP_TX_LEN_LSB_HIGH: + if (val & 0x10) + return; /* D4/BUSY not low yet */ + dev->tx_len |= (val & 0xf) << 4; + plip_log(2, "PLIP: tx_len = %04X (2/4)\n", dev->tx_len); + dev->state = PLIP_TX_LEN_MSB_LOW; + dev->status |= 0x80; + break; - case PLIP_TX_LEN_MSB_LOW: - if (!(val & 0x10)) - return; /* D4/BUSY not high yet */ - dev->tx_len |= (val & 0xf) << 8; - plip_log(2, "PLIP: tx_len = %04X (3/4)\n", dev->tx_len); - dev->state = PLIP_TX_LEN_MSB_HIGH; - dev->status &= ~0x80; - break; + case PLIP_TX_LEN_MSB_LOW: + if (!(val & 0x10)) + return; /* D4/BUSY not high yet */ + dev->tx_len |= (val & 0xf) << 8; + plip_log(2, "PLIP: tx_len = %04X (3/4)\n", dev->tx_len); + dev->state = PLIP_TX_LEN_MSB_HIGH; + dev->status &= ~0x80; + break; - case PLIP_TX_LEN_MSB_HIGH: - if (val & 0x10) - return; /* D4/BUSY not low yet */ - dev->tx_len |= (val & 0xf) << 12; - plip_log(2, "PLIP: tx_len = %04X (4/4)\n", dev->tx_len); + case PLIP_TX_LEN_MSB_HIGH: + if (val & 0x10) + return; /* D4/BUSY not low yet */ + dev->tx_len |= (val & 0xf) << 12; + plip_log(2, "PLIP: tx_len = %04X (4/4)\n", dev->tx_len); - /* We have the length, allocate a packet. */ - if (!(dev->tx_pkt = malloc(dev->tx_len))) /* unlikely */ - fatal("PLIP: unable to allocate tx_pkt\n"); - dev->tx_ptr = 0; - dev->tx_checksum_calc = 0; + /* We have the length, allocate a packet. */ + if (!(dev->tx_pkt = malloc(dev->tx_len))) /* unlikely */ + fatal("PLIP: unable to allocate tx_pkt\n"); + dev->tx_ptr = 0; + dev->tx_checksum_calc = 0; - dev->state = PLIP_TX_DATA_LOW; - dev->status |= 0x80; - break; + dev->state = PLIP_TX_DATA_LOW; + dev->status |= 0x80; + break; - case PLIP_TX_DATA_LOW: - if (!(val & 0x10)) - return; /* D4/BUSY not high yet */ - dev->tx_pkt[dev->tx_ptr] = val & 0x0f; - plip_log(2, "PLIP: tx_pkt[%d] = %02X (1/2)\n", dev->tx_ptr, dev->tx_pkt[dev->tx_ptr]); - dev->state = PLIP_TX_DATA_HIGH; - dev->status &= ~0x80; - break; + case PLIP_TX_DATA_LOW: + if (!(val & 0x10)) + return; /* D4/BUSY not high yet */ + dev->tx_pkt[dev->tx_ptr] = val & 0x0f; + plip_log(2, "PLIP: tx_pkt[%d] = %02X (1/2)\n", dev->tx_ptr, dev->tx_pkt[dev->tx_ptr]); + dev->state = PLIP_TX_DATA_HIGH; + dev->status &= ~0x80; + break; - case PLIP_TX_DATA_HIGH: - if (val & 0x10) - return; /* D4/BUSY not low yet */ - dev->tx_pkt[dev->tx_ptr] |= (val & 0x0f) << 4; - plip_log(2, "PLIP: tx_pkt[%d] = %02X (2/2)\n", dev->tx_ptr, dev->tx_pkt[dev->tx_ptr]); - dev->tx_checksum_calc += dev->tx_pkt[dev->tx_ptr++]; + case PLIP_TX_DATA_HIGH: + if (val & 0x10) + return; /* D4/BUSY not low yet */ + dev->tx_pkt[dev->tx_ptr] |= (val & 0x0f) << 4; + plip_log(2, "PLIP: tx_pkt[%d] = %02X (2/2)\n", dev->tx_ptr, dev->tx_pkt[dev->tx_ptr]); + dev->tx_checksum_calc += dev->tx_pkt[dev->tx_ptr++]; - /* Are we done yet? */ - if (dev->tx_ptr < dev->tx_len) /* no, receive another byte */ - dev->state = PLIP_TX_DATA_LOW; - else /* yes, move on to checksum */ - dev->state = PLIP_TX_CHECKSUM_LOW; - dev->status |= 0x80; - break; + /* Are we done yet? */ + if (dev->tx_ptr < dev->tx_len) /* no, receive another byte */ + dev->state = PLIP_TX_DATA_LOW; + else /* yes, move on to checksum */ + dev->state = PLIP_TX_CHECKSUM_LOW; + dev->status |= 0x80; + break; - case PLIP_TX_CHECKSUM_LOW: - if (!(val & 0x10)) - return; /* D4/BUSY not high yet */ - dev->tx_checksum = val & 0x0f; - plip_log(2, "PLIP: tx_checksum = %02X (1/2)\n", dev->tx_checksum); - dev->state = PLIP_TX_CHECKSUM_HIGH; - dev->status &= ~0x80; - break; + case PLIP_TX_CHECKSUM_LOW: + if (!(val & 0x10)) + return; /* D4/BUSY not high yet */ + dev->tx_checksum = val & 0x0f; + plip_log(2, "PLIP: tx_checksum = %02X (1/2)\n", dev->tx_checksum); + dev->state = PLIP_TX_CHECKSUM_HIGH; + dev->status &= ~0x80; + break; - case PLIP_TX_CHECKSUM_HIGH: - if (val & 0x10) - return; /* D4/BUSY not low yet */ - dev->tx_checksum |= (val & 0x0f) << 4; - plip_log(2, "PLIP: tx_checksum = %02X (2/2)\n", dev->tx_checksum); + case PLIP_TX_CHECKSUM_HIGH: + if (val & 0x10) + return; /* D4/BUSY not low yet */ + dev->tx_checksum |= (val & 0x0f) << 4; + plip_log(2, "PLIP: tx_checksum = %02X (2/2)\n", dev->tx_checksum); - /* Verify checksum. */ - if (dev->tx_checksum_calc == dev->tx_checksum) { - /* Make sure we know the other end's MAC address. */ - memcpy(dev->mac, dev->tx_pkt + 6, 6); + /* Verify checksum. */ + if (dev->tx_checksum_calc == dev->tx_checksum) { + /* Make sure we know the other end's MAC address. */ + memcpy(dev->mac, dev->tx_pkt + 6, 6); - /* Transmit packet. */ - plip_log(2, "PLIP: transmitting %d-byte packet\n", dev->tx_len); - network_tx(dev->card, dev->tx_pkt, dev->tx_len); - } else { - plip_log(1, "PLIP: checksum error: expected %02X, got %02X\n", dev->tx_checksum_calc, dev->tx_checksum); - } + /* Transmit packet. */ + plip_log(2, "PLIP: transmitting %d-byte packet\n", dev->tx_len); + network_tx(dev->card, dev->tx_pkt, dev->tx_len); + } else { + plip_log(1, "PLIP: checksum error: expected %02X, got %02X\n", dev->tx_checksum_calc, dev->tx_checksum); + } - /* We're done with this packet. */ - free(dev->tx_pkt); - dev->tx_pkt = NULL; - dev->tx_len = 0; + /* We're done with this packet. */ + free(dev->tx_pkt); + dev->tx_pkt = NULL; + dev->tx_len = 0; - dev->state = PLIP_END; - dev->status |= 0x80; - break; + dev->state = PLIP_END; + dev->status |= 0x80; + break; - case PLIP_RX_LEN_LSB_LOW: - if (!(val & 0x01)) - return; /* D3/ACK not high yet */ - plip_log(2, "PLIP: rx_len = %04X (1/4)\n", dev->rx_len); - dev->status = (dev->rx_len & 0x0f) << 3; - dev->state = PLIP_RX_LEN_LSB_HIGH; - break; + case PLIP_RX_LEN_LSB_LOW: + if (!(val & 0x01)) + return; /* D3/ACK not high yet */ + plip_log(2, "PLIP: rx_len = %04X (1/4)\n", dev->rx_len); + dev->status = (dev->rx_len & 0x0f) << 3; + dev->state = PLIP_RX_LEN_LSB_HIGH; + break; - case PLIP_RX_LEN_LSB_HIGH: - if (!(val & 0x10)) - return; /* D4/BUSY not high yet */ - plip_log(2, "PLIP: rx_len = %04X (2/4)\n", dev->rx_len); - dev->status = ((dev->rx_len >> 4) & 0x0f) << 3; - dev->status |= 0x80; - dev->state = PLIP_RX_LEN_MSB_LOW; - break; + case PLIP_RX_LEN_LSB_HIGH: + if (!(val & 0x10)) + return; /* D4/BUSY not high yet */ + plip_log(2, "PLIP: rx_len = %04X (2/4)\n", dev->rx_len); + dev->status = ((dev->rx_len >> 4) & 0x0f) << 3; + dev->status |= 0x80; + dev->state = PLIP_RX_LEN_MSB_LOW; + break; - case PLIP_RX_LEN_MSB_LOW: - if (val & 0x10) - return; /* D4/BUSY not low yet */ - plip_log(2, "PLIP: rx_len = %04X (3/4)\n", dev->rx_len); - dev->status = ((dev->rx_len >> 8) & 0x0f) << 3; - dev->state = PLIP_RX_LEN_MSB_HIGH; - break; + case PLIP_RX_LEN_MSB_LOW: + if (val & 0x10) + return; /* D4/BUSY not low yet */ + plip_log(2, "PLIP: rx_len = %04X (3/4)\n", dev->rx_len); + dev->status = ((dev->rx_len >> 8) & 0x0f) << 3; + dev->state = PLIP_RX_LEN_MSB_HIGH; + break; - case PLIP_RX_LEN_MSB_HIGH: - if (!(val & 0x10)) - return; /* D4/BUSY not high yet */ - plip_log(2, "PLIP: rx_len = %04X (4/4)\n", dev->rx_len); - dev->status = ((dev->rx_len >> 12) & 0x0f) << 3; - dev->status |= 0x80; + case PLIP_RX_LEN_MSB_HIGH: + if (!(val & 0x10)) + return; /* D4/BUSY not high yet */ + plip_log(2, "PLIP: rx_len = %04X (4/4)\n", dev->rx_len); + dev->status = ((dev->rx_len >> 12) & 0x0f) << 3; + dev->status |= 0x80; - dev->rx_ptr = 0; - dev->rx_checksum = 0; - dev->state = PLIP_RX_DATA_LOW; - break; + dev->rx_ptr = 0; + dev->rx_checksum = 0; + dev->state = PLIP_RX_DATA_LOW; + break; - case PLIP_RX_DATA_LOW: - if (val & 0x10) - return; /* D4/BUSY not low yet */ - plip_log(2, "PLIP: rx_pkt[%d] = %02X (1/2)\n", dev->rx_ptr, dev->rx_pkt[dev->rx_ptr]); - dev->status = (dev->rx_pkt[dev->rx_ptr] & 0x0f) << 3; - dev->state = PLIP_RX_DATA_HIGH; - break; + case PLIP_RX_DATA_LOW: + if (val & 0x10) + return; /* D4/BUSY not low yet */ + plip_log(2, "PLIP: rx_pkt[%d] = %02X (1/2)\n", dev->rx_ptr, dev->rx_pkt[dev->rx_ptr]); + dev->status = (dev->rx_pkt[dev->rx_ptr] & 0x0f) << 3; + dev->state = PLIP_RX_DATA_HIGH; + break; - case PLIP_RX_DATA_HIGH: - if (!(val & 0x10)) - return; /* D4/BUSY not high yet */ - plip_log(2, "PLIP: rx_pkt[%d] = %02X (2/2)\n", dev->rx_ptr, dev->rx_pkt[dev->rx_ptr]); - dev->status = ((dev->rx_pkt[dev->rx_ptr] >> 4) & 0x0f) << 3; - dev->status |= 0x80; - dev->rx_checksum += dev->rx_pkt[dev->rx_ptr++]; + case PLIP_RX_DATA_HIGH: + if (!(val & 0x10)) + return; /* D4/BUSY not high yet */ + plip_log(2, "PLIP: rx_pkt[%d] = %02X (2/2)\n", dev->rx_ptr, dev->rx_pkt[dev->rx_ptr]); + dev->status = ((dev->rx_pkt[dev->rx_ptr] >> 4) & 0x0f) << 3; + dev->status |= 0x80; + dev->rx_checksum += dev->rx_pkt[dev->rx_ptr++]; - /* Are we done yet? */ - if (dev->rx_ptr < dev->rx_len) /* no, send another byte */ - dev->state = PLIP_RX_DATA_LOW; - else /* yes, move on to checksum */ - dev->state = PLIP_RX_CHECKSUM_LOW; - break; + /* Are we done yet? */ + if (dev->rx_ptr < dev->rx_len) /* no, send another byte */ + dev->state = PLIP_RX_DATA_LOW; + else /* yes, move on to checksum */ + dev->state = PLIP_RX_CHECKSUM_LOW; + break; - case PLIP_RX_CHECKSUM_LOW: - if (val & 0x10) - return; /* D4/BUSY not low yet */ - plip_log(2, "PLIP: rx_checksum = %02X (1/2)\n", dev->rx_checksum); - dev->status = (dev->rx_checksum & 0x0f) << 3; - dev->state = PLIP_RX_CHECKSUM_HIGH; - break; + case PLIP_RX_CHECKSUM_LOW: + if (val & 0x10) + return; /* D4/BUSY not low yet */ + plip_log(2, "PLIP: rx_checksum = %02X (1/2)\n", dev->rx_checksum); + dev->status = (dev->rx_checksum & 0x0f) << 3; + dev->state = PLIP_RX_CHECKSUM_HIGH; + break; - case PLIP_RX_CHECKSUM_HIGH: - if (!(val & 0x10)) - return; /* D4/BUSY not high yet */ - plip_log(2, "PLIP: rx_checksum = %02X (2/2)\n", dev->rx_checksum); - dev->status = ((dev->rx_checksum >> 4) & 0x0f) << 3; - dev->status |= 0x80; + case PLIP_RX_CHECKSUM_HIGH: + if (!(val & 0x10)) + return; /* D4/BUSY not high yet */ + plip_log(2, "PLIP: rx_checksum = %02X (2/2)\n", dev->rx_checksum); + dev->status = ((dev->rx_checksum >> 4) & 0x0f) << 3; + dev->status |= 0x80; - /* We're done with this packet. */ - free(dev->rx_pkt); - dev->rx_pkt = NULL; - dev->rx_len = 0; + /* We're done with this packet. */ + free(dev->rx_pkt); + dev->rx_pkt = NULL; + dev->rx_len = 0; - dev->state = PLIP_END; - break; + dev->state = PLIP_END; + break; - case PLIP_END: - if (val == 0x00) { /* written after TX or RX is done */ - plip_log(2, "PLIP: end\n"); - dev->status = 0x80; - dev->state = PLIP_START; + case PLIP_END: + if (val == 0x00) { /* written after TX or RX is done */ + plip_log(2, "PLIP: end\n"); + dev->status = 0x80; + dev->state = PLIP_START; - timer_set_delay_u64(&dev->rx_timer, ISACONST); /* for DOS */ - } + timer_set_delay_u64(&dev->rx_timer, ISACONST); /* for DOS */ + } - /* Disengage timeout timer. */ - timer_disable(&dev->timeout_timer); - return; + /* Disengage timeout timer. */ + timer_disable(&dev->timeout_timer); + return; } /* Engage timeout timer unless otherwise specified. */ timer_set_delay_u64(&dev->timeout_timer, 1000000 * TIMER_USEC); } - static void plip_write_ctrl(uint8_t val, void *priv) { @@ -356,10 +350,9 @@ plip_write_ctrl(uint8_t val, void *priv) dev->ctrl = val; if (val & 0x10) /* for Linux */ - timer_set_delay_u64(&dev->rx_timer, ISACONST); + timer_set_delay_u64(&dev->rx_timer, ISACONST); } - static uint8_t plip_read_status(void *priv) { @@ -370,31 +363,30 @@ plip_read_status(void *priv) return dev->status; } - static void plip_receive_packet(plip_t *dev) { /* At least the Linux driver supports being interrupted in the PLIP_TX_LEN_LSB_LOW state, but let's be safe. */ if (dev->state > PLIP_START) { - plip_log(3, "PLIP: cannot receive, operation already in progress\n"); - return; + plip_log(3, "PLIP: cannot receive, operation already in progress\n"); + return; } if (!dev->rx_pkt || !dev->rx_len) { /* unpause RX queue if there's no packet to receive */ - return; + return; } if (!(dev->ctrl & 0x10)) { /* checking this is essential to avoid collisions */ - plip_log(3, "PLIP: cannot receive, interrupts are off\n"); - return; + plip_log(3, "PLIP: cannot receive, interrupts are off\n"); + return; } plip_log(2, "PLIP: receiving %d-byte packet\n", dev->rx_len); /* Set up to receive a packet. */ dev->status = 0xc7; /* DOS expects exactly 0xc7, while Linux masks the 7 off */ - dev->state = PLIP_RX_LEN_LSB_LOW; + dev->state = PLIP_RX_LEN_LSB_LOW; /* Engage timeout timer. */ timer_set_delay_u64(&dev->timeout_timer, 1000000 * TIMER_USEC); @@ -403,7 +395,6 @@ plip_receive_packet(plip_t *dev) lpt_irq(dev->lpt, 1); } - /* This timer defers a call to plip_receive_packet to the next ISA clock, in order to avoid IRQ weirdness. */ static void @@ -416,7 +407,6 @@ rx_timer(void *priv) timer_disable(&dev->rx_timer); } - static int plip_rx(void *priv, uint8_t *buf, int io_len) { @@ -425,12 +415,12 @@ plip_rx(void *priv, uint8_t *buf, int io_len) plip_log(2, "PLIP: incoming %d-byte packet\n", io_len); if (dev->rx_pkt) { /* shouldn't really happen with the RX queue paused */ - plip_log(3, "PLIP: already have a packet to receive"); - return 0; + plip_log(3, "PLIP: already have a packet to receive"); + return 0; } if (!(dev->rx_pkt = malloc(io_len))) /* unlikely */ - fatal("PLIP: unable to allocate rx_pkt\n"); + fatal("PLIP: unable to allocate rx_pkt\n"); /* Copy this packet to our buffer. */ dev->rx_len = io_len; @@ -442,7 +432,6 @@ plip_rx(void *priv, uint8_t *buf, int io_len) return 1; } - static void * plip_lpt_init(void *lpt) { @@ -464,15 +453,14 @@ plip_lpt_init(void *lpt) return dev; } - static void * plip_net_init(const device_t *info) { plip_log(1, "PLIP: net_init()"); if (!instance) { - plip_log(1, " (not attached to LPT)\n"); - return NULL; + plip_log(1, " (not attached to LPT)\n"); + return NULL; } plip_log(1, " (attached to LPT)\n"); @@ -481,38 +469,37 @@ plip_net_init(const device_t *info) return instance; } - static void plip_close(void *priv) { - if (instance->card) { - netcard_close(instance->card); - } + if (instance->card) { + netcard_close(instance->card); + } free(priv); } const lpt_device_t lpt_plip_device = { - .name = "Parallel Line Internet Protocol", + .name = "Parallel Line Internet Protocol", .internal_name = "plip", - .init = plip_lpt_init, - .close = plip_close, - .write_data = plip_write_data, - .write_ctrl = plip_write_ctrl, - .read_data = NULL, - .read_status = plip_read_status, - .read_ctrl = NULL + .init = plip_lpt_init, + .close = plip_close, + .write_data = plip_write_data, + .write_ctrl = plip_write_ctrl, + .read_data = NULL, + .read_status = plip_read_status, + .read_ctrl = NULL }; const device_t plip_device = { - .name = "Parallel Line Internet Protocol", + .name = "Parallel Line Internet Protocol", .internal_name = "plip", - .flags = DEVICE_LPT, - .local = 0, - .init = plip_net_init, - .close = NULL, - .reset = NULL, + .flags = DEVICE_LPT, + .local = 0, + .init = plip_net_init, + .close = NULL, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/network/net_slirp.c b/src/network/net_slirp.c index 0bbd534b3..89c658e64 100644 --- a/src/network/net_slirp.c +++ b/src/network/net_slirp.c @@ -39,10 +39,10 @@ #include <86box/config.h> #include <86box/video.h> #ifdef _WIN32 -#define WIN32_LEAN_AND_MEAN -#include +# define WIN32_LEAN_AND_MEAN +# include #else -#include +# include #endif #include <86box/net_event.h> @@ -75,37 +75,33 @@ typedef struct { #ifdef ENABLE_SLIRP_LOG int slirp_do_log = ENABLE_SLIRP_LOG; - static void slirp_log(const char *fmt, ...) { va_list ap; if (slirp_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define slirp_log(fmt, ...) +# define slirp_log(fmt, ...) #endif - static void net_slirp_guest_error(const char *msg, void *opaque) { slirp_log("SLiRP: guest_error(): %s\n", msg); } - static int64_t net_slirp_clock_get_ns(void *opaque) { - return (int64_t)((double)tsc / cpuclock * 1000000000.0); + return (int64_t) ((double) tsc / cpuclock * 1000000000.0); } - static void * net_slirp_timer_new(SlirpTimerCb cb, void *cb_opaque, void *opaque) { @@ -114,7 +110,6 @@ net_slirp_timer_new(SlirpTimerCb cb, void *cb_opaque, void *opaque) return timer; } - static void net_slirp_timer_free(void *timer, void *opaque) { @@ -122,14 +117,12 @@ net_slirp_timer_free(void *timer, void *opaque) free(timer); } - static void net_slirp_timer_mod(void *timer, int64_t expire_timer, void *opaque) { timer_on_auto(timer, expire_timer * 1000); } - static void net_slirp_register_poll_fd(int fd, void *opaque) { @@ -137,7 +130,6 @@ net_slirp_register_poll_fd(int fd, void *opaque) (void) opaque; } - static void net_slirp_unregister_poll_fd(int fd, void *opaque) { @@ -145,14 +137,12 @@ net_slirp_unregister_poll_fd(int fd, void *opaque) (void) opaque; } - static void net_slirp_notify(void *opaque) { (void) opaque; } - ssize_t net_slirp_send_packet(const void *qp, size_t pkt_len, void *opaque) { @@ -160,20 +150,19 @@ net_slirp_send_packet(const void *qp, size_t pkt_len, void *opaque) slirp_log("SLiRP: received %d-byte packet\n", pkt_len); - memcpy(slirp->pkt.data, (uint8_t*) qp, pkt_len); + memcpy(slirp->pkt.data, (uint8_t *) qp, pkt_len); slirp->pkt.len = pkt_len; network_rx_put_pkt(slirp->card, &slirp->pkt); return pkt_len; } - #ifdef _WIN32 static int net_slirp_add_poll(int fd, int events, void *opaque) { - net_slirp_t *slirp = (net_slirp_t *) opaque; - long bitmask = 0; + net_slirp_t *slirp = (net_slirp_t *) opaque; + long bitmask = 0; if (events & SLIRP_POLL_IN) bitmask |= FD_READ | FD_ACCEPT; if (events & SLIRP_POLL_OUT) @@ -193,17 +182,17 @@ net_slirp_add_poll(int fd, int events, void *opaque) net_slirp_t *slirp = (net_slirp_t *) opaque; if (slirp->pfd_len >= slirp->pfd_size) { - int newsize = slirp->pfd_size + 16; + int newsize = slirp->pfd_size + 16; struct pollfd *new = realloc(slirp->pfd, newsize * sizeof(struct pollfd)); if (new) { - slirp->pfd = new; + slirp->pfd = new; slirp->pfd_size = newsize; } } if ((slirp->pfd_len < slirp->pfd_size)) { - int idx = slirp->pfd_len++; + int idx = slirp->pfd_len++; slirp->pfd[idx].fd = fd; - int pevents = 0; + int pevents = 0; if (events & SLIRP_POLL_IN) pevents |= POLLIN; if (events & SLIRP_POLL_OUT) @@ -225,8 +214,8 @@ net_slirp_add_poll(int fd, int events, void *opaque) static int net_slirp_get_revents(int idx, void *opaque) { - net_slirp_t *slirp = (net_slirp_t *) opaque; - int ret = 0; + net_slirp_t *slirp = (net_slirp_t *) opaque; + int ret = 0; WSANETWORKEVENTS ev; if (WSAEnumNetworkEvents(idx, slirp->sock_event, &ev) != 0) { return ret; @@ -242,9 +231,9 @@ net_slirp_get_revents(int idx, void *opaque) } \ } while (0) - WSA_TO_POLL(FD_READ, SLIRP_POLL_IN); - WSA_TO_POLL(FD_ACCEPT, SLIRP_POLL_IN); - WSA_TO_POLL(FD_WRITE, SLIRP_POLL_OUT); + WSA_TO_POLL(FD_READ, SLIRP_POLL_IN); + WSA_TO_POLL(FD_ACCEPT, SLIRP_POLL_IN); + WSA_TO_POLL(FD_WRITE, SLIRP_POLL_OUT); WSA_TO_POLL(FD_CONNECT, SLIRP_POLL_OUT); WSA_TO_POLL(FD_OOB, SLIRP_POLL_PRI); WSA_TO_POLL(FD_CLOSE, SLIRP_POLL_HUP); @@ -255,9 +244,9 @@ net_slirp_get_revents(int idx, void *opaque) static int net_slirp_get_revents(int idx, void *opaque) { - net_slirp_t *slirp = (net_slirp_t *) opaque; - int ret = 0; - int events = slirp->pfd[idx].revents; + net_slirp_t *slirp = (net_slirp_t *) opaque; + int ret = 0; + int events = slirp->pfd[idx].revents; if (events & POLLIN) ret |= SLIRP_POLL_IN; if (events & POLLOUT) @@ -273,15 +262,15 @@ net_slirp_get_revents(int idx, void *opaque) #endif static const SlirpCb slirp_cb = { - .send_packet = net_slirp_send_packet, - .guest_error = net_slirp_guest_error, - .clock_get_ns = net_slirp_clock_get_ns, - .timer_new = net_slirp_timer_new, - .timer_free = net_slirp_timer_free, - .timer_mod = net_slirp_timer_mod, - .register_poll_fd = net_slirp_register_poll_fd, + .send_packet = net_slirp_send_packet, + .guest_error = net_slirp_guest_error, + .clock_get_ns = net_slirp_clock_get_ns, + .timer_new = net_slirp_timer_new, + .timer_free = net_slirp_timer_free, + .timer_mod = net_slirp_timer_mod, + .register_poll_fd = net_slirp_register_poll_fd, .unregister_poll_fd = net_slirp_unregister_poll_fd, - .notify = net_slirp_notify + .notify = net_slirp_notify }; /* Send a packet to the SLiRP interface. */ @@ -299,7 +288,7 @@ net_slirp_in(net_slirp_t *slirp, uint8_t *pkt, int pkt_len) void net_slirp_in_available(void *priv) { - net_slirp_t *slirp = (net_slirp_t *)priv; + net_slirp_t *slirp = (net_slirp_t *) priv; net_event_set(&slirp->tx_event); } @@ -314,16 +303,16 @@ net_slirp_thread(void *priv) HANDLE events[3]; events[NET_EVENT_STOP] = net_event_get_handle(&slirp->stop_event); - events[NET_EVENT_TX] = net_event_get_handle(&slirp->tx_event); - events[NET_EVENT_RX] = slirp->sock_event; - bool run = true; + events[NET_EVENT_TX] = net_event_get_handle(&slirp->tx_event); + events[NET_EVENT_RX] = slirp->sock_event; + bool run = true; while (run) { uint32_t timeout = -1; slirp_pollfds_fill(slirp->slirp, &timeout, net_slirp_add_poll, slirp); if (timeout < 0) timeout = INFINITE; - int ret = WaitForMultipleObjects(3, events, FALSE, (DWORD)timeout); + int ret = WaitForMultipleObjects(3, events, FALSE, (DWORD) timeout); switch (ret - WAIT_OBJECT_0) { case NET_EVENT_STOP: run = false; @@ -341,7 +330,6 @@ net_slirp_thread(void *priv) default: slirp_pollfds_poll(slirp->slirp, ret == WAIT_FAILED, net_slirp_get_revents, slirp); break; - } } @@ -398,11 +386,11 @@ net_slirp_init(const netcard_t *card, const uint8_t *mac_addr, void *priv) slirp_log("SLiRP: initializing...\n"); net_slirp_t *slirp = calloc(1, sizeof(net_slirp_t)); memcpy(slirp->mac_addr, mac_addr, sizeof(slirp->mac_addr)); - slirp->card = (netcard_t*)card; + slirp->card = (netcard_t *) card; #ifndef _WIN32 slirp->pfd_size = 16 * sizeof(struct pollfd); - slirp->pfd = malloc(slirp->pfd_size); + slirp->pfd = malloc(slirp->pfd_size); memset(slirp->pfd, 0, slirp->pfd_size); #endif @@ -412,7 +400,7 @@ net_slirp_init(const netcard_t *card, const uint8_t *mac_addr, void *priv) struct in_addr host = { .s_addr = htonl(0x0a000002 | (slirp_card_num << 8)) }; /* 10.0.x.2 */ struct in_addr dhcp = { .s_addr = htonl(0x0a00000f | (slirp_card_num << 8)) }; /* 10.0.x.15 */ struct in_addr dns = { .s_addr = htonl(0x0a000003 | (slirp_card_num << 8)) }; /* 10.0.x.3 */ - struct in_addr bind = { .s_addr = htonl(0x00000000) }; /* 0.0.0.0 */ + struct in_addr bind = { .s_addr = htonl(0x00000000) }; /* 0.0.0.0 */ struct in6_addr ipv6_dummy = { 0 }; /* contents don't matter; we're not using IPv6 */ /* Initialize SLiRP. */ @@ -424,10 +412,10 @@ net_slirp_init(const netcard_t *card, const uint8_t *mac_addr, void *priv) } /* Set up port forwarding. */ - int udp, external, internal, i = 0; + int udp, external, internal, i = 0; char category[32]; snprintf(category, sizeof(category), "SLiRP Port Forwarding #%i", card->card_num + 1); - char key[20]; + char key[20]; while (1) { sprintf(key, "%d_protocol", i); udp = strcmp(config_get_string(category, key, "tcp"), "udp") == 0; diff --git a/src/network/net_wd8003.c b/src/network/net_wd8003.c index d53f570f0..4142fbd38 100644 --- a/src/network/net_wd8003.c +++ b/src/network/net_wd8003.c @@ -68,59 +68,58 @@ #include "cpu.h" /* Board type codes in card ID */ -#define WE_TYPE_WD8003 0x01 -#define WE_TYPE_WD8003S 0x02 -#define WE_TYPE_WD8003E 0x03 -#define WE_TYPE_WD8013EBT 0x05 -#define WE_TYPE_TOSHIBA1 0x11 /* named PCETA1 */ -#define WE_TYPE_TOSHIBA2 0x12 /* named PCETA2 */ -#define WE_TYPE_TOSHIBA3 0x13 /* named PCETB */ -#define WE_TYPE_TOSHIBA4 0x14 /* named PCETC */ -#define WE_TYPE_WD8003W 0x24 -#define WE_TYPE_WD8003EB 0x25 -#define WE_TYPE_WD8013W 0x26 -#define WE_TYPE_WD8013EP 0x27 -#define WE_TYPE_WD8013WC 0x28 -#define WE_TYPE_WD8013EPC 0x29 -#define WE_TYPE_SMC8216T 0x2a -#define WE_TYPE_SMC8216C 0x2b -#define WE_TYPE_WD8013EBP 0x2c +#define WE_TYPE_WD8003 0x01 +#define WE_TYPE_WD8003S 0x02 +#define WE_TYPE_WD8003E 0x03 +#define WE_TYPE_WD8013EBT 0x05 +#define WE_TYPE_TOSHIBA1 0x11 /* named PCETA1 */ +#define WE_TYPE_TOSHIBA2 0x12 /* named PCETA2 */ +#define WE_TYPE_TOSHIBA3 0x13 /* named PCETB */ +#define WE_TYPE_TOSHIBA4 0x14 /* named PCETC */ +#define WE_TYPE_WD8003W 0x24 +#define WE_TYPE_WD8003EB 0x25 +#define WE_TYPE_WD8013W 0x26 +#define WE_TYPE_WD8013EP 0x27 +#define WE_TYPE_WD8013WC 0x28 +#define WE_TYPE_WD8013EPC 0x29 +#define WE_TYPE_SMC8216T 0x2a +#define WE_TYPE_SMC8216C 0x2b +#define WE_TYPE_WD8013EBP 0x2c -#define WE_ICR_16BIT_SLOT 0x01 +#define WE_ICR_16BIT_SLOT 0x01 -#define WE_MSR_ENABLE_RAM 0x40 -#define WE_MSR_SOFT_RESET 0x80 +#define WE_MSR_ENABLE_RAM 0x40 +#define WE_MSR_SOFT_RESET 0x80 -#define WE_IRR_ENABLE_IRQ 0x80 +#define WE_IRR_ENABLE_IRQ 0x80 -#define WE_ID_ETHERNET 0x01 -#define WE_ID_SOFT_CONFIG 0x20 -#define WE_ID_EXTRA_RAM 0x40 -#define WE_ID_BUS_MCA 0x80 +#define WE_ID_ETHERNET 0x01 +#define WE_ID_SOFT_CONFIG 0x20 +#define WE_ID_EXTRA_RAM 0x40 +#define WE_ID_BUS_MCA 0x80 typedef struct { - dp8390_t *dp8390; - mem_mapping_t ram_mapping; - uint32_t ram_addr, ram_size; - uint8_t maclocal[6]; /* configured MAC (local) address */ - uint8_t bit16, pad; - int board; - const char *name; - uint32_t base_address; - int irq; + dp8390_t *dp8390; + mem_mapping_t ram_mapping; + uint32_t ram_addr, ram_size; + uint8_t maclocal[6]; /* configured MAC (local) address */ + uint8_t bit16, pad; + int board; + const char *name; + uint32_t base_address; + int irq; /* POS registers, MCA boards only */ - uint8_t pos_regs[8]; + uint8_t pos_regs[8]; /* Memory for WD cards*/ - uint8_t msr, /* Memory Select Register (MSR) */ - icr, /* Interface Configuration Register (ICR) */ - irr, /* Interrupt Request Register (IRR) */ - laar, /* LA Address Register (read by Windows 98!) */ - if_chip, board_chip; + uint8_t msr, /* Memory Select Register (MSR) */ + icr, /* Interface Configuration Register (ICR) */ + irr, /* Interrupt Request Register (IRR) */ + laar, /* LA Address Register (read by Windows 98!) */ + if_chip, board_chip; } wd_t; - #ifdef ENABLE_WD_LOG int wd_do_log = ENABLE_WD_LOG; @@ -130,18 +129,16 @@ wdlog(const char *fmt, ...) va_list ap; if (wd_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define wdlog(fmt, ...) +# define wdlog(fmt, ...) #endif - -static const int we_int_table[4] = {2, 3, 4, 7}; - +static const int we_int_table[4] = { 2, 3, 4, 7 }; static void wd_interrupt(void *priv, int set) @@ -149,40 +146,37 @@ wd_interrupt(void *priv, int set) wd_t *dev = (wd_t *) priv; if (!(dev->irr & WE_IRR_ENABLE_IRQ)) - return; + return; if (set) - picint(1 << dev->irq); + picint(1 << dev->irq); else - picintc(1 << dev->irq); + picintc(1 << dev->irq); } - /* reset - restore state to power-up, cancelling all i/o */ static void wd_reset(void *priv) { - wd_t *dev = (wd_t *)priv; + wd_t *dev = (wd_t *) priv; wdlog("%s: reset\n", dev->name); dp8390_reset(dev->dp8390); } - static void wd_soft_reset(void *priv) { - wd_t *dev = (wd_t *)priv; + wd_t *dev = (wd_t *) priv; dp8390_soft_reset(dev->dp8390); } - static uint8_t wd_ram_read(uint32_t addr, void *priv) { - wd_t *dev = (wd_t *)priv; + wd_t *dev = (wd_t *) priv; wdlog("WD80x3: RAM Read: addr=%06x, val=%02x\n", addr & (dev->ram_size - 1), dev->dp8390->mem[addr & (dev->ram_size - 1)]); return dev->dp8390->mem[addr & (dev->ram_size - 1)]; @@ -191,365 +185,353 @@ wd_ram_read(uint32_t addr, void *priv) static void wd_ram_write(uint32_t addr, uint8_t val, void *priv) { - wd_t *dev = (wd_t *)priv; + wd_t *dev = (wd_t *) priv; dev->dp8390->mem[addr & (dev->ram_size - 1)] = val; wdlog("WD80x3: RAM Write: addr=%06x, val=%02x\n", addr & (dev->ram_size - 1), val); } - static int wd_get_irq_index(wd_t *dev) { uint8_t i, irq = 255; for (i = 0; i < 4; i++) { - if (we_int_table[i] == dev->irq) - irq = i; + if (we_int_table[i] == dev->irq) + irq = i; } if (irq != 255) - return ((irq & 0x03) << 5); + return ((irq & 0x03) << 5); else - return 0; + return 0; } - static uint32_t wd_smc_read(wd_t *dev, uint32_t off) { - uint32_t retval = 0; + uint32_t retval = 0; uint32_t checksum = 0; if (dev->board == WD8003E) - off |= 0x08; + off |= 0x08; - switch(off) { - case 0x00: - if (dev->board_chip & WE_ID_BUS_MCA) - retval = (dev->msr & 0xc0) | ((dev->ram_addr >> 13) & 0x3f); - else - retval = dev->msr; - break; + switch (off) { + case 0x00: + if (dev->board_chip & WE_ID_BUS_MCA) + retval = (dev->msr & 0xc0) | ((dev->ram_addr >> 13) & 0x3f); + else + retval = dev->msr; + break; - case 0x01: - if (dev->board_chip & WE_ID_SOFT_CONFIG) - retval = dev->icr; - else - retval = dev->icr & WE_ICR_16BIT_SLOT; - break; + case 0x01: + if (dev->board_chip & WE_ID_SOFT_CONFIG) + retval = dev->icr; + else + retval = dev->icr & WE_ICR_16BIT_SLOT; + break; - case 0x04: - if (dev->board_chip & WE_ID_SOFT_CONFIG) - retval = (dev->irr & 0x9f) | wd_get_irq_index(dev); - break; + case 0x04: + if (dev->board_chip & WE_ID_SOFT_CONFIG) + retval = (dev->irr & 0x9f) | wd_get_irq_index(dev); + break; - case 0x05: - if (dev->board_chip & WE_ID_SOFT_CONFIG) - retval = dev->laar; - break; + case 0x05: + if (dev->board_chip & WE_ID_SOFT_CONFIG) + retval = dev->laar; + break; - case 0x07: - if (dev->board_chip & WE_ID_SOFT_CONFIG) - retval = dev->if_chip; - break; + case 0x07: + if (dev->board_chip & WE_ID_SOFT_CONFIG) + retval = dev->if_chip; + break; - case 0x08: - retval = dev->dp8390->physaddr[0]; - break; + case 0x08: + retval = dev->dp8390->physaddr[0]; + break; - case 0x09: - retval = dev->dp8390->physaddr[1]; - break; + case 0x09: + retval = dev->dp8390->physaddr[1]; + break; - case 0x0a: - retval = dev->dp8390->physaddr[2]; - break; + case 0x0a: + retval = dev->dp8390->physaddr[2]; + break; - case 0x0b: - retval = dev->dp8390->physaddr[3]; - break; + case 0x0b: + retval = dev->dp8390->physaddr[3]; + break; - case 0x0c: - retval = dev->dp8390->physaddr[4]; - break; + case 0x0c: + retval = dev->dp8390->physaddr[4]; + break; - case 0x0d: - retval = dev->dp8390->physaddr[5]; - break; + case 0x0d: + retval = dev->dp8390->physaddr[5]; + break; - case 0x0e: - retval = dev->board_chip; - break; + case 0x0e: + retval = dev->board_chip; + break; - case 0x0f: - /*This has to return the byte that adds up to 0xFF*/ - checksum = (dev->dp8390->physaddr[0] + dev->dp8390->physaddr[1] + dev->dp8390->physaddr[2] + - dev->dp8390->physaddr[3] + dev->dp8390->physaddr[4] + dev->dp8390->physaddr[5] + - dev->board_chip); + case 0x0f: + /*This has to return the byte that adds up to 0xFF*/ + checksum = (dev->dp8390->physaddr[0] + dev->dp8390->physaddr[1] + dev->dp8390->physaddr[2] + dev->dp8390->physaddr[3] + dev->dp8390->physaddr[4] + dev->dp8390->physaddr[5] + dev->board_chip); - retval = 0xff - (checksum & 0xff); - break; + retval = 0xff - (checksum & 0xff); + break; } wdlog("%s: ASIC read addr=0x%02x, value=0x%04x\n", - dev->name, (unsigned)off, (unsigned) retval); + dev->name, (unsigned) off, (unsigned) retval); - return(retval); + return (retval); } - static void wd_set_ram(wd_t *dev) { uint32_t a13; if ((dev->board_chip & 0xa0) == 0x20) { - a13 = dev->msr & 0x3f; - a13 <<= 13; + a13 = dev->msr & 0x3f; + a13 <<= 13; - dev->ram_addr = a13 | (1 << 19); - mem_mapping_set_addr(&dev->ram_mapping, dev->ram_addr, dev->ram_size); - wdlog("%s: RAM address set to %08X\n", dev->name, dev->ram_addr); + dev->ram_addr = a13 | (1 << 19); + mem_mapping_set_addr(&dev->ram_mapping, dev->ram_addr, dev->ram_size); + wdlog("%s: RAM address set to %08X\n", dev->name, dev->ram_addr); } if (dev->msr & WE_MSR_ENABLE_RAM) - mem_mapping_enable(&dev->ram_mapping); + mem_mapping_enable(&dev->ram_mapping); else - mem_mapping_disable(&dev->ram_mapping); + mem_mapping_disable(&dev->ram_mapping); wdlog("%s: RAM now %sabled\n", dev->name, (dev->msr & WE_MSR_ENABLE_RAM) ? "en" : "dis"); } - static void wd_smc_write(wd_t *dev, uint32_t off, uint32_t val) { uint8_t old; wdlog("%s: ASIC write addr=0x%02x, value=0x%04x\n", - dev->name, (unsigned)off, (unsigned) val); + dev->name, (unsigned) off, (unsigned) val); if (off && (dev->board == WD8003E)) - return; + return; - switch(off) { - /* Bits 0-5: Bits 13-18 of memory address (writable?): - Windows 98 requires this to be preloaded with the initial - addresss to work correctly; - Bit 6: Enable memory if set; - Bit 7: Software reset if set. */ - case 0x00: /* WD Control register */ - old = dev->msr; + switch (off) { + /* Bits 0-5: Bits 13-18 of memory address (writable?): + Windows 98 requires this to be preloaded with the initial + addresss to work correctly; + Bit 6: Enable memory if set; + Bit 7: Software reset if set. */ + case 0x00: /* WD Control register */ + old = dev->msr; - if (!(old & WE_MSR_SOFT_RESET) && (val & WE_MSR_SOFT_RESET)) { - wd_soft_reset(dev); - wdlog("WD80x3: Soft reset\n"); - } + if (!(old & WE_MSR_SOFT_RESET) && (val & WE_MSR_SOFT_RESET)) { + wd_soft_reset(dev); + wdlog("WD80x3: Soft reset\n"); + } - if ((dev->board_chip & 0xa0) == 0x20) - dev->msr = val; - else - dev->msr = (dev->msr & 0x3f) | (val & 0xc0); + if ((dev->board_chip & 0xa0) == 0x20) + dev->msr = val; + else + dev->msr = (dev->msr & 0x3f) | (val & 0xc0); - if ((old &= 0x7f) != (val & 0x7f)) { - wd_set_ram(dev); - wdlog("WD80x3: Memory now %sabled (addr = %08X)\n", (val & WE_MSR_ENABLE_RAM) ? "en" : "dis", dev->ram_addr); - } - break; + if ((old &= 0x7f) != (val & 0x7f)) { + wd_set_ram(dev); + wdlog("WD80x3: Memory now %sabled (addr = %08X)\n", (val & WE_MSR_ENABLE_RAM) ? "en" : "dis", dev->ram_addr); + } + break; - /* Bit 1: 0 = 8-bit slot, 1 = 16-bit slot; - Bit 3: 0 = 8k RAM, 1 = 32k RAM (only on revision < 2). */ - case 0x01: - if (dev->bit16 & 2) - dev->icr = (dev->icr & WE_ICR_16BIT_SLOT) | (val & WE_ICR_16BIT_SLOT); - else - dev->icr = val; - break; + /* Bit 1: 0 = 8-bit slot, 1 = 16-bit slot; + Bit 3: 0 = 8k RAM, 1 = 32k RAM (only on revision < 2). */ + case 0x01: + if (dev->bit16 & 2) + dev->icr = (dev->icr & WE_ICR_16BIT_SLOT) | (val & WE_ICR_16BIT_SLOT); + else + dev->icr = val; + break; - /* Bit 5: Bit 0 of encoded IRQ; - Bit 6: Bit 1 of encoded IRQ; - Bit 7: Enable interrupts. */ - case 0x04: - if (dev->board_chip & WE_ID_SOFT_CONFIG) - dev->irr = (dev->irr & 0xe0) | (val & 0x1f); - break; + /* Bit 5: Bit 0 of encoded IRQ; + Bit 6: Bit 1 of encoded IRQ; + Bit 7: Enable interrupts. */ + case 0x04: + if (dev->board_chip & WE_ID_SOFT_CONFIG) + dev->irr = (dev->irr & 0xe0) | (val & 0x1f); + break; - /* Bits 0-4: Bits 19-23 of memory address (writable?): - Windows 98 requires this to be preloaded with the initial - addresss to work correctly; - Bit 5: Enable software interrupt; - Bit 6: Enable 16-bit RAM for LAN if set; - Bit 7: Enable 16-bit RAM for host if set. */ - case 0x05: - if (dev->board_chip & WE_ID_SOFT_CONFIG) - dev->laar = val; - break; + /* Bits 0-4: Bits 19-23 of memory address (writable?): + Windows 98 requires this to be preloaded with the initial + addresss to work correctly; + Bit 5: Enable software interrupt; + Bit 6: Enable 16-bit RAM for LAN if set; + Bit 7: Enable 16-bit RAM for host if set. */ + case 0x05: + if (dev->board_chip & WE_ID_SOFT_CONFIG) + dev->laar = val; + break; - /* Bits 0-4: Chip ID; - Bit 5: Software configuration is supported if present; - Bit 6: 0 = 16k RAM, 1 = 32k RAM. */ - case 0x07: - if (dev->board_chip & WE_ID_SOFT_CONFIG) - dev->if_chip = val; - break; + /* Bits 0-4: Chip ID; + Bit 5: Software configuration is supported if present; + Bit 6: 0 = 16k RAM, 1 = 32k RAM. */ + case 0x07: + if (dev->board_chip & WE_ID_SOFT_CONFIG) + dev->if_chip = val; + break; - default: - /* This is invalid, but happens under win95 device detection: - maybe some clone cards implement writing for some other - registers? */ - wdlog("%s: ASIC write invalid address %04x, ignoring\n", - dev->name, (unsigned)off); - break; + default: + /* This is invalid, but happens under win95 device detection: + maybe some clone cards implement writing for some other + registers? */ + wdlog("%s: ASIC write invalid address %04x, ignoring\n", + dev->name, (unsigned) off); + break; } } - static uint8_t wd_read(uint16_t addr, void *priv, int len) { - wd_t *dev = (wd_t *)priv; + wd_t *dev = (wd_t *) priv; uint8_t retval = 0; - int off = addr - dev->base_address; + int off = addr - dev->base_address; wdlog("%s: read addr %x\n", dev->name, addr); if (off == 0x10) - retval = dp8390_read_cr(dev->dp8390); + retval = dp8390_read_cr(dev->dp8390); else if ((off >= 0x00) && (off <= 0x0f)) - retval = wd_smc_read(dev, off); + retval = wd_smc_read(dev, off); else { - switch(dev->dp8390->CR.pgsel) { - case 0x00: - retval = dp8390_page0_read(dev->dp8390, off - 0x10, len); - break; - case 0x01: - retval = dp8390_page1_read(dev->dp8390, off - 0x10, len); - break; - case 0x02: - retval = dp8390_page2_read(dev->dp8390, off - 0x10, len); - break; - default: - wdlog("%s: unknown value of pgsel in read - %d\n", - dev->name, dev->dp8390->CR.pgsel); - break; - } + switch (dev->dp8390->CR.pgsel) { + case 0x00: + retval = dp8390_page0_read(dev->dp8390, off - 0x10, len); + break; + case 0x01: + retval = dp8390_page1_read(dev->dp8390, off - 0x10, len); + break; + case 0x02: + retval = dp8390_page2_read(dev->dp8390, off - 0x10, len); + break; + default: + wdlog("%s: unknown value of pgsel in read - %d\n", + dev->name, dev->dp8390->CR.pgsel); + break; + } } - return(retval); + return (retval); } - static uint8_t wd_readb(uint16_t addr, void *priv) { wd_t *dev = (wd_t *) priv; - return(wd_read(addr, dev, 1)); + return (wd_read(addr, dev, 1)); } - static uint16_t wd_readw(uint16_t addr, void *priv) { wd_t *dev = (wd_t *) priv; - return(wd_read(addr, dev, 2)); + return (wd_read(addr, dev, 2)); } - static void wd_write(uint16_t addr, uint8_t val, void *priv, unsigned int len) { - wd_t *dev = (wd_t *)priv; - int off = addr - dev->base_address; + wd_t *dev = (wd_t *) priv; + int off = addr - dev->base_address; wdlog("%s: write addr %x, value %x\n", dev->name, addr, val); if (off == 0x10) - dp8390_write_cr(dev->dp8390, val); + dp8390_write_cr(dev->dp8390, val); else if ((off >= 0x00) && (off <= 0x0f)) - wd_smc_write(dev, off, val); + wd_smc_write(dev, off, val); else { - switch(dev->dp8390->CR.pgsel) { - case 0x00: - dp8390_page0_write(dev->dp8390, off - 0x10, val, len); - break; - case 0x01: - dp8390_page1_write(dev->dp8390, off - 0x10, val, len); - break; - default: - wdlog("%s: unknown value of pgsel in write - %d\n", - dev->name, dev->dp8390->CR.pgsel); - break; - } + switch (dev->dp8390->CR.pgsel) { + case 0x00: + dp8390_page0_write(dev->dp8390, off - 0x10, val, len); + break; + case 0x01: + dp8390_page1_write(dev->dp8390, off - 0x10, val, len); + break; + default: + wdlog("%s: unknown value of pgsel in write - %d\n", + dev->name, dev->dp8390->CR.pgsel); + break; + } } } - static void wd_writeb(uint16_t addr, uint8_t val, void *priv) { wd_write(addr, val, priv, 1); } - static void wd_writew(uint16_t addr, uint16_t val, void *priv) { wd_write(addr, val & 0xff, priv, 2); } - static void wd_io_set(wd_t *dev, uint16_t addr) { if (dev->bit16 & 1) { - io_sethandler(addr, 0x20, - wd_readb, wd_readw, NULL, - wd_writeb, wd_writew, NULL, dev); + io_sethandler(addr, 0x20, + wd_readb, wd_readw, NULL, + wd_writeb, wd_writew, NULL, dev); } else { - io_sethandler(addr, 0x20, - wd_readb, NULL, NULL, - wd_writeb, NULL, NULL, dev); + io_sethandler(addr, 0x20, + wd_readb, NULL, NULL, + wd_writeb, NULL, NULL, dev); } } - static void wd_io_remove(wd_t *dev, uint16_t addr) { if (dev->bit16 & 1) { - io_removehandler(addr, 0x20, - wd_readb, wd_readw, NULL, - wd_writeb, wd_writew, NULL, dev); + io_removehandler(addr, 0x20, + wd_readb, wd_readw, NULL, + wd_writeb, wd_writew, NULL, dev); } else { - io_removehandler(addr, 0x20, - wd_readb, NULL, NULL, - wd_writeb, NULL, NULL, dev); + io_removehandler(addr, 0x20, + wd_readb, NULL, NULL, + wd_writeb, NULL, NULL, dev); } } - static uint8_t wd_mca_read(int port, void *priv) { - wd_t *dev = (wd_t *)priv; + wd_t *dev = (wd_t *) priv; - return(dev->pos_regs[port & 7]); + return (dev->pos_regs[port & 7]); } - -#define MCA_6FC0_IRQS { 3, 4, 10, 15 } +#define MCA_6FC0_IRQS \ + { \ + 3, 4, 10, 15 \ + } static void wd_mca_write(int port, uint8_t val, void *priv) { - wd_t *dev = (wd_t *)priv; + wd_t *dev = (wd_t *) priv; int8_t irq[4] = MCA_6FC0_IRQS; /* MCA does not write registers below 0x0100. */ - if (port < 0x0102) return; + if (port < 0x0102) + return; /* Save the MCA register value. */ dev->pos_regs[port & 7] = val; @@ -562,34 +544,35 @@ wd_mca_write(int port, uint8_t val, void *priv) * So, remove current address, if any. */ if (dev->base_address) - wd_io_remove(dev, dev->base_address); + wd_io_remove(dev, dev->base_address); dev->base_address = (dev->pos_regs[2] & 0xfe) << 4; - dev->ram_addr = (dev->pos_regs[3] & 0xfc) << 12; - dev->irq = irq[dev->pos_regs[5] & 0x02]; + dev->ram_addr = (dev->pos_regs[3] & 0xfc) << 12; + dev->irq = irq[dev->pos_regs[5] & 0x02]; /* Initialize the device if fully configured. */ /* Register (new) I/O handler. */ if (dev->pos_regs[2] & 0x01) - wd_io_set(dev, dev->base_address); + wd_io_set(dev, dev->base_address); mem_mapping_set_addr(&dev->ram_mapping, dev->ram_addr, dev->ram_size); mem_mapping_disable(&dev->ram_mapping); if ((dev->msr & WE_MSR_ENABLE_RAM) && (dev->pos_regs[2] & 0x01)) - mem_mapping_enable(&dev->ram_mapping); + mem_mapping_enable(&dev->ram_mapping); wdlog("%s: attached IO=0x%X IRQ=%d, RAM addr=0x%06x\n", dev->name, - dev->base_address, dev->irq, dev->ram_addr); + dev->base_address, dev->irq, dev->ram_addr); } static void wd_8013epa_mca_write(int port, uint8_t val, void *priv) { - wd_t *dev = (wd_t *)priv; + wd_t *dev = (wd_t *) priv; /* MCA does not write registers below 0x0100. */ - if (port < 0x0102) return; + if (port < 0x0102) + return; /* Save the MCA register value. */ dev->pos_regs[port & 7] = val; @@ -602,7 +585,7 @@ wd_8013epa_mca_write(int port, uint8_t val, void *priv) * So, remove current address, if any. */ if (dev->base_address) - wd_io_remove(dev, dev->base_address); + wd_io_remove(dev, dev->base_address); dev->base_address = 0x800 + ((dev->pos_regs[2] & 0xf0) << 8); @@ -633,38 +616,36 @@ wd_8013epa_mca_write(int port, uint8_t val, void *priv) /* Initialize the device if fully configured. */ /* Register (new) I/O handler. */ if (dev->pos_regs[2] & 0x01) - wd_io_set(dev, dev->base_address); + wd_io_set(dev, dev->base_address); mem_mapping_set_addr(&dev->ram_mapping, dev->ram_addr, dev->ram_size); mem_mapping_disable(&dev->ram_mapping); if ((dev->msr & WE_MSR_ENABLE_RAM) && (dev->pos_regs[2] & 0x01)) - mem_mapping_enable(&dev->ram_mapping); + mem_mapping_enable(&dev->ram_mapping); wdlog("%s: attached IO=0x%X IRQ=%d, RAM addr=0x%06x\n", dev->name, - dev->base_address, dev->irq, dev->ram_addr); + dev->base_address, dev->irq, dev->ram_addr); } - static uint8_t wd_mca_feedb(void *priv) { return 1; } - static void * wd_init(const device_t *info) { uint32_t mac; - wd_t *dev; + wd_t *dev; dev = malloc(sizeof(wd_t)); memset(dev, 0x00, sizeof(wd_t)); - dev->name = info->name; + dev->name = info->name; dev->board = info->local; - dev->maclocal[0] = 0x00; /* 00:00:C0 (WD/SMC OID) */ + dev->maclocal[0] = 0x00; /* 00:00:C0 (WD/SMC OID) */ dev->maclocal[1] = 0x00; dev->maclocal[2] = 0xC0; @@ -673,92 +654,92 @@ wd_init(const device_t *info) /* Set up our BIA. */ if (mac & 0xff000000) { - /* Generate new local MAC. */ - dev->maclocal[3] = random_generate(); - dev->maclocal[4] = random_generate(); - dev->maclocal[5] = random_generate(); - mac = (((int) dev->maclocal[3]) << 16); - mac |= (((int) dev->maclocal[4]) << 8); - mac |= ((int) dev->maclocal[5]); - device_set_config_mac("mac", mac); + /* Generate new local MAC. */ + dev->maclocal[3] = random_generate(); + dev->maclocal[4] = random_generate(); + dev->maclocal[5] = random_generate(); + mac = (((int) dev->maclocal[3]) << 16); + mac |= (((int) dev->maclocal[4]) << 8); + mac |= ((int) dev->maclocal[5]); + device_set_config_mac("mac", mac); } else { - dev->maclocal[3] = (mac>>16) & 0xff; - dev->maclocal[4] = (mac>>8) & 0xff; - dev->maclocal[5] = (mac & 0xff); + dev->maclocal[3] = (mac >> 16) & 0xff; + dev->maclocal[4] = (mac >> 8) & 0xff; + dev->maclocal[5] = (mac & 0xff); } if ((dev->board == WD8003ETA) || (dev->board == WD8003EA) || dev->board == WD8013EPA) { - if (dev->board == WD8013EPA) - mca_add(wd_mca_read, wd_8013epa_mca_write, wd_mca_feedb, NULL, dev); - else - mca_add(wd_mca_read, wd_mca_write, wd_mca_feedb, NULL, dev); + if (dev->board == WD8013EPA) + mca_add(wd_mca_read, wd_8013epa_mca_write, wd_mca_feedb, NULL, dev); + else + mca_add(wd_mca_read, wd_mca_write, wd_mca_feedb, NULL, dev); } else { - dev->base_address = device_get_config_hex16("base"); - dev->irq = device_get_config_int("irq"); - dev->ram_addr = device_get_config_hex20("ram_addr"); + dev->base_address = device_get_config_hex16("base"); + dev->irq = device_get_config_int("irq"); + dev->ram_addr = device_get_config_hex20("ram_addr"); } - dev->dp8390 = device_add_inst(&dp8390_device, dp3890_inst++); - dev->dp8390->priv = dev; + dev->dp8390 = device_add_inst(&dp8390_device, dp3890_inst++); + dev->dp8390->priv = dev; dev->dp8390->interrupt = wd_interrupt; dp8390_set_defaults(dev->dp8390, DP8390_FLAG_CHECK_CR | DP8390_FLAG_CLEAR_IRQ); - switch(dev->board) { - /* Ethernet, ISA, no interface chip, RAM 8k */ - case WD8003E: - dev->board_chip = WE_TYPE_WD8003E; - dev->ram_size = 0x2000; - break; + switch (dev->board) { + /* Ethernet, ISA, no interface chip, RAM 8k */ + case WD8003E: + dev->board_chip = WE_TYPE_WD8003E; + dev->ram_size = 0x2000; + break; - /* Ethernet, ISA, 5x3 interface chip, RAM 8k or 32k */ - case WD8003EB: - dev->board_chip = WE_TYPE_WD8003EB; - dev->if_chip = 1; - dev->ram_size = device_get_config_int("ram_size"); - if (dev->ram_size == 0x8000) - dev->board_chip |= WE_ID_EXTRA_RAM; + /* Ethernet, ISA, 5x3 interface chip, RAM 8k or 32k */ + case WD8003EB: + dev->board_chip = WE_TYPE_WD8003EB; + dev->if_chip = 1; + dev->ram_size = device_get_config_int("ram_size"); + if (dev->ram_size == 0x8000) + dev->board_chip |= WE_ID_EXTRA_RAM; - /* Bit A19 is implicit 1. */ - dev->msr |= (dev->ram_addr >> 13) & 0x3f; - break; + /* Bit A19 is implicit 1. */ + dev->msr |= (dev->ram_addr >> 13) & 0x3f; + break; - /* Ethernet, ISA, no interface chip, RAM 8k or 32k (8-bit slot) / 16k or 64k (16-bit slot) */ - case WD8013EBT: - dev->board_chip = WE_TYPE_WD8013EBT; - dev->ram_size = device_get_config_int("ram_size"); - if (dev->ram_size == 0x10000) - dev->board_chip |= WE_ID_EXTRA_RAM; + /* Ethernet, ISA, no interface chip, RAM 8k or 32k (8-bit slot) / 16k or 64k (16-bit slot) */ + case WD8013EBT: + dev->board_chip = WE_TYPE_WD8013EBT; + dev->ram_size = device_get_config_int("ram_size"); + if (dev->ram_size == 0x10000) + dev->board_chip |= WE_ID_EXTRA_RAM; - dev->bit16 = 2; - if (is286) - dev->bit16 |= 1; - else { - dev->bit16 |= 0; - if (dev->irq == 9) - dev->irq = 2; - dev->ram_size >>= 1; /* Half the RAM when in 8-bit slot. */ - } - break; + dev->bit16 = 2; + if (is286) + dev->bit16 |= 1; + else { + dev->bit16 |= 0; + if (dev->irq == 9) + dev->irq = 2; + dev->ram_size >>= 1; /* Half the RAM when in 8-bit slot. */ + } + break; - /* Ethernet, MCA, 5x3 interface chip, RAM 16k */ - case WD8003EA: - dev->board_chip = WE_ID_SOFT_CONFIG; - /* Ethernet, MCA, no interface chip, RAM 16k */ - case WD8003ETA: - dev->board_chip |= WE_TYPE_WD8013EBT | WE_ID_BUS_MCA; - dev->ram_size = 0x4000; - dev->pos_regs[0] = 0xC0; - dev->pos_regs[1] = 0x6F; - dev->bit16 = 3; - break; + /* Ethernet, MCA, 5x3 interface chip, RAM 16k */ + case WD8003EA: + dev->board_chip = WE_ID_SOFT_CONFIG; + /* Ethernet, MCA, no interface chip, RAM 16k */ + case WD8003ETA: + dev->board_chip |= WE_TYPE_WD8013EBT | WE_ID_BUS_MCA; + dev->ram_size = 0x4000; + dev->pos_regs[0] = 0xC0; + dev->pos_regs[1] = 0x6F; + dev->bit16 = 3; + break; - case WD8013EPA: - dev->board_chip = WE_TYPE_WD8013EP | WE_ID_BUS_MCA; - dev->ram_size = device_get_config_int("ram_size"); - dev->pos_regs[0] = 0xC8; - dev->pos_regs[1] = 0x61; - dev->bit16 = 3; - break; + case WD8013EPA: + dev->board_chip = WE_TYPE_WD8013EP | WE_ID_BUS_MCA; + dev->ram_size = device_get_config_int("ram_size"); + dev->pos_regs[0] = 0xC8; + dev->pos_regs[1] = 0x61; + dev->bit16 = 3; + break; } dev->irr |= WE_IRR_ENABLE_IRQ; @@ -767,23 +748,23 @@ wd_init(const device_t *info) dp8390_mem_alloc(dev->dp8390, 0x0000, dev->ram_size); if (dev->base_address) - wd_io_set(dev, dev->base_address); + wd_io_set(dev, dev->base_address); memcpy(dev->dp8390->physaddr, dev->maclocal, sizeof(dev->maclocal)); wdlog("%s: I/O=%04x, IRQ=%d, MAC=%02x:%02x:%02x:%02x:%02x:%02x\n", - dev->name, dev->base_address, dev->irq, - dev->dp8390->physaddr[0], dev->dp8390->physaddr[1], dev->dp8390->physaddr[2], - dev->dp8390->physaddr[3], dev->dp8390->physaddr[4], dev->dp8390->physaddr[5]); + dev->name, dev->base_address, dev->irq, + dev->dp8390->physaddr[0], dev->dp8390->physaddr[1], dev->dp8390->physaddr[2], + dev->dp8390->physaddr[3], dev->dp8390->physaddr[4], dev->dp8390->physaddr[5]); /* Reset the board. */ wd_reset(dev); /* Map this system into the memory map. */ mem_mapping_add(&dev->ram_mapping, dev->ram_addr, dev->ram_size, - wd_ram_read, NULL, NULL, - wd_ram_write, NULL, NULL, - NULL, MEM_MAPPING_EXTERNAL, dev); + wd_ram_read, NULL, NULL, + wd_ram_write, NULL, NULL, + NULL, MEM_MAPPING_EXTERNAL, dev); mem_mapping_disable(&dev->ram_mapping); @@ -791,18 +772,17 @@ wd_init(const device_t *info) dev->dp8390->card = network_attach(dev->dp8390, dev->dp8390->physaddr, dp8390_rx, NULL); if (!(dev->board_chip & WE_ID_BUS_MCA)) { - wdlog("%s: attached IO=0x%X IRQ=%d, RAM addr=0x%06x\n", dev->name, - dev->base_address, dev->irq, dev->ram_addr); + wdlog("%s: attached IO=0x%X IRQ=%d, RAM addr=0x%06x\n", dev->name, + dev->base_address, dev->irq, dev->ram_addr); } - return(dev); + return (dev); } - static void wd_close(void *priv) { - wd_t *dev = (wd_t *)priv; + wd_t *dev = (wd_t *) priv; wdlog("%s: closed\n", dev->name); @@ -1081,85 +1061,85 @@ static const device_config_t mca_mac_config[] = { // clang-format on const device_t wd8003e_device = { - .name = "Western Digital WD8003E", + .name = "Western Digital WD8003E", .internal_name = "wd8003e", - .flags = DEVICE_ISA, - .local = WD8003E, - .init = wd_init, - .close = wd_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = WD8003E, + .init = wd_init, + .close = wd_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = wd8003_config + .force_redraw = NULL, + .config = wd8003_config }; const device_t wd8003eb_device = { - .name = "Western Digital WD8003EB", + .name = "Western Digital WD8003EB", .internal_name = "wd8003eb", - .flags = DEVICE_ISA, - .local = WD8003EB, - .init = wd_init, - .close = wd_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = WD8003EB, + .init = wd_init, + .close = wd_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = wd8003eb_config + .force_redraw = NULL, + .config = wd8003eb_config }; const device_t wd8013ebt_device = { - .name = "Western Digital WD8013EBT", + .name = "Western Digital WD8013EBT", .internal_name = "wd8013ebt", - .flags = DEVICE_ISA, - .local = WD8013EBT, - .init = wd_init, - .close = wd_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = WD8013EBT, + .init = wd_init, + .close = wd_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = wd8013_config + .force_redraw = NULL, + .config = wd8013_config }; const device_t wd8003eta_device = { - .name = "Western Digital WD8003ET/A", + .name = "Western Digital WD8003ET/A", .internal_name = "wd8003eta", - .flags = DEVICE_MCA, - .local = WD8003ETA, - .init = wd_init, - .close = wd_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = WD8003ETA, + .init = wd_init, + .close = wd_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = mca_mac_config + .force_redraw = NULL, + .config = mca_mac_config }; const device_t wd8003ea_device = { - .name = "Western Digital WD8003E/A", + .name = "Western Digital WD8003E/A", .internal_name = "wd8003ea", - .flags = DEVICE_MCA, - .local = WD8003EA, - .init = wd_init, - .close = wd_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = WD8003EA, + .init = wd_init, + .close = wd_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = mca_mac_config + .force_redraw = NULL, + .config = mca_mac_config }; const device_t wd8013epa_device = { - .name = "Western Digital WD8013EP/A", + .name = "Western Digital WD8013EP/A", .internal_name = "wd8013epa", - .flags = DEVICE_MCA, - .local = WD8013EPA, - .init = wd_init, - .close = wd_close, - .reset = NULL, + .flags = DEVICE_MCA, + .local = WD8013EPA, + .init = wd_init, + .close = wd_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = wd8013epa_config + .force_redraw = NULL, + .config = wd8013epa_config }; diff --git a/src/network/network.c b/src/network/network.c index 7c6ab0826..69df16b22 100644 --- a/src/network/network.c +++ b/src/network/network.c @@ -73,26 +73,25 @@ #include <86box/net_wd8003.h> #ifdef _WIN32 -#define WIN32_LEAN_AND_MEAN -#include -#include +# define WIN32_LEAN_AND_MEAN +# include +# include #endif static const device_t net_none_device = { - .name = "None", + .name = "None", .internal_name = "none", - .flags = 0, - .local = NET_TYPE_NONE, - .init = NULL, - .close = NULL, - .reset = NULL, + .flags = 0, + .local = NET_TYPE_NONE, + .init = NULL, + .close = NULL, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; - static const device_t *net_cards[] = { &net_none_device, &threec503_device, @@ -118,72 +117,68 @@ static const device_t *net_cards[] = { }; netcard_conf_t net_cards_conf[NET_CARD_MAX]; -int net_card_current = 0; +int net_card_current = 0; /* Global variables. */ -int network_ndev; -netdev_t network_devs[NET_HOST_INTF_MAX]; - +int network_ndev; +netdev_t network_devs[NET_HOST_INTF_MAX]; /* Local variables. */ #ifdef ENABLE_NETWORK_LOG -int network_do_log = ENABLE_NETWORK_LOG; -static FILE *network_dump = NULL; +int network_do_log = ENABLE_NETWORK_LOG; +static FILE *network_dump = NULL; static mutex_t *network_dump_mutex; - static void network_log(const char *fmt, ...) { va_list ap; if (network_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } - static void network_dump_packet(netpkt_t *pkt) { if (!network_dump) - return; + return; struct timeval tv; gettimeofday(&tv, NULL); struct { - uint32_t ts_sec, ts_usec, incl_len, orig_len; + uint32_t ts_sec, ts_usec, incl_len, orig_len; } pcap_packet_hdr = { - tv.tv_sec, tv.tv_usec, pkt->len, pkt->len + tv.tv_sec, tv.tv_usec, pkt->len, pkt->len }; if (network_dump_mutex) - thread_wait_mutex(network_dump_mutex); + thread_wait_mutex(network_dump_mutex); size_t written; if ((written = fwrite(&pcap_packet_hdr, 1, sizeof(pcap_packet_hdr), network_dump)) < sizeof(pcap_packet_hdr)) { - network_log("NETWORK: failed to write dump packet header\n"); - fseek(network_dump, -written, SEEK_CUR); + network_log("NETWORK: failed to write dump packet header\n"); + fseek(network_dump, -written, SEEK_CUR); } else { - if ((written = fwrite(pkt->data, 1, pkt->len, network_dump)) < pkt->len) { - network_log("NETWORK: failed to write dump packet data\n"); - fseek(network_dump, -written - sizeof(pcap_packet_hdr), SEEK_CUR); - } - fflush(network_dump); + if ((written = fwrite(pkt->data, 1, pkt->len, network_dump)) < pkt->len) { + network_log("NETWORK: failed to write dump packet data\n"); + fseek(network_dump, -written - sizeof(pcap_packet_hdr), SEEK_CUR); + } + fflush(network_dump); } if (network_dump_mutex) - thread_release_mutex(network_dump_mutex); + thread_release_mutex(network_dump_mutex); } #else -#define network_log(fmt, ...) -#define network_dump_packet(pkt) +# define network_log(fmt, ...) +# define network_dump_packet(pkt) #endif - #ifdef _WIN32 static void network_winsock_clean(void) @@ -218,22 +213,22 @@ network_init(void) /* Initialize the Pcap system module, if present. */ i = net_pcap_prepare(&network_devs[network_ndev]); if (i > 0) - network_ndev += i; + network_ndev += i; #ifdef ENABLE_NETWORK_LOG /* Start packet dump. */ network_dump = fopen("network.pcap", "wb"); struct { - uint32_t magic_number; - uint16_t version_major, version_minor; - int32_t thiszone; - uint32_t sigfigs, snaplen, network; + uint32_t magic_number; + uint16_t version_major, version_minor; + int32_t thiszone; + uint32_t sigfigs, snaplen, network; } pcap_hdr = { - 0xa1b2c3d4, - 2, 4, - 0, - 0, 65535, 1 + 0xa1b2c3d4, + 2, 4, + 0, + 0, 65535, 1 }; fwrite(&pcap_hdr, sizeof(pcap_hdr), 1, network_dump); fflush(network_dump); @@ -244,11 +239,10 @@ void network_queue_init(netqueue_t *queue) { queue->head = queue->tail = 0; - for (int i=0; ipackets[i].data = calloc(1, NET_MAX_FRAME); - queue->packets[i].len = 0; + queue->packets[i].len = 0; } - } static bool @@ -267,8 +261,8 @@ static inline void network_swap_packet(netpkt_t *pkt1, netpkt_t *pkt2) { netpkt_t tmp = *pkt2; - *pkt2 = *pkt1; - *pkt1 = tmp; + *pkt2 = *pkt1; + *pkt1 = tmp; } int @@ -280,7 +274,7 @@ network_queue_put(netqueue_t *queue, uint8_t *data, int len) netpkt_t *pkt = &queue->packets[queue->head]; memcpy(pkt->data, data, len); - pkt->len = len; + pkt->len = len; queue->head = (queue->head + 1) & NET_QUEUE_LEN_MASK; return 1; } @@ -300,7 +294,8 @@ network_queue_put_swap(netqueue_t *queue, netpkt_t *src_pkt) } static int -network_queue_get_swap(netqueue_t *queue, netpkt_t *dst_pkt) { +network_queue_get_swap(netqueue_t *queue, netpkt_t *dst_pkt) +{ if (network_queue_empty(queue)) return 0; @@ -333,18 +328,17 @@ network_queue_move(netqueue_t *dst_q, netqueue_t *src_q) void network_queue_clear(netqueue_t *queue) { - for (int i=0; ipackets[i].data); queue->packets[i].len = 0; } queue->tail = queue->head = 0; } - static void network_rx_queue(void *priv) { - netcard_t *card = (netcard_t *)priv; + netcard_t *card = (netcard_t *) priv; uint32_t new_link_state = net_cards_conf[card->card_num].link_state; if (new_link_state != card->link_state) { @@ -393,7 +387,7 @@ network_rx_queue(void *priv) timer_on_auto(&card->timer, timer_period); bool activity = rx_bytes || tx_bytes; - bool led_on = card->led_timer & 0x80000000; + bool led_on = card->led_timer & 0x80000000; if ((activity && !led_on) || (card->led_timer & 0x7fffffff) >= 150000) { ui_sb_update_icon(SB_NETWORK | card->card_num, activity); card->led_timer = 0 | (activity << 31); @@ -402,7 +396,6 @@ network_rx_queue(void *priv) card->led_timer += timer_period; } - /* * Attach a network card to the system. * @@ -413,29 +406,29 @@ network_rx_queue(void *priv) netcard_t * network_attach(void *card_drv, uint8_t *mac, NETRXCB rx, NETSETLINKSTATE set_link_state) { - netcard_t *card = calloc(1, sizeof(netcard_t)); + netcard_t *card = calloc(1, sizeof(netcard_t)); card->queued_pkt.data = calloc(1, NET_MAX_FRAME); - card->card_drv = card_drv; - card->rx = rx; - card->set_link_state = set_link_state; - card->tx_mutex = thread_create_mutex(); - card->rx_mutex = thread_create_mutex(); - card->card_num = net_card_current; - card->byte_period = NET_PERIOD_10M; + card->card_drv = card_drv; + card->rx = rx; + card->set_link_state = set_link_state; + card->tx_mutex = thread_create_mutex(); + card->rx_mutex = thread_create_mutex(); + card->card_num = net_card_current; + card->byte_period = NET_PERIOD_10M; - for (int i=0; i<3; i++) { + for (int i = 0; i < 3; i++) { network_queue_init(&card->queues[i]); } switch (net_cards_conf[net_card_current].net_type) { case NET_TYPE_SLIRP: default: - card->host_drv = net_slirp_drv; + card->host_drv = net_slirp_drv; card->host_drv.priv = card->host_drv.init(card, mac, NULL); break; case NET_TYPE_PCAP: - card->host_drv = net_pcap_drv; + card->host_drv = net_pcap_drv; card->host_drv.priv = card->host_drv.init(card, mac, net_cards_conf[net_card_current].host_dev_name); break; } @@ -443,7 +436,7 @@ network_attach(void *card_drv, uint8_t *mac, NETRXCB rx, NETSETLINKSTATE set_lin if (!card->host_drv.priv) { thread_close_mutex(card->tx_mutex); thread_close_mutex(card->rx_mutex); - for (int i=0; i<3; i++) { + for (int i = 0; i < 3; i++) { network_queue_clear(&card->queues[i]); } @@ -466,7 +459,7 @@ netcard_close(netcard_t *card) thread_close_mutex(card->tx_mutex); thread_close_mutex(card->rx_mutex); - for (int i=0; i<3; i++) { + for (int i = 0; i < 3; i++) { network_queue_clear(&card->queues[i]); } @@ -474,7 +467,6 @@ netcard_close(netcard_t *card) free(card); } - /* Stop any network activity. */ void network_close(void) @@ -487,7 +479,6 @@ network_close(void) network_log("NETWORK: closed.\n"); } - /* * Reset the network card(s). * @@ -508,16 +499,15 @@ network_reset(void) #endif for (i = 0; i < NET_CARD_MAX; i++) { - if (!network_dev_available(i)) { - continue; - } + if (!network_dev_available(i)) { + continue; + } - net_card_current = i; - device_add_inst(net_cards[net_cards_conf[i].device_num], i + 1); + net_card_current = i; + device_add_inst(net_cards[net_cards_conf[i].device_num], i + 1); } } - /* Queue a packet for transmission to one of the network providers. */ void network_tx(netcard_t *card, uint8_t *bufp, int len) @@ -525,7 +515,8 @@ network_tx(netcard_t *card, uint8_t *bufp, int len) network_queue_put(&card->queues[NET_QUEUE_TX_VM], bufp, len); } -int network_tx_pop(netcard_t *card, netpkt_t *out_pkt) +int +network_tx_pop(netcard_t *card, netpkt_t *out_pkt) { int ret = 0; @@ -536,7 +527,8 @@ int network_tx_pop(netcard_t *card, netpkt_t *out_pkt) return ret; } -int network_tx_popv(netcard_t *card, netpkt_t *pkt_vec, int vec_size) +int +network_tx_popv(netcard_t *card, netpkt_t *pkt_vec, int vec_size) { int pkt_count = 0; @@ -553,7 +545,8 @@ int network_tx_popv(netcard_t *card, netpkt_t *pkt_vec, int vec_size) return pkt_count; } -int network_rx_put(netcard_t *card, uint8_t *bufp, int len) +int +network_rx_put(netcard_t *card, uint8_t *bufp, int len) { int ret = 0; @@ -564,7 +557,8 @@ int network_rx_put(netcard_t *card, uint8_t *bufp, int len) return ret; } -int network_rx_put_pkt(netcard_t *card, netpkt_t *pkt) +int +network_rx_put_pkt(netcard_t *card, netpkt_t *pkt) { int ret = 0; @@ -602,16 +596,15 @@ network_dev_to_id(char *devname) { int i = 0; - for (i=0; iinternal_name, s)) - return(c); - c++; + if (!strcmp((char *) net_cards[c]->internal_name, s)) + return (c); + c++; } return 0; diff --git a/src/network/pcap_if.c b/src/network/pcap_if.c index 384b11746..800ac5848 100644 --- a/src/network/pcap_if.c +++ b/src/network/pcap_if.c @@ -58,108 +58,101 @@ #include <86box/plat.h> #include <86box/plat_dynld.h> - -static void *pcap_handle; /* handle to WinPcap DLL */ - +static void *pcap_handle; /* handle to WinPcap DLL */ /* Pointers to the real functions. */ -static int (*f_pcap_findalldevs)(pcap_if_t **,char *); -static void (*f_pcap_freealldevs)(pcap_if_t *); -static pcap_t *(*f_pcap_open_live)(const char *,int,int,int,char *); -static int (*f_pcap_next_ex)(pcap_t*,struct pcap_pkthdr**,const unsigned char**); -static void (*f_pcap_close)(pcap_t *); +static int (*f_pcap_findalldevs)(pcap_if_t **, char *); +static void (*f_pcap_freealldevs)(pcap_if_t *); +static pcap_t *(*f_pcap_open_live)(const char *, int, int, int, char *); +static int (*f_pcap_next_ex)(pcap_t *, struct pcap_pkthdr **, const unsigned char **); +static void (*f_pcap_close)(pcap_t *); static dllimp_t pcap_imports[] = { -// clang-format off + // clang-format off { "pcap_findalldevs", &f_pcap_findalldevs }, { "pcap_freealldevs", &f_pcap_freealldevs }, { "pcap_open_live", &f_pcap_open_live }, { "pcap_next_ex", &f_pcap_next_ex }, { "pcap_close", &f_pcap_close }, { NULL, NULL }, -// clang-format on + // clang-format on }; - typedef struct { - char device[128]; - char description[128]; + char device[128]; + char description[128]; } capdev_t; - /* Retrieve an easy-to-use list of devices. */ static int get_devlist(capdev_t *list) { - char errbuf[PCAP_ERRBUF_SIZE]; + char errbuf[PCAP_ERRBUF_SIZE]; pcap_if_t *devlist, *dev; - int i = 0; + int i = 0; /* Retrieve the device list from the local machine */ if (f_pcap_findalldevs(&devlist, errbuf) == -1) { - fprintf(stderr,"Error in pcap_findalldevs_ex: %s\n", errbuf); - return(-1); + fprintf(stderr, "Error in pcap_findalldevs_ex: %s\n", errbuf); + return (-1); } - for (dev=devlist; dev!=NULL; dev=dev->next) { - strcpy(list->device, dev->name); - if (dev->description) - strcpy(list->description, dev->description); - else - memset(list->description, '\0', sizeof(list->description)); - list++; - i++; + for (dev = devlist; dev != NULL; dev = dev->next) { + strcpy(list->device, dev->name); + if (dev->description) + strcpy(list->description, dev->description); + else + memset(list->description, '\0', sizeof(list->description)); + list++; + i++; } /* Release the memory. */ f_pcap_freealldevs(devlist); - return(i); + return (i); } - /* Simple HEXDUMP routine for raw data. */ static void hex_dump(unsigned char *bufp, int len) { - char asci[20]; + char asci[20]; unsigned char c; - long addr; + long addr; addr = 0; while (len-- > 0) { - c = bufp[addr]; - if ((addr % 16) == 0) - printf("%04lx %02x", addr, c); - else - printf(" %02x", c); - asci[(addr & 15)] = (uint8_t)isprint(c) ? c : '.'; - if ((++addr % 16) == 0) { - asci[16] = '\0'; - printf(" | %s |\n", asci); - } + c = bufp[addr]; + if ((addr % 16) == 0) + printf("%04lx %02x", addr, c); + else + printf(" %02x", c); + asci[(addr & 15)] = (uint8_t) isprint(c) ? c : '.'; + if ((++addr % 16) == 0) { + asci[16] = '\0'; + printf(" | %s |\n", asci); + } } if (addr % 16) { - while (addr % 16) { - printf(" "); - asci[(addr & 15)] = ' '; - addr++; - } - asci[16] = '\0'; - printf(" | %s |\n", asci); + while (addr % 16) { + printf(" "); + asci[(addr & 15)] = ' '; + addr++; + } + asci[16] = '\0'; + printf(" | %s |\n", asci); } } - /* Print a standard Ethernet MAC address. */ static void eth_praddr(unsigned char *ptr) { printf("%02x:%02x:%02x:%02x:%02x:%02x", - ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5]); + ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5]); } - /* Print a standard Ethernet header. */ static int eth_prhdr(unsigned char *ptr) @@ -167,66 +160,66 @@ eth_prhdr(unsigned char *ptr) unsigned short type; printf("Ethernet "); - eth_praddr(ptr+6); + eth_praddr(ptr + 6); printf(" > "); eth_praddr(ptr); type = (ptr[12] << 8) | ptr[13]; printf(" type %04x\n", type); - return(14); + return (14); } - /* Capture packets from the network, and print them. */ static int start_cap(char *dev) { - char temp[PCAP_ERRBUF_SIZE]; - struct pcap_pkthdr *hdr; + char temp[PCAP_ERRBUF_SIZE]; + struct pcap_pkthdr *hdr; const unsigned char *pkt; - struct tm *ltime; - time_t now; - pcap_t *pcap; - int rc; + struct tm *ltime; + time_t now; + pcap_t *pcap; + int rc; /* Open the device for reading from it. */ pcap = f_pcap_open_live(dev, - 1518, /* MTU */ - 1, /* promisc mode */ - 10, /* timeout */ - temp); + 1518, /* MTU */ + 1, /* promisc mode */ + 10, /* timeout */ + temp); if (pcap == NULL) { - fprintf(stderr, "Pcap: open_live(%s): %s\n", dev, temp); - return(2); + fprintf(stderr, "Pcap: open_live(%s): %s\n", dev, temp); + return (2); } printf("Listening on '%s'..\n", dev); for (;;) { - rc = f_pcap_next_ex(pcap, &hdr, &pkt); - if (rc < 0) break; + rc = f_pcap_next_ex(pcap, &hdr, &pkt); + if (rc < 0) + break; - /* Did we time out? */ - if (rc == 0) continue; + /* Did we time out? */ + if (rc == 0) + continue; /* Convert the timestamp to readable format. */ - now = hdr->ts.tv_sec; + now = hdr->ts.tv_sec; ltime = localtime(&now); strftime(temp, sizeof(temp), "%H:%M:%S", ltime); - /* Process and print the packet. */ + /* Process and print the packet. */ printf("\n<< %s,%.6ld len=%u\n", - temp, hdr->ts.tv_usec, hdr->len); - rc = eth_prhdr((unsigned char *)pkt); - hex_dump((unsigned char *)pkt+rc, hdr->len-rc); + temp, hdr->ts.tv_usec, hdr->len); + rc = eth_prhdr((unsigned char *) pkt); + hex_dump((unsigned char *) pkt + rc, hdr->len - rc); } /* All done, close up. */ f_pcap_close(pcap); - return(0); + return (0); } - /* Show a list of available network interfaces. */ static void show_devs(capdev_t *list, int num) @@ -234,23 +227,22 @@ show_devs(capdev_t *list, int num) int i; if (num > 0) { - printf("Available network interfaces:\n\n"); + printf("Available network interfaces:\n\n"); - for (i=0; idevice); - if (list->description[0] != '\0') - printf(" (%s)\n", list->description); - else - printf(" (No description available)\n"); - list++; - printf("\n"); - } + for (i = 0; i < num; i++) { + printf(" %d - %s\n", i + 1, list->device); + if (list->description[0] != '\0') + printf(" (%s)\n", list->description); + else + printf(" (No description available)\n"); + list++; + printf("\n"); + } } else { - printf("No interfaces found!\nMake sure WinPcap is installed.\n"); + printf("No interfaces found!\nMake sure WinPcap is installed.\n"); } } - void pclog(const char *fmt, ...) { @@ -261,12 +253,11 @@ pclog(const char *fmt, ...) va_end(ap); } - int main(int argc, char **argv) { capdev_t interfaces[32]; - int numdev, i; + int numdev, i; /* Try loading the DLL. */ #ifdef _WIN32 @@ -278,39 +269,39 @@ main(int argc, char **argv) #endif if (pcap_handle == NULL) { #ifdef _WIN32 - fprintf(stderr, "Unable to load WinPcap DLL !\n"); + fprintf(stderr, "Unable to load WinPcap DLL !\n"); #else - fprintf(stderr, "Unable to load libpcap.so !\n"); + fprintf(stderr, "Unable to load libpcap.so !\n"); #endif - return(1); + return (1); } /* Get the list. */ numdev = get_devlist(interfaces); if (argc == 1) { - /* No arguments, just show the list. */ - show_devs(interfaces, numdev); + /* No arguments, just show the list. */ + show_devs(interfaces, numdev); - dynld_close(pcap_handle); + dynld_close(pcap_handle); - return(numdev); + return (numdev); } /* Assume argument to be the interface number to listen on. */ i = atoi(argv[1]); if (i < 0 || i > numdev) { - fprintf(stderr, "Invalid interface number %d !\n", i); + fprintf(stderr, "Invalid interface number %d !\n", i); - dynld_close(pcap_handle); + dynld_close(pcap_handle); - return(1); + return (1); } - /* Looks good, go and listen.. */ - i = start_cap(interfaces[i-1].device); +/* Looks good, go and listen.. */ + i = start_cap(interfaces[i - 1].device); dynld_close(pcap_handle); - return(i); + return (i); } From 6ead7187a9f3a4f3a2926c3266bdd22b6b0d69d3 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Sun, 18 Sep 2022 17:18:35 -0400 Subject: [PATCH 372/386] clang-format in src/include/mt32emu/ --- src/include/mt32emu/config.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/include/mt32emu/config.h b/src/include/mt32emu/config.h index 906c23d56..a7e31bd8d 100644 --- a/src/include/mt32emu/config.h +++ b/src/include/mt32emu/config.h @@ -42,4 +42,4 @@ #define MT32EMU_WITH_INTERNAL_RESAMPLER 1 -#endif +#endif /* #ifndef MT32EMU_CONFIG_H */ From b4673117fd625a530906f0cfbcd923e32027ce11 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 20 Sep 2022 01:00:45 -0400 Subject: [PATCH 373/386] Some clang-formatting in src/cpu --- src/cpu/386.c | 292 +-- src/cpu/808x.c | 3553 +++++++++++++++-------------- src/cpu/cpu.c | 5008 +++++++++++++++++++++-------------------- src/cpu/cpu.h | 868 ++++--- src/cpu/x87_timings.c | 882 ++++---- src/cpu/x87_timings.h | 92 +- 6 files changed, 5424 insertions(+), 5271 deletions(-) diff --git a/src/cpu/386.c b/src/cpu/386.c index d6d4ded16..662850318 100644 --- a/src/cpu/386.c +++ b/src/cpu/386.c @@ -6,7 +6,7 @@ #include #include #ifndef INFINITY -# define INFINITY (__builtin_inff()) +# define INFINITY (__builtin_inff()) #endif #define HAVE_STDARG_H @@ -25,14 +25,12 @@ #include <86box/gdbstub.h> #include "386_common.h" #ifdef USE_NEW_DYNAREC -#include "codegen.h" +# include "codegen.h" #endif - #undef CPU_BLOCK_END #define CPU_BLOCK_END() - extern int codegen_flags_changed; int tempc, oldcpl, optype, inttype, oddeven = 0; @@ -41,225 +39,229 @@ int timetolive; uint16_t oldcs; uint32_t oldds, oldss, olddslimit, oldsslimit, - olddslimitw, oldsslimitw; + olddslimitw, oldsslimitw; uint32_t oxpc; uint32_t rmdat32; uint32_t backupregs[16]; x86seg _oldds; - #ifdef ENABLE_386_LOG int x386_do_log = ENABLE_386_LOG; - void x386_log(const char *fmt, ...) { va_list ap; if (x386_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define x386_log(fmt, ...) +# define x386_log(fmt, ...) #endif - #undef CPU_BLOCK_END #define CPU_BLOCK_END() #include "x86_flags.h" -#define getbytef() ((uint8_t)(fetchdat)); cpu_state.pc++ -#define getwordf() ((uint16_t)(fetchdat)); cpu_state.pc+=2 -#define getbyte2f() ((uint8_t)(fetchdat>>8)); cpu_state.pc++ -#define getword2f() ((uint16_t)(fetchdat>>8)); cpu_state.pc+=2 +#define getbytef() \ + ((uint8_t) (fetchdat)); \ + cpu_state.pc++ +#define getwordf() \ + ((uint16_t) (fetchdat)); \ + cpu_state.pc += 2 +#define getbyte2f() \ + ((uint8_t) (fetchdat >> 8)); \ + cpu_state.pc++ +#define getword2f() \ + ((uint16_t) (fetchdat >> 8)); \ + cpu_state.pc += 2 - -#define OP_TABLE(name) ops_ ## name +#define OP_TABLE(name) ops_##name #if 0 -#define CLOCK_CYCLES(c) \ - {\ - if (fpu_cycles > 0) {\ - fpu_cycles -= (c);\ - if (fpu_cycles < 0) {\ - cycles += fpu_cycles;\ - }\ - } else {\ - cycles -= (c);\ - }\ - } +# define CLOCK_CYCLES(c) \ + { \ + if (fpu_cycles > 0) { \ + fpu_cycles -= (c); \ + if (fpu_cycles < 0) { \ + cycles += fpu_cycles; \ + } \ + } else { \ + cycles -= (c); \ + } \ + } -#define CLOCK_CYCLES_FPU(c) cycles -= (c) -#define CONCURRENCY_CYCLES(c) fpu_cycles = (c) +# define CLOCK_CYCLES_FPU(c) cycles -= (c) +# define CONCURRENCY_CYCLES(c) fpu_cycles = (c) #else -#define CLOCK_CYCLES(c) cycles -= (c) -#define CLOCK_CYCLES_FPU(c) cycles -= (c) -#define CONCURRENCY_CYCLES(c) +# define CLOCK_CYCLES(c) cycles -= (c) +# define CLOCK_CYCLES_FPU(c) cycles -= (c) +# define CONCURRENCY_CYCLES(c) #endif #define CLOCK_CYCLES_ALWAYS(c) cycles -= (c) #include "x86_ops.h" - void exec386(int cycs) { - int vector, tempi, cycdiff, oldcyc; - int cycle_period, ins_cycles; + int vector, tempi, cycdiff, oldcyc; + int cycle_period, ins_cycles; uint32_t addr; cycles += cycs; while (cycles > 0) { - cycle_period = (timer_target - (uint32_t)tsc) + 1; + cycle_period = (timer_target - (uint32_t) tsc) + 1; - x86_was_reset = 0; - cycdiff = 0; - oldcyc = cycles; - while (cycdiff < cycle_period) { - ins_cycles = cycles; + x86_was_reset = 0; + cycdiff = 0; + oldcyc = cycles; + while (cycdiff < cycle_period) { + ins_cycles = cycles; #ifndef USE_NEW_DYNAREC - oldcs=CS; - oldcpl=CPL; + oldcs = CS; + oldcpl = CPL; #endif - cpu_state.oldpc = cpu_state.pc; - cpu_state.op32 = use32; + cpu_state.oldpc = cpu_state.pc; + cpu_state.op32 = use32; #ifndef USE_NEW_DYNAREC - x86_was_reset = 0; + x86_was_reset = 0; #endif - cpu_state.ea_seg = &cpu_state.seg_ds; - cpu_state.ssegs = 0; + cpu_state.ea_seg = &cpu_state.seg_ds; + cpu_state.ssegs = 0; - fetchdat = fastreadl(cs + cpu_state.pc); + fetchdat = fastreadl(cs + cpu_state.pc); - if (!cpu_state.abrt) { + if (!cpu_state.abrt) { #ifdef ENABLE_386_LOG - if (in_smm) - x386_log("[%04X:%08X] %08X\n", CS, cpu_state.pc, fetchdat); + if (in_smm) + x386_log("[%04X:%08X] %08X\n", CS, cpu_state.pc, fetchdat); #endif - opcode = fetchdat & 0xFF; - fetchdat >>= 8; - trap = cpu_state.flags & T_FLAG; + opcode = fetchdat & 0xFF; + fetchdat >>= 8; + trap = cpu_state.flags & T_FLAG; - cpu_state.pc++; - x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat); - if (x86_was_reset) - break; - } + cpu_state.pc++; + x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat); + if (x86_was_reset) + break; + } #ifdef ENABLE_386_LOG - else if (in_smm) - x386_log("[%04X:%08X] ABRT\n", CS, cpu_state.pc); + else if (in_smm) + x386_log("[%04X:%08X] ABRT\n", CS, cpu_state.pc); #endif #ifndef USE_NEW_DYNAREC - if (!use32) cpu_state.pc &= 0xffff; + if (!use32) + cpu_state.pc &= 0xffff; #endif - if (cpu_end_block_after_ins) - cpu_end_block_after_ins--; + if (cpu_end_block_after_ins) + cpu_end_block_after_ins--; - if (cpu_state.abrt) { - flags_rebuild(); - tempi = cpu_state.abrt & ABRT_MASK; - cpu_state.abrt = 0; - x86_doabrt(tempi); - if (cpu_state.abrt) { - cpu_state.abrt = 0; + if (cpu_state.abrt) { + flags_rebuild(); + tempi = cpu_state.abrt & ABRT_MASK; + cpu_state.abrt = 0; + x86_doabrt(tempi); + if (cpu_state.abrt) { + cpu_state.abrt = 0; #ifndef USE_NEW_DYNAREC - CS = oldcs; + CS = oldcs; #endif - cpu_state.pc = cpu_state.oldpc; - x386_log("Double fault\n"); - pmodeint(8, 0); - if (cpu_state.abrt) { - cpu_state.abrt = 0; - softresetx86(); - cpu_set_edx(); + cpu_state.pc = cpu_state.oldpc; + x386_log("Double fault\n"); + pmodeint(8, 0); + if (cpu_state.abrt) { + cpu_state.abrt = 0; + softresetx86(); + cpu_set_edx(); #ifdef ENABLE_386_LOG - x386_log("Triple fault - reset\n"); + x386_log("Triple fault - reset\n"); #endif - } - } - } + } + } + } - if (smi_line) - enter_smm_check(0); - else if (trap) { - flags_rebuild(); - dr[6] |= 0x4000; - if (msw&1) - pmodeint(1,0); - else { - writememw(ss, (SP - 2) & 0xFFFF, cpu_state.flags); - writememw(ss, (SP - 4) & 0xFFFF, CS); - writememw(ss, (SP - 6) & 0xFFFF, cpu_state.pc); - SP -= 6; - addr = (1 << 2) + idt.base; - cpu_state.flags &= ~I_FLAG; - cpu_state.flags &= ~T_FLAG; - cpu_state.pc = readmemw(0, addr); - loadcs(readmemw(0, addr + 2)); - } - } else if (nmi && nmi_enable && nmi_mask) { - cpu_state.oldpc = cpu_state.pc; - x86_int(2); - nmi_enable = 0; + if (smi_line) + enter_smm_check(0); + else if (trap) { + flags_rebuild(); + dr[6] |= 0x4000; + if (msw & 1) + pmodeint(1, 0); + else { + writememw(ss, (SP - 2) & 0xFFFF, cpu_state.flags); + writememw(ss, (SP - 4) & 0xFFFF, CS); + writememw(ss, (SP - 6) & 0xFFFF, cpu_state.pc); + SP -= 6; + addr = (1 << 2) + idt.base; + cpu_state.flags &= ~I_FLAG; + cpu_state.flags &= ~T_FLAG; + cpu_state.pc = readmemw(0, addr); + loadcs(readmemw(0, addr + 2)); + } + } else if (nmi && nmi_enable && nmi_mask) { + cpu_state.oldpc = cpu_state.pc; + x86_int(2); + nmi_enable = 0; #ifdef OLD_NMI_BEHAVIOR - if (nmi_auto_clear) { - nmi_auto_clear = 0; - nmi = 0; - } + if (nmi_auto_clear) { + nmi_auto_clear = 0; + nmi = 0; + } #else - nmi = 0; + nmi = 0; #endif - } else if ((cpu_state.flags & I_FLAG) && pic.int_pending && !cpu_end_block_after_ins) { - vector = picinterrupt(); - if (vector != -1) { - flags_rebuild(); - if (msw & 1) - pmodeint(vector, 0); - else { - writememw(ss, (SP - 2) & 0xFFFF, cpu_state.flags); - writememw(ss, (SP - 4) & 0xFFFF, CS); - writememw(ss, (SP - 6) & 0xFFFF, cpu_state.pc); - SP -= 6; - addr = (vector << 2) + idt.base; - cpu_state.flags &= ~I_FLAG; - cpu_state.flags &= ~T_FLAG; - cpu_state.pc = readmemw(0, addr); - loadcs(readmemw(0, addr + 2)); - } - } - } + } else if ((cpu_state.flags & I_FLAG) && pic.int_pending && !cpu_end_block_after_ins) { + vector = picinterrupt(); + if (vector != -1) { + flags_rebuild(); + if (msw & 1) + pmodeint(vector, 0); + else { + writememw(ss, (SP - 2) & 0xFFFF, cpu_state.flags); + writememw(ss, (SP - 4) & 0xFFFF, CS); + writememw(ss, (SP - 6) & 0xFFFF, cpu_state.pc); + SP -= 6; + addr = (vector << 2) + idt.base; + cpu_state.flags &= ~I_FLAG; + cpu_state.flags &= ~T_FLAG; + cpu_state.pc = readmemw(0, addr); + loadcs(readmemw(0, addr + 2)); + } + } + } - ins_cycles -= cycles; - tsc += ins_cycles; + ins_cycles -= cycles; + tsc += ins_cycles; - cycdiff = oldcyc - cycles; + cycdiff = oldcyc - cycles; - if (timetolive) { - timetolive--; - if (!timetolive) - fatal("Life expired\n"); - } + if (timetolive) { + timetolive--; + if (!timetolive) + fatal("Life expired\n"); + } - if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t) tsc)) - timer_process_inline(); + if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t) tsc)) + timer_process_inline(); #ifdef USE_GDBSTUB - if (gdbstub_instruction()) - return; + if (gdbstub_instruction()) + return; #endif - } + } } } diff --git a/src/cpu/808x.c b/src/cpu/808x.c index 219bb4b67..01bfba24b 100644 --- a/src/cpu/808x.c +++ b/src/cpu/808x.c @@ -39,9 +39,8 @@ /* Is the CPU 8088 or 8086. */ int is8086 = 0; -uint8_t use_custom_nmi_vector = 0; -uint32_t custom_nmi_vector = 0x00000000; - +uint8_t use_custom_nmi_vector = 0; +uint32_t custom_nmi_vector = 0x00000000; /* The prefetch queue (4 bytes for 8088, 6 bytes for 8086). */ static uint8_t pfq[6]; @@ -54,9 +53,9 @@ static uint16_t pfq_ip; /* Pointer tables needed for segment overrides. */ static uint32_t *opseg[4]; -static x86seg *_opseg[4]; +static x86seg *_opseg[4]; -static int noint = 0; +static int noint = 0; static int in_lock = 0; static int cpu_alu_op, pfq_size; @@ -65,83 +64,77 @@ static uint32_t cpu_data = 0; static uint16_t last_addr = 0x0000; -static uint32_t *ovr_seg = NULL; -static int prefetching = 1, completed = 1; -static int in_rep = 0, repeating = 0; -static int oldc, clear_lock = 0; -static int refresh = 0, cycdiff; - +static uint32_t *ovr_seg = NULL; +static int prefetching = 1, completed = 1; +static int in_rep = 0, repeating = 0; +static int oldc, clear_lock = 0; +static int refresh = 0, cycdiff; /* Various things needed for 8087. */ -#define OP_TABLE(name) ops_ ## name +#define OP_TABLE(name) ops_##name #define CPU_BLOCK_END() -#define SEG_CHECK_READ(seg) -#define SEG_CHECK_WRITE(seg) -#define CHECK_READ(a, b, c) -#define CHECK_WRITE(a, b, c) -#define UN_USED(x) (void)(x) -#define fetch_ea_16(val) -#define fetch_ea_32(val) -#define PREFETCH_RUN(a, b, c, d, e, f, g, h) +#define SEG_CHECK_READ(seg) +#define SEG_CHECK_WRITE(seg) +#define CHECK_READ(a, b, c) +#define CHECK_WRITE(a, b, c) +#define UN_USED(x) (void) (x) +#define fetch_ea_16(val) +#define fetch_ea_32(val) +#define PREFETCH_RUN(a, b, c, d, e, f, g, h) -#define CYCLES(val) \ - { \ - wait(val, 0); \ - } +#define CYCLES(val) \ + { \ + wait(val, 0); \ + } -#define CLOCK_CYCLES_ALWAYS(val) \ - { \ - wait(val, 0); \ - } +#define CLOCK_CYCLES_ALWAYS(val) \ + { \ + wait(val, 0); \ + } #if 0 -#define CLOCK_CYCLES_FPU(val) \ - { \ - wait(val, 0); \ - } +# define CLOCK_CYCLES_FPU(val) \ + { \ + wait(val, 0); \ + } +# define CLOCK_CYCLES(val) \ + { \ + if (fpu_cycles > 0) { \ + fpu_cycles -= (val); \ + if (fpu_cycles < 0) { \ + wait(val, 0); \ + } \ + } else { \ + wait(val, 0); \ + } \ + } -#define CLOCK_CYCLES(val) \ - { \ - if (fpu_cycles > 0) { \ - fpu_cycles -= (val); \ - if (fpu_cycles < 0) { \ - wait(val, 0); \ - } \ - } else { \ - wait(val, 0); \ - } \ - } - -#define CONCURRENCY_CYCLES(c) fpu_cycles = (c) +# define CONCURRENCY_CYCLES(c) fpu_cycles = (c) #else -#define CLOCK_CYCLES(val) \ - { \ - wait(val, 0); \ - } +# define CLOCK_CYCLES(val) \ + { \ + wait(val, 0); \ + } -#define CLOCK_CYCLES_FPU(val) \ - { \ - wait(val, 0); \ - } +# define CLOCK_CYCLES_FPU(val) \ + { \ + wait(val, 0); \ + } -#define CONCURRENCY_CYCLES(c) +# define CONCURRENCY_CYCLES(c) #endif +typedef int (*OpFn)(uint32_t fetchdat); -typedef int (*OpFn)(uint32_t fetchdat); - - -static int tempc_fpu = 0; - +static int tempc_fpu = 0; #ifdef ENABLE_808X_LOG -void dumpregs(int); +void dumpregs(int); int x808x_do_log = ENABLE_808X_LOG; -int indump = 0; - +int indump = 0; static void x808x_log(const char *fmt, ...) @@ -149,19 +142,17 @@ x808x_log(const char *fmt, ...) va_list ap; if (x808x_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define x808x_log(fmt, ...) +# define x808x_log(fmt, ...) #endif - -static void pfq_add(int c, int add); -static void set_pzs(int bits); - +static void pfq_add(int c, int add); +static void set_pzs(int bits); uint16_t get_last_addr(void) @@ -169,48 +160,44 @@ get_last_addr(void) return last_addr; } - static void clock_start(void) { cycdiff = cycles; } - static void clock_end(void) { int diff = cycdiff - cycles; /* On 808x systems, clock speed is usually crystal frequency divided by an integer. */ - tsc += (uint64_t)diff * ((uint64_t)xt_cpu_multi >> 32ULL); /* Shift xt_cpu_multi by 32 bits to the right and then multiply. */ - if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t)tsc)) - timer_process(); + tsc += (uint64_t) diff * ((uint64_t) xt_cpu_multi >> 32ULL); /* Shift xt_cpu_multi by 32 bits to the right and then multiply. */ + if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t) tsc)) + timer_process(); } - static void fetch_and_bus(int c, int bus) { if (refresh > 0) { - /* Finish the current fetch, if any. */ - cycles -= ((4 - (biu_cycles & 3)) & 3); - pfq_add((4 - (biu_cycles & 3)) & 3, 1); - /* Add 4 memory access cycles. */ - cycles -= 4; - pfq_add(4, 0); + /* Finish the current fetch, if any. */ + cycles -= ((4 - (biu_cycles & 3)) & 3); + pfq_add((4 - (biu_cycles & 3)) & 3, 1); + /* Add 4 memory access cycles. */ + cycles -= 4; + pfq_add(4, 0); - refresh--; + refresh--; } pfq_add(c, !bus); if (bus < 2) { - clock_end(); - clock_start(); + clock_end(); + clock_start(); } } - static void wait(int c, int bus) { @@ -218,83 +205,78 @@ wait(int c, int bus) fetch_and_bus(c, bus); } - /* This is for external subtraction of cycles. */ void sub_cycles(int c) { if (c <= 0) - return; + return; cycles -= c; if (!is286) - fetch_and_bus(c, 2); + fetch_and_bus(c, 2); } - void resub_cycles(int old_cycles) { int cyc_diff = 0; if (old_cycles > cycles) { - cyc_diff = old_cycles - cycles; - cycles = old_cycles; - sub_cycles(cyc_diff); + cyc_diff = old_cycles - cycles; + cycles = old_cycles; + sub_cycles(cyc_diff); } } - #undef readmemb #undef readmemw #undef readmeml #undef readmemq - static void cpu_io(int bits, int out, uint16_t port) { int old_cycles = cycles; if (out) { - wait(4, 1); - if (bits == 16) { - if (is8086 && !(port & 1)) { - old_cycles = cycles; - outw(port, AX); - } else { - wait(4, 1); - old_cycles = cycles; - outb(port++, AL); - outb(port, AH); - } - } else { - old_cycles = cycles; - outb(port, AL); - } + wait(4, 1); + if (bits == 16) { + if (is8086 && !(port & 1)) { + old_cycles = cycles; + outw(port, AX); + } else { + wait(4, 1); + old_cycles = cycles; + outb(port++, AL); + outb(port, AH); + } + } else { + old_cycles = cycles; + outb(port, AL); + } } else { - wait(4, 1); - if (bits == 16) { - if (is8086 && !(port & 1)) { - old_cycles = cycles; - AX = inw(port); - } else { - wait(4, 1); - old_cycles = cycles; - AL = inb(port++); - AH = inb(port); - } - } else { - old_cycles = cycles; - AL = inb(port); - } + wait(4, 1); + if (bits == 16) { + if (is8086 && !(port & 1)) { + old_cycles = cycles; + AX = inw(port); + } else { + wait(4, 1); + old_cycles = cycles; + AL = inb(port++); + AH = inb(port); + } + } else { + old_cycles = cycles; + AL = inb(port); + } } resub_cycles(old_cycles); } - /* Reads a byte from the memory and advances the BIU. */ static uint8_t readmemb(uint32_t a) @@ -307,20 +289,18 @@ readmemb(uint32_t a) return ret; } - /* Reads a byte from the memory but does not advance the BIU. */ static uint8_t readmembf(uint32_t a) { uint8_t ret; - a = cs + (a & 0xffff); + a = cs + (a & 0xffff); ret = read_mem_b(a); return ret; } - /* Reads a word from the memory and advances the BIU. */ static uint16_t readmemw(uint32_t s, uint16_t a) @@ -329,17 +309,16 @@ readmemw(uint32_t s, uint16_t a) wait(4, 1); if (is8086 && !(a & 1)) - ret = read_mem_w(s + a); + ret = read_mem_w(s + a); else { - wait(4, 1); - ret = read_mem_b(s + a); - ret |= read_mem_b(s + ((a + 1) & 0xffff)) << 8; + wait(4, 1); + ret = read_mem_b(s + a); + ret |= read_mem_b(s + ((a + 1) & 0xffff)) << 8; } return ret; } - static uint16_t readmemwf(uint16_t a) { @@ -350,17 +329,15 @@ readmemwf(uint16_t a) return ret; } - static uint16_t readmem(uint32_t s) { if (opcode & 1) - return readmemw(s, cpu_state.eaaddr); + return readmemw(s, cpu_state.eaaddr); else - return (uint16_t) readmemb(s + cpu_state.eaaddr); + return (uint16_t) readmemb(s + cpu_state.eaaddr); } - static uint32_t readmeml(uint32_t s, uint16_t a) { @@ -372,7 +349,6 @@ readmeml(uint32_t s, uint16_t a) return temp; } - static uint64_t readmemq(uint32_t s, uint16_t a) { @@ -384,7 +360,6 @@ readmemq(uint32_t s, uint16_t a) return temp; } - /* Writes a byte to the memory and advances the BIU. */ static void writememb(uint32_t s, uint32_t a, uint8_t v) @@ -395,10 +370,9 @@ writememb(uint32_t s, uint32_t a, uint8_t v) write_mem_b(addr, v); if ((addr >= 0xf0000) && (addr <= 0xfffff)) - last_addr = addr & 0xffff; + last_addr = addr & 0xffff; } - /* Writes a word to the memory and advances the BIU. */ static void writememw(uint32_t s, uint32_t a, uint16_t v) @@ -407,29 +381,27 @@ writememw(uint32_t s, uint32_t a, uint16_t v) wait(4, 1); if (is8086 && !(a & 1)) - write_mem_w(addr, v); + write_mem_w(addr, v); else { - write_mem_b(addr, v & 0xff); - wait(4, 1); - addr = s + ((a + 1) & 0xffff); - write_mem_b(addr, v >> 8); + write_mem_b(addr, v & 0xff); + wait(4, 1); + addr = s + ((a + 1) & 0xffff); + write_mem_b(addr, v >> 8); } if ((addr >= 0xf0000) && (addr <= 0xfffff)) - last_addr = addr & 0xffff; + last_addr = addr & 0xffff; } - static void writemem(uint32_t s, uint16_t v) { if (opcode & 1) - writememw(s, cpu_state.eaaddr, v); + writememw(s, cpu_state.eaaddr, v); else - writememb(s, cpu_state.eaaddr, (uint8_t) (v & 0xff)); + writememb(s, cpu_state.eaaddr, (uint8_t) (v & 0xff)); } - static void writememl(uint32_t s, uint32_t a, uint32_t v) { @@ -437,7 +409,6 @@ writememl(uint32_t s, uint32_t a, uint32_t v) writememw(s, a + 2, v >> 16); } - static void writememq(uint32_t s, uint32_t a, uint64_t v) { @@ -445,29 +416,27 @@ writememq(uint32_t s, uint32_t a, uint64_t v) writememl(s, a + 4, v >> 32); } - static void pfq_write(void) { uint16_t tempw; if (is8086 && (pfq_pos < (pfq_size - 1))) { - /* The 8086 fetches 2 bytes at a time, and only if there's at least 2 bytes - free in the queue. */ - tempw = readmemwf(pfq_ip); - *(uint16_t *) &(pfq[pfq_pos]) = tempw; - pfq_ip += 2; - pfq_pos += 2; + /* The 8086 fetches 2 bytes at a time, and only if there's at least 2 bytes + free in the queue. */ + tempw = readmemwf(pfq_ip); + *(uint16_t *) &(pfq[pfq_pos]) = tempw; + pfq_ip += 2; + pfq_pos += 2; } else if (!is8086 && (pfq_pos < pfq_size)) { - /* The 8088 fetches 1 byte at a time, and only if there's at least 1 byte - free in the queue. */ - pfq[pfq_pos] = readmembf(pfq_ip); - pfq_ip++; - pfq_pos++; + /* The 8088 fetches 1 byte at a time, and only if there's at least 1 byte + free in the queue. */ + pfq[pfq_pos] = readmembf(pfq_ip); + pfq_ip++; + pfq_pos++; } } - static uint8_t pfq_read(void) { @@ -475,13 +444,12 @@ pfq_read(void) temp = pfq[0]; for (i = 0; i < (pfq_size - 1); i++) - pfq[i] = pfq[i + 1]; + pfq[i] = pfq[i + 1]; pfq_pos--; cpu_state.pc = (cpu_state.pc + 1) & 0xffff; return temp; } - /* Fetches a byte from the prefetch queue, or from memory if the queue has been drained. */ static uint8_t @@ -490,10 +458,10 @@ pfq_fetchb_common(void) uint8_t temp; if (pfq_pos == 0) { - /* Reset prefetch queue internal position. */ - pfq_ip = cpu_state.pc; - /* Fill the queue. */ - wait(4 - (biu_cycles & 3), 0); + /* Reset prefetch queue internal position. */ + pfq_ip = cpu_state.pc; + /* Fill the queue. */ + wait(4 - (biu_cycles & 3), 0); } /* Fetch. */ @@ -501,7 +469,6 @@ pfq_fetchb_common(void) return temp; } - static uint8_t pfq_fetchb(void) { @@ -512,7 +479,6 @@ pfq_fetchb(void) return ret; } - /* Fetches a word from the prefetch queue, or from memory if the queue has been drained. */ static uint16_t @@ -527,17 +493,15 @@ pfq_fetchw(void) return temp; } - static uint16_t pfq_fetch() { if (opcode & 1) - return pfq_fetchw(); + return pfq_fetchw(); else - return (uint16_t) pfq_fetchb(); + return (uint16_t) pfq_fetchb(); } - /* Adds bytes to the prefetch queue based on the instruction's cycle count. */ static void pfq_add(int c, int add) @@ -545,293 +509,277 @@ pfq_add(int c, int add) int d; if ((c <= 0) || (pfq_pos >= pfq_size)) - return; + return; for (d = 0; d < c; d++) { - biu_cycles = (biu_cycles + 1) & 0x03; - if (prefetching && add && (biu_cycles == 0x00)) - pfq_write(); + biu_cycles = (biu_cycles + 1) & 0x03; + if (prefetching && add && (biu_cycles == 0x00)) + pfq_write(); } } - /* Clear the prefetch queue - called on reset and on anything that affects either CS or IP. */ static void pfq_clear() { - pfq_pos = 0; + pfq_pos = 0; prefetching = 0; } - static void load_cs(uint16_t seg) { cpu_state.seg_cs.base = seg << 4; - cpu_state.seg_cs.seg = seg & 0xffff; + cpu_state.seg_cs.seg = seg & 0xffff; } - static void load_seg(uint16_t seg, x86seg *s) { s->base = seg << 4; - s->seg = seg & 0xffff; + s->seg = seg & 0xffff; } - void reset_808x(int hard) { biu_cycles = 0; - in_rep = 0; - in_lock = 0; - completed = 1; - repeating = 0; + in_rep = 0; + in_lock = 0; + completed = 1; + repeating = 0; clear_lock = 0; - refresh = 0; - ovr_seg = NULL; + refresh = 0; + ovr_seg = NULL; if (hard) { - opseg[0] = &es; - opseg[1] = &cs; - opseg[2] = &ss; - opseg[3] = &ds; - _opseg[0] = &cpu_state.seg_es; - _opseg[1] = &cpu_state.seg_cs; - _opseg[2] = &cpu_state.seg_ss; - _opseg[3] = &cpu_state.seg_ds; + opseg[0] = &es; + opseg[1] = &cs; + opseg[2] = &ss; + opseg[3] = &ds; + _opseg[0] = &cpu_state.seg_es; + _opseg[1] = &cpu_state.seg_cs; + _opseg[2] = &cpu_state.seg_ss; + _opseg[3] = &cpu_state.seg_ds; - pfq_size = (is8086) ? 6 : 4; - pfq_clear(); + pfq_size = (is8086) ? 6 : 4; + pfq_clear(); } load_cs(0xFFFF); cpu_state.pc = 0; - rammask = 0xfffff; + rammask = 0xfffff; prefetching = 1; - cpu_alu_op = 0; + cpu_alu_op = 0; use_custom_nmi_vector = 0x00; - custom_nmi_vector = 0x00000000; + custom_nmi_vector = 0x00000000; } - static void -set_ip(uint16_t new_ip) { +set_ip(uint16_t new_ip) +{ pfq_ip = cpu_state.pc = new_ip; - prefetching = 1; + prefetching = 1; } - /* Memory refresh read - called by reads and writes on DMA channel 0. */ void -refreshread(void) { +refreshread(void) +{ refresh++; } - static uint16_t get_accum(int bits) { return (bits == 16) ? AX : AL; } - static void set_accum(int bits, uint16_t val) { if (bits == 16) - AX = val; + AX = val; else - AL = val; + AL = val; } - static uint16_t sign_extend(uint8_t data) { return data + (data < 0x80 ? 0 : 0xff00); } - /* Fetches the effective address from the prefetch queue according to MOD and R/M. */ static void do_mod_rm(void) { - rmdat = pfq_fetchb(); + rmdat = pfq_fetchb(); cpu_reg = (rmdat >> 3) & 7; cpu_mod = (rmdat >> 6) & 3; - cpu_rm = rmdat & 7; + cpu_rm = rmdat & 7; if (cpu_mod == 3) - return; + return; wait(1, 0); if ((rmdat & 0xc7) == 0x06) { - wait(1, 0); - cpu_state.eaaddr = pfq_fetchw(); - easeg = ovr_seg ? *ovr_seg : ds; - wait(1, 0); - return; - } else switch (cpu_rm) { - case 0: - case 3: - wait(2, 0); - break; - case 1: - case 2: - wait(3, 0); - break; - } + wait(1, 0); + cpu_state.eaaddr = pfq_fetchw(); + easeg = ovr_seg ? *ovr_seg : ds; + wait(1, 0); + return; + } else + switch (cpu_rm) { + case 0: + case 3: + wait(2, 0); + break; + case 1: + case 2: + wait(3, 0); + break; + } cpu_state.eaaddr = (*mod1add[0][cpu_rm]) + (*mod1add[1][cpu_rm]); - easeg = ovr_seg ? *ovr_seg : *mod1seg[cpu_rm]; + easeg = ovr_seg ? *ovr_seg : *mod1seg[cpu_rm]; switch (rmdat & 0xc0) { - case 0x40: - wait(3, 0); - cpu_state.eaaddr += sign_extend(pfq_fetchb()); - break; - case 0x80: - wait(3, 0); - cpu_state.eaaddr += pfq_fetchw(); - break; + case 0x40: + wait(3, 0); + cpu_state.eaaddr += sign_extend(pfq_fetchb()); + break; + case 0x80: + wait(3, 0); + cpu_state.eaaddr += pfq_fetchw(); + break; } cpu_state.eaaddr &= 0xffff; wait(2, 0); } - #undef getr8 -#define getr8(r) ((r & 4) ? cpu_state.regs[r & 3].b.h : cpu_state.regs[r & 3].b.l) +#define getr8(r) ((r & 4) ? cpu_state.regs[r & 3].b.h : cpu_state.regs[r & 3].b.l) #undef setr8 -#define setr8(r,v) if (r & 4) cpu_state.regs[r & 3].b.h = v; \ - else cpu_state.regs[r & 3].b.l = v; - +#define setr8(r, v) \ + if (r & 4) \ + cpu_state.regs[r & 3].b.h = v; \ + else \ + cpu_state.regs[r & 3].b.l = v; /* Reads a byte from the effective address. */ static uint8_t geteab(void) { if (cpu_mod == 3) - return (getr8(cpu_rm)); + return (getr8(cpu_rm)); return readmemb(easeg + cpu_state.eaaddr); } - /* Reads a word from the effective address. */ static uint16_t geteaw(void) { if (cpu_mod == 3) - return cpu_state.regs[cpu_rm].w; + return cpu_state.regs[cpu_rm].w; return readmemw(easeg, cpu_state.eaaddr); } - /* Neede for 8087 - memory only. */ static uint32_t geteal(void) { if (cpu_mod == 3) { - fatal("808x register geteal()\n"); - return 0xffffffff; + fatal("808x register geteal()\n"); + return 0xffffffff; } return readmeml(easeg, cpu_state.eaaddr); } - /* Neede for 8087 - memory only. */ static uint64_t geteaq(void) { if (cpu_mod == 3) { - fatal("808x register geteaq()\n"); - return 0xffffffff; + fatal("808x register geteaq()\n"); + return 0xffffffff; } return readmemq(easeg, cpu_state.eaaddr); } - static void read_ea(int memory_only, int bits) { if (cpu_mod != 3) { - if (bits == 16) - cpu_data = readmemw(easeg, cpu_state.eaaddr); - else - cpu_data = readmemb(easeg + cpu_state.eaaddr); - return; + if (bits == 16) + cpu_data = readmemw(easeg, cpu_state.eaaddr); + else + cpu_data = readmemb(easeg + cpu_state.eaaddr); + return; } if (!memory_only) { - if (bits == 8) { - cpu_data = getr8(cpu_rm); - } else - cpu_data = cpu_state.regs[cpu_rm].w; + if (bits == 8) { + cpu_data = getr8(cpu_rm); + } else + cpu_data = cpu_state.regs[cpu_rm].w; } } - static void read_ea2(int bits) { cpu_state.eaaddr = (cpu_state.eaaddr + 2) & 0xffff; if (bits == 16) - cpu_data = readmemw(easeg, cpu_state.eaaddr); + cpu_data = readmemw(easeg, cpu_state.eaaddr); else - cpu_data = readmemb(easeg + cpu_state.eaaddr); + cpu_data = readmemb(easeg + cpu_state.eaaddr); } - /* Writes a byte to the effective address. */ static void seteab(uint8_t val) { if (cpu_mod == 3) { - setr8(cpu_rm, val); + setr8(cpu_rm, val); } else - writememb(easeg, cpu_state.eaaddr, val); + writememb(easeg, cpu_state.eaaddr, val); } - /* Writes a word to the effective address. */ static void seteaw(uint16_t val) { if (cpu_mod == 3) - cpu_state.regs[cpu_rm].w = val; + cpu_state.regs[cpu_rm].w = val; else - writememw(easeg, cpu_state.eaaddr, val); + writememw(easeg, cpu_state.eaaddr, val); } - static void seteal(uint32_t val) { if (cpu_mod == 3) { - fatal("808x register seteal()\n"); - return; + fatal("808x register seteal()\n"); + return; } else - writememl(easeg, cpu_state.eaaddr, val); + writememl(easeg, cpu_state.eaaddr, val); } - static void seteaq(uint64_t val) { if (cpu_mod == 3) { - fatal("808x register seteaq()\n"); - return; + fatal("808x register seteaq()\n"); + return; } else - writememq(easeg, cpu_state.eaaddr, val); + writememq(easeg, cpu_state.eaaddr, val); } - /* Leave out the 686 stuff as it's not needed and complicates compiling. */ #define FPU_8087 @@ -841,7 +789,6 @@ seteaq(uint64_t val) #undef tempc #undef FPU_8087 - /* Pushes a word to the stack. */ static void push(uint16_t *val) @@ -851,7 +798,6 @@ push(uint16_t *val) writememw(ss, cpu_state.eaaddr, *val); } - /* Pops a word from the stack. */ static uint16_t pop(void) @@ -861,90 +807,135 @@ pop(void) return readmemw(ss, cpu_state.eaaddr); } - static void access(int num, int bits) { switch (num) { - case 0: case 61: case 63: case 64: - case 67: case 69: case 71: case 72: - default: - break; - case 1: case 6: case 7: case 8: - case 9: case 17: case 20: case 21: - case 24: case 28: case 47: case 48: - case 49: case 50: case 51: case 55: - case 56: case 62: case 66: case 68: - wait(1, 0); - break; - case 3: case 11: case 15: case 22: - case 23: case 25: case 26: case 35: - case 44: case 45: case 46: case 52: - case 53: case 54: - wait(2, 0); - break; - case 16: case 18: case 19: case 27: - case 32: case 37: case 42: - wait(3, 0); - break; - case 10: case 12: case 13: case 14: - case 29: case 30: case 33: case 34: - case 39: case 41: case 60: - wait(4, 0); - break; - case 4: case 70: - wait(5, 0); - break; - case 31: case 38: case 40: - wait(6, 0); - break; - case 5: - if (opcode == 0xcc) - wait(7, 0); - else - wait(4, 0); - break; - case 36: - wait(1, 0); - pfq_clear(); - wait (1, 0); - if (cpu_mod != 3) - wait(1, 0); - wait(3, 0); - break; - case 43: - wait(2, 0); - pfq_clear(); - wait(1, 0); - break; - case 57: - if (cpu_mod != 3) - wait(2, 0); - wait(4, 0); - break; - case 58: - if (cpu_mod != 3) - wait(1, 0); - wait(4, 0); - break; - case 59: - wait(2, 0); - pfq_clear(); - if (cpu_mod != 3) - wait(1, 0); - wait(3, 0); - break; - case 65: - wait(1, 0); - pfq_clear(); - wait(2, 0); - if (cpu_mod != 3) - wait(1, 0); - break; + case 0: + case 61: + case 63: + case 64: + case 67: + case 69: + case 71: + case 72: + default: + break; + case 1: + case 6: + case 7: + case 8: + case 9: + case 17: + case 20: + case 21: + case 24: + case 28: + case 47: + case 48: + case 49: + case 50: + case 51: + case 55: + case 56: + case 62: + case 66: + case 68: + wait(1, 0); + break; + case 3: + case 11: + case 15: + case 22: + case 23: + case 25: + case 26: + case 35: + case 44: + case 45: + case 46: + case 52: + case 53: + case 54: + wait(2, 0); + break; + case 16: + case 18: + case 19: + case 27: + case 32: + case 37: + case 42: + wait(3, 0); + break; + case 10: + case 12: + case 13: + case 14: + case 29: + case 30: + case 33: + case 34: + case 39: + case 41: + case 60: + wait(4, 0); + break; + case 4: + case 70: + wait(5, 0); + break; + case 31: + case 38: + case 40: + wait(6, 0); + break; + case 5: + if (opcode == 0xcc) + wait(7, 0); + else + wait(4, 0); + break; + case 36: + wait(1, 0); + pfq_clear(); + wait(1, 0); + if (cpu_mod != 3) + wait(1, 0); + wait(3, 0); + break; + case 43: + wait(2, 0); + pfq_clear(); + wait(1, 0); + break; + case 57: + if (cpu_mod != 3) + wait(2, 0); + wait(4, 0); + break; + case 58: + if (cpu_mod != 3) + wait(1, 0); + wait(4, 0); + break; + case 59: + wait(2, 0); + pfq_clear(); + if (cpu_mod != 3) + wait(1, 0); + wait(3, 0); + break; + case 65: + wait(1, 0); + pfq_clear(); + wait(2, 0); + if (cpu_mod != 3) + wait(1, 0); + break; } } - /* Calls an interrupt. */ static void interrupt(uint16_t addr) @@ -955,13 +946,13 @@ interrupt(uint16_t addr) addr <<= 2; cpu_state.eaaddr = addr; - old_cs = CS; + old_cs = CS; access(5, 16); new_ip = readmemw(0, cpu_state.eaaddr); wait(1, 0); cpu_state.eaaddr = (cpu_state.eaaddr + 2) & 0xffff; access(6, 16); - new_cs = readmemw(0, cpu_state.eaaddr); + new_cs = readmemw(0, cpu_state.eaaddr); prefetching = 0; pfq_clear(); ovr_seg = NULL; @@ -979,7 +970,6 @@ interrupt(uint16_t addr) push(&old_ip); } - static void custom_nmi(void) { @@ -988,7 +978,7 @@ custom_nmi(void) uint16_t tempf; cpu_state.eaaddr = 0x0002; - old_cs = CS; + old_cs = CS; access(5, 16); (void) readmemw(0, cpu_state.eaaddr); new_ip = custom_nmi_vector & 0xffff; @@ -996,7 +986,7 @@ custom_nmi(void) cpu_state.eaaddr = (cpu_state.eaaddr + 2) & 0xffff; access(6, 16); (void) readmemw(0, cpu_state.eaaddr); - new_cs = custom_nmi_vector >> 16; + new_cs = custom_nmi_vector >> 16; prefetching = 0; pfq_clear(); ovr_seg = NULL; @@ -1014,95 +1004,90 @@ custom_nmi(void) push(&old_ip); } - static int irq_pending(void) { uint8_t temp; - temp = (nmi && nmi_enable && nmi_mask) || ((cpu_state.flags & T_FLAG) && !noint) || - ((cpu_state.flags & I_FLAG) && pic.int_pending && !noint); + temp = (nmi && nmi_enable && nmi_mask) || ((cpu_state.flags & T_FLAG) && !noint) || ((cpu_state.flags & I_FLAG) && pic.int_pending && !noint); return temp; } - static void check_interrupts(void) { int temp; if (irq_pending()) { - if ((cpu_state.flags & T_FLAG) && !noint) { - interrupt(1); - return; - } - if (nmi && nmi_enable && nmi_mask) { - nmi_enable = 0; - if (use_custom_nmi_vector) - custom_nmi(); - else - interrupt(2); + if ((cpu_state.flags & T_FLAG) && !noint) { + interrupt(1); + return; + } + if (nmi && nmi_enable && nmi_mask) { + nmi_enable = 0; + if (use_custom_nmi_vector) + custom_nmi(); + else + interrupt(2); #ifndef OLD_NMI_BEHAVIOR - nmi = 0; + nmi = 0; #endif - return; - } - if ((cpu_state.flags & I_FLAG) && pic.int_pending && !noint) { - repeating = 0; - completed = 1; - ovr_seg = NULL; - wait(3, 0); - /* ACK to PIC */ - temp = pic_irq_ack(); - wait(4, 1); - wait(1, 0); - /* ACK to PIC */ - temp = pic_irq_ack(); - wait(4, 1); - wait(1, 0); - in_lock = 0; - clear_lock = 0; - wait(1, 0); - /* Here is where temp should be filled, but we cheat. */ - wait(3, 0); - opcode = 0x00; - interrupt(temp); - } + return; + } + if ((cpu_state.flags & I_FLAG) && pic.int_pending && !noint) { + repeating = 0; + completed = 1; + ovr_seg = NULL; + wait(3, 0); + /* ACK to PIC */ + temp = pic_irq_ack(); + wait(4, 1); + wait(1, 0); + /* ACK to PIC */ + temp = pic_irq_ack(); + wait(4, 1); + wait(1, 0); + in_lock = 0; + clear_lock = 0; + wait(1, 0); + /* Here is where temp should be filled, but we cheat. */ + wait(3, 0); + opcode = 0x00; + interrupt(temp); + } } } - static int rep_action(int bits) { uint16_t t; if (in_rep == 0) - return 0; + return 0; wait(2, 0); t = CX; if (irq_pending() && (repeating != 0)) { - access(71, bits); - pfq_clear(); - set_ip(cpu_state.pc - 2); - t = 0; + access(71, bits); + pfq_clear(); + set_ip(cpu_state.pc - 2); + t = 0; } if (t == 0) { - wait(1, 0); - completed = 1; - repeating = 0; - return 1; + wait(1, 0); + completed = 1; + repeating = 0; + return 1; } --CX; completed = 0; wait(2, 0); if (!repeating) - wait(2, 0); + wait(2, 0); return 0; } - static uint16_t jump(uint16_t delta) { @@ -1115,21 +1100,18 @@ jump(uint16_t delta) return old_ip; } - static void jump_short(void) { jump(sign_extend((uint8_t) cpu_data)); } - static uint16_t jump_near(void) { return jump(pfq_fetchw()); } - /* Performs a conditional jump. */ static void jcc(uint8_t opcode, int cond) @@ -1140,31 +1122,27 @@ jcc(uint8_t opcode, int cond) cpu_data = pfq_fetchb(); wait(1, 0); if ((!cond) == !!(opcode & 0x01)) - jump_short(); + jump_short(); } - static void set_cf(int cond) { cpu_state.flags = (cpu_state.flags & ~C_FLAG) | (cond ? C_FLAG : 0); } - static void set_if(int cond) { cpu_state.flags = (cpu_state.flags & ~I_FLAG) | (cond ? I_FLAG : 0); } - static void set_df(int cond) { cpu_state.flags = (cpu_state.flags & ~D_FLAG) | (cond ? D_FLAG : 0); } - static void bitwise(int bits, uint16_t data) { @@ -1173,58 +1151,50 @@ bitwise(int bits, uint16_t data) set_pzs(bits); } - static void test(int bits, uint16_t dest, uint16_t src) { cpu_dest = dest; - cpu_src = src; + cpu_src = src; bitwise(bits, (cpu_dest & cpu_src)); } - static void set_of(int of) { cpu_state.flags = (cpu_state.flags & ~0x800) | (of ? 0x800 : 0); } - static int top_bit(uint16_t w, int bits) { return (w & (1 << (bits - 1))); } - static void set_of_add(int bits) { set_of(top_bit((cpu_data ^ cpu_src) & (cpu_data ^ cpu_dest), bits)); } - static void set_of_sub(int bits) { set_of(top_bit((cpu_dest ^ cpu_src) & (cpu_data ^ cpu_dest), bits)); } - static void set_af(int af) { cpu_state.flags = (cpu_state.flags & ~0x10) | (af ? 0x10 : 0); } - static void do_af(void) { set_af(((cpu_data ^ cpu_src ^ cpu_dest) & 0x10) != 0); } - static void set_apzs(int bits) { @@ -1232,7 +1202,6 @@ set_apzs(int bits) do_af(); } - static void add(int bits) { @@ -1245,12 +1214,11 @@ add(int bits) /* Anything - FF with carry on is basically anything + 0x100: value stays unchanged but carry goes on. */ if ((cpu_alu_op == 2) && !(cpu_src & size_mask) && (cpu_state.flags & C_FLAG)) - cpu_state.flags |= C_FLAG; + cpu_state.flags |= C_FLAG; else - set_cf((cpu_src & size_mask) > (cpu_data & size_mask)); + set_cf((cpu_src & size_mask) > (cpu_data & size_mask)); } - static void sub(int bits) { @@ -1263,63 +1231,60 @@ sub(int bits) /* Anything - FF with carry on is basically anything - 0x100: value stays unchanged but carry goes on. */ if ((cpu_alu_op == 3) && !(cpu_src & size_mask) && (cpu_state.flags & C_FLAG)) - cpu_state.flags |= C_FLAG; + cpu_state.flags |= C_FLAG; else - set_cf((cpu_src & size_mask) > (cpu_dest & size_mask)); + set_cf((cpu_src & size_mask) > (cpu_dest & size_mask)); } - static void alu_op(int bits) { - switch(cpu_alu_op) { - case 1: - bitwise(bits, (cpu_dest | cpu_src)); - break; - case 2: - if (cpu_state.flags & C_FLAG) - cpu_src++; - /* Fall through. */ - case 0: - add(bits); - break; - case 3: - if (cpu_state.flags & C_FLAG) - cpu_src++; - /* Fall through. */ - case 5: case 7: - sub(bits); - break; - case 4: - test(bits, cpu_dest, cpu_src); - break; - case 6: - bitwise(bits, (cpu_dest ^ cpu_src)); - break; + switch (cpu_alu_op) { + case 1: + bitwise(bits, (cpu_dest | cpu_src)); + break; + case 2: + if (cpu_state.flags & C_FLAG) + cpu_src++; + /* Fall through. */ + case 0: + add(bits); + break; + case 3: + if (cpu_state.flags & C_FLAG) + cpu_src++; + /* Fall through. */ + case 5: + case 7: + sub(bits); + break; + case 4: + test(bits, cpu_dest, cpu_src); + break; + case 6: + bitwise(bits, (cpu_dest ^ cpu_src)); + break; } } - static void set_sf(int bits) { cpu_state.flags = (cpu_state.flags & ~0x80) | (top_bit(cpu_data, bits) ? 0x80 : 0); } - static void set_pf(void) { - cpu_state.flags = (cpu_state.flags & ~4) | (!__builtin_parity(cpu_data & 0xFF) << 2); + cpu_state.flags = (cpu_state.flags & ~4) | (!__builtin_parity(cpu_data & 0xFF) << 2); } - static void mul(uint16_t a, uint16_t b) { - int negate = 0; - int bit_count = 8; - int carry, i; + int negate = 0; + int bit_count = 8; + int carry, i; uint16_t high_bit = 0x80; uint16_t size_mask; uint16_t c, r; @@ -1327,36 +1292,36 @@ mul(uint16_t a, uint16_t b) size_mask = (1 << bit_count) - 1; if (opcode != 0xd5) { - if (opcode & 1) { - bit_count = 16; - high_bit = 0x8000; - } else - wait(8, 0); + if (opcode & 1) { + bit_count = 16; + high_bit = 0x8000; + } else + wait(8, 0); - size_mask = (1 << bit_count) - 1; + size_mask = (1 << bit_count) - 1; - if ((rmdat & 0x38) == 0x28) { - if (!top_bit(a, bit_count)) { - if (top_bit(b, bit_count)) { - wait(1, 0); - if ((b & size_mask) != ((opcode & 1) ? 0x8000 : 0x80)) - wait(1, 0); - b = ~b + 1; - negate = 1; - } - } else { - wait(1, 0); - a = ~a + 1; - negate = 1; - if (top_bit(b, bit_count)) { - b = ~b + 1; - negate = 0; - } else - wait(4, 0); - } - wait(10, 0); - } - wait(3, 0); + if ((rmdat & 0x38) == 0x28) { + if (!top_bit(a, bit_count)) { + if (top_bit(b, bit_count)) { + wait(1, 0); + if ((b & size_mask) != ((opcode & 1) ? 0x8000 : 0x80)) + wait(1, 0); + b = ~b + 1; + negate = 1; + } + } else { + wait(1, 0); + a = ~a + 1; + negate = 1; + if (top_bit(b, bit_count)) { + b = ~b + 1; + negate = 0; + } else + wait(4, 0); + } + wait(10, 0); + } + wait(3, 0); } c = 0; @@ -1364,28 +1329,28 @@ mul(uint16_t a, uint16_t b) carry = (a & 1) != 0; a >>= 1; for (i = 0; i < bit_count; ++i) { - wait(7, 0); - if (carry) { - cpu_src = c; - cpu_dest = b; - add(bit_count); - c = cpu_data & size_mask; - wait(1, 0); - carry = !!(cpu_state.flags & C_FLAG); - } - r = (c >> 1) + (carry ? high_bit : 0); - carry = (c & 1) != 0; - c = r; - r = (a >> 1) + (carry ? high_bit : 0); - carry = (a & 1) != 0; - a = r; + wait(7, 0); + if (carry) { + cpu_src = c; + cpu_dest = b; + add(bit_count); + c = cpu_data & size_mask; + wait(1, 0); + carry = !!(cpu_state.flags & C_FLAG); + } + r = (c >> 1) + (carry ? high_bit : 0); + carry = (c & 1) != 0; + c = r; + r = (a >> 1) + (carry ? high_bit : 0); + carry = (a & 1) != 0; + a = r; } if (negate) { - c = ~c; - a = (~a + 1) & size_mask; - if (a == 0) - ++c; - wait(9, 0); + c = ~c; + a = (~a + 1) & size_mask; + if (a == 0) + ++c; + wait(9, 0); } cpu_data = a; cpu_dest = c; @@ -1395,21 +1360,18 @@ mul(uint16_t a, uint16_t b) set_af(0); } - static void set_of_rotate(int bits) { set_of(top_bit(cpu_data ^ cpu_dest, bits)); } - static void set_zf_ex(int zf) { cpu_state.flags = (cpu_state.flags & ~0x40) | (zf ? 0x40 : 0); } - static void set_zf(int bits) { @@ -1418,7 +1380,6 @@ set_zf(int bits) set_zf_ex((cpu_data & size_mask) == 0); } - static void set_pzs(int bits) { @@ -1427,161 +1388,155 @@ set_pzs(int bits) set_sf(bits); } - static void set_co_mul(int bits, int carry) { set_cf(carry); set_of(carry); /* NOTE: When implementing the V20, care should be taken to not change - the zero flag. */ + the zero flag. */ set_zf_ex(!carry); if (!carry) - wait(1, 0); + wait(1, 0); } - /* Was div(), renamed to avoid conflicts with stdlib div(). */ static int x86_div(uint16_t l, uint16_t h) { - int b, bit_count = 8; - int negative = 0; - int dividend_negative = 0; - int size_mask, carry; + int b, bit_count = 8; + int negative = 0; + int dividend_negative = 0; + int size_mask, carry; uint16_t r; if (opcode & 1) { - l = AX; - h = DX; - bit_count = 16; + l = AX; + h = DX; + bit_count = 16; } size_mask = (1 << bit_count) - 1; if (opcode != 0xd4) { - if ((rmdat & 0x38) == 0x38) { - if (top_bit(h, bit_count)) { - h = ~h; - l = (~l + 1) & size_mask; - if (l == 0) - ++h; - h &= size_mask; - negative = 1; - dividend_negative = 1; - wait(4, 0); - } - if (top_bit(cpu_src, bit_count)) { - cpu_src = ~cpu_src + 1; - negative = !negative; - } else - wait(1, 0); - wait(9, 0); - } - wait(3, 0); + if ((rmdat & 0x38) == 0x38) { + if (top_bit(h, bit_count)) { + h = ~h; + l = (~l + 1) & size_mask; + if (l == 0) + ++h; + h &= size_mask; + negative = 1; + dividend_negative = 1; + wait(4, 0); + } + if (top_bit(cpu_src, bit_count)) { + cpu_src = ~cpu_src + 1; + negative = !negative; + } else + wait(1, 0); + wait(9, 0); + } + wait(3, 0); } wait(8, 0); cpu_src &= size_mask; if (h >= cpu_src) { - if (opcode != 0xd4) - wait(1, 0); - interrupt(0); - return 0; + if (opcode != 0xd4) + wait(1, 0); + interrupt(0); + return 0; } if (opcode != 0xd4) - wait(1, 0); + wait(1, 0); wait(2, 0); carry = 1; for (b = 0; b < bit_count; ++b) { - r = (l << 1) + (carry ? 1 : 0); - carry = top_bit(l, bit_count); - l = r; - r = (h << 1) + (carry ? 1 : 0); - carry = top_bit(h, bit_count); - h = r; - wait(8, 0); - if (carry) { - carry = 0; - h -= cpu_src; - if (b == bit_count - 1) - wait(2, 0); - } else { - carry = cpu_src > h; - if (!carry) { - h -= cpu_src; - wait(1, 0); - if (b == bit_count - 1) - wait(2, 0); - } - } + r = (l << 1) + (carry ? 1 : 0); + carry = top_bit(l, bit_count); + l = r; + r = (h << 1) + (carry ? 1 : 0); + carry = top_bit(h, bit_count); + h = r; + wait(8, 0); + if (carry) { + carry = 0; + h -= cpu_src; + if (b == bit_count - 1) + wait(2, 0); + } else { + carry = cpu_src > h; + if (!carry) { + h -= cpu_src; + wait(1, 0); + if (b == bit_count - 1) + wait(2, 0); + } + } } l = ~((l << 1) + (carry ? 1 : 0)); if (opcode != 0xd4 && (rmdat & 0x38) == 0x38) { - wait(4, 0); - if (top_bit(l, bit_count)) { - if (cpu_mod == 3) - wait(1, 0); - interrupt(0); - return 0; - } - wait(7, 0); - if (negative) - l = ~l + 1; - if (dividend_negative) - h = ~h + 1; + wait(4, 0); + if (top_bit(l, bit_count)) { + if (cpu_mod == 3) + wait(1, 0); + interrupt(0); + return 0; + } + wait(7, 0); + if (negative) + l = ~l + 1; + if (dividend_negative) + h = ~h + 1; } if (opcode == 0xd4) { - AL = h & 0xff; - AH = l & 0xff; + AL = h & 0xff; + AH = l & 0xff; } else { - AH = h & 0xff; - AL = l & 0xff; - if (opcode & 1) { - DX = h; - AX = l; - } + AH = h & 0xff; + AL = l & 0xff; + if (opcode & 1) { + DX = h; + AX = l; + } } return 1; } - static uint16_t string_increment(int bits) { int d = bits >> 3; if (cpu_state.flags & D_FLAG) - cpu_state.eaaddr -= d; + cpu_state.eaaddr -= d; else - cpu_state.eaaddr += d; + cpu_state.eaaddr += d; cpu_state.eaaddr &= 0xffff; return cpu_state.eaaddr; } - static void lods(int bits) { cpu_state.eaaddr = SI; if (bits == 16) - cpu_data = readmemw((ovr_seg ? *ovr_seg : ds), cpu_state.eaaddr); + cpu_data = readmemw((ovr_seg ? *ovr_seg : ds), cpu_state.eaaddr); else - cpu_data = readmemb((ovr_seg ? *ovr_seg : ds) + cpu_state.eaaddr); + cpu_data = readmemb((ovr_seg ? *ovr_seg : ds) + cpu_state.eaaddr); SI = string_increment(bits); } - static void stos(int bits) { cpu_state.eaaddr = DI; if (bits == 16) - writememw(es, cpu_state.eaaddr, cpu_data); + writememw(es, cpu_state.eaaddr, cpu_data); else - writememb(es, cpu_state.eaaddr, (uint8_t) (cpu_data & 0xff)); + writememb(es, cpu_state.eaaddr, (uint8_t) (cpu_data & 0xff)); DI = string_increment(bits); } - static void aa(void) { @@ -1590,7 +1545,6 @@ aa(void) wait(6, 0); } - static void set_ca(void) { @@ -1598,7 +1552,6 @@ set_ca(void) set_af(1); } - static void clear_ca(void) { @@ -1606,1219 +1559,1347 @@ clear_ca(void) set_af(0); } - static uint16_t get_ea(void) { if (opcode & 1) - return geteaw(); + return geteaw(); else - return (uint16_t) geteab(); + return (uint16_t) geteab(); } - static uint16_t get_reg(uint8_t reg) { if (opcode & 1) - return cpu_state.regs[reg].w; + return cpu_state.regs[reg].w; else - return (uint16_t) getr8(reg); + return (uint16_t) getr8(reg); } - static void set_ea(uint16_t val) { if (opcode & 1) - seteaw(val); + seteaw(val); else - seteab((uint8_t) (val & 0xff)); + seteab((uint8_t) (val & 0xff)); } - static void set_reg(uint8_t reg, uint16_t val) { if (opcode & 1) - cpu_state.regs[reg].w = val; + cpu_state.regs[reg].w = val; else - setr8(reg, (uint8_t) (val & 0xff)); + setr8(reg, (uint8_t) (val & 0xff)); } - static void -cpu_data_opff_rm(void) { +cpu_data_opff_rm(void) +{ if (!(opcode & 1)) { - if (cpu_mod != 3) - cpu_data |= 0xff00; - else - cpu_data = cpu_state.regs[cpu_rm].w; + if (cpu_mod != 3) + cpu_data |= 0xff00; + else + cpu_data = cpu_state.regs[cpu_rm].w; } } - /* Executes instructions up to the specified number of cycles. */ void execx86(int cycs) { - uint8_t temp = 0, temp2; - uint8_t old_af; + uint8_t temp = 0, temp2; + uint8_t old_af; uint16_t addr, tempw; uint16_t new_cs, new_ip; - int bits; + int bits; cycles += cycs; while (cycles > 0) { - clock_start(); + clock_start(); - if (!repeating) { - cpu_state.oldpc = cpu_state.pc; - opcode = pfq_fetchb(); - oldc = cpu_state.flags & C_FLAG; - if (clear_lock) { - in_lock = 0; - clear_lock = 0; - } - wait(1, 0); - } + if (!repeating) { + cpu_state.oldpc = cpu_state.pc; + opcode = pfq_fetchb(); + oldc = cpu_state.flags & C_FLAG; + if (clear_lock) { + in_lock = 0; + clear_lock = 0; + } + wait(1, 0); + } - completed = 1; - // pclog("[%04X:%04X] Opcode: %02X\n", CS, cpu_state.pc, opcode); - switch (opcode) { - case 0x06: case 0x0E: case 0x16: case 0x1E: /* PUSH seg */ - access(29, 16); - push(&(_opseg[(opcode >> 3) & 0x03]->seg)); - break; - case 0x07: case 0x0F: case 0x17: case 0x1F: /* POP seg */ - access(22, 16); - if (opcode == 0x0F) { - load_cs(pop()); - pfq_pos = 0; - } else - load_seg(pop(), _opseg[(opcode >> 3) & 0x03]); - wait(1, 0); - /* All POP segment instructions suppress interrupts for one instruction. */ - noint = 1; - break; + completed = 1; + // pclog("[%04X:%04X] Opcode: %02X\n", CS, cpu_state.pc, opcode); + switch (opcode) { + case 0x06: + case 0x0E: + case 0x16: + case 0x1E: /* PUSH seg */ + access(29, 16); + push(&(_opseg[(opcode >> 3) & 0x03]->seg)); + break; + case 0x07: + case 0x0F: + case 0x17: + case 0x1F: /* POP seg */ + access(22, 16); + if (opcode == 0x0F) { + load_cs(pop()); + pfq_pos = 0; + } else + load_seg(pop(), _opseg[(opcode >> 3) & 0x03]); + wait(1, 0); + /* All POP segment instructions suppress interrupts for one instruction. */ + noint = 1; + break; - case 0x26: /*ES:*/ - case 0x2E: /*CS:*/ - case 0x36: /*SS:*/ - case 0x3E: /*DS:*/ - wait(1, 0); - ovr_seg = opseg[(opcode >> 3) & 0x03]; - completed = 0; - break; + case 0x26: /*ES:*/ + case 0x2E: /*CS:*/ + case 0x36: /*SS:*/ + case 0x3E: /*DS:*/ + wait(1, 0); + ovr_seg = opseg[(opcode >> 3) & 0x03]; + completed = 0; + break; - case 0x00: case 0x01: case 0x02: case 0x03: - case 0x08: case 0x09: case 0x0a: case 0x0b: - case 0x10: case 0x11: case 0x12: case 0x13: - case 0x18: case 0x19: case 0x1a: case 0x1b: - case 0x20: case 0x21: case 0x22: case 0x23: - case 0x28: case 0x29: case 0x2a: case 0x2b: - case 0x30: case 0x31: case 0x32: case 0x33: - case 0x38: case 0x39: case 0x3a: case 0x3b: - /* alu rm, r / r, rm */ - bits = 8 << (opcode & 1); - do_mod_rm(); - access(46, bits); - tempw = get_ea(); - cpu_alu_op = (opcode >> 3) & 7; - if ((opcode & 2) == 0) { - cpu_dest = tempw; - cpu_src = get_reg(cpu_reg); - } else { - cpu_dest = get_reg(cpu_reg); - cpu_src = tempw; - } - if (cpu_mod != 3) - wait(2, 0); - wait(1, 0); - alu_op(bits); - if (cpu_alu_op != 7) { - if ((opcode & 2) == 0) { - access(10, bits); - set_ea(cpu_data); - if (cpu_mod == 3) - wait(1, 0); - } else { - set_reg(cpu_reg, cpu_data); - wait(1, 0); - } - } else - wait(1, 0); - break; + case 0x00: + case 0x01: + case 0x02: + case 0x03: + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + case 0x10: + case 0x11: + case 0x12: + case 0x13: + case 0x18: + case 0x19: + case 0x1a: + case 0x1b: + case 0x20: + case 0x21: + case 0x22: + case 0x23: + case 0x28: + case 0x29: + case 0x2a: + case 0x2b: + case 0x30: + case 0x31: + case 0x32: + case 0x33: + case 0x38: + case 0x39: + case 0x3a: + case 0x3b: + /* alu rm, r / r, rm */ + bits = 8 << (opcode & 1); + do_mod_rm(); + access(46, bits); + tempw = get_ea(); + cpu_alu_op = (opcode >> 3) & 7; + if ((opcode & 2) == 0) { + cpu_dest = tempw; + cpu_src = get_reg(cpu_reg); + } else { + cpu_dest = get_reg(cpu_reg); + cpu_src = tempw; + } + if (cpu_mod != 3) + wait(2, 0); + wait(1, 0); + alu_op(bits); + if (cpu_alu_op != 7) { + if ((opcode & 2) == 0) { + access(10, bits); + set_ea(cpu_data); + if (cpu_mod == 3) + wait(1, 0); + } else { + set_reg(cpu_reg, cpu_data); + wait(1, 0); + } + } else + wait(1, 0); + break; - case 0x04: case 0x05: case 0x0c: case 0x0d: - case 0x14: case 0x15: case 0x1c: case 0x1d: - case 0x24: case 0x25: case 0x2c: case 0x2d: - case 0x34: case 0x35: case 0x3c: case 0x3d: - /* alu A, imm */ - bits = 8 << (opcode & 1); - wait(1, 0); - cpu_data = pfq_fetch(); - cpu_dest = get_accum(bits); /* AX/AL */ - cpu_src = cpu_data; - cpu_alu_op = (opcode >> 3) & 7; - alu_op(bits); - if (cpu_alu_op != 7) - set_accum(bits, cpu_data); - wait(1, 0); - break; + case 0x04: + case 0x05: + case 0x0c: + case 0x0d: + case 0x14: + case 0x15: + case 0x1c: + case 0x1d: + case 0x24: + case 0x25: + case 0x2c: + case 0x2d: + case 0x34: + case 0x35: + case 0x3c: + case 0x3d: + /* alu A, imm */ + bits = 8 << (opcode & 1); + wait(1, 0); + cpu_data = pfq_fetch(); + cpu_dest = get_accum(bits); /* AX/AL */ + cpu_src = cpu_data; + cpu_alu_op = (opcode >> 3) & 7; + alu_op(bits); + if (cpu_alu_op != 7) + set_accum(bits, cpu_data); + wait(1, 0); + break; - case 0x27: /*DAA*/ - cpu_dest = AL; - set_of(0); - old_af = !!(cpu_state.flags & A_FLAG); - if ((cpu_state.flags & A_FLAG) || (AL & 0x0f) > 9) { - cpu_src = 6; - cpu_data = cpu_dest + cpu_src; - set_of_add(8); - cpu_dest = cpu_data; - set_af(1); - } - if ((cpu_state.flags & C_FLAG) || AL > (old_af ? 0x9f : 0x99)) { - cpu_src = 0x60; - cpu_data = cpu_dest + cpu_src; - set_of_add(8); - cpu_dest = cpu_data; - set_cf(1); - } - AL = cpu_dest; - set_pzs(8); - wait(3, 0); - break; - case 0x2F: /*DAS*/ - cpu_dest = AL; - set_of(0); - old_af = !!(cpu_state.flags & A_FLAG); - if ((cpu_state.flags & A_FLAG) || ((AL & 0xf) > 9)) { - cpu_src = 6; - cpu_data = cpu_dest - cpu_src; - set_of_sub(8); - cpu_dest = cpu_data; - set_af(1); - } - if ((cpu_state.flags & C_FLAG) || AL > (old_af ? 0x9f : 0x99)) { - cpu_src = 0x60; - cpu_data = cpu_dest - cpu_src; - set_of_sub(8); - cpu_dest = cpu_data; - set_cf(1); - } - AL = cpu_dest; - set_pzs(8); - wait(3, 0); - break; - case 0x37: /*AAA*/ - wait(1, 0); - if ((cpu_state.flags & A_FLAG) || ((AL & 0xf) > 9)) { - cpu_src = 6; - ++AH; - set_ca(); - } else { - cpu_src = 0; - clear_ca(); - wait(1, 0); - } - cpu_dest = AL; - cpu_data = cpu_dest + cpu_src; - set_of_add(8); - aa(); - break; - case 0x3F: /*AAS*/ - wait(1, 0); - if ((cpu_state.flags & A_FLAG) || ((AL & 0xf) > 9)) { - cpu_src = 6; - --AH; - set_ca(); - } else { - cpu_src = 0; - clear_ca(); - wait(1, 0); - } - cpu_dest = AL; - cpu_data = cpu_dest - cpu_src; - set_of_sub(8); - aa(); - break; + case 0x27: /*DAA*/ + cpu_dest = AL; + set_of(0); + old_af = !!(cpu_state.flags & A_FLAG); + if ((cpu_state.flags & A_FLAG) || (AL & 0x0f) > 9) { + cpu_src = 6; + cpu_data = cpu_dest + cpu_src; + set_of_add(8); + cpu_dest = cpu_data; + set_af(1); + } + if ((cpu_state.flags & C_FLAG) || AL > (old_af ? 0x9f : 0x99)) { + cpu_src = 0x60; + cpu_data = cpu_dest + cpu_src; + set_of_add(8); + cpu_dest = cpu_data; + set_cf(1); + } + AL = cpu_dest; + set_pzs(8); + wait(3, 0); + break; + case 0x2F: /*DAS*/ + cpu_dest = AL; + set_of(0); + old_af = !!(cpu_state.flags & A_FLAG); + if ((cpu_state.flags & A_FLAG) || ((AL & 0xf) > 9)) { + cpu_src = 6; + cpu_data = cpu_dest - cpu_src; + set_of_sub(8); + cpu_dest = cpu_data; + set_af(1); + } + if ((cpu_state.flags & C_FLAG) || AL > (old_af ? 0x9f : 0x99)) { + cpu_src = 0x60; + cpu_data = cpu_dest - cpu_src; + set_of_sub(8); + cpu_dest = cpu_data; + set_cf(1); + } + AL = cpu_dest; + set_pzs(8); + wait(3, 0); + break; + case 0x37: /*AAA*/ + wait(1, 0); + if ((cpu_state.flags & A_FLAG) || ((AL & 0xf) > 9)) { + cpu_src = 6; + ++AH; + set_ca(); + } else { + cpu_src = 0; + clear_ca(); + wait(1, 0); + } + cpu_dest = AL; + cpu_data = cpu_dest + cpu_src; + set_of_add(8); + aa(); + break; + case 0x3F: /*AAS*/ + wait(1, 0); + if ((cpu_state.flags & A_FLAG) || ((AL & 0xf) > 9)) { + cpu_src = 6; + --AH; + set_ca(); + } else { + cpu_src = 0; + clear_ca(); + wait(1, 0); + } + cpu_dest = AL; + cpu_data = cpu_dest - cpu_src; + set_of_sub(8); + aa(); + break; - case 0x40: case 0x41: case 0x42: case 0x43: - case 0x44: case 0x45: case 0x46: case 0x47: - case 0x48: case 0x49: case 0x4A: case 0x4B: - case 0x4C: case 0x4D: case 0x4E: case 0x4F: - /* INCDEC rw */ - wait(1, 0); - cpu_dest = cpu_state.regs[opcode & 7].w; - cpu_src = 1; - bits = 16; - if ((opcode & 8) == 0) { - cpu_data = cpu_dest + cpu_src; - set_of_add(bits); - } else { - cpu_data = cpu_dest - cpu_src; - set_of_sub(bits); - } - do_af(); - set_pzs(16); - cpu_state.regs[opcode & 7].w = cpu_data; - break; + case 0x40: + case 0x41: + case 0x42: + case 0x43: + case 0x44: + case 0x45: + case 0x46: + case 0x47: + case 0x48: + case 0x49: + case 0x4A: + case 0x4B: + case 0x4C: + case 0x4D: + case 0x4E: + case 0x4F: + /* INCDEC rw */ + wait(1, 0); + cpu_dest = cpu_state.regs[opcode & 7].w; + cpu_src = 1; + bits = 16; + if ((opcode & 8) == 0) { + cpu_data = cpu_dest + cpu_src; + set_of_add(bits); + } else { + cpu_data = cpu_dest - cpu_src; + set_of_sub(bits); + } + do_af(); + set_pzs(16); + cpu_state.regs[opcode & 7].w = cpu_data; + break; - case 0x50: case 0x51: case 0x52: case 0x53: /*PUSH r16*/ - case 0x54: case 0x55: case 0x56: case 0x57: - access(30, 16); - push(&(cpu_state.regs[opcode & 0x07].w)); - break; - case 0x58: case 0x59: case 0x5A: case 0x5B: /*POP r16*/ - case 0x5C: case 0x5D: case 0x5E: case 0x5F: - access(23, 16); - cpu_state.regs[opcode & 0x07].w = pop(); - wait(1, 0); - break; + case 0x50: + case 0x51: + case 0x52: + case 0x53: /*PUSH r16*/ + case 0x54: + case 0x55: + case 0x56: + case 0x57: + access(30, 16); + push(&(cpu_state.regs[opcode & 0x07].w)); + break; + case 0x58: + case 0x59: + case 0x5A: + case 0x5B: /*POP r16*/ + case 0x5C: + case 0x5D: + case 0x5E: + case 0x5F: + access(23, 16); + cpu_state.regs[opcode & 0x07].w = pop(); + wait(1, 0); + break; - case 0x60: /*JO alias*/ - case 0x70: /*JO*/ - case 0x61: /*JNO alias*/ - case 0x71: /*JNO*/ - jcc(opcode, cpu_state.flags & V_FLAG); - break; - case 0x62: /*JB alias*/ - case 0x72: /*JB*/ - case 0x63: /*JNB alias*/ - case 0x73: /*JNB*/ - jcc(opcode, cpu_state.flags & C_FLAG); - break; - case 0x64: /*JE alias*/ - case 0x74: /*JE*/ - case 0x65: /*JNE alias*/ - case 0x75: /*JNE*/ - jcc(opcode, cpu_state.flags & Z_FLAG); - break; - case 0x66: /*JBE alias*/ - case 0x76: /*JBE*/ - case 0x67: /*JNBE alias*/ - case 0x77: /*JNBE*/ - jcc(opcode, cpu_state.flags & (C_FLAG | Z_FLAG)); - break; - case 0x68: /*JS alias*/ - case 0x78: /*JS*/ - case 0x69: /*JNS alias*/ - case 0x79: /*JNS*/ - jcc(opcode, cpu_state.flags & N_FLAG); - break; - case 0x6A: /*JP alias*/ - case 0x7A: /*JP*/ - case 0x6B: /*JNP alias*/ - case 0x7B: /*JNP*/ - jcc(opcode, cpu_state.flags & P_FLAG); - break; - case 0x6C: /*JL alias*/ - case 0x7C: /*JL*/ - case 0x6D: /*JNL alias*/ - case 0x7D: /*JNL*/ - temp = (cpu_state.flags & N_FLAG) ? 1 : 0; - temp2 = (cpu_state.flags & V_FLAG) ? 1 : 0; - jcc(opcode, temp ^ temp2); - break; - case 0x6E: /*JLE alias*/ - case 0x7E: /*JLE*/ - case 0x6F: /*JNLE alias*/ - case 0x7F: /*JNLE*/ - temp = (cpu_state.flags & N_FLAG) ? 1 : 0; - temp2 = (cpu_state.flags & V_FLAG) ? 1 : 0; - jcc(opcode, (cpu_state.flags & Z_FLAG) || (temp != temp2)); - break; + case 0x60: /*JO alias*/ + case 0x70: /*JO*/ + case 0x61: /*JNO alias*/ + case 0x71: /*JNO*/ + jcc(opcode, cpu_state.flags & V_FLAG); + break; + case 0x62: /*JB alias*/ + case 0x72: /*JB*/ + case 0x63: /*JNB alias*/ + case 0x73: /*JNB*/ + jcc(opcode, cpu_state.flags & C_FLAG); + break; + case 0x64: /*JE alias*/ + case 0x74: /*JE*/ + case 0x65: /*JNE alias*/ + case 0x75: /*JNE*/ + jcc(opcode, cpu_state.flags & Z_FLAG); + break; + case 0x66: /*JBE alias*/ + case 0x76: /*JBE*/ + case 0x67: /*JNBE alias*/ + case 0x77: /*JNBE*/ + jcc(opcode, cpu_state.flags & (C_FLAG | Z_FLAG)); + break; + case 0x68: /*JS alias*/ + case 0x78: /*JS*/ + case 0x69: /*JNS alias*/ + case 0x79: /*JNS*/ + jcc(opcode, cpu_state.flags & N_FLAG); + break; + case 0x6A: /*JP alias*/ + case 0x7A: /*JP*/ + case 0x6B: /*JNP alias*/ + case 0x7B: /*JNP*/ + jcc(opcode, cpu_state.flags & P_FLAG); + break; + case 0x6C: /*JL alias*/ + case 0x7C: /*JL*/ + case 0x6D: /*JNL alias*/ + case 0x7D: /*JNL*/ + temp = (cpu_state.flags & N_FLAG) ? 1 : 0; + temp2 = (cpu_state.flags & V_FLAG) ? 1 : 0; + jcc(opcode, temp ^ temp2); + break; + case 0x6E: /*JLE alias*/ + case 0x7E: /*JLE*/ + case 0x6F: /*JNLE alias*/ + case 0x7F: /*JNLE*/ + temp = (cpu_state.flags & N_FLAG) ? 1 : 0; + temp2 = (cpu_state.flags & V_FLAG) ? 1 : 0; + jcc(opcode, (cpu_state.flags & Z_FLAG) || (temp != temp2)); + break; - case 0x80: case 0x81: case 0x82: case 0x83: - /* alu rm, imm */ - bits = 8 << (opcode & 1); - do_mod_rm(); - access(47, bits); - cpu_data = get_ea(); - cpu_dest = cpu_data; - if (cpu_mod != 3) - wait(3, 0); - if (opcode == 0x81) { - if (cpu_mod == 3) - wait(1, 0); - cpu_src = pfq_fetchw(); - } else { - if (cpu_mod == 3) - wait(1, 0); - if (opcode == 0x83) - cpu_src = sign_extend(pfq_fetchb()); - else - cpu_src = pfq_fetchb() | 0xff00; - } - wait(1, 0); - cpu_alu_op = (rmdat & 0x38) >> 3; - alu_op(bits); - if (cpu_alu_op != 7) { - access(11, bits); - set_ea(cpu_data); - } else { - if (cpu_mod != 3) - wait(1, 0); - } - break; + case 0x80: + case 0x81: + case 0x82: + case 0x83: + /* alu rm, imm */ + bits = 8 << (opcode & 1); + do_mod_rm(); + access(47, bits); + cpu_data = get_ea(); + cpu_dest = cpu_data; + if (cpu_mod != 3) + wait(3, 0); + if (opcode == 0x81) { + if (cpu_mod == 3) + wait(1, 0); + cpu_src = pfq_fetchw(); + } else { + if (cpu_mod == 3) + wait(1, 0); + if (opcode == 0x83) + cpu_src = sign_extend(pfq_fetchb()); + else + cpu_src = pfq_fetchb() | 0xff00; + } + wait(1, 0); + cpu_alu_op = (rmdat & 0x38) >> 3; + alu_op(bits); + if (cpu_alu_op != 7) { + access(11, bits); + set_ea(cpu_data); + } else { + if (cpu_mod != 3) + wait(1, 0); + } + break; - case 0x84: case 0x85: - /* TEST rm, reg */ - bits = 8 << (opcode & 1); - do_mod_rm(); - access(48, bits); - cpu_data = get_ea(); - test(bits, cpu_data, get_reg(cpu_reg)); - if (cpu_mod == 3) - wait(2, 0); - wait(2, 0); - break; - case 0x86: case 0x87: - /* XCHG rm, reg */ - bits = 8 << (opcode & 1); - do_mod_rm(); - access(49, bits); - cpu_data = get_ea(); - cpu_src = get_reg(cpu_reg); - set_reg(cpu_reg, cpu_data); - wait(3, 0); - access(12, bits); - set_ea(cpu_src); - break; + case 0x84: + case 0x85: + /* TEST rm, reg */ + bits = 8 << (opcode & 1); + do_mod_rm(); + access(48, bits); + cpu_data = get_ea(); + test(bits, cpu_data, get_reg(cpu_reg)); + if (cpu_mod == 3) + wait(2, 0); + wait(2, 0); + break; + case 0x86: + case 0x87: + /* XCHG rm, reg */ + bits = 8 << (opcode & 1); + do_mod_rm(); + access(49, bits); + cpu_data = get_ea(); + cpu_src = get_reg(cpu_reg); + set_reg(cpu_reg, cpu_data); + wait(3, 0); + access(12, bits); + set_ea(cpu_src); + break; - case 0x88: case 0x89: - /* MOV rm, reg */ - bits = 8 << (opcode & 1); - do_mod_rm(); - wait(1, 0); - access(13, bits); - set_ea(get_reg(cpu_reg)); - break; - case 0x8A: case 0x8B: - /* MOV reg, rm */ - bits = 8 << (opcode & 1); - do_mod_rm(); - access(50, bits); - set_reg(cpu_reg, get_ea()); - wait(1, 0); - if (cpu_mod != 3) - wait(2, 0); - break; + case 0x88: + case 0x89: + /* MOV rm, reg */ + bits = 8 << (opcode & 1); + do_mod_rm(); + wait(1, 0); + access(13, bits); + set_ea(get_reg(cpu_reg)); + break; + case 0x8A: + case 0x8B: + /* MOV reg, rm */ + bits = 8 << (opcode & 1); + do_mod_rm(); + access(50, bits); + set_reg(cpu_reg, get_ea()); + wait(1, 0); + if (cpu_mod != 3) + wait(2, 0); + break; - case 0x8C: /*MOV w,sreg*/ - do_mod_rm(); - if (cpu_mod == 3) - wait(1, 0); - access(14, 16); - seteaw(_opseg[(rmdat & 0x18) >> 3]->seg); - break; + case 0x8C: /*MOV w,sreg*/ + do_mod_rm(); + if (cpu_mod == 3) + wait(1, 0); + access(14, 16); + seteaw(_opseg[(rmdat & 0x18) >> 3]->seg); + break; - case 0x8D: /*LEA*/ - do_mod_rm(); - cpu_state.regs[cpu_reg].w = cpu_state.eaaddr; - wait(1, 0); - if (cpu_mod != 3) - wait(2, 0); - break; + case 0x8D: /*LEA*/ + do_mod_rm(); + cpu_state.regs[cpu_reg].w = cpu_state.eaaddr; + wait(1, 0); + if (cpu_mod != 3) + wait(2, 0); + break; - case 0x8E: /*MOV sreg,w*/ - do_mod_rm(); - access(51, 16); - tempw = geteaw(); - if ((rmdat & 0x18) == 0x08) { - load_cs(tempw); - pfq_pos = 0; - } else - load_seg(tempw, _opseg[(rmdat & 0x18) >> 3]); - wait(1, 0); - if (cpu_mod != 3) - wait(2, 0); - if (((rmdat & 0x18) >> 3) == 2) - noint = 1; - break; + case 0x8E: /*MOV sreg,w*/ + do_mod_rm(); + access(51, 16); + tempw = geteaw(); + if ((rmdat & 0x18) == 0x08) { + load_cs(tempw); + pfq_pos = 0; + } else + load_seg(tempw, _opseg[(rmdat & 0x18) >> 3]); + wait(1, 0); + if (cpu_mod != 3) + wait(2, 0); + if (((rmdat & 0x18) >> 3) == 2) + noint = 1; + break; - case 0x8F: /*POPW*/ - do_mod_rm(); - wait(1, 0); - cpu_src = cpu_state.eaaddr; - access(24, 16); - if (cpu_mod != 3) - wait(2, 0); - cpu_data = pop(); - cpu_state.eaaddr = cpu_src; - wait(2, 0); - access(15, 16); - seteaw(cpu_data); - break; + case 0x8F: /*POPW*/ + do_mod_rm(); + wait(1, 0); + cpu_src = cpu_state.eaaddr; + access(24, 16); + if (cpu_mod != 3) + wait(2, 0); + cpu_data = pop(); + cpu_state.eaaddr = cpu_src; + wait(2, 0); + access(15, 16); + seteaw(cpu_data); + break; - case 0x90: case 0x91: case 0x92: case 0x93: - case 0x94: case 0x95: case 0x96: case 0x97: - /* XCHG AX, rw */ - wait(1, 0); - cpu_data = cpu_state.regs[opcode & 7].w; - cpu_state.regs[opcode & 7].w = AX; - AX = cpu_data; - wait(1, 0); - break; + case 0x90: + case 0x91: + case 0x92: + case 0x93: + case 0x94: + case 0x95: + case 0x96: + case 0x97: + /* XCHG AX, rw */ + wait(1, 0); + cpu_data = cpu_state.regs[opcode & 7].w; + cpu_state.regs[opcode & 7].w = AX; + AX = cpu_data; + wait(1, 0); + break; - case 0x98: /*CBW*/ - wait(1, 0); - AX = sign_extend(AL); - break; - case 0x99: /*CWD*/ - wait(4, 0); - if (!top_bit(AX, 16)) - DX = 0; - else { - wait(1, 0); - DX = 0xffff; - } - break; - case 0x9A: /*CALL FAR*/ - wait(1, 0); - new_ip = pfq_fetchw(); - wait(1, 0); - new_cs = pfq_fetchw(); - pfq_clear(); - access(31, 16); - push(&(CS)); - access(60, 16); - cpu_state.oldpc = cpu_state.pc; - load_cs(new_cs); - set_ip(new_ip); - access(32, 16); - push((uint16_t *) &(cpu_state.oldpc)); - break; - case 0x9B: /*WAIT*/ - if (!repeating) - wait(2, 0); - wait(5, 0); + case 0x98: /*CBW*/ + wait(1, 0); + AX = sign_extend(AL); + break; + case 0x99: /*CWD*/ + wait(4, 0); + if (!top_bit(AX, 16)) + DX = 0; + else { + wait(1, 0); + DX = 0xffff; + } + break; + case 0x9A: /*CALL FAR*/ + wait(1, 0); + new_ip = pfq_fetchw(); + wait(1, 0); + new_cs = pfq_fetchw(); + pfq_clear(); + access(31, 16); + push(&(CS)); + access(60, 16); + cpu_state.oldpc = cpu_state.pc; + load_cs(new_cs); + set_ip(new_ip); + access(32, 16); + push((uint16_t *) &(cpu_state.oldpc)); + break; + case 0x9B: /*WAIT*/ + if (!repeating) + wait(2, 0); + wait(5, 0); #ifdef NO_HACK - if (irq_pending()) { - wait(7, 0); - check_interrupts(); - } else { - repeating = 1; - completed = 0; - clock_end(); - } + if (irq_pending()) { + wait(7, 0); + check_interrupts(); + } else { + repeating = 1; + completed = 0; + clock_end(); + } #else - wait(7, 0); - check_interrupts(); + wait(7, 0); + check_interrupts(); #endif - break; - case 0x9C: /*PUSHF*/ - access(33, 16); - tempw = (cpu_state.flags & 0x0fd7) | 0xf000; - push(&tempw); - break; - case 0x9D: /*POPF*/ - access(25, 16); - cpu_state.flags = pop() | 2; - wait(1, 0); - break; - case 0x9E: /*SAHF*/ - wait(1, 0); - cpu_state.flags = (cpu_state.flags & 0xff02) | AH; - wait(2, 0); - break; - case 0x9F: /*LAHF*/ - wait(1, 0); - AH = cpu_state.flags & 0xd7; - break; + break; + case 0x9C: /*PUSHF*/ + access(33, 16); + tempw = (cpu_state.flags & 0x0fd7) | 0xf000; + push(&tempw); + break; + case 0x9D: /*POPF*/ + access(25, 16); + cpu_state.flags = pop() | 2; + wait(1, 0); + break; + case 0x9E: /*SAHF*/ + wait(1, 0); + cpu_state.flags = (cpu_state.flags & 0xff02) | AH; + wait(2, 0); + break; + case 0x9F: /*LAHF*/ + wait(1, 0); + AH = cpu_state.flags & 0xd7; + break; - case 0xA0: case 0xA1: - /* MOV A, [iw] */ - bits = 8 << (opcode & 1); - wait(1, 0); - cpu_state.eaaddr = pfq_fetchw(); - access(1, bits); - set_accum(bits, readmem((ovr_seg ? *ovr_seg : ds))); - wait(1, 0); - break; - case 0xA2: case 0xA3: - /* MOV [iw], A */ - bits = 8 << (opcode & 1); - wait(1, 0); - cpu_state.eaaddr = pfq_fetchw(); - access(7, bits); - writemem((ovr_seg ? *ovr_seg : ds), get_accum(bits)); - break; + case 0xA0: + case 0xA1: + /* MOV A, [iw] */ + bits = 8 << (opcode & 1); + wait(1, 0); + cpu_state.eaaddr = pfq_fetchw(); + access(1, bits); + set_accum(bits, readmem((ovr_seg ? *ovr_seg : ds))); + wait(1, 0); + break; + case 0xA2: + case 0xA3: + /* MOV [iw], A */ + bits = 8 << (opcode & 1); + wait(1, 0); + cpu_state.eaaddr = pfq_fetchw(); + access(7, bits); + writemem((ovr_seg ? *ovr_seg : ds), get_accum(bits)); + break; - case 0xA4: case 0xA5: /* MOVS */ - case 0xAC: case 0xAD: /* LODS */ - bits = 8 << (opcode & 1); - if (!repeating) { - wait(1, 0); - if ((opcode & 8) == 0 && in_rep != 0) - wait(1, 0); - } - if (rep_action(bits)) { - wait(1, 0); - if ((opcode & 8) != 0) - wait(1, 0); - break; - } - if (in_rep != 0 && (opcode & 8) != 0) - wait(1, 0); - access(20, bits); - lods(bits); - if ((opcode & 8) == 0) { - access(27, bits); - stos(bits); - } else { - set_accum(bits, cpu_data); - if (in_rep != 0) - wait(2, 0); - } - if (in_rep == 0) { - wait(3, 0); - if ((opcode & 8) != 0) - wait(1, 0); - break; - } - repeating = 1; - clock_end(); - break; + case 0xA4: + case 0xA5: /* MOVS */ + case 0xAC: + case 0xAD: /* LODS */ + bits = 8 << (opcode & 1); + if (!repeating) { + wait(1, 0); + if ((opcode & 8) == 0 && in_rep != 0) + wait(1, 0); + } + if (rep_action(bits)) { + wait(1, 0); + if ((opcode & 8) != 0) + wait(1, 0); + break; + } + if (in_rep != 0 && (opcode & 8) != 0) + wait(1, 0); + access(20, bits); + lods(bits); + if ((opcode & 8) == 0) { + access(27, bits); + stos(bits); + } else { + set_accum(bits, cpu_data); + if (in_rep != 0) + wait(2, 0); + } + if (in_rep == 0) { + wait(3, 0); + if ((opcode & 8) != 0) + wait(1, 0); + break; + } + repeating = 1; + clock_end(); + break; - case 0xA6: case 0xA7: /* CMPS */ - case 0xAE: case 0xAF: /* SCAS */ - bits = 8 << (opcode & 1); - if (!repeating) - wait(1, 0); - if (rep_action(bits)) { - wait(2, 0); - break; - } - if (in_rep != 0) - wait(1, 0); - wait(1, 0); - cpu_dest = get_accum(bits); - if ((opcode & 8) == 0) { - access(21, bits); - lods(bits); - wait(1, 0); - cpu_dest = cpu_data; - } - access(2, bits); - cpu_state.eaaddr = DI; - cpu_data = readmem(es); - DI = string_increment(bits); - cpu_src = cpu_data; - sub(bits); - wait(2, 0); - if (in_rep == 0) { - wait(3, 0); - break; - } - if ((!!(cpu_state.flags & Z_FLAG)) == (in_rep == 1)) { - completed = 1; - wait(4, 0); - break; - } - repeating = 1; - clock_end(); - break; + case 0xA6: + case 0xA7: /* CMPS */ + case 0xAE: + case 0xAF: /* SCAS */ + bits = 8 << (opcode & 1); + if (!repeating) + wait(1, 0); + if (rep_action(bits)) { + wait(2, 0); + break; + } + if (in_rep != 0) + wait(1, 0); + wait(1, 0); + cpu_dest = get_accum(bits); + if ((opcode & 8) == 0) { + access(21, bits); + lods(bits); + wait(1, 0); + cpu_dest = cpu_data; + } + access(2, bits); + cpu_state.eaaddr = DI; + cpu_data = readmem(es); + DI = string_increment(bits); + cpu_src = cpu_data; + sub(bits); + wait(2, 0); + if (in_rep == 0) { + wait(3, 0); + break; + } + if ((!!(cpu_state.flags & Z_FLAG)) == (in_rep == 1)) { + completed = 1; + wait(4, 0); + break; + } + repeating = 1; + clock_end(); + break; - case 0xA8: case 0xA9: - /* TEST A, imm */ - bits = 8 << (opcode & 1); - wait(1, 0); - cpu_data = pfq_fetch(); - test(bits, get_accum(bits), cpu_data); - wait(1, 0); - break; + case 0xA8: + case 0xA9: + /* TEST A, imm */ + bits = 8 << (opcode & 1); + wait(1, 0); + cpu_data = pfq_fetch(); + test(bits, get_accum(bits), cpu_data); + wait(1, 0); + break; - case 0xAA: case 0xAB: /* STOS */ - bits = 8 << (opcode & 1); - if (!repeating) { - wait(1, 0); - if (in_rep != 0) - wait(1, 0); - } - if (rep_action(bits)) { - wait(1, 0); - break; - } - cpu_data = AX; - access(28, bits); - stos(bits); - if (in_rep == 0) { - wait(3, 0); - break; - } - repeating = 1; - clock_end(); - break; + case 0xAA: + case 0xAB: /* STOS */ + bits = 8 << (opcode & 1); + if (!repeating) { + wait(1, 0); + if (in_rep != 0) + wait(1, 0); + } + if (rep_action(bits)) { + wait(1, 0); + break; + } + cpu_data = AX; + access(28, bits); + stos(bits); + if (in_rep == 0) { + wait(3, 0); + break; + } + repeating = 1; + clock_end(); + break; - case 0xB0: case 0xB1: case 0xB2: case 0xB3: /*MOV cpu_reg,#8*/ - case 0xB4: case 0xB5: case 0xB6: case 0xB7: - wait(1, 0); - if (opcode & 0x04) - cpu_state.regs[opcode & 0x03].b.h = pfq_fetchb(); - else - cpu_state.regs[opcode & 0x03].b.l = pfq_fetchb(); - wait(1, 0); - break; + case 0xB0: + case 0xB1: + case 0xB2: + case 0xB3: /*MOV cpu_reg,#8*/ + case 0xB4: + case 0xB5: + case 0xB6: + case 0xB7: + wait(1, 0); + if (opcode & 0x04) + cpu_state.regs[opcode & 0x03].b.h = pfq_fetchb(); + else + cpu_state.regs[opcode & 0x03].b.l = pfq_fetchb(); + wait(1, 0); + break; - case 0xB8: case 0xB9: case 0xBA: case 0xBB: /*MOV cpu_reg,#16*/ - case 0xBC: case 0xBD: case 0xBE: case 0xBF: - wait(1, 0); - cpu_state.regs[opcode & 0x07].w = pfq_fetchw(); - wait(1, 0); - break; + case 0xB8: + case 0xB9: + case 0xBA: + case 0xBB: /*MOV cpu_reg,#16*/ + case 0xBC: + case 0xBD: + case 0xBE: + case 0xBF: + wait(1, 0); + cpu_state.regs[opcode & 0x07].w = pfq_fetchw(); + wait(1, 0); + break; - case 0xC0: case 0xC1: case 0xC2: case 0xC3: - case 0xC8: case 0xC9: case 0xCA: case 0xCB: - /* RET */ - bits = 8 + (opcode & 0x08); - if ((opcode & 9) != 1) - wait(1, 0); - if (!(opcode & 1)) { - cpu_src = pfq_fetchw(); - wait(1, 0); - } - if ((opcode & 9) == 9) - wait(1, 0); - pfq_clear(); - access(26, bits); - new_ip = pop(); - wait(2, 0); - if ((opcode & 8) == 0) - new_cs = CS; - else { - access(42, bits); - new_cs = pop(); - if (opcode & 1) - wait(1, 0); - } - if (!(opcode & 1)) { - SP += cpu_src; - wait(1, 0); - } - load_cs(new_cs); - access(72, bits); - set_ip(new_ip); - break; + case 0xC0: + case 0xC1: + case 0xC2: + case 0xC3: + case 0xC8: + case 0xC9: + case 0xCA: + case 0xCB: + /* RET */ + bits = 8 + (opcode & 0x08); + if ((opcode & 9) != 1) + wait(1, 0); + if (!(opcode & 1)) { + cpu_src = pfq_fetchw(); + wait(1, 0); + } + if ((opcode & 9) == 9) + wait(1, 0); + pfq_clear(); + access(26, bits); + new_ip = pop(); + wait(2, 0); + if ((opcode & 8) == 0) + new_cs = CS; + else { + access(42, bits); + new_cs = pop(); + if (opcode & 1) + wait(1, 0); + } + if (!(opcode & 1)) { + SP += cpu_src; + wait(1, 0); + } + load_cs(new_cs); + access(72, bits); + set_ip(new_ip); + break; - case 0xC4: case 0xC5: - /* LsS rw, rmd */ - do_mod_rm(); - bits = 16; - access(52, bits); - read_ea(1, bits); - cpu_state.regs[cpu_reg].w = cpu_data; - access(57, bits); - read_ea2(bits); - load_seg(cpu_data, (opcode & 0x01) ? &cpu_state.seg_ds : &cpu_state.seg_es); - wait(1, 0); - break; + case 0xC4: + case 0xC5: + /* LsS rw, rmd */ + do_mod_rm(); + bits = 16; + access(52, bits); + read_ea(1, bits); + cpu_state.regs[cpu_reg].w = cpu_data; + access(57, bits); + read_ea2(bits); + load_seg(cpu_data, (opcode & 0x01) ? &cpu_state.seg_ds : &cpu_state.seg_es); + wait(1, 0); + break; - case 0xC6: case 0xC7: - /* MOV rm, imm */ - bits = 8 << (opcode & 1); - do_mod_rm(); - wait(1, 0); - if (cpu_mod != 3) - wait(2, 0); - cpu_data = pfq_fetch(); - if (cpu_mod == 3) - wait(1, 0); - access(16, bits); - set_ea(cpu_data); - break; + case 0xC6: + case 0xC7: + /* MOV rm, imm */ + bits = 8 << (opcode & 1); + do_mod_rm(); + wait(1, 0); + if (cpu_mod != 3) + wait(2, 0); + cpu_data = pfq_fetch(); + if (cpu_mod == 3) + wait(1, 0); + access(16, bits); + set_ea(cpu_data); + break; - case 0xCC: /*INT 3*/ - interrupt(3); - break; - case 0xCD: /*INT*/ - wait(1, 0); - interrupt(pfq_fetchb()); - break; - case 0xCE: /*INTO*/ - wait(3, 0); - if (cpu_state.flags & V_FLAG) { - wait(2, 0); - interrupt(4); - } - break; + case 0xCC: /*INT 3*/ + interrupt(3); + break; + case 0xCD: /*INT*/ + wait(1, 0); + interrupt(pfq_fetchb()); + break; + case 0xCE: /*INTO*/ + wait(3, 0); + if (cpu_state.flags & V_FLAG) { + wait(2, 0); + interrupt(4); + } + break; - case 0xCF: /*IRET*/ - access(43, 8); - new_ip = pop(); - wait(3, 0); - access(44, 8); - new_cs = pop(); - load_cs(new_cs); - access(62, 8); - set_ip(new_ip); - access(45, 8); - cpu_state.flags = pop() | 2; - wait(5, 0); - noint = 1; - nmi_enable = 1; - break; + case 0xCF: /*IRET*/ + access(43, 8); + new_ip = pop(); + wait(3, 0); + access(44, 8); + new_cs = pop(); + load_cs(new_cs); + access(62, 8); + set_ip(new_ip); + access(45, 8); + cpu_state.flags = pop() | 2; + wait(5, 0); + noint = 1; + nmi_enable = 1; + break; - case 0xD0: case 0xD1: case 0xD2: case 0xD3: - /* rot rm */ - bits = 8 << (opcode & 1); - do_mod_rm(); - if (cpu_mod == 3) - wait(1, 0); - access(53, bits); - cpu_data = get_ea(); - if ((opcode & 2) == 0) { - cpu_src = 1; - wait((cpu_mod != 3) ? 4 : 0, 0); - } else { - cpu_src = CL; - wait((cpu_mod != 3) ? 9 : 6, 0); - } - while (cpu_src != 0) { - cpu_dest = cpu_data; - oldc = cpu_state.flags & C_FLAG; - switch (rmdat & 0x38) { - case 0x00: /* ROL */ - set_cf(top_bit(cpu_data, bits)); - cpu_data <<= 1; - cpu_data |= ((cpu_state.flags & C_FLAG) ? 1 : 0); - set_of_rotate(bits); - set_af(0); - break; - case 0x08: /* ROR */ - set_cf((cpu_data & 1) != 0); - cpu_data >>= 1; - if (cpu_state.flags & C_FLAG) - cpu_data |= (!(opcode & 1) ? 0x80 : 0x8000); - set_of_rotate(bits); - set_af(0); - break; - case 0x10: /* RCL */ - set_cf(top_bit(cpu_data, bits)); - cpu_data = (cpu_data << 1) | (oldc ? 1 : 0); - set_of_rotate(bits); - set_af(0); - break; - case 0x18: /* RCR */ - set_cf((cpu_data & 1) != 0); - cpu_data >>= 1; - if (oldc) - cpu_data |= (!(opcode & 0x01) ? 0x80 : 0x8000); - set_cf((cpu_dest & 1) != 0); - set_of_rotate(bits); - set_af(0); - break; - case 0x20: /* SHL */ - set_cf(top_bit(cpu_data, bits)); - cpu_data <<= 1; - set_of_rotate(bits); - set_af((cpu_data & 0x10) != 0); - set_pzs(bits); - break; - case 0x28: /* SHR */ - set_cf((cpu_data & 1) != 0); - cpu_data >>= 1; - set_of_rotate(bits); - set_af(0); - set_pzs(bits); - break; - case 0x30: /* SETMO - undocumented? */ - bitwise(bits, 0xffff); - set_cf(0); - set_of_rotate(bits); - set_af(0); - set_pzs(bits); - break; - case 0x38: /* SAR */ - set_cf((cpu_data & 1) != 0); - cpu_data >>= 1; - if (!(opcode & 1)) - cpu_data |= (cpu_dest & 0x80); - else - cpu_data |= (cpu_dest & 0x8000); - set_of_rotate(bits); - set_af(0); - set_pzs(bits); - break; - } - if ((opcode & 2) != 0) - wait(4, 0); - --cpu_src; - } - access(17, bits); - set_ea(cpu_data); - break; + case 0xD0: + case 0xD1: + case 0xD2: + case 0xD3: + /* rot rm */ + bits = 8 << (opcode & 1); + do_mod_rm(); + if (cpu_mod == 3) + wait(1, 0); + access(53, bits); + cpu_data = get_ea(); + if ((opcode & 2) == 0) { + cpu_src = 1; + wait((cpu_mod != 3) ? 4 : 0, 0); + } else { + cpu_src = CL; + wait((cpu_mod != 3) ? 9 : 6, 0); + } + while (cpu_src != 0) { + cpu_dest = cpu_data; + oldc = cpu_state.flags & C_FLAG; + switch (rmdat & 0x38) { + case 0x00: /* ROL */ + set_cf(top_bit(cpu_data, bits)); + cpu_data <<= 1; + cpu_data |= ((cpu_state.flags & C_FLAG) ? 1 : 0); + set_of_rotate(bits); + set_af(0); + break; + case 0x08: /* ROR */ + set_cf((cpu_data & 1) != 0); + cpu_data >>= 1; + if (cpu_state.flags & C_FLAG) + cpu_data |= (!(opcode & 1) ? 0x80 : 0x8000); + set_of_rotate(bits); + set_af(0); + break; + case 0x10: /* RCL */ + set_cf(top_bit(cpu_data, bits)); + cpu_data = (cpu_data << 1) | (oldc ? 1 : 0); + set_of_rotate(bits); + set_af(0); + break; + case 0x18: /* RCR */ + set_cf((cpu_data & 1) != 0); + cpu_data >>= 1; + if (oldc) + cpu_data |= (!(opcode & 0x01) ? 0x80 : 0x8000); + set_cf((cpu_dest & 1) != 0); + set_of_rotate(bits); + set_af(0); + break; + case 0x20: /* SHL */ + set_cf(top_bit(cpu_data, bits)); + cpu_data <<= 1; + set_of_rotate(bits); + set_af((cpu_data & 0x10) != 0); + set_pzs(bits); + break; + case 0x28: /* SHR */ + set_cf((cpu_data & 1) != 0); + cpu_data >>= 1; + set_of_rotate(bits); + set_af(0); + set_pzs(bits); + break; + case 0x30: /* SETMO - undocumented? */ + bitwise(bits, 0xffff); + set_cf(0); + set_of_rotate(bits); + set_af(0); + set_pzs(bits); + break; + case 0x38: /* SAR */ + set_cf((cpu_data & 1) != 0); + cpu_data >>= 1; + if (!(opcode & 1)) + cpu_data |= (cpu_dest & 0x80); + else + cpu_data |= (cpu_dest & 0x8000); + set_of_rotate(bits); + set_af(0); + set_pzs(bits); + break; + } + if ((opcode & 2) != 0) + wait(4, 0); + --cpu_src; + } + access(17, bits); + set_ea(cpu_data); + break; - case 0xD4: /*AAM*/ - wait(1, 0); - cpu_src = pfq_fetchb(); - if (x86_div(AL, 0)) - set_pzs(16); - break; - case 0xD5: /*AAD*/ - wait(1, 0); - mul(pfq_fetchb(), AH); - cpu_dest = AL; - cpu_src = cpu_data; - add(8); - AL = cpu_data; - AH = 0x00; - break; - case 0xD6: /*SALC*/ - wait(1, 0); - AL = (cpu_state.flags & C_FLAG) ? 0xff : 0x00; - wait(1, 0); - break; - case 0xD7: /*XLATB*/ - cpu_state.eaaddr = (BX + AL) & 0xffff; - access(4, 8); - AL = readmemb((ovr_seg ? *ovr_seg : ds) + cpu_state.eaaddr); - wait(1, 0); - break; + case 0xD4: /*AAM*/ + wait(1, 0); + cpu_src = pfq_fetchb(); + if (x86_div(AL, 0)) + set_pzs(16); + break; + case 0xD5: /*AAD*/ + wait(1, 0); + mul(pfq_fetchb(), AH); + cpu_dest = AL; + cpu_src = cpu_data; + add(8); + AL = cpu_data; + AH = 0x00; + break; + case 0xD6: /*SALC*/ + wait(1, 0); + AL = (cpu_state.flags & C_FLAG) ? 0xff : 0x00; + wait(1, 0); + break; + case 0xD7: /*XLATB*/ + cpu_state.eaaddr = (BX + AL) & 0xffff; + access(4, 8); + AL = readmemb((ovr_seg ? *ovr_seg : ds) + cpu_state.eaaddr); + wait(1, 0); + break; - case 0xD8: case 0xD9: case 0xDA: case 0xDB: - case 0xDD: case 0xDC: case 0xDE: case 0xDF: - /* esc i, r, rm */ - do_mod_rm(); - access(54, 16); - tempw = cpu_state.pc; - if (!hasfpu) - geteaw(); - else switch(opcode) { - case 0xD8: - ops_fpu_8087_d8[(rmdat >> 3) & 0x1f]((uint32_t) rmdat); - break; - case 0xD9: - ops_fpu_8087_d9[rmdat & 0xff]((uint32_t) rmdat); - break; - case 0xDA: - ops_fpu_8087_da[rmdat & 0xff]((uint32_t) rmdat); - break; - case 0xDB: - ops_fpu_8087_db[rmdat & 0xff]((uint32_t) rmdat); - break; - case 0xDC: - ops_fpu_8087_dc[(rmdat >> 3) & 0x1f]((uint32_t) rmdat); - break; - case 0xDD: - ops_fpu_8087_dd[rmdat & 0xff]((uint32_t) rmdat); - break; - case 0xDE: - ops_fpu_8087_de[rmdat & 0xff]((uint32_t) rmdat); - break; - case 0xDF: - ops_fpu_8087_df[rmdat & 0xff]((uint32_t) rmdat); - break; - } - cpu_state.pc = tempw; /* Do this as the x87 code advances it, which is needed on - the 286+ core, but not here. */ - wait(1, 0); - if (cpu_mod != 3) - wait(2, 0); - break; + case 0xD8: + case 0xD9: + case 0xDA: + case 0xDB: + case 0xDD: + case 0xDC: + case 0xDE: + case 0xDF: + /* esc i, r, rm */ + do_mod_rm(); + access(54, 16); + tempw = cpu_state.pc; + if (!hasfpu) + geteaw(); + else + switch (opcode) { + case 0xD8: + ops_fpu_8087_d8[(rmdat >> 3) & 0x1f]((uint32_t) rmdat); + break; + case 0xD9: + ops_fpu_8087_d9[rmdat & 0xff]((uint32_t) rmdat); + break; + case 0xDA: + ops_fpu_8087_da[rmdat & 0xff]((uint32_t) rmdat); + break; + case 0xDB: + ops_fpu_8087_db[rmdat & 0xff]((uint32_t) rmdat); + break; + case 0xDC: + ops_fpu_8087_dc[(rmdat >> 3) & 0x1f]((uint32_t) rmdat); + break; + case 0xDD: + ops_fpu_8087_dd[rmdat & 0xff]((uint32_t) rmdat); + break; + case 0xDE: + ops_fpu_8087_de[rmdat & 0xff]((uint32_t) rmdat); + break; + case 0xDF: + ops_fpu_8087_df[rmdat & 0xff]((uint32_t) rmdat); + break; + } + cpu_state.pc = tempw; /* Do this as the x87 code advances it, which is needed on + the 286+ core, but not here. */ + wait(1, 0); + if (cpu_mod != 3) + wait(2, 0); + break; - case 0xE0: case 0xE1: case 0xE2: case 0xE3: - /* LOOP */ - wait(3, 0); - cpu_data = pfq_fetchb(); - if (opcode != 0xe2) - wait(1, 0); - if (opcode != 0xe3) { - --CX; - oldc = (CX != 0); - switch (opcode) { - case 0xE0: - if (cpu_state.flags & Z_FLAG) - oldc = 0; - break; - case 0xE1: - if (!(cpu_state.flags & Z_FLAG)) - oldc = 0; - break; - } - } else - oldc = (CX == 0); - if (oldc) - jump_short(); - break; + case 0xE0: + case 0xE1: + case 0xE2: + case 0xE3: + /* LOOP */ + wait(3, 0); + cpu_data = pfq_fetchb(); + if (opcode != 0xe2) + wait(1, 0); + if (opcode != 0xe3) { + --CX; + oldc = (CX != 0); + switch (opcode) { + case 0xE0: + if (cpu_state.flags & Z_FLAG) + oldc = 0; + break; + case 0xE1: + if (!(cpu_state.flags & Z_FLAG)) + oldc = 0; + break; + } + } else + oldc = (CX == 0); + if (oldc) + jump_short(); + break; - case 0xE4: case 0xE5: case 0xE6: case 0xE7: - case 0xEC: case 0xED: case 0xEE: case 0xEF: - bits = 8 << (opcode & 1); - if ((opcode & 0x0e) != 0x0c) - wait(1, 0); - if ((opcode & 8) == 0) - cpu_data = pfq_fetchb(); - else - cpu_data = DX; - cpu_state.eaaddr = cpu_data; - if ((opcode & 2) == 0) { - access(3, bits); - if (opcode & 1) - cpu_io(16, 0, cpu_data); - else - cpu_io(8, 0, cpu_data); - wait(1, 0); - } else { - if ((opcode & 8) == 0) - access(8, bits); - else - access(9, bits); - if (opcode & 1) - cpu_io(16, 1, cpu_data); - else - cpu_io(8, 1, cpu_data); - } - break; + case 0xE4: + case 0xE5: + case 0xE6: + case 0xE7: + case 0xEC: + case 0xED: + case 0xEE: + case 0xEF: + bits = 8 << (opcode & 1); + if ((opcode & 0x0e) != 0x0c) + wait(1, 0); + if ((opcode & 8) == 0) + cpu_data = pfq_fetchb(); + else + cpu_data = DX; + cpu_state.eaaddr = cpu_data; + if ((opcode & 2) == 0) { + access(3, bits); + if (opcode & 1) + cpu_io(16, 0, cpu_data); + else + cpu_io(8, 0, cpu_data); + wait(1, 0); + } else { + if ((opcode & 8) == 0) + access(8, bits); + else + access(9, bits); + if (opcode & 1) + cpu_io(16, 1, cpu_data); + else + cpu_io(8, 1, cpu_data); + } + break; - case 0xE8: /*CALL rel 16*/ - wait(1, 0); - cpu_state.oldpc = jump_near(); - access(34, 8); - push((uint16_t *) &(cpu_state.oldpc)); - break; - case 0xE9: /*JMP rel 16*/ - wait(1, 0); - jump_near(); - break; - case 0xEA: /*JMP far*/ - wait(1, 0); - addr = pfq_fetchw(); - wait(1, 0); - tempw = pfq_fetchw(); - load_cs(tempw); - access(70, 8); - pfq_clear(); - set_ip(addr); - break; - case 0xEB: /*JMP rel*/ - wait(1, 0); - cpu_data = (int8_t) pfq_fetchb(); - jump_short(); - wait(1, 0); - break; + case 0xE8: /*CALL rel 16*/ + wait(1, 0); + cpu_state.oldpc = jump_near(); + access(34, 8); + push((uint16_t *) &(cpu_state.oldpc)); + break; + case 0xE9: /*JMP rel 16*/ + wait(1, 0); + jump_near(); + break; + case 0xEA: /*JMP far*/ + wait(1, 0); + addr = pfq_fetchw(); + wait(1, 0); + tempw = pfq_fetchw(); + load_cs(tempw); + access(70, 8); + pfq_clear(); + set_ip(addr); + break; + case 0xEB: /*JMP rel*/ + wait(1, 0); + cpu_data = (int8_t) pfq_fetchb(); + jump_short(); + wait(1, 0); + break; - case 0xF0: case 0xF1: /*LOCK - F1 is alias*/ - in_lock = 1; - wait(1, 0); - completed = 0; - break; + case 0xF0: + case 0xF1: /*LOCK - F1 is alias*/ + in_lock = 1; + wait(1, 0); + completed = 0; + break; - case 0xF2: /*REPNE*/ - case 0xF3: /*REPE*/ - wait(1, 0); - in_rep = (opcode == 0xf2 ? 1 : 2); - completed = 0; - break; + case 0xF2: /*REPNE*/ + case 0xF3: /*REPE*/ + wait(1, 0); + in_rep = (opcode == 0xf2 ? 1 : 2); + completed = 0; + break; - case 0xF4: /*HLT*/ - if (!repeating) { - wait(1, 0); - pfq_clear(); - } - wait(1, 0); - if (irq_pending()) { - wait(cycles & 1, 0); - check_interrupts(); - } else { - repeating = 1; - completed = 0; - clock_end(); - } - break; - case 0xF5: /*CMC*/ - wait(1, 0); - cpu_state.flags ^= C_FLAG; - break; + case 0xF4: /*HLT*/ + if (!repeating) { + wait(1, 0); + pfq_clear(); + } + wait(1, 0); + if (irq_pending()) { + wait(cycles & 1, 0); + check_interrupts(); + } else { + repeating = 1; + completed = 0; + clock_end(); + } + break; + case 0xF5: /*CMC*/ + wait(1, 0); + cpu_state.flags ^= C_FLAG; + break; - case 0xF6: case 0xF7: - bits = 8 << (opcode & 1); - do_mod_rm(); - access(55, bits); - cpu_data = get_ea(); - switch (rmdat & 0x38) { - case 0x00: case 0x08: - /* TEST */ - wait(2, 0); - if (cpu_mod != 3) - wait(1, 0); - cpu_src = pfq_fetch(); - wait(1, 0); - test(bits, cpu_data, cpu_src); - if (cpu_mod != 3) - wait(1, 0); - break; - case 0x10: /* NOT */ - case 0x18: /* NEG */ - wait(2, 0); - if ((rmdat & 0x38) == 0x10) - cpu_data = ~cpu_data; - else { - cpu_src = cpu_data; - cpu_dest = 0; - sub(bits); - } - access(18, bits); - set_ea(cpu_data); - break; - case 0x20: /* MUL */ - case 0x28: /* IMUL */ - wait(1, 0); - mul(get_accum(bits), cpu_data); - if (opcode & 1) { - AX = cpu_data; - DX = cpu_dest; - set_co_mul(bits, DX != ((AX & 0x8000) == 0 || (rmdat & 0x38) == 0x20 ? 0 : 0xffff)); - cpu_data = DX; - } else { - AL = (uint8_t) cpu_data; - AH = (uint8_t) cpu_dest; - set_co_mul(bits, AH != ((AL & 0x80) == 0 || (rmdat & 0x38) == 0x20 ? 0 : 0xff)); - cpu_data = AH; - } - /* NOTE: When implementing the V20, care should be taken to not change - the zero flag. */ - set_sf(bits); - set_pf(); - if (cpu_mod != 3) - wait(1, 0); - break; - case 0x30: /* DIV */ - case 0x38: /* IDIV */ - if (cpu_mod != 3) - wait(1, 0); - cpu_src = cpu_data; - if (x86_div(AL, AH)) - wait(1, 0); - break; - } - break; + case 0xF6: + case 0xF7: + bits = 8 << (opcode & 1); + do_mod_rm(); + access(55, bits); + cpu_data = get_ea(); + switch (rmdat & 0x38) { + case 0x00: + case 0x08: + /* TEST */ + wait(2, 0); + if (cpu_mod != 3) + wait(1, 0); + cpu_src = pfq_fetch(); + wait(1, 0); + test(bits, cpu_data, cpu_src); + if (cpu_mod != 3) + wait(1, 0); + break; + case 0x10: /* NOT */ + case 0x18: /* NEG */ + wait(2, 0); + if ((rmdat & 0x38) == 0x10) + cpu_data = ~cpu_data; + else { + cpu_src = cpu_data; + cpu_dest = 0; + sub(bits); + } + access(18, bits); + set_ea(cpu_data); + break; + case 0x20: /* MUL */ + case 0x28: /* IMUL */ + wait(1, 0); + mul(get_accum(bits), cpu_data); + if (opcode & 1) { + AX = cpu_data; + DX = cpu_dest; + set_co_mul(bits, DX != ((AX & 0x8000) == 0 || (rmdat & 0x38) == 0x20 ? 0 : 0xffff)); + cpu_data = DX; + } else { + AL = (uint8_t) cpu_data; + AH = (uint8_t) cpu_dest; + set_co_mul(bits, AH != ((AL & 0x80) == 0 || (rmdat & 0x38) == 0x20 ? 0 : 0xff)); + cpu_data = AH; + } + /* NOTE: When implementing the V20, care should be taken to not change + the zero flag. */ + set_sf(bits); + set_pf(); + if (cpu_mod != 3) + wait(1, 0); + break; + case 0x30: /* DIV */ + case 0x38: /* IDIV */ + if (cpu_mod != 3) + wait(1, 0); + cpu_src = cpu_data; + if (x86_div(AL, AH)) + wait(1, 0); + break; + } + break; - case 0xF8: case 0xF9: - /* CLCSTC */ - wait(1, 0); - set_cf(opcode & 1); - break; - case 0xFA: case 0xFB: - /* CLISTI */ - wait(1, 0); - set_if(opcode & 1); - break; - case 0xFC: case 0xFD: - /* CLDSTD */ - wait(1, 0); - set_df(opcode & 1); - break; + case 0xF8: + case 0xF9: + /* CLCSTC */ + wait(1, 0); + set_cf(opcode & 1); + break; + case 0xFA: + case 0xFB: + /* CLISTI */ + wait(1, 0); + set_if(opcode & 1); + break; + case 0xFC: + case 0xFD: + /* CLDSTD */ + wait(1, 0); + set_df(opcode & 1); + break; - case 0xFE: case 0xFF: - /* misc */ - bits = 8 << (opcode & 1); - do_mod_rm(); - access(56, bits); - read_ea(((rmdat & 0x38) == 0x18) || ((rmdat & 0x38) == 0x28), bits); - switch (rmdat & 0x38) { - case 0x00: /* INC rm */ - case 0x08: /* DEC rm */ - cpu_dest = cpu_data; - cpu_src = 1; - if ((rmdat & 0x38) == 0x00) { - cpu_data = cpu_dest + cpu_src; - set_of_add(bits); - } else { - cpu_data = cpu_dest - cpu_src; - set_of_sub(bits); - } - do_af(); - set_pzs(bits); - wait(2, 0); - access(19, bits); - set_ea(cpu_data); - break; - case 0x10: /* CALL rm */ - cpu_data_opff_rm(); - access(63, bits); - wait(1, 0); - pfq_clear(); - wait(4, 0); - if (cpu_mod != 3) - wait(1, 0); - wait(1, 0); /* Wait. */ - cpu_state.oldpc = cpu_state.pc; - set_ip(cpu_data); - wait(2, 0); - access(35, bits); - push((uint16_t *) &(cpu_state.oldpc)); - break; - case 0x18: /* CALL rmd */ - new_ip = cpu_data; - access(58, bits); - read_ea2(bits); - if (!(opcode & 1)) - cpu_data |= 0xff00; - new_cs = cpu_data; - access(36, bits); - push(&(CS)); - access(64, bits); - wait(4, 0); - cpu_state.oldpc = cpu_state.pc; - load_cs(new_cs); - set_ip(new_ip); - access(37, bits); - push((uint16_t *) &(cpu_state.oldpc)); - break; - case 0x20: /* JMP rm */ - cpu_data_opff_rm(); - access(65, bits); - set_ip(cpu_data); - break; - case 0x28: /* JMP rmd */ - new_ip = cpu_data; - access(59, bits); - read_ea2(bits); - if (!(opcode & 1)) - cpu_data |= 0xff00; - new_cs = cpu_data; - load_cs(new_cs); - access(66, bits); - set_ip(new_ip); - break; - case 0x30: /* PUSH rm */ - case 0x38: - if (cpu_mod != 3) - wait(1, 0); - access(38, bits); - push((uint16_t *) &(cpu_data)); - break; - } - break; + case 0xFE: + case 0xFF: + /* misc */ + bits = 8 << (opcode & 1); + do_mod_rm(); + access(56, bits); + read_ea(((rmdat & 0x38) == 0x18) || ((rmdat & 0x38) == 0x28), bits); + switch (rmdat & 0x38) { + case 0x00: /* INC rm */ + case 0x08: /* DEC rm */ + cpu_dest = cpu_data; + cpu_src = 1; + if ((rmdat & 0x38) == 0x00) { + cpu_data = cpu_dest + cpu_src; + set_of_add(bits); + } else { + cpu_data = cpu_dest - cpu_src; + set_of_sub(bits); + } + do_af(); + set_pzs(bits); + wait(2, 0); + access(19, bits); + set_ea(cpu_data); + break; + case 0x10: /* CALL rm */ + cpu_data_opff_rm(); + access(63, bits); + wait(1, 0); + pfq_clear(); + wait(4, 0); + if (cpu_mod != 3) + wait(1, 0); + wait(1, 0); /* Wait. */ + cpu_state.oldpc = cpu_state.pc; + set_ip(cpu_data); + wait(2, 0); + access(35, bits); + push((uint16_t *) &(cpu_state.oldpc)); + break; + case 0x18: /* CALL rmd */ + new_ip = cpu_data; + access(58, bits); + read_ea2(bits); + if (!(opcode & 1)) + cpu_data |= 0xff00; + new_cs = cpu_data; + access(36, bits); + push(&(CS)); + access(64, bits); + wait(4, 0); + cpu_state.oldpc = cpu_state.pc; + load_cs(new_cs); + set_ip(new_ip); + access(37, bits); + push((uint16_t *) &(cpu_state.oldpc)); + break; + case 0x20: /* JMP rm */ + cpu_data_opff_rm(); + access(65, bits); + set_ip(cpu_data); + break; + case 0x28: /* JMP rmd */ + new_ip = cpu_data; + access(59, bits); + read_ea2(bits); + if (!(opcode & 1)) + cpu_data |= 0xff00; + new_cs = cpu_data; + load_cs(new_cs); + access(66, bits); + set_ip(new_ip); + break; + case 0x30: /* PUSH rm */ + case 0x38: + if (cpu_mod != 3) + wait(1, 0); + access(38, bits); + push((uint16_t *) &(cpu_data)); + break; + } + break; - default: - x808x_log("Illegal opcode: %02X\n", opcode); - pfq_fetchb(); - wait(8, 0); - break; - } + default: + x808x_log("Illegal opcode: %02X\n", opcode); + pfq_fetchb(); + wait(8, 0); + break; + } - if (completed) { - repeating = 0; - ovr_seg = NULL; - in_rep = 0; - if (in_lock) - clear_lock = 1; - clock_end(); - check_interrupts(); + if (completed) { + repeating = 0; + ovr_seg = NULL; + in_rep = 0; + if (in_lock) + clear_lock = 1; + clock_end(); + check_interrupts(); - if (noint) - noint = 0; + if (noint) + noint = 0; - cpu_alu_op = 0; - } + cpu_alu_op = 0; + } #ifdef USE_GDBSTUB - if (gdbstub_instruction()) - return; + if (gdbstub_instruction()) + return; #endif } } diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index 7ff81607f..7a35e2589 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -38,7 +38,7 @@ #include <86box/pci.h> #include <86box/gdbstub.h> #ifdef USE_DYNAREC -# include "codegen.h" +# include "codegen.h" #endif #include "x87_timings.h" @@ -49,318 +49,302 @@ #define CCR3_SMI_LOCK (1 << 0) #define CCR3_NMI_EN (1 << 1) - enum { - CPUID_FPU = (1 << 0), - CPUID_VME = (1 << 1), - CPUID_PSE = (1 << 3), - CPUID_TSC = (1 << 4), - CPUID_MSR = (1 << 5), - CPUID_PAE = (1 << 6), - CPUID_MCE = (1 << 7), + CPUID_FPU = (1 << 0), + CPUID_VME = (1 << 1), + CPUID_PSE = (1 << 3), + CPUID_TSC = (1 << 4), + CPUID_MSR = (1 << 5), + CPUID_PAE = (1 << 6), + CPUID_MCE = (1 << 7), CPUID_CMPXCHG8B = (1 << 8), - CPUID_AMDSEP = (1 << 10), - CPUID_SEP = (1 << 11), - CPUID_MTRR = (1 << 12), - CPUID_MCA = (1 << 14), - CPUID_CMOV = (1 << 15), - CPUID_MMX = (1 << 23), - CPUID_FXSR = (1 << 24) + CPUID_AMDSEP = (1 << 10), + CPUID_SEP = (1 << 11), + CPUID_MTRR = (1 << 12), + CPUID_MCA = (1 << 14), + CPUID_CMOV = (1 << 15), + CPUID_MMX = (1 << 23), + CPUID_FXSR = (1 << 24) }; /*Addition flags returned by CPUID function 0x80000001*/ -#define CPUID_3DNOW (1UL << 31UL) - +#define CPUID_3DNOW (1UL << 31UL) /* Make sure this is as low as possible. */ -cpu_state_t cpu_state; +cpu_state_t cpu_state; #ifdef USE_DYNAREC -const OpFn *x86_dynarec_opcodes, *x86_dynarec_opcodes_0f, - *x86_dynarec_opcodes_d8_a16, *x86_dynarec_opcodes_d8_a32, - *x86_dynarec_opcodes_d9_a16, *x86_dynarec_opcodes_d9_a32, - *x86_dynarec_opcodes_da_a16, *x86_dynarec_opcodes_da_a32, - *x86_dynarec_opcodes_db_a16, *x86_dynarec_opcodes_db_a32, - *x86_dynarec_opcodes_dc_a16, *x86_dynarec_opcodes_dc_a32, - *x86_dynarec_opcodes_dd_a16, *x86_dynarec_opcodes_dd_a32, - *x86_dynarec_opcodes_de_a16, *x86_dynarec_opcodes_de_a32, - *x86_dynarec_opcodes_df_a16, *x86_dynarec_opcodes_df_a32, - *x86_dynarec_opcodes_REPE, *x86_dynarec_opcodes_REPNE, - *x86_dynarec_opcodes_3DNOW; +const OpFn *x86_dynarec_opcodes, *x86_dynarec_opcodes_0f, + *x86_dynarec_opcodes_d8_a16, *x86_dynarec_opcodes_d8_a32, + *x86_dynarec_opcodes_d9_a16, *x86_dynarec_opcodes_d9_a32, + *x86_dynarec_opcodes_da_a16, *x86_dynarec_opcodes_da_a32, + *x86_dynarec_opcodes_db_a16, *x86_dynarec_opcodes_db_a32, + *x86_dynarec_opcodes_dc_a16, *x86_dynarec_opcodes_dc_a32, + *x86_dynarec_opcodes_dd_a16, *x86_dynarec_opcodes_dd_a32, + *x86_dynarec_opcodes_de_a16, *x86_dynarec_opcodes_de_a32, + *x86_dynarec_opcodes_df_a16, *x86_dynarec_opcodes_df_a32, + *x86_dynarec_opcodes_REPE, *x86_dynarec_opcodes_REPNE, + *x86_dynarec_opcodes_3DNOW; #endif -const OpFn *x86_opcodes, *x86_opcodes_0f, - *x86_opcodes_d8_a16, *x86_opcodes_d8_a32, - *x86_opcodes_d9_a16, *x86_opcodes_d9_a32, - *x86_opcodes_da_a16, *x86_opcodes_da_a32, - *x86_opcodes_db_a16, *x86_opcodes_db_a32, - *x86_opcodes_dc_a16, *x86_opcodes_dc_a32, - *x86_opcodes_dd_a16, *x86_opcodes_dd_a32, - *x86_opcodes_de_a16, *x86_opcodes_de_a32, - *x86_opcodes_df_a16, *x86_opcodes_df_a32, - *x86_opcodes_REPE, *x86_opcodes_REPNE, - *x86_opcodes_3DNOW; +const OpFn *x86_opcodes, *x86_opcodes_0f, + *x86_opcodes_d8_a16, *x86_opcodes_d8_a32, + *x86_opcodes_d9_a16, *x86_opcodes_d9_a32, + *x86_opcodes_da_a16, *x86_opcodes_da_a32, + *x86_opcodes_db_a16, *x86_opcodes_db_a32, + *x86_opcodes_dc_a16, *x86_opcodes_dc_a32, + *x86_opcodes_dd_a16, *x86_opcodes_dd_a32, + *x86_opcodes_de_a16, *x86_opcodes_de_a32, + *x86_opcodes_df_a16, *x86_opcodes_df_a32, + *x86_opcodes_REPE, *x86_opcodes_REPNE, + *x86_opcodes_3DNOW; -uint16_t cpu_fast_off_count, cpu_fast_off_val; -uint16_t temp_seg_data[4] = {0, 0, 0, 0}; +uint16_t cpu_fast_off_count, cpu_fast_off_val; +uint16_t temp_seg_data[4] = { 0, 0, 0, 0 }; -int isa_cycles, cpu_inited, +int isa_cycles, cpu_inited, - cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l, - cpu_prefetch_cycles, cpu_prefetch_width, cpu_mem_prefetch_cycles, cpu_rom_prefetch_cycles, - cpu_waitstates, cpu_cache_int_enabled, cpu_cache_ext_enabled, - cpu_isa_speed, cpu_pci_speed, cpu_isa_pci_div, cpu_agp_speed, cpu_alt_reset, + cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l, + cpu_prefetch_cycles, cpu_prefetch_width, cpu_mem_prefetch_cycles, cpu_rom_prefetch_cycles, + cpu_waitstates, cpu_cache_int_enabled, cpu_cache_ext_enabled, + cpu_isa_speed, cpu_pci_speed, cpu_isa_pci_div, cpu_agp_speed, cpu_alt_reset, - cpu_override, cpu_effective, cpu_multi, cpu_16bitbus, cpu_64bitbus, cpu_busspeed, - cpu_cyrix_alignment, CPUID, + cpu_override, cpu_effective, cpu_multi, cpu_16bitbus, cpu_64bitbus, cpu_busspeed, + cpu_cyrix_alignment, CPUID, - is286, is386, is6117, is486 = 1, - cpu_isintel, cpu_iscyrix, hascache, isibm486, israpidcad, is_vpc, - is_am486, is_am486dxl, is_pentium, is_k5, is_k6, is_p6, is_cxsmm, hasfpu, + is286, is386, is6117, is486 = 1, + cpu_isintel, cpu_iscyrix, hascache, isibm486, israpidcad, is_vpc, + is_am486, is_am486dxl, is_pentium, is_k5, is_k6, is_p6, is_cxsmm, hasfpu, - timing_rr, timing_mr, timing_mrl, timing_rm, timing_rml, - timing_mm, timing_mml, timing_bt, timing_bnt, - timing_int, timing_int_rm, timing_int_v86, timing_int_pm, - timing_int_pm_outer, timing_iret_rm, timing_iret_v86, timing_iret_pm, - timing_iret_pm_outer, timing_call_rm, timing_call_pm, timing_call_pm_gate, - timing_call_pm_gate_inner, timing_retf_rm, timing_retf_pm, timing_retf_pm_outer, - timing_jmp_rm, timing_jmp_pm, timing_jmp_pm_gate, timing_misaligned; -uint32_t cpu_features, cpu_fast_off_flags; + timing_rr, timing_mr, timing_mrl, timing_rm, timing_rml, + timing_mm, timing_mml, timing_bt, timing_bnt, + timing_int, timing_int_rm, timing_int_v86, timing_int_pm, + timing_int_pm_outer, timing_iret_rm, timing_iret_v86, timing_iret_pm, + timing_iret_pm_outer, timing_call_rm, timing_call_pm, timing_call_pm_gate, + timing_call_pm_gate_inner, timing_retf_rm, timing_retf_pm, timing_retf_pm_outer, + timing_jmp_rm, timing_jmp_pm, timing_jmp_pm_gate, timing_misaligned; +uint32_t cpu_features, cpu_fast_off_flags; -uint32_t _tr[8] = {0, 0, 0, 0, 0, 0, 0, 0}; -uint32_t cache_index = 0; -uint8_t _cache[2048]; +uint32_t _tr[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; +uint32_t cache_index = 0; +uint8_t _cache[2048]; -uint64_t cpu_CR4_mask, tsc = 0; -uint64_t pmc[2] = {0, 0}; +uint64_t cpu_CR4_mask, tsc = 0; +uint64_t pmc[2] = { 0, 0 }; -double cpu_dmulti; +double cpu_dmulti; -msr_t msr; +msr_t msr; -cyrix_t cyrix; +cyrix_t cyrix; -cpu_family_t *cpu_f; -CPU *cpu_s; +cpu_family_t *cpu_f; +CPU *cpu_s; -uint8_t do_translate = 0, do_translate2 = 0; +uint8_t do_translate = 0, do_translate2 = 0; -void (*cpu_exec)(int cycs); +void (*cpu_exec)(int cycs); +static uint8_t ccr0, ccr1, ccr2, ccr3, ccr4, ccr5, ccr6; -static uint8_t ccr0, ccr1, ccr2, ccr3, ccr4, ccr5, ccr6; - -static int cyrix_addr; - - -static void cpu_write(uint16_t addr, uint8_t val, void *priv); -static uint8_t cpu_read(uint16_t addr, void *priv); +static int cyrix_addr; +static void cpu_write(uint16_t addr, uint8_t val, void *priv); +static uint8_t cpu_read(uint16_t addr, void *priv); #ifdef ENABLE_CPU_LOG int cpu_do_log = ENABLE_CPU_LOG; - void cpu_log(const char *fmt, ...) { va_list ap; if (cpu_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define cpu_log(fmt, ...) +# define cpu_log(fmt, ...) #endif - int cpu_has_feature(int feature) { return cpu_features & feature; } - void cpu_dynamic_switch(int new_cpu) { int c; if (cpu_effective == new_cpu) - return; + return; - c = cpu; + c = cpu; cpu = new_cpu; cpu_set(); pc_speed_changed(); cpu = c; } - void cpu_set_edx(void) { EDX = cpu_s->edx_reset; } - cpu_family_t * cpu_get_family(const char *internal_name) { int c = 0; while (cpu_families[c].package) { - if (!strcmp(internal_name, cpu_families[c].internal_name)) - return (cpu_family_t *) &cpu_families[c]; - c++; + if (!strcmp(internal_name, cpu_families[c].internal_name)) + return (cpu_family_t *) &cpu_families[c]; + c++; } return NULL; } - uint8_t cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine) { const machine_t *machine_s = &machines[machine]; - const CPU *cpu_s = &cpu_family->cpus[cpu]; - uint32_t packages, bus_speed; - uint8_t i; - double multi; + const CPU *cpu_s = &cpu_family->cpus[cpu]; + uint32_t packages, bus_speed; + uint8_t i; + double multi; /* Full override. */ if (cpu_override > 1) - return 1; + return 1; /* Add implicit CPU package compatibility. */ packages = machine_s->cpu.package; if (packages & CPU_PKG_SOCKET3) - packages |= CPU_PKG_SOCKET1; + packages |= CPU_PKG_SOCKET1; else if (packages & CPU_PKG_SLOT1) - packages |= CPU_PKG_SOCKET370; + packages |= CPU_PKG_SOCKET370; /* Package type. */ if (!(cpu_family->package & packages)) - return 0; + return 0; /* Partial override. */ if (cpu_override) - return 1; + return 1; /* Check CPU blocklist. */ if (machine_s->cpu.block) { - i = 0; + i = 0; - while (machine_s->cpu.block[i]) { - if (machine_s->cpu.block[i++] == cpu_s->cpu_type) - return 0; - } + while (machine_s->cpu.block[i]) { + if (machine_s->cpu.block[i++] == cpu_s->cpu_type) + return 0; + } } bus_speed = cpu_s->rspeed / cpu_s->multi; /* Minimum bus speed with ~0.84 MHz (for 8086) tolerance. */ if (machine_s->cpu.min_bus && (bus_speed < (machine_s->cpu.min_bus - 840907))) - return 0; + return 0; /* Maximum bus speed with ~0.84 MHz (for 8086) tolerance. */ if (machine_s->cpu.max_bus && (bus_speed > (machine_s->cpu.max_bus + 840907))) - return 0; + return 0; /* Minimum voltage with 0.1V tolerance. */ if (machine_s->cpu.min_voltage && (cpu_s->voltage < (machine_s->cpu.min_voltage - 100))) - return 0; + return 0; /* Maximum voltage with 0.1V tolerance. */ if (machine_s->cpu.max_voltage && (cpu_s->voltage > (machine_s->cpu.max_voltage + 100))) - return 0; + return 0; /* Account for CPUs which use a different internal multiplier than specified by jumpers. */ multi = cpu_s->multi; /* Don't care about multiplier compatibility on fixed multiplier CPUs. */ if (cpu_s->cpu_flags & CPU_FIXED_MULTIPLIER) - return 1; + return 1; else if (cpu_family->package & CPU_PKG_SOCKET5_7) { - if ((multi == 1.5) && (cpu_s->cpu_type == CPU_5K86) && (machine_s->cpu.min_multi > 1.5)) /* K5 5k86 */ - multi = 2.0; - else if (multi == 1.75) /* K5 5k86 */ - multi = 2.5; - else if (multi == 2.0) { - if (cpu_s->cpu_type == CPU_5K86) /* K5 5k86 */ - multi = 3.0; - /* K6-2+ / K6-3+ */ - else if ((cpu_s->cpu_type == CPU_K6_2P) || (cpu_s->cpu_type == CPU_K6_3P)) - multi = 2.5; - else if (((cpu_s->cpu_type == CPU_WINCHIP) || (cpu_s->cpu_type == CPU_WINCHIP2)) && - (machine_s->cpu.min_multi > 2.0)) /* WinChip (2) */ - multi = 2.5; - } - else if (multi == (7.0 / 3.0)) /* WinChip 2A - 2.33x */ - multi = 5.0; - else if (multi == (8.0 / 3.0)) /* WinChip 2A - 2.66x */ - multi = 5.5; - else if ((multi == 3.0) && (cpu_s->cpu_type == CPU_Cx6x86 || cpu_s->cpu_type == CPU_Cx6x86L)) /* 6x86(L) */ - multi = 1.5; - else if (multi == (10.0 / 3.0)) /* WinChip 2A - 3.33x */ - multi = 2.0; - else if (multi == 3.5) /* standard set by the Pentium MMX */ - multi = 1.5; - else if (multi == 4.0) { - /* WinChip (2) */ - if ((cpu_s->cpu_type == CPU_WINCHIP) || (cpu_s->cpu_type == CPU_WINCHIP2)) { - if (machine_s->cpu.min_multi >= 1.5) - multi = 1.5; - else if (machine_s->cpu.min_multi >= 3.5) - multi = 3.5; - else if (machine_s->cpu.min_multi >= 4.5) - multi = 4.5; - } else if ((cpu_s->cpu_type == CPU_Cx6x86) || (cpu_s->cpu_type == CPU_Cx6x86L)) /* 6x86(L) */ - multi = 3.0; - } else if ((multi == 5.0) && ((cpu_s->cpu_type == CPU_WINCHIP) || (cpu_s->cpu_type == CPU_WINCHIP2)) && - (machine_s->cpu.min_multi > 5.0)) /* WinChip (2) */ - multi = 5.5; - else if (multi == 6.0) /* K6-2(+) / K6-3(+) */ - multi = 2.0; + if ((multi == 1.5) && (cpu_s->cpu_type == CPU_5K86) && (machine_s->cpu.min_multi > 1.5)) /* K5 5k86 */ + multi = 2.0; + else if (multi == 1.75) /* K5 5k86 */ + multi = 2.5; + else if (multi == 2.0) { + if (cpu_s->cpu_type == CPU_5K86) /* K5 5k86 */ + multi = 3.0; + /* K6-2+ / K6-3+ */ + else if ((cpu_s->cpu_type == CPU_K6_2P) || (cpu_s->cpu_type == CPU_K6_3P)) + multi = 2.5; + else if (((cpu_s->cpu_type == CPU_WINCHIP) || (cpu_s->cpu_type == CPU_WINCHIP2)) && (machine_s->cpu.min_multi > 2.0)) /* WinChip (2) */ + multi = 2.5; + } else if (multi == (7.0 / 3.0)) /* WinChip 2A - 2.33x */ + multi = 5.0; + else if (multi == (8.0 / 3.0)) /* WinChip 2A - 2.66x */ + multi = 5.5; + else if ((multi == 3.0) && (cpu_s->cpu_type == CPU_Cx6x86 || cpu_s->cpu_type == CPU_Cx6x86L)) /* 6x86(L) */ + multi = 1.5; + else if (multi == (10.0 / 3.0)) /* WinChip 2A - 3.33x */ + multi = 2.0; + else if (multi == 3.5) /* standard set by the Pentium MMX */ + multi = 1.5; + else if (multi == 4.0) { + /* WinChip (2) */ + if ((cpu_s->cpu_type == CPU_WINCHIP) || (cpu_s->cpu_type == CPU_WINCHIP2)) { + if (machine_s->cpu.min_multi >= 1.5) + multi = 1.5; + else if (machine_s->cpu.min_multi >= 3.5) + multi = 3.5; + else if (machine_s->cpu.min_multi >= 4.5) + multi = 4.5; + } else if ((cpu_s->cpu_type == CPU_Cx6x86) || (cpu_s->cpu_type == CPU_Cx6x86L)) /* 6x86(L) */ + multi = 3.0; + } else if ((multi == 5.0) && ((cpu_s->cpu_type == CPU_WINCHIP) || (cpu_s->cpu_type == CPU_WINCHIP2)) && (machine_s->cpu.min_multi > 5.0)) /* WinChip (2) */ + multi = 5.5; + else if (multi == 6.0) /* K6-2(+) / K6-3(+) */ + multi = 2.0; } /* Minimum multiplier, */ if (multi < machine_s->cpu.min_multi) - return 0; + return 0; /* Maximum multiplier. */ if (machine_s->cpu.max_multi && (multi > machine_s->cpu.max_multi)) - return 0; + return 0; return 1; } - uint8_t cpu_family_is_eligible(const cpu_family_t *cpu_family, int machine) { int c = 0; while (cpu_family->cpus[c].cpu_type) { - if (cpu_is_eligible(cpu_family, c, machine)) - return 1; - c++; + if (cpu_is_eligible(cpu_family, c, machine)) + return 1; + c++; } return 0; } - void cpu_set(void) { cpu_inited = 1; cpu_effective = cpu; - cpu_s = (CPU *) &cpu_f->cpus[cpu_effective]; + cpu_s = (CPU *) &cpu_f->cpus[cpu_effective]; #ifdef USE_ACYCS acycs = 0; @@ -368,52 +352,46 @@ cpu_set(void) soft_reset_pci = 0; - cpu_alt_reset = 0; + cpu_alt_reset = 0; unmask_a20_in_smm = 0; - CPUID = cpu_s->cpuid_model; - is8086 = (cpu_s->cpu_type > CPU_8088); - is286 = (cpu_s->cpu_type >= CPU_286); - is386 = (cpu_s->cpu_type >= CPU_386SX); - israpidcad = (cpu_s->cpu_type == CPU_RAPIDCAD); - isibm486 = (cpu_s->cpu_type == CPU_IBM386SLC) || (cpu_s->cpu_type == CPU_IBM486SLC) || - (cpu_s->cpu_type == CPU_IBM486BL); - is486 = (cpu_s->cpu_type >= CPU_RAPIDCAD); - is_am486 = (cpu_s->cpu_type == CPU_ENH_Am486DX); - is_am486dxl = (cpu_s->cpu_type == CPU_Am486DXL); + CPUID = cpu_s->cpuid_model; + is8086 = (cpu_s->cpu_type > CPU_8088); + is286 = (cpu_s->cpu_type >= CPU_286); + is386 = (cpu_s->cpu_type >= CPU_386SX); + israpidcad = (cpu_s->cpu_type == CPU_RAPIDCAD); + isibm486 = (cpu_s->cpu_type == CPU_IBM386SLC) || (cpu_s->cpu_type == CPU_IBM486SLC) || (cpu_s->cpu_type == CPU_IBM486BL); + is486 = (cpu_s->cpu_type >= CPU_RAPIDCAD); + is_am486 = (cpu_s->cpu_type == CPU_ENH_Am486DX); + is_am486dxl = (cpu_s->cpu_type == CPU_Am486DXL); - is6117 = !strcmp(cpu_f->manufacturer, "ALi"); + is6117 = !strcmp(cpu_f->manufacturer, "ALi"); - cpu_isintel = !strcmp(cpu_f->manufacturer, "Intel"); - cpu_iscyrix = !strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST"); + cpu_isintel = !strcmp(cpu_f->manufacturer, "Intel"); + cpu_iscyrix = !strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST"); /* SL-Enhanced Intel 486s have the same SMM save state table layout as Pentiums, and the WinChip datasheet claims those are Pentium-compatible as well. AMD Am486DXL/DXL2 also has compatible SMM, or would if not for it's different SMBase*/ - is_pentium = (cpu_isintel && (cpu_s->cpu_type >= CPU_i486SX_SLENH) && (cpu_s->cpu_type < CPU_PENTIUMPRO)) || - !strcmp(cpu_f->manufacturer, "IDT") || (cpu_s->cpu_type == CPU_Am486DXL); - is_k5 = !strcmp(cpu_f->manufacturer, "AMD") && (cpu_s->cpu_type > CPU_ENH_Am486DX) && (cpu_s->cpu_type < CPU_K6); - is_k6 = (cpu_s->cpu_type >= CPU_K6) && !strcmp(cpu_f->manufacturer, "AMD"); + is_pentium = (cpu_isintel && (cpu_s->cpu_type >= CPU_i486SX_SLENH) && (cpu_s->cpu_type < CPU_PENTIUMPRO)) || !strcmp(cpu_f->manufacturer, "IDT") || (cpu_s->cpu_type == CPU_Am486DXL); + is_k5 = !strcmp(cpu_f->manufacturer, "AMD") && (cpu_s->cpu_type > CPU_ENH_Am486DX) && (cpu_s->cpu_type < CPU_K6); + is_k6 = (cpu_s->cpu_type >= CPU_K6) && !strcmp(cpu_f->manufacturer, "AMD"); /* The Samuel 2 datasheet claims it's Celeron-compatible. */ - is_p6 = (cpu_isintel && (cpu_s->cpu_type >= CPU_PENTIUMPRO)) || !strcmp(cpu_f->manufacturer, "VIA"); - is_cxsmm = (!strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST")) && - (cpu_s->cpu_type >= CPU_Cx486S); + is_p6 = (cpu_isintel && (cpu_s->cpu_type >= CPU_PENTIUMPRO)) || !strcmp(cpu_f->manufacturer, "VIA"); + is_cxsmm = (!strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST")) && (cpu_s->cpu_type >= CPU_Cx486S); - cpu_isintel = cpu_isintel || !strcmp(cpu_f->manufacturer, "AMD"); + cpu_isintel = cpu_isintel || !strcmp(cpu_f->manufacturer, "AMD"); - hasfpu = (fpu_type != FPU_NONE); - hascache = (cpu_s->cpu_type >= CPU_486SLC) || (cpu_s->cpu_type == CPU_IBM386SLC) || - (cpu_s->cpu_type == CPU_IBM486SLC) || (cpu_s->cpu_type == CPU_IBM486BL); + hasfpu = (fpu_type != FPU_NONE); + hascache = (cpu_s->cpu_type >= CPU_486SLC) || (cpu_s->cpu_type == CPU_IBM386SLC) || (cpu_s->cpu_type == CPU_IBM486SLC) || (cpu_s->cpu_type == CPU_IBM486BL); - cpu_16bitbus = (cpu_s->cpu_type == CPU_286) || (cpu_s->cpu_type == CPU_386SX) || - (cpu_s->cpu_type == CPU_486SLC) || (cpu_s->cpu_type == CPU_IBM386SLC) || - (cpu_s->cpu_type == CPU_IBM486SLC); + cpu_16bitbus = (cpu_s->cpu_type == CPU_286) || (cpu_s->cpu_type == CPU_386SX) || (cpu_s->cpu_type == CPU_486SLC) || (cpu_s->cpu_type == CPU_IBM386SLC) || (cpu_s->cpu_type == CPU_IBM486SLC); cpu_64bitbus = (cpu_s->cpu_type >= CPU_WINCHIP); if (cpu_s->multi) - cpu_busspeed = cpu_s->rspeed / cpu_s->multi; + cpu_busspeed = cpu_s->rspeed / cpu_s->multi; else - cpu_busspeed = cpu_s->rspeed; - cpu_multi = (int) ceil(cpu_s->multi); + cpu_busspeed = cpu_s->rspeed; + cpu_multi = (int) ceil(cpu_s->multi); cpu_dmulti = cpu_s->multi; ccr0 = ccr1 = ccr2 = ccr3 = ccr4 = ccr5 = ccr6 = 0; @@ -422,9 +400,9 @@ cpu_set(void) isa_cycles = cpu_s->atclk_div; if (cpu_s->rspeed <= 8000000) - cpu_rom_prefetch_cycles = cpu_mem_prefetch_cycles; + cpu_rom_prefetch_cycles = cpu_mem_prefetch_cycles; else - cpu_rom_prefetch_cycles = cpu_s->rspeed / 1000000; + cpu_rom_prefetch_cycles = cpu_s->rspeed / 1000000; cpu_set_isa_pci_div(0); cpu_set_pci_speed(0); @@ -440,85 +418,85 @@ cpu_set(void) #else x86_setopcodes(ops_386, ops_386_0f); #endif - x86_opcodes_REPE = ops_REPE; + x86_opcodes_REPE = ops_REPE; x86_opcodes_REPNE = ops_REPNE; x86_opcodes_3DNOW = ops_3DNOW; #ifdef USE_DYNAREC - x86_dynarec_opcodes_REPE = dynarec_ops_REPE; + x86_dynarec_opcodes_REPE = dynarec_ops_REPE; x86_dynarec_opcodes_REPNE = dynarec_ops_REPNE; x86_dynarec_opcodes_3DNOW = dynarec_ops_3DNOW; #endif if (hasfpu) { #ifdef USE_DYNAREC - x86_dynarec_opcodes_d8_a16 = dynarec_ops_fpu_d8_a16; - x86_dynarec_opcodes_d8_a32 = dynarec_ops_fpu_d8_a32; - x86_dynarec_opcodes_d9_a16 = dynarec_ops_fpu_d9_a16; - x86_dynarec_opcodes_d9_a32 = dynarec_ops_fpu_d9_a32; - x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_da_a16; - x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_da_a32; - x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_db_a16; - x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_db_a32; - x86_dynarec_opcodes_dc_a16 = dynarec_ops_fpu_dc_a16; - x86_dynarec_opcodes_dc_a32 = dynarec_ops_fpu_dc_a32; - x86_dynarec_opcodes_dd_a16 = dynarec_ops_fpu_dd_a16; - x86_dynarec_opcodes_dd_a32 = dynarec_ops_fpu_dd_a32; - x86_dynarec_opcodes_de_a16 = dynarec_ops_fpu_de_a16; - x86_dynarec_opcodes_de_a32 = dynarec_ops_fpu_de_a32; - x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_df_a16; - x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_df_a32; + x86_dynarec_opcodes_d8_a16 = dynarec_ops_fpu_d8_a16; + x86_dynarec_opcodes_d8_a32 = dynarec_ops_fpu_d8_a32; + x86_dynarec_opcodes_d9_a16 = dynarec_ops_fpu_d9_a16; + x86_dynarec_opcodes_d9_a32 = dynarec_ops_fpu_d9_a32; + x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_da_a16; + x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_da_a32; + x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_db_a16; + x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_db_a32; + x86_dynarec_opcodes_dc_a16 = dynarec_ops_fpu_dc_a16; + x86_dynarec_opcodes_dc_a32 = dynarec_ops_fpu_dc_a32; + x86_dynarec_opcodes_dd_a16 = dynarec_ops_fpu_dd_a16; + x86_dynarec_opcodes_dd_a32 = dynarec_ops_fpu_dd_a32; + x86_dynarec_opcodes_de_a16 = dynarec_ops_fpu_de_a16; + x86_dynarec_opcodes_de_a32 = dynarec_ops_fpu_de_a32; + x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_df_a16; + x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_df_a32; #endif - x86_opcodes_d8_a16 = ops_fpu_d8_a16; - x86_opcodes_d8_a32 = ops_fpu_d8_a32; - x86_opcodes_d9_a16 = ops_fpu_d9_a16; - x86_opcodes_d9_a32 = ops_fpu_d9_a32; - x86_opcodes_da_a16 = ops_fpu_da_a16; - x86_opcodes_da_a32 = ops_fpu_da_a32; - x86_opcodes_db_a16 = ops_fpu_db_a16; - x86_opcodes_db_a32 = ops_fpu_db_a32; - x86_opcodes_dc_a16 = ops_fpu_dc_a16; - x86_opcodes_dc_a32 = ops_fpu_dc_a32; - x86_opcodes_dd_a16 = ops_fpu_dd_a16; - x86_opcodes_dd_a32 = ops_fpu_dd_a32; - x86_opcodes_de_a16 = ops_fpu_de_a16; - x86_opcodes_de_a32 = ops_fpu_de_a32; - x86_opcodes_df_a16 = ops_fpu_df_a16; - x86_opcodes_df_a32 = ops_fpu_df_a32; + x86_opcodes_d8_a16 = ops_fpu_d8_a16; + x86_opcodes_d8_a32 = ops_fpu_d8_a32; + x86_opcodes_d9_a16 = ops_fpu_d9_a16; + x86_opcodes_d9_a32 = ops_fpu_d9_a32; + x86_opcodes_da_a16 = ops_fpu_da_a16; + x86_opcodes_da_a32 = ops_fpu_da_a32; + x86_opcodes_db_a16 = ops_fpu_db_a16; + x86_opcodes_db_a32 = ops_fpu_db_a32; + x86_opcodes_dc_a16 = ops_fpu_dc_a16; + x86_opcodes_dc_a32 = ops_fpu_dc_a32; + x86_opcodes_dd_a16 = ops_fpu_dd_a16; + x86_opcodes_dd_a32 = ops_fpu_dd_a32; + x86_opcodes_de_a16 = ops_fpu_de_a16; + x86_opcodes_de_a32 = ops_fpu_de_a32; + x86_opcodes_df_a16 = ops_fpu_df_a16; + x86_opcodes_df_a32 = ops_fpu_df_a32; } else { #ifdef USE_DYNAREC - x86_dynarec_opcodes_d8_a16 = dynarec_ops_nofpu_a16; - x86_dynarec_opcodes_d8_a32 = dynarec_ops_nofpu_a32; - x86_dynarec_opcodes_d9_a16 = dynarec_ops_nofpu_a16; - x86_dynarec_opcodes_d9_a32 = dynarec_ops_nofpu_a32; - x86_dynarec_opcodes_da_a16 = dynarec_ops_nofpu_a16; - x86_dynarec_opcodes_da_a32 = dynarec_ops_nofpu_a32; - x86_dynarec_opcodes_db_a16 = dynarec_ops_nofpu_a16; - x86_dynarec_opcodes_db_a32 = dynarec_ops_nofpu_a32; - x86_dynarec_opcodes_dc_a16 = dynarec_ops_nofpu_a16; - x86_dynarec_opcodes_dc_a32 = dynarec_ops_nofpu_a32; - x86_dynarec_opcodes_dd_a16 = dynarec_ops_nofpu_a16; - x86_dynarec_opcodes_dd_a32 = dynarec_ops_nofpu_a32; - x86_dynarec_opcodes_de_a16 = dynarec_ops_nofpu_a16; - x86_dynarec_opcodes_de_a32 = dynarec_ops_nofpu_a32; - x86_dynarec_opcodes_df_a16 = dynarec_ops_nofpu_a16; - x86_dynarec_opcodes_df_a32 = dynarec_ops_nofpu_a32; + x86_dynarec_opcodes_d8_a16 = dynarec_ops_nofpu_a16; + x86_dynarec_opcodes_d8_a32 = dynarec_ops_nofpu_a32; + x86_dynarec_opcodes_d9_a16 = dynarec_ops_nofpu_a16; + x86_dynarec_opcodes_d9_a32 = dynarec_ops_nofpu_a32; + x86_dynarec_opcodes_da_a16 = dynarec_ops_nofpu_a16; + x86_dynarec_opcodes_da_a32 = dynarec_ops_nofpu_a32; + x86_dynarec_opcodes_db_a16 = dynarec_ops_nofpu_a16; + x86_dynarec_opcodes_db_a32 = dynarec_ops_nofpu_a32; + x86_dynarec_opcodes_dc_a16 = dynarec_ops_nofpu_a16; + x86_dynarec_opcodes_dc_a32 = dynarec_ops_nofpu_a32; + x86_dynarec_opcodes_dd_a16 = dynarec_ops_nofpu_a16; + x86_dynarec_opcodes_dd_a32 = dynarec_ops_nofpu_a32; + x86_dynarec_opcodes_de_a16 = dynarec_ops_nofpu_a16; + x86_dynarec_opcodes_de_a32 = dynarec_ops_nofpu_a32; + x86_dynarec_opcodes_df_a16 = dynarec_ops_nofpu_a16; + x86_dynarec_opcodes_df_a32 = dynarec_ops_nofpu_a32; #endif - x86_opcodes_d8_a16 = ops_nofpu_a16; - x86_opcodes_d8_a32 = ops_nofpu_a32; - x86_opcodes_d9_a16 = ops_nofpu_a16; - x86_opcodes_d9_a32 = ops_nofpu_a32; - x86_opcodes_da_a16 = ops_nofpu_a16; - x86_opcodes_da_a32 = ops_nofpu_a32; - x86_opcodes_db_a16 = ops_nofpu_a16; - x86_opcodes_db_a32 = ops_nofpu_a32; - x86_opcodes_dc_a16 = ops_nofpu_a16; - x86_opcodes_dc_a32 = ops_nofpu_a32; - x86_opcodes_dd_a16 = ops_nofpu_a16; - x86_opcodes_dd_a32 = ops_nofpu_a32; - x86_opcodes_de_a16 = ops_nofpu_a16; - x86_opcodes_de_a32 = ops_nofpu_a32; - x86_opcodes_df_a16 = ops_nofpu_a16; - x86_opcodes_df_a32 = ops_nofpu_a32; + x86_opcodes_d8_a16 = ops_nofpu_a16; + x86_opcodes_d8_a32 = ops_nofpu_a32; + x86_opcodes_d9_a16 = ops_nofpu_a16; + x86_opcodes_d9_a32 = ops_nofpu_a32; + x86_opcodes_da_a16 = ops_nofpu_a16; + x86_opcodes_da_a32 = ops_nofpu_a32; + x86_opcodes_db_a16 = ops_nofpu_a16; + x86_opcodes_db_a32 = ops_nofpu_a32; + x86_opcodes_dc_a16 = ops_nofpu_a16; + x86_opcodes_dc_a32 = ops_nofpu_a32; + x86_opcodes_dd_a16 = ops_nofpu_a16; + x86_opcodes_dd_a32 = ops_nofpu_a32; + x86_opcodes_de_a16 = ops_nofpu_a16; + x86_opcodes_de_a32 = ops_nofpu_a32; + x86_opcodes_df_a16 = ops_nofpu_a16; + x86_opcodes_df_a32 = ops_nofpu_a32; } #ifdef USE_DYNAREC @@ -527,919 +505,915 @@ cpu_set(void) memset(&msr, 0, sizeof(msr)); - timing_misaligned = 0; + timing_misaligned = 0; cpu_cyrix_alignment = 0; - cpu_CR4_mask = 0; + cpu_CR4_mask = 0; switch (cpu_s->cpu_type) { - case CPU_8088: - case CPU_8086: - break; + case CPU_8088: + case CPU_8086: + break; - case CPU_286: + case CPU_286: #ifdef USE_DYNAREC - x86_setopcodes(ops_286, ops_286_0f, dynarec_ops_286, dynarec_ops_286_0f); + x86_setopcodes(ops_286, ops_286_0f, dynarec_ops_286, dynarec_ops_286_0f); #else - x86_setopcodes(ops_286, ops_286_0f); + x86_setopcodes(ops_286, ops_286_0f); #endif - if (fpu_type == FPU_287) { + if (fpu_type == FPU_287) { #ifdef USE_DYNAREC - x86_dynarec_opcodes_d9_a16 = dynarec_ops_fpu_287_d9_a16; - x86_dynarec_opcodes_d9_a32 = dynarec_ops_fpu_287_d9_a32; - x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_287_da_a16; - x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_287_da_a32; - x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_287_db_a16; - x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_287_db_a32; - x86_dynarec_opcodes_dc_a16 = dynarec_ops_fpu_287_dc_a16; - x86_dynarec_opcodes_dc_a32 = dynarec_ops_fpu_287_dc_a32; - x86_dynarec_opcodes_dd_a16 = dynarec_ops_fpu_287_dd_a16; - x86_dynarec_opcodes_dd_a32 = dynarec_ops_fpu_287_dd_a32; - x86_dynarec_opcodes_de_a16 = dynarec_ops_fpu_287_de_a16; - x86_dynarec_opcodes_de_a32 = dynarec_ops_fpu_287_de_a32; - x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_287_df_a16; - x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_287_df_a32; + x86_dynarec_opcodes_d9_a16 = dynarec_ops_fpu_287_d9_a16; + x86_dynarec_opcodes_d9_a32 = dynarec_ops_fpu_287_d9_a32; + x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_287_da_a16; + x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_287_da_a32; + x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_287_db_a16; + x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_287_db_a32; + x86_dynarec_opcodes_dc_a16 = dynarec_ops_fpu_287_dc_a16; + x86_dynarec_opcodes_dc_a32 = dynarec_ops_fpu_287_dc_a32; + x86_dynarec_opcodes_dd_a16 = dynarec_ops_fpu_287_dd_a16; + x86_dynarec_opcodes_dd_a32 = dynarec_ops_fpu_287_dd_a32; + x86_dynarec_opcodes_de_a16 = dynarec_ops_fpu_287_de_a16; + x86_dynarec_opcodes_de_a32 = dynarec_ops_fpu_287_de_a32; + x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_287_df_a16; + x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_287_df_a32; #endif - x86_opcodes_d9_a16 = ops_fpu_287_d9_a16; - x86_opcodes_d9_a32 = ops_fpu_287_d9_a32; - x86_opcodes_da_a16 = ops_fpu_287_da_a16; - x86_opcodes_da_a32 = ops_fpu_287_da_a32; - x86_opcodes_db_a16 = ops_fpu_287_db_a16; - x86_opcodes_db_a32 = ops_fpu_287_db_a32; - x86_opcodes_dc_a16 = ops_fpu_287_dc_a16; - x86_opcodes_dc_a32 = ops_fpu_287_dc_a32; - x86_opcodes_dd_a16 = ops_fpu_287_dd_a16; - x86_opcodes_dd_a32 = ops_fpu_287_dd_a32; - x86_opcodes_de_a16 = ops_fpu_287_de_a16; - x86_opcodes_de_a32 = ops_fpu_287_de_a32; - x86_opcodes_df_a16 = ops_fpu_287_df_a16; - x86_opcodes_df_a32 = ops_fpu_287_df_a32; - } + x86_opcodes_d9_a16 = ops_fpu_287_d9_a16; + x86_opcodes_d9_a32 = ops_fpu_287_d9_a32; + x86_opcodes_da_a16 = ops_fpu_287_da_a16; + x86_opcodes_da_a32 = ops_fpu_287_da_a32; + x86_opcodes_db_a16 = ops_fpu_287_db_a16; + x86_opcodes_db_a32 = ops_fpu_287_db_a32; + x86_opcodes_dc_a16 = ops_fpu_287_dc_a16; + x86_opcodes_dc_a32 = ops_fpu_287_dc_a32; + x86_opcodes_dd_a16 = ops_fpu_287_dd_a16; + x86_opcodes_dd_a32 = ops_fpu_287_dd_a32; + x86_opcodes_de_a16 = ops_fpu_287_de_a16; + x86_opcodes_de_a32 = ops_fpu_287_de_a32; + x86_opcodes_df_a16 = ops_fpu_287_df_a16; + x86_opcodes_df_a32 = ops_fpu_287_df_a32; + } - timing_rr = 2; /* register dest - register src */ - timing_rm = 7; /* register dest - memory src */ - timing_mr = 7; /* memory dest - register src */ - timing_mm = 7; /* memory dest - memory src */ - timing_rml = 9; /* register dest - memory src long */ - timing_mrl = 11; /* memory dest - register src long */ - timing_mml = 11; /* memory dest - memory src */ - timing_bt = 4; /* branch taken */ - timing_bnt = 3; /* branch not taken */ + timing_rr = 2; /* register dest - register src */ + timing_rm = 7; /* register dest - memory src */ + timing_mr = 7; /* memory dest - register src */ + timing_mm = 7; /* memory dest - memory src */ + timing_rml = 9; /* register dest - memory src long */ + timing_mrl = 11; /* memory dest - register src long */ + timing_mml = 11; /* memory dest - memory src */ + timing_bt = 4; /* branch taken */ + timing_bnt = 3; /* branch not taken */ - timing_int = 0; - timing_int_rm = 23; - timing_int_v86 = 0; - timing_int_pm = 40; - timing_int_pm_outer = 78; - timing_iret_rm = 17; - timing_iret_v86 = 0; - timing_iret_pm = 31; - timing_iret_pm_outer = 55; - timing_call_rm = 13; - timing_call_pm = 26; - timing_call_pm_gate = 52; - timing_call_pm_gate_inner = 82; - timing_retf_rm = 15; - timing_retf_pm = 25; - timing_retf_pm_outer = 55; - timing_jmp_rm = 11; - timing_jmp_pm = 23; - timing_jmp_pm_gate = 38; - break; + timing_int = 0; + timing_int_rm = 23; + timing_int_v86 = 0; + timing_int_pm = 40; + timing_int_pm_outer = 78; + timing_iret_rm = 17; + timing_iret_v86 = 0; + timing_iret_pm = 31; + timing_iret_pm_outer = 55; + timing_call_rm = 13; + timing_call_pm = 26; + timing_call_pm_gate = 52; + timing_call_pm_gate_inner = 82; + timing_retf_rm = 15; + timing_retf_pm = 25; + timing_retf_pm_outer = 55; + timing_jmp_rm = 11; + timing_jmp_pm = 23; + timing_jmp_pm_gate = 38; + break; - case CPU_IBM486SLC: - case CPU_IBM386SLC: - case CPU_IBM486BL: + case CPU_IBM486SLC: + case CPU_IBM386SLC: + case CPU_IBM486BL: #ifdef USE_DYNAREC - x86_setopcodes(ops_386, ops_ibm486_0f, dynarec_ops_386, dynarec_ops_ibm486_0f); + x86_setopcodes(ops_386, ops_ibm486_0f, dynarec_ops_386, dynarec_ops_ibm486_0f); #else - x86_setopcodes(ops_386, ops_ibm486_0f); + x86_setopcodes(ops_386, ops_ibm486_0f); #endif - cpu_features = CPU_FEATURE_MSR; - /* FALLTHROUGH */ - case CPU_386SX: - case CPU_386DX: - if (fpu_type == FPU_287) { /* In case we get Deskpro 386 emulation */ + cpu_features = CPU_FEATURE_MSR; + /* FALLTHROUGH */ + case CPU_386SX: + case CPU_386DX: + if (fpu_type == FPU_287) { /* In case we get Deskpro 386 emulation */ #ifdef USE_DYNAREC - x86_dynarec_opcodes_d9_a16 = dynarec_ops_fpu_287_d9_a16; - x86_dynarec_opcodes_d9_a32 = dynarec_ops_fpu_287_d9_a32; - x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_287_da_a16; - x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_287_da_a32; - x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_287_db_a16; - x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_287_db_a32; - x86_dynarec_opcodes_dc_a16 = dynarec_ops_fpu_287_dc_a16; - x86_dynarec_opcodes_dc_a32 = dynarec_ops_fpu_287_dc_a32; - x86_dynarec_opcodes_dd_a16 = dynarec_ops_fpu_287_dd_a16; - x86_dynarec_opcodes_dd_a32 = dynarec_ops_fpu_287_dd_a32; - x86_dynarec_opcodes_de_a16 = dynarec_ops_fpu_287_de_a16; - x86_dynarec_opcodes_de_a32 = dynarec_ops_fpu_287_de_a32; - x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_287_df_a16; - x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_287_df_a32; + x86_dynarec_opcodes_d9_a16 = dynarec_ops_fpu_287_d9_a16; + x86_dynarec_opcodes_d9_a32 = dynarec_ops_fpu_287_d9_a32; + x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_287_da_a16; + x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_287_da_a32; + x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_287_db_a16; + x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_287_db_a32; + x86_dynarec_opcodes_dc_a16 = dynarec_ops_fpu_287_dc_a16; + x86_dynarec_opcodes_dc_a32 = dynarec_ops_fpu_287_dc_a32; + x86_dynarec_opcodes_dd_a16 = dynarec_ops_fpu_287_dd_a16; + x86_dynarec_opcodes_dd_a32 = dynarec_ops_fpu_287_dd_a32; + x86_dynarec_opcodes_de_a16 = dynarec_ops_fpu_287_de_a16; + x86_dynarec_opcodes_de_a32 = dynarec_ops_fpu_287_de_a32; + x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_287_df_a16; + x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_287_df_a32; #endif - x86_opcodes_d9_a16 = ops_fpu_287_d9_a16; - x86_opcodes_d9_a32 = ops_fpu_287_d9_a32; - x86_opcodes_da_a16 = ops_fpu_287_da_a16; - x86_opcodes_da_a32 = ops_fpu_287_da_a32; - x86_opcodes_db_a16 = ops_fpu_287_db_a16; - x86_opcodes_db_a32 = ops_fpu_287_db_a32; - x86_opcodes_dc_a16 = ops_fpu_287_dc_a16; - x86_opcodes_dc_a32 = ops_fpu_287_dc_a32; - x86_opcodes_dd_a16 = ops_fpu_287_dd_a16; - x86_opcodes_dd_a32 = ops_fpu_287_dd_a32; - x86_opcodes_de_a16 = ops_fpu_287_de_a16; - x86_opcodes_de_a32 = ops_fpu_287_de_a32; - x86_opcodes_df_a16 = ops_fpu_287_df_a16; - x86_opcodes_df_a32 = ops_fpu_287_df_a32; - } + x86_opcodes_d9_a16 = ops_fpu_287_d9_a16; + x86_opcodes_d9_a32 = ops_fpu_287_d9_a32; + x86_opcodes_da_a16 = ops_fpu_287_da_a16; + x86_opcodes_da_a32 = ops_fpu_287_da_a32; + x86_opcodes_db_a16 = ops_fpu_287_db_a16; + x86_opcodes_db_a32 = ops_fpu_287_db_a32; + x86_opcodes_dc_a16 = ops_fpu_287_dc_a16; + x86_opcodes_dc_a32 = ops_fpu_287_dc_a32; + x86_opcodes_dd_a16 = ops_fpu_287_dd_a16; + x86_opcodes_dd_a32 = ops_fpu_287_dd_a32; + x86_opcodes_de_a16 = ops_fpu_287_de_a16; + x86_opcodes_de_a32 = ops_fpu_287_de_a32; + x86_opcodes_df_a16 = ops_fpu_287_df_a16; + x86_opcodes_df_a32 = ops_fpu_287_df_a32; + } - timing_rr = 2; /* register dest - register src */ - timing_rm = 6; /* register dest - memory src */ - timing_mr = 7; /* memory dest - register src */ - timing_mm = 6; /* memory dest - memory src */ - if (cpu_s->cpu_type >= CPU_386DX) { - timing_rml = 6; /* register dest - memory src long */ - timing_mrl = 7; /* memory dest - register src long */ - timing_mml = 6; /* memory dest - memory src */ - } else { - timing_rml = 8; /* register dest - memory src long */ - timing_mrl = 11; /* memory dest - register src long */ - timing_mml = 10; /* memory dest - memory src */ - } - timing_bt = 4; /* branch taken */ - timing_bnt = 3; /* branch not taken */ + timing_rr = 2; /* register dest - register src */ + timing_rm = 6; /* register dest - memory src */ + timing_mr = 7; /* memory dest - register src */ + timing_mm = 6; /* memory dest - memory src */ + if (cpu_s->cpu_type >= CPU_386DX) { + timing_rml = 6; /* register dest - memory src long */ + timing_mrl = 7; /* memory dest - register src long */ + timing_mml = 6; /* memory dest - memory src */ + } else { + timing_rml = 8; /* register dest - memory src long */ + timing_mrl = 11; /* memory dest - register src long */ + timing_mml = 10; /* memory dest - memory src */ + } + timing_bt = 4; /* branch taken */ + timing_bnt = 3; /* branch not taken */ - timing_int = 0; - timing_int_rm = 37; - timing_int_v86 = 59; - timing_int_pm = 99; - timing_int_pm_outer = 119; - timing_iret_rm = 22; - timing_iret_v86 = 60; - timing_iret_pm = 38; - timing_iret_pm_outer = 82; - timing_call_rm = 17; - timing_call_pm = 34; - timing_call_pm_gate = 52; - timing_call_pm_gate_inner = 86; - timing_retf_rm = 18; - timing_retf_pm = 32; - timing_retf_pm_outer = 68; - timing_jmp_rm = 12; - timing_jmp_pm = 27; - timing_jmp_pm_gate = 45; - break; + timing_int = 0; + timing_int_rm = 37; + timing_int_v86 = 59; + timing_int_pm = 99; + timing_int_pm_outer = 119; + timing_iret_rm = 22; + timing_iret_v86 = 60; + timing_iret_pm = 38; + timing_iret_pm_outer = 82; + timing_call_rm = 17; + timing_call_pm = 34; + timing_call_pm_gate = 52; + timing_call_pm_gate_inner = 86; + timing_retf_rm = 18; + timing_retf_pm = 32; + timing_retf_pm_outer = 68; + timing_jmp_rm = 12; + timing_jmp_pm = 27; + timing_jmp_pm_gate = 45; + break; - case CPU_486SLC: + case CPU_486SLC: #ifdef USE_DYNAREC - x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f); + x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f); #else - x86_setopcodes(ops_386, ops_486_0f); + x86_setopcodes(ops_386, ops_486_0f); #endif - timing_rr = 1; /* register dest - register src */ - timing_rm = 3; /* register dest - memory src */ - timing_mr = 5; /* memory dest - register src */ - timing_mm = 3; - timing_rml = 5; /* register dest - memory src long */ - timing_mrl = 7; /* memory dest - register src long */ - timing_mml = 7; - timing_bt = 5; /* branch taken */ - timing_bnt = 1; /* branch not taken */ + timing_rr = 1; /* register dest - register src */ + timing_rm = 3; /* register dest - memory src */ + timing_mr = 5; /* memory dest - register src */ + timing_mm = 3; + timing_rml = 5; /* register dest - memory src long */ + timing_mrl = 7; /* memory dest - register src long */ + timing_mml = 7; + timing_bt = 5; /* branch taken */ + timing_bnt = 1; /* branch not taken */ - timing_int = 4; /* unknown */ - timing_int_rm = 14; - timing_int_v86 = 82; - timing_int_pm = 49; - timing_int_pm_outer = 77; - timing_iret_rm = 14; - timing_iret_v86 = 66; - timing_iret_pm = 31; - timing_iret_pm_outer = 66; - timing_call_rm = 12; - timing_call_pm = 30; - timing_call_pm_gate = 41; - timing_call_pm_gate_inner = 83; - timing_retf_rm = 13; - timing_retf_pm = 26; - timing_retf_pm_outer = 61; - timing_jmp_rm = 9; - timing_jmp_pm = 26; - timing_jmp_pm_gate = 37; - timing_misaligned = 3; - break; + timing_int = 4; /* unknown */ + timing_int_rm = 14; + timing_int_v86 = 82; + timing_int_pm = 49; + timing_int_pm_outer = 77; + timing_iret_rm = 14; + timing_iret_v86 = 66; + timing_iret_pm = 31; + timing_iret_pm_outer = 66; + timing_call_rm = 12; + timing_call_pm = 30; + timing_call_pm_gate = 41; + timing_call_pm_gate_inner = 83; + timing_retf_rm = 13; + timing_retf_pm = 26; + timing_retf_pm_outer = 61; + timing_jmp_rm = 9; + timing_jmp_pm = 26; + timing_jmp_pm_gate = 37; + timing_misaligned = 3; + break; - case CPU_486DLC: + case CPU_486DLC: #ifdef USE_DYNAREC - x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f); + x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f); #else - x86_setopcodes(ops_386, ops_486_0f); + x86_setopcodes(ops_386, ops_486_0f); #endif - timing_rr = 1; /* register dest - register src */ - timing_rm = 3; /* register dest - memory src */ - timing_mr = 3; /* memory dest - register src */ - timing_mm = 3; - timing_rml = 3; /* register dest - memory src long */ - timing_mrl = 3; /* memory dest - register src long */ - timing_mml = 3; - timing_bt = 5; /* branch taken */ - timing_bnt = 1; /* branch not taken */ + timing_rr = 1; /* register dest - register src */ + timing_rm = 3; /* register dest - memory src */ + timing_mr = 3; /* memory dest - register src */ + timing_mm = 3; + timing_rml = 3; /* register dest - memory src long */ + timing_mrl = 3; /* memory dest - register src long */ + timing_mml = 3; + timing_bt = 5; /* branch taken */ + timing_bnt = 1; /* branch not taken */ - timing_int = 4; /* unknown */ - timing_int_rm = 14; - timing_int_v86 = 82; - timing_int_pm = 49; - timing_int_pm_outer = 77; - timing_iret_rm = 14; - timing_iret_v86 = 66; - timing_iret_pm = 31; - timing_iret_pm_outer = 66; - timing_call_rm = 12; - timing_call_pm = 30; - timing_call_pm_gate = 41; - timing_call_pm_gate_inner = 83; - timing_retf_rm = 13; - timing_retf_pm = 26; - timing_retf_pm_outer = 61; - timing_jmp_rm = 9; - timing_jmp_pm = 26; - timing_jmp_pm_gate = 37; + timing_int = 4; /* unknown */ + timing_int_rm = 14; + timing_int_v86 = 82; + timing_int_pm = 49; + timing_int_pm_outer = 77; + timing_iret_rm = 14; + timing_iret_v86 = 66; + timing_iret_pm = 31; + timing_iret_pm_outer = 66; + timing_call_rm = 12; + timing_call_pm = 30; + timing_call_pm_gate = 41; + timing_call_pm_gate_inner = 83; + timing_retf_rm = 13; + timing_retf_pm = 26; + timing_retf_pm_outer = 61; + timing_jmp_rm = 9; + timing_jmp_pm = 26; + timing_jmp_pm_gate = 37; - timing_misaligned = 3; - break; + timing_misaligned = 3; + break; - case CPU_i486SX_SLENH: - case CPU_i486DX_SLENH: - cpu_features = CPU_FEATURE_CR4 | CPU_FEATURE_VME; - cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_VME; - /* FALLTHROUGH */ - case CPU_RAPIDCAD: - case CPU_i486SX: - case CPU_i486DX: - case CPU_Am486SX: - case CPU_Am486DX: - case CPU_Am486DXL: - case CPU_ENH_Am486DX: - /*AMD timing identical to Intel*/ + case CPU_i486SX_SLENH: + case CPU_i486DX_SLENH: + cpu_features = CPU_FEATURE_CR4 | CPU_FEATURE_VME; + cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_VME; + /* FALLTHROUGH */ + case CPU_RAPIDCAD: + case CPU_i486SX: + case CPU_i486DX: + case CPU_Am486SX: + case CPU_Am486DX: + case CPU_Am486DXL: + case CPU_ENH_Am486DX: + /*AMD timing identical to Intel*/ #ifdef USE_DYNAREC - x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f); + x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f); #else - x86_setopcodes(ops_386, ops_486_0f); + x86_setopcodes(ops_386, ops_486_0f); #endif - timing_rr = 1; /* register dest - register src */ - timing_rm = 2; /* register dest - memory src */ - timing_mr = 3; /* memory dest - register src */ - timing_mm = 3; - timing_rml = 2; /* register dest - memory src long */ - timing_mrl = 3; /* memory dest - register src long */ - timing_mml = 3; - timing_bt = 2; /* branch taken */ - timing_bnt = 1; /* branch not taken */ + timing_rr = 1; /* register dest - register src */ + timing_rm = 2; /* register dest - memory src */ + timing_mr = 3; /* memory dest - register src */ + timing_mm = 3; + timing_rml = 2; /* register dest - memory src long */ + timing_mrl = 3; /* memory dest - register src long */ + timing_mml = 3; + timing_bt = 2; /* branch taken */ + timing_bnt = 1; /* branch not taken */ - timing_int = 4; - timing_int_rm = 26; - timing_int_v86 = 82; - timing_int_pm = 44; - timing_int_pm_outer = 71; - timing_iret_rm = 15; - timing_iret_v86 = 36; /* unknown */ - timing_iret_pm = 20; - timing_iret_pm_outer = 36; - timing_call_rm = 18; - timing_call_pm = 20; - timing_call_pm_gate = 35; - timing_call_pm_gate_inner = 69; - timing_retf_rm = 13; - timing_retf_pm = 17; - timing_retf_pm_outer = 35; - timing_jmp_rm = 17; - timing_jmp_pm = 19; - timing_jmp_pm_gate = 32; + timing_int = 4; + timing_int_rm = 26; + timing_int_v86 = 82; + timing_int_pm = 44; + timing_int_pm_outer = 71; + timing_iret_rm = 15; + timing_iret_v86 = 36; /* unknown */ + timing_iret_pm = 20; + timing_iret_pm_outer = 36; + timing_call_rm = 18; + timing_call_pm = 20; + timing_call_pm_gate = 35; + timing_call_pm_gate_inner = 69; + timing_retf_rm = 13; + timing_retf_pm = 17; + timing_retf_pm_outer = 35; + timing_jmp_rm = 17; + timing_jmp_pm = 19; + timing_jmp_pm_gate = 32; - timing_misaligned = 3; - break; + timing_misaligned = 3; + break; - case CPU_Cx486S: - case CPU_Cx486DX: - case CPU_STPC: + case CPU_Cx486S: + case CPU_Cx486DX: + case CPU_STPC: #ifdef USE_DYNAREC - if (cpu_s->cpu_type == CPU_STPC) - x86_setopcodes(ops_386, ops_stpc_0f, dynarec_ops_386, dynarec_ops_stpc_0f); - else - x86_setopcodes(ops_386, ops_c486_0f, dynarec_ops_386, dynarec_ops_c486_0f); + if (cpu_s->cpu_type == CPU_STPC) + x86_setopcodes(ops_386, ops_stpc_0f, dynarec_ops_386, dynarec_ops_stpc_0f); + else + x86_setopcodes(ops_386, ops_c486_0f, dynarec_ops_386, dynarec_ops_c486_0f); #else - if (cpu_s->cpu_type == CPU_STPC) - x86_setopcodes(ops_386, ops_stpc_0f); - else - x86_setopcodes(ops_386, ops_c486_0f); + if (cpu_s->cpu_type == CPU_STPC) + x86_setopcodes(ops_386, ops_stpc_0f); + else + x86_setopcodes(ops_386, ops_c486_0f); #endif - timing_rr = 1; /* register dest - register src */ - timing_rm = 3; /* register dest - memory src */ - timing_mr = 3; /* memory dest - register src */ - timing_mm = 3; - timing_rml = 3; /* register dest - memory src long */ - timing_mrl = 3; /* memory dest - register src long */ - timing_mml = 3; - timing_bt = 3; /* branch taken */ - timing_bnt = 1; /* branch not taken */ + timing_rr = 1; /* register dest - register src */ + timing_rm = 3; /* register dest - memory src */ + timing_mr = 3; /* memory dest - register src */ + timing_mm = 3; + timing_rml = 3; /* register dest - memory src long */ + timing_mrl = 3; /* memory dest - register src long */ + timing_mml = 3; + timing_bt = 3; /* branch taken */ + timing_bnt = 1; /* branch not taken */ - timing_int = 4; - timing_int_rm = 14; - timing_int_v86 = 82; - timing_int_pm = 49; - timing_int_pm_outer = 77; - timing_iret_rm = 14; - timing_iret_v86 = 66; /* unknown */ - timing_iret_pm = 31; - timing_iret_pm_outer = 66; - timing_call_rm = 12; - timing_call_pm = 30; - timing_call_pm_gate = 41; - timing_call_pm_gate_inner = 83; - timing_retf_rm = 13; - timing_retf_pm = 26; - timing_retf_pm_outer = 61; - timing_jmp_rm = 9; - timing_jmp_pm = 26; - timing_jmp_pm_gate = 37; + timing_int = 4; + timing_int_rm = 14; + timing_int_v86 = 82; + timing_int_pm = 49; + timing_int_pm_outer = 77; + timing_iret_rm = 14; + timing_iret_v86 = 66; /* unknown */ + timing_iret_pm = 31; + timing_iret_pm_outer = 66; + timing_call_rm = 12; + timing_call_pm = 30; + timing_call_pm_gate = 41; + timing_call_pm_gate_inner = 83; + timing_retf_rm = 13; + timing_retf_pm = 26; + timing_retf_pm_outer = 61; + timing_jmp_rm = 9; + timing_jmp_pm = 26; + timing_jmp_pm_gate = 37; - timing_misaligned = 3; + timing_misaligned = 3; - if (cpu_s->cpu_type == CPU_STPC) - cpu_features = CPU_FEATURE_RDTSC; - break; + if (cpu_s->cpu_type == CPU_STPC) + cpu_features = CPU_FEATURE_RDTSC; + break; - case CPU_Cx5x86: + case CPU_Cx5x86: #ifdef USE_DYNAREC - x86_setopcodes(ops_386, ops_c486_0f, dynarec_ops_386, dynarec_ops_c486_0f); + x86_setopcodes(ops_386, ops_c486_0f, dynarec_ops_386, dynarec_ops_c486_0f); #else - x86_setopcodes(ops_386, ops_c486_0f); + x86_setopcodes(ops_386, ops_c486_0f); #endif - timing_rr = 1; /* register dest - register src */ - timing_rm = 1; /* register dest - memory src */ - timing_mr = 2; /* memory dest - register src */ - timing_mm = 2; - timing_rml = 1; /* register dest - memory src long */ - timing_mrl = 2; /* memory dest - register src long */ - timing_mml = 2; - timing_bt = 4; /* branch taken */ - timing_bnt = 1; /* branch not taken */ + timing_rr = 1; /* register dest - register src */ + timing_rm = 1; /* register dest - memory src */ + timing_mr = 2; /* memory dest - register src */ + timing_mm = 2; + timing_rml = 1; /* register dest - memory src long */ + timing_mrl = 2; /* memory dest - register src long */ + timing_mml = 2; + timing_bt = 4; /* branch taken */ + timing_bnt = 1; /* branch not taken */ - timing_int = 0; - timing_int_rm = 9; - timing_int_v86 = 82; /* unknown */ - timing_int_pm = 21; - timing_int_pm_outer = 32; - timing_iret_rm = 7; - timing_iret_v86 = 26; /* unknown */ - timing_iret_pm = 10; - timing_iret_pm_outer = 26; - timing_call_rm = 4; - timing_call_pm = 15; - timing_call_pm_gate = 26; - timing_call_pm_gate_inner = 35; - timing_retf_rm = 4; - timing_retf_pm = 7; - timing_retf_pm_outer = 23; - timing_jmp_rm = 5; - timing_jmp_pm = 7; - timing_jmp_pm_gate = 17; + timing_int = 0; + timing_int_rm = 9; + timing_int_v86 = 82; /* unknown */ + timing_int_pm = 21; + timing_int_pm_outer = 32; + timing_iret_rm = 7; + timing_iret_v86 = 26; /* unknown */ + timing_iret_pm = 10; + timing_iret_pm_outer = 26; + timing_call_rm = 4; + timing_call_pm = 15; + timing_call_pm_gate = 26; + timing_call_pm_gate_inner = 35; + timing_retf_rm = 4; + timing_retf_pm = 7; + timing_retf_pm_outer = 23; + timing_jmp_rm = 5; + timing_jmp_pm = 7; + timing_jmp_pm_gate = 17; - timing_misaligned = 2; + timing_misaligned = 2; - cpu_cyrix_alignment = 1; - break; + cpu_cyrix_alignment = 1; + break; - case CPU_WINCHIP: - case CPU_WINCHIP2: + case CPU_WINCHIP: + case CPU_WINCHIP2: #ifdef USE_DYNAREC - if (cpu_s->cpu_type == CPU_WINCHIP2) - x86_setopcodes(ops_386, ops_winchip2_0f, dynarec_ops_386, dynarec_ops_winchip2_0f); - else - x86_setopcodes(ops_386, ops_winchip_0f, dynarec_ops_386, dynarec_ops_winchip_0f); + if (cpu_s->cpu_type == CPU_WINCHIP2) + x86_setopcodes(ops_386, ops_winchip2_0f, dynarec_ops_386, dynarec_ops_winchip2_0f); + else + x86_setopcodes(ops_386, ops_winchip_0f, dynarec_ops_386, dynarec_ops_winchip_0f); #else - if (cpu_s->cpu_type == CPU_WINCHIP2) - x86_setopcodes(ops_386, ops_winchip2_0f); - else - x86_setopcodes(ops_386, ops_winchip_0f); + if (cpu_s->cpu_type == CPU_WINCHIP2) + x86_setopcodes(ops_386, ops_winchip2_0f); + else + x86_setopcodes(ops_386, ops_winchip_0f); #endif - timing_rr = 1; /* register dest - register src */ - timing_rm = 2; /* register dest - memory src */ - timing_mr = 2; /* memory dest - register src */ - timing_mm = 3; - timing_rml = 2; /* register dest - memory src long */ - timing_mrl = 2; /* memory dest - register src long */ - timing_mml = 3; - timing_bt = 2; /* branch taken */ - timing_bnt = 1; /* branch not taken */ + timing_rr = 1; /* register dest - register src */ + timing_rm = 2; /* register dest - memory src */ + timing_mr = 2; /* memory dest - register src */ + timing_mm = 3; + timing_rml = 2; /* register dest - memory src long */ + timing_mrl = 2; /* memory dest - register src long */ + timing_mml = 3; + timing_bt = 2; /* branch taken */ + timing_bnt = 1; /* branch not taken */ - /*unknown*/ - timing_int_rm = 26; - timing_int_v86 = 82; - timing_int_pm = 44; - timing_int_pm_outer = 71; - timing_iret_rm = 7; - timing_iret_v86 = 26; - timing_iret_pm = 10; - timing_iret_pm_outer = 26; - timing_call_rm = 4; - timing_call_pm = 15; - timing_call_pm_gate = 26; - timing_call_pm_gate_inner = 35; - timing_retf_rm = 4; - timing_retf_pm = 7; - timing_retf_pm_outer = 23; - timing_jmp_rm = 5; - timing_jmp_pm = 7; - timing_jmp_pm_gate = 17; + /*unknown*/ + timing_int_rm = 26; + timing_int_v86 = 82; + timing_int_pm = 44; + timing_int_pm_outer = 71; + timing_iret_rm = 7; + timing_iret_v86 = 26; + timing_iret_pm = 10; + timing_iret_pm_outer = 26; + timing_call_rm = 4; + timing_call_pm = 15; + timing_call_pm_gate = 26; + timing_call_pm_gate_inner = 35; + timing_retf_rm = 4; + timing_retf_pm = 7; + timing_retf_pm_outer = 23; + timing_jmp_rm = 5; + timing_jmp_pm = 7; + timing_jmp_pm_gate = 17; - timing_misaligned = 2; + timing_misaligned = 2; - cpu_cyrix_alignment = 1; + cpu_cyrix_alignment = 1; - cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MMX | CPU_FEATURE_MSR | CPU_FEATURE_CR4; - if (cpu_s->cpu_type == CPU_WINCHIP2) - cpu_features |= CPU_FEATURE_3DNOW; - msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21); - if (cpu_s->cpu_type == CPU_WINCHIP2) - msr.fcr |= (1 << 18) | (1 << 20); - cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE | CR4_PCE; + cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MMX | CPU_FEATURE_MSR | CPU_FEATURE_CR4; + if (cpu_s->cpu_type == CPU_WINCHIP2) + cpu_features |= CPU_FEATURE_3DNOW; + msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21); + if (cpu_s->cpu_type == CPU_WINCHIP2) + msr.fcr |= (1 << 18) | (1 << 20); + cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE | CR4_PCE; #ifdef USE_DYNAREC - if (cpu_s->cpu_type == CPU_WINCHIP2) - codegen_timing_set(&codegen_timing_winchip2); - else - codegen_timing_set(&codegen_timing_winchip); + if (cpu_s->cpu_type == CPU_WINCHIP2) + codegen_timing_set(&codegen_timing_winchip2); + else + codegen_timing_set(&codegen_timing_winchip); #endif - break; + break; - case CPU_P24T: - case CPU_PENTIUM: - case CPU_PENTIUMMMX: + case CPU_P24T: + case CPU_PENTIUM: + case CPU_PENTIUMMMX: #ifdef USE_DYNAREC - if (cpu_s->cpu_type == CPU_PENTIUMMMX) - x86_setopcodes(ops_386, ops_pentiummmx_0f, dynarec_ops_386, dynarec_ops_pentiummmx_0f); - else - x86_setopcodes(ops_386, ops_pentium_0f, dynarec_ops_386, dynarec_ops_pentium_0f); + if (cpu_s->cpu_type == CPU_PENTIUMMMX) + x86_setopcodes(ops_386, ops_pentiummmx_0f, dynarec_ops_386, dynarec_ops_pentiummmx_0f); + else + x86_setopcodes(ops_386, ops_pentium_0f, dynarec_ops_386, dynarec_ops_pentium_0f); #else - if (cpu_s->cpu_type == CPU_PENTIUMMMX) - x86_setopcodes(ops_386, ops_pentiummmx_0f); - else - x86_setopcodes(ops_386, ops_pentium_0f); + if (cpu_s->cpu_type == CPU_PENTIUMMMX) + x86_setopcodes(ops_386, ops_pentiummmx_0f); + else + x86_setopcodes(ops_386, ops_pentium_0f); #endif - timing_rr = 1; /* register dest - register src */ - timing_rm = 2; /* register dest - memory src */ - timing_mr = 3; /* memory dest - register src */ - timing_mm = 3; - timing_rml = 2; /* register dest - memory src long */ - timing_mrl = 3; /* memory dest - register src long */ - timing_mml = 3; - timing_bt = 0; /* branch taken */ - if (cpu_s->cpu_type == CPU_PENTIUMMMX) - timing_bnt = 1; /* branch not taken */ - else - timing_bnt = 2; /* branch not taken */ + timing_rr = 1; /* register dest - register src */ + timing_rm = 2; /* register dest - memory src */ + timing_mr = 3; /* memory dest - register src */ + timing_mm = 3; + timing_rml = 2; /* register dest - memory src long */ + timing_mrl = 3; /* memory dest - register src long */ + timing_mml = 3; + timing_bt = 0; /* branch taken */ + if (cpu_s->cpu_type == CPU_PENTIUMMMX) + timing_bnt = 1; /* branch not taken */ + else + timing_bnt = 2; /* branch not taken */ - timing_int = 6; - timing_int_rm = 11; - timing_int_v86 = 54; - timing_int_pm = 25; - timing_int_pm_outer = 42; - timing_iret_rm = 7; - timing_iret_v86 = 27; /* unknown */ - timing_iret_pm = 10; - timing_iret_pm_outer = 27; - timing_call_rm = 4; - timing_call_pm = 4; - timing_call_pm_gate = 22; - timing_call_pm_gate_inner = 44; - timing_retf_rm = 4; - timing_retf_pm = 4; - timing_retf_pm_outer = 23; - timing_jmp_rm = 3; - timing_jmp_pm = 3; - timing_jmp_pm_gate = 18; + timing_int = 6; + timing_int_rm = 11; + timing_int_v86 = 54; + timing_int_pm = 25; + timing_int_pm_outer = 42; + timing_iret_rm = 7; + timing_iret_v86 = 27; /* unknown */ + timing_iret_pm = 10; + timing_iret_pm_outer = 27; + timing_call_rm = 4; + timing_call_pm = 4; + timing_call_pm_gate = 22; + timing_call_pm_gate_inner = 44; + timing_retf_rm = 4; + timing_retf_pm = 4; + timing_retf_pm_outer = 23; + timing_jmp_rm = 3; + timing_jmp_pm = 3; + timing_jmp_pm_gate = 18; - timing_misaligned = 3; + timing_misaligned = 3; - cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME; - if (cpu_s->cpu_type == CPU_PENTIUMMMX) - cpu_features |= CPU_FEATURE_MMX; - msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21); - cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE | CR4_PCE; + cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME; + if (cpu_s->cpu_type == CPU_PENTIUMMMX) + cpu_features |= CPU_FEATURE_MMX; + msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21); + cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE | CR4_PCE; #ifdef USE_DYNAREC - codegen_timing_set(&codegen_timing_pentium); + codegen_timing_set(&codegen_timing_pentium); #endif - break; + break; #if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86) - case CPU_Cx6x86: - case CPU_Cx6x86L: - case CPU_CxGX1: - case CPU_Cx6x86MX: - if (cpu_s->cpu_type == CPU_Cx6x86MX) { -#ifdef USE_DYNAREC - x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_686_da_a16; - x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_686_da_a32; - x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_686_db_a16; - x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_686_db_a32; - x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_686_df_a16; - x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_686_df_a32; -#endif - x86_opcodes_da_a16 = ops_fpu_686_da_a16; - x86_opcodes_da_a32 = ops_fpu_686_da_a32; - x86_opcodes_db_a16 = ops_fpu_686_db_a16; - x86_opcodes_db_a32 = ops_fpu_686_db_a32; - x86_opcodes_df_a16 = ops_fpu_686_df_a16; - x86_opcodes_df_a32 = ops_fpu_686_df_a32; - } - -#ifdef USE_DYNAREC - if (cpu_s->cpu_type == CPU_Cx6x86MX) - x86_setopcodes(ops_386, ops_c6x86mx_0f, dynarec_ops_386, dynarec_ops_c6x86mx_0f); - else if (cpu_s->cpu_type == CPU_Cx6x86L) - x86_setopcodes(ops_386, ops_pentium_0f, dynarec_ops_386, dynarec_ops_pentium_0f); - else - x86_setopcodes(ops_386, ops_c6x86mx_0f, dynarec_ops_386, dynarec_ops_c6x86mx_0f); - // x86_setopcodes(ops_386, ops_c6x86_0f, dynarec_ops_386, dynarec_ops_c6x86_0f); -#else - if (cpu_s->cpu_type == CPU_Cx6x86MX) - x86_setopcodes(ops_386, ops_c6x86mx_0f); - else if (cpu_s->cpu_type == CPU_Cx6x86L) - x86_setopcodes(ops_386, ops_pentium_0f); - else - x86_setopcodes(ops_386, ops_c6x86_0f); -#endif - - timing_rr = 1; /* register dest - register src */ - timing_rm = 1; /* register dest - memory src */ - timing_mr = 2; /* memory dest - register src */ - timing_mm = 2; - timing_rml = 1; /* register dest - memory src long */ - timing_mrl = 2; /* memory dest - register src long */ - timing_mml = 2; - if (cpu_s->cpu_type == CPU_CxGX1) { - timing_bt = 4; /* branch taken */ - timing_bnt = 1; /* branch not taken */ - } else { - timing_bt = 0; /* branch taken */ - timing_bnt = 2; /* branch not taken */ - } - - /* Make the CxGX1 share the timings with most other Cyrix C6x86's due to the real - ones still being unknown. */ - timing_int_rm = 9; - timing_int_v86 = 46; - timing_int_pm = 21; - timing_int_pm_outer = 32; - timing_iret_rm = 7; - timing_iret_v86 = 26; - timing_iret_pm = 10; - timing_iret_pm_outer = 26; - timing_call_rm = 3; - timing_call_pm = 4; - timing_call_pm_gate = 15; - timing_call_pm_gate_inner = 26; - timing_retf_rm = 4; - timing_retf_pm = 4; - timing_retf_pm_outer = 23; - timing_jmp_rm = 1; - timing_jmp_pm = 4; - timing_jmp_pm_gate = 14; - - timing_misaligned = 2; - - cpu_cyrix_alignment = 1; - - cpu_features = CPU_FEATURE_RDTSC; - if (cpu_s->cpu_type >= CPU_CxGX1) - cpu_features |= CPU_FEATURE_MSR | CPU_FEATURE_CR4; - if (cpu_s->cpu_type == CPU_Cx6x86MX) - cpu_features |= CPU_FEATURE_MMX; - msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21); - if (cpu_s->cpu_type >= CPU_CxGX1) - cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_PCE; - -#ifdef USE_DYNAREC - codegen_timing_set(&codegen_timing_686); -#endif - - if ((cpu_s->cpu_type == CPU_Cx6x86L) || (cpu_s->cpu_type == CPU_Cx6x86MX)) - ccr4 = 0x80; - else if (CPU_Cx6x86) - CPUID = 0; /* Disabled on powerup by default */ - break; -#endif - -#if defined(DEV_BRANCH) && defined(USE_AMD_K5) - case CPU_K5: - case CPU_5K86: -#endif - case CPU_K6: - case CPU_K6_2: - case CPU_K6_2C: - case CPU_K6_3: - case CPU_K6_2P: - case CPU_K6_3P: -#ifdef USE_DYNAREC - if (cpu_s->cpu_type >= CPU_K6_2) - x86_setopcodes(ops_386, ops_k62_0f, dynarec_ops_386, dynarec_ops_k62_0f); -#if defined(DEV_BRANCH) && defined(USE_AMD_K5) - else if (cpu_s->cpu_type == CPU_K6) - x86_setopcodes(ops_386, ops_k6_0f, dynarec_ops_386, dynarec_ops_k6_0f); - else - x86_setopcodes(ops_386, ops_pentiummmx_0f, dynarec_ops_386, dynarec_ops_pentiummmx_0f); -#else - else - x86_setopcodes(ops_386, ops_k6_0f, dynarec_ops_386, dynarec_ops_k6_0f); -#endif -#else - if (cpu_s->cpu_type >= CPU_K6_2) - x86_setopcodes(ops_386, ops_k62_0f); -#if defined(DEV_BRANCH) && defined(USE_AMD_K5) - else if (cpu_s->cpu_type = CPU_K6) - x86_setopcodes(ops_386, ops_k6_0f); - else - x86_setopcodes(ops_386, ops_pentiummmx_0f); -#else - else - x86_setopcodes(ops_386, ops_k6_0f); -#endif -#endif - - timing_rr = 1; /* register dest - register src */ - timing_rm = 2; /* register dest - memory src */ - timing_mr = 3; /* memory dest - register src */ - timing_mm = 3; - timing_rml = 2; /* register dest - memory src long */ - timing_mrl = 3; /* memory dest - register src long */ - timing_mml = 3; - timing_bt = 0; /* branch taken */ - timing_bnt = 1; /* branch not taken */ - - timing_int = 6; - timing_int_rm = 11; - timing_int_v86 = 54; - timing_int_pm = 25; - timing_int_pm_outer = 42; - timing_iret_rm = 7; - timing_iret_v86 = 27; /* unknown */ - timing_iret_pm = 10; - timing_iret_pm_outer = 27; - timing_call_rm = 4; - timing_call_pm = 4; - timing_call_pm_gate = 22; - timing_call_pm_gate_inner = 44; - timing_retf_rm = 4; - timing_retf_pm = 4; - timing_retf_pm_outer = 23; - timing_jmp_rm = 3; - timing_jmp_pm = 3; - timing_jmp_pm_gate = 18; - - timing_misaligned = 3; - - cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME | CPU_FEATURE_MMX; - if (cpu_s->cpu_type >= CPU_K6_2) - cpu_features |= CPU_FEATURE_3DNOW; - msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21); -#if defined(DEV_BRANCH) && defined(USE_AMD_K5) - cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE; - if (cpu_s->cpu_type >= CPU_K6) { - cpu_CR4_mask |= (CR4_VME | CR4_PVI | CR4_PSE); - if (cpu_s->cpu_type <= CPU_K6) - cpu_CR4_mask |= CR4_PCE; - } -#else - cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE; - if (cpu_s->cpu_type == CPU_K6) - cpu_CR4_mask |= CR4_PCE; -#endif - -#ifdef USE_DYNAREC - codegen_timing_set(&codegen_timing_k6); -#endif - break; - - case CPU_PENTIUMPRO: - case CPU_PENTIUM2: - case CPU_PENTIUM2D: -#ifdef USE_DYNAREC - /* TODO: Perhaps merge the three opcode tables with some instructions UD#'ing depending on - CPU type. */ - if (cpu_s->cpu_type == CPU_PENTIUM2D) - x86_setopcodes(ops_386, ops_pentium2d_0f, dynarec_ops_386, dynarec_ops_pentium2d_0f); - else if (cpu_s->cpu_type == CPU_PENTIUM2) - x86_setopcodes(ops_386, ops_pentium2_0f, dynarec_ops_386, dynarec_ops_pentium2_0f); - else - x86_setopcodes(ops_386, ops_pentiumpro_0f, dynarec_ops_386, dynarec_ops_pentiumpro_0f); + case CPU_Cx6x86: + case CPU_Cx6x86L: + case CPU_CxGX1: + case CPU_Cx6x86MX: + if (cpu_s->cpu_type == CPU_Cx6x86MX) { +# ifdef USE_DYNAREC x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_686_da_a16; x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_686_da_a32; x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_686_db_a16; x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_686_db_a32; x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_686_df_a16; x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_686_df_a32; +# endif + x86_opcodes_da_a16 = ops_fpu_686_da_a16; + x86_opcodes_da_a32 = ops_fpu_686_da_a32; + x86_opcodes_db_a16 = ops_fpu_686_db_a16; + x86_opcodes_db_a32 = ops_fpu_686_db_a32; + x86_opcodes_df_a16 = ops_fpu_686_df_a16; + x86_opcodes_df_a32 = ops_fpu_686_df_a32; + } + +# ifdef USE_DYNAREC + if (cpu_s->cpu_type == CPU_Cx6x86MX) + x86_setopcodes(ops_386, ops_c6x86mx_0f, dynarec_ops_386, dynarec_ops_c6x86mx_0f); + else if (cpu_s->cpu_type == CPU_Cx6x86L) + x86_setopcodes(ops_386, ops_pentium_0f, dynarec_ops_386, dynarec_ops_pentium_0f); + else + x86_setopcodes(ops_386, ops_c6x86mx_0f, dynarec_ops_386, dynarec_ops_c6x86mx_0f); + // x86_setopcodes(ops_386, ops_c6x86_0f, dynarec_ops_386, dynarec_ops_c6x86_0f); +# else + if (cpu_s->cpu_type == CPU_Cx6x86MX) + x86_setopcodes(ops_386, ops_c6x86mx_0f); + else if (cpu_s->cpu_type == CPU_Cx6x86L) + x86_setopcodes(ops_386, ops_pentium_0f); + else + x86_setopcodes(ops_386, ops_c6x86_0f); +# endif + + timing_rr = 1; /* register dest - register src */ + timing_rm = 1; /* register dest - memory src */ + timing_mr = 2; /* memory dest - register src */ + timing_mm = 2; + timing_rml = 1; /* register dest - memory src long */ + timing_mrl = 2; /* memory dest - register src long */ + timing_mml = 2; + if (cpu_s->cpu_type == CPU_CxGX1) { + timing_bt = 4; /* branch taken */ + timing_bnt = 1; /* branch not taken */ + } else { + timing_bt = 0; /* branch taken */ + timing_bnt = 2; /* branch not taken */ + } + + /* Make the CxGX1 share the timings with most other Cyrix C6x86's due to the real + ones still being unknown. */ + timing_int_rm = 9; + timing_int_v86 = 46; + timing_int_pm = 21; + timing_int_pm_outer = 32; + timing_iret_rm = 7; + timing_iret_v86 = 26; + timing_iret_pm = 10; + timing_iret_pm_outer = 26; + timing_call_rm = 3; + timing_call_pm = 4; + timing_call_pm_gate = 15; + timing_call_pm_gate_inner = 26; + timing_retf_rm = 4; + timing_retf_pm = 4; + timing_retf_pm_outer = 23; + timing_jmp_rm = 1; + timing_jmp_pm = 4; + timing_jmp_pm_gate = 14; + + timing_misaligned = 2; + + cpu_cyrix_alignment = 1; + + cpu_features = CPU_FEATURE_RDTSC; + if (cpu_s->cpu_type >= CPU_CxGX1) + cpu_features |= CPU_FEATURE_MSR | CPU_FEATURE_CR4; + if (cpu_s->cpu_type == CPU_Cx6x86MX) + cpu_features |= CPU_FEATURE_MMX; + msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21); + if (cpu_s->cpu_type >= CPU_CxGX1) + cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_PCE; + +# ifdef USE_DYNAREC + codegen_timing_set(&codegen_timing_686); +# endif + + if ((cpu_s->cpu_type == CPU_Cx6x86L) || (cpu_s->cpu_type == CPU_Cx6x86MX)) + ccr4 = 0x80; + else if (CPU_Cx6x86) + CPUID = 0; /* Disabled on powerup by default */ + break; +#endif + +#if defined(DEV_BRANCH) && defined(USE_AMD_K5) + case CPU_K5: + case CPU_5K86: +#endif + case CPU_K6: + case CPU_K6_2: + case CPU_K6_2C: + case CPU_K6_3: + case CPU_K6_2P: + case CPU_K6_3P: +#ifdef USE_DYNAREC + if (cpu_s->cpu_type >= CPU_K6_2) + x86_setopcodes(ops_386, ops_k62_0f, dynarec_ops_386, dynarec_ops_k62_0f); +# if defined(DEV_BRANCH) && defined(USE_AMD_K5) + else if (cpu_s->cpu_type == CPU_K6) + x86_setopcodes(ops_386, ops_k6_0f, dynarec_ops_386, dynarec_ops_k6_0f); + else + x86_setopcodes(ops_386, ops_pentiummmx_0f, dynarec_ops_386, dynarec_ops_pentiummmx_0f); +# else + else + x86_setopcodes(ops_386, ops_k6_0f, dynarec_ops_386, dynarec_ops_k6_0f); +# endif #else - if (cpu_s->cpu_type == CPU_PENTIUM2D) - x86_setopcodes(ops_386, ops_pentium2d_0f); - else - x86_setopcodes(ops_386, ops_pentium2_0f); + if (cpu_s->cpu_type >= CPU_K6_2) + x86_setopcodes(ops_386, ops_k62_0f); +# if defined(DEV_BRANCH) && defined(USE_AMD_K5) + else if (cpu_s->cpu_type = CPU_K6) + x86_setopcodes(ops_386, ops_k6_0f); + else + x86_setopcodes(ops_386, ops_pentiummmx_0f); +# else + else + x86_setopcodes(ops_386, ops_k6_0f); +# endif #endif - x86_opcodes_da_a16 = ops_fpu_686_da_a16; - x86_opcodes_da_a32 = ops_fpu_686_da_a32; - x86_opcodes_db_a16 = ops_fpu_686_db_a16; - x86_opcodes_db_a32 = ops_fpu_686_db_a32; - x86_opcodes_df_a16 = ops_fpu_686_df_a16; - x86_opcodes_df_a32 = ops_fpu_686_df_a32; - timing_rr = 1; /* register dest - register src */ - timing_rm = 2; /* register dest - memory src */ - timing_mr = 3; /* memory dest - register src */ - timing_mm = 3; - timing_rml = 2; /* register dest - memory src long */ - timing_mrl = 3; /* memory dest - register src long */ - timing_mml = 3; - timing_bt = 0; /* branch taken */ - timing_bnt = 1; /* branch not taken */ + timing_rr = 1; /* register dest - register src */ + timing_rm = 2; /* register dest - memory src */ + timing_mr = 3; /* memory dest - register src */ + timing_mm = 3; + timing_rml = 2; /* register dest - memory src long */ + timing_mrl = 3; /* memory dest - register src long */ + timing_mml = 3; + timing_bt = 0; /* branch taken */ + timing_bnt = 1; /* branch not taken */ - timing_int = 6; - timing_int_rm = 11; - timing_int_v86 = 54; - timing_int_pm = 25; - timing_int_pm_outer = 42; - timing_iret_rm = 7; - timing_iret_v86 = 27; /* unknown */ - timing_iret_pm = 10; - timing_iret_pm_outer = 27; - timing_call_rm = 4; - timing_call_pm = 4; - timing_call_pm_gate = 22; - timing_call_pm_gate_inner = 44; - timing_retf_rm = 4; - timing_retf_pm = 4; - timing_retf_pm_outer = 23; - timing_jmp_rm = 3; - timing_jmp_pm = 3; - timing_jmp_pm_gate = 18; + timing_int = 6; + timing_int_rm = 11; + timing_int_v86 = 54; + timing_int_pm = 25; + timing_int_pm_outer = 42; + timing_iret_rm = 7; + timing_iret_v86 = 27; /* unknown */ + timing_iret_pm = 10; + timing_iret_pm_outer = 27; + timing_call_rm = 4; + timing_call_pm = 4; + timing_call_pm_gate = 22; + timing_call_pm_gate_inner = 44; + timing_retf_rm = 4; + timing_retf_pm = 4; + timing_retf_pm_outer = 23; + timing_jmp_rm = 3; + timing_jmp_pm = 3; + timing_jmp_pm_gate = 18; - timing_misaligned = 3; + timing_misaligned = 3; - cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME; - if (cpu_s->cpu_type >= CPU_PENTIUM2) - cpu_features |= CPU_FEATURE_MMX; - msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21); - cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE | CR4_PAE | CR4_PCE; - if (cpu_s->cpu_type == CPU_PENTIUM2D) - cpu_CR4_mask |= CR4_OSFXSR; - -#ifdef USE_DYNAREC - codegen_timing_set(&codegen_timing_p6); -#endif - break; - - case CPU_CYRIX3S: -#ifdef USE_DYNAREC - x86_setopcodes(ops_386, ops_winchip2_0f, dynarec_ops_386, dynarec_ops_winchip2_0f); + cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME | CPU_FEATURE_MMX; + if (cpu_s->cpu_type >= CPU_K6_2) + cpu_features |= CPU_FEATURE_3DNOW; + msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21); +#if defined(DEV_BRANCH) && defined(USE_AMD_K5) + cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE; + if (cpu_s->cpu_type >= CPU_K6) { + cpu_CR4_mask |= (CR4_VME | CR4_PVI | CR4_PSE); + if (cpu_s->cpu_type <= CPU_K6) + cpu_CR4_mask |= CR4_PCE; + } #else - x86_setopcodes(ops_386, ops_winchip2_0f); + cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE; + if (cpu_s->cpu_type == CPU_K6) + cpu_CR4_mask |= CR4_PCE; #endif - timing_rr = 1; /* register dest - register src */ - timing_rm = 2; /* register dest - memory src */ - timing_mr = 2; /* memory dest - register src */ - timing_mm = 3; - timing_rml = 2; /* register dest - memory src long */ - timing_mrl = 2; /* memory dest - register src long */ - timing_mml = 3; - timing_bt = 2; /* branch taken */ - timing_bnt = 1; /* branch not taken */ - - timing_int_rm = 26; /* unknown */ - timing_int_v86 = 82; - timing_int_pm = 44; - timing_int_pm_outer = 71; - timing_iret_rm = 7; - timing_iret_v86 = 26; - timing_iret_pm = 10; - timing_iret_pm_outer = 26; - timing_call_rm = 4; - timing_call_pm = 15; - timing_call_pm_gate = 26; - timing_call_pm_gate_inner = 35; - timing_retf_rm = 4; - timing_retf_pm = 7; - timing_retf_pm_outer = 23; - timing_jmp_rm = 5; - timing_jmp_pm = 7; - timing_jmp_pm_gate = 17; - - timing_misaligned = 2; - - cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MMX | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_3DNOW; - msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 18) | (1 << 19) | (1 << 20) | (1 << 21); - cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE | CR4_PCE; - - cpu_cyrix_alignment = 1; #ifdef USE_DYNAREC - codegen_timing_set(&codegen_timing_winchip); + codegen_timing_set(&codegen_timing_k6); #endif - break; + break; - default: - fatal("cpu_set : unknown CPU type %i\n", cpu_s->cpu_type); + case CPU_PENTIUMPRO: + case CPU_PENTIUM2: + case CPU_PENTIUM2D: +#ifdef USE_DYNAREC + /* TODO: Perhaps merge the three opcode tables with some instructions UD#'ing depending on + CPU type. */ + if (cpu_s->cpu_type == CPU_PENTIUM2D) + x86_setopcodes(ops_386, ops_pentium2d_0f, dynarec_ops_386, dynarec_ops_pentium2d_0f); + else if (cpu_s->cpu_type == CPU_PENTIUM2) + x86_setopcodes(ops_386, ops_pentium2_0f, dynarec_ops_386, dynarec_ops_pentium2_0f); + else + x86_setopcodes(ops_386, ops_pentiumpro_0f, dynarec_ops_386, dynarec_ops_pentiumpro_0f); + x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_686_da_a16; + x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_686_da_a32; + x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_686_db_a16; + x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_686_db_a32; + x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_686_df_a16; + x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_686_df_a32; +#else + if (cpu_s->cpu_type == CPU_PENTIUM2D) + x86_setopcodes(ops_386, ops_pentium2d_0f); + else + x86_setopcodes(ops_386, ops_pentium2_0f); +#endif + x86_opcodes_da_a16 = ops_fpu_686_da_a16; + x86_opcodes_da_a32 = ops_fpu_686_da_a32; + x86_opcodes_db_a16 = ops_fpu_686_db_a16; + x86_opcodes_db_a32 = ops_fpu_686_db_a32; + x86_opcodes_df_a16 = ops_fpu_686_df_a16; + x86_opcodes_df_a32 = ops_fpu_686_df_a32; + + timing_rr = 1; /* register dest - register src */ + timing_rm = 2; /* register dest - memory src */ + timing_mr = 3; /* memory dest - register src */ + timing_mm = 3; + timing_rml = 2; /* register dest - memory src long */ + timing_mrl = 3; /* memory dest - register src long */ + timing_mml = 3; + timing_bt = 0; /* branch taken */ + timing_bnt = 1; /* branch not taken */ + + timing_int = 6; + timing_int_rm = 11; + timing_int_v86 = 54; + timing_int_pm = 25; + timing_int_pm_outer = 42; + timing_iret_rm = 7; + timing_iret_v86 = 27; /* unknown */ + timing_iret_pm = 10; + timing_iret_pm_outer = 27; + timing_call_rm = 4; + timing_call_pm = 4; + timing_call_pm_gate = 22; + timing_call_pm_gate_inner = 44; + timing_retf_rm = 4; + timing_retf_pm = 4; + timing_retf_pm_outer = 23; + timing_jmp_rm = 3; + timing_jmp_pm = 3; + timing_jmp_pm_gate = 18; + + timing_misaligned = 3; + + cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME; + if (cpu_s->cpu_type >= CPU_PENTIUM2) + cpu_features |= CPU_FEATURE_MMX; + msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21); + cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE | CR4_PAE | CR4_PCE; + if (cpu_s->cpu_type == CPU_PENTIUM2D) + cpu_CR4_mask |= CR4_OSFXSR; + +#ifdef USE_DYNAREC + codegen_timing_set(&codegen_timing_p6); +#endif + break; + + case CPU_CYRIX3S: +#ifdef USE_DYNAREC + x86_setopcodes(ops_386, ops_winchip2_0f, dynarec_ops_386, dynarec_ops_winchip2_0f); +#else + x86_setopcodes(ops_386, ops_winchip2_0f); +#endif + timing_rr = 1; /* register dest - register src */ + timing_rm = 2; /* register dest - memory src */ + timing_mr = 2; /* memory dest - register src */ + timing_mm = 3; + timing_rml = 2; /* register dest - memory src long */ + timing_mrl = 2; /* memory dest - register src long */ + timing_mml = 3; + timing_bt = 2; /* branch taken */ + timing_bnt = 1; /* branch not taken */ + + timing_int_rm = 26; /* unknown */ + timing_int_v86 = 82; + timing_int_pm = 44; + timing_int_pm_outer = 71; + timing_iret_rm = 7; + timing_iret_v86 = 26; + timing_iret_pm = 10; + timing_iret_pm_outer = 26; + timing_call_rm = 4; + timing_call_pm = 15; + timing_call_pm_gate = 26; + timing_call_pm_gate_inner = 35; + timing_retf_rm = 4; + timing_retf_pm = 7; + timing_retf_pm_outer = 23; + timing_jmp_rm = 5; + timing_jmp_pm = 7; + timing_jmp_pm_gate = 17; + + timing_misaligned = 2; + + cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MMX | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_3DNOW; + msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 18) | (1 << 19) | (1 << 20) | (1 << 21); + cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE | CR4_PCE; + + cpu_cyrix_alignment = 1; + +#ifdef USE_DYNAREC + codegen_timing_set(&codegen_timing_winchip); +#endif + break; + + default: + fatal("cpu_set : unknown CPU type %i\n", cpu_s->cpu_type); } switch (fpu_type) { - case FPU_NONE: - break; + case FPU_NONE: + break; - case FPU_8087: - x87_timings = x87_timings_8087; - break; + case FPU_8087: + x87_timings = x87_timings_8087; + break; - case FPU_287: - x87_timings = x87_timings_287; - break; + case FPU_287: + x87_timings = x87_timings_287; + break; - case FPU_287XL: - case FPU_387: - x87_timings = x87_timings_387; - break; + case FPU_287XL: + case FPU_387: + x87_timings = x87_timings_387; + break; - case FPU_487SX: - default: - x87_timings = x87_timings_486; - x87_concurrency = x87_concurrency_486; + case FPU_487SX: + default: + x87_timings = x87_timings_486; + x87_concurrency = x87_concurrency_486; } if (is386) { #if defined(USE_DYNAREC) && !defined(USE_GDBSTUB) - if (cpu_use_dynarec) - cpu_exec = exec386_dynarec; - else + if (cpu_use_dynarec) + cpu_exec = exec386_dynarec; + else #endif - cpu_exec = exec386; + cpu_exec = exec386; } else if (cpu_s->cpu_type >= CPU_286) - cpu_exec = exec386; + cpu_exec = exec386; else - cpu_exec = execx86; + cpu_exec = execx86; gdbstub_cpu_init(); } - void cpu_close(void) { cpu_inited = 0; } - void cpu_set_isa_speed(int speed) { if (speed) { - cpu_isa_speed = speed; - pc_speed_changed(); + cpu_isa_speed = speed; + pc_speed_changed(); } else if (cpu_busspeed >= 8000000) - cpu_isa_speed = 8000000; + cpu_isa_speed = 8000000; else - cpu_isa_speed = cpu_busspeed; + cpu_isa_speed = cpu_busspeed; cpu_log("cpu_set_isa_speed(%d) = %d\n", speed, cpu_isa_speed); } - void cpu_set_pci_speed(int speed) { if (speed) - cpu_pci_speed = speed; + cpu_pci_speed = speed; else if (cpu_busspeed < 42500000) - cpu_pci_speed = cpu_busspeed; + cpu_pci_speed = cpu_busspeed; else if (cpu_busspeed < 84000000) - cpu_pci_speed = cpu_busspeed / 2; + cpu_pci_speed = cpu_busspeed / 2; else if (cpu_busspeed < 120000000) - cpu_pci_speed = cpu_busspeed / 3; + cpu_pci_speed = cpu_busspeed / 3; else - cpu_pci_speed = cpu_busspeed / 4; + cpu_pci_speed = cpu_busspeed / 4; if (cpu_isa_pci_div) - cpu_set_isa_pci_div(cpu_isa_pci_div); + cpu_set_isa_pci_div(cpu_isa_pci_div); else if (speed) - pc_speed_changed(); + pc_speed_changed(); - pci_burst_time = cpu_s->rspeed / cpu_pci_speed; + pci_burst_time = cpu_s->rspeed / cpu_pci_speed; pci_nonburst_time = 4 * pci_burst_time; cpu_log("cpu_set_pci_speed(%d) = %d\n", speed, cpu_pci_speed); } - void cpu_set_isa_pci_div(int div) { @@ -1448,1094 +1422,1148 @@ cpu_set_isa_pci_div(int div) cpu_log("cpu_set_isa_pci_div(%d)\n", cpu_isa_pci_div); if (cpu_isa_pci_div) - cpu_set_isa_speed(cpu_pci_speed / cpu_isa_pci_div); + cpu_set_isa_speed(cpu_pci_speed / cpu_isa_pci_div); else - cpu_set_isa_speed(0); + cpu_set_isa_speed(0); } - void cpu_set_agp_speed(int speed) { if (speed) { - cpu_agp_speed = speed; - pc_speed_changed(); - } - else if (cpu_busspeed < 84000000) - cpu_agp_speed = cpu_busspeed; + cpu_agp_speed = speed; + pc_speed_changed(); + } else if (cpu_busspeed < 84000000) + cpu_agp_speed = cpu_busspeed; else if (cpu_busspeed < 120000000) - cpu_agp_speed = cpu_busspeed / 1.5; + cpu_agp_speed = cpu_busspeed / 1.5; else - cpu_agp_speed = cpu_busspeed / 2; + cpu_agp_speed = cpu_busspeed / 2; - agp_burst_time = cpu_s->rspeed / cpu_agp_speed; + agp_burst_time = cpu_s->rspeed / cpu_agp_speed; agp_nonburst_time = 4 * agp_burst_time; cpu_log("cpu_set_agp_speed(%d) = %d\n", speed, cpu_agp_speed); } - char * cpu_current_pc(char *bufp) { static char buff[10]; if (bufp == NULL) - bufp = buff; + bufp = buff; sprintf(bufp, "%04X:%04X", CS, cpu_state.pc); - return(bufp); + return (bufp); } - void cpu_CPUID(void) { switch (cpu_s->cpu_type) { - case CPU_i486SX_SLENH: - if (!EAX) { - EAX = 0x00000001; - EBX = 0x756e6547; - EDX = 0x49656e69; - ECX = 0x6c65746e; - } else if (EAX == 1) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_VME; - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_i486SX_SLENH: + if (!EAX) { + EAX = 0x00000001; + EBX = 0x756e6547; + EDX = 0x49656e69; + ECX = 0x6c65746e; + } else if (EAX == 1) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_VME; + } else + EAX = EBX = ECX = EDX = 0; + break; - case CPU_i486DX_SLENH: - if (!EAX) { - EAX = 0x00000001; - EBX = 0x756e6547; - EDX = 0x49656e69; - ECX = 0x6c65746e; - } else if (EAX == 1) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_VME; - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_i486DX_SLENH: + if (!EAX) { + EAX = 0x00000001; + EBX = 0x756e6547; + EDX = 0x49656e69; + ECX = 0x6c65746e; + } else if (EAX == 1) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_VME; + } else + EAX = EBX = ECX = EDX = 0; + break; - case CPU_ENH_Am486DX: - if (!EAX) { - EAX = 1; - EBX = 0x68747541; - ECX = 0x444D4163; - EDX = 0x69746E65; - } else if (EAX == 1) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU; /*FPU*/ - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_ENH_Am486DX: + if (!EAX) { + EAX = 1; + EBX = 0x68747541; + ECX = 0x444D4163; + EDX = 0x69746E65; + } else if (EAX == 1) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU; /*FPU*/ + } else + EAX = EBX = ECX = EDX = 0; + break; - case CPU_WINCHIP: - if (!EAX) { - EAX = 1; - if (msr.fcr2 & (1 << 14)) { - EBX = msr.fcr3 >> 32; - ECX = msr.fcr3 & 0xffffffff; - EDX = msr.fcr2 >> 32; - } else { - EBX = 0x746e6543; /* CentaurHauls */ - ECX = 0x736c7561; - EDX = 0x48727561; - } - } else if (EAX == 1) { - EAX = 0x540; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR; - if (cpu_has_feature(CPU_FEATURE_CX8)) - EDX |= CPUID_CMPXCHG8B; - if (msr.fcr & (1 << 9)) - EDX |= CPUID_MMX; - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_WINCHIP: + if (!EAX) { + EAX = 1; + if (msr.fcr2 & (1 << 14)) { + EBX = msr.fcr3 >> 32; + ECX = msr.fcr3 & 0xffffffff; + EDX = msr.fcr2 >> 32; + } else { + EBX = 0x746e6543; /* CentaurHauls */ + ECX = 0x736c7561; + EDX = 0x48727561; + } + } else if (EAX == 1) { + EAX = 0x540; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR; + if (cpu_has_feature(CPU_FEATURE_CX8)) + EDX |= CPUID_CMPXCHG8B; + if (msr.fcr & (1 << 9)) + EDX |= CPUID_MMX; + } else + EAX = EBX = ECX = EDX = 0; + break; - case CPU_WINCHIP2: - switch (EAX) { - case 0: - EAX = 1; - if (msr.fcr2 & (1 << 14)) { - EBX = msr.fcr3 >> 32; - ECX = msr.fcr3 & 0xffffffff; - EDX = msr.fcr2 >> 32; - } else { - EBX = 0x746e6543; /* CentaurHauls */ - ECX = 0x736c7561; - EDX = 0x48727561; - } - break; - case 1: - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR; - if (cpu_has_feature(CPU_FEATURE_CX8)) - EDX |= CPUID_CMPXCHG8B; - if (msr.fcr & (1 << 9)) - EDX |= CPUID_MMX; - break; - case 0x80000000: - EAX = 0x80000005; - break; - case 0x80000001: - EAX = CPUID; - EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR; - if (cpu_has_feature(CPU_FEATURE_CX8)) - EDX |= CPUID_CMPXCHG8B; - if (msr.fcr & (1 << 9)) - EDX |= CPUID_MMX; - if (cpu_has_feature(CPU_FEATURE_3DNOW)) - EDX |= CPUID_3DNOW; - break; + case CPU_WINCHIP2: + switch (EAX) { + case 0: + EAX = 1; + if (msr.fcr2 & (1 << 14)) { + EBX = msr.fcr3 >> 32; + ECX = msr.fcr3 & 0xffffffff; + EDX = msr.fcr2 >> 32; + } else { + EBX = 0x746e6543; /* CentaurHauls */ + ECX = 0x736c7561; + EDX = 0x48727561; + } + break; + case 1: + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR; + if (cpu_has_feature(CPU_FEATURE_CX8)) + EDX |= CPUID_CMPXCHG8B; + if (msr.fcr & (1 << 9)) + EDX |= CPUID_MMX; + break; + case 0x80000000: + EAX = 0x80000005; + break; + case 0x80000001: + EAX = CPUID; + EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR; + if (cpu_has_feature(CPU_FEATURE_CX8)) + EDX |= CPUID_CMPXCHG8B; + if (msr.fcr & (1 << 9)) + EDX |= CPUID_MMX; + if (cpu_has_feature(CPU_FEATURE_3DNOW)) + EDX |= CPUID_3DNOW; + break; - case 0x80000002: /* Processor name string */ - EAX = 0x20544449; /* IDT WinChip 2-3D */ - EBX = 0x436e6957; - ECX = 0x20706968; - EDX = 0x44332d32; - break; + case 0x80000002: /* Processor name string */ + EAX = 0x20544449; /* IDT WinChip 2-3D */ + EBX = 0x436e6957; + ECX = 0x20706968; + EDX = 0x44332d32; + break; - case 0x80000005: /*Cache information*/ - EBX = 0x08800880; /*TLBs*/ - ECX = 0x20040120; /*L1 data cache*/ - EDX = 0x20020120; /*L1 instruction cache*/ - break; + case 0x80000005: /*Cache information*/ + EBX = 0x08800880; /*TLBs*/ + ECX = 0x20040120; /*L1 data cache*/ + EDX = 0x20020120; /*L1 instruction cache*/ + break; - default: - EAX = EBX = ECX = EDX = 0; - break; - } - break; + default: + EAX = EBX = ECX = EDX = 0; + break; + } + break; - case CPU_P24T: - case CPU_PENTIUM: - if (!EAX) { - EAX = 0x00000001; - EBX = 0x756e6547; - EDX = 0x49656e69; - ECX = 0x6c65746e; - } else if (EAX == 1) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B; - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_P24T: + case CPU_PENTIUM: + if (!EAX) { + EAX = 0x00000001; + EBX = 0x756e6547; + EDX = 0x49656e69; + ECX = 0x6c65746e; + } else if (EAX == 1) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B; + } else + EAX = EBX = ECX = EDX = 0; + break; #if defined(DEV_BRANCH) && defined(USE_AMD_K5) - case CPU_K5: - if (!EAX) { - EAX = 0x00000001; - EBX = 0x68747541; - EDX = 0x69746E65; - ECX = 0x444D4163; - } else if (EAX == 1) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B; - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_K5: + if (!EAX) { + EAX = 0x00000001; + EBX = 0x68747541; + EDX = 0x69746E65; + ECX = 0x444D4163; + } else if (EAX == 1) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B; + } else + EAX = EBX = ECX = EDX = 0; + break; - case CPU_5K86: - if (!EAX) { - EAX = 0x00000001; - EBX = 0x68747541; - EDX = 0x69746E65; - ECX = 0x444D4163; - } else if (EAX == 1) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B; - } else if (EAX == 0x80000000) { - EAX = 0x80000005; - EBX = ECX = EDX = 0; - } else if (EAX == 0x80000001) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B; - } else if (EAX == 0x80000002) { - EAX = 0x2D444D41; - EBX = 0x7428354B; - ECX = 0x5020296D; - EDX = 0x65636F72; - } else if (EAX == 0x80000003) { - EAX = 0x726F7373; - EBX = ECX = EDX = 0; - } else if (EAX == 0x80000004) - EAX = EBX = ECX = EDX = 0; - else if (EAX == 0x80000005) { - EAX = 0; - EBX = 0x04800000; - ECX = 0x08040120; - EDX = 0x10040120; - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_5K86: + if (!EAX) { + EAX = 0x00000001; + EBX = 0x68747541; + EDX = 0x69746E65; + ECX = 0x444D4163; + } else if (EAX == 1) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B; + } else if (EAX == 0x80000000) { + EAX = 0x80000005; + EBX = ECX = EDX = 0; + } else if (EAX == 0x80000001) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B; + } else if (EAX == 0x80000002) { + EAX = 0x2D444D41; + EBX = 0x7428354B; + ECX = 0x5020296D; + EDX = 0x65636F72; + } else if (EAX == 0x80000003) { + EAX = 0x726F7373; + EBX = ECX = EDX = 0; + } else if (EAX == 0x80000004) + EAX = EBX = ECX = EDX = 0; + else if (EAX == 0x80000005) { + EAX = 0; + EBX = 0x04800000; + ECX = 0x08040120; + EDX = 0x10040120; + } else + EAX = EBX = ECX = EDX = 0; + break; #endif - case CPU_K6: - if (!EAX) { - EAX = 0x00000001; - EBX = 0x68747541; - EDX = 0x69746E65; - ECX = 0x444D4163; - } else if (EAX == 1) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX; - } else if (EAX == 0x80000000) { - EAX = 0x80000005; - EBX = ECX = EDX = 0; - } else if (EAX == 0x80000001) { - EAX = CPUID + 0x100; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX; - } else if (EAX == 0x80000002) { - EAX = 0x2D444D41; - EBX = 0x6D74364B; - ECX = 0x202F7720; - EDX = 0x746C756D; - } else if (EAX == 0x80000003) { - EAX = 0x64656D69; - EBX = 0x65206169; - ECX = 0x6E657478; - EDX = 0x6E6F6973; - } else if (EAX == 0x80000004) { - EAX = 0x73; - EBX = ECX = EDX = 0; - } else if (EAX == 0x80000005) { - EAX = 0; - EBX = 0x02800140; - ECX = 0x20020220; - EDX = 0x20020220; - } else if (EAX == 0x8FFFFFFF) { - EAX = 0x4778654E; - EBX = 0x72656E65; - ECX = 0x6F697461; - EDX = 0x444D416E; - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_K6: + if (!EAX) { + EAX = 0x00000001; + EBX = 0x68747541; + EDX = 0x69746E65; + ECX = 0x444D4163; + } else if (EAX == 1) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX; + } else if (EAX == 0x80000000) { + EAX = 0x80000005; + EBX = ECX = EDX = 0; + } else if (EAX == 0x80000001) { + EAX = CPUID + 0x100; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX; + } else if (EAX == 0x80000002) { + EAX = 0x2D444D41; + EBX = 0x6D74364B; + ECX = 0x202F7720; + EDX = 0x746C756D; + } else if (EAX == 0x80000003) { + EAX = 0x64656D69; + EBX = 0x65206169; + ECX = 0x6E657478; + EDX = 0x6E6F6973; + } else if (EAX == 0x80000004) { + EAX = 0x73; + EBX = ECX = EDX = 0; + } else if (EAX == 0x80000005) { + EAX = 0; + EBX = 0x02800140; + ECX = 0x20020220; + EDX = 0x20020220; + } else if (EAX == 0x8FFFFFFF) { + EAX = 0x4778654E; + EBX = 0x72656E65; + ECX = 0x6F697461; + EDX = 0x444D416E; + } else + EAX = EBX = ECX = EDX = 0; + break; - case CPU_K6_2: - case CPU_K6_2C: - switch (EAX) { - case 0: - EAX = 1; - EBX = 0x68747541; /* AuthenticAMD */ - ECX = 0x444d4163; - EDX = 0x69746e65; - break; - case 1: - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX; - break; - case 0x80000000: - EAX = 0x80000005; - EBX = ECX = EDX = 0; - break; - case 0x80000001: - EAX = CPUID + 0x100; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW; - break; - case 0x80000002: /* Processor name string */ - EAX = 0x2d444d41; /* AMD-K6(tm) 3D pr */ - EBX = 0x7428364b; - ECX = 0x3320296d; - EDX = 0x72702044; - break; - case 0x80000003: /* Processor name string */ - EAX = 0x7365636f; /* ocessor */ - EBX = 0x00726f73; - ECX = 0x00000000; - EDX = 0x00000000; - break; - case 0x80000005: /*Cache information*/ - EAX = 0; - EBX = 0x02800140; /*TLBs*/ - ECX = 0x20020220; /*L1 data cache*/ - EDX = 0x20020220; /*L1 instruction cache*/ - break; - default: - EAX = EBX = ECX = EDX = 0; - break; - } - break; + case CPU_K6_2: + case CPU_K6_2C: + switch (EAX) { + case 0: + EAX = 1; + EBX = 0x68747541; /* AuthenticAMD */ + ECX = 0x444d4163; + EDX = 0x69746e65; + break; + case 1: + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX; + break; + case 0x80000000: + EAX = 0x80000005; + EBX = ECX = EDX = 0; + break; + case 0x80000001: + EAX = CPUID + 0x100; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW; + break; + case 0x80000002: /* Processor name string */ + EAX = 0x2d444d41; /* AMD-K6(tm) 3D pr */ + EBX = 0x7428364b; + ECX = 0x3320296d; + EDX = 0x72702044; + break; + case 0x80000003: /* Processor name string */ + EAX = 0x7365636f; /* ocessor */ + EBX = 0x00726f73; + ECX = 0x00000000; + EDX = 0x00000000; + break; + case 0x80000005: /*Cache information*/ + EAX = 0; + EBX = 0x02800140; /*TLBs*/ + ECX = 0x20020220; /*L1 data cache*/ + EDX = 0x20020220; /*L1 instruction cache*/ + break; + default: + EAX = EBX = ECX = EDX = 0; + break; + } + break; - case CPU_K6_3: - switch (EAX) { - case 0: - EAX = 1; - EBX = 0x68747541; /* AuthenticAMD */ - ECX = 0x444d4163; - EDX = 0x69746e65; - break; - case 1: - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX; - break; - case 0x80000000: - EAX = 0x80000006; - EBX = ECX = EDX = 0; - break; - case 0x80000001: - EAX = CPUID + 0x100; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW; - break; - case 0x80000002: /* Processor name string */ - EAX = 0x2d444d41; /* AMD-K6(tm) 3D+ P */ - EBX = 0x7428364b; - ECX = 0x3320296d; - EDX = 0x50202b44; - break; - case 0x80000003: /* Processor name string */ - EAX = 0x65636f72; /* rocessor */ - EBX = 0x726f7373; - ECX = 0x00000000; - EDX = 0x00000000; - break; - case 0x80000005: /* Cache information */ - EAX = 0; - EBX = 0x02800140; /* TLBs */ - ECX = 0x20020220; /*L1 data cache*/ - EDX = 0x20020220; /*L1 instruction cache*/ - break; - case 0x80000006: /* L2 Cache information */ - EAX = EBX = EDX = 0; - ECX = 0x01004220; - break; - default: - EAX = EBX = ECX = EDX = 0; - break; - } - break; + case CPU_K6_3: + switch (EAX) { + case 0: + EAX = 1; + EBX = 0x68747541; /* AuthenticAMD */ + ECX = 0x444d4163; + EDX = 0x69746e65; + break; + case 1: + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX; + break; + case 0x80000000: + EAX = 0x80000006; + EBX = ECX = EDX = 0; + break; + case 0x80000001: + EAX = CPUID + 0x100; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW; + break; + case 0x80000002: /* Processor name string */ + EAX = 0x2d444d41; /* AMD-K6(tm) 3D+ P */ + EBX = 0x7428364b; + ECX = 0x3320296d; + EDX = 0x50202b44; + break; + case 0x80000003: /* Processor name string */ + EAX = 0x65636f72; /* rocessor */ + EBX = 0x726f7373; + ECX = 0x00000000; + EDX = 0x00000000; + break; + case 0x80000005: /* Cache information */ + EAX = 0; + EBX = 0x02800140; /* TLBs */ + ECX = 0x20020220; /*L1 data cache*/ + EDX = 0x20020220; /*L1 instruction cache*/ + break; + case 0x80000006: /* L2 Cache information */ + EAX = EBX = EDX = 0; + ECX = 0x01004220; + break; + default: + EAX = EBX = ECX = EDX = 0; + break; + } + break; - case CPU_K6_2P: - case CPU_K6_3P: - switch (EAX) { - case 0: - EAX = 1; - EBX = 0x68747541; /* AuthenticAMD */ - ECX = 0x444d4163; - EDX = 0x69746e65; - break; - case 1: - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX; - break; - case 0x80000000: - EAX = 0x80000007; - EBX = ECX = EDX = 0; - break; - case 0x80000001: - EAX = CPUID + 0x100; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW; - break; - case 0x80000002: /* Processor name string */ - EAX = 0x2d444d41; /* AMD-K6(tm)-III P */ - EBX = 0x7428364b; - ECX = 0x492d296d; - EDX = 0x50204949; - break; - case 0x80000003: /* Processor name string */ - EAX = 0x65636f72; /* rocessor */ - EBX = 0x726f7373; - ECX = 0x00000000; - EDX = 0x00000000; - break; - case 0x80000005: /* Cache information */ - EAX = 0; - EBX = 0x02800140; /* TLBs */ - ECX = 0x20020220; /* L1 data cache */ - EDX = 0x20020220; /* L1 instruction cache */ - break; - case 0x80000006: /* L2 Cache information */ - EAX = EBX = EDX = 0; - if (cpu_s->cpu_type == CPU_K6_3P) - ECX = 0x01004220; - else - ECX = 0x00804220; - break; - case 0x80000007: /* PowerNow information */ - EAX = EBX = ECX = 0; - EDX = 7; - break; - default: - EAX = EBX = ECX = EDX = 0; - break; - } - break; + case CPU_K6_2P: + case CPU_K6_3P: + switch (EAX) { + case 0: + EAX = 1; + EBX = 0x68747541; /* AuthenticAMD */ + ECX = 0x444d4163; + EDX = 0x69746e65; + break; + case 1: + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX; + break; + case 0x80000000: + EAX = 0x80000007; + EBX = ECX = EDX = 0; + break; + case 0x80000001: + EAX = CPUID + 0x100; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW; + break; + case 0x80000002: /* Processor name string */ + EAX = 0x2d444d41; /* AMD-K6(tm)-III P */ + EBX = 0x7428364b; + ECX = 0x492d296d; + EDX = 0x50204949; + break; + case 0x80000003: /* Processor name string */ + EAX = 0x65636f72; /* rocessor */ + EBX = 0x726f7373; + ECX = 0x00000000; + EDX = 0x00000000; + break; + case 0x80000005: /* Cache information */ + EAX = 0; + EBX = 0x02800140; /* TLBs */ + ECX = 0x20020220; /* L1 data cache */ + EDX = 0x20020220; /* L1 instruction cache */ + break; + case 0x80000006: /* L2 Cache information */ + EAX = EBX = EDX = 0; + if (cpu_s->cpu_type == CPU_K6_3P) + ECX = 0x01004220; + else + ECX = 0x00804220; + break; + case 0x80000007: /* PowerNow information */ + EAX = EBX = ECX = 0; + EDX = 7; + break; + default: + EAX = EBX = ECX = EDX = 0; + break; + } + break; - case CPU_PENTIUMMMX: - if (!EAX) { - EAX = 0x00000001; - EBX = 0x756e6547; - EDX = 0x49656e69; - ECX = 0x6c65746e; - } else if (EAX == 1) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX; - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_PENTIUMMMX: + if (!EAX) { + EAX = 0x00000001; + EBX = 0x756e6547; + EDX = 0x49656e69; + ECX = 0x6c65746e; + } else if (EAX == 1) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX; + } else + EAX = EBX = ECX = EDX = 0; + break; #if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86) - case CPU_Cx6x86: - if (!EAX) { - EAX = 0x00000001; - EBX = 0x69727943; - EDX = 0x736e4978; - ECX = 0x64616574; - } else if (EAX == 1) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU; - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_Cx6x86: + if (!EAX) { + EAX = 0x00000001; + EBX = 0x69727943; + EDX = 0x736e4978; + ECX = 0x64616574; + } else if (EAX == 1) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU; + } else + EAX = EBX = ECX = EDX = 0; + break; - case CPU_Cx6x86L: - if (!EAX) { - EAX = 0x00000001; - EBX = 0x69727943; - EDX = 0x736e4978; - ECX = 0x64616574; - } else if (EAX == 1) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_CMPXCHG8B; - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_Cx6x86L: + if (!EAX) { + EAX = 0x00000001; + EBX = 0x69727943; + EDX = 0x736e4978; + ECX = 0x64616574; + } else if (EAX == 1) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_CMPXCHG8B; + } else + EAX = EBX = ECX = EDX = 0; + break; - case CPU_CxGX1: - if (!EAX) { - EAX = 0x00000001; - EBX = 0x69727943; - EDX = 0x736e4978; - ECX = 0x64616574; - } else if (EAX == 1) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B; - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_CxGX1: + if (!EAX) { + EAX = 0x00000001; + EBX = 0x69727943; + EDX = 0x736e4978; + ECX = 0x64616574; + } else if (EAX == 1) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B; + } else + EAX = EBX = ECX = EDX = 0; + break; - case CPU_Cx6x86MX: - if (!EAX) { - EAX = 0x00000001; - EBX = 0x69727943; - EDX = 0x736e4978; - ECX = 0x64616574; - } else if (EAX == 1) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_CMOV | CPUID_MMX; - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_Cx6x86MX: + if (!EAX) { + EAX = 0x00000001; + EBX = 0x69727943; + EDX = 0x736e4978; + ECX = 0x64616574; + } else if (EAX == 1) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_CMOV | CPUID_MMX; + } else + EAX = EBX = ECX = EDX = 0; + break; #endif - case CPU_PENTIUMPRO: - if (!EAX) { - EAX = 0x00000002; - EBX = 0x756e6547; - EDX = 0x49656e69; - ECX = 0x6c65746e; - } else if (EAX == 1) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MTRR | CPUID_MCA | CPUID_SEP | CPUID_CMOV; - } else if (EAX == 2) { - EAX = 0x00000001; - EBX = ECX = 0; - EDX = 0x00000000; - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_PENTIUMPRO: + if (!EAX) { + EAX = 0x00000002; + EBX = 0x756e6547; + EDX = 0x49656e69; + ECX = 0x6c65746e; + } else if (EAX == 1) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MTRR | CPUID_MCA | CPUID_SEP | CPUID_CMOV; + } else if (EAX == 2) { + EAX = 0x00000001; + EBX = ECX = 0; + EDX = 0x00000000; + } else + EAX = EBX = ECX = EDX = 0; + break; - case CPU_PENTIUM2: - if (!EAX) { - EAX = 0x00000002; - EBX = 0x756e6547; - EDX = 0x49656e69; - ECX = 0x6c65746e; - } else if (EAX == 1) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX | CPUID_MTRR | CPUID_MCA | CPUID_SEP | CPUID_CMOV; - } else if (EAX == 2) { - EAX = 0x00000001; - EBX = ECX = 0; - EDX = 0x00000000; - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_PENTIUM2: + if (!EAX) { + EAX = 0x00000002; + EBX = 0x756e6547; + EDX = 0x49656e69; + ECX = 0x6c65746e; + } else if (EAX == 1) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX | CPUID_MTRR | CPUID_MCA | CPUID_SEP | CPUID_CMOV; + } else if (EAX == 2) { + EAX = 0x00000001; + EBX = ECX = 0; + EDX = 0x00000000; + } else + EAX = EBX = ECX = EDX = 0; + break; - case CPU_PENTIUM2D: - if (!EAX) { - EAX = 0x00000002; - EBX = 0x756e6547; - EDX = 0x49656e69; - ECX = 0x6c65746e; - } else if (EAX == 1) { - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX | CPUID_MTRR | CPUID_MCA | CPUID_SEP | CPUID_FXSR | CPUID_CMOV; - } else if (EAX == 2) { - EAX = 0x00000001; - EBX = ECX = 0; - EDX = 0x00000000; - } else - EAX = EBX = ECX = EDX = 0; - break; + case CPU_PENTIUM2D: + if (!EAX) { + EAX = 0x00000002; + EBX = 0x756e6547; + EDX = 0x49656e69; + ECX = 0x6c65746e; + } else if (EAX == 1) { + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MMX | CPUID_MTRR | CPUID_MCA | CPUID_SEP | CPUID_FXSR | CPUID_CMOV; + } else if (EAX == 2) { + EAX = 0x00000001; + EBX = ECX = 0; + EDX = 0x00000000; + } else + EAX = EBX = ECX = EDX = 0; + break; - case CPU_CYRIX3S: - switch (EAX) { - case 0: - EAX = 1; - if (msr.fcr2 & (1 << 14)) { - EBX = msr.fcr3 >> 32; - ECX = msr.fcr3 & 0xffffffff; - EDX = msr.fcr2 >> 32; - } else { - EBX = 0x746e6543; /* CentaurHauls */ - ECX = 0x736c7561; - EDX = 0x48727561; - } - break; - case 1: - EAX = CPUID; - EBX = ECX = 0; - EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_MMX | CPUID_MTRR; - if (cpu_has_feature(CPU_FEATURE_CX8)) - EDX |= CPUID_CMPXCHG8B; - break; - case 0x80000000: - EAX = 0x80000005; - break; - case 0x80000001: - EAX = CPUID; - EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_MMX | CPUID_MTRR | CPUID_3DNOW; - if (cpu_has_feature(CPU_FEATURE_CX8)) - EDX |= CPUID_CMPXCHG8B; - break; - case 0x80000002: /* Processor name string */ - EAX = 0x20414956; /* VIA Samuel */ - EBX = 0x756d6153; - ECX = 0x00006c65; - EDX = 0x00000000; - break; - case 0x80000005: /* Cache information */ - EBX = 0x08800880; /* TLBs */ - ECX = 0x40040120; /* L1 data cache */ - EDX = 0x40020120; /* L1 instruction cache */ - break; - default: - EAX = EBX = ECX = EDX = 0; - break; - } - break; + case CPU_CYRIX3S: + switch (EAX) { + case 0: + EAX = 1; + if (msr.fcr2 & (1 << 14)) { + EBX = msr.fcr3 >> 32; + ECX = msr.fcr3 & 0xffffffff; + EDX = msr.fcr2 >> 32; + } else { + EBX = 0x746e6543; /* CentaurHauls */ + ECX = 0x736c7561; + EDX = 0x48727561; + } + break; + case 1: + EAX = CPUID; + EBX = ECX = 0; + EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_MMX | CPUID_MTRR; + if (cpu_has_feature(CPU_FEATURE_CX8)) + EDX |= CPUID_CMPXCHG8B; + break; + case 0x80000000: + EAX = 0x80000005; + break; + case 0x80000001: + EAX = CPUID; + EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_MMX | CPUID_MTRR | CPUID_3DNOW; + if (cpu_has_feature(CPU_FEATURE_CX8)) + EDX |= CPUID_CMPXCHG8B; + break; + case 0x80000002: /* Processor name string */ + EAX = 0x20414956; /* VIA Samuel */ + EBX = 0x756d6153; + ECX = 0x00006c65; + EDX = 0x00000000; + break; + case 0x80000005: /* Cache information */ + EBX = 0x08800880; /* TLBs */ + ECX = 0x40040120; /* L1 data cache */ + EDX = 0x40020120; /* L1 instruction cache */ + break; + default: + EAX = EBX = ECX = EDX = 0; + break; + } + break; } } - void cpu_ven_reset(void) { memset(&msr, 0, sizeof(msr)); switch (cpu_s->cpu_type) { - case CPU_K6_2P: - case CPU_K6_3P: - case CPU_K6_3: - case CPU_K6_2C: - msr.amd_psor = (cpu_s->cpu_type >= CPU_K6_3) ? 0x008cULL : 0x018cULL; - /* FALLTHROUGH */ - case CPU_K6_2: + case CPU_K6_2P: + case CPU_K6_3P: + case CPU_K6_3: + case CPU_K6_2C: + msr.amd_psor = (cpu_s->cpu_type >= CPU_K6_3) ? 0x008cULL : 0x018cULL; + /* FALLTHROUGH */ + case CPU_K6_2: #if defined(DEV_BRANCH) && defined(USE_AMD_K5) - case CPU_K5: - case CPU_5K86: + case CPU_K5: + case CPU_5K86: #endif - case CPU_K6: - msr.amd_efer = (cpu_s->cpu_type >= CPU_K6_2C) ? 2ULL : 0ULL; - break; + case CPU_K6: + msr.amd_efer = (cpu_s->cpu_type >= CPU_K6_2C) ? 2ULL : 0ULL; + break; - case CPU_PENTIUMPRO: - case CPU_PENTIUM2: - case CPU_PENTIUM2D: - msr.mtrr_cap = 0x00000508ULL; - /* FALLTHROUGH */ - break; + case CPU_PENTIUMPRO: + case CPU_PENTIUM2: + case CPU_PENTIUM2D: + msr.mtrr_cap = 0x00000508ULL; + /* FALLTHROUGH */ + break; } } - void cpu_RDMSR(void) { switch (cpu_s->cpu_type) { - case CPU_IBM386SLC: - case CPU_IBM486SLC: - case CPU_IBM486BL: - EAX = EDX = 0; - switch (ECX) { - case 0x1000: - EAX = msr.ibm_por & ((cpu_s->cpu_type > CPU_IBM386SLC) ? 0xffeff : 0xfeff); - break; + case CPU_IBM386SLC: + case CPU_IBM486SLC: + case CPU_IBM486BL: + EAX = EDX = 0; + switch (ECX) { + case 0x1000: + EAX = msr.ibm_por & ((cpu_s->cpu_type > CPU_IBM386SLC) ? 0xffeff : 0xfeff); + break; - case 0x1001: - EAX = msr.ibm_crcr & 0xffffffffff; - break; + case 0x1001: + EAX = msr.ibm_crcr & 0xffffffffff; + break; - case 0x1002: - if ((cpu_s->cpu_type > CPU_IBM386SLC) && cpu_s->multi) - EAX = msr.ibm_por2 & 0x3f000000; - break; - } - break; + case 0x1002: + if ((cpu_s->cpu_type > CPU_IBM386SLC) && cpu_s->multi) + EAX = msr.ibm_por2 & 0x3f000000; + break; + } + break; - case CPU_WINCHIP: - case CPU_WINCHIP2: - EAX = EDX = 0; - switch (ECX) { - case 0x02: - EAX = msr.tr1; - break; - case 0x0e: - EAX = msr.tr12; - break; - case 0x10: - EAX = tsc & 0xffffffff; - EDX = tsc >> 32; - break; - case 0x11: - EAX = msr.cesr; - break; - case 0x107: - EAX = msr.fcr; - break; - case 0x108: - EAX = msr.fcr2 & 0xffffffff; - EDX = msr.fcr2 >> 32; - break; - case 0x10a: - EAX = cpu_multi & 3; - break; - } - break; + case CPU_WINCHIP: + case CPU_WINCHIP2: + EAX = EDX = 0; + switch (ECX) { + case 0x02: + EAX = msr.tr1; + break; + case 0x0e: + EAX = msr.tr12; + break; + case 0x10: + EAX = tsc & 0xffffffff; + EDX = tsc >> 32; + break; + case 0x11: + EAX = msr.cesr; + break; + case 0x107: + EAX = msr.fcr; + break; + case 0x108: + EAX = msr.fcr2 & 0xffffffff; + EDX = msr.fcr2 >> 32; + break; + case 0x10a: + EAX = cpu_multi & 3; + break; + } + break; - case CPU_CYRIX3S: - EAX = EDX = 0; - switch (ECX) { - case 0x00: case 0x01: - break; - case 0x10: - EAX = tsc & 0xffffffff; - EDX = tsc >> 32; - break; - case 0x2a: - EAX = 0xc4000000; - EDX = 0; - if (cpu_dmulti == 3) - EAX |= ((0 << 25) | (0 << 24) | (0 << 23) | (1 << 22)); - else if (cpu_dmulti == 3.5) - EAX |= ((0 << 25) | (1 << 24) | (0 << 23) | (1 << 22)); - else if (cpu_dmulti == 4) - EAX |= ((0 << 25) | (0 << 24) | (1 << 23) | (0 << 22)); - else if (cpu_dmulti == 4.5) - EAX |= ((0 << 25) | (1 << 24) | (1 << 23) | (0 << 22)); - else if (cpu_dmulti == 5) - EAX |= 0; - else if (cpu_dmulti == 5.5) - EAX |= ((0 << 25) | (1 << 24) | (0 << 23) | (0 << 22)); - else if (cpu_dmulti == 6) - EAX |= ((1 << 25) | (0 << 24) | (1 << 23) | (1 << 22)); - else if (cpu_dmulti == 6.5) - EAX |= ((1 << 25) | (1 << 24) | (1 << 23) | (1 << 22)); - else if (cpu_dmulti == 7) - EAX |= ((1 << 25) | (0 << 24) | (0 << 23) | (1 << 22)); - else - EAX |= ((0 << 25) | (0 << 24) | (0 << 23) | (1 << 22)); - if (cpu_busspeed >= 84000000) - EAX |= (1 << 19); - break; - case 0x1107: - EAX = msr.fcr; - break; - case 0x1108: - EAX = msr.fcr2 & 0xffffffff; - EDX = msr.fcr2 >> 32; - break; - case 0x200: case 0x201: case 0x202: case 0x203: - case 0x204: case 0x205: case 0x206: case 0x207: - case 0x208: case 0x209: case 0x20a: case 0x20b: - case 0x20c: case 0x20d: case 0x20e: case 0x20f: - if (ECX & 1) { - EAX = msr.mtrr_physmask[(ECX - 0x200) >> 1] & 0xffffffff; - EDX = msr.mtrr_physmask[(ECX - 0x200) >> 1] >> 32; - } else { - EAX = msr.mtrr_physbase[(ECX - 0x200) >> 1] & 0xffffffff; - EDX = msr.mtrr_physbase[(ECX - 0x200) >> 1] >> 32; - } - break; - case 0x250: - EAX = msr.mtrr_fix64k_8000 & 0xffffffff; - EDX = msr.mtrr_fix64k_8000 >> 32; - break; - case 0x258: - EAX = msr.mtrr_fix16k_8000 & 0xffffffff; - EDX = msr.mtrr_fix16k_8000 >> 32; - break; - case 0x259: - EAX = msr.mtrr_fix16k_a000 & 0xffffffff; - EDX = msr.mtrr_fix16k_a000 >> 32; - break; - case 0x268: case 0x269: case 0x26a: case 0x26b: - case 0x26c: case 0x26d: case 0x26e: case 0x26f: - EAX = msr.mtrr_fix4k[ECX - 0x268] & 0xffffffff; - EDX = msr.mtrr_fix4k[ECX - 0x268] >> 32; - break; - case 0x2ff: - EAX = msr.mtrr_deftype & 0xffffffff; - EDX = msr.mtrr_deftype >> 32; - break; - } - break; + case CPU_CYRIX3S: + EAX = EDX = 0; + switch (ECX) { + case 0x00: + case 0x01: + break; + case 0x10: + EAX = tsc & 0xffffffff; + EDX = tsc >> 32; + break; + case 0x2a: + EAX = 0xc4000000; + EDX = 0; + if (cpu_dmulti == 3) + EAX |= ((0 << 25) | (0 << 24) | (0 << 23) | (1 << 22)); + else if (cpu_dmulti == 3.5) + EAX |= ((0 << 25) | (1 << 24) | (0 << 23) | (1 << 22)); + else if (cpu_dmulti == 4) + EAX |= ((0 << 25) | (0 << 24) | (1 << 23) | (0 << 22)); + else if (cpu_dmulti == 4.5) + EAX |= ((0 << 25) | (1 << 24) | (1 << 23) | (0 << 22)); + else if (cpu_dmulti == 5) + EAX |= 0; + else if (cpu_dmulti == 5.5) + EAX |= ((0 << 25) | (1 << 24) | (0 << 23) | (0 << 22)); + else if (cpu_dmulti == 6) + EAX |= ((1 << 25) | (0 << 24) | (1 << 23) | (1 << 22)); + else if (cpu_dmulti == 6.5) + EAX |= ((1 << 25) | (1 << 24) | (1 << 23) | (1 << 22)); + else if (cpu_dmulti == 7) + EAX |= ((1 << 25) | (0 << 24) | (0 << 23) | (1 << 22)); + else + EAX |= ((0 << 25) | (0 << 24) | (0 << 23) | (1 << 22)); + if (cpu_busspeed >= 84000000) + EAX |= (1 << 19); + break; + case 0x1107: + EAX = msr.fcr; + break; + case 0x1108: + EAX = msr.fcr2 & 0xffffffff; + EDX = msr.fcr2 >> 32; + break; + case 0x200: + case 0x201: + case 0x202: + case 0x203: + case 0x204: + case 0x205: + case 0x206: + case 0x207: + case 0x208: + case 0x209: + case 0x20a: + case 0x20b: + case 0x20c: + case 0x20d: + case 0x20e: + case 0x20f: + if (ECX & 1) { + EAX = msr.mtrr_physmask[(ECX - 0x200) >> 1] & 0xffffffff; + EDX = msr.mtrr_physmask[(ECX - 0x200) >> 1] >> 32; + } else { + EAX = msr.mtrr_physbase[(ECX - 0x200) >> 1] & 0xffffffff; + EDX = msr.mtrr_physbase[(ECX - 0x200) >> 1] >> 32; + } + break; + case 0x250: + EAX = msr.mtrr_fix64k_8000 & 0xffffffff; + EDX = msr.mtrr_fix64k_8000 >> 32; + break; + case 0x258: + EAX = msr.mtrr_fix16k_8000 & 0xffffffff; + EDX = msr.mtrr_fix16k_8000 >> 32; + break; + case 0x259: + EAX = msr.mtrr_fix16k_a000 & 0xffffffff; + EDX = msr.mtrr_fix16k_a000 >> 32; + break; + case 0x268: + case 0x269: + case 0x26a: + case 0x26b: + case 0x26c: + case 0x26d: + case 0x26e: + case 0x26f: + EAX = msr.mtrr_fix4k[ECX - 0x268] & 0xffffffff; + EDX = msr.mtrr_fix4k[ECX - 0x268] >> 32; + break; + case 0x2ff: + EAX = msr.mtrr_deftype & 0xffffffff; + EDX = msr.mtrr_deftype >> 32; + break; + } + break; #if defined(DEV_BRANCH) && defined(USE_AMD_K5) - case CPU_K5: - case CPU_5K86: + case CPU_K5: + case CPU_5K86: #endif - case CPU_K6: - case CPU_K6_2: - case CPU_K6_2C: - case CPU_K6_3: - case CPU_K6_2P: - case CPU_K6_3P: - EAX = EDX = 0; - switch (ECX) { - case 0x00000000: - case 0x00000001: - break; - case 0x0000000e: - EAX = msr.tr12; - break; - case 0x00000010: - EAX = tsc & 0xffffffff; - EDX = tsc >> 32; - break; - case 0x00000083: - EAX = msr.ecx83 & 0xffffffff; - EDX = msr.ecx83 >> 32; - break; - case 0xc0000080: - EAX = msr.amd_efer & 0xffffffff; - EDX = msr.amd_efer >> 32; - break; - case 0xc0000081: - if (cpu_s->cpu_type < CPU_K6_2) - goto amd_k_invalid_rdmsr; + case CPU_K6: + case CPU_K6_2: + case CPU_K6_2C: + case CPU_K6_3: + case CPU_K6_2P: + case CPU_K6_3P: + EAX = EDX = 0; + switch (ECX) { + case 0x00000000: + case 0x00000001: + break; + case 0x0000000e: + EAX = msr.tr12; + break; + case 0x00000010: + EAX = tsc & 0xffffffff; + EDX = tsc >> 32; + break; + case 0x00000083: + EAX = msr.ecx83 & 0xffffffff; + EDX = msr.ecx83 >> 32; + break; + case 0xc0000080: + EAX = msr.amd_efer & 0xffffffff; + EDX = msr.amd_efer >> 32; + break; + case 0xc0000081: + if (cpu_s->cpu_type < CPU_K6_2) + goto amd_k_invalid_rdmsr; - EAX = msr.star & 0xffffffff; - EDX = msr.star >> 32; - break; - case 0xc0000082: - EAX = msr.amd_whcr & 0xffffffff; - EDX = msr.amd_whcr >> 32; - break; - case 0xc0000085: - if (cpu_s->cpu_type < CPU_K6_2C) - goto amd_k_invalid_rdmsr; + EAX = msr.star & 0xffffffff; + EDX = msr.star >> 32; + break; + case 0xc0000082: + EAX = msr.amd_whcr & 0xffffffff; + EDX = msr.amd_whcr >> 32; + break; + case 0xc0000085: + if (cpu_s->cpu_type < CPU_K6_2C) + goto amd_k_invalid_rdmsr; - EAX = msr.amd_uwccr & 0xffffffff; - EDX = msr.amd_uwccr >> 32; - break; - case 0xc0000086: - if (cpu_s->cpu_type < CPU_K6_2P) - goto amd_k_invalid_rdmsr; + EAX = msr.amd_uwccr & 0xffffffff; + EDX = msr.amd_uwccr >> 32; + break; + case 0xc0000086: + if (cpu_s->cpu_type < CPU_K6_2P) + goto amd_k_invalid_rdmsr; - EAX = msr.amd_epmr & 0xffffffff; - EDX = msr.amd_epmr >> 32; - break; - case 0xc0000087: - if (cpu_s->cpu_type < CPU_K6_2C) - goto amd_k_invalid_rdmsr; + EAX = msr.amd_epmr & 0xffffffff; + EDX = msr.amd_epmr >> 32; + break; + case 0xc0000087: + if (cpu_s->cpu_type < CPU_K6_2C) + goto amd_k_invalid_rdmsr; - EAX = msr.amd_psor & 0xffffffff; - EDX = msr.amd_psor >> 32; - break; - case 0xc0000088: - if (cpu_s->cpu_type < CPU_K6_2C) - goto amd_k_invalid_rdmsr; + EAX = msr.amd_psor & 0xffffffff; + EDX = msr.amd_psor >> 32; + break; + case 0xc0000088: + if (cpu_s->cpu_type < CPU_K6_2C) + goto amd_k_invalid_rdmsr; - EAX = msr.amd_pfir & 0xffffffff; - EDX = msr.amd_pfir >> 32; - break; - case 0xc0000089: - if (cpu_s->cpu_type < CPU_K6_3) - goto amd_k_invalid_rdmsr; + EAX = msr.amd_pfir & 0xffffffff; + EDX = msr.amd_pfir >> 32; + break; + case 0xc0000089: + if (cpu_s->cpu_type < CPU_K6_3) + goto amd_k_invalid_rdmsr; - EAX = msr.amd_l2aar & 0xffffffff; - EDX = msr.amd_l2aar >> 32; - break; - default: + EAX = msr.amd_l2aar & 0xffffffff; + EDX = msr.amd_l2aar >> 32; + break; + default: amd_k_invalid_rdmsr: - x86gpf(NULL, 0); - break; - } - break; + x86gpf(NULL, 0); + break; + } + break; - case CPU_P24T: - case CPU_PENTIUM: - case CPU_PENTIUMMMX: + case CPU_P24T: + case CPU_PENTIUM: + case CPU_PENTIUMMMX: #if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86) - case CPU_Cx6x86: - case CPU_Cx6x86L: - case CPU_CxGX1: - case CPU_Cx6x86MX: - if (cpu_s->cpu_type < CPU_Cx6x86) + case CPU_Cx6x86: + case CPU_Cx6x86L: + case CPU_CxGX1: + case CPU_Cx6x86MX: + if (cpu_s->cpu_type < CPU_Cx6x86) #endif - EAX = EDX = 0; - switch (ECX) { - case 0x00: case 0x01: - break; - case 0x10: - EAX = tsc & 0xffffffff; - EDX = tsc >> 32; - break; - } - cpu_log("RDMSR: ECX = %08X, val = %08X%08X\n", ECX, EDX, EAX); - break; + EAX = EDX = 0; + switch (ECX) { + case 0x00: + case 0x01: + break; + case 0x10: + EAX = tsc & 0xffffffff; + EDX = tsc >> 32; + break; + } + cpu_log("RDMSR: ECX = %08X, val = %08X%08X\n", ECX, EDX, EAX); + break; - case CPU_PENTIUMPRO: - case CPU_PENTIUM2: - case CPU_PENTIUM2D: - EAX = EDX = 0; - switch (ECX) { - case 0x00: case 0x01: - break; - case 0x10: - EAX = tsc & 0xffffffff; - EDX = tsc >> 32; - break; - case 0x17: - if (cpu_s->cpu_type != CPU_PENTIUM2D) - goto i686_invalid_rdmsr; + case CPU_PENTIUMPRO: + case CPU_PENTIUM2: + case CPU_PENTIUM2D: + EAX = EDX = 0; + switch (ECX) { + case 0x00: + case 0x01: + break; + case 0x10: + EAX = tsc & 0xffffffff; + EDX = tsc >> 32; + break; + case 0x17: + if (cpu_s->cpu_type != CPU_PENTIUM2D) + goto i686_invalid_rdmsr; - if (cpu_f->package == CPU_PKG_SLOT2) - EDX |= 0x80000; - else if (cpu_f->package == CPU_PKG_SOCKET370) - EDX |= 0x100000; - break; - case 0x1B: - EAX = msr.apic_base & 0xffffffff; - EDX = msr.apic_base >> 32; - cpu_log("APIC_BASE read : %08X%08X\n", EDX, EAX); - break; - case 0x2a: - EAX = 0xc4000000; - EDX = 0; - if (cpu_dmulti == 2.5) - EAX |= ((0 << 25) | (1 << 24) | (1 << 23) | (1 << 22)); - else if (cpu_dmulti == 3) - EAX |= ((0 << 25) | (0 << 24) | (0 << 23) | (1 << 22)); - else if (cpu_dmulti == 3.5) - EAX |= ((0 << 25) | (1 << 24) | (0 << 23) | (1 << 22)); - else if (cpu_dmulti == 4) - EAX |= ((0 << 25) | (0 << 24) | (1 << 23) | (0 << 22)); - else if (cpu_dmulti == 4.5) - EAX |= ((0 << 25) | (1 << 24) | (1 << 23) | (0 << 22)); - else if (cpu_dmulti == 5) - EAX |= 0; - else if (cpu_dmulti == 5.5) - EAX |= ((0 << 25) | (1 << 24) | (0 << 23) | (0 << 22)); - else if (cpu_dmulti == 6) - EAX |= ((1 << 25) | (0 << 24) | (1 << 23) | (1 << 22)); - else if (cpu_dmulti == 6.5) - EAX |= ((1 << 25) | (1 << 24) | (1 << 23) | (1 << 22)); - else if (cpu_dmulti == 7) - EAX |= ((1 << 25) | (0 << 24) | (0 << 23) | (1 << 22)); - else if (cpu_dmulti == 7.5) - EAX |= ((1 << 25) | (1 << 24) | (0 << 23) | (1 << 22)); - else if (cpu_dmulti == 8) - EAX |= ((1 << 25) | (0 << 24) | (1 << 23) | (0 << 22)); - else - EAX |= ((0 << 25) | (1 << 24) | (1 << 23) | (1 << 22)); - if (cpu_s->cpu_type != CPU_PENTIUMPRO) { - if (cpu_busspeed >= 84000000) - EAX |= (1 << 19); - } - break; - case 0x79: - EAX = msr.ecx79 & 0xffffffff; - EDX = msr.ecx79 >> 32; - break; - case 0x88: case 0x89: case 0x8a: case 0x8b: - EAX = msr.ecx8x[ECX - 0x88] & 0xffffffff; - EDX = msr.ecx8x[ECX - 0x88] >> 32; - break; - case 0xc1: case 0xc2: case 0xc3: case 0xc4: - case 0xc5: case 0xc6: case 0xc7: case 0xc8: - EAX = msr.ia32_pmc[ECX - 0xC1] & 0xffffffff; - EDX = msr.ia32_pmc[ECX - 0xC1] >> 32; - break; - case 0xfe: - EAX = msr.mtrr_cap & 0xffffffff; - EDX = msr.mtrr_cap >> 32; - break; - case 0x116: - EAX = msr.ecx116 & 0xffffffff; - EDX = msr.ecx116 >> 32; - break; - case 0x118: case 0x119: case 0x11a: case 0x11b: - EAX = msr.ecx11x[ECX - 0x118] & 0xffffffff; - EDX = msr.ecx11x[ECX - 0x118] >> 32; - break; - case 0x11e: - EAX = msr.ecx11e & 0xffffffff; - EDX = msr.ecx11e >> 32; - break; - case 0x174: - if (cpu_s->cpu_type == CPU_PENTIUMPRO) - goto i686_invalid_rdmsr; + if (cpu_f->package == CPU_PKG_SLOT2) + EDX |= 0x80000; + else if (cpu_f->package == CPU_PKG_SOCKET370) + EDX |= 0x100000; + break; + case 0x1B: + EAX = msr.apic_base & 0xffffffff; + EDX = msr.apic_base >> 32; + cpu_log("APIC_BASE read : %08X%08X\n", EDX, EAX); + break; + case 0x2a: + EAX = 0xc4000000; + EDX = 0; + if (cpu_dmulti == 2.5) + EAX |= ((0 << 25) | (1 << 24) | (1 << 23) | (1 << 22)); + else if (cpu_dmulti == 3) + EAX |= ((0 << 25) | (0 << 24) | (0 << 23) | (1 << 22)); + else if (cpu_dmulti == 3.5) + EAX |= ((0 << 25) | (1 << 24) | (0 << 23) | (1 << 22)); + else if (cpu_dmulti == 4) + EAX |= ((0 << 25) | (0 << 24) | (1 << 23) | (0 << 22)); + else if (cpu_dmulti == 4.5) + EAX |= ((0 << 25) | (1 << 24) | (1 << 23) | (0 << 22)); + else if (cpu_dmulti == 5) + EAX |= 0; + else if (cpu_dmulti == 5.5) + EAX |= ((0 << 25) | (1 << 24) | (0 << 23) | (0 << 22)); + else if (cpu_dmulti == 6) + EAX |= ((1 << 25) | (0 << 24) | (1 << 23) | (1 << 22)); + else if (cpu_dmulti == 6.5) + EAX |= ((1 << 25) | (1 << 24) | (1 << 23) | (1 << 22)); + else if (cpu_dmulti == 7) + EAX |= ((1 << 25) | (0 << 24) | (0 << 23) | (1 << 22)); + else if (cpu_dmulti == 7.5) + EAX |= ((1 << 25) | (1 << 24) | (0 << 23) | (1 << 22)); + else if (cpu_dmulti == 8) + EAX |= ((1 << 25) | (0 << 24) | (1 << 23) | (0 << 22)); + else + EAX |= ((0 << 25) | (1 << 24) | (1 << 23) | (1 << 22)); + if (cpu_s->cpu_type != CPU_PENTIUMPRO) { + if (cpu_busspeed >= 84000000) + EAX |= (1 << 19); + } + break; + case 0x79: + EAX = msr.ecx79 & 0xffffffff; + EDX = msr.ecx79 >> 32; + break; + case 0x88: + case 0x89: + case 0x8a: + case 0x8b: + EAX = msr.ecx8x[ECX - 0x88] & 0xffffffff; + EDX = msr.ecx8x[ECX - 0x88] >> 32; + break; + case 0xc1: + case 0xc2: + case 0xc3: + case 0xc4: + case 0xc5: + case 0xc6: + case 0xc7: + case 0xc8: + EAX = msr.ia32_pmc[ECX - 0xC1] & 0xffffffff; + EDX = msr.ia32_pmc[ECX - 0xC1] >> 32; + break; + case 0xfe: + EAX = msr.mtrr_cap & 0xffffffff; + EDX = msr.mtrr_cap >> 32; + break; + case 0x116: + EAX = msr.ecx116 & 0xffffffff; + EDX = msr.ecx116 >> 32; + break; + case 0x118: + case 0x119: + case 0x11a: + case 0x11b: + EAX = msr.ecx11x[ECX - 0x118] & 0xffffffff; + EDX = msr.ecx11x[ECX - 0x118] >> 32; + break; + case 0x11e: + EAX = msr.ecx11e & 0xffffffff; + EDX = msr.ecx11e >> 32; + break; + case 0x174: + if (cpu_s->cpu_type == CPU_PENTIUMPRO) + goto i686_invalid_rdmsr; - EAX &= 0xffff0000; - EAX |= msr.sysenter_cs; - EDX = 0x00000000; - break; - case 0x175: - if (cpu_s->cpu_type == CPU_PENTIUMPRO) - goto i686_invalid_rdmsr; + EAX &= 0xffff0000; + EAX |= msr.sysenter_cs; + EDX = 0x00000000; + break; + case 0x175: + if (cpu_s->cpu_type == CPU_PENTIUMPRO) + goto i686_invalid_rdmsr; - EAX = msr.sysenter_esp; - EDX = 0x00000000; - break; - case 0x176: - if (cpu_s->cpu_type == CPU_PENTIUMPRO) - goto i686_invalid_rdmsr; + EAX = msr.sysenter_esp; + EDX = 0x00000000; + break; + case 0x176: + if (cpu_s->cpu_type == CPU_PENTIUMPRO) + goto i686_invalid_rdmsr; - EAX = msr.sysenter_eip; - EDX = 0x00000000; - break; - case 0x179: - EAX = 0x00000105; - EDX = 0x00000000; - break; - case 0x17a: - break; - case 0x17b: - EAX = msr.mcg_ctl & 0xffffffff; - EDX = msr.mcg_ctl >> 32; - break; - case 0x186: - EAX = msr.ecx186 & 0xffffffff; - EDX = msr.ecx186 >> 32; - break; - case 0x187: - EAX = msr.ecx187 & 0xffffffff; - EDX = msr.ecx187 >> 32; - break; - case 0x1e0: - EAX = msr.ecx1e0 & 0xffffffff; - EDX = msr.ecx1e0 >> 32; - break; - case 0x200: case 0x201: case 0x202: case 0x203: - case 0x204: case 0x205: case 0x206: case 0x207: - case 0x208: case 0x209: case 0x20a: case 0x20b: - case 0x20c: case 0x20d: case 0x20e: case 0x20f: - if (ECX & 1) { - EAX = msr.mtrr_physmask[(ECX - 0x200) >> 1] & 0xffffffff; - EDX = msr.mtrr_physmask[(ECX - 0x200) >> 1] >> 32; - } else { - EAX = msr.mtrr_physbase[(ECX - 0x200) >> 1] & 0xffffffff; - EDX = msr.mtrr_physbase[(ECX - 0x200) >> 1] >> 32; - } - break; - case 0x250: - EAX = msr.mtrr_fix64k_8000 & 0xffffffff; - EDX = msr.mtrr_fix64k_8000 >> 32; - break; - case 0x258: - EAX = msr.mtrr_fix16k_8000 & 0xffffffff; - EDX = msr.mtrr_fix16k_8000 >> 32; - break; - case 0x259: - EAX = msr.mtrr_fix16k_a000 & 0xffffffff; - EDX = msr.mtrr_fix16k_a000 >> 32; - break; - case 0x268: case 0x269: case 0x26a: case 0x26b: - case 0x26c: case 0x26d: case 0x26e: case 0x26f: - EAX = msr.mtrr_fix4k[ECX - 0x268] & 0xffffffff; - EDX = msr.mtrr_fix4k[ECX - 0x268] >> 32; - break; - case 0x277: - EAX = msr.pat & 0xffffffff; - EDX = msr.pat >> 32; - break; - case 0x2ff: - EAX = msr.mtrr_deftype & 0xffffffff; - EDX = msr.mtrr_deftype >> 32; - break; - case 0x400: case 0x404: case 0x408: case 0x40c: - case 0x410: - EAX = msr.mca_ctl[(ECX - 0x400) >> 2] & 0xffffffff; - EDX = msr.mca_ctl[(ECX - 0x400) >> 2] >> 32; - break; - case 0x401: case 0x402: case 0x405: case 0x406: - case 0x407: case 0x409: case 0x40d: case 0x40e: - case 0x411: case 0x412: - break; - case 0x570: - EAX = msr.ecx570 & 0xffffffff; - EDX = msr.ecx570 >> 32; - break; - case 0x1002ff: - EAX = msr.ecx1002ff & 0xffffffff; - EDX = msr.ecx1002ff >> 32; - break; - case 0xf0f00250: - EAX = msr.ecxf0f00250 & 0xffffffff; - EDX = msr.ecxf0f00250 >> 32; - break; - case 0xf0f00258: - EAX = msr.ecxf0f00258 & 0xffffffff; - EDX = msr.ecxf0f00258 >> 32; - break; - case 0xf0f00259: - EAX = msr.ecxf0f00259 & 0xffffffff; - EDX = msr.ecxf0f00259 >> 32; - break; - default: + EAX = msr.sysenter_eip; + EDX = 0x00000000; + break; + case 0x179: + EAX = 0x00000105; + EDX = 0x00000000; + break; + case 0x17a: + break; + case 0x17b: + EAX = msr.mcg_ctl & 0xffffffff; + EDX = msr.mcg_ctl >> 32; + break; + case 0x186: + EAX = msr.ecx186 & 0xffffffff; + EDX = msr.ecx186 >> 32; + break; + case 0x187: + EAX = msr.ecx187 & 0xffffffff; + EDX = msr.ecx187 >> 32; + break; + case 0x1e0: + EAX = msr.ecx1e0 & 0xffffffff; + EDX = msr.ecx1e0 >> 32; + break; + case 0x200: + case 0x201: + case 0x202: + case 0x203: + case 0x204: + case 0x205: + case 0x206: + case 0x207: + case 0x208: + case 0x209: + case 0x20a: + case 0x20b: + case 0x20c: + case 0x20d: + case 0x20e: + case 0x20f: + if (ECX & 1) { + EAX = msr.mtrr_physmask[(ECX - 0x200) >> 1] & 0xffffffff; + EDX = msr.mtrr_physmask[(ECX - 0x200) >> 1] >> 32; + } else { + EAX = msr.mtrr_physbase[(ECX - 0x200) >> 1] & 0xffffffff; + EDX = msr.mtrr_physbase[(ECX - 0x200) >> 1] >> 32; + } + break; + case 0x250: + EAX = msr.mtrr_fix64k_8000 & 0xffffffff; + EDX = msr.mtrr_fix64k_8000 >> 32; + break; + case 0x258: + EAX = msr.mtrr_fix16k_8000 & 0xffffffff; + EDX = msr.mtrr_fix16k_8000 >> 32; + break; + case 0x259: + EAX = msr.mtrr_fix16k_a000 & 0xffffffff; + EDX = msr.mtrr_fix16k_a000 >> 32; + break; + case 0x268: + case 0x269: + case 0x26a: + case 0x26b: + case 0x26c: + case 0x26d: + case 0x26e: + case 0x26f: + EAX = msr.mtrr_fix4k[ECX - 0x268] & 0xffffffff; + EDX = msr.mtrr_fix4k[ECX - 0x268] >> 32; + break; + case 0x277: + EAX = msr.pat & 0xffffffff; + EDX = msr.pat >> 32; + break; + case 0x2ff: + EAX = msr.mtrr_deftype & 0xffffffff; + EDX = msr.mtrr_deftype >> 32; + break; + case 0x400: + case 0x404: + case 0x408: + case 0x40c: + case 0x410: + EAX = msr.mca_ctl[(ECX - 0x400) >> 2] & 0xffffffff; + EDX = msr.mca_ctl[(ECX - 0x400) >> 2] >> 32; + break; + case 0x401: + case 0x402: + case 0x405: + case 0x406: + case 0x407: + case 0x409: + case 0x40d: + case 0x40e: + case 0x411: + case 0x412: + break; + case 0x570: + EAX = msr.ecx570 & 0xffffffff; + EDX = msr.ecx570 >> 32; + break; + case 0x1002ff: + EAX = msr.ecx1002ff & 0xffffffff; + EDX = msr.ecx1002ff >> 32; + break; + case 0xf0f00250: + EAX = msr.ecxf0f00250 & 0xffffffff; + EDX = msr.ecxf0f00250 >> 32; + break; + case 0xf0f00258: + EAX = msr.ecxf0f00258 & 0xffffffff; + EDX = msr.ecxf0f00258 >> 32; + break; + case 0xf0f00259: + EAX = msr.ecxf0f00259 & 0xffffffff; + EDX = msr.ecxf0f00259 >> 32; + break; + default: i686_invalid_rdmsr: - cpu_log("RDMSR: Invalid MSR: %08X\n", ECX); - x86gpf(NULL, 0); - break; - } - break; + cpu_log("RDMSR: Invalid MSR: %08X\n", ECX); + x86gpf(NULL, 0); + break; + } + break; } cpu_log("RDMSR %08X %08X%08X\n", ECX, EDX, EAX); } - void cpu_WRMSR(void) { @@ -2544,489 +2572,550 @@ cpu_WRMSR(void) cpu_log("WRMSR %08X %08X%08X\n", ECX, EDX, EAX); switch (cpu_s->cpu_type) { - case CPU_IBM386SLC: - case CPU_IBM486BL: - case CPU_IBM486SLC: - switch (ECX) { - case 0x1000: - msr.ibm_por = EAX & ((cpu_s->cpu_type > CPU_IBM386SLC) ? 0xffeff : 0xfeff); - cpu_cache_int_enabled = (EAX & (1 << 7)); - break; - case 0x1001: - msr.ibm_crcr = EAX & 0xffffffffff; - break; - case 0x1002: - if ((cpu_s->cpu_type > CPU_IBM386SLC) && cpu_s->multi) - msr.ibm_por2 = EAX & 0x3f000000; - break; - } - break; + case CPU_IBM386SLC: + case CPU_IBM486BL: + case CPU_IBM486SLC: + switch (ECX) { + case 0x1000: + msr.ibm_por = EAX & ((cpu_s->cpu_type > CPU_IBM386SLC) ? 0xffeff : 0xfeff); + cpu_cache_int_enabled = (EAX & (1 << 7)); + break; + case 0x1001: + msr.ibm_crcr = EAX & 0xffffffffff; + break; + case 0x1002: + if ((cpu_s->cpu_type > CPU_IBM386SLC) && cpu_s->multi) + msr.ibm_por2 = EAX & 0x3f000000; + break; + } + break; - case CPU_WINCHIP: - case CPU_WINCHIP2: - switch (ECX) { - case 0x02: - msr.tr1 = EAX & 2; - break; - case 0x0e: - msr.tr12 = EAX & 0x228; - break; - case 0x10: - tsc = EAX | ((uint64_t)EDX << 32); - break; - case 0x11: - msr.cesr = EAX & 0xff00ff; - break; - case 0x107: - msr.fcr = EAX; - if (EAX & (1 << 9)) - cpu_features |= CPU_FEATURE_MMX; - else - cpu_features &= ~CPU_FEATURE_MMX; - if (EAX & (1 << 1)) - cpu_features |= CPU_FEATURE_CX8; - else - cpu_features &= ~CPU_FEATURE_CX8; - if ((EAX & (1 << 20)) && cpu_s->cpu_type >= CPU_WINCHIP2) - cpu_features |= CPU_FEATURE_3DNOW; - else - cpu_features &= ~CPU_FEATURE_3DNOW; - if (EAX & (1 << 29)) - CPUID = 0; - else - CPUID = cpu_s->cpuid_model; - break; - case 0x108: - msr.fcr2 = EAX | ((uint64_t)EDX << 32); - break; - case 0x109: - msr.fcr3 = EAX | ((uint64_t)EDX << 32); - break; - } - break; + case CPU_WINCHIP: + case CPU_WINCHIP2: + switch (ECX) { + case 0x02: + msr.tr1 = EAX & 2; + break; + case 0x0e: + msr.tr12 = EAX & 0x228; + break; + case 0x10: + tsc = EAX | ((uint64_t) EDX << 32); + break; + case 0x11: + msr.cesr = EAX & 0xff00ff; + break; + case 0x107: + msr.fcr = EAX; + if (EAX & (1 << 9)) + cpu_features |= CPU_FEATURE_MMX; + else + cpu_features &= ~CPU_FEATURE_MMX; + if (EAX & (1 << 1)) + cpu_features |= CPU_FEATURE_CX8; + else + cpu_features &= ~CPU_FEATURE_CX8; + if ((EAX & (1 << 20)) && cpu_s->cpu_type >= CPU_WINCHIP2) + cpu_features |= CPU_FEATURE_3DNOW; + else + cpu_features &= ~CPU_FEATURE_3DNOW; + if (EAX & (1 << 29)) + CPUID = 0; + else + CPUID = cpu_s->cpuid_model; + break; + case 0x108: + msr.fcr2 = EAX | ((uint64_t) EDX << 32); + break; + case 0x109: + msr.fcr3 = EAX | ((uint64_t) EDX << 32); + break; + } + break; - case CPU_CYRIX3S: - switch (ECX) { - case 0x00: case 0x01: - break; - case 0x10: - tsc = EAX | ((uint64_t)EDX << 32); - break; - case 0x1107: - msr.fcr = EAX; - if (EAX & (1 << 1)) - cpu_features |= CPU_FEATURE_CX8; - else - cpu_features &= ~CPU_FEATURE_CX8; - break; - case 0x1108: - msr.fcr2 = EAX | ((uint64_t)EDX << 32); - break; - case 0x1109: - msr.fcr3 = EAX | ((uint64_t)EDX << 32); - break; - case 0x200: case 0x201: case 0x202: case 0x203: - case 0x204: case 0x205: case 0x206: case 0x207: - case 0x208: case 0x209: case 0x20a: case 0x20b: - case 0x20c: case 0x20d: case 0x20e: case 0x20f: - if (ECX & 1) - msr.mtrr_physmask[(ECX - 0x200) >> 1] = EAX | ((uint64_t)EDX << 32); - else - msr.mtrr_physbase[(ECX - 0x200) >> 1] = EAX | ((uint64_t)EDX << 32); - break; - case 0x250: - msr.mtrr_fix64k_8000 = EAX | ((uint64_t)EDX << 32); - break; - case 0x258: - msr.mtrr_fix16k_8000 = EAX | ((uint64_t)EDX << 32); - break; - case 0x259: - msr.mtrr_fix16k_a000 = EAX | ((uint64_t)EDX << 32); - break; - case 0x268: case 0x269: case 0x26A: case 0x26B: case 0x26C: case 0x26D: case 0x26E: case 0x26F: - msr.mtrr_fix4k[ECX - 0x268] = EAX | ((uint64_t)EDX << 32); - break; - case 0x2ff: - msr.mtrr_deftype = EAX | ((uint64_t)EDX << 32); - break; - } - break; + case CPU_CYRIX3S: + switch (ECX) { + case 0x00: + case 0x01: + break; + case 0x10: + tsc = EAX | ((uint64_t) EDX << 32); + break; + case 0x1107: + msr.fcr = EAX; + if (EAX & (1 << 1)) + cpu_features |= CPU_FEATURE_CX8; + else + cpu_features &= ~CPU_FEATURE_CX8; + break; + case 0x1108: + msr.fcr2 = EAX | ((uint64_t) EDX << 32); + break; + case 0x1109: + msr.fcr3 = EAX | ((uint64_t) EDX << 32); + break; + case 0x200: + case 0x201: + case 0x202: + case 0x203: + case 0x204: + case 0x205: + case 0x206: + case 0x207: + case 0x208: + case 0x209: + case 0x20a: + case 0x20b: + case 0x20c: + case 0x20d: + case 0x20e: + case 0x20f: + if (ECX & 1) + msr.mtrr_physmask[(ECX - 0x200) >> 1] = EAX | ((uint64_t) EDX << 32); + else + msr.mtrr_physbase[(ECX - 0x200) >> 1] = EAX | ((uint64_t) EDX << 32); + break; + case 0x250: + msr.mtrr_fix64k_8000 = EAX | ((uint64_t) EDX << 32); + break; + case 0x258: + msr.mtrr_fix16k_8000 = EAX | ((uint64_t) EDX << 32); + break; + case 0x259: + msr.mtrr_fix16k_a000 = EAX | ((uint64_t) EDX << 32); + break; + case 0x268: + case 0x269: + case 0x26A: + case 0x26B: + case 0x26C: + case 0x26D: + case 0x26E: + case 0x26F: + msr.mtrr_fix4k[ECX - 0x268] = EAX | ((uint64_t) EDX << 32); + break; + case 0x2ff: + msr.mtrr_deftype = EAX | ((uint64_t) EDX << 32); + break; + } + break; #if defined(DEV_BRANCH) && defined(USE_AMD_K5) - case CPU_K5: - case CPU_5K86: + case CPU_K5: + case CPU_5K86: #endif - case CPU_K6: - case CPU_K6_2: - case CPU_K6_2C: - case CPU_K6_3: - case CPU_K6_2P: - case CPU_K6_3P: - switch (ECX) { - case 0x00: case 0x01: - break; - case 0x0e: - msr.tr12 = EAX & 0x228; - break; - case 0x10: - tsc = EAX | ((uint64_t)EDX << 32); - break; - case 0x83: - msr.ecx83 = EAX | ((uint64_t)EDX << 32); - break; - case 0xc0000080: - temp = EAX | ((uint64_t)EDX << 32); - if (temp & ~1ULL) - x86gpf(NULL, 0); - else - msr.amd_efer = temp; - break; - case 0xc0000081: - if (cpu_s->cpu_type < CPU_K6_2) - goto amd_k_invalid_wrmsr; + case CPU_K6: + case CPU_K6_2: + case CPU_K6_2C: + case CPU_K6_3: + case CPU_K6_2P: + case CPU_K6_3P: + switch (ECX) { + case 0x00: + case 0x01: + break; + case 0x0e: + msr.tr12 = EAX & 0x228; + break; + case 0x10: + tsc = EAX | ((uint64_t) EDX << 32); + break; + case 0x83: + msr.ecx83 = EAX | ((uint64_t) EDX << 32); + break; + case 0xc0000080: + temp = EAX | ((uint64_t) EDX << 32); + if (temp & ~1ULL) + x86gpf(NULL, 0); + else + msr.amd_efer = temp; + break; + case 0xc0000081: + if (cpu_s->cpu_type < CPU_K6_2) + goto amd_k_invalid_wrmsr; - msr.star = EAX | ((uint64_t)EDX << 32); - break; - case 0xc0000082: - msr.amd_whcr = EAX | ((uint64_t)EDX << 32); - break; - case 0xc0000085: - if (cpu_s->cpu_type < CPU_K6_2C) - goto amd_k_invalid_wrmsr; + msr.star = EAX | ((uint64_t) EDX << 32); + break; + case 0xc0000082: + msr.amd_whcr = EAX | ((uint64_t) EDX << 32); + break; + case 0xc0000085: + if (cpu_s->cpu_type < CPU_K6_2C) + goto amd_k_invalid_wrmsr; - msr.amd_uwccr = EAX | ((uint64_t)EDX << 32); - break; - case 0xc0000086: - if (cpu_s->cpu_type < CPU_K6_2P) - goto amd_k_invalid_wrmsr; + msr.amd_uwccr = EAX | ((uint64_t) EDX << 32); + break; + case 0xc0000086: + if (cpu_s->cpu_type < CPU_K6_2P) + goto amd_k_invalid_wrmsr; - msr.amd_epmr = EAX | ((uint64_t)EDX << 32); - break; - case 0xc0000087: - if (cpu_s->cpu_type < CPU_K6_2C) - goto amd_k_invalid_wrmsr; + msr.amd_epmr = EAX | ((uint64_t) EDX << 32); + break; + case 0xc0000087: + if (cpu_s->cpu_type < CPU_K6_2C) + goto amd_k_invalid_wrmsr; - msr.amd_psor = EAX | ((uint64_t)EDX << 32); - break; - case 0xc0000088: - if (cpu_s->cpu_type < CPU_K6_2C) - goto amd_k_invalid_wrmsr; + msr.amd_psor = EAX | ((uint64_t) EDX << 32); + break; + case 0xc0000088: + if (cpu_s->cpu_type < CPU_K6_2C) + goto amd_k_invalid_wrmsr; - msr.amd_pfir = EAX | ((uint64_t)EDX << 32); - break; - case 0xc0000089: - if (cpu_s->cpu_type < CPU_K6_3) - goto amd_k_invalid_wrmsr; + msr.amd_pfir = EAX | ((uint64_t) EDX << 32); + break; + case 0xc0000089: + if (cpu_s->cpu_type < CPU_K6_3) + goto amd_k_invalid_wrmsr; - msr.amd_l2aar = EAX | ((uint64_t)EDX << 32); - break; - default: + msr.amd_l2aar = EAX | ((uint64_t) EDX << 32); + break; + default: amd_k_invalid_wrmsr: - x86gpf(NULL, 0); - break; - } - break; + x86gpf(NULL, 0); + break; + } + break; - case CPU_P24T: - case CPU_PENTIUM: - case CPU_PENTIUMMMX: + case CPU_P24T: + case CPU_PENTIUM: + case CPU_PENTIUMMMX: #if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86) - case CPU_Cx6x86: - case CPU_Cx6x86L: - case CPU_CxGX1: - case CPU_Cx6x86MX: + case CPU_Cx6x86: + case CPU_Cx6x86L: + case CPU_CxGX1: + case CPU_Cx6x86MX: #endif - cpu_log("WRMSR: ECX = %08X, val = %08X%08X\n", ECX, EDX, EAX); - switch (ECX) { - case 0x00: case 0x01: - break; - case 0x10: - tsc = EAX | ((uint64_t)EDX << 32); - break; - case 0x8b: + cpu_log("WRMSR: ECX = %08X, val = %08X%08X\n", ECX, EDX, EAX); + switch (ECX) { + case 0x00: + case 0x01: + break; + case 0x10: + tsc = EAX | ((uint64_t) EDX << 32); + break; + case 0x8b: #if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86) - if (cpu_s->cpu_type < CPU_Cx6x86) { + if (cpu_s->cpu_type < CPU_Cx6x86) { #endif - cpu_log("WRMSR: Invalid MSR: 0x8B\n"); - x86gpf(NULL, 0); /* Needed for Vista to correctly break on Pentium */ + cpu_log("WRMSR: Invalid MSR: 0x8B\n"); + x86gpf(NULL, 0); /* Needed for Vista to correctly break on Pentium */ #if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86) - } + } #endif - break; - } - break; + break; + } + break; - case CPU_PENTIUMPRO: - case CPU_PENTIUM2: - case CPU_PENTIUM2D: - switch (ECX) { - case 0x00: case 0x01: - if (EAX || EDX) - x86gpf(NULL, 0); - break; - case 0x10: - tsc = EAX | ((uint64_t)EDX << 32); - break; - case 0x1b: - cpu_log("APIC_BASE write: %08X%08X\n", EDX, EAX); - // msr.apic_base = EAX | ((uint64_t)EDX << 32); - break; - case 0x2a: - break; - case 0x79: - msr.ecx79 = EAX | ((uint64_t)EDX << 32); - break; - case 0x88: case 0x89: case 0x8a: case 0x8b: - msr.ecx8x[ECX - 0x88] = EAX | ((uint64_t)EDX << 32); - break; - case 0xc1: case 0xc2: case 0xc3: case 0xc4: - case 0xc5: case 0xc6: case 0xc7: case 0xc8: - msr.ia32_pmc[ECX - 0xC1] = EAX | ((uint64_t)EDX << 32); - break; - case 0xfe: - msr.mtrr_cap = EAX | ((uint64_t)EDX << 32); - break; - case 0x116: - msr.ecx116 = EAX | ((uint64_t)EDX << 32); - break; - case 0x118: case 0x119: case 0x11a: case 0x11b: - msr.ecx11x[ECX - 0x118] = EAX | ((uint64_t)EDX << 32); - break; - case 0x11e: - msr.ecx11e = EAX | ((uint64_t)EDX << 32); - break; - case 0x174: - if (cpu_s->cpu_type == CPU_PENTIUMPRO) - goto i686_invalid_wrmsr; + case CPU_PENTIUMPRO: + case CPU_PENTIUM2: + case CPU_PENTIUM2D: + switch (ECX) { + case 0x00: + case 0x01: + if (EAX || EDX) + x86gpf(NULL, 0); + break; + case 0x10: + tsc = EAX | ((uint64_t) EDX << 32); + break; + case 0x1b: + cpu_log("APIC_BASE write: %08X%08X\n", EDX, EAX); + // msr.apic_base = EAX | ((uint64_t)EDX << 32); + break; + case 0x2a: + break; + case 0x79: + msr.ecx79 = EAX | ((uint64_t) EDX << 32); + break; + case 0x88: + case 0x89: + case 0x8a: + case 0x8b: + msr.ecx8x[ECX - 0x88] = EAX | ((uint64_t) EDX << 32); + break; + case 0xc1: + case 0xc2: + case 0xc3: + case 0xc4: + case 0xc5: + case 0xc6: + case 0xc7: + case 0xc8: + msr.ia32_pmc[ECX - 0xC1] = EAX | ((uint64_t) EDX << 32); + break; + case 0xfe: + msr.mtrr_cap = EAX | ((uint64_t) EDX << 32); + break; + case 0x116: + msr.ecx116 = EAX | ((uint64_t) EDX << 32); + break; + case 0x118: + case 0x119: + case 0x11a: + case 0x11b: + msr.ecx11x[ECX - 0x118] = EAX | ((uint64_t) EDX << 32); + break; + case 0x11e: + msr.ecx11e = EAX | ((uint64_t) EDX << 32); + break; + case 0x174: + if (cpu_s->cpu_type == CPU_PENTIUMPRO) + goto i686_invalid_wrmsr; - msr.sysenter_cs = EAX & 0xFFFF; - break; - case 0x175: - if (cpu_s->cpu_type == CPU_PENTIUMPRO) - goto i686_invalid_wrmsr; + msr.sysenter_cs = EAX & 0xFFFF; + break; + case 0x175: + if (cpu_s->cpu_type == CPU_PENTIUMPRO) + goto i686_invalid_wrmsr; - msr.sysenter_esp = EAX; - break; - case 0x176: - if (cpu_s->cpu_type == CPU_PENTIUMPRO) - goto i686_invalid_wrmsr; + msr.sysenter_esp = EAX; + break; + case 0x176: + if (cpu_s->cpu_type == CPU_PENTIUMPRO) + goto i686_invalid_wrmsr; - msr.sysenter_eip = EAX; - break; - case 0x179: - break; - case 0x17a: - if (EAX || EDX) - x86gpf(NULL, 0); - break; - case 0x17b: - msr.mcg_ctl = EAX | ((uint64_t)EDX << 32); - break; - case 0x186: - msr.ecx186 = EAX | ((uint64_t)EDX << 32); - break; - case 0x187: - msr.ecx187 = EAX | ((uint64_t)EDX << 32); - break; - case 0x1e0: - msr.ecx1e0 = EAX | ((uint64_t)EDX << 32); - break; - case 0x200: case 0x201: case 0x202: case 0x203: - case 0x204: case 0x205: case 0x206: case 0x207: - case 0x208: case 0x209: case 0x20a: case 0x20b: - case 0x20c: case 0x20d: case 0x20e: case 0x20f: - if (ECX & 1) - msr.mtrr_physmask[(ECX - 0x200) >> 1] = EAX | ((uint64_t)EDX << 32); - else - msr.mtrr_physbase[(ECX - 0x200) >> 1] = EAX | ((uint64_t)EDX << 32); - break; - case 0x250: - msr.mtrr_fix64k_8000 = EAX | ((uint64_t)EDX << 32); - break; - case 0x258: - msr.mtrr_fix16k_8000 = EAX | ((uint64_t)EDX << 32); - break; - case 0x259: - msr.mtrr_fix16k_a000 = EAX | ((uint64_t)EDX << 32); - break; - case 0x268: case 0x269: case 0x26a: case 0x26b: - case 0x26c: case 0x26d: case 0x26e: case 0x26f: - msr.mtrr_fix4k[ECX - 0x268] = EAX | ((uint64_t)EDX << 32); - break; - case 0x277: - msr.pat = EAX | ((uint64_t)EDX << 32); - break; - case 0x2ff: - msr.mtrr_deftype = EAX | ((uint64_t)EDX << 32); - break; - case 0x400: case 0x404: case 0x408: case 0x40c: - case 0x410: - msr.mca_ctl[(ECX - 0x400) >> 2] = EAX | ((uint64_t)EDX << 32); - break; - case 0x401: case 0x402: case 0x405: case 0x406: - case 0x407: case 0x409: case 0x40d: case 0x40e: - case 0x411: case 0x412: - if (EAX || EDX) - x86gpf(NULL, 0); - break; - case 0x570: - msr.ecx570 = EAX | ((uint64_t)EDX << 32); - break; - case 0x1002ff: - msr.ecx1002ff = EAX | ((uint64_t)EDX << 32); - break; - case 0xf0f00250: - msr.ecxf0f00250 = EAX | ((uint64_t)EDX << 32); - break; - case 0xf0f00258: - msr.ecxf0f00258 = EAX | ((uint64_t)EDX << 32); - break; - case 0xf0f00259: - msr.ecxf0f00259 = EAX | ((uint64_t)EDX << 32); - break; - default: + msr.sysenter_eip = EAX; + break; + case 0x179: + break; + case 0x17a: + if (EAX || EDX) + x86gpf(NULL, 0); + break; + case 0x17b: + msr.mcg_ctl = EAX | ((uint64_t) EDX << 32); + break; + case 0x186: + msr.ecx186 = EAX | ((uint64_t) EDX << 32); + break; + case 0x187: + msr.ecx187 = EAX | ((uint64_t) EDX << 32); + break; + case 0x1e0: + msr.ecx1e0 = EAX | ((uint64_t) EDX << 32); + break; + case 0x200: + case 0x201: + case 0x202: + case 0x203: + case 0x204: + case 0x205: + case 0x206: + case 0x207: + case 0x208: + case 0x209: + case 0x20a: + case 0x20b: + case 0x20c: + case 0x20d: + case 0x20e: + case 0x20f: + if (ECX & 1) + msr.mtrr_physmask[(ECX - 0x200) >> 1] = EAX | ((uint64_t) EDX << 32); + else + msr.mtrr_physbase[(ECX - 0x200) >> 1] = EAX | ((uint64_t) EDX << 32); + break; + case 0x250: + msr.mtrr_fix64k_8000 = EAX | ((uint64_t) EDX << 32); + break; + case 0x258: + msr.mtrr_fix16k_8000 = EAX | ((uint64_t) EDX << 32); + break; + case 0x259: + msr.mtrr_fix16k_a000 = EAX | ((uint64_t) EDX << 32); + break; + case 0x268: + case 0x269: + case 0x26a: + case 0x26b: + case 0x26c: + case 0x26d: + case 0x26e: + case 0x26f: + msr.mtrr_fix4k[ECX - 0x268] = EAX | ((uint64_t) EDX << 32); + break; + case 0x277: + msr.pat = EAX | ((uint64_t) EDX << 32); + break; + case 0x2ff: + msr.mtrr_deftype = EAX | ((uint64_t) EDX << 32); + break; + case 0x400: + case 0x404: + case 0x408: + case 0x40c: + case 0x410: + msr.mca_ctl[(ECX - 0x400) >> 2] = EAX | ((uint64_t) EDX << 32); + break; + case 0x401: + case 0x402: + case 0x405: + case 0x406: + case 0x407: + case 0x409: + case 0x40d: + case 0x40e: + case 0x411: + case 0x412: + if (EAX || EDX) + x86gpf(NULL, 0); + break; + case 0x570: + msr.ecx570 = EAX | ((uint64_t) EDX << 32); + break; + case 0x1002ff: + msr.ecx1002ff = EAX | ((uint64_t) EDX << 32); + break; + case 0xf0f00250: + msr.ecxf0f00250 = EAX | ((uint64_t) EDX << 32); + break; + case 0xf0f00258: + msr.ecxf0f00258 = EAX | ((uint64_t) EDX << 32); + break; + case 0xf0f00259: + msr.ecxf0f00259 = EAX | ((uint64_t) EDX << 32); + break; + default: i686_invalid_wrmsr: - cpu_log("WRMSR: Invalid MSR: %08X\n", ECX); - x86gpf(NULL, 0); - break; - } - break; + cpu_log("WRMSR: Invalid MSR: %08X\n", ECX); + x86gpf(NULL, 0); + break; + } + break; } } - static void cpu_write(uint16_t addr, uint8_t val, void *priv) { if (addr == 0xf0) { - /* Writes to F0 clear FPU error and deassert the interrupt. */ - if (is286) - picintc(1 << 13); - else - nmi = 0; - return; + /* Writes to F0 clear FPU error and deassert the interrupt. */ + if (is286) + picintc(1 << 13); + else + nmi = 0; + return; } else if (addr >= 0xf1) - return; /* FPU stuff */ + return; /* FPU stuff */ if (!(addr & 1)) - cyrix_addr = val; - else switch (cyrix_addr) { - case 0xc0: /* CCR0 */ - ccr0 = val; - break; - case 0xc1: /* CCR1 */ - if ((ccr3 & CCR3_SMI_LOCK) && !in_smm) - val = (val & ~(CCR1_USE_SMI | CCR1_SMAC | CCR1_SM3)) | (ccr1 & (CCR1_USE_SMI | CCR1_SMAC | CCR1_SM3)); - ccr1 = val; - break; - case 0xc2: /* CCR2 */ - ccr2 = val; - break; - case 0xc3: /* CCR3 */ - if ((ccr3 & CCR3_SMI_LOCK) && !in_smm) - val = (val & ~(CCR3_NMI_EN)) | (ccr3 & CCR3_NMI_EN) | CCR3_SMI_LOCK; - ccr3 = val; - break; - case 0xcd: - if (!(ccr3 & CCR3_SMI_LOCK) || in_smm) { - cyrix.arr[3].base = (cyrix.arr[3].base & ~0xff000000) | (val << 24); - cyrix.smhr &= ~SMHR_VALID; - } - break; - case 0xce: - if (!(ccr3 & CCR3_SMI_LOCK) || in_smm) { - cyrix.arr[3].base = (cyrix.arr[3].base & ~0x00ff0000) | (val << 16); - cyrix.smhr &= ~SMHR_VALID; - } - break; - case 0xcf: - if (!(ccr3 & CCR3_SMI_LOCK) || in_smm) { - cyrix.arr[3].base = (cyrix.arr[3].base & ~0x0000f000) | ((val & 0xf0) << 8); - if ((val & 0xf) == 0xf) - cyrix.arr[3].size = 1ull << 32; /* 4 GB */ - else if (val & 0xf) - cyrix.arr[3].size = 2048 << (val & 0xf); - else - cyrix.arr[3].size = 0; /* Disabled */ - cyrix.smhr &= ~SMHR_VALID; - } - break; + cyrix_addr = val; + else + switch (cyrix_addr) { + case 0xc0: /* CCR0 */ + ccr0 = val; + break; + case 0xc1: /* CCR1 */ + if ((ccr3 & CCR3_SMI_LOCK) && !in_smm) + val = (val & ~(CCR1_USE_SMI | CCR1_SMAC | CCR1_SM3)) | (ccr1 & (CCR1_USE_SMI | CCR1_SMAC | CCR1_SM3)); + ccr1 = val; + break; + case 0xc2: /* CCR2 */ + ccr2 = val; + break; + case 0xc3: /* CCR3 */ + if ((ccr3 & CCR3_SMI_LOCK) && !in_smm) + val = (val & ~(CCR3_NMI_EN)) | (ccr3 & CCR3_NMI_EN) | CCR3_SMI_LOCK; + ccr3 = val; + break; + case 0xcd: + if (!(ccr3 & CCR3_SMI_LOCK) || in_smm) { + cyrix.arr[3].base = (cyrix.arr[3].base & ~0xff000000) | (val << 24); + cyrix.smhr &= ~SMHR_VALID; + } + break; + case 0xce: + if (!(ccr3 & CCR3_SMI_LOCK) || in_smm) { + cyrix.arr[3].base = (cyrix.arr[3].base & ~0x00ff0000) | (val << 16); + cyrix.smhr &= ~SMHR_VALID; + } + break; + case 0xcf: + if (!(ccr3 & CCR3_SMI_LOCK) || in_smm) { + cyrix.arr[3].base = (cyrix.arr[3].base & ~0x0000f000) | ((val & 0xf0) << 8); + if ((val & 0xf) == 0xf) + cyrix.arr[3].size = 1ull << 32; /* 4 GB */ + else if (val & 0xf) + cyrix.arr[3].size = 2048 << (val & 0xf); + else + cyrix.arr[3].size = 0; /* Disabled */ + cyrix.smhr &= ~SMHR_VALID; + } + break; - case 0xe8: /* CCR4 */ - if ((ccr3 & 0xf0) == 0x10) { - ccr4 = val; + case 0xe8: /* CCR4 */ + if ((ccr3 & 0xf0) == 0x10) { + ccr4 = val; #if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86) - if (cpu_s->cpu_type >= CPU_Cx6x86) { - if (val & 0x80) - CPUID = cpu_s->cpuid_model; - else - CPUID = 0; - } + if (cpu_s->cpu_type >= CPU_Cx6x86) { + if (val & 0x80) + CPUID = cpu_s->cpuid_model; + else + CPUID = 0; + } #endif - } - break; - case 0xe9: /* CCR5 */ - if ((ccr3 & 0xf0) == 0x10) - ccr5 = val; - break; - case 0xea: /* CCR6 */ - if ((ccr3 & 0xf0) == 0x10) - ccr6 = val; - break; - } + } + break; + case 0xe9: /* CCR5 */ + if ((ccr3 & 0xf0) == 0x10) + ccr5 = val; + break; + case 0xea: /* CCR6 */ + if ((ccr3 & 0xf0) == 0x10) + ccr6 = val; + break; + } } - static uint8_t cpu_read(uint16_t addr, void *priv) { if (addr == 0xf007) - return 0x7f; + return 0x7f; if (addr >= 0xf0) - return 0xff; /* FPU stuff */ + return 0xff; /* FPU stuff */ if (addr & 1) { - switch (cyrix_addr) { - case 0xc0: - return ccr0; - case 0xc1: - return ccr1; - case 0xc2: - return ccr2; - case 0xc3: - return ccr3; - case 0xe8: - return ((ccr3 & 0xf0) == 0x10) ? ccr4 : 0xff; - case 0xe9: - return ((ccr3 & 0xf0) == 0x10) ? ccr5 : 0xff; - case 0xea: - return ((ccr3 & 0xf0) == 0x10) ? ccr6 : 0xff; - case 0xfe: - return cpu_s->cyrix_id & 0xff; - case 0xff: - return cpu_s->cyrix_id >> 8; - } + switch (cyrix_addr) { + case 0xc0: + return ccr0; + case 0xc1: + return ccr1; + case 0xc2: + return ccr2; + case 0xc3: + return ccr3; + case 0xe8: + return ((ccr3 & 0xf0) == 0x10) ? ccr4 : 0xff; + case 0xe9: + return ((ccr3 & 0xf0) == 0x10) ? ccr5 : 0xff; + case 0xea: + return ((ccr3 & 0xf0) == 0x10) ? ccr6 : 0xff; + case 0xfe: + return cpu_s->cyrix_id & 0xff; + case 0xff: + return cpu_s->cyrix_id >> 8; + } - if ((cyrix_addr & 0xf0) == 0xc0) - return 0xff; + if ((cyrix_addr & 0xf0) == 0xc0) + return 0xff; - if (cyrix_addr == 0x20 && (cpu_s->cpu_type == CPU_Cx5x86)) - return 0xff; + if (cyrix_addr == 0x20 && (cpu_s->cpu_type == CPU_Cx5x86)) + return 0xff; } return 0xff; } - void #ifdef USE_DYNAREC x86_setopcodes(const OpFn *opcodes, const OpFn *opcodes_0f, - const OpFn *dynarec_opcodes, const OpFn *dynarec_opcodes_0f) + const OpFn *dynarec_opcodes, const OpFn *dynarec_opcodes_0f) { - x86_opcodes = opcodes; - x86_opcodes_0f = opcodes_0f; - x86_dynarec_opcodes = dynarec_opcodes; + x86_opcodes = opcodes; + x86_opcodes_0f = opcodes_0f; + x86_dynarec_opcodes = dynarec_opcodes; x86_dynarec_opcodes_0f = dynarec_opcodes_0f; } #else @@ -3037,48 +3126,47 @@ x86_setopcodes(const OpFn *opcodes, const OpFn *opcodes_0f) } #endif - void cpu_update_waitstates(void) { cpu_s = (CPU *) &cpu_f->cpus[cpu_effective]; if (is486) - cpu_prefetch_width = 16; + cpu_prefetch_width = 16; else - cpu_prefetch_width = cpu_16bitbus ? 2 : 4; + cpu_prefetch_width = cpu_16bitbus ? 2 : 4; if (cpu_cache_int_enabled) { - /* Disable prefetch emulation */ - cpu_prefetch_cycles = 0; + /* Disable prefetch emulation */ + cpu_prefetch_cycles = 0; } else if (cpu_waitstates && (cpu_s->cpu_type >= CPU_286 && cpu_s->cpu_type <= CPU_386DX)) { - /* Waitstates override */ - cpu_prefetch_cycles = cpu_waitstates+1; - cpu_cycles_read = cpu_waitstates+1; - cpu_cycles_read_l = (cpu_16bitbus ? 2 : 1) * (cpu_waitstates+1); - cpu_cycles_write = cpu_waitstates+1; - cpu_cycles_write_l = (cpu_16bitbus ? 2 : 1) * (cpu_waitstates+1); + /* Waitstates override */ + cpu_prefetch_cycles = cpu_waitstates + 1; + cpu_cycles_read = cpu_waitstates + 1; + cpu_cycles_read_l = (cpu_16bitbus ? 2 : 1) * (cpu_waitstates + 1); + cpu_cycles_write = cpu_waitstates + 1; + cpu_cycles_write_l = (cpu_16bitbus ? 2 : 1) * (cpu_waitstates + 1); } else if (cpu_cache_ext_enabled) { - /* Use cache timings */ - cpu_prefetch_cycles = cpu_s->cache_read_cycles; - cpu_cycles_read = cpu_s->cache_read_cycles; - cpu_cycles_read_l = (cpu_16bitbus ? 2 : 1) * cpu_s->cache_read_cycles; - cpu_cycles_write = cpu_s->cache_write_cycles; - cpu_cycles_write_l = (cpu_16bitbus ? 2 : 1) * cpu_s->cache_write_cycles; + /* Use cache timings */ + cpu_prefetch_cycles = cpu_s->cache_read_cycles; + cpu_cycles_read = cpu_s->cache_read_cycles; + cpu_cycles_read_l = (cpu_16bitbus ? 2 : 1) * cpu_s->cache_read_cycles; + cpu_cycles_write = cpu_s->cache_write_cycles; + cpu_cycles_write_l = (cpu_16bitbus ? 2 : 1) * cpu_s->cache_write_cycles; } else { - /* Use memory timings */ - cpu_prefetch_cycles = cpu_s->mem_read_cycles; - cpu_cycles_read = cpu_s->mem_read_cycles; - cpu_cycles_read_l = (cpu_16bitbus ? 2 : 1) * cpu_s->mem_read_cycles; - cpu_cycles_write = cpu_s->mem_write_cycles; - cpu_cycles_write_l = (cpu_16bitbus ? 2 : 1) * cpu_s->mem_write_cycles; + /* Use memory timings */ + cpu_prefetch_cycles = cpu_s->mem_read_cycles; + cpu_cycles_read = cpu_s->mem_read_cycles; + cpu_cycles_read_l = (cpu_16bitbus ? 2 : 1) * cpu_s->mem_read_cycles; + cpu_cycles_write = cpu_s->mem_write_cycles; + cpu_cycles_write_l = (cpu_16bitbus ? 2 : 1) * cpu_s->mem_write_cycles; } if (is486) - cpu_prefetch_cycles = (cpu_prefetch_cycles * 11) / 16; + cpu_prefetch_cycles = (cpu_prefetch_cycles * 11) / 16; cpu_mem_prefetch_cycles = cpu_prefetch_cycles; if (cpu_s->rspeed <= 8000000) - cpu_rom_prefetch_cycles = cpu_mem_prefetch_cycles; + cpu_rom_prefetch_cycles = cpu_mem_prefetch_cycles; } diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index 964c456eb..04b379127 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -19,27 +19,27 @@ * Copyright 2016,2018 Miran Grca. */ #ifndef EMU_CPU_H -# define EMU_CPU_H +#define EMU_CPU_H enum { - FPU_NONE, - FPU_8087, - FPU_287, - FPU_287XL, - FPU_387, - FPU_487SX, - FPU_INTERNAL + FPU_NONE, + FPU_8087, + FPU_287, + FPU_287XL, + FPU_387, + FPU_487SX, + FPU_INTERNAL }; enum { - CPU_8088 = 1, /* 808x class CPUs */ + CPU_8088 = 1, /* 808x class CPUs */ CPU_8086, #ifdef USE_NEC_808X - CPU_V20, /* NEC 808x class CPUs - future proofing */ + CPU_V20, /* NEC 808x class CPUs - future proofing */ CPU_V30, #endif - CPU_286, /* 286 class CPUs */ - CPU_386SX, /* 386 class CPUs */ + CPU_286, /* 286 class CPUs */ + CPU_386SX, /* 386 class CPUs */ CPU_IBM386SLC, CPU_IBM486SLC, CPU_386DX, @@ -47,7 +47,7 @@ enum { CPU_RAPIDCAD, CPU_486SLC, CPU_486DLC, - CPU_i486SX, /* 486 class CPUs */ + CPU_i486SX, /* 486 class CPUs */ CPU_Am486SX, CPU_Cx486S, CPU_i486DX, @@ -60,7 +60,7 @@ enum { CPU_ENH_Am486DX, CPU_Cx5x86, CPU_P24T, - CPU_WINCHIP, /* 586 class CPUs */ + CPU_WINCHIP, /* 586 class CPUs */ CPU_WINCHIP2, CPU_PENTIUM, CPU_PENTIUMMMX, @@ -77,43 +77,42 @@ enum { CPU_K6_2P, CPU_K6_3P, CPU_CYRIX3S, - CPU_PENTIUMPRO, /* 686 class CPUs */ + CPU_PENTIUMPRO, /* 686 class CPUs */ CPU_PENTIUM2, CPU_PENTIUM2D }; enum { - CPU_PKG_8088 = (1 << 0), - CPU_PKG_8088_EUROPC = (1 << 1), - CPU_PKG_8086 = (1 << 2), - CPU_PKG_286 = (1 << 3), - CPU_PKG_386SX = (1 << 4), - CPU_PKG_386DX = (1 << 5), - CPU_PKG_M6117 = (1 << 6), - CPU_PKG_386SLC_IBM = (1 << 7), - CPU_PKG_486SLC = (1 << 8), - CPU_PKG_486SLC_IBM = (1 << 9), - CPU_PKG_486BL = (1 << 10), - CPU_PKG_486DLC = (1 << 11), - CPU_PKG_SOCKET1 = (1 << 12), - CPU_PKG_SOCKET3 = (1 << 13), + CPU_PKG_8088 = (1 << 0), + CPU_PKG_8088_EUROPC = (1 << 1), + CPU_PKG_8086 = (1 << 2), + CPU_PKG_286 = (1 << 3), + CPU_PKG_386SX = (1 << 4), + CPU_PKG_386DX = (1 << 5), + CPU_PKG_M6117 = (1 << 6), + CPU_PKG_386SLC_IBM = (1 << 7), + CPU_PKG_486SLC = (1 << 8), + CPU_PKG_486SLC_IBM = (1 << 9), + CPU_PKG_486BL = (1 << 10), + CPU_PKG_486DLC = (1 << 11), + CPU_PKG_SOCKET1 = (1 << 12), + CPU_PKG_SOCKET3 = (1 << 13), CPU_PKG_SOCKET3_PC330 = (1 << 14), - CPU_PKG_STPC = (1 << 15), - CPU_PKG_SOCKET4 = (1 << 16), - CPU_PKG_SOCKET5_7 = (1 << 17), - CPU_PKG_SOCKET8 = (1 << 18), - CPU_PKG_SLOT1 = (1 << 19), - CPU_PKG_SLOT2 = (1 << 20), - CPU_PKG_SOCKET370 = (1 << 21), - CPU_PKG_EBGA368 = (1 << 22) + CPU_PKG_STPC = (1 << 15), + CPU_PKG_SOCKET4 = (1 << 16), + CPU_PKG_SOCKET5_7 = (1 << 17), + CPU_PKG_SOCKET8 = (1 << 18), + CPU_PKG_SLOT1 = (1 << 19), + CPU_PKG_SLOT2 = (1 << 20), + CPU_PKG_SOCKET370 = (1 << 21), + CPU_PKG_EBGA368 = (1 << 22) }; - -#define MANU_INTEL 0 -#define MANU_AMD 1 -#define MANU_CYRIX 2 -#define MANU_IDT 3 -#define MANU_NEC 4 +#define MANU_INTEL 0 +#define MANU_AMD 1 +#define MANU_CYRIX 2 +#define MANU_IDT 3 +#define MANU_NEC 4 #define CPU_SUPPORTS_DYNAREC 1 #define CPU_REQUIRES_DYNAREC 2 @@ -121,284 +120,278 @@ enum { #define CPU_FIXED_MULTIPLIER 8 #if (defined __amd64__ || defined _M_X64) -#define LOOKUP_INV -1LL +# define LOOKUP_INV -1LL #else -#define LOOKUP_INV -1 +# define LOOKUP_INV -1 #endif - typedef struct { - const char *name; - const char *internal_name; - const int type; + const char *name; + const char *internal_name; + const int type; } FPU; typedef struct { const char *name; - uint64_t cpu_type; + uint64_t cpu_type; const FPU *fpus; - int rspeed; - double multi; - uint16_t voltage; - uint32_t edx_reset; - uint32_t cpuid_model; - uint16_t cyrix_id; - uint8_t cpu_flags; - int8_t mem_read_cycles, mem_write_cycles; - int8_t cache_read_cycles, cache_write_cycles; - int8_t atclk_div; + int rspeed; + double multi; + uint16_t voltage; + uint32_t edx_reset; + uint32_t cpuid_model; + uint16_t cyrix_id; + uint8_t cpu_flags; + int8_t mem_read_cycles, mem_write_cycles; + int8_t cache_read_cycles, cache_write_cycles; + int8_t atclk_div; } CPU; typedef struct { - const uint32_t package; - const char *manufacturer; - const char *name; - const char *internal_name; - const CPU *cpus; + const uint32_t package; + const char *manufacturer; + const char *name; + const char *internal_name; + const CPU *cpus; } cpu_family_t; typedef struct { - const char *family; - const int rspeed; + const char *family; + const int rspeed; const double multi; } cpu_legacy_table_t; typedef struct { - const char *machine; + const char *machine; const cpu_legacy_table_t **tables; } cpu_legacy_machine_t; +#define C_FLAG 0x0001 +#define P_FLAG 0x0004 +#define A_FLAG 0x0010 +#define Z_FLAG 0x0040 +#define N_FLAG 0x0080 +#define T_FLAG 0x0100 +#define I_FLAG 0x0200 +#define D_FLAG 0x0400 +#define V_FLAG 0x0800 +#define NT_FLAG 0x4000 +#define RF_FLAG 0x0001 /* in EFLAGS */ +#define VM_FLAG 0x0002 /* in EFLAGS */ +#define VIF_FLAG 0x0008 /* in EFLAGS */ +#define VIP_FLAG 0x0010 /* in EFLAGS */ +#define VID_FLAG 0x0020 /* in EFLAGS */ -#define C_FLAG 0x0001 -#define P_FLAG 0x0004 -#define A_FLAG 0x0010 -#define Z_FLAG 0x0040 -#define N_FLAG 0x0080 -#define T_FLAG 0x0100 -#define I_FLAG 0x0200 -#define D_FLAG 0x0400 -#define V_FLAG 0x0800 -#define NT_FLAG 0x4000 +#define WP_FLAG 0x10000 /* in CR0 */ +#define CR4_VME (1 << 0) +#define CR4_PVI (1 << 1) +#define CR4_PSE (1 << 4) +#define CR4_PAE (1 << 5) -#define RF_FLAG 0x0001 /* in EFLAGS */ -#define VM_FLAG 0x0002 /* in EFLAGS */ -#define VIF_FLAG 0x0008 /* in EFLAGS */ -#define VIP_FLAG 0x0010 /* in EFLAGS */ -#define VID_FLAG 0x0020 /* in EFLAGS */ +#define CPL ((cpu_state.seg_cs.access >> 5) & 3) -#define WP_FLAG 0x10000 /* in CR0 */ -#define CR4_VME (1 << 0) -#define CR4_PVI (1 << 1) -#define CR4_PSE (1 << 4) -#define CR4_PAE (1 << 5) - -#define CPL ((cpu_state.seg_cs.access>>5)&3) - -#define IOPL ((cpu_state.flags>>12)&3) - -#define IOPLp ((!(msw&1)) || (CPL<=IOPL)) +#define IOPL ((cpu_state.flags >> 12) & 3) +#define IOPLp ((!(msw & 1)) || (CPL <= IOPL)) typedef union { - uint32_t l; - uint16_t w; + uint32_t l; + uint16_t w; struct { - uint8_t l, - h; - } b; + uint8_t l, + h; + } b; } x86reg; typedef struct { - uint32_t base; - uint32_t limit; - uint8_t access, ar_high; - uint16_t seg; - uint32_t limit_low, limit_high; - int checked; /*Non-zero if selector is known to be valid*/ + uint32_t base; + uint32_t limit; + uint8_t access, ar_high; + uint16_t seg; + uint32_t limit_low, limit_high; + int checked; /*Non-zero if selector is known to be valid*/ } x86seg; typedef union { - uint64_t q; - int64_t sq; - uint32_t l[2]; - int32_t sl[2]; - uint16_t w[4]; - int16_t sw[4]; - uint8_t b[8]; - int8_t sb[8]; - float f[2]; + uint64_t q; + int64_t sq; + uint32_t l[2]; + int32_t sl[2]; + uint16_t w[4]; + int16_t sw[4]; + uint8_t b[8]; + int8_t sb[8]; + float f[2]; } MMX_REG; typedef struct { /* IDT WinChip and WinChip 2 MSR's */ - uint32_t tr1, tr12; /* 0x00000002, 0x0000000e */ - uint32_t cesr; /* 0x00000011 */ + uint32_t tr1, tr12; /* 0x00000002, 0x0000000e */ + uint32_t cesr; /* 0x00000011 */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */ - uint64_t apic_base; /* 0x0000001b - Should the Pentium not also have this? */ - uint64_t ecx79; /* 0x00000079 */ + uint64_t apic_base; /* 0x0000001b - Should the Pentium not also have this? */ + uint64_t ecx79; /* 0x00000079 */ /* AMD K5, 5k86, K6, K6-2, K6-2C, K6-3, K6-2P, and K6-3P MSR's */ - uint64_t ecx83; /* 0x00000083 - AMD K5 and K6 MSR's. */ + uint64_t ecx83; /* 0x00000083 - AMD K5 and K6 MSR's. */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */ - uint64_t ecx8x[4]; /* 0x00000088 - 0x0000008b */ - uint64_t ia32_pmc[8]; /* 0x000000c1 - 0x000000c8 */ - uint64_t mtrr_cap; /* 0x000000fe */ + uint64_t ecx8x[4]; /* 0x00000088 - 0x0000008b */ + uint64_t ia32_pmc[8]; /* 0x000000c1 - 0x000000c8 */ + uint64_t mtrr_cap; /* 0x000000fe */ /* IDT WinChip and WinChip 2 MSR's that are also on the VIA Cyrix III */ - uint32_t fcr; /* 0x00000107 (IDT), 0x00001107 (VIA) */ - uint64_t fcr2, fcr3; /* 0x00000108 (IDT), 0x00001108 (VIA) */ + uint32_t fcr; /* 0x00000107 (IDT), 0x00001107 (VIA) */ + uint64_t fcr2, fcr3; /* 0x00000108 (IDT), 0x00001108 (VIA) */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */ - uint64_t ecx116; /* 0x00000116 */ - uint64_t ecx11x[4]; /* 0x00000118 - 0x0000011b */ - uint64_t ecx11e; /* 0x0000011e */ + uint64_t ecx116; /* 0x00000116 */ + uint64_t ecx11x[4]; /* 0x00000118 - 0x0000011b */ + uint64_t ecx11e; /* 0x0000011e */ /* Pentium II Klamath and Pentium II Deschutes MSR's */ - uint16_t sysenter_cs; /* 0x00000174 - SYSENTER/SYSEXIT MSR's */ - uint32_t sysenter_esp; /* 0x00000175 - SYSENTER/SYSEXIT MSR's */ - uint32_t sysenter_eip; /* 0x00000176 - SYSENTER/SYSEXIT MSR's */ + uint16_t sysenter_cs; /* 0x00000174 - SYSENTER/SYSEXIT MSR's */ + uint32_t sysenter_esp; /* 0x00000175 - SYSENTER/SYSEXIT MSR's */ + uint32_t sysenter_eip; /* 0x00000176 - SYSENTER/SYSEXIT MSR's */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */ - uint64_t mcg_ctl; /* 0x0000017b - Machine Check Architecture */ + uint64_t mcg_ctl; /* 0x0000017b - Machine Check Architecture */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */ - uint64_t ecx186, ecx187; /* 0x00000186, 0x00000187 */ - uint64_t ecx1e0; /* 0x000001e0 */ + uint64_t ecx186, ecx187; /* 0x00000186, 0x00000187 */ + uint64_t ecx1e0; /* 0x000001e0 */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's that are also on the VIA Cyrix III */ - uint64_t mtrr_physbase[8]; /* 0x00000200 - 0x0000020f */ - uint64_t mtrr_physmask[8]; /* 0x00000200 - 0x0000020f (ECX & 1) */ - uint64_t mtrr_fix64k_8000; /* 0x00000250 */ - uint64_t mtrr_fix16k_8000; /* 0x00000258 */ - uint64_t mtrr_fix16k_a000; /* 0x00000259 */ - uint64_t mtrr_fix4k[8]; /* 0x00000268 - 0x0000026f */ + uint64_t mtrr_physbase[8]; /* 0x00000200 - 0x0000020f */ + uint64_t mtrr_physmask[8]; /* 0x00000200 - 0x0000020f (ECX & 1) */ + uint64_t mtrr_fix64k_8000; /* 0x00000250 */ + uint64_t mtrr_fix16k_8000; /* 0x00000258 */ + uint64_t mtrr_fix16k_a000; /* 0x00000259 */ + uint64_t mtrr_fix4k[8]; /* 0x00000268 - 0x0000026f */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */ - uint64_t pat; /* 0x00000277 */ + uint64_t pat; /* 0x00000277 */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's that are also on the VIA Cyrix III */ - uint64_t mtrr_deftype; /* 0x000002ff */ + uint64_t mtrr_deftype; /* 0x000002ff */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */ - uint64_t mca_ctl[5]; /* 0x00000400, 0x00000404, 0x00000408, 0x0000040c, 0x00000410 - Machine Check Architecture */ - uint64_t ecx570; /* 0x00000570 */ + uint64_t mca_ctl[5]; /* 0x00000400, 0x00000404, 0x00000408, 0x0000040c, 0x00000410 - Machine Check Architecture */ + uint64_t ecx570; /* 0x00000570 */ /* IBM 386SLC, 486SLC, and 486BL MSR's */ - uint64_t ibm_por; /* 0x00001000 - Processor Operation Register */ - uint64_t ibm_crcr; /* 0x00001001 - Cache Region Control Register */ + uint64_t ibm_por; /* 0x00001000 - Processor Operation Register */ + uint64_t ibm_crcr; /* 0x00001001 - Cache Region Control Register */ /* IBM 486SLC and 486BL MSR's */ - uint64_t ibm_por2; /* 0x00001002 - Processor Operation Register */ + uint64_t ibm_por2; /* 0x00001002 - Processor Operation Register */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */ - uint64_t ecx1002ff; /* 0x001002ff - MSR used by some Intel AMI boards */ + uint64_t ecx1002ff; /* 0x001002ff - MSR used by some Intel AMI boards */ /* AMD K5, 5k86, K6, K6-2, K6-2C, K6-3, K6-2P, and K6-3P MSR's */ - uint64_t amd_efer; /* 0xc0000080 */ + uint64_t amd_efer; /* 0xc0000080 */ /* AMD K6-2, K6-2C, K6-3, K6-2P, and K6-3P MSR's */ - uint64_t star; /* 0xc0000081 */ + uint64_t star; /* 0xc0000081 */ /* AMD K5, 5k86, K6, K6-2, K6-2C, K6-3, K6-2P, and K6-3P MSR's */ - uint64_t amd_whcr; /* 0xc0000082 */ + uint64_t amd_whcr; /* 0xc0000082 */ /* AMD K6-2C, K6-3, K6-2P, and K6-3P MSR's */ - uint64_t amd_uwccr; /* 0xc0000085 */ + uint64_t amd_uwccr; /* 0xc0000085 */ /* AMD K6-2P and K6-3P MSR's */ - uint64_t amd_epmr; /* 0xc0000086 */ + uint64_t amd_epmr; /* 0xc0000086 */ /* AMD K6-2C, K6-3, K6-2P, and K6-3P MSR's */ - uint64_t amd_psor, amd_pfir; /* 0xc0000087, 0xc0000088 */ + uint64_t amd_psor, amd_pfir; /* 0xc0000087, 0xc0000088 */ /* K6-3, K6-2P, and K6-3P MSR's */ - uint64_t amd_l2aar; /* 0xc0000089 */ + uint64_t amd_l2aar; /* 0xc0000089 */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */ - uint64_t ecxf0f00250; /* 0xf0f00250 - Some weird long MSR's used by i686 AMI & some Phoenix BIOSes */ - uint64_t ecxf0f00258; /* 0xf0f00258 */ - uint64_t ecxf0f00259; /* 0xf0f00259 */ + uint64_t ecxf0f00250; /* 0xf0f00250 - Some weird long MSR's used by i686 AMI & some Phoenix BIOSes */ + uint64_t ecxf0f00258; /* 0xf0f00258 */ + uint64_t ecxf0f00259; /* 0xf0f00259 */ } msr_t; typedef struct { - x86reg regs[8]; + x86reg regs[8]; - uint8_t tag[8]; + uint8_t tag[8]; - x86seg *ea_seg; - uint32_t eaaddr; + x86seg *ea_seg; + uint32_t eaaddr; - int flags_op; - uint32_t flags_res, - flags_op1, flags_op2; + int flags_op; + uint32_t flags_res, + flags_op1, flags_op2; - uint32_t pc, - oldpc, op32; + uint32_t pc, + oldpc, op32; - int TOP; + int TOP; union { - struct { - int8_t rm, - mod, - reg; - } rm_mod_reg; - int32_t rm_mod_reg_data; - } rm_data; + struct { + int8_t rm, + mod, + reg; + } rm_mod_reg; + int32_t rm_mod_reg_data; + } rm_data; - uint8_t ssegs, ismmx, - abrt, _smi_line; + uint8_t ssegs, ismmx, + abrt, _smi_line; #ifdef FPU_CYCLES - int _cycles, _fpu_cycles, _in_smm; + int _cycles, _fpu_cycles, _in_smm; #else - int _cycles, _in_smm; + int _cycles, _in_smm; #endif - uint16_t npxs, npxc; + uint16_t npxs, npxc; - double ST[8]; + double ST[8]; - uint16_t MM_w4[8]; + uint16_t MM_w4[8]; - MMX_REG MM[8]; + MMX_REG MM[8]; #ifdef USE_NEW_DYNAREC - uint32_t old_fp_control, new_fp_control; -#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 - uint16_t old_fp_control2, new_fp_control2; -#endif -#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 || defined __amd64__ || defined _M_X64 - uint32_t trunc_fp_control; -#endif + uint32_t old_fp_control, new_fp_control; +# if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 + uint16_t old_fp_control2, new_fp_control2; +# endif +# if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 || defined __amd64__ || defined _M_X64 + uint32_t trunc_fp_control; +# endif #else - uint16_t old_npxc, new_npxc; + uint16_t old_npxc, new_npxc; #endif - x86seg seg_cs, seg_ds, seg_es, seg_ss, - seg_fs, seg_gs; + x86seg seg_cs, seg_ds, seg_es, seg_ss, + seg_fs, seg_gs; union { - uint32_t l; - uint16_t w; - } CR0; + uint32_t l; + uint16_t w; + } CR0; - uint16_t flags, eflags; + uint16_t flags, eflags; - uint32_t _smbase; + uint32_t _smbase; } cpu_state_t; +#define in_smm cpu_state._in_smm +#define smi_line cpu_state._smi_line -#define in_smm cpu_state._in_smm -#define smi_line cpu_state._smi_line - -#define smbase cpu_state._smbase - +#define smbase cpu_state._smbase /*The cpu_state.flags below must match in both cpu_cur_status and block->status for a block to be valid*/ @@ -407,100 +400,99 @@ typedef struct { #define CPU_STATUS_PMODE (1 << 2) #define CPU_STATUS_V86 (1 << 3) #define CPU_STATUS_SMM (1 << 4) -#define CPU_STATUS_FLAGS 0xffff +#define CPU_STATUS_FLAGS 0xffff /*If the cpu_state.flags below are set in cpu_cur_status, they must be set in block->status. Otherwise they are ignored*/ #ifdef USE_NEW_DYNAREC -#define CPU_STATUS_NOTFLATDS (1 << 8) -#define CPU_STATUS_NOTFLATSS (1 << 9) -#define CPU_STATUS_MASK 0xff00 +# define CPU_STATUS_NOTFLATDS (1 << 8) +# define CPU_STATUS_NOTFLATSS (1 << 9) +# define CPU_STATUS_MASK 0xff00 #else -#define CPU_STATUS_NOTFLATDS (1 << 16) -#define CPU_STATUS_NOTFLATSS (1 << 17) -#define CPU_STATUS_MASK 0xffff0000 +# define CPU_STATUS_NOTFLATDS (1 << 16) +# define CPU_STATUS_NOTFLATSS (1 << 17) +# define CPU_STATUS_MASK 0xffff0000 #endif #ifdef _MSC_VER -# define COMPILE_TIME_ASSERT(expr) /*nada*/ +# define COMPILE_TIME_ASSERT(expr) /*nada*/ #else -# ifdef EXTREME_DEBUG -# define COMPILE_TIME_ASSERT(expr) typedef char COMP_TIME_ASSERT[(expr) ? 1 : 0]; -# else -# define COMPILE_TIME_ASSERT(expr) /*nada*/ -# endif +# ifdef EXTREME_DEBUG +# define COMPILE_TIME_ASSERT(expr) typedef char COMP_TIME_ASSERT[(expr) ? 1 : 0]; +# else +# define COMPILE_TIME_ASSERT(expr) /*nada*/ +# endif #endif COMPILE_TIME_ASSERT(sizeof(cpu_state_t) <= 128) -#define cpu_state_offset(MEMBER) ((uint8_t)((uintptr_t)&cpu_state.MEMBER - (uintptr_t)&cpu_state - 128)) +#define cpu_state_offset(MEMBER) ((uint8_t) ((uintptr_t) &cpu_state.MEMBER - (uintptr_t) &cpu_state - 128)) -#define EAX cpu_state.regs[0].l -#define AX cpu_state.regs[0].w -#define AL cpu_state.regs[0].b.l -#define AH cpu_state.regs[0].b.h -#define ECX cpu_state.regs[1].l -#define CX cpu_state.regs[1].w -#define CL cpu_state.regs[1].b.l -#define CH cpu_state.regs[1].b.h -#define EDX cpu_state.regs[2].l -#define DX cpu_state.regs[2].w -#define DL cpu_state.regs[2].b.l -#define DH cpu_state.regs[2].b.h -#define EBX cpu_state.regs[3].l -#define BX cpu_state.regs[3].w -#define BL cpu_state.regs[3].b.l -#define BH cpu_state.regs[3].b.h -#define ESP cpu_state.regs[4].l -#define EBP cpu_state.regs[5].l -#define ESI cpu_state.regs[6].l -#define EDI cpu_state.regs[7].l -#define SP cpu_state.regs[4].w -#define BP cpu_state.regs[5].w -#define SI cpu_state.regs[6].w -#define DI cpu_state.regs[7].w +#define EAX cpu_state.regs[0].l +#define AX cpu_state.regs[0].w +#define AL cpu_state.regs[0].b.l +#define AH cpu_state.regs[0].b.h +#define ECX cpu_state.regs[1].l +#define CX cpu_state.regs[1].w +#define CL cpu_state.regs[1].b.l +#define CH cpu_state.regs[1].b.h +#define EDX cpu_state.regs[2].l +#define DX cpu_state.regs[2].w +#define DL cpu_state.regs[2].b.l +#define DH cpu_state.regs[2].b.h +#define EBX cpu_state.regs[3].l +#define BX cpu_state.regs[3].w +#define BL cpu_state.regs[3].b.l +#define BH cpu_state.regs[3].b.h +#define ESP cpu_state.regs[4].l +#define EBP cpu_state.regs[5].l +#define ESI cpu_state.regs[6].l +#define EDI cpu_state.regs[7].l +#define SP cpu_state.regs[4].w +#define BP cpu_state.regs[5].w +#define SI cpu_state.regs[6].w +#define DI cpu_state.regs[7].w -#define cycles cpu_state._cycles +#define cycles cpu_state._cycles #ifdef FPU_CYCLES -#define fpu_cycles cpu_state._fpu_cycles +# define fpu_cycles cpu_state._fpu_cycles #endif -#define cpu_rm cpu_state.rm_data.rm_mod_reg.rm -#define cpu_mod cpu_state.rm_data.rm_mod_reg.mod -#define cpu_reg cpu_state.rm_data.rm_mod_reg.reg - -#define CR4_TSD (1 << 2) -#define CR4_DE (1 << 3) -#define CR4_MCE (1 << 6) -#define CR4_PCE (1 << 8) -#define CR4_OSFXSR (1 << 9) +#define cpu_rm cpu_state.rm_data.rm_mod_reg.rm +#define cpu_mod cpu_state.rm_data.rm_mod_reg.mod +#define cpu_reg cpu_state.rm_data.rm_mod_reg.reg +#define CR4_TSD (1 << 2) +#define CR4_DE (1 << 3) +#define CR4_MCE (1 << 6) +#define CR4_PCE (1 << 8) +#define CR4_OSFXSR (1 << 9) /* Global variables. */ -extern cpu_state_t cpu_state; +extern cpu_state_t cpu_state; -extern const cpu_family_t cpu_families[]; +extern const cpu_family_t cpu_families[]; extern const cpu_legacy_machine_t cpu_legacy_table[]; -extern cpu_family_t *cpu_f; -extern CPU *cpu_s; -extern int cpu_override; +extern cpu_family_t *cpu_f; +extern CPU *cpu_s; +extern int cpu_override; -extern int cpu_isintel; -extern int cpu_iscyrix; -extern int cpu_16bitbus, cpu_64bitbus; -extern int cpu_busspeed, cpu_pci_speed; -extern int cpu_multi; -extern double cpu_dmulti; -extern double fpu_multi; -extern int cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment - penalties when crossing 8-byte boundaries*/ +extern int cpu_isintel; +extern int cpu_iscyrix; +extern int cpu_16bitbus, cpu_64bitbus; +extern int cpu_busspeed, cpu_pci_speed; +extern int cpu_multi; +extern double cpu_dmulti; +extern double fpu_multi; +extern int cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment + penalties when crossing 8-byte boundaries*/ -extern int is8086, is286, is386, is6117, is486; -extern int is_am486, is_am486dxl, is_pentium, is_k5, is_k6, is_p6, is_cxsmm; -extern int hascache; -extern int isibm486; -extern int is_rapidcad; -extern int hasfpu; +extern int is8086, is286, is386, is6117, is486; +extern int is_am486, is_am486dxl, is_pentium, is_k5, is_k6, is_p6, is_cxsmm; +extern int hascache; +extern int isibm486; +extern int is_rapidcad; +extern int hasfpu; #define CPU_FEATURE_RDTSC (1 << 0) #define CPU_FEATURE_MSR (1 << 1) #define CPU_FEATURE_MMX (1 << 2) @@ -509,237 +501,233 @@ extern int hasfpu; #define CPU_FEATURE_CX8 (1 << 5) #define CPU_FEATURE_3DNOW (1 << 6) -extern uint32_t cpu_features; +extern uint32_t cpu_features; -extern int smi_latched, smm_in_hlt; -extern int smi_block; +extern int smi_latched, smm_in_hlt; +extern int smi_block; #ifdef USE_NEW_DYNAREC -extern uint16_t cpu_cur_status; +extern uint16_t cpu_cur_status; #else -extern uint32_t cpu_cur_status; +extern uint32_t cpu_cur_status; #endif -extern uint64_t cpu_CR4_mask; -extern uint64_t tsc; -extern msr_t msr; -extern uint8_t opcode; -extern int cgate16; -extern int cpl_override; -extern int CPUID; -extern uint64_t xt_cpu_multi; -extern int isa_cycles, cpu_inited; -extern uint32_t oldds,oldss,olddslimit,oldsslimit,olddslimitw,oldsslimitw; -extern uint32_t pccache; -extern uint8_t *pccache2; +extern uint64_t cpu_CR4_mask; +extern uint64_t tsc; +extern msr_t msr; +extern uint8_t opcode; +extern int cgate16; +extern int cpl_override; +extern int CPUID; +extern uint64_t xt_cpu_multi; +extern int isa_cycles, cpu_inited; +extern uint32_t oldds, oldss, olddslimit, oldsslimit, olddslimitw, oldsslimitw; +extern uint32_t pccache; +extern uint8_t *pccache2; -extern double bus_timing, isa_timing, pci_timing, agp_timing; -extern uint64_t pmc[2]; -extern uint16_t temp_seg_data[4]; -extern uint16_t cs_msr; -extern uint32_t esp_msr; -extern uint32_t eip_msr; +extern double bus_timing, isa_timing, pci_timing, agp_timing; +extern uint64_t pmc[2]; +extern uint16_t temp_seg_data[4]; +extern uint16_t cs_msr; +extern uint32_t esp_msr; +extern uint32_t eip_msr; /* For the AMD K6. */ -extern uint64_t amd_efer, star; +extern uint64_t amd_efer, star; #define FPU_CW_Reserved_Bits (0xe0c0) -#define cr0 cpu_state.CR0.l -#define msw cpu_state.CR0.w -extern uint32_t cr2, cr3, cr4; -extern uint32_t dr[8]; -extern uint32_t _tr[8]; -extern uint32_t cache_index; -extern uint8_t _cache[2048]; - +#define cr0 cpu_state.CR0.l +#define msw cpu_state.CR0.w +extern uint32_t cr2, cr3, cr4; +extern uint32_t dr[8]; +extern uint32_t _tr[8]; +extern uint32_t cache_index; +extern uint8_t _cache[2048]; /*Segments - _cs,_ds,_es,_ss are the segment structures CS,DS,ES,SS is the 16-bit data cs,ds,es,ss are defines to the bases*/ -extern x86seg gdt,ldt,idt,tr; -extern x86seg _oldds; -#define CS cpu_state.seg_cs.seg -#define DS cpu_state.seg_ds.seg -#define ES cpu_state.seg_es.seg -#define SS cpu_state.seg_ss.seg -#define FS cpu_state.seg_fs.seg -#define GS cpu_state.seg_gs.seg -#define cs cpu_state.seg_cs.base -#define ds cpu_state.seg_ds.base -#define es cpu_state.seg_es.base -#define ss cpu_state.seg_ss.base -#define fs_seg cpu_state.seg_fs.base -#define gs cpu_state.seg_gs.base +extern x86seg gdt, ldt, idt, tr; +extern x86seg _oldds; +#define CS cpu_state.seg_cs.seg +#define DS cpu_state.seg_ds.seg +#define ES cpu_state.seg_es.seg +#define SS cpu_state.seg_ss.seg +#define FS cpu_state.seg_fs.seg +#define GS cpu_state.seg_gs.seg +#define cs cpu_state.seg_cs.base +#define ds cpu_state.seg_ds.base +#define es cpu_state.seg_es.base +#define ss cpu_state.seg_ss.base +#define fs_seg cpu_state.seg_fs.base +#define gs cpu_state.seg_gs.base +#define ISA_CYCLES(x) (x * isa_cycles) -#define ISA_CYCLES(x) (x * isa_cycles) +extern int cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l; +extern int cpu_prefetch_cycles, cpu_prefetch_width, cpu_mem_prefetch_cycles, cpu_rom_prefetch_cycles; +extern int cpu_waitstates; +extern int cpu_cache_int_enabled, cpu_cache_ext_enabled; +extern int cpu_isa_speed, cpu_pci_speed, cpu_agp_speed; -extern int cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l; -extern int cpu_prefetch_cycles, cpu_prefetch_width, cpu_mem_prefetch_cycles, cpu_rom_prefetch_cycles; -extern int cpu_waitstates; -extern int cpu_cache_int_enabled, cpu_cache_ext_enabled; -extern int cpu_isa_speed, cpu_pci_speed, cpu_agp_speed; +extern int timing_rr; +extern int timing_mr, timing_mrl; +extern int timing_rm, timing_rml; +extern int timing_mm, timing_mml; +extern int timing_bt, timing_bnt; +extern int timing_int, timing_int_rm, timing_int_v86, timing_int_pm; +extern int timing_int_pm_outer, timing_iret_rm, timing_iret_v86, timing_iret_pm; +extern int timing_iret_pm_outer, timing_call_rm, timing_call_pm; +extern int timing_call_pm_gate, timing_call_pm_gate_inner; +extern int timing_retf_rm, timing_retf_pm, timing_retf_pm_outer; +extern int timing_jmp_rm, timing_jmp_pm, timing_jmp_pm_gate; +extern int timing_misaligned; -extern int timing_rr; -extern int timing_mr, timing_mrl; -extern int timing_rm, timing_rml; -extern int timing_mm, timing_mml; -extern int timing_bt, timing_bnt; -extern int timing_int, timing_int_rm, timing_int_v86, timing_int_pm; -extern int timing_int_pm_outer, timing_iret_rm, timing_iret_v86, timing_iret_pm; -extern int timing_iret_pm_outer, timing_call_rm, timing_call_pm; -extern int timing_call_pm_gate, timing_call_pm_gate_inner; -extern int timing_retf_rm, timing_retf_pm, timing_retf_pm_outer; -extern int timing_jmp_rm, timing_jmp_pm, timing_jmp_pm_gate; -extern int timing_misaligned; - -extern int in_sys, unmask_a20_in_smm; -extern int cycles_main; -extern uint32_t old_rammask; +extern int in_sys, unmask_a20_in_smm; +extern int cycles_main; +extern uint32_t old_rammask; #ifdef USE_ACYCS -extern int acycs; +extern int acycs; #endif -extern int pic_pending, is_vpc; -extern int soft_reset_mask, alt_access; -extern int cpu_end_block_after_ins; - -extern uint16_t cpu_fast_off_count, cpu_fast_off_val; -extern uint32_t cpu_fast_off_flags; +extern int pic_pending, is_vpc; +extern int soft_reset_mask, alt_access; +extern int cpu_end_block_after_ins; +extern uint16_t cpu_fast_off_count, cpu_fast_off_val; +extern uint32_t cpu_fast_off_flags; /* Functions. */ extern int cpu_has_feature(int feature); #ifdef USE_NEW_DYNAREC -extern void loadseg_dynarec(uint16_t seg, x86seg *s); -extern int loadseg(uint16_t seg, x86seg *s); -extern void loadcs(uint16_t seg); +extern void loadseg_dynarec(uint16_t seg, x86seg *s); +extern int loadseg(uint16_t seg, x86seg *s); +extern void loadcs(uint16_t seg); #else -extern void loadseg(uint16_t seg, x86seg *s); -extern void loadcs(uint16_t seg); +extern void loadseg(uint16_t seg, x86seg *s); +extern void loadcs(uint16_t seg); #endif -extern char *cpu_current_pc(char *bufp); +extern char *cpu_current_pc(char *bufp); -extern void cpu_update_waitstates(void); -extern void cpu_set(void); -extern void cpu_close(void); -extern void cpu_set_isa_speed(int speed); -extern void cpu_set_pci_speed(int speed); -extern void cpu_set_isa_pci_div(int div); -extern void cpu_set_agp_speed(int speed); +extern void cpu_update_waitstates(void); +extern void cpu_set(void); +extern void cpu_close(void); +extern void cpu_set_isa_speed(int speed); +extern void cpu_set_pci_speed(int speed); +extern void cpu_set_isa_pci_div(int div); +extern void cpu_set_agp_speed(int speed); -extern void cpu_CPUID(void); -extern void cpu_RDMSR(void); -extern void cpu_WRMSR(void); +extern void cpu_CPUID(void); +extern void cpu_RDMSR(void); +extern void cpu_WRMSR(void); -extern int checkio(uint32_t port); -extern void codegen_block_end(void); -extern void codegen_reset(void); -extern void cpu_set_edx(void); -extern int divl(uint32_t val); -extern void execx86(int cycs); -extern void enter_smm(int in_hlt); -extern void enter_smm_check(int in_hlt); -extern void leave_smm(void); -extern void exec386(int cycs); -extern void exec386_dynarec(int cycs); -extern int idivl(int32_t val); +extern int checkio(uint32_t port); +extern void codegen_block_end(void); +extern void codegen_reset(void); +extern void cpu_set_edx(void); +extern int divl(uint32_t val); +extern void execx86(int cycs); +extern void enter_smm(int in_hlt); +extern void enter_smm_check(int in_hlt); +extern void leave_smm(void); +extern void exec386(int cycs); +extern void exec386_dynarec(int cycs); +extern int idivl(int32_t val); #ifdef USE_NEW_DYNAREC -extern void loadcscall(uint16_t seg, uint32_t old_pc); -extern void loadcsjmp(uint16_t seg, uint32_t old_pc); -extern void pmodeint(int num, int soft); -extern void pmoderetf(int is32, uint16_t off); -extern void pmodeiret(int is32); +extern void loadcscall(uint16_t seg, uint32_t old_pc); +extern void loadcsjmp(uint16_t seg, uint32_t old_pc); +extern void pmodeint(int num, int soft); +extern void pmoderetf(int is32, uint16_t off); +extern void pmodeiret(int is32); #else -extern void loadcscall(uint16_t seg); -extern void loadcsjmp(uint16_t seg, uint32_t old_pc); -extern void pmodeint(int num, int soft); -extern void pmoderetf(int is32, uint16_t off); -extern void pmodeiret(int is32); +extern void loadcscall(uint16_t seg); +extern void loadcsjmp(uint16_t seg, uint32_t old_pc); +extern void pmodeint(int num, int soft); +extern void pmoderetf(int is32, uint16_t off); +extern void pmodeiret(int is32); #endif -extern void resetmcr(void); -extern void resetx86(void); -extern void refreshread(void); -extern void resetreadlookup(void); -extern void softresetx86(void); -extern void hardresetx86(void); -extern void x86_int(int num); -extern void x86_int_sw(int num); -extern int x86_int_sw_rm(int num); -extern void x86de(char *s, uint16_t error); -extern void x86gpf(char *s, uint16_t error); -extern void x86np(char *s, uint16_t error); -extern void x86ss(char *s, uint16_t error); -extern void x86ts(char *s, uint16_t error); +extern void resetmcr(void); +extern void resetx86(void); +extern void refreshread(void); +extern void resetreadlookup(void); +extern void softresetx86(void); +extern void hardresetx86(void); +extern void x86_int(int num); +extern void x86_int_sw(int num); +extern int x86_int_sw_rm(int num); +extern void x86de(char *s, uint16_t error); +extern void x86gpf(char *s, uint16_t error); +extern void x86np(char *s, uint16_t error); +extern void x86ss(char *s, uint16_t error); +extern void x86ts(char *s, uint16_t error); #ifdef ENABLE_808X_LOG -extern void dumpregs(int __force); -extern void x87_dumpregs(void); -extern void x87_reset(void); +extern void dumpregs(int __force); +extern void x87_dumpregs(void); +extern void x87_reset(void); #endif -extern int cpu_effective, cpu_alt_reset; -extern void cpu_dynamic_switch(int new_cpu); +extern int cpu_effective, cpu_alt_reset; +extern void cpu_dynamic_switch(int new_cpu); -extern void cpu_ven_reset(void); -extern void update_tsc(void); +extern void cpu_ven_reset(void); +extern void update_tsc(void); -extern int sysenter(uint32_t fetchdat); -extern int sysexit(uint32_t fetchdat); -extern int syscall_op(uint32_t fetchdat); -extern int sysret(uint32_t fetchdat); +extern int sysenter(uint32_t fetchdat); +extern int sysexit(uint32_t fetchdat); +extern int syscall_op(uint32_t fetchdat); +extern int sysret(uint32_t fetchdat); extern cpu_family_t *cpu_get_family(const char *internal_name); -extern uint8_t cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine); -extern uint8_t cpu_family_is_eligible(const cpu_family_t *cpu_family, int machine); -extern int fpu_get_type(const cpu_family_t *cpu_family, int cpu, const char *internal_name); -extern const char *fpu_get_internal_name(const cpu_family_t *cpu_family, int cpu, int type); -extern const char *fpu_get_name_from_index(const cpu_family_t *cpu_family, int cpu, int c); -extern int fpu_get_type_from_index(const cpu_family_t *cpu_family, int cpu, int c); +extern uint8_t cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine); +extern uint8_t cpu_family_is_eligible(const cpu_family_t *cpu_family, int machine); +extern int fpu_get_type(const cpu_family_t *cpu_family, int cpu, const char *internal_name); +extern const char *fpu_get_internal_name(const cpu_family_t *cpu_family, int cpu, int type); +extern const char *fpu_get_name_from_index(const cpu_family_t *cpu_family, int cpu, int c); +extern int fpu_get_type_from_index(const cpu_family_t *cpu_family, int cpu, int c); void cyrix_load_seg_descriptor(uint32_t addr, x86seg *seg); void cyrix_write_seg_descriptor(uint32_t addr, x86seg *seg); -#define SMHR_VALID (1 << 0) +#define SMHR_VALID (1 << 0) #define SMHR_ADDR_MASK (0xfffffffc) typedef struct { - struct - { - uint32_t base; - uint64_t size; - } arr[8]; - uint32_t smhr; + struct + { + uint32_t base; + uint64_t size; + } arr[8]; + uint32_t smhr; } cyrix_t; +extern uint32_t addr64, addr64_2; +extern uint32_t addr64a[8], addr64a_2[8]; -extern uint32_t addr64, addr64_2; -extern uint32_t addr64a[8], addr64a_2[8]; +extern int soft_reset_pci; -extern int soft_reset_pci; +extern int reset_on_hlt, hlt_reset_pending; -extern int reset_on_hlt, hlt_reset_pending; +extern cyrix_t cyrix; -extern cyrix_t cyrix; +extern uint8_t use_custom_nmi_vector; +extern uint32_t custom_nmi_vector; -extern uint8_t use_custom_nmi_vector; -extern uint32_t custom_nmi_vector; +extern void (*cpu_exec)(int cycs); +extern uint8_t do_translate, do_translate2; -extern void (*cpu_exec)(int cycs); -extern uint8_t do_translate, do_translate2; +extern void reset_808x(int hard); -extern void reset_808x(int hard); +extern void cpu_register_fast_off_handler(void *timer); +extern void cpu_fast_off_advance(void); +extern void cpu_fast_off_period_set(uint16_t vla, double period); +extern void cpu_fast_off_reset(void); -extern void cpu_register_fast_off_handler(void *timer); -extern void cpu_fast_off_advance(void); -extern void cpu_fast_off_period_set(uint16_t vla, double period); -extern void cpu_fast_off_reset(void); +extern void smi_raise(); +extern void nmi_raise(); -extern void smi_raise(); -extern void nmi_raise(); - -#endif /*EMU_CPU_H*/ +#endif /*EMU_CPU_H*/ diff --git a/src/cpu/x87_timings.c b/src/cpu/x87_timings.c index ca207cc17..d769affaf 100644 --- a/src/cpu/x87_timings.c +++ b/src/cpu/x87_timings.c @@ -10,461 +10,455 @@ x87_timings_t x87_timings; x87_timings_t x87_concurrency; -const x87_timings_t x87_timings_8087 = -{ - .f2xm1 = (310 + 630) / 2, - .fabs = (10 + 17) / 2, - .fadd = (70 + 100) / 2, - .fadd_32 = (90 + 120) / 2, - .fadd_64 = (95 + 125) / 2, - .fbld = (290 + 310) / 2, - .fbstp = (520 + 540) / 2, - .fchs = (10 + 17) / 2, - .fclex = (2 + 8) / 2, - .fcom = (40 + 50) / 2, - .fcom_32 = (60 + 70) / 2, - .fcom_64 = (65 + 75) / 2, - .fcos = 0, /*387+*/ - .fincdecstp = (6 + 12) / 2, - .fdisi_eni = (6 + 12) / 2, - .fdiv = (193 + 203) / 2, - .fdiv_32 = (215 + 225) / 2, - .fdiv_64 = (220 + 230) / 2, - .ffree = (9 + 16) / 2, - .fadd_i16 = (102 + 137) / 2, - .fadd_i32 = (108 + 143) / 2, - .fcom_i16 = (72 + 86) / 2, - .fcom_i32 = (78 + 91) / 2, - .fdiv_i16 = (224 + 238) / 2, - .fdiv_i32 = (230 + 243) / 2, - .fild_16 = (46 + 54) / 2, - .fild_32 = (50 + 60) / 2, - .fild_64 = (60 + 68) / 2, - .fmul_i16 = (124 + 138) / 2, - .fmul_i32 = (130 + 144) / 2, - .finit = (2 + 8) / 2, - .fist_16 = (80 + 90) / 2, - .fist_32 = (82 + 92) / 2, - .fist_64 = (94 + 105) / 2, - .fld = (17 + 22) / 2, - .fld_32 = (38 + 56) / 2, - .fld_64 = (40 + 60) / 2, - .fld_80 = (53 + 65) / 2, - .fld_z1 = (11 + 21) / 2, - .fld_const = (15 + 24) / 2, - .fldcw = (7 + 14) / 2, - .fldenv = (35 + 45) / 2, - .fmul = (90 + 145) / 2, - .fmul_32 = (110 + 125) / 2, - .fmul_64 = (154 + 168) / 2, - .fnop = (10 + 16) / 2, - .fpatan = (250 + 800) / 2, - .fprem = (15 + 190) / 2, - .fprem1 = 0, /*387+*/ - .fptan = (30 + 540) / 2, - .frndint = (16 + 50) / 2, - .frstor = (197 + 207) / 2, - .fsave = (197 + 207) / 2, - .fscale = (32 + 38) / 2, - .fsetpm = 0, /*287+*/ - .fsin_cos = 0, /*387+*/ - .fsincos = 0, /*387+*/ - .fsqrt = (180 + 186) / 2, - .fst = (15 + 22) / 2, - .fst_32 = (84 + 90) / 2, - .fst_64 = (96 + 104) / 2, - .fst_80 = (52 + 58) / 2, - .fstcw_sw = (12 + 18) / 2, - .fstenv = (40 + 50) / 2, - .ftst = (38 + 48) / 2, - .fucom = 0, /*387+*/ - .fwait = 4, - .fxam = (12 + 23) / 2, - .fxch = (10 + 15) / 2, - .fxtract = (27 + 55) / 2, - .fyl2x = (900 + 1100) / 2, - .fyl2xp1 = (700 + 1000) / 2 +const x87_timings_t x87_timings_8087 = { + .f2xm1 = (310 + 630) / 2, + .fabs = (10 + 17) / 2, + .fadd = (70 + 100) / 2, + .fadd_32 = (90 + 120) / 2, + .fadd_64 = (95 + 125) / 2, + .fbld = (290 + 310) / 2, + .fbstp = (520 + 540) / 2, + .fchs = (10 + 17) / 2, + .fclex = (2 + 8) / 2, + .fcom = (40 + 50) / 2, + .fcom_32 = (60 + 70) / 2, + .fcom_64 = (65 + 75) / 2, + .fcos = 0, /*387+*/ + .fincdecstp = (6 + 12) / 2, + .fdisi_eni = (6 + 12) / 2, + .fdiv = (193 + 203) / 2, + .fdiv_32 = (215 + 225) / 2, + .fdiv_64 = (220 + 230) / 2, + .ffree = (9 + 16) / 2, + .fadd_i16 = (102 + 137) / 2, + .fadd_i32 = (108 + 143) / 2, + .fcom_i16 = (72 + 86) / 2, + .fcom_i32 = (78 + 91) / 2, + .fdiv_i16 = (224 + 238) / 2, + .fdiv_i32 = (230 + 243) / 2, + .fild_16 = (46 + 54) / 2, + .fild_32 = (50 + 60) / 2, + .fild_64 = (60 + 68) / 2, + .fmul_i16 = (124 + 138) / 2, + .fmul_i32 = (130 + 144) / 2, + .finit = (2 + 8) / 2, + .fist_16 = (80 + 90) / 2, + .fist_32 = (82 + 92) / 2, + .fist_64 = (94 + 105) / 2, + .fld = (17 + 22) / 2, + .fld_32 = (38 + 56) / 2, + .fld_64 = (40 + 60) / 2, + .fld_80 = (53 + 65) / 2, + .fld_z1 = (11 + 21) / 2, + .fld_const = (15 + 24) / 2, + .fldcw = (7 + 14) / 2, + .fldenv = (35 + 45) / 2, + .fmul = (90 + 145) / 2, + .fmul_32 = (110 + 125) / 2, + .fmul_64 = (154 + 168) / 2, + .fnop = (10 + 16) / 2, + .fpatan = (250 + 800) / 2, + .fprem = (15 + 190) / 2, + .fprem1 = 0, /*387+*/ + .fptan = (30 + 540) / 2, + .frndint = (16 + 50) / 2, + .frstor = (197 + 207) / 2, + .fsave = (197 + 207) / 2, + .fscale = (32 + 38) / 2, + .fsetpm = 0, /*287+*/ + .fsin_cos = 0, /*387+*/ + .fsincos = 0, /*387+*/ + .fsqrt = (180 + 186) / 2, + .fst = (15 + 22) / 2, + .fst_32 = (84 + 90) / 2, + .fst_64 = (96 + 104) / 2, + .fst_80 = (52 + 58) / 2, + .fstcw_sw = (12 + 18) / 2, + .fstenv = (40 + 50) / 2, + .ftst = (38 + 48) / 2, + .fucom = 0, /*387+*/ + .fwait = 4, + .fxam = (12 + 23) / 2, + .fxch = (10 + 15) / 2, + .fxtract = (27 + 55) / 2, + .fyl2x = (900 + 1100) / 2, + .fyl2xp1 = (700 + 1000) / 2 }; /*Mostly the same as 8087*/ -const x87_timings_t x87_timings_287 = -{ - .f2xm1 = (310 + 630) / 2, - .fabs = (10 + 17) / 2, - .fadd = (70 + 100) / 2, - .fadd_32 = (90 + 120) / 2, - .fadd_64 = (95 + 125) / 2, - .fbld = (290 + 310) / 2, - .fbstp = (520 + 540) / 2, - .fchs = (10 + 17) / 2, - .fclex = (2 + 8) / 2, - .fcom = (40 + 50) / 2, - .fcom_32 = (60 + 70) / 2, - .fcom_64 = (65 + 75) / 2, - .fcos = 0, /*387+*/ - .fincdecstp = (6 + 12) / 2, - .fdisi_eni = 2, - .fdiv = (193 + 203) / 2, - .fdiv_32 = (215 + 225) / 2, - .fdiv_64 = (220 + 230) / 2, - .ffree = (9 + 16) / 2, - .fadd_i16 = (102 + 137) / 2, - .fadd_i32 = (108 + 143) / 2, - .fcom_i16 = (72 + 86) / 2, - .fcom_i32 = (78 + 91) / 2, - .fdiv_i16 = (224 + 238) / 2, - .fdiv_i32 = (230 + 243) / 2, - .fild_16 = (46 + 54) / 2, - .fild_32 = (50 + 60) / 2, - .fild_64 = (60 + 68) / 2, - .fmul_i16 = (124 + 138) / 2, - .fmul_i32 = (130 + 144) / 2, - .finit = (2 + 8) / 2, - .fist_16 = (80 + 90) / 2, - .fist_32 = (82 + 92) / 2, - .fist_64 = (94 + 105) / 2, - .fld = (17 + 22) / 2, - .fld_32 = (38 + 56) / 2, - .fld_64 = (40 + 60) / 2, - .fld_80 = (53 + 65) / 2, - .fld_z1 = (11 + 21) / 2, - .fld_const = (15 + 24) / 2, - .fldcw = (7 + 14) / 2, - .fldenv = (35 + 45) / 2, - .fmul = (90 + 145) / 2, - .fmul_32 = (110 + 125) / 2, - .fmul_64 = (154 + 168) / 2, - .fnop = (10 + 16) / 2, - .fpatan = (250 + 800) / 2, - .fprem = (15 + 190) / 2, - .fprem1 = 0, /*387+*/ - .fptan = (30 + 540) / 2, - .frndint = (16 + 50) / 2, - .frstor = (197 + 207) / 2, - .fsave = (197 + 207) / 2, - .fscale = (32 + 38) / 2, - .fsetpm = (2 + 8) / 2, /*287+*/ - .fsin_cos = 0, /*387+*/ - .fsincos = 0, /*387+*/ - .fsqrt = (180 + 186) / 2, - .fst = (15 + 22) / 2, - .fst_32 = (84 + 90) / 2, - .fst_64 = (96 + 104) / 2, - .fst_80 = (52 + 58) / 2, - .fstcw_sw = (12 + 18) / 2, - .fstenv = (40 + 50) / 2, - .ftst = (38 + 48) / 2, - .fucom = 0, /*387+*/ - .fwait = 3, - .fxam = (12 + 23) / 2, - .fxch = (10 + 15) / 2, - .fxtract = (27 + 55) / 2, - .fyl2x = (900 + 1100) / 2, - .fyl2xp1 = (700 + 1000) / 2 +const x87_timings_t x87_timings_287 = { + .f2xm1 = (310 + 630) / 2, + .fabs = (10 + 17) / 2, + .fadd = (70 + 100) / 2, + .fadd_32 = (90 + 120) / 2, + .fadd_64 = (95 + 125) / 2, + .fbld = (290 + 310) / 2, + .fbstp = (520 + 540) / 2, + .fchs = (10 + 17) / 2, + .fclex = (2 + 8) / 2, + .fcom = (40 + 50) / 2, + .fcom_32 = (60 + 70) / 2, + .fcom_64 = (65 + 75) / 2, + .fcos = 0, /*387+*/ + .fincdecstp = (6 + 12) / 2, + .fdisi_eni = 2, + .fdiv = (193 + 203) / 2, + .fdiv_32 = (215 + 225) / 2, + .fdiv_64 = (220 + 230) / 2, + .ffree = (9 + 16) / 2, + .fadd_i16 = (102 + 137) / 2, + .fadd_i32 = (108 + 143) / 2, + .fcom_i16 = (72 + 86) / 2, + .fcom_i32 = (78 + 91) / 2, + .fdiv_i16 = (224 + 238) / 2, + .fdiv_i32 = (230 + 243) / 2, + .fild_16 = (46 + 54) / 2, + .fild_32 = (50 + 60) / 2, + .fild_64 = (60 + 68) / 2, + .fmul_i16 = (124 + 138) / 2, + .fmul_i32 = (130 + 144) / 2, + .finit = (2 + 8) / 2, + .fist_16 = (80 + 90) / 2, + .fist_32 = (82 + 92) / 2, + .fist_64 = (94 + 105) / 2, + .fld = (17 + 22) / 2, + .fld_32 = (38 + 56) / 2, + .fld_64 = (40 + 60) / 2, + .fld_80 = (53 + 65) / 2, + .fld_z1 = (11 + 21) / 2, + .fld_const = (15 + 24) / 2, + .fldcw = (7 + 14) / 2, + .fldenv = (35 + 45) / 2, + .fmul = (90 + 145) / 2, + .fmul_32 = (110 + 125) / 2, + .fmul_64 = (154 + 168) / 2, + .fnop = (10 + 16) / 2, + .fpatan = (250 + 800) / 2, + .fprem = (15 + 190) / 2, + .fprem1 = 0, /*387+*/ + .fptan = (30 + 540) / 2, + .frndint = (16 + 50) / 2, + .frstor = (197 + 207) / 2, + .fsave = (197 + 207) / 2, + .fscale = (32 + 38) / 2, + .fsetpm = (2 + 8) / 2, /*287+*/ + .fsin_cos = 0, /*387+*/ + .fsincos = 0, /*387+*/ + .fsqrt = (180 + 186) / 2, + .fst = (15 + 22) / 2, + .fst_32 = (84 + 90) / 2, + .fst_64 = (96 + 104) / 2, + .fst_80 = (52 + 58) / 2, + .fstcw_sw = (12 + 18) / 2, + .fstenv = (40 + 50) / 2, + .ftst = (38 + 48) / 2, + .fucom = 0, /*387+*/ + .fwait = 3, + .fxam = (12 + 23) / 2, + .fxch = (10 + 15) / 2, + .fxtract = (27 + 55) / 2, + .fyl2x = (900 + 1100) / 2, + .fyl2xp1 = (700 + 1000) / 2 }; -const x87_timings_t x87_timings_387 = -{ - .f2xm1 = (211 + 476) / 2, - .fabs = 22, - .fadd = (23 + 34) / 2, - .fadd_32 = (24 + 32) / 2, - .fadd_64 = (29 + 37) / 2, - .fbld = (266 + 275) / 2, - .fbstp = (512 + 534) / 2, - .fchs = (24 + 25) / 2, - .fclex = 11, - .fcom = 24, - .fcom_32 = 26, - .fcom_64 = 31, - .fcos = (122 + 772) / 2, - .fincdecstp = 22, - .fdisi_eni = 2, - .fdiv = (88 + 91) / 2, - .fdiv_32 = 89, - .fdiv_64 = 94, - .ffree = 18, - .fadd_i16 = (71 + 85) / 2, - .fadd_i32 = (57 + 72) / 2, - .fcom_i16 = (71 + 75) / 2, - .fcom_i32 = (56 + 63) / 2, - .fdiv_i16 = (136 + 140) / 2, - .fdiv_i32 = (120 + 127) / 2, - .fild_16 = (61 + 65) / 2, - .fild_32 = (45 + 52) / 2, - .fild_64 = (56 + 67) / 2, - .fmul_i16 = (76 + 87) / 2, - .fmul_i32 = (61 + 82) / 2, - .finit = 33, - .fist_16 = (82 + 95) / 2, - .fist_32 = (79 + 93) / 2, - .fist_64 = (80 + 97) / 2, - .fld = 14, - .fld_32 = 20, - .fld_64 = 25, - .fld_80 = 44, - .fld_z1 = (20 + 24) / 2, - .fld_const = 40, - .fldcw = 19, - .fldenv = 71, - .fmul = (29 + 57) / 2, - .fmul_32 = (27 + 35) / 2, - .fmul_64 = (32 + 57) / 2, - .fnop = 12, - .fpatan = (314 + 487) / 2, - .fprem = (74 + 155) / 2, - .fprem1 = (95 + 185) / 2, - .fptan = (191 + 497) / 2, - .frndint = (66 + 80) / 2, - .frstor = 308, - .fsave = 375, - .fscale = (67 + 86) / 2, - .fsetpm = 12, - .fsin_cos = (122 + 771) / 2, - .fsincos = (194 + 809) / 2, - .fsqrt = (122 + 129) / 2, - .fst = 11, - .fst_32 = 44, - .fst_64 = 45, - .fst_80 = 53, - .fstcw_sw = 15, - .fstenv = 103, - .ftst = 28, - .fucom = 24, - .fwait = 6, - .fxam = (30 + 38) / 2, - .fxch = 18, - .fxtract = (70 + 76) / 2, - .fyl2x = (120 + 538) / 2, - .fyl2xp1 = (257 + 547) / 2 +const x87_timings_t x87_timings_387 = { + .f2xm1 = (211 + 476) / 2, + .fabs = 22, + .fadd = (23 + 34) / 2, + .fadd_32 = (24 + 32) / 2, + .fadd_64 = (29 + 37) / 2, + .fbld = (266 + 275) / 2, + .fbstp = (512 + 534) / 2, + .fchs = (24 + 25) / 2, + .fclex = 11, + .fcom = 24, + .fcom_32 = 26, + .fcom_64 = 31, + .fcos = (122 + 772) / 2, + .fincdecstp = 22, + .fdisi_eni = 2, + .fdiv = (88 + 91) / 2, + .fdiv_32 = 89, + .fdiv_64 = 94, + .ffree = 18, + .fadd_i16 = (71 + 85) / 2, + .fadd_i32 = (57 + 72) / 2, + .fcom_i16 = (71 + 75) / 2, + .fcom_i32 = (56 + 63) / 2, + .fdiv_i16 = (136 + 140) / 2, + .fdiv_i32 = (120 + 127) / 2, + .fild_16 = (61 + 65) / 2, + .fild_32 = (45 + 52) / 2, + .fild_64 = (56 + 67) / 2, + .fmul_i16 = (76 + 87) / 2, + .fmul_i32 = (61 + 82) / 2, + .finit = 33, + .fist_16 = (82 + 95) / 2, + .fist_32 = (79 + 93) / 2, + .fist_64 = (80 + 97) / 2, + .fld = 14, + .fld_32 = 20, + .fld_64 = 25, + .fld_80 = 44, + .fld_z1 = (20 + 24) / 2, + .fld_const = 40, + .fldcw = 19, + .fldenv = 71, + .fmul = (29 + 57) / 2, + .fmul_32 = (27 + 35) / 2, + .fmul_64 = (32 + 57) / 2, + .fnop = 12, + .fpatan = (314 + 487) / 2, + .fprem = (74 + 155) / 2, + .fprem1 = (95 + 185) / 2, + .fptan = (191 + 497) / 2, + .frndint = (66 + 80) / 2, + .frstor = 308, + .fsave = 375, + .fscale = (67 + 86) / 2, + .fsetpm = 12, + .fsin_cos = (122 + 771) / 2, + .fsincos = (194 + 809) / 2, + .fsqrt = (122 + 129) / 2, + .fst = 11, + .fst_32 = 44, + .fst_64 = 45, + .fst_80 = 53, + .fstcw_sw = 15, + .fstenv = 103, + .ftst = 28, + .fucom = 24, + .fwait = 6, + .fxam = (30 + 38) / 2, + .fxch = 18, + .fxtract = (70 + 76) / 2, + .fyl2x = (120 + 538) / 2, + .fyl2xp1 = (257 + 547) / 2 }; -const x87_timings_t x87_timings_486 = -{ - .f2xm1 = (140 + 270) / 2, - .fabs = 3, - .fadd = (8 + 20) / 2, - .fadd_32 = (8 + 20) / 2, - .fadd_64 = (8 + 20) / 2, - .fbld = (70 + 103) / 2, - .fbstp = (172 + 176) / 2, - .fchs = 6, - .fclex = 7, - .fcom = 4, - .fcom_32 = 4, - .fcom_64 = 4, - .fcos = (257 + 354) / 2, - .fincdecstp = 3, - .fdisi_eni = 3, - .fdiv = 73, - .fdiv_32 = 73, - .fdiv_64 = 73, - .ffree = 3, - .fadd_i16 = (20 + 35) / 2, - .fadd_i32 = (19 + 32) / 2, - .fcom_i16 = (16 + 20) / 2, - .fcom_i32 = (15 + 17) / 2, - .fdiv_i16 = (85 + 89) / 2, - .fdiv_i32 = (84 + 86) / 2, - .fild_16 = (13 + 16) / 2, - .fild_32 = (9 + 12) / 2, - .fild_64 = (10 + 18) / 2, - .fmul_i16 = (23 + 27) / 2, - .fmul_i32 = (22 + 24) / 2, - .finit = 17, - .fist_16 = (29 + 34) / 2, - .fist_32 = (28 + 34) / 2, - .fist_64 = (29 + 34) / 2, - .fld = 4, - .fld_32 = 3, - .fld_64 = 3, - .fld_80 = 6, - .fld_z1 = 4, - .fld_const = 8, - .fldcw = 4, - .fldenv = 34, - .fmul = 16, - .fmul_32 = 11, - .fmul_64 = 14, - .fnop = 3, - .fpatan = (218 + 303) / 2, - .fprem = (70 + 138) / 2, - .fprem1 = (72 + 167) / 2, - .fptan = (200 + 273) / 2, - .frndint = (21 + 30) / 2, - .frstor = 120, - .fsave = 143, - .fscale = (30 + 32) / 2, - .fsetpm = 3, - .fsin_cos = (257 + 354) / 2, - .fsincos = (292 + 365) / 2, - .fsqrt = (83 + 87) / 2, - .fst = 3, - .fst_32 = 7, - .fst_64 = 8, - .fst_80 = 6, - .fstcw_sw = 3, - .fstenv = 56, - .ftst = 4, - .fucom = 4, - .fwait = (1 + 3) / 2, - .fxam = 8, - .fxch = 4, - .fxtract = (16 + 20) / 2, - .fyl2x = (196 + 329) / 2, - .fyl2xp1 = (171 + 326) / 2 +const x87_timings_t x87_timings_486 = { + .f2xm1 = (140 + 270) / 2, + .fabs = 3, + .fadd = (8 + 20) / 2, + .fadd_32 = (8 + 20) / 2, + .fadd_64 = (8 + 20) / 2, + .fbld = (70 + 103) / 2, + .fbstp = (172 + 176) / 2, + .fchs = 6, + .fclex = 7, + .fcom = 4, + .fcom_32 = 4, + .fcom_64 = 4, + .fcos = (257 + 354) / 2, + .fincdecstp = 3, + .fdisi_eni = 3, + .fdiv = 73, + .fdiv_32 = 73, + .fdiv_64 = 73, + .ffree = 3, + .fadd_i16 = (20 + 35) / 2, + .fadd_i32 = (19 + 32) / 2, + .fcom_i16 = (16 + 20) / 2, + .fcom_i32 = (15 + 17) / 2, + .fdiv_i16 = (85 + 89) / 2, + .fdiv_i32 = (84 + 86) / 2, + .fild_16 = (13 + 16) / 2, + .fild_32 = (9 + 12) / 2, + .fild_64 = (10 + 18) / 2, + .fmul_i16 = (23 + 27) / 2, + .fmul_i32 = (22 + 24) / 2, + .finit = 17, + .fist_16 = (29 + 34) / 2, + .fist_32 = (28 + 34) / 2, + .fist_64 = (29 + 34) / 2, + .fld = 4, + .fld_32 = 3, + .fld_64 = 3, + .fld_80 = 6, + .fld_z1 = 4, + .fld_const = 8, + .fldcw = 4, + .fldenv = 34, + .fmul = 16, + .fmul_32 = 11, + .fmul_64 = 14, + .fnop = 3, + .fpatan = (218 + 303) / 2, + .fprem = (70 + 138) / 2, + .fprem1 = (72 + 167) / 2, + .fptan = (200 + 273) / 2, + .frndint = (21 + 30) / 2, + .frstor = 120, + .fsave = 143, + .fscale = (30 + 32) / 2, + .fsetpm = 3, + .fsin_cos = (257 + 354) / 2, + .fsincos = (292 + 365) / 2, + .fsqrt = (83 + 87) / 2, + .fst = 3, + .fst_32 = 7, + .fst_64 = 8, + .fst_80 = 6, + .fstcw_sw = 3, + .fstenv = 56, + .ftst = 4, + .fucom = 4, + .fwait = (1 + 3) / 2, + .fxam = 8, + .fxch = 4, + .fxtract = (16 + 20) / 2, + .fyl2x = (196 + 329) / 2, + .fyl2xp1 = (171 + 326) / 2 }; /* this should be used for FPUs with no concurrency. some pre-486DX Cyrix FPUs reportedly are like this. */ -const x87_timings_t x87_concurrency_none = -{ - .f2xm1 = 0, - .fabs = 0, - .fadd = 0, - .fadd_32 = 0, - .fadd_64 = 0, - .fbld = 0, - .fbstp = 0, - .fchs = 0, - .fclex = 0, - .fcom = 0, - .fcom_32 = 0, - .fcom_64 = 0, - .fcos = 0, - .fincdecstp = 0, - .fdisi_eni = 0, - .fdiv = 0, - .fdiv_32 = 0, - .fdiv_64 = 0, - .ffree = 0, - .fadd_i16 = 0, - .fadd_i32 = 0, - .fcom_i16 = 0, - .fcom_i32 = 0, - .fdiv_i16 = 0, - .fdiv_i32 = 0, - .fild_16 = 0, - .fild_32 = 0, - .fild_64 = 0, - .fmul_i16 = 0, - .fmul_i32 = 0, - .finit = 0, - .fist_16 = 0, - .fist_32 = 0, - .fist_64 = 0, - .fld = 0, - .fld_32 = 0, - .fld_64 = 0, - .fld_80 = 0, - .fld_z1 = 0, - .fld_const = 0, - .fldcw = 0, - .fldenv = 0, - .fmul = 0, - .fmul_32 = 0, - .fmul_64 = 0, - .fnop = 0, - .fpatan = 0, - .fprem = 0, - .fprem1 = 0, - .fptan = 0, - .frndint = 0, - .frstor = 0, - .fsave = 0, - .fscale = 0, - .fsetpm = 0, - .fsin_cos = 0, - .fsincos = 0, - .fsqrt = 0, - .fst = 0, - .fst_32 = 0, - .fst_64 = 0, - .fst_80 = 0, - .fstcw_sw = 0, - .fstenv = 0, - .ftst = 0, - .fucom = 0, - .fwait = 0, - .fxam = 0, - .fxch = 0, - .fxtract = 0, - .fyl2x = 0, - .fyl2xp1 = 0, +const x87_timings_t x87_concurrency_none = { + .f2xm1 = 0, + .fabs = 0, + .fadd = 0, + .fadd_32 = 0, + .fadd_64 = 0, + .fbld = 0, + .fbstp = 0, + .fchs = 0, + .fclex = 0, + .fcom = 0, + .fcom_32 = 0, + .fcom_64 = 0, + .fcos = 0, + .fincdecstp = 0, + .fdisi_eni = 0, + .fdiv = 0, + .fdiv_32 = 0, + .fdiv_64 = 0, + .ffree = 0, + .fadd_i16 = 0, + .fadd_i32 = 0, + .fcom_i16 = 0, + .fcom_i32 = 0, + .fdiv_i16 = 0, + .fdiv_i32 = 0, + .fild_16 = 0, + .fild_32 = 0, + .fild_64 = 0, + .fmul_i16 = 0, + .fmul_i32 = 0, + .finit = 0, + .fist_16 = 0, + .fist_32 = 0, + .fist_64 = 0, + .fld = 0, + .fld_32 = 0, + .fld_64 = 0, + .fld_80 = 0, + .fld_z1 = 0, + .fld_const = 0, + .fldcw = 0, + .fldenv = 0, + .fmul = 0, + .fmul_32 = 0, + .fmul_64 = 0, + .fnop = 0, + .fpatan = 0, + .fprem = 0, + .fprem1 = 0, + .fptan = 0, + .frndint = 0, + .frstor = 0, + .fsave = 0, + .fscale = 0, + .fsetpm = 0, + .fsin_cos = 0, + .fsincos = 0, + .fsqrt = 0, + .fst = 0, + .fst_32 = 0, + .fst_64 = 0, + .fst_80 = 0, + .fstcw_sw = 0, + .fstenv = 0, + .ftst = 0, + .fucom = 0, + .fwait = 0, + .fxam = 0, + .fxch = 0, + .fxtract = 0, + .fyl2x = 0, + .fyl2xp1 = 0, }; -const x87_timings_t x87_concurrency_486 = -{ - .f2xm1 = 2, - .fabs = 0, - .fadd = 7, - .fadd_32 = 7, - .fadd_64 = 7, - .fbld = 8, - .fbstp = 0, - .fchs = 0, - .fclex = 0, - .fcom = 1, - .fcom_32 = 1, - .fcom_64 = 1, - .fcos = 2, - .fincdecstp = 0, - .fdisi_eni = 0, - .fdiv = 70, - .fdiv_32 = 70, - .fdiv_64 = 70, - .ffree = 0, - .fadd_i16 = 7, - .fadd_i32 = 7, - .fcom_i16 = 1, - .fcom_i32 = 1, - .fdiv_i16 = 70, - .fdiv_i32 = 70, - .fild_16 = 4, - .fild_32 = 4, - .fild_64 = 8, - .fmul_i16 = 8, - .fmul_i32 = 8, - .finit = 0, - .fist_16 = 0, - .fist_32 = 0, - .fist_64 = 0, - .fld = 0, - .fld_32 = 0, - .fld_64 = 0, - .fld_80 = 0, - .fld_z1 = 0, - .fld_const = 2, - .fldcw = 0, - .fldenv = 0, - .fmul = 13, - .fmul_32 = 8, - .fmul_64 = 11, - .fnop = 0, - .fpatan = 5, - .fprem = 2, - .fprem1 = 6, - .fptan = 70, - .frndint = 0, - .frstor = 0, - .fsave = 0, - .fscale = 2, - .fsetpm = 0, - .fsin_cos = 2, - .fsincos = 2, - .fsqrt = 70, - .fst = 0, - .fst_32 = 0, - .fst_64 = 0, - .fst_80 = 0, - .fstcw_sw = 0, - .fstenv = 0, - .ftst = 1, - .fucom = 1, - .fwait = 0, - .fxam = 0, - .fxch = 0, - .fxtract = 4, - .fyl2x = 13, - .fyl2xp1 = 13, +const x87_timings_t x87_concurrency_486 = { + .f2xm1 = 2, + .fabs = 0, + .fadd = 7, + .fadd_32 = 7, + .fadd_64 = 7, + .fbld = 8, + .fbstp = 0, + .fchs = 0, + .fclex = 0, + .fcom = 1, + .fcom_32 = 1, + .fcom_64 = 1, + .fcos = 2, + .fincdecstp = 0, + .fdisi_eni = 0, + .fdiv = 70, + .fdiv_32 = 70, + .fdiv_64 = 70, + .ffree = 0, + .fadd_i16 = 7, + .fadd_i32 = 7, + .fcom_i16 = 1, + .fcom_i32 = 1, + .fdiv_i16 = 70, + .fdiv_i32 = 70, + .fild_16 = 4, + .fild_32 = 4, + .fild_64 = 8, + .fmul_i16 = 8, + .fmul_i32 = 8, + .finit = 0, + .fist_16 = 0, + .fist_32 = 0, + .fist_64 = 0, + .fld = 0, + .fld_32 = 0, + .fld_64 = 0, + .fld_80 = 0, + .fld_z1 = 0, + .fld_const = 2, + .fldcw = 0, + .fldenv = 0, + .fmul = 13, + .fmul_32 = 8, + .fmul_64 = 11, + .fnop = 0, + .fpatan = 5, + .fprem = 2, + .fprem1 = 6, + .fptan = 70, + .frndint = 0, + .frstor = 0, + .fsave = 0, + .fscale = 2, + .fsetpm = 0, + .fsin_cos = 2, + .fsincos = 2, + .fsqrt = 70, + .fst = 0, + .fst_32 = 0, + .fst_64 = 0, + .fst_80 = 0, + .fstcw_sw = 0, + .fstenv = 0, + .ftst = 1, + .fucom = 1, + .fwait = 0, + .fxam = 0, + .fxch = 0, + .fxtract = 4, + .fyl2x = 13, + .fyl2xp1 = 13, }; diff --git a/src/cpu/x87_timings.h b/src/cpu/x87_timings.h index 6396fcb06..ad16231db 100644 --- a/src/cpu/x87_timings.h +++ b/src/cpu/x87_timings.h @@ -1,51 +1,51 @@ typedef struct { - int f2xm1; - int fabs; - int fadd, fadd_32, fadd_64; - int fbld; - int fbstp; - int fchs; - int fclex; - int fcom, fcom_32, fcom_64; - int fcos; - int fincdecstp; - int fdisi_eni; - int fdiv, fdiv_32, fdiv_64; - int ffree; - int fadd_i16, fadd_i32; - int fcom_i16, fcom_i32; - int fdiv_i16, fdiv_i32; - int fild_16, fild_32, fild_64; - int fmul_i16, fmul_i32; - int finit; - int fist_16, fist_32, fist_64; - int fld, fld_32, fld_64, fld_80; - int fld_z1, fld_const; - int fldcw; - int fldenv; - int fmul, fmul_32, fmul_64; - int fnop; - int fpatan; - int fprem, fprem1; - int fptan; - int frndint; - int frstor; - int fsave; - int fscale; - int fsetpm; - int fsin_cos, fsincos; - int fsqrt; - int fst, fst_32, fst_64, fst_80; - int fstcw_sw; - int fstenv; - int ftst; - int fucom; - int fwait; - int fxam; - int fxch; - int fxtract; - int fyl2x, fyl2xp1; + int f2xm1; + int fabs; + int fadd, fadd_32, fadd_64; + int fbld; + int fbstp; + int fchs; + int fclex; + int fcom, fcom_32, fcom_64; + int fcos; + int fincdecstp; + int fdisi_eni; + int fdiv, fdiv_32, fdiv_64; + int ffree; + int fadd_i16, fadd_i32; + int fcom_i16, fcom_i32; + int fdiv_i16, fdiv_i32; + int fild_16, fild_32, fild_64; + int fmul_i16, fmul_i32; + int finit; + int fist_16, fist_32, fist_64; + int fld, fld_32, fld_64, fld_80; + int fld_z1, fld_const; + int fldcw; + int fldenv; + int fmul, fmul_32, fmul_64; + int fnop; + int fpatan; + int fprem, fprem1; + int fptan; + int frndint; + int frstor; + int fsave; + int fscale; + int fsetpm; + int fsin_cos, fsincos; + int fsqrt; + int fst, fst_32, fst_64, fst_80; + int fstcw_sw; + int fstenv; + int ftst; + int fucom; + int fwait; + int fxam; + int fxch; + int fxtract; + int fyl2x, fyl2xp1; } x87_timings_t; extern const x87_timings_t x87_timings_8087; From a6d5ff565b9ac3da082043b1af49da9931971d12 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 21 Sep 2022 18:12:05 -0400 Subject: [PATCH 374/386] Fix bug in PSSJ ISA clone --- src/sound/snd_pssj.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/sound/snd_pssj.c b/src/sound/snd_pssj.c index e467f3238..4681d2f84 100644 --- a/src/sound/snd_pssj.c +++ b/src/sound/snd_pssj.c @@ -215,11 +215,11 @@ pssj_isa_init(const device_t *info) pssj_t *pssj = malloc(sizeof(pssj_t)); memset(pssj, 0, sizeof(pssj_t)); - sn76489_init(&pssj->sn76489, 0x00c0, 0x0004, PSSJ, 3579545); - uint16_t addr = device_get_config_hex16("base"); - io_sethandler(addr, 0x0004, pssj_read, NULL, NULL, pssj_write, NULL, NULL, pssj); + sn76489_init(&pssj->sn76489, addr, 0x0004, PSSJ, 3579545); + + io_sethandler(addr + 0x04, 0x0004, pssj_read, NULL, NULL, pssj_write, NULL, NULL, pssj); timer_add(&pssj->timer_count, pssj_callback, pssj, pssj->enable); sound_add_handler(pssj_get_buffer, pssj); From 436e8a20fedbb9f6dad86bad39611a82f213ba4d Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 21 Sep 2022 18:13:12 -0400 Subject: [PATCH 375/386] Add alternate addresses to PSSJ ISA clone --- src/sound/snd_pssj.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/sound/snd_pssj.c b/src/sound/snd_pssj.c index 4681d2f84..1c91a0231 100644 --- a/src/sound/snd_pssj.c +++ b/src/sound/snd_pssj.c @@ -251,6 +251,14 @@ static const device_config_t pssj_isa_config[] = { .description = "0x0C0", .value = 0x0C0 }, + { + .description = "0x0E0", + .value = 0x0E0 + }, + { + .description = "0x1C0", + .value = 0x1C0 + }, { .description = "0x1E0", .value = 0x1E0 @@ -259,6 +267,10 @@ static const device_config_t pssj_isa_config[] = { .description = "0x2C0", .value = 0x2C0 }, + { + .description = "0x2E0", + .value = 0x2E0 + }, { .description = "" } } }, From 09f8388a4391d65a42cfac7d4c1ea902be1af7e7 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 21 Sep 2022 18:13:39 -0400 Subject: [PATCH 376/386] Add alternate addreses to TNDY/PSG clone --- src/sound/snd_sn76489.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/sound/snd_sn76489.c b/src/sound/snd_sn76489.c index d63b34af6..6b799a88a 100644 --- a/src/sound/snd_sn76489.c +++ b/src/sound/snd_sn76489.c @@ -259,6 +259,14 @@ static const device_config_t tndy_config[] = { .description = "0x0C0", .value = 0x0C0 }, + { + .description = "0x0E0", + .value = 0x0E0 + }, + { + .description = "0x1C0", + .value = 0x1C0 + }, { .description = "0x1E0", .value = 0x1E0 @@ -267,6 +275,10 @@ static const device_config_t tndy_config[] = { .description = "0x2C0", .value = 0x2C0 }, + { + .description = "0x2E0", + .value = 0x2E0 + }, { .description = "" } } }, From 28ae786d62ad5ec014873c4edafb237807e22b0b Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 21 Sep 2022 18:14:17 -0400 Subject: [PATCH 377/386] PSG/PSSJ out of dev branch --- CMakeLists.txt | 1 - src/include/86box/sound.h | 4 ++-- src/sound/CMakeLists.txt | 4 ---- src/sound/snd_pssj.c | 6 ------ src/sound/snd_sn76489.c | 7 +------ src/sound/sound.c | 2 -- src/win/Makefile.mingw | 10 ---------- 7 files changed, 3 insertions(+), 31 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 4e49ac784..caa4aaa90 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -158,7 +158,6 @@ cmake_dependent_option(OLIVETTI "Olivetti M290" cmake_dependent_option(OPEN_AT "OpenAT" ON "DEV_BRANCH" OFF) cmake_dependent_option(PAS16 "Pro Audio Spectrum 16" ON "DEV_BRANCH" OFF) cmake_dependent_option(SIO_DETECT "Super I/O Detection Helper" ON "DEV_BRANCH" OFF) -cmake_dependent_option(TANDY_ISA "Tandy PSG ISA clone boards" ON "DEV_BRANCH" OFF) cmake_dependent_option(VGAWONDER "ATI VGA Wonder (ATI-18800)" ON "DEV_BRANCH" OFF) cmake_dependent_option(XL24 "ATI VGA Wonder XL24 (ATI-28800-6)" ON "DEV_BRANCH" OFF) diff --git a/src/include/86box/sound.h b/src/include/86box/sound.h index 71d4942d0..9d4ddff06 100644 --- a/src/include/86box/sound.h +++ b/src/include/86box/sound.h @@ -102,10 +102,10 @@ extern const device_t ps1snd_device; /* Tandy PSSJ */ extern const device_t pssj_device; -# if defined(DEV_BRANCH) && defined(USE_TANDY_ISA) extern const device_t pssj_isa_device; + +/* Tandy PSG */ extern const device_t tndy_device; -# endif /* Creative Labs Sound Blaster */ extern const device_t sb_1_device; diff --git a/src/sound/CMakeLists.txt b/src/sound/CMakeLists.txt index 581f8d517..3f646a55f 100644 --- a/src/sound/CMakeLists.txt +++ b/src/sound/CMakeLists.txt @@ -117,9 +117,5 @@ if(GUSMAX) target_compile_definitions(snd PRIVATE USE_GUSMAX) endif() -if(TANDY_ISA) - target_compile_definitions(snd PRIVATE USE_TANDY_ISA) -endif() - add_subdirectory(resid-fp) target_link_libraries(86Box resid-fp) diff --git a/src/sound/snd_pssj.c b/src/sound/snd_pssj.c index 1c91a0231..80ef93e05 100644 --- a/src/sound/snd_pssj.c +++ b/src/sound/snd_pssj.c @@ -208,7 +208,6 @@ pssj_1e0_init(const device_t *info) return pssj; } -#if defined(DEV_BRANCH) && defined(USE_TANDY_ISA) void * pssj_isa_init(const device_t *info) { @@ -225,7 +224,6 @@ pssj_isa_init(const device_t *info) return pssj; } -#endif void pssj_close(void *p) @@ -235,7 +233,6 @@ pssj_close(void *p) free(pssj); } -#if defined(DEV_BRANCH) && defined(USE_TANDY_ISA) static const device_config_t pssj_isa_config[] = { // clang-format off { @@ -277,7 +274,6 @@ static const device_config_t pssj_isa_config[] = { { .name = "", .description = "", .type = CONFIG_END } // clang-format on }; -#endif const device_t pssj_device = { .name = "Tandy PSSJ", @@ -307,7 +303,6 @@ const device_t pssj_1e0_device = { .config = NULL }; -#if defined(DEV_BRANCH) && defined(USE_TANDY_ISA) const device_t pssj_isa_device = { .name = "Tandy PSSJ Clone", .internal_name = "pssj_isa", @@ -321,4 +316,3 @@ const device_t pssj_isa_device = { .force_redraw = NULL, .config = pssj_isa_config }; -#endif diff --git a/src/sound/snd_sn76489.c b/src/sound/snd_sn76489.c index 6b799a88a..a29405429 100644 --- a/src/sound/snd_sn76489.c +++ b/src/sound/snd_sn76489.c @@ -209,6 +209,7 @@ sn76489_device_init(const device_t *info) return sn76489; } + void * ncr8496_device_init(const device_t *info) { @@ -220,7 +221,6 @@ ncr8496_device_init(const device_t *info) return sn76489; } -#if defined(DEV_BRANCH) && defined(USE_TANDY_ISA) void * tndy_device_init(const device_t *info) { @@ -233,7 +233,6 @@ tndy_device_init(const device_t *info) return sn76489; } -#endif void sn76489_device_close(void *p) @@ -243,7 +242,6 @@ sn76489_device_close(void *p) free(sn76489); } -#if defined(DEV_BRANCH) && defined(USE_TANDY_ISA) static const device_config_t tndy_config[] = { // clang-format off { @@ -285,7 +283,6 @@ static const device_config_t tndy_config[] = { { .name = "", .description = "", .type = CONFIG_END } // clang-format on }; -#endif const device_t sn76489_device = { .name = "TI SN74689 PSG", @@ -315,7 +312,6 @@ const device_t ncr8496_device = { .config = NULL }; -#if defined(DEV_BRANCH) && defined(USE_TANDY_ISA) const device_t tndy_device = { .name = "TNDY", .internal_name = "tndy", @@ -329,4 +325,3 @@ const device_t tndy_device = { .force_redraw = NULL, .config = tndy_config }; -#endif diff --git a/src/sound/sound.c b/src/sound/sound.c index 604dac38f..6d5e56cc0 100644 --- a/src/sound/sound.c +++ b/src/sound/sound.c @@ -131,10 +131,8 @@ static const SOUND_CARD sound_cards[] = { #if defined(DEV_BRANCH) && defined(USE_PAS16) { &pas16_device }, #endif -#if defined(DEV_BRANCH) && defined(USE_TANDY_ISA) { &pssj_isa_device }, { &tndy_device }, -#endif { &wss_device }, { &adlib_mca_device }, { &ncr_business_audio_device }, diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index cdc59e485..b1c298970 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -79,9 +79,6 @@ ifeq ($(DEV_BUILD), y) ifndef SIO_DETECT SIO_DETECT := y endif - ifndef TANDY_ISA - TANDY_ISA := y - endif ifndef VGAWONDER VGAWONDER := y endif @@ -143,9 +140,6 @@ else ifndef SIO_DETECT SIO_DETECT := n endif - ifndef TANDY_ISA - TANDY_ISA := n - endif ifndef VGAWONDER VGAWONDER := n endif @@ -495,10 +489,6 @@ OPTS += -DUSE_SIO_DETECT DEVBROBJ += sio_detect.o endif -ifeq ($(TANDY_ISA), y) -OPTS += -DUSE_TANDY_ISA -endif - ifeq ($(VGAWONDER), y) OPTS += -DUSE_VGAWONDER endif From ece9f7ec72a4a20f799ee00a8fb75b8553ccff63 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 21 Sep 2022 18:53:41 -0400 Subject: [PATCH 378/386] Fix some compile warns while I'm at it --- src/cpu/386.c | 2 ++ src/ini.c | 2 +- src/video/vid_xga.c | 2 +- src/video/video.c | 4 ++-- 4 files changed, 6 insertions(+), 4 deletions(-) diff --git a/src/cpu/386.c b/src/cpu/386.c index 662850318..48c45d342 100644 --- a/src/cpu/386.c +++ b/src/cpu/386.c @@ -69,6 +69,7 @@ x386_log(const char *fmt, ...) #include "x86_flags.h" +/* #define getbytef() \ ((uint8_t) (fetchdat)); \ cpu_state.pc++ @@ -81,6 +82,7 @@ x386_log(const char *fmt, ...) #define getword2f() \ ((uint16_t) (fetchdat >> 8)); \ cpu_state.pc += 2 +*/ #define OP_TABLE(name) ops_##name diff --git a/src/ini.c b/src/ini.c index b3c7295cb..923d50ca9 100644 --- a/src/ini.c +++ b/src/ini.c @@ -275,7 +275,7 @@ ini_detect_bom(char *fn) #endif if (f == NULL) return (0); - fread(bom, 1, 3, f); + (void) !fread(bom, 1, 3, f); if (bom[0] == 0xEF && bom[1] == 0xBB && bom[2] == 0xBF) { fclose(f); return 1; diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index b83d6467d..cbec48739 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -2688,7 +2688,7 @@ static void rom = malloc(xga->bios_rom.sz); memset(rom, 0xff, xga->bios_rom.sz); - (void) fread(rom, xga->bios_rom.sz, 1, f); + (void) !fread(rom, xga->bios_rom.sz, 1, f); temp -= xga->bios_rom.sz; (void) fclose(f); diff --git a/src/video/video.c b/src/video/video.c index 2dfe48ab9..eb4997574 100644 --- a/src/video/video.c +++ b/src/video/video.c @@ -996,9 +996,9 @@ loadfont_common(FILE *f, int format) for (d = 0; d < 4; d++) { /* There are 4 fonts in the ROM */ for (c = 0; c < 256; c++) /* 8x14 MDA in 8x16 cell */ - fread(&fontdatm[256 * d + c][0], 1, 16, f); + (void) !fread(&fontdatm[256 * d + c][0], 1, 16, f); for (c = 0; c < 256; c++) { /* 8x8 CGA in 8x16 cell */ - fread(&fontdat[256 * d + c][0], 1, 8, f); + (void) !fread(&fontdat[256 * d + c][0], 1, 8, f); fseek(f, 8, SEEK_CUR); } } From 4ab4f247e4023a7c489547bcc14ebdb00470c289 Mon Sep 17 00:00:00 2001 From: Alexander Babikov <2708460+lemondrops@users.noreply.github.com> Date: Sun, 18 Sep 2022 04:29:57 +0500 Subject: [PATCH 379/386] Fix a crash when saving window dimensions and coordinates --- src/config.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/src/config.c b/src/config.c index f9fa81945..6212871be 100644 --- a/src/config.c +++ b/src/config.c @@ -2050,10 +2050,13 @@ save_general(void) static void save_monitor(int monitor_index) { - char cat[sizeof("Monitor #") + 12] = { [0] = 0 }; - char temp[512]; + ini_section_t cat; + char name[sizeof("Monitor #") + 12] = { [0] = 0 }; + char temp[512]; + + snprintf(name, sizeof(name), "Monitor #%i", monitor_index + 1); + cat = ini_find_or_create_section(config, name); - snprintf(cat, sizeof(cat), "Monitor #%i", monitor_index + 1); if (window_remember) { sprintf(temp, "%i, %i, %i, %i", monitor_settings[monitor_index].mon_window_x, monitor_settings[monitor_index].mon_window_y, @@ -2069,6 +2072,8 @@ save_monitor(int monitor_index) ini_section_delete_var(cat, "window_coordinates"); ini_section_delete_var(cat, "window_maximized"); } + + ini_delete_section_if_empty(config, cat); } /* Save "Machine" section. */ From 7a7f87b532e666a9760e59bd55a79d36647141dd Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 28 Sep 2022 04:01:19 +0200 Subject: [PATCH 380/386] Enabled the LUN check for ATAPI MO, ZIP, and CD-ROM drives. --- src/disk/mo.c | 10 ++++------ src/disk/zip.c | 10 ++++------ src/scsi/scsi_cdrom.c | 12 +++++------- 3 files changed, 13 insertions(+), 19 deletions(-) diff --git a/src/disk/mo.c b/src/disk/mo.c index fdcb30099..f73ec049f 100644 --- a/src/disk/mo.c +++ b/src/disk/mo.c @@ -1111,12 +1111,10 @@ mo_pre_execution_check(mo_t *dev, uint8_t *cdb) { int ready = 0; - if (dev->drv->bus_type == MO_BUS_SCSI) { - if ((cdb[0] != GPCMD_REQUEST_SENSE) && (dev->cur_lun == SCSI_LUN_USE_CDB) && (cdb[1] & 0xe0)) { - mo_log("MO %i: Attempting to execute a unknown command targeted at SCSI LUN %i\n", dev->id, ((dev->request_length >> 5) & 7)); - mo_invalid_lun(dev); - return 0; - } + if ((cdb[0] != GPCMD_REQUEST_SENSE) && (dev->cur_lun == SCSI_LUN_USE_CDB) && (cdb[1] & 0xe0)) { + mo_log("MO %i: Attempting to execute a unknown command targeted at SCSI LUN %i\n", dev->id, ((dev->request_length >> 5) & 7)); + mo_invalid_lun(dev); + return 0; } if (!(mo_command_flags[cdb[0]] & IMPLEMENTED)) { diff --git a/src/disk/zip.c b/src/disk/zip.c index 4c2492c1b..885aa92a5 100644 --- a/src/disk/zip.c +++ b/src/disk/zip.c @@ -1182,12 +1182,10 @@ zip_pre_execution_check(zip_t *dev, uint8_t *cdb) { int ready = 0; - if (dev->drv->bus_type == ZIP_BUS_SCSI) { - if ((cdb[0] != GPCMD_REQUEST_SENSE) && (dev->cur_lun == SCSI_LUN_USE_CDB) && (cdb[1] & 0xe0)) { - zip_log("ZIP %i: Attempting to execute a unknown command targeted at SCSI LUN %i\n", dev->id, ((dev->request_length >> 5) & 7)); - zip_invalid_lun(dev); - return 0; - } + if ((cdb[0] != GPCMD_REQUEST_SENSE) && (dev->cur_lun == SCSI_LUN_USE_CDB) && (cdb[1] & 0xe0)) { + zip_log("ZIP %i: Attempting to execute a unknown command targeted at SCSI LUN %i\n", dev->id, ((dev->request_length >> 5) & 7)); + zip_invalid_lun(dev); + return 0; } if (!(zip_command_flags[cdb[0]] & IMPLEMENTED)) { diff --git a/src/scsi/scsi_cdrom.c b/src/scsi/scsi_cdrom.c index 033a2bf42..b4b91cce8 100644 --- a/src/scsi/scsi_cdrom.c +++ b/src/scsi/scsi_cdrom.c @@ -1152,13 +1152,11 @@ scsi_cdrom_pre_execution_check(scsi_cdrom_t *dev, uint8_t *cdb) { int ready = 0; - if (dev->drv->bus_type == CDROM_BUS_SCSI) { - if ((cdb[0] != GPCMD_REQUEST_SENSE) && (dev->cur_lun == SCSI_LUN_USE_CDB) && (cdb[1] & 0xe0)) { - scsi_cdrom_log("CD-ROM %i: Attempting to execute a unknown command targeted at SCSI LUN %i\n", - dev->id, ((dev->request_length >> 5) & 7)); - scsi_cdrom_invalid_lun(dev); - return 0; - } + if ((cdb[0] != GPCMD_REQUEST_SENSE) && (dev->cur_lun == SCSI_LUN_USE_CDB) && (cdb[1] & 0xe0)) { + scsi_cdrom_log("CD-ROM %i: Attempting to execute a unknown command targeted at SCSI LUN %i\n", + dev->id, ((dev->request_length >> 5) & 7)); + scsi_cdrom_invalid_lun(dev); + return 0; } if (!(scsi_cdrom_command_flags[cdb[0]] & IMPLEMENTED)) { From a6c9af30644a6caa2c1287a690376f6201385a84 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Sun, 2 Oct 2022 01:35:17 +0600 Subject: [PATCH 381/386] Add NEC SV9000 (Trident TVGA9000B) --- src/include/86box/video.h | 1 + src/video/vid_table.c | 1 + src/video/vid_tvga.c | 39 ++++++++++++++++++++++++++++++--------- 3 files changed, 32 insertions(+), 9 deletions(-) diff --git a/src/include/86box/video.h b/src/include/86box/video.h index 4e5e426eb..62a424c6a 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -509,6 +509,7 @@ extern const device_t ibm_ps1_2121_device; extern const device_t tvga8900b_device; extern const device_t tvga8900d_device; extern const device_t tvga9000b_device; +extern const device_t nec_sv9000_device; /* IBM VGA */ extern const device_t vga_device; diff --git a/src/video/vid_table.c b/src/video/vid_table.c index 8a44ac075..ed34e7914 100644 --- a/src/video/vid_table.c +++ b/src/video/vid_table.c @@ -139,6 +139,7 @@ video_cards[] = { { &tvga8900b_device }, { &tvga8900d_device }, { &tvga9000b_device }, + { &nec_sv9000_device }, { &et4000k_isa_device }, { &et2000_device }, { &et4000_isa_device }, diff --git a/src/video/vid_tvga.c b/src/video/vid_tvga.c index 0af37ac94..d1bce0fe4 100644 --- a/src/video/vid_tvga.c +++ b/src/video/vid_tvga.c @@ -35,9 +35,10 @@ #define TVGA9000B_ID 0x23 #define TVGA8900CLD_ID 0x33 -#define ROM_TVGA_8900B "roms/video/tvga/tvga8900b.vbi" -#define ROM_TVGA_8900CLD "roms/video/tvga/trident.bin" -#define ROM_TVGA_9000B "roms/video/tvga/tvga9000b.bin" +#define ROM_TVGA_8900B "roms/video/tvga/tvga8900b.vbi" +#define ROM_TVGA_8900CLD "roms/video/tvga/trident.bin" +#define ROM_TVGA_9000B "roms/video/tvga/tvga9000b.bin" +#define ROM_TVGA_9000B_NEC_SV9000 "roms/video/tvga/SV9000.VBI" typedef struct tvga_t { mem_mapping_t linear_mapping; @@ -389,7 +390,9 @@ tvga_init(const device_t *info) tvga_t *tvga = malloc(sizeof(tvga_t)); memset(tvga, 0, sizeof(tvga_t)); - if (info->local == TVGA9000B_ID) { + tvga->card_id = info->local & 0xFF; + + if (tvga->card_id == TVGA9000B_ID) { video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tvga9000); tvga->vram_size = 512 << 10; } else { @@ -399,9 +402,7 @@ tvga_init(const device_t *info) tvga->vram_mask = tvga->vram_size - 1; - tvga->card_id = info->local; - - switch (info->local) { + switch (tvga->card_id) { case TVGA8900B_ID: bios_fn = ROM_TVGA_8900B; break; @@ -409,7 +410,7 @@ tvga_init(const device_t *info) bios_fn = ROM_TVGA_8900CLD; break; case TVGA9000B_ID: - bios_fn = ROM_TVGA_9000B; + bios_fn = (info->local & 0x100) ? ROM_TVGA_9000B_NEC_SV9000 : ROM_TVGA_9000B; break; default: free(tvga); @@ -424,7 +425,7 @@ tvga_init(const device_t *info) NULL, NULL); - if (info->local != TVGA9000B_ID) + if (tvga->card_id != TVGA9000B_ID) tvga->svga.ramdac = device_add(&tkd8001_ramdac_device); io_sethandler(0x03c0, 0x0020, tvga_in, NULL, NULL, tvga_out, NULL, NULL, tvga); @@ -450,6 +451,12 @@ tvga9000b_available(void) return rom_present(ROM_TVGA_9000B); } +static int +tvga9000b_nec_sv9000_available(void) +{ + return rom_present(ROM_TVGA_9000B_NEC_SV9000); +} + void tvga_close(void *p) { @@ -549,3 +556,17 @@ const device_t tvga9000b_device = { .force_redraw = tvga_force_redraw, .config = NULL }; + +const device_t nec_sv9000_device = { + .name = "NEC SV9000 (Trident TVGA 9000B)", + .internal_name = "tvga9000b", + .flags = DEVICE_ISA, + .local = TVGA9000B_ID | 0x100, + .init = tvga_init, + .close = tvga_close, + .reset = NULL, + { .available = tvga9000b_nec_sv9000_available }, + .speed_changed = tvga_speed_changed, + .force_redraw = tvga_force_redraw, + .config = NULL +}; From 97a99f70e35491022e4a59891a4cc76117a86a95 Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Sat, 1 Oct 2022 17:39:03 -0400 Subject: [PATCH 382/386] qt: Add floppy support to media history manager --- src/config.c | 17 +++++++++++++++++ src/floppy/fdd.c | 1 + src/include/86box/fdd.h | 2 ++ src/qt/qt_mediahistorymanager.cpp | 14 ++++++++++++-- src/qt/qt_mediahistorymanager.hpp | 5 +++-- src/qt/qt_mediamenu.cpp | 22 +++++++++++++++++++++- src/qt/qt_mediamenu.hpp | 1 + src/qt/qt_platform.cpp | 6 ++++++ 8 files changed, 63 insertions(+), 5 deletions(-) diff --git a/src/config.c b/src/config.c index 6212871be..702f41fe4 100644 --- a/src/config.c +++ b/src/config.c @@ -1291,6 +1291,14 @@ load_floppy_and_cdrom_drives(void) sprintf(temp, "fdd_%02i_check_bpb", c + 1); ini_section_delete_var(cat, temp); } + for (int i = 0; i < MAX_PREV_IMAGES; i++) { + fdd_image_history[c][i] = (char *) calloc(MAX_IMAGE_PATH_LEN + 1, sizeof(char)); + sprintf(temp, "fdd_%02i_image_history_%02i", c + 1, i + 1); + p = ini_section_get_string(cat, temp, NULL); + if (p) { + sprintf(fdd_image_history[c][i], "%s", p); + } + } } memset(temp, 0x00, sizeof(temp)); @@ -2680,6 +2688,15 @@ save_floppy_and_cdrom_drives(void) ini_section_delete_var(cat, temp); else ini_section_set_int(cat, temp, fdd_get_check_bpb(c)); + + for (int i = 0; i < MAX_PREV_IMAGES; i++) { + sprintf(temp, "fdd_%02i_image_history_%02i", c + 1, i + 1); + if ((fdd_image_history[c][i] == 0) || strlen(fdd_image_history[c][i]) == 0) { + ini_section_delete_var(cat, temp); + } else { + ini_section_set_string(cat, temp, fdd_image_history[c][i]); + } + } } for (c = 0; c < CDROM_NUM; c++) { diff --git a/src/floppy/fdd.c b/src/floppy/fdd.c index 65b95bb60..8ab8c315a 100644 --- a/src/floppy/fdd.c +++ b/src/floppy/fdd.c @@ -76,6 +76,7 @@ typedef struct { fdd_t fdd[FDD_NUM]; char floppyfns[FDD_NUM][512]; +char *fdd_image_history[FDD_NUM][FLOPPY_IMAGE_HISTORY]; pc_timer_t fdd_poll_time[FDD_NUM]; diff --git a/src/include/86box/fdd.h b/src/include/86box/fdd.h index 525c50d00..92efd9fd5 100644 --- a/src/include/86box/fdd.h +++ b/src/include/86box/fdd.h @@ -22,6 +22,7 @@ #define EMU_FDD_H #define FDD_NUM 4 +#define FLOPPY_IMAGE_HISTORY 4 #define SEEK_RECALIBRATE -999 #ifdef __cplusplus @@ -83,6 +84,7 @@ typedef struct { extern DRIVE drives[FDD_NUM]; extern char floppyfns[FDD_NUM][512]; +extern char *fdd_image_history[FDD_NUM][FLOPPY_IMAGE_HISTORY]; extern pc_timer_t fdd_poll_time[FDD_NUM]; extern int ui_writeprot[FDD_NUM]; diff --git a/src/qt/qt_mediahistorymanager.cpp b/src/qt/qt_mediahistorymanager.cpp index 884a13de5..19025d210 100644 --- a/src/qt/qt_mediahistorymanager.cpp +++ b/src/qt/qt_mediahistorymanager.cpp @@ -21,10 +21,15 @@ #include #include #include - -#include "86box/cdrom.h" #include "qt_mediahistorymanager.hpp" +extern "C" +{ +#include <86box/timer.h> +#include <86box/cdrom.h> +#include <86box/fdd.h> +} + namespace ui { MediaHistoryManager::MediaHistoryManager() { @@ -158,6 +163,9 @@ void MediaHistoryManager::initialDeduplication() case ui::MediaType::Optical: current_image = cdrom[device_index].image_path; break; + case ui::MediaType::Floppy: + current_image = floppyfns[device_index]; + break; default: continue; break; @@ -180,6 +188,8 @@ char ** MediaHistoryManager::getEmuHistoryVarForType(ui::MediaType type, int ind switch (type) { case ui::MediaType::Optical: return &cdrom[index].image_history[0]; + case ui::MediaType::Floppy: + return &fdd_image_history[index][0]; default: return nullptr; diff --git a/src/qt/qt_mediahistorymanager.hpp b/src/qt/qt_mediahistorymanager.hpp index 0a69aa100..c628ce793 100644 --- a/src/qt/qt_mediahistorymanager.hpp +++ b/src/qt/qt_mediahistorymanager.hpp @@ -59,7 +59,8 @@ namespace ui { // Used to iterate over all supported types when preparing data structures // Also useful to indicate which types support history static const MediaType AllSupportedMediaHistoryTypes[] = { - MediaType::Optical + MediaType::Optical, + MediaType::Floppy, }; class MediaHistoryManager { @@ -87,7 +88,7 @@ namespace ui { // Main hash of hash of vector of strings master_list_t master_list; - const master_list_t &getMasterList() const; + [[nodiscard]] const master_list_t &getMasterList() const; void setMasterList(const master_list_t &masterList); device_index_list_t index_list, empty_device_index_list; diff --git a/src/qt/qt_mediamenu.cpp b/src/qt/qt_mediamenu.cpp index ba52074cf..664cdaab2 100644 --- a/src/qt/qt_mediamenu.cpp +++ b/src/qt/qt_mediamenu.cpp @@ -105,6 +105,11 @@ void MediaMenu::refresh(QMenu *parentMenu) { menu->addAction(tr("&Existing image..."), [this, i]() { floppySelectImage(i, false); }); menu->addAction(tr("Existing image (&Write-protected)..."), [this, i]() { floppySelectImage(i, true); }); menu->addSeparator(); + for (int slot = 0; slot < MAX_PREV_IMAGES; slot++) { + floppyImageHistoryPos[slot] = menu->children().count(); + menu->addAction(QString::asprintf(tr("Image %i").toUtf8().constData(), slot), [this, i, slot]() { floppyMenuSelect(i, slot); })->setCheckable(false); + } + menu->addSeparator(); floppyExportPos = menu->children().count(); menu->addAction(tr("E&xport to 86F..."), [this, i]() { floppyExportTo86f(i); }); menu->addSeparator(); @@ -328,6 +333,7 @@ void MediaMenu::floppySelectImage(int i, bool wp) { } void MediaMenu::floppyMount(int i, const QString &filename, bool wp) { + auto previous_image = QFileInfo(floppyfns[i]); fdd_close(i); ui_writeprot[i] = wp ? 1 : 0; if (! filename.isEmpty()) { @@ -335,12 +341,14 @@ void MediaMenu::floppyMount(int i, const QString &filename, bool wp) { fdd_load(i, filenameBytes.data()); } ui_sb_update_icon_state(SB_FLOPPY | i, filename.isEmpty() ? 1 : 0); + mhm.addImageToHistory(i, ui::MediaType::Floppy, previous_image.filePath(), filename); floppyUpdateMenu(i); ui_sb_update_tip(SB_FLOPPY | i); config_save(); } void MediaMenu::floppyEject(int i) { + mhm.addImageToHistory(i, ui::MediaType::Floppy, floppyfns[i], QString()); fdd_close(i); ui_sb_update_icon_state(SB_FLOPPY | i, 1); floppyUpdateMenu(i); @@ -376,11 +384,22 @@ void MediaMenu::floppyUpdateMenu(int i) { ejectMenu->setText(QString::asprintf(tr("Eject %s").toUtf8().constData(), name.isEmpty() ? QString().toUtf8().constData() : fi.fileName().toUtf8().constData())); exportMenu->setEnabled(!name.isEmpty()); + for (int slot = 0; slot < MAX_PREV_IMAGES; slot++) { + updateImageHistory(i, slot, ui::MediaType::Floppy); + } + int type = fdd_get_type(i); //floppyMenus[i]->setTitle(tr("Floppy %1 (%2): %3").arg(QString::number(i+1), fdd_getname(type), name.isEmpty() ? tr("(empty)") : name)); floppyMenus[i]->setTitle(QString::asprintf(tr("Floppy %i (%s): %ls").toUtf8().constData(), i + 1, fdd_getname(type), name.isEmpty() ? tr("(empty)").toStdU16String().data() : name.toStdU16String().data())); } +void MediaMenu::floppyMenuSelect(int index, int slot) { + QString filename = mhm.getImageForSlot(index, slot, ui::MediaType::Floppy); + floppyMount(index, filename.toUtf8().constData(), false); + floppyUpdateMenu(index); + ui_sb_update_tip(SB_FLOPPY | index); +} + void MediaMenu::cdromMute(int i) { cdrom[i].sound_on ^= 1; config_save(); @@ -501,8 +520,9 @@ void MediaMenu::cdromUpdateMenu(int i) { imageMenu->setEnabled(!name.isEmpty()); imageMenu->setText(QString::asprintf(tr("Eject %s").toUtf8().constData(), name.isEmpty() ? QString().toUtf8().constData() : fi.fileName().toUtf8().constData())); - for (int slot = 0; slot < MAX_PREV_IMAGES; slot++) + for (int slot = 0; slot < MAX_PREV_IMAGES; slot++) { updateImageHistory(i, slot, ui::MediaType::Optical); + } QString busName = tr("Unknown Bus"); switch (cdrom[i].bus_type) { diff --git a/src/qt/qt_mediamenu.hpp b/src/qt/qt_mediamenu.hpp index 4503c1b93..870f57a95 100644 --- a/src/qt/qt_mediamenu.hpp +++ b/src/qt/qt_mediamenu.hpp @@ -37,6 +37,7 @@ public: void floppySelectImage(int i, bool wp); void floppyMount(int i, const QString& filename, bool wp); void floppyEject(int i); + void floppyMenuSelect(int index, int slot); void floppyExportTo86f(int i); void floppyUpdateMenu(int i); diff --git a/src/qt/qt_platform.cpp b/src/qt/qt_platform.cpp index 019d38cf4..f7048bee7 100644 --- a/src/qt/qt_platform.cpp +++ b/src/qt/qt_platform.cpp @@ -161,7 +161,13 @@ plat_timer_read(void) FILE * plat_fopen(const char *path, const char *mode) { +#if defined(Q_OS_MACOS) or defined(Q_OS_LINUX) + QFileInfo fi(path); + QString filename = fi.isRelative() ? usr_path + fi.filePath() : fi.filePath(); + return fopen(filename.toUtf8().constData(), mode); +#else return fopen(QString::fromUtf8(path).toLocal8Bit(), mode); +#endif } FILE * From 0aae6a993f07492cbcb31f0209efe8103e43a2e4 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 2 Oct 2022 04:02:08 +0200 Subject: [PATCH 383/386] Fixed the short name of the NEC SV-9000. --- src/video/vid_tvga.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/video/vid_tvga.c b/src/video/vid_tvga.c index d1bce0fe4..96931ac6f 100644 --- a/src/video/vid_tvga.c +++ b/src/video/vid_tvga.c @@ -559,7 +559,7 @@ const device_t tvga9000b_device = { const device_t nec_sv9000_device = { .name = "NEC SV9000 (Trident TVGA 9000B)", - .internal_name = "tvga9000b", + .internal_name = "nec_sv9000", .flags = DEVICE_ISA, .local = TVGA9000B_ID | 0x100, .init = tvga_init, From 9adf5ab5894ba2ae4ee6b0f0f106075f8a52e5ca Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Mon, 3 Oct 2022 09:17:09 -0400 Subject: [PATCH 384/386] qt: Account for empty path in plat_fopen --- src/qt/qt_platform.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/qt/qt_platform.cpp b/src/qt/qt_platform.cpp index f7048bee7..10a6654c0 100644 --- a/src/qt/qt_platform.cpp +++ b/src/qt/qt_platform.cpp @@ -163,7 +163,7 @@ plat_fopen(const char *path, const char *mode) { #if defined(Q_OS_MACOS) or defined(Q_OS_LINUX) QFileInfo fi(path); - QString filename = fi.isRelative() ? usr_path + fi.filePath() : fi.filePath(); + QString filename = (fi.isRelative() && !fi.filePath().isEmpty()) ? usr_path + fi.filePath() : fi.filePath(); return fopen(filename.toUtf8().constData(), mode); #else return fopen(QString::fromUtf8(path).toLocal8Bit(), mode); @@ -175,7 +175,7 @@ plat_fopen64(const char *path, const char *mode) { #if defined(Q_OS_MACOS) or defined(Q_OS_LINUX) QFileInfo fi(path); - QString filename = fi.isRelative() ? usr_path + fi.filePath() : fi.filePath(); + QString filename = (fi.isRelative() && !fi.filePath().isEmpty()) ? usr_path + fi.filePath() : fi.filePath(); return fopen(filename.toUtf8().constData(), mode); #else return fopen(QString::fromUtf8(path).toLocal8Bit(), mode); From c289b1c86b5c560be55a21bfca0014ccdaacc015 Mon Sep 17 00:00:00 2001 From: cold-brewed Date: Sun, 9 Oct 2022 14:54:40 -0400 Subject: [PATCH 385/386] qt: Fix play / pause icon to reflect current state --- src/qt/qt_mainwindow.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 0ee5a3161..fd2294415 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -202,7 +202,8 @@ MainWindow::MainWindow(QWidget *parent) : } } #endif - ui->actionPause->setChecked(dopause); + ui->actionPause->setChecked(false); + ui->actionPause->setCheckable(false); }); connect(this, &MainWindow::getTitleForNonQtThread, this, &MainWindow::getTitle_, Qt::BlockingQueuedConnection); @@ -753,6 +754,10 @@ void MainWindow::on_actionCtrl_Alt_Esc_triggered() { void MainWindow::on_actionPause_triggered() { plat_pause(dopause ^ 1); + auto pause_icon = dopause ? QIcon(":/menuicons/win/icons/run.ico") : QIcon(":/menuicons/win/icons/pause.ico"); + auto tooltip_text = dopause ? QString(tr("Resume execution")) : QString(tr("Pause execution")); + ui->actionPause->setIcon(pause_icon); + ui->actionPause->setToolTip(tooltip_text); } void MainWindow::on_actionExit_triggered() { From 0dabf88bafe7dba3b45f9f45411a3f9cd2e19d55 Mon Sep 17 00:00:00 2001 From: ts-korhonen Date: Fri, 14 Oct 2022 14:44:36 +0300 Subject: [PATCH 386/386] Fix Qt 6.4 builds. Cast from char* to QVariant was removed, use const char* instead. --- src/disk/hdd.c | 8 ++++---- src/include/86box/hdd.h | 16 ++++++++-------- 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/src/disk/hdd.c b/src/disk/hdd.c index 2ba59eb93..ee731b046 100644 --- a/src/disk/hdd.c +++ b/src/disk/hdd.c @@ -442,16 +442,16 @@ hdd_preset_get_num() return sizeof(hdd_speed_presets) / sizeof(hdd_preset_t); } -char * +const char * hdd_preset_getname(int preset) { - return (char *) hdd_speed_presets[preset].name; + return hdd_speed_presets[preset].name; } -char * +const char * hdd_preset_get_internal_name(int preset) { - return (char *) hdd_speed_presets[preset].internal_name; + return hdd_speed_presets[preset].internal_name; } int diff --git a/src/include/86box/hdd.h b/src/include/86box/hdd.h index 905a1c294..d993d5c32 100644 --- a/src/include/86box/hdd.h +++ b/src/include/86box/hdd.h @@ -203,13 +203,13 @@ extern int image_is_hdi(const char *s); extern int image_is_hdx(const char *s, int check_signature); extern int image_is_vhd(const char *s, int check_signature); -extern double hdd_timing_write(hard_disk_t *hdd, uint32_t addr, uint32_t len); -extern double hdd_timing_read(hard_disk_t *hdd, uint32_t addr, uint32_t len); -extern double hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_t continuous, double max_seek_time); -int hdd_preset_get_num(); -char *hdd_preset_getname(int preset); -extern char *hdd_preset_get_internal_name(int preset); -extern int hdd_preset_get_from_internal_name(char *s); -extern void hdd_preset_apply(int hdd_id); +extern double hdd_timing_write(hard_disk_t *hdd, uint32_t addr, uint32_t len); +extern double hdd_timing_read(hard_disk_t *hdd, uint32_t addr, uint32_t len); +extern double hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_t continuous, double max_seek_time); +int hdd_preset_get_num(); +const char *hdd_preset_getname(int preset); +extern const char *hdd_preset_get_internal_name(int preset); +extern int hdd_preset_get_from_internal_name(char *s); +extern void hdd_preset_apply(int hdd_id); #endif /*EMU_HDD_H*/